| created | 2025-02-03T17:12:55Z |
|---|---|
| begin | 2025-01-19T00:00:00Z |
| end | 2025-01-20T00:00:00Z |
| path | src/sys |
| commits | 4 |
| date | 2025-01-19T03:27:27Z | |||
|---|---|---|---|---|
| author | dlg | |||
| files | src/sys/net/bpf.c | log | diff | annotate |
| message |
make BIOCSWTIMEOUT work with kq events. makes sense jmatthew@ |
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| date | 2025-01-19T11:15:52Z | |||
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| author | jsg | |||
| files | src/sys/dev/pci/drm/i915/i915_active.c | log | diff | annotate |
| src/sys/dev/pci/drm/include/linux/atomic.h | log | diff | annotate | |
| message |
On i386, llvm >= 17 warns with -Wsync-alignment when using a sync builtin with a 64-bit value that isn't 64-bit aligned. The Intel SDM volume 3, strongly suggests to do this for performance reasons. My reading is this isn't required to be atomic. Make atomic64_t 64-bit aligned and change arguments to avoid the warning. And make a local change to the inteldrm code to set alignment in a case where we use a sync builtin when linux doesn't (cmpxchg64()). discussed with tb@ robert@ kettenis@, ok tb@ |
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| date | 2025-01-19T20:18:37Z | |||
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| author | kettenis | |||
| files | src/sys/arch/riscv64/include/pmap.h | log | diff | annotate |
| message |
Implement pmap_populate(). As noted in the arm64 commit the riscv64 pmap is derived from the arm64 pmap and suffers from the same issue. ok mpi@, jca@ |
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| date | 2025-01-19T20:18:38Z | |||
|---|---|---|---|---|
| author | kettenis | |||
| files | src/sys/arch/riscv64/riscv64/pmap.c | log | diff | annotate |
| message |
Implement pmap_populate(). As noted in the arm64 commit the riscv64 pmap is derived from the arm64 pmap and suffers from the same issue. ok mpi@, jca@ |
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