created | 2023-11-26T09:05:17Z |
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begin | 2023-11-24T00:00:00Z |
end | 2023-11-25T00:00:00Z |
path | src/sys |
commits | 8 |
date | 2023-11-24T00:15:42Z | |||
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author | asou | |||
files | src/sys/kern/kern_physio.c | log | diff | annotate |
message |
Fix comments longer than 80 column. ok miod@ |
date | 2023-11-24T04:34:09Z | |||
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author | jmatthew | |||
files | src/sys/dev/pci/pcidevs | log | diff | annotate |
message |
Add devices found in 4th generation (Genoa) Epyc systems input from and ok jsg@ |
date | 2023-11-24T04:34:35Z | |||
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author | jmatthew | |||
files | src/sys/dev/pci/pcidevs.h | log | diff | annotate |
src/sys/dev/pci/pcidevs_data.h | log | diff | annotate | |
message | regen |
date | 2023-11-24T07:18:49Z | |||
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author | miod | |||
files | src/sys/arch/riscv64/include/pmap.h | log | diff | annotate |
src/sys/arch/riscv64/include/vmparam.h | log | diff | annotate | |
message |
Remove unused direct map defines and macros, originating from FreeBSD. ok mlarkin@ kettenis@ |
date | 2023-11-24T07:57:39Z | |||
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author | miod | |||
files | src/sys/arch/riscv64/riscv64/cpuswitch.S | log | diff | annotate |
src/sys/arch/riscv64/riscv64/exception.S | log | diff | annotate | |
message |
No need to load function addresses in registers and branch to the register contents when there is that nifty instruction called "call"; NFC |
date | 2023-11-24T08:47:35Z | |||
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author | jmatthew | |||
files | src/sys/dev/pci/ccp_pci.c | log | diff | annotate |
message |
Match on 19h/1xh PSP ok dlg@ |
date | 2023-11-24T16:41:12Z | |||
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author | miod | |||
files | src/sys/arch/riscv64/riscv64/genassym.cf | log | diff | annotate |
message | Remove unneeded symbols. |
date | 2023-11-24T21:48:25Z | |||
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author | dv | |||
files | src/sys/arch/amd64/amd64/vmm_machdep.c | log | diff | annotate |
message |
vmm(4)/vmx: fix memory scribbling by updating GDTR/TR if vcpu moves. If the vcpu thread sleeps in the kernel, like when handling a nested page fault and calling uvm_fault(9), the thread may be rescheduled on another host cpu. vmm(4) was only setting the GDTR and TR bases in the VMCS once prior to first vm entry, so a thread migration can result in restoring the wrong GDTR and TR on vm exit for the host cpu. This results in borked interrupts and corrupted stack pointers, causing programs to segfault or sigabort. It can also result in missed ipi's causing kernel deadlocks. Use similar logic to the SVM routines and check for cpu migration within the hot loop. Since we're letting the VMX features of the cpu restore GDTR, we can also drop the manual store/load routines. Reported and with much appreciated testing help from Mischa Peters. ok mlarkin@ |