created | 2023-11-26T08:52:14Z |
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begin | 2023-11-20T00:00:00Z |
end | 2023-11-21T00:00:00Z |
path | src/sys |
commits | 3 |
date | 2023-11-20T16:10:37Z | |||
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author | miod | |||
files | src/sys/arch/riscv64/riscv64/exception.S | log | diff | annotate |
message |
Make sure the low two bits of stvec are always zero (since we don't use vectored exceptions) by adding an alignment constraint to cpu_exception_handler. |
date | 2023-11-20T16:11:45Z | |||
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author | miod | |||
files | src/sys/arch/riscv64/conf/Makefile.riscv64 | log | diff | annotate |
message |
Revert 1.18 and randomly sort kernel object files again now that the issue has been addressed. |
date | 2023-11-20T20:41:18Z | |||
---|---|---|---|---|
author | kettenis | |||
files | src/sys/dev/fdt/if_dwge.c | log | diff | annotate |
message |
Handle rx error. ok miod@ |