| created | 2023-06-27T11:44:04Z |
|---|---|
| begin | 2023-06-24T00:00:00Z |
| end | 2023-06-25T00:00:00Z |
| path | src/sys |
| commits | 2 |
| date | 2023-06-24T18:26:59Z | |||
|---|---|---|---|---|
| author | jsing | |||
| files | src/sys/arch/riscv64/dev/stfclock.c | log | diff | annotate |
| message |
Add initial support for StarFive VisionFive V2 to stfclock(4). This adds initial support for the syscrg and pll clocks on the StarFive VisionFive V2 JH7110 SoC. ok kettenis@ |
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| date | 2023-06-24T20:54:46Z | |||
|---|---|---|---|---|
| author | bluhm | |||
| files | src/sys/netinet/in_pcb.c | log | diff | annotate |
| src/sys/netinet/in_pcb.h | log | diff | annotate | |
| src/sys/netinet6/in6_pcb.c | log | diff | annotate | |
| message |
Calculate inet PCB SIP hash without table mutex. Goal is to run UDP input in parallel. Btrace kstack analysis shows that SIP hash for PCB lookup is quite expensive. When running in parallel, there is also lock contention on the PCB table mutex. It results in better performance to calculate the hash value before taking the mutex. The hash secret has to be constant as hash calculation must not depend on values protected by the table mutex. Do not reseed anymore when hash table gets resized. Analysis also shows that asserting a rw_lock while holding a mutex is a bit expensive. Just remove the netlock assert. OK dlg@ mvs@ |
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