| created | 2023-04-17T23:02:03Z |
|---|---|
| begin | 2023-04-16T00:00:00Z |
| end | 2023-04-17T00:00:00Z |
| path | src/sys |
| commits | 14 |
| date | 2023-04-16T01:50:12Z | |||
|---|---|---|---|---|
| author | dv | |||
| files | src/sys/arch/amd64/amd64/vmm.c | log | diff | annotate |
| message | vmm(4): save and restore Intel CET state on vm entry/exit. | |||
| date | 2023-04-16T05:39:33Z | |||
|---|---|---|---|---|
| author | guenther | |||
| files | src/sys/arch/amd64/amd64/vector.S | log | diff | annotate |
| message |
Both trap 21 (T_CP) and trap 17 (T_ALIGNFLT) supply an error code in hardware; use TRAP() instead of ZTRAP(). T_ALIGNFLT fixed in NetBSD on 2012-4-21 ok deraadt@ jsg@ |
|||
| date | 2023-04-16T05:40:25Z | |||
|---|---|---|---|---|
| author | guenther | |||
| files | src/sys/arch/i386/i386/locore.s | log | diff | annotate |
| message |
Trap 17 (T_ALIGNFLT) supplies an error code in hardware; use TRAP() instead of ZTRAP(). T_ALIGNFLT fixed in NetBSD on 2003-12-12 ok deraadt@ jsg@ |
|||
| date | 2023-04-16T06:38:50Z | |||
|---|---|---|---|---|
| author | guenther | |||
| files | src/sys/arch/amd64/amd64/trap.c | log | diff | annotate |
| message |
Handle T_CP traps from userland by generating SIGILL, with code ILL_ILLOPC or ILL_BADSTK depending on the error from hardware lack of handling noted by deraadt@ ok jsg@ |
|||
| date | 2023-04-16T06:43:49Z | |||
|---|---|---|---|---|
| author | jsg | |||
| files | src/sys/arch/amd64/amd64/trap.c | log | diff | annotate |
| src/sys/arch/i386/i386/trap.c | log | diff | annotate | |
| message |
call default db_ktrap() with tf_err, not 0 for exception error code ok guenther@ |
|||
| date | 2023-04-16T08:02:45Z | |||
|---|---|---|---|---|
| author | kettenis | |||
| files | src/sys/arch/arm64/dev/aplcpu.c | log | diff | annotate |
| message |
The lowest performance level state for the E-cores on the M2 Pro/Max is 2 instead of 1. Handle this by taking the lowest state from the opp tables instead of hardcoding it. Fixes cpuperf on the M2 Pro/Max. ok patrick@ |
|||
| date | 2023-04-16T10:14:59Z | |||
|---|---|---|---|---|
| author | kettenis | |||
| files | src/sys/arch/arm64/arm64/process_machdep.c | log | diff | annotate |
| src/sys/arch/arm64/arm64/sig_machdep.c | log | diff | annotate | |
| src/sys/arch/arm64/include/armreg.h | log | diff | annotate | |
| message |
Clear BTYPE bits when setting up a signal handler and when handling a PT_CONTINUE ptrace(2) request. Otherwise we would trap if userland was interrupted at a point where it is doing an indirect branch that has set the bits but before it has executed the BTI instruction at the branch target. The PT_SETREGS request may need similar treatment, at least when the PC is changed. But Linux doesn't do this and debuggers might want full control over the BTYPE bits. So leave this alone for now. ok guenther@ |
|||
| date | 2023-04-16T11:14:26Z | |||
|---|---|---|---|---|
| author | kettenis | |||
| files | src/sys/arch/arm64/arm64/pmap.c | log | diff | annotate |
| src/sys/arch/arm64/include/pmap.h | log | diff | annotate | |
| message |
Make enabling the BTI feature a per-pmap thing by storing the ATTR_GP bit in a new pm_guarded member of struct pmap and using this member to add the bits to the PTEs ok deraadt@ |
|||
| date | 2023-04-16T11:34:32Z | |||
|---|---|---|---|---|
| author | kettenis | |||
| files | src/sys/dev/fdt/simplefb.c | log | diff | annotate |
| message |
Add no-op implementations of the WSDISPLAYIO_GVIDEO and WSDISPLAYIO_SVIDEO ioctls. Everything we need from them is handled by wsdisplay(4) already, but we need to handle them here to signal that we actually implement burner support. ok tb@, tobhe@ |
|||
| date | 2023-04-16T11:38:42Z | |||
|---|---|---|---|---|
| author | kettenis | |||
| files | src/sys/dev/acpi/com_acpi.c | log | diff | annotate |
| message |
Too many ACPI implementations advertise serial ports that aren't actually implemented. This leads to hangs when we run "ttyflags -a" in /etc/rc. Add the same probe that we have in the ISA version of the driver to make sure the port is actually there. ok patrick@ |
|||
| date | 2023-04-16T12:09:01Z | |||
|---|---|---|---|---|
| author | kettenis | |||
| files | src/sys/arch/arm64/dev/aplpcie.c | log | diff | annotate |
| message |
Add support for the PCIe controller found on M2 Pro/Max SoCs. While the bindings are still preliminary I don't exepect any substantial changes that would affect the driver. Hopefully the bindings will end up officially approved before OpenBSD 7.4 gets released. ok patrick@ |
|||
| date | 2023-04-16T13:35:58Z | |||
|---|---|---|---|---|
| author | kettenis | |||
| files | src/sys/sys/exec_elf.h | log | diff | annotate |
| message |
Add PT_GNU_PROPERTY define. ok deraadt@ |
|||
| date | 2023-04-16T21:19:26Z | |||
|---|---|---|---|---|
| author | cheloha | |||
| files | src/sys/kern/kern_clockintr.c | log | diff | annotate |
| src/sys/sys/clockintr.h | log | diff | annotate | |
| message |
clockintr: add shadow copy of running clock interrupt to clockintr_queue cq_shadow is a private copy of the running clock interrupt passed to cl_func() during the dispatch loop. It resembles the real clockintr object, though the two are distinct (hence "shadow"). A private copy is useful for two reasons: 1. Scheduling operations performed on cq_shadow (advance, cancel, schedule) are recorded as requests with the CLST_SHADOW_PENDING flag and are normally performed on the real clockintr when cl_func() returns. However, if an outside thread performs a scheduling operation on the real clockintr while cl_func() is running, the CLST_IGNORE_SHADOW flag is set and any scheduling operations requested by the running clock interrupt are ignored. The upshot of this arrangement is that outside scheduling operations have priority over those requested by the running clock interrupt. Because there is no race, periodic clock interrupts can now be safely stopped without employing the serialization mechanisms needed to safely stop periodic timeouts or tasks. 2. &cq->cq_shadow is a unique address, so most clockintr_* API calls made while cl_func() is running now don't need to enter/leave cq_mtx: the API can recognize when it is being called in the midst of clockintr_dispatch(). Tested by mlarkin@. With input from dlg@. In particular, dlg@ expressed some design concerns but then stopped responding. I have changes planned to address some of the concerns. I think if we hit a wall with the current clockintr design we could change the allocation scheme without too much suffering. I don't anticipate there being more than ~20 distinct clock interrupts. |
|||
| date | 2023-04-16T23:57:59Z | |||
|---|---|---|---|---|
| author | deraadt | |||
| files | src/sys/arch/amd64/conf/Makefile.amd64 | log | diff | annotate |
| message |
compile regular kernels with -fcf-protection=branch, and ramdisks with -fcf-protection=none, regardless of what the compiler default is. -fcf-protection=branch puts endbr64 instructions on functions which could be reached indirectly. ok guenther kettenis |
|||