| created | 2023-05-21T01:11:04Z |
|---|---|
| begin | 2023-04-06T00:00:00Z |
| end | 2023-04-07T00:00:00Z |
| path | src/sys |
| commits | 3 |
| date | 2023-04-06T00:09:39Z | |||
|---|---|---|---|---|
| author | dlg | |||
| files | src/sys/dev/fdt/if_dwqe_fdt.c | log | diff | annotate |
| message |
better handle "phy-mode" properties, in particular around clk delays. the phy mode can encode whether rk3568 mac should be doing the delays when talking to the phy, or whether it should ignore them and let the phy handle them. turns out this will probably be needed by kettenis to get working ethernet on another rk3568 based system. tweaks and ok kettenis@ |
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| date | 2023-04-06T19:02:29Z | |||
|---|---|---|---|---|
| author | kettenis | |||
| files | src/sys/dev/fdt/rkgrf.c | log | diff | annotate |
| message | The simplebus_attach() function already prints a newline, so drop it here. | |||
| date | 2023-04-06T21:17:01Z | |||
|---|---|---|---|---|
| author | kettenis | |||
| files | src/sys/dev/fdt/rkclock.c | log | diff | annotate |
| src/sys/dev/fdt/rkclock_clocks.h | log | diff | annotate | |
| message |
Add two more RK3568 clocks. ok dlg@ |
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