created | 2023-03-19T10:34:05Z |
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begin | 2023-03-12T00:00:00Z |
end | 2023-03-13T00:00:00Z |
path | src/sys |
commits | 4 |
date | 2023-03-12T10:46:27Z | |||
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author | jmatthew | |||
files | src/sys/dev/fdt/mvtemp.c | log | diff | annotate |
message |
Match on the Armada 380 temperature sensor, which works the same as the CP110 sensor. ok kettenis@ |
date | 2023-03-12T10:50:06Z | |||
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author | jmatthew | |||
files | src/sys/arch/armv7/conf/GENERIC | log | diff | annotate |
message | Enable mvtemp(4) |
date | 2023-03-12T14:29:50Z | |||
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author | kettenis | |||
files | src/sys/arch/arm64/conf/GENERIC | log | diff | annotate |
src/sys/arch/arm64/conf/RAMDISK | log | diff | annotate | |
src/sys/dev/fdt/files.fdt | log | diff | annotate | |
src/sys/dev/fdt/rkclock.c | log | diff | annotate | |
src/sys/dev/fdt/rkclock_clocks.h | log | diff | annotate | |
src/sys/dev/fdt/rkcomphy.c | log | diff | annotate | |
message |
Add rkcomphy(3), a driver for the "naneng" combo PHY found on the RK356x (and RK3588). This is a PIPE PHY with support for PCIe, SATA, USB3, SGMII and QSGMII. For now only PCIe, SATA and USB3 support are implemented. SATA support has not been tested. Also add the refernce clocks needed by the PHYs to rkclock(4). ok mlarkin@ |
date | 2023-03-12T22:18:58Z | |||
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author | cheloha | |||
files | src/sys/arch/landisk/conf/GENERIC | log | diff | annotate |
src/sys/arch/landisk/conf/RAMDISK | log | diff | annotate | |
src/sys/arch/sh/sh/clock.c | log | diff | annotate | |
message |
sh, landisk: set HZ=64 again The addition of HZ to sys/kernel.h in v1.26 overrides the default definition of HZ in sh/clock.c, changing landisk from HZ=64 to HZ=100. Explicitly set HZ=64 in the GENERIC and RAMDISK config(8) files to can change it from 100 back to 64. Not sure if this is the best thing, but it does fix the problem. Problem confirmed by, and fix tested by, miod@. ok miod@ |