| created | 2022-12-18T08:30:53Z |
|---|---|
| begin | 2022-12-10T00:00:00Z |
| end | 2022-12-11T00:00:00Z |
| path | src/sys |
| commits | 9 |
| date | 2022-12-10T02:41:56Z | |||
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| author | aoyama | |||
| files | src/sys/arch/luna88k/luna88k/autoconf.c | log | diff | annotate |
| src/sys/arch/luna88k/luna88k/machdep.c | log | diff | annotate | |
| message | Fix comments, no binary change. | |||
| date | 2022-12-10T10:13:58Z | |||
|---|---|---|---|---|
| author | patrick | |||
| files | src/sys/arch/arm64/arm64/cpu.c | log | diff | annotate |
| src/sys/arch/arm64/arm64/exception.S | log | diff | annotate | |
| src/sys/arch/arm64/arm64/genassym.cf | log | diff | annotate | |
| src/sys/arch/arm64/arm64/pmap.c | log | diff | annotate | |
| src/sys/arch/arm64/arm64/trampoline.S | log | diff | annotate | |
| src/sys/arch/arm64/include/cpu.h | log | diff | annotate | |
| src/sys/dev/fdt/psci.c | log | diff | annotate | |
| src/sys/dev/fdt/pscivar.h | log | diff | annotate | |
| message |
Mitigate Spectre-BHB by using core-specific trampoline vectors. On some cores Spectre-BHB can be mitigated by using a loop that branches a number of times. For cores where this does not suffice, or where Spectre-V2 needs to be handled as well, try and call into a new PSCI function that mitigates both Spectre-V2 and Spectre-BHB. Some newer machines, which might not be in anyone's hands yet, have an instruction (CLRBHB) that clears the BHB. If ECBHB is set, the BHB isn't vulnerable. If we have CSV2_3/HCXT, it's not vulnerable at all. No visible performance dropoff on a MacchiatoBin (4xA72) or Lenovo x13s (4xA78C+ 4xX1C), but around 2-3% on a LX2K (16xA72) and RK3399 (4xA53+2xA72). ok kettenis@ |
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| date | 2022-12-10T15:02:29Z | |||
|---|---|---|---|---|
| author | cheloha | |||
| files | src/sys/arch/alpha/alpha/clock.c | log | diff | annotate |
| src/sys/arch/alpha/alpha/cpu.c | log | diff | annotate | |
| src/sys/arch/alpha/alpha/interrupt.c | log | diff | annotate | |
| src/sys/arch/alpha/include/_types.h | log | diff | annotate | |
| src/sys/arch/alpha/include/cpu.h | log | diff | annotate | |
| src/sys/arch/alpha/include/cpuconf.h | log | diff | annotate | |
| message |
alpha: switch to clockintr - Add missing tick_nsec initialization to cpu_initclocks(). - Set stathz = hz, profhz = stathz; we don't have any control over the interrupt clock on alpha so everything has the same frequency. - Set schedhz = 16 to imitate current schedclock() dispatch frequency. Bringup help from claudio@. Tested by miod@ (2-CPU DS25). Link: https://marc.info/?l=openbsd-tech&m=166776333303245&w=2 ok mlarkin@ |
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| date | 2022-12-10T18:43:48Z | |||
|---|---|---|---|---|
| author | kettenis | |||
| files | src/sys/arch/arm64/dev/apliic.c | log | diff | annotate |
| message |
Increase transfer completion timeout to 100ms. This is what Linux has and we need a longer timeout for the USB Type-C PD chips. ok tobhe@ |
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| date | 2022-12-10T21:26:21Z | |||
|---|---|---|---|---|
| author | kn | |||
| files | src/sys/netinet6/icmp6.c | log | diff | annotate |
| src/sys/netinet6/nd6.c | log | diff | annotate | |
| src/sys/netinet6/nd6.h | log | diff | annotate | |
| src/sys/netinet6/nd6_nbr.c | log | diff | annotate | |
| src/sys/netinet6/nd6_rtr.c | log | diff | annotate | |
| message |
Merge nd6_option_init() into nd6_options() All call-sites call nd6_options() directly after nd6_option_init(). Fold them to simplify the logic and do less pointing around. Feedback OK bluhm florian |
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| date | 2022-12-10T21:29:10Z | |||
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| author | mvs | |||
| files | src/sys/netinet6/nd6_nbr.c | log | diff | annotate |
| message |
`dp' was just allocated with M_ZERO flag, so the following bzero(3) is not required. ok kn@ |
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| date | 2022-12-10T22:16:24Z | |||
|---|---|---|---|---|
| author | kn | |||
| files | src/sys/netinet6/icmp6.c | log | diff | annotate |
| message | zap 68 trailing spaces from a single line | |||
| date | 2022-12-10T22:40:58Z | |||
|---|---|---|---|---|
| author | kn | |||
| files | src/sys/netinet6/icmp6.c | log | diff | annotate |
| message | Reuse off variable from previous line; no object change | |||
| date | 2022-12-10T23:45:51Z | |||
|---|---|---|---|---|
| author | kn | |||
| files | src/sys/netinet6/icmp6.c | log | diff | annotate |
| message |
Remove unused experimental ICMP6 redirect low water bits Dead since introduction in 2001 with icmp6.c r1.31: implement upper limit to icmp6 redirects (experimental, turned off) negative value to {mtudisc,redirect}_{hi,lo}wat will turn off the limitation. sync with kame. icmp6_redirect_lowat was always -1 and never hit the empty conditional. icmp6_redirect_hiwat never existed. icmp6_mtudisc_{hi,lo}wat are exposed as net.inet6.icmp6.mtudisc_{hi,lo}wat sysctl(2)s, so don't touch those for now. OK mvs |
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