| created | 2022-12-04T15:04:45Z |
|---|---|
| begin | 2022-11-27T00:00:00Z |
| end | 2022-11-28T00:00:00Z |
| path | src/sys |
| commits | 3 |
| date | 2022-11-27T15:31:36Z | |||
|---|---|---|---|---|
| author | kn | |||
| files | src/sys/netinet6/nd6_nbr.c | log | diff | annotate |
| message |
Remove useless casts All *dp variables are of type 'struct dadq *'; no object change. OK mvs |
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| date | 2022-11-27T22:04:59Z | |||
|---|---|---|---|---|
| author | kettenis | |||
| files | src/sys/dev/fdt/dwpcie.c | log | diff | annotate |
| message |
Implement support for the (optional) MSI controller of Synopsys Designware PCIe host bridge. This MSI controller is quite retarded since it maps all MSIs to a single hardware interrupt. So it doesn't really offer any benefit over using classic INTx interrupts. Unfortunately we need to use it on Amlogic SoCs since the PCIe device interrupt doesn't seem to work correctly when configured as a level triggered interrupt and the workaround of configuring it as an edge triggered interrupt causes problems when using multiple disks connected to ahci(4) on the ODROID-HC4. ok patrick@ |
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| date | 2022-11-27T22:55:31Z | |||
|---|---|---|---|---|
| author | kn | |||
| files | src/sys/dev/pci/pci.c | log | diff | annotate |
| message |
Remove last queue(3) *_END() usage from tree queue(3) NOTES says they're deprecated and expand to NULL; indeed. No object change. OK kettenis mvs |
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