| created | 2022-11-26T11:44:00Z |
|---|---|
| begin | 2022-11-24T00:00:00Z |
| end | 2022-11-25T00:00:00Z |
| path | src/sys |
| commits | 4 |
| date | 2022-11-24T00:04:32Z | |||
|---|---|---|---|---|
| author | mvs | |||
| files | src/sys/net/pfvar_priv.h | log | diff | annotate |
| message |
Remove netlock assertion within PF_LOCK(). The netlock should be taken first, but only if both locks are taken. ok dlg@ sashan@ |
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| date | 2022-11-24T04:04:39Z | |||
|---|---|---|---|---|
| author | jmatthew | |||
| files | src/sys/dev/acpi/acpimadt.c | log | diff | annotate |
| src/sys/dev/acpi/acpireg.h | log | diff | annotate | |
| message |
Don't report unknown apic structure types if they're in the OEM reserved range (0x80 to 0xff). We're not going to understand OEM specific structures, and some machines such as the Dell R6515 have significant numbers of them. ok kettenis@ |
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| date | 2022-11-24T14:36:07Z | |||
|---|---|---|---|---|
| author | kettenis | |||
| files | src/sys/arch/arm64/include/armreg.h | log | diff | annotate |
| message |
Document a few more ID register bits. This should add most of the stuff in ARMv8.5 as far as the ISAR and PFR registers are concerned. ok deraadt@ |
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| date | 2022-11-24T14:43:16Z | |||
|---|---|---|---|---|
| author | kettenis | |||
| files | src/sys/arch/arm64/arm64/cpu.c | log | diff | annotate |
| src/sys/arch/arm64/arm64/machdep.c | log | diff | annotate | |
| src/sys/arch/arm64/include/cpu.h | log | diff | annotate | |
| message |
Expose the complete set of ID registers as defined in the current version of ARMv8/ARMv9. Make sure we only expose the features that we know about and support in our kernel. This matches what Linux does. For now, mostly restrict ourselves to features defined in ARMv8.5 which means that we only actually implement support for ID_AA64ISAR0_EL1, ID_AA64ISAR1_EL1, ID_AA64PFR0_EL1 and ID_AA64PFR1_EL1. For the other registers we simply always return 0. ok deraadt@ |
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