OpenBSD cvs log

created 2022-09-22T04:12:45Z
begin 2022-09-15T00:00:00Z
end 2022-09-16T00:00:00Z
path src/sys
commits 8

date 2022-09-15T01:57:52Z
author jsg
files src/sys/arch/arm64/arm64/cpu.c log diff annotate
message recognise Neoverse V2 (Demeter)

date 2022-09-15T04:28:07Z
author kmos
files src/sys/dev/pci/pcidevs log diff annotate
message Add IDs for the JHL6240 Thunderbolt 3 controller found in my Thinkpad T490

ok jsg

date 2022-09-15T04:28:51Z
author kmos
files src/sys/dev/pci/pcidevs.h log diff annotate
src/sys/dev/pci/pcidevs_data.h log diff annotate
message regen

date 2022-09-15T09:08:29Z
author krw
files src/sys/kern/subr_disk.c log diff annotate
message Remove unneeded interim DPRINTF() verbiage. Make DEBUG compile
again.

date 2022-09-15T10:10:14Z
author krw
files src/sys/sys/disklabel.h log diff annotate
message Add GPTPARTATTR_MS_* defines for Microsoft basic data attributes
and make 'fdisk -v' display their names (NoAutoMount, Hidden,
Shadow, ReadOnly).

Shift 1ULL instead of 1 to make it clear these are uint64_t
flags. Makes clang happier.

date 2022-09-15T14:45:49Z
author tobhe
files src/sys/arch/arm64/dev/apldc.c log diff annotate
message Add support for Apple fn key combinations. Based on Apple fn key handling
in ukbd(4).

ok miod@

date 2022-09-15T18:03:52Z
author mglocker
files src/sys/dev/acpi/qcgpio.c log diff annotate
message Enable the keyboard on the Samsung Galaxy Book Go.

Help from kettenis@, "Nice!" deraadt@

date 2022-09-15T19:30:51Z
author cheloha
files src/sys/arch/amd64/amd64/cpu.c log diff annotate
src/sys/arch/amd64/amd64/tsc.c log diff annotate
message tsc: configure LFENCE to serialize dispatch before testing TSC sync

On AMD CPUs, LFENCE does not serialize instruction dispatch until MSR
C001_1029[1] is properly configured. We do this in identifycpu(); see
amd64/identcpu.c,v 1.103.

The upshot is that the first TSC synchronization test is currently
invalid on most AMD CPUs because the LFENCE in the test loop does not
ensure that the AP loads the BP's latest TSC value before executing
RDTSC. So the synchronization test is yielding false positives on AMD
CPUs where the TSCs are actually synchronized.

The simplest fix is to wait until after the secondary CPU runs
identifycpu() in cpu_hatch() to test TSC synchronization.

Moving the TSC sync test after CPU identification means that we can
remove the CPUID() calls from tsc.c: the CPU feature flags are set in
identifycpu() so we no longer need to test for IA32_TSC_ADJUST support
by hand.

While we are at it, we should also pass the correct cpu_info pointer
to tsc_test_sync_bp(). It was unused before, so the bug was harmless,
but we definitely need the BP's cpu_info pointer, not the AP's pointer.

Unfortunately, this change does not fix the TSC sync problems we've
been seeing on e.g. dv@'s and jmc@'s Ryzen 5 machines. Hopefully the
problem on those machines is buggy firmware and not another
architectural misunderstanding on my part.

Prompted by robert@. Problem diagnosed by brynet@. With input from
robert@, brynet@, and deraadt@. Tested by robert@, brynet@, dv@,
phessler@, and jmc@.

ok robert@ brynet@ sthen@