OpenBSD cvs log

created 2022-06-11T23:59:39Z
begin 2022-06-06T00:00:00Z
end 2022-06-07T00:00:00Z
path src/sys
commits 10

date 2022-06-06T03:58:19Z
author jsg
files src/sys/dev/pci/pcidevs log diff annotate
message drm/amdgpu: add beige goby PCI ID

From Alex Deucher
62e9bd20035b53ff6c679499c08546d96c6c60a7 in mainline linux

date 2022-06-06T03:58:20Z
author jsg
files src/sys/dev/pci/drm/amd/amdgpu/amdgpu_devlist.h log diff annotate
src/sys/dev/pci/drm/amd/amdgpu/amdgpu_drv.c log diff annotate
message drm/amdgpu: add beige goby PCI ID

From Alex Deucher
62e9bd20035b53ff6c679499c08546d96c6c60a7 in mainline linux

date 2022-06-06T03:59:38Z
author jsg
files src/sys/dev/pci/pcidevs.h log diff annotate
src/sys/dev/pci/pcidevs_data.h log diff annotate
message regen

date 2022-06-06T07:10:15Z
author jsg
files src/sys/dev/pci/drm/i915/intel_pm.c log diff annotate
message drm/i915: Fix -Wstringop-overflow warning in call to intel_read_wm_latency()

From Gustavo A. R. Silva
195fffbf8291a84580762ac6e3101489954d0216 in linux 5.15.y/5.15.45
336feb502a715909a8136eb6a62a83d7268a353b in mainline linux

date 2022-06-06T09:46:07Z
author kettenis
files src/sys/dev/fdt/xhci_fdt.c log diff annotate
message Add support for the XHCI function that is part of the Cadence USB3 DRD
controller. There are various incarnations of the controller. This diff
only adds support for the "V1"/"CDNS3" version as found on the StarFive
JH7100 SoC. Further changes may be needed to support controllers integrated
on other SoCs.

ok jsg@

date 2022-06-06T10:50:56Z
author kettenis
files src/sys/arch/riscv64/stand/efiboot/efiboot.c log diff annotate
message The StarFive JH7100 SoC has peripherals that only support 32-bit DMA
(in particular the dwmmc(4) and dwge(4) devices; there may be more).

ok jsg@

date 2022-06-06T14:34:11Z
author kettenis
files src/sys/arch/riscv64/dev/sfgpio.c log diff annotate
message Remove unused prototype.
Fix a whitespace issue.

date 2022-06-06T14:45:41Z
author claudio
files src/sys/kern/sys_socket.c log diff annotate
src/sys/kern/uipc_socket.c log diff annotate
src/sys/kern/uipc_socket2.c log diff annotate
src/sys/kern/uipc_syscalls.c log diff annotate
src/sys/kern/uipc_usrreq.c log diff annotate
src/sys/miscfs/fifofs/fifo_vnops.c log diff annotate
src/sys/net/if_pflow.c log diff annotate
src/sys/net/if_vxlan.c log diff annotate
src/sys/net/if_wg.c log diff annotate
src/sys/net/pfkeyv2.c log diff annotate
src/sys/net/rtsock.c log diff annotate
src/sys/netinet/in_pcb.c log diff annotate
src/sys/nfs/krpc_subr.c log diff annotate
src/sys/nfs/nfs_socket.c log diff annotate
src/sys/nfs/nfs_syscalls.c log diff annotate
src/sys/sys/socketvar.h log diff annotate
message Simplify solock() and sounlock(). There is no reason to return a value
for the lock operation and to pass a value to the unlock operation.
sofree() still needs an extra flag to know if sounlock() should be called
or not. But sofree() is called less often and mostly without keeping the lock.
OK mpi@ mvs@

date 2022-06-06T14:57:33Z
author kettenis
files src/sys/arch/riscv64/conf/files.riscv64 log diff annotate
src/sys/arch/riscv64/dev/stfclock.c log diff annotate
message Add stfclock(4), a driver for the clock controller found on the StarFive
JH7100 SoC.

ok jsg@

date 2022-06-06T14:58:19Z
author kettenis
files src/sys/arch/riscv64/conf/GENERIC log diff annotate
message Enable stfclock(4) and make xhci(4) attach to fdt.