| created | 2022-06-11T23:56:58Z |
|---|---|
| begin | 2022-06-05T00:00:00Z |
| end | 2022-06-06T00:00:00Z |
| path | src/sys |
| commits | 3 |
| date | 2022-06-05T02:43:44Z | |||
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| author | dlg | |||
| files | src/sys/dev/fdt/mvclock.c | log | diff | annotate |
| message |
add support for getting the frequency of the clocks mventa uses. mvneta does interrupt coalescing based on time as counted by these clocks, so being able to ask how fast they tick is useful. lots of help and ok kettenis@ |
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| date | 2022-06-05T02:49:30Z | |||
|---|---|---|---|---|
| author | dlg | |||
| files | src/sys/dev/ic/re.c | log | diff | annotate |
| message |
use the write lemtohXX functions for bits of the stats structure. unbreaks the build on bigendian archs. found by deraadt@ |
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| date | 2022-06-05T02:54:18Z | |||
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| author | dlg | |||
| files | src/sys/dev/fdt/if_mvneta.c | log | diff | annotate |
| message |
enable interrupt coalescing. mvneta only supports coalescing tx completions by count, so this uses the txmit value or half the ring as the threshold, whichever is lower. rx coalescing has a threshold on the number of packets, and a max time it will wait before interrupting. however, it also has a threshold for how many spare/empty descriptors there are on the ring too. we use this latter threshold to have the chip interrupt as soon as it uses the allocation that the rx ring moderation has granted, and then first two to otherwise rate limit rx to about 4k interrupts per second. ok patrick@ |
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