| created | 2022-01-08T21:29:48Z |
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| begin | 2022-01-05T00:00:00Z |
| end | 2022-01-06T00:00:00Z |
| path | src/sys |
| commits | 10 |
| date | 2022-01-05T03:32:44Z | |||
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| author | visa | |||
| files | src/sys/arch/riscv64/conf/GENERIC | log | diff | annotate |
| src/sys/arch/riscv64/conf/RAMDISK | log | diff | annotate | |
| src/sys/arch/riscv64/conf/files.riscv64 | log | diff | annotate | |
| src/sys/arch/riscv64/dev/mpfclock.c | log | diff | annotate | |
| message |
Add mpfclock(4), a driver for the PolarFire SoC MSS clock controller. OK kettenis@ |
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| date | 2022-01-05T03:53:26Z | |||
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| author | dlg | |||
| files | src/sys/dev/pci/if_msk.c | log | diff | annotate |
| message |
use the index provided by the txcompletion descriptor in txeof. this replaces the use of a register in txeof to figure out how much of the ring has been completed by the hardware. that register isn't reset when an interface is taken down and brought up again, which messes with the calculations of free slots on the ring, which in turn messes up the ability to transmit packets. this means the watchdog can't know where the hardware is up to anymore, so just restartthe chip if the watchdog fires. it seems to be important to start the tx ring in msk_init on the 0th ring entry that we use to reset the high address value to 0. we still fill the 0th descriptor, but we let the first msk_start call post it for us when a packet goes on the ring. a slight tweak and ok jmatthew@ |
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| date | 2022-01-05T05:18:24Z | |||
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| author | dlg | |||
| files | src/sys/dev/ic/bwfm.c | log | diff | annotate |
| src/sys/net/ethertypes.h | log | diff | annotate | |
| message |
rename ETHERTYPE_PAE to ETHERTYPE_EAPOL. everyone else seems to use ETHERTYPE_EAPOL, and as a bonus it also appears to be more correct. ok deraadt@ stsp@ |
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| date | 2022-01-05T05:18:25Z | |||
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| author | dlg | |||
| files | src/sys/net80211/ieee80211_input.c | log | diff | annotate |
| src/sys/net80211/ieee80211_output.c | log | diff | annotate | |
| src/sys/net80211/ieee80211_pae_output.c | log | diff | annotate | |
| message |
rename ETHERTYPE_PAE to ETHERTYPE_EAPOL. everyone else seems to use ETHERTYPE_EAPOL, and as a bonus it also appears to be more correct. ok deraadt@ stsp@ |
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| date | 2022-01-05T05:19:22Z | |||
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| author | dlg | |||
| files | src/sys/net/ethertypes.h | log | diff | annotate |
| message |
add NSH and NHRP ethertypes, mostly for tcpdump stuff. ok deraadt@ |
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| date | 2022-01-05T16:33:42Z | |||
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| author | stsp | |||
| files | src/sys/dev/pci/if_iwx.c | log | diff | annotate |
| message |
In iwx(4), fix wrong pointer assignment in iwx_bar_frame_release(). This bug caused the driver to read block ack request information sent by firmware from the wrong offset. The driver flushes buffered frames and moves its Rx block ack window based on this information. Possible consequences of this bug are packet loss or even stalled traffic if the Rx BA window gets out of sync between driver and firmware. Though this effect might get cancelled out when the driver re-syncs the BA window in its regular Rx code path. Spotted by Christian Ehrhardt. |
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| date | 2022-01-05T16:46:11Z | |||
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| author | deraadt | |||
| files | src/sys/dev/pci/pci.c | log | diff | annotate |
| message |
Compensate for i386 pcitag_t union ok jsg kettenis |
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| date | 2022-01-05T17:06:20Z | |||
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| author | stsp | |||
| files | src/sys/dev/pci/if_iwm.c | log | diff | annotate |
| src/sys/dev/pci/if_iwx.c | log | diff | annotate | |
| message |
Remove unused function arguments in iwm/iwx interrupt handlers. pointed out by + ok millert@ |
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| date | 2022-01-05T17:53:44Z | |||
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| author | guenther | |||
| files | src/sys/uvm/uvm_mmap.c | log | diff | annotate |
| message |
Remove kbind(2)'s restriction that a target buffer not cross page boundaries: hppa has 8-byte PLT entries that sometimes do that. ok kettenis@ |
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| date | 2022-01-05T18:54:20Z | |||
|---|---|---|---|---|
| author | kettenis | |||
| files | src/sys/dev/pci/ppb.c | log | diff | annotate |
| message |
Use "bus-range" property to initialize the bus number configuration of the bridge when present on FDT platforms. Needed on platforms like the Apple M1 to make sure the PCI bus numbers match the IOMMU setup required by the device tree. ok patrick@ |
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