| created | 2021-09-19T09:33:23Z |
|---|---|
| begin | 2021-09-01T09:29:31Z |
| end | 2021-09-01T09:50:21Z |
| path | src/sys |
| commits | 1 |
| date | 2021-09-01T09:50:21Z | |||
|---|---|---|---|---|
| author | bluhm | |||
| files | src/sys/arch/amd64/include/asm.h | log | diff | annotate |
| message |
Older AMD CPUs that do not support IBRS need an lfence after ret to stop speculation. This seems to be necessary when the branch predictor hits the ret for the first time. In their white paper to mitigate speculation attacks, AMD's retpoline example has an explicit lfence. Adjust our retpoline assembly macro in the kernel. OK guenther@ mortimer@ deraadt@ |
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