| created | 2021-06-27T04:12:42Z |
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| begin | 2021-06-25T00:00:00Z |
| end | 2021-06-26T00:00:00Z |
| path | src/sys |
| commits | 12 |
| date | 2021-06-25T12:40:29Z | |||
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| author | patrick | |||
| files | src/sys/arch/arm64/dev/smmu.c | log | diff | annotate |
| src/sys/arch/arm64/dev/smmuvar.h | log | diff | annotate | |
| message |
Save quite a bit of space by removing the existence of PTEDs. The dynamics of SMMU are a bit different to regular MMU usage, as we do not need P->V lists or ref/mod emulation (with page access upgrade). While in the future we might want to save cacheability modes, it is not necessary right now. Our PTED construct, which holds that kind of information, is not needed. With these gone, we save around 93% of smmu(4)'s previous memory overhead. Discussed with drahn@ kettenis@ |
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| date | 2021-06-25T13:25:53Z | |||
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| author | jsg | |||
| files | src/sys/arch/riscv64/include/atomic.h | log | diff | annotate |
| message |
use weaker fences for riscv64 membar Fences are described in 'RISC-V Unprivileged ISA' syntax is 'fence predecessor,successor'. "Any combination of device input (I), device output (O), memory reads (R), and memory writes (W) may be ordered with respect to any combination of the same." Previously "fence" was used for membar_* which is short for "fence iorw,iorw". Change this to more specific fences based on the text in membar_sync(9) with store -> w, load -> r. build test by and ok kettenis@ |
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| date | 2021-06-25T13:29:40Z | |||
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| author | visa | |||
| files | src/sys/dev/fdt/if_cad.c | log | diff | annotate |
| message | Remove an unused struct. | |||
| date | 2021-06-25T13:41:09Z | |||
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| author | jsg | |||
| files | src/sys/dev/pci/drm/include/linux/atomic.h | log | diff | annotate |
| message |
add linux style memory barriers for risc-v to drm based on linux operation to rvwmo mapping table in the rvwmo appendix of the risc-v unprivileged isa spec ok kettenis@ |
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| date | 2021-06-25T17:41:22Z | |||
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| author | patrick | |||
| files | src/sys/arch/arm64/dev/acpiiort.c | log | diff | annotate |
| src/sys/arch/arm64/dev/acpiiort.h | log | diff | annotate | |
| src/sys/arch/arm64/dev/acpipci.c | log | diff | annotate | |
| src/sys/arch/arm64/dev/apldart.c | log | diff | annotate | |
| src/sys/arch/arm64/dev/smmu.c | log | diff | annotate | |
| src/sys/arch/arm64/dev/smmu_acpi.c | log | diff | annotate | |
| src/sys/arch/arm64/dev/smmu_fdt.c | log | diff | annotate | |
| src/sys/arch/arm64/dev/smmuvar.h | log | diff | annotate | |
| src/sys/dev/fdt/dwpcie.c | log | diff | annotate | |
| src/sys/dev/fdt/pciecam.c | log | diff | annotate | |
| src/sys/dev/ofw/ofw_misc.c | log | diff | annotate | |
| src/sys/dev/ofw/ofw_misc.h | log | diff | annotate | |
| message |
While it seems like we can choose any I/O virtual address for peripheral devices, this isn't really the case. It depends on the bus topology of how devices are connected. In the case of PCIe, devices are assigned addresses (in PCI BARs) from the PCI address spaces. Now if we take an address from one of these address spaces for our IOVA, transfers from from a PCI device to that address will terminate inside of the PCI bus. This is because from the PCI buses' point-of-view, the address we chose is part of its address space. To make sure we don't allocate addresses from there, reserve the PCI addresses in the IOVA. Note that smmu(4) currently gives each device its own IOVA. So the PCI addresses will be reserved only in IOVA from PCI devices, and only the addresses concerning the PCI bus it is connected to will be reserved. All other devices behind an smmu(4) will not have any changes to their IOVA. ok kettenis@ |
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| date | 2021-06-25T17:49:49Z | |||
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| author | krw | |||
| files | src/sys/arch/riscv64/stand/efiboot/efiboot.c | log | diff | annotate |
| src/sys/arch/riscv64/stand/efiboot/efidev.c | log | diff | annotate | |
| src/sys/arch/riscv64/stand/efiboot/efipxe.c | log | diff | annotate | |
| src/sys/arch/riscv64/stand/efiboot/efirng.c | log | diff | annotate | |
| message |
1) Finish eliminating all uses of EFI_CALL() used in the tree, allowing for the removal of eficall.h files. 2) Allow booting from 4k-byte sector devices. 3) Don't leak memory after successfull i/o. The end result is that riscv64 efidev.c and efipxe.c are identical to the arm64/armv7 versions, efirng.c is identical to the amd64/arm64 versions and efiboot.c has only the arm64 -> riscv64 changes. ok kettenis@ |
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| date | 2021-06-25T18:55:26Z | |||
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| author | kettenis | |||
| files | src/sys/dev/fdt/dwpcie.c | log | diff | annotate |
| message |
Make sure we translate prefetchable mmio space as well. From Mickael Torres. |
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| date | 2021-06-25T19:22:51Z | |||
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| author | matthieu | |||
| files | src/sys/arch/riscv64/include/limits.h | log | diff | annotate |
| message | add SIZE_MAX. ok kettenis@ | |||
| date | 2021-06-25T19:27:40Z | |||
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| author | matthieu | |||
| files | src/sys/arch/riscv64/conf/GENERIC | log | diff | annotate |
| src/sys/arch/riscv64/conf/Makefile.riscv64 | log | diff | annotate | |
| src/sys/arch/riscv64/conf/files.riscv64 | log | diff | annotate | |
| src/sys/arch/riscv64/riscv64/conf.c | log | diff | annotate | |
| src/sys/dev/pci/drm/ttm/ttm_bo_util.c | log | diff | annotate | |
| src/sys/uvm/uvm_device.c | log | diff | annotate | |
| src/sys/uvm/uvm_pdaemon.c | log | diff | annotate | |
| message |
basic radeondrm / X support for riscv64. Ok kettenis@ - add wscons devices - build radeondrm and add MD uvm bits to support it. |
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| date | 2021-06-25T19:55:22Z | |||
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| author | patrick | |||
| files | src/sys/arch/arm64/dev/smmu.c | log | diff | annotate |
| message |
Clean up and remove debug prints, and add a few more relevant prints for when things go wrong. |
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| date | 2021-06-25T20:40:23Z | |||
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| author | krw | |||
| files | src/sys/arch/amd64/stand/efiboot/Attic/eficall.h | log | diff | annotate |
| src/sys/arch/arm64/stand/efiboot/Attic/eficall.h | log | diff | annotate | |
| src/sys/arch/armv7/stand/efiboot/Attic/eficall.h | log | diff | annotate | |
| src/sys/arch/riscv64/stand/efiboot/Attic/eficall.h | log | diff | annotate | |
| message | Move unused eficall.h files to the Attic. | |||
| date | 2021-06-25T23:48:30Z | |||
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| author | dlg | |||
| files | src/sys/net/if_pfsync.c | log | diff | annotate |
| message |
let pfsync_request_update actually retry when it overfills a packet. a continue in the middle of a do { } while (0) loop is effectively a break, it doesnt restart the loop. without the retry, the code leaked update messages which in turn made pool_destroy in pfsync destroy trip over a kassert cos items were still out. found by and fix tested by hrvoje popovski ok sashan@ |
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