| created | 2021-06-20T20:19:51Z |
|---|---|
| begin | 2021-06-18T15:59:14Z |
| end | 2021-06-18T21:05:16Z |
| path | src/sys |
| commits | 1 |
| date | 2021-06-18T21:05:16Z | |||
|---|---|---|---|---|
| author | kettenis | |||
| files | src/sys/arch/riscv64/riscv64/trap.c | log | diff | annotate |
| message |
Need to enable interrupts while processing supervisor traps as well. yikes deraadt@, ok mlarkin@ |
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