| created | 2021-06-20T06:11:13Z |
|---|---|
| begin | 2021-06-18T00:00:00Z |
| end | 2021-06-19T00:00:00Z |
| path | src/sys |
| commits | 8 |
| date | 2021-06-18T06:17:28Z | |||
|---|---|---|---|---|
| author | guenther | |||
| files | src/sys/arch/amd64/amd64/genassym.cf | log | diff | annotate |
| src/sys/arch/amd64/amd64/locore.S | log | diff | annotate | |
| src/sys/arch/amd64/amd64/pmap.c | log | diff | annotate | |
| src/sys/arch/amd64/include/cpu.h | log | diff | annotate | |
| src/sys/arch/amd64/include/pmap.h | log | diff | annotate | |
| message |
The pmap needs to know which CPUs to send IPIs when TLB entries need to be invalidated. Instead of keeping a bitset of CPUs in each pmap, have each cpu_info track which pmap it has loaded: replace pmap->pm_cpus with cpu_info->ci_proc_pmap. This reduces the atomic operations (and cache thrashing) and simplifies cpu_switchto() Also, fix a defect in cpu_switchto()'s "am I loading the same cr3?" test: ignore the CR3_REUSE_PCID bit when checking that. This makes switching between kernel threads slightly less costly. over a week in snaps with no complaints looks ok to mlarkin@ kettenis@ mpi@ |
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| date | 2021-06-18T06:53:42Z | |||
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| author | jsg | |||
| files | src/sys/dev/pci/if_bge.c | log | diff | annotate |
| src/sys/dev/pci/if_bgereg.h | log | diff | annotate | |
| message |
recognise BCM5762 B0 from Brad |
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| date | 2021-06-18T12:12:22Z | |||
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| author | kettenis | |||
| files | src/sys/dev/fdt/dwpcie.c | log | diff | annotate |
| message |
Enable 32-bit I/O addressing. This gets rid of the io address conflict messages on the HiFive Unmatched. ok patrick@ |
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| date | 2021-06-18T15:34:21Z | |||
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| author | bluhm | |||
| files | src/sys/netinet/ip_ah.c | log | diff | annotate |
| src/sys/netinet/ip_esp.c | log | diff | annotate | |
| src/sys/netinet/ip_ipcomp.c | log | diff | annotate | |
| src/sys/netinet/ipsec_input.c | log | diff | annotate | |
| src/sys/netinet/ipsec_output.c | log | diff | annotate | |
| message |
The crypto(9) framework used by IPsec runs on a kernel task that is protected by kernel lock. There were crashes in swcr_authenc() when it was accessing swcr_sessions. As a quick fix, protect all calls from network stack to crypto with kernel lock. This also covers the rekeying case that is called from pfkey via tdb_init(). OK mvs@ |
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| date | 2021-06-18T15:59:14Z | |||
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| author | cheloha | |||
| files | src/sys/kern/kern_time.c | log | diff | annotate |
| message |
setitimer(2): increase timer limit to UINT_MAX seconds Currently setitimer(2) rejects timers larger than 100 million seconds and sets EINVAL. With the change to kclock timeouts there is no longer any reason to use this arbitrary value. Kclock timeouts support the full range of a timespec, so we can increase the upper bound without practical risk of arithmetic overflow. If we push the limit to UINT_MAX we can support the full input range of alarm(3). We can then simplify the alarm.3 manpage in a separate patch. We can push the limit even higher in the future if we find software that doesn't like the UINT_MAX limit. Until then, UINT_MAX seconds (over 68 years) is plenty for all practical timers. ok claudio@ |
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| date | 2021-06-18T21:05:16Z | |||
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| author | kettenis | |||
| files | src/sys/arch/riscv64/riscv64/trap.c | log | diff | annotate |
| message |
Need to enable interrupts while processing supervisor traps as well. yikes deraadt@, ok mlarkin@ |
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| date | 2021-06-18T21:52:47Z | |||
|---|---|---|---|---|
| author | kettenis | |||
| files | src/sys/arch/riscv64/riscv64/machdep.c | log | diff | annotate |
| message |
When we do a context switch, always set the FPU to "off" for the old proc. Disable the optimization to mark the new proc "clean" since it causes random failures in regress. Hopefully we can revisit this soon. ok drahn@ |
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| date | 2021-06-18T22:44:21Z | |||
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| author | mlarkin | |||
| files | src/sys/arch/riscv64/conf/GENERIC | log | diff | annotate |
| message |
Enable oce(4) for riscv64 "free commit" kettenis@ |
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