OpenBSD cvs log

created 2021-06-19T22:50:51Z
begin 2021-06-14T00:00:00Z
end 2021-06-15T00:00:00Z
path src/sys
commits 9

date 2021-06-14T03:04:02Z
author drahn
files src/sys/arch/riscv64/conf/GENERIC log diff annotate
src/sys/arch/riscv64/conf/RAMDISK log diff annotate
src/sys/arch/riscv64/conf/files.riscv64 log diff annotate
message enable nvme, a few pci devices and a bunch of usb stuff.
will cleanup later, enabling additional systems.

date 2021-06-14T03:48:41Z
author deraadt
files src/sys/arch/riscv64/include/pci_machdep.h log diff annotate
message add PCITAG_NODE and PCITAG_OFFSET
ok drahn

date 2021-06-14T03:50:23Z
author deraadt
files src/sys/arch/riscv64/conf/GENERIC log diff annotate
src/sys/arch/riscv64/conf/RAMDISK log diff annotate
src/sys/arch/riscv64/conf/files.riscv64 log diff annotate
message Add a few more drivers that people might need.
ok drahn

date 2021-06-14T06:03:50Z
author jsg
files src/sys/arch/riscv64/conf/GENERIC log diff annotate
src/sys/arch/riscv64/conf/RAMDISK log diff annotate
message fix whitespace

date 2021-06-14T06:09:28Z
author jsg
files src/sys/arch/riscv64/conf/GENERIC log diff annotate
src/sys/arch/riscv64/conf/RAMDISK log diff annotate
message add a few more phys known to attach to usb ethernet

date 2021-06-14T06:10:44Z
author matthieu
files src/sys/arch/macppc/macppc/cpu.c log diff annotate
message reset ppc_altivec if 'option ALTIVEC' is not present.

This makes sysctl machdep.altivec return 0 in this case, allowing
applications to select the non-altivec code path.
Issue with pixman reported by cwen@ ok jca@ gkoehler@ deraadt@

date 2021-06-14T08:19:39Z
author kettenis
files src/sys/arch/riscv64/include/pci_machdep.h log diff annotate
message Use uint64_t instead of u_long for pcitag_t.

date 2021-06-14T12:06:06Z
author kettenis
files src/sys/dev/fdt/amliic.c log diff annotate
message Remove unused prototypes.

date 2021-06-14T20:54:04Z
author kettenis
files src/sys/dev/fdt/dwpcie.c log diff annotate
message Simplify the way we handle PCI configuration space access. Instead of
splitting the configuration space access window in a part for type 0 and
a part for type 1 commands, use a single window. The code already flips
between type 0 and type 1 so there is no benefit in having this complication.

Fixes the PCIe host bridge on the SiFive FU740 SoC.

ok drahn@, patrick@