OpenBSD cvs log

created 2021-05-16T07:35:01Z
begin 2021-05-09T00:00:00Z
end 2021-05-10T00:00:00Z
path src/sys
commits 5

date 2021-05-09T06:34:21Z
author jsg
files src/sys/arch/riscv64/riscv64/trap.c log diff annotate
message fix indentation

date 2021-05-09T06:40:59Z
author jsg
files src/sys/arch/riscv64/riscv64/fpu.c log diff annotate
message return type on a different line and use (void) instead of ()

date 2021-05-09T15:51:35Z
author kettenis
files src/sys/dev/acpi/acpi.c log diff annotate
message Some x86 machines advertise the "hardware reduced" ACPI feature, advertise
S4 and S5 support, but fail to populate the SLEEP_CONTROL_REG and
SLEEP_STATUS_REG descriptions in the FADT. An example of such a machine
is the ASUS Zenbook 14 UM433DA. Any attempt to powerdown the machine
will result in a kernel crash. It turns out that using the legacy ACPI PM
registers works fine on this machien. So fall back on those registers
if SLEEP_CONTROL_REG and/or SLEEP_STATUS_REG aren't provided.

ok deraadt@, mpi@

date 2021-05-09T21:26:06Z
author drahn
files src/sys/arch/riscv64/include/setjmp.h log diff annotate
message Change offsets to (N * 8) to reduce chance of register clobber and mistakes.
Simplify integer loading, use 'li <dest>, <value>' instead of x0/zero register
Adjust _JB_SIGMASK to not collide with saved registers.

date 2021-05-09T23:22:25Z
author jsg
files src/sys/arch/riscv64/include/cpu.h log diff annotate
src/sys/arch/riscv64/riscv64/fpu.c log diff annotate
src/sys/arch/riscv64/riscv64/trap.c log diff annotate
message fpu_valid_opcode() did not correctly handle 16 bit fp instructions
such as an stval of 0xaa22. The RISC-V Instruction Set Manual states
that setting stval to a non-zero value with the instruction on illegal
instruction exception is an optional feature so instead of changing
fpu_valid_opcode() remove it entirely.

ok deraadt@ kettenis@ drahn@