| created | 2021-01-06T09:47:49Z |
|---|---|
| begin | 2020-12-22T00:00:00Z |
| end | 2020-12-22T03:42:03Z |
| path | src/sys |
| commits | 1 |
| date | 2020-12-22T03:42:03Z | |||
|---|---|---|---|---|
| author | jsg | |||
| files | src/sys/arch/amd64/amd64/cacheinfo.c | log | diff | annotate |
| src/sys/arch/amd64/include/cacheinfo.h | log | diff | annotate | |
| message |
stop showing amd l3 cache information >= zen 2 based amd processors return a value of 9 for l3 cache assoc via cpuid 0x80000006. As that is a reserved value we end up incorrectly claiming the l3 cache is disabled. While it is possible to get l3 cache information via cpuid 0x8000001d when TOPEXT is advertised that will instead give information about the l3 cache available to the core complex (CCX) that the cpu belongs to where previously the amount of l3 available to all core complexes was shown. As we don't detail topology in dmesg or show the mapping of cores to core complexes just stop displaying l3 information. It already isn't shown on intel. ok gkoehler@ |
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