| created | 2020-11-07T23:40:44Z |
|---|---|
| begin | 2020-11-03T00:00:00Z |
| end | 2020-11-04T00:00:00Z |
| path | src/sys |
| commits | 7 |
| date | 2020-11-03T02:45:20Z | |||
|---|---|---|---|---|
| author | guenther | |||
| files | src/sys/arch/amd64/amd64/vector.S | log | diff | annotate |
| message | Correct comment typo in previous | |||
| date | 2020-11-03T04:47:01Z | |||
|---|---|---|---|---|
| author | dlg | |||
| files | src/sys/net/if_gre.c | log | diff | annotate |
| message |
replace the nvgre node when the endpoint ip changes. this helps nvgre follow things like carp masters changing on the inside of the virtual network. "makes sense" jmatthew@ |
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| date | 2020-11-03T18:19:31Z | |||
|---|---|---|---|---|
| author | guenther | |||
| files | src/sys/arch/amd64/amd64/locore.S | log | diff | annotate |
| message |
Give sizes to more of the functions in locore.S ok mpi@ |
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| date | 2020-11-03T21:46:14Z | |||
|---|---|---|---|---|
| author | patrick | |||
| files | src/sys/dev/fdt/if_mvpp.c | log | diff | annotate |
| src/sys/dev/fdt/if_mvppreg.h | log | diff | annotate | |
| message | Disable HW PHY polling. It's enabled by default. | |||
| date | 2020-11-03T21:49:41Z | |||
|---|---|---|---|---|
| author | patrick | |||
| files | src/sys/dev/mii/eephy.c | log | diff | annotate |
| message |
The Marvell 88E1512 supports multiple modes between MAC to PHY and PHY to Media. The mode can be configured in the General Control Register 1. On the 88E1512 and 88E1514 this mode defaults to 111 (invalid). Thus we need to change the mode if we want SGMII-to-Copper. For this, allow the interface to pass an SGMII flag, indicating that the interface between MAC and PHY is SGMII. ok kettenis@ |
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| date | 2020-11-03T21:49:42Z | |||
|---|---|---|---|---|
| author | patrick | |||
| files | src/sys/dev/mii/eephyreg.h | log | diff | annotate |
| src/sys/dev/mii/miivar.h | log | diff | annotate | |
| message |
The Marvell 88E1512 supports multiple modes between MAC to PHY and PHY to Media. The mode can be configured in the General Control Register 1. On the 88E1512 and 88E1514 this mode defaults to 111 (invalid). Thus we need to change the mode if we want SGMII-to-Copper. For this, allow the interface to pass an SGMII flag, indicating that the interface between MAC and PHY is SGMII. ok kettenis@ |
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| date | 2020-11-03T21:50:54Z | |||
|---|---|---|---|---|
| author | patrick | |||
| files | src/sys/dev/fdt/if_mvpp.c | log | diff | annotate |
| message |
Have mvpp(4) pass MII flags depending on the phy mode specified in the device tee. This allows my ClearFog GT 8K to get the 1G link up. ok kettenis@ |
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