| created | 2020-09-06T07:49:33Z |
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| begin | 2020-08-30T00:00:00Z |
| end | 2020-08-31T00:00:00Z |
| path | src/sys |
| commits | 9 |
| date | 2020-08-30T05:23:49Z | |||
|---|---|---|---|---|
| author | uaa | |||
| files | src/sys/dev/fdt/sxiccmu.c | log | diff | annotate |
| message |
PLL1(CPU_PLL) stability improvement for Allwinner H3/H2+ Due to unstable of PLL1, sometimes the system has hanged up especially at boot. This is observed at Allwinner H3/H2+ processor. To solve the problem, PLL1 setting procedure is same as Linux. 1. change clock source to 24MHz 2. wait 1usec (new) 3. disable PLL1 (new) 4. set new NKMP value, but M should be 1 5. re-enable PLL1 (new) 6. wait PLL1 stable (modified) 7. change clock source to PLL1 8. wait 1usec (new) Once disable PLL1 before setting NKMP is very important. And, sometimes LOCK flag is set even if PLL has not locked yet so wait for PLL is modified with simple delay() by the value of PLL_STABLE_TIME_REG1 register. Not only Allwinner H3/H2+ but also all (i.e. A64) Allwinner processors datasheet has "If the clock source is changed, at most to wait for 8 present running clock cycles." sentence at CPU clock source selection field of CPU/AXI configuration register. But this is ambiguous that _who_ should do _what_ during that cycles. It is unclear that changing clock source itself invoke PLL1 unstability. For safety, added 1usec wait after changing clock source like Linux. ok by kettenis@, thanks to adr at sdf dot org |
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| date | 2020-08-30T10:36:33Z | |||
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| author | jsg | |||
| files | src/sys/dev/pv/if_hvn.c | log | diff | annotate |
| message |
avoid a invalid pointer deref in hvn_stop() intr_barrier() now uses the argument so directly call sched_barrier(NULL) which is what intr_barrier() used to do until recently. problem reported by and fix tested by Andre Stoebe |
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| date | 2020-08-30T13:18:10Z | |||
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| author | anton | |||
| files | src/sys/dev/kcov.c | log | diff | annotate |
| message | use unique wait messages with msleep_nsec() | |||
| date | 2020-08-30T13:19:44Z | |||
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| author | anton | |||
| files | src/sys/dev/kcov.c | log | diff | annotate |
| message | add missing wakeup for the unlikely dying case | |||
| date | 2020-08-30T18:55:04Z | |||
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| author | kettenis | |||
| files | src/sys/arch/powerpc64/powerpc64/pmap.c | log | diff | annotate |
| message |
Lock all kernel PTE entries into the page tables, even "managed" ones entered by pmap_enter(9). Otherwise kernel stack pages get evicted and that doesn't end well. We probably only need to lock in wired pages and I will probably revisit this at some later stage. tested by deraadt@ |
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| date | 2020-08-30T19:07:00Z | |||
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| author | kettenis | |||
| files | src/sys/arch/powerpc64/dev/xive.c | log | diff | annotate |
| message |
Reorganize the interrupt handler code to avoid a potential bogus KASSERT, handle the priority levels better and guarantee ordering of restoring the priority level after running an interrupt handler and checking for a new interrupt. |
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| date | 2020-08-30T19:41:25Z | |||
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| author | krw | |||
| files | src/sys/scsi/scsi_base.c | log | diff | annotate |
| src/sys/scsi/scsiconf.h | log | diff | annotate | |
| message |
Compactify SDEV_/ADEV_ flags & quirks to eliminate the gaps in bit use and thus allow shrinking the names arrays. |
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| date | 2020-08-30T19:45:20Z | |||
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| author | mvs | |||
| files | src/sys/net/if_pppx.c | log | diff | annotate |
| src/sys/net/pipex.c | log | diff | annotate | |
| message |
pppac(4) uses per cpu counters for collect `ifnet' statistics, but in pipex(4) layer this `ifnet' still uses `if_data'. Also pppx(4) doesn't use per cpu counters but `if_data'. Add per cpu counters to pppx(4) and pipex(4). This finishes interface statistics collecting mess. ok yasuoka@ |
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| date | 2020-08-30T19:48:16Z | |||
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| author | mvs | |||
| files | src/sys/net/if_pppx.c | log | diff | annotate |
| src/sys/net/pipex.c | log | diff | annotate | |
| message |
Don't include "net/netisr.h" header. It's not needed here. ok yasuoka@ |
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