OpenBSD cvs log

created 2020-08-30T08:34:16Z
begin 2020-08-23T00:00:00Z
end 2020-08-24T00:00:00Z
path src/sys
commits 15

date 2020-08-23T01:12:04Z
author gnezdo
files src/sys/arch/i386/i386/machdep.c log diff annotate
message Use sysctl_bounded_args for simple cases in cpu_sysctl on i386

OK kn

date 2020-08-23T07:05:29Z
author mpi
files src/sys/sys/event.h log diff annotate
message Allow userland to use EVFILT_EXCEPT.

ok mvs@, visa@

date 2020-08-23T09:35:32Z
author kn
files src/sys/kern/kern_sysctl.c log diff annotate
src/sys/kern/vfs_subr.c log diff annotate
src/sys/kern/vfs_syscalls.c log diff annotate
src/sys/sys/sysctl.h log diff annotate
message Remove unused debug_syncprt, improve debug sysctl handling

"syncprt" is unused since kern/vfs_syscalls.c r1.147 from 2008.

Adding new debug sysctls is a bit opaque and looking at kern/kern_sysctl.c
the only visible difference between used and stub ctldebug structs in the
debugvars[] array is their extern keyword, indicating that it is defined
elsewhere.

sys/sysctl.h declares all debugN members as extern upfront, but these
declarations are not needed.

Remove the unused debug sysctl, rename the only remaining one to something
meaningful and remove forward declarations from /sys/sysctl.h; this way,
adding new debug sysctls is a matter of adding extern and coming up with a
name, which is nicer to read on its own and better to grep for.

OK mpi

date 2020-08-23T10:07:51Z
author kettenis
files src/sys/arch/powerpc64/include/cpu.h log diff annotate
src/sys/arch/powerpc64/include/cpufunc.h log diff annotate
src/sys/arch/powerpc64/powerpc64/cpu.c log diff annotate
src/sys/arch/powerpc64/powerpc64/machdep.c log diff annotate
src/sys/arch/powerpc64/powerpc64/pmap.c log diff annotate
message Add support for POWER8 (and maybe earlier) CPUs. Not sure if this works on
real hardware, but it gets the kernel booting on QEMU emulating a POWER8
CPU so it's a step in the right direction.

This establishes a way to distinguish CPU features based on the AT_HWCAP
and AT_HWCAP2 features documented in the ELF ABI. Also use this to
determine the availability of the DARN instruction instead of keying of
the processor model.

date 2020-08-23T10:11:17Z
author kettenis
files src/sys/arch/powerpc64/dev/phb.c log diff annotate
message Attempt to support IODA2 bridges such as the one found on POWER8 chips.
These lack an "ibm,opal-available-m64-ranges" property, but it seems
we can assume a 0-15 range. At least this is what Linux does.

date 2020-08-23T11:08:02Z
author mglocker
files src/sys/dev/usb/uhidev.c log diff annotate
src/sys/dev/usb/ukbd.c log diff annotate
src/sys/dev/usb/ums.c log diff annotate
src/sys/dev/usb/umstc.c log diff annotate
src/sys/dev/usb/umt.c log diff annotate
src/sys/dev/usb/utpms.c log diff annotate
src/sys/dev/usb/uwacom.c log diff annotate
message uhidev(4) does apply the SET_IDLE request to all its child drivers
today. This doesn't seem to be right, since SET_IDLE limits the
reporting frequency for interrupt IN endpoints, normally only required
on keyboard and mouse-like input devices. We noticed recently that
other device types, like e.g. the Cyrus soundKey uaudio(4), will stall
after the SET_IDLE request has been issued.

Therefore we move the SET_IDLE request only to the uhidev(4) child
drivers which seem to require this request. Those we have identified
to be; ukbd(4), ums(4), umstc(4), umt(4), utpms(4), and uwacom(4).

Suggested and ok mpi@

date 2020-08-23T12:48:53Z
author kettenis
files src/sys/arch/powerpc64/dev/xive.c log diff annotate
message Add missing conversion from IPL to CPU priority.

date 2020-08-23T13:46:15Z
author kettenis
files src/sys/arch/powerpc64/include/opal.h log diff annotate
src/sys/arch/powerpc64/powerpc64/locore.S log diff annotate
message Add OPAL_SET_XIVE and OPAL_GET_XIVE.

date 2020-08-23T13:50:34Z
author kettenis
files src/sys/arch/powerpc64/include/intr.h log diff annotate
src/sys/arch/powerpc64/powerpc64/intr.c log diff annotate
src/sys/arch/powerpc64/powerpc64/trap.c log diff annotate
message Add support for "normal" external interrupts. Needed for running on POWER8
and earlier CPUs.

date 2020-08-23T14:44:54Z
author jsg
files src/sys/dev/pci/drm/drm_dp_mst_topology.c log diff annotate
message fix unused variable warning gcc4 complains about

found the hard way by deraadt@

date 2020-08-23T19:18:42Z
author kettenis
files src/sys/arch/powerpc64/conf/GENERIC log diff annotate
src/sys/arch/powerpc64/conf/files.powerpc64 log diff annotate
src/sys/arch/powerpc64/dev/xicp.c log diff annotate
message Add xicp(4), a driver for the interrupt control presenter hardware found
on POWER8 CPUs.

date 2020-08-23T19:24:22Z
author kettenis
files src/sys/dev/pci/pcidevs log diff annotate
message Add IBM POWER8 host bridge.

date 2020-08-23T19:25:20Z
author kettenis
files src/sys/dev/pci/pcidevs.h log diff annotate
src/sys/dev/pci/pcidevs_data.h log diff annotate
message regen

date 2020-08-23T21:38:47Z
author cheloha
files src/sys/arch/amd64/amd64/tsc.c log diff annotate
message amd64: TSC timecounter: prefix RDTSC with LFENCE

Regarding RDTSC, the Intel ISA reference says (Vol 2B. 4-545):

> The RDTSC instruction is not a serializing instruction.
>
> It does not necessarily wait until all previous instructions
> have been executed before reading the counter.
>
> Similarly, subsequent instructions may begin execution before the
> read operation is performed.
>
> If software requires RDTSC to be executed only after all previous
> instructions have completed locally, it can either use RDTSCP (if
> the processor supports that instruction) or execute the sequence
> LFENCE;RDTSC.

To mitigate this problem, Linux and DragonFly use LFENCE. FreeBSD and
NetBSD take a more complex route: they selectively use MFENCE, LFENCE,
or CPUID depending on whether the CPU is AMD, Intel, VIA or something
else.

Let's start with just LFENCE. We only use the TSC as a timecounter on
SSE2 systems so there is no need to conditionally compile the LFENCE.
We can explore conditionally using MFENCE later.

Microbenchmarking on my machine (Core i7-8650) suggests a penalty of
about 7-10% over a "naked" RDTSC. This is acceptable. It's a bit of
a moot point though: the alternative is a considerably weaker
monotonicity guarantee when comparing timestamps between threads,
which is not acceptable.

It's worth noting that kernel timecounting is not *exactly* like
userspace timecounting. However, they are similar enough that we can
use userspace benchmarks to make conjectures about possible impacts on
kernel performance.

Concerns about kernel performance, in particular the network stack,
were the blocking issue for this patch. Regarding networking
performance, claudio@ says a 10% slower nanotime(9) or nanouptime(9)
is acceptable and that shaving off "tens of cycles" is a
micro-optimization. There are bigger optimizations to chase down
before such a difference would matter.

There is additional work to be done here. We could experiment with
conditionally using MFENCE. Also, the userspace TSC timecounter
doesn't have access to the adjustment skews available to the kernel
timecounter. pirofti@ has suggested a scheme involving RDTSCP and an
array of skews mapped into user memory. deraadt@ has suggested a
scheme where the skew would be kept in the TCB. However it is done,
access to the skews will improve monotonicity, which remains a problem
with the TSC.

First proposed by kettenis@ and pirofti@. With input from pirofti@,
deraadt@, guenther@, naddy@, kettenis@, and claudio@. Based on
similar changes in Linux, FreeBSD, NetBSD, and DragonFlyBSD.

ok deraadt@ pirofti@ kettenis@ naddy@ claudio@

date 2020-08-23T21:48:08Z
author kettenis
files src/sys/arch/powerpc64/conf/RAMDISK log diff annotate
message Enable xicp(4).