OpenBSD cvs log

created 2020-05-02T17:46:21Z
begin 2020-04-26T00:00:00Z
end 2020-04-27T00:00:00Z
path src/sys
commits 10

date 2020-04-26T10:35:05Z
author kettenis
files src/sys/arch/arm64/arm64/intr.c log diff annotate
src/sys/arch/arm64/arm64/machdep.c log diff annotate
message Sanitize inittodr()/resettodr() implementation.
- move implementations next to eachother in the same file
- remove pointless call to resettodr() in inittodr()
- use OpenBSD define to get a minimum plausible time
- if RTC time is before minimum plausible time, reject it
- don't print "clock gained N days" on ramdisk

Hopefully this implementation can serve as a model for unification
into an MI implementation.

ok mpi@

date 2020-04-26T11:17:56Z
author bru
files src/sys/dev/wscons/wskbd.c log diff annotate
message Remove unused assignments.

CID 1453143

ok kettenis@

date 2020-04-26T11:31:07Z
author bru
files src/sys/dev/wscons/wsdisplay.c log diff annotate
message Make explicit and enforce that WSCREEN and WSEMUL names are 0-terminated.

CID 1452993 (BUFFER_SIZE_WARNING)
CID 1453314 (BUFFER_SIZE_WARNING)

ok kettenis@

date 2020-04-26T13:20:41Z
author patrick
files src/sys/dev/fdt/imxgpc.c log diff annotate
message Attach imxgpc(4) to i.MX8MM as well.

date 2020-04-26T13:31:48Z
author patrick
files src/sys/dev/fdt/imxccm.c log diff annotate
src/sys/dev/fdt/imxccm_clocks.h log diff annotate
message Add support for the i.MX8MM USB clocks. These behave exactly like
the i.MX8MQ variant and sit in the same places, but there seems to
be only one ROOT clock. Since the device tree bindings don't seem
to use assigned-clock-rates, there's no need to implement the get/
set frequency for the USB clocks. Essentially this means: fewer
code to copy.

date 2020-04-26T15:03:04Z
author patrick
files src/sys/dev/fdt/files.fdt log diff annotate
src/sys/dev/fdt/imxpciephy.c log diff annotate
message Add imxpciephy(4), a driver for the i.MX7D's PCIe PHY, which
is also implemented on the i.MX8MM. So far this driver is a
glorified regmap provider, which will be used by dwpcie(4).

ok kettenis@

date 2020-04-26T15:04:54Z
author patrick
files src/sys/arch/arm64/conf/GENERIC log diff annotate
src/sys/arch/arm64/conf/RAMDISK log diff annotate
message Enable imxpciephy(4).

date 2020-04-26T15:17:21Z
author patrick
files src/sys/dev/fdt/dwpcie.c log diff annotate
message Add i.MX8MM support to dwpcie(4). This re-uses the existing code
for i.MX8MQ support, but adds some PHY initialization via the
imxpciephy(4) regmap and needs a few other bit-settings in the
IOMUXC GPR for selecting the ref clock.

ok kettenis@

date 2020-04-26T20:49:56Z
author patrick
files src/sys/dev/pci/if_em.c log diff annotate
message Map em(4) descriptor rings coherent. This doesn't make a difference on x86,
but on selected ARM64 machines with non-cache-coherent PCIe controllers this
makes em(4) work reliably. Without it the network controller's view of the
head and tail get out of sync. The reason remains unclear. It could be an
issue in our arm64 bus dma code, it could be an issue in the em(4) code, or
maybe the hardware itself just doesn't cope well with non-coherent memory.
Linux maps them coherent as well, and it might actually be better to map
them that way, since otherwise we might spend a lot of time flushing our
caches.

ok kettenis@ deraadt@

date 2020-04-26T21:57:13Z
author benno
files src/sys/conf/GENERIC log diff annotate
message disable POOL_DEBUG in preparation for release
ok deraadt@