| created | 2018-11-29T22:23:18Z |
|---|---|
| begin | 2018-06-19T00:00:00Z |
| end | 2018-06-20T00:00:00Z |
| path | src/sys |
| commits | 5 |
| date | 2018-06-19T10:32:41Z | |||
|---|---|---|---|---|
| author | jmatthew | |||
| files | src/sys/dev/pci/mpii.c | log | diff | annotate |
| src/sys/dev/pci/mpiireg.h | log | diff | annotate | |
| message |
Add support for SAS3.5 controllers. This involves reordering initialisation so we get the controller capabilities first, allowing a soft reset instead of hard reset. The new controllers don't work after a hard reset, and older generations seem fine either way. tested by robert@ on a sas3408, by dlg@ on a sas2008 (on sparc64) and by me on a sas3008. ok dlg@ robert@ |
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| date | 2018-06-19T11:27:54Z | |||
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| author | helg | |||
| files | src/sys/miscfs/fuse/fusebuf.c | log | diff | annotate |
| src/sys/sys/fusebuf.h | log | diff | annotate | |
| message |
Send the calling thread id, effective uid and gid, and umask to the FUSE file system. fuse_get_context(3) will now return the correct values. ok mpi@ |
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| date | 2018-06-19T13:01:34Z | |||
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| author | helg | |||
| files | src/sys/miscfs/fuse/fuse_vfsops.c | log | diff | annotate |
| src/sys/miscfs/fuse/fuse_vnops.c | log | diff | annotate | |
| src/sys/miscfs/fuse/fusefs.h | log | diff | annotate | |
| src/sys/sys/mount.h | log | diff | annotate | |
| message |
Changes the default mount behaviour so only the user that mounts the file system can access it unless the allow_other mount options is specified. The allow_other mount option makes the file system available to other users just like any other mounted file system. ok mpi@ |
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| date | 2018-06-19T19:29:52Z | |||
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| author | kettenis | |||
| files | src/sys/arch/amd64/amd64/cpu.c | log | diff | annotate |
| src/sys/arch/amd64/include/cpu.h | log | diff | annotate | |
| src/sys/kern/kern_sched.c | log | diff | annotate | |
| src/sys/kern/kern_sysctl.c | log | diff | annotate | |
| src/sys/sys/sched.h | log | diff | annotate | |
| src/sys/sys/sysctl.h | log | diff | annotate | |
| message |
SMT (Simultanious Multi Threading) implementations typically share TLBs and L1 caches between threads. This can make cache timing attacks a lot easier and we strongly suspect that this will make several spectre-class bugs exploitable. Especially on Intel's SMT implementation which is better known as Hypter-threading. We really should not run different security domains on different processor threads of the same core. Unfortunately changing our scheduler to take this into account is far from trivial. Since many modern machines no longer provide the ability to disable Hyper-threading in the BIOS setup, provide a way to disable the use of additional processor threads in our scheduler. And since we suspect there are serious risks, we disable them by default. This can be controlled through a new hw.smt sysctl. For now this only works on Intel CPUs when running OpenBSD/amd64. But we're planning to extend this feature to CPUs from other vendors and other hardware architectures. Note that SMT doesn't necessarily have a posive effect on performance; it highly depends on the workload. In all likelyhood it will actually slow down most workloads if you have a CPU with more than two cores. ok deraadt@ |
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| date | 2018-06-19T22:35:07Z | |||
|---|---|---|---|---|
| author | krw | |||
| files | src/sys/uvm/uvm_stat.c | log | diff | annotate |
| src/sys/uvm/uvmexp.h | log | diff | annotate | |
| message |
Rename some unused fields in struct uvmexp to unusedNN. Missing man page bits pointed out by jmc@. Ports source scan by sthen@. ok deraadt@ guenther@ |
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