--- 7.6/2025-04-01T06:17:07Z/2025-03-14T00:00:00Z/nm-bsd-ot14.txt Wed Apr 2 23:44:40 2025 +++ 7.6/2025-04-01T06:17:07Z/2025-03-15T00:00:00Z/nm-bsd-ot14.txt Thu Apr 3 02:47:15 2025 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001418f A acpi_pdirpa 01000000 A __kernel_phys_base -02a9b000 T __kernel_kutext_phys -02a9e000 C __kernel_cptext_phys -02a9f000 C __kernel_rodata_phys -03445000 R __kernel_kutext_page_phys -03447000 C __kernel_randomdata_phys -036f4000 R __kernel_data_phys -03a84000 D __kernel_kudata_phys -03a86000 C __kernel_bss_phys +02a9e000 T __kernel_kutext_phys +02aa1000 C __kernel_cptext_phys +02aa2000 C __kernel_rodata_phys +03449000 R __kernel_kutext_page_phys +0344b000 C __kernel_randomdata_phys +036f8000 R __kernel_data_phys +03a88000 D __kernel_kudata_phys +03a8a000 C __kernel_bss_phys 04000000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -20289,30486 +20289,30480 @@ ffffffff81a9a790 T drm_client_modeset_commit ffffffff81a9a820 T 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df_v3_6_get_hbm_channel_number -ffffffff82039420 t df_v3_6_update_medium_grain_clock_gating -ffffffff820395f0 t df_v3_6_get_clockgating_state -ffffffff82039690 t df_v3_6_pmc_start -ffffffff82039a10 t df_v3_6_pmc_stop -ffffffff82039d60 t df_v3_6_pmc_get_count -ffffffff82039f40 t df_v3_6_get_fica -ffffffff8203a090 t df_v3_6_set_fica -ffffffff8203a1c0 t df_v3_6_query_ras_poison_mode -ffffffff8203b000 t df_v4_15_hw_init -ffffffff8203c000 t df_v4_3_query_ras_poison_mode -ffffffff8203d000 t df_v4_6_2_query_ras_poison_mode -ffffffff8203e000 T dimgrey_cavefish_reg_base_init -ffffffff8203f000 T emu_soc_asic_init -ffffffff82040000 t gfx_v10_0_early_init -ffffffff820409c0 t gfx_v10_0_late_init -ffffffff82040a50 t gfx_v10_0_sw_init -ffffffff820410a0 t gfx_v10_0_sw_fini -ffffffff820413b0 t gfx_v10_0_hw_init -ffffffff82044540 t gfx_v10_0_hw_fini -ffffffff82044690 t gfx_v10_0_suspend -ffffffff820446d0 t gfx_v10_0_resume -ffffffff820446e0 t gfx_v10_0_is_idle -ffffffff82044780 t gfx_v10_0_wait_for_idle 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gfx_v10_ring_insert_nop -ffffffff8204a3d0 t gfx_v10_0_ring_emit_init_cond_exec -ffffffff8204a620 t gfx_v10_0_ring_emit_sb -ffffffff8204a710 t gfx_v10_0_ring_emit_cntxcntl -ffffffff8204ac00 t gfx_v10_0_ring_emit_frame_cntl -ffffffff8204ad10 t gfx_v10_0_ring_soft_recovery -ffffffff8204adc0 t gfx_v10_0_ring_preempt_ib -ffffffff8204af70 t gfx_v10_0_emit_mem_sync -ffffffff8204b2e0 t gfx_v10_0_reset_kgq -ffffffff8204b5f0 t gfx_v10_0_write_data_to_reg -ffffffff8204b820 t amdgpu_bo_reserve -ffffffff8204b9c0 t gfx_v10_0_kgq_init_queue -ffffffff8204bc40 t amdgpu_bo_unreserve -ffffffff8204bd50 t gfx_v10_0_cp_gfx_set_doorbell -ffffffff8204c080 t gfx_v10_0_reset_kcq -ffffffff8204c550 t gfx_v10_0_kcq_init_queue -ffffffff8204c710 t gfx_v10_0_set_eop_interrupt_state -ffffffff8204c810 t gfx_v10_0_eop_irq -ffffffff8204c950 t gfx_v10_0_set_gfx_eop_interrupt_state -ffffffff8204cb10 t gfx_v10_0_set_compute_eop_interrupt_state -ffffffff8204ccf0 t gfx_v10_0_kiq_set_interrupt_state -ffffffff8204d060 t gfx_v10_0_kiq_irq -ffffffff8204d0f0 t gfx_v10_0_set_priv_reg_fault_state -ffffffff8204d3f0 t gfx_v10_0_priv_reg_irq -ffffffff8204d460 t gfx_v10_0_handle_priv_fault -ffffffff8204d5e0 t gfx_v10_0_set_bad_op_fault_state -ffffffff8204d8e0 t gfx_v10_0_bad_op_irq -ffffffff8204d950 t gfx_v10_0_set_priv_inst_fault_state -ffffffff8204daf0 t gfx_v10_0_priv_inst_irq -ffffffff8204db60 t gfx_v10_0_is_rlc_enabled -ffffffff8204dc00 t gfx_v10_0_set_safe_mode -ffffffff8204df00 t gfx_v10_0_unset_safe_mode -ffffffff8204dfb0 t gfx_v10_0_rlc_init -ffffffff8204dfd0 t gfx_v10_0_get_csb_size -ffffffff8204e000 t gfx_v10_0_get_csb_buffer -ffffffff8204e170 t gfx_v10_0_rlc_resume -ffffffff8204ed30 t gfx_v10_0_rlc_stop -ffffffff8204ee10 t gfx_v10_0_rlc_reset -ffffffff8204f000 t gfx_v10_0_rlc_start -ffffffff8204f1f0 t gfx_v10_0_update_spm_vmid -ffffffff8204f240 t gfx_v10_0_wait_for_rlc_autoload_complete -ffffffff8204fc80 t gfx_v10_0_init_csb -ffffffff8204ffb0 t gfx_v10_0_update_spm_vmid_internal -ffffffff82050100 t gfx_v10_0_rlc_backdoor_autoload_config_mec_cache -ffffffff82050420 t gfx_v10_0_is_rlcg_access_range -ffffffff82050450 t gfx_v10_0_gfx_mqd_init -ffffffff82050890 t gfx_v10_0_compute_mqd_init -ffffffff82050db0 t gfx_v10_0_mec_init -ffffffff82051040 t gfx_v10_0_compute_ring_init -ffffffff820511a0 t gfx_v10_0_rlc_backdoor_autoload_buffer_init -ffffffff82051440 t gfx_v10_0_gpu_early_init -ffffffff82051740 t gfx_v10_0_alloc_ip_dump -ffffffff82051860 t gfx_v10_0_cp_resume -ffffffff820544b0 t gfx_v10_3_get_disabled_sa -ffffffff820545e0 t gfx_v10_0_get_rb_active_bitmap -ffffffff82054720 t gfx_v10_0_get_wgp_active_bitmap_per_sh -ffffffff82054840 t gfx_v10_0_enable_gui_idle_interrupt -ffffffff820549e0 t gfx_v10_0_cp_gfx_enable -ffffffff82054c80 t gfx_v10_0_cp_compute_enable -ffffffff82054e40 t gfx_v10_0_kiq_init_register -ffffffff82055f30 t gfx_v10_0_cp_gfx_switch_pipe -ffffffff82056030 t gfx_v10_0_cp_gfx_start -ffffffff82056b20 t gfx_v10_0_update_fine_grain_clock_gating -ffffffff82056eb0 t gfx_v10_0_update_medium_grain_clock_gating -ffffffff820576b0 t gfx_v10_0_update_3d_clock_gating -ffffffff82057ae0 t gfx_v10_0_update_coarse_grain_clock_gating -ffffffff82057f10 t gfx_v10_cntl_pg -ffffffff82059000 T gfx_v11_0_request_gfx_index_mutex -ffffffff820591e0 t gfx_v11_0_early_init -ffffffff82059a40 t gfx_v11_0_late_init -ffffffff82059ad0 t gfx_v11_0_sw_init -ffffffff8205a0e0 t gfx_v11_0_sw_fini -ffffffff8205a3e0 t gfx_v11_0_hw_init -ffffffff8205f070 t gfx_v11_0_hw_fini -ffffffff8205f1e0 t gfx_v11_0_suspend -ffffffff8205f220 t gfx_v11_0_resume -ffffffff8205f230 t gfx_v11_0_is_idle -ffffffff8205f2d0 t gfx_v11_0_wait_for_idle -ffffffff8205f3e0 t gfx_v11_0_check_soft_reset -ffffffff8205f520 t gfx_v11_0_soft_reset -ffffffff82060240 t gfx_v11_0_post_soft_reset -ffffffff82060250 t gfx_v11_0_set_clockgating_state -ffffffff82061000 t gfx_v11_0_set_powergating_state -ffffffff82061100 t gfx_v11_0_get_clockgating_state -ffffffff820612f0 t gfx_v11_ip_dump -ffffffff820617d0 t gfx_v11_ip_print -ffffffff82061b60 t gfx_v11_0_get_gpu_clock_counter -ffffffff82061f50 t gfx_v11_0_select_se_sh -ffffffff82061ff0 t gfx_v11_0_read_wave_data -ffffffff820622c0 t gfx_v11_0_read_wave_vgprs -ffffffff820622f0 t gfx_v11_0_read_wave_sgprs -ffffffff82062370 t gfx_v11_0_select_me_pipe_q -ffffffff82062390 t gfx_v11_0_update_perf_clk -ffffffff820624d0 t gfx_v11_0_get_gfx_shadow_info -ffffffff82062540 t wave_read_ind -ffffffff82062640 t wave_read_regs -ffffffff820627c0 t gfx11_kiq_set_resources -ffffffff82062b20 t gfx11_kiq_map_queues -ffffffff82062f00 t gfx11_kiq_unmap_queues -ffffffff82063340 t gfx11_kiq_query_status -ffffffff82063660 t gfx11_kiq_invalidate_tlbs -ffffffff82063790 t gfx_v11_0_ring_get_rptr_compute -ffffffff820637c0 t gfx_v11_0_ring_get_wptr_compute -ffffffff82063830 t gfx_v11_0_ring_set_wptr_compute -ffffffff82063890 t gfx_v11_0_ring_emit_ib_compute -ffffffff82063c10 t gfx_v11_0_ring_emit_fence_kiq -ffffffff82064090 t gfx_v11_0_ring_test_ring -ffffffff82064360 t gfx_v11_0_ring_test_ib -ffffffff82064660 t gfx_v11_0_ring_emit_rreg -ffffffff82064920 t gfx_v11_0_ring_emit_wreg -ffffffff82064b80 t gfx_v11_0_ring_emit_reg_wait -ffffffff82064be0 t gfx_v11_0_ring_emit_reg_write_reg_wait -ffffffff82064c50 t gfx_v11_0_wait_reg_mem -ffffffff82064fb0 t gfx_v11_0_ring_get_rptr_gfx -ffffffff82064fe0 t gfx_v11_0_ring_get_wptr_gfx -ffffffff82065100 t gfx_v11_0_ring_set_wptr_gfx -ffffffff82065240 t gfx_v11_0_ring_emit_ib_gfx -ffffffff82065940 t gfx_v11_0_ring_emit_fence -ffffffff82065d50 t gfx_v11_0_ring_emit_pipeline_sync -ffffffff82065dc0 t gfx_v11_0_ring_emit_vm_flush -ffffffff82065fd0 t gfx_v11_0_ring_emit_hdp_flush -ffffffff820660c0 t gfx_v11_0_ring_emit_gds_switch -ffffffff820661c0 t gfx_v11_ring_insert_nop -ffffffff82066370 t gfx_v11_0_ring_emit_init_cond_exec -ffffffff820665c0 t gfx_v11_0_ring_emit_cntxcntl -ffffffff82066740 t gfx_v11_0_ring_emit_gfx_shadow -ffffffff82067020 t gfx_v11_0_ring_emit_frame_cntl -ffffffff82067130 t gfx_v11_0_ring_soft_recovery -ffffffff820671e0 t gfx_v11_0_ring_preempt_ib -ffffffff820673a0 t gfx_v11_0_emit_mem_sync -ffffffff82067710 t gfx_v11_0_reset_kgq -ffffffff82067970 t gfx_v11_0_write_data_to_reg -ffffffff82067ba0 t amdgpu_bo_reserve -ffffffff82067d40 t amdgpu_bo_unreserve -ffffffff82067e50 t gfx_v11_0_reset_kcq -ffffffff82068320 t gfx_v11_0_set_eop_interrupt_state -ffffffff820683c0 t gfx_v11_0_eop_irq -ffffffff820685a0 t gfx_v11_0_set_gfx_eop_interrupt_state -ffffffff82068760 t gfx_v11_0_set_compute_eop_interrupt_state -ffffffff82068910 t gfx_v11_0_set_priv_reg_fault_state -ffffffff82068c10 t gfx_v11_0_priv_reg_irq -ffffffff82068c80 t gfx_v11_0_handle_priv_fault -ffffffff82068e00 t gfx_v11_0_set_bad_op_fault_state -ffffffff82069100 t gfx_v11_0_bad_op_irq -ffffffff82069170 t gfx_v11_0_set_priv_inst_fault_state -ffffffff82069310 t gfx_v11_0_priv_inst_irq -ffffffff82069380 t gfx_v11_0_rlc_gc_fed_irq -ffffffff820693d0 t gfx_v11_0_is_rlc_enabled -ffffffff82069470 t gfx_v11_0_set_safe_mode -ffffffff820695f0 t gfx_v11_0_unset_safe_mode -ffffffff82069660 t gfx_v11_0_rlc_init -ffffffff820696e0 t gfx_v11_0_get_csb_size -ffffffff82069710 t gfx_v11_0_get_csb_buffer -ffffffff82069880 t gfx_v11_0_rlc_resume -ffffffff8206a730 t gfx_v11_0_rlc_stop -ffffffff8206a810 t gfx_v11_0_rlc_reset -ffffffff8206aa00 t gfx_v11_0_rlc_start -ffffffff8206abf0 t gfx_v11_0_update_spm_vmid -ffffffff8206adb0 t gfx_v11_0_init_csb -ffffffff8206af70 t gfx_v11_0_gfx_mqd_init -ffffffff8206b3b0 t gfx_v11_0_compute_mqd_init -ffffffff8206b960 t gfx_v11_0_mec_init -ffffffff8206baf0 t gfx_v11_0_compute_ring_init -ffffffff8206bc50 t gfx_v11_0_rlc_autoload_buffer_init -ffffffff8206be50 t gfx_v11_0_gpu_early_init -ffffffff8206bf50 t gfx_v11_0_alloc_ip_dump -ffffffff8206c070 t gfx_v11_0_disable_gpa_mode -ffffffff8206c230 t gfx_v11_0_cp_resume -ffffffff82070990 t gfx_v11_0_config_me_cache -ffffffff82070db0 t gfx_v11_0_config_pfp_cache -ffffffff820711d0 t gfx_v11_0_config_mec_cache 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gfx_v12_0_set_powergating_state -ffffffff820798e0 t gfx_v12_0_get_clockgating_state -ffffffff82079ad0 t gfx_v12_ip_dump -ffffffff82079fb0 t gfx_v12_ip_print -ffffffff8207a340 t gfx_v12_0_get_gpu_clock_counter -ffffffff8207a3d0 t gfx_v12_0_select_se_sh -ffffffff8207a470 t gfx_v12_0_read_wave_data -ffffffff8207a870 t gfx_v12_0_read_wave_vgprs -ffffffff8207a8a0 t gfx_v12_0_read_wave_sgprs -ffffffff8207a920 t gfx_v12_0_select_me_pipe_q -ffffffff8207a940 t gfx_v12_0_update_perf_clk -ffffffff8207aa80 t wave_read_ind -ffffffff8207ab80 t wave_read_regs -ffffffff8207ad00 t gfx_v12_0_kiq_set_resources -ffffffff8207b060 t gfx_v12_0_kiq_map_queues -ffffffff8207b440 t gfx_v12_0_kiq_unmap_queues -ffffffff8207b880 t gfx_v12_0_kiq_query_status -ffffffff8207bba0 t gfx_v12_0_kiq_invalidate_tlbs -ffffffff8207bcd0 t gfx_v12_0_ring_get_rptr_compute -ffffffff8207bd00 t gfx_v12_0_ring_get_wptr_compute -ffffffff8207bd70 t gfx_v12_0_ring_set_wptr_compute -ffffffff8207bed0 t gfx_v12_0_ring_emit_ib_compute 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gfx_v12_0_ring_soft_recovery -ffffffff8207e9b0 t gfx_v12_0_ring_preempt_ib -ffffffff8207eb70 t gfx_v12_0_emit_mem_sync -ffffffff8207eee0 t gfx_v12_0_reset_kgq -ffffffff8207f170 t amdgpu_bo_reserve -ffffffff8207f310 t amdgpu_bo_unreserve -ffffffff8207f420 t gfx_v12_0_reset_kcq -ffffffff8207f880 t gfx_v12_0_set_eop_interrupt_state -ffffffff8207f950 t gfx_v12_0_eop_irq -ffffffff8207fb30 t gfx_v12_0_set_gfx_eop_interrupt_state -ffffffff8207fce0 t gfx_v12_0_set_compute_eop_interrupt_state -ffffffff8207fea0 t gfx_v12_0_set_priv_reg_fault_state -ffffffff82080180 t gfx_v12_0_priv_reg_irq -ffffffff820801f0 t gfx_v12_0_handle_priv_fault -ffffffff82080370 t gfx_v12_0_set_bad_op_fault_state -ffffffff82080650 t gfx_v12_0_bad_op_irq -ffffffff820806c0 t gfx_v12_0_set_priv_inst_fault_state -ffffffff82080850 t gfx_v12_0_priv_inst_irq -ffffffff820808c0 t gfx_v12_0_is_rlc_enabled -ffffffff82080960 t gfx_v12_0_set_safe_mode -ffffffff82080ae0 t gfx_v12_0_unset_safe_mode -ffffffff82080b50 t gfx_v12_0_rlc_init -ffffffff82080bd0 t gfx_v12_0_get_csb_size -ffffffff82080c00 t gfx_v12_0_get_csb_buffer -ffffffff82080cf0 t gfx_v12_0_rlc_resume -ffffffff82081600 t gfx_v12_0_rlc_stop -ffffffff820816e0 t gfx_v12_0_rlc_reset -ffffffff820818d0 t gfx_v12_0_rlc_start -ffffffff82081ac0 t gfx_v12_0_update_spm_vmid -ffffffff82081c40 t gfx_v12_0_init_csb -ffffffff82081e00 t gfx_v12_0_gfx_mqd_init -ffffffff82082230 t gfx_v12_0_compute_mqd_init -ffffffff820827d0 t gfx_v12_0_mec_init -ffffffff82082960 t gfx_v12_0_compute_ring_init -ffffffff82082ac0 t gfx_v12_0_rlc_autoload_buffer_init -ffffffff82082c80 t gfx_v12_0_gpu_early_init -ffffffff82082d10 t gfx_v12_0_alloc_ip_dump -ffffffff82082e30 t gfx_v12_0_disable_gpa_mode -ffffffff82082ff0 t gfx_v12_0_cp_resume -ffffffff82086640 t gfx_v12_0_set_pfp_ucode_start_addr -ffffffff820869a0 t gfx_v12_0_set_me_ucode_start_addr -ffffffff82086d00 t gfx_v12_0_set_mec_ucode_start_addr -ffffffff82086ef0 t gfx_v12_0_get_sa_active_bitmap -ffffffff82087020 t gfx_v12_0_enable_gui_idle_interrupt -ffffffff820871b0 t gfx_v12_0_cp_compute_enable -ffffffff820872c0 t gfx_v12_0_cp_gfx_enable -ffffffff820874f0 t gfx_v12_0_kiq_init_register -ffffffff820885f0 t gfx_v12_0_cp_gfx_switch_pipe -ffffffff820886d0 t gfx_v12_0_cp_gfx_start -ffffffff82089000 t gfx_v8_0_early_init -ffffffff82089310 t gfx_v8_0_late_init -ffffffff82089ad0 t gfx_v8_0_sw_init -ffffffff82089f20 t gfx_v8_0_sw_fini -ffffffff8208a130 t gfx_v8_0_hw_init -ffffffff8208c710 t gfx_v8_0_hw_fini -ffffffff8208ccb0 t gfx_v8_0_suspend -ffffffff8208ccf0 t gfx_v8_0_resume -ffffffff8208cd00 t gfx_v8_0_is_idle -ffffffff8208cd80 t gfx_v8_0_wait_for_idle -ffffffff8208ce50 t gfx_v8_0_check_soft_reset -ffffffff8208cf50 t gfx_v8_0_pre_soft_reset -ffffffff8208d110 t gfx_v8_0_soft_reset -ffffffff8208d360 t gfx_v8_0_post_soft_reset -ffffffff8208d550 t gfx_v8_0_set_clockgating_state -ffffffff8208d830 t gfx_v8_0_set_powergating_state -ffffffff8208dce0 t gfx_v8_0_get_clockgating_state -ffffffff8208ddf0 t gfx_v8_0_get_gpu_clock_counter -ffffffff8208deb0 t gfx_v8_0_select_se_sh -ffffffff8208df10 t gfx_v8_0_read_wave_data -ffffffff8208e510 t gfx_v8_0_read_wave_sgprs -ffffffff8208e5e0 t gfx_v8_0_select_me_pipe_q -ffffffff8208e600 t gfx_v8_0_ring_get_rptr -ffffffff8208e630 t gfx_v8_0_ring_get_wptr_compute -ffffffff8208e660 t gfx_v8_0_ring_set_wptr_compute -ffffffff8208e6a0 t gfx_v8_0_ring_emit_fence_kiq -ffffffff8208eb10 t gfx_v8_0_ring_test_ring -ffffffff8208ed50 t gfx_v8_0_ring_emit_rreg -ffffffff8208f010 t gfx_v8_0_ring_emit_wreg -ffffffff8208f270 t gfx_v8_0_ring_get_wptr_gfx -ffffffff8208f2d0 t gfx_v8_0_ring_set_wptr_gfx -ffffffff8208f350 t gfx_v8_0_ring_emit_ib_gfx -ffffffff8208f910 t gfx_v8_0_ring_emit_fence_gfx -ffffffff8208fe70 t gfx_v8_0_ring_emit_pipeline_sync -ffffffff82090190 t gfx_v8_0_ring_emit_vm_flush -ffffffff82090590 t gfx_v8_0_ring_emit_hdp_flush -ffffffff820908e0 t gfx_v8_0_ring_emit_gds_switch -ffffffff82091140 t gfx_v8_0_ring_test_ib -ffffffff82091330 t gfx_v8_0_ring_emit_init_cond_exec -ffffffff82091580 t gfx_v8_ring_emit_sb -ffffffff82091670 t gfx_v8_ring_emit_cntxcntl -ffffffff82091c70 t gfx_v8_0_ring_soft_recovery -ffffffff82091ca0 t gfx_v8_0_emit_mem_sync -ffffffff82091ec0 t gfx_v8_0_reset_kgq -ffffffff82092080 t gfx_v8_0_ring_emit_reg_wait -ffffffff82092370 t gfx_v8_0_ring_emit_ib_compute -ffffffff820926b0 t gfx_v8_0_ring_emit_fence_compute -ffffffff820929e0 t gfx_v8_0_emit_mem_sync_compute -ffffffff82092cd0 t gfx_v8_0_emit_wave_limit -ffffffff82092ea0 t gfx_v8_0_set_eop_interrupt_state -ffffffff82093120 t gfx_v8_0_eop_irq -ffffffff82093250 t gfx_v8_0_set_priv_reg_fault_state -ffffffff820932e0 t gfx_v8_0_priv_reg_irq -ffffffff82093400 t gfx_v8_0_set_priv_inst_fault_state -ffffffff82093490 t gfx_v8_0_priv_inst_irq -ffffffff820935b0 t gfx_v8_0_set_cp_ecc_int_state -ffffffff820938f0 t gfx_v8_0_cp_ecc_error_irq -ffffffff82093940 t gfx_v8_0_set_sq_int_state -ffffffff820939d0 t gfx_v8_0_sq_irq -ffffffff82093a50 t gfx_v8_0_parse_sq_irq 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gfx_v9_0_set_bad_op_fault_state -ffffffff820aa0b0 t gfx_v9_0_bad_op_irq -ffffffff820aa1d0 t gfx_v9_0_set_priv_inst_fault_state -ffffffff820aa320 t gfx_v9_0_priv_inst_irq -ffffffff820aa440 t gfx_v9_0_set_cp_ecc_error_state -ffffffff820aae30 t gfx_v9_0_is_rlc_enabled -ffffffff820aaed0 t gfx_v9_0_set_safe_mode -ffffffff820ab050 t gfx_v9_0_unset_safe_mode -ffffffff820ab0c0 t gfx_v9_0_rlc_init -ffffffff820ab140 t gfx_v9_0_get_csb_size -ffffffff820ab170 t gfx_v9_0_get_csb_buffer -ffffffff820ab2b0 t gfx_v9_0_cp_jump_table_num -ffffffff820ab310 t gfx_v9_0_rlc_resume -ffffffff820acd70 t gfx_v9_0_rlc_stop -ffffffff820ad190 t gfx_v9_0_rlc_reset -ffffffff820ad370 t gfx_v9_0_rlc_start -ffffffff820ad4f0 t gfx_v9_0_update_spm_vmid -ffffffff820ad540 t gfx_v9_0_is_rlcg_access_range -ffffffff820ad590 t gfx_v9_0_init_csb -ffffffff820ad750 t gfx_v9_0_enable_lbpw -ffffffff820ad860 t gfx_v9_0_update_spm_vmid_internal -ffffffff820ad990 t gfx_v9_0_init_always_on_cu_mask -ffffffff820adc50 t gfx_v9_0_enable_gui_idle_interrupt -ffffffff820add60 t gfx_v9_0_debug_trap_config_init -ffffffff820ade80 t gfx_v9_0_mec_init -ffffffff820ae0e0 t gfx_v9_0_compute_ring_init -ffffffff820ae240 t gfx_v9_0_gpu_early_init -ffffffff820ae6b0 t gfx_v9_0_alloc_ip_dump -ffffffff820ae780 t gfx_v9_0_cp_gfx_enable -ffffffff820ae880 t gfx_v9_0_kiq_init_register -ffffffff820af6e0 t gfx_v9_0_update_medium_grain_clock_gating -ffffffff820afca0 t gfx_v9_0_update_3d_clock_gating -ffffffff820b0100 t gfx_v9_0_update_coarse_grain_clock_gating -ffffffff820b1000 t gfx_v9_4_query_ras_error_count -ffffffff820b1f00 t gfx_v9_4_query_ras_error_status -ffffffff820b2100 t gfx_v9_4_reset_ras_error_count -ffffffff820b3000 T gfx_v9_4_2_do_edc_gpr_workarounds -ffffffff820b3890 T gfx_v9_4_2_init_golden_registers -ffffffff820b3930 T gfx_v9_4_2_debug_trap_config_init -ffffffff820b3a50 T gfx_v9_4_2_set_power_brake_sequence -ffffffff820b3c70 t gfx_v9_4_2_query_ras_error_count -ffffffff820b3d40 t gfx_v9_4_2_query_ras_error_status -ffffffff820b46e0 t gfx_v9_4_2_reset_ras_error_count -ffffffff820b4750 t gfx_v9_4_2_reset_ras_error_status -ffffffff820b4cb0 t gfx_v9_4_2_enable_watchdog_timer -ffffffff820b4f10 t gfx_v9_4_2_run_shader -ffffffff820b5340 t gfx_v9_4_2_wait_for_waves_assigned -ffffffff820b5a20 t gfx_v9_4_2_query_sram_edc_count -ffffffff820b5da0 t gfx_v9_4_2_query_utc_edc_count -ffffffff820b5fa0 t wave_read_ind -ffffffff820b7000 t gfx_v9_4_3_xcp_suspend -ffffffff820b70b0 t gfx_v9_4_3_xcp_resume -ffffffff820b7250 t gfx_v9_4_3_query_ras_error_count -ffffffff820b7270 t gfx_v9_4_3_reset_ras_error_count -ffffffff820b7290 t gfx_v9_4_3_ras_late_init -ffffffff820b7340 t gfx_v9_4_3_enable_watchdog_timer -ffffffff820b7360 t gfx_v9_4_3_early_init -ffffffff820b7b00 t gfx_v9_4_3_late_init -ffffffff820b7bb0 t gfx_v9_4_3_sw_init -ffffffff820b8150 t gfx_v9_4_3_sw_fini -ffffffff820b83e0 t gfx_v9_4_3_hw_init -ffffffff820b92d0 t gfx_v9_4_3_hw_fini -ffffffff820b93d0 t gfx_v9_4_3_suspend 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gfx_v9_4_3_xcc_kcq_init_queue -ffffffff820bf920 t amdgpu_bo_unreserve -ffffffff820bfa30 t gfx_v9_4_3_xcc_set_safe_mode -ffffffff820bfd40 t gfx_v9_4_3_xcc_unset_safe_mode -ffffffff820bfe80 t gfx_v9_4_3_xcc_mqd_init -ffffffff820c0a30 t gfx_v9_4_3_set_eop_interrupt_state -ffffffff820c0bb0 t gfx_v9_4_3_eop_irq -ffffffff820c0d60 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state -ffffffff820c0ee0 t gfx_v9_4_3_ih_to_xcc_inst -ffffffff820c0fc0 t gfx_v9_4_3_set_priv_reg_fault_state -ffffffff820c1530 t gfx_v9_4_3_priv_reg_irq -ffffffff820c15a0 t gfx_v9_4_3_fault -ffffffff820c1720 t gfx_v9_4_3_set_bad_op_fault_state -ffffffff820c1c90 t gfx_v9_4_3_bad_op_irq -ffffffff820c1d00 t gfx_v9_4_3_set_priv_inst_fault_state -ffffffff820c2160 t gfx_v9_4_3_priv_inst_irq -ffffffff820c21d0 t gfx_v9_4_3_is_rlc_enabled -ffffffff820c2320 t gfx_v9_4_3_rlc_init -ffffffff820c2380 t gfx_v9_4_3_rlc_resume -ffffffff820c2440 t gfx_v9_4_3_rlc_stop -ffffffff820c24f0 t gfx_v9_4_3_rlc_reset -ffffffff820c2c70 t gfx_v9_4_3_rlc_start -ffffffff820c2d20 t gfx_v9_4_3_update_spm_vmid -ffffffff820c2fe0 t gfx_v9_4_3_is_rlcg_access_range -ffffffff820c30b0 t gfx_v9_4_3_xcc_rlc_resume -ffffffff820c3a70 t gfx_v9_4_3_xcc_rlc_stop -ffffffff820c42d0 t gfx_v9_4_3_xcc_rlc_start -ffffffff820c46e0 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt -ffffffff820c4940 t gfx_v9_4_3_xcc_select_se_sh -ffffffff820c4b70 t gfx_v9_4_3_mec_init -ffffffff820c4ee0 t gfx_v9_4_3_gpu_early_init -ffffffff820c5140 t gfx_v9_4_3_alloc_ip_dump -ffffffff820c5250 t gfx_v9_4_3_get_gpu_clock_counter -ffffffff820c5620 t gfx_v9_4_3_read_wave_data -ffffffff820c5980 t gfx_v9_4_3_read_wave_vgprs -ffffffff820c59a0 t gfx_v9_4_3_read_wave_sgprs -ffffffff820c5a00 t gfx_v9_4_3_select_me_pipe_q -ffffffff820c5a80 t gfx_v9_4_3_switch_compute_partition -ffffffff820c5d00 t gfx_v9_4_3_get_xccs_per_xcp -ffffffff820c5e60 t wave_read_ind -ffffffff820c60a0 t wave_read_regs -ffffffff820c6380 t gfx_v9_4_3_xcc_constants_init -ffffffff820c76f0 t gfx_v9_4_3_xcc_cp_resume -ffffffff820c8730 t gfx_v9_4_3_xcc_cp_compute_enable -ffffffff820c8920 t gfx_v9_4_3_xcc_kiq_init_register -ffffffff820ca9c0 t gfx_v9_4_3_xcc_fini -ffffffff820cb040 t gfx_v9_4_3_xcc_q_fini_register -ffffffff820cbba0 t gfx_v9_4_3_xcc_update_sram_fgcg -ffffffff820cbe50 t gfx_v9_4_3_xcc_update_repeater_fgcg -ffffffff820cc100 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating -ffffffff820ccdf0 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating -ffffffff820cd780 t gfx_v9_4_3_inst_query_ras_err_count -ffffffff820cdd00 t gfx_v9_4_3_inst_reset_ras_err_count -ffffffff820ce100 t gfx_v9_4_3_aca_bank_parser -ffffffff820ce1c0 t gfx_v9_4_3_aca_bank_is_valid -ffffffff820ce210 t gfx_v9_4_3_inst_enable_watchdog_timer -ffffffff820cf000 t gfxhub_v11_5_0_get_fb_location -ffffffff820cf0a0 t gfxhub_v11_5_0_get_mc_fb_offset -ffffffff820cf140 t gfxhub_v11_5_0_setup_vm_pt_regs -ffffffff820cf290 t gfxhub_v11_5_0_gart_enable -ffffffff820d0850 t gfxhub_v11_5_0_gart_disable -ffffffff820d0b50 t gfxhub_v11_5_0_set_fault_enable_default -ffffffff820d0d40 t gfxhub_v11_5_0_init -ffffffff820d0e10 t gfxhub_v11_5_0_print_l2_protection_fault_status -ffffffff820d1030 t gfxhub_v11_5_0_get_invalidate_req -ffffffff820d2000 t gfxhub_v12_0_get_fb_location -ffffffff820d20a0 t gfxhub_v12_0_get_mc_fb_offset -ffffffff820d2140 t gfxhub_v12_0_setup_vm_pt_regs -ffffffff820d2290 t gfxhub_v12_0_gart_enable -ffffffff820d3830 t gfxhub_v12_0_gart_disable -ffffffff820d3b10 t gfxhub_v12_0_set_fault_enable_default -ffffffff820d3d00 t gfxhub_v12_0_init -ffffffff820d3dd0 t gfxhub_v12_0_print_l2_protection_fault_status -ffffffff820d3ff0 t gfxhub_v12_0_get_invalidate_req -ffffffff820d5000 t gfxhub_v1_0_get_mc_fb_offset -ffffffff820d50a0 t gfxhub_v1_0_setup_vm_pt_regs -ffffffff820d51f0 t gfxhub_v1_0_gart_enable -ffffffff820d69e0 t gfxhub_v1_0_gart_disable -ffffffff820d6cd0 t gfxhub_v1_0_set_fault_enable_default -ffffffff820d6dd0 t gfxhub_v1_0_init -ffffffff820d7000 T gfxhub_v1_1_get_xgmi_info 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gfxhub_v2_0_print_l2_protection_fault_status -ffffffff820dfda0 t gfxhub_v2_0_get_invalidate_req -ffffffff820e0000 t gfxhub_v2_1_get_fb_location -ffffffff820e00a0 t gfxhub_v2_1_get_mc_fb_offset -ffffffff820e0140 t gfxhub_v2_1_setup_vm_pt_regs -ffffffff820e0290 t gfxhub_v2_1_gart_enable -ffffffff820e1810 t gfxhub_v2_1_gart_disable -ffffffff820e1a80 t gfxhub_v2_1_set_fault_enable_default -ffffffff820e1ba0 t gfxhub_v2_1_init -ffffffff820e1c70 t gfxhub_v2_1_get_xgmi_info -ffffffff820e1dd0 t gfxhub_v2_1_utcl2_harvest -ffffffff820e1fd0 t gfxhub_v2_1_save_regs -ffffffff820e2b20 t gfxhub_v2_1_restore_regs -ffffffff820e3910 t gfxhub_v2_1_halt -ffffffff820e3d60 t gfxhub_v2_1_print_l2_protection_fault_status -ffffffff820e3f80 t gfxhub_v2_1_get_invalidate_req -ffffffff820e4000 t gfxhub_v3_0_get_fb_location -ffffffff820e40a0 t gfxhub_v3_0_get_mc_fb_offset -ffffffff820e4140 t gfxhub_v3_0_setup_vm_pt_regs -ffffffff820e4290 t gfxhub_v3_0_gart_enable -ffffffff820e5850 t gfxhub_v3_0_gart_disable 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gmc_v11_0_hw_init -ffffffff820eb970 t gmc_v11_0_hw_fini -ffffffff820eba30 t gmc_v11_0_suspend -ffffffff820ebaf0 t gmc_v11_0_resume -ffffffff820ebb50 t gmc_v11_0_is_idle -ffffffff820ebb80 t gmc_v11_0_wait_for_idle -ffffffff820ebbb0 t gmc_v11_0_soft_reset -ffffffff820ebbe0 t gmc_v11_0_set_clockgating_state -ffffffff820ebc60 t gmc_v11_0_set_powergating_state -ffffffff820ebc90 t gmc_v11_0_get_clockgating_state -ffffffff820ebcd0 t gmc_v11_0_flush_gpu_tlb -ffffffff820ec1a0 t gmc_v11_0_flush_gpu_tlb_pasid -ffffffff820ec310 t gmc_v11_0_emit_flush_gpu_tlb -ffffffff820ec4f0 t gmc_v11_0_emit_pasid_mapping -ffffffff820ec570 t gmc_v11_0_map_mtype -ffffffff820ec5c0 t gmc_v11_0_get_vm_pde -ffffffff820ec6c0 t gmc_v11_0_get_vm_pte -ffffffff820ec7a0 t gmc_v11_0_get_vbios_fb_size -ffffffff820ec930 t gmc_v11_0_vm_fault_interrupt_state -ffffffff820eca00 t gmc_v11_0_process_interrupt -ffffffff820ecca0 t gmc_v11_0_ecc_interrupt_state -ffffffff820eccd0 t gmc_v11_0_gart_init -ffffffff820ed000 t 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sdma_v4_0_process_illegal_inst_irq -ffffffff8218e500 t sdma_v4_0_set_ecc_irq_state -ffffffff8218e6b0 t sdma_v4_0_process_vm_hole_irq -ffffffff8218e700 t sdma_v4_0_print_iv_entry -ffffffff8218e810 t sdma_v4_0_process_doorbell_invalid_irq -ffffffff8218e860 t sdma_v4_0_process_pool_timeout_irq -ffffffff8218e8b0 t sdma_v4_0_process_srbm_write_irq -ffffffff8218e900 t sdma_v4_0_process_ras_data_cb -ffffffff8218e980 t sdma_v4_0_ctx_switch_enable -ffffffff8218f0a0 t sdma_v4_0_enable -ffffffff8218f680 t sdma_v4_0_gfx_enable -ffffffff82190000 t sdma_v4_4_query_ras_error_count -ffffffff821902b0 t sdma_v4_4_reset_ras_error_count -ffffffff82191000 t sdma_v4_4_2_early_init -ffffffff82191290 t sdma_v4_4_2_late_init -ffffffff821912f0 t sdma_v4_4_2_sw_init -ffffffff82191940 t sdma_v4_4_2_sw_fini -ffffffff82191a40 t sdma_v4_4_2_hw_init -ffffffff82191a90 t sdma_v4_4_2_hw_fini -ffffffff82191b70 t sdma_v4_4_2_suspend -ffffffff82191c80 t sdma_v4_4_2_resume -ffffffff82191cd0 t sdma_v4_4_2_is_idle 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sdma_v4_4_2_ring_pad_ib -ffffffff82193c80 t sdma_v4_4_2_ring_emit_wreg -ffffffff82193de0 t sdma_v4_4_2_ring_emit_reg_wait -ffffffff82193e30 t sdma_v4_4_2_wait_reg_mem -ffffffff82194180 t sdma_v4_4_2_page_ring_get_wptr -ffffffff821942a0 t sdma_v4_4_2_page_ring_set_wptr -ffffffff821943d0 t sdma_v4_4_2_emit_copy_buffer -ffffffff821944a0 t sdma_v4_4_2_emit_fill_buffer -ffffffff82194530 t sdma_v4_4_2_vm_copy_pte -ffffffff821945f0 t sdma_v4_4_2_vm_write_pte -ffffffff821946c0 t sdma_v4_4_2_vm_set_pte_pde -ffffffff821947c0 t sdma_v4_4_2_set_trap_irq_state -ffffffff821948c0 t sdma_v4_4_2_process_trap_irq -ffffffff82194a40 t sdma_v4_4_2_process_illegal_inst_irq -ffffffff82194b20 t sdma_v4_4_2_set_ecc_irq_state -ffffffff82194c30 t sdma_v4_4_2_process_vm_hole_irq -ffffffff82194c80 t sdma_v4_4_2_print_iv_entry -ffffffff82194d80 t sdma_v4_4_2_process_doorbell_invalid_irq -ffffffff82194dd0 t sdma_v4_4_2_process_pool_timeout_irq -ffffffff82194e20 t sdma_v4_4_2_process_srbm_write_irq -ffffffff82194e70 t sdma_v4_4_2_ras_late_init -ffffffff82194ef0 t sdma_v4_4_2_aca_bank_parser -ffffffff82194fa0 t sdma_v4_4_2_aca_bank_is_valid -ffffffff82195010 t sdma_v4_4_2_query_ras_error_count -ffffffff82195210 t sdma_v4_4_2_reset_ras_error_count -ffffffff82195380 t sdma_v4_4_2_inst_init_golden_registers -ffffffff82195550 t sdma_v4_4_2_inst_start -ffffffff82196d00 t sdma_v4_4_2_inst_ctx_switch_enable -ffffffff82197050 t sdma_v4_4_2_inst_enable -ffffffff82198000 t sdma_v5_0_early_init -ffffffff82198180 t sdma_v5_0_sw_init -ffffffff82198380 t sdma_v5_0_sw_fini -ffffffff82198440 t sdma_v5_0_hw_init -ffffffff821998e0 t sdma_v5_0_hw_fini -ffffffff82199940 t sdma_v5_0_suspend -ffffffff821999a0 t sdma_v5_0_resume -ffffffff821999b0 t sdma_v5_0_is_idle -ffffffff82199a50 t sdma_v5_0_wait_for_idle -ffffffff82199b30 t sdma_v5_0_soft_reset -ffffffff82199b60 t sdma_v5_0_set_clockgating_state -ffffffff82199d80 t sdma_v5_0_set_powergating_state -ffffffff82199db0 t sdma_v5_0_get_clockgating_state -ffffffff82199e60 t sdma_v5_0_dump_ip_state -ffffffff82199f90 t sdma_v5_0_print_ip_state -ffffffff8219a0b0 t sdma_v5_0_ring_get_rptr -ffffffff8219a110 t sdma_v5_0_ring_get_wptr -ffffffff8219a2d0 t sdma_v5_0_ring_set_wptr -ffffffff8219a660 t sdma_v5_0_ring_emit_ib -ffffffff8219a960 t sdma_v5_0_ring_emit_fence -ffffffff8219ae10 t sdma_v5_0_ring_emit_pipeline_sync -ffffffff8219b0c0 t sdma_v5_0_ring_emit_vm_flush -ffffffff8219b0e0 t sdma_v5_0_ring_emit_hdp_flush -ffffffff8219b3b0 t sdma_v5_0_ring_test_ring -ffffffff8219b7d0 t sdma_v5_0_ring_test_ib -ffffffff8219bb60 t sdma_v5_0_ring_insert_nop -ffffffff8219bca0 t sdma_v5_0_ring_pad_ib -ffffffff8219bdd0 t sdma_v5_0_ring_init_cond_exec -ffffffff8219c020 t sdma_v5_0_ring_emit_wreg -ffffffff8219c180 t sdma_v5_0_ring_emit_reg_wait -ffffffff8219c420 t sdma_v5_0_ring_emit_reg_write_reg_wait -ffffffff8219c4b0 t sdma_v5_0_ring_preempt_ib -ffffffff8219c640 t sdma_v5_0_ring_emit_mem_sync -ffffffff8219c870 t sdma_v5_0_emit_copy_buffer -ffffffff8219c940 t sdma_v5_0_emit_fill_buffer -ffffffff8219c9d0 t sdma_v5_0_vm_copy_pte -ffffffff8219ca90 t sdma_v5_0_vm_write_pte -ffffffff8219cb60 t sdma_v5_0_vm_set_pte_pde -ffffffff8219cc60 t sdma_v5_0_set_trap_irq_state -ffffffff8219cd00 t sdma_v5_0_process_trap_irq -ffffffff8219ce30 t sdma_v5_0_process_illegal_inst_irq -ffffffff8219ce60 t sdma_v5_0_mqd_init -ffffffff8219cf50 t sdma_v5_0_ctx_switch_enable -ffffffff8219d2d0 t sdma_v5_0_enable -ffffffff8219e000 t sdma_v5_2_early_init -ffffffff8219e150 t sdma_v5_2_sw_init -ffffffff8219e400 t sdma_v5_2_sw_fini -ffffffff8219e4c0 t sdma_v5_2_hw_init -ffffffff821a02d0 t sdma_v5_2_hw_fini -ffffffff821a0330 t sdma_v5_2_suspend -ffffffff821a0390 t sdma_v5_2_resume -ffffffff821a03a0 t sdma_v5_2_is_idle -ffffffff821a0460 t sdma_v5_2_wait_for_idle -ffffffff821a0590 t sdma_v5_2_soft_reset -ffffffff821a08a0 t sdma_v5_2_set_clockgating_state -ffffffff821a0c40 t sdma_v5_2_set_powergating_state -ffffffff821a0c70 t sdma_v5_2_get_clockgating_state -ffffffff821a0d20 t sdma_v5_2_dump_ip_state -ffffffff821a0e80 t sdma_v5_2_print_ip_state -ffffffff821a0fa0 t sdma_v5_2_ring_get_rptr -ffffffff821a1000 t sdma_v5_2_ring_get_wptr -ffffffff821a1150 t sdma_v5_2_ring_set_wptr -ffffffff821a1370 t sdma_v5_2_ring_emit_ib -ffffffff821a1670 t sdma_v5_2_ring_emit_fence -ffffffff821a1b20 t sdma_v5_2_ring_emit_pipeline_sync -ffffffff821a1dd0 t sdma_v5_2_ring_emit_vm_flush -ffffffff821a1df0 t sdma_v5_2_ring_emit_hdp_flush -ffffffff821a20f0 t sdma_v5_2_ring_test_ring -ffffffff821a2510 t sdma_v5_2_ring_test_ib -ffffffff821a28a0 t sdma_v5_2_ring_insert_nop -ffffffff821a29e0 t sdma_v5_2_ring_pad_ib -ffffffff821a2b10 t sdma_v5_2_ring_init_cond_exec -ffffffff821a2d60 t sdma_v5_2_ring_begin_use -ffffffff821a2d80 t sdma_v5_2_ring_end_use -ffffffff821a2da0 t sdma_v5_2_ring_emit_wreg -ffffffff821a2f00 t sdma_v5_2_ring_emit_reg_wait -ffffffff821a31a0 t sdma_v5_2_ring_emit_reg_write_reg_wait -ffffffff821a3230 t sdma_v5_2_ring_preempt_ib -ffffffff821a33f0 t sdma_v5_2_ring_emit_mem_sync -ffffffff821a3620 t sdma_v5_2_emit_copy_buffer -ffffffff821a36f0 t sdma_v5_2_emit_fill_buffer -ffffffff821a3780 t sdma_v5_2_vm_copy_pte -ffffffff821a3840 t sdma_v5_2_vm_write_pte -ffffffff821a3910 t sdma_v5_2_vm_set_pte_pde -ffffffff821a3a10 t sdma_v5_2_set_trap_irq_state -ffffffff821a3ad0 t sdma_v5_2_process_trap_irq -ffffffff821a3c30 t sdma_v5_2_process_illegal_inst_irq -ffffffff821a3c60 t sdma_v5_2_mqd_init -ffffffff821a3d50 t sdma_v5_2_ctx_switch_enable -ffffffff821a41a0 t sdma_v5_2_enable -ffffffff821a5000 t sdma_v6_0_early_init -ffffffff821a5160 t sdma_v6_0_sw_init -ffffffff821a5370 t sdma_v6_0_sw_fini -ffffffff821a5430 t sdma_v6_0_hw_init -ffffffff821a5440 t sdma_v6_0_hw_fini -ffffffff821a5520 t sdma_v6_0_suspend -ffffffff821a5600 t sdma_v6_0_resume -ffffffff821a5610 t sdma_v6_0_is_idle -ffffffff821a56b0 t sdma_v6_0_wait_for_idle -ffffffff821a5790 t sdma_v6_0_check_soft_reset -ffffffff821a5860 t sdma_v6_0_soft_reset -ffffffff821a5db0 t sdma_v6_0_set_clockgating_state -ffffffff821a5de0 t sdma_v6_0_set_powergating_state -ffffffff821a5e10 t sdma_v6_0_get_clockgating_state -ffffffff821a5e40 t sdma_v6_0_dump_ip_state -ffffffff821a5f70 t sdma_v6_0_print_ip_state -ffffffff821a6090 t sdma_v6_0_ring_get_rptr -ffffffff821a60f0 t sdma_v6_0_ring_get_wptr -ffffffff821a6160 t sdma_v6_0_ring_set_wptr -ffffffff821a63a0 t sdma_v6_0_ring_emit_ib -ffffffff821a66a0 t sdma_v6_0_ring_emit_fence -ffffffff821a6b50 t sdma_v6_0_ring_emit_pipeline_sync -ffffffff821a6e00 t sdma_v6_0_ring_emit_vm_flush -ffffffff821a70a0 t sdma_v6_0_ring_emit_hdp_flush -ffffffff821a7370 t sdma_v6_0_ring_test_ring -ffffffff821a7790 t sdma_v6_0_ring_test_ib -ffffffff821a7b20 t sdma_v6_0_ring_insert_nop -ffffffff821a7c60 t sdma_v6_0_ring_pad_ib -ffffffff821a7d90 t sdma_v6_0_ring_init_cond_exec -ffffffff821a7fe0 t sdma_v6_0_ring_emit_wreg -ffffffff821a8140 t sdma_v6_0_ring_emit_reg_wait -ffffffff821a83e0 t sdma_v6_0_ring_emit_reg_write_reg_wait -ffffffff821a8470 t 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bios_get_image -ffffffff822ae050 T bios_is_accelerated_mode -ffffffff822ae0b0 T bios_set_scratch_acc_mode_change -ffffffff822ae0f0 T bios_set_scratch_critical_state -ffffffff822ae130 T bios_get_vga_enabled_displays -ffffffff822af000 T dal_bios_parser_create -ffffffff822af070 T dal_bios_parser_destroy -ffffffff822b0000 T dal_bios_parser_init_cmd_tbl -ffffffff822b08f0 t encoder_control_digx_v3 -ffffffff822b0a10 t encoder_control_digx_v4 -ffffffff822b0b30 t encoder_control_digx_v5 -ffffffff822b0ca0 t encoder_control_dig1_v1 -ffffffff822b0d40 t encoder_control_dig2_v1 -ffffffff822b0de0 t encoder_control_dig_v1 -ffffffff822b0e40 t transmitter_control_v2 -ffffffff822b0ff0 t transmitter_control_v3 -ffffffff822b11c0 t transmitter_control_v4 -ffffffff822b1390 t transmitter_control_v1_5 -ffffffff822b1540 t transmitter_control_v1_6 -ffffffff822b16c0 t set_pixel_clock_v3 -ffffffff822b1860 t set_pixel_clock_v5 -ffffffff822b1a30 t set_pixel_clock_v6 -ffffffff822b1c00 t set_pixel_clock_v7 -ffffffff822b1e10 t enable_spread_spectrum_on_ppll_v1 -ffffffff822b1f30 t enable_spread_spectrum_on_ppll_v2 -ffffffff822b2070 t enable_spread_spectrum_on_ppll_v3 -ffffffff822b2190 t adjust_display_pll_v2 -ffffffff822b2300 t adjust_display_pll_v3 -ffffffff822b24a0 t dac1_encoder_control_v1 -ffffffff822b2520 t dac2_encoder_control_v1 -ffffffff822b25a0 t dac1_output_control_v1 -ffffffff822b2610 t dac2_output_control_v1 -ffffffff822b2680 t set_crtc_using_dtd_timing_v3 -ffffffff822b27f0 t set_crtc_timing_v1 -ffffffff822b2990 t enable_crtc_v1 -ffffffff822b2a40 t enable_crtc_mem_req_v1 -ffffffff822b2af0 t program_clock_v5 -ffffffff822b2c10 t program_clock_v6 -ffffffff822b2d50 t external_encoder_control_v3 -ffffffff822b2f20 t enable_disp_power_gating_v2_1 -ffffffff822b3010 t set_dce_clock_v2_1 -ffffffff822b4000 T dal_firmware_parser_init_cmd_tbl -ffffffff822b4490 t encoder_control_digx_v1_5 -ffffffff822b4680 t encoder_control_fallback -ffffffff822b46e0 t transmitter_control_v1_6 -ffffffff822b48b0 t transmitter_control_v1_7 -ffffffff822b4ae0 t transmitter_control_fallback -ffffffff822b4b40 t set_pixel_clock_v7 -ffffffff822b4dd0 t set_pixel_clock_fallback -ffffffff822b4e30 t set_crtc_using_dtd_timing_v3 -ffffffff822b4fa0 t enable_crtc_v1 -ffffffff822b5050 t external_encoder_control_v3 -ffffffff822b5080 t enable_disp_power_gating_v2_1 -ffffffff822b5200 t enable_disp_power_gating_fallback -ffffffff822b5260 t set_dce_clock_v2_1 -ffffffff822b53b0 t get_smu_clock_info_v3_1 -ffffffff822b5420 t enable_lvtma_control -ffffffff822b6000 T dal_bios_parser_init_cmd_tbl_helper -ffffffff822b60c0 T dal_cmd_table_helper_controller_id_to_atom -ffffffff822b61c0 T dal_cmd_table_helper_transmitter_bp_to_atom -ffffffff822b6240 T dal_cmd_table_helper_encoder_mode_bp_to_atom -ffffffff822b62d0 T dal_cmd_table_helper_assign_control_parameter -ffffffff822b63b0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src -ffffffff822b6490 T dal_cmd_table_helper_encoder_id_to_atom -ffffffff822b7000 T dal_bios_parser_init_cmd_tbl_helper2 -ffffffff822b70d0 T dal_cmd_table_helper_controller_id_to_atom2 -ffffffff822b71c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 -ffffffff822b7240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 -ffffffff822b72d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 -ffffffff822b73b0 T dal_cmd_table_helper_encoder_id_to_atom2 -ffffffff822b8000 T dal_cmd_tbl_helper_dce110_get_table -ffffffff822b8030 t encoder_action_to_atom -ffffffff822b80a0 t engine_bp_to_atom -ffffffff822b80f0 t clock_source_id_to_atom -ffffffff822b8190 t clock_source_id_to_atom_phy_clk_src_id -ffffffff822b81e0 t signal_type_to_atom_dig_mode -ffffffff822b8240 t hpd_sel_to_atom -ffffffff822b8280 t dig_encoder_sel_to_atom -ffffffff822b82b0 t phy_id_to_atom -ffffffff822b82f0 t disp_power_gating_action_to_atom -ffffffff822b9000 T dal_cmd_tbl_helper_dce112_get_table2 -ffffffff822b9030 t encoder_action_to_atom -ffffffff822b90a0 t engine_bp_to_atom -ffffffff822b90f0 t clock_source_id_to_atom -ffffffff822b91c0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff822b9210 t signal_type_to_atom_dig_mode -ffffffff822b9270 t hpd_sel_to_atom -ffffffff822b92b0 t dig_encoder_sel_to_atom -ffffffff822b92e0 t phy_id_to_atom -ffffffff822b9320 t disp_power_gating_action_to_atom -ffffffff822b9390 t dc_clock_type_to_atom -ffffffff822b9410 t transmitter_color_depth_to_atom -ffffffff822ba000 T dal_cmd_tbl_helper_dce112_get_table -ffffffff822ba030 t encoder_action_to_atom -ffffffff822ba0a0 t engine_bp_to_atom -ffffffff822ba0f0 t clock_source_id_to_atom -ffffffff822ba1c0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff822ba210 t signal_type_to_atom_dig_mode -ffffffff822ba270 t hpd_sel_to_atom -ffffffff822ba2b0 t dig_encoder_sel_to_atom -ffffffff822ba2e0 t phy_id_to_atom -ffffffff822ba320 t disp_power_gating_action_to_atom -ffffffff822ba390 t dc_clock_type_to_atom -ffffffff822ba410 t transmitter_color_depth_to_atom -ffffffff822bb000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff81a9b000 T drm_client_setup +ffffffff81a9b080 T drm_client_setup_with_fourcc +ffffffff81a9b120 T drm_client_setup_with_color_mode +ffffffff81a9c000 T drm_color_ctm_s31_32_to_qm_n +ffffffff81a9c0d0 T drm_crtc_enable_color_mgmt +ffffffff81a9c1c0 T drm_mode_crtc_set_gamma_size +ffffffff81a9c2f0 T drm_mode_gamma_set_ioctl +ffffffff81a9c8b0 T drm_mode_gamma_get_ioctl +ffffffff81a9ca20 T drm_get_color_encoding_name +ffffffff81a9caa0 T drm_get_color_range_name +ffffffff81a9cb20 T drm_plane_create_color_properties +ffffffff81a9cdb0 T drm_color_lut_check +ffffffff81a9d000 T drm_connector_ida_init +ffffffff81a9d1c0 T drm_connector_ida_destroy +ffffffff81a9d380 T drm_get_connector_type_name +ffffffff81a9d3c0 T drm_connector_free_work_fn +ffffffff81a9d4a0 T drm_connector_init +ffffffff81a9d530 t __drm_connector_init +ffffffff81a9d970 T drm_connector_init_with_ddc +ffffffff81a9da00 T drmm_connector_init +ffffffff81a9dad0 t drm_connector_cleanup_action +ffffffff81a9daf0 T drmm_connector_hdmi_init +ffffffff81a9dd90 T drm_connector_attach_max_bpc_property +ffffffff81a9de60 T drm_connector_attach_hdr_output_metadata_property +ffffffff81a9deb0 T drm_connector_attach_edid_property +ffffffff81a9ded0 T drm_connector_attach_encoder +ffffffff81a9df60 T drm_connector_has_possible_encoder +ffffffff81a9dfa0 T drm_connector_cleanup +ffffffff81a9e3a0 T drm_connector_unregister +ffffffff81a9e450 T drm_mode_put_tile_group +ffffffff81a9e500 T drm_connector_register +ffffffff81a9e630 T drm_connector_unregister_all +ffffffff81a9e810 T drm_connector_list_iter_begin +ffffffff81a9e850 T drm_connector_list_iter_next +ffffffff81a9e970 T drm_connector_list_iter_end +ffffffff81a9ea50 T drm_connector_register_all +ffffffff81a9ec10 T drm_get_connector_status_name +ffffffff81a9ec60 T drm_get_connector_force_name +ffffffff81a9eca0 T drm_get_subpixel_order_name +ffffffff81a9ece0 T drm_get_dpms_name +ffffffff81a9ed20 T drm_display_info_set_bus_formats +ffffffff81a9ee10 T drm_get_dvi_i_select_name +ffffffff81a9ee70 T drm_get_dvi_i_subconnector_name +ffffffff81a9eed0 T drm_get_tv_mode_name +ffffffff81a9ef10 T drm_get_tv_mode_from_name +ffffffff81a9f180 T drm_get_tv_select_name +ffffffff81a9f1e0 T drm_get_tv_subconnector_name +ffffffff81a9f240 T drm_get_dp_subconnector_name +ffffffff81a9f2d0 T drm_get_colorspace_name +ffffffff81a9f310 T drm_hdmi_connector_get_broadcast_rgb_name +ffffffff81a9f350 T drm_hdmi_connector_get_output_format_name +ffffffff81a9f390 T drm_connector_create_standard_properties +ffffffff81a9f550 T drm_mode_create_dvi_i_properties +ffffffff81a9f600 T drm_connector_attach_dp_subconnector_property +ffffffff81a9f670 T drm_connector_attach_content_type_property +ffffffff81a9f710 T drm_mode_create_content_type_property +ffffffff81a9f7a0 T drm_connector_attach_tv_margin_properties +ffffffff81a9f820 T drm_mode_create_tv_margin_properties +ffffffff81a9f960 T drm_mode_create_tv_properties_legacy +ffffffff81a9fc10 T drm_mode_create_tv_properties +ffffffff81a9fe40 T drm_mode_create_scaling_mode_property +ffffffff81a9feb0 T drm_connector_attach_vrr_capable_property +ffffffff81a9ff50 T drm_connector_attach_scaling_mode_property +ffffffff81aa0170 T drm_mode_create_aspect_ratio_property +ffffffff81aa0200 T drm_mode_create_hdmi_colorspace_property +ffffffff81aa0220 t drm_mode_create_colorspace_property +ffffffff81aa0370 T drm_mode_create_dp_colorspace_property +ffffffff81aa03a0 T drm_mode_create_suggested_offset_properties +ffffffff81aa0480 T drm_connector_set_path_property +ffffffff81aa04e0 T drm_connector_set_tile_property +ffffffff81aa0650 T drm_connector_set_link_status_property +ffffffff81aa06b0 T drm_connector_attach_broadcast_rgb_property +ffffffff81aa0760 T drm_connector_attach_colorspace_property +ffffffff81aa07b0 T drm_connector_atomic_hdr_metadata_equal +ffffffff81aa0830 T drm_connector_set_vrr_capable_property +ffffffff81aa0880 T drm_connector_set_panel_orientation +ffffffff81aa0950 T drm_connector_set_panel_orientation_with_quirk +ffffffff81aa0a50 T drm_connector_set_orientation_from_panel +ffffffff81aa0b50 T drm_connector_create_privacy_screen_properties +ffffffff81aa0c00 T drm_connector_attach_privacy_screen_properties +ffffffff81aa0c80 T drm_connector_attach_privacy_screen_provider +ffffffff81aa0db0 t drm_connector_privacy_screen_notifier +ffffffff81aa0e80 T drm_connector_update_privacy_screen +ffffffff81aa0ef0 T drm_connector_set_obj_prop +ffffffff81aa1000 T drm_connector_property_set_ioctl +ffffffff81aa1060 T drm_mode_getconnector +ffffffff81aa15e0 T drm_connector_find_by_fwnode +ffffffff81aa16a0 T drm_connector_oob_hotplug_event +ffffffff81aa17b0 T drm_mode_get_tile_group +ffffffff81aa18c0 T drm_mode_create_tile_group +ffffffff81aa19b0 t drm_connector_free +ffffffff81aa1a00 t kasprintf +ffffffff81aa2000 T drm_crtc_from_index +ffffffff81aa2060 T drm_crtc_force_disable +ffffffff81aa21b0 T drm_mode_set_config_internal +ffffffff81aa2230 T drm_crtc_register_all +ffffffff81aa22c0 T drm_crtc_unregister_all +ffffffff81aa2340 T drm_crtc_create_fence +ffffffff81aa23d0 T drm_crtc_init_with_planes +ffffffff81aa24b0 t __drm_crtc_init_with_planes +ffffffff81aa2920 T drmm_crtc_init_with_planes +ffffffff81aa2a40 T __drmm_crtc_alloc_with_planes +ffffffff81aa2be0 T drm_crtc_cleanup +ffffffff81aa2d20 T drm_mode_getcrtc +ffffffff81aa2f00 t __drm_mode_set_config_internal +ffffffff81aa30c0 T drm_crtc_check_viewport +ffffffff81aa3180 T drm_mode_setcrtc +ffffffff81aa3ad0 T drm_mode_crtc_set_obj_prop +ffffffff81aa3b60 T drm_crtc_create_scaling_filter_property +ffffffff81aa3be0 t drm_crtc_fence_get_driver_name +ffffffff81aa3c60 t drm_crtc_fence_get_timeline_name +ffffffff81aa3cd0 t kasprintf +ffffffff81aa3db0 t drmm_crtc_init_with_planes_cleanup +ffffffff81aa4000 T drm_helper_encoder_in_use +ffffffff81aa41c0 T drm_helper_crtc_in_use +ffffffff81aa4300 T drm_helper_disable_unused_functions +ffffffff81aa43a0 t __drm_helper_disable_unused_functions +ffffffff81aa44e0 T drm_crtc_helper_set_mode +ffffffff81aa4ab0 T drm_crtc_helper_atomic_check +ffffffff81aa4b00 T drm_connector_get_single_encoder +ffffffff81aa4bf0 T drm_crtc_helper_set_config +ffffffff81aa5db0 T drm_helper_connector_dpms +ffffffff81aa6120 T drm_helper_resume_force_mode +ffffffff81aa64f0 T drm_helper_force_disable_all +ffffffff81aa7000 T drm_atomic_helper_check_plane_damage +ffffffff81aa70b0 T drm_atomic_helper_dirtyfb +ffffffff81aa73f0 T drm_atomic_helper_damage_iter_init +ffffffff81aa7550 T drm_atomic_helper_damage_iter_next +ffffffff81aa75f0 T drm_atomic_helper_damage_merged +ffffffff81aa8000 T displayid_iter_edid_begin +ffffffff81aa8050 T __displayid_iter_next +ffffffff81aa82e0 T displayid_iter_end +ffffffff81aa8330 T displayid_version +ffffffff81aa8360 T displayid_primary_use +ffffffff81aa9000 T drm_mode_create_dumb +ffffffff81aa90d0 T drm_mode_create_dumb_ioctl +ffffffff81aa91a0 T drm_mode_mmap_dumb_ioctl +ffffffff81aa9210 T drm_mode_destroy_dumb +ffffffff81aa9260 T drm_mode_destroy_dumb_ioctl +ffffffff81aaa000 T drm_edid_header_is_valid +ffffffff81aaa080 T drm_edid_is_valid +ffffffff81aaa2f0 T drm_edid_valid +ffffffff81aaa430 t drm_edid_block_count +ffffffff81aaa570 T drm_edid_override_show +ffffffff81aaa5d0 T drm_edid_override_set +ffffffff81aaa7e0 T drm_edid_alloc +ffffffff81aaa8c0 T drm_edid_free +ffffffff81aaa920 T drm_edid_override_reset +ffffffff81aaaa00 T drm_edid_override_connector_update +ffffffff81aaab00 t drm_edid_override_get +ffffffff81aaac20 T drm_edid_connector_update +ffffffff81aab110 T drm_edid_connector_add_modes +ffffffff81aab270 T drm_edid_raw +ffffffff81aab300 T drm_edid_dup +ffffffff81aab3f0 T drm_probe_ddc +ffffffff81aab500 t drm_do_probe_ddc_edid +ffffffff81aab660 T drm_get_edid +ffffffff81aab7f0 t _drm_do_get_edid +ffffffff81aabcf0 T drm_connector_update_edid_property +ffffffff81aabd60 T drm_edid_read_custom +ffffffff81aabe80 T drm_edid_read_ddc +ffffffff81aabfc0 T drm_edid_read +ffffffff81aac050 T drm_edid_get_product_id +ffffffff81aac0b0 T drm_edid_print_product_id +ffffffff81aac170 T drm_edid_get_panel_id +ffffffff81aac1d0 T drm_edid_read_base_block +ffffffff81aac3a0 t edid_block_read +ffffffff81aac680 t edid_block_status_print +ffffffff81aac770 T drm_get_edid_switcheroo +ffffffff81aac7c0 T drm_edid_read_switcheroo +ffffffff81aac810 T drm_edid_duplicate +ffffffff81aac8a0 T drm_mode_find_dmt +ffffffff81aac9d0 T drm_mode_fixup_1366x768 +ffffffff81aaca20 T drm_edid_find_extension +ffffffff81aacad0 T drm_match_cea_mode +ffffffff81aacd70 T drm_display_mode_from_cea_vic +ffffffff81aacde0 T drm_edid_match +ffffffff81aace90 t drm_for_each_detailed_block +ffffffff81aad080 t match_identity +ffffffff81aad150 T drm_edid_get_monitor_name +ffffffff81aad210 t get_monitor_name +ffffffff81aad680 T drm_edid_cta_sad_get +ffffffff81aad6c0 T drm_edid_cta_sad_set +ffffffff81aad710 T drm_edid_to_sad +ffffffff81aad940 T drm_edid_to_speaker_allocation +ffffffff81aadb20 T drm_av_sync_delay +ffffffff81aadbd0 T drm_detect_hdmi_monitor +ffffffff81aadd10 T drm_detect_monitor_audio +ffffffff81aadec0 T drm_default_rgb_quant_range +ffffffff81aadf10 T drm_edid_connector_property_show +ffffffff81aadfe0 t update_display_info +ffffffff81aafb50 t _drm_edid_connector_add_modes +ffffffff81ab12f0 T drm_add_edid_modes +ffffffff81ab13e0 T drm_add_modes_noedid +ffffffff81ab14f0 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff81ab17e0 T drm_hdmi_avi_infoframe_quant_range +ffffffff81ab1880 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff81ab1960 T drm_edid_is_digital +ffffffff81ab19a0 t edid_block_check +ffffffff81ab1ae0 t connector_bad_edid +ffffffff81ab1cd0 t edid_filter_invalid_blocks +ffffffff81ab1e90 t __cea_db_iter_next +ffffffff81ab20b0 t get_monitor_range +ffffffff81ab2150 t do_detailed_mode +ffffffff81ab2bf0 t do_cvt_mode +ffffffff81ab2e80 t drm_mode_std +ffffffff81ab38d0 t do_standard_modes +ffffffff81ab3a80 t drm_monitor_supports_rb +ffffffff81ab3e90 t drm_gtf2_mode +ffffffff81ab4c90 t drm_gtf2_hbreak +ffffffff81ab5000 t do_established_modes +ffffffff81ab5220 t drm_match_hdmi_mode +ffffffff81ab53b0 t do_inferred_modes +ffffffff81ab5b20 t mode_in_range +ffffffff81ab6000 T drm_eld_sad_get +ffffffff81ab6070 T drm_eld_sad_set +ffffffff81ab7000 T drm_encoder_register_all +ffffffff81ab7090 T drm_encoder_unregister_all +ffffffff81ab7110 T drm_encoder_init +ffffffff81ab71e0 t __drm_encoder_init +ffffffff81ab73e0 T drm_encoder_cleanup +ffffffff81ab7530 T __drmm_encoder_alloc +ffffffff81ab7670 T drmm_encoder_init +ffffffff81ab7760 T drm_mode_getencoder +ffffffff81ab7920 t kasprintf +ffffffff81ab7a00 t drmm_encoder_alloc_release +ffffffff81ab8000 T drm_i2c_encoder_dpms +ffffffff81ab8020 T drm_i2c_encoder_mode_fixup +ffffffff81ab8060 T drm_i2c_encoder_prepare +ffffffff81ab8080 T drm_i2c_encoder_commit +ffffffff81ab80a0 T drm_i2c_encoder_mode_set +ffffffff81ab80c0 T drm_i2c_encoder_detect +ffffffff81ab80e0 T drm_i2c_encoder_save +ffffffff81ab8100 T drm_i2c_encoder_restore +ffffffff81ab9000 T drm_exec_init +ffffffff81ab90a0 T drm_exec_fini +ffffffff81ab9130 t drm_exec_unlock_all +ffffffff81ab92d0 T drm_exec_cleanup +ffffffff81ab9370 T drm_exec_lock_obj +ffffffff81ab9680 t drm_exec_obj_locked +ffffffff81ab9770 t dma_resv_unlock +ffffffff81ab9820 T drm_exec_unlock_obj +ffffffff81ab99d0 T drm_exec_prepare_obj +ffffffff81ab9a70 T drm_exec_prepare_array +ffffffff81ab9b40 t dma_resv_lock_slow_interruptible +ffffffff81ab9ca0 t dma_resv_lock_slow +ffffffff81ab9d90 t __ww_mutex_lock +ffffffff81aba000 T drm_fb_dma_get_gem_obj +ffffffff81abb000 T drm_fb_helper_debug_enter +ffffffff81abb110 T drm_fb_helper_debug_leave +ffffffff81abb2b0 T drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81abb370 t __drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81abb440 T drm_fb_helper_blank +ffffffff81abb570 T drm_fb_helper_prepare +ffffffff81abb690 t drm_fb_helper_resume_worker +ffffffff81abb6c0 t drm_fb_helper_damage_work +ffffffff81abb850 T drm_fb_helper_unprepare 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drm_fbdev_dma_helper_fb_dirty +ffffffff81abe600 t drm_fbdev_dma_client_unregister +ffffffff81abe660 t drm_fbdev_dma_client_restore +ffffffff81abe6b0 t drm_fbdev_dma_client_hotplug +ffffffff81abf000 T drm_fbdev_ttm_driver_fbdev_probe +ffffffff81abf1b0 T drm_fbdev_ttm_setup +ffffffff81abf380 t drm_fbdev_ttm_helper_fb_probe +ffffffff81abf390 t drm_fbdev_ttm_helper_fb_dirty +ffffffff81abf690 t drm_fbdev_ttm_client_unregister +ffffffff81abf6f0 t drm_fbdev_ttm_client_restore +ffffffff81abf740 t drm_fbdev_ttm_client_hotplug +ffffffff81ac0000 T drm_dev_needs_global_mutex +ffffffff81ac0040 T drm_file_alloc +ffffffff81ac0330 T drm_file_free +ffffffff81ac05c0 T drm_lastclose +ffffffff81ac05d0 T drm_release +ffffffff81ac0630 T drm_file_update_pid +ffffffff81ac0680 T drm_release_noglobal +ffffffff81ac06e0 T drm_read +ffffffff81ac0740 T drm_event_reserve_init_locked +ffffffff81ac07c0 T drm_event_reserve_init +ffffffff81ac0890 T drm_event_cancel_free +ffffffff81ac0920 T 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drm_gem_dma_prime_import_sg_table +ffffffff81acf720 T drm_gem_dma_vmap +ffffffff81ad0000 T drm_gem_fb_destroy +ffffffff81ad00d0 T drm_gem_fb_create_handle +ffffffff81ad00f0 T drm_gem_fb_create +ffffffff81ad0270 T drm_gem_fb_get_obj +ffffffff81ad1000 T drm_getunique +ffffffff81ad10c0 T drm_getclient +ffffffff81ad1140 T drm_noop +ffffffff81ad11a0 T drm_invalid_op +ffffffff81ad11d0 T drm_version +ffffffff81ad1410 T pledge_ioctl_drm +ffffffff81ad14f0 T drm_ioctl_kernel +ffffffff81ad1550 T drm_ioctl_flags +ffffffff81ad15a0 T drm_do_ioctl +ffffffff81ad18e0 T drmioctl +ffffffff81ad1a70 t drm_getstats +ffffffff81ad1ac0 t drm_setversion +ffffffff81ad1c50 t drm_getcap +ffffffff81ad1e20 t drm_setclientcap +ffffffff81ad2000 T tasklet_unlock_wait +ffffffff81ad2090 T tasklet_unlock_spin_wait +ffffffff81ad2120 T tasklet_run +ffffffff81ad2180 T set_current_state +ffffffff81ad2220 T __set_current_state +ffffffff81ad22b0 T schedule +ffffffff81ad22f0 T schedule_timeout +ffffffff81ad23b0 T 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dma_fence_timestamp +ffffffff81ad7870 T dma_fence_wait_timeout +ffffffff81ad78d0 T dma_fence_default_wait +ffffffff81ad7ad0 T dma_fence_wait +ffffffff81ad7b40 T dma_fence_enable_sw_signaling +ffffffff81ad7cb0 T dma_fence_init +ffffffff81ad7d10 T dma_fence_add_callback +ffffffff81ad7e60 T dma_fence_remove_callback +ffffffff81ad7ef0 T dma_fence_context_alloc +ffffffff81ad7f30 t dma_fence_default_wait_cb +ffffffff81ad7f80 T dma_fence_wait_any_timeout +ffffffff81ad82e0 T dma_fence_set_deadline +ffffffff81ad8390 T dma_fence_get_stub +ffffffff81ad8540 T dma_fence_allocate_private_stub +ffffffff81ad8670 T dma_fence_array_create +ffffffff81ad87a0 t irq_dma_fence_array_work +ffffffff81ad8840 T dma_fence_array_first +ffffffff81ad8890 T dma_fence_array_next +ffffffff81ad88e0 t dma_fence_array_get_driver_name +ffffffff81ad8910 t dma_fence_array_get_timeline_name +ffffffff81ad8940 t dma_fence_array_enable_signaling +ffffffff81ad8a50 t dma_fence_array_signaled +ffffffff81ad8aa0 t dma_fence_array_release +ffffffff81ad8b70 T dma_fence_chain_find_seqno +ffffffff81ad8ca0 T dma_fence_chain_walk +ffffffff81ad8f00 T dma_fence_chain_init +ffffffff81ad9010 t dma_fence_chain_get_driver_name +ffffffff81ad9040 t dma_fence_chain_get_timeline_name +ffffffff81ad9070 t dma_fence_chain_enable_signaling +ffffffff81ad9260 t dma_fence_chain_signaled +ffffffff81ad9360 t dma_fence_chain_release +ffffffff81ad94c0 T dma_fence_is_container +ffffffff81ad9510 T dmabuf_read +ffffffff81ad9540 T dmabuf_write +ffffffff81ad9570 T dmabuf_ioctl +ffffffff81ad95a0 T dmabuf_kqfilter +ffffffff81ad95d0 T dmabuf_stat +ffffffff81ad9690 T dmabuf_close +ffffffff81ad9720 T dmabuf_seek +ffffffff81ad97c0 T dma_buf_export +ffffffff81ad9880 T dma_buf_get +ffffffff81ad9920 T dma_buf_put +ffffffff81ad99d0 T dma_buf_fd +ffffffff81ad9b20 T get_dma_buf +ffffffff81ad9b70 T pcie_get_speed_cap +ffffffff81ad9d60 T printk +ffffffff81ad9e10 T pcie_get_width_cap +ffffffff81ad9f30 T pcie_aspm_enabled +ffffffff81ad9fd0 T wait_on_bit +ffffffff81ada0b0 T wait_on_bit_timeout +ffffffff81ada180 T wake_up_bit +ffffffff81ada1d0 T clear_and_wake_up_bit +ffffffff81ada240 T bit_waitqueue +ffffffff81ada270 T __var_waitqueue +ffffffff81ada2a0 T drm_linux_init +ffffffff81ada4c0 T drm_linux_exit +ffffffff81ada560 T pci_resize_resource +ffffffff81ada6d0 T shrinker_alloc +ffffffff81ada730 T shrinker_register +ffffffff81ada780 T shrinker_free +ffffffff81ada7d0 T drmbackoff +ffffffff81ada880 T bitmap_zalloc +ffffffff81ada8b0 T bitmap_free +ffffffff81ada8d0 T atomic_dec_and_mutex_lock +ffffffff81ada960 T interval_tree_iter_first +ffffffff81adaa10 T interval_tree_remove +ffffffff81adaa30 T interval_tree_insert +ffffffff81adaaa0 T syncfile_read +ffffffff81adaad0 T syncfile_write +ffffffff81adab00 T syncfile_ioctl +ffffffff81adab30 T syncfile_kqfilter +ffffffff81adab60 T syncfile_stat +ffffffff81adac10 T syncfile_close +ffffffff81adacc0 T syncfile_seek +ffffffff81adad50 T fd_install +ffffffff81adae00 T fput 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drm_managed_release +ffffffff81adc790 T drmm_add_final_kfree +ffffffff81add000 T mipi_dsi_attach +ffffffff81add070 T mipi_dsi_detach +ffffffff81add110 T devm_mipi_dsi_attach +ffffffff81add1a0 T mipi_dsi_packet_format_is_short +ffffffff81add1e0 T mipi_dsi_packet_format_is_long +ffffffff81add220 T mipi_dsi_create_packet +ffffffff81add330 T mipi_dsi_shutdown_peripheral +ffffffff81add3e0 T mipi_dsi_turn_on_peripheral +ffffffff81add490 T mipi_dsi_set_maximum_return_packet_size +ffffffff81add540 T mipi_dsi_compression_mode_ext +ffffffff81add610 T mipi_dsi_compression_mode +ffffffff81add6c0 T mipi_dsi_picture_parameter_set +ffffffff81add770 T mipi_dsi_generic_write +ffffffff81add830 T mipi_dsi_generic_write_chatty +ffffffff81add950 T mipi_dsi_generic_write_multi +ffffffff81adda80 T mipi_dsi_generic_read +ffffffff81addb40 T mipi_dsi_dcs_write_buffer +ffffffff81addc00 T mipi_dsi_dcs_write_buffer_chatty +ffffffff81addd20 T mipi_dsi_dcs_write_buffer_multi +ffffffff81adde50 T mipi_dsi_dcs_write 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drm_mode_match +ffffffff81ae6cb0 T drm_mode_equal +ffffffff81ae6cd0 T drm_mode_equal_no_clocks +ffffffff81ae6cf0 T drm_mode_equal_no_clocks_no_stereo +ffffffff81ae6db0 T drm_mode_validate_driver +ffffffff81ae6ea0 T drm_mode_validate_size +ffffffff81ae6ef0 T drm_mode_validate_ycbcr420 +ffffffff81ae6f60 T drm_mode_is_420_only +ffffffff81ae6fc0 T drm_get_mode_status_name +ffffffff81ae7040 T drm_mode_prune_invalid +ffffffff81ae7570 T drm_mode_sort +ffffffff81ae75a0 t drm_mode_compare +ffffffff81ae7860 T drm_connector_list_update +ffffffff81ae7a50 T drm_mode_parse_command_line_for_connector +ffffffff81ae7a80 T drm_mode_create_from_cmdline_mode +ffffffff81ae7ca0 T drm_mode_convert_to_umode +ffffffff81ae7eb0 T drm_mode_convert_umode +ffffffff81ae8100 T drm_mode_is_420_also +ffffffff81ae8160 T drm_mode_is_420 +ffffffff81ae8200 T drm_set_preferred_mode +ffffffff81ae9000 T drm_helper_move_panel_connectors_to_head +ffffffff81ae9100 T drm_helper_mode_fill_fb_struct +ffffffff81ae91d0 T drm_crtc_init +ffffffff81ae92c0 T drm_mode_config_helper_suspend +ffffffff81ae9380 T drm_mode_config_helper_resume +ffffffff81aea000 T drm_modeset_lock_all +ffffffff81aea2f0 T drm_modeset_acquire_init +ffffffff81aea380 T drm_modeset_lock_all_ctx +ffffffff81aea480 T drm_modeset_backoff +ffffffff81aea560 T drm_modeset_acquire_fini +ffffffff81aea590 T drm_warn_on_modeset_not_all_locked +ffffffff81aea710 T drm_modeset_unlock_all +ffffffff81aea810 T drm_modeset_drop_locks +ffffffff81aea8a0 T drm_modeset_unlock +ffffffff81aea980 t modeset_lock +ffffffff81aead20 T drm_modeset_lock_init +ffffffff81aead90 T drm_modeset_lock +ffffffff81aeaed0 T drm_modeset_lock_single_interruptible +ffffffff81aeb020 t __ww_mutex_lock +ffffffff81aec000 T drm_mtrr_add +ffffffff81aec080 T drm_mtrr_del +ffffffff81aed000 T drm_panel_init +ffffffff81aed090 T drm_panel_add +ffffffff81aed0f0 T drm_panel_remove +ffffffff81aed150 T drm_panel_prepare +ffffffff81aed280 T drm_panel_unprepare +ffffffff81aed3c0 T drm_panel_enable +ffffffff81aed4d0 T drm_panel_disable +ffffffff81aed5d0 T drm_panel_get_modes +ffffffff81aed630 T drm_is_panel_follower +ffffffff81aed680 T drm_panel_add_follower +ffffffff81aed6e0 T drm_panel_remove_follower +ffffffff81aed700 T devm_drm_panel_add_follower +ffffffff81aed760 T drm_panel_of_backlight +ffffffff81aee000 T drm_get_panel_orientation_quirk +ffffffff81aef000 T drm_pci_set_busid +ffffffff81aef0b0 t kasprintf +ffffffff81af0000 T drm_universal_plane_init +ffffffff81af0100 t __drm_universal_plane_init +ffffffff81af06e0 T __drmm_universal_plane_alloc +ffffffff81af0850 t drmm_universal_plane_alloc_release +ffffffff81af08a0 T __drm_universal_plane_alloc +ffffffff81af0a00 T drm_plane_register_all +ffffffff81af0b10 T drm_plane_unregister_all +ffffffff81af0b90 T drm_plane_cleanup +ffffffff81af0d10 T drm_plane_from_index +ffffffff81af0d70 T drm_plane_force_disable +ffffffff81af0eb0 T drm_mode_plane_set_obj_prop +ffffffff81af0f40 T drm_mode_getplane_res +ffffffff81af1080 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drm_plane_helper_update_primary +ffffffff81af4530 t get_connectors_for_crtc +ffffffff81af4670 T drm_plane_helper_disable_primary +ffffffff81af4730 T drm_plane_helper_destroy +ffffffff81af5000 T drm_prime_remove_buf_handle +ffffffff81af50d0 T drm_prime_init_file_private +ffffffff81af5130 T drm_prime_destroy_file_private +ffffffff81af5190 T drm_gem_dmabuf_export +ffffffff81af5210 T drm_gem_dmabuf_release +ffffffff81af5250 T drm_gem_prime_fd_to_handle +ffffffff81af54e0 T drm_gem_prime_import +ffffffff81af5550 t drm_prime_add_buf_handle +ffffffff81af56b0 T drm_prime_fd_to_handle_ioctl +ffffffff81af56e0 T drm_gem_prime_handle_to_dmabuf +ffffffff81af5970 T drm_gem_prime_handle_to_fd +ffffffff81af5a40 T drm_prime_handle_to_fd_ioctl +ffffffff81af5b60 T drm_gem_map_attach +ffffffff81af5bb0 T drm_gem_map_detach +ffffffff81af5bd0 T drm_gem_dmabuf_vmap +ffffffff81af5bf0 T drm_gem_dmabuf_vunmap +ffffffff81af5c10 T drm_gem_prime_mmap +ffffffff81af5c70 T drm_prime_pages_to_sg +ffffffff81af5cd0 T drm_prime_get_contiguous_size +ffffffff81af5d20 T drm_gem_prime_export +ffffffff81af5dc0 T drm_gem_prime_import_dev +ffffffff81af5e30 T drm_prime_sg_to_page_array +ffffffff81af5e90 T drm_prime_sg_to_dma_addr_array +ffffffff81af5ef0 T drm_prime_gem_destroy +ffffffff81af6000 T __drm_puts_coredump +ffffffff81af6110 T __drm_printfn_coredump +ffffffff81af6340 T __drm_puts_seq_file +ffffffff81af6370 T __drm_printfn_seq_file +ffffffff81af63a0 T __drm_printfn_dbg +ffffffff81af6470 T __drm_printfn_info +ffffffff81af64a0 T __drm_printfn_debug +ffffffff81af64d0 T __drm_printfn_err +ffffffff81af6510 T drm_puts +ffffffff81af6540 T drm_printf +ffffffff81af65d0 T drm_print_bits +ffffffff81af6830 T drm_dev_printk +ffffffff81af68d0 T __drm_dev_dbg +ffffffff81af6970 T ___drm_dbg +ffffffff81af6a10 T __drm_err +ffffffff81af6ab0 T drm_print_regset32 +ffffffff81af7000 T drm_crtc_mode_valid +ffffffff81af7050 T drm_encoder_mode_valid +ffffffff81af7090 T drm_connector_mode_valid +ffffffff81af7110 T drm_kms_helper_poll_enable +ffffffff81af72d0 T drm_kms_helper_poll_reschedule +ffffffff81af7330 T drm_helper_probe_detect +ffffffff81af7570 T drm_helper_probe_single_connector_modes +ffffffff81af7dd0 t __drm_helper_update_and_validate +ffffffff81af81f0 T drm_kms_helper_hotplug_event +ffffffff81af8220 T drm_kms_helper_connector_hotplug_event +ffffffff81af8250 T drm_kms_helper_is_poll_worker +ffffffff81af8280 T drm_kms_helper_poll_disable +ffffffff81af83b0 T drm_kms_helper_poll_init +ffffffff81af8430 t output_poll_execute +ffffffff81af8730 T drm_kms_helper_poll_fini +ffffffff81af8780 T drmm_kms_helper_poll_init +ffffffff81af8810 t drm_kms_helper_poll_init_release +ffffffff81af8860 T drm_connector_helper_hpd_irq_event +ffffffff81af8940 t check_connector_changed +ffffffff81af8b40 T drm_helper_hpd_irq_event +ffffffff81af8cc0 T drm_crtc_helper_mode_valid_fixed +ffffffff81af8d10 T drm_connector_helper_get_modes_fixed +ffffffff81af8ea0 T drm_connector_helper_get_modes +ffffffff81af8f30 T drm_connector_helper_tv_get_modes +ffffffff81af91c0 T drm_connector_helper_detect_from_ddc +ffffffff81af9220 t __delayed_work_tick +ffffffff81afa000 T drm_property_create +ffffffff81afa220 T drm_property_create_enum +ffffffff81afa2e0 T drm_property_add_enum +ffffffff81afa510 T drm_property_destroy +ffffffff81afa5d0 T drm_property_create_bitmask +ffffffff81afa710 T drm_property_create_range +ffffffff81afa780 T drm_property_create_signed_range +ffffffff81afa7f0 T drm_property_create_object +ffffffff81afa8a0 T drm_property_create_bool +ffffffff81afa910 T drm_mode_getproperty_ioctl +ffffffff81afab90 T drm_property_create_blob +ffffffff81afad00 t drm_property_free_blob +ffffffff81afad90 T drm_property_blob_put +ffffffff81afadd0 T drm_property_destroy_user_blobs +ffffffff81afae60 T drm_property_blob_get +ffffffff81afaeb0 T drm_property_lookup_blob +ffffffff81afaed0 T drm_property_replace_global_blob +ffffffff81afb050 T drm_property_replace_blob +ffffffff81afb0c0 T drm_property_replace_blob_from_id +ffffffff81afb290 T drm_mode_getblob_ioctl +ffffffff81afb370 T drm_mode_createblob_ioctl +ffffffff81afb4a0 T drm_mode_destroyblob_ioctl +ffffffff81afb5e0 T drm_property_change_valid_get +ffffffff81afb850 T drm_property_change_valid_put +ffffffff81afc000 T drm_rect_intersect +ffffffff81afc080 T drm_rect_clip_scaled +ffffffff81afc2f0 T drm_rect_calc_hscale +ffffffff81afc3d0 T drm_rect_calc_vscale +ffffffff81afc4b0 T drm_rect_debug_print +ffffffff81afc5e0 T drm_rect_rotate +ffffffff81afc6a0 T drm_rect_rotate_inv +ffffffff81afd000 T drm_self_refresh_helper_update_avg_times +ffffffff81afd170 T drm_self_refresh_helper_alter_state +ffffffff81afd320 T drm_self_refresh_helper_init +ffffffff81afd4f0 t drm_self_refresh_helper_entry_work +ffffffff81afd6a0 T drm_self_refresh_helper_cleanup +ffffffff81afd730 t __delayed_work_tick +ffffffff81afe000 T drm_suballoc_manager_init +ffffffff81afe1a0 T drm_suballoc_manager_fini +ffffffff81afe2e0 t drm_suballoc_try_free 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+ffffffff81b0bd10 T hdmi_vendor_infoframe_pack +ffffffff81b0bdb0 T hdmi_drm_infoframe_init +ffffffff81b0be10 T hdmi_drm_infoframe_check +ffffffff81b0be60 T hdmi_drm_infoframe_pack_only +ffffffff81b0c060 T hdmi_drm_infoframe_pack +ffffffff81b0c0b0 T hdmi_infoframe_check +ffffffff81b0c210 T hdmi_infoframe_pack_only +ffffffff81b0c440 T hdmi_infoframe_pack +ffffffff81b0c5c0 T hdmi_infoframe_log +ffffffff81b0ce10 T hdmi_drm_infoframe_unpack_only +ffffffff81b0cef0 T hdmi_infoframe_unpack +ffffffff81b0e000 T list_sort +ffffffff81b0f000 T radix_tree_lookup +ffffffff81b0f0b0 T radix_tree_iter_find +ffffffff81b0f180 T radix_tree_delete +ffffffff81b0f330 T radix_tree_iter_delete +ffffffff81b0f350 T radix_tree_insert +ffffffff81b10000 T sort +ffffffff81b10040 t qsort +ffffffff81b12000 T sort_r +ffffffff81b12050 t qsort_r +ffffffff81b14000 T drm_dp_dual_mode_read +ffffffff81b14140 T drm_dp_dual_mode_write +ffffffff81b14240 T drm_dp_dual_mode_detect +ffffffff81b14540 T drm_dp_dual_mode_max_tmds_clock +ffffffff81b14680 T drm_dp_dual_mode_get_tmds_output +ffffffff81b147c0 T drm_dp_dual_mode_set_tmds_output +ffffffff81b14a90 T drm_dp_get_dual_mode_type_name +ffffffff81b14b10 T drm_lspcon_get_mode +ffffffff81b14d80 T drm_lspcon_set_mode +ffffffff81b16000 T drm_dp_channel_eq_ok +ffffffff81b16080 T drm_dp_clock_recovery_ok +ffffffff81b160f0 T drm_dp_get_adjust_request_voltage +ffffffff81b16130 T drm_dp_get_adjust_request_pre_emphasis +ffffffff81b16180 T drm_dp_get_adjust_tx_ffe_preset +ffffffff81b161c0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff81b16240 T drm_dp_128b132b_lane_symbol_locked +ffffffff81b162b0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff81b162e0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff81b16310 T drm_dp_128b132b_link_training_failed +ffffffff81b16340 T drm_dp_read_clock_recovery_delay +ffffffff81b16450 T drm_dp_read_channel_eq_delay +ffffffff81b16560 T drm_dp_128b132b_read_aux_rd_interval +ffffffff81b16630 T drm_dp_link_train_clock_recovery_delay +ffffffff81b166c0 t __8b10b_clock_recovery_delay_us +ffffffff81b16740 T drm_dp_link_train_channel_eq_delay +ffffffff81b167b0 T drm_dp_phy_name +ffffffff81b167f0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff81b16810 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff81b16880 T drm_dp_link_rate_to_bw_code +ffffffff81b168f0 T drm_dp_bw_code_to_link_rate +ffffffff81b16950 T drm_dp_dpcd_probe +ffffffff81b16ac0 t drm_dp_dpcd_access +ffffffff81b16c30 T drm_dp_dpcd_set_powered +ffffffff81b16ca0 T drm_dp_dpcd_read +ffffffff81b16e00 T drm_dp_dpcd_write +ffffffff81b16f30 T drm_dp_dpcd_read_link_status +ffffffff81b16f50 T drm_dp_dpcd_read_phy_link_status +ffffffff81b17060 T drm_dp_downstream_is_type +ffffffff81b170b0 T drm_dp_downstream_is_tmds +ffffffff81b17140 T drm_dp_send_real_edid_checksum +ffffffff81b173e0 T drm_dp_read_dpcd_caps +ffffffff81b175a0 T drm_dp_read_downstream_info +ffffffff81b176b0 T drm_dp_downstream_max_dotclock +ffffffff81b17700 T drm_dp_downstream_max_tmds_clock +ffffffff81b177d0 T drm_dp_downstream_min_tmds_clock +ffffffff81b17870 T drm_dp_downstream_max_bpc +ffffffff81b17940 T drm_dp_downstream_420_passthrough +ffffffff81b179a0 T drm_dp_downstream_444_to_420_conversion +ffffffff81b17a00 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff81b17a60 T drm_dp_downstream_mode +ffffffff81b17af0 T drm_dp_downstream_id +ffffffff81b17b10 T drm_dp_downstream_debug +ffffffff81b17c50 T drm_dp_subconnector_type +ffffffff81b17cc0 T drm_dp_set_subconnector_property +ffffffff81b17d30 T drm_dp_read_sink_count_cap +ffffffff81b17d80 T drm_dp_read_sink_count +ffffffff81b17df0 T drm_dp_remote_aux_init +ffffffff81b17e20 t drm_dp_aux_crc_work +ffffffff81b17fc0 T drm_dp_aux_init +ffffffff81b18090 T drm_dp_aux_register +ffffffff81b181e0 T drm_dp_aux_unregister +ffffffff81b18210 T drm_dp_psr_setup_time +ffffffff81b18260 T drm_dp_start_crc +ffffffff81b18320 T drm_dp_stop_crc +ffffffff81b183d0 T drm_dp_read_desc +ffffffff81b18600 T drm_dp_dump_lttpr_desc +ffffffff81b187a0 T drm_dp_dsc_sink_bpp_incr +ffffffff81b187f0 T drm_dp_dsc_sink_max_slice_count +ffffffff81b18880 T drm_dp_dsc_sink_line_buf_depth +ffffffff81b188c0 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff81b18920 T drm_dp_read_lttpr_common_caps +ffffffff81b189f0 T drm_dp_read_lttpr_phy_caps +ffffffff81b18ac0 T drm_dp_lttpr_count +ffffffff81b18b50 T drm_dp_lttpr_max_link_rate +ffffffff81b18bb0 T drm_dp_lttpr_max_lane_count +ffffffff81b18be0 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff81b18c10 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff81b18c40 T drm_dp_get_phy_test_pattern +ffffffff81b18d90 T drm_dp_set_phy_test_pattern +ffffffff81b18e60 T drm_dp_vsc_sdp_log +ffffffff81b190f0 T drm_dp_as_sdp_log +ffffffff81b191c0 T drm_dp_as_sdp_supported +ffffffff81b19260 T drm_dp_vsc_sdp_supported +ffffffff81b19310 T drm_dp_vsc_sdp_pack +ffffffff81b19440 T drm_dp_get_pcon_max_frl_bw +ffffffff81b19490 T drm_dp_pcon_frl_prepare +ffffffff81b194f0 T drm_dp_pcon_is_frl_ready +ffffffff81b19550 T drm_dp_pcon_frl_configure_1 +ffffffff81b19660 T drm_dp_pcon_frl_configure_2 +ffffffff81b196d0 T drm_dp_pcon_reset_frl_config +ffffffff81b19730 T drm_dp_pcon_frl_enable +ffffffff81b19800 T drm_dp_pcon_hdmi_link_active +ffffffff81b19860 T drm_dp_pcon_hdmi_link_mode +ffffffff81b198e0 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff81b199f0 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff81b19a20 T drm_dp_pcon_dsc_max_slices +ffffffff81b19ab0 T drm_dp_pcon_dsc_max_slice_width +ffffffff81b19ae0 T drm_dp_pcon_dsc_bpp_incr +ffffffff81b19b20 T drm_dp_pcon_pps_default +ffffffff81b19bb0 T drm_dp_pcon_pps_override_buf +ffffffff81b19c70 T drm_dp_pcon_pps_override_param +ffffffff81b19d80 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff81b19e30 T drm_edp_backlight_set_level +ffffffff81b19f20 T drm_edp_backlight_enable +ffffffff81b1a170 t drm_edp_backlight_set_enable +ffffffff81b1a2d0 T drm_edp_backlight_disable +ffffffff81b1a320 T drm_edp_backlight_init +ffffffff81b1a8e0 T drm_panel_dp_aux_backlight +ffffffff81b1aaa0 T drm_dp_bw_overhead +ffffffff81b1acb0 T drm_dp_bw_channel_coding_efficiency +ffffffff81b1acf0 T drm_dp_max_dprx_data_rate +ffffffff81b1ad50 t __128b132b_channel_eq_delay_us +ffffffff81b1add0 t __8b10b_channel_eq_delay_us +ffffffff81b1ae50 t drm_dp_aux_get_crc +ffffffff81b1af40 t drm_dp_i2c_xfer +ffffffff81b1b1e0 t drm_dp_i2c_functionality +ffffffff81b1b210 t drm_dp_i2c_do_msg +ffffffff81b1b640 t lock_bus +ffffffff81b1b660 t trylock_bus +ffffffff81b1b6c0 t unlock_bus +ffffffff81b1b6e0 t dp_aux_backlight_update_status +ffffffff81b1c000 T drm_dp_encode_sideband_req +ffffffff81b1c470 T drm_dp_decode_sideband_req +ffffffff81b1c9e0 T drm_dp_dump_sideband_msg_req_body +ffffffff81b1cde0 T drm_dp_mst_get_port_malloc +ffffffff81b1ce30 T drm_dp_mst_put_port_malloc +ffffffff81b1cf40 t kref_put +ffffffff81b1cf80 T drm_atomic_get_mst_payload_state +ffffffff81b1cfd0 T drm_dp_mst_dpcd_read +ffffffff81b1d250 T drm_dp_mst_dpcd_write +ffffffff81b1d2b0 t drm_dp_send_dpcd_write +ffffffff81b1d4a0 T drm_dp_mst_connector_late_register +ffffffff81b1d530 T drm_dp_mst_connector_early_unregister +ffffffff81b1d570 T drm_dp_send_power_updown_phy +ffffffff81b1d780 t drm_dp_mst_topology_put_port +ffffffff81b1d8c0 t drm_dp_queue_down_tx +ffffffff81b1d9d0 t drm_dp_mst_wait_tx_reply +ffffffff81b1ddc0 T drm_dp_send_query_stream_enc_status +ffffffff81b1e050 T drm_dp_add_payload_part1 +ffffffff81b1e230 T drm_dp_remove_payload_part1 +ffffffff81b1e390 T drm_dp_remove_payload_part2 +ffffffff81b1e430 T drm_dp_add_payload_part2 +ffffffff81b1e610 T drm_dp_get_vc_payload_bw +ffffffff81b1e6d0 T drm_dp_read_mst_cap +ffffffff81b1e750 T drm_dp_mst_topology_mgr_set_mst +ffffffff81b1ea50 t drm_dp_dpcd_write_payload +ffffffff81b1ec20 t drm_dp_mst_topology_put_mstb +ffffffff81b1ed40 T drm_dp_mst_topology_queue_probe +ffffffff81b1ee00 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff81b1ee70 T drm_dp_mst_topology_mgr_suspend +ffffffff81b1ef80 T drm_dp_mst_topology_mgr_resume +ffffffff81b1f1a0 t drm_dp_check_mstb_guid +ffffffff81b1f2c0 T drm_dp_mst_hpd_irq_handle_event +ffffffff81b20600 T drm_dp_mst_hpd_irq_send_new_request +ffffffff81b206a0 T drm_dp_mst_detect_port +ffffffff81b20840 T drm_dp_mst_edid_read +ffffffff81b20970 T drm_dp_mst_get_edid +ffffffff81b20a00 T drm_dp_atomic_find_time_slots +ffffffff81b20d00 T drm_atomic_get_mst_topology_state +ffffffff81b20d10 T drm_dp_atomic_release_time_slots +ffffffff81b20f60 T drm_dp_mst_atomic_setup_commit +ffffffff81b210f0 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff81b21280 T drm_dp_mst_root_conn_atomic_check +ffffffff81b213b0 T drm_dp_mst_update_slots +ffffffff81b21400 T drm_dp_check_act_status +ffffffff81b215f0 T drm_dp_calc_pbn_mode +ffffffff81b21680 T drm_dp_mst_dump_topology +ffffffff81b219b0 t drm_dp_mst_dump_mstb +ffffffff81b21a20 T drm_dp_mst_port_downstream_of_parent +ffffffff81b21b10 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff81b21c80 T drm_dp_mst_dsc_aux_for_port +ffffffff81b21f40 T drm_dp_mst_atomic_enable_dsc +ffffffff81b220f0 T drm_dp_mst_atomic_check_mgr +ffffffff81b223f0 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff81b226d0 T drm_dp_mst_atomic_check +ffffffff81b22780 t drm_dp_mst_duplicate_state +ffffffff81b22980 t drm_dp_mst_destroy_state +ffffffff81b22a60 T drm_atomic_get_old_mst_topology_state +ffffffff81b22a70 T drm_atomic_get_new_mst_topology_state +ffffffff81b22a80 T drm_dp_mst_topology_mgr_init +ffffffff81b22d60 t drm_dp_mst_link_probe_work +ffffffff81b22fe0 t drm_dp_tx_work +ffffffff81b23030 t drm_dp_delayed_destroy_work +ffffffff81b235e0 t drm_dp_mst_up_req_work +ffffffff81b23c20 T drm_dp_mst_topology_mgr_destroy +ffffffff81b23cd0 T drm_dp_mst_aux_for_parent +ffffffff81b23d20 t drm_dp_mst_is_virtual_dpcd +ffffffff81b23e20 t drm_dp_free_mst_branch_device +ffffffff81b23e60 t drm_dp_mst_topology_get_port_validated_locked +ffffffff81b23ef0 t drm_dp_mst_dump_sideband_msg_tx +ffffffff81b24140 t process_single_down_tx_qlock +ffffffff81b242d0 t process_single_tx_qlock +ffffffff81b247f0 t drm_dp_msg_data_crc4 +ffffffff81b24920 t drm_dp_payload_send_msg +ffffffff81b24d30 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff81b24dc0 t drm_dp_get_one_sb_msg +ffffffff81b25580 t drm_dp_get_mst_branch_device +ffffffff81b25700 t drm_dp_check_and_send_link_address +ffffffff81b257e0 t drm_dp_send_link_address +ffffffff81b26470 t drm_dp_send_enum_path_resources +ffffffff81b26660 t drm_dp_port_set_pdt +ffffffff81b26990 t drm_dp_mst_port_add_connector +ffffffff81b26bc0 t drm_dp_mst_i2c_xfer +ffffffff81b271f0 t drm_dp_mst_i2c_functionality +ffffffff81b27220 t get_mst_branch_device_by_guid_helper +ffffffff81b28000 T drm_dsc_dp_pps_header_init +ffffffff81b28030 T drm_dsc_dp_rc_buffer_size +ffffffff81b28090 T drm_dsc_pps_payload_pack +ffffffff81b28350 T drm_dsc_set_const_params +ffffffff81b283a0 T drm_dsc_set_rc_buf_thresh +ffffffff81b28410 T drm_dsc_setup_rc_params +ffffffff81b285e0 T drm_dsc_compute_rc_parameters +ffffffff81b288e0 T drm_dsc_get_bpp_int +ffffffff81b28970 T drm_dsc_initial_scale_value +ffffffff81b289b0 T drm_dsc_flatness_det_thresh +ffffffff81b289f0 T drm_dsc_dump_config +ffffffff81b2a000 T drm_connector_attach_content_protection_property +ffffffff81b2a030 T drm_hdcp_check_ksvs_revoked +ffffffff81b2a090 T drm_hdcp_update_content_protection +ffffffff81b2b000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff81b2b120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff81b2b180 T drm_hdmi_avi_infoframe_bars +ffffffff81b2b1d0 T drm_hdmi_avi_infoframe_content_type +ffffffff81b2b220 T drm_hdmi_compute_mode_clock +ffffffff81b2c000 T __drm_atomic_helper_connector_hdmi_reset +ffffffff81b2c050 T drm_atomic_helper_connector_hdmi_check +ffffffff81b2c8c0 T drm_atomic_helper_connector_hdmi_update_infoframes +ffffffff81b2ca50 t write_or_clear_infoframe +ffffffff81b2cb80 t write_infoframe +ffffffff81b2ccd0 T drm_atomic_helper_connector_hdmi_update_audio_infoframe +ffffffff81b2cde0 T drm_atomic_helper_connector_hdmi_clear_audio_infoframe +ffffffff81b2d000 T drm_scdc_read +ffffffff81b2d0a0 T drm_scdc_write +ffffffff81b2d1a0 T drm_scdc_get_scrambling_status +ffffffff81b2d280 T drm_scdc_set_scrambling +ffffffff81b2d440 T drm_scdc_set_high_tmds_clock_ratio +ffffffff81b2e000 T drm_gem_ttm_mmap +ffffffff81b2e080 T drm_gem_ttm_vmap +ffffffff81b2e090 T drm_gem_ttm_vunmap +ffffffff81b2f000 T ttm_agp_bind +ffffffff81b2f060 T ttm_agp_unbind +ffffffff81b2f080 T ttm_agp_is_bound +ffffffff81b2f0d0 T ttm_agp_destroy +ffffffff81b2f0f0 T ttm_agp_tt_create +ffffffff81b30000 T ttm_bo_move_to_lru_tail +ffffffff81b30040 T ttm_bo_set_bulk_move +ffffffff81b30120 T ttm_bo_put +ffffffff81b30760 T ttm_bo_eviction_valuable +ffffffff81b307b0 T ttm_bo_evict_first +ffffffff81b30c60 T ttm_bo_wait_ctx +ffffffff81b30d00 t ttm_bo_cleanup_memtype_use +ffffffff81b30d90 t ttm_bo_evict +ffffffff81b31100 t dma_resv_unlock +ffffffff81b311b0 T ttm_bo_pin +ffffffff81b31260 T ttm_bo_unpin +ffffffff81b31390 T ttm_bo_mem_space +ffffffff81b31420 t ttm_bo_alloc_resource +ffffffff81b317e0 T ttm_bo_validate +ffffffff81b31a50 t ttm_bo_handle_move_mem +ffffffff81b31c20 T ttm_bo_init_reserved +ffffffff81b31e60 T ttm_bo_init_validate +ffffffff81b32000 T ttm_bo_unmap_virtual +ffffffff81b32160 t ttm_bo_swapout_cb +ffffffff81b32390 T ttm_bo_swapout +ffffffff81b32400 T ttm_bo_tt_destroy +ffffffff81b32480 t ttm_bo_delayed_delete +ffffffff81b326f0 t ttm_bo_evict_cb +ffffffff81b33000 T ttm_mem_io_reserve +ffffffff81b33060 T ttm_mem_io_free +ffffffff81b330e0 T ttm_move_memcpy +ffffffff81b332e0 T ttm_bo_move_memcpy +ffffffff81b33580 T ttm_bo_move_sync_cleanup +ffffffff81b336a0 T ttm_io_prot +ffffffff81b336e0 T ttm_bo_kmap +ffffffff81b33a10 T ttm_bo_kunmap +ffffffff81b33b50 T ttm_bo_vmap +ffffffff81b33d80 T ttm_bo_vunmap +ffffffff81b33e70 T ttm_bo_move_accel_cleanup +ffffffff81b341c0 T ttm_bo_pipeline_gutting +ffffffff81b34430 t ttm_buffer_object_transfer +ffffffff81b346f0 T ttm_lru_walk_for_evict +ffffffff81b34bb0 t ttm_lru_walk_unlock +ffffffff81b34c90 t ttm_transfered_destroy +ffffffff81b35000 T ttm_bo_vm_reserve +ffffffff81b351c0 t dma_resv_lock_interruptible +ffffffff81b35300 T ttm_bo_vm_fault_reserved +ffffffff81b35690 T ttm_bo_vm_fault +ffffffff81b35800 T ttm_bo_vm_reference +ffffffff81b35830 T ttm_bo_vm_detach +ffffffff81b35840 T ttm_bo_mmap_obj +ffffffff81b36000 T ttm_global_swapout +ffffffff81b36100 T ttm_device_swapout +ffffffff81b36310 T ttm_device_init +ffffffff81b36670 T ttm_device_fini +ffffffff81b36890 T ttm_device_clear_dma_mappings +ffffffff81b36960 t ttm_device_clear_lru_dma_mappings +ffffffff81b37000 T ttm_eu_backoff_reservation +ffffffff81b37170 T ttm_eu_reserve_buffers +ffffffff81b37680 T ttm_eu_fence_buffer_objects +ffffffff81b37820 t __ww_mutex_lock +ffffffff81b38000 T ttm_prot_from_caching +ffffffff81b39000 T ttm_pool_alloc +ffffffff81b39b50 t ttm_pool_free_range +ffffffff81b39ed0 T ttm_pool_free +ffffffff81b39f40 t ttm_pool_shrink +ffffffff81b3a1c0 T ttm_pool_init +ffffffff81b3a4b0 T ttm_pool_fini +ffffffff81b3a6e0 t ttm_pool_type_fini +ffffffff81b3a980 T ttm_pool_mgr_init +ffffffff81b3ad30 t ttm_pool_shrinker_count +ffffffff81b3ad90 t ttm_pool_shrinker_scan +ffffffff81b3adf0 T ttm_pool_mgr_fini +ffffffff81b3c000 T ttm_range_man_init_nocheck +ffffffff81b3c1b0 T ttm_range_man_fini_nocheck +ffffffff81b3c380 t ttm_range_man_alloc +ffffffff81b3c510 t ttm_range_man_free +ffffffff81b3c590 t ttm_range_man_intersects +ffffffff81b3c5f0 t ttm_range_man_compatible +ffffffff81b3c650 t ttm_range_man_debug +ffffffff81b3d000 T ttm_resource_cursor_fini +ffffffff81b3d080 T ttm_lru_bulk_move_init +ffffffff81b3d0e0 T ttm_lru_bulk_move_fini +ffffffff81b3d160 T ttm_lru_bulk_move_tail +ffffffff81b3d460 T ttm_resource_add_bulk_move +ffffffff81b3d5a0 T ttm_resource_del_bulk_move +ffffffff81b3d700 T ttm_resource_move_to_lru_tail +ffffffff81b3d870 T ttm_resource_init +ffffffff81b3d970 T ttm_resource_fini +ffffffff81b3d9e0 T ttm_resource_alloc +ffffffff81b3dab0 T ttm_resource_free +ffffffff81b3db80 T ttm_resource_intersects +ffffffff81b3dbe0 T ttm_resource_compatible +ffffffff81b3dd00 T ttm_resource_set_bo +ffffffff81b3dd60 T ttm_resource_manager_init +ffffffff81b3de10 T ttm_resource_manager_evict_all +ffffffff81b3df40 T ttm_resource_manager_usage +ffffffff81b3dfb0 T ttm_resource_manager_debug +ffffffff81b3e0d0 T ttm_resource_manager_first +ffffffff81b3e130 T ttm_resource_manager_next +ffffffff81b3e310 T ttm_lru_first_res_or_null +ffffffff81b3e360 T ttm_kmap_iter_iomap_init +ffffffff81b3e3c0 T ttm_kmap_iter_linear_io_init +ffffffff81b3e5e0 T ttm_kmap_iter_linear_io_fini +ffffffff81b3e630 T ttm_resource_manager_create_debugfs +ffffffff81b3e660 t ttm_kmap_iter_iomap_map_local +ffffffff81b3e750 t ttm_kmap_iter_iomap_unmap_local +ffffffff81b3e780 t ttm_kmap_iter_linear_io_map_local +ffffffff81b3f000 T ttm_sys_man_init +ffffffff81b3f140 t ttm_sys_man_alloc +ffffffff81b3f1d0 t ttm_sys_man_free +ffffffff81b40000 T ttm_tt_create +ffffffff81b40120 T ttm_tt_destroy +ffffffff81b40140 T ttm_tt_init +ffffffff81b40240 T ttm_tt_fini +ffffffff81b40370 T ttm_sg_tt_init +ffffffff81b40600 T ttm_tt_swapin +ffffffff81b40740 T ttm_tt_swapout +ffffffff81b407a0 T ttm_tt_populate +ffffffff81b40950 T ttm_tt_unpopulate +ffffffff81b40a10 T ttm_tt_mgr_init +ffffffff81b40a70 T ttm_kmap_iter_tt_init +ffffffff81b40ad0 T ttm_tt_pages_limit +ffffffff81b40b00 t ttm_kmap_iter_tt_map_local +ffffffff81b40b60 t ttm_kmap_iter_tt_unmap_local +ffffffff81b41000 T drm_sched_entity_init +ffffffff81b41240 T drm_sched_entity_modify_sched +ffffffff81b412c0 T drm_sched_entity_is_ready +ffffffff81b41300 T drm_sched_entity_error +ffffffff81b41340 T drm_sched_entity_flush +ffffffff81b416b0 t drm_sched_entity_kill +ffffffff81b418b0 T drm_sched_entity_fini +ffffffff81b41950 T drm_sched_entity_destroy +ffffffff81b41a20 T drm_sched_entity_set_priority +ffffffff81b41a70 T drm_sched_entity_pop_job +ffffffff81b41d20 T drm_sched_entity_select_rq +ffffffff81b41e20 T drm_sched_entity_push_job +ffffffff81b41fb0 t drm_sched_entity_kill_jobs_cb +ffffffff81b42170 t drm_sched_entity_kill_jobs_work +ffffffff81b421f0 t drm_sched_entity_clear_dep +ffffffff81b42210 t drm_sched_entity_wakeup +ffffffff81b43000 T drm_sched_fence_slab_init +ffffffff81b43070 T drm_sched_fence_slab_fini +ffffffff81b43090 T drm_sched_fence_scheduled +ffffffff81b43100 T drm_sched_fence_finished +ffffffff81b43120 T drm_sched_fence_free +ffffffff81b431d0 T to_drm_sched_fence +ffffffff81b43230 T drm_sched_fence_alloc +ffffffff81b432b0 T drm_sched_fence_init +ffffffff81b43340 t drm_sched_fence_get_driver_name +ffffffff81b43370 t drm_sched_fence_get_timeline_name +ffffffff81b433d0 t drm_sched_fence_release_scheduled +ffffffff81b434d0 t drm_sched_fence_release_finished +ffffffff81b43510 t drm_sched_fence_set_deadline_finished +ffffffff81b44000 T drm_sched_rq_update_fifo +ffffffff81b44110 T drm_sched_rq_add_entity +ffffffff81b441a0 T drm_sched_rq_remove_entity +ffffffff81b44290 T drm_sched_tdr_queue_imm +ffffffff81b44300 T drm_sched_fault +ffffffff81b44350 T drm_sched_suspend_timeout +ffffffff81b443e0 T drm_sched_resume_timeout +ffffffff81b444a0 T drm_sched_stop +ffffffff81b446d0 T drm_sched_wqueue_stop +ffffffff81b44740 T drm_sched_start +ffffffff81b44980 t drm_sched_job_done_cb +ffffffff81b44a60 T drm_sched_wqueue_start +ffffffff81b44ac0 T drm_sched_resubmit_jobs +ffffffff81b44c20 T drm_sched_job_init +ffffffff81b44d70 T drm_sched_job_arm +ffffffff81b44e00 T drm_sched_job_add_dependency +ffffffff81b44fd0 T drm_sched_job_add_syncobj_dependency +ffffffff81b45040 T drm_sched_job_add_resv_dependencies +ffffffff81b45120 T drm_sched_job_add_implicit_dependencies +ffffffff81b45210 T drm_sched_job_cleanup +ffffffff81b452f0 T drm_sched_wakeup +ffffffff81b45340 T drm_sched_pick_best +ffffffff81b45400 T drm_sched_init +ffffffff81b45830 t drm_sched_job_timedout +ffffffff81b459b0 t drm_sched_run_job_work +ffffffff81b45fb0 t drm_sched_free_job_work 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ivch_destroy +ffffffff81b49bb0 t ivch_dump_regs +ffffffff81b4a830 t ivch_reset +ffffffff81b4b000 t ns2501_init +ffffffff81b4b220 t ns2501_dpms +ffffffff81b4bab0 t ns2501_mode_valid +ffffffff81b4bb90 t ns2501_mode_set +ffffffff81b4cef0 t ns2501_detect +ffffffff81b4cf20 t ns2501_get_hw_state +ffffffff81b4d000 t ns2501_destroy +ffffffff81b4e000 t sil164_init +ffffffff81b4e220 t sil164_dpms +ffffffff81b4e360 t sil164_mode_valid +ffffffff81b4e390 t sil164_mode_set +ffffffff81b4e540 t sil164_detect +ffffffff81b4e630 t sil164_get_hw_state +ffffffff81b4e710 t sil164_destroy +ffffffff81b4e770 t sil164_dump_regs +ffffffff81b4f000 t tfp410_init +ffffffff81b4f120 t tfp410_dpms +ffffffff81b4f260 t tfp410_mode_valid +ffffffff81b4f290 t tfp410_mode_set +ffffffff81b4f2c0 t tfp410_detect +ffffffff81b4f3b0 t tfp410_get_hw_state +ffffffff81b4f490 t tfp410_destroy +ffffffff81b4f4f0 t tfp410_dump_regs +ffffffff81b50010 t tfp410_getid +ffffffff81b51000 T vlv_get_dpll +ffffffff81b51040 T g4x_dp_set_clock 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vlv_set_signal_levels +ffffffff81b52ed0 t ivb_cpu_edp_set_signal_levels +ffffffff81b53060 t snb_cpu_edp_set_signal_levels +ffffffff81b531f0 t g4x_set_signal_levels +ffffffff81b53370 t intel_dp_preemph_max_3 +ffffffff81b533a0 t intel_dp_voltage_max_3 +ffffffff81b533d0 t intel_dp_preemph_max_2 +ffffffff81b53400 t intel_dp_voltage_max_2 +ffffffff81b53430 t g4x_digital_port_connected +ffffffff81b53530 t ilk_digital_port_connected +ffffffff81b535f0 t ibx_digital_port_connected +ffffffff81b536b0 t intel_dp_encoder_reset +ffffffff81b53830 t intel_dp_encoder_destroy +ffffffff81b538a0 t intel_dp_prepare +ffffffff81b53bb0 t intel_enable_dp +ffffffff81b53f30 t intel_dp_link_down +ffffffff81b54500 t assert_dp_port +ffffffff81b546b0 t assert_edp_pll +ffffffff81b55000 T g4x_hdmi_connector_atomic_check +ffffffff81b551b0 T g4x_hdmi_init +ffffffff81b555b0 t intel_hdmi_hotplug +ffffffff81b55610 t g4x_hdmi_compute_config +ffffffff81b557b0 t pch_disable_hdmi +ffffffff81b557e0 t pch_post_disable_hdmi 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hsw_crtc_state_ips_capable +ffffffff81b58690 T hsw_ips_compute_config +ffffffff81b587d0 T hsw_ips_get_config +ffffffff81b588d0 T hsw_ips_crtc_debugfs_add +ffffffff81b59000 T i9xx_check_plane_surface +ffffffff81b59320 T i965_plane_max_stride +ffffffff81b59390 T intel_primary_plane_create +ffffffff81b598f0 t i9xx_plane_min_cdclk +ffffffff81b59960 t i915_plane_max_stride +ffffffff81b599b0 t i8xx_plane_max_stride +ffffffff81b599f0 t hsw_primary_max_stride +ffffffff81b59a50 t ilk_primary_max_stride +ffffffff81b59ac0 t vlv_primary_min_alignment +ffffffff81b59b50 t g4x_primary_min_alignment +ffffffff81b59be0 t i965_plane_min_alignment +ffffffff81b59c60 t i9xx_plane_min_alignment +ffffffff81b59c90 t i830_plane_update_arm +ffffffff81b59ce0 t i9xx_plane_update_noarm +ffffffff81b59e40 t i9xx_plane_update_arm +ffffffff81b5a240 t i9xx_plane_disable_arm +ffffffff81b5a370 t i9xx_plane_get_hw_state +ffffffff81b5a4c0 t i9xx_plane_check +ffffffff81b5a600 t vlv_primary_async_flip +ffffffff81b5a6a0 t vlv_primary_enable_flip_done +ffffffff81b5a710 t vlv_primary_disable_flip_done +ffffffff81b5a780 t g4x_primary_async_flip +ffffffff81b5a8c0 t bdw_primary_enable_flip_done +ffffffff81b5a930 t bdw_primary_disable_flip_done +ffffffff81b5a9a0 t ivb_primary_enable_flip_done +ffffffff81b5aa10 t ivb_primary_disable_flip_done +ffffffff81b5aa80 t ilk_primary_enable_flip_done +ffffffff81b5aaf0 t ilk_primary_disable_flip_done +ffffffff81b5ab60 T i9xx_get_initial_plane_config +ffffffff81b5b170 t __intel_de_read +ffffffff81b5b200 T i9xx_fixup_initial_plane_config +ffffffff81b5b310 t i965_plane_format_mod_supported +ffffffff81b5b410 t i8xx_plane_format_mod_supported +ffffffff81b5b4c0 t i9xx_plane_ctl +ffffffff81b5c000 T intel_set_memory_cxsr +ffffffff81b5c0b0 t _intel_set_memory_cxsr +ffffffff81b5c3c0 T ilk_disable_lp_wm +ffffffff81b5c4c0 T ilk_wm_sanitize +ffffffff81b5c800 T i9xx_wm_init +ffffffff81b5ce60 t pnv_get_cxsr_latency +ffffffff81b5cf80 t ilk_compute_pipe_wm +ffffffff81b5d320 t ilk_compute_intermediate_wm +ffffffff81b5d580 t ilk_initial_watermarks +ffffffff81b5d610 t ilk_optimize_watermarks +ffffffff81b5d6e0 t ilk_wm_get_hw_state +ffffffff81b5db60 t ilk_compute_wm_level +ffffffff81b5e070 t ilk_validate_wm_level +ffffffff81b5e1d0 t ilk_compute_wm_maximums +ffffffff81b5e400 t ilk_program_watermarks +ffffffff81b5f230 t ilk_wm_merge +ffffffff81b5f4e0 t vlv_compute_pipe_wm +ffffffff81b5fe90 t vlv_compute_intermediate_wm +ffffffff81b601e0 t vlv_initial_watermarks +ffffffff81b60270 t vlv_atomic_update_fifo +ffffffff81b60580 t vlv_optimize_watermarks +ffffffff81b60650 t vlv_wm_get_hw_state_and_sanitize +ffffffff81b61540 t _vlv_compute_pipe_wm +ffffffff81b61860 t vlv_invalidate_wms +ffffffff81b619d0 t vlv_program_watermarks +ffffffff81b62210 t chv_set_memory_dvfs +ffffffff81b62420 t g4x_compute_pipe_wm +ffffffff81b62d50 t g4x_compute_intermediate_wm +ffffffff81b631d0 t g4x_initial_watermarks +ffffffff81b63290 t g4x_optimize_watermarks +ffffffff81b63390 t g4x_wm_get_hw_state_and_sanitize +ffffffff81b63d90 t _g4x_compute_pipe_wm +ffffffff81b64050 t g4x_program_watermarks +ffffffff81b64420 t pnv_update_wm +ffffffff81b64a90 t i965_update_wm +ffffffff81b64ec0 t i9xx_update_wm +ffffffff81b65700 t i845_update_wm +ffffffff81b66000 T icl_dsi_frame_update +ffffffff81b660f0 T icl_dsi_init +ffffffff81b66b30 t gen11_dsi_pre_pll_enable +ffffffff81b67160 t gen11_dsi_pre_enable +ffffffff81b6a8f0 t gen11_dsi_enable +ffffffff81b6acf0 t gen11_dsi_disable +ffffffff81b6ad30 t gen11_dsi_post_disable +ffffffff81b6bdb0 t gen11_dsi_get_config +ffffffff81b6c050 t gen11_dsi_sync_state +ffffffff81b6c160 t gen11_dsi_compute_config +ffffffff81b6c560 t gen11_dsi_get_hw_state +ffffffff81b6c7b0 t gen11_dsi_initial_fastset_check +ffffffff81b6c830 t gen11_dsi_get_power_domains +ffffffff81b6c940 t gen11_dsi_gate_clocks +ffffffff81b6ca80 t gen11_dsi_is_clock_enabled +ffffffff81b6cb90 t gen11_dsi_encoder_destroy +ffffffff81b6cba0 t gen11_dsi_config_util_pin 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intel_plane_atomic_check +ffffffff81b71840 T intel_plane_update_noarm +ffffffff81b71880 T intel_plane_async_flip +ffffffff81b718a0 T intel_plane_update_arm +ffffffff81b718e0 T intel_plane_disable_arm +ffffffff81b71900 T intel_crtc_planes_update_noarm +ffffffff81b71a40 T intel_crtc_planes_update_arm +ffffffff81b71e90 T intel_atomic_plane_check_clipping +ffffffff81b72160 T intel_plane_check_src_coordinates +ffffffff81b723a0 T intel_plane_helper_add +ffffffff81b723e0 T intel_plane_init_cursor_vblank_work +ffffffff81b72440 t intel_prepare_plane_fb +ffffffff81b726b0 t intel_cleanup_plane_fb +ffffffff81b73000 T intel_audio_sdp_split_update +ffffffff81b73110 T intel_audio_compute_config +ffffffff81b731d0 T intel_audio_codec_enable +ffffffff81b733f0 T intel_audio_codec_disable +ffffffff81b73670 T intel_audio_codec_get_config +ffffffff81b736c0 T intel_audio_hooks_init +ffffffff81b73740 T intel_audio_cdclk_change_pre +ffffffff81b73820 T intel_audio_cdclk_change_post +ffffffff81b73980 T intel_audio_init +ffffffff81b73990 T intel_audio_register +ffffffff81b739c0 T intel_audio_deinit +ffffffff81b73a10 t g4x_audio_codec_enable +ffffffff81b73d60 t g4x_audio_codec_disable +ffffffff81b73e30 t g4x_audio_codec_get_config +ffffffff81b74040 t ibx_audio_codec_enable +ffffffff81b742b0 t ibx_audio_codec_disable +ffffffff81b74550 t intel_acomp_get_config +ffffffff81b745d0 t audio_config_hdmi_pixel_clock +ffffffff81b747c0 t hsw_audio_codec_enable +ffffffff81b75220 t hsw_audio_codec_disable +ffffffff81b76000 T intel_backlight_invert_pwm_level +ffffffff81b760e0 T intel_backlight_set_pwm_level +ffffffff81b76150 T intel_backlight_level_to_pwm +ffffffff81b76380 T intel_backlight_level_from_pwm +ffffffff81b76560 T intel_backlight_set_acpi +ffffffff81b767a0 T intel_backlight_disable +ffffffff81b76890 T intel_backlight_enable +ffffffff81b76950 t __intel_backlight_enable +ffffffff81b76ad0 T intel_backlight_device_register +ffffffff81b76de0 t kasprintf +ffffffff81b76ec0 T intel_backlight_device_unregister +ffffffff81b76f20 T intel_backlight_update +ffffffff81b76fc0 T intel_backlight_setup +ffffffff81b77210 T intel_backlight_destroy +ffffffff81b77240 T intel_backlight_init_funcs +ffffffff81b773c0 t intel_backlight_device_update_status +ffffffff81b77620 t intel_backlight_device_get_brightness +ffffffff81b777f0 t bxt_setup_backlight +ffffffff81b77b30 t bxt_get_backlight +ffffffff81b77be0 t bxt_set_backlight +ffffffff81b77c70 t bxt_disable_backlight +ffffffff81b77e40 t bxt_enable_backlight +ffffffff81b78310 t bxt_hz_to_pwm +ffffffff81b78350 t cnp_setup_backlight +ffffffff81b78740 t cnp_disable_backlight +ffffffff81b78850 t cnp_enable_backlight +ffffffff81b78b90 t cnp_hz_to_pwm +ffffffff81b78bd0 t lpt_setup_backlight +ffffffff81b791e0 t lpt_get_backlight +ffffffff81b79290 t lpt_set_backlight +ffffffff81b79380 t lpt_disable_backlight +ffffffff81b79570 t lpt_enable_backlight +ffffffff81b799b0 t lpt_hz_to_pwm +ffffffff81b79a20 t pch_get_backlight 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i9xx_disable_backlight +ffffffff81b7c040 t i9xx_enable_backlight +ffffffff81b7c340 t i9xx_hz_to_pwm +ffffffff81b7c3a0 t intel_pwm_setup_backlight +ffffffff81b7c4d0 t intel_pwm_get_backlight +ffffffff81b7c5d0 t intel_pwm_set_backlight +ffffffff81b7c6b0 t intel_pwm_disable_backlight +ffffffff81b7c790 t intel_pwm_enable_backlight +ffffffff81b7d000 T intel_bios_encoder_port +ffffffff81b7d080 t dvo_port_to_port +ffffffff81b7d270 T intel_bios_dp_max_link_rate +ffffffff81b7d2f0 T intel_bios_dp_max_lane_count +ffffffff81b7d340 T intel_bios_encoder_supports_dvi +ffffffff81b7d370 T intel_bios_encoder_supports_hdmi +ffffffff81b7d3b0 T intel_bios_encoder_supports_dp +ffffffff81b7d3e0 T intel_bios_encoder_supports_edp +ffffffff81b7d420 T intel_bios_encoder_supports_dsi +ffffffff81b7d450 T intel_bios_encoder_is_lspcon +ffffffff81b7d4a0 T intel_bios_hdmi_level_shift +ffffffff81b7d500 T intel_bios_hdmi_max_tmds_clock +ffffffff81b7d590 T intel_bios_is_valid_vbt +ffffffff81b7d6f0 T intel_bios_init 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intel_bios_encoder_data_lookup +ffffffff81b82ee0 T intel_bios_for_each_encoder +ffffffff81b82f60 T intel_bios_debugfs_register +ffffffff81b82f90 t opregion_get_panel_type +ffffffff81b82fb0 t vbt_get_panel_type +ffffffff81b830d0 t pnpid_get_panel_type +ffffffff81b83270 t fallback_get_panel_type +ffffffff81b832a0 t fill_detail_timing_data +ffffffff81b84000 T icl_pcode_restrict_qgv_points +ffffffff81b84130 T intel_bw_init_hw +ffffffff81b84680 t tgl_get_bw_info +ffffffff81b84ca0 t icl_get_bw_info +ffffffff81b85090 T intel_bw_crtc_update +ffffffff81b85180 t intel_bw_crtc_data_rate +ffffffff81b852a0 T intel_atomic_get_old_bw_state +ffffffff81b852c0 T intel_atomic_get_new_bw_state +ffffffff81b852e0 T intel_atomic_get_bw_state +ffffffff81b85300 T intel_bw_min_cdclk +ffffffff81b85580 T intel_bw_calc_min_cdclk +ffffffff81b859b0 T intel_bw_atomic_check +ffffffff81b86330 T intel_bw_init +ffffffff81b866d0 t icl_get_qgv_points +ffffffff81b86d50 t skl_plane_calc_dbuf_bw +ffffffff81b86ea0 t icl_qgv_bw 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intel_read_rawclk +ffffffff81b8ab30 T intel_cdclk_debugfs_register +ffffffff81b8ab60 T intel_init_cdclk_hooks +ffffffff81b8afe0 t bxt_set_cdclk +ffffffff81b8b7e0 t bxt_cdclk_ctl +ffffffff81b8baa0 t _bxt_set_cdclk +ffffffff81b8c570 t skl_set_cdclk +ffffffff81b8cfc0 t intel_cdclk_duplicate_state +ffffffff81b8d050 t intel_cdclk_destroy_state +ffffffff81b8d070 t bxt_get_cdclk +ffffffff81b8d4a0 t bxt_modeset_calc_cdclk +ffffffff81b8d980 t rplu_calc_voltage_level +ffffffff81b8da10 t intel_compute_min_cdclk +ffffffff81b8dc60 t tgl_calc_voltage_level +ffffffff81b8dcf0 t ehl_calc_voltage_level +ffffffff81b8dd80 t icl_calc_voltage_level +ffffffff81b8de00 t bxt_calc_voltage_level +ffffffff81b8de50 t skl_get_cdclk +ffffffff81b8e140 t skl_modeset_calc_cdclk +ffffffff81b8e3b0 t bdw_get_cdclk +ffffffff81b8e520 t bdw_set_cdclk +ffffffff81b8ed20 t bdw_modeset_calc_cdclk +ffffffff81b8ee50 t hsw_get_cdclk +ffffffff81b8efa0 t fixed_modeset_calc_cdclk +ffffffff81b8eff0 t vlv_get_cdclk +ffffffff81b8f0e0 t chv_set_cdclk +ffffffff81b8f430 t vlv_modeset_calc_cdclk +ffffffff81b8f620 t vlv_program_pfi_credits +ffffffff81b8f820 t vlv_set_cdclk +ffffffff81b8fd90 t fixed_400mhz_get_cdclk +ffffffff81b8fdc0 t fixed_450mhz_get_cdclk +ffffffff81b8fdf0 t gm45_get_cdclk +ffffffff81b8ff10 t intel_hpll_vco +ffffffff81b900b0 t g33_get_cdclk +ffffffff81b901e0 t i965gm_get_cdclk +ffffffff81b902f0 t pnv_get_cdclk +ffffffff81b903b0 t i945gm_get_cdclk +ffffffff81b90430 t i915gm_get_cdclk +ffffffff81b904b0 t fixed_333mhz_get_cdclk +ffffffff81b904e0 t fixed_266mhz_get_cdclk +ffffffff81b90510 t i85x_get_cdclk +ffffffff81b905b0 t fixed_200mhz_get_cdclk +ffffffff81b905e0 t fixed_133mhz_get_cdclk +ffffffff81b91000 T intel_color_load_luts +ffffffff81b91050 T intel_color_commit_noarm +ffffffff81b910a0 T intel_color_commit_arm +ffffffff81b91110 T intel_color_post_update +ffffffff81b91160 T intel_color_modeset +ffffffff81b91270 T intel_color_prepare_commit +ffffffff81b913f0 T intel_color_cleanup_commit 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intel_crt_load_detect +ffffffff81ba3000 T intel_first_crtc +ffffffff81ba3020 T intel_crtc_for_pipe +ffffffff81ba3080 T intel_crtc_wait_for_next_vblank +ffffffff81ba3090 T intel_wait_for_vblank_if_active +ffffffff81ba3100 T intel_crtc_get_vblank_counter +ffffffff81ba3180 T intel_crtc_max_vblank_count +ffffffff81ba3210 T intel_crtc_vblank_on +ffffffff81ba32b0 t assert_vblank_disabled +ffffffff81ba33a0 T intel_crtc_vblank_off +ffffffff81ba33d0 T intel_crtc_state_alloc +ffffffff81ba34a0 T intel_crtc_state_reset +ffffffff81ba3540 T intel_crtc_init +ffffffff81ba3950 T intel_wait_for_vblank_workers +ffffffff81ba3a40 T intel_usecs_to_scanlines +ffffffff81ba3aa0 T intel_pipe_update_start +ffffffff81ba3de0 T intel_crtc_arm_vblank_event +ffffffff81ba3ed0 T intel_pipe_update_end +ffffffff81ba42a0 t intel_crtc_destroy +ffffffff81ba42e0 t intel_crtc_late_register +ffffffff81ba4310 t intel_crtc_vblank_work +ffffffff81ba5000 T intel_output_format_name +ffffffff81ba5040 T intel_crtc_state_dump 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intel_cx0_phy_transaction_begin +ffffffff81baaa30 T intel_cx0_phy_check_hdmi_link_rate +ffffffff81baaba0 T intel_cx0pll_calc_state +ffffffff81bab020 T intel_cx0pll_dump_hw_state +ffffffff81bab750 T intel_mtl_tbt_calc_port_clock +ffffffff81bab940 T intel_mtl_pll_enable +ffffffff81badd30 T intel_mtl_pll_disable +ffffffff81bae5e0 T intel_mtl_port_pll_type +ffffffff81bae6f0 T intel_cx0pll_readout_hw_state +ffffffff81baef20 T intel_cx0pll_compare_hw_state +ffffffff81baf050 T intel_cx0pll_calc_port_clock +ffffffff81baf250 T intel_cx0pll_state_verify +ffffffff81bb0040 t __intel_cx0_read +ffffffff81bb0460 t __intel_cx0_write +ffffffff81bb0a00 t intel_cx0_bus_reset +ffffffff81bb0c90 t intel_cx0_wait_for_ack +ffffffff81bb0f90 t intel_cx0_powerdown_change_sequence +ffffffff81bb1400 t intel_c20_sram_write +ffffffff81bb1500 t intel_c20_sram_read +ffffffff81bb2000 T hsw_prepare_dp_ddi_buffers +ffffffff81bb2230 T intel_wait_ddi_buf_idle +ffffffff81bb2480 t __intel_de_read +ffffffff81bb2510 T intel_ddi_set_dp_msa +ffffffff81bb2740 T intel_ddi_enable_transcoder_func +ffffffff81bb28c0 t intel_ddi_transcoder_func_reg_val_get +ffffffff81bb2b90 T intel_ddi_disable_transcoder_func +ffffffff81bb2e70 T intel_ddi_toggle_hdcp_bits +ffffffff81bb3010 T intel_ddi_connector_get_hw_state +ffffffff81bb31e0 T intel_ddi_get_hw_state +ffffffff81bb3260 t intel_ddi_get_encoder_pipes +ffffffff81bb3820 T intel_ddi_enable_transcoder_clock +ffffffff81bb3930 T intel_ddi_disable_transcoder_clock +ffffffff81bb39f0 T intel_ddi_level +ffffffff81bb3c10 T icl_ddi_combo_get_pll +ffffffff81bb3cd0 T hsw_ddi_enable_clock +ffffffff81bb3de0 T hsw_ddi_disable_clock +ffffffff81bb3e70 T hsw_ddi_is_clock_enabled +ffffffff81bb3f20 T intel_ddi_enable_clock +ffffffff81bb3f60 T intel_ddi_disable_clock +ffffffff81bb3fa0 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff81bb4190 T dp_tp_ctl_reg +ffffffff81bb4210 T dp_tp_status_reg +ffffffff81bb4290 T intel_ddi_wait_for_fec_status +ffffffff81bb4630 T hsw_chicken_trans_reg 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intel_ddi_encoder_shutdown +ffffffff81bba240 t intel_ddi_get_power_domains +ffffffff81bba350 t mtl_ddi_get_config +ffffffff81bba3d0 t dg2_ddi_get_config +ffffffff81bba430 t adls_ddi_enable_clock +ffffffff81bba640 t adls_ddi_disable_clock +ffffffff81bba750 t adls_ddi_is_clock_enabled +ffffffff81bba830 t adls_ddi_get_config +ffffffff81bba960 t rkl_ddi_enable_clock +ffffffff81bbab80 t rkl_ddi_disable_clock +ffffffff81bbac70 t rkl_ddi_is_clock_enabled +ffffffff81bbad30 t rkl_ddi_get_config +ffffffff81bbae60 t dg1_ddi_enable_clock +ffffffff81bbb0c0 t dg1_ddi_disable_clock +ffffffff81bbb1d0 t dg1_ddi_is_clock_enabled +ffffffff81bbb2c0 t dg1_ddi_get_config +ffffffff81bbb3e0 t jsl_ddi_tc_enable_clock +ffffffff81bbb4d0 t jsl_ddi_tc_disable_clock +ffffffff81bbb630 t jsl_ddi_tc_is_clock_enabled +ffffffff81bbb780 t icl_ddi_tc_port_pll_type +ffffffff81bbb810 t icl_ddi_combo_get_config +ffffffff81bbb910 t icl_ddi_combo_enable_clock +ffffffff81bbbb00 t icl_ddi_combo_disable_clock +ffffffff81bbbbf0 t icl_ddi_combo_is_clock_enabled +ffffffff81bbbcb0 t icl_ddi_tc_enable_clock +ffffffff81bbbf30 t icl_ddi_tc_disable_clock +ffffffff81bbc0a0 t icl_ddi_tc_is_clock_enabled +ffffffff81bbc1e0 t icl_ddi_tc_get_config +ffffffff81bbc4e0 t bxt_ddi_get_config +ffffffff81bbc570 t skl_ddi_enable_clock +ffffffff81bbc6d0 t skl_ddi_disable_clock +ffffffff81bbc7b0 t skl_ddi_is_clock_enabled +ffffffff81bbc870 t skl_ddi_get_config +ffffffff81bbc970 t icl_combo_phy_set_signal_levels +ffffffff81bbd580 t tgl_dkl_phy_set_signal_levels +ffffffff81bbd920 t icl_mg_phy_set_signal_levels +ffffffff81bbe910 t hsw_set_signal_levels +ffffffff81bbee50 t intel_ddi_max_lanes +ffffffff81bbef80 t intel_ddi_tc_encoder_suspend_complete +ffffffff81bbefe0 t intel_ddi_tc_encoder_shutdown_complete +ffffffff81bbf020 t lpt_digital_port_connected +ffffffff81bbf0e0 t bdw_digital_port_connected +ffffffff81bbf1a0 t hsw_digital_port_connected +ffffffff81bbf260 t intel_ddi_init_dp_connector +ffffffff81bbf350 t intel_ddi_init_hdmi_connector +ffffffff81bbf3d0 t bdw_transcoder_master_readout +ffffffff81bbf520 t intel_ddi_encoder_reset +ffffffff81bbf5e0 t intel_ddi_encoder_destroy +ffffffff81bbf6b0 t intel_ddi_encoder_late_register +ffffffff81bbf720 t mtl_ddi_enable_d2d +ffffffff81bbf9b0 t intel_wait_ddi_buf_active +ffffffff81bbfdc0 t main_link_aux_power_domain_get +ffffffff81bbfed0 t icl_program_mg_dp_mode +ffffffff81bc02e0 t intel_ddi_init_dp_buf_reg +ffffffff81bc04d0 t intel_dp_sink_set_fec_ready +ffffffff81bc0610 t intel_disable_ddi_buf +ffffffff81bc0890 t mtl_disable_ddi_buf +ffffffff81bc0ee0 t intel_ddi_disable_fec +ffffffff81bc10c0 t mtl_ddi_prepare_link_retrain +ffffffff81bc1650 t intel_ddi_prepare_link_retrain +ffffffff81bc1e00 t intel_ddi_set_link_train +ffffffff81bc1fe0 t intel_ddi_set_idle_link_train +ffffffff81bc2240 t intel_ddi_dp_voltage_max +ffffffff81bc2300 t intel_ddi_dp_preemph_max +ffffffff81bc3000 T is_hobl_buf_trans +ffffffff81bc3040 T intel_ddi_buf_trans_init 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intel_crtc_readout_derived_state +ffffffff81bc7cf0 T intel_link_compute_m_n +ffffffff81bc7e50 T intel_panel_sanitize_ssc +ffffffff81bc7f80 T intel_zero_m_n +ffffffff81bc7fc0 T intel_set_m_n +ffffffff81bc8180 T intel_cpu_transcoder_has_m2_n2 +ffffffff81bc81e0 T intel_cpu_transcoder_set_m1_n1 +ffffffff81bc8280 T intel_cpu_transcoder_set_m2_n2 +ffffffff81bc8320 T i9xx_set_pipeconf +ffffffff81bc8550 T ilk_set_pipeconf +ffffffff81bc87b0 T bdw_get_pipe_misc_bpp +ffffffff81bc88e0 T ilk_get_lanes_required +ffffffff81bc8940 T intel_get_m_n +ffffffff81bc8ba0 T intel_cpu_transcoder_get_m1_n1 +ffffffff81bc8c40 T intel_cpu_transcoder_get_m2_n2 +ffffffff81bc8ce0 T intel_crtc_get_pipe_config +ffffffff81bc8d60 T intel_dotclock_calculate +ffffffff81bc8e10 T intel_crtc_dotclock +ffffffff81bc8f80 T intel_encoder_current_mode +ffffffff81bc9190 T intel_fuzzy_clock_check +ffffffff81bc91e0 T intel_pipe_config_compare +ffffffff81bcd860 t pipe_config_mismatch +ffffffff81bcd910 T intel_modeset_pipes_in_mask_early +ffffffff81bcd9f0 t intel_modeset_pipe +ffffffff81bcdb50 T intel_modeset_all_pipes_late +ffffffff81bcdc60 T intel_modeset_commit_pipes +ffffffff81bcdd70 T intel_calc_active_pipes +ffffffff81bcde00 T intel_atomic_add_affected_planes +ffffffff81bcdee0 T intel_atomic_check +ffffffff81bd1200 t intel_modeset_checks +ffffffff81bd1390 t intel_atomic_check_crtcs +ffffffff81bd17c0 t intel_async_flip_check_hw +ffffffff81bd1cc0 T intel_crtc_arm_fifo_underrun +ffffffff81bd1d60 T intel_atomic_commit +ffffffff81bd2110 t intel_atomic_commit_work +ffffffff81bd2130 t intel_atomic_commit_tail +ffffffff81bd3990 T intel_plane_destroy +ffffffff81bd39d0 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81bd3a50 T assert_port_valid +ffffffff81bd3ad0 T intel_setup_outputs +ffffffff81bd48c0 T intel_mode_valid +ffffffff81bd4a40 T intel_cpu_transcoder_mode_valid +ffffffff81bd4b00 T intel_mode_valid_max_plane_size +ffffffff81bd4b80 T intel_init_display_hooks +ffffffff81bd4c20 T intel_initial_commit +ffffffff81bd4e30 T i830_enable_pipe +ffffffff81bd58c0 T i830_disable_pipe +ffffffff81bd5e20 T intel_hpd_poll_fini +ffffffff81bd5f70 T intel_scanout_needs_vtd_wa +ffffffff81bd5fb0 t copy_joiner_crtc_state_nomodeset +ffffffff81bd60e0 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81bd6280 t intel_atomic_cleanup_work +ffffffff81bd6370 t intel_pre_plane_update +ffffffff81bd6c60 t hsw_get_pipe_config +ffffffff81bd7bf0 t hsw_crtc_enable +ffffffff81bd8980 t hsw_crtc_disable +ffffffff81bd8ca0 t skl_commit_modeset_enables +ffffffff81bd94e0 t intel_get_transcoder_timings +ffffffff81bd9a80 t intel_get_pipe_src_size +ffffffff81bd9bf0 t ilk_get_pfit_config +ffffffff81bd9e60 t enabled_joiner_pipes +ffffffff81bda180 t bdw_set_pipe_misc +ffffffff81bda310 t ilk_pfit_enable +ffffffff81bda460 t icl_set_pipe_chicken +ffffffff81bda580 t intel_set_transcoder_timings +ffffffff81bdac00 t intel_pre_update_crtc +ffffffff81bdaeb0 t intel_update_crtc +ffffffff81bdb770 t intel_commit_modeset_enables +ffffffff81bdb940 t ilk_get_pipe_config +ffffffff81bdbb80 t ilk_crtc_enable +ffffffff81bdc150 t ilk_crtc_disable +ffffffff81bdc440 t i9xx_get_pipe_config +ffffffff81bdc910 t valleyview_crtc_enable +ffffffff81bdce90 t i9xx_crtc_disable +ffffffff81bdd320 t i9xx_configure_cpu_transcoder +ffffffff81bdd490 t i9xx_pfit_enable +ffffffff81bdd720 t i9xx_crtc_enable +ffffffff81bde000 T intel_display_device_probe +ffffffff81bde6b0 T intel_display_device_remove +ffffffff81bde6d0 T intel_display_device_info_runtime_init +ffffffff81bdf010 T intel_display_device_info_print +ffffffff81bdf510 T intel_display_device_enabled +ffffffff81be0000 T intel_display_driver_probe_defer +ffffffff81be0030 T intel_display_driver_init_hw +ffffffff81be0110 T intel_display_driver_early_probe +ffffffff81be02c0 T intel_display_driver_probe_noirq +ffffffff81be0610 T intel_display_driver_enable_user_access +ffffffff81be0650 t set_display_access +ffffffff81be0780 T intel_display_driver_disable_user_access +ffffffff81be07c0 T intel_display_driver_suspend_access +ffffffff81be07e0 T intel_display_driver_resume_access +ffffffff81be0810 T intel_display_driver_check_access +ffffffff81be0970 T intel_display_driver_probe_nogem +ffffffff81be0d70 T intel_display_driver_probe +ffffffff81be0e30 T intel_display_driver_register +ffffffff81be0f60 T intel_display_driver_remove +ffffffff81be0fe0 T intel_display_driver_remove_noirq +ffffffff81be1100 T intel_display_driver_remove_nogem +ffffffff81be1160 T intel_display_driver_unregister +ffffffff81be1240 T intel_display_driver_suspend +ffffffff81be1300 T __intel_display_driver_resume +ffffffff81be1440 T intel_display_driver_resume +ffffffff81be2000 T ilk_update_display_irq +ffffffff81be2150 T ilk_enable_display_irq +ffffffff81be2170 T ilk_disable_display_irq +ffffffff81be2270 T bdw_update_port_irq +ffffffff81be23e0 T bdw_enable_pipe_irq +ffffffff81be2400 t bdw_update_pipe_irq +ffffffff81be2560 T bdw_disable_pipe_irq +ffffffff81be2680 T ibx_display_interrupt_update +ffffffff81be27c0 T ibx_enable_display_interrupt +ffffffff81be27e0 T ibx_disable_display_interrupt +ffffffff81be28c0 T i915_pipestat_enable_mask +ffffffff81be2a80 T i915_enable_pipestat +ffffffff81be2c20 T i915_disable_pipestat +ffffffff81be2dc0 T i915_enable_asle_pipestat +ffffffff81be2e90 T i9xx_pipestat_irq_reset +ffffffff81be3040 T i9xx_pipestat_irq_ack +ffffffff81be31e0 T i8xx_pipestat_irq_handler +ffffffff81be3480 t i9xx_pipe_crc_irq_handler +ffffffff81be35f0 T i915_pipestat_irq_handler +ffffffff81be38d0 T i965_pipestat_irq_handler +ffffffff81be3bc0 T valleyview_pipestat_irq_handler +ffffffff81be3d70 T ilk_display_irq_handler +ffffffff81be4360 t cpt_irq_handler +ffffffff81be4750 T ivb_display_irq_handler +ffffffff81be4c20 T gen8_de_pipe_underrun_mask +ffffffff81be4c60 T gen8_de_irq_handler +ffffffff81be5c40 T gen11_gu_misc_irq_ack +ffffffff81be5c90 T gen11_gu_misc_irq_handler +ffffffff81be5cd0 T gen11_display_irq_handler +ffffffff81be5d60 T i8xx_enable_vblank +ffffffff81be5df0 T i915gm_enable_vblank +ffffffff81be5ec0 T i965_enable_vblank +ffffffff81be5f50 T ilk_enable_vblank +ffffffff81be6020 T bdw_enable_vblank +ffffffff81be6230 T i8xx_disable_vblank +ffffffff81be62a0 T i915gm_disable_vblank +ffffffff81be6380 T i965_disable_vblank +ffffffff81be63f0 T ilk_disable_vblank +ffffffff81be6510 T bdw_disable_vblank +ffffffff81be66e0 T vlv_display_irq_reset +ffffffff81be6800 T vlv_display_irq_postinstall +ffffffff81be6970 T gen8_display_irq_reset +ffffffff81be6b40 T gen11_display_irq_reset +ffffffff81be6e70 T gen8_irq_power_well_post_enable +ffffffff81be7010 T gen8_irq_power_well_pre_disable +ffffffff81be7160 T valleyview_enable_display_irqs +ffffffff81be72c0 T valleyview_disable_display_irqs +ffffffff81be7410 T ilk_de_irq_postinstall +ffffffff81be7530 T gen8_de_irq_postinstall +ffffffff81be7a70 T gen11_de_irq_postinstall +ffffffff81be7af0 T dg1_de_irq_postinstall +ffffffff81be7b70 T intel_display_irq_init +ffffffff81be8000 T intel_display_params_dump +ffffffff81be8610 T intel_display_params_copy +ffffffff81be8710 T intel_display_params_free +ffffffff81be9000 T intel_display_power_is_enabled +ffffffff81be9120 T intel_display_power_set_target_dc_state +ffffffff81be9270 T intel_display_power_get +ffffffff81be9310 t __intel_display_power_get_domain +ffffffff81be9520 T intel_display_power_get_if_enabled +ffffffff81be96a0 T __intel_display_power_put_async +ffffffff81be98d0 t __intel_display_power_put_domain +ffffffff81be9a70 T intel_display_power_flush_work +ffffffff81be9c10 T intel_display_power_put_unchecked +ffffffff81be9c80 T intel_display_power_get_in_set +ffffffff81be9d80 T intel_display_power_get_in_set_if_enabled +ffffffff81be9e40 T intel_display_power_put_mask_in_set +ffffffff81be9f30 T intel_power_domains_init +ffffffff81bea1c0 t intel_display_power_put_async_work +ffffffff81bea4b0 T intel_power_domains_cleanup +ffffffff81bea4d0 T gen9_dbuf_slices_update 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t vlv_power_well_enabled +ffffffff81bf3d10 t i830_pipes_power_well_sync_hw +ffffffff81bf3d60 t i830_pipes_power_well_enable +ffffffff81bf3ec0 t i830_pipes_power_well_disable +ffffffff81bf3f00 t i830_pipes_power_well_enabled +ffffffff81bf4040 t hsw_power_well_sync_hw +ffffffff81bf4230 t hsw_power_well_enable +ffffffff81bf45e0 t hsw_power_well_disable +ffffffff81bf46f0 t hsw_power_well_enabled +ffffffff81bf4850 t gen9_dc_off_power_well_enable +ffffffff81bf4860 t gen9_dc_off_power_well_disable +ffffffff81bf4910 t gen9_dc_off_power_well_enabled +ffffffff81bf4a20 t bxt_dpio_cmn_power_well_enable +ffffffff81bf4a50 t bxt_dpio_cmn_power_well_disable +ffffffff81bf4a80 t bxt_dpio_cmn_power_well_enabled +ffffffff81bf4ab0 t vlv_display_power_well_enable +ffffffff81bf4af0 t vlv_display_power_well_disable +ffffffff81bf4ba0 t vlv_dpio_cmn_power_well_enable +ffffffff81bf4c80 t vlv_dpio_cmn_power_well_disable +ffffffff81bf4df0 t vlv_power_well_enable +ffffffff81bf4e10 t vlv_power_well_disable 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intel_dmc_debugfs_register +ffffffff81bff000 T intel_dmc_wl_init +ffffffff81bff0d0 t intel_dmc_wl_work +ffffffff81bff1f0 T intel_dmc_wl_enable +ffffffff81bff310 T intel_dmc_wl_disable +ffffffff81bff450 T intel_dmc_wl_get +ffffffff81bff670 T intel_dmc_wl_put +ffffffff81bff7f0 t __delayed_work_tick +ffffffff81c00000 T intel_dp_is_edp +ffffffff81c00030 T intel_dp_is_uhbr +ffffffff81c00070 T intel_dp_link_symbol_size +ffffffff81c000b0 T intel_dp_link_symbol_clock +ffffffff81c00100 T intel_dp_common_rate +ffffffff81c00190 T intel_dp_max_common_rate +ffffffff81c00220 T intel_dp_max_source_lane_count +ffffffff81c00280 T intel_dp_max_common_lane_count +ffffffff81c00350 T intel_dp_max_lane_count +ffffffff81c00480 T intel_dp_link_required +ffffffff81c004c0 T intel_dp_effective_data_rate +ffffffff81c00510 T intel_dp_max_link_data_rate +ffffffff81c00530 T intel_dp_has_joiner +ffffffff81c005a0 T intel_dp_rate_index +ffffffff81c00600 T intel_dp_link_config_get +ffffffff81c00720 T intel_dp_link_config_index +ffffffff81c007f0 T intel_dp_mode_to_fec_clock +ffffffff81c00840 T intel_dp_bw_fec_overhead +ffffffff81c00880 T intel_dp_dsc_nearest_valid_bpp +ffffffff81c00990 T intel_dp_dsc_get_max_compressed_bpp +ffffffff81c00ae0 T intel_dp_dsc_get_slice_count +ffffffff81c00c90 T intel_dp_min_bpp +ffffffff81c00cd0 T intel_dp_output_bpp +ffffffff81c00d10 T intel_dp_need_joiner +ffffffff81c00d90 T intel_dp_has_dsc +ffffffff81c00e00 T intel_dp_source_supports_tps3 +ffffffff81c00e50 T intel_dp_source_supports_tps4 +ffffffff81c00e90 T intel_dp_max_link_rate +ffffffff81c00f90 T intel_dp_rate_select +ffffffff81c01030 T intel_dp_compute_rate +ffffffff81c01110 T intel_dp_has_hdmi_sink +ffffffff81c01150 T intel_dp_supports_fec +ffffffff81c011b0 T intel_dp_supports_dsc +ffffffff81c01240 T intel_dp_adjust_compliance_config +ffffffff81c01340 t intel_dp_link_params_valid +ffffffff81c014a0 T intel_dp_dsc_compute_max_bpp +ffffffff81c01560 T intel_dp_dsc_sink_min_compressed_bpp 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intel_dp_sink_disable_decompression +ffffffff81c039f0 T intel_dp_wait_source_oui +ffffffff81c03af0 T intel_dp_set_power +ffffffff81c03d70 T intel_dp_sync_state +ffffffff81c03e50 t intel_dp_get_dpcd +ffffffff81c04050 T intel_dp_initial_fastset_check +ffffffff81c041a0 T intel_dp_check_frl_training +ffffffff81c04830 T intel_dp_pcon_dsc_configure +ffffffff81c04a60 T intel_dp_configure_protocol_converter +ffffffff81c04c50 T intel_dp_get_colorimetry_status +ffffffff81c04cc0 T intel_dp_get_dsc_sink_cap +ffffffff81c04e80 T intel_edp_fixup_vbt_bpp +ffffffff81c04f20 T intel_dp_update_sink_caps +ffffffff81c04ff0 t intel_dp_set_sink_rates +ffffffff81c05240 t intel_dp_set_common_rates +ffffffff81c05770 T intel_dp_needs_vsc_sdp +ffffffff81c057c0 T intel_dp_set_infoframes +ffffffff81c05ce0 T intel_read_dp_sdp +ffffffff81c061b0 T intel_dp_get_active_pipes +ffffffff81c064c0 T intel_dp_link_check +ffffffff81c06760 T intel_dp_check_link_state +ffffffff81c067e0 t intel_dp_needs_link_retrain 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intel_dp_tmds_clock_valid +ffffffff81c0adb0 t intel_dp_dsc_aux_ref_count +ffffffff81c0af20 t link_config_cmp_by_bw +ffffffff81c0b140 t intel_dp_link_ok +ffffffff81c0b230 t intel_dp_check_device_service_irq +ffffffff81c0b8a0 t intel_dp_force +ffffffff81c0b9e0 t intel_dp_connector_register +ffffffff81c0bae0 t intel_dp_connector_unregister +ffffffff81c0bb40 t intel_dp_oob_hotplug_event +ffffffff81c0bc20 t intel_dp_set_edid +ffffffff81c0c0c0 t intel_dp_get_modes +ffffffff81c0c1e0 t intel_dp_detect +ffffffff81c0cd60 t intel_dp_mode_valid +ffffffff81c0d140 t intel_dp_connector_atomic_check +ffffffff81c0d560 t intel_dp_mode_min_output_bpp +ffffffff81c0d5d0 t intel_dp_mode_valid_downstream +ffffffff81c0e000 T intel_dp_aux_pack +ffffffff81c0e070 T intel_dp_aux_fw_sync_len +ffffffff81c0e0c0 T intel_dp_aux_fini +ffffffff81c0e0e0 T intel_dp_aux_init +ffffffff81c0e350 t xelpdp_aux_ctl_reg +ffffffff81c0e420 t xelpdp_aux_data_reg +ffffffff81c0e510 t tgl_aux_ctl_reg +ffffffff81c0e580 t tgl_aux_data_reg +ffffffff81c0e600 t skl_aux_ctl_reg +ffffffff81c0e670 t skl_aux_data_reg +ffffffff81c0e6f0 t ilk_aux_ctl_reg +ffffffff81c0e760 t ilk_aux_data_reg +ffffffff81c0e7e0 t vlv_aux_ctl_reg +ffffffff81c0e850 t vlv_aux_data_reg +ffffffff81c0e8d0 t g4x_aux_ctl_reg +ffffffff81c0e940 t g4x_aux_data_reg +ffffffff81c0e9c0 t skl_get_aux_clock_divider +ffffffff81c0e9f0 t hsw_get_aux_clock_divider +ffffffff81c0ea90 t ilk_get_aux_clock_divider +ffffffff81c0eb00 t g4x_get_aux_clock_divider +ffffffff81c0eb60 t skl_get_aux_send_ctl +ffffffff81c0ec20 t g4x_get_aux_send_ctl +ffffffff81c0ec80 t kasprintf +ffffffff81c0ed60 t intel_dp_aux_transfer +ffffffff81c0f030 T intel_dp_aux_ch +ffffffff81c0f2f0 T intel_dp_aux_irq_handler +ffffffff81c0f390 t intel_dp_aux_xfer +ffffffff81c10000 T intel_dp_aux_init_backlight_funcs +ffffffff81c102c0 t intel_dp_aux_hdr_setup_backlight +ffffffff81c10530 t intel_dp_aux_hdr_get_backlight +ffffffff81c106e0 t intel_dp_aux_hdr_set_backlight +ffffffff81c10810 t intel_dp_aux_hdr_disable_backlight +ffffffff81c108a0 t intel_dp_aux_hdr_enable_backlight +ffffffff81c10cc0 t intel_dp_aux_vesa_setup_backlight +ffffffff81c10fa0 t intel_dp_aux_vesa_get_backlight +ffffffff81c10fd0 t intel_dp_aux_vesa_set_backlight +ffffffff81c11080 t intel_dp_aux_vesa_disable_backlight +ffffffff81c11140 t intel_dp_aux_vesa_enable_backlight +ffffffff81c12000 T intel_dp_hdcp_init +ffffffff81c120c0 t intel_dp_hdcp_write_an_aksv +ffffffff81c121d0 t intel_dp_hdcp_read_bksv +ffffffff81c12270 t intel_dp_hdcp_read_bstatus +ffffffff81c12310 t intel_dp_hdcp_repeater_present +ffffffff81c123d0 t intel_dp_hdcp_read_ri_prime +ffffffff81c12470 t intel_dp_hdcp_read_ksv_ready +ffffffff81c12520 t intel_dp_hdcp_read_ksv_fifo +ffffffff81c12620 t intel_dp_hdcp_read_v_prime_part +ffffffff81c126d0 t intel_dp_hdcp_toggle_signalling +ffffffff81c12700 t intel_dp_mst_hdcp_stream_encryption +ffffffff81c12970 t intel_dp_hdcp_check_link +ffffffff81c12a00 t intel_dp_hdcp_get_capability +ffffffff81c12ac0 t intel_dp_hdcp2_get_capability +ffffffff81c12b30 t intel_dp_hdcp2_write_msg +ffffffff81c12d20 t intel_dp_hdcp2_read_msg +ffffffff81c13560 t intel_dp_hdcp2_config_stream_type +ffffffff81c135c0 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81c138f0 t intel_dp_mst_hdcp2_check_link +ffffffff81c139f0 t intel_dp_hdcp_get_remote_capability +ffffffff81c13b00 t _intel_dp_hdcp2_get_capability +ffffffff81c13be0 t intel_dp_hdcp2_check_link +ffffffff81c14000 T intel_dp_read_dprx_caps +ffffffff81c140e0 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81c145e0 T intel_dp_get_adjust_train +ffffffff81c14fa0 T intel_dp_program_link_training_pattern +ffffffff81c150e0 T intel_dp_set_signal_levels +ffffffff81c15520 T intel_dp_link_training_set_mode +ffffffff81c15590 T intel_dp_link_training_set_bw +ffffffff81c15650 T intel_dp_dump_link_status +ffffffff81c15760 T intel_dp_stop_link_train +ffffffff81c15aa0 T intel_dp_start_link_train +ffffffff81c18750 T intel_dp_128b132b_sdp_crc16 +ffffffff81c18860 T intel_dp_link_training_debugfs_add +ffffffff81c18890 t intel_dp_link_train_phy +ffffffff81c1b000 T intel_dp_mst_atomic_check_link +ffffffff81c1b390 T intel_dp_mst_encoder_active_links +ffffffff81c1b3c0 T intel_dp_mst_encoder_init +ffffffff81c1b650 T intel_dp_mst_source_support +ffffffff81c1b690 T intel_dp_mst_encoder_cleanup +ffffffff81c1b6f0 T intel_dp_mst_is_master_trans +ffffffff81c1b730 T intel_dp_mst_is_slave_trans +ffffffff81c1b770 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81c1b840 T intel_dp_mst_crtc_needs_modeset +ffffffff81c1b960 T intel_dp_mst_prepare_probe +ffffffff81c1ba60 T intel_dp_mst_verify_dpcd_state +ffffffff81c1bb50 t intel_dp_add_mst_connector +ffffffff81c1bf70 t intel_dp_mst_poll_hpd_irq +ffffffff81c1bf90 t intel_dp_mst_get_hw_state +ffffffff81c1c000 t intel_dp_mst_connector_late_register +ffffffff81c1c090 t intel_dp_mst_connector_early_unregister +ffffffff81c1c0d0 t intel_dp_mst_get_modes +ffffffff81c1c1c0 t intel_dp_mst_detect +ffffffff81c1c290 t intel_dp_mst_mode_valid_ctx +ffffffff81c1c570 t intel_mst_atomic_best_encoder +ffffffff81c1c5d0 t intel_dp_mst_atomic_check +ffffffff81c1c7c0 t intel_dp_mst_compute_config +ffffffff81c1ced0 t intel_dp_mst_compute_config_late +ffffffff81c1cfe0 t intel_mst_disable_dp +ffffffff81c1d080 t intel_mst_post_disable_dp +ffffffff81c1d550 t intel_mst_post_pll_disable_dp +ffffffff81c1d5b0 t intel_mst_pre_pll_enable_dp +ffffffff81c1d5f0 t intel_mst_pre_enable_dp +ffffffff81c1d890 t intel_mst_enable_dp +ffffffff81c1e020 t intel_dp_mst_enc_get_hw_state +ffffffff81c1e060 t intel_dp_mst_enc_get_config +ffffffff81c1e080 t intel_dp_mst_initial_fastset_check +ffffffff81c1e0a0 t intel_dp_mst_encoder_destroy +ffffffff81c1e0e0 t intel_dp_mst_compute_config_limits +ffffffff81c1e450 t intel_dp_mst_find_vcpi_slots_for_bpp +ffffffff81c1eb60 t wait_for_act_sent +ffffffff81c1f000 T bxt_port_to_phy_channel +ffffffff81c1f120 T bxt_dpio_phy_set_signal_levels +ffffffff81c1f8e0 T bxt_dpio_phy_is_enabled +ffffffff81c1faf0 T bxt_dpio_phy_uninit +ffffffff81c1fc70 T bxt_dpio_phy_init +ffffffff81c1fe80 t _bxt_dpio_phy_init +ffffffff81c206b0 T bxt_dpio_phy_verify_state +ffffffff81c20920 t __phy_reg_verify_state +ffffffff81c20a80 T bxt_dpio_phy_calc_lane_lat_optim_mask +ffffffff81c20af0 T bxt_dpio_phy_set_lane_optim_mask +ffffffff81c20e80 T bxt_dpio_phy_get_lane_lat_optim_mask +ffffffff81c21170 T vlv_dig_port_to_channel +ffffffff81c211e0 T vlv_dig_port_to_phy +ffffffff81c21250 T vlv_pipe_to_phy +ffffffff81c212b0 T vlv_pipe_to_channel +ffffffff81c21310 T chv_set_phy_signal_level +ffffffff81c21730 T chv_data_lane_soft_reset +ffffffff81c21980 T chv_phy_pre_pll_enable +ffffffff81c21d00 T chv_phy_pre_encoder_enable +ffffffff81c22020 T chv_phy_release_cl2_override +ffffffff81c220c0 T chv_phy_post_pll_disable +ffffffff81c221d0 T vlv_set_phy_signal_level +ffffffff81c223f0 T vlv_phy_pre_pll_enable +ffffffff81c22590 T vlv_phy_pre_encoder_enable +ffffffff81c22700 T vlv_phy_reset_lanes +ffffffff81c23000 T i9xx_calc_dpll_params +ffffffff81c23090 T chv_calc_dpll_params +ffffffff81c23130 T i9xx_dpll_get_hw_state +ffffffff81c233c0 T i9xx_crtc_clock_get +ffffffff81c23750 T vlv_crtc_clock_get +ffffffff81c23890 T chv_crtc_clock_get +ffffffff81c23ac0 T bxt_find_best_dpll +ffffffff81c23ae0 t chv_find_best_dpll +ffffffff81c23e20 T i9xx_dpll_compute_fp +ffffffff81c23e60 T vlv_compute_dpll +ffffffff81c23ed0 T chv_compute_dpll +ffffffff81c23f40 T intel_dpll_crtc_compute_clock +ffffffff81c24090 T intel_dpll_crtc_get_shared_dpll +ffffffff81c24210 T intel_dpll_init_clock_hook +ffffffff81c24320 T i9xx_enable_pll +ffffffff81c24950 T vlv_enable_pll +ffffffff81c25080 T chv_enable_pll +ffffffff81c25980 T vlv_force_pll_on +ffffffff81c25ae0 T vlv_disable_pll +ffffffff81c25c00 T chv_disable_pll +ffffffff81c25dd0 T i9xx_disable_pll +ffffffff81c25f30 T vlv_force_pll_off +ffffffff81c26080 T assert_pll_enabled +ffffffff81c260a0 t assert_pll +ffffffff81c26220 T assert_pll_disabled +ffffffff81c26240 t intel_pll_is_valid +ffffffff81c26300 t mtl_crtc_compute_clock +ffffffff81c263c0 t dg2_crtc_compute_clock +ffffffff81c26460 t hsw_crtc_compute_clock +ffffffff81c26540 t hsw_crtc_get_shared_dpll +ffffffff81c265f0 t ilk_crtc_compute_clock +ffffffff81c269c0 t ilk_crtc_get_shared_dpll +ffffffff81c26a10 t g4x_find_best_dpll +ffffffff81c26d80 t chv_crtc_compute_clock +ffffffff81c26f20 t vlv_crtc_compute_clock +ffffffff81c27400 t g4x_crtc_compute_clock +ffffffff81c27610 t i9xx_compute_dpll +ffffffff81c278c0 t pnv_crtc_compute_clock +ffffffff81c27d30 t i9xx_crtc_compute_clock +ffffffff81c27ef0 t i9xx_find_best_dpll +ffffffff81c28250 t i8xx_crtc_compute_clock +ffffffff81c29000 T intel_get_shared_dpll_by_id +ffffffff81c29080 T assert_shared_dpll +ffffffff81c29240 T intel_dpll_get_hw_state +ffffffff81c29260 T icl_tc_port_to_pll_id +ffffffff81c29290 T intel_enable_shared_dpll +ffffffff81c29640 T intel_disable_shared_dpll +ffffffff81c29910 T intel_unreference_shared_dpll_crtc +ffffffff81c29a20 T intel_shared_dpll_swap_state +ffffffff81c29b80 T icl_set_active_port_dpll +ffffffff81c29c40 T intel_shared_dpll_init +ffffffff81c29fd0 T intel_compute_shared_dplls +ffffffff81c2a060 T intel_reserve_shared_dplls +ffffffff81c2a0f0 T intel_release_shared_dplls +ffffffff81c2a130 T intel_update_active_dpll +ffffffff81c2a190 T intel_dpll_get_freq +ffffffff81c2a220 T intel_dpll_update_ref_clks +ffffffff81c2a270 T intel_dpll_readout_hw_state +ffffffff81c2a4c0 T intel_dpll_sanitize_state +ffffffff81c2a5d0 T intel_dpll_dump_hw_state +ffffffff81c2a620 t ibx_dump_hw_state +ffffffff81c2a650 T intel_dpll_compare_hw_state +ffffffff81c2a6c0 t ibx_compare_hw_state +ffffffff81c2a710 T intel_shared_dpll_state_verify +ffffffff81c2a970 t verify_single_dpll_state +ffffffff81c2afd0 T intel_shared_dpll_verify_disabled +ffffffff81c2b060 t icl_compute_dplls +ffffffff81c2bd90 t icl_get_dplls +ffffffff81c2c1c0 t icl_put_dplls +ffffffff81c2c280 t icl_update_active_dpll +ffffffff81c2c3c0 t icl_update_dpll_ref_clks +ffffffff81c2c400 t icl_dump_hw_state +ffffffff81c2c4b0 t icl_compare_hw_state +ffffffff81c2c550 t combo_pll_enable +ffffffff81c2c620 t combo_pll_disable +ffffffff81c2c690 t combo_pll_get_hw_state +ffffffff81c2c700 t icl_ddi_combo_pll_get_freq +ffffffff81c2c8e0 t icl_pll_power_enable +ffffffff81c2ca70 t icl_dpll_write +ffffffff81c2cdd0 t icl_pll_enable +ffffffff81c2cf60 t adlp_cmtg_clock_gating_wa +ffffffff81c2d160 t __intel_de_read +ffffffff81c2d1f0 t icl_pll_disable +ffffffff81c2d4a0 t icl_pll_get_hw_state +ffffffff81c2d880 t tbt_pll_enable +ffffffff81c2d8f0 t tbt_pll_disable +ffffffff81c2d910 t tbt_pll_get_hw_state +ffffffff81c2d930 t icl_ddi_tbt_pll_get_freq +ffffffff81c2d9a0 t mg_pll_enable +ffffffff81c2e1f0 t mg_pll_disable +ffffffff81c2e230 t dkl_pll_get_hw_state +ffffffff81c2e4e0 t icl_ddi_mg_pll_get_freq +ffffffff81c2e5c0 t icl_calc_dpll_state +ffffffff81c2e710 t intel_find_shared_dpll +ffffffff81c2eac0 t intel_reference_shared_dpll +ffffffff81c2ec50 t intel_atomic_get_shared_dpll_state +ffffffff81c2edc0 t intel_unreference_shared_dpll +ffffffff81c2eee0 t mg_pll_get_hw_state +ffffffff81c2f440 t bxt_compute_dpll +ffffffff81c2f770 t bxt_get_dpll +ffffffff81c2f880 t intel_put_dpll +ffffffff81c2f8e0 t bxt_update_dpll_ref_clks +ffffffff81c2f920 t bxt_dump_hw_state +ffffffff81c2f9b0 t bxt_compare_hw_state +ffffffff81c2fa30 t bxt_ddi_pll_enable +ffffffff81c30ab0 t bxt_ddi_pll_disable +ffffffff81c30df0 t bxt_ddi_pll_get_hw_state +ffffffff81c31620 t bxt_ddi_pll_get_freq +ffffffff81c316c0 t bxt_ddi_set_dpll_hw_state +ffffffff81c318c0 t skl_compute_dpll +ffffffff81c32020 t skl_get_dpll +ffffffff81c320e0 t skl_update_dpll_ref_clks +ffffffff81c32120 t skl_dump_hw_state +ffffffff81c32150 t skl_compare_hw_state +ffffffff81c321a0 t skl_ddi_dpll0_enable +ffffffff81c322e0 t skl_ddi_dpll0_disable +ffffffff81c32310 t skl_ddi_dpll0_get_hw_state +ffffffff81c324c0 t skl_ddi_pll_get_freq +ffffffff81c32550 t skl_ddi_wrpll_get_freq +ffffffff81c326b0 t skl_ddi_pll_enable +ffffffff81c32b00 t skl_ddi_pll_disable +ffffffff81c32c10 t skl_ddi_pll_get_hw_state +ffffffff81c32e60 t hsw_compute_dpll +ffffffff81c33690 t hsw_get_dpll +ffffffff81c33830 t hsw_update_dpll_ref_clks +ffffffff81c338f0 t hsw_dump_hw_state +ffffffff81c33910 t hsw_compare_hw_state +ffffffff81c33950 t hsw_ddi_wrpll_enable +ffffffff81c33a50 t hsw_ddi_wrpll_disable +ffffffff81c33bc0 t hsw_ddi_wrpll_get_hw_state +ffffffff81c33cb0 t hsw_ddi_wrpll_get_freq +ffffffff81c33da0 t hsw_ddi_spll_enable +ffffffff81c33e90 t hsw_ddi_spll_disable +ffffffff81c33ff0 t hsw_ddi_spll_get_hw_state +ffffffff81c340d0 t hsw_ddi_spll_get_freq +ffffffff81c34170 t hsw_ddi_lcpll_enable +ffffffff81c341a0 t hsw_ddi_lcpll_disable +ffffffff81c341d0 t hsw_ddi_lcpll_get_hw_state +ffffffff81c34200 t hsw_ddi_lcpll_get_freq +ffffffff81c34280 t ibx_compute_dpll +ffffffff81c342b0 t ibx_get_dpll +ffffffff81c34400 t ibx_pch_dpll_enable +ffffffff81c34770 t ibx_pch_dpll_disable +ffffffff81c34870 t ibx_pch_dpll_get_hw_state +ffffffff81c35000 T intel_dpt_pin_to_ggtt +ffffffff81c35270 T intel_dpt_unpin_from_ggtt +ffffffff81c35330 T intel_dpt_resume +ffffffff81c35420 T intel_dpt_suspend +ffffffff81c35510 T intel_dpt_create +ffffffff81c359b0 t dpt_insert_page +ffffffff81c35a80 t dpt_clear_range +ffffffff81c35ab0 t dpt_insert_entries +ffffffff81c35bf0 t dpt_cleanup +ffffffff81c35c90 t dpt_bind_vma +ffffffff81c35d30 t dpt_unbind_vma +ffffffff81c35d60 T intel_dpt_destroy +ffffffff81c35e00 T intel_dpt_offset +ffffffff81c35e30 t __ww_mutex_lock +ffffffff81c36000 T intel_dpt_configure +ffffffff81c37000 T intel_drrs_type_str +ffffffff81c37040 T intel_cpu_transcoder_has_drrs +ffffffff81c37090 T intel_drrs_is_active +ffffffff81c370c0 T intel_drrs_activate +ffffffff81c372c0 T intel_drrs_deactivate +ffffffff81c373d0 t intel_drrs_set_state +ffffffff81c37570 T intel_drrs_invalidate +ffffffff81c37590 t intel_drrs_frontbuffer_update +ffffffff81c37700 T intel_drrs_flush +ffffffff81c37720 T intel_drrs_crtc_init +ffffffff81c377e0 t intel_drrs_downclock_work +ffffffff81c37840 T intel_drrs_crtc_debugfs_add +ffffffff81c37870 T intel_drrs_connector_debugfs_add +ffffffff81c37880 t __delayed_work_tick +ffffffff81c38000 T intel_dsb_reg_write +ffffffff81c38310 T intel_dsb_reg_write_masked +ffffffff81c38430 T intel_dsb_noop +ffffffff81c38530 T intel_dsb_nonpost_start +ffffffff81c38590 T intel_dsb_nonpost_end +ffffffff81c385f0 T intel_dsb_wait_scanline_in +ffffffff81c38640 t assert_dsl_ok +ffffffff81c38780 t intel_dsb_wait_dsl +ffffffff81c38ac0 T intel_dsb_wait_scanline_out +ffffffff81c38b10 T intel_dsb_finish +ffffffff81c38bc0 T intel_dsb_chain +ffffffff81c390b0 T intel_dsb_commit +ffffffff81c39420 T intel_dsb_wait +ffffffff81c39970 T intel_dsb_prepare +ffffffff81c39c20 T intel_dsb_cleanup +ffffffff81c39c60 T intel_dsb_irq_handler +ffffffff81c39d70 t intel_dsb_emit_wait_dsl +ffffffff81c3a000 T intel_dsb_buffer_ggtt_offset +ffffffff81c3a040 T intel_dsb_buffer_write +ffffffff81c3a070 T intel_dsb_buffer_read +ffffffff81c3a0a0 T intel_dsb_buffer_memset +ffffffff81c3a120 T intel_dsb_buffer_create +ffffffff81c3a270 T intel_dsb_buffer_cleanup +ffffffff81c3a290 T intel_dsb_buffer_flush_map +ffffffff81c3b000 T intel_dsi_wait_panel_power_cycle +ffffffff81c3b0f0 T intel_dsi_shutdown +ffffffff81c3b1e0 T intel_dsi_bitrate +ffffffff81c3b270 T intel_dsi_tlpx_ns +ffffffff81c3b2c0 T intel_dsi_get_modes +ffffffff81c3b2d0 T intel_dsi_mode_valid +ffffffff81c3b3a0 T intel_dsi_host_init +ffffffff81c3b460 T intel_dsi_get_panel_orientation +ffffffff81c3c000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81c3c0a0 t dcs_setup_backlight +ffffffff81c3c130 t dcs_get_backlight +ffffffff81c3c230 t dcs_set_backlight +ffffffff81c3c330 t dcs_disable_backlight +ffffffff81c3c700 t dcs_enable_backlight +ffffffff81c3d000 T intel_dsi_vbt_exec_sequence +ffffffff81c3d020 T intel_dsi_log_params +ffffffff81c3d460 T intel_dsi_vbt_init +ffffffff81c3d970 T intel_dsi_vbt_gpio_init +ffffffff81c3e000 T intel_dvo_init +ffffffff81c3e980 t intel_disable_dvo +ffffffff81c3eab0 t intel_enable_dvo +ffffffff81c3ec20 t intel_dvo_get_hw_state +ffffffff81c3ecf0 t intel_dvo_get_config +ffffffff81c3edf0 t intel_dvo_compute_config +ffffffff81c3ee90 t intel_dvo_pre_enable +ffffffff81c3f050 t intel_dvo_connector_get_hw_state +ffffffff81c3f140 t intel_dvo_enc_destroy +ffffffff81c3f180 t intel_dvo_detect +ffffffff81c3f260 t intel_dvo_get_modes +ffffffff81c3f2f0 t intel_dvo_mode_valid +ffffffff81c40000 T intel_encoder_link_check_init +ffffffff81c40090 t intel_encoder_link_check_work_fn +ffffffff81c400b0 T intel_encoder_link_check_flush_work +ffffffff81c40130 T intel_encoder_link_check_queue_work +ffffffff81c40190 T intel_encoder_suspend_all +ffffffff81c40290 T intel_encoder_shutdown_all +ffffffff81c40390 t __delayed_work_tick +ffffffff81c41000 T intel_fb_modifier_to_tiling +ffffffff81c410a0 t lookup_modifier_or_null +ffffffff81c412f0 T intel_fb_get_format_info +ffffffff81c41370 T intel_fb_is_tiled_modifier +ffffffff81c413f0 T intel_fb_is_ccs_modifier +ffffffff81c41470 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81c41500 T intel_fb_is_mc_ccs_modifier +ffffffff81c41590 T intel_fb_needs_64k_phys +ffffffff81c415e0 T intel_fb_is_tile4_modifier +ffffffff81c41670 T intel_fb_plane_get_modifiers +ffffffff81c41a90 t plane_has_modifier +ffffffff81c41bc0 T intel_fb_plane_supports_modifier +ffffffff81c41c40 T intel_format_info_is_yuv_semiplanar +ffffffff81c41d00 T intel_fb_is_ccs_aux_plane +ffffffff81c41df0 T intel_fb_rc_ccs_cc_plane +ffffffff81c41f20 T is_surface_linear +ffffffff81c41fa0 t intel_fb_is_gen12_ccs_aux_plane +ffffffff81c420b0 T main_to_ccs_plane +ffffffff81c421b0 T skl_ccs_to_main_plane +ffffffff81c422c0 T skl_main_to_aux_plane +ffffffff81c42490 T intel_tile_size +ffffffff81c424d0 T intel_tile_width_bytes +ffffffff81c42950 T intel_tile_height +ffffffff81c429c0 T intel_tile_row_size +ffffffff81c42a50 T intel_fb_align_height +ffffffff81c42ad0 T intel_fb_modifier_uses_dpt +ffffffff81c42b10 T intel_fb_uses_dpt +ffffffff81c42b60 T intel_fb_plane_get_subsampling +ffffffff81c42c60 T intel_plane_adjust_aligned_offset +ffffffff81c42ce0 t intel_adjust_aligned_offset +ffffffff81c42ee0 T intel_plane_compute_aligned_offset +ffffffff81c42fa0 t intel_compute_aligned_offset +ffffffff81c431a0 T intel_fb_needs_pot_stride_remap +ffffffff81c43210 T intel_fb_supports_90_270_rotation +ffffffff81c43270 T intel_fill_fb_info +ffffffff81c44040 t calc_plane_remap_info +ffffffff81c44a90 T intel_fb_fill_view +ffffffff81c44b00 T intel_plane_compute_gtt +ffffffff81c450c0 t intel_plane_check_stride +ffffffff81c45290 T intel_framebuffer_init +ffffffff81c45910 T intel_user_framebuffer_create +ffffffff81c45a30 T intel_framebuffer_create +ffffffff81c45ae0 t intel_adjust_tile_offset +ffffffff81c45c20 t intel_user_framebuffer_destroy +ffffffff81c45cb0 t intel_user_framebuffer_create_handle +ffffffff81c45ce0 t intel_user_framebuffer_dirty +ffffffff81c45ec0 t intel_user_framebuffer_fence_wake +ffffffff81c46000 T intel_fb_bo_framebuffer_fini +ffffffff81c46030 T intel_fb_bo_framebuffer_init +ffffffff81c46340 T intel_fb_bo_lookup_valid_bo +ffffffff81c47000 T intel_fb_pin_to_ggtt +ffffffff81c47390 t i915_gem_object_lock +ffffffff81c475e0 T intel_fb_unpin_vma +ffffffff81c47650 T intel_plane_pin_fb +ffffffff81c47b30 T intel_plane_unpin_fb +ffffffff81c48000 T intel_fbc_cleanup +ffffffff81c48180 T intel_fbc_pre_update +ffffffff81c48880 T intel_fbc_post_update +ffffffff81c48a30 T intel_fbc_invalidate +ffffffff81c48b60 T intel_fbc_flush +ffffffff81c48d20 T intel_fbc_atomic_check +ffffffff81c49510 T intel_fbc_disable +ffffffff81c49610 t __intel_fbc_disable +ffffffff81c49790 T intel_fbc_update +ffffffff81c4a1e0 T intel_fbc_reset_underrun +ffffffff81c4a2f0 T intel_fbc_handle_fifo_underrun_irq +ffffffff81c4a450 T intel_fbc_add_plane +ffffffff81c4a480 T intel_fbc_init +ffffffff81c4a680 T intel_fbc_sanitize +ffffffff81c4a7f0 T intel_fbc_crtc_debugfs_add +ffffffff81c4a820 T intel_fbc_debugfs_register +ffffffff81c4a850 t intel_fbc_cfb_size +ffffffff81c4a980 t intel_fbc_update_state +ffffffff81c4aca0 t intel_fbc_underrun_work_fn +ffffffff81c4ada0 t ivb_fbc_activate +ffffffff81c4b190 t ilk_fbc_deactivate +ffffffff81c4b2c0 t ilk_fbc_is_active +ffffffff81c4b370 t ivb_fbc_is_compressing +ffffffff81c4b420 t snb_fbc_nuke +ffffffff81c4b500 t ilk_fbc_program_cfb +ffffffff81c4b590 t ivb_fbc_set_false_color +ffffffff81c4b650 t snb_fbc_activate +ffffffff81c4b750 t ilk_fbc_is_compressing +ffffffff81c4b800 t ilk_fbc_activate +ffffffff81c4b9b0 t i965_fbc_nuke +ffffffff81c4ba50 t g4x_fbc_activate +ffffffff81c4bbd0 t g4x_fbc_deactivate +ffffffff81c4bce0 t g4x_fbc_is_active +ffffffff81c4bd80 t g4x_fbc_is_compressing +ffffffff81c4be20 t g4x_fbc_program_cfb +ffffffff81c4bea0 t i8xx_fbc_activate +ffffffff81c4c0e0 t i8xx_fbc_deactivate +ffffffff81c4c280 t i8xx_fbc_is_active +ffffffff81c4c320 t i8xx_fbc_is_compressing +ffffffff81c4c3c0 t i8xx_fbc_program_cfb +ffffffff81c4c5d0 t i8xx_fbc_nuke +ffffffff81c4d000 T intel_fbdev_set_suspend +ffffffff81c4d030 T intel_fbdev_setup +ffffffff81c4d5f0 t intel_fbdev_suspend_worker +ffffffff81c4d620 T intel_fbdev_framebuffer +ffffffff81c4d660 t intelfb_create +ffffffff81c4db60 t intelfb_dirty +ffffffff81c4dbd0 t intel_fbdev_set_par +ffffffff81c4dc50 t intel_fbdev_client_unregister +ffffffff81c4dcb0 t intel_fbdev_client_restore +ffffffff81c4dd60 t intel_fbdev_client_hotplug +ffffffff81c4e000 T intel_fbdev_fb_alloc +ffffffff81c4e220 T intel_fbdev_fb_fill_info +ffffffff81c4f000 T assert_fdi_tx_enabled +ffffffff81c4f020 t assert_fdi_tx +ffffffff81c4f1b0 T assert_fdi_tx_disabled +ffffffff81c4f1d0 T assert_fdi_rx_enabled +ffffffff81c4f1f0 t assert_fdi_rx +ffffffff81c4f360 T assert_fdi_rx_disabled +ffffffff81c4f380 T assert_fdi_tx_pll_enabled +ffffffff81c4f4e0 T assert_fdi_rx_pll_enabled +ffffffff81c4f500 t assert_fdi_rx_pll +ffffffff81c4f670 T assert_fdi_rx_pll_disabled +ffffffff81c4f690 T intel_fdi_link_train +ffffffff81c4f6b0 T intel_fdi_add_affected_crtcs +ffffffff81c4f800 T intel_fdi_pll_freq_update +ffffffff81c4f900 T intel_fdi_link_freq +ffffffff81c4f950 T intel_fdi_compute_pipe_bpp +ffffffff81c4f9c0 T ilk_fdi_compute_config +ffffffff81c4faa0 T intel_fdi_atomic_check_link +ffffffff81c4fe20 T intel_fdi_normal_train +ffffffff81c50110 T hsw_fdi_link_train +ffffffff81c50be0 T hsw_fdi_disable +ffffffff81c50ee0 T ilk_fdi_pll_enable +ffffffff81c51330 T ilk_fdi_pll_disable +ffffffff81c515d0 T ilk_fdi_disable +ffffffff81c51b40 T intel_fdi_init_hook +ffffffff81c51ba0 t ilk_fdi_link_train +ffffffff81c52970 t gen6_fdi_link_train +ffffffff81c53af0 t ivb_manual_fdi_link_train +ffffffff81c54710 t cpt_set_fdi_bc_bifurcation +ffffffff81c55000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81c555e0 T intel_set_pch_fifo_underrun_reporting +ffffffff81c55900 T intel_cpu_fifo_underrun_irq_handler +ffffffff81c55bb0 T intel_pch_fifo_underrun_irq_handler +ffffffff81c55c40 T intel_check_cpu_fifo_underruns +ffffffff81c56000 T intel_check_pch_fifo_underruns +ffffffff81c56210 T intel_init_fifo_underrun_reporting +ffffffff81c57000 T intel_frontbuffer_flip_prepare +ffffffff81c57060 T intel_frontbuffer_flip_complete +ffffffff81c57180 T intel_frontbuffer_flip +ffffffff81c57290 T __intel_fb_invalidate +ffffffff81c57350 T __intel_fb_flush +ffffffff81c57480 T intel_frontbuffer_queue_flush +ffffffff81c574f0 T intel_frontbuffer_put +ffffffff81c57640 T intel_frontbuffer_get +ffffffff81c577e0 t frontbuffer_active +ffffffff81c57810 t frontbuffer_retire +ffffffff81c57850 t intel_frontbuffer_flush_work +ffffffff81c578b0 T intel_frontbuffer_track +ffffffff81c58000 T intel_atomic_global_obj_init +ffffffff81c58070 T intel_atomic_global_obj_cleanup +ffffffff81c581b0 T intel_atomic_get_global_obj_state +ffffffff81c58440 T intel_atomic_get_old_global_obj_state +ffffffff81c584a0 T intel_atomic_get_new_global_obj_state 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T intel_hdcp_gsc_repeater_check_flow_prepare_ack +ffffffff81c60300 T intel_hdcp_gsc_verify_mprime +ffffffff81c60360 T intel_hdcp_gsc_enable_authentication +ffffffff81c603c0 T intel_hdcp_gsc_close_session +ffffffff81c61000 T hsw_write_infoframe +ffffffff81c61560 t hsw_dip_data_reg +ffffffff81c61750 T hsw_read_infoframe +ffffffff81c61860 T intel_hdmi_infoframe_enable +ffffffff81c61910 T intel_hdmi_infoframes_enabled +ffffffff81c61a60 T intel_read_infoframe +ffffffff81c61c30 T intel_hdmi_read_gcp_infoframe +ffffffff81c61d70 T intel_dp_dual_mode_set_tmds_output +ffffffff81c61e50 T intel_hdmi_tmds_clock +ffffffff81c61ea0 T intel_hdmi_bpc_possible +ffffffff81c61fd0 T intel_hdmi_limited_color_range +ffffffff81c62040 T intel_hdmi_compute_has_hdmi_sink +ffffffff81c620b0 T intel_hdmi_compute_config +ffffffff81c62750 t intel_hdmi_compute_output_format +ffffffff81c628d0 t intel_hdmi_compute_hdmi_infoframe +ffffffff81c629b0 t intel_hdmi_compute_drm_infoframe +ffffffff81c62ad0 T intel_hdmi_encoder_shutdown +ffffffff81c62bb0 T intel_hdmi_handle_sink_scrambling +ffffffff81c62cc0 T intel_infoframe_init +ffffffff81c62e70 t vlv_write_infoframe +ffffffff81c63380 t vlv_read_infoframe +ffffffff81c63590 t vlv_set_infoframes +ffffffff81c639b0 t vlv_infoframes_enabled +ffffffff81c63aa0 t g4x_write_infoframe +ffffffff81c63ef0 t g4x_read_infoframe +ffffffff81c640e0 t g4x_set_infoframes +ffffffff81c64510 t g4x_infoframes_enabled +ffffffff81c645e0 t hsw_set_infoframes +ffffffff81c64940 t hsw_infoframes_enabled +ffffffff81c64a30 t ibx_write_infoframe +ffffffff81c64ed0 t ibx_read_infoframe +ffffffff81c65100 t ibx_set_infoframes +ffffffff81c65510 t ibx_infoframes_enabled +ffffffff81c65600 t cpt_write_infoframe +ffffffff81c65aa0 t cpt_read_infoframe +ffffffff81c65cd0 t cpt_set_infoframes +ffffffff81c66090 t cpt_infoframes_enabled +ffffffff81c66150 T intel_hdmi_init_connector +ffffffff81c669b0 T intel_hdmi_dsc_get_slice_height +ffffffff81c66a10 T intel_hdmi_dsc_get_num_slices +ffffffff81c66b90 T intel_hdmi_dsc_get_bpp +ffffffff81c66c70 t intel_hdmi_compute_clock +ffffffff81c66f20 t hdmi_port_clock_valid +ffffffff81c67180 t intel_hdmi_set_gcp_infoframe +ffffffff81c672d0 t intel_write_infoframe +ffffffff81c674d0 t icl_encoder_to_ddc_pin +ffffffff81c675a0 t cnp_encoder_to_ddc_pin +ffffffff81c67620 t chv_encoder_to_ddc_pin +ffffffff81c67680 t g4x_encoder_to_ddc_pin +ffffffff81c676f0 t intel_hdmi_detect +ffffffff81c678c0 t intel_hdmi_force +ffffffff81c679b0 t intel_hdmi_connector_register +ffffffff81c679c0 t intel_hdmi_connector_unregister +ffffffff81c679d0 t intel_hdmi_set_edid +ffffffff81c67cf0 t intel_hdmi_get_modes +ffffffff81c67d00 t intel_hdmi_mode_valid +ffffffff81c67ee0 t intel_hdmi_connector_atomic_check +ffffffff81c67f10 t intel_hdmi_mode_clock_valid +ffffffff81c68100 t intel_hdmi_hdcp_write_an_aksv +ffffffff81c68280 t intel_hdmi_hdcp_read_bksv +ffffffff81c68360 t intel_hdmi_hdcp_read_bstatus +ffffffff81c68440 t intel_hdmi_hdcp_repeater_present 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i915_hpd_poll_init_work +ffffffff81c6b430 t intel_hpd_irq_storm_reenable_work +ffffffff81c6b7a0 T intel_hpd_cancel_work +ffffffff81c6b880 t cancel_all_detection_work +ffffffff81c6b990 T intel_hpd_disable +ffffffff81c6ba30 T intel_hpd_enable +ffffffff81c6bab0 T intel_hpd_enable_detection_work +ffffffff81c6bda0 T intel_hpd_disable_detection_work +ffffffff81c6bdf0 T intel_hpd_schedule_detection +ffffffff81c6bea0 T intel_hpd_debugfs_register +ffffffff81c6bed0 t __delayed_work_tick +ffffffff81c6c000 T i915_hotplug_interrupt_update_locked +ffffffff81c6c0c0 T i915_hotplug_interrupt_update +ffffffff81c6c1b0 T i9xx_hpd_irq_ack +ffffffff81c6c310 T i9xx_hpd_irq_handler +ffffffff81c6c4d0 T ibx_hpd_irq_handler +ffffffff81c6c6a0 T xelpdp_pica_irq_handler +ffffffff81c6c8e0 T icp_irq_handler +ffffffff81c6cbc0 T spt_irq_handler +ffffffff81c6ce90 T ilk_hpd_irq_handler +ffffffff81c6cfd0 T bxt_hpd_irq_handler +ffffffff81c6d150 T gen11_hpd_irq_handler +ffffffff81c6d3f0 T intel_hpd_enable_detection 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intel_link_bw_set_bpp_limit_for_pipe +ffffffff81c71440 T intel_link_bw_atomic_check +ffffffff81c72000 T intel_load_detect_get_pipe +ffffffff81c724b0 t intel_modeset_disable_planes +ffffffff81c72590 T intel_load_detect_release_pipe +ffffffff81c73000 T intel_lpe_audio_irq_handler +ffffffff81c73020 T intel_lpe_audio_init +ffffffff81c73050 T intel_lpe_audio_teardown +ffffffff81c73070 T intel_lpe_audio_notify +ffffffff81c74000 T lspcon_detect_hdr_capability +ffffffff81c740f0 T lspcon_write_infoframe +ffffffff81c749c0 T lspcon_read_infoframe +ffffffff81c74a00 T lspcon_set_infoframes +ffffffff81c74c90 T lspcon_infoframes_enabled +ffffffff81c74ee0 T lspcon_wait_pcon_mode +ffffffff81c74f00 t lspcon_wait_mode +ffffffff81c752a0 T lspcon_init +ffffffff81c75820 T intel_lspcon_infoframes_enabled +ffffffff81c75850 T lspcon_resume +ffffffff81c75ba0 t lspcon_change_mode +ffffffff81c76000 T intel_lvds_port_enabled +ffffffff81c760d0 T intel_get_lvds_encoder +ffffffff81c76130 T intel_is_dual_link_lvds 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intel_modeset_verify_crtc +ffffffff81c7c640 t verify_connector_state +ffffffff81c7cb30 T intel_modeset_verify_disabled +ffffffff81c7d000 T intel_opregion_notify_encoder +ffffffff81c7d1d0 t swsci +ffffffff81c7d5a0 T intel_opregion_notify_adapter +ffffffff81c7d600 T intel_opregion_asle_present +ffffffff81c7d640 T intel_opregion_asle_intr +ffffffff81c7d6a0 T intel_opregion_setup +ffffffff81c7de00 t asle_work +ffffffff81c7e400 t swsci_setup +ffffffff81c7e560 T intel_opregion_get_panel_type +ffffffff81c7e690 T intel_opregion_get_edid +ffffffff81c7e7b0 T intel_opregion_vbt_present +ffffffff81c7e7f0 T intel_opregion_get_vbt +ffffffff81c7e890 T intel_opregion_headless_sku +ffffffff81c7e900 T intel_opregion_register +ffffffff81c7e990 T intel_opregion_resume +ffffffff81c7ea20 T intel_opregion_suspend +ffffffff81c7eae0 T intel_opregion_unregister +ffffffff81c7ebc0 T intel_opregion_cleanup +ffffffff81c7ec70 T intel_opregion_debugfs_register +ffffffff81c7eca0 t intel_no_opregion_vbt_callback +ffffffff81c7ed00 t intel_use_opregion_panel_type_callback +ffffffff81c7f000 T intel_overlay_reset +ffffffff81c7f050 T intel_overlay_switch_off +ffffffff81c7f2a0 t intel_overlay_release_old_vid +ffffffff81c7f4e0 T intel_overlay_put_image_ioctl +ffffffff81c7f890 t update_pfit_vscale_ratio +ffffffff81c7fa30 t check_overlay_dst +ffffffff81c7fb00 t check_overlay_src +ffffffff81c7fd50 t intel_overlay_do_put_image +ffffffff81c80980 T intel_overlay_attrs_ioctl +ffffffff81c80e00 t check_gamma +ffffffff81c80ff0 t __intel_de_write +ffffffff81c81060 T intel_overlay_setup +ffffffff81c81320 t intel_overlay_last_flip_retire +ffffffff81c81360 T intel_overlay_cleanup +ffffffff81c81420 T intel_overlay_capture_error_state +ffffffff81c815a0 T intel_overlay_print_error_state +ffffffff81c81ae0 t intel_overlay_release_old_vid_tail +ffffffff81c81bb0 t intel_overlay_off_tail +ffffffff81c81ce0 t intel_overlay_flip_prepare +ffffffff81c81e00 t i830_overlay_clock_gating +ffffffff81c82000 T intel_panel_use_ssc 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intel_pch_transcoder_get_m2_n2 +ffffffff81c84140 T ilk_pch_pre_enable +ffffffff81c84170 T ilk_pch_enable +ffffffff81c84a10 t assert_pch_transcoder_disabled +ffffffff81c84b50 t ilk_pch_transcoder_set_timings +ffffffff81c85160 T ilk_pch_disable +ffffffff81c85180 T ilk_pch_post_disable +ffffffff81c85740 T ilk_pch_get_config +ffffffff81c85a10 T lpt_pch_enable +ffffffff81c85d70 T lpt_pch_disable +ffffffff81c85f60 T lpt_pch_get_config +ffffffff81c860d0 T intel_pch_sanitize +ffffffff81c861b0 t assert_pch_dp_disabled +ffffffff81c86360 t assert_pch_hdmi_disabled +ffffffff81c86510 t ibx_sanitize_pch_dp_port +ffffffff81c86650 t ibx_sanitize_pch_hdmi_port +ffffffff81c87000 T lpt_disable_iclkip +ffffffff81c870d0 T lpt_iclkip +ffffffff81c87160 T lpt_program_iclkip +ffffffff81c87500 T lpt_get_iclkip +ffffffff81c87680 T lpt_disable_clkout_dp +ffffffff81c87780 T intel_init_pch_refclk +ffffffff81c88b40 t wrpll_uses_pch_ssc +ffffffff81c89000 T intel_initial_plane_config +ffffffff81c8a000 T intel_pmdemand_init +ffffffff81c8a1a0 T intel_pmdemand_init_early +ffffffff81c8a230 T intel_pmdemand_update_phys_mask +ffffffff81c8a2d0 T intel_pmdemand_update_port_clock +ffffffff81c8a310 T intel_pmdemand_atomic_check +ffffffff81c8a710 t intel_pmdemand_update_max_ddiclk +ffffffff81c8a7e0 t intel_pmdemand_update_active_non_tc_phys +ffffffff81c8a9f0 T intel_pmdemand_init_pmdemand_params +ffffffff81c8ac00 t intel_pmdemand_check_prev_transaction +ffffffff81c8ad30 T intel_pmdemand_program_dbuf +ffffffff81c8af30 t intel_pmdemand_wait +ffffffff81c8b220 T intel_pmdemand_pre_plane_update +ffffffff81c8b340 t intel_pmdemand_program_params +ffffffff81c8b890 T intel_pmdemand_post_plane_update +ffffffff81c8b9a0 t intel_pmdemand_duplicate_state +ffffffff81c8ba40 t intel_pmdemand_destroy_state +ffffffff81c8c000 T intel_pps_lock +ffffffff81c8c090 T intel_pps_unlock +ffffffff81c8c110 T intel_pps_reset_all +ffffffff81c8c270 T intel_pps_check_power_unlocked +ffffffff81c8c6e0 t pps_name +ffffffff81c8c7a0 T intel_pps_wait_power_cycle +ffffffff81c8c890 t wait_panel_power_cycle +ffffffff81c8cab0 T intel_pps_vdd_on_unlocked +ffffffff81c8d270 t ilk_get_pp_control +ffffffff81c8d390 T intel_pps_vdd_on +ffffffff81c8d580 T intel_pps_vdd_off_sync +ffffffff81c8d6b0 t intel_pps_vdd_off_sync_unlocked +ffffffff81c8dc00 T intel_pps_vdd_off_unlocked +ffffffff81c8ddf0 T intel_pps_on_unlocked +ffffffff81c8e550 T intel_pps_on +ffffffff81c8e640 T intel_pps_off_unlocked +ffffffff81c8eac0 T intel_pps_off +ffffffff81c8ebb0 T intel_pps_backlight_on +ffffffff81c8edf0 T intel_pps_backlight_off +ffffffff81c8f050 T intel_pps_backlight_power +ffffffff81c8f210 T vlv_pps_init +ffffffff81c8f430 t vlv_detach_power_sequencer +ffffffff81c8f6b0 t vlv_steal_power_sequencer +ffffffff81c8f7f0 t pps_init_delays +ffffffff81c8fcf0 t pps_init_registers +ffffffff81c90250 T intel_pps_have_panel_power_or_vdd +ffffffff81c90490 T intel_pps_encoder_reset +ffffffff81c906f0 t vlv_initial_power_sequencer_setup +ffffffff81c90cf0 t pps_vdd_init +ffffffff81c90f40 T intel_pps_init +ffffffff81c91580 t edp_panel_vdd_work +ffffffff81c91660 T intel_pps_init_late +ffffffff81c91970 T intel_pps_unlock_regs_wa +ffffffff81c91ad0 T intel_pps_setup +ffffffff81c91b40 T intel_pps_connector_debugfs_add +ffffffff81c91b70 T assert_pps_unlocked +ffffffff81c91f10 t intel_pps_get_registers +ffffffff81c92a90 t wait_panel_status +ffffffff81c93070 t intel_pps_readout_hw_state +ffffffff81c932b0 t __delayed_work_tick +ffffffff81c94000 T intel_encoder_can_psr +ffffffff81c940d0 T intel_psr_needs_aux_io_power +ffffffff81c94190 T intel_psr_irq_handler +ffffffff81c94a00 t transcoder_name +ffffffff81c94a40 T intel_psr_init_dpcd +ffffffff81c94f10 T intel_psr_enable_sink +ffffffff81c95100 T intel_psr_compute_config +ffffffff81c95bb0 t _psr_compute_config +ffffffff81c95d60 T intel_psr_get_config +ffffffff81c95fe0 T intel_psr_disable +ffffffff81c96130 t intel_psr_disable_locked +ffffffff81c96680 T intel_psr_pause +ffffffff81c96800 t intel_psr_exit +ffffffff81c96c50 t intel_psr_wait_exit_locked +ffffffff81c96dc0 T intel_psr_resume +ffffffff81c96e70 t intel_psr_activate +ffffffff81c97aa0 T intel_psr2_program_trans_man_trk_ctl +ffffffff81c97cd0 T intel_psr2_sel_fetch_update +ffffffff81c98670 T intel_psr_pre_plane_update +ffffffff81c988f0 t wm_optimization_wa +ffffffff81c98a80 T intel_psr_post_plane_update +ffffffff81c99970 t psr_force_hw_tracking_exit +ffffffff81c99ab0 T intel_psr_wait_for_idle_locked +ffffffff81c99dc0 T intel_psr_debug_set +ffffffff81c9a0d0 t psr_irq_control +ffffffff81c9a270 T intel_psr_invalidate +ffffffff81c9a630 T intel_psr_flush +ffffffff81c9ab70 T intel_psr_init +ffffffff81c9ad60 t intel_psr_work +ffffffff81c9afc0 t tgl_dc3co_disable_work +ffffffff81c9b020 T intel_psr_short_pulse +ffffffff81c9b570 T intel_psr_enabled +ffffffff81c9b600 T intel_psr_lock +ffffffff81c9b740 T intel_psr_unlock +ffffffff81c9b880 T intel_psr_debugfs_register +ffffffff81c9b8b0 T intel_psr_connector_debugfs_add +ffffffff81c9b8e0 t alpm_config_valid +ffffffff81c9ba20 t psr2_su_region_et_valid +ffffffff81c9bac0 t tgl_psr2_disable_dc3co +ffffffff81c9bc30 t __delayed_work_tick +ffffffff81c9c000 T intel_lookup_range_min_qp +ffffffff81c9c120 T intel_lookup_range_max_qp +ffffffff81c9d000 T intel_init_quirks +ffffffff81c9d110 T intel_init_dpcd_quirks +ffffffff81c9d220 T intel_has_quirk +ffffffff81c9d260 T intel_has_dpcd_quirk +ffffffff81c9d2a0 t quirk_ssc_force_disable +ffffffff81c9d2d0 t quirk_invert_brightness +ffffffff81c9d300 t quirk_backlight_present +ffffffff81c9d330 t quirk_increase_t12_delay +ffffffff81c9d360 t quirk_increase_ddi_disabled_time +ffffffff81c9d390 t intel_dmi_reverse_brightness +ffffffff81c9d3e0 t intel_dmi_no_pps_backlight +ffffffff81c9d430 t quirk_fw_sync_len +ffffffff81c9e000 T intel_sdvo_port_enabled +ffffffff81c9e0f0 T intel_sdvo_init +ffffffff81c9f2f0 t intel_sdvo_compute_config +ffffffff81c9f740 t pch_disable_sdvo +ffffffff81c9f770 t pch_post_disable_sdvo +ffffffff81c9f780 t intel_disable_sdvo +ffffffff81c9f960 t intel_sdvo_pre_enable +ffffffff81ca0480 t intel_enable_sdvo +ffffffff81ca0650 t intel_sdvo_enable_audio +ffffffff81ca0750 t intel_sdvo_disable_audio +ffffffff81ca07d0 t intel_sdvo_get_hw_state +ffffffff81ca0910 t intel_sdvo_get_config +ffffffff81ca0e30 t intel_sdvo_set_target_input +ffffffff81ca0eb0 t intel_sdvo_get_input_pixel_clock_range +ffffffff81ca0f60 t intel_sdvo_encoder_destroy +ffffffff81ca0fa0 t intel_sdvo_set_output_timings_from_mode +ffffffff81ca10e0 t intel_sdvo_get_preferred_input_mode +ffffffff81ca14d0 t intel_sdvo_get_dtd_from_mode +ffffffff81ca1650 t intel_sdvo_read_response +ffffffff81ca1be0 t __intel_sdvo_write_cmd +ffffffff81ca2110 t intel_sdvo_get_value +ffffffff81ca2190 t intel_sdvo_write_sdvox +ffffffff81ca26e0 t intel_sdvo_write_infoframe +ffffffff81ca28e0 t intel_sdvo_read_infoframe +ffffffff81ca2b60 t intel_sdvo_ddc_proxy_xfer +ffffffff81ca2c20 t intel_sdvo_ddc_proxy_func +ffffffff81ca2c50 t proxy_lock_bus +ffffffff81ca2c80 t proxy_trylock_bus +ffffffff81ca2cb0 t proxy_unlock_bus +ffffffff81ca2ce0 t intel_sdvo_hotplug +ffffffff81ca2d30 t intel_sdvo_connector_init +ffffffff81ca2f30 t intel_sdvo_connector_get_hw_state +ffffffff81ca2fd0 t intel_sdvo_detect +ffffffff81ca3240 t intel_sdvo_connector_duplicate_state +ffffffff81ca32d0 t intel_sdvo_connector_atomic_set_property +ffffffff81ca34a0 t intel_sdvo_connector_atomic_get_property +ffffffff81ca36c0 t intel_sdvo_tmds_sink_detect +ffffffff81ca3790 t intel_sdvo_get_analog_edid +ffffffff81ca37f0 t intel_sdvo_connector_matches_edid +ffffffff81ca3890 t intel_sdvo_get_modes +ffffffff81ca3c20 t intel_sdvo_mode_valid +ffffffff81ca3d40 t intel_sdvo_atomic_check +ffffffff81ca3e10 t intel_sdvo_create_enhance_property +ffffffff81ca6000 T intel_snps_phy_wait_for_calibration +ffffffff81ca6140 T intel_snps_phy_update_psr_power_state +ffffffff81ca6250 T intel_snps_phy_set_signal_levels +ffffffff81ca65f0 T intel_mpllb_calc_state +ffffffff81ca67a0 T intel_snps_phy_check_hdmi_link_rate +ffffffff81ca6840 T intel_mpllb_enable +ffffffff81ca6d40 T intel_mpllb_disable +ffffffff81ca6f90 T intel_mpllb_calc_port_clock +ffffffff81ca7060 T intel_mpllb_readout_hw_state +ffffffff81ca7400 T intel_mpllb_state_verify +ffffffff81ca8000 T vlv_plane_min_cdclk +ffffffff81ca80e0 T ivb_plane_min_cdclk +ffffffff81ca81a0 T hsw_plane_min_cdclk +ffffffff81ca8240 T chv_plane_check_rotation +ffffffff81ca82d0 T intel_sprite_plane_create +ffffffff81ca8690 t vlv_sprite_update_noarm +ffffffff81ca87a0 t vlv_sprite_update_arm +ffffffff81ca8ef0 t vlv_sprite_disable_arm +ffffffff81ca8f90 t vlv_sprite_get_hw_state +ffffffff81ca90c0 t vlv_sprite_check +ffffffff81ca91d0 t vlv_sprite_min_alignment +ffffffff81ca9250 t ivb_sprite_update_noarm +ffffffff81ca93e0 t ivb_sprite_update_arm +ffffffff81ca9820 t ivb_sprite_disable_arm +ffffffff81ca98f0 t ivb_sprite_get_hw_state +ffffffff81ca9a10 t g4x_sprite_check +ffffffff81ca9d40 t hsw_sprite_max_stride +ffffffff81ca9da0 t g4x_sprite_max_stride +ffffffff81ca9e10 t ivb_sprite_min_cdclk +ffffffff81ca9f60 t g4x_sprite_min_alignment +ffffffff81ca9f90 t g4x_sprite_update_noarm +ffffffff81caa110 t g4x_sprite_update_arm +ffffffff81caa5e0 t g4x_sprite_disable_arm +ffffffff81caa6a0 t g4x_sprite_get_hw_state +ffffffff81caa7c0 t g4x_sprite_min_cdclk +ffffffff81caa8a0 t vlv_sprite_ctl +ffffffff81caaaa0 t vlv_sprite_format_mod_supported +ffffffff81caabe0 t ivb_sprite_ctl +ffffffff81caae20 t g4x_sprite_ctl +ffffffff81caaff0 t snb_sprite_format_mod_supported +ffffffff81cab0e0 t g4x_sprite_format_mod_supported +ffffffff81cac000 T intel_sprite_set_colorkey_ioctl +ffffffff81cad000 T intel_tc_port_in_tbt_alt_mode +ffffffff81cad060 T intel_tc_port_in_dp_alt_mode +ffffffff81cad0c0 T intel_tc_port_in_legacy_mode +ffffffff81cad120 T intel_tc_port_handles_hpd_glitches +ffffffff81cad180 T intel_tc_cold_requires_aux_pw +ffffffff81cad200 T intel_tc_port_get_pin_assignment_mask +ffffffff81cad380 T intel_tc_port_max_lane_count +ffffffff81cad7e0 T intel_tc_port_set_fia_lane_count +ffffffff81cada60 T intel_tc_port_init_mode +ffffffff81cadd10 t intel_tc_port_update_mode +ffffffff81cae140 T intel_tc_port_sanitize_mode +ffffffff81cae4d0 T intel_tc_port_connected +ffffffff81cae650 T intel_tc_port_ref_held +ffffffff81cae6b0 T intel_tc_port_link_needs_reset +ffffffff81cae760 T intel_tc_port_link_reset +ffffffff81cae880 T intel_tc_port_link_cancel_reset_work +ffffffff81cae910 T intel_tc_port_lock +ffffffff81cae930 t __intel_tc_port_lock +ffffffff81caeab0 T intel_tc_port_suspend +ffffffff81caeb20 T intel_tc_port_unlock +ffffffff81caeba0 T intel_tc_port_get_link +ffffffff81caec40 T intel_tc_port_put_link +ffffffff81caed00 T intel_tc_port_init +ffffffff81caefc0 t kasprintf +ffffffff81caf0a0 t intel_tc_port_disconnect_phy_work +ffffffff81caf100 t intel_tc_port_link_reset_work +ffffffff81caf4c0 T intel_tc_port_cleanup +ffffffff81caf5a0 t intel_tc_port_needs_reset +ffffffff81caf6c0 t tgl_tc_phy_cold_off_domain +ffffffff81caf6f0 t xelpdp_tc_phy_hpd_live_status +ffffffff81caf8b0 t adlp_tc_phy_is_ready +ffffffff81cafa00 t xelpdp_tc_phy_is_owned +ffffffff81cafb60 t xelpdp_tc_phy_get_hw_state +ffffffff81cafc80 t xelpdp_tc_phy_connect +ffffffff81cafe40 t xelpdp_tc_phy_disconnect +ffffffff81caff50 t adlp_tc_phy_init +ffffffff81caffc0 t tc_phy_get_current_mode +ffffffff81cb0320 t xelpdp_tc_phy_tcss_power_is_enabled +ffffffff81cb0470 t tc_phy_wait_for_ready +ffffffff81cb0610 t xelpdp_tc_phy_take_ownership +ffffffff81cb07a0 t tc_phy_verify_legacy_or_dp_alt_mode +ffffffff81cb09b0 t xelpdp_tc_phy_wait_for_tcss_power +ffffffff81cb0b60 t __xelpdp_tc_phy_enable_tcss_power +ffffffff81cb0cf0 t adlp_tc_phy_cold_off_domain +ffffffff81cb0d50 t adlp_tc_phy_hpd_live_status +ffffffff81cb0ef0 t adlp_tc_phy_is_owned +ffffffff81cb1010 t adlp_tc_phy_get_hw_state +ffffffff81cb10d0 t adlp_tc_phy_connect +ffffffff81cb1300 t adlp_tc_phy_disconnect +ffffffff81cb13e0 t adlp_tc_phy_take_ownership +ffffffff81cb1500 t icl_tc_phy_hpd_live_status +ffffffff81cb1720 t icl_tc_phy_is_ready +ffffffff81cb1880 t icl_tc_phy_is_owned +ffffffff81cb19e0 t icl_tc_phy_get_hw_state +ffffffff81cb1aa0 t icl_tc_phy_connect +ffffffff81cb1c60 t icl_tc_phy_disconnect +ffffffff81cb1cf0 t tgl_tc_phy_init +ffffffff81cb1e90 t icl_tc_phy_take_ownership +ffffffff81cb20a0 t icl_tc_phy_cold_off_domain +ffffffff81cb2100 t icl_tc_phy_init +ffffffff81cb2160 t __delayed_work_tick +ffffffff81cb3000 T intel_tv_init +ffffffff81cb3620 t intel_tv_compute_config +ffffffff81cb3b30 t intel_tv_get_config +ffffffff81cb41c0 t intel_tv_pre_enable +ffffffff81cb5270 t intel_enable_tv +ffffffff81cb5330 t intel_disable_tv +ffffffff81cb53e0 t intel_tv_get_hw_state +ffffffff81cb54a0 t intel_tv_connector_duplicate_state +ffffffff81cb5530 t intel_tv_mode_to_mode +ffffffff81cb5680 t intel_tv_get_modes +ffffffff81cb5a20 t intel_tv_detect +ffffffff81cb6170 t intel_tv_mode_valid +ffffffff81cb6220 t intel_tv_atomic_check +ffffffff81cb7000 T i915_get_vblank_counter +ffffffff81cb7280 T intel_mode_vblank_start +ffffffff81cb72c0 T g4x_get_vblank_counter +ffffffff81cb73b0 T intel_crtc_scanline_offset +ffffffff81cb7410 T intel_crtc_get_vblank_timestamp +ffffffff81cb7430 t i915_get_crtc_scanoutpos +ffffffff81cb78f0 T intel_get_crtc_scanline +ffffffff81cb79c0 t __intel_get_crtc_scanline +ffffffff81cb7c50 T intel_wait_for_pipe_scanline_stopped +ffffffff81cb7c60 t wait_for_pipe_scanline_moving +ffffffff81cb7f80 T intel_wait_for_pipe_scanline_moving +ffffffff81cb7fa0 T intel_crtc_update_active_timings +ffffffff81cb8190 T intel_mode_vdisplay +ffffffff81cb81d0 T intel_mode_vblank_end +ffffffff81cb8210 T intel_mode_vtotal +ffffffff81cb8250 T intel_vblank_evade_init +ffffffff81cb8410 T intel_vblank_evade +ffffffff81cb9000 T intel_dsc_source_support +ffffffff81cb9050 T intel_dsc_compute_params +ffffffff81cb96a0 T intel_dsc_power_domain +ffffffff81cb9750 T intel_dsc_get_num_vdsc_instances +ffffffff81cb97a0 T intel_dsc_dsi_pps_write +ffffffff81cb9ae0 T intel_dsc_dp_pps_write +ffffffff81cb9be0 T intel_uncompressed_joiner_enable +ffffffff81cb9d40 T intel_dsc_enable +ffffffff81cbb650 T intel_dsc_disable +ffffffff81cbb840 T intel_dsc_get_config +ffffffff81cbbe20 T intel_vdsc_state_dump +ffffffff81cbbf00 t intel_dsc_pps_write +ffffffff81cbc0f0 t intel_dsc_pps_read_and_verify +ffffffff81cbd000 T intel_vga_disable +ffffffff81cbd1e0 T intel_vga_redisable_power_on +ffffffff81cbd2f0 T intel_vga_redisable +ffffffff81cbd430 T intel_vga_reset_io_mem +ffffffff81cbd490 T intel_vga_register +ffffffff81cbd4c0 T intel_vga_unregister +ffffffff81cbe000 T intel_vrr_is_capable +ffffffff81cbe0a0 T intel_vrr_is_in_range +ffffffff81cbe150 T intel_vrr_check_modeset +ffffffff81cbe1e0 T intel_vrr_vmin_vblank_start +ffffffff81cbe240 T intel_vrr_vmax_vblank_start +ffffffff81cbe2a0 T intel_vrr_compute_config +ffffffff81cbe5b0 t is_cmrr_frac_required +ffffffff81cbe640 t cmrr_get_vtotal +ffffffff81cbe6d0 T intel_vrr_set_transcoder_timings +ffffffff81cbec70 T intel_vrr_send_push +ffffffff81cbed50 T intel_vrr_is_push_sent +ffffffff81cbee30 T intel_vrr_enable +ffffffff81cbf090 T intel_vrr_disable +ffffffff81cbf300 T intel_vrr_get_config +ffffffff81cbf700 t __intel_de_read64_2x32 +ffffffff81cc0000 T intel_update_watermarks +ffffffff81cc0040 T intel_compute_pipe_wm +ffffffff81cc0090 T intel_compute_intermediate_wm +ffffffff81cc0120 T intel_initial_watermarks +ffffffff81cc0180 T intel_atomic_update_watermarks +ffffffff81cc01c0 T intel_optimize_watermarks +ffffffff81cc0200 T intel_compute_global_watermarks +ffffffff81cc0250 T intel_wm_get_hw_state +ffffffff81cc0290 T intel_wm_plane_visible +ffffffff81cc02f0 T intel_print_wm_latency +ffffffff81cc0410 T intel_wm_init +ffffffff81cc0430 T intel_wm_debugfs_register +ffffffff81cc1000 T skl_update_scaler_crtc +ffffffff81cc10c0 t skl_update_scaler +ffffffff81cc1430 T skl_update_scaler_plane +ffffffff81cc1860 T intel_atomic_setup_scalers +ffffffff81cc1e40 T skl_pfit_enable +ffffffff81cc2370 T skl_program_plane_scaler +ffffffff81cc2ad0 T skl_detach_scalers +ffffffff81cc2c60 T skl_scaler_disable +ffffffff81cc2dc0 T skl_scaler_get_config +ffffffff81cc4000 T skl_format_to_fourcc +ffffffff81cc4180 T icl_is_nv12_y_plane +ffffffff81cc41f0 T icl_hdr_plane_mask +ffffffff81cc4220 T icl_is_hdr_plane +ffffffff81cc4260 T skl_calc_main_surface_offset +ffffffff81cc44f0 T skl_universal_plane_create +ffffffff81cc4cd0 t icl_plane_min_width +ffffffff81cc4e60 t icl_hdr_plane_max_width +ffffffff81cc4ec0 t icl_sdr_plane_max_width +ffffffff81cc4ef0 t icl_plane_max_height +ffffffff81cc4f20 t icl_plane_min_cdclk +ffffffff81cc4f70 t glk_plane_max_width +ffffffff81cc5030 t skl_plane_max_height +ffffffff81cc5060 t glk_plane_min_cdclk +ffffffff81cc50d0 t skl_plane_max_width +ffffffff81cc51b0 t skl_plane_min_cdclk +ffffffff81cc5220 t adl_plane_max_stride +ffffffff81cc52a0 t skl_plane_max_stride +ffffffff81cc5320 t tgl_plane_min_alignment +ffffffff81cc5450 t skl_plane_min_alignment +ffffffff81cc54f0 t icl_plane_update_noarm +ffffffff81cc66b0 t icl_plane_update_arm +ffffffff81cc69e0 t icl_plane_disable_arm +ffffffff81cc6c40 t skl_plane_update_noarm +ffffffff81cc6e80 t skl_plane_update_arm +ffffffff81cc7370 t skl_plane_disable_arm +ffffffff81cc7480 t skl_plane_get_hw_state +ffffffff81cc75b0 t skl_plane_check +ffffffff81cc83b0 t skl_plane_async_flip +ffffffff81cc8530 t skl_plane_enable_flip_done +ffffffff81cc85b0 t skl_plane_disable_flip_done +ffffffff81cc8630 T skl_get_initial_plane_config +ffffffff81cc8fd0 T skl_fixup_initial_plane_config +ffffffff81cc90d0 t skl_plane_aux_dist +ffffffff81cc9200 t skl_write_plane_wm +ffffffff81cc9680 t skl_surf_address +ffffffff81cc97c0 t skl_plane_check_nv12_rotation +ffffffff81cc9870 t check_protection +ffffffff81cc9920 t skl_plane_ctl +ffffffff81cca030 t glk_plane_color_ctl +ffffffff81cca180 t skl_check_main_ccs_coordinates +ffffffff81cca340 t gen12_plane_format_mod_supported +ffffffff81cca5c0 t skl_plane_format_mod_supported +ffffffff81ccb000 T intel_enabled_dbuf_slices_mask +ffffffff81ccb220 T intel_has_sagv +ffffffff81ccb270 T intel_sagv_pre_plane_update +ffffffff81ccb420 T intel_sagv_post_plane_update +ffffffff81ccb6d0 T intel_can_enable_sagv +ffffffff81ccb740 T skl_ddb_dbuf_slice_mask +ffffffff81ccb7f0 T skl_plane_wm_level +ffffffff81ccb850 T skl_plane_trans_wm +ffffffff81ccb8a0 T skl_ddb_allocation_overlaps +ffffffff81ccb940 T intel_wm_state_verify +ffffffff81ccc3f0 t skl_pipe_wm_get_hw_state +ffffffff81ccc870 T skl_watermark_ipc_enabled +ffffffff81ccc8a0 T skl_watermark_ipc_update +ffffffff81ccc9a0 T skl_watermark_ipc_init +ffffffff81cccad0 T skl_wm_init +ffffffff81ccd4c0 T intel_atomic_get_dbuf_state +ffffffff81ccd4e0 T intel_dbuf_init +ffffffff81ccd560 T intel_dbuf_state_set_mdclk_cdclk_ratio +ffffffff81ccd5d0 T intel_dbuf_mdclk_cdclk_ratio_update +ffffffff81ccd9e0 T intel_dbuf_mbus_pre_ddb_update +ffffffff81ccdb60 t intel_mbus_joined_pipe +ffffffff81ccdc80 t intel_dbuf_mbus_join_update +ffffffff81ccde00 t intel_mbus_dbox_update +ffffffff81cce0c0 T intel_dbuf_mbus_post_ddb_update +ffffffff81cce350 T intel_dbuf_pre_plane_update +ffffffff81cce440 T intel_dbuf_post_plane_update +ffffffff81cce520 T skl_watermark_debugfs_register +ffffffff81cce550 T skl_watermark_max_latency +ffffffff81cce5b0 t skl_sagv_disable +ffffffff81cce6f0 t skl_ddb_get_hw_plane_state +ffffffff81cce8b0 t skl_compute_wm +ffffffff81cd1bb0 t skl_wm_get_hw_state_and_sanitize +ffffffff81cd23a0 t skl_build_plane_wm_single +ffffffff81cd2750 t skl_compute_wm_params +ffffffff81cd2b60 t skl_compute_plane_wm +ffffffff81cd2fb0 t skl_compute_dbuf_slices +ffffffff81cd34b0 t skl_ddb_entry_for_slices +ffffffff81cd3600 t intel_crtc_can_enable_sagv +ffffffff81cd3910 t intel_dbuf_duplicate_state +ffffffff81cd3990 t intel_dbuf_destroy_state +ffffffff81cd4000 T pixel_format_from_register_bits +ffffffff81cd4070 T vlv_dsi_wait_for_fifo_empty +ffffffff81cd4190 T vlv_dsi_init +ffffffff81cd4b50 t intel_dsi_compute_config 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i915_gem_object_pin_to_display_plane +ffffffff81ce8010 T i915_gem_object_set_to_cpu_domain +ffffffff81ce8110 T i915_gem_set_domain_ioctl +ffffffff81ce8370 T i915_gem_object_prepare_read +ffffffff81ce84f0 T i915_gem_object_prepare_write +ffffffff81ce9000 T i915_gem_execbuffer2_ioctl +ffffffff81ce9d10 t eb_select_context +ffffffff81ce9d80 t eb_select_engine +ffffffff81cea270 t eb_lookup_vmas +ffffffff81ceaa40 t eb_release_vmas +ffffffff81ceadd0 t eb_relocate_parse +ffffffff81ceaf40 t eb_capture_stage +ffffffff81ceb090 t eb_requests_create +ffffffff81ceb510 t eb_submit +ffffffff81ceb9c0 t eb_requests_get +ffffffff81ceba40 t eb_requests_add +ffffffff81cebc10 t signal_fence_array +ffffffff81cebcd0 t eb_requests_put +ffffffff81cebd50 t eb_put_engine +ffffffff81cebed0 t parse_timeline_fences +ffffffff81cec360 t eb_pin_engine +ffffffff81cec6b0 t eb_validate_vmas +ffffffff81ced050 t eb_relocate_vma +ffffffff81ced2c0 t eb_parse +ffffffff81ced6c0 t eb_relocate_parse_slow +ffffffff81cede80 t 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intel_synchronize_hardirq +ffffffff81dbbf70 t kasprintf +ffffffff81dbc050 t ibx_irq_reset +ffffffff81dbc1d0 t cherryview_irq_handler +ffffffff81dbc440 t valleyview_irq_handler +ffffffff81dbc720 t i965_irq_handler +ffffffff81dbca90 t i915_irq_handler +ffffffff81dbcdb0 t i8xx_irq_handler +ffffffff81dbd090 t dg1_irq_handler +ffffffff81dbd200 t gen11_irq_handler +ffffffff81dbd2f0 t gen8_irq_handler +ffffffff81dbd3e0 t ilk_irq_handler +ffffffff81dbe000 T i915_memcpy_from_wc +ffffffff81dbe130 T i915_unaligned_memcpy_from_wc +ffffffff81dbe260 T i915_memcpy_init_early +ffffffff81dbf000 T i915_mitigate_clear_residuals +ffffffff81dc0000 T i915_init +ffffffff81dc02f0 t i915_check_nomodeset +ffffffff81dc03a0 t i915_mock_selftests +ffffffff81dc03d0 t i915_pmu_init +ffffffff81dc0400 t i915_pmu_exit +ffffffff81dc1000 T i915_params_dump +ffffffff81dc1370 T i915_params_copy +ffffffff81dc1550 T i915_params_free +ffffffff81dc2000 T i915_pci_register_driver +ffffffff81dc2030 T i915_pci_unregister_driver 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lrc_configure_all_contexts +ffffffff81dc7a60 t gen8_modify_self +ffffffff81dc7c60 t gen8_modify_context +ffffffff81dc7e40 t gen12_configure_oar_context +ffffffff81dc8000 T i915_query_ioctl +ffffffff81dc8120 t query_topology_info +ffffffff81dc8180 t query_engine_info +ffffffff81dc8440 t query_perf_config +ffffffff81dc87c0 t query_memregion_info +ffffffff81dc8a90 t query_hwconfig_blob +ffffffff81dc8b20 t query_geometry_subslices +ffffffff81dc8bc0 t query_guc_submission_version +ffffffff81dc8ce0 t fill_topology_info +ffffffff81dc8ea0 t query_perf_config_data +ffffffff81dc9280 t copy_perf_config_registers_or_number +ffffffff81dca000 T i915_request_slab_cache +ffffffff81dca030 t i915_fence_get_driver_name +ffffffff81dca060 t i915_fence_get_timeline_name +ffffffff81dca0c0 t i915_fence_enable_signaling +ffffffff81dca0d0 t i915_fence_signaled +ffffffff81dca120 t i915_fence_wait +ffffffff81dca140 t i915_fence_release +ffffffff81dca240 T i915_request_notify_execute_cb_imm +ffffffff81dca2c0 T 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i915_sw_fence_await_dma_fence +ffffffff81dd0890 t dma_i915_sw_fence_wake +ffffffff81dd0910 t irq_i915_sw_fence_work +ffffffff81dd0960 t timer_i915_sw_fence_wake +ffffffff81dd0a60 t dma_i915_sw_fence_wake_timer +ffffffff81dd0af0 T __i915_sw_fence_await_dma_fence +ffffffff81dd0c50 t __dma_i915_sw_fence_wake +ffffffff81dd0cb0 T i915_sw_fence_await_reservation +ffffffff81dd0dc0 t i915_sw_fence_wake +ffffffff81dd1000 T dma_fence_work_init +ffffffff81dd10a0 t fence_notify +ffffffff81dd11c0 t fence_work +ffffffff81dd1230 T dma_fence_work_chain +ffffffff81dd1280 t get_driver_name +ffffffff81dd12b0 t get_timeline_name +ffffffff81dd12f0 t fence_release +ffffffff81dd2000 T i915_switcheroo_register +ffffffff81dd2030 T i915_switcheroo_unregister +ffffffff81dd3000 T i915_syncmap_init +ffffffff81dd3030 T i915_syncmap_is_later +ffffffff81dd3150 T i915_syncmap_set +ffffffff81dd3200 t __sync_set +ffffffff81dd3560 T i915_syncmap_free +ffffffff81dd35d0 t __sync_free +ffffffff81dd4000 T i915_setup_sysfs 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cik_fence_compute_ring_emit +ffffffff81e24260 T cik_semaphore_ring_emit +ffffffff81e24450 T cik_copy_cpdma +ffffffff81e24940 T cik_ring_ib_execute +ffffffff81e24f50 T cik_ib_test +ffffffff81e252e0 T cik_gfx_get_rptr +ffffffff81e25340 T cik_gfx_get_wptr +ffffffff81e25380 T cik_gfx_set_wptr +ffffffff81e253c0 T cik_compute_get_rptr +ffffffff81e254b0 T cik_compute_get_wptr +ffffffff81e255a0 T cik_compute_set_wptr +ffffffff81e25620 T cik_gpu_check_soft_reset +ffffffff81e257a0 T cik_asic_reset +ffffffff81e25cf0 t cik_gpu_pci_config_reset +ffffffff81e26560 T cik_gfx_is_lockup +ffffffff81e265e0 T cik_pcie_gart_tlb_flush +ffffffff81e26630 T cik_ib_parse +ffffffff81e26660 T cik_vm_init +ffffffff81e266c0 T cik_vm_fini +ffffffff81e266f0 T cik_vm_flush +ffffffff81e274f0 T cik_enter_rlc_safe_mode +ffffffff81e27600 T cik_exit_rlc_safe_mode +ffffffff81e27640 T cik_update_cg +ffffffff81e27b80 t cik_enable_mgcg +ffffffff81e280b0 t cik_enable_cgcg +ffffffff81e28440 T cik_init_cp_pg_table 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cik_sdma_resume +ffffffff81e381f0 T cik_sdma_fini +ffffffff81e38240 T cik_copy_dma +ffffffff81e386e0 T cik_sdma_ring_test +ffffffff81e389e0 T cik_sdma_ib_test +ffffffff81e38c80 T cik_sdma_is_lockup +ffffffff81e38d10 T cik_sdma_vm_copy_pages +ffffffff81e38e20 T cik_sdma_vm_write_pages +ffffffff81e38fa0 T cik_sdma_vm_set_pages +ffffffff81e39120 T cik_sdma_vm_pad_ib +ffffffff81e39170 T cik_dma_vm_flush +ffffffff81e3a000 T cypress_enable_spread_spectrum +ffffffff81e3a140 T cypress_start_dpm +ffffffff81e3a190 T cypress_enable_sclk_control +ffffffff81e3a1f0 T cypress_enable_mclk_control +ffffffff81e3a250 T cypress_notify_smc_display_change +ffffffff81e3a2a0 T cypress_program_response_times +ffffffff81e3a390 T cypress_advertise_gen2_capability +ffffffff81e3a4a0 T cypress_notify_link_speed_change_after_state_change +ffffffff81e3a590 T cypress_notify_link_speed_change_before_state_change +ffffffff81e3a670 T cypress_get_strobe_mode_settings +ffffffff81e3a780 T cypress_get_mclk_frequency_ratio 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dce6_afmt_dp_write_speaker_allocation +ffffffff81e40690 T dce6_afmt_write_sad_regs +ffffffff81e407e0 T dce6_audio_enable +ffffffff81e40830 T dce6_hdmi_audio_set_dto +ffffffff81e408a0 T dce6_dp_audio_set_dto +ffffffff81e41000 T eg_cg_rreg +ffffffff81e41090 T eg_cg_wreg +ffffffff81e41100 T eg_pif_phy0_rreg +ffffffff81e41190 T eg_pif_phy0_wreg +ffffffff81e41200 T eg_pif_phy1_rreg +ffffffff81e41290 T eg_pif_phy1_wreg +ffffffff81e41300 T evergreen_get_allowed_info_register +ffffffff81e41390 T evergreen_tiling_fields +ffffffff81e41430 T sumo_set_uvd_clocks +ffffffff81e41520 t sumo_set_uvd_clock +ffffffff81e41780 T evergreen_set_uvd_clocks +ffffffff81e41e40 T evergreen_fix_pci_max_read_req_size +ffffffff81e42040 T dce4_program_fmt +ffffffff81e42170 T dce4_wait_for_vblank +ffffffff81e42430 T evergreen_page_flip +ffffffff81e425e0 T evergreen_page_flip_pending +ffffffff81e42660 T evergreen_get_temp +ffffffff81e42730 T sumo_get_temp +ffffffff81e42780 T sumo_pm_init_profile +ffffffff81e428d0 T btc_pm_init_profile +ffffffff81e429f0 T evergreen_pm_misc +ffffffff81e42b90 T evergreen_pm_prepare +ffffffff81e42cb0 T evergreen_pm_finish +ffffffff81e42dd0 T evergreen_hpd_sense +ffffffff81e42e50 T evergreen_hpd_set_polarity +ffffffff81e42fa0 T evergreen_hpd_init +ffffffff81e43080 T evergreen_hpd_fini +ffffffff81e43130 T evergreen_get_number_of_dram_channels +ffffffff81e43180 T evergreen_bandwidth_update +ffffffff81e43360 t evergreen_line_buffer_adjust +ffffffff81e43580 t evergreen_program_watermarks +ffffffff81e44080 T evergreen_mc_wait_for_idle +ffffffff81e44120 T evergreen_pcie_gart_tlb_flush +ffffffff81e44200 T evergreen_mc_stop +ffffffff81e44e60 T evergreen_mc_resume +ffffffff81e45630 T evergreen_mc_program +ffffffff81e45a40 T evergreen_ring_ib_execute +ffffffff81e45f40 T evergreen_mc_init +ffffffff81e460a0 T evergreen_print_gpu_status_regs +ffffffff81e460f0 T evergreen_is_display_hung +ffffffff81e46320 T evergreen_gpu_check_soft_reset +ffffffff81e46490 T evergreen_gpu_pci_config_reset +ffffffff81e46660 T evergreen_asic_reset +ffffffff81e46a50 T evergreen_gfx_is_lockup +ffffffff81e46ad0 T sumo_rlc_fini +ffffffff81e46d10 t radeon_bo_reserve +ffffffff81e46eb0 t radeon_bo_unreserve +ffffffff81e46fc0 T sumo_rlc_init +ffffffff81e478b0 T evergreen_rlc_resume +ffffffff81e47c20 T evergreen_get_vblank_counter +ffffffff81e47c90 T evergreen_disable_interrupt_state +ffffffff81e47f90 T evergreen_irq_set +ffffffff81e48620 T evergreen_irq_suspend +ffffffff81e48690 T evergreen_irq_process +ffffffff81e492f0 t evergreen_irq_ack +ffffffff81e49a50 T evergreen_resume +ffffffff81e49b60 t evergreen_init_golden_registers +ffffffff81e49dd0 t evergreen_startup +ffffffff81e4b820 T evergreen_suspend +ffffffff81e4ba30 T evergreen_init +ffffffff81e4bf70 t evergreen_pcie_gart_fini +ffffffff81e4c0a0 T evergreen_fini +ffffffff81e4c340 T evergreen_pcie_gen2_enable +ffffffff81e4c5e0 T evergreen_program_aspm +ffffffff81e4cdd0 t evergreen_latency_watermark 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cayman_dma_fini +ffffffff81e678c0 T cayman_dma_is_lockup +ffffffff81e67950 T cayman_dma_vm_copy_pages +ffffffff81e67a50 T cayman_dma_vm_write_pages +ffffffff81e67bc0 T cayman_dma_vm_set_pages +ffffffff81e67d30 T cayman_dma_vm_pad_ib +ffffffff81e67d80 T cayman_dma_vm_flush +ffffffff81e69000 T ni_get_pi +ffffffff81e69030 T ni_get_ps +ffffffff81e69060 T ni_dpm_vblank_too_short +ffffffff81e690e0 T ni_dpm_force_performance_level +ffffffff81e69250 T ni_copy_and_switch_arb_sets +ffffffff81e69520 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81e695a0 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81e69620 T ni_dpm_setup_asic +ffffffff81e69880 T ni_update_current_ps +ffffffff81e69950 T ni_update_requested_ps +ffffffff81e69a20 T ni_dpm_enable +ffffffff81e6aa20 t ni_init_smc_table +ffffffff81e6b450 t ni_init_smc_spll_table +ffffffff81e6b5e0 t ni_init_arb_table_index +ffffffff81e6b690 t ni_populate_mc_reg_table +ffffffff81e6bbd0 t ni_initialize_smc_cac_tables +ffffffff81e6cea0 t ni_initialize_hardware_cac_manager +ffffffff81e6d4d0 t ni_populate_smc_tdp_limits +ffffffff81e6d6b0 t ni_program_response_times +ffffffff81e6d800 T ni_dpm_disable +ffffffff81e6dc60 t ni_enable_power_containment +ffffffff81e6dd40 t ni_enable_smc_cac +ffffffff81e6dea0 T ni_dpm_pre_set_power_state +ffffffff81e6e510 T ni_dpm_set_power_state +ffffffff81e6e890 t ni_upload_sw_state +ffffffff81e6f550 t ni_upload_mc_reg_table +ffffffff81e6f7d0 t ni_power_control_set_level +ffffffff81e6f8d0 T ni_dpm_post_set_power_state +ffffffff81e6f9c0 T ni_dpm_init +ffffffff81e70420 T ni_dpm_fini +ffffffff81e704f0 T ni_dpm_print_power_state +ffffffff81e705f0 T ni_dpm_debugfs_print_current_performance_level +ffffffff81e70630 T ni_dpm_get_current_sclk +ffffffff81e706a0 T ni_dpm_get_current_mclk +ffffffff81e70710 T ni_dpm_get_sclk +ffffffff81e70780 T ni_dpm_get_mclk +ffffffff81e707e0 t ni_do_program_memory_timing_parameters +ffffffff81e70940 t ni_calculate_sclk_params +ffffffff81e70b90 t ni_calculate_power_boost_limit +ffffffff81e70d30 t ni_populate_mclk_value +ffffffff81e72000 T r100_wait_for_vblank +ffffffff81e72190 T r100_page_flip +ffffffff81e724a0 T r100_page_flip_pending +ffffffff81e72570 T r100_pm_get_dynpm_state +ffffffff81e727e0 T r100_pm_init_profile +ffffffff81e728c0 T r100_pm_misc +ffffffff81e72d60 T r100_pm_prepare +ffffffff81e72e00 T r100_pm_finish +ffffffff81e72ea0 T r100_gui_idle +ffffffff81e72ee0 T r100_hpd_sense +ffffffff81e72f40 T r100_hpd_set_polarity +ffffffff81e73000 T r100_hpd_init +ffffffff81e730a0 T r100_hpd_fini +ffffffff81e73110 T r100_pci_gart_tlb_flush +ffffffff81e73140 T r100_pci_gart_init +ffffffff81e73220 T r100_pci_gart_get_page_entry +ffffffff81e73250 T r100_pci_gart_set_page +ffffffff81e73290 T r100_pci_gart_enable +ffffffff81e73380 T r100_pci_gart_disable +ffffffff81e73400 T r100_pci_gart_fini +ffffffff81e73480 T r100_irq_set +ffffffff81e73560 T r100_irq_disable +ffffffff81e735e0 T r100_irq_process +ffffffff81e73930 T r100_get_vblank_counter +ffffffff81e73980 T r100_fence_ring_emit +ffffffff81e73e50 T r100_semaphore_ring_emit +ffffffff81e73e80 T r100_copy_blit +ffffffff81e745b0 T r100_ring_start +ffffffff81e746b0 T r100_gfx_get_rptr +ffffffff81e74710 T r100_gfx_get_wptr +ffffffff81e74750 T r100_gfx_set_wptr +ffffffff81e74790 T r100_cp_init +ffffffff81e74db0 T r100_debugfs_cp_init +ffffffff81e74de0 T r100_cp_fini +ffffffff81e74eb0 T r100_cp_disable +ffffffff81e75010 T r100_gui_wait_for_idle +ffffffff81e75100 T r100_reloc_pitch_offset +ffffffff81e75270 T r100_packet3_load_vbpntr +ffffffff81e75560 T r100_cs_parse_packet0 +ffffffff81e75670 T r100_cs_packet_parse_vline +ffffffff81e758a0 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81e75920 T r100_cs_parse +ffffffff81e76c10 T r100_cs_track_clear +ffffffff81e76fa0 T r100_cs_track_check +ffffffff81e77860 T r100_mc_wait_for_idle +ffffffff81e77900 T r100_gpu_is_lockup +ffffffff81e77970 T r100_enable_bm +ffffffff81e779c0 T r100_bm_disable +ffffffff81e77a80 T r100_asic_reset +ffffffff81e77e10 T r100_mc_stop +ffffffff81e77fd0 T r100_mc_resume +ffffffff81e78090 T r100_set_common_regs +ffffffff81e78240 T r100_vram_init_sizes +ffffffff81e78450 T r100_vga_set_state +ffffffff81e784b0 T r100_pll_errata_after_index +ffffffff81e784f0 T r100_pll_rreg +ffffffff81e78660 T r100_pll_wreg +ffffffff81e787b0 T r100_debugfs_rbbm_init +ffffffff81e787e0 T r100_debugfs_mc_info_init +ffffffff81e78810 T r100_set_surface_reg +ffffffff81e78a60 T r100_clear_surface_reg +ffffffff81e78b20 T r100_bandwidth_update +ffffffff81e79590 T r100_ring_test +ffffffff81e798c0 T r100_ring_ib_execute +ffffffff81e79b40 T r100_ib_test +ffffffff81e79f00 T r100_vga_render_disable +ffffffff81e79f60 T r100_resume +ffffffff81e7a1a0 t r100_startup +ffffffff81e7a740 T r100_suspend +ffffffff81e7a840 T r100_fini +ffffffff81e7a9b0 T r100_restore_sanity +ffffffff81e7aa50 T r100_init +ffffffff81e7af90 t r100_set_safe_registers +ffffffff81e7b010 T r100_mm_rreg_slow +ffffffff81e7b0a0 T r100_mm_wreg_slow +ffffffff81e7b110 T r100_io_rreg +ffffffff81e7b1c0 T r100_io_wreg +ffffffff81e7b240 t r100_get_vtx_size +ffffffff81e7b330 t r100_cs_track_texture_print +ffffffff81e7c000 T r200_copy_dma +ffffffff81e7c4e0 T r200_packet0_check +ffffffff81e7d340 t r200_get_vtx_size_0 +ffffffff81e7d500 t r200_get_vtx_size_1 +ffffffff81e7d590 T r200_set_safe_registers +ffffffff81e7e000 T rv370_pcie_rreg +ffffffff81e7e090 T rv370_pcie_wreg +ffffffff81e7e100 T rv370_pcie_gart_tlb_flush +ffffffff81e7e390 T rv370_pcie_gart_get_page_entry +ffffffff81e7e3f0 T rv370_pcie_gart_set_page +ffffffff81e7e430 T rv370_pcie_gart_init +ffffffff81e7e510 T rv370_pcie_gart_enable +ffffffff81e7e950 T rv370_pcie_gart_disable +ffffffff81e7eb40 T rv370_pcie_gart_fini +ffffffff81e7eb80 T r300_fence_ring_emit +ffffffff81e7f190 T r300_ring_start +ffffffff81e7fc30 T r300_mc_wait_for_idle +ffffffff81e7fcd0 T r300_gpu_init +ffffffff81e7fe50 T r300_asic_reset +ffffffff81e800b0 T r300_mc_init +ffffffff81e80180 T rv370_set_pcie_lanes +ffffffff81e803a0 T rv370_get_pcie_lanes +ffffffff81e80460 T r300_cs_parse +ffffffff81e80830 t r300_packet0_check +ffffffff81e81790 T r300_set_reg_safe +ffffffff81e817d0 T r300_mc_program +ffffffff81e81970 T r300_clock_startup +ffffffff81e81a00 T r300_resume +ffffffff81e81c20 t r300_startup +ffffffff81e81ec0 T r300_suspend +ffffffff81e81f70 T r300_fini +ffffffff81e820d0 T r300_init +ffffffff81e83000 T r420_pm_init_profile +ffffffff81e830f0 T r420_pipes_init +ffffffff81e832f0 T r420_mc_rreg +ffffffff81e83380 T r420_mc_wreg +ffffffff81e83400 T r420_resume +ffffffff81e83620 t r420_startup +ffffffff81e838b0 T r420_suspend +ffffffff81e83aa0 T r420_fini +ffffffff81e83bf0 T r420_init +ffffffff81e83f50 T r420_debugfs_pipes_info_init +ffffffff81e83f80 t r420_cp_errata_init +ffffffff81e85000 T r520_mc_wait_for_idle +ffffffff81e850b0 T r520_resume +ffffffff81e851e0 t r520_startup +ffffffff81e856a0 T r520_init +ffffffff81e86000 T r600_rcu_rreg +ffffffff81e860a0 T r600_rcu_wreg +ffffffff81e86120 T r600_uvd_ctx_rreg +ffffffff81e861c0 T r600_uvd_ctx_wreg +ffffffff81e86240 T r600_get_allowed_info_register +ffffffff81e862c0 T r600_get_xclk +ffffffff81e862f0 T r600_set_uvd_clocks +ffffffff81e86980 T dce3_program_fmt +ffffffff81e86ab0 T rv6xx_get_temp +ffffffff81e86b00 T r600_pm_get_dynpm_state +ffffffff81e86f40 T rs780_pm_init_profile +ffffffff81e87050 T r600_pm_init_profile +ffffffff81e87310 T r600_pm_misc +ffffffff81e87400 T r600_gui_idle +ffffffff81e87440 T r600_hpd_sense +ffffffff81e87560 T r600_hpd_set_polarity +ffffffff81e877e0 T r600_hpd_init +ffffffff81e879c0 T r600_hpd_fini +ffffffff81e87b70 T r600_pcie_gart_tlb_flush +ffffffff81e87cb0 T r600_pcie_gart_init +ffffffff81e87d60 T r600_mc_wait_for_idle +ffffffff81e87e00 T rs780_mc_rreg +ffffffff81e87eb0 T rs780_mc_wreg +ffffffff81e87f40 T r600_vram_scratch_init +ffffffff81e88060 t radeon_bo_reserve +ffffffff81e88200 t radeon_bo_unreserve +ffffffff81e88310 T r600_vram_scratch_fini +ffffffff81e883a0 T r600_set_bios_scratch_engine_hung +ffffffff81e883f0 T r600_gpu_check_soft_reset +ffffffff81e887c0 T r600_asic_reset +ffffffff81e88bf0 t r600_gpu_pci_config_reset +ffffffff81e88e50 T r600_gfx_is_lockup +ffffffff81e88ed0 T r6xx_remap_render_backend +ffffffff81e890a0 T r600_count_pipe_bits +ffffffff81e89110 T r600_pciep_rreg +ffffffff81e891a0 T r600_pciep_wreg +ffffffff81e89210 T r600_cp_stop +ffffffff81e89290 T r600_init_microcode +ffffffff81e89840 t request_firmware +ffffffff81e898f0 t release_firmware +ffffffff81e89930 T r600_gfx_get_rptr +ffffffff81e89990 T r600_gfx_get_wptr +ffffffff81e899d0 T r600_gfx_set_wptr +ffffffff81e89a10 T r600_cp_start +ffffffff81e89de0 T r600_cp_resume +ffffffff81e8a200 T r600_ring_init +ffffffff81e8a2c0 T r600_cp_fini +ffffffff81e8a350 T r600_scratch_init +ffffffff81e8a3c0 T r600_ring_test +ffffffff81e8a6e0 T r600_fence_ring_emit +ffffffff81e8b050 T r600_semaphore_ring_emit +ffffffff81e8b270 T r600_copy_cpdma +ffffffff81e8b8e0 T r600_set_surface_reg +ffffffff81e8b910 T r600_clear_surface_reg +ffffffff81e8b940 T r600_vga_set_state +ffffffff81e8b9a0 T r600_resume +ffffffff81e8ba50 t r600_startup +ffffffff81e8d960 T r600_suspend +ffffffff81e8db20 T r600_irq_suspend +ffffffff81e8dc00 t r600_pcie_gart_disable +ffffffff81e8de00 T r600_init +ffffffff81e8e720 T r600_ih_ring_init +ffffffff81e8e790 T r600_irq_fini +ffffffff81e8e910 t r600_pcie_gart_fini +ffffffff81e8e950 T r600_fini +ffffffff81e8eba0 T r600_ring_ib_execute +ffffffff81e8f090 T r600_ib_test +ffffffff81e8f3a0 T r600_ih_ring_alloc +ffffffff81e8f4f0 T r600_ih_ring_fini +ffffffff81e8f5a0 T r600_rlc_stop +ffffffff81e8f7b0 T r600_disable_interrupts +ffffffff81e8f860 T r600_irq_init +ffffffff81e8fd00 t r600_disable_interrupt_state +ffffffff81e90000 T r600_irq_disable +ffffffff81e900d0 T r600_irq_set +ffffffff81e908a0 t r600_irq_ack +ffffffff81e90dd0 T r600_irq_process +ffffffff81e91ab0 T r600_mmio_hdp_flush +ffffffff81e91b30 T r600_set_pcie_lanes +ffffffff81e91c70 T r600_get_pcie_lanes +ffffffff81e91d60 T r600_get_gpu_clock_counter +ffffffff81e91e10 t r600_cp_load_microcode +ffffffff81e92170 t r600_uvd_resume +ffffffff81e93000 T r600_fmt_is_valid_color +ffffffff81e93040 T r600_fmt_is_valid_texture +ffffffff81e93090 T r600_fmt_get_blocksize +ffffffff81e930d0 T r600_fmt_get_nblocksx +ffffffff81e93120 T r600_fmt_get_nblocksy +ffffffff81e93180 T r600_cs_common_vline_parse +ffffffff81e93470 T r600_mip_minify +ffffffff81e934d0 T r600_cs_parse +ffffffff81e95540 T r600_dma_cs_next_reloc +ffffffff81e955d0 T r600_dma_cs_parse +ffffffff81e95cb0 t r600_cs_track_check +ffffffff81e96e90 t r600_cs_check_reg +ffffffff81e97e70 t r600_is_safe_reg +ffffffff81e97f20 t r600_texture_size +ffffffff81e99000 T r600_dma_get_rptr +ffffffff81e99060 T r600_dma_get_wptr +ffffffff81e990a0 T r600_dma_set_wptr +ffffffff81e990e0 T r600_dma_stop +ffffffff81e99170 T r600_dma_resume +ffffffff81e99390 T r600_dma_fini +ffffffff81e99410 T r600_dma_is_lockup +ffffffff81e99490 T r600_dma_ring_test +ffffffff81e99750 T r600_dma_fence_ring_emit +ffffffff81e99960 T r600_dma_semaphore_ring_emit +ffffffff81e99aa0 T r600_dma_ib_test +ffffffff81e99d10 T r600_dma_ring_ib_execute +ffffffff81e9a0a0 T r600_copy_dma +ffffffff81e9b000 T r600_dpm_print_class_info +ffffffff81e9b340 T r600_dpm_print_cap_info +ffffffff81e9b3e0 T r600_dpm_print_ps_status +ffffffff81e9b4a0 T r600_dpm_get_vblank_time +ffffffff81e9b550 T r600_dpm_get_vrefresh +ffffffff81e9b5e0 T r600_calculate_u_and_p +ffffffff81e9b660 T r600_calculate_at +ffffffff81e9b710 T r600_gfx_clockgating_enable +ffffffff81e9b820 T r600_dynamicpm_enable +ffffffff81e9b870 T r600_enable_thermal_protection +ffffffff81e9b8d0 T r600_enable_acpi_pm +ffffffff81e9b920 T r600_enable_dynamic_pcie_gen2 +ffffffff81e9b970 T r600_dynamicpm_enabled +ffffffff81e9b9b0 T r600_enable_sclk_control +ffffffff81e9ba10 T r600_enable_mclk_control +ffffffff81e9ba70 T r600_enable_spll_bypass +ffffffff81e9bac0 T r600_wait_for_spll_change +ffffffff81e9bb50 T r600_set_bsp +ffffffff81e9bb90 T r600_set_at +ffffffff81e9bbf0 T r600_set_tc +ffffffff81e9bc50 T r600_select_td +ffffffff81e9bd00 T r600_set_vrc +ffffffff81e9bd40 T r600_set_tpu +ffffffff81e9bda0 T r600_set_tpc +ffffffff81e9be00 T r600_set_sstu +ffffffff81e9be60 T r600_set_sst +ffffffff81e9beb0 T r600_set_git +ffffffff81e9bf00 T r600_set_fctu +ffffffff81e9bf60 T r600_set_fct +ffffffff81e9bfb0 T r600_set_ctxcgtt3d_rphc +ffffffff81e9c010 T r600_set_ctxcgtt3d_rsdc +ffffffff81e9c070 T r600_set_vddc3d_oorsu +ffffffff81e9c0d0 T r600_set_vddc3d_oorphc +ffffffff81e9c130 T r600_set_vddc3d_oorsdc +ffffffff81e9c190 T r600_set_mpll_lock_time +ffffffff81e9c1e0 T r600_set_mpll_reset_time +ffffffff81e9c230 T r600_engine_clock_entry_enable +ffffffff81e9c330 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81e9c430 T r600_engine_clock_entry_enable_post_divider +ffffffff81e9c530 T r600_engine_clock_entry_set_post_divider +ffffffff81e9c600 T r600_engine_clock_entry_set_reference_divider +ffffffff81e9c6d0 T r600_engine_clock_entry_set_feedback_divider +ffffffff81e9c7a0 T r600_engine_clock_entry_set_step_time +ffffffff81e9c870 T r600_vid_rt_set_ssu +ffffffff81e9c8d0 T r600_vid_rt_set_vru +ffffffff81e9c930 T r600_vid_rt_set_vrt +ffffffff81e9c990 T r600_voltage_control_enable_pins +ffffffff81e9c9e0 T r600_voltage_control_program_voltages +ffffffff81e9ca70 T r600_voltage_control_deactivate_static_control +ffffffff81e9cb00 T r600_power_level_enable +ffffffff81e9cb70 T r600_power_level_set_voltage_index +ffffffff81e9cbe0 T r600_power_level_set_mem_clock_index +ffffffff81e9cc40 T r600_power_level_set_eng_clock_index +ffffffff81e9ccb0 T r600_power_level_set_watermark_id +ffffffff81e9cd20 T r600_power_level_set_pcie_gen2 +ffffffff81e9cd80 T r600_power_level_get_current_index +ffffffff81e9cdc0 T r600_power_level_get_target_index +ffffffff81e9ce00 T r600_power_level_set_enter_index +ffffffff81e9ce60 T r600_wait_for_power_level_unequal +ffffffff81e9cf60 T r600_wait_for_power_level +ffffffff81e9d060 T r600_start_dpm +ffffffff81e9d350 T r600_stop_dpm +ffffffff81e9d3a0 T r600_dpm_pre_set_power_state +ffffffff81e9d3d0 T r600_dpm_post_set_power_state +ffffffff81e9d400 T r600_is_uvd_state +ffffffff81e9d440 T r600_is_internal_thermal_sensor +ffffffff81e9d480 T r600_dpm_late_enable +ffffffff81e9d590 T r600_get_platform_caps +ffffffff81e9d630 T r600_parse_extended_power_table +ffffffff81e9e470 T r600_free_extended_power_table +ffffffff81e9e5d0 T r600_get_pcie_gen_support +ffffffff81e9e620 T r600_get_pcie_lane_support +ffffffff81e9e680 T r600_encode_pci_lane_width +ffffffff81e9f000 T r600_audio_update_hdmi +ffffffff81e9f190 t r600_audio_status +ffffffff81e9f2b0 T r600_hdmi_buffer_status_changed +ffffffff81e9f360 T r600_hdmi_update_audio_settings +ffffffff81e9f7d0 T r600_audio_enable +ffffffff81e9f850 T r600_audio_get_pin +ffffffff81e9f880 T r600_hdmi_update_acr +ffffffff81e9fca0 T r600_set_avi_packet +ffffffff81e9fee0 T r600_hdmi_audio_workaround +ffffffff81e9ffb0 T r600_hdmi_audio_set_dto +ffffffff81ea0070 T r600_set_vbi_packet +ffffffff81ea0130 T r600_set_audio_packet +ffffffff81ea0470 T r600_set_mute +ffffffff81ea0580 T r600_hdmi_enable +ffffffff81ea1000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81ea1040 T radeon_acpi_pcie_notify_device_ready +ffffffff81ea1170 T radeon_acpi_pcie_performance_request +ffffffff81ea1570 T radeon_acpi_init +ffffffff81ea1dc0 t radeon_acpi_event +ffffffff81ea2130 T radeon_acpi_fini +ffffffff81ea3000 T radeon_agp_head_init +ffffffff81ea3050 T radeon_agp_init +ffffffff81ea30b0 T radeon_agp_resume +ffffffff81ea3150 T radeon_agp_fini +ffffffff81ea31a0 T radeon_agp_suspend +ffffffff81ea4000 T radeon_agp_disable +ffffffff81ea4130 T radeon_asic_init +ffffffff81ea4900 t radeon_invalid_rreg +ffffffff81ea4940 t radeon_invalid_wreg +ffffffff81ea4990 t radeon_invalid_get_allowed_info_register +ffffffff81ea5000 T radeon_atombios_i2c_init +ffffffff81ea53b0 T radeon_atombios_lookup_gpio +ffffffff81ea54c0 T radeon_get_atom_connector_info_from_object_table +ffffffff81ea5e70 t radeon_lookup_i2c_gpio +ffffffff81ea6160 t radeon_atom_apply_quirks +ffffffff81ea6590 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81ea6ae0 T radeon_atom_get_clock_info +ffffffff81ea6ee0 T radeon_atombios_sideport_present +ffffffff81ea6fa0 T radeon_atombios_get_tmds_info +ffffffff81ea70f0 T radeon_atombios_get_ppll_ss_info +ffffffff81ea7220 T radeon_atombios_get_asic_ss_info +ffffffff81ea7500 t radeon_atombios_get_igp_ss_overrides +ffffffff81ea7620 T radeon_atombios_get_lvds_info +ffffffff81ea7990 T radeon_atombios_get_primary_dac_info +ffffffff81ea7a60 T radeon_atom_get_tv_timings +ffffffff81ea7cb0 T radeon_atombios_get_tv_info +ffffffff81ea7d70 T radeon_atombios_get_tv_dac_info +ffffffff81ea7e90 T radeon_atombios_get_default_voltages +ffffffff81ea7f50 T radeon_atombios_get_power_modes +ffffffff81ea90b0 T radeon_atom_get_clock_dividers +ffffffff81ea93f0 T radeon_atom_get_memory_pll_dividers +ffffffff81ea9550 T radeon_atom_set_clock_gating +ffffffff81ea95b0 T radeon_atom_get_engine_clock +ffffffff81ea9610 T radeon_atom_get_memory_clock +ffffffff81ea9670 T radeon_atom_set_engine_clock +ffffffff81ea96d0 T radeon_atom_set_memory_clock +ffffffff81ea9730 T radeon_atom_set_engine_dram_timings +ffffffff81ea97b0 T radeon_atom_update_memory_dll +ffffffff81ea9810 T radeon_atom_set_ac_timing +ffffffff81ea9870 T radeon_atom_set_voltage +ffffffff81ea9950 T radeon_atom_get_max_vddc +ffffffff81ea9a40 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81ea9b30 T radeon_atom_get_leakage_id_from_vbios +ffffffff81ea9c00 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81ea9e20 T radeon_atom_get_voltage_evv +ffffffff81ea9ee0 T radeon_atom_get_voltage_gpio_settings +ffffffff81eaa010 T radeon_atom_is_voltage_gpio +ffffffff81eaa1c0 T radeon_atom_get_svi2_info +ffffffff81eaa2b0 T radeon_atom_get_max_voltage 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rs780_dpm_init +ffffffff81f0cf00 T rs780_dpm_print_power_state +ffffffff81f0cfc0 T rs780_dpm_fini +ffffffff81f0d060 T rs780_dpm_get_sclk +ffffffff81f0d0a0 T rs780_dpm_get_mclk +ffffffff81f0d0d0 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81f0d100 T rs780_dpm_get_current_sclk +ffffffff81f0d190 T rs780_dpm_get_current_mclk +ffffffff81f0d1c0 T rs780_dpm_force_performance_level +ffffffff81f0d3e0 t rs780_force_fbdiv +ffffffff81f0e000 T rv515_ring_start +ffffffff81f0ec50 T rv515_mc_wait_for_idle +ffffffff81f0ed00 T rv515_vga_render_disable +ffffffff81f0ed50 T rv515_mc_rreg +ffffffff81f0edf0 T rv515_mc_wreg +ffffffff81f0ee70 T rv515_debugfs +ffffffff81f0ee80 T rv515_mc_stop +ffffffff81f0f4b0 T rv515_mc_resume +ffffffff81f0fb10 T rv515_clock_startup +ffffffff81f0fc00 T rv515_resume +ffffffff81f0fed0 t rv515_startup +ffffffff81f10490 T rv515_suspend +ffffffff81f10520 T rv515_set_safe_registers +ffffffff81f10560 T rv515_fini +ffffffff81f10670 T rv515_init +ffffffff81f10a50 T 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si_trim_voltage_table_to_fit_state_table +ffffffff81f39380 T si_dpm_setup_asic +ffffffff81f39560 T si_fan_ctrl_get_fan_speed_percent +ffffffff81f395f0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81f396b0 T si_fan_ctrl_set_mode +ffffffff81f39910 T si_fan_ctrl_get_mode +ffffffff81f39960 T si_dpm_enable +ffffffff81f3aee0 t si_init_smc_table +ffffffff81f3c190 t si_init_smc_spll_table +ffffffff81f3c330 t si_init_arb_table_index +ffffffff81f3c3c0 t si_populate_mc_reg_table +ffffffff81f3caf0 t si_initialize_smc_cac_tables +ffffffff81f3e770 t si_initialize_hardware_cac_manager +ffffffff81f3e840 t si_initialize_smc_dte_tables +ffffffff81f3eb60 t si_populate_smc_tdp_limits +ffffffff81f3ed90 t si_populate_smc_tdp_limits_2 +ffffffff81f3ee80 t si_program_response_times +ffffffff81f3efd0 t si_program_ds_registers +ffffffff81f3f070 t si_dpm_start_smc +ffffffff81f3f0b0 t si_enable_auto_throttle_source +ffffffff81f3f260 t si_thermal_start_thermal_controller +ffffffff81f3f770 T si_dpm_late_enable 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uvd_v1_0_get_wptr +ffffffff81f52080 T uvd_v1_0_set_wptr +ffffffff81f520c0 T uvd_v1_0_fence_emit +ffffffff81f52500 T uvd_v1_0_resume +ffffffff81f52660 T uvd_v1_0_init +ffffffff81f52c60 T uvd_v1_0_start +ffffffff81f53600 T uvd_v1_0_fini +ffffffff81f537b0 T uvd_v1_0_stop +ffffffff81f53950 T uvd_v1_0_ring_test +ffffffff81f53b50 T uvd_v1_0_semaphore_emit +ffffffff81f53b80 T uvd_v1_0_ib_execute +ffffffff81f53d30 T uvd_v1_0_ib_test +ffffffff81f54000 T uvd_v2_2_fence_emit +ffffffff81f544d0 T uvd_v2_2_semaphore_emit +ffffffff81f54700 T uvd_v2_2_resume +ffffffff81f55000 T uvd_v3_1_semaphore_emit +ffffffff81f56000 T uvd_v4_2_resume +ffffffff81f57000 T vce_v1_0_get_rptr +ffffffff81f57090 T vce_v1_0_get_wptr +ffffffff81f57120 T vce_v1_0_set_wptr +ffffffff81f571b0 T vce_v1_0_enable_mgcg +ffffffff81f574b0 T vce_v1_0_load_fw +ffffffff81f57680 T vce_v1_0_bo_size +ffffffff81f576f0 T vce_v1_0_resume +ffffffff81f58220 T vce_v1_0_start +ffffffff81f58b40 T vce_v1_0_init +ffffffff81f59000 T vce_v2_0_enable_mgcg +ffffffff81f59070 t vce_v2_0_set_dyn_cg +ffffffff81f59280 T vce_v2_0_bo_size +ffffffff81f592f0 T vce_v2_0_resume +ffffffff81f5a000 T aldebaran_reset_init +ffffffff81f5a0c0 t aldebaran_async_reset +ffffffff81f5a140 t aldebaran_get_reset_handler +ffffffff81f5a220 T aldebaran_reset_fini +ffffffff81f5a280 t aldebaran_mode2_prepare_hwcontext +ffffffff81f5a3c0 t aldebaran_mode2_perform_reset +ffffffff81f5a5d0 t aldebaran_mode2_restore_hwcontext +ffffffff81f5ac40 t aldebaran_mode2_reset +ffffffff81f5b000 T aldebaran_reg_base_init +ffffffff81f5c000 T aca_error_cache_log_bank_error +ffffffff81f5c180 T amdgpu_aca_get_error_data +ffffffff81f5ca00 T amdgpu_aca_add_handle +ffffffff81f5cbc0 T amdgpu_aca_is_enabled +ffffffff81f5cc00 T amdgpu_aca_remove_handle +ffffffff81f5cdb0 T amdgpu_aca_init +ffffffff81f5ce10 T amdgpu_aca_fini +ffffffff81f5ce90 T amdgpu_aca_reset +ffffffff81f5ced0 T amdgpu_aca_set_smu_funcs +ffffffff81f5cf50 T aca_bank_info_decode +ffffffff81f5cfd0 T aca_bank_check_error_codes +ffffffff81f5d080 T amdgpu_aca_smu_set_debug_mode +ffffffff81f5d0d0 T amdgpu_aca_smu_debugfs_init +ffffffff81f5e000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81f5e040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81f5e070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81f5e190 t amdgpu_atcs_call +ffffffff81f5e2a0 T amdgpu_acpi_pcie_performance_request +ffffffff81f5e510 T amdgpu_acpi_power_shift_control +ffffffff81f5e5f0 T amdgpu_acpi_smart_shift_update +ffffffff81f5e790 T amdgpu_acpi_get_tmr_info +ffffffff81f5e840 T amdgpu_acpi_get_mem_info +ffffffff81f5e910 T amdgpu_acpi_init +ffffffff81f5e9d0 t amdgpu_acpi_event +ffffffff81f5eca0 T amdgpu_acpi_get_backlight_caps +ffffffff81f5ed00 T amdgpu_acpi_fini +ffffffff81f5ed20 T amdgpu_acpi_should_gpu_reset +ffffffff81f5ed80 T amdgpu_acpi_is_s3_active +ffffffff81f5edc0 T amdgpu_acpi_detect +ffffffff81f5f620 T amdgpu_acpi_release +ffffffff81f5f7c0 T amdgpu_acpi_is_s0ix_active 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amdgpu_amdkfd_get_fw_version +ffffffff81f61dc0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81f62070 T amdgpu_amdkfd_xcp_memory_size +ffffffff81f62160 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81f621a0 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81f62210 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81f62360 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81f623e0 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81f62480 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81f62600 T amdgpu_amdkfd_submit_ib +ffffffff81f627a0 T amdgpu_amdkfd_set_compute_idle +ffffffff81f62840 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81f62880 T amdgpu_amdkfd_have_atomics_support +ffffffff81f628b0 T amdgpu_amdkfd_debug_mem_fence +ffffffff81f628d0 T amdgpu_amdkfd_is_fed +ffffffff81f628e0 T amdgpu_amdkfd_ras_pasid_poison_consumption_handler +ffffffff81f62900 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81f62920 T amdgpu_amdkfd_send_close_event_drain_irq +ffffffff81f62940 T amdgpu_amdkfd_check_and_lock_kfd +ffffffff81f62970 T amdgpu_amdkfd_unlock_kfd +ffffffff81f629a0 T amdgpu_amdkfd_unmap_hiq +ffffffff81f62b90 T amdgpu_amdkfd_stop_sched +ffffffff81f62bc0 T amdgpu_amdkfd_start_sched +ffffffff81f63000 T amdgpu_atom_execute_table +ffffffff81f630c0 t amdgpu_atom_execute_table_locked +ffffffff81f634a0 T amdgpu_atom_parse +ffffffff81f63a90 T amdgpu_atom_destroy +ffffffff81f63ad0 T amdgpu_atom_asic_init +ffffffff81f63c00 t get_u32 +ffffffff81f63c60 T amdgpu_atom_parse_data_header +ffffffff81f63d00 T amdgpu_atom_parse_cmd_header +ffffffff81f63d80 t atom_op_move +ffffffff81f63fb0 t atom_op_and +ffffffff81f641d0 t atom_op_or +ffffffff81f643f0 t atom_op_shift_left +ffffffff81f64630 t atom_op_shift_right +ffffffff81f64870 t atom_op_mul +ffffffff81f64a00 t atom_op_div +ffffffff81f64bb0 t atom_op_add +ffffffff81f64dd0 t atom_op_sub +ffffffff81f64ff0 t atom_op_setport +ffffffff81f651a0 t atom_op_setregblock +ffffffff81f65280 t atom_op_setfbbase +ffffffff81f65360 t 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amdgpu_atombios_encoder_init_backlight +ffffffff81f70f00 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81f70f60 T amdgpu_atombios_encoder_fini_backlight +ffffffff81f71000 T amdgpu_atombios_encoder_is_digital +ffffffff81f71050 T amdgpu_atombios_encoder_mode_fixup +ffffffff81f71150 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81f71320 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81f71880 t amdgpu_atombios_encoder_get_bpc +ffffffff81f718d0 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81f71a00 T amdgpu_atombios_encoder_dpms +ffffffff81f71b90 t amdgpu_atombios_encoder_setup_dig +ffffffff81f72040 t amdgpu_atombios_encoder_setup_dvo +ffffffff81f72210 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81f72640 T amdgpu_atombios_encoder_init_dig +ffffffff81f72720 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81f729e0 T amdgpu_atombios_encoder_dac_detect +ffffffff81f72bd0 T amdgpu_atombios_encoder_dig_detect +ffffffff81f72cf0 T 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+ffffffff8201c010 t vpe_idle_work_handler +ffffffff8201c0a0 t __delayed_work_tick +ffffffff8201d000 T amdgpu_vram_mgr_bo_visible_size +ffffffff8201d100 T amdgpu_vram_mgr_reserve_range +ffffffff8201d210 t amdgpu_vram_mgr_do_reserve +ffffffff8201d3b0 T amdgpu_vram_mgr_query_page_status +ffffffff8201d490 T amdgpu_vram_mgr_alloc_sgt +ffffffff8201d4f0 T amdgpu_vram_mgr_free_sgt +ffffffff8201d520 T amdgpu_vram_mgr_vis_usage +ffffffff8201d550 T amdgpu_vram_mgr_init +ffffffff8201d750 T amdgpu_vram_mgr_fini +ffffffff8201d9b0 t amdgpu_vram_mgr_new +ffffffff8201dfa0 t amdgpu_vram_mgr_del +ffffffff8201e0b0 t amdgpu_vram_mgr_intersects +ffffffff8201e130 t amdgpu_vram_mgr_compatible +ffffffff8201e1a0 t amdgpu_vram_mgr_debug +ffffffff8201e2a0 t amdgpu_dummy_vram_mgr_new +ffffffff8201e300 t amdgpu_dummy_vram_mgr_del +ffffffff8201e330 t amdgpu_dummy_vram_mgr_intersects +ffffffff8201e390 t amdgpu_dummy_vram_mgr_compatible +ffffffff8201e3f0 t amdgpu_dummy_vram_mgr_debug +ffffffff8201f000 T amdgpu_xcp_prepare_suspend +ffffffff8201f010 t amdgpu_xcp_run_transition +ffffffff8201f220 T amdgpu_xcp_suspend +ffffffff8201f240 T amdgpu_xcp_prepare_resume +ffffffff8201f260 T amdgpu_xcp_resume +ffffffff8201f280 T amdgpu_xcp_init +ffffffff8201f5d0 T amdgpu_xcp_switch_partition_mode +ffffffff8201f630 t __amdgpu_xcp_switch_partition_mode +ffffffff8201f7c0 T amdgpu_xcp_restore_partition_mode +ffffffff8201f800 T amdgpu_xcp_query_partition_mode +ffffffff8201f950 T amdgpu_xcp_mgr_init +ffffffff8201fb90 T amdgpu_xcp_get_partition +ffffffff8201fc30 T amdgpu_xcp_get_inst_details +ffffffff8201fc80 T amdgpu_xcp_dev_register +ffffffff8201fe10 T amdgpu_xcp_dev_unplug +ffffffff8201ff10 T amdgpu_xcp_open_device +ffffffff82020100 T amdgpu_xcp_release_sched +ffffffff82021000 T amdgpu_get_xgmi_hive +ffffffff82021050 T amdgpu_put_xgmi_hive +ffffffff820210a0 T amdgpu_xgmi_set_pstate +ffffffff820210f0 T amdgpu_xgmi_update_topology +ffffffff820211c0 T amdgpu_xgmi_get_hops_count +ffffffff82021230 T amdgpu_xgmi_get_num_links +ffffffff820212a0 T amdgpu_xgmi_add_device +ffffffff82021500 T amdgpu_xgmi_remove_device +ffffffff82021670 T amdgpu_xgmi_get_relative_phy_addr +ffffffff820216b0 t amdgpu_ras_error_inject_xgmi +ffffffff82021870 t amdgpu_xgmi_query_ras_error_count +ffffffff82022410 t amdgpu_xgmi_reset_ras_error_count +ffffffff820229d0 t amdgpu_xgmi_ras_late_init +ffffffff82022ad0 T amdgpu_xgmi_ras_sw_init +ffffffff82022bc0 t xgmi_v6_4_0_aca_bank_parser +ffffffff82023000 T aqua_vanjaram_doorbell_index_init +ffffffff82023120 T aqua_vanjaram_ip_map_init +ffffffff820232d0 t aqua_vanjaram_logical_to_dev_inst +ffffffff82023330 t aqua_vanjaram_logical_to_dev_mask +ffffffff820233f0 T aqua_vanjaram_encode_ext_smn_addressing +ffffffff82023430 t aqua_vanjaram_switch_partition_mode +ffffffff820238c0 t aqua_vanjaram_query_partition_mode +ffffffff82023a30 t aqua_vanjaram_get_xcp_ip_details +ffffffff82023c10 t aqua_vanjaram_get_xcp_mem_id +ffffffff82023d30 t aqua_vanjaram_select_scheds +ffffffff82023ec0 t aqua_vanjaram_update_partition_sched_list +ffffffff82024440 T aqua_vanjaram_init_soc_config +ffffffff82024660 T aqua_vanjaram_get_reg_state +ffffffff82025120 t aqua_vanjaram_read_usr_state +ffffffff82026000 T arct_reg_base_init +ffffffff82027000 T athub_v1_0_set_clockgating +ffffffff82027250 T athub_v1_0_get_clockgating +ffffffff82028000 T athub_v2_0_set_clockgating +ffffffff82028210 T athub_v2_0_get_clockgating +ffffffff82029000 T athub_v2_1_set_clockgating +ffffffff82029240 T athub_v2_1_get_clockgating +ffffffff8202a000 T athub_v3_0_set_clockgating +ffffffff8202a110 T athub_v3_0_get_clockgating +ffffffff8202a170 t athub_v3_0_get_cg_cntl +ffffffff8202a260 t athub_v3_0_set_cg_cntl +ffffffff8202b000 T athub_v4_1_0_set_clockgating +ffffffff8202b260 T athub_v4_1_0_get_clockgating +ffffffff8202c000 t cz_ih_early_init +ffffffff8202c050 t cz_ih_sw_init +ffffffff8202c0c0 t cz_ih_sw_fini +ffffffff8202c120 t cz_ih_hw_init +ffffffff8202c410 t cz_ih_hw_fini +ffffffff8202c520 t cz_ih_suspend +ffffffff8202c630 t cz_ih_resume +ffffffff8202c670 t cz_ih_is_idle +ffffffff8202c6c0 t cz_ih_wait_for_idle +ffffffff8202c770 t cz_ih_soft_reset +ffffffff8202c890 t cz_ih_set_clockgating_state +ffffffff8202c8c0 t cz_ih_set_powergating_state +ffffffff8202c8f0 t cz_ih_get_wptr +ffffffff8202ca20 t cz_ih_decode_iv +ffffffff8202caa0 t cz_ih_set_rptr +ffffffff8202d000 T dce_v10_0_disable_dce +ffffffff8202d1a0 t dce_v10_0_early_init +ffffffff8202d260 t dce_v10_0_sw_init +ffffffff8202d630 t dce_v10_0_sw_fini +ffffffff8202d790 t dce_v10_0_hw_init +ffffffff8202dc30 t dce_v10_0_hw_fini +ffffffff8202de20 t dce_v10_0_suspend +ffffffff8202dea0 t dce_v10_0_resume +ffffffff8202df30 t dce_v10_0_is_idle +ffffffff8202df60 t dce_v10_0_wait_for_idle +ffffffff8202df90 t dce_v10_0_check_soft_reset +ffffffff8202dfa0 t dce_v10_0_soft_reset +ffffffff8202e0b0 t dce_v10_0_set_clockgating_state +ffffffff8202e0e0 t dce_v10_0_set_powergating_state +ffffffff8202e110 t dce_v10_0_audio_endpt_rreg +ffffffff8202e1d0 t dce_v10_0_audio_endpt_wreg +ffffffff8202e260 t dce_v10_0_bandwidth_update +ffffffff8202edb0 t dce_v10_0_vblank_get_counter +ffffffff8202ee00 t dce_v10_0_hpd_sense +ffffffff8202ee60 t dce_v10_0_hpd_set_polarity +ffffffff8202ef40 t dce_v10_0_hpd_get_gpio_reg +ffffffff8202ef70 t dce_v10_0_page_flip +ffffffff8202f090 t dce_v10_0_crtc_get_scanoutpos +ffffffff8202f140 t dce_v10_0_encoder_add +ffffffff8202f3d0 t dce_v10_0_latency_watermark +ffffffff8202f600 t dce_v10_0_encoder_destroy +ffffffff8202f670 t dce_v10_0_encoder_prepare +ffffffff8202f8c0 t dce_v10_0_encoder_commit +ffffffff8202f900 t dce_v10_0_encoder_mode_set +ffffffff82030ba0 t dce_v10_0_encoder_disable +ffffffff82030ce0 t dce_v10_0_ext_dpms +ffffffff82030d10 t dce_v10_0_ext_prepare +ffffffff82030d40 t dce_v10_0_ext_commit +ffffffff82030d70 t dce_v10_0_ext_mode_set +ffffffff82030da0 t dce_v10_0_ext_disable +ffffffff82030dd0 t dce_v10_0_set_crtc_irq_state +ffffffff82030ed0 t dce_v10_0_crtc_irq +ffffffff82031150 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff82031230 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff82031310 t dce_v10_0_set_pageflip_irq_state +ffffffff820313d0 t dce_v10_0_pageflip_irq +ffffffff82031570 t dce_v10_0_set_hpd_irq_state +ffffffff82031650 t dce_v10_0_hpd_irq +ffffffff820317a0 t dce_v10_0_afmt_init +ffffffff820318d0 t dce_v10_0_audio_init +ffffffff820319a0 t INIT_DELAYED_WORK +ffffffff820319f0 t dce_v10_0_crtc_cursor_set2 +ffffffff82031d40 t dce_v10_0_crtc_cursor_move +ffffffff82031e40 t dce_v10_0_crtc_gamma_set +ffffffff82031e90 t dce_v10_0_crtc_destroy +ffffffff82031ed0 t amdgpu_bo_reserve +ffffffff82032110 t amdgpu_bo_unreserve +ffffffff82032220 t dce_v10_0_lock_cursor +ffffffff82032290 t dce_v10_0_cursor_move_locked +ffffffff820323f0 t dce_v10_0_show_cursor +ffffffff820324a0 t dce_v10_0_crtc_load_lut +ffffffff82032940 t dce_v10_0_crtc_dpms +ffffffff82032bb0 t dce_v10_0_crtc_prepare +ffffffff82032c00 t dce_v10_0_crtc_commit +ffffffff82032c40 t dce_v10_0_crtc_mode_fixup +ffffffff82032e60 t dce_v10_0_crtc_mode_set +ffffffff820330c0 t dce_v10_0_crtc_set_base +ffffffff820330e0 t dce_v10_0_crtc_set_base_atomic +ffffffff82033100 t dce_v10_0_crtc_disable +ffffffff820332d0 t dce_v10_0_crtc_do_set_base +ffffffff82033b10 t __delayed_work_tick +ffffffff82033b30 t dce_v10_0_is_display_hung +ffffffff82034000 T dce_v11_0_disable_dce +ffffffff820341c0 t dce_v11_0_early_init +ffffffff820342f0 t dce_v11_0_sw_init +ffffffff820346c0 t dce_v11_0_sw_fini +ffffffff82034820 t dce_v11_0_hw_init +ffffffff82034d40 t dce_v11_0_hw_fini +ffffffff82034f30 t dce_v11_0_suspend +ffffffff82034fb0 t dce_v11_0_resume +ffffffff82035040 t dce_v11_0_is_idle +ffffffff82035070 t dce_v11_0_wait_for_idle +ffffffff820350a0 t dce_v11_0_soft_reset +ffffffff82035300 t dce_v11_0_set_clockgating_state +ffffffff82035330 t dce_v11_0_set_powergating_state +ffffffff82035360 t dce_v11_0_audio_endpt_rreg +ffffffff82035420 t dce_v11_0_audio_endpt_wreg +ffffffff820354b0 t dce_v11_0_bandwidth_update +ffffffff82036000 t dce_v11_0_vblank_get_counter +ffffffff82036050 t dce_v11_0_hpd_sense +ffffffff820360b0 t dce_v11_0_hpd_set_polarity +ffffffff82036190 t dce_v11_0_hpd_get_gpio_reg +ffffffff820361c0 t dce_v11_0_page_flip +ffffffff820362f0 t dce_v11_0_crtc_get_scanoutpos +ffffffff820363a0 t dce_v11_0_encoder_add +ffffffff82036630 t dce_v11_0_latency_watermark +ffffffff82036860 t dce_v11_0_encoder_destroy +ffffffff820368d0 t dce_v11_0_encoder_prepare +ffffffff82036b20 t dce_v11_0_encoder_commit +ffffffff82036b60 t dce_v11_0_encoder_mode_set +ffffffff82037e00 t dce_v11_0_encoder_disable +ffffffff82037f40 t dce_v11_0_ext_dpms +ffffffff82037f70 t dce_v11_0_ext_prepare +ffffffff82037fa0 t dce_v11_0_ext_commit +ffffffff82037fd0 t dce_v11_0_ext_mode_set +ffffffff82038000 t dce_v11_0_ext_disable +ffffffff82038030 t dce_v11_0_set_crtc_irq_state +ffffffff82038130 t dce_v11_0_crtc_irq +ffffffff820383a0 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff82038480 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff82038560 t dce_v11_0_set_pageflip_irq_state +ffffffff82038620 t dce_v11_0_pageflip_irq +ffffffff820387c0 t dce_v11_0_set_hpd_irq_state +ffffffff820388a0 t dce_v11_0_hpd_irq +ffffffff820389f0 t dce_v11_0_afmt_init +ffffffff82038b20 t dce_v11_0_audio_init +ffffffff82038c30 t INIT_DELAYED_WORK +ffffffff82038c80 t dce_v11_0_crtc_cursor_set2 +ffffffff82038fd0 t dce_v11_0_crtc_cursor_move +ffffffff820390d0 t dce_v11_0_crtc_gamma_set +ffffffff82039120 t dce_v11_0_crtc_destroy +ffffffff82039160 t amdgpu_bo_reserve +ffffffff820393a0 t amdgpu_bo_unreserve +ffffffff820394b0 t dce_v11_0_lock_cursor +ffffffff82039520 t dce_v11_0_cursor_move_locked +ffffffff82039680 t dce_v11_0_show_cursor +ffffffff82039730 t dce_v11_0_crtc_load_lut +ffffffff82039b80 t dce_v11_0_crtc_dpms +ffffffff82039df0 t dce_v11_0_crtc_prepare +ffffffff82039e40 t dce_v11_0_crtc_commit +ffffffff82039e80 t dce_v11_0_crtc_mode_fixup +ffffffff8203a170 t dce_v11_0_crtc_mode_set +ffffffff8203a450 t dce_v11_0_crtc_set_base +ffffffff8203a470 t dce_v11_0_crtc_set_base_atomic +ffffffff8203a490 t dce_v11_0_crtc_disable +ffffffff8203a670 t dce_v11_0_crtc_do_set_base +ffffffff8203aeb0 t __delayed_work_tick +ffffffff8203b000 t df_v1_7_sw_init +ffffffff8203b040 t df_v1_7_sw_fini +ffffffff8203b070 t df_v1_7_enable_broadcast_mode +ffffffff8203b1a0 t df_v1_7_get_fb_channel_number +ffffffff8203b240 t df_v1_7_get_hbm_channel_number +ffffffff8203b2a0 t df_v1_7_update_medium_grain_clock_gating +ffffffff8203b450 t df_v1_7_get_clockgating_state +ffffffff8203b4f0 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff8203c000 t df_v3_6_sw_init +ffffffff8203c160 t df_v3_6_sw_fini +ffffffff8203c190 t df_v3_6_enable_broadcast_mode +ffffffff8203c2c0 t df_v3_6_get_fb_channel_number +ffffffff8203c3c0 t df_v3_6_get_hbm_channel_number +ffffffff8203c420 t df_v3_6_update_medium_grain_clock_gating +ffffffff8203c5f0 t df_v3_6_get_clockgating_state +ffffffff8203c690 t df_v3_6_pmc_start +ffffffff8203ca10 t df_v3_6_pmc_stop +ffffffff8203cd60 t df_v3_6_pmc_get_count +ffffffff8203cf40 t df_v3_6_get_fica +ffffffff8203d090 t df_v3_6_set_fica +ffffffff8203d1c0 t df_v3_6_query_ras_poison_mode +ffffffff8203e000 t df_v4_15_hw_init +ffffffff8203f000 t df_v4_3_query_ras_poison_mode +ffffffff82040000 t df_v4_6_2_query_ras_poison_mode +ffffffff82041000 T dimgrey_cavefish_reg_base_init +ffffffff82042000 T emu_soc_asic_init +ffffffff82043000 t gfx_v10_0_early_init +ffffffff820439c0 t gfx_v10_0_late_init +ffffffff82043a50 t gfx_v10_0_sw_init +ffffffff820440a0 t gfx_v10_0_sw_fini +ffffffff820443b0 t gfx_v10_0_hw_init +ffffffff82047540 t gfx_v10_0_hw_fini +ffffffff82047690 t gfx_v10_0_suspend +ffffffff820476d0 t gfx_v10_0_resume +ffffffff820476e0 t gfx_v10_0_is_idle +ffffffff82047780 t gfx_v10_0_wait_for_idle +ffffffff82047890 t gfx_v10_0_soft_reset +ffffffff82047c70 t gfx_v10_0_set_clockgating_state +ffffffff82048030 t gfx_v10_0_set_powergating_state +ffffffff82048150 t gfx_v10_0_get_clockgating_state +ffffffff820482b0 t gfx_v10_ip_dump +ffffffff82048790 t gfx_v10_ip_print +ffffffff82048b20 t gfx_v10_0_get_gpu_clock_counter +ffffffff82049260 t gfx_v10_0_select_se_sh +ffffffff82049300 t gfx_v10_0_read_wave_data +ffffffff820495f0 t gfx_v10_0_read_wave_vgprs +ffffffff82049620 t gfx_v10_0_read_wave_sgprs +ffffffff820496a0 t gfx_v10_0_select_me_pipe_q +ffffffff820496c0 t gfx_v10_0_init_spm_golden_registers +ffffffff82049740 t gfx_v10_0_update_perfmon_mgcg +ffffffff82049870 t wave_read_ind +ffffffff82049970 t wave_read_regs +ffffffff82049af0 t gfx10_kiq_set_resources +ffffffff82049e50 t gfx10_kiq_map_queues +ffffffff8204a230 t gfx10_kiq_unmap_queues +ffffffff8204a5f0 t gfx10_kiq_query_status +ffffffff8204a910 t gfx10_kiq_invalidate_tlbs +ffffffff8204aa40 t gfx_v10_0_ring_get_rptr_compute +ffffffff8204aa70 t gfx_v10_0_ring_get_wptr_compute +ffffffff8204aae0 t gfx_v10_0_ring_set_wptr_compute +ffffffff8204ab40 t gfx_v10_0_ring_emit_ib_compute +ffffffff8204aea0 t gfx_v10_0_ring_emit_fence_kiq +ffffffff8204b320 t gfx_v10_0_ring_test_ring +ffffffff8204b5d0 t gfx_v10_0_ring_test_ib +ffffffff8204b7f0 t gfx_v10_0_ring_emit_rreg +ffffffff8204bab0 t gfx_v10_0_ring_emit_wreg +ffffffff8204bd10 t gfx_v10_0_ring_emit_reg_wait +ffffffff8204bd70 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff8204be10 t gfx_v10_0_wait_reg_mem +ffffffff8204c170 t gfx_v10_0_ring_get_rptr_gfx +ffffffff8204c1a0 t gfx_v10_0_ring_get_wptr_gfx +ffffffff8204c2c0 t gfx_v10_0_ring_set_wptr_gfx +ffffffff8204c400 t gfx_v10_0_ring_emit_ib_gfx +ffffffff8204cab0 t gfx_v10_0_ring_emit_fence +ffffffff8204cea0 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff8204cf10 t gfx_v10_0_ring_emit_vm_flush +ffffffff8204d030 t gfx_v10_0_ring_emit_hdp_flush +ffffffff8204d120 t gfx_v10_0_ring_emit_gds_switch +ffffffff8204d220 t gfx_v10_ring_insert_nop +ffffffff8204d3d0 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff8204d620 t gfx_v10_0_ring_emit_sb +ffffffff8204d710 t gfx_v10_0_ring_emit_cntxcntl +ffffffff8204dc00 t gfx_v10_0_ring_emit_frame_cntl +ffffffff8204dd10 t gfx_v10_0_ring_soft_recovery +ffffffff8204ddc0 t gfx_v10_0_ring_preempt_ib +ffffffff8204df70 t gfx_v10_0_emit_mem_sync +ffffffff8204e2e0 t gfx_v10_0_reset_kgq +ffffffff8204e5f0 t gfx_v10_0_write_data_to_reg +ffffffff8204e820 t amdgpu_bo_reserve +ffffffff8204e9c0 t gfx_v10_0_kgq_init_queue +ffffffff8204ec40 t amdgpu_bo_unreserve +ffffffff8204ed50 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff8204f080 t gfx_v10_0_reset_kcq +ffffffff8204f550 t gfx_v10_0_kcq_init_queue +ffffffff8204f710 t gfx_v10_0_set_eop_interrupt_state +ffffffff8204f810 t gfx_v10_0_eop_irq +ffffffff8204f950 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff8204fb10 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff8204fcf0 t gfx_v10_0_kiq_set_interrupt_state +ffffffff82050060 t gfx_v10_0_kiq_irq +ffffffff820500f0 t gfx_v10_0_set_priv_reg_fault_state +ffffffff820503f0 t gfx_v10_0_priv_reg_irq +ffffffff82050460 t gfx_v10_0_handle_priv_fault +ffffffff820505e0 t gfx_v10_0_set_bad_op_fault_state +ffffffff820508e0 t gfx_v10_0_bad_op_irq +ffffffff82050950 t gfx_v10_0_set_priv_inst_fault_state +ffffffff82050af0 t gfx_v10_0_priv_inst_irq +ffffffff82050b60 t gfx_v10_0_is_rlc_enabled +ffffffff82050c00 t gfx_v10_0_set_safe_mode +ffffffff82050f00 t gfx_v10_0_unset_safe_mode +ffffffff82050fb0 t gfx_v10_0_rlc_init +ffffffff82050fd0 t gfx_v10_0_get_csb_size +ffffffff82051000 t gfx_v10_0_get_csb_buffer +ffffffff82051170 t gfx_v10_0_rlc_resume +ffffffff82051d30 t gfx_v10_0_rlc_stop +ffffffff82051e10 t gfx_v10_0_rlc_reset +ffffffff82052000 t gfx_v10_0_rlc_start +ffffffff820521f0 t gfx_v10_0_update_spm_vmid +ffffffff82052240 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff82052c80 t gfx_v10_0_init_csb +ffffffff82052fb0 t gfx_v10_0_update_spm_vmid_internal +ffffffff82053100 t gfx_v10_0_rlc_backdoor_autoload_config_mec_cache +ffffffff82053420 t gfx_v10_0_is_rlcg_access_range +ffffffff82053450 t gfx_v10_0_gfx_mqd_init +ffffffff82053890 t gfx_v10_0_compute_mqd_init +ffffffff82053db0 t gfx_v10_0_mec_init +ffffffff82054040 t gfx_v10_0_compute_ring_init +ffffffff820541a0 t gfx_v10_0_rlc_backdoor_autoload_buffer_init +ffffffff82054440 t gfx_v10_0_gpu_early_init +ffffffff82054740 t gfx_v10_0_alloc_ip_dump +ffffffff82054860 t gfx_v10_0_cp_resume +ffffffff820574b0 t gfx_v10_3_get_disabled_sa +ffffffff820575e0 t gfx_v10_0_get_rb_active_bitmap +ffffffff82057720 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff82057840 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff820579e0 t gfx_v10_0_cp_gfx_enable +ffffffff82057c80 t gfx_v10_0_cp_compute_enable +ffffffff82057e40 t gfx_v10_0_kiq_init_register +ffffffff82058f30 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff82059030 t gfx_v10_0_cp_gfx_start +ffffffff82059b20 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff82059eb0 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff8205a6b0 t gfx_v10_0_update_3d_clock_gating +ffffffff8205aae0 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff8205af10 t gfx_v10_cntl_pg +ffffffff8205c000 T gfx_v11_0_request_gfx_index_mutex +ffffffff8205c1e0 t gfx_v11_0_early_init +ffffffff8205ca40 t gfx_v11_0_late_init +ffffffff8205cad0 t gfx_v11_0_sw_init +ffffffff8205d0e0 t gfx_v11_0_sw_fini +ffffffff8205d3e0 t gfx_v11_0_hw_init +ffffffff82062070 t gfx_v11_0_hw_fini +ffffffff820621e0 t gfx_v11_0_suspend +ffffffff82062220 t gfx_v11_0_resume +ffffffff82062230 t gfx_v11_0_is_idle +ffffffff820622d0 t gfx_v11_0_wait_for_idle +ffffffff820623e0 t gfx_v11_0_check_soft_reset +ffffffff82062520 t gfx_v11_0_soft_reset +ffffffff82063240 t gfx_v11_0_post_soft_reset +ffffffff82063250 t gfx_v11_0_set_clockgating_state +ffffffff82064000 t gfx_v11_0_set_powergating_state +ffffffff82064100 t gfx_v11_0_get_clockgating_state +ffffffff820642f0 t gfx_v11_ip_dump +ffffffff820647d0 t gfx_v11_ip_print +ffffffff82064b60 t gfx_v11_0_get_gpu_clock_counter +ffffffff82064f50 t gfx_v11_0_select_se_sh +ffffffff82064ff0 t gfx_v11_0_read_wave_data +ffffffff820652c0 t gfx_v11_0_read_wave_vgprs +ffffffff820652f0 t gfx_v11_0_read_wave_sgprs +ffffffff82065370 t gfx_v11_0_select_me_pipe_q +ffffffff82065390 t gfx_v11_0_update_perf_clk +ffffffff820654d0 t gfx_v11_0_get_gfx_shadow_info +ffffffff82065540 t wave_read_ind +ffffffff82065640 t wave_read_regs +ffffffff820657c0 t gfx11_kiq_set_resources +ffffffff82065b20 t gfx11_kiq_map_queues +ffffffff82065f00 t gfx11_kiq_unmap_queues +ffffffff82066340 t gfx11_kiq_query_status +ffffffff82066660 t gfx11_kiq_invalidate_tlbs +ffffffff82066790 t gfx_v11_0_ring_get_rptr_compute +ffffffff820667c0 t gfx_v11_0_ring_get_wptr_compute +ffffffff82066830 t gfx_v11_0_ring_set_wptr_compute +ffffffff82066890 t gfx_v11_0_ring_emit_ib_compute +ffffffff82066c10 t gfx_v11_0_ring_emit_fence_kiq +ffffffff82067090 t gfx_v11_0_ring_test_ring +ffffffff82067360 t gfx_v11_0_ring_test_ib +ffffffff82067660 t gfx_v11_0_ring_emit_rreg +ffffffff82067920 t gfx_v11_0_ring_emit_wreg +ffffffff82067b80 t gfx_v11_0_ring_emit_reg_wait +ffffffff82067be0 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff82067c50 t gfx_v11_0_wait_reg_mem +ffffffff82067fb0 t gfx_v11_0_ring_get_rptr_gfx +ffffffff82067fe0 t gfx_v11_0_ring_get_wptr_gfx +ffffffff82068100 t gfx_v11_0_ring_set_wptr_gfx +ffffffff82068240 t gfx_v11_0_ring_emit_ib_gfx +ffffffff82068940 t gfx_v11_0_ring_emit_fence +ffffffff82068d50 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff82068dc0 t gfx_v11_0_ring_emit_vm_flush +ffffffff82068fd0 t gfx_v11_0_ring_emit_hdp_flush +ffffffff820690c0 t gfx_v11_0_ring_emit_gds_switch +ffffffff820691c0 t gfx_v11_ring_insert_nop +ffffffff82069370 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff820695c0 t gfx_v11_0_ring_emit_cntxcntl +ffffffff82069740 t gfx_v11_0_ring_emit_gfx_shadow +ffffffff8206a020 t gfx_v11_0_ring_emit_frame_cntl +ffffffff8206a130 t gfx_v11_0_ring_soft_recovery +ffffffff8206a1e0 t gfx_v11_0_ring_preempt_ib +ffffffff8206a3a0 t gfx_v11_0_emit_mem_sync +ffffffff8206a710 t gfx_v11_0_reset_kgq +ffffffff8206a970 t gfx_v11_0_write_data_to_reg +ffffffff8206aba0 t amdgpu_bo_reserve +ffffffff8206ad40 t amdgpu_bo_unreserve +ffffffff8206ae50 t gfx_v11_0_reset_kcq +ffffffff8206b320 t gfx_v11_0_set_eop_interrupt_state +ffffffff8206b3c0 t gfx_v11_0_eop_irq +ffffffff8206b5a0 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff8206b760 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff8206b910 t gfx_v11_0_set_priv_reg_fault_state +ffffffff8206bc10 t gfx_v11_0_priv_reg_irq +ffffffff8206bc80 t gfx_v11_0_handle_priv_fault +ffffffff8206be00 t gfx_v11_0_set_bad_op_fault_state +ffffffff8206c100 t gfx_v11_0_bad_op_irq +ffffffff8206c170 t gfx_v11_0_set_priv_inst_fault_state +ffffffff8206c310 t gfx_v11_0_priv_inst_irq +ffffffff8206c380 t gfx_v11_0_rlc_gc_fed_irq +ffffffff8206c3d0 t gfx_v11_0_is_rlc_enabled +ffffffff8206c470 t gfx_v11_0_set_safe_mode +ffffffff8206c5f0 t gfx_v11_0_unset_safe_mode +ffffffff8206c660 t gfx_v11_0_rlc_init +ffffffff8206c6e0 t gfx_v11_0_get_csb_size +ffffffff8206c710 t gfx_v11_0_get_csb_buffer +ffffffff8206c880 t gfx_v11_0_rlc_resume +ffffffff8206d730 t gfx_v11_0_rlc_stop +ffffffff8206d810 t gfx_v11_0_rlc_reset +ffffffff8206da00 t gfx_v11_0_rlc_start +ffffffff8206dbf0 t gfx_v11_0_update_spm_vmid +ffffffff8206ddb0 t gfx_v11_0_init_csb +ffffffff8206df70 t gfx_v11_0_gfx_mqd_init +ffffffff8206e3b0 t gfx_v11_0_compute_mqd_init +ffffffff8206e960 t gfx_v11_0_mec_init +ffffffff8206eaf0 t gfx_v11_0_compute_ring_init +ffffffff8206ec50 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff8206ee50 t gfx_v11_0_gpu_early_init +ffffffff8206ef50 t gfx_v11_0_alloc_ip_dump +ffffffff8206f070 t gfx_v11_0_disable_gpa_mode +ffffffff8206f230 t gfx_v11_0_cp_resume +ffffffff82073990 t gfx_v11_0_config_me_cache +ffffffff82073db0 t gfx_v11_0_config_pfp_cache +ffffffff820741d0 t gfx_v11_0_config_mec_cache +ffffffff820745f0 t gfx_v11_0_get_sa_active_bitmap +ffffffff82074720 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff820748c0 t gfx_v11_0_cp_compute_enable +ffffffff82074ac0 t gfx_v11_0_cp_gfx_enable +ffffffff82074cf0 t gfx_v11_0_kiq_init_register +ffffffff82075df0 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff82075ee0 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff820760f0 t gfx_v11_0_cp_gfx_start +ffffffff82076a40 t gfx_v11_cntl_pg +ffffffff82077000 t gfx_v11_0_3_rlc_gc_fed_irq +ffffffff82077250 t gfx_v11_0_3_poison_consumption_handler +ffffffff82078000 t gfx_v12_0_early_init +ffffffff820786e0 t gfx_v12_0_late_init +ffffffff82078770 t gfx_v12_0_sw_init +ffffffff82078d20 t gfx_v12_0_sw_fini +ffffffff82079020 t gfx_v12_0_hw_init +ffffffff8207b820 t gfx_v12_0_hw_fini +ffffffff8207ba60 t gfx_v12_0_suspend +ffffffff8207baa0 t gfx_v12_0_resume +ffffffff8207bab0 t gfx_v12_0_is_idle +ffffffff8207bb50 t gfx_v12_0_wait_for_idle +ffffffff8207bc60 t gfx_v12_0_set_clockgating_state +ffffffff8207c870 t gfx_v12_0_set_powergating_state +ffffffff8207c8e0 t gfx_v12_0_get_clockgating_state +ffffffff8207cad0 t gfx_v12_ip_dump +ffffffff8207cfb0 t gfx_v12_ip_print +ffffffff8207d340 t gfx_v12_0_get_gpu_clock_counter +ffffffff8207d3d0 t gfx_v12_0_select_se_sh +ffffffff8207d470 t gfx_v12_0_read_wave_data +ffffffff8207d870 t gfx_v12_0_read_wave_vgprs +ffffffff8207d8a0 t gfx_v12_0_read_wave_sgprs +ffffffff8207d920 t gfx_v12_0_select_me_pipe_q +ffffffff8207d940 t gfx_v12_0_update_perf_clk +ffffffff8207da80 t wave_read_ind +ffffffff8207db80 t wave_read_regs +ffffffff8207dd00 t gfx_v12_0_kiq_set_resources +ffffffff8207e060 t gfx_v12_0_kiq_map_queues +ffffffff8207e440 t gfx_v12_0_kiq_unmap_queues +ffffffff8207e880 t gfx_v12_0_kiq_query_status +ffffffff8207eba0 t gfx_v12_0_kiq_invalidate_tlbs +ffffffff8207ecd0 t gfx_v12_0_ring_get_rptr_compute +ffffffff8207ed00 t gfx_v12_0_ring_get_wptr_compute +ffffffff8207ed70 t gfx_v12_0_ring_set_wptr_compute +ffffffff8207eed0 t gfx_v12_0_ring_emit_ib_compute +ffffffff8207f110 t gfx_v12_0_ring_emit_fence_kiq +ffffffff8207f590 t gfx_v12_0_ring_test_ring +ffffffff8207f890 t gfx_v12_0_ring_test_ib +ffffffff8207fbb0 t gfx_v12_0_ring_emit_rreg +ffffffff8207fe70 t gfx_v12_0_ring_emit_wreg +ffffffff820800d0 t gfx_v12_0_ring_emit_reg_wait +ffffffff82080130 t gfx_v12_0_ring_emit_reg_write_reg_wait +ffffffff820801a0 t gfx_v12_0_wait_reg_mem +ffffffff82080500 t gfx_v12_0_ring_get_rptr_gfx +ffffffff82080530 t gfx_v12_0_ring_get_wptr_gfx +ffffffff82080650 t gfx_v12_0_ring_set_wptr_gfx +ffffffff82080890 t gfx_v12_0_ring_emit_ib_gfx +ffffffff82080b10 t gfx_v12_0_ring_emit_fence +ffffffff82080f20 t gfx_v12_0_ring_emit_pipeline_sync +ffffffff82080f90 t gfx_v12_0_ring_emit_vm_flush +ffffffff82081180 t gfx_v12_0_ring_emit_hdp_flush +ffffffff82081270 t gfx_v12_ring_insert_nop +ffffffff82081420 t gfx_v12_0_ring_emit_init_cond_exec +ffffffff82081670 t gfx_v12_0_ring_emit_cntxcntl +ffffffff820817f0 t gfx_v12_0_ring_emit_frame_cntl +ffffffff82081900 t gfx_v12_0_ring_soft_recovery +ffffffff820819b0 t gfx_v12_0_ring_preempt_ib +ffffffff82081b70 t gfx_v12_0_emit_mem_sync +ffffffff82081ee0 t gfx_v12_0_reset_kgq +ffffffff82082170 t amdgpu_bo_reserve +ffffffff82082310 t amdgpu_bo_unreserve +ffffffff82082420 t gfx_v12_0_reset_kcq +ffffffff82082880 t gfx_v12_0_set_eop_interrupt_state +ffffffff82082950 t gfx_v12_0_eop_irq +ffffffff82082b30 t gfx_v12_0_set_gfx_eop_interrupt_state +ffffffff82082ce0 t gfx_v12_0_set_compute_eop_interrupt_state +ffffffff82082ea0 t gfx_v12_0_set_priv_reg_fault_state +ffffffff82083180 t gfx_v12_0_priv_reg_irq +ffffffff820831f0 t gfx_v12_0_handle_priv_fault +ffffffff82083370 t gfx_v12_0_set_bad_op_fault_state +ffffffff82083650 t gfx_v12_0_bad_op_irq +ffffffff820836c0 t gfx_v12_0_set_priv_inst_fault_state +ffffffff82083850 t gfx_v12_0_priv_inst_irq +ffffffff820838c0 t gfx_v12_0_is_rlc_enabled +ffffffff82083960 t gfx_v12_0_set_safe_mode +ffffffff82083ae0 t gfx_v12_0_unset_safe_mode +ffffffff82083b50 t gfx_v12_0_rlc_init +ffffffff82083bd0 t gfx_v12_0_get_csb_size +ffffffff82083c00 t gfx_v12_0_get_csb_buffer +ffffffff82083cf0 t gfx_v12_0_rlc_resume +ffffffff82084600 t gfx_v12_0_rlc_stop +ffffffff820846e0 t gfx_v12_0_rlc_reset +ffffffff820848d0 t gfx_v12_0_rlc_start +ffffffff82084ac0 t gfx_v12_0_update_spm_vmid +ffffffff82084c40 t gfx_v12_0_init_csb +ffffffff82084e00 t gfx_v12_0_gfx_mqd_init +ffffffff82085230 t gfx_v12_0_compute_mqd_init +ffffffff820857d0 t gfx_v12_0_mec_init +ffffffff82085960 t gfx_v12_0_compute_ring_init +ffffffff82085ac0 t gfx_v12_0_rlc_autoload_buffer_init +ffffffff82085c80 t gfx_v12_0_gpu_early_init +ffffffff82085d10 t gfx_v12_0_alloc_ip_dump +ffffffff82085e30 t gfx_v12_0_disable_gpa_mode +ffffffff82085ff0 t gfx_v12_0_cp_resume +ffffffff82089640 t gfx_v12_0_set_pfp_ucode_start_addr +ffffffff820899a0 t gfx_v12_0_set_me_ucode_start_addr +ffffffff82089d00 t gfx_v12_0_set_mec_ucode_start_addr +ffffffff82089ef0 t gfx_v12_0_get_sa_active_bitmap +ffffffff8208a020 t gfx_v12_0_enable_gui_idle_interrupt +ffffffff8208a1b0 t gfx_v12_0_cp_compute_enable +ffffffff8208a2c0 t gfx_v12_0_cp_gfx_enable +ffffffff8208a4f0 t gfx_v12_0_kiq_init_register +ffffffff8208b5f0 t gfx_v12_0_cp_gfx_switch_pipe +ffffffff8208b6d0 t gfx_v12_0_cp_gfx_start +ffffffff8208c000 t gfx_v8_0_early_init +ffffffff8208c310 t gfx_v8_0_late_init +ffffffff8208cad0 t gfx_v8_0_sw_init +ffffffff8208cf20 t gfx_v8_0_sw_fini +ffffffff8208d130 t gfx_v8_0_hw_init +ffffffff8208f710 t gfx_v8_0_hw_fini +ffffffff8208fcb0 t gfx_v8_0_suspend +ffffffff8208fcf0 t gfx_v8_0_resume +ffffffff8208fd00 t gfx_v8_0_is_idle +ffffffff8208fd80 t gfx_v8_0_wait_for_idle +ffffffff8208fe50 t gfx_v8_0_check_soft_reset +ffffffff8208ff50 t gfx_v8_0_pre_soft_reset +ffffffff82090110 t gfx_v8_0_soft_reset +ffffffff82090360 t gfx_v8_0_post_soft_reset +ffffffff82090550 t gfx_v8_0_set_clockgating_state +ffffffff82090830 t gfx_v8_0_set_powergating_state +ffffffff82090ce0 t gfx_v8_0_get_clockgating_state +ffffffff82090df0 t gfx_v8_0_get_gpu_clock_counter +ffffffff82090eb0 t gfx_v8_0_select_se_sh +ffffffff82090f10 t gfx_v8_0_read_wave_data +ffffffff82091510 t gfx_v8_0_read_wave_sgprs +ffffffff820915e0 t gfx_v8_0_select_me_pipe_q +ffffffff82091600 t gfx_v8_0_ring_get_rptr +ffffffff82091630 t gfx_v8_0_ring_get_wptr_compute +ffffffff82091660 t gfx_v8_0_ring_set_wptr_compute +ffffffff820916a0 t gfx_v8_0_ring_emit_fence_kiq +ffffffff82091b10 t gfx_v8_0_ring_test_ring +ffffffff82091d50 t gfx_v8_0_ring_emit_rreg +ffffffff82092010 t gfx_v8_0_ring_emit_wreg +ffffffff82092270 t gfx_v8_0_ring_get_wptr_gfx +ffffffff820922d0 t gfx_v8_0_ring_set_wptr_gfx +ffffffff82092350 t gfx_v8_0_ring_emit_ib_gfx +ffffffff82092910 t gfx_v8_0_ring_emit_fence_gfx +ffffffff82092e70 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff82093190 t gfx_v8_0_ring_emit_vm_flush +ffffffff82093590 t gfx_v8_0_ring_emit_hdp_flush +ffffffff820938e0 t gfx_v8_0_ring_emit_gds_switch +ffffffff82094140 t gfx_v8_0_ring_test_ib +ffffffff82094330 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff82094580 t gfx_v8_ring_emit_sb +ffffffff82094670 t gfx_v8_ring_emit_cntxcntl +ffffffff82094c70 t gfx_v8_0_ring_soft_recovery +ffffffff82094ca0 t gfx_v8_0_emit_mem_sync +ffffffff82094ec0 t gfx_v8_0_reset_kgq +ffffffff82095080 t gfx_v8_0_ring_emit_reg_wait +ffffffff82095370 t gfx_v8_0_ring_emit_ib_compute +ffffffff820956b0 t gfx_v8_0_ring_emit_fence_compute +ffffffff820959e0 t gfx_v8_0_emit_mem_sync_compute +ffffffff82095cd0 t gfx_v8_0_emit_wave_limit +ffffffff82095ea0 t gfx_v8_0_set_eop_interrupt_state +ffffffff82096120 t gfx_v8_0_eop_irq +ffffffff82096250 t gfx_v8_0_set_priv_reg_fault_state +ffffffff820962e0 t gfx_v8_0_priv_reg_irq +ffffffff82096400 t gfx_v8_0_set_priv_inst_fault_state +ffffffff82096490 t gfx_v8_0_priv_inst_irq +ffffffff820965b0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff820968f0 t gfx_v8_0_cp_ecc_error_irq +ffffffff82096940 t gfx_v8_0_set_sq_int_state +ffffffff820969d0 t gfx_v8_0_sq_irq +ffffffff82096a50 t gfx_v8_0_parse_sq_irq +ffffffff82096cd0 t gfx_v8_0_is_rlc_enabled +ffffffff82096d20 t gfx_v8_0_set_safe_mode +ffffffff82096e50 t gfx_v8_0_unset_safe_mode +ffffffff82096f10 t gfx_v8_0_rlc_init +ffffffff82096fd0 t gfx_v8_0_get_csb_size +ffffffff82097000 t gfx_v8_0_get_csb_buffer +ffffffff82097170 t gfx_v8_0_cp_jump_table_num +ffffffff820971b0 t gfx_v8_0_rlc_resume +ffffffff82097660 t gfx_v8_0_rlc_stop +ffffffff820976f0 t gfx_v8_0_rlc_reset +ffffffff820977a0 t gfx_v8_0_rlc_start +ffffffff82097840 t gfx_v8_0_update_spm_vmid +ffffffff820978d0 t gfx_v8_0_init_save_restore_list +ffffffff82097db0 t gfx_v8_0_wait_for_rlc_serdes +ffffffff82098020 t gfx_v8_0_sq_irq_work_func +ffffffff82098040 t gfx_v8_0_init_microcode +ffffffff82098850 t gfx_v8_0_mec_init +ffffffff82098980 t gfx_v8_0_compute_ring_init +ffffffff82098ad0 t gfx_v8_0_gpu_early_init +ffffffff82098fa0 t amdgpu_bo_unreserve +ffffffff820990b0 t gfx_v8_0_kiq_resume +ffffffff82099400 t gfx_v8_0_cp_gfx_resume +ffffffff8209a040 t gfx_v8_0_kcq_resume +ffffffff8209ab50 t amdgpu_bo_reserve +ffffffff8209acf0 t gfx_v8_0_mqd_commit +ffffffff8209af60 t gfx_v8_0_mqd_init +ffffffff8209b470 t gfx_v8_0_deactivate_hqd +ffffffff8209b570 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff8209b980 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff8209c000 t gfx_v9_0_ras_error_inject +ffffffff8209c1e0 t gfx_v9_0_query_ras_error_count +ffffffff8209cf10 t gfx_v9_0_reset_ras_error_count +ffffffff8209dac0 T gfx_v9_0_select_se_sh +ffffffff8209db60 t gfx_v9_0_early_init +ffffffff8209e740 t gfx_v9_0_late_init +ffffffff8209f670 t gfx_v9_0_sw_init +ffffffff8209ff70 t gfx_v9_0_sw_fini +ffffffff820a0230 t gfx_v9_0_hw_init +ffffffff820a3720 t gfx_v9_0_hw_fini +ffffffff820a3ff0 t gfx_v9_0_suspend +ffffffff820a4030 t gfx_v9_0_resume +ffffffff820a4040 t gfx_v9_0_is_idle +ffffffff820a40e0 t gfx_v9_0_wait_for_idle +ffffffff820a41e0 t gfx_v9_0_soft_reset +ffffffff820a45f0 t gfx_v9_0_set_clockgating_state +ffffffff820a4710 t gfx_v9_0_set_powergating_state +ffffffff820a4b70 t gfx_v9_0_get_clockgating_state +ffffffff820a4cc0 t gfx_v9_ip_dump +ffffffff820a4fb0 t gfx_v9_ip_print +ffffffff820a51d0 t gfx_v9_0_get_gpu_clock_counter +ffffffff820a5ac0 t gfx_v9_0_read_wave_data +ffffffff820a5d90 t gfx_v9_0_read_wave_vgprs +ffffffff820a5e00 t gfx_v9_0_read_wave_sgprs +ffffffff820a5e30 t gfx_v9_0_select_me_pipe_q +ffffffff820a5e50 t wave_read_ind +ffffffff820a5f60 t wave_read_regs +ffffffff820a60d0 t gfx_v9_0_kiq_set_resources +ffffffff820a6450 t gfx_v9_0_kiq_map_queues +ffffffff820a67d0 t gfx_v9_0_kiq_unmap_queues +ffffffff820a6b40 t gfx_v9_0_kiq_query_status +ffffffff820a6e60 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff820a6f90 t gfx_v9_0_kiq_reset_hw_queue +ffffffff820a72c0 t gfx_v9_0_ring_get_rptr_compute +ffffffff820a72f0 t gfx_v9_0_ring_get_wptr_compute +ffffffff820a7360 t gfx_v9_0_ring_set_wptr_compute +ffffffff820a73c0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff820a7840 t gfx_v9_0_ring_test_ring +ffffffff820a7ab0 t gfx_v9_0_ring_emit_rreg +ffffffff820a7d70 t gfx_v9_0_ring_emit_wreg +ffffffff820a7fd0 t gfx_v9_0_ring_emit_reg_wait +ffffffff820a8030 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff820a80d0 t gfx_v9_0_wait_reg_mem +ffffffff820a8430 t gfx_v9_0_ring_get_rptr_gfx +ffffffff820a8460 t gfx_v9_0_ring_get_wptr_gfx +ffffffff820a8580 t gfx_v9_0_ring_set_wptr_gfx +ffffffff820a86c0 t gfx_v9_0_ring_emit_ib_gfx +ffffffff820a8db0 t gfx_v9_0_ring_emit_fence +ffffffff820a91c0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff820a9230 t gfx_v9_0_ring_emit_vm_flush +ffffffff820a9350 t gfx_v9_0_ring_emit_hdp_flush +ffffffff820a9440 t gfx_v9_0_ring_emit_gds_switch +ffffffff820a9540 t gfx_v9_ring_insert_nop +ffffffff820a96f0 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff820a9940 t gfx_v9_ring_emit_sb +ffffffff820a9a30 t gfx_v9_ring_emit_cntxcntl +ffffffff820a9f70 t gfx_v9_0_ring_emit_frame_cntl +ffffffff820aa080 t gfx_v9_0_ring_soft_recovery +ffffffff820aa130 t gfx_v9_0_ring_preempt_ib +ffffffff820aa360 t gfx_v9_0_emit_mem_sync +ffffffff820aa650 t gfx_v9_0_reset_kgq +ffffffff820aa850 t gfx_v9_0_ring_emit_cleaner_shader +ffffffff820aa940 t gfx_v9_0_write_data_to_reg +ffffffff820aab70 t gfx_v9_0_ring_test_ib +ffffffff820aad60 t gfx_v9_0_ring_patch_cntl +ffffffff820aada0 t gfx_v9_0_ring_patch_ce_meta +ffffffff820aaeb0 t gfx_v9_0_ring_patch_de_meta +ffffffff820aaf80 t gfx_v9_0_ring_emit_ib_compute +ffffffff820ab2e0 t gfx_v9_0_ring_begin_use_compute +ffffffff820ab350 t gfx_v9_0_ring_end_use_compute +ffffffff820ab390 t gfx_v9_0_emit_wave_limit +ffffffff820ab580 t gfx_v9_0_reset_kcq +ffffffff820aba60 t amdgpu_bo_reserve +ffffffff820abc00 t gfx_v9_0_kcq_init_queue +ffffffff820abdd0 t amdgpu_bo_unreserve +ffffffff820abee0 t gfx_v9_0_mqd_init +ffffffff820ac4b0 t gfx_v9_0_set_eop_interrupt_state +ffffffff820ac6b0 t gfx_v9_0_eop_irq +ffffffff820ac830 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff820aca10 t gfx_v9_0_set_priv_reg_fault_state +ffffffff820accd0 t gfx_v9_0_priv_reg_irq +ffffffff820acdf0 t gfx_v9_0_set_bad_op_fault_state +ffffffff820ad0b0 t gfx_v9_0_bad_op_irq +ffffffff820ad1d0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff820ad320 t gfx_v9_0_priv_inst_irq +ffffffff820ad440 t gfx_v9_0_set_cp_ecc_error_state +ffffffff820ade30 t gfx_v9_0_is_rlc_enabled +ffffffff820aded0 t gfx_v9_0_set_safe_mode +ffffffff820ae050 t gfx_v9_0_unset_safe_mode +ffffffff820ae0c0 t gfx_v9_0_rlc_init +ffffffff820ae140 t gfx_v9_0_get_csb_size +ffffffff820ae170 t gfx_v9_0_get_csb_buffer +ffffffff820ae2b0 t gfx_v9_0_cp_jump_table_num +ffffffff820ae310 t gfx_v9_0_rlc_resume +ffffffff820afd70 t gfx_v9_0_rlc_stop +ffffffff820b0190 t gfx_v9_0_rlc_reset +ffffffff820b0370 t gfx_v9_0_rlc_start +ffffffff820b04f0 t gfx_v9_0_update_spm_vmid +ffffffff820b0540 t gfx_v9_0_is_rlcg_access_range +ffffffff820b0590 t gfx_v9_0_init_csb +ffffffff820b0750 t gfx_v9_0_enable_lbpw +ffffffff820b0860 t gfx_v9_0_update_spm_vmid_internal +ffffffff820b0990 t gfx_v9_0_init_always_on_cu_mask +ffffffff820b0c50 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff820b0d60 t gfx_v9_0_debug_trap_config_init +ffffffff820b0e80 t gfx_v9_0_mec_init +ffffffff820b10e0 t gfx_v9_0_compute_ring_init +ffffffff820b1240 t gfx_v9_0_gpu_early_init +ffffffff820b16b0 t gfx_v9_0_alloc_ip_dump +ffffffff820b1780 t gfx_v9_0_cp_gfx_enable +ffffffff820b1880 t gfx_v9_0_kiq_init_register +ffffffff820b26e0 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff820b2ca0 t gfx_v9_0_update_3d_clock_gating +ffffffff820b3100 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff820b4000 t gfx_v9_4_query_ras_error_count +ffffffff820b4f00 t gfx_v9_4_query_ras_error_status +ffffffff820b5100 t gfx_v9_4_reset_ras_error_count +ffffffff820b6000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff820b6890 T gfx_v9_4_2_init_golden_registers +ffffffff820b6930 T gfx_v9_4_2_debug_trap_config_init +ffffffff820b6a50 T gfx_v9_4_2_set_power_brake_sequence +ffffffff820b6c70 t gfx_v9_4_2_query_ras_error_count +ffffffff820b6d40 t gfx_v9_4_2_query_ras_error_status +ffffffff820b76e0 t gfx_v9_4_2_reset_ras_error_count +ffffffff820b7750 t gfx_v9_4_2_reset_ras_error_status +ffffffff820b7cb0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff820b7f10 t gfx_v9_4_2_run_shader +ffffffff820b8340 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff820b8a20 t gfx_v9_4_2_query_sram_edc_count +ffffffff820b8da0 t gfx_v9_4_2_query_utc_edc_count +ffffffff820b8fa0 t wave_read_ind +ffffffff820ba000 t gfx_v9_4_3_xcp_suspend +ffffffff820ba0b0 t gfx_v9_4_3_xcp_resume +ffffffff820ba250 t gfx_v9_4_3_query_ras_error_count +ffffffff820ba270 t gfx_v9_4_3_reset_ras_error_count +ffffffff820ba290 t gfx_v9_4_3_ras_late_init +ffffffff820ba340 t gfx_v9_4_3_enable_watchdog_timer +ffffffff820ba360 t gfx_v9_4_3_early_init +ffffffff820bab00 t gfx_v9_4_3_late_init +ffffffff820babb0 t gfx_v9_4_3_sw_init +ffffffff820bb150 t gfx_v9_4_3_sw_fini +ffffffff820bb3e0 t gfx_v9_4_3_hw_init +ffffffff820bc2d0 t gfx_v9_4_3_hw_fini +ffffffff820bc3d0 t gfx_v9_4_3_suspend +ffffffff820bc410 t gfx_v9_4_3_resume +ffffffff820bc420 t gfx_v9_4_3_is_idle +ffffffff820bc610 t gfx_v9_4_3_wait_for_idle +ffffffff820bc6b0 t gfx_v9_4_3_soft_reset +ffffffff820bcef0 t gfx_v9_4_3_set_clockgating_state +ffffffff820bd0c0 t gfx_v9_4_3_set_powergating_state +ffffffff820bd0f0 t gfx_v9_4_3_get_clockgating_state +ffffffff820bd2b0 t gfx_v9_4_3_ip_dump +ffffffff820bd760 t gfx_v9_4_3_ip_print +ffffffff820bdab0 t gfx_v9_4_3_kiq_set_resources +ffffffff820bde30 t gfx_v9_4_3_kiq_map_queues +ffffffff820be1d0 t gfx_v9_4_3_kiq_unmap_queues +ffffffff820be590 t gfx_v9_4_3_kiq_query_status +ffffffff820be8b0 t gfx_v9_4_3_kiq_invalidate_tlbs +ffffffff820be9e0 t gfx_v9_4_3_kiq_reset_hw_queue +ffffffff820bef20 t gfx_v9_4_3_ring_get_rptr_compute +ffffffff820bef60 t gfx_v9_4_3_ring_get_wptr_compute +ffffffff820befd0 t gfx_v9_4_3_ring_set_wptr_compute +ffffffff820bf030 t gfx_v9_4_3_ring_emit_fence_kiq +ffffffff820bf4d0 t gfx_v9_4_3_ring_test_ring +ffffffff820bf790 t gfx_v9_4_3_ring_emit_rreg +ffffffff820bfa70 t gfx_v9_4_3_ring_emit_wreg +ffffffff820bfce0 t gfx_v9_4_3_ring_emit_reg_wait +ffffffff820bfd40 t gfx_v9_4_3_ring_emit_reg_write_reg_wait +ffffffff820bfd60 t gfx_v9_4_3_wait_reg_mem +ffffffff820c0100 t gfx_v9_4_3_ring_emit_ib_compute +ffffffff820c0460 t gfx_v9_4_3_ring_emit_fence +ffffffff820c0850 t gfx_v9_4_3_ring_emit_pipeline_sync +ffffffff820c08c0 t gfx_v9_4_3_ring_emit_vm_flush +ffffffff820c08e0 t gfx_v9_4_3_ring_emit_hdp_flush +ffffffff820c09d0 t gfx_v9_4_3_ring_emit_gds_switch +ffffffff820c0bb0 t gfx_v9_4_3_ring_test_ib +ffffffff820c0da0 t gfx_v9_4_3_ring_insert_nop +ffffffff820c0f50 t gfx_v9_4_3_ring_soft_recovery +ffffffff820c10d0 t gfx_v9_4_3_emit_mem_sync +ffffffff820c13c0 t gfx_v9_4_3_emit_wave_limit +ffffffff820c15d0 t gfx_v9_4_3_reset_kcq +ffffffff820c1ef0 t gfx_v9_4_3_ring_emit_cleaner_shader +ffffffff820c1fe0 t gfx_v9_4_3_write_data_to_reg +ffffffff820c2230 t gfx_v9_4_3_unmap_done +ffffffff820c2510 t amdgpu_bo_reserve +ffffffff820c26b0 t gfx_v9_4_3_xcc_kcq_init_queue +ffffffff820c2920 t amdgpu_bo_unreserve +ffffffff820c2a30 t gfx_v9_4_3_xcc_set_safe_mode +ffffffff820c2d40 t gfx_v9_4_3_xcc_unset_safe_mode +ffffffff820c2e80 t gfx_v9_4_3_xcc_mqd_init +ffffffff820c3a30 t gfx_v9_4_3_set_eop_interrupt_state +ffffffff820c3bb0 t gfx_v9_4_3_eop_irq +ffffffff820c3d60 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state +ffffffff820c3ee0 t gfx_v9_4_3_ih_to_xcc_inst +ffffffff820c3fc0 t gfx_v9_4_3_set_priv_reg_fault_state +ffffffff820c4530 t gfx_v9_4_3_priv_reg_irq +ffffffff820c45a0 t gfx_v9_4_3_fault +ffffffff820c4720 t gfx_v9_4_3_set_bad_op_fault_state +ffffffff820c4c90 t gfx_v9_4_3_bad_op_irq +ffffffff820c4d00 t gfx_v9_4_3_set_priv_inst_fault_state +ffffffff820c5160 t gfx_v9_4_3_priv_inst_irq +ffffffff820c51d0 t gfx_v9_4_3_is_rlc_enabled +ffffffff820c5320 t gfx_v9_4_3_rlc_init +ffffffff820c5380 t gfx_v9_4_3_rlc_resume +ffffffff820c5440 t gfx_v9_4_3_rlc_stop +ffffffff820c54f0 t gfx_v9_4_3_rlc_reset +ffffffff820c5c70 t gfx_v9_4_3_rlc_start +ffffffff820c5d20 t gfx_v9_4_3_update_spm_vmid +ffffffff820c5fe0 t gfx_v9_4_3_is_rlcg_access_range +ffffffff820c60b0 t gfx_v9_4_3_xcc_rlc_resume +ffffffff820c6a70 t gfx_v9_4_3_xcc_rlc_stop +ffffffff820c72d0 t gfx_v9_4_3_xcc_rlc_start +ffffffff820c76e0 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt +ffffffff820c7940 t gfx_v9_4_3_xcc_select_se_sh +ffffffff820c7b70 t gfx_v9_4_3_mec_init +ffffffff820c7ee0 t gfx_v9_4_3_gpu_early_init +ffffffff820c8140 t gfx_v9_4_3_alloc_ip_dump +ffffffff820c8250 t gfx_v9_4_3_get_gpu_clock_counter +ffffffff820c8620 t gfx_v9_4_3_read_wave_data +ffffffff820c8980 t gfx_v9_4_3_read_wave_vgprs +ffffffff820c89a0 t gfx_v9_4_3_read_wave_sgprs +ffffffff820c8a00 t gfx_v9_4_3_select_me_pipe_q +ffffffff820c8a80 t gfx_v9_4_3_switch_compute_partition +ffffffff820c8d00 t gfx_v9_4_3_get_xccs_per_xcp +ffffffff820c8e60 t wave_read_ind +ffffffff820c90a0 t wave_read_regs +ffffffff820c9380 t gfx_v9_4_3_xcc_constants_init +ffffffff820ca6f0 t gfx_v9_4_3_xcc_cp_resume +ffffffff820cb730 t gfx_v9_4_3_xcc_cp_compute_enable +ffffffff820cb920 t gfx_v9_4_3_xcc_kiq_init_register +ffffffff820cd9c0 t gfx_v9_4_3_xcc_fini +ffffffff820ce040 t gfx_v9_4_3_xcc_q_fini_register +ffffffff820ceba0 t gfx_v9_4_3_xcc_update_sram_fgcg +ffffffff820cee50 t gfx_v9_4_3_xcc_update_repeater_fgcg +ffffffff820cf100 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating +ffffffff820cfdf0 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating +ffffffff820d0780 t gfx_v9_4_3_inst_query_ras_err_count +ffffffff820d0d00 t gfx_v9_4_3_inst_reset_ras_err_count +ffffffff820d1100 t gfx_v9_4_3_aca_bank_parser +ffffffff820d11c0 t gfx_v9_4_3_aca_bank_is_valid +ffffffff820d1210 t gfx_v9_4_3_inst_enable_watchdog_timer +ffffffff820d2000 t gfxhub_v11_5_0_get_fb_location +ffffffff820d20a0 t gfxhub_v11_5_0_get_mc_fb_offset +ffffffff820d2140 t gfxhub_v11_5_0_setup_vm_pt_regs +ffffffff820d2290 t gfxhub_v11_5_0_gart_enable +ffffffff820d3850 t gfxhub_v11_5_0_gart_disable +ffffffff820d3b50 t gfxhub_v11_5_0_set_fault_enable_default +ffffffff820d3d40 t gfxhub_v11_5_0_init +ffffffff820d3e10 t gfxhub_v11_5_0_print_l2_protection_fault_status +ffffffff820d4030 t gfxhub_v11_5_0_get_invalidate_req +ffffffff820d5000 t gfxhub_v12_0_get_fb_location +ffffffff820d50a0 t gfxhub_v12_0_get_mc_fb_offset +ffffffff820d5140 t gfxhub_v12_0_setup_vm_pt_regs +ffffffff820d5290 t gfxhub_v12_0_gart_enable +ffffffff820d6830 t gfxhub_v12_0_gart_disable +ffffffff820d6b10 t gfxhub_v12_0_set_fault_enable_default +ffffffff820d6d00 t gfxhub_v12_0_init +ffffffff820d6dd0 t gfxhub_v12_0_print_l2_protection_fault_status +ffffffff820d6ff0 t gfxhub_v12_0_get_invalidate_req +ffffffff820d8000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff820d80a0 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff820d81f0 t gfxhub_v1_0_gart_enable +ffffffff820d99e0 t gfxhub_v1_0_gart_disable +ffffffff820d9cd0 t gfxhub_v1_0_set_fault_enable_default +ffffffff820d9dd0 t gfxhub_v1_0_init +ffffffff820da000 T gfxhub_v1_1_get_xgmi_info +ffffffff820db000 t gfxhub_v1_2_get_mc_fb_offset +ffffffff820db150 t gfxhub_v1_2_setup_vm_pt_regs +ffffffff820db1c0 t gfxhub_v1_2_gart_enable +ffffffff820db250 t gfxhub_v1_2_gart_disable +ffffffff820db2b0 t gfxhub_v1_2_set_fault_enable_default +ffffffff820db320 t gfxhub_v1_2_init +ffffffff820db6e0 t gfxhub_v1_2_get_xgmi_info +ffffffff820db990 t gfxhub_v1_2_xcp_suspend +ffffffff820db9e0 t gfxhub_v1_2_xcp_resume +ffffffff820dba60 t gfxhub_v1_2_xcc_setup_vm_pt_regs +ffffffff820dbde0 t gfxhub_v1_2_xcc_gart_enable +ffffffff820df8a0 t gfxhub_v1_2_xcc_gart_disable +ffffffff820dff60 t gfxhub_v1_2_xcc_set_fault_enable_default +ffffffff820e1000 t gfxhub_v2_0_get_fb_location +ffffffff820e10a0 t gfxhub_v2_0_get_mc_fb_offset +ffffffff820e1140 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff820e1290 t gfxhub_v2_0_gart_enable +ffffffff820e2740 t gfxhub_v2_0_gart_disable +ffffffff820e29b0 t gfxhub_v2_0_set_fault_enable_default +ffffffff820e2ab0 t gfxhub_v2_0_init +ffffffff820e2b80 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff820e2da0 t gfxhub_v2_0_get_invalidate_req +ffffffff820e3000 t gfxhub_v2_1_get_fb_location +ffffffff820e30a0 t gfxhub_v2_1_get_mc_fb_offset +ffffffff820e3140 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff820e3290 t gfxhub_v2_1_gart_enable +ffffffff820e4810 t gfxhub_v2_1_gart_disable +ffffffff820e4a80 t gfxhub_v2_1_set_fault_enable_default +ffffffff820e4ba0 t gfxhub_v2_1_init +ffffffff820e4c70 t gfxhub_v2_1_get_xgmi_info +ffffffff820e4dd0 t gfxhub_v2_1_utcl2_harvest +ffffffff820e4fd0 t gfxhub_v2_1_save_regs +ffffffff820e5b20 t gfxhub_v2_1_restore_regs +ffffffff820e6910 t gfxhub_v2_1_halt +ffffffff820e6d60 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff820e6f80 t gfxhub_v2_1_get_invalidate_req +ffffffff820e7000 t gfxhub_v3_0_get_fb_location +ffffffff820e70a0 t gfxhub_v3_0_get_mc_fb_offset +ffffffff820e7140 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff820e7290 t gfxhub_v3_0_gart_enable +ffffffff820e8850 t gfxhub_v3_0_gart_disable +ffffffff820e8b30 t gfxhub_v3_0_set_fault_enable_default +ffffffff820e8d20 t gfxhub_v3_0_init +ffffffff820e8df0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff820e9010 t gfxhub_v3_0_get_invalidate_req +ffffffff820ea000 t gfxhub_v3_0_3_get_fb_location +ffffffff820ea0a0 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff820ea140 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff820ea290 t gfxhub_v3_0_3_gart_enable +ffffffff820eb700 t gfxhub_v3_0_3_gart_disable +ffffffff820eba00 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff820ebb20 t gfxhub_v3_0_3_init +ffffffff820ebbf0 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff820ebe10 t gfxhub_v3_0_3_get_invalidate_req +ffffffff820ec000 t gmc_v10_0_early_init +ffffffff820ec180 t gmc_v10_0_late_init +ffffffff820ec200 t gmc_v10_0_sw_init +ffffffff820ec710 t gmc_v10_0_sw_fini +ffffffff820ec790 t gmc_v10_0_hw_init +ffffffff820eca20 t gmc_v10_0_hw_fini +ffffffff820ecb00 t gmc_v10_0_suspend +ffffffff820ecb40 t gmc_v10_0_resume +ffffffff820ecba0 t gmc_v10_0_is_idle +ffffffff820ecbd0 t gmc_v10_0_wait_for_idle +ffffffff820ecc00 t gmc_v10_0_soft_reset +ffffffff820ecc30 t gmc_v10_0_set_clockgating_state +ffffffff820eccf0 t gmc_v10_0_set_powergating_state +ffffffff820ecd20 t gmc_v10_0_get_clockgating_state +ffffffff820ecdd0 t gmc_v10_0_flush_gpu_tlb +ffffffff820ed2a0 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff820ed420 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff820ed600 t gmc_v10_0_emit_pasid_mapping +ffffffff820ed680 t gmc_v10_0_map_mtype +ffffffff820ed6d0 t gmc_v10_0_get_vm_pde +ffffffff820ed7d0 t gmc_v10_0_get_vm_pte +ffffffff820ed8b0 t gmc_v10_0_get_vbios_fb_size +ffffffff820eda40 t gmc_v10_0_vm_fault_interrupt_state +ffffffff820edaf0 t gmc_v10_0_process_interrupt +ffffffff820ede50 t gmc_v10_0_ecc_interrupt_state +ffffffff820ede80 t gmc_v10_0_gart_init +ffffffff820ee000 t gmc_v11_0_early_init +ffffffff820ee240 t gmc_v11_0_late_init +ffffffff820ee2c0 t gmc_v11_0_sw_init +ffffffff820ee730 t gmc_v11_0_sw_fini +ffffffff820ee7b0 t gmc_v11_0_hw_init +ffffffff820ee970 t gmc_v11_0_hw_fini +ffffffff820eea30 t gmc_v11_0_suspend +ffffffff820eeaf0 t gmc_v11_0_resume +ffffffff820eeb50 t gmc_v11_0_is_idle +ffffffff820eeb80 t gmc_v11_0_wait_for_idle +ffffffff820eebb0 t gmc_v11_0_soft_reset +ffffffff820eebe0 t gmc_v11_0_set_clockgating_state +ffffffff820eec60 t gmc_v11_0_set_powergating_state +ffffffff820eec90 t gmc_v11_0_get_clockgating_state +ffffffff820eecd0 t gmc_v11_0_flush_gpu_tlb +ffffffff820ef1a0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff820ef310 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff820ef4f0 t gmc_v11_0_emit_pasid_mapping +ffffffff820ef570 t gmc_v11_0_map_mtype +ffffffff820ef5c0 t gmc_v11_0_get_vm_pde +ffffffff820ef6c0 t gmc_v11_0_get_vm_pte +ffffffff820ef7a0 t gmc_v11_0_get_vbios_fb_size +ffffffff820ef930 t gmc_v11_0_vm_fault_interrupt_state +ffffffff820efa00 t gmc_v11_0_process_interrupt +ffffffff820efca0 t gmc_v11_0_ecc_interrupt_state +ffffffff820efcd0 t gmc_v11_0_gart_init +ffffffff820f0000 t gmc_v12_0_early_init +ffffffff820f00f0 t gmc_v12_0_late_init +ffffffff820f0170 t gmc_v12_0_sw_init +ffffffff820f0570 t gmc_v12_0_sw_fini +ffffffff820f05f0 t gmc_v12_0_hw_init +ffffffff820f0760 t gmc_v12_0_hw_fini +ffffffff820f0820 t gmc_v12_0_suspend +ffffffff820f08e0 t gmc_v12_0_resume +ffffffff820f0940 t gmc_v12_0_is_idle +ffffffff820f0970 t gmc_v12_0_wait_for_idle +ffffffff820f09a0 t gmc_v12_0_soft_reset +ffffffff820f09d0 t gmc_v12_0_set_clockgating_state +ffffffff820f0a50 t gmc_v12_0_set_powergating_state +ffffffff820f0a80 t gmc_v12_0_get_clockgating_state +ffffffff820f0ac0 t gmc_v12_0_flush_gpu_tlb +ffffffff820f1090 t gmc_v12_0_flush_gpu_tlb_pasid +ffffffff820f1200 t gmc_v12_0_emit_flush_gpu_tlb +ffffffff820f13e0 t gmc_v12_0_emit_pasid_mapping +ffffffff820f1460 t gmc_v12_0_map_mtype +ffffffff820f14a0 t gmc_v12_0_get_vm_pde +ffffffff820f1570 t gmc_v12_0_get_vm_pte +ffffffff820f1690 t gmc_v12_0_get_vbios_fb_size +ffffffff820f16c0 t gmc_v12_0_get_dcc_alignment +ffffffff820f1760 t gmc_v12_0_vm_fault_interrupt_state +ffffffff820f1810 t gmc_v12_0_process_interrupt +ffffffff820f1a80 t gmc_v12_0_ecc_interrupt_state +ffffffff820f1ab0 t gmc_v12_0_gart_init +ffffffff820f2000 t gmc_v7_0_early_init +ffffffff820f20a0 t gmc_v7_0_late_init +ffffffff820f20f0 t gmc_v7_0_sw_init +ffffffff820f2600 t gmc_v7_0_sw_fini +ffffffff820f26b0 t gmc_v7_0_hw_init +ffffffff820f3350 t gmc_v7_0_hw_fini +ffffffff820f3460 t gmc_v7_0_suspend +ffffffff820f34a0 t gmc_v7_0_resume +ffffffff820f3500 t gmc_v7_0_is_idle +ffffffff820f3550 t gmc_v7_0_wait_for_idle +ffffffff820f3600 t gmc_v7_0_soft_reset +ffffffff820f3910 t gmc_v7_0_set_clockgating_state +ffffffff820f3bb0 t gmc_v7_0_set_powergating_state +ffffffff820f3be0 t gmc_v7_0_flush_gpu_tlb +ffffffff820f3c10 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff820f3cc0 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff820f3d70 t gmc_v7_0_emit_pasid_mapping +ffffffff820f3da0 t gmc_v7_0_set_prt +ffffffff820f3fc0 t gmc_v7_0_get_vm_pde +ffffffff820f4020 t gmc_v7_0_get_vm_pte +ffffffff820f4060 t gmc_v7_0_get_vbios_fb_size +ffffffff820f40e0 t gmc_v7_0_vm_fault_interrupt_state +ffffffff820f41e0 t gmc_v7_0_process_interrupt +ffffffff820f4510 t gmc_v7_0_gart_init +ffffffff820f5000 t gmc_v8_0_early_init +ffffffff820f50a0 t gmc_v8_0_late_init +ffffffff820f50f0 t gmc_v8_0_sw_init +ffffffff820f5790 t gmc_v8_0_sw_fini +ffffffff820f5840 t gmc_v8_0_hw_init +ffffffff820f6890 t gmc_v8_0_hw_fini +ffffffff820f69a0 t gmc_v8_0_suspend +ffffffff820f69e0 t gmc_v8_0_resume +ffffffff820f6a40 t gmc_v8_0_is_idle +ffffffff820f6a90 t gmc_v8_0_wait_for_idle +ffffffff820f6b40 t gmc_v8_0_check_soft_reset +ffffffff820f6bc0 t gmc_v8_0_pre_soft_reset +ffffffff820f6d70 t gmc_v8_0_soft_reset +ffffffff820f6e70 t gmc_v8_0_post_soft_reset +ffffffff820f6f00 t gmc_v8_0_set_clockgating_state +ffffffff820f7730 t gmc_v8_0_set_powergating_state +ffffffff820f7760 t gmc_v8_0_get_clockgating_state +ffffffff820f77d0 t gmc_v8_0_flush_gpu_tlb +ffffffff820f7800 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff820f78b0 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff820f7960 t gmc_v8_0_emit_pasid_mapping +ffffffff820f7990 t gmc_v8_0_set_prt +ffffffff820f7bb0 t gmc_v8_0_get_vm_pde +ffffffff820f7c10 t gmc_v8_0_get_vm_pte +ffffffff820f7c60 t gmc_v8_0_get_vbios_fb_size +ffffffff820f7ce0 t gmc_v8_0_vm_fault_interrupt_state +ffffffff820f7de0 t gmc_v8_0_process_interrupt +ffffffff820f8230 t gmc_v8_0_gart_init +ffffffff820f9000 T gmc_v9_0_restore_registers +ffffffff820f9180 t gmc_v9_0_early_init +ffffffff820f95f0 t gmc_v9_0_late_init +ffffffff820f96f0 t gmc_v9_0_sw_init +ffffffff820fa450 t gmc_v9_0_sw_fini +ffffffff820fa550 t gmc_v9_0_hw_init +ffffffff820fab20 t gmc_v9_0_hw_fini +ffffffff820fac20 t gmc_v9_0_suspend +ffffffff820fac60 t gmc_v9_0_resume +ffffffff820facc0 t gmc_v9_0_is_idle +ffffffff820facf0 t gmc_v9_0_wait_for_idle +ffffffff820fad20 t gmc_v9_0_soft_reset +ffffffff820fad50 t gmc_v9_0_set_clockgating_state +ffffffff820fadc0 t gmc_v9_0_set_powergating_state +ffffffff820fadf0 t gmc_v9_0_get_clockgating_state +ffffffff820fae30 t gmc_v9_0_flush_gpu_tlb +ffffffff820fb590 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff820fb710 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff820fb970 t gmc_v9_0_emit_pasid_mapping +ffffffff820fb9f0 t gmc_v9_0_map_mtype +ffffffff820fba30 t gmc_v9_0_get_vm_pde +ffffffff820fbb40 t gmc_v9_0_get_vm_pte +ffffffff820fbe90 t gmc_v9_0_override_vm_pte_flags +ffffffff820fbfa0 t gmc_v9_0_get_vbios_fb_size +ffffffff820fc150 t gmc_v9_0_query_memory_partition +ffffffff820fc1b0 t gmc_v9_0_vm_fault_interrupt_state +ffffffff820fc5d0 t gmc_v9_0_process_interrupt +ffffffff820fcea0 t gmc_v9_0_ecc_interrupt_state +ffffffff820fd050 t gmc_v9_0_gart_init +ffffffff820fd1c0 t gmc_v9_0_save_registers +ffffffff820fe000 t hdp_v4_0_query_ras_error_count +ffffffff820fe0d0 t hdp_v4_0_reset_ras_error_count +ffffffff820fe200 t hdp_v4_0_flush_hdp +ffffffff820fe280 t hdp_v4_0_invalidate_hdp +ffffffff820fe3f0 t hdp_v4_0_update_clock_gating +ffffffff820fe520 t hdp_v4_0_get_clockgating_state +ffffffff820fe5a0 t hdp_v4_0_init_registers +ffffffff820ff000 t hdp_v5_0_flush_hdp +ffffffff820ff080 t hdp_v5_0_invalidate_hdp +ffffffff820ff1c0 t hdp_v5_0_update_clock_gating +ffffffff820ff600 t hdp_v5_0_get_clockgating_state +ffffffff820ff740 t hdp_v5_0_init_registers +ffffffff82100000 t hdp_v5_2_flush_hdp +ffffffff82100090 t hdp_v5_2_update_clock_gating +ffffffff821004e0 t hdp_v5_2_get_clockgating_state +ffffffff82101000 t hdp_v6_0_flush_hdp +ffffffff82101080 t hdp_v6_0_update_clock_gating +ffffffff821014c0 t hdp_v6_0_get_clockgating_state +ffffffff82102000 t hdp_v7_0_flush_hdp +ffffffff82102080 t hdp_v7_0_update_clock_gating +ffffffff821023e0 t hdp_v7_0_get_clockgating_state +ffffffff82103000 t iceland_ih_early_init +ffffffff82103050 t iceland_ih_sw_init +ffffffff821030c0 t iceland_ih_sw_fini +ffffffff82103120 t iceland_ih_hw_init +ffffffff82103410 t iceland_ih_hw_fini +ffffffff82103520 t iceland_ih_suspend +ffffffff82103630 t iceland_ih_resume +ffffffff82103670 t iceland_ih_is_idle +ffffffff821036c0 t iceland_ih_wait_for_idle +ffffffff82103770 t iceland_ih_soft_reset +ffffffff82103890 t iceland_ih_set_clockgating_state +ffffffff821038c0 t iceland_ih_set_powergating_state +ffffffff821038f0 t iceland_ih_get_wptr +ffffffff82103a20 t iceland_ih_decode_iv +ffffffff82103aa0 t iceland_ih_set_rptr +ffffffff82104000 t ih_v6_0_early_init +ffffffff82104050 t ih_v6_0_sw_init +ffffffff82104290 t ih_v6_0_sw_fini +ffffffff821042d0 t ih_v6_0_hw_init +ffffffff82104b40 t ih_v6_0_hw_fini +ffffffff82104bb0 t ih_v6_0_suspend +ffffffff82104c20 t ih_v6_0_resume +ffffffff82104c30 t ih_v6_0_is_idle +ffffffff82104c60 t ih_v6_0_wait_for_idle +ffffffff82104c90 t ih_v6_0_soft_reset +ffffffff82104cc0 t ih_v6_0_set_clockgating_state +ffffffff82104e00 t ih_v6_0_set_powergating_state +ffffffff82104fa0 t ih_v6_0_get_clockgating_state +ffffffff82105040 t ih_v6_0_get_wptr +ffffffff82105180 t ih_v6_0_set_rptr +ffffffff82105260 t ih_v6_0_self_irq +ffffffff821052d0 t ih_v6_0_toggle_interrupts +ffffffff82105530 t force_update_wptr_for_self_int +ffffffff82106000 t ih_v6_1_early_init +ffffffff82106070 t ih_v6_1_sw_init +ffffffff821062b0 t ih_v6_1_sw_fini +ffffffff821062f0 t ih_v6_1_hw_init +ffffffff82106b60 t ih_v6_1_hw_fini +ffffffff82106bd0 t ih_v6_1_suspend +ffffffff82106c40 t ih_v6_1_resume +ffffffff82106c50 t ih_v6_1_is_idle +ffffffff82106c80 t ih_v6_1_wait_for_idle +ffffffff82106cb0 t ih_v6_1_soft_reset +ffffffff82106ce0 t ih_v6_1_set_clockgating_state +ffffffff82106e20 t ih_v6_1_set_powergating_state +ffffffff82106fc0 t ih_v6_1_get_clockgating_state +ffffffff82107060 t ih_v6_1_get_wptr +ffffffff821071a0 t ih_v6_1_set_rptr +ffffffff82107280 t ih_v6_1_self_irq +ffffffff821072f0 t ih_v6_1_toggle_interrupts +ffffffff82107510 t force_update_wptr_for_self_int +ffffffff82108000 t ih_v7_0_early_init +ffffffff82108050 t ih_v7_0_sw_init +ffffffff82108290 t ih_v7_0_sw_fini +ffffffff821082d0 t ih_v7_0_hw_init +ffffffff82108b40 t ih_v7_0_hw_fini +ffffffff82108bb0 t ih_v7_0_suspend +ffffffff82108c20 t ih_v7_0_resume +ffffffff82108c30 t ih_v7_0_is_idle +ffffffff82108c60 t ih_v7_0_wait_for_idle +ffffffff82108c90 t ih_v7_0_soft_reset +ffffffff82108cc0 t ih_v7_0_set_clockgating_state +ffffffff82108e00 t ih_v7_0_set_powergating_state +ffffffff82108fa0 t ih_v7_0_get_clockgating_state +ffffffff82109040 t ih_v7_0_get_wptr +ffffffff82109180 t ih_v7_0_set_rptr +ffffffff82109260 t ih_v7_0_self_irq +ffffffff821092d0 t ih_v7_0_toggle_interrupts +ffffffff821094f0 t force_update_wptr_for_self_int +ffffffff8210a000 t imu_v11_0_init_microcode +ffffffff8210a190 t imu_v11_0_load_microcode +ffffffff8210a560 t imu_v11_0_setup +ffffffff8210a840 t imu_v11_0_start +ffffffff8210a960 t imu_v11_0_program_rlc_ram +ffffffff8210ab40 t imu_v11_0_wait_for_reset_status +ffffffff8210acc0 t program_imu_rlc_ram +ffffffff8210c000 T imu_v11_0_3_program_rlc_ram +ffffffff8210d000 t imu_v12_0_init_microcode +ffffffff8210d180 t imu_v12_0_load_microcode +ffffffff8210d550 t imu_v12_0_setup +ffffffff8210d870 t imu_v12_0_start +ffffffff8210d990 t imu_v12_0_program_rlc_ram +ffffffff8210df40 t imu_v12_0_wait_for_reset_status +ffffffff8210f000 T jpeg_v1_0_early_init +ffffffff8210f050 T jpeg_v1_0_sw_init +ffffffff8210f150 T jpeg_v1_0_sw_fini +ffffffff8210f170 T jpeg_v1_0_start +ffffffff8210fcb0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff8210fd40 t jpeg_v1_0_decode_ring_get_wptr +ffffffff8210fdd0 t jpeg_v1_0_decode_ring_set_wptr +ffffffff8210fe40 t jpeg_v1_dec_ring_parse_cs +ffffffff8210ffb0 t jpeg_v1_0_decode_ring_emit_ib +ffffffff821109d0 t jpeg_v1_0_decode_ring_emit_fence +ffffffff82111420 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff821114a0 t jpeg_v1_0_decode_ring_nop +ffffffff82111600 t jpeg_v1_0_decode_ring_insert_start +ffffffff821117e0 t jpeg_v1_0_decode_ring_insert_end +ffffffff821119c0 t jpeg_v1_0_ring_begin_use +ffffffff82111af0 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff82111d80 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff821121e0 t jpeg_v1_0_set_interrupt_state +ffffffff82112210 t jpeg_v1_0_process_interrupt +ffffffff82113000 T jpeg_v2_0_dec_ring_insert_start +ffffffff821131c0 T jpeg_v2_0_dec_ring_insert_end +ffffffff82113380 T jpeg_v2_0_dec_ring_emit_fence +ffffffff82113af0 T jpeg_v2_0_dec_ring_emit_ib +ffffffff821143d0 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff821147d0 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff82114850 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff82114ab0 T jpeg_v2_0_dec_ring_nop +ffffffff82114c10 T jpeg_v2_dec_ring_parse_cs +ffffffff82114d90 t jpeg_v2_0_early_init +ffffffff82114df0 t jpeg_v2_0_sw_init +ffffffff82114f40 t jpeg_v2_0_sw_fini +ffffffff82114fa0 t jpeg_v2_0_hw_init +ffffffff82114ff0 t jpeg_v2_0_hw_fini +ffffffff821150e0 t jpeg_v2_0_suspend +ffffffff82115110 t jpeg_v2_0_resume +ffffffff821151b0 t jpeg_v2_0_is_idle +ffffffff82115250 t jpeg_v2_0_wait_for_idle +ffffffff82115290 t jpeg_v2_0_set_clockgating_state +ffffffff82115350 t jpeg_v2_0_set_powergating_state +ffffffff82115bc0 t jpeg_v2_0_dec_ring_get_rptr +ffffffff82115c50 t jpeg_v2_0_dec_ring_get_wptr +ffffffff82115d00 t jpeg_v2_0_dec_ring_set_wptr +ffffffff82115da0 t jpeg_v2_0_set_interrupt_state +ffffffff82115dd0 t jpeg_v2_0_process_interrupt +ffffffff82115e70 t jpeg_v2_0_enable_clock_gating +ffffffff82116040 t jpeg_v2_0_disable_clock_gating +ffffffff82117000 t jpeg_v2_6_query_ras_poison_status +ffffffff82117160 t jpeg_v2_5_early_init +ffffffff82117330 t jpeg_v2_5_sw_init +ffffffff821175f0 t jpeg_v2_5_sw_fini +ffffffff82117650 t jpeg_v2_5_hw_init +ffffffff82117740 t jpeg_v2_5_hw_fini +ffffffff821178f0 t jpeg_v2_5_suspend +ffffffff82117920 t jpeg_v2_5_resume +ffffffff82117a20 t jpeg_v2_5_is_idle +ffffffff82117b30 t jpeg_v2_5_wait_for_idle +ffffffff82117bf0 t jpeg_v2_5_set_clockgating_state +ffffffff82117cb0 t jpeg_v2_5_set_powergating_state +ffffffff82118510 t jpeg_v2_5_dec_ring_get_rptr +ffffffff821185b0 t jpeg_v2_5_dec_ring_get_wptr +ffffffff82118660 t jpeg_v2_5_dec_ring_set_wptr +ffffffff82118710 t jpeg_v2_6_dec_ring_insert_start +ffffffff821188f0 t jpeg_v2_6_dec_ring_insert_end +ffffffff82118ad0 t jpeg_v2_5_set_interrupt_state +ffffffff82118b00 t jpeg_v2_5_process_interrupt +ffffffff82118bd0 t jpeg_v2_6_set_ras_interrupt_state +ffffffff82118c00 t jpeg_v2_5_enable_clock_gating +ffffffff82118ce0 t jpeg_v2_5_disable_clock_gating +ffffffff82119000 t jpeg_v3_0_early_init +ffffffff821190f0 t jpeg_v3_0_sw_init +ffffffff82119240 t jpeg_v3_0_sw_fini +ffffffff821192a0 t jpeg_v3_0_hw_init +ffffffff821192f0 t jpeg_v3_0_hw_fini +ffffffff821193e0 t jpeg_v3_0_suspend +ffffffff82119410 t jpeg_v3_0_resume +ffffffff821194b0 t jpeg_v3_0_is_idle +ffffffff82119550 t jpeg_v3_0_wait_for_idle +ffffffff82119590 t jpeg_v3_0_set_clockgating_state +ffffffff82119650 t jpeg_v3_0_set_powergating_state +ffffffff82119fa0 t jpeg_v3_0_dec_ring_get_rptr +ffffffff8211a030 t jpeg_v3_0_dec_ring_get_wptr +ffffffff8211a0e0 t jpeg_v3_0_dec_ring_set_wptr +ffffffff8211a180 t jpeg_v3_0_set_interrupt_state +ffffffff8211a1b0 t jpeg_v3_0_process_interrupt +ffffffff8211a250 t jpeg_v3_0_enable_clock_gating +ffffffff8211a330 t jpeg_v3_0_disable_clock_gating +ffffffff8211b000 t jpeg_v4_0_query_ras_poison_status +ffffffff8211b160 t jpeg_v4_0_early_init +ffffffff8211b1f0 t jpeg_v4_0_sw_init +ffffffff8211b3c0 t jpeg_v4_0_sw_fini +ffffffff8211b420 t jpeg_v4_0_hw_init +ffffffff8211bb50 t jpeg_v4_0_hw_fini +ffffffff8211bc50 t jpeg_v4_0_suspend +ffffffff8211bc80 t jpeg_v4_0_resume +ffffffff8211bce0 t jpeg_v4_0_is_idle +ffffffff8211bd80 t jpeg_v4_0_wait_for_idle +ffffffff8211bdc0 t jpeg_v4_0_set_clockgating_state +ffffffff8211be90 t jpeg_v4_0_set_powergating_state +ffffffff8211c750 t jpeg_v4_0_dec_ring_get_rptr +ffffffff8211c7e0 t jpeg_v4_0_dec_ring_get_wptr +ffffffff8211c890 t jpeg_v4_0_dec_ring_set_wptr +ffffffff8211c930 t jpeg_v4_0_process_interrupt +ffffffff8211c9e0 t jpeg_v4_0_set_ras_interrupt_state +ffffffff8211ca10 t jpeg_v4_0_enable_clock_gating +ffffffff8211cbf0 t jpeg_v4_0_disable_clock_gating +ffffffff8211d000 T jpeg_v4_0_3_dec_ring_insert_start +ffffffff8211d1d0 T jpeg_v4_0_3_dec_ring_insert_end +ffffffff8211d3a0 T jpeg_v4_0_3_dec_ring_emit_fence +ffffffff8211da90 T jpeg_v4_0_3_dec_ring_emit_ib +ffffffff8211e3f0 T jpeg_v4_0_3_dec_ring_emit_reg_wait +ffffffff8211e820 T jpeg_v4_0_3_dec_ring_emit_vm_flush +ffffffff8211e8a0 T jpeg_v4_0_3_dec_ring_emit_wreg +ffffffff8211eb30 T jpeg_v4_0_3_dec_ring_nop +ffffffff8211ec90 t jpeg_v4_0_3_early_init +ffffffff8211ee40 t jpeg_v4_0_3_sw_init +ffffffff8211f190 t jpeg_v4_0_3_sw_fini +ffffffff8211f1f0 t jpeg_v4_0_3_hw_init +ffffffff8211fd20 t jpeg_v4_0_3_hw_fini +ffffffff8211fdd0 t jpeg_v4_0_3_suspend +ffffffff8211fe70 t jpeg_v4_0_3_resume +ffffffff8211fed0 t jpeg_v4_0_3_is_idle +ffffffff821200e0 t jpeg_v4_0_3_wait_for_idle +ffffffff82120250 t jpeg_v4_0_3_set_clockgating_state +ffffffff821202f0 t jpeg_v4_0_3_set_powergating_state +ffffffff821210e0 t jpeg_v4_0_3_dec_ring_get_rptr +ffffffff82121280 t jpeg_v4_0_3_dec_ring_get_wptr +ffffffff82121440 t jpeg_v4_0_3_dec_ring_set_wptr +ffffffff821215f0 t jpeg_v4_0_3_ring_emit_hdp_flush +ffffffff82121620 t jpeg_v4_0_3_set_interrupt_state +ffffffff82121650 t jpeg_v4_0_3_process_interrupt +ffffffff821218f0 t jpeg_v4_0_3_query_ras_error_count +ffffffff82121a10 t jpeg_v4_0_3_reset_ras_error_count +ffffffff82121b20 t jpeg_v4_0_3_disable_clock_gating +ffffffff82122000 t jpeg_v4_0_5_early_init +ffffffff82122110 t jpeg_v4_0_5_sw_init +ffffffff821223c0 t jpeg_v4_0_5_sw_fini +ffffffff82122420 t jpeg_v4_0_5_hw_init +ffffffff821224d0 t jpeg_v4_0_5_hw_fini +ffffffff821225f0 t jpeg_v4_0_5_suspend +ffffffff82122620 t jpeg_v4_0_5_resume +ffffffff821226e0 t jpeg_v4_0_5_is_idle +ffffffff821227f0 t jpeg_v4_0_5_wait_for_idle +ffffffff82122870 t jpeg_v4_0_5_set_clockgating_state +ffffffff82122930 t jpeg_v4_0_5_set_powergating_state +ffffffff82124240 t jpeg_v4_0_5_dec_ring_get_rptr +ffffffff821242e0 t jpeg_v4_0_5_dec_ring_get_wptr +ffffffff821243a0 t jpeg_v4_0_5_dec_ring_set_wptr +ffffffff82124450 t jpeg_v4_0_5_process_interrupt +ffffffff82124560 t jpeg_v4_0_5_enable_clock_gating +ffffffff82124750 t jpeg_v4_0_5_disable_clock_gating +ffffffff82124940 t jpeg_engine_4_0_5_dpg_clock_gating_mode +ffffffff82125000 t jpeg_v5_0_0_early_init +ffffffff82125060 t jpeg_v5_0_0_sw_init +ffffffff821251b0 t jpeg_v5_0_0_sw_fini +ffffffff82125210 t jpeg_v5_0_0_hw_init +ffffffff82125290 t jpeg_v5_0_0_hw_fini +ffffffff82125390 t jpeg_v5_0_0_suspend +ffffffff821253c0 t jpeg_v5_0_0_resume +ffffffff82125470 t jpeg_v5_0_0_is_idle +ffffffff82125510 t jpeg_v5_0_0_wait_for_idle +ffffffff82125550 t jpeg_v5_0_0_set_clockgating_state +ffffffff82125620 t jpeg_v5_0_0_set_powergating_state +ffffffff82126870 t jpeg_v5_0_0_dec_ring_get_rptr +ffffffff82126900 t jpeg_v5_0_0_dec_ring_get_wptr +ffffffff821269b0 t jpeg_v5_0_0_dec_ring_set_wptr +ffffffff82126a50 t jpeg_v5_0_0_set_interrupt_state +ffffffff82126a80 t jpeg_v5_0_0_process_interrupt +ffffffff82126b30 t jpeg_v5_0_0_enable_clock_gating +ffffffff82126d00 t jpeg_v5_0_0_disable_clock_gating +ffffffff82126e60 t jpeg_v5_0_0_enable_power_gating +ffffffff82126f40 t jpeg_engine_5_0_0_dpg_clock_gating_mode +ffffffff82128000 t lsdma_v6_0_copy_mem +ffffffff821283e0 t lsdma_v6_0_fill_mem +ffffffff82128740 t lsdma_v6_0_update_memory_power_gating +ffffffff82129000 t lsdma_v7_0_copy_mem +ffffffff821293e0 t lsdma_v7_0_fill_mem +ffffffff82129740 t lsdma_v7_0_update_memory_power_gating +ffffffff8212a000 t mca_v3_0_ras_block_match +ffffffff8212a050 t mca_v3_0_mp0_query_ras_error_count +ffffffff8212a070 t mca_v3_0_mp1_query_ras_error_count +ffffffff8212a090 t mca_v3_0_mpio_query_ras_error_count +ffffffff8212b000 t mes_v11_0_early_init +ffffffff8212b070 t mes_v11_0_late_init +ffffffff8212b0f0 t mes_v11_0_sw_init +ffffffff8212b6e0 t mes_v11_0_sw_fini +ffffffff8212b9a0 t mes_v11_0_hw_init +ffffffff8212bf80 t mes_v11_0_hw_fini +ffffffff8212bfe0 t mes_v11_0_suspend +ffffffff8212c060 t mes_v11_0_resume +ffffffff8212c0c0 t mes_v11_0_kiq_hw_init +ffffffff8212c4f0 t mes_v11_0_kiq_hw_fini +ffffffff8212c650 t mes_v11_0_add_hw_queue +ffffffff8212c860 t mes_v11_0_remove_hw_queue +ffffffff8212c900 t mes_v11_0_map_legacy_queue +ffffffff8212c9f0 t mes_v11_0_unmap_legacy_queue +ffffffff8212cb10 t mes_v11_0_suspend_gang +ffffffff8212cbd0 t mes_v11_0_resume_gang +ffffffff8212cc70 t mes_v11_0_misc_op +ffffffff8212ce30 t mes_v11_0_reset_legacy_queue +ffffffff8212cf80 t mes_v11_0_reset_hw_queue +ffffffff8212d050 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff8212d5d0 t mes_v11_0_reset_queue_mmio +ffffffff8212db80 t mes_v11_0_load_microcode +ffffffff8212e560 t mes_v11_0_enable +ffffffff8212eb20 t mes_v11_0_queue_init +ffffffff8212f630 t amdgpu_bo_unreserve +ffffffff8212f740 t mes_v11_0_mqd_init +ffffffff8212f960 t mes_v11_0_kiq_dequeue +ffffffff8212fe50 t mes_v11_0_ring_get_rptr +ffffffff8212fe80 t mes_v11_0_ring_get_wptr +ffffffff8212fef0 t mes_v11_0_ring_set_wptr +ffffffff82130000 t mes_v12_0_early_init +ffffffff82130070 t mes_v12_0_late_init +ffffffff821300e0 t mes_v12_0_sw_init +ffffffff82130620 t mes_v12_0_sw_fini +ffffffff82130950 t mes_v12_0_hw_init +ffffffff82131150 t mes_v12_0_hw_fini +ffffffff82131180 t mes_v12_0_suspend +ffffffff82131190 t mes_v12_0_resume +ffffffff821311f0 t mes_v12_0_kiq_hw_init +ffffffff821313c0 t mes_v12_0_kiq_hw_fini +ffffffff82131910 t mes_v12_0_add_hw_queue +ffffffff82131b00 t mes_v12_0_remove_hw_queue +ffffffff82131ba0 t mes_v12_0_map_legacy_queue +ffffffff82131cb0 t mes_v12_0_unmap_legacy_queue +ffffffff82131de0 t mes_v12_0_suspend_gang +ffffffff82131e10 t mes_v12_0_resume_gang +ffffffff82131e40 t mes_v12_0_misc_op +ffffffff82132020 t mes_v12_0_reset_legacy_queue +ffffffff82132170 t mes_v12_0_reset_hw_queue +ffffffff82132220 t mes_v12_0_submit_pkt_and_poll_completion +ffffffff82132820 t mes_v12_0_kiq_setting +ffffffff821329b0 t mes_v12_0_load_microcode +ffffffff821331b0 t mes_v12_0_set_ucode_start_addr +ffffffff82133380 t mes_v12_0_enable +ffffffff82133900 t mes_v12_0_queue_init +ffffffff821347b0 t mes_v12_0_set_hw_resources +ffffffff82134a40 t amdgpu_bo_unreserve +ffffffff82134b50 t mes_v12_0_ring_get_rptr +ffffffff82134b80 t mes_v12_0_ring_get_wptr +ffffffff82134bf0 t mes_v12_0_ring_set_wptr +ffffffff82135000 t mmhub_v1_0_query_ras_error_count +ffffffff82135160 t mmhub_v1_0_reset_ras_error_count +ffffffff82135230 t mmhub_v1_0_get_fb_location +ffffffff82135360 t mmhub_v1_0_init +ffffffff82135410 t mmhub_v1_0_gart_enable +ffffffff821369f0 t mmhub_v1_0_set_fault_enable_default +ffffffff82136b10 t mmhub_v1_0_gart_disable +ffffffff82136de0 t mmhub_v1_0_set_clockgating +ffffffff821372d0 t mmhub_v1_0_get_clockgating +ffffffff82137410 t mmhub_v1_0_setup_vm_pt_regs +ffffffff82137560 t mmhub_v1_0_update_power_gating +ffffffff82138000 t mmhub_v1_7_query_ras_error_count +ffffffff82138160 t mmhub_v1_7_query_ras_error_status +ffffffff82138270 t mmhub_v1_7_reset_ras_error_count +ffffffff82138330 t mmhub_v1_7_reset_ras_error_status +ffffffff82138450 t mmhub_v1_7_get_fb_location +ffffffff82138580 t mmhub_v1_7_init +ffffffff82138620 t mmhub_v1_7_gart_enable +ffffffff82139e20 t mmhub_v1_7_set_fault_enable_default +ffffffff82139f40 t mmhub_v1_7_gart_disable +ffffffff8213a210 t mmhub_v1_7_set_clockgating +ffffffff8213a5f0 t mmhub_v1_7_get_clockgating +ffffffff8213a730 t mmhub_v1_7_setup_vm_pt_regs +ffffffff8213b000 t mmhub_v1_8_get_fb_location +ffffffff8213b130 t mmhub_v1_8_init +ffffffff8213b2b0 t mmhub_v1_8_gart_enable +ffffffff8213d2e0 t mmhub_v1_8_set_fault_enable_default +ffffffff8213d4d0 t mmhub_v1_8_gart_disable +ffffffff8213d870 t mmhub_v1_8_set_clockgating +ffffffff8213d8a0 t mmhub_v1_8_get_clockgating +ffffffff8213d8d0 t mmhub_v1_8_setup_vm_pt_regs +ffffffff8213db10 t mmhub_v1_8_ras_late_init +ffffffff8213dbc0 t mmhub_v1_8_aca_bank_parser +ffffffff8213dc70 t mmhub_v1_8_aca_bank_is_valid +ffffffff8213dce0 t mmhub_v1_8_query_ras_error_count +ffffffff8213dee0 t mmhub_v1_8_reset_ras_error_count +ffffffff8213f000 t mmhub_v2_0_init +ffffffff8213f0d0 t mmhub_v2_0_gart_enable +ffffffff821404f0 t mmhub_v2_0_set_fault_enable_default +ffffffff82140610 t mmhub_v2_0_gart_disable +ffffffff821408e0 t mmhub_v2_0_set_clockgating +ffffffff82140ce0 t mmhub_v2_0_get_clockgating +ffffffff82140eb0 t mmhub_v2_0_setup_vm_pt_regs +ffffffff82141010 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff821412b0 t mmhub_v2_0_get_invalidate_req +ffffffff82142000 t mmhub_v2_3_init +ffffffff821420e0 t mmhub_v2_3_gart_enable +ffffffff82143780 t mmhub_v2_3_set_fault_enable_default +ffffffff82143880 t mmhub_v2_3_gart_disable +ffffffff82143b60 t mmhub_v2_3_set_clockgating +ffffffff82144070 t mmhub_v2_3_get_clockgating +ffffffff82144290 t mmhub_v2_3_setup_vm_pt_regs +ffffffff821443e0 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff82144640 t mmhub_v2_3_get_invalidate_req +ffffffff82145000 t mmhub_v3_0_get_fb_location +ffffffff821450a0 t mmhub_v3_0_get_mc_fb_offset +ffffffff82145140 t mmhub_v3_0_init +ffffffff82145220 t mmhub_v3_0_gart_enable +ffffffff821466a0 t mmhub_v3_0_set_fault_enable_default +ffffffff821467c0 t mmhub_v3_0_gart_disable +ffffffff82146a90 t mmhub_v3_0_set_clockgating +ffffffff82146c80 t mmhub_v3_0_get_clockgating +ffffffff82146d40 t mmhub_v3_0_setup_vm_pt_regs +ffffffff82146e90 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff821470e0 t mmhub_v3_0_get_invalidate_req +ffffffff82148000 t mmhub_v3_0_1_get_fb_location +ffffffff821480a0 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff82148140 t mmhub_v3_0_1_init +ffffffff82148210 t mmhub_v3_0_1_gart_enable +ffffffff821497b0 t mmhub_v3_0_1_set_fault_enable_default +ffffffff821498b0 t mmhub_v3_0_1_gart_disable +ffffffff82149b90 t mmhub_v3_0_1_set_clockgating +ffffffff82149d80 t mmhub_v3_0_1_get_clockgating +ffffffff82149e40 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff82149f90 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff8214a1e0 t mmhub_v3_0_1_get_invalidate_req +ffffffff8214b000 t mmhub_v3_0_2_get_fb_location +ffffffff8214b0a0 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff8214b140 t mmhub_v3_0_2_init +ffffffff8214b210 t mmhub_v3_0_2_gart_enable +ffffffff8214c670 t mmhub_v3_0_2_set_fault_enable_default +ffffffff8214c790 t mmhub_v3_0_2_gart_disable +ffffffff8214ca60 t mmhub_v3_0_2_set_clockgating +ffffffff8214ca90 t mmhub_v3_0_2_get_clockgating +ffffffff8214cac0 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff8214cc10 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff8214ce40 t mmhub_v3_0_2_get_invalidate_req +ffffffff8214d000 t mmhub_v3_3_get_fb_location +ffffffff8214d0a0 t mmhub_v3_3_get_mc_fb_offset +ffffffff8214d140 t mmhub_v3_3_init +ffffffff8214d210 t mmhub_v3_3_gart_enable +ffffffff8214edb0 t mmhub_v3_3_set_fault_enable_default +ffffffff8214eeb0 t mmhub_v3_3_gart_disable +ffffffff8214f190 t mmhub_v3_3_set_clockgating +ffffffff8214f380 t mmhub_v3_3_get_clockgating +ffffffff8214f440 t mmhub_v3_3_setup_vm_pt_regs +ffffffff8214f590 t mmhub_v3_3_print_l2_protection_fault_status +ffffffff8214f800 t mmhub_v3_3_get_invalidate_req +ffffffff82150000 t mmhub_v4_1_0_get_fb_location +ffffffff821500a0 t mmhub_v4_1_0_get_mc_fb_offset +ffffffff82150140 t mmhub_v4_1_0_init +ffffffff82150220 t mmhub_v4_1_0_gart_enable +ffffffff82151680 t mmhub_v4_1_0_set_fault_enable_default +ffffffff821517a0 t mmhub_v4_1_0_gart_disable +ffffffff82151a70 t mmhub_v4_1_0_set_clockgating +ffffffff82151c50 t mmhub_v4_1_0_get_clockgating +ffffffff82151c80 t mmhub_v4_1_0_setup_vm_pt_regs +ffffffff82151dd0 t mmhub_v4_1_0_print_l2_protection_fault_status +ffffffff82152020 t mmhub_v4_1_0_get_invalidate_req +ffffffff82153000 t mmhub_v9_4_query_ras_error_count +ffffffff82153160 t mmhub_v9_4_query_ras_error_status +ffffffff82153270 t mmhub_v9_4_reset_ras_error_count +ffffffff82153350 t mmhub_v9_4_get_fb_location +ffffffff82153480 t mmhub_v9_4_init +ffffffff821535d0 t mmhub_v9_4_gart_enable +ffffffff82154c80 t mmhub_v9_4_set_fault_enable_default +ffffffff82154e90 t mmhub_v9_4_gart_disable +ffffffff82155230 t mmhub_v9_4_set_clockgating +ffffffff82155770 t mmhub_v9_4_get_clockgating +ffffffff821558b0 t mmhub_v9_4_setup_vm_pt_regs +ffffffff82155900 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff82156000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff82156050 T xgpu_ai_mailbox_add_irq_id +ffffffff82156100 T xgpu_ai_mailbox_get_irq +ffffffff821561d0 t xgpu_ai_mailbox_flr_work +ffffffff821562b0 T xgpu_ai_mailbox_put_irq +ffffffff821562f0 t xgpu_ai_request_full_gpu_access +ffffffff82156310 t xgpu_ai_release_full_gpu_access +ffffffff82156330 t xgpu_ai_request_init_data +ffffffff821563a0 t xgpu_ai_request_reset +ffffffff821564a0 t xgpu_ai_ready_to_reset +ffffffff821564c0 t xgpu_ai_wait_reset +ffffffff82156650 t xgpu_ai_mailbox_trans_msg +ffffffff82156980 t xgpu_ai_ras_poison_handler +ffffffff821569b0 t xgpu_ai_rcvd_ras_intr +ffffffff82156a10 t xgpu_ai_set_mailbox_ack_irq +ffffffff82156ab0 t xgpu_ai_mailbox_ack_irq +ffffffff82156ae0 t xgpu_ai_set_mailbox_rcv_irq +ffffffff82156b80 t xgpu_ai_mailbox_rcv_irq +ffffffff82156c70 t xgpu_ai_send_access_requests +ffffffff82156db0 t xgpu_ai_poll_msg +ffffffff82157000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff82157050 T xgpu_nv_mailbox_add_irq_id +ffffffff82157100 T xgpu_nv_mailbox_get_irq +ffffffff821571d0 t xgpu_nv_mailbox_flr_work +ffffffff821572e0 T xgpu_nv_mailbox_put_irq +ffffffff82157320 t xgpu_nv_request_full_gpu_access +ffffffff82157340 t xgpu_nv_release_full_gpu_access +ffffffff82157360 t xgpu_nv_request_init_data +ffffffff82157380 t xgpu_nv_request_reset +ffffffff82157500 t xgpu_nv_ready_to_reset +ffffffff82157520 t xgpu_nv_wait_reset +ffffffff821576b0 t xgpu_nv_mailbox_trans_msg +ffffffff82157960 t xgpu_nv_ras_poison_handler +ffffffff821579b0 t xgpu_nv_rcvd_ras_intr +ffffffff82157a10 t xgpu_nv_set_mailbox_ack_irq +ffffffff82157aa0 t xgpu_nv_mailbox_ack_irq +ffffffff82157ad0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff82157b60 t xgpu_nv_mailbox_rcv_irq +ffffffff82157c20 t xgpu_nv_send_access_requests_with_param +ffffffff82159000 T xgpu_vi_init_golden_registers +ffffffff821590f0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff82159140 T xgpu_vi_mailbox_add_irq_id +ffffffff821591f0 T xgpu_vi_mailbox_get_irq +ffffffff821592c0 t xgpu_vi_mailbox_flr_work +ffffffff82159370 T xgpu_vi_mailbox_put_irq +ffffffff821593b0 t xgpu_vi_request_full_gpu_access +ffffffff821593d0 t xgpu_vi_release_full_gpu_access +ffffffff821593f0 t xgpu_vi_request_reset +ffffffff82159410 t xgpu_vi_wait_reset_cmpl +ffffffff82159550 t xgpu_vi_set_mailbox_ack_irq +ffffffff821595e0 t xgpu_vi_mailbox_ack_irq +ffffffff82159630 t xgpu_vi_set_mailbox_rcv_irq +ffffffff821596c0 t xgpu_vi_mailbox_rcv_irq +ffffffff82159780 t xgpu_vi_mailbox_rcv_msg +ffffffff821598e0 t xgpu_vi_send_access_requests +ffffffff8215a000 t navi10_ih_early_init +ffffffff8215a060 t navi10_ih_sw_init +ffffffff8215a1f0 t navi10_ih_sw_fini +ffffffff8215a230 t navi10_ih_hw_init +ffffffff8215a720 t navi10_ih_hw_fini +ffffffff8215a790 t navi10_ih_suspend +ffffffff8215a800 t navi10_ih_resume +ffffffff8215a810 t navi10_ih_is_idle +ffffffff8215a840 t navi10_ih_wait_for_idle +ffffffff8215a870 t navi10_ih_soft_reset +ffffffff8215a8a0 t navi10_ih_set_clockgating_state +ffffffff8215a9e0 t navi10_ih_set_powergating_state +ffffffff8215aa10 t navi10_ih_get_clockgating_state +ffffffff8215aab0 t navi10_ih_get_wptr +ffffffff8215ac10 t navi10_ih_set_rptr +ffffffff8215ad00 t navi10_ih_self_irq +ffffffff8215ad80 t navi10_ih_toggle_interrupts +ffffffff8215af10 t force_update_wptr_for_self_int +ffffffff8215c000 t nbif_v6_3_1_get_hdp_flush_req_offset +ffffffff8215c040 t nbif_v6_3_1_get_hdp_flush_done_offset +ffffffff8215c080 t nbif_v6_3_1_get_pcie_index_offset +ffffffff8215c0b0 t nbif_v6_3_1_get_pcie_data_offset +ffffffff8215c0f0 t nbif_v6_3_1_get_rev_id +ffffffff8215c190 t nbif_v6_3_1_mc_access_enable +ffffffff8215c240 t nbif_v6_3_1_get_memsize +ffffffff8215c2b0 t nbif_v6_3_1_sdma_doorbell_range +ffffffff8215c430 t nbif_v6_3_1_vcn_doorbell_range +ffffffff8215c5f0 t nbif_v6_3_1_gc_doorbell_init +ffffffff8215c700 t nbif_v6_3_1_enable_doorbell_aperture +ffffffff8215c810 t nbif_v6_3_1_enable_doorbell_selfring_aperture +ffffffff8215c990 t nbif_v6_3_1_ih_doorbell_range +ffffffff8215cac0 t nbif_v6_3_1_update_medium_grain_clock_gating +ffffffff8215caf0 t nbif_v6_3_1_update_medium_grain_light_sleep +ffffffff8215cb20 t nbif_v6_3_1_get_clockgating_state +ffffffff8215cb50 t nbif_v6_3_1_ih_control +ffffffff8215ccc0 t nbif_v6_3_1_init_registers +ffffffff8215cdb0 t nbif_v6_3_1_remap_hdp_registers +ffffffff8215ced0 t nbif_v6_3_1_program_aspm +ffffffff8215dbc0 t nbif_v6_3_1_get_rom_offset +ffffffff8215dc60 t nbif_v6_3_1_set_reg_remap +ffffffff8215dcd0 t nbif_v6_3_1_sriov_sdma_doorbell_range +ffffffff8215dd00 t nbif_v6_3_1_sriov_vcn_doorbell_range +ffffffff8215dd30 t nbif_v6_3_1_sriov_gc_doorbell_init +ffffffff8215dd60 t nbif_v6_3_1_sriov_ih_doorbell_range +ffffffff8215dd90 t pcie_capability_set_word +ffffffff8215e000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff8215e040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff8215e080 t nbio_v2_3_get_pcie_index_offset +ffffffff8215e0c0 t nbio_v2_3_get_pcie_data_offset +ffffffff8215e100 t nbio_v2_3_get_rev_id +ffffffff8215e160 t nbio_v2_3_mc_access_enable +ffffffff8215e210 t nbio_v2_3_get_memsize +ffffffff8215e280 t nbio_v2_3_sdma_doorbell_range +ffffffff8215e330 t nbio_v2_3_vcn_doorbell_range +ffffffff8215e3c0 t nbio_v2_3_enable_doorbell_aperture +ffffffff8215e4d0 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff8215e650 t nbio_v2_3_ih_doorbell_range +ffffffff8215e780 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff8215e830 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff8215e8e0 t nbio_v2_3_get_clockgating_state +ffffffff8215e970 t nbio_v2_3_ih_control +ffffffff8215eae0 t nbio_v2_3_init_registers +ffffffff8215eb70 t nbio_v2_3_remap_hdp_registers +ffffffff8215ec90 t nbio_v2_3_enable_aspm +ffffffff8215ed30 t nbio_v2_3_program_aspm +ffffffff8215f4b0 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff8215f550 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff8215f5d0 t nbio_v2_3_clear_doorbell_interrupt +ffffffff8215f7a0 t nbio_v2_3_set_reg_remap +ffffffff82160000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff82160040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff82160080 t nbio_v4_3_get_pcie_index_offset +ffffffff821600b0 t nbio_v4_3_get_pcie_data_offset +ffffffff821600f0 t nbio_v4_3_get_rev_id +ffffffff82160190 t nbio_v4_3_mc_access_enable +ffffffff82160240 t nbio_v4_3_get_memsize +ffffffff821602b0 t nbio_v4_3_sdma_doorbell_range +ffffffff82160430 t nbio_v4_3_vcn_doorbell_range +ffffffff821605f0 t nbio_v4_3_gc_doorbell_init +ffffffff82160700 t nbio_v4_3_enable_doorbell_aperture +ffffffff82160810 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff82160990 t nbio_v4_3_ih_doorbell_range +ffffffff82160ac0 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff82160c10 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff82160d50 t nbio_v4_3_get_clockgating_state +ffffffff82160e90 t nbio_v4_3_ih_control +ffffffff82161000 t nbio_v4_3_init_registers +ffffffff82161120 t nbio_v4_3_remap_hdp_registers +ffffffff82161240 t nbio_v4_3_program_aspm +ffffffff82162080 t nbio_v4_3_get_rom_offset +ffffffff82162120 t nbio_v4_3_set_reg_remap +ffffffff82162190 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff821621c0 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff821621f0 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff82162220 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff82162250 t nbio_v4_3_handle_ras_err_event_athub_intr_no_bifring +ffffffff82162390 t nbio_v4_3_init_ras_err_event_athub_interrupt +ffffffff821623d0 t nbio_v4_3_set_ras_err_event_athub_irq_state +ffffffff821624f0 t nbio_v4_3_process_err_event_athub_irq +ffffffff82163000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff82163040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff82163080 t nbio_v6_1_get_pcie_index_offset +ffffffff821630c0 t nbio_v6_1_get_pcie_data_offset +ffffffff82163100 t nbio_v6_1_get_rev_id +ffffffff821631a0 t nbio_v6_1_mc_access_enable +ffffffff82163250 t nbio_v6_1_get_memsize +ffffffff821632c0 t nbio_v6_1_sdma_doorbell_range +ffffffff82163360 t nbio_v6_1_enable_doorbell_aperture +ffffffff82163470 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff821635f0 t nbio_v6_1_ih_doorbell_range +ffffffff82163720 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff821637d0 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff82163880 t nbio_v6_1_get_clockgating_state +ffffffff82163910 t nbio_v6_1_ih_control +ffffffff82163a80 t nbio_v6_1_init_registers +ffffffff82163b50 t nbio_v6_1_remap_hdp_registers +ffffffff82163c70 t nbio_v6_1_program_aspm +ffffffff82164110 t nbio_v6_1_set_reg_remap +ffffffff82165000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff82165040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff82165080 t nbio_v7_0_get_pcie_index_offset +ffffffff821650c0 t nbio_v7_0_get_pcie_data_offset +ffffffff82165100 t nbio_v7_0_get_rev_id +ffffffff821651a0 t nbio_v7_0_mc_access_enable +ffffffff82165250 t nbio_v7_0_get_memsize +ffffffff821652c0 t nbio_v7_0_sdma_doorbell_range +ffffffff82165360 t nbio_v7_0_vcn_doorbell_range +ffffffff821653e0 t nbio_v7_0_enable_doorbell_aperture +ffffffff821654f0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff82165520 t nbio_v7_0_ih_doorbell_range +ffffffff82165650 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff82165790 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff82165840 t nbio_v7_0_get_clockgating_state +ffffffff821658d0 t nbio_v7_0_ih_control +ffffffff82165a40 t nbio_v7_0_init_registers +ffffffff82165b60 t nbio_v7_0_remap_hdp_registers +ffffffff82165c80 t nbio_v7_0_set_reg_remap +ffffffff82165cf0 t nbio_7_0_read_syshub_ind_mmr +ffffffff82165dd0 t nbio_7_0_write_syshub_ind_mmr +ffffffff82166000 t nbio_v7_11_get_hdp_flush_req_offset +ffffffff82166040 t nbio_v7_11_get_hdp_flush_done_offset +ffffffff82166080 t nbio_v7_11_get_pcie_index_offset +ffffffff821660c0 t nbio_v7_11_get_pcie_data_offset +ffffffff82166100 t nbio_v7_11_get_pcie_port_index_offset +ffffffff82166130 t nbio_v7_11_get_pcie_port_data_offset +ffffffff82166170 t nbio_v7_11_get_rev_id +ffffffff82166210 t nbio_v7_11_mc_access_enable +ffffffff821662c0 t nbio_v7_11_get_memsize +ffffffff82166330 t nbio_v7_11_sdma_doorbell_range +ffffffff821663d0 t nbio_v7_11_vpe_doorbell_range +ffffffff82166480 t nbio_v7_11_vcn_doorbell_range +ffffffff82166520 t nbio_v7_11_enable_doorbell_aperture +ffffffff82166610 t nbio_v7_11_enable_doorbell_selfring_aperture +ffffffff82166790 t nbio_v7_11_ih_doorbell_range +ffffffff821668c0 t nbio_v7_11_update_medium_grain_clock_gating +ffffffff82166a00 t nbio_v7_11_update_medium_grain_light_sleep +ffffffff82166c20 t nbio_v7_11_get_clockgating_state +ffffffff82166d60 t nbio_v7_11_ih_control +ffffffff82166ed0 t nbio_v7_11_init_registers +ffffffff821670d0 t nbio_v7_11_remap_hdp_registers +ffffffff821671f0 t nbio_v7_11_set_reg_remap +ffffffff82168000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff82168040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff82168080 t nbio_v7_2_get_pcie_index_offset +ffffffff821680c0 t nbio_v7_2_get_pcie_data_offset +ffffffff82168100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff82168130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff82168170 t nbio_v7_2_get_rev_id +ffffffff82168260 t nbio_v7_2_mc_access_enable +ffffffff821683b0 t nbio_v7_2_get_memsize +ffffffff82168420 t nbio_v7_2_sdma_doorbell_range +ffffffff821684c0 t nbio_v7_2_vcn_doorbell_range +ffffffff82168550 t nbio_v7_2_enable_doorbell_aperture +ffffffff82168640 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff821687c0 t nbio_v7_2_ih_doorbell_range +ffffffff82168850 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff82168910 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff82168ac0 t nbio_v7_2_get_clockgating_state +ffffffff82168b60 t nbio_v7_2_ih_control +ffffffff82168cd0 t nbio_v7_2_init_registers +ffffffff82168ea0 t nbio_v7_2_remap_hdp_registers +ffffffff82168fc0 t nbio_v7_2_set_reg_remap +ffffffff8216a000 t nbio_v7_4_query_ras_error_count +ffffffff8216a1d0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff8216a460 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff8216a630 t nbio_v7_4_init_ras_controller_interrupt +ffffffff8216a670 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff8216a6b0 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff8216a6f0 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff8216a730 t nbio_v7_4_get_pcie_index_offset +ffffffff8216a770 t nbio_v7_4_get_pcie_data_offset +ffffffff8216a7b0 t nbio_v7_4_get_rev_id +ffffffff8216a890 t nbio_v7_4_mc_access_enable +ffffffff8216a940 t nbio_v7_4_get_memsize +ffffffff8216a9b0 t nbio_v7_4_sdma_doorbell_range +ffffffff8216aa80 t nbio_v7_4_vcn_doorbell_range +ffffffff8216ab30 t nbio_v7_4_enable_doorbell_aperture +ffffffff8216ac40 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff8216adc0 t nbio_v7_4_ih_doorbell_range +ffffffff8216aef0 t nbio_v7_4_enable_doorbell_interrupt +ffffffff8216b050 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff8216b080 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff8216b130 t nbio_v7_4_get_clockgating_state +ffffffff8216b1c0 t nbio_v7_4_ih_control +ffffffff8216b330 t nbio_v7_4_init_registers +ffffffff8216b410 t nbio_v7_4_remap_hdp_registers +ffffffff8216b530 t nbio_v7_4_program_aspm +ffffffff8216b9e0 t nbio_v7_4_set_reg_remap +ffffffff8216ba50 t nbio_v7_4_set_ras_controller_irq_state +ffffffff8216bc00 t nbio_v7_4_process_ras_controller_irq +ffffffff8216bc30 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff8216bde0 t nbio_v7_4_process_err_event_athub_irq +ffffffff8216c000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff8216c040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff8216c080 t nbio_v7_7_get_pcie_index_offset +ffffffff8216c0c0 t nbio_v7_7_get_pcie_data_offset +ffffffff8216c100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff8216c130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff8216c170 t nbio_v7_7_get_rev_id +ffffffff8216c210 t nbio_v7_7_mc_access_enable +ffffffff8216c2c0 t nbio_v7_7_get_memsize +ffffffff8216c330 t nbio_v7_7_sdma_doorbell_range +ffffffff8216c3d0 t nbio_v7_7_vcn_doorbell_range +ffffffff8216c460 t nbio_v7_7_enable_doorbell_aperture +ffffffff8216c550 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff8216c6d0 t nbio_v7_7_ih_doorbell_range +ffffffff8216c800 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff8216c940 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff8216cb60 t nbio_v7_7_get_clockgating_state +ffffffff8216cca0 t nbio_v7_7_ih_control +ffffffff8216ce10 t nbio_v7_7_init_registers +ffffffff8216d010 t nbio_v7_7_remap_hdp_registers +ffffffff8216d130 t nbio_v7_7_set_reg_remap +ffffffff8216e000 t nbio_v7_9_get_hdp_flush_req_offset +ffffffff8216e040 t nbio_v7_9_get_hdp_flush_done_offset +ffffffff8216e080 t nbio_v7_9_get_pcie_index_offset +ffffffff8216e0c0 t nbio_v7_9_get_pcie_data_offset +ffffffff8216e100 t nbio_v7_9_get_pcie_index_hi_offset +ffffffff8216e140 t nbio_v7_9_get_rev_id +ffffffff8216e1b0 t nbio_v7_9_mc_access_enable +ffffffff8216e260 t nbio_v7_9_get_memsize +ffffffff8216e2d0 t nbio_v7_9_sdma_doorbell_range +ffffffff8216e650 t nbio_v7_9_vcn_doorbell_range +ffffffff8216e810 t nbio_v7_9_enable_doorbell_aperture +ffffffff8216e9a0 t nbio_v7_9_enable_doorbell_selfring_aperture +ffffffff8216eb20 t nbio_v7_9_ih_doorbell_range +ffffffff8216ec40 t nbio_v7_9_enable_doorbell_interrupt +ffffffff8216ed60 t nbio_v7_9_update_medium_grain_clock_gating +ffffffff8216ed90 t nbio_v7_9_update_medium_grain_light_sleep +ffffffff8216edc0 t nbio_v7_9_get_clockgating_state +ffffffff8216edf0 t nbio_v7_9_ih_control +ffffffff8216ef60 t nbio_v7_9_init_registers +ffffffff8216f2e0 t nbio_v7_9_remap_hdp_registers +ffffffff8216f400 t nbio_v7_9_get_compute_partition_mode +ffffffff8216f4a0 t nbio_v7_9_get_memory_partition_mode +ffffffff8216f5a0 t nbio_v7_9_get_pcie_replay_count +ffffffff8216f600 t nbio_v7_9_set_reg_remap +ffffffff8216f670 t nbio_v7_9_query_ras_error_count +ffffffff8216f6a0 t nbio_v7_9_handle_ras_controller_intr_no_bifring +ffffffff8216f880 t nbio_v7_9_handle_ras_err_event_athub_intr_no_bifring +ffffffff8216f9c0 t nbio_v7_9_init_ras_controller_interrupt +ffffffff8216fa00 t nbio_v7_9_init_ras_err_event_athub_interrupt +ffffffff8216fa40 t nbio_v7_9_set_ras_controller_irq_state +ffffffff8216fa70 t nbio_v7_9_process_ras_controller_irq +ffffffff8216faa0 t nbio_v7_9_set_ras_err_event_athub_irq_state +ffffffff8216fad0 t nbio_v7_9_process_err_event_athub_irq +ffffffff82170000 T nv_grbm_select +ffffffff821700a0 T nv_set_virt_ops +ffffffff821700e0 t nv_common_early_init +ffffffff821704f0 t nv_common_late_init +ffffffff821705b0 t nv_common_sw_init +ffffffff82170600 t nv_common_sw_fini +ffffffff82170630 t nv_common_hw_init +ffffffff82170740 t nv_common_hw_fini +ffffffff821707b0 t nv_common_suspend +ffffffff82170820 t nv_common_resume +ffffffff82170930 t nv_common_is_idle +ffffffff82170960 t nv_common_wait_for_idle +ffffffff82170990 t nv_common_soft_reset +ffffffff821709c0 t nv_common_set_clockgating_state +ffffffff82170af0 t nv_common_set_powergating_state +ffffffff82170b20 t nv_common_get_clockgating_state +ffffffff82170ba0 t nv_didt_rreg +ffffffff82170c60 t nv_didt_wreg +ffffffff82170d00 t nv_read_disabled_bios +ffffffff82170d30 t nv_read_register +ffffffff82170e30 t nv_asic_reset +ffffffff82170fc0 t nv_asic_reset_method +ffffffff82171100 t nv_get_xclk +ffffffff82171130 t nv_set_uvd_clocks +ffffffff82171160 t nv_set_vce_clocks +ffffffff82171190 t nv_get_config_memsize +ffffffff821711b0 t nv_need_full_reset +ffffffff821711e0 t nv_init_doorbell_index +ffffffff82171310 t nv_need_reset_on_init +ffffffff821713c0 t nv_pre_asic_init +ffffffff821713f0 t nv_update_umd_stable_pstate +ffffffff821714b0 t nv_query_video_codecs +ffffffff82172000 T psp_v10_0_set_psp_funcs +ffffffff82172030 t psp_v10_0_init_microcode +ffffffff82172120 t psp_v10_0_ring_create +ffffffff82172510 t psp_v10_0_ring_stop +ffffffff821727c0 t psp_v10_0_ring_destroy +ffffffff82172850 t psp_v10_0_mode1_reset +ffffffff821728a0 t psp_v10_0_ring_get_wptr +ffffffff82172900 t psp_v10_0_ring_set_wptr +ffffffff82173000 T psp_v11_0_set_psp_funcs +ffffffff82173030 t psp_v11_0_init_microcode +ffffffff82173210 t psp_v11_0_bootloader_load_kdb +ffffffff82173230 t psp_v11_0_bootloader_load_spl +ffffffff82173250 t psp_v11_0_bootloader_load_sysdrv +ffffffff82173270 t psp_v11_0_bootloader_load_sos +ffffffff821736c0 t psp_v11_0_ring_create +ffffffff82173f40 t psp_v11_0_ring_stop +ffffffff82174220 t psp_v11_0_ring_destroy +ffffffff821742b0 t psp_v11_0_mode1_reset +ffffffff821743e0 t psp_v11_0_memory_training +ffffffff82174950 t psp_v11_0_ring_get_wptr +ffffffff821749a0 t psp_v11_0_ring_set_wptr +ffffffff82174b00 t psp_v11_0_load_usbc_pd_fw +ffffffff82174d30 t psp_v11_0_read_usbc_pd_fw +ffffffff82174e70 t psp_v11_0_bootloader_load_component +ffffffff82175060 t psp_v11_0_wait_for_bootloader +ffffffff82175280 t psp_v11_0_memory_training_send_msg +ffffffff82176000 T psp_v11_0_8_set_psp_funcs +ffffffff82176030 t psp_v11_0_8_ring_create +ffffffff821768b0 t psp_v11_0_8_ring_stop +ffffffff82176db0 t psp_v11_0_8_ring_destroy +ffffffff82176e40 t psp_v11_0_8_ring_get_wptr +ffffffff82176eb0 t psp_v11_0_8_ring_set_wptr +ffffffff82177000 T psp_v12_0_set_psp_funcs +ffffffff82177030 t psp_v12_0_init_microcode +ffffffff82177100 t psp_v12_0_bootloader_load_sysdrv +ffffffff82177520 t psp_v12_0_bootloader_load_sos +ffffffff82177990 t psp_v12_0_ring_create +ffffffff82178670 t psp_v12_0_ring_stop +ffffffff82178950 t psp_v12_0_ring_destroy +ffffffff821789e0 t psp_v12_0_mode1_reset +ffffffff82178b10 t psp_v12_0_ring_get_wptr +ffffffff82178b80 t psp_v12_0_ring_set_wptr +ffffffff82179000 T psp_v13_0_set_psp_funcs +ffffffff82179030 t psp_v13_0_init_microcode +ffffffff821791f0 t psp_v13_0_wait_for_bootloader_steady_state +ffffffff82179370 t psp_v13_0_bootloader_load_kdb +ffffffff82179390 t psp_v13_0_bootloader_load_spl +ffffffff821793b0 t psp_v13_0_bootloader_load_sysdrv +ffffffff821793d0 t psp_v13_0_bootloader_load_soc_drv +ffffffff821793f0 t psp_v13_0_bootloader_load_intf_drv +ffffffff82179410 t psp_v13_0_bootloader_load_dbg_drv +ffffffff82179430 t psp_v13_0_bootloader_load_ras_drv +ffffffff82179450 t psp_v13_0_bootloader_load_sos +ffffffff821799d0 t psp_v13_0_ring_create +ffffffff8217a250 t psp_v13_0_ring_stop +ffffffff8217a750 t psp_v13_0_ring_destroy +ffffffff8217a7e0 t psp_v13_0_memory_training +ffffffff8217acc0 t psp_v13_0_ring_get_wptr +ffffffff8217ad30 t psp_v13_0_ring_set_wptr +ffffffff8217ae40 t psp_v13_0_load_usbc_pd_fw +ffffffff8217b070 t psp_v13_0_read_usbc_pd_fw +ffffffff8217b1b0 t psp_v13_0_update_spirom +ffffffff8217b3d0 t psp_v13_0_vbflash_status +ffffffff8217b430 t psp_v13_0_fatal_error_recovery_quirk +ffffffff8217b590 t psp_v13_0_get_ras_capability +ffffffff8217b660 t psp_v13_0_is_aux_sos_load_required +ffffffff8217b6d0 t psp_v13_0_bootloader_load_component +ffffffff8217b990 t psp_v13_0_memory_training_send_msg +ffffffff8217bb10 t psp_v13_0_exec_spi_cmd +ffffffff8217c000 T psp_v13_0_4_set_psp_funcs +ffffffff8217c030 t psp_v13_0_4_init_microcode +ffffffff8217c0f0 t psp_v13_0_4_bootloader_load_kdb +ffffffff8217c110 t psp_v13_0_4_bootloader_load_spl +ffffffff8217c130 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff8217c150 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff8217c170 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff8217c190 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff8217c1b0 t psp_v13_0_4_bootloader_load_sos +ffffffff8217c620 t psp_v13_0_4_ring_create +ffffffff8217ceb0 t psp_v13_0_4_ring_stop +ffffffff8217d3c0 t psp_v13_0_4_ring_destroy +ffffffff8217d450 t psp_v13_0_4_ring_get_wptr +ffffffff8217d4c0 t psp_v13_0_4_ring_set_wptr +ffffffff8217d5e0 t psp_v13_0_4_bootloader_load_component +ffffffff8217d7f0 t psp_v13_0_4_wait_for_bootloader +ffffffff8217e000 T psp_v14_0_set_psp_funcs +ffffffff8217e030 t psp_v14_0_init_microcode +ffffffff8217e100 t psp_v14_0_bootloader_load_kdb +ffffffff8217e120 t psp_v14_0_bootloader_load_spl +ffffffff8217e140 t psp_v14_0_bootloader_load_sysdrv +ffffffff8217e160 t psp_v14_0_bootloader_load_soc_drv +ffffffff8217e180 t psp_v14_0_bootloader_load_intf_drv +ffffffff8217e1a0 t psp_v14_0_bootloader_load_dbg_drv +ffffffff8217e1c0 t psp_v14_0_bootloader_load_ras_drv +ffffffff8217e1e0 t psp_v14_0_bootloader_load_ipkeymgr_drv +ffffffff8217e200 t psp_v14_0_bootloader_load_sos +ffffffff8217e670 t psp_v14_0_ring_create +ffffffff8217eef0 t psp_v14_0_ring_stop +ffffffff8217f3f0 t psp_v14_0_ring_destroy +ffffffff8217f480 t psp_v14_0_memory_training +ffffffff8217f960 t psp_v14_0_ring_get_wptr +ffffffff8217f9d0 t psp_v14_0_ring_set_wptr +ffffffff8217fae0 t psp_v14_0_load_usbc_pd_fw +ffffffff8217fd10 t psp_v14_0_read_usbc_pd_fw +ffffffff8217fe50 t psp_v14_0_update_spirom +ffffffff82180070 t psp_v14_0_vbflash_status +ffffffff821800d0 t psp_v14_0_bootloader_load_component +ffffffff821802e0 t psp_v14_0_wait_for_bootloader +ffffffff82180500 t psp_v14_0_memory_training_send_msg +ffffffff82180680 t psp_v14_0_exec_spi_cmd +ffffffff82181000 T psp_v3_1_set_psp_funcs +ffffffff82181030 t psp_v3_1_init_microcode +ffffffff821810e0 t psp_v3_1_bootloader_load_sysdrv +ffffffff82181500 t psp_v3_1_bootloader_load_sos +ffffffff82181970 t psp_v3_1_ring_create +ffffffff82182830 t psp_v3_1_ring_stop +ffffffff82182b10 t psp_v3_1_ring_destroy +ffffffff82182ba0 t psp_v3_1_smu_reload_quirk +ffffffff82182bf0 t psp_v3_1_mode1_reset +ffffffff82182d20 t psp_v3_1_ring_get_wptr +ffffffff82182d70 t psp_v3_1_ring_set_wptr +ffffffff82183000 t sdma_v2_4_early_init +ffffffff82183380 t sdma_v2_4_sw_init +ffffffff821834f0 t sdma_v2_4_sw_fini +ffffffff821835c0 t sdma_v2_4_hw_init +ffffffff82183a40 t sdma_v2_4_hw_fini +ffffffff82183a90 t sdma_v2_4_suspend +ffffffff82183ae0 t sdma_v2_4_resume +ffffffff82183af0 t sdma_v2_4_is_idle +ffffffff82183b40 t sdma_v2_4_wait_for_idle +ffffffff82183bf0 t sdma_v2_4_soft_reset +ffffffff82183da0 t sdma_v2_4_set_clockgating_state +ffffffff82183dd0 t sdma_v2_4_set_powergating_state +ffffffff82183e00 t sdma_v2_4_ring_get_rptr +ffffffff82183e40 t sdma_v2_4_ring_get_wptr +ffffffff82183ea0 t sdma_v2_4_ring_set_wptr +ffffffff82183ee0 t sdma_v2_4_ring_emit_ib +ffffffff821841c0 t sdma_v2_4_ring_emit_fence +ffffffff82184610 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff821848c0 t sdma_v2_4_ring_emit_vm_flush +ffffffff82184b70 t sdma_v2_4_ring_emit_hdp_flush +ffffffff82184e20 t sdma_v2_4_ring_test_ring +ffffffff82185150 t sdma_v2_4_ring_test_ib +ffffffff82185360 t sdma_v2_4_ring_insert_nop +ffffffff821854a0 t sdma_v2_4_ring_pad_ib +ffffffff821855d0 t sdma_v2_4_ring_emit_wreg +ffffffff82185730 t sdma_v2_4_emit_copy_buffer +ffffffff821857f0 t sdma_v2_4_emit_fill_buffer +ffffffff82185880 t sdma_v2_4_vm_copy_pte +ffffffff82185940 t sdma_v2_4_vm_write_pte +ffffffff82185a10 t sdma_v2_4_vm_set_pte_pde +ffffffff82185b10 t sdma_v2_4_set_trap_irq_state +ffffffff82185c00 t sdma_v2_4_process_trap_irq +ffffffff82185ca0 t sdma_v2_4_process_illegal_inst_irq +ffffffff82185d20 t sdma_v2_4_enable +ffffffff82186000 t sdma_v3_0_early_init +ffffffff82186380 t sdma_v3_0_sw_init +ffffffff82186540 t sdma_v3_0_sw_fini +ffffffff82186610 t sdma_v3_0_hw_init +ffffffff82186780 t sdma_v3_0_hw_fini +ffffffff821867e0 t sdma_v3_0_suspend +ffffffff82186840 t sdma_v3_0_resume +ffffffff82186850 t sdma_v3_0_is_idle +ffffffff821868a0 t sdma_v3_0_wait_for_idle +ffffffff82186950 t sdma_v3_0_check_soft_reset +ffffffff821869b0 t sdma_v3_0_pre_soft_reset +ffffffff82186a10 t sdma_v3_0_soft_reset +ffffffff82186b10 t sdma_v3_0_post_soft_reset +ffffffff82186b60 t sdma_v3_0_set_clockgating_state +ffffffff82186e10 t sdma_v3_0_set_powergating_state +ffffffff82186e40 t sdma_v3_0_get_clockgating_state +ffffffff82186ee0 t sdma_v3_0_ring_get_rptr +ffffffff82186f20 t sdma_v3_0_ring_get_wptr +ffffffff82186fa0 t sdma_v3_0_ring_set_wptr +ffffffff82187050 t sdma_v3_0_ring_emit_ib +ffffffff82187330 t sdma_v3_0_ring_emit_fence +ffffffff82187780 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff82187a30 t sdma_v3_0_ring_emit_vm_flush +ffffffff82187ce0 t sdma_v3_0_ring_emit_hdp_flush +ffffffff82187f90 t sdma_v3_0_ring_test_ring +ffffffff821882c0 t sdma_v3_0_ring_test_ib +ffffffff821884d0 t sdma_v3_0_ring_insert_nop +ffffffff82188610 t sdma_v3_0_ring_pad_ib +ffffffff82188740 t sdma_v3_0_ring_emit_wreg +ffffffff821888a0 t sdma_v3_0_emit_copy_buffer +ffffffff82188960 t sdma_v3_0_emit_fill_buffer +ffffffff821889f0 t sdma_v3_0_vm_copy_pte +ffffffff82188ab0 t sdma_v3_0_vm_write_pte +ffffffff82188b80 t sdma_v3_0_vm_set_pte_pde +ffffffff82188c80 t sdma_v3_0_set_trap_irq_state +ffffffff82188d70 t sdma_v3_0_process_trap_irq +ffffffff82188e10 t sdma_v3_0_process_illegal_inst_irq +ffffffff82188e90 t sdma_v3_0_ctx_switch_enable +ffffffff82189060 t sdma_v3_0_enable +ffffffff821891e0 t sdma_v3_0_gfx_resume +ffffffff8218a000 t sdma_v4_0_early_init +ffffffff8218a2f0 t sdma_v4_0_late_init +ffffffff8218a580 t sdma_v4_0_sw_init +ffffffff8218aa80 t sdma_v4_0_sw_fini +ffffffff8218ab80 t sdma_v4_0_hw_init +ffffffff8218dd20 t sdma_v4_0_hw_fini +ffffffff8218de00 t sdma_v4_0_suspend +ffffffff8218de60 t sdma_v4_0_resume +ffffffff8218dee0 t sdma_v4_0_is_idle +ffffffff8218e010 t sdma_v4_0_wait_for_idle +ffffffff8218e1c0 t sdma_v4_0_soft_reset +ffffffff8218e1f0 t sdma_v4_0_set_clockgating_state +ffffffff8218e720 t sdma_v4_0_set_powergating_state +ffffffff8218e810 t sdma_v4_0_get_clockgating_state +ffffffff8218e8c0 t sdma_v4_0_dump_ip_state +ffffffff8218ea80 t sdma_v4_0_print_ip_state +ffffffff8218eba0 t sdma_v4_0_query_ras_error_count +ffffffff8218ed90 t sdma_v4_0_reset_ras_error_count +ffffffff8218ef10 t sdma_v4_0_ring_get_rptr +ffffffff8218ef70 t sdma_v4_0_ring_get_wptr +ffffffff8218f170 t sdma_v4_0_ring_set_wptr +ffffffff8218f410 t sdma_v4_0_ring_emit_ib +ffffffff8218f6f0 t sdma_v4_0_ring_emit_fence +ffffffff8218fb60 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff8218fbc0 t sdma_v4_0_ring_emit_vm_flush +ffffffff8218fbe0 t sdma_v4_0_ring_emit_hdp_flush +ffffffff8218fca0 t sdma_v4_0_ring_test_ring +ffffffff8218ffd0 t sdma_v4_0_ring_test_ib +ffffffff821901e0 t sdma_v4_0_ring_insert_nop +ffffffff82190320 t sdma_v4_0_ring_pad_ib +ffffffff82190450 t sdma_v4_0_ring_emit_wreg +ffffffff821905b0 t sdma_v4_0_ring_emit_reg_wait +ffffffff82190600 t sdma_v4_0_wait_reg_mem +ffffffff82190950 t sdma_v4_0_page_ring_get_wptr +ffffffff82190b10 t sdma_v4_0_page_ring_set_wptr +ffffffff82190ce0 t sdma_v4_0_emit_copy_buffer +ffffffff82190db0 t sdma_v4_0_emit_fill_buffer +ffffffff82190e40 t sdma_v4_0_vm_copy_pte +ffffffff82190f00 t sdma_v4_0_vm_write_pte +ffffffff82190fd0 t sdma_v4_0_vm_set_pte_pde +ffffffff821910d0 t sdma_v4_0_set_trap_irq_state +ffffffff82191280 t sdma_v4_0_process_trap_irq +ffffffff821913e0 t sdma_v4_0_process_illegal_inst_irq +ffffffff82191500 t sdma_v4_0_set_ecc_irq_state +ffffffff821916b0 t sdma_v4_0_process_vm_hole_irq +ffffffff82191700 t sdma_v4_0_print_iv_entry +ffffffff82191810 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff82191860 t sdma_v4_0_process_pool_timeout_irq +ffffffff821918b0 t sdma_v4_0_process_srbm_write_irq +ffffffff82191900 t sdma_v4_0_process_ras_data_cb +ffffffff82191980 t sdma_v4_0_ctx_switch_enable +ffffffff821920a0 t sdma_v4_0_enable +ffffffff82192680 t sdma_v4_0_gfx_enable +ffffffff82193000 t sdma_v4_4_query_ras_error_count +ffffffff821932b0 t sdma_v4_4_reset_ras_error_count +ffffffff82194000 t sdma_v4_4_2_early_init +ffffffff82194290 t sdma_v4_4_2_late_init +ffffffff821942f0 t sdma_v4_4_2_sw_init +ffffffff82194940 t sdma_v4_4_2_sw_fini +ffffffff82194a40 t sdma_v4_4_2_hw_init +ffffffff82194a90 t sdma_v4_4_2_hw_fini +ffffffff82194b70 t sdma_v4_4_2_suspend +ffffffff82194c80 t sdma_v4_4_2_resume +ffffffff82194cd0 t sdma_v4_4_2_is_idle +ffffffff82194d80 t sdma_v4_4_2_wait_for_idle +ffffffff82194eb0 t sdma_v4_4_2_soft_reset +ffffffff82194ee0 t sdma_v4_4_2_set_clockgating_state +ffffffff821953a0 t sdma_v4_4_2_set_powergating_state +ffffffff821953d0 t sdma_v4_4_2_get_clockgating_state +ffffffff821954d0 t sdma_v4_4_2_dump_ip_state +ffffffff82195620 t sdma_v4_4_2_print_ip_state +ffffffff82195740 t sdma_v4_4_2_xcp_suspend +ffffffff82195830 t sdma_v4_4_2_xcp_resume +ffffffff82195870 t sdma_v4_4_2_ring_get_rptr +ffffffff821958e0 t sdma_v4_4_2_ring_get_wptr +ffffffff82195a40 t sdma_v4_4_2_ring_set_wptr +ffffffff82195c30 t sdma_v4_4_2_ring_emit_ib +ffffffff82195f10 t sdma_v4_4_2_ring_emit_fence +ffffffff82196380 t sdma_v4_4_2_ring_emit_pipeline_sync +ffffffff821963e0 t sdma_v4_4_2_ring_emit_vm_flush +ffffffff82196400 t sdma_v4_4_2_ring_emit_hdp_flush +ffffffff821964d0 t sdma_v4_4_2_ring_test_ring +ffffffff82196800 t sdma_v4_4_2_ring_test_ib +ffffffff82196a10 t sdma_v4_4_2_ring_insert_nop +ffffffff82196b50 t sdma_v4_4_2_ring_pad_ib +ffffffff82196c80 t sdma_v4_4_2_ring_emit_wreg +ffffffff82196de0 t sdma_v4_4_2_ring_emit_reg_wait +ffffffff82196e30 t sdma_v4_4_2_wait_reg_mem +ffffffff82197180 t sdma_v4_4_2_page_ring_get_wptr +ffffffff821972a0 t sdma_v4_4_2_page_ring_set_wptr +ffffffff821973d0 t sdma_v4_4_2_emit_copy_buffer +ffffffff821974a0 t sdma_v4_4_2_emit_fill_buffer +ffffffff82197530 t sdma_v4_4_2_vm_copy_pte +ffffffff821975f0 t sdma_v4_4_2_vm_write_pte +ffffffff821976c0 t sdma_v4_4_2_vm_set_pte_pde +ffffffff821977c0 t sdma_v4_4_2_set_trap_irq_state +ffffffff821978c0 t sdma_v4_4_2_process_trap_irq +ffffffff82197a40 t sdma_v4_4_2_process_illegal_inst_irq +ffffffff82197b20 t sdma_v4_4_2_set_ecc_irq_state +ffffffff82197c30 t sdma_v4_4_2_process_vm_hole_irq +ffffffff82197c80 t sdma_v4_4_2_print_iv_entry +ffffffff82197d80 t sdma_v4_4_2_process_doorbell_invalid_irq +ffffffff82197dd0 t sdma_v4_4_2_process_pool_timeout_irq +ffffffff82197e20 t sdma_v4_4_2_process_srbm_write_irq +ffffffff82197e70 t sdma_v4_4_2_ras_late_init +ffffffff82197ef0 t sdma_v4_4_2_aca_bank_parser +ffffffff82197fa0 t sdma_v4_4_2_aca_bank_is_valid +ffffffff82198010 t sdma_v4_4_2_query_ras_error_count +ffffffff82198210 t sdma_v4_4_2_reset_ras_error_count +ffffffff82198380 t sdma_v4_4_2_inst_init_golden_registers +ffffffff82198550 t sdma_v4_4_2_inst_start +ffffffff82199d00 t sdma_v4_4_2_inst_ctx_switch_enable +ffffffff8219a050 t sdma_v4_4_2_inst_enable +ffffffff8219b000 t sdma_v5_0_early_init +ffffffff8219b180 t sdma_v5_0_sw_init +ffffffff8219b380 t sdma_v5_0_sw_fini +ffffffff8219b440 t sdma_v5_0_hw_init +ffffffff8219c8e0 t sdma_v5_0_hw_fini +ffffffff8219c940 t sdma_v5_0_suspend +ffffffff8219c9a0 t sdma_v5_0_resume +ffffffff8219c9b0 t sdma_v5_0_is_idle +ffffffff8219ca50 t sdma_v5_0_wait_for_idle +ffffffff8219cb30 t sdma_v5_0_soft_reset +ffffffff8219cb60 t sdma_v5_0_set_clockgating_state +ffffffff8219cd80 t sdma_v5_0_set_powergating_state +ffffffff8219cdb0 t sdma_v5_0_get_clockgating_state +ffffffff8219ce60 t sdma_v5_0_dump_ip_state +ffffffff8219cf90 t sdma_v5_0_print_ip_state +ffffffff8219d0b0 t sdma_v5_0_ring_get_rptr +ffffffff8219d110 t sdma_v5_0_ring_get_wptr +ffffffff8219d2d0 t sdma_v5_0_ring_set_wptr +ffffffff8219d660 t sdma_v5_0_ring_emit_ib +ffffffff8219d960 t sdma_v5_0_ring_emit_fence +ffffffff8219de10 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff8219e0c0 t sdma_v5_0_ring_emit_vm_flush +ffffffff8219e0e0 t sdma_v5_0_ring_emit_hdp_flush +ffffffff8219e3b0 t sdma_v5_0_ring_test_ring +ffffffff8219e7d0 t sdma_v5_0_ring_test_ib +ffffffff8219eb60 t sdma_v5_0_ring_insert_nop +ffffffff8219eca0 t sdma_v5_0_ring_pad_ib +ffffffff8219edd0 t sdma_v5_0_ring_init_cond_exec +ffffffff8219f020 t sdma_v5_0_ring_emit_wreg +ffffffff8219f180 t sdma_v5_0_ring_emit_reg_wait +ffffffff8219f420 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff8219f4b0 t sdma_v5_0_ring_preempt_ib +ffffffff8219f640 t sdma_v5_0_ring_emit_mem_sync +ffffffff8219f870 t sdma_v5_0_emit_copy_buffer +ffffffff8219f940 t sdma_v5_0_emit_fill_buffer +ffffffff8219f9d0 t sdma_v5_0_vm_copy_pte +ffffffff8219fa90 t sdma_v5_0_vm_write_pte +ffffffff8219fb60 t sdma_v5_0_vm_set_pte_pde +ffffffff8219fc60 t sdma_v5_0_set_trap_irq_state +ffffffff8219fd00 t sdma_v5_0_process_trap_irq +ffffffff8219fe30 t sdma_v5_0_process_illegal_inst_irq +ffffffff8219fe60 t sdma_v5_0_mqd_init +ffffffff8219ff50 t sdma_v5_0_ctx_switch_enable +ffffffff821a02d0 t sdma_v5_0_enable +ffffffff821a1000 t sdma_v5_2_early_init +ffffffff821a1150 t sdma_v5_2_sw_init +ffffffff821a1400 t sdma_v5_2_sw_fini +ffffffff821a14c0 t sdma_v5_2_hw_init +ffffffff821a32d0 t sdma_v5_2_hw_fini +ffffffff821a3330 t sdma_v5_2_suspend +ffffffff821a3390 t sdma_v5_2_resume +ffffffff821a33a0 t sdma_v5_2_is_idle +ffffffff821a3460 t sdma_v5_2_wait_for_idle +ffffffff821a3590 t sdma_v5_2_soft_reset +ffffffff821a38a0 t sdma_v5_2_set_clockgating_state +ffffffff821a3c40 t sdma_v5_2_set_powergating_state +ffffffff821a3c70 t sdma_v5_2_get_clockgating_state +ffffffff821a3d20 t sdma_v5_2_dump_ip_state +ffffffff821a3e80 t sdma_v5_2_print_ip_state +ffffffff821a3fa0 t sdma_v5_2_ring_get_rptr +ffffffff821a4000 t sdma_v5_2_ring_get_wptr +ffffffff821a4150 t sdma_v5_2_ring_set_wptr +ffffffff821a4370 t sdma_v5_2_ring_emit_ib +ffffffff821a4670 t sdma_v5_2_ring_emit_fence +ffffffff821a4b20 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff821a4dd0 t sdma_v5_2_ring_emit_vm_flush +ffffffff821a4df0 t sdma_v5_2_ring_emit_hdp_flush +ffffffff821a50f0 t sdma_v5_2_ring_test_ring +ffffffff821a5510 t sdma_v5_2_ring_test_ib +ffffffff821a58a0 t sdma_v5_2_ring_insert_nop +ffffffff821a59e0 t sdma_v5_2_ring_pad_ib +ffffffff821a5b10 t sdma_v5_2_ring_init_cond_exec +ffffffff821a5d60 t sdma_v5_2_ring_begin_use +ffffffff821a5d80 t sdma_v5_2_ring_end_use +ffffffff821a5da0 t sdma_v5_2_ring_emit_wreg +ffffffff821a5f00 t sdma_v5_2_ring_emit_reg_wait +ffffffff821a61a0 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff821a6230 t sdma_v5_2_ring_preempt_ib +ffffffff821a63f0 t sdma_v5_2_ring_emit_mem_sync +ffffffff821a6620 t sdma_v5_2_emit_copy_buffer +ffffffff821a66f0 t sdma_v5_2_emit_fill_buffer +ffffffff821a6780 t sdma_v5_2_vm_copy_pte +ffffffff821a6840 t sdma_v5_2_vm_write_pte +ffffffff821a6910 t sdma_v5_2_vm_set_pte_pde +ffffffff821a6a10 t sdma_v5_2_set_trap_irq_state +ffffffff821a6ad0 t sdma_v5_2_process_trap_irq +ffffffff821a6c30 t sdma_v5_2_process_illegal_inst_irq +ffffffff821a6c60 t sdma_v5_2_mqd_init +ffffffff821a6d50 t sdma_v5_2_ctx_switch_enable +ffffffff821a71a0 t sdma_v5_2_enable +ffffffff821a8000 t sdma_v6_0_early_init +ffffffff821a8160 t sdma_v6_0_sw_init +ffffffff821a8370 t sdma_v6_0_sw_fini +ffffffff821a8430 t sdma_v6_0_hw_init +ffffffff821a8440 t sdma_v6_0_hw_fini +ffffffff821a8520 t sdma_v6_0_suspend +ffffffff821a8600 t sdma_v6_0_resume +ffffffff821a8610 t sdma_v6_0_is_idle +ffffffff821a86b0 t sdma_v6_0_wait_for_idle +ffffffff821a8790 t sdma_v6_0_check_soft_reset +ffffffff821a8860 t sdma_v6_0_soft_reset +ffffffff821a8db0 t sdma_v6_0_set_clockgating_state +ffffffff821a8de0 t sdma_v6_0_set_powergating_state +ffffffff821a8e10 t sdma_v6_0_get_clockgating_state +ffffffff821a8e40 t sdma_v6_0_dump_ip_state +ffffffff821a8f70 t sdma_v6_0_print_ip_state +ffffffff821a9090 t sdma_v6_0_ring_get_rptr +ffffffff821a90f0 t sdma_v6_0_ring_get_wptr +ffffffff821a9160 t sdma_v6_0_ring_set_wptr +ffffffff821a93a0 t sdma_v6_0_ring_emit_ib +ffffffff821a96a0 t sdma_v6_0_ring_emit_fence +ffffffff821a9b50 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff821a9e00 t sdma_v6_0_ring_emit_vm_flush +ffffffff821aa0a0 t sdma_v6_0_ring_emit_hdp_flush +ffffffff821aa370 t sdma_v6_0_ring_test_ring +ffffffff821aa790 t sdma_v6_0_ring_test_ib +ffffffff821aab20 t sdma_v6_0_ring_insert_nop +ffffffff821aac60 t sdma_v6_0_ring_pad_ib +ffffffff821aad90 t sdma_v6_0_ring_init_cond_exec +ffffffff821aafe0 t sdma_v6_0_ring_emit_wreg +ffffffff821ab140 t sdma_v6_0_ring_emit_reg_wait +ffffffff821ab3e0 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff821ab470 t sdma_v6_0_ring_preempt_ib +ffffffff821ab600 t sdma_v6_0_ring_emit_mem_sync +ffffffff821ab830 t sdma_v6_0_emit_copy_buffer +ffffffff821ab900 t sdma_v6_0_emit_fill_buffer +ffffffff821ab990 t sdma_v6_0_vm_copy_pte +ffffffff821aba50 t sdma_v6_0_vm_write_pte +ffffffff821abb20 t sdma_v6_0_vm_set_pte_pde +ffffffff821abc20 t sdma_v6_0_set_trap_irq_state +ffffffff821abcc0 t sdma_v6_0_process_trap_irq +ffffffff821abe20 t sdma_v6_0_process_illegal_inst_irq +ffffffff821abe50 t sdma_v6_0_mqd_init +ffffffff821abf80 t sdma_v6_0_start +ffffffff821ac2e0 t sdma_v6_0_enable +ffffffff821ac480 t sdma_v6_0_gfx_resume +ffffffff821ad7e0 t sdma_v6_0_gfx_stop +ffffffff821ae000 t sdma_v7_0_early_init +ffffffff821ae160 t sdma_v7_0_sw_init +ffffffff821ae310 t sdma_v7_0_sw_fini +ffffffff821ae420 t sdma_v7_0_hw_init +ffffffff821ae430 t sdma_v7_0_hw_fini +ffffffff821ae480 t sdma_v7_0_suspend +ffffffff821ae4d0 t sdma_v7_0_resume +ffffffff821ae4e0 t sdma_v7_0_is_idle +ffffffff821ae580 t sdma_v7_0_wait_for_idle +ffffffff821ae660 t sdma_v7_0_check_soft_reset +ffffffff821ae730 t sdma_v7_0_soft_reset +ffffffff821aeb60 t sdma_v7_0_set_clockgating_state +ffffffff821aeb90 t sdma_v7_0_set_powergating_state +ffffffff821aebc0 t sdma_v7_0_get_clockgating_state +ffffffff821aebf0 t sdma_v7_0_dump_ip_state +ffffffff821aed20 t sdma_v7_0_print_ip_state +ffffffff821aee40 t sdma_v7_0_ring_get_rptr +ffffffff821aeea0 t sdma_v7_0_ring_get_wptr +ffffffff821aef10 t sdma_v7_0_ring_set_wptr +ffffffff821af200 t sdma_v7_0_ring_emit_ib +ffffffff821af500 t sdma_v7_0_ring_emit_fence +ffffffff821af9b0 t sdma_v7_0_ring_emit_pipeline_sync +ffffffff821afc60 t sdma_v7_0_ring_emit_vm_flush +ffffffff821afc80 t sdma_v7_0_ring_emit_hdp_flush +ffffffff821aff50 t sdma_v7_0_ring_test_ring +ffffffff821b0370 t sdma_v7_0_ring_test_ib +ffffffff821b0700 t sdma_v7_0_ring_insert_nop +ffffffff821b0840 t sdma_v7_0_ring_pad_ib +ffffffff821b0970 t sdma_v7_0_ring_init_cond_exec +ffffffff821b0bc0 t sdma_v7_0_ring_emit_wreg +ffffffff821b0d20 t sdma_v7_0_ring_emit_reg_wait +ffffffff821b0fc0 t sdma_v7_0_ring_emit_reg_write_reg_wait +ffffffff821b1050 t sdma_v7_0_ring_preempt_ib +ffffffff821b1210 t sdma_v7_0_ring_emit_mem_sync +ffffffff821b1440 t sdma_v7_0_emit_copy_buffer +ffffffff821b1580 t sdma_v7_0_emit_fill_buffer +ffffffff821b1610 t sdma_v7_0_vm_copy_pte +ffffffff821b16f0 t sdma_v7_0_vm_write_pte +ffffffff821b17c0 t sdma_v7_0_vm_set_pte_pde +ffffffff821b18c0 t sdma_v7_0_set_trap_irq_state +ffffffff821b1960 t sdma_v7_0_process_trap_irq +ffffffff821b1ac0 t sdma_v7_0_process_illegal_inst_irq +ffffffff821b1af0 t sdma_v7_0_mqd_init +ffffffff821b1c10 t sdma_v7_0_start +ffffffff821b2540 t sdma_v7_0_enable +ffffffff821b26e0 t sdma_v7_0_gfx_resume +ffffffff821b3a00 t sdma_v7_0_gfx_stop +ffffffff821b4000 T sienna_cichlid_reset_init +ffffffff821b40c0 t sienna_cichlid_async_reset +ffffffff821b4140 t sienna_cichlid_get_reset_handler +ffffffff821b4220 T sienna_cichlid_reset_fini +ffffffff821b4280 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff821b43f0 t sienna_cichlid_mode2_perform_reset +ffffffff821b4480 t sienna_cichlid_mode2_restore_hwcontext +ffffffff821b47f0 t sienna_cichlid_mode2_reset +ffffffff821b5000 T smu_v11_0_i2c_control_init +ffffffff821b50e0 T smu_v11_0_i2c_control_fini +ffffffff821b5120 t smu_v11_0_i2c_xfer +ffffffff821b6490 t smu_v11_0_i2c_func +ffffffff821b64c0 t smu_v11_0_i2c_enable +ffffffff821b6620 t smu_v11_0_i2c_abort +ffffffff821b6740 t lock_bus +ffffffff821b67f0 t trylock_bus +ffffffff821b6850 t unlock_bus +ffffffff821b7000 T smu_v13_0_10_reset_init +ffffffff821b70c0 t smu_v13_0_10_async_reset +ffffffff821b7140 t smu_v13_0_10_get_reset_handler +ffffffff821b7260 T smu_v13_0_10_reset_fini +ffffffff821b72c0 t smu_v13_0_10_mode2_prepare_hwcontext +ffffffff821b7410 t smu_v13_0_10_mode2_perform_reset +ffffffff821b74a0 t smu_v13_0_10_mode2_restore_hwcontext +ffffffff821b7890 t smu_v13_0_10_mode2_reset +ffffffff821b8000 t smuio_v11_0_get_rom_index_offset +ffffffff821b8040 t smuio_v11_0_get_rom_data_offset +ffffffff821b8080 t smuio_v11_0_update_rom_clock_gating +ffffffff821b81d0 t smuio_v11_0_get_clock_gating_state +ffffffff821b9000 t smuio_v11_0_6_get_rom_index_offset +ffffffff821b9040 t smuio_v11_0_6_get_rom_data_offset +ffffffff821b9080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff821b91e0 t smuio_v11_0_6_get_clock_gating_state +ffffffff821ba000 t smuio_v13_0_get_rom_index_offset +ffffffff821ba040 t smuio_v13_0_get_rom_data_offset +ffffffff821ba080 t smuio_v13_0_update_rom_clock_gating +ffffffff821ba1e0 t smuio_v13_0_get_clock_gating_state +ffffffff821ba290 t smuio_v13_0_get_die_id +ffffffff821ba320 t smuio_v13_0_get_socket_id +ffffffff821ba3c0 t smuio_v13_0_get_pkg_type +ffffffff821ba470 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff821bb000 t smuio_v13_0_3_get_die_id +ffffffff821bb0a0 t smuio_v13_0_3_get_socket_id +ffffffff821bb140 t smuio_v13_0_3_get_pkg_type +ffffffff821bc000 t smuio_v13_0_6_get_rom_index_offset +ffffffff821bc040 t smuio_v13_0_6_get_rom_data_offset +ffffffff821bd000 t smuio_v14_0_2_get_rom_index_offset +ffffffff821bd040 t smuio_v14_0_2_get_rom_data_offset +ffffffff821bd080 t smuio_v14_0_2_get_gpu_clock_counter +ffffffff821be000 t smuio_v9_0_get_rom_index_offset +ffffffff821be040 t smuio_v9_0_get_rom_data_offset +ffffffff821be080 t smuio_v9_0_update_rom_clock_gating +ffffffff821be1e0 t smuio_v9_0_get_clock_gating_state +ffffffff821bf000 T soc15_grbm_select +ffffffff821bf090 T soc15_program_register_sequence +ffffffff821bf2b0 T soc15_set_virt_ops +ffffffff821bf320 t soc15_common_early_init +ffffffff821bf720 t soc15_common_late_init +ffffffff821bf790 t soc15_common_sw_init +ffffffff821bf7f0 t soc15_common_sw_fini +ffffffff821bf850 t soc15_common_hw_init +ffffffff821bf9a0 t soc15_common_hw_fini +ffffffff821bfab0 t soc15_common_suspend +ffffffff821bfaf0 t soc15_common_resume +ffffffff821bfbe0 t soc15_common_is_idle +ffffffff821bfc10 t soc15_common_wait_for_idle +ffffffff821bfc40 t soc15_common_soft_reset +ffffffff821bfc70 t soc15_common_set_clockgating_state +ffffffff821c0040 t soc15_common_set_powergating_state +ffffffff821c0070 t soc15_common_get_clockgating_state +ffffffff821c01d0 t soc15_uvd_ctx_rreg +ffffffff821c02a0 t soc15_uvd_ctx_wreg +ffffffff821c0340 t soc15_didt_rreg +ffffffff821c0400 t soc15_didt_wreg +ffffffff821c04a0 t soc15_gc_cac_rreg +ffffffff821c05f0 t soc15_gc_cac_wreg +ffffffff821c0730 t soc15_se_cac_rreg +ffffffff821c0880 t soc15_se_cac_wreg +ffffffff821c09c0 t soc15_read_disabled_bios +ffffffff821c09f0 t soc15_read_register +ffffffff821c0b00 t soc15_asic_reset +ffffffff821c0cd0 t soc15_asic_reset_method +ffffffff821c0ed0 t soc15_get_xclk +ffffffff821c0f50 t soc15_set_uvd_clocks +ffffffff821c0f80 t soc15_set_vce_clocks +ffffffff821c0fb0 t soc15_get_config_memsize +ffffffff821c0fd0 t soc15_need_full_reset +ffffffff821c1000 t soc15_get_pcie_usage +ffffffff821c1170 t soc15_need_reset_on_init +ffffffff821c1230 t soc15_get_pcie_replay_count +ffffffff821c12b0 t soc15_supports_baco +ffffffff821c1310 t soc15_pre_asic_init +ffffffff821c1320 t soc15_query_video_codecs +ffffffff821c1410 t vega20_get_pcie_usage +ffffffff821c2000 T soc21_grbm_select +ffffffff821c2090 t soc21_common_early_init +ffffffff821c2300 t soc21_common_late_init +ffffffff821c2400 t soc21_common_sw_init +ffffffff821c2450 t soc21_common_sw_fini +ffffffff821c2480 t soc21_common_hw_init +ffffffff821c2550 t soc21_common_hw_fini +ffffffff821c2610 t soc21_common_suspend +ffffffff821c26d0 t soc21_common_resume +ffffffff821c2930 t soc21_common_is_idle +ffffffff821c2960 t soc21_common_wait_for_idle +ffffffff821c2990 t soc21_common_soft_reset +ffffffff821c29c0 t soc21_common_set_clockgating_state +ffffffff821c2ab0 t soc21_common_set_powergating_state +ffffffff821c2b20 t soc21_common_get_clockgating_state +ffffffff821c2b70 t soc21_didt_rreg +ffffffff821c2c30 t soc21_didt_wreg +ffffffff821c2cd0 t soc21_read_disabled_bios +ffffffff821c2d00 t soc21_read_register +ffffffff821c2e00 t soc21_asic_reset +ffffffff821c2e60 t soc21_asic_reset_method +ffffffff821c2f80 t soc21_get_xclk +ffffffff821c2fb0 t soc21_set_uvd_clocks +ffffffff821c2fe0 t soc21_set_vce_clocks +ffffffff821c3010 t soc21_get_config_memsize +ffffffff821c3030 t soc21_need_full_reset +ffffffff821c3060 t soc21_init_doorbell_index +ffffffff821c3190 t soc21_need_reset_on_init +ffffffff821c3240 t soc21_pre_asic_init +ffffffff821c3270 t soc21_update_umd_stable_pstate +ffffffff821c32f0 t soc21_query_video_codecs +ffffffff821c4000 T soc24_grbm_select +ffffffff821c4090 t soc24_common_early_init +ffffffff821c4220 t soc24_common_late_init +ffffffff821c4290 t soc24_common_sw_init +ffffffff821c42e0 t soc24_common_sw_fini +ffffffff821c4310 t soc24_common_hw_init +ffffffff821c43f0 t soc24_common_hw_fini +ffffffff821c4480 t soc24_common_suspend +ffffffff821c4510 t soc24_common_resume +ffffffff821c45f0 t soc24_common_is_idle +ffffffff821c4620 t soc24_common_wait_for_idle +ffffffff821c4650 t soc24_common_soft_reset +ffffffff821c4680 t soc24_common_set_clockgating_state +ffffffff821c4730 t soc24_common_set_powergating_state +ffffffff821c47a0 t soc24_common_get_clockgating_state +ffffffff821c47f0 t soc24_read_register +ffffffff821c48f0 t soc24_asic_reset +ffffffff821c49c0 t soc24_asic_reset_method +ffffffff821c4a80 t soc24_get_xclk +ffffffff821c4ab0 t soc24_get_config_memsize +ffffffff821c4ad0 t soc24_need_full_reset +ffffffff821c4b00 t soc24_init_doorbell_index +ffffffff821c4c20 t soc24_need_reset_on_init +ffffffff821c4cd0 t soc24_get_pcie_replay_count +ffffffff821c4d00 t soc24_pre_asic_init +ffffffff821c4d30 t soc24_update_umd_stable_pstate +ffffffff821c4db0 t soc24_query_video_codecs +ffffffff821c5000 t tonga_ih_early_init +ffffffff821c5050 t tonga_ih_sw_init +ffffffff821c50e0 t tonga_ih_sw_fini +ffffffff821c5140 t tonga_ih_hw_init +ffffffff821c53c0 t tonga_ih_hw_fini +ffffffff821c5490 t tonga_ih_suspend +ffffffff821c5560 t tonga_ih_resume +ffffffff821c55a0 t tonga_ih_is_idle +ffffffff821c55f0 t tonga_ih_wait_for_idle +ffffffff821c56a0 t tonga_ih_check_soft_reset +ffffffff821c5700 t tonga_ih_pre_soft_reset +ffffffff821c57e0 t tonga_ih_soft_reset +ffffffff821c58e0 t tonga_ih_post_soft_reset +ffffffff821c5930 t tonga_ih_set_clockgating_state +ffffffff821c5960 t tonga_ih_set_powergating_state +ffffffff821c5990 t tonga_ih_get_wptr +ffffffff821c5ac0 t tonga_ih_decode_iv +ffffffff821c5b40 t tonga_ih_set_rptr +ffffffff821c6000 T umc_v12_0_is_deferred_error +ffffffff821c6060 T umc_v12_0_is_uncorrectable_error +ffffffff821c60f0 T umc_v12_0_is_correctable_error +ffffffff821c61e0 t umc_v12_0_query_ras_error_count +ffffffff821c6220 t umc_v12_0_query_ras_error_address +ffffffff821c6240 t umc_v12_0_ras_late_init +ffffffff821c62b0 t umc_v12_0_err_cnt_init +ffffffff821c62d0 t umc_v12_0_query_ras_poison_mode +ffffffff821c6300 t umc_v12_0_query_ras_ecc_err_addr +ffffffff821c6320 t umc_v12_0_check_ecc_err_status +ffffffff821c64c0 t umc_v12_0_update_ecc_status +ffffffff821c6940 t umc_v12_0_query_error_count +ffffffff821c6c10 t umc_v12_0_reset_error_count_per_channel +ffffffff821c6cb0 t umc_v12_0_query_error_address +ffffffff821c7020 t umc_v12_0_aca_bank_parser +ffffffff821c7210 t umc_v12_0_err_cnt_init_per_channel +ffffffff821c7310 t umc_v12_0_lookup_bad_pages_in_a_row +ffffffff821c8000 t umc_v6_0_init_registers +ffffffff821c9000 t umc_v6_1_query_ras_error_count +ffffffff821c95c0 t umc_v6_1_query_ras_error_address +ffffffff821c98f0 t umc_v6_1_err_cnt_init +ffffffff821ca000 T umc_v6_7_convert_error_address +ffffffff821ca3a0 t umc_v6_7_query_ras_error_count +ffffffff821ca3e0 t umc_v6_7_query_ras_error_address +ffffffff821ca400 t umc_v6_7_query_ras_poison_mode +ffffffff821ca460 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff821ca480 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff821ca4a0 t umc_v6_7_query_ecc_error_count +ffffffff821ca7a0 t umc_v6_7_reset_error_count_per_channel +ffffffff821ca8e0 t umc_v6_7_query_error_address +ffffffff821caa10 t umc_v6_7_ecc_info_querry_ecc_error_count +ffffffff821cac20 t umc_v6_7_ecc_info_query_error_address +ffffffff821cb000 t umc_v8_10_query_ras_error_count +ffffffff821cb040 t umc_v8_10_query_ras_error_address +ffffffff821cb060 t umc_v8_10_err_cnt_init +ffffffff821cb080 t umc_v8_10_query_ras_poison_mode +ffffffff821cb0b0 t umc_v8_10_ecc_info_query_ras_error_count +ffffffff821cb0d0 t umc_v8_10_ecc_info_query_ras_error_address +ffffffff821cb0f0 t umc_v8_10_query_ecc_error_count +ffffffff821cb1d0 t umc_v8_10_clear_error_count_per_channel +ffffffff821cb240 t umc_v8_10_query_error_address +ffffffff821cb380 t umc_v8_10_convert_error_address +ffffffff821cb5b0 t umc_v8_10_err_cnt_init_per_channel +ffffffff821cb680 t umc_v8_10_ecc_info_query_ecc_error_count +ffffffff821cb760 t umc_v8_10_ecc_info_query_error_address +ffffffff821cc000 t umc_v8_7_query_ras_error_count +ffffffff821cc370 t umc_v8_7_query_ras_error_address +ffffffff821cc540 t umc_v8_7_err_cnt_init +ffffffff821cc6d0 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff821cc800 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff821cd000 T umsch_mm_v4_0_set_funcs +ffffffff821cd040 t umsch_mm_v4_0_set_hw_resources +ffffffff821cd260 t umsch_mm_v4_0_add_queue +ffffffff821cd4b0 t umsch_mm_v4_0_remove_queue +ffffffff821cd5e0 t umsch_mm_v4_0_set_regs +ffffffff821cd630 t umsch_mm_v4_0_load_microcode +ffffffff821ce5e0 t umsch_mm_v4_0_ring_start +ffffffff821ced40 t umsch_mm_v4_0_ring_stop +ffffffff821cf000 t uvd_v5_0_early_init +ffffffff821cf050 t uvd_v5_0_sw_init +ffffffff821cf150 t uvd_v5_0_sw_fini +ffffffff821cf1b0 t uvd_v5_0_hw_init +ffffffff821cf760 t uvd_v5_0_hw_fini +ffffffff821cf7f0 t uvd_v5_0_prepare_suspend +ffffffff821cf800 t uvd_v5_0_suspend +ffffffff821cf940 t uvd_v5_0_resume +ffffffff821cf9a0 t uvd_v5_0_is_idle +ffffffff821cf9f0 t uvd_v5_0_wait_for_idle +ffffffff821cfa80 t uvd_v5_0_soft_reset +ffffffff821cfb70 t uvd_v5_0_set_clockgating_state +ffffffff821cfd70 t uvd_v5_0_set_powergating_state +ffffffff821cfdc0 t uvd_v5_0_get_clockgating_state +ffffffff821cfe60 t uvd_v5_0_ring_get_rptr +ffffffff821cfeb0 t uvd_v5_0_ring_get_wptr +ffffffff821cff00 t uvd_v5_0_ring_set_wptr +ffffffff821cff30 t uvd_v5_0_ring_emit_ib +ffffffff821d01d0 t uvd_v5_0_ring_emit_fence +ffffffff821d07f0 t uvd_v5_0_ring_test_ring +ffffffff821d09c0 t uvd_v5_0_ring_insert_nop +ffffffff821d0b20 t uvd_v5_0_set_interrupt_state +ffffffff821d0b50 t uvd_v5_0_process_interrupt +ffffffff821d0bc0 t uvd_v5_0_stop +ffffffff821d0d40 t uvd_v5_0_start +ffffffff821d2000 t uvd_v6_0_early_init +ffffffff821d2170 t uvd_v6_0_sw_init +ffffffff821d24c0 t uvd_v6_0_sw_fini +ffffffff821d2590 t uvd_v6_0_hw_init +ffffffff821d2c00 t uvd_v6_0_hw_fini +ffffffff821d2c90 t uvd_v6_0_prepare_suspend +ffffffff821d2ca0 t uvd_v6_0_suspend +ffffffff821d2de0 t uvd_v6_0_resume +ffffffff821d2e40 t uvd_v6_0_is_idle +ffffffff821d2e90 t uvd_v6_0_wait_for_idle +ffffffff821d2f20 t uvd_v6_0_check_soft_reset +ffffffff821d2fb0 t uvd_v6_0_pre_soft_reset +ffffffff821d3000 t uvd_v6_0_soft_reset +ffffffff821d3100 t uvd_v6_0_post_soft_reset +ffffffff821d31d0 t uvd_v6_0_set_clockgating_state +ffffffff821d33c0 t uvd_v6_0_set_powergating_state +ffffffff821d3440 t uvd_v6_0_get_clockgating_state +ffffffff821d34f0 t uvd_v6_0_ring_get_rptr +ffffffff821d3540 t uvd_v6_0_ring_get_wptr +ffffffff821d3590 t uvd_v6_0_ring_set_wptr +ffffffff821d35c0 t uvd_v6_0_ring_emit_ib +ffffffff821d3960 t uvd_v6_0_ring_emit_fence +ffffffff821d3f80 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff821d43c0 t uvd_v6_0_ring_emit_vm_flush +ffffffff821d4760 t uvd_v6_0_ring_emit_hdp_flush +ffffffff821d4790 t uvd_v6_0_ring_test_ring +ffffffff821d4960 t uvd_v6_0_ring_insert_nop +ffffffff821d4ac0 t uvd_v6_0_ring_emit_wreg +ffffffff821d4d70 t uvd_v6_0_enc_ring_get_rptr +ffffffff821d4dd0 t uvd_v6_0_enc_ring_get_wptr +ffffffff821d4e30 t uvd_v6_0_enc_ring_set_wptr +ffffffff821d4e70 t uvd_v6_0_enc_ring_emit_ib +ffffffff821d50e0 t uvd_v6_0_enc_ring_emit_fence +ffffffff821d5340 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff821d5510 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff821d5740 t uvd_v6_0_enc_ring_test_ring +ffffffff821d58b0 t uvd_v6_0_enc_ring_test_ib +ffffffff821d5e10 t uvd_v6_0_enc_ring_insert_end +ffffffff821d5ea0 t uvd_v6_0_set_interrupt_state +ffffffff821d5ed0 t uvd_v6_0_process_interrupt +ffffffff821d5fd0 t uvd_v6_0_stop +ffffffff821d6150 t uvd_v6_0_start +ffffffff821d7000 t uvd_v7_0_early_init +ffffffff821d7300 t uvd_v7_0_sw_init +ffffffff821d7770 t uvd_v7_0_sw_fini +ffffffff821d7880 t uvd_v7_0_hw_init +ffffffff821dad50 t uvd_v7_0_hw_fini +ffffffff821db100 t uvd_v7_0_prepare_suspend +ffffffff821db110 t uvd_v7_0_suspend +ffffffff821db1f0 t uvd_v7_0_resume +ffffffff821db250 t uvd_v7_0_set_clockgating_state +ffffffff821db280 t uvd_v7_0_ring_get_rptr +ffffffff821db320 t uvd_v7_0_ring_get_wptr +ffffffff821db3c0 t uvd_v7_0_ring_set_wptr +ffffffff821db440 t uvd_v7_0_ring_patch_cs_in_place +ffffffff821db4c0 t uvd_v7_0_ring_emit_ib +ffffffff821db8b0 t uvd_v7_0_ring_emit_fence +ffffffff821dbf70 t uvd_v7_0_ring_emit_vm_flush +ffffffff821dbff0 t uvd_v7_0_ring_emit_hdp_flush +ffffffff821dc020 t uvd_v7_0_ring_test_ring +ffffffff821dc2f0 t uvd_v7_0_ring_insert_nop +ffffffff821dc490 t uvd_v7_0_ring_emit_wreg +ffffffff821dc780 t uvd_v7_0_ring_emit_reg_wait +ffffffff821dcb60 t uvd_v7_0_enc_ring_get_rptr +ffffffff821dcc60 t uvd_v7_0_enc_ring_get_wptr +ffffffff821dcd70 t uvd_v7_0_enc_ring_set_wptr +ffffffff821dce70 t uvd_v7_0_enc_ring_emit_ib +ffffffff821dd0e0 t uvd_v7_0_enc_ring_emit_fence +ffffffff821dd340 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff821dd3c0 t uvd_v7_0_enc_ring_test_ring +ffffffff821dd540 t uvd_v7_0_enc_ring_test_ib +ffffffff821ddaa0 t uvd_v7_0_enc_ring_insert_end +ffffffff821ddb30 t uvd_v7_0_enc_ring_emit_wreg +ffffffff821ddc90 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff821dde60 t uvd_v7_0_set_interrupt_state +ffffffff821dde90 t uvd_v7_0_process_interrupt +ffffffff821de000 t vce_v3_0_early_init +ffffffff821de1a0 t vce_v3_0_sw_init +ffffffff821de330 t vce_v3_0_sw_fini +ffffffff821de390 t vce_v3_0_hw_init +ffffffff821de490 t vce_v3_0_hw_fini +ffffffff821de590 t vce_v3_0_suspend +ffffffff821de6a0 t vce_v3_0_resume +ffffffff821de7c0 t vce_v3_0_is_idle +ffffffff821de830 t vce_v3_0_wait_for_idle +ffffffff821de8f0 t vce_v3_0_check_soft_reset +ffffffff821dea20 t vce_v3_0_pre_soft_reset +ffffffff821deaf0 t vce_v3_0_soft_reset +ffffffff821debf0 t vce_v3_0_post_soft_reset +ffffffff821decc0 t vce_v3_0_set_clockgating_state +ffffffff821df0a0 t vce_v3_0_set_powergating_state +ffffffff821dfbf0 t vce_v3_0_get_clockgating_state +ffffffff821dfce0 t vce_v3_0_ring_get_rptr +ffffffff821dfdd0 t vce_v3_0_ring_get_wptr +ffffffff821dfec0 t vce_v3_0_ring_set_wptr +ffffffff821dff90 t vce_v3_0_ring_emit_ib +ffffffff821e0200 t vce_v3_0_emit_pipeline_sync +ffffffff821e03d0 t vce_v3_0_emit_vm_flush +ffffffff821e0670 t vce_v3_0_set_interrupt_state +ffffffff821e06f0 t vce_v3_0_process_interrupt +ffffffff821e07d0 t vce_v3_0_stop +ffffffff821e1000 t vce_v4_0_early_init +ffffffff821e10c0 t vce_v4_0_sw_init +ffffffff821e13c0 t vce_v4_0_sw_fini +ffffffff821e1460 t vce_v4_0_hw_init +ffffffff821e1cb0 t vce_v4_0_hw_fini +ffffffff821e1e20 t vce_v4_0_suspend +ffffffff821e1f90 t vce_v4_0_resume +ffffffff821e2060 t vce_v4_0_set_clockgating_state +ffffffff821e2090 t vce_v4_0_set_powergating_state +ffffffff821e21a0 t vce_v4_0_ring_get_rptr +ffffffff821e2210 t vce_v4_0_ring_get_wptr +ffffffff821e22a0 t vce_v4_0_ring_set_wptr +ffffffff821e2330 t vce_v4_0_ring_emit_ib +ffffffff821e25a0 t vce_v4_0_ring_emit_fence +ffffffff821e2800 t vce_v4_0_emit_vm_flush +ffffffff821e2880 t vce_v4_0_ring_insert_end +ffffffff821e2910 t vce_v4_0_emit_wreg +ffffffff821e2a70 t vce_v4_0_emit_reg_wait +ffffffff821e2c40 t vce_v4_0_set_interrupt_state +ffffffff821e2cd0 t vce_v4_0_process_interrupt +ffffffff821e2d80 t vce_v4_0_start +ffffffff821e4000 T vcn_dec_sw_ring_emit_fence +ffffffff821e4260 T vcn_dec_sw_ring_insert_end +ffffffff821e42f0 T vcn_dec_sw_ring_emit_ib +ffffffff821e4560 T vcn_dec_sw_ring_emit_reg_wait +ffffffff821e4730 T vcn_dec_sw_ring_emit_vm_flush +ffffffff821e47b0 T vcn_dec_sw_ring_emit_wreg +ffffffff821e5000 T vcn_v1_0_set_pg_for_begin_use +ffffffff821e5160 T vcn_v1_0_ring_end_use +ffffffff821e51d0 t vcn_v1_0_early_init +ffffffff821e5240 t vcn_v1_0_sw_init +ffffffff821e55b0 t vcn_v1_0_sw_fini +ffffffff821e5640 t vcn_v1_0_hw_init +ffffffff821e5700 t vcn_v1_0_hw_fini +ffffffff821e5820 t vcn_v1_0_suspend +ffffffff821e58b0 t vcn_v1_0_resume +ffffffff821e5980 t vcn_v1_0_is_idle +ffffffff821e5a20 t vcn_v1_0_wait_for_idle +ffffffff821e5a60 t vcn_v1_0_set_clockgating_state +ffffffff821e5b30 t vcn_v1_0_set_powergating_state +ffffffff821e61a0 t vcn_v1_0_dump_ip_state +ffffffff821e6360 t vcn_v1_0_print_ip_state +ffffffff821e64e0 t vcn_v1_0_dec_ring_get_rptr +ffffffff821e6570 t vcn_v1_0_dec_ring_get_wptr +ffffffff821e6600 t vcn_v1_0_dec_ring_set_wptr +ffffffff821e6720 t vcn_v1_0_ring_patch_cs_in_place +ffffffff821e6910 t vcn_v1_0_dec_ring_emit_ib +ffffffff821e6ce0 t vcn_v1_0_dec_ring_emit_fence +ffffffff821e7370 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff821e73f0 t vcn_v1_0_dec_ring_insert_nop +ffffffff821e7590 t vcn_v1_0_dec_ring_insert_start +ffffffff821e7780 t vcn_v1_0_dec_ring_insert_end +ffffffff821e7890 t vcn_v1_0_ring_begin_use +ffffffff821e7950 t vcn_v1_0_dec_ring_emit_wreg +ffffffff821e7c30 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff821e7ff0 t vcn_v1_0_enc_ring_get_rptr +ffffffff821e80d0 t vcn_v1_0_enc_ring_get_wptr +ffffffff821e81b0 t vcn_v1_0_enc_ring_set_wptr +ffffffff821e8270 t vcn_v1_0_enc_ring_emit_ib +ffffffff821e84e0 t vcn_v1_0_enc_ring_emit_fence +ffffffff821e8740 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff821e87c0 t vcn_v1_0_enc_ring_insert_end +ffffffff821e8850 t vcn_v1_0_enc_ring_emit_wreg +ffffffff821e89b0 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff821e8b80 t vcn_v1_0_set_interrupt_state +ffffffff821e8bb0 t vcn_v1_0_process_interrupt +ffffffff821e8c60 t vcn_v1_0_idle_work_handler +ffffffff821e8e10 t vcn_v1_0_pause_dpg_mode +ffffffff821e9ed0 t vcn_v1_0_enable_clock_gating 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+ffffffff821f7ee0 t vcn_v2_0_disable_clock_gating +ffffffff821f8370 t vcn_v2_0_start +ffffffff821fd340 t vcn_v2_0_enable_static_power_gating +ffffffff821fd4c0 t vcn_v2_0_clock_gating_dpg_mode +ffffffff821fe3a0 t vcn_v2_0_mc_resume_dpg_mode +ffffffff82203000 t vcn_v2_6_query_poison_status +ffffffff822030e0 t vcn_v2_5_early_init +ffffffff82203420 t vcn_v2_5_sw_init +ffffffff822039d0 t vcn_v2_5_sw_fini +ffffffff82203ad0 t vcn_v2_5_hw_init +ffffffff82204580 t vcn_v2_5_hw_fini +ffffffff82204730 t vcn_v2_5_suspend +ffffffff82204760 t vcn_v2_5_resume +ffffffff822047c0 t vcn_v2_5_is_idle +ffffffff822048c0 t vcn_v2_5_wait_for_idle +ffffffff82204970 t vcn_v2_5_set_clockgating_state +ffffffff82204a00 t vcn_v2_5_set_powergating_state +ffffffff82207010 t vcn_v2_5_dump_ip_state +ffffffff822071e0 t vcn_v2_5_print_ip_state +ffffffff82207360 t vcn_v2_5_dec_ring_get_rptr +ffffffff82207400 t vcn_v2_5_dec_ring_get_wptr +ffffffff822074c0 t vcn_v2_5_dec_ring_set_wptr +ffffffff82207570 t vcn_v2_5_enc_ring_get_rptr +ffffffff82207670 t vcn_v2_5_enc_ring_get_wptr +ffffffff82207780 t vcn_v2_5_enc_ring_set_wptr +ffffffff82207890 t vcn_v2_5_set_interrupt_state +ffffffff822078c0 t vcn_v2_5_process_interrupt +ffffffff822079e0 t vcn_v2_6_set_ras_interrupt_state +ffffffff82207a10 t vcn_v2_5_pause_dpg_mode +ffffffff82208240 t vcn_v2_5_enable_clock_gating +ffffffff822085a0 t vcn_v2_5_disable_clock_gating +ffffffff82208b10 t vcn_v2_5_start_dpg_mode +ffffffff8220ca90 t vcn_v2_5_clock_gating_dpg_mode +ffffffff8220d9a0 t vcn_v2_5_mc_resume_dpg_mode +ffffffff82213000 t vcn_v3_0_early_init +ffffffff82213230 t vcn_v3_0_sw_init +ffffffff822137a0 t vcn_v3_0_sw_fini +ffffffff822138b0 t vcn_v3_0_hw_init +ffffffff82214490 t vcn_v3_0_hw_fini +ffffffff822145b0 t vcn_v3_0_suspend +ffffffff822145e0 t vcn_v3_0_resume +ffffffff82214640 t vcn_v3_0_is_idle +ffffffff82214740 t vcn_v3_0_wait_for_idle +ffffffff822147f0 t vcn_v3_0_set_clockgating_state +ffffffff82214910 t vcn_v3_0_set_powergating_state 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vcn_v4_0_hw_init +ffffffff82224260 t vcn_v4_0_hw_fini +ffffffff822243d0 t vcn_v4_0_suspend +ffffffff82224400 t vcn_v4_0_resume +ffffffff82224460 t vcn_v4_0_is_idle +ffffffff82224570 t vcn_v4_0_wait_for_idle +ffffffff82224630 t vcn_v4_0_set_clockgating_state +ffffffff82224760 t vcn_v4_0_set_powergating_state +ffffffff82225080 t vcn_v4_0_dump_ip_state +ffffffff82225240 t vcn_v4_0_print_ip_state +ffffffff822253c0 t vcn_v4_0_unified_ring_get_rptr +ffffffff822254a0 t vcn_v4_0_unified_ring_get_wptr +ffffffff822255a0 t vcn_v4_0_unified_ring_set_wptr +ffffffff822256a0 t vcn_v4_0_ring_patch_cs_in_place +ffffffff82225a90 t vcn_v4_0_limit_sched +ffffffff82225b00 t vcn_v4_0_process_interrupt +ffffffff82225be0 t vcn_v4_0_set_ras_interrupt_state +ffffffff82225c10 t vcn_v4_0_pause_dpg_mode +ffffffff82225ed0 t vcn_v4_0_enable_clock_gating +ffffffff82226200 t vcn_v4_0_disable_clock_gating +ffffffff82226740 t vcn_v4_0_start +ffffffff8222ba90 t vcn_v4_0_disable_clock_gating_dpg_mode +ffffffff8222c9d0 t vcn_v4_0_mc_resume_dpg_mode +ffffffff82232000 t vcn_v4_0_3_early_init +ffffffff822320e0 t vcn_v4_0_3_sw_init +ffffffff82232440 t vcn_v4_0_3_sw_fini +ffffffff82232530 t vcn_v4_0_3_hw_init +ffffffff82233360 t vcn_v4_0_3_hw_fini +ffffffff82233400 t vcn_v4_0_3_suspend +ffffffff82233480 t vcn_v4_0_3_resume +ffffffff822334e0 t vcn_v4_0_3_is_idle +ffffffff82233680 t vcn_v4_0_3_wait_for_idle +ffffffff822337a0 t vcn_v4_0_3_set_clockgating_state +ffffffff82233970 t vcn_v4_0_3_set_powergating_state +ffffffff82235fc0 t vcn_v4_0_3_dump_ip_state +ffffffff822361b0 t vcn_v4_0_3_print_ip_state +ffffffff82236330 t vcn_v4_0_3_unified_ring_get_rptr +ffffffff822364d0 t vcn_v4_0_3_unified_ring_get_wptr +ffffffff82236690 t vcn_v4_0_3_unified_ring_set_wptr +ffffffff82236860 t vcn_v4_0_3_enc_ring_emit_vm_flush +ffffffff822368e0 t vcn_v4_0_3_ring_emit_hdp_flush +ffffffff82236910 t vcn_v4_0_3_enc_ring_emit_wreg +ffffffff82236a90 t vcn_v4_0_3_enc_ring_emit_reg_wait +ffffffff82236c90 t vcn_v4_0_3_set_interrupt_state +ffffffff82236cc0 t vcn_v4_0_3_process_interrupt +ffffffff82236e00 t vcn_v4_0_3_query_ras_error_count +ffffffff82236f20 t vcn_v4_0_3_reset_ras_error_count +ffffffff82237030 t vcn_v4_0_3_pause_dpg_mode +ffffffff82237060 t vcn_v4_0_3_enable_clock_gating +ffffffff822373c0 t vcn_v4_0_3_disable_clock_gating +ffffffff82237930 t vcn_v4_0_3_start_dpg_mode +ffffffff8223af80 t vcn_v4_0_3_disable_clock_gating_dpg_mode +ffffffff8223be90 t vcn_v4_0_3_mc_resume_dpg_mode +ffffffff82241000 t vcn_v4_0_5_early_init +ffffffff82241120 t vcn_v4_0_5_sw_init +ffffffff82241420 t vcn_v4_0_5_sw_fini +ffffffff82241530 t vcn_v4_0_5_hw_init +ffffffff82241620 t vcn_v4_0_5_hw_fini +ffffffff82241740 t vcn_v4_0_5_suspend +ffffffff82241770 t vcn_v4_0_5_resume +ffffffff82241870 t vcn_v4_0_5_is_idle +ffffffff82241980 t vcn_v4_0_5_wait_for_idle +ffffffff82241a40 t vcn_v4_0_5_set_clockgating_state +ffffffff82241b70 t vcn_v4_0_5_set_powergating_state +ffffffff822425f0 t vcn_v4_0_5_dump_ip_state +ffffffff822427b0 t vcn_v4_0_5_print_ip_state +ffffffff82242930 t vcn_v4_0_5_unified_ring_get_rptr +ffffffff82242a10 t vcn_v4_0_5_unified_ring_get_wptr +ffffffff82242b10 t vcn_v4_0_5_unified_ring_set_wptr +ffffffff82242c10 t vcn_v4_0_5_process_interrupt +ffffffff82242d10 t vcn_v4_0_5_pause_dpg_mode +ffffffff82242fd0 t vcn_v4_0_5_enable_clock_gating +ffffffff82243300 t vcn_v4_0_5_disable_clock_gating +ffffffff82243840 t vcn_v4_0_5_start +ffffffff82248820 t vcn_v4_0_5_disable_clock_gating_dpg_mode +ffffffff82249760 t vcn_v4_0_5_mc_resume_dpg_mode +ffffffff8224f000 t vcn_v5_0_0_early_init +ffffffff8224f120 t vcn_v5_0_0_sw_init +ffffffff8224f3d0 t vcn_v5_0_0_sw_fini +ffffffff8224f4c0 t vcn_v5_0_0_hw_init +ffffffff8224f5b0 t vcn_v5_0_0_hw_fini +ffffffff8224f6d0 t vcn_v5_0_0_suspend +ffffffff8224f700 t vcn_v5_0_0_resume +ffffffff8224f800 t vcn_v5_0_0_is_idle +ffffffff8224f910 t vcn_v5_0_0_wait_for_idle +ffffffff8224f9d0 t vcn_v5_0_0_set_clockgating_state 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vega10_ih_get_wptr +ffffffff82259bd0 t vega10_ih_set_rptr +ffffffff82259cc0 t vega10_ih_self_irq +ffffffff82259d40 t vega10_ih_toggle_interrupts +ffffffff8225a000 T vega10_reg_base_init +ffffffff8225a150 T vega10_doorbell_index_init +ffffffff8225b000 t vega20_ih_early_init +ffffffff8225b050 t vega20_ih_sw_init +ffffffff8225b370 t vega20_ih_sw_fini +ffffffff8225b3b0 t vega20_ih_hw_init +ffffffff8225ba90 t vega20_ih_hw_fini +ffffffff8225baf0 t vega20_ih_suspend +ffffffff8225bb50 t vega20_ih_resume +ffffffff8225bb60 t vega20_ih_is_idle +ffffffff8225bb90 t vega20_ih_wait_for_idle +ffffffff8225bbc0 t vega20_ih_soft_reset +ffffffff8225bbf0 t vega20_ih_set_clockgating_state +ffffffff8225bd30 t vega20_ih_set_powergating_state +ffffffff8225bd60 t vega20_ih_get_wptr +ffffffff8225bec0 t vega20_ih_set_rptr +ffffffff8225bfb0 t vega20_ih_self_irq +ffffffff8225c030 t vega20_ih_toggle_interrupts +ffffffff8225d000 T vega20_reg_base_init +ffffffff8225d160 T vega20_doorbell_index_init +ffffffff8225e000 T vi_srbm_select +ffffffff8225e050 T vi_set_virt_ops +ffffffff8225e090 T vi_set_ip_blocks +ffffffff8225e640 T legacy_doorbell_index_init +ffffffff8225e6f0 t vi_common_early_init +ffffffff8225e9f0 t vi_common_late_init +ffffffff8225ea40 t vi_common_sw_init +ffffffff8225ea90 t vi_common_sw_fini +ffffffff8225eac0 t vi_common_hw_init +ffffffff8225f280 t vi_common_hw_fini +ffffffff8225f300 t vi_common_suspend +ffffffff8225f380 t vi_common_resume +ffffffff8225f3c0 t vi_common_is_idle +ffffffff8225f3f0 t vi_common_wait_for_idle +ffffffff8225f420 t vi_common_soft_reset +ffffffff8225f450 t vi_common_set_clockgating_state +ffffffff8225fa50 t vi_common_set_powergating_state +ffffffff8225fa80 t vi_common_get_clockgating_state +ffffffff8225fb70 t cz_smc_rreg +ffffffff8225fc10 t cz_smc_wreg +ffffffff8225fc90 t vi_smc_rreg +ffffffff8225fd40 t vi_smc_wreg +ffffffff8225fdd0 t vi_pcie_rreg +ffffffff8225fe90 t vi_pcie_wreg +ffffffff8225ff50 t vi_uvd_ctx_rreg +ffffffff82260000 t vi_uvd_ctx_wreg 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convert_dc_color_depth_into_bpc +ffffffff82267880 t dm_encoder_helper_disable +ffffffff822678b0 t dm_encoder_helper_atomic_check +ffffffff82267ac0 T amdgpu_dm_connector_init_helper +ffffffff82267e70 T amdgpu_dm_get_encoder_crtc_mask +ffffffff82267ec0 T dm_restore_drm_connector_state +ffffffff82268060 t parse_hdmi_amd_vsdb +ffffffff82268400 T amdgpu_dm_trigger_timing_sync +ffffffff822685e0 T dm_write_reg_func +ffffffff82268650 T dm_read_reg_func +ffffffff82268740 T amdgpu_dm_process_dmub_aux_transfer_sync +ffffffff822689b0 T amdgpu_dm_process_dmub_set_config_sync +ffffffff82268b50 T dm_execute_dmub_cmd +ffffffff82268b70 T dm_execute_dmub_cmd_list +ffffffff82268b90 t dm_early_init +ffffffff82269010 t dm_late_init +ffffffff82269320 t dm_sw_init +ffffffff82269e70 t dm_sw_fini +ffffffff82269fc0 t amdgpu_dm_early_fini +ffffffff8226a020 t dm_hw_init +ffffffff8226c480 t dm_hw_fini +ffffffff8226c4f0 t dm_suspend +ffffffff8226c950 t dm_resume +ffffffff8226d480 t dm_is_idle +ffffffff8226d4b0 t dm_wait_for_idle +ffffffff8226d4e0 t dm_check_soft_reset +ffffffff8226d510 t dm_soft_reset +ffffffff8226d540 t dm_set_clockgating_state +ffffffff8226d570 t dm_set_powergating_state +ffffffff8226d5a0 t dm_bandwidth_update +ffffffff8226d5d0 t dm_vblank_get_counter +ffffffff8226d650 t dm_crtc_get_scanoutpos +ffffffff8226d790 t amdgpu_dm_dmub_reg_read +ffffffff8226d880 t amdgpu_dm_dmub_reg_write +ffffffff8226d900 t dm_dmub_hw_init +ffffffff8226ddf0 t dmub_aux_setconfig_callback +ffffffff8226dea0 t amdgpu_dm_fini +ffffffff8226e150 t aux_hpd_discon_callback +ffffffff8226e180 t edp0_on_dp1_callback +ffffffff8226e1b0 t emulated_link_detect +ffffffff8226e330 t amdgpu_dm_atomic_check +ffffffff8226f5c0 t dm_crtc_get_cursor_mode +ffffffff8226fc20 t __get_next_zpos +ffffffff8226fd00 t dm_update_plane_state +ffffffff82270450 t dm_update_crtc_state +ffffffff82270e90 t is_scaling_state_different +ffffffff82270f30 t do_aquire_global_lock +ffffffff82271200 t dm_update_mst_vcpi_slots_for_dsc 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dm_helpers_dp_write_dsc_enable +ffffffff82281690 T dm_helpers_is_dp_sink_present +ffffffff82281740 T dm_helpers_read_local_edid +ffffffff822819a0 T dm_helper_dmub_aux_transfer_sync +ffffffff822819f0 T dm_helpers_dmub_set_config_sync +ffffffff82281a10 T dm_set_dcn_clocks +ffffffff82281a40 T dm_helpers_smu_timeout +ffffffff82281a70 T dm_helpers_init_panel_settings +ffffffff82281ae0 T dm_helpers_override_panel_settings +ffffffff82281b20 T dm_helpers_allocate_gpu_mem +ffffffff82281b40 T dm_helpers_free_gpu_mem +ffffffff82281b60 T dm_helpers_dmub_outbox_interrupt_control +ffffffff82281bf0 T dm_helpers_mst_enable_stream_features +ffffffff82281ce0 T dm_helpers_dp_handle_test_pattern_request +ffffffff822820e0 T dm_set_phyd32clk +ffffffff82282110 T dm_helpers_enable_periodic_detection +ffffffff822821a0 T dm_helpers_dp_mst_update_branch_bandwidth +ffffffff822821d0 T dm_get_adaptive_sync_support_type +ffffffff82282240 T dm_helpers_is_fullscreen +ffffffff82282270 T dm_helpers_is_hdr_on +ffffffff822822a0 t execute_synaptics_rc_command +ffffffff82283000 T amdgpu_dm_irq_register_interrupt +ffffffff822831c0 t dm_irq_work_func +ffffffff822831e0 T amdgpu_dm_irq_unregister_interrupt +ffffffff822833e0 T amdgpu_dm_irq_init +ffffffff822834e0 T amdgpu_dm_irq_fini +ffffffff822836b0 T amdgpu_dm_irq_suspend +ffffffff82283800 T amdgpu_dm_irq_resume_early +ffffffff822839d0 T amdgpu_dm_irq_resume_late +ffffffff82283ba0 T amdgpu_dm_set_irq_funcs +ffffffff82283c60 T amdgpu_dm_outbox_init +ffffffff82283c90 T amdgpu_dm_hpd_init +ffffffff82283df0 T amdgpu_dm_hpd_fini +ffffffff82283f50 t amdgpu_dm_set_crtc_irq_state +ffffffff82284030 t amdgpu_dm_irq_handler +ffffffff82284280 t amdgpu_dm_set_vline0_irq_state +ffffffff82284360 t amdgpu_dm_set_dmub_outbox_irq_state +ffffffff822843c0 t amdgpu_dm_set_vupdate_irq_state +ffffffff822844a0 t amdgpu_dm_set_dmub_trace_irq_state +ffffffff82284500 t amdgpu_dm_set_pflip_irq_state +ffffffff822845e0 t amdgpu_dm_set_hpd_irq_state +ffffffff82285000 T needs_dsc_aux_workaround +ffffffff82285050 T dm_dp_create_fake_mst_encoders +ffffffff82285110 T dm_handle_mst_sideband_msg_ready_event +ffffffff822853b0 T amdgpu_dm_initialize_dp_connector +ffffffff822854d0 t kasprintf +ffffffff822855b0 t dm_dp_aux_transfer +ffffffff82285700 T dm_mst_get_pbn_divider +ffffffff82285770 T compute_mst_dsc_configs_for_state +ffffffff82285a80 t is_dsc_need_re_compute +ffffffff82285e90 t compute_mst_dsc_configs_for_link +ffffffff82286840 T pre_validate_dsc +ffffffff82286f30 T dm_dp_mst_is_port_support_mode +ffffffff82287410 t dp_get_link_current_set_bw +ffffffff82287540 t amdgpu_dm_encoder_destroy +ffffffff82287550 t dm_dp_add_mst_connector +ffffffff822877b0 t dm_handle_mst_down_rep_msg_ready +ffffffff822877d0 t amdgpu_dm_mst_connector_late_register +ffffffff82287820 t amdgpu_dm_mst_connector_early_unregister +ffffffff82287940 t dm_dp_mst_connector_destroy +ffffffff822879e0 t dm_dp_mst_get_modes +ffffffff82287fa0 t dm_dp_mst_detect +ffffffff822881d0 t dm_mst_atomic_best_encoder +ffffffff82288230 t dm_dp_mst_atomic_check +ffffffff82288260 t set_dsc_configs_from_fairness_vars +ffffffff82288550 t log_dsc_params +ffffffff822885f0 t increase_dsc_bpp +ffffffff82288bb0 t try_disable_dsc +ffffffff82289000 T amdgpu_dm_plane_get_format_info +ffffffff82289020 T amdgpu_dm_plane_fill_blending_from_plane_state +ffffffff82289110 T amdgpu_dm_plane_fill_plane_buffer_attributes +ffffffff822898f0 T amdgpu_dm_plane_helper_check_state +ffffffff82289b10 T amdgpu_dm_plane_fill_dc_scaling_info +ffffffff82289d70 T amdgpu_dm_plane_get_cursor_position +ffffffff82289ea0 T amdgpu_dm_plane_handle_cursor_update +ffffffff8228a1e0 T amdgpu_dm_plane_init +ffffffff8228b460 T amdgpu_dm_plane_is_video_format +ffffffff8228b4b0 t amdgpu_dm_plane_drm_plane_reset +ffffffff8228b5c0 t amdgpu_dm_plane_drm_plane_duplicate_state +ffffffff8228b740 t amdgpu_dm_plane_drm_plane_destroy_state +ffffffff8228b7d0 t amdgpu_dm_plane_format_mod_supported +ffffffff8228b910 t amdgpu_dm_plane_helper_prepare_fb +ffffffff8228bc70 t amdgpu_dm_plane_helper_cleanup_fb +ffffffff8228bd20 t amdgpu_dm_plane_atomic_check +ffffffff8228be10 t amdgpu_dm_plane_atomic_async_check +ffffffff8228be80 t amdgpu_dm_plane_atomic_async_update +ffffffff8228bf30 t amdgpu_bo_reserve +ffffffff8228c170 t amdgpu_bo_unreserve +ffffffff8228d000 T dm_pp_apply_display_requirements +ffffffff8228d1f0 T dm_pp_get_clock_levels_by_type +ffffffff8228d5b0 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff8228d7a0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff8228d990 T dm_pp_notify_wm_clock_changes +ffffffff8228d9f0 T dm_pp_apply_power_level_change_request +ffffffff8228da20 T dm_pp_apply_clock_for_voltage_request +ffffffff8228dad0 T dm_pp_get_static_clocks +ffffffff8228dba0 T dm_pp_get_funcs +ffffffff8228dcb0 t pp_rv_set_wm_ranges +ffffffff8228de40 t pp_rv_set_pme_wa_enable +ffffffff8228de60 t pp_rv_set_active_display_count +ffffffff8228de80 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff8228dea0 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff8228dec0 t pp_rv_set_hard_min_fclk_by_freq +ffffffff8228dee0 t pp_nv_set_display_count +ffffffff8228df40 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff8228dfb0 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff8228e010 t pp_nv_set_voltage_by_freq +ffffffff8228e0b0 t pp_nv_set_wm_ranges +ffffffff8228e100 t pp_nv_set_hard_min_uclk_by_freq +ffffffff8228e170 t pp_nv_get_maximum_sustainable_clocks +ffffffff8228e1d0 t pp_nv_get_uclk_dpm_states +ffffffff8228e230 t pp_nv_set_pstate_handshake_support +ffffffff8228e290 t pp_rn_set_wm_ranges +ffffffff8228e2e0 t pp_rn_get_dpm_clock_table +ffffffff8228f000 T amdgpu_dm_set_psr_caps +ffffffff8228f100 T amdgpu_dm_link_setup_psr +ffffffff8228f2c0 T amdgpu_dm_psr_enable +ffffffff8228f430 T amdgpu_dm_psr_disable +ffffffff8228f4b0 T amdgpu_dm_psr_disable_all +ffffffff8228f500 T amdgpu_dm_psr_is_active_allowed +ffffffff8228f590 T amdgpu_dm_psr_wait_disable +ffffffff82290000 T amdgpu_dm_link_supports_replay +ffffffff82290080 T amdgpu_dm_set_replay_caps +ffffffff822901b0 T amdgpu_dm_link_setup_replay +ffffffff82290240 T amdgpu_dm_replay_enable +ffffffff82290350 T amdgpu_dm_replay_disable +ffffffff82290400 T amdgpu_dm_replay_disable_all +ffffffff82291000 T dm_get_elapse_time_in_ns +ffffffff82291030 T dm_perf_trace_timestamp +ffffffff82291060 T dm_trace_smu_msg +ffffffff82291090 T dm_trace_smu_delay +ffffffff82292000 T amdgpu_dm_wb_connector_init +ffffffff82293000 T dc_assert_fp_enabled +ffffffff82293080 T dc_fpu_begin +ffffffff82293130 T dc_fpu_end +ffffffff82294000 T dal_vector_construct +ffffffff822940e0 T dal_vector_presized_create +ffffffff82294390 T dal_vector_create +ffffffff822944c0 T dal_vector_destruct +ffffffff82294520 T dal_vector_destroy +ffffffff822945b0 T dal_vector_get_count +ffffffff822945e0 T dal_vector_at_index +ffffffff82294620 T dal_vector_remove_at_index +ffffffff822946c0 T dal_vector_set_at_index +ffffffff82294720 T dal_vector_insert_at +ffffffff82294850 T dal_vector_reserve +ffffffff82294910 T dal_vector_append +ffffffff82294a40 T dal_vector_clone +ffffffff82294b00 T dal_vector_capacity +ffffffff82294b30 T dal_vector_clear +ffffffff82295000 T bw_int_to_fixed_nonconst +ffffffff822950a0 T bw_frc_to_fixed +ffffffff82295290 T bw_floor2 +ffffffff82295350 T bw_ceil2 +ffffffff822953d0 T bw_mul +ffffffff82296000 T fixed_point_to_int_frac +ffffffff82296220 T convert_float_matrix +ffffffff822962f0 T convert_hw_matrix +ffffffff822963c0 T reduce_fraction +ffffffff82297000 T convert_to_custom_float_format +ffffffff82298000 T is_rgb_cspace +ffffffff82298080 T is_lower_pipe_tree_visible +ffffffff822980f0 T is_upper_pipe_tree_visible +ffffffff82298160 T is_pipe_tree_visible +ffffffff822981f0 T build_prescale_params +ffffffff82299000 T bw_calcs_init +ffffffff82299f30 T bw_calcs +ffffffff8229be40 t calculate_bandwidth +ffffffff822a5000 T dc_fixpt_from_fraction +ffffffff822a51e0 T dc_fixpt_mul +ffffffff822a53a0 T dc_fixpt_sqr +ffffffff822a5530 T dc_fixpt_recip +ffffffff822a55a0 T dc_fixpt_sinc +ffffffff822a57e0 T dc_fixpt_sin +ffffffff822a5810 T dc_fixpt_cos +ffffffff822a5930 T dc_fixpt_exp +ffffffff822a5c50 t fixed31_32_exp_from_taylor_series +ffffffff822a6120 T dc_fixpt_log +ffffffff822a6360 T dc_fixpt_u4d19 +ffffffff822a63a0 T dc_fixpt_u3d19 +ffffffff822a63e0 T dc_fixpt_u2d19 +ffffffff822a6420 T dc_fixpt_u0d19 +ffffffff822a6450 T dc_fixpt_clamp_u0d14 +ffffffff822a64a0 T dc_fixpt_clamp_u0d10 +ffffffff822a64f0 T dc_fixpt_s4d19 +ffffffff822a6550 T dc_fixpt_from_ux_dy +ffffffff822a6590 T dc_fixpt_from_int_dy +ffffffff822a7000 T bios_parser_create +ffffffff822a8370 t bios_parser_get_connectors_number +ffffffff822a83d0 t bios_parser_get_connector_id +ffffffff822a8480 t bios_parser_get_src_obj +ffffffff822a85b0 t bios_parser_get_i2c_info +ffffffff822a87f0 t bios_parser_get_hpd_info +ffffffff822a88e0 t bios_parser_get_device_tag +ffffffff822a8af0 t bios_parser_get_spread_spectrum_info +ffffffff822a8d10 t bios_parser_get_ss_entry_number +ffffffff822a8f80 t bios_parser_get_embedded_panel_info +ffffffff822a9510 t bios_parser_get_gpio_pin_info +ffffffff822a9630 t bios_parser_get_encoder_cap_info +ffffffff822a9740 t bios_parser_set_scratch_critical_state +ffffffff822a9750 t bios_parser_is_device_id_supported +ffffffff822a9810 t bios_parser_encoder_control +ffffffff822a9850 t bios_parser_transmitter_control +ffffffff822a9890 t bios_parser_enable_crtc +ffffffff822a98e0 t bios_parser_adjust_pixel_clock +ffffffff822a9920 t bios_parser_set_pixel_clock +ffffffff822a9960 t bios_parser_set_dce_clock +ffffffff822a99a0 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff822a99f0 t bios_parser_program_crtc_timing +ffffffff822a9a30 t bios_parser_program_display_engine_pll +ffffffff822a9a70 t bios_parser_enable_disp_power_gating +ffffffff822a9ab0 t bios_parser_destroy +ffffffff822a9b80 t bios_get_board_layout_info +ffffffff822a9e60 t get_bios_object +ffffffff822aa040 t get_ss_info_from_ss_info_table +ffffffff822aa230 t get_ss_info_v3_1 +ffffffff822aa3c0 t get_ss_entry_number_from_ss_info_tbl +ffffffff822ab000 T firmware_parser_create +ffffffff822ad1a0 t bios_parser_get_soc_bb_info +ffffffff822ad2b0 t bios_parser_get_connectors_number +ffffffff822ad420 t bios_parser_get_connector_id +ffffffff822ad480 t bios_parser_get_src_obj +ffffffff822ad760 t bios_parser_get_i2c_info +ffffffff822ada30 t bios_parser_get_hpd_info +ffffffff822adbd0 t bios_parser_get_device_tag +ffffffff822adeb0 t bios_parser_get_spread_spectrum_info +ffffffff822ae360 t bios_parser_get_ss_entry_number +ffffffff822ae390 t bios_parser_get_embedded_panel_info +ffffffff822ae5a0 t bios_parser_get_gpio_pin_info +ffffffff822ae6c0 t bios_parser_get_encoder_cap_info +ffffffff822ae830 t bios_parser_is_accelerated_mode +ffffffff822ae840 t bios_parser_set_scratch_critical_state +ffffffff822ae850 t bios_parser_is_device_id_supported +ffffffff822ae8c0 t bios_parser_encoder_control +ffffffff822ae900 t bios_parser_transmitter_control +ffffffff822ae940 t bios_parser_enable_crtc +ffffffff822ae990 t bios_parser_set_pixel_clock +ffffffff822ae9d0 t bios_parser_set_dce_clock +ffffffff822aea10 t bios_parser_program_crtc_timing +ffffffff822aea50 t bios_parser_enable_disp_power_gating +ffffffff822aea90 t firmware_parser_destroy +ffffffff822aeb60 t bios_get_board_layout_info +ffffffff822af0a0 t bios_parser_pack_data_tables +ffffffff822af0d0 t bios_get_atom_dc_golden_table +ffffffff822af230 t bios_parser_enable_lvtma_control +ffffffff822af280 t bios_parser_get_disp_connector_caps_info +ffffffff822af400 t bios_parser_get_lttpr_caps +ffffffff822af570 t bios_parser_get_lttpr_interop +ffffffff822af6d0 t bios_parser_get_connector_speed_cap_info +ffffffff822af820 t get_bios_object +ffffffff822af990 t get_bios_object_from_path_v3 +ffffffff822b0000 T object_id_from_bios_object_id +ffffffff822b1000 T bios_get_image +ffffffff822b1050 T bios_is_accelerated_mode +ffffffff822b10b0 T bios_set_scratch_acc_mode_change +ffffffff822b10f0 T bios_set_scratch_critical_state +ffffffff822b1130 T bios_get_vga_enabled_displays +ffffffff822b2000 T dal_bios_parser_create +ffffffff822b2070 T dal_bios_parser_destroy +ffffffff822b3000 T dal_bios_parser_init_cmd_tbl +ffffffff822b38f0 t encoder_control_digx_v3 +ffffffff822b3a10 t encoder_control_digx_v4 +ffffffff822b3b30 t encoder_control_digx_v5 +ffffffff822b3ca0 t encoder_control_dig1_v1 +ffffffff822b3d40 t encoder_control_dig2_v1 +ffffffff822b3de0 t encoder_control_dig_v1 +ffffffff822b3e40 t transmitter_control_v2 +ffffffff822b3ff0 t transmitter_control_v3 +ffffffff822b41c0 t transmitter_control_v4 +ffffffff822b4390 t transmitter_control_v1_5 +ffffffff822b4540 t transmitter_control_v1_6 +ffffffff822b46c0 t set_pixel_clock_v3 +ffffffff822b4860 t set_pixel_clock_v5 +ffffffff822b4a30 t set_pixel_clock_v6 +ffffffff822b4c00 t set_pixel_clock_v7 +ffffffff822b4e10 t enable_spread_spectrum_on_ppll_v1 +ffffffff822b4f30 t enable_spread_spectrum_on_ppll_v2 +ffffffff822b5070 t enable_spread_spectrum_on_ppll_v3 +ffffffff822b5190 t adjust_display_pll_v2 +ffffffff822b5300 t adjust_display_pll_v3 +ffffffff822b54a0 t dac1_encoder_control_v1 +ffffffff822b5520 t dac2_encoder_control_v1 +ffffffff822b55a0 t dac1_output_control_v1 +ffffffff822b5610 t dac2_output_control_v1 +ffffffff822b5680 t set_crtc_using_dtd_timing_v3 +ffffffff822b57f0 t set_crtc_timing_v1 +ffffffff822b5990 t enable_crtc_v1 +ffffffff822b5a40 t enable_crtc_mem_req_v1 +ffffffff822b5af0 t program_clock_v5 +ffffffff822b5c10 t program_clock_v6 +ffffffff822b5d50 t external_encoder_control_v3 +ffffffff822b5f20 t enable_disp_power_gating_v2_1 +ffffffff822b6010 t set_dce_clock_v2_1 +ffffffff822b7000 T dal_firmware_parser_init_cmd_tbl +ffffffff822b7490 t encoder_control_digx_v1_5 +ffffffff822b7680 t encoder_control_fallback +ffffffff822b76e0 t transmitter_control_v1_6 +ffffffff822b78b0 t transmitter_control_v1_7 +ffffffff822b7ae0 t transmitter_control_fallback +ffffffff822b7b40 t set_pixel_clock_v7 +ffffffff822b7dd0 t set_pixel_clock_fallback +ffffffff822b7e30 t set_crtc_using_dtd_timing_v3 +ffffffff822b7fa0 t enable_crtc_v1 +ffffffff822b8050 t external_encoder_control_v3 +ffffffff822b8080 t enable_disp_power_gating_v2_1 +ffffffff822b8200 t enable_disp_power_gating_fallback +ffffffff822b8260 t set_dce_clock_v2_1 +ffffffff822b83b0 t get_smu_clock_info_v3_1 +ffffffff822b8420 t enable_lvtma_control +ffffffff822b9000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff822b90c0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff822b91c0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff822b9240 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff822b92d0 T dal_cmd_table_helper_assign_control_parameter +ffffffff822b93b0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff822b9490 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff822ba000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff822ba0d0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff822ba1c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff822ba240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff822ba2d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff822ba3b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff822bb000 T dal_cmd_tbl_helper_dce110_get_table ffffffff822bb030 t encoder_action_to_atom ffffffff822bb0a0 t engine_bp_to_atom ffffffff822bb0f0 t clock_source_id_to_atom -ffffffff822bb1c0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff822bb210 t signal_type_to_atom_dig_mode -ffffffff822bb270 t hpd_sel_to_atom -ffffffff822bb2b0 t dig_encoder_sel_to_atom -ffffffff822bb300 t phy_id_to_atom -ffffffff822bb340 t disp_power_gating_action_to_atom -ffffffff822bc000 T clk_mgr_helper_get_active_display_cnt -ffffffff822bc0c0 T clk_mgr_helper_get_active_plane_cnt -ffffffff822bc170 T clk_mgr_exit_optimized_pwr_state -ffffffff822bc2a0 T clk_mgr_optimize_pwr_state -ffffffff822bc3b0 T dc_clk_mgr_create -ffffffff822bcc50 T dc_destroy_clk_mgr -ffffffff822bd000 T dentist_get_divider_from_did -ffffffff822bd070 T dce_adjust_dp_ref_freq_for_ss -ffffffff822bd190 T dce_get_dp_ref_freq_khz -ffffffff822bd2e0 T dce12_get_dp_ref_freq_khz -ffffffff822bd300 T dce_get_max_pixel_clock_for_all_paths -ffffffff822bd510 T dce_get_required_clocks_state -ffffffff822bd5c0 T dce_set_clock -ffffffff822bd730 T dce_clock_read_ss_info -ffffffff822bd870 T dce_clk_mgr_construct -ffffffff822bda70 t dce_update_clocks -ffffffff822be000 T dce110_get_min_vblank_time_us -ffffffff822be090 T dce110_fill_display_configs -ffffffff822be310 T dce11_pplib_apply_display_requirements -ffffffff822be630 T dce110_clk_mgr_construct -ffffffff822be6e0 t dce11_update_clocks -ffffffff822bf000 T dce112_set_clock -ffffffff822bf1a0 T dce112_set_dispclk -ffffffff822bf2d0 T dce112_set_dprefclk -ffffffff822bf350 T dce112_clk_mgr_construct -ffffffff822bf410 t dce112_update_clocks -ffffffff822c0000 T dce120_clk_mgr_construct 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dcn32_is_dp_dig_pixel_rate_div_policy -ffffffff825d43f0 T dcn32_calculate_pix_rate_divider -ffffffff825d44b0 T dcn32_resync_fifo_dccg_dio -ffffffff825d47c0 T dcn32_unblank_stream -ffffffff825d49d0 T dcn32_disable_link_output -ffffffff825d4dd0 T dcn32_update_phantom_vp_position -ffffffff825d4f40 T dcn32_apply_update_flags_for_phantom -ffffffff825d4fc0 T dcn32_dsc_pg_status -ffffffff825d50a0 T dcn32_update_dsc_pg -ffffffff825d51b0 T dcn32_disable_phantom_streams -ffffffff825d5360 T dcn32_enable_phantom_streams -ffffffff825d5650 T dcn32_init_blank -ffffffff825d58f0 T dcn32_blank_phantom -ffffffff825d5aa0 T dcn32_is_pipe_topology_transition_seamless -ffffffff825d5d50 T dcn32_prepare_bandwidth -ffffffff825d5e60 T dcn32_interdependent_update_lock -ffffffff825d5f90 T dcn32_program_outstanding_updates -ffffffff825d6000 T dcn32_hw_sequencer_init_functions -ffffffff825d7000 T dcn35_set_dmu_fgcg -ffffffff825d70b0 T dcn35_setup_hpo_hw_control -ffffffff825d70f0 T dcn35_init_hw -ffffffff825d7930 T dcn35_update_odm -ffffffff825d8000 T dcn35_dpp_root_clock_control -ffffffff825d8060 T dcn35_dpstream_root_clock_control -ffffffff825d80c0 T dcn35_physymclk_root_clock_control -ffffffff825d8120 T dcn35_dsc_pg_control -ffffffff825d84a0 T dcn35_enable_power_gating_plane -ffffffff825d8750 T dcn35_power_down_on_boot -ffffffff825d8920 T dcn35_apply_idle_power_optimizations -ffffffff825d8a60 T dcn35_z10_restore -ffffffff825d8ac0 T dcn35_init_pipes -ffffffff825d9330 T dcn35_enable_plane -ffffffff825d9470 T dcn35_plane_atomic_disable -ffffffff825d95d0 T dcn35_disable_plane -ffffffff825d9700 T dcn35_calc_blocks_to_gate -ffffffff825d9af0 T dcn35_calc_blocks_to_ungate -ffffffff825d9f40 T dcn35_hw_block_power_down -ffffffff825da130 T dcn35_hw_block_power_up -ffffffff825da300 T dcn35_root_clock_control -ffffffff825da5c0 T dcn35_prepare_bandwidth -ffffffff825da670 T dcn35_optimize_bandwidth -ffffffff825da720 T dcn35_set_drr -ffffffff825da8a0 T dcn35_set_static_screen_control -ffffffff825da950 T dcn35_set_long_vblank -ffffffff825daa20 T dcn35_is_dp_dig_pixel_rate_div_policy -ffffffff825db000 T dcn35_hw_sequencer_construct -ffffffff825dc000 T dcn351_calc_blocks_to_gate -ffffffff825dc0f0 T dcn351_calc_blocks_to_ungate -ffffffff825dc1e0 T dcn351_hw_block_power_down -ffffffff825dc2f0 T dcn351_hw_block_power_up -ffffffff825dd000 T dcn351_hw_sequencer_construct -ffffffff825de000 T dcn401_program_gamut_remap -ffffffff825de4b0 T dcn401_read_ono_state -ffffffff825de670 T dcn401_init_hw -ffffffff825df1e0 T dcn401_setup_hpo_hw_control -ffffffff825df220 T dcn401_populate_mcm_luts -ffffffff825df830 T dcn401_trigger_3dlut_dma_load -ffffffff825df880 T dcn401_set_mcm_luts -ffffffff825dfa60 T dcn401_set_output_transfer_func -ffffffff825dfbf0 T dcn401_calculate_dccg_tmds_div_value -ffffffff825dfc60 T dcn401_enable_stream_timing -ffffffff825e0300 T dcn401_enable_stream -ffffffff825e0600 T adjust_hotspot_between_slices_for_2x_magnify -ffffffff825e0640 T dcn401_set_cursor_position -ffffffff825e0aa0 T dcn401_apply_idle_power_optimizations -ffffffff825e0da0 T dcn401_wait_for_dcc_meta_propagation -ffffffff825e0e20 T dcn401_prepare_bandwidth -ffffffff825e1040 T dcn401_fams2_global_control_lock -ffffffff825e10b0 T dcn401_fams2_update_config -ffffffff825e1110 T dcn401_optimize_bandwidth -ffffffff825e1370 T dcn401_fams2_global_control_lock_fast -ffffffff825e13d0 T dcn401_update_odm -ffffffff825e17e0 T dcn401_unblank_stream -ffffffff825e1960 T dcn401_hardware_release -ffffffff825e1a40 T dcn401_wait_for_det_buffer_update -ffffffff825e1b80 T dcn401_interdependent_update_lock -ffffffff825e1ea0 T dcn401_program_outstanding_updates -ffffffff825e2000 T dcn401_hw_sequencer_init_functions -ffffffff825e3000 T dal_irq_service_dummy_set -ffffffff825e3090 T dal_irq_service_dummy_ack -ffffffff825e3110 T dce110_vblank_set -ffffffff825e3230 T to_dal_irq_source_dce110 -ffffffff825e33b0 T dal_irq_service_dce110_create -ffffffff825e3440 t hpd_ack -ffffffff825e4000 T dal_irq_service_dce120_create -ffffffff825e4090 t hpd_ack -ffffffff825e5000 T dal_irq_service_dce80_create -ffffffff825e5090 t hpd_ack -ffffffff825e6000 T dal_irq_service_dcn10_create -ffffffff825e6090 t hpd_ack -ffffffff825e6160 t to_dal_irq_source_dcn10 -ffffffff825e7000 T dal_irq_service_dcn20_create +ffffffff822bb190 t clock_source_id_to_atom_phy_clk_src_id +ffffffff822bb1e0 t signal_type_to_atom_dig_mode +ffffffff822bb240 t hpd_sel_to_atom +ffffffff822bb280 t dig_encoder_sel_to_atom +ffffffff822bb2b0 t phy_id_to_atom +ffffffff822bb2f0 t disp_power_gating_action_to_atom +ffffffff822bc000 T dal_cmd_tbl_helper_dce112_get_table2 +ffffffff822bc030 t encoder_action_to_atom +ffffffff822bc0a0 t engine_bp_to_atom +ffffffff822bc0f0 t clock_source_id_to_atom +ffffffff822bc1c0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff822bc210 t signal_type_to_atom_dig_mode +ffffffff822bc270 t hpd_sel_to_atom +ffffffff822bc2b0 t dig_encoder_sel_to_atom +ffffffff822bc2e0 t phy_id_to_atom +ffffffff822bc320 t disp_power_gating_action_to_atom +ffffffff822bc390 t dc_clock_type_to_atom +ffffffff822bc410 t transmitter_color_depth_to_atom +ffffffff822bd000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff822bd030 t encoder_action_to_atom +ffffffff822bd0a0 t engine_bp_to_atom +ffffffff822bd0f0 t clock_source_id_to_atom +ffffffff822bd1c0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff822bd210 t signal_type_to_atom_dig_mode +ffffffff822bd270 t hpd_sel_to_atom +ffffffff822bd2b0 t dig_encoder_sel_to_atom +ffffffff822bd2e0 t phy_id_to_atom +ffffffff822bd320 t disp_power_gating_action_to_atom +ffffffff822bd390 t dc_clock_type_to_atom +ffffffff822bd410 t transmitter_color_depth_to_atom +ffffffff822be000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff822be030 t encoder_action_to_atom +ffffffff822be0a0 t engine_bp_to_atom +ffffffff822be0f0 t clock_source_id_to_atom +ffffffff822be1c0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff822be210 t signal_type_to_atom_dig_mode +ffffffff822be270 t hpd_sel_to_atom +ffffffff822be2b0 t dig_encoder_sel_to_atom +ffffffff822be300 t phy_id_to_atom +ffffffff822be340 t disp_power_gating_action_to_atom +ffffffff822bf000 T clk_mgr_helper_get_active_display_cnt +ffffffff822bf0c0 T clk_mgr_helper_get_active_plane_cnt +ffffffff822bf170 T clk_mgr_exit_optimized_pwr_state +ffffffff822bf2a0 T clk_mgr_optimize_pwr_state +ffffffff822bf3b0 T dc_clk_mgr_create +ffffffff822bfc50 T dc_destroy_clk_mgr +ffffffff822c0000 T dentist_get_divider_from_did +ffffffff822c0070 T dce_adjust_dp_ref_freq_for_ss +ffffffff822c0190 T dce_get_dp_ref_freq_khz +ffffffff822c02e0 T dce12_get_dp_ref_freq_khz +ffffffff822c0300 T dce_get_max_pixel_clock_for_all_paths +ffffffff822c0510 T dce_get_required_clocks_state +ffffffff822c05c0 T dce_set_clock +ffffffff822c0730 T dce_clock_read_ss_info +ffffffff822c0870 T dce_clk_mgr_construct +ffffffff822c0a70 t dce_update_clocks +ffffffff822c1000 T dce110_get_min_vblank_time_us +ffffffff822c1090 T dce110_fill_display_configs +ffffffff822c1310 T dce11_pplib_apply_display_requirements +ffffffff822c1630 T dce110_clk_mgr_construct +ffffffff822c16e0 t dce11_update_clocks +ffffffff822c2000 T dce112_set_clock +ffffffff822c21a0 T dce112_set_dispclk +ffffffff822c22d0 T dce112_set_dprefclk +ffffffff822c2350 T dce112_clk_mgr_construct +ffffffff822c2410 t dce112_update_clocks +ffffffff822c3000 T dce120_clk_mgr_construct +ffffffff822c30a0 T dce121_clk_mgr_construct +ffffffff822c31e0 t dce12_update_clocks +ffffffff822c4000 T rv1_clk_mgr_construct +ffffffff822c40d0 t rv1_update_clocks +ffffffff822c4610 t rv1_init_clocks +ffffffff822c46c0 t rv1_enable_pme_wa +ffffffff822c5000 T rv1_vbios_smu_set_dispclk +ffffffff822c50f0 t rv1_vbios_smu_send_msg_with_param +ffffffff822c5230 T rv1_vbios_smu_set_dprefclk +ffffffff822c6000 T rv2_clk_mgr_construct +ffffffff822c7000 T dentist_get_did_from_divider +ffffffff822c7080 T dcn20_update_clocks_update_dpp_dto +ffffffff822c7160 T dcn20_update_clocks_update_dentist +ffffffff822c76f0 T dcn2_update_clocks +ffffffff822c7ce0 T dcn2_read_clocks_from_hw_dentist +ffffffff822c7dd0 T dcn2_update_clocks_fpga +ffffffff822c7f00 T dcn2_init_clocks +ffffffff822c7fb0 T dcn2_get_clock +ffffffff822c8020 T dcn20_clk_mgr_construct +ffffffff822c8170 t dcn2_enable_pme_wa +ffffffff822c81c0 t dcn2_are_clock_states_equal +ffffffff822c8230 t dcn2_notify_link_rate_change +ffffffff822c9000 T dcn201_clk_mgr_construct +ffffffff822c9130 t dcn201_update_clocks +ffffffff822c9360 t dcn201_init_clocks +ffffffff822ca000 T rn_clk_mgr_construct +ffffffff822ca9a0 t rn_update_clocks +ffffffff822cafa0 t rn_set_low_power_state +ffffffff822cb190 t rn_init_clocks +ffffffff822cb240 t rn_enable_pme_wa +ffffffff822cb250 t rn_are_clock_states_equal +ffffffff822cb2a0 t rn_notify_wm_ranges +ffffffff822cb610 t rn_notify_link_rate_change +ffffffff822cc000 T rn_vbios_smu_get_smu_version +ffffffff822cc020 t rn_vbios_smu_send_msg_with_param +ffffffff822cc200 T rn_vbios_smu_set_dispclk +ffffffff822cc330 T rn_vbios_smu_set_dprefclk +ffffffff822cc3a0 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff822cc420 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff822cc4a0 T rn_vbios_smu_set_phyclk +ffffffff822cc4e0 T rn_vbios_smu_set_dppclk +ffffffff822cc5a0 T rn_vbios_smu_set_dcn_low_power_state +ffffffff822cc5c0 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff822cc5e0 T rn_vbios_smu_enable_pme_wa +ffffffff822cc600 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff822cd000 T dcn3_init_clocks +ffffffff822cd480 t dcn3_init_clocks_fpga +ffffffff822cd490 T dcn3_clk_mgr_construct +ffffffff822cd650 T dcn3_clk_mgr_destroy +ffffffff822cd6c0 t dcn3_update_clocks +ffffffff822cdb20 t dcn3_enable_pme_wa +ffffffff822cdb60 t dcn3_are_clock_states_equal +ffffffff822cdbc0 t dcn3_notify_wm_ranges +ffffffff822cde70 t dcn30_notify_link_rate_change +ffffffff822cdfa0 t dcn3_set_hard_min_memclk +ffffffff822ce040 t dcn3_set_hard_max_memclk +ffffffff822ce0a0 t dcn3_set_max_memclk +ffffffff822ce0e0 t dcn3_set_min_memclk +ffffffff822ce120 t dcn3_get_memclk_states_from_smu +ffffffff822ce280 t dcn3_is_smu_present +ffffffff822cf000 T dcn30_smu_test_message +ffffffff822cf070 t dcn30_smu_send_msg_with_param +ffffffff822cf2a0 T dcn30_smu_get_smu_version +ffffffff822cf2c0 T dcn30_smu_check_driver_if_version +ffffffff822cf320 T dcn30_smu_check_msg_header_version +ffffffff822cf380 T dcn30_smu_set_dram_addr_high +ffffffff822cf3a0 T dcn30_smu_set_dram_addr_low +ffffffff822cf3c0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff822cf3e0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff822cf400 T dcn30_smu_set_hard_min_by_freq +ffffffff822cf460 T dcn30_smu_set_hard_max_by_freq +ffffffff822cf4c0 T dcn30_smu_get_dpm_freq_by_index +ffffffff822cf520 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff822cf580 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff822cf5a0 T dcn30_smu_set_num_of_displays +ffffffff822cf5c0 T dcn30_smu_set_display_refresh_from_mall +ffffffff822cf5f0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff822cf610 T dcn30_smu_set_pme_workaround +ffffffff822d0000 T dcn301_smu_get_smu_version +ffffffff822d00a0 t dcn301_smu_send_msg_with_param +ffffffff822d0280 T dcn301_smu_set_dispclk +ffffffff822d0340 T dcn301_smu_set_dprefclk +ffffffff822d0410 T dcn301_smu_set_hard_min_dcfclk +ffffffff822d04d0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff822d0590 T dcn301_smu_set_dppclk +ffffffff822d0650 T dcn301_smu_set_display_idle_optimization +ffffffff822d06c0 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff822d0730 T dcn301_smu_enable_pme_wa +ffffffff822d0750 T dcn301_smu_set_dram_addr_high +ffffffff822d07c0 T dcn301_smu_set_dram_addr_low +ffffffff822d0830 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff822d0850 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff822d1000 T vg_clk_mgr_construct +ffffffff822d1920 T vg_clk_mgr_destroy +ffffffff822d1970 t vg_update_clocks +ffffffff822d1cf0 t vg_init_clocks +ffffffff822d1da0 t vg_enable_pme_wa +ffffffff822d1db0 t vg_are_clock_states_equal +ffffffff822d1e00 t vg_notify_wm_ranges +ffffffff822d3000 T dcn31_update_clocks +ffffffff822d36a0 T dcn31_init_clocks +ffffffff822d3760 T dcn31_are_clock_states_equal +ffffffff822d37c0 T dcn31_get_dtb_ref_freq_khz +ffffffff822d37f0 T dcn31_clk_mgr_construct +ffffffff822d3f40 T dcn31_clk_mgr_destroy +ffffffff822d3f90 t dcn31_set_low_power_state +ffffffff822d41b0 t dcn31_enable_pme_wa +ffffffff822d41c0 t dcn31_notify_wm_ranges +ffffffff822d4560 t find_clk_for_voltage +ffffffff822d5000 T dcn31_smu_get_smu_version +ffffffff822d5020 t dcn31_smu_send_msg_with_param +ffffffff822d5290 T dcn31_smu_set_dispclk +ffffffff822d5310 T dcn31_smu_set_dprefclk +ffffffff822d5390 T dcn31_smu_set_hard_min_dcfclk +ffffffff822d5420 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff822d54b0 T dcn31_smu_set_dppclk +ffffffff822d5530 T dcn31_smu_set_display_idle_optimization +ffffffff822d5580 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff822d55d0 T dcn31_smu_enable_pme_wa +ffffffff822d5610 T dcn31_smu_set_dram_addr_high +ffffffff822d5650 T dcn31_smu_set_dram_addr_low +ffffffff822d5690 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff822d56d0 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff822d5710 T dcn31_smu_set_zstate_support +ffffffff822d5780 T dcn31_smu_set_dtbclk +ffffffff822d6000 T dcn314_is_spll_ssc_enabled +ffffffff822d6060 T dcn314_init_clocks +ffffffff822d6170 T dcn314_update_clocks +ffffffff822d6840 T dcn314_are_clock_states_equal +ffffffff822d68a0 T dcn314_clk_mgr_construct +ffffffff822d76d0 T dcn314_clk_mgr_destroy +ffffffff822d7720 t dcn314_enable_pme_wa +ffffffff822d7730 t dcn314_notify_wm_ranges +ffffffff822d8000 T dcn314_smu_get_smu_version +ffffffff822d8020 t dcn314_smu_send_msg_with_param +ffffffff822d82e0 T dcn314_smu_set_dispclk +ffffffff822d8360 T dcn314_smu_set_dprefclk +ffffffff822d83e0 T dcn314_smu_set_hard_min_dcfclk +ffffffff822d8470 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff822d8500 T dcn314_smu_set_dppclk +ffffffff822d8580 T dcn314_smu_set_display_idle_optimization +ffffffff822d85d0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff822d8620 T dcn314_smu_enable_pme_wa +ffffffff822d8660 T dcn314_smu_set_dram_addr_high +ffffffff822d86a0 T dcn314_smu_set_dram_addr_low +ffffffff822d86e0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff822d8720 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff822d8760 T dcn314_smu_set_zstate_support +ffffffff822d87b0 T dcn314_smu_set_dtbclk +ffffffff822d9000 T dcn315_clk_mgr_construct +ffffffff822d9890 T dcn315_clk_mgr_destroy +ffffffff822d98e0 t dcn315_update_clocks +ffffffff822d9ef0 t dcn315_enable_pme_wa +ffffffff822d9f00 t dcn315_notify_wm_ranges +ffffffff822da2a0 t dcn315_disable_otg_wa +ffffffff822db000 T dcn315_smu_get_smu_version +ffffffff822db020 t dcn315_smu_send_msg_with_param +ffffffff822db3d0 T dcn315_smu_set_dispclk +ffffffff822db450 T dcn315_smu_set_hard_min_dcfclk +ffffffff822db4e0 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff822db570 T dcn315_smu_set_dppclk +ffffffff822db5f0 T dcn315_smu_set_display_idle_optimization +ffffffff822db640 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff822db690 T dcn315_smu_enable_pme_wa +ffffffff822db6d0 T dcn315_smu_set_dram_addr_high +ffffffff822db710 T dcn315_smu_set_dram_addr_low +ffffffff822db750 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff822db790 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff822db7d0 T dcn315_smu_get_dpref_clk +ffffffff822db830 T dcn315_smu_get_dtbclk +ffffffff822db890 T dcn315_smu_set_dtbclk +ffffffff822dc000 T dcn316_clk_mgr_construct +ffffffff822dc6d0 T dcn316_clk_mgr_destroy +ffffffff822dc720 t dcn316_update_clocks +ffffffff822dcd90 t dcn316_enable_pme_wa +ffffffff822dcda0 t dcn316_notify_wm_ranges +ffffffff822dd140 t find_clk_for_voltage +ffffffff822de000 T dcn316_smu_get_smu_version +ffffffff822de020 t dcn316_smu_send_msg_with_param +ffffffff822de200 T dcn316_smu_set_dispclk +ffffffff822de280 T dcn316_smu_set_hard_min_dcfclk +ffffffff822de310 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff822de3a0 T dcn316_smu_set_dppclk +ffffffff822de420 T dcn316_smu_set_display_idle_optimization +ffffffff822de470 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff822de4c0 T dcn316_smu_set_dram_addr_high +ffffffff822de500 T dcn316_smu_set_dram_addr_low +ffffffff822de540 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff822de580 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff822de5c0 T dcn316_smu_enable_pme_wa +ffffffff822de600 T dcn316_smu_set_dtbclk +ffffffff822de640 T dcn316_smu_get_dpref_clk +ffffffff822de6a0 T dcn316_smu_get_smu_fclk +ffffffff822df000 T dcn32_init_clocks +ffffffff822df760 T dcn32_update_clocks_update_dpp_dto +ffffffff822df8a0 T dcn32_clk_mgr_construct +ffffffff822dfbb0 t dcn32_dump_clk_registers +ffffffff822dfe50 T dcn32_clk_mgr_destroy +ffffffff822dfec0 t dcn32_update_clocks +ffffffff822e0a60 t dcn32_enable_pme_wa +ffffffff822e0aa0 t dcn32_are_clock_states_equal +ffffffff822e0b10 t dcn32_notify_wm_ranges +ffffffff822e0ca0 t dcn32_set_hard_min_memclk +ffffffff822e0d30 t dcn32_set_hard_max_memclk +ffffffff822e0d80 t dcn32_set_max_memclk +ffffffff822e0dc0 t dcn32_set_min_memclk +ffffffff822e0e00 t dcn32_get_memclk_states_from_smu +ffffffff822e1090 t dcn32_is_smu_present +ffffffff822e10c0 t dcn32_get_dispclk_from_dentist +ffffffff822e1160 t dcn32_update_clocks_update_dentist +ffffffff822e2000 T dcn32_smu_send_fclk_pstate_message +ffffffff822e2020 t dcn32_smu_send_msg_with_param +ffffffff822e2220 T dcn32_smu_send_cab_for_uclk_message +ffffffff822e2250 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff822e2270 T dcn32_smu_set_pme_workaround +ffffffff822e2290 T dcn32_smu_set_hard_min_by_freq +ffffffff822e25c0 T dcn32_smu_wait_for_dmub_ack_mclk +ffffffff822e3000 T dcn35_update_clocks +ffffffff822e3b80 t dcn35_disable_otg_wa +ffffffff822e3eb0 t dcn35_update_clocks_update_dpp_dto +ffffffff822e4090 T dcn35_are_clock_states_equal +ffffffff822e40f0 T dcn35_init_clocks +ffffffff822e4220 t dcn35_update_clocks_fpga +ffffffff822e44b0 t dcn35_init_clocks_fpga +ffffffff822e4580 T dcn35_clk_mgr_construct +ffffffff822e5810 T dcn35_clk_mgr_destroy +ffffffff822e5860 t dcn35_set_low_power_state +ffffffff822e5a40 t dcn35_exit_low_power_state +ffffffff822e5a50 t dcn35_is_ips_supported +ffffffff822e5aa0 t dcn35_enable_pme_wa +ffffffff822e5ab0 t dcn35_notify_wm_ranges +ffffffff822e6000 T dcn35_smu_get_smu_version +ffffffff822e6020 t dcn35_smu_send_msg_with_param +ffffffff822e6440 T dcn35_smu_set_dispclk +ffffffff822e64c0 T dcn35_smu_set_dprefclk +ffffffff822e6540 T dcn35_smu_set_hard_min_dcfclk +ffffffff822e65c0 T dcn35_smu_set_min_deep_sleep_dcfclk +ffffffff822e6640 T dcn35_smu_set_dppclk +ffffffff822e66c0 T dcn35_smu_set_display_idle_optimization +ffffffff822e6710 T dcn35_smu_enable_phy_refclk_pwrdwn +ffffffff822e6760 T dcn35_smu_enable_pme_wa +ffffffff822e67a0 T dcn35_smu_set_dram_addr_high +ffffffff822e67e0 T dcn35_smu_set_dram_addr_low +ffffffff822e6820 T dcn35_smu_transfer_dpm_table_smu_2_dram +ffffffff822e6860 T dcn35_smu_transfer_wm_table_dram_2_smu +ffffffff822e68a0 T dcn35_smu_set_zstate_support +ffffffff822e68f0 T dcn35_smu_get_dprefclk +ffffffff822e6950 T dcn35_smu_get_dtbclk +ffffffff822e69b0 T dcn35_smu_set_dtbclk +ffffffff822e69f0 T dcn35_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff822e6a30 T dcn35_smu_exit_low_power_state +ffffffff822e6a70 T dcn35_smu_get_ips_supported +ffffffff822e6ab0 T dcn35_smu_notify_host_router_bw +ffffffff822e7000 T dcn351_clk_mgr_construct +ffffffff822e8000 T dcn401_init_clocks +ffffffff822e87c0 T dcn401_clk_mgr_construct +ffffffff822e8ad0 t dcn401_dump_clk_registers +ffffffff822e8d00 T dcn401_clk_mgr_destroy +ffffffff822e8d70 t dcn401_update_clocks +ffffffff822e9d30 t dcn401_get_dtb_ref_freq_khz +ffffffff822e9d80 t dcn401_enable_pme_wa +ffffffff822e9dc0 t dcn401_are_clock_states_equal +ffffffff822e9e30 t dcn401_notify_wm_ranges +ffffffff822e9fc0 t dcn401_set_hard_min_memclk +ffffffff822ea0b0 t dcn401_get_memclk_states_from_smu +ffffffff822ea360 t dcn401_is_smu_present +ffffffff822ea390 t dcn401_get_dispclk_from_dentist +ffffffff822ea430 t dcn401_build_update_bandwidth_clocks_sequence +ffffffff822eac90 t dcn401_execute_block_sequence +ffffffff822eb0c0 t dcn401_set_hard_min_by_freq_optimized +ffffffff822eb260 t dcn401_update_clocks_update_dtb_dto +ffffffff822eb4e0 t dcn401_update_clocks_update_dentist +ffffffff822ec000 T dcn401_smu_send_fclk_pstate_message +ffffffff822ec020 t dcn401_smu_send_msg_with_param +ffffffff822ec1a0 T dcn401_smu_send_uclk_pstate_message +ffffffff822ec1c0 T dcn401_smu_send_cab_for_uclk_message +ffffffff822ec1f0 T dcn401_smu_transfer_wm_table_dram_2_smu +ffffffff822ec210 T dcn401_smu_set_pme_workaround +ffffffff822ec230 T dcn401_smu_set_hard_min_by_freq +ffffffff822ec2c0 t dcn401_smu_wait_hard_min_status +ffffffff822ec540 T dcn401_smu_wait_for_dmub_ack_mclk +ffffffff822ec560 T dcn401_smu_indicate_drr_status +ffffffff822ec580 T dcn401_smu_set_idle_uclk_fclk_hardmin +ffffffff822ec600 T dcn401_smu_set_active_uclk_fclk_hardmin +ffffffff822ec680 T dcn401_smu_set_min_deep_sleep_dcef_clk +ffffffff822ec6a0 T dcn401_smu_set_num_of_displays +ffffffff822ed000 T dc_stream_adjust_vmin_vmax +ffffffff822ed3c0 T dc_exit_ips_for_hw_access_internal +ffffffff822ed480 T dc_stream_get_last_used_drr_vtotal +ffffffff822ed690 T dc_stream_get_crtc_position +ffffffff822ed990 T dc_stream_configure_crc +ffffffff822edbd0 T dc_stream_get_crc +ffffffff822edd90 T dc_stream_set_dyn_expansion +ffffffff822ee0b0 T dc_stream_set_dither_option +ffffffff822ee300 T dc_stream_set_gamut_remap +ffffffff822ee530 T dc_stream_program_csc_matrix +ffffffff822ee810 T dc_stream_set_static_screen_params +ffffffff822eea40 T dc_create +ffffffff822ef020 t dc_construct_ctx +ffffffff822ef230 t dc_destruct +ffffffff822ef570 T dc_hardware_init +ffffffff822ef640 T dc_init_callbacks +ffffffff822ef690 T dc_deinit_callbacks +ffffffff822ef6e0 T dc_destroy +ffffffff822ef750 T dc_validate_boot_timing +ffffffff822efbe0 T dc_enable_stereo +ffffffff822efd80 T dc_trigger_sync +ffffffff822f0470 T dc_z10_restore +ffffffff822f04b0 T dc_z10_save_init +ffffffff822f04f0 T dc_commit_streams +ffffffff822f0ad0 t commit_minimal_transition_state +ffffffff822f0f00 t dc_commit_state_no_check +ffffffff822f26f0 T dc_acquire_release_mpc_3dlut +ffffffff822f27c0 T dc_post_update_surfaces_to_stream +ffffffff822f2c70 T dc_set_generic_gpio_for_stereo +ffffffff822f2dd0 T dc_check_update_surfaces_for_stream +ffffffff822f3880 T dc_dmub_update_dirty_rect +ffffffff822f3ab0 T populate_fast_updates +ffffffff822f3b60 T fast_nonaddr_updates_exist +ffffffff822f3bf0 T dc_update_planes_and_stream +ffffffff822f3db0 t update_planes_and_stream_v3 +ffffffff822f40f0 t update_planes_and_stream_v2 +ffffffff822f46a0 T dc_commit_updates_for_stream +ffffffff822f4de0 T dc_get_current_stream_count +ffffffff822f4e20 T dc_get_stream_at_index +ffffffff822f4e70 T dc_interrupt_to_irq_source +ffffffff822f4e90 T dc_interrupt_set +ffffffff822f4ee0 T dc_interrupt_ack +ffffffff822f4f00 T dc_power_down_on_boot +ffffffff822f5000 T dc_set_power_state +ffffffff822f5200 T dc_resume +ffffffff822f5280 T dc_is_dmcu_initialized +ffffffff822f52d0 T get_clock_requirements_for_state +ffffffff822f5350 T dc_set_clock +ffffffff822f5390 T dc_get_clock +ffffffff822f53d0 T dc_set_psr_allow_active +ffffffff822f54e0 T dc_set_replay_allow_active +ffffffff822f55f0 T dc_set_ips_disable +ffffffff822f56d0 T dc_allow_idle_optimizations_internal +ffffffff822f57c0 T dc_dmub_is_ips_idle_state +ffffffff822f5830 T dc_unlock_memory_clock_frequency +ffffffff822f58b0 T dc_lock_memory_clock_frequency +ffffffff822f5950 T dc_enable_dcmode_clk_limit +ffffffff822f5b40 t blank_and_force_memclk +ffffffff822f5d80 T dc_is_plane_eligible_for_idle_optimizations +ffffffff822f5de0 T dc_hardware_release +ffffffff822f5e30 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff822f5e70 T dc_is_dmub_outbox_supported +ffffffff822f5ee0 T dc_enable_dmub_notifications +ffffffff822f5f50 T dc_enable_dmub_outbox +ffffffff822f5fc0 T dc_process_dmub_aux_transfer_async +ffffffff822f6150 T get_link_index_from_dpia_port_index +ffffffff822f6210 T dc_process_dmub_set_config_async +ffffffff822f62f0 T dc_process_dmub_set_mst_slots +ffffffff822f63e0 T dc_process_dmub_dpia_set_tps_notification +ffffffff822f6490 T dc_process_dmub_dpia_hpd_int_enable +ffffffff822f6580 T dc_print_dmub_diagnostic_data +ffffffff822f65a0 T dc_disable_accelerated_mode +ffffffff822f65c0 T dc_notify_vsync_int_state +ffffffff822f67f0 T dc_abm_save_restore +ffffffff822f6a00 T dc_query_current_properties +ffffffff822f6aa0 T dc_set_edp_power +ffffffff822f6b10 T dc_get_power_profile_for_dc_state +ffffffff822f6b50 T dc_get_det_buffer_size_from_state +ffffffff822f6bb0 t create_links +ffffffff822f70b0 t create_link_encoders +ffffffff822f71a0 t dc_update_visual_confirm_color +ffffffff822f7330 t create_minimal_transition_state +ffffffff822f7580 t update_planes_and_stream_state +ffffffff822f7f50 t copy_stream_update_to_stream +ffffffff822f8610 t copy_surface_update_to_plane +ffffffff822f8a70 t fast_update_only +ffffffff822f8e20 t commit_planes_for_stream_fast +ffffffff822f9540 t commit_planes_for_stream +ffffffff822fad30 t commit_minimal_transition_state_in_dc_update +ffffffff822fc000 T pre_surface_trace +ffffffff822fc030 T update_surface_trace +ffffffff822fc060 T post_surface_trace +ffffffff822fc090 T context_timing_trace +ffffffff822fc270 T context_clock_trace +ffffffff822fc2a0 T dc_status_to_str +ffffffff822fc2e0 T dc_pixel_encoding_to_str +ffffffff822fc320 T dc_color_depth_to_str +ffffffff822fd000 T find_color_matrix +ffffffff822fd0b0 T color_space_to_black_color +ffffffff822fd120 T hwss_wait_for_blank_complete +ffffffff822fd1d0 T get_mpctree_visual_confirm_color +ffffffff822fd230 T get_surface_visual_confirm_color +ffffffff822fd2e0 T get_hdr_visual_confirm_color +ffffffff822fd3a0 T get_subvp_visual_confirm_color +ffffffff822fd410 T get_mclk_switch_visual_confirm_color +ffffffff822fd470 T set_p_state_switch_method +ffffffff822fd620 T get_fams2_visual_confirm_color +ffffffff822fd6a0 T hwss_build_fast_sequence +ffffffff822fde70 T hwss_execute_sequence +ffffffff822fe3a0 T hwss_setup_dpp +ffffffff822fe4d0 T hwss_program_bias_and_scale +ffffffff822fe560 T hwss_program_manual_trigger +ffffffff822fe5b0 T hwss_power_on_mpc_mem_pwr +ffffffff822fe600 T hwss_set_output_csc +ffffffff822fe650 T hwss_set_ocsc_default +ffffffff822fe6a0 T hwss_send_dmcub_cmd +ffffffff822fe6c0 T hwss_subvp_save_surf_addr +ffffffff822fe6e0 T get_surface_tile_visual_confirm_color +ffffffff822fe740 T hwss_wait_for_all_blank_complete +ffffffff822fe970 T hwss_wait_for_odm_update_pending_complete +ffffffff822feba0 T hwss_wait_for_no_pipes_pending +ffffffff822fed00 T hwss_wait_for_outstanding_hw_updates +ffffffff822fee60 T hwss_process_outstanding_hw_updates +ffffffff822ff000 T link_enc_cfg_init +ffffffff822ff1f0 T link_enc_cfg_copy +ffffffff822ff220 T link_enc_cfg_link_encs_assign +ffffffff82300330 T link_enc_cfg_validate +ffffffff82300b00 T link_enc_cfg_link_enc_unassign +ffffffff82300c90 T link_enc_cfg_is_transmitter_mappable +ffffffff82300db0 T link_enc_cfg_get_stream_using_link_enc +ffffffff82300eb0 T link_enc_cfg_get_link_using_link_enc +ffffffff82300fc0 T link_enc_cfg_get_link_enc_used_by_link +ffffffff82301190 T link_enc_cfg_get_next_avail_link_enc +ffffffff82301330 T link_enc_cfg_get_link_enc_used_by_stream +ffffffff82301350 T link_enc_cfg_get_link_enc +ffffffff823013e0 T link_enc_cfg_get_link_enc_used_by_stream_current +ffffffff82301540 T link_enc_cfg_is_link_enc_avail +ffffffff82301740 T link_enc_cfg_set_transient_mode +ffffffff82302000 T dc_get_link_at_index +ffffffff82302040 T dc_get_edp_links +ffffffff823020c0 T dc_get_edp_link_panel_inst +ffffffff82302180 T dc_link_detect +ffffffff823021b0 T dc_link_detect_connection_type +ffffffff823021e0 T dc_link_get_status +ffffffff82302210 T dc_link_is_hdcp14 +ffffffff82302240 T dc_link_is_hdcp22 +ffffffff82302270 T dc_link_clear_dprx_states +ffffffff823022a0 T dc_link_reset_cur_dp_mst_topology +ffffffff823022d0 T dc_link_bandwidth_kbps +ffffffff82302300 T dc_get_cur_link_res_map +ffffffff82302320 T dc_restore_link_res_map +ffffffff82302340 T dc_link_update_dsc_config +ffffffff82302370 T dc_is_oem_i2c_device_present +ffffffff823023c0 T dc_submit_i2c +ffffffff823023f0 T dc_submit_i2c_oem +ffffffff82302440 T dc_link_dp_handle_automated_test +ffffffff82302470 T dc_link_dp_set_test_pattern +ffffffff823024a0 T dc_link_set_drive_settings +ffffffff82302540 T dc_link_set_preferred_link_settings +ffffffff82302560 T dc_link_set_preferred_training_settings +ffffffff82302590 T dc_dp_trace_is_initialized +ffffffff823025c0 T dc_dp_trace_set_is_logged_flag +ffffffff823025f0 T dc_dp_trace_is_logged +ffffffff82302620 T dc_dp_trace_get_lt_end_timestamp +ffffffff82302650 T dc_dp_trace_get_lt_counts +ffffffff82302680 T dc_dp_trace_get_link_loss_count +ffffffff823026b0 T dc_link_add_remote_sink +ffffffff823026e0 T dc_link_remove_remote_sink +ffffffff82302710 T dc_link_aux_transfer_raw +ffffffff82302740 T dc_link_bw_kbps_from_raw_frl_link_rate_data +ffffffff82302760 T dc_link_decide_edp_link_settings +ffffffff82302790 T dc_link_dp_get_max_link_enc_cap +ffffffff823027c0 T dc_link_dp_mst_decide_link_encoding_format +ffffffff823027f0 T dc_link_get_link_cap +ffffffff82302820 T dc_link_get_highest_encoding_format +ffffffff823028f0 T dc_link_is_dp_sink_present +ffffffff82302920 T dc_link_is_fec_supported +ffffffff82302950 T dc_link_overwrite_extended_receiver_cap +ffffffff82302980 T dc_link_should_enable_fec +ffffffff823029b0 T dc_link_dp_dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff823029e0 T dc_link_handle_usb4_bw_alloc_response +ffffffff82302a10 T dc_link_check_link_loss_status +ffffffff82302a40 T dc_link_dp_allow_hpd_rx_irq +ffffffff82302a70 T dc_link_dp_handle_link_loss +ffffffff82302aa0 T dc_link_dp_read_hpd_rx_irq_data +ffffffff82302ad0 T dc_link_handle_hpd_rx_irq +ffffffff82302b00 T dc_link_dp_receiver_power_ctrl +ffffffff82302b30 T dc_link_decide_lttpr_mode +ffffffff82302b60 T dc_link_edp_panel_backlight_power_on +ffffffff82302b90 T dc_link_get_backlight_level +ffffffff82302bc0 T dc_link_get_backlight_level_nits +ffffffff82302bf0 T dc_link_set_backlight_level +ffffffff82302c20 T dc_link_set_backlight_level_nits +ffffffff82302c50 T dc_link_get_target_backlight_pwm +ffffffff82302c80 T dc_link_get_psr_state +ffffffff82302cb0 T dc_link_set_psr_allow_active +ffffffff82302ce0 T dc_link_setup_psr +ffffffff82302d10 T dc_link_set_replay_allow_active +ffffffff82302d40 T dc_link_get_replay_state +ffffffff82302d70 T dc_link_wait_for_t12 +ffffffff82302da0 T dc_link_get_hpd_state +ffffffff82302dd0 T dc_link_enable_hpd +ffffffff82302e00 T dc_link_disable_hpd +ffffffff82302e30 T dc_link_enable_hpd_filter +ffffffff82302e60 T dc_link_dp_dpia_validate +ffffffff82303000 T resource_parse_asic_id +ffffffff823032b0 T dc_create_resource_pool +ffffffff823036f0 T dc_destroy_resource_pool +ffffffff82303760 T resource_construct +ffffffff82303d10 T resource_unreference_clock_source +ffffffff82303d90 T resource_reference_clock_source +ffffffff82303e10 T resource_get_clock_source_reference +ffffffff82303e90 T resource_are_vblanks_synchronizable +ffffffff823040b0 T resource_are_streams_timing_synchronizable +ffffffff823041a0 T resource_find_used_clk_src_for_sharing +ffffffff823042e0 T resource_build_test_pattern_params +ffffffff82304430 T resource_get_opp_heads_for_otg_master +ffffffff823045b0 T resource_get_odm_slice_src_rect +ffffffff82304700 T resource_build_scaling_params +ffffffff82305190 T resource_get_dscl_prog_data +ffffffff823051c0 t calculate_inits_and_viewports +ffffffff82305600 T resource_build_scaling_params_for_context +ffffffff82305780 T resource_find_free_secondary_pipe_legacy +ffffffff82305820 T resource_find_free_pipe_used_as_sec_opp_head_by_cur_otg_master +ffffffff82305890 T resource_is_pipe_type +ffffffff82305910 T resource_find_free_pipe_used_in_cur_mpc_blending_tree +ffffffff82305980 T recource_find_free_pipe_not_used_in_cur_res_ctx +ffffffff82305a00 T recource_find_free_pipe_used_as_otg_master_in_cur_res_ctx +ffffffff82305a90 T resource_find_free_pipe_used_as_cur_sec_dpp +ffffffff82305b20 T resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine +ffffffff82305be0 T resource_get_mpc_slice_index +ffffffff82305c40 T resource_find_any_free_pipe +ffffffff82305cb0 T resource_get_otg_master_for_stream +ffffffff82305de0 T resource_get_dpp_pipes_for_opp_head +ffffffff82305f20 T resource_get_dpp_pipes_for_plane +ffffffff82306190 T resource_get_otg_master +ffffffff82306240 T resource_get_opp_head +ffffffff823062e0 T resource_get_primary_dpp_pipe +ffffffff823063a0 T resource_get_mpc_slice_count +ffffffff82306430 T resource_get_odm_slice_count +ffffffff82306500 T resource_get_odm_slice_index +ffffffff823065c0 T resource_get_odm_slice_dst_width +ffffffff823066f0 T resource_get_odm_slice_dst_rect +ffffffff82306a30 T resource_is_pipe_topology_changed +ffffffff82306b90 T resource_is_odm_topology_changed +ffffffff82306c30 T resource_log_pipe_topology_update +ffffffff82306ec0 t resource_log_pipe_for_stream +ffffffff82307100 T resource_add_otg_master_for_stream_output +ffffffff82307140 T resource_remove_otg_master_for_stream_output +ffffffff82307560 T update_audio_usage +ffffffff823075d0 T resource_append_dpp_pipes_for_plane_composition +ffffffff82307a80 T resource_remove_dpp_pipes_for_plane_composition +ffffffff82307b70 T resource_update_pipes_for_stream_with_slice_count +ffffffff82308140 T resource_update_pipes_for_plane_with_slice_count +ffffffff823087c0 T dc_is_timing_changed +ffffffff82308830 T dc_is_stream_unchanged +ffffffff82308920 T dc_is_stream_scaling_unchanged +ffffffff823089d0 T resource_map_pool_resources +ffffffff82309800 t find_first_free_audio +ffffffff823098c0 T dc_resource_is_dsc_encoding_supported +ffffffff82309910 T dc_validate_with_context +ffffffff8230a380 t planes_changed_for_existing_stream +ffffffff8230a520 T dc_validate_global_state +ffffffff8230a8e0 T dc_resource_find_first_free_pll +ffffffff8230a950 T resource_build_info_frame +ffffffff8230b150 T resource_map_clock_resources +ffffffff8230b300 T pipe_need_reprogram +ffffffff8230b480 T resource_build_bit_depth_reduction_params +ffffffff8230b660 T dc_validate_stream +ffffffff8230b870 T dc_validate_plane +ffffffff8230b900 T resource_pixel_format_to_bpp +ffffffff8230b980 T get_audio_check +ffffffff8230baa0 T get_temp_dp_link_res +ffffffff8230bc20 T reset_syncd_pipes_from_disabled_pipes +ffffffff8230bd70 T check_syncd_pipes_for_disabled_master_pipe +ffffffff8230bec0 T reset_sync_context_for_pipe +ffffffff8230bf70 T resource_transmitter_to_phy_idx +ffffffff8230bfd0 T get_link_hwss +ffffffff8230c090 T is_h_timing_divisible_by_2 +ffffffff8230c0f0 T dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy +ffffffff8230c320 T update_dp_encoder_resources_for_test_harness +ffffffff8230c660 T check_subvp_sw_cursor_fallback_req +ffffffff8230c740 T resource_init_common_dml2_callbacks +ffffffff8230c8a0 T resource_calculate_det_for_stream +ffffffff8230cb10 T resource_is_hpo_acquired +ffffffff8230cb60 t calculate_plane_rec_in_timing_active +ffffffff8230ce80 t calculate_init_and_vp +ffffffff8230d1b0 t resource_log_pipe +ffffffff8230e000 T dc_sink_retain +ffffffff8230e030 T dc_sink_release +ffffffff8230e0b0 T dc_sink_create +ffffffff8230f000 T dc_stat_get_dmub_notification +ffffffff8230f0d0 T dc_stat_get_dmub_dataout +ffffffff82310000 T dc_state_create +ffffffff82310210 T dc_state_construct +ffffffff82310260 T dc_state_release +ffffffff82310310 T dc_state_copy +ffffffff823103c0 t dc_state_copy_internal +ffffffff823105d0 T dc_state_create_copy +ffffffff82310760 T dc_state_copy_current +ffffffff82310810 T dc_state_create_current_copy +ffffffff82310830 T dc_state_destruct +ffffffff823109e0 T dc_state_retain +ffffffff82310a10 T dc_state_add_stream +ffffffff82310b50 T dc_state_remove_stream +ffffffff82310d70 T dc_state_add_plane +ffffffff82311060 T dc_state_get_stream_status +ffffffff823110c0 T dc_state_remove_plane +ffffffff82311210 T dc_state_rem_all_planes_for_stream +ffffffff823113c0 T dc_state_add_all_planes_for_stream +ffffffff82311490 T dc_state_get_pipe_subvp_type +ffffffff823114f0 T dc_state_get_stream_subvp_type +ffffffff82311550 T dc_state_get_paired_subvp_stream +ffffffff823115c0 T dc_state_create_phantom_stream +ffffffff82311690 T dc_state_release_phantom_stream +ffffffff82311790 T dc_state_create_phantom_plane +ffffffff82311850 T dc_state_release_phantom_plane +ffffffff82311950 T dc_state_add_phantom_stream +ffffffff82311ab0 T dc_state_remove_phantom_stream +ffffffff82311b60 T dc_state_add_phantom_plane +ffffffff82311c20 T dc_state_remove_phantom_plane +ffffffff82311c40 T dc_state_rem_all_phantom_planes_for_stream +ffffffff82311f10 T dc_state_add_all_phantom_planes_for_stream +ffffffff82311fe0 T dc_state_remove_phantom_streams_and_planes +ffffffff82312300 T dc_state_release_phantom_streams_and_planes +ffffffff82312580 T dc_state_get_stream_from_id +ffffffff823125f0 T dc_state_is_fams2_in_use +ffffffff82313000 T update_stream_signal +ffffffff82313080 T dc_stream_construct +ffffffff82313370 T dc_stream_assign_stream_id +ffffffff823133b0 T dc_stream_destruct +ffffffff823133d0 T dc_stream_retain +ffffffff82313400 T dc_stream_release +ffffffff82313470 T dc_create_stream_for_sink +ffffffff82313500 T dc_copy_stream +ffffffff823135d0 T dc_stream_get_status +ffffffff82313600 T program_cursor_attributes +ffffffff823137a0 T dc_stream_set_cursor_attributes +ffffffff823138c0 T dc_stream_program_cursor_attributes +ffffffff82313a90 T program_cursor_position +ffffffff82313c00 T dc_stream_set_cursor_position +ffffffff82313c90 T dc_stream_program_cursor_position +ffffffff82313ec0 T dc_stream_add_writeback +ffffffff82314180 T dc_stream_fc_disable_writeback +ffffffff82314250 T dc_stream_remove_writeback +ffffffff82314390 T dc_stream_warmup_writeback +ffffffff82314410 T dc_stream_get_vblank_counter +ffffffff82314510 T dc_stream_send_dp_sdp +ffffffff82314920 T dc_stream_get_scanoutpos +ffffffff82314a50 T dc_stream_dmdata_status_done +ffffffff82314b50 T dc_stream_set_dynamic_metadata +ffffffff82314cf0 T dc_stream_add_dsc_to_resource +ffffffff82314d40 T dc_stream_get_pipe_ctx +ffffffff82314df0 T dc_stream_log +ffffffff82315080 T dc_stream_calculate_max_flickerless_refresh_rate +ffffffff82315100 t dc_stream_get_brightness_millinits_from_refresh +ffffffff82315260 t dc_stream_calculate_flickerless_refresh_rate +ffffffff823154c0 T dc_stream_calculate_min_flickerless_refresh_rate +ffffffff82315540 T dc_stream_is_refresh_rate_range_flickerless +ffffffff82315710 T dc_stream_get_max_flickerless_instant_vtotal_decrease +ffffffff82315820 T dc_stream_get_max_flickerless_instant_vtotal_increase +ffffffff82316000 T dc_plane_construct +ffffffff82316070 T dc_plane_destruct +ffffffff823160a0 T dc_plane_get_pipe_mask +ffffffff82316140 T enable_surface_flip_reporting +ffffffff82316170 T dc_create_plane_state +ffffffff82316220 T dc_plane_get_status +ffffffff823163b0 T dc_plane_state_retain +ffffffff823163e0 T dc_plane_state_release +ffffffff82316430 T dc_gamma_retain +ffffffff82316460 T dc_gamma_release +ffffffff823164c0 T dc_create_gamma +ffffffff82316520 T dc_transfer_func_retain +ffffffff82316550 T dc_transfer_func_release +ffffffff823165a0 T dc_create_transfer_func +ffffffff82316600 T dc_create_3dlut_func +ffffffff82316660 T dc_3dlut_func_release +ffffffff823166b0 T dc_3dlut_func_retain +ffffffff82317000 T vm_helper_mark_vmid_used +ffffffff82317030 T dc_setup_system_context +ffffffff823170d0 T dc_setup_vm_context +ffffffff82317100 T dc_get_vmid_use_vector +ffffffff82317160 T vm_helper_init +ffffffff82318000 T dc_dmub_srv_create +ffffffff823180a0 T dc_dmub_srv_destroy +ffffffff82318100 T dc_dmub_srv_wait_idle +ffffffff823181d0 T dc_dmub_srv_log_diagnostic_data +ffffffff82318e90 T dc_dmub_srv_clear_inbox0_ack +ffffffff82318f30 T dc_dmub_srv_wait_for_inbox0_ack +ffffffff82318fd0 T dc_dmub_srv_send_inbox0_cmd +ffffffff82319070 T dc_dmub_srv_cmd_list_queue_execute +ffffffff82319220 T dc_dmub_srv_wait_for_idle +ffffffff82319440 T dc_dmub_srv_cmd_run +ffffffff82319460 T dc_dmub_srv_cmd_run_list +ffffffff82319710 T dc_dmub_srv_optimized_init_done +ffffffff823197d0 T dc_dmub_srv_notify_stream_mask +ffffffff823198e0 T dc_wake_and_execute_gpint +ffffffff82319a40 T dc_dmub_srv_is_restore_required +ffffffff82319b00 T dc_dmub_srv_get_dmub_outbox0_msg +ffffffff82319b30 T dc_dmub_trace_event_control +ffffffff82319b50 T dc_dmub_srv_drr_update_cmd +ffffffff82319c70 T dc_wake_and_execute_dmub_cmd +ffffffff82319d50 T dc_dmub_srv_set_drr_manual_trigger_cmd +ffffffff82319e70 T dc_dmub_srv_p_state_delegate +ffffffff8231a2f0 T dc_dmub_srv_query_caps_cmd +ffffffff8231a450 T dc_dmub_srv_get_visual_confirm_color_cmd +ffffffff8231a5d0 T dc_dmub_setup_subvp_dmub_command +ffffffff8231b200 T dc_dmub_srv_get_diagnostic_data +ffffffff8231b240 T dc_send_update_cursor_info_to_dmu +ffffffff8231b640 T dc_wake_and_execute_dmub_cmd_list +ffffffff8231b730 T dc_dmub_check_min_version +ffffffff8231b770 T dc_dmub_srv_enable_dpia_trace +ffffffff8231b9e0 T dc_dmub_srv_subvp_save_surf_addr +ffffffff8231ba00 T dc_dmub_srv_is_hw_pwr_up +ffffffff8231bb00 T dc_dmub_srv_set_power_state +ffffffff8231bb40 T dc_dmub_srv_notify_fw_dc_power_state +ffffffff8231bc70 T dc_dmub_srv_should_detect +ffffffff8231bd40 T dc_dmub_srv_apply_idle_power_optimizations +ffffffff8231c450 T dc_dmub_srv_fams2_update_config +ffffffff8231c740 T dc_dmub_srv_fams2_drr_update +ffffffff8231c7f0 T dc_dmub_srv_fams2_passthrough_flip +ffffffff8231d000 T dc_edid_parser_send_cea +ffffffff8231d0b0 T dc_edid_parser_recv_cea_ack +ffffffff8231d140 T dc_edid_parser_recv_amd_vsdb +ffffffff8231e000 T generic_reg_update_ex +ffffffff8231e370 t set_reg_field_values +ffffffff8231e530 T generic_reg_set_ex +ffffffff8231e750 T generic_reg_get +ffffffff8231e7c0 T generic_reg_get2 +ffffffff8231e850 T generic_reg_get3 +ffffffff8231e8f0 T generic_reg_get4 +ffffffff8231e9a0 T generic_reg_get5 +ffffffff8231ea70 T generic_reg_get6 +ffffffff8231eb50 T generic_reg_get7 +ffffffff8231ec50 T generic_reg_get8 +ffffffff8231ed70 T generic_reg_wait +ffffffff8231f010 T generic_write_indirect_reg +ffffffff8231f070 T generic_read_indirect_reg +ffffffff8231f130 T generic_indirect_reg_get +ffffffff8231f2f0 T generic_indirect_reg_update_ex +ffffffff8231f520 T generic_indirect_reg_update_ex_sync +ffffffff8231f720 T generic_indirect_reg_get_sync +ffffffff8231f850 T reg_sequence_start_gather +ffffffff8231f8f0 T reg_sequence_start_execute +ffffffff8231faa0 T reg_sequence_wait_done +ffffffff8231fb00 T dce_version_to_string +ffffffff82320000 T translate_SPL_in_params_from_pipe_ctx +ffffffff82320520 T translate_SPL_out_params_to_pipe_ctx +ffffffff82321000 T dccg2_update_dpp_dto +ffffffff82321170 T dccg2_get_dccg_ref_freq +ffffffff82321230 T dccg2_set_fifo_errdet_ovr_en +ffffffff82321270 T dccg2_otg_add_pixel +ffffffff82321310 T dccg2_otg_drop_pixel +ffffffff823213b0 T dccg2_init +ffffffff823213e0 T dccg2_create +ffffffff82321490 T dcn_dccg_destroy +ffffffff82322000 T dccg201_create +ffffffff823220b0 t dccg201_update_dpp_dto +ffffffff82323000 T dccg21_create +ffffffff823230b0 t dccg21_update_dpp_dto +ffffffff82324000 T dccg3_create +ffffffff823240b0 T dccg30_create +ffffffff82325000 T dccg301_create +ffffffff82326000 T dccg31_update_dpp_dto +ffffffff82326180 T dccg31_set_dpstreamclk +ffffffff82326310 t dccg31_disable_dpstreamclk +ffffffff82326470 T dccg31_enable_symclk32_se +ffffffff82326790 T dccg31_disable_symclk32_se +ffffffff82326a80 T dccg31_enable_symclk32_le +ffffffff82326ba0 T dccg31_disable_symclk32_le +ffffffff82326c90 T dccg31_set_symclk32_le_root_clock_gating +ffffffff82326db0 T dccg31_disable_dscclk +ffffffff82327020 T dccg31_enable_dscclk +ffffffff823272c0 T dccg31_set_physymclk +ffffffff82327820 T dccg31_set_dtbclk_dto +ffffffff82327b10 T dccg31_set_audio_dtbclk_dto +ffffffff82327c40 T dccg31_get_dccg_ref_freq +ffffffff82327c70 T dccg31_set_dispclk_change_mode +ffffffff82327cc0 T dccg31_init +ffffffff82328360 T dccg31_otg_add_pixel +ffffffff823283a0 T dccg31_otg_drop_pixel +ffffffff823283e0 T dccg31_create +ffffffff82329000 T dccg314_set_dpstreamclk +ffffffff823291f0 t dccg314_set_dtbclk_p_src +ffffffff82329400 T dccg314_create +ffffffff823294b0 t dccg314_init +ffffffff823296a0 t dccg314_set_dtbclk_dto +ffffffff823298d0 t dccg314_set_pixel_rate_div +ffffffff82329af0 t dccg314_get_pixel_rate_div +ffffffff82329ca0 t dccg314_set_valid_pixel_rate +ffffffff82329d10 t dccg314_trigger_dio_fifo_resync +ffffffff82329dc0 t dccg314_dpp_root_clock_control +ffffffff8232a000 T dccg32_create +ffffffff8232a0b0 t dccg32_get_dccg_ref_freq +ffffffff8232a0e0 t dccg32_otg_add_pixel +ffffffff8232a120 t dccg32_otg_drop_pixel +ffffffff8232a160 t dccg32_set_dpstreamclk +ffffffff8232a350 t dccg32_set_dtbclk_dto +ffffffff8232a590 t dccg32_set_pixel_rate_div +ffffffff8232a7b0 t dccg32_get_pixel_rate_div +ffffffff8232a960 t dccg32_set_valid_pixel_rate +ffffffff8232a9e0 t dccg32_trigger_dio_fifo_resync +ffffffff8232aa90 t dccg32_set_dtbclk_p_src +ffffffff8232b000 T dccg35_init +ffffffff8232b1d0 t dccg35_disable_symclk32_se +ffffffff8232b490 t dccg35_set_dpstreamclk +ffffffff8232b7d0 t dccg35_set_dpstreamclk_root_clock_gating +ffffffff8232ba60 T dccg35_enable_global_fgcg_rep +ffffffff8232bab0 T dccg35_root_gate_disable_control +ffffffff8232bba0 T dccg35_create +ffffffff8232bc50 t dccg35_set_dtbclk_p_src +ffffffff8232be60 t dccg35_set_pixel_rate_div +ffffffff8232c080 t dccg35_get_pixel_rate_div +ffffffff8232c230 t dccg35_set_valid_pixel_rate +ffffffff8232c2b0 t dccg35_trigger_dio_fifo_resync +ffffffff8232c360 t dccg35_set_dtbclk_dto +ffffffff8232c6d0 t dccg35_update_dpp_dto +ffffffff8232c810 t dccg35_set_physymclk +ffffffff8232ca00 t dccg35_set_physymclk_root_clock_gating +ffffffff8232cb60 t dccg35_disable_dscclk +ffffffff8232cee0 t dccg35_enable_dscclk +ffffffff8232d2a0 t dccg35_dpp_root_clock_control +ffffffff8232d3b0 t dccg35_enable_symclk_se +ffffffff8232d9d0 t dccg35_disable_symclk_se +ffffffff8232def0 t dcn35_set_dppclk_enable +ffffffff8232f000 T dccg401_update_dpp_dto +ffffffff8232f140 t dcn401_set_dppclk_enable +ffffffff8232f230 T dccg401_set_physymclk +ffffffff8232f6d0 T dccg401_init +ffffffff8232fce0 t dccg401_disable_symclk32_le +ffffffff8232fff0 T dccg401_create +ffffffff823300a0 t dccg401_get_dccg_ref_freq +ffffffff823300d0 t dccg401_otg_add_pixel +ffffffff82330110 t dccg401_otg_drop_pixel +ffffffff82330150 t dccg401_set_dpstreamclk +ffffffff82330780 t dccg401_enable_symclk32_le +ffffffff82330aa0 t dccg401_set_pixel_rate_div +ffffffff82330cc0 t dccg401_get_pixel_rate_div +ffffffff82330e50 t dccg401_enable_symclk_se +ffffffff82331350 t dccg401_disable_symclk_se +ffffffff82331760 t dccg401_set_dp_dto +ffffffff82331d10 t dccg401_set_dtbclk_p_src +ffffffff82331f20 t dccg401_set_dto_dscclk +ffffffff82332190 t dccg401_set_ref_dscclk +ffffffff82333000 T dce_abm_create +ffffffff823330c0 T dce_abm_destroy +ffffffff82333110 t dce_abm_init +ffffffff82333400 t dce_abm_set_level +ffffffff82333510 t dce_abm_immediate_disable +ffffffff82333560 t dce_abm_set_pipe +ffffffff823336e0 t dce_abm_set_backlight_level_pwm +ffffffff82333940 t dce_abm_get_current_backlight +ffffffff82333970 t dce_abm_get_target_backlight +ffffffff82334000 T dce_aud_az_enable +ffffffff82334190 T dce_aud_az_disable_hbr_audio +ffffffff823342a0 T dce_aud_az_disable +ffffffff823344e0 T dce_aud_az_configure +ffffffff82335350 t check_audio_bandwidth +ffffffff82335ab0 T dce_aud_wall_dto_setup +ffffffff82335c60 T dce_aud_hw_init +ffffffff82335e70 T dce_aud_destroy +ffffffff82335ec0 T dce_audio_create +ffffffff82335f90 t calculate_required_audio_bw_in_symbols +ffffffff82336410 t dce_aud_endpoint_valid +ffffffff82337000 T dce110_engine_destroy +ffffffff82337050 T dce110_aux_engine_construct +ffffffff823370d0 t dce_aux_configure_timeout +ffffffff823372d0 T dce_aux_transfer_raw +ffffffff82337c00 t acquire +ffffffff82337ee0 T dce_aux_transfer_dmub_raw +ffffffff82338010 T dce_aux_transfer_with_retries +ffffffff82339000 T look_up_in_video_optimized_rate_tlb +ffffffff82339070 T dce110_clk_src_construct +ffffffff823392b0 t calc_pll_max_vco_construct +ffffffff823394b0 T dce112_clk_src_construct +ffffffff82339550 T dcn20_clk_src_construct +ffffffff82339600 T dcn3_clk_src_construct +ffffffff823396b0 T dcn31_clk_src_construct +ffffffff82339760 T dcn401_clk_src_construct +ffffffff82339810 T dcn301_clk_src_construct +ffffffff823398c0 t dce110_clock_source_power_down +ffffffff82339960 t dce110_program_pix_clk +ffffffff8233a090 t dce110_get_pix_clk_dividers +ffffffff8233a800 t get_pixel_clk_frequency_100hz +ffffffff8233a930 t get_ss_info_from_atombios +ffffffff8233acb0 t dce112_program_pix_clk +ffffffff8233aed0 t dce112_get_pix_clk_dividers +ffffffff8233b000 t dcn20_program_pix_clk +ffffffff8233b0a0 t dcn20_override_dp_pix_clk +ffffffff8233b1b0 t dcn3_program_pix_clk +ffffffff8233b3a0 t dcn3_get_pix_clk_dividers +ffffffff8233b4a0 t dcn31_program_pix_clk +ffffffff8233b8b0 t dcn401_program_pix_clk +ffffffff8233c000 T dce_dmcu_create +ffffffff8233c0c0 T dcn10_dmcu_create +ffffffff8233c180 T dcn20_dmcu_create +ffffffff8233c240 T dcn21_dmcu_create +ffffffff8233c340 T dce_dmcu_destroy +ffffffff8233c390 t dce_dmcu_init +ffffffff8233c3c0 t dce_dmcu_load_iram +ffffffff8233c550 t dce_dmcu_set_psr_enable +ffffffff8233c6c0 t dce_dmcu_setup_psr +ffffffff8233ca40 t dce_get_dmcu_psr_state +ffffffff8233cb50 t dce_psr_wait_loop +ffffffff8233cca0 t dce_get_psr_wait_loop +ffffffff8233ccd0 t dce_is_dmcu_initialized +ffffffff8233cd40 t dcn10_dmcu_init +ffffffff8233d360 t dcn10_dmcu_load_iram +ffffffff8233d5f0 t dcn10_dmcu_set_psr_enable +ffffffff8233d7c0 t dcn10_dmcu_setup_psr +ffffffff8233dbe0 t dcn10_get_dmcu_psr_state +ffffffff8233dd20 t dcn10_psr_wait_loop +ffffffff8233de50 t dcn10_get_psr_wait_loop +ffffffff8233de80 t dcn10_is_dmcu_initialized +ffffffff8233deb0 t dcn10_send_edid_cea +ffffffff8233e090 t dcn10_recv_amd_vsdb +ffffffff8233e150 t dcn10_recv_edid_cea_ack +ffffffff8233e1d0 t dcn10_get_scp_results +ffffffff8233e310 t dcn20_lock_phy +ffffffff8233e460 t dcn20_unlock_phy +ffffffff8233e5b0 t dcn21_dmcu_init +ffffffff8233f000 T dce_i2c_oem_device_present +ffffffff8233f090 T dce_i2c_submit_command +ffffffff82340000 T acquire_i2c_hw_engine +ffffffff82340430 T dce_i2c_submit_command_hw +ffffffff82340e40 t set_speed +ffffffff82340fb0 T dce_i2c_hw_construct +ffffffff82341020 T dce100_i2c_hw_construct +ffffffff82341090 T dce112_i2c_hw_construct +ffffffff82341100 T dcn1_i2c_hw_construct +ffffffff82341170 T dcn2_i2c_hw_construct +ffffffff82341200 t is_hw_busy +ffffffff82342000 T dce_i2c_sw_construct +ffffffff82342030 T dce_i2c_engine_acquire_sw +ffffffff823420f0 T dce_i2c_submit_command_sw +ffffffff82342b60 t write_byte_sw +ffffffff82343000 T dce_ipp_construct +ffffffff82343050 T dce_ipp_destroy +ffffffff823430a0 t dce_ipp_cursor_set_position +ffffffff823431f0 t dce_ipp_cursor_set_attributes +ffffffff823434c0 t dce_ipp_program_prescale +ffffffff823436a0 t dce_ipp_program_input_lut +ffffffff82343b90 t dce_ipp_set_degamma +ffffffff82344000 T dce110_get_dig_frontend +ffffffff823440c0 T dce110_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff82344180 T dce110_psr_program_dp_dphy_fast_training +ffffffff82344200 T dce110_psr_program_secondary_packet +ffffffff82344270 T dce110_is_dig_enabled +ffffffff823442d0 T dce110_link_encoder_validate_dvi_output +ffffffff82344380 T dce110_link_encoder_validate_dp_output +ffffffff823443b0 T dce110_link_encoder_construct +ffffffff823445c0 T dce110_link_encoder_validate_output_with_stream +ffffffff82344770 T dce110_link_encoder_hw_init +ffffffff82344a00 T dce110_link_encoder_destroy +ffffffff82344a50 T dce110_link_encoder_setup +ffffffff82344b80 T dce110_link_encoder_enable_tmds_output +ffffffff82344cb0 T dce110_link_encoder_enable_lvds_output +ffffffff82344dd0 T dce110_link_encoder_enable_dp_output +ffffffff82344f70 T dce110_link_encoder_enable_dp_mst_output +ffffffff82345110 T dce110_link_encoder_disable_output +ffffffff82345390 T dce110_link_encoder_dp_set_lane_settings +ffffffff823455c0 T dce110_link_encoder_dp_set_phy_pattern +ffffffff82345ec0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff82346140 T dce110_link_encoder_update_mst_stream_allocation_table +ffffffff82346410 T dce110_link_encoder_connect_dig_be_to_fe +ffffffff82346560 T dce110_link_encoder_enable_hpd +ffffffff82346590 T dce110_link_encoder_disable_hpd +ffffffff823465c0 T dce110_link_encoder_get_max_link_cap +ffffffff82347000 T dce_mem_input_construct +ffffffff82347060 T dce112_mem_input_construct +ffffffff823470c0 T dce120_mem_input_construct +ffffffff82347120 t dce_mi_program_display_marks +ffffffff82347450 t dce_mi_allocate_dmif +ffffffff823476c0 t dce_mi_free_dmif +ffffffff82347840 t dce_mi_program_surface_flip_and_addr +ffffffff82347ba0 t dce_mi_program_pte_vm +ffffffff82347d90 t dce_mi_program_surface_config +ffffffff823486b0 t dce_mi_is_flip_pending +ffffffff82348750 t program_nbp_watermark +ffffffff82348980 t dce112_mi_program_display_marks +ffffffff82348f40 t dce120_mi_program_display_marks +ffffffff823494b0 t dce120_program_stutter_watermark +ffffffff8234a000 T dce110_opp_set_clamping +ffffffff8234a2e0 T dce110_opp_program_bit_depth_reduction +ffffffff8234ab50 T dce110_opp_program_clamping_and_pixel_encoding +ffffffff8234ad20 T dce110_opp_set_dyn_expansion +ffffffff8234ae80 T dce110_opp_program_fmt +ffffffff8234b040 T dce110_opp_construct +ffffffff8234b0a0 T dce110_opp_destroy +ffffffff8234c000 T dce_panel_cntl_construct +ffffffff8234c070 t dce_panel_cntl_destroy +ffffffff8234c0c0 t dce_panel_cntl_hw_init +ffffffff8234c390 t dce_is_panel_backlight_on +ffffffff8234c450 t dce_is_panel_powered_on +ffffffff8234c510 t dce_store_backlight_level +ffffffff8234c5d0 t dce_driver_set_backlight +ffffffff8234c790 t dce_get_16_bit_backlight_from_pwm +ffffffff8234d000 T get_filter_3tap_16p +ffffffff8234d0a0 T get_filter_3tap_64p +ffffffff8234d140 T get_filter_4tap_16p +ffffffff8234d1e0 T get_filter_4tap_64p +ffffffff8234d280 T get_filter_5tap_64p +ffffffff8234d320 T get_filter_6tap_64p +ffffffff8234d3c0 T get_filter_7tap_64p +ffffffff8234d460 T get_filter_8tap_64p +ffffffff8234d500 T get_filter_2tap_16p +ffffffff8234d530 T get_filter_2tap_64p +ffffffff8234e000 T dce110_se_audio_mute_control +ffffffff8234e050 T dce110_se_dp_audio_setup +ffffffff8234e060 t dce110_se_audio_setup +ffffffff8234e1d0 T dce110_se_dp_audio_enable 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dml32_CalculateStutterEfficiency +ffffffff8247a9d0 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff8247aad0 T dml32_CalculateVActiveBandwithSupport +ffffffff8247ac40 T dml32_CalculatePrefetchBandwithSupport +ffffffff8247af70 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff8247b0d0 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff8247b360 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff8247c000 T dml32_rq_dlg_get_rq_reg +ffffffff8247c750 T dml32_rq_dlg_get_dlg_reg +ffffffff8247f000 T dcn321_update_bw_bounding_box_fpu +ffffffff82481c00 t get_optimal_ntuple +ffffffff82482000 T dcn35_build_wm_range_table_fpu +ffffffff82482030 T dcn35_update_bw_bounding_box_fpu +ffffffff82482640 T dcn35_populate_dml_pipes_from_context_fpu +ffffffff82482b60 T dcn35_decide_zstate_support +ffffffff82483000 T dcn351_update_bw_bounding_box_fpu +ffffffff82483610 T dcn351_populate_dml_pipes_from_context_fpu +ffffffff82483b30 T dcn351_decide_zstate_support +ffffffff82484000 T dcn401_build_wm_range_table_fpu +ffffffff824843c0 T dcn401_update_bw_bounding_box_fpu +ffffffff82485000 T dml_init_instance +ffffffff82485320 T dml_get_status_message +ffffffff82485360 T dml_log_pipe_params +ffffffff82485390 T dml_log_mode_support_params +ffffffff82486000 T dml_get_voltage_level +ffffffff824862c0 t fetch_socbb_params +ffffffff824867b0 t fetch_ip_params +ffffffff82486c50 t fetch_pipe_params +ffffffff82487ce0 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff82487d60 T get_clk_dcf_deepsleep +ffffffff82487eb0 T get_wm_urgent +ffffffff82488000 T get_wm_memory_trip +ffffffff82488150 T get_wm_writeback_urgent +ffffffff824882a0 T get_wm_stutter_exit +ffffffff824883f0 T get_wm_stutter_enter_exit +ffffffff82488540 T get_wm_z8_stutter_exit +ffffffff82488690 T get_wm_z8_stutter_enter_exit +ffffffff824887e0 T get_stutter_efficiency_z8 +ffffffff82488930 T get_stutter_num_bursts_z8 +ffffffff82488a80 T get_wm_dram_clock_change +ffffffff82488bd0 T get_wm_writeback_dram_clock_change +ffffffff82488d20 T get_stutter_efficiency +ffffffff82488e70 T get_stutter_efficiency_no_vblank +ffffffff82488fc0 T get_stutter_period +ffffffff82489110 T get_urgent_latency +ffffffff82489260 T get_urgent_extra_latency +ffffffff824893b0 T get_nonurgent_latency +ffffffff82489500 T get_dram_clock_change_latency +ffffffff82489650 T get_dispclk_calculated +ffffffff824897a0 T get_total_data_read_bw +ffffffff824898f0 T get_return_bw +ffffffff82489a40 T get_tcalc +ffffffff82489b90 T get_fraction_of_urgent_bandwidth +ffffffff82489ce0 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff82489e30 T get_cstate_max_cap_mode +ffffffff82489f90 T get_comp_buffer_size_kbytes +ffffffff8248a0e0 T get_pixel_chunk_size_in_kbyte +ffffffff8248a230 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff8248a380 T get_meta_chunk_size_in_kbyte +ffffffff8248a4d0 T get_min_pixel_chunk_size_in_byte +ffffffff8248a620 T get_min_meta_chunk_size_in_byte +ffffffff8248a770 T get_fclk_watermark +ffffffff8248a8c0 T get_usr_retraining_watermark +ffffffff8248aa10 T get_comp_buffer_reserved_space_kbytes +ffffffff8248ab60 T get_comp_buffer_reserved_space_64bytes +ffffffff8248acb0 T get_comp_buffer_reserved_space_zs +ffffffff8248ae00 T get_unbounded_request_enabled +ffffffff8248af60 T get_dsc_delay +ffffffff8248b0c0 T get_dppclk_calculated +ffffffff8248b220 T get_dscclk_calculated +ffffffff8248b380 T get_min_ttu_vblank +ffffffff8248b4e0 T get_min_ttu_vblank_in_us +ffffffff8248b640 T get_vratio_prefetch_l +ffffffff8248b7a0 T get_vratio_prefetch_c +ffffffff8248b900 T get_dst_x_after_scaler +ffffffff8248ba60 T get_dst_y_after_scaler +ffffffff8248bbc0 T get_dst_y_per_vm_vblank +ffffffff8248bd20 T get_dst_y_per_row_vblank +ffffffff8248be80 T get_dst_y_prefetch +ffffffff8248bfe0 T get_dst_y_per_vm_flip +ffffffff8248c140 T get_dst_y_per_row_flip +ffffffff8248c2a0 T get_refcyc_per_vm_group_vblank +ffffffff8248c400 T get_refcyc_per_vm_group_flip +ffffffff8248c560 T get_refcyc_per_vm_req_vblank +ffffffff8248c6c0 T get_refcyc_per_vm_req_flip +ffffffff8248c820 T get_refcyc_per_vm_group_vblank_in_us +ffffffff8248c980 T get_refcyc_per_vm_group_flip_in_us +ffffffff8248cae0 T get_refcyc_per_vm_req_vblank_in_us +ffffffff8248cc40 T get_refcyc_per_vm_req_flip_in_us +ffffffff8248cda0 T get_refcyc_per_vm_dmdata_in_us +ffffffff8248cf00 T get_dmdata_dl_delta_in_us +ffffffff8248d060 T get_refcyc_per_line_delivery_l_in_us +ffffffff8248d1c0 T get_refcyc_per_line_delivery_c_in_us +ffffffff8248d320 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff8248d480 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff8248d5e0 T get_refcyc_per_req_delivery_l_in_us +ffffffff8248d740 T get_refcyc_per_req_delivery_c_in_us +ffffffff8248d8a0 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff8248da00 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff8248db60 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff8248dcc0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff8248de20 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff8248df80 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff8248e0e0 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff8248e240 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff8248e3a0 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff8248e500 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff8248e660 T get_vstartup +ffffffff8248e7c0 T get_vupdate_offset +ffffffff8248e920 T get_vupdate_width +ffffffff8248ea80 T get_vready_offset +ffffffff8248ebe0 T get_vready_at_or_after_vsync +ffffffff8248ed50 T get_min_dst_y_next_start +ffffffff8248eeb0 T get_dst_y_per_pte_row_nom_l +ffffffff8248f010 T get_dst_y_per_pte_row_nom_c +ffffffff8248f170 T get_dst_y_per_meta_row_nom_l +ffffffff8248f2d0 T get_dst_y_per_meta_row_nom_c +ffffffff8248f430 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff8248f590 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff8248f6f0 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff8248f850 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff8248f9b0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff8248fb10 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff8248fc70 T get_vstartup_calculated +ffffffff8248fdd0 T get_dpte_row_height_linear_c +ffffffff8248ff30 T get_swath_height_l +ffffffff82490090 T get_swath_height_c +ffffffff824901f0 T get_det_stored_buffer_size_l_bytes +ffffffff82490350 T get_det_stored_buffer_size_c_bytes +ffffffff824904b0 T get_dpte_group_size_in_bytes +ffffffff82490610 T get_vm_group_size_in_bytes +ffffffff82490770 T get_dpte_row_height_linear_l +ffffffff824908d0 T get_pte_buffer_mode +ffffffff82490a40 T get_subviewport_lines_needed_in_mall +ffffffff82490ba0 T get_surface_size_in_mall +ffffffff82490d00 T get_total_immediate_flip_bytes +ffffffff82490e50 T get_total_immediate_flip_bw +ffffffff82491060 T get_total_prefetch_bw +ffffffff82491270 T get_total_surface_size_in_mall_bytes +ffffffff82491450 T get_det_buffer_size_kbytes +ffffffff824915b0 T get_is_phantom_pipe +ffffffff82491710 T Calculate256BBlockSizes +ffffffff82491800 T CalculateMinAndMaxPrefetchMode +ffffffff82491880 T ModeSupportAndSystemConfiguration +ffffffff82491be0 T CalculateWriteBackDISPCLK +ffffffff82493000 T print__rq_params_st +ffffffff82493030 T print__data_rq_sizing_params_st +ffffffff82493060 T print__data_rq_dlg_params_st +ffffffff82493090 T print__data_rq_misc_params_st +ffffffff824930c0 T print__rq_dlg_params_st +ffffffff824930f0 T print__dlg_sys_params_st +ffffffff82493120 T print__data_rq_regs_st +ffffffff82493150 T print__rq_regs_st +ffffffff82493180 T print__dlg_regs_st +ffffffff824931b0 T print__ttu_regs_st +ffffffff82494000 T dml1_extract_rq_regs +ffffffff82494340 T dml1_rq_dlg_get_rq_params +ffffffff82494520 t get_surf_rq_param +ffffffff82495110 T dml1_rq_dlg_get_dlg_params +ffffffff82498000 T _do_calc_rc_params +ffffffff82498fd0 t get_qp_set +ffffffff8249a000 T dml_get_return_bw_mbps_vm_only +ffffffff8249a0b0 T dml_get_return_bw_mbps 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CalculateVMAndRowBytes +ffffffff824b5650 T dml_mode_support +ffffffff824b5820 T dml_mode_programming +ffffffff824b5ad0 T dml_mode_support_ex +ffffffff824b5dd0 T dml_get_is_phantom_pipe +ffffffff824b5e10 T dml_get_wm_urgent +ffffffff824b5e40 T dml_get_wm_stutter_exit +ffffffff824b5e70 T dml_get_wm_stutter_enter_exit +ffffffff824b5ea0 T dml_get_wm_memory_trip +ffffffff824b5ed0 T dml_get_wm_fclk_change +ffffffff824b5f00 T dml_get_wm_usr_retraining +ffffffff824b5f30 T dml_get_wm_dram_clock_change +ffffffff824b5f60 T dml_get_wm_z8_stutter_enter_exit +ffffffff824b5f90 T dml_get_wm_z8_stutter +ffffffff824b5fc0 T dml_get_fraction_of_urgent_bandwidth +ffffffff824b5ff0 T dml_get_fraction_of_urgent_bandwidth_imm_flip +ffffffff824b6020 T dml_get_urgent_latency +ffffffff824b6050 T dml_get_clk_dcf_deepsleep +ffffffff824b6080 T dml_get_wm_writeback_dram_clock_change +ffffffff824b60b0 T dml_get_wm_writeback_urgent +ffffffff824b60e0 T dml_get_stutter_efficiency +ffffffff824b6110 T dml_get_stutter_efficiency_no_vblank +ffffffff824b6140 T dml_get_stutter_efficiency_z8 +ffffffff824b6170 T dml_get_stutter_num_bursts_z8 +ffffffff824b61b0 T dml_get_stutter_period +ffffffff824b61e0 T dml_get_stutter_efficiency_z8_bestcase +ffffffff824b6210 T dml_get_stutter_num_bursts_z8_bestcase +ffffffff824b6250 T dml_get_stutter_period_bestcase +ffffffff824b6280 T dml_get_urgent_extra_latency +ffffffff824b62b0 T dml_get_fclk_change_latency +ffffffff824b62e0 T dml_get_dispclk_calculated +ffffffff824b6310 T dml_get_total_data_read_bw +ffffffff824b6340 T dml_get_return_bw +ffffffff824b6370 T dml_get_return_dram_bw +ffffffff824b63a0 T dml_get_tcalc +ffffffff824b63d0 T dml_get_comp_buffer_size_kbytes +ffffffff824b6400 T dml_get_pixel_chunk_size_in_kbyte +ffffffff824b6430 T dml_get_alpha_pixel_chunk_size_in_kbyte +ffffffff824b6460 T dml_get_meta_chunk_size_in_kbyte +ffffffff824b6490 T dml_get_min_pixel_chunk_size_in_byte +ffffffff824b64c0 T dml_get_min_meta_chunk_size_in_byte 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T dml_get_refcyc_per_vm_req_vblank_in_us +ffffffff824b6a20 T dml_get_refcyc_per_vm_req_flip_in_us +ffffffff824b6a60 T dml_get_refcyc_per_vm_dmdata_in_us +ffffffff824b6aa0 T dml_get_dmdata_dl_delta_in_us +ffffffff824b6ae0 T dml_get_refcyc_per_line_delivery_l_in_us +ffffffff824b6b20 T dml_get_refcyc_per_line_delivery_c_in_us +ffffffff824b6b60 T dml_get_refcyc_per_line_delivery_pre_l_in_us +ffffffff824b6ba0 T dml_get_refcyc_per_line_delivery_pre_c_in_us +ffffffff824b6be0 T dml_get_refcyc_per_req_delivery_l_in_us +ffffffff824b6c20 T dml_get_refcyc_per_req_delivery_c_in_us +ffffffff824b6c60 T dml_get_refcyc_per_req_delivery_pre_l_in_us +ffffffff824b6ca0 T dml_get_refcyc_per_req_delivery_pre_c_in_us +ffffffff824b6ce0 T dml_get_refcyc_per_cursor_req_delivery_in_us +ffffffff824b6d20 T dml_get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff824b6d60 T dml_get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff824b6da0 T dml_get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff824b6de0 T dml_get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff824b6e20 T dml_get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff824b6e60 T dml_get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff824b6ea0 T dml_get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff824b6ee0 T dml_get_refcyc_per_pte_group_nom_l_in_us +ffffffff824b6f20 T dml_get_refcyc_per_pte_group_nom_c_in_us +ffffffff824b6f60 T dml_get_refcyc_per_pte_group_vblank_l_in_us +ffffffff824b6fa0 T dml_get_refcyc_per_pte_group_vblank_c_in_us +ffffffff824b6fe0 T dml_get_refcyc_per_pte_group_flip_l_in_us +ffffffff824b7020 T dml_get_refcyc_per_pte_group_flip_c_in_us +ffffffff824b7060 T dml_get_dpte_group_size_in_bytes +ffffffff824b70a0 T dml_get_vm_group_size_in_bytes +ffffffff824b70e0 T dml_get_swath_height_l +ffffffff824b7120 T dml_get_swath_height_c +ffffffff824b7160 T dml_get_dpte_row_height_l +ffffffff824b71a0 T dml_get_dpte_row_height_c +ffffffff824b71e0 T dml_get_dpte_row_height_linear_l +ffffffff824b7220 T dml_get_dpte_row_height_linear_c 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+ffffffff824b7720 T dml_get_pte_buffer_mode +ffffffff824b7760 T dml_get_bigk_fragment_size +ffffffff824b77a0 T dml_get_dpte_bytes_per_row +ffffffff824b77e0 T dml_get_meta_bytes_per_row +ffffffff824b7820 T dml_get_det_buffer_size_kbytes +ffffffff824b7860 t TruncToValidBPP +ffffffff824b7bd0 t dscceComputeDelay +ffffffff824b7d50 t CalculatePrefetchSourceLines +ffffffff824b7f70 t CalculateVUpdateAndDynamicMetadataParameters +ffffffff824b9000 T dml_util_is_420 +ffffffff824b90a0 T dml_ceil +ffffffff824b9180 T dml_floor +ffffffff824b9250 T dml_min +ffffffff824b9290 T dml_min3 +ffffffff824b9300 T dml_min4 +ffffffff824b9380 T dml_max +ffffffff824b93c0 T dml_max3 +ffffffff824b9430 T dml_max4 +ffffffff824b94b0 T dml_max5 +ffffffff824b9540 T dml_log +ffffffff824b9620 T dml_log2 +ffffffff824b96a0 T dml_round +ffffffff824b9730 T dml_pow +ffffffff824b9780 t dcn_bw_pow +ffffffff824b9820 T dml_round_to_multiple +ffffffff824b9870 T dml_print_data_rq_regs_st +ffffffff824b98a0 T dml_print_rq_regs_st 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dml21_apply_soc_bb_overrides +ffffffff824bab40 T dml21_map_dc_state_into_dml_display_cfg +ffffffff824bbed0 T dml21_copy_clocks_to_dc_state +ffffffff824bbfd0 T dml21_extract_legacy_watermark_set +ffffffff824bc260 T dml21_extract_watermark_sets +ffffffff824bc350 T dml21_populate_pipe_ctx_dlg_params +ffffffff824bc530 T dml21_map_hw_resources +ffffffff824bc600 T dml21_get_pipe_mcache_config +ffffffff824bc670 T dml21_set_dc_p_state_type +ffffffff824bd000 T dml21_helper_find_dml_pipe_idx_by_stream_id +ffffffff824bd0b0 T dml21_find_dml_pipe_idx_by_plane_id +ffffffff824bd160 T dml21_get_plane_id +ffffffff824bd200 T dml21_get_dc_plane_idx_from_plane_id +ffffffff824bd230 T find_valid_pipe_idx_for_stream_index +ffffffff824bd2c0 T find_pipe_regs_idx +ffffffff824bd350 T dml21_find_dc_pipes_for_plane +ffffffff824bd550 T dml21_update_pipe_ctx_dchub_regs +ffffffff824bd9c0 T dml21_populate_mall_allocation_size +ffffffff824bda80 T check_dp2p0_output_encoder +ffffffff824bdb60 T dml21_program_dc_pipe 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dce110_disable_stream +ffffffff825a3570 T dce110_unblank_stream +ffffffff825a3680 T dce110_blank_stream +ffffffff825a3830 T dce110_set_avmute +ffffffff825a3880 T dce110_apply_single_controller_ctx_to_hw +ffffffff825a3de0 t build_audio_output +ffffffff825a4140 T dce110_enable_accelerated_mode +ffffffff825a4890 t power_down_all_hw_blocks +ffffffff825a4a90 T dce110_set_safe_displaymarks +ffffffff825a4bc0 T dce110_apply_ctx_to_hw +ffffffff825a51a0 t enable_fbc +ffffffff825a5370 T dce110_power_down +ffffffff825a5490 T dce110_prepare_bandwidth +ffffffff825a5600 T dce110_optimize_bandwidth +ffffffff825a5850 T dce110_set_backlight_level +ffffffff825a5970 T dce110_set_abm_immediate_disable +ffffffff825a5a00 T dce110_set_pipe +ffffffff825a5a70 T dce110_enable_lvds_link_output +ffffffff825a5ad0 T dce110_enable_tmds_link_output +ffffffff825a5b40 T dce110_enable_dp_link_output +ffffffff825a5da0 T dce110_disable_link_output +ffffffff825a5ec0 T dce110_hw_sequencer_construct +ffffffff825a5f20 t enable_display_pipe_clock_gating +ffffffff825a5f50 t init_hw +ffffffff825a6290 t dce110_power_down_fe +ffffffff825a6370 t dce110_apply_ctx_for_surface +ffffffff825a6b40 t dce110_post_unlock_program_front_end +ffffffff825a6b70 t update_plane_addr +ffffffff825a6be0 t dce110_wait_for_mpcc_disconnect +ffffffff825a6c10 t dce110_update_pending_status +ffffffff825a6d00 t get_position +ffffffff825a6d90 t dce110_enable_per_frame_crtc_position_reset +ffffffff825a6f60 t dce110_enable_timing_synchronization +ffffffff825a7210 t set_drr +ffffffff825a7310 t set_static_screen_control +ffffffff825a73f0 t dce110_set_cursor_position +ffffffff825a7550 t dce110_set_cursor_attribute +ffffffff825a7610 t program_gamut_remap +ffffffff825a7770 t program_output_csc +ffffffff825a7870 t wait_for_reset_trigger_to_occur +ffffffff825a79d0 t init_pipes +ffffffff825a7a00 t dce110_reset_hw_ctx_wrap +ffffffff825a7cd0 t dce110_set_input_transfer_func +ffffffff825a7e70 t dce110_set_output_transfer_func +ffffffff825a88a0 t dce110_enable_display_power_gating +ffffffff825a8a20 t dce110_enable_stream_timing +ffffffff825a9000 T dce112_hw_sequencer_construct +ffffffff825a9060 t dce112_enable_display_power_gating +ffffffff825aa000 T dce121_xgmi_enabled +ffffffff825aa070 T dce120_hw_sequencer_construct +ffffffff825aa0d0 t dce120_enable_display_power_gating +ffffffff825aa100 t dce120_update_dchub +ffffffff825ab000 T dce80_hw_sequencer_construct +ffffffff825ac000 T dcn10_lock_all_pipes +ffffffff825ac140 T dcn10_log_hw_state +ffffffff825ae110 T dcn10_did_underflow_occur +ffffffff825ae1d0 T dcn10_enable_power_gating_plane +ffffffff825ae3b0 T dcn10_disable_vga +ffffffff825ae5f0 T dcn10_dpp_pg_control +ffffffff825ae860 T dcn10_hubp_pg_control +ffffffff825aead0 T dcn10_bios_golden_init +ffffffff825aec60 T dcn10_enable_stream_timing +ffffffff825af0e0 T dcn10_verify_allow_pstate_change_high +ffffffff825af410 T dcn10_plane_atomic_disconnect +ffffffff825af560 T dcn10_plane_atomic_power_down +ffffffff825af710 T dcn10_plane_atomic_disable +ffffffff825af880 T dcn10_disable_plane +ffffffff825afa70 T dcn10_init_pipes +ffffffff825b02d0 T dcn10_init_hw +ffffffff825b08a0 T dcn10_power_down_on_boot +ffffffff825b0a40 T dcn10_reset_hw_ctx_wrap +ffffffff825b0e00 T dcn10_update_plane_addr +ffffffff825b0f30 T dcn10_set_input_transfer_func +ffffffff825b10d0 T dcn10_set_output_transfer_func +ffffffff825b11b0 T dcn10_pipe_control_lock +ffffffff825b1280 T dcn10_cursor_lock +ffffffff825b1470 T dcn10_enable_vblanks_synchronization +ffffffff825b1d60 T dcn10_enable_timing_synchronization +ffffffff825b2160 t wait_for_reset_trigger_to_occur +ffffffff825b22c0 T dcn10_enable_per_frame_crtc_position_reset +ffffffff825b2420 T dcn10_program_gamut_remap +ffffffff825b2620 T dcn10_program_output_csc +ffffffff825b2770 T dcn10_update_visual_confirm_color +ffffffff825b27f0 T dcn10_update_mpcc +ffffffff825b2af0 T dcn10_blank_pixel_data +ffffffff825b2c70 T dcn10_set_hdr_multiplier +ffffffff825b2d10 T dcn10_program_pipe +ffffffff825b3ab0 T dcn10_wait_for_pending_cleared +ffffffff825b3bd0 T dcn10_post_unlock_program_front_end +ffffffff825b3ea0 T dcn10_prepare_bandwidth +ffffffff825b4070 T dcn10_optimize_bandwidth +ffffffff825b4240 T dcn10_set_drr +ffffffff825b4340 T dcn10_get_position +ffffffff825b43d0 T dcn10_set_static_screen_control +ffffffff825b4480 T dcn10_setup_stereo +ffffffff825b45f0 T dcn10_wait_for_mpcc_disconnect +ffffffff825b47c0 T dcn10_dummy_display_power_gating +ffffffff825b47f0 T dcn10_update_pending_status +ffffffff825b4950 T dcn10_update_dchub +ffffffff825b4980 T dcn10_set_cursor_position +ffffffff825b4f00 T dcn10_set_cursor_attribute +ffffffff825b4f60 T dcn10_set_cursor_sdr_white_level +ffffffff825b5030 T dcn10_get_vupdate_offset_from_vsync +ffffffff825b50c0 T dcn10_calc_vupdate_position +ffffffff825b5160 T dcn10_setup_periodic_interrupt +ffffffff825b5280 T dcn10_setup_vupdate_interrupt +ffffffff825b5350 T dcn10_unblank_stream +ffffffff825b5470 T dcn10_send_immediate_sdp_message +ffffffff825b54d0 T dcn10_set_clock +ffffffff825b55e0 T dcn10_get_clock +ffffffff825b5640 T dcn10_get_dcc_en_bits +ffffffff825b6000 T dcn10_hw_sequencer_construct +ffffffff825b7000 T dcn20_log_color_state +ffffffff825b75d0 T dcn20_setup_gsl_group_as_lock +ffffffff825b7830 T dcn20_set_flip_control_gsl +ffffffff825b7880 T dcn20_enable_power_gating_plane +ffffffff825b7d80 T dcn20_dccg_init +ffffffff825b7e10 T dcn20_disable_vga +ffffffff825b7f00 T dcn20_program_triple_buffer +ffffffff825b7f50 T dcn20_init_blank +ffffffff825b81c0 T dcn20_dsc_pg_control +ffffffff825b8630 T dcn20_dpp_pg_control +ffffffff825b8910 T dcn20_hubp_pg_control +ffffffff825b8bf0 T dcn20_plane_atomic_disable +ffffffff825b8d90 T dcn20_disable_plane +ffffffff825b8ea0 T dcn20_disable_pixel_data +ffffffff825b8ec0 T dcn20_blank_pixel_data +ffffffff825b90b0 T dcn20_enable_stream_timing +ffffffff825b9900 T dcn20_program_output_csc +ffffffff825b99f0 T dcn20_set_output_transfer_func +ffffffff825b9b70 T dcn20_set_blend_lut +ffffffff825b9bf0 T dcn20_set_shaper_3dlut +ffffffff825b9cb0 T dcn20_set_input_transfer_func +ffffffff825b9e80 T dcn20_update_odm +ffffffff825b9fb0 T dcn20_pipe_control_lock +ffffffff825ba2f0 T dcn20_program_front_end_for_ctx +ffffffff825bb230 t dcn20_program_pipe +ffffffff825bc0d0 T dcn20_post_unlock_program_front_end +ffffffff825bc720 T dcn20_prepare_bandwidth +ffffffff825bc8e0 T dcn20_optimize_bandwidth +ffffffff825bcb40 T dcn20_update_bandwidth +ffffffff825bce40 T dcn20_enable_writeback +ffffffff825bcfd0 T dcn20_disable_writeback +ffffffff825bd070 T dcn20_wait_for_blank_complete +ffffffff825bd130 T dcn20_dmdata_status_done +ffffffff825bd180 T dcn20_disable_stream_gating +ffffffff825bd230 T dcn20_enable_stream_gating +ffffffff825bd2e0 T dcn20_set_dmdata_attributes +ffffffff825bd3a0 T dcn20_init_vm_ctx +ffffffff825bd470 T dcn20_init_sys_ctx +ffffffff825bd520 T dcn20_update_plane_addr +ffffffff825bd670 T dcn20_unblank_stream +ffffffff825bd860 T dcn20_setup_vupdate_interrupt +ffffffff825bd8d0 T dcn20_reset_back_end_for_pipe +ffffffff825bdbb0 T dcn20_reset_hw_ctx_wrap +ffffffff825bdd10 T dcn20_update_mpcc +ffffffff825bdfb0 T dcn20_enable_stream +ffffffff825be2e0 T dcn20_program_dmdata_engine +ffffffff825be380 T dcn20_fpga_init_hw +ffffffff825bea30 T dcn20_set_disp_pattern_generator +ffffffff825bf000 T dcn20_hw_sequencer_construct +ffffffff825c0000 T dcn201_update_plane_addr +ffffffff825c0450 T dcn201_init_blank +ffffffff825c05e0 T dcn201_init_hw +ffffffff825c0e30 T dcn201_plane_atomic_disconnect +ffffffff825c0fc0 T dcn201_update_mpcc +ffffffff825c12b0 T dcn201_pipe_control_lock +ffffffff825c13b0 T dcn201_set_cursor_attribute +ffffffff825c1490 T dcn201_set_dmdata_attributes +ffffffff825c15f0 T dcn201_unblank_stream +ffffffff825c2000 T dcn201_hw_sequencer_construct +ffffffff825c3000 T dcn21_init_sys_ctx +ffffffff825c3130 T dcn21_s0i3_golden_init_wa +ffffffff825c31a0 T dcn21_exit_optimized_pwr_state +ffffffff825c31c0 T dcn21_optimize_pwr_state +ffffffff825c31f0 T dcn21_PLAT_58856_wa +ffffffff825c32a0 T dcn21_set_abm_immediate_disable +ffffffff825c3400 T dcn21_set_pipe +ffffffff825c3530 T dcn21_set_backlight_level +ffffffff825c3770 T dcn21_is_abm_supported +ffffffff825c4000 T dcn21_hw_sequencer_construct +ffffffff825c5000 T dcn30_log_color_state +ffffffff825c5770 T dcn30_set_blend_lut +ffffffff825c5830 T dcn30_set_input_transfer_func +ffffffff825c59b0 T dcn30_program_gamut_remap +ffffffff825c5cf0 T dcn30_set_output_transfer_func +ffffffff825c6090 T dcn30_update_writeback +ffffffff825c6150 t dcn30_set_writeback +ffffffff825c6330 T dcn30_mmhubbub_warmup +ffffffff825c65a0 T dcn30_enable_writeback +ffffffff825c6690 T dcn30_disable_writeback +ffffffff825c67b0 T dcn30_program_all_writeback_pipes_in_tree +ffffffff825c6b00 T dcn30_init_hw +ffffffff825c73f0 T dcn30_set_avmute +ffffffff825c7560 T dcn30_update_info_frame +ffffffff825c7660 T dcn30_program_dmdata_engine +ffffffff825c7700 T dcn30_apply_idle_power_optimizations +ffffffff825c7c40 T dcn30_does_plane_fit_in_mall +ffffffff825c7cf0 T dcn30_hardware_release +ffffffff825c7e30 T dcn30_set_disp_pattern_generator +ffffffff825c7eb0 T dcn30_prepare_bandwidth +ffffffff825c8000 T dcn30_hw_sequencer_construct +ffffffff825c9000 T dcn301_hw_sequencer_construct +ffffffff825ca000 T dcn302_dpp_pg_control +ffffffff825ca2d0 T dcn302_hubp_pg_control +ffffffff825ca5a0 T dcn302_dsc_pg_control +ffffffff825cb000 T dcn302_hw_sequencer_construct +ffffffff825cc000 T dcn303_dpp_pg_control +ffffffff825cc030 T dcn303_hubp_pg_control +ffffffff825cc060 T dcn303_dsc_pg_control +ffffffff825cc090 T dcn303_enable_power_gating_plane +ffffffff825cd000 T dcn303_hw_sequencer_construct +ffffffff825ce000 T dcn31_init_hw +ffffffff825ce9b0 T dcn31_dsc_pg_control +ffffffff825ced40 T dcn31_enable_power_gating_plane +ffffffff825ceff0 T dcn31_update_info_frame +ffffffff825cf140 T dcn31_z10_save_init +ffffffff825cf1e0 T dcn31_z10_restore +ffffffff825cf2a0 T dcn31_hubp_pg_control +ffffffff825cf600 T dcn31_init_sys_ctx +ffffffff825cf6c0 T dcn31_reset_hw_ctx_wrap +ffffffff825cfb20 T dcn31_setup_hpo_hw_control +ffffffff825cfb90 T dcn31_set_static_screen_control +ffffffff825d0000 T dcn31_hw_sequencer_construct +ffffffff825d1000 T dcn314_update_odm +ffffffff825d15e0 T dcn314_dsc_pg_control +ffffffff825d1a00 T dcn314_enable_power_gating_plane +ffffffff825d1ce0 T dcn314_calculate_dccg_k1_k2_values +ffffffff825d1eb0 T dcn314_calculate_pix_rate_divider +ffffffff825d1f70 T dcn314_resync_fifo_dccg_dio +ffffffff825d2330 T dcn314_dpp_root_clock_control +ffffffff825d2390 T dcn314_disable_link_output +ffffffff825d3000 T dcn314_hw_sequencer_construct +ffffffff825d4000 T dcn32_dsc_pg_control +ffffffff825d43c0 T dcn32_enable_power_gating_plane +ffffffff825d4680 T dcn32_hubp_pg_control +ffffffff825d4920 T dcn32_apply_idle_power_optimizations +ffffffff825d4c80 T dcn32_commit_subvp_config +ffffffff825d4d70 T dcn32_subvp_pipe_control_lock +ffffffff825d4f90 T dcn32_subvp_pipe_control_lock_fast +ffffffff825d4ff0 T dcn32_set_mpc_shaper_3dlut +ffffffff825d5120 T dcn32_set_mcm_luts +ffffffff825d52e0 T dcn32_set_input_transfer_func +ffffffff825d5430 T dcn32_set_output_transfer_func +ffffffff825d5690 T dcn32_update_force_pstate +ffffffff825d59c0 T dcn32_update_mall_sel +ffffffff825d5c30 T dcn32_program_mall_pipe_config +ffffffff825d5d50 T dcn32_init_hw +ffffffff825d6860 T dcn32_update_dsc_on_stream +ffffffff825d6e10 T dcn32_update_odm +ffffffff825d70d0 T dcn32_calculate_dccg_k1_k2_values +ffffffff825d7340 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff825d73f0 T dcn32_calculate_pix_rate_divider +ffffffff825d74b0 T dcn32_resync_fifo_dccg_dio +ffffffff825d77c0 T dcn32_unblank_stream +ffffffff825d79d0 T dcn32_disable_link_output +ffffffff825d7dd0 T dcn32_update_phantom_vp_position +ffffffff825d7f40 T dcn32_apply_update_flags_for_phantom +ffffffff825d7fc0 T dcn32_dsc_pg_status +ffffffff825d80a0 T dcn32_update_dsc_pg +ffffffff825d81b0 T dcn32_disable_phantom_streams +ffffffff825d8360 T dcn32_enable_phantom_streams +ffffffff825d8650 T dcn32_init_blank +ffffffff825d88f0 T dcn32_blank_phantom +ffffffff825d8aa0 T dcn32_is_pipe_topology_transition_seamless +ffffffff825d8d50 T dcn32_prepare_bandwidth +ffffffff825d8e60 T dcn32_interdependent_update_lock +ffffffff825d8f90 T dcn32_program_outstanding_updates +ffffffff825d9000 T dcn32_hw_sequencer_init_functions +ffffffff825da000 T dcn35_set_dmu_fgcg +ffffffff825da0b0 T dcn35_setup_hpo_hw_control +ffffffff825da0f0 T dcn35_init_hw +ffffffff825da930 T dcn35_update_odm +ffffffff825db000 T dcn35_dpp_root_clock_control +ffffffff825db060 T dcn35_dpstream_root_clock_control +ffffffff825db0c0 T dcn35_physymclk_root_clock_control +ffffffff825db120 T dcn35_dsc_pg_control +ffffffff825db4a0 T dcn35_enable_power_gating_plane +ffffffff825db750 T dcn35_power_down_on_boot +ffffffff825db920 T dcn35_apply_idle_power_optimizations +ffffffff825dba60 T dcn35_z10_restore +ffffffff825dbac0 T dcn35_init_pipes +ffffffff825dc330 T dcn35_enable_plane +ffffffff825dc470 T dcn35_plane_atomic_disable +ffffffff825dc5d0 T dcn35_disable_plane +ffffffff825dc700 T dcn35_calc_blocks_to_gate +ffffffff825dcaf0 T dcn35_calc_blocks_to_ungate +ffffffff825dcf40 T dcn35_hw_block_power_down +ffffffff825dd130 T dcn35_hw_block_power_up +ffffffff825dd300 T dcn35_root_clock_control +ffffffff825dd5c0 T dcn35_prepare_bandwidth +ffffffff825dd670 T dcn35_optimize_bandwidth +ffffffff825dd720 T dcn35_set_drr +ffffffff825dd8a0 T dcn35_set_static_screen_control +ffffffff825dd950 T dcn35_set_long_vblank +ffffffff825dda20 T dcn35_is_dp_dig_pixel_rate_div_policy +ffffffff825de000 T dcn35_hw_sequencer_construct +ffffffff825df000 T dcn351_calc_blocks_to_gate +ffffffff825df0f0 T dcn351_calc_blocks_to_ungate +ffffffff825df1e0 T dcn351_hw_block_power_down +ffffffff825df2f0 T dcn351_hw_block_power_up +ffffffff825e0000 T dcn351_hw_sequencer_construct +ffffffff825e1000 T dcn401_program_gamut_remap +ffffffff825e14b0 T dcn401_read_ono_state +ffffffff825e1670 T dcn401_init_hw +ffffffff825e21e0 T dcn401_setup_hpo_hw_control +ffffffff825e2220 T dcn401_populate_mcm_luts +ffffffff825e2830 T dcn401_trigger_3dlut_dma_load +ffffffff825e2880 T dcn401_set_mcm_luts +ffffffff825e2a60 T dcn401_set_output_transfer_func +ffffffff825e2bf0 T dcn401_calculate_dccg_tmds_div_value +ffffffff825e2c60 T dcn401_enable_stream_timing +ffffffff825e3300 T dcn401_enable_stream +ffffffff825e3600 T adjust_hotspot_between_slices_for_2x_magnify +ffffffff825e3640 T dcn401_set_cursor_position +ffffffff825e3aa0 T dcn401_apply_idle_power_optimizations +ffffffff825e3da0 T dcn401_wait_for_dcc_meta_propagation +ffffffff825e3e20 T dcn401_prepare_bandwidth +ffffffff825e4040 T dcn401_fams2_global_control_lock +ffffffff825e40b0 T dcn401_fams2_update_config +ffffffff825e4110 T dcn401_optimize_bandwidth +ffffffff825e4370 T dcn401_fams2_global_control_lock_fast +ffffffff825e43d0 T dcn401_update_odm +ffffffff825e47e0 T dcn401_unblank_stream +ffffffff825e4960 T dcn401_hardware_release +ffffffff825e4a40 T dcn401_wait_for_det_buffer_update +ffffffff825e4b80 T dcn401_interdependent_update_lock +ffffffff825e4ea0 T dcn401_program_outstanding_updates +ffffffff825e5000 T dcn401_hw_sequencer_init_functions +ffffffff825e6000 T dal_irq_service_dummy_set +ffffffff825e6090 T dal_irq_service_dummy_ack +ffffffff825e6110 T dce110_vblank_set +ffffffff825e6230 T to_dal_irq_source_dce110 +ffffffff825e63b0 T dal_irq_service_dce110_create +ffffffff825e6440 t hpd_ack +ffffffff825e7000 T dal_irq_service_dce120_create ffffffff825e7090 t hpd_ack -ffffffff825e7160 t to_dal_irq_source_dcn20 -ffffffff825e8000 T dal_irq_service_dcn201_create +ffffffff825e8000 T dal_irq_service_dce80_create ffffffff825e8090 t hpd_ack -ffffffff825e8160 t to_dal_irq_source_dcn201 -ffffffff825e9000 T dal_irq_service_dcn21_create +ffffffff825e9000 T dal_irq_service_dcn10_create ffffffff825e9090 t hpd_ack -ffffffff825e9160 t to_dal_irq_source_dcn21 -ffffffff825ea000 T dal_irq_service_dcn30_create +ffffffff825e9160 t to_dal_irq_source_dcn10 +ffffffff825ea000 T dal_irq_service_dcn20_create ffffffff825ea090 t hpd_ack -ffffffff825ea160 t to_dal_irq_source_dcn30 -ffffffff825eb000 T dal_irq_service_dcn302_create +ffffffff825ea160 t to_dal_irq_source_dcn20 +ffffffff825eb000 T dal_irq_service_dcn201_create ffffffff825eb090 t hpd_ack -ffffffff825eb160 t to_dal_irq_source_dcn302 -ffffffff825ec000 T dal_irq_service_dcn303_create +ffffffff825eb160 t to_dal_irq_source_dcn201 +ffffffff825ec000 T dal_irq_service_dcn21_create ffffffff825ec090 t hpd_ack -ffffffff825ec160 t to_dal_irq_source_dcn303 -ffffffff825ed000 T dal_irq_service_dcn31_create +ffffffff825ec160 t to_dal_irq_source_dcn21 +ffffffff825ed000 T dal_irq_service_dcn30_create ffffffff825ed090 t hpd_ack -ffffffff825ed160 t to_dal_irq_source_dcn31 -ffffffff825ee000 T dal_irq_service_dcn314_create +ffffffff825ed160 t to_dal_irq_source_dcn30 +ffffffff825ee000 T dal_irq_service_dcn302_create ffffffff825ee090 t hpd_ack -ffffffff825ee160 t to_dal_irq_source_dcn314 -ffffffff825ef000 T dal_irq_service_dcn315_create +ffffffff825ee160 t to_dal_irq_source_dcn302 +ffffffff825ef000 T dal_irq_service_dcn303_create ffffffff825ef090 t hpd_ack -ffffffff825ef160 t to_dal_irq_source_dcn315 -ffffffff825f0000 T dal_irq_service_dcn32_create +ffffffff825ef160 t to_dal_irq_source_dcn303 +ffffffff825f0000 T dal_irq_service_dcn31_create ffffffff825f0090 t hpd_ack -ffffffff825f0160 t to_dal_irq_source_dcn32 -ffffffff825f1000 T dal_irq_service_dcn35_create -ffffffff825f1c40 t hpd_ack -ffffffff825f1d10 t to_dal_irq_source_dcn35 -ffffffff825f2000 T dal_irq_service_dcn351_create -ffffffff825f2c40 t hpd_ack -ffffffff825f2d10 t to_dal_irq_source_dcn351 -ffffffff825f3000 T dal_irq_service_dcn401_create +ffffffff825f0160 t to_dal_irq_source_dcn31 +ffffffff825f1000 T dal_irq_service_dcn314_create +ffffffff825f1090 t hpd_ack +ffffffff825f1160 t to_dal_irq_source_dcn314 +ffffffff825f2000 T dal_irq_service_dcn315_create +ffffffff825f2090 t hpd_ack +ffffffff825f2160 t to_dal_irq_source_dcn315 +ffffffff825f3000 T dal_irq_service_dcn32_create ffffffff825f3090 t hpd_ack -ffffffff825f3160 t to_dal_irq_source_dcn401 -ffffffff825f4000 T dal_irq_service_construct -ffffffff825f4070 T dal_irq_service_destroy -ffffffff825f4100 T dal_irq_service_set_generic -ffffffff825f4180 T dal_irq_service_set -ffffffff825f43b0 T dal_irq_service_ack -ffffffff825f45a0 T dal_irq_service_ack_generic -ffffffff825f4620 T dal_irq_service_to_irq_source -ffffffff825f5000 T dp_handle_automated_test -ffffffff825f59d0 T dp_set_test_pattern -ffffffff825f6240 t set_crtc_test_pattern -ffffffff825f6600 T dp_set_preferred_link_settings -ffffffff825f6760 t dp_retrain_link_dp_test -ffffffff825f6900 T dp_set_preferred_training_settings -ffffffff825f7000 T dp_trace_init -ffffffff825f70a0 T dp_trace_reset -ffffffff825f7130 T dp_trace_is_initialized -ffffffff825f7160 T dp_trace_detect_lt_init -ffffffff825f71b0 T dp_trace_commit_lt_init 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sdmmc_io_write_multi_1 -ffffffff82a87fb0 T sdmmc_io_read_region_1 -ffffffff82a880b0 T sdmmc_io_write_region_1 -ffffffff82a881b0 T sdmmc_io_xchg -ffffffff82a88370 T sdmmc_intr_enable -ffffffff82a88650 T sdmmc_intr_disable -ffffffff82a88930 T sdmmc_intr_establish -ffffffff82a88a50 T sdmmc_intr_disestablish -ffffffff82a88b50 T sdmmc_card_intr -ffffffff82a88ba0 T sdmmc_intr_task -ffffffff82a88c60 T sdmmc_io_set_blocklen -ffffffff82a89000 T sdmmc_mem_enable -ffffffff82a894d0 T sdmmc_mem_send_op_cond -ffffffff82a896b0 T sdmmc_mem_signal_voltage -ffffffff82a897b0 T sdmmc_mem_scan -ffffffff82a89b00 T sdmmc_decode_csd -ffffffff82a89f50 T sdmmc_decode_cid -ffffffff82a8a400 T sdmmc_mem_send_scr -ffffffff82a8a560 T sdmmc_mem_decode_scr -ffffffff82a8a5c0 T sdmmc_mem_send_cxd_data -ffffffff82a8a740 T sdmmc_mem_set_bus_width -ffffffff82a8a870 T sdmmc_mem_sd_switch -ffffffff82a8ab30 T sdmmc_be512_to_bitfield512 -ffffffff82a8abe0 T sdmmc_mem_mmc_switch -ffffffff82a8acd0 T sdmmc_mem_init -ffffffff82a8ae60 T sdmmc_mem_set_blocklen -ffffffff82a8af70 T sdmmc_mem_sd_init -ffffffff82a8b3e0 T sdmmc_mem_mmc_init -ffffffff82a8bb60 T sdmmc_mem_select_transfer_mode -ffffffff82a8bbe0 T sdmmc_mem_execute_tuning -ffffffff82a8bc70 T sdmmc_mem_read_block_subr -ffffffff82a8c000 T sdmmc_mem_single_read_block -ffffffff82a8c0d0 T sdmmc_mem_read_block -ffffffff82a8c2e0 T sdmmc_mem_write_block_subr -ffffffff82a8c660 T sdmmc_mem_single_write_block -ffffffff82a8c730 T sdmmc_mem_write_block -ffffffff82a8c940 T sdmmc_mem_hibernate_write -ffffffff82a8d000 T sdmmc_scsi_cmd -ffffffff82a8d200 T sdmmc_minphys -ffffffff82a8d280 T sdmmc_scsi_attach -ffffffff82a8d4c0 T sdmmc_alloc_ccbs -ffffffff82a8d620 T sdmmc_free_ccbs -ffffffff82a8d680 T sdmmc_scsi_detach -ffffffff82a8d840 T sdmmc_stimeout -ffffffff82a8d8e0 T sdmmc_ccb_alloc -ffffffff82a8d9a0 T sdmmc_ccb_free -ffffffff82a8daa0 T sdmmc_inquiry -ffffffff82a8dd30 T sdmmc_start_xs -ffffffff82a8de50 T sdmmc_complete_xs -ffffffff82a8df40 T sdmmc_done_xs -ffffffff82a8df90 T sdmmc_scsi_hibernate_io -ffffffff82a8f000 T bwfm_sdio_preinit -ffffffff82a8f5a0 T bwfm_sdio_txcheck -ffffffff82a8f5e0 T bwfm_sdio_txdata -ffffffff82a8f660 T bwfm_sdio_txctl -ffffffff82a8f7f0 T bwfm_sdio_buscore_read -ffffffff82a8f800 T bwfm_sdio_buscore_write -ffffffff82a8f820 T bwfm_sdio_buscore_prepare -ffffffff82a8f9a0 T bwfm_sdio_buscore_activate -ffffffff82a8fa30 T bwfm_sdio_match -ffffffff82a8fae0 T bwfm_sdio_attach -ffffffff82a8fe80 T bwfm_sdio_detach -ffffffff82a8ff00 T bwfm_sdio_task -ffffffff82a900c0 T bwfm_sdio_write_1 -ffffffff82a900f0 T bwfm_sdio_read_1 -ffffffff82a90120 T bwfm_sdio_write_4 -ffffffff82a901f0 T bwfm_sdio_read_4 -ffffffff82a902b0 T bwfm_sdio_load_microcode -ffffffff82a905a0 T bwfm_sdio_clkctl -ffffffff82a906d0 T bwfm_sdio_dev_write -ffffffff82a90720 T bwfm_sdio_intr -ffffffff82a90770 T bwfm_sdio_ram_read_write -ffffffff82a909f0 T bwfm_sdio_htclk -ffffffff82a90cb0 T bwfm_sdio_readshared -ffffffff82a90da0 T bwfm_sdio_dev_read -ffffffff82a90de0 T bwfm_sdio_rx_frames -ffffffff82a91210 T bwfm_sdio_tx_frames -ffffffff82a91330 T bwfm_sdio_backplane -ffffffff82a91400 T bwfm_sdio_buf_read -ffffffff82a91500 T bwfm_sdio_buf_write -ffffffff82a915d0 T bwfm_sdio_frame_read_write -ffffffff82a91780 T bwfm_sdio_newbuf -ffffffff82a91810 T bwfm_sdio_tx_ok -ffffffff82a91870 T bwfm_sdio_tx_ctrlframe -ffffffff82a91980 T bwfm_sdio_tx_dataframe -ffffffff82a91af0 T bwfm_sdio_rx_glom -ffffffff82a92000 T onewire_match -ffffffff82a92060 T onewire_attach -ffffffff82a92120 T onewire_detach -ffffffff82a921a0 T onewire_activate -ffffffff82a921c0 T onewire_scan -ffffffff82a92410 T onewire_createthread -ffffffff82a92480 T onewire_print -ffffffff82a92570 T onewirebus_print -ffffffff82a925c0 T onewire_lock -ffffffff82a925e0 T onewire_unlock -ffffffff82a92600 T onewire_reset -ffffffff82a92620 T onewire_bit -ffffffff82a92640 T onewire_read_byte -ffffffff82a927d0 T onewire_write_byte -ffffffff82a928e0 T onewire_read_block -ffffffff82a92980 T onewire_write_block -ffffffff82a92a20 T onewire_triplet -ffffffff82a92b30 T onewire_matchrom -ffffffff82a92d20 T onewire_search -ffffffff82a93190 T onewire_thread -ffffffff82a94000 T onewire_crc -ffffffff82a940b0 T onewire_crc16 -ffffffff82a94170 T onewire_famname -ffffffff82a941b0 T onewire_matchbyfam -ffffffff82a95000 T owid_match -ffffffff82a95030 T owid_attach -ffffffff82a95120 T owid_detach -ffffffff82a95170 T owid_activate -ffffffff82a96000 T owsbm_match -ffffffff82a96030 T owsbm_attach -ffffffff82a96240 T owsbm_detach -ffffffff82a962d0 T owsbm_activate -ffffffff82a96300 T owsbm_update -ffffffff82a97000 T owtemp_match -ffffffff82a97030 T owtemp_attach -ffffffff82a97160 T owtemp_detach -ffffffff82a971f0 T owtemp_activate -ffffffff82a97220 T owtemp_update -ffffffff82a98000 T owctr_match -ffffffff82a98030 T owctr_attach -ffffffff82a981c0 T owctr_detach -ffffffff82a98250 T owctr_activate -ffffffff82a98280 T owctr_update -ffffffff82a982c0 T owctr_update_counter -ffffffff82a99000 A __text_page_start -ffffffff82a99000 T Xsyscall_meltdown -ffffffff82a9900c T Xsyscall -ffffffff82a99299 t Xsyscall_trampback -ffffffff82a992b0 T intr_user_exit -ffffffff82a992f2 t intr_user_exit_post_ast -ffffffff82a9944b t Xiretq_trampback -ffffffff82a99457 T doreti_iret -ffffffff82a9a000 T alltraps -ffffffff82a9a138 T recall_trap -ffffffff82a9a150 T alltraps_kern -ffffffff82a9a153 T alltraps_kern_meltdown -ffffffff82a9b000 ? Xtrap00 -ffffffff82a9b000 A __kutext_start -ffffffff82a9b000 A __text_page_end -ffffffff82a9b010 ? Xtrap01 -ffffffff82a9b020 ? Xtrap02 -ffffffff82a9b028 c calltrap_specstk -ffffffff82a9b0f0 ? calltrap_specstk_tramp -ffffffff82a9b110 ? Xtrap03 -ffffffff82a9b120 ? Xtrap04 -ffffffff82a9b130 ? Xtrap05 -ffffffff82a9b140 ? Xtrap06 -ffffffff82a9b150 ? Xtrap07 -ffffffff82a9b160 ? Xtrap08 -ffffffff82a9b170 ? Xtrap09 -ffffffff82a9b180 ? Xtrap0a -ffffffff82a9b190 ? Xtrap0b -ffffffff82a9b1a0 ? Xtrap0c -ffffffff82a9b1b0 ? Xtrap0d -ffffffff82a9b240 ? Xtrap0e -ffffffff82a9b250 ? Xintrspurious -ffffffff82a9b250 ? Xtrap0f -ffffffff82a9b260 ? Xtrap10 -ffffffff82a9b270 ? Xtrap11 -ffffffff82a9b280 ? Xtrap12 -ffffffff82a9b290 ? Xtrap13 -ffffffff82a9b2a0 ? Xtrap14 -ffffffff82a9b2b0 ? Xtrap15 -ffffffff82a9b2c0 ? Xtrap16 -ffffffff82a9b2c0 ? Xtrap17 -ffffffff82a9b2c0 ? Xtrap18 -ffffffff82a9b2c0 ? Xtrap19 -ffffffff82a9b2c0 ? Xtrap1a -ffffffff82a9b2c0 ? Xtrap1b -ffffffff82a9b2c0 ? Xtrap1c -ffffffff82a9b2c0 ? Xtrap1d -ffffffff82a9b2c0 ? Xtrap1e -ffffffff82a9b2c0 ? Xtrap1f -ffffffff82a9b2d0 ? x2apic_eoi -ffffffff82a9b2f0 ? Xintr_lapic_ipi -ffffffff82a9b330 ? Xipi_invltlb -ffffffff82a9b360 ? Xipi_invept -ffffffff82a9b3a0 ? Xipi_invlpg -ffffffff82a9b3d0 ? Xipi_invlrange -ffffffff82a9b410 ? Xipi_invltlb_pcid -ffffffff82a9b450 ? Xipi_invlpg_pcid -ffffffff82a9b4a0 ? Xipi_invlrange_pcid -ffffffff82a9b510 ? Xipi_wbinvd -ffffffff82a9b530 ? Xintr_lapic_ltimer -ffffffff82a9b570 ? Xintr_xen_upcall -ffffffff82a9b5b0 ? Xintr_hyperv_upcall -ffffffff82a9b5f0 ? Xintr_legacy0 -ffffffff82a9b630 ? Xintr_legacy1 -ffffffff82a9b670 ? Xintr_legacy2 -ffffffff82a9b6b0 ? Xintr_legacy3 -ffffffff82a9b6f0 ? Xintr_legacy4 -ffffffff82a9b730 ? Xintr_legacy5 -ffffffff82a9b770 ? Xintr_legacy6 -ffffffff82a9b7b0 ? Xintr_legacy7 -ffffffff82a9b7f0 ? Xintr_legacy8 -ffffffff82a9b830 ? Xintr_legacy9 -ffffffff82a9b870 ? Xintr_legacy10 -ffffffff82a9b8b0 ? Xintr_legacy11 -ffffffff82a9b8f0 ? Xintr_legacy12 -ffffffff82a9b930 ? Xintr_legacy13 -ffffffff82a9b970 ? Xintr_legacy14 -ffffffff82a9b9b0 ? Xintr_legacy15 -ffffffff82a9b9f0 ? Xintr_ioapic_edge0 -ffffffff82a9ba30 ? Xintr_ioapic_edge1 -ffffffff82a9ba70 ? Xintr_ioapic_edge2 -ffffffff82a9bab0 ? Xintr_ioapic_edge3 -ffffffff82a9baf0 ? Xintr_ioapic_edge4 -ffffffff82a9bb30 ? Xintr_ioapic_edge5 -ffffffff82a9bb70 ? Xintr_ioapic_edge6 -ffffffff82a9bbb0 ? Xintr_ioapic_edge7 -ffffffff82a9bbf0 ? Xintr_ioapic_edge8 -ffffffff82a9bc30 ? Xintr_ioapic_edge9 -ffffffff82a9bc70 ? Xintr_ioapic_edge10 -ffffffff82a9bcb0 ? Xintr_ioapic_edge11 -ffffffff82a9bcf0 ? Xintr_ioapic_edge12 -ffffffff82a9bd30 ? Xintr_ioapic_edge13 -ffffffff82a9bd70 ? Xintr_ioapic_edge14 -ffffffff82a9bdb0 ? Xintr_ioapic_edge15 -ffffffff82a9bdf0 ? Xintr_ioapic_edge16 -ffffffff82a9be30 ? Xintr_ioapic_edge17 -ffffffff82a9be70 ? Xintr_ioapic_edge18 -ffffffff82a9beb0 ? Xintr_ioapic_edge19 -ffffffff82a9bef0 ? Xintr_ioapic_edge20 -ffffffff82a9bf30 ? Xintr_ioapic_edge21 -ffffffff82a9bf70 ? Xintr_ioapic_edge22 -ffffffff82a9bfb0 ? Xintr_ioapic_edge23 -ffffffff82a9bff0 ? Xintr_ioapic_edge24 -ffffffff82a9c030 ? Xintr_ioapic_edge25 -ffffffff82a9c070 ? Xintr_ioapic_edge26 -ffffffff82a9c0b0 ? Xintr_ioapic_edge27 -ffffffff82a9c0f0 ? Xintr_ioapic_edge28 -ffffffff82a9c130 ? Xintr_ioapic_edge29 -ffffffff82a9c170 ? Xintr_ioapic_edge30 -ffffffff82a9c1b0 ? Xintr_ioapic_edge31 -ffffffff82a9c1f0 ? Xintr_ioapic_edge32 -ffffffff82a9c230 ? Xintr_ioapic_edge33 -ffffffff82a9c270 ? Xintr_ioapic_edge34 -ffffffff82a9c2b0 ? Xintr_ioapic_edge35 -ffffffff82a9c2f0 ? Xintr_ioapic_edge36 -ffffffff82a9c330 ? Xintr_ioapic_edge37 -ffffffff82a9c370 ? Xintr_ioapic_edge38 -ffffffff82a9c3b0 ? Xintr_ioapic_edge39 -ffffffff82a9c3f0 ? Xintr_ioapic_edge40 -ffffffff82a9c430 ? Xintr_ioapic_edge41 -ffffffff82a9c470 ? Xintr_ioapic_edge42 -ffffffff82a9c4b0 ? Xintr_ioapic_edge43 -ffffffff82a9c4f0 ? Xintr_ioapic_edge44 -ffffffff82a9c530 ? Xintr_ioapic_edge45 -ffffffff82a9c570 ? Xintr_ioapic_edge46 -ffffffff82a9c5b0 ? Xintr_ioapic_edge47 -ffffffff82a9c5f0 ? Xintr_ioapic_edge48 -ffffffff82a9c630 ? Xintr_ioapic_edge49 -ffffffff82a9c670 ? Xintr_ioapic_edge50 -ffffffff82a9c6b0 ? Xintr_ioapic_edge51 -ffffffff82a9c6f0 ? Xintr_ioapic_edge52 -ffffffff82a9c730 ? Xintr_ioapic_edge53 -ffffffff82a9c770 ? Xintr_ioapic_edge54 -ffffffff82a9c7b0 ? Xintr_ioapic_edge55 -ffffffff82a9c7f0 ? Xintr_ioapic_edge56 -ffffffff82a9c830 ? Xintr_ioapic_edge57 -ffffffff82a9c870 ? Xintr_ioapic_edge58 -ffffffff82a9c8b0 ? Xintr_ioapic_edge59 -ffffffff82a9c8f0 ? Xintr_ioapic_edge60 -ffffffff82a9c930 ? Xintr_ioapic_edge61 -ffffffff82a9c970 ? Xintr_ioapic_edge62 -ffffffff82a9c9b0 ? Xintr_ioapic_edge63 -ffffffff82a9c9f0 ? Xintr_ioapic_level0 -ffffffff82a9ca30 ? Xintr_ioapic_level1 -ffffffff82a9ca70 ? Xintr_ioapic_level2 -ffffffff82a9cab0 ? Xintr_ioapic_level3 -ffffffff82a9caf0 ? Xintr_ioapic_level4 -ffffffff82a9cb30 ? Xintr_ioapic_level5 -ffffffff82a9cb70 ? Xintr_ioapic_level6 -ffffffff82a9cbb0 ? Xintr_ioapic_level7 -ffffffff82a9cbf0 ? Xintr_ioapic_level8 -ffffffff82a9cc30 ? Xintr_ioapic_level9 -ffffffff82a9cc70 ? Xintr_ioapic_level10 -ffffffff82a9ccb0 ? Xintr_ioapic_level11 -ffffffff82a9ccf0 ? Xintr_ioapic_level12 -ffffffff82a9cd30 ? Xintr_ioapic_level13 -ffffffff82a9cd70 ? Xintr_ioapic_level14 -ffffffff82a9cdb0 ? Xintr_ioapic_level15 -ffffffff82a9cdf0 ? Xintr_ioapic_level16 -ffffffff82a9ce30 ? Xintr_ioapic_level17 -ffffffff82a9ce70 ? Xintr_ioapic_level18 -ffffffff82a9ceb0 ? Xintr_ioapic_level19 -ffffffff82a9cef0 ? Xintr_ioapic_level20 -ffffffff82a9cf30 ? Xintr_ioapic_level21 -ffffffff82a9cf70 ? Xintr_ioapic_level22 -ffffffff82a9cfb0 ? Xintr_ioapic_level23 -ffffffff82a9cff0 ? Xintr_ioapic_level24 -ffffffff82a9d030 ? Xintr_ioapic_level25 -ffffffff82a9d070 ? Xintr_ioapic_level26 -ffffffff82a9d0b0 ? Xintr_ioapic_level27 -ffffffff82a9d0f0 ? Xintr_ioapic_level28 -ffffffff82a9d130 ? Xintr_ioapic_level29 -ffffffff82a9d170 ? Xintr_ioapic_level30 -ffffffff82a9d1b0 ? Xintr_ioapic_level31 -ffffffff82a9d1f0 ? Xintr_ioapic_level32 -ffffffff82a9d230 ? Xintr_ioapic_level33 -ffffffff82a9d270 ? Xintr_ioapic_level34 -ffffffff82a9d2b0 ? Xintr_ioapic_level35 -ffffffff82a9d2f0 ? Xintr_ioapic_level36 -ffffffff82a9d330 ? Xintr_ioapic_level37 -ffffffff82a9d370 ? Xintr_ioapic_level38 -ffffffff82a9d3b0 ? Xintr_ioapic_level39 -ffffffff82a9d3f0 ? Xintr_ioapic_level40 -ffffffff82a9d430 ? Xintr_ioapic_level41 -ffffffff82a9d470 ? Xintr_ioapic_level42 -ffffffff82a9d4b0 ? Xintr_ioapic_level43 -ffffffff82a9d4f0 ? Xintr_ioapic_level44 -ffffffff82a9d530 ? Xintr_ioapic_level45 -ffffffff82a9d570 ? Xintr_ioapic_level46 -ffffffff82a9d5b0 ? Xintr_ioapic_level47 -ffffffff82a9d5f0 ? Xintr_ioapic_level48 -ffffffff82a9d630 ? Xintr_ioapic_level49 -ffffffff82a9d670 ? Xintr_ioapic_level50 -ffffffff82a9d6b0 ? Xintr_ioapic_level51 -ffffffff82a9d6f0 ? Xintr_ioapic_level52 -ffffffff82a9d730 ? Xintr_ioapic_level53 -ffffffff82a9d770 ? Xintr_ioapic_level54 -ffffffff82a9d7b0 ? Xintr_ioapic_level55 -ffffffff82a9d7f0 ? Xintr_ioapic_level56 -ffffffff82a9d830 ? Xintr_ioapic_level57 -ffffffff82a9d870 ? Xintr_ioapic_level58 -ffffffff82a9d8b0 ? Xintr_ioapic_level59 -ffffffff82a9d8f0 ? Xintr_ioapic_level60 -ffffffff82a9d930 ? Xintr_ioapic_level61 -ffffffff82a9d970 ? Xintr_ioapic_level62 -ffffffff82a9d9b0 ? Xintr_ioapic_level63 -ffffffff82a9e000 ? codepatch_fill_nop -ffffffff82a9e000 A __cptext_start -ffffffff82a9e000 A __kutext_end -ffffffff82a9e0b0 ? codepatch_maprw -ffffffff82a9e1c0 ? codepatch_unmaprw -ffffffff82a9e230 ? codepatch_nop -ffffffff82a9e3b0 ? codepatch_replace -ffffffff82a9e580 ? codepatch_call -ffffffff82a9e5a0 ? codepatch_control_flow -ffffffff82a9e7c0 ? codepatch_jmp -ffffffff82a9f000 A __cptext_end -ffffffff82a9f000 A __rodata_start -ffffffff82a9f000 C _etext -ffffffff82a9f000 C etext -ffffffff82aa0000 r seeprom_read -ffffffff82aa0004 r icl_mg_pll_find_divisors.div1_vals -ffffffff82aa0044 r athn_ac2qid -ffffffff82aa0044 r athn_ac2qid -ffffffff82aa0044 r athn_ac2qid -ffffffff82aa0054 r rtwn_get_rssi.cckoff -ffffffff82aa0088 r rsu_ac2qid -ffffffff82aa0098 r pckbc_portcmd -ffffffff82aa009c r tht_fifo_write_pad.pad -ffffffff82aa00a4 r rsu_get_rssi.cckoff -ffffffff82aa012c r jsl_ehl_revids -ffffffff82aa0138 r apple_iso_trans -ffffffff82aa0144 r wihap_check_tx.txratetable -ffffffff82aa014c r dmamode -ffffffff82aa017c r dg2_g12_revid_step_tbl -ffffffff82aa017c r gen9_edram_size_mb.sets -ffffffff82aa1000 r isomappings -ffffffff82aa1080 r unimappings -ffffffff82aa1230 r replacements -ffffffff82aa4b79 r apollo_pio_rec -ffffffff82afd3c1 r apollo_udma33_tim -ffffffff82b1500c r pp_r600_decoded_lanes -ffffffff82b526ec r cmd680_setup_channel.udma_tbl -ffffffff82b5be2f r apollo_udma100_tim -ffffffff82b5be35 r cmd0646_9_tim_udma -ffffffff82b6d0b0 r substchar -ffffffff82bcee31 r apollo_udma133_tim -ffffffff82bcee38 r apollo_udma66_tim -ffffffff82bcee62 r cy_pio_rec -ffffffff82bd5730 R drm_ca -ffffffff82bd5758 R drm_filtops -ffffffff82bd5788 R drmread_filtops -ffffffff82bd6000 r vga_emulops -ffffffff82bd6048 R vga_stdscreen -ffffffff82bd6078 R vga_stdscreen_mono -ffffffff82bd60a8 R vga_stdscreen_bf -ffffffff82bd60d8 R vga_40lscreen -ffffffff82bd6108 R vga_40lscreen_mono -ffffffff82bd6138 R vga_40lscreen_bf -ffffffff82bd6168 R vga_50lscreen -ffffffff82bd6198 R vga_50lscreen_mono -ffffffff82bd61c8 R vga_50lscreen_bf -ffffffff82bd61f8 R vga_screenlist -ffffffff82bd6208 R vga_screenlist_mono -ffffffff82bd6218 R vga_accessops -ffffffff82bd6278 r i945_wm_info -ffffffff82bd62d8 r bgansitopc -ffffffff82bd62e0 r pctoansi -ffffffff82bd6318 r tgl_uy_revids -ffffffff82bd6340 r sdma_offsets -ffffffff82bd6340 r sdma_offsets -ffffffff82bd6390 r iha_rate_tbl -ffffffff82bd63c8 r i830_a_wm_info -ffffffff82bd6410 r glk_revids -ffffffff82bd6418 r gen9_edram_size_mb.ways -ffffffff82bd64a8 r aggr_periodic_times -ffffffff82bd65a8 r michael_final.pad -ffffffff82bd65d0 r rt_copysa.maskarray -ffffffff82bd65d8 r i915_wm_info -ffffffff82bd65e0 r amdgpu_ih_clientid_jpeg -ffffffff82bd65e0 r amdgpu_ih_clientid_jpeg -ffffffff82bd65e0 r amdgpu_ih_clientid_uvds -ffffffff82bd65e0 r amdgpu_ih_clientid_vcns -ffffffff82bd65e0 r amdgpu_ih_clientid_vcns -ffffffff82bd65e0 r amdgpu_ih_clientid_vcns -ffffffff82bd65e0 r amdgpu_ih_clientid_vcns -ffffffff82bd65e0 r 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link_is_in_aux_transaction_mode +ffffffff8260e2f0 T set_dongle_type +ffffffff8260e320 T link_get_aux_defer_delay +ffffffff8260e460 T link_query_ddc_data +ffffffff8260e860 T link_aux_transfer_raw +ffffffff8260e890 T link_get_fixed_vs_pe_retimer_write_address +ffffffff8260e920 T link_get_fixed_vs_pe_retimer_read_address +ffffffff8260e9b0 T link_configure_fixed_vs_pe_retimer +ffffffff8260ea90 T link_aux_transfer_with_retries_no_mutex +ffffffff8260eaa0 T link_query_fixed_vs_pe_retimer +ffffffff8260eb80 T try_to_configure_aux_timeout +ffffffff8260ec70 T get_ddc_pin +ffffffff8260eca0 T write_scdc_data +ffffffff8260eda0 T read_scdc_data +ffffffff8260f000 T is_dp_active_dongle +ffffffff8260f040 T is_dp_branch_device +ffffffff8260f070 T dp_parse_lttpr_repeater_count +ffffffff8260f0f0 T link_bw_kbps_from_raw_frl_link_rate_data +ffffffff8260f130 T dp_is_fec_supported +ffffffff8260f1f0 T dp_should_enable_fec +ffffffff8260f320 T dp_is_128b_132b_signal +ffffffff8260f400 T dp_is_lttpr_present +ffffffff8260f470 T decide_fallback_link_setting +ffffffff8260f740 T link_dp_get_encoding_format +ffffffff8260f790 t reduce_link_rate +ffffffff8260f850 T edp_decide_link_settings +ffffffff8260fa10 T decide_edp_link_settings_with_dsc +ffffffff82610000 T link_decide_link_settings +ffffffff82610340 T mst_decide_link_encoding_format +ffffffff826103c0 T dp_overwrite_extended_receiver_cap +ffffffff82610510 t get_active_converter_info +ffffffff82610a50 T dpcd_set_source_specific_data +ffffffff82610bb0 T dpcd_write_cable_id_to_dprx +ffffffff82610c30 T read_is_mst_supported +ffffffff82610cf0 T dp_retrieve_lttpr_cap +ffffffff82610f70 T detect_dp_sink_caps +ffffffff82610f80 t retrieve_link_cap +ffffffff82612660 T detect_edp_sink_caps +ffffffff82612a20 T dp_get_max_link_enc_cap +ffffffff82612b90 T dp_get_verified_link_cap +ffffffff82612be0 T dp_get_max_link_cap +ffffffff82612e50 T dp_verify_link_cap_with_retries +ffffffff826133c0 T dp_is_sink_present +ffffffff826136d0 t intersect_frl_link_bw_support +ffffffff82614000 T dpcd_get_tunneling_device_data +ffffffff826140f0 T dpia_query_hpd_status +ffffffff82615000 T link_dp_dpia_set_dptx_usb4_bw_alloc_support +ffffffff826153c0 T link_dp_dpia_allocate_usb4_bandwidth_for_stream +ffffffff82615630 T dpia_handle_bw_alloc_response +ffffffff82615970 t set_usb4_req_bw_req +ffffffff82615ac0 T dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff82615d60 T dpia_validate_usb4_bw +ffffffff82616070 t get_lowest_dpia_index +ffffffff82616290 T link_dp_dpia_get_dp_overhead_in_dp_tunneling +ffffffff82617000 T dp_parse_link_loss_status +ffffffff82617190 T dp_handle_link_loss +ffffffff826172d0 T dp_read_hpd_rx_irq_data +ffffffff82617410 T dp_should_allow_hpd_rx_irq +ffffffff82617460 T dp_handle_hpd_rx_irq +ffffffff82618000 T dpcd_write_rx_power_ctrl +ffffffff82618060 T dp_enable_link_phy +ffffffff82618100 T dp_disable_link_phy +ffffffff826181e0 T dp_set_hw_lane_settings +ffffffff82618310 T dp_set_drive_settings +ffffffff82618440 T dp_set_fec_ready +ffffffff826185d0 T dp_set_fec_enable +ffffffff82619000 T dp_log_training_result +ffffffff826191b0 T dp_initialize_scrambling_data_symbols +ffffffff82619250 T dp_training_pattern_to_dpcd_training_pattern +ffffffff826192e0 T dp_get_nibble_at_index +ffffffff82619330 T dp_wait_for_training_aux_rd_interval +ffffffff82619350 T dp_hw_to_dpcd_lane_settings +ffffffff82619440 T get_dpcd_link_rate +ffffffff826194c0 T dp_translate_training_aux_read_interval +ffffffff82619500 T dp_get_cr_failure +ffffffff82619570 T is_repeater +ffffffff826195b0 T dp_is_max_vs_reached +ffffffff82619640 T dp_is_cr_done +ffffffff82619710 T dp_is_ch_eq_done +ffffffff826197c0 T dp_is_symbol_locked +ffffffff82619870 T dp_is_interlane_aligned +ffffffff826198a0 T dp_check_interlane_aligned +ffffffff826198e0 T dp_get_eq_aux_rd_interval +ffffffff82619980 T dp_check_dpcd_reqeust_status +ffffffff826199c0 T dp_check_link_loss_status +ffffffff82619a80 T dp_get_lane_status_and_lane_adjust +ffffffff82619bd0 T dp_get_lttpr_mode_override +ffffffff82619c80 T override_training_settings +ffffffff82619f30 T decide_cr_training_pattern +ffffffff82619f80 T decide_eq_training_pattern +ffffffff8261a070 T dp_decide_lttpr_mode +ffffffff8261a120 T dp_decide_lane_settings +ffffffff8261a4f0 T dp_decide_training_settings +ffffffff8261a590 T configure_lttpr_mode_transparent +ffffffff8261a5e0 T dpcd_configure_lttpr_mode +ffffffff8261a7d0 T repeater_training_done +ffffffff8261a830 T dpcd_configure_channel_coding +ffffffff8261a8a0 T dpcd_set_training_pattern +ffffffff8261a960 T dpcd_set_link_settings +ffffffff8261ab00 T dpcd_set_lane_settings +ffffffff8261ab40 T dpcd_set_lt_pattern_and_lane_settings +ffffffff8261ad90 T start_clock_recovery_pattern_early +ffffffff8261ae90 T dp_set_hw_training_pattern +ffffffff8261af60 T dp_set_hw_test_pattern +ffffffff8261b010 T dp_perform_link_training +ffffffff8261ba70 T perform_link_training_with_retries +ffffffff8261d000 T dp_perform_128b_132b_link_training +ffffffff8261d4c0 T decide_128b_132b_training_settings +ffffffff8261d610 T dp_decide_128b_132b_lttpr_mode +ffffffff8261e000 T decide_8b_10b_training_settings +ffffffff8261e1f0 T dp_decide_8b_10b_lttpr_mode +ffffffff8261e360 T perform_8b_10b_clock_recovery_sequence +ffffffff8261e6a0 T perform_8b_10b_channel_equalization_sequence +ffffffff8261ea50 T dp_perform_8b_10b_link_training +ffffffff8261f000 T dp_perform_link_training_skip_aux +ffffffff82620000 T dpia_get_eq_aux_rd_interval +ffffffff82620060 T dpia_training_abort +ffffffff82620170 T dpia_set_tps_notification +ffffffff82620200 T dpia_perform_link_training +ffffffff82621340 t dpia_training_end +ffffffff82622000 T dp_fixed_vs_pe_read_lane_adjust +ffffffff82622170 T dp_fixed_vs_pe_set_retimer_lane_settings +ffffffff826222f0 T dp_perform_fixed_vs_pe_training_sequence +ffffffff82623000 T core_link_read_dpcd +ffffffff82623220 T core_link_write_dpcd +ffffffff82624000 T dp_set_panel_mode +ffffffff82624160 T dp_get_panel_mode +ffffffff82624230 T edp_set_backlight_level_nits +ffffffff82624370 T edp_get_backlight_level_nits +ffffffff82624410 T edp_backlight_enable_aux +ffffffff82624480 T set_default_brightness_aux +ffffffff82624560 T edp_is_ilr_optimization_enabled +ffffffff826245a0 T get_max_edp_link_rate +ffffffff826246d0 T edp_is_ilr_optimization_required +ffffffff82624910 T edp_panel_backlight_power_on +ffffffff826249d0 T edp_set_panel_power +ffffffff82624b00 T edp_wait_for_t12 +ffffffff82624b60 T edp_add_delay_for_T9 +ffffffff82624bb0 T edp_receiver_ready_T9 +ffffffff82624c90 T edp_receiver_ready_T7 +ffffffff82624e60 T edp_power_alpm_dpcd_enable +ffffffff82624ed0 T edp_set_backlight_level +ffffffff82625070 T edp_set_psr_allow_active +ffffffff82625290 T edp_get_psr_state +ffffffff82625370 T edp_setup_psr +ffffffff826257f0 T edp_get_psr_residency +ffffffff826258b0 T edp_set_sink_vtotal_in_psr_active +ffffffff82625940 T edp_set_replay_allow_active +ffffffff82625a80 T edp_get_replay_state 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dcn32_mmhubbub_construct +ffffffff82629050 t mmhubbub32_warmup_mcif +ffffffff826292a0 t mmhubbub32_config_mcif_buf +ffffffff82629800 t mmhubbub32_config_mcif_arb +ffffffff8262a000 T dcn35_mmhubbub_construct +ffffffff8262a020 T dcn35_mmhubbub_set_fgcg +ffffffff8262b000 T mpc1_set_bg_color +ffffffff8262b210 T mpc1_get_mpcc +ffffffff8262b2b0 T mpc1_update_stereo_mix +ffffffff8262b3e0 T mpc1_assert_idle_mpcc +ffffffff8262b4c0 T mpc1_get_mpcc_for_dpp +ffffffff8262b580 T mpc1_is_mpcc_idle +ffffffff8262b680 T mpc1_assert_mpcc_idle_before_connect +ffffffff8262b7e0 T mpc1_insert_plane +ffffffff8262be00 T mpc1_remove_mpcc +ffffffff8262c210 T mpc1_mpc_init +ffffffff8262c580 T mpc1_mpc_init_single_inst +ffffffff8262c790 T mpc1_init_mpcc_list_from_hw +ffffffff8262cab0 T mpc1_read_mpcc_state +ffffffff8262cc70 T mpc1_cursor_lock +ffffffff8262ccf0 T mpc1_get_mpc_out_mux +ffffffff8262cd80 T dcn10_mpc_construct +ffffffff8262cf00 t mpc1_update_blending +ffffffff8262e000 T mpc2_update_blending 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mpc32_program_shaper_lutb_settings +ffffffff82639220 T mpc32_program_shaper_lut +ffffffff826393e0 T mpc32_power_on_shaper_3dlut +ffffffff82639640 T mpc32_program_shaper +ffffffff826399d0 T mpc32_select_3dlut_ram +ffffffff82639a80 T mpc32_select_3dlut_ram_mask +ffffffff82639b60 T mpc32_set3dlut_ram12 +ffffffff82639d70 T mpc32_set3dlut_ram10 +ffffffff82639e50 T mpc32_program_3dlut +ffffffff8263a910 T dcn32_mpc_construct +ffffffff8263b000 T mpc401_set_movable_cm_location +ffffffff8263b070 T mpc401_populate_lut +ffffffff8263b550 T mpc401_program_lut_mode +ffffffff8263b7b0 T mpc401_program_lut_read_write_control +ffffffff8263b8b0 T mpc401_program_3dlut_size +ffffffff8263b910 T mpc401_set_gamut_remap +ffffffff8263bb20 t program_gamut_remap +ffffffff8263beb0 T mpc401_get_gamut_remap +ffffffff8263c1f0 T dcn401_mpc_construct +ffffffff8263c2e0 t mpc401_update_3dlut_fast_load_select +ffffffff8263c360 t mpc401_get_3dlut_fast_load_status +ffffffff8263d000 T opp1_program_bit_depth_reduction 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optc1_set_blank_data_double_buffer +ffffffff82640a00 T optc1_set_timing_double_buffer +ffffffff82640a40 T optc1_set_blank +ffffffff82640b30 T optc1_is_blanked +ffffffff82640bc0 T optc1_enable_optc_clock +ffffffff82640e20 T optc1_disable_crtc +ffffffff82640f30 T optc1_program_blank_color +ffffffff82640ff0 T optc1_validate_timing +ffffffff82641100 T optc1_get_vblank_counter +ffffffff82641170 T optc1_lock +ffffffff82641270 T optc1_unlock +ffffffff826412e0 T optc1_get_position +ffffffff82641370 T optc1_is_counter_moving +ffffffff82641400 T optc1_did_triggered_reset_occur +ffffffff826414b0 T optc1_disable_reset_trigger +ffffffff82641590 T optc1_enable_reset_trigger +ffffffff826416c0 T optc1_enable_crtc_reset +ffffffff82641830 T optc1_wait_for_state +ffffffff82641900 T optc1_set_early_control +ffffffff82641930 T optc1_set_static_screen_control +ffffffff826419e0 T optc1_set_drr +ffffffff82641bb0 T optc1_set_vtotal_min_max +ffffffff82641c70 T optc1_get_crtc_scanoutpos +ffffffff82641d90 T optc1_program_stereo +ffffffff82641fd0 T optc1_is_stereo_left_eye +ffffffff82642040 T optc1_get_hw_timing +ffffffff82642170 T optc1_read_otg_state +ffffffff826425a0 T optc1_get_otg_active_size +ffffffff826426d0 T optc1_clear_optc_underflow +ffffffff82642720 T optc1_tg_init +ffffffff826427e0 T optc1_is_tg_enabled +ffffffff82642850 T optc1_is_optc_underflow_occurred +ffffffff826428d0 T optc1_configure_crc +ffffffff82642b80 T optc1_get_crc +ffffffff82642c90 T optc1_is_two_pixels_per_container +ffffffff82642ce0 T dcn10_timing_generator_init +ffffffff82642d50 t optc1_enable_crtc +ffffffff82642e80 t optc1_set_test_pattern +ffffffff82643600 t optc1_program_manual_trigger +ffffffff826436c0 t optc1_setup_manual_trigger +ffffffff82644000 T optc2_enable_crtc +ffffffff82644130 T optc2_set_gsl +ffffffff82644230 T optc2_set_gsl_source_select +ffffffff826442f0 T optc2_set_dsc_config +ffffffff826443d0 T optc2_get_dsc_status +ffffffff82644410 T optc2_set_odm_bypass +ffffffff82644590 T optc2_set_odm_combine +ffffffff82644790 T optc2_get_optc_source +ffffffff82644860 T optc2_triplebuffer_lock +ffffffff826449a0 T optc2_triplebuffer_unlock +ffffffff82644a60 T optc2_lock_doublebuffer_enable +ffffffff82644c70 T optc2_lock_doublebuffer_disable +ffffffff82644d70 T optc2_setup_manual_trigger +ffffffff82644f10 T optc2_program_manual_trigger +ffffffff82644f90 T optc2_configure_crc +ffffffff82645030 T optc2_get_last_used_drr_vtotal +ffffffff82645070 T dcn20_timing_generator_init +ffffffff826450e0 t optc2_set_dwb_source +ffffffff82645180 t optc2_align_vblanks +ffffffff82646000 T dcn201_timing_generator_init +ffffffff82646070 t optc201_validate_timing +ffffffff82646170 t optc201_triplebuffer_unlock +ffffffff82646230 t optc201_triplebuffer_lock +ffffffff82646370 t optc201_get_optc_source +ffffffff82647000 T optc3_triplebuffer_lock +ffffffff82647140 T optc3_lock_doublebuffer_enable +ffffffff82647410 T optc3_lock_doublebuffer_disable +ffffffff82647550 T optc3_lock +ffffffff82647640 T optc3_set_out_mux +ffffffff82647680 T optc3_program_blank_color +ffffffff826477d0 T optc3_set_drr_trigger_window +ffffffff82647870 T optc3_set_vtotal_change_limit +ffffffff826478f0 T optc3_set_dsc_config +ffffffff82647950 T optc3_set_odm_bypass +ffffffff82647af0 T optc3_set_odm_combine +ffffffff82647e60 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff82647ee0 T optc3_set_vtotal_min_max +ffffffff82647f20 T optc3_tg_init +ffffffff82647f90 T dcn30_timing_generator_init +ffffffff82648000 T optc301_set_drr +ffffffff82648260 T optc301_setup_manual_trigger +ffffffff82648390 T dcn301_timing_generator_init +ffffffff82649000 T optc31_immediate_disable_crtc +ffffffff82649120 T optc31_set_drr +ffffffff82649360 T optc3_init_odm +ffffffff826494e0 T dcn31_timing_generator_init +ffffffff82649550 t optc31_enable_crtc +ffffffff82649680 t optc31_disable_crtc +ffffffff82649870 t optc31_set_odm_combine +ffffffff8264a000 T dcn314_timing_generator_init +ffffffff8264a070 t optc314_enable_crtc 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amdgpu_dpm_set_clockgating_by_smu +ffffffff82745ff0 T amdgpu_dpm_smu_i2c_bus_access +ffffffff827460b0 T amdgpu_pm_acpi_event_handler +ffffffff82746180 T amdgpu_dpm_read_sensor +ffffffff82746250 T amdgpu_dpm_get_apu_thermal_limit +ffffffff82746300 T amdgpu_dpm_set_apu_thermal_limit +ffffffff827463b0 T amdgpu_dpm_compute_clocks +ffffffff827464c0 T amdgpu_dpm_enable_uvd +ffffffff827466f0 T amdgpu_dpm_enable_vce +ffffffff82746920 T amdgpu_dpm_enable_jpeg +ffffffff82746a40 T amdgpu_dpm_enable_vpe +ffffffff82746b60 T amdgpu_pm_load_smu_firmware +ffffffff82746c60 T amdgpu_dpm_handle_passthrough_sbr +ffffffff82746d00 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff82746da0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff82746e40 T amdgpu_dpm_send_rma_reason +ffffffff82746ee0 T amdgpu_dpm_get_dpm_freq_range +ffffffff82746fa0 T amdgpu_dpm_set_soft_freq_range +ffffffff82747060 T amdgpu_dpm_write_watermarks_table +ffffffff82747100 T amdgpu_dpm_wait_for_event +ffffffff827471b0 T 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amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff82749cb0 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff82749d60 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff82749e10 T amdgpu_dpm_get_uclk_dpm_states +ffffffff82749ed0 T amdgpu_dpm_get_dpm_clock_table +ffffffff8274a000 T amdgpu_dpm_get_active_displays +ffffffff8274a0a0 T amdgpu_dpm_get_vblank_time +ffffffff8274a150 T amdgpu_dpm_get_vrefresh +ffffffff8274b000 T amdgpu_pm_sysfs_init +ffffffff8274b030 T amdgpu_pm_sysfs_fini +ffffffff8274b060 T amdgpu_debugfs_pm_init +ffffffff8274c000 T amdgpu_dpm_print_class_info +ffffffff8274c340 T amdgpu_dpm_print_cap_info +ffffffff8274c3e0 T amdgpu_dpm_print_ps_status +ffffffff8274c4a0 T amdgpu_pm_print_power_states +ffffffff8274c540 T amdgpu_get_platform_caps +ffffffff8274c5e0 T amdgpu_parse_extended_power_table +ffffffff8274d420 t amdgpu_parse_clk_voltage_dep_table +ffffffff8274d4e0 T amdgpu_free_extended_power_table +ffffffff8274d660 T amdgpu_add_thermal_controller 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phm_disable_dynamic_state_management +ffffffff82755280 T phm_force_dpm_levels +ffffffff827552d0 T phm_apply_state_adjust_rules +ffffffff82755320 T phm_apply_clock_adjust_rules +ffffffff82755370 T phm_powerdown_uvd +ffffffff827553c0 T phm_disable_clock_power_gatings +ffffffff82755410 T phm_pre_display_configuration_changed +ffffffff82755480 T phm_display_configuration_changed +ffffffff827554f0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff82755560 T phm_stop_thermal_controller +ffffffff827555c0 T phm_register_irq_handlers +ffffffff82755610 T phm_start_thermal_controller +ffffffff82755760 T phm_check_smc_update_required_for_display_configuration +ffffffff827557c0 T phm_check_states_equal +ffffffff82755810 T phm_store_dal_configuration_data +ffffffff82755970 T phm_get_dal_power_level +ffffffff827559d0 T phm_set_cpu_power_state +ffffffff82755a20 T phm_get_performance_level +ffffffff82755a80 T phm_get_clock_info +ffffffff82755c10 T phm_get_current_shallow_sleep_clocks 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psm_set_performance_states +ffffffff82759590 T psm_set_user_performance_state +ffffffff82759620 T psm_adjust_power_state_dynamic +ffffffff8275a000 T atomctrl_initialize_mc_reg_table +ffffffff8275a130 t atomctrl_retrieve_ac_timing +ffffffff8275a290 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff8275a3c0 T atomctrl_set_engine_dram_timings_rv770 +ffffffff8275a440 T atomctrl_get_memory_pll_dividers_si +ffffffff8275a530 T atomctrl_get_memory_pll_dividers_vi +ffffffff8275a5c0 T atomctrl_get_memory_pll_dividers_ai +ffffffff8275a680 T atomctrl_get_engine_pll_dividers_kong +ffffffff8275a710 T atomctrl_get_engine_pll_dividers_vi +ffffffff8275a7f0 T atomctrl_get_engine_pll_dividers_ai +ffffffff8275a8e0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff8275a9b0 T atomctrl_get_reference_clock +ffffffff8275aa20 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff8275aae0 T atomctrl_get_voltage_table_v3 +ffffffff8275ac40 T atomctrl_get_pp_assign_pin +ffffffff8275ad40 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff8275b270 t GetScaledFraction +ffffffff8275b300 t fDecodeLeakageID +ffffffff8275b360 t fSqrt +ffffffff8275b3e0 T atomctrl_get_voltage_evv_on_sclk +ffffffff8275b470 T atomctrl_get_voltage_evv +ffffffff8275b530 T atomctrl_get_mpll_reference_clock +ffffffff8275b5b0 T atomctrl_is_asic_internal_ss_supported +ffffffff8275b610 T atomctrl_get_memory_clock_spread_spectrum +ffffffff8275b720 T atomctrl_get_engine_clock_spread_spectrum +ffffffff8275b830 T atomctrl_read_efuse +ffffffff8275b8e0 T atomctrl_set_ac_timing_ai +ffffffff8275b950 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff8275b9d0 T atomctrl_get_smc_sclk_range_table +ffffffff8275baa0 T atomctrl_get_vddc_shared_railinfo +ffffffff8275bb20 T atomctrl_get_avfs_information +ffffffff8275bcb0 T atomctrl_get_svi2_info +ffffffff8275bd90 T atomctrl_get_leakage_id_from_efuse +ffffffff8275be00 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff8275bfa0 T atomctrl_get_voltage_range +ffffffff8275c070 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phm_trim_voltage_table_to_fit_state_table +ffffffff8277bdd0 T phm_reset_single_dpm_table +ffffffff8277be30 T phm_setup_pcie_table_entry +ffffffff8277be70 T phm_get_dpm_level_enable_mask_value +ffffffff8277bf50 T phm_get_voltage_index +ffffffff8277bfd0 T phm_get_voltage_id +ffffffff8277c050 T phm_find_closest_vddci +ffffffff8277c0c0 T phm_find_boot_level +ffffffff8277c130 T phm_get_sclk_for_voltage_evv +ffffffff8277c1f0 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff8277c310 T phm_get_lowest_enabled_level +ffffffff8277c350 T phm_apply_dal_min_voltage_request +ffffffff8277c420 T phm_get_voltage_evv_on_sclk +ffffffff8277c4e0 T phm_irq_process +ffffffff8277c6b0 T smu9_register_irq_handlers +ffffffff8277c780 T smu_atom_get_data_table +ffffffff8277c7f0 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff8277c900 T smu_set_watermarks_for_clocks_ranges +ffffffff8277d000 T tonga_baco_set_state +ffffffff8277e000 T vega10_baco_set_state +ffffffff8277f000 T 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vega10_initialize_power_tune_defaults +ffffffff8278b240 T vega10_set_power_limit +ffffffff8278b2a0 T vega10_enable_power_containment +ffffffff8278b3e0 T vega10_disable_power_containment +ffffffff8278b4d0 T vega10_power_control_set_level +ffffffff8278b540 t vega10_didt_set_mask +ffffffff8278c000 t vega10_pp_tables_initialize +ffffffff8278d7a0 t vega10_pp_tables_uninitialize +ffffffff8278d9c0 T vega10_get_number_of_powerplay_table_entries +ffffffff8278da80 T vega10_get_powerplay_table_entry +ffffffff8278dc20 T vega10_baco_set_cap +ffffffff8278e000 T vega10_fan_ctrl_get_fan_speed_info +ffffffff8278e080 T vega10_fan_ctrl_get_fan_speed_pwm +ffffffff8278e1d0 T vega10_fan_ctrl_get_fan_speed_rpm +ffffffff8278e2f0 T vega10_fan_ctrl_set_static_mode +ffffffff8278e610 T vega10_fan_ctrl_set_default_mode +ffffffff8278e880 T vega10_fan_ctrl_start_smc_fan_control +ffffffff8278e960 T vega10_fan_ctrl_stop_smc_fan_control +ffffffff8278ea40 T vega10_fan_ctrl_set_fan_speed_pwm +ffffffff8278ecb0 T vega10_fan_ctrl_reset_fan_speed_to_default +ffffffff8278ed90 T vega10_fan_ctrl_set_fan_speed_rpm +ffffffff8278efb0 T vega10_thermal_get_temperature +ffffffff8278f050 T vega10_thermal_disable_alert +ffffffff8278f170 T vega10_thermal_stop_thermal_controller +ffffffff8278f1d0 T vega10_enable_mgpu_fan_boost +ffffffff8278f310 T vega10_start_thermal_controller +ffffffff8278f970 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff82790000 T vega12_baco_set_state +ffffffff82791000 T vega12_enable_disable_vce_dpm +ffffffff827910a0 T vega12_hwmgr_init +ffffffff827910e0 t vega12_hwmgr_backend_init +ffffffff82791960 t vega12_hwmgr_backend_fini +ffffffff827919c0 t vega12_setup_asic_task +ffffffff82791a00 t vega12_apply_clocks_adjust_rules +ffffffff82791dc0 t vega12_dpm_force_dpm_level +ffffffff82792280 t vega12_enable_dpm_tasks +ffffffff82792f00 t vega12_disable_dpm_tasks +ffffffff82793020 t vega12_patch_boot_state +ffffffff82793050 t vega12_power_gate_vce +ffffffff82793100 t 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vega20_setup_memclk_dpm_table +ffffffff827a0ed0 t vega20_get_max_sustainable_clock +ffffffff827a1000 T vega20_set_power_limit +ffffffff827a1050 T vega20_validate_power_level_request +ffffffff827a1090 T vega20_power_control_set_level +ffffffff827a2000 t vega20_pp_tables_initialize +ffffffff827a27b0 t vega20_pp_tables_uninitialize +ffffffff827a3000 T vega20_fan_ctrl_stop_smc_fan_control +ffffffff827a30a0 T vega20_fan_ctrl_start_smc_fan_control +ffffffff827a3140 T vega20_fan_ctrl_get_fan_speed_pwm +ffffffff827a3290 T vega20_fan_ctrl_set_fan_speed_pwm +ffffffff827a34d0 t vega20_fan_ctrl_set_static_mode +ffffffff827a36d0 T vega20_fan_ctrl_get_fan_speed_info +ffffffff827a3710 T vega20_fan_ctrl_get_fan_speed_rpm +ffffffff827a3780 T vega20_fan_ctrl_set_fan_speed_rpm +ffffffff827a3960 T vega20_thermal_get_temperature +ffffffff827a3a00 T vega20_thermal_disable_alert +ffffffff827a3a90 T vega20_thermal_stop_thermal_controller +ffffffff827a3b20 T vega20_start_thermal_controller +ffffffff827a4000 t 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vega20_get_enabled_smc_features +ffffffff827c94c0 T vega20_set_pptable_driver_address +ffffffff827c9570 t vega20_smu_init +ffffffff827c99c0 t vega20_smu_fini +ffffffff827c9b10 t vega20_start_smu +ffffffff827c9c10 t vega20_get_argument +ffffffff827c9c70 t vega20_send_msg_to_smc +ffffffff827c9f10 t vega20_send_msg_to_smc_with_parameter +ffffffff827ca220 t vega20_is_dpm_running +ffffffff827ca2d0 t vega20_smc_table_manager +ffffffff827cb000 t vegam_smu_init +ffffffff827cb0b0 t vegam_start_smu +ffffffff827cb5a0 t vegam_update_smc_table +ffffffff827cb830 t vegam_process_firmware_header +ffffffff827cb9b0 t vegam_update_sclk_threshold +ffffffff827cbaa0 t vegam_thermal_setup_fan_table +ffffffff827cbb00 t vegam_thermal_avfs_enable +ffffffff827cbb90 t vegam_init_smc_table +ffffffff827cc970 t vegam_populate_all_graphic_levels +ffffffff827cd080 t vegam_populate_all_memory_levels +ffffffff827cd3c0 t vegam_get_offsetof +ffffffff827cd450 t vegam_get_mac_definition +ffffffff827cd4b0 t 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amdgpu_smu_stb_debug_fs_init +ffffffff827d1cb0 T smu_send_hbm_bad_pages_num +ffffffff827d1d00 T smu_send_hbm_bad_channel_flag +ffffffff827d1d50 T smu_send_rma_reason +ffffffff827d1da0 t smu_set_fan_control_mode +ffffffff827d1e60 t smu_get_fan_control_mode +ffffffff827d1ee0 t smu_set_fan_speed_pwm +ffffffff827d1fa0 t smu_get_fan_speed_pwm +ffffffff827d2000 t smu_force_ppclk_levels +ffffffff827d20d0 t smu_print_ppclk_levels +ffffffff827d2170 t smu_emit_ppclk_levels +ffffffff827d2220 t smu_force_performance_level +ffffffff827d2500 t smu_read_sensor +ffffffff827d2760 t smu_get_apu_thermal_limit +ffffffff827d27b0 t smu_set_apu_thermal_limit +ffffffff827d2800 t smu_get_performance_level +ffffffff827d2870 t smu_get_current_power_state +ffffffff827d28d0 t smu_get_fan_speed_rpm +ffffffff827d2930 t smu_set_fan_speed_rpm +ffffffff827d29f0 t smu_get_power_num_states +ffffffff827d2a70 t smu_sys_get_pp_table +ffffffff827d2ae0 t smu_sys_set_pp_table +ffffffff827d2c70 t smu_switch_power_profile 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smu_enable_gfx_features +ffffffff827d4000 t smu_set_df_cstate +ffffffff827d40d0 t smu_set_xgmi_pstate +ffffffff827d4190 t smu_sys_get_gpu_metrics +ffffffff827d41f0 t smu_sys_get_pm_metrics +ffffffff827d4250 t smu_set_watermarks_for_clock_ranges +ffffffff827d42d0 t smu_display_disable_memory_clock_switch +ffffffff827d4330 t smu_get_max_sustainable_clocks_by_dc +ffffffff827d4390 t smu_get_uclk_dpm_states +ffffffff827d43f0 t smu_get_dpm_clock_table +ffffffff827d4450 t smu_get_prv_buffer_details +ffffffff827d44c0 t smu_set_user_clk_dependencies +ffffffff827d4540 t smu_convert_to_smuclk +ffffffff827d4580 t smu_adjust_power_state_dynamic +ffffffff827d47d0 t smu_bump_power_profile_mode +ffffffff827d4900 t smu_apply_default_config_table_settings +ffffffff827d49c0 t smu_restore_dpm_user_profile +ffffffff827d4e40 t smu_throttling_logging_work_fn +ffffffff827d4e90 t smu_interrupt_work_fn +ffffffff827d4ee0 t smu_swctf_delayed_work_handler +ffffffff827d5010 t __delayed_work_tick +ffffffff827d5030 t smu_smc_hw_setup +ffffffff827d5980 t smu_init_xgmi_plpd_mode +ffffffff827d5ac0 t smu_set_default_dpm_table +ffffffff827d5e90 t smu_get_thermal_temperature_range +ffffffff827d5f80 t smu_smc_hw_cleanup +ffffffff827d7000 T arcturus_set_ppt_funcs +ffffffff827d7050 t arcturus_run_btc +ffffffff827d7110 t arcturus_get_allowed_feature_mask +ffffffff827d7170 t arcturus_set_default_dpm_table +ffffffff827d73e0 t arcturus_populate_umd_state_clk +ffffffff827d74a0 t arcturus_emit_clk_levels +ffffffff827d7830 t arcturus_force_clk_levels +ffffffff827d7a90 t arcturus_get_power_profile_mode +ffffffff827d7dc0 t arcturus_set_power_profile_mode +ffffffff827d8200 t arcturus_dpm_set_vcn_enable +ffffffff827d82f0 t arcturus_read_sensor +ffffffff827d8520 t arcturus_is_dpm_running +ffffffff827d8570 t arcturus_get_fan_speed_pwm +ffffffff827d86d0 t arcturus_get_fan_speed_rpm +ffffffff827d87f0 t arcturus_get_thermal_temperature_range +ffffffff827d88e0 t arcturus_set_performance_level +ffffffff827d89a0 t arcturus_dump_pptable +ffffffff827d89d0 t arcturus_get_power_limit +ffffffff827d8ad0 t arcturus_set_df_cstate +ffffffff827d8bb0 t arcturus_i2c_control_init +ffffffff827d8d00 t arcturus_i2c_control_fini +ffffffff827d8d40 t arcturus_get_unique_id +ffffffff827d8e20 t arcturus_init_smc_tables +ffffffff827d9010 t arcturus_setup_pptable +ffffffff827d9170 t arcturus_set_fan_speed_pwm +ffffffff827d9350 t arcturus_set_fan_speed_rpm +ffffffff827d94a0 t arcturus_log_thermal_throttling_event +ffffffff827d98f0 t arcturus_get_gpu_metrics +ffffffff827d9b40 t arcturus_get_fan_parameters +ffffffff827d9b80 t arcturus_get_current_clk_freq_by_table +ffffffff827d9cf0 t arcturus_get_smu_metrics_data +ffffffff827d9f70 t arcturus_upload_dpm_level +ffffffff827da090 t arcturus_i2c_xfer +ffffffff827da350 t arcturus_i2c_func +ffffffff827da380 t arcturus_select_plpd_policy +ffffffff827da440 t arcturus_set_fan_static_mode +ffffffff827db000 T cyan_skillfish_set_ppt_funcs +ffffffff827db030 t cyan_skillfish_print_clk_levels +ffffffff827db170 t cyan_skillfish_od_edit_dpm_table +ffffffff827db4b0 t cyan_skillfish_read_sensor +ffffffff827db6e0 t cyan_skillfish_is_dpm_running +ffffffff827db790 t cyan_skillfish_init_smc_tables +ffffffff827db880 t cyan_skillfish_get_enabled_mask +ffffffff827db8c0 t cyan_skillfish_get_dpm_ultimate_freq +ffffffff827db990 t cyan_skillfish_get_gpu_metrics +ffffffff827dbc40 t cyan_skillfish_get_smu_metrics_data +ffffffff827dc000 T navi10_set_ppt_funcs +ffffffff827dc050 t navi10_run_btc +ffffffff827dc0e0 t navi10_get_allowed_feature_mask +ffffffff827dc3e0 t navi10_set_default_dpm_table +ffffffff827dc900 t navi10_populate_umd_state_clk +ffffffff827dcac0 t navi10_print_clk_levels +ffffffff827dccc0 t navi10_emit_clk_levels +ffffffff827dcf40 t navi10_force_clk_levels +ffffffff827dd0b0 t navi10_od_edit_dpm_table +ffffffff827dd6f0 t navi10_get_clock_by_type_with_latency +ffffffff827dd800 t navi10_get_power_profile_mode +ffffffff827ddae0 t navi10_set_power_profile_mode +ffffffff827ddfc0 t navi10_dpm_set_vcn_enable +ffffffff827de060 t navi10_dpm_set_jpeg_enable +ffffffff827de0f0 t navi10_read_sensor +ffffffff827de2a0 t navi10_pre_display_config_changed +ffffffff827de360 t navi10_display_config_changed +ffffffff827de400 t navi10_notify_smc_display_config +ffffffff827de5d0 t navi10_is_dpm_running +ffffffff827de620 t navi10_get_fan_speed_rpm +ffffffff827de6d0 t navi10_set_watermarks_table +ffffffff827de880 t navi10_get_thermal_temperature_range +ffffffff827de970 t navi10_get_uclk_dpm_states +ffffffff827dea80 t navi10_set_default_od_settings +ffffffff827ded10 t navi10_display_disable_memory_clock_switch +ffffffff827deda0 t navi10_get_power_limit +ffffffff827def30 t navi10_update_pcie_parameters +ffffffff827df0b0 t navi10_i2c_control_init +ffffffff827df200 t navi10_i2c_control_fini +ffffffff827df240 t navi10_init_smc_tables +ffffffff827df4b0 t navi10_setup_pptable +ffffffff827df720 t navi10_baco_enter +ffffffff827df770 t navi10_baco_exit +ffffffff827df8d0 t navi1x_get_gpu_metrics +ffffffff827e02e0 t navi10_enable_mgpu_fan_boost +ffffffff827e0360 t navi10_get_fan_parameters +ffffffff827e03a0 t navi10_post_smu_init +ffffffff827e0630 t navi10_get_default_config_table_settings +ffffffff827e0680 t navi10_set_config_table +ffffffff827e0740 t navi1x_get_smu_metrics_data +ffffffff827e0b20 t navi10_od_setting_check_range +ffffffff827e0be0 t navi10_i2c_xfer +ffffffff827e0ea0 t navi10_i2c_func +ffffffff827e0ed0 t navi10_umc_hybrid_cdr_workaround +ffffffff827e1000 T sienna_cichlid_set_ppt_funcs +ffffffff827e1050 t sienna_cichlid_run_btc +ffffffff827e10e0 t sienna_cichlid_get_allowed_feature_mask +ffffffff827e1380 t sienna_cichlid_set_default_dpm_table +ffffffff827e1a10 t sienna_cichlid_populate_umd_state_clk +ffffffff827e1ad0 t sienna_cichlid_print_clk_levels +ffffffff827e1cb0 t sienna_cichlid_force_clk_levels +ffffffff827e1e20 t sienna_cichlid_od_edit_dpm_table +ffffffff827e2410 t sienna_cichlid_restore_user_od_settings +ffffffff827e24a0 t sienna_cichlid_get_power_profile_mode +ffffffff827e2780 t sienna_cichlid_set_power_profile_mode +ffffffff827e2c60 t sienna_cichlid_dpm_set_vcn_enable +ffffffff827e2d30 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff827e2dc0 t sienna_cichlid_read_sensor +ffffffff827e3630 t sienna_cichlid_pre_display_config_changed +ffffffff827e3660 t sienna_cichlid_display_config_changed +ffffffff827e36c0 t sienna_cichlid_notify_smc_display_config +ffffffff827e3890 t sienna_cichlid_is_dpm_running +ffffffff827e38f0 t sienna_cichlid_get_fan_speed_rpm +ffffffff827e3a00 t sienna_cichlid_set_watermarks_table +ffffffff827e3ba0 t sienna_cichlid_get_thermal_temperature_range +ffffffff827e3c80 t sienna_cichlid_get_uclk_dpm_states +ffffffff827e3d90 t sienna_cichlid_set_default_od_settings +ffffffff827e3f30 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff827e3fc0 t sienna_cichlid_dump_pptable +ffffffff827e3ff0 t sienna_cichlid_get_power_limit +ffffffff827e4130 t sienna_cichlid_update_pcie_parameters +ffffffff827e4260 t sienna_cichlid_i2c_control_init +ffffffff827e43b0 t sienna_cichlid_i2c_control_fini +ffffffff827e43f0 t sienna_cichlid_get_unique_id +ffffffff827e4510 t sienna_cichlid_init_smc_tables +ffffffff827e4880 t sienna_cichlid_set_mp1_state +ffffffff827e48c0 t sienna_cichlid_setup_pptable +ffffffff827e4d40 t sienna_cichlid_system_features_control +ffffffff827e4de0 t sienna_cichlid_baco_enter +ffffffff827e4e30 t sienna_cichlid_baco_exit +ffffffff827e4f90 t sienna_cichlid_is_mode1_reset_supported +ffffffff827e5030 t sienna_cichlid_is_mode2_reset_supported +ffffffff827e5060 t sienna_cichlid_mode2_reset +ffffffff827e51e0 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff827e5200 t sienna_cichlid_get_gpu_metrics +ffffffff827e57c0 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff827e5810 t sienna_cichlid_get_fan_parameters +ffffffff827e5850 t sienna_cichlid_gpo_control +ffffffff827e5930 t sienna_cichlid_get_ecc_info +ffffffff827e5a00 t sienna_cichlid_stb_get_data_direct +ffffffff827e5ac0 t sienna_cichlid_get_default_config_table_settings +ffffffff827e5b30 t sienna_cichlid_set_config_table +ffffffff827e5c00 t sienna_cichlid_get_throttler_status_locked +ffffffff827e5d60 t sienna_cichlid_get_smartshift_power_percentage +ffffffff827e5e90 t sienna_cichlid_i2c_xfer +ffffffff827e6150 t sienna_cichlid_i2c_func +ffffffff827e7000 T smu_v11_0_init_microcode +ffffffff827e7150 T smu_v11_0_fini_microcode +ffffffff827e71b0 T smu_v11_0_load_microcode +ffffffff827e7310 T smu_v11_0_check_fw_status +ffffffff827e7370 T smu_v11_0_check_fw_version +ffffffff827e7510 T smu_v11_0_setup_pptable +ffffffff827e7630 T smu_v11_0_init_smc_tables +ffffffff827e77c0 T smu_v11_0_fini_smc_tables +ffffffff827e7a80 T smu_v11_0_init_power +ffffffff827e7b20 T smu_v11_0_fini_power +ffffffff827e7b90 T smu_v11_0_get_vbios_bootup_values +ffffffff827e7f70 T smu_v11_0_notify_memory_pool_location +ffffffff827e8090 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff827e8120 T smu_v11_0_set_driver_table_location +ffffffff827e81a0 T smu_v11_0_set_tool_table_location +ffffffff827e8220 T smu_v11_0_init_display_count +ffffffff827e8290 T smu_v11_0_set_allowed_mask +ffffffff827e8370 T smu_v11_0_system_features_control +ffffffff827e8390 T smu_v11_0_notify_display_change +ffffffff827e8400 T smu_v11_0_init_max_sustainable_clocks +ffffffff827e86d0 t smu_v11_0_get_max_sustainable_clock +ffffffff827e8840 T smu_v11_0_get_current_power_limit +ffffffff827e8940 T smu_v11_0_set_power_limit +ffffffff827e8ab0 T smu_v11_0_interrupt_work +ffffffff827e8b40 T smu_v11_0_enable_thermal_alert +ffffffff827e8bf0 T smu_v11_0_disable_thermal_alert +ffffffff827e8c10 T smu_v11_0_get_gfx_vdd +ffffffff827e8cd0 T smu_v11_0_display_clock_voltage_request +ffffffff827e8e40 T smu_v11_0_set_hard_freq_limited_range +ffffffff827e8f40 T smu_v11_0_gfx_off_control +ffffffff827e9000 T smu_v11_0_get_fan_control_mode +ffffffff827e9060 T smu_v11_0_set_fan_speed_pwm +ffffffff827e9240 t smu_v11_0_set_fan_static_mode +ffffffff827e9440 T smu_v11_0_set_fan_speed_rpm +ffffffff827e9590 T smu_v11_0_get_fan_speed_pwm +ffffffff827e96f0 T smu_v11_0_get_fan_speed_rpm +ffffffff827e9800 T smu_v11_0_set_fan_control_mode +ffffffff827e99f0 T smu_v11_0_set_xgmi_pstate +ffffffff827e9a10 T smu_v11_0_register_irq_handler +ffffffff827e9ae0 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff827e9b70 T smu_v11_0_set_azalia_d3_pme +ffffffff827e9b90 T smu_v11_0_baco_set_armd3_sequence +ffffffff827e9bb0 T smu_v11_0_get_bamaco_support +ffffffff827e9c60 T smu_v11_0_baco_get_state +ffffffff827e9c90 T smu_v11_0_baco_set_state +ffffffff827e9fb0 T smu_v11_0_baco_enter +ffffffff827ea100 T smu_v11_0_baco_exit +ffffffff827ea280 T smu_v11_0_mode1_reset +ffffffff827ea300 T smu_v11_0_handle_passthrough_sbr +ffffffff827ea320 T smu_v11_0_get_dpm_ultimate_freq +ffffffff827ea480 T smu_v11_0_set_soft_freq_limited_range +ffffffff827ea570 T smu_v11_0_set_performance_level +ffffffff827ea950 T smu_v11_0_set_power_source +ffffffff827ea9c0 T smu_v11_0_get_dpm_freq_by_index +ffffffff827eaa80 T smu_v11_0_get_dpm_level_count +ffffffff827eab30 T smu_v11_0_set_single_dpm_table +ffffffff827eae10 T smu_v11_0_get_dpm_level_range +ffffffff827eafd0 T smu_v11_0_get_current_pcie_link_width_level +ffffffff827eb030 T smu_v11_0_get_current_pcie_link_width +ffffffff827eb0a0 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff827eb100 T smu_v11_0_get_current_pcie_link_speed +ffffffff827eb160 T smu_v11_0_gfx_ulv_control +ffffffff827eb1e0 T smu_v11_0_deep_sleep_control +ffffffff827eb3f0 T smu_v11_0_restore_user_od_settings +ffffffff827eb480 T smu_v11_0_set_smu_mailbox_registers +ffffffff827eb4f0 t smu_v11_0_set_irq_state +ffffffff827ebb40 t smu_v11_0_irq_process +ffffffff827ec000 T vangogh_set_ppt_funcs +ffffffff827ec040 t vangogh_set_default_dpm_tables +ffffffff827ec070 t vangogh_common_print_clk_levels +ffffffff827ec4c0 t vangogh_force_clk_levels +ffffffff827ec740 t vangogh_od_edit_dpm_table +ffffffff827ecd00 t vangogh_get_power_profile_mode +ffffffff827ece60 t vangogh_set_power_profile_mode +ffffffff827ecf20 t vangogh_dpm_set_vcn_enable +ffffffff827ecf80 t vangogh_dpm_set_jpeg_enable +ffffffff827ecfe0 t vangogh_read_sensor +ffffffff827ed480 t vangogh_get_apu_thermal_limit +ffffffff827ed4a0 t vangogh_set_apu_thermal_limit +ffffffff827ed4c0 t vangogh_is_dpm_running +ffffffff827ed530 t vangogh_set_watermarks_table +ffffffff827ed6c0 t vangogh_set_performance_level +ffffffff827ee090 t vangogh_get_power_limit +ffffffff827ee240 t vangogh_get_ppt_limit +ffffffff827ee2b0 t vangogh_get_dpm_clock_table +ffffffff827ee420 t vangogh_init_smc_tables +ffffffff827ee650 t vangogh_set_power_limit +ffffffff827ee7e0 t vangogh_get_gfxoff_status +ffffffff827ee870 t vangogh_get_gfxoff_entrycount +ffffffff827ee8f0 t vangogh_set_gfxoff_residency +ffffffff827ee970 t vangogh_get_gfxoff_residency +ffffffff827ee9b0 t vangogh_mode2_reset +ffffffff827eeb70 t vangogh_common_get_gpu_metrics +ffffffff827ef320 t vangogh_post_smu_init +ffffffff827ef4d0 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff827ef540 t vangogh_notify_rlc_state +ffffffff827ef590 t vangogh_force_dpm_limit_value +ffffffff827ef710 t vangogh_get_dpm_ultimate_freq +ffffffff827efa40 t vangogh_set_soft_freq_limited_range +ffffffff827efc00 t vangogh_get_gpu_metrics_v2_3 +ffffffff827f0000 T renoir_set_ppt_funcs +ffffffff827f00a0 t renoir_get_current_power_state +ffffffff827f0120 t renoir_print_clk_levels +ffffffff827f0570 t renoir_force_clk_levels +ffffffff827f07d0 t renoir_od_edit_dpm_table +ffffffff827f0b10 t renoir_get_power_profile_mode +ffffffff827f0c20 t renoir_set_power_profile_mode +ffffffff827f0ce0 t renoir_dpm_set_vcn_enable +ffffffff827f0d80 t renoir_dpm_set_jpeg_enable +ffffffff827f0e10 t renoir_read_sensor +ffffffff827f1220 t renoir_is_dpm_running +ffffffff827f1260 t renoir_set_watermarks_table +ffffffff827f1420 t renoir_set_performance_level +ffffffff827f1970 t renoir_get_dpm_clock_table +ffffffff827f1cc0 t renoir_init_smc_tables +ffffffff827f1e60 t renoir_get_enabled_mask +ffffffff827f1ea0 t renoir_get_dpm_ultimate_freq +ffffffff827f2170 t renoir_get_gpu_metrics +ffffffff827f23b0 t renoir_gfx_state_change_set +ffffffff827f23e0 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff827f2490 t renoir_force_dpm_limit_value +ffffffff827f25c0 t renior_set_dpm_profile_freq +ffffffff827f3000 T smu_v12_0_check_fw_status +ffffffff827f3060 T smu_v12_0_check_fw_version +ffffffff827f30e0 T smu_v12_0_powergate_sdma +ffffffff827f3130 T smu_v12_0_set_gfx_cgpg +ffffffff827f3190 T smu_v12_0_get_gfxoff_status +ffffffff827f3220 T smu_v12_0_gfx_off_control +ffffffff827f3350 T smu_v12_0_fini_smc_tables +ffffffff827f3420 T smu_v12_0_set_default_dpm_tables +ffffffff827f3450 T smu_v12_0_mode2_reset +ffffffff827f3470 T smu_v12_0_set_soft_freq_limited_range +ffffffff827f35f0 T smu_v12_0_set_driver_table_location +ffffffff827f3670 T smu_v12_0_get_vbios_bootup_values +ffffffff827f4000 T aldebaran_set_ppt_funcs +ffffffff827f4050 t aldebaran_get_allowed_feature_mask +ffffffff827f40b0 t aldebaran_set_default_dpm_table +ffffffff827f42f0 t aldebaran_populate_umd_state_clk +ffffffff827f43f0 t aldebaran_emit_clk_levels +ffffffff827f4750 t aldebaran_force_clk_levels +ffffffff827f4960 t aldebaran_usr_edit_dpm_table +ffffffff827f4ba0 t aldebaran_read_sensor +ffffffff827f4e20 t aldebaran_is_dpm_running +ffffffff827f4e80 t aldebaran_get_thermal_temperature_range +ffffffff827f4f50 t aldebaran_set_performance_level +ffffffff827f5000 t aldebaran_get_power_limit +ffffffff827f51e0 t aldebaran_set_df_cstate +ffffffff827f5270 t aldebaran_i2c_control_init +ffffffff827f5340 t aldebaran_i2c_control_fini +ffffffff827f5380 t aldebaran_get_unique_id +ffffffff827f5430 t aldebaran_init_smc_tables +ffffffff827f5690 t aldebaran_set_mp1_state +ffffffff827f56d0 t aldebaran_setup_pptable +ffffffff827f57c0 t aldebaran_system_features_control +ffffffff827f5920 t aldebaran_set_power_limit +ffffffff827f59b0 t aldebaran_get_bamaco_support +ffffffff827f59e0 t aldebaran_is_mode1_reset_supported +ffffffff827f5a10 t aldebaran_is_mode2_reset_supported +ffffffff827f5a40 t aldebaran_mode1_reset +ffffffff827f5b10 t aldebaran_mode2_reset +ffffffff827f5f30 t aldebaran_set_soft_freq_limited_range +ffffffff827f6170 t aldebaran_log_thermal_throttling_event +ffffffff827f64d0 t aldebaran_get_gpu_metrics +ffffffff827f67a0 t aldebaran_smu_handle_passthrough_sbr +ffffffff827f67c0 t aldebaran_smu_send_hbm_bad_page_num +ffffffff827f6850 t aldebaran_get_ecc_info +ffffffff827f6980 t aldebaran_send_hbm_bad_channel_flag +ffffffff827f6a40 t aldebaran_get_current_clk_freq_by_table +ffffffff827f6bb0 t aldebaran_get_smu_metrics_data +ffffffff827f6e30 t aldebaran_upload_dpm_level +ffffffff827f6f50 t aldebaran_i2c_xfer +ffffffff827f7210 t aldebaran_i2c_func +ffffffff827f7240 t aldebaran_select_plpd_policy +ffffffff827f8000 T smu_v13_0_init_microcode +ffffffff827f8130 T smu_v13_0_fini_microcode +ffffffff827f8190 T smu_v13_0_load_microcode +ffffffff827f81c0 T smu_v13_0_init_pptable_microcode +ffffffff827f82e0 T smu_v13_0_get_pptable_from_firmware +ffffffff827f8410 T smu_v13_0_check_fw_status +ffffffff827f8490 T smu_v13_0_check_fw_version +ffffffff827f8530 T smu_v13_0_setup_pptable +ffffffff827f86d0 T smu_v13_0_init_smc_tables +ffffffff827f88a0 T smu_v13_0_fini_smc_tables +ffffffff827f8b60 T smu_v13_0_init_power +ffffffff827f8bf0 T smu_v13_0_fini_power +ffffffff827f8c80 T smu_v13_0_get_vbios_bootup_values +ffffffff827f8f50 T smu_v13_0_notify_memory_pool_location +ffffffff827f9020 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff827f90b0 T smu_v13_0_set_driver_table_location +ffffffff827f9130 T smu_v13_0_set_tool_table_location +ffffffff827f91b0 T smu_v13_0_init_display_count +ffffffff827f91f0 T smu_v13_0_set_allowed_mask +ffffffff827f92d0 T smu_v13_0_gfx_off_control +ffffffff827f9350 T smu_v13_0_system_features_control +ffffffff827f9370 T smu_v13_0_notify_display_change +ffffffff827f93e0 T smu_v13_0_init_max_sustainable_clocks +ffffffff827f96b0 t smu_v13_0_get_max_sustainable_clock +ffffffff827f9820 T smu_v13_0_get_current_power_limit +ffffffff827f9920 T smu_v13_0_set_power_limit +ffffffff827f9a60 T smu_v13_0_enable_thermal_alert +ffffffff827f9b00 T smu_v13_0_disable_thermal_alert +ffffffff827f9b40 T smu_v13_0_get_gfx_vdd +ffffffff827f9c00 T smu_v13_0_display_clock_voltage_request +ffffffff827f9d70 T smu_v13_0_set_hard_freq_limited_range +ffffffff827f9e70 T smu_v13_0_get_fan_control_mode +ffffffff827f9ec0 T smu_v13_0_set_fan_speed_pwm +ffffffff827fa130 t smu_v13_0_set_fan_static_mode +ffffffff827fa330 T smu_v13_0_set_fan_control_mode +ffffffff827fa4d0 T smu_v13_0_set_fan_speed_rpm +ffffffff827fa6c0 T smu_v13_0_set_xgmi_pstate +ffffffff827fa6e0 T smu_v13_0_interrupt_work +ffffffff827fa700 T smu_v13_0_register_irq_handler +ffffffff827fa7e0 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff827fa870 T smu_v13_0_set_azalia_d3_pme +ffffffff827fa890 T smu_v13_0_wait_for_event +ffffffff827fa8e0 T smu_v13_0_get_dpm_ultimate_freq +ffffffff827faac0 T smu_v13_0_get_boot_freq_by_index +ffffffff827fab60 T smu_v13_0_set_soft_freq_limited_range +ffffffff827fac50 T smu_v13_0_set_performance_level +ffffffff827fb4b0 T smu_v13_0_set_power_source +ffffffff827fb520 T smu_v13_0_get_dpm_freq_by_index +ffffffff827fb670 T smu_v13_0_set_single_dpm_table +ffffffff827fb910 T smu_v13_0_get_current_pcie_link_width_level +ffffffff827fb970 T smu_v13_0_get_current_pcie_link_width +ffffffff827fb9e0 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff827fba40 T smu_v13_0_get_current_pcie_link_speed +ffffffff827fbab0 T smu_v13_0_set_vcn_enable +ffffffff827fbb70 T smu_v13_0_set_jpeg_enable +ffffffff827fbb90 T smu_v13_0_run_btc +ffffffff827fbc20 T smu_v13_0_gpo_control +ffffffff827fbcc0 T smu_v13_0_deep_sleep_control +ffffffff827fbfc0 T smu_v13_0_gfx_ulv_control +ffffffff827fc040 T smu_v13_0_get_bamaco_support +ffffffff827fc0f0 T smu_v13_0_baco_enter +ffffffff827fc1e0 T smu_v13_0_baco_exit +ffffffff827fc310 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff827fc380 T smu_v13_0_od_edit_dpm_table +ffffffff827fc690 T smu_v13_0_set_default_dpm_tables +ffffffff827fc6c0 T smu_v13_0_set_smu_mailbox_registers +ffffffff827fc730 T smu_v13_0_mode1_reset +ffffffff827fc7b0 T smu_v13_0_update_pcie_parameters +ffffffff827fca30 T smu_v13_0_disable_pmfw_state +ffffffff827fcab0 T smu_v13_0_enable_uclk_shadow +ffffffff827fcad0 T smu_v13_0_set_wbrf_exclusion_ranges +ffffffff827fcb20 t smu_v13_0_set_irq_state +ffffffff827fd170 t smu_v13_0_irq_process +ffffffff827fe000 T smu_v13_0_0_set_ppt_funcs +ffffffff827fe0f0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff827fe240 t smu_v13_0_0_set_default_dpm_table +ffffffff827fe740 t smu_v13_0_0_populate_umd_state_clk +ffffffff827fe880 t smu_v13_0_0_print_clk_levels +ffffffff827fe9d0 t smu_v13_0_0_force_clk_levels +ffffffff827feb60 t smu_v13_0_0_od_edit_dpm_table +ffffffff827ff3e0 t smu_v13_0_0_restore_user_od_settings +ffffffff827ff4c0 t smu_v13_0_0_get_power_profile_mode +ffffffff827ff5e0 t smu_v13_0_0_set_power_profile_mode +ffffffff827ffa40 t smu_v13_0_0_read_sensor +ffffffff827ffcc0 t smu_v13_0_0_is_dpm_running +ffffffff827ffd10 t smu_v13_0_0_get_fan_speed_pwm +ffffffff827ffe00 t smu_v13_0_0_get_fan_speed_rpm +ffffffff827ffe70 t smu_v13_0_0_get_thermal_temperature_range +ffffffff827fff70 t smu_v13_0_0_set_default_od_settings +ffffffff82800150 t smu_v13_0_0_dump_pptable +ffffffff82800180 t smu_v13_0_0_get_power_limit +ffffffff828002e0 t smu_v13_0_0_set_df_cstate +ffffffff82800300 t smu_v13_0_0_i2c_control_init +ffffffff82800450 t smu_v13_0_0_i2c_control_fini +ffffffff82800490 t smu_v13_0_0_get_unique_id +ffffffff82800500 t smu_v13_0_0_init_smc_tables +ffffffff82800790 t smu_v13_0_0_set_mp1_state +ffffffff82800810 t smu_v13_0_0_setup_pptable +ffffffff828009b0 t smu_v13_0_0_system_features_control +ffffffff828009c0 t smu_v13_0_0_set_power_limit +ffffffff82800c10 t smu_v13_0_0_is_mode1_reset_supported +ffffffff82800c80 t smu_v13_0_0_mode1_reset +ffffffff82800da0 t smu_v13_0_0_mode2_reset +ffffffff82800df0 t smu_v13_0_0_enable_gfx_features +ffffffff82800e50 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff82800f80 t smu_v13_0_0_get_gpu_metrics +ffffffff828013e0 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff82801430 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff828014c0 t smu_v13_0_0_get_ecc_info +ffffffff828015b0 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff82801640 t smu_v13_0_0_wbrf_support_check +ffffffff828016a0 t smu_v13_0_0_i2c_xfer +ffffffff82801960 t smu_v13_0_0_i2c_func +ffffffff82802000 T smu_v13_0_4_set_ppt_funcs +ffffffff828020c0 t smu_v13_0_4_print_clk_levels +ffffffff82802140 t smu_v13_0_4_force_clk_levels +ffffffff82802420 t smu_v13_0_4_read_sensor +ffffffff82802790 t smu_v13_0_4_is_dpm_running +ffffffff828027f0 t smu_v13_0_4_set_watermarks_table +ffffffff82802980 t smu_v13_0_4_set_performance_level +ffffffff82803760 t smu_v13_0_4_init_smc_tables +ffffffff82803900 t smu_v13_0_4_fini_smc_tables +ffffffff828039d0 t smu_v13_0_4_system_features_control +ffffffff82803a60 t smu_v13_0_4_mode2_reset +ffffffff82803a80 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff82803e20 t smu_v13_0_4_get_gpu_metrics +ffffffff82804000 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff82804060 t smu_v13_0_4_get_current_clk_freq +ffffffff82804170 t smu_v13_0_4_get_dpm_profile_freq +ffffffff82805000 T smu_v13_0_5_set_ppt_funcs +ffffffff828050a0 t smu_v13_0_5_set_default_dpm_tables +ffffffff828050d0 t smu_v13_0_5_print_clk_levels +ffffffff82805170 t smu_v13_0_5_force_clk_levels +ffffffff82805300 t smu_v13_0_5_od_edit_dpm_table +ffffffff82805610 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff82805630 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff82805650 t smu_v13_0_5_read_sensor +ffffffff82805900 t smu_v13_0_5_is_dpm_running +ffffffff82805960 t smu_v13_0_5_set_watermarks_table +ffffffff82805af0 t smu_v13_0_5_set_performance_level +ffffffff82806370 t smu_v13_0_5_init_smc_tables +ffffffff82806510 t smu_v13_0_5_fini_smc_tables +ffffffff828065e0 t smu_v13_0_5_system_features_control +ffffffff82806630 t smu_v13_0_5_mode2_reset +ffffffff828066c0 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff82806a80 t smu_v13_0_5_get_gpu_metrics +ffffffff82806be0 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff82806c40 t smu_v13_0_5_get_dpm_profile_freq +ffffffff82807000 T smu_v13_0_6_set_ppt_funcs +ffffffff82807090 t smu_v13_0_6_get_allowed_feature_mask +ffffffff828070f0 t smu_v13_0_6_set_default_dpm_table +ffffffff82807640 t smu_v13_0_6_populate_umd_state_clk +ffffffff82807740 t smu_v13_0_6_print_clk_levels +ffffffff82808110 t smu_v13_0_6_force_clk_levels +ffffffff82808320 t smu_v13_0_6_usr_edit_dpm_table +ffffffff82808720 t smu_v13_0_6_read_sensor +ffffffff82808d60 t smu_v13_0_6_is_dpm_running +ffffffff82808de0 t smu_v13_0_6_get_thermal_temperature_range +ffffffff82808f90 t smu_v13_0_6_set_performance_level +ffffffff82809110 t smu_v13_0_6_get_power_limit +ffffffff82809210 t smu_v13_0_6_i2c_control_init +ffffffff82809360 t smu_v13_0_6_i2c_control_fini +ffffffff828093a0 t smu_v13_0_6_get_unique_id +ffffffff828093e0 t smu_v13_0_6_init_microcode +ffffffff828095a0 t smu_v13_0_6_init_smc_tables +ffffffff82809830 t smu_v13_0_6_check_fw_status +ffffffff82809890 t smu_v13_0_6_setup_pptable +ffffffff828098c0 t smu_v13_0_6_system_features_control +ffffffff82809940 t smu_v13_0_6_get_enabled_mask +ffffffff828099b0 t smu_v13_0_6_set_power_limit +ffffffff828099d0 t smu_v13_0_6_register_irq_handler +ffffffff82809a30 t smu_v13_0_6_get_bamaco_support +ffffffff82809a60 t smu_v13_0_6_is_mode1_reset_supported +ffffffff82809a90 t smu_v13_0_6_is_mode2_reset_supported +ffffffff82809ac0 t smu_v13_0_6_mode1_reset +ffffffff82809b70 t smu_v13_0_6_mode2_reset +ffffffff82809f40 t smu_v13_0_6_get_dpm_ultimate_freq +ffffffff8280a180 t smu_v13_0_6_set_soft_freq_limited_range +ffffffff8280a4a0 t smu_v13_0_6_log_thermal_throttling_event +ffffffff8280a7e0 t smu_v13_0_6_get_gpu_metrics +ffffffff8280b110 t smu_v13_0_6_get_pm_metrics +ffffffff8280b2c0 t smu_v13_0_6_smu_send_hbm_bad_page_num +ffffffff8280b350 t smu_v13_0_6_send_rma_reason +ffffffff8280b410 t smu_v13_0_6_get_smu_metrics_data +ffffffff8280b6c0 t smu_v13_0_6_upload_dpm_level +ffffffff8280b7f0 t smu_v13_0_6_i2c_xfer +ffffffff8280bba0 t smu_v13_0_6_i2c_func +ffffffff8280bbd0 t smu_v13_0_6_select_policy_soc_pstate +ffffffff8280bc80 t smu_v13_0_6_select_plpd_policy +ffffffff8280bd40 t smu_v13_0_6_set_irq_state +ffffffff8280c020 t smu_v13_0_6_irq_process +ffffffff8280c1d0 t mca_smu_set_debug_mode +ffffffff8280c230 t mca_smu_parse_mca_error_count +ffffffff8280c380 t mca_smu_get_valid_mca_count +ffffffff8280c400 t mca_smu_get_mca_entry +ffffffff8280c550 t mca_umc_mca_get_err_count +ffffffff8280c630 t mca_gfx_mca_get_err_count +ffffffff8280c6a0 t mca_gfx_smu_bank_is_valid +ffffffff8280c6f0 t mca_smu_mca_get_err_count +ffffffff8280c770 t mca_smu_bank_is_valid +ffffffff8280c820 t mca_pcs_xgmi_mca_get_err_count +ffffffff8280c880 t aca_smu_set_debug_mode +ffffffff8280c8e0 t aca_smu_get_valid_aca_count +ffffffff8280c960 t aca_smu_get_valid_aca_bank +ffffffff8280ca60 t aca_smu_parse_error_code +ffffffff8280d000 T smu_v13_0_7_set_ppt_funcs +ffffffff8280d090 t smu_v13_0_7_get_allowed_feature_mask +ffffffff8280d210 t smu_v13_0_7_set_default_dpm_table +ffffffff8280d710 t smu_v13_0_7_populate_umd_state_clk +ffffffff8280d850 t smu_v13_0_7_print_clk_levels +ffffffff8280d9a0 t smu_v13_0_7_force_clk_levels +ffffffff8280db30 t smu_v13_0_7_od_edit_dpm_table +ffffffff8280e3b0 t smu_v13_0_7_restore_user_od_settings +ffffffff8280e490 t smu_v13_0_7_get_power_profile_mode +ffffffff8280e5f0 t smu_v13_0_7_set_power_profile_mode +ffffffff8280ea50 t smu_v13_0_7_read_sensor +ffffffff8280ecc0 t smu_v13_0_7_is_dpm_running +ffffffff8280ed10 t smu_v13_0_7_get_fan_speed_pwm +ffffffff8280ee00 t smu_v13_0_7_get_fan_speed_rpm +ffffffff8280ee70 t smu_v13_0_7_get_thermal_temperature_range +ffffffff8280ef70 t smu_v13_0_7_set_default_od_settings +ffffffff8280f150 t smu_v13_0_7_dump_pptable +ffffffff8280f180 t smu_v13_0_7_get_power_limit +ffffffff8280f2e0 t smu_v13_0_7_set_df_cstate +ffffffff8280f300 t smu_v13_0_7_init_smc_tables +ffffffff8280f530 t smu_v13_0_7_check_fw_status +ffffffff8280f590 t smu_v13_0_7_set_mp1_state +ffffffff8280f5d0 t smu_v13_0_7_setup_pptable +ffffffff8280f770 t smu_v13_0_7_set_power_limit +ffffffff8280f9c0 t smu_v13_0_7_is_mode1_reset_supported +ffffffff8280fa00 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff8280fb30 t smu_v13_0_7_get_gpu_metrics +ffffffff8280ffa0 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff8280fff0 t smu_v13_0_7_wbrf_support_check +ffffffff82811000 T yellow_carp_set_ppt_funcs +ffffffff82811050 t yellow_carp_set_default_dpm_tables +ffffffff82811080 t yellow_carp_print_clk_levels +ffffffff82811100 t yellow_carp_force_clk_levels +ffffffff828113e0 t yellow_carp_od_edit_dpm_table +ffffffff828116f0 t yellow_carp_dpm_set_vcn_enable +ffffffff82811710 t yellow_carp_dpm_set_jpeg_enable +ffffffff82811730 t yellow_carp_read_sensor +ffffffff82811b30 t yellow_carp_is_dpm_running +ffffffff82811b90 t yellow_carp_set_watermarks_table +ffffffff82811d20 t yellow_carp_set_performance_level +ffffffff82812b30 t yellow_carp_init_smc_tables +ffffffff82812cd0 t yellow_carp_fini_smc_tables +ffffffff82812da0 t yellow_carp_system_features_control +ffffffff82812df0 t yellow_carp_get_gfxoff_status +ffffffff82812e80 t yellow_carp_mode2_reset +ffffffff82812f10 t yellow_carp_get_dpm_ultimate_freq +ffffffff828132e0 t yellow_carp_get_gpu_metrics +ffffffff828134b0 t yellow_carp_post_smu_init +ffffffff82813540 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff828135a0 t yellow_carp_get_current_clk_freq +ffffffff828136b0 t yellow_carp_get_dpm_profile_freq +ffffffff82814000 T smu_v14_0_init_microcode +ffffffff82814130 T smu_v14_0_fini_microcode +ffffffff82814190 T smu_v14_0_load_microcode +ffffffff82814310 T smu_v14_0_init_pptable_microcode +ffffffff828144b0 T smu_v14_0_get_pptable_from_firmware +ffffffff828145e0 T smu_v14_0_check_fw_status +ffffffff82814650 T smu_v14_0_check_fw_version +ffffffff82814760 T smu_v14_0_setup_pptable +ffffffff82814900 T smu_v14_0_init_smc_tables +ffffffff82814ad0 T smu_v14_0_fini_smc_tables +ffffffff82814d40 T smu_v14_0_init_power +ffffffff82814dd0 T smu_v14_0_fini_power +ffffffff82814e60 T smu_v14_0_get_vbios_bootup_values +ffffffff82815130 T smu_v14_0_notify_memory_pool_location +ffffffff82815200 T smu_v14_0_set_driver_table_location +ffffffff82815280 T smu_v14_0_set_tool_table_location +ffffffff82815300 T smu_v14_0_set_allowed_mask +ffffffff828153e0 T smu_v14_0_gfx_off_control +ffffffff82815450 T smu_v14_0_system_features_control +ffffffff82815470 T smu_v14_0_notify_display_change +ffffffff828154f0 T smu_v14_0_get_current_power_limit +ffffffff828155f0 T smu_v14_0_set_power_limit +ffffffff82815730 T smu_v14_0_register_irq_handler +ffffffff828157f0 T smu_v14_0_wait_for_event +ffffffff82815840 T smu_v14_0_get_dpm_ultimate_freq +ffffffff828159b0 T smu_v14_0_set_soft_freq_limited_range +ffffffff82815aa0 T smu_v14_0_set_hard_freq_limited_range +ffffffff82815ba0 T smu_v14_0_set_performance_level +ffffffff828163c0 T smu_v14_0_set_power_source +ffffffff82816430 T smu_v14_0_set_single_dpm_table +ffffffff82816770 T smu_v14_0_set_vcn_enable +ffffffff82816870 T smu_v14_0_set_jpeg_enable +ffffffff82816990 T smu_v14_0_run_btc +ffffffff82816a20 T smu_v14_0_gpo_control +ffffffff82816ac0 T smu_v14_0_deep_sleep_control +ffffffff82816dc0 T smu_v14_0_gfx_ulv_control +ffffffff82816e40 T smu_v14_0_baco_set_armd3_sequence +ffffffff82816eb0 T smu_v14_0_get_bamaco_support +ffffffff82816f60 T smu_v14_0_baco_get_state +ffffffff82816f90 T smu_v14_0_baco_set_state +ffffffff82817080 T smu_v14_0_baco_enter +ffffffff82817200 T smu_v14_0_baco_exit +ffffffff828172b0 T smu_v14_0_set_gfx_power_up_by_imu +ffffffff82817320 T smu_v14_0_set_default_dpm_tables +ffffffff82817350 T smu_v14_0_od_edit_dpm_table +ffffffff82817660 T smu_v14_0_enable_thermal_alert +ffffffff828176d0 T smu_v14_0_disable_thermal_alert +ffffffff82817710 t smu_v14_0_set_irq_state +ffffffff82817f10 t smu_v14_0_irq_process +ffffffff82819000 T smu_v14_0_0_set_ppt_funcs +ffffffff82819090 t smu_v14_0_0_print_clk_levels +ffffffff82819290 t smu_v14_0_0_force_clk_levels +ffffffff82819420 t smu_v14_0_0_read_sensor +ffffffff82819780 t smu_v14_0_0_is_dpm_running +ffffffff828197e0 t smu_v14_0_0_set_watermarks_table +ffffffff82819970 t smu_v14_0_common_set_performance_level +ffffffff8281a9a0 t smu_v14_0_common_get_dpm_table +ffffffff8281ade0 t smu_v14_0_0_init_smc_tables +ffffffff8281af80 t smu_v14_0_0_fini_smc_tables +ffffffff8281b050 t smu_v14_0_0_system_features_control +ffffffff8281b0a0 t smu_v14_0_0_mode2_reset +ffffffff8281b130 t smu_v14_0_common_get_dpm_ultimate_freq +ffffffff8281b610 t smu_v14_0_0_get_gpu_metrics +ffffffff8281b970 t smu_v14_0_common_set_fine_grain_gfx_freq_parameters +ffffffff8281b9f0 t smu_v14_0_0_set_vpe_enable +ffffffff8281ba10 t smu_v14_0_0_set_umsch_mm_enable +ffffffff8281ba30 t smu_v14_0_common_set_mall_enable +ffffffff8281bb20 t smu_v14_0_0_get_current_clk_freq +ffffffff8281bc10 t smu_v14_0_common_get_dpm_freq_by_index +ffffffff8281be40 t smu_v14_0_common_get_dpm_profile_freq +ffffffff8281d000 T smu_v14_0_2_set_ppt_funcs +ffffffff8281d0e0 t smu_v14_0_2_get_allowed_feature_mask +ffffffff8281d160 t smu_v14_0_2_set_default_dpm_table +ffffffff8281d5d0 t smu_v14_0_2_populate_umd_state_clk +ffffffff8281d710 t smu_v14_0_2_print_clk_levels +ffffffff8281d860 t smu_v14_0_2_force_clk_levels +ffffffff8281d9f0 t smu_v14_0_2_od_edit_dpm_table +ffffffff8281e1f0 t smu_v14_0_2_restore_user_od_settings +ffffffff8281e2d0 t smu_v14_0_2_get_power_profile_mode +ffffffff8281e3f0 t smu_v14_0_2_set_power_profile_mode +ffffffff8281e820 t smu_v14_0_2_read_sensor +ffffffff8281eaa0 t smu_v14_0_2_is_dpm_running +ffffffff8281eaf0 t smu_v14_0_2_get_thermal_temperature_range +ffffffff8281ec10 t smu_v14_0_2_set_default_od_settings +ffffffff8281ee00 t smu_v14_0_2_dump_pptable +ffffffff8281ee30 t smu_v14_0_2_get_power_limit +ffffffff8281ef10 t smu_v14_0_2_set_df_cstate +ffffffff8281ef30 t smu_v14_0_2_update_pcie_parameters +ffffffff8281f1b0 t smu_v14_0_2_i2c_control_init +ffffffff8281f300 t smu_v14_0_2_i2c_control_fini +ffffffff8281f340 t smu_v14_0_2_get_unique_id +ffffffff8281f3b0 t smu_v14_0_2_init_smc_tables +ffffffff8281f620 t smu_v14_0_2_set_mp1_state +ffffffff8281f660 t smu_v14_0_2_setup_pptable +ffffffff8281f790 t smu_v14_0_2_set_power_limit +ffffffff8281f9e0 t smu_v14_0_2_baco_enter +ffffffff8281fa40 t smu_v14_0_2_baco_exit +ffffffff8281fab0 t smu_v14_0_2_is_mode1_reset_supported +ffffffff8281fae0 t smu_v14_0_2_mode1_reset +ffffffff8281fba0 t smu_v14_0_2_mode2_reset +ffffffff8281fbd0 t smu_v14_0_2_enable_gfx_features +ffffffff8281fc30 t smu_v14_0_2_get_dpm_ultimate_freq +ffffffff8281fd60 t smu_v14_0_2_get_gpu_metrics +ffffffff828201a0 t smu_v14_0_2_i2c_xfer +ffffffff82820470 t smu_v14_0_2_i2c_func +ffffffff82821000 T smu_cmn_send_msg_without_waiting +ffffffff82821210 T smu_cmn_wait_for_response +ffffffff82821370 T smu_cmn_send_smc_msg_with_param +ffffffff828217b0 T smu_cmn_to_asic_specific_index +ffffffff828218f0 t __smu_cmn_reg_print_error +ffffffff82821b50 T smu_cmn_send_smc_msg +ffffffff82821b70 T smu_cmn_send_debug_smc_msg +ffffffff82821c10 T smu_cmn_send_debug_smc_msg_with_param +ffffffff82821cb0 T smu_cmn_feature_is_supported +ffffffff82821d60 T smu_cmn_feature_is_enabled +ffffffff82821e60 T smu_cmn_clk_dpm_is_enabled +ffffffff82821f70 T smu_cmn_get_enabled_mask +ffffffff82822060 T smu_cmn_get_indep_throttler_status +ffffffff82822110 T smu_cmn_feature_update_enable_state +ffffffff828221d0 T smu_cmn_feature_set_enabled +ffffffff828222c0 T smu_cmn_get_pp_feature_mask +ffffffff82822400 T smu_cmn_set_pp_feature_mask +ffffffff82822530 T smu_cmn_disable_all_features_with_exception +ffffffff828225f0 T smu_cmn_get_smc_version +ffffffff828226e0 T smu_cmn_update_table +ffffffff82822870 T smu_cmn_write_watermarks_table +ffffffff82822950 T smu_cmn_write_pptable +ffffffff82822a30 T smu_cmn_get_metrics_table +ffffffff82822ba0 T smu_cmn_get_combo_pptable +ffffffff82822c90 T smu_cmn_init_soft_gpu_metrics +ffffffff82822dc0 T smu_cmn_set_mp1_state +ffffffff82822e70 T smu_cmn_is_audio_func_enabled +ffffffff82822ec0 T smu_cmn_generic_soc_policy_desc +ffffffff82822ef0 T smu_cmn_generic_plpd_policy_desc +ffffffff82822f20 T smu_cmn_get_backend_workload_mask +ffffffff828230a0 t smu_soc_policy_get_desc +ffffffff828230f0 t smu_xgmi_plpd_policy_get_desc +ffffffff82824000 T pci_mcfg_init +ffffffff82824050 T pci_lookup_segment +ffffffff828240b0 T pci_attach_hook +ffffffff828240e0 T pci_bus_maxdevs +ffffffff82824110 T pci_make_tag +ffffffff82824190 T pci_decompose_tag +ffffffff828241f0 T pci_conf_size +ffffffff82824250 T pci_mcfg_map_bus +ffffffff828242e0 T pci_conf_read +ffffffff82824450 T pci_conf_write +ffffffff828245a0 T pci_msix_table_map +ffffffff828246f0 T pci_msix_table_unmap +ffffffff828247a0 T msi_hwmask +ffffffff82824880 T msi_hwunmask +ffffffff82824960 T msi_addroute +ffffffff82824aa0 T msi_delroute +ffffffff82824b30 T msi_allocidtvec +ffffffff82824ca0 T pci_intr_enable_msivec +ffffffff82824da0 T pci_intr_map_msi +ffffffff82824e60 T pci_intr_map_msivec +ffffffff82824f20 T msix_hwmask +ffffffff828250c0 T msix_hwunmask +ffffffff82825220 T msix_addroute +ffffffff82825470 T msix_delroute +ffffffff82825600 T pci_intr_map_msix +ffffffff828256e0 T pci_intr_map +ffffffff82825940 T pci_intr_string +ffffffff82825a20 T pci_intr_establish +ffffffff82825a70 T pci_intr_establish_cpu +ffffffff82825bf0 T pci_intr_disestablish +ffffffff82825c10 T pci_init_extents +ffffffff82825e30 T pci_probe_device_hook +ffffffff82825e70 T pci_dev_postattach +ffffffff82825e80 T pci_min_powerstate +ffffffff82825e90 T pci_set_powerstate_md +ffffffff82826000 T pciide_machdep_compat_intr_establish +ffffffff82826070 T pciide_machdep_compat_intr_disestablish +ffffffff82827000 T vga_post_init +ffffffff82827390 t vm86_emu_inb +ffffffff828273e0 t vm86_emu_inw +ffffffff82827420 t vm86_emu_inl +ffffffff82827460 t vm86_emu_outb +ffffffff828274b0 t vm86_emu_outw +ffffffff828274f0 t vm86_emu_outl +ffffffff82827530 T vga_post_call +ffffffff828275b0 T vga_post_free +ffffffff82827640 T ddb_vgapost +ffffffff82828000 T pchbmatch +ffffffff82828040 T pchbattach +ffffffff82828570 T pchbactivate +ffffffff828285f0 T pchb_amd64ht_attach +ffffffff82828750 T pchb_rnd +ffffffff828287e0 T pchb_print +ffffffff82829000 T amas_match +ffffffff82829060 T amas_attach +ffffffff828290c0 T amas_intl_nodes +ffffffff82829160 T amas_get_pagerange +ffffffff8282a000 T agp_flush_cache +ffffffff8282b000 T cardslotmatch +ffffffff8282b050 T cardslotattach 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+ffffffff82830000 T rbus_space_alloc +ffffffff82830070 T rbus_space_alloc_subregion +ffffffff82830270 T rbus_space_free +ffffffff82830310 T rbus_new_body +ffffffff828303b0 T rbus_new_root_delegate +ffffffff82830490 T rbus_new_root_share +ffffffff82831000 T com_cardbus_match +ffffffff82831080 T com_cardbus_attach +ffffffff82831250 T com_cardbus_detach +ffffffff82831300 T com_cardbus_find_csdev +ffffffff82831480 T com_cardbus_gofigure +ffffffff82831980 T com_cardbus_enable +ffffffff82831a80 T com_cardbus_disable +ffffffff82831ad0 T com_cardbus_setup +ffffffff82832000 T xl_cardbus_match +ffffffff82832080 T xl_cardbus_attach +ffffffff82832480 T xl_cardbus_detach +ffffffff82832550 T xl_cardbus_lookup +ffffffff82832600 T xl_cardbus_intr_ack +ffffffff82833000 T dc_cardbus_match +ffffffff82833030 T dc_cardbus_attach +ffffffff82833450 T dc_cardbus_detach +ffffffff82833500 T dc_cardbus_setup +ffffffff82834000 T fxp_cardbus_match +ffffffff82834030 T fxp_cardbus_attach +ffffffff82834290 T fxp_cardbus_detach +ffffffff82834340 T fxp_cardbus_setup +ffffffff82835000 t rl_cardbus_match +ffffffff82835030 t rl_cardbus_attach +ffffffff82835220 t rl_cardbus_detach +ffffffff828352e0 T rl_cardbus_setup +ffffffff82836000 T re_cardbus_probe +ffffffff82836030 T re_cardbus_attach +ffffffff82836280 T re_cardbus_detach +ffffffff82836320 T re_cardbus_setup +ffffffff82837000 T ath_cardbus_match +ffffffff82837060 T ath_cardbus_attach +ffffffff828371c0 T ath_cardbus_detach +ffffffff828372a0 T ath_cardbus_enable +ffffffff828373a0 T ath_cardbus_disable +ffffffff82837400 T ath_cardbus_power +ffffffff82837440 T ath_cardbus_setup +ffffffff82838000 T athn_cardbus_match +ffffffff82838030 T athn_cardbus_attach +ffffffff828381a0 T athn_cardbus_detach +ffffffff82838250 T athn_cardbus_enable +ffffffff82838350 T athn_cardbus_disable +ffffffff828383b0 T athn_cardbus_power +ffffffff828383f0 T athn_cardbus_read +ffffffff82838420 T athn_cardbus_write +ffffffff82838450 T athn_cardbus_write_barrier +ffffffff82838480 T athn_cardbus_setup +ffffffff82839000 T atw_cardbus_match +ffffffff82839030 T atw_cardbus_attach +ffffffff82839260 T atw_cardbus_detach +ffffffff82839330 T atw_cardbus_enable +ffffffff82839430 T atw_cardbus_disable +ffffffff82839490 T atw_cardbus_power +ffffffff828394d0 T atw_cardbus_setup +ffffffff8283a000 T rtw_cardbus_match +ffffffff8283a030 T rtw_cardbus_attach +ffffffff8283a2e0 T rtw_cardbus_detach +ffffffff8283a430 T rtw_cardbus_intr_ack +ffffffff8283a450 T rtw_cardbus_funcregen +ffffffff8283a4d0 T rtw_cardbus_enable +ffffffff8283a690 T rtw_cardbus_disable +ffffffff8283a7b0 T rtw_cardbus_power +ffffffff8283a7f0 T rtw_cardbus_setup +ffffffff8283b000 T ral_cardbus_match +ffffffff8283b030 T ral_cardbus_attach +ffffffff8283b280 T ral_cardbus_detach +ffffffff8283b350 T ral_cardbus_activate +ffffffff8283b3f0 T ral_cardbus_enable +ffffffff8283b5a0 T ral_cardbus_disable +ffffffff8283b600 T ral_cardbus_setup +ffffffff8283b6c0 T ral_cardbus_wakeup +ffffffff8283c000 T acx_cardbus_match +ffffffff8283c030 T acx_cardbus_attach +ffffffff8283c2b0 T acx_cardbus_detach +ffffffff8283c400 T acx_cardbus_enable +ffffffff8283c510 T acx_cardbus_disable +ffffffff8283c570 T acx_cardbus_power +ffffffff8283c5b0 T acx_cardbus_setup +ffffffff8283d000 T pgt_cardbus_match +ffffffff8283d030 T pgt_cardbus_attach +ffffffff8283d290 T pgt_cardbus_detach +ffffffff8283d350 T pgt_cardbus_enable +ffffffff8283d500 T pgt_cardbus_disable +ffffffff8283d560 T pgt_cardbus_power +ffffffff8283d5c0 T pgt_cardbus_setup +ffffffff8283e000 T ehci_cardbus_match +ffffffff8283e040 T ehci_cardbus_attach +ffffffff8283e360 T ehci_cardbus_detach +ffffffff8283f000 T ohci_cardbus_match +ffffffff8283f040 T ohci_cardbus_attach +ffffffff8283f360 T ohci_cardbus_detach +ffffffff82840000 T uhci_cardbus_match +ffffffff82840040 T uhci_cardbus_attach +ffffffff828403d0 T uhci_cardbus_detach +ffffffff82841000 T malo_cardbus_match +ffffffff82841030 T malo_cardbus_attach +ffffffff828412f0 T malo_cardbus_detach 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pcmcia_function_init +ffffffff828449d0 T pcmcia_function_enable +ffffffff82844e50 T pcmcia_function_disable +ffffffff82844f80 T pcmcia_io_map +ffffffff828451f0 T pcmcia_intr_establish +ffffffff828454b0 T pcmcia_card_intr +ffffffff828455f0 T pcmcia_intr_disestablish +ffffffff82845840 T pcmcia_intr_string +ffffffff82846000 T pcmcia_cis_read_1 +ffffffff82846120 T pcmcia_read_cis +ffffffff82846220 T pcmcia_scan_cis +ffffffff82848270 T pcmcia_parse_cis_tuple +ffffffff82849690 T pcmcia_print_cis +ffffffff8284a000 T pcmcia_check_cis_quirks +ffffffff8284b000 T ep_pcmcia_match +ffffffff8284b110 T ep_pcmcia_attach +ffffffff8284b5b0 T ep_pcmcia_detach +ffffffff8284b660 T ep_pcmcia_activate +ffffffff8284b760 T ep_pcmcia_lookup +ffffffff8284b870 T ep_pcmcia_enable1 +ffffffff8284b930 T ep_pcmcia_get_enaddr +ffffffff8284c000 T ne_pcmcia_match +ffffffff8284c150 T ne_pcmcia_attach +ffffffff8284c850 T ne_pcmcia_detach +ffffffff8284c930 T ne_pcmcia_activate +ffffffff8284ca50 T ne_pcmcia_get_enaddr +ffffffff8284cc80 T ne_pcmcia_dl10019_get_enaddr +ffffffff8284cf40 T ne_pcmcia_ax88190_set_iobase +ffffffff8284e000 T aic_pcmcia_match +ffffffff8284e0b0 T aic_pcmcia_attach +ffffffff8284e300 T aic_pcmcia_detach +ffffffff8284f000 T com_pcmcia_match +ffffffff8284f270 T com_pcmcia_attach +ffffffff8284f5c0 T com_pcmcia_detach +ffffffff8284f670 T com_pcmcia_activate +ffffffff8284f750 T com_pcmcia_enable1 +ffffffff8284f810 T com_pcmcia_enable +ffffffff8284f930 T com_pcmcia_disable +ffffffff8284f970 T com_pcmcia_disable1 +ffffffff82850000 t wdc_pcmcia_match +ffffffff828500f0 t wdc_pcmcia_attach +ffffffff82850630 T wdc_pcmcia_detach +ffffffff82850750 T wdc_pcmcia_activate +ffffffff82850890 T wdc_pcmcia_disk_device_interface_callback +ffffffff82850940 T wdc_pcmcia_disk_device_interface +ffffffff828509b0 T wdc_pcmcia_lookup +ffffffff82851000 T sm_pcmcia_match +ffffffff82851100 T sm_pcmcia_attach +ffffffff82851370 T sm_pcmcia_detach +ffffffff82851430 T sm_pcmcia_activate +ffffffff828514d0 T sm_pcmcia_funce_enaddr +ffffffff828514f0 T sm_pcmcia_ascii_enaddr +ffffffff82851600 T sm_pcmcia_lannid_ciscallback +ffffffff82851760 T sm_pcmcia_enable +ffffffff82851810 T sm_pcmcia_disable +ffffffff82852000 T xe_pcmcia_match +ffffffff82852050 T xe_pcmcia_attach +ffffffff82852730 T xe_pcmcia_detach +ffffffff82852830 T xe_pcmcia_activate +ffffffff82852bc0 T xe_pcmcia_interpret_manfid +ffffffff82852c80 T xe_pcmcia_funce_enaddr +ffffffff82852ca0 T xe_ioctl +ffffffff82853090 T xe_start +ffffffff828533a0 T xe_watchdog +ffffffff828533f0 T xe_intr +ffffffff82853830 T xe_full_reset +ffffffff82853f80 T xe_mdi_read +ffffffff82854bd0 T xe_mdi_write +ffffffff82855780 T xe_statchg +ffffffff828557b0 T xe_mediachange +ffffffff82855850 T xe_mediastatus +ffffffff828558c0 T xe_init +ffffffff82855930 T xe_stop +ffffffff82855aa0 T xe_reset +ffffffff82855c80 T xe_pcmcia_lan_nid_ciscallback +ffffffff82855e30 T xe_pcmcia_manfid_ciscallback +ffffffff82855f60 T xe_get +ffffffff82856270 T xe_set_address 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cmalo_fw_free +ffffffff8285ad00 T cmalo_cmd_set_macctrl +ffffffff8285aea0 T cmalo_cmd_set_txpower +ffffffff8285b030 T cmalo_cmd_set_antenna +ffffffff8285b1d0 T cmalo_cmd_set_radio +ffffffff8285b370 T cmalo_cmd_set_channel +ffffffff8285b500 T cmalo_cmd_set_rate +ffffffff8285b750 T cmalo_cmd_set_snmp +ffffffff8285b910 T cmalo_cmd_set_macaddr +ffffffff8285bac0 T cmalo_wep +ffffffff8285bb70 T cmalo_cmd_set_reset +ffffffff8285bcb0 T cmalo_select_network +ffffffff8285be00 T cmalo_cmd_set_auth +ffffffff8285bee0 T cmalo_cmd_set_assoc +ffffffff8285c2c0 T cmalo_reflect_network +ffffffff8285c3d0 T cmalo_tx_done +ffffffff8285c490 T cmalo_rx +ffffffff8285c6e0 T cmalo_cmd_response +ffffffff8285c970 T cmalo_event +ffffffff8285c9f0 T cmalo_tx +ffffffff8285cc40 T cmalo_cmd_set_wep +ffffffff8285cef0 T cmalo_rate2bitmap +ffffffff8285cf30 T cmalo_hexdump +ffffffff8285cf60 T cmalo_cmd_request +ffffffff8285d100 T cmalo_cmd_rsp_hwspec +ffffffff8285d170 T cmalo_cmd_rsp_scan +ffffffff8285d3a0 T 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wsemul_vt100_output_esc +ffffffff8289f2c0 T wsemul_vt100_output_csi +ffffffff8289f400 T wsemul_vt100_output_scs94 +ffffffff8289f4c0 T wsemul_vt100_output_scs94_percent +ffffffff8289f510 T wsemul_vt100_output_scs96 +ffffffff8289f660 T wsemul_vt100_output_scs96_percent +ffffffff8289f6b0 T wsemul_vt100_output_esc_hash +ffffffff8289fa10 T wsemul_vt100_output_esc_spc +ffffffff8289fa50 T wsemul_vt100_output_string +ffffffff8289fac0 T wsemul_vt100_output_string_esc +ffffffff8289fb20 T wsemul_vt100_output_dcs +ffffffff8289fbd0 T wsemul_vt100_output_dcs_dollar +ffffffff8289fc30 T wsemul_vt100_output_esc_percent +ffffffff8289fc90 T wsemul_vt100_init +ffffffff8289fcf0 T wsemul_vt100_reset +ffffffff8289fe30 T wsemul_vt100_nextline +ffffffff8289fec0 T wsemul_vt100_output_normal +ffffffff828a0160 T wsemul_vt100_output_c0c1 +ffffffff828a0400 T wsemul_vt100_jump_scroll +ffffffff828a1000 T wsemul_vt100_scrollup +ffffffff828a1170 T wsemul_vt100_scrolldown +ffffffff828a12e0 T wsemul_vt100_ed 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pms_sync_elantech_v3 +ffffffff828a9aa0 T pms_proc_elantech_v3 +ffffffff828a9cc0 T pms_enable_elantech_v4 +ffffffff828a9f30 T pms_sync_elantech_v4 +ffffffff828aa000 T pms_proc_elantech_v4 +ffffffff828aa3a0 T pms_enable_intelli +ffffffff828aa5c0 T pms_cmd +ffffffff828aa650 T pms_spec_cmd +ffffffff828aa920 T pms_set_scaling +ffffffff828aa9c0 T pms_set_resolution +ffffffff828aaa60 T pms_get_devid +ffffffff828aab00 T pms_get_status +ffffffff828aaba0 T pms_set_rate +ffffffff828aac40 T pms_reset +ffffffff828aace0 T pms_dev_enable +ffffffff828aada0 T pms_dev_disable +ffffffff828aae60 T pms_protocol_lookup +ffffffff828aaf70 T pms_reset_detect +ffffffff828aaff0 T pms_reset_timo +ffffffff828ab050 T pms_reset_task +ffffffff828ab140 T pms_change_state +ffffffff828ab530 T pmsinput +ffffffff828ab700 T synaptics_set_mode +ffffffff828ab820 T synaptics_query +ffffffff828ab930 T synaptics_get_hwinfo +ffffffff828abea0 T synaptics_sec_proc +ffffffff828abf80 T synaptics_knock +ffffffff828ac220 T alps_sec_proc +ffffffff828ac350 T alps_get_hwinfo +ffffffff828ac810 T elantech_set_absolute_mode_v1 +ffffffff828acbf0 T elantech_set_absolute_mode_v2 +ffffffff828ad2c0 T elantech_ps2_cmd +ffffffff828ad360 T elantech_set_absolute_mode_v3 +ffffffff828ad940 T elantech_set_absolute_mode_v4 +ffffffff828adbe0 T elantech_get_hwinfo_v1 +ffffffff828ade20 T elantech_get_hwinfo_v2 +ffffffff828ae1a0 T elantech_get_hwinfo_v3 +ffffffff828ae3e0 T elantech_get_hwinfo_v4 +ffffffff828ae6a0 T elantech_knock +ffffffff828af000 T wscnprobe +ffffffff828af0a0 T wscninit +ffffffff828af170 T wscn_video_init +ffffffff828af200 T wscn_input_init +ffffffff828af280 T wscnputc +ffffffff828af290 T wscngetc +ffffffff828af2a0 T wscnpollc +ffffffff828b0000 T skgpio_match +ffffffff828b0120 T skgpio_attach +ffffffff828b03c0 T skgpio_gpio_read +ffffffff828b0420 T skgpio_gpio_write +ffffffff828b04a0 T skgpio_gpio_ctl +ffffffff828b0530 T skgpio_led_read +ffffffff828b0590 T skgpio_led_write +ffffffff828b05c0 T skgpio_led_ctl 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hidkbd_translate +ffffffff828b5690 T hidkbd_apple_translate +ffffffff828b5740 T hidkbd_apple_munge +ffffffff828b5930 T hidkbd_apple_tb_munge +ffffffff828b5a20 T hidkbd_apple_iso_munge +ffffffff828b5b10 T hidkbd_apple_mba_munge +ffffffff828b5c70 T hidkbd_apple_iso_mba_munge +ffffffff828b5ec0 T hidkbd_input +ffffffff828b6000 T hidkbd_decode +ffffffff828b63d0 T hidkbd_enable +ffffffff828b6410 T hidkbd_set_leds +ffffffff828b64f0 T hidkbd_ioctl +ffffffff828b65a0 T hidkbd_bell +ffffffff828b65f0 T hidkbd_cngetc +ffffffff828b6690 T hidkbd_hookup_bell +ffffffff828b7000 T hidms_stylus_hid_parse +ffffffff828b7330 T hidms_pad_buttons_hid_parse +ffffffff828b7410 T hidms_wacom_setup +ffffffff828b7750 T hidms_setup +ffffffff828b7da0 T hidms_attach +ffffffff828b7f30 T hidms_detach +ffffffff828b7f70 T hidms_input +ffffffff828b8280 T hidms_enable +ffffffff828b82d0 T hidms_ioctl +ffffffff828b84a0 T hidms_disable +ffffffff828b9000 T hidmt_get_resolution +ffffffff828b9110 T hidmt_setup +ffffffff828b9870 T hidmt_set_input_mode +ffffffff828b9920 T hidmt_configure +ffffffff828b99d0 T hidmt_attach +ffffffff828b9af0 T hidmt_detach +ffffffff828b9b30 T hidmt_input +ffffffff828ba050 T hidmt_enable +ffffffff828ba090 T hidmt_ioctl +ffffffff828ba180 T hidmt_disable +ffffffff828bb000 T hidcc_match +ffffffff828bb110 T hidcc_attach +ffffffff828bb2f0 T hidcc_parse +ffffffff828bb710 T hidcc_attach_wskbd +ffffffff828bb7d0 T hidcc_detach +ffffffff828bb8a0 T hidcc_intr +ffffffff828bbc40 T hidcc_intr_slice +ffffffff828bbd40 T hidcc_setbits +ffffffff828bbed0 T hidcc_rawinput +ffffffff828bbf80 T hidcc_input +ffffffff828bbff0 T hidcc_bits_to_int +ffffffff828bc050 T hidcc_usage_to_sym +ffffffff828bc260 T hidcc_bit_to_sym +ffffffff828bc2b0 T hidcc_enable +ffffffff828bc2d0 T hidcc_set_leds +ffffffff828bc300 T hidcc_ioctl +ffffffff828bc370 T hidcc_is_array +ffffffff828bc3c0 T hidcc_parse_array +ffffffff828bc4e0 T hidcc_add_key_volume +ffffffff828bc610 T hidcc_add_key +ffffffff828bc6f0 T hidcc_bits_to_volume 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usbd_ref_wait +ffffffff828bf170 T usbd_get_devcnt +ffffffff828bf1a0 T usbd_claim_iface +ffffffff828bf1e0 T usbd_iface_claimed +ffffffff828bf220 T usbd_open_pipe +ffffffff828bf300 T usbd_open_pipe_ival +ffffffff828bf3f0 T usbd_open_pipe_intr +ffffffff828bf680 T usbd_alloc_xfer +ffffffff828bf700 T usbd_setup_xfer +ffffffff828bf770 T usbd_transfer +ffffffff828bfa80 T usbd_free_xfer +ffffffff828bfb00 T usbd_close_pipe +ffffffff828bfc90 T usbd_abort_pipe +ffffffff828bfd20 T usb_transfer_complete +ffffffff828bffe0 T usbd_dopoll +ffffffff828c0000 T usbd_alloc_buffer +ffffffff828c0090 T usbd_free_buffer +ffffffff828c00d0 T usbd_setup_default_xfer +ffffffff828c0150 T usbd_setup_isoc_xfer +ffffffff828c0280 T usbd_get_xfer_status +ffffffff828c02e0 T usbd_get_config_descriptor +ffffffff828c0330 T usbd_get_interface_descriptor +ffffffff828c0380 T usbd_get_device_descriptor +ffffffff828c03b0 T usbd_interface2endpoint_descriptor +ffffffff828c0400 T usbd_clear_endpoint_stall +ffffffff828c04a0 T usbd_clear_endpoint_toggle +ffffffff828c04e0 T usbd_do_request +ffffffff828c0500 T usbd_clear_endpoint_stall_async +ffffffff828c05e0 T usbd_request_async +ffffffff828c0700 T usbd_device2interface_handle +ffffffff828c0790 T usbd_set_interface +ffffffff828c08a0 T usbd_get_no_alts +ffffffff828c0910 T usbd_get_interface_altindex +ffffffff828c0940 T usbd_start_next +ffffffff828c0a10 T usb_insert_transfer +ffffffff828c0ae0 T usbd_do_request_flags +ffffffff828c0da0 T usbd_request_async_cb +ffffffff828c0e20 T usbd_get_quirks +ffffffff828c0e70 T usbd_set_polling +ffffffff828c0ed0 T usbd_get_endpoint_descriptor +ffffffff828c0f30 T usbd_ratecheck +ffffffff828c0f50 T usbd_match_device +ffffffff828c0fc0 T usbd_desc_iter_init +ffffffff828c1030 T usbd_desc_iter_next +ffffffff828c10b0 T usbd_str +ffffffff828c2000 T usbd_get_desc +ffffffff828c2070 T usbd_get_device_status +ffffffff828c20d0 T usbd_get_hub_descriptor +ffffffff828c2140 T usbd_get_hub_ss_descriptor +ffffffff828c21b0 T usbd_get_port_status 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usbd_find_edesc +ffffffff828c4fc0 T usbd_fill_iface_data +ffffffff828c5170 T usbd_parse_idesc +ffffffff828c52c0 T usbd_free_iface_data +ffffffff828c5340 T usbd_set_config +ffffffff828c53a0 T usbd_set_config_no +ffffffff828c5460 T usbd_set_config_index +ffffffff828c5a10 T usbd_setup_pipe +ffffffff828c5b20 T usbd_set_address +ffffffff828c5c00 T usbd_getnewaddr +ffffffff828c5c80 T usbd_probe_and_attach +ffffffff828c6270 T usbd_print +ffffffff828c63a0 T usbd_new_device +ffffffff828c6cc0 T usbd_reload_device_desc +ffffffff828c6d40 T usb_free_device +ffffffff828c6ea0 T usbd_fill_deviceinfo +ffffffff828c7260 T usbd_get_routestring +ffffffff828c72f0 T usbd_get_location +ffffffff828c7420 T usbd_get_cdesc +ffffffff828c7580 T usbd_detach +ffffffff828c8000 T usbd_find_quirk +ffffffff828c9000 T uhub_match +ffffffff828c9060 T uhub_attach +ffffffff828c95b0 T uhub_detach +ffffffff828c9710 T uhub_explore +ffffffff828c99e0 T uhub_intr +ffffffff828c9b50 T uhub_port_connect +ffffffff828ca000 T uaudio_match +ffffffff828ca070 T uaudio_attach +ffffffff828ca1f0 T uaudio_detach +ffffffff828ca3a0 T uaudio_open +ffffffff828ca4b0 T uaudio_close +ffffffff828ca4d0 T uaudio_set_params +ffffffff828caa10 T uaudio_halt_output +ffffffff828caa70 T uaudio_halt_input +ffffffff828caac0 T uaudio_set_port +ffffffff828cab40 T uaudio_get_port +ffffffff828cabc0 T uaudio_query_devinfo +ffffffff828cac40 T uaudio_trigger_output +ffffffff828cacd0 T uaudio_trigger_input +ffffffff828cad60 T uaudio_copy_output +ffffffff828cadc0 T uaudio_underrun +ffffffff828cade0 T uaudio_set_blksz +ffffffff828caea0 T uaudio_sign_expand +ffffffff828caee0 T uaudio_req +ffffffff828caf80 T uaudio_getnum +ffffffff828cb0b0 T uaudio_getdesc +ffffffff828cb130 T uaudio_unit_byid +ffffffff828cb170 T uaudio_tname +ffffffff828cb2e0 T uaudio_clkname +ffffffff828cb320 T uaudio_mkname +ffffffff828cb460 T uaudio_feature_fixup +ffffffff828cb5a0 T uaudio_ranges_init +ffffffff828cb5e0 T uaudio_ranges_add +ffffffff828cb6a0 T uaudio_ranges_clear +ffffffff828cb720 T uaudio_ranges_decode +ffffffff828cb7b0 T uaudio_ranges_encode +ffffffff828cb830 T uaudio_ranges_getrates +ffffffff828cb930 T uaudio_rates_indexof +ffffffff828cb9c0 T uaudio_req_ranges +ffffffff828cc010 T uaudio_alt_getrates +ffffffff828cc0f0 T uaudio_clock +ffffffff828cc160 T uaudio_getrates +ffffffff828cc240 T uaudio_feature_addent +ffffffff828cc400 T uaudio_process_srcs +ffffffff828cc4e0 T uaudio_process_unit +ffffffff828cd190 T uaudio_process_nch +ffffffff828cd240 T uaudio_unit_getdesc +ffffffff828cd300 T uaudio_setname_dsts +ffffffff828cd3c0 T uaudio_setname_srcs +ffffffff828cd480 T uaudio_setname_middle +ffffffff828cd540 T uaudio_mixer_nchan +ffffffff828cd5d0 T uaudio_mixer_skip +ffffffff828cd650 T uaudio_mixer_byindex +ffffffff828cd790 T uaudio_process_header +ffffffff828cd840 T uaudio_process_ac_ep +ffffffff828cd920 T uaudio_process_ac +ffffffff828ce290 T uaudio_process_as_ep +ffffffff828ce400 T uaudio_process_as_cs_ep +ffffffff828ce470 T uaudio_process_as_general +ffffffff828ce580 T uaudio_process_as_format +ffffffff828ceb00 T uaudio_process_as +ffffffff828cef50 T uaudio_fixup_params +ffffffff828cf0f0 T uaudio_iface_index +ffffffff828cf190 T uaudio_process_conf +ffffffff828cf5c0 T uaudio_xfer_alloc +ffffffff828cf680 T uaudio_xfer_free +ffffffff828cf710 T uaudio_stream_close +ffffffff828cf900 T uaudio_stream_open +ffffffff828d0100 T uaudio_adjspf +ffffffff828d01f0 T uaudio_pdata_copy +ffffffff828d03b0 T uaudio_pdata_calcsizes +ffffffff828d04b0 T uaudio_pdata_xfer +ffffffff828d05c0 T uaudio_pdata_intr +ffffffff828d0870 T uaudio_psync_xfer +ffffffff828d0990 T uaudio_psync_intr +ffffffff828d0ab0 T uaudio_rdata_xfer +ffffffff828d0cc0 T uaudio_rdata_intr +ffffffff828d10d0 T uaudio_trigger +ffffffff828d1330 T uaudio_print +ffffffff828d14c0 T uaudio_get_port_do +ffffffff828d1820 T uaudio_set_port_do +ffffffff828d1b30 T uaudio_query_devinfo_do +ffffffff828d2000 T uvideo_match +ffffffff828d20d0 T uvideo_attach +ffffffff828d2360 T uvideo_detach +ffffffff828d2480 T uvideo_open +ffffffff828d2520 T uvideo_close +ffffffff828d2690 T uvideo_querycap +ffffffff828d27c0 T uvideo_enum_fmt +ffffffff828d28d0 T uvideo_enum_fsizes +ffffffff828d2950 T uvideo_enum_fivals +ffffffff828d2ab0 T uvideo_s_fmt +ffffffff828d2c60 T uvideo_g_fmt +ffffffff828d2d00 T uvideo_s_parm +ffffffff828d2d80 T uvideo_g_parm +ffffffff828d2dd0 T uvideo_enum_input +ffffffff828d2e40 T uvideo_s_input +ffffffff828d2e70 T uvideo_g_input +ffffffff828d2ea0 T uvideo_reqbufs +ffffffff828d3040 T uvideo_querybuf +ffffffff828d30b0 T uvideo_qbuf +ffffffff828d3110 T uvideo_dqbuf +ffffffff828d3210 T uvideo_streamon +ffffffff828d32f0 T uvideo_streamoff +ffffffff828d3330 T uvideo_try_fmt +ffffffff828d3450 T uvideo_queryctrl +ffffffff828d3890 T uvideo_g_ctrl +ffffffff828d3ad0 T uvideo_s_ctrl +ffffffff828d3cf0 T uvideo_mappage +ffffffff828d3d50 T uvideo_get_bufsize +ffffffff828d3d80 T uvideo_start_read +ffffffff828d3e70 T uvideo_ucode_loader_ricoh +ffffffff828d40f0 T uvideo_ucode_loader_apple_isight +ffffffff828d4380 T uvideo_vs_close +ffffffff828d44d0 T uvideo_vs_free_bulk +ffffffff828d4570 T uvideo_vs_free_isoc +ffffffff828d46e0 T uvideo_vs_free_frame +ffffffff828d47c0 T uvideo_attach_hook +ffffffff828d4940 T uvideo_vs_decode_stream_header_isight +ffffffff828d4ac0 T uvideo_vs_decode_stream_header +ffffffff828d4c50 T uvideo_vc_parse_desc +ffffffff828d4e40 T uvideo_vs_parse_desc +ffffffff828d5060 T uvideo_vs_negotiation +ffffffff828d5490 T uvideo_desc_len +ffffffff828d5500 T uvideo_vc_parse_desc_header +ffffffff828d55b0 T uvideo_vc_parse_desc_pu +ffffffff828d5630 T uvideo_vc_get_ctrl +ffffffff828d56b0 T uvideo_vc_set_ctrl +ffffffff828d5730 T uvideo_find_ctrl +ffffffff828d5800 T uvideo_has_ctrl +ffffffff828d5850 T uvideo_vs_parse_desc_input_header +ffffffff828d58d0 T uvideo_vs_parse_desc_format +ffffffff828d5b60 T uvideo_vs_parse_desc_frame +ffffffff828d5c60 T uvideo_vs_parse_desc_alt +ffffffff828d5f30 T uvideo_vs_parse_desc_colorformat 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uath_free_tx_cmd_list +ffffffff829cca40 T uath_free_rx_data_list +ffffffff829ccac0 T uath_init +ffffffff829cd1d0 T uath_cmd_write +ffffffff829cd1f0 T uath_set_led +ffffffff829cd260 T uath_switch_channel +ffffffff829cd460 T uath_set_rates +ffffffff829cd510 T uath_cmd +ffffffff829cd770 T uath_cmd_read +ffffffff829cd790 T uath_write_reg +ffffffff829cd840 T uath_write_multi +ffffffff829cd910 T uath_read_reg +ffffffff829cd9c0 T uath_read_eeprom +ffffffff829cda90 T uath_data_rxeof +ffffffff829cde40 T uath_tx_null +ffffffff829cdf90 T uath_data_txeof +ffffffff829ce0c0 T uath_tx_data +ffffffff829ce3b0 T uath_stop +ffffffff829ce530 T uath_reset_tx_queues +ffffffff829ce630 T uath_wme_init +ffffffff829ce730 T uath_set_chan +ffffffff829ce7c0 T uath_set_key +ffffffff829ce990 T uath_set_keys +ffffffff829cec40 T uath_set_rxfilter +ffffffff829cf000 T athn_usb_match +ffffffff829cf080 T athn_usb_attach +ffffffff829cf1f0 T athn_usb_detach +ffffffff829cf2c0 T athn_usb_read +ffffffff829cf370 T athn_usb_write +ffffffff829cf410 T athn_usb_write_barrier +ffffffff829cf480 T athn_usb_task +ffffffff829cf570 T athn_usb_open_pipes +ffffffff829cf770 T athn_usb_alloc_tx_cmd +ffffffff829cf820 T athn_usb_attachhook +ffffffff829cfa30 T athn_usb_wait_async +ffffffff829cfa60 T athn_usb_close_pipes +ffffffff829cfb60 T athn_usb_free_tx_cmd +ffffffff829cfbb0 T athn_usb_free_tx_list +ffffffff829cfce0 T athn_usb_free_rx_list +ffffffff829cfd30 T athn_usb_load_firmware +ffffffff829cff80 T athn_usb_htc_setup +ffffffff829d02c0 T athn_usb_ioctl +ffffffff829d04d0 T athn_usb_start +ffffffff829d0680 T athn_usb_watchdog +ffffffff829d0710 T athn_usb_node_alloc +ffffffff829d0730 T athn_usb_newauth +ffffffff829d0920 T athn_usb_newassoc +ffffffff829d0a60 T athn_usb_node_free +ffffffff829d0b70 T athn_usb_updateslot +ffffffff829d0ba0 T athn_usb_updateedca +ffffffff829d0c70 T athn_usb_set_key +ffffffff829d0de0 T athn_usb_delete_key +ffffffff829d0f70 T athn_usb_newstate +ffffffff829d1090 T athn_usb_media_change +ffffffff829d1130 T athn_usb_next_scan +ffffffff829d1200 T athn_usb_rx_enable +ffffffff829d1280 T athn_usb_intr +ffffffff829d1420 T athn_usb_alloc_rx_list +ffffffff829d14f0 T athn_usb_alloc_tx_list +ffffffff829d1610 T athn_usb_do_async +ffffffff829d1740 T athn_usb_htc_msg +ffffffff829d17e0 T athn_usb_htc_connect_svc +ffffffff829d19f0 T athn_usb_wmi_xcmd +ffffffff829d1c80 T athn_usb_read_rom +ffffffff829d1de0 T athn_usb_stop +ffffffff829d21d0 T athn_usb_init +ffffffff829d26c0 T athn_usb_newstate_cb +ffffffff829d2aa0 T athn_usb_remove_node +ffffffff829d2bc0 T athn_usb_switch_chan +ffffffff829d2de0 T athn_usb_create_node +ffffffff829d3070 T athn_usb_newassoc_cb +ffffffff829d3210 T athn_usb_node_set_rates +ffffffff829d3350 T athn_usb_count_active_sta +ffffffff829d33a0 T athn_usb_newauth_cb +ffffffff829d34c0 T athn_usb_node_free_cb +ffffffff829d3590 T athn_usb_ampdu_tx_start +ffffffff829d36b0 T athn_usb_ampdu_tx_start_cb +ffffffff829d3720 T athn_usb_ampdu_tx_stop +ffffffff829d3810 T athn_usb_ampdu_tx_stop_cb +ffffffff829d3880 T athn_usb_clean_nodes +ffffffff829d3940 T athn_usb_updateedca_cb +ffffffff829d3990 T athn_usb_updateslot_cb +ffffffff829d39e0 T athn_usb_set_key_cb +ffffffff829d3ac0 T athn_usb_delete_key_cb +ffffffff829d3b30 T athn_usb_bcneof +ffffffff829d3ba0 T athn_usb_swba +ffffffff829d3d30 T athn_usb_tx_status +ffffffff829d3da0 T athn_usb_rx_wmi_ctrl +ffffffff829d3fc0 T athn_usb_rx_radiotap +ffffffff829d41c0 T athn_usb_rx_frame +ffffffff829d44b0 T athn_usb_rxeof +ffffffff829d4840 T athn_usb_txeof +ffffffff829d4900 T athn_usb_tx +ffffffff829d5000 T uow_match +ffffffff829d5080 T uow_attach +ffffffff829d55e0 T uow_detach +ffffffff829d56d0 T uow_activate +ffffffff829d5750 T uow_intr +ffffffff829d57a0 T uow_reset +ffffffff829d57c0 T uow_ow_reset +ffffffff829d5820 T uow_ow_bit +ffffffff829d58b0 T uow_ow_read_byte +ffffffff829d5940 T uow_ow_write_byte +ffffffff829d59b0 T uow_ow_read_block +ffffffff829d5a50 T uow_ow_write_block +ffffffff829d5ad0 T uow_ow_matchrom +ffffffff829d5bd0 T uow_cmd +ffffffff829d5d50 T uow_read +ffffffff829d5ea0 T uow_write +ffffffff829d5fb0 T uow_ow_search +ffffffff829d7000 T uberry_match +ffffffff829d7080 T uberry_attach +ffffffff829d7240 T uberry_detach +ffffffff829d7270 T uberry_charge +ffffffff829d7330 T uberry_pearlmode +ffffffff829d8000 T upd_match +ffffffff829d8160 T upd_attach +ffffffff829d8430 T upd_detach +ffffffff829d8540 T upd_lookup_usage_entry +ffffffff829d8620 T upd_intr +ffffffff829d8650 T upd_attach_sensor_tree +ffffffff829d8980 T upd_refresh +ffffffff829d8ab0 T upd_request_children +ffffffff829d8be0 T upd_update_report_cb +ffffffff829d8cf0 T upd_lookup_sensor +ffffffff829d8d60 T upd_sensor_invalidate +ffffffff829d8de0 T upd_sensor_update +ffffffff829da000 T uwacom_match +ffffffff829da110 T uwacom_attach +ffffffff829da380 T uwacom_detach +ffffffff829da3a0 T uwacom_enable +ffffffff829da420 T uwacom_ioctl +ffffffff829da4d0 T uwacom_disable +ffffffff829da510 T uwacom_intr_legacy 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T uhidpp_task +ffffffff829deae0 T hidpp10_get_type +ffffffff829debf0 T hidpp10_get_name +ffffffff829ded00 T hidpp10_enable_notifications +ffffffff829ded70 T uhidpp_is_notification +ffffffff829dee00 T uhidpp_claim_notification +ffffffff829def20 T uhidpp_refresh +ffffffff829df010 T uhidpp_device_refresh +ffffffff829df0c0 T uhidpp_consume_notification +ffffffff829df210 T uhidpp_device_connect +ffffffff829df590 T uhidpp_sleep +ffffffff829df5c0 T hidpp_get_protocol_version +ffffffff829df690 T uhidpp_device_features +ffffffff829df890 T hidpp20_battery_get_capability +ffffffff829df950 T hidpp20_unified_battery_get_capabilities +ffffffff829dfa40 T hidpp20_battery_get_level_status +ffffffff829dfb80 T hidpp20_unified_battery_get_status +ffffffff829dfcb0 T hidpp20_root_get_feature +ffffffff829dfd70 T hidpp20_feature_get_count +ffffffff829dfe10 T hidpp20_feature_get_id +ffffffff829dfed0 T hidpp_send_fap_report +ffffffff829dffc0 T hidpp_send_rap_report +ffffffff829e0080 T hidpp20_battery_status_is_charging +ffffffff829e00c0 T hidpp20_unified_battery_status_is_charging +ffffffff829e0100 T hidpp_send_validate +ffffffff829e0150 T hidpp_send_report +ffffffff829e1000 T ucc_match +ffffffff829e10b0 T ucc_attach +ffffffff829e11f0 T ucc_detach +ffffffff829e1260 T ucc_intr +ffffffff829e12a0 T ucc_enable +ffffffff829e2000 T iic_match +ffffffff829e2060 T iic_attach +ffffffff829e20e0 T iicbus_print +ffffffff829e2140 T iic_print +ffffffff829e21c0 T iic_search +ffffffff829e22a0 T iic_is_compatible +ffffffff829e3000 T iic_exec +ffffffff829e3310 T iic_smbus_write_byte +ffffffff829e3430 T iic_smbus_read_byte +ffffffff829e35a0 T iic_smbus_receive_byte +ffffffff829e4000 T iicprobeinit +ffffffff829e4040 T iicprobenc +ffffffff829e4110 T iicprobew +ffffffff829e41e0 T iicprobe +ffffffff829e42d0 T lm75probe +ffffffff829e5c00 T adm1032cloneprobe +ffffffff829e6000 T iic_ignore_addr +ffffffff829e60b0 T iic_dump +ffffffff829e65e0 T iic_probe_sensor +ffffffff829ed540 T iic_probe_eeprom +ffffffff829ed620 T iic_scan +ffffffff829ee000 T i2c_wait_for_scl +ffffffff829ee130 T i2c_bitbang_send_stop +ffffffff829ee1e0 T i2c_bitbang_send_start +ffffffff829ee3c0 T i2c_bitbang_initiate_xfer +ffffffff829ee450 T i2c_bitbang_write_byte +ffffffff829ee7e0 T i2c_bitbang_read_byte +ffffffff829ef000 T lmtemp_match +ffffffff829ef0e0 T lmtemp_attach +ffffffff829ef3c0 T lmtemp_refresh_sensor_data +ffffffff829ef4c0 T lmtemp_temp_read +ffffffff829f0000 T lmn_match +ffffffff829f0060 T lmn_attach +ffffffff829f01c0 T lmn_refresh +ffffffff829f1000 T lmenv_match +ffffffff829f10e0 T lmenv_attach +ffffffff829f1790 T lmenv_refresh +ffffffff829f2000 T maxtmp_match +ffffffff829f21d0 T maxtmp_attach +ffffffff829f23e0 T maxtmp_refresh +ffffffff829f2460 T maxtmp_readport +ffffffff829f3000 T adc_match +ffffffff829f3080 T adc_attach +ffffffff829f33a0 T adc_refresh +ffffffff829f4000 T admtemp_match +ffffffff829f4160 T admtemp_attach +ffffffff829f4510 T admtemp_refresh +ffffffff829f5000 T admlc_match +ffffffff829f5060 T admlc_attach +ffffffff829f5510 T admlc_refresh +ffffffff829f6000 T admtm_match +ffffffff829f60b0 T admtm_attach +ffffffff829f6500 T admtm_refresh +ffffffff829f7000 T admtmp_match +ffffffff829f7060 T admtmp_attach +ffffffff829f7220 T admtmp_refresh +ffffffff829f8000 T admtt_match +ffffffff829f8060 T admtt_attach +ffffffff829f8290 T admtt_refresh +ffffffff829f9000 T maxds_match +ffffffff829f90b0 T maxds_attach +ffffffff829f9320 T maxds_refresh +ffffffff829fa000 T adt_match +ffffffff829fa1b0 T adt_attach +ffffffff829fa860 T adt_refresh +ffffffff829fb000 T lm_i2c_match +ffffffff829fb160 T lm_i2c_attach +ffffffff829fb290 T lm_i2c_writereg +ffffffff829fb360 T lm_i2c_readreg +ffffffff829fc000 T admcts_match +ffffffff829fc060 T admcts_attach +ffffffff829fc740 T admcts_refresh +ffffffff829fd000 T wbng_match +ffffffff829fd060 T wbng_attach +ffffffff829fd780 T wbng_refresh +ffffffff829fd910 T wbng_readreg +ffffffff829fd980 T wbng_writereg +ffffffff829fd9f0 T wbng_refresh_volts +ffffffff829fdd70 T wbng_refresh_temps +ffffffff829fdf90 T wbng_refresh_fans +ffffffff829ff000 T nvt_match +ffffffff829ff060 T nvt_attach +ffffffff829ff460 T nvt_readreg +ffffffff829ff4d0 T nvt_refresh +ffffffff829ff660 T nvt_writereg +ffffffff829ff6d0 T nvt_refresh_volts +ffffffff829ff820 T nvt_refresh_temps +ffffffff829ff990 T nvt_refresh_fans +ffffffff82a00000 T adl_match +ffffffff82a00060 T adl_attach +ffffffff82a00240 T adl_refresh +ffffffff82a01000 T andl_match +ffffffff82a01060 T andl_attach +ffffffff82a01430 T andl_refresh +ffffffff82a014d0 T andl_refresh_temps +ffffffff82a01620 T andl_refresh_volts +ffffffff82a01800 T andl_refresh_tachs +ffffffff82a01940 T andl_readreg +ffffffff82a019b0 T andl_writereg +ffffffff82a02000 T spdmem_iic_match +ffffffff82a020c0 T spdmem_iic_attach +ffffffff82a02120 T spdmem_iic_read +ffffffff82a03000 T sdtemp_match +ffffffff82a03380 T sdtemp_attach +ffffffff82a03460 T sdtemp_refresh +ffffffff82a04000 T lisa_match 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ietp_sleep +ffffffff82a0d2f0 T ietp_iic_write_reg +ffffffff82a0d360 T ietp_reset_cmd +ffffffff82a0d420 T parse_input +ffffffff82a0e000 T bgw_match +ffffffff82a0e140 T bgw_attach +ffffffff82a0e3c0 T bgw_refresh +ffffffff82a0f000 T icc_match +ffffffff82a0f0b0 T icc_attach +ffffffff82a0f1e0 T icc_detach +ffffffff82a0f250 T icc_intr +ffffffff82a0f290 T icc_enable +ffffffff82a10000 T gpio_match +ffffffff82a10060 T gpio_attach +ffffffff82a100c0 T gpio_detach +ffffffff82a10150 T gpio_submatch +ffffffff82a101e0 T gpio_search +ffffffff82a10270 T gpioopen +ffffffff82a10300 T gpio_print +ffffffff82a103a0 T gpiobus_print +ffffffff82a10400 T gpio_pin_map +ffffffff82a104e0 T gpio_npins +ffffffff82a105f0 T gpio_pin_unmap +ffffffff82a10650 T gpio_pin_read +ffffffff82a10680 T gpio_pin_write +ffffffff82a106b0 T gpio_pin_ctl +ffffffff82a106e0 T gpio_pin_caps +ffffffff82a10720 T gpioclose +ffffffff82a107a0 T gpio_pinbyname +ffffffff82a10820 T gpio_ioctl +ffffffff82a11170 T gpioioctl +ffffffff82a12000 T acpi_pci_conf_read_1 +ffffffff82a12050 T acpi_pci_conf_read_2 +ffffffff82a120b0 T acpi_pci_conf_read_4 +ffffffff82a120d0 T acpi_pci_conf_write_1 +ffffffff82a12150 T acpi_pci_conf_write_2 +ffffffff82a121d0 T acpi_pci_conf_write_4 +ffffffff82a121f0 T acpi_gasio +ffffffff82a127e0 T acpi_inidev +ffffffff82a12880 T acpi_getsta +ffffffff82a128f0 T acpi_foundprt +ffffffff82a129f0 T acpi_print +ffffffff82a12a70 T acpi_getminbus +ffffffff82a12ac0 T acpi_matchcls +ffffffff82a12bc0 T _acpi_matchhids +ffffffff82a12c50 T acpi_matchhids +ffffffff82a12d50 T acpi_getpci +ffffffff82a13270 T acpi_find_pci +ffffffff82a13300 T acpi_pci_match +ffffffff82a13410 T acpi_pci_set_powerstate +ffffffff82a13610 T acpi_pci_notify +ffffffff82a136f0 T acpi_pci_min_powerstate +ffffffff82a13810 T acpi_pciroots_attach +ffffffff82a138f0 T acpi_gpio_event_task +ffffffff82a13a70 T acpi_gpio_event +ffffffff82a13b80 T acpi_addtask +ffffffff82a13c20 T acpi_wakeup +ffffffff82a13c40 T acpi_gpio_parse_events +ffffffff82a13d60 T acpi_register_gpio +ffffffff82a13e90 T acpi_register_gsb +ffffffff82a13f80 T acpi_attach_common +ffffffff82a14ad0 T acpi_loadtables +ffffffff82a14c80 T acpi_map_pmregs +ffffffff82a150c0 T acpi_read_pmreg +ffffffff82a155c0 T acpi_unmap_pmregs +ffffffff82a15650 T acpi_maptable +ffffffff82a158a0 T acpi_init_states +ffffffff82a15b00 T acpi_init_pm +ffffffff82a15c10 T acpi_init_gpes +ffffffff82a15e70 T acpi_enable +ffffffff82a16140 T acpi_submatch +ffffffff82a16180 T acpi_foundec +ffffffff82a162f0 T acpi_foundsony +ffffffff82a163b0 T acpi_foundsbs +ffffffff82a16530 T acpi_foundhid +ffffffff82a16930 T acpi_add_device +ffffffff82a16b00 T acpi_foundide +ffffffff82a16ca0 T acpi_founddock +ffffffff82a16d60 T acpi_foundvideo +ffffffff82a16e20 T acpi_create_thread +ffffffff82a16e90 T acpi_noprint +ffffffff82a16ec0 T acpi_write_pmreg +ffffffff82a17220 T acpi_dotask +ffffffff82a172f0 T is_ata +ffffffff82a173b0 T is_ejectable +ffffffff82a17400 T is_ejectable_bay +ffffffff82a17570 T acpiide_notify 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acpi_attach_deps +ffffffff82a1a060 T acpi_parse_resources +ffffffff82a1a3a0 T acpi_parse_crs +ffffffff82a1a420 T acpi_batcount +ffffffff82a1a470 T acpi_apminfo +ffffffff82a1b000 T acpi_checksum +ffffffff82a1c000 T aml_pc +ffffffff82a1c030 T _aml_die +ffffffff82a1c550 T aml_nodename +ffffffff82a1c600 T aml_getstack +ffffffff82a1c9b0 T aml_showvalue +ffffffff82a1d020 T aml_hashopcodes +ffffffff82a1d120 T _acpi_os_malloc +ffffffff82a1d180 T aml_findopcode +ffffffff82a1d1f0 T aml_mnem +ffffffff82a1d4c0 T aml_getname +ffffffff82a1d620 T _acpi_os_free +ffffffff82a1d680 T acpi_sleep +ffffffff82a1d6d0 T acpi_stall +ffffffff82a1d6f0 T aml_tstbit +ffffffff82a1d740 T aml_setbit +ffffffff82a1d790 T acpi_poll +ffffffff82a1d820 T acpi_poll_notify_task +ffffffff82a1d8a0 T aml_notify_task +ffffffff82a1d930 T aml_register_notify +ffffffff82a1da40 T aml_notify +ffffffff82a1dab0 T aml_notify_dev +ffffffff82a1db50 T __aml_search +ffffffff82a1dcd0 T aml_allocvalue +ffffffff82a1dd70 T aml_delchildren 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aml_rwindexfield +ffffffff82a234a0 T aml_rwfield +ffffffff82a23990 T aml_createfield +ffffffff82a23a70 T aml_parsefieldlist +ffffffff82a23e50 T aml_parse +ffffffff82a27140 T acpi_mutex_acquire +ffffffff82a271e0 T acpi_mutex_release +ffffffff82a27290 T acpi_event_wait +ffffffff82a273a0 T acpi_event_signal +ffffffff82a273f0 T acpi_event_reset +ffffffff82a27420 T aml_store +ffffffff82a27990 T aml_gettgt +ffffffff82a279e0 T __aml_searchname +ffffffff82a27b40 T aml_disprintf +ffffffff82a27bc0 T aml_disasm +ffffffff82a28e70 T aml_parsesimple +ffffffff82a291f0 T aml_eval +ffffffff82a296c0 T aml_seterror +ffffffff82a29810 T aml_loadtable +ffffffff82a29a40 T acpi_parse_aml +ffffffff82a29bd0 T aml_load +ffffffff82a29d50 T aml_node_setval +ffffffff82a29e00 T aml_searchrel +ffffffff82a29e70 T acpi_getdevlist +ffffffff82a2a2a0 T acpi_freedevlist +ffffffff82a2b000 T db_opregion +ffffffff82a2b040 T db_aml_dump +ffffffff82a2b0e0 T db_aml_showvalue +ffffffff82a2b570 T db_aml_objtype +ffffffff82a2b730 T db_aml_walktree +ffffffff82a2b7b0 T db_parse_name +ffffffff82a2b950 T db_acpi_showval +ffffffff82a2b9f0 T db_disprint +ffffffff82a2ba70 T db_acpi_disasm +ffffffff82a2bbd0 T db_acpi_tree +ffffffff82a2bbf0 T db_acpi_trace +ffffffff82a2d000 T acpitimermatch +ffffffff82a2d070 T acpitimerattach +ffffffff82a2d190 T acpitimer_delay +ffffffff82a2d340 T acpitimer_read +ffffffff82a2d3f0 T acpi_get_timecount +ffffffff82a2e000 T acpiac_match +ffffffff82a2e030 T acpiac_attach +ffffffff82a2e1c0 T acpiac_activate +ffffffff82a2e260 T acpiac_getpsr +ffffffff82a2e2e0 T acpiac_notify +ffffffff82a2e390 T acpiac_refresh +ffffffff82a2f000 T acpibat_match +ffffffff82a2f060 T acpibat_attach +ffffffff82a2f230 T acpibat_activate +ffffffff82a2f2f0 T acpibat_getbix +ffffffff82a2f710 T acpibat_getbst +ffffffff82a2f840 T acpibat_monitor +ffffffff82a2fc00 T acpibat_refresh +ffffffff82a300d0 T acpibat_notify +ffffffff82a31000 T acpibtn_match +ffffffff82a31030 T acpibtn_attach +ffffffff82a31390 T acpibtn_activate +ffffffff82a31420 T acpibtn_numopenlids +ffffffff82a314e0 T acpibtn_setpsw +ffffffff82a315a0 T acpibtn_disable_psw +ffffffff82a316a0 T acpibtn_enable_psw +ffffffff82a317a0 T acpibtn_notify +ffffffff82a32000 T acpicmos_match +ffffffff82a32030 T acpicmos_attach +ffffffff82a32080 T acpicmos_opreg_handler +ffffffff82a33000 T acpicpu_match +ffffffff82a33140 T acpicpu_attach +ffffffff82a336e0 T acpicpu_set_pdc +ffffffff82a339d0 T acpicpu_add_cstate +ffffffff82a33a90 T acpicpu_add_cstatepkg +ffffffff82a33e40 t check_mwait_hints +ffffffff82a33ee0 T acpicpu_add_cdeppkg +ffffffff82a33fb0 T acpicpu_getcst +ffffffff82a341c0 T acpicpu_getcst_from_fadt +ffffffff82a34300 T acpicpu_print_one_cst +ffffffff82a34440 T acpicpu_print_cst +ffffffff82a344f0 T acpicpu_idle +ffffffff82a34810 T acpicpu_suspend +ffffffff82a34980 T acpicpu_getpss +ffffffff82a34c30 T acpicpu_getppc +ffffffff82a34cf0 T acpicpu_getpct +ffffffff82a34e60 T acpicpu_notify +ffffffff82a35040 T acpicpu_setperf +ffffffff82a35240 T acpicpu_set_notify +ffffffff82a35280 T acpicpu_setperf_ppc_change +ffffffff82a352d0 T acpicpu_fetch_pss +ffffffff82a36000 T acpihpet_match +ffffffff82a36070 T acpihpet_attach +ffffffff82a36300 T acpihpet_activate +ffffffff82a36b30 T acpihpet_r +ffffffff82a36bc0 T acpihpet_w +ffffffff82a36c20 T acpihpet_delay +ffffffff82a36d00 T acpihpet_gettime +ffffffff82a37000 T acpiec_match +ffffffff82a370a0 T acpiec_attach +ffffffff82a37430 T acpiec_wait +ffffffff82a37510 T acpiec_status +ffffffff82a37530 T acpiec_write_data +ffffffff82a375f0 T acpiec_write_cmd +ffffffff82a376b0 T acpiec_read_data +ffffffff82a37770 T acpiec_sci_event +ffffffff82a37920 T acpiec_read_1 +ffffffff82a37b40 T acpiec_write_1 +ffffffff82a37d70 T acpiec_burst_enable +ffffffff82a37f00 T acpiec_burst_disable +ffffffff82a38000 T acpiec_read +ffffffff82a380c0 T acpiec_write +ffffffff82a38180 T acpiec_getcrs +ffffffff82a383a0 T acpiec_reg +ffffffff82a38480 T acpiec_get_events +ffffffff82a38550 T acpiec_gpehandler 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acpidmar_attach +ffffffff82a3e160 T acpidmar_activate +ffffffff82a3e410 T dmar_bdf +ffffffff82a3e490 T domain_map_check +ffffffff82a3e640 T acpidmar_pci_attach +ffffffff82a3e720 T dmar_ptmap +ffffffff82a3e7a0 T domain_map_pthru +ffffffff82a3e830 T domain_map_page_intel +ffffffff82a3e9d0 T iommu_flush_cache +ffffffff82a3ea20 T iommu_alloc_page +ffffffff82a3ead0 T pte_lvl +ffffffff82a3ec00 T domain_map_page_amd +ffffffff82a3ece0 T domain_unload_map +ffffffff82a3ef30 T dom_bdf +ffffffff82a3f010 T domain_load_map +ffffffff82a3f290 T iommu_enable_translation +ffffffff82a3f5e0 T iommu_flush_tlb +ffffffff82a3f770 T iommu_flush_write_buffer +ffffffff82a3f940 T iommu_set_rtaddr +ffffffff82a3fac0 T iommu_write_8 +ffffffff82a3faf0 T iommu_write_4 +ffffffff82a3fb20 T iommu_read_4 +ffffffff82a3fb40 T iommu_alloc_hwdte +ffffffff82a3fcb0 T iommu_issue_qi +ffffffff82a3fce0 T iommu_flush_tlb_qi +ffffffff82a3fd10 T iommu_flush_ctx_qi +ffffffff82a3fd40 T ivhd_invalidate_domain +ffffffff82a3fdb0 T iommu_read_8 +ffffffff82a3fdd0 T iommu_flush_ctx +ffffffff82a3ff00 T iommu_enable_qi +ffffffff82a40050 T iommu_showcfg +ffffffff82a402b0 T iommu_init +ffffffff82a40680 T acpidmar_intr_establish +ffffffff82a407a0 T acpidmar_intr +ffffffff82a40970 T acpidmar_match_devscope +ffffffff82a40ad0 T domain_create +ffffffff82a40d50 t dmar_dmamap_create +ffffffff82a40d70 t dmar_dmamap_destroy +ffffffff82a40d80 t dmar_dmamap_load +ffffffff82a40df0 t dmar_dmamap_load_mbuf +ffffffff82a40e60 t dmar_dmamap_load_uio +ffffffff82a40ed0 t dmar_dmamap_load_raw +ffffffff82a40f40 t dmar_dmamap_unload +ffffffff82a40f80 t dmar_dmamap_sync +ffffffff82a40fa0 t dmar_dmamem_alloc +ffffffff82a40fc0 t dmar_dmamem_free +ffffffff82a40fe0 t dmar_dmamem_map +ffffffff82a41000 t dmar_dmamem_unmap +ffffffff82a41020 t dmar_dmamem_mmap +ffffffff82a41040 T domain_add_device +ffffffff82a410d0 T domain_remove_device +ffffffff82a41190 T domain_lookup +ffffffff82a41390 T _iommu_map +ffffffff82a41460 T _iommu_domain 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+ffffffff82a44b40 T acpidmar_msi_addroute +ffffffff82a44c20 T acpidmar_msi_delroute +ffffffff82a44c40 T iommu_showfault +ffffffff82a44e10 T iommu_showpte +ffffffff82a45000 T acpidock_match +ffffffff82a45070 T acpidock_attach +ffffffff82a45410 T acpidock_status +ffffffff82a454a0 T acpidock_docklock +ffffffff82a45590 T acpidock_dockctl +ffffffff82a45680 T acpidock_foundejd +ffffffff82a45750 T acpidock_notify +ffffffff82a45cc0 T acpidock_eject +ffffffff82a45dc0 T acpidock_walkchildren +ffffffff82a46000 T abl_match +ffffffff82a46030 T abl_attach +ffffffff82a46280 T abl_get_brightness +ffffffff82a46320 T abl_get_param +ffffffff82a46380 T abl_set_param +ffffffff82a46450 T abl_set_brightness +ffffffff82a47000 T asmc_match +ffffffff82a47050 T asmc_attach +ffffffff82a47700 T asmc_activate +ffffffff82a47790 T asmc_try +ffffffff82a47c20 T asmc_get_backlight +ffffffff82a47ca0 T asmc_set_backlight +ffffffff82a47d30 T asmc_backlight +ffffffff82a47dd0 T asmc_init +ffffffff82a48030 T asmc_update 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+ffffffff82a4b8e0 T thinkpad_hotkey +ffffffff82a4bfa0 T thinkpad_brightness_up +ffffffff82a4c170 T thinkpad_brightness_down +ffffffff82a4c330 T thinkpad_toggle_bluetooth +ffffffff82a4c460 T thinkpad_volume_mute +ffffffff82a4c520 T thinkpad_volume_down +ffffffff82a4c5e0 T thinkpad_volume_up +ffffffff82a4c6a0 T thinkpad_get_thinklight +ffffffff82a4c6f0 T thinkpad_adaptive_change +ffffffff82a4c820 T thinkpad_get_brightness +ffffffff82a4c860 T thinkpad_toggle_wan +ffffffff82a4c990 T thinkpad_cmos +ffffffff82a4ca50 T thinkpad_set_brightness +ffffffff82a4cb50 T thinkpad_set_thinklight +ffffffff82a4cc10 T thinkpad_battery_inhibit_charge +ffffffff82a4cd50 T thinkpad_battery_force_discharge +ffffffff82a4d000 T toshiba_match +ffffffff82a4d0b0 T toshiba_attach +ffffffff82a4d1b0 T get_param_brightness +ffffffff82a4d210 T acpitoshiba_get_param +ffffffff82a4d270 T set_param_brightness +ffffffff82a4d310 T toshiba_update_brightness +ffffffff82a4d420 T acpitoshiba_set_param +ffffffff82a4d4c0 T toshiba_set_brightness +ffffffff82a4d600 T toshiba_enable_events +ffffffff82a4d6a0 T toshiba_read_events +ffffffff82a4d820 T toshiba_hotkey +ffffffff82a4dab0 T toshiba_get_brightness +ffffffff82a4dc40 T toshiba_fn_key_brightness_up +ffffffff82a4ddb0 T toshiba_fn_key_brightness_down +ffffffff82a4df20 T toshiba_fn_key_video_output +ffffffff82a4e090 T toshiba_get_video_output +ffffffff82a4e220 T toshiba_set_video_output +ffffffff82a4f000 T acpisony_match +ffffffff82a4f070 T acpisony_attach +ffffffff82a4f0f0 T acpisony_activate +ffffffff82a4f140 T acpisony_notify_setup +ffffffff82a4f380 T acpisony_notify +ffffffff82a4f7b0 T acpisony_find_offset +ffffffff82a4f8e0 T acpisony_set_hotkey +ffffffff82a4fb00 T acpisony_brightness_down +ffffffff82a4fc40 T acpisony_get_brightness +ffffffff82a4fce0 T acpisony_set_brightness +ffffffff82a50000 T acpivideo_match +ffffffff82a50070 T acpivideo_attach +ffffffff82a501f0 T acpivideo_getpcibus +ffffffff82a50230 T acpivideo_notify +ffffffff82a502a0 T acpivideo_set_policy +ffffffff82a50380 T acpi_foundvout +ffffffff82a50460 T acpivideo_print +ffffffff82a51000 T acpivout_match +ffffffff82a51070 T acpivout_attach +ffffffff82a51200 T acpivout_notify +ffffffff82a512e0 T acpivout_get_bcl +ffffffff82a51440 T acpivout_get_brightness +ffffffff82a51500 T acpivout_get_param +ffffffff82a515a0 T acpivout_set_param +ffffffff82a51710 T acpivout_select_brightness +ffffffff82a517e0 T acpivout_find_brightness +ffffffff82a51870 T acpivout_set_brightness +ffffffff82a52000 T acpipwrres_match +ffffffff82a52070 T acpipwrres_attach +ffffffff82a52310 T acpipwrres_foundcons +ffffffff82a524d0 T acpipwrres_ref_incr +ffffffff82a52580 T acpipwrres_hascons +ffffffff82a525d0 T acpipwrres_ref_decr +ffffffff82a52670 T acpipwrres_addcons +ffffffff82a53000 T aibs_match +ffffffff82a53030 T aibs_attach +ffffffff82a53190 T aibs_probe +ffffffff82a53320 T aibs_attach_new +ffffffff82a53450 T aibs_attach_sif +ffffffff82a53630 T aibs_notify +ffffffff82a536a0 T aibs_add_sensor +ffffffff82a53940 T aibs_getpack +ffffffff82a539d0 T aibs_refresh +ffffffff82a53a40 T aibs_refresh_r +ffffffff82a53b90 T aibs_getvalue +ffffffff82a53cf0 T aibs_find_cb +ffffffff82a54000 T aplgpio_match +ffffffff82a54060 T aplgpio_attach +ffffffff82a54390 T aplgpio_intr +ffffffff82a54500 T aplgpio_read_pin +ffffffff82a54560 T aplgpio_write_pin +ffffffff82a545e0 T aplgpio_intr_establish +ffffffff82a54720 T aplgpio_intr_enable +ffffffff82a547b0 T aplgpio_intr_disable +ffffffff82a55000 T bytgpio_match +ffffffff82a55060 T bytgpio_attach +ffffffff82a553a0 T bytgpio_intr +ffffffff82a554f0 T bytgpio_read_pin +ffffffff82a55560 T bytgpio_write_pin +ffffffff82a555f0 T bytgpio_intr_establish +ffffffff82a55670 T bytgpio_intr_enable +ffffffff82a55760 T bytgpio_intr_disable +ffffffff82a56000 T chvgpio_match +ffffffff82a56060 T chvgpio_attach +ffffffff82a56380 T chvgpio_intr +ffffffff82a56470 T chvgpio_read_pin +ffffffff82a56520 T chvgpio_write_pin +ffffffff82a565f0 T chvgpio_intr_establish +ffffffff82a567e0 T chvgpio_intr_enable +ffffffff82a568c0 T chvgpio_intr_disable +ffffffff82a569a0 T chvgpio_opreg_handler +ffffffff82a56a40 T chvgpio_check_pin +ffffffff82a57000 T glkgpio_match +ffffffff82a57060 T glkgpio_attach +ffffffff82a57390 T glkgpio_intr +ffffffff82a57500 T glkgpio_read_pin +ffffffff82a57560 T glkgpio_write_pin +ffffffff82a575e0 T glkgpio_intr_establish +ffffffff82a57720 T glkgpio_intr_enable +ffffffff82a577b0 T glkgpio_intr_disable +ffffffff82a58000 T pchgpio_match +ffffffff82a58060 T pchgpio_attach +ffffffff82a58660 T pchgpio_activate +ffffffff82a58710 T pchgpio_intr +ffffffff82a58960 T pchgpio_read_pin +ffffffff82a58a50 T pchgpio_write_pin +ffffffff82a58b70 T pchgpio_intr_establish +ffffffff82a58dc0 T pchgpio_intr_enable +ffffffff82a58f00 T pchgpio_intr_disable +ffffffff82a59040 T pchgpio_save +ffffffff82a590b0 T pchgpio_restore +ffffffff82a59120 T pchgpio_find_group +ffffffff82a591a0 T pchgpio_intr_handle +ffffffff82a592a0 T pchgpio_save_pin +ffffffff82a59480 T pchgpio_restore_pin +ffffffff82a5a000 T tipmic_match +ffffffff82a5a060 T tipmic_attach +ffffffff82a5a2c0 T tipmic_write_1 +ffffffff82a5a3a0 T tipmic_intr +ffffffff82a5a550 T tipmic_get_lpat +ffffffff82a5a690 T tipmic_read_pin +ffffffff82a5a6c0 T tipmic_write_pin +ffffffff82a5a6f0 T tipmic_thermal_opreg_handler +ffffffff82a5b120 T tipmic_power_opreg_handler +ffffffff82a5b400 T tipmic_read_1 +ffffffff82a5b4f0 T tipmic_raw_to_temp +ffffffff82a5c000 T ccpmic_match +ffffffff82a5c060 T ccpmic_attach +ffffffff82a5c160 T ccpmic_get_lpat +ffffffff82a5c290 T ccpmic_read_pin +ffffffff82a5c450 T ccpmic_write_pin +ffffffff82a5c5f0 T ccpmic_thermal_opreg_handler +ffffffff82a5c890 T ccpmic_power_opreg_handler +ffffffff82a5cad0 T ccpmic_read_1 +ffffffff82a5cbc0 T ccpmic_write_1 +ffffffff82a5cca0 T ccpmic_raw_to_temp +ffffffff82a5d000 T com_acpi_match +ffffffff82a5d150 T com_acpi_attach +ffffffff82a5d440 T com_acpi_is_designware +ffffffff82a5d4c0 T com_acpi_intr_designware +ffffffff82a5d500 T com_acpi_is_console +ffffffff82a5e000 T sdhc_acpi_match +ffffffff82a5e060 T sdhc_acpi_attach +ffffffff82a5e400 T sdhc_acpi_parse_resources +ffffffff82a5e4b0 T sdhc_acpi_card_detect_gpio +ffffffff82a5e510 T sdhc_acpi_card_detect_intr +ffffffff82a5e560 T sdhc_acpi_power_on +ffffffff82a5e5f0 T sdhc_acpi_explore +ffffffff82a5e620 T sdhc_acpi_card_detect_nonremovable +ffffffff82a5e650 T sdhc_acpi_do_explore +ffffffff82a5f000 T dwiic_acpi_match +ffffffff82a5f050 T dwiic_acpi_attach +ffffffff82a5f4f0 T dwiic_acpi_parse_crs +ffffffff82a5f650 T dwiic_acpi_power +ffffffff82a5f780 T dwiic_acpi_get_params +ffffffff82a5f900 T dwiic_i2c_intr_establish +ffffffff82a5f990 T dwiic_i2c_intr_disestablish +ffffffff82a5f9b0 T dwiic_i2c_intr_string +ffffffff82a5fa40 T dwiic_acpi_acquire_bus +ffffffff82a5faa0 T dwiic_acpi_release_bus +ffffffff82a5fae0 T dwiic_acpi_bus_scan +ffffffff82a5fb20 T dwiic_acpi_found_hid +ffffffff82a5ff10 T dwiic_matchhids +ffffffff82a5ffa0 T dwiic_acpi_found_ihidev +ffffffff82a60280 T dwiic_acpi_found_iatp +ffffffff82a60400 T dwiic_acpi_found_ietp +ffffffff82a61000 T acpicbkbd_match +ffffffff82a61030 T acpicbkbd_attach +ffffffff82a610e0 T acpicbkbd_activate +ffffffff82a61140 T acpicbkbd_get_backlight +ffffffff82a611c0 T acpicbkbd_set_backlight +ffffffff82a61270 T acpicbkbd_write_backlight +ffffffff82a62000 T acpials_match +ffffffff82a62090 T acpials_attach +ffffffff82a62280 T acpials_read +ffffffff82a62310 T acpials_addtask +ffffffff82a62350 T acpials_notify +ffffffff82a623e0 T acpials_update +ffffffff82a63000 T tpm_match +ffffffff82a63050 T tpm_attach +ffffffff82a633a0 T tpm_activate +ffffffff82a633f0 T tpm2_start_method +ffffffff82a63480 T tpm_probe +ffffffff82a63570 T tpm_init_tis +ffffffff82a63840 T tpm_init_crb +ffffffff82a63c30 T tpm_suspend +ffffffff82a63d60 T tpm_resume +ffffffff82a63d90 T tpm_write_tis +ffffffff82a641e0 T tpm_read_tis +ffffffff82a643f0 T tpm_write_crb +ffffffff82a648c0 T tpm_read_crb +ffffffff82a64c60 T tpm_request_locality_tis +ffffffff82a64d80 T tpm_request_locality_crb +ffffffff82a64ec0 T tpm_release_locality_crb +ffffffff82a64f20 T tpm_release_locality_tis +ffffffff82a64f90 T tpm_getburst +ffffffff82a65050 T tpm_status +ffffffff82a65070 T tpm_waitfor +ffffffff82a65160 T tpm_waitfor_status +ffffffff82a66000 T acpihve_match +ffffffff82a660d0 T acpihve_attach +ffffffff82a67000 T acpisbs_match +ffffffff82a67030 T acpisbs_attach +ffffffff82a67320 T acpisbs_activate +ffffffff82a67410 T acpisbs_read +ffffffff82a674e0 T acpisbs_setup_sensors +ffffffff82a67610 T acpisbs_refresh_sensors +ffffffff82a67760 T acpisbs_notify +ffffffff82a678c0 T acpi_smbus_read +ffffffff82a68000 T surface_match +ffffffff82a68060 T surface_attach +ffffffff82a680c0 T surface_hotkey +ffffffff82a69000 T ipmi_acpi_match +ffffffff82a69030 T ipmi_acpi_attach +ffffffff82a692b0 T ipmi_acpi_parse_crs +ffffffff82a6a000 T amdgpio_match +ffffffff82a6a060 T amdgpio_attach +ffffffff82a6a330 T amdgpio_activate +ffffffff82a6a430 T amdgpio_intr +ffffffff82a6a610 T amdgpio_read_pin +ffffffff82a6a670 T amdgpio_write_pin +ffffffff82a6a6f0 T amdgpio_intr_establish +ffffffff82a6a7f0 T amdgpio_intr_enable +ffffffff82a6a880 T amdgpio_intr_disable +ffffffff82a6a910 T amdgpio_save +ffffffff82a6a9a0 T amdgpio_restore +ffffffff82a6aa40 T amdgpio_save_pin +ffffffff82a6aab0 T amdgpio_restore_pin +ffffffff82a6ab20 T amdgpio_pin_intr +ffffffff82a6b000 T acpihid_match +ffffffff82a6b030 T acpihid_attach +ffffffff82a6b270 T acpihid_init_dsm +ffffffff82a6b400 T acpihid_eval +ffffffff82a6b650 T acpihid_notify +ffffffff82a6b6c0 T acpihid_button_array_enable +ffffffff82a6c000 t iosf_acpi_match +ffffffff82a6c050 t iosf_acpi_attach +ffffffff82a6c170 t iosf_acpi_mbi_mdr_rd +ffffffff82a6c1f0 t iosf_acpi_mbi_mdr_wr +ffffffff82a6d000 T intelpmc_match +ffffffff82a6d030 T intelpmc_attach +ffffffff82a6d110 T intelpmc_activate +ffffffff82a6d320 T intelpmc_parse_lpit +ffffffff82a6d490 T intelpmc_suspend +ffffffff82a6d840 T intelpmc_resume +ffffffff82a6dbf0 T intelpmc_dsm +ffffffff82a6e000 T pckbc_acpi_match +ffffffff82a6e060 T pckbc_acpi_attach +ffffffff82a6e0d0 T pckbc_acpi_activate +ffffffff82a6e190 T pckbc_acpi_find +ffffffff82a6e210 T pckbc_acpi_match_kbd +ffffffff82a6e3b0 T pckbc_acpi_match_mouse +ffffffff82a6e510 T pckbc_acpi_attach_kbd +ffffffff82a6e9d0 T pckbc_acpi_attach_mouse +ffffffff82a6edc0 T pckbc_acpi_crs_walk +ffffffff82a6ee80 T pckbc_acpi_getgpioirqcount +ffffffff82a6eef0 T pckbc_acpi_getgpioirqdata +ffffffff82a6efa0 T pckbc_acpi_register_gpio_intrs +ffffffff82a6f070 T pckbc_acpi_gpio_intr_wrapper +ffffffff82a70000 T acpi_match +ffffffff82a70070 T acpi_attach +ffffffff82a700b0 T acpi_probe +ffffffff82a702a0 T acpi_map +ffffffff82a703b0 T acpi_unmap +ffffffff82a70400 T acpi_bus_space_map +ffffffff82a70420 T acpi_bus_space_unmap +ffffffff82a70440 T acpi_intr_establish +ffffffff82a705a0 T acpi_intr_disestablish +ffffffff82a705b0 T acpi_scan +ffffffff82a70780 T acpi_acquire_glk +ffffffff82a707e0 T acpi_release_glk +ffffffff82a70830 T acpi_attach_machdep +ffffffff82a70a10 T acpi_sleep_cpu +ffffffff82a70bd0 T acpi_resume_cpu +ffffffff82a70d20 T sleep_mp +ffffffff82a70e20 T resume_mp +ffffffff82a70f20 T acpi_iommu_device_map +ffffffff82a71000 T hibernate_resume_machdep +ffffffff82a71050 T hibernate_drop_to_real_mode +ffffffff82a71060 T hibernate_activate_resume_pt_machdep +ffffffff82a710a0 T hibernate_switch_stack_machdep +ffffffff82a710e0 T hibernate_flush +ffffffff82a71110 T acpi_savecpu +ffffffff82a72000 T sleep_showstate +ffffffff82a72110 T sleep_setstate +ffffffff82a72170 T gosleep +ffffffff82a72340 T sleep_resume +ffffffff82a723d0 T suspend_finish +ffffffff82a73000 T acpiopen +ffffffff82a730d0 T acpiclose +ffffffff82a73170 T acpiioctl +ffffffff82a73300 T request_sleep +ffffffff82a73390 T acpi_filtdetach +ffffffff82a733f0 T acpi_filtread +ffffffff82a73430 T acpikqfilter +ffffffff82a74000 T acpipci_match +ffffffff82a74030 T acpipci_attach +ffffffff82a74370 T acpipci_osc +ffffffff82a744e0 T acpipci_parse_resources +ffffffff82a74610 T acpipci_attach_bus +ffffffff82a74850 T acpipci_print +ffffffff82a748d0 T acpipci_attach_busses +ffffffff82a75000 T efiopen +ffffffff82a75040 T eficlose +ffffffff82a75070 T efiioctl +ffffffff82a75110 T efiioc_get_table +ffffffff82a75280 T efiioc_var_get +ffffffff82a75530 T efiioc_var_next +ffffffff82a75760 T efiioc_var_set +ffffffff82a75a10 T efi_adapt_error +ffffffff82a76000 T efi_match +ffffffff82a76070 T efi_attach +ffffffff82a76390 T efi_map_runtime +ffffffff82a76520 T efi_enter +ffffffff82a765d0 T efi_leave +ffffffff82a76660 T efi_fault +ffffffff82a77000 T vmm_probe +ffffffff82a77060 T vmm_attach +ffffffff82a771b0 T vmm_activate +ffffffff82a77340 T vmmopen +ffffffff82a77390 T vmmclose +ffffffff82a773c0 T vm_find +ffffffff82a77500 T vmmioctl +ffffffff82a77840 T vm_create +ffffffff82a77bb0 T vm_get_info +ffffffff82a77e60 T vm_terminate +ffffffff82a78010 T vm_resetcpu +ffffffff82a78140 T vm_share_mem +ffffffff82a782b0 T pledge_ioctl_vmm +ffffffff82a78390 T vm_find_vcpu +ffffffff82a783f0 T vm_create_check_mem_ranges +ffffffff82a785b0 T vm_teardown +ffffffff82a78730 T vcpu_must_stop +ffffffff82a79000 T vmm_enabled +ffffffff82a79080 T vmm_attach_machdep +ffffffff82a79270 T vmm_quiesce_vmx +ffffffff82a79480 T vmm_activate_machdep +ffffffff82a79520 T vmm_stop +ffffffff82a79690 T vmm_start +ffffffff82a797b0 T vmmioctl_machdep +ffffffff82a79890 T vm_intr_pending +ffffffff82a79950 T pledge_ioctl_vmm_machdep +ffffffff82a79990 T vm_rwvmparams +ffffffff82a79b40 T vmm_init_pvclock +ffffffff82a79c20 T vm_rwregs +ffffffff82a79d60 T vcpu_readregs_vmx +ffffffff82a7a240 T vcpu_writeregs_vmx +ffffffff82a7a780 T vcpu_readregs_svm +ffffffff82a7ac30 T vcpu_writeregs_svm +ffffffff82a7b100 T start_vmm_on_cpu +ffffffff82a7b240 T stop_vmm_on_cpu +ffffffff82a7b2e0 T vmclear_on_cpu +ffffffff82a7b360 T vm_impl_init +ffffffff82a7b4f0 T vm_impl_deinit +ffffffff82a7b520 T vcpu_reload_vmcs_vmx +ffffffff82a7b6a0 T vcpu_reset_regs_svm +ffffffff82a7b970 T svm_setmsrbrw +ffffffff82a7ba80 T svm_setmsrbr +ffffffff82a7bb50 T svm_setmsrbw +ffffffff82a7bc30 T vmx_setmsrbr +ffffffff82a7bce0 T vmx_setmsrbw +ffffffff82a7bd90 T vmx_setmsrbrw +ffffffff82a7bea0 T svm_set_clean +ffffffff82a7bef0 T svm_set_dirty +ffffffff82a7bf40 T vcpu_reset_regs_vmx +ffffffff82a7c9b0 T vcpu_vmx_check_cap +ffffffff82a7cab0 T vcpu_vmx_compute_ctrl +ffffffff82a7cc90 T vcpu_init_vmx +ffffffff82a7d190 T vmm_alloc_vpid +ffffffff82a7d2a0 T vcpu_deinit_vmx +ffffffff82a7d3d0 T vcpu_reset_regs +ffffffff82a7d460 T vcpu_init_svm +ffffffff82a7d770 T vcpu_deinit_svm +ffffffff82a7d8e0 T vcpu_init +ffffffff82a7d9c0 T vmm_free_vpid +ffffffff82a7da30 T vcpu_deinit +ffffffff82a7da80 T vm_run +ffffffff82a7dc80 T vcpu_run_vmx +ffffffff82a7e760 T vcpu_run_svm +ffffffff82a7ee30 T vmm_fpurestore +ffffffff82a7ef00 T vmm_fpusave +ffffffff82a7ef90 T vmm_translate_gva +ffffffff82a7f2c0 T vmm_update_pvclock +ffffffff82a7f3d0 T vmx_get_exit_info +ffffffff82a7f450 T vmx_handle_exit +ffffffff82a7f8c0 T vmx_instruction_error_decode +ffffffff82a7fa90 T vmm_get_guest_cpu_cpl +ffffffff82a7fbc0 T vmx_handle_intr +ffffffff82a7fc60 T svm_handle_hlt +ffffffff82a7fcb0 T vmx_handle_hlt +ffffffff82a7fd80 T svm_handle_exit +ffffffff82a80100 T svm_handle_np_fault +ffffffff82a802a0 T vmm_handle_cpuid +ffffffff82a80990 T svm_handle_msr +ffffffff82a80c80 T svm_handle_xsetbv +ffffffff82a80d40 T svm_handle_inout +ffffffff82a80e50 T vmm_inject_ud +ffffffff82a80e90 T vmm_inject_db +ffffffff82a80ed0 T vmx_handle_np_fault +ffffffff82a81050 T vmx_handle_inout +ffffffff82a811f0 T vmx_handle_cr +ffffffff82a81430 T vmx_handle_rdmsr +ffffffff82a81530 T vmx_handle_wrmsr +ffffffff82a817e0 T vmx_handle_xsetbv +ffffffff82a818e0 T vmm_inject_gp +ffffffff82a81920 T vmm_get_guest_memtype +ffffffff82a819a0 T vmx_get_exit_qualification +ffffffff82a81a10 T vmx_get_guest_faulttype +ffffffff82a81ac0 T svm_get_guest_faulttype +ffffffff82a81af0 T svm_fault_page +ffffffff82a81b90 T vmx_fault_page +ffffffff82a81d20 T vmm_get_guest_cpu_mode +ffffffff82a81e30 T vmx_load_pdptes +ffffffff82a82150 T vmx_handle_cr0_write +ffffffff82a823b0 T vmx_handle_cr4_write +ffffffff82a82470 T vmm_handle_xsetbv +ffffffff82a82520 T vmx_handle_misc_enable_msr +ffffffff82a82580 T vmm_pat_is_valid +ffffffff82a82660 t vmm_handle_cpuid_0xd +ffffffff82a82760 T vmm_gpa_is_valid +ffffffff82a827d0 T vmx_exit_reason_decode +ffffffff82a82810 T svm_exit_reason_decode +ffffffff82a83620 T vcpu_state_decode +ffffffff82a84000 T vmm_dispatch_intr +ffffffff82a84030 T vmxon +ffffffff82a84060 T vmxoff +ffffffff82a84090 T vmclear +ffffffff82a840c0 T vmptrld +ffffffff82a840f0 T vmptrst +ffffffff82a84120 T vmwrite +ffffffff82a84150 T vmread +ffffffff82a84180 T invvpid +ffffffff82a8419b t invvpid_fail +ffffffff82a841a2 t invvpid_ret +ffffffff82a841c0 T invept +ffffffff82a841db t invept_fail +ffffffff82a841e2 t invept_ret +ffffffff82a84200 T vmx_enter_guest +ffffffff82a8422b t skip_init +ffffffff82a84298 t no_l1df_msr +ffffffff82a8429b t l1df_tlb_loop +ffffffff82a842b4 t l1df_tlb_done +ffffffff82a842bc t l1df_load_cache +ffffffff82a842d3 t done_flush +ffffffff82a84366 t do_resume +ffffffff82a843eb t fail_launch_or_resume +ffffffff82a8442d t fail_launch_unknown +ffffffff82a8443a t fail_launch_invalid_vmcs +ffffffff82a84447 t fail_launch_valid_vmcs +ffffffff82a84464 t vmx_exit_handler_asm +ffffffff82a84529 t restore_host +ffffffff82a84550 T svm_enter_guest +ffffffff82a846d2 t restore_host_svm +ffffffff82a85000 T sdmmc_match +ffffffff82a85060 T sdmmc_attach +ffffffff82a85400 T sdmmc_detach +ffffffff82a854c0 T sdmmc_activate +ffffffff82a85580 T sdmmc_discover_task +ffffffff82a85670 T sdmmc_create_thread +ffffffff82a856e0 T sdmmc_holds_root_device +ffffffff82a85740 T sdmmc_task_thread +ffffffff82a859c0 T sdmmc_needs_discover +ffffffff82a85a90 T sdmmc_del_task +ffffffff82a85b50 T sdmmc_card_detach +ffffffff82a85c60 T sdmmc_add_task +ffffffff82a85cf0 T sdmmc_card_attach +ffffffff82a85e60 T sdmmc_enable +ffffffff82a85ff0 T sdmmc_scan +ffffffff82a86090 T sdmmc_init +ffffffff82a861c0 T sdmmc_disable +ffffffff82a86350 T sdmmc_function_free +ffffffff82a86370 T sdmmc_delay +ffffffff82a863c0 T sdmmc_select_card +ffffffff82a86600 T sdmmc_set_bus_power +ffffffff82a867c0 T sdmmc_function_alloc +ffffffff82a86860 T sdmmc_app_command +ffffffff82a86a20 T sdmmc_mmc_command +ffffffff82a86ab0 T sdmmc_go_idle_state +ffffffff82a86be0 T sdmmc_send_if_cond +ffffffff82a86d50 T sdmmc_set_relative_addr +ffffffff82a87000 T sdmmc_cisptr +ffffffff82a870d0 T sdmmc_read_cis +ffffffff82a874b0 T sdmmc_print_cis +ffffffff82a876a0 T sdmmc_check_cis_quirks +ffffffff82a88000 T sdmmc_io_enable +ffffffff82a882f0 T sdmmc_io_reset +ffffffff82a88450 T sdmmc_io_send_op_cond +ffffffff82a885e0 T sdmmc_io_scan +ffffffff82a88760 T sdmmc_io_init +ffffffff82a888d0 T sdmmc_io_set_highspeed +ffffffff82a88bd0 T sdmmc_io_set_bus_width +ffffffff82a88ec0 T sdmmc_io_function_ready +ffffffff82a89070 T sdmmc_io_read_1 +ffffffff82a891f0 T sdmmc_io_function_enable +ffffffff82a89690 T sdmmc_io_write_1 +ffffffff82a89830 T sdmmc_io_function_disable +ffffffff82a89b10 T sdmmc_io_attach +ffffffff82a89c00 T sdmmc_print +ffffffff82a89ec0 T sdmmc_submatch +ffffffff82a89f50 T sdmmc_io_detach +ffffffff82a8a010 T sdmmc_io_rw_direct +ffffffff82a8a1e0 T sdmmc_io_rw_extended_subr +ffffffff82a8a390 T sdmmc_io_rw_extended +ffffffff82a8a7d0 T sdmmc_io_read_2 +ffffffff82a8a940 T sdmmc_io_write_2 +ffffffff82a8aac0 T sdmmc_io_read_4 +ffffffff82a8ac30 T sdmmc_io_write_4 +ffffffff82a8adb0 T sdmmc_io_read_multi_1 +ffffffff82a8aeb0 T sdmmc_io_write_multi_1 +ffffffff82a8afb0 T sdmmc_io_read_region_1 +ffffffff82a8b0b0 T sdmmc_io_write_region_1 +ffffffff82a8b1b0 T sdmmc_io_xchg +ffffffff82a8b370 T sdmmc_intr_enable +ffffffff82a8b650 T sdmmc_intr_disable +ffffffff82a8b930 T sdmmc_intr_establish +ffffffff82a8ba50 T sdmmc_intr_disestablish +ffffffff82a8bb50 T sdmmc_card_intr +ffffffff82a8bba0 T sdmmc_intr_task +ffffffff82a8bc60 T sdmmc_io_set_blocklen +ffffffff82a8c000 T sdmmc_mem_enable +ffffffff82a8c4d0 T sdmmc_mem_send_op_cond +ffffffff82a8c6b0 T sdmmc_mem_signal_voltage +ffffffff82a8c7b0 T sdmmc_mem_scan +ffffffff82a8cb00 T sdmmc_decode_csd +ffffffff82a8cf50 T sdmmc_decode_cid +ffffffff82a8d400 T sdmmc_mem_send_scr +ffffffff82a8d560 T sdmmc_mem_decode_scr +ffffffff82a8d5c0 T sdmmc_mem_send_cxd_data +ffffffff82a8d740 T sdmmc_mem_set_bus_width +ffffffff82a8d870 T sdmmc_mem_sd_switch +ffffffff82a8db30 T sdmmc_be512_to_bitfield512 +ffffffff82a8dbe0 T sdmmc_mem_mmc_switch +ffffffff82a8dcd0 T sdmmc_mem_init +ffffffff82a8de60 T sdmmc_mem_set_blocklen +ffffffff82a8df70 T sdmmc_mem_sd_init +ffffffff82a8e3e0 T sdmmc_mem_mmc_init +ffffffff82a8eb60 T sdmmc_mem_select_transfer_mode +ffffffff82a8ebe0 T sdmmc_mem_execute_tuning +ffffffff82a8ec70 T sdmmc_mem_read_block_subr +ffffffff82a8f000 T sdmmc_mem_single_read_block +ffffffff82a8f0d0 T sdmmc_mem_read_block +ffffffff82a8f2e0 T sdmmc_mem_write_block_subr +ffffffff82a8f660 T sdmmc_mem_single_write_block +ffffffff82a8f730 T sdmmc_mem_write_block +ffffffff82a8f940 T sdmmc_mem_hibernate_write +ffffffff82a90000 T sdmmc_scsi_cmd +ffffffff82a90200 T sdmmc_minphys +ffffffff82a90280 T sdmmc_scsi_attach +ffffffff82a904c0 T sdmmc_alloc_ccbs +ffffffff82a90620 T sdmmc_free_ccbs +ffffffff82a90680 T sdmmc_scsi_detach +ffffffff82a90840 T sdmmc_stimeout +ffffffff82a908e0 T sdmmc_ccb_alloc +ffffffff82a909a0 T sdmmc_ccb_free +ffffffff82a90aa0 T sdmmc_inquiry +ffffffff82a90d30 T sdmmc_start_xs +ffffffff82a90e50 T sdmmc_complete_xs +ffffffff82a90f40 T sdmmc_done_xs +ffffffff82a90f90 T sdmmc_scsi_hibernate_io +ffffffff82a92000 T bwfm_sdio_preinit +ffffffff82a925a0 T bwfm_sdio_txcheck +ffffffff82a925e0 T bwfm_sdio_txdata +ffffffff82a92660 T bwfm_sdio_txctl +ffffffff82a927f0 T bwfm_sdio_buscore_read +ffffffff82a92800 T bwfm_sdio_buscore_write +ffffffff82a92820 T bwfm_sdio_buscore_prepare +ffffffff82a929a0 T bwfm_sdio_buscore_activate +ffffffff82a92a30 T bwfm_sdio_match +ffffffff82a92ae0 T bwfm_sdio_attach +ffffffff82a92e80 T bwfm_sdio_detach +ffffffff82a92f00 T bwfm_sdio_task +ffffffff82a930c0 T bwfm_sdio_write_1 +ffffffff82a930f0 T bwfm_sdio_read_1 +ffffffff82a93120 T bwfm_sdio_write_4 +ffffffff82a931f0 T bwfm_sdio_read_4 +ffffffff82a932b0 T bwfm_sdio_load_microcode +ffffffff82a935a0 T bwfm_sdio_clkctl +ffffffff82a936d0 T bwfm_sdio_dev_write +ffffffff82a93720 T bwfm_sdio_intr +ffffffff82a93770 T bwfm_sdio_ram_read_write +ffffffff82a939f0 T bwfm_sdio_htclk +ffffffff82a93cb0 T bwfm_sdio_readshared +ffffffff82a93da0 T bwfm_sdio_dev_read +ffffffff82a93de0 T bwfm_sdio_rx_frames +ffffffff82a94210 T bwfm_sdio_tx_frames +ffffffff82a94330 T bwfm_sdio_backplane +ffffffff82a94400 T bwfm_sdio_buf_read +ffffffff82a94500 T bwfm_sdio_buf_write +ffffffff82a945d0 T bwfm_sdio_frame_read_write +ffffffff82a94780 T bwfm_sdio_newbuf +ffffffff82a94810 T bwfm_sdio_tx_ok +ffffffff82a94870 T bwfm_sdio_tx_ctrlframe +ffffffff82a94980 T bwfm_sdio_tx_dataframe +ffffffff82a94af0 T bwfm_sdio_rx_glom +ffffffff82a95000 T onewire_match +ffffffff82a95060 T onewire_attach +ffffffff82a95120 T onewire_detach +ffffffff82a951a0 T onewire_activate +ffffffff82a951c0 T onewire_scan +ffffffff82a95410 T onewire_createthread +ffffffff82a95480 T onewire_print +ffffffff82a95570 T onewirebus_print +ffffffff82a955c0 T onewire_lock +ffffffff82a955e0 T onewire_unlock +ffffffff82a95600 T onewire_reset +ffffffff82a95620 T onewire_bit +ffffffff82a95640 T onewire_read_byte +ffffffff82a957d0 T onewire_write_byte +ffffffff82a958e0 T onewire_read_block +ffffffff82a95980 T onewire_write_block +ffffffff82a95a20 T onewire_triplet +ffffffff82a95b30 T onewire_matchrom +ffffffff82a95d20 T onewire_search +ffffffff82a96190 T onewire_thread +ffffffff82a97000 T onewire_crc +ffffffff82a970b0 T onewire_crc16 +ffffffff82a97170 T onewire_famname +ffffffff82a971b0 T onewire_matchbyfam +ffffffff82a98000 T owid_match +ffffffff82a98030 T owid_attach +ffffffff82a98120 T owid_detach +ffffffff82a98170 T owid_activate +ffffffff82a99000 T owsbm_match +ffffffff82a99030 T owsbm_attach +ffffffff82a99240 T owsbm_detach +ffffffff82a992d0 T owsbm_activate +ffffffff82a99300 T owsbm_update +ffffffff82a9a000 T owtemp_match +ffffffff82a9a030 T owtemp_attach +ffffffff82a9a160 T owtemp_detach +ffffffff82a9a1f0 T owtemp_activate +ffffffff82a9a220 T owtemp_update +ffffffff82a9b000 T owctr_match +ffffffff82a9b030 T owctr_attach +ffffffff82a9b1c0 T owctr_detach +ffffffff82a9b250 T owctr_activate +ffffffff82a9b280 T owctr_update +ffffffff82a9b2c0 T owctr_update_counter +ffffffff82a9c000 A __text_page_start +ffffffff82a9c000 T Xsyscall_meltdown +ffffffff82a9c00c T Xsyscall +ffffffff82a9c299 t Xsyscall_trampback +ffffffff82a9c2b0 T intr_user_exit +ffffffff82a9c2f2 t intr_user_exit_post_ast +ffffffff82a9c44b t Xiretq_trampback +ffffffff82a9c457 T doreti_iret +ffffffff82a9d000 T alltraps +ffffffff82a9d138 T recall_trap +ffffffff82a9d150 T alltraps_kern +ffffffff82a9d153 T alltraps_kern_meltdown +ffffffff82a9e000 ? Xtrap00 +ffffffff82a9e000 A __kutext_start +ffffffff82a9e000 A __text_page_end +ffffffff82a9e010 ? Xtrap01 +ffffffff82a9e020 ? Xtrap02 +ffffffff82a9e028 c calltrap_specstk +ffffffff82a9e0f0 ? calltrap_specstk_tramp +ffffffff82a9e110 ? Xtrap03 +ffffffff82a9e120 ? Xtrap04 +ffffffff82a9e130 ? Xtrap05 +ffffffff82a9e140 ? Xtrap06 +ffffffff82a9e150 ? Xtrap07 +ffffffff82a9e160 ? Xtrap08 +ffffffff82a9e170 ? Xtrap09 +ffffffff82a9e180 ? Xtrap0a +ffffffff82a9e190 ? Xtrap0b +ffffffff82a9e1a0 ? Xtrap0c +ffffffff82a9e1b0 ? Xtrap0d +ffffffff82a9e240 ? Xtrap0e +ffffffff82a9e250 ? Xintrspurious +ffffffff82a9e250 ? Xtrap0f +ffffffff82a9e260 ? Xtrap10 +ffffffff82a9e270 ? Xtrap11 +ffffffff82a9e280 ? Xtrap12 +ffffffff82a9e290 ? Xtrap13 +ffffffff82a9e2a0 ? Xtrap14 +ffffffff82a9e2b0 ? Xtrap15 +ffffffff82a9e2c0 ? Xtrap16 +ffffffff82a9e2c0 ? Xtrap17 +ffffffff82a9e2c0 ? Xtrap18 +ffffffff82a9e2c0 ? Xtrap19 +ffffffff82a9e2c0 ? Xtrap1a +ffffffff82a9e2c0 ? Xtrap1b +ffffffff82a9e2c0 ? Xtrap1c +ffffffff82a9e2c0 ? Xtrap1d +ffffffff82a9e2c0 ? Xtrap1e +ffffffff82a9e2c0 ? Xtrap1f +ffffffff82a9e2d0 ? x2apic_eoi +ffffffff82a9e2f0 ? Xintr_lapic_ipi +ffffffff82a9e330 ? Xipi_invltlb +ffffffff82a9e360 ? Xipi_invept +ffffffff82a9e3a0 ? Xipi_invlpg +ffffffff82a9e3d0 ? Xipi_invlrange +ffffffff82a9e410 ? Xipi_invltlb_pcid +ffffffff82a9e450 ? Xipi_invlpg_pcid +ffffffff82a9e4a0 ? Xipi_invlrange_pcid +ffffffff82a9e510 ? Xipi_wbinvd +ffffffff82a9e530 ? Xintr_lapic_ltimer +ffffffff82a9e570 ? Xintr_xen_upcall +ffffffff82a9e5b0 ? Xintr_hyperv_upcall +ffffffff82a9e5f0 ? Xintr_legacy0 +ffffffff82a9e630 ? Xintr_legacy1 +ffffffff82a9e670 ? Xintr_legacy2 +ffffffff82a9e6b0 ? Xintr_legacy3 +ffffffff82a9e6f0 ? Xintr_legacy4 +ffffffff82a9e730 ? Xintr_legacy5 +ffffffff82a9e770 ? Xintr_legacy6 +ffffffff82a9e7b0 ? Xintr_legacy7 +ffffffff82a9e7f0 ? Xintr_legacy8 +ffffffff82a9e830 ? Xintr_legacy9 +ffffffff82a9e870 ? Xintr_legacy10 +ffffffff82a9e8b0 ? Xintr_legacy11 +ffffffff82a9e8f0 ? Xintr_legacy12 +ffffffff82a9e930 ? Xintr_legacy13 +ffffffff82a9e970 ? Xintr_legacy14 +ffffffff82a9e9b0 ? Xintr_legacy15 +ffffffff82a9e9f0 ? Xintr_ioapic_edge0 +ffffffff82a9ea30 ? Xintr_ioapic_edge1 +ffffffff82a9ea70 ? Xintr_ioapic_edge2 +ffffffff82a9eab0 ? Xintr_ioapic_edge3 +ffffffff82a9eaf0 ? Xintr_ioapic_edge4 +ffffffff82a9eb30 ? Xintr_ioapic_edge5 +ffffffff82a9eb70 ? Xintr_ioapic_edge6 +ffffffff82a9ebb0 ? Xintr_ioapic_edge7 +ffffffff82a9ebf0 ? Xintr_ioapic_edge8 +ffffffff82a9ec30 ? Xintr_ioapic_edge9 +ffffffff82a9ec70 ? Xintr_ioapic_edge10 +ffffffff82a9ecb0 ? Xintr_ioapic_edge11 +ffffffff82a9ecf0 ? Xintr_ioapic_edge12 +ffffffff82a9ed30 ? Xintr_ioapic_edge13 +ffffffff82a9ed70 ? Xintr_ioapic_edge14 +ffffffff82a9edb0 ? Xintr_ioapic_edge15 +ffffffff82a9edf0 ? Xintr_ioapic_edge16 +ffffffff82a9ee30 ? Xintr_ioapic_edge17 +ffffffff82a9ee70 ? Xintr_ioapic_edge18 +ffffffff82a9eeb0 ? Xintr_ioapic_edge19 +ffffffff82a9eef0 ? Xintr_ioapic_edge20 +ffffffff82a9ef30 ? Xintr_ioapic_edge21 +ffffffff82a9ef70 ? Xintr_ioapic_edge22 +ffffffff82a9efb0 ? Xintr_ioapic_edge23 +ffffffff82a9eff0 ? Xintr_ioapic_edge24 +ffffffff82a9f030 ? Xintr_ioapic_edge25 +ffffffff82a9f070 ? Xintr_ioapic_edge26 +ffffffff82a9f0b0 ? Xintr_ioapic_edge27 +ffffffff82a9f0f0 ? Xintr_ioapic_edge28 +ffffffff82a9f130 ? Xintr_ioapic_edge29 +ffffffff82a9f170 ? Xintr_ioapic_edge30 +ffffffff82a9f1b0 ? Xintr_ioapic_edge31 +ffffffff82a9f1f0 ? Xintr_ioapic_edge32 +ffffffff82a9f230 ? Xintr_ioapic_edge33 +ffffffff82a9f270 ? Xintr_ioapic_edge34 +ffffffff82a9f2b0 ? Xintr_ioapic_edge35 +ffffffff82a9f2f0 ? Xintr_ioapic_edge36 +ffffffff82a9f330 ? Xintr_ioapic_edge37 +ffffffff82a9f370 ? Xintr_ioapic_edge38 +ffffffff82a9f3b0 ? Xintr_ioapic_edge39 +ffffffff82a9f3f0 ? Xintr_ioapic_edge40 +ffffffff82a9f430 ? Xintr_ioapic_edge41 +ffffffff82a9f470 ? Xintr_ioapic_edge42 +ffffffff82a9f4b0 ? Xintr_ioapic_edge43 +ffffffff82a9f4f0 ? Xintr_ioapic_edge44 +ffffffff82a9f530 ? Xintr_ioapic_edge45 +ffffffff82a9f570 ? Xintr_ioapic_edge46 +ffffffff82a9f5b0 ? Xintr_ioapic_edge47 +ffffffff82a9f5f0 ? Xintr_ioapic_edge48 +ffffffff82a9f630 ? Xintr_ioapic_edge49 +ffffffff82a9f670 ? Xintr_ioapic_edge50 +ffffffff82a9f6b0 ? Xintr_ioapic_edge51 +ffffffff82a9f6f0 ? Xintr_ioapic_edge52 +ffffffff82a9f730 ? Xintr_ioapic_edge53 +ffffffff82a9f770 ? Xintr_ioapic_edge54 +ffffffff82a9f7b0 ? Xintr_ioapic_edge55 +ffffffff82a9f7f0 ? Xintr_ioapic_edge56 +ffffffff82a9f830 ? Xintr_ioapic_edge57 +ffffffff82a9f870 ? Xintr_ioapic_edge58 +ffffffff82a9f8b0 ? Xintr_ioapic_edge59 +ffffffff82a9f8f0 ? Xintr_ioapic_edge60 +ffffffff82a9f930 ? Xintr_ioapic_edge61 +ffffffff82a9f970 ? Xintr_ioapic_edge62 +ffffffff82a9f9b0 ? Xintr_ioapic_edge63 +ffffffff82a9f9f0 ? Xintr_ioapic_level0 +ffffffff82a9fa30 ? Xintr_ioapic_level1 +ffffffff82a9fa70 ? Xintr_ioapic_level2 +ffffffff82a9fab0 ? Xintr_ioapic_level3 +ffffffff82a9faf0 ? Xintr_ioapic_level4 +ffffffff82a9fb30 ? Xintr_ioapic_level5 +ffffffff82a9fb70 ? Xintr_ioapic_level6 +ffffffff82a9fbb0 ? Xintr_ioapic_level7 +ffffffff82a9fbf0 ? Xintr_ioapic_level8 +ffffffff82a9fc30 ? Xintr_ioapic_level9 +ffffffff82a9fc70 ? Xintr_ioapic_level10 +ffffffff82a9fcb0 ? Xintr_ioapic_level11 +ffffffff82a9fcf0 ? Xintr_ioapic_level12 +ffffffff82a9fd30 ? Xintr_ioapic_level13 +ffffffff82a9fd70 ? Xintr_ioapic_level14 +ffffffff82a9fdb0 ? Xintr_ioapic_level15 +ffffffff82a9fdf0 ? Xintr_ioapic_level16 +ffffffff82a9fe30 ? Xintr_ioapic_level17 +ffffffff82a9fe70 ? Xintr_ioapic_level18 +ffffffff82a9feb0 ? Xintr_ioapic_level19 +ffffffff82a9fef0 ? Xintr_ioapic_level20 +ffffffff82a9ff30 ? Xintr_ioapic_level21 +ffffffff82a9ff70 ? Xintr_ioapic_level22 +ffffffff82a9ffb0 ? Xintr_ioapic_level23 +ffffffff82a9fff0 ? Xintr_ioapic_level24 +ffffffff82aa0030 ? Xintr_ioapic_level25 +ffffffff82aa0070 ? Xintr_ioapic_level26 +ffffffff82aa00b0 ? Xintr_ioapic_level27 +ffffffff82aa00f0 ? Xintr_ioapic_level28 +ffffffff82aa0130 ? Xintr_ioapic_level29 +ffffffff82aa0170 ? Xintr_ioapic_level30 +ffffffff82aa01b0 ? Xintr_ioapic_level31 +ffffffff82aa01f0 ? Xintr_ioapic_level32 +ffffffff82aa0230 ? Xintr_ioapic_level33 +ffffffff82aa0270 ? Xintr_ioapic_level34 +ffffffff82aa02b0 ? Xintr_ioapic_level35 +ffffffff82aa02f0 ? Xintr_ioapic_level36 +ffffffff82aa0330 ? Xintr_ioapic_level37 +ffffffff82aa0370 ? Xintr_ioapic_level38 +ffffffff82aa03b0 ? Xintr_ioapic_level39 +ffffffff82aa03f0 ? Xintr_ioapic_level40 +ffffffff82aa0430 ? Xintr_ioapic_level41 +ffffffff82aa0470 ? Xintr_ioapic_level42 +ffffffff82aa04b0 ? Xintr_ioapic_level43 +ffffffff82aa04f0 ? Xintr_ioapic_level44 +ffffffff82aa0530 ? Xintr_ioapic_level45 +ffffffff82aa0570 ? Xintr_ioapic_level46 +ffffffff82aa05b0 ? Xintr_ioapic_level47 +ffffffff82aa05f0 ? Xintr_ioapic_level48 +ffffffff82aa0630 ? Xintr_ioapic_level49 +ffffffff82aa0670 ? Xintr_ioapic_level50 +ffffffff82aa06b0 ? Xintr_ioapic_level51 +ffffffff82aa06f0 ? Xintr_ioapic_level52 +ffffffff82aa0730 ? Xintr_ioapic_level53 +ffffffff82aa0770 ? Xintr_ioapic_level54 +ffffffff82aa07b0 ? Xintr_ioapic_level55 +ffffffff82aa07f0 ? Xintr_ioapic_level56 +ffffffff82aa0830 ? Xintr_ioapic_level57 +ffffffff82aa0870 ? Xintr_ioapic_level58 +ffffffff82aa08b0 ? Xintr_ioapic_level59 +ffffffff82aa08f0 ? Xintr_ioapic_level60 +ffffffff82aa0930 ? Xintr_ioapic_level61 +ffffffff82aa0970 ? Xintr_ioapic_level62 +ffffffff82aa09b0 ? Xintr_ioapic_level63 +ffffffff82aa1000 ? codepatch_fill_nop +ffffffff82aa1000 A __cptext_start +ffffffff82aa1000 A __kutext_end +ffffffff82aa10b0 ? codepatch_maprw +ffffffff82aa11c0 ? codepatch_unmaprw +ffffffff82aa1230 ? codepatch_nop +ffffffff82aa13b0 ? codepatch_replace +ffffffff82aa1580 ? codepatch_call +ffffffff82aa15a0 ? codepatch_control_flow +ffffffff82aa17c0 ? codepatch_jmp +ffffffff82aa2000 A __cptext_end +ffffffff82aa2000 A __rodata_start +ffffffff82aa2000 C _etext +ffffffff82aa2000 C etext +ffffffff82aa3000 r seeprom_read +ffffffff82aa3004 r icl_mg_pll_find_divisors.div1_vals +ffffffff82aa3044 r athn_ac2qid +ffffffff82aa3044 r athn_ac2qid +ffffffff82aa3044 r athn_ac2qid +ffffffff82aa3054 r rtwn_get_rssi.cckoff +ffffffff82aa3088 r rsu_ac2qid +ffffffff82aa3098 r pckbc_portcmd +ffffffff82aa309c r tht_fifo_write_pad.pad +ffffffff82aa30a4 r rsu_get_rssi.cckoff +ffffffff82aa312c r jsl_ehl_revids +ffffffff82aa3138 r apple_iso_trans +ffffffff82aa3144 r wihap_check_tx.txratetable +ffffffff82aa314c r dmamode +ffffffff82aa317c r dg2_g12_revid_step_tbl +ffffffff82aa317c r gen9_edram_size_mb.sets +ffffffff82aa4000 r isomappings +ffffffff82aa4080 r unimappings +ffffffff82aa4230 r replacements +ffffffff82aa7b79 r apollo_pio_rec +ffffffff82b003c1 r apollo_udma33_tim +ffffffff82b17fc7 r pp_r600_decoded_lanes +ffffffff82b556b8 r cmd680_setup_channel.udma_tbl +ffffffff82b5edfb r apollo_udma100_tim +ffffffff82b5ee01 r cmd0646_9_tim_udma +ffffffff82b70093 r substchar +ffffffff82bd1eab r apollo_udma133_tim +ffffffff82bd1eb2 r apollo_udma66_tim +ffffffff82bd1edc r cy_pio_rec +ffffffff82bd87a8 R drm_ca +ffffffff82bd87d0 R drm_filtops +ffffffff82bd8800 R drmread_filtops +ffffffff82bd9000 r vga_emulops +ffffffff82bd9048 R vga_stdscreen +ffffffff82bd9078 R vga_stdscreen_mono +ffffffff82bd90a8 R vga_stdscreen_bf +ffffffff82bd90d8 R vga_40lscreen +ffffffff82bd9108 R vga_40lscreen_mono +ffffffff82bd9138 R vga_40lscreen_bf +ffffffff82bd9168 R vga_50lscreen +ffffffff82bd9198 R vga_50lscreen_mono +ffffffff82bd91c8 R vga_50lscreen_bf +ffffffff82bd91f8 R vga_screenlist +ffffffff82bd9208 R vga_screenlist_mono +ffffffff82bd9218 R vga_accessops +ffffffff82bd9278 r i945_wm_info +ffffffff82bd92d8 r bgansitopc +ffffffff82bd92e0 r pctoansi +ffffffff82bd9318 r tgl_uy_revids +ffffffff82bd9340 r sdma_offsets +ffffffff82bd9340 r sdma_offsets +ffffffff82bd9390 r iha_rate_tbl +ffffffff82bd93c8 r i830_a_wm_info +ffffffff82bd9410 r glk_revids +ffffffff82bd9418 r gen9_edram_size_mb.ways +ffffffff82bd94a8 r aggr_periodic_times +ffffffff82bd95a8 r michael_final.pad +ffffffff82bd95d0 r rt_copysa.maskarray +ffffffff82bd95d8 r i915_wm_info +ffffffff82bd95e0 r amdgpu_ih_clientid_jpeg +ffffffff82bd95e0 r amdgpu_ih_clientid_jpeg +ffffffff82bd95e0 r amdgpu_ih_clientid_uvds +ffffffff82bd95e0 r amdgpu_ih_clientid_vcns +ffffffff82bd95e0 r amdgpu_ih_clientid_vcns +ffffffff82bd95e0 r amdgpu_ih_clientid_vcns +ffffffff82bd95e0 r amdgpu_ih_clientid_vcns +ffffffff82bd95e0 r amdgpu_ih_clientid_vcns +ffffffff82bd9628 r vga_setfontset.cmaptabb +ffffffff82bd96b8 r i830_bc_wm_info +ffffffff82bd9730 r hsw_activate_psr2.map +ffffffff82bd9788 r __drm_universal_plane_init.default_modifiers +ffffffff82bd97a0 r iwn_tid2fifo +ffffffff82bd97b8 r vga_setfontset.cmaptaba +ffffffff82bd97c0 r crtc_offsets +ffffffff82bd97c0 r crtc_offsets +ffffffff82bd97c0 r crtc_offsets +ffffffff82bd9890 r rtwn_r88e_get_rssi.cckoff +ffffffff82bda000 R edid_vendors +ffffffff82bda2c0 R edid_nvendors +ffffffff82bda2d0 R edid_products +ffffffff82bda330 R edid_nproducts +ffffffff82bda340 r _edid_modes +ffffffff82bdb000 R videomode_list +ffffffff82bdc140 R videomode_count +ffffffff82bdd000 r ahc_hard_errors +ffffffff82bdd080 r critical_sections +ffffffff82bdd0b0 r patches +ffffffff82bddd50 r seqprog +ffffffff82bdf000 r ahc_switch +ffffffff82be0000 r termstat_strings +ffffffff82be0020 r critical_sections +ffffffff82be0060 r seqprog +ffffffff82be0d50 r patches +ffffffff82be2000 r ahd_switch +ffffffff82be3000 R aic_switch +ffffffff82be4000 R adw_switch +ffffffff82be5000 R gdt_switch +ffffffff82be6000 R twe_switch +ffffffff82be7000 R ciss_switch +ffffffff82be7030 R ciss_level +ffffffff82be7050 R ciss_stat +ffffffff82be8000 R ami_switch +ffffffff82be8028 R ami_raw_switch +ffffffff82be9000 R mfi_switch +ffffffff82be9028 R mfi_pd_switch +ffffffff82be9050 r mfi_iop_xscale +ffffffff82be9080 r mfi_iop_ppc +ffffffff82be90b0 r mfi_iop_gen2 +ffffffff82be90e0 r mfi_iop_skinny +ffffffff82be9110 r mfi_bbu_indicators +ffffffff82bea000 R qlw_switch +ffffffff82beb000 R isp_2100_risc_code +ffffffff82bfdbf0 R isp_2200_risc_code +ffffffff82c10990 R isp_2300_risc_code +ffffffff82c2a408 R qla_switch +ffffffff82c2a430 r qla_regs_2100 +ffffffff82c2a460 r qla_regs_2200 +ffffffff82c2a490 r qla_regs_23XX +ffffffff82c2b000 R ahci_atascsi_methods +ffffffff82c2c000 R nvme_switch +ffffffff82c2c028 r nvme_ops +ffffffff82c2d000 R mpi_switch +ffffffff82c2d060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff82c2d0a0 r chv_oa_mux_regs +ffffffff82c2d0d0 r fiji_clock_stretcher_lookup_table +ffffffff82c2d0d0 r tonga_clock_stretcher_lookup_table +ffffffff82c2d0f0 r iosf_pci_devices +ffffffff82c2d100 r icl_revids +ffffffff82c2d120 r link_speed +ffffffff82c2d120 r link_speed +ffffffff82c2d160 r drm_fb_xfrm.default_dst_pitch +ffffffff82c2d160 r non_supported_protection +ffffffff82c2d2f0 r bwi_phy_noise_11g_rev1 +ffffffff82c2d360 r cardslot_process_event.antonym_ev +ffffffff82c2d400 r gen11_oa_mux_regs +ffffffff82c2d4b0 r dpia_to_preferred_enc_id_table +ffffffff82c2d4b0 r dpia_to_preferred_enc_id_table +ffffffff82c2d4b0 r dpia_to_preferred_enc_id_table +ffffffff82c2d500 r dummy_eth_header +ffffffff82c2d520 r ddr2_cycle_tenths +ffffffff82c2d590 r rtw_intr_rx.ratetbl +ffffffff82c2d610 r abm_config +ffffffff82c2d6a0 r getbootinfo.ports +ffffffff82c2d6f0 r reg_offsets +ffffffff82c2d710 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff82c2d720 r init_non_clock_fields.look_up +ffffffff82c2d730 r uftdi_8u232am_getrate.roundoff +ffffffff82c2d790 r zyd_rx_data.rates +ffffffff82c2d7b0 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff82c2d7f0 r intel_engine_init_tlb_invalidation.gen8_regs +ffffffff82c2d800 r kbl_revids +ffffffff82c2d840 r bwi_phy_noise_11g +ffffffff82c2d850 r hpt366_pio +ffffffff82c2d8b0 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff82c2d8d0 r ether_crc32_be_update.rev +ffffffff82c2d8d0 r rtw_grf5101_mac_crypt.caesar +ffffffff82c2d920 r snb_b_fdi_train_param +ffffffff82c2d9c0 r intel_hpll_vco.elk_vco +ffffffff82c2da20 r pin_offsets +ffffffff82c2da40 r amdgpu_ih_srcid_jpeg +ffffffff82c2da80 r firmware_list +ffffffff82c2dae0 r atom_arg_shift +ffffffff82c2dae0 r atom_arg_shift +ffffffff82c2db20 r pf_syncookie_wstab +ffffffff82c2db40 r ieee80211_media_init.mopts +ffffffff82c2dba0 r add_entropy_words.twist_table +ffffffff82c2dc40 r urtw_8225v2_txpwr_cck +ffffffff82c2dc60 r bwfm_pci_prio2fifo +ffffffff82c2dc60 r ieee80211_up_to_ac.up_to_ac +ffffffff82c2dd20 r paritytab +ffffffff82c2dd20 r x86emu_parity_tab +ffffffff82c2dd40 r legacy_connector_convert +ffffffff82c2dda0 r gen7_oa_mux_regs +ffffffff82c2ddc0 r hsw_oa_mux_regs +ffffffff82c2dde0 r notetab +ffffffff82c2de00 r urtw_8225v2_txpwr_cck_ch14 +ffffffff82c2de20 r bwi_rf_calibval.rf_calibvals +ffffffff82c2dee0 r pf_syncookie_msstab +ffffffff82c2df40 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff82c2df80 r uath_wme_init.uath_wme_11g +ffffffff82c2dfc0 r gen7_oa_b_counters +ffffffff82c2e1c0 r rtwn_iq_calib_run.reg_adda +ffffffff82c2e1e0 r nfs_backoff +ffffffff82c2e220 r atom_def_dst +ffffffff82c2e220 r atom_def_dst +ffffffff82c2e280 r sha256_initial_hash_value +ffffffff82c2e2e0 r otus_edca_def +ffffffff82c2e300 r intel_hpll_vco.blb_vco +ffffffff82c2e340 r aca_hwid_mcatypes +ffffffff82c2e400 r epic_pci_subsys_info +ffffffff82c2e420 r atom_arg_mask +ffffffff82c2e420 r atom_arg_mask +ffffffff82c2e480 r butmap +ffffffff82c2e4e0 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff82c2e520 r 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ac97_ym +ffffffff82c3eed0 R ac97_vendors +ffffffff82c3f1d0 R ac97enhancement +ffffffff82c3f2d0 R ac97feature +ffffffff82c40000 R lm_chips +ffffffff82c40020 R lm78_sensors +ffffffff82c401a0 R w83627hf_sensors +ffffffff82c403a0 R w83627ehf_sensors +ffffffff82c405c0 R w83627dhg_sensors +ffffffff82c407c0 R nct6776f_sensors +ffffffff82c40a00 R nct6779d_sensors +ffffffff82c40d60 R w83637hf_sensors +ffffffff82c40f20 R w83697hf_sensors +ffffffff82c410c0 R w83781d_sensors +ffffffff82c41280 R w83782d_sensors +ffffffff82c41480 R w83783s_sensors +ffffffff82c41600 R w83791d_sensors +ffffffff82c41860 R w83792d_sensors +ffffffff82c41ae0 R as99127f_sensors +ffffffff82c42000 r ar5k_known_products +ffffffff82c42110 r ar5111_gain_opt +ffffffff82c421e0 r ar5112_gain_opt +ffffffff82c422b0 r ar5k_5ghz_channels +ffffffff82c42a00 r ar5k_2ghz_channels +ffffffff82c42f10 r ar5111_rf +ffffffff82c43350 r ar5112a_rf +ffffffff82c43890 r ar5112_rf +ffffffff82c43da0 r ar5413_rf +ffffffff82c441b0 r ar2413_rf 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ar9160_1_0_addac +ffffffff82c4e108 r ar5416_2_2_addac +ffffffff82c4e118 r ar5416_2_1_addac +ffffffff82c4e128 r ar5416_set_power_calib.chainoffset +ffffffff82c4e140 r ar9160_bank6tpc_vals +ffffffff82c4e1c0 r ar5416_bank6tpc_vals +ffffffff82c4e240 r ar5416_bb_rfgain_vals_2g +ffffffff82c4e340 r ar5416_bb_rfgain_vals_5g +ffffffff82c4e440 r ar5416_bank6_vals +ffffffff82c4e4c0 r ar9160_regs +ffffffff82c4e540 r ar9160_vals_5g20 +ffffffff82c4e640 r ar9160_vals_5g40 +ffffffff82c4e740 r ar9160_vals_2g40 +ffffffff82c4e840 r ar9160_vals_2g20 +ffffffff82c4e940 r ar9160_cm_regs +ffffffff82c4ec30 r ar9160_cm_vals +ffffffff82c4f210 r ar5416_regs +ffffffff82c4f290 r ar5416_vals_5g20 +ffffffff82c4f390 r ar5416_vals_5g40 +ffffffff82c4f490 r ar5416_vals_2g40 +ffffffff82c4f590 r ar5416_vals_2g20 +ffffffff82c4f690 r ar5416_cm_regs +ffffffff82c4f980 r ar5416_cm_vals +ffffffff82c4ff60 r ar5416_serdes_regs +ffffffff82c4ff90 r ar5416_serdes_vals +ffffffff82c4ffc0 r ar9160_1_1_addac_vals +ffffffff82c50040 r ar9160_1_0_addac_vals +ffffffff82c500c0 r ar5416_2_2_addac_vals +ffffffff82c50150 r ar5416_2_1_addac_vals +ffffffff82c51000 r ar9280_2_0_ini +ffffffff82c51068 r ar9280_2_0_serdes +ffffffff82c51080 r ar9280_2_0_rx_gain_23db_backoff +ffffffff82c510a0 r ar9280_2_0_rx_gain_13db_backoff +ffffffff82c510c0 r ar9280_2_0_rx_gain +ffffffff82c510e0 r ar9280_2_0_tx_gain_high_power +ffffffff82c51100 r ar9280_2_0_tx_gain +ffffffff82c51120 r ar9280_init_from_rom.chainoffset +ffffffff82c51130 r ar9280_2_0_regs +ffffffff82c51190 r ar9280_2_0_vals_5g20 +ffffffff82c51250 r ar9280_2_0_vals_5g40 +ffffffff82c51310 r ar9280_2_0_vals_2g40 +ffffffff82c513d0 r ar9280_2_0_vals_2g20 +ffffffff82c51490 r ar9280_2_0_cm_regs +ffffffff82c51740 r ar9280_2_0_cm_vals +ffffffff82c51c90 r ar9280_2_0_fast_clock_regs +ffffffff82c51cb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff82c51cf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff82c51d30 r ar9280_2_0_serdes_regs +ffffffff82c51d60 r ar9280_2_0_serdes_vals +ffffffff82c51d90 r ar9280_2_0_rx_gain_regs +ffffffff82c51ea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff82c520b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff82c522c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff82c524d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff82c526e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff82c528f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff82c52b00 r ar9280_2_0_tx_gain_regs +ffffffff82c52b40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff82c52bc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff82c52c40 r ar9280_2_0_tx_gain_vals_5g +ffffffff82c52cc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff82c53000 r ar9271_ini +ffffffff82c53068 r ar9285_1_2_ini +ffffffff82c530d0 r ar9280_2_0_serdes +ffffffff82c530e8 r ar9271_tx_gain_high_power +ffffffff82c53108 r ar9271_tx_gain +ffffffff82c53128 r ar9285_2_0_tx_gain_high_power +ffffffff82c53148 r ar9285_2_0_tx_gain +ffffffff82c53168 r ar9285_1_2_tx_gain_high_power +ffffffff82c53188 r ar9285_1_2_tx_gain +ffffffff82c531b0 r ar9271_regs +ffffffff82c53410 r ar9271_vals_2g40 +ffffffff82c538d0 r ar9271_vals_2g20 +ffffffff82c53d90 r ar9271_cm_regs +ffffffff82c54020 r ar9271_cm_vals +ffffffff82c54540 r ar9285_1_2_regs +ffffffff82c547a0 r ar9285_1_2_vals_2g40 +ffffffff82c54c60 r ar9285_1_2_vals_2g20 +ffffffff82c55120 r ar9285_1_2_cm_regs +ffffffff82c553a0 r ar9285_1_2_cm_vals +ffffffff82c55890 r ar9280_2_0_serdes_regs +ffffffff82c558c0 r ar9280_2_0_serdes_vals +ffffffff82c558f0 r ar9271_tx_gain_regs +ffffffff82c55940 r ar9271_tx_gain_high_power_vals_2g +ffffffff82c559d0 r ar9271_tx_gain_vals_2g +ffffffff82c55a60 r ar9285_1_2_tx_gain_regs +ffffffff82c55ab0 r ar9285_2_0_tx_gain_high_power_vals_2g +ffffffff82c55b50 r ar9285_2_0_tx_gain_vals_2g +ffffffff82c55bf0 r ar9285_1_2_tx_gain_high_power_vals_2g +ffffffff82c55c90 r ar9285_1_2_tx_gain_vals_2g +ffffffff82c56000 r ar9287_1_1_ini +ffffffff82c56068 r ar9280_2_0_serdes +ffffffff82c56080 r ar9287_1_1_rx_gain +ffffffff82c560a0 r ar9287_1_1_tx_gain +ffffffff82c560c0 r ar9287_1_1_regs +ffffffff82c56120 r ar9287_1_1_vals_2g40 +ffffffff82c561d0 r ar9287_1_1_vals_2g20 +ffffffff82c56280 r ar9287_1_1_cm_regs +ffffffff82c56560 r ar9287_1_1_cm_vals +ffffffff82c56b20 r ar9280_2_0_serdes_regs +ffffffff82c56b50 r ar9280_2_0_serdes_vals +ffffffff82c56b80 r ar9287_1_1_rx_gain_regs +ffffffff82c56d90 r ar9287_1_1_rx_gain_vals_2g +ffffffff82c571a0 r ar9287_1_1_tx_gain_regs +ffffffff82c57200 r ar9287_1_1_tx_gain_vals_2g +ffffffff82c58000 r athn_rates +ffffffff82c59000 r ar9485_1_1_ini +ffffffff82c59068 r ar9485_1_1_serdes +ffffffff82c59080 r ar9380_2_2_ini +ffffffff82c590e8 r ar9380_2_2_serdes +ffffffff82c59100 r ar9380_2_2_rx_gain_wo_xlna +ffffffff82c59120 r ar9380_2_2_rx_gain +ffffffff82c59140 r ar9485_1_1_rx_gain +ffffffff82c59160 r ar9380_2_2_tx_gain_high_ob_db +ffffffff82c59180 r ar9380_2_2_tx_gain_low_ob_db +ffffffff82c591a0 r ar9380_2_2_tx_gain_high_power +ffffffff82c591c0 r ar9380_2_2_tx_gain +ffffffff82c591e0 r ar9485_1_1_tx_gain +ffffffff82c59200 r ar9485_1_1_regs +ffffffff82c59270 r ar9485_1_1_vals_2g40 +ffffffff82c59350 r ar9485_1_1_vals_2g20 +ffffffff82c59430 r ar9485_1_1_cm_regs +ffffffff82c59720 r ar9485_1_1_cm_vals +ffffffff82c59d00 r ar9485_1_1_serdes_regs +ffffffff82c59d0c r ar9485_1_1_serdes_vals +ffffffff82c59d20 r ar9380_2_2_regs +ffffffff82c59db0 r ar9380_2_2_vals_5g20 +ffffffff82c59ed0 r ar9380_2_2_vals_5g40 +ffffffff82c59ff0 r ar9380_2_2_vals_2g40 +ffffffff82c5a110 r ar9380_2_2_vals_2g20 +ffffffff82c5a230 r ar9380_2_2_cm_regs +ffffffff82c5a5d0 r ar9380_2_2_cm_vals +ffffffff82c5ad00 r ar9380_2_2_fast_clock_regs +ffffffff82c5ad20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff82c5ad50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff82c5ad74 r ar9380_2_2_serdes_regs +ffffffff82c5ad80 r ar9380_2_2_serdes_vals +ffffffff82c5ad90 r ar9380_2_2_rx_gain_regs +ffffffff82c5af90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff82c5b390 r ar9380_2_2_rx_gain_vals +ffffffff82c5b790 r ar9485_1_1_rx_gain_regs +ffffffff82c5b890 r ar9485_1_1_rx_gain_vals +ffffffff82c5ba90 r ar9380_2_2_tx_gain_regs +ffffffff82c5bb60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff82c5bd00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff82c5bea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff82c5c040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff82c5c1e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff82c5c380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff82c5c520 r ar9380_2_2_tx_gain_vals_5g +ffffffff82c5c6c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff82c5c860 r ar9485_1_1_tx_gain_regs +ffffffff82c5c8f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff82c5ca10 r ar9380_def_rom +ffffffff82c5ce50 r ar9380_def_rom_h112 +ffffffff82c5d290 r ar9380_def_rom_h116 +ffffffff82c5d6d0 r ar9380_def_rom_x112 +ffffffff82c5db10 r ar9380_def_rom_x113 +ffffffff82c5e000 R atw_txthresh_tab_lo +ffffffff82c5e050 R atw_txthresh_tab_hi +ffffffff82c5e0a0 r atw_attach.empty_macaddr +ffffffff82c5e0b0 r atw_attach.type_strings +ffffffff82c5e0d0 r atw_rfmd2958_ifn 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rtl8192ce_rf2_regs +ffffffff82c61500 r rtl8192ce_rf2_vals +ffffffff82c615a0 r rtl8192cu_txagc +ffffffff82c62000 r rt2560_rf2522_r2 +ffffffff82c62040 r rt2560_rf2524_r2 +ffffffff82c62080 r rt2560_rf2525_hi_r2 +ffffffff82c620c0 r rt2560_rf2525_r2 +ffffffff82c62100 r rt2560_rf2525e_r2 +ffffffff82c62140 r rt2560_rf2526_hi_r2 +ffffffff82c62180 r rt2560_rf2526_r2 +ffffffff82c621c0 r rt2560_def_bbp +ffffffff82c62200 r rt2560_def_mac +ffffffff82c63000 r rt2661_rf5225_1 +ffffffff82c63300 r rt2661_rf5225_2 +ffffffff82c63600 r rt2661_def_bbp +ffffffff82c63640 r rt2661_def_mac +ffffffff82c64000 r rt2860_rf2850 +ffffffff82c64430 r rt2860_rates +ffffffff82c644f0 r rt3572_def_rf +ffffffff82c64530 r rt3090_def_rf +ffffffff82c64560 r rt5392_def_rf +ffffffff82c645e0 r rt3290_def_rf +ffffffff82c64640 r rt5390_def_rf +ffffffff82c646c0 r rt5390_def_bbp +ffffffff82c646f0 r rt2860_def_mac +ffffffff82c66000 r acx111_reg +ffffffff82c66040 r acx111_rate_map +ffffffff82c67000 r acx100_reg +ffffffff82c67040 r acx100_txpower_rfmd +ffffffff82c67060 r gen8_rcs_offsets +ffffffff82c67090 r acx100_txpower_maxim +ffffffff82c670b0 r mtl_rcs_offsets +ffffffff82c670f0 r digits +ffffffff82c670f0 r pppdumpb.digits +ffffffff82c670f0 r pppdumpm.digits +ffffffff82c67140 r hangpic +ffffffff82c67180 r gen11_rcs_offsets +ffffffff82c671b0 r dg2_rcs_offsets +ffffffff82c671f0 r dg2_xcs_offsets +ffffffff82c67220 r gen12_xcs_offsets +ffffffff82c68000 r trinity_override_mgpg_sequences +ffffffff82c683c0 r voltage_swing_to_pre_emphasis +ffffffff82c683d0 r sgpr_init_compute_shader +ffffffff82c684a0 r intel_hpll_vco.cl_vco +ffffffff82c684c0 r vgpr_init_compute_shader +ffffffff82c69000 r malo_cmd_string.cmds +ffffffff82c690b0 r malo_cmd_string_result.results +ffffffff82c6a000 R bwi_vendor_led_act +ffffffff82c6a00c R bwi_default_led_act +ffffffff82c6a010 R bwi_led_duration +ffffffff82c6a380 r bwi_sup_bphy +ffffffff82c6a3c0 r bwi_phy_freq_11g_rev1 +ffffffff82c6a5c0 r bwi_phy_rotor_11g_rev1 +ffffffff82c6a6a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff82c6a6e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff82c6a720 r bwi_phy_noise_scale_11g +ffffffff82c6a760 r bwi_phy_sigma_sq_11g_rev2 +ffffffff82c6a7d0 r bwi_phy_sigma_sq_11g_rev7 +ffffffff82c6a840 r bwi_phy_delay_11g_rev1 +ffffffff82c6a920 r bwi_rf_get_gains.save_phy_regs +ffffffff82c6a940 r bwi_rf_lo_find.map +ffffffff82c6a960 r bwi_txpower_map_11b +ffffffff82c6a9a0 r bwi_txpower_map_11g +ffffffff82c6a9e0 r _bwi_rf_lo_update_11g.rf_atten_list +ffffffff82c6aa20 r _bwi_rf_lo_update_11g.rf_atten_init_list +ffffffff82c6aa60 r _bwi_rf_lo_update_11g.rf_lo_measure_order +ffffffff82c6aaa0 r bwi_rf_set_nrssi_ofs_11g.save_phy_comm_regs +ffffffff82c6aac0 r bwi_bbpid_map +ffffffff82c6aaf0 r bwi_regwin_count +ffffffff82c6ab40 r bwi_clkfreq +ffffffff82c6ab58 r bwi_zero_addr +ffffffff82c6b000 R ipq8074_ops +ffffffff82c6b070 R ipq6018_ops +ffffffff82c6b0e0 R qca6390_ops +ffffffff82c6b150 R qcn9074_ops +ffffffff82c6b1c0 R wcn6855_ops +ffffffff82c6b230 R wcn6750_ops +ffffffff82c6b2a0 R ath11k_hw_ring_mask_ipq8074 +ffffffff82c6b2f8 R ath11k_hw_ring_mask_qca6390 +ffffffff82c6b350 R ath11k_hw_ring_mask_qcn9074 +ffffffff82c6b3a8 R ath11k_hw_ring_mask_wcn6750 +ffffffff82c6b400 R ath11k_target_ce_config_wlan_ipq8074 +ffffffff82c6b510 R ath11k_target_service_to_ce_map_wlan_ipq8074 +ffffffff82c6b620 R ath11k_target_service_to_ce_map_wlan_ipq6018 +ffffffff82c6b710 R ath11k_target_ce_config_wlan_qca6390 +ffffffff82c6b7f0 R ath11k_target_service_to_ce_map_wlan_qca6390 +ffffffff82c6b8b0 R ath11k_target_ce_config_wlan_qcn9074 +ffffffff82c6b990 R ath11k_target_service_to_ce_map_wlan_qcn9074 +ffffffff82c6ba70 R qwx_host_ce_config_ipq8074 +ffffffff82c6bd10 R qwx_host_ce_config_qca6390 +ffffffff82c6be30 R qwx_host_ce_config_qcn9074 +ffffffff82c6bef0 R ipq8074_regs +ffffffff82c6bfc4 R qca6390_regs +ffffffff82c6c098 R qcn9074_regs +ffffffff82c6c16c R wcn6855_regs +ffffffff82c6c240 R wcn6750_regs +ffffffff82c6c320 R qmi_response_type_v01_ei +ffffffff82c6c380 R qmi_wlanfw_ind_register_req_msg_v01_ei +ffffffff82c6c6a0 R qmi_wlanfw_ind_register_resp_msg_v01_ei +ffffffff82c6c720 R qmi_wlanfw_host_cap_req_msg_v01_ei +ffffffff82c6caa0 R qmi_wlanfw_host_cap_resp_msg_v01_ei +ffffffff82c6cae0 R qmi_wlanfw_mem_cfg_s_v01_ei +ffffffff82c6cb60 R qmi_wlanfw_mem_seg_s_v01_ei +ffffffff82c6cc00 R qmi_wlanfw_request_mem_ind_msg_v01_ei +ffffffff82c6cc60 R qmi_wlanfw_mem_seg_resp_s_v01_ei +ffffffff82c6cd00 R qmi_wlanfw_respond_mem_req_msg_v01_ei +ffffffff82c6cd60 R qmi_wlanfw_respond_mem_resp_msg_v01_ei +ffffffff82c6cda0 R qmi_wlanfw_cap_req_msg_v01_ei +ffffffff82c6cdc0 R qmi_wlanfw_rf_chip_info_s_v01_ei +ffffffff82c6ce20 R qmi_wlanfw_rf_board_info_s_v01_ei +ffffffff82c6ce60 R qmi_wlanfw_soc_info_s_v01_ei +ffffffff82c6cea0 R qmi_wlanfw_fw_version_info_s_v01_ei +ffffffff82c6cf00 R qmi_wlanfw_cap_resp_msg_v01_ei +ffffffff82c6d1c0 R qmi_wlanfw_bdf_download_req_msg_v01_ei +ffffffff82c6d3a0 R qmi_wlanfw_bdf_download_resp_msg_v01_ei +ffffffff82c6d3e0 R qmi_wlanfw_m3_info_req_msg_v01_ei +ffffffff82c6d440 R qmi_wlanfw_m3_info_resp_msg_v01_ei +ffffffff82c6d480 R qmi_wlanfw_wlan_ini_req_msg_v01_ei +ffffffff82c6d4e0 R qmi_wlanfw_wlan_ini_resp_msg_v01_ei +ffffffff82c6d520 R qmi_wlanfw_ce_tgt_pipe_cfg_s_v01_ei +ffffffff82c6d5e0 R qmi_wlanfw_ce_svc_pipe_cfg_s_v01_ei +ffffffff82c6d660 R qmi_wlanfw_shadow_reg_cfg_s_v01_ei +ffffffff82c6d6c0 R qmi_wlanfw_shadow_reg_v2_cfg_s_v01_ei +ffffffff82c6d700 R qmi_wlanfw_wlan_mode_req_msg_v01_ei +ffffffff82c6d780 R qmi_wlanfw_wlan_mode_resp_msg_v01_ei +ffffffff82c6d7c0 R qmi_wlanfw_wlan_cfg_req_msg_v01_ei +ffffffff82c6d9a0 R qmi_wlanfw_wlan_cfg_resp_msg_v01_ei +ffffffff82c6d9e0 r wmi_tlv_policies +ffffffff82c6f740 r qwx_hw_mode_pri_map +ffffffff82c6f770 r ath11k_hw_params +ffffffff82c6fcf0 r hw_srng_config_templ +ffffffff82c6ffa8 r ath11k_hw_hal_params_ipq8074 +ffffffff82c6ffb8 r ath11k_hw_hal_params_qca6390 +ffffffff82c6ffc8 r ath11k_hw_hal_params_wcn6750 +ffffffff82c6ffd8 r ath11k_hw_tcl2wbm_rbm_map_ipq8074 +ffffffff82c6ffe1 r ath11k_hw_tcl2wbm_rbm_map_wcn6750 +ffffffff82c71000 R uhci_bus_methods +ffffffff82c71030 R uhci_root_ctrl_methods +ffffffff82c71060 R uhci_root_intr_methods +ffffffff82c71090 R uhci_device_ctrl_methods +ffffffff82c710c0 R uhci_device_intr_methods +ffffffff82c710f0 R uhci_device_bulk_methods +ffffffff82c71120 R uhci_device_isoc_methods +ffffffff82c71150 R uhci_devd +ffffffff82c71162 R uhci_confd +ffffffff82c7116b R uhci_ifcd +ffffffff82c71174 R uhci_endpd +ffffffff82c7117b R uhci_hubd_piix +ffffffff82c72000 R revbits +ffffffff82c72020 R ohci_bus_methods +ffffffff82c72050 R ohci_root_ctrl_methods +ffffffff82c72080 R ohci_root_intr_methods +ffffffff82c720b0 R ohci_device_ctrl_methods +ffffffff82c720e0 R ohci_device_intr_methods +ffffffff82c72110 R ohci_device_bulk_methods +ffffffff82c72140 R ohci_device_isoc_methods +ffffffff82c72170 R ohci_devd +ffffffff82c72182 R ohci_confd +ffffffff82c7218b R ohci_ifcd +ffffffff82c72194 R ohci_endpd +ffffffff82c7219b R ohci_hubd +ffffffff82c73000 R ehci_bus_methods +ffffffff82c73030 R ehci_root_ctrl_methods +ffffffff82c73060 R ehci_root_intr_methods +ffffffff82c73090 R ehci_device_ctrl_methods +ffffffff82c730c0 R ehci_device_intr_methods +ffffffff82c730f0 R ehci_device_bulk_methods +ffffffff82c73120 R ehci_device_isoc_methods +ffffffff82c73150 R ehci_devd +ffffffff82c73162 R ehci_odevd +ffffffff82c7316c R ehci_confd +ffffffff82c73175 R ehci_ifcd +ffffffff82c7317e R ehci_endpd +ffffffff82c73185 R ehci_hubd +ffffffff82c74000 R xhci_bus_methods +ffffffff82c74030 R xhci_root_ctrl_methods +ffffffff82c74060 R xhci_root_intr_methods +ffffffff82c74090 R xhci_device_ctrl_methods +ffffffff82c740c0 R xhci_device_intr_methods +ffffffff82c740f0 R xhci_device_bulk_methods +ffffffff82c74120 R xhci_device_isoc_methods +ffffffff82c74150 R xhci_devd +ffffffff82c74162 R xhci_confd +ffffffff82c7416b R xhci_ifcd +ffffffff82c74174 R xhci_endpd +ffffffff82c7417b R xhci_endpcd +ffffffff82c74181 R xhci_hubd +ffffffff82c75000 R psp_ca +ffffffff82c75030 R psp_ucode_table +ffffffff82c78000 R radio_ca +ffffffff82c79000 R ipmi_ca +ffffffff82c7a000 R vscsi_ca +ffffffff82c7a028 R vscsi_switch +ffffffff82c7a050 R vscsi_filtops +ffffffff82c7b000 R mpath_ca +ffffffff82c7b028 R mpath_switch +ffffffff82c7c000 R softraid_ca +ffffffff82c7c028 R sr_switch +ffffffff82c7d000 r spdmem_basic_types +ffffffff82c7d0a0 r spdmem_parity_types +ffffffff82c7d0e0 r spdmem_ddr4_decode.ddr4_chipsize +ffffffff82c7e000 R ufshci_switch +ffffffff82c7f000 R kstat_rlock_ops +ffffffff82c7f010 R kstat_wlock_ops +ffffffff82c7f020 R kstat_mutex_ops +ffffffff82c7f030 R kstat_cpu_ops +ffffffff82c7f040 r kstat_id_tree_RBT_INFO +ffffffff82c7f058 R kstat_id_tree_RBT_TYPE +ffffffff82c7f060 r kstat_pv_tree_RBT_INFO +ffffffff82c7f078 R kstat_pv_tree_RBT_TYPE +ffffffff82c7f080 r kstat_nm_tree_RBT_INFO +ffffffff82c7f098 R kstat_nm_tree_RBT_TYPE +ffffffff82c80000 r fuse_rd_filtops +ffffffff82c81000 R fusefs_vfsops +ffffffff82c81070 R fusefs_vars +ffffffff82c82000 R fusefs_vops +ffffffff82c82110 R fusefsread_filtops +ffffffff82c82140 R fusefswrite_filtops +ffffffff82c82170 R fusefsvnode_filtops +ffffffff82c83000 r pf_state_tree_RBT_INFO +ffffffff82c83018 R pf_state_tree_RBT_TYPE +ffffffff82c83020 r pf_state_tree_id_RBT_INFO +ffffffff82c83038 R pf_state_tree_id_RBT_TYPE +ffffffff82c83040 r pf_translate_af.zero +ffffffff82c84000 R hfsc_ops +ffffffff82c84038 R ifq_hfsc_ops +ffffffff82c84040 R hfsc_pf_ops +ffffffff82c84088 R pfq_hfsc_ops +ffffffff82c85000 r fqcodel_ops +ffffffff82c85038 R ifq_fqcodel_ops +ffffffff82c85040 r fqcodel_pf_ops +ffffffff82c85088 R pfq_fqcodel_ops +ffffffff82c85090 r codel_intervals +ffffffff82c86000 r pfsync_bulk_req_state_names +ffffffff82c86030 r pfsync_bulk_req_event_names +ffffffff82c86060 r pfsync_qs +ffffffff82c860d8 r pfsync_kstat_tpl +ffffffff82c862e0 r pfsync_acts +ffffffff82c87000 r bio_mappings_RBT_INFO +ffffffff82c87018 R bio_mappings_RBT_TYPE +ffffffff82c88000 R hotplugread_filtops +ffffffff82c89000 R dtps_static +ffffffff82c8a000 R db_show_all_cmds +ffffffff82c8a180 R db_show_cmds +ffffffff82c8a4c0 R db_boot_cmds +ffffffff82c8a5a0 R db_command_table +ffffffff82c8b000 R ddb_vars +ffffffff82c8c000 R audio_ca +ffffffff82c8c028 R audioctlread_filtops +ffffffff82c8c058 R audiowrite_filtops +ffffffff82c8c088 R audioread_filtops +ffffffff82c8d000 R midi_ca +ffffffff82c8d028 R midiwrite_filtops +ffffffff82c8d058 R midiread_filtops +ffffffff82c8e000 r mulawtolin16 +ffffffff82c8e200 r lintomulaw +ffffffff82c8f000 R randomread_filtops +ffffffff82c8f030 R randomwrite_filtops +ffffffff82c90000 R video_ca +ffffffff82c90028 R video_filtops +ffffffff82c91000 R cd9660_vfsops +ffffffff82c92000 R cd9660_vops +ffffffff82c92110 R cd9660_specvops +ffffffff82c92220 R cd9660_fifovops +ffffffff82c92330 R cd9660read_filtops +ffffffff82c92360 R cd9660write_filtops +ffffffff82c92390 R cd9660vnode_filtops +ffffffff82c93000 R udf_vfsops +ffffffff82c94000 R udf_vops +ffffffff82c94110 r mon_lens +ffffffff82c95000 r month_days +ffffffff82c96000 R execsw +ffffffff82c97000 r shstrtab +ffffffff82c98000 R copyright +ffffffff82c980c0 r initpaths +ffffffff82c99000 R sysent +ffffffff82c9b000 R bufq_impls +ffffffff82c9c000 R kqueueops +ffffffff82c9c038 R kqread_filtops +ffffffff82c9c068 R proc_filtops +ffffffff82c9c098 R sig_filtops +ffffffff82c9c0c8 R file_filtops +ffffffff82c9c0f8 R timer_filtops +ffffffff82c9c130 R sysfilt_ops +ffffffff82c9c178 R seltrue_filtops +ffffffff82c9c1a8 R dead_filtops +ffffffff82c9c1d8 R badfd_filtops +ffffffff82c9c208 r mutex_klistops +ffffffff82c9c220 r rwlock_klistops +ffffffff82c9d000 R kv_exec +ffffffff82c9e000 R addrmask +ffffffff82c9f000 r proc_printit.pstat +ffffffff82ca0000 R pledge_syscalls +ffffffff82ca0a60 r pledgenames +ffffffff82ca0cb0 r pledgereq +ffffffff82ca1000 r unvname_rbt_RBT_INFO +ffffffff82ca1018 R unvname_rbt_RBT_TYPE +ffffffff82ca2000 R sigprop +ffffffff82ca3000 R kern_vars +ffffffff82ca32f0 R hw_vars +ffffffff82ca4000 R tc_vars +ffffffff82ca5000 r sys_gettimeofday.zerotz +ffffffff82ca6000 r taskq_sys_name +ffffffff82ca6006 r taskq_sys_mp_name +ffffffff82ca6010 R systq +ffffffff82ca6018 R systqmp +ffffffff82ca8000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff82ca8010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff82ca8020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff82ca8030 r gpt_get_fstype.gpt_uuid_linux +ffffffff82ca8040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff82ca8050 r gpt_get_fstype.gpt_uuid_unused +ffffffff82ca8060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff82ca8070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff82ca9000 r hiballoc_addr_RBT_INFO +ffffffff82ca9018 R hiballoc_addr_RBT_TYPE +ffffffff82caa000 R logread_filtops +ffffffff82cab000 r phtree_RBT_INFO +ffffffff82cab018 R phtree_RBT_TYPE +ffffffff82cab020 r pool_lock_ops_rw +ffffffff82cab058 r pool_lock_ops_mtx +ffffffff82cac000 R pipe_rfiltops +ffffffff82cac030 R pipe_wfiltops +ffffffff82cac060 R pipe_efiltops +ffffffff82cac090 r pipeops +ffffffff82cad000 R socketops +ffffffff82cae000 R sysvsem_vars +ffffffff82caf000 R char_type +ffffffff82caf100 R ttyread_filtops +ffffffff82caf130 R ttywrite_filtops +ffffffff82caf160 R ttyexcept_filtops +ffffffff82cb0000 R ptcread_filtops +ffffffff82cb0030 R ptcwrite_filtops +ffffffff82cb0060 R ptcexcept_filtops +ffffffff82cb2000 R domains +ffffffff82cb3000 R unixdomain +ffffffff82cb3050 R unixsw +ffffffff82cb4000 R soread_filtops +ffffffff82cb4030 R sowrite_filtops +ffffffff82cb4060 R soexcept_filtops +ffffffff82cb5000 R sun_noname +ffffffff82cb5010 R uipc_usrreqs +ffffffff82cb50a0 R uipc_dgram_usrreqs +ffffffff82cb5130 R unpstctl_vars +ffffffff82cb5160 R unpsqctl_vars +ffffffff82cb5190 R unpdgctl_vars +ffffffff82cb6000 r namecache_rb_cache_RBT_INFO +ffffffff82cb6018 R namecache_rb_cache_RBT_TYPE +ffffffff82cb7000 R generic_filtops +ffffffff82cb8000 r buf_rb_bufs_RBT_INFO +ffffffff82cb8018 R buf_rb_bufs_RBT_TYPE +ffffffff82cb8020 r typename +ffffffff82cb9000 R sync_vops +ffffffff82cba000 R vnops +ffffffff82cbb000 R spec_vops +ffffffff82cbc000 R dead_vops +ffffffff82cbd000 R fifo_vops +ffffffff82cbd110 R fiforead_filtops +ffffffff82cbd140 R fifowrite_filtops +ffffffff82cbd170 R fifoexcept_filtops +ffffffff82cbe000 R regyear +ffffffff82cbe020 R leapyear +ffffffff82cbe040 r dos2unix +ffffffff82cbe140 r u2l +ffffffff82cbe240 r unix2dos +ffffffff82cbf008 R msdosfs_vfsops +ffffffff82cc0000 R msdosfs_vops +ffffffff82cc0110 R msdosfsread_filtops +ffffffff82cc0140 R msdosfswrite_filtops +ffffffff82cc0170 R msdosfsvnode_filtops +ffffffff82cc1000 r _utf_count +ffffffff82cc2000 R ntfs_vfsops +ffffffff82cc3000 R ntfs_vops +ffffffff82cc4000 R bpfread_filtops +ffffffff82cc4030 R bpf_mbuf_ops +ffffffff82cc5000 r bpf_mem_ops +ffffffff82cc6000 R priq_ops +ffffffff82cc6038 R ifq_priq_ops +ffffffff82cc6040 r ifq_kstat_tpl +ffffffff82cc6180 r ifiq_kstat_tpl +ffffffff82cc7000 r ether_crc32_le_update.crctab +ffffffff82cc7040 r ether_crc32_be_update.crctab +ffffffff82cc8000 r lcp +ffffffff82cc8078 r ipcp +ffffffff82cc80f0 r ipv6cp +ffffffff82cc8168 r chap +ffffffff82cc81e0 r pap +ffffffff82cc9000 R ifmedia_baudrate_descriptions +ffffffff82cca000 r fcstab +ffffffff82ccc000 R tunread_filtops +ffffffff82ccc030 R tunwrite_filtops +ffffffff82ccd000 R bridge_brport +ffffffff82cce000 R bstp_etheraddr +ffffffff82ccf000 r eb_tree_RBT_INFO +ffffffff82ccf018 R eb_tree_RBT_TYPE +ffffffff82cd0000 r veb_etherbridge_ops +ffffffff82cd0028 r veb_pf_ipv4 +ffffffff82cd0040 r veb_pf_ipv6 +ffffffff82cd1000 r pipex_pppoe_padding +ffffffff82cd2000 r rn_addmask.normal_chars +ffffffff82cd3000 R route_src +ffffffff82cd3010 R route_usrreqs +ffffffff82cd30a0 R routedomain +ffffffff82cd30f0 R routesw +ffffffff82cd4000 R gre_vars +ffffffff82cd4030 r mgre_tree_RBT_INFO +ffffffff82cd4048 R mgre_tree_RBT_TYPE +ffffffff82cd4050 r egre_tree_RBT_INFO +ffffffff82cd4068 R egre_tree_RBT_TYPE +ffffffff82cd4070 r nvgre_ucast_tree_RBT_INFO +ffffffff82cd4088 R nvgre_ucast_tree_RBT_TYPE +ffffffff82cd4090 r nvgre_mcast_tree_RBT_INFO +ffffffff82cd40a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff82cd40b0 r eoip_tree_RBT_INFO +ffffffff82cd40c8 R eoip_tree_RBT_TYPE +ffffffff82cd40d0 r nvgre_etherbridge_ops +ffffffff82cd5000 r trunk_protos +ffffffff82cd6000 R ethermulticastaddr_slowprotocols +ffffffff82cd6006 R lacp_info_tlv_template +ffffffff82cd600e R marker_info_tlv_template +ffffffff82cd6012 R marker_response_tlv_template +ffffffff82cd6020 R lacp_timer_funcs +ffffffff82cd7000 r lacp_rxm_state_names +ffffffff82cd7040 r lacp_rxm_event_names +ffffffff82cd7090 r aggr_port_selected_names +ffffffff82cd70b0 r lacp_mux_state_names +ffffffff82cd70e0 r lacp_mux_event_names +ffffffff82cd7128 r lacp_address_slow +ffffffff82cd8000 r tpmr_pf_ipv4 +ffffffff82cd8018 r tpmr_pf_ipv6 +ffffffff82cd9000 r bpe_tree_RBT_INFO +ffffffff82cd9018 R bpe_tree_RBT_TYPE +ffffffff82cd9020 r bpe_etherbridge_ops +ffffffff82cda000 R pppx_rd_filtops +ffffffff82cda030 R pppx_wr_filtops +ffffffff82cda060 r pppx_ifs_RBT_INFO +ffffffff82cda078 R pppx_ifs_RBT_TYPE +ffffffff82cda080 r pppac_rd_filtops +ffffffff82cda0b0 r pppac_wr_filtops +ffffffff82cdb000 r vxlan_peers_RBT_INFO +ffffffff82cdb018 R vxlan_peers_RBT_TYPE +ffffffff82cdb020 r vxlan_etherbridge_ops +ffffffff82cdc000 R stoeplitz_cache +ffffffff82cdd000 R ieee80211_std_rateset_11a +ffffffff82cdd010 R ieee80211_std_rateset_11b +ffffffff82cdd020 R ieee80211_std_rateset_11g +ffffffff82cdd030 R ieee80211_std_ratesets_11n +ffffffff82cdd3b0 R ieee80211_std_ratesets_11ac +ffffffff82cdd6b0 r ieee80211_setbasicrates.basic +ffffffff82cdd710 r ieee80211_setmode.chanflags +ffffffff82cdd730 r ieee80211_rate2media.rates +ffffffff82cdd8c0 r ieee80211_media2rate.ieeerates +ffffffff82cde000 r Sbox +ffffffff82ce0000 r ieee80211_ioctl.empty_macaddr +ffffffff82ce1000 r ieee80211_find_rxnode.zero +ffffffff82ce1008 r ieee80211_tree_RBT_INFO +ffffffff82ce1020 R ieee80211_tree_RBT_TYPE +ffffffff82ce1028 r ieee80211_ess_tree_RBT_INFO +ffffffff82ce1040 R ieee80211_ess_tree_RBT_TYPE +ffffffff82ce1048 r ieee80211_do_slow_print.merge_print_intvl +ffffffff82ce2020 R ieee80211_edca_table +ffffffff82ce20e0 R ieee80211_qap_edca_table +ffffffff82ce3000 R ieee80211_mgt_subtype_name +ffffffff82ce3080 R ieee80211_state_name +ffffffff82ce30b0 R ieee80211_phymode_name +ffffffff82ce4000 r ieee80211_r_ctry +ffffffff82ce4ae0 r ieee80211_r_names +ffffffff82ce4f80 r ieee80211_r_map +ffffffff82ce6000 R zeroin46_addr +ffffffff82ce6010 R zeroin_addr +ffffffff82ce7000 R inetdomain +ffffffff82ce7050 R inetsw +ffffffff82ce8000 R divertctl_vars +ffffffff82ce8030 R divert_usrreqs +ffffffff82ce9000 R icmpctl_vars +ffffffff82cea000 R ipctl_vars_unlocked +ffffffff82cea050 R ipctl_vars +ffffffff82cea140 R inetctlerrmap +ffffffff82ceb000 R rip_usrreqs +ffffffff82cec000 R tcprexmtthresh +ffffffff82ced000 R tcp_outflags +ffffffff82cee000 R tcp_timer_funcs +ffffffff82cee030 R tcp_backoff +ffffffff82cee064 R tcp_totbackoff +ffffffff82cef000 R tcp_usrreqs +ffffffff82cef090 R tcp6_usrreqs +ffffffff82cef120 R tcpctl_vars +ffffffff82cf0000 R udp_usrreqs +ffffffff82cf0090 R udp6_usrreqs +ffffffff82cf0120 R udpctl_vars +ffffffff82cf1000 R gre_usrreqs +ffffffff82cf2000 r ipsec_ids_tree_RBT_INFO +ffffffff82cf2018 R ipsec_ids_tree_RBT_TYPE +ffffffff82cf2020 r ipsec_ids_flows_RBT_INFO +ffffffff82cf2038 R ipsec_ids_flows_RBT_TYPE +ffffffff82cf2040 R xformsw +ffffffff82cf2158 R xformswNXFORMSW +ffffffff82cf3000 R espctl_vars +ffffffff82cf3050 R ahctl_vars +ffffffff82cf3070 R ipcompctl_vars +ffffffff82cf3090 R ipsecctl_vars +ffffffff82cf4000 R ipseczeroes +ffffffff82cf5000 R carpctl_vars +ffffffff82cf5050 r carp_set_state.carp_states +ffffffff82cf6000 r Rcon +ffffffff82cf7000 r Te2 +ffffffff82cf7400 r Te3 +ffffffff82cf7800 r Te0 +ffffffff82cf7c00 r Te1 +ffffffff82cf8000 r rcon +ffffffff82cf8030 r Td0 +ffffffff82cf8430 r Td1 +ffffffff82cf8830 r Td2 +ffffffff82cf8c30 r Td3 +ffffffff82cf9030 r Td4 +ffffffff82cfb000 r K256 +ffffffff82cfb100 r sha512_initial_hash_value +ffffffff82cfb140 r K512 +ffffffff82cfb3c0 r sha384_initial_hash_value +ffffffff82cfc000 r Blowfish_initstate.initstate +ffffffff82cfe000 r cast_sbox1 +ffffffff82cfe400 r cast_sbox2 +ffffffff82cfe800 r cast_sbox3 +ffffffff82cfec00 r cast_sbox4 +ffffffff82cff000 r cast_sbox5 +ffffffff82cff400 r cast_sbox6 +ffffffff82cff800 r cast_sbox7 +ffffffff82cffc00 r cast_sbox8 +ffffffff82d00000 r des_SPtrans +ffffffff82d01000 r des_skb +ffffffff82d01800 r odd_parity +ffffffff82d02000 R hmac_ipad_buffer +ffffffff82d02080 R hmac_opad_buffer +ffffffff82d03000 R enc_xform_3des +ffffffff82d03040 R enc_xform_blf +ffffffff82d03080 R enc_xform_cast5 +ffffffff82d030c0 R enc_xform_aes +ffffffff82d03100 R enc_xform_aes_ctr +ffffffff82d03140 R enc_xform_aes_gcm +ffffffff82d03180 R enc_xform_aes_gmac +ffffffff82d031c0 R enc_xform_aes_xts +ffffffff82d03200 R enc_xform_chacha20_poly1305 +ffffffff82d03240 R enc_xform_null +ffffffff82d03280 R auth_hash_hmac_md5_96 +ffffffff82d032c8 R auth_hash_hmac_sha1_96 +ffffffff82d03310 R auth_hash_hmac_ripemd_160_96 +ffffffff82d03358 R auth_hash_hmac_sha2_256_128 +ffffffff82d033a0 R auth_hash_hmac_sha2_384_192 +ffffffff82d033e8 R auth_hash_hmac_sha2_512_256 +ffffffff82d03430 R auth_hash_gmac_aes_128 +ffffffff82d03478 R auth_hash_gmac_aes_192 +ffffffff82d034c0 R auth_hash_gmac_aes_256 +ffffffff82d03508 R auth_hash_chacha20_poly1305 +ffffffff82d03550 R comp_algo_deflate +ffffffff82d04000 r IV +ffffffff82d05000 r idgen32_ftable +ffffffff82d06000 r Chacha20_Poly1305_Update.zeroes +ffffffff82d06010 r pad0 +ffffffff82d07000 r null_point +ffffffff82d07020 r base_point +ffffffff82d08000 R mplsdomain +ffffffff82d09000 R mplsctl_vars +ffffffff82d0a000 r nfsread_filtops +ffffffff82d0a030 r nfswrite_filtops +ffffffff82d0a060 r nfsvnode_filtops +ffffffff82d0b000 r nfs_nodetree_RBT_INFO +ffffffff82d0b018 R nfs_nodetree_RBT_TYPE +ffffffff82d0c000 r nfs_ptimers +ffffffff82d0d000 R nfsv2_type +ffffffff82d0d030 R nfsv3_type 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+ffffffff82d1c090 R uaddr_pivot_functions +ffffffff82d1c0c0 R uaddr_stack_brk_functions +ffffffff82d1c0f0 r uaddr_free_rbtree_RBT_INFO +ffffffff82d1c108 R uaddr_free_rbtree_RBT_TYPE +ffffffff82d1d000 R aobj_pager +ffffffff82d1e000 R uvm_deviceops +ffffffff82d1f000 R kv_uarea +ffffffff82d20000 R kv_any +ffffffff82d20018 R kv_intrsafe +ffffffff82d20030 R kv_page +ffffffff82d20048 R kp_dirty +ffffffff82d20070 R kp_dma +ffffffff82d20098 R kp_dma_contig +ffffffff82d200c0 R kp_dma_zero +ffffffff82d200e8 R kp_zero +ffffffff82d20110 R kp_pageable +ffffffff82d20138 R kp_none +ffffffff82d20160 R kd_waitok +ffffffff82d20178 R kd_nowait +ffffffff82d20190 R kd_trylock +ffffffff82d21000 R vmmapbsy +ffffffff82d21010 r page_flagbits +ffffffff82d210a8 r uvm_map_addr_RBT_INFO +ffffffff82d210c0 R uvm_map_addr_RBT_TYPE +ffffffff82d22000 R pmap_pager +ffffffff82d22048 R bufcache_pager +ffffffff82d23000 r uvm_objtree_RBT_INFO +ffffffff82d23018 R uvm_objtree_RBT_TYPE +ffffffff82d24000 r uvm_pmr_addr_RBT_INFO +ffffffff82d24018 R uvm_pmr_addr_RBT_TYPE +ffffffff82d24020 r uvm_pmr_size_RBT_INFO +ffffffff82d24038 R uvm_pmr_size_RBT_TYPE +ffffffff82d24040 r uvm_pmemrange_addr_RBT_INFO +ffffffff82d24058 R uvm_pmemrange_addr_RBT_TYPE +ffffffff82d25000 R uvm_vnodeops +ffffffff82d25048 r uvn_flush.interval +ffffffff82d26000 R zeroin6_addr +ffffffff82d27000 R in6addr_any +ffffffff82d27010 R in6addr_loopback +ffffffff82d27020 R in6addr_intfacelocal_allnodes +ffffffff82d27030 R in6addr_linklocal_allnodes +ffffffff82d27040 R in6addr_linklocal_allrouters +ffffffff82d27050 R in6mask0 +ffffffff82d27060 R in6mask32 +ffffffff82d27070 R in6mask64 +ffffffff82d27080 R in6mask96 +ffffffff82d27090 R in6mask128 +ffffffff82d270a0 R sa6_any +ffffffff82d28000 R divert6ctl_vars +ffffffff82d28030 R divert6_usrreqs +ffffffff82d29000 R inet6domain +ffffffff82d29050 R inet6sw +ffffffff82d2a000 R icmpv6ctl_vars +ffffffff82d2b000 R inet6ctlerrmap +ffffffff82d2b020 R ipv6ctl_vars_unlocked +ffffffff82d2b050 R ipv6ctl_vars +ffffffff82d2c000 R rip6_usrreqs +ffffffff82d2d000 R pfkey_addr +ffffffff82d2d010 R pfkeyv2_usrreqs +ffffffff82d2d0a0 R pfkeydomain +ffffffff82d2d0f0 R pfkeysw +ffffffff82d2d150 r ealgs +ffffffff82d2d180 r aalgs +ffffffff82d2d1b0 r calgs +ffffffff82d2e000 R sadb_exts_allowed_out +ffffffff82d2e090 R sadb_exts_required_out +ffffffff82d30000 r opc82_byte_operation +ffffffff82d30040 r opc83_long_operation +ffffffff82d30080 r opc83_word_operation +ffffffff82d300c0 r opcD0_byte_operation +ffffffff82d30100 r opcD1_long_operation +ffffffff82d30140 r opcD1_word_operation +ffffffff82d31000 r crc_table +ffffffff82d31400 r crc_braid_table +ffffffff82d33400 r x2n_table +ffffffff82d34000 r inflateBack.order +ffffffff82d34030 r fixedtables.lenfix +ffffffff82d34830 r fixedtables.distfix +ffffffff82d35000 r inflate.order +ffffffff82d35030 r fixedtables.lenfix +ffffffff82d35830 r fixedtables.distfix +ffffffff82d36000 r inflate_table.lbase +ffffffff82d36040 r inflate_table.lext +ffffffff82d36080 r inflate_table.dbase +ffffffff82d360c0 r inflate_table.dext +ffffffff82d37000 r configuration_table +ffffffff82d38000 R z_errmsg +ffffffff82d39000 R _dist_code +ffffffff82d39200 R _length_code +ffffffff82d39300 r static_l_desc +ffffffff82d39320 r static_d_desc +ffffffff82d39340 r static_bl_desc +ffffffff82d39360 r static_ltree +ffffffff82d397e0 r static_dtree +ffffffff82d39860 r extra_lbits +ffffffff82d398e0 r extra_dbits +ffffffff82d39960 r extra_blbits +ffffffff82d399b0 r bl_order +ffffffff82d399d0 r base_length +ffffffff82d39a50 r base_dist +ffffffff82d3a000 R nam2blk +ffffffff82d3b000 R chrtoblktbl +ffffffff82d3b0c0 R nchrtoblktbl +ffffffff82d3c000 R cpuctl_vars +ffffffff82d3e000 R sigcode +ffffffff82d3e014 R sigcodecall +ffffffff82d3e016 R sigcoderet +ffffffff82d3e038 R esigcode +ffffffff82d3e038 R sigfill +ffffffff82d3e039 R sigfillsiz +ffffffff82d3e039 r esigfill +ffffffff82d3e03d r bogus_proc_pmap +ffffffff82d3e070 r spl_lowered +ffffffff82d3e0a6 r intr_spl_lowered +ffffffff82d3e113 R _xrstor +ffffffff82d3e117 R _xrstors +ffffffff82d3e11b R _xsave +ffffffff82d3e11f R _xsaves +ffffffff82d3e123 R _xsaveopt +ffffffff82d3e127 R _pcid_set_reuse +ffffffff82d3e133 R _jmprax +ffffffff82d3e136 R _jmprax_len +ffffffff82d3e138 R _jmpr11 +ffffffff82d3e13c R _jmpr11_len +ffffffff82d3e13e R _jmpr13 +ffffffff82d3e142 R _jmpr13_len +ffffffff82d40000 r cpurevs +ffffffff82d4016c r amd64_errata_set5 +ffffffff82d4016e r amd64_errata_set1 +ffffffff82d40180 r amd64_errata_set8 +ffffffff82d4019f r amd64_errata_set6 +ffffffff82d401a4 r amd64_errata_set7 +ffffffff82d401ac r amd64_errata_set3 +ffffffff82d401af r amd64_errata_set2 +ffffffff82d401b8 r amd64_errata_set9 +ffffffff82d41000 R ptp_masks +ffffffff82d41020 R ptp_shifts +ffffffff82d41030 R nkptpmax +ffffffff82d41050 R nbpd +ffffffff82d41070 R normal_pdes +ffffffff82d42000 R trap_type +ffffffff82d420b0 R trap_types +ffffffff82d43000 r x86fpflags_to_siginfo.x86fp_siginfo_table +ffffffff82d44000 R x86_soft_intr_to_ssir +ffffffff82d46000 R Xexceptions +ffffffff82d46100 r spl_lowered +ffffffff82d4612d R i8259_stubs +ffffffff82d462ad R ioapic_edge_stubs +ffffffff82d468ad R ioapic_level_stubs +ffffffff82d47000 R _stac +ffffffff82d47003 R _clac +ffffffff82d48000 R x86_bus_space_io_ops +ffffffff82d48130 R x86_bus_space_mem_ops +ffffffff82d49000 ? cpu_spinup_trampoline +ffffffff82d490b6 R cpu_spinup_trampoline_end +ffffffff82d490b6 R mp_tramp_data_start +ffffffff82d490fc R mp_tramp_data_end +ffffffff82d4b000 R db_acpi_cmds +ffffffff82d4b0a0 R db_machine_command_table +ffffffff82d4c000 r i8254_delay.delaytab +ffffffff82d4d000 R rasops_cmap +ffffffff82d4e000 r reverse +ffffffff82d4e100 r ibm437_level1 +ffffffff82d4e230 r ibm437_level2_0 +ffffffff82d4e248 r ibm437_level2_1 +ffffffff82d4e260 r ibm437_level2_3 +ffffffff82d4e278 r ibm437_level2_32 +ffffffff82d4e290 r ibm437_level2_34 +ffffffff82d4e2a8 r ibm437_level2_35 +ffffffff82d4e2c0 r ibm437_level2_37 +ffffffff82d4e2e0 r ibm437_chars_0 +ffffffff82d4e3e0 r ibm437_chars_1 +ffffffff82d4e3f0 r ibm437_chars_3 +ffffffff82d4e430 r ibm437_chars_32 +ffffffff82d4e460 r ibm437_chars_34 +ffffffff82d4e4d0 r ibm437_chars_35 +ffffffff82d4e4f0 r ibm437_chars_37 +ffffffff82d4f000 R mii_media_table +ffffffff82d50000 R nsphy_ca +ffffffff82d50028 R nsphy_funcs +ffffffff82d50040 r nsphys +ffffffff82d51000 R nsphyter_ca +ffffffff82d51028 R nsphyter_funcs +ffffffff82d51040 r nsphyterphys +ffffffff82d52000 R gentbi_ca +ffffffff82d52028 R gentbi_funcs +ffffffff82d53000 R qsphy_ca +ffffffff82d53028 R qsphy_funcs +ffffffff82d53040 r qsphys +ffffffff82d54000 R inphy_ca +ffffffff82d54028 R inphy_funcs +ffffffff82d54040 r inphys +ffffffff82d55000 R iophy_ca +ffffffff82d55028 R iophy_funcs +ffffffff82d55040 r iophys +ffffffff82d56000 R eephy_ca +ffffffff82d56028 R eephy_funcs +ffffffff82d56040 r eephys +ffffffff82d57000 R exphy_ca +ffffffff82d57028 R exphy_funcs +ffffffff82d58000 R rlphy_ca +ffffffff82d58028 R rlphy_funcs +ffffffff82d58040 r rlphys +ffffffff82d59000 R lxtphy_ca +ffffffff82d59028 R lxtphy_funcs +ffffffff82d59040 R lxtphy971_funcs +ffffffff82d59060 r lxtphys +ffffffff82d5a000 R luphy_ca +ffffffff82d5a028 R luphy_funcs +ffffffff82d5a040 r luphys +ffffffff82d5b000 R mtdphy_ca +ffffffff82d5b028 R mtdphy_funcs +ffffffff82d5b040 r mtdphys +ffffffff82d5c000 R icsphy_ca +ffffffff82d5c028 R icsphy_funcs +ffffffff82d5c040 r icsphys +ffffffff82d5d000 R sqphy_ca +ffffffff82d5d028 R sqphy_funcs +ffffffff82d5d040 r sqphys +ffffffff82d5e000 R tqphy_ca +ffffffff82d5e028 R tqphy_funcs +ffffffff82d5e040 r tqphys +ffffffff82d5f000 R ukphy_ca +ffffffff82d5f028 R ukphy_funcs +ffffffff82d60000 R dcphy_ca +ffffffff82d60028 R dcphy_funcs +ffffffff82d61000 R bmtphy_ca +ffffffff82d61028 R bmtphy_funcs +ffffffff82d61040 r bmtphys +ffffffff82d62000 R brgphy_ca +ffffffff82d62028 R brgphy_copper_funcs +ffffffff82d62040 R brgphy_fiber_funcs +ffffffff82d62058 R brgphy_5708s_funcs +ffffffff82d62070 R brgphy_5709s_funcs +ffffffff82d62090 r brgphys +ffffffff82d62300 r brgphy_bcm5401_dspcode.dspcode +ffffffff82d63000 R xmphy_ca +ffffffff82d63028 R xmphy_funcs +ffffffff82d63040 r xmphys +ffffffff82d64000 R amphy_ca +ffffffff82d64028 R amphy_funcs +ffffffff82d64040 r amphys +ffffffff82d65000 R acphy_ca +ffffffff82d65028 R acphy_funcs +ffffffff82d65040 r acphys +ffffffff82d66000 R nsgphy_ca +ffffffff82d66028 R nsgphy_funcs +ffffffff82d66040 r nsgphys +ffffffff82d67000 R urlphy_ca +ffffffff82d67028 R urlphy_funcs +ffffffff82d68000 R rgephy_ca +ffffffff82d68028 R rgephy_funcs +ffffffff82d68040 r rgephys +ffffffff82d69000 R ciphy_ca +ffffffff82d69028 R ciphy_funcs +ffffffff82d69040 r ciphys +ffffffff82d6a000 R ipgphy_ca +ffffffff82d6a028 R ipgphy_funcs +ffffffff82d6a040 r ipgphys +ffffffff82d6b000 R etphy_funcs +ffffffff82d6b018 R etphy_ca +ffffffff82d6b040 r etphys +ffffffff82d6b060 r etphy_dspcode +ffffffff82d6c000 R jmphy_funcs +ffffffff82d6c018 R jmphy_ca +ffffffff82d6c040 r jmphys +ffffffff82d6d000 R atphy_funcs +ffffffff82d6d018 R atphy_ca +ffffffff82d6d040 r atphys +ffffffff82d6e000 r sense_keys +ffffffff82d6e080 r adesc +ffffffff82d71000 R scsi_readsafe_cmd +ffffffff82d72000 R scsibus_ca +ffffffff82d72030 R scsi_quirk_patterns +ffffffff82d73000 R cd_ca +ffffffff82d73030 R cd_patterns +ffffffff82d74000 R ch_ca +ffffffff82d74030 R ch_patterns +ffffffff82d75000 R sd_ca +ffffffff82d75030 R sd_patterns +ffffffff82d76000 R st_quirk_patterns +ffffffff82d76210 R st_ca +ffffffff82d76240 R st_patterns +ffffffff82d77000 R uk_ca +ffffffff82d78000 R safte_ca +ffffffff82d79000 R ses_ca +ffffffff82d7a000 R sym_ca +ffffffff82d7a028 R sym_mpath_sym_ops +ffffffff82d7a048 R sym_mpath_asym_ops +ffffffff82d7b000 R rdac_ca +ffffffff82d7b028 R rdac_mpath_ops +ffffffff82d7c000 R emc_ca +ffffffff82d7c028 R emc_mpath_ops +ffffffff82d7d000 R hds_ca +ffffffff82d7d028 R hds_mpath_ops +ffffffff82d7e000 R atapiscsi_ca +ffffffff82d7e028 r atapiscsi_switch +ffffffff82d7f000 R wd_ca +ffffffff82d80000 R atascsi_switch +ffffffff82d81000 R mainbus_ca +ffffffff82d82000 R bios_ca +ffffffff82d83000 R mpbios_ca +ffffffff82d83030 r loc_where +ffffffff82d84000 R mpbios_icu_table +ffffffff82d85000 R cpu_ca +ffffffff82d86000 R lapic_timer_intrclock +ffffffff82d87000 R ioapic_ca +ffffffff82d88000 R efifb_ca +ffffffff82d88028 R efifb_screen_list +ffffffff82d89000 R pvbus_ca +ffffffff82d8a000 R pvclock_ca +ffffffff82d8b000 R vmt_ca +ffffffff82d8c000 R xen_ca +ffffffff82d8d000 R xs_errors +ffffffff82d8e000 R xnf_ca +ffffffff82d8f000 R xbf_ca +ffffffff82d8f028 R xbf_switch +ffffffff82d90000 R hyperv_ca +ffffffff82d90028 R hv_guid_network +ffffffff82d90038 R hv_guid_ide +ffffffff82d90048 R hv_guid_scsi +ffffffff82d90058 R hv_guid_shutdown +ffffffff82d90068 R hv_guid_timesync +ffffffff82d90078 R hv_guid_heartbeat +ffffffff82d90088 R hv_guid_kvp +ffffffff82d91000 r kvp_pools +ffffffff82d92000 R hvn_ca +ffffffff82d93000 R hvs_ca +ffffffff82d93028 R hvs_switch +ffffffff82d94000 r virtio_device_name +ffffffff82d95000 R vio_ca +ffffffff82d95030 r virtio_net_feature_names +ffffffff82d96000 R vioblk_ca +ffffffff82d96028 R vioblk_switch +ffffffff82d96050 r vioblk_feature_names +ffffffff82d97000 R viomb_ca +ffffffff82d97030 r viomb_feature_names +ffffffff82d98000 R viornd_ca +ffffffff82d99000 R vioscsi_ca +ffffffff82d99028 R vioscsi_switch +ffffffff82d99050 R vioscsi_vq_names +ffffffff82d9a000 R vmmci_ca +ffffffff82d9b000 R pci_ca +ffffffff82d9c000 r pci_quirks +ffffffff82d9d000 R pci_subclass_prehistoric +ffffffff82d9d050 R pci_subclass_mass_storage +ffffffff82d9d160 R pci_subclass_network +ffffffff82d9d250 R pci_subclass_display +ffffffff82d9d2d0 R pci_subclass_multimedia +ffffffff82d9d360 R pci_subclass_memory +ffffffff82d9d3c0 R pci_subclass_bridge +ffffffff82d9d510 R pci_subclass_communications +ffffffff82d9d5d0 R pci_subclass_system +ffffffff82d9d6c0 R pci_subclass_input +ffffffff82d9d770 R pci_subclass_dock +ffffffff82d9d7c0 R pci_subclass_processor +ffffffff82d9d880 R pci_subclass_serialbus +ffffffff82d9d990 R pci_subclass_wireless +ffffffff82d9da70 R pci_subclass_i2o +ffffffff82d9daa0 R pci_subclass_satcom +ffffffff82d9db20 R pci_subclass_crypto +ffffffff82d9db80 R pci_subclass_dasp +ffffffff82d9dc10 R pci_class +ffffffff82d9de20 r pci_known_vendors +ffffffff82d9f410 r pci_known_products +ffffffff82dc4000 R vga_pci_ca +ffffffff82dc4030 r vga_devs +ffffffff82dc5000 R ahc_pci_ident_table +ffffffff82dc55d0 R ahc_pci_ca +ffffffff82dc6000 R ahd_pci_ident_table +ffffffff82dc6198 R ahd_num_pci_devs +ffffffff82dc61a0 R ahd_pci_ca +ffffffff82dc61d0 r pci_bus_modes +ffffffff82dc6210 r pci_status_strings +ffffffff82dc6250 r pci_status_source +ffffffff82dc6290 r split_status_strings +ffffffff82dc7000 R adw_pci_ca +ffffffff82dc7028 R adw_pci_devices +ffffffff82dc8000 r adw_3550_Default_EEPROM +ffffffff82dc8080 r adw_38C0800_Default_EEPROM +ffffffff82dc8100 r adw_38C1600_Default_EEPROM +ffffffff82dc9000 R adw_asc3550_mcode +ffffffff82dca3a0 R adw_asc3550_mcode_data +ffffffff82dca3b0 R adw_asc38C0800_mcode +ffffffff82dcb888 R adw_asc38C0800_mcode_data +ffffffff82dcb8a0 R adw_asc38C1600_mcode +ffffffff82dcd160 R adw_asc38C1600_mcode_data +ffffffff82dce000 R twe_pci_ca +ffffffff82dce028 R twe_pci_devices +ffffffff82dcf000 R arc_ca +ffffffff82dcf028 R arc_switch +ffffffff82dcf050 r arc_devices +ffffffff82dcf190 r arc_intel +ffffffff82dcf198 r arc_marvell +ffffffff82dcf1a0 r arc_lsi +ffffffff82dcf1a8 r arc_marvell2 +ffffffff82dd0000 R jmb_ca +ffffffff82dd0030 r jmb_devices +ffffffff82dd1000 R ahci_pci_ca +ffffffff82dd1028 R ahci_jmb_ca +ffffffff82dd1050 r ahci_devices +ffffffff82dd2000 R nvme_pci_ca +ffffffff82dd3000 R ami_pci_ca +ffffffff82dd3030 r ami_pci_subsys +ffffffff82dd3270 r ami_pci_vendors +ffffffff82dd4000 R mfi_pci_ca +ffffffff82dd4030 r mfi_pci_devices +ffffffff82dd5000 R mfii_ca +ffffffff82dd5028 R mfii_switch +ffffffff82dd5050 R mfii_pd_switch +ffffffff82dd5078 R mfii_iop_thunderbolt +ffffffff82dd5088 R mfii_iop_25 +ffffffff82dd5098 R mfii_iop_35 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qlw_pci_ca +ffffffff82de4030 r qlw_devices +ffffffff82de4050 r isp_1040_risc_code +ffffffff82de99f0 r isp_1080_risc_code +ffffffff82df1470 r isp_12160_risc_code +ffffffff82df9000 R qla_pci_ca +ffffffff82df9030 r qla_devices +ffffffff82dfa000 R qle_ca +ffffffff82dfa028 R qle_switch +ffffffff82dfa050 r qle_devices +ffffffff82dfa070 r isp_2400_risc_code +ffffffff82e29a50 r isp_2500_risc_code +ffffffff82e5c000 R mpi_pci_ca +ffffffff82e5c030 r mpi_devices +ffffffff82e5d000 R mpii_ca +ffffffff82e5d028 R mpii_switch +ffffffff82e5d050 r mpii_devices +ffffffff82e5e000 R sili_pci_ca +ffffffff82e5e030 r sili_devices +ffffffff82e5f000 R aq_devices +ffffffff82e5f060 R aq_products +ffffffff82e5f1d0 R aq_fw1x_ops +ffffffff82e5f1f8 R aq_fw2x_ops +ffffffff82e5f220 R aq2_fw_ops +ffffffff82e5f248 R aq_ca +ffffffff82e60000 R de_ca +ffffffff82e60030 r tulip_srom_conninfo +ffffffff82e60120 r tulip_mii_phy_attrlist +ffffffff82e601e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff82e60208 r tulip_21040_10baset_only_boardsw +ffffffff82e60230 r tulip_21040_boardsw +ffffffff82e60258 r tulip_2114x_isv_boardsw +ffffffff82e60280 r tulip_21140_smc9332_boardsw +ffffffff82e602a8 r tulip_21040_auibnc_only_boardsw +ffffffff82e602d0 r tulip_21140_cogent_em100_boardsw +ffffffff82e602f8 r tulip_21140_accton_boardsw +ffffffff82e60320 r tulip_21140_eb_boardsw +ffffffff82e60348 r tulip_21041_boardsw +ffffffff82e60370 r tulip_read_macaddr.testpat +ffffffff82e60380 r tulip_vendors +ffffffff82e60430 r tulip_media_to_ifmedia +ffffffff82e60490 r tulip_chipdescs +ffffffff82e61000 R ep_pci_ca +ffffffff82e61030 R ep_pci_devices +ffffffff82e62000 R pcn_ca +ffffffff82e62028 R pcn_devices +ffffffff82e62030 r pcn_79c970_rcvfw +ffffffff82e62050 r pcn_79c970_xmtsp +ffffffff82e62070 r pcn_79c970_xmtfw +ffffffff82e62090 r pcn_79c971_rcvfw +ffffffff82e620b0 r pcn_79c971_xmtsp_sram +ffffffff82e620d0 r pcn_79c971_xmtsp +ffffffff82e620f0 r pcn_79c971_xmtfw +ffffffff82e62110 r pcn_variants +ffffffff82e63000 R siop_products +ffffffff82e64000 R siop_pci_ca +ffffffff82e65000 R rdcide_setup +ffffffff82e65005 R rdcide_hold +ffffffff82e6500a R rdcide_udmatim +ffffffff82e65010 R rdcide_udmaclk +ffffffff82e65028 R default_product_desc +ffffffff82e65040 R pciide_intel_products +ffffffff82e65630 R pciide_amd_products +ffffffff82e65690 R pciide_cmd_products +ffffffff82e65730 R pciide_via_products +ffffffff82e65810 R pciide_cypress_products +ffffffff82e65820 R pciide_sis_products +ffffffff82e65870 R pciide_natsemi_products +ffffffff82e65890 R pciide_acer_products +ffffffff82e658a0 R pciide_triones_products +ffffffff82e658f0 R pciide_promise_products +ffffffff82e65ac0 R pciide_acard_products +ffffffff82e65b10 R pciide_serverworks_products +ffffffff82e65bb0 R pciide_nvidia_products +ffffffff82e65e80 R pciide_ite_products +ffffffff82e65ea0 R pciide_ati_products +ffffffff82e65f20 R pciide_jmicron_products +ffffffff82e65f70 R pciide_phison_products +ffffffff82e65f80 R pciide_rdc_products +ffffffff82e65f90 R pciide_vendors +ffffffff82e66140 R pciide_pci_ca +ffffffff82e66168 R pciide_jmb_ca +ffffffff82e66190 r piix_isp_dma +ffffffff82e66193 r piix_rtc_dma +ffffffff82e66196 r apollo_pio_set +ffffffff82e6619b r cmd0643_9_data_tim_pio +ffffffff82e661a0 r cmd0643_9_data_tim_dma +ffffffff82e661a3 r cmd680_channel_map.init_val +ffffffff82e661b1 r cmd680_setup_channel.udma2_tbl +ffffffff82e661b8 r cmd680_setup_channel.dma_tbl +ffffffff82e661be r cmd680_setup_channel.pio_tbl +ffffffff82e661d0 r satalink_ba5_regmap +ffffffff82e66690 r sii3114_chansetup.channel_names +ffffffff82e666b0 r cy_pio_pulse +ffffffff82e666c0 r sis_udma133new_tim +ffffffff82e666e0 r sis_pio133new_tim +ffffffff82e666f4 r sis_dma133new_tim +ffffffff82e66700 r sis_udma66_tim +ffffffff82e66706 r sis_udma100new_tim +ffffffff82e6670c r sis_udma133old_tim +ffffffff82e66713 r sis_pio_act +ffffffff82e66718 r sis_pio_rec +ffffffff82e6671d r natsemi_pio_pulse +ffffffff82e66722 r natsemi_pio_recover +ffffffff82e66727 r natsemi_dma_pulse +ffffffff82e6672a r natsemi_dma_recover +ffffffff82e66730 r scx200_udma33 +ffffffff82e6673c r scx200_dma33 +ffffffff82e66750 r scx200_pio33 +ffffffff82e66778 r acer_udma +ffffffff82e6677e r acer_pio +ffffffff82e66790 r hpt370_pio +ffffffff82e667a4 r hpt370_dma +ffffffff82e667b0 r hpt370_udma +ffffffff82e667d0 r hpt372_pio +ffffffff82e667e4 r hpt372_dma +ffffffff82e667f0 r hpt372_udma +ffffffff82e6680c r hpt366_dma +ffffffff82e66820 r hpt366_udma +ffffffff82e66840 r hpt374_pio +ffffffff82e66854 r hpt374_dma +ffffffff82e66860 r hpt374_udma +ffffffff82e6687c r pdc2xx_pa +ffffffff82e66881 r pdc2xx_pb +ffffffff82e66886 r pdc2xx_dma_mb +ffffffff82e66889 r pdc2xx_dma_mc +ffffffff82e6688c r pdc2xx_udma_mc +ffffffff82e66892 r acard_act_udma +ffffffff82e66899 r acard_rec_udma +ffffffff82e668a0 r acard_udma_conf +ffffffff82e668a7 r acard_act_dma +ffffffff82e668aa r acard_rec_dma +ffffffff82e668ad r acard_act_pio +ffffffff82e668b2 r acard_rec_pio +ffffffff82e668b7 r nforce_udma +ffffffff82e668be r nforce_pio +ffffffff82e668c3 r ixp_mdma_timings +ffffffff82e668c6 r ixp_pio_timings +ffffffff82e67000 R ppb_ca +ffffffff82e68000 R cy_pci_ca +ffffffff82e68030 R cy_pci_devices +ffffffff82e69000 R rl_pci_ca +ffffffff82e69030 R rl_pci_devices +ffffffff82e6a000 R re_pci_devices +ffffffff82e6a030 R re_pci_ca +ffffffff82e6b000 R vr_ca +ffffffff82e6c000 R txp_ca +ffffffff82e6c030 R txp_devices +ffffffff82e6d000 r cards +ffffffff82e6e000 r format_params +ffffffff82e6e1a0 r pixfmt_table +ffffffff82e6e320 r meteor_pixfmt_table +ffffffff82e6f000 R bktr_ca +ffffffff82e6f028 R bktr_hw_if +ffffffff82e70000 r tuners +ffffffff82e70170 r freqTable +ffffffff82e70260 r nabcst +ffffffff82e702a0 r irccable +ffffffff82e70310 r hrccable +ffffffff82e70380 r weurope +ffffffff82e70420 r jpnbcst +ffffffff82e70460 r jpncable +ffffffff82e704c0 r xussr +ffffffff82e70530 r australia +ffffffff82e70590 r france +ffffffff82e71000 R xl_pci_ca +ffffffff82e71030 R xl_pci_devices +ffffffff82e72000 R fxp_pci_ca +ffffffff82e72030 R fxp_pci_devices +ffffffff82e73000 R em_devices +ffffffff82e73308 R em_ca +ffffffff82e73330 r em_counters +ffffffff82e74000 r em_igp_cable_length_table +ffffffff82e74100 r em_igp_2_cable_length_table +ffffffff82e75000 R ixgb_devices +ffffffff82e75010 R ixgb_ca +ffffffff82e76000 R ixgbe_devices +ffffffff82e760b8 R ix_ca +ffffffff82e760e0 r ix_counters +ffffffff82e763e0 r ix_rxq_kstats_tpl +ffffffff82e76458 r ix_txq_kstats_tpl +ffffffff82e77000 r ixgbe_mvals_base +ffffffff82e77060 r ixgbe_mvals_X540 +ffffffff82e770c0 r ixgbe_mvals_X550 +ffffffff82e77120 r ixgbe_mvals_X550EM_x +ffffffff82e77180 r ixgbe_mvals_X550EM_a +ffffffff82e7a000 R ixv_devices +ffffffff82e7a018 R ixv_ca +ffffffff82e7a040 r ixv_counters +ffffffff82e7a0b8 r ixv_txq_kstats_tpl +ffffffff82e7a108 r ixv_rxq_kstats_tpl +ffffffff82e7b000 R ixl_ca +ffffffff82e7b030 R ixl_port_counters +ffffffff82e7b2c0 R ixl_vsi_counters +ffffffff82e7b380 r ixl_devices +ffffffff82e7b4c0 r ixl_710 +ffffffff82e7b4e8 r ixl_722 +ffffffff82e7b510 r ixl_pf_aq_regs +ffffffff82e7b578 r ixl_710_decrepit +ffffffff82e7b5a0 r ixl_phy_type_map +ffffffff82e7b770 r ixl_speed_type_map +ffffffff82e7b7b0 r ixl_hmc_pack_rxq +ffffffff82e7b830 r ixl_hmc_pack_txq +ffffffff82e7b8a0 r ixl_sfp_ops +ffffffff82e7b8b8 r ixl_qsfp_ops +ffffffff82e7c000 r dwqe_pci_devices +ffffffff82e7c018 R dwqe_pci_ca +ffffffff82e7d000 R ice_driver_version +ffffffff82e7d00a R ice_major_version +ffffffff82e7d00b R ice_minor_version +ffffffff82e7d00c R ice_patch_version +ffffffff82e7d00d R ice_rc_version +ffffffff82e7d00e r ice_devices +ffffffff82e7d020 r blk_sizes +ffffffff82e7d080 r ice_blk_sids +ffffffff82e7d0f0 R ice_tlan_ctx_info +ffffffff82e7d1e0 r ice_rlan_ctx_info +ffffffff82e7d290 r phy_link_speeds +ffffffff82e7d360 r ice_ptypes_mac_il +ffffffff82e7d3e0 r ice_flds_info +ffffffff82e7d4d0 R ice_ca +ffffffff82e7d500 r ice_ptypes_mac_ofos +ffffffff82e7d580 r ice_ptypes_macvlan_il +ffffffff82e7d600 r ice_ptypes_arp_of +ffffffff82e7d680 r ice_ptypes_ipv4_il +ffffffff82e7d700 r ice_ptypes_ipv6_il +ffffffff82e7d780 r ice_ptypes_ipv4_ofos_no_l4 +ffffffff82e7d800 r ice_ptypes_ipv4_il_no_l4 +ffffffff82e7d880 r ice_ptypes_ipv4_ofos +ffffffff82e7d900 r ice_ptypes_ipv6_ofos_no_l4 +ffffffff82e7d980 r ice_ptypes_ipv6_il_no_l4 +ffffffff82e7da00 r ice_ptypes_ipv6_ofos +ffffffff82e7da80 r ice_ptypes_udp_il +ffffffff82e7db00 r ice_ptypes_tcp_il +ffffffff82e7db80 r ice_ptypes_sctp_il +ffffffff82e7dc00 r ice_ptypes_icmp_of +ffffffff82e7dc80 r ice_ptypes_icmp_il +ffffffff82e7dd00 r ice_ptypes_gre_of +ffffffff82e7f000 R xge_ca +ffffffff82e7f028 R xge_devices +ffffffff82e7f030 r xge_fix_mac +ffffffff82e7f110 r xge_xena_dtx_cfg +ffffffff82e7f170 r xge_herc_dtx_cfg +ffffffff82e80000 R thtc_ca +ffffffff82e80028 R tht_ca +ffffffff82e80050 r thtc_devices +ffffffff82e80068 r tht_link_state.interval +ffffffff82e81000 R myx_ca +ffffffff82e81028 R myx_devices +ffffffff82e82000 R oce_ca +ffffffff82e82030 R oce_devices +ffffffff82e83000 R dc_pci_ca +ffffffff82e84000 R epic_pci_ca +ffffffff82e84028 R epic_pci_devices +ffffffff82e85000 R ti_pci_ca +ffffffff82e85030 R ti_devices +ffffffff82e86000 R ne_pci_ca +ffffffff82e86030 R ne_pci_prod +ffffffff82e87000 R gem_pci_ca +ffffffff82e87030 R gem_pci_devices +ffffffff82e87050 r gem_promhdr +ffffffff82e87052 r gem_promdat +ffffffff82e8705a r gem_promdat2 +ffffffff82e88000 R cas_ca +ffffffff82e88028 R cas_pci_devices +ffffffff82e88030 r cas_promhdr +ffffffff82e88032 r cas_promdat_sun +ffffffff82e8803a r cas_promdat_ns +ffffffff82e88042 r cas_promdat2 +ffffffff82e89000 R sf_pci_ca +ffffffff82e89028 R sf_pci_products +ffffffff82e8a000 R sis_ca +ffffffff82e8a028 R sis_devices +ffffffff82e8b000 R se_devices +ffffffff82e8b008 R se_ca +ffffffff82e8c000 R mbg_ca +ffffffff82e8c030 R mbg_devices +ffffffff82e8d000 R uhci_pci_ca +ffffffff82e8e000 R ohci_pci_ca +ffffffff82e8f000 R ehci_pci_ca +ffffffff82e90000 R xhci_pci_ca +ffffffff82e91000 R cbb_pci_ca +ffffffff82e91028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff82e92000 R skc_devices +ffffffff82e92030 R skc_ca +ffffffff82e92058 R sk_ca +ffffffff82e93000 R mskc_devices +ffffffff82e930a8 R mskc_ca +ffffffff82e930d0 R msk_ca +ffffffff82e93100 r msk_mib +ffffffff82e94000 R puc_pci_ca +ffffffff82e95000 R puc_devs +ffffffff82e9a000 R com_puc_ca +ffffffff82e9a030 r puc_port_types +ffffffff82e9b000 R lpt_puc_ca +ffffffff82e9c000 R wi_pci_ca +ffffffff82e9c030 r wi_pci_products +ffffffff82e9d000 R an_pci_ca +ffffffff82e9d030 R an_pci_devices +ffffffff82e9e000 R iwi_devices +ffffffff82e9e010 R iwi_ca +ffffffff82e9f000 R wpi_ca +ffffffff82e9f028 r wpi_devices +ffffffff82e9f030 r wpi_rates +ffffffff82e9f050 r wpi_rf_gain_5ghz +ffffffff82e9f0a0 r wpi_dsp_gain_5ghz +ffffffff82e9f0f0 r wpi_rf_gain_2ghz +ffffffff82e9f140 r wpi_dsp_gain_2ghz +ffffffff82e9f190 r wpi_pmgt +ffffffff82e9f310 r wpi_bands +ffffffff82ea0000 R iwn_mcs2ridx +ffffffff82ea0020 R iwn_ca +ffffffff82ea0050 r iwn_devices +ffffffff82ea00e8 r iwn4965_sensitivity_limits +ffffffff82ea0124 r iwn5000_sensitivity_limits +ffffffff82ea0160 r iwn5150_sensitivity_limits +ffffffff82ea019c r iwn1000_sensitivity_limits +ffffffff82ea01d8 r iwn6000_sensitivity_limits +ffffffff82ea0214 r iwn2000_sensitivity_limits +ffffffff82ea0250 r iwn_fw_errmsg +ffffffff82ea0340 r iwn4965_set_txpower.tdiv +ffffffff82ea0360 r iwn4965_rf_gain_5ghz +ffffffff82ea03d0 r iwn4965_dsp_gain_5ghz +ffffffff82ea0440 r iwn4965_dsp_gain_2ghz +ffffffff82ea04b0 r iwn_pmgt +ffffffff82ea06f0 r iwn4965_post_alive.qid2fifo +ffffffff82ea0700 r iwn_bands +ffffffff82ea0770 r iwn_rates +ffffffff82ea0820 r iwn4965_rf_gain_2ghz +ffffffff82ea1000 R iwm_nvm_channels +ffffffff82ea1030 R iwm_nvm_channels_8000 +ffffffff82ea1070 R iwm_rates +ffffffff82ea10d0 R iwm_ht_mcs2ridx +ffffffff82ea1110 R iwm_tid_to_ac +ffffffff82ea1118 R iwm_ac_to_tx_fifo +ffffffff82ea1120 R iwm_nvm_to_read +ffffffff82ea1144 r iwm_set_hw_address_8000.reserved_mac +ffffffff82ea1180 r iwm_sf_full_timeout +ffffffff82ea11b0 r iwm_sf_full_timeout_def +ffffffff82ea11e0 r advanced_lookup +ffffffff82ea1320 r iwm_devices +ffffffff82ea1360 R iwm_ca +ffffffff82ea2000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff82ea2020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff82ea2040 R iwx_qu_b0_hr1_b0 +ffffffff82ea2060 R iwx_qu_b0_hr_b0 +ffffffff82ea2080 R iwx_ax201_cfg_qu_hr +ffffffff82ea20a0 R iwx_qu_c0_hr1_b0 +ffffffff82ea20c0 R iwx_qu_c0_hr_b0 +ffffffff82ea20e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff82ea2100 R iwx_quz_a0_hr1_b0 +ffffffff82ea2120 R iwx_ax201_cfg_quz_hr +ffffffff82ea2140 R iwx_cfg_so_a0_hr_b0 +ffffffff82ea2160 R iwx_cfg_quz_a0_hr_b0 +ffffffff82ea2180 R iwx_2ax_cfg_so_gf_a0 +ffffffff82ea21a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff82ea21c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff82ea21e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff82ea2200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff82ea2220 R iwx_2ax_cfg_so_jf_b0 +ffffffff82ea2240 R iwx_cfg_ma_b0_hr_b0 +ffffffff82ea2260 R iwx_cfg_ma_b0_gf_a0 +ffffffff82ea2280 R iwx_cfg_ma_b0_gf4_a0 +ffffffff82ea22a0 R iwx_cfg_ma_a0_fm_a0 +ffffffff82ea22c0 R iwx_nvm_channels_8000 +ffffffff82ea2300 R iwx_rates +ffffffff82ea2360 R iwx_mcs2ridx +ffffffff82ea23a0 R iwx_tid_to_ac +ffffffff82ea23a8 R iwx_ac_to_tx_fifo +ffffffff82ea23b0 r iwx_nvm_channels_uhb +ffffffff82ea241e r iwx_is_valid_mac_addr.reserved_mac +ffffffff82ea2430 r iwx_sf_full_timeout +ffffffff82ea2460 r iwx_sf_full_timeout_def +ffffffff82ea2490 r advanced_lookup +ffffffff82ea25d0 r iwx_devices +ffffffff82ea2620 r iwx_dev_info_table +ffffffff82ea2f38 R iwx_ca +ffffffff82ea3000 R qwx_pci_ca +ffffffff82ea3028 r qwx_pci_devices +ffffffff82ea3030 R qwx_msi_config_one_msi +ffffffff82ea3050 R qwx_msi_config +ffffffff82ea30c8 r qwx_pci_ops_qca6390 +ffffffff82ea30f8 r qwx_pci_ops_qcn9074 +ffffffff82ea4000 R cmpci_ca +ffffffff82ea4028 R cmpci_hw_if +ffffffff82ea40e0 r cmpci_rate_table +ffffffff82ea4120 R cmpci_devices +ffffffff82ea4130 r cmpci_query_devinfo.mixer_port_names +ffffffff82ea4160 r cmpci_query_devinfo.mixer_classes +ffffffff82ea5000 R iha_pci_ca +ffffffff82ea5028 R iha_switch +ffffffff82ea6000 R pcscp_ca +ffffffff82ea7000 R bge_ca +ffffffff82ea7030 R bge_devices +ffffffff82ea71b0 r bge_revisions +ffffffff82ea7610 r bge_majorrevs +ffffffff82ea7790 r bge_kstat_tpl +ffffffff82ea8000 R bnx_devices +ffffffff82ea8020 R bnx_ca +ffffffff82ea9000 R vge_ca +ffffffff82ea9028 R vge_devices +ffffffff82eaa000 R stge_ca +ffffffff82eaa028 R stge_mii_bitbang_ops +ffffffff82eaa050 R stge_devices +ffffffff82eab000 R nfe_ca +ffffffff82eab030 R nfe_devices +ffffffff82eac000 R et_devices +ffffffff82eac008 R et_ca +ffffffff82ead000 R jme_devices +ffffffff82ead008 R jme_ca +ffffffff82eae000 R age_devices +ffffffff82eae008 R age_ca +ffffffff82eaf000 R alc_devices +ffffffff82eaf038 R alc_ca +ffffffff82eb0000 R ale_devices +ffffffff82eb0008 R ale_ca +ffffffff82eb1000 R amdpm_ca +ffffffff82eb1030 R amdpm_ids +ffffffff82eb2000 R bce_ca +ffffffff82eb2028 R bce_devices +ffffffff82eb3000 R ath_pci_ca +ffffffff82eb4000 R athn_pci_ca +ffffffff82eb4030 r athn_pci_devices +ffffffff82eb5000 R atw_pci_ca +ffffffff82eb5028 R atw_pci_devices +ffffffff82eb6000 R rtw_pci_ca +ffffffff82eb6030 R rtw_pci_products +ffffffff82eb7000 R rtwn_pci_ca +ffffffff82eb7030 r rtwn_pci_devices +ffffffff82eb7040 r rtl8188eu_mac +ffffffff82eb71b0 r rtl8192cu_mac +ffffffff82eb7310 r rtl8192ce_mac +ffffffff82eb7458 r rtl8188eu_bb_prog +ffffffff82eb7480 r rtl8723a_bb_prog +ffffffff82eb74a8 r rtl8192ce_bb_prog_1t +ffffffff82eb74d0 r rtl8192ce_bb_prog_2t +ffffffff82eb7500 r rtl8188eu_bb_regs +ffffffff82eb7680 r rtl8188eu_bb_vals +ffffffff82eb7980 r rtl8188eu_agc_vals +ffffffff82eb7b80 r rtl8723a_bb_regs +ffffffff82eb7d00 r rtl8723a_bb_vals +ffffffff82eb7ff0 r rtl8192ce_agc_vals +ffffffff82eb8270 r rtl8192ce_bb_regs +ffffffff82eb83f0 r rtl8192ce_bb_vals_1t +ffffffff82eb86e0 r rtl8192ce_bb_vals_2t +ffffffff82eb9000 R ral_pci_ca +ffffffff82eb9030 R ral_pci_devices +ffffffff82eba000 R acx_pci_ca +ffffffff82eba028 R acx_pci_devices +ffffffff82ebb000 R pgt_pci_ca +ffffffff82ebb028 R pgt_pci_devices +ffffffff82ebc000 R malo_pci_ca +ffffffff82ebc028 R malo_pci_devices +ffffffff82ebd000 R bwi_pci_ca +ffffffff82ebd030 R bwi_pci_devices +ffffffff82ebe000 R piixpm_ca +ffffffff82ebe030 R piixpm_ids +ffffffff82ebf000 R vic_ca +ffffffff82ebf028 R vic_devices +ffffffff82ec0000 R vmx_devices +ffffffff82ec0008 R vmx_ca +ffffffff82ec0030 r vmx_tx_kstat_tpl +ffffffff82ec00d0 r vmx_kstat_rate +ffffffff82ec00e0 r vmx_rx_kstat_tpl +ffffffff82ec1000 R vmwpvs_ca +ffffffff82ec1028 R vmwpvs_switch +ffffffff82ec2000 R lii_ca +ffffffff82ec2028 R lii_devices +ffffffff82ec3000 R ichiic_ca +ffffffff82ec3030 R ichiic_ids +ffffffff82ec4000 R viapm_ca +ffffffff82ec4030 R viapm_ids +ffffffff82ec4070 r val_to_temp +ffffffff82ec4870 r val_to_uV.mult +ffffffff82ec5000 R amdiic_ca +ffffffff82ec5028 R amdiic_ids +ffffffff82ec6000 R nviic_ca +ffffffff82ec6030 R nviic_ids +ffffffff82ec7000 R sdhc_pci_ca +ffffffff82ec8000 R kate_ca +ffffffff82ec8030 r kate_proc +ffffffff82ec9000 R km_ca +ffffffff82ec9030 r km_devices +ffffffff82eca000 R ksmn_ca +ffffffff82eca030 r ksmn_devices +ffffffff82ecb000 R iosf_pci_ca +ffffffff82ecc000 R itherm_devices +ffffffff82ecc008 R itherm_ca +ffffffff82ecd000 R pchtemp_ca +ffffffff82ecd030 R pchtemp_devices +ffffffff82ece000 R rtsx_pci_ca +ffffffff82ecf000 R xspd_ca +ffffffff82ecf028 R xspd_devices +ffffffff82ed0000 R virtio_pci_ca +ffffffff82ed0028 R virtio_pci_ops +ffffffff82ed1000 R dwiic_pci_ca +ffffffff82ed1030 R dwiic_pci_ids +ffffffff82ed2000 R bwfm_pci_ca +ffffffff82ed2030 r bwfm_pci_devices +ffffffff82ed3000 R ccp_pci_ca +ffffffff82ed3030 r ccp_pci_devices +ffffffff82ed4000 r psp_pci_devices +ffffffff82ed5000 R bnxt_devices +ffffffff82ed5040 R bnxt_ca +ffffffff82ed6000 R mcx_ca +ffffffff82ed6030 r mcx_devices +ffffffff82ed6060 r mcx_rss_config +ffffffff82ed60d0 r mcx_eth_cap_map +ffffffff82ed62d0 r mcx_ext_eth_cap_map +ffffffff82ed63d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff82ed63e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82ed6400 r mcx_kstat_ppcnt_rfc2819 +ffffffff82ed6418 r mcx_kstat_ppcnt_rfc3635 +ffffffff82ed6430 r mcx_ppcnt_ieee8023_tpl +ffffffff82ed65b0 r mcx_ppcnt_rfc2863_tpl +ffffffff82ed66c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82ed6870 r mcx_ppcnt_rfc3635_tpl +ffffffff82ed69b0 r mcx_kstat_mtmp_tpl +ffffffff82ed6a50 r mcx_kstat_mtmp_rate +ffffffff82ed6a60 r mcx_queue_kstat_tpl +ffffffff82ed7000 R iavf_ca +ffffffff82ed7030 r iavf_devices +ffffffff82ed7040 r iavf_aq_regs +ffffffff82ed70b0 r iavf_link_speeds +ffffffff82ed8000 R rge_ca +ffffffff82ed8028 R rge_devices +ffffffff82ed8040 r rge_phy_config_mac_cfg2_8126.mac_cfg2_a438_value +ffffffff82ed8070 r rge_phy_config_mac_cfg2_8126.mac_cfg2_b87e_value +ffffffff82ed80c0 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff82ed80e0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff82ed8140 r rtl8125_mac_cfg3_mcu +ffffffff82ed89e0 r rtl8125_mac_cfg5_mcu +ffffffff82ed9a00 r rtl8126_mac_cfg2_mcu +ffffffff82ee0a20 r rtl8125_mac_bps +ffffffff82ee0e20 r rtl8125b_mac_bps +ffffffff82ee1048 r rge_kstats_tpl +ffffffff82ee2000 R igc_devices +ffffffff82ee2040 R igc_ca +ffffffff82ee2070 r igc_counters +ffffffff82ee3000 R ngbe_devices +ffffffff82ee3008 R ngbe_ca +ffffffff82ee4000 R com_pci_ca +ffffffff82ee4030 R com_pci_ids +ffffffff82ee5000 R ufshci_pci_ca +ffffffff82ee6000 r agp_attach.agp_max +ffffffff82ee6048 R agp_ca +ffffffff82ee7000 R intagp_ca +ffffffff82ee8000 r drm_plane_create_rotation_property.props +ffffffff82ee9000 r drm_bridge_priv_state_funcs +ffffffff82eeb000 r color_encoding_name +ffffffff82eeb020 r color_range_name +ffffffff82eec000 r drm_subpixel_enum_list +ffffffff82eec060 r drm_dpms_enum_list +ffffffff82eec0a0 r drm_dvi_i_select_enum_list +ffffffff82eec0d0 r drm_dvi_i_subconnector_enum_list +ffffffff82eec100 r drm_tv_mode_enum_list +ffffffff82eec180 r drm_tv_select_enum_list +ffffffff82eec1d0 r drm_tv_subconnector_enum_list +ffffffff82eec220 r drm_dp_subconnector_enum_list +ffffffff82eec290 r colorspace_names +ffffffff82eec310 r broadcast_rgb_names +ffffffff82eec340 r output_format_str +ffffffff82eec360 r drm_link_status_enum_list +ffffffff82eec380 r drm_scaling_mode_enum_list +ffffffff82eec3c0 r drm_aspect_ratio_enum_list +ffffffff82eec3f0 r drm_content_type_enum_list +ffffffff82eec440 r drm_panel_orientation_enum_list +ffffffff82eec480 r privacy_screen_enum +ffffffff82eed000 r drm_crtc_fence_ops +ffffffff82eee000 r drm_dmt_modes +ffffffff82ef0940 r edid_cea_modes_1 +ffffffff82ef44d0 r edid_cea_modes_193 +ffffffff82ef5180 r edid_quirk_list +ffffffff82ef5720 r drm_mode_do_interlace_quirk.cea_interlaced +ffffffff82ef5760 r edid_4k_modes +ffffffff82ef59c0 r edid_est_modes +ffffffff82ef61c0 r est3_modes +ffffffff82ef6320 r stereo_mandatory_modes +ffffffff82ef63a0 r extra_modes +ffffffff82ef7000 r drm_encoder_enum_list +ffffffff82ef9000 r drm_fbdev_client_funcs +ffffffff82efa000 r drm_fbdev_dma_helper_funcs +ffffffff82efa010 r drm_fbdev_dma_client_funcs +ffffffff82efa030 r drm_fbdev_dma_deferred_fb_ops +ffffffff82efa038 r drm_fbdev_dma_fb_ops +ffffffff82efb000 r drm_fbdev_ttm_helper_funcs +ffffffff82efb010 r drm_fbdev_ttm_fb_ops +ffffffff82efb018 r drm_fbdev_ttm_client_funcs +ffffffff82efd000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82efd004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82efd008 r drm_fb_xrgb8888_to_xrgb1555.dst_pixsize +ffffffff82efd00c r drm_fb_xrgb8888_to_argb1555.dst_pixsize +ffffffff82efd010 r drm_fb_xrgb8888_to_rgba5551.dst_pixsize +ffffffff82efd014 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff82efd018 r drm_fb_xrgb8888_to_argb8888.dst_pixsize +ffffffff82efd01c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82efd020 r drm_fb_xrgb8888_to_argb2101010.dst_pixsize +ffffffff82efd024 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82efd028 r drm_fb_xrgb8888_to_xbgr8888.dst_pixsize +ffffffff82efd02c r drm_fb_xrgb8888_to_abgr8888.dst_pixsize +ffffffff82efe000 r __drm_format_info.formats +ffffffff82eff000 R drm_pgops +ffffffff82f00000 r drm_gem_dma_default_funcs +ffffffff82f01000 R drm_gem_fb_funcs +ffffffff82f02000 r drm_ioctls +ffffffff82f04000 r dma_fence_stub_ops +ffffffff82f04040 R dma_fence_array_ops +ffffffff82f04080 R dma_fence_chain_ops +ffffffff82f040c0 R dmabufops +ffffffff82f040f8 R syncfileops +ffffffff82f05000 r drm_plane_type_enum_list +ffffffff82f06000 r tv_modes_parameters +ffffffff82f060c0 r drm_mode_status_names +ffffffff82f06200 r drm_named_modes +ffffffff82f07000 r primary_plane_funcs +ffffffff82f07068 r safe_modeset_formats +ffffffff82f08000 r orientation_data +ffffffff82f0c488 r lcd800x1280_rightside_up +ffffffff82f0c4a0 r lcd720x1280_rightside_up +ffffffff82f0c4b8 r lcd800x1280_leftside_up +ffffffff82f0c4d0 r lcd1200x1920_rightside_up +ffffffff82f0c4e8 r lcd1080x1920_leftside_up +ffffffff82f0c500 r lcd1600x2560_rightside_up +ffffffff82f0c518 r gpd_micropc +ffffffff82f0c530 r gpd_pocket +ffffffff82f0c548 r gpd_pocket2 +ffffffff82f0c560 r gpd_win +ffffffff82f0c578 r gpd_win2 +ffffffff82f0c590 r lcd1080x1920_rightside_up +ffffffff82f0c5a8 r itworks_tw891 +ffffffff82f0c5c0 r lcd1600x2560_leftside_up +ffffffff82f0c5d8 r onegx1_pro +ffffffff82f0c5f0 r lcd1280x1920_rightside_up +ffffffff82f0c608 r gpd_onemix2s +ffffffff82f0c620 r .compoundliteral +ffffffff82f0c630 r .compoundliteral.5 +ffffffff82f0c658 r .compoundliteral.9 +ffffffff82f0c678 r .compoundliteral.17 +ffffffff82f0c6b8 r .compoundliteral.21 +ffffffff82f0c6d8 r .compoundliteral.23 +ffffffff82f0c6e8 r .compoundliteral.25 +ffffffff82f0c6f8 r .compoundliteral.29 +ffffffff82f0d000 r drm_gem_prime_dmabuf_ops +ffffffff82f0f000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82f10000 r drm_dp_phy_name.phy_names +ffffffff82f10048 r drm_dp_i2c_algo +ffffffff82f10058 r drm_dp_i2c_lock_ops +ffffffff82f10070 r dp_aux_bl_ops +ffffffff82f10090 r dpcd_quirk_list +ffffffff82f10340 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82f11000 R drm_dp_mst_topology_state_funcs +ffffffff82f11020 r drm_dp_mst_req_type_str.req_type_str +ffffffff82f111f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82f11220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82f11278 r drm_dp_mst_i2c_algo +ffffffff82f12000 r rc_parameters_1_2_444 +ffffffff82f125f0 r rc_parameters_pre_scr +ffffffff82f12920 r rc_parameters_1_2_422 +ffffffff82f12df0 r rc_parameters_1_2_420 +ffffffff82f14000 r hdmi_colorimetry_val +ffffffff82f15000 R ttm_swap_ops +ffffffff82f15008 r ttm_evict_walk_ops +ffffffff82f16018 R ttm_bo_vm_ops +ffffffff82f17000 r ttm_range_manager_func +ffffffff82f18018 r ttm_kmap_iter_io_ops +ffffffff82f18030 r ttm_kmap_iter_linear_io_ops +ffffffff82f19000 r ttm_sys_manager_func +ffffffff82f1a000 r ttm_kmap_iter_tt_ops +ffffffff82f1b000 r drm_sched_fence_ops_scheduled +ffffffff82f1b040 r drm_sched_fence_ops_finished +ffffffff82f1c000 R ch7017_ops +ffffffff82f1d000 R ch7xxx_ops +ffffffff82f1d040 r ch7xxx_ids +ffffffff82f1e000 R ivch_ops +ffffffff82f1e040 r backup_addresses +ffffffff82f1f000 R ns2501_ops +ffffffff82f1f040 r mode_agnostic_values +ffffffff82f1f0c0 r ns2501_modes +ffffffff82f20000 R sil164_ops +ffffffff82f21000 R tfp410_ops +ffffffff82f22000 r chv_dpll +ffffffff82f22050 r vlv_dpll +ffffffff82f220a0 r g4x_dpll +ffffffff82f220f0 r pch_dpll +ffffffff82f22138 r intel_dp_enc_funcs +ffffffff82f23000 r intel_hdmi_enc_funcs +ffffffff82f24000 r vlv_primary_formats +ffffffff82f24030 r ivb_primary_formats +ffffffff82f24050 r i965_primary_formats +ffffffff82f24070 r i8xx_primary_formats +ffffffff82f24080 r i965_plane_funcs +ffffffff82f240e8 r i8xx_plane_funcs +ffffffff82f25000 r ilk_wm_funcs +ffffffff82f25040 r vlv_wm_funcs +ffffffff82f25080 r g4x_wm_funcs +ffffffff82f250c0 r nop_funcs +ffffffff82f25100 r pnv_wm_funcs +ffffffff82f25140 r i965_wm_funcs +ffffffff82f25180 r i9xx_wm_funcs +ffffffff82f251c0 r i845_wm_funcs +ffffffff82f25200 r cxsr_latency_table +ffffffff82f26000 r gen11_dsi_encoder_funcs +ffffffff82f26028 r gen11_dsi_connector_funcs +ffffffff82f260a0 r gen11_dsi_connector_helper_funcs +ffffffff82f26100 r gen11_dsi_host_ops +ffffffff82f27000 r intel_plane_helper_funcs +ffffffff82f28000 r g4x_audio_funcs +ffffffff82f28018 r ibx_audio_funcs +ffffffff82f28030 r hsw_audio_funcs +ffffffff82f28050 r hdmi_audio_clock +ffffffff82f280c0 r hdmi_aud_ncts_36bpp +ffffffff82f281a0 r hdmi_aud_ncts_30bpp +ffffffff82f28280 r hdmi_aud_ncts_24bpp +ffffffff82f29000 r intel_backlight_device_ops +ffffffff82f29018 r bxt_pwm_funcs +ffffffff82f29048 r cnp_pwm_funcs +ffffffff82f29078 r lpt_pwm_funcs +ffffffff82f290a8 r spt_pwm_funcs +ffffffff82f290d8 r pch_pwm_funcs +ffffffff82f29108 r ext_pwm_funcs +ffffffff82f29138 r vlv_pwm_funcs +ffffffff82f29168 r i965_pwm_funcs +ffffffff82f29198 r i9xx_pwm_funcs +ffffffff82f291c8 r pwm_bl_funcs +ffffffff82f2a000 r bdb_blocks +ffffffff82f2a160 r adlp_aux_ch_map +ffffffff82f2a169 r adls_aux_ch_map +ffffffff82f2a170 r rkl_aux_ch_map +ffffffff82f2a175 r direct_aux_ch_map +ffffffff82f2a17e r translate_iboost.mapping +ffffffff82f2a181 r adlp_ddc_pin_map +ffffffff82f2a18e r adls_ddc_pin_map +ffffffff82f2a19b r rkl_pch_tgp_ddc_pin_map +ffffffff82f2a1a6 r gen9bc_tgp_ddc_pin_map +ffffffff82f2a1b1 r icp_ddc_pin_map +ffffffff82f2a1c0 r cnp_ddc_pin_map +ffffffff82f2b000 r mtl_sa_info +ffffffff82f2b006 r adlp_sa_info +ffffffff82f2b00c r adls_sa_info +ffffffff82f2b012 r rkl_sa_info +ffffffff82f2b018 r tgl_sa_info +ffffffff82f2b020 r intel_bw_funcs +ffffffff82f2c000 r intel_cdclk_funcs +ffffffff82f2c010 r rplu_cdclk_funcs +ffffffff82f2c030 r xe2lpd_cdclk_table +ffffffff82f2c140 r xe2hpd_cdclk_table +ffffffff82f2c160 r mtl_cdclk_table +ffffffff82f2c1b8 r tgl_cdclk_funcs +ffffffff82f2c1e0 r dg2_cdclk_table +ffffffff82f2c290 r adlp_a_step_cdclk_table +ffffffff82f2c310 r rplu_cdclk_table +ffffffff82f2c400 r adlp_cdclk_table +ffffffff82f2c4c0 r rkl_cdclk_table +ffffffff82f2c5b0 r icl_cdclk_table +ffffffff82f2c698 r ehl_cdclk_funcs +ffffffff82f2c6b8 r icl_cdclk_funcs +ffffffff82f2c6d8 r bxt_cdclk_funcs +ffffffff82f2c700 r glk_cdclk_table +ffffffff82f2c730 r bxt_cdclk_table +ffffffff82f2c778 r skl_cdclk_funcs +ffffffff82f2c798 r bdw_cdclk_funcs +ffffffff82f2c7b8 r hsw_cdclk_funcs +ffffffff82f2c7d8 r chv_cdclk_funcs +ffffffff82f2c7f8 r vlv_cdclk_funcs +ffffffff82f2c818 r fixed_400mhz_cdclk_funcs +ffffffff82f2c838 r ilk_cdclk_funcs +ffffffff82f2c858 r gm45_cdclk_funcs +ffffffff82f2c878 r g33_cdclk_funcs +ffffffff82f2c898 r i965gm_cdclk_funcs +ffffffff82f2c8b8 r pnv_cdclk_funcs +ffffffff82f2c8d8 r i945gm_cdclk_funcs +ffffffff82f2c8f8 r i915gm_cdclk_funcs +ffffffff82f2c918 r i915g_cdclk_funcs +ffffffff82f2c938 r i865g_cdclk_funcs +ffffffff82f2c958 r i85x_cdclk_funcs +ffffffff82f2c978 r i845g_cdclk_funcs +ffffffff82f2c998 r i830_cdclk_funcs +ffffffff82f2c9b8 r g33_get_cdclk.div_3200 +ffffffff82f2c9be r g33_get_cdclk.div_4000 +ffffffff82f2c9c4 r g33_get_cdclk.div_4800 +ffffffff82f2c9ca r g33_get_cdclk.div_5333 +ffffffff82f2c9d0 r i965gm_get_cdclk.div_3200 +ffffffff82f2c9d3 r i965gm_get_cdclk.div_4000 +ffffffff82f2c9d6 r i965gm_get_cdclk.div_5333 +ffffffff82f2d000 r chv_color_funcs +ffffffff82f2d048 r vlv_color_funcs +ffffffff82f2d090 r i965_color_funcs +ffffffff82f2d0d8 r i9xx_color_funcs +ffffffff82f2d120 r tgl_color_funcs +ffffffff82f2d168 r icl_color_funcs +ffffffff82f2d1b0 r glk_color_funcs +ffffffff82f2d1f8 r skl_color_funcs +ffffffff82f2d240 r bdw_color_funcs +ffffffff82f2d288 r hsw_color_funcs +ffffffff82f2d2d0 r ivb_color_funcs +ffffffff82f2d318 r ilk_color_funcs +ffffffff82f2d360 r chv_cgm_csc_matrix_identity +ffffffff82f2d37e r ilk_csc_matrix_rgb_to_ycbcr +ffffffff82f2d39c r ilk_csc_matrix_limited_range +ffffffff82f2d3ba r ilk_csc_matrix_identity +ffffffff82f2e000 r icl_procmon_values +ffffffff82f2f000 r force_audio_names +ffffffff82f2f040 r broadcast_rgb_names +ffffffff82f30000 r intel_crt_connector_funcs +ffffffff82f30078 r intel_crt_enc_funcs +ffffffff82f300a0 r intel_spurious_crt_detect +ffffffff82f304a8 r intel_crt_connector_helper_funcs +ffffffff82f31000 r g4x_crtc_funcs +ffffffff82f310c0 r i965_crtc_funcs +ffffffff82f31180 r i915gm_crtc_funcs +ffffffff82f31240 r i915_crtc_funcs +ffffffff82f31300 r i8xx_crtc_funcs +ffffffff82f313c0 r bdw_crtc_funcs +ffffffff82f31480 r ilk_crtc_funcs +ffffffff82f32000 r output_format_str +ffffffff82f32020 r output_type_str +ffffffff82f33000 r intel_cursor_plane_funcs +ffffffff82f33068 r intel_cursor_formats +ffffffff82f34000 r mtl_c10_hdmi_tables +ffffffff82f34170 r mtl_c10_hdmi_25_2 +ffffffff82f3418c r mtl_c10_hdmi_27_0 +ffffffff82f341a8 r mtl_c10_hdmi_27027 +ffffffff82f341c4 r mtl_c10_hdmi_28320 +ffffffff82f341e0 r mtl_c10_hdmi_30240 +ffffffff82f341fc r mtl_c10_hdmi_31500 +ffffffff82f34218 r mtl_c10_hdmi_36000 +ffffffff82f34234 r mtl_c10_hdmi_40000 +ffffffff82f34250 r mtl_c10_hdmi_49500 +ffffffff82f3426c r mtl_c10_hdmi_50000 +ffffffff82f34288 r mtl_c10_hdmi_57284 +ffffffff82f342a4 r mtl_c10_hdmi_58000 +ffffffff82f342c0 r mtl_c10_hdmi_65000 +ffffffff82f342dc r mtl_c10_hdmi_71000 +ffffffff82f342f8 r mtl_c10_hdmi_74176 +ffffffff82f34314 r mtl_c10_hdmi_74_25 +ffffffff82f34330 r mtl_c10_hdmi_75000 +ffffffff82f3434c r mtl_c10_hdmi_78750 +ffffffff82f34368 r mtl_c10_hdmi_85500 +ffffffff82f34384 r mtl_c10_hdmi_88750 +ffffffff82f343a0 r mtl_c10_hdmi_106500 +ffffffff82f343bc r mtl_c10_hdmi_108000 +ffffffff82f343d8 r mtl_c10_hdmi_115500 +ffffffff82f343f4 r mtl_c10_hdmi_119000 +ffffffff82f34410 r mtl_c10_hdmi_135000 +ffffffff82f3442c r mtl_c10_hdmi_138500 +ffffffff82f34448 r mtl_c10_hdmi_147160 +ffffffff82f34464 r mtl_c10_hdmi_148352 +ffffffff82f34480 r mtl_c10_hdmi_148_5 +ffffffff82f3449c r mtl_c10_hdmi_154000 +ffffffff82f344b8 r mtl_c10_hdmi_162000 +ffffffff82f344d4 r mtl_c10_hdmi_167000 +ffffffff82f344f0 r mtl_c10_hdmi_197802 +ffffffff82f3450c r mtl_c10_hdmi_198000 +ffffffff82f34528 r mtl_c10_hdmi_209800 +ffffffff82f34544 r mtl_c10_hdmi_241500 +ffffffff82f34560 r mtl_c10_hdmi_262750 +ffffffff82f3457c r mtl_c10_hdmi_268500 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amdgpu_dmabuf_ops +ffffffff83020000 R amdgpu_ioctls_kms +ffffffff83020210 R amdgpu_partition_driver +ffffffff830202f8 R amdgpu_ca +ffffffff83020320 r pciidlist +ffffffff830211f0 r amdgpu_unsupported_pciidlist +ffffffff83021770 r amdgpu_kms_driver +ffffffff83022000 r amdgpu_job_fence_ops +ffffffff83022040 r amdgpu_fence_ops +ffffffff83023000 r amdgpu_gem_vm_ops +ffffffff83023048 R amdgpu_gem_object_funcs +ffffffff83024000 R amdgpu_gtt_mgr_attr_group +ffffffff83024018 r amdgpu_gtt_mgr_func +ffffffff83025000 r amdgpu_atombios_i2c_algo +ffffffff83026000 R node_id_to_phys_map +ffffffff83027000 R amdgpu_sched_ops +ffffffff83029000 r amdgpu_vram_names +ffffffff8302a000 r amdgpu_preempt_mgr_func +ffffffff8302b000 R psp_ip_funcs +ffffffff8302b0b8 R psp_v3_1_ip_block +ffffffff8302b0d0 R psp_v10_0_ip_block +ffffffff8302b0e8 R psp_v11_0_ip_block +ffffffff8302b100 R psp_v11_0_8_ip_block +ffffffff8302b118 R psp_v12_0_ip_block +ffffffff8302b130 R psp_v13_0_ip_block +ffffffff8302b148 R psp_v13_0_4_ip_block +ffffffff8302b160 R psp_v14_0_ip_block +ffffffff8302d000 r sw_ring_info +ffffffff8302e000 r amdgpu_evict_flags.placements +ffffffff83030000 r umsch_mm_v4_0_ip_funcs +ffffffff830300b8 R umsch_mm_v4_0_ip_block +ffffffff830300d0 r umsch_v4_0_ring_funcs +ffffffff83033000 R amdgpu_vkms_ip_block +ffffffff83034000 R amdgpu_vm_cpu_funcs +ffffffff83036000 R amdgpu_vm_sdma_funcs +ffffffff83037000 r amdgpu_tlb_fence_ops +ffffffff83038000 R vpe_ip_funcs +ffffffff830380b8 R vpe_v6_1_ip_block +ffffffff830380d0 r vpe_ring_funcs +ffffffff83039000 R amdgpu_vram_mgr_attr_group +ffffffff83039018 r amdgpu_vram_mgr_func +ffffffff83039040 r amdgpu_dummy_vram_mgr_func +ffffffff8303a000 r xgmi_pcs_err_status_reg_arct +ffffffff8303a020 r xgmi3x16_pcs_ras_fields +ffffffff8303a1f0 r xgmi_pcs_ras_fields +ffffffff8303a310 r wafl_pcs_ras_fields +ffffffff8303a430 r xgmi_v6_4_0_aca_info +ffffffff8303a448 r xgmi_v6_4_0_aca_bank_ops +ffffffff8303b000 r xgmi_reg_addrs +ffffffff8303c000 r GC_BASE +ffffffff8303c0c0 r HDP_BASE +ffffffff8303c180 r MMHUB_BASE +ffffffff8303c240 r ATHUB_BASE +ffffffff8303c300 r NBIF0_BASE +ffffffff8303c3c0 r MP0_BASE +ffffffff8303c480 r MP1_BASE +ffffffff8303c540 r UVD_BASE +ffffffff8303c600 r DF_BASE +ffffffff8303c6c0 r OSSSYS_BASE +ffffffff8303c780 r SDMA0_BASE +ffffffff8303c840 r SDMA1_BASE +ffffffff8303c900 r SDMA2_BASE +ffffffff8303c9c0 r SDMA3_BASE +ffffffff8303ca80 r SDMA4_BASE +ffffffff8303cb40 r SDMA5_BASE +ffffffff8303cc00 r SDMA6_BASE +ffffffff8303ccc0 r SDMA7_BASE +ffffffff8303cd80 r SMUIO_BASE +ffffffff8303ce40 r THM_BASE +ffffffff8303cf00 r UMC_BASE +ffffffff8303cfc0 r RSMU_BASE +ffffffff8303e000 r cz_ih_ip_funcs +ffffffff8303e0b8 R cz_ih_ip_block +ffffffff8303e0d0 r cz_ih_funcs +ffffffff8303f000 r crtc_offsets +ffffffff8303f020 r dce_v10_0_ip_funcs +ffffffff8303f0d8 R dce_v10_0_ip_block +ffffffff8303f0f0 R dce_v10_1_ip_block +ffffffff8303f108 r dce_v10_0_display_funcs +ffffffff8303f160 r hpd_offsets +ffffffff8303f178 r dce_v10_0_encoder_funcs +ffffffff8303f1a0 r dce_v10_0_dac_helper_funcs +ffffffff8303f208 r dce_v10_0_dig_helper_funcs +ffffffff8303f270 r dce_v10_0_ext_helper_funcs +ffffffff8303f2e0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff8303f310 r dce_v10_0_crtc_irq_funcs +ffffffff8303f320 r dce_v10_0_pageflip_irq_funcs +ffffffff8303f330 r dce_v10_0_hpd_irq_funcs +ffffffff8303f340 r interrupt_status_offsets +ffffffff8303f3a0 r dce_v10_0_crtc_funcs +ffffffff8303f460 r dce_v10_0_crtc_helper_funcs +ffffffff8303f4e0 r vga_control_regs +ffffffff8303f500 r dig_offsets +ffffffff8303f520 r pin_offsets +ffffffff8303f540 r fiji_mgcg_cgcg_init +ffffffff8303f560 r golden_settings_fiji_a10 +ffffffff8303f590 r tonga_mgcg_cgcg_init +ffffffff8303f5b0 r golden_settings_tonga_a11 +ffffffff83040000 r crtc_offsets +ffffffff83040020 r dce_v11_0_ip_funcs +ffffffff830400d8 R dce_v11_0_ip_block +ffffffff830400f0 R dce_v11_2_ip_block +ffffffff83040108 r dce_v11_0_display_funcs +ffffffff83040160 r hpd_offsets +ffffffff83040178 r dce_v11_0_encoder_funcs +ffffffff830401a0 r dce_v11_0_dac_helper_funcs +ffffffff83040208 r dce_v11_0_dig_helper_funcs +ffffffff83040270 r dce_v11_0_ext_helper_funcs +ffffffff830402e0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff83040310 r dce_v11_0_crtc_irq_funcs +ffffffff83040320 r dce_v11_0_pageflip_irq_funcs +ffffffff83040330 r dce_v11_0_hpd_irq_funcs +ffffffff83040340 r interrupt_status_offsets +ffffffff830403a0 r dce_v11_0_crtc_funcs +ffffffff83040460 r dce_v11_0_crtc_helper_funcs +ffffffff830404e0 r vga_control_regs +ffffffff83040500 r dig_offsets +ffffffff83040530 r cz_mgcg_cgcg_init +ffffffff83040550 r cz_golden_settings_a11 +ffffffff83040570 r stoney_golden_settings_a11 +ffffffff83040590 r polaris11_golden_settings_a11 +ffffffff830405d0 r polaris10_golden_settings_a11 +ffffffff83041000 R df_v1_7_funcs +ffffffff83041080 r df_v1_7_channel_number +ffffffff83042000 R df_v3_6_funcs +ffffffff83042080 r df_v3_6_channel_number +ffffffff83043000 R df_v4_15_funcs +ffffffff83044000 R df_v4_3_funcs +ffffffff83045000 R df_v4_6_2_funcs +ffffffff83046000 r GC_BASE +ffffffff830460a8 r HDP_BASE +ffffffff83046150 r MMHUB_BASE +ffffffff830461f8 r ATHUB_BASE +ffffffff830462a0 r NBIO_BASE +ffffffff83046348 r MP0_BASE +ffffffff830463f0 r MP1_BASE +ffffffff83046498 r VCN0_BASE +ffffffff83046540 r DF_BASE +ffffffff830465e8 r DCN_BASE +ffffffff83046690 r OSSSYS_BASE +ffffffff83046738 r SMUIO_BASE +ffffffff830467e0 r THM_BASE +ffffffff83047000 r gfx_v10_0_ip_funcs +ffffffff830470b8 R gfx_v10_0_ip_block +ffffffff830470d0 r gfx_v10_0_gfx_funcs +ffffffff83047140 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff8304d3e0 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff83050e00 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff830570a0 r gfx_v10_0_kiq_pm4_funcs +ffffffff830570e8 r gfx_v10_0_ring_funcs_kiq +ffffffff83057230 r gfx_v10_0_ring_funcs_gfx +ffffffff83057378 r gfx_v10_0_ring_funcs_compute +ffffffff830574c0 r gfx_v10_0_eop_irq_funcs +ffffffff830574d0 r gfx_v10_0_kiq_irq_funcs +ffffffff830574e0 r gfx_v10_0_priv_reg_irq_funcs +ffffffff830574f0 r gfx_v10_0_bad_op_irq_funcs +ffffffff83057500 r gfx_v10_0_priv_inst_irq_funcs +ffffffff83057510 r gfx_v10_0_rlc_funcs +ffffffff83057578 r gfx_v10_0_rlc_funcs_sriov +ffffffff830575e0 r gfx10_cs_data +ffffffff83057600 r gfx10_SECT_CONTEXT_defs +ffffffff83057690 r gfx10_SECT_CONTEXT_def_1 +ffffffff830579f0 r gfx10_SECT_CONTEXT_def_3 +ffffffff83057a00 r gfx10_SECT_CONTEXT_def_4 +ffffffff83057c78 r gfx10_SECT_CONTEXT_def_5 +ffffffff83057c80 r gfx10_SECT_CONTEXT_def_6 +ffffffff83057c90 r gfx10_SECT_CONTEXT_def_2 +ffffffff830580d0 r gfx10_SECT_CONTEXT_def_7 +ffffffff830581e0 r gfx10_SECT_CONTEXT_def_8 +ffffffff83058510 r golden_settings_gc_10_1 +ffffffff830588d0 r golden_settings_gc_10_0_nv10 +ffffffff830588d0 r golden_settings_gc_10_1_1 +ffffffff83058c60 r golden_settings_gc_10_1_2 +ffffffff83058c60 r golden_settings_gc_10_1_nv14 +ffffffff83059050 r golden_settings_gc_10_1_2_nv12 +ffffffff83059050 r golden_settings_gc_10_3 +ffffffff83059458 r golden_settings_gc_10_3_sienna_cichlid +ffffffff83059460 r golden_settings_gc_10_3_2 +ffffffff83059850 r golden_settings_gc_10_3_vangogh +ffffffff83059ab0 r golden_settings_gc_10_3_3 +ffffffff83059c90 r golden_settings_gc_10_3_4 +ffffffff83059ff0 r golden_settings_gc_10_3_5 +ffffffff8305a2f0 r golden_settings_gc_10_0_cyan_skillfish +ffffffff8305a620 r golden_settings_gc_10_3_6 +ffffffff8305a830 r golden_settings_gc_10_3_7 +ffffffff8305aaf0 r gc_reg_list_10_1 +ffffffff8305b450 r gc_cp_reg_list_10 +ffffffff8305b800 r gc_gfx_queue_reg_list_10 +ffffffff8305c000 r gfx_v11_0_ip_funcs +ffffffff8305c0b8 R gfx_v11_0_ip_block +ffffffff8305c0d0 r gfx_v11_0_gfx_funcs +ffffffff8305c138 r gfx_v11_0_kiq_pm4_funcs +ffffffff8305c180 r gfx_v11_0_ring_funcs_kiq +ffffffff8305c2c8 r gfx_v11_0_ring_funcs_gfx +ffffffff8305c410 r gfx_v11_0_ring_funcs_compute +ffffffff8305c558 r gfx_v11_0_eop_irq_funcs +ffffffff8305c568 r gfx_v11_0_priv_reg_irq_funcs +ffffffff8305c578 r gfx_v11_0_bad_op_irq_funcs +ffffffff8305c588 r gfx_v11_0_priv_inst_irq_funcs +ffffffff8305c598 r gfx_v11_0_rlc_gc_fed_irq_funcs +ffffffff8305c5a8 r gfx_v11_0_rlc_funcs +ffffffff8305c610 r gfx11_cs_data +ffffffff8305c630 r gfx11_SECT_CONTEXT_defs +ffffffff8305c6b0 r gfx11_SECT_CONTEXT_def_1 +ffffffff8305ca10 r gfx11_SECT_CONTEXT_def_3 +ffffffff8305ca20 r gfx11_SECT_CONTEXT_def_5 +ffffffff8305ca28 r gfx11_SECT_CONTEXT_def_6 +ffffffff8305ca30 r gfx11_SECT_CONTEXT_def_2 +ffffffff8305ce70 r gfx11_SECT_CONTEXT_def_4 +ffffffff8305d0f0 r gfx11_SECT_CONTEXT_def_7 +ffffffff8305d560 r golden_settings_gc_11_0_1 +ffffffff8305d640 r golden_settings_gc_11_0 +ffffffff8305d660 r gc_reg_list_11_0 +ffffffff8305dcb0 r gc_cp_reg_list_11 +ffffffff8305e060 r gc_gfx_queue_reg_list_11 +ffffffff8305f000 r gfx_v12_0_ip_funcs +ffffffff8305f0b8 R gfx_v12_0_ip_block +ffffffff8305f0d0 r gfx_v12_0_gfx_funcs +ffffffff8305f138 r gfx_v12_0_kiq_pm4_funcs +ffffffff8305f180 r gfx_v12_0_ring_funcs_kiq +ffffffff8305f2c8 r gfx_v12_0_ring_funcs_gfx +ffffffff8305f410 r gfx_v12_0_ring_funcs_compute +ffffffff8305f558 r gfx_v12_0_eop_irq_funcs +ffffffff8305f568 r gfx_v12_0_priv_reg_irq_funcs +ffffffff8305f578 r gfx_v12_0_bad_op_irq_funcs +ffffffff8305f588 r gfx_v12_0_priv_inst_irq_funcs +ffffffff8305f598 r gfx_v12_0_rlc_funcs +ffffffff8305f600 r gfx12_cs_data +ffffffff8305f620 r gfx12_SECT_CONTEXT_defs +ffffffff8305f690 r gfx12_SECT_CONTEXT_def_1 +ffffffff8305f718 r gfx12_SECT_CONTEXT_def_2 +ffffffff8305f720 r gfx12_SECT_CONTEXT_def_3 +ffffffff8305f730 r gfx12_SECT_CONTEXT_def_4 +ffffffff8305f750 r gfx12_SECT_CONTEXT_def_5 +ffffffff8305f780 r gfx12_SECT_CONTEXT_def_6 +ffffffff8305f7a0 r golden_settings_gc_12_0 +ffffffff8305f7c0 r golden_settings_gc_12_0_rev0 +ffffffff8305f810 r gc_reg_list_12_0 +ffffffff8305fdd0 r gc_cp_reg_list_12 +ffffffff83060180 r gc_gfx_queue_reg_list_12 +ffffffff83061000 r gfx_v8_0_ip_funcs +ffffffff830610b8 R gfx_v8_0_ip_block +ffffffff830610d0 R gfx_v8_1_ip_block +ffffffff830610e8 r gfx_v8_0_gfx_funcs +ffffffff83061150 r gfx_v8_0_ring_funcs_kiq +ffffffff83061298 r gfx_v8_0_ring_funcs_gfx +ffffffff830613e0 r gfx_v8_0_ring_funcs_compute +ffffffff83061530 r amdgpu_gds_reg_offset +ffffffff83061630 r gfx_v8_0_eop_irq_funcs +ffffffff83061640 r gfx_v8_0_priv_reg_irq_funcs +ffffffff83061650 r gfx_v8_0_priv_inst_irq_funcs +ffffffff83061660 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff83061670 r gfx_v8_0_sq_irq_funcs +ffffffff83061680 r sq_edc_source_names +ffffffff830616b8 r iceland_rlc_funcs +ffffffff83061720 r vi_cs_data +ffffffff83061740 r vi_SECT_CONTEXT_defs +ffffffff830617c0 r vi_SECT_CONTEXT_def_1 +ffffffff83061b10 r vi_SECT_CONTEXT_def_3 +ffffffff83061b30 r vi_SECT_CONTEXT_def_4 +ffffffff83061da4 r vi_SECT_CONTEXT_def_5 +ffffffff83061dac r vi_SECT_CONTEXT_def_6 +ffffffff83061db0 r vi_SECT_CONTEXT_def_2 +ffffffff83062200 r vi_SECT_CONTEXT_def_7 +ffffffff830625b0 r vgpr_init_compute_shader +ffffffff830626c0 r vgpr_init_regs +ffffffff83062750 r sgpr1_init_regs +ffffffff830627e0 r sgpr2_init_regs +ffffffff83062870 r sec_ded_counter_registers +ffffffff830628e0 r iceland_mgcg_cgcg_init +ffffffff83062be0 r golden_settings_iceland_a11 +ffffffff83062ca0 r iceland_golden_common_all +ffffffff83062d00 r fiji_mgcg_cgcg_init +ffffffff83062eb0 r golden_settings_fiji_a10 +ffffffff83062f40 r fiji_golden_common_all +ffffffff83062fc0 r tonga_mgcg_cgcg_init +ffffffff83063350 r golden_settings_tonga_a11 +ffffffff83063410 r tonga_golden_common_all +ffffffff83063470 r golden_settings_vegam_a11 +ffffffff83063540 r vegam_golden_common_all +ffffffff83063590 r golden_settings_polaris11_a11 +ffffffff83063660 r polaris11_golden_common_all +ffffffff830636b0 r golden_settings_polaris10_a11 +ffffffff83063780 r polaris10_golden_common_all +ffffffff830637e0 r cz_mgcg_cgcg_init +ffffffff83063b70 r cz_golden_settings_a11 +ffffffff83063c00 r cz_golden_common_all +ffffffff83063c60 r stoney_mgcg_cgcg_init +ffffffff83063ca0 r stoney_golden_settings_a11 +ffffffff83063d20 r stoney_golden_common_all +ffffffff83064000 R gfx_v9_0_ras_ops +ffffffff83064040 r gfx_v9_0_ip_funcs +ffffffff830640f8 R gfx_v9_0_ip_block +ffffffff83064110 r ras_gfx_subblocks +ffffffff83064b90 r gfx_v9_0_edc_counter_regs +ffffffff83064f30 r gfx_v9_0_ras_fields +ffffffff83066010 r gfx_v9_0_gfx_funcs +ffffffff83066078 r gfx_v9_0_kiq_pm4_funcs +ffffffff830660c0 r gfx_v9_0_ring_funcs_kiq +ffffffff83066208 r gfx_v9_0_ring_funcs_gfx +ffffffff83066350 r gfx_v9_0_sw_ring_funcs_gfx +ffffffff83066498 r gfx_v9_0_ring_funcs_compute +ffffffff830665e0 r gfx_v9_0_eop_irq_funcs +ffffffff830665f0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff83066600 r gfx_v9_0_bad_op_irq_funcs +ffffffff83066610 r gfx_v9_0_priv_inst_irq_funcs +ffffffff83066620 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff83066630 r gfx_v9_0_rlc_funcs +ffffffff830666a0 r gfx9_cs_data +ffffffff830666c0 r gfx9_SECT_CONTEXT_defs +ffffffff83066750 r gfx9_SECT_CONTEXT_def_1 +ffffffff83066aa0 r gfx9_SECT_CONTEXT_def_3 +ffffffff83066ab0 r gfx9_SECT_CONTEXT_def_4 +ffffffff83066d24 r gfx9_SECT_CONTEXT_def_5 +ffffffff83066d2c r gfx9_SECT_CONTEXT_def_6 +ffffffff83066d30 r gfx9_SECT_CONTEXT_def_7 +ffffffff83066e40 r gfx9_SECT_CONTEXT_def_2 +ffffffff830672b0 r gfx9_SECT_CONTEXT_def_8 +ffffffff83067520 r amdgpu_gfxoff_quirk_list +ffffffff83067570 r vgpr_init_compute_shader_arcturus +ffffffff83067e00 r vgpr_init_regs_arcturus +ffffffff83067f90 r vgpr_init_regs +ffffffff83068120 r sgpr1_init_regs +ffffffff830682b0 r sgpr2_init_regs +ffffffff83068440 r gfx_9_4_2_cleaner_shader_hex +ffffffff83068570 r golden_settings_gc_9_0 +ffffffff83068750 r golden_settings_gc_9_0_vg10 +ffffffff83068900 r golden_settings_gc_9_2_1 +ffffffff83068a80 r golden_settings_gc_9_2_1_vg12 +ffffffff83068bc0 r golden_settings_gc_9_0_vg20 +ffffffff83068cd0 r golden_settings_gc_9_4_1_arct +ffffffff83068de0 r golden_settings_gc_9_1 +ffffffff83069020 r golden_settings_gc_9_1_rv2 +ffffffff830691f0 r golden_settings_gc_9_1_rv1 +ffffffff830692a0 r golden_settings_gc_9_1_rn +ffffffff830693c0 r golden_settings_gc_9_x_common +ffffffff83069410 r gc_reg_list_9 +ffffffff83069be0 r gc_cp_reg_list_9 +ffffffff8306a000 R gfx_v9_4_ras_ops +ffffffff8306a040 r gfx_v9_4_edc_counter_regs +ffffffff8306a420 r gfx_v9_4_ras_fields +ffffffff8306c000 R vgpr_init_regs_aldebaran +ffffffff8306c1b0 R sgpr112_init_regs_aldebaran +ffffffff8306c360 R sgpr96_init_regs_aldebaran +ffffffff8306c510 R sgpr64_init_regs_aldebaran +ffffffff8306c6c0 r golden_settings_gc_9_4_2_alde +ffffffff8306c720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff8306c7b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff8306c840 r sgpr112_init_compute_shader_aldebaran +ffffffff8306ca60 r sgpr96_init_compute_shader_aldebaran +ffffffff8306cc50 r sgpr64_init_compute_shader_aldebaran +ffffffff8306cdc0 r vgpr_init_compute_shader_aldebaran +ffffffff8306d6a0 r gfx_v9_4_2_edc_counter_regs +ffffffff8306da20 r gfx_v9_4_2_ras_fields +ffffffff8306f3c0 r gfx_v9_4_2_utc_blocks +ffffffff83070000 r gfx_v9_4_3_ip_funcs +ffffffff830700b8 R gfx_v9_4_3_ip_block +ffffffff830700d0 r gfx_v9_4_3_kiq_pm4_funcs +ffffffff83070118 r gfx_v9_4_3_ring_funcs_kiq +ffffffff83070260 r gfx_v9_4_3_ring_funcs_compute +ffffffff830703a8 r gfx_v9_4_3_eop_irq_funcs +ffffffff830703b8 r gfx_v9_4_3_priv_reg_irq_funcs +ffffffff830703c8 r gfx_v9_4_3_bad_op_irq_funcs +ffffffff830703d8 r gfx_v9_4_3_priv_inst_irq_funcs +ffffffff830703e8 r gfx_v9_4_3_rlc_funcs +ffffffff83070450 r gfx_9_4_3_cleaner_shader_hex +ffffffff83070580 r gfx_v9_4_3_gfx_funcs +ffffffff830705f0 r gc_reg_list_9_4_3 +ffffffff83070a40 r gc_cp_reg_list_9_4_3 +ffffffff83070dc0 r gfx_v9_4_3_ce_reg_list +ffffffff83071150 r gfx_v9_4_3_ras_mem_list_array +ffffffff830712b0 r gfx_v9_4_3_ue_reg_list +ffffffff83071670 r gfx_v9_4_3_ras_cp_mem_list +ffffffff830716c0 r gfx_v9_4_3_ras_gcea_mem_list +ffffffff83071800 r gfx_v9_4_3_ras_gc_cane_mem_list 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nbio_v7_9_hdp_flush_reg -ffffffff830b4048 R nbio_v7_9_funcs -ffffffff830b4160 R nbio_v7_9_ras_hw_ops -ffffffff830b41a0 r nbio_v7_9_ras_controller_irq_funcs -ffffffff830b41b0 r nbio_v7_9_ras_err_event_athub_irq_funcs -ffffffff830b5000 r nv_common_ip_funcs -ffffffff830b50b8 R nv_common_ip_block -ffffffff830b50d0 r nv_asic_funcs -ffffffff830b51a0 r nv_allowed_read_registers -ffffffff830b5320 r sc_video_codecs_encode -ffffffff830b5330 r sc_video_codecs_decode_vcn1 -ffffffff830b5340 r sc_video_codecs_decode_vcn0 -ffffffff830b5350 r yc_video_codecs_decode -ffffffff830b5360 r bg_video_codecs_encode -ffffffff830b5370 r bg_video_codecs_decode -ffffffff830b5380 r nv_video_codecs_encode -ffffffff830b5390 r nv_video_codecs_decode -ffffffff830b53a0 r sc_video_codecs_encode_array -ffffffff830b53d0 r sc_video_codecs_decode_array_vcn1 -ffffffff830b5460 r sc_video_codecs_decode_array_vcn0 -ffffffff830b5500 r yc_video_codecs_decode_array -ffffffff830b5570 r bg_video_codecs_decode_array -ffffffff830b55b0 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base_strategy_list_4_display -ffffffff8317c000 r dcn10_dpp_funcs -ffffffff8317d000 r dpp_input_csc_matrix -ffffffff83180000 r dpp_input_csc_matrix +ffffffff83075000 R gfxhub_v1_0_funcs +ffffffff83076000 R gfxhub_v1_2_funcs +ffffffff83077000 R gfxhub_v2_0_funcs +ffffffff83077060 r gfxhub_v2_0_vmhub_funcs +ffffffff83077070 r gfxhub_client_ids +ffffffff83078000 R gfxhub_v2_1_funcs +ffffffff83078060 r gfxhub_v2_1_vmhub_funcs +ffffffff83078070 r gfxhub_client_ids +ffffffff83079000 R gfxhub_v3_0_funcs +ffffffff83079060 r gfxhub_v3_0_vmhub_funcs +ffffffff83079070 r gfxhub_client_ids +ffffffff8307a000 R gfxhub_v3_0_3_funcs +ffffffff8307a060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff8307a070 r gfxhub_client_ids +ffffffff8307b000 R gmc_v10_0_ip_funcs +ffffffff8307b0b8 R gmc_v10_0_ip_block +ffffffff8307b0d0 r gmc_v10_0_gmc_funcs +ffffffff8307b130 r gmc_v10_0_irq_funcs +ffffffff8307b140 r gmc_v10_0_ecc_funcs +ffffffff8307c000 R gmc_v11_0_ip_funcs +ffffffff8307c0b8 R gmc_v11_0_ip_block +ffffffff8307c0d0 r gmc_v11_0_gmc_funcs +ffffffff8307c130 r gmc_v11_0_irq_funcs +ffffffff8307c140 r gmc_v11_0_ecc_funcs +ffffffff8307d000 R gmc_v12_0_ip_funcs +ffffffff8307d0b8 R gmc_v12_0_ip_block +ffffffff8307d0d0 r gmc_v12_0_gmc_funcs +ffffffff8307d130 r gmc_v12_0_irq_funcs +ffffffff8307d140 r gmc_v12_0_ecc_funcs +ffffffff8307e000 r gmc_v7_0_ip_funcs +ffffffff8307e0b8 R gmc_v7_0_ip_block +ffffffff8307e0d0 R gmc_v7_4_ip_block +ffffffff8307e0e8 r gmc_v7_0_gmc_funcs +ffffffff8307e148 r gmc_v7_0_irq_funcs +ffffffff8307e158 r iceland_mgcg_cgcg_init +ffffffff8307e170 r golden_settings_iceland_a11 +ffffffff8307e1a0 r mc_cg_registers +ffffffff8307e1d0 r mc_cg_en +ffffffff8307e200 r mc_cg_ls_en +ffffffff8307f000 r gmc_v8_0_ip_funcs +ffffffff8307f0b8 R gmc_v8_0_ip_block +ffffffff8307f0d0 R gmc_v8_1_ip_block +ffffffff8307f0e8 R gmc_v8_5_ip_block +ffffffff8307f100 r gmc_v8_0_gmc_funcs +ffffffff8307f160 r gmc_v8_0_irq_funcs +ffffffff8307f170 r fiji_mgcg_cgcg_init +ffffffff8307f180 r golden_settings_fiji_a10 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golden_settings_mmhub_1_0_0 +ffffffff83083fa0 r golden_settings_athub_1_0_0 +ffffffff83084000 R hdp_v4_0_funcs +ffffffff83085000 R hdp_v5_0_funcs +ffffffff83086000 R hdp_v5_2_funcs +ffffffff83087000 R hdp_v6_0_funcs +ffffffff83088000 R hdp_v7_0_funcs +ffffffff83089000 r iceland_ih_ip_funcs +ffffffff830890b8 R iceland_ih_ip_block +ffffffff830890d0 r iceland_ih_funcs +ffffffff8308a000 r ih_v6_0_ip_funcs +ffffffff8308a0b8 R ih_v6_0_ip_block +ffffffff8308a0d0 r ih_v6_0_funcs +ffffffff8308a0f0 r ih_v6_0_self_irq_funcs +ffffffff8308b000 r ih_v6_1_ip_funcs +ffffffff8308b0b8 R ih_v6_1_ip_block +ffffffff8308b0d0 r ih_v6_1_funcs +ffffffff8308b0f0 r ih_v6_1_self_irq_funcs +ffffffff8308c000 r ih_v7_0_ip_funcs +ffffffff8308c0b8 R ih_v7_0_ip_block +ffffffff8308c0d0 r ih_v7_0_funcs +ffffffff8308c0f0 r ih_v7_0_self_irq_funcs +ffffffff8308d000 R gfx_v11_0_imu_funcs +ffffffff8308d030 r imu_rlc_ram_golden_11 +ffffffff8308d680 r imu_rlc_ram_golden_11_0_2 +ffffffff8308e000 r imu_rlc_ram_golden_11_0_3 +ffffffff8308f000 R gfx_v12_0_imu_funcs +ffffffff8308f030 r imu_rlc_ram_golden_12_0_1 +ffffffff83090000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff83090148 r jpeg_v1_0_irq_funcs +ffffffff83091000 r jpeg_v2_0_ip_funcs +ffffffff830910b8 R jpeg_v2_0_ip_block +ffffffff830910d0 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff83091218 r jpeg_v2_0_irq_funcs +ffffffff83092000 r jpeg_v2_5_ip_funcs +ffffffff830920b8 R jpeg_v2_5_ip_block +ffffffff830920d0 r jpeg_v2_6_ip_funcs +ffffffff83092188 R jpeg_v2_6_ip_block +ffffffff830921a0 R jpeg_v2_6_ras_hw_ops +ffffffff830921e0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff83092328 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff83092470 r jpeg_v2_5_irq_funcs +ffffffff83092480 r jpeg_v2_6_ras_irq_funcs +ffffffff83093000 r jpeg_v3_0_ip_funcs +ffffffff830930b8 R jpeg_v3_0_ip_block +ffffffff830930d0 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff83093218 r jpeg_v3_0_irq_funcs +ffffffff83094000 r jpeg_v4_0_ip_funcs +ffffffff830940b8 R jpeg_v4_0_ip_block +ffffffff830940d0 R jpeg_v4_0_ras_hw_ops +ffffffff83094110 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff83094258 r jpeg_v4_0_irq_funcs +ffffffff83094268 r jpeg_v4_0_ras_irq_funcs +ffffffff83095000 r jpeg_v4_0_3_ip_funcs +ffffffff830950b8 R jpeg_v4_0_3_ip_block +ffffffff830950d0 r jpeg_v4_0_3_dec_ring_vm_funcs +ffffffff83095218 r jpeg_v4_0_3_irq_funcs +ffffffff83095228 r jpeg_v4_0_3_ras_hw_ops +ffffffff83095270 r jpeg_v4_0_3_ue_reg_list +ffffffff83096000 r jpeg_v4_0_5_ip_funcs +ffffffff830960b8 R jpeg_v4_0_5_ip_block +ffffffff830960d0 r jpeg_v4_0_5_dec_ring_vm_funcs +ffffffff83096218 r jpeg_v4_0_5_irq_funcs +ffffffff83097000 r jpeg_v5_0_0_ip_funcs +ffffffff830970b8 R jpeg_v5_0_0_ip_block +ffffffff830970d0 r jpeg_v5_0_0_dec_ring_vm_funcs +ffffffff83097218 r jpeg_v5_0_0_irq_funcs +ffffffff83098000 R lsdma_v6_0_funcs +ffffffff83099000 R lsdma_v7_0_funcs +ffffffff8309a000 r mca_v3_0_mp0_hw_ops +ffffffff8309a040 r mca_v3_0_mp1_hw_ops +ffffffff8309a080 r mca_v3_0_mpio_hw_ops +ffffffff8309b000 r mes_v11_0_ip_funcs +ffffffff8309b0b8 R mes_v11_0_ip_block +ffffffff8309b0d0 r mes_v11_0_funcs +ffffffff8309b120 r mes_v11_0_opcodes +ffffffff8309b1c0 r mes_v11_0_misc_opcodes +ffffffff8309b1f0 r mes_v11_0_ring_funcs +ffffffff8309c000 r mes_v12_0_ip_funcs +ffffffff8309c0b8 R mes_v12_0_ip_block +ffffffff8309c0d0 r mes_v12_0_funcs +ffffffff8309c120 r mes_v12_0_opcodes +ffffffff8309c1c0 r mes_v12_0_misc_opcodes +ffffffff8309c200 r mes_v12_0_ring_funcs +ffffffff8309d000 R mmhub_v1_0_funcs +ffffffff8309d050 r mmhub_v1_0_edc_cnt_regs +ffffffff8309d0c0 r mmhub_v1_0_ras_fields +ffffffff8309e000 R mmhub_v1_7_funcs +ffffffff8309e050 r mmhub_v1_7_edc_cnt_regs +ffffffff8309e250 r mmhub_v1_7_ras_fields +ffffffff8309f9c0 r mmhub_v1_7_ea_err_status_regs +ffffffff830a0000 R mmhub_v1_8_funcs +ffffffff830a0050 r mmhub_v1_8_ras_hw_ops +ffffffff830a0090 r mmhub_v1_8_aca_info +ffffffff830a00a8 r mmhub_v1_8_aca_bank_ops +ffffffff830a00c0 r mmhub_v1_8_ce_reg_list +ffffffff830a01b0 r mmhub_v1_8_ras_memory_list +ffffffff830a02e0 r mmhub_v1_8_ue_reg_list +ffffffff830a1000 R mmhub_v2_0_funcs +ffffffff830a1050 r mmhub_v2_0_vmhub_funcs +ffffffff830a1060 r mmhub_client_ids_navi1x +ffffffff830a1190 r mmhub_client_ids_sienna_cichlid +ffffffff830a1450 r mmhub_client_ids_beige_goby +ffffffff830a2000 R mmhub_v2_3_funcs +ffffffff830a2050 r mmhub_v2_3_vmhub_funcs +ffffffff830a2060 r mmhub_client_ids_vangogh +ffffffff830a3000 R mmhub_v3_0_funcs +ffffffff830a3050 r mmhub_v3_0_vmhub_funcs +ffffffff830a3060 r mmhub_client_ids_v3_0_0 +ffffffff830a4000 R mmhub_v3_0_1_funcs +ffffffff830a4050 r mmhub_v3_0_1_vmhub_funcs +ffffffff830a4060 r mmhub_client_ids_v3_0_1 +ffffffff830a5000 R mmhub_v3_0_2_funcs +ffffffff830a5050 r mmhub_v3_0_2_vmhub_funcs +ffffffff830a5060 r mmhub_client_ids_v3_0_2 +ffffffff830a6000 R mmhub_v3_3_funcs +ffffffff830a6050 r mmhub_v3_3_vmhub_funcs +ffffffff830a6060 r mmhub_client_ids_v3_3 +ffffffff830a7000 R mmhub_v4_1_0_funcs +ffffffff830a7050 r mmhub_v4_1_0_vmhub_funcs +ffffffff830a7060 r mmhub_client_ids_v4_1_0 +ffffffff830a8000 R mmhub_v9_4_ras_hw_ops +ffffffff830a8040 R mmhub_v9_4_funcs +ffffffff830a8090 r mmhub_v9_4_edc_cnt_regs +ffffffff830a8330 r mmhub_v9_4_ras_fields +ffffffff830aa3b0 r mmhub_v9_4_err_status_regs +ffffffff830ab000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff830ab010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff830ab020 R xgpu_ai_virt_ops +ffffffff830ac000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff830ac010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff830ac020 R xgpu_nv_virt_ops +ffffffff830ad000 r xgpu_fiji_mgcg_cgcg_init +ffffffff830ad240 r xgpu_fiji_golden_settings_a10 +ffffffff830ad370 r xgpu_fiji_golden_common_all +ffffffff830ad3f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff830ad810 r xgpu_tonga_golden_settings_a11 +ffffffff830ad9d0 r xgpu_tonga_golden_common_all +ffffffff830ada28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff830ada38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff830ada48 R xgpu_vi_virt_ops +ffffffff830ae000 r navi10_ih_ip_funcs +ffffffff830ae0b8 R navi10_ih_ip_block +ffffffff830ae0d0 r navi10_ih_funcs +ffffffff830ae0f0 r navi10_ih_self_irq_funcs +ffffffff830af000 R nbif_v6_3_1_hdp_flush_reg +ffffffff830af048 R nbif_v6_3_1_funcs +ffffffff830af160 R nbif_v6_3_1_sriov_funcs +ffffffff830b0000 R nbio_v2_3_hdp_flush_reg +ffffffff830b0048 R nbio_v2_3_funcs +ffffffff830b1000 R nbio_v4_3_hdp_flush_reg +ffffffff830b1048 R nbio_v4_3_funcs +ffffffff830b1160 R nbio_v4_3_sriov_funcs +ffffffff830b1278 r nbio_v4_3_ras_err_event_athub_irq_funcs +ffffffff830b2000 R nbio_v6_1_hdp_flush_reg +ffffffff830b2048 R nbio_v6_1_funcs +ffffffff830b3000 R nbio_v7_0_hdp_flush_reg +ffffffff830b3048 R nbio_v7_0_funcs +ffffffff830b4000 R nbio_v7_11_hdp_flush_reg +ffffffff830b4048 R nbio_v7_11_funcs +ffffffff830b5000 R nbio_v7_2_hdp_flush_reg +ffffffff830b5048 R nbio_v7_2_funcs +ffffffff830b6000 R nbio_v7_4_hdp_flush_reg +ffffffff830b6048 R nbio_v7_4_ras_hw_ops +ffffffff830b6088 R nbio_v7_4_funcs +ffffffff830b61a0 r nbio_v7_4_ras_controller_irq_funcs +ffffffff830b61b0 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff830b7000 R nbio_v7_7_hdp_flush_reg +ffffffff830b7048 R nbio_v7_7_funcs +ffffffff830b8000 R nbio_v7_9_hdp_flush_reg +ffffffff830b8048 R nbio_v7_9_funcs +ffffffff830b8160 R nbio_v7_9_ras_hw_ops +ffffffff830b81a0 r nbio_v7_9_ras_controller_irq_funcs +ffffffff830b81b0 r nbio_v7_9_ras_err_event_athub_irq_funcs +ffffffff830b9000 r nv_common_ip_funcs +ffffffff830b90b8 R nv_common_ip_block +ffffffff830b90d0 r nv_asic_funcs +ffffffff830b91a0 r nv_allowed_read_registers +ffffffff830b9320 r sc_video_codecs_encode +ffffffff830b9330 r sc_video_codecs_decode_vcn1 +ffffffff830b9340 r sc_video_codecs_decode_vcn0 +ffffffff830b9350 r yc_video_codecs_decode +ffffffff830b9360 r bg_video_codecs_encode +ffffffff830b9370 r bg_video_codecs_decode +ffffffff830b9380 r nv_video_codecs_encode +ffffffff830b9390 r nv_video_codecs_decode +ffffffff830b93a0 r sc_video_codecs_encode_array +ffffffff830b93d0 r sc_video_codecs_decode_array_vcn1 +ffffffff830b9460 r sc_video_codecs_decode_array_vcn0 +ffffffff830b9500 r yc_video_codecs_decode_array +ffffffff830b9570 r bg_video_codecs_decode_array +ffffffff830b95b0 r nv_video_codecs_encode_array +ffffffff830b95e0 r nv_video_codecs_decode_array +ffffffff830ba000 r psp_v10_0_funcs +ffffffff830bb000 r psp_v11_0_funcs +ffffffff830bc000 r psp_v11_0_8_funcs +ffffffff830bd000 r psp_v12_0_funcs +ffffffff830be000 r psp_v13_0_funcs +ffffffff830bf000 r psp_v13_0_4_funcs +ffffffff830c0000 r psp_v14_0_funcs +ffffffff830c1000 r psp_v3_1_funcs +ffffffff830c2000 r sdma_v2_4_ip_funcs +ffffffff830c20b8 R sdma_v2_4_ip_block +ffffffff830c20d0 r sdma_v2_4_ring_funcs +ffffffff830c2218 r sdma_v2_4_buffer_funcs +ffffffff830c2238 r sdma_v2_4_vm_pte_funcs +ffffffff830c2258 r sdma_v2_4_trap_irq_funcs +ffffffff830c2268 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff830c2280 r iceland_mgcg_cgcg_init +ffffffff830c22a0 r golden_settings_iceland_a11 +ffffffff830c3000 r sdma_v3_0_ip_funcs +ffffffff830c30b8 R sdma_v3_0_ip_block +ffffffff830c30d0 R sdma_v3_1_ip_block +ffffffff830c30e8 r sdma_v3_0_ring_funcs +ffffffff830c3230 r sdma_v3_0_buffer_funcs +ffffffff830c3250 r sdma_v3_0_vm_pte_funcs +ffffffff830c3270 r sdma_v3_0_trap_irq_funcs +ffffffff830c3280 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff830c3290 r fiji_mgcg_cgcg_init +ffffffff830c32b0 r golden_settings_fiji_a10 +ffffffff830c3310 r tonga_mgcg_cgcg_init +ffffffff830c3330 r golden_settings_tonga_a11 +ffffffff830c33b0 r golden_settings_polaris11_a11 +ffffffff830c3430 r golden_settings_polaris10_a11 +ffffffff830c34b0 r cz_mgcg_cgcg_init +ffffffff830c34d0 r cz_golden_settings_a11 +ffffffff830c3560 r stoney_mgcg_cgcg_init +ffffffff830c3570 r stoney_golden_settings_a11 +ffffffff830c4000 R sdma_v4_0_ip_funcs +ffffffff830c40b8 R sdma_v4_0_ras_hw_ops +ffffffff830c40f8 R sdma_v4_0_ip_block +ffffffff830c4110 r sdma_v4_0_ring_funcs +ffffffff830c4258 r sdma_v4_0_page_ring_funcs +ffffffff830c43a0 r sdma_v4_0_buffer_funcs +ffffffff830c43c0 r sdma_v4_0_vm_pte_funcs +ffffffff830c43e0 r sdma_v4_0_trap_irq_funcs +ffffffff830c43f0 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff830c4400 r sdma_v4_0_ecc_irq_funcs +ffffffff830c4410 r sdma_v4_0_vm_hole_irq_funcs +ffffffff830c4420 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff830c4430 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff830c4440 r sdma_v4_0_srbm_write_irq_funcs +ffffffff830c4450 r golden_settings_sdma_4 +ffffffff830c46b0 r golden_settings_sdma_vg10 +ffffffff830c4760 r golden_settings_sdma_vg12 +ffffffff830c4810 r golden_settings_sdma0_4_2_init +ffffffff830c4830 r golden_settings_sdma0_4_2 +ffffffff830c4ac0 r golden_settings_sdma1_4_2 +ffffffff830c4d50 r golden_settings_sdma_arct +ffffffff830c5050 r golden_settings_sdma_aldebaran +ffffffff830c51c0 r golden_settings_sdma_4_1 +ffffffff830c52d0 r golden_settings_sdma_rv2 +ffffffff830c5300 r golden_settings_sdma_rv1 +ffffffff830c5330 r golden_settings_sdma_4_3 +ffffffff830c5420 r sdma_reg_list_4_0 +ffffffff830c5840 r sdma_v4_0_ras_fields +ffffffff830c6000 R sdma_v4_4_ras_hw_ops +ffffffff830c6040 r sdma_v4_4_ras_fields +ffffffff830c7000 R sdma_v4_4_2_ip_funcs +ffffffff830c70b8 R sdma_v4_4_2_ip_block +ffffffff830c70d0 r sdma_v4_4_2_ring_funcs +ffffffff830c7218 r sdma_v4_4_2_page_ring_funcs +ffffffff830c7360 r sdma_v4_4_2_buffer_funcs +ffffffff830c7380 r sdma_v4_4_2_vm_pte_funcs +ffffffff830c73a0 r sdma_v4_4_2_trap_irq_funcs +ffffffff830c73b0 r sdma_v4_4_2_illegal_inst_irq_funcs +ffffffff830c73c0 r sdma_v4_4_2_ecc_irq_funcs +ffffffff830c73d0 r sdma_v4_4_2_vm_hole_irq_funcs +ffffffff830c73e0 r sdma_v4_4_2_doorbell_invalid_irq_funcs +ffffffff830c73f0 r sdma_v4_4_2_pool_timeout_irq_funcs +ffffffff830c7400 r sdma_v4_4_2_srbm_write_irq_funcs +ffffffff830c7410 r sdma_v4_4_2_ras_hw_ops +ffffffff830c7450 r sdma_v4_4_2_aca_info +ffffffff830c7468 r sdma_v4_4_2_aca_bank_ops +ffffffff830c7480 r sdma_v4_2_2_ue_reg_list +ffffffff830c74b0 r sdma_v4_4_2_ras_memory_list +ffffffff830c7630 r sdma_reg_list_4_4_2 +ffffffff830c8000 r sdma_v5_0_ip_funcs +ffffffff830c80b8 R sdma_v5_0_ip_block +ffffffff830c80d0 r sdma_v5_0_ring_funcs +ffffffff830c8218 r sdma_v5_0_buffer_funcs +ffffffff830c8238 r sdma_v5_0_vm_pte_funcs +ffffffff830c8258 r sdma_v5_0_trap_irq_funcs +ffffffff830c8268 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff830c8280 r golden_settings_sdma_5 +ffffffff830c84c0 r golden_settings_sdma_nv10 +ffffffff830c84f0 r golden_settings_sdma_nv14 +ffffffff830c8520 r golden_settings_sdma_5_sriov +ffffffff830c8700 r golden_settings_sdma_nv12 +ffffffff830c8790 r golden_settings_sdma_cyan_skillfish +ffffffff830c8a30 r sdma_reg_list_5_0 +ffffffff830c9000 r sdma_v5_2_ip_funcs +ffffffff830c90b8 R sdma_v5_2_ip_block +ffffffff830c90d0 r sdma_v5_2_ring_funcs +ffffffff830c9218 r sdma_v5_2_buffer_funcs +ffffffff830c9238 r sdma_v5_2_vm_pte_funcs +ffffffff830c9258 r sdma_v5_2_trap_irq_funcs +ffffffff830c9268 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff830c9280 r sdma_reg_list_5_2 +ffffffff830ca000 R sdma_v6_0_ip_funcs +ffffffff830ca0b8 R sdma_v6_0_ip_block +ffffffff830ca0d0 r sdma_v6_0_ring_funcs +ffffffff830ca218 r sdma_v6_0_buffer_funcs +ffffffff830ca238 r sdma_v6_0_vm_pte_funcs +ffffffff830ca258 r sdma_v6_0_trap_irq_funcs +ffffffff830ca268 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff830ca280 r sdma_reg_list_6_0 +ffffffff830cb000 R sdma_v7_0_ip_funcs +ffffffff830cb0b8 R sdma_v7_0_ip_block +ffffffff830cb0d0 r sdma_v7_0_ring_funcs +ffffffff830cb218 r sdma_v7_0_buffer_funcs +ffffffff830cb238 r sdma_v7_0_vm_pte_funcs +ffffffff830cb258 r sdma_v7_0_trap_irq_funcs +ffffffff830cb268 r sdma_v7_0_illegal_inst_irq_funcs +ffffffff830cb280 r sdma_reg_list_7_0 +ffffffff830cc000 r smu_v11_0_i2c_algo +ffffffff830cc010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff830cc028 r smu_v11_0_i2c_control_quirks +ffffffff830cd000 R smuio_v11_0_funcs +ffffffff830ce000 R smuio_v11_0_6_funcs +ffffffff830cf000 R smuio_v13_0_funcs +ffffffff830d0000 R smuio_v13_0_3_funcs +ffffffff830d1000 R smuio_v13_0_6_funcs +ffffffff830d2000 R smuio_v14_0_2_funcs +ffffffff830d3000 R smuio_v9_0_funcs +ffffffff830d4000 r soc15_common_ip_funcs +ffffffff830d40b8 R vega10_common_ip_block +ffffffff830d40d0 r soc15_asic_funcs +ffffffff830d4198 r vega20_asic_funcs +ffffffff830d4260 r aqua_vanjaram_asic_funcs +ffffffff830d4330 r soc15_allowed_read_registers +ffffffff830d44c0 r vega_video_codecs_encode +ffffffff830d44d0 r vega_video_codecs_decode +ffffffff830d44e0 r rv_video_codecs_decode +ffffffff830d44f0 r rn_video_codecs_decode +ffffffff830d4500 r vcn_4_0_3_video_codecs_encode +ffffffff830d4510 r vcn_4_0_3_video_codecs_decode +ffffffff830d4520 r vega_video_codecs_encode_array +ffffffff830d4550 r vega_video_codecs_decode_array +ffffffff830d45d0 r rv_video_codecs_decode_array +ffffffff830d4660 r rn_video_codecs_decode_array +ffffffff830d46f0 r vcn_4_0_3_video_codecs_decode_array +ffffffff830d5000 r soc21_common_ip_funcs +ffffffff830d50b8 R soc21_common_ip_block +ffffffff830d50d0 r soc21_asic_funcs +ffffffff830d51a0 r soc21_allowed_read_registers +ffffffff830d5320 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff830d5330 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff830d5340 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff830d5350 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff830d5360 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff830d5390 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff830d53e0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff830d5420 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff830d6000 r soc24_common_ip_funcs +ffffffff830d60b8 R soc24_common_ip_block +ffffffff830d60d0 r soc24_asic_funcs +ffffffff830d61a0 r soc24_allowed_read_registers +ffffffff830d6320 r vcn_5_0_0_video_codecs_encode_vcn0 +ffffffff830d6330 r vcn_5_0_0_video_codecs_decode_vcn0 +ffffffff830d6340 r vcn_5_0_0_video_codecs_encode_array_vcn0 +ffffffff830d6380 r vcn_5_0_0_video_codecs_decode_array_vcn0 +ffffffff830d7000 r tonga_ih_ip_funcs +ffffffff830d70b8 R tonga_ih_ip_block +ffffffff830d70d0 r tonga_ih_funcs +ffffffff830d8000 R umc_v12_0_ras_hw_ops +ffffffff830d8040 r umc_v12_0_aca_bank_ops +ffffffff830d8050 R umc_v12_0_aca_info +ffffffff830d9000 R umc_v6_0_funcs +ffffffff830da000 R umc_v6_1_channel_idx_tbl +ffffffff830da080 R umc_v6_1_ras_hw_ops +ffffffff830db000 R umc_v6_7_channel_idx_tbl_second +ffffffff830db080 R umc_v6_7_channel_idx_tbl_first +ffffffff830db100 R umc_v6_7_ras_hw_ops +ffffffff830dc000 R umc_v8_10_channelnum_map_colbit_table +ffffffff830dc040 R umc_v8_10_channel_idx_tbl_ext0 +ffffffff830dc080 R umc_v8_10_channel_idx_tbl +ffffffff830dc0e0 R umc_v8_10_ras_hw_ops +ffffffff830dd000 R umc_v8_7_channel_idx_tbl +ffffffff830dd040 R umc_v8_7_ras_hw_ops +ffffffff830de000 r umsch_mm_v4_0_funcs +ffffffff830df000 r uvd_v5_0_ip_funcs +ffffffff830df0b8 R uvd_v5_0_ip_block +ffffffff830df0d0 r uvd_v5_0_ring_funcs +ffffffff830df218 r uvd_v5_0_irq_funcs +ffffffff830e0000 r uvd_v6_0_ip_funcs +ffffffff830e00b8 R uvd_v6_0_ip_block +ffffffff830e00d0 R uvd_v6_2_ip_block +ffffffff830e00e8 R uvd_v6_3_ip_block +ffffffff830e0100 r uvd_v6_0_ring_vm_funcs +ffffffff830e0248 r uvd_v6_0_ring_phys_funcs +ffffffff830e0390 r uvd_v6_0_enc_ring_vm_funcs +ffffffff830e04d8 r uvd_v6_0_irq_funcs +ffffffff830e1000 R uvd_v7_0_ip_funcs +ffffffff830e10b8 R uvd_v7_0_ip_block +ffffffff830e10d0 r uvd_v7_0_ring_vm_funcs +ffffffff830e1218 r uvd_v7_0_enc_ring_vm_funcs +ffffffff830e1360 r uvd_v7_0_irq_funcs +ffffffff830e2000 r vce_v3_0_ip_funcs +ffffffff830e20b8 R vce_v3_0_ip_block +ffffffff830e20d0 R vce_v3_1_ip_block +ffffffff830e20e8 R vce_v3_4_ip_block +ffffffff830e2100 r vce_v3_0_ring_vm_funcs +ffffffff830e2248 r vce_v3_0_ring_phys_funcs +ffffffff830e2390 r vce_v3_0_irq_funcs +ffffffff830e3000 R vce_v4_0_ip_funcs +ffffffff830e30b8 R vce_v4_0_ip_block +ffffffff830e30d0 r vce_v4_0_ring_vm_funcs +ffffffff830e3218 r vce_v4_0_irq_funcs +ffffffff830e4000 r vcn_v1_0_ip_funcs +ffffffff830e40b8 R vcn_v1_0_ip_block +ffffffff830e40d0 r vcn_v1_0_dec_ring_vm_funcs +ffffffff830e4218 r vcn_v1_0_enc_ring_vm_funcs +ffffffff830e4360 r vcn_v1_0_irq_funcs +ffffffff830e4370 r vcn_reg_list_1_0 +ffffffff830e5000 r vcn_v2_0_ip_funcs +ffffffff830e50b8 R vcn_v2_0_ip_block +ffffffff830e50d0 r vcn_v2_0_dec_ring_vm_funcs +ffffffff830e5218 r vcn_v2_0_enc_ring_vm_funcs +ffffffff830e5360 r vcn_v2_0_irq_funcs +ffffffff830e5370 r vcn_reg_list_2_0 +ffffffff830e6000 r vcn_v2_5_ip_funcs +ffffffff830e60b8 R vcn_v2_5_ip_block +ffffffff830e60d0 r vcn_v2_6_ip_funcs +ffffffff830e6188 R vcn_v2_6_ip_block +ffffffff830e61a0 R vcn_v2_6_ras_hw_ops +ffffffff830e61e0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff830e6328 r vcn_v2_5_enc_ring_vm_funcs +ffffffff830e6470 r vcn_v2_5_irq_funcs +ffffffff830e6480 r vcn_v2_6_ras_irq_funcs +ffffffff830e6490 r vcn_reg_list_2_5 +ffffffff830e7000 r vcn_v3_0_ip_funcs +ffffffff830e70b8 R vcn_v3_0_ip_block +ffffffff830e70d0 r vcn_v3_0_dec_ring_vm_funcs +ffffffff830e7218 r vcn_v3_0_enc_ring_vm_funcs +ffffffff830e7360 r vcn_v3_0_irq_funcs +ffffffff830e7370 r vcn_reg_list_3_0 +ffffffff830e8000 r vcn_v4_0_ip_funcs +ffffffff830e80b8 R vcn_v4_0_ip_block +ffffffff830e80d0 R vcn_v4_0_ras_hw_ops +ffffffff830e8110 r vcn_v4_0_irq_funcs +ffffffff830e8120 r vcn_v4_0_ras_irq_funcs +ffffffff830e8130 r vcn_reg_list_4_0 +ffffffff830e9000 r vcn_v4_0_3_ip_funcs +ffffffff830e90b8 R vcn_v4_0_3_ip_block +ffffffff830e90d0 r vcn_v4_0_3_unified_ring_vm_funcs +ffffffff830e9218 r vcn_v4_0_3_irq_funcs +ffffffff830e9228 r vcn_v4_0_3_ras_hw_ops +ffffffff830e9270 r vcn_v4_0_3_ue_reg_list +ffffffff830e92c0 r vcn_reg_list_4_0_3 +ffffffff830ea000 r vcn_v4_0_5_ip_funcs +ffffffff830ea0b8 R vcn_v4_0_5_ip_block +ffffffff830ea0d0 r vcn_v4_0_5_unified_ring_vm_funcs +ffffffff830ea218 r vcn_v4_0_5_irq_funcs +ffffffff830ea230 r vcn_reg_list_4_0_5 +ffffffff830eb000 r vcn_v5_0_0_ip_funcs +ffffffff830eb0b8 R vcn_v5_0_0_ip_block +ffffffff830eb0d0 r vcn_v5_0_0_unified_ring_vm_funcs +ffffffff830eb218 r vcn_v5_0_0_irq_funcs +ffffffff830eb230 r vcn_reg_list_5_0 +ffffffff830ec000 R vega10_ih_ip_funcs +ffffffff830ec0b8 R vega10_ih_ip_block +ffffffff830ec0d0 r vega10_ih_funcs +ffffffff830ec0f0 r vega10_ih_self_irq_funcs +ffffffff830ed000 r GC_BASE +ffffffff830ed064 r HDP_BASE +ffffffff830ed0c8 r MMHUB_BASE +ffffffff830ed12c r ATHUB_BASE +ffffffff830ed190 r NBIO_BASE +ffffffff830ed1f4 r MP0_BASE +ffffffff830ed258 r MP1_BASE +ffffffff830ed2bc r VCE_BASE +ffffffff830ed320 r VCN_BASE +ffffffff830ed384 r DF_BASE +ffffffff830ed3e8 r DCE_BASE +ffffffff830ed44c r OSSSYS_BASE +ffffffff830ed4b0 r SDMA0_BASE +ffffffff830ed514 r SDMA1_BASE +ffffffff830ed578 r SMUIO_BASE +ffffffff830ed5dc r PWR_BASE +ffffffff830ed640 r NBIF_BASE +ffffffff830ed6a4 r THM_BASE +ffffffff830ed708 r CLK_BASE +ffffffff830ee000 R vega20_ih_ip_funcs +ffffffff830ee0b8 R vega20_ih_ip_block +ffffffff830ee0d0 r vega20_ih_funcs +ffffffff830ee0f0 r vega20_ih_self_irq_funcs +ffffffff830ef000 r GC_BASE +ffffffff830ef090 r HDP_BASE +ffffffff830ef120 r MMHUB_BASE +ffffffff830ef1b0 r ATHUB_BASE +ffffffff830ef240 r NBIO_BASE +ffffffff830ef2d0 r MP0_BASE +ffffffff830ef360 r MP1_BASE +ffffffff830ef3f0 r UVD_BASE +ffffffff830ef480 r VCE_BASE +ffffffff830ef510 r DF_BASE +ffffffff830ef5a0 r DCE_BASE +ffffffff830ef630 r OSSSYS_BASE +ffffffff830ef6c0 r SDMA0_BASE +ffffffff830ef750 r SDMA1_BASE +ffffffff830ef7e0 r SMUIO_BASE +ffffffff830ef870 r THM_BASE +ffffffff830ef900 r CLK_BASE +ffffffff830ef990 r UMC_BASE +ffffffff830efa20 r RSMU_BASE +ffffffff830f0000 r vi_common_ip_block +ffffffff830f0018 r vi_common_ip_funcs +ffffffff830f00d0 r vi_asic_funcs +ffffffff830f01a0 r vi_allowed_read_registers +ffffffff830f0400 r topaz_video_codecs_encode +ffffffff830f0410 r topaz_video_codecs_decode +ffffffff830f0420 r tonga_video_codecs_encode +ffffffff830f0430 r tonga_video_codecs_decode +ffffffff830f0440 r polaris_video_codecs_encode +ffffffff830f0450 r cz_video_codecs_decode +ffffffff830f0460 r tonga_video_codecs_encode_array +ffffffff830f0480 r tonga_video_codecs_decode_array +ffffffff830f04d0 r polaris_video_codecs_encode_array +ffffffff830f0500 r cz_video_codecs_decode_array +ffffffff830f0580 r iceland_mgcg_cgcg_init +ffffffff830f05c0 r fiji_mgcg_cgcg_init +ffffffff830f0620 r tonga_mgcg_cgcg_init +ffffffff830f0680 r cz_mgcg_cgcg_init +ffffffff830f06c0 r stoney_mgcg_cgcg_init +ffffffff830f1000 r vpe_v6_1_funcs +ffffffff830f1048 r vpe_v6_1_trap_irq_funcs +ffffffff830f2000 r amdgpu_dm_funcs +ffffffff830f20b8 R dm_ip_block +ffffffff830f20d0 R amdgpu_dm_encoder_helper_funcs +ffffffff830f2138 r dm_display_funcs +ffffffff830f2190 r dmi_quirk_table +ffffffff830f31b0 r amdgpu_dm_mode_funcs +ffffffff830f31f0 r amdgpu_dm_audio_component_bind_ops +ffffffff830f3200 r amdgpu_dm_audio_component_ops +ffffffff830f3240 r dm_dmub_outbox1_low_irq.event_type +ffffffff830f3278 r amdgpu_dm_encoder_funcs +ffffffff830f32a0 r amdgpu_dm_connector_funcs +ffffffff830f3318 r amdgpu_dm_connector_helper_funcs +ffffffff830f3378 r amdgpu_dm_i2c_algo +ffffffff830f3388 r amdgpu_dm_backlight_ops +ffffffff830f3560 r add_fs_modes.common_rates +ffffffff830f5000 r amdgpu_dm_crtc_funcs +ffffffff830f50c0 r amdgpu_dm_crtc_helper_funcs +ffffffff830f6000 r dm_dtn_log_begin.msg +ffffffff830f600d r dm_dtn_log_end.msg +ffffffff830f6018 r SYNAPTICS_DEVICE_ID +ffffffff830f7000 r dm_crtc_irq_funcs +ffffffff830f7010 r dm_vline0_irq_funcs +ffffffff830f7020 r dm_dmub_outbox_irq_funcs +ffffffff830f7030 r dm_vupdate_irq_funcs +ffffffff830f7040 r dm_dmub_trace_irq_funcs +ffffffff830f7050 r dm_pageflip_irq_funcs +ffffffff830f7060 r dm_hpd_irq_funcs +ffffffff830f8000 r amdgpu_dm_encoder_funcs +ffffffff830f8028 r dm_mst_cbs +ffffffff830f8038 r dm_dp_mst_connector_funcs +ffffffff830f80b0 r dm_dp_mst_connector_helper_funcs +ffffffff830f9000 r dm_plane_funcs +ffffffff830f9068 r dm_plane_helper_funcs +ffffffff830fc000 r vbios_funcs +ffffffff830fd000 r vbios_funcs +ffffffff83102000 r command_table_helper_funcs +ffffffff83103000 r command_table_helper_funcs +ffffffff83104000 r command_table_helper_funcs +ffffffff83105000 r command_table_helper_funcs +ffffffff83106000 r dce80_max_clks_by_state +ffffffff83106028 r disp_clk_regs +ffffffff831060e0 r disp_clk_shift +ffffffff831060e8 r disp_clk_mask +ffffffff83107000 r dce110_max_clks_by_state +ffffffff83107028 r disp_clk_regs +ffffffff831070e0 r disp_clk_shift +ffffffff831070e8 r disp_clk_mask +ffffffff83108000 r dce112_max_clks_by_state +ffffffff83108028 r disp_clk_regs +ffffffff831080e0 r disp_clk_shift +ffffffff831080e8 r disp_clk_mask +ffffffff83109000 r dce120_max_clks_by_state +ffffffff8310a000 r clk_mgr_regs +ffffffff8310a0b8 r clk_mgr_shift +ffffffff8310a0c0 r clk_mgr_mask +ffffffff8310b000 r clk_mgr_regs +ffffffff8310b0b8 r clk_mgr_shift +ffffffff8310b0c0 r clk_mgr_mask +ffffffff8310c000 r clk_mgr_regs +ffffffff8310c0b8 r clk_mgr_shift +ffffffff8310c0c0 r clk_mgr_mask +ffffffff8310d000 r lpddr5_wm_table +ffffffff8310d0c0 r ddr5_wm_table +ffffffff8310e000 r lpddr5_wm_table +ffffffff8310e0c0 r ddr5_wm_table +ffffffff8310e180 r ss_info_table +ffffffff8310f000 r ddr5_wm_table +ffffffff83110000 r lpddr5_wm_table +ffffffff831100c0 r ddr4_wm_table +ffffffff83111000 r clk_mgr_regs_dcn321 +ffffffff831110b8 r clk_mgr_shift_dcn321 +ffffffff831110c0 r clk_mgr_mask_dcn321 +ffffffff831110e0 r clk_mgr_regs_dcn32 +ffffffff83111198 r clk_mgr_shift_dcn32 +ffffffff831111a0 r clk_mgr_mask_dcn32 +ffffffff83112000 r clk_mgr_regs_dcn35 +ffffffff831120b8 r clk_mgr_shift_dcn35 +ffffffff831120c0 r clk_mgr_mask_dcn35 +ffffffff831120e0 r lpddr5_wm_table +ffffffff831121a0 r ddr5_wm_table +ffffffff83112260 r ss_info_table +ffffffff83113000 r clk_mgr_regs_dcn351 +ffffffff831130b8 r clk_mgr_shift_dcn351 +ffffffff831130c0 r clk_mgr_mask_dcn351 +ffffffff83114000 r clk_mgr_regs_dcn401 +ffffffff831140b8 r clk_mgr_shift_dcn401 +ffffffff831140c0 r clk_mgr_mask_dcn401 +ffffffff83115000 r DC_BUILD_ID +ffffffff83117000 r output_csc_matrix +ffffffff831170e0 r black_color_format +ffffffff8311a000 r dccg2_funcs +ffffffff8311b000 r dccg201_funcs +ffffffff8311c000 r dccg21_funcs +ffffffff8311d000 r dccg3_funcs +ffffffff8311e000 r dccg301_funcs +ffffffff8311f000 r dccg31_funcs +ffffffff83120000 r dccg314_funcs +ffffffff83121000 r dccg32_funcs +ffffffff83122000 r dccg35_funcs +ffffffff83123000 r dccg401_funcs +ffffffff83124000 r dce_funcs +ffffffff83125000 r funcs +ffffffff83126000 R video_optimized_pixel_rates +ffffffff831261c0 r dce110_clk_src_funcs +ffffffff831261e8 r dce112_clk_src_funcs +ffffffff83126210 r dcn20_clk_src_funcs +ffffffff83126238 r dcn3_clk_src_funcs +ffffffff83126260 r dcn31_clk_src_funcs +ffffffff83126288 r dcn401_clk_src_funcs +ffffffff83127000 r dce_funcs +ffffffff83127068 r dcn10_funcs +ffffffff831270d0 r dcn20_funcs +ffffffff83127138 r dcn21_funcs +ffffffff83128000 r dce_ipp_funcs +ffffffff83129000 r dce110_lnk_enc_funcs +ffffffff8312a000 r dce_mi_funcs +ffffffff8312a090 r dce112_mi_funcs +ffffffff8312a120 r dce120_mi_funcs +ffffffff8312a1b0 r pte_settings +ffffffff8312b000 r funcs +ffffffff8312c000 r dce_link_panel_cntl_funcs +ffffffff8312d000 r filter_3tap_16p_upscale +ffffffff8312d040 r filter_3tap_16p_116 +ffffffff8312d080 r filter_3tap_16p_149 +ffffffff8312d0c0 r filter_3tap_16p_183 +ffffffff8312d100 r filter_3tap_64p_upscale +ffffffff8312d1d0 r filter_3tap_64p_116 +ffffffff8312d2a0 r filter_3tap_64p_149 +ffffffff8312d370 r filter_3tap_64p_183 +ffffffff8312d440 r filter_4tap_16p_upscale +ffffffff8312d490 r filter_4tap_16p_116 +ffffffff8312d4e0 r filter_4tap_16p_149 +ffffffff8312d530 r filter_4tap_16p_183 +ffffffff8312d580 r filter_4tap_64p_upscale +ffffffff8312d690 r filter_4tap_64p_116 +ffffffff8312d7a0 r filter_4tap_64p_149 +ffffffff8312d8b0 r filter_4tap_64p_183 +ffffffff8312d9c0 r filter_5tap_64p_upscale +ffffffff8312db10 r filter_5tap_64p_116 +ffffffff8312dc60 r filter_5tap_64p_149 +ffffffff8312ddb0 r filter_5tap_64p_183 +ffffffff8312df00 r filter_6tap_64p_upscale +ffffffff8312e090 r filter_6tap_64p_116 +ffffffff8312e220 r filter_6tap_64p_149 +ffffffff8312e3b0 r filter_6tap_64p_183 +ffffffff8312e540 r filter_7tap_64p_upscale +ffffffff8312e710 r filter_7tap_64p_116 +ffffffff8312e8e0 r filter_7tap_64p_149 +ffffffff8312eab0 r filter_7tap_64p_183 +ffffffff8312ec80 r filter_8tap_64p_upscale +ffffffff8312ee90 r filter_8tap_64p_116 +ffffffff8312f0a0 r filter_8tap_64p_149 +ffffffff8312f2b0 r filter_8tap_64p_183 +ffffffff8312f4c0 r filter_2tap_16p +ffffffff8312f4f0 r filter_2tap_64p +ffffffff83130000 r dce110_str_enc_funcs +ffffffff83130130 r audio_clock_info_table_48bpc +ffffffff831302c0 r audio_clock_info_table_36bpc +ffffffff83130450 r audio_clock_info_table +ffffffff83131000 r global_color_matrix +ffffffff831310a8 r dce_transform_funcs +ffffffff83132000 r abm_funcs +ffffffff83133000 r psr_funcs +ffffffff83133040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff83133045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff8313304a r DP_SINK_DEVICE_STR_ID_3 +ffffffff83134000 r replay_funcs +ffffffff83134040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff83134045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff83135000 r reg_offsets +ffffffff83135018 r dce110_compressor_funcs +ffffffff83136000 r dce110_mem_input_v_funcs +ffffffff83136090 r dvmm_Hw_Setting_1DTiling +ffffffff83136120 r dvmm_Hw_Setting_2DTiling +ffffffff831361b0 r dvmm_Hw_Setting_Linear +ffffffff83137000 r global_color_matrix +ffffffff831370b0 r input_csc_matrix +ffffffff83138000 r funcs +ffffffff83139000 r dce110_tg_funcs +ffffffff8313a000 r dce110_tg_v_funcs +ffffffff8313b000 r dce110_xfmv_funcs +ffffffff8313c000 r reg_offsets +ffffffff8313d000 r dce120_tg_funcs +ffffffff8313e000 r reg_offsets +ffffffff8313e048 r dce80_tg_funcs +ffffffff8313f000 R dcn10_dwbc_funcs +ffffffff83141000 r dcn10_ipp_funcs +ffffffff83141048 r dcn20_ipp_funcs +ffffffff83142000 r dcn20_dwbc_funcs +ffffffff83143000 r filter_12tap_16p_upscale +ffffffff831430e0 r filter_12tap_16p_117 +ffffffff831431c0 r filter_12tap_16p_150 +ffffffff831432a0 r filter_12tap_16p_183 +ffffffff83143380 r filter_11tap_16p_upscale +ffffffff83143450 r filter_11tap_16p_117 +ffffffff83143520 r filter_11tap_16p_150 +ffffffff831435f0 r filter_11tap_16p_183 +ffffffff831436c0 r filter_10tap_16p_upscale +ffffffff83143780 r filter_10tap_16p_117 +ffffffff83143840 r filter_10tap_16p_150 +ffffffff83143900 r filter_10tap_16p_183 +ffffffff831439c0 r filter_9tap_16p_upscale +ffffffff83143a70 r filter_9tap_16p_117 +ffffffff83143b20 r filter_9tap_16p_150 +ffffffff83143bd0 r filter_9tap_16p_183 +ffffffff83143c80 r filter_8tap_16p_upscale +ffffffff83143d10 r filter_8tap_16p_117 +ffffffff83143da0 r filter_8tap_16p_150 +ffffffff83143e30 r filter_8tap_16p_183 +ffffffff83143ec0 r filter_7tap_16p_upscale +ffffffff83143f40 r filter_7tap_16p_117 +ffffffff83143fc0 r filter_7tap_16p_150 +ffffffff83144040 r filter_7tap_16p_183 +ffffffff831440c0 r filter_6tap_16p_upscale +ffffffff83144130 r filter_6tap_16p_117 +ffffffff831441a0 r filter_6tap_16p_150 +ffffffff83144210 r filter_6tap_16p_183 +ffffffff83144280 r filter_5tap_16p_upscale +ffffffff831442e0 r filter_5tap_16p_117 +ffffffff83144340 r filter_5tap_16p_150 +ffffffff831443a0 r filter_5tap_16p_183 +ffffffff83144400 r filter_4tap_16p_upscale +ffffffff83144450 r filter_4tap_16p_117 +ffffffff831444a0 r filter_4tap_16p_150 +ffffffff831444f0 r filter_4tap_16p_183 +ffffffff83144540 r filter_3tap_16p_upscale +ffffffff83144580 r filter_3tap_16p_117 +ffffffff831445c0 r filter_3tap_16p_150 +ffffffff83144600 r filter_3tap_16p_183 +ffffffff83145000 r dcn201_link_enc_funcs +ffffffff83146000 r dcn201_mpc_funcs +ffffffff83147000 r dcn21_link_enc_funcs +ffffffff831470e0 r dcn21_mpll_cfg_ref +ffffffff83148000 r dcn30_mmhubbub_funcs +ffffffff83149000 r dcn301_link_panel_cntl_funcs +ffffffff8314a000 r dcn31_link_panel_cntl_funcs +ffffffff8314b000 r dcn10_lnk_enc_funcs +ffffffff8314c000 r audio_clock_info_table_48bpc +ffffffff8314c190 r audio_clock_info_table_36bpc +ffffffff8314c320 r audio_clock_info_table +ffffffff8314c4e0 r dcn10_str_enc_funcs +ffffffff8314d000 r dcn20_link_enc_funcs +ffffffff8314d0e0 r dcn2_mpll_cfg +ffffffff8314e000 r dcn20_str_enc_funcs +ffffffff8314f000 r dcn30_link_enc_funcs +ffffffff83150000 r dcn30_str_enc_funcs +ffffffff83151000 r dcn301_link_enc_funcs +ffffffff83152000 r dcn31_link_enc_funcs +ffffffff83153000 r dcn314_str_enc_funcs +ffffffff83154000 r dcn32_link_enc_funcs +ffffffff83155000 r dcn32_str_enc_funcs +ffffffff83156000 r dcn321_link_enc_funcs +ffffffff83157000 r dcn35_link_enc_funcs +ffffffff83158000 r dcn35_str_enc_funcs +ffffffff83159000 r dcn401_link_enc_funcs +ffffffff8315a000 r dcn401_str_enc_funcs +ffffffff8315b000 R dcn10_soc_defaults +ffffffff8315b08c R dcn10_ip_defaults +ffffffff83166000 r dml20_funcs +ffffffff83166030 r dml20v2_funcs +ffffffff83166060 r dml21_funcs +ffffffff83166090 r dml30_funcs +ffffffff831660c0 r dml31_funcs +ffffffff831660f0 r dml314_funcs +ffffffff83166120 r dml32_funcs +ffffffff83169000 r qp_table_444_8bpc_max +ffffffff83169940 r qp_table_444_8bpc_min +ffffffff8316a280 r qp_table_444_10bpc_max +ffffffff8316aec0 r qp_table_444_10bpc_min +ffffffff8316bb00 r qp_table_444_12bpc_max +ffffffff8316ca40 r qp_table_444_12bpc_min +ffffffff8316d980 r qp_table_422_8bpc_max +ffffffff8316dec0 r qp_table_422_8bpc_min +ffffffff8316e400 r qp_table_422_10bpc_max +ffffffff8316eb40 r qp_table_422_10bpc_min +ffffffff8316f280 r qp_table_422_12bpc_max +ffffffff8316fbc0 r qp_table_422_12bpc_min +ffffffff83170500 r qp_table_420_8bpc_max +ffffffff83170940 r qp_table_420_8bpc_min +ffffffff83170d80 r qp_table_420_10bpc_max +ffffffff83171340 r qp_table_420_10bpc_min +ffffffff83171900 r qp_table_420_12bpc_max +ffffffff83172040 r qp_table_420_12bpc_min +ffffffff83175000 r dml2_socbb_dcn31 +ffffffff83175c88 r dml_dcn31_soc_qos_params +ffffffff83176060 r dml2_socbb_dcn401 +ffffffff83176ce8 r dml_dcn4_variant_a_soc_qos_params +ffffffff831770c0 r dml2_dcn31_max_ip_caps +ffffffff83177138 r dml2_dcn401_max_ip_caps +ffffffff83178000 r core_dcn4_ip_caps_base +ffffffff83179000 r core_dcn4_g6_temp_read_blackout_table +ffffffff8317d000 r base_strategy_list_1_display +ffffffff8317d090 r base_strategy_list_2_display +ffffffff8317d1b0 r base_strategy_list_3_display +ffffffff8317d240 r base_strategy_list_4_display +ffffffff83180000 r dcn10_dpp_funcs ffffffff83181000 r dpp_input_csc_matrix -ffffffff83183000 r dcn20_dsc_funcs -ffffffff83184000 r dcn35_dsc_funcs -ffffffff83185000 r dcn401_dsc_funcs -ffffffff83186000 r dcn30_dwbc_funcs -ffffffff83187000 r funcs -ffffffff83187050 r hpd_regs -ffffffff831871a0 r hpd_shift -ffffffff831871b0 r hpd_mask -ffffffff831871c0 r ddc_data_regs -ffffffff831873a0 r ddc_clk_regs -ffffffff83187580 r ddc_shift -ffffffff831875a8 r ddc_mask -ffffffff83188000 r funcs -ffffffff83189000 r funcs -ffffffff83189050 r hpd_regs -ffffffff831891a0 r hpd_shift -ffffffff831891b0 r hpd_mask -ffffffff831891c0 r ddc_data_regs -ffffffff831893a0 r ddc_clk_regs -ffffffff83189580 r ddc_shift -ffffffff831895a8 r ddc_mask -ffffffff8318a000 r funcs +ffffffff83184000 r dpp_input_csc_matrix +ffffffff83185000 r dpp_input_csc_matrix +ffffffff83187000 r dcn20_dsc_funcs +ffffffff83188000 r dcn35_dsc_funcs +ffffffff83189000 r dcn401_dsc_funcs +ffffffff8318a000 r dcn30_dwbc_funcs ffffffff8318b000 r funcs ffffffff8318b050 r hpd_regs ffffffff8318b1a0 r hpd_shift @@ -50786,33 +50780,27 @@ ffffffff8318d1c0 r ddc_data_regs ffffffff8318d3a0 r ddc_clk_regs ffffffff8318d580 r ddc_shift ffffffff8318d5a8 r ddc_mask -ffffffff8318d5d0 r generic_regs -ffffffff8318d640 r generic_shift -ffffffff8318d650 r generic_mask ffffffff8318e000 r funcs ffffffff8318f000 r funcs ffffffff8318f050 r hpd_regs ffffffff8318f1a0 r hpd_shift ffffffff8318f1b0 r hpd_mask -ffffffff8318f1c0 r ddc_data_regs_dcn -ffffffff8318f370 r ddc_clk_regs_dcn -ffffffff8318f520 r ddc_shift -ffffffff8318f640 r ddc_mask -ffffffff8318f760 r generic_regs -ffffffff8318f7d0 r generic_shift -ffffffff8318f7e0 r generic_mask +ffffffff8318f1c0 r ddc_data_regs +ffffffff8318f3a0 r ddc_clk_regs +ffffffff8318f580 r ddc_shift +ffffffff8318f5a8 r ddc_mask ffffffff83190000 r funcs ffffffff83191000 r funcs ffffffff83191050 r hpd_regs -ffffffff83191168 r hpd_shift -ffffffff83191178 r hpd_mask -ffffffff83191190 r ddc_data_regs_dcn -ffffffff831912c0 r ddc_clk_regs_dcn -ffffffff831913f0 r ddc_shift -ffffffff831914e0 r ddc_mask +ffffffff831911a0 r hpd_shift +ffffffff831911b0 r hpd_mask +ffffffff831911c0 r ddc_data_regs +ffffffff831913a0 r ddc_clk_regs +ffffffff83191580 r ddc_shift +ffffffff831915a8 r ddc_mask ffffffff831915d0 r generic_regs -ffffffff83191604 r generic_shift -ffffffff8319160c r generic_mask +ffffffff83191640 r generic_shift +ffffffff83191650 r generic_mask ffffffff83192000 r funcs ffffffff83193000 r funcs ffffffff83193050 r hpd_regs @@ -50831,307 +50819,280 @@ ffffffff83195050 r hpd_regs ffffffff83195168 r hpd_shift ffffffff83195178 r hpd_mask ffffffff83195190 r ddc_data_regs_dcn -ffffffff83195300 r ddc_clk_regs_dcn -ffffffff83195470 r ddc_shift -ffffffff83195560 r ddc_mask -ffffffff83195650 r generic_regs -ffffffff831956c0 r generic_shift -ffffffff831956d0 r generic_mask +ffffffff831952c0 r ddc_clk_regs_dcn +ffffffff831953f0 r ddc_shift +ffffffff831954e0 r ddc_mask +ffffffff831955d0 r generic_regs +ffffffff83195604 r generic_shift +ffffffff8319560c r generic_mask ffffffff83196000 r funcs ffffffff83197000 r funcs ffffffff83197050 r hpd_regs -ffffffff83197168 r hpd_shift -ffffffff83197178 r hpd_mask -ffffffff83197190 r ddc_data_regs_dcn -ffffffff83197340 r ddc_clk_regs_dcn -ffffffff831974f0 r ddc_shift -ffffffff83197610 r ddc_mask -ffffffff83197730 r generic_regs -ffffffff831977a0 r generic_shift -ffffffff831977b0 r generic_mask +ffffffff831971a0 r hpd_shift +ffffffff831971b0 r hpd_mask +ffffffff831971c0 r ddc_data_regs_dcn +ffffffff83197370 r ddc_clk_regs_dcn +ffffffff83197520 r ddc_shift +ffffffff83197640 r ddc_mask +ffffffff83197760 r generic_regs +ffffffff831977d0 r generic_shift +ffffffff831977e0 r generic_mask ffffffff83198000 r funcs ffffffff83199000 r funcs ffffffff83199050 r hpd_regs -ffffffff83199130 r hpd_shift -ffffffff83199140 r hpd_mask -ffffffff83199150 r ddc_data_regs_dcn +ffffffff83199168 r hpd_shift +ffffffff83199178 r hpd_mask +ffffffff83199190 r ddc_data_regs_dcn ffffffff83199300 r ddc_clk_regs_dcn -ffffffff831994b0 r ddc_shift -ffffffff831995d0 r ddc_mask -ffffffff831996f0 r generic_regs -ffffffff83199760 r generic_shift -ffffffff83199770 r generic_mask +ffffffff83199470 r ddc_shift +ffffffff83199560 r ddc_mask +ffffffff83199650 r generic_regs +ffffffff831996c0 r generic_shift +ffffffff831996d0 r generic_mask ffffffff8319a000 r funcs ffffffff8319b000 r funcs +ffffffff8319b050 r hpd_regs +ffffffff8319b168 r hpd_shift +ffffffff8319b178 r hpd_mask +ffffffff8319b190 r ddc_data_regs_dcn +ffffffff8319b340 r ddc_clk_regs_dcn +ffffffff8319b4f0 r ddc_shift +ffffffff8319b610 r ddc_mask +ffffffff8319b730 r generic_regs +ffffffff8319b7a0 r generic_shift +ffffffff8319b7b0 r generic_mask ffffffff8319c000 r funcs ffffffff8319d000 r funcs -ffffffff8319e000 r hdmi_14_protection -ffffffff8319e010 r dp_11_protection -ffffffff8319e020 r hdcp_i2c_offsets -ffffffff8319e050 r hdcp_dpcd_addrs -ffffffff8319f000 r dcn30_str_enc_funcs -ffffffff831a0000 r hubbub1_funcs -ffffffff831a1000 r hubbub2_funcs -ffffffff831a2000 r hubbub201_funcs -ffffffff831a3000 r hubbub21_funcs -ffffffff831a4000 r hubbub30_funcs -ffffffff831a5000 r hubbub301_funcs -ffffffff831a6000 r hubbub31_funcs -ffffffff831a7000 r hubbub32_funcs -ffffffff831a8000 r hubbub35_funcs -ffffffff831a9000 r hubbub4_01_funcs -ffffffff831aa000 r dcn10_hubp_funcs -ffffffff831ab000 r reg_offsets -ffffffff831ac000 r dce110_funcs -ffffffff831ac358 r dce110_private_funcs -ffffffff831ad000 r reg_offsets -ffffffff831ae000 r reduceSizeAndFraction.prime_numbers -ffffffff831af000 r dcn10_funcs -ffffffff831af358 r dcn10_private_funcs -ffffffff831b1000 r dcn20_funcs -ffffffff831b1358 r dcn20_private_funcs -ffffffff831b2000 r dcn201_funcs -ffffffff831b2358 r dcn201_private_funcs -ffffffff831b3000 r dcn21_funcs -ffffffff831b3358 r dcn21_private_funcs -ffffffff831b5000 r dcn30_funcs -ffffffff831b5358 r dcn30_private_funcs -ffffffff831b6000 r dcn301_funcs -ffffffff831b6358 r dcn301_private_funcs -ffffffff831b7000 r dcn31_funcs -ffffffff831b7358 r dcn31_private_funcs -ffffffff831b8000 r dcn314_funcs -ffffffff831b8358 r dcn314_private_funcs -ffffffff831b9000 r dcn32_funcs -ffffffff831b9358 r dcn32_private_funcs -ffffffff831ba000 r dcn35_funcs -ffffffff831ba358 r dcn35_private_funcs -ffffffff831bb000 r dcn351_funcs -ffffffff831bb358 r dcn351_private_funcs -ffffffff831bd000 r dcn401_funcs -ffffffff831bd358 r dcn401_private_funcs -ffffffff831be000 r irq_service_funcs_dce110 -ffffffff831be010 r irq_source_info_dce110 -ffffffff831c0000 r irq_service_funcs_dce120 -ffffffff831c0010 r irq_source_info_dce120 -ffffffff831c2000 r irq_service_funcs_dce80 -ffffffff831c2010 r irq_source_info_dce80 -ffffffff831c4000 r irq_service_funcs_dcn10 -ffffffff831c4010 r irq_source_info_dcn10 -ffffffff831c6000 r irq_service_funcs_dcn20 -ffffffff831c6010 r irq_source_info_dcn20 -ffffffff831c8000 r irq_service_funcs_dcn201 -ffffffff831c8010 r irq_source_info_dcn201 -ffffffff831ca000 r irq_service_funcs_dcn21 -ffffffff831ca010 r irq_source_info_dcn21 -ffffffff831cc000 r irq_source_info_dcn30 -ffffffff831cd3b0 r irq_service_funcs_dcn30 -ffffffff831ce000 r irq_source_info_dcn302 -ffffffff831cf3b0 r irq_service_funcs_dcn302 -ffffffff831d0000 r irq_service_funcs_dcn303 -ffffffff831d0010 r irq_source_info_dcn303 -ffffffff831d2000 r irq_service_funcs_dcn31 -ffffffff831d2010 r irq_source_info_dcn31 -ffffffff831d4000 r irq_service_funcs_dcn314 -ffffffff831d4010 r irq_source_info_dcn314 -ffffffff831d6000 r irq_service_funcs_dcn315 -ffffffff831d6010 r irq_source_info_dcn315 -ffffffff831d8000 r irq_service_funcs_dcn32 -ffffffff831d8010 r irq_source_info_dcn32 -ffffffff831da000 r irq_service_funcs_dcn401 -ffffffff831da010 r irq_source_info_dcn401 -ffffffff831dd000 r dio_link_hwss -ffffffff831de000 r dio_fixed_vs_pe_retimer_link_hwss -ffffffff831df000 r dpia_link_hwss -ffffffff831e0000 r hpo_dp_link_hwss -ffffffff831e1000 r hpo_fixed_vs_pe_retimer_dp_link_hwss -ffffffff831e2000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff831e3000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff831e3006 r DP_DVI_CONVERTER_ID_4 -ffffffff831e300d r DP_DVI_CONVERTER_ID_5 -ffffffff831e4000 r dp_lt_fallbacks -ffffffff831e8000 r mandatory_dpcd_partitions -ffffffff831e9000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff831e9007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff831ea000 r dcn20_mmhubbub_funcs -ffffffff831eb000 r dcn32_mmhubbub_funcs -ffffffff831ec000 r dcn10_mpc_funcs -ffffffff831ed000 r dcn20_mpc_funcs -ffffffff831ee000 r dcn30_mpc_funcs -ffffffff831ef000 r dcn32_mpc_funcs -ffffffff831f0000 r dcn401_mpc_funcs -ffffffff831f1000 r dcn10_opp_funcs -ffffffff831f2000 r dcn10_tg_funcs -ffffffff831f3000 r pg_cntl35_funcs -ffffffff831f4000 r bios_regs -ffffffff831f4008 r res_cap -ffffffff831f4048 r dce100_res_pool_funcs -ffffffff831f4150 r clk_src_regs -ffffffff831f424c r dmcu_regs -ffffffff831f42a8 r dmcu_shift -ffffffff831f42bc r dmcu_mask -ffffffff831f4308 r abm_regs -ffffffff831f4370 r abm_shift -ffffffff831f4394 r abm_mask -ffffffff831f4420 r debug_defaults -ffffffff831f4650 r dce100_tg_offsets -ffffffff831f4698 r plane_cap -ffffffff831f46c8 r res_create_funcs -ffffffff831f4700 r panel_cntl_regs -ffffffff831f4720 r panel_cntl_shift -ffffffff831f4730 r panel_cntl_mask -ffffffff831f4770 r link_enc_regs -ffffffff831f4b30 r link_enc_aux_regs -ffffffff831f4b80 r link_enc_hpd_regs -ffffffff831f4b98 r link_enc_feature -ffffffff831f4ba8 r cs_shift -ffffffff831f4bb4 r cs_mask -ffffffff831f4be0 r mi_regs -ffffffff831f4ef8 r mi_shifts -ffffffff831f4f40 r mi_masks -ffffffff831f5060 r ipp_regs -ffffffff831f5258 r ipp_shift -ffffffff831f5280 r ipp_mask -ffffffff831f5320 r xfm_regs -ffffffff831f58c0 r xfm_shift -ffffffff831f5920 r xfm_mask -ffffffff831f5aa0 r opp_regs -ffffffff831f5bf0 r opp_shift -ffffffff831f5c1c r opp_mask -ffffffff831f5cd0 r aux_engine_regs -ffffffff831f5dc0 r aux_mask -ffffffff831f5e20 r aux_shift -ffffffff831f5e40 r i2c_hw_regs -ffffffff831f5f90 r i2c_shifts -ffffffff831f5fbc r i2c_masks -ffffffff831f6070 r audio_regs -ffffffff831f61a4 r audio_shift -ffffffff831f61bc r audio_mask -ffffffff831f6200 r stream_enc_regs -ffffffff831f68ac r se_shift -ffffffff831f6930 r se_mask -ffffffff831f6b34 r hwseq_reg -ffffffff831f6d7c r hwseq_shift -ffffffff831f6e30 r hwseq_mask +ffffffff8319d050 r hpd_regs +ffffffff8319d130 r hpd_shift +ffffffff8319d140 r hpd_mask +ffffffff8319d150 r ddc_data_regs_dcn +ffffffff8319d300 r ddc_clk_regs_dcn +ffffffff8319d4b0 r ddc_shift +ffffffff8319d5d0 r ddc_mask +ffffffff8319d6f0 r generic_regs +ffffffff8319d760 r generic_shift +ffffffff8319d770 r generic_mask +ffffffff8319e000 r funcs +ffffffff8319f000 r funcs +ffffffff831a0000 r funcs +ffffffff831a1000 r funcs +ffffffff831a2000 r hdmi_14_protection +ffffffff831a2010 r dp_11_protection +ffffffff831a2020 r hdcp_i2c_offsets +ffffffff831a2050 r hdcp_dpcd_addrs +ffffffff831a3000 r dcn30_str_enc_funcs +ffffffff831a4000 r hubbub1_funcs +ffffffff831a5000 r hubbub2_funcs +ffffffff831a6000 r hubbub201_funcs +ffffffff831a7000 r hubbub21_funcs +ffffffff831a8000 r hubbub30_funcs +ffffffff831a9000 r hubbub301_funcs +ffffffff831aa000 r hubbub31_funcs +ffffffff831ab000 r hubbub32_funcs +ffffffff831ac000 r hubbub35_funcs +ffffffff831ad000 r hubbub4_01_funcs +ffffffff831ae000 r dcn10_hubp_funcs +ffffffff831af000 r reg_offsets +ffffffff831b0000 r dce110_funcs +ffffffff831b0358 r dce110_private_funcs +ffffffff831b1000 r reg_offsets +ffffffff831b2000 r reduceSizeAndFraction.prime_numbers +ffffffff831b3000 r dcn10_funcs +ffffffff831b3358 r dcn10_private_funcs +ffffffff831b5000 r dcn20_funcs +ffffffff831b5358 r dcn20_private_funcs +ffffffff831b6000 r dcn201_funcs +ffffffff831b6358 r dcn201_private_funcs +ffffffff831b7000 r dcn21_funcs +ffffffff831b7358 r dcn21_private_funcs +ffffffff831b9000 r dcn30_funcs +ffffffff831b9358 r dcn30_private_funcs +ffffffff831ba000 r dcn301_funcs +ffffffff831ba358 r dcn301_private_funcs +ffffffff831bb000 r dcn31_funcs +ffffffff831bb358 r dcn31_private_funcs +ffffffff831bc000 r dcn314_funcs +ffffffff831bc358 r dcn314_private_funcs +ffffffff831bd000 r dcn32_funcs +ffffffff831bd358 r dcn32_private_funcs +ffffffff831be000 r dcn35_funcs +ffffffff831be358 r dcn35_private_funcs +ffffffff831bf000 r dcn351_funcs +ffffffff831bf358 r dcn351_private_funcs +ffffffff831c1000 r dcn401_funcs +ffffffff831c1358 r dcn401_private_funcs +ffffffff831c2000 r irq_service_funcs_dce110 +ffffffff831c2010 r irq_source_info_dce110 +ffffffff831c4000 r irq_service_funcs_dce120 +ffffffff831c4010 r irq_source_info_dce120 +ffffffff831c6000 r irq_service_funcs_dce80 +ffffffff831c6010 r irq_source_info_dce80 +ffffffff831c8000 r irq_service_funcs_dcn10 +ffffffff831c8010 r irq_source_info_dcn10 +ffffffff831ca000 r irq_service_funcs_dcn20 +ffffffff831ca010 r irq_source_info_dcn20 +ffffffff831cc000 r irq_service_funcs_dcn201 +ffffffff831cc010 r irq_source_info_dcn201 +ffffffff831ce000 r irq_service_funcs_dcn21 +ffffffff831ce010 r irq_source_info_dcn21 +ffffffff831d0000 r irq_source_info_dcn30 +ffffffff831d13b0 r irq_service_funcs_dcn30 +ffffffff831d2000 r irq_source_info_dcn302 +ffffffff831d33b0 r irq_service_funcs_dcn302 +ffffffff831d4000 r irq_service_funcs_dcn303 +ffffffff831d4010 r irq_source_info_dcn303 +ffffffff831d6000 r irq_service_funcs_dcn31 +ffffffff831d6010 r irq_source_info_dcn31 +ffffffff831d8000 r irq_service_funcs_dcn314 +ffffffff831d8010 r irq_source_info_dcn314 +ffffffff831da000 r irq_service_funcs_dcn315 +ffffffff831da010 r irq_source_info_dcn315 +ffffffff831dc000 r irq_service_funcs_dcn32 +ffffffff831dc010 r irq_source_info_dcn32 +ffffffff831de000 r irq_service_funcs_dcn401 +ffffffff831de010 r irq_source_info_dcn401 +ffffffff831e1000 r dio_link_hwss +ffffffff831e2000 r dio_fixed_vs_pe_retimer_link_hwss +ffffffff831e3000 r dpia_link_hwss +ffffffff831e4000 r hpo_dp_link_hwss +ffffffff831e5000 r hpo_fixed_vs_pe_retimer_dp_link_hwss +ffffffff831e6000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff831e7000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff831e7006 r DP_DVI_CONVERTER_ID_4 +ffffffff831e700d r DP_DVI_CONVERTER_ID_5 +ffffffff831e8000 r dp_lt_fallbacks +ffffffff831ec000 r mandatory_dpcd_partitions +ffffffff831ed000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff831ed007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff831ee000 r dcn20_mmhubbub_funcs +ffffffff831ef000 r dcn32_mmhubbub_funcs +ffffffff831f0000 r dcn10_mpc_funcs +ffffffff831f1000 r dcn20_mpc_funcs +ffffffff831f2000 r dcn30_mpc_funcs +ffffffff831f3000 r dcn32_mpc_funcs +ffffffff831f4000 r dcn401_mpc_funcs +ffffffff831f5000 r dcn10_opp_funcs +ffffffff831f6000 r dcn10_tg_funcs +ffffffff831f7000 r pg_cntl35_funcs ffffffff831f8000 r bios_regs -ffffffff831f8008 r dce110_res_pool_funcs -ffffffff831f8110 r debug_defaults -ffffffff831f8340 r clk_src_regs -ffffffff831f843c r dmcu_regs -ffffffff831f8498 r dmcu_shift -ffffffff831f84ac r dmcu_mask -ffffffff831f84f8 r abm_regs -ffffffff831f8560 r abm_shift -ffffffff831f8584 r abm_mask -ffffffff831f8610 r dce110_tg_offsets -ffffffff831f8658 r res_create_funcs -ffffffff831f8688 r plane_cap -ffffffff831f86b4 r underlay_plane_cap -ffffffff831f86e0 r stoney_resource_cap -ffffffff831f871c r carrizo_resource_cap -ffffffff831f8760 r panel_cntl_regs -ffffffff831f8780 r panel_cntl_shift -ffffffff831f8790 r panel_cntl_mask -ffffffff831f87d0 r link_enc_regs -ffffffff831f8b90 r link_enc_aux_regs -ffffffff831f8be0 r link_enc_hpd_regs -ffffffff831f8bf8 r link_enc_feature -ffffffff831f8c08 r cs_shift -ffffffff831f8c14 r cs_mask -ffffffff831f8c40 r mi_regs -ffffffff831f8dcc r mi_shifts -ffffffff831f8e14 r mi_masks -ffffffff831f8f30 r ipp_regs -ffffffff831f902c r ipp_shift -ffffffff831f9054 r ipp_mask -ffffffff831f90f0 r xfm_regs -ffffffff831f93c0 r xfm_shift -ffffffff831f9420 r xfm_mask -ffffffff831f95a0 r opp_regs -ffffffff831f96f0 r opp_shift -ffffffff831f971c r opp_mask -ffffffff831f97d0 r aux_engine_regs -ffffffff831f98c0 r aux_mask -ffffffff831f9920 r aux_shift -ffffffff831f9940 r i2c_hw_regs -ffffffff831f9a90 r i2c_shifts -ffffffff831f9abc r i2c_masks -ffffffff831f9b70 r audio_regs -ffffffff831f9ca4 r audio_shift -ffffffff831f9cbc r audio_mask -ffffffff831f9d00 r stream_enc_regs -ffffffff831f9fdc r se_shift -ffffffff831fa060 r se_mask -ffffffff831fa264 r hwseq_stoney_reg -ffffffff831fa4ac r hwseq_cz_reg -ffffffff831fa6f4 r hwseq_shift -ffffffff831fa7a8 r hwseq_mask -ffffffff831fb000 r bios_regs -ffffffff831fb008 r dce112_res_pool_funcs -ffffffff831fb110 r debug_defaults -ffffffff831fb340 r clk_src_regs -ffffffff831fb538 r dmcu_regs -ffffffff831fb594 r dmcu_shift -ffffffff831fb5a8 r dmcu_mask -ffffffff831fb5f4 r abm_regs -ffffffff831fb65c r abm_shift -ffffffff831fb680 r abm_mask -ffffffff831fb710 r dce112_tg_offsets -ffffffff831fb758 r res_create_funcs -ffffffff831fb788 r plane_cap -ffffffff831fb7b4 r polaris_11_resource_cap -ffffffff831fb7f0 r polaris_10_resource_cap -ffffffff831fb830 r panel_cntl_regs -ffffffff831fb850 r panel_cntl_shift -ffffffff831fb860 r panel_cntl_mask -ffffffff831fb8a0 r link_enc_regs -ffffffff831fbc60 r link_enc_aux_regs -ffffffff831fbcb0 r link_enc_hpd_regs -ffffffff831fbcc8 r link_enc_feature -ffffffff831fbcd8 r cs_shift -ffffffff831fbce4 r cs_mask -ffffffff831fbd10 r mi_regs -ffffffff831fc028 r mi_shifts -ffffffff831fc070 r mi_masks -ffffffff831fc190 r ipp_regs -ffffffff831fc388 r ipp_shift -ffffffff831fc3b0 r ipp_mask -ffffffff831fc450 r xfm_regs -ffffffff831fc9f0 r xfm_shift -ffffffff831fca50 r xfm_mask -ffffffff831fcbd0 r opp_regs -ffffffff831fcd20 r opp_shift -ffffffff831fcd4c r opp_mask -ffffffff831fce00 r aux_engine_regs -ffffffff831fcef0 r aux_mask -ffffffff831fcf50 r aux_shift -ffffffff831fcf70 r i2c_hw_regs -ffffffff831fd0c0 r i2c_shifts -ffffffff831fd0ec r i2c_masks -ffffffff831fd1a0 r audio_regs -ffffffff831fd2a8 r audio_shift -ffffffff831fd2c0 r audio_mask -ffffffff831fd300 r stream_enc_regs -ffffffff831fd8b8 r se_shift -ffffffff831fd93c r se_mask -ffffffff831fdb40 r hwseq_reg -ffffffff831fdd88 r hwseq_shift -ffffffff831fde3c r hwseq_mask +ffffffff831f8008 r res_cap +ffffffff831f8048 r dce100_res_pool_funcs +ffffffff831f8150 r clk_src_regs +ffffffff831f824c r dmcu_regs +ffffffff831f82a8 r dmcu_shift +ffffffff831f82bc r dmcu_mask +ffffffff831f8308 r abm_regs +ffffffff831f8370 r abm_shift +ffffffff831f8394 r abm_mask +ffffffff831f8420 r debug_defaults +ffffffff831f8650 r dce100_tg_offsets +ffffffff831f8698 r plane_cap +ffffffff831f86c8 r res_create_funcs +ffffffff831f8700 r panel_cntl_regs +ffffffff831f8720 r panel_cntl_shift +ffffffff831f8730 r panel_cntl_mask +ffffffff831f8770 r link_enc_regs +ffffffff831f8b30 r link_enc_aux_regs +ffffffff831f8b80 r link_enc_hpd_regs +ffffffff831f8b98 r link_enc_feature +ffffffff831f8ba8 r cs_shift +ffffffff831f8bb4 r cs_mask +ffffffff831f8be0 r mi_regs +ffffffff831f8ef8 r mi_shifts +ffffffff831f8f40 r mi_masks +ffffffff831f9060 r ipp_regs +ffffffff831f9258 r ipp_shift +ffffffff831f9280 r ipp_mask +ffffffff831f9320 r xfm_regs +ffffffff831f98c0 r xfm_shift +ffffffff831f9920 r xfm_mask +ffffffff831f9aa0 r opp_regs +ffffffff831f9bf0 r opp_shift +ffffffff831f9c1c r opp_mask +ffffffff831f9cd0 r aux_engine_regs +ffffffff831f9dc0 r aux_mask +ffffffff831f9e20 r aux_shift +ffffffff831f9e40 r i2c_hw_regs +ffffffff831f9f90 r i2c_shifts +ffffffff831f9fbc r i2c_masks +ffffffff831fa070 r audio_regs +ffffffff831fa1a4 r audio_shift +ffffffff831fa1bc r audio_mask +ffffffff831fa200 r stream_enc_regs +ffffffff831fa8ac r se_shift +ffffffff831fa930 r se_mask +ffffffff831fab34 r hwseq_reg +ffffffff831fad7c r hwseq_shift +ffffffff831fae30 r hwseq_mask +ffffffff831fc000 r bios_regs +ffffffff831fc008 r dce110_res_pool_funcs +ffffffff831fc110 r debug_defaults +ffffffff831fc340 r clk_src_regs +ffffffff831fc43c r dmcu_regs +ffffffff831fc498 r dmcu_shift +ffffffff831fc4ac r dmcu_mask +ffffffff831fc4f8 r abm_regs +ffffffff831fc560 r abm_shift +ffffffff831fc584 r abm_mask +ffffffff831fc610 r dce110_tg_offsets +ffffffff831fc658 r res_create_funcs +ffffffff831fc688 r plane_cap +ffffffff831fc6b4 r underlay_plane_cap +ffffffff831fc6e0 r stoney_resource_cap +ffffffff831fc71c r carrizo_resource_cap +ffffffff831fc760 r panel_cntl_regs +ffffffff831fc780 r panel_cntl_shift +ffffffff831fc790 r panel_cntl_mask +ffffffff831fc7d0 r link_enc_regs +ffffffff831fcb90 r link_enc_aux_regs +ffffffff831fcbe0 r link_enc_hpd_regs +ffffffff831fcbf8 r link_enc_feature +ffffffff831fcc08 r cs_shift +ffffffff831fcc14 r cs_mask +ffffffff831fcc40 r mi_regs +ffffffff831fcdcc r mi_shifts +ffffffff831fce14 r mi_masks +ffffffff831fcf30 r ipp_regs +ffffffff831fd02c r ipp_shift +ffffffff831fd054 r ipp_mask +ffffffff831fd0f0 r xfm_regs +ffffffff831fd3c0 r xfm_shift +ffffffff831fd420 r xfm_mask +ffffffff831fd5a0 r opp_regs +ffffffff831fd6f0 r opp_shift +ffffffff831fd71c r opp_mask +ffffffff831fd7d0 r aux_engine_regs +ffffffff831fd8c0 r aux_mask +ffffffff831fd920 r aux_shift +ffffffff831fd940 r i2c_hw_regs +ffffffff831fda90 r i2c_shifts +ffffffff831fdabc r i2c_masks +ffffffff831fdb70 r audio_regs +ffffffff831fdca4 r audio_shift +ffffffff831fdcbc r audio_mask +ffffffff831fdd00 r stream_enc_regs +ffffffff831fdfdc r se_shift +ffffffff831fe060 r se_mask +ffffffff831fe264 r hwseq_stoney_reg +ffffffff831fe4ac r hwseq_cz_reg +ffffffff831fe6f4 r hwseq_shift +ffffffff831fe7a8 r hwseq_mask ffffffff831ff000 r bios_regs -ffffffff831ff008 r res_cap -ffffffff831ff048 r dce120_res_pool_funcs -ffffffff831ff150 r debug_defaults -ffffffff831ff380 r clk_src_regs -ffffffff831ff578 r dmcu_regs -ffffffff831ff5d4 r dmcu_shift -ffffffff831ff5e8 r dmcu_mask -ffffffff831ff634 r abm_regs -ffffffff831ff69c r abm_shift -ffffffff831ff6c0 r abm_mask -ffffffff831ff750 r dce120_tg_offsets -ffffffff831ff798 r dce121_res_create_funcs -ffffffff831ff7c8 r res_create_funcs -ffffffff831ff7f8 r plane_cap +ffffffff831ff008 r dce112_res_pool_funcs +ffffffff831ff110 r debug_defaults +ffffffff831ff340 r clk_src_regs +ffffffff831ff538 r dmcu_regs +ffffffff831ff594 r dmcu_shift +ffffffff831ff5a8 r dmcu_mask +ffffffff831ff5f4 r abm_regs +ffffffff831ff65c r abm_shift +ffffffff831ff680 r abm_mask +ffffffff831ff710 r dce112_tg_offsets +ffffffff831ff758 r res_create_funcs +ffffffff831ff788 r plane_cap +ffffffff831ff7b4 r polaris_11_resource_cap +ffffffff831ff7f0 r polaris_10_resource_cap ffffffff831ff830 r panel_cntl_regs ffffffff831ff850 r panel_cntl_shift ffffffff831ff860 r panel_cntl_mask @@ -51160,7768 +51121,7811 @@ ffffffff83200f70 r i2c_hw_regs ffffffff832010c0 r i2c_shifts ffffffff832010ec r i2c_masks ffffffff832011a0 r audio_regs -ffffffff832012d4 r audio_shift -ffffffff832012ec r audio_mask -ffffffff83201330 r stream_enc_regs -ffffffff832018e8 r se_shift -ffffffff8320196c r se_mask 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panel_cntl_shift -ffffffff83203730 r panel_cntl_mask -ffffffff83203770 r link_enc_regs -ffffffff83203b30 r link_enc_aux_regs -ffffffff83203b80 r link_enc_hpd_regs -ffffffff83203b98 r link_enc_feature -ffffffff83203ba8 r cs_shift -ffffffff83203bb4 r cs_mask -ffffffff83203be0 r mi_regs -ffffffff83203ef8 r mi_shifts -ffffffff83203f40 r mi_masks -ffffffff83204060 r ipp_regs -ffffffff83204258 r ipp_shift -ffffffff83204280 r ipp_mask -ffffffff83204320 r xfm_regs -ffffffff832048c0 r xfm_shift -ffffffff83204920 r xfm_mask -ffffffff83204aa0 r opp_regs -ffffffff83204bf0 r opp_shift -ffffffff83204c1c r opp_mask -ffffffff83204cd0 r aux_engine_regs -ffffffff83204dc0 r aux_mask -ffffffff83204e20 r aux_shift -ffffffff83204e40 r i2c_hw_regs -ffffffff83204f90 r i2c_shifts -ffffffff83204fbc r i2c_masks -ffffffff83205070 r audio_regs -ffffffff832051a4 r audio_shift -ffffffff832051bc r audio_mask -ffffffff83205200 r stream_enc_regs -ffffffff832058ac r se_shift -ffffffff83205930 r se_mask -ffffffff83205b34 r hwseq_reg -ffffffff83205d7c r hwseq_shift -ffffffff83205e30 r hwseq_mask -ffffffff83206100 r res_cap_81 -ffffffff8320613c r res_cap_83 +ffffffff83203578 r dmcu_regs +ffffffff832035d4 r dmcu_shift +ffffffff832035e8 r dmcu_mask +ffffffff83203634 r abm_regs +ffffffff8320369c r abm_shift +ffffffff832036c0 r abm_mask +ffffffff83203750 r dce120_tg_offsets +ffffffff83203798 r dce121_res_create_funcs +ffffffff832037c8 r res_create_funcs +ffffffff832037f8 r plane_cap +ffffffff83203830 r panel_cntl_regs +ffffffff83203850 r panel_cntl_shift +ffffffff83203860 r panel_cntl_mask +ffffffff832038a0 r link_enc_regs +ffffffff83203c60 r link_enc_aux_regs +ffffffff83203cb0 r link_enc_hpd_regs +ffffffff83203cc8 r link_enc_feature +ffffffff83203cd8 r cs_shift +ffffffff83203ce4 r cs_mask +ffffffff83203d10 r mi_regs +ffffffff83204028 r mi_shifts +ffffffff83204070 r mi_masks +ffffffff83204190 r ipp_regs +ffffffff83204388 r ipp_shift +ffffffff832043b0 r ipp_mask +ffffffff83204450 r xfm_regs +ffffffff832049f0 r xfm_shift +ffffffff83204a50 r xfm_mask +ffffffff83204bd0 r opp_regs +ffffffff83204d20 r opp_shift +ffffffff83204d4c r opp_mask +ffffffff83204e00 r aux_engine_regs +ffffffff83204ef0 r aux_mask +ffffffff83204f50 r aux_shift +ffffffff83204f70 r i2c_hw_regs +ffffffff832050c0 r i2c_shifts +ffffffff832050ec r i2c_masks +ffffffff832051a0 r audio_regs +ffffffff832052d4 r audio_shift +ffffffff832052ec r audio_mask +ffffffff83205330 r stream_enc_regs +ffffffff832058e8 r se_shift +ffffffff8320596c r se_mask +ffffffff83205b70 r dce121_hwseq_reg +ffffffff83205db8 r dce121_hwseq_shift +ffffffff83205e6c r dce121_hwseq_mask +ffffffff8320613c r hwseq_reg +ffffffff83206384 r hwseq_shift +ffffffff83206438 r hwseq_mask ffffffff83207000 r bios_regs -ffffffff83207008 r rv2_res_cap -ffffffff83207044 r res_cap -ffffffff83207080 r dcn10_res_pool_funcs -ffffffff83207188 r debug_defaults_drv -ffffffff832073b8 r debug_defaults_diags -ffffffff832075f0 r clk_src_regs -ffffffff83207740 r dmcu_regs -ffffffff8320779c r dmcu_shift -ffffffff832077b0 r dmcu_mask -ffffffff832077fc r abm_regs -ffffffff83207864 r abm_shift -ffffffff83207888 r abm_mask -ffffffff83207918 r res_create_funcs -ffffffff83207948 r plane_cap -ffffffff83207978 r cap_funcs -ffffffff83207990 r panel_cntl_regs -ffffffff832079b0 r panel_cntl_shift -ffffffff832079c0 r panel_cntl_mask -ffffffff83207a00 r link_enc_regs -ffffffff83207f20 r link_enc_aux_regs -ffffffff83207f60 r link_enc_hpd_regs -ffffffff83207f70 r le_shift -ffffffff83208078 r le_mask -ffffffff83208498 r link_enc_feature -ffffffff832084a8 r cs_shift -ffffffff832084b4 r cs_mask -ffffffff832084e0 r hubp_regs -ffffffff83208b90 r hubp_shift -ffffffff83208c54 r hubp_mask -ffffffff83208f60 r ipp_regs -ffffffff83209040 r ipp_shift -ffffffff8320905c r ipp_mask -ffffffff832090d0 r tf_regs -ffffffff8320a040 r tf_shift -ffffffff8320a2a8 r tf_mask -ffffffff8320ac50 r opp_regs -ffffffff8320ad20 r opp_shift -ffffffff8320ad40 r opp_mask -ffffffff8320adc0 r tg_regs -ffffffff8320b430 r tg_shift -ffffffff8320b51c r tg_mask -ffffffff8320b8d0 r aux_engine_regs -ffffffff8320b9c0 r aux_mask -ffffffff8320ba20 r aux_shift -ffffffff8320ba40 r i2c_hw_regs -ffffffff8320bb90 r i2c_shifts -ffffffff8320bbbc r i2c_masks -ffffffff8320bc64 r mpc_regs -ffffffff8320bd84 r mpc_shift -ffffffff8320bd9c r mpc_mask -ffffffff8320bdf8 r hubbub_reg -ffffffff8320bfd8 r hubbub_shift -ffffffff8320c080 r hubbub_mask -ffffffff8320c320 r audio_regs -ffffffff8320c3d0 r audio_shift -ffffffff8320c3e8 r audio_mask -ffffffff8320c430 r stream_enc_regs -ffffffff8320c9a0 r se_shift -ffffffff8320ca98 r se_mask -ffffffff8320ce48 r hwseq_reg -ffffffff8320d090 r hwseq_shift -ffffffff8320d144 r hwseq_mask -ffffffff8320e000 r tf_regs -ffffffff8320f938 r tf_shift -ffffffff8320fbc0 r tf_mask -ffffffff832105e0 r ipp_regs -ffffffff83210730 r ipp_shift -ffffffff8321074c r ipp_mask -ffffffff832107c0 r opp_regs -ffffffff832109d0 r opp_shift -ffffffff83210a08 r opp_mask -ffffffff83210ae0 r aux_engine_regs -ffffffff83210bd0 r aux_mask -ffffffff83210c30 r aux_shift -ffffffff83210c50 r i2c_hw_regs -ffffffff83210da0 r i2c_shifts -ffffffff83210dcc r i2c_masks -ffffffff83210e74 r mpc_regs -ffffffff832113bc r mpc_shift -ffffffff83211404 r mpc_mask -ffffffff83211518 r hubbub_reg -ffffffff832116f8 r hubbub_shift -ffffffff832117a0 r hubbub_mask -ffffffff83211a38 r res_cap_nv10 -ffffffff83211a80 r vmid_regs -ffffffff83211c40 r vmid_shifts -ffffffff83211c48 r vmid_masks -ffffffff83211c70 r tg_regs -ffffffff83212618 r tg_shift -ffffffff83212704 r tg_mask -ffffffff83212ac0 r link_enc_regs -ffffffff83213270 r link_enc_aux_regs -ffffffff832132d0 r link_enc_hpd_regs -ffffffff832132e8 r le_shift -ffffffff832133f0 r le_mask -ffffffff83213810 r stream_enc_regs -ffffffff83214038 r se_shift -ffffffff83214130 r se_mask -ffffffff832144e0 r hwseq_reg -ffffffff83214728 r hwseq_shift -ffffffff832147dc r hwseq_mask -ffffffff83214ab0 r dsc_regs -ffffffff83214f60 r dsc_shift -ffffffff8321501c r dsc_mask -ffffffff83215310 r hubp_regs -ffffffff83216018 r hubp_shift -ffffffff83216130 r hubp_mask -ffffffff83216590 r dwbc20_regs -ffffffff83216648 r dwbc20_shift -ffffffff832166c8 r dwbc20_mask -ffffffff832168c0 r mcif_wb20_regs -ffffffff832169a0 r mcif_wb20_shift -ffffffff83216a40 r mcif_wb20_mask -ffffffff83216cc0 r link_enc_feature -ffffffff83216cd0 r bios_regs -ffffffff83216cd8 r dcn20_res_pool_funcs -ffffffff83216de0 r res_cap_nv14 -ffffffff83216e20 r debug_defaults_drv -ffffffff83217050 r clk_src_regs -ffffffff83217248 r dccg_regs -ffffffff8321738c r dccg_shift -ffffffff832174a0 r dccg_mask -ffffffff832178f0 r dmcu_regs -ffffffff8321794c r dmcu_shift -ffffffff83217960 r dmcu_mask -ffffffff832179ac r abm_regs -ffffffff83217a14 r abm_shift -ffffffff83217a38 r abm_mask -ffffffff83217ac8 r res_create_funcs -ffffffff83217af8 r plane_cap -ffffffff83217b28 r cap_funcs -ffffffff83217b40 r panel_cntl_regs -ffffffff83217b60 r panel_cntl_shift -ffffffff83217b70 r panel_cntl_mask -ffffffff83217bac r cs_shift -ffffffff83217bb8 r cs_mask -ffffffff83217be0 r audio_regs -ffffffff83217d14 r audio_shift -ffffffff83217d2c r audio_mask -ffffffff83218000 r bios_regs -ffffffff83218008 r res_cap_dnc201 -ffffffff83218048 r debug_defaults_drv -ffffffff83218280 r clk_src_regs -ffffffff83218328 r dccg_regs -ffffffff8321846c r dccg_shift -ffffffff83218580 r dccg_mask -ffffffff832189d0 r res_create_funcs -ffffffff83218a00 r plane_cap -ffffffff83218a30 r cap_funcs -ffffffff83218a40 r link_enc_regs -ffffffff83218cd0 r link_enc_aux_regs -ffffffff83218cf0 r link_enc_hpd_regs -ffffffff83218cf8 r le_shift -ffffffff83218e00 r le_mask -ffffffff83219220 r link_enc_feature -ffffffff83219230 r cs_shift -ffffffff8321923c r cs_mask -ffffffff83219270 r hubp_regs -ffffffff83219a00 r hubp_shift -ffffffff83219ad8 r hubp_mask -ffffffff83219e40 r ipp_regs -ffffffff83219f20 r ipp_shift -ffffffff83219f3c r ipp_mask -ffffffff83219fb0 r tf_regs -ffffffff8321b000 r tf_shift -ffffffff8321b288 r tf_mask -ffffffff8321bca0 r opp_regs -ffffffff8321bd50 r opp_shift -ffffffff8321bd88 r opp_mask -ffffffff8321be60 r aux_engine_regs -ffffffff8321beb0 r aux_mask -ffffffff8321bf10 r aux_shift -ffffffff8321bf30 r i2c_hw_regs -ffffffff8321bfa0 r i2c_shifts -ffffffff8321bfcc r i2c_masks -ffffffff8321c080 r tg_regs -ffffffff8321c3b8 r tg_shift -ffffffff8321c4a4 r tg_mask -ffffffff8321c854 r mpc_regs -ffffffff8321cd9c r mpc_shift -ffffffff8321cde8 r mpc_mask -ffffffff8321cf10 r hubbub_reg -ffffffff8321d0f0 r hubbub_shift -ffffffff8321d198 r hubbub_mask -ffffffff8321d430 r audio_regs -ffffffff8321d488 r audio_shift -ffffffff8321d4a0 r audio_mask -ffffffff8321d4e0 r stream_enc_regs -ffffffff8321d798 r se_shift -ffffffff8321d890 r se_mask -ffffffff8321dc40 r hwseq_reg -ffffffff8321de88 r hwseq_shift -ffffffff8321df3c r hwseq_mask -ffffffff8321f000 r bios_regs -ffffffff8321f008 r res_cap_rn -ffffffff8321f048 r dcn21_res_pool_funcs -ffffffff8321f150 r debug_defaults_drv -ffffffff8321f380 r clk_src_regs -ffffffff8321f524 r dccg_regs -ffffffff8321f668 r dccg_shift -ffffffff8321f77c r dccg_mask -ffffffff8321fbcc r dmcu_regs -ffffffff8321fc28 r dmcu_shift -ffffffff8321fc3c r dmcu_mask -ffffffff8321fc88 r abm_regs -ffffffff8321fcf0 r abm_shift -ffffffff8321fd14 r abm_mask -ffffffff8321fda0 r res_create_funcs -ffffffff8321fdd0 r plane_cap -ffffffff8321fe00 r cap_funcs -ffffffff8321fe10 r panel_cntl_regs -ffffffff8321fe30 r panel_cntl_shift -ffffffff8321fe40 r panel_cntl_mask -ffffffff8321fe80 r link_enc_regs -ffffffff832204f0 r link_enc_aux_regs -ffffffff83220540 r link_enc_hpd_regs -ffffffff83220554 r le_shift -ffffffff8322065c r le_mask -ffffffff83220a7c r link_enc_feature -ffffffff83220a8c r panel_config_defaults -ffffffff83220ae0 r cs_shift -ffffffff83220aec r cs_mask -ffffffff83220b20 r hubp_regs -ffffffff832213d0 r hubp_shift -ffffffff832214e8 r hubp_mask -ffffffff83221950 r ipp_regs -ffffffff83221a30 r ipp_shift -ffffffff83221a4c r ipp_mask -ffffffff83221ac0 r tf_regs -ffffffff83222b90 r tf_shift -ffffffff83222e18 r tf_mask -ffffffff83223830 r opp_regs -ffffffff83223a40 r opp_shift -ffffffff83223a78 r opp_mask -ffffffff83223b50 r tg_regs -ffffffff832241c0 r tg_shift -ffffffff832242ac r tg_mask -ffffffff83224660 r aux_engine_regs -ffffffff83224728 r aux_mask -ffffffff83224788 r aux_shift -ffffffff832247a0 r i2c_hw_regs -ffffffff832248b8 r i2c_shifts -ffffffff832248e4 r i2c_masks -ffffffff8322498c r mpc_regs -ffffffff83224ed4 r mpc_shift -ffffffff83224f1c r mpc_mask -ffffffff83225030 r hubbub_reg -ffffffff83225210 r hubbub_shift -ffffffff832252b8 r hubbub_mask -ffffffff83225550 r vmid_regs -ffffffff83225710 r vmid_shifts -ffffffff83225718 r vmid_masks -ffffffff83225740 r dsc_regs -ffffffff83225bf0 r dsc_shift -ffffffff83225cac r dsc_mask -ffffffff83225fa0 r audio_regs -ffffffff832260a8 r audio_shift -ffffffff832260c0 r audio_mask -ffffffff83226100 r stream_enc_regs -ffffffff832267cc r se_shift -ffffffff832268c4 r se_mask -ffffffff83226c74 r hwseq_reg -ffffffff83226ebc r hwseq_shift -ffffffff83226f70 r hwseq_mask -ffffffff83228000 r bios_regs -ffffffff83228008 r res_cap_dcn3 -ffffffff83228048 r dcn30_res_pool_funcs -ffffffff83228150 r debug_defaults_drv -ffffffff83228380 r clk_src_regs -ffffffff83228578 r dccg_regs -ffffffff832286bc r dccg_shift -ffffffff832287d0 r dccg_mask -ffffffff83228c20 r abm_regs -ffffffff83228e90 r abm_shift -ffffffff83228eb4 r abm_mask -ffffffff83228f40 r res_create_funcs -ffffffff83228f70 r plane_cap -ffffffff83228fa0 r cap_funcs -ffffffff83228fb0 r panel_cntl_regs -ffffffff83228fd0 r panel_cntl_shift -ffffffff83228fe0 r panel_cntl_mask -ffffffff83229020 r link_enc_regs -ffffffff832297d0 r link_enc_aux_regs -ffffffff83229830 r link_enc_hpd_regs -ffffffff83229848 r le_shift -ffffffff83229950 r le_mask -ffffffff83229d70 r link_enc_feature -ffffffff83229d80 r cs_shift -ffffffff83229d8c r cs_mask -ffffffff83229db4 r hubbub_reg -ffffffff83229f94 r hubbub_shift -ffffffff8322a03c r hubbub_mask -ffffffff8322a2e0 r vmid_regs -ffffffff8322a4a0 r vmid_shifts -ffffffff8322a4a8 r vmid_masks -ffffffff8322a4d0 r hubp_regs -ffffffff8322b1d8 r hubp_shift -ffffffff8322b2f0 r hubp_mask -ffffffff8322b750 r dpp_regs -ffffffff8322d6e8 r tf_shift -ffffffff8322d9bc r tf_mask -ffffffff8322e510 r opp_regs -ffffffff8322e720 r opp_shift -ffffffff8322e758 r opp_mask -ffffffff8322e830 r optc_regs -ffffffff8322f1d8 r optc_shift -ffffffff8322f2c4 r optc_mask -ffffffff8322f674 r mpc_regs -ffffffff83230e60 r mpc_shift -ffffffff83230f3c r mpc_mask -ffffffff832312b0 r dsc_regs -ffffffff83231760 r dsc_shift -ffffffff8323181c r dsc_mask -ffffffff83231b10 r dwbc30_regs -ffffffff83231d14 r dwbc30_shift -ffffffff83231e48 r dwbc30_mask -ffffffff83232310 r mcif_wb30_regs -ffffffff8323240c r mcif_wb30_shift -ffffffff832324b8 r mcif_wb30_mask -ffffffff83232770 r aux_engine_regs -ffffffff83232860 r aux_mask -ffffffff832328c0 r aux_shift -ffffffff832328e0 r i2c_hw_regs -ffffffff83232a30 r i2c_shifts -ffffffff83232a5c r i2c_masks -ffffffff83232b10 r audio_regs -ffffffff83232c44 r audio_shift -ffffffff83232c5c r audio_mask -ffffffff83232ca0 r stream_enc_regs -ffffffff832334c8 r se_shift -ffffffff832335c0 r se_mask -ffffffff83233970 r vpg_regs -ffffffff832339fc r vpg_shift -ffffffff83233a24 r vpg_mask -ffffffff83233ac0 r afmt_regs -ffffffff83233bbc r afmt_shift -ffffffff83233bd0 r afmt_mask -ffffffff83233c14 r hwseq_reg -ffffffff83233e5c r hwseq_shift -ffffffff83233f10 r hwseq_mask -ffffffff83235000 r bios_regs -ffffffff83235008 r debug_defaults_drv -ffffffff83235240 r clk_src_regs -ffffffff83235390 r dccg_regs -ffffffff832354d4 r dccg_shift -ffffffff832355e8 r dccg_mask -ffffffff83235a40 r abm_regs -ffffffff83235be0 r abm_shift -ffffffff83235c04 r abm_mask -ffffffff83235c90 r res_create_funcs -ffffffff83235cc0 r plane_cap -ffffffff83235cf0 r cap_funcs -ffffffff83235d00 r panel_cntl_regs -ffffffff83235d40 r panel_cntl_shift -ffffffff83235d50 r panel_cntl_mask -ffffffff83235d90 r link_enc_regs -ffffffff832362b0 r link_enc_aux_regs -ffffffff832362f0 r link_enc_hpd_regs -ffffffff83236300 r le_shift -ffffffff83236408 r le_mask -ffffffff83236828 r link_enc_feature -ffffffff83236838 r cs_shift -ffffffff83236844 r cs_mask -ffffffff8323686c r hubbub_reg -ffffffff83236a4c r hubbub_shift -ffffffff83236af4 r hubbub_mask -ffffffff83236d90 r vmid_regs -ffffffff83236f50 r vmid_shifts -ffffffff83236f58 r vmid_masks -ffffffff83236f80 r hubp_regs -ffffffff83237830 r hubp_shift -ffffffff83237948 r hubp_mask -ffffffff83237db0 r dpp_regs -ffffffff832392c0 r tf_shift -ffffffff83239594 r tf_mask -ffffffff8323a0e0 r opp_regs -ffffffff8323a240 r opp_shift -ffffffff8323a278 r opp_mask -ffffffff8323a350 r optc_regs -ffffffff8323a9c0 r optc_shift -ffffffff8323aaac r optc_mask -ffffffff8323ae5c r mpc_regs -ffffffff8323c648 r mpc_shift -ffffffff8323c724 r mpc_mask -ffffffff8323ca90 r dsc_regs -ffffffff8323cce8 r dsc_shift -ffffffff8323cda4 r dsc_mask -ffffffff8323d0a0 r dwbc30_regs -ffffffff8323d2a4 r dwbc30_shift -ffffffff8323d3d8 r dwbc30_mask -ffffffff8323d8a0 r mcif_wb30_regs -ffffffff8323d99c r mcif_wb30_shift -ffffffff8323da48 r mcif_wb30_mask -ffffffff8323dd00 r aux_engine_regs -ffffffff8323dda0 r aux_mask -ffffffff8323de00 r aux_shift -ffffffff8323de20 r i2c_hw_regs -ffffffff8323df00 r i2c_shifts -ffffffff8323df2c r i2c_masks -ffffffff8323dfe0 r audio_regs -ffffffff8323e114 r audio_shift -ffffffff8323e12c r audio_mask -ffffffff8323e170 r stream_enc_regs -ffffffff8323e6e0 r se_shift -ffffffff8323e7d8 r se_mask -ffffffff8323eb90 r vpg_regs -ffffffff8323ebe0 r vpg_shift -ffffffff8323ec08 r vpg_mask -ffffffff8323eca0 r afmt_regs -ffffffff8323ed30 r afmt_shift -ffffffff8323ed44 r afmt_mask -ffffffff8323ed88 r hwseq_reg -ffffffff8323efd0 r hwseq_shift -ffffffff8323f084 r hwseq_mask -ffffffff83240000 r bios_regs -ffffffff83240008 r res_cap_dcn302 -ffffffff83240048 r debug_defaults_drv -ffffffff83240280 r clk_src_regs -ffffffff83240424 r dccg_regs -ffffffff83240568 r dccg_shift -ffffffff8324067c r dccg_mask -ffffffff83240ad0 r abm_regs -ffffffff83240cd8 r abm_shift -ffffffff83240cfc r abm_mask -ffffffff83240d88 r res_create_funcs -ffffffff83240db8 r plane_cap -ffffffff83240de8 r cap_funcs -ffffffff83240e00 r panel_cntl_regs -ffffffff83240e20 r panel_cntl_shift -ffffffff83240e30 r panel_cntl_mask -ffffffff83240e70 r link_enc_regs -ffffffff832414e0 r link_enc_aux_regs -ffffffff83241530 r link_enc_hpd_regs -ffffffff83241544 r le_shift -ffffffff8324164c r le_mask -ffffffff83241a6c r link_enc_feature -ffffffff83241a7c r cs_shift -ffffffff83241a88 r cs_mask -ffffffff83241ab0 r hubbub_reg -ffffffff83241c90 r hubbub_shift -ffffffff83241d38 r hubbub_mask -ffffffff83241fd0 r vmid_regs -ffffffff83242190 r vmid_shifts -ffffffff83242198 r vmid_masks -ffffffff832421c0 r hubp_regs -ffffffff83242c9c r hubp_shift -ffffffff83242db4 r hubp_mask -ffffffff83243210 r dpp_regs -ffffffff83244c64 r tf_shift -ffffffff83244f38 r tf_mask -ffffffff83245a80 r opp_regs -ffffffff83245c38 r opp_shift -ffffffff83245c70 r opp_mask -ffffffff83245d50 r optc_regs -ffffffff8324655c r optc_shift -ffffffff83246648 r optc_mask -ffffffff832469f8 r mpc_regs -ffffffff832481e4 r mpc_shift -ffffffff832482c0 r mpc_mask -ffffffff83248630 r dsc_regs -ffffffff83248a18 r dsc_shift -ffffffff83248ad4 r dsc_mask -ffffffff83248dd0 r dwbc30_regs -ffffffff83248fd4 r dwbc30_shift -ffffffff83249108 r dwbc30_mask -ffffffff832495d0 r mcif_wb30_regs -ffffffff832496cc r mcif_wb30_shift -ffffffff83249778 r mcif_wb30_mask -ffffffff83249a30 r aux_engine_regs -ffffffff83249af8 r aux_mask -ffffffff83249b58 r aux_shift -ffffffff83249b70 r i2c_hw_regs -ffffffff83249c88 r i2c_shifts -ffffffff83249cb4 r i2c_masks -ffffffff83249d60 r audio_regs -ffffffff83249e94 r audio_shift -ffffffff83249eac r audio_mask -ffffffff83249ef0 r stream_enc_regs -ffffffff8324a5bc r se_shift -ffffffff8324a6b4 r se_mask -ffffffff8324aa70 r vpg_regs -ffffffff8324aae8 r vpg_shift -ffffffff8324ab10 r vpg_mask -ffffffff8324abb0 r afmt_regs -ffffffff8324ac88 r afmt_shift -ffffffff8324ac9c r afmt_mask -ffffffff8324ace0 r hwseq_reg -ffffffff8324af28 r hwseq_shift -ffffffff8324afdc r hwseq_mask -ffffffff8324c000 r bios_regs -ffffffff8324c008 r res_cap_dcn303 -ffffffff8324c048 r debug_defaults_drv -ffffffff8324c280 r clk_src_regs -ffffffff8324c328 r dccg_regs -ffffffff8324c46c r dccg_shift -ffffffff8324c580 r dccg_mask -ffffffff8324c9d0 r abm_regs -ffffffff8324caa0 r abm_shift -ffffffff8324cac4 r abm_mask -ffffffff8324cb50 r res_create_funcs -ffffffff8324cb80 r plane_cap -ffffffff8324cbb0 r cap_funcs -ffffffff8324cbc0 r panel_cntl_regs -ffffffff8324cbe0 r panel_cntl_shift -ffffffff8324cbf0 r panel_cntl_mask -ffffffff8324cc30 r link_enc_regs -ffffffff8324cec0 r link_enc_aux_regs -ffffffff8324cee0 r link_enc_hpd_regs -ffffffff8324cee8 r le_shift -ffffffff8324cff0 r le_mask -ffffffff8324d410 r link_enc_feature -ffffffff8324d420 r cs_shift -ffffffff8324d42c r cs_mask -ffffffff8324d454 r hubbub_reg -ffffffff8324d634 r hubbub_shift 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kqueue_ps_list_lock -ffffffff83761028 D kq_timeoutmax -ffffffff83762000 D stackgap_random -ffffffff83763000 D deadproc_mutex -ffffffff83764000 D nprocesses -ffffffff83764004 D nthreads -ffffffff83764008 D fork_tfmrate -ffffffff83765000 D kthread_q -ffffffff83766000 D nkmempages -ffffffff83766008 D malloc_mtx -ffffffff83766020 D memname -ffffffff837664b0 D malloc_errintvl -ffffffff83767000 D maxdmap -ffffffff83767008 D maxsmap -ffffffff83767010 D rlimit_lock -ffffffff83768000 D sched_cost_priority -ffffffff83768004 D sched_cost_runnable -ffffffff83768008 D sched_cost_resident -ffffffff83769000 D intrmap_lock -ffffffff8376a000 D nosuidcoredump -ffffffff8376a008 D sigio_lock -ffffffff8376b000 D smr_lock -ffffffff8376b010 D smr_logintvl -ffffffff8376c000 D startuphook_list -ffffffff8376d000 D sysctl_lock -ffffffff8376d018 D sysctl_disklock -ffffffff8376d030 d openbsd -ffffffff8376d034 d arg_max -ffffffff8376d038 d posix_version -ffffffff8376d03c d ngroups_max -ffffffff8376d040 d int_one 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dcn35_dpp_funcs -ffffffff83946000 d dcn401_dpp_funcs -ffffffff83946120 d dcn401_dpp_cap -ffffffff83947000 d dsc_policy_max_target_bpp_limit -ffffffff83948000 d dcn31_hpo_dp_link_encoder_funcs -ffffffff83949000 d dcn32_hpo_dp_link_encoder_funcs -ffffffff8394a000 d dcn20_hubp_funcs -ffffffff8394b000 d dcn201_hubp_funcs -ffffffff8394c000 d dcn21_hubp_funcs -ffffffff8394d000 d dcn30_hubp_funcs -ffffffff8394e000 d dcn31_hubp_funcs -ffffffff8394f000 d dcn32_hubp_funcs -ffffffff83950000 d dcn35_hubp_funcs -ffffffff83951000 d dcn401_hubp_funcs -ffffffff83952000 d dummy_irq_info_funcs -ffffffff83952010 d hpd_irq_info_funcs -ffffffff83952020 d vblank_irq_info_funcs -ffffffff83953000 d dummy_irq_info_funcs -ffffffff83953010 d hpd_irq_info_funcs -ffffffff83953020 d vblank_irq_info_funcs -ffffffff83954000 d dummy_irq_info_funcs -ffffffff83954010 d hpd_irq_info_funcs -ffffffff83954020 d vblank_irq_info_funcs -ffffffff83955000 d dummy_irq_info_funcs -ffffffff83955010 d hpd_irq_info_funcs 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r abm_shift +ffffffff8320b888 r abm_mask +ffffffff8320b918 r res_create_funcs +ffffffff8320b948 r plane_cap +ffffffff8320b978 r cap_funcs +ffffffff8320b990 r panel_cntl_regs +ffffffff8320b9b0 r panel_cntl_shift +ffffffff8320b9c0 r panel_cntl_mask +ffffffff8320ba00 r link_enc_regs +ffffffff8320bf20 r link_enc_aux_regs +ffffffff8320bf60 r link_enc_hpd_regs +ffffffff8320bf70 r le_shift +ffffffff8320c078 r le_mask +ffffffff8320c498 r link_enc_feature +ffffffff8320c4a8 r cs_shift +ffffffff8320c4b4 r cs_mask +ffffffff8320c4e0 r hubp_regs +ffffffff8320cb90 r hubp_shift +ffffffff8320cc54 r hubp_mask +ffffffff8320cf60 r ipp_regs +ffffffff8320d040 r ipp_shift +ffffffff8320d05c r ipp_mask +ffffffff8320d0d0 r tf_regs +ffffffff8320e040 r tf_shift +ffffffff8320e2a8 r tf_mask +ffffffff8320ec50 r opp_regs +ffffffff8320ed20 r opp_shift +ffffffff8320ed40 r opp_mask +ffffffff8320edc0 r tg_regs +ffffffff8320f430 r tg_shift +ffffffff8320f51c r tg_mask +ffffffff8320f8d0 r aux_engine_regs +ffffffff8320f9c0 r aux_mask +ffffffff8320fa20 r aux_shift +ffffffff8320fa40 r i2c_hw_regs +ffffffff8320fb90 r i2c_shifts +ffffffff8320fbbc r i2c_masks +ffffffff8320fc64 r mpc_regs +ffffffff8320fd84 r mpc_shift +ffffffff8320fd9c r mpc_mask +ffffffff8320fdf8 r hubbub_reg +ffffffff8320ffd8 r hubbub_shift +ffffffff83210080 r hubbub_mask +ffffffff83210320 r audio_regs +ffffffff832103d0 r audio_shift +ffffffff832103e8 r audio_mask +ffffffff83210430 r stream_enc_regs +ffffffff832109a0 r se_shift +ffffffff83210a98 r se_mask +ffffffff83210e48 r hwseq_reg +ffffffff83211090 r hwseq_shift +ffffffff83211144 r hwseq_mask +ffffffff83212000 r tf_regs +ffffffff83213938 r tf_shift +ffffffff83213bc0 r tf_mask +ffffffff832145e0 r ipp_regs +ffffffff83214730 r ipp_shift +ffffffff8321474c r ipp_mask +ffffffff832147c0 r opp_regs +ffffffff832149d0 r opp_shift +ffffffff83214a08 r opp_mask +ffffffff83214ae0 r aux_engine_regs +ffffffff83214bd0 r aux_mask +ffffffff83214c30 r aux_shift +ffffffff83214c50 r i2c_hw_regs +ffffffff83214da0 r i2c_shifts +ffffffff83214dcc r i2c_masks +ffffffff83214e74 r mpc_regs +ffffffff832153bc r mpc_shift +ffffffff83215404 r mpc_mask +ffffffff83215518 r hubbub_reg +ffffffff832156f8 r hubbub_shift +ffffffff832157a0 r hubbub_mask +ffffffff83215a38 r res_cap_nv10 +ffffffff83215a80 r vmid_regs +ffffffff83215c40 r vmid_shifts +ffffffff83215c48 r vmid_masks +ffffffff83215c70 r tg_regs +ffffffff83216618 r tg_shift +ffffffff83216704 r tg_mask +ffffffff83216ac0 r link_enc_regs +ffffffff83217270 r link_enc_aux_regs +ffffffff832172d0 r link_enc_hpd_regs +ffffffff832172e8 r le_shift +ffffffff832173f0 r le_mask +ffffffff83217810 r stream_enc_regs +ffffffff83218038 r se_shift +ffffffff83218130 r se_mask +ffffffff832184e0 r hwseq_reg +ffffffff83218728 r hwseq_shift +ffffffff832187dc r hwseq_mask +ffffffff83218ab0 r dsc_regs +ffffffff83218f60 r dsc_shift +ffffffff8321901c r dsc_mask +ffffffff83219310 r hubp_regs +ffffffff8321a018 r hubp_shift +ffffffff8321a130 r hubp_mask +ffffffff8321a590 r dwbc20_regs +ffffffff8321a648 r dwbc20_shift +ffffffff8321a6c8 r dwbc20_mask +ffffffff8321a8c0 r mcif_wb20_regs +ffffffff8321a9a0 r mcif_wb20_shift +ffffffff8321aa40 r mcif_wb20_mask +ffffffff8321acc0 r link_enc_feature +ffffffff8321acd0 r bios_regs +ffffffff8321acd8 r dcn20_res_pool_funcs +ffffffff8321ade0 r res_cap_nv14 +ffffffff8321ae20 r debug_defaults_drv +ffffffff8321b050 r clk_src_regs +ffffffff8321b248 r dccg_regs +ffffffff8321b38c r dccg_shift +ffffffff8321b4a0 r dccg_mask +ffffffff8321b8f0 r dmcu_regs +ffffffff8321b94c r dmcu_shift +ffffffff8321b960 r dmcu_mask +ffffffff8321b9ac r abm_regs +ffffffff8321ba14 r abm_shift +ffffffff8321ba38 r abm_mask +ffffffff8321bac8 r res_create_funcs +ffffffff8321baf8 r plane_cap +ffffffff8321bb28 r cap_funcs +ffffffff8321bb40 r panel_cntl_regs +ffffffff8321bb60 r panel_cntl_shift +ffffffff8321bb70 r panel_cntl_mask +ffffffff8321bbac r cs_shift +ffffffff8321bbb8 r cs_mask +ffffffff8321bbe0 r audio_regs +ffffffff8321bd14 r audio_shift +ffffffff8321bd2c r audio_mask +ffffffff8321c000 r bios_regs +ffffffff8321c008 r res_cap_dnc201 +ffffffff8321c048 r debug_defaults_drv +ffffffff8321c280 r clk_src_regs +ffffffff8321c328 r dccg_regs +ffffffff8321c46c r dccg_shift +ffffffff8321c580 r dccg_mask +ffffffff8321c9d0 r res_create_funcs +ffffffff8321ca00 r plane_cap +ffffffff8321ca30 r cap_funcs +ffffffff8321ca40 r link_enc_regs +ffffffff8321ccd0 r link_enc_aux_regs +ffffffff8321ccf0 r link_enc_hpd_regs +ffffffff8321ccf8 r le_shift +ffffffff8321ce00 r le_mask +ffffffff8321d220 r link_enc_feature +ffffffff8321d230 r cs_shift +ffffffff8321d23c r cs_mask +ffffffff8321d270 r hubp_regs +ffffffff8321da00 r hubp_shift +ffffffff8321dad8 r hubp_mask +ffffffff8321de40 r ipp_regs +ffffffff8321df20 r ipp_shift +ffffffff8321df3c r ipp_mask +ffffffff8321dfb0 r tf_regs +ffffffff8321f000 r tf_shift +ffffffff8321f288 r tf_mask +ffffffff8321fca0 r opp_regs +ffffffff8321fd50 r opp_shift +ffffffff8321fd88 r opp_mask +ffffffff8321fe60 r aux_engine_regs +ffffffff8321feb0 r aux_mask +ffffffff8321ff10 r aux_shift +ffffffff8321ff30 r i2c_hw_regs +ffffffff8321ffa0 r i2c_shifts +ffffffff8321ffcc r i2c_masks +ffffffff83220080 r tg_regs +ffffffff832203b8 r tg_shift +ffffffff832204a4 r tg_mask +ffffffff83220854 r mpc_regs +ffffffff83220d9c r mpc_shift +ffffffff83220de8 r mpc_mask +ffffffff83220f10 r hubbub_reg +ffffffff832210f0 r hubbub_shift +ffffffff83221198 r hubbub_mask +ffffffff83221430 r audio_regs +ffffffff83221488 r audio_shift +ffffffff832214a0 r audio_mask +ffffffff832214e0 r stream_enc_regs +ffffffff83221798 r se_shift +ffffffff83221890 r se_mask +ffffffff83221c40 r hwseq_reg +ffffffff83221e88 r hwseq_shift +ffffffff83221f3c r hwseq_mask +ffffffff83223000 r bios_regs +ffffffff83223008 r res_cap_rn +ffffffff83223048 r dcn21_res_pool_funcs +ffffffff83223150 r debug_defaults_drv +ffffffff83223380 r clk_src_regs +ffffffff83223524 r dccg_regs +ffffffff83223668 r dccg_shift +ffffffff8322377c r dccg_mask +ffffffff83223bcc r dmcu_regs +ffffffff83223c28 r dmcu_shift +ffffffff83223c3c r dmcu_mask +ffffffff83223c88 r abm_regs +ffffffff83223cf0 r abm_shift +ffffffff83223d14 r abm_mask +ffffffff83223da0 r res_create_funcs +ffffffff83223dd0 r plane_cap +ffffffff83223e00 r cap_funcs +ffffffff83223e10 r panel_cntl_regs +ffffffff83223e30 r panel_cntl_shift +ffffffff83223e40 r panel_cntl_mask +ffffffff83223e80 r link_enc_regs +ffffffff832244f0 r link_enc_aux_regs +ffffffff83224540 r link_enc_hpd_regs +ffffffff83224554 r le_shift +ffffffff8322465c r le_mask +ffffffff83224a7c r link_enc_feature +ffffffff83224a8c r panel_config_defaults +ffffffff83224ae0 r cs_shift +ffffffff83224aec r cs_mask +ffffffff83224b20 r hubp_regs +ffffffff832253d0 r hubp_shift +ffffffff832254e8 r hubp_mask +ffffffff83225950 r ipp_regs +ffffffff83225a30 r ipp_shift +ffffffff83225a4c r ipp_mask +ffffffff83225ac0 r tf_regs +ffffffff83226b90 r tf_shift +ffffffff83226e18 r tf_mask +ffffffff83227830 r opp_regs +ffffffff83227a40 r opp_shift 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res_cap_dcn3 +ffffffff8322c048 r dcn30_res_pool_funcs +ffffffff8322c150 r debug_defaults_drv +ffffffff8322c380 r clk_src_regs +ffffffff8322c578 r dccg_regs +ffffffff8322c6bc r dccg_shift +ffffffff8322c7d0 r dccg_mask +ffffffff8322cc20 r abm_regs +ffffffff8322ce90 r abm_shift +ffffffff8322ceb4 r abm_mask +ffffffff8322cf40 r res_create_funcs +ffffffff8322cf70 r plane_cap +ffffffff8322cfa0 r cap_funcs +ffffffff8322cfb0 r panel_cntl_regs +ffffffff8322cfd0 r panel_cntl_shift +ffffffff8322cfe0 r panel_cntl_mask +ffffffff8322d020 r link_enc_regs +ffffffff8322d7d0 r link_enc_aux_regs +ffffffff8322d830 r link_enc_hpd_regs +ffffffff8322d848 r le_shift +ffffffff8322d950 r le_mask +ffffffff8322dd70 r link_enc_feature +ffffffff8322dd80 r cs_shift +ffffffff8322dd8c r cs_mask +ffffffff8322ddb4 r hubbub_reg +ffffffff8322df94 r hubbub_shift +ffffffff8322e03c r hubbub_mask +ffffffff8322e2e0 r vmid_regs +ffffffff8322e4a0 r vmid_shifts +ffffffff8322e4a8 r vmid_masks +ffffffff8322e4d0 r hubp_regs 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+ffffffff83236ca0 r stream_enc_regs +ffffffff832374c8 r se_shift +ffffffff832375c0 r se_mask +ffffffff83237970 r vpg_regs +ffffffff832379fc r vpg_shift +ffffffff83237a24 r vpg_mask +ffffffff83237ac0 r afmt_regs +ffffffff83237bbc r afmt_shift +ffffffff83237bd0 r afmt_mask +ffffffff83237c14 r hwseq_reg +ffffffff83237e5c r hwseq_shift +ffffffff83237f10 r hwseq_mask +ffffffff83239000 r bios_regs +ffffffff83239008 r debug_defaults_drv +ffffffff83239240 r clk_src_regs +ffffffff83239390 r dccg_regs +ffffffff832394d4 r dccg_shift +ffffffff832395e8 r dccg_mask +ffffffff83239a40 r abm_regs +ffffffff83239be0 r abm_shift +ffffffff83239c04 r abm_mask +ffffffff83239c90 r res_create_funcs +ffffffff83239cc0 r plane_cap +ffffffff83239cf0 r cap_funcs +ffffffff83239d00 r panel_cntl_regs +ffffffff83239d40 r panel_cntl_shift +ffffffff83239d50 r panel_cntl_mask +ffffffff83239d90 r link_enc_regs +ffffffff8323a2b0 r link_enc_aux_regs +ffffffff8323a2f0 r link_enc_hpd_regs +ffffffff8323a300 r le_shift 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mcif_wb30_shift +ffffffff83241a48 r mcif_wb30_mask +ffffffff83241d00 r aux_engine_regs +ffffffff83241da0 r aux_mask +ffffffff83241e00 r aux_shift +ffffffff83241e20 r i2c_hw_regs +ffffffff83241f00 r i2c_shifts +ffffffff83241f2c r i2c_masks +ffffffff83241fe0 r audio_regs +ffffffff83242114 r audio_shift +ffffffff8324212c r audio_mask +ffffffff83242170 r stream_enc_regs +ffffffff832426e0 r se_shift +ffffffff832427d8 r se_mask +ffffffff83242b90 r vpg_regs +ffffffff83242be0 r vpg_shift +ffffffff83242c08 r vpg_mask +ffffffff83242ca0 r afmt_regs +ffffffff83242d30 r afmt_shift +ffffffff83242d44 r afmt_mask +ffffffff83242d88 r hwseq_reg +ffffffff83242fd0 r hwseq_shift +ffffffff83243084 r hwseq_mask +ffffffff83244000 r bios_regs +ffffffff83244008 r res_cap_dcn302 +ffffffff83244048 r debug_defaults_drv +ffffffff83244280 r clk_src_regs +ffffffff83244424 r dccg_regs +ffffffff83244568 r dccg_shift +ffffffff8324467c r dccg_mask +ffffffff83244ad0 r abm_regs +ffffffff83244cd8 r abm_shift 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smu_v13_0_6_ppt_funcs +ffffffff8330c430 r smu_v13_0_6_message_map +ffffffff8330d000 r smu_v13_0_6_table_map +ffffffff8330d088 r smu_v13_0_6_mca_smu_funcs +ffffffff8330d0b0 r smu_v13_0_6_aca_smu_funcs +ffffffff8330d0d8 r smu_v13_0_6_i2c_algo +ffffffff8330d0e8 r smu_v13_0_6_i2c_control_quirks +ffffffff8330d0f8 r smu_v13_0_6_irq_funcs +ffffffff8330d108 r smu_v13_0_6_throttler_map +ffffffff8330d110 r smu_v13_0_6_clk_map +ffffffff8330d1f0 r smu_v13_0_6_feature_mask_map +ffffffff8330d610 r mca_ras_table +ffffffff8330e000 r smu_v13_0_7_ppt_funcs +ffffffff8330e430 r smu13_thermal_policy +ffffffff8330e490 r smu_v13_0_7_throttler_map +ffffffff8330f000 r yellow_carp_ppt_funcs +ffffffff83310000 R decoded_link_speed +ffffffff83310020 R decoded_link_width +ffffffff83310040 r smu_v14_0_irq_funcs +ffffffff83311000 r smu_v14_0_0_ppt_funcs +ffffffff83312000 r smu_v14_0_2_ppt_funcs +ffffffff83312430 r smu14_thermal_policy +ffffffff83312488 r smu_v14_0_2_i2c_algo +ffffffff83312498 r smu_v14_0_2_i2c_control_quirks +ffffffff833124b0 r smu_v14_0_2_throttler_map +ffffffff83313000 R link_speed +ffffffff83313020 r __smu_message_names +ffffffff83314000 R pchb_ca +ffffffff83315000 R amas_ca +ffffffff83315028 R amas_devices +ffffffff83315040 r amas_feature +ffffffff83316000 R cardslot_ca +ffffffff83317000 R cardbus_ca +ffffffff83318000 R com_cardbus_ca +ffffffff83319000 R xl_cardbus_ca +ffffffff83319030 R xl_cardbus_products +ffffffff8331a000 R dc_cardbus_ca +ffffffff8331a030 R dc_cardbus_devices +ffffffff8331b000 R fxp_cardbus_ca +ffffffff8331b028 R fxp_cardbus_devices +ffffffff8331c000 R rl_cardbus_devices +ffffffff8331c028 R rl_cardbus_ca +ffffffff8331d000 R re_cardbus_ca +ffffffff8331d028 R re_cardbus_devices +ffffffff8331e000 R ath_cardbus_ca +ffffffff8331f000 R athn_cardbus_ca +ffffffff8331f030 r athn_cardbus_devices +ffffffff83320000 R atw_cardbus_ca +ffffffff83320028 R atw_cardbus_devices +ffffffff83321000 R rtw_cardbus_ca +ffffffff83321028 R rtw_cardbus_devices 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D dt_static_sched_unstop +ffffffff8374e570 D dt_static_raw_syscalls_sys_enter +ffffffff8374e5e0 D dt_static_raw_syscalls_sys_exit +ffffffff8374e650 D dt_static_uvm_fault +ffffffff8374e6c0 D dt_static_uvm_map_insert +ffffffff8374e730 D dt_static_uvm_map_remove +ffffffff8374e7a0 D dt_static_uvm_malloc +ffffffff8374e810 D dt_static_uvm_free +ffffffff8374e880 D dt_static_uvm_pool_get +ffffffff8374e8f0 D dt_static_uvm_pool_put +ffffffff8374e960 D dt_static_vfs_bufcache_rel +ffffffff8374e9d0 D dt_static_vfs_bufcache_take +ffffffff8374ea40 D dt_static_vfs_cleaner +ffffffff8374eab0 D dt_static_vmm_guest_enter +ffffffff8374eb20 D dt_static_vmm_guest_exit +ffffffff8374eb90 D dt_static_vmm_inout +ffffffff8374ec00 D dt_static_smr_call +ffffffff8374ec70 D dt_static_smr_called +ffffffff8374ece0 D dt_static_smr_barrier_enter +ffffffff8374ed50 D dt_static_smr_barrier_exit +ffffffff8374edc0 D dt_static_smr_wakeup +ffffffff8374ee30 D dt_static_smr_thread +ffffffff8374eea0 D dt_static_refcnt_none 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stackgap_random +ffffffff83767000 D deadproc_mutex +ffffffff83768000 D nprocesses +ffffffff83768004 D nthreads +ffffffff83768008 D fork_tfmrate +ffffffff83769000 D kthread_q +ffffffff8376a000 D nkmempages +ffffffff8376a008 D malloc_mtx +ffffffff8376a020 D memname +ffffffff8376a4b0 D malloc_errintvl +ffffffff8376b000 D maxdmap +ffffffff8376b008 D maxsmap +ffffffff8376b010 D rlimit_lock +ffffffff8376c000 D sched_cost_priority +ffffffff8376c004 D sched_cost_runnable +ffffffff8376c008 D sched_cost_resident +ffffffff8376d000 D intrmap_lock +ffffffff8376e000 D nosuidcoredump +ffffffff8376e008 D sigio_lock +ffffffff8376f000 D smr_lock +ffffffff8376f010 D smr_logintvl +ffffffff83770000 D startuphook_list +ffffffff83771000 D sysctl_lock +ffffffff83771018 D sysctl_disklock +ffffffff83771030 d openbsd +ffffffff83771034 d arg_max +ffffffff83771038 d posix_version +ffffffff8377103c d ngroups_max +ffffffff83771040 d int_one +ffffffff83771044 d maxpartitions +ffffffff83771048 d raw_part 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syslogf_rwlock +ffffffff8377a018 D log_mtx +ffffffff8377a028 D log_kq_mtx +ffffffff8377a038 D logstash_in +ffffffff8377a040 D logstash_out +ffffffff8377a048 D logstash_rwlock +ffffffff8377b000 D pool_head +ffffffff8377b010 D pool_lock +ffffffff8377b028 D pool_debug +ffffffff8377b030 D pool_allocator_single +ffffffff8377b048 D pool_allocator_multi +ffffffff8377b060 D pool_allocator_multi_ni +ffffffff8377b078 D pool_gc_tick +ffffffff8377b0c0 D pool_gc_task +ffffffff8377c000 D kprintf_mutex +ffffffff8377c010 D db_panic +ffffffff8377c014 D splassert_ctl +ffffffff8377c018 D v_putc +ffffffff8377c020 D printf_flags +ffffffff8377d000 D userconf_base +ffffffff8377d004 D userconf_maxdev +ffffffff8377d008 D userconf_totdev +ffffffff8377d00c D userconf_maxlocnames +ffffffff8377d010 D userconf_cnt +ffffffff8377d014 D userconf_lines +ffffffff8377d018 D userconf_histsz +ffffffff8377d020 D userconf_cmds +ffffffff8377e000 D ftlock +ffffffff8377f000 d ppollcollect.poll_errintvl +ffffffff83780000 D ttydefchars +ffffffff83780014 D ttclos +ffffffff8378001b D ttopen +ffffffff83780022 D ttybg +ffffffff83780028 D ttyin +ffffffff8378002e D ttyout +ffffffff83780038 D ttylist_lock +ffffffff83781000 D linesw +ffffffff83781280 D nlinesw +ffffffff83782000 D pt_softc_lock +ffffffff83783000 d mbstat_boot_boot_cpumem +ffffffff837830c0 D mbstat +ffffffff837830d0 D mclsizes +ffffffff837830f0 D m_extref_mtx +ffffffff83783100 D m_pool_allocator +ffffffff83783120 D m_types +ffffffff83784000 D somaxconn +ffffffff83784004 D sominconn +ffffffff83784008 D sosplice_lock +ffffffff83785000 D sb_max +ffffffff83786000 D unp_df_lock +ffffffff83786018 D unp_gc_lock +ffffffff83786030 D unp_rights_mtx +ffffffff83786040 D unp_ino_mtx +ffffffff83786050 D unp_gc_task +ffffffff83786080 D unpst_sendspace +ffffffff83786084 D unpst_recvspace +ffffffff83786088 D unpsq_sendspace +ffffffff8378608c D unpsq_recvspace +ffffffff83786090 D unpdg_sendspace +ffffffff83786094 D unpdg_recvspace +ffffffff83787000 D doingcache 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SHAPad2 +ffffffff8379f000 D rtmap_gc +ffffffff8379f018 D rt_rc +ffffffff837a0000 D rt_labels +ffffffff837a0010 D rtlabel_mtx +ffffffff837a1000 D enc_cloner +ffffffff837a2000 D gre_cloner +ffffffff837a2030 D gre_list +ffffffff837a2040 D mgre_cloner +ffffffff837a2070 D egre_cloner +ffffffff837a20a0 D nvgre_cloner +ffffffff837a20d0 D eoip_cloner +ffffffff837a3000 D trunk_cloner +ffffffff837a4000 d aggr_cloner +ffffffff837a5000 d tpmr_cloner +ffffffff837a6000 D mpe_cloner +ffffffff837a7000 D mpw_cloner +ffffffff837a8000 D mpip_cloner +ffffffff837a9000 d bpe_cloner +ffffffff837a9030 d bpe_lock +ffffffff837aa000 D vether_cloner +ffffffff837ab000 d rport_cloner +ffffffff837ab030 d rport_interfaces_lock +ffffffff837ac000 D pair_cloner +ffffffff837ad000 d vxlan_cloner +ffffffff837ad030 d vxlan_lock +ffffffff837ad048 d vxlan_teps +ffffffff837ae000 D underload_interval +ffffffff837ae010 D wg_cloner +ffffffff837af000 d stoeplitz_keyseed +ffffffff837b0000 D ieee80211_cache_size +ffffffff837b1000 D arpt_prune +ffffffff837b1004 D arpt_keep +ffffffff837b1008 D arpt_down +ffffffff837b1010 D arpinq +ffffffff837b1048 D arp_mtx +ffffffff837b1058 D arp_maxtries +ffffffff837b2000 D ipport_firstauto +ffffffff837b2004 D ipport_lastauto +ffffffff837b2008 D ipport_hifirstauto +ffffffff837b200c D ipport_hilastauto +ffffffff837b3000 D divert_sendspace +ffffffff837b3004 D divert_recvspace +ffffffff837b3008 D divbhashsize +ffffffff837b4000 D icmptstamprepl +ffffffff837b4004 D icmperrppslim +ffffffff837b4008 D icmp_redirtimeout +ffffffff837b5000 D ip_sendredirects +ffffffff837b5004 D ip_defttl +ffffffff837b5008 D ip_mtudisc +ffffffff837b500c D ip_mtudisc_timeout +ffffffff837b5010 D ipq_mutex +ffffffff837b5020 D ip_maxqueue +ffffffff837b5028 D ipintrq +ffffffff837b5060 d ipsend_task +ffffffff837b5090 d ipsendraw_task +ffffffff837b6000 D ip_mrtproto +ffffffff837b6004 d sin +ffffffff837b7000 D rip_sendspace +ffffffff837b7008 D rip_recvspace +ffffffff837b8000 D tcp_debug_mtx +ffffffff837b9000 D tcp_rst_ppslim +ffffffff837b9004 D tcp_ackdrop_ppslim +ffffffff837b9008 D tcp_syn_hash_size +ffffffff837b900c D tcp_syn_cache_limit +ffffffff837b9010 D tcp_syn_bucket_limit +ffffffff837b9014 D tcp_syn_use_limit +ffffffff837b9018 D syn_cache_mtx +ffffffff837ba000 D tcp_timer_mtx +ffffffff837ba010 D tcp_mssdflt +ffffffff837ba014 D tcp_rttdflt +ffffffff837ba018 D tcp_do_rfc1323 +ffffffff837ba01c D tcp_do_sack +ffffffff837ba020 D tcp_do_rfc3390 +ffffffff837ba024 D tcp_do_tso +ffffffff837ba028 D tcp_reass_limit +ffffffff837ba02c D tcp_sackhole_limit +ffffffff837bb000 D tcp_keepinit +ffffffff837bb004 D tcp_keepidle +ffffffff837bb008 D tcp_keepintvl +ffffffff837bb00c D tcp_keepinit_sec +ffffffff837bb010 D tcp_keepidle_sec +ffffffff837bb014 D tcp_keepintvl_sec +ffffffff837bb018 D tcp_maxpersistidle +ffffffff837bb01c D tcp_delack_msecs +ffffffff837bc000 D tcp_sendspace +ffffffff837bc004 D tcp_recvspace +ffffffff837bc008 D tcp_autorcvbuf_inc +ffffffff837bd000 D udpcksum +ffffffff837bd004 D udp_sendspace +ffffffff837bd008 D udp_recvspace +ffffffff837be000 D ipsec_flows_mtx +ffffffff837be010 D ipsec_ids_idle +ffffffff837be014 D ipsec_ids_next_flow +ffffffff837be018 D ipsec_policy_head +ffffffff837be028 D ipsp_ids_gc_timeout +ffffffff837be070 D tdb_sadb_mtx +ffffffff837be080 d tdb_hashmask +ffffffff837bf000 D ipo_tdb_mtx +ffffffff837bf010 D ipsec_acquire_mtx +ffffffff837bf020 D ipsec_acquire_head +ffffffff837c0000 D ipsec_keep_invalid +ffffffff837c0004 D ipsec_require_pfs +ffffffff837c0008 D ipsec_soft_timeout +ffffffff837c000c D ipsec_exp_timeout +ffffffff837c0010 D ipsec_soft_first_use +ffffffff837c0014 D ipsec_exp_first_use +ffffffff837c0018 D ipsec_expire_acquire +ffffffff837c001c D esp_enable +ffffffff837c0020 D ah_enable +ffffffff837c1000 D udpencap_enable +ffffffff837c1004 D udpencap_port +ffffffff837c2000 D carp_vh_rc +ffffffff837c2020 D carp_sc_rc +ffffffff837c2040 D carpctl_allow +ffffffff837c2044 D carpctl_log +ffffffff837c2048 D carp_cloner +ffffffff837c3000 d PADDING +ffffffff837c4000 d PADDING +ffffffff837c5000 d weak_keys +ffffffff837c6000 D swcr_id +ffffffff837c7000 D window_inflate +ffffffff837c7004 D window_deflate +ffffffff837c8000 D ghash_update +ffffffff837c9000 D mpls_defttl +ffffffff837c9004 D mpls_mapttl_ip +ffffffff837ca000 D nfskevq_lock +ffffffff837cb000 D desirednfsrvcache +ffffffff837cc000 D nfs_niothreads +ffffffff837cd000 D fragtbl +ffffffff837ce000 D ffs_vtbl +ffffffff837cf000 D dirchk +ffffffff837d0000 D desireddquot +ffffffff837d1000 D amap_list_lock +ffffffff837d2000 d uao_list_lock +ffffffff837d3000 D udv_lock +ffffffff837d4000 d uvmexp_countersboot_boot_cpumem +ffffffff837d4100 D uvmexp_counters +ffffffff837d4108 D vm_min_kernel_address +ffffffff837d5000 D no_constraint +ffffffff837d6000 d uvm_kmapent_warn_rate +ffffffff837d7000 D maxslp +ffffffff837d8000 D uvmpagerops +ffffffff837d9000 D uvm_swap_data_lock +ffffffff837d9010 D swap_syscall_lock +ffffffff837d9028 D oommtx +ffffffff837da000 D uvm_doswapencrypt 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icmp6_mtudisc_hiwat +ffffffff837e1004 d icmp6_mtudisc_lowat +ffffffff837e2000 d randomtab_20 +ffffffff837e3000 D ip6intrq +ffffffff837e3038 d ip6send_task +ffffffff837e4000 D nd6_timer_next +ffffffff837e4008 D nd6_expire_next +ffffffff837e4010 D nd6_delay +ffffffff837e4014 D nd6_umaxtries +ffffffff837e4018 D nd6_mmaxtries +ffffffff837e401c D nd6_gctimer +ffffffff837e4020 D nd6_maxndopt +ffffffff837e4028 D nd6_mtx +ffffffff837e4038 D nd6_list +ffffffff837e5000 d dadq +ffffffff837e6000 D pfkeyv2_mtx +ffffffff837e6010 d pfkeyv2_seq +ffffffff837e7000 D sadb_exts_allowed_in +ffffffff837e7090 D sadb_exts_required_in +ffffffff837e8000 D cold +ffffffff837e9000 D bdevsw +ffffffff837e9460 D nblkdev +ffffffff837e9470 D cdevsw +ffffffff837eb450 D nchrdev +ffffffff837eb454 D mem_no +ffffffff837eb458 D swapdev +ffffffff837eb460 D constab +ffffffff837ec000 D machine +ffffffff837ec008 D cpu_idle_cycle_fcn +ffffffff837ec010 D lid_action +ffffffff837ec014 D pwr_action +ffffffff837ec018 D isa_constraint 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+ffffffff837f7000 D i8259_pic +ffffffff837f8000 D softintr_pic +ffffffff837f9000 D ipifunc +ffffffff837fa000 D setperf_mp_mutex +ffffffff837fb000 D db_Grp6 +ffffffff837fb040 D db_Grp7 +ffffffff837fb100 D db_Grp8 +ffffffff837fb140 D db_Grp9 +ffffffff837fb200 D db_GrpA +ffffffff837fb240 D db_GrpB +ffffffff837fb280 D db_GrpC +ffffffff837fb2c0 D db_Grp0f1e +ffffffff837fb380 D db_inst_0f0x +ffffffff837fb500 D db_inst_0f1x +ffffffff837fb680 D db_inst_0f2x +ffffffff837fb800 D db_inst_0f3x +ffffffff837fb980 D db_inst_0f8x +ffffffff837fbb00 D db_inst_0f9x +ffffffff837fbc80 D db_inst_0fax +ffffffff837fbe00 D db_inst_0fbx +ffffffff837fbf80 D db_inst_0fcx +ffffffff837fc100 D db_inst_0f +ffffffff837fc180 D db_Esc92 +ffffffff837fc1c0 D db_Esc94 +ffffffff837fc200 D db_Esc95 +ffffffff837fc240 D db_Esc96 +ffffffff837fc280 D db_Esc97 +ffffffff837fc2c0 D db_Esca5 +ffffffff837fc300 D db_Escb4 +ffffffff837fc340 D db_Esce3 +ffffffff837fc380 D db_Escf4 +ffffffff837fc3c0 D db_Esc8 +ffffffff837fc480 D db_Esc9 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spleen16x32_data +ffffffff838081f0 d spleen32x64_data +ffffffff83817000 D nsphy_cd +ffffffff83818000 D nsphyter_cd +ffffffff83819000 D gentbi_cd +ffffffff8381a000 D qsphy_cd +ffffffff8381b000 D inphy_cd +ffffffff8381c000 D iophy_cd +ffffffff8381d000 D eephy_cd +ffffffff8381e000 D exphy_cd +ffffffff8381f000 D rlphy_cd +ffffffff83820000 D lxtphy_cd +ffffffff83821000 D luphy_cd +ffffffff83822000 D mtdphy_cd +ffffffff83823000 D icsphy_cd +ffffffff83824000 D sqphy_cd +ffffffff83825000 D tqphy_cd +ffffffff83826000 D ukphy_cd +ffffffff83827000 D dcphy_cd +ffffffff83828000 D bmtphy_cd +ffffffff83829000 D brgphy_cd +ffffffff8382a000 D xmphy_cd +ffffffff8382b000 D amphy_cd +ffffffff8382c000 D acphy_cd +ffffffff8382d000 D nsgphy_cd +ffffffff8382e000 D urlphy_cd +ffffffff8382f000 D rgephy_cd +ffffffff83830000 D ciphy_cd +ffffffff83831000 D ipgphy_cd +ffffffff83832000 D etphy_cd +ffffffff83833000 D jmphy_cd +ffffffff83834000 D atphy_cd +ffffffff83835000 D scsi_autoconf +ffffffff83835008 D scsibus_cd +ffffffff83836000 D cd_cd +ffffffff83837000 D ch_cd +ffffffff83837020 D chquirks +ffffffff83838000 D sd_cd +ffffffff83839000 D st_cd +ffffffff8383a000 D uk_cd +ffffffff8383b000 D safte_cd +ffffffff8383c000 D ses_cd +ffffffff8383d000 D sym_cd +ffffffff8383d020 D sym_devices +ffffffff8383d070 D asym_devices +ffffffff8383e000 D rdac_cd +ffffffff8383e020 D rdac_devices +ffffffff8383f000 D emc_cd +ffffffff8383f020 D emc_devices +ffffffff83840000 D hds_cd +ffffffff83840020 D hds_devices +ffffffff83841000 D atapiscsi_cd +ffffffff83842000 D wd_cd +ffffffff83842020 d wddumpmulti +ffffffff83843000 D mainbus_cd +ffffffff83843020 D mba_iba +ffffffff83844000 D bios_cd +ffffffff83844020 D smbios_uninfo +ffffffff83845000 D mpbios_cd +ffffffff83845020 d mp_conf +ffffffff83845070 d extint_bus +ffffffff838450a0 d smi_bus +ffffffff838450d0 d nmi_bus +ffffffff83846000 D need_retpoline +ffffffff83847000 D cpu_info_full_primary +ffffffff8384a000 D cpu_info_list +ffffffff8384a008 D mp_cpu_funcs +ffffffff8384a020 D cpu_cd +ffffffff8384a040 D cpu_info +ffffffff8384b000 D local_pic +ffffffff8384b098 D lapic_readreg +ffffffff8384b0a0 D lapic_writereg +ffffffff8384b0a8 D x86_ipi +ffffffff8384c000 D ioapic_cold +ffffffff8384c008 D ioapic_cd +ffffffff8384d000 D efifb_std_descr +ffffffff8384d030 D efifb_descrs +ffffffff8384d038 D efifb_accessops +ffffffff8384d098 D efifb_cd +ffffffff8384e000 D pvbus_cd +ffffffff8384e020 D pvbus_types +ffffffff8384e0e0 D pvbus_dma_tag +ffffffff8384f000 D pvclock_cd +ffffffff8384f020 D pvclock_timecounter +ffffffff83850000 D vmt_tclo_rpc +ffffffff838500d0 D vmt_cd +ffffffff83851000 D xen_cd +ffffffff83851020 D xen_bus_dma_tag +ffffffff83852000 D xnf_cd +ffffffff83853000 D xbf_cd +ffffffff83854000 D hv_msg_dispatch +ffffffff83854110 D hv_timecounter +ffffffff83854160 D hyperv_cd +ffffffff83855000 d hv_ic_devs +ffffffff83856000 D hvn_cd +ffffffff83857000 D hvs_cd +ffffffff83858000 D virtio_cd +ffffffff83859000 D vio_cd +ffffffff8385a000 D vioblk_cd +ffffffff8385b000 D viomb_cd +ffffffff8385c000 D viornd_cd +ffffffff8385d000 D vioscsi_cd +ffffffff8385e000 D vmmci_cd +ffffffff8385f000 D pci_cd +ffffffff83860000 D arc_fw_hdr +ffffffff83860008 D arc_cd +ffffffff83861000 D jmb_cd +ffffffff83862000 D mfii_cd +ffffffff83863000 D ips_cd +ffffffff83864000 D eap_cd +ffffffff83865000 D auacer_cd +ffffffff83866000 D auich_cd +ffffffff83867000 D azalia_cd +ffffffff83868000 D envy_cd +ffffffff83868020 D envy_matchids +ffffffff83868030 D envy_rates +ffffffff838680b0 D ak4524_dac +ffffffff838680d8 D ak4524_adc +ffffffff83868100 D ak4358_dac +ffffffff83868128 D ak5365_adc +ffffffff83868150 D unkenvy_codec +ffffffff83868180 D envy_cards +ffffffff838683f0 D envy_cards_ht +ffffffff83868600 d julia_eeprom +ffffffff83869000 D emu_cd +ffffffff8386a000 D auixp_cd +ffffffff8386b000 D clcs_cd +ffffffff8386c000 D yds_cd +ffffffff8386d000 D auvia_cd +ffffffff8386e000 D qle_cd +ffffffff8386f000 D mpii_cd +ffffffff83870000 D aq_cd +ffffffff83871000 D de_cd +ffffffff83872000 D pcn_cd +ffffffff83873000 D wdc_sii3114_vtbl +ffffffff83873038 D wdc_pdc203xx_vtbl +ffffffff83873070 D wdc_svwsata_vtbl +ffffffff838730a8 D pciide_cd +ffffffff838730d0 d sis_hostbr_type +ffffffff83874000 D ppb_cd +ffffffff83875000 D vr_cd +ffffffff83875020 D vr_devices +ffffffff83876000 D txp_cd +ffffffff83877000 D bt848_card_signature +ffffffff83878000 D bktr_cd +ffffffff83879000 D em_cd +ffffffff8387a000 D ixgb_cd +ffffffff8387b000 D ix_cd +ffffffff8387b020 D ixgbe_smart_speed +ffffffff8387b024 D ixgbe_enable_msix +ffffffff8387c000 D ixv_driver_version +ffffffff8387c008 D ixv_cd +ffffffff8387d000 D ixl_cd +ffffffff8387d020 d ixl_sff_lock +ffffffff8387e000 D ice_cd +ffffffff8387f000 D xge_cd +ffffffff83880000 D thtc_cd +ffffffff83880020 D tht_cd +ffffffff83880040 D tht_txt_desc +ffffffff83880068 D tht_rxf_desc +ffffffff83880090 D tht_rxd_desc +ffffffff838800b8 D tht_txf_desc +ffffffff83881000 D myx_cd +ffffffff83882000 D oce_cd +ffffffff83883000 D dc_devs +ffffffff83884000 D cas_cd +ffffffff83885000 D sis_cd +ffffffff83886000 D se_cd +ffffffff83887000 D mbg_cd +ffffffff83888000 D cbb_cd +ffffffff83888020 D yc_chipsets +ffffffff838881b0 d pccbb_funcs +ffffffff838881e0 d pccbb_pcmcia_funcs +ffffffff83889000 D skc_cd +ffffffff83889020 D sk_cd +ffffffff8388a000 D mskc_cd +ffffffff8388a020 D msk_cd +ffffffff8388b000 D puc_cd +ffffffff8388c000 D puc_ndevs +ffffffff8388d000 D iwi_cd +ffffffff8388e000 D wpi_cd +ffffffff8388f000 D iwn_cd +ffffffff83890000 D iwm_cd +ffffffff83891000 D iwx_cd +ffffffff83892000 d .compoundliteral +ffffffff83892040 d .compoundliteral.4 +ffffffff83892080 d .compoundliteral.5 +ffffffff838920b0 d .compoundliteral.6 +ffffffff838920f0 d .compoundliteral.7 +ffffffff83892130 d .compoundliteral.8 +ffffffff83893000 D cmpci_cd +ffffffff83894000 D iha_cd +ffffffff83895000 D pcscp_cd +ffffffff83895020 D pcscp_glue +ffffffff83896000 D bge_cd +ffffffff83897000 D bnx_firmwares +ffffffff83897160 D bnx_rv2ps +ffffffff838971c0 D bnx_cd +ffffffff838971e0 d flash_5709 +ffffffff83897210 d flash_table +ffffffff83898000 D vge_cd +ffffffff83899000 D stge_cd +ffffffff8389a000 D nfe_cd +ffffffff8389b000 D et_cd +ffffffff8389c000 D jme_cd +ffffffff8389d000 D age_cd +ffffffff8389e000 D alc_dma_burst +ffffffff8389e020 D alc_cd +ffffffff8389f000 D ale_cd +ffffffff838a0000 D amdpm_cd +ffffffff838a0020 d amdpm_timecounter +ffffffff838a1000 D bce_cd +ffffffff838a2000 D rtwn_cd +ffffffff838a3000 d ral_rt2560_opns +ffffffff838a3028 d ral_rt2661_opns +ffffffff838a3050 d ral_rt2860_opns +ffffffff838a4000 D piixpm_cd +ffffffff838a5000 D vic_cd +ffffffff838a6000 D vmx_cd +ffffffff838a7000 D vmwpvs_cd +ffffffff838a8000 D lii_cd +ffffffff838a9000 D ichiic_cd +ffffffff838aa000 D viapm_cd +ffffffff838aa020 d viapm_timecounter +ffffffff838ab000 D amdiic_cd +ffffffff838ac000 D nviic_cd +ffffffff838ad000 D kate_cd +ffffffff838ae000 D km_cd +ffffffff838af000 D cpu_model_offsets +ffffffff838af070 D ksmn_cd +ffffffff838b0000 D itherm_cd +ffffffff838b1000 D pchtemp_cd +ffffffff838b2000 D xspd_cd +ffffffff838b3000 D bwfm_pci_buscore_ops +ffffffff838b3030 D bwfm_pci_bus_ops +ffffffff838b3058 D bwfm_pci_msgbuf_ops +ffffffff838b4000 D bnxt_cd +ffffffff838b5000 D mcx_cd +ffffffff838b6000 D iavf_cd +ffffffff838b7000 D rge_cd +ffffffff838b8000 D igc_cd +ffffffff838b9000 D ngbe_cd +ffffffff838ba000 D agp_cd +ffffffff838bb000 D intagp_cd +ffffffff838bb020 D agp_i810_methods +ffffffff838bc000 D reservation_ww_class +ffffffff838bd000 d bridge_lock +ffffffff838bd018 d bridge_list +ffffffff838be000 d drm_connector_enum_list +ffffffff838be1f8 d connector_list_lock +ffffffff838be210 d connector_list +ffffffff838bf000 d kernel_fb_helper_list +ffffffff838bf010 d kernel_fb_helper_lock +ffffffff838c0000 D drm_global_mutex +ffffffff838c1000 D i2c_bit_algo +ffffffff838c1010 d drm_fence_context_count +ffffffff838c1018 d dma_fence_stub_mtx +ffffffff838c1028 D wait_bit_mtx +ffffffff838c1038 D shrinkers +ffffffff838c2000 d crtc_ww_class +ffffffff838c3000 d panel_lock +ffffffff838c3018 d panel_list +ffffffff838c4000 d ttm_global_mutex +ffffffff838c5000 d pool_shrink_rwsem +ffffffff838c6000 D drm_sched_policy +ffffffff838c7000 D intel_bbops +ffffffff838c8000 d intel_dpcd_quirks +ffffffff838c9000 d i915_sys_placement +ffffffff838c9010 d i915_ttm_bo_driver +ffffffff838ca000 d mchdev_lock +ffffffff838cb000 D inteldrm_stdscreen +ffffffff838cb030 D inteldrm_scrlist +ffffffff838cb038 D inteldrm_screenlist +ffffffff838cb048 D inteldrm_accessops +ffffffff838cb0a8 D inteldrm_cd +ffffffff838cc000 d mitigations +ffffffff838cd000 D i915_modparams +ffffffff838ce000 d schedule_lock +ffffffff838cf000 D intel_graphics_stolen_res +ffffffff838d0000 D btc_valid_sclk +ffffffff838d1000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff838d1020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff838d2000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff838d2008 d r600_cs_packet_parse_vline.vline_status +ffffffff838d3000 d r100_asic +ffffffff838d32e0 d r200_asic +ffffffff838d35c0 d r300_asic_pcie +ffffffff838d38a0 d r300_asic +ffffffff838d3b80 d r420_asic +ffffffff838d3e60 d rs400_asic +ffffffff838d4140 d rs600_asic +ffffffff838d4420 d rs690_asic +ffffffff838d4700 d rv515_asic +ffffffff838d49e0 d r520_asic +ffffffff838d4cc0 d r600_asic +ffffffff838d4fa0 d rv6xx_asic +ffffffff838d5280 d rs780_asic +ffffffff838d5560 d rv770_asic +ffffffff838d5840 d evergreen_asic +ffffffff838d5b20 d sumo_asic +ffffffff838d5e00 d btc_asic +ffffffff838d60e0 d cayman_asic +ffffffff838d63c0 d trinity_asic +ffffffff838d66a0 d si_asic +ffffffff838d6980 d ci_asic +ffffffff838d6c60 d kv_asic +ffffffff838d7000 d dce6_funcs +ffffffff838d7018 d dce6_hdmi_funcs +ffffffff838d7088 d dce6_dp_funcs +ffffffff838d70f8 d dce4_funcs +ffffffff838d7110 d dce4_hdmi_funcs +ffffffff838d7180 d dce4_dp_funcs +ffffffff838d71f0 d dce32_funcs +ffffffff838d7208 d dce32_hdmi_funcs +ffffffff838d7278 d dce32_dp_funcs +ffffffff838d72e8 d r600_funcs +ffffffff838d7300 d r600_hdmi_funcs +ffffffff838d8000 D radeon_modeset +ffffffff838d8004 D radeon_dynclks +ffffffff838d8008 D radeon_agpmode +ffffffff838d800c D radeon_gart_size +ffffffff838d8010 D radeon_tv +ffffffff838d8014 D radeon_audio +ffffffff838d8018 D radeon_pcie_gen2 +ffffffff838d801c D radeon_msi +ffffffff838d8020 D radeon_lockup_timeout +ffffffff838d8024 D radeon_dpm +ffffffff838d8028 D radeon_aspm +ffffffff838d802c D radeon_runtime_pm +ffffffff838d8030 D radeon_vm_size +ffffffff838d8034 D radeon_vm_block_size +ffffffff838d8038 D radeon_use_pflipirq +ffffffff838d803c D radeon_bapm +ffffffff838d8040 D radeon_backlight +ffffffff838d8044 D radeon_auxch +ffffffff838d8048 D radeon_uvd +ffffffff838d804c D radeon_vce +ffffffff838d8050 D radeon_si_support +ffffffff838d8054 D radeon_cik_support +ffffffff838d8058 D radeondrm_cd +ffffffff838d8078 D radeondrm_stdscreen +ffffffff838d80a8 D radeondrm_scrlist +ffffffff838d80b0 D radeondrm_screenlist +ffffffff838d80c0 D radeondrm_accessops +ffffffff838d9000 D radeon_bbops +ffffffff838da000 d radeon_bo_driver +ffffffff838db000 d verde_pg_init +ffffffff838dc000 d cac_weights_pitcairn +ffffffff838dc4d0 d cac_weights_oland +ffffffff838dd000 d aldebaran_rst_handlers +ffffffff838dd028 d aldebaran_mode2_handler +ffffffff838de000 d amdgpu_vbios_version_attrs +ffffffff838df000 D amdgpu_asic_name +ffffffff838e0000 D amdgpu_vram_limit +ffffffff838e0004 D amdgpu_gart_size +ffffffff838e0008 D amdgpu_gtt_size +ffffffff838e000c D amdgpu_moverate +ffffffff838e0010 D amdgpu_audio +ffffffff838e0014 D amdgpu_pcie_gen2 +ffffffff838e0018 D amdgpu_msi +ffffffff838e001c D amdgpu_dpm +ffffffff838e0020 D amdgpu_fw_load_type +ffffffff838e0024 D amdgpu_aspm +ffffffff838e0028 D amdgpu_runtime_pm +ffffffff838e002c D amdgpu_ip_block_mask +ffffffff838e0030 D amdgpu_bapm +ffffffff838e0034 D amdgpu_vm_size +ffffffff838e0038 D amdgpu_vm_fragment_size +ffffffff838e003c D amdgpu_vm_block_size +ffffffff838e0040 D amdgpu_vm_update_mode +ffffffff838e0044 D amdgpu_dc +ffffffff838e0048 D amdgpu_sched_jobs +ffffffff838e004c D amdgpu_sched_hw_submission +ffffffff838e0050 D amdgpu_cg_mask +ffffffff838e0058 D amdgpu_pg_mask +ffffffff838e005c D amdgpu_sdma_phase_quantum +ffffffff838e0060 D amdgpu_svm_default_granularity +ffffffff838e0064 D amdgpu_pp_feature_mask +ffffffff838e0068 D amdgpu_lbpw +ffffffff838e006c D amdgpu_compute_multipipe +ffffffff838e0070 D amdgpu_gpu_recovery +ffffffff838e0074 D amdgpu_smu_pptable_id +ffffffff838e0078 D amdgpu_dc_feature_mask +ffffffff838e007c D amdgpu_async_gfx_ring +ffffffff838e0080 D amdgpu_mcbp +ffffffff838e0084 D amdgpu_discovery +ffffffff838e0088 D amdgpu_uni_mes +ffffffff838e008c D amdgpu_noretry +ffffffff838e0090 D amdgpu_force_asic_type +ffffffff838e0094 D amdgpu_tmz +ffffffff838e0098 D amdgpu_reset_method +ffffffff838e009c D amdgpu_num_kcq +ffffffff838e00a0 D amdgpu_use_xgmi_p2p +ffffffff838e00a4 D amdgpu_sg_display +ffffffff838e00a8 D amdgpu_user_partt_mode +ffffffff838e00ac D amdgpu_seamless +ffffffff838e00b0 D amdgpu_agp +ffffffff838e00b4 D amdgpu_wbrf +ffffffff838e00b8 D amdgpu_damage_clips +ffffffff838e00c0 D mgpu_info +ffffffff838e0578 D amdgpu_ras_enable +ffffffff838e057c D amdgpu_ras_mask +ffffffff838e0580 D amdgpu_bad_page_threshold +ffffffff838e0584 D amdgpu_dm_abm_level +ffffffff838e0588 D amdgpu_backlight +ffffffff838e0590 D amdgpu_cd +ffffffff838e05b0 D amdgpu_stdscreen +ffffffff838e05e0 D amdgpu_scrlist +ffffffff838e05e8 D amdgpu_screenlist +ffffffff838e05f8 D amdgpu_accessops +ffffffff838e1000 d amdgpu_gtt_mgr_attributes +ffffffff838e2000 D amdgpu_bbops +ffffffff838e3000 D soc15_ih_clientid_name +ffffffff838e4000 D ras_error_string +ffffffff838e4030 D ras_block_string +ffffffff838e40d0 D ras_mca_block_string +ffffffff838e5000 d amdgpu_bo_driver +ffffffff838e6000 d amdgpu_vram_mgr_attributes +ffffffff838e7000 d xgmi_mutex +ffffffff838e7018 D xgmi_ras_hw_ops +ffffffff838e7058 D xgmi_ras +ffffffff838e8000 D aqua_vanjaram_xcp_funcs +ffffffff838e8050 D usr_reg_addrs +ffffffff838e80b0 D usr1_reg_addrs +ffffffff838e9000 D gfx_v11_0_3_ras +ffffffff838ea000 d gfx_v9_0_ras +ffffffff838eb000 D gfx_v9_4_ras +ffffffff838ec000 D gfx_v9_4_2_ras_ops +ffffffff838ec040 D gfx_v9_4_2_ras +ffffffff838ed000 D gfx_v9_4_3_xcp_funcs +ffffffff838ed020 D gfx_v9_4_3_ras_ops +ffffffff838ed060 D gfx_v9_4_3_ras +ffffffff838ee000 D gfxhub_v1_2_xcp_funcs +ffffffff838ef000 D hdp_v4_0_ras_hw_ops +ffffffff838ef040 D hdp_v4_0_ras +ffffffff838f0000 d jpeg_v2_6_ras +ffffffff838f1000 d jpeg_v4_0_ras +ffffffff838f2000 d jpeg_v4_0_3_ras +ffffffff838f3000 D mca_v3_0_mp0_ras +ffffffff838f3058 D mca_v3_0_mp1_ras +ffffffff838f30b0 D mca_v3_0_mpio_ras +ffffffff838f4000 D mmhub_v1_0_ras_hw_ops +ffffffff838f4040 D mmhub_v1_0_ras +ffffffff838f5000 D mmhub_v1_7_ras_hw_ops +ffffffff838f5040 D mmhub_v1_7_ras +ffffffff838f6000 D mmhub_v1_8_ras +ffffffff838f6060 d mmhub_v1_8_err_codes +ffffffff838f7000 D mmhub_v9_4_ras +ffffffff838f8000 D nbio_v4_3_ras +ffffffff838f9000 D nbio_v7_4_ras +ffffffff838fa000 D nbio_v7_9_ras +ffffffff838fb000 d sriov_sc_video_codecs_encode +ffffffff838fb010 d sriov_sc_video_codecs_decode_vcn1 +ffffffff838fb020 d sriov_sc_video_codecs_decode_vcn0 +ffffffff838fb030 d sriov_sc_video_codecs_encode_array +ffffffff838fb060 d sriov_sc_video_codecs_decode_array_vcn1 +ffffffff838fb0f0 d sriov_sc_video_codecs_decode_array_vcn0 +ffffffff838fc000 d sdma_v4_0_ras +ffffffff838fd000 D sdma_v4_4_ras +ffffffff838fe000 D sdma_v4_4_2_xcp_funcs +ffffffff838fe020 d sdma_v4_4_2_ras +ffffffff838fe080 d sdma_v4_4_2_err_codes +ffffffff838ff000 d sdma_v6_0_3_ras +ffffffff83900000 d sienna_cichlid_rst_handlers +ffffffff83900028 d sienna_cichlid_mode2_handler +ffffffff83901000 d smu_v13_0_10_rst_handlers +ffffffff83901028 d smu_v13_0_10_mode2_handler +ffffffff83902000 d sriov_vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff83902010 d sriov_vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff83902020 d sriov_vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff83902030 d sriov_vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff83902040 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff83902070 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff83902100 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff83902140 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff83903000 D umc_v12_0_ras +ffffffff83904000 D umc_v6_1_ras +ffffffff83905000 D umc_v6_7_ras +ffffffff83906000 D umc_v8_10_ras +ffffffff83907000 D umc_v8_7_ras +ffffffff83908000 d vcn_v2_6_ras +ffffffff83909000 d vcn_v4_0_unified_ring_vm_funcs +ffffffff83909148 d vcn_v4_0_ras +ffffffff8390a000 d vcn_v4_0_3_ras +ffffffff8390b000 d amdgpu_dm_mode_config_helperfuncs +ffffffff8390b010 d dm_atomic_state_funcs +ffffffff8390c000 d construct_integrated_info.result +ffffffff8390c004 d bios_parser_get_firmware_info.result +ffffffff8390d000 d dce_funcs +ffffffff8390e000 d dce110_funcs +ffffffff8390f000 d dce112_funcs +ffffffff83910000 d dce120_funcs +ffffffff83911000 d rv1_clk_funcs +ffffffff839110a0 d rv1_clk_internal_funcs +ffffffff83912000 d rv2_clk_internal_funcs +ffffffff83913000 d dcn2_funcs +ffffffff83914000 d dcn201_funcs +ffffffff83915000 d dcn21_funcs +ffffffff839150a0 d rn_bw_params +ffffffff83916000 D dcn3_fpga_funcs +ffffffff839160a0 d dcn3_funcs +ffffffff83917000 d vg_funcs +ffffffff839170a0 d dummy_clocks +ffffffff839171d0 d vg_bw_params +ffffffff83918000 d dcn31_funcs +ffffffff839180a0 d dcn31_bw_params +ffffffff83919000 d dcn314_funcs +ffffffff839190a0 d dcn314_bw_params +ffffffff8391a000 d dcn315_funcs +ffffffff8391a0a0 d dcn315_bw_params +ffffffff8391b000 d dcn316_funcs +ffffffff8391b0a0 d dcn316_bw_params +ffffffff8391c000 d dcn32_funcs +ffffffff8391d000 D dcn35_fpga_funcs +ffffffff8391d0a0 d dcn35_funcs +ffffffff8391d140 d dcn35_bw_params +ffffffff8391e000 d dcn401_funcs +ffffffff8391f000 d dcn2_spl_funcs +ffffffff8391f008 d dcn32_spl_funcs +ffffffff8391f010 d dcn401_spl_funcs +ffffffff83920000 d dcn201_opp_funcs +ffffffff83921000 d dcn30_afmt_funcs +ffffffff83922000 d dcn30_vpg_funcs +ffffffff83923000 d dcn31_afmt_funcs +ffffffff83924000 d dcn31_apg_funcs +ffffffff83925000 d dcn31_vpg_funcs +ffffffff83926000 D dcn1_0_ip +ffffffff839261b8 D dcn1_0_soc +ffffffff83928000 D dcn2_0_ip +ffffffff839281b8 D dcn2_0_nv14_ip +ffffffff83928370 D dcn2_0_soc +ffffffff839296a8 D dcn2_0_nv14_soc +ffffffff8392a9e0 D dcn2_0_nv12_soc +ffffffff8392bd18 D dcn2_1_ip +ffffffff8392bed0 D dcn2_1_soc +ffffffff8392d208 D ddr4_wm_table_gs +ffffffff8392d2c8 D lpddr4_wm_table_gs +ffffffff8392d388 D lpddr4_wm_table_with_disabled_ppt +ffffffff8392d448 D ddr4_wm_table_rn +ffffffff8392d508 D ddr4_1R_wm_table_rn +ffffffff8392d5c8 D lpddr4_wm_table_rn +ffffffff8392e000 D dcn3_0_ip +ffffffff8392e1b8 D dcn3_0_soc +ffffffff83930000 D dcn3_01_ip +ffffffff839301b8 D dcn3_01_soc +ffffffff839314f0 D ddr4_wm_table +ffffffff839315b0 D lpddr5_wm_table +ffffffff83932000 D dcn3_02_ip +ffffffff839321b8 D dcn3_02_soc +ffffffff83934000 D dcn3_03_ip +ffffffff839341b8 D dcn3_03_soc +ffffffff83936000 D dcn3_1_ip +ffffffff839361b8 D dcn3_15_ip +ffffffff83936370 D dcn3_16_ip +ffffffff83936528 d dcn3_15_soc +ffffffff83937860 d dcn3_1_soc +ffffffff83938b98 d dcn3_16_soc +ffffffff8393a000 D dcn3_14_ip +ffffffff8393a1b8 d dcn3_14_soc +ffffffff8393c000 D dcn3_2_ip +ffffffff8393c1b8 D dcn3_2_soc +ffffffff8393e000 D dcn3_21_ip +ffffffff8393e1b8 D dcn3_21_soc +ffffffff83940000 D dcn3_5_ip +ffffffff839401b8 D dcn3_5_soc +ffffffff83942000 D dcn3_51_ip +ffffffff839421b8 D dcn3_51_soc +ffffffff83944000 d dcn10_dpp_cap +ffffffff83945000 d dcn20_dpp_funcs +ffffffff83945120 d dcn20_dpp_cap +ffffffff83946000 d dcn201_dpp_funcs +ffffffff83946120 d dcn201_dpp_cap +ffffffff83947000 d dcn30_dpp_funcs +ffffffff83947120 d dcn30_dpp_cap +ffffffff83948000 d dcn32_dpp_funcs +ffffffff83948120 d dcn32_dpp_cap +ffffffff83949000 d dcn35_dpp_funcs +ffffffff8394a000 d dcn401_dpp_funcs +ffffffff8394a120 d dcn401_dpp_cap +ffffffff8394b000 d dsc_policy_max_target_bpp_limit +ffffffff8394c000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff8394d000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff8394e000 d dcn20_hubp_funcs +ffffffff8394f000 d dcn201_hubp_funcs +ffffffff83950000 d dcn21_hubp_funcs +ffffffff83951000 d dcn30_hubp_funcs +ffffffff83952000 d dcn31_hubp_funcs +ffffffff83953000 d dcn32_hubp_funcs +ffffffff83954000 d dcn35_hubp_funcs +ffffffff83955000 d dcn401_hubp_funcs ffffffff83956000 d dummy_irq_info_funcs ffffffff83956010 d hpd_irq_info_funcs +ffffffff83956020 d vblank_irq_info_funcs ffffffff83957000 d dummy_irq_info_funcs ffffffff83957010 d hpd_irq_info_funcs +ffffffff83957020 d vblank_irq_info_funcs ffffffff83958000 d dummy_irq_info_funcs ffffffff83958010 d hpd_irq_info_funcs +ffffffff83958020 d vblank_irq_info_funcs ffffffff83959000 d dummy_irq_info_funcs ffffffff83959010 d hpd_irq_info_funcs ffffffff8395a000 d dummy_irq_info_funcs @@ -58938,3036 +58942,3021 @@ ffffffff8395f000 d dummy_irq_info_funcs ffffffff8395f010 d hpd_irq_info_funcs ffffffff83960000 d dummy_irq_info_funcs ffffffff83960010 d hpd_irq_info_funcs -ffffffff83960020 d irq_service_funcs_dcn35 ffffffff83961000 d dummy_irq_info_funcs ffffffff83961010 d hpd_irq_info_funcs -ffffffff83961020 d irq_service_funcs_dcn351 ffffffff83962000 d dummy_irq_info_funcs ffffffff83962010 d hpd_irq_info_funcs -ffffffff83963000 d dcn20_opp_funcs -ffffffff83964000 d dcn20_tg_funcs -ffffffff83965000 d dcn201_tg_funcs -ffffffff83966000 d dcn30_tg_funcs -ffffffff83967000 d dcn30_tg_funcs -ffffffff83968000 d dcn31_tg_funcs -ffffffff83969000 d dcn314_tg_funcs -ffffffff8396a000 d dcn32_tg_funcs -ffffffff8396b000 d dcn35_tg_funcs -ffffffff8396c000 d dcn401_tg_funcs -ffffffff8396d000 d dcn201_res_pool_funcs -ffffffff8396d108 d dcn201_ip -ffffffff8396d2c0 d dcn201_soc -ffffffff8396f000 d res_cap_dcn301 -ffffffff8396f040 d dcn301_res_pool_funcs -ffffffff83970000 d dcn302_res_pool_funcs -ffffffff83971000 d dcn303_res_pool_funcs -ffffffff83972000 d dcn31_res_pool_funcs -ffffffff83973000 d dcn314_res_pool_funcs -ffffffff83974000 d dcn315_res_pool_funcs -ffffffff83975000 d dcn316_res_pool_funcs -ffffffff83976000 d dcn32_res_pool_funcs -ffffffff83977000 d dcn321_res_pool_funcs -ffffffff83978000 d dcn35_res_pool_funcs -ffffffff83979000 d dcn351_res_pool_funcs -ffffffff8397a000 d dcn401_res_pool_funcs -ffffffff8397b000 D sharpness_level_adj -ffffffff8397c000 D easf_v_bf3_mode_lookup -ffffffff8397c070 D easf_h_bf3_mode_lookup -ffffffff8397c0e0 D easf_reducer_gain6_6tap_lookup -ffffffff8397c150 D easf_reducer_gain4_6tap_lookup -ffffffff8397c1c0 D easf_gain_ring6_6tap_lookup -ffffffff8397c230 D easf_gain_ring4_6tap_lookup -ffffffff8397c2a0 D easf_reducer_gain6_4tap_lookup -ffffffff8397c310 D easf_reducer_gain4_4tap_lookup -ffffffff8397c380 D easf_gain_ring6_4tap_lookup -ffffffff8397c3f0 D easf_gain_ring4_4tap_lookup -ffffffff8397c460 D easf_3tap_dntilt_uptilt_offset_lookup -ffffffff8397c4d0 D easf_3tap_uptilt_maxval_lookup -ffffffff8397c540 D easf_3tap_dntilt_slope_lookup -ffffffff8397c5b0 D easf_3tap_uptilt1_slope_lookup -ffffffff8397c620 D easf_3tap_uptilt2_slope_lookup -ffffffff8397c690 D easf_3tap_uptilt2_offset_lookup -ffffffff8397d000 D DIDTEDCConfig_P12 -ffffffff8397d070 d smu7_profiling -ffffffff8397e000 d cyan_skillfish_message_map -ffffffff8397ebd0 d cyan_skillfish_table_map -ffffffff8397f000 d navi10_table_map -ffffffff8397f090 d navi10_pwr_src_map -ffffffff8397f0a0 d navi10_workload_map -ffffffff8397f0f0 d navi10_message_map -ffffffff8397fcc0 d navi10_clk_map -ffffffff8397fda0 d navi10_feature_mask_map -ffffffff83981000 d sienna_cichlid_table_map -ffffffff83981090 d sienna_cichlid_pwr_src_map -ffffffff839810a0 d sienna_cichlid_workload_map -ffffffff839810f0 d sienna_cichlid_message_map -ffffffff83981cc0 d sienna_cichlid_clk_map -ffffffff83981da0 d sienna_cichlid_feature_mask_map -ffffffff83983000 d vangogh_workload_map -ffffffff83983050 d vangogh_message_map -ffffffff83983c20 d vangogh_feature_mask_map -ffffffff83984040 d vangogh_table_map -ffffffff83985000 d renoir_workload_map -ffffffff83985050 d renoir_message_map -ffffffff83985c20 d renoir_clk_map -ffffffff83985d00 d renoir_table_map -ffffffff83986000 d smu_v13_0_0_message_map -ffffffff83986bd0 d smu_v13_0_0_table_map -ffffffff83986c60 d smu_v13_0_0_pwr_src_map -ffffffff83986c70 d smu_v13_0_0_workload_map -ffffffff83986cc0 d smu_v13_0_0_clk_map -ffffffff83986da0 d smu_v13_0_0_feature_mask_map -ffffffff83988000 d smu_v13_0_4_message_map -ffffffff83988bd0 d smu_v13_0_4_feature_mask_map -ffffffff83988ff0 d smu_v13_0_4_table_map -ffffffff8398a000 d smu_v13_0_5_message_map -ffffffff8398abd0 d smu_v13_0_5_feature_mask_map -ffffffff8398aff0 d smu_v13_0_5_table_map -ffffffff8398c000 d sdma_err_codes -ffffffff8398c010 d mmhub_err_codes -ffffffff8398d000 d smu_v13_0_7_message_map -ffffffff8398dbd0 d smu_v13_0_7_table_map -ffffffff8398dc60 d smu_v13_0_7_pwr_src_map -ffffffff8398dc70 d smu_v13_0_7_workload_map -ffffffff8398dcc0 d smu_v13_0_7_clk_map -ffffffff8398dda0 d smu_v13_0_7_feature_mask_map -ffffffff8398f000 d yellow_carp_message_map -ffffffff8398fbd0 d yellow_carp_feature_mask_map -ffffffff8398fff0 d yellow_carp_table_map -ffffffff83991000 d smu_v14_0_0_message_map -ffffffff83991bd0 d smu_v14_0_0_feature_mask_map -ffffffff83991ff0 d smu_v14_0_0_table_map -ffffffff83993000 d smu_v14_0_2_feature_mask_map -ffffffff83993420 d smu_v14_0_2_table_map -ffffffff839934b0 d smu_v14_0_2_pwr_src_map -ffffffff839934c0 d smu_v14_0_2_workload_map -ffffffff83993510 d smu_v14_0_2_message_map -ffffffff839940e0 d smu_v14_0_2_clk_map -ffffffff83995000 d pstate_policy_desc -ffffffff83995010 d xgmi_plpd_policy_desc -ffffffff83996000 D pci_conf_lock -ffffffff83996010 D pci_bus_dma_tag -ffffffff83996088 D msi_pic -ffffffff83996120 D msix_pic -ffffffff83997000 D pchb_cd -ffffffff83998000 D amas_cd -ffffffff83999000 D cardslot_cd -ffffffff8399a000 D cardbus_cd -ffffffff8399b000 d csdevs -ffffffff8399c000 d ral_rt2560_opns -ffffffff8399c028 d ral_rt2661_opns -ffffffff8399c050 d ral_rt2860_opns -ffffffff8399d000 D pcmcia_cd -ffffffff8399e000 D pcmcia_3cxem556_func0 -ffffffff8399e0b8 D pcmcia_3cxem556_func0_cfe0 -ffffffff8399e158 D pcmcia_megahertz_xjem1144_func0 -ffffffff8399e210 D pcmcia_megahertz_xjem1144_func0_cfe0 -ffffffff8399e2b0 d pcmcia_3cxem556_func1 -ffffffff8399e368 d pcmcia_3cxem556_func1_cfe0 -ffffffff8399e408 d pcmcia_megahertz_xjem1144_func1 -ffffffff8399e4c0 d pcmcia_megahertz_xjem1144_func1_cfe0 -ffffffff8399e560 d pcmcia_sierra_a555_func1 -ffffffff8399e618 d pcmcia_sierra_a555_func1_cfe0 -ffffffff8399e6b8 d pcmcia_sveclancard_func0 -ffffffff8399e770 d pcmcia_sveclancard_func0_cfe0 -ffffffff8399f000 D ep_pcmcia_prod -ffffffff839a0000 D aic_pcmcia_prod -ffffffff839a1000 D com_pcmcia_prod -ffffffff839a2000 D wdc_pcmcia_pr -ffffffff839a3000 D sm_pcmcia_prod -ffffffff839a4000 D xe_cd -ffffffff839a5000 D pcib_cd -ffffffff839a6000 D amdpcib_cd -ffffffff839a7000 D tcpcib_cd -ffffffff839a8000 D aapic_cd -ffffffff839a9000 D hme_cd -ffffffff839aa000 D isa_cd -ffffffff839ab000 D isadma_cd -ffffffff839ac000 D fdc_cd -ffffffff839ad000 D fd_types -ffffffff839ad1f8 D fd_cd -ffffffff839ae000 D mpu_cd -ffffffff839af000 D pcppi_cd -ffffffff839b0000 D spkr_cd -ffffffff839b1000 D wbsio_cd -ffffffff839b2000 D schsio_cd -ffffffff839b3000 D it_cd -ffffffff839b4000 D uguru_cd -ffffffff839b5000 D aps_cd -ffffffff839b6000 D isa_bus_dma_tag -ffffffff839b7000 D wsdisplay_cd -ffffffff839b7020 D wsdisplay_cons -ffffffff839b7058 D wsdisplay_defaultscreens -ffffffff839b8000 D wskbd_cd -ffffffff839b8020 D wskbd_default_bell_data -ffffffff839b8030 D wskbd_default_keyrepeat_data -ffffffff839b8040 D wskbd_srcops -ffffffff839b9000 d compose_tab -ffffffff839ba000 D wsmouse_cd -ffffffff839ba020 D wsmouse_srcops -ffffffff839bb000 D wsmux_srcops -ffffffff839bb030 D wsmux_tree_lock -ffffffff839bc000 D vt100_output -ffffffff839bd000 D pckbd_cd -ffffffff839be000 D pms_cd -ffffffff839be020 d synaptics_params -ffffffff839be030 d alps_params -ffffffff839bf000 D skgpio_cd -ffffffff839c0000 D pctr_conf_lock -ffffffff839c1000 D ukbd_keymapdata -ffffffff839c2000 D usbrev_str -ffffffff839c2030 D usb_cd -ffffffff839c3000 d usbd_ratecheck.errinterval -ffffffff839c4000 D uhub_cd -ffffffff839c5000 D uaudio_cd -ffffffff839c6000 D uvideo_ctrls -ffffffff839c62d8 D uvideo_cd -ffffffff839c7000 D utvfu_norm_params -ffffffff839c7030 D utvfu_cd -ffffffff839c8000 D udl_reg_vals_640x480_60 -ffffffff839c8020 D udl_reg_vals_640x480_67 -ffffffff839c8040 D udl_reg_vals_640x480_72 -ffffffff839c8060 D udl_reg_vals_640x480_75 -ffffffff839c8080 D udl_reg_vals_800x480_61 -ffffffff839c80a0 D udl_reg_vals_800x600_56 -ffffffff839c80c0 D udl_reg_vals_800x600_60 -ffffffff839c80e0 D udl_reg_vals_800x600_72 -ffffffff839c8100 D udl_reg_vals_800x600_74 -ffffffff839c8120 D udl_reg_vals_800x600_75 -ffffffff839c8140 D udl_reg_vals_1024x768_60 -ffffffff839c8160 D udl_reg_vals_1024x768_70 -ffffffff839c8180 D udl_reg_vals_1024x768_75 -ffffffff839c81a0 D udl_reg_vals_1280x800_60 -ffffffff839c81c0 D udl_reg_vals_1280x960_60 -ffffffff839c81e0 D udl_reg_vals_1280x1024_60 -ffffffff839c8200 D udl_reg_vals_1280x1024_75 -ffffffff839c8220 D udl_reg_vals_1366x768_60 -ffffffff839c8240 D udl_reg_vals_1440x900_60 -ffffffff839c8260 D udl_reg_vals_1440x900_59 -ffffffff839c8280 D udl_reg_vals_1440x900_75 -ffffffff839c82a0 D udl_reg_vals_1680x1050_60 -ffffffff839c82c0 D udl_reg_vals_1600x1200_60 -ffffffff839c82e0 D udl_reg_vals_1920x1080_60 -ffffffff839c8300 D udl_null_key_1 -ffffffff839c8310 D udl_decomp_table -ffffffff839c9510 D udl_cd -ffffffff839c9530 D udl_stdscreen -ffffffff839c9560 D udl_scrlist -ffffffff839c9568 D udl_screenlist -ffffffff839c9578 D udl_accessops -ffffffff839ca000 D umidi_cd -ffffffff839cb000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE -ffffffff839cb020 d umq_ROLAND_ROLAND_UM1_2 -ffffffff839cb040 d umq_ROLAND_ROLAND_SC8850_2 -ffffffff839cb060 d umq_ROLAND_ROLAND_SD90_2 -ffffffff839cb080 d umq_ROLAND_ROLAND_UM880N_0 -ffffffff839cb0a0 d umq_ROLAND_ROLAND_UA100_2 -ffffffff839cb0c0 d umq_ROLAND_ROLAND_UM4_2 -ffffffff839cb0e0 d umq_ROLAND_ROLAND_U8_2 -ffffffff839cb100 d umq_ROLAND_ROLAND_UM2_2 -ffffffff839cb120 d umq_ROLAND_ROLAND_SC8820_2 -ffffffff839cb140 d umq_ROLAND_ROLAND_PC300_2 -ffffffff839cb160 d umq_ROLAND_ROLAND_SK500_2 -ffffffff839cb180 d umq_ROLAND_ROLAND_SCD70_2 -ffffffff839cb1a0 d umq_ROLAND_ROLAND_UM550_0 -ffffffff839cb1c0 d umq_ROLAND_ROLAND_SD20_0 -ffffffff839cb1e0 d umq_ROLAND_ROLAND_SD80_0 -ffffffff839cb200 d umq_ROLAND_ROLAND_UA700_3 -ffffffff839cb220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE -ffffffff839cb240 D umidi_quirklist -ffffffff839cb4a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc -ffffffff839cb4c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints -ffffffff839cb4d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc -ffffffff839cb4f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints -ffffffff839cb500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc -ffffffff839cb520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints -ffffffff839cb530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc -ffffffff839cb550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints -ffffffff839cb560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc -ffffffff839cb580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints -ffffffff839cb590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc -ffffffff839cb5b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints -ffffffff839cb5c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc -ffffffff839cb5e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints -ffffffff839cb5f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc -ffffffff839cb610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints -ffffffff839cb620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc -ffffffff839cb640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints -ffffffff839cb650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc -ffffffff839cb670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints -ffffffff839cb680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc -ffffffff839cb6a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints -ffffffff839cb6b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc -ffffffff839cb6d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints -ffffffff839cb6e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc -ffffffff839cb700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints -ffffffff839cb710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc -ffffffff839cb730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints -ffffffff839cb740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc -ffffffff839cb760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints -ffffffff839cb770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc -ffffffff839cb790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints -ffffffff839cb7a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc -ffffffff839cb7c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints -ffffffff839cb7d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc -ffffffff839cb7f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints -ffffffff839cc000 D ucom_cd -ffffffff839cc020 D sysctl_ucomlock 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smu_v14_0_0_feature_mask_map +ffffffff83995ff0 d smu_v14_0_0_table_map +ffffffff83997000 d smu_v14_0_2_feature_mask_map +ffffffff83997420 d smu_v14_0_2_table_map +ffffffff839974b0 d smu_v14_0_2_pwr_src_map +ffffffff839974c0 d smu_v14_0_2_workload_map +ffffffff83997510 d smu_v14_0_2_message_map +ffffffff839980e0 d smu_v14_0_2_clk_map +ffffffff83999000 d pstate_policy_desc +ffffffff83999010 d xgmi_plpd_policy_desc +ffffffff8399a000 D pci_conf_lock +ffffffff8399a010 D pci_bus_dma_tag +ffffffff8399a088 D msi_pic +ffffffff8399a120 D msix_pic +ffffffff8399b000 D pchb_cd +ffffffff8399c000 D amas_cd +ffffffff8399d000 D cardslot_cd +ffffffff8399e000 D cardbus_cd +ffffffff8399f000 d csdevs +ffffffff839a0000 d ral_rt2560_opns +ffffffff839a0028 d ral_rt2661_opns +ffffffff839a0050 d ral_rt2860_opns +ffffffff839a1000 D pcmcia_cd +ffffffff839a2000 D pcmcia_3cxem556_func0 +ffffffff839a20b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff839a2158 D pcmcia_megahertz_xjem1144_func0 +ffffffff839a2210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff839a22b0 d pcmcia_3cxem556_func1 +ffffffff839a2368 d pcmcia_3cxem556_func1_cfe0 +ffffffff839a2408 d pcmcia_megahertz_xjem1144_func1 +ffffffff839a24c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff839a2560 d pcmcia_sierra_a555_func1 +ffffffff839a2618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff839a26b8 d pcmcia_sveclancard_func0 +ffffffff839a2770 d pcmcia_sveclancard_func0_cfe0 +ffffffff839a3000 D ep_pcmcia_prod +ffffffff839a4000 D aic_pcmcia_prod +ffffffff839a5000 D com_pcmcia_prod +ffffffff839a6000 D wdc_pcmcia_pr +ffffffff839a7000 D sm_pcmcia_prod +ffffffff839a8000 D xe_cd +ffffffff839a9000 D pcib_cd +ffffffff839aa000 D amdpcib_cd +ffffffff839ab000 D tcpcib_cd +ffffffff839ac000 D aapic_cd +ffffffff839ad000 D hme_cd +ffffffff839ae000 D isa_cd +ffffffff839af000 D isadma_cd +ffffffff839b0000 D fdc_cd +ffffffff839b1000 D fd_types +ffffffff839b11f8 D fd_cd +ffffffff839b2000 D mpu_cd +ffffffff839b3000 D pcppi_cd +ffffffff839b4000 D spkr_cd +ffffffff839b5000 D wbsio_cd +ffffffff839b6000 D schsio_cd +ffffffff839b7000 D it_cd +ffffffff839b8000 D uguru_cd +ffffffff839b9000 D aps_cd +ffffffff839ba000 D isa_bus_dma_tag +ffffffff839bb000 D wsdisplay_cd +ffffffff839bb020 D wsdisplay_cons +ffffffff839bb058 D wsdisplay_defaultscreens +ffffffff839bc000 D wskbd_cd +ffffffff839bc020 D wskbd_default_bell_data +ffffffff839bc030 D wskbd_default_keyrepeat_data +ffffffff839bc040 D wskbd_srcops +ffffffff839bd000 d compose_tab +ffffffff839be000 D wsmouse_cd +ffffffff839be020 D wsmouse_srcops +ffffffff839bf000 D wsmux_srcops +ffffffff839bf030 D wsmux_tree_lock +ffffffff839c0000 D vt100_output +ffffffff839c1000 D pckbd_cd +ffffffff839c2000 D pms_cd +ffffffff839c2020 d synaptics_params +ffffffff839c2030 d alps_params +ffffffff839c3000 D skgpio_cd +ffffffff839c4000 D pctr_conf_lock +ffffffff839c5000 D ukbd_keymapdata +ffffffff839c6000 D usbrev_str +ffffffff839c6030 D usb_cd +ffffffff839c7000 d usbd_ratecheck.errinterval +ffffffff839c8000 D uhub_cd +ffffffff839c9000 D uaudio_cd +ffffffff839ca000 D uvideo_ctrls +ffffffff839ca2d8 D uvideo_cd +ffffffff839cb000 D utvfu_norm_params +ffffffff839cb030 D utvfu_cd +ffffffff839cc000 D udl_reg_vals_640x480_60 +ffffffff839cc020 D udl_reg_vals_640x480_67 +ffffffff839cc040 D udl_reg_vals_640x480_72 +ffffffff839cc060 D udl_reg_vals_640x480_75 +ffffffff839cc080 D udl_reg_vals_800x480_61 +ffffffff839cc0a0 D udl_reg_vals_800x600_56 +ffffffff839cc0c0 D udl_reg_vals_800x600_60 +ffffffff839cc0e0 D udl_reg_vals_800x600_72 +ffffffff839cc100 D udl_reg_vals_800x600_74 +ffffffff839cc120 D udl_reg_vals_800x600_75 +ffffffff839cc140 D udl_reg_vals_1024x768_60 +ffffffff839cc160 D udl_reg_vals_1024x768_70 +ffffffff839cc180 D udl_reg_vals_1024x768_75 +ffffffff839cc1a0 D udl_reg_vals_1280x800_60 +ffffffff839cc1c0 D udl_reg_vals_1280x960_60 +ffffffff839cc1e0 D udl_reg_vals_1280x1024_60 +ffffffff839cc200 D udl_reg_vals_1280x1024_75 +ffffffff839cc220 D udl_reg_vals_1366x768_60 +ffffffff839cc240 D udl_reg_vals_1440x900_60 +ffffffff839cc260 D udl_reg_vals_1440x900_59 +ffffffff839cc280 D udl_reg_vals_1440x900_75 +ffffffff839cc2a0 D udl_reg_vals_1680x1050_60 +ffffffff839cc2c0 D udl_reg_vals_1600x1200_60 +ffffffff839cc2e0 D udl_reg_vals_1920x1080_60 +ffffffff839cc300 D udl_null_key_1 +ffffffff839cc310 D udl_decomp_table +ffffffff839cd510 D udl_cd +ffffffff839cd530 D udl_stdscreen +ffffffff839cd560 D udl_scrlist +ffffffff839cd568 D udl_screenlist +ffffffff839cd578 D udl_accessops +ffffffff839ce000 D umidi_cd +ffffffff839cf000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff839cf020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff839cf040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff839cf060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff839cf080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff839cf0a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff839cf0c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff839cf0e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff839cf100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff839cf120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff839cf140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff839cf160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff839cf180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff839cf1a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff839cf1c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff839cf1e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff839cf200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff839cf220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff839cf240 D umidi_quirklist +ffffffff839cf4a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff839cf4c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff839cf4d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff839cf4f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff839cf500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff839cf520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff839cf530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff839cf550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff839cf560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff839cf580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff839cf590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff839cf5b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff839cf5c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff839cf5e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff839cf5f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff839cf610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff839cf620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff839cf640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff839cf650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff839cf670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff839cf680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff839cf6a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff839cf6b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff839cf6d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff839cf6e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff839cf700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff839cf710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff839cf730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff839cf740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff839cf760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff839cf770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff839cf790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff839cf7a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff839cf7c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff839cf7d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff839cf7f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff839d0000 D ucom_cd +ffffffff839d0020 D sysctl_ucomlock +ffffffff839d1000 D ugen_cd +ffffffff839d2000 D uhidev_cd +ffffffff839d2020 d uhidev_use_rdesc.reportbuf +ffffffff839d3000 D uhid_cd +ffffffff839d4000 D fido_cd +ffffffff839d5000 D ujoy_cd +ffffffff839d6000 D ukbd_cd +ffffffff839d7000 D ums_cd +ffffffff839d7020 d ums_fix_elecom_descriptor.match +ffffffff839d8000 D umt_cd +ffffffff839d9000 D def_scale +ffffffff839d9020 D uts_cd +ffffffff839da000 D ubcmtp_cd +ffffffff839da020 d ubcmtp_wsmousecfg +ffffffff839db000 D ucycom_cd +ffffffff839dc000 D uslhcom_cd +ffffffff839dd000 D ulpt_fwdevs +ffffffff839dd060 D ulpt_cd +ffffffff839dd080 D ulptusein +ffffffff839de000 D umass_cd +ffffffff839de020 d umass_bbb_transfer.dCBWtag +ffffffff839df000 D uthum_cd +ffffffff839e0000 D ugold_cd +ffffffff839e0020 d cmd_init +ffffffff839e0028 d cmd_type +ffffffff839e0030 d cmd_data +ffffffff839e1000 D utrh_cd +ffffffff839e2000 D uoakrh_cd +ffffffff839e3000 D uoaklux_cd +ffffffff839e4000 D uoakv_cd +ffffffff839e5000 D uonerng_cd +ffffffff839e6000 D urng_cd +ffffffff839e7000 D udcf_cd +ffffffff839e8000 D umbg_cd +ffffffff839e9000 D uvisor_cd +ffffffff839ea000 D udsbr_cd +ffffffff839eb000 D utwitch_cd +ffffffff839ec000 D aue_cd +ffffffff839ed000 D axe_cd +ffffffff839ee000 D axen_cd +ffffffff839ef000 D smsc_cd +ffffffff839f0000 D cue_devs +ffffffff839f0010 D cue_cd +ffffffff839f1000 D kue_cd +ffffffff839f2000 D cdce_cd +ffffffff839f3000 D urndis_cd +ffffffff839f4000 D mos_cd +ffffffff839f5000 D mue_cd +ffffffff839f6000 D udav_cd +ffffffff839f7000 D upl_devs +ffffffff839f7008 D upl_cd +ffffffff839f8000 D ugl_devs +ffffffff839f8008 D ugl_cd +ffffffff839f9000 D url_cd +ffffffff839fa000 D ure_cd +ffffffff839fb000 D uaq_cd +ffffffff839fc000 D umodem_cd +ffffffff839fd000 D uftdi_cd +ffffffff839fe000 D uplcom_cd +ffffffff839ff000 D umct_cd +ffffffff83a00000 D uvscom_cd +ffffffff83a01000 D ubsa_cd +ffffffff83a02000 D ukspan_cd +ffffffff83a03000 D uslcom_cd +ffffffff83a04000 D uark_cd +ffffffff83a05000 D moscom_cd +ffffffff83a06000 D umcs_cd +ffffffff83a07000 D uscom_cd +ffffffff83a08000 D ucrcom_cd +ffffffff83a09000 D uxrcom_cd +ffffffff83a0a000 D uipaq_cd +ffffffff83a0b000 D umsm_cd +ffffffff83a0c000 D uchcom_cd +ffffffff83a0d000 D uticom_cd +ffffffff83a0e000 D wi_func_usb +ffffffff83a0f000 D atu_cd +ffffffff83a0f020 D atu_devs +ffffffff83a0f270 D atu_radfirm +ffffffff83a10000 D ural_cd +ffffffff83a11000 D rum_cd +ffffffff83a12000 D run_cd +ffffffff83a12020 D rt3070_freqs +ffffffff83a13000 D mtw_cd +ffffffff83a14000 D zyd_cd +ffffffff83a15000 D upgt_cd +ffffffff83a16000 D urtw_cd +ffffffff83a17000 D urtwn_cd +ffffffff83a18000 D rsu_cd +ffffffff83a19000 D otus_cd +ffffffff83a19020 d AR_PLCP_HDR_INTR +ffffffff83a1a000 D umb_xfer_tout +ffffffff83a1a010 D umb_uuid_basic_connect +ffffffff83a1a020 D umb_uuid_context_internet +ffffffff83a1a030 D umb_uuid_qmi_mbim +ffffffff83a1a040 D umb_cd +ffffffff83a1a060 D umb_delay +ffffffff83a1a070 D umb_qmi_alloc_cid +ffffffff83a1a080 D umb_qmi_fcc_auth +ffffffff83a1b000 D uath_cd +ffffffff83a1c000 D uow_cd +ffffffff83a1d000 D uberry_cd +ffffffff83a1e000 D upd_cd +ffffffff83a1e020 d upd_usage_roots +ffffffff83a1e0a0 d upd_usage_batdep +ffffffff83a1f000 D uwacom_cd +ffffffff83a1f020 d uwacom_attach.wacom_report_buf +ffffffff83a20000 D bwfm_usb_bus_ops +ffffffff83a21000 D umstc_cd +ffffffff83a22000 D uhidpp_cd +ffffffff83a23000 D ucc_cd +ffffffff83a24000 D iic_cd +ffffffff83a25000 D probe_addrs_sensor +ffffffff83a25008 D probe_addrs_eeprom +ffffffff83a26000 D lmtemp_cd +ffffffff83a27000 D lmn_worklist +ffffffff83a27240 D lmn_cd +ffffffff83a28000 D lmenv_cd +ffffffff83a29000 D maxtmp_cd +ffffffff83a2a000 D adc_cd +ffffffff83a2b000 D admtemp_cd +ffffffff83a2c000 D admlc_cd +ffffffff83a2d000 D admtm_cd +ffffffff83a2e000 D admtmp_cd +ffffffff83a2f000 D admtt_cd +ffffffff83a30000 D maxds_cd +ffffffff83a31000 D adt_chips +ffffffff83a31160 D worklist +ffffffff83a311a0 D adt_cd +ffffffff83a32000 D admcts_cd +ffffffff83a33000 D wbng_cd +ffffffff83a34000 D nvt_cd +ffffffff83a35000 D adl_worklist +ffffffff83a35138 D adl_cd +ffffffff83a36000 D andl_cd +ffffffff83a37000 D sdtemp_cd +ffffffff83a38000 D lisa_cd +ffffffff83a39000 D ihidev_cd +ffffffff83a3a000 D ikbd_cd +ffffffff83a3b000 D ims_cd +ffffffff83a3c000 D imt_cd +ffffffff83a3d000 D iatp_cd +ffffffff83a3e000 D ietp_cd +ffffffff83a3f000 D bgw_cd +ffffffff83a40000 D icc_cd +ffffffff83a41000 D gpio_cd +ffffffff83a42000 D acpi_cd +ffffffff83a42020 D acpi_pcidevs +ffffffff83a42030 D acpi_pcirootdevs +ffffffff83a42040 D acpi_taskq +ffffffff83a42050 d acpi_indicator.save_led_state +ffffffff83a42060 d acpi_getprop.prop_guid +ffffffff83a42070 d acpi_getpropint.prop_guid +ffffffff83a42080 D acpi_skip_hids +ffffffff83a420f0 D acpi_isa_hids +ffffffff83a42110 D acpi_quiet_hids +ffffffff83a43000 D aml_intlen +ffffffff83a43010 D aml_table +ffffffff83a43af0 d osstring +ffffffff83a43b10 D aml_defobj +ffffffff83a43ca0 D aml_valid_osi +ffffffff83a43d78 D acpi_max_osi +ffffffff83a43d80 D aml_regionspace +ffffffff83a45000 D acpitimer_cd +ffffffff83a45020 d acpi_timecounter +ffffffff83a46000 D acpiac_cd +ffffffff83a46020 D acpiac_hids +ffffffff83a47000 D acpibat_cd +ffffffff83a47020 D acpibat_hids +ffffffff83a48000 D acpibtn_cd +ffffffff83a48020 D acpibtn_hids +ffffffff83a49000 D acpicmos_cd +ffffffff83a49020 D acpicmos_hids +ffffffff83a4a000 D acpicpu_cd +ffffffff83a4a020 D acpicpu_hids +ffffffff83a4a030 d acpicpu_set_pdc.cpu_oscuuid +ffffffff83a4b000 D acpihpet_cd +ffffffff83a4b020 d hpet_timecounter +ffffffff83a4c000 D acpiec_cd +ffffffff83a4c020 D acpiec_hids +ffffffff83a4d000 D acpitz_cd +ffffffff83a4d020 D acpitz_perflevel +ffffffff83a4e000 D acpimadt_cd +ffffffff83a4f000 D acpimcfg_cd +ffffffff83a50000 D acpiprt_map_list +ffffffff83a50010 D acpiprt_cd +ffffffff83a50030 D acpiprt_pri +ffffffff83a51000 D acpidmar_force_cm +ffffffff83a51008 D acpidmar_cd +ffffffff83a51030 D vtd_faults +ffffffff83a52000 D acpidock_cd +ffffffff83a53000 D abl_cd +ffffffff83a53020 D abl_hids +ffffffff83a54000 D asmc_cd +ffffffff83a54020 D asmc_hids +ffffffff83a55000 D acpiasus_cd +ffffffff83a55020 D acpiasus_hids +ffffffff83a56000 D acpithinkpad_cd +ffffffff83a56020 D acpithinkpad_hids +ffffffff83a57000 D acpitoshiba_cd +ffffffff83a57020 D acpitoshiba_hids +ffffffff83a58000 D acpisony_cd +ffffffff83a59000 D acpivideo_cd +ffffffff83a5a000 D acpivout_cd +ffffffff83a5b000 D acpipwrres_cd +ffffffff83a5c000 D aibs_cd +ffffffff83a5c020 d aibs_hids +ffffffff83a5d000 D aplgpio_cd +ffffffff83a5d020 D aplgpio_hids +ffffffff83a5e000 D bytgpio_cd +ffffffff83a5e020 D bytgpio_hids +ffffffff83a5f000 D chvgpio_cd +ffffffff83a5f020 D chvgpio_hids +ffffffff83a60000 D glkgpio_cd +ffffffff83a60020 D glkgpio_hids +ffffffff83a61000 D pchgpio_cd +ffffffff83a61020 D pchgpio_hids +ffffffff83a61090 D pchgpio_devices +ffffffff83a62000 D tipmic_cd +ffffffff83a62020 D tipmic_thermal_regmap +ffffffff83a62030 D tipmic_power_regmap +ffffffff83a63000 D ccpmic_cd +ffffffff83a63020 D ccpmic_thermal_regmap +ffffffff83a63023 D ccpmic_power_regmap +ffffffff83a64000 D com_hids +ffffffff83a65000 D sdhc_hids +ffffffff83a66000 D dwiic_hids +ffffffff83a66050 D ihidev_hids +ffffffff83a66070 D ietp_hids +ffffffff83a66220 D iatp_hids +ffffffff83a66240 d dwiic_acpi_found_ihidev.i2c_hid_guid +ffffffff83a67000 D acpicbkbd_cd +ffffffff83a67020 D acpicbkbd_hids +ffffffff83a68000 D acpials_cd +ffffffff83a68020 D acpials_hids +ffffffff83a69000 D tpm_cd +ffffffff83a69020 D tpm_hids +ffffffff83a6a000 D acpihve_cd +ffffffff83a6b000 D acpisbs_cd +ffffffff83a6b020 D acpisbs_hids +ffffffff83a6c000 D acpisurface_cd +ffffffff83a6c020 D acpisurface_hids +ffffffff83a6d000 D ipmi_acpi_hids +ffffffff83a6e000 D amdgpio_cd +ffffffff83a6e020 D amdgpio_hids +ffffffff83a6f000 D acpihid_cd +ffffffff83a6f020 D acpihid_hids +ffffffff83a6f030 d acpihid_guid +ffffffff83a70000 d iosf_hids +ffffffff83a71000 D intelpmc_cd +ffffffff83a71020 D intelpmc_hids +ffffffff83a71030 d intelpmc_dsm.lps0_dsm_guid +ffffffff83a72000 D pckbc_acpi_cids_kbd +ffffffff83a72010 D pckbc_acpi_cids_mouse +ffffffff83a73000 D acpipci_cd +ffffffff83a73020 D acpipci_hids +ffffffff83a73040 d acpipci_osc.uuid +ffffffff83a74000 D efi_cd +ffffffff83a75000 D vmm_cd +ffffffff83a76000 D vmm_hv_signature +ffffffff83a77000 D sdmmc_cd +ffffffff83a78000 D bwfm_sdio_bus_ops +ffffffff83a78028 D bwfm_sdio_buscore_ops +ffffffff83a79000 D onewire_cd +ffffffff83a7a000 D owid_cd +ffffffff83a7b000 D owsbm_cd +ffffffff83a7c000 D owtemp_cd +ffffffff83a7d000 D owctr_cd +ffffffff83a7e000 D hz +ffffffff83a7e004 D tick +ffffffff83a7e008 D tick_nsec +ffffffff83a7e00c D initialvnodes +ffffffff83a7e010 D maxprocess +ffffffff83a7e014 D maxthread +ffffffff83a7e018 D maxfiles +ffffffff83a7e020 D nmbclust +ffffffff83a7e028 D bufcachepercent +ffffffff83a7e02c D fscale +ffffffff83a7e030 D shminfo +ffffffff83a7e044 D seminfo +ffffffff83a7f000 D extraloc +ffffffff83a7f100 D rextraloc +ffffffff83a7f110 D locnames +ffffffff83a7f1f0 D locnamp +ffffffff83a7f414 D pv_size +ffffffff83a7f420 D pv +ffffffff83a7f650 d loc +ffffffff83a7fae0 D cfdata +ffffffff83a867d0 D cfroots +ffffffff83a867dc D cfroots_size +ffffffff83a867e0 D pdevnames +ffffffff83a86950 D pdevnames_size +ffffffff83a86960 D pdevinit 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ntfs_toupper_usecount +ffffffff83b2c000 B ntfs_prtactive +ffffffff83b2d000 B art_table_gc_list +ffffffff83b2d008 B art_node_gc_list +ffffffff83b2d010 B an_pool +ffffffff83b2d1d8 B at_pool +ffffffff83b2d3a0 B at_heap_4_pool +ffffffff83b2d568 B at_heap_8_pool +ffffffff83b2e000 B bpf_d_list +ffffffff83b2f000 B if_cloners +ffffffff83b2f040 B softnets +ffffffff83b2f240 b if_idxmap +ffffffff83b2f270 B netisr +ffffffff83b2f274 B if_cloners_count +ffffffff83b2f278 B ifq_congestion +ffffffff83b2f27c b net_sn.nettaskqs +ffffffff83b30000 B etheranyaddr +ffffffff83b30010 b ether_sprintf.etherbuf +ffffffff83b30024 b ether_fakeaddr.unit +ffffffff83b31000 B etherip_allow +ffffffff83b31008 B etheripcounters +ffffffff83b32000 b spppq +ffffffff83b32008 b keepalive_ch +ffffffff83b32050 b sppp_cp_type_name.buf +ffffffff83b3205c b sppp_auth_type_name.buf +ffffffff83b32068 b sppp_lcp_opt_name.buf +ffffffff83b32074 b sppp_ipcp_opt_name.buf +ffffffff83b32080 b sppp_ipv6cp_opt_name.buf +ffffffff83b3208c b sppp_proto_name.buf +ffffffff83b320a0 b sppp_dotted_quad.s +ffffffff83b33000 B ppp_softc_list +ffffffff83b34000 B ppp_pkts +ffffffff83b35000 B tun_devs_list +ffffffff83b36000 b eb_entry_pool +ffffffff83b37000 b veb_rule_pool +ffffffff83b38000 B vlan_tagh +ffffffff83b38008 B svlan_tagh +ffffffff83b39000 B pipex_enable +ffffffff83b39008 B pipex_rd_head4 +ffffffff83b39010 b pipex_init.pipex_init_done +ffffffff83b39018 B pipex_session_pool +ffffffff83b391e0 B mppe_key_pool +ffffffff83b393a8 B pipex_session_list +ffffffff83b393b0 B pipex_close_wait_list +ffffffff83b393c0 B pipex_id_hashtable +ffffffff83b395c0 B pipex_peer_addr_hashtable +ffffffff83b397c0 B pipex_timer_ch +ffffffff83b39810 b SHAPad1 +ffffffff83b3a000 b max_keylen +ffffffff83b3a008 B mask_rnhead +ffffffff83b3a010 b rn_ones +ffffffff83b3a018 B rtmask_pool +ffffffff83b3a1e0 b rn_zeros +ffffffff83b3b000 B rtmap_limit +ffffffff83b3b008 B afmap +ffffffff83b3b010 B af2idx +ffffffff83b3b036 B af2idx_max +ffffffff83b3c000 B rtcounters +ffffffff83b3c008 B rtentry_pool +ffffffff83b3c1d0 b rt_hashjitter +ffffffff83b3c1d8 B rtgeneration +ffffffff83b3c1e0 B rttrash +ffffffff83b3c1e8 B rttimer_pool +ffffffff83b3c3b0 B rttimer_mtx +ffffffff83b3d000 B rtptable +ffffffff83b3d048 B rtpcb_pool +ffffffff83b3e000 B enc_allifps +ffffffff83b3e008 B enc_max_unit +ffffffff83b3e010 B enc_ifps +ffffffff83b3e018 B enc_max_rdomain +ffffffff83b3f000 B mgre_tree +ffffffff83b3f008 B egre_tree +ffffffff83b3f010 B nvgre_ucast_tree +ffffffff83b3f018 B nvgre_mcast_tree +ffffffff83b3f020 B eoip_tree +ffffffff83b3f028 B gre_allow +ffffffff83b3f02c B gre_wccp +ffffffff83b3f030 B nvgre_endpoint_pool +ffffffff83b40000 B trunk_list +ffffffff83b41000 b bpe_endpoint_pool +ffffffff83b411c8 b bpe_interfaces +ffffffff83b42000 B pppx_devs +ffffffff83b42008 B pppx_ifs +ffffffff83b42010 B pppx_if_pl +ffffffff83b421d8 b pppac_devs +ffffffff83b43000 b vxlan_endpoint_pool +ffffffff83b44000 B peer_counter +ffffffff83b44008 B wg_counter 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carpcounters +ffffffff83b9b000 B des_check_key +ffffffff83b9c000 B crypto_drivers_num +ffffffff83b9c008 B crypto_drivers +ffffffff83b9c010 B cryptop_pool +ffffffff83b9d000 B swcr_sessions +ffffffff83b9d008 B swcr_sesnum +ffffffff83b9e000 B mpls_mapttl_ip6 +ffffffff83b9f000 b krpc_get_xid.krpc_xid_ctx +ffffffff83b9f038 b krpc_get_xid.called +ffffffff83b9f03c b krpc_call.xid +ffffffff83ba0000 B nfs_bufqlen +ffffffff83ba0004 B nfs_bufqmax +ffffffff83ba0008 B nfs_bufq +ffffffff83ba1000 B nfsbootdevname +ffffffff83ba2000 B kevlist +ffffffff83ba2008 B pnfskq +ffffffff83ba3000 B nfs_node_pool +ffffffff83ba4000 B nfs_realign_test +ffffffff83ba4004 B nfs_realign_count +ffffffff83ba5000 B nfsrvhash +ffffffff83ba5008 B nfsrvhashtbl +ffffffff83ba5010 B nfsrvhashkey +ffffffff83ba5020 B nfsrvlruhead +ffffffff83ba5030 B numnfsrvcache +ffffffff83ba6000 b nfs_get_xid.nfs_xid_ctx +ffffffff83ba6038 b nfs_get_xid.called +ffffffff83ba603c B rpc_call +ffffffff83ba6040 B rpc_vers +ffffffff83ba6044 B nfs_prog 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ffs_dinode1_pool +ffffffff83bab558 b ffs_init.done +ffffffff83bac000 b mfs_minor +ffffffff83bad000 B ufs_mindirhashsize +ffffffff83bad004 B ufs_dirhashmem +ffffffff83bad008 B ufs_dirhashmaxmem +ffffffff83bad010 B ufsdirhash_mtx +ffffffff83bad028 B ufsdirhash_pool +ffffffff83bad1f0 B ufsdirhash_list +ffffffff83bad200 B ufs_dirhashcheck +ffffffff83bad208 B ufsdirhash_key +ffffffff83bae000 B ihashkey +ffffffff83bae010 B ihashtbl +ffffffff83bae018 B ihash +ffffffff83baf000 B dqhash +ffffffff83baf008 B dqhashtbl +ffffffff83baf010 B dqhashkey +ffffffff83baf020 B dqfreelist +ffffffff83baf030 B numdquot +ffffffff83bb0000 b ufs_init.done +ffffffff83bb1000 B ext2gennumber +ffffffff83bb2000 B ext2fs_inode_pool +ffffffff83bb21c8 B ext2fs_dinode_pool +ffffffff83bb3000 B uaddr_pool +ffffffff83bb31c8 B uaddr_bestfit_pool +ffffffff83bb3390 B uaddr_pivot_pool +ffffffff83bb3558 B uaddr_rnd_pool +ffffffff83bb3720 B uaddr_kbootstrap +ffffffff83bb4000 B uvm_amap_chunk_pool +ffffffff83bb41c8 B uvm_amap_pool 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bios_diskinfo +ffffffff83bfe070 B bios_cksumlen +ffffffff83bfe074 B kbd_reset +ffffffff83bfe078 B forceukbd +ffffffff83bfe07c B dumpsize +ffffffff83bfe080 B dumplo +ffffffff83bfe088 B mem_cluster_cnt +ffffffff83bfe090 B mem_clusters +ffffffff83bfe190 B dumpmem_vaddr +ffffffff83bfe198 B dumppcb +ffffffff83bfec50 B dumpmem_sz +ffffffff83bfec58 B proc0paddr +ffffffff83bfec60 B idt +ffffffff83bfec68 b cpu_init_extents.already_done +ffffffff83bfec70 B lo32_vaddr +ffffffff83bfec78 B lo32_paddr +ffffffff83bfec80 B tramp_pdirpa +ffffffff83bfec88 B early_pte_pages +ffffffff83bfec90 B bootinfo +ffffffff83bffc90 B avail_start +ffffffff83bffc98 B avail_end +ffffffff83bffca0 B bios_memmap +ffffffff83bffca8 B bios_efiinfo +ffffffff83bffcb0 B mmap +ffffffff83bffcb8 B kern_end +ffffffff83bffcc0 B dumpmem_paddr +ffffffff83bffcd0 B idt_allocmap +ffffffff83bffdd0 B cpuresetfn +ffffffff83bffdd8 B bios_bootmac +ffffffff83bffde0 B bios_ucode +ffffffff83bffde8 B amd64_delay_quality +ffffffff83bffdf0 B cpu_suspend_cycle_fcn +ffffffff83c00000 B cpuspeed +ffffffff83c00004 B amd64_has_xcrypt +ffffffff83c00008 b identifycpu.prevcpu_1_ecx +ffffffff83c0000c b identifycpu.prevcpu_tpm_ecxflags +ffffffff83c00010 b identifycpu.prevcpu_d_1_eax +ffffffff83c00014 b identifycpu.prevcpu_apmi_edx +ffffffff83c00018 b identifycpu.prevcpu_arch_capa +ffffffff83c00020 B cpu_model +ffffffff83c00050 B amd64_pos_cbit +ffffffff83c00058 B setperf_setup +ffffffff83c00060 B has_rdrand +ffffffff83c00064 B has_rdseed +ffffffff83c00068 b prevcpu_perf_eax +ffffffff83c0006c b prevcpu_perf_edx +ffffffff83c01000 B tsc_is_invariant +ffffffff83c01008 B tsc_frequency +ffffffff83c01010 B tsc_recalibrate +ffffffff83c01040 B tsc_bp_status +ffffffff83c010c0 B tsc_test_cycles +ffffffff83c010c8 B tsc_test_rounds +ffffffff83c010cc B tsc_ingress_barrier +ffffffff83c010d0 B tsc_egress_barrier +ffffffff83c01100 B tsc_ap_status +ffffffff83c01180 B tsc_ap_name +ffffffff83c02000 b vc3_sc +ffffffff83c02010 b viac3_rnd.buffer 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