--- 7.6/2025-01-03T15:48:43Z/2024-12-24T00:00:00Z/nm-bsd-ot14.txt Sat Jan 4 03:30:32 2025 +++ 7.6/2025-01-03T15:48:43Z/2024-12-25T00:00:00Z/nm-bsd-ot14.txt Sat Jan 4 06:09:07 2025 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001418f A acpi_pdirpa 01000000 A __kernel_phys_base -02873000 T __kernel_kutext_phys -02876000 C __kernel_cptext_phys -02877000 C __kernel_rodata_phys -0318d000 R __kernel_kutext_page_phys -0318f000 C __kernel_randomdata_phys -03443000 R __kernel_data_phys -037a0000 D __kernel_kudata_phys -037a2000 C __kernel_bss_phys +02874000 T __kernel_kutext_phys +02877000 C __kernel_cptext_phys +02878000 C __kernel_rodata_phys +0318e000 R __kernel_kutext_page_phys +03190000 C __kernel_randomdata_phys +03444000 R __kernel_data_phys +037a1000 D __kernel_kudata_phys +037a3000 C __kernel_bss_phys 03c00000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -7064,45 +7064,46 @@ ffffffff813784d0 T extent_free ffffffff81378830 T extent_print ffffffff81379000 T device_register_wakeup ffffffff81379030 T sleep_state -ffffffff8137a000 T hibernate_sort_ranges -ffffffff8137a0e0 T hib_alloc -ffffffff8137a210 T hib_getentropy -ffffffff8137a260 T hib_free -ffffffff8137a370 T hiballoc_init -ffffffff8137a400 T uvm_pmr_zero_everything -ffffffff8137a580 T uvm_pmr_dirty_everything -ffffffff8137a6b0 T uvm_pmr_alloc_pig -ffffffff8137a7e0 T uvm_pmr_alloc_piglet -ffffffff8137a900 T uvm_pmr_free_piglet -ffffffff8137a940 T uvm_page_rle -ffffffff8137aa00 T get_hibernate_info -ffffffff8137ad20 T hibernate_zlib_alloc -ffffffff8137ad40 T hibernate_zlib_free -ffffffff8137ad60 T hibernate_inflate_page -ffffffff8137ae90 T hibernate_inflate_region -ffffffff8137afd0 T hibernate_deflate -ffffffff8137b090 T hibernate_write_signature -ffffffff8137b120 T hibernate_write_chunktable -ffffffff8137b1e0 T hibernate_clear_signature -ffffffff8137b2c0 T hibernate_block_io -ffffffff8137b420 T hibernate_compare_signature -ffffffff8137b500 T hibernate_preserve_entropy -ffffffff8137b610 T hibernate_unprotect_ssp -ffffffff8137b6f0 T hibernate_reprotect_ssp -ffffffff8137b740 T hibernate_resume -ffffffff8137bbf0 T hibernate_read_image -ffffffff8137c110 T hibernate_unpack_image -ffffffff8137c370 T hibernate_zlib_reset -ffffffff8137c490 T hibernate_process_chunk -ffffffff8137c4f0 T hibernate_copy_chunk_to_piglet -ffffffff8137c600 T hibernate_calc_rle -ffffffff8137c710 T hibernate_write_rle -ffffffff8137c900 T hibernate_write_chunks -ffffffff8137cee0 T hibernate_read_chunks -ffffffff8137d260 T hibernate_suspend -ffffffff8137d530 T hibernate_alloc -ffffffff8137d720 T hibernate_free -ffffffff8137d7e0 t hiballoc_addr_RBT_COMPARE +ffffffff8137a000 T hibernate_write +ffffffff8137a170 T hibernate_sort_ranges +ffffffff8137a250 T hib_alloc +ffffffff8137a380 T hib_getentropy +ffffffff8137a3d0 T hib_free +ffffffff8137a4e0 T hiballoc_init +ffffffff8137a570 T uvm_pmr_zero_everything +ffffffff8137a6f0 T uvm_pmr_dirty_everything +ffffffff8137a820 T uvm_pmr_alloc_pig +ffffffff8137a950 T uvm_pmr_alloc_piglet +ffffffff8137aa70 T uvm_pmr_free_piglet +ffffffff8137aab0 T uvm_page_rle +ffffffff8137ab70 T get_hibernate_info +ffffffff8137ae90 T hibernate_zlib_alloc +ffffffff8137aeb0 T hibernate_zlib_free +ffffffff8137aed0 T hibernate_inflate_page +ffffffff8137b000 T hibernate_inflate_region +ffffffff8137b140 T hibernate_deflate +ffffffff8137b200 T hibernate_write_signature +ffffffff8137b2e0 T hibernate_write_chunktable +ffffffff8137b3a0 T hibernate_clear_signature +ffffffff8137b480 T hibernate_block_io +ffffffff8137b5e0 T hibernate_compare_signature +ffffffff8137b6c0 T hibernate_preserve_entropy +ffffffff8137b7d0 T hibernate_unprotect_ssp +ffffffff8137b8b0 T hibernate_reprotect_ssp +ffffffff8137b900 T hibernate_resume +ffffffff8137bdb0 T hibernate_read_image +ffffffff8137c2d0 T hibernate_unpack_image +ffffffff8137c530 T hibernate_zlib_reset +ffffffff8137c650 T hibernate_process_chunk +ffffffff8137c6b0 T hibernate_copy_chunk_to_piglet +ffffffff8137c7c0 T hibernate_calc_rle +ffffffff8137c8d0 T hibernate_write_rle +ffffffff8137cb30 T hibernate_write_chunks +ffffffff8137d1b0 T hibernate_read_chunks +ffffffff8137d540 T hibernate_suspend +ffffffff8137d7c0 T hibernate_alloc +ffffffff8137d9b0 T hibernate_free +ffffffff8137da70 t hiballoc_addr_RBT_COMPARE ffffffff8137e000 T filt_logrdetach ffffffff8137e020 T filt_logread ffffffff8137e0b0 T filt_logmodify @@ -10162,13 +10163,13 @@ ffffffff814de4f0 T in_pcbnotifyall ffffffff814de6c0 T in_losing ffffffff814de760 T in_rtchange ffffffff814de7b0 T in_pcbrtentry -ffffffff814de820 T in_pcbhash_lookup -ffffffff814de9c0 T in_pcblookup -ffffffff814dea10 T in_pcblookup_listen -ffffffff814dec90 T in_pcbset_rtableid -ffffffff814ded90 T in_pcbset_laddr -ffffffff814deee0 T in_pcbunset_faddr -ffffffff814defc0 T in_pcbunset_laddr +ffffffff814de840 T in_pcbhash_lookup +ffffffff814de9e0 T in_pcblookup +ffffffff814dea30 T in_pcblookup_listen +ffffffff814decc0 T in_pcbset_rtableid +ffffffff814dedc0 T in_pcbset_laddr +ffffffff814def10 T in_pcbunset_faddr +ffffffff814deff0 T in_pcbunset_laddr ffffffff814e0000 T inet_nat64_mask ffffffff814e0060 T inet_nat64 ffffffff814e0200 T inet_nat64_inet @@ -10310,24 +10311,24 @@ ffffffff814f86e0 t sb_notify ffffffff814f8770 t sbspace ffffffff814f8820 T tcp_clean_sackreport ffffffff814f88a0 T tcp_mss -ffffffff814f8b40 T tcp_sack_partialack -ffffffff814f8c00 T tcp_newreno_partialack -ffffffff814f8d00 T tcp_seq_subtract -ffffffff814f8d30 T tcp_pulloutofband -ffffffff814f8e00 T tcp_update_sack_list -ffffffff814f92c0 T tcp_sack_option -ffffffff814f9800 T tcp_hdrsz -ffffffff814f9870 T tcp_mss_update -ffffffff814f99e0 T tcp_mss_adv -ffffffff814f9a90 T syn_cache_rm -ffffffff814f9c30 T syn_cache_put -ffffffff814f9cc0 T syn_cache_init -ffffffff814f9df0 T syn_cache_insert -ffffffff814fa430 T syn_cache_timer -ffffffff814fa6b0 T syn_cache_respond -ffffffff814fad60 T syn_cache_cleanup -ffffffff814faed0 T syn_cache_lookup -ffffffff814fb160 T syn_cache_unreach +ffffffff814f8b60 T tcp_sack_partialack +ffffffff814f8c20 T tcp_newreno_partialack +ffffffff814f8d20 T tcp_seq_subtract +ffffffff814f8d50 T tcp_pulloutofband +ffffffff814f8e20 T tcp_update_sack_list +ffffffff814f92e0 T tcp_sack_option +ffffffff814f9820 T tcp_hdrsz +ffffffff814f9890 T tcp_mss_update +ffffffff814f9a30 T tcp_mss_adv +ffffffff814f9ae0 T syn_cache_rm +ffffffff814f9c80 T syn_cache_put +ffffffff814f9d10 T syn_cache_init +ffffffff814f9e40 T syn_cache_insert +ffffffff814fa480 T syn_cache_timer +ffffffff814fa700 T syn_cache_respond +ffffffff814fadb0 T syn_cache_cleanup +ffffffff814faf20 T syn_cache_lookup +ffffffff814fb1b0 T syn_cache_unreach ffffffff814fc000 T tcp_sack_output ffffffff814fc080 T tcp_sack_adjust ffffffff814fc100 T tcp_output @@ -11301,7 +11302,7 @@ ffffffff815b20e0 T uvm_anfree_list ffffffff815b2340 T uvm_anon_dropswap ffffffff815b23e0 T uvm_anwait ffffffff815b2420 T uvm_anon_pagein -ffffffff815b25d0 T uvm_anon_release +ffffffff815b25c0 T uvm_anon_release ffffffff815b3000 T uao_reference ffffffff815b3030 T uao_detach ffffffff815b3330 t uao_flush @@ -11330,21189 +11331,21177 @@ ffffffff815b6e40 T uvm_fault_check ffffffff815b7570 T uvm_fault_upper_lookup ffffffff815b77f0 T uvm_fault_upper ffffffff815b7d00 T uvm_fault_lower -ffffffff815b8330 T uvmfault_lookup -ffffffff815b8470 T uvmfault_unlockmaps -ffffffff815b8560 T uvm_fault_lower_lookup -ffffffff815b8840 T uvm_fault_lower_io -ffffffff815b8bc0 T uvm_fault_wire -ffffffff815b8cd0 T uvm_fault_unwire -ffffffff815b8d40 T uvm_fault_unwire_locked -ffffffff815b9000 T uvm_kernacc -ffffffff815b90d0 T uvm_vslock -ffffffff815b9130 T uvm_vsunlock -ffffffff815b9190 T uvm_vslock_device -ffffffff815b9580 T uvm_vsunlock_device -ffffffff815b96d0 T uvm_uarea_alloc -ffffffff815b9700 T uvm_uarea_free -ffffffff815b9770 T uvm_exit -ffffffff815b97a0 T uvm_init_limits -ffffffff815b9800 T uvm_atopg -ffffffff815b98b0 T fill_vmmap -ffffffff815ba000 T uvm_init -ffffffff815ba160 T uvm_init_percpu -ffffffff815bb000 T uvm_io -ffffffff815bc000 T uvm_km_init -ffffffff815bc100 T uvm_km_suballoc -ffffffff815bc260 T uvm_km_pgremove -ffffffff815bc490 T uvm_km_pgremove_intrsafe -ffffffff815bc570 T uvm_km_kmemalloc_pla -ffffffff815bc8c0 T uvm_km_free -ffffffff815bc8f0 T uvm_km_page_init -ffffffff815bc920 T uvm_km_page_lateinit -ffffffff815bc950 T km_alloc -ffffffff815bcd60 T km_free -ffffffff815bd000 T uvm_mapent_free_insert -ffffffff815bd1b0 T uvm_map_addr_augment -ffffffff815bd290 T uvm_mapent_free_remove -ffffffff815bd400 T uvm_map_uaddr_e -ffffffff815bd420 T uvm_mapent_addr_insert -ffffffff815bd5c0 T uvm_mapent_addr_remove -ffffffff815bd6f0 T uvm_map_reference -ffffffff815bd720 T uvm_map_lock_entry -ffffffff815bd7a0 T uvm_map_unlock_entry -ffffffff815bd800 T uvmspace_dused -ffffffff815bd970 T vm_map_assert_anylock_ln -ffffffff815bda20 T uvm_map_entrybyaddr -ffffffff815bdad0 T uvm_map_isavail -ffffffff815bdf40 T uvm_map_findspace -ffffffff815be0e0 T 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nv_init_doorbell_index -ffffffff820cb1d0 t nv_need_reset_on_init -ffffffff820cb280 t nv_pre_asic_init -ffffffff820cb2b0 t nv_update_umd_stable_pstate -ffffffff820cb380 t nv_query_video_codecs -ffffffff820cc000 T psp_v10_0_set_psp_funcs -ffffffff820cc030 t psp_v10_0_init_microcode -ffffffff820cc120 t psp_v10_0_ring_create -ffffffff820cc510 t psp_v10_0_ring_stop -ffffffff820cc7c0 t psp_v10_0_ring_destroy -ffffffff820cc850 t psp_v10_0_mode1_reset -ffffffff820cc8a0 t psp_v10_0_ring_get_wptr -ffffffff820cc900 t psp_v10_0_ring_set_wptr -ffffffff820cd000 T psp_v11_0_set_psp_funcs -ffffffff820cd030 t psp_v11_0_init_microcode -ffffffff820cd1e0 t psp_v11_0_bootloader_load_kdb -ffffffff820cd200 t psp_v11_0_bootloader_load_spl -ffffffff820cd220 t psp_v11_0_bootloader_load_sysdrv -ffffffff820cd240 t psp_v11_0_bootloader_load_sos -ffffffff820cd690 t psp_v11_0_ring_create -ffffffff820cdf10 t psp_v11_0_ring_stop -ffffffff820ce1f0 t psp_v11_0_ring_destroy -ffffffff820ce280 t psp_v11_0_mode1_reset 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psp_v12_0_mode1_reset -ffffffff820d2b10 t psp_v12_0_ring_get_wptr -ffffffff820d2b80 t psp_v12_0_ring_set_wptr -ffffffff820d3000 T psp_v13_0_set_psp_funcs -ffffffff820d3030 t psp_v13_0_init_microcode -ffffffff820d3160 t psp_v13_0_wait_for_bootloader_steady_state -ffffffff820d3290 t psp_v13_0_bootloader_load_kdb -ffffffff820d32b0 t psp_v13_0_bootloader_load_spl -ffffffff820d32d0 t psp_v13_0_bootloader_load_sysdrv -ffffffff820d32f0 t psp_v13_0_bootloader_load_soc_drv -ffffffff820d3310 t psp_v13_0_bootloader_load_intf_drv -ffffffff820d3330 t psp_v13_0_bootloader_load_dbg_drv -ffffffff820d3350 t psp_v13_0_bootloader_load_ras_drv -ffffffff820d3370 t psp_v13_0_bootloader_load_sos -ffffffff820d3830 t psp_v13_0_ring_create -ffffffff820d40b0 t psp_v13_0_ring_stop -ffffffff820d45b0 t psp_v13_0_ring_destroy -ffffffff820d4640 t psp_v13_0_memory_training -ffffffff820d4b20 t psp_v13_0_ring_get_wptr -ffffffff820d4b90 t psp_v13_0_ring_set_wptr -ffffffff820d4ca0 t psp_v13_0_load_usbc_pd_fw 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sdma_v2_4_set_trap_irq_state -ffffffff820dcc60 t sdma_v2_4_process_trap_irq -ffffffff820dcd00 t sdma_v2_4_process_illegal_inst_irq -ffffffff820dcd80 t sdma_v2_4_enable -ffffffff820dd000 t sdma_v3_0_early_init -ffffffff820dd100 t sdma_v3_0_sw_init -ffffffff820dd530 t sdma_v3_0_sw_fini -ffffffff820dd600 t sdma_v3_0_hw_init -ffffffff820dd770 t sdma_v3_0_hw_fini -ffffffff820dd7d0 t sdma_v3_0_suspend -ffffffff820dd830 t sdma_v3_0_resume -ffffffff820dd840 t sdma_v3_0_is_idle -ffffffff820dd890 t sdma_v3_0_wait_for_idle -ffffffff820dd940 t sdma_v3_0_check_soft_reset -ffffffff820dd9a0 t sdma_v3_0_pre_soft_reset -ffffffff820dda00 t sdma_v3_0_soft_reset -ffffffff820ddb00 t sdma_v3_0_post_soft_reset -ffffffff820ddb50 t sdma_v3_0_set_clockgating_state -ffffffff820dde00 t sdma_v3_0_set_powergating_state -ffffffff820dde30 t sdma_v3_0_get_clockgating_state -ffffffff820dded0 t sdma_v3_0_ring_get_rptr -ffffffff820ddf10 t sdma_v3_0_ring_get_wptr -ffffffff820ddf90 t sdma_v3_0_ring_set_wptr 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sdma_v4_0_early_init -ffffffff820e12f0 t sdma_v4_0_late_init -ffffffff820e15b0 t sdma_v4_0_sw_init -ffffffff820e1a60 t sdma_v4_0_sw_fini -ffffffff820e1b30 t sdma_v4_0_hw_init -ffffffff820e4cf0 t sdma_v4_0_hw_fini -ffffffff820e4df0 t sdma_v4_0_suspend -ffffffff820e4e50 t sdma_v4_0_resume -ffffffff820e4ee0 t sdma_v4_0_is_idle -ffffffff820e5010 t sdma_v4_0_wait_for_idle -ffffffff820e51c0 t sdma_v4_0_soft_reset -ffffffff820e51f0 t sdma_v4_0_set_clockgating_state -ffffffff820e5720 t sdma_v4_0_set_powergating_state -ffffffff820e5800 t sdma_v4_0_get_clockgating_state -ffffffff820e58b0 t sdma_v4_0_query_ras_error_count -ffffffff820e5aa0 t sdma_v4_0_reset_ras_error_count -ffffffff820e5c20 t sdma_v4_0_ring_get_rptr -ffffffff820e5c80 t sdma_v4_0_ring_get_wptr -ffffffff820e5e90 t sdma_v4_0_ring_set_wptr -ffffffff820e6140 t sdma_v4_0_ring_emit_ib -ffffffff820e6420 t sdma_v4_0_ring_emit_fence -ffffffff820e6890 t sdma_v4_0_ring_emit_pipeline_sync -ffffffff820e68f0 t sdma_v4_0_ring_emit_vm_flush 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sdma_v4_0_process_doorbell_invalid_irq -ffffffff820e85c0 t sdma_v4_0_process_pool_timeout_irq -ffffffff820e8610 t sdma_v4_0_process_srbm_write_irq -ffffffff820e8660 t sdma_v4_0_process_ras_data_cb -ffffffff820e86e0 t sdma_v4_0_ctx_switch_enable -ffffffff820e8e00 t sdma_v4_0_enable -ffffffff820e93f0 t sdma_v4_0_gfx_enable -ffffffff820ea000 t sdma_v4_4_query_ras_error_count -ffffffff820ea2b0 t sdma_v4_4_reset_ras_error_count -ffffffff820eb000 t sdma_v4_4_2_early_init -ffffffff820eb2b0 t sdma_v4_4_2_late_init -ffffffff820eb340 t sdma_v4_4_2_sw_init -ffffffff820eb920 t sdma_v4_4_2_sw_fini -ffffffff820eb9f0 t sdma_v4_4_2_hw_init -ffffffff820eba40 t sdma_v4_4_2_hw_fini -ffffffff820ebb20 t sdma_v4_4_2_suspend -ffffffff820ebc30 t sdma_v4_4_2_resume -ffffffff820ebc80 t sdma_v4_4_2_is_idle -ffffffff820ebd30 t sdma_v4_4_2_wait_for_idle -ffffffff820ebe60 t sdma_v4_4_2_soft_reset -ffffffff820ebe90 t sdma_v4_4_2_set_clockgating_state -ffffffff820ec350 t sdma_v4_4_2_set_powergating_state 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sdma_v4_4_2_emit_copy_buffer -ffffffff820ee1f0 t sdma_v4_4_2_emit_fill_buffer -ffffffff820ee280 t sdma_v4_4_2_vm_copy_pte -ffffffff820ee340 t sdma_v4_4_2_vm_write_pte -ffffffff820ee410 t sdma_v4_4_2_vm_set_pte_pde -ffffffff820ee510 t sdma_v4_4_2_set_trap_irq_state -ffffffff820ee610 t sdma_v4_4_2_process_trap_irq -ffffffff820ee740 t sdma_v4_4_2_process_illegal_inst_irq -ffffffff820ee7e0 t sdma_v4_4_2_set_ecc_irq_state -ffffffff820ee8f0 t sdma_v4_4_2_process_vm_hole_irq -ffffffff820ee9e0 t sdma_v4_4_2_process_doorbell_invalid_irq -ffffffff820eead0 t sdma_v4_4_2_process_pool_timeout_irq -ffffffff820eebc0 t sdma_v4_4_2_process_srbm_write_irq -ffffffff820eecb0 t sdma_v4_4_2_query_ras_error_count -ffffffff820eee30 t sdma_v4_4_2_reset_ras_error_count -ffffffff820eefa0 t sdma_v4_4_2_inst_init_golden_registers -ffffffff820ef170 t sdma_v4_4_2_inst_start -ffffffff820f09a0 t sdma_v4_4_2_inst_ctx_switch_enable -ffffffff820f0cf0 t sdma_v4_4_2_inst_enable -ffffffff820f2000 t sdma_v5_0_early_init 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get_smu_clock_info_v3_1 -ffffffff821d53d0 t enable_lvtma_control -ffffffff821d6000 T dal_bios_parser_init_cmd_tbl_helper -ffffffff821d60c0 T dal_cmd_table_helper_controller_id_to_atom -ffffffff821d61e0 T dal_cmd_table_helper_transmitter_bp_to_atom -ffffffff821d6270 T dal_cmd_table_helper_encoder_mode_bp_to_atom -ffffffff821d6300 T dal_cmd_table_helper_assign_control_parameter -ffffffff821d63e0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src -ffffffff821d64c0 T dal_cmd_table_helper_encoder_id_to_atom -ffffffff821d7000 T dal_bios_parser_init_cmd_tbl_helper2 -ffffffff821d70d0 T dal_cmd_table_helper_controller_id_to_atom2 -ffffffff821d71e0 T dal_cmd_table_helper_transmitter_bp_to_atom2 -ffffffff821d7270 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 -ffffffff821d7300 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 -ffffffff821d73e0 T dal_cmd_table_helper_encoder_id_to_atom2 -ffffffff821d8000 T dal_cmd_tbl_helper_dce110_get_table -ffffffff821d8030 t encoder_action_to_atom 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Xrecurse_legacy14 +ffffffff81690250 T Xresume_legacy14 +ffffffff81690280 T Xintr_legacy14_untramp +ffffffff816904c0 T Xrecurse_legacy15 +ffffffff81690540 T Xresume_legacy15 +ffffffff81690570 T Xintr_legacy15_untramp +ffffffff816907b0 T Xrecurse_ioapic_edge0 +ffffffff81690830 T Xresume_ioapic_edge0 +ffffffff81690860 T Xintr_ioapic_edge0_untramp +ffffffff81690a90 T Xrecurse_ioapic_edge1 +ffffffff81690b10 T Xresume_ioapic_edge1 +ffffffff81690b40 T Xintr_ioapic_edge1_untramp +ffffffff81690d70 T Xrecurse_ioapic_edge2 +ffffffff81690df0 T Xresume_ioapic_edge2 +ffffffff81690e20 T Xintr_ioapic_edge2_untramp +ffffffff81691050 T Xrecurse_ioapic_edge3 +ffffffff816910d0 T Xresume_ioapic_edge3 +ffffffff81691100 T Xintr_ioapic_edge3_untramp +ffffffff81691330 T Xrecurse_ioapic_edge4 +ffffffff816913b0 T Xresume_ioapic_edge4 +ffffffff816913e0 T Xintr_ioapic_edge4_untramp +ffffffff81691610 T Xrecurse_ioapic_edge5 +ffffffff81691690 T Xresume_ioapic_edge5 +ffffffff816916c0 T Xintr_ioapic_edge5_untramp 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Xresume_ioapic_level9 +ffffffff8169e220 T Xintr_ioapic_level9_untramp +ffffffff8169e530 T Xrecurse_ioapic_level10 +ffffffff8169e5b0 T Xresume_ioapic_level10 +ffffffff8169e5e0 T Xintr_ioapic_level10_untramp +ffffffff8169e8f0 T Xrecurse_ioapic_level11 +ffffffff8169e970 T Xresume_ioapic_level11 +ffffffff8169e9a0 T Xintr_ioapic_level11_untramp +ffffffff8169ecb0 T Xrecurse_ioapic_level12 +ffffffff8169ed30 T Xresume_ioapic_level12 +ffffffff8169ed60 T Xintr_ioapic_level12_untramp +ffffffff8169f070 T Xrecurse_ioapic_level13 +ffffffff8169f0f0 T Xresume_ioapic_level13 +ffffffff8169f120 T Xintr_ioapic_level13_untramp +ffffffff8169f430 T Xrecurse_ioapic_level14 +ffffffff8169f4b0 T Xresume_ioapic_level14 +ffffffff8169f4e0 T Xintr_ioapic_level14_untramp +ffffffff8169f7f0 T Xrecurse_ioapic_level15 +ffffffff8169f870 T Xresume_ioapic_level15 +ffffffff8169f8a0 T Xintr_ioapic_level15_untramp +ffffffff8169fbb0 T Xrecurse_ioapic_level16 +ffffffff8169fc30 T Xresume_ioapic_level16 +ffffffff8169fc60 T Xintr_ioapic_level16_untramp +ffffffff8169ff70 T Xrecurse_ioapic_level17 +ffffffff8169fff0 T Xresume_ioapic_level17 +ffffffff816a0020 T Xintr_ioapic_level17_untramp +ffffffff816a0330 T Xrecurse_ioapic_level18 +ffffffff816a03b0 T Xresume_ioapic_level18 +ffffffff816a03e0 T Xintr_ioapic_level18_untramp +ffffffff816a06f0 T Xrecurse_ioapic_level19 +ffffffff816a0770 T Xresume_ioapic_level19 +ffffffff816a07a0 T Xintr_ioapic_level19_untramp +ffffffff816a0ab0 T Xrecurse_ioapic_level20 +ffffffff816a0b30 T Xresume_ioapic_level20 +ffffffff816a0b60 T Xintr_ioapic_level20_untramp +ffffffff816a0e70 T Xrecurse_ioapic_level21 +ffffffff816a0ef0 T Xresume_ioapic_level21 +ffffffff816a0f20 T Xintr_ioapic_level21_untramp +ffffffff816a1230 T Xrecurse_ioapic_level22 +ffffffff816a12b0 T Xresume_ioapic_level22 +ffffffff816a12e0 T Xintr_ioapic_level22_untramp +ffffffff816a15f0 T Xrecurse_ioapic_level23 +ffffffff816a1670 T Xresume_ioapic_level23 +ffffffff816a16a0 T Xintr_ioapic_level23_untramp +ffffffff816a19b0 T Xrecurse_ioapic_level24 +ffffffff816a1a30 T Xresume_ioapic_level24 +ffffffff816a1a60 T Xintr_ioapic_level24_untramp +ffffffff816a1d70 T Xrecurse_ioapic_level25 +ffffffff816a1df0 T Xresume_ioapic_level25 +ffffffff816a1e20 T Xintr_ioapic_level25_untramp +ffffffff816a2130 T Xrecurse_ioapic_level26 +ffffffff816a21b0 T Xresume_ioapic_level26 +ffffffff816a21e0 T Xintr_ioapic_level26_untramp +ffffffff816a24f0 T Xrecurse_ioapic_level27 +ffffffff816a2570 T Xresume_ioapic_level27 +ffffffff816a25a0 T Xintr_ioapic_level27_untramp +ffffffff816a28b0 T Xrecurse_ioapic_level28 +ffffffff816a2930 T Xresume_ioapic_level28 +ffffffff816a2960 T Xintr_ioapic_level28_untramp +ffffffff816a2c70 T Xrecurse_ioapic_level29 +ffffffff816a2cf0 T Xresume_ioapic_level29 +ffffffff816a2d20 T Xintr_ioapic_level29_untramp +ffffffff816a3030 T Xrecurse_ioapic_level30 +ffffffff816a30b0 T Xresume_ioapic_level30 +ffffffff816a30e0 T Xintr_ioapic_level30_untramp +ffffffff816a33f0 T Xrecurse_ioapic_level31 +ffffffff816a3470 T Xresume_ioapic_level31 +ffffffff816a34a0 T Xintr_ioapic_level31_untramp +ffffffff816a37c0 T Xrecurse_ioapic_level32 +ffffffff816a3840 T Xresume_ioapic_level32 +ffffffff816a3870 T Xintr_ioapic_level32_untramp +ffffffff816a3b90 T Xrecurse_ioapic_level33 +ffffffff816a3c10 T Xresume_ioapic_level33 +ffffffff816a3c40 T Xintr_ioapic_level33_untramp +ffffffff816a3f60 T Xrecurse_ioapic_level34 +ffffffff816a3fe0 T Xresume_ioapic_level34 +ffffffff816a4010 T Xintr_ioapic_level34_untramp +ffffffff816a4330 T Xrecurse_ioapic_level35 +ffffffff816a43b0 T Xresume_ioapic_level35 +ffffffff816a43e0 T Xintr_ioapic_level35_untramp +ffffffff816a4700 T Xrecurse_ioapic_level36 +ffffffff816a4780 T Xresume_ioapic_level36 +ffffffff816a47b0 T Xintr_ioapic_level36_untramp +ffffffff816a4ad0 T Xrecurse_ioapic_level37 +ffffffff816a4b50 T Xresume_ioapic_level37 +ffffffff816a4b80 T Xintr_ioapic_level37_untramp +ffffffff816a4ea0 T Xrecurse_ioapic_level38 +ffffffff816a4f20 T Xresume_ioapic_level38 +ffffffff816a4f50 T Xintr_ioapic_level38_untramp +ffffffff816a5270 T Xrecurse_ioapic_level39 +ffffffff816a52f0 T Xresume_ioapic_level39 +ffffffff816a5320 T Xintr_ioapic_level39_untramp +ffffffff816a5640 T Xrecurse_ioapic_level40 +ffffffff816a56c0 T Xresume_ioapic_level40 +ffffffff816a56f0 T Xintr_ioapic_level40_untramp +ffffffff816a5a10 T Xrecurse_ioapic_level41 +ffffffff816a5a90 T Xresume_ioapic_level41 +ffffffff816a5ac0 T Xintr_ioapic_level41_untramp +ffffffff816a5de0 T Xrecurse_ioapic_level42 +ffffffff816a5e60 T Xresume_ioapic_level42 +ffffffff816a5e90 T Xintr_ioapic_level42_untramp +ffffffff816a61b0 T Xrecurse_ioapic_level43 +ffffffff816a6230 T Xresume_ioapic_level43 +ffffffff816a6260 T Xintr_ioapic_level43_untramp +ffffffff816a6580 T Xrecurse_ioapic_level44 +ffffffff816a6600 T Xresume_ioapic_level44 +ffffffff816a6630 T Xintr_ioapic_level44_untramp +ffffffff816a6950 T Xrecurse_ioapic_level45 +ffffffff816a69d0 T Xresume_ioapic_level45 +ffffffff816a6a00 T Xintr_ioapic_level45_untramp +ffffffff816a6d20 T Xrecurse_ioapic_level46 +ffffffff816a6da0 T Xresume_ioapic_level46 +ffffffff816a6dd0 T Xintr_ioapic_level46_untramp +ffffffff816a70f0 T Xrecurse_ioapic_level47 +ffffffff816a7170 T Xresume_ioapic_level47 +ffffffff816a71a0 T Xintr_ioapic_level47_untramp +ffffffff816a74c0 T Xrecurse_ioapic_level48 +ffffffff816a7540 T Xresume_ioapic_level48 +ffffffff816a7570 T Xintr_ioapic_level48_untramp +ffffffff816a7890 T Xrecurse_ioapic_level49 +ffffffff816a7910 T Xresume_ioapic_level49 +ffffffff816a7940 T Xintr_ioapic_level49_untramp +ffffffff816a7c60 T Xrecurse_ioapic_level50 +ffffffff816a7ce0 T Xresume_ioapic_level50 +ffffffff816a7d10 T Xintr_ioapic_level50_untramp +ffffffff816a8030 T Xrecurse_ioapic_level51 +ffffffff816a80b0 T Xresume_ioapic_level51 +ffffffff816a80e0 T Xintr_ioapic_level51_untramp +ffffffff816a8400 T Xrecurse_ioapic_level52 +ffffffff816a8480 T Xresume_ioapic_level52 +ffffffff816a84b0 T Xintr_ioapic_level52_untramp +ffffffff816a87d0 T Xrecurse_ioapic_level53 +ffffffff816a8850 T Xresume_ioapic_level53 +ffffffff816a8880 T Xintr_ioapic_level53_untramp +ffffffff816a8ba0 T Xrecurse_ioapic_level54 +ffffffff816a8c20 T Xresume_ioapic_level54 +ffffffff816a8c50 T Xintr_ioapic_level54_untramp +ffffffff816a8f70 T Xrecurse_ioapic_level55 +ffffffff816a8ff0 T Xresume_ioapic_level55 +ffffffff816a9020 T Xintr_ioapic_level55_untramp +ffffffff816a9340 T Xrecurse_ioapic_level56 +ffffffff816a93c0 T Xresume_ioapic_level56 +ffffffff816a93f0 T Xintr_ioapic_level56_untramp +ffffffff816a9710 T Xrecurse_ioapic_level57 +ffffffff816a9790 T Xresume_ioapic_level57 +ffffffff816a97c0 T Xintr_ioapic_level57_untramp +ffffffff816a9ae0 T Xrecurse_ioapic_level58 +ffffffff816a9b60 T Xresume_ioapic_level58 +ffffffff816a9b90 T Xintr_ioapic_level58_untramp +ffffffff816a9eb0 T Xrecurse_ioapic_level59 +ffffffff816a9f30 T Xresume_ioapic_level59 +ffffffff816a9f60 T Xintr_ioapic_level59_untramp +ffffffff816aa280 T Xrecurse_ioapic_level60 +ffffffff816aa300 T Xresume_ioapic_level60 +ffffffff816aa330 T Xintr_ioapic_level60_untramp +ffffffff816aa650 T Xrecurse_ioapic_level61 +ffffffff816aa6d0 T Xresume_ioapic_level61 +ffffffff816aa700 T Xintr_ioapic_level61_untramp +ffffffff816aaa20 T Xrecurse_ioapic_level62 +ffffffff816aaaa0 T Xresume_ioapic_level62 +ffffffff816aaad0 T Xintr_ioapic_level62_untramp +ffffffff816aadf0 T Xrecurse_ioapic_level63 +ffffffff816aae70 T Xresume_ioapic_level63 +ffffffff816aaea0 T Xintr_ioapic_level63_untramp +ffffffff816ab1c0 T retpoline_r13 +ffffffff816ab1e0 T Xsofttty +ffffffff816ab220 T Xsoftnet +ffffffff816ab260 T Xsoftclock +ffffffff816ac000 T kcopy +ffffffff816ac0d0 T copyout +ffffffff816ac160 T _copyin +ffffffff816ac200 T copy_fault +ffffffff816ac230 T copyoutstr +ffffffff816ac2c0 T _copyinstr +ffffffff816ac340 T copystr_fault +ffffffff816ac349 t copystr_return +ffffffff816ad000 T Xspllower +ffffffff816ad080 T Xdoreti +ffffffff816ae000 T mds_handler_ivb +ffffffff816ae070 T mds_handler_bdw +ffffffff816ae0e0 T mds_handler_skl +ffffffff816ae100 T mds_handler_skl_sse +ffffffff816ae180 T mds_handler_skl_avx +ffffffff816ae200 T mds_handler_skl_avx512 +ffffffff816ae280 T mds_handler_silvermont +ffffffff816ae2e0 T mds_handler_knights +ffffffff816af000 T intr_default_setup +ffffffff816af090 T x86_nmi +ffffffff816af0f0 T intr_calculatemasks +ffffffff816af490 T intr_allocate_slot_cpu +ffffffff816af640 T intr_allocate_slot +ffffffff816af960 T intr_establish +ffffffff816afe50 T intr_disestablish +ffffffff816affd0 T intr_handler +ffffffff816b00b0 T cpu_intr_init +ffffffff816b0340 T intr_printconfig +ffffffff816b0370 T intr_barrier +ffffffff816b0390 T intr_enable_wakeup +ffffffff816b0430 T intr_disable_wakeup +ffffffff816b0510 T splraise +ffffffff816b0580 T spllower +ffffffff816b05f0 T softintr +ffffffff816b1000 T x86_bus_space_io_read_1 +ffffffff816b1030 T x86_bus_space_io_read_2 +ffffffff816b1060 T x86_bus_space_io_read_4 +ffffffff816b1090 T x86_bus_space_io_read_8 +ffffffff816b10b0 T x86_bus_space_io_read_multi_1 +ffffffff816b10f0 T x86_bus_space_io_read_multi_2 +ffffffff816b1130 T x86_bus_space_io_read_multi_4 +ffffffff816b1170 T x86_bus_space_io_read_multi_8 +ffffffff816b1190 T x86_bus_space_io_read_region_1 +ffffffff816b11d0 T x86_bus_space_io_read_region_2 +ffffffff816b1210 T x86_bus_space_io_read_region_4 +ffffffff816b1250 T x86_bus_space_io_read_region_8 +ffffffff816b1270 T x86_bus_space_io_write_1 +ffffffff816b12a0 T x86_bus_space_io_write_2 +ffffffff816b12d0 T x86_bus_space_io_write_4 +ffffffff816b1300 T x86_bus_space_io_write_8 +ffffffff816b1320 T x86_bus_space_io_write_multi_1 +ffffffff816b1360 T x86_bus_space_io_write_multi_2 +ffffffff816b13a0 T x86_bus_space_io_write_multi_4 +ffffffff816b13e0 T x86_bus_space_io_write_multi_8 +ffffffff816b1400 T x86_bus_space_io_write_region_1 +ffffffff816b1440 T x86_bus_space_io_write_region_2 +ffffffff816b1480 T x86_bus_space_io_write_region_4 +ffffffff816b14c0 T x86_bus_space_io_write_region_8 +ffffffff816b14e0 T x86_bus_space_io_set_multi_1 +ffffffff816b1530 T x86_bus_space_io_set_multi_2 +ffffffff816b1580 T x86_bus_space_io_set_multi_4 +ffffffff816b15d0 T x86_bus_space_io_set_multi_8 +ffffffff816b15f0 T x86_bus_space_io_set_region_1 +ffffffff816b1640 T x86_bus_space_io_set_region_2 +ffffffff816b16a0 T x86_bus_space_io_set_region_4 +ffffffff816b16f0 T x86_bus_space_io_set_region_8 +ffffffff816b1710 T x86_bus_space_io_copy_1 +ffffffff816b17a0 T x86_bus_space_io_copy_2 +ffffffff816b1830 T x86_bus_space_io_copy_4 +ffffffff816b18c0 T x86_bus_space_io_copy_8 +ffffffff816b18e0 T x86_bus_space_io_vaddr +ffffffff816b1910 T x86_bus_space_io_mmap +ffffffff816b1940 T x86_bus_space_mem_read_1 +ffffffff816b1970 T x86_bus_space_mem_read_2 +ffffffff816b19a0 T x86_bus_space_mem_read_4 +ffffffff816b19d0 T x86_bus_space_mem_read_8 +ffffffff816b1a00 T x86_bus_space_mem_read_multi_1 +ffffffff816b1a40 T x86_bus_space_mem_read_multi_2 +ffffffff816b1a80 T x86_bus_space_mem_read_multi_4 +ffffffff816b1ac0 T x86_bus_space_mem_read_multi_8 +ffffffff816b1b00 T x86_bus_space_mem_read_region_1 +ffffffff816b1b30 T x86_bus_space_mem_read_region_2 +ffffffff816b1b70 T x86_bus_space_mem_read_region_4 +ffffffff816b1ba0 T x86_bus_space_mem_read_region_8 +ffffffff816b1be0 T x86_bus_space_mem_write_1 +ffffffff816b1c10 T x86_bus_space_mem_write_2 +ffffffff816b1c40 T x86_bus_space_mem_write_4 +ffffffff816b1c70 T x86_bus_space_mem_write_8 +ffffffff816b1ca0 T x86_bus_space_mem_write_multi_1 +ffffffff816b1ce0 T x86_bus_space_mem_write_multi_2 +ffffffff816b1d20 T x86_bus_space_mem_write_multi_4 +ffffffff816b1d60 T x86_bus_space_mem_write_multi_8 +ffffffff816b1da0 T x86_bus_space_mem_write_region_1 +ffffffff816b1dd0 T x86_bus_space_mem_write_region_2 +ffffffff816b1e10 T x86_bus_space_mem_write_region_4 +ffffffff816b1e40 T x86_bus_space_mem_write_region_8 +ffffffff816b1e80 T x86_bus_space_mem_set_multi_1 +ffffffff816b1f00 T x86_bus_space_mem_set_multi_2 +ffffffff816b1f90 T x86_bus_space_mem_set_multi_4 +ffffffff816b2010 T x86_bus_space_mem_set_multi_8 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_bus_dmamap_load_buffer +ffffffff816b4790 T _bus_dmamap_load_mbuf +ffffffff816b48c0 T _bus_dmamap_load_uio +ffffffff816b4a70 T _bus_dmamap_load_raw +ffffffff816b4d70 T _bus_dmamap_unload +ffffffff816b4db0 T _bus_dmamap_sync +ffffffff816b4ec0 T _bus_dmamem_alloc +ffffffff816b4f50 T _bus_dmamem_alloc_range +ffffffff816b50f0 T _bus_dmamem_free +ffffffff816b5200 T _bus_dmamem_map +ffffffff816b5400 T _bus_dmamem_unmap +ffffffff816b54b0 T _bus_dmamem_mmap +ffffffff816b6000 T cpu_spinup_finish +ffffffff816b7000 T x86_64_ipi_halt +ffffffff816b70e0 T x86_64_ipi_nop +ffffffff816b7110 T x86_64_ipi_vmclear_vmm +ffffffff816b7120 T x86_64_ipi_reload_mtrr +ffffffff816b7170 T x86_64_ipi_start_vmm +ffffffff816b7180 T x86_64_ipi_stop_vmm +ffffffff816b7190 T x86_64_ipi_wbinvd +ffffffff816b8000 T x86_send_ipi +ffffffff816b8060 T x86_fast_ipi +ffffffff816b80d0 T x86_broadcast_ipi +ffffffff816b8160 T x86_ipi_handler +ffffffff816b9000 T mp_setperf +ffffffff816b9070 T x86_setperf_ipi +ffffffff816b9090 T mp_setperf_init +ffffffff816ba000 T apic_format_redir +ffffffff816bb000 T consinit +ffffffff816bc000 T cninit +ffffffff816bd000 T dkcsumattach +ffffffff816be000 T db_read_address +ffffffff816be1e0 T db_print_address +ffffffff816be300 T db_disasm_3dnow +ffffffff816be3c0 T db_disasm_esc +ffffffff816be600 T db_disasm +ffffffff816c0000 T db_printtrap +ffffffff816c0090 T db_ktrap +ffffffff816c0300 T db_enter_ddb +ffffffff816c0630 T db_sysregs_cmd +ffffffff816c07b0 T db_cpuinfo_cmd +ffffffff816c0900 T db_startproc_cmd +ffffffff816c0a70 T db_startcpu +ffffffff816c0b00 T db_stopproc_cmd +ffffffff816c0ce0 T db_stopcpu +ffffffff816c0d80 T db_ddbproc_cmd +ffffffff816c0eb0 T x86_ipi_db +ffffffff816c0ee0 T db_enter +ffffffff816c0f10 T db_machine_init +ffffffff816c1000 T db_read_bytes +ffffffff816c1100 T db_write_bytes +ffffffff816c2000 T db_stack_trace_print +ffffffff816c2670 T stacktrace_save_at +ffffffff816c2750 T stacktrace_save_utrace +ffffffff816c28a0 T db_get_pc +ffffffff816c28c0 T db_get_probe_addr +ffffffff816c3000 T in_cksum +ffffffff816c4000 T in4_cksum +ffffffff816c5000 T mc146818_read +ffffffff816c5060 T mc146818_write +ffffffff816c50b0 T startclocks +ffffffff816c5110 T i8254_startclock +ffffffff816c5150 T clockintr +ffffffff816c51d0 T i8254_get_timecount +ffffffff816c5250 T rtcintr +ffffffff816c5300 T gettick +ffffffff816c5380 T i8254_delay +ffffffff816c54d0 T rtcdrain +ffffffff816c5540 T i8254_initclocks +ffffffff816c55a0 T i8254_inittimecounter +ffffffff816c55c0 T i8254_start_both_clocks +ffffffff816c5700 T rtcstart +ffffffff816c57c0 T rtcstop +ffffffff816c5800 T rtcget +ffffffff816c5a50 T rtcput +ffffffff816c5db0 T bcdtobin +ffffffff816c5df0 T bintobcd +ffffffff816c5e50 T rtcgettime +ffffffff816c6200 T rtcsettime +ffffffff816c6460 T rtcinit +ffffffff816c64a0 T setstatclockrate +ffffffff816c6550 T i8254_inittimecounter_simple +ffffffff816c65d0 T i8254_simple_get_timecount +ffffffff816c7000 T k8pnow_read_pending_wait +ffffffff816c7080 T k8_powernow_setperf +ffffffff816c70d0 T k8pnow_transition +ffffffff816c7560 T k8pnow_decode_pst +ffffffff816c7630 T k8pnow_acpi_states +ffffffff816c7740 T k8pnow_acpi_pss_changed +ffffffff816c7960 T k8pnow_acpi_init +ffffffff816c7b20 T k8pnow_states +ffffffff816c7d20 T k8_powernow_init +ffffffff816c8000 T p4_get_bus_clock +ffffffff816c80e0 T p3_get_bus_clock +ffffffff816c8240 T est_acpi_init +ffffffff816c83c0 T est_acpi_pss_changed +ffffffff816c86a0 T est_setperf +ffffffff816c8760 T est_init +ffffffff816c9000 T k1x_setperf +ffffffff816c90d0 T k1x_transition +ffffffff816c9180 T k1x_acpi_states +ffffffff816c9230 T k1x_acpi_init +ffffffff816c9310 T k1x_init +ffffffff816ca000 T rasops_init +ffffffff816ca460 T rasops_rotate_font +ffffffff816ca520 T rasops_reconfig +ffffffff816ca9a0 T rasops_alloc_screen +ffffffff816cac00 T rasops_vcons_cursor +ffffffff816cace0 T rasops_vcons_mapchar +ffffffff816cad90 T rasops_vcons_putchar +ffffffff816cae70 T rasops_vcons_copycols +ffffffff816cafa0 T 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atascsi_disk_cmd_done +ffffffff81722440 T atascsi_disk_vpd_supported +ffffffff81722520 T atascsi_disk_vpd_serial +ffffffff81722680 T atascsi_disk_vpd_ident +ffffffff817229b0 T atascsi_disk_vpd_ata +ffffffff81722c10 T atascsi_disk_vpd_limits +ffffffff81722d40 T atascsi_disk_vpd_info +ffffffff81722e40 T atascsi_disk_vpd_thin +ffffffff81722f10 T atascsi_disk_inquiry +ffffffff817230e0 T ata_swapcopy +ffffffff81723140 T ata_identify_block_l2p_exp +ffffffff81723190 T atascsi_disk_write_same_16_done +ffffffff817231e0 T atascsi_disk_unmap_task +ffffffff817233f0 T atascsi_disk_unmap_done +ffffffff81723460 T atascsi_disk_sync_done +ffffffff81723500 T ata_identify_blocks +ffffffff81723580 T ata_identify_blocksize +ffffffff817235e0 T ata_identify_block_logical_align +ffffffff81723640 T atascsi_passthru_map +ffffffff81723710 T atascsi_passthru_done +ffffffff817237a0 T atascsi_disk_start_stop_done +ffffffff817238d0 T atascsi_atapi_cmd_done +ffffffff817239b0 T atascsi_pmp_sense +ffffffff81723a00 T atascsi_pmp_inq +ffffffff81723b70 T ata_complete +ffffffff81724000 T mainbus_match +ffffffff81724030 T mainbus_attach +ffffffff817243f0 T mainbus_print +ffffffff81724480 T mainbus_efifb_reattach +ffffffff81725000 T codepatch_disable +ffffffff81726000 T bios_match +ffffffff81726060 T bios_attach +ffffffff81726be0 T smbios_find +ffffffff81726ce0 T smbios_find_table +ffffffff81726ea0 T smbios_get_string +ffffffff81726f60 T fixstring +ffffffff81727150 T smbios_info +ffffffff81727f50 T bios_print +ffffffff81728000 T mpbios_match +ffffffff81728060 T mpbios_attach +ffffffff81728080 T mpbios_scan +ffffffff81728580 T mp_print +ffffffff817285e0 T mp_match +ffffffff81728660 T mpbios_map +ffffffff81728770 T mpbios_unmap +ffffffff817287c0 T mpbios_probe +ffffffff81728dc0 T mpbios_search +ffffffff817290b0 T mpbios_cpu +ffffffff81729150 T mpbios_bus +ffffffff81729330 T mpbios_ioapic +ffffffff817293d0 T mpbios_int +ffffffff81729720 T mp_cfg_special_intr +ffffffff81729790 T mp_cfg_pci_intr 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lapic_timer_trigger +ffffffff8172ec10 T lapic_timer_oneshot +ffffffff8172ec80 T lapic_timer_periodic +ffffffff8172ecf0 T lapic_clockintr +ffffffff8172ed80 T lapic_startclock +ffffffff8172edb0 T lapic_initclocks +ffffffff8172ee10 T lapic_calibrate_timer +ffffffff8172f0b0 T i82489_ipi_init +ffffffff8172f190 T x2apic_ipi_init +ffffffff8172f210 T x86_ipi_init +ffffffff81730000 T ioapic_find +ffffffff81730080 T ioapic_find_bybase +ffffffff817300e0 T ioapic_print_redir +ffffffff817301c0 T ioapic_match +ffffffff81730220 T ioapic_attach +ffffffff817305e0 T ioapic_activate +ffffffff817306d0 T ioapic_set_id +ffffffff817307f0 T ioapic_hwmask +ffffffff817308b0 T ioapic_hwunmask +ffffffff81730960 T ioapic_addroute +ffffffff817309d0 T ioapic_delroute +ffffffff81730ab0 T apic_set_redir +ffffffff81730d40 T ioapic_enable +ffffffff81730e70 T ioapic_dump +ffffffff81731000 T efifb_match +ffffffff81731090 T efifb_attach +ffffffff817313e0 T efifb_ioctl +ffffffff81731510 T efifb_mmap +ffffffff81731570 T efifb_alloc_screen +ffffffff817315a0 T efifb_efiinfo_init +ffffffff817316b0 T efifb_rasops_init +ffffffff817318c0 T efifb_cnattach +ffffffff81731ac0 T efifb_cnattach_common +ffffffff81731bc0 T efifb_early_map +ffffffff81731bd0 T efifb_cnremap +ffffffff81731c80 T efifb_early_cleanup +ffffffff81731c90 T efifb_is_console +ffffffff81731d80 T efifb_is_primary +ffffffff81731eb0 T efifb_detach +ffffffff81731ee0 T efifb_reattach +ffffffff81731f00 T efifb_cb_cnattach +ffffffff81732090 T cb_find_fb +ffffffff81732220 T efifb_cb_found +ffffffff81732260 T efifb_stolen +ffffffff81733000 T pvbus_match +ffffffff81733060 T pvbus_attach +ffffffff81733350 T pvbus_kvm +ffffffff81733390 T pvbus_hyperv +ffffffff81733400 T pvbus_hyperv_print +ffffffff81733430 T pvbus_xen +ffffffff81733490 T pvbus_xen_print +ffffffff817334c0 T pvbus_probe +ffffffff817334f0 T pvbus_search +ffffffff81733590 T pvbus_identify +ffffffff81733770 T pvbus_init_cpu +ffffffff81733870 T pvbus_print +ffffffff817338d0 T pvbus_shutdown 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vm_rpc_open +ffffffff81738530 T vm_rpc_send_rpci_tx +ffffffff817385e0 T vmt_tick_hook +ffffffff81738620 T vmt_tclo_tick +ffffffff81738f00 T vmt_nicinfo_task +ffffffff817390e0 T vmt_kvop +ffffffff81739730 T vm_rpc_send +ffffffff817398f0 T vm_rpc_get_length +ffffffff81739a00 T vm_rpc_get_data +ffffffff81739bc0 T vm_rpc_close +ffffffff81739cd0 T vmt_resume +ffffffff81739e00 T vmt_shutdown +ffffffff81739fc0 T vmt_update_guest_uptime +ffffffff8173a030 T vmt_clear_guest_info +ffffffff8173a0b0 T vmt_update_guest_info +ffffffff8173a1d0 T vmt_tick +ffffffff8173a3a0 T vmt_tclo_state_change_success +ffffffff8173a400 T vmt_do_shutdown +ffffffff8173a600 T vm_rpc_send_str +ffffffff8173a7e0 T vmt_do_reboot +ffffffff8173a9e0 T vm_rpci_response_successful +ffffffff8173aa20 T vmt_set_backup_status +ffffffff8173aa50 T vmt_quiesce_task +ffffffff8173ab90 T vmt_quiesce_done_task +ffffffff8173ac50 T vmt_tclo_process +ffffffff8173ad20 T vmt_xdr_ifaddr +ffffffff8173ae90 T vmt_xdr_nic_entry +ffffffff8173b050 T vmt_xdr_nic_info +ffffffff8173b170 T vm_rpc_send_rpci_tx_buf +ffffffff8173b6f0 T vm_ins +ffffffff8173b760 T vm_outs +ffffffff8173c000 T xen_match +ffffffff8173c040 T xen_attach +ffffffff8173c2d0 T xen_activate +ffffffff8173c300 T xen_bus_dmamap_create +ffffffff8173c4c0 T xen_bus_dmamap_destroy +ffffffff8173c570 T xen_bus_dmamap_load +ffffffff8173c6b0 T xen_bus_dmamap_load_mbuf +ffffffff8173c7f0 T xen_bus_dmamap_unload +ffffffff8173c8a0 T xen_bus_dmamap_sync +ffffffff8173c8e0 T xen_init_hypercall +ffffffff8173c990 T xen_getfeatures +ffffffff8173ca40 T xen_init_info_page +ffffffff8173cb70 T xen_init_cbvec +ffffffff8173cc10 T xen_init_interrupts +ffffffff8173ccd0 T xen_init_grant_tables +ffffffff8173ce50 T xen_probe_devices +ffffffff8173d190 T xen_disable_emulated_devices +ffffffff8173d210 T xen_deferred +ffffffff8173d2b0 T xen_intr_enable +ffffffff8173d430 T xen_control +ffffffff8173d630 T xen_resume +ffffffff8173d660 T xen_hypercall +ffffffff8173d840 T xen_hypercallv +ffffffff8173d900 T xen_intr_ack +ffffffff8173d960 T xen_intr +ffffffff8173db90 T xen_intr_schedule +ffffffff8173dcc0 T xen_intr_barrier +ffffffff8173dd90 T xen_intr_signal +ffffffff8173dee0 T xen_intr_establish +ffffffff8173e210 T xen_intr_dispatch +ffffffff8173e340 T xen_intr_disestablish +ffffffff8173e540 T xen_intr_mask +ffffffff8173e610 T xen_intr_unmask +ffffffff8173e790 T xen_grant_table_grow +ffffffff8173ea00 T xen_grant_table_alloc +ffffffff8173ecb0 T xen_grant_table_free +ffffffff8173ed60 T xen_grant_table_enter +ffffffff8173ee10 T xen_grant_table_remove +ffffffff8173ef70 T xen_attach_device +ffffffff8173f140 t xen_attach_print +ffffffff8173f1a0 T xen_hotplug +ffffffff8173f460 T xen_unplug_emulated +ffffffff81740000 T xs_attach +ffffffff817404d0 T xs_intr +ffffffff81740980 T xs_get_msg +ffffffff81740a90 T xs_put_msg +ffffffff81740b30 T xs_geterror +ffffffff81740dc0 T xs_poll +ffffffff81740e50 T xs_output +ffffffff81741030 T xs_ring_put +ffffffff81741140 T xs_start +ffffffff817412f0 T xs_reply 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xnf_init +ffffffff81744c10 T xnf_iff +ffffffff81744c40 T xnf_rx_ring_fill +ffffffff81744eb0 T xnf_tx_ring_drain +ffffffff81744f00 T xnf_rx_ring_drain +ffffffff81744f50 T xnf_encap +ffffffff81745380 T xnf_txeof +ffffffff817455f0 T xnf_rxeof +ffffffff81746000 T xbf_match +ffffffff81746060 T xbf_attach +ffffffff817462c0 T xbf_detach +ffffffff81746380 T xbf_scsi_cmd +ffffffff81746780 T xbf_get_type +ffffffff817469b0 T xbf_intr +ffffffff81746ba0 T xbf_init +ffffffff81747210 T xbf_stop +ffffffff817473c0 T xbf_complete_cmd +ffffffff817476a0 T xbf_reclaim_cmd +ffffffff81747710 T xbf_scsi_done +ffffffff81747760 T xbf_scsi_inq +ffffffff81747950 T xbf_scsi_capacity +ffffffff81747a60 T xbf_scsi_capacity16 +ffffffff81747bc0 T xbf_submit_cmd +ffffffff81747ef0 T xbf_poll_cmd +ffffffff81747fb0 T xbf_load_cmd +ffffffff817481d0 T xbf_bounce_cmd +ffffffff817483f0 T xbf_dma_alloc +ffffffff817486b0 T xbf_dma_free +ffffffff817487d0 T xbf_scsi_inquiry +ffffffff81748970 T xbf_ring_create +ffffffff81748ac0 T xbf_ring_destroy +ffffffff81748c10 T xbf_alloc_ccbs +ffffffff81748f80 T xbf_free_ccbs +ffffffff817490b0 T xbf_put_ccb +ffffffff81749140 T xbf_get_ccb +ffffffff8174a000 T hv_channel_offer +ffffffff8174a0d0 T hv_channel_rescind +ffffffff8174a100 T hv_channel_delivered +ffffffff8174a120 T hv_channel_response +ffffffff8174a290 T hv_gettime +ffffffff8174a2c0 T hv_match +ffffffff8174a320 T hv_attach +ffffffff8174a4c0 T hv_set_version +ffffffff8174a500 T hv_init_hypercall +ffffffff8174a5b0 T hv_init_interrupts +ffffffff8174a760 T hv_vmbus_connect +ffffffff8174abd0 T hv_channel_scan +ffffffff8174ae90 T hv_attach_devices +ffffffff8174b010 T hv_delay +ffffffff8174b090 T hv_hypercall +ffffffff8174b190 T hv_init_synic +ffffffff8174b310 T hv_cmd +ffffffff8174b4e0 T hv_start +ffffffff8174b7c0 T hv_reply +ffffffff8174b8a0 T hv_intr +ffffffff8174b8e0 T hv_wait +ffffffff8174ba60 t hv_reply_done +ffffffff8174bb00 T hv_intr_signal +ffffffff8174bbb0 T hv_event_intr +ffffffff8174bdb0 T hv_message_intr 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hv_heartbeat +ffffffff8174f4a0 T hv_shutdown_attach +ffffffff8174f560 t hv_shutdown_task +ffffffff8174f570 T hv_shutdown +ffffffff8174f7e0 T hv_timesync_attach +ffffffff8174f8e0 T hv_timesync +ffffffff8174fbd0 T hv_kvp_attach +ffffffff81750030 t kvp_pool_insert +ffffffff817501a0 T hv_kvop +ffffffff817506b0 T hv_kvp +ffffffff817515d0 t kvp_pool_import +ffffffff81751830 t kvp_pool_export +ffffffff81752000 T hvn_match +ffffffff81752060 T hvn_attach +ffffffff817523f0 T hvn_nvs_attach +ffffffff81752790 T hvn_rx_ring_create +ffffffff81752970 T hvn_tx_ring_create +ffffffff81752b90 T hvn_ioctl +ffffffff81752e10 T hvn_start +ffffffff81752fe0 T hvn_media_change +ffffffff81753010 T hvn_media_status +ffffffff817530e0 T hvn_rndis_attach +ffffffff81753830 T hvn_set_capabilities +ffffffff817538e0 T hvn_rndis_detach +ffffffff81753b50 T hvn_get_lladdr +ffffffff81753bd0 T hvn_rx_ring_destroy +ffffffff81753d00 T hvn_tx_ring_destroy +ffffffff81753eb0 T hvn_nvs_detach +ffffffff81753f30 T hvn_init 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mpii_handshake_send +ffffffff817e1c80 T mpii_handshake_recv_dword +ffffffff817e1fa0 T mpii_handshake_recv +ffffffff817e2250 T mpii_empty_done +ffffffff817e2280 T mpii_push_reply +ffffffff817e2300 T mpii_poll +ffffffff817e2520 T mpii_eventack +ffffffff817e2740 T mpii_eventack_done +ffffffff817e27c0 T mpii_start +ffffffff817e2890 T mpii_event_sas +ffffffff817e2d00 T mpii_eventnotify_done +ffffffff817e2d40 T mpii_event_raid +ffffffff817e30a0 T mpii_find_dev +ffffffff817e3100 T mpii_insert_dev +ffffffff817e3180 T mpii_remove_dev +ffffffff817e3200 T mpii_event_discovery +ffffffff817e3260 T mpii_sas_remove_device +ffffffff817e3430 T mpii_event_done +ffffffff817e3510 T mpii_wait +ffffffff817e36d0 T mpii_dmamem_alloc +ffffffff817e3890 T mpii_scsi_cmd_tmo_handler +ffffffff817e3a10 T mpii_put_ccb +ffffffff817e3ad0 T mpii_poll_done +ffffffff817e3b00 T mpii_wait_done +ffffffff817e3b60 T mpii_scsi_cmd_done +ffffffff817e3e10 T mpii_scsi_cmd_tmo +ffffffff817e3f30 T mpii_scsi_cmd_tmo_done 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aq2_fw_get_stats +ffffffff817e6c80 T aq_match +ffffffff817e6cb0 T aq_attach +ffffffff817e7bd0 T aq_activate +ffffffff817e7c00 T aq_lookup +ffffffff817e7c80 T aq_intr +ffffffff817e7e40 T aq_intr_link +ffffffff817e7f60 T aq1_fw_reboot +ffffffff817e8230 T aq2_fw_reboot +ffffffff817e8750 T aq_hw_reset +ffffffff817e8900 T aq_init_rss +ffffffff817e8d10 T aq_hw_init +ffffffff817e90c0 T aq_ifmedia_change +ffffffff817e91b0 T aq_ifmedia_status +ffffffff817e92c0 T aq_ioctl +ffffffff817e9550 T aq_start +ffffffff817e98e0 T aq_watchdog +ffffffff817e9910 T aq_set_linkmode +ffffffff817e9940 T aq_refill +ffffffff817e99c0 T aq_intr_queue +ffffffff817e9ac0 T aq_enable_intr +ffffffff817e9bf0 T aq1_fw_read_version +ffffffff817e9ca0 T aq1_mac_soft_reset +ffffffff817e9cd0 T aq1_fw_version_init +ffffffff817e9e90 T aq1_hw_init_ucp +ffffffff817ea040 T aq1_mac_soft_reset_rbl +ffffffff817ea370 T aq1_global_software_reset +ffffffff817ea4c0 T aq1_mac_soft_reset_flb +ffffffff817ea980 T aq2_interface_buffer_read +ffffffff817eaaf0 T aq1_fw_downld_dwords +ffffffff817eaeb0 T aq_hw_l3_filter_set +ffffffff817eb150 T aq_hw_init_tx_path +ffffffff817eb450 T aq_hw_init_rx_path +ffffffff817ebe50 T aq_set_mac_addr +ffffffff817ec0c0 T aq_hw_qos_set +ffffffff817ec950 T aq2_filter_art_set +ffffffff817ecb60 T aq_get_linkmode +ffffffff817ecbd0 T aq_txring_reset +ffffffff817ed020 T aq_rxring_reset +ffffffff817ed630 T aq_rx_fill +ffffffff817ed890 T aq_rxeof +ffffffff817edc60 T aq_txeof +ffffffff817ede70 T aq_update_link_status +ffffffff817edf20 T aq_free_slots +ffffffff817edfd0 T aq_queue_up +ffffffff817ee4c0 T aq_dmamem_alloc +ffffffff817ee640 T aq_dmamem_free +ffffffff817ee6c0 T aq_queue_down +ffffffff817eea40 T aq_invalidate_rx_desc_cache +ffffffff817eead0 T aq_up +ffffffff817eefc0 T aq_down +ffffffff817ef160 T aq_rxrinfo +ffffffff817ef270 T aq_iff +ffffffff817f0000 T tulip_probe +ffffffff817f0060 T tulip_attach +ffffffff817f0cd0 T tulip_timeout_callback +ffffffff817f0d40 T tulip_timeout +ffffffff817f0db0 T tulip_txprobe +ffffffff817f0f30 T tulip_txput +ffffffff817f1590 T tulip_media_set +ffffffff817f1c50 T tulip_reset +ffffffff817f20a0 T tulip_mii_autonegotiate +ffffffff817f2400 T tulip_mii_readreg +ffffffff817f2640 T tulip_mii_writereg +ffffffff817f2890 T tulip_linkup +ffffffff817f2970 T tulip_init +ffffffff817f2b20 T tulip_media_print +ffffffff817f2b70 T tulip_media_link_monitor +ffffffff817f2de0 T tulip_mii_map_abilities +ffffffff817f2e70 T tulip_media_poll +ffffffff817f33c0 T tulip_mii_phy_readspecific +ffffffff817f35c0 T tulip_media_select +ffffffff817f3700 T tulip_21040_mediainfo_init +ffffffff817f3800 T tulip_21040_media_probe +ffffffff817f38f0 T tulip_21040_10baset_only_media_probe +ffffffff817f39b0 T tulip_21040_10baset_only_media_select +ffffffff817f3a10 T tulip_21040_auibnc_only_media_probe +ffffffff817f3ab0 T tulip_21040_auibnc_only_media_select +ffffffff817f3b00 T tulip_21041_mediainfo_init +ffffffff817f3bc0 T tulip_21041_media_probe +ffffffff817f3ca0 T tulip_21041_media_poll +ffffffff817f4010 T tulip_mii_get_phyaddr +ffffffff817f40e0 T tulip_2114x_media_preset +ffffffff817f4310 T tulip_null_media_poll +ffffffff817f4340 T tulip_21140_mediainit +ffffffff817f4390 T tulip_21140_evalboard_media_probe +ffffffff817f45c0 T tulip_21140_accton_media_probe +ffffffff817f4820 T tulip_21140_smc9332_media_probe +ffffffff817f4aa0 T tulip_21140_cogent_em100_media_probe +ffffffff817f4c40 T tulip_21140_znyx_zx34x_media_probe +ffffffff817f4ee0 T tulip_2114x_media_probe +ffffffff817f4f10 T tulip_delay_300ns +ffffffff817f5070 T tulip_srom_idle +ffffffff817f5d90 T tulip_srom_read +ffffffff817f6fe0 T tulip_mii_writebits +ffffffff817f76f0 T tulip_mii_turnaround +ffffffff817f8170 T tulip_mii_readbits +ffffffff817f8680 T tulip_identify_dec_nic +ffffffff817f8760 T tulip_identify_znyx_nic +ffffffff817f8a60 T tulip_identify_smc_nic +ffffffff817f8c50 T tulip_identify_cogent_nic +ffffffff817f8d60 T tulip_identify_accton_nic +ffffffff817f8ec0 T tulip_identify_asante_nic +ffffffff817f91d0 T tulip_identify_compex_nic +ffffffff817f9340 T tulip_srom_decode +ffffffff817fa000 T tulip_read_macaddr +ffffffff817faa60 T tulip_ifmedia_add +ffffffff817fab70 T tulip_ifmedia_change +ffffffff817fad60 T tulip_ifmedia_status +ffffffff817fadd0 T tulip_alloc_rxmap +ffffffff817fae10 T tulip_free_rxmap +ffffffff817fae50 T tulip_alloc_txmap +ffffffff817fae90 T tulip_free_txmap +ffffffff817faed0 T tulip_addr_filter +ffffffff817fb230 T tulip_rx_intr +ffffffff817fb8f0 T tulip_txput_setup +ffffffff817fbbd0 T tulip_tx_intr +ffffffff817fc030 T tulip_print_abnormal_interrupt +ffffffff817fc060 T tulip_intr_handler +ffffffff817fc450 T tulip_ifstart +ffffffff817fc530 T tulip_intr_shared +ffffffff817fc5b0 T tulip_intr_normal +ffffffff817fc600 T tulip_ifioctl +ffffffff817fc720 T tulip_ifwatchdog +ffffffff817fc840 T tulip_busdma_allocmem +ffffffff817fca00 T tulip_busdma_init +ffffffff817fcc50 T tulip_initcsrs +ffffffff817fcd50 T tulip_initring +ffffffff817fd000 T ep_pci_match +ffffffff817fd030 T ep_pci_attach +ffffffff817fe000 T pcn_match +ffffffff817fe070 T pcn_attach +ffffffff817fe960 T pcn_tick +ffffffff817fe9d0 T pcn_reset +ffffffff817fea60 T pcn_intr +ffffffff817fed30 T pcn_ioctl +ffffffff817feed0 T pcn_start +ffffffff817ff390 T pcn_watchdog +ffffffff817ff410 T pcn_txintr +ffffffff817ff930 T pcn_init +ffffffff818003e0 T pcn_stop +ffffffff81800590 T pcn_rxintr +ffffffff81800b30 T pcn_spnd +ffffffff81800c60 T pcn_add_rxbuf +ffffffff81800e90 T pcn_rxdrain +ffffffff81800f40 T pcn_set_filter +ffffffff818010b0 T pcn_79c970_mediainit +ffffffff818011e0 T pcn_79c970_mediachange +ffffffff818013d0 T pcn_79c970_mediastatus +ffffffff81801410 T pcn_79c971_mediainit +ffffffff818014f0 T pcn_mii_readreg +ffffffff818015d0 T pcn_mii_writereg +ffffffff81801680 T pcn_mii_statchg +ffffffff818016f0 T pcn_79c971_mediachange +ffffffff81801740 T pcn_79c971_mediastatus +ffffffff81802000 T siop_lookup_product +ffffffff818020a0 T siop_pci_attach_common +ffffffff818025b0 T siop_pci_reset +ffffffff81803000 T siop_pci_match +ffffffff81803050 T siop_pci_attach +ffffffff81804000 T sii3114_read_reg +ffffffff81804060 T sii3114_write_reg +ffffffff818040d0 T pdc203xx_read_reg +ffffffff81804130 T pdc203xx_write_reg +ffffffff818041a0 T svwsata_read_reg +ffffffff81804210 T svwsata_write_reg +ffffffff81804260 T svwsata_lba48_write_reg +ffffffff818042b0 T pciide_pci_read +ffffffff81804300 T pciide_pci_write +ffffffff81804380 T default_chip_map +ffffffff81804ac0 T artisea_chip_map +ffffffff81804db0 T piix_chip_map +ffffffff81805470 T piixsata_chip_map +ffffffff81805a80 T sch_chip_map +ffffffff81805e40 T amd756_chip_map +ffffffff81806310 T ixp_chip_map +ffffffff81806720 T cmd_chip_map +ffffffff818068a0 T cmd0643_9_chip_map +ffffffff81806c10 T cmd680_chip_map +ffffffff81806e50 T sii3112_chip_map +ffffffff818072a0 T sii3114_chip_map +ffffffff818078f0 T apollo_chip_map +ffffffff81808070 T sata_chip_map +ffffffff818082b0 T cy693_chip_map +ffffffff81808710 T sis_chip_map +ffffffff81808fe0 T natsemi_chip_map +ffffffff81809540 T ns_scx200_chip_map +ffffffff81809980 T acer_chip_map +ffffffff8180a150 T hpt_chip_map +ffffffff8180a720 T pdc202xx_chip_map +ffffffff8180b200 T pdcsata_chip_map +ffffffff8180bae0 T acard_chip_map +ffffffff8180bdb0 T serverworks_chip_map +ffffffff8180c180 T svwsata_chip_map +ffffffff8180c5e0 T nforce_chip_map +ffffffff8180caf0 T ite_chip_map +ffffffff8180ce20 T jmicron_chip_map +ffffffff8180d2c0 T phison_chip_map +ffffffff8180d690 T rdc_chip_map +ffffffff8180dbb0 T pciide_match +ffffffff8180dc60 T pciide_attach +ffffffff8180dd40 T pciide_detach +ffffffff8180ddb0 T pciide_activate +ffffffff8180e610 T pciide_lookup_product +ffffffff8180e8c0 T pciide_dmacmd_read +ffffffff8180e8f0 T pciide_dmacmd_write +ffffffff8180e920 T pciide_dmactl_read +ffffffff8180e950 T pciide_dmactl_write +ffffffff8180e980 T pciide_dmatbl_write +ffffffff8180e9b0 T pciide_mapregs_compat +ffffffff8180eb70 T pciide_unmapregs_compat +ffffffff8180ec10 T pciide_mapregs_native +ffffffff8180efb0 T pciide_unmapregs_native +ffffffff8180f060 T pciide_mapreg_dma +ffffffff8180f220 T pciide_dma_init +ffffffff8180f520 T pciide_dma_start +ffffffff8180f5b0 T pciide_dma_finish +ffffffff8180f7c0 T pciide_unmapreg_dma +ffffffff8180f7f0 T pciide_intr_flag +ffffffff8180fab0 T pciide_compat_intr +ffffffff8180fb30 T pciide_pci_intr +ffffffff8180fc10 T pciide_channel_dma_setup +ffffffff8180fcf0 T pciide_dma_table_setup +ffffffff8180ff80 T pciide_irqack +ffffffff8180ffe0 T pciide_chansetup +ffffffff818100d0 T pciide_chanfree +ffffffff81810120 T pciide_mapchan +ffffffff818101c0 T pciide_unmap_chan +ffffffff818102c0 T pciide_chan_candisable +ffffffff81810340 T pciide_map_compat_intr +ffffffff81810400 T pciide_unmap_compat_intr +ffffffff81810460 T pciide_print_channels +ffffffff81810530 T pciide_print_modes +ffffffff81810540 T default_chip_unmap +ffffffff81810640 T sata_setup_channel +ffffffff81810770 T piix_timing_debug +ffffffff818107a0 T piix_setup_channel +ffffffff81810cb0 T piix3_4_setup_channel +ffffffff81811500 T piix_setup_idetim_timings +ffffffff81811570 T piix_setup_idetim_drvs +ffffffff81811680 T piix_setup_sidetim_timings +ffffffff818116f0 T amd756_setup_channel +ffffffff81811af0 T apollo_setup_channel +ffffffff81811e90 T cmd_channel_map +ffffffff81812230 T cmd_pci_intr +ffffffff81812360 T cmd646_9_irqack +ffffffff81812490 T cmd0643_9_setup_channel +ffffffff81812930 T cmd680_setup_channel +ffffffff81812ef0 T cmd680_channel_map +ffffffff81813240 T sii_fixup_cacheline +ffffffff818135d0 T sii3112_setup_channel +ffffffff818137d0 T sii3112_drv_probe +ffffffff81813bc0 T sii3114_mapreg_dma +ffffffff81813ed0 T sii3114_chansetup +ffffffff81813fa0 T sii3114_mapchan +ffffffff818142f0 T sii3114_dmacmd_read +ffffffff81814330 T sii3114_dmacmd_write +ffffffff81814370 T sii3114_dmactl_read +ffffffff818143b0 T sii3114_dmactl_write +ffffffff818143f0 T sii3114_dmatbl_write +ffffffff81814430 T cy693_setup_channel +ffffffff81814670 T sis_hostbr_match +ffffffff81814740 T sis_south_match +ffffffff81814780 T sis_setup_channel +ffffffff81814b00 T sis96x_setup_channel +ffffffff81814de0 T natsemi_irqack +ffffffff81814e90 T natsemi_setup_channel +ffffffff818152f0 T natsemi_pci_intr +ffffffff81815400 T ns_scx200_setup_channel +ffffffff81815730 T acer_dma_init +ffffffff81815770 T acer_setup_channel +ffffffff81815be0 T acer_pci_intr +ffffffff81815ce0 T hpt_setup_channel +ffffffff81816070 T hpt_pci_intr +ffffffff818161a0 T pdc268_config_read +ffffffff81816210 T pdc20268_setup_channel +ffffffff81816400 T pdc202xx_setup_channel +ffffffff81816880 T pdc20262_dma_start +ffffffff81816a00 T pdc20262_dma_finish +ffffffff81816af0 T pdc20265_pci_intr +ffffffff81816cd0 T pdc202xx_pci_intr +ffffffff81816e00 T pdc203xx_pci_intr +ffffffff81816f10 T pdc205xx_pci_intr +ffffffff81817080 T pdc203xx_irqack +ffffffff81817130 T pdc203xx_setup_channel +ffffffff81817250 T pdc205xx_do_reset +ffffffff81817320 T pdc205xx_drv_probe +ffffffff81817620 T pdc203xx_dma_start +ffffffff818176f0 T pdc203xx_dma_finish +ffffffff81817800 T serverworks_setup_channel +ffffffff81817c60 T serverworks_pci_intr +ffffffff81817d90 T svwsata_mapreg_dma +ffffffff81817e40 T svwsata_drv_probe +ffffffff818181b0 T svwsata_mapchan +ffffffff818182b0 T svwsata_dmacmd_read +ffffffff818182e0 T svwsata_dmacmd_write +ffffffff81818310 T svwsata_dmactl_read +ffffffff81818340 T svwsata_dmactl_write +ffffffff81818370 T svwsata_dmatbl_write +ffffffff818183a0 T acard_setup_channel +ffffffff81818820 T nforce_setup_channel +ffffffff81818ba0 T nforce_pci_intr +ffffffff81818cb0 T ite_setup_channel +ffffffff81819050 T ixp_setup_channel +ffffffff81819450 T jmicron_setup_channel +ffffffff818196c0 T phison_setup_channel +ffffffff818198e0 T sch_setup_channel +ffffffff81819af0 T rdc_setup_channel +ffffffff81819f60 t ba5_read_4_ind +ffffffff8181a010 t ba5_write_4_ind +ffffffff8181b000 T ppbmatch +ffffffff8181b050 T ppbattach +ffffffff8181b940 T ppbdetach +ffffffff8181ba90 T ppbactivate +ffffffff8181c020 T ppb_alloc_busrange +ffffffff8181c1f0 T ppb_hotplug_insert +ffffffff8181c250 T ppb_hotplug_rescan +ffffffff8181c290 T ppb_hotplug_remove +ffffffff8181c410 T ppb_hotplug_insert_finish +ffffffff8181c440 T ppb_intr +ffffffff8181c520 T ppb_alloc_resources +ffffffff8181cd40 T ppbprint +ffffffff8181d000 T cy_pci_match +ffffffff8181d030 T cy_pci_attach +ffffffff8181e000 T rl_pci_match +ffffffff8181e060 T rl_pci_attach +ffffffff8181e260 T rl_pci_detach +ffffffff8181f000 T re_pci_probe +ffffffff8181f0b0 T re_pci_attach +ffffffff8181f4a0 T re_pci_detach +ffffffff8181f520 T re_pci_activate +ffffffff81820000 T vr_probe +ffffffff818200d0 T vr_attach +ffffffff818207f0 T vr_activate +ffffffff81820860 T vr_mii_readreg +ffffffff81820a20 T vr_mii_writereg +ffffffff81820bd0 T vr_miibus_readreg +ffffffff81820c40 T vr_miibus_writereg +ffffffff81820cb0 T vr_miibus_statchg +ffffffff81820cd0 T vr_setcfg +ffffffff81820f40 T vr_iff +ffffffff818210d0 T vr_reset +ffffffff81821210 T vr_quirks +ffffffff81821310 T vr_dmamem_alloc +ffffffff818214a0 T vr_dmamem_free +ffffffff81821530 T vr_intr +ffffffff818217b0 T vr_chipinit +ffffffff818218d0 T vr_ioctl +ffffffff81821ab0 T vr_start +ffffffff81821cb0 T vr_watchdog +ffffffff81821d60 T vr_wol +ffffffff81821f70 T vr_ifmedia_upd +ffffffff81821fc0 T vr_ifmedia_sts +ffffffff81822030 T vr_tick +ffffffff818220e0 T vr_rxtick +ffffffff818221e0 T vr_stop +ffffffff81822520 T vr_init +ffffffff81822c50 T vr_list_tx_init +ffffffff81822d50 T vr_list_rx_init +ffffffff81822f40 T vr_fill_rx_ring +ffffffff81823010 T vr_alloc_mbuf +ffffffff818231b0 T vr_rxeof +ffffffff81823490 T vr_rxeoc +ffffffff81823680 T vr_txeof +ffffffff81823860 T vr_encap +ffffffff81824000 T txp_probe +ffffffff81824030 T txp_attach +ffffffff818241f0 T txp_attachhook +ffffffff81824610 T txp_chip_init +ffffffff81824840 T txp_download_fw +ffffffff81824dd0 T txp_alloc_rings +ffffffff81825b90 T txp_command +ffffffff81825c70 T txp_ifmedia_upd +ffffffff81825d90 T txp_ifmedia_sts +ffffffff818260b0 T txp_ioctl +ffffffff81826210 T txp_start +ffffffff81826640 T txp_watchdog +ffffffff81826670 T txp_capabilities +ffffffff81826840 T txp_tick +ffffffff818269d0 T txp_intr +ffffffff81826ca0 T txp_reset_adapter +ffffffff81826dd0 T txp_download_fw_wait +ffffffff81826ee0 T txp_download_fw_section +ffffffff81827340 T txp_dma_malloc +ffffffff81827510 T txp_dma_free +ffffffff818275a0 T txp_rx_reclaim +ffffffff818278e0 T txp_rxbuf_reclaim +ffffffff81827bc0 T txp_tx_reclaim +ffffffff81827d90 T txp_init +ffffffff81827f10 T txp_stop +ffffffff81828030 T txp_set_filter +ffffffff818281d0 T txp_command2 +ffffffff81828520 T txp_cmd_desc_numfree +ffffffff81828580 T txp_response +ffffffff81828880 T txp_rsp_fixup +ffffffff81828970 T txp_show_descriptor +ffffffff81829000 T init_audio_devices +ffffffff81829150 T init_BTSC +ffffffff81829240 T set_audio +ffffffff81829660 T set_bctv_audio +ffffffff81829ab0 T msp_autodetect +ffffffff81829fd0 T temp_mute +ffffffff8182a070 T set_BTSC +ffffffff8182a090 T bctv_gpio_write +ffffffff8182a250 T msp_read_id +ffffffff8182a320 T dpl_read_id +ffffffff8182a3f0 T dpl_autodetect +ffffffff8182b000 T writeEEProm +ffffffff8182b030 T readEEProm +ffffffff8182b100 T signCard +ffffffff8182b1b0 T probeCard +ffffffff8182d000 T bktr_name +ffffffff8182d030 T common_bktr_attach +ffffffff8182d390 t oformat_meteor_to_bt +ffffffff8182d4b0 T common_bktr_intr +ffffffff8182dbc0 T video_open +ffffffff8182e170 t set_fps +ffffffff8182e2d0 T vbi_open +ffffffff8182e380 T tuner_open +ffffffff8182e3d0 T video_close +ffffffff8182e500 T tuner_close +ffffffff8182e530 T vbi_close +ffffffff8182e560 T video_read +ffffffff8182e770 t start_capture +ffffffff81831aa0 T vbi_read +ffffffff81831be0 T video_ioctl +ffffffff818332c0 T bktr_common_ioctl +ffffffff81833c30 T tuner_ioctl +ffffffff81834bd0 t remote_read +ffffffff81834e00 T i2cWrite +ffffffff81834f50 T i2cRead +ffffffff818350a0 T msp_dpl_read +ffffffff81835460 T msp_dpl_write +ffffffff818356d0 T msp_dpl_reset +ffffffff81835b10 t i2c_write_byte +ffffffff81835d90 t i2c_read_byte +ffffffff81836050 t split +ffffffff81836280 t getline +ffffffff81837000 t bktr_probe +ffffffff81837060 t bktr_attach +ffffffff81837390 T bktr_get_info +ffffffff81837480 T bktr_set_info +ffffffff81837620 T get_bktr_mem +ffffffff818378f0 T free_bktr_mem +ffffffff81837960 T bktropen +ffffffff81837a20 T bktrclose +ffffffff81837aa0 T bktrread +ffffffff81837b30 T bktrwrite +ffffffff81837b60 T bktrioctl +ffffffff81837c00 T bktrmmap +ffffffff81837ca0 t bktr_intr +ffffffff81838000 T select_tuner +ffffffff81838050 T tv_freq +ffffffff818382e0 T do_afc +ffffffff81838440 T get_tuner_status +ffffffff81838460 T tv_channel +ffffffff81838520 T tuner_getchnlset +ffffffff81839000 T xl_pci_match +ffffffff81839030 T xl_pci_attach +ffffffff81839410 T xl_pci_detach +ffffffff818394b0 T xl_pci_wol_power +ffffffff81839510 T xl_pci_intr_ack +ffffffff8183a000 T fxp_pci_match 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em_initialize_receive_unit +ffffffff8183eeb0 T em_enable_intr +ffffffff8183f060 T em_watchdog +ffffffff8183f260 T em_enable_hw_vlans +ffffffff8183f310 T em_setup_transmit_structures +ffffffff8183f560 T em_initialize_transmit_unit +ffffffff8183fc40 T em_setup_receive_structures +ffffffff8183fdb0 T em_setup_queues_msix +ffffffff818404e0 T em_intr +ffffffff81840630 T em_txeof +ffffffff81840820 T em_rxeof +ffffffff81840d00 T em_rxrefill_locked +ffffffff81840e20 T em_media_status +ffffffff81841080 T em_flowstatus +ffffffff818411a0 T em_media_change +ffffffff81841310 T em_tso_setup +ffffffff818414d0 T em_tx_ctx_setup +ffffffff81841640 T em_transmit_checksum_setup +ffffffff81841730 T em_fill_descriptors +ffffffff818417b0 T em_82547_fifo_workaround +ffffffff81841820 T em_82547_tx_fifo_reset +ffffffff81841d90 T em_pci_clear_mwi +ffffffff81841dc0 T em_pci_set_mwi +ffffffff81841df0 T em_smartspeed +ffffffff81842050 T em_kstat_read +ffffffff81842570 T em_flush_desc_rings +ffffffff818426d0 T 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em_translate_82542_register +ffffffff81846040 T em_read_sfp_data_byte +ffffffff81846150 T em_set_media_type +ffffffff818463f0 T em_reset_hw +ffffffff81847260 T em_disable_pciex_master +ffffffff81847350 T em_check_phy_reset_block +ffffffff81847420 T em_gate_hw_phy_config_ich8lan +ffffffff818474d0 t em_get_software_flag +ffffffff818476a0 T em_hv_phy_workarounds_ich8lan +ffffffff81847b50 T em_lv_phy_workarounds_ich8lan +ffffffff81847c90 t em_phy_init_script +ffffffff81847fb0 T em_read_eeprom +ffffffff81848720 T em_set_eee_i350 +ffffffff81848870 T em_init_hw +ffffffff8184a7a0 T em_phy_reset +ffffffff8184aa20 T em_clear_vfta_i350 +ffffffff8184ac60 T em_read_phy_reg +ffffffff8184ae50 T em_setup_link +ffffffff8184d6d0 T em_enable_tx_pkt_filtering +ffffffff8184db70 T em_clear_hw_cntrs +ffffffff8184e740 T em_write_phy_reg +ffffffff8184e900 T em_power_up_serdes_link_82575 +ffffffff8184ea20 T em_copper_link_autoneg +ffffffff8184eb80 T em_phy_setup_autoneg +ffffffff8184ed00 T em_copper_link_postconfig +ffffffff8184ee00 T em_config_collision_dist +ffffffff8184eea0 t em_config_mac_to_phy +ffffffff8184f040 t em_config_fc_after_link_up +ffffffff8184f2e0 t em_config_dsp_after_link_change +ffffffff8184fe10 T em_force_mac_fc +ffffffff8184fee0 T em_check_for_link +ffffffff818506b0 T em_get_pcs_speed_and_duplex_82575 +ffffffff81850770 T em_k1_gig_workaround_hv +ffffffff818508d0 T em_link_stall_workaround_hv +ffffffff818509d0 T em_k1_workaround_lv +ffffffff81850aa0 T em_k1_workaround_lpt_lp +ffffffff81850e00 t em_check_downshift +ffffffff81850ec0 T em_set_eee_pchlan +ffffffff81850f70 t em_polarity_reversal_workaround +ffffffff81851250 T em_get_speed_and_duplex +ffffffff81851800 T em_access_phy_wakeup_reg_bm +ffffffff818519c0 t em_write_phy_reg_ex +ffffffff81851c90 t em_read_phy_reg_ex +ffffffff81852260 T em_access_phy_debug_regs_hv +ffffffff81852340 T em_access_phy_reg_hv +ffffffff818524d0 t em_swfw_sync_acquire +ffffffff818526c0 t em_swfw_sync_release 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ixgb_initialize_transmit_unit +ffffffff8185d020 T ixgb_setup_receive_structures +ffffffff8185d0b0 T ixgb_initialize_receive_unit +ffffffff8185d3c0 T ixgb_intr +ffffffff8185d600 T ixgb_rxeof +ffffffff8185daa0 T ixgb_txeof +ffffffff8185dcb0 T ixgb_media_status +ffffffff8185dda0 T ixgb_media_change +ffffffff8185ddf0 T ixgb_free_transmit_structures +ffffffff8185df50 T ixgb_free_receive_structures +ffffffff8185e0b0 T ixgb_allocate_transmit_structures +ffffffff8185e140 T ixgb_transmit_checksum_setup +ffffffff8185e240 T ixgb_get_buf +ffffffff8185e420 T ixgb_allocate_receive_structures +ffffffff8185e5e0 T ixgb_receive_checksum +ffffffff8185e640 T ixgb_write_pci_cfg +ffffffff8185f000 T ixgb_validate_eeprom_checksum +ffffffff8185f080 T ixgb_read_eeprom +ffffffff8185f3b0 T ixgb_update_eeprom_checksum +ffffffff8185f420 T ixgb_write_eeprom +ffffffff8185faa0 t ixgb_shift_out_bits +ffffffff8185fc10 T ixgb_get_eeprom_data +ffffffff8185fcc0 T ixgb_get_eeprom_word +ffffffff8185fda0 T ixgb_get_ee_mac_addr +ffffffff8185fea0 T ixgb_get_ee_pba_number +ffffffff8185ff60 T ixgb_get_ee_device_id +ffffffff81861000 T ixgb_mac_reset +ffffffff81861270 T ixgb_adapter_stop +ffffffff81861400 T ixgb_init_hw +ffffffff81861790 T ixgb_init_rx_addrs +ffffffff818618f0 T mac_addr_valid +ffffffff81861950 T ixgb_clear_vfta +ffffffff818619d0 T ixgb_clear_hw_cntrs +ffffffff818622c0 T ixgb_setup_fc +ffffffff81862480 T ixgb_check_for_link +ffffffff81862700 T ixgb_rar_set +ffffffff81862780 T ixgb_mc_addr_list_update +ffffffff81862a60 T ixgb_write_vfta +ffffffff81862a90 T ixgb_read_phy_reg +ffffffff81863110 T ixgb_write_phy_reg +ffffffff81863790 T ixgb_check_for_bad_link +ffffffff81863860 T ixgb_led_on +ffffffff818638c0 T ixgb_led_off +ffffffff81864000 T ixgbe_probe +ffffffff81864030 T ixgbe_attach +ffffffff818646a0 T ixgbe_detach +ffffffff81864910 T ixgbe_activate +ffffffff81864a40 T ixgbe_identify_hardware +ffffffff81864b20 T ixgbe_allocate_pci_resources +ffffffff81864ca0 T ixgbe_allocate_queues +ffffffff81865280 T ixgbe_allocate_msix +ffffffff81865510 T ixgbe_allocate_legacy +ffffffff81865670 T ixgbe_setup_interface +ffffffff81865a60 T ixgbe_free_transmit_structures +ffffffff81865af0 T ixgbe_free_receive_structures +ffffffff81865bc0 T ixgbe_free_pci_resources +ffffffff81865cb0 T ixgbe_stop +ffffffff81866040 T ixgbe_init +ffffffff81866e60 T ixgbe_start +ffffffff81867070 T ixgbe_encap +ffffffff818674f0 T ixgbe_ioctl +ffffffff818678d0 T ixgbe_rxrinfo +ffffffff81867a40 T ixgbe_get_sffpage +ffffffff81867c10 T ixgbe_disable_intr +ffffffff81867d00 T ixgbe_iff +ffffffff81867e90 T ixgbe_enable_intr +ffffffff81867fb0 T ixgbe_enable_queues +ffffffff818680c0 T ixgbe_watchdog +ffffffff81868320 T ixgbe_setup_transmit_structures +ffffffff81868400 T ixgbe_initialize_transmit_units +ffffffff81868750 T ixgbe_setup_receive_structures +ffffffff81868890 T ixgbe_initialize_receive_units +ffffffff81868e40 T ixgbe_config_gpie +ffffffff81868f20 T ixgbe_setup_vlan_hw_support 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ixgbe_enable_mc_generic +ffffffff818703f0 T ixgbe_disable_mc_generic +ffffffff81870450 T ixgbe_enable_rx_generic +ffffffff81870540 T ixgbe_disable_rx_generic +ffffffff81870650 T ixgbe_fc_enable_generic +ffffffff81870b00 T ixgbe_setup_fc_generic +ffffffff81870e10 T ixgbe_fc_autoneg +ffffffff81871140 T ixgbe_device_supports_autoneg_fc +ffffffff81871240 T ixgbe_start_hw_gen2 +ffffffff81871460 T ixgbe_identify_phy +ffffffff818714c0 T ixgbe_set_pci_config_data_generic +ffffffff81871530 T ixgbe_disable_rx +ffffffff81871570 T ixgbe_disable_pcie_master +ffffffff818716f0 T ixgbe_read_eerd_buffer_generic +ffffffff81871850 T ixgbe_poll_eerd_eewr_done +ffffffff81871900 T ixgbe_write_eewr_buffer_generic +ffffffff81871aa0 T ixgbe_write_eewr_generic +ffffffff81871af0 T ixgbe_acquire_eeprom +ffffffff81871cd0 T ixgbe_get_eeprom_semaphore +ffffffff81871f60 T ixgbe_release_eeprom_semaphore +ffffffff81871fe0 T ixgbe_ready_eeprom +ffffffff818721b0 T ixgbe_shift_out_eeprom_bits +ffffffff818723e0 T ixgbe_shift_in_eeprom_bits +ffffffff81872580 T ixgbe_standby_eeprom +ffffffff818726a0 T ixgbe_raise_eeprom_clk +ffffffff81872720 T ixgbe_lower_eeprom_clk +ffffffff818727a0 T ixgbe_release_eeprom +ffffffff818728b0 T ixgbe_validate_mac_addr +ffffffff81872910 T ixgbe_init_uta_tables +ffffffff81872950 T ixgbe_add_uc_addr +ffffffff818729d0 T ixgbe_mta_vector +ffffffff81872a90 T ixgbe_set_mta +ffffffff81872b60 T ixgbe_negotiate_fc +ffffffff81872c10 T ixgbe_fc_autoneg_fiber +ffffffff81872d50 T ixgbe_fc_autoneg_backplane +ffffffff81872ef0 T ixgbe_fc_autoneg_copper +ffffffff81873030 T ixgbe_disable_sec_rx_path_generic +ffffffff81873110 T ixgbe_enable_sec_rx_path_generic +ffffffff818731c0 T ixgbe_enable_rx +ffffffff81873200 T ixgbe_get_pcie_msix_count_generic +ffffffff81873290 T ixgbe_insert_mac_addr_generic +ffffffff818734e0 T ixgbe_set_vmdq +ffffffff81873520 T ixgbe_set_rar +ffffffff81873570 T ixgbe_clear_vmdq +ffffffff818735b0 T ixgbe_clear_vmdq_generic +ffffffff81873790 T ixgbe_set_vmdq_generic +ffffffff81873860 T ixgbe_init_uta_tables_generic +ffffffff818738e0 T ixgbe_find_vlvf_slot +ffffffff818739a0 T ixgbe_set_vfta_generic +ffffffff81873ac0 T ixgbe_set_vlvf_generic +ffffffff81873d90 T ixgbe_clear_vfta_generic +ffffffff81873ec0 T ixgbe_need_crosstalk_fix +ffffffff81873f20 T ixgbe_check_mac_link_generic +ffffffff81874140 T ixgbe_get_device_caps_generic +ffffffff81874190 T ixgbe_calculate_checksum +ffffffff81874250 T ixgbe_hic_unlocked +ffffffff81874460 T ixgbe_host_interface_command +ffffffff81874660 T ixgbe_clear_tx_pending +ffffffff81874890 T ixgbe_mng_present +ffffffff81874900 T ixgbe_mng_enabled +ffffffff818749d0 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff81874e10 T ixgbe_flap_tx_laser +ffffffff81874e50 T ixgbe_check_link +ffffffff81874ea0 T ixgbe_set_soft_rate_select_speed +ffffffff81874fc0 T ixgbe_init_shared_code +ffffffff818750b0 T ixgbe_set_mac_type +ffffffff81875250 T ixgbe_init_hw +ffffffff81875290 T ixgbe_get_media_type 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ixgbe_read_i2c_eeprom_82598 +ffffffff81879810 T ixgbe_check_mac_link_82598 +ffffffff81879b00 T ixgbe_setup_mac_link_82598 +ffffffff81879d00 T ixgbe_get_link_capabilities_82598 +ffffffff81879dd0 T ixgbe_setup_copper_link_82598 +ffffffff81879f20 T ixgbe_start_mac_link_82598 +ffffffff8187a070 T ixgbe_validate_link_ready +ffffffff8187a130 T ixgbe_read_i2c_phy_82598 +ffffffff8187b000 T ixgbe_init_mac_link_ops_82599 +ffffffff8187b1d0 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff8187b2c0 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff8187b360 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff8187b4f0 T ixgbe_setup_mac_link_82599 +ffffffff8187b7c0 T ixgbe_set_hard_rate_select_speed +ffffffff8187b890 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff8187b970 T ixgbe_setup_mac_link_smartspeed +ffffffff8187bde0 T ixgbe_init_phy_ops_82599 +ffffffff8187bf70 T ixgbe_read_i2c_byte_82599 +ffffffff8187c130 T ixgbe_write_i2c_byte_82599 +ffffffff8187c2f0 T ixgbe_setup_copper_link_82599 +ffffffff8187c360 T ixgbe_setup_sfp_modules_82599 +ffffffff8187c590 T prot_autoc_read_82599 +ffffffff8187c6f0 T prot_autoc_write_82599 +ffffffff8187c8b0 T ixgbe_reset_pipeline_82599 +ffffffff8187cce0 T ixgbe_init_ops_82599 +ffffffff8187cef0 T ixgbe_identify_phy_82599 +ffffffff8187cfa0 T ixgbe_reset_hw_82599 +ffffffff8187d3e0 T ixgbe_get_media_type_82599 +ffffffff8187d510 T ixgbe_get_supported_physical_layer_82599 +ffffffff8187d700 T ixgbe_enable_rx_dma_82599 +ffffffff8187d790 T ixgbe_read_analog_reg8_82599 +ffffffff8187d870 T ixgbe_write_analog_reg8_82599 +ffffffff8187d910 T ixgbe_start_hw_82599 +ffffffff8187da40 T ixgbe_get_link_capabilities_82599 +ffffffff8187db90 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff8187dc60 T ixgbe_read_eeprom_82599 +ffffffff8187dc90 T ixgbe_start_mac_link_82599 +ffffffff8187ded0 T ixgbe_verify_fw_version_82599 +ffffffff8187e000 T ixgbe_init_ops_X540 +ffffffff8187e230 T ixgbe_init_eeprom_params_X540 +ffffffff8187e2c0 T ixgbe_read_eerd_X540 +ffffffff8187e370 T ixgbe_write_eewr_X540 +ffffffff8187e420 T ixgbe_update_eeprom_checksum_X540 +ffffffff8187e520 T ixgbe_validate_eeprom_checksum_X540 +ffffffff8187e640 T ixgbe_calc_eeprom_checksum_X540 +ffffffff8187e810 T ixgbe_reset_hw_X540 +ffffffff8187ea80 T ixgbe_get_media_type_X540 +ffffffff8187eab0 T ixgbe_get_supported_physical_layer_X540 +ffffffff8187eb30 T ixgbe_start_hw_X540 +ffffffff8187eb90 T ixgbe_acquire_swfw_sync_X540 +ffffffff8187f0d0 T ixgbe_release_swfw_sync_X540 +ffffffff8187f250 T ixgbe_init_swfw_sync_X540 +ffffffff8187f370 T ixgbe_setup_mac_link_X540 +ffffffff8187f390 T ixgbe_blink_led_start_X540 +ffffffff8187f4d0 T ixgbe_blink_led_stop_X540 +ffffffff8187f600 T ixgbe_get_link_capabilities_X540 +ffffffff8187f650 T ixgbe_update_flash_X540 +ffffffff8187f890 T ixgbe_poll_flash_update_done_X540 +ffffffff8187f940 T ixgbe_get_swfw_sync_semaphore +ffffffff8187fb10 T ixgbe_release_swfw_sync_semaphore +ffffffff81880000 T ixgbe_init_ops_X550 +ffffffff81880110 T ixgbe_dmac_config_X550 +ffffffff81880210 T ixgbe_dmac_config_tcs_X550 +ffffffff81880390 T ixgbe_dmac_update_tcs_X550 +ffffffff81880470 T ixgbe_set_source_address_pruning_X550 +ffffffff81880580 T ixgbe_init_eeprom_params_X550 +ffffffff81880610 T ixgbe_calc_eeprom_checksum_X550 +ffffffff81880630 T ixgbe_read_ee_hostif_X550 +ffffffff81880720 T ixgbe_write_ee_hostif_X550 +ffffffff818807f0 T ixgbe_update_eeprom_checksum_X550 +ffffffff818809f0 T ixgbe_validate_eeprom_checksum_X550 +ffffffff81880b80 T ixgbe_disable_rx_x550 +ffffffff81880cd0 T ixgbe_led_on_t_X550em +ffffffff81880da0 T ixgbe_led_off_t_X550em +ffffffff81880e70 T ixgbe_read_cs4227 +ffffffff81880ea0 T ixgbe_write_cs4227 +ffffffff81880ed0 T ixgbe_read_pe +ffffffff81880f20 T ixgbe_write_pe +ffffffff81880f80 T ixgbe_reset_cs4227 +ffffffff81881290 T ixgbe_check_cs4227 +ffffffff818814c0 T ixgbe_setup_mux_ctl +ffffffff81881560 T ixgbe_identify_phy_x550em +ffffffff818817a0 T ixgbe_read_mng_if_sel_x550em +ffffffff81881820 T ixgbe_fw_phy_activity +ffffffff81881950 T ixgbe_get_phy_id_fw +ffffffff81881ad0 T ixgbe_identify_phy_fw +ffffffff81881b20 T ixgbe_shutdown_fw_phy +ffffffff81881c00 T ixgbe_read_phy_reg_x550em +ffffffff81881c30 T ixgbe_write_phy_reg_x550em +ffffffff81881c60 T ixgbe_init_ops_X550EM +ffffffff81881f00 T ixgbe_get_bus_info_X550em +ffffffff81881f50 T ixgbe_get_media_type_X550em +ffffffff81882020 T ixgbe_setup_sfp_modules_X550em +ffffffff818821b0 T ixgbe_get_link_capabilities_X550em +ffffffff81882280 T ixgbe_reset_hw_X550em +ffffffff818827d0 T ixgbe_get_supported_physical_layer_X550em +ffffffff81882980 T ixgbe_setup_fc_X550em +ffffffff81882af0 T ixgbe_init_phy_ops_X550em +ffffffff81883010 T ixgbe_setup_fw_link +ffffffff818831d0 T ixgbe_fc_autoneg_fw +ffffffff81883200 T ixgbe_setup_eee_fw +ffffffff81883260 T ixgbe_init_ops_X550EM_a +ffffffff818833a0 T ixgbe_read_iosf_sb_reg_x550 +ffffffff81883560 T ixgbe_write_iosf_sb_reg_x550 +ffffffff81883720 T ixgbe_read_iosf_sb_reg_x550a +ffffffff818837c0 T ixgbe_write_iosf_sb_reg_x550a +ffffffff81883850 T ixgbe_acquire_swfw_sync_X550a +ffffffff818839a0 T ixgbe_release_swfw_sync_X550a +ffffffff81883a40 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff81883a80 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff81883c10 T ixgbe_setup_fc_backplane_x550em_a +ffffffff81883e40 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff81883fd0 T ixgbe_init_ops_X550EM_x +ffffffff818840a0 T ixgbe_acquire_swfw_sync_X550em +ffffffff81884170 T ixgbe_release_swfw_sync_X550em +ffffffff81884210 T ixgbe_iosf_wait +ffffffff818842d0 T ixgbe_get_phy_token +ffffffff81884360 T ixgbe_put_phy_token +ffffffff818843e0 T ixgbe_supported_sfp_modules_X550em +ffffffff81884460 T ixgbe_identify_sfp_module_X550em +ffffffff818844e0 T ixgbe_init_mac_link_ops_X550em +ffffffff81884630 T ixgbe_restart_an_internal_phy_x550em +ffffffff81884760 T ixgbe_setup_sgmii +ffffffff81884970 T ixgbe_setup_sgmii_fw +ffffffff81884bb0 T ixgbe_setup_mac_link_sfp_x550a +ffffffff81884df0 T ixgbe_setup_mac_link_sfp_x550em +ffffffff81884eb0 T ixgbe_setup_mac_link_t_X550em +ffffffff81884f70 T ixgbe_check_link_t_X550em +ffffffff81885070 T ixgbe_get_lasi_ext_t_x550em +ffffffff81885230 T ixgbe_enable_lasi_ext_t_x550em +ffffffff81885420 T ixgbe_setup_kr_speed_x550em +ffffffff81885680 T ixgbe_reset_phy_fw +ffffffff81885820 T ixgbe_check_overtemp_fw +ffffffff818859a0 T ixgbe_read_phy_reg_x550a +ffffffff81885a60 T ixgbe_write_phy_reg_x550a +ffffffff81885b30 T ixgbe_setup_kr_x550em +ffffffff81885ba0 T ixgbe_setup_internal_phy_t_x550em +ffffffff81885d30 T ixgbe_enter_lplu_t_x550em +ffffffff81886000 T ixgbe_handle_lasi_ext_t_x550em +ffffffff81886080 T ixgbe_reset_phy_t_X550em +ffffffff818860e0 T ixgbe_set_mdio_speed +ffffffff818861c0 T ixgbe_init_ext_t_x550em +ffffffff81886290 T ixgbe_setup_sfi_x550a +ffffffff81886480 T ixgbe_setup_ixfi_x550em_x +ffffffff818866b0 T ixgbe_setup_ixfi_x550em +ffffffff818868d0 T ixgbe_ext_phy_t_x550em_get_link +ffffffff81886970 T ixgbe_setup_phy_loopback_x550em +ffffffff81886ba0 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff81886d60 T ixgbe_write_ee_hostif_data_X550 +ffffffff81886dd0 T ixgbe_checksum_ptr_x550 +ffffffff81886f60 T ixgbe_calc_checksum_X550 +ffffffff81887100 T ixgbe_update_flash_X550 +ffffffff81887160 T ixgbe_get_lcd_t_x550em +ffffffff81887220 T ixgbe_set_mux +ffffffff81888000 T ixgbe_read_i2c_combined_generic_int +ffffffff81888330 T ixgbe_i2c_start +ffffffff818884e0 t ixgbe_out_i2c_byte_ack +ffffffff81888530 T ixgbe_clock_in_i2c_byte +ffffffff81888670 T ixgbe_clock_out_i2c_bit +ffffffff818887c0 T ixgbe_i2c_stop +ffffffff818889a0 T ixgbe_i2c_bus_clear +ffffffff81888b00 T ixgbe_read_i2c_combined_generic +ffffffff81888b20 T ixgbe_read_i2c_combined_generic_unlocked +ffffffff81888b40 T ixgbe_write_i2c_combined_generic_int +ffffffff81888d80 T ixgbe_write_i2c_combined_generic +ffffffff81888da0 T ixgbe_write_i2c_combined_generic_unlocked +ffffffff81888dc0 T ixgbe_init_phy_ops_generic +ffffffff81888ef0 T ixgbe_identify_phy_generic +ffffffff81888fd0 T ixgbe_reset_phy_generic +ffffffff81889220 T ixgbe_read_phy_reg_generic +ffffffff818892e0 T ixgbe_write_phy_reg_generic +ffffffff818893a0 T ixgbe_read_phy_reg_mdi +ffffffff81889550 T ixgbe_write_phy_reg_mdi +ffffffff818896f0 T ixgbe_setup_phy_link_generic +ffffffff81889a00 T ixgbe_setup_phy_link_speed_generic +ffffffff81889a60 T ixgbe_get_phy_firmware_version_generic +ffffffff81889a90 T ixgbe_read_i2c_byte_generic +ffffffff81889ab0 T ixgbe_write_i2c_byte_generic +ffffffff81889ad0 T ixgbe_read_i2c_eeprom_generic +ffffffff81889b00 T ixgbe_write_i2c_eeprom_generic +ffffffff81889b20 T ixgbe_identify_module_generic +ffffffff81889ba0 T ixgbe_read_i2c_byte_generic_unlocked +ffffffff81889bc0 T ixgbe_write_i2c_byte_generic_unlocked +ffffffff81889be0 T ixgbe_tn_check_overtemp +ffffffff81889c60 t ixgbe_probe_phy +ffffffff81889e90 T ixgbe_check_reset_blocked +ffffffff81889ef0 T ixgbe_validate_phy_addr +ffffffff81889f60 T ixgbe_get_phy_id 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ixgbe_stop_adapter_vf +ffffffff81891860 T ixgbevf_negotiate_api_version +ffffffff81891910 T ixgbe_setup_mac_link_vf +ffffffff81891940 T ixgbe_check_mac_link_vf +ffffffff81891c90 T ixgbe_set_rar_vf +ffffffff81891d60 T ixgbevf_set_uc_addr_vf +ffffffff81891e30 T ixgbe_update_mc_addr_list_vf +ffffffff81891f30 T ixgbevf_update_xcast_mode +ffffffff81891ff0 T ixgbe_get_link_state_vf +ffffffff818920a0 T ixgbe_set_vfta_vf +ffffffff81892140 T ixgbevf_rlpml_set_vf +ffffffff818921e0 t ixgbe_dummy_handler_vf +ffffffff81892210 t ixgbe_dummy_void_handler_vf +ffffffff81892240 T ixgbe_get_num_of_tx_queues_vf +ffffffff81892270 T ixgbe_get_num_of_rx_queues_vf +ffffffff818922a0 T ixgbevf_get_queues +ffffffff81893000 t ixl_match +ffffffff818930a0 t ixl_attach +ffffffff81894ae0 t ixl_710_rd_ctl +ffffffff81894bb0 t ixl_710_wr_ctl +ffffffff81894c90 t ixl_710_set_rss_key +ffffffff81894e90 t ixl_710_set_rss_lut +ffffffff81894f20 t ixl_atq_exec +ffffffff818950d0 t ixl_wakeup +ffffffff818950f0 t ixl_722_rd_ctl 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t ixl_kstat_attach +ffffffff81899da0 t ixl_dmamem_free +ffffffff81899e30 t ixl_hmc_free +ffffffff81899f60 t ixl_arq_unfill +ffffffff8189a080 t ixl_link_state_update_iaq +ffffffff8189a140 t ixl_set_link_status +ffffffff8189a2c0 t ixl_atq_poll +ffffffff8189a510 t ixl_rxeof +ffffffff8189a820 t ixl_txeof +ffffffff8189aa40 t ixl_rxfill +ffffffff8189ad80 t ixl_down +ffffffff8189b510 t ixl_rxr_free +ffffffff8189b650 t ixl_txr_free +ffffffff8189b790 t ixl_rxrefill +ffffffff8189b7b0 t ixl_sfp_open +ffffffff8189b9d0 t ixl_sfp_get +ffffffff8189baf0 t ixl_sfp_close +ffffffff8189bc20 t ixl_qsfp_open +ffffffff8189bc60 t ixl_qsfp_get +ffffffff8189bd80 t ixl_qsfp_close +ffffffff8189bdb0 t ixl_kstat_tick +ffffffff8189be30 t ixl_kstat_create +ffffffff8189c060 t ixl_kstat_read +ffffffff8189d000 T dwqe_pci_match +ffffffff8189d030 T dwqe_pci_attach +ffffffff8189e000 T ice_match +ffffffff8189e030 T ice_driver_is_detaching +ffffffff8189e070 T ice_usec_delay +ffffffff8189e100 T ice_msec_delay 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+ffffffff818a54f0 T ice_print_led_caps +ffffffff818a5760 T ice_print_sdp_caps +ffffffff818a5930 T ice_parse_common_caps +ffffffff818a5cd0 T ice_recalc_port_limited_caps +ffffffff818a5d10 T ice_parse_vf_func_caps +ffffffff818a5d50 T ice_parse_vsi_func_caps +ffffffff818a5dc0 T ice_parse_func_caps +ffffffff818a5ee0 T ice_parse_valid_functions_cap +ffffffff818a5f60 T ice_parse_vf_dev_caps +ffffffff818a5fa0 T ice_parse_vsi_dev_caps +ffffffff818a5fe0 T ice_parse_nac_topo_dev_caps +ffffffff818a6020 T ice_is_vsi_valid +ffffffff818a6070 T ice_parse_sensor_reading_cap +ffffffff818a60b0 T ice_parse_dev_caps +ffffffff818a6240 T ice_aq_list_caps +ffffffff818a62f0 T ice_discover_dev_caps +ffffffff818a63f0 T ice_discover_func_caps +ffffffff818a65d0 T ice_set_safe_mode_caps +ffffffff818a6760 T ice_get_caps +ffffffff818a68a0 T ice_aq_get_sw_cfg +ffffffff818a6950 T ice_init_port_info +ffffffff818a69a0 T ice_get_initial_sw_cfg +ffffffff818a6b60 T ice_aq_query_sched_res +ffffffff818a6be0 T ice_sched_query_res_alloc +ffffffff818a6dc0 T ice_sched_get_psm_clk_freq +ffffffff818a6e30 T ice_aq_get_dflt_topo +ffffffff818a6ed0 T ice_sched_add_root_node +ffffffff818a6fb0 T ice_sched_find_node_by_teid +ffffffff818a7090 T ice_sched_get_tc_node +ffffffff818a7100 T ice_aqc_send_sched_elem_cmd +ffffffff818a71a0 T ice_aq_query_sched_elems +ffffffff818a7240 T ice_sched_query_elem +ffffffff818a72e0 T ice_sched_add_node +ffffffff818a74b0 T ice_aq_delete_sched_elems +ffffffff818a7550 T ice_sched_remove_elems +ffffffff818a76e0 T ice_sched_get_first_node +ffffffff818a7720 T ice_free_sched_node +ffffffff818a7980 T ice_rm_dflt_leaf_node +ffffffff818a7af0 T ice_sched_rm_dflt_nodes +ffffffff818a7b80 T ice_sched_init_port +ffffffff818a7f20 T ice_aq_rl_profile +ffffffff818a7fc0 T ice_aq_remove_rl_profile +ffffffff818a8060 T ice_sched_del_rl_profile +ffffffff818a8160 T ice_sched_clear_rl_prof +ffffffff818a82f0 T ice_sched_clear_tx_topo +ffffffff818a8360 T ice_sched_clear_port +ffffffff818a83e0 T ice_sched_cleanup_all +ffffffff818a84a0 T ice_is_fw_min_ver +ffffffff818a8500 T ice_is_fw_api_min_ver +ffffffff818a8550 T ice_fw_supports_report_dflt_cfg +ffffffff818a85a0 T ice_fw_supports_link_override +ffffffff818a85f0 T ice_dump_phy_type +ffffffff818a8620 T ice_phy_maps_to_media +ffffffff818a8680 T ice_set_media_type +ffffffff818a8820 T ice_aq_get_phy_caps +ffffffff818a8970 T ice_aq_get_link_info +ffffffff818a8b50 T ice_cfg_rl_burst_size +ffffffff818a8be0 T ice_init_def_sw_recp +ffffffff818a8d90 T ice_init_fltr_mgmt_struct +ffffffff818a8e50 T ice_aq_manage_mac_read +ffffffff818a8f70 T ice_rem_sw_rule_info +ffffffff818a9010 T ice_rm_sw_replay_rule_info +ffffffff818a9110 T ice_cleanup_fltr_mgmt_single +ffffffff818a9470 T ice_cleanup_fltr_mgmt_struct +ffffffff818a9490 T ice_is_fw_auto_drop_supported +ffffffff818a94d0 T ice_fill_tx_timer_and_fc_thresh +ffffffff818a9570 T ice_aq_set_mac_cfg +ffffffff818a9690 T ice_vsig_free +ffffffff818a97e0 T ice_free_vsig_tbl +ffffffff818a98a0 T ice_free_prof_map +ffffffff818a9970 T ice_free_flow_profs +ffffffff818a9a40 T ice_free_hw_tbls +ffffffff818a9de0 T ice_init_flow_profs +ffffffff818a9e30 T ice_init_hw_tbls +ffffffff818aa340 T ice_init_hw +ffffffff818aaac0 T ice_deinit_hw +ffffffff818aabe0 T ice_rxfill +ffffffff818aaf50 T ice_aq_manage_mac_write +ffffffff818aafe0 T ice_update_laa_mac +ffffffff818ab150 T ice_add_mac_to_list +ffffffff818ab220 T ice_free_fltr_list +ffffffff818ab2c0 T ice_find_rule_entry +ffffffff818ab350 T ice_fill_sw_info +ffffffff818ab3f0 T ice_fill_sw_rule +ffffffff818ab700 T ice_aq_sw_rules +ffffffff818ab7d0 T ice_create_pkt_fwd_rule +ffffffff818ab9c0 T ice_aq_alloc_free_res +ffffffff818aba70 T ice_aq_alloc_free_vsi_list +ffffffff818abbd0 T ice_update_vsi_list_rule +ffffffff818abde0 T ice_create_vsi_list_rule +ffffffff818abf70 T ice_update_pkt_fwd_rule +ffffffff818ac090 T ice_create_vsi_list_map +ffffffff818ac1d0 T ice_add_marker_act +ffffffff818ac390 T ice_add_update_vsi_list +ffffffff818ac740 T ice_add_rule_internal +ffffffff818ac8a0 T ice_add_mac_rule +ffffffff818accb0 T ice_add_mac +ffffffff818acd00 T ice_add_vsi_mac_filter +ffffffff818acee0 T ice_cfg_pf_default_mac_filters +ffffffff818acf60 T ice_init_tx_tracking +ffffffff818ad000 T ice_setup_tx_ctx +ffffffff818ad0a0 T ice_get_vsi_ctx +ffffffff818ad0e0 T ice_get_lan_q_ctx +ffffffff818ad150 T ice_sched_find_node_in_subtree +ffffffff818ad1f0 T ice_sched_get_free_qgrp +ffffffff818ad2b0 T ice_sched_get_qgrp_layer +ffffffff818ad2e0 T ice_sched_get_vsi_layer +ffffffff818ad320 T ice_sched_get_free_qparent +ffffffff818ad4a0 T ice_aq_add_lan_txq +ffffffff818ad650 T ice_aq_add_sched_elems +ffffffff818ad6f0 T ice_aq_cfg_sched_elems +ffffffff818ad790 T ice_sched_update_elem +ffffffff818ad880 T ice_sched_replay_node_prio +ffffffff818ad9c0 T ice_sched_rm_unused_rl_prof +ffffffff818adb30 T ice_sched_get_rl_prof_layer +ffffffff818adc00 T ice_sched_get_node_rl_prof_id +ffffffff818adc60 T ice_sched_cfg_node_bw_lmt +ffffffff818ade30 T ice_sched_rm_rl_profile +ffffffff818adfa0 T ice_sched_set_node_bw_dflt +ffffffff818ae0c0 T ice_aq_add_rl_profile +ffffffff818ae160 T ice_sched_calc_wakeup +ffffffff818ae230 T ice_sched_bw_to_rl_profile +ffffffff818ae3e0 T ice_sched_add_rl_profile +ffffffff818ae730 T ice_sched_set_node_bw +ffffffff818ae880 T ice_sched_set_node_bw_lmt +ffffffff818aeae0 T ice_sched_cfg_node_bw_alloc +ffffffff818aec70 T ice_sched_replay_node_bw +ffffffff818af1d0 t ice_is_any_bit_set +ffffffff818af340 T ice_sched_replay_q_bw +ffffffff818af3c0 T ice_ena_vsi_txq +ffffffff818af5e0 T ice_cfg_vsi_for_tx +ffffffff818af8b0 T ice_aq_dis_lan_txq +ffffffff818afa80 T ice_dis_vsi_txq +ffffffff818afdf0 T ice_vsi_disable_tx +ffffffff818b0120 T ice_copy_rxq_ctx_to_hw +ffffffff818b0310 T ice_write_rxq_ctx +ffffffff818b03c0 T ice_setup_rx_ctx +ffffffff818b05c0 T ice_cfg_vsi_for_rx +ffffffff818b0640 T ice_is_rxq_ready +ffffffff818b0830 T ice_control_rx_queue +ffffffff818b09d0 T ice_control_all_rx_queues +ffffffff818b0a40 T ice_configure_rxq_interrupt +ffffffff818b0ac0 T ice_configure_all_rxq_interrupts +ffffffff818b0b90 T ice_configure_rx_itr +ffffffff818b0c50 T ice_set_default_promisc_mask +ffffffff818b0c80 T ice_set_vsi_promisc +ffffffff818b1010 T ice_vsi_uses_fltr +ffffffff818b1070 T ice_add_entry_to_vsi_fltr_list +ffffffff818b1170 T ice_determine_promisc_mask +ffffffff818b1240 T ice_remove_vsi_list_rule +ffffffff818b1370 T ice_rem_update_vsi_list +ffffffff818b1960 T ice_remove_rule_internal +ffffffff818b1bd0 T ice_remove_promisc +ffffffff818b1c60 T ice_clear_vsi_promisc +ffffffff818b2070 T ice_if_promisc_set +ffffffff818b21b0 T ice_enable_intr +ffffffff818b21f0 T ice_disable_intr +ffffffff818b2230 T ice_copy_phy_caps_to_cfg +ffffffff818b22c0 T ice_sysctl_speeds_to_aq_phy_types +ffffffff818b23a0 T ice_aq_phy_types_to_link_speeds +ffffffff818b2460 T ice_apply_supported_speed_filter +ffffffff818b24f0 T ice_intersect_phy_types_and_speeds +ffffffff818b27b0 T ice_apply_saved_phy_req_to_cfg +ffffffff818b2a10 T ice_get_pfa_module_tlv +ffffffff818b2b60 T ice_get_link_default_override +ffffffff818b2dd0 T ice_fw_supports_fec_dis_auto +ffffffff818b2e50 T ice_cfg_phy_fec +ffffffff818b3120 T ice_apply_saved_fec_req_to_cfg +ffffffff818b3180 T ice_apply_saved_fc_req_to_cfg +ffffffff818b31e0 T ice_caps_to_fc_mode +ffffffff818b3230 T ice_caps_to_fec_mode +ffffffff818b3290 T ice_aq_set_phy_cfg +ffffffff818b3390 T ice_apply_saved_phy_cfg +ffffffff818b37a0 T ice_aq_set_link_restart_an +ffffffff818b3860 T ice_set_link +ffffffff818b39f0 T ice_up +ffffffff818b3ee0 T ice_find_ucast_rule_entry +ffffffff818b3f80 T ice_remove_mac_rule +ffffffff818b4100 T ice_remove_mac +ffffffff818b4120 T ice_remove_vsi_mac_filter +ffffffff818b4290 T ice_rm_pf_default_mac_filters +ffffffff818b4310 T ice_flush_rxq_interrupts +ffffffff818b46b0 T ice_flush_txq_interrupts +ffffffff818b4a50 T ice_down +ffffffff818b4ce0 T ice_ioctl +ffffffff818b4e60 T ice_tx_setup_offload +ffffffff818b4f30 T ice_start +ffffffff818b5390 T ice_watchdog +ffffffff818b53b0 T ice_media_change +ffffffff818b5410 T ice_get_phy_type_low +ffffffff818b5820 T ice_get_phy_type_high +ffffffff818b5880 T ice_media_status +ffffffff818b5970 T ice_add_media_types +ffffffff818b5c40 T ice_is_fw_health_report_supported +ffffffff818b5c90 T ice_init_device_features +ffffffff818b5e20 T ice_aq_send_driver_ver +ffffffff818b5f00 T ice_send_version +ffffffff818b6060 T ice_reinit_hw +ffffffff818b60a0 T ice_cfg_tx_topo +ffffffff818b60d0 T pkg_ver_empty +ffffffff818b6120 T ice_active_pkg_version_str +ffffffff818b6260 T ice_os_pkg_version_str +ffffffff818b6390 T ice_is_init_pkg_successful +ffffffff818b63d0 T ice_pkg_ver_compatible +ffffffff818b6420 T ice_log_pkg_init +ffffffff818b6720 T ice_copy_and_init_pkg +ffffffff818b6750 T ice_load_pkg_file +ffffffff818b6790 T ice_aq_set_event_mask +ffffffff818b6820 T ice_init_link_events +ffffffff818b6960 T ice_pkg_get_supported_vlan_mode +ffffffff818b6990 T ice_pkg_supports_dvm +ffffffff818b69c0 T ice_aq_get_vlan_mode +ffffffff818b6a50 T ice_fw_supports_dvm +ffffffff818b6b50 T ice_is_dvm_supported +ffffffff818b6b80 T ice_aq_set_port_params +ffffffff818b6c20 T ice_aq_set_vlan_mode +ffffffff818b6cd0 T ice_set_svm +ffffffff818b6e20 T ice_set_vlan_mode +ffffffff818b6e50 T ice_nvm_version_str +ffffffff818b6fb0 T ice_print_nvm_version +ffffffff818b7120 T ice_setup_scctx +ffffffff818b7270 T ice_resmgr_init +ffffffff818b72f0 T ice_resmgr_init_contig_only +ffffffff818b7370 T ice_resmgr_destroy +ffffffff818b7520 T ice_resmgr_assign_contiguous +ffffffff818b7740 T ice_alloc_intr_tracking +ffffffff818b7890 T ice_resmgr_release_map +ffffffff818b7910 T ice_free_intr_tracking +ffffffff818b79f0 T ice_setup_vsi_common +ffffffff818b7a60 T ice_setup_pf_vsi +ffffffff818b7ae0 T ice_alloc_vsi_qmap +ffffffff818b7d50 T ice_vsig_find_vsi +ffffffff818b7db0 T ice_vsig_prof_id_count +ffffffff818b7e10 T ice_vsig_get_ref +ffffffff818b7e90 T ice_gen_key_word +ffffffff818b7f70 T ice_bits_max_set +ffffffff818b8040 T ice_set_key +ffffffff818b82c0 T ice_prof_gen_key +ffffffff818b8390 T ice_tcam_write_entry +ffffffff818b84b0 T ice_tcam_ent_rsrc_type +ffffffff818b8500 T ice_alloc_hw_res +ffffffff818b8670 T ice_free_hw_res +ffffffff818b87a0 T ice_free_tcam_ent +ffffffff818b88c0 T ice_rel_tcam_idx +ffffffff818b8ad0 T ice_rem_prof_id +ffffffff818b8b80 T ice_rem_vsig +ffffffff818b8de0 T ice_rem_prof_id_vsig +ffffffff818b8f90 T ice_rem_chg_tcam_ent +ffffffff818b9040 T ice_alloc_tcam_ent +ffffffff818b9180 T ice_prof_tcam_ena_dis +ffffffff818b9570 T ice_adj_prof_priorities +ffffffff818b9850 T ice_get_profs_vsig +ffffffff818b9990 T ice_rem_prof_from_list +ffffffff818b9a30 T ice_vsig_remove_vsi +ffffffff818b9b10 T ice_vsig_add_mv_vsi +ffffffff818b9ca0 T ice_move_vsi +ffffffff818b9de0 T ice_vsig_alloc_val +ffffffff818b9e60 T ice_vsig_alloc +ffffffff818b9f30 T ice_has_prof_vsig +ffffffff818b9fa0 T ice_search_prof_id +ffffffff818b9ff0 T ice_add_prof_id_vsig +ffffffff818ba590 T ice_create_vsig_from_lst +ffffffff818ba7e0 T ice_upd_prof_hw +ffffffff818ba840 T ice_match_prop_lst +ffffffff818ba8c0 T ice_find_dup_props_vsig +ffffffff818ba9e0 T ice_rem_prof_id_flow +ffffffff818bae50 T ice_flow_disassoc_prof +ffffffff818baef0 T ice_flow_find_prof_id +ffffffff818baf40 T ice_rem_flow_all +ffffffff818bb0a0 T ice_prof_inc_ref +ffffffff818bb100 T ice_write_es +ffffffff818bb1a0 T ice_prof_id_rsrc_type +ffffffff818bb1f0 T ice_free_prof_id +ffffffff818bb310 T ice_prof_dec_ref +ffffffff818bb4c0 T ice_rem_prof +ffffffff818bb5c0 T ice_flow_rem_prof_sync +ffffffff818bb740 T ice_flow_rem_prof +ffffffff818bb7a0 T ice_rem_vsi_rss_cfg +ffffffff818bba30 T ice_rem_vsi_rss_list +ffffffff818bbc20 T ice_clean_vsi_rss_cfg +ffffffff818bbcb0 T ice_remove_vsi_mirroring +ffffffff818bbcd0 T ice_sched_get_vsi_node +ffffffff818bbd60 T ice_sched_is_leaf_node_present +ffffffff818bbdf0 T ice_sched_rm_agg_vsi_info +ffffffff818bbe10 T ice_sched_rm_vsi_cfg +ffffffff818bc020 T ice_rm_vsi_lan_cfg +ffffffff818bc040 T ice_aq_free_vsi +ffffffff818bc100 T ice_clear_vsi_q_ctx +ffffffff818bc1d0 T ice_clear_vsi_ctx +ffffffff818bc2c0 T ice_free_vsi +ffffffff818bc470 T ice_deinit_vsi +ffffffff818bc610 T ice_free_vsi_qmaps +ffffffff818bc760 T ice_release_vsi +ffffffff818bc8c0 T ice_transition_recovery_mode +ffffffff818bca00 T ice_clear_hw_tbls +ffffffff818bcd70 T ice_prepare_for_reset +ffffffff818bcf70 T ice_configure_misc_interrupts +ffffffff818bd080 T ice_request_stack_reinit +ffffffff818bd0a0 T ice_rebuild_recovery_mode +ffffffff818bd230 T ice_clean_all_vsi_rss_cfg +ffffffff818bd350 T ice_reset_pf_stats +ffffffff818bd370 T ice_rebuild_pf_vsi_qmap +ffffffff818bd540 T ice_set_default_vsi_ctx +ffffffff818bd610 T ice_set_rss_vsi_ctx +ffffffff818bd650 T ice_vsi_set_rss_params +ffffffff818bd6a0 T ice_setup_vsi_qmap +ffffffff818bd830 T ice_aq_add_vsi +ffffffff818bd910 T ice_add_vsi +ffffffff818bdb00 T ice_aq_suspend_sched_elems +ffffffff818bdba0 T ice_aq_resume_sched_elems +ffffffff818bdc40 T ice_sched_suspend_resume_elems +ffffffff818bdde0 T ice_sched_calc_vsi_support_nodes +ffffffff818bdec0 T ice_sched_add_elems +ffffffff818be1d0 T ice_sched_add_nodes_to_hw_layer +ffffffff818be290 T ice_sched_add_nodes_to_layer +ffffffff818be470 T ice_sched_add_vsi_support_nodes +ffffffff818be5d0 T ice_sched_add_vsi_to_topo +ffffffff818be740 T ice_alloc_lan_q_ctx +ffffffff818be8b0 T ice_sched_calc_vsi_child_nodes +ffffffff818be940 T ice_sched_add_vsi_child_nodes +ffffffff818beb20 T ice_sched_update_vsi_child_nodes +ffffffff818bed30 T ice_sched_cfg_vsi +ffffffff818bf110 T ice_cfg_vsi_qs +ffffffff818bf240 T ice_cfg_vsi_lan +ffffffff818bf360 T ice_reset_vsi_stats +ffffffff818bf380 T ice_initialize_vsi +ffffffff818bf7b0 T ice_sched_replay_agg +ffffffff818bf7e0 T ice_replay_post +ffffffff818bf8e0 T ice_is_main_vsi +ffffffff818bf920 T ice_replay_pre_init +ffffffff818bf950 T ice_replay_rss_cfg +ffffffff818bf980 T ice_find_vsi_list_entry +ffffffff818bfa50 T ice_add_vlan_internal +ffffffff818bfed0 T ice_replay_vsi_fltr +ffffffff818c00f0 T ice_replay_vsi_all_fltr +ffffffff818c01b0 T ice_sched_replay_vsi_agg +ffffffff818c01e0 T ice_replay_vsi_agg +ffffffff818c0210 T ice_replay_vsi +ffffffff818c0260 T ice_replay_all_vsi_cfg +ffffffff818c0410 T ice_aq_set_health_status_config +ffffffff818c0490 T ice_init_health_events +ffffffff818c05a0 T ice_fw_supports_lldp_fltr_ctrl +ffffffff818c0600 T ice_add_ethertype_to_list +ffffffff818c0700 T ice_lldp_fltr_add_remove +ffffffff818c0790 T ice_add_eth_mac_rule +ffffffff818c0830 T ice_add_eth_mac +ffffffff818c08f0 T ice_add_rx_lldp_filter +ffffffff818c0b40 T ice_update_link_info +ffffffff818c0cd0 T ice_get_link_status +ffffffff818c0d50 T ice_set_default_local_mib_settings +ffffffff818c0e40 T ice_add_ieee_ets_common_tlv +ffffffff818c0f30 T ice_add_ieee_ets_tlv +ffffffff818c1050 T ice_add_ieee_etsrec_tlv +ffffffff818c1160 T ice_add_ieee_pfc_tlv +ffffffff818c11d0 T ice_add_ieee_app_pri_tlv +ffffffff818c1290 T ice_add_dscp_up_tlv +ffffffff818c1320 T ice_add_dscp_enf_tlv +ffffffff818c13e0 T ice_add_dscp_tc_bw_tlv +ffffffff818c1490 T ice_add_dscp_pfc_tlv +ffffffff818c14e0 T ice_add_dcb_tlv +ffffffff818c1970 T ice_dcb_cfg_to_lldp +ffffffff818c1a70 T ice_aq_set_lldp_mib +ffffffff818c1b10 T ice_set_dcb_cfg +ffffffff818c1cf0 T ice_set_default_local_lldp_mib +ffffffff818c1e80 T ice_aq_speed_to_rate +ffffffff818c1f70 T ice_update_link_status +ffffffff818c21b0 T ice_aq_get_set_rss_key +ffffffff818c2260 T ice_aq_set_rss_key +ffffffff818c2320 T ice_set_rss_key +ffffffff818c2440 T ice_get_rss_hdr_type +ffffffff818c24b0 T ice_add_rss_list +ffffffff818c2700 T ice_flow_val_hdrs +ffffffff818c2820 T ice_flow_proc_seg_hdrs +ffffffff818c2f40 T ice_flow_xtract_fld +ffffffff818c3210 T ice_flow_create_xtrct_seq +ffffffff818c33d0 T ice_flow_proc_segs +ffffffff818c3450 T ice_find_prof_id +ffffffff818c3520 T ice_alloc_prof_id +ffffffff818c3670 T ice_ptg_find_ptype +ffffffff818c36d0 T ice_add_prof +ffffffff818c3c40 T ice_flow_add_prof_sync +ffffffff818c3f10 T ice_get_prof +ffffffff818c4080 T ice_add_prof_to_lst +ffffffff818c41a0 T ice_find_prof_vsig +ffffffff818c4390 T ice_create_prof_id_vsig +ffffffff818c4650 T ice_add_prof_id_flow +ffffffff818c4d20 T ice_flow_assoc_prof +ffffffff818c4dc0 T ice_flow_set_fld_ext +ffffffff818c4e40 T ice_flow_set_fld +ffffffff818c4ec0 T ice_flow_set_rss_seg_info +ffffffff818c50b0 T ice_flow_find_prof_conds +ffffffff818c5210 T ice_rem_rss_list +ffffffff818c5550 T ice_add_rss_cfg_sync +ffffffff818c59d0 t ice_flow_add_prof +ffffffff818c5b60 T ice_add_rss_cfg +ffffffff818c5c40 T ice_set_rss_flow_flds +ffffffff818c5f30 T ice_lut_type_to_size +ffffffff818c5f70 T ice_lut_size_to_flag +ffffffff818c5fc0 T ice_aq_get_set_rss_lut +ffffffff818c61a0 T ice_aq_set_rss_lut +ffffffff818c61c0 T ice_set_rss_lut +ffffffff818c62c0 T ice_config_rss +ffffffff818c6420 T ice_rebuild +ffffffff818c6b60 T ice_handle_reset_event +ffffffff818c6c80 T ice_handle_pf_reset_request +ffffffff818c6d70 T ice_handle_mdd_event +ffffffff818c7230 T ice_check_ctrlq_errors +ffffffff818c7490 T ice_process_link_event +ffffffff818c7670 T ice_info_fwlog +ffffffff818c76c0 T ice_fwlog_event_dump +ffffffff818c7710 T ice_handle_fw_log_event +ffffffff818c7760 T ice_debug_print_mib_change_event +ffffffff818c7790 T ice_aq_get_lldp_mib +ffffffff818c7870 T ice_parse_ieee_ets_common_tlv +ffffffff818c7960 T ice_parse_ieee_etscfg_tlv +ffffffff818c7a70 T ice_parse_ieee_etsrec_tlv +ffffffff818c7b60 T ice_parse_ieee_pfccfg_tlv +ffffffff818c7bb0 T ice_parse_ieee_app_tlv +ffffffff818c7c50 T ice_parse_ieee_tlv +ffffffff818c7f00 T ice_parse_cee_pgcfg_tlv +ffffffff818c8050 T ice_parse_cee_pfccfg_tlv +ffffffff818c8090 T ice_parse_cee_app_tlv +ffffffff818c81d0 T ice_parse_cee_tlv +ffffffff818c83b0 T ice_parse_org_tlv +ffffffff818c8400 T ice_lldp_to_dcb_cfg +ffffffff818c8530 T ice_aq_get_dcb_cfg +ffffffff818c8730 T ice_cee_to_dcb_cfg +ffffffff818c8ad0 T ice_get_dcb_cfg_from_mib_change +ffffffff818c8c70 T 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iwm_ridx2rate +ffffffff8195bfe0 T iwm_ack_rates +ffffffff8195c2a0 T iwm_mac_ctxt_cmd_common +ffffffff8195c5c0 T iwm_mac_ctxt_cmd_fill_sta +ffffffff8195c680 T iwm_update_quotas +ffffffff8195ca50 T iwm_del_task +ffffffff8195cab0 T iwm_scan +ffffffff8195cd70 T iwm_scan_abort +ffffffff8195ceb0 T iwm_bgscan +ffffffff8195cf60 T iwm_bgscan_done +ffffffff8195d030 T iwm_bgscan_done_task +ffffffff8195d2c0 T iwm_umac_scan_abort +ffffffff8195d360 T iwm_lmac_scan_abort +ffffffff8195d400 T iwm_auth +ffffffff8195d7f0 T iwm_deauth +ffffffff8195dbc0 T iwm_run +ffffffff8195e1a0 T iwm_allow_mcast +ffffffff8195e2c0 T iwm_run_stop +ffffffff8195e990 T iwm_node_alloc +ffffffff8195e9b0 T iwm_set_key_v1 +ffffffff8195eb00 T iwm_set_key +ffffffff8195ed90 T iwm_delete_key_v1 +ffffffff8195eed0 T iwm_delete_key +ffffffff8195f160 T iwm_calib_timeout +ffffffff8195f230 T iwm_set_rate_table_vht +ffffffff8195f590 T iwm_set_rate_table +ffffffff8195f960 T iwm_media_change +ffffffff8195fb70 T iwm_stop +ffffffff819600a0 T iwm_init +ffffffff819603c0 T iwm_newstate_task +ffffffff81960590 T iwm_newstate +ffffffff81960740 T iwm_endscan +ffffffff81960790 T iwm_fill_sf_command +ffffffff81960860 T iwm_send_soc_conf +ffffffff819609b0 T iwm_send_update_mcc_cmd +ffffffff81960b70 T iwm_send_temp_report_ths_cmd +ffffffff81960c50 T iwm_tt_tx_backoff +ffffffff81960cf0 T iwm_fill_paging_mem +ffffffff819610a0 T iwm_alloc_fw_paging_mem +ffffffff819614d0 T iwm_init_hw +ffffffff81961cd0 T iwm_preinit +ffffffff81961ed0 T iwm_start +ffffffff819620c0 T iwm_watchdog +ffffffff81962290 T iwm_nic_error +ffffffff81962900 T iwm_dump_driver_status +ffffffff819629c0 T iwm_ioctl +ffffffff81962b60 T iwm_nic_umac_error +ffffffff81963100 T iwm_desc_lookup +ffffffff81963290 T iwm_rx_pkt_valid +ffffffff819632e0 T iwm_rx_pkt +ffffffff81964230 T iwm_notif_intr +ffffffff819643c0 T iwm_intr +ffffffff81964880 T iwm_intr_msix +ffffffff81964b90 T iwm_match +ffffffff81964bc0 T iwm_attach_hook +ffffffff81964c00 T iwm_attach +ffffffff81965ba0 T iwm_radiotap_attach +ffffffff81965c40 T iwm_init_task +ffffffff81965d30 T iwm_resume +ffffffff81965eb0 T iwm_wakeup +ffffffff81965f80 T iwm_activate +ffffffff81967000 T iwx_lookup_cmd_ver +ffffffff81967070 T iwx_lookup_notif_ver +ffffffff819670e0 T iwx_is_mimo_ht_plcp +ffffffff81967120 T iwx_store_cscheme +ffffffff81967170 T iwx_ctxt_info_alloc_dma +ffffffff81967220 T iwx_dma_contig_alloc +ffffffff81967470 T iwx_ctxt_info_free_paging +ffffffff81967600 T iwx_dma_contig_free +ffffffff819676f0 T iwx_get_num_sections +ffffffff81967770 T iwx_init_fw_sec +ffffffff81967c00 T iwx_fw_version_str +ffffffff81967c40 T iwx_alloc_fw_monitor_block +ffffffff81967cf0 T iwx_alloc_fw_monitor +ffffffff81967dc0 T iwx_apply_debug_destination +ffffffff81968390 T iwx_nic_lock +ffffffff81968510 T iwx_write_prph +ffffffff819685c0 T iwx_set_bits_prph +ffffffff819685e0 T iwx_clear_bits_prph +ffffffff81968600 T iwx_read_prph +ffffffff819686a0 T iwx_nic_unlock +ffffffff81968760 T iwx_set_ltr +ffffffff819688c0 T iwx_ctxt_info_init +ffffffff81968c20 T iwx_ctxt_info_free_fw_img +ffffffff81968dd0 T iwx_ctxt_info_gen3_init +ffffffff81969520 T iwx_write_umac_prph +ffffffff819695d0 T iwx_firmware_store_section +ffffffff81969670 T iwx_set_default_calib +ffffffff819696c0 T iwx_fw_info_free +ffffffff81969770 T iwx_read_firmware +ffffffff8196a2e0 T iwx_prph_addr_mask +ffffffff8196a320 T iwx_read_prph_unlocked +ffffffff8196a3a0 T iwx_nic_assert_locked +ffffffff8196a400 T iwx_write_prph_unlocked +ffffffff8196a490 T iwx_write_prph64 +ffffffff8196a5d0 T iwx_read_umac_prph_unlocked +ffffffff8196a660 T iwx_read_umac_prph +ffffffff8196a710 T iwx_write_umac_prph_unlocked +ffffffff8196a7a0 T iwx_read_mem +ffffffff8196a900 T iwx_write_mem +ffffffff8196aa70 T iwx_write_mem32 +ffffffff8196aba0 T iwx_poll_bit +ffffffff8196ac90 T iwx_set_bits_mask_prph +ffffffff8196aec0 T iwx_alloc_rx_ring +ffffffff8196b0d0 T iwx_rx_addbuf +ffffffff8196b320 T iwx_free_rx_ring +ffffffff8196b690 T iwx_disable_rx_dma +ffffffff8196b920 T iwx_reset_rx_ring +ffffffff8196b9c0 T iwx_alloc_tx_ring +ffffffff8196bc00 T iwx_free_tx_ring +ffffffff8196bf60 T iwx_reset_tx_ring +ffffffff8196c200 T iwx_enable_rfkill_int +ffffffff8196c300 T iwx_check_rfkill +ffffffff8196c390 T iwx_enable_interrupts +ffffffff8196c450 T iwx_enable_fwload_interrupt +ffffffff8196c540 T iwx_restore_interrupts +ffffffff8196c570 T iwx_disable_interrupts +ffffffff8196c640 T iwx_ict_reset +ffffffff8196c850 T iwx_set_hw_ready +ffffffff8196cab0 T iwx_prepare_card_hw +ffffffff8196cc30 T iwx_force_power_gating +ffffffff8196cd00 T iwx_apm_config +ffffffff8196ce00 T iwx_apm_init +ffffffff8196d0f0 T iwx_apm_stop +ffffffff8196d5d0 T iwx_init_msix_hw +ffffffff8196d690 T iwx_conf_msix_hw +ffffffff8196dd60 T iwx_clear_persistence_bit +ffffffff8196df20 T iwx_start_hw +ffffffff8196e400 T iwx_stop_device +ffffffff8196ebe0 T iwx_nic_config +ffffffff8196ec70 T iwx_nic_rx_init +ffffffff8196ecd0 T iwx_nic_init +ffffffff8196ee20 T iwx_enable_txq +ffffffff8196f140 T iwx_send_cmd +ffffffff8196f790 T iwx_free_resp +ffffffff8196f810 T iwx_disable_txq +ffffffff8196fa80 T iwx_post_alive +ffffffff8196fb20 T iwx_schedule_session_protection +ffffffff8196fc00 T iwx_send_cmd_pdu +ffffffff8196fc90 T iwx_unprotect_session +ffffffff8196fd70 T iwx_fw_valid_tx_ant +ffffffff8196fdc0 T iwx_fw_valid_rx_ant +ffffffff8196fe10 T iwx_init_channel_map +ffffffff81970020 T iwx_mimo_enabled +ffffffff81970060 T iwx_setup_ht_rates +ffffffff81970110 T iwx_setup_vht_rates +ffffffff819701a0 T iwx_init_reorder_buffer +ffffffff81970200 T iwx_clear_reorder_buffer +ffffffff819702d0 T iwx_rx_ba_session_expired +ffffffff81970400 T iwx_rx_bar_frame_release +ffffffff819704b0 T iwx_release_frames +ffffffff819706c0 T iwx_reorder_timer_expired +ffffffff819708b0 T iwx_find_rxba_data +ffffffff81970940 T iwx_sta_rx_agg_baid_cfg_cmd +ffffffff81970b90 T iwx_send_cmd_pdu_status +ffffffff81970c20 T iwx_sta_rx_agg_sta_cmd +ffffffff81970e80 T iwx_sta_rx_agg +ffffffff819711a0 T iwx_mac_ctxt_task +ffffffff81971360 T iwx_mac_ctxt_cmd +ffffffff819715b0 T iwx_phy_ctxt_task +ffffffff81971780 T iwx_phy_ctxt_update +ffffffff81971c10 T iwx_updatechan +ffffffff81971cf0 T iwx_add_task +ffffffff81971d80 T iwx_updateprot +ffffffff81971e60 T iwx_updateslot +ffffffff81971f40 T iwx_updateedca +ffffffff81972020 T iwx_updatedtim +ffffffff81972100 T iwx_sta_tx_agg_start +ffffffff81972330 T iwx_ba_task +ffffffff819724b0 T iwx_ampdu_rx_start +ffffffff819725b0 T iwx_ampdu_rx_stop +ffffffff819726b0 T iwx_ampdu_tx_start +ffffffff81972760 T iwx_set_mac_addr_from_csr +ffffffff819729c0 T iwx_flip_hw_address +ffffffff81972a10 T iwx_is_valid_mac_addr +ffffffff81972ac0 T iwx_nvm_get +ffffffff81972de0 T iwx_load_firmware +ffffffff81973010 T iwx_start_fw +ffffffff81973250 T iwx_pnvm_setup_fragmented +ffffffff81973590 T iwx_pnvm_setup +ffffffff819737b0 T iwx_pnvm_handle_section +ffffffff81973b60 T iwx_ctxt_info_gen3_set_pnvm +ffffffff81973c40 T iwx_pnvm_parse +ffffffff81973d30 T iwx_load_pnvm +ffffffff819741c0 T iwx_send_tx_ant_cfg +ffffffff81974260 T iwx_send_phy_cfg_cmd +ffffffff81974310 T iwx_send_dqa_cmd +ffffffff819743b0 T iwx_load_ucode_wait_alive +ffffffff819744a0 T iwx_run_init_mvm_ucode +ffffffff81974780 T iwx_config_ltr +ffffffff81974840 T iwx_update_rx_desc +ffffffff819748e0 T iwx_rxmq_get_signal_strength +ffffffff81974930 T iwx_rx_rx_phy_cmd +ffffffff819749a0 T iwx_get_noise +ffffffff81974a10 T iwx_ccmp_decap +ffffffff81974b70 T iwx_rx_hwdecrypt +ffffffff81974c80 T iwx_rx_frame +ffffffff81974f60 T iwx_detect_duplicate +ffffffff81975080 T iwx_is_sn_less +ffffffff819750e0 T iwx_oldsn_workaround +ffffffff819751b0 T iwx_rx_reorder +ffffffff81975780 T iwx_rx_mpdu_mq +ffffffff81975b00 T iwx_clear_tx_desc +ffffffff81975ca0 T iwx_txd_done +ffffffff81975d90 T iwx_txq_advance +ffffffff819760e0 T iwx_tx_update_byte_tbl +ffffffff81976180 T iwx_rx_tx_cmd +ffffffff81976300 T iwx_clear_oactive +ffffffff81976380 T iwx_rx_compressed_ba +ffffffff81976510 T iwx_rx_bmiss +ffffffff81976620 T iwx_binding_cmd +ffffffff819767c0 T iwx_get_vht_ctrl_pos +ffffffff81976830 T iwx_phy_ctxt_cmd_uhb_v3_v4 +ffffffff81976aa0 T iwx_phy_ctxt_cmd_v3_v4 +ffffffff81976d10 T iwx_phy_ctxt_cmd +ffffffff81976e30 T iwx_send_cmd_status +ffffffff81976f60 T iwx_cmd_done +ffffffff81977070 T iwx_fw_rateidx_ofdm +ffffffff819770d0 T iwx_fw_rateidx_cck +ffffffff81977130 T iwx_tx_fill_cmd +ffffffff819773d0 T iwx_rval2ridx +ffffffff81977460 T iwx_tx +ffffffff81977c60 T iwx_flush_sta_tids +ffffffff81977e30 T iwx_drain_sta +ffffffff81977ff0 T iwx_flush_sta +ffffffff81978330 T iwx_beacon_filter_send_cmd +ffffffff819783c0 T iwx_update_beacon_abort +ffffffff819784d0 T iwx_power_build_cmd +ffffffff81978560 T iwx_power_mac_update_mode +ffffffff81978790 T iwx_power_update_device +ffffffff81978840 T iwx_enable_beacon_filter +ffffffff81978960 T iwx_disable_beacon_filter +ffffffff81978a60 T iwx_add_sta_cmd +ffffffff81978d80 T iwx_mld_add_sta_cmd +ffffffff81979140 T iwx_mld_modify_link_fill +ffffffff81979460 T iwx_ack_rates +ffffffff81979720 T iwx_rm_sta_cmd +ffffffff81979810 T iwx_mld_rm_sta_cmd +ffffffff819799f0 T iwx_rm_sta +ffffffff81979ed0 T iwx_disable_mgmt_queue +ffffffff81979fd0 T iwx_umac_scan_fill_channels +ffffffff8197a0f0 T iwx_fill_probe_req +ffffffff8197a360 T iwx_config_umac_scan_reduced +ffffffff8197a4d0 T iwx_scan_umac_flags_v2 +ffffffff8197a510 T iwx_scan_umac_dwell_v10 +ffffffff8197a580 T iwx_scan_umac_fill_general_p_v10 +ffffffff8197a610 T iwx_scan_umac_fill_ch_p_v6 +ffffffff8197a740 T iwx_umac_scan_v14 +ffffffff8197aa60 T iwx_mcc_update +ffffffff8197ab00 T iwx_ridx2rate +ffffffff8197ab70 T iwx_mac_ctxt_cmd_common +ffffffff8197ae90 T iwx_mac_ctxt_cmd_fill_sta +ffffffff8197af20 T iwx_mld_mac_ctxt_cmd +ffffffff8197b0b0 T iwx_clear_statistics +ffffffff8197b190 T iwx_del_task +ffffffff8197b1f0 T iwx_scan +ffffffff8197b3d0 T iwx_scan_abort +ffffffff8197b480 T iwx_bgscan +ffffffff8197b520 T iwx_bgscan_done +ffffffff8197b5f0 T iwx_bgscan_done_task +ffffffff8197b9a0 T iwx_umac_scan_abort +ffffffff8197ba40 T iwx_enable_mgmt_queue +ffffffff8197bad0 T iwx_rs_rval2idx +ffffffff8197bb40 T iwx_rs_ht_rates +ffffffff8197bc10 T iwx_rs_vht_rates +ffffffff8197bcd0 T iwx_rs_init_v3 +ffffffff8197c0e0 T iwx_rs_init_v4 +ffffffff8197c510 T iwx_rs_init +ffffffff8197c570 T iwx_rs_update +ffffffff8197c810 T iwx_phy_send_rlc +ffffffff8197c900 T iwx_auth +ffffffff8197cc10 T iwx_deauth +ffffffff8197ce40 T iwx_run +ffffffff8197d350 T iwx_sf_config +ffffffff8197d570 T iwx_allow_mcast +ffffffff8197d690 T iwx_run_stop +ffffffff8197d9c0 T iwx_node_alloc +ffffffff8197d9e0 T iwx_set_key +ffffffff8197db40 T iwx_mld_add_sta_key_cmd +ffffffff8197dd10 T iwx_add_sta_key_cmd +ffffffff8197df30 T iwx_add_sta_key +ffffffff8197e1e0 T iwx_setkey_task +ffffffff8197e2f0 T iwx_delete_key +ffffffff8197e490 T iwx_media_change +ffffffff8197e510 T iwx_stop +ffffffff8197ea50 T iwx_init +ffffffff8197ed70 T iwx_newstate_task +ffffffff8197ef00 T iwx_newstate +ffffffff8197f120 T iwx_endscan +ffffffff8197f170 T iwx_fill_sf_command +ffffffff8197f240 T iwx_send_bt_init_conf +ffffffff8197f2e0 T iwx_send_soc_conf +ffffffff8197f430 T iwx_send_update_mcc_cmd +ffffffff8197f5d0 T iwx_send_temp_report_ths_cmd +ffffffff8197f6b0 T iwx_init_hw +ffffffff8197fd60 T iwx_preinit +ffffffff8197ffa0 T iwx_start +ffffffff81980190 T iwx_watchdog +ffffffff819803b0 T iwx_nic_error +ffffffff81980a20 T iwx_dump_driver_status +ffffffff81980cc0 T iwx_ioctl +ffffffff81980e60 T iwx_nic_umac_error +ffffffff81981400 T iwx_desc_lookup +ffffffff81981590 T iwx_rx_pkt_valid +ffffffff819815e0 T iwx_rx_pkt +ffffffff81982800 T iwx_notif_intr +ffffffff81982980 T iwx_intr +ffffffff81982ea0 T iwx_intr_msix +ffffffff81983200 T iwx_match +ffffffff81983230 T iwx_attach_hook +ffffffff81983270 T iwx_find_device_cfg +ffffffff81983420 T iwx_attach +ffffffff819846f0 T iwx_radiotap_attach +ffffffff81984790 T iwx_init_task +ffffffff81984880 T iwx_resume +ffffffff81984a00 T iwx_wakeup +ffffffff81984b20 T iwx_activate +ffffffff81985000 T qwx_pci_match +ffffffff81985030 T qwx_pci_attach +ffffffff81985d30 T qwx_pci_detach +ffffffff81986000 T qwx_pci_init_qmi_ce_config +ffffffff81986020 T qwx_pcic_init_msi_config +ffffffff819860d0 T qwx_pci_alloc_msi +ffffffff819861d0 T qwx_pcic_map_service_to_pipe +ffffffff819862d0 T qwx_pcic_get_user_msi_vector +ffffffff819863c0 T qwx_pcic_read32 +ffffffff819864c0 T qwx_pcic_write32 +ffffffff819865d0 T qwx_pci_start +ffffffff819866f0 T qwx_pci_stop +ffffffff81986770 T qwx_pci_power_up +ffffffff819868d0 T qwx_pci_power_down +ffffffff81986b70 T qwx_mhi_submit_xfer +ffffffff81986e20 T qwx_pcic_ext_irq_enable +ffffffff81986e50 T qwx_pcic_ext_irq_disable +ffffffff81986e80 T qwx_pci_intr +ffffffff819871f0 T qwx_pci_intr_mhi_ctrl +ffffffff81987240 T qwx_pci_intr_mhi_data +ffffffff81987290 T qwx_pci_read_hw_version +ffffffff81987310 T qwx_pci_alloc_event_rings +ffffffff81987590 T qwx_pci_init_cmd_ring +ffffffff81987620 T qwx_mhi_register +ffffffff81987650 T qwx_pcic_config_irq +ffffffff81987900 T qwx_pci_attach_hook +ffffffff81987950 T qwx_pci_free_cmd_ring +ffffffff819879d0 T qwx_pci_free_event_rings +ffffffff81987ad0 T qwx_pci_free_xfer_rings +ffffffff81987b50 T qwx_pci_alloc_xfer_ring +ffffffff81987ea0 T qwx_pci_alloc_xfer_rings_qca6390 +ffffffff81987fd0 T qwx_pci_alloc_xfer_rings_qcn9074 +ffffffff81988100 T qwx_pci_alloc_event_ring +ffffffff819881f0 T qwx_pci_read +ffffffff81988220 T qwx_pci_write +ffffffff81988250 T qwx_pcic_ce_irq_enable +ffffffff81988290 T qwx_pcic_ce_irq_disable +ffffffff819882d0 T qwx_pcic_ext_grp_disable +ffffffff81988300 T qwx_pcic_ext_irq_config +ffffffff81988560 T qwx_pcic_ce_irqs_enable +ffffffff81988600 T qwx_pcic_ce_irqs_disable +ffffffff819886a0 T qwx_pci_aspm_restore +ffffffff81988720 T qwx_pcic_ce_irq_disable_sync +ffffffff819887c0 T qwx_pci_bus_wake_up +ffffffff81988860 T qwx_mhi_wake_db_clear_valid +ffffffff819888a0 T qwx_mhi_device_wake +ffffffff81988910 T qwx_pci_bus_release +ffffffff819889b0 T qwx_mhi_device_zzz +ffffffff81988a10 T qwx_pci_get_window_start +ffffffff81988a80 T qwx_pci_select_window +ffffffff81988b30 T qwx_pci_window_write32 +ffffffff81988c40 T qwx_pci_window_read32 +ffffffff81988d40 T qwx_pci_select_static_window +ffffffff81988d70 T qwx_pci_soc_global_reset +ffffffff819890a0 T qwx_pci_clear_dbg_registers +ffffffff81989440 T qwx_pci_set_link_reg +ffffffff81989720 T qwx_pci_fix_l1ss +ffffffff81989810 T qwx_pci_enable_ltssm +ffffffff81989c60 T qwx_pci_clear_all_intrs +ffffffff81989d60 T qwx_pci_set_wlaon_pwr_ctrl +ffffffff81989f20 T qwx_pci_force_wake +ffffffff8198a010 T qwx_pci_sw_reset +ffffffff8198a200 T qwx_mhi_clear_vector +ffffffff8198a2b0 T qwx_mhi_reset_device +ffffffff8198a440 T qwx_pci_msi_config +ffffffff8198a4b0 T qwx_pci_msi_enable +ffffffff8198a510 T qwx_pci_msi_disable +ffffffff8198a570 T qwx_pci_aspm_disable +ffffffff8198a610 T qwx_mhi_start +ffffffff8198a9b0 T qwx_mhi_stop +ffffffff8198a9d0 T qwx_mhi_unregister +ffffffff8198aa00 T qwx_mhi_ring_doorbell +ffffffff8198aa70 T qwx_mhi_init_xfer_rings +ffffffff8198ab70 T qwx_mhi_init_event_rings +ffffffff8198acc0 T qwx_mhi_init_cmd_ring +ffffffff8198ad40 T qwx_mhi_init_dev_ctxt +ffffffff8198af10 T qwx_pci_cmd_ring_get_elem +ffffffff8198af70 T qwx_mhi_cmd_ring_submit +ffffffff8198b0c0 T qwx_mhi_send_cmd +ffffffff8198b1a0 T qwx_pci_xfer_ring_get_elem +ffffffff8198b1f0 T qwx_pci_xfer_ring_get_data +ffffffff8198b240 T qwx_mhi_start_channel +ffffffff8198b550 T qwx_mhi_start_channels +ffffffff8198b680 T qwx_rddm_prepare +ffffffff8198b950 T qwx_mhi_fw_load_handler +ffffffff8198bbc0 T qwx_mhi_await_device_reset +ffffffff8198bc90 T qwx_mhi_fw_load_bhi +ffffffff8198bf30 T qwx_mhi_fw_load_bhie +ffffffff8198c300 T qwx_mhi_await_device_ready +ffffffff8198c4a0 T qwx_mhi_ready_state_transition +ffffffff8198c6a0 T qwx_mhi_init_mmio +ffffffff8198ca00 T qwx_mhi_set_state +ffffffff8198ca80 T qwx_mhi_mission_mode_state_transition +ffffffff8198cc00 T qwx_mhi_low_power_mode_state_transition +ffffffff8198cc70 T qwx_pci_event_ring_get_elem +ffffffff8198ccc0 T qwx_mhi_state_change +ffffffff8198d070 T qwx_pci_intr_ctrl_event_mhi +ffffffff8198d0b0 T qwx_pci_intr_ctrl_event_ee +ffffffff8198d0f0 T qwx_pci_intr_ctrl_event_cmd_complete +ffffffff8198d210 T qwx_pci_intr_ctrl_event +ffffffff8198d580 T qwx_pci_intr_data_event_tx +ffffffff8198d920 T qwx_pci_intr_data_event +ffffffff8198e000 T cmpci_match +ffffffff8198e030 T cmpci_attach +ffffffff8198e610 T cmpci_activate +ffffffff8198e6b0 T cmpci_open +ffffffff8198e6e0 T cmpci_close +ffffffff8198e710 T cmpci_set_params +ffffffff8198f2c0 T cmpci_round_blocksize +ffffffff8198f2f0 T cmpci_halt_output +ffffffff8198f530 T cmpci_halt_input +ffffffff8198f730 T cmpci_set_port +ffffffff8198f8a0 T cmpci_get_port +ffffffff8198f970 T cmpci_query_devinfo +ffffffff81990280 T cmpci_malloc +ffffffff819902e0 T cmpci_free +ffffffff819903d0 T cmpci_round_buffersize +ffffffff81990410 T cmpci_trigger_output +ffffffff819907a0 T cmpci_trigger_input +ffffffff81990af0 T cmpci_mixerreg_read +ffffffff81990ba0 T cmpci_mixerreg_write +ffffffff81990c30 T cmpci_reg_partial_write_1 +ffffffff81990cd0 T cmpci_reg_partial_write_4 +ffffffff81990d70 T cmpci_reg_set_1 +ffffffff81990df0 T cmpci_reg_clear_1 +ffffffff81990e70 T cmpci_reg_set_4 +ffffffff81990ef0 T cmpci_reg_clear_4 +ffffffff81990f70 T cmpci_reg_set_reg_misc +ffffffff81990fc0 T cmpci_reg_clear_reg_misc +ffffffff81991010 T cmpci_rate_to_index +ffffffff81991090 T cmpci_index_to_rate +ffffffff819910c0 T cmpci_index_to_divider +ffffffff819910f0 T cmpci_intr +ffffffff819914a0 T cmpci_set_mixer_gain +ffffffff81991d10 T cmpci_resume +ffffffff81991da0 T cmpci_alloc_dmamem +ffffffff81991fa0 T cmpci_free_dmamem +ffffffff81992090 T cmpci_find_dmamem +ffffffff819920f0 T cmpci_adjust +ffffffff81992140 T cmpci_set_out_ports +ffffffff819928a0 T cmpci_set_in_ports +ffffffff81993000 T iha_pci_probe +ffffffff81993060 T iha_pci_attach +ffffffff81994000 T pcscp_match +ffffffff81994040 T pcscp_attach +ffffffff819944d0 T pcscp_read_reg +ffffffff81994500 T pcscp_write_reg +ffffffff81994530 T pcscp_dma_isintr +ffffffff81994590 T pcscp_dma_reset +ffffffff81994600 T pcscp_dma_intr +ffffffff81994c50 T pcscp_dma_setup +ffffffff81994ef0 T pcscp_dma_go +ffffffff81995050 T pcscp_dma_stop +ffffffff819950f0 T pcscp_dma_isactive +ffffffff81996000 T bge_probe +ffffffff81996030 T bge_attach +ffffffff81997760 T bge_detach +ffffffff81997900 T bge_activate +ffffffff81997970 T bge_readmem_ind +ffffffff81997a40 T bge_writemem_ind +ffffffff81997b20 T bge_writereg_ind +ffffffff81997b80 T bge_writembx +ffffffff81997bd0 T bge_ape_lock_init +ffffffff81997e40 T bge_ape_read_fw_ver +ffffffff81997fc0 T bge_ape_lock +ffffffff819981b0 T bge_ape_unlock +ffffffff81998270 T bge_ape_send_event +ffffffff81998490 T bge_ape_driver_state_change +ffffffff819986d0 T bge_nvram_getbyte +ffffffff819989b0 T bge_read_nvram +ffffffff81998a70 T bge_eeprom_getbyte +ffffffff81998c60 T bge_read_eeprom +ffffffff81998d00 T bge_miibus_readreg +ffffffff81999050 T bge_miibus_writereg +ffffffff819993b0 T bge_miibus_statchg +ffffffff819995e0 T bge_newbuf +ffffffff819997a0 T bge_newbuf_jumbo +ffffffff81999a60 T bge_init_rx_ring_std +ffffffff81999bf0 T bge_fill_rx_ring_std +ffffffff81999d70 T bge_rxtick +ffffffff81999db0 T bge_rxtick_jumbo +ffffffff81999df0 T bge_fill_rx_ring_jumbo +ffffffff81999f70 T bge_free_rx_ring_std +ffffffff8199a0c0 T bge_init_rx_ring_jumbo +ffffffff8199a2c0 T bge_free_rx_ring_jumbo +ffffffff8199a450 T bge_free_tx_ring +ffffffff8199a540 T bge_init_tx_ring +ffffffff8199a740 T bge_iff +ffffffff8199a8d0 T bge_sig_pre_reset +ffffffff8199a910 T bge_sig_post_reset +ffffffff8199a990 T bge_sig_legacy +ffffffff8199a9c0 T bge_stop_fw +ffffffff8199a9f0 T bge_dma_swap_options +ffffffff8199aa40 T bge_phy_addr +ffffffff8199ab10 T bge_chipinit +ffffffff8199b030 T bge_blockinit +ffffffff8199cb00 T bge_lookup_rev +ffffffff8199cd90 T bge_can_use_msi +ffffffff8199ce00 T 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rtw_pci_detach +ffffffff819df330 T rtw_pci_enable +ffffffff819df3e0 T rtw_pci_disable +ffffffff819e0000 T rtwn_pci_match +ffffffff819e0030 T rtwn_pci_attach +ffffffff819e0700 T rtwn_pci_detach +ffffffff819e0880 T rtwn_pci_activate +ffffffff819e08a0 T rtwn_calib_to +ffffffff819e0920 T rtwn_scan_to +ffffffff819e0940 T rtwn_intr +ffffffff819e0c80 T rtwn_alloc_rx_list +ffffffff819e1000 T rtwn_alloc_tx_list +ffffffff819e1290 T rtwn_free_rx_list +ffffffff819e1420 T rtwn_pci_write_1 +ffffffff819e1450 T rtwn_pci_write_2 +ffffffff819e1480 T rtwn_pci_write_4 +ffffffff819e14b0 T rtwn_pci_read_1 +ffffffff819e14e0 T rtwn_pci_read_2 +ffffffff819e1510 T rtwn_pci_read_4 +ffffffff819e1540 T rtwn_tx +ffffffff819e1b50 T rtwn_power_on +ffffffff819e1b80 T rtwn_dma_init +ffffffff819e1ff0 T rtwn_pci_load_firmware +ffffffff819e20a0 T rtwn_fw_loadpage +ffffffff819e2200 T rtwn_mac_init +ffffffff819e2350 T rtwn_bb_init +ffffffff819e2920 T rtwn_alloc_buffers +ffffffff819e2950 T rtwn_pci_init +ffffffff819e2a50 T rtwn_pci_stop +ffffffff819e2c10 T rtwn_is_oactive +ffffffff819e2c50 T rtwn_next_calib +ffffffff819e2c70 T rtwn_cancel_calib +ffffffff819e2cb0 T rtwn_pci_next_scan +ffffffff819e2cd0 T rtwn_cancel_scan +ffffffff819e2d10 T rtwn_wait_async +ffffffff819e2d40 T rtwn_free_tx_list +ffffffff819e2ee0 T rtwn_setup_rx_desc +ffffffff819e2f50 T rtwn_reset_rx_list +ffffffff819e2ff0 T rtwn_reset_tx_list +ffffffff819e3170 T rtwn_rx_frame +ffffffff819e3650 T rtwn_tx_done +ffffffff819e3820 T rtwn_poll_c2h_events +ffffffff819e3a10 T rtwn_pci_92c_stop +ffffffff819e3c70 T rtwn_pci_88e_stop +ffffffff819e4190 T rtwn_pci_23a_stop +ffffffff819e4660 T rtwn_88e_intr +ffffffff819e4a20 T rtwn_llt_write +ffffffff819e4b00 T rtwn_llt_init +ffffffff819e4e20 T rtwn_92c_power_on +ffffffff819e53e0 T rtwn_88e_power_on +ffffffff819e5920 T rtwn_23a_power_on +ffffffff819e5ef0 T rtwn_tx_report +ffffffff819e6000 T ral_pci_match +ffffffff819e6030 T ral_pci_attach +ffffffff819e6260 T ral_pci_detach +ffffffff819e6310 T ral_pci_activate +ffffffff819e63b0 T ral_pci_wakeup +ffffffff819e7000 T acx_pci_match +ffffffff819e7030 T acx_pci_attach +ffffffff819e72c0 T acx_pci_detach +ffffffff819e8000 T pgt_pci_match +ffffffff819e8030 T pgt_pci_attach +ffffffff819e8260 T pgt_pci_detach +ffffffff819e9000 T malo_pci_match +ffffffff819e9030 T malo_pci_attach +ffffffff819e9230 T malo_pci_detach +ffffffff819e9290 T malo_pci_activate +ffffffff819e9300 T malo_pci_wakeup +ffffffff819ea000 T bwi_pci_match +ffffffff819ea070 T bwi_pci_attach +ffffffff819ea300 T bwi_pci_detach +ffffffff819ea360 T bwi_pci_activate +ffffffff819ea3e0 T bwi_reset_bcm4331 +ffffffff819ea540 T bwi_pci_conf_write +ffffffff819ea570 T bwi_pci_conf_read +ffffffff819ea5a0 T bwi_pci_wakeup +ffffffff819eb000 T piixpm_match +ffffffff819eb030 T piixpm_attach +ffffffff819eb5a0 T piixpm_intr +ffffffff819eb6e0 T piixpm_i2c_acquire_bus +ffffffff819eb7e0 T piixpm_i2c_release_bus +ffffffff819eb8d0 T piixpm_i2c_exec +ffffffff819ec000 T vic_match +ffffffff819ec0b0 T vic_attach +ffffffff819ec520 T vic_intr +ffffffff819ec5c0 T vic_query +ffffffff819ec8a0 T vic_alloc_data +ffffffff819ecbf0 T vic_tick +ffffffff819ecc70 T vic_ioctl +ffffffff819ecee0 T vic_start +ffffffff819ed290 T vic_watchdog +ffffffff819ed2c0 T vic_media_change +ffffffff819ed2f0 T vic_media_status +ffffffff819ed3b0 T vic_read +ffffffff819ed3d0 T vic_read_cmd +ffffffff819ed430 T vic_getlladdr +ffffffff819ed4f0 T vic_alloc_dmamem +ffffffff819ed690 T vic_rx_fill +ffffffff819ed8a0 T vic_alloc_mbuf +ffffffff819ed980 T vic_init_data +ffffffff819eddb0 T vic_uninit_data +ffffffff819edfd0 T vic_link_state +ffffffff819ee060 T vic_write +ffffffff819ee0b0 T vic_rx_proc +ffffffff819ee340 T vic_tx_proc +ffffffff819ee4e0 T vic_iff +ffffffff819ee630 T vic_setlladdr +ffffffff819ee6a0 T vic_load_txb +ffffffff819ee760 T vic_init +ffffffff819ee940 T vic_stop +ffffffff819eead0 T vic_rxrinfo +ffffffff819eebb0 T vic_free_dmamem +ffffffff819ef000 T vmxnet3_match +ffffffff819ef030 T vmxnet3_attach +ffffffff819efac0 T vmxnet3_intr +ffffffff819efb80 T vmxnet3_intr_event +ffffffff819efc10 T vmxnet3_intr_intx +ffffffff819efc90 T vmxnet3_intr_queue +ffffffff819efd30 T vmxnet3_dma_init +ffffffff819f0170 T vmxnet3_ioctl +ffffffff819f0450 T vmxnet3_start +ffffffff819f0870 T vmxnet3_watchdog +ffffffff819f08e0 T vmxnet3_media_change +ffffffff819f0910 T vmxnet3_media_status +ffffffff819f0a30 T vmxnet3_link_state +ffffffff819f0b10 T vmxnet3_dma_allocmem +ffffffff819f0cb0 T vmxnet3_alloc_txring +ffffffff819f0e90 T vmxnet3_alloc_rxring +ffffffff819f1220 t vmx_dmamem_alloc +ffffffff819f13b0 T vmxnet3_rxfill_tick +ffffffff819f1430 T vmxnet3_txinit +ffffffff819f1540 T vmxnet3_rxfill +ffffffff819f18a0 T vmxnet3_rxinit +ffffffff819f1a90 T vmxnet3_txstop +ffffffff819f1bb0 T vmxnet3_rxstop +ffffffff819f1d60 T vmxnet3_enable_all_intrs +ffffffff819f1e40 T vmxnet3_disable_all_intrs +ffffffff819f1f20 T vmxnet3_evintr +ffffffff819f2120 T vmxnet3_rxintr +ffffffff819f25c0 T vmxnet3_txintr +ffffffff819f27b0 T vmxnet3_init +ffffffff819f2c20 T vmxnet3_rx_offload +ffffffff819f2df0 T vmxnet3_iff +ffffffff819f2f40 T vmxnet3_stop +ffffffff819f3260 T vmxnet3_reset +ffffffff819f32a0 T vmxnet3_tx_offload +ffffffff819f3440 t vmx_kstat_create +ffffffff819f36a0 t vmx_kstat_read +ffffffff819f4000 T vmwpvs_match +ffffffff819f4040 T vmwpvs_attach +ffffffff819f4bc0 T vmwpvs_scsi_cmd +ffffffff819f50a0 T vmwpvs_intx +ffffffff819f5130 T vmwpvs_msg_task +ffffffff819f5410 T vmwpvs_intr +ffffffff819f5640 T vmwpvs_get_config +ffffffff819f58d0 T vmwpvs_dmamem_zalloc +ffffffff819f5940 T vmwpvs_dmamem_alloc +ffffffff819f5af0 T vmwpvs_ccb_put +ffffffff819f5b60 T vmwpvs_setup_rings +ffffffff819f5ca0 T vmwpvs_setup_msg_ring +ffffffff819f5d90 T vmwpvs_ccb_get +ffffffff819f5e20 T vmwpvs_dmamem_free +ffffffff819f5ec0 T vmwpvs_cmd +ffffffff819f5f70 T vmwpvs_scsi_cmd_done +ffffffff819f6170 T vmwpvs_scsi_cmd_poll +ffffffff819f7000 T lii_match +ffffffff819f7030 T lii_attach +ffffffff819f7520 T lii_activate +ffffffff819f7620 T lii_reset +ffffffff819f79f0 T lii_spi_configure +ffffffff819f7b20 T lii_eeprom_present +ffffffff819f7bc0 T lii_eeprom_read +ffffffff819f7bf0 T lii_spi_read +ffffffff819f7f90 T lii_read_macaddr +ffffffff819f8120 T lii_intr +ffffffff819f8250 T lii_alloc_rings +ffffffff819f84b0 T lii_tick +ffffffff819f8520 T lii_mii_readreg +ffffffff819f8880 T lii_mii_writereg +ffffffff819f8be0 T lii_mii_statchg +ffffffff819f8c60 T lii_media_change +ffffffff819f8cb0 T lii_media_status +ffffffff819f8d20 T lii_ioctl +ffffffff819f8f00 T lii_start +ffffffff819f9100 T lii_watchdog +ffffffff819f9150 T lii_stop +ffffffff819f91e0 T lii_init +ffffffff819f9830 T lii_iff +ffffffff819f99a0 T lii_tx_put +ffffffff819f9ad0 T lii_free_tx_space +ffffffff819f9b10 T lii_rxintr +ffffffff819f9cf0 T lii_txintr +ffffffff819fa000 T ichiic_match +ffffffff819fa030 T ichiic_attach +ffffffff819fa280 T ichiic_intr +ffffffff819fa3c0 T ichiic_i2c_acquire_bus +ffffffff819fa420 T ichiic_i2c_release_bus +ffffffff819fa470 T ichiic_i2c_exec +ffffffff819fb000 T viapm_match +ffffffff819fb030 T viapm_attach +ffffffff819fb800 T viapm_intr +ffffffff819fb940 T viapm_i2c_acquire_bus +ffffffff819fb9a0 T viapm_i2c_release_bus +ffffffff819fb9f0 T viapm_i2c_exec +ffffffff819fbd90 T viapm_refresh_sensor_data +ffffffff819fc100 T viapm_refresh +ffffffff819fc130 T val_to_uK +ffffffff819fc1d0 T val_to_rpm +ffffffff819fc210 T val_to_uV +ffffffff819fc2b0 T viapm_get_timecount +ffffffff819fd000 T amdiic_match +ffffffff819fd030 T amdiic_attach +ffffffff819fd260 T amdiic_intr +ffffffff819fd350 T amdiic_i2c_acquire_bus +ffffffff819fd3b0 T amdiic_i2c_release_bus +ffffffff819fd400 T amdiic_i2c_exec +ffffffff819fd6b0 T amdiic_read +ffffffff819fd860 T amdiic_wait +ffffffff819fd920 T amdiic_write +ffffffff819fe000 T nviic_match +ffffffff819fe030 T nviic_attach +ffffffff819fe2d0 T nviic_i2c_acquire_bus +ffffffff819fe320 T nviic_i2c_release_bus +ffffffff819fe370 T nviic_i2c_exec +ffffffff819fe640 T nviic_write +ffffffff819fe6a0 T nviic_read +ffffffff819ff000 T sdhc_pci_match +ffffffff819ff060 T sdhc_pci_attach +ffffffff819ff3d0 T sdhc_pci_activate +ffffffff819ff430 T sdhc_takecontroller +ffffffff819ff4f0 T sdhc_ricohfix +ffffffff819ff6c0 T sdhc_pci_conf_write +ffffffff81a00000 T kate_match +ffffffff81a00180 T kate_attach +ffffffff81a00510 T kate_refresh +ffffffff81a01000 T km_match +ffffffff81a01050 T km_attach +ffffffff81a01110 T km_refresh +ffffffff81a02000 T ksmn_match +ffffffff81a02050 T ksmn_attach +ffffffff81a02280 T ksmn_ccd_attach +ffffffff81a02410 T ksmn_refresh +ffffffff81a025c0 T ksmn_read_reg +ffffffff81a03000 t iosf_pci_match +ffffffff81a03060 t iosf_pci_attach +ffffffff81a03110 t iosf_pci_mbi_mdr_rd +ffffffff81a03180 t iosf_pci_mbi_mdr_wr +ffffffff81a04000 T itherm_probe +ffffffff81a04030 T itherm_attach +ffffffff81a04500 T itherm_activate +ffffffff81a04590 T itherm_enable +ffffffff81a045f0 T itherm_refresh +ffffffff81a04600 T itherm_refresh_sensor_data +ffffffff81a04a50 T itherm_bias_temperature_sensor +ffffffff81a05000 T pchtemp_match +ffffffff81a05030 T pchtemp_attach +ffffffff81a051f0 T pchtemp_refresh +ffffffff81a06000 T rtsx_pci_match +ffffffff81a06080 T rtsx_pci_attach +ffffffff81a07000 T xspd_match +ffffffff81a07030 T xspd_attach +ffffffff81a07240 T xspd_intr +ffffffff81a08000 T virtio_pci_match +ffffffff81a08080 T virtio_pci_attach +ffffffff81a083b0 T virtio_pci_detach +ffffffff81a084a0 T virtio_pci_kick +ffffffff81a084f0 T virtio_pci_read_device_config_1 +ffffffff81a08520 T virtio_pci_read_device_config_2 +ffffffff81a08550 T virtio_pci_read_device_config_4 +ffffffff81a08580 T virtio_pci_read_device_config_8 +ffffffff81a08610 T virtio_pci_write_device_config_1 +ffffffff81a08640 T virtio_pci_write_device_config_2 +ffffffff81a08670 T virtio_pci_write_device_config_4 +ffffffff81a086a0 T virtio_pci_write_device_config_8 +ffffffff81a08710 T virtio_pci_read_queue_size +ffffffff81a08790 T virtio_pci_setup_queue +ffffffff81a08ac0 T virtio_pci_setup_intrs +ffffffff81a08c00 T virtio_pci_get_status +ffffffff81a08c70 T virtio_pci_set_status +ffffffff81a08de0 T virtio_pci_negotiate_features +ffffffff81a08f40 T virtio_pci_attach_finish +ffffffff81a09130 T virtio_pci_poll_intr +ffffffff81a091b0 T virtio_pci_intr_barrier +ffffffff81a09240 T virtio_pci_set_msix_queue_vector +ffffffff81a092c0 T virtio_pci_set_msix_config_vector +ffffffff81a09300 T virtio_pci_find_cap +ffffffff81a094d0 T virtio_pci_attach_10 +ffffffff81a099a0 T virtio_pci_attach_09 +ffffffff81a09b10 T virtio_pci_adjust_config_region +ffffffff81a09bc0 T virtio_pci_setup_msix +ffffffff81a09dd0 T virtio_pci_legacy_intr +ffffffff81a09ea0 T virtio_pci_legacy_intr_mpsafe +ffffffff81a09f50 T virtio_pci_free_irqs +ffffffff81a0a110 T virtio_pci_negotiate_features_10 +ffffffff81a0a3c0 T virtio_pci_msix_establish +ffffffff81a0a540 T virtio_pci_config_intr +ffffffff81a0a580 T virtio_pci_shared_queue_intr +ffffffff81a0a590 T virtio_pci_queue_intr +ffffffff81a0b000 T dwiic_pci_match +ffffffff81a0b030 T dwiic_pci_attach +ffffffff81a0b410 T dwiic_pci_activate +ffffffff81a0b490 T dwiic_pci_bus_scan +ffffffff81a0c000 T bwfm_pci_buscore_read +ffffffff81a0c070 T bwfm_pci_buscore_write +ffffffff81a0c0f0 T bwfm_pci_buscore_prepare +ffffffff81a0c120 T bwfm_pci_buscore_reset +ffffffff81a0c390 T bwfm_pci_buscore_activate +ffffffff81a0c3c0 T bwfm_pci_preinit +ffffffff81a0d410 T bwfm_pci_stop +ffffffff81a0d4b0 T bwfm_pci_txcheck +ffffffff81a0d570 T bwfm_pci_txdata +ffffffff81a0d910 T bwfm_pci_msgbuf_query_dcmd +ffffffff81a0ddd0 T bwfm_pci_msgbuf_set_dcmd +ffffffff81a0de20 T bwfm_pci_match +ffffffff81a0de50 T bwfm_pci_attach +ffffffff81a0e170 T bwfm_pci_detach +ffffffff81a0e1d0 T bwfm_pci_activate +ffffffff81a0e3f0 T bwfm_pci_intr +ffffffff81a0e6b0 T bwfm_pci_select_core +ffffffff81a0e7a0 T bwfm_pci_load_microcode +ffffffff81a0ed00 T bwfm_pci_dmamem_alloc +ffffffff81a0eee0 T bwfm_pci_setup_ring +ffffffff81a0f120 T bwfm_pci_intr_enable +ffffffff81a0f170 T bwfm_pci_hostready +ffffffff81a0f1e0 T bwfm_pci_fill_rx_rings +ffffffff81a0f240 T bwfm_pci_dmamem_free +ffffffff81a0f2d0 T bwfm_pci_cleanup +ffffffff81a0fb60 T bwfm_pci_send_mb_data +ffffffff81a0fcb0 T bwfm_pci_intmask +ffffffff81a0fcf0 T bwfm_pci_pktid_avail +ffffffff81a0fd70 T bwfm_pci_pktid_new +ffffffff81a0fef0 T bwfm_pci_pktid_free +ffffffff81a0ffb0 T bwfm_pci_fill_rx_buf_ring +ffffffff81a10340 T bwfm_pci_fill_rx_ioctl_ring +ffffffff81a10700 T bwfm_pci_ring_write_reserve +ffffffff81a10800 T bwfm_pci_ring_write_cancel +ffffffff81a10840 T bwfm_pci_ring_write_commit +ffffffff81a10930 T bwfm_pci_ring_write_rptr +ffffffff81a109b0 T bwfm_pci_ring_write_wptr +ffffffff81a10a30 T bwfm_pci_setup_flowring +ffffffff81a10ba0 T bwfm_pci_ring_bell +ffffffff81a10be0 T bwfm_pci_ring_update_rptr +ffffffff81a10c90 T bwfm_pci_ring_update_wptr +ffffffff81a10d40 T bwfm_pci_ring_write_reserve_multi +ffffffff81a10e60 T bwfm_pci_ring_read_avail +ffffffff81a10f70 T bwfm_pci_ring_read_commit +ffffffff81a11000 T bwfm_pci_ring_rx +ffffffff81a11230 T bwfm_pci_msg_rx +ffffffff81a118d0 T bwfm_pci_flowring_delete_cb +ffffffff81a119a0 T bwfm_pci_msgbuf_rxioctl +ffffffff81a11aa0 T bwfm_pci_intr_status +ffffffff81a11ae0 T bwfm_pci_intr_ack +ffffffff81a11b20 T bwfm_pci_flowring_lookup +ffffffff81a11cb0 T bwfm_pci_flowring_create +ffffffff81a11df0 T bwfm_pci_flowring_create_cb +ffffffff81a12170 T bwfm_pci_flowring_delete +ffffffff81a12490 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff81a126e0 T bwfm_pci_handle_mb_data +ffffffff81a127d0 T bwfm_pci_intr_disable +ffffffff81a13000 T ccp_pci_match +ffffffff81a13030 T ccp_pci_attach +ffffffff81a14000 T psp_pci_match +ffffffff81a140a0 T psp_pci_intr_map +ffffffff81a14220 T psp_pci_attach +ffffffff81a15000 T bnxt_match +ffffffff81a15030 T bnxt_attach +ffffffff81a15e30 T bnxt_dmamem_alloc +ffffffff81a15ff0 T bnxt_dmamem_free +ffffffff81a160a0 T bnxt_hwrm_ver_get +ffffffff81a16210 T bnxt_hwrm_nvm_get_dev_info +ffffffff81a16370 T bnxt_hwrm_func_drv_rgtr +ffffffff81a164a0 T bnxt_hwrm_func_rgtr_async_events +ffffffff81a165e0 T bnxt_hwrm_func_qcaps +ffffffff81a166e0 T bnxt_admin_intr +ffffffff81a168f0 T bnxt_intr +ffffffff81a16eb0 T bnxt_hwrm_func_qcfg +ffffffff81a16f80 T bnxt_hwrm_queue_qportcfg +ffffffff81a17070 T bnxt_hwrm_func_reset +ffffffff81a17130 T bnxt_mark_cpr_invalid +ffffffff81a17190 T bnxt_hwrm_ring_alloc +ffffffff81a17350 T bnxt_cfg_async_cr +ffffffff81a17470 T bnxt_write_cp_doorbell +ffffffff81a174b0 T bnxt_set_cp_ring_aggint +ffffffff81a175a0 T bnxt_ioctl +ffffffff81a17780 T bnxt_start +ffffffff81a17d50 T bnxt_watchdog +ffffffff81a17d80 T bnxt_media_change +ffffffff81a17ef0 T bnxt_media_status +ffffffff81a17f10 T bnxt_refill +ffffffff81a18080 T bnxt_media_autonegotiate +ffffffff81a18180 T bnxt_hwrm_port_phy_qcfg +ffffffff81a18660 T bnxt_free_slots +ffffffff81a18710 T bnxt_hwrm_cmd_hdr_init +ffffffff81a18760 T hwrm_send_message +ffffffff81a187f0 T bnxt_queue_up +ffffffff81a195a0 T bnxt_hwrm_stat_ctx_alloc +ffffffff81a196c0 T bnxt_write_tx_doorbell +ffffffff81a19740 T bnxt_write_rx_doorbell +ffffffff81a197c0 T bnxt_hwrm_ring_grp_alloc +ffffffff81a198e0 T bnxt_rx_fill +ffffffff81a19990 T bnxt_rx_fill_ag +ffffffff81a19a50 T bnxt_hwrm_ring_grp_free +ffffffff81a19b60 T bnxt_hwrm_ring_free +ffffffff81a19c70 T bnxt_hwrm_stat_ctx_free +ffffffff81a19d80 T bnxt_queue_down +ffffffff81a1a610 T bnxt_up +ffffffff81a1ace0 T bnxt_hwrm_vnic_ctx_alloc +ffffffff81a1add0 T bnxt_hwrm_vnic_alloc +ffffffff81a1aee0 T bnxt_hwrm_vnic_cfg +ffffffff81a1b040 T bnxt_hwrm_vnic_cfg_placement +ffffffff81a1b130 T bnxt_hwrm_set_filter +ffffffff81a1b2d0 T bnxt_hwrm_vnic_rss_cfg +ffffffff81a1b3c0 T bnxt_iff +ffffffff81a1b540 T bnxt_hwrm_vnic_free +ffffffff81a1b650 T bnxt_hwrm_vnic_ctx_free +ffffffff81a1b760 T bnxt_down +ffffffff81a1bc10 T bnxt_hwrm_free_filter +ffffffff81a1bd10 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff81a1be00 T bnxt_rxrinfo +ffffffff81a1bf70 T bnxt_get_sffpage +ffffffff81a1c2f0 T bnxt_load_mbuf +ffffffff81a1c3c0 T bnxt_handle_async_event +ffffffff81a1c410 T bnxt_cpr_next_cmpl +ffffffff81a1c480 T bnxt_cpr_commit +ffffffff81a1c4b0 T bnxt_cpr_rollback +ffffffff81a1c4e0 T bnxt_write_cp_doorbell_index +ffffffff81a1c560 T bnxt_rx +ffffffff81a1c830 T bnxt_txeof +ffffffff81a1c970 T bnxt_get_media_type +ffffffff81a1ced0 T bnxt_add_media_type +ffffffff81a1d090 T _hwrm_send_message +ffffffff81a1fe40 T bnxt_rx_fill_slots +ffffffff81a20040 T bnxt_hwrm_err_map +ffffffff81a20080 T _bnxt_hwrm_set_async_event_bit +ffffffff81a21000 t mcx_match +ffffffff81a21030 t mcx_attach +ffffffff81a21fb0 T mcx_rx_fill +ffffffff81a22250 T mcx_load_mbuf +ffffffff81a22320 t mcx_dmamem_alloc +ffffffff81a224b0 t mcx_init_wait +ffffffff81a22550 t mcx_enable_hca +ffffffff81a22770 t mcx_issi +ffffffff81a22b80 t mcx_pages +ffffffff81a23680 t mcx_hca_max_caps +ffffffff81a23cb0 t mcx_hca_set_caps +ffffffff81a24240 t mcx_init_hca +ffffffff81a24450 t mcx_set_driver_version +ffffffff81a24850 t mcx_iff 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dma_resv_get_singleton +ffffffff81a72310 T dma_resv_wait_timeout +ffffffff81a72610 T dma_resv_test_signaled +ffffffff81a72790 T dma_resv_describe +ffffffff81a73000 T drm_legacy_agp_info +ffffffff81a730b0 T drm_legacy_agp_acquire +ffffffff81a73120 T drm_legacy_agp_release +ffffffff81a73190 T drm_legacy_agp_enable +ffffffff81a73210 T drm_legacy_agp_takedown +ffffffff81a73280 T drm_legacy_agp_init +ffffffff81a74000 T devm_aperture_acquire_from_firmware +ffffffff81a74060 T drm_aperture_remove_conflicting_framebuffers +ffffffff81a74090 T drm_aperture_remove_conflicting_pci_framebuffers +ffffffff81a75000 T __drm_crtc_commit_free +ffffffff81a75020 T drm_crtc_commit_wait +ffffffff81a75200 T drm_atomic_state_default_release +ffffffff81a75280 T drm_atomic_state_init +ffffffff81a753f0 T drm_atomic_state_alloc +ffffffff81a754a0 T drm_atomic_state_default_clear +ffffffff81a75800 T drm_atomic_state_clear +ffffffff81a75830 T __drm_atomic_state_free +ffffffff81a75940 T drm_atomic_get_crtc_state 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+ffffffff81a77640 T drm_atomic_print_new_state +ffffffff81a77850 T drm_atomic_nonblocking_commit +ffffffff81a77900 T __drm_atomic_helper_disable_plane +ffffffff81a77990 T __drm_atomic_helper_set_config +ffffffff81a77d90 t drm_atomic_plane_print_state +ffffffff81a78020 t drm_atomic_crtc_print_state +ffffffff81a782f0 t drm_atomic_connector_print_state +ffffffff81a78450 T drm_state_dump +ffffffff81a79000 T drm_atomic_helper_check_modeset +ffffffff81a79e00 t handle_conflicting_encoders +ffffffff81a7a170 t mode_fixup +ffffffff81a7a4f0 T drm_atomic_helper_check_wb_encoder_state +ffffffff81a7a560 T drm_atomic_helper_check_plane_state +ffffffff81a7a980 T drm_atomic_helper_check_crtc_primary_plane +ffffffff81a7aa30 T drm_atomic_helper_check_planes +ffffffff81a7ad10 T drm_atomic_helper_check +ffffffff81a7ade0 T drm_atomic_helper_async_check +ffffffff81a7b0e0 T drm_atomic_helper_update_legacy_modeset_state +ffffffff81a7b350 T drm_atomic_helper_calc_timestamping_constants +ffffffff81a7b3f0 T drm_atomic_helper_commit_modeset_disables +ffffffff81a7bae0 T drm_atomic_helper_commit_modeset_enables +ffffffff81a7be00 T drm_atomic_helper_wait_for_fences +ffffffff81a7c010 T drm_atomic_helper_wait_for_vblanks +ffffffff81a7c3c0 T drm_atomic_helper_wait_for_flip_done +ffffffff81a7c5b0 T drm_atomic_helper_commit_tail +ffffffff81a7c780 T drm_atomic_helper_commit_planes +ffffffff81a7cb30 T drm_atomic_helper_fake_vblank +ffffffff81a7cc30 T drm_atomic_helper_commit_hw_done +ffffffff81a7ce50 T drm_atomic_helper_cleanup_planes +ffffffff81a7cf00 T drm_atomic_helper_commit_tail_rpm +ffffffff81a7d0d0 t try_wait_for_completion +ffffffff81a7d140 T drm_atomic_helper_async_commit +ffffffff81a7d410 T drm_atomic_helper_commit +ffffffff81a7d710 T drm_atomic_helper_prepare_planes +ffffffff81a7d9e0 T drm_atomic_helper_unprepare_planes +ffffffff81a7daf0 T drm_atomic_helper_setup_commit +ffffffff81a7e2e0 t commit_work +ffffffff81a7e300 T drm_atomic_helper_swap_state +ffffffff81a7e9c0 t commit_tail +ffffffff81a7ec10 t release_crtc_commit +ffffffff81a7ec50 t crtc_or_fake_commit +ffffffff81a7ed80 T drm_atomic_helper_wait_for_dependencies +ffffffff81a7efc0 T drm_atomic_helper_commit_cleanup_done +ffffffff81a7f2b0 T drm_atomic_helper_commit_planes_on_crtc +ffffffff81a7f560 T drm_atomic_helper_disable_planes_on_crtc +ffffffff81a7f6d0 T drm_atomic_helper_update_plane +ffffffff81a7f830 T drm_atomic_helper_disable_plane +ffffffff81a7f930 T drm_atomic_helper_set_config +ffffffff81a7fa10 T drm_atomic_helper_disable_all +ffffffff81a7fc00 T drm_atomic_helper_shutdown +ffffffff81a7fd80 T drm_atomic_helper_duplicate_state +ffffffff81a7ff10 T drm_atomic_helper_suspend +ffffffff81a800b0 T drm_atomic_helper_commit_duplicated_state +ffffffff81a80200 T drm_atomic_helper_resume +ffffffff81a80370 T drm_atomic_helper_page_flip +ffffffff81a80450 t page_flip_common +ffffffff81a80580 T drm_atomic_helper_page_flip_target +ffffffff81a806c0 T drm_atomic_helper_bridge_propagate_bus_fmt +ffffffff81a80740 t set_best_encoder +ffffffff81a81000 T __drm_atomic_helper_crtc_state_reset +ffffffff81a81030 T __drm_atomic_helper_crtc_reset +ffffffff81a810a0 T drm_atomic_helper_crtc_reset +ffffffff81a81150 T __drm_atomic_helper_crtc_duplicate_state +ffffffff81a81230 T drm_atomic_helper_crtc_duplicate_state +ffffffff81a812f0 T __drm_atomic_helper_crtc_destroy_state +ffffffff81a813e0 T drm_atomic_helper_crtc_destroy_state +ffffffff81a81420 T __drm_atomic_helper_plane_state_reset +ffffffff81a81500 T __drm_atomic_helper_plane_reset +ffffffff81a81560 T drm_atomic_helper_plane_reset +ffffffff81a81670 T __drm_atomic_helper_plane_destroy_state +ffffffff81a816e0 T __drm_atomic_helper_plane_duplicate_state +ffffffff81a81760 T drm_atomic_helper_plane_duplicate_state +ffffffff81a81860 T drm_atomic_helper_plane_destroy_state +ffffffff81a818e0 T __drm_atomic_helper_connector_state_reset +ffffffff81a81910 T __drm_atomic_helper_connector_reset +ffffffff81a81950 T drm_atomic_helper_connector_reset +ffffffff81a81a40 T __drm_atomic_helper_connector_destroy_state +ffffffff81a81aa0 T drm_atomic_helper_connector_tv_margins_reset +ffffffff81a81b00 T drm_atomic_helper_connector_tv_reset +ffffffff81a81d50 T drm_atomic_helper_connector_tv_check +ffffffff81a81e30 T __drm_atomic_helper_connector_duplicate_state +ffffffff81a81ed0 T drm_atomic_helper_connector_duplicate_state +ffffffff81a81fe0 T drm_atomic_helper_connector_destroy_state +ffffffff81a82050 T __drm_atomic_helper_private_obj_duplicate_state +ffffffff81a82090 T __drm_atomic_helper_bridge_duplicate_state +ffffffff81a820d0 T drm_atomic_helper_bridge_duplicate_state +ffffffff81a82190 T drm_atomic_helper_bridge_destroy_state +ffffffff81a821b0 T __drm_atomic_helper_bridge_reset +ffffffff81a82200 T drm_atomic_helper_bridge_reset +ffffffff81a83000 T drm_atomic_set_mode_for_crtc +ffffffff81a83250 T drm_atomic_set_mode_prop_for_crtc +ffffffff81a83530 T drm_atomic_set_crtc_for_plane +ffffffff81a836d0 T drm_atomic_set_fb_for_plane +ffffffff81a837c0 T drm_atomic_set_crtc_for_connector +ffffffff81a83950 T drm_atomic_get_property +ffffffff81a840f0 T drm_atomic_connector_commit_dpms +ffffffff81a84250 T drm_atomic_set_property +ffffffff81a84e50 T drm_mode_atomic_ioctl +ffffffff81a853d0 t prepare_signaling +ffffffff81a858f0 t complete_signaling +ffffffff81a85af0 t drm_atomic_replace_property_blob_from_id +ffffffff81a85c90 t drm_atomic_set_writeback_fb_for_connector +ffffffff81a85d00 t set_out_fence_for_connector +ffffffff81a86000 T drm_is_current_master +ffffffff81a86070 T drm_getmagic +ffffffff81a86160 T drm_authmagic +ffffffff81a86250 T drm_master_create +ffffffff81a86310 T drm_setmaster_ioctl +ffffffff81a863f0 t drm_new_set_master +ffffffff81a865e0 T drm_dropmaster_ioctl +ffffffff81a866f0 t drm_drop_master +ffffffff81a867d0 T drm_master_open +ffffffff81a868b0 T drm_master_get +ffffffff81a868e0 T drm_master_release +ffffffff81a869e0 T drm_master_put +ffffffff81a86aa0 T drm_file_get_master +ffffffff81a86b10 T drm_master_internal_acquire +ffffffff81a86b80 T drm_master_internal_release +ffffffff81a87000 T drm_plane_create_alpha_property +ffffffff81a870b0 T drm_plane_create_rotation_property +ffffffff81a87200 T drm_rotation_simplify +ffffffff81a87280 T drm_plane_create_zpos_property +ffffffff81a87350 T drm_plane_create_zpos_immutable_property +ffffffff81a87410 T drm_atomic_normalize_zpos +ffffffff81a87760 T drm_plane_create_blend_mode_property +ffffffff81a87940 t drm_atomic_state_zpos_cmp +ffffffff81a88000 T drm_bridge_add +ffffffff81a88080 T devm_drm_bridge_add +ffffffff81a88150 T drm_bridge_remove +ffffffff81a881c0 T drm_bridge_attach +ffffffff81a883a0 T drm_bridge_detach +ffffffff81a88490 T drm_bridge_chain_mode_fixup +ffffffff81a88540 T drm_bridge_chain_mode_valid +ffffffff81a885f0 T drm_bridge_chain_mode_set +ffffffff81a88690 T drm_atomic_bridge_chain_disable +ffffffff81a887a0 T drm_atomic_bridge_chain_post_disable +ffffffff81a889e0 T drm_atomic_bridge_chain_pre_enable +ffffffff81a88c50 T drm_atomic_bridge_chain_enable +ffffffff81a88d80 T drm_atomic_bridge_chain_check +ffffffff81a89180 T drm_bridge_detect +ffffffff81a891e0 T drm_bridge_get_modes +ffffffff81a89240 T drm_bridge_edid_read +ffffffff81a89310 T drm_bridge_get_edid +ffffffff81a89370 T drm_bridge_hpd_enable +ffffffff81a89450 T drm_bridge_hpd_disable +ffffffff81a894f0 T drm_bridge_hpd_notify +ffffffff81a89550 t drm_bridge_atomic_duplicate_priv_state +ffffffff81a89570 t drm_bridge_atomic_destroy_priv_state +ffffffff81a89590 t select_bus_fmt_recursive +ffffffff81a8a000 T drm_buddy_init +ffffffff81a8a4c0 T drm_buddy_fini +ffffffff81a8a5d0 T drm_get_buddy +ffffffff81a8a610 T drm_buddy_free_block +ffffffff81a8a660 t __drm_buddy_free +ffffffff81a8a7c0 T drm_buddy_free_list +ffffffff81a8a8a0 T drm_buddy_block_trim +ffffffff81a8ab00 t __alloc_range +ffffffff81a8ae00 T drm_buddy_alloc_blocks +ffffffff81a8b4e0 t __drm_buddy_alloc_range +ffffffff81a8b580 T drm_buddy_block_print +ffffffff81a8b5c0 T drm_buddy_print +ffffffff81a8b740 T drm_buddy_module_exit +ffffffff81a8b760 T drm_buddy_module_init +ffffffff81a8b7d0 t split_block +ffffffff81a8c000 T drm_clflush_pages +ffffffff81a8c0e0 T drm_clflush_sg +ffffffff81a8c200 T drm_clflush_virt_range +ffffffff81a8c2a0 T drm_need_swiotlb +ffffffff81a8c2d0 T drm_memcpy_from_wc +ffffffff81a8c820 T drm_memcpy_init_early +ffffffff81a8d000 T drm_client_init +ffffffff81a8d150 T drm_client_register +ffffffff81a8d210 T drm_client_release +ffffffff81a8d2e0 T drm_client_dev_unregister +ffffffff81a8d400 T drm_client_dev_hotplug +ffffffff81a8d540 T drm_client_dev_restore +ffffffff81a8d640 T drm_client_buffer_vmap +ffffffff81a8d6c0 T drm_client_buffer_vunmap +ffffffff81a8d6e0 T drm_client_framebuffer_create +ffffffff81a8da20 T drm_client_framebuffer_delete +ffffffff81a8db20 T drm_client_framebuffer_flush +ffffffff81a8e000 T drm_client_modeset_create +ffffffff81a8e150 T drm_client_modeset_free +ffffffff81a8e280 T drm_client_modeset_probe +ffffffff81a8fcb0 t drm_client_pick_crtcs +ffffffff81a8ffd0 T drm_client_rotation +ffffffff81a90180 T drm_client_modeset_check +ffffffff81a90230 t drm_client_modeset_commit_atomic +ffffffff81a904a0 T drm_client_modeset_commit_locked +ffffffff81a90690 T drm_client_modeset_commit +ffffffff81a90720 T drm_client_modeset_dpms +ffffffff81a909e0 t drm_connector_pick_cmdline_mode +ffffffff81a91000 T drm_color_ctm_s31_32_to_qm_n +ffffffff81a910d0 T drm_crtc_enable_color_mgmt +ffffffff81a911c0 T drm_mode_crtc_set_gamma_size +ffffffff81a912f0 T drm_mode_gamma_set_ioctl +ffffffff81a918b0 T drm_mode_gamma_get_ioctl +ffffffff81a91a20 T drm_get_color_encoding_name +ffffffff81a91aa0 T drm_get_color_range_name +ffffffff81a91b20 T drm_plane_create_color_properties +ffffffff81a91db0 T drm_color_lut_check +ffffffff81a92000 T drm_connector_ida_init +ffffffff81a921c0 T drm_connector_ida_destroy +ffffffff81a92380 T drm_get_connector_type_name +ffffffff81a923c0 T drm_connector_free_work_fn +ffffffff81a924a0 T drm_connector_init +ffffffff81a92530 t __drm_connector_init +ffffffff81a92930 T drm_connector_init_with_ddc +ffffffff81a929c0 T drmm_connector_init +ffffffff81a92a90 t drm_connector_cleanup_action +ffffffff81a92ab0 T drm_connector_attach_edid_property +ffffffff81a92ad0 T drm_connector_attach_encoder +ffffffff81a92b60 T drm_connector_has_possible_encoder +ffffffff81a92ba0 T drm_connector_cleanup +ffffffff81a92f90 T drm_connector_unregister +ffffffff81a93040 T drm_mode_put_tile_group +ffffffff81a930f0 T drm_connector_register +ffffffff81a93220 T drm_connector_unregister_all +ffffffff81a93400 T drm_connector_list_iter_begin +ffffffff81a93440 T drm_connector_list_iter_next +ffffffff81a93560 T drm_connector_list_iter_end +ffffffff81a93640 T drm_connector_register_all +ffffffff81a93800 T drm_get_connector_status_name +ffffffff81a93850 T drm_get_connector_force_name +ffffffff81a93890 T drm_get_subpixel_order_name +ffffffff81a938d0 T drm_get_dpms_name +ffffffff81a93910 T drm_display_info_set_bus_formats +ffffffff81a93a00 T drm_get_dvi_i_select_name +ffffffff81a93a60 T drm_get_dvi_i_subconnector_name +ffffffff81a93ac0 T drm_get_tv_mode_name +ffffffff81a93b00 T drm_get_tv_mode_from_name +ffffffff81a93d20 T drm_get_tv_select_name +ffffffff81a93d80 T drm_get_tv_subconnector_name +ffffffff81a93de0 T drm_get_dp_subconnector_name +ffffffff81a93e70 T drm_get_colorspace_name +ffffffff81a93eb0 T drm_connector_create_standard_properties +ffffffff81a94070 T drm_mode_create_dvi_i_properties +ffffffff81a94120 T drm_connector_attach_dp_subconnector_property +ffffffff81a94190 T drm_connector_attach_content_type_property +ffffffff81a94230 T drm_mode_create_content_type_property +ffffffff81a942c0 T drm_connector_attach_tv_margin_properties +ffffffff81a94340 T drm_mode_create_tv_margin_properties +ffffffff81a94480 T drm_mode_create_tv_properties_legacy +ffffffff81a94730 T drm_mode_create_tv_properties +ffffffff81a94920 T drm_mode_create_scaling_mode_property +ffffffff81a94990 T drm_connector_attach_vrr_capable_property +ffffffff81a94a30 T drm_connector_attach_scaling_mode_property +ffffffff81a94c50 T drm_mode_create_aspect_ratio_property +ffffffff81a94ce0 T drm_mode_create_hdmi_colorspace_property +ffffffff81a94d00 t drm_mode_create_colorspace_property +ffffffff81a94e50 T drm_mode_create_dp_colorspace_property +ffffffff81a94e80 T drm_mode_create_suggested_offset_properties +ffffffff81a94f60 T drm_connector_set_path_property +ffffffff81a94fc0 T drm_connector_set_tile_property +ffffffff81a95130 T drm_connector_set_link_status_property +ffffffff81a95190 T drm_connector_attach_max_bpc_property +ffffffff81a95260 T drm_connector_attach_hdr_output_metadata_property +ffffffff81a952b0 T drm_connector_attach_colorspace_property +ffffffff81a95300 T drm_connector_atomic_hdr_metadata_equal +ffffffff81a95380 T drm_connector_set_vrr_capable_property +ffffffff81a953d0 T drm_connector_set_panel_orientation +ffffffff81a954a0 T drm_connector_set_panel_orientation_with_quirk +ffffffff81a955a0 T drm_connector_set_orientation_from_panel +ffffffff81a956a0 T drm_connector_create_privacy_screen_properties +ffffffff81a95750 T drm_connector_attach_privacy_screen_properties +ffffffff81a957d0 T drm_connector_attach_privacy_screen_provider +ffffffff81a95900 t drm_connector_privacy_screen_notifier +ffffffff81a959d0 T drm_connector_update_privacy_screen +ffffffff81a95a40 T drm_connector_set_obj_prop +ffffffff81a95b50 T drm_connector_property_set_ioctl +ffffffff81a95bb0 T drm_mode_getconnector +ffffffff81a96130 T drm_connector_find_by_fwnode +ffffffff81a961f0 T drm_connector_oob_hotplug_event +ffffffff81a962f0 T drm_mode_get_tile_group +ffffffff81a96400 T drm_mode_create_tile_group +ffffffff81a964f0 t drm_connector_free +ffffffff81a96540 t kasprintf +ffffffff81a97000 T drm_crtc_from_index +ffffffff81a97060 T drm_crtc_force_disable +ffffffff81a971b0 T drm_mode_set_config_internal +ffffffff81a97230 T drm_crtc_register_all +ffffffff81a972c0 T drm_crtc_unregister_all +ffffffff81a97340 T drm_crtc_create_fence +ffffffff81a973d0 T drm_crtc_init_with_planes +ffffffff81a974b0 t __drm_crtc_init_with_planes +ffffffff81a97940 T drmm_crtc_init_with_planes +ffffffff81a97a60 T __drmm_crtc_alloc_with_planes +ffffffff81a97c00 T drm_crtc_cleanup +ffffffff81a97d40 T drm_mode_getcrtc +ffffffff81a97f20 t __drm_mode_set_config_internal +ffffffff81a980e0 T drm_crtc_check_viewport +ffffffff81a981a0 T drm_mode_setcrtc +ffffffff81a98a40 T drm_mode_crtc_set_obj_prop +ffffffff81a98ad0 T drm_crtc_create_scaling_filter_property +ffffffff81a98b50 t drm_crtc_fence_get_driver_name +ffffffff81a98bd0 t drm_crtc_fence_get_timeline_name +ffffffff81a98c40 t kasprintf +ffffffff81a98d20 t drmm_crtc_init_with_planes_cleanup +ffffffff81a99000 T drm_helper_encoder_in_use +ffffffff81a991b0 T drm_helper_crtc_in_use +ffffffff81a992e0 T drm_helper_disable_unused_functions +ffffffff81a99380 t __drm_helper_disable_unused_functions +ffffffff81a994c0 T drm_crtc_helper_set_mode +ffffffff81a99a40 T drm_crtc_helper_atomic_check +ffffffff81a99a90 T drm_connector_get_single_encoder +ffffffff81a99b70 T drm_crtc_helper_set_config +ffffffff81a9a9a0 T drm_helper_connector_dpms +ffffffff81a9ad00 T drm_helper_resume_force_mode +ffffffff81a9b090 T drm_helper_force_disable_all +ffffffff81a9c000 T drm_atomic_helper_check_plane_damage +ffffffff81a9c0b0 T drm_atomic_helper_dirtyfb +ffffffff81a9c3f0 T drm_atomic_helper_damage_iter_init +ffffffff81a9c550 T drm_atomic_helper_damage_iter_next +ffffffff81a9c5f0 T drm_atomic_helper_damage_merged +ffffffff81a9d000 T displayid_iter_edid_begin +ffffffff81a9d050 T __displayid_iter_next +ffffffff81a9d320 T displayid_iter_end +ffffffff81a9d370 T displayid_version +ffffffff81a9d3a0 T displayid_primary_use +ffffffff81a9e000 T drm_mode_create_dumb +ffffffff81a9e0e0 T drm_mode_create_dumb_ioctl +ffffffff81a9e1c0 T drm_mode_mmap_dumb_ioctl +ffffffff81a9e230 T drm_mode_destroy_dumb +ffffffff81a9e280 T drm_mode_destroy_dumb_ioctl +ffffffff81a9f000 T drm_edid_header_is_valid +ffffffff81a9f080 T drm_edid_are_equal +ffffffff81a9f100 T drm_edid_block_valid +ffffffff81a9f370 t edid_block_check +ffffffff81a9f4b0 t edid_block_status_print +ffffffff81a9f5a0 T drm_edid_is_valid +ffffffff81a9f620 T drm_edid_valid +ffffffff81a9f760 t drm_edid_block_count +ffffffff81a9f8a0 T drm_edid_override_show +ffffffff81a9f900 T drm_edid_override_set +ffffffff81a9fb10 T drm_edid_alloc +ffffffff81a9fbf0 T drm_edid_free +ffffffff81a9fc50 T drm_edid_override_reset +ffffffff81a9fd30 T drm_edid_override_connector_update +ffffffff81a9fe30 t drm_edid_override_get +ffffffff81a9ff50 T drm_edid_connector_update +ffffffff81aa0430 T drm_edid_connector_add_modes +ffffffff81aa0590 T drm_do_get_edid +ffffffff81aa05b0 t _drm_do_get_edid +ffffffff81aa0ab0 T drm_edid_raw +ffffffff81aa0b40 T drm_edid_dup +ffffffff81aa0c30 T drm_probe_ddc +ffffffff81aa0d40 t drm_do_probe_ddc_edid +ffffffff81aa0ea0 T drm_get_edid +ffffffff81aa1030 T drm_connector_update_edid_property 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drm_add_edid_modes +ffffffff81aa5e70 T drm_add_modes_noedid +ffffffff81aa5f80 T drm_set_preferred_mode +ffffffff81aa5fe0 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff81aa62d0 T drm_hdmi_avi_infoframe_quant_range +ffffffff81aa6370 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff81aa6450 t connector_bad_edid +ffffffff81aa6640 t edid_filter_invalid_blocks +ffffffff81aa6800 t drm_for_each_detailed_block +ffffffff81aa69f0 t __cea_db_iter_next +ffffffff81aa6c10 t get_monitor_range +ffffffff81aa6cb0 t do_detailed_mode +ffffffff81aa7750 t do_cvt_mode +ffffffff81aa79e0 t drm_mode_std +ffffffff81aa8430 t do_standard_modes +ffffffff81aa85e0 t drm_monitor_supports_rb +ffffffff81aa89f0 t drm_gtf2_mode +ffffffff81aa97f0 t drm_gtf2_hbreak +ffffffff81aa9b60 t do_established_modes +ffffffff81aa9d80 t drm_match_hdmi_mode +ffffffff81aa9f10 t do_inferred_modes +ffffffff81aaa680 t mode_in_range +ffffffff81aab000 T drm_encoder_register_all +ffffffff81aab090 T drm_encoder_unregister_all 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drm_fb_helper_pan_display +ffffffff81aaed30 T drm_fb_helper_fill_info +ffffffff81aaee00 T drm_fb_helper_initial_config +ffffffff81aaee40 t __drm_fb_helper_initial_config_and_unlock +ffffffff81aaf540 T drm_fb_helper_hotplug_event +ffffffff81aaf6c0 t drm_setup_crtcs_fb +ffffffff81aaf840 T drm_fb_helper_lastclose +ffffffff81aaf910 T drm_fb_helper_output_poll_changed +ffffffff81ab0000 T drm_fb_dma_get_gem_obj +ffffffff81ab1000 T drm_fbdev_dma_setup +ffffffff81ab11d0 t drm_fbdev_dma_helper_fb_probe +ffffffff81ab1480 t drm_fbdev_dma_client_unregister +ffffffff81ab14e0 t drm_fbdev_dma_client_restore +ffffffff81ab1530 t drm_fbdev_dma_client_hotplug +ffffffff81ab2000 T drm_fbdev_generic_setup +ffffffff81ab21d0 t drm_fbdev_generic_helper_fb_probe +ffffffff81ab2370 t drm_fbdev_generic_helper_fb_dirty +ffffffff81ab2670 t drm_fbdev_generic_client_unregister +ffffffff81ab26d0 t drm_fbdev_generic_client_restore +ffffffff81ab2720 t drm_fbdev_generic_client_hotplug +ffffffff81ab3000 T drm_dev_needs_global_mutex +ffffffff81ab3060 T drm_file_alloc +ffffffff81ab3350 T drm_file_free +ffffffff81ab35e0 T drm_lastclose +ffffffff81ab3660 T drm_release +ffffffff81ab36c0 T drm_file_update_pid +ffffffff81ab3710 T drm_release_noglobal +ffffffff81ab3770 T drm_read +ffffffff81ab37d0 T drm_event_reserve_init_locked +ffffffff81ab3850 T drm_event_reserve_init +ffffffff81ab3920 T drm_event_cancel_free +ffffffff81ab39b0 T drm_send_event_timestamp_locked +ffffffff81ab39c0 t drm_send_event_helper +ffffffff81ab3be0 T drm_send_event_locked +ffffffff81ab3c00 T drm_send_event +ffffffff81ab3c60 T drm_print_memory_stats +ffffffff81ab3f00 T drm_show_memory_stats +ffffffff81ab4180 T drm_show_fdinfo +ffffffff81ab41a0 T mock_drm_getfile +ffffffff81ab5000 T drm_flip_work_allocate_task +ffffffff81ab5060 T drm_flip_work_queue_task +ffffffff81ab50c0 T drm_flip_work_queue +ffffffff81ab5180 T drm_flip_work_commit +ffffffff81ab5210 T drm_flip_work_init +ffffffff81ab5280 t flip_worker +ffffffff81ab53a0 T drm_flip_work_cleanup +ffffffff81ab6000 T drm_fb_clip_offset +ffffffff81ab6040 T drm_fb_memcpy +ffffffff81ab6330 T drm_fb_swab +ffffffff81ab6450 t drm_fb_swab32_line +ffffffff81ab64b0 t drm_fb_swab16_line +ffffffff81ab6510 t drm_fb_xfrm +ffffffff81ab6850 T drm_fb_xrgb8888_to_rgb332 +ffffffff81ab68b0 t drm_fb_xrgb8888_to_rgb332_line +ffffffff81ab69b0 T drm_fb_xrgb8888_to_rgb565 +ffffffff81ab6a40 t drm_fb_xrgb8888_to_rgb565_swab_line +ffffffff81ab6b60 t drm_fb_xrgb8888_to_rgb565_line +ffffffff81ab6c70 T drm_fb_xrgb8888_to_xrgb1555 +ffffffff81ab6cd0 t drm_fb_xrgb8888_to_xrgb1555_line +ffffffff81ab6de0 T drm_fb_xrgb8888_to_argb1555 +ffffffff81ab6e40 t drm_fb_xrgb8888_to_argb1555_line +ffffffff81ab6f60 T drm_fb_xrgb8888_to_rgba5551 +ffffffff81ab6fc0 t drm_fb_xrgb8888_to_rgba5551_line +ffffffff81ab70d0 T drm_fb_xrgb8888_to_rgb888 +ffffffff81ab7130 t drm_fb_xrgb8888_to_rgb888_line +ffffffff81ab71c0 T drm_fb_xrgb8888_to_argb8888 +ffffffff81ab7220 t drm_fb_xrgb8888_to_argb8888_line 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drm_mode_addfb +ffffffff81aba380 T drm_mode_addfb2 +ffffffff81aba4a0 T drm_mode_addfb_ioctl +ffffffff81aba4c0 T drm_internal_framebuffer_create +ffffffff81abab00 T drm_mode_addfb2_ioctl +ffffffff81abac20 T drm_mode_rmfb +ffffffff81abae60 T drm_framebuffer_lookup +ffffffff81abaeb0 t drm_mode_rmfb_work_fn +ffffffff81abaf80 T drm_mode_rmfb_ioctl +ffffffff81abafa0 T drm_mode_getfb +ffffffff81abb120 T drm_mode_getfb2_ioctl +ffffffff81abb510 T drm_mode_dirtyfb_ioctl +ffffffff81abb6d0 T drm_fb_release +ffffffff81abb800 T drm_framebuffer_free +ffffffff81abb840 T drm_framebuffer_init +ffffffff81abb9d0 T drm_framebuffer_unregister_private +ffffffff81abba10 T drm_framebuffer_cleanup +ffffffff81abba80 T drm_framebuffer_remove +ffffffff81abc000 T drm_framebuffer_plane_width +ffffffff81abc050 T drm_framebuffer_plane_height +ffffffff81abc0a0 T drm_framebuffer_print_info +ffffffff81abd000 T drm_ref +ffffffff81abd030 T drm_unref +ffffffff81abd0b0 T drm_fault +ffffffff81abd2d0 T drm_flush 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linux_root_RB_INSERT_COLOR +ffffffff81ac8f30 T linux_root_RB_REMOVE_COLOR +ffffffff81ac9260 T linux_root_RB_REMOVE +ffffffff81ac93b0 T linux_root_RB_INSERT +ffffffff81ac9440 T linux_root_RB_FIND +ffffffff81ac94a0 T linux_root_RB_NFIND +ffffffff81ac9500 T linux_root_RB_NEXT +ffffffff81ac9570 T linux_root_RB_PREV +ffffffff81ac95e0 T linux_root_RB_MINMAX +ffffffff81ac9630 T idr_init +ffffffff81ac9660 T idr_destroy +ffffffff81ac97c0 T idr_tree_SPLAY_REMOVE +ffffffff81ac9860 T idr_preload +ffffffff81ac9900 T idr_alloc +ffffffff81ac9ab0 T idr_tree_SPLAY_INSERT +ffffffff81ac9b60 T idr_replace +ffffffff81ac9bf0 T idr_remove +ffffffff81ac9cd0 T idr_find +ffffffff81ac9d40 T idr_get_next +ffffffff81ac9e70 T idr_for_each +ffffffff81ac9f90 T idr_cmp +ffffffff81ac9fd0 T idr_tree_SPLAY +ffffffff81aca100 T idr_tree_SPLAY_MINMAX +ffffffff81aca1f0 T ida_init +ffffffff81aca220 T ida_destroy +ffffffff81aca230 T ida_simple_get +ffffffff81aca250 T ida_simple_remove +ffffffff81aca270 T ida_alloc_min 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dma_fence_allocate_private_stub +ffffffff81acd650 T dma_fence_array_create +ffffffff81acd780 t irq_dma_fence_array_work +ffffffff81acd820 T dma_fence_array_first +ffffffff81acd870 T dma_fence_array_next +ffffffff81acd8c0 t dma_fence_array_get_driver_name +ffffffff81acd8f0 t dma_fence_array_get_timeline_name +ffffffff81acd920 t dma_fence_array_enable_signaling +ffffffff81acda30 t dma_fence_array_signaled +ffffffff81acda80 t dma_fence_array_release +ffffffff81acdb50 T dma_fence_chain_find_seqno +ffffffff81acdc80 T dma_fence_chain_walk +ffffffff81acdee0 T dma_fence_chain_init +ffffffff81acdff0 t dma_fence_chain_get_driver_name +ffffffff81ace020 t dma_fence_chain_get_timeline_name +ffffffff81ace050 t dma_fence_chain_enable_signaling +ffffffff81ace240 t dma_fence_chain_signaled +ffffffff81ace340 t dma_fence_chain_release +ffffffff81ace4a0 T dma_fence_is_container +ffffffff81ace4f0 T dmabuf_read +ffffffff81ace520 T dmabuf_write +ffffffff81ace550 T dmabuf_ioctl +ffffffff81ace580 T dmabuf_kqfilter +ffffffff81ace5b0 T dmabuf_stat +ffffffff81ace670 T dmabuf_close +ffffffff81ace700 T dmabuf_seek +ffffffff81ace7a0 T dma_buf_export +ffffffff81ace860 T dma_buf_get +ffffffff81ace900 T dma_buf_put +ffffffff81ace9b0 T dma_buf_fd +ffffffff81aceb00 T get_dma_buf +ffffffff81aceb50 T pcie_get_speed_cap +ffffffff81aced40 T printk +ffffffff81acedf0 T pcie_get_width_cap +ffffffff81acef10 T pcie_aspm_enabled +ffffffff81acefb0 T wait_on_bit +ffffffff81acf090 T wait_on_bit_timeout +ffffffff81acf160 T wake_up_bit +ffffffff81acf1b0 T clear_and_wake_up_bit +ffffffff81acf220 T bit_waitqueue +ffffffff81acf250 T __var_waitqueue +ffffffff81acf280 T drm_linux_init +ffffffff81acf4a0 T drm_linux_exit +ffffffff81acf540 T pci_resize_resource +ffffffff81acf6b0 T register_shrinker +ffffffff81acf700 T unregister_shrinker +ffffffff81acf760 T drmbackoff +ffffffff81acf810 T bitmap_zalloc +ffffffff81acf840 T bitmap_free +ffffffff81acf860 T atomic_dec_and_mutex_lock +ffffffff81acf8f0 T interval_tree_iter_first +ffffffff81acf9a0 T interval_tree_remove +ffffffff81acf9c0 T interval_tree_insert +ffffffff81acfa30 T syncfile_read +ffffffff81acfa60 T syncfile_write +ffffffff81acfa90 T syncfile_ioctl +ffffffff81acfac0 T syncfile_kqfilter +ffffffff81acfaf0 T syncfile_stat +ffffffff81acfba0 T syncfile_close +ffffffff81acfc50 T syncfile_seek +ffffffff81acfce0 T fd_install +ffffffff81acfdd0 T fput +ffffffff81acfe30 T get_unused_fd_flags +ffffffff81acff70 T put_unused_fd +ffffffff81ad0010 T sync_file_get_fence +ffffffff81ad00d0 T sync_file_create +ffffffff81ad0180 T drm_firmware_drivers_only +ffffffff81ad01b0 T memremap +ffffffff81ad0210 T memunmap +ffffffff81ad0230 T dma_tag_lookup +ffffffff81ad02a0 T dma_alloc_coherent +ffffffff81ad03a0 T dma_free_coherent +ffffffff81ad04d0 T dma_get_sgtable +ffffffff81ad05c0 T dma_map_resource +ffffffff81ad0700 T component_add +ffffffff81ad0780 T component_add_typed +ffffffff81ad0800 T component_bind_all +ffffffff81ad08a0 T component_master_add_with_match +ffffffff81ad09a0 t dma_fence_stub_get_name +ffffffff81ad09d0 t dma_fence_array_cb_func +ffffffff81ad0a50 t dma_fence_chain_cb +ffffffff81ad0b20 t dma_fence_chain_timo +ffffffff81ad1000 T drmm_kzalloc +ffffffff81ad1120 T drmm_kcalloc +ffffffff81ad1260 T drmm_kstrdup +ffffffff81ad13e0 T drmm_kfree +ffffffff81ad14f0 T drmm_add_action +ffffffff81ad15d0 T drmm_add_action_or_reset +ffffffff81ad16c0 T drm_managed_release +ffffffff81ad1790 T drmm_add_final_kfree +ffffffff81ad2000 T mipi_dsi_attach +ffffffff81ad2070 T mipi_dsi_detach +ffffffff81ad2110 T devm_mipi_dsi_attach +ffffffff81ad21a0 T mipi_dsi_packet_format_is_short +ffffffff81ad21e0 T mipi_dsi_packet_format_is_long +ffffffff81ad2220 T mipi_dsi_create_packet +ffffffff81ad2330 T mipi_dsi_shutdown_peripheral +ffffffff81ad23e0 T mipi_dsi_turn_on_peripheral +ffffffff81ad2490 T mipi_dsi_set_maximum_return_packet_size +ffffffff81ad2540 T mipi_dsi_compression_mode +ffffffff81ad25f0 T mipi_dsi_picture_parameter_set +ffffffff81ad26a0 T mipi_dsi_generic_write +ffffffff81ad2760 T mipi_dsi_generic_read +ffffffff81ad2820 T mipi_dsi_dcs_write_buffer +ffffffff81ad28e0 T mipi_dsi_dcs_write +ffffffff81ad2a40 T mipi_dsi_dcs_read +ffffffff81ad2ae0 T mipi_dsi_dcs_nop +ffffffff81ad2b90 T mipi_dsi_dcs_soft_reset +ffffffff81ad2c40 T mipi_dsi_dcs_get_power_mode +ffffffff81ad2d00 T mipi_dsi_dcs_get_pixel_format +ffffffff81ad2dc0 T mipi_dsi_dcs_enter_sleep_mode +ffffffff81ad2e70 T mipi_dsi_dcs_exit_sleep_mode +ffffffff81ad2f20 T mipi_dsi_dcs_set_display_off +ffffffff81ad2fd0 T mipi_dsi_dcs_set_display_on +ffffffff81ad3080 T mipi_dsi_dcs_set_column_address +ffffffff81ad3140 T mipi_dsi_dcs_set_page_address +ffffffff81ad3200 T mipi_dsi_dcs_set_tear_off +ffffffff81ad32b0 T mipi_dsi_dcs_set_tear_on +ffffffff81ad3370 T mipi_dsi_dcs_set_pixel_format +ffffffff81ad4000 T __drm_mm_interval_first +ffffffff81ad40c0 T drm_mm_reserve_node +ffffffff81ad4360 t add_hole +ffffffff81ad44d0 T drm_mm_insert_node_in_range +ffffffff81ad4af0 T drm_mm_remove_node +ffffffff81ad4c50 T drm_mm_replace_node +ffffffff81ad4e30 T drm_mm_scan_init_with_range +ffffffff81ad4ec0 T drm_mm_scan_add_block +ffffffff81ad5040 T drm_mm_scan_remove_block +ffffffff81ad50c0 T drm_mm_scan_color_evict +ffffffff81ad51b0 T drm_mm_init +ffffffff81ad5260 T drm_mm_takedown +ffffffff81ad52a0 T drm_mm_print +ffffffff81ad6000 T drm_modeset_register_all +ffffffff81ad60d0 T drm_modeset_unregister_all +ffffffff81ad6120 T drm_mode_getresources +ffffffff81ad6420 T drm_mode_config_reset +ffffffff81ad65c0 T drmm_mode_config_init +ffffffff81ad6d80 T drm_mode_config_cleanup +ffffffff81ad7150 t drm_mode_config_init_release +ffffffff81ad7160 T drm_mode_config_validate +ffffffff81ad8000 T __drm_mode_object_add +ffffffff81ad8120 T drm_mode_object_add +ffffffff81ad8210 T drm_mode_object_register +ffffffff81ad8270 T drm_mode_object_unregister +ffffffff81ad8330 T drm_mode_object_lease_required +ffffffff81ad8380 T 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drm_plane_from_index +ffffffff81ae4d40 T drm_plane_force_disable +ffffffff81ae4e80 T drm_mode_plane_set_obj_prop +ffffffff81ae4f10 T drm_mode_getplane_res +ffffffff81ae5050 T drm_mode_getplane +ffffffff81ae51d0 T drm_plane_check_pixel_format +ffffffff81ae5290 T drm_any_plane_has_format +ffffffff81ae53b0 T drm_mode_setplane +ffffffff81ae5720 T drm_mode_cursor_ioctl +ffffffff81ae5790 t drm_mode_cursor_common +ffffffff81ae5d60 T drm_mode_cursor2_ioctl +ffffffff81ae5d80 T drm_mode_page_flip_ioctl +ffffffff81ae63c0 T drm_plane_enable_fb_damage_clips +ffffffff81ae63e0 T drm_plane_get_damage_clips_count +ffffffff81ae6420 T __drm_plane_get_damage_clips +ffffffff81ae6460 T drm_plane_get_damage_clips +ffffffff81ae6500 T drm_create_scaling_filter_prop +ffffffff81ae6680 T drm_plane_create_scaling_filter_property +ffffffff81ae6700 t kvasprintf +ffffffff81ae67c0 t kasprintf +ffffffff81ae68a0 t create_in_format_blob +ffffffff81ae6ab0 t __setplane_atomic +ffffffff81ae6c60 t __setplane_internal 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drm_connector_helper_tv_get_modes +ffffffff81aed0b0 t __delayed_work_tick +ffffffff81aee000 T drm_property_create +ffffffff81aee220 T drm_property_create_enum +ffffffff81aee2e0 T drm_property_add_enum +ffffffff81aee510 T drm_property_destroy +ffffffff81aee5d0 T drm_property_create_bitmask +ffffffff81aee710 T drm_property_create_range +ffffffff81aee780 T drm_property_create_signed_range +ffffffff81aee7f0 T drm_property_create_object +ffffffff81aee8a0 T drm_property_create_bool +ffffffff81aee910 T drm_mode_getproperty_ioctl +ffffffff81aeeb90 T drm_property_create_blob +ffffffff81aeed00 t drm_property_free_blob +ffffffff81aeed90 T drm_property_blob_put +ffffffff81aeedd0 T drm_property_destroy_user_blobs +ffffffff81aeee60 T drm_property_blob_get +ffffffff81aeeeb0 T drm_property_lookup_blob +ffffffff81aeeed0 T drm_property_replace_global_blob +ffffffff81aef050 T drm_property_replace_blob +ffffffff81aef0c0 T drm_mode_getblob_ioctl +ffffffff81aef1a0 T drm_mode_createblob_ioctl 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drm_syncobj_array_free +ffffffff81af6250 T drm_syncobj_timeline_wait_ioctl +ffffffff81af63f0 T drm_syncobj_eventfd_ioctl +ffffffff81af6420 T drm_syncobj_reset_ioctl +ffffffff81af6520 T drm_syncobj_signal_ioctl +ffffffff81af66d0 T drm_syncobj_timeline_signal_ioctl +ffffffff81af6980 T drm_syncobj_query_ioctl +ffffffff81af6c00 t drm_syncobj_array_wait_timeout +ffffffff81af7120 t syncobj_wait_fence_func +ffffffff81af7140 t syncobj_eventfd_entry_fence_func +ffffffff81af8000 T drm_vblank_count +ffffffff81af8090 T drm_crtc_accurate_vblank_count +ffffffff81af81d0 t drm_update_vblank_count +ffffffff81af8670 T drm_vblank_disable_and_save +ffffffff81af87e0 T drm_vblank_init +ffffffff81af8990 t vblank_disable_fn +ffffffff81af8a30 t drm_vblank_init_release +ffffffff81af8ac0 T drm_dev_has_vblank +ffffffff81af8af0 T drm_crtc_vblank_waitqueue +ffffffff81af8b40 T drm_calc_timestamping_constants +ffffffff81af8d80 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff81af9330 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff81af9350 T drm_crtc_vblank_count +ffffffff81af93e0 T drm_crtc_vblank_count_and_time +ffffffff81af94b0 t drm_vblank_count_and_time +ffffffff81af9570 T drm_crtc_next_vblank_start +ffffffff81af96d0 T drm_crtc_arm_vblank_event +ffffffff81af97b0 T drm_crtc_send_vblank_event +ffffffff81af9980 t send_vblank_event +ffffffff81af9a30 T drm_vblank_get +ffffffff81af9b50 t drm_vblank_enable +ffffffff81af9da0 T drm_crtc_vblank_get +ffffffff81af9ec0 T drm_vblank_put +ffffffff81af9ff0 T drm_crtc_vblank_put +ffffffff81afa010 T drm_wait_one_vblank +ffffffff81afa580 T drm_crtc_wait_one_vblank +ffffffff81afa5a0 T drm_crtc_vblank_off +ffffffff81afaa10 T drm_crtc_vblank_reset +ffffffff81afab50 T drm_crtc_set_max_vblank_count +ffffffff81afac30 T drm_crtc_vblank_on +ffffffff81afada0 t drm_reset_vblank_timestamp +ffffffff81afafe0 T drm_crtc_vblank_restore +ffffffff81afb410 T drm_legacy_modeset_ctl_ioctl +ffffffff81afb670 T drm_wait_vblank_ioctl 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drm_vma_node_allow_once +ffffffff81afe3a0 T drm_vma_node_revoke +ffffffff81afe440 T drm_vma_node_is_allowed +ffffffff81aff000 T hdmi_avi_infoframe_init +ffffffff81aff070 T hdmi_avi_infoframe_check +ffffffff81aff0c0 T hdmi_avi_infoframe_pack_only +ffffffff81aff2d0 T hdmi_avi_infoframe_pack +ffffffff81aff330 T hdmi_spd_infoframe_init +ffffffff81aff410 T hdmi_spd_infoframe_check +ffffffff81aff460 T hdmi_spd_infoframe_pack_only +ffffffff81aff5a0 T hdmi_spd_infoframe_pack +ffffffff81aff710 T hdmi_audio_infoframe_init +ffffffff81aff760 T hdmi_audio_infoframe_check +ffffffff81aff7b0 T hdmi_audio_infoframe_pack_only +ffffffff81aff910 T hdmi_audio_infoframe_pack +ffffffff81aff960 T hdmi_audio_infoframe_pack_for_dp +ffffffff81affa50 T hdmi_vendor_infoframe_init +ffffffff81affab0 T hdmi_vendor_infoframe_check +ffffffff81affb50 T hdmi_vendor_infoframe_pack_only +ffffffff81affd10 T hdmi_vendor_infoframe_pack +ffffffff81affdb0 T hdmi_drm_infoframe_init +ffffffff81affe10 T hdmi_drm_infoframe_check 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drm_lspcon_get_mode +ffffffff81b06d80 T drm_lspcon_set_mode +ffffffff81b08000 T drm_dp_channel_eq_ok +ffffffff81b08080 T drm_dp_clock_recovery_ok +ffffffff81b080f0 T drm_dp_get_adjust_request_voltage +ffffffff81b08130 T drm_dp_get_adjust_request_pre_emphasis +ffffffff81b08180 T drm_dp_get_adjust_tx_ffe_preset +ffffffff81b081c0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff81b08240 T drm_dp_128b132b_lane_symbol_locked +ffffffff81b082b0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff81b082e0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff81b08310 T drm_dp_128b132b_link_training_failed +ffffffff81b08340 T drm_dp_read_clock_recovery_delay +ffffffff81b08450 T drm_dp_read_channel_eq_delay +ffffffff81b08560 T drm_dp_128b132b_read_aux_rd_interval +ffffffff81b08630 T drm_dp_link_train_clock_recovery_delay +ffffffff81b086c0 t __8b10b_clock_recovery_delay_us +ffffffff81b08740 T drm_dp_link_train_channel_eq_delay +ffffffff81b087b0 T drm_dp_phy_name +ffffffff81b087f0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff81b08810 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff81b08880 T drm_dp_link_rate_to_bw_code +ffffffff81b088f0 T drm_dp_bw_code_to_link_rate +ffffffff81b08950 T drm_dp_dpcd_probe +ffffffff81b08ac0 t drm_dp_dpcd_access +ffffffff81b08c30 T drm_dp_dpcd_set_powered +ffffffff81b08ca0 T drm_dp_dpcd_read +ffffffff81b08e00 T drm_dp_dpcd_write +ffffffff81b08f30 T drm_dp_dpcd_read_link_status +ffffffff81b08f50 T drm_dp_dpcd_read_phy_link_status +ffffffff81b09060 T drm_dp_downstream_is_type +ffffffff81b090b0 T drm_dp_downstream_is_tmds +ffffffff81b09120 T drm_dp_send_real_edid_checksum +ffffffff81b093c0 T drm_dp_read_dpcd_caps +ffffffff81b09580 T drm_dp_read_downstream_info +ffffffff81b09690 T drm_dp_downstream_max_dotclock +ffffffff81b096e0 T drm_dp_downstream_max_tmds_clock +ffffffff81b09780 T drm_dp_downstream_min_tmds_clock +ffffffff81b09800 T drm_dp_downstream_max_bpc +ffffffff81b098a0 T drm_dp_downstream_420_passthrough +ffffffff81b09900 T drm_dp_downstream_444_to_420_conversion +ffffffff81b09960 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff81b099c0 T drm_dp_downstream_mode +ffffffff81b09a50 T drm_dp_downstream_id +ffffffff81b09a70 T drm_dp_downstream_debug +ffffffff81b09b30 T drm_dp_subconnector_type +ffffffff81b09ba0 T drm_dp_set_subconnector_property +ffffffff81b09c10 T drm_dp_read_sink_count_cap +ffffffff81b09c60 T drm_dp_read_sink_count +ffffffff81b09cd0 T drm_dp_remote_aux_init +ffffffff81b09d00 t drm_dp_aux_crc_work +ffffffff81b09ea0 T drm_dp_aux_init +ffffffff81b09f70 T drm_dp_aux_register +ffffffff81b0a0c0 T drm_dp_aux_unregister +ffffffff81b0a0f0 T drm_dp_psr_setup_time +ffffffff81b0a140 T drm_dp_start_crc +ffffffff81b0a200 T drm_dp_stop_crc +ffffffff81b0a2b0 T drm_dp_read_desc +ffffffff81b0a4b0 T drm_dp_dsc_sink_max_slice_count +ffffffff81b0a540 T drm_dp_dsc_sink_line_buf_depth +ffffffff81b0a580 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff81b0a5f0 T drm_dp_read_lttpr_common_caps +ffffffff81b0a6c0 T drm_dp_read_lttpr_phy_caps +ffffffff81b0a790 T drm_dp_lttpr_count +ffffffff81b0a830 T drm_dp_lttpr_max_link_rate +ffffffff81b0a890 T drm_dp_lttpr_max_lane_count +ffffffff81b0a8c0 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff81b0a8f0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff81b0a920 T drm_dp_get_phy_test_pattern +ffffffff81b0aa70 T drm_dp_set_phy_test_pattern +ffffffff81b0ab40 T drm_dp_vsc_sdp_log +ffffffff81b0aea0 T drm_dp_get_pcon_max_frl_bw +ffffffff81b0aef0 T drm_dp_pcon_frl_prepare +ffffffff81b0af50 T drm_dp_pcon_is_frl_ready +ffffffff81b0afb0 T drm_dp_pcon_frl_configure_1 +ffffffff81b0b0c0 T drm_dp_pcon_frl_configure_2 +ffffffff81b0b130 T drm_dp_pcon_reset_frl_config +ffffffff81b0b190 T drm_dp_pcon_frl_enable +ffffffff81b0b260 T drm_dp_pcon_hdmi_link_active +ffffffff81b0b2c0 T drm_dp_pcon_hdmi_link_mode +ffffffff81b0b340 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff81b0b450 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff81b0b480 T drm_dp_pcon_dsc_max_slices +ffffffff81b0b510 T drm_dp_pcon_dsc_max_slice_width +ffffffff81b0b540 T drm_dp_pcon_dsc_bpp_incr +ffffffff81b0b580 T drm_dp_pcon_pps_default +ffffffff81b0b610 T drm_dp_pcon_pps_override_buf +ffffffff81b0b6d0 T drm_dp_pcon_pps_override_param +ffffffff81b0b7e0 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff81b0b890 T drm_edp_backlight_set_level +ffffffff81b0b980 T drm_edp_backlight_enable +ffffffff81b0bbd0 t drm_edp_backlight_set_enable +ffffffff81b0bd30 T drm_edp_backlight_disable +ffffffff81b0bd80 T drm_edp_backlight_init +ffffffff81b0c340 T drm_panel_dp_aux_backlight +ffffffff81b0c500 t __128b132b_channel_eq_delay_us +ffffffff81b0c580 t __8b10b_channel_eq_delay_us +ffffffff81b0c600 t drm_dp_aux_get_crc +ffffffff81b0c700 t drm_dp_i2c_xfer +ffffffff81b0c9a0 t drm_dp_i2c_functionality +ffffffff81b0c9d0 t drm_dp_i2c_do_msg +ffffffff81b0ce00 t lock_bus +ffffffff81b0ce20 t trylock_bus +ffffffff81b0ce80 t unlock_bus +ffffffff81b0cea0 t dp_aux_backlight_update_status +ffffffff81b0d000 T drm_dp_encode_sideband_req +ffffffff81b0d470 T drm_dp_decode_sideband_req +ffffffff81b0d9e0 T drm_dp_dump_sideband_msg_req_body +ffffffff81b0dde0 T drm_dp_mst_get_port_malloc +ffffffff81b0de30 T drm_dp_mst_put_port_malloc +ffffffff81b0df40 t kref_put +ffffffff81b0df80 T drm_atomic_get_mst_payload_state +ffffffff81b0dfd0 T drm_dp_mst_dpcd_read +ffffffff81b0e2f0 T drm_dp_mst_dpcd_write +ffffffff81b0e350 t drm_dp_send_dpcd_write +ffffffff81b0e5f0 T drm_dp_mst_connector_late_register +ffffffff81b0e680 T drm_dp_mst_connector_early_unregister +ffffffff81b0e6c0 T drm_dp_send_power_updown_phy +ffffffff81b0e980 t drm_dp_mst_topology_put_port +ffffffff81b0eac0 t drm_dp_mst_wait_tx_reply +ffffffff81b0eea0 T drm_dp_send_query_stream_enc_status +ffffffff81b0f1d0 T drm_dp_add_payload_part1 +ffffffff81b0f3c0 T drm_dp_remove_payload +ffffffff81b0f590 T drm_dp_add_payload_part2 +ffffffff81b0f7a0 T drm_dp_get_vc_payload_bw +ffffffff81b0f840 T drm_dp_read_mst_cap +ffffffff81b0f8a0 T drm_dp_mst_topology_mgr_set_mst +ffffffff81b0fbb0 t drm_dp_dpcd_write_payload +ffffffff81b0fd80 t drm_dp_mst_topology_put_mstb +ffffffff81b0fea0 T drm_dp_mst_topology_mgr_suspend +ffffffff81b0ffb0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff81b10020 T drm_dp_mst_topology_mgr_resume +ffffffff81b102d0 T drm_dp_mst_hpd_irq_handle_event +ffffffff81b113d0 T drm_dp_mst_hpd_irq_send_new_request +ffffffff81b11470 T drm_dp_mst_detect_port +ffffffff81b11610 T drm_dp_mst_edid_read +ffffffff81b11740 T drm_dp_mst_get_edid +ffffffff81b117d0 T drm_dp_atomic_find_time_slots +ffffffff81b11ac0 T drm_atomic_get_mst_topology_state +ffffffff81b11ad0 T drm_dp_atomic_release_time_slots +ffffffff81b11d20 T drm_dp_mst_atomic_setup_commit +ffffffff81b11eb0 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff81b12030 T drm_dp_mst_root_conn_atomic_check +ffffffff81b12160 T drm_dp_mst_update_slots +ffffffff81b121c0 T drm_dp_check_act_status +ffffffff81b123b0 T drm_dp_calc_pbn_mode +ffffffff81b12410 T drm_dp_mst_dump_topology +ffffffff81b12740 t drm_dp_mst_dump_mstb +ffffffff81b127b0 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff81b12920 T drm_dp_mst_dsc_aux_for_port +ffffffff81b12bb0 T drm_dp_mst_atomic_enable_dsc +ffffffff81b12d60 T drm_dp_mst_atomic_check +ffffffff81b13090 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff81b13350 t drm_dp_mst_duplicate_state +ffffffff81b13550 t drm_dp_mst_destroy_state +ffffffff81b13630 T drm_atomic_get_old_mst_topology_state +ffffffff81b13640 T drm_atomic_get_new_mst_topology_state +ffffffff81b13650 T drm_dp_mst_topology_mgr_init +ffffffff81b13930 t drm_dp_mst_link_probe_work +ffffffff81b13c40 t drm_dp_tx_work +ffffffff81b13c90 t drm_dp_delayed_destroy_work +ffffffff81b14240 t drm_dp_mst_up_req_work +ffffffff81b14880 T drm_dp_mst_topology_mgr_destroy +ffffffff81b14930 t drm_dp_mst_is_virtual_dpcd +ffffffff81b14a30 t drm_dp_free_mst_branch_device +ffffffff81b14a70 t drm_dp_mst_topology_get_port_validated_locked +ffffffff81b14b00 t drm_dp_mst_dump_sideband_msg_tx +ffffffff81b14d50 t process_single_down_tx_qlock +ffffffff81b14ee0 t process_single_tx_qlock +ffffffff81b153e0 t drm_dp_msg_data_crc4 +ffffffff81b15510 t drm_dp_payload_send_msg +ffffffff81b159f0 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff81b15a80 t drm_dp_get_one_sb_msg +ffffffff81b16240 t drm_dp_get_mst_branch_device +ffffffff81b163c0 t drm_dp_check_and_send_link_address +ffffffff81b164a0 t drm_dp_send_link_address +ffffffff81b172c0 t drm_dp_send_enum_path_resources +ffffffff81b17560 t drm_dp_port_set_pdt +ffffffff81b17890 t drm_dp_mst_port_add_connector +ffffffff81b17ac0 t drm_dp_mst_i2c_xfer +ffffffff81b18290 t drm_dp_mst_i2c_functionality +ffffffff81b182c0 t get_mst_branch_device_by_guid_helper +ffffffff81b19000 T drm_dsc_dp_pps_header_init +ffffffff81b19030 T drm_dsc_dp_rc_buffer_size +ffffffff81b19090 T drm_dsc_pps_payload_pack +ffffffff81b19350 T drm_dsc_set_const_params +ffffffff81b193a0 T drm_dsc_set_rc_buf_thresh +ffffffff81b19410 T drm_dsc_setup_rc_params +ffffffff81b195e0 T drm_dsc_compute_rc_parameters +ffffffff81b198e0 T drm_dsc_get_bpp_int +ffffffff81b19970 T drm_dsc_initial_scale_value +ffffffff81b199b0 T drm_dsc_flatness_det_thresh +ffffffff81b1a000 T drm_connector_attach_content_protection_property +ffffffff81b1a030 T drm_hdcp_check_ksvs_revoked +ffffffff81b1a090 T drm_hdcp_update_content_protection +ffffffff81b1b000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff81b1b120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff81b1b180 T drm_hdmi_avi_infoframe_bars +ffffffff81b1b1d0 T drm_hdmi_avi_infoframe_content_type +ffffffff81b1c000 T drm_scdc_read +ffffffff81b1c0a0 T drm_scdc_write +ffffffff81b1c1a0 T drm_scdc_get_scrambling_status +ffffffff81b1c280 T drm_scdc_set_scrambling +ffffffff81b1c440 T drm_scdc_set_high_tmds_clock_ratio +ffffffff81b1d000 T drm_gem_ttm_mmap +ffffffff81b1d080 T drm_gem_ttm_vmap +ffffffff81b1d090 T drm_gem_ttm_vunmap +ffffffff81b1e000 T ttm_agp_bind +ffffffff81b1e060 T ttm_agp_unbind +ffffffff81b1e080 T ttm_agp_is_bound +ffffffff81b1e0d0 T ttm_agp_destroy +ffffffff81b1e0f0 T ttm_agp_tt_create +ffffffff81b1f000 T ttm_bo_move_to_lru_tail +ffffffff81b1f040 T ttm_bo_set_bulk_move +ffffffff81b1f120 T ttm_bo_put +ffffffff81b1f750 T ttm_bo_eviction_valuable +ffffffff81b1f7a0 T ttm_mem_evict_first +ffffffff81b1ffe0 t ttm_bo_evict_swapout_allowable +ffffffff81b20220 t dma_resv_unlock +ffffffff81b202d0 t ttm_bo_cleanup_refs +ffffffff81b206e0 t ttm_bo_unreserve +ffffffff81b207e0 T ttm_bo_pin +ffffffff81b20890 T ttm_bo_unpin +ffffffff81b209c0 T ttm_bo_mem_space +ffffffff81b20c40 t ttm_bo_add_move_fence +ffffffff81b20d40 T ttm_bo_validate +ffffffff81b20f20 T ttm_bo_init_reserved +ffffffff81b21160 T ttm_bo_init_validate +ffffffff81b21210 T ttm_bo_unmap_virtual +ffffffff81b21370 T ttm_bo_wait_ctx +ffffffff81b21410 T ttm_bo_swapout +ffffffff81b21740 t ttm_bo_handle_move_mem +ffffffff81b21910 T ttm_bo_tt_destroy +ffffffff81b21990 t ttm_bo_delayed_delete +ffffffff81b22000 T ttm_mem_io_reserve +ffffffff81b22060 T ttm_mem_io_free +ffffffff81b220e0 T ttm_move_memcpy +ffffffff81b222e0 T ttm_bo_move_memcpy +ffffffff81b22580 T ttm_bo_move_sync_cleanup +ffffffff81b226a0 T ttm_io_prot +ffffffff81b226e0 T ttm_bo_kmap +ffffffff81b22a10 T ttm_bo_kunmap +ffffffff81b22b50 T ttm_bo_vmap +ffffffff81b22d80 T ttm_bo_vunmap +ffffffff81b22e70 T ttm_bo_move_accel_cleanup +ffffffff81b231c0 T ttm_bo_pipeline_gutting +ffffffff81b23430 t ttm_buffer_object_transfer +ffffffff81b236f0 t ttm_transfered_destroy +ffffffff81b24000 T ttm_bo_vm_reserve +ffffffff81b241c0 t dma_resv_lock_interruptible +ffffffff81b24300 T ttm_bo_vm_fault_reserved +ffffffff81b24690 T ttm_bo_vm_fault +ffffffff81b24800 T ttm_bo_vm_reference +ffffffff81b24830 T ttm_bo_vm_detach +ffffffff81b24840 T ttm_bo_mmap_obj +ffffffff81b25000 T ttm_global_swapout +ffffffff81b25100 T ttm_device_swapout +ffffffff81b25250 T ttm_device_init +ffffffff81b25570 T ttm_device_fini +ffffffff81b25790 T ttm_device_clear_dma_mappings +ffffffff81b25860 t ttm_device_clear_lru_dma_mappings +ffffffff81b26000 T ttm_eu_backoff_reservation +ffffffff81b26170 T ttm_eu_reserve_buffers +ffffffff81b26680 T ttm_eu_fence_buffer_objects +ffffffff81b26820 t __ww_mutex_lock +ffffffff81b27000 T ttm_prot_from_caching +ffffffff81b28000 T ttm_pool_alloc +ffffffff81b28b50 t ttm_pool_free_range +ffffffff81b28ed0 T ttm_pool_free +ffffffff81b28f40 t ttm_pool_shrink +ffffffff81b291a0 T ttm_pool_init +ffffffff81b29480 T ttm_pool_fini +ffffffff81b296d0 t ttm_pool_type_fini +ffffffff81b29970 T ttm_pool_mgr_init +ffffffff81b29cd0 t ttm_pool_shrinker_count +ffffffff81b29d30 t ttm_pool_shrinker_scan +ffffffff81b29d90 T ttm_pool_mgr_fini +ffffffff81b2a000 T ttm_range_man_init_nocheck +ffffffff81b2a1b0 T ttm_range_man_fini_nocheck +ffffffff81b2a380 t ttm_range_man_alloc +ffffffff81b2a510 t ttm_range_man_free +ffffffff81b2a590 t ttm_range_man_intersects +ffffffff81b2a5f0 t ttm_range_man_compatible +ffffffff81b2a650 t ttm_range_man_debug +ffffffff81b2b000 T ttm_lru_bulk_move_init +ffffffff81b2b020 T ttm_lru_bulk_move_tail +ffffffff81b2b1e0 T ttm_resource_add_bulk_move +ffffffff81b2b2b0 T ttm_resource_del_bulk_move +ffffffff81b2b3f0 T ttm_resource_move_to_lru_tail +ffffffff81b2b560 T ttm_resource_init +ffffffff81b2b660 T ttm_resource_fini +ffffffff81b2b6d0 T ttm_resource_alloc +ffffffff81b2b840 T ttm_resource_free +ffffffff81b2ba30 T ttm_resource_intersects +ffffffff81b2ba90 T ttm_resource_compatible +ffffffff81b2baf0 T ttm_resource_compat +ffffffff81b2bc90 T ttm_resource_set_bo +ffffffff81b2bcf0 T ttm_resource_manager_init +ffffffff81b2bda0 T ttm_resource_manager_evict_all +ffffffff81b2c030 T ttm_resource_manager_usage +ffffffff81b2c0a0 T ttm_resource_manager_debug +ffffffff81b2c1c0 T ttm_resource_manager_first +ffffffff81b2c250 T ttm_resource_manager_next +ffffffff81b2c370 T ttm_kmap_iter_iomap_init +ffffffff81b2c3d0 T ttm_kmap_iter_linear_io_init +ffffffff81b2c5f0 T ttm_kmap_iter_linear_io_fini +ffffffff81b2c640 T ttm_resource_manager_create_debugfs +ffffffff81b2c670 t ttm_kmap_iter_iomap_map_local +ffffffff81b2c760 t ttm_kmap_iter_iomap_unmap_local +ffffffff81b2c790 t ttm_kmap_iter_linear_io_map_local +ffffffff81b2d000 T ttm_sys_man_init +ffffffff81b2d140 t ttm_sys_man_alloc +ffffffff81b2d1d0 t ttm_sys_man_free +ffffffff81b2e000 T ttm_tt_create +ffffffff81b2e120 T ttm_tt_destroy +ffffffff81b2e140 T ttm_tt_init +ffffffff81b2e240 T ttm_tt_fini +ffffffff81b2e370 T ttm_sg_tt_init +ffffffff81b2e600 T ttm_tt_swapin +ffffffff81b2e740 T ttm_tt_swapout +ffffffff81b2e7a0 T ttm_tt_populate +ffffffff81b2e950 T ttm_tt_unpopulate +ffffffff81b2ea10 T ttm_tt_mgr_init +ffffffff81b2ea70 T ttm_kmap_iter_tt_init +ffffffff81b2ead0 T ttm_tt_pages_limit +ffffffff81b2eb00 t ttm_kmap_iter_tt_map_local +ffffffff81b2eb60 t ttm_kmap_iter_tt_unmap_local +ffffffff81b2f000 T drm_sched_entity_init +ffffffff81b2f1b0 T drm_sched_entity_modify_sched +ffffffff81b2f230 T drm_sched_entity_is_ready +ffffffff81b2f270 T drm_sched_entity_error +ffffffff81b2f2b0 T drm_sched_entity_flush +ffffffff81b2f620 t drm_sched_entity_kill +ffffffff81b2f820 T drm_sched_entity_fini +ffffffff81b2f8c0 T drm_sched_entity_destroy +ffffffff81b2f990 T drm_sched_entity_set_priority +ffffffff81b2f9e0 T drm_sched_entity_pop_job +ffffffff81b2fc90 T drm_sched_entity_select_rq +ffffffff81b2fd90 T drm_sched_entity_push_job +ffffffff81b2ff20 t drm_sched_entity_kill_jobs_cb +ffffffff81b300e0 t drm_sched_entity_kill_jobs_work +ffffffff81b30160 t drm_sched_entity_clear_dep +ffffffff81b30180 t drm_sched_entity_wakeup +ffffffff81b31000 T drm_sched_fence_slab_init +ffffffff81b31070 T drm_sched_fence_slab_fini +ffffffff81b31090 T drm_sched_fence_scheduled +ffffffff81b31100 T drm_sched_fence_finished +ffffffff81b31120 T drm_sched_fence_free +ffffffff81b311d0 T to_drm_sched_fence +ffffffff81b31230 T drm_sched_fence_alloc +ffffffff81b312b0 T drm_sched_fence_init +ffffffff81b31340 t drm_sched_fence_get_driver_name +ffffffff81b31370 t drm_sched_fence_get_timeline_name +ffffffff81b313d0 t drm_sched_fence_release_scheduled +ffffffff81b314d0 t drm_sched_fence_release_finished +ffffffff81b31510 t drm_sched_fence_set_deadline_finished +ffffffff81b32000 T drm_sched_rq_update_fifo +ffffffff81b32110 T drm_sched_rq_add_entity +ffffffff81b321a0 T drm_sched_rq_remove_entity +ffffffff81b32290 T drm_sched_fault +ffffffff81b322e0 T drm_sched_suspend_timeout +ffffffff81b32370 T drm_sched_resume_timeout +ffffffff81b32430 T drm_sched_stop +ffffffff81b32640 T drm_sched_start +ffffffff81b32790 t drm_sched_job_done_cb +ffffffff81b327b0 t drm_sched_job_done +ffffffff81b328b0 T drm_sched_resubmit_jobs +ffffffff81b32a10 T drm_sched_job_init +ffffffff81b32ab0 T drm_sched_job_arm +ffffffff81b32b50 T drm_sched_job_add_dependency +ffffffff81b32d20 T drm_sched_job_add_syncobj_dependency +ffffffff81b32d90 T drm_sched_job_add_resv_dependencies +ffffffff81b32e70 T drm_sched_job_add_implicit_dependencies +ffffffff81b32f60 T drm_sched_job_cleanup +ffffffff81b33040 T drm_sched_wakeup_if_can_queue +ffffffff81b33120 T drm_sched_pick_best +ffffffff81b331e0 T drm_sched_init +ffffffff81b334f0 t drm_sched_job_timedout +ffffffff81b33670 t drm_sched_main +ffffffff81b33bb0 T drm_sched_fini +ffffffff81b33e10 T drm_sched_increase_karma +ffffffff81b33f60 t __delayed_work_tick +ffffffff81b33f80 t drm_sched_get_cleanup_job +ffffffff81b34100 t drm_sched_select_entity +ffffffff81b35000 t ch7017_init +ffffffff81b35160 t ch7017_dpms +ffffffff81b35470 t ch7017_mode_valid +ffffffff81b354b0 t ch7017_mode_set +ffffffff81b357e0 t ch7017_detect +ffffffff81b35810 t ch7017_get_hw_state +ffffffff81b358a0 t ch7017_destroy +ffffffff81b35900 t ch7017_dump_regs +ffffffff81b36000 t ch7xxx_init +ffffffff81b362d0 t ch7xxx_dpms +ffffffff81b363b0 t ch7xxx_mode_valid +ffffffff81b363f0 t ch7xxx_mode_set +ffffffff81b369d0 t ch7xxx_detect +ffffffff81b36c50 t ch7xxx_get_hw_state +ffffffff81b36d30 t ch7xxx_destroy +ffffffff81b36d90 t ch7xxx_dump_regs +ffffffff81b37000 t ivch_init +ffffffff81b373f0 t ivch_dpms +ffffffff81b37710 t ivch_mode_valid +ffffffff81b37750 t ivch_mode_set +ffffffff81b37a30 t ivch_detect +ffffffff81b37a60 t ivch_get_hw_state +ffffffff81b37b60 t ivch_destroy +ffffffff81b37bc0 t ivch_dump_regs +ffffffff81b38880 t ivch_reset +ffffffff81b39000 t ns2501_init +ffffffff81b39220 t ns2501_dpms +ffffffff81b39ac0 t ns2501_mode_valid +ffffffff81b39ba0 t ns2501_mode_set +ffffffff81b3af00 t ns2501_detect +ffffffff81b3af30 t ns2501_get_hw_state +ffffffff81b3b010 t ns2501_destroy +ffffffff81b3c000 t sil164_init +ffffffff81b3c220 t sil164_dpms +ffffffff81b3c370 t sil164_mode_valid +ffffffff81b3c3a0 t sil164_mode_set +ffffffff81b3c550 t sil164_detect +ffffffff81b3c640 t sil164_get_hw_state +ffffffff81b3c720 t sil164_destroy +ffffffff81b3c780 t sil164_dump_regs +ffffffff81b3d000 t tfp410_init +ffffffff81b3d120 t tfp410_dpms +ffffffff81b3d270 t tfp410_mode_valid +ffffffff81b3d2a0 t tfp410_mode_set +ffffffff81b3d2d0 t tfp410_detect +ffffffff81b3d3c0 t tfp410_get_hw_state +ffffffff81b3d4a0 t tfp410_destroy +ffffffff81b3d500 t tfp410_dump_regs +ffffffff81b3e050 t tfp410_getid +ffffffff81b3f000 T vlv_get_dpll +ffffffff81b3f040 T g4x_dp_set_clock +ffffffff81b3f110 T g4x_dp_port_enabled +ffffffff81b3f340 T vlv_active_pipe +ffffffff81b3f3b0 T g4x_dp_init +ffffffff81b3f8b0 t intel_dp_hotplug +ffffffff81b3fa60 t intel_dp_get_hw_state +ffffffff81b3fb30 t intel_dp_get_config +ffffffff81b3fe20 t chv_dp_pre_pll_enable +ffffffff81b3fe60 t chv_pre_enable_dp +ffffffff81b3feb0 t vlv_enable_dp +ffffffff81b3fef0 t vlv_disable_dp +ffffffff81b3ff80 t chv_post_disable_dp +ffffffff81b40000 t chv_dp_post_pll_disable +ffffffff81b40020 t vlv_dp_pre_pll_enable +ffffffff81b40060 t vlv_pre_enable_dp +ffffffff81b400a0 t vlv_post_disable_dp +ffffffff81b400c0 t g4x_pre_enable_dp +ffffffff81b403b0 t g4x_enable_dp +ffffffff81b40410 t g4x_disable_dp +ffffffff81b404a0 t g4x_post_disable_dp +ffffffff81b406e0 t cpt_set_link_train +ffffffff81b407b0 t g4x_set_link_train +ffffffff81b40880 t chv_set_signal_levels +ffffffff81b40960 t vlv_set_signal_levels +ffffffff81b40a40 t ivb_cpu_edp_set_signal_levels +ffffffff81b40b60 t snb_cpu_edp_set_signal_levels +ffffffff81b40c80 t g4x_set_signal_levels +ffffffff81b40d90 t intel_dp_preemph_max_3 +ffffffff81b40dc0 t intel_dp_voltage_max_3 +ffffffff81b40df0 t intel_dp_preemph_max_2 +ffffffff81b40e20 t intel_dp_voltage_max_2 +ffffffff81b40e50 t g4x_digital_port_connected +ffffffff81b40ef0 t ilk_digital_port_connected +ffffffff81b40f60 t ibx_digital_port_connected +ffffffff81b40fd0 t intel_dp_encoder_reset +ffffffff81b410f0 t intel_dp_encoder_destroy +ffffffff81b41160 t intel_dp_prepare +ffffffff81b41410 t intel_enable_dp +ffffffff81b416d0 t intel_dp_link_down +ffffffff81b41a90 t assert_dp_port +ffffffff81b42000 T g4x_hdmi_connector_atomic_check +ffffffff81b421a0 T g4x_hdmi_init +ffffffff81b42580 t intel_hdmi_hotplug +ffffffff81b425e0 t g4x_hdmi_compute_config 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hsw_ips_compute_config +ffffffff81b44680 T hsw_ips_get_config +ffffffff81b44720 T hsw_ips_crtc_debugfs_add +ffffffff81b45000 T i9xx_check_plane_surface +ffffffff81b45310 T i965_plane_max_stride +ffffffff81b45380 T intel_primary_plane_create +ffffffff81b45850 t i9xx_plane_min_cdclk +ffffffff81b458c0 t i9xx_plane_max_stride +ffffffff81b45930 t hsw_primary_max_stride +ffffffff81b45990 t ilk_primary_max_stride +ffffffff81b45a00 t i830_plane_update_arm +ffffffff81b45a50 t i9xx_plane_update_noarm +ffffffff81b45b80 t i9xx_plane_update_arm +ffffffff81b45f30 t i9xx_plane_disable_arm +ffffffff81b46040 t i9xx_plane_get_hw_state +ffffffff81b46140 t i9xx_plane_check +ffffffff81b46280 t vlv_primary_async_flip +ffffffff81b46310 t vlv_primary_enable_flip_done +ffffffff81b46380 t vlv_primary_disable_flip_done +ffffffff81b463f0 t g4x_primary_async_flip +ffffffff81b46520 t bdw_primary_enable_flip_done +ffffffff81b46590 t bdw_primary_disable_flip_done +ffffffff81b46600 t ivb_primary_enable_flip_done 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ilk_program_watermarks +ffffffff81b4b1e0 t ilk_wm_merge +ffffffff81b4b4a0 t vlv_compute_pipe_wm +ffffffff81b4be90 t vlv_compute_intermediate_wm +ffffffff81b4c1e0 t vlv_initial_watermarks +ffffffff81b4c270 t vlv_atomic_update_fifo +ffffffff81b4c580 t vlv_optimize_watermarks +ffffffff81b4c650 t vlv_wm_get_hw_state_and_sanitize +ffffffff81b4d530 t _vlv_compute_pipe_wm +ffffffff81b4d850 t vlv_invalidate_wms +ffffffff81b4d9c0 t vlv_program_watermarks +ffffffff81b4e200 t chv_set_memory_dvfs +ffffffff81b4e410 t g4x_compute_pipe_wm +ffffffff81b4ed40 t g4x_compute_intermediate_wm +ffffffff81b4f1c0 t g4x_initial_watermarks +ffffffff81b4f280 t g4x_optimize_watermarks +ffffffff81b4f380 t g4x_wm_get_hw_state_and_sanitize +ffffffff81b4fd70 t _g4x_compute_pipe_wm +ffffffff81b50030 t g4x_program_watermarks +ffffffff81b50400 t pnv_update_wm +ffffffff81b50b80 t i965_update_wm +ffffffff81b50fc0 t i9xx_update_wm +ffffffff81b51810 t i845_update_wm +ffffffff81b52000 T icl_dsi_frame_update +ffffffff81b520c0 T icl_dsi_init +ffffffff81b52ac0 t gen11_dsi_pre_pll_enable +ffffffff81b52f60 t gen11_dsi_pre_enable +ffffffff81b561b0 t gen11_dsi_enable +ffffffff81b564c0 t gen11_dsi_disable +ffffffff81b56500 t gen11_dsi_post_disable +ffffffff81b57380 t gen11_dsi_get_config +ffffffff81b575d0 t gen11_dsi_sync_state +ffffffff81b57690 t gen11_dsi_compute_config +ffffffff81b57a50 t gen11_dsi_get_hw_state +ffffffff81b57c20 t gen11_dsi_initial_fastset_check +ffffffff81b57ca0 t gen11_dsi_get_power_domains +ffffffff81b57d90 t gen11_dsi_gate_clocks +ffffffff81b57e60 t gen11_dsi_is_clock_enabled +ffffffff81b57f30 t gen11_dsi_encoder_destroy +ffffffff81b57f40 t wait_for_cmds_dispatched_to_panel +ffffffff81b58430 t wait_for_header_credits +ffffffff81b585f0 t wait_for_payload_credits +ffffffff81b587b0 t gen11_dsi_mode_valid +ffffffff81b58830 t gen11_dsi_host_attach +ffffffff81b58860 t gen11_dsi_host_detach +ffffffff81b58890 t gen11_dsi_host_transfer +ffffffff81b59000 T intel_digital_connector_atomic_get_property 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lpt_enable_backlight +ffffffff81b61d20 t lpt_hz_to_pwm +ffffffff81b61d90 t pch_get_backlight +ffffffff81b61df0 t spt_hz_to_pwm +ffffffff81b61e40 t pch_setup_backlight +ffffffff81b62090 t pch_set_backlight +ffffffff81b62110 t pch_disable_backlight +ffffffff81b62230 t pch_enable_backlight +ffffffff81b624f0 t pch_hz_to_pwm +ffffffff81b62530 t ext_pwm_setup_backlight +ffffffff81b625f0 t ext_pwm_get_backlight +ffffffff81b62640 t ext_pwm_set_backlight +ffffffff81b62660 t ext_pwm_disable_backlight +ffffffff81b62680 t ext_pwm_enable_backlight +ffffffff81b626b0 t vlv_setup_backlight +ffffffff81b62940 t vlv_get_backlight +ffffffff81b629f0 t vlv_set_backlight +ffffffff81b62a80 t vlv_disable_backlight +ffffffff81b62b60 t vlv_enable_backlight +ffffffff81b62d40 t vlv_hz_to_pwm +ffffffff81b62df0 t i965_setup_backlight +ffffffff81b63060 t i9xx_get_backlight +ffffffff81b63110 t i9xx_set_backlight +ffffffff81b63270 t i965_disable_backlight +ffffffff81b63340 t i965_enable_backlight +ffffffff81b63530 t i965_hz_to_pwm +ffffffff81b63590 t i9xx_setup_backlight +ffffffff81b63910 t i9xx_disable_backlight +ffffffff81b63980 t i9xx_enable_backlight +ffffffff81b63b60 t i9xx_hz_to_pwm +ffffffff81b63bc0 t intel_pwm_setup_backlight +ffffffff81b63ce0 t intel_pwm_get_backlight +ffffffff81b63dc0 t intel_pwm_set_backlight +ffffffff81b63e80 t intel_pwm_disable_backlight +ffffffff81b63f40 t intel_pwm_enable_backlight +ffffffff81b65000 T intel_bios_encoder_port +ffffffff81b65080 t dvo_port_to_port +ffffffff81b65260 T intel_bios_dp_max_link_rate +ffffffff81b652e0 T intel_bios_dp_max_lane_count +ffffffff81b65330 T intel_bios_encoder_supports_dvi +ffffffff81b65360 T intel_bios_encoder_supports_hdmi +ffffffff81b653a0 T intel_bios_encoder_supports_dp +ffffffff81b653d0 T intel_bios_encoder_supports_edp +ffffffff81b65410 T intel_bios_encoder_supports_dsi +ffffffff81b65440 T intel_bios_encoder_is_lspcon +ffffffff81b65490 T intel_bios_hdmi_level_shift +ffffffff81b654f0 T intel_bios_hdmi_max_tmds_clock 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intel_color_init_hooks +ffffffff81b76880 t chv_color_check +ffffffff81b76dc0 t i9xx_color_commit_arm +ffffffff81b76dd0 t chv_load_luts +ffffffff81b771e0 t chv_read_luts +ffffffff81b77460 t chv_lut_equal +ffffffff81b77790 t chv_read_csc +ffffffff81b778b0 t intel_color_add_affected_planes +ffffffff81b77a30 t _check_luts +ffffffff81b77bb0 t i965_load_luts +ffffffff81b77f20 t i965_read_luts +ffffffff81b78300 t vlv_color_check +ffffffff81b787d0 t vlv_load_luts +ffffffff81b78980 t i965_lut_equal +ffffffff81b78b60 t vlv_read_csc +ffffffff81b78d40 t i9xx_color_check +ffffffff81b78ff0 t i9xx_load_luts +ffffffff81b79460 t i9xx_read_luts +ffffffff81b79810 t i9xx_lut_equal +ffffffff81b79a30 t icl_color_check +ffffffff81b79e50 t icl_color_commit_noarm +ffffffff81b7a110 t icl_color_commit_arm +ffffffff81b7a200 t icl_load_luts +ffffffff81b7aab0 t icl_read_luts +ffffffff81b7ae00 t icl_lut_equal +ffffffff81b7b180 t icl_read_csc +ffffffff81b7b440 t ilk_csc_convert_ctm +ffffffff81b7b860 t ilk_update_pipe_csc +ffffffff81b7bab0 t glk_load_degamma_lut +ffffffff81b7bd70 t ivb_load_lut_ext_max +ffffffff81b7beb0 t glk_load_lut_ext2_max +ffffffff81b7bff0 t bdw_load_lut_10 +ffffffff81b7c250 t glk_read_degamma_lut +ffffffff81b7c3d0 t bdw_read_lut_10 +ffffffff81b7c560 t ilk_read_pipe_csc +ffffffff81b7c790 t icl_color_post_update +ffffffff81b7c7c0 t glk_color_check +ffffffff81b7cd20 t skl_color_commit_noarm +ffffffff81b7cd70 t skl_color_commit_arm +ffffffff81b7cea0 t glk_load_luts +ffffffff81b7d060 t glk_read_luts +ffffffff81b7d200 t glk_lut_equal +ffffffff81b7d530 t skl_read_csc +ffffffff81b7d580 t ilk_csc_limited_range +ffffffff81b7d620 t ilk_assign_csc +ffffffff81b7d920 t ivb_color_check +ffffffff81b7e000 t bdw_load_luts +ffffffff81b7e200 t bdw_read_luts +ffffffff81b7e420 t ivb_lut_equal +ffffffff81b7e7f0 t ilk_assign_luts +ffffffff81b7ea50 t ilk_color_commit_noarm +ffffffff81b7eaa0 t hsw_color_commit_arm +ffffffff81b7eb60 t ilk_read_csc +ffffffff81b7ebb0 t ivb_load_luts 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intel_attach_broadcast_rgb_property +ffffffff81b82590 T intel_attach_aspect_ratio_property +ffffffff81b82600 T intel_attach_hdmi_colorspace_property +ffffffff81b82660 T intel_attach_dp_colorspace_property +ffffffff81b826c0 T intel_attach_scaling_mode_property +ffffffff81b83000 T intel_crt_port_enabled +ffffffff81b83090 T intel_crt_reset +ffffffff81b83190 T intel_crt_init +ffffffff81b83650 t hsw_crt_get_config +ffffffff81b83710 t hsw_crt_compute_config +ffffffff81b83820 t hsw_pre_pll_enable_crt +ffffffff81b83890 t hsw_pre_enable_crt +ffffffff81b83940 t hsw_enable_crt +ffffffff81b83b30 t hsw_disable_crt +ffffffff81b83ba0 t hsw_post_disable_crt +ffffffff81b83d90 t pch_crt_compute_config +ffffffff81b83de0 t pch_disable_crt +ffffffff81b83e10 t pch_post_disable_crt +ffffffff81b83f00 t intel_crt_compute_config +ffffffff81b83f50 t intel_disable_crt +ffffffff81b84040 t intel_crt_get_config +ffffffff81b840e0 t intel_crt_get_hw_state +ffffffff81b841b0 t intel_enable_crt +ffffffff81b842a0 t intel_spurious_crt_detect_dmi_callback +ffffffff81b84300 t intel_crt_get_modes +ffffffff81b84450 t intel_crt_detect +ffffffff81b84740 t intel_crt_mode_valid +ffffffff81b84860 t intel_crt_get_edid +ffffffff81b84940 t intel_crt_detect_hotplug +ffffffff81b84e50 t intel_crt_detect_ddc +ffffffff81b84f50 t intel_crt_load_detect +ffffffff81b86000 T intel_first_crtc +ffffffff81b86020 T intel_crtc_for_pipe +ffffffff81b86080 T intel_crtc_wait_for_next_vblank +ffffffff81b86090 T intel_wait_for_vblank_if_active +ffffffff81b86100 T intel_crtc_get_vblank_counter +ffffffff81b86190 T intel_crtc_max_vblank_count +ffffffff81b86220 T intel_crtc_vblank_on +ffffffff81b862c0 t assert_vblank_disabled +ffffffff81b863b0 T intel_crtc_vblank_off +ffffffff81b863e0 T intel_crtc_state_alloc +ffffffff81b864a0 T intel_crtc_state_reset +ffffffff81b86540 T intel_crtc_init +ffffffff81b86940 T intel_wait_for_vblank_workers +ffffffff81b86a00 T intel_usecs_to_scanlines +ffffffff81b86a50 T intel_pipe_update_start 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+ffffffff81b8c6f0 t intel_cx0_rmw +ffffffff81b8c800 T intel_c10pll_readout_hw_state +ffffffff81b8c9f0 T intel_c10pll_dump_hw_state +ffffffff81b8ccc0 T intel_cx0_phy_check_hdmi_link_rate +ffffffff81b8ce50 T intel_cx0pll_calc_state +ffffffff81b8d2a0 T intel_c20pll_readout_hw_state +ffffffff81b8d8f0 t intel_c20_sram_read +ffffffff81b8da30 T intel_c20pll_dump_hw_state +ffffffff81b8dea0 T intel_c10pll_calc_port_clock +ffffffff81b8df80 T intel_c20pll_calc_port_clock +ffffffff81b8e080 T intel_mtl_tbt_calc_port_clock +ffffffff81b8e1f0 T intel_mtl_pll_enable +ffffffff81b8fde0 T intel_mtl_pll_disable +ffffffff81b90300 T intel_mtl_port_pll_type +ffffffff81b90390 T intel_c10pll_state_verify +ffffffff81b906d0 t __intel_cx0_read +ffffffff81b90b20 t __intel_cx0_write +ffffffff81b90ef0 t intel_cx0_bus_reset +ffffffff81b91040 t intel_cx0_wait_for_ack +ffffffff81b911f0 t intel_cx0_powerdown_change_sequence +ffffffff81b914a0 t intel_c20_sram_write +ffffffff81b92000 T hsw_prepare_dp_ddi_buffers +ffffffff81b921d0 T intel_wait_ddi_buf_idle +ffffffff81b92420 T intel_ddi_set_dp_msa +ffffffff81b92610 T intel_ddi_enable_transcoder_func +ffffffff81b92700 t intel_ddi_transcoder_func_reg_val_get +ffffffff81b929c0 T intel_ddi_disable_transcoder_func +ffffffff81b92be0 T intel_ddi_toggle_hdcp_bits +ffffffff81b92d40 T intel_ddi_connector_get_hw_state +ffffffff81b92eb0 T intel_ddi_get_hw_state +ffffffff81b92f30 t intel_ddi_get_encoder_pipes +ffffffff81b933f0 T intel_ddi_enable_transcoder_clock +ffffffff81b934c0 T intel_ddi_disable_transcoder_clock +ffffffff81b93530 T intel_ddi_level +ffffffff81b93750 T icl_ddi_combo_get_pll +ffffffff81b937e0 T hsw_ddi_enable_clock +ffffffff81b938a0 T hsw_ddi_disable_clock +ffffffff81b938e0 T hsw_ddi_is_clock_enabled +ffffffff81b93950 T intel_ddi_enable_clock +ffffffff81b93990 T intel_ddi_disable_clock +ffffffff81b939d0 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff81b93be0 T dp_tp_ctl_reg +ffffffff81b93c60 T dp_tp_status_reg +ffffffff81b93ce0 T intel_ddi_update_pipe +ffffffff81b93d80 T intel_ddi_update_active_dpll +ffffffff81b93ea0 T intel_ddi_compute_min_voltage_level +ffffffff81b93f20 T intel_ddi_get_clock +ffffffff81b94040 T intel_ddi_port_pll_type +ffffffff81b94080 T hsw_ddi_get_config +ffffffff81b94190 t intel_ddi_get_config +ffffffff81b94c00 T intel_ddi_init +ffffffff81b95ad0 t intel_ddi_hotplug +ffffffff81b95fb0 t intel_ddi_compute_output_type +ffffffff81b96030 t intel_ddi_compute_config +ffffffff81b961b0 t intel_ddi_compute_config_late +ffffffff81b964a0 t intel_enable_ddi +ffffffff81b96f30 t intel_ddi_pre_pll_enable +ffffffff81b97170 t intel_ddi_pre_enable +ffffffff81b983e0 t intel_disable_ddi +ffffffff81b985e0 t intel_ddi_post_pll_disable +ffffffff81b986e0 t intel_ddi_post_disable +ffffffff81b98c40 t intel_ddi_sync_state +ffffffff81b98d10 t intel_ddi_initial_fastset_check +ffffffff81b98df0 t intel_ddi_encoder_suspend +ffffffff81b98e00 t intel_ddi_encoder_shutdown +ffffffff81b98e30 t intel_ddi_get_power_domains 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intel_ddi_encoder_reset +ffffffff81b9d2b0 t intel_ddi_encoder_destroy +ffffffff81b9d3a0 t intel_ddi_encoder_late_register +ffffffff81b9d400 t mtl_ddi_enable_d2d +ffffffff81b9d600 t intel_wait_ddi_buf_active +ffffffff81b9d980 t intel_ddi_main_link_aux_domain +ffffffff81b9da80 t icl_program_mg_dp_mode +ffffffff81b9ddb0 t intel_ddi_init_dp_buf_reg +ffffffff81b9dfd0 t intel_disable_ddi_buf +ffffffff81b9e1b0 t mtl_disable_ddi_buf +ffffffff81b9e650 t intel_ddi_disable_fec_state +ffffffff81b9e7b0 t mtl_ddi_prepare_link_retrain +ffffffff81b9eb50 t intel_ddi_prepare_link_retrain +ffffffff81b9f0e0 t intel_ddi_set_link_train +ffffffff81b9f240 t intel_ddi_set_idle_link_train +ffffffff81b9f430 t intel_ddi_dp_voltage_max +ffffffff81b9f4f0 t intel_ddi_dp_preemph_max +ffffffff81ba0000 T is_hobl_buf_trans +ffffffff81ba0040 T intel_ddi_buf_trans_init +ffffffff81ba0330 t mtl_get_cx0_buf_trans +ffffffff81ba0430 t dg2_get_snps_buf_trans +ffffffff81ba04b0 t adlp_get_combo_buf_trans +ffffffff81ba05d0 t adlp_get_dkl_buf_trans +ffffffff81ba0630 t adls_get_combo_buf_trans +ffffffff81ba0750 t rkl_get_combo_buf_trans +ffffffff81ba0870 t dg1_get_combo_buf_trans +ffffffff81ba0990 t tgl_get_combo_buf_trans +ffffffff81ba0ad0 t tgl_get_dkl_buf_trans +ffffffff81ba0b30 t jsl_get_combo_buf_trans +ffffffff81ba0bd0 t ehl_get_combo_buf_trans +ffffffff81ba0c70 t icl_get_combo_buf_trans +ffffffff81ba0d20 t icl_get_mg_buf_trans +ffffffff81ba0d80 t bxt_get_buf_trans +ffffffff81ba0e00 t kbl_y_get_buf_trans +ffffffff81ba0ea0 t kbl_u_get_buf_trans +ffffffff81ba0f40 t kbl_get_buf_trans +ffffffff81ba0fe0 t skl_y_get_buf_trans +ffffffff81ba1080 t skl_u_get_buf_trans +ffffffff81ba1120 t skl_get_buf_trans +ffffffff81ba11c0 t bdw_get_buf_trans +ffffffff81ba1250 t hsw_get_buf_trans +ffffffff81ba2000 T vlv_get_hpll_vco +ffffffff81ba2050 T vlv_get_cck_clock +ffffffff81ba2100 T vlv_get_cck_clock_hpll +ffffffff81ba2220 T intel_update_czclk +ffffffff81ba22b0 T is_trans_port_sync_master +ffffffff81ba22e0 T is_trans_port_sync_mode +ffffffff81ba2320 T intel_crtc_bigjoiner_slave_pipes +ffffffff81ba2380 T intel_crtc_is_bigjoiner_slave +ffffffff81ba23e0 T intel_crtc_is_bigjoiner_master +ffffffff81ba2440 T intel_master_crtc +ffffffff81ba24e0 T assert_transcoder +ffffffff81ba26e0 t transcoder_name +ffffffff81ba2720 T vlv_wait_port_ready +ffffffff81ba2880 T intel_enable_transcoder +ffffffff81ba2b60 t assert_planes_disabled +ffffffff81ba2cb0 T intel_disable_transcoder +ffffffff81ba2f10 T intel_rotation_info_size +ffffffff81ba2f60 T intel_remapped_info_size +ffffffff81ba3090 T intel_plane_uses_fence +ffffffff81ba30e0 T intel_fb_xy_to_linear +ffffffff81ba3130 T intel_add_fb_offsets +ffffffff81ba3180 T intel_plane_fb_max_stride +ffffffff81ba3210 T intel_set_plane_visible +ffffffff81ba3260 T intel_plane_fixup_bitmasks +ffffffff81ba3310 T intel_plane_disable_noatomic +ffffffff81ba3530 T intel_plane_fence_y_offset +ffffffff81ba35a0 T intel_has_pending_fb_unpin +ffffffff81ba36b0 T intel_get_crtc_new_encoder +ffffffff81ba3850 T ilk_pfit_disable +ffffffff81ba3910 T intel_phy_is_combo +ffffffff81ba3980 T intel_phy_is_tc +ffffffff81ba39f0 T intel_phy_is_snps +ffffffff81ba3a40 T intel_port_to_phy +ffffffff81ba3af0 T intel_port_to_tc +ffffffff81ba3c00 T intel_aux_power_domain +ffffffff81ba3c50 T intel_modeset_get_crtc_power_domains +ffffffff81ba3e90 T intel_modeset_put_crtc_power_domains +ffffffff81ba3ec0 T intel_encoder_destroy +ffffffff81ba3f00 T intel_encoder_get_config +ffffffff81ba3f40 t intel_crtc_readout_derived_state +ffffffff81ba43b0 T intel_link_compute_m_n +ffffffff81ba44e0 T intel_panel_sanitize_ssc +ffffffff81ba45d0 T intel_zero_m_n +ffffffff81ba4610 T intel_set_m_n +ffffffff81ba46f0 T intel_cpu_transcoder_has_m2_n2 +ffffffff81ba4750 T intel_cpu_transcoder_set_m1_n1 +ffffffff81ba4940 T intel_cpu_transcoder_set_m2_n2 +ffffffff81ba4ab0 T i9xx_set_pipeconf +ffffffff81ba4c70 T ilk_set_pipeconf +ffffffff81ba4e50 T bdw_get_pipe_misc_bpp +ffffffff81ba4f30 T ilk_get_lanes_required +ffffffff81ba4f90 T intel_get_m_n +ffffffff81ba50c0 T intel_cpu_transcoder_get_m1_n1 +ffffffff81ba5290 T intel_cpu_transcoder_get_m2_n2 +ffffffff81ba5420 T intel_crtc_get_pipe_config +ffffffff81ba54a0 T i9xx_crtc_clock_get +ffffffff81ba5770 T intel_dotclock_calculate +ffffffff81ba57d0 T intel_crtc_dotclock +ffffffff81ba58a0 T intel_encoder_current_mode +ffffffff81ba5aa0 T intel_fuzzy_clock_check +ffffffff81ba5af0 T intel_pipe_config_compare +ffffffff81ba9560 t pipe_config_mismatch +ffffffff81ba9660 t pipe_config_infoframe_mismatch +ffffffff81ba9850 T intel_modeset_all_pipes +ffffffff81ba9a80 T intel_atomic_add_affected_planes +ffffffff81ba9b60 T intel_calc_active_pipes +ffffffff81ba9bf0 T intel_atomic_check +ffffffff81babf30 t copy_bigjoiner_crtc_state_nomodeset +ffffffff81bac060 t intel_atomic_check_planes +ffffffff81bacb50 t intel_modeset_checks +ffffffff81bacce0 t intel_atomic_check_crtcs +ffffffff81bad170 t intel_async_flip_check_hw +ffffffff81bad660 T intel_crtc_arm_fifo_underrun +ffffffff81bad700 T intel_atomic_helper_free_state_worker +ffffffff81bad780 T intel_atomic_commit +ffffffff81badb80 t intel_atomic_commit_ready +ffffffff81badc10 t intel_atomic_commit_work +ffffffff81badc30 t intel_atomic_commit_tail +ffffffff81baf0b0 T intel_plane_destroy +ffffffff81baf0f0 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81baf170 T assert_port_valid +ffffffff81baf1f0 T intel_setup_outputs +ffffffff81bafc70 T intel_mode_valid +ffffffff81bafdf0 T intel_cpu_transcoder_mode_valid +ffffffff81bafeb0 T intel_mode_valid_max_plane_size +ffffffff81baff30 T intel_init_display_hooks +ffffffff81baffb0 T intel_initial_commit +ffffffff81bb01c0 T i830_enable_pipe +ffffffff81bb0940 T i830_disable_pipe +ffffffff81bb0cd0 T intel_hpd_poll_fini +ffffffff81bb0e10 T intel_scanout_needs_vtd_wa +ffffffff81bb0e50 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81bb0ff0 t intel_atomic_cleanup_work +ffffffff81bb1120 t intel_pre_plane_update +ffffffff81bb1730 t hsw_get_pipe_config +ffffffff81bb2520 t hsw_crtc_enable +ffffffff81bb30d0 t hsw_crtc_disable +ffffffff81bb3430 t skl_commit_modeset_enables +ffffffff81bb3a70 t intel_get_transcoder_timings +ffffffff81bb3dc0 t intel_get_pipe_src_size +ffffffff81bb3ef0 t ilk_get_pfit_config +ffffffff81bb4090 t enabled_bigjoiner_pipes +ffffffff81bb4300 t bdw_set_pipe_misc +ffffffff81bb4460 t ilk_pfit_enable +ffffffff81bb4590 t intel_set_transcoder_timings +ffffffff81bb4990 t intel_update_crtc +ffffffff81bb50e0 t intel_commit_modeset_enables +ffffffff81bb5220 t ilk_get_pipe_config +ffffffff81bb54c0 t ilk_crtc_enable +ffffffff81bb5940 t ilk_crtc_disable +ffffffff81bb5c20 t i9xx_get_pipe_config +ffffffff81bb64a0 t valleyview_crtc_enable +ffffffff81bb69c0 t i9xx_crtc_disable +ffffffff81bb6de0 t i9xx_pfit_enable +ffffffff81bb6f80 t i9xx_crtc_enable +ffffffff81bb8000 T intel_display_device_probe +ffffffff81bb8290 T intel_display_device_info_runtime_init +ffffffff81bb8920 T intel_display_device_info_print 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bdw_disable_pipe_irq +ffffffff81bbb680 T ibx_display_interrupt_update +ffffffff81bbb7c0 T ibx_enable_display_interrupt +ffffffff81bbb7e0 T ibx_disable_display_interrupt +ffffffff81bbb8c0 T i915_pipestat_enable_mask +ffffffff81bbba80 T i915_enable_pipestat +ffffffff81bbbc20 T i915_disable_pipestat +ffffffff81bbbdc0 T i915_enable_asle_pipestat +ffffffff81bbbe80 T i9xx_pipestat_irq_reset +ffffffff81bbc030 T i9xx_pipestat_irq_ack +ffffffff81bbc1d0 T i8xx_pipestat_irq_handler +ffffffff81bbc470 t i9xx_pipe_crc_irq_handler +ffffffff81bbc5e0 T i915_pipestat_irq_handler +ffffffff81bbc8c0 T i965_pipestat_irq_handler +ffffffff81bbcba0 T valleyview_pipestat_irq_handler +ffffffff81bbcd80 T ilk_display_irq_handler +ffffffff81bbd370 t cpt_irq_handler +ffffffff81bbd760 T ivb_display_irq_handler +ffffffff81bbde10 T gen8_de_pipe_underrun_mask +ffffffff81bbde50 T gen8_de_irq_handler +ffffffff81bbebe0 T gen11_gu_misc_irq_ack +ffffffff81bbec30 T gen11_gu_misc_irq_handler +ffffffff81bbec70 T gen11_display_irq_handler +ffffffff81bbed00 T i8xx_enable_vblank +ffffffff81bbed90 T i915gm_enable_vblank +ffffffff81bbee60 T i965_enable_vblank +ffffffff81bbeef0 T ilk_enable_vblank +ffffffff81bbefc0 T bdw_enable_vblank +ffffffff81bbf1d0 T i8xx_disable_vblank +ffffffff81bbf240 T i915gm_disable_vblank +ffffffff81bbf320 T i965_disable_vblank +ffffffff81bbf390 T ilk_disable_vblank +ffffffff81bbf4b0 T bdw_disable_vblank +ffffffff81bbf680 T vlv_display_irq_reset +ffffffff81bbf7a0 T vlv_display_irq_postinstall +ffffffff81bbf910 T gen8_display_irq_reset +ffffffff81bbfae0 T gen11_display_irq_reset +ffffffff81bbfe10 T gen8_irq_power_well_post_enable +ffffffff81bbffb0 T gen8_irq_power_well_pre_disable +ffffffff81bc0100 T valleyview_enable_display_irqs +ffffffff81bc0260 T valleyview_disable_display_irqs +ffffffff81bc03b0 T ilk_de_irq_postinstall +ffffffff81bc04d0 T gen8_de_irq_postinstall +ffffffff81bc09b0 T gen11_de_irq_postinstall +ffffffff81bc0a30 T dg1_de_irq_postinstall +ffffffff81bc0ab0 T intel_display_irq_init +ffffffff81bc1000 T intel_display_power_domain_str +ffffffff81bc1070 T __intel_display_power_is_enabled +ffffffff81bc1150 T intel_display_power_is_enabled +ffffffff81bc1290 T intel_display_power_set_target_dc_state +ffffffff81bc13e0 T intel_display_power_get +ffffffff81bc1480 t __intel_display_power_get_domain +ffffffff81bc1690 T intel_display_power_get_if_enabled +ffffffff81bc1810 T __intel_display_power_put_async +ffffffff81bc1a40 t __intel_display_power_put_domain +ffffffff81bc1be0 T intel_display_power_flush_work +ffffffff81bc1d30 t release_async_put_domains +ffffffff81bc1e40 T intel_display_power_put_unchecked +ffffffff81bc1eb0 T intel_display_power_get_in_set +ffffffff81bc1fb0 T intel_display_power_get_in_set_if_enabled +ffffffff81bc2070 T intel_display_power_put_mask_in_set +ffffffff81bc2160 T intel_power_domains_init +ffffffff81bc23e0 t intel_display_power_put_async_work +ffffffff81bc26b0 T intel_power_domains_cleanup +ffffffff81bc26d0 T gen9_dbuf_slices_update +ffffffff81bc2930 T intel_power_domains_init_hw +ffffffff81bc2fa0 t icl_display_core_init +ffffffff81bc38b0 t bxt_display_core_init +ffffffff81bc3a60 t vlv_cmnlane_wa +ffffffff81bc3b70 t assert_ved_power_gated +ffffffff81bc3c40 t hsw_assert_cdclk +ffffffff81bc3d80 t intel_pch_reset_handshake +ffffffff81bc3e30 T intel_power_domains_driver_remove +ffffffff81bc3f50 T intel_power_domains_sanitize_state +ffffffff81bc4070 T intel_power_domains_enable +ffffffff81bc40e0 T intel_power_domains_disable +ffffffff81bc41c0 T intel_power_domains_suspend +ffffffff81bc4420 t icl_display_core_uninit +ffffffff81bc4580 t bxt_display_core_uninit +ffffffff81bc4680 T intel_power_domains_resume +ffffffff81bc4780 T intel_display_power_suspend_late +ffffffff81bc4880 t hsw_enable_pc8 +ffffffff81bc57b0 T intel_display_power_resume_early +ffffffff81bc58c0 t hsw_disable_pc8 +ffffffff81bc5dd0 T intel_display_power_suspend +ffffffff81bc5e60 T intel_display_power_resume +ffffffff81bc5f80 T intel_display_power_debug +ffffffff81bc6080 T intel_display_power_ddi_io_domain +ffffffff81bc6180 T intel_display_power_ddi_lanes_domain +ffffffff81bc6280 T intel_display_power_aux_io_domain +ffffffff81bc6390 T intel_display_power_legacy_aux_domain +ffffffff81bc64a0 T intel_display_power_tbt_aux_domain +ffffffff81bc65b0 t __delayed_work_tick +ffffffff81bc7000 T intel_display_power_map_init +ffffffff81bc7180 t __set_power_wells +ffffffff81bc7580 T intel_display_power_map_cleanup +ffffffff81bc8000 T lookup_power_well +ffffffff81bc80c0 T intel_power_well_enable +ffffffff81bc8160 T intel_power_well_name +ffffffff81bc81a0 T intel_power_well_disable +ffffffff81bc8210 T intel_power_well_sync_hw +ffffffff81bc8290 T intel_power_well_get +ffffffff81bc8340 T intel_power_well_put +ffffffff81bc8440 T intel_power_well_is_enabled +ffffffff81bc8460 T intel_power_well_is_enabled_cached +ffffffff81bc8490 T intel_display_power_well_is_enabled +ffffffff81bc8550 T intel_power_well_is_always_on +ffffffff81bc8590 T intel_power_well_domains +ffffffff81bc85c0 T intel_power_well_refcount +ffffffff81bc85f0 T gen9_sanitize_dc_state +ffffffff81bc86d0 T gen9_set_dc_state +ffffffff81bc8aa0 T gen9_enable_dc5 +ffffffff81bc8d60 T skl_enable_dc6 +ffffffff81bc8ef0 T bxt_enable_dc9 +ffffffff81bc90f0 T bxt_disable_dc9 +ffffffff81bc9210 T gen9_disable_dc_states +ffffffff81bc9650 T chv_phy_powergate_ch +ffffffff81bc9780 t assert_chv_phy_status +ffffffff81bc9b70 T chv_phy_powergate_lanes +ffffffff81bc9e30 t i9xx_power_well_sync_hw_noop +ffffffff81bc9e60 t i9xx_always_on_power_well_noop +ffffffff81bc9e90 t i9xx_always_on_power_well_enabled +ffffffff81bc9ec0 t chv_pipe_power_well_sync_hw +ffffffff81bc9ef0 t chv_pipe_power_well_enable +ffffffff81bc9f30 t chv_pipe_power_well_disable +ffffffff81bc9fc0 t chv_pipe_power_well_enabled +ffffffff81bca0e0 t chv_dpio_cmn_power_well_enable +ffffffff81bca360 t chv_dpio_cmn_power_well_disable +ffffffff81bca4c0 t vlv_power_well_enabled +ffffffff81bca600 t i830_pipes_power_well_sync_hw +ffffffff81bca710 t i830_pipes_power_well_enable +ffffffff81bca7e0 t i830_pipes_power_well_disable +ffffffff81bca820 t i830_pipes_power_well_enabled +ffffffff81bca8d0 t hsw_power_well_sync_hw +ffffffff81bca9e0 t hsw_power_well_enable +ffffffff81bcaca0 t hsw_power_well_disable +ffffffff81bcad70 t hsw_power_well_enabled +ffffffff81bcae70 t gen9_dc_off_power_well_enable +ffffffff81bcae80 t gen9_dc_off_power_well_disable +ffffffff81bcaf30 t gen9_dc_off_power_well_enabled +ffffffff81bcafd0 t bxt_dpio_cmn_power_well_enable +ffffffff81bcb000 t bxt_dpio_cmn_power_well_disable +ffffffff81bcb030 t bxt_dpio_cmn_power_well_enabled +ffffffff81bcb060 t vlv_display_power_well_enable +ffffffff81bcb0a0 t vlv_display_power_well_disable +ffffffff81bcb140 t vlv_dpio_cmn_power_well_enable +ffffffff81bcb1e0 t vlv_dpio_cmn_power_well_disable +ffffffff81bcb310 t vlv_power_well_enable +ffffffff81bcb330 t vlv_power_well_disable +ffffffff81bcb350 t icl_aux_power_well_enable +ffffffff81bcbb20 t icl_aux_power_well_disable +ffffffff81bcbdf0 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81bcbe10 t tgl_tc_cold_off_power_well_enable +ffffffff81bcbe30 t tgl_tc_cold_off_power_well_disable +ffffffff81bcbe50 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81bcbe80 t xelpdp_aux_power_well_enable +ffffffff81bcbf60 t xelpdp_aux_power_well_disable +ffffffff81bcc040 t xelpdp_aux_power_well_enabled +ffffffff81bcc100 t chv_set_pipe_power_well +ffffffff81bcc360 t vlv_display_power_well_init +ffffffff81bcc780 t vlv_set_power_well +ffffffff81bcca00 t hsw_wait_for_power_well_enable +ffffffff81bccb60 t hsw_wait_for_power_well_disable +ffffffff81bcce80 t tgl_tc_cold_request +ffffffff81bce000 T intel_display_reset_prepare +ffffffff81bce240 T intel_display_reset_finish +ffffffff81bcf000 T intel_display_rps_boost_after_vblank +ffffffff81bcf140 t do_rps_boost +ffffffff81bcf200 T intel_display_rps_mark_interactive +ffffffff81bd0000 T intel_dkl_phy_init +ffffffff81bd0020 T intel_dkl_phy_read +ffffffff81bd0170 T intel_dkl_phy_write +ffffffff81bd02a0 T intel_dkl_phy_rmw +ffffffff81bd0400 T intel_dkl_phy_posting_read +ffffffff81bd1000 T intel_dmc_has_payload +ffffffff81bd1050 T intel_dmc_enable_pipe +ffffffff81bd1180 T intel_dmc_disable_pipe +ffffffff81bd12b0 T intel_dmc_load_program +ffffffff81bd1bb0 t pipedmc_clock_gating_wa +ffffffff81bd1e00 T intel_dmc_disable_program +ffffffff81bd2060 T assert_dmc_loaded +ffffffff81bd2220 T intel_dmc_init +ffffffff81bd2510 t dmc_load_work_fn +ffffffff81bd2ef0 T intel_dmc_suspend +ffffffff81bd2f80 T intel_dmc_resume +ffffffff81bd3030 T intel_dmc_fini +ffffffff81bd31c0 T intel_dmc_print_error_state +ffffffff81bd32d0 T intel_dmc_debugfs_register +ffffffff81bd4000 T intel_dp_is_edp +ffffffff81bd4030 T intel_dp_is_uhbr +ffffffff81bd4070 T intel_dp_max_lane_count +ffffffff81bd40e0 T intel_dp_link_required +ffffffff81bd4120 T intel_dp_max_data_rate +ffffffff81bd4180 T intel_dp_can_bigjoiner +ffffffff81bd41f0 T intel_dp_get_link_train_fallback_values +ffffffff81bd45f0 T intel_dp_mode_to_fec_clock +ffffffff81bd4640 T intel_dp_dsc_nearest_valid_bpp +ffffffff81bd4750 T intel_dp_dsc_get_output_bpp +ffffffff81bd4880 T intel_dp_dsc_get_slice_count +ffffffff81bd4a30 T intel_dp_min_bpp +ffffffff81bd4a70 T intel_dp_need_bigjoiner +ffffffff81bd4ae0 T intel_dp_source_supports_tps3 +ffffffff81bd4b30 T intel_dp_source_supports_tps4 +ffffffff81bd4b70 T intel_dp_max_link_rate +ffffffff81bd4c30 T intel_dp_rate_select +ffffffff81bd4cd0 T intel_dp_compute_rate +ffffffff81bd4db0 T intel_dp_has_hdmi_sink +ffffffff81bd4df0 T intel_dp_adjust_compliance_config +ffffffff81bd4f40 T intel_dp_dsc_compute_bpp +ffffffff81bd5000 T intel_dp_dsc_compute_config +ffffffff81bd5760 T intel_dp_limited_color_range +ffffffff81bd57d0 T intel_dp_compute_psr_vsc_sdp +ffffffff81bd5850 T intel_dp_needs_vsc_sdp +ffffffff81bd58a0 t intel_dp_compute_vsc_colorimetry +ffffffff81bd5a20 T intel_dp_compute_config +ffffffff81bd5ef0 t intel_dp_compute_output_format +ffffffff81bd6150 t intel_dp_audio_compute_config +ffffffff81bd6240 t intel_dp_drrs_compute_config +ffffffff81bd6430 t intel_dp_compute_vsc_sdp +ffffffff81bd64e0 t intel_dp_compute_hdr_metadata_infoframe_sdp +ffffffff81bd6590 T intel_dp_set_link_params +ffffffff81bd65d0 T intel_edp_backlight_on +ffffffff81bd6680 T intel_edp_backlight_off +ffffffff81bd6730 T intel_dp_sink_set_decompression_state +ffffffff81bd67e0 T intel_dp_wait_source_oui +ffffffff81bd68e0 T intel_dp_set_power +ffffffff81bd6b60 T intel_dp_sync_state +ffffffff81bd6bf0 t intel_dp_get_dpcd +ffffffff81bd6d90 t intel_dp_reset_max_link_params +ffffffff81bd6eb0 T intel_dp_initial_fastset_check +ffffffff81bd7000 T intel_dp_check_frl_training +ffffffff81bd7690 T intel_dp_pcon_dsc_configure +ffffffff81bd78c0 T intel_dp_configure_protocol_converter +ffffffff81bd7ab0 T intel_dp_get_colorimetry_status +ffffffff81bd7b20 T intel_edp_fixup_vbt_bpp +ffffffff81bd7bb0 T intel_write_dp_vsc_sdp +ffffffff81bd7d60 T intel_dp_set_infoframes +ffffffff81bd7ea0 t intel_write_dp_sdp +ffffffff81bd81a0 T intel_read_dp_sdp +ffffffff81bd84f0 T intel_dp_get_active_pipes +ffffffff81bd8750 T intel_dp_retrain_link +ffffffff81bd8ac0 t intel_dp_needs_link_retrain +ffffffff81bd8c70 T intel_dp_phy_test +ffffffff81bd9440 T intel_digital_port_connected +ffffffff81bd9510 T intel_dp_encoder_flush_work +ffffffff81bd9590 T intel_dp_encoder_suspend +ffffffff81bd95d0 T intel_dp_encoder_shutdown +ffffffff81bd9610 T intel_dp_hpd_pulse +ffffffff81bd9da0 T intel_dp_is_port_edp +ffffffff81bd9e30 T intel_dp_init_connector +ffffffff81bdb260 t intel_dp_modeset_retry_work_fn +ffffffff81bdb320 t intel_dp_set_common_rates +ffffffff81bdb4c0 T intel_dp_mst_suspend +ffffffff81bdb570 T intel_dp_mst_resume +ffffffff81bdb640 t intel_dp_output_format +ffffffff81bdb780 t intel_dp_compute_link_config +ffffffff81bdbfe0 t intel_dp_tmds_clock_valid +ffffffff81bdc080 t intel_dp_set_sink_rates +ffffffff81bdc2e0 t intel_dp_check_device_service_irq +ffffffff81bdc990 t intel_dp_force +ffffffff81bdcaf0 t intel_dp_connector_register +ffffffff81bdcbf0 t intel_dp_connector_unregister +ffffffff81bdcc50 t intel_dp_oob_hotplug_event +ffffffff81bdcce0 t intel_dp_set_edid +ffffffff81bdd190 t intel_dp_get_modes +ffffffff81bdd2a0 t intel_dp_detect +ffffffff81bddc70 t intel_dp_mode_valid +ffffffff81bde070 t intel_dp_connector_atomic_check +ffffffff81bde480 t intel_dp_get_dsc_sink_cap +ffffffff81bde610 t intel_dp_mode_min_output_bpp +ffffffff81bde680 t intel_dp_mode_valid_downstream +ffffffff81bde870 t icl_max_source_rate +ffffffff81bdf000 T intel_dp_aux_pack +ffffffff81bdf070 T intel_dp_aux_fini +ffffffff81bdf090 T intel_dp_aux_init +ffffffff81bdf2b0 t xelpdp_aux_ctl_reg +ffffffff81bdf390 t xelpdp_aux_data_reg +ffffffff81bdf470 t tgl_aux_ctl_reg +ffffffff81bdf500 t tgl_aux_data_reg +ffffffff81bdf5a0 t skl_aux_ctl_reg +ffffffff81bdf630 t skl_aux_data_reg +ffffffff81bdf6d0 t ilk_aux_ctl_reg +ffffffff81bdf750 t ilk_aux_data_reg +ffffffff81bdf7e0 t g4x_aux_ctl_reg +ffffffff81bdf870 t g4x_aux_data_reg +ffffffff81bdf910 t skl_get_aux_clock_divider +ffffffff81bdf940 t hsw_get_aux_clock_divider +ffffffff81bdf9d0 t ilk_get_aux_clock_divider +ffffffff81bdfa30 t g4x_get_aux_clock_divider +ffffffff81bdfa80 t skl_get_aux_send_ctl +ffffffff81bdfb00 t g4x_get_aux_send_ctl +ffffffff81bdfb60 t kasprintf +ffffffff81bdfc40 t intel_dp_aux_transfer +ffffffff81bdff00 T intel_dp_aux_ch +ffffffff81be0080 T intel_dp_aux_irq_handler +ffffffff81be0120 t intel_dp_aux_xfer +ffffffff81be1000 T intel_dp_aux_init_backlight_funcs +ffffffff81be1290 t intel_dp_aux_hdr_setup_backlight +ffffffff81be1430 t intel_dp_aux_hdr_get_backlight +ffffffff81be15e0 t intel_dp_aux_hdr_set_backlight +ffffffff81be16f0 t intel_dp_aux_hdr_disable_backlight +ffffffff81be1780 t intel_dp_aux_hdr_enable_backlight +ffffffff81be1a10 t intel_dp_aux_vesa_setup_backlight +ffffffff81be1ca0 t intel_dp_aux_vesa_get_backlight +ffffffff81be1cd0 t intel_dp_aux_vesa_set_backlight +ffffffff81be1d70 t intel_dp_aux_vesa_disable_backlight +ffffffff81be1e30 t intel_dp_aux_vesa_enable_backlight +ffffffff81be2000 T intel_dp_hdcp_init +ffffffff81be20c0 t intel_dp_hdcp_write_an_aksv +ffffffff81be21d0 t intel_dp_hdcp_read_bksv +ffffffff81be2270 t intel_dp_hdcp_read_bstatus +ffffffff81be2310 t intel_dp_hdcp_repeater_present +ffffffff81be23d0 t intel_dp_hdcp_read_ri_prime +ffffffff81be2470 t intel_dp_hdcp_read_ksv_ready +ffffffff81be2520 t intel_dp_hdcp_read_ksv_fifo +ffffffff81be2620 t intel_dp_hdcp_read_v_prime_part +ffffffff81be26d0 t intel_dp_hdcp_toggle_signalling +ffffffff81be2700 t intel_dp_mst_hdcp_stream_encryption +ffffffff81be2910 t intel_dp_hdcp_check_link +ffffffff81be29a0 t intel_dp_hdcp_capable +ffffffff81be2a60 t intel_dp_hdcp2_capable +ffffffff81be2af0 t intel_dp_hdcp2_write_msg +ffffffff81be2cb0 t intel_dp_hdcp2_read_msg +ffffffff81be3400 t intel_dp_hdcp2_config_stream_type +ffffffff81be3460 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81be3700 t intel_dp_mst_hdcp2_check_link +ffffffff81be37d0 t intel_dp_hdcp2_check_link +ffffffff81be4000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81be4100 t intel_dp_init_lttpr +ffffffff81be4450 T intel_dp_get_adjust_train +ffffffff81be4cc0 T intel_dp_program_link_training_pattern +ffffffff81be4df0 T intel_dp_set_signal_levels +ffffffff81be51c0 T intel_dp_dump_link_status +ffffffff81be52c0 T intel_dp_stop_link_train +ffffffff81be55e0 T intel_dp_start_link_train +ffffffff81be78c0 T intel_dp_128b132b_sdp_crc16 +ffffffff81be79b0 t intel_dp_link_train_phy +ffffffff81bea000 T intel_dp_mst_encoder_active_links +ffffffff81bea030 T intel_dp_mst_encoder_init +ffffffff81bea2a0 T intel_dp_mst_source_support +ffffffff81bea2e0 T intel_dp_mst_encoder_cleanup +ffffffff81bea340 T intel_dp_mst_is_master_trans +ffffffff81bea380 T intel_dp_mst_is_slave_trans +ffffffff81bea3c0 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81bea490 t intel_dp_add_mst_connector +ffffffff81bea750 t intel_dp_mst_poll_hpd_irq +ffffffff81bea770 t intel_dp_mst_get_hw_state +ffffffff81bea7e0 t intel_dp_mst_connector_late_register +ffffffff81bea870 t intel_dp_mst_connector_early_unregister +ffffffff81bea8b0 t intel_dp_mst_get_modes +ffffffff81bea960 t intel_dp_mst_detect +ffffffff81beaa70 t intel_dp_mst_mode_valid_ctx +ffffffff81bead10 t intel_mst_atomic_best_encoder +ffffffff81bead70 t intel_dp_mst_atomic_check +ffffffff81beaf60 t intel_dp_mst_compute_config +ffffffff81beb590 t intel_dp_mst_compute_config_late +ffffffff81beb6a0 t intel_mst_disable_dp +ffffffff81beb7c0 t intel_mst_post_disable_dp +ffffffff81bebaf0 t intel_mst_post_pll_disable_dp +ffffffff81bebb50 t intel_mst_pre_pll_enable_dp +ffffffff81bebb90 t intel_mst_pre_enable_dp +ffffffff81bebe00 t intel_mst_enable_dp +ffffffff81bec250 t intel_dp_mst_enc_get_hw_state +ffffffff81bec290 t intel_dp_mst_enc_get_config +ffffffff81bec2b0 t intel_dp_mst_initial_fastset_check +ffffffff81bec2d0 t intel_dp_mst_encoder_destroy +ffffffff81bec310 t intel_dp_mst_find_vcpi_slots_for_bpp +ffffffff81bed000 T bxt_port_to_phy_channel +ffffffff81bed120 T bxt_ddi_phy_set_signal_levels +ffffffff81bed570 T bxt_ddi_phy_is_enabled +ffffffff81bed6c0 T bxt_ddi_phy_uninit +ffffffff81bed7c0 T bxt_ddi_phy_init +ffffffff81beda20 t _bxt_ddi_phy_init +ffffffff81bee020 T bxt_ddi_phy_verify_state +ffffffff81bee370 t __phy_reg_verify_state +ffffffff81bee490 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81bee500 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81bee7b0 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81bee9c0 T vlv_dig_port_to_channel +ffffffff81beea30 T vlv_dig_port_to_phy +ffffffff81beeaa0 T vlv_pipe_to_channel +ffffffff81beeb00 T chv_set_phy_signal_level +ffffffff81beeef0 T chv_data_lane_soft_reset +ffffffff81bef0f0 T chv_phy_pre_pll_enable +ffffffff81bef400 T chv_phy_pre_encoder_enable +ffffffff81bef6c0 T chv_phy_release_cl2_override +ffffffff81bef750 T chv_phy_post_pll_disable +ffffffff81bef830 T vlv_set_phy_signal_level +ffffffff81bef9e0 T vlv_phy_pre_pll_enable +ffffffff81befb20 T vlv_phy_pre_encoder_enable +ffffffff81befc50 T vlv_phy_reset_lanes +ffffffff81bf0000 T pnv_calc_dpll_params +ffffffff81bf00c0 T i9xx_calc_dpll_params +ffffffff81bf0190 T vlv_calc_dpll_params +ffffffff81bf0250 T chv_calc_dpll_params +ffffffff81bf0330 T bxt_find_best_dpll +ffffffff81bf0350 t chv_find_best_dpll +ffffffff81bf06a0 T i9xx_dpll_compute_fp +ffffffff81bf06e0 T vlv_compute_dpll +ffffffff81bf0760 T chv_compute_dpll +ffffffff81bf07e0 T intel_dpll_crtc_compute_clock +ffffffff81bf08f0 T intel_dpll_crtc_get_shared_dpll +ffffffff81bf0a70 T intel_dpll_init_clock_hook +ffffffff81bf0b80 T i9xx_enable_pll +ffffffff81bf1010 T vlv_enable_pll +ffffffff81bf1640 T chv_enable_pll +ffffffff81bf1d40 T vlv_force_pll_on +ffffffff81bf1ec0 T vlv_disable_pll +ffffffff81bf1fb0 T chv_disable_pll +ffffffff81bf2130 T i9xx_disable_pll +ffffffff81bf2260 T vlv_force_pll_off +ffffffff81bf2380 T assert_pll_enabled +ffffffff81bf2490 T assert_pll_disabled +ffffffff81bf25a0 t intel_pll_is_valid +ffffffff81bf2660 t mtl_crtc_compute_clock +ffffffff81bf2760 t dg2_crtc_compute_clock +ffffffff81bf2800 t hsw_crtc_compute_clock +ffffffff81bf28e0 t hsw_crtc_get_shared_dpll +ffffffff81bf2990 t ilk_crtc_compute_clock +ffffffff81bf2ce0 t ilk_crtc_get_shared_dpll +ffffffff81bf2d30 t g4x_find_best_dpll +ffffffff81bf3090 t chv_crtc_compute_clock +ffffffff81bf31b0 t vlv_crtc_compute_clock +ffffffff81bf3660 t g4x_crtc_compute_clock +ffffffff81bf37f0 t i9xx_compute_dpll +ffffffff81bf3a90 t pnv_crtc_compute_clock +ffffffff81bf3ea0 t i9xx_crtc_compute_clock +ffffffff81bf3fe0 t i9xx_find_best_dpll +ffffffff81bf4320 t i8xx_crtc_compute_clock +ffffffff81bf5000 T intel_get_shared_dpll_by_id +ffffffff81bf5040 T assert_shared_dpll +ffffffff81bf5200 T intel_dpll_get_hw_state +ffffffff81bf5230 T icl_tc_port_to_pll_id +ffffffff81bf5260 T intel_enable_shared_dpll +ffffffff81bf5610 T intel_disable_shared_dpll +ffffffff81bf58f0 T intel_unreference_shared_dpll_crtc +ffffffff81bf5a00 T intel_shared_dpll_swap_state +ffffffff81bf5b00 T icl_set_active_port_dpll +ffffffff81bf5b40 T intel_shared_dpll_init +ffffffff81bf5d60 T intel_compute_shared_dplls +ffffffff81bf5df0 T intel_reserve_shared_dplls +ffffffff81bf5e80 T intel_release_shared_dplls +ffffffff81bf5ec0 T intel_update_active_dpll +ffffffff81bf5f20 T intel_dpll_get_freq +ffffffff81bf5fb0 T intel_dpll_update_ref_clks +ffffffff81bf6000 T intel_dpll_readout_hw_state +ffffffff81bf6260 T intel_dpll_sanitize_state +ffffffff81bf6360 T intel_dpll_dump_hw_state +ffffffff81bf63f0 T intel_shared_dpll_state_verify +ffffffff81bf65e0 t verify_single_dpll_state +ffffffff81bf6c10 T intel_shared_dpll_verify_disabled +ffffffff81bf6ca0 t icl_compute_dplls +ffffffff81bf7940 t icl_get_dplls +ffffffff81bf7ca0 t icl_put_dplls +ffffffff81bf7d60 t icl_update_active_dpll +ffffffff81bf7e20 t icl_update_dpll_ref_clks +ffffffff81bf7e60 t icl_dump_hw_state +ffffffff81bf7f30 t combo_pll_enable +ffffffff81bf8190 t combo_pll_disable +ffffffff81bf8270 t combo_pll_get_hw_state +ffffffff81bf82f0 t icl_ddi_combo_pll_get_freq +ffffffff81bf84d0 t icl_dpll_write +ffffffff81bf8740 t adlp_cmtg_clock_gating_wa +ffffffff81bf88e0 t icl_pll_disable +ffffffff81bf8ab0 t icl_pll_get_hw_state +ffffffff81bf8e00 t tbt_pll_enable +ffffffff81bf9000 t tbt_pll_disable +ffffffff81bf9020 t tbt_pll_get_hw_state +ffffffff81bf9040 t icl_ddi_tbt_pll_get_freq +ffffffff81bf90b0 t mg_pll_enable +ffffffff81bf9820 t mg_pll_disable +ffffffff81bf9860 t dkl_pll_get_hw_state +ffffffff81bf9ad0 t icl_ddi_mg_pll_get_freq +ffffffff81bf9bb0 t icl_calc_dpll_state +ffffffff81bf9cf0 t intel_find_shared_dpll +ffffffff81bfa060 t intel_reference_shared_dpll +ffffffff81bfa2b0 t intel_unreference_shared_dpll +ffffffff81bfa4f0 t mg_pll_get_hw_state +ffffffff81bfa7b0 t bxt_compute_dpll +ffffffff81bfaae0 t bxt_get_dpll +ffffffff81bfabc0 t intel_put_dpll +ffffffff81bfac20 t bxt_update_dpll_ref_clks +ffffffff81bfac60 t bxt_dump_hw_state +ffffffff81bfad20 t bxt_ddi_pll_enable +ffffffff81bfb880 t bxt_ddi_pll_disable +ffffffff81bfbae0 t bxt_ddi_pll_get_hw_state +ffffffff81bfbfb0 t bxt_ddi_pll_get_freq +ffffffff81bfc050 t bxt_ddi_set_dpll_hw_state +ffffffff81bfc250 t skl_compute_dpll +ffffffff81bfc9b0 t skl_get_dpll +ffffffff81bfca70 t skl_update_dpll_ref_clks +ffffffff81bfcab0 t skl_dump_hw_state +ffffffff81bfcb20 t skl_ddi_dpll0_enable +ffffffff81bfcbf0 t skl_ddi_dpll0_disable +ffffffff81bfcc20 t skl_ddi_dpll0_get_hw_state +ffffffff81bfcd50 t skl_ddi_pll_get_freq +ffffffff81bfcde0 t skl_ddi_wrpll_get_freq +ffffffff81bfcf40 t skl_ddi_pll_enable +ffffffff81bfd1c0 t skl_ddi_pll_disable +ffffffff81bfd260 t skl_ddi_pll_get_hw_state +ffffffff81bfd3b0 t hsw_compute_dpll +ffffffff81bfdbe0 t hsw_get_dpll +ffffffff81bfdd40 t hsw_update_dpll_ref_clks +ffffffff81bfddc0 t hsw_dump_hw_state +ffffffff81bfddf0 t hsw_ddi_wrpll_enable +ffffffff81bfde80 t hsw_ddi_wrpll_disable +ffffffff81bfdf80 t hsw_ddi_wrpll_get_hw_state +ffffffff81bfe040 t hsw_ddi_wrpll_get_freq +ffffffff81bfe130 t hsw_ddi_spll_enable +ffffffff81bfe1b0 t hsw_ddi_spll_disable +ffffffff81bfe290 t hsw_ddi_spll_get_hw_state +ffffffff81bfe330 t hsw_ddi_spll_get_freq +ffffffff81bfe3d0 t hsw_ddi_lcpll_enable +ffffffff81bfe400 t hsw_ddi_lcpll_disable +ffffffff81bfe430 t hsw_ddi_lcpll_get_hw_state +ffffffff81bfe460 t hsw_ddi_lcpll_get_freq +ffffffff81bfe4e0 t ibx_compute_dpll +ffffffff81bfe510 t ibx_get_dpll +ffffffff81bfe630 t ibx_dump_hw_state +ffffffff81bfe6a0 t ibx_pch_dpll_enable +ffffffff81bfe8a0 t ibx_pch_dpll_disable +ffffffff81bfe930 t ibx_pch_dpll_get_hw_state +ffffffff81bff000 T intel_dpt_pin +ffffffff81bff220 T intel_dpt_unpin +ffffffff81bff2a0 T intel_dpt_resume +ffffffff81bff390 T intel_dpt_suspend +ffffffff81bff480 T intel_dpt_create +ffffffff81bff920 t dpt_insert_page +ffffffff81bff990 t dpt_clear_range +ffffffff81bff9c0 t dpt_insert_entries +ffffffff81bffab0 t dpt_cleanup +ffffffff81bffb00 t dpt_bind_vma +ffffffff81bffba0 t dpt_unbind_vma +ffffffff81bffbd0 T intel_dpt_destroy +ffffffff81bffc20 T intel_dpt_configure +ffffffff81bffdf0 t __ww_mutex_lock +ffffffff81c00000 T intel_drrs_type_str +ffffffff81c00040 T intel_drrs_is_active +ffffffff81c00070 T intel_drrs_activate +ffffffff81c00270 T intel_drrs_deactivate +ffffffff81c00470 T intel_drrs_invalidate +ffffffff81c00490 t intel_drrs_frontbuffer_update +ffffffff81c00720 T intel_drrs_flush +ffffffff81c00740 T intel_drrs_crtc_init +ffffffff81c00800 t intel_drrs_downclock_work +ffffffff81c00950 T intel_drrs_crtc_debugfs_add +ffffffff81c00980 T intel_drrs_connector_debugfs_add +ffffffff81c00990 t __delayed_work_tick +ffffffff81c01000 T intel_dsb_reg_write +ffffffff81c01140 T intel_dsb_finish +ffffffff81c011c0 T intel_dsb_commit +ffffffff81c01390 T intel_dsb_wait +ffffffff81c015b0 T intel_dsb_prepare +ffffffff81c01780 T intel_dsb_cleanup +ffffffff81c02000 T intel_dsi_wait_panel_power_cycle +ffffffff81c020f0 T intel_dsi_shutdown +ffffffff81c021e0 T intel_dsi_bitrate +ffffffff81c02270 T intel_dsi_tlpx_ns +ffffffff81c022c0 T intel_dsi_get_modes +ffffffff81c022d0 T intel_dsi_mode_valid +ffffffff81c023a0 T intel_dsi_host_init +ffffffff81c02460 T intel_dsi_get_panel_orientation +ffffffff81c03000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81c030a0 t dcs_setup_backlight +ffffffff81c03130 t dcs_get_backlight +ffffffff81c03230 t dcs_set_backlight +ffffffff81c03330 t dcs_disable_backlight +ffffffff81c03700 t dcs_enable_backlight +ffffffff81c04000 T intel_dsi_vbt_exec_sequence +ffffffff81c04020 T intel_dsi_log_params +ffffffff81c04460 T intel_dsi_vbt_init +ffffffff81c04970 T intel_dsi_vbt_gpio_init +ffffffff81c04990 T intel_dsi_vbt_gpio_cleanup +ffffffff81c05000 T intel_dvo_init +ffffffff81c05730 t intel_disable_dvo +ffffffff81c057f0 t intel_enable_dvo +ffffffff81c058f0 t intel_dvo_get_hw_state +ffffffff81c05970 t intel_dvo_get_config +ffffffff81c05a20 t intel_dvo_compute_config +ffffffff81c05ac0 t intel_dvo_pre_enable +ffffffff81c05bd0 t intel_dvo_connector_get_hw_state +ffffffff81c05c60 t intel_dvo_enc_destroy +ffffffff81c05ca0 t intel_dvo_detect +ffffffff81c05dc0 t intel_dvo_get_modes +ffffffff81c05e40 t intel_dvo_mode_valid +ffffffff81c06000 T intel_fb_get_format_info +ffffffff81c062b0 T intel_fb_is_tiled_modifier +ffffffff81c06300 t lookup_modifier +ffffffff81c06540 T intel_fb_is_ccs_modifier +ffffffff81c06590 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81c065e0 T intel_fb_is_mc_ccs_modifier +ffffffff81c06630 T intel_fb_plane_get_modifiers +ffffffff81c06830 T intel_fb_plane_supports_modifier +ffffffff81c068b0 T intel_format_info_is_yuv_semiplanar +ffffffff81c06930 T intel_fb_is_ccs_aux_plane +ffffffff81c069f0 T intel_fb_rc_ccs_cc_plane +ffffffff81c06ae0 T is_surface_linear +ffffffff81c06c70 T main_to_ccs_plane +ffffffff81c06d20 T skl_ccs_to_main_plane +ffffffff81c06e80 T skl_main_to_aux_plane +ffffffff81c06fc0 T intel_tile_size +ffffffff81c07000 T intel_tile_width_bytes +ffffffff81c07470 T intel_tile_height +ffffffff81c074e0 T intel_tile_row_size +ffffffff81c07570 T intel_fb_align_height +ffffffff81c075f0 T intel_fb_modifier_uses_dpt +ffffffff81c07630 T intel_fb_uses_dpt +ffffffff81c07690 T intel_cursor_alignment +ffffffff81c076f0 T intel_surf_alignment +ffffffff81c079c0 T intel_fb_plane_get_subsampling +ffffffff81c07b40 T intel_plane_adjust_aligned_offset +ffffffff81c07bc0 t intel_adjust_aligned_offset +ffffffff81c07d90 T intel_plane_compute_aligned_offset +ffffffff81c07ea0 t intel_compute_aligned_offset +ffffffff81c08090 T intel_fb_needs_pot_stride_remap +ffffffff81c08100 T intel_fb_supports_90_270_rotation +ffffffff81c08160 T intel_fill_fb_info +ffffffff81c08d90 t calc_plane_remap_info +ffffffff81c097b0 T intel_fb_fill_view +ffffffff81c09820 T intel_plane_compute_gtt +ffffffff81c09d60 t intel_plane_check_stride +ffffffff81c09ee0 T intel_framebuffer_init +ffffffff81c0a880 t gen12_ccs_aux_stride +ffffffff81c0a900 T intel_user_framebuffer_create +ffffffff81c0aaa0 T intel_framebuffer_create +ffffffff81c0ab50 t intel_adjust_tile_offset +ffffffff81c0ac90 t intel_user_framebuffer_destroy +ffffffff81c0ad10 t intel_user_framebuffer_create_handle +ffffffff81c0ad40 t intel_user_framebuffer_dirty +ffffffff81c0b000 T intel_pin_and_fence_fb_obj +ffffffff81c0b3c0 t i915_gem_object_lock +ffffffff81c0b610 T intel_unpin_fb_vma +ffffffff81c0b680 T intel_plane_pin_fb +ffffffff81c0bab0 T intel_plane_unpin_fb +ffffffff81c0c000 T intel_fbc_cleanup +ffffffff81c0c240 T intel_fbc_pre_update +ffffffff81c0c900 T intel_fbc_post_update +ffffffff81c0cac0 T intel_fbc_invalidate +ffffffff81c0cc70 T intel_fbc_flush +ffffffff81c0cf60 T intel_fbc_atomic_check +ffffffff81c0d550 T intel_fbc_disable +ffffffff81c0d620 t __intel_fbc_disable +ffffffff81c0d780 T intel_fbc_update +ffffffff81c0df00 T intel_fbc_reset_underrun +ffffffff81c0e090 T intel_fbc_handle_fifo_underrun_irq +ffffffff81c0e150 T intel_fbc_add_plane +ffffffff81c0e180 T intel_fbc_init +ffffffff81c0e440 T intel_fbc_sanitize +ffffffff81c0e520 T intel_fbc_crtc_debugfs_add +ffffffff81c0e550 T intel_fbc_debugfs_register +ffffffff81c0e580 t intel_fbc_is_ok +ffffffff81c0e700 t intel_fbc_update_state +ffffffff81c0eaa0 t intel_fbc_underrun_work_fn +ffffffff81c0eb90 t ivb_fbc_activate +ffffffff81c0ee00 t ilk_fbc_deactivate +ffffffff81c0eec0 t ilk_fbc_is_active +ffffffff81c0ef30 t ivb_fbc_is_compressing +ffffffff81c0efa0 t snb_fbc_nuke +ffffffff81c0f020 t ilk_fbc_program_cfb +ffffffff81c0f080 t ivb_fbc_set_false_color +ffffffff81c0f100 t snb_fbc_activate +ffffffff81c0f1a0 t ilk_fbc_is_compressing +ffffffff81c0f210 t ilk_fbc_activate +ffffffff81c0f350 t i965_fbc_nuke +ffffffff81c0f3f0 t g4x_fbc_activate +ffffffff81c0f510 t g4x_fbc_deactivate +ffffffff81c0f5b0 t g4x_fbc_is_active +ffffffff81c0f610 t g4x_fbc_is_compressing +ffffffff81c0f670 t g4x_fbc_program_cfb +ffffffff81c0f6c0 t i8xx_fbc_activate +ffffffff81c0f850 t i8xx_fbc_deactivate +ffffffff81c0f950 t i8xx_fbc_is_active +ffffffff81c0f9b0 t i8xx_fbc_is_compressing +ffffffff81c0fa10 t i8xx_fbc_program_cfb +ffffffff81c0fab0 t i8xx_fbc_nuke +ffffffff81c10000 T intel_fbdev_init +ffffffff81c10590 t intel_fbdev_suspend_worker +ffffffff81c105c0 T intel_fbdev_initial_config_async +ffffffff81c10630 T intel_fbdev_unregister +ffffffff81c10670 T intel_fbdev_set_suspend +ffffffff81c106a0 T intel_fbdev_fini +ffffffff81c10750 T intel_fbdev_output_poll_changed +ffffffff81c10800 T intel_fbdev_restore_mode +ffffffff81c10890 T intel_fbdev_framebuffer +ffffffff81c108d0 t intelfb_create +ffffffff81c11320 t intelfb_dirty +ffffffff81c11390 t intel_fbdev_set_par +ffffffff81c12000 T assert_fdi_tx_enabled +ffffffff81c12020 t assert_fdi_tx +ffffffff81c12170 T assert_fdi_tx_disabled +ffffffff81c12190 T assert_fdi_rx_enabled +ffffffff81c12280 T assert_fdi_rx_disabled +ffffffff81c12370 T assert_fdi_tx_pll_enabled +ffffffff81c12470 T assert_fdi_rx_pll_enabled +ffffffff81c12570 T assert_fdi_rx_pll_disabled +ffffffff81c12670 T intel_fdi_link_train +ffffffff81c12690 T intel_fdi_pll_freq_update +ffffffff81c12740 T intel_fdi_link_freq +ffffffff81c12790 T ilk_fdi_compute_config +ffffffff81c12b20 T intel_fdi_normal_train +ffffffff81c12ce0 T hsw_fdi_link_train +ffffffff81c13300 T hsw_fdi_disable +ffffffff81c134d0 T ilk_fdi_pll_enable +ffffffff81c13730 T ilk_fdi_pll_disable +ffffffff81c138b0 T ilk_fdi_disable +ffffffff81c13b80 T intel_fdi_init_hook +ffffffff81c13be0 t ilk_fdi_link_train +ffffffff81c143f0 t gen6_fdi_link_train +ffffffff81c14e60 t ivb_manual_fdi_link_train +ffffffff81c15920 t cpt_set_fdi_bc_bifurcation +ffffffff81c16000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81c16480 T intel_set_pch_fifo_underrun_reporting +ffffffff81c16720 T intel_cpu_fifo_underrun_irq_handler +ffffffff81c16940 T intel_pch_fifo_underrun_irq_handler +ffffffff81c169d0 T intel_check_cpu_fifo_underruns +ffffffff81c16c20 T intel_check_pch_fifo_underruns +ffffffff81c16d80 T intel_init_fifo_underrun_reporting +ffffffff81c17000 T intel_frontbuffer_flip_prepare +ffffffff81c17060 T intel_frontbuffer_flip_complete +ffffffff81c17180 T intel_frontbuffer_flip +ffffffff81c17290 T __intel_fb_invalidate +ffffffff81c17350 T __intel_fb_flush +ffffffff81c17480 T intel_frontbuffer_get +ffffffff81c17600 t frontbuffer_active +ffffffff81c17630 t frontbuffer_retire +ffffffff81c17670 T intel_frontbuffer_put +ffffffff81c177c0 T intel_frontbuffer_track +ffffffff81c18000 T intel_atomic_global_obj_init +ffffffff81c18070 T intel_atomic_global_obj_cleanup +ffffffff81c18170 T intel_atomic_get_global_obj_state +ffffffff81c183f0 T intel_atomic_get_old_global_obj_state +ffffffff81c18450 T intel_atomic_get_new_global_obj_state +ffffffff81c184b0 T intel_atomic_swap_global_state +ffffffff81c18600 T intel_atomic_clear_global_state +ffffffff81c18730 T intel_atomic_lock_global_state +ffffffff81c187c0 T intel_atomic_serialize_global_state +ffffffff81c18850 T intel_atomic_global_state_is_serialized +ffffffff81c19000 T intel_gmbus_is_valid_pin +ffffffff81c19100 T intel_gmbus_reset +ffffffff81c19170 T intel_bb_set_bits +ffffffff81c192d0 T intel_bb_set_dir +ffffffff81c19300 T intel_bb_read_bits +ffffffff81c194d0 T intel_acquire_bus +ffffffff81c19730 T intel_release_bus +ffffffff81c19910 T intel_send_start +ffffffff81c19930 T intel_send_stop +ffffffff81c19950 T intel_initiate_xfer +ffffffff81c19970 T intel_read_byte +ffffffff81c19990 T intel_write_byte +ffffffff81c199b0 T intel_gmbus_output_aksv +ffffffff81c19ab0 t do_gmbus_xfer +ffffffff81c1a140 T intel_gmbus_setup +ffffffff81c1a4f0 T intel_gmbus_teardown +ffffffff81c1a580 T intel_gmbus_get_adapter +ffffffff81c1a600 T intel_gmbus_force_bit +ffffffff81c1a6b0 T intel_gmbus_is_forced_bit +ffffffff81c1a6e0 T intel_gmbus_irq_handler +ffffffff81c1a780 t gmbus_xfer_read +ffffffff81c1aa80 t gmbus_xfer_write +ffffffff81c1acd0 t gmbus_wait +ffffffff81c1b130 t gmbus_wait_idle +ffffffff81c1b300 t gmbus_xfer +ffffffff81c1b400 t gmbus_func +ffffffff81c1b450 t gmbus_lock_bus +ffffffff81c1b470 t gmbus_trylock_bus +ffffffff81c1b4d0 t gmbus_unlock_bus +ffffffff81c1c000 T intel_hdcp_capable +ffffffff81c1c0b0 t intel_hdcp_read_valid_bksv +ffffffff81c1c350 T intel_hdcp2_capable +ffffffff81c1c4b0 T is_hdcp_supported +ffffffff81c1c500 T intel_hdcp_component_init +ffffffff81c1c510 T intel_hdcp_init +ffffffff81c1c6c0 t intel_hdcp_check_work +ffffffff81c1f680 t intel_hdcp_prop_work +ffffffff81c1f720 T intel_hdcp_enable +ffffffff81c1f780 T intel_hdcp_disable +ffffffff81c1f900 t intel_hdcp_update_value +ffffffff81c1fb10 t _intel_hdcp2_disable +ffffffff81c1ff80 t _intel_hdcp_disable +ffffffff81c202e0 T intel_hdcp_update_pipe +ffffffff81c204e0 T intel_hdcp_component_fini +ffffffff81c20590 T intel_hdcp_cleanup +ffffffff81c206e0 T intel_hdcp_atomic_check +ffffffff81c20770 T intel_hdcp_handle_cp_irq +ffffffff81c20890 t __delayed_work_tick +ffffffff81c208b0 t hdcp2_authenticate_repeater_topology +ffffffff81c20bc0 t transcoder_name +ffffffff81c20c00 t intel_hdcp_get_repeater_ctl +ffffffff81c20ce0 t ktime_get_raw +ffffffff81c20d60 t wait_remaining_ms_from_jiffies +ffffffff81c20df0 t intel_hdcp_auth_downstream +ffffffff81c222e0 t intel_write_sha_text +ffffffff81c23000 T intel_hdcp_gsc_cs_required +ffffffff81c23040 T intel_hdcp_gsc_init +ffffffff81c23590 T intel_hdcp_gsc_fini +ffffffff81c23600 T intel_hdcp_gsc_msg_send +ffffffff81c239b0 t gsc_hdcp_initiate_session +ffffffff81c23a10 t gsc_hdcp_verify_receiver_cert_prepare_km +ffffffff81c23a70 t gsc_hdcp_verify_hprime +ffffffff81c23ad0 t gsc_hdcp_store_pairing_info +ffffffff81c23b30 t gsc_hdcp_initiate_locality_check +ffffffff81c23b90 t gsc_hdcp_verify_lprime +ffffffff81c23bf0 t gsc_hdcp_get_session_key +ffffffff81c23c50 t gsc_hdcp_repeater_check_flow_prepare_ack +ffffffff81c23cb0 t gsc_hdcp_verify_mprime +ffffffff81c23d10 t gsc_hdcp_enable_authentication +ffffffff81c23d70 t gsc_hdcp_close_session +ffffffff81c24000 T intel_hdmi_to_i915 +ffffffff81c24040 T hsw_write_infoframe +ffffffff81c244c0 t hsw_dip_data_reg +ffffffff81c24680 T hsw_read_infoframe +ffffffff81c24750 T intel_hdmi_infoframe_enable +ffffffff81c247f0 T intel_hdmi_infoframes_enabled +ffffffff81c24910 T intel_read_infoframe +ffffffff81c24ac0 T intel_hdmi_read_gcp_infoframe +ffffffff81c24ba0 T intel_dp_dual_mode_set_tmds_output +ffffffff81c24c70 T intel_hdmi_tmds_clock +ffffffff81c24cc0 T intel_hdmi_bpc_possible +ffffffff81c24df0 T intel_hdmi_limited_color_range +ffffffff81c24e60 T intel_hdmi_compute_has_hdmi_sink +ffffffff81c24ed0 T intel_hdmi_compute_config +ffffffff81c25520 t intel_hdmi_compute_output_format +ffffffff81c256a0 t intel_hdmi_compute_hdmi_infoframe +ffffffff81c25780 t intel_hdmi_compute_drm_infoframe +ffffffff81c25890 T intel_hdmi_encoder_shutdown +ffffffff81c25970 T intel_hdmi_handle_sink_scrambling +ffffffff81c25a70 T intel_infoframe_init +ffffffff81c25c10 t vlv_write_infoframe +ffffffff81c25f90 t vlv_read_infoframe +ffffffff81c26130 t vlv_set_infoframes +ffffffff81c264b0 t vlv_infoframes_enabled +ffffffff81c26550 t g4x_write_infoframe +ffffffff81c26840 t g4x_read_infoframe +ffffffff81c26990 t g4x_set_infoframes +ffffffff81c26c50 t g4x_infoframes_enabled +ffffffff81c26cd0 t hsw_set_infoframes +ffffffff81c26fb0 t hsw_infoframes_enabled +ffffffff81c27040 t ibx_write_infoframe +ffffffff81c27380 t ibx_read_infoframe +ffffffff81c27500 t ibx_set_infoframes +ffffffff81c27880 t ibx_infoframes_enabled +ffffffff81c27910 t cpt_write_infoframe +ffffffff81c27c50 t cpt_read_infoframe +ffffffff81c27dd0 t cpt_set_infoframes +ffffffff81c280f0 t cpt_infoframes_enabled +ffffffff81c28170 T intel_hdmi_init_connector +ffffffff81c28a00 T intel_hdmi_dsc_get_slice_height +ffffffff81c28a60 T intel_hdmi_dsc_get_num_slices +ffffffff81c28be0 T intel_hdmi_dsc_get_bpp +ffffffff81c28cc0 t intel_hdmi_compute_clock +ffffffff81c28f40 t hdmi_port_clock_valid +ffffffff81c291a0 t intel_write_infoframe +ffffffff81c29390 t intel_hdmi_detect +ffffffff81c29580 t intel_hdmi_force +ffffffff81c29630 t intel_hdmi_connector_register +ffffffff81c29640 t intel_hdmi_connector_unregister +ffffffff81c29650 t intel_hdmi_set_edid +ffffffff81c29990 t intel_hdmi_get_modes +ffffffff81c299a0 t intel_hdmi_mode_valid +ffffffff81c29b80 t intel_hdmi_connector_atomic_check +ffffffff81c29bb0 t intel_hdmi_mode_clock_valid +ffffffff81c29d70 t intel_hdmi_hdcp_write_an_aksv +ffffffff81c29ef0 t intel_hdmi_hdcp_read_bksv +ffffffff81c29fd0 t intel_hdmi_hdcp_read_bstatus +ffffffff81c2a0b0 t intel_hdmi_hdcp_repeater_present +ffffffff81c2a1a0 t intel_hdmi_hdcp_read_ri_prime +ffffffff81c2a280 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81c2a370 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81c2a450 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81c2a550 t intel_hdmi_hdcp_toggle_signalling +ffffffff81c2a810 t intel_hdmi_hdcp_check_link +ffffffff81c2abb0 t intel_hdmi_hdcp2_capable +ffffffff81c2ac80 t intel_hdmi_hdcp2_write_msg +ffffffff81c2ada0 t intel_hdmi_hdcp2_read_msg +ffffffff81c2b210 t intel_hdmi_hdcp2_check_link +ffffffff81c2c000 T intel_hpd_pin_default +ffffffff81c2c030 T intel_encoder_hotplug +ffffffff81c2c190 T intel_hpd_trigger_irq +ffffffff81c2c210 T intel_hpd_irq_handler +ffffffff81c2c670 T intel_hpd_init +ffffffff81c2c790 T intel_hpd_poll_enable +ffffffff81c2c820 T intel_hpd_poll_disable +ffffffff81c2c880 T intel_hpd_init_early +ffffffff81c2c9d0 t i915_hotplug_work_func +ffffffff81c2ce80 t i915_digport_work_func +ffffffff81c2d030 t i915_hpd_poll_init_work +ffffffff81c2d180 t intel_hpd_irq_storm_reenable_work +ffffffff81c2d4f0 T intel_hpd_cancel_work +ffffffff81c2d630 T intel_hpd_disable +ffffffff81c2d6d0 T intel_hpd_enable +ffffffff81c2d750 T intel_hpd_debugfs_register +ffffffff81c2d780 t __delayed_work_tick +ffffffff81c2e000 T i915_hotplug_interrupt_update_locked +ffffffff81c2e0c0 T i915_hotplug_interrupt_update +ffffffff81c2e1b0 T i9xx_hpd_irq_ack +ffffffff81c2e310 T i9xx_hpd_irq_handler +ffffffff81c2e4d0 T ibx_hpd_irq_handler +ffffffff81c2e6a0 T xelpdp_pica_irq_handler +ffffffff81c2e9c0 T icp_irq_handler +ffffffff81c2eca0 T spt_irq_handler +ffffffff81c2ef70 T ilk_hpd_irq_handler +ffffffff81c2f0b0 T bxt_hpd_irq_handler +ffffffff81c2f230 T gen11_hpd_irq_handler +ffffffff81c2f4d0 T intel_hpd_enable_detection +ffffffff81c2f510 T intel_hpd_irq_setup +ffffffff81c2f560 T intel_hotplug_irq_init +ffffffff81c2f7f0 t i915_hpd_irq_setup +ffffffff81c2f910 t i915_hpd_enable_detection +ffffffff81c2f9c0 t icp_hpd_irq_setup +ffffffff81c2fbd0 t icp_hpd_enable_detection +ffffffff81c2fce0 t dg1_hpd_irq_setup +ffffffff81c2fd50 t dg1_hpd_enable_detection +ffffffff81c2fec0 t xelpdp_hpd_irq_setup +ffffffff81c30340 t xelpdp_hpd_enable_detection +ffffffff81c30510 t gen11_hpd_irq_setup +ffffffff81c307a0 t gen11_hpd_enable_detection +ffffffff81c309e0 t bxt_hpd_irq_setup +ffffffff81c30b90 t bxt_hpd_enable_detection +ffffffff81c30ca0 t spt_hpd_irq_setup +ffffffff81c30ee0 t spt_hpd_enable_detection +ffffffff81c31020 t ilk_hpd_irq_setup +ffffffff81c312b0 t ilk_hpd_enable_detection +ffffffff81c32000 T intel_hti_init +ffffffff81c32070 T intel_hti_uses_phy +ffffffff81c32110 T intel_hti_dpll_mask +ffffffff81c33000 T intel_load_detect_get_pipe +ffffffff81c33430 t intel_modeset_disable_planes +ffffffff81c33510 T intel_load_detect_release_pipe +ffffffff81c34000 T intel_lpe_audio_irq_handler +ffffffff81c34020 T intel_lpe_audio_init +ffffffff81c34050 T intel_lpe_audio_teardown +ffffffff81c34070 T intel_lpe_audio_notify +ffffffff81c35000 T lspcon_detect_hdr_capability +ffffffff81c350c0 T lspcon_write_infoframe +ffffffff81c35950 T lspcon_read_infoframe +ffffffff81c35990 T lspcon_set_infoframes +ffffffff81c35c20 T lspcon_infoframes_enabled +ffffffff81c35e30 T lspcon_wait_pcon_mode +ffffffff81c35e50 t lspcon_wait_mode +ffffffff81c36180 T lspcon_init +ffffffff81c36660 T intel_lspcon_infoframes_enabled +ffffffff81c36690 T lspcon_resume +ffffffff81c369a0 t lspcon_change_mode +ffffffff81c37000 T intel_lvds_port_enabled +ffffffff81c37090 T intel_get_lvds_encoder +ffffffff81c370f0 T intel_is_dual_link_lvds +ffffffff81c37150 T intel_lvds_init +ffffffff81c37950 t intel_enable_lvds +ffffffff81c37ad0 t intel_pre_enable_lvds +ffffffff81c37df0 t intel_lvds_compute_config +ffffffff81c37f70 t pch_disable_lvds +ffffffff81c37f90 t pch_post_disable_lvds +ffffffff81c37fb0 t gmch_disable_lvds +ffffffff81c37ff0 t intel_lvds_get_hw_state +ffffffff81c380c0 t intel_lvds_get_config +ffffffff81c381e0 t intel_lvds_shutdown +ffffffff81c38290 t compute_is_dual_link_lvds +ffffffff81c38380 t intel_no_lvds_dmi_callback +ffffffff81c383d0 t intel_disable_lvds +ffffffff81c38520 t intel_lvds_get_modes +ffffffff81c38580 t intel_lvds_mode_valid +ffffffff81c38630 t intel_dual_link_lvds_callback +ffffffff81c39000 T _intel_modeset_lock_begin +ffffffff81c39070 T _intel_modeset_lock_loop +ffffffff81c390b0 T _intel_modeset_lock_end +ffffffff81c3a000 T intel_modeset_setup_hw_state +ffffffff81c3b6b0 t intel_crtc_disable_noatomic +ffffffff81c3bd80 t intel_crtc_disable_noatomic_begin +ffffffff81c3d000 T intel_modeset_verify_crtc +ffffffff81c3d630 t verify_connector_state +ffffffff81c3db10 T intel_modeset_verify_disabled +ffffffff81c3e000 T intel_opregion_notify_encoder +ffffffff81c3e190 t swsci +ffffffff81c3e530 T intel_opregion_notify_adapter +ffffffff81c3e590 T intel_opregion_asle_intr +ffffffff81c3e5e0 T intel_opregion_setup +ffffffff81c3ef90 t asle_work +ffffffff81c3f490 T intel_opregion_get_panel_type +ffffffff81c3f5a0 T intel_opregion_get_edid +ffffffff81c3f690 T intel_opregion_headless_sku +ffffffff81c3f6e0 T intel_opregion_register +ffffffff81c3f780 T intel_opregion_resume +ffffffff81c3f820 T intel_opregion_suspend +ffffffff81c3f8e0 T intel_opregion_unregister +ffffffff81c3f9c0 T intel_opregion_cleanup +ffffffff81c3fad0 t intel_no_opregion_vbt_callback +ffffffff81c3fb30 t intel_use_opregion_panel_type_callback +ffffffff81c40000 T intel_overlay_reset +ffffffff81c40050 T intel_overlay_switch_off +ffffffff81c402a0 t intel_overlay_release_old_vid +ffffffff81c404a0 T intel_overlay_put_image_ioctl +ffffffff81c40850 t update_pfit_vscale_ratio +ffffffff81c40930 t check_overlay_dst +ffffffff81c40a10 t check_overlay_src +ffffffff81c40c60 t intel_overlay_do_put_image +ffffffff81c41920 T intel_overlay_attrs_ioctl +ffffffff81c41cc0 t check_gamma +ffffffff81c41eb0 T intel_overlay_setup +ffffffff81c42160 t intel_overlay_last_flip_retire +ffffffff81c421a0 T intel_overlay_cleanup +ffffffff81c42260 T intel_overlay_capture_error_state +ffffffff81c42370 T intel_overlay_print_error_state +ffffffff81c428b0 t intel_overlay_release_old_vid_tail +ffffffff81c42980 t intel_overlay_off_tail +ffffffff81c42b70 t intel_overlay_flip_prepare +ffffffff81c43000 T intel_panel_use_ssc +ffffffff81c43060 T intel_panel_preferred_fixed_mode +ffffffff81c430b0 T intel_panel_fixed_mode +ffffffff81c43230 T intel_panel_downclock_mode +ffffffff81c43330 T intel_panel_highest_mode +ffffffff81c43390 T intel_panel_get_modes +ffffffff81c43440 T intel_panel_drrs_type +ffffffff81c43470 T intel_panel_compute_config +ffffffff81c43630 T intel_panel_add_edid_fixed_modes +ffffffff81c43b90 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81c43c00 t intel_panel_add_fixed_mode +ffffffff81c43d90 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81c43e00 T intel_panel_add_encoder_fixed_mode +ffffffff81c43e40 T intel_panel_fitting +ffffffff81c444b0 T intel_panel_detect +ffffffff81c44550 T intel_panel_mode_valid +ffffffff81c44600 T intel_panel_init_alloc +ffffffff81c44650 T intel_panel_init +ffffffff81c44790 T intel_panel_fini +ffffffff81c45000 T intel_has_pch_trancoder +ffffffff81c45060 T intel_crtc_pch_transcoder +ffffffff81c450a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81c450f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81c45140 T ilk_pch_pre_enable +ffffffff81c45170 T ilk_pch_enable +ffffffff81c45820 t ilk_pch_transcoder_set_timings +ffffffff81c45af0 T ilk_pch_disable +ffffffff81c45b10 T ilk_pch_post_disable +ffffffff81c45fc0 T ilk_pch_get_config +ffffffff81c461d0 T lpt_pch_enable +ffffffff81c464a0 T lpt_pch_disable +ffffffff81c465e0 T lpt_pch_get_config +ffffffff81c466d0 T intel_pch_sanitize +ffffffff81c46a10 t assert_pch_dp_disabled +ffffffff81c46bc0 t assert_pch_hdmi_disabled +ffffffff81c47000 T lpt_disable_iclkip +ffffffff81c470a0 T lpt_iclkip +ffffffff81c47130 T lpt_program_iclkip +ffffffff81c47450 T lpt_get_iclkip +ffffffff81c47590 T lpt_disable_clkout_dp +ffffffff81c47690 T intel_init_pch_refclk +ffffffff81c49000 T intel_initial_plane_config +ffffffff81c4a000 T intel_pmdemand_init +ffffffff81c4a150 T intel_pmdemand_init_early +ffffffff81c4a1e0 T intel_pmdemand_update_phys_mask +ffffffff81c4a290 T intel_pmdemand_update_port_clock +ffffffff81c4a2d0 T intel_pmdemand_atomic_check +ffffffff81c4a710 t intel_pmdemand_update_max_ddiclk +ffffffff81c4a7e0 t intel_pmdemand_update_active_non_tc_phys +ffffffff81c4aa10 T intel_pmdemand_init_pmdemand_params +ffffffff81c4ac10 T intel_pmdemand_program_dbuf +ffffffff81c4ade0 t intel_pmdemand_wait +ffffffff81c4b020 T intel_pmdemand_pre_plane_update +ffffffff81c4b140 t intel_pmdemand_program_params +ffffffff81c4b5f0 T intel_pmdemand_post_plane_update +ffffffff81c4b700 t intel_pmdemand_duplicate_state +ffffffff81c4b790 t intel_pmdemand_destroy_state +ffffffff81c4c000 T intel_pps_lock +ffffffff81c4c070 T intel_pps_unlock +ffffffff81c4c0e0 T intel_pps_reset_all +ffffffff81c4c240 T intel_pps_check_power_unlocked +ffffffff81c4c590 t pps_name +ffffffff81c4c640 T intel_pps_wait_power_cycle +ffffffff81c4c710 t wait_panel_power_cycle +ffffffff81c4c920 T intel_pps_vdd_on_unlocked +ffffffff81c4cf80 T intel_pps_vdd_on +ffffffff81c4d160 T intel_pps_vdd_off_sync +ffffffff81c4d270 t intel_pps_vdd_off_sync_unlocked +ffffffff81c4d730 T intel_pps_vdd_off_unlocked +ffffffff81c4d920 T intel_pps_on_unlocked +ffffffff81c4de70 T intel_pps_on +ffffffff81c4df40 T intel_pps_off_unlocked +ffffffff81c4e3b0 T intel_pps_off +ffffffff81c4e480 T intel_pps_backlight_on +ffffffff81c4e6d0 T intel_pps_backlight_off +ffffffff81c4e940 T intel_pps_backlight_power +ffffffff81c4eb70 T vlv_pps_init +ffffffff81c4ed70 t vlv_detach_power_sequencer +ffffffff81c4ef70 t vlv_steal_power_sequencer +ffffffff81c4f0b0 t pps_init_delays +ffffffff81c4f590 t pps_init_registers +ffffffff81c4f9a0 T intel_pps_have_panel_power_or_vdd +ffffffff81c4fb40 T intel_pps_encoder_reset +ffffffff81c4fd30 t vlv_initial_power_sequencer_setup +ffffffff81c500a0 t pps_vdd_init +ffffffff81c50280 T intel_pps_init +ffffffff81c50780 t edp_panel_vdd_work +ffffffff81c50840 T intel_pps_init_late +ffffffff81c50ac0 T intel_pps_unlock_regs_wa +ffffffff81c50be0 T intel_pps_setup +ffffffff81c50c50 T assert_pps_unlocked +ffffffff81c50f20 t intel_pps_get_registers +ffffffff81c51830 t wait_panel_status +ffffffff81c51cd0 t intel_pps_readout_hw_state +ffffffff81c51ec0 t __delayed_work_tick +ffffffff81c52000 T intel_psr_irq_handler +ffffffff81c52710 t transcoder_name +ffffffff81c52750 T intel_psr_init_dpcd +ffffffff81c52a40 T intel_psr_compute_config +ffffffff81c52c40 t intel_psr2_config_valid +ffffffff81c53120 T intel_psr_get_config +ffffffff81c532e0 T intel_psr_disable +ffffffff81c53420 t intel_psr_disable_locked +ffffffff81c53810 T intel_psr_pause +ffffffff81c53a30 t intel_psr_exit +ffffffff81c53d10 T intel_psr_resume +ffffffff81c53db0 t intel_psr_activate +ffffffff81c54550 T intel_psr2_disable_plane_sel_fetch_arm +ffffffff81c545c0 T intel_psr2_program_plane_sel_fetch_arm +ffffffff81c54660 T intel_psr2_program_plane_sel_fetch_noarm +ffffffff81c547d0 T intel_psr2_program_trans_man_trk_ctl +ffffffff81c548c0 T intel_psr2_sel_fetch_update +ffffffff81c55070 T intel_psr_pre_plane_update +ffffffff81c55250 t wm_optimization_wa +ffffffff81c55410 T intel_psr_post_plane_update +ffffffff81c56190 T intel_psr_wait_for_idle_locked +ffffffff81c56380 T intel_psr_debug_set +ffffffff81c56750 T intel_psr_invalidate +ffffffff81c569b0 T intel_psr_flush +ffffffff81c56e50 T intel_psr_init +ffffffff81c56fa0 t intel_psr_work +ffffffff81c571a0 t tgl_dc3co_disable_work +ffffffff81c57200 T intel_psr_short_pulse +ffffffff81c57670 T intel_psr_enabled +ffffffff81c57700 T intel_psr_lock +ffffffff81c577c0 T intel_psr_unlock +ffffffff81c57880 T intel_psr_debugfs_register +ffffffff81c578b0 T intel_psr_connector_debugfs_add +ffffffff81c578e0 t _compute_psr2_sdp_prior_scanline_indication +ffffffff81c579a0 t _compute_psr2_wake_times +ffffffff81c57aa0 t intel_psr2_sel_fetch_config_valid +ffffffff81c57b30 t psr2_granularity_check +ffffffff81c57c20 t tgl_psr2_disable_dc3co +ffffffff81c57d40 t __delayed_work_tick +ffffffff81c58000 T intel_lookup_range_min_qp +ffffffff81c58120 T intel_lookup_range_max_qp +ffffffff81c59000 T intel_init_quirks +ffffffff81c59110 T intel_has_quirk +ffffffff81c59150 t quirk_ssc_force_disable +ffffffff81c59180 t quirk_invert_brightness +ffffffff81c591b0 t quirk_backlight_present +ffffffff81c591e0 t quirk_increase_t12_delay +ffffffff81c59210 t quirk_increase_ddi_disabled_time +ffffffff81c59240 t intel_dmi_reverse_brightness +ffffffff81c59290 t intel_dmi_no_pps_backlight +ffffffff81c5a000 T intel_sdvo_port_enabled +ffffffff81c5a0b0 T intel_sdvo_init +ffffffff81c5b2f0 t intel_sdvo_compute_config +ffffffff81c5b720 t pch_disable_sdvo +ffffffff81c5b750 t pch_post_disable_sdvo +ffffffff81c5b760 t intel_disable_sdvo +ffffffff81c5b940 t intel_sdvo_pre_enable +ffffffff81c5c430 t intel_enable_sdvo +ffffffff81c5c650 t intel_sdvo_get_hw_state +ffffffff81c5c750 t intel_sdvo_get_config +ffffffff81c5cc30 t intel_sdvo_set_target_input +ffffffff81c5ccb0 t intel_sdvo_get_input_pixel_clock_range +ffffffff81c5cd60 t intel_sdvo_ddc_proxy_xfer +ffffffff81c5ce10 t intel_sdvo_ddc_proxy_func +ffffffff81c5ce40 t __intel_sdvo_write_cmd +ffffffff81c5d350 t proxy_lock_bus +ffffffff81c5d380 t proxy_trylock_bus +ffffffff81c5d3b0 t proxy_unlock_bus +ffffffff81c5d3e0 t intel_sdvo_enc_destroy +ffffffff81c5d3f0 t intel_sdvo_set_output_timings_from_mode +ffffffff81c5d520 t intel_sdvo_get_preferred_input_mode +ffffffff81c5d910 t intel_sdvo_get_dtd_from_mode +ffffffff81c5da90 t intel_sdvo_read_response +ffffffff81c5e000 t intel_sdvo_get_value +ffffffff81c5e080 t intel_sdvo_write_sdvox +ffffffff81c5e2f0 t intel_sdvo_write_infoframe +ffffffff81c5e4f0 t intel_sdvo_read_infoframe +ffffffff81c5e770 t intel_sdvo_hotplug +ffffffff81c5e7c0 t intel_sdvo_connector_get_hw_state +ffffffff81c5e860 t intel_sdvo_detect +ffffffff81c5ebc0 t intel_sdvo_connector_register +ffffffff81c5ebd0 t intel_sdvo_connector_unregister +ffffffff81c5ebe0 t intel_sdvo_connector_duplicate_state +ffffffff81c5ec70 t intel_sdvo_connector_atomic_set_property +ffffffff81c5ee40 t intel_sdvo_connector_atomic_get_property +ffffffff81c5f060 t intel_sdvo_get_analog_edid +ffffffff81c5f0a0 t intel_sdvo_connector_matches_edid +ffffffff81c5f140 t intel_sdvo_get_modes +ffffffff81c5f470 t intel_sdvo_mode_valid +ffffffff81c5f5a0 t intel_sdvo_atomic_check +ffffffff81c5f660 t intel_sdvo_create_enhance_property +ffffffff81c61000 T intel_snps_phy_wait_for_calibration +ffffffff81c610e0 T intel_snps_phy_update_psr_power_state +ffffffff81c611b0 T intel_snps_phy_set_signal_levels +ffffffff81c61460 T intel_mpllb_calc_state +ffffffff81c61610 T intel_snps_phy_check_hdmi_link_rate +ffffffff81c616b0 T intel_mpllb_enable +ffffffff81c61950 T intel_mpllb_disable +ffffffff81c61b00 T intel_mpllb_calc_port_clock +ffffffff81c61bd0 T intel_mpllb_readout_hw_state +ffffffff81c61d90 T intel_mpllb_state_verify +ffffffff81c63000 T vlv_plane_min_cdclk +ffffffff81c630f0 T ivb_plane_min_cdclk +ffffffff81c631b0 T hsw_plane_min_cdclk +ffffffff81c63250 T chv_plane_check_rotation +ffffffff81c632d0 T intel_sprite_plane_create +ffffffff81c63670 t vlv_sprite_update_noarm +ffffffff81c63770 t vlv_sprite_update_arm +ffffffff81c63e10 t vlv_sprite_disable_arm +ffffffff81c63ea0 t vlv_sprite_get_hw_state +ffffffff81c63f90 t vlv_sprite_check +ffffffff81c64090 t ivb_sprite_update_noarm +ffffffff81c64200 t ivb_sprite_update_arm +ffffffff81c645e0 t ivb_sprite_disable_arm +ffffffff81c64690 t ivb_sprite_get_hw_state +ffffffff81c64760 t g4x_sprite_check +ffffffff81c64a40 t hsw_sprite_max_stride +ffffffff81c64aa0 t g4x_sprite_max_stride +ffffffff81c64b10 t ivb_sprite_min_cdclk +ffffffff81c64c50 t g4x_sprite_update_noarm +ffffffff81c64db0 t g4x_sprite_update_arm +ffffffff81c65200 t g4x_sprite_disable_arm +ffffffff81c652b0 t g4x_sprite_get_hw_state +ffffffff81c65380 t g4x_sprite_min_cdclk +ffffffff81c65460 t vlv_sprite_ctl +ffffffff81c65660 t vlv_sprite_format_mod_supported +ffffffff81c657a0 t ivb_sprite_ctl +ffffffff81c659e0 t g4x_sprite_ctl +ffffffff81c65bb0 t snb_sprite_format_mod_supported +ffffffff81c65ca0 t g4x_sprite_format_mod_supported +ffffffff81c66000 T intel_sprite_set_colorkey_ioctl +ffffffff81c67000 T intel_tc_port_in_tbt_alt_mode +ffffffff81c67090 T intel_tc_port_in_dp_alt_mode +ffffffff81c67120 T intel_tc_port_in_legacy_mode +ffffffff81c671b0 T intel_tc_cold_requires_aux_pw +ffffffff81c67230 T intel_tc_port_get_lane_mask +ffffffff81c67380 T intel_tc_port_get_pin_assignment_mask +ffffffff81c674d0 T intel_tc_port_fia_max_lane_count +ffffffff81c67720 T intel_tc_port_set_fia_lane_count +ffffffff81c67910 T intel_tc_port_init_mode +ffffffff81c67b80 t intel_tc_port_update_mode +ffffffff81c67fb0 T intel_tc_port_sanitize_mode +ffffffff81c68340 T intel_tc_port_connected_locked +ffffffff81c684b0 T intel_tc_port_ref_held +ffffffff81c68510 T intel_tc_port_connected +ffffffff81c685a0 T intel_tc_port_link_needs_reset +ffffffff81c68670 T intel_tc_port_link_reset +ffffffff81c687b0 T intel_tc_port_link_cancel_reset_work +ffffffff81c68880 T intel_tc_port_lock +ffffffff81c688a0 t __intel_tc_port_lock +ffffffff81c68a20 T intel_tc_port_suspend +ffffffff81c68a90 T intel_tc_port_unlock +ffffffff81c68b10 T intel_tc_port_get_link +ffffffff81c68bb0 T intel_tc_port_put_link +ffffffff81c68c70 T intel_tc_port_init +ffffffff81c68f30 t kasprintf +ffffffff81c69010 t intel_tc_port_disconnect_phy_work +ffffffff81c69070 t intel_tc_port_link_reset_work +ffffffff81c69430 T intel_tc_port_cleanup +ffffffff81c69510 t intel_tc_port_needs_reset +ffffffff81c69630 t tgl_tc_phy_cold_off_domain +ffffffff81c69660 t xelpdp_tc_phy_hpd_live_status +ffffffff81c697a0 t adlp_tc_phy_is_ready +ffffffff81c698c0 t xelpdp_tc_phy_is_owned +ffffffff81c699b0 t xelpdp_tc_phy_get_hw_state +ffffffff81c69b80 t xelpdp_tc_phy_connect +ffffffff81c69e60 t xelpdp_tc_phy_disconnect +ffffffff81c69fe0 t adlp_tc_phy_init +ffffffff81c6a050 t tc_phy_get_current_mode +ffffffff81c6a3b0 t tc_phy_wait_for_ready +ffffffff81c6a550 t xelpdp_tc_phy_enable_tcss_power +ffffffff81c6a800 t tc_phy_verify_legacy_or_dp_alt_mode +ffffffff81c6aa10 t xelpdp_tc_phy_wait_for_tcss_power +ffffffff81c6ac60 t adlp_tc_phy_cold_off_domain +ffffffff81c6acc0 t adlp_tc_phy_hpd_live_status +ffffffff81c6ade0 t adlp_tc_phy_is_owned +ffffffff81c6aec0 t adlp_tc_phy_get_hw_state +ffffffff81c6af80 t adlp_tc_phy_connect +ffffffff81c6b320 t adlp_tc_phy_disconnect +ffffffff81c6b4c0 t icl_tc_phy_hpd_live_status +ffffffff81c6b660 t icl_tc_phy_is_ready +ffffffff81c6b780 t icl_tc_phy_is_owned +ffffffff81c6b8a0 t icl_tc_phy_get_hw_state +ffffffff81c6b960 t icl_tc_phy_connect +ffffffff81c6bb20 t icl_tc_phy_disconnect +ffffffff81c6bbb0 t tgl_tc_phy_init +ffffffff81c6bd20 t icl_tc_phy_take_ownership +ffffffff81c6beb0 t icl_tc_phy_cold_off_domain +ffffffff81c6bf10 t icl_tc_phy_init +ffffffff81c6bf70 t __delayed_work_tick +ffffffff81c6c000 T intel_tv_init +ffffffff81c6c490 t intel_tv_compute_config +ffffffff81c6c990 t intel_tv_get_config +ffffffff81c6ceb0 t intel_tv_pre_enable +ffffffff81c6d8f0 t intel_enable_tv +ffffffff81c6d970 t intel_disable_tv +ffffffff81c6d9e0 t intel_tv_get_hw_state +ffffffff81c6da50 t intel_tv_connector_duplicate_state +ffffffff81c6dae0 t intel_tv_mode_to_mode +ffffffff81c6dc30 t intel_tv_get_modes +ffffffff81c6dfb0 t intel_tv_detect +ffffffff81c6e520 t intel_tv_mode_valid +ffffffff81c6e5e0 t intel_tv_atomic_check +ffffffff81c6f000 T i915_get_vblank_counter +ffffffff81c6f220 T g4x_get_vblank_counter +ffffffff81c6f2b0 T intel_crtc_get_vblank_timestamp +ffffffff81c6f2d0 t i915_get_crtc_scanoutpos +ffffffff81c6f720 T intel_get_crtc_scanline +ffffffff81c6f7a0 t __intel_get_crtc_scanline +ffffffff81c6fa00 T intel_wait_for_pipe_scanline_stopped +ffffffff81c6fa10 t wait_for_pipe_scanline_moving +ffffffff81c6fcd0 T intel_wait_for_pipe_scanline_moving +ffffffff81c6fcf0 T intel_crtc_update_active_timings +ffffffff81c70000 T intel_dsc_source_support +ffffffff81c70050 T intel_dsc_compute_params +ffffffff81c70680 T intel_dsc_power_domain +ffffffff81c70730 T intel_dsc_get_num_vdsc_instances +ffffffff81c70780 T intel_dsc_dsi_pps_write +ffffffff81c70ac0 T intel_dsc_dp_pps_write +ffffffff81c70bc0 T intel_uncompressed_joiner_enable +ffffffff81c70cf0 T intel_dsc_enable +ffffffff81c72a10 T intel_dsc_disable +ffffffff81c72ba0 T intel_dsc_get_config +ffffffff81c73000 T intel_vga_disable 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i915_gem_clflush_object +ffffffff81c90280 t clflush_work +ffffffff81c902f0 t clflush_release +ffffffff81c91000 T i915_lut_handle_alloc +ffffffff81c91020 T i915_lut_handle_free +ffffffff81c91040 T i915_gem_context_release +ffffffff81c91070 T i915_gem_init__contexts +ffffffff81c910d0 T i915_gem_context_open +ffffffff81c91290 t i915_gem_create_context +ffffffff81c91bb0 t proto_context_close +ffffffff81c91c70 t gem_context_register +ffffffff81c91e60 T i915_gem_context_close +ffffffff81c92010 t context_close +ffffffff81c92810 T i915_gem_vm_create_ioctl +ffffffff81c92960 t xa_alloc +ffffffff81c92a00 T i915_gem_vm_destroy_ioctl +ffffffff81c92ae0 T i915_gem_user_to_context_sseu +ffffffff81c92d40 T i915_gem_context_lookup +ffffffff81c92ed0 T i915_gem_context_create_ioctl +ffffffff81c93180 t proto_context_register +ffffffff81c93340 T i915_gem_context_destroy_ioctl +ffffffff81c934b0 T i915_gem_context_getparam_ioctl +ffffffff81c93940 T i915_gem_context_setparam_ioctl +ffffffff81c93e90 t set_proto_ctx_param +ffffffff81c94680 T i915_gem_context_reset_stats_ioctl +ffffffff81c947a0 T i915_gem_engines_iter_next +ffffffff81c947f0 T i915_gem_context_module_exit +ffffffff81c94810 T i915_gem_context_module_init +ffffffff81c94870 t i915_gem_context_release_work +ffffffff81c94960 t intel_context_set_gem +ffffffff81c94a90 t engines_notify +ffffffff81c94c20 t intel_context_unpin +ffffffff81c94cb0 t kill_engines +ffffffff81c94e80 t create_setparam +ffffffff81c94f00 t invalid_ext +ffffffff81c94f30 t lookup_user_engine +ffffffff81c94ff0 t set_proto_ctx_engines_balance +ffffffff81c95320 t set_proto_ctx_engines_bond +ffffffff81c95730 t set_proto_ctx_engines_parallel_submit +ffffffff81c96000 T __i915_gem_object_create_user +ffffffff81c96020 t __i915_gem_object_create_user_ext +ffffffff81c96500 T i915_gem_dumb_create +ffffffff81c96690 T i915_gem_create_ioctl +ffffffff81c96780 T i915_gem_create_ext_ioctl +ffffffff81c969a0 t ext_set_placements +ffffffff81c96e00 t ext_set_protected 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i915_gem_get_pat_index +ffffffff81ca4090 T i915_gem_object_has_cache_level +ffffffff81ca4140 T i915_gem_object_alloc +ffffffff81ca41a0 T i915_gem_object_free +ffffffff81ca41c0 T i915_gem_object_init +ffffffff81ca4300 T __i915_gem_object_fini +ffffffff81ca4320 T i915_gem_object_set_cache_coherency +ffffffff81ca4440 T i915_gem_object_set_pat_index +ffffffff81ca44f0 T i915_gem_object_can_bypass_llc +ffffffff81ca4550 T __i915_gem_free_object_rcu +ffffffff81ca45d0 T __i915_gem_object_pages_fini +ffffffff81ca49a0 T __i915_gem_free_object +ffffffff81ca4a60 T i915_gem_flush_free_objects +ffffffff81ca4ab0 t __i915_gem_free_objects +ffffffff81ca4bd0 T __i915_gem_object_flush_frontbuffer +ffffffff81ca4c80 T __i915_gem_object_invalidate_frontbuffer +ffffffff81ca4d30 T i915_gem_object_read_from_page +ffffffff81ca4ec0 T i915_gem_object_has_struct_page +ffffffff81ca4ef0 T i915_gem_object_has_iomem +ffffffff81ca4f30 T i915_gem_object_evictable +ffffffff81ca4ff0 T i915_gem_object_migratable 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intel_rps_init_early +ffffffff81d0c3d0 t rps_work +ffffffff81d0c7b0 t rps_timer +ffffffff81d0c9f0 T intel_rps_init +ffffffff81d0d640 t gen5_rps_init +ffffffff81d0d7b0 T intel_rps_sanitize +ffffffff81d0d810 T intel_rps_read_rpstat +ffffffff81d0d850 T intel_rps_read_actual_frequency +ffffffff81d0d990 T intel_rps_read_actual_frequency_fw +ffffffff81d0da80 t __read_cagf +ffffffff81d0dc40 T intel_rps_read_punit_req_frequency +ffffffff81d0dd70 T intel_rps_get_requested_frequency +ffffffff81d0df50 T intel_rps_get_max_frequency +ffffffff81d0e030 T intel_rps_get_max_raw_freq +ffffffff81d0e0b0 T intel_rps_get_rp0_frequency +ffffffff81d0e190 T intel_rps_get_rp1_frequency +ffffffff81d0e270 T intel_rps_get_rpn_frequency +ffffffff81d0e350 T gen6_rps_frequency_dump +ffffffff81d0fd50 T intel_rps_set_max_frequency +ffffffff81d0ffe0 T intel_rps_get_min_frequency +ffffffff81d100c0 T intel_rps_get_min_raw_freq +ffffffff81d10140 T intel_rps_set_min_frequency +ffffffff81d102d0 T intel_rps_get_up_threshold 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intel_guc_capture_init +ffffffff81d30ca0 t guc_capture_log_get_register +ffffffff81d30dd0 t guc_capture_log_remove_dw +ffffffff81d31000 T intel_guc_ct_init_early +ffffffff81d31160 t ct_incoming_request_worker_func +ffffffff81d315b0 t ct_receive_tasklet_func +ffffffff81d315d0 T intel_guc_ct_init +ffffffff81d31790 T intel_guc_ct_fini +ffffffff81d31810 T intel_guc_ct_enable +ffffffff81d31be0 T intel_guc_ct_disable +ffffffff81d31cc0 T intel_guc_ct_send +ffffffff81d32740 T intel_guc_ct_event_handler +ffffffff81d32770 t ct_try_receive_message +ffffffff81d330b0 T intel_guc_ct_print_info +ffffffff81d33200 t ct_write +ffffffff81d333e0 t ktime_get +ffffffff81d33460 t ct_deadlocked +ffffffff81d34000 T intel_guc_debugfs_register +ffffffff81d35000 T intel_guc_fw_upload +ffffffff81d36000 T intel_gt_init_hwconfig +ffffffff81d36210 T intel_gt_fini_hwconfig +ffffffff81d37000 T intel_guc_log_section_size_capture +ffffffff81d37050 t guc_log_init_sizes +ffffffff81d372b0 T intel_guc_check_log_buf_overflow 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cik_sdma_ring_ib_execute +ffffffff81de5560 T cik_sdma_fence_ring_emit +ffffffff81de5760 t cik_sdma_hdp_flush_ring_emit +ffffffff81de59d0 T cik_sdma_semaphore_ring_emit +ffffffff81de5b00 T cik_sdma_enable +ffffffff81de5cf0 T cik_sdma_resume +ffffffff81de61f0 T cik_sdma_fini +ffffffff81de6240 T cik_copy_dma +ffffffff81de66e0 T cik_sdma_ring_test +ffffffff81de69e0 T cik_sdma_ib_test +ffffffff81de6c80 T cik_sdma_is_lockup +ffffffff81de6d10 T cik_sdma_vm_copy_pages +ffffffff81de6e20 T cik_sdma_vm_write_pages +ffffffff81de6fa0 T cik_sdma_vm_set_pages +ffffffff81de7120 T cik_sdma_vm_pad_ib +ffffffff81de7170 T cik_dma_vm_flush +ffffffff81de8000 T cypress_enable_spread_spectrum +ffffffff81de8140 T cypress_start_dpm +ffffffff81de8190 T cypress_enable_sclk_control +ffffffff81de81f0 T cypress_enable_mclk_control +ffffffff81de8250 T cypress_notify_smc_display_change +ffffffff81de82a0 T cypress_program_response_times +ffffffff81de8390 T cypress_advertise_gen2_capability +ffffffff81de84a0 T cypress_notify_link_speed_change_after_state_change +ffffffff81de8590 T cypress_notify_link_speed_change_before_state_change +ffffffff81de8670 T cypress_get_strobe_mode_settings +ffffffff81de8780 T cypress_get_mclk_frequency_ratio +ffffffff81de8830 T cypress_map_clkf_to_ibias +ffffffff81de88f0 T cypress_convert_power_level_to_smc +ffffffff81de8d10 t cypress_populate_mclk_value +ffffffff81de9150 T cypress_upload_sw_state +ffffffff81de9330 T cypress_upload_mc_reg_table +ffffffff81de9410 t cypress_convert_mc_reg_table_to_smc +ffffffff81de9860 T cypress_calculate_burst_time +ffffffff81de98f0 T cypress_program_memory_timing_parameters +ffffffff81de9ac0 T cypress_populate_smc_initial_state +ffffffff81de9eb0 T cypress_populate_smc_acpi_state +ffffffff81dea260 T cypress_construct_voltage_tables +ffffffff81dea420 T cypress_populate_smc_voltage_tables +ffffffff81dea560 T cypress_get_mvdd_configuration +ffffffff81dea650 T cypress_populate_mc_reg_table +ffffffff81dea9e0 T cypress_get_table_locations +ffffffff81deaaf0 T cypress_enable_display_gap +ffffffff81deab50 T cypress_dpm_setup_asic +ffffffff81deacb0 T cypress_dpm_enable +ffffffff81deb960 t cypress_force_mc_use_s1 +ffffffff81debc30 t cypress_gfx_clock_gating_enable +ffffffff81dec010 t cypress_mg_clock_gating_enable +ffffffff81dec2f0 T cypress_dpm_disable +ffffffff81dec580 T cypress_dpm_set_power_state +ffffffff81dec880 T cypress_dpm_display_configuration_changed +ffffffff81dec960 T cypress_dpm_init +ffffffff81decc30 T cypress_dpm_fini +ffffffff81deccd0 T cypress_dpm_vblank_too_short +ffffffff81decd50 t cypress_wait_for_mc_sequencer +ffffffff81ded000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81ded080 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81ded100 T dce3_2_afmt_write_sad_regs +ffffffff81ded200 T dce3_2_audio_set_dto +ffffffff81ded340 T dce3_2_hdmi_update_acr +ffffffff81ded710 T dce3_2_set_audio_packet +ffffffff81ded8d0 T dce3_2_set_mute +ffffffff81dee000 T dce6_endpoint_rreg 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evergreen_copy_dma +ffffffff81e06aa0 T evergreen_dma_is_lockup +ffffffff81e07000 T dce4_audio_enable +ffffffff81e07080 T evergreen_hdmi_update_acr +ffffffff81e072d0 T dce4_afmt_write_latency_fields +ffffffff81e07340 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81e073c0 T dce4_afmt_dp_write_speaker_allocation +ffffffff81e07440 T evergreen_hdmi_write_sad_regs +ffffffff81e07540 T evergreen_set_avi_packet +ffffffff81e07700 T dce4_hdmi_audio_set_dto +ffffffff81e077e0 T dce4_dp_audio_set_dto +ffffffff81e078e0 T dce4_set_vbi_packet +ffffffff81e07950 T dce4_hdmi_set_color_depth +ffffffff81e07ac0 T dce4_set_audio_packet +ffffffff81e07d10 T dce4_set_mute +ffffffff81e07e20 T evergreen_hdmi_enable +ffffffff81e081b0 T evergreen_dp_enable +ffffffff81e09000 T kv_dpm_enable_bapm +ffffffff81e09070 T kv_dpm_enable +ffffffff81e0a060 t kv_populate_vce_table +ffffffff81e0a300 t kv_populate_samu_table +ffffffff81e0a580 t kv_populate_acp_table +ffffffff81e0a730 t kv_start_am +ffffffff81e0a770 t kv_enable_auto_thermal_throttling +ffffffff81e0a7b0 t kv_enable_dpm_voltage_scaling +ffffffff81e0a7f0 t kv_set_dpm_interval +ffffffff81e0a830 t kv_start_dpm +ffffffff81e0a880 t kv_enable_didt +ffffffff81e0ab80 T kv_dpm_late_enable +ffffffff81e0add0 T kv_dpm_powergate_uvd +ffffffff81e0af90 T kv_dpm_disable +ffffffff81e0b390 T kv_dpm_force_performance_level +ffffffff81e0b540 t kv_force_dpm_lowest +ffffffff81e0b620 T kv_dpm_pre_set_power_state +ffffffff81e0bba0 T kv_dpm_set_power_state +ffffffff81e0c490 t kv_set_valid_clock_range +ffffffff81e0c630 t kv_calculate_ds_divider +ffffffff81e0c7d0 t kv_calculate_nbps_level_settings +ffffffff81e0c950 t kv_update_vce_dpm +ffffffff81e0cb70 T kv_dpm_post_set_power_state +ffffffff81e0cc10 T kv_dpm_setup_asic +ffffffff81e0cc80 T kv_dpm_init +ffffffff81e0d580 T kv_dpm_debugfs_print_current_performance_level +ffffffff81e0d5f0 T kv_dpm_get_current_sclk +ffffffff81e0d660 T kv_dpm_get_current_mclk +ffffffff81e0d690 T kv_dpm_print_power_state +ffffffff81e0d760 T kv_dpm_fini +ffffffff81e0d810 T kv_dpm_display_configuration_changed +ffffffff81e0d840 T kv_dpm_get_sclk +ffffffff81e0d890 T kv_dpm_get_mclk +ffffffff81e0e000 T kv_notify_message_to_smu +ffffffff81e0e0c0 T kv_dpm_get_enable_mask +ffffffff81e0e1b0 T kv_send_msg_to_smc_with_parameter +ffffffff81e0e280 T kv_read_smc_sram_dword +ffffffff81e0e310 T kv_smc_dpm_enable +ffffffff81e0e450 T kv_smc_bapm_enable +ffffffff81e0e590 T kv_copy_bytes_to_smc +ffffffff81e0f000 T tn_smc_rreg +ffffffff81e0f090 T tn_smc_wreg +ffffffff81e0f100 T ni_mc_load_microcode +ffffffff81e0f2f0 T ni_init_microcode +ffffffff81e0f8c0 t request_firmware +ffffffff81e0f970 t release_firmware +ffffffff81e0f9b0 T cayman_get_allowed_info_register +ffffffff81e0fa40 T tn_get_temp +ffffffff81e0fae0 T cayman_pcie_gart_tlb_flush +ffffffff81e0fb30 T cayman_cp_int_cntl_setup +ffffffff81e0fb80 T cayman_fence_ring_emit +ffffffff81e0ff70 T cayman_ring_ib_execute +ffffffff81e10440 T cayman_gfx_get_rptr +ffffffff81e104d0 T cayman_gfx_get_wptr +ffffffff81e10540 T cayman_gfx_set_wptr +ffffffff81e105c0 T cayman_gpu_check_soft_reset +ffffffff81e10760 T cayman_asic_reset +ffffffff81e10af0 T cayman_gfx_is_lockup +ffffffff81e10b70 T cayman_resume +ffffffff81e10c30 t ni_init_golden_registers +ffffffff81e10d20 t cayman_startup +ffffffff81e122e0 T cayman_suspend +ffffffff81e12520 T cayman_init +ffffffff81e129b0 t cayman_uvd_init +ffffffff81e12a70 t cayman_vce_init +ffffffff81e12b50 t cayman_cp_fini +ffffffff81e12be0 t cayman_pcie_gart_fini +ffffffff81e12d30 T cayman_fini +ffffffff81e13070 T cayman_vm_init +ffffffff81e130d0 T cayman_vm_fini +ffffffff81e13100 T cayman_vm_decode_fault +ffffffff81e131a0 T cayman_vm_flush +ffffffff81e13680 T tn_set_vce_clocks +ffffffff81e13980 t cayman_uvd_start +ffffffff81e13a60 t cayman_vce_start +ffffffff81e13bb0 t cayman_cp_load_microcode +ffffffff81e13d40 t cayman_cp_resume +ffffffff81e14df0 t cayman_uvd_resume +ffffffff81e14ed0 t cayman_vce_resume +ffffffff81e15000 T cayman_dma_get_rptr +ffffffff81e15070 T cayman_dma_get_wptr +ffffffff81e150c0 T cayman_dma_set_wptr +ffffffff81e15110 T cayman_dma_ring_ib_execute +ffffffff81e154e0 T cayman_dma_stop +ffffffff81e15590 T cayman_dma_resume +ffffffff81e15800 T cayman_dma_fini +ffffffff81e158c0 T cayman_dma_is_lockup +ffffffff81e15950 T cayman_dma_vm_copy_pages +ffffffff81e15a50 T cayman_dma_vm_write_pages +ffffffff81e15bc0 T cayman_dma_vm_set_pages +ffffffff81e15d30 T cayman_dma_vm_pad_ib +ffffffff81e15d80 T cayman_dma_vm_flush +ffffffff81e17000 T ni_get_pi +ffffffff81e17030 T ni_get_ps +ffffffff81e17060 T ni_dpm_vblank_too_short +ffffffff81e170e0 T ni_dpm_force_performance_level +ffffffff81e17250 T ni_copy_and_switch_arb_sets +ffffffff81e17520 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81e175a0 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81e17620 T ni_dpm_setup_asic +ffffffff81e17880 T ni_update_current_ps +ffffffff81e17950 T ni_update_requested_ps +ffffffff81e17a20 T ni_dpm_enable +ffffffff81e18a20 t ni_init_smc_table +ffffffff81e19450 t ni_init_smc_spll_table +ffffffff81e195e0 t ni_init_arb_table_index +ffffffff81e19690 t ni_populate_mc_reg_table +ffffffff81e19bd0 t ni_initialize_smc_cac_tables +ffffffff81e1aea0 t ni_initialize_hardware_cac_manager +ffffffff81e1b4d0 t ni_populate_smc_tdp_limits +ffffffff81e1b6b0 t ni_program_response_times +ffffffff81e1b800 T ni_dpm_disable +ffffffff81e1bc60 t ni_enable_power_containment +ffffffff81e1bd40 t ni_enable_smc_cac +ffffffff81e1bea0 T ni_dpm_pre_set_power_state +ffffffff81e1c510 T ni_dpm_set_power_state +ffffffff81e1c890 t ni_upload_sw_state +ffffffff81e1d550 t ni_upload_mc_reg_table +ffffffff81e1d7d0 t ni_power_control_set_level +ffffffff81e1d8d0 T ni_dpm_post_set_power_state +ffffffff81e1d9c0 T ni_dpm_init +ffffffff81e1e420 T ni_dpm_fini +ffffffff81e1e4f0 T ni_dpm_print_power_state +ffffffff81e1e5f0 T ni_dpm_debugfs_print_current_performance_level +ffffffff81e1e630 T ni_dpm_get_current_sclk +ffffffff81e1e6a0 T ni_dpm_get_current_mclk +ffffffff81e1e710 T ni_dpm_get_sclk +ffffffff81e1e780 T ni_dpm_get_mclk +ffffffff81e1e7e0 t ni_do_program_memory_timing_parameters +ffffffff81e1e940 t ni_calculate_sclk_params +ffffffff81e1eb90 t ni_calculate_power_boost_limit +ffffffff81e1ed30 t ni_populate_mclk_value +ffffffff81e20000 T r100_wait_for_vblank +ffffffff81e20190 T r100_page_flip +ffffffff81e204a0 T r100_page_flip_pending +ffffffff81e20570 T r100_pm_get_dynpm_state +ffffffff81e20790 T r100_pm_init_profile +ffffffff81e20870 T r100_pm_misc +ffffffff81e20d10 T r100_pm_prepare +ffffffff81e20dc0 T r100_pm_finish +ffffffff81e20e70 T r100_gui_idle +ffffffff81e20eb0 T r100_hpd_sense +ffffffff81e20f10 T r100_hpd_set_polarity +ffffffff81e20fd0 T r100_hpd_init +ffffffff81e21080 T r100_hpd_fini +ffffffff81e210f0 T r100_pci_gart_tlb_flush +ffffffff81e21120 T r100_pci_gart_init +ffffffff81e21200 T r100_pci_gart_get_page_entry +ffffffff81e21230 T r100_pci_gart_set_page +ffffffff81e21270 T r100_pci_gart_enable +ffffffff81e21360 T r100_pci_gart_disable +ffffffff81e213e0 T r100_pci_gart_fini +ffffffff81e21460 T r100_irq_set +ffffffff81e21540 T r100_irq_disable +ffffffff81e215c0 T r100_irq_process +ffffffff81e218f0 T r100_get_vblank_counter +ffffffff81e21940 T r100_fence_ring_emit +ffffffff81e21e10 T r100_semaphore_ring_emit +ffffffff81e21e40 T r100_copy_blit +ffffffff81e22570 T r100_ring_start +ffffffff81e22670 T r100_gfx_get_rptr +ffffffff81e226d0 T r100_gfx_get_wptr +ffffffff81e22710 T r100_gfx_set_wptr +ffffffff81e22750 T r100_cp_init +ffffffff81e22d70 T r100_debugfs_cp_init +ffffffff81e22da0 T r100_cp_fini +ffffffff81e22e70 T r100_cp_disable +ffffffff81e22fd0 T r100_gui_wait_for_idle +ffffffff81e230c0 T r100_reloc_pitch_offset +ffffffff81e23230 T r100_packet3_load_vbpntr +ffffffff81e23520 T r100_cs_parse_packet0 +ffffffff81e23630 T r100_cs_packet_parse_vline +ffffffff81e23860 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81e238e0 T r100_cs_parse +ffffffff81e24bd0 T r100_cs_track_clear +ffffffff81e24f60 T r100_cs_track_check +ffffffff81e25820 T r100_mc_wait_for_idle +ffffffff81e258c0 T r100_gpu_is_lockup +ffffffff81e25930 T r100_enable_bm +ffffffff81e25980 T r100_bm_disable +ffffffff81e25a40 T r100_asic_reset +ffffffff81e25dd0 T r100_mc_stop +ffffffff81e25f90 T r100_mc_resume +ffffffff81e26050 T r100_set_common_regs +ffffffff81e26200 T r100_vram_init_sizes +ffffffff81e26410 T r100_vga_set_state +ffffffff81e26470 T r100_pll_errata_after_index +ffffffff81e264b0 T r100_pll_rreg +ffffffff81e26620 T r100_pll_wreg +ffffffff81e26770 T r100_debugfs_rbbm_init +ffffffff81e267a0 T r100_debugfs_mc_info_init +ffffffff81e267d0 T r100_set_surface_reg +ffffffff81e26a20 T r100_clear_surface_reg +ffffffff81e26ae0 T r100_bandwidth_update +ffffffff81e27550 T r100_ring_test +ffffffff81e27880 T r100_ring_ib_execute +ffffffff81e27b00 T r100_ib_test +ffffffff81e27ec0 T r100_vga_render_disable +ffffffff81e27f20 T r100_resume +ffffffff81e28160 t r100_startup +ffffffff81e28720 T r100_suspend +ffffffff81e28820 T r100_fini +ffffffff81e28990 T r100_restore_sanity +ffffffff81e28a30 T r100_init +ffffffff81e28f70 t r100_set_safe_registers +ffffffff81e28ff0 T r100_mm_rreg_slow +ffffffff81e29080 T r100_mm_wreg_slow +ffffffff81e290f0 T r100_io_rreg +ffffffff81e291a0 T r100_io_wreg +ffffffff81e29220 t r100_get_vtx_size +ffffffff81e29310 t r100_cs_track_texture_print +ffffffff81e2a000 T r200_copy_dma +ffffffff81e2a4e0 T r200_packet0_check +ffffffff81e2b340 t r200_get_vtx_size_0 +ffffffff81e2b500 t r200_get_vtx_size_1 +ffffffff81e2b590 T r200_set_safe_registers +ffffffff81e2c000 T rv370_pcie_rreg +ffffffff81e2c090 T rv370_pcie_wreg +ffffffff81e2c100 T rv370_pcie_gart_tlb_flush +ffffffff81e2c390 T rv370_pcie_gart_get_page_entry +ffffffff81e2c3f0 T rv370_pcie_gart_set_page +ffffffff81e2c430 T rv370_pcie_gart_init +ffffffff81e2c510 T rv370_pcie_gart_enable +ffffffff81e2c950 T rv370_pcie_gart_disable +ffffffff81e2cb40 T rv370_pcie_gart_fini +ffffffff81e2cb80 T r300_fence_ring_emit +ffffffff81e2d190 T r300_ring_start +ffffffff81e2dc30 T r300_mc_wait_for_idle +ffffffff81e2dcd0 T r300_asic_reset +ffffffff81e2df30 T r300_mc_init +ffffffff81e2e000 T rv370_set_pcie_lanes +ffffffff81e2e220 T rv370_get_pcie_lanes +ffffffff81e2e2e0 T r300_cs_parse +ffffffff81e2e6b0 t r300_packet0_check +ffffffff81e2f610 T r300_set_reg_safe +ffffffff81e2f650 T r300_mc_program +ffffffff81e2f800 T r300_clock_startup +ffffffff81e2f890 T r300_resume +ffffffff81e2fab0 t r300_startup +ffffffff81e2fea0 T r300_suspend +ffffffff81e2ff50 T r300_fini +ffffffff81e300b0 T r300_init +ffffffff81e31000 T r420_pm_init_profile +ffffffff81e310f0 T r420_pipes_init +ffffffff81e312f0 T r420_mc_rreg +ffffffff81e31380 T r420_mc_wreg +ffffffff81e31400 T r420_resume +ffffffff81e31620 t r420_startup +ffffffff81e318b0 T r420_suspend +ffffffff81e31aa0 T r420_fini +ffffffff81e31bf0 T r420_init +ffffffff81e31f50 T r420_debugfs_pipes_info_init +ffffffff81e31f80 t r420_cp_errata_init +ffffffff81e33000 T r520_mc_wait_for_idle +ffffffff81e330b0 T r520_resume +ffffffff81e331e0 t r520_startup +ffffffff81e336b0 T r520_init +ffffffff81e34000 T r600_rcu_rreg +ffffffff81e340a0 T r600_rcu_wreg +ffffffff81e34120 T r600_uvd_ctx_rreg +ffffffff81e341c0 T r600_uvd_ctx_wreg +ffffffff81e34240 T r600_get_allowed_info_register +ffffffff81e342c0 T r600_get_xclk +ffffffff81e342f0 T r600_set_uvd_clocks +ffffffff81e34980 T dce3_program_fmt +ffffffff81e34ab0 T rv6xx_get_temp +ffffffff81e34b00 T r600_pm_get_dynpm_state +ffffffff81e34f10 T rs780_pm_init_profile +ffffffff81e35020 T r600_pm_init_profile +ffffffff81e352e0 T r600_pm_misc +ffffffff81e353d0 T r600_gui_idle +ffffffff81e35410 T r600_hpd_sense +ffffffff81e35530 T r600_hpd_set_polarity +ffffffff81e357b0 T r600_hpd_init +ffffffff81e35990 T r600_hpd_fini +ffffffff81e35b40 T r600_pcie_gart_tlb_flush +ffffffff81e35c80 T r600_pcie_gart_init +ffffffff81e35d30 T r600_mc_wait_for_idle +ffffffff81e35dd0 T rs780_mc_rreg +ffffffff81e35e80 T rs780_mc_wreg +ffffffff81e35f10 T r600_vram_scratch_init +ffffffff81e36030 t radeon_bo_reserve +ffffffff81e361d0 t radeon_bo_unreserve +ffffffff81e362e0 T r600_vram_scratch_fini +ffffffff81e36370 T r600_set_bios_scratch_engine_hung +ffffffff81e363c0 T r600_gpu_check_soft_reset +ffffffff81e36790 T r600_asic_reset +ffffffff81e36bc0 t r600_gpu_pci_config_reset +ffffffff81e36e20 T r600_gfx_is_lockup +ffffffff81e36ea0 T r6xx_remap_render_backend +ffffffff81e37070 T r600_count_pipe_bits +ffffffff81e370e0 T r600_pciep_rreg +ffffffff81e37170 T r600_pciep_wreg +ffffffff81e371e0 T r600_cp_stop +ffffffff81e37260 T r600_init_microcode +ffffffff81e37810 t request_firmware +ffffffff81e378c0 t release_firmware +ffffffff81e37900 T r600_gfx_get_rptr +ffffffff81e37960 T r600_gfx_get_wptr +ffffffff81e379a0 T r600_gfx_set_wptr +ffffffff81e379e0 T r600_cp_start +ffffffff81e37db0 T r600_cp_resume +ffffffff81e381d0 T r600_ring_init +ffffffff81e38290 T r600_cp_fini +ffffffff81e38320 T r600_scratch_init +ffffffff81e38390 T r600_ring_test +ffffffff81e386b0 T r600_fence_ring_emit +ffffffff81e39020 T r600_semaphore_ring_emit +ffffffff81e39240 T r600_copy_cpdma +ffffffff81e398b0 T r600_set_surface_reg +ffffffff81e398e0 T r600_clear_surface_reg +ffffffff81e39910 T r600_vga_set_state +ffffffff81e39970 T r600_resume +ffffffff81e39a20 t r600_startup +ffffffff81e3b930 T r600_suspend +ffffffff81e3baf0 T r600_irq_suspend +ffffffff81e3bbd0 t r600_pcie_gart_disable +ffffffff81e3bdd0 T r600_init +ffffffff81e3c6f0 T r600_ih_ring_init +ffffffff81e3c760 T r600_irq_fini +ffffffff81e3c8e0 t r600_pcie_gart_fini +ffffffff81e3c920 T r600_fini +ffffffff81e3cb70 T r600_ring_ib_execute +ffffffff81e3d060 T r600_ib_test +ffffffff81e3d370 T r600_ih_ring_alloc +ffffffff81e3d4c0 T r600_ih_ring_fini +ffffffff81e3d570 T r600_rlc_stop +ffffffff81e3d780 T r600_disable_interrupts +ffffffff81e3d830 T r600_irq_init +ffffffff81e3dcd0 t r600_disable_interrupt_state +ffffffff81e3dfd0 T r600_irq_disable +ffffffff81e3e0a0 T r600_irq_set +ffffffff81e3e8a0 t r600_irq_ack +ffffffff81e3edd0 T r600_irq_process +ffffffff81e3fb40 T r600_mmio_hdp_flush +ffffffff81e3fbc0 T r600_set_pcie_lanes +ffffffff81e3fd00 T r600_get_pcie_lanes +ffffffff81e3fdf0 T r600_get_gpu_clock_counter +ffffffff81e3fea0 t r600_cp_load_microcode +ffffffff81e40200 t r600_uvd_resume +ffffffff81e41000 T r600_fmt_is_valid_color +ffffffff81e41040 T r600_fmt_is_valid_texture +ffffffff81e41090 T r600_fmt_get_blocksize +ffffffff81e410d0 T r600_fmt_get_nblocksx +ffffffff81e41120 T r600_fmt_get_nblocksy +ffffffff81e41180 T r600_cs_common_vline_parse +ffffffff81e41470 T r600_mip_minify +ffffffff81e414d0 T r600_cs_parse +ffffffff81e43540 T r600_dma_cs_next_reloc +ffffffff81e435d0 T r600_dma_cs_parse +ffffffff81e43cb0 t r600_cs_track_check +ffffffff81e44e90 t r600_cs_check_reg +ffffffff81e45e70 t r600_is_safe_reg +ffffffff81e45f20 t r600_texture_size +ffffffff81e47000 T r600_dma_get_rptr +ffffffff81e47060 T r600_dma_get_wptr +ffffffff81e470a0 T r600_dma_set_wptr +ffffffff81e470e0 T r600_dma_stop +ffffffff81e47170 T r600_dma_resume +ffffffff81e47390 T r600_dma_fini +ffffffff81e47410 T r600_dma_is_lockup +ffffffff81e47490 T r600_dma_ring_test +ffffffff81e47750 T r600_dma_fence_ring_emit +ffffffff81e47960 T r600_dma_semaphore_ring_emit +ffffffff81e47aa0 T r600_dma_ib_test +ffffffff81e47d10 T r600_dma_ring_ib_execute +ffffffff81e480a0 T r600_copy_dma +ffffffff81e49000 T r600_dpm_print_class_info +ffffffff81e49340 T r600_dpm_print_cap_info +ffffffff81e493e0 T r600_dpm_print_ps_status +ffffffff81e494a0 T r600_dpm_get_vblank_time +ffffffff81e49560 T r600_dpm_get_vrefresh +ffffffff81e495f0 T r600_calculate_u_and_p +ffffffff81e49670 T r600_calculate_at +ffffffff81e49720 T r600_gfx_clockgating_enable +ffffffff81e49830 T r600_dynamicpm_enable +ffffffff81e49880 T r600_enable_thermal_protection +ffffffff81e498e0 T r600_enable_acpi_pm +ffffffff81e49930 T r600_enable_dynamic_pcie_gen2 +ffffffff81e49980 T r600_dynamicpm_enabled +ffffffff81e499c0 T r600_enable_sclk_control +ffffffff81e49a20 T r600_enable_mclk_control +ffffffff81e49a80 T r600_enable_spll_bypass +ffffffff81e49ad0 T r600_wait_for_spll_change +ffffffff81e49b60 T r600_set_bsp +ffffffff81e49ba0 T r600_set_at +ffffffff81e49c00 T r600_set_tc +ffffffff81e49c60 T r600_select_td +ffffffff81e49d10 T r600_set_vrc +ffffffff81e49d50 T r600_set_tpu +ffffffff81e49db0 T r600_set_tpc +ffffffff81e49e10 T r600_set_sstu +ffffffff81e49e70 T r600_set_sst +ffffffff81e49ec0 T r600_set_git +ffffffff81e49f10 T r600_set_fctu +ffffffff81e49f70 T r600_set_fct +ffffffff81e49fc0 T r600_set_ctxcgtt3d_rphc +ffffffff81e4a020 T r600_set_ctxcgtt3d_rsdc +ffffffff81e4a080 T r600_set_vddc3d_oorsu +ffffffff81e4a0e0 T r600_set_vddc3d_oorphc +ffffffff81e4a140 T r600_set_vddc3d_oorsdc +ffffffff81e4a1a0 T r600_set_mpll_lock_time +ffffffff81e4a1f0 T r600_set_mpll_reset_time +ffffffff81e4a240 T r600_engine_clock_entry_enable +ffffffff81e4a340 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81e4a440 T r600_engine_clock_entry_enable_post_divider +ffffffff81e4a540 T r600_engine_clock_entry_set_post_divider +ffffffff81e4a610 T r600_engine_clock_entry_set_reference_divider +ffffffff81e4a6e0 T r600_engine_clock_entry_set_feedback_divider +ffffffff81e4a7b0 T r600_engine_clock_entry_set_step_time +ffffffff81e4a880 T r600_vid_rt_set_ssu +ffffffff81e4a8e0 T r600_vid_rt_set_vru +ffffffff81e4a940 T r600_vid_rt_set_vrt +ffffffff81e4a9a0 T r600_voltage_control_enable_pins +ffffffff81e4a9f0 T r600_voltage_control_program_voltages +ffffffff81e4aa80 T r600_voltage_control_deactivate_static_control +ffffffff81e4ab10 T r600_power_level_enable +ffffffff81e4ab80 T r600_power_level_set_voltage_index +ffffffff81e4abf0 T r600_power_level_set_mem_clock_index +ffffffff81e4ac50 T r600_power_level_set_eng_clock_index +ffffffff81e4acc0 T r600_power_level_set_watermark_id +ffffffff81e4ad30 T r600_power_level_set_pcie_gen2 +ffffffff81e4ad90 T r600_power_level_get_current_index +ffffffff81e4add0 T r600_power_level_get_target_index +ffffffff81e4ae10 T r600_power_level_set_enter_index +ffffffff81e4ae70 T r600_wait_for_power_level_unequal +ffffffff81e4af70 T r600_wait_for_power_level +ffffffff81e4b070 T r600_start_dpm +ffffffff81e4b360 T r600_stop_dpm +ffffffff81e4b3b0 T r600_dpm_pre_set_power_state +ffffffff81e4b3e0 T r600_dpm_post_set_power_state +ffffffff81e4b410 T r600_is_uvd_state +ffffffff81e4b450 T r600_is_internal_thermal_sensor +ffffffff81e4b490 T r600_dpm_late_enable +ffffffff81e4b5a0 T r600_get_platform_caps +ffffffff81e4b640 T r600_parse_extended_power_table +ffffffff81e4c490 T r600_free_extended_power_table +ffffffff81e4c5f0 T r600_get_pcie_gen_support +ffffffff81e4c640 T r600_get_pcie_lane_support +ffffffff81e4c6a0 T r600_encode_pci_lane_width +ffffffff81e4d000 T r600_audio_update_hdmi +ffffffff81e4d180 t r600_audio_status +ffffffff81e4d2a0 T r600_hdmi_buffer_status_changed +ffffffff81e4d350 T r600_hdmi_update_audio_settings +ffffffff81e4d7c0 T r600_audio_enable +ffffffff81e4d840 T r600_audio_get_pin +ffffffff81e4d870 T r600_hdmi_update_acr +ffffffff81e4dc90 T r600_set_avi_packet +ffffffff81e4ded0 T r600_hdmi_audio_workaround +ffffffff81e4dfa0 T r600_hdmi_audio_set_dto +ffffffff81e4e060 T r600_set_vbi_packet +ffffffff81e4e120 T r600_set_audio_packet +ffffffff81e4e460 T r600_set_mute +ffffffff81e4e570 T r600_hdmi_enable +ffffffff81e4f000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81e4f040 T radeon_acpi_pcie_notify_device_ready +ffffffff81e4f170 T radeon_acpi_pcie_performance_request +ffffffff81e4f570 T radeon_acpi_init +ffffffff81e4fde0 t radeon_acpi_event +ffffffff81e50160 T radeon_acpi_fini +ffffffff81e51000 T radeon_agp_head_init +ffffffff81e51050 T radeon_agp_init +ffffffff81e510b0 T radeon_agp_resume +ffffffff81e51150 T radeon_agp_fini +ffffffff81e511a0 T radeon_agp_suspend +ffffffff81e52000 T radeon_agp_disable +ffffffff81e52130 T radeon_asic_init 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radeon_atom_get_voltage_evv +ffffffff81e57ed0 T radeon_atom_get_voltage_gpio_settings +ffffffff81e57ff0 T radeon_atom_is_voltage_gpio +ffffffff81e581a0 T radeon_atom_get_svi2_info +ffffffff81e58290 T radeon_atom_get_max_voltage +ffffffff81e58420 T radeon_atom_get_min_voltage +ffffffff81e58580 T radeon_atom_get_voltage_step +ffffffff81e586a0 T radeon_atom_round_to_true_voltage +ffffffff81e58820 T radeon_atom_get_voltage_table +ffffffff81e58ac0 T radeon_atom_get_memory_info +ffffffff81e58c80 T radeon_atom_get_mclk_range_table +ffffffff81e58ed0 T radeon_atom_init_mc_reg_table +ffffffff81e59160 T radeon_atom_initialize_bios_scratch_regs +ffffffff81e59230 T radeon_save_bios_scratch_regs +ffffffff81e59310 T radeon_restore_bios_scratch_regs +ffffffff81e593f0 T radeon_atom_output_lock +ffffffff81e59480 T radeon_atombios_connected_scratch_regs +ffffffff81e59ce0 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81e59e30 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81e5a060 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81e5a240 t radeon_atombios_add_pplib_thermal_controller +ffffffff81e5a6c0 t radeon_atombios_parse_pplib_clock_info +ffffffff81e5aa80 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81e5b000 T radeon_audio_init +ffffffff81e5b200 t radeon_audio_enable +ffffffff81e5b360 T radeon_audio_endpoint_rreg +ffffffff81e5b3a0 T radeon_audio_endpoint_wreg +ffffffff81e5b3e0 T radeon_audio_get_pin +ffffffff81e5b430 T radeon_audio_detect +ffffffff81e5b5d0 T radeon_audio_fini +ffffffff81e5b660 T radeon_audio_mode_set +ffffffff81e5b6b0 T radeon_audio_dpms +ffffffff81e5b700 T radeon_audio_decode_dfs_div +ffffffff81e5b760 T radeon_audio_component_init +ffffffff81e5b7d0 T radeon_audio_component_fini +ffffffff81e5b820 t radeon_audio_hdmi_mode_set +ffffffff81e5bf80 t radeon_audio_write_speaker_allocation +ffffffff81e5c060 t radeon_audio_write_sad_regs +ffffffff81e5c160 t radeon_audio_set_avi_packet +ffffffff81e5c2c0 t radeon_audio_dp_mode_set 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radeon_combios_output_lock +ffffffff81e6b790 T radeon_combios_connected_scratch_regs +ffffffff81e6bb80 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81e6bc60 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81e6c000 T radeon_connector_hotplug +ffffffff81e6c140 T radeon_get_monitor_bpc +ffffffff81e6c610 T radeon_connector_edid +ffffffff81e6c6d0 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81e6c750 T radeon_connector_is_dp12_capable +ffffffff81e6c7f0 T radeon_add_atom_connector +ffffffff81e6d940 T radeon_add_legacy_connector +ffffffff81e6ded0 t radeon_dp_detect +ffffffff81e6e320 t radeon_dvi_force +ffffffff81e6e370 t radeon_connector_set_property +ffffffff81e6ec60 t radeon_connector_unregister +ffffffff81e6ecd0 t radeon_connector_destroy +ffffffff81e6ed60 t radeon_best_single_encoder +ffffffff81e6edd0 t radeon_connector_get_edid +ffffffff81e6ef40 t radeon_dp_get_modes +ffffffff81e6f2d0 t radeon_dp_mode_valid +ffffffff81e6f4d0 t radeon_dvi_encoder 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radeon_wb_init +ffffffff81e76d60 T radeon_vram_location +ffffffff81e76ea0 T radeon_gtt_location +ffffffff81e76fe0 T radeon_device_is_virtual +ffffffff81e77010 T radeon_card_posted +ffffffff81e77250 T radeon_update_bandwidth_info +ffffffff81e772d0 T radeon_boot_test_post_card +ffffffff81e773c0 T radeon_dummy_page_init +ffffffff81e77490 T radeon_dummy_page_fini +ffffffff81e77500 T radeon_atombios_init +ffffffff81e776e0 t cail_reg_read +ffffffff81e77740 t cail_reg_write +ffffffff81e777a0 t cail_ioreg_read +ffffffff81e777c0 t cail_ioreg_write +ffffffff81e777e0 t cail_mc_read +ffffffff81e77810 t cail_mc_write +ffffffff81e77840 t cail_pll_read +ffffffff81e77870 t cail_pll_write +ffffffff81e778a0 T radeon_atombios_fini +ffffffff81e77970 T radeon_combios_init +ffffffff81e779c0 T radeon_combios_fini +ffffffff81e779f0 T radeon_device_init +ffffffff81e786e0 T radeon_device_fini +ffffffff81e78810 T radeon_suspend_kms +ffffffff81e78cd0 T radeon_resume_kms +ffffffff81e78fc0 T radeon_gpu_reset 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radeon_panel_mode_fixup +ffffffff81e82840 T radeon_dig_monitor_is_duallink +ffffffff81e82970 T radeon_encoder_is_digital +ffffffff81e83000 T radeon_fbdev_setup +ffffffff81e83180 T radeon_fbdev_set_suspend +ffffffff81e831d0 T radeon_fbdev_robj_is_fb +ffffffff81e83250 T radeondrm_burner +ffffffff81e832e0 T radeondrm_burner_cb +ffffffff81e83310 t radeon_fbdev_fb_helper_fb_probe +ffffffff81e83980 t radeon_bo_reserve +ffffffff81e83b20 t radeon_bo_unreserve +ffffffff81e83c30 t radeon_fbdev_client_unregister +ffffffff81e83ca0 t radeon_fbdev_client_restore +ffffffff81e83cf0 t radeon_fbdev_client_hotplug +ffffffff81e84000 T radeon_fence_emit +ffffffff81e84140 T radeon_fence_process +ffffffff81e84220 t radeon_fence_activity +ffffffff81e844b0 T radeon_fence_signaled +ffffffff81e84530 t radeon_fence_seq_signaled +ffffffff81e84650 T radeon_fence_wait_timeout +ffffffff81e84790 t radeon_fence_wait_seq_timeout +ffffffff81e84c70 T radeon_fence_wait +ffffffff81e84dc0 T radeon_fence_wait_any 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radeon_fence_wait_cb +ffffffff81e87000 T radeon_gart_table_ram_alloc +ffffffff81e870d0 T radeon_gart_table_ram_free +ffffffff81e87140 T radeon_gart_table_vram_alloc +ffffffff81e871c0 T radeon_gart_table_vram_pin +ffffffff81e87350 t radeon_bo_reserve +ffffffff81e874f0 t radeon_bo_unreserve +ffffffff81e87600 T radeon_gart_table_vram_unpin +ffffffff81e876a0 T radeon_gart_table_vram_free +ffffffff81e876e0 T radeon_gart_unbind +ffffffff81e87810 T radeon_gart_bind +ffffffff81e87980 T radeon_gart_init +ffffffff81e87ac0 T radeon_gart_fini +ffffffff81e88000 T radeon_gem_fault +ffffffff81e881d0 T radeon_gem_vm_reference +ffffffff81e88200 T radeon_gem_vm_detach +ffffffff81e88210 T radeon_gem_object_create +ffffffff81e88420 T radeon_gem_init +ffffffff81e88460 T radeon_gem_fini +ffffffff81e88470 t radeon_gem_object_free +ffffffff81e884c0 t radeon_gem_object_open +ffffffff81e88580 t radeon_gem_object_close +ffffffff81e88680 t radeon_gem_object_mmap +ffffffff81e88730 T radeon_gem_info_ioctl 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radeon_bo_force_delete +ffffffff81e9ae60 T radeon_bo_init +ffffffff81e9af70 T radeon_bo_fini +ffffffff81e9afb0 T radeon_bo_list_validate +ffffffff81e9b300 T radeon_bo_get_surface_reg +ffffffff81e9b590 T radeon_bo_set_tiling_flags +ffffffff81e9b900 T radeon_bo_get_tiling_flags +ffffffff81e9b950 T radeon_bo_move_notify +ffffffff81e9ba20 T radeon_bo_fault_reserve_notify +ffffffff81e9bce0 t ttm_bo_move_to_lru_tail_unlocked +ffffffff81e9bd30 T radeon_bo_fence +ffffffff81e9c000 T radeon_pm_get_type_index +ffffffff81e9c080 T radeon_pm_acpi_event_handler +ffffffff81e9c190 t radeon_pm_update_profile +ffffffff81e9c2b0 t radeon_pm_set_clocks +ffffffff81e9cda0 T radeon_dpm_enable_uvd +ffffffff81e9ce80 T radeon_pm_compute_clocks +ffffffff81e9d9b0 T radeon_dpm_enable_vce +ffffffff81e9da30 T radeon_pm_suspend +ffffffff81e9db50 T radeon_pm_resume +ffffffff81e9de80 T radeon_pm_init +ffffffff81e9e620 T radeon_pm_late_init +ffffffff81e9e700 T radeon_pm_fini +ffffffff81e9e860 t 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radeon_vm_bo_set_addr +ffffffff81eafe10 t radeon_bo_unreserve +ffffffff81eaff20 t radeon_vm_clear_bo +ffffffff81eb0150 T radeon_vm_map_gart +ffffffff81eb0190 T radeon_vm_update_page_directory +ffffffff81eb0560 T radeon_vm_bo_update +ffffffff81eb0c70 t radeon_vm_fence_pts +ffffffff81eb0d00 T radeon_vm_clear_freed +ffffffff81eb0e40 T radeon_vm_clear_invalids +ffffffff81eb0f10 T radeon_vm_bo_rmv +ffffffff81eb1030 T radeon_vm_bo_invalidate +ffffffff81eb10f0 T radeon_vm_init +ffffffff81eb13e0 T radeon_vm_fini +ffffffff81eb17a0 t radeon_bo_reserve +ffffffff81eb1940 t radeon_vm_frag_ptes +ffffffff81eb2000 T rs400_gart_adjust_size +ffffffff81eb20e0 T rs400_gart_tlb_flush +ffffffff81eb2180 T rs400_gart_init +ffffffff81eb2290 T rs400_gart_enable +ffffffff81eb2680 T rs400_gart_disable +ffffffff81eb26f0 T rs400_gart_fini +ffffffff81eb2780 T rs400_gart_get_page_entry +ffffffff81eb27e0 T rs400_gart_set_page +ffffffff81eb2820 T rs400_mc_wait_for_idle +ffffffff81eb28c0 T rs400_mc_rreg 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sumo_construct_vid_mapping_table +ffffffff81ef8960 T sumo_dpm_init +ffffffff81ef9260 T sumo_dpm_print_power_state +ffffffff81ef9390 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81ef93c0 T sumo_dpm_get_current_sclk +ffffffff81ef9430 T sumo_dpm_get_current_mclk +ffffffff81ef9460 T sumo_dpm_get_current_vddc +ffffffff81ef9530 T sumo_dpm_fini +ffffffff81ef95d0 T sumo_dpm_get_sclk +ffffffff81ef9620 T sumo_dpm_get_mclk +ffffffff81ef9650 T sumo_dpm_force_performance_level +ffffffff81ef9ad0 t sumo_power_level_enable +ffffffff81ef9d20 t sumo_program_power_level +ffffffff81efb000 T sumo_initialize_m3_arb +ffffffff81efb3c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81efb470 t sumo_send_msg_to_smu +ffffffff81efb640 T sumo_smu_pg_init +ffffffff81efb660 T sumo_enable_boost_timer +ffffffff81efb7e0 T sumo_set_tdp_limit +ffffffff81efb860 T sumo_boost_state_enable +ffffffff81efb8b0 T sumo_get_running_fw_version +ffffffff81efc000 T trinity_dpm_enable_bapm +ffffffff81efc090 T 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trinity_dpm_n_levels_disabled +ffffffff81f00470 T trinity_uvd_dpm_config +ffffffff81f00550 T trinity_dpm_no_forced_level +ffffffff81f00630 T trinity_dce_enable_voltage_adjustment +ffffffff81f007a0 T trinity_gfx_dynamic_mgpg_config +ffffffff81f00880 T trinity_acquire_mutex +ffffffff81f00920 T trinity_release_mutex +ffffffff81f01000 T uvd_v1_0_get_rptr +ffffffff81f01040 T uvd_v1_0_get_wptr +ffffffff81f01080 T uvd_v1_0_set_wptr +ffffffff81f010c0 T uvd_v1_0_fence_emit +ffffffff81f01500 T uvd_v1_0_resume +ffffffff81f01660 T uvd_v1_0_init +ffffffff81f01c60 T uvd_v1_0_start +ffffffff81f02600 T uvd_v1_0_fini +ffffffff81f027b0 T uvd_v1_0_stop +ffffffff81f02950 T uvd_v1_0_ring_test +ffffffff81f02b50 T uvd_v1_0_semaphore_emit +ffffffff81f02b80 T uvd_v1_0_ib_execute +ffffffff81f02d30 T uvd_v1_0_ib_test +ffffffff81f03000 T uvd_v2_2_fence_emit +ffffffff81f034d0 T uvd_v2_2_semaphore_emit +ffffffff81f03700 T uvd_v2_2_resume +ffffffff81f04000 T uvd_v3_1_semaphore_emit +ffffffff81f05000 T uvd_v4_2_resume +ffffffff81f06000 T vce_v1_0_get_rptr +ffffffff81f06090 T vce_v1_0_get_wptr +ffffffff81f06120 T vce_v1_0_set_wptr +ffffffff81f061b0 T vce_v1_0_enable_mgcg +ffffffff81f064b0 T vce_v1_0_load_fw +ffffffff81f06680 T vce_v1_0_bo_size +ffffffff81f066f0 T vce_v1_0_resume +ffffffff81f07220 T vce_v1_0_start +ffffffff81f07b40 T vce_v1_0_init +ffffffff81f08000 T vce_v2_0_enable_mgcg +ffffffff81f08070 t vce_v2_0_set_dyn_cg +ffffffff81f08280 T vce_v2_0_bo_size +ffffffff81f082f0 T vce_v2_0_resume +ffffffff81f09000 T aldebaran_reset_init +ffffffff81f090e0 t aldebaran_async_reset +ffffffff81f09140 t aldebaran_get_reset_handler +ffffffff81f091e0 T aldebaran_reset_fini +ffffffff81f09240 t aldebaran_mode2_prepare_hwcontext +ffffffff81f09380 t aldebaran_mode2_perform_reset +ffffffff81f09590 t aldebaran_mode2_restore_hwcontext +ffffffff81f09c20 t aldebaran_mode2_reset +ffffffff81f0a000 T aldebaran_reg_base_init +ffffffff81f0b000 T amdgpu_acpi_is_pcie_performance_request_supported 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amdgpu_amdkfd_device_probe +ffffffff81f0e0a0 T amdgpu_amdkfd_device_init +ffffffff81f0e260 t amdgpu_amdkfd_reset_work +ffffffff81f0e2f0 T amdgpu_amdkfd_device_fini_sw +ffffffff81f0e340 T amdgpu_amdkfd_interrupt +ffffffff81f0e370 T amdgpu_amdkfd_suspend +ffffffff81f0e3a0 T amdgpu_amdkfd_resume +ffffffff81f0e3d0 T amdgpu_amdkfd_pre_reset +ffffffff81f0e400 T amdgpu_amdkfd_post_reset +ffffffff81f0e430 T amdgpu_amdkfd_gpu_reset +ffffffff81f0e4a0 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81f0e7c0 t amdgpu_bo_reserve +ffffffff81f0e950 t amdgpu_bo_unreserve +ffffffff81f0ea60 T amdgpu_amdkfd_free_gtt_mem +ffffffff81f0ead0 T amdgpu_amdkfd_alloc_gws +ffffffff81f0ebd0 T amdgpu_amdkfd_free_gws +ffffffff81f0ec20 T amdgpu_amdkfd_get_fw_version +ffffffff81f0ecd0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81f0ee80 T amdgpu_amdkfd_xcp_memory_size +ffffffff81f0ef20 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81f0ef60 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81f0efd0 T amdgpu_amdkfd_get_cu_info +ffffffff81f0f0f0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81f0f240 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81f0f2c0 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81f0f360 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81f0f4e0 T amdgpu_amdkfd_submit_ib +ffffffff81f0f680 T amdgpu_amdkfd_set_compute_idle +ffffffff81f0f6d0 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81f0f710 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81f0f850 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81f0f890 T amdgpu_amdkfd_have_atomics_support +ffffffff81f0f8c0 T amdgpu_amdkfd_debug_mem_fence +ffffffff81f0f8e0 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81f0f8f0 T amdgpu_amdkfd_send_close_event_drain_irq +ffffffff81f0f910 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81f0f960 T amdgpu_amdkfd_check_and_lock_kfd +ffffffff81f0f990 T amdgpu_amdkfd_unlock_kfd +ffffffff81f0f9c0 T amdgpu_amdkfd_unmap_hiq +ffffffff81f10000 T amdgpu_atom_execute_table +ffffffff81f100c0 t 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+ffffffff81fb95d0 T amdgpu_xcp_switch_partition_mode +ffffffff81fb9760 T amdgpu_xcp_query_partition_mode +ffffffff81fb9880 T amdgpu_xcp_mgr_init +ffffffff81fb9ac0 T amdgpu_xcp_get_partition +ffffffff81fb9b60 T amdgpu_xcp_get_inst_details +ffffffff81fb9bb0 T amdgpu_xcp_dev_register +ffffffff81fb9d40 T amdgpu_xcp_dev_unplug +ffffffff81fb9e40 T amdgpu_xcp_open_device +ffffffff81fba030 T amdgpu_xcp_release_sched +ffffffff81fbb000 T amdgpu_get_xgmi_hive +ffffffff81fbb050 T amdgpu_put_xgmi_hive +ffffffff81fbb0a0 T amdgpu_xgmi_set_pstate +ffffffff81fbb0f0 T amdgpu_xgmi_update_topology +ffffffff81fbb1c0 T amdgpu_xgmi_get_hops_count +ffffffff81fbb230 T amdgpu_xgmi_get_num_links +ffffffff81fbb2a0 T amdgpu_xgmi_add_device +ffffffff81fbb500 T amdgpu_xgmi_remove_device +ffffffff81fbb670 T amdgpu_xgmi_get_relative_phy_addr +ffffffff81fbb6b0 t amdgpu_ras_error_inject_xgmi +ffffffff81fbb860 t amdgpu_xgmi_query_ras_error_count +ffffffff81fbbfd0 t amdgpu_xgmi_reset_ras_error_count +ffffffff81fbc3e0 t amdgpu_xgmi_ras_late_init +ffffffff81fbc470 T amdgpu_xgmi_ras_sw_init +ffffffff81fbd000 T aqua_vanjaram_doorbell_index_init +ffffffff81fbd120 T aqua_vanjaram_ip_map_init +ffffffff81fbd2d0 t aqua_vanjaram_logical_to_dev_inst +ffffffff81fbd330 t aqua_vanjaram_logical_to_dev_mask +ffffffff81fbd3f0 T aqua_vanjaram_encode_ext_smn_addressing +ffffffff81fbd430 t aqua_vanjaram_switch_partition_mode +ffffffff81fbd8b0 t aqua_vanjaram_query_partition_mode +ffffffff81fbd900 t aqua_vanjaram_get_xcp_ip_details +ffffffff81fbdab0 t aqua_vanjaram_get_xcp_mem_id +ffffffff81fbdbd0 t aqua_vanjaram_select_scheds +ffffffff81fbdd70 t aqua_vanjaram_update_partition_sched_list +ffffffff81fbe2e0 T aqua_vanjaram_init_soc_config +ffffffff81fbf000 T arct_reg_base_init +ffffffff81fc0000 T athub_v1_0_set_clockgating +ffffffff81fc0250 T athub_v1_0_get_clockgating +ffffffff81fc1000 T athub_v2_0_set_clockgating +ffffffff81fc1210 T athub_v2_0_get_clockgating +ffffffff81fc2000 T athub_v2_1_set_clockgating +ffffffff81fc2220 T athub_v2_1_get_clockgating +ffffffff81fc3000 T athub_v3_0_set_clockgating +ffffffff81fc30e0 T athub_v3_0_get_clockgating +ffffffff81fc3140 t athub_v3_0_get_cg_cntl +ffffffff81fc31e0 t athub_v3_0_set_cg_cntl +ffffffff81fc4000 t cz_ih_early_init +ffffffff81fc4050 t cz_ih_sw_init +ffffffff81fc40c0 t cz_ih_sw_fini +ffffffff81fc4120 t cz_ih_hw_init +ffffffff81fc4410 t cz_ih_hw_fini +ffffffff81fc4520 t cz_ih_suspend +ffffffff81fc4630 t cz_ih_resume +ffffffff81fc4670 t cz_ih_is_idle +ffffffff81fc46c0 t cz_ih_wait_for_idle +ffffffff81fc4770 t cz_ih_soft_reset +ffffffff81fc4890 t cz_ih_set_clockgating_state +ffffffff81fc48c0 t cz_ih_set_powergating_state +ffffffff81fc48f0 t cz_ih_get_wptr +ffffffff81fc4a20 t cz_ih_decode_iv +ffffffff81fc4aa0 t cz_ih_set_rptr +ffffffff81fc5000 T dce_v10_0_disable_dce +ffffffff81fc51a0 t dce_v10_0_early_init +ffffffff81fc5260 t dce_v10_0_sw_init +ffffffff81fc5630 t dce_v10_0_sw_fini +ffffffff81fc5790 t dce_v10_0_hw_init +ffffffff81fc5bc0 t dce_v10_0_hw_fini +ffffffff81fc5db0 t dce_v10_0_suspend +ffffffff81fc5e30 t dce_v10_0_resume +ffffffff81fc5ec0 t dce_v10_0_is_idle +ffffffff81fc5ef0 t dce_v10_0_wait_for_idle +ffffffff81fc5f20 t dce_v10_0_check_soft_reset +ffffffff81fc5f30 t dce_v10_0_soft_reset +ffffffff81fc6040 t dce_v10_0_set_clockgating_state +ffffffff81fc6070 t dce_v10_0_set_powergating_state +ffffffff81fc60a0 t dce_v10_0_audio_endpt_rreg +ffffffff81fc6160 t dce_v10_0_audio_endpt_wreg +ffffffff81fc61f0 t dce_v10_0_bandwidth_update +ffffffff81fc6d40 t dce_v10_0_vblank_get_counter +ffffffff81fc6d90 t dce_v10_0_hpd_sense +ffffffff81fc6df0 t dce_v10_0_hpd_set_polarity +ffffffff81fc6ed0 t dce_v10_0_hpd_get_gpio_reg +ffffffff81fc6f00 t dce_v10_0_page_flip +ffffffff81fc7020 t dce_v10_0_crtc_get_scanoutpos +ffffffff81fc70d0 t dce_v10_0_encoder_add +ffffffff81fc7360 t dce_v10_0_latency_watermark +ffffffff81fc7590 t dce_v10_0_encoder_destroy +ffffffff81fc7600 t dce_v10_0_encoder_prepare +ffffffff81fc7840 t dce_v10_0_encoder_commit +ffffffff81fc7880 t dce_v10_0_encoder_mode_set +ffffffff81fc8b40 t dce_v10_0_encoder_disable +ffffffff81fc8c70 t dce_v10_0_ext_dpms +ffffffff81fc8ca0 t dce_v10_0_ext_prepare +ffffffff81fc8cd0 t dce_v10_0_ext_commit +ffffffff81fc8d00 t dce_v10_0_ext_mode_set +ffffffff81fc8d30 t dce_v10_0_ext_disable +ffffffff81fc8d60 t dce_v10_0_set_crtc_irq_state +ffffffff81fc8e60 t dce_v10_0_crtc_irq +ffffffff81fc9100 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81fc91e0 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81fc92c0 t dce_v10_0_set_pageflip_irq_state +ffffffff81fc9380 t dce_v10_0_pageflip_irq +ffffffff81fc9530 t dce_v10_0_set_hpd_irq_state +ffffffff81fc9620 t dce_v10_0_hpd_irq +ffffffff81fc9770 t dce_v10_0_afmt_init +ffffffff81fc98a0 t dce_v10_0_audio_init +ffffffff81fc9970 t INIT_DELAYED_WORK +ffffffff81fc99c0 t dce_v10_0_crtc_cursor_set2 +ffffffff81fc9d20 t dce_v10_0_crtc_cursor_move +ffffffff81fc9e20 t dce_v10_0_crtc_gamma_set +ffffffff81fc9e70 t dce_v10_0_crtc_destroy +ffffffff81fc9eb0 t amdgpu_bo_reserve +ffffffff81fca0f0 t amdgpu_bo_unreserve +ffffffff81fca200 t dce_v10_0_lock_cursor +ffffffff81fca270 t dce_v10_0_cursor_move_locked +ffffffff81fca3e0 t dce_v10_0_show_cursor +ffffffff81fca490 t dce_v10_0_crtc_load_lut +ffffffff81fca930 t dce_v10_0_crtc_dpms +ffffffff81fcaba0 t dce_v10_0_crtc_prepare +ffffffff81fcabf0 t dce_v10_0_crtc_commit +ffffffff81fcac30 t dce_v10_0_crtc_mode_fixup +ffffffff81fcae50 t dce_v10_0_crtc_mode_set +ffffffff81fcb0b0 t dce_v10_0_crtc_set_base +ffffffff81fcb0d0 t dce_v10_0_crtc_set_base_atomic +ffffffff81fcb0f0 t dce_v10_0_crtc_disable +ffffffff81fcb2c0 t dce_v10_0_crtc_do_set_base +ffffffff81fcbaf0 t __delayed_work_tick +ffffffff81fcbb10 t dce_v10_0_is_display_hung +ffffffff81fcc000 T dce_v11_0_disable_dce +ffffffff81fcc1c0 t dce_v11_0_early_init +ffffffff81fcc2f0 t dce_v11_0_sw_init +ffffffff81fcc6c0 t dce_v11_0_sw_fini +ffffffff81fcc820 t dce_v11_0_hw_init +ffffffff81fcccd0 t dce_v11_0_hw_fini +ffffffff81fccec0 t dce_v11_0_suspend +ffffffff81fccf40 t dce_v11_0_resume +ffffffff81fccfd0 t dce_v11_0_is_idle +ffffffff81fcd000 t dce_v11_0_wait_for_idle +ffffffff81fcd030 t dce_v11_0_soft_reset +ffffffff81fcd290 t dce_v11_0_set_clockgating_state +ffffffff81fcd2c0 t dce_v11_0_set_powergating_state +ffffffff81fcd2f0 t dce_v11_0_audio_endpt_rreg +ffffffff81fcd3b0 t dce_v11_0_audio_endpt_wreg +ffffffff81fcd440 t dce_v11_0_bandwidth_update +ffffffff81fcdf90 t dce_v11_0_vblank_get_counter +ffffffff81fcdfe0 t dce_v11_0_hpd_sense +ffffffff81fce040 t dce_v11_0_hpd_set_polarity +ffffffff81fce120 t dce_v11_0_hpd_get_gpio_reg +ffffffff81fce150 t dce_v11_0_page_flip +ffffffff81fce280 t dce_v11_0_crtc_get_scanoutpos +ffffffff81fce330 t dce_v11_0_encoder_add +ffffffff81fce5c0 t dce_v11_0_latency_watermark +ffffffff81fce7f0 t dce_v11_0_encoder_destroy +ffffffff81fce860 t dce_v11_0_encoder_prepare +ffffffff81fceaa0 t dce_v11_0_encoder_commit +ffffffff81fceae0 t dce_v11_0_encoder_mode_set +ffffffff81fcfda0 t dce_v11_0_encoder_disable +ffffffff81fcfed0 t dce_v11_0_ext_dpms +ffffffff81fcff00 t dce_v11_0_ext_prepare +ffffffff81fcff30 t dce_v11_0_ext_commit +ffffffff81fcff60 t dce_v11_0_ext_mode_set +ffffffff81fcff90 t dce_v11_0_ext_disable +ffffffff81fcffc0 t dce_v11_0_set_crtc_irq_state +ffffffff81fd00c0 t dce_v11_0_crtc_irq +ffffffff81fd0340 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81fd0420 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81fd0500 t dce_v11_0_set_pageflip_irq_state +ffffffff81fd05c0 t dce_v11_0_pageflip_irq +ffffffff81fd0770 t dce_v11_0_set_hpd_irq_state +ffffffff81fd0860 t dce_v11_0_hpd_irq +ffffffff81fd09b0 t dce_v11_0_afmt_init +ffffffff81fd0ae0 t dce_v11_0_audio_init +ffffffff81fd0bf0 t INIT_DELAYED_WORK +ffffffff81fd0c40 t dce_v11_0_crtc_cursor_set2 +ffffffff81fd0fa0 t dce_v11_0_crtc_cursor_move +ffffffff81fd10a0 t dce_v11_0_crtc_gamma_set +ffffffff81fd10f0 t dce_v11_0_crtc_destroy +ffffffff81fd1130 t amdgpu_bo_reserve +ffffffff81fd1370 t amdgpu_bo_unreserve +ffffffff81fd1480 t dce_v11_0_lock_cursor +ffffffff81fd14f0 t dce_v11_0_cursor_move_locked +ffffffff81fd1660 t dce_v11_0_show_cursor +ffffffff81fd1710 t dce_v11_0_crtc_load_lut +ffffffff81fd1b60 t dce_v11_0_crtc_dpms +ffffffff81fd1dd0 t dce_v11_0_crtc_prepare +ffffffff81fd1e20 t dce_v11_0_crtc_commit +ffffffff81fd1e60 t dce_v11_0_crtc_mode_fixup +ffffffff81fd2150 t dce_v11_0_crtc_mode_set +ffffffff81fd2430 t dce_v11_0_crtc_set_base +ffffffff81fd2450 t dce_v11_0_crtc_set_base_atomic +ffffffff81fd2470 t dce_v11_0_crtc_disable +ffffffff81fd2650 t dce_v11_0_crtc_do_set_base +ffffffff81fd2e80 t __delayed_work_tick +ffffffff81fd3000 t df_v1_7_sw_init +ffffffff81fd3040 t df_v1_7_sw_fini +ffffffff81fd3070 t df_v1_7_enable_broadcast_mode +ffffffff81fd31a0 t df_v1_7_get_fb_channel_number +ffffffff81fd3240 t df_v1_7_get_hbm_channel_number +ffffffff81fd32a0 t df_v1_7_update_medium_grain_clock_gating +ffffffff81fd3450 t df_v1_7_get_clockgating_state +ffffffff81fd34f0 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81fd4000 t df_v3_6_sw_init +ffffffff81fd4160 t df_v3_6_sw_fini +ffffffff81fd4190 t df_v3_6_enable_broadcast_mode +ffffffff81fd42c0 t df_v3_6_get_fb_channel_number +ffffffff81fd43c0 t df_v3_6_get_hbm_channel_number +ffffffff81fd4420 t df_v3_6_update_medium_grain_clock_gating +ffffffff81fd45f0 t df_v3_6_get_clockgating_state +ffffffff81fd4690 t df_v3_6_pmc_start +ffffffff81fd4a20 t df_v3_6_pmc_stop +ffffffff81fd4d60 t df_v3_6_pmc_get_count +ffffffff81fd4f40 t df_v3_6_get_fica +ffffffff81fd5090 t df_v3_6_set_fica +ffffffff81fd51c0 t df_v3_6_query_ras_poison_mode +ffffffff81fd6000 t df_v4_3_query_ras_poison_mode +ffffffff81fd7000 T dimgrey_cavefish_reg_base_init +ffffffff81fd8000 T emu_soc_asic_init +ffffffff81fd9000 t gfx_v10_0_early_init +ffffffff81fd9920 t gfx_v10_0_late_init +ffffffff81fd9990 t gfx_v10_0_sw_init +ffffffff81fd9f50 t gfx_v10_0_sw_fini +ffffffff81fda210 t gfx_v10_0_hw_init +ffffffff81fdd3f0 t gfx_v10_0_hw_fini +ffffffff81fdd500 t gfx_v10_0_suspend +ffffffff81fdd540 t gfx_v10_0_resume +ffffffff81fdd550 t gfx_v10_0_is_idle +ffffffff81fdd5f0 t gfx_v10_0_wait_for_idle +ffffffff81fdd700 t gfx_v10_0_soft_reset +ffffffff81fddae0 t gfx_v10_0_set_clockgating_state +ffffffff81fdde60 t gfx_v10_0_set_powergating_state +ffffffff81fddf30 t gfx_v10_0_get_clockgating_state +ffffffff81fde080 t gfx_v10_0_get_gpu_clock_counter +ffffffff81fde600 t gfx_v10_0_select_se_sh +ffffffff81fde6a0 t gfx_v10_0_read_wave_data +ffffffff81fde990 t gfx_v10_0_read_wave_vgprs +ffffffff81fde9c0 t gfx_v10_0_read_wave_sgprs +ffffffff81fdea40 t gfx_v10_0_select_me_pipe_q +ffffffff81fdea60 t gfx_v10_0_init_spm_golden_registers +ffffffff81fdead0 t gfx_v10_0_update_perfmon_mgcg +ffffffff81fdec00 t wave_read_ind +ffffffff81fded00 t wave_read_regs +ffffffff81fdee80 t gfx10_kiq_set_resources +ffffffff81fdf1e0 t gfx10_kiq_map_queues +ffffffff81fdf5c0 t gfx10_kiq_unmap_queues +ffffffff81fdfa00 t gfx10_kiq_query_status +ffffffff81fdfd20 t gfx10_kiq_invalidate_tlbs +ffffffff81fdfe50 t gfx_v10_0_ring_get_rptr_compute +ffffffff81fdfe80 t gfx_v10_0_ring_get_wptr_compute +ffffffff81fdfef0 t gfx_v10_0_ring_set_wptr_compute +ffffffff81fe0050 t gfx_v10_0_ring_emit_ib_compute +ffffffff81fe03d0 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81fe0850 t gfx_v10_0_ring_test_ring +ffffffff81fe0b00 t gfx_v10_0_ring_test_ib +ffffffff81fe0de0 t gfx_v10_0_ring_emit_rreg +ffffffff81fe10a0 t gfx_v10_0_ring_emit_wreg +ffffffff81fe1300 t gfx_v10_0_ring_emit_reg_wait +ffffffff81fe1360 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81fe1400 t gfx_v10_0_wait_reg_mem +ffffffff81fe1760 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81fe1790 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81fe18b0 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81fe1af0 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81fe21e0 t gfx_v10_0_ring_emit_fence +ffffffff81fe2600 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81fe2670 t gfx_v10_0_ring_emit_vm_flush +ffffffff81fe2860 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81fe2950 t gfx_v10_0_ring_emit_gds_switch +ffffffff81fe2a50 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81fe2ca0 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81fe2d60 t gfx_v10_0_ring_emit_sb +ffffffff81fe2e50 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81fe3380 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81fe3490 t gfx_v10_0_ring_soft_recovery +ffffffff81fe3540 t gfx_v10_0_ring_preempt_ib +ffffffff81fe36f0 t gfx_v10_0_emit_mem_sync +ffffffff81fe3a60 t gfx_v10_0_write_data_to_reg +ffffffff81fe3c90 t gfx_v10_0_set_eop_interrupt_state +ffffffff81fe3d90 t gfx_v10_0_eop_irq +ffffffff81fe3f70 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81fe4130 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81fe4310 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81fe4680 t gfx_v10_0_kiq_irq +ffffffff81fe4710 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81fe4860 t gfx_v10_0_priv_reg_irq +ffffffff81fe48d0 t gfx_v10_0_handle_priv_fault +ffffffff81fe4a40 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81fe4b90 t gfx_v10_0_priv_inst_irq +ffffffff81fe4c00 t gfx_v10_0_is_rlc_enabled +ffffffff81fe4ca0 t gfx_v10_0_set_safe_mode +ffffffff81fe4fa0 t gfx_v10_0_unset_safe_mode +ffffffff81fe5050 t gfx_v10_0_rlc_init +ffffffff81fe5070 t gfx_v10_0_get_csb_size +ffffffff81fe50a0 t gfx_v10_0_get_csb_buffer +ffffffff81fe5210 t gfx_v10_0_rlc_resume +ffffffff81fe5dd0 t gfx_v10_0_rlc_stop +ffffffff81fe5eb0 t gfx_v10_0_rlc_reset +ffffffff81fe60a0 t gfx_v10_0_rlc_start +ffffffff81fe6290 t gfx_v10_0_update_spm_vmid +ffffffff81fe62e0 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81fe6d20 t gfx_v10_0_init_csb +ffffffff81fe7040 t gfx_v10_0_update_spm_vmid_internal +ffffffff81fe7130 t gfx_v10_0_rlc_backdoor_autoload_config_mec_cache +ffffffff81fe7450 t gfx_v10_0_is_rlcg_access_range +ffffffff81fe7480 t gfx_v10_0_gfx_mqd_init +ffffffff81fe78c0 t gfx_v10_0_compute_mqd_init +ffffffff81fe7dd0 t gfx_v10_0_mec_init +ffffffff81fe8060 t gfx_v10_0_compute_ring_init +ffffffff81fe81c0 t gfx_v10_0_rlc_backdoor_autoload_buffer_init +ffffffff81fe8460 t gfx_v10_0_gpu_early_init +ffffffff81fe86d0 t amdgpu_bo_unreserve +ffffffff81fe87e0 t gfx_v10_0_cp_resume +ffffffff81feb7a0 t gfx_v10_3_get_disabled_sa +ffffffff81feb8d0 t gfx_v10_0_get_rb_active_bitmap +ffffffff81feba10 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81febb30 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81febc40 t gfx_v10_0_cp_gfx_enable +ffffffff81febee0 t gfx_v10_0_cp_compute_enable +ffffffff81fec0a0 t amdgpu_bo_reserve +ffffffff81fec240 t gfx_v10_0_kiq_init_register +ffffffff81fed330 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81fed430 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81fed760 t gfx_v10_0_cp_gfx_start +ffffffff81fee250 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81fee5e0 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81feede0 t gfx_v10_0_update_3d_clock_gating +ffffffff81fef210 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81fef640 t gfx_v10_cntl_pg +ffffffff81ff0000 t gfx_v11_0_early_init +ffffffff81ff0870 t gfx_v11_0_late_init +ffffffff81ff08e0 t gfx_v11_0_sw_init +ffffffff81ff0ee0 t gfx_v11_0_sw_fini +ffffffff81ff1190 t gfx_v11_0_hw_init +ffffffff81ff5d20 t gfx_v11_0_hw_fini +ffffffff81ff5e80 t gfx_v11_0_suspend +ffffffff81ff5ec0 t gfx_v11_0_resume +ffffffff81ff5ed0 t gfx_v11_0_is_idle +ffffffff81ff5f70 t gfx_v11_0_wait_for_idle +ffffffff81ff6080 t gfx_v11_0_check_soft_reset +ffffffff81ff61c0 t gfx_v11_0_soft_reset +ffffffff81ff7090 t gfx_v11_0_post_soft_reset +ffffffff81ff70a0 t gfx_v11_0_set_clockgating_state +ffffffff81ff7e00 t gfx_v11_0_set_powergating_state +ffffffff81ff7eb0 t gfx_v11_0_get_clockgating_state +ffffffff81ff80a0 t gfx_v11_0_get_gpu_clock_counter +ffffffff81ff8490 t gfx_v11_0_select_se_sh +ffffffff81ff8530 t gfx_v11_0_read_wave_data +ffffffff81ff8800 t gfx_v11_0_read_wave_vgprs +ffffffff81ff8830 t gfx_v11_0_read_wave_sgprs +ffffffff81ff88b0 t gfx_v11_0_select_me_pipe_q +ffffffff81ff88d0 t gfx_v11_0_update_perf_clk +ffffffff81ff8a10 t gfx_v11_0_get_gfx_shadow_info +ffffffff81ff8a80 t wave_read_ind +ffffffff81ff8b80 t wave_read_regs +ffffffff81ff8d00 t gfx11_kiq_set_resources +ffffffff81ff9060 t gfx11_kiq_map_queues +ffffffff81ff9440 t gfx11_kiq_unmap_queues +ffffffff81ff9880 t gfx11_kiq_query_status +ffffffff81ff9ba0 t gfx11_kiq_invalidate_tlbs +ffffffff81ff9cd0 t gfx_v11_0_ring_get_rptr_compute +ffffffff81ff9d00 t gfx_v11_0_ring_get_wptr_compute +ffffffff81ff9d70 t gfx_v11_0_ring_set_wptr_compute +ffffffff81ff9ed0 t gfx_v11_0_ring_emit_ib_compute +ffffffff81ffa250 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81ffa6d0 t gfx_v11_0_ring_test_ring +ffffffff81ffa9a0 t gfx_v11_0_ring_test_ib +ffffffff81ffaca0 t gfx_v11_0_ring_emit_rreg +ffffffff81ffaf60 t gfx_v11_0_ring_emit_wreg +ffffffff81ffb1c0 t gfx_v11_0_ring_emit_reg_wait +ffffffff81ffb220 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81ffb290 t gfx_v11_0_wait_reg_mem +ffffffff81ffb5f0 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81ffb620 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81ffb740 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81ffb980 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81ffc080 t gfx_v11_0_ring_emit_fence +ffffffff81ffc490 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81ffc500 t gfx_v11_0_ring_emit_vm_flush +ffffffff81ffc6f0 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81ffc7e0 t gfx_v11_0_ring_emit_gds_switch +ffffffff81ffc8e0 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81ffcb30 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81ffcbf0 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81ffcd70 t gfx_v11_0_ring_emit_gfx_shadow +ffffffff81ffd180 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81ffd290 t gfx_v11_0_ring_soft_recovery +ffffffff81ffd340 t gfx_v11_0_ring_preempt_ib +ffffffff81ffd4f0 t gfx_v11_0_emit_mem_sync +ffffffff81ffd860 t gfx_v11_0_write_data_to_reg +ffffffff81ffda90 t gfx_v11_0_set_eop_interrupt_state +ffffffff81ffdb30 t gfx_v11_0_eop_irq +ffffffff81ffdd10 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81ffded0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81ffe080 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81ffe1d0 t gfx_v11_0_priv_reg_irq +ffffffff81ffe240 t gfx_v11_0_handle_priv_fault +ffffffff81ffe3b0 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81ffe500 t gfx_v11_0_priv_inst_irq +ffffffff81ffe570 t gfx_v11_0_rlc_gc_fed_irq +ffffffff81ffe5c0 t gfx_v11_0_is_rlc_enabled +ffffffff81ffe660 t gfx_v11_0_set_safe_mode +ffffffff81ffe7e0 t gfx_v11_0_unset_safe_mode +ffffffff81ffe850 t gfx_v11_0_rlc_init +ffffffff81ffe8d0 t gfx_v11_0_get_csb_size +ffffffff81ffe900 t gfx_v11_0_get_csb_buffer +ffffffff81ffea70 t gfx_v11_0_rlc_resume +ffffffff81fff920 t gfx_v11_0_rlc_stop +ffffffff81fffa00 t gfx_v11_0_rlc_reset +ffffffff81fffbf0 t gfx_v11_0_rlc_start +ffffffff81fffde0 t gfx_v11_0_update_spm_vmid +ffffffff81ffff00 t gfx_v11_0_init_csb +ffffffff820000c0 t gfx_v11_0_gfx_mqd_init +ffffffff820004f0 t gfx_v11_0_compute_mqd_init +ffffffff82000a90 t gfx_v11_0_mec_init +ffffffff82000c20 t gfx_v11_0_compute_ring_init +ffffffff82000d80 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff82000f80 t gfx_v11_0_gpu_early_init +ffffffff82001050 t amdgpu_bo_unreserve +ffffffff82001160 t gfx_v11_0_disable_gpa_mode +ffffffff82001320 t gfx_v11_0_cp_resume +ffffffff82005a80 t gfx_v11_0_config_me_cache +ffffffff82005ea0 t gfx_v11_0_config_pfp_cache +ffffffff820062c0 t gfx_v11_0_config_mec_cache +ffffffff820066e0 t gfx_v11_0_get_sa_active_bitmap +ffffffff82006810 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff82006920 t gfx_v11_0_cp_compute_enable +ffffffff82006b20 t gfx_v11_0_cp_gfx_enable +ffffffff82006d50 t amdgpu_bo_reserve +ffffffff82006ef0 t gfx_v11_0_kiq_init_register +ffffffff82007ff0 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff820080e0 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff820082f0 t gfx_v11_0_cp_gfx_start +ffffffff82008c40 t gfx_v11_cntl_pg +ffffffff82009000 t gfx_v11_0_3_rlc_gc_fed_irq +ffffffff82009240 t gfx_v11_0_3_poison_consumption_handler +ffffffff8200a000 t gfx_v8_0_early_init +ffffffff8200a310 t gfx_v8_0_late_init +ffffffff8200aad0 t gfx_v8_0_sw_init +ffffffff8200af30 t gfx_v8_0_sw_fini +ffffffff8200b140 t gfx_v8_0_hw_init +ffffffff8200d720 t gfx_v8_0_hw_fini +ffffffff8200dcb0 t gfx_v8_0_suspend +ffffffff8200dcf0 t gfx_v8_0_resume +ffffffff8200dd00 t gfx_v8_0_is_idle +ffffffff8200dd80 t gfx_v8_0_wait_for_idle +ffffffff8200de50 t gfx_v8_0_check_soft_reset +ffffffff8200df50 t gfx_v8_0_pre_soft_reset +ffffffff8200e110 t gfx_v8_0_soft_reset +ffffffff8200e360 t gfx_v8_0_post_soft_reset +ffffffff8200e550 t gfx_v8_0_set_clockgating_state +ffffffff8200e830 t gfx_v8_0_set_powergating_state +ffffffff8200ece0 t gfx_v8_0_get_clockgating_state +ffffffff8200edf0 t gfx_v8_0_get_gpu_clock_counter +ffffffff8200eeb0 t gfx_v8_0_select_se_sh +ffffffff8200ef10 t gfx_v8_0_read_wave_data +ffffffff8200f510 t gfx_v8_0_read_wave_sgprs +ffffffff8200f5e0 t gfx_v8_0_select_me_pipe_q +ffffffff8200f600 t gfx_v8_0_ring_get_rptr +ffffffff8200f630 t gfx_v8_0_ring_get_wptr_compute +ffffffff8200f660 t gfx_v8_0_ring_set_wptr_compute +ffffffff8200f6a0 t gfx_v8_0_ring_emit_fence_kiq +ffffffff8200fb10 t gfx_v8_0_ring_test_ring +ffffffff8200fd50 t gfx_v8_0_ring_emit_rreg +ffffffff82010010 t gfx_v8_0_ring_emit_wreg +ffffffff82010270 t gfx_v8_0_ring_get_wptr_gfx +ffffffff820102d0 t gfx_v8_0_ring_set_wptr_gfx +ffffffff82010350 t gfx_v8_0_ring_emit_ib_gfx +ffffffff82010910 t gfx_v8_0_ring_emit_fence_gfx +ffffffff82010e60 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff82011180 t gfx_v8_0_ring_emit_vm_flush +ffffffff82011580 t gfx_v8_0_ring_emit_hdp_flush +ffffffff820118d0 t gfx_v8_0_ring_emit_gds_switch +ffffffff82012130 t gfx_v8_0_ring_test_ib +ffffffff82012320 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff82012570 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff82012620 t gfx_v8_ring_emit_sb +ffffffff82012710 t gfx_v8_ring_emit_cntxcntl +ffffffff82012d10 t gfx_v8_0_ring_soft_recovery +ffffffff82012d40 t gfx_v8_0_emit_mem_sync +ffffffff82012f60 t gfx_v8_0_ring_emit_ib_compute +ffffffff820132a0 t gfx_v8_0_ring_emit_fence_compute +ffffffff820135d0 t gfx_v8_0_emit_mem_sync_compute +ffffffff820138c0 t gfx_v8_0_emit_wave_limit +ffffffff82013a90 t gfx_v8_0_set_eop_interrupt_state +ffffffff82013d10 t gfx_v8_0_eop_irq +ffffffff82013e40 t gfx_v8_0_set_priv_reg_fault_state +ffffffff82013ed0 t gfx_v8_0_priv_reg_irq +ffffffff82013ff0 t gfx_v8_0_set_priv_inst_fault_state +ffffffff82014080 t gfx_v8_0_priv_inst_irq +ffffffff820141a0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff820144e0 t gfx_v8_0_cp_ecc_error_irq +ffffffff82014530 t gfx_v8_0_set_sq_int_state +ffffffff820145c0 t gfx_v8_0_sq_irq +ffffffff82014640 t gfx_v8_0_parse_sq_irq +ffffffff820148c0 t gfx_v8_0_is_rlc_enabled +ffffffff82014910 t gfx_v8_0_set_safe_mode +ffffffff82014a40 t gfx_v8_0_unset_safe_mode +ffffffff82014b00 t gfx_v8_0_rlc_init +ffffffff82014bc0 t gfx_v8_0_get_csb_size +ffffffff82014bf0 t gfx_v8_0_get_csb_buffer +ffffffff82014d60 t gfx_v8_0_cp_jump_table_num +ffffffff82014da0 t gfx_v8_0_rlc_resume +ffffffff82015250 t gfx_v8_0_rlc_stop +ffffffff820152e0 t gfx_v8_0_rlc_reset +ffffffff82015390 t gfx_v8_0_rlc_start +ffffffff82015430 t gfx_v8_0_update_spm_vmid +ffffffff820154c0 t gfx_v8_0_init_save_restore_list +ffffffff820159a0 t gfx_v8_0_wait_for_rlc_serdes +ffffffff82015c10 t gfx_v8_0_sq_irq_work_func +ffffffff82015c30 t gfx_v8_0_init_microcode +ffffffff820165c0 t gfx_v8_0_mec_init +ffffffff820166f0 t gfx_v8_0_compute_ring_init +ffffffff82016840 t gfx_v8_0_gpu_early_init +ffffffff82016d10 t amdgpu_bo_unreserve +ffffffff82016e20 t gfx_v8_0_kiq_resume +ffffffff82017170 t gfx_v8_0_cp_gfx_resume +ffffffff82017db0 t gfx_v8_0_kcq_resume +ffffffff820188c0 t amdgpu_bo_reserve +ffffffff82018a60 t gfx_v8_0_mqd_commit +ffffffff82018cd0 t gfx_v8_0_mqd_init +ffffffff820191e0 t gfx_v8_0_deactivate_hqd +ffffffff820192e0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff820196f0 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff8201a000 t gfx_v9_0_ras_error_inject +ffffffff8201a1e0 t gfx_v9_0_query_ras_error_count +ffffffff8201af10 t gfx_v9_0_reset_ras_error_count +ffffffff8201bab0 T gfx_v9_0_select_se_sh +ffffffff8201bb50 t gfx_v9_0_early_init +ffffffff8201c740 t gfx_v9_0_late_init +ffffffff8201d720 t gfx_v9_0_sw_init +ffffffff8201df00 t gfx_v9_0_sw_fini +ffffffff8201e160 t gfx_v9_0_hw_init +ffffffff820216d0 t gfx_v9_0_hw_fini +ffffffff82021f90 t gfx_v9_0_suspend +ffffffff82021fd0 t gfx_v9_0_resume +ffffffff82021fe0 t gfx_v9_0_is_idle +ffffffff82022080 t gfx_v9_0_wait_for_idle +ffffffff82022180 t gfx_v9_0_soft_reset +ffffffff82022590 t gfx_v9_0_set_clockgating_state +ffffffff82022690 t gfx_v9_0_set_powergating_state +ffffffff82022af0 t gfx_v9_0_get_clockgating_state +ffffffff82022c30 t gfx_v9_0_get_gpu_clock_counter +ffffffff82023510 t gfx_v9_0_read_wave_data +ffffffff820237e0 t gfx_v9_0_read_wave_vgprs +ffffffff82023850 t gfx_v9_0_read_wave_sgprs +ffffffff82023880 t gfx_v9_0_select_me_pipe_q +ffffffff820238a0 t wave_read_ind +ffffffff820239b0 t wave_read_regs +ffffffff82023b20 t gfx_v9_0_kiq_set_resources +ffffffff82023e80 t gfx_v9_0_kiq_map_queues +ffffffff82024200 t gfx_v9_0_kiq_unmap_queues +ffffffff82024570 t gfx_v9_0_kiq_query_status +ffffffff82024890 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff820249c0 t gfx_v9_0_ring_get_rptr_compute +ffffffff820249f0 t gfx_v9_0_ring_get_wptr_compute +ffffffff82024a60 t gfx_v9_0_ring_set_wptr_compute +ffffffff82024ac0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff82024f40 t gfx_v9_0_ring_test_ring +ffffffff820251b0 t gfx_v9_0_ring_emit_rreg +ffffffff82025470 t gfx_v9_0_ring_emit_wreg +ffffffff820256d0 t gfx_v9_0_ring_emit_reg_wait +ffffffff82025730 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff820257d0 t gfx_v9_0_wait_reg_mem +ffffffff82025b30 t gfx_v9_0_ring_get_rptr_gfx +ffffffff82025b60 t gfx_v9_0_ring_get_wptr_gfx +ffffffff82025c80 t gfx_v9_0_ring_set_wptr_gfx +ffffffff82025dc0 t gfx_v9_0_ring_emit_ib_gfx +ffffffff820264b0 t gfx_v9_0_ring_emit_fence +ffffffff820268c0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff82026930 t gfx_v9_0_ring_emit_vm_flush +ffffffff82026a50 t gfx_v9_0_ring_emit_hdp_flush +ffffffff82026b40 t gfx_v9_0_ring_emit_gds_switch +ffffffff82026c40 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff82026e90 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff82026f50 t gfx_v9_ring_emit_sb +ffffffff82027040 t gfx_v9_ring_emit_cntxcntl +ffffffff82027580 t gfx_v9_0_ring_emit_frame_cntl +ffffffff82027690 t gfx_v9_0_ring_soft_recovery +ffffffff82027740 t gfx_v9_0_ring_preempt_ib +ffffffff82027970 t gfx_v9_0_emit_mem_sync +ffffffff82027c60 t gfx_v9_0_write_data_to_reg +ffffffff82027e90 t gfx_v9_0_ring_test_ib +ffffffff82028080 t gfx_v9_0_ring_patch_cntl +ffffffff820280c0 t gfx_v9_0_ring_patch_ce_meta +ffffffff820281d0 t gfx_v9_0_ring_patch_de_meta +ffffffff820282a0 t gfx_v9_0_ring_emit_ib_compute +ffffffff82028600 t gfx_v9_0_emit_wave_limit +ffffffff82028800 t gfx_v9_0_set_eop_interrupt_state +ffffffff82028a00 t gfx_v9_0_eop_irq +ffffffff82028b70 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff82028d50 t gfx_v9_0_set_priv_reg_fault_state +ffffffff82028ea0 t gfx_v9_0_priv_reg_irq +ffffffff82028fc0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff82029110 t gfx_v9_0_priv_inst_irq +ffffffff82029230 t gfx_v9_0_set_cp_ecc_error_state +ffffffff82029c20 t gfx_v9_0_is_rlc_enabled +ffffffff82029cc0 t gfx_v9_0_set_safe_mode +ffffffff82029e40 t gfx_v9_0_unset_safe_mode +ffffffff82029eb0 t gfx_v9_0_rlc_init +ffffffff82029f30 t gfx_v9_0_get_csb_size +ffffffff82029f60 t gfx_v9_0_get_csb_buffer +ffffffff8202a0a0 t gfx_v9_0_cp_jump_table_num +ffffffff8202a0f0 t gfx_v9_0_rlc_resume +ffffffff8202bb20 t gfx_v9_0_rlc_stop +ffffffff8202bf40 t gfx_v9_0_rlc_reset +ffffffff8202c120 t gfx_v9_0_rlc_start +ffffffff8202c2a0 t gfx_v9_0_update_spm_vmid +ffffffff8202c2f0 t gfx_v9_0_is_rlcg_access_range +ffffffff8202c340 t gfx_v9_0_init_csb +ffffffff8202c500 t gfx_v9_0_enable_lbpw +ffffffff8202c610 t gfx_v9_0_update_spm_vmid_internal +ffffffff8202c740 t gfx_v9_0_init_always_on_cu_mask +ffffffff8202ca00 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff8202cb10 t gfx_v9_0_mec_init +ffffffff8202cd70 t gfx_v9_0_compute_ring_init +ffffffff8202ced0 t gfx_v9_0_gpu_early_init +ffffffff8202d330 t amdgpu_bo_unreserve +ffffffff8202d440 t gfx_v9_0_cp_gfx_enable +ffffffff8202d540 t amdgpu_bo_reserve +ffffffff8202d6e0 t gfx_v9_0_kiq_init_register +ffffffff8202e550 t gfx_v9_0_mqd_init +ffffffff8202eb20 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff8202f0d0 t gfx_v9_0_update_3d_clock_gating +ffffffff8202f530 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff82030000 t gfx_v9_4_query_ras_error_count +ffffffff82030ef0 t gfx_v9_4_query_ras_error_status +ffffffff820310f0 t gfx_v9_4_reset_ras_error_count +ffffffff82032000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff82032890 T gfx_v9_4_2_init_golden_registers +ffffffff82032930 T gfx_v9_4_2_debug_trap_config_init +ffffffff82032a50 T gfx_v9_4_2_set_power_brake_sequence +ffffffff82032c70 t gfx_v9_4_2_query_ras_error_count +ffffffff82032d40 t gfx_v9_4_2_query_ras_error_status +ffffffff820336e0 t gfx_v9_4_2_reset_ras_error_count +ffffffff82033750 t gfx_v9_4_2_reset_ras_error_status +ffffffff82033cb0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff82033f10 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff82033fb0 t gfx_v9_4_2_run_shader +ffffffff820343e0 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff82034ac0 t gfx_v9_4_2_query_sram_edc_count +ffffffff82034e30 t gfx_v9_4_2_query_utc_edc_count +ffffffff82035020 t wave_read_ind +ffffffff82036000 t gfx_v9_4_3_xcp_suspend +ffffffff820360b0 t gfx_v9_4_3_xcp_resume +ffffffff82036250 t gfx_v9_4_3_query_ras_error_count +ffffffff82036270 t gfx_v9_4_3_query_ras_error_status +ffffffff82036290 t gfx_v9_4_3_reset_ras_error_count +ffffffff820362b0 t gfx_v9_4_3_reset_ras_error_status +ffffffff820362d0 t gfx_v9_4_3_enable_watchdog_timer +ffffffff820362f0 t gfx_v9_4_3_early_init +ffffffff82036a60 t gfx_v9_4_3_late_init +ffffffff82036af0 t gfx_v9_4_3_sw_init +ffffffff82036fe0 t gfx_v9_4_3_sw_fini +ffffffff82037210 t gfx_v9_4_3_hw_init +ffffffff82038090 t gfx_v9_4_3_hw_fini +ffffffff82038170 t gfx_v9_4_3_suspend +ffffffff82038250 t gfx_v9_4_3_resume +ffffffff82038260 t gfx_v9_4_3_is_idle +ffffffff82038450 t gfx_v9_4_3_wait_for_idle +ffffffff820384f0 t gfx_v9_4_3_soft_reset +ffffffff82038d30 t gfx_v9_4_3_set_clockgating_state +ffffffff82038ef0 t gfx_v9_4_3_set_powergating_state +ffffffff82038f20 t gfx_v9_4_3_get_clockgating_state +ffffffff820390d0 t gfx_v9_4_3_kiq_set_resources +ffffffff82039430 t gfx_v9_4_3_kiq_map_queues +ffffffff820397d0 t gfx_v9_4_3_kiq_unmap_queues +ffffffff82039b90 t gfx_v9_4_3_kiq_query_status +ffffffff82039eb0 t gfx_v9_4_3_kiq_invalidate_tlbs +ffffffff82039fe0 t gfx_v9_4_3_ring_get_rptr_compute +ffffffff8203a020 t gfx_v9_4_3_ring_get_wptr_compute +ffffffff8203a090 t gfx_v9_4_3_ring_set_wptr_compute +ffffffff8203a0f0 t gfx_v9_4_3_ring_emit_fence_kiq +ffffffff8203a590 t gfx_v9_4_3_ring_test_ring +ffffffff8203a830 t gfx_v9_4_3_ring_emit_rreg +ffffffff8203aaf0 t gfx_v9_4_3_ring_emit_wreg +ffffffff8203ad50 t gfx_v9_4_3_ring_emit_reg_wait +ffffffff8203adb0 t gfx_v9_4_3_ring_emit_reg_write_reg_wait +ffffffff8203add0 t gfx_v9_4_3_wait_reg_mem +ffffffff8203b130 t gfx_v9_4_3_ring_emit_ib_compute +ffffffff8203b490 t gfx_v9_4_3_ring_emit_fence +ffffffff8203b880 t gfx_v9_4_3_ring_emit_pipeline_sync +ffffffff8203b8f0 t gfx_v9_4_3_ring_emit_vm_flush +ffffffff8203b910 t gfx_v9_4_3_ring_emit_hdp_flush +ffffffff8203ba00 t gfx_v9_4_3_ring_emit_gds_switch +ffffffff8203bbe0 t gfx_v9_4_3_ring_test_ib +ffffffff8203bdd0 t gfx_v9_4_3_emit_mem_sync +ffffffff8203c0c0 t gfx_v9_4_3_emit_wave_limit +ffffffff8203c2d0 t gfx_v9_4_3_write_data_to_reg +ffffffff8203c500 t gfx_v9_4_3_set_eop_interrupt_state +ffffffff8203c680 t gfx_v9_4_3_eop_irq +ffffffff8203c830 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state +ffffffff8203c9b0 t gfx_v9_4_3_ih_to_xcc_inst +ffffffff8203ca90 t gfx_v9_4_3_set_priv_reg_fault_state +ffffffff8203cef0 t gfx_v9_4_3_priv_reg_irq +ffffffff8203cf60 t gfx_v9_4_3_fault +ffffffff8203d0e0 t gfx_v9_4_3_set_priv_inst_fault_state +ffffffff8203d540 t gfx_v9_4_3_priv_inst_irq +ffffffff8203d5b0 t gfx_v9_4_3_is_rlc_enabled +ffffffff8203d700 t gfx_v9_4_3_xcc_set_safe_mode +ffffffff8203da10 t gfx_v9_4_3_xcc_unset_safe_mode +ffffffff8203db50 t gfx_v9_4_3_rlc_init +ffffffff8203dbb0 t gfx_v9_4_3_rlc_resume +ffffffff8203dc70 t gfx_v9_4_3_rlc_stop +ffffffff8203dd20 t gfx_v9_4_3_rlc_reset +ffffffff8203e4a0 t gfx_v9_4_3_rlc_start +ffffffff8203e550 t gfx_v9_4_3_update_spm_vmid +ffffffff8203e7b0 t gfx_v9_4_3_is_rlcg_access_range +ffffffff8203e880 t gfx_v9_4_3_xcc_rlc_resume +ffffffff8203f240 t gfx_v9_4_3_xcc_rlc_stop +ffffffff8203faa0 t gfx_v9_4_3_xcc_rlc_start +ffffffff8203feb0 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt +ffffffff82040110 t gfx_v9_4_3_xcc_select_se_sh +ffffffff82040340 t gfx_v9_4_3_mec_init +ffffffff820406b0 t gfx_v9_4_3_gpu_early_init +ffffffff82040900 t amdgpu_bo_unreserve +ffffffff82040a10 t gfx_v9_4_3_get_gpu_clock_counter +ffffffff82040de0 t gfx_v9_4_3_read_wave_data +ffffffff82041140 t gfx_v9_4_3_read_wave_vgprs +ffffffff82041160 t gfx_v9_4_3_read_wave_sgprs +ffffffff820411c0 t gfx_v9_4_3_select_me_pipe_q +ffffffff82041240 t gfx_v9_4_3_switch_compute_partition +ffffffff820415f0 t wave_read_ind +ffffffff82041830 t wave_read_regs +ffffffff82041b10 t gfx_v9_4_3_xcc_constants_init +ffffffff82042e80 t gfx_v9_4_3_xcc_cp_resume +ffffffff82044120 t gfx_v9_4_3_xcc_cp_compute_enable +ffffffff82044300 t amdgpu_bo_reserve +ffffffff820444a0 t gfx_v9_4_3_xcc_kiq_init_register +ffffffff82046540 t gfx_v9_4_3_xcc_mqd_init +ffffffff820470e0 t gfx_v9_4_3_xcc_fini +ffffffff82047760 t gfx_v9_4_3_xcc_q_fini_register +ffffffff820482c0 t gfx_v9_4_3_xcc_update_sram_fgcg +ffffffff82048570 t gfx_v9_4_3_xcc_update_repeater_fgcg +ffffffff82048820 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating +ffffffff82049510 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating +ffffffff82049ea0 t gfx_v9_4_3_inst_query_ras_err_count +ffffffff8204a150 t gfx_v9_4_3_inst_query_ras_err_status +ffffffff8204b140 t gfx_v9_4_3_inst_reset_ras_err_count +ffffffff8204b330 t gfx_v9_4_3_inst_reset_ras_err_status +ffffffff8204bbd0 t gfx_v9_4_3_inst_enable_watchdog_timer +ffffffff8204c000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff8204c0a0 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff8204c1f0 t gfxhub_v1_0_gart_enable +ffffffff8204d9c0 t gfxhub_v1_0_gart_disable +ffffffff8204dcb0 t gfxhub_v1_0_set_fault_enable_default +ffffffff8204ddb0 t gfxhub_v1_0_init +ffffffff8204e000 T gfxhub_v1_1_get_xgmi_info +ffffffff8204f000 t gfxhub_v1_2_get_mc_fb_offset +ffffffff8204f150 t gfxhub_v1_2_setup_vm_pt_regs +ffffffff8204f1c0 t gfxhub_v1_2_gart_enable +ffffffff8204f250 t gfxhub_v1_2_gart_disable +ffffffff8204f2b0 t gfxhub_v1_2_set_fault_enable_default +ffffffff8204f320 t gfxhub_v1_2_init +ffffffff8204f680 t gfxhub_v1_2_get_xgmi_info +ffffffff8204f930 t gfxhub_v1_2_xcp_suspend +ffffffff8204f980 t gfxhub_v1_2_xcp_resume +ffffffff8204fa00 t gfxhub_v1_2_xcc_setup_vm_pt_regs +ffffffff8204fd60 t gfxhub_v1_2_xcc_gart_enable +ffffffff820539d0 t gfxhub_v1_2_xcc_gart_disable +ffffffff82054130 t gfxhub_v1_2_xcc_set_fault_enable_default +ffffffff82055000 t gfxhub_v2_0_get_fb_location +ffffffff820550a0 t gfxhub_v2_0_get_mc_fb_offset +ffffffff82055140 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff82055290 t gfxhub_v2_0_gart_enable +ffffffff82056730 t gfxhub_v2_0_gart_disable +ffffffff820569a0 t gfxhub_v2_0_set_fault_enable_default +ffffffff82056aa0 t gfxhub_v2_0_init +ffffffff82056b70 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff82056d90 t gfxhub_v2_0_get_invalidate_req +ffffffff82057000 t gfxhub_v2_1_get_fb_location +ffffffff820570a0 t gfxhub_v2_1_get_mc_fb_offset +ffffffff82057140 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff82057290 t gfxhub_v2_1_gart_enable +ffffffff82058830 t gfxhub_v2_1_gart_disable +ffffffff82058aa0 t gfxhub_v2_1_set_fault_enable_default +ffffffff82058bc0 t gfxhub_v2_1_init +ffffffff82058c90 t gfxhub_v2_1_get_xgmi_info +ffffffff82058df0 t gfxhub_v2_1_utcl2_harvest +ffffffff82058fe0 t gfxhub_v2_1_save_regs +ffffffff82059b30 t gfxhub_v2_1_restore_regs +ffffffff8205a900 t gfxhub_v2_1_halt +ffffffff8205ad50 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff8205af70 t gfxhub_v2_1_get_invalidate_req +ffffffff8205b000 t gfxhub_v3_0_get_fb_location +ffffffff8205b0a0 t gfxhub_v3_0_get_mc_fb_offset +ffffffff8205b140 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff8205b290 t gfxhub_v3_0_gart_enable +ffffffff8205c830 t gfxhub_v3_0_gart_disable +ffffffff8205cb10 t gfxhub_v3_0_set_fault_enable_default +ffffffff8205cd00 t gfxhub_v3_0_init +ffffffff8205cdd0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff8205cff0 t gfxhub_v3_0_get_invalidate_req +ffffffff8205e000 t gfxhub_v3_0_3_get_fb_location +ffffffff8205e0a0 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff8205e140 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff8205e290 t gfxhub_v3_0_3_gart_enable +ffffffff8205f6f0 t gfxhub_v3_0_3_gart_disable +ffffffff8205f9f0 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff8205fb10 t gfxhub_v3_0_3_init +ffffffff8205fbe0 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff8205fe00 t gfxhub_v3_0_3_get_invalidate_req +ffffffff82060000 t gmc_v10_0_early_init +ffffffff82060170 t gmc_v10_0_late_init +ffffffff820601f0 t gmc_v10_0_sw_init +ffffffff82060690 t gmc_v10_0_sw_fini +ffffffff82060710 t gmc_v10_0_hw_init +ffffffff82060990 t gmc_v10_0_hw_fini +ffffffff82060a80 t gmc_v10_0_suspend +ffffffff82060ac0 t gmc_v10_0_resume +ffffffff82060b20 t gmc_v10_0_is_idle +ffffffff82060b50 t gmc_v10_0_wait_for_idle +ffffffff82060b80 t gmc_v10_0_soft_reset +ffffffff82060bb0 t gmc_v10_0_set_clockgating_state +ffffffff82060c70 t gmc_v10_0_set_powergating_state +ffffffff82060ca0 t gmc_v10_0_get_clockgating_state +ffffffff82060d50 t gmc_v10_0_flush_gpu_tlb +ffffffff82061060 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff82061380 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff82061560 t gmc_v10_0_emit_pasid_mapping +ffffffff820615e0 t gmc_v10_0_map_mtype +ffffffff82061630 t gmc_v10_0_get_vm_pde +ffffffff82061730 t gmc_v10_0_get_vm_pte +ffffffff82061810 t gmc_v10_0_get_vbios_fb_size +ffffffff820619a0 t gmc_v10_0_flush_vm_hub +ffffffff82061e40 t gmc_v10_0_vm_fault_interrupt_state +ffffffff82061ef0 t gmc_v10_0_process_interrupt +ffffffff82062220 t gmc_v10_0_ecc_interrupt_state +ffffffff82062250 t gmc_v10_0_gart_init +ffffffff82063000 t gmc_v11_0_early_init +ffffffff820631f0 t gmc_v11_0_late_init +ffffffff82063270 t gmc_v11_0_sw_init +ffffffff82063630 t gmc_v11_0_sw_fini +ffffffff820636b0 t gmc_v11_0_hw_init +ffffffff82063860 t gmc_v11_0_hw_fini +ffffffff82063920 t gmc_v11_0_suspend +ffffffff820639e0 t gmc_v11_0_resume +ffffffff82063a40 t gmc_v11_0_is_idle +ffffffff82063a70 t gmc_v11_0_wait_for_idle +ffffffff82063aa0 t gmc_v11_0_soft_reset +ffffffff82063ad0 t gmc_v11_0_set_clockgating_state +ffffffff82063b50 t gmc_v11_0_set_powergating_state +ffffffff82063b80 t gmc_v11_0_get_clockgating_state +ffffffff82063bc0 t gmc_v11_0_flush_gpu_tlb +ffffffff820640f0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff820643c0 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff820645a0 t gmc_v11_0_emit_pasid_mapping +ffffffff82064620 t gmc_v11_0_map_mtype +ffffffff82064670 t gmc_v11_0_get_vm_pde +ffffffff82064770 t gmc_v11_0_get_vm_pte +ffffffff82064850 t gmc_v11_0_get_vbios_fb_size +ffffffff820649e0 t gmc_v11_0_vm_fault_interrupt_state +ffffffff82064a90 t gmc_v11_0_process_interrupt +ffffffff82064cf0 t gmc_v11_0_ecc_interrupt_state +ffffffff82064d20 t gmc_v11_0_gart_init +ffffffff82065000 t gmc_v7_0_early_init +ffffffff820650a0 t gmc_v7_0_late_init +ffffffff820650f0 t gmc_v7_0_sw_init +ffffffff82065610 t gmc_v7_0_sw_fini +ffffffff820656c0 t gmc_v7_0_hw_init +ffffffff82066350 t gmc_v7_0_hw_fini +ffffffff82066460 t gmc_v7_0_suspend +ffffffff820664a0 t gmc_v7_0_resume +ffffffff82066500 t gmc_v7_0_is_idle +ffffffff82066550 t gmc_v7_0_wait_for_idle +ffffffff82066600 t gmc_v7_0_soft_reset +ffffffff82066910 t gmc_v7_0_set_clockgating_state +ffffffff82066bb0 t gmc_v7_0_set_powergating_state +ffffffff82066be0 t gmc_v7_0_flush_gpu_tlb +ffffffff82066c10 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff82066cf0 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff82066da0 t gmc_v7_0_emit_pasid_mapping +ffffffff82066dd0 t gmc_v7_0_set_prt +ffffffff82066ff0 t gmc_v7_0_get_vm_pde +ffffffff82067050 t gmc_v7_0_get_vm_pte +ffffffff82067090 t gmc_v7_0_get_vbios_fb_size +ffffffff82067110 t gmc_v7_0_vm_fault_interrupt_state +ffffffff82067210 t gmc_v7_0_process_interrupt +ffffffff82067520 t gmc_v7_0_gart_init +ffffffff82068000 t gmc_v8_0_early_init +ffffffff820680a0 t gmc_v8_0_late_init +ffffffff820680f0 t gmc_v8_0_sw_init +ffffffff820687b0 t gmc_v8_0_sw_fini +ffffffff82068860 t gmc_v8_0_hw_init +ffffffff82069890 t gmc_v8_0_hw_fini +ffffffff820699a0 t gmc_v8_0_suspend +ffffffff820699e0 t gmc_v8_0_resume +ffffffff82069a40 t gmc_v8_0_is_idle +ffffffff82069a90 t gmc_v8_0_wait_for_idle +ffffffff82069b40 t gmc_v8_0_check_soft_reset +ffffffff82069bc0 t gmc_v8_0_pre_soft_reset +ffffffff82069d70 t gmc_v8_0_soft_reset +ffffffff82069e70 t gmc_v8_0_post_soft_reset +ffffffff82069f00 t gmc_v8_0_set_clockgating_state +ffffffff8206a730 t gmc_v8_0_set_powergating_state +ffffffff8206a760 t gmc_v8_0_get_clockgating_state +ffffffff8206a7d0 t gmc_v8_0_flush_gpu_tlb +ffffffff8206a800 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff8206a8e0 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff8206a990 t gmc_v8_0_emit_pasid_mapping +ffffffff8206a9c0 t gmc_v8_0_set_prt +ffffffff8206abe0 t gmc_v8_0_get_vm_pde +ffffffff8206ac40 t gmc_v8_0_get_vm_pte +ffffffff8206ac90 t gmc_v8_0_get_vbios_fb_size +ffffffff8206ad10 t gmc_v8_0_vm_fault_interrupt_state +ffffffff8206ae10 t gmc_v8_0_process_interrupt +ffffffff8206b230 t gmc_v8_0_gart_init +ffffffff8206c000 T gmc_v9_0_restore_registers +ffffffff8206c170 t gmc_v9_0_early_init +ffffffff8206c540 t gmc_v9_0_late_init +ffffffff8206c670 t gmc_v9_0_sw_init +ffffffff8206cee0 t gmc_v9_0_sw_fini +ffffffff8206cfe0 t gmc_v9_0_hw_init +ffffffff8206d560 t gmc_v9_0_hw_fini +ffffffff8206d660 t gmc_v9_0_suspend +ffffffff8206d6a0 t gmc_v9_0_resume +ffffffff8206d700 t gmc_v9_0_is_idle +ffffffff8206d730 t gmc_v9_0_wait_for_idle +ffffffff8206d760 t gmc_v9_0_soft_reset +ffffffff8206d790 t gmc_v9_0_set_clockgating_state +ffffffff8206d800 t gmc_v9_0_set_powergating_state +ffffffff8206d830 t gmc_v9_0_get_clockgating_state +ffffffff8206d870 t gmc_v9_0_flush_gpu_tlb +ffffffff8206dfa0 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff8206e3e0 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff8206e610 t gmc_v9_0_emit_pasid_mapping +ffffffff8206e690 t gmc_v9_0_map_mtype +ffffffff8206e6d0 t gmc_v9_0_get_vm_pde +ffffffff8206e7e0 t gmc_v9_0_get_vm_pte +ffffffff8206eb20 t gmc_v9_0_override_vm_pte_flags +ffffffff8206ebe0 t gmc_v9_0_get_vbios_fb_size +ffffffff8206ed90 t gmc_v9_0_query_memory_partition +ffffffff8206edf0 t gmc_v9_0_vm_fault_interrupt_state +ffffffff8206f2d0 t gmc_v9_0_process_interrupt +ffffffff8206fba0 t gmc_v9_0_ecc_interrupt_state +ffffffff8206fd50 t gmc_v9_0_init_mem_ranges +ffffffff820701c0 t gmc_v9_0_gart_init +ffffffff82070330 t gmc_v9_0_save_registers +ffffffff82071000 t hdp_v4_0_query_ras_error_count +ffffffff820710d0 t hdp_v4_0_reset_ras_error_count +ffffffff82071200 t hdp_v4_0_flush_hdp +ffffffff82071250 t hdp_v4_0_invalidate_hdp +ffffffff82071330 t hdp_v4_0_update_clock_gating +ffffffff82071440 t hdp_v4_0_get_clockgating_state +ffffffff820714a0 t hdp_v4_0_init_registers +ffffffff82072000 t hdp_v5_0_flush_hdp +ffffffff82072050 t hdp_v5_0_invalidate_hdp +ffffffff820720f0 t hdp_v5_0_update_clock_gating +ffffffff82072530 t hdp_v5_0_get_clockgating_state +ffffffff82072670 t hdp_v5_0_init_registers +ffffffff82073000 t hdp_v5_2_flush_hdp +ffffffff82073050 t hdp_v5_2_update_clock_gating +ffffffff820734a0 t hdp_v5_2_get_clockgating_state +ffffffff82074000 t hdp_v6_0_flush_hdp +ffffffff82074050 t hdp_v6_0_update_clock_gating +ffffffff820743b0 t hdp_v6_0_get_clockgating_state +ffffffff82075000 t iceland_ih_early_init +ffffffff82075050 t iceland_ih_sw_init +ffffffff820750c0 t iceland_ih_sw_fini +ffffffff82075120 t iceland_ih_hw_init +ffffffff82075410 t iceland_ih_hw_fini +ffffffff82075520 t iceland_ih_suspend +ffffffff82075630 t iceland_ih_resume +ffffffff82075670 t iceland_ih_is_idle +ffffffff820756c0 t iceland_ih_wait_for_idle +ffffffff82075770 t iceland_ih_soft_reset +ffffffff82075890 t iceland_ih_set_clockgating_state +ffffffff820758c0 t iceland_ih_set_powergating_state +ffffffff820758f0 t iceland_ih_get_wptr +ffffffff82075a20 t iceland_ih_decode_iv +ffffffff82075aa0 t iceland_ih_set_rptr +ffffffff82076000 t ih_v6_0_early_init +ffffffff82076050 t ih_v6_0_sw_init +ffffffff820761d0 t ih_v6_0_sw_fini +ffffffff82076210 t ih_v6_0_hw_init +ffffffff820768a0 t ih_v6_0_hw_fini +ffffffff82076910 t ih_v6_0_suspend +ffffffff82076980 t ih_v6_0_resume +ffffffff82076990 t ih_v6_0_is_idle +ffffffff820769c0 t ih_v6_0_wait_for_idle +ffffffff820769f0 t ih_v6_0_soft_reset +ffffffff82076a20 t ih_v6_0_set_clockgating_state +ffffffff82076b60 t ih_v6_0_set_powergating_state +ffffffff82076d00 t ih_v6_0_get_clockgating_state +ffffffff82076da0 t ih_v6_0_get_wptr +ffffffff82076ee0 t ih_v6_0_set_rptr +ffffffff82076fc0 t ih_v6_0_self_irq +ffffffff82077030 t ih_v6_0_toggle_interrupts +ffffffff82077290 t force_update_wptr_for_self_int +ffffffff82078000 t ih_v6_1_early_init +ffffffff82078050 t ih_v6_1_sw_init +ffffffff820781d0 t ih_v6_1_sw_fini +ffffffff82078210 t ih_v6_1_hw_init +ffffffff820788a0 t ih_v6_1_hw_fini +ffffffff82078910 t ih_v6_1_suspend +ffffffff82078980 t ih_v6_1_resume +ffffffff82078990 t ih_v6_1_is_idle +ffffffff820789c0 t ih_v6_1_wait_for_idle +ffffffff820789f0 t ih_v6_1_soft_reset +ffffffff82078a20 t ih_v6_1_set_clockgating_state +ffffffff82078b60 t ih_v6_1_set_powergating_state +ffffffff82078d00 t ih_v6_1_get_clockgating_state +ffffffff82078da0 t ih_v6_1_get_wptr +ffffffff82078ee0 t ih_v6_1_set_rptr +ffffffff82078fc0 t ih_v6_1_self_irq +ffffffff82079030 t ih_v6_1_toggle_interrupts +ffffffff82079250 t force_update_wptr_for_self_int +ffffffff8207a000 t imu_v11_0_init_microcode +ffffffff8207a1b0 t imu_v11_0_load_microcode +ffffffff8207a580 t imu_v11_0_setup +ffffffff8207a860 t imu_v11_0_start +ffffffff8207a980 t imu_v11_0_program_rlc_ram +ffffffff8207ab60 t imu_v11_0_wait_for_reset_status +ffffffff8207ace0 t program_imu_rlc_ram +ffffffff8207c000 T imu_v11_0_3_program_rlc_ram +ffffffff8207d000 T jpeg_v1_0_early_init +ffffffff8207d080 T jpeg_v1_0_sw_init +ffffffff8207d190 T jpeg_v1_0_sw_fini +ffffffff8207d1b0 T jpeg_v1_0_start +ffffffff8207dcf0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff8207dd80 t jpeg_v1_0_decode_ring_get_wptr +ffffffff8207de10 t jpeg_v1_0_decode_ring_set_wptr +ffffffff8207de80 t jpeg_v1_dec_ring_parse_cs +ffffffff8207dff0 t jpeg_v1_0_decode_ring_emit_ib +ffffffff8207ea10 t jpeg_v1_0_decode_ring_emit_fence +ffffffff8207f460 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff8207f4d0 t jpeg_v1_0_decode_ring_nop +ffffffff8207f630 t jpeg_v1_0_decode_ring_insert_start +ffffffff8207f810 t jpeg_v1_0_decode_ring_insert_end +ffffffff8207f9f0 t jpeg_v1_0_ring_begin_use +ffffffff8207fb20 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff8207fdb0 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff82080210 t jpeg_v1_0_set_interrupt_state +ffffffff82080240 t jpeg_v1_0_process_interrupt +ffffffff82081000 T jpeg_v2_0_dec_ring_insert_start +ffffffff820811c0 T jpeg_v2_0_dec_ring_insert_end +ffffffff82081380 T jpeg_v2_0_dec_ring_emit_fence +ffffffff82081af0 T jpeg_v2_0_dec_ring_emit_ib +ffffffff82082380 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff82082780 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff820827f0 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff82082a50 T jpeg_v2_0_dec_ring_nop +ffffffff82082bb0 t jpeg_v2_0_early_init +ffffffff82082c40 t jpeg_v2_0_sw_init +ffffffff82082d90 t jpeg_v2_0_sw_fini +ffffffff82082df0 t jpeg_v2_0_hw_init +ffffffff82082e80 t jpeg_v2_0_hw_fini +ffffffff82082f70 t jpeg_v2_0_suspend +ffffffff82082fa0 t jpeg_v2_0_resume +ffffffff82083050 t jpeg_v2_0_is_idle +ffffffff820830f0 t jpeg_v2_0_wait_for_idle +ffffffff82083130 t jpeg_v2_0_set_clockgating_state +ffffffff820831f0 t jpeg_v2_0_set_powergating_state +ffffffff82083a60 t jpeg_v2_0_dec_ring_get_rptr +ffffffff82083af0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff82083ba0 t jpeg_v2_0_dec_ring_set_wptr +ffffffff82083c40 t jpeg_v2_0_set_interrupt_state +ffffffff82083c70 t jpeg_v2_0_process_interrupt +ffffffff82083d10 t jpeg_v2_0_enable_clock_gating +ffffffff82083ee0 t jpeg_v2_0_disable_clock_gating +ffffffff82085000 t jpeg_v2_6_query_ras_poison_status +ffffffff82085160 t jpeg_v2_5_early_init +ffffffff82085380 t jpeg_v2_5_sw_init +ffffffff82085660 t jpeg_v2_5_sw_fini +ffffffff820856c0 t jpeg_v2_5_hw_init +ffffffff820857c0 t jpeg_v2_5_hw_fini +ffffffff82085980 t jpeg_v2_5_suspend +ffffffff820859b0 t jpeg_v2_5_resume +ffffffff82085ad0 t jpeg_v2_5_is_idle +ffffffff82085be0 t jpeg_v2_5_wait_for_idle +ffffffff82085ca0 t jpeg_v2_5_set_clockgating_state +ffffffff82085d60 t jpeg_v2_5_set_powergating_state +ffffffff820865c0 t jpeg_v2_5_dec_ring_get_rptr +ffffffff82086660 t jpeg_v2_5_dec_ring_get_wptr +ffffffff82086710 t jpeg_v2_5_dec_ring_set_wptr +ffffffff820867c0 t jpeg_v2_6_dec_ring_insert_start +ffffffff820869a0 t jpeg_v2_6_dec_ring_insert_end +ffffffff82086b80 t jpeg_v2_5_set_interrupt_state +ffffffff82086bb0 t jpeg_v2_5_process_interrupt +ffffffff82086c90 t jpeg_v2_6_set_ras_interrupt_state +ffffffff82086cc0 t jpeg_v2_5_enable_clock_gating +ffffffff82086da0 t jpeg_v2_5_disable_clock_gating +ffffffff82088000 t jpeg_v3_0_early_init +ffffffff82088120 t jpeg_v3_0_sw_init +ffffffff82088270 t jpeg_v3_0_sw_fini +ffffffff820882d0 t jpeg_v3_0_hw_init +ffffffff82088360 t jpeg_v3_0_hw_fini +ffffffff82088450 t jpeg_v3_0_suspend +ffffffff82088480 t jpeg_v3_0_resume +ffffffff82088530 t jpeg_v3_0_is_idle +ffffffff820885d0 t jpeg_v3_0_wait_for_idle +ffffffff82088610 t jpeg_v3_0_set_clockgating_state +ffffffff820886d0 t jpeg_v3_0_set_powergating_state +ffffffff82089020 t jpeg_v3_0_dec_ring_get_rptr +ffffffff820890b0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff82089160 t jpeg_v3_0_dec_ring_set_wptr +ffffffff82089200 t jpeg_v3_0_set_interrupt_state +ffffffff82089230 t jpeg_v3_0_process_interrupt +ffffffff820892d0 t jpeg_v3_0_enable_clock_gating +ffffffff820893b0 t jpeg_v3_0_disable_clock_gating +ffffffff8208a000 t jpeg_v4_0_query_ras_poison_status +ffffffff8208a160 t jpeg_v4_0_early_init +ffffffff8208a240 t jpeg_v4_0_sw_init +ffffffff8208a410 t jpeg_v4_0_sw_fini +ffffffff8208a470 t jpeg_v4_0_hw_init +ffffffff8208ab60 t jpeg_v4_0_hw_fini +ffffffff8208ac60 t jpeg_v4_0_suspend +ffffffff8208ac90 t jpeg_v4_0_resume +ffffffff8208acf0 t jpeg_v4_0_is_idle +ffffffff8208ad90 t jpeg_v4_0_wait_for_idle +ffffffff8208add0 t jpeg_v4_0_set_clockgating_state +ffffffff8208aea0 t jpeg_v4_0_set_powergating_state +ffffffff8208b760 t jpeg_v4_0_dec_ring_get_rptr +ffffffff8208b7f0 t jpeg_v4_0_dec_ring_get_wptr +ffffffff8208b8a0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff8208b940 t jpeg_v4_0_set_interrupt_state +ffffffff8208b970 t jpeg_v4_0_process_interrupt +ffffffff8208ba20 t jpeg_v4_0_set_ras_interrupt_state +ffffffff8208ba50 t jpeg_v4_0_enable_clock_gating +ffffffff8208bc30 t jpeg_v4_0_disable_clock_gating +ffffffff8208c000 T jpeg_v4_0_3_dec_ring_parse_cs +ffffffff8208c180 t jpeg_v4_0_3_early_init +ffffffff8208c300 t jpeg_v4_0_3_sw_init +ffffffff8208c680 t jpeg_v4_0_3_sw_fini +ffffffff8208c6e0 t jpeg_v4_0_3_hw_init +ffffffff8208d220 t jpeg_v4_0_3_hw_fini +ffffffff8208d2d0 t jpeg_v4_0_3_suspend +ffffffff8208d370 t jpeg_v4_0_3_resume +ffffffff8208d3d0 t jpeg_v4_0_3_is_idle +ffffffff8208d5e0 t jpeg_v4_0_3_wait_for_idle +ffffffff8208d750 t jpeg_v4_0_3_set_clockgating_state +ffffffff8208d7f0 t jpeg_v4_0_3_set_powergating_state +ffffffff8208e5d0 t jpeg_v4_0_3_dec_ring_get_rptr +ffffffff8208e770 t jpeg_v4_0_3_dec_ring_get_wptr +ffffffff8208e930 t jpeg_v4_0_3_dec_ring_set_wptr +ffffffff8208eae0 t jpeg_v4_0_3_dec_ring_emit_ib +ffffffff8208f440 t jpeg_v4_0_3_dec_ring_emit_fence +ffffffff8208fc90 t jpeg_v4_0_3_dec_ring_emit_vm_flush +ffffffff8208fd00 t jpeg_v4_0_3_dec_ring_nop +ffffffff8208fe60 t jpeg_v4_0_3_dec_ring_insert_start +ffffffff82090020 t jpeg_v4_0_3_dec_ring_insert_end +ffffffff820901e0 t jpeg_v4_0_3_dec_ring_emit_wreg +ffffffff82090440 t jpeg_v4_0_3_dec_ring_emit_reg_wait +ffffffff82090840 t jpeg_v4_0_3_set_interrupt_state +ffffffff82090870 t jpeg_v4_0_3_process_interrupt +ffffffff82090b20 t jpeg_v4_0_3_query_ras_error_count +ffffffff82090c40 t jpeg_v4_0_3_reset_ras_error_count +ffffffff82090d50 t jpeg_v4_0_3_disable_clock_gating +ffffffff82091000 t lsdma_v6_0_copy_mem +ffffffff820913e0 t lsdma_v6_0_fill_mem +ffffffff82091740 t lsdma_v6_0_update_memory_power_gating +ffffffff82092000 t mca_v3_0_ras_block_match +ffffffff82092050 t mca_v3_0_mp0_query_ras_error_count +ffffffff82092070 t mca_v3_0_mp1_query_ras_error_count +ffffffff82092090 t mca_v3_0_mpio_query_ras_error_count +ffffffff82093000 t mes_v10_0_early_init +ffffffff82093070 t mes_v10_0_late_init +ffffffff820930c0 t mes_v10_1_sw_init +ffffffff82093630 t mes_v10_1_sw_fini +ffffffff820937c0 t mes_v10_1_hw_init +ffffffff820941b0 t mes_v10_1_hw_fini +ffffffff820942c0 t mes_v10_1_suspend +ffffffff82094400 t mes_v10_1_resume +ffffffff82094460 t mes_v10_1_kiq_hw_init +ffffffff820948f0 t mes_v10_1_add_hw_queue +ffffffff82094a80 t mes_v10_1_remove_hw_queue +ffffffff82094b20 t mes_v10_1_unmap_legacy_queue +ffffffff82094c20 t mes_v10_1_suspend_gang +ffffffff82094c50 t mes_v10_1_resume_gang +ffffffff82094c80 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff82094ed0 t mes_v10_1_load_microcode +ffffffff820957f0 t mes_v10_1_enable +ffffffff82095d00 t mes_v10_1_queue_init +ffffffff82095fe0 t amdgpu_bo_unreserve +ffffffff820960f0 t mes_v10_1_ring_get_rptr +ffffffff82096120 t mes_v10_1_ring_get_wptr +ffffffff82096190 t mes_v10_1_ring_set_wptr +ffffffff82097000 t mes_v11_0_early_init +ffffffff82097070 t mes_v11_0_late_init +ffffffff820970e0 t mes_v11_0_sw_init +ffffffff82097650 t mes_v11_0_sw_fini +ffffffff820978a0 t mes_v11_0_hw_init +ffffffff820981b0 t mes_v11_0_hw_fini +ffffffff820981e0 t mes_v11_0_suspend +ffffffff820981f0 t mes_v11_0_resume +ffffffff82098250 t mes_v11_0_kiq_hw_init +ffffffff820984a0 t mes_v11_0_kiq_hw_fini +ffffffff82098600 t mes_v11_0_add_hw_queue +ffffffff82098810 t mes_v11_0_remove_hw_queue +ffffffff820988b0 t mes_v11_0_unmap_legacy_queue +ffffffff820989d0 t mes_v11_0_suspend_gang +ffffffff82098a00 t mes_v11_0_resume_gang +ffffffff82098a30 t mes_v11_0_misc_op +ffffffff82098bf0 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff82098e50 t mes_v11_0_load_microcode +ffffffff820996f0 t mes_v11_0_enable +ffffffff82099ca0 t mes_v11_0_queue_init +ffffffff8209a920 t amdgpu_bo_unreserve +ffffffff8209aa30 t mes_v11_0_mqd_init +ffffffff8209ac50 t mes_v11_0_kiq_dequeue +ffffffff8209b140 t mes_v11_0_ring_get_rptr +ffffffff8209b170 t mes_v11_0_ring_get_wptr +ffffffff8209b1e0 t mes_v11_0_ring_set_wptr +ffffffff8209c000 t mmhub_v1_0_query_ras_error_count +ffffffff8209c160 t mmhub_v1_0_reset_ras_error_count +ffffffff8209c230 t mmhub_v1_0_get_fb_location +ffffffff8209c360 t mmhub_v1_0_init +ffffffff8209c410 t mmhub_v1_0_gart_enable +ffffffff8209d9c0 t mmhub_v1_0_set_fault_enable_default +ffffffff8209dae0 t mmhub_v1_0_gart_disable +ffffffff8209ddb0 t mmhub_v1_0_set_clockgating +ffffffff8209e2a0 t mmhub_v1_0_get_clockgating +ffffffff8209e3e0 t mmhub_v1_0_setup_vm_pt_regs +ffffffff8209e530 t mmhub_v1_0_update_power_gating +ffffffff8209f000 t mmhub_v1_7_query_ras_error_count +ffffffff8209f160 t mmhub_v1_7_query_ras_error_status +ffffffff8209f270 t mmhub_v1_7_reset_ras_error_count +ffffffff8209f320 t mmhub_v1_7_reset_ras_error_status +ffffffff8209f440 t mmhub_v1_7_get_fb_location +ffffffff8209f570 t mmhub_v1_7_init +ffffffff8209f610 t mmhub_v1_7_gart_enable +ffffffff820a0df0 t mmhub_v1_7_set_fault_enable_default +ffffffff820a0f10 t mmhub_v1_7_gart_disable +ffffffff820a11e0 t mmhub_v1_7_set_clockgating +ffffffff820a15c0 t mmhub_v1_7_get_clockgating +ffffffff820a1700 t mmhub_v1_7_setup_vm_pt_regs +ffffffff820a2000 t mmhub_v1_8_get_fb_location +ffffffff820a2130 t mmhub_v1_8_init +ffffffff820a22b0 t mmhub_v1_8_gart_enable +ffffffff820a41d0 t mmhub_v1_8_set_fault_enable_default +ffffffff820a43c0 t mmhub_v1_8_gart_disable +ffffffff820a4760 t mmhub_v1_8_set_clockgating +ffffffff820a4790 t mmhub_v1_8_get_clockgating +ffffffff820a47c0 t mmhub_v1_8_setup_vm_pt_regs +ffffffff820a49f0 t mmhub_v1_8_query_ras_error_count +ffffffff820a4b80 t mmhub_v1_8_query_ras_error_status +ffffffff820a4e80 t mmhub_v1_8_reset_ras_error_count +ffffffff820a4fc0 t mmhub_v1_8_reset_ras_error_status +ffffffff820a6000 t mmhub_v2_0_init +ffffffff820a60d0 t mmhub_v2_0_gart_enable +ffffffff820a74f0 t mmhub_v2_0_set_fault_enable_default +ffffffff820a7610 t mmhub_v2_0_gart_disable +ffffffff820a78e0 t mmhub_v2_0_set_clockgating +ffffffff820a7c70 t mmhub_v2_0_get_clockgating +ffffffff820a7e30 t mmhub_v2_0_setup_vm_pt_regs +ffffffff820a7f90 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff820a8230 t mmhub_v2_0_get_invalidate_req +ffffffff820a9000 t mmhub_v2_3_init +ffffffff820a90e0 t mmhub_v2_3_gart_enable +ffffffff820aa760 t mmhub_v2_3_set_fault_enable_default +ffffffff820aa860 t mmhub_v2_3_gart_disable +ffffffff820aab40 t mmhub_v2_3_set_clockgating +ffffffff820ab050 t mmhub_v2_3_get_clockgating +ffffffff820ab270 t mmhub_v2_3_setup_vm_pt_regs +ffffffff820ab3c0 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff820ab610 t mmhub_v2_3_get_invalidate_req +ffffffff820ac000 t mmhub_v3_0_get_fb_location +ffffffff820ac0a0 t mmhub_v3_0_get_mc_fb_offset +ffffffff820ac140 t mmhub_v3_0_init +ffffffff820ac220 t mmhub_v3_0_gart_enable +ffffffff820ad690 t mmhub_v3_0_set_fault_enable_default +ffffffff820ad7b0 t mmhub_v3_0_gart_disable +ffffffff820ada80 t mmhub_v3_0_set_clockgating +ffffffff820adc70 t mmhub_v3_0_get_clockgating +ffffffff820add30 t mmhub_v3_0_setup_vm_pt_regs +ffffffff820ade80 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff820ae0d0 t mmhub_v3_0_get_invalidate_req +ffffffff820af000 t mmhub_v3_0_1_get_fb_location +ffffffff820af0a0 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff820af140 t mmhub_v3_0_1_init +ffffffff820af210 t mmhub_v3_0_1_gart_enable +ffffffff820b07a0 t mmhub_v3_0_1_set_fault_enable_default +ffffffff820b08a0 t mmhub_v3_0_1_gart_disable +ffffffff820b0b80 t mmhub_v3_0_1_set_clockgating +ffffffff820b0d70 t mmhub_v3_0_1_get_clockgating +ffffffff820b0e30 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff820b0f80 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff820b11d0 t mmhub_v3_0_1_get_invalidate_req +ffffffff820b2000 t mmhub_v3_0_2_get_fb_location +ffffffff820b20a0 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff820b2140 t mmhub_v3_0_2_init +ffffffff820b2210 t mmhub_v3_0_2_gart_enable +ffffffff820b3660 t mmhub_v3_0_2_set_fault_enable_default +ffffffff820b3780 t mmhub_v3_0_2_gart_disable +ffffffff820b3a50 t mmhub_v3_0_2_set_clockgating +ffffffff820b3a80 t mmhub_v3_0_2_get_clockgating +ffffffff820b3ab0 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff820b3c00 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff820b3e30 t mmhub_v3_0_2_get_invalidate_req +ffffffff820b4000 t mmhub_v9_4_query_ras_error_count +ffffffff820b4160 t mmhub_v9_4_query_ras_error_status +ffffffff820b4270 t mmhub_v9_4_reset_ras_error_count +ffffffff820b4340 t mmhub_v9_4_get_fb_location +ffffffff820b4470 t mmhub_v9_4_init +ffffffff820b45c0 t mmhub_v9_4_gart_enable +ffffffff820b5c60 t mmhub_v9_4_set_fault_enable_default +ffffffff820b5e70 t mmhub_v9_4_gart_disable +ffffffff820b6210 t mmhub_v9_4_set_clockgating +ffffffff820b6750 t mmhub_v9_4_get_clockgating +ffffffff820b6890 t mmhub_v9_4_setup_vm_pt_regs +ffffffff820b68e0 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff820b7000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff820b7050 T xgpu_ai_mailbox_add_irq_id +ffffffff820b7100 T xgpu_ai_mailbox_get_irq +ffffffff820b71d0 t xgpu_ai_mailbox_flr_work +ffffffff820b7470 T xgpu_ai_mailbox_put_irq +ffffffff820b74b0 t xgpu_ai_request_full_gpu_access +ffffffff820b74d0 t xgpu_ai_release_full_gpu_access +ffffffff820b74f0 t xgpu_ai_request_init_data +ffffffff820b7560 t xgpu_ai_request_reset +ffffffff820b7630 t xgpu_ai_mailbox_trans_msg +ffffffff820b78f0 t xgpu_ai_ras_poison_handler +ffffffff820b7920 t xgpu_ai_set_mailbox_ack_irq +ffffffff820b79c0 t xgpu_ai_mailbox_ack_irq +ffffffff820b7a20 t xgpu_ai_set_mailbox_rcv_irq +ffffffff820b7ac0 t xgpu_ai_mailbox_rcv_irq +ffffffff820b7bd0 t xgpu_ai_send_access_requests +ffffffff820b7cf0 t xgpu_ai_poll_msg +ffffffff820b8000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff820b8050 T xgpu_nv_mailbox_add_irq_id +ffffffff820b8100 T xgpu_nv_mailbox_get_irq +ffffffff820b81d0 t xgpu_nv_mailbox_flr_work +ffffffff820b8490 T xgpu_nv_mailbox_put_irq +ffffffff820b84d0 t xgpu_nv_request_full_gpu_access +ffffffff820b84f0 t xgpu_nv_release_full_gpu_access +ffffffff820b8510 t xgpu_nv_request_init_data +ffffffff820b8530 t xgpu_nv_request_reset +ffffffff820b8690 t xgpu_nv_mailbox_trans_msg +ffffffff820b88c0 t xgpu_nv_ras_poison_handler +ffffffff820b88e0 t xgpu_nv_set_mailbox_ack_irq +ffffffff820b8970 t xgpu_nv_mailbox_ack_irq +ffffffff820b89d0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff820b8a60 t xgpu_nv_mailbox_rcv_irq +ffffffff820b8b30 t xgpu_nv_send_access_requests +ffffffff820b9000 T xgpu_vi_init_golden_registers +ffffffff820b90f0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff820b9140 T xgpu_vi_mailbox_add_irq_id +ffffffff820b91f0 T xgpu_vi_mailbox_get_irq +ffffffff820b92c0 t xgpu_vi_mailbox_flr_work +ffffffff820b9460 T xgpu_vi_mailbox_put_irq +ffffffff820b94a0 t xgpu_vi_request_full_gpu_access +ffffffff820b94c0 t xgpu_vi_release_full_gpu_access +ffffffff820b94e0 t xgpu_vi_request_reset +ffffffff820b9500 t xgpu_vi_wait_reset_cmpl +ffffffff820b9640 t xgpu_vi_set_mailbox_ack_irq +ffffffff820b96d0 t xgpu_vi_mailbox_ack_irq +ffffffff820b9730 t xgpu_vi_set_mailbox_rcv_irq +ffffffff820b97c0 t xgpu_vi_mailbox_rcv_irq +ffffffff820b9890 t xgpu_vi_mailbox_rcv_msg +ffffffff820b99f0 t xgpu_vi_send_access_requests +ffffffff820ba000 t navi10_ih_early_init +ffffffff820ba060 t navi10_ih_sw_init +ffffffff820ba1f0 t navi10_ih_sw_fini +ffffffff820ba230 t navi10_ih_hw_init +ffffffff820ba710 t navi10_ih_hw_fini +ffffffff820ba780 t navi10_ih_suspend +ffffffff820ba7f0 t navi10_ih_resume +ffffffff820ba800 t navi10_ih_is_idle +ffffffff820ba830 t navi10_ih_wait_for_idle +ffffffff820ba860 t navi10_ih_soft_reset +ffffffff820ba890 t navi10_ih_set_clockgating_state +ffffffff820ba9d0 t navi10_ih_set_powergating_state +ffffffff820baa00 t navi10_ih_get_clockgating_state +ffffffff820baaa0 t navi10_ih_get_wptr +ffffffff820bac00 t navi10_ih_set_rptr +ffffffff820bacf0 t navi10_ih_self_irq +ffffffff820bad70 t navi10_ih_toggle_interrupts +ffffffff820baf00 t force_update_wptr_for_self_int +ffffffff820bc000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff820bc040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff820bc080 t nbio_v2_3_get_pcie_index_offset +ffffffff820bc0c0 t nbio_v2_3_get_pcie_data_offset +ffffffff820bc100 t nbio_v2_3_get_rev_id +ffffffff820bc160 t nbio_v2_3_mc_access_enable +ffffffff820bc210 t nbio_v2_3_get_memsize +ffffffff820bc280 t nbio_v2_3_sdma_doorbell_range +ffffffff820bc330 t nbio_v2_3_vcn_doorbell_range +ffffffff820bc3c0 t nbio_v2_3_enable_doorbell_aperture +ffffffff820bc4d0 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff820bc650 t nbio_v2_3_ih_doorbell_range +ffffffff820bc780 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff820bc830 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff820bc8e0 t nbio_v2_3_get_clockgating_state +ffffffff820bc970 t nbio_v2_3_ih_control +ffffffff820bcae0 t nbio_v2_3_init_registers +ffffffff820bcb80 t nbio_v2_3_remap_hdp_registers +ffffffff820bcca0 t nbio_v2_3_enable_aspm +ffffffff820bcd40 t nbio_v2_3_program_aspm +ffffffff820bd4c0 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff820bd560 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff820bd5e0 t nbio_v2_3_clear_doorbell_interrupt +ffffffff820be000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff820be040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff820be080 t nbio_v4_3_get_pcie_index_offset +ffffffff820be0b0 t nbio_v4_3_get_pcie_data_offset +ffffffff820be0f0 t nbio_v4_3_get_rev_id +ffffffff820be190 t nbio_v4_3_mc_access_enable +ffffffff820be240 t nbio_v4_3_get_memsize +ffffffff820be2b0 t nbio_v4_3_sdma_doorbell_range +ffffffff820be430 t nbio_v4_3_vcn_doorbell_range +ffffffff820be5f0 t nbio_v4_3_gc_doorbell_init +ffffffff820be700 t nbio_v4_3_enable_doorbell_aperture +ffffffff820be810 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff820be990 t nbio_v4_3_ih_doorbell_range +ffffffff820beac0 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff820bec10 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff820bed50 t nbio_v4_3_get_clockgating_state +ffffffff820bee90 t nbio_v4_3_ih_control +ffffffff820bf000 t nbio_v4_3_init_registers +ffffffff820bf140 t nbio_v4_3_remap_hdp_registers +ffffffff820bf260 t nbio_v4_3_program_aspm +ffffffff820c0090 t nbio_v4_3_get_rom_offset +ffffffff820c0130 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff820c0160 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff820c0190 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff820c01c0 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff820c01f0 t nbio_v4_3_handle_ras_err_event_athub_intr_no_bifring +ffffffff820c0330 t nbio_v4_3_init_ras_err_event_athub_interrupt +ffffffff820c0370 t nbio_v4_3_set_ras_err_event_athub_irq_state +ffffffff820c0490 t nbio_v4_3_process_err_event_athub_irq +ffffffff820c1000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff820c1040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff820c1080 t nbio_v6_1_get_pcie_index_offset +ffffffff820c10c0 t nbio_v6_1_get_pcie_data_offset +ffffffff820c1100 t nbio_v6_1_get_rev_id +ffffffff820c11a0 t nbio_v6_1_mc_access_enable +ffffffff820c1250 t nbio_v6_1_get_memsize +ffffffff820c12c0 t nbio_v6_1_sdma_doorbell_range +ffffffff820c1360 t nbio_v6_1_enable_doorbell_aperture +ffffffff820c1470 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff820c15f0 t nbio_v6_1_ih_doorbell_range +ffffffff820c1720 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff820c17d0 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff820c1880 t nbio_v6_1_get_clockgating_state +ffffffff820c1910 t nbio_v6_1_ih_control +ffffffff820c1a80 t nbio_v6_1_init_registers +ffffffff820c1b60 t nbio_v6_1_remap_hdp_registers +ffffffff820c1c80 t nbio_v6_1_program_aspm +ffffffff820c3000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff820c3040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff820c3080 t nbio_v7_0_get_pcie_index_offset +ffffffff820c30c0 t nbio_v7_0_get_pcie_data_offset +ffffffff820c3100 t nbio_v7_0_get_rev_id +ffffffff820c31a0 t nbio_v7_0_mc_access_enable +ffffffff820c3250 t nbio_v7_0_get_memsize +ffffffff820c32c0 t nbio_v7_0_sdma_doorbell_range +ffffffff820c3360 t nbio_v7_0_vcn_doorbell_range +ffffffff820c33e0 t nbio_v7_0_enable_doorbell_aperture +ffffffff820c34f0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff820c3520 t nbio_v7_0_ih_doorbell_range +ffffffff820c3650 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff820c3790 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff820c3840 t nbio_v7_0_get_clockgating_state +ffffffff820c38d0 t nbio_v7_0_ih_control +ffffffff820c3a40 t nbio_v7_0_init_registers +ffffffff820c3a90 t nbio_v7_0_remap_hdp_registers +ffffffff820c3bb0 t nbio_7_0_read_syshub_ind_mmr +ffffffff820c3c90 t nbio_7_0_write_syshub_ind_mmr +ffffffff820c4000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff820c4040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff820c4080 t nbio_v7_2_get_pcie_index_offset +ffffffff820c40c0 t nbio_v7_2_get_pcie_data_offset +ffffffff820c4100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff820c4130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff820c4170 t nbio_v7_2_get_rev_id +ffffffff820c4260 t nbio_v7_2_mc_access_enable +ffffffff820c43a0 t nbio_v7_2_get_memsize +ffffffff820c4410 t nbio_v7_2_sdma_doorbell_range +ffffffff820c44b0 t nbio_v7_2_vcn_doorbell_range +ffffffff820c4540 t nbio_v7_2_enable_doorbell_aperture +ffffffff820c4630 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff820c47b0 t nbio_v7_2_ih_doorbell_range +ffffffff820c4840 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff820c4900 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff820c4ab0 t nbio_v7_2_get_clockgating_state +ffffffff820c4b50 t nbio_v7_2_ih_control +ffffffff820c4cc0 t nbio_v7_2_init_registers +ffffffff820c4ea0 t nbio_v7_2_remap_hdp_registers +ffffffff820c5000 t nbio_v7_4_query_ras_error_count +ffffffff820c51d0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff820c5480 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff820c5650 t nbio_v7_4_init_ras_controller_interrupt +ffffffff820c5690 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff820c56d0 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff820c5710 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff820c5750 t nbio_v7_4_get_pcie_index_offset +ffffffff820c5790 t nbio_v7_4_get_pcie_data_offset +ffffffff820c57d0 t nbio_v7_4_get_rev_id +ffffffff820c58b0 t nbio_v7_4_mc_access_enable +ffffffff820c5960 t nbio_v7_4_get_memsize +ffffffff820c59d0 t nbio_v7_4_sdma_doorbell_range +ffffffff820c5aa0 t nbio_v7_4_vcn_doorbell_range +ffffffff820c5b50 t nbio_v7_4_enable_doorbell_aperture +ffffffff820c5c60 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff820c5de0 t nbio_v7_4_ih_doorbell_range +ffffffff820c5f10 t nbio_v7_4_enable_doorbell_interrupt +ffffffff820c6070 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff820c60a0 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff820c6150 t nbio_v7_4_get_clockgating_state +ffffffff820c61e0 t nbio_v7_4_ih_control +ffffffff820c6350 t nbio_v7_4_init_registers +ffffffff820c6450 t nbio_v7_4_remap_hdp_registers +ffffffff820c6570 t nbio_v7_4_program_aspm +ffffffff820c6a20 t nbio_v7_4_set_ras_controller_irq_state +ffffffff820c6bd0 t nbio_v7_4_process_ras_controller_irq +ffffffff820c6c00 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff820c6db0 t nbio_v7_4_process_err_event_athub_irq +ffffffff820c7000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff820c7040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff820c7080 t nbio_v7_7_get_pcie_index_offset +ffffffff820c70c0 t nbio_v7_7_get_pcie_data_offset +ffffffff820c7100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff820c7130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff820c7170 t nbio_v7_7_get_rev_id +ffffffff820c7210 t nbio_v7_7_mc_access_enable +ffffffff820c72c0 t nbio_v7_7_get_memsize +ffffffff820c7330 t nbio_v7_7_sdma_doorbell_range +ffffffff820c73d0 t nbio_v7_7_vcn_doorbell_range +ffffffff820c7460 t nbio_v7_7_enable_doorbell_aperture +ffffffff820c7550 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff820c76d0 t nbio_v7_7_ih_doorbell_range +ffffffff820c7800 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff820c7950 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff820c7b80 t nbio_v7_7_get_clockgating_state +ffffffff820c7cc0 t nbio_v7_7_ih_control +ffffffff820c7e30 t nbio_v7_7_init_registers +ffffffff820c8040 t nbio_v7_7_remap_hdp_registers +ffffffff820c9000 t nbio_v7_9_get_hdp_flush_req_offset +ffffffff820c9040 t nbio_v7_9_get_hdp_flush_done_offset +ffffffff820c9080 t nbio_v7_9_get_pcie_index_offset +ffffffff820c90c0 t nbio_v7_9_get_pcie_data_offset +ffffffff820c9100 t nbio_v7_9_get_pcie_index_hi_offset +ffffffff820c9140 t nbio_v7_9_get_rev_id +ffffffff820c91e0 t nbio_v7_9_mc_access_enable +ffffffff820c9290 t nbio_v7_9_get_memsize +ffffffff820c9300 t nbio_v7_9_sdma_doorbell_range +ffffffff820c9680 t nbio_v7_9_vcn_doorbell_range +ffffffff820c9840 t nbio_v7_9_enable_doorbell_aperture +ffffffff820c99d0 t nbio_v7_9_enable_doorbell_selfring_aperture +ffffffff820c9b50 t nbio_v7_9_ih_doorbell_range +ffffffff820c9c70 t nbio_v7_9_enable_doorbell_interrupt +ffffffff820c9d90 t nbio_v7_9_update_medium_grain_clock_gating +ffffffff820c9dc0 t nbio_v7_9_update_medium_grain_light_sleep +ffffffff820c9df0 t nbio_v7_9_get_clockgating_state +ffffffff820c9e20 t nbio_v7_9_ih_control +ffffffff820c9f90 t nbio_v7_9_init_registers +ffffffff820ca320 t nbio_v7_9_remap_hdp_registers +ffffffff820ca440 t nbio_v7_9_get_compute_partition_mode +ffffffff820ca4e0 t nbio_v7_9_get_memory_partition_mode +ffffffff820ca5e0 t nbio_v7_9_get_pcie_replay_count +ffffffff820ca640 t nbio_v7_9_get_pcie_usage +ffffffff820ca800 t nbio_v7_9_query_ras_error_count +ffffffff820ca830 t nbio_v7_9_handle_ras_controller_intr_no_bifring +ffffffff820ca980 t nbio_v7_9_handle_ras_err_event_athub_intr_no_bifring +ffffffff820caac0 t nbio_v7_9_init_ras_controller_interrupt +ffffffff820cab00 t nbio_v7_9_init_ras_err_event_athub_interrupt +ffffffff820cab40 t nbio_v7_9_set_ras_controller_irq_state +ffffffff820cab70 t nbio_v7_9_process_ras_controller_irq +ffffffff820caba0 t nbio_v7_9_set_ras_err_event_athub_irq_state +ffffffff820cabd0 t nbio_v7_9_process_err_event_athub_irq +ffffffff820cb000 T nv_grbm_select +ffffffff820cb0a0 T nv_set_virt_ops +ffffffff820cb0e0 t nv_common_early_init +ffffffff820cb4e0 t nv_common_late_init +ffffffff820cb5a0 t nv_common_sw_init +ffffffff820cb5f0 t nv_common_sw_fini +ffffffff820cb620 t nv_common_hw_init +ffffffff820cb750 t nv_common_hw_fini +ffffffff820cb7c0 t nv_common_suspend +ffffffff820cb830 t nv_common_resume +ffffffff820cb870 t nv_common_is_idle +ffffffff820cb8a0 t nv_common_wait_for_idle +ffffffff820cb8d0 t nv_common_soft_reset +ffffffff820cb900 t nv_common_set_clockgating_state +ffffffff820cb9f0 t nv_common_set_powergating_state +ffffffff820cba20 t nv_common_get_clockgating_state +ffffffff820cbaa0 t nv_didt_rreg +ffffffff820cbb60 t nv_didt_wreg +ffffffff820cbc00 t nv_read_disabled_bios +ffffffff820cbc30 t nv_read_register +ffffffff820cbd30 t nv_asic_reset +ffffffff820cbec0 t nv_asic_reset_method +ffffffff820cbfc0 t nv_get_xclk +ffffffff820cbff0 t nv_set_uvd_clocks +ffffffff820cc020 t nv_set_vce_clocks +ffffffff820cc050 t nv_get_config_memsize +ffffffff820cc070 t nv_need_full_reset +ffffffff820cc0a0 t nv_init_doorbell_index +ffffffff820cc1d0 t nv_need_reset_on_init +ffffffff820cc280 t nv_pre_asic_init +ffffffff820cc2b0 t nv_update_umd_stable_pstate +ffffffff820cc380 t nv_query_video_codecs +ffffffff820cd000 T psp_v10_0_set_psp_funcs +ffffffff820cd030 t psp_v10_0_init_microcode +ffffffff820cd120 t psp_v10_0_ring_create +ffffffff820cd510 t psp_v10_0_ring_stop +ffffffff820cd7c0 t psp_v10_0_ring_destroy +ffffffff820cd850 t psp_v10_0_mode1_reset +ffffffff820cd8a0 t psp_v10_0_ring_get_wptr +ffffffff820cd900 t psp_v10_0_ring_set_wptr +ffffffff820ce000 T psp_v11_0_set_psp_funcs +ffffffff820ce030 t psp_v11_0_init_microcode +ffffffff820ce1e0 t psp_v11_0_bootloader_load_kdb +ffffffff820ce200 t psp_v11_0_bootloader_load_spl +ffffffff820ce220 t psp_v11_0_bootloader_load_sysdrv +ffffffff820ce240 t psp_v11_0_bootloader_load_sos +ffffffff820ce690 t psp_v11_0_ring_create +ffffffff820cef10 t psp_v11_0_ring_stop +ffffffff820cf1f0 t psp_v11_0_ring_destroy +ffffffff820cf280 t psp_v11_0_mode1_reset +ffffffff820cf3b0 t psp_v11_0_memory_training +ffffffff820cf940 t psp_v11_0_ring_get_wptr +ffffffff820cf990 t psp_v11_0_ring_set_wptr +ffffffff820cfaf0 t psp_v11_0_load_usbc_pd_fw +ffffffff820cfd20 t psp_v11_0_read_usbc_pd_fw +ffffffff820cfe60 t psp_v11_0_bootloader_load_component +ffffffff820d0050 t psp_v11_0_wait_for_bootloader +ffffffff820d0270 t psp_v11_0_memory_training_send_msg +ffffffff820d1000 T psp_v11_0_8_set_psp_funcs +ffffffff820d1030 t psp_v11_0_8_ring_create +ffffffff820d18b0 t psp_v11_0_8_ring_stop +ffffffff820d1db0 t psp_v11_0_8_ring_destroy +ffffffff820d1e40 t psp_v11_0_8_ring_get_wptr +ffffffff820d1eb0 t psp_v11_0_8_ring_set_wptr +ffffffff820d2000 T psp_v12_0_set_psp_funcs +ffffffff820d2030 t psp_v12_0_init_microcode +ffffffff820d2100 t psp_v12_0_bootloader_load_sysdrv +ffffffff820d2520 t psp_v12_0_bootloader_load_sos +ffffffff820d2990 t psp_v12_0_ring_create +ffffffff820d3670 t psp_v12_0_ring_stop +ffffffff820d3950 t psp_v12_0_ring_destroy +ffffffff820d39e0 t psp_v12_0_mode1_reset +ffffffff820d3b10 t psp_v12_0_ring_get_wptr +ffffffff820d3b80 t psp_v12_0_ring_set_wptr +ffffffff820d4000 T psp_v13_0_set_psp_funcs +ffffffff820d4030 t psp_v13_0_init_microcode +ffffffff820d4160 t psp_v13_0_wait_for_bootloader_steady_state +ffffffff820d4290 t psp_v13_0_bootloader_load_kdb +ffffffff820d42b0 t psp_v13_0_bootloader_load_spl +ffffffff820d42d0 t psp_v13_0_bootloader_load_sysdrv +ffffffff820d42f0 t psp_v13_0_bootloader_load_soc_drv +ffffffff820d4310 t psp_v13_0_bootloader_load_intf_drv +ffffffff820d4330 t psp_v13_0_bootloader_load_dbg_drv +ffffffff820d4350 t psp_v13_0_bootloader_load_ras_drv +ffffffff820d4370 t psp_v13_0_bootloader_load_sos +ffffffff820d4830 t psp_v13_0_ring_create +ffffffff820d50b0 t psp_v13_0_ring_stop +ffffffff820d55b0 t psp_v13_0_ring_destroy +ffffffff820d5640 t psp_v13_0_memory_training +ffffffff820d5b20 t psp_v13_0_ring_get_wptr +ffffffff820d5b90 t psp_v13_0_ring_set_wptr +ffffffff820d5ca0 t psp_v13_0_load_usbc_pd_fw +ffffffff820d5ed0 t psp_v13_0_read_usbc_pd_fw +ffffffff820d6010 t psp_v13_0_update_spirom +ffffffff820d6230 t psp_v13_0_vbflash_status +ffffffff820d6290 t psp_v13_0_fatal_error_recovery_quirk +ffffffff820d63f0 t psp_v13_0_bootloader_load_component +ffffffff820d66b0 t psp_v13_0_memory_training_send_msg +ffffffff820d6830 t psp_v13_0_exec_spi_cmd +ffffffff820d7000 T psp_v13_0_4_set_psp_funcs +ffffffff820d7030 t psp_v13_0_4_init_microcode +ffffffff820d70f0 t psp_v13_0_4_bootloader_load_kdb +ffffffff820d7110 t psp_v13_0_4_bootloader_load_spl +ffffffff820d7130 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff820d7150 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff820d7170 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff820d7190 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff820d71b0 t psp_v13_0_4_bootloader_load_sos +ffffffff820d7620 t psp_v13_0_4_ring_create +ffffffff820d7eb0 t psp_v13_0_4_ring_stop +ffffffff820d83c0 t psp_v13_0_4_ring_destroy +ffffffff820d8450 t psp_v13_0_4_ring_get_wptr +ffffffff820d84c0 t psp_v13_0_4_ring_set_wptr +ffffffff820d85e0 t psp_v13_0_4_bootloader_load_component +ffffffff820d87f0 t psp_v13_0_4_wait_for_bootloader +ffffffff820d9000 T psp_v3_1_set_psp_funcs +ffffffff820d9030 t psp_v3_1_init_microcode +ffffffff820d90f0 t psp_v3_1_bootloader_load_sysdrv +ffffffff820d9510 t psp_v3_1_bootloader_load_sos +ffffffff820d9980 t psp_v3_1_ring_create +ffffffff820da840 t psp_v3_1_ring_stop +ffffffff820dab20 t psp_v3_1_ring_destroy +ffffffff820dabb0 t psp_v3_1_smu_reload_quirk +ffffffff820dac00 t psp_v3_1_mode1_reset +ffffffff820dad30 t psp_v3_1_ring_get_wptr +ffffffff820dad80 t psp_v3_1_ring_set_wptr +ffffffff820db000 t sdma_v2_4_early_init +ffffffff820db0f0 t sdma_v2_4_sw_init +ffffffff820db520 t sdma_v2_4_sw_fini +ffffffff820db5f0 t sdma_v2_4_hw_init +ffffffff820dbaa0 t sdma_v2_4_hw_fini +ffffffff820dbaf0 t sdma_v2_4_suspend +ffffffff820dbb40 t sdma_v2_4_resume +ffffffff820dbb50 t sdma_v2_4_is_idle +ffffffff820dbba0 t sdma_v2_4_wait_for_idle +ffffffff820dbc50 t sdma_v2_4_soft_reset +ffffffff820dbe00 t sdma_v2_4_set_clockgating_state +ffffffff820dbe30 t sdma_v2_4_set_powergating_state +ffffffff820dbe60 t sdma_v2_4_ring_get_rptr +ffffffff820dbea0 t sdma_v2_4_ring_get_wptr +ffffffff820dbf00 t sdma_v2_4_ring_set_wptr +ffffffff820dbf40 t sdma_v2_4_ring_emit_ib +ffffffff820dc220 t sdma_v2_4_ring_emit_fence +ffffffff820dc670 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff820dc920 t sdma_v2_4_ring_emit_vm_flush +ffffffff820dcbd0 t sdma_v2_4_ring_emit_hdp_flush +ffffffff820dce80 t sdma_v2_4_ring_test_ring +ffffffff820dd1b0 t sdma_v2_4_ring_test_ib +ffffffff820dd3c0 t sdma_v2_4_ring_insert_nop +ffffffff820dd500 t sdma_v2_4_ring_pad_ib +ffffffff820dd630 t sdma_v2_4_ring_emit_wreg +ffffffff820dd790 t sdma_v2_4_emit_copy_buffer +ffffffff820dd850 t sdma_v2_4_emit_fill_buffer +ffffffff820dd8e0 t sdma_v2_4_vm_copy_pte +ffffffff820dd9a0 t sdma_v2_4_vm_write_pte +ffffffff820dda70 t sdma_v2_4_vm_set_pte_pde +ffffffff820ddb70 t sdma_v2_4_set_trap_irq_state +ffffffff820ddc60 t sdma_v2_4_process_trap_irq +ffffffff820ddd00 t sdma_v2_4_process_illegal_inst_irq +ffffffff820ddd80 t sdma_v2_4_enable +ffffffff820de000 t sdma_v3_0_early_init +ffffffff820de100 t sdma_v3_0_sw_init +ffffffff820de530 t sdma_v3_0_sw_fini +ffffffff820de600 t sdma_v3_0_hw_init +ffffffff820de770 t sdma_v3_0_hw_fini +ffffffff820de7d0 t sdma_v3_0_suspend +ffffffff820de830 t sdma_v3_0_resume +ffffffff820de840 t sdma_v3_0_is_idle +ffffffff820de890 t sdma_v3_0_wait_for_idle +ffffffff820de940 t sdma_v3_0_check_soft_reset +ffffffff820de9a0 t sdma_v3_0_pre_soft_reset +ffffffff820dea00 t sdma_v3_0_soft_reset +ffffffff820deb00 t sdma_v3_0_post_soft_reset +ffffffff820deb50 t sdma_v3_0_set_clockgating_state +ffffffff820dee00 t sdma_v3_0_set_powergating_state +ffffffff820dee30 t sdma_v3_0_get_clockgating_state +ffffffff820deed0 t sdma_v3_0_ring_get_rptr +ffffffff820def10 t sdma_v3_0_ring_get_wptr +ffffffff820def90 t sdma_v3_0_ring_set_wptr +ffffffff820df040 t sdma_v3_0_ring_emit_ib +ffffffff820df320 t sdma_v3_0_ring_emit_fence +ffffffff820df770 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff820dfa20 t sdma_v3_0_ring_emit_vm_flush +ffffffff820dfcd0 t sdma_v3_0_ring_emit_hdp_flush +ffffffff820dff80 t sdma_v3_0_ring_test_ring +ffffffff820e02b0 t sdma_v3_0_ring_test_ib +ffffffff820e04c0 t sdma_v3_0_ring_insert_nop +ffffffff820e0600 t sdma_v3_0_ring_pad_ib +ffffffff820e0730 t sdma_v3_0_ring_emit_wreg +ffffffff820e0890 t sdma_v3_0_emit_copy_buffer +ffffffff820e0950 t sdma_v3_0_emit_fill_buffer +ffffffff820e09e0 t sdma_v3_0_vm_copy_pte +ffffffff820e0aa0 t sdma_v3_0_vm_write_pte +ffffffff820e0b70 t sdma_v3_0_vm_set_pte_pde +ffffffff820e0c70 t sdma_v3_0_set_trap_irq_state +ffffffff820e0d60 t sdma_v3_0_process_trap_irq +ffffffff820e0e00 t sdma_v3_0_process_illegal_inst_irq +ffffffff820e0e80 t sdma_v3_0_ctx_switch_enable +ffffffff820e1050 t sdma_v3_0_enable +ffffffff820e1200 t sdma_v3_0_gfx_resume +ffffffff820e2000 t sdma_v4_0_early_init +ffffffff820e22f0 t sdma_v4_0_late_init +ffffffff820e25b0 t sdma_v4_0_sw_init +ffffffff820e2a60 t sdma_v4_0_sw_fini +ffffffff820e2b30 t sdma_v4_0_hw_init +ffffffff820e5cf0 t sdma_v4_0_hw_fini +ffffffff820e5df0 t sdma_v4_0_suspend +ffffffff820e5e50 t sdma_v4_0_resume +ffffffff820e5ee0 t sdma_v4_0_is_idle +ffffffff820e6010 t sdma_v4_0_wait_for_idle +ffffffff820e61c0 t sdma_v4_0_soft_reset +ffffffff820e61f0 t sdma_v4_0_set_clockgating_state +ffffffff820e6720 t sdma_v4_0_set_powergating_state +ffffffff820e6800 t sdma_v4_0_get_clockgating_state +ffffffff820e68b0 t sdma_v4_0_query_ras_error_count +ffffffff820e6aa0 t sdma_v4_0_reset_ras_error_count +ffffffff820e6c20 t sdma_v4_0_ring_get_rptr +ffffffff820e6c80 t sdma_v4_0_ring_get_wptr +ffffffff820e6e90 t sdma_v4_0_ring_set_wptr +ffffffff820e7140 t sdma_v4_0_ring_emit_ib +ffffffff820e7420 t sdma_v4_0_ring_emit_fence +ffffffff820e7890 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff820e78f0 t sdma_v4_0_ring_emit_vm_flush +ffffffff820e7910 t sdma_v4_0_ring_emit_hdp_flush +ffffffff820e79d0 t sdma_v4_0_ring_test_ring +ffffffff820e7d00 t sdma_v4_0_ring_test_ib +ffffffff820e7f10 t sdma_v4_0_ring_insert_nop +ffffffff820e8050 t sdma_v4_0_ring_pad_ib +ffffffff820e8180 t sdma_v4_0_ring_emit_wreg +ffffffff820e82e0 t sdma_v4_0_ring_emit_reg_wait +ffffffff820e8330 t sdma_v4_0_wait_reg_mem +ffffffff820e8680 t sdma_v4_0_page_ring_get_wptr +ffffffff820e8840 t sdma_v4_0_page_ring_set_wptr +ffffffff820e8a10 t sdma_v4_0_emit_copy_buffer +ffffffff820e8ad0 t sdma_v4_0_emit_fill_buffer +ffffffff820e8b60 t sdma_v4_0_vm_copy_pte +ffffffff820e8c20 t sdma_v4_0_vm_write_pte +ffffffff820e8cf0 t sdma_v4_0_vm_set_pte_pde +ffffffff820e8df0 t sdma_v4_0_set_trap_irq_state +ffffffff820e8fa0 t sdma_v4_0_process_trap_irq +ffffffff820e9100 t sdma_v4_0_process_illegal_inst_irq +ffffffff820e9220 t sdma_v4_0_set_ecc_irq_state +ffffffff820e93d0 t sdma_v4_0_process_vm_hole_irq +ffffffff820e9420 t sdma_v4_0_print_iv_entry +ffffffff820e9570 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff820e95c0 t sdma_v4_0_process_pool_timeout_irq +ffffffff820e9610 t sdma_v4_0_process_srbm_write_irq +ffffffff820e9660 t sdma_v4_0_process_ras_data_cb +ffffffff820e96e0 t sdma_v4_0_ctx_switch_enable +ffffffff820e9e00 t sdma_v4_0_enable +ffffffff820ea3f0 t sdma_v4_0_gfx_enable +ffffffff820eb000 t sdma_v4_4_query_ras_error_count +ffffffff820eb2b0 t sdma_v4_4_reset_ras_error_count +ffffffff820ec000 t sdma_v4_4_2_early_init +ffffffff820ec2b0 t sdma_v4_4_2_late_init +ffffffff820ec340 t sdma_v4_4_2_sw_init +ffffffff820ec920 t sdma_v4_4_2_sw_fini +ffffffff820ec9f0 t sdma_v4_4_2_hw_init +ffffffff820eca40 t sdma_v4_4_2_hw_fini +ffffffff820ecb20 t sdma_v4_4_2_suspend +ffffffff820ecc30 t sdma_v4_4_2_resume +ffffffff820ecc80 t sdma_v4_4_2_is_idle +ffffffff820ecd30 t sdma_v4_4_2_wait_for_idle +ffffffff820ece60 t sdma_v4_4_2_soft_reset +ffffffff820ece90 t sdma_v4_4_2_set_clockgating_state +ffffffff820ed350 t sdma_v4_4_2_set_powergating_state +ffffffff820ed380 t sdma_v4_4_2_get_clockgating_state +ffffffff820ed480 t sdma_v4_4_2_xcp_suspend +ffffffff820ed570 t sdma_v4_4_2_xcp_resume +ffffffff820ed5b0 t sdma_v4_4_2_ring_get_rptr +ffffffff820ed630 t sdma_v4_4_2_ring_get_wptr +ffffffff820ed790 t sdma_v4_4_2_ring_set_wptr +ffffffff820ed990 t sdma_v4_4_2_ring_emit_ib +ffffffff820edc70 t sdma_v4_4_2_ring_emit_fence +ffffffff820ee0e0 t sdma_v4_4_2_ring_emit_pipeline_sync +ffffffff820ee140 t sdma_v4_4_2_ring_emit_vm_flush +ffffffff820ee160 t sdma_v4_4_2_ring_emit_hdp_flush +ffffffff820ee230 t sdma_v4_4_2_ring_test_ring +ffffffff820ee560 t sdma_v4_4_2_ring_test_ib +ffffffff820ee770 t sdma_v4_4_2_ring_insert_nop +ffffffff820ee8b0 t sdma_v4_4_2_ring_pad_ib +ffffffff820ee9e0 t sdma_v4_4_2_ring_emit_wreg +ffffffff820eeb40 t sdma_v4_4_2_ring_emit_reg_wait +ffffffff820eeb90 t sdma_v4_4_2_wait_reg_mem +ffffffff820eeee0 t sdma_v4_4_2_page_ring_get_wptr +ffffffff820ef000 t sdma_v4_4_2_page_ring_set_wptr +ffffffff820ef130 t sdma_v4_4_2_emit_copy_buffer +ffffffff820ef1f0 t sdma_v4_4_2_emit_fill_buffer +ffffffff820ef280 t sdma_v4_4_2_vm_copy_pte +ffffffff820ef340 t sdma_v4_4_2_vm_write_pte +ffffffff820ef410 t sdma_v4_4_2_vm_set_pte_pde +ffffffff820ef510 t sdma_v4_4_2_set_trap_irq_state +ffffffff820ef610 t sdma_v4_4_2_process_trap_irq +ffffffff820ef740 t sdma_v4_4_2_process_illegal_inst_irq +ffffffff820ef7e0 t sdma_v4_4_2_set_ecc_irq_state +ffffffff820ef8f0 t sdma_v4_4_2_process_vm_hole_irq +ffffffff820ef9e0 t sdma_v4_4_2_process_doorbell_invalid_irq +ffffffff820efad0 t sdma_v4_4_2_process_pool_timeout_irq +ffffffff820efbc0 t sdma_v4_4_2_process_srbm_write_irq +ffffffff820efcb0 t sdma_v4_4_2_query_ras_error_count +ffffffff820efe30 t sdma_v4_4_2_reset_ras_error_count +ffffffff820effa0 t sdma_v4_4_2_inst_init_golden_registers +ffffffff820f0170 t sdma_v4_4_2_inst_start +ffffffff820f19a0 t sdma_v4_4_2_inst_ctx_switch_enable +ffffffff820f1cf0 t sdma_v4_4_2_inst_enable +ffffffff820f3000 t sdma_v5_0_early_init +ffffffff820f3130 t sdma_v5_0_sw_init +ffffffff820f3350 t sdma_v5_0_sw_fini +ffffffff820f33f0 t sdma_v5_0_hw_init +ffffffff820f48c0 t sdma_v5_0_hw_fini +ffffffff820f4930 t sdma_v5_0_suspend +ffffffff820f49a0 t sdma_v5_0_resume +ffffffff820f49b0 t sdma_v5_0_is_idle +ffffffff820f4a50 t sdma_v5_0_wait_for_idle +ffffffff820f4b30 t sdma_v5_0_soft_reset +ffffffff820f4b60 t sdma_v5_0_set_clockgating_state +ffffffff820f4d80 t sdma_v5_0_set_powergating_state +ffffffff820f4db0 t sdma_v5_0_get_clockgating_state +ffffffff820f4e60 t sdma_v5_0_ring_get_rptr +ffffffff820f4ec0 t sdma_v5_0_ring_get_wptr +ffffffff820f5080 t sdma_v5_0_ring_set_wptr +ffffffff820f5430 t sdma_v5_0_ring_emit_ib +ffffffff820f5730 t sdma_v5_0_ring_emit_fence +ffffffff820f5be0 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff820f5e90 t sdma_v5_0_ring_emit_vm_flush +ffffffff820f5eb0 t sdma_v5_0_ring_emit_hdp_flush +ffffffff820f6180 t sdma_v5_0_ring_test_ring +ffffffff820f65b0 t sdma_v5_0_ring_test_ib +ffffffff820f6940 t sdma_v5_0_ring_insert_nop +ffffffff820f6a80 t sdma_v5_0_ring_pad_ib +ffffffff820f6bb0 t sdma_v5_0_ring_init_cond_exec +ffffffff820f6e00 t sdma_v5_0_ring_patch_cond_exec +ffffffff820f6ec0 t sdma_v5_0_ring_emit_wreg +ffffffff820f7020 t sdma_v5_0_ring_emit_reg_wait +ffffffff820f72c0 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff820f7350 t sdma_v5_0_ring_preempt_ib +ffffffff820f74e0 t sdma_v5_0_ring_emit_mem_sync +ffffffff820f7710 t sdma_v5_0_emit_copy_buffer +ffffffff820f77d0 t sdma_v5_0_emit_fill_buffer +ffffffff820f7860 t sdma_v5_0_vm_copy_pte +ffffffff820f7920 t sdma_v5_0_vm_write_pte +ffffffff820f79f0 t sdma_v5_0_vm_set_pte_pde +ffffffff820f7af0 t sdma_v5_0_set_trap_irq_state +ffffffff820f7b90 t sdma_v5_0_process_trap_irq +ffffffff820f7cd0 t sdma_v5_0_process_illegal_inst_irq +ffffffff820f7d00 t sdma_v5_0_mqd_init +ffffffff820f7df0 t sdma_v5_0_ctx_switch_enable +ffffffff820f8170 t sdma_v5_0_enable +ffffffff820f9000 t sdma_v5_2_early_init +ffffffff820f9130 t sdma_v5_2_sw_init +ffffffff820f93f0 t sdma_v5_2_sw_fini +ffffffff820f9490 t sdma_v5_2_hw_init +ffffffff820fb2c0 t sdma_v5_2_hw_fini +ffffffff820fb330 t sdma_v5_2_suspend +ffffffff820fb3a0 t sdma_v5_2_resume +ffffffff820fb3b0 t sdma_v5_2_is_idle +ffffffff820fb470 t sdma_v5_2_wait_for_idle +ffffffff820fb5a0 t sdma_v5_2_soft_reset +ffffffff820fb8c0 t sdma_v5_2_set_clockgating_state +ffffffff820fbc60 t sdma_v5_2_set_powergating_state +ffffffff820fbc90 t sdma_v5_2_get_clockgating_state +ffffffff820fbd40 t sdma_v5_2_ring_get_rptr +ffffffff820fbda0 t sdma_v5_2_ring_get_wptr +ffffffff820fbef0 t sdma_v5_2_ring_set_wptr +ffffffff820fc0d0 t sdma_v5_2_ring_emit_ib +ffffffff820fc3d0 t sdma_v5_2_ring_emit_fence +ffffffff820fc880 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff820fcb30 t sdma_v5_2_ring_emit_vm_flush +ffffffff820fcb50 t sdma_v5_2_ring_emit_hdp_flush +ffffffff820fce50 t sdma_v5_2_ring_test_ring +ffffffff820fd280 t sdma_v5_2_ring_test_ib +ffffffff820fd610 t sdma_v5_2_ring_insert_nop +ffffffff820fd750 t sdma_v5_2_ring_pad_ib +ffffffff820fd880 t sdma_v5_2_ring_init_cond_exec +ffffffff820fdad0 t sdma_v5_2_ring_patch_cond_exec +ffffffff820fdb90 t sdma_v5_2_ring_begin_use +ffffffff820fdbb0 t sdma_v5_2_ring_end_use +ffffffff820fdbd0 t sdma_v5_2_ring_emit_wreg +ffffffff820fdd30 t sdma_v5_2_ring_emit_reg_wait +ffffffff820fdfd0 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff820fe060 t sdma_v5_2_ring_preempt_ib +ffffffff820fe220 t sdma_v5_2_ring_emit_mem_sync +ffffffff820fe450 t sdma_v5_2_emit_copy_buffer +ffffffff820fe510 t sdma_v5_2_emit_fill_buffer +ffffffff820fe5a0 t sdma_v5_2_vm_copy_pte +ffffffff820fe660 t sdma_v5_2_vm_write_pte +ffffffff820fe730 t sdma_v5_2_vm_set_pte_pde +ffffffff820fe830 t sdma_v5_2_set_trap_irq_state +ffffffff820fe8f0 t sdma_v5_2_process_trap_irq +ffffffff820fea60 t sdma_v5_2_process_illegal_inst_irq +ffffffff820fea90 t sdma_v5_2_mqd_init +ffffffff820feb80 t sdma_v5_2_ctx_switch_enable +ffffffff820fefd0 t sdma_v5_2_enable +ffffffff82100000 t sdma_v6_0_early_init +ffffffff82100120 t sdma_v6_0_sw_init +ffffffff82100330 t sdma_v6_0_sw_fini +ffffffff821003d0 t sdma_v6_0_hw_init +ffffffff821003e0 t sdma_v6_0_hw_fini +ffffffff821004d0 t sdma_v6_0_suspend +ffffffff82100510 t sdma_v6_0_resume +ffffffff82100520 t sdma_v6_0_is_idle +ffffffff821005c0 t sdma_v6_0_wait_for_idle +ffffffff821006a0 t sdma_v6_0_check_soft_reset +ffffffff82100770 t sdma_v6_0_soft_reset +ffffffff82100cc0 t sdma_v6_0_set_clockgating_state +ffffffff82100cf0 t sdma_v6_0_set_powergating_state +ffffffff82100d20 t sdma_v6_0_get_clockgating_state +ffffffff82100d50 t sdma_v6_0_ring_get_rptr +ffffffff82100db0 t sdma_v6_0_ring_get_wptr +ffffffff82100e30 t sdma_v6_0_ring_set_wptr +ffffffff821011e0 t sdma_v6_0_ring_emit_ib +ffffffff821014e0 t sdma_v6_0_ring_emit_fence +ffffffff82101990 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff82101c40 t sdma_v6_0_ring_emit_vm_flush +ffffffff82101ee0 t sdma_v6_0_ring_emit_hdp_flush +ffffffff821021b0 t sdma_v6_0_ring_test_ring +ffffffff821025e0 t sdma_v6_0_ring_test_ib +ffffffff82102970 t sdma_v6_0_ring_insert_nop +ffffffff82102ab0 t sdma_v6_0_ring_pad_ib +ffffffff82102be0 t sdma_v6_0_ring_init_cond_exec +ffffffff82102e30 t sdma_v6_0_ring_patch_cond_exec +ffffffff82102ef0 t sdma_v6_0_ring_emit_wreg +ffffffff82103050 t sdma_v6_0_ring_emit_reg_wait +ffffffff821032f0 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff82103380 t sdma_v6_0_ring_preempt_ib +ffffffff82103510 t sdma_v6_0_ring_emit_mem_sync +ffffffff82103740 t sdma_v6_0_emit_copy_buffer +ffffffff82103800 t sdma_v6_0_emit_fill_buffer +ffffffff82103890 t sdma_v6_0_vm_copy_pte +ffffffff82103950 t sdma_v6_0_vm_write_pte +ffffffff82103a20 t sdma_v6_0_vm_set_pte_pde +ffffffff82103b20 t sdma_v6_0_set_trap_irq_state +ffffffff82103bc0 t sdma_v6_0_process_trap_irq +ffffffff82103d20 t sdma_v6_0_process_illegal_inst_irq +ffffffff82103d50 t sdma_v6_0_mqd_init +ffffffff82103e80 t sdma_v6_0_start +ffffffff821041e0 t sdma_v6_0_enable +ffffffff82104380 t sdma_v6_0_gfx_resume +ffffffff821055c0 t sdma_v6_0_gfx_stop +ffffffff82106000 T sienna_cichlid_reset_init +ffffffff821060e0 t sienna_cichlid_async_reset +ffffffff82106140 t sienna_cichlid_get_reset_handler +ffffffff821061d0 T sienna_cichlid_reset_fini +ffffffff82106230 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff821063a0 t sienna_cichlid_mode2_perform_reset +ffffffff82106430 t sienna_cichlid_mode2_restore_hwcontext +ffffffff821067a0 t sienna_cichlid_mode2_reset +ffffffff82107000 T smu_v11_0_i2c_control_init +ffffffff821070e0 T smu_v11_0_i2c_control_fini +ffffffff82107120 t smu_v11_0_i2c_xfer +ffffffff82108490 t smu_v11_0_i2c_func +ffffffff821084c0 t smu_v11_0_i2c_enable +ffffffff82108620 t smu_v11_0_i2c_abort +ffffffff82108740 t lock_bus +ffffffff821087f0 t trylock_bus +ffffffff82108850 t unlock_bus +ffffffff82109000 T smu_v13_0_10_reset_init +ffffffff821090e0 t smu_v13_0_10_async_reset +ffffffff82109140 t smu_v13_0_10_get_reset_handler +ffffffff821091f0 T smu_v13_0_10_reset_fini +ffffffff82109250 t smu_v13_0_10_mode2_prepare_hwcontext +ffffffff821093a0 t smu_v13_0_10_mode2_perform_reset +ffffffff82109430 t smu_v13_0_10_mode2_restore_hwcontext +ffffffff82109820 t smu_v13_0_10_mode2_reset +ffffffff8210a000 t smuio_v11_0_get_rom_index_offset +ffffffff8210a040 t smuio_v11_0_get_rom_data_offset +ffffffff8210a080 t smuio_v11_0_update_rom_clock_gating +ffffffff8210a1d0 t smuio_v11_0_get_clock_gating_state +ffffffff8210b000 t smuio_v11_0_6_get_rom_index_offset +ffffffff8210b040 t smuio_v11_0_6_get_rom_data_offset +ffffffff8210b080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff8210b1e0 t smuio_v11_0_6_get_clock_gating_state +ffffffff8210c000 t smuio_v13_0_get_rom_index_offset +ffffffff8210c040 t smuio_v13_0_get_rom_data_offset +ffffffff8210c080 t smuio_v13_0_update_rom_clock_gating +ffffffff8210c1e0 t smuio_v13_0_get_clock_gating_state +ffffffff8210c290 t smuio_v13_0_get_die_id +ffffffff8210c320 t smuio_v13_0_get_socket_id +ffffffff8210c3c0 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff8210d000 t smuio_v13_0_3_get_die_id +ffffffff8210d0a0 t smuio_v13_0_3_get_socket_id +ffffffff8210d140 t smuio_v13_0_3_get_pkg_type +ffffffff8210e000 t smuio_v13_0_6_get_rom_index_offset +ffffffff8210e040 t smuio_v13_0_6_get_rom_data_offset +ffffffff8210f000 t smuio_v9_0_get_rom_index_offset +ffffffff8210f040 t smuio_v9_0_get_rom_data_offset +ffffffff8210f080 t smuio_v9_0_update_rom_clock_gating +ffffffff8210f1e0 t smuio_v9_0_get_clock_gating_state +ffffffff82110000 T soc15_grbm_select +ffffffff82110090 T soc15_program_register_sequence +ffffffff821102b0 T soc15_set_virt_ops +ffffffff82110320 t soc15_common_early_init +ffffffff82110750 t soc15_common_late_init +ffffffff821107c0 t soc15_common_sw_init +ffffffff82110820 t soc15_common_sw_fini +ffffffff82110880 t soc15_common_hw_init +ffffffff821109d0 t soc15_common_hw_fini +ffffffff82110ad0 t soc15_common_suspend +ffffffff82110b10 t soc15_common_resume +ffffffff82110c00 t soc15_common_is_idle +ffffffff82110c30 t soc15_common_wait_for_idle +ffffffff82110c60 t soc15_common_soft_reset +ffffffff82110c90 t soc15_common_set_clockgating_state +ffffffff82111040 t soc15_common_set_powergating_state +ffffffff82111070 t soc15_common_get_clockgating_state +ffffffff821111b0 t soc15_uvd_ctx_rreg +ffffffff82111280 t soc15_uvd_ctx_wreg +ffffffff82111320 t soc15_didt_rreg +ffffffff821113e0 t soc15_didt_wreg +ffffffff82111480 t soc15_gc_cac_rreg +ffffffff821115d0 t soc15_gc_cac_wreg +ffffffff82111710 t soc15_se_cac_rreg +ffffffff82111860 t soc15_se_cac_wreg +ffffffff821119a0 t soc15_read_disabled_bios +ffffffff821119d0 t soc15_read_register +ffffffff82111ae0 t soc15_asic_reset +ffffffff82111cb0 t soc15_asic_reset_method +ffffffff82111e80 t soc15_get_xclk +ffffffff82111ef0 t soc15_set_uvd_clocks +ffffffff82111f20 t soc15_set_vce_clocks +ffffffff82111f50 t soc15_get_config_memsize +ffffffff82111f70 t soc15_need_full_reset +ffffffff82111fa0 t soc15_get_pcie_usage +ffffffff82112110 t soc15_need_reset_on_init +ffffffff821121d0 t soc15_get_pcie_replay_count +ffffffff82112250 t soc15_supports_baco +ffffffff821122c0 t soc15_pre_asic_init +ffffffff821122d0 t soc15_query_video_codecs +ffffffff821123c0 t vega20_get_pcie_usage +ffffffff82113000 T soc21_grbm_select +ffffffff82113090 t soc21_common_early_init +ffffffff82113210 t soc21_common_late_init +ffffffff82113310 t soc21_common_sw_init +ffffffff82113360 t soc21_common_sw_fini +ffffffff82113390 t soc21_common_hw_init +ffffffff82113470 t soc21_common_hw_fini +ffffffff82113520 t soc21_common_suspend +ffffffff821135d0 t soc21_common_resume +ffffffff821137e0 t soc21_common_is_idle +ffffffff82113810 t soc21_common_wait_for_idle +ffffffff82113840 t soc21_common_soft_reset +ffffffff82113870 t soc21_common_set_clockgating_state +ffffffff82113930 t soc21_common_set_powergating_state +ffffffff821139a0 t soc21_common_get_clockgating_state +ffffffff821139f0 t soc21_didt_rreg +ffffffff82113ab0 t soc21_didt_wreg +ffffffff82113b50 t soc21_read_disabled_bios +ffffffff82113b80 t soc21_read_register +ffffffff82113c80 t soc21_asic_reset +ffffffff82113d70 t soc21_asic_reset_method +ffffffff82113e50 t soc21_get_xclk +ffffffff82113e80 t soc21_set_uvd_clocks +ffffffff82113eb0 t soc21_set_vce_clocks +ffffffff82113ee0 t soc21_get_config_memsize +ffffffff82113f00 t soc21_need_full_reset +ffffffff82113f30 t soc21_init_doorbell_index +ffffffff82114050 t soc21_need_reset_on_init +ffffffff82114100 t soc21_pre_asic_init +ffffffff82114130 t soc21_update_umd_stable_pstate +ffffffff821141b0 t soc21_query_video_codecs +ffffffff82115000 t tonga_ih_early_init +ffffffff82115050 t tonga_ih_sw_init +ffffffff821150e0 t tonga_ih_sw_fini +ffffffff82115140 t tonga_ih_hw_init +ffffffff821153c0 t tonga_ih_hw_fini +ffffffff82115490 t tonga_ih_suspend +ffffffff82115560 t tonga_ih_resume +ffffffff821155a0 t tonga_ih_is_idle +ffffffff821155f0 t tonga_ih_wait_for_idle +ffffffff821156a0 t tonga_ih_check_soft_reset +ffffffff82115700 t tonga_ih_pre_soft_reset +ffffffff821157e0 t tonga_ih_soft_reset +ffffffff821158e0 t tonga_ih_post_soft_reset +ffffffff82115930 t tonga_ih_set_clockgating_state +ffffffff82115960 t tonga_ih_set_powergating_state +ffffffff82115990 t tonga_ih_get_wptr +ffffffff82115ac0 t tonga_ih_decode_iv +ffffffff82115b40 t tonga_ih_set_rptr +ffffffff82116000 t umc_v6_0_init_registers +ffffffff82117000 t umc_v6_1_query_ras_error_count +ffffffff821175c0 t umc_v6_1_query_ras_error_address +ffffffff821178f0 t umc_v6_1_err_cnt_init +ffffffff82118000 T umc_v6_7_convert_error_address +ffffffff821183a0 t umc_v6_7_query_ras_error_count +ffffffff821183e0 t umc_v6_7_query_ras_error_address +ffffffff82118400 t umc_v6_7_query_ras_poison_mode +ffffffff82118460 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff82118480 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff821184a0 t umc_v6_7_query_ecc_error_count +ffffffff821187a0 t umc_v6_7_reset_error_count_per_channel +ffffffff821188e0 t umc_v6_7_query_error_address +ffffffff82118a10 t umc_v6_7_ecc_info_querry_ecc_error_count +ffffffff82118c20 t umc_v6_7_ecc_info_query_error_address +ffffffff82119000 t umc_v8_10_query_ras_error_count +ffffffff82119040 t umc_v8_10_query_ras_error_address +ffffffff82119060 t umc_v8_10_err_cnt_init +ffffffff82119080 t umc_v8_10_query_ras_poison_mode +ffffffff821190b0 t umc_v8_10_ecc_info_query_ras_error_count +ffffffff821190d0 t umc_v8_10_ecc_info_query_ras_error_address +ffffffff821190f0 t umc_v8_10_set_eeprom_table_version +ffffffff82119120 t umc_v8_10_query_ecc_error_count +ffffffff82119200 t umc_v8_10_clear_error_count_per_channel +ffffffff82119270 t umc_v8_10_query_error_address +ffffffff821193b0 t umc_v8_10_convert_error_address +ffffffff821195e0 t umc_v8_10_err_cnt_init_per_channel +ffffffff821196b0 t umc_v8_10_ecc_info_query_ecc_error_count +ffffffff821197a0 t umc_v8_10_ecc_info_query_error_address +ffffffff8211a000 t umc_v8_7_query_ras_error_count +ffffffff8211a370 t umc_v8_7_query_ras_error_address +ffffffff8211a540 t umc_v8_7_err_cnt_init +ffffffff8211a6d0 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff8211a800 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff8211b000 t uvd_v5_0_early_init +ffffffff8211b050 t uvd_v5_0_sw_init +ffffffff8211b170 t uvd_v5_0_sw_fini +ffffffff8211b1d0 t uvd_v5_0_hw_init +ffffffff8211b780 t uvd_v5_0_hw_fini +ffffffff8211b810 t uvd_v5_0_suspend +ffffffff8211b950 t uvd_v5_0_resume +ffffffff8211b9b0 t uvd_v5_0_is_idle +ffffffff8211ba00 t uvd_v5_0_wait_for_idle +ffffffff8211ba90 t uvd_v5_0_soft_reset +ffffffff8211bb80 t uvd_v5_0_set_clockgating_state +ffffffff8211bd80 t uvd_v5_0_set_powergating_state +ffffffff8211bdd0 t uvd_v5_0_get_clockgating_state +ffffffff8211be70 t uvd_v5_0_ring_get_rptr +ffffffff8211bec0 t uvd_v5_0_ring_get_wptr +ffffffff8211bf10 t uvd_v5_0_ring_set_wptr +ffffffff8211bf40 t uvd_v5_0_ring_emit_ib +ffffffff8211c1e0 t uvd_v5_0_ring_emit_fence +ffffffff8211c800 t uvd_v5_0_ring_test_ring +ffffffff8211c9d0 t uvd_v5_0_ring_insert_nop +ffffffff8211cb30 t uvd_v5_0_set_interrupt_state +ffffffff8211cb60 t uvd_v5_0_process_interrupt +ffffffff8211cbd0 t uvd_v5_0_stop +ffffffff8211cd50 t uvd_v5_0_start +ffffffff8211e000 t uvd_v6_0_early_init +ffffffff8211e190 t uvd_v6_0_sw_init +ffffffff8211e450 t uvd_v6_0_sw_fini +ffffffff8211e520 t uvd_v6_0_hw_init +ffffffff8211eb90 t uvd_v6_0_hw_fini +ffffffff8211ec20 t uvd_v6_0_suspend +ffffffff8211ed60 t uvd_v6_0_resume +ffffffff8211edc0 t uvd_v6_0_is_idle +ffffffff8211ee10 t uvd_v6_0_wait_for_idle +ffffffff8211eea0 t uvd_v6_0_check_soft_reset +ffffffff8211ef30 t uvd_v6_0_pre_soft_reset +ffffffff8211ef80 t uvd_v6_0_soft_reset +ffffffff8211f080 t uvd_v6_0_post_soft_reset +ffffffff8211f150 t uvd_v6_0_set_clockgating_state +ffffffff8211f340 t uvd_v6_0_set_powergating_state +ffffffff8211f3c0 t uvd_v6_0_get_clockgating_state +ffffffff8211f470 t uvd_v6_0_ring_get_rptr +ffffffff8211f4c0 t uvd_v6_0_ring_get_wptr +ffffffff8211f510 t uvd_v6_0_ring_set_wptr +ffffffff8211f540 t uvd_v6_0_ring_emit_ib +ffffffff8211f8e0 t uvd_v6_0_ring_emit_fence +ffffffff8211ff00 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff82120340 t uvd_v6_0_ring_emit_vm_flush +ffffffff821206e0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff82120710 t uvd_v6_0_ring_test_ring +ffffffff821208e0 t uvd_v6_0_ring_insert_nop +ffffffff82120a40 t uvd_v6_0_ring_emit_wreg +ffffffff82120cf0 t uvd_v6_0_enc_ring_get_rptr +ffffffff82120d50 t uvd_v6_0_enc_ring_get_wptr +ffffffff82120db0 t uvd_v6_0_enc_ring_set_wptr +ffffffff82120df0 t uvd_v6_0_enc_ring_emit_ib +ffffffff82121060 t uvd_v6_0_enc_ring_emit_fence +ffffffff821212c0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff82121490 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff821216c0 t uvd_v6_0_enc_ring_test_ring +ffffffff82121830 t uvd_v6_0_enc_ring_test_ib +ffffffff82121d90 t uvd_v6_0_enc_ring_insert_end +ffffffff82121e20 t uvd_v6_0_set_interrupt_state +ffffffff82121e50 t uvd_v6_0_process_interrupt +ffffffff82121f50 t uvd_v6_0_stop +ffffffff821220d0 t uvd_v6_0_start +ffffffff82123000 t uvd_v7_0_early_init +ffffffff82123290 t uvd_v7_0_sw_init +ffffffff82123720 t uvd_v7_0_sw_fini +ffffffff82123830 t uvd_v7_0_hw_init +ffffffff82126d00 t uvd_v7_0_hw_fini +ffffffff821270b0 t uvd_v7_0_suspend +ffffffff82127190 t uvd_v7_0_resume +ffffffff821271f0 t uvd_v7_0_set_clockgating_state +ffffffff82127220 t uvd_v7_0_ring_get_rptr +ffffffff821272c0 t uvd_v7_0_ring_get_wptr +ffffffff82127360 t uvd_v7_0_ring_set_wptr +ffffffff821273e0 t uvd_v7_0_ring_patch_cs_in_place +ffffffff82127450 t uvd_v7_0_ring_emit_ib +ffffffff82127840 t uvd_v7_0_ring_emit_fence +ffffffff82127f00 t uvd_v7_0_ring_emit_vm_flush +ffffffff82127f70 t uvd_v7_0_ring_emit_hdp_flush +ffffffff82127fa0 t uvd_v7_0_ring_test_ring +ffffffff82128270 t uvd_v7_0_ring_insert_nop +ffffffff82128410 t uvd_v7_0_ring_emit_wreg +ffffffff82128700 t uvd_v7_0_ring_emit_reg_wait +ffffffff82128ae0 t uvd_v7_0_enc_ring_get_rptr +ffffffff82128be0 t uvd_v7_0_enc_ring_get_wptr +ffffffff82128cf0 t uvd_v7_0_enc_ring_set_wptr +ffffffff82128df0 t uvd_v7_0_enc_ring_emit_ib +ffffffff82129060 t uvd_v7_0_enc_ring_emit_fence +ffffffff821292c0 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff82129330 t uvd_v7_0_enc_ring_test_ring +ffffffff821294b0 t uvd_v7_0_enc_ring_test_ib +ffffffff82129a10 t uvd_v7_0_enc_ring_insert_end +ffffffff82129aa0 t uvd_v7_0_enc_ring_emit_wreg +ffffffff82129c00 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff82129dd0 t uvd_v7_0_set_interrupt_state +ffffffff82129e00 t uvd_v7_0_process_interrupt +ffffffff8212a000 t vce_v3_0_early_init +ffffffff8212a1a0 t vce_v3_0_sw_init +ffffffff8212a340 t vce_v3_0_sw_fini +ffffffff8212a3a0 t vce_v3_0_hw_init +ffffffff8212a4a0 t vce_v3_0_hw_fini +ffffffff8212a5a0 t vce_v3_0_suspend +ffffffff8212a6b0 t vce_v3_0_resume +ffffffff8212a7d0 t vce_v3_0_is_idle +ffffffff8212a840 t vce_v3_0_wait_for_idle +ffffffff8212a900 t vce_v3_0_check_soft_reset +ffffffff8212aa30 t vce_v3_0_pre_soft_reset +ffffffff8212ab00 t vce_v3_0_soft_reset +ffffffff8212ac00 t vce_v3_0_post_soft_reset +ffffffff8212acd0 t vce_v3_0_set_clockgating_state +ffffffff8212b0b0 t vce_v3_0_set_powergating_state +ffffffff8212bc00 t vce_v3_0_get_clockgating_state +ffffffff8212bcf0 t vce_v3_0_ring_get_rptr +ffffffff8212bde0 t vce_v3_0_ring_get_wptr +ffffffff8212bed0 t vce_v3_0_ring_set_wptr +ffffffff8212bfa0 t vce_v3_0_ring_emit_ib +ffffffff8212c210 t vce_v3_0_emit_pipeline_sync +ffffffff8212c3e0 t vce_v3_0_emit_vm_flush +ffffffff8212c680 t vce_v3_0_set_interrupt_state +ffffffff8212c700 t vce_v3_0_process_interrupt +ffffffff8212c7e0 t vce_v3_0_stop +ffffffff8212d000 t vce_v4_0_early_init +ffffffff8212d0c0 t vce_v4_0_sw_init +ffffffff8212d3d0 t vce_v4_0_sw_fini +ffffffff8212d470 t vce_v4_0_hw_init +ffffffff8212dcc0 t vce_v4_0_hw_fini +ffffffff8212de30 t vce_v4_0_suspend +ffffffff8212dfa0 t vce_v4_0_resume +ffffffff8212e070 t vce_v4_0_set_clockgating_state +ffffffff8212e0a0 t vce_v4_0_set_powergating_state +ffffffff8212e1b0 t vce_v4_0_ring_get_rptr +ffffffff8212e220 t vce_v4_0_ring_get_wptr +ffffffff8212e2b0 t vce_v4_0_ring_set_wptr +ffffffff8212e340 t vce_v4_0_ring_emit_ib +ffffffff8212e5b0 t vce_v4_0_ring_emit_fence +ffffffff8212e810 t vce_v4_0_emit_vm_flush +ffffffff8212e880 t vce_v4_0_ring_insert_end +ffffffff8212e910 t vce_v4_0_emit_wreg +ffffffff8212ea70 t vce_v4_0_emit_reg_wait +ffffffff8212ec40 t vce_v4_0_set_interrupt_state +ffffffff8212ecd0 t vce_v4_0_process_interrupt +ffffffff8212ed80 t vce_v4_0_start +ffffffff82130000 T vcn_dec_sw_ring_emit_fence +ffffffff82130260 T vcn_dec_sw_ring_insert_end +ffffffff821302f0 T vcn_dec_sw_ring_emit_ib +ffffffff82130560 T vcn_dec_sw_ring_emit_reg_wait +ffffffff82130730 T vcn_dec_sw_ring_emit_vm_flush +ffffffff821307a0 T vcn_dec_sw_ring_emit_wreg +ffffffff82131000 T vcn_v1_0_set_pg_for_begin_use +ffffffff82131160 T vcn_v1_0_ring_end_use +ffffffff821311d0 t vcn_v1_0_early_init +ffffffff82131340 t vcn_v1_0_sw_init +ffffffff82131640 t vcn_v1_0_sw_fini +ffffffff821316b0 t vcn_v1_0_hw_init +ffffffff821317b0 t vcn_v1_0_hw_fini +ffffffff821318d0 t vcn_v1_0_suspend +ffffffff82131960 t vcn_v1_0_resume +ffffffff82131a80 t vcn_v1_0_is_idle +ffffffff82131b20 t vcn_v1_0_wait_for_idle +ffffffff82131b60 t vcn_v1_0_set_clockgating_state +ffffffff82131c30 t vcn_v1_0_set_powergating_state +ffffffff821322a0 t vcn_v1_0_dec_ring_get_rptr +ffffffff82132330 t vcn_v1_0_dec_ring_get_wptr +ffffffff821323c0 t vcn_v1_0_dec_ring_set_wptr +ffffffff821324e0 t vcn_v1_0_ring_patch_cs_in_place +ffffffff821326d0 t vcn_v1_0_dec_ring_emit_ib +ffffffff82132aa0 t vcn_v1_0_dec_ring_emit_fence +ffffffff82133130 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff821331a0 t vcn_v1_0_dec_ring_insert_nop +ffffffff82133340 t vcn_v1_0_dec_ring_insert_start +ffffffff82133530 t vcn_v1_0_dec_ring_insert_end +ffffffff82133640 t vcn_v1_0_ring_begin_use +ffffffff82133700 t vcn_v1_0_dec_ring_emit_wreg +ffffffff821339e0 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff82133da0 t vcn_v1_0_enc_ring_get_rptr +ffffffff82133e80 t vcn_v1_0_enc_ring_get_wptr +ffffffff82133f60 t vcn_v1_0_enc_ring_set_wptr +ffffffff82134020 t vcn_v1_0_enc_ring_emit_ib +ffffffff82134290 t vcn_v1_0_enc_ring_emit_fence +ffffffff821344f0 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff82134560 t vcn_v1_0_enc_ring_insert_end +ffffffff821345f0 t vcn_v1_0_enc_ring_emit_wreg +ffffffff82134750 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff82134920 t vcn_v1_0_set_interrupt_state +ffffffff82134950 t vcn_v1_0_process_interrupt +ffffffff82134a10 t vcn_v1_0_idle_work_handler +ffffffff82134bc0 t vcn_v1_0_pause_dpg_mode +ffffffff82135c90 t vcn_v1_0_enable_clock_gating +ffffffff82136130 t vcn_v1_0_disable_clock_gating +ffffffff82136790 t vcn_1_0_enable_static_power_gating +ffffffff82136960 t vcn_v1_0_start_dpg_mode +ffffffff8213b190 t vcn_v1_0_start_spg_mode +ffffffff8213d9f0 t vcn_v1_0_clock_gating_dpg_mode +ffffffff8213f000 T vcn_v2_0_dec_ring_insert_start +ffffffff8213f1d0 T vcn_v2_0_dec_ring_insert_end +ffffffff8213f2d0 T vcn_v2_0_dec_ring_insert_nop +ffffffff8213f450 T vcn_v2_0_dec_ring_emit_fence +ffffffff8213fa80 T vcn_v2_0_dec_ring_emit_ib +ffffffff8213fe20 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff821401b0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff82140220 T vcn_v2_0_dec_ring_emit_wreg +ffffffff821404d0 T vcn_v2_0_enc_ring_emit_fence +ffffffff82140730 T vcn_v2_0_enc_ring_insert_end +ffffffff821407c0 T vcn_v2_0_enc_ring_emit_ib +ffffffff82140a30 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff82140c00 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff82140c70 T vcn_v2_0_enc_ring_emit_wreg +ffffffff82140dd0 T vcn_v2_0_dec_ring_test_ring +ffffffff821410b0 t vcn_v2_0_early_init +ffffffff82141220 t vcn_v2_0_sw_init +ffffffff821415c0 t vcn_v2_0_sw_fini +ffffffff82141670 t vcn_v2_0_hw_init +ffffffff821420b0 t vcn_v2_0_hw_fini +ffffffff821421d0 t vcn_v2_0_suspend +ffffffff82142200 t vcn_v2_0_resume +ffffffff82142260 t vcn_v2_0_is_idle +ffffffff82142300 t vcn_v2_0_wait_for_idle +ffffffff82142340 t vcn_v2_0_set_clockgating_state +ffffffff821423f0 t vcn_v2_0_set_powergating_state +ffffffff82142ab0 t vcn_v2_0_dec_ring_get_rptr +ffffffff82142b40 t vcn_v2_0_dec_ring_get_wptr +ffffffff82142bf0 t vcn_v2_0_dec_ring_set_wptr +ffffffff82142d30 t vcn_v2_0_enc_ring_get_rptr +ffffffff82142e10 t vcn_v2_0_enc_ring_get_wptr +ffffffff82142f10 t vcn_v2_0_enc_ring_set_wptr +ffffffff82143000 t vcn_v2_0_set_interrupt_state +ffffffff82143030 t vcn_v2_0_process_interrupt +ffffffff821430f0 t vcn_v2_0_pause_dpg_mode +ffffffff821439c0 t vcn_v2_0_enable_clock_gating +ffffffff82143c80 t vcn_v2_0_disable_clock_gating +ffffffff82144110 t vcn_v2_0_start +ffffffff821490e0 t vcn_v2_0_enable_static_power_gating +ffffffff82149260 t vcn_v2_0_clock_gating_dpg_mode +ffffffff8214a140 t vcn_v2_0_mc_resume_dpg_mode +ffffffff8214f000 t vcn_v2_6_query_poison_status +ffffffff8214f0e0 t vcn_v2_5_early_init +ffffffff8214f3e0 t vcn_v2_5_sw_init +ffffffff8214f930 t vcn_v2_5_sw_fini +ffffffff8214fa20 t vcn_v2_5_hw_init +ffffffff82150530 t vcn_v2_5_hw_fini +ffffffff821506e0 t vcn_v2_5_suspend +ffffffff82150710 t vcn_v2_5_resume +ffffffff82150770 t vcn_v2_5_is_idle +ffffffff82150870 t vcn_v2_5_wait_for_idle +ffffffff82150920 t vcn_v2_5_set_clockgating_state +ffffffff821509b0 t vcn_v2_5_set_powergating_state +ffffffff821531b0 t vcn_v2_5_dec_ring_get_rptr +ffffffff82153250 t vcn_v2_5_dec_ring_get_wptr +ffffffff82153310 t vcn_v2_5_dec_ring_set_wptr +ffffffff821533c0 t vcn_v2_5_enc_ring_get_rptr +ffffffff821534c0 t vcn_v2_5_enc_ring_get_wptr +ffffffff821535d0 t vcn_v2_5_enc_ring_set_wptr +ffffffff821536e0 t vcn_v2_5_set_interrupt_state +ffffffff82153710 t vcn_v2_5_process_interrupt +ffffffff82153830 t vcn_v2_6_set_ras_interrupt_state +ffffffff82153860 t vcn_v2_5_pause_dpg_mode +ffffffff821540a0 t vcn_v2_5_enable_clock_gating +ffffffff82154400 t vcn_v2_5_disable_clock_gating +ffffffff82154970 t vcn_v2_5_start_dpg_mode +ffffffff82158910 t vcn_v2_5_clock_gating_dpg_mode +ffffffff82159820 t vcn_v2_5_mc_resume_dpg_mode +ffffffff8215f000 t vcn_v3_0_early_init +ffffffff8215f230 t vcn_v3_0_sw_init +ffffffff8215f750 t vcn_v3_0_sw_fini +ffffffff8215f850 t vcn_v3_0_hw_init +ffffffff82160470 t vcn_v3_0_hw_fini +ffffffff82160590 t vcn_v3_0_suspend +ffffffff821605c0 t vcn_v3_0_resume +ffffffff82160620 t vcn_v3_0_is_idle +ffffffff82160720 t vcn_v3_0_wait_for_idle +ffffffff821607d0 t vcn_v3_0_set_clockgating_state +ffffffff821608f0 t vcn_v3_0_set_powergating_state +ffffffff821634e0 t vcn_v3_0_dec_ring_get_rptr +ffffffff82163580 t vcn_v3_0_dec_ring_get_wptr +ffffffff82163640 t vcn_v3_0_dec_ring_set_wptr +ffffffff821637b0 t vcn_v3_0_ring_patch_cs_in_place +ffffffff82163b30 t vcn_v3_0_enc_ring_get_rptr +ffffffff82163c30 t vcn_v3_0_enc_ring_get_wptr +ffffffff82163d40 t vcn_v3_0_enc_ring_set_wptr +ffffffff82163e50 t vcn_v3_0_set_interrupt_state +ffffffff82163e80 t vcn_v3_0_process_interrupt +ffffffff82163fa0 t vcn_v3_0_pause_dpg_mode +ffffffff821648c0 t vcn_v3_0_enable_clock_gating +ffffffff82164b90 t vcn_v3_0_disable_clock_gating +ffffffff82165150 t vcn_v3_0_start_dpg_mode +ffffffff82168960 t vcn_v3_0_clock_gating_dpg_mode +ffffffff821698a0 t vcn_v3_0_mc_resume_dpg_mode +ffffffff8216f000 t vcn_v4_0_query_ras_poison_status +ffffffff8216f0e0 t vcn_v4_0_early_init +ffffffff8216f2b0 t vcn_v4_0_sw_init +ffffffff8216f5b0 t vcn_v4_0_sw_fini +ffffffff8216f6b0 t vcn_v4_0_hw_init +ffffffff821701a0 t vcn_v4_0_hw_fini +ffffffff82170310 t vcn_v4_0_suspend +ffffffff82170340 t vcn_v4_0_resume +ffffffff821703a0 t vcn_v4_0_is_idle +ffffffff821704b0 t vcn_v4_0_wait_for_idle +ffffffff82170570 t vcn_v4_0_set_clockgating_state +ffffffff821706a0 t vcn_v4_0_set_powergating_state +ffffffff82171010 t vcn_v4_0_unified_ring_get_rptr +ffffffff821710f0 t vcn_v4_0_unified_ring_get_wptr +ffffffff821711f0 t vcn_v4_0_unified_ring_set_wptr +ffffffff821712f0 t vcn_v4_0_ring_patch_cs_in_place +ffffffff821716e0 t vcn_v4_0_limit_sched +ffffffff82171750 t vcn_v4_0_set_interrupt_state +ffffffff82171780 t vcn_v4_0_process_interrupt +ffffffff82171850 t vcn_v4_0_set_ras_interrupt_state +ffffffff82171880 t vcn_v4_0_pause_dpg_mode +ffffffff82171b40 t vcn_v4_0_enable_clock_gating +ffffffff82171e70 t vcn_v4_0_disable_clock_gating +ffffffff821723b0 t vcn_v4_0_start +ffffffff82177940 t vcn_v4_0_disable_clock_gating_dpg_mode +ffffffff82178880 t vcn_v4_0_mc_resume_dpg_mode +ffffffff8217e000 t vcn_v4_0_3_early_init +ffffffff8217e110 t vcn_v4_0_3_sw_init +ffffffff8217e410 t vcn_v4_0_3_sw_fini +ffffffff8217e4e0 t vcn_v4_0_3_hw_init +ffffffff8217f2f0 t vcn_v4_0_3_hw_fini +ffffffff8217f390 t vcn_v4_0_3_suspend +ffffffff8217f410 t vcn_v4_0_3_resume +ffffffff8217f470 t vcn_v4_0_3_is_idle +ffffffff8217f610 t vcn_v4_0_3_wait_for_idle +ffffffff8217f730 t vcn_v4_0_3_set_clockgating_state +ffffffff8217f900 t vcn_v4_0_3_set_powergating_state +ffffffff821800d0 t vcn_v4_0_3_unified_ring_get_rptr +ffffffff82180270 t vcn_v4_0_3_unified_ring_get_wptr +ffffffff82180430 t vcn_v4_0_3_unified_ring_set_wptr +ffffffff82180600 t vcn_v4_0_3_set_interrupt_state +ffffffff82180630 t vcn_v4_0_3_process_interrupt +ffffffff82180770 t vcn_v4_0_3_query_ras_error_count +ffffffff82180890 t vcn_v4_0_3_reset_ras_error_count +ffffffff821809a0 t vcn_v4_0_3_pause_dpg_mode +ffffffff821809d0 t vcn_v4_0_3_enable_clock_gating +ffffffff82180d30 t vcn_v4_0_3_disable_clock_gating +ffffffff821812a0 t vcn_v4_0_3_start +ffffffff82186360 t vcn_v4_0_3_disable_clock_gating_dpg_mode +ffffffff82187270 t vcn_v4_0_3_mc_resume_dpg_mode +ffffffff8218d000 t vega10_ih_early_init +ffffffff8218d050 t vega10_ih_sw_init +ffffffff8218d330 t vega10_ih_sw_fini +ffffffff8218d370 t vega10_ih_hw_init +ffffffff8218d780 t vega10_ih_hw_fini +ffffffff8218d7e0 t vega10_ih_suspend +ffffffff8218d840 t vega10_ih_resume +ffffffff8218d850 t vega10_ih_is_idle +ffffffff8218d880 t vega10_ih_wait_for_idle +ffffffff8218d8b0 t vega10_ih_soft_reset +ffffffff8218d8e0 t vega10_ih_set_clockgating_state +ffffffff8218da40 t vega10_ih_set_powergating_state +ffffffff8218da70 t vega10_ih_get_wptr +ffffffff8218dbd0 t vega10_ih_set_rptr +ffffffff8218dcc0 t vega10_ih_self_irq +ffffffff8218dd40 t vega10_ih_toggle_interrupts +ffffffff8218e000 T vega10_reg_base_init +ffffffff8218e150 T vega10_doorbell_index_init +ffffffff8218f000 t vega20_ih_early_init +ffffffff8218f050 t vega20_ih_sw_init +ffffffff8218f360 t vega20_ih_sw_fini +ffffffff8218f3a0 t vega20_ih_hw_init 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vi_common_suspend +ffffffff821933a0 t vi_common_resume +ffffffff821933e0 t vi_common_is_idle +ffffffff82193410 t vi_common_wait_for_idle +ffffffff82193440 t vi_common_soft_reset +ffffffff82193470 t vi_common_set_clockgating_state +ffffffff82193a70 t vi_common_set_powergating_state +ffffffff82193aa0 t vi_common_get_clockgating_state +ffffffff82193b90 t cz_smc_rreg +ffffffff82193c30 t cz_smc_wreg +ffffffff82193cb0 t vi_smc_rreg +ffffffff82193d60 t vi_smc_wreg +ffffffff82193df0 t vi_pcie_rreg +ffffffff82193eb0 t vi_pcie_wreg +ffffffff82193f70 t vi_uvd_ctx_rreg +ffffffff82194020 t vi_uvd_ctx_wreg +ffffffff821940b0 t vi_didt_rreg +ffffffff82194150 t vi_didt_wreg +ffffffff821941d0 t vi_gc_cac_rreg +ffffffff82194270 t vi_gc_cac_wreg +ffffffff821942f0 t vi_read_disabled_bios +ffffffff82194530 t vi_read_bios_from_rom +ffffffff82194660 t vi_read_register +ffffffff82194940 t vi_asic_reset +ffffffff82194ae0 t vi_asic_reset_method +ffffffff82194ba0 t vi_get_xclk +ffffffff82194c60 t vi_set_uvd_clocks +ffffffff82194d20 t vi_set_vce_clocks +ffffffff821950a0 t vi_get_config_memsize +ffffffff821950c0 t vi_flush_hdp +ffffffff82195140 t vi_invalidate_hdp +ffffffff821951c0 t vi_need_full_reset +ffffffff82195210 t vi_get_pcie_usage +ffffffff82195370 t vi_need_reset_on_init +ffffffff82195410 t vi_get_pcie_replay_count +ffffffff82195490 t vi_asic_supports_baco +ffffffff821954e0 t vi_pre_asic_init +ffffffff82195510 t vi_query_video_codecs +ffffffff821955b0 t vi_set_uvd_clock +ffffffff82196000 T amdgpu_xcp_drm_dev_alloc +ffffffff82196060 T amdgpu_xcp_drv_release +ffffffff82197000 T amdgpu_dm_find_first_crtc_matching_connector +ffffffff82197070 T amdgpu_dm_update_connector_after_detect +ffffffff82197680 T amdgpu_dm_update_freesync_caps +ffffffff82197c40 T dm_atomic_get_state +ffffffff82197cb0 T amdgpu_dm_connector_atomic_set_property +ffffffff82197d70 T amdgpu_dm_connector_atomic_get_property +ffffffff82197e10 T amdgpu_dm_connector_funcs_reset +ffffffff82197f10 T amdgpu_dm_connector_atomic_duplicate_state +ffffffff82198020 T create_validate_stream_for_sink +ffffffff821999b0 T amdgpu_dm_connector_mode_valid +ffffffff82199bb0 T convert_dc_color_depth_into_bpc +ffffffff82199bf0 t dm_encoder_helper_disable +ffffffff82199c20 t dm_encoder_helper_atomic_check +ffffffff82199e30 T amdgpu_dm_connector_init_helper +ffffffff8219a220 T amdgpu_dm_get_encoder_crtc_mask +ffffffff8219a270 T dm_restore_drm_connector_state +ffffffff8219a400 t parse_hdmi_amd_vsdb +ffffffff8219a7b0 T amdgpu_dm_trigger_timing_sync +ffffffff8219a990 T dm_write_reg_func +ffffffff8219a9b0 T dm_read_reg_func +ffffffff8219aa60 T amdgpu_dm_process_dmub_aux_transfer_sync +ffffffff8219acd0 T amdgpu_dm_process_dmub_set_config_sync +ffffffff8219ae70 T check_seamless_boot_capability +ffffffff8219aec0 T dm_execute_dmub_cmd +ffffffff8219aee0 T dm_execute_dmub_cmd_list +ffffffff8219af00 t dm_early_init +ffffffff8219b2d0 t dm_late_init +ffffffff8219b5d0 t dm_sw_init +ffffffff8219bbf0 t dm_sw_fini +ffffffff8219bcc0 t amdgpu_dm_early_fini +ffffffff8219bd20 t dm_hw_init +ffffffff8219dd50 t dm_hw_fini +ffffffff8219ddc0 t dm_suspend +ffffffff8219e200 t dm_resume +ffffffff8219ec60 t dm_is_idle +ffffffff8219ec90 t dm_wait_for_idle +ffffffff8219ecc0 t dm_check_soft_reset +ffffffff8219ecf0 t dm_soft_reset +ffffffff8219ed20 t dm_set_clockgating_state +ffffffff8219ed50 t dm_set_powergating_state +ffffffff8219ed80 t dm_bandwidth_update +ffffffff8219edb0 t dm_vblank_get_counter +ffffffff8219ee30 t dm_crtc_get_scanoutpos +ffffffff8219ef20 t amdgpu_dm_dmub_reg_read +ffffffff8219efd0 t amdgpu_dm_dmub_reg_write +ffffffff8219f000 t dm_dmub_hw_init +ffffffff8219f460 t dmub_aux_setconfig_callback +ffffffff8219f510 t amdgpu_dm_fini +ffffffff8219f760 t emulated_link_detect +ffffffff8219f870 t amdgpu_dm_atomic_check +ffffffff821a0760 t dm_update_plane_state +ffffffff821a0e10 t dm_update_crtc_state +ffffffff821a1900 t dm_check_crtc_cursor +ffffffff821a1c80 t is_scaling_state_different +ffffffff821a1d20 t do_aquire_global_lock +ffffffff821a1ff0 t dm_update_mst_vcpi_slots_for_dsc +ffffffff821a2200 t dm_atomic_destroy_state +ffffffff821a2240 t dm_check_cursor_fb +ffffffff821a23f0 t fill_dc_plane_attributes +ffffffff821a26a0 t fill_dc_plane_info_and_addr +ffffffff821a29f0 t fill_hdr_info_packet +ffffffff821a2b60 t is_timing_unchanged_for_freesync +ffffffff821a2c90 t get_highest_refresh_rate_mode +ffffffff821a2df0 t update_stream_scaling_settings +ffffffff821a2f40 t amdgpu_dm_atomic_commit_tail +ffffffff821a6100 t amdgpu_dm_backlight_set_level +ffffffff821a6350 t dm_atomic_duplicate_state +ffffffff821a6410 t amdgpu_dm_audio_component_bind +ffffffff821a6480 t amdgpu_dm_audio_component_unbind +ffffffff821a64e0 t amdgpu_dm_audio_component_get_eld +ffffffff821a6640 t dm_dmub_outbox1_low_irq +ffffffff821a6980 t dm_handle_hpd_work +ffffffff821a6a10 t amdgpu_dm_encoder_destroy +ffffffff821a6a50 t amdgpu_dm_i2c_xfer +ffffffff821a6bb0 t amdgpu_dm_i2c_func +ffffffff821a6be0 t amdgpu_dm_connector_detect +ffffffff821a6ca0 t amdgpu_dm_connector_funcs_force +ffffffff821a6d90 t amdgpu_dm_connector_late_register +ffffffff821a6f10 t amdgpu_dm_connector_unregister +ffffffff821a6f30 t amdgpu_dm_connector_destroy +ffffffff821a7040 t amdgpu_dm_backlight_update_status +ffffffff821a70d0 t amdgpu_dm_backlight_get_brightness +ffffffff821a7300 t get_modes +ffffffff821a7310 t amdgpu_dm_connector_atomic_check +ffffffff821a7470 t amdgpu_dm_connector_get_modes +ffffffff821a7af0 t dm_crtc_high_irq +ffffffff821a7cb0 t dm_vupdate_high_irq +ffffffff821a7e60 t dm_pflip_high_irq +ffffffff821a80b0 t register_hpd_handlers +ffffffff821a81d0 t dmub_hpd_callback +ffffffff821a83c0 t handle_hpd_irq +ffffffff821a83d0 t handle_hpd_rx_irq +ffffffff821a8780 t handle_hpd_irq_helper +ffffffff821a8940 t schedule_hpd_rx_offload_work +ffffffff821a8a10 t dm_handle_hpd_rx_offload_work +ffffffff821a8df0 t dm_gpureset_toggle_interrupts +ffffffff821a9030 t s3_handle_mst +ffffffff821aa000 T amdgpu_dm_init_color_mod +ffffffff821aa010 T amdgpu_dm_verify_lut_sizes +ffffffff821aa0f0 T amdgpu_dm_update_crtc_color_mgmt +ffffffff821aa7e0 T amdgpu_dm_update_plane_color_mgmt +ffffffff821ab000 T amdgpu_dm_crtc_handle_vblank +ffffffff821ab090 T amdgpu_dm_crtc_modeset_required +ffffffff821ab0d0 T amdgpu_dm_crtc_vrr_active_irq +ffffffff821ab110 T amdgpu_dm_crtc_set_vupdate_irq +ffffffff821ab1d0 T amdgpu_dm_crtc_vrr_active +ffffffff821ab210 T amdgpu_dm_crtc_enable_vblank +ffffffff821ab230 t dm_set_vblank +ffffffff821ab4f0 T amdgpu_dm_crtc_disable_vblank +ffffffff821ab510 T amdgpu_dm_crtc_init +ffffffff821ab730 t vblank_control_worker +ffffffff821ab880 t dm_crtc_reset_state +ffffffff821ab930 t amdgpu_dm_crtc_destroy +ffffffff821ab970 t dm_crtc_duplicate_state +ffffffff821abb40 t dm_crtc_destroy_state +ffffffff821abb90 t dm_crtc_helper_mode_fixup +ffffffff821abbc0 t dm_crtc_helper_disable +ffffffff821abbf0 t dm_crtc_helper_atomic_check +ffffffff821ac000 T hdcp_update_display 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+ffffffff821ae7f0 T dm_helpers_dp_mst_send_payload_allocation +ffffffff821ae8d0 T dm_dtn_log_begin +ffffffff821ae920 T dm_dtn_log_append_v +ffffffff821aeaa0 T dm_dtn_log_end +ffffffff821aeaf0 T dm_helpers_dp_mst_start_top_mgr +ffffffff821aebd0 T dm_helpers_dp_mst_stop_top_mgr +ffffffff821aec80 T dm_helpers_dp_read_dpcd +ffffffff821aed20 T dm_helpers_dp_write_dpcd +ffffffff821aedb0 T dm_helpers_submit_i2c +ffffffff821aef00 T dm_helpers_dp_write_dsc_enable +ffffffff821af640 T dm_helpers_is_dp_sink_present +ffffffff821af6f0 T dm_helpers_read_local_edid +ffffffff821af9a0 T dm_helper_dmub_aux_transfer_sync +ffffffff821af9f0 T dm_helpers_dmub_set_config_sync +ffffffff821afa10 T dm_set_dcn_clocks +ffffffff821afa40 T dm_helpers_smu_timeout +ffffffff821afa70 T dm_helpers_init_panel_settings +ffffffff821afae0 T dm_helpers_override_panel_settings +ffffffff821afb20 T dm_helpers_allocate_gpu_mem +ffffffff821afc30 T dm_helpers_free_gpu_mem +ffffffff821afcd0 T dm_helpers_dmub_outbox_interrupt_control +ffffffff821afd70 T dm_helpers_mst_enable_stream_features +ffffffff821afea0 T dm_helpers_dp_handle_test_pattern_request +ffffffff821b01f0 T dm_set_phyd32clk +ffffffff821b0220 T dm_helpers_enable_periodic_detection +ffffffff821b0250 T dm_helpers_dp_mst_update_branch_bandwidth +ffffffff821b0280 T dm_get_adaptive_sync_support_type +ffffffff821b02f0 t execute_synaptics_rc_command +ffffffff821b1000 T amdgpu_dm_irq_register_interrupt +ffffffff821b11d0 t dm_irq_work_func +ffffffff821b11f0 T amdgpu_dm_irq_unregister_interrupt +ffffffff821b13b0 T amdgpu_dm_irq_init +ffffffff821b14b0 T amdgpu_dm_irq_fini +ffffffff821b1680 T amdgpu_dm_irq_suspend +ffffffff821b17d0 T amdgpu_dm_irq_resume_early +ffffffff821b19a0 T amdgpu_dm_irq_resume_late +ffffffff821b1b70 T amdgpu_dm_set_irq_funcs +ffffffff821b1c30 T amdgpu_dm_outbox_init +ffffffff821b1c60 T amdgpu_dm_hpd_init +ffffffff821b1d30 T amdgpu_dm_hpd_fini +ffffffff821b1e00 t amdgpu_dm_set_crtc_irq_state +ffffffff821b1e90 t amdgpu_dm_irq_handler +ffffffff821b20f0 t amdgpu_dm_set_vline0_irq_state +ffffffff821b2180 t amdgpu_dm_set_dmub_outbox_irq_state +ffffffff821b21e0 t amdgpu_dm_set_vupdate_irq_state +ffffffff821b2270 t amdgpu_dm_set_dmub_trace_irq_state +ffffffff821b22d0 t amdgpu_dm_set_pflip_irq_state +ffffffff821b2360 t amdgpu_dm_set_hpd_irq_state +ffffffff821b3000 T needs_dsc_aux_workaround +ffffffff821b3050 T dm_dp_create_fake_mst_encoders +ffffffff821b3110 T dm_handle_mst_sideband_msg_ready_event +ffffffff821b33b0 T amdgpu_dm_initialize_dp_connector +ffffffff821b34d0 t kasprintf +ffffffff821b35b0 t dm_dp_aux_transfer +ffffffff821b3700 T dm_mst_get_pbn_divider +ffffffff821b3770 T compute_mst_dsc_configs_for_state +ffffffff821b3a30 t is_dsc_need_re_compute +ffffffff821b3c00 t compute_mst_dsc_configs_for_link +ffffffff821b42c0 T pre_validate_dsc +ffffffff821b48e0 T dm_dp_mst_is_port_support_mode +ffffffff821b4ba0 t amdgpu_dm_encoder_destroy +ffffffff821b4bb0 t dm_dp_add_mst_connector +ffffffff821b4de0 t dm_handle_mst_down_rep_msg_ready +ffffffff821b4e00 t amdgpu_dm_mst_connector_late_register +ffffffff821b4e50 t amdgpu_dm_mst_connector_early_unregister +ffffffff821b4f70 t dm_dp_mst_connector_destroy +ffffffff821b5010 t dm_dp_mst_get_modes +ffffffff821b55a0 t dm_dp_mst_detect +ffffffff821b57c0 t dm_mst_atomic_best_encoder +ffffffff821b5820 t dm_dp_mst_atomic_check +ffffffff821b5850 t set_dsc_configs_from_fairness_vars +ffffffff821b5b40 t increase_dsc_bpp +ffffffff821b60e0 t try_disable_dsc +ffffffff821b7000 T amdgpu_dm_plane_get_format_info +ffffffff821b7020 T amdgpu_dm_plane_fill_blending_from_plane_state +ffffffff821b7120 T amdgpu_dm_plane_fill_plane_buffer_attributes +ffffffff821b76a0 T amdgpu_dm_plane_helper_check_state +ffffffff821b78c0 T amdgpu_dm_plane_fill_dc_scaling_info +ffffffff821b7b20 T amdgpu_dm_plane_handle_cursor_update +ffffffff821b7e00 T amdgpu_dm_plane_init +ffffffff821b8db0 T is_video_format +ffffffff821b8e00 t dm_drm_plane_reset +ffffffff821b8ea0 t dm_drm_plane_duplicate_state +ffffffff821b8f40 t dm_drm_plane_destroy_state +ffffffff821b8f80 t dm_plane_format_mod_supported +ffffffff821b90b0 t dm_plane_helper_prepare_fb +ffffffff821b9430 t dm_plane_helper_cleanup_fb +ffffffff821b94e0 t dm_plane_atomic_check +ffffffff821b95d0 t dm_plane_atomic_async_check +ffffffff821b9610 t dm_plane_atomic_async_update +ffffffff821b96c0 t amdgpu_bo_reserve +ffffffff821b9900 t amdgpu_bo_unreserve +ffffffff821ba000 T dm_pp_apply_display_requirements +ffffffff821ba1f0 T dm_pp_get_clock_levels_by_type +ffffffff821ba5b0 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff821ba7a0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff821ba990 T dm_pp_notify_wm_clock_changes +ffffffff821ba9f0 T dm_pp_apply_power_level_change_request +ffffffff821baa20 T dm_pp_apply_clock_for_voltage_request +ffffffff821baad0 T dm_pp_get_static_clocks +ffffffff821baba0 T dm_pp_get_funcs +ffffffff821bacb0 t pp_rv_set_wm_ranges +ffffffff821bae40 t pp_rv_set_pme_wa_enable +ffffffff821bae60 t pp_rv_set_active_display_count +ffffffff821bae80 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff821baea0 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff821baec0 t pp_rv_set_hard_min_fclk_by_freq +ffffffff821baee0 t pp_nv_set_display_count +ffffffff821baf40 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff821bafb0 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff821bb010 t pp_nv_set_voltage_by_freq +ffffffff821bb0b0 t pp_nv_set_wm_ranges +ffffffff821bb100 t pp_nv_set_hard_min_uclk_by_freq +ffffffff821bb170 t pp_nv_get_maximum_sustainable_clocks +ffffffff821bb1d0 t pp_nv_get_uclk_dpm_states +ffffffff821bb230 t pp_nv_set_pstate_handshake_support +ffffffff821bb290 t pp_rn_set_wm_ranges +ffffffff821bb2e0 t pp_rn_get_dpm_clock_table +ffffffff821bc000 T amdgpu_dm_set_psr_caps +ffffffff821bc160 T amdgpu_dm_link_setup_psr +ffffffff821bc320 T amdgpu_dm_psr_enable +ffffffff821bc430 T amdgpu_dm_psr_disable +ffffffff821bc4c0 T amdgpu_dm_psr_disable_all +ffffffff821bd000 T amdgpu_dm_setup_replay +ffffffff821bd100 T amdgpu_dm_replay_enable +ffffffff821bd2b0 T amdgpu_dm_replay_disable +ffffffff821be000 T dm_get_elapse_time_in_ns +ffffffff821be030 T dm_perf_trace_timestamp +ffffffff821bf000 T dc_assert_fp_enabled +ffffffff821bf080 T dc_fpu_begin +ffffffff821bf0d0 T dc_fpu_end +ffffffff821c0000 T dal_vector_construct +ffffffff821c00e0 T dal_vector_presized_create +ffffffff821c03a0 T dal_vector_create +ffffffff821c04e0 T dal_vector_destruct +ffffffff821c0540 T dal_vector_destroy +ffffffff821c05d0 T dal_vector_get_count +ffffffff821c0600 T dal_vector_at_index +ffffffff821c0640 T dal_vector_remove_at_index +ffffffff821c06e0 T dal_vector_set_at_index +ffffffff821c0740 T dal_vector_insert_at +ffffffff821c0870 T dal_vector_reserve +ffffffff821c0930 T dal_vector_append +ffffffff821c0a60 T dal_vector_clone +ffffffff821c0b20 T dal_vector_capacity +ffffffff821c0b50 T dal_vector_clear +ffffffff821c1000 T fixed_point_to_int_frac +ffffffff821c1220 T convert_float_matrix +ffffffff821c12f0 T reduce_fraction +ffffffff821c2000 T is_rgb_cspace +ffffffff821c2090 T is_lower_pipe_tree_visible +ffffffff821c2100 T is_upper_pipe_tree_visible +ffffffff821c2170 T is_pipe_tree_visible +ffffffff821c2200 T build_prescale_params +ffffffff821c3000 T dc_fixpt_from_fraction +ffffffff821c31e0 T dc_fixpt_mul +ffffffff821c33a0 T dc_fixpt_sqr +ffffffff821c3520 T dc_fixpt_recip +ffffffff821c3590 T dc_fixpt_sinc +ffffffff821c37d0 T dc_fixpt_sin +ffffffff821c3800 T dc_fixpt_cos +ffffffff821c3920 T dc_fixpt_exp +ffffffff821c3c40 t fixed31_32_exp_from_taylor_series +ffffffff821c4110 T dc_fixpt_log +ffffffff821c4350 T dc_fixpt_u4d19 +ffffffff821c4390 T dc_fixpt_u3d19 +ffffffff821c43d0 T dc_fixpt_u2d19 +ffffffff821c4410 T dc_fixpt_u0d19 +ffffffff821c4440 T dc_fixpt_clamp_u0d14 +ffffffff821c4490 T dc_fixpt_clamp_u0d10 +ffffffff821c44e0 T dc_fixpt_s4d19 +ffffffff821c5000 T bios_parser_create +ffffffff821c6380 t bios_parser_get_connectors_number +ffffffff821c63e0 t bios_parser_get_connector_id +ffffffff821c6490 t bios_parser_get_src_obj +ffffffff821c65c0 t bios_parser_get_i2c_info +ffffffff821c6800 t bios_parser_get_hpd_info +ffffffff821c68f0 t bios_parser_get_device_tag +ffffffff821c6b10 t bios_parser_get_spread_spectrum_info +ffffffff821c6d30 t bios_parser_get_ss_entry_number +ffffffff821c6fa0 t bios_parser_get_embedded_panel_info +ffffffff821c7530 t bios_parser_get_gpio_pin_info +ffffffff821c7650 t bios_parser_get_encoder_cap_info +ffffffff821c7760 t bios_parser_set_scratch_critical_state +ffffffff821c7770 t bios_parser_is_device_id_supported +ffffffff821c7830 t bios_parser_encoder_control +ffffffff821c7870 t bios_parser_transmitter_control +ffffffff821c78b0 t bios_parser_enable_crtc +ffffffff821c7900 t bios_parser_adjust_pixel_clock +ffffffff821c7940 t bios_parser_set_pixel_clock +ffffffff821c7980 t bios_parser_set_dce_clock +ffffffff821c79c0 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff821c7a10 t bios_parser_program_crtc_timing +ffffffff821c7a50 t bios_parser_program_display_engine_pll +ffffffff821c7a90 t bios_parser_enable_disp_power_gating +ffffffff821c7ad0 t bios_parser_destroy +ffffffff821c7bb0 t bios_get_board_layout_info +ffffffff821c7e50 t get_bios_object +ffffffff821c8050 t get_ss_info_from_ss_info_table +ffffffff821c8240 t get_ss_info_v3_1 +ffffffff821c83d0 t get_ss_entry_number_from_ss_info_tbl +ffffffff821c9000 T firmware_parser_create +ffffffff821cb000 t bios_parser_get_connectors_number +ffffffff821cb170 t bios_parser_get_connector_id +ffffffff821cb1d0 t bios_parser_get_src_obj +ffffffff821cb4b0 t bios_parser_get_i2c_info +ffffffff821cb780 t bios_parser_get_hpd_info +ffffffff821cb920 t bios_parser_get_device_tag +ffffffff821cbc10 t bios_parser_get_spread_spectrum_info +ffffffff821cc0c0 t bios_parser_get_ss_entry_number +ffffffff821cc0f0 t bios_parser_get_embedded_panel_info +ffffffff821cc300 t bios_parser_get_gpio_pin_info +ffffffff821cc420 t bios_parser_get_encoder_cap_info +ffffffff821cc590 t bios_parser_is_accelerated_mode +ffffffff821cc5a0 t bios_parser_set_scratch_critical_state +ffffffff821cc5b0 t bios_parser_is_device_id_supported +ffffffff821cc620 t bios_parser_encoder_control +ffffffff821cc660 t bios_parser_transmitter_control +ffffffff821cc6a0 t bios_parser_enable_crtc +ffffffff821cc6f0 t bios_parser_set_pixel_clock +ffffffff821cc730 t bios_parser_set_dce_clock +ffffffff821cc770 t bios_parser_program_crtc_timing +ffffffff821cc7b0 t bios_parser_enable_disp_power_gating +ffffffff821cc7f0 t firmware_parser_destroy +ffffffff821cc8d0 t bios_get_board_layout_info +ffffffff821ccdc0 t bios_parser_pack_data_tables +ffffffff821ccdf0 t bios_get_atom_dc_golden_table +ffffffff821ccf50 t bios_parser_enable_lvtma_control +ffffffff821ccfa0 t bios_parser_get_soc_bb_info +ffffffff821cd0b0 t bios_parser_get_disp_connector_caps_info +ffffffff821cd230 t bios_parser_get_lttpr_caps +ffffffff821cd3a0 t bios_parser_get_lttpr_interop +ffffffff821cd500 t bios_parser_get_connector_speed_cap_info +ffffffff821cd650 t get_bios_object +ffffffff821cd7c0 t get_bios_object_from_path_v3 +ffffffff821ce000 T object_id_from_bios_object_id +ffffffff821cf000 T bios_get_image +ffffffff821cf050 T bios_is_accelerated_mode +ffffffff821cf0b0 T bios_set_scratch_acc_mode_change +ffffffff821cf0f0 T bios_set_scratch_critical_state +ffffffff821cf130 T bios_get_vga_enabled_displays +ffffffff821d0000 T dal_bios_parser_create +ffffffff821d0070 T dal_bios_parser_destroy +ffffffff821d1000 T dal_bios_parser_init_cmd_tbl +ffffffff821d1910 t encoder_control_digx_v3 +ffffffff821d1a30 t encoder_control_digx_v4 +ffffffff821d1b50 t encoder_control_digx_v5 +ffffffff821d1cb0 t encoder_control_dig1_v1 +ffffffff821d1d50 t encoder_control_dig2_v1 +ffffffff821d1df0 t encoder_control_dig_v1 +ffffffff821d1e50 t transmitter_control_v2 +ffffffff821d2000 t transmitter_control_v3 +ffffffff821d21d0 t transmitter_control_v4 +ffffffff821d2390 t transmitter_control_v1_5 +ffffffff821d2530 t transmitter_control_v1_6 +ffffffff821d26b0 t set_pixel_clock_v3 +ffffffff821d2850 t set_pixel_clock_v5 +ffffffff821d2a20 t set_pixel_clock_v6 +ffffffff821d2bf0 t set_pixel_clock_v7 +ffffffff821d2e00 t enable_spread_spectrum_on_ppll_v1 +ffffffff821d2f20 t enable_spread_spectrum_on_ppll_v2 +ffffffff821d3060 t enable_spread_spectrum_on_ppll_v3 +ffffffff821d3180 t adjust_display_pll_v2 +ffffffff821d32f0 t adjust_display_pll_v3 +ffffffff821d3490 t dac1_encoder_control_v1 +ffffffff821d3510 t dac2_encoder_control_v1 +ffffffff821d3590 t dac1_output_control_v1 +ffffffff821d3600 t dac2_output_control_v1 +ffffffff821d3670 t set_crtc_using_dtd_timing_v3 +ffffffff821d37e0 t set_crtc_timing_v1 +ffffffff821d3980 t enable_crtc_v1 +ffffffff821d3a30 t enable_crtc_mem_req_v1 +ffffffff821d3ae0 t program_clock_v5 +ffffffff821d3c00 t program_clock_v6 +ffffffff821d3d30 t external_encoder_control_v3 +ffffffff821d3f00 t enable_disp_power_gating_v2_1 +ffffffff821d3fe0 t set_dce_clock_v2_1 +ffffffff821d5000 T dal_firmware_parser_init_cmd_tbl +ffffffff821d5460 t encoder_control_digx_v1_5 +ffffffff821d5650 t encoder_control_fallback +ffffffff821d56b0 t transmitter_control_v1_6 +ffffffff821d5880 t transmitter_control_v1_7 +ffffffff821d5aa0 t transmitter_control_fallback +ffffffff821d5b00 t set_pixel_clock_v7 +ffffffff821d5d90 t set_pixel_clock_fallback +ffffffff821d5df0 t set_crtc_using_dtd_timing_v3 +ffffffff821d5f60 t enable_crtc_v1 +ffffffff821d6010 t external_encoder_control_v3 +ffffffff821d6040 t enable_disp_power_gating_v2_1 +ffffffff821d61c0 t enable_disp_power_gating_fallback +ffffffff821d6220 t set_dce_clock_v2_1 +ffffffff821d6360 t get_smu_clock_info_v3_1 +ffffffff821d63d0 t enable_lvtma_control +ffffffff821d7000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff821d70c0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff821d71e0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff821d7270 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff821d7300 T dal_cmd_table_helper_assign_control_parameter +ffffffff821d73e0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff821d74c0 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff821d8000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff821d80d0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff821d81e0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff821d8270 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff821d8300 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff821d83e0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff821d9000 T dal_cmd_tbl_helper_dce110_get_table ffffffff821d9030 t encoder_action_to_atom ffffffff821d90b0 t engine_bp_to_atom ffffffff821d9100 t clock_source_id_to_atom -ffffffff821d91d0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff821d9220 t signal_type_to_atom_dig_mode -ffffffff821d9280 t hpd_sel_to_atom -ffffffff821d92c0 t dig_encoder_sel_to_atom -ffffffff821d92f0 t phy_id_to_atom -ffffffff821d9330 t disp_power_gating_action_to_atom -ffffffff821d93a0 t dc_clock_type_to_atom -ffffffff821d9420 t transmitter_color_depth_to_atom -ffffffff821da000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff821d91a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff821d91f0 t signal_type_to_atom_dig_mode +ffffffff821d9250 t hpd_sel_to_atom +ffffffff821d9290 t dig_encoder_sel_to_atom +ffffffff821d92c0 t phy_id_to_atom +ffffffff821d9300 t disp_power_gating_action_to_atom +ffffffff821da000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff821da030 t encoder_action_to_atom ffffffff821da0b0 t engine_bp_to_atom ffffffff821da100 t clock_source_id_to_atom @@ -32524,7 +32513,7 @@ ffffffff821da2f0 t phy_id_to_atom ffffffff821da330 t disp_power_gating_action_to_atom ffffffff821da3a0 t dc_clock_type_to_atom ffffffff821da420 t transmitter_color_depth_to_atom -ffffffff821db000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff821db000 T dal_cmd_tbl_helper_dce112_get_table ffffffff821db030 t encoder_action_to_atom ffffffff821db0b0 t engine_bp_to_atom ffffffff821db100 t clock_source_id_to_atom @@ -32532,26502 +32521,26514 @@ ffffffff821db1d0 t clock_source_id_to_atom_phy_clk_src ffffffff821db220 t signal_type_to_atom_dig_mode ffffffff821db280 t hpd_sel_to_atom ffffffff821db2c0 t dig_encoder_sel_to_atom -ffffffff821db310 t phy_id_to_atom -ffffffff821db350 t disp_power_gating_action_to_atom -ffffffff821dc000 T clk_mgr_helper_get_active_display_cnt -ffffffff821dc0e0 T clk_mgr_helper_get_active_plane_cnt -ffffffff821dc190 T clk_mgr_exit_optimized_pwr_state -ffffffff821dc2b0 T clk_mgr_optimize_pwr_state -ffffffff821dc3b0 T dc_clk_mgr_create -ffffffff821dcb90 T dc_destroy_clk_mgr -ffffffff821dd000 T dentist_get_divider_from_did -ffffffff821dd070 T dce_adjust_dp_ref_freq_for_ss -ffffffff821dd190 T dce_get_dp_ref_freq_khz -ffffffff821dd2e0 T dce12_get_dp_ref_freq_khz -ffffffff821dd300 T dce_get_max_pixel_clock_for_all_paths -ffffffff821dd510 T dce_get_required_clocks_state -ffffffff821dd5c0 T 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dce110_fill_display_configs +ffffffff821df310 T dce11_pplib_apply_display_requirements +ffffffff821df630 T dce110_clk_mgr_construct +ffffffff821df6e0 t dce11_update_clocks +ffffffff821e0000 T dce112_set_clock +ffffffff821e01a0 T dce112_set_dispclk +ffffffff821e02d0 T dce112_set_dprefclk +ffffffff821e0350 T dce112_clk_mgr_construct +ffffffff821e0410 t dce112_update_clocks +ffffffff821e1000 T dce120_clk_mgr_construct +ffffffff821e10a0 T dce121_clk_mgr_construct +ffffffff821e11e0 t dce12_update_clocks +ffffffff821e2000 T rv1_clk_mgr_construct +ffffffff821e20c0 t rv1_update_clocks +ffffffff821e2600 t rv1_init_clocks +ffffffff821e2690 t rv1_enable_pme_wa +ffffffff821e3000 T rv1_vbios_smu_set_dispclk +ffffffff821e30f0 t rv1_vbios_smu_send_msg_with_param +ffffffff821e3230 T rv1_vbios_smu_set_dprefclk +ffffffff821e4000 T rv2_clk_mgr_construct +ffffffff821e5000 T dentist_get_did_from_divider +ffffffff821e5080 T dcn20_update_clocks_update_dpp_dto +ffffffff821e5160 T dcn20_update_clocks_update_dentist +ffffffff821e56f0 T dcn2_update_clocks +ffffffff821e5ce0 T dcn2_read_clocks_from_hw_dentist +ffffffff821e5dd0 T dcn2_update_clocks_fpga +ffffffff821e5f00 T dcn2_init_clocks +ffffffff821e5fa0 T dcn2_get_clock +ffffffff821e6010 T dcn20_clk_mgr_construct +ffffffff821e6160 t dcn2_enable_pme_wa +ffffffff821e61b0 t dcn2_are_clock_states_equal +ffffffff821e6220 t dcn2_notify_link_rate_change +ffffffff821e7000 T dcn201_clk_mgr_construct +ffffffff821e7130 t dcn201_update_clocks +ffffffff821e7370 t dcn201_init_clocks +ffffffff821e8000 T rn_clk_mgr_construct +ffffffff821e8970 t rn_update_clocks +ffffffff821e8f70 t rn_set_low_power_state +ffffffff821e9160 t rn_init_clocks +ffffffff821e9200 t rn_enable_pme_wa +ffffffff821e9210 t rn_are_clock_states_equal +ffffffff821e9260 t rn_notify_wm_ranges +ffffffff821e95f0 t rn_notify_link_rate_change +ffffffff821ea000 T rn_vbios_smu_get_smu_version +ffffffff821ea020 t rn_vbios_smu_send_msg_with_param +ffffffff821ea200 T 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dcn3_set_max_memclk +ffffffff821ec0c0 t dcn3_set_min_memclk +ffffffff821ec100 t dcn3_get_memclk_states_from_smu +ffffffff821ec260 t dcn3_is_smu_present +ffffffff821ed000 T dcn30_smu_test_message +ffffffff821ed070 t dcn30_smu_send_msg_with_param +ffffffff821ed220 T dcn30_smu_get_smu_version +ffffffff821ed240 T dcn30_smu_check_driver_if_version +ffffffff821ed2a0 T dcn30_smu_check_msg_header_version +ffffffff821ed300 T dcn30_smu_set_dram_addr_high +ffffffff821ed320 T dcn30_smu_set_dram_addr_low +ffffffff821ed340 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff821ed360 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff821ed380 T dcn30_smu_set_hard_min_by_freq +ffffffff821ed3e0 T dcn30_smu_set_hard_max_by_freq +ffffffff821ed440 T dcn30_smu_get_dpm_freq_by_index +ffffffff821ed4a0 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff821ed500 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff821ed520 T dcn30_smu_set_num_of_displays +ffffffff821ed540 T dcn30_smu_set_display_refresh_from_mall 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dcn314_smu_set_display_idle_optimization +ffffffff821f65a0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff821f65f0 T dcn314_smu_enable_pme_wa +ffffffff821f6630 T dcn314_smu_set_dram_addr_high +ffffffff821f6670 T dcn314_smu_set_dram_addr_low +ffffffff821f66b0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff821f66f0 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff821f6730 T dcn314_smu_set_zstate_support +ffffffff821f6780 T dcn314_smu_set_dtbclk +ffffffff821f7000 T dcn315_clk_mgr_construct +ffffffff821f7890 T dcn315_clk_mgr_destroy +ffffffff821f78e0 t dcn315_update_clocks +ffffffff821f7ef0 t dcn315_enable_pme_wa +ffffffff821f7f00 t dcn315_notify_wm_ranges +ffffffff821f82a0 t dcn315_disable_otg_wa +ffffffff821f9000 T dcn315_smu_get_smu_version +ffffffff821f9020 t dcn315_smu_send_msg_with_param +ffffffff821f93d0 T dcn315_smu_set_dispclk +ffffffff821f9450 T dcn315_smu_set_hard_min_dcfclk +ffffffff821f94e0 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff821f9570 T dcn315_smu_set_dppclk +ffffffff821f95f0 T dcn315_smu_set_display_idle_optimization +ffffffff821f9640 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff821f9690 T dcn315_smu_enable_pme_wa +ffffffff821f96d0 T dcn315_smu_set_dram_addr_high +ffffffff821f9710 T dcn315_smu_set_dram_addr_low +ffffffff821f9750 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff821f9790 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff821f97d0 T dcn315_smu_get_dpref_clk +ffffffff821f9830 T dcn315_smu_get_dtbclk +ffffffff821f9890 T dcn315_smu_set_dtbclk +ffffffff821fa000 T dcn316_clk_mgr_construct +ffffffff821fa6e0 T dcn316_clk_mgr_destroy +ffffffff821fa730 t dcn316_update_clocks +ffffffff821fada0 t dcn316_enable_pme_wa +ffffffff821fadb0 t dcn316_notify_wm_ranges +ffffffff821fb150 t find_clk_for_voltage +ffffffff821fc000 T dcn316_smu_get_smu_version +ffffffff821fc020 t dcn316_smu_send_msg_with_param +ffffffff821fc200 T dcn316_smu_set_dispclk +ffffffff821fc280 T dcn316_smu_set_hard_min_dcfclk +ffffffff821fc310 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff821fc3a0 T dcn316_smu_set_dppclk +ffffffff821fc420 T dcn316_smu_set_display_idle_optimization +ffffffff821fc470 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff821fc4c0 T dcn316_smu_set_dram_addr_high +ffffffff821fc500 T dcn316_smu_set_dram_addr_low +ffffffff821fc540 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff821fc580 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff821fc5c0 T dcn316_smu_enable_pme_wa +ffffffff821fc600 T dcn316_smu_set_dtbclk +ffffffff821fc640 T dcn316_smu_get_dpref_clk +ffffffff821fc6a0 T dcn316_smu_get_smu_fclk +ffffffff821fd000 T dcn32_init_clocks +ffffffff821fd620 T dcn32_update_clocks_update_dpp_dto +ffffffff821fd760 T dcn32_clk_mgr_construct +ffffffff821fda70 t dcn32_dump_clk_registers +ffffffff821fdd10 T dcn32_clk_mgr_destroy +ffffffff821fdd80 t dcn32_update_clocks +ffffffff821fe6e0 t dcn32_enable_pme_wa +ffffffff821fe720 t dcn32_are_clock_states_equal +ffffffff821fe790 t dcn32_notify_wm_ranges +ffffffff821fe920 t dcn32_set_hard_min_memclk +ffffffff821fe9b0 t dcn32_set_hard_max_memclk +ffffffff821fea00 t dcn32_set_max_memclk +ffffffff821fea40 t dcn32_set_min_memclk +ffffffff821fea80 t dcn32_get_memclk_states_from_smu +ffffffff821fed10 t dcn32_is_smu_present +ffffffff821fed40 t dcn32_get_dispclk_from_dentist +ffffffff821fede0 t dcn32_update_clocks_update_dentist +ffffffff82200000 T dcn32_smu_send_fclk_pstate_message +ffffffff82200020 t dcn32_smu_send_msg_with_param +ffffffff822001a0 T dcn32_smu_send_cab_for_uclk_message +ffffffff822001d0 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff822001f0 T dcn32_smu_set_pme_workaround +ffffffff82200210 T dcn32_smu_set_hard_min_by_freq +ffffffff82200270 T dcn32_smu_wait_for_dmub_ack_mclk +ffffffff82201000 T dc_stream_adjust_vmin_vmax +ffffffff82201170 T dc_stream_get_last_used_drr_vtotal +ffffffff822012e0 T dc_stream_get_crtc_position +ffffffff82201540 T dc_stream_configure_crc +ffffffff822016d0 T dc_stream_get_crc +ffffffff822017c0 T dc_stream_set_dyn_expansion +ffffffff82201a50 T dc_stream_set_dither_option +ffffffff82201bf0 T dc_stream_set_gamut_remap +ffffffff82201da0 T dc_stream_program_csc_matrix +ffffffff82202000 T dc_stream_set_static_screen_params +ffffffff82202190 T dc_create +ffffffff822027e0 t dc_construct_ctx +ffffffff82202980 t dc_destruct +ffffffff82202ce0 T dc_hardware_init +ffffffff82202db0 T dc_init_callbacks +ffffffff82202e00 T dc_deinit_callbacks +ffffffff82202e50 T dc_destroy +ffffffff82202ec0 T dc_validate_boot_timing +ffffffff822032d0 T dc_enable_stereo +ffffffff822033e0 T dc_trigger_sync +ffffffff82203a40 T dc_z10_restore +ffffffff82203a80 T dc_z10_save_init +ffffffff82203ac0 T dc_commit_streams +ffffffff82204010 t commit_minimal_transition_state +ffffffff82204490 T dc_create_state +ffffffff82204530 t dc_commit_state_no_check +ffffffff82205e70 T dc_release_state +ffffffff82205ee0 T dc_acquire_release_mpc_3dlut +ffffffff82205fb0 T dc_post_update_surfaces_to_stream +ffffffff82206430 T dc_copy_state +ffffffff82206620 T dc_retain_state +ffffffff82206650 T dc_set_generic_gpio_for_stereo +ffffffff822067b0 T dc_check_update_surfaces_for_stream +ffffffff822071c0 T dc_dmub_update_dirty_rect +ffffffff822073d0 T dc_update_planes_and_stream +ffffffff82208070 t fast_update_only +ffffffff822083d0 t commit_planes_for_stream_fast +ffffffff82208820 t commit_planes_for_stream +ffffffff82209f90 T dc_commit_updates_for_stream +ffffffff8220a670 t copy_surface_update_to_plane +ffffffff8220aa90 t copy_stream_update_to_stream +ffffffff8220b190 T dc_get_current_stream_count +ffffffff8220b1d0 T dc_get_stream_at_index +ffffffff8220b220 T dc_interrupt_to_irq_source +ffffffff8220b240 T dc_interrupt_set +ffffffff8220b290 T dc_interrupt_ack +ffffffff8220b2b0 T dc_power_down_on_boot +ffffffff8220b300 T dc_set_power_state +ffffffff8220b530 T dc_resume +ffffffff8220b5b0 T dc_is_dmcu_initialized +ffffffff8220b600 T get_clock_requirements_for_state +ffffffff8220b680 T dc_set_clock +ffffffff8220b6c0 T dc_get_clock +ffffffff8220b700 T dc_set_psr_allow_active +ffffffff8220b810 T dc_allow_idle_optimizations +ffffffff8220b8d0 T dc_unlock_memory_clock_frequency +ffffffff8220b950 T dc_lock_memory_clock_frequency +ffffffff8220b9f0 T dc_enable_dcmode_clk_limit +ffffffff8220bbc0 t blank_and_force_memclk +ffffffff8220bdf0 T dc_is_plane_eligible_for_idle_optimizations +ffffffff8220be50 T dc_hardware_release +ffffffff8220bea0 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff8220bee0 T dc_is_dmub_outbox_supported +ffffffff8220bf50 T dc_enable_dmub_notifications +ffffffff8220bfc0 T dc_enable_dmub_outbox +ffffffff8220c010 T dc_process_dmub_aux_transfer_async +ffffffff8220c1a0 T get_link_index_from_dpia_port_index +ffffffff8220c260 T dc_process_dmub_set_config_async +ffffffff8220c340 T dc_process_dmub_set_mst_slots +ffffffff8220c430 T dc_process_dmub_dpia_hpd_int_enable +ffffffff8220c500 T dc_print_dmub_diagnostic_data +ffffffff8220c520 T dc_disable_accelerated_mode +ffffffff8220c540 T dc_notify_vsync_int_state +ffffffff8220c770 T dc_abm_save_restore +ffffffff8220c960 T dc_query_current_properties +ffffffff8220c9d0 T dc_set_edp_power +ffffffff8220ca40 t create_links +ffffffff8220cef0 t create_link_encoders +ffffffff8220cfe0 t dc_update_viusal_confirm_color +ffffffff8220e000 T pre_surface_trace +ffffffff8220e030 T update_surface_trace +ffffffff8220e060 T post_surface_trace +ffffffff8220e090 T context_timing_trace +ffffffff8220e260 T context_clock_trace +ffffffff8220e290 T dc_status_to_str +ffffffff8220f000 T find_color_matrix +ffffffff8220f0b0 T color_space_to_black_color +ffffffff8220f120 T hwss_wait_for_blank_complete +ffffffff8220f1d0 T get_mpctree_visual_confirm_color +ffffffff8220f230 T get_surface_visual_confirm_color +ffffffff8220f2e0 T get_hdr_visual_confirm_color +ffffffff8220f3a0 T get_subvp_visual_confirm_color +ffffffff8220f4a0 T hwss_build_fast_sequence +ffffffff8220fb60 T hwss_execute_sequence +ffffffff8220ffc0 T hwss_setup_dpp +ffffffff82210060 T hwss_program_bias_and_scale +ffffffff822100e0 T hwss_program_manual_trigger +ffffffff82210130 T hwss_power_on_mpc_mem_pwr +ffffffff82210180 T hwss_set_output_csc +ffffffff822101d0 T hwss_set_ocsc_default +ffffffff82210220 T hwss_send_dmcub_cmd +ffffffff82210240 T get_mclk_switch_visual_confirm_color +ffffffff822103a0 T get_surface_tile_visual_confirm_color +ffffffff82211000 T link_enc_cfg_init +ffffffff822111f0 T link_enc_cfg_copy +ffffffff82211220 T link_enc_cfg_link_encs_assign +ffffffff822126c0 T link_enc_cfg_validate +ffffffff82212e70 T link_enc_cfg_link_enc_unassign +ffffffff82213000 T link_enc_cfg_is_transmitter_mappable +ffffffff82213120 T link_enc_cfg_get_stream_using_link_enc +ffffffff82213220 T link_enc_cfg_get_link_using_link_enc +ffffffff82213330 T link_enc_cfg_get_link_enc_used_by_link +ffffffff822134b0 T link_enc_cfg_get_next_avail_link_enc +ffffffff82213620 T link_enc_cfg_get_link_enc_used_by_stream +ffffffff82213640 T link_enc_cfg_get_link_enc +ffffffff822136d0 T link_enc_cfg_get_link_enc_used_by_stream_current +ffffffff82213850 T link_enc_cfg_is_link_enc_avail +ffffffff82213a50 T link_enc_cfg_set_transient_mode +ffffffff82214000 T dc_get_link_at_index +ffffffff82214030 T dc_get_edp_links +ffffffff822140b0 T dc_get_edp_link_panel_inst +ffffffff82214170 T dc_link_detect +ffffffff822141a0 T dc_link_detect_connection_type +ffffffff822141d0 T dc_link_get_status +ffffffff82214200 T dc_link_is_hdcp14 +ffffffff82214230 T dc_link_is_hdcp22 +ffffffff82214260 T dc_link_clear_dprx_states +ffffffff82214290 T dc_link_reset_cur_dp_mst_topology +ffffffff822142c0 T dc_link_bandwidth_kbps +ffffffff822142f0 T dc_get_cur_link_res_map +ffffffff82214310 T dc_restore_link_res_map +ffffffff82214330 T dc_link_update_dsc_config +ffffffff82214360 T dc_is_oem_i2c_device_present +ffffffff822143b0 T dc_submit_i2c +ffffffff822143e0 T dc_submit_i2c_oem +ffffffff82214430 T dc_link_dp_handle_automated_test +ffffffff82214460 T dc_link_dp_set_test_pattern +ffffffff82214490 T dc_link_set_drive_settings +ffffffff82214530 T dc_link_set_preferred_link_settings +ffffffff82214550 T dc_link_set_preferred_training_settings +ffffffff82214580 T dc_dp_trace_is_initialized +ffffffff822145b0 T dc_dp_trace_set_is_logged_flag +ffffffff822145e0 T dc_dp_trace_is_logged +ffffffff82214610 T dc_dp_trace_get_lt_end_timestamp +ffffffff82214640 T dc_dp_trace_get_lt_counts +ffffffff82214670 T dc_dp_trace_get_link_loss_count +ffffffff822146a0 T dc_link_add_remote_sink +ffffffff822146d0 T dc_link_remove_remote_sink +ffffffff82214700 T dc_link_aux_transfer_raw +ffffffff82214730 T dc_link_bw_kbps_from_raw_frl_link_rate_data +ffffffff82214750 T dc_link_decide_edp_link_settings +ffffffff82214780 T dc_link_dp_get_max_link_enc_cap +ffffffff822147b0 T dc_link_dp_mst_decide_link_encoding_format +ffffffff822147e0 T dc_link_get_link_cap +ffffffff82214810 T dc_link_get_highest_encoding_format +ffffffff822148e0 T dc_link_is_dp_sink_present +ffffffff82214910 T dc_link_is_fec_supported +ffffffff82214940 T dc_link_overwrite_extended_receiver_cap +ffffffff82214970 T dc_link_should_enable_fec +ffffffff822149a0 T dc_link_dp_dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff822149d0 T dc_link_handle_usb4_bw_alloc_response +ffffffff82214a00 T dc_link_check_link_loss_status +ffffffff82214a30 T dc_link_dp_allow_hpd_rx_irq +ffffffff82214a60 T dc_link_dp_handle_link_loss +ffffffff82214a90 T dc_link_dp_read_hpd_rx_irq_data +ffffffff82214ac0 T dc_link_handle_hpd_rx_irq +ffffffff82214af0 T dc_link_dp_receiver_power_ctrl +ffffffff82214b20 T dc_link_decide_lttpr_mode +ffffffff82214b50 T dc_link_edp_panel_backlight_power_on +ffffffff82214b80 T dc_link_get_backlight_level +ffffffff82214bb0 T dc_link_get_backlight_level_nits +ffffffff82214be0 T dc_link_set_backlight_level +ffffffff82214c10 T dc_link_set_backlight_level_nits +ffffffff82214c40 T dc_link_get_target_backlight_pwm +ffffffff82214c70 T dc_link_get_psr_state +ffffffff82214ca0 T dc_link_set_psr_allow_active +ffffffff82214cd0 T dc_link_setup_psr +ffffffff82214d00 T dc_link_get_replay_state +ffffffff82214d30 T dc_link_wait_for_t12 +ffffffff82214d60 T dc_link_get_hpd_state +ffffffff82214d90 T dc_link_enable_hpd +ffffffff82214dc0 T dc_link_disable_hpd +ffffffff82214df0 T dc_link_enable_hpd_filter +ffffffff82214e20 T dc_link_dp_dpia_validate +ffffffff82215000 T resource_parse_asic_id +ffffffff82215250 T dc_create_resource_pool +ffffffff82215620 T dc_destroy_resource_pool +ffffffff82215690 T resource_construct +ffffffff82215c70 T resource_unreference_clock_source +ffffffff82215cf0 T resource_reference_clock_source +ffffffff82215d70 T resource_get_clock_source_reference +ffffffff82215df0 T resource_are_vblanks_synchronizable +ffffffff82216020 T resource_are_streams_timing_synchronizable +ffffffff82216110 T resource_find_used_clk_src_for_sharing +ffffffff82216250 T resource_get_num_mpc_splits +ffffffff822162e0 T resource_get_num_odm_splits +ffffffff822163b0 T resource_get_otg_master +ffffffff82216460 T resource_build_scaling_params +ffffffff822172f0 t calculate_odm_slice_in_timing_active +ffffffff82217490 T resource_build_scaling_params_for_context +ffffffff82217610 T resource_find_free_secondary_pipe_legacy +ffffffff822176b0 T resource_find_free_pipe_used_in_cur_mpc_blending_tree +ffffffff82217720 T resource_is_pipe_type +ffffffff822177a0 T recource_find_free_pipe_not_used_in_cur_res_ctx +ffffffff82217820 T resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine +ffffffff82217940 T resource_is_for_mpcc_combine +ffffffff822179d0 T resource_find_any_free_pipe +ffffffff82217a40 T resource_get_otg_master_for_stream +ffffffff82217b70 T resource_get_opp_head +ffffffff82217c10 T dc_add_plane_to_context +ffffffff82217f10 T dc_remove_plane_from_context +ffffffff82218110 T dc_rem_all_planes_for_stream +ffffffff822182d0 T dc_add_all_planes_for_stream +ffffffff82218450 T dc_is_timing_changed +ffffffff822184c0 T dc_is_stream_unchanged +ffffffff822185b0 T dc_is_stream_scaling_unchanged +ffffffff82218660 T update_audio_usage +ffffffff822186d0 T dc_add_stream_to_ctx +ffffffff822187c0 T dc_remove_stream_from_ctx +ffffffff82218c10 T resource_map_pool_resources +ffffffff82219700 t acquire_first_split_pipe +ffffffff82219880 t add_hpo_dp_link_enc_to_ctx +ffffffff82219950 t find_first_free_audio +ffffffff82219a10 T dc_resource_state_copy_construct_current +ffffffff82219a30 T dc_resource_state_copy_construct +ffffffff82219c00 T dc_resource_state_construct +ffffffff82219c20 T dc_resource_is_dsc_encoding_supported +ffffffff82219c70 T dc_validate_with_context +ffffffff8221a930 t planes_changed_for_existing_stream +ffffffff8221aad0 T dc_validate_global_state +ffffffff8221ae90 T dc_resource_state_destruct +ffffffff8221af70 T dc_resource_find_first_free_pll +ffffffff8221afe0 T resource_build_info_frame +ffffffff8221b720 T resource_map_clock_resources +ffffffff8221b8d0 T pipe_need_reprogram +ffffffff8221ba50 T resource_build_bit_depth_reduction_params +ffffffff8221bc80 T dc_validate_stream +ffffffff8221be90 T dc_validate_plane +ffffffff8221bf20 T resource_pixel_format_to_bpp +ffffffff8221bfa0 T get_audio_check +ffffffff8221c0c0 T get_temp_dp_link_res +ffffffff8221c1d0 T reset_syncd_pipes_from_disabled_pipes +ffffffff8221c320 T check_syncd_pipes_for_disabled_master_pipe +ffffffff8221c480 T reset_sync_context_for_pipe +ffffffff8221c530 T resource_transmitter_to_phy_idx +ffffffff8221c590 T get_link_hwss +ffffffff8221c650 T is_h_timing_divisible_by_2 +ffffffff8221c6b0 T dc_resource_acquire_secondary_pipe_for_mpc_odm +ffffffff8221c8e0 T update_dp_encoder_resources_for_test_harness +ffffffff8221cba0 t calculate_plane_rec_in_timing_active +ffffffff8221cec0 t calculate_init_and_vp +ffffffff8221e000 T dc_sink_retain +ffffffff8221e030 T dc_sink_release +ffffffff8221e0b0 T dc_sink_create +ffffffff8221f000 T dc_stat_get_dmub_notification +ffffffff8221f0d0 T dc_stat_get_dmub_dataout +ffffffff82220000 T update_stream_signal +ffffffff82220080 T dc_stream_retain +ffffffff822200b0 T dc_stream_release +ffffffff82220150 T dc_create_stream_for_sink +ffffffff822204c0 T dc_copy_stream +ffffffff822205a0 T dc_stream_get_status_from_state +ffffffff82220600 T dc_stream_get_status +ffffffff82220670 T dc_optimize_timing_for_fsft +ffffffff822206c0 T dc_stream_set_cursor_attributes +ffffffff82220900 t program_cursor_attributes +ffffffff82220a90 T dc_stream_set_cursor_position +ffffffff82220bf0 t program_cursor_position +ffffffff82220d50 T dc_stream_add_writeback +ffffffff82220f70 T dc_stream_remove_writeback +ffffffff822210b0 T dc_stream_warmup_writeback +ffffffff822210f0 T dc_stream_get_vblank_counter +ffffffff822211c0 T dc_stream_send_dp_sdp +ffffffff822214d0 T dc_stream_get_scanoutpos +ffffffff822215b0 T dc_stream_dmdata_status_done +ffffffff82221670 T dc_stream_set_dynamic_metadata +ffffffff822217e0 T dc_stream_add_dsc_to_resource +ffffffff82221830 T dc_stream_get_pipe_ctx +ffffffff822218e0 T dc_stream_log +ffffffff82222000 T enable_surface_flip_reporting +ffffffff82222030 T dc_create_plane_state +ffffffff82222200 T dc_plane_get_status +ffffffff82222390 T dc_plane_state_retain +ffffffff822223c0 T dc_plane_state_release +ffffffff82222510 T dc_gamma_retain +ffffffff82222540 T dc_gamma_release +ffffffff822225a0 T dc_create_gamma +ffffffff82222600 T dc_transfer_func_retain +ffffffff82222630 T dc_transfer_func_release +ffffffff82222680 T dc_create_transfer_func +ffffffff822226e0 T dc_create_3dlut_func +ffffffff82222740 T dc_3dlut_func_release +ffffffff82222790 T dc_3dlut_func_retain +ffffffff82223000 T vm_helper_mark_vmid_used +ffffffff82223030 T dc_setup_system_context +ffffffff822230d0 T dc_setup_vm_context +ffffffff82223100 T dc_get_vmid_use_vector +ffffffff82223160 T vm_helper_init +ffffffff82224000 T dc_dmub_srv_create +ffffffff822240a0 T dc_dmub_srv_destroy +ffffffff82224100 T dc_dmub_srv_wait_idle +ffffffff82224180 T dc_dmub_srv_log_diagnostic_data +ffffffff822247f0 T dc_dmub_srv_clear_inbox0_ack +ffffffff82224860 T dc_dmub_srv_wait_for_inbox0_ack +ffffffff822248d0 T dc_dmub_srv_send_inbox0_cmd +ffffffff82224940 T dc_dmub_srv_cmd_run +ffffffff82224960 T dc_dmub_srv_cmd_run_list +ffffffff82224b40 T dc_dmub_srv_optimized_init_done +ffffffff82224bd0 T dc_dmub_srv_notify_stream_mask +ffffffff82224c30 T dc_dmub_srv_is_restore_required +ffffffff82224cc0 T dc_dmub_srv_get_dmub_outbox0_msg +ffffffff82224cf0 T dc_dmub_trace_event_control +ffffffff82224d10 T dc_dmub_srv_drr_update_cmd +ffffffff82224db0 T dc_dmub_srv_set_drr_manual_trigger_cmd +ffffffff82224e50 T dc_dmub_srv_p_state_delegate +ffffffff82225200 T dc_dmub_srv_query_caps_cmd +ffffffff822252c0 T dc_dmub_srv_get_visual_confirm_color_cmd +ffffffff822253b0 T dc_dmub_setup_subvp_dmub_command +ffffffff82225e60 T dc_dmub_srv_get_diagnostic_data +ffffffff82225ea0 T dc_send_update_cursor_info_to_dmu +ffffffff82226210 T dc_dmub_check_min_version +ffffffff82226250 T dc_dmub_srv_enable_dpia_trace +ffffffff82227000 T dc_edid_parser_send_cea +ffffffff822270b0 T dc_edid_parser_recv_cea_ack +ffffffff82227140 T dc_edid_parser_recv_amd_vsdb +ffffffff82228000 T generic_reg_update_ex +ffffffff82228370 t set_reg_field_values +ffffffff82228530 T generic_reg_set_ex +ffffffff82228750 T generic_reg_get +ffffffff822287c0 T generic_reg_get2 +ffffffff82228850 T generic_reg_get3 +ffffffff822288f0 T generic_reg_get4 +ffffffff822289a0 T generic_reg_get5 +ffffffff82228a70 T generic_reg_get6 +ffffffff82228b50 T generic_reg_get7 +ffffffff82228c50 T generic_reg_get8 +ffffffff82228d70 T generic_reg_wait +ffffffff82228ff0 T generic_write_indirect_reg +ffffffff82229050 T generic_read_indirect_reg +ffffffff82229110 T generic_indirect_reg_get +ffffffff822292d0 T generic_indirect_reg_update_ex +ffffffff82229500 T generic_indirect_reg_update_ex_sync +ffffffff82229700 T generic_indirect_reg_get_sync +ffffffff82229830 T reg_sequence_start_gather +ffffffff822298d0 T reg_sequence_start_execute +ffffffff82229a80 T reg_sequence_wait_done +ffffffff82229ae0 T dce_version_to_string +ffffffff8222a000 T dce_abm_create +ffffffff8222a0c0 T dce_abm_destroy +ffffffff8222a110 t dce_abm_init +ffffffff8222a400 t dce_abm_set_level +ffffffff8222a510 t dce_abm_immediate_disable +ffffffff8222a560 t dce_abm_set_pipe +ffffffff8222a6e0 t dce_abm_set_backlight_level_pwm +ffffffff8222a930 t dce_abm_get_current_backlight +ffffffff8222a960 t dce_abm_get_target_backlight +ffffffff8222b000 T dce_aud_az_enable +ffffffff8222b190 T dce_aud_az_disable +ffffffff8222b3d0 T dce_aud_az_configure +ffffffff8222c210 t check_audio_bandwidth +ffffffff8222c3a0 T dce_aud_wall_dto_setup +ffffffff8222c550 T dce_aud_hw_init +ffffffff8222c760 T dce_aud_destroy +ffffffff8222c7b0 T dce_audio_create +ffffffff8222c880 t dce_aud_endpoint_valid +ffffffff8222d000 T dce110_engine_destroy +ffffffff8222d050 T dce110_aux_engine_construct +ffffffff8222d0d0 t dce_aux_configure_timeout +ffffffff8222d2d0 T dce_aux_transfer_raw +ffffffff8222dc00 t acquire +ffffffff8222dee0 T dce_aux_transfer_dmub_raw +ffffffff8222e010 T dce_aux_transfer_with_retries +ffffffff8222f000 T look_up_in_video_optimized_rate_tlb +ffffffff8222f070 T dce110_clk_src_construct +ffffffff8222f2b0 t calc_pll_max_vco_construct +ffffffff8222f460 T dce112_clk_src_construct +ffffffff8222f500 T dcn20_clk_src_construct +ffffffff8222f5b0 T dcn3_clk_src_construct +ffffffff8222f660 T dcn31_clk_src_construct +ffffffff8222f710 T dcn301_clk_src_construct +ffffffff8222f7c0 t dce110_clock_source_power_down +ffffffff8222f860 t dce110_program_pix_clk +ffffffff8222ff90 t dce110_get_pix_clk_dividers +ffffffff82230630 t get_pixel_clk_frequency_100hz +ffffffff82230750 t get_ss_info_from_atombios +ffffffff82230a50 t dce112_program_pix_clk +ffffffff82230c70 t dce112_get_pix_clk_dividers +ffffffff82230d80 t dcn20_program_pix_clk +ffffffff82230e20 t dcn20_override_dp_pix_clk +ffffffff82230f30 t dcn3_program_pix_clk +ffffffff82231120 t dcn3_get_pix_clk_dividers +ffffffff822311f0 t dcn31_program_pix_clk +ffffffff82232000 T dce_dmcu_create +ffffffff822320c0 T dcn10_dmcu_create +ffffffff82232180 T dcn20_dmcu_create +ffffffff82232240 T dcn21_dmcu_create +ffffffff82232340 T dce_dmcu_destroy +ffffffff82232390 t dce_dmcu_init +ffffffff822323c0 t dce_dmcu_load_iram +ffffffff82232550 t dce_dmcu_set_psr_enable +ffffffff822326c0 t dce_dmcu_setup_psr +ffffffff82232a40 t dce_get_dmcu_psr_state +ffffffff82232b50 t dce_psr_wait_loop +ffffffff82232ca0 t dce_get_psr_wait_loop +ffffffff82232cd0 t dce_is_dmcu_initialized +ffffffff82232d40 t dcn10_dmcu_init +ffffffff82233360 t dcn10_dmcu_load_iram +ffffffff822335f0 t dcn10_dmcu_set_psr_enable +ffffffff822337c0 t dcn10_dmcu_setup_psr +ffffffff82233be0 t dcn10_get_dmcu_psr_state +ffffffff82233d20 t dcn10_psr_wait_loop +ffffffff82233e50 t dcn10_get_psr_wait_loop +ffffffff82233e80 t dcn10_is_dmcu_initialized +ffffffff82233eb0 t dcn10_send_edid_cea +ffffffff82234090 t dcn10_recv_amd_vsdb +ffffffff82234150 t dcn10_recv_edid_cea_ack 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t write_byte_sw +ffffffff8223a000 T dce_ipp_construct +ffffffff8223a050 T dce_ipp_destroy +ffffffff8223a0a0 t dce_ipp_cursor_set_position +ffffffff8223a1f0 t dce_ipp_cursor_set_attributes +ffffffff8223a4d0 t dce_ipp_program_prescale +ffffffff8223a6b0 t dce_ipp_program_input_lut +ffffffff8223aba0 t dce_ipp_set_degamma +ffffffff8223b000 T dce110_get_dig_frontend +ffffffff8223b0c0 T dce110_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff8223b180 T dce110_psr_program_dp_dphy_fast_training +ffffffff8223b200 T dce110_psr_program_secondary_packet +ffffffff8223b270 T dce110_is_dig_enabled +ffffffff8223b2d0 T dce110_link_encoder_validate_dvi_output +ffffffff8223b380 T dce110_link_encoder_validate_dp_output +ffffffff8223b3b0 T dce110_link_encoder_construct +ffffffff8223b5a0 T dce110_link_encoder_validate_output_with_stream +ffffffff8223b750 T dce110_link_encoder_hw_init +ffffffff8223b9c0 T dce110_link_encoder_destroy +ffffffff8223ba10 T dce110_link_encoder_setup +ffffffff8223bb40 T dce110_link_encoder_enable_tmds_output +ffffffff8223bc40 T dce110_link_encoder_enable_lvds_output +ffffffff8223bd40 T dce110_link_encoder_enable_dp_output +ffffffff8223bec0 T dce110_link_encoder_enable_dp_mst_output +ffffffff8223c040 T dce110_link_encoder_disable_output +ffffffff8223c2a0 T dce110_link_encoder_dp_set_lane_settings +ffffffff8223c450 T dce110_link_encoder_dp_set_phy_pattern +ffffffff8223cd50 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff8223cfd0 T dce110_link_encoder_update_mst_stream_allocation_table +ffffffff8223d2a0 T dce110_link_encoder_connect_dig_be_to_fe +ffffffff8223d3f0 T dce110_link_encoder_enable_hpd +ffffffff8223d420 T dce110_link_encoder_disable_hpd +ffffffff8223d450 T dce110_link_encoder_get_max_link_cap +ffffffff8223e000 T dce_mem_input_construct +ffffffff8223e060 T dce112_mem_input_construct +ffffffff8223e0c0 T dce120_mem_input_construct +ffffffff8223e120 t dce_mi_program_display_marks +ffffffff8223e450 t dce_mi_allocate_dmif +ffffffff8223e6c0 t dce_mi_free_dmif +ffffffff8223e840 t dce_mi_program_surface_flip_and_addr +ffffffff8223eba0 t dce_mi_program_pte_vm +ffffffff8223ed90 t dce_mi_program_surface_config +ffffffff8223f6b0 t dce_mi_is_flip_pending +ffffffff8223f750 t program_nbp_watermark +ffffffff8223f980 t dce112_mi_program_display_marks +ffffffff8223ff40 t dce120_mi_program_display_marks +ffffffff822404b0 t dce120_program_stutter_watermark +ffffffff82241000 T dce110_opp_set_clamping +ffffffff822412e0 T dce110_opp_program_bit_depth_reduction +ffffffff82241b50 T dce110_opp_program_clamping_and_pixel_encoding +ffffffff82241d20 T dce110_opp_set_dyn_expansion +ffffffff82241e80 T dce110_opp_program_fmt +ffffffff82242040 T dce110_opp_construct +ffffffff822420a0 T dce110_opp_destroy +ffffffff82243000 T dce_panel_cntl_construct +ffffffff82243060 t dce_panel_cntl_destroy +ffffffff822430b0 t dce_panel_cntl_hw_init +ffffffff82243380 t dce_is_panel_backlight_on +ffffffff82243440 t dce_is_panel_powered_on +ffffffff82243500 t dce_store_backlight_level +ffffffff822435c0 t dce_driver_set_backlight +ffffffff82243770 t dce_get_16_bit_backlight_from_pwm +ffffffff82244000 T get_filter_3tap_16p +ffffffff822440a0 T get_filter_3tap_64p +ffffffff82244140 T get_filter_4tap_16p +ffffffff822441e0 T get_filter_4tap_64p +ffffffff82244280 T get_filter_5tap_64p +ffffffff82244320 T get_filter_6tap_64p +ffffffff822443c0 T get_filter_7tap_64p +ffffffff82244460 T get_filter_8tap_64p +ffffffff82244500 T get_filter_2tap_16p +ffffffff82244530 T get_filter_2tap_64p +ffffffff82245000 T dce110_se_audio_mute_control +ffffffff82245050 T dce110_se_dp_audio_setup +ffffffff82245060 t dce110_se_audio_setup +ffffffff822451d0 T dce110_se_dp_audio_enable +ffffffff82245460 T dce110_se_dp_audio_disable +ffffffff822455d0 T dce110_se_hdmi_audio_setup +ffffffff82245b40 T dce110_se_hdmi_audio_disable +ffffffff82245ba0 T dce110_stream_encoder_construct +ffffffff82245bf0 t dce110_stream_encoder_dp_set_stream_attribute +ffffffff822462b0 t dce110_stream_encoder_hdmi_set_stream_attribute +ffffffff82246850 t dce110_stream_encoder_dvi_set_stream_attribute +ffffffff822469a0 t dce110_stream_encoder_lvds_set_stream_attribute +ffffffff82246a90 t dce110_stream_encoder_set_throttled_vcp_size +ffffffff82246cc0 t dce110_stream_encoder_update_hdmi_info_packets +ffffffff822474a0 t dce110_stream_encoder_stop_hdmi_info_packets +ffffffff82247760 t dce110_stream_encoder_update_dp_info_packets +ffffffff82247910 t dce110_stream_encoder_stop_dp_info_packets +ffffffff82247a90 t dce110_stream_encoder_dp_blank +ffffffff82247c00 t dce110_stream_encoder_dp_unblank +ffffffff82247e00 t setup_stereo_sync +ffffffff82247e90 t dce110_stream_encoder_set_avmute +ffffffff82247ed0 t dig_connect_to_otg +ffffffff82247f10 t dce110_reset_hdmi_stream_attribute +ffffffff82248020 t dig_source_otg +ffffffff82248090 t dce110_stream_encoder_set_stream_attribute_helper +ffffffff82248190 t dce110_update_generic_info_packet +ffffffff82249000 T dce_transform_get_optimal_number_of_taps +ffffffff82249360 T dce110_opp_set_csc_adjustment +ffffffff82249440 t program_color_matrix +ffffffff822496a0 T dce110_opp_set_csc_default +ffffffff822497f0 T dce110_opp_program_regamma_pwl +ffffffff8224a170 T dce110_opp_power_on_regamma_lut +ffffffff8224a230 T dce110_opp_set_regamma_mode +ffffffff8224a2b0 T dce_transform_construct +ffffffff8224a330 t dce_transform_reset +ffffffff8224a370 t dce_transform_set_scaler +ffffffff8224afa0 t dce_transform_set_pixel_storage_depth +ffffffff8224b4a0 t dce_transform_set_gamut_remap +ffffffff8224b830 t program_multi_taps_filter +ffffffff8224c000 T dmub_abm_create +ffffffff8224c0d0 T dmub_abm_destroy +ffffffff8224c120 t dmub_abm_init_ex +ffffffff8224c130 t dmub_abm_set_level_ex +ffffffff8224c1f0 t dmub_abm_set_backlight_level_pwm_ex +ffffffff8224c2a0 t dmub_abm_get_current_backlight_ex +ffffffff8224c2b0 t dmub_abm_get_target_backlight_ex +ffffffff8224c2c0 t dmub_abm_init_config_ex +ffffffff8224c360 t dmub_abm_set_pause_ex +ffffffff8224c410 t dmub_abm_save_restore_ex +ffffffff8224c4b0 t dmub_abm_set_pipe_ex +ffffffff8224d000 T dmub_abm_init +ffffffff8224d440 T dmub_abm_get_current_backlight +ffffffff8224d470 T dmub_abm_get_target_backlight +ffffffff8224d4a0 T dmub_abm_set_level +ffffffff8224d540 T dmub_abm_init_config +ffffffff8224d650 T dmub_abm_set_pause +ffffffff8224d700 T dmub_abm_save_restore +ffffffff8224d840 T dmub_abm_set_pipe +ffffffff8224d8f0 T dmub_abm_set_backlight_level +ffffffff8224e000 T dmub_hw_lock_mgr_cmd +ffffffff8224e0b0 T dmub_hw_lock_mgr_inbox0_cmd +ffffffff8224e100 T should_use_dmub_lock +ffffffff8224f000 T dmub_enable_outbox_notification +ffffffff82250000 T dmub_psr_create +ffffffff822500a0 T dmub_psr_destroy +ffffffff822500f0 t dmub_psr_copy_settings +ffffffff82250630 t dmub_psr_enable +ffffffff822507e0 t dmub_psr_get_state +ffffffff82250b10 t dmub_psr_set_level +ffffffff82250bf0 t dmub_psr_force_static +ffffffff82250c90 t dmub_psr_get_residency +ffffffff82250ce0 t dmub_psr_set_sink_vtotal_in_psr_active +ffffffff82250d80 t dmub_psr_set_power_opt +ffffffff82251000 T dmub_replay_create +ffffffff822510a0 T dmub_replay_destroy +ffffffff822510f0 t dmub_replay_get_state +ffffffff822511f0 t dmub_replay_enable +ffffffff82251450 t dmub_replay_copy_settings +ffffffff82251720 t dmub_replay_set_power_opt +ffffffff822517c0 t dmub_replay_set_coasting_vtotal +ffffffff82251860 t dmub_replay_residency +ffffffff82252000 T dce100_enable_display_power_gating +ffffffff822520c0 T dce100_prepare_bandwidth +ffffffff82252110 T dce100_optimize_bandwidth +ffffffff82252160 T dce100_hw_sequencer_construct +ffffffff82253000 T dce100_add_stream_to_ctx +ffffffff822530d0 T dce100_validate_plane +ffffffff82253110 T dce100_find_first_free_match_stream_enc_for_link +ffffffff822531c0 T dce100_create_resource_pool +ffffffff822541b0 t dce100_resource_destruct +ffffffff822544e0 t dce100_destroy_resource_pool +ffffffff82254550 t dce100_panel_cntl_create +ffffffff822545e0 t dce100_link_encoder_create +ffffffff82254700 t dce100_validate_bandwidth +ffffffff82254840 t dce100_validate_global +ffffffff822548e0 t read_dce_straps +ffffffff82254950 t create_audio +ffffffff82254980 t dce100_stream_encoder_create +ffffffff82254a20 t dce100_hwseq_create +ffffffff82255000 T dce110_compressor_power_up_fbc +ffffffff82255170 T dce110_compressor_enable_fbc +ffffffff822553e0 T dce110_compressor_is_fbc_enabled_in_hw +ffffffff822554b0 T dce110_compressor_disable_fbc +ffffffff82255810 T dce110_compressor_program_compressed_surface_address_and_pitch +ffffffff82255950 T dce110_compressor_set_fbc_invalidation_triggers +ffffffff822559f0 T dce110_compressor_create +ffffffff82255aa0 T dce110_compressor_construct +ffffffff82255b20 T dce110_compressor_destroy +ffffffff82255b70 T get_max_support_fbc_buffersize +ffffffff82256000 T dce110_update_info_frame +ffffffff82256100 T dce110_enable_stream +ffffffff822561c0 T dce110_edp_wait_for_hpd_ready +ffffffff822564c0 T dce110_edp_power_control +ffffffff82256ae0 T dce110_edp_wait_for_T12 +ffffffff82256cd0 T dce110_edp_backlight_control +ffffffff82257080 T dce110_enable_audio_stream +ffffffff82257160 T dce110_disable_audio_stream +ffffffff82257240 T dce110_disable_stream +ffffffff82257500 T dce110_unblank_stream +ffffffff82257610 T dce110_blank_stream +ffffffff822577b0 T dce110_set_avmute +ffffffff82257800 T dce110_enable_accelerated_mode +ffffffff82257c00 t power_down_all_hw_blocks +ffffffff82257e00 T dce110_set_safe_displaymarks +ffffffff82257f30 T dce110_apply_ctx_to_hw +ffffffff82258900 t enable_fbc +ffffffff82258ae0 T dce110_power_down +ffffffff82258c00 T dce110_prepare_bandwidth +ffffffff82258d70 T dce110_optimize_bandwidth +ffffffff82258f90 T dce110_set_backlight_level +ffffffff822590b0 T dce110_set_abm_immediate_disable +ffffffff82259140 T dce110_set_pipe +ffffffff822591b0 T dce110_enable_lvds_link_output +ffffffff82259210 T dce110_enable_tmds_link_output +ffffffff82259280 T dce110_enable_dp_link_output +ffffffff822594e0 T dce110_disable_link_output +ffffffff822595f0 T dce110_hw_sequencer_construct +ffffffff82259650 t enable_display_pipe_clock_gating +ffffffff82259680 t build_audio_output +ffffffff822597f0 t init_hw +ffffffff82259b10 t dce110_power_down_fe +ffffffff82259bf0 t dce110_apply_ctx_for_surface +ffffffff8225a3c0 t dce110_post_unlock_program_front_end +ffffffff8225a3f0 t update_plane_addr +ffffffff8225a460 t dce110_wait_for_mpcc_disconnect +ffffffff8225a490 t dce110_update_pending_status +ffffffff8225a580 t get_position +ffffffff8225a610 t dce110_enable_per_frame_crtc_position_reset +ffffffff8225a920 t dce110_enable_timing_synchronization +ffffffff8225ac90 t set_drr +ffffffff8225ad90 t set_static_screen_control +ffffffff8225ae70 t dce110_set_cursor_position +ffffffff8225afc0 t dce110_set_cursor_attribute +ffffffff8225b080 t program_gamut_remap +ffffffff8225b1e0 t program_output_csc +ffffffff8225b2e0 t init_pipes +ffffffff8225b310 t dce110_reset_hw_ctx_wrap +ffffffff8225b5e0 t dce110_set_input_transfer_func +ffffffff8225b790 t dce110_set_output_transfer_func +ffffffff8225c1c0 t dce110_enable_display_power_gating +ffffffff8225c340 t dce110_enable_stream_timing +ffffffff8225d000 T dce110_mem_input_v_construct +ffffffff8225d040 t dce_mem_input_v_program_display_marks +ffffffff8225d0d0 t dce_mem_input_program_chroma_display_marks +ffffffff8225d160 t dce110_allocate_mem_input_v +ffffffff8225d2a0 t dce110_free_mem_input_v +ffffffff8225d2d0 t dce_mem_input_v_program_surface_flip_and_addr +ffffffff8225d450 t dce_mem_input_v_program_pte_vm +ffffffff8225d770 t dce_mem_input_v_program_surface_config +ffffffff8225dbf0 t dce_mem_input_v_is_surface_pending +ffffffff8225dc70 t program_urgency_watermark +ffffffff8225ddc0 t program_nbp_watermark +ffffffff8225df90 t program_stutter_watermark +ffffffff8225f000 T dce110_opp_v_set_csc_default +ffffffff8225f360 t program_color_matrix_v +ffffffff8225f500 t configure_graphics_mode_v +ffffffff8225f5f0 T dce110_opp_v_set_csc_adjustment +ffffffff82260000 T dce110_opp_program_regamma_pwl_v +ffffffff82260590 t power_on_lut +ffffffff822606f0 T dce110_opp_power_on_regamma_lut_v +ffffffff82260760 T dce110_opp_set_regamma_mode_v +ffffffff82261000 T dce110_opp_v_construct +ffffffff82262000 T dce110_resource_build_pipe_hw_param +ffffffff82262160 T dce110_find_first_free_match_stream_enc_for_link +ffffffff82262200 T dce110_create_resource_pool +ffffffff82263460 t dce110_resource_destruct +ffffffff82263830 t dce110_destroy_resource_pool +ffffffff822638a0 t dce110_panel_cntl_create +ffffffff82263930 t dce110_link_encoder_create +ffffffff82263a50 t dce110_validate_bandwidth +ffffffff82263b50 t dce110_validate_global +ffffffff82263c30 t dce110_acquire_underlay +ffffffff82263e30 t dce110_validate_plane +ffffffff82263e90 t dce110_add_stream_to_ctx +ffffffff82263f90 t read_dce_straps +ffffffff82264000 t create_audio +ffffffff82264030 t dce110_stream_encoder_create +ffffffff822640d0 t dce110_hwseq_create +ffffffff82265000 T dce110_timing_generator_set_early_control +ffffffff82265080 T dce110_timing_generator_enable_crtc +ffffffff82265130 T dce110_timing_generator_program_blank_color +ffffffff822651d0 T dce110_timing_generator_disable_crtc +ffffffff82265230 T dce110_timing_generator_program_timing_generator +ffffffff82265450 T dce110_timing_generator_set_drr +ffffffff822655c0 T dce110_timing_generator_set_static_screen_control +ffffffff82265650 T dce110_timing_generator_get_vblank_counter +ffffffff822656b0 T dce110_timing_generator_get_position +ffffffff82265760 T dce110_timing_generator_get_crtc_scanoutpos +ffffffff82265860 T dce110_timing_generator_program_blanking +ffffffff82265b40 T dce110_timing_generator_set_test_pattern +ffffffff82265ea0 T dce110_timing_generator_validate_timing +ffffffff82265f70 T dce110_timing_generator_wait_for_vblank +ffffffff82266110 T dce110_timing_generator_is_counter_moving +ffffffff822661a0 T dce110_timing_generator_wait_for_vactive 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dce110_tg_set_colors +ffffffff82267180 T dce110_arm_vert_intr +ffffffff82267260 T dce110_configure_crc +ffffffff822673f0 t dce110_is_tg_enabled +ffffffff82267450 T dce110_get_crc +ffffffff82267540 T dce110_timing_generator_construct +ffffffff82268000 T dce110_timing_generator_v_construct +ffffffff82268070 t dce110_timing_generator_v_program_timing +ffffffff822683d0 t dce110_timing_generator_v_enable_crtc +ffffffff82268470 t dce110_timing_generator_v_disable_crtc +ffffffff822684f0 t dce110_timing_generator_v_is_counter_moving +ffffffff82268580 t dce110_timing_generator_v_get_vblank_counter +ffffffff822685e0 t dce110_timing_generator_v_set_early_control +ffffffff82268650 t dce110_timing_generator_v_wait_for_state +ffffffff82268840 t dce110_timing_generator_v_set_blank +ffffffff822688e0 t dce110_timing_generator_v_set_overscan_color_black +ffffffff82268990 t dce110_timing_generator_v_program_blank_color +ffffffff82268a20 t dce110_timing_generator_v_set_colors +ffffffff82268b60 t dce110_timing_generator_v_disable_vga +ffffffff82268b90 t dce110_timing_generator_v_did_triggered_reset_occur +ffffffff82268be0 t dce110_timing_generator_v_setup_global_swap_lock +ffffffff82268c00 t dce110_timing_generator_v_enable_reset_trigger +ffffffff82268c20 t dce110_timing_generator_v_disable_reset_trigger +ffffffff82268c40 t dce110_timing_generator_v_tear_down_global_swap_lock +ffffffff82268c60 t dce110_timing_generator_v_enable_advanced_request +ffffffff82269000 T dce110_transform_v_construct +ffffffff82269060 t dce110_xfmv_reset +ffffffff822690c0 t dce110_xfmv_set_scaler +ffffffff82269960 t dce110_xfmv_set_pixel_storage_depth +ffffffff82269a50 t dce110_xfmv_set_gamut_remap +ffffffff82269a80 t program_multi_taps_filter +ffffffff82269f40 t program_viewport +ffffffff8226b000 T dce112_compressor_power_up_fbc +ffffffff8226b170 T dce112_compressor_enable_fbc +ffffffff8226b370 T dce112_compressor_is_fbc_enabled_in_hw +ffffffff8226b440 T dce112_compressor_enable_lpt +ffffffff8226b5a0 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dpp1_dscl_calc_lb_num_partitions +ffffffff822841e0 T dpp1_dscl_is_lb_conf_valid +ffffffff82284220 T dpp1_dscl_set_scaler_manual_scale +ffffffff82285830 t dpp1_dscl_get_filter_coeffs_64p +ffffffff82285900 t dpp1_dscl_set_scaler_filter +ffffffff82286000 t dwb1_get_caps +ffffffff822860a0 t dwb1_enable +ffffffff822861b0 t dwb1_disable +ffffffff82286340 T dcn10_dwbc_construct +ffffffff82287000 T hubbub1_wm_read_state +ffffffff822873d0 T hubbub1_allow_self_refresh_control +ffffffff82287460 T hubbub1_is_allow_self_refresh_enabled +ffffffff822874d0 T hubbub1_verify_allow_pstate_change_high +ffffffff822876d0 T hubbub1_wm_change_req_wa +ffffffff82287780 T hubbub1_program_urgent_watermarks +ffffffff82287ba0 T hubbub1_program_stutter_watermarks +ffffffff82288050 T hubbub1_program_pstate_watermarks +ffffffff822882c0 T hubbub1_program_watermarks +ffffffff82288420 T hubbub1_update_dchub +ffffffff82288690 T hubbub1_toggle_watermark_change_req +ffffffff82288740 T hubbub1_soft_reset +ffffffff82288780 T hubbub1_construct +ffffffff822887e0 t hubbub1_get_dcc_compression_cap +ffffffff82288a20 t hubbub1_dcc_support_swizzle +ffffffff82288ab0 t hubbub1_dcc_support_pixel_format +ffffffff82289000 T hubp1_set_blank +ffffffff82289130 T hubp1_clear_underflow +ffffffff82289180 T hubp1_vready_workaround +ffffffff82289220 T hubp1_program_tiling +ffffffff822894c0 T hubp1_program_size +ffffffff82289660 T hubp1_program_rotation +ffffffff822897e0 T hubp1_program_pixel_format +ffffffff82289dc0 T hubp1_program_surface_flip_and_addr +ffffffff8228a700 T hubp1_dcc_control +ffffffff8228a7d0 T hubp1_program_surface_config +ffffffff8228a900 T hubp1_program_requestor +ffffffff8228acf0 T hubp1_program_deadline +ffffffff8228b4b0 T hubp1_is_flip_pending +ffffffff8228b5e0 T min_set_viewport +ffffffff8228b920 T hubp1_read_state_common +ffffffff8228c7d0 T hubp1_read_state +ffffffff8228cac0 T hubp1_get_cursor_pitch +ffffffff8228cb70 T hubp1_cursor_set_attributes +ffffffff8228ce50 T hubp1_cursor_set_position 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dcn10_setup_periodic_interrupt +ffffffff82297e40 T dcn10_setup_vupdate_interrupt +ffffffff82297f10 T dcn10_unblank_stream +ffffffff82298030 T dcn10_send_immediate_sdp_message +ffffffff82298090 T dcn10_set_clock +ffffffff822981a0 T dcn10_get_clock +ffffffff82298200 T dcn10_get_dcc_en_bits +ffffffff82299000 T snprintf_count +ffffffff82299090 T dcn10_clear_status_bits +ffffffff82299260 T dcn10_get_hw_state +ffffffff8229b000 T dcn10_hw_sequencer_construct +ffffffff8229c000 T dcn10_ipp_construct +ffffffff8229c050 T dcn20_ipp_construct +ffffffff8229c0a0 t dcn10_ipp_destroy +ffffffff8229d000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff8229d0d0 T dcn10_get_dig_frontend +ffffffff8229d190 T enc1_configure_encoder +ffffffff8229d210 T dcn10_psr_program_dp_dphy_fast_training +ffffffff8229d2a0 T dcn10_psr_program_secondary_packet +ffffffff8229d320 T dcn10_is_dig_enabled +ffffffff8229d390 T dcn10_link_encoder_validate_dvi_output +ffffffff8229d440 T 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dcn10_link_encoder_enable_hpd +ffffffff8229f520 T dcn10_link_encoder_disable_hpd +ffffffff8229f560 T dcn10_get_dig_mode +ffffffff8229f5e0 T dcn10_link_encoder_get_max_link_cap +ffffffff8229f660 t program_pattern_symbols +ffffffff822a0000 T mpc1_set_bg_color +ffffffff822a0210 T mpc1_get_mpcc +ffffffff822a02b0 T mpc1_update_stereo_mix +ffffffff822a03e0 T mpc1_assert_idle_mpcc +ffffffff822a04c0 T mpc1_get_mpcc_for_dpp +ffffffff822a0580 T mpc1_is_mpcc_idle +ffffffff822a0680 T mpc1_assert_mpcc_idle_before_connect +ffffffff822a07e0 T mpc1_insert_plane +ffffffff822a0e00 T mpc1_remove_mpcc +ffffffff822a1210 T mpc1_mpc_init +ffffffff822a1580 T mpc1_mpc_init_single_inst +ffffffff822a1790 T mpc1_init_mpcc_list_from_hw +ffffffff822a1ab0 T mpc1_read_mpcc_state +ffffffff822a1c70 T mpc1_cursor_lock +ffffffff822a1cf0 T mpc1_get_mpc_out_mux +ffffffff822a1d80 T dcn10_mpc_construct +ffffffff822a1f00 t mpc1_update_blending +ffffffff822a3000 T opp1_program_bit_depth_reduction +ffffffff822a3440 T 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dcn30_link_encoder_validate_output_with_stream +ffffffff822fb010 T dcn30_link_encoder_construct +ffffffff822fb210 T enc3_hw_init +ffffffff822fc000 T enc3_stream_encoder_update_hdmi_info_packets +ffffffff822fc150 t enc3_update_hdmi_info_packet +ffffffff822fc590 T enc3_stream_encoder_stop_hdmi_info_packets +ffffffff822fcbf0 T enc3_dp_set_dsc_pps_info_packet +ffffffff822fcf70 T enc3_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff822fd040 T enc3_stream_encoder_update_dp_info_packets +ffffffff822fd350 T enc3_audio_mute_control +ffffffff822fd3d0 T enc3_se_dp_audio_setup +ffffffff822fd460 T enc3_se_dp_audio_enable +ffffffff822fd580 T enc3_se_hdmi_audio_setup +ffffffff822fd910 T dcn30_dio_stream_encoder_construct +ffffffff822fd980 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff822fe010 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff822fe260 t enc3_read_state +ffffffff822fe420 t enc3_dp_set_dsc_config +ffffffff822fe500 t enc3_dp_set_odm_combine +ffffffff822ff000 T dpp30_read_state +ffffffff822ff050 T dpp3_program_post_csc +ffffffff822ff250 T dpp3_set_pre_degam +ffffffff822ff310 T dpp3_cnv_setup +ffffffff822ffc80 T dpp3_set_cursor_attributes +ffffffff822ffe00 T dpp3_get_optimal_number_of_taps +ffffffff82300920 T dpp3_construct +ffffffff82300980 t dpp3_deferred_update +ffffffff82300db0 t dpp3_program_blnd_lut +ffffffff823018b0 t dpp3_program_shaper +ffffffff82303b30 t dpp3_program_3dlut +ffffffff823043b0 t dpp3_set3dlut_ram12 +ffffffff82305000 T dpp3_program_cm_dealpha +ffffffff823050a0 T dpp3_program_cm_bias +ffffffff823051a0 T dpp3_program_gamcor_lut +ffffffff82305c90 t dpp3_power_on_gamcor_lut +ffffffff82305de0 T dpp3_set_hdr_multiplier +ffffffff82305e30 T dpp3_cm_set_gamut_remap +ffffffff82307000 T dwb3_config_fc +ffffffff823071f0 T dwb3_set_stereo +ffffffff823072d0 T dwb3_enable +ffffffff82307450 T dwb3_set_denorm +ffffffff82307590 T dwb3_disable +ffffffff82307660 T dwb3_update +ffffffff823077d0 T dwb3_is_enabled +ffffffff82307880 T dwb3_set_new_content +ffffffff823078c0 T dcn30_dwbc_construct +ffffffff82307910 T dwb3_set_host_read_rate_control +ffffffff82307990 t dwb3_get_caps +ffffffff82308000 T dwb3_ogam_set_input_transfer_func +ffffffff82308aa0 T dwb3_set_gamut_remap +ffffffff82308d90 T dwb3_program_hdr_mult +ffffffff82309000 T hubbub3_init_dchub_sys_ctx +ffffffff82309200 T hubbub3_program_watermarks +ffffffff82309340 T hubbub3_dcc_support_swizzle +ffffffff82309400 T hubbub3_get_dcc_compression_cap +ffffffff82309600 T hubbub3_force_wm_propagate_to_pipes +ffffffff823096c0 T hubbub3_force_pstate_change_control +ffffffff82309740 T hubbub3_init_watermarks +ffffffff82309b70 T hubbub3_construct +ffffffff8230a000 T hubp3_set_vm_system_aperture_settings +ffffffff8230a150 T hubp3_program_surface_flip_and_addr +ffffffff8230ac40 T hubp3_dcc_control +ffffffff8230ad10 T hubp3_dcc_control_sienna_cichlid +ffffffff8230ae30 T hubp3_dmdata_set_attributes +ffffffff8230b070 T hubp3_program_surface_config +ffffffff8230b3b0 T hubp3_read_state +ffffffff8230b6b0 T hubp3_setup +ffffffff8230b760 T hubp3_init +ffffffff8230b790 T hubp3_construct +ffffffff8230c000 T dcn30_set_blend_lut +ffffffff8230c070 T dcn30_set_input_transfer_func +ffffffff8230c1f0 T dcn30_set_output_transfer_func +ffffffff8230c5a0 T dcn30_update_writeback +ffffffff8230c640 t dcn30_set_writeback +ffffffff8230c820 T dcn30_mmhubbub_warmup +ffffffff8230ca90 T dcn30_enable_writeback +ffffffff8230cb50 T dcn30_disable_writeback +ffffffff8230cc50 T dcn30_program_all_writeback_pipes_in_tree +ffffffff8230cf90 T dcn30_init_hw +ffffffff8230d800 T dcn30_set_avmute +ffffffff8230d940 T dcn30_update_info_frame +ffffffff8230da40 T dcn30_program_dmdata_engine +ffffffff8230dae0 T dcn30_apply_idle_power_optimizations +ffffffff8230e020 T dcn30_does_plane_fit_in_mall +ffffffff8230e0d0 T dcn30_hardware_release +ffffffff8230e1d0 T dcn30_set_disp_pattern_generator +ffffffff8230e250 T dcn30_prepare_bandwidth +ffffffff8230e350 T dcn30_set_static_screen_control +ffffffff8230f000 T dcn30_hw_sequencer_construct +ffffffff82310000 T dcn30_mmhubbub_construct +ffffffff82310050 t mmhubbub3_warmup_mcif +ffffffff823102a0 t mmhubbub3_config_mcif_buf +ffffffff82310800 t mmhubbub3_config_mcif_arb +ffffffff82311000 T mpc3_is_dwb_idle +ffffffff82311080 T mpc3_set_dwb_mux +ffffffff82311100 T mpc3_disable_dwb_mux +ffffffff82311180 T mpc3_set_out_rate_control +ffffffff823112b0 T mpc3_get_ogam_current +ffffffff82311360 T mpc3_power_on_ogam_lut +ffffffff82311440 T mpc3_set_output_gamma +ffffffff82312140 T mpc3_set_denorm +ffffffff823121b0 T mpc3_set_denorm_clamp +ffffffff82312320 T mpc3_program_shaper +ffffffff823146d0 t mpc3_power_on_shaper_3dlut +ffffffff82314a90 T mpc3_init_mpcc +ffffffff82314b10 T mpc3_set_gamut_remap +ffffffff82314da0 T mpc3_program_3dlut +ffffffff823155e0 t mpc3_set3dlut_ram12 +ffffffff823157d0 T mpc3_set_output_csc +ffffffff82315950 T mpc3_set_ocsc_default +ffffffff82315af0 T mpc3_set_rmu_mux +ffffffff82315b90 T mpc3_get_rmu_mux_status +ffffffff82315c40 T mpcc3_acquire_rmu +ffffffff82315db0 T dcn30_mpc_construct +ffffffff82315e80 t mpcc3_release_rmu +ffffffff82315ff0 t mpc3_set_mpc_mem_lp_mode +ffffffff82317000 T optc3_triplebuffer_lock +ffffffff82317140 T optc3_lock_doublebuffer_enable +ffffffff82317410 T optc3_lock_doublebuffer_disable +ffffffff82317550 T optc3_lock +ffffffff82317640 T optc3_set_out_mux +ffffffff82317680 T optc3_program_blank_color +ffffffff823177d0 T optc3_set_drr_trigger_window +ffffffff82317870 T optc3_set_vtotal_change_limit +ffffffff823178f0 T optc3_set_dsc_config +ffffffff82317950 T optc3_set_odm_bypass +ffffffff82317af0 T optc3_set_odm_combine +ffffffff82317e70 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff82317ef0 T optc3_set_vtotal_min_max +ffffffff82317f30 T optc3_tg_init +ffffffff82317fa0 T dcn30_timing_generator_init +ffffffff82319000 T dcn30_add_stream_to_ctx +ffffffff82319020 T dcn30_populate_dml_pipes_from_context +ffffffff82319120 T dcn30_populate_dml_writeback_from_context +ffffffff82319190 T dcn30_calc_max_scaled_time +ffffffff823191f0 T dcn30_set_mcif_arb_params +ffffffff82319370 T dcn30_acquire_post_bldn_3dlut +ffffffff82319500 T dcn30_release_post_bldn_3dlut +ffffffff823195b0 T dcn30_internal_validate_bw +ffffffff8231a3e0 t dcn30_split_stream_for_mpc_or_odm +ffffffff8231a740 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8231a830 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8231a8e0 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff8231a990 T dcn30_update_soc_for_wm_a +ffffffff8231a9f0 T dcn30_calculate_wm_and_dlg +ffffffff8231aa70 T dcn30_validate_bandwidth +ffffffff8231af40 T dcn30_update_bw_bounding_box +ffffffff8231b630 T dcn30_create_resource_pool +ffffffff8231cf30 t dcn30_resource_destruct +ffffffff8231d590 t dcn30_destroy_resource_pool +ffffffff8231d600 t dcn30_panel_cntl_create +ffffffff8231d690 t dcn30_link_encoder_create +ffffffff8231d750 t dcn30_get_panel_config_defaults +ffffffff8231d7d0 t read_dce_straps +ffffffff8231d800 t dcn30_create_audio +ffffffff8231d830 t dcn30_stream_encoder_create +ffffffff8231d9f0 t dcn30_hwseq_create +ffffffff8231e000 T vpg3_update_generic_info_packet +ffffffff8231ea10 T vpg3_construct +ffffffff8231f000 T dccg301_create +ffffffff82320000 T dcn301_link_encoder_construct +ffffffff82321000 T hubbub301_construct +ffffffff82322000 T dcn301_hw_sequencer_construct +ffffffff82323000 T optc301_set_drr +ffffffff82323260 T optc301_setup_manual_trigger +ffffffff82323390 T dcn301_timing_generator_init +ffffffff82324000 T dcn301_panel_cntl_construct +ffffffff82324050 t dcn301_panel_cntl_destroy +ffffffff823240a0 t dcn301_panel_cntl_hw_init +ffffffff82324320 t dcn301_is_panel_backlight_on +ffffffff82324390 t dcn301_is_panel_powered_on +ffffffff82324450 t dcn301_store_backlight_level +ffffffff82324510 t dcn301_get_16_bit_backlight_from_pwm +ffffffff82325000 T dcn301_create_resource_pool +ffffffff823268a0 t dcn301_destruct +ffffffff82326ec0 t dcn301_destroy_resource_pool +ffffffff82326f30 t dcn301_panel_cntl_create +ffffffff82326fc0 t dcn301_link_encoder_create +ffffffff82327080 t dcn301_calculate_wm_and_dlg +ffffffff82327100 t read_dce_straps +ffffffff82327130 t dcn301_create_audio +ffffffff82327160 t dcn301_stream_encoder_create +ffffffff82327320 t dcn301_hwseq_create +ffffffff82328000 T dcn302_dpp_pg_control +ffffffff823282e0 T dcn302_hubp_pg_control +ffffffff823285c0 T dcn302_dsc_pg_control +ffffffff82329000 T dcn302_hw_sequencer_construct +ffffffff8232a000 T dcn302_update_bw_bounding_box +ffffffff8232a060 T dcn302_create_resource_pool +ffffffff8232b7d0 t dcn302_resource_destruct +ffffffff8232bdd0 t dcn302_destroy_resource_pool +ffffffff8232be40 t dcn302_panel_cntl_create +ffffffff8232bed0 t dcn302_link_encoder_create +ffffffff8232bf90 t dcn302_get_panel_config_defaults +ffffffff8232c010 t read_dce_straps +ffffffff8232c040 t dcn302_create_audio +ffffffff8232c070 t dcn302_stream_encoder_create +ffffffff8232c230 t dcn302_hwseq_create +ffffffff8232d000 T dcn303_dpp_pg_control +ffffffff8232d030 T dcn303_hubp_pg_control +ffffffff8232d060 T dcn303_dsc_pg_control +ffffffff8232d090 T dcn303_enable_power_gating_plane +ffffffff8232e000 T dcn303_hw_sequencer_construct +ffffffff8232f000 T dcn303_update_bw_bounding_box +ffffffff8232f060 T dcn303_create_resource_pool +ffffffff82330570 t dcn303_resource_destruct +ffffffff82330b70 t dcn303_destroy_resource_pool +ffffffff82330be0 t dcn303_panel_cntl_create +ffffffff82330c70 t dcn303_link_encoder_create +ffffffff82330d30 t dcn303_get_panel_config_defaults +ffffffff82330db0 t read_dce_straps +ffffffff82330de0 t dcn303_create_audio +ffffffff82330e10 t dcn303_stream_encoder_create +ffffffff82330fd0 t dcn303_hwseq_create +ffffffff82332000 T afmt31_powerdown +ffffffff82332090 T afmt31_poweron +ffffffff82332120 T afmt31_construct +ffffffff82333000 T apg31_construct +ffffffff82333050 t apg31_se_audio_setup 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dcn31_link_encoder_construct +ffffffff823375b0 T dcn31_link_encoder_construct_minimal +ffffffff82337630 T dcn31_link_encoder_enable_dp_output +ffffffff823378b0 T dcn31_link_encoder_enable_dp_mst_output +ffffffff82337b30 T dcn31_link_encoder_disable_output +ffffffff82337de0 T dcn31_link_encoder_is_in_alt_mode +ffffffff82337f40 T dcn31_link_encoder_get_max_link_cap +ffffffff823380d0 t enc31_hw_init +ffffffff82339000 T dcn31_hpo_dp_link_enc_enable +ffffffff82339180 T dcn31_hpo_dp_link_enc_disable +ffffffff82339200 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff82339be0 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff82339e90 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff8233a170 T dcn31_hpo_dp_link_enc_read_state +ffffffff8233a480 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff8233a590 T dcn31_hpo_dp_link_enc_disable_output +ffffffff8233a6f0 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff8233a7f0 T hpo_dp_link_encoder31_construct +ffffffff8233a850 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff8233b000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff8233b070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff8233b1e0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff8233b500 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff8233b630 t dcn31_hpo_dp_stream_enc_disable +ffffffff8233b6b0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff8233bfd0 t dcn31_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num +ffffffff8233c0a0 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff8233c2f0 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff8233c4a0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff8233c790 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff8233c8a0 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff8233c960 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff8233ca50 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff8233cc40 t dcn31_hpo_dp_stream_enc_read_state +ffffffff8233ce00 t dcn31_set_hblank_min_symbol_width +ffffffff8233d000 T hubbub31_init_dchub_sys_ctx +ffffffff8233d220 T hubbub31_init +ffffffff8233d2d0 T hubbub31_construct +ffffffff8233d370 t hubbub31_get_dcc_compression_cap +ffffffff8233d570 t hubbub31_get_dchub_ref_freq +ffffffff8233d650 t hubbub31_program_watermarks +ffffffff8233f1b0 t hubbub31_verify_allow_pstate_change_high +ffffffff8233f3a0 t dcn31_program_det_size +ffffffff8233f5c0 t dcn31_program_compbuf_size +ffffffff8233f890 t dcn31_init_crb +ffffffff82340000 T hubp31_set_unbounded_requesting +ffffffff823400a0 T hubp31_soft_reset +ffffffff823400f0 T hubp31_construct +ffffffff82340160 t hubp31_program_extended_blank +ffffffff82341000 T dcn31_init_hw +ffffffff82341970 T dcn31_dsc_pg_control +ffffffff82341d00 T dcn31_enable_power_gating_plane +ffffffff82341fb0 T dcn31_update_info_frame +ffffffff82342100 T dcn31_z10_save_init +ffffffff823421a0 T dcn31_z10_restore +ffffffff82342260 T dcn31_hubp_pg_control +ffffffff823425c0 T dcn31_init_sys_ctx +ffffffff82342670 T dcn31_reset_hw_ctx_wrap +ffffffff82342a40 T dcn31_setup_hpo_hw_control +ffffffff82343000 T dcn31_hw_sequencer_construct +ffffffff82344000 T optc31_immediate_disable_crtc +ffffffff82344120 T optc31_set_drr +ffffffff82344360 T optc3_init_odm +ffffffff823444e0 T dcn31_timing_generator_init +ffffffff82344550 t optc31_enable_crtc +ffffffff82344680 t optc31_disable_crtc +ffffffff82344780 t optc31_set_odm_combine +ffffffff82345000 T dcn31_panel_cntl_construct +ffffffff82345040 t dcn31_panel_cntl_destroy +ffffffff82345090 t dcn31_panel_cntl_hw_init +ffffffff82345190 t dcn31_is_panel_backlight_on +ffffffff82345240 t dcn31_is_panel_powered_on +ffffffff82345300 t dcn31_store_backlight_level +ffffffff823453d0 t dcn31_get_16_bit_backlight_from_pwm +ffffffff82346000 T dcn31x_populate_dml_pipes_from_context +ffffffff82346190 T dcn31_populate_dml_pipes_from_context +ffffffff82346610 T dcn31_calculate_wm_and_dlg +ffffffff823466a0 T dcn31_populate_dml_writeback_from_context +ffffffff82346710 T dcn31_set_mcif_arb_params +ffffffff82346780 T dcn31_validate_bandwidth +ffffffff82346c00 T dcn31_create_resource_pool +ffffffff82348250 t dcn31_resource_destruct +ffffffff823489d0 t dcn31_destroy_resource_pool +ffffffff82348a40 t dcn31_panel_cntl_create +ffffffff82348ab0 t dcn31_link_encoder_create +ffffffff82348b70 t dcn31_link_enc_create_minimal +ffffffff82348c30 t dcn31_get_panel_config_defaults +ffffffff82348c70 t read_dce_straps +ffffffff82348ca0 t dcn31_create_audio +ffffffff82348cd0 t dcn31_stream_encoder_create +ffffffff82348e90 t dcn31_hpo_dp_stream_encoder_create +ffffffff823490a0 t dcn31_hpo_dp_link_encoder_create +ffffffff82349140 t dcn31_hwseq_create +ffffffff8234a000 T vpg31_powerdown +ffffffff8234a090 T vpg31_poweron +ffffffff8234a130 T vpg31_construct +ffffffff8234b000 T dccg314_create +ffffffff8234b0c0 t dccg314_init +ffffffff8234b2b0 t dccg314_set_dpstreamclk +ffffffff8234b6a0 t dccg314_set_dtbclk_dto +ffffffff8234b8d0 t dccg314_set_pixel_rate_div +ffffffff8234bc50 t dccg314_set_valid_pixel_rate +ffffffff8234bcc0 t dccg314_trigger_dio_fifo_resync +ffffffff8234bd70 t dccg314_dpp_root_clock_control +ffffffff8234c000 T dcn314_dio_stream_encoder_construct +ffffffff8234c070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff8234c700 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff8234c950 t enc314_stream_encoder_dp_blank +ffffffff8234c9e0 t enc314_stream_encoder_dp_unblank +ffffffff8234cdf0 t enc314_read_state +ffffffff8234cf80 t enc314_dp_set_dsc_config +ffffffff8234cfd0 t enc314_dp_set_odm_combine +ffffffff8234d010 t enc314_set_dig_input_mode +ffffffff8234d060 t enc314_enable_fifo +ffffffff8234d120 t enc314_disable_fifo +ffffffff8234d170 t enc314_reset_fifo +ffffffff8234e000 T dcn314_update_odm +ffffffff8234e6a0 T dcn314_dsc_pg_control +ffffffff8234eac0 T dcn314_enable_power_gating_plane +ffffffff8234eda0 T dcn314_calculate_dccg_k1_k2_values +ffffffff8234ef60 T dcn314_set_pixels_per_cycle +ffffffff8234f050 T dcn314_resync_fifo_dccg_dio +ffffffff8234f210 T dcn314_dpp_root_clock_control +ffffffff8234f270 T dcn314_disable_link_output +ffffffff82350000 T dcn314_hw_sequencer_construct +ffffffff82351000 T dcn314_timing_generator_init +ffffffff82351070 t optc314_enable_crtc +ffffffff823511a0 t optc314_disable_crtc +ffffffff82351290 t optc314_phantom_crtc_post_enable +ffffffff82351360 t optc314_set_odm_bypass +ffffffff823514f0 t optc314_set_odm_combine +ffffffff82351810 t optc314_set_h_timing_div_manual_mode +ffffffff82352000 T dcn314_validate_bandwidth +ffffffff82352530 T dcn314_create_resource_pool +ffffffff82353b40 t dcn314_resource_destruct +ffffffff823542c0 t dcn314_get_preferred_eng_id_dpia +ffffffff823542f0 t dcn314_destroy_resource_pool +ffffffff82354360 t dcn31_panel_cntl_create +ffffffff823543d0 t dcn31_link_encoder_create +ffffffff82354490 t dcn31_link_enc_create_minimal +ffffffff82354550 t dcn314_populate_dml_pipes_from_context +ffffffff82354600 t dcn314_update_bw_bounding_box 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dcn32_set_det_allocations +ffffffff8238ab10 T dcn32_save_mall_state +ffffffff8238abc0 T dcn32_restore_mall_state +ffffffff8238ac70 T dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8238ae60 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8238af10 T dcn32_check_native_scaling_for_res +ffffffff8238af80 T dcn32_subvp_drr_admissable +ffffffff8238b150 T dcn32_subvp_vblank_admissable +ffffffff8238c000 T dcn321_link_encoder_construct +ffffffff8238d000 T dcn321_create_resource_pool +ffffffff8238d0d0 t dcn321_resource_construct +ffffffff82398840 t dcn321_mpc_create +ffffffff8239cea0 t dcn321_dwbc_create +ffffffff8239d8d0 t dcn321_mmhubbub_create +ffffffff8239ddb0 t dcn321_resource_destruct +ffffffff8239e540 t dcn321_destroy_resource_pool +ffffffff8239e5b0 t dcn321_link_encoder_create +ffffffff8239f690 t dcn321_update_bw_bounding_box +ffffffff8239f6f0 t read_dce_straps +ffffffff8239f720 t dcn321_create_audio +ffffffff8239faa0 t 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DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8244d4c0 T dml314_CalculateWriteBackDISPCLK +ffffffff8244d650 t dml_max3 +ffffffff8244d6c0 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff82455df0 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff82456060 t CalculateSwathAndDETConfiguration +ffffffff824566d0 t TruncToValidBPP +ffffffff82456930 t CalculateDCFCLKDeepSleep +ffffffff82456c80 t CalculateVMAndRowBytes +ffffffff82457320 t CalculatePrefetchSourceLines +ffffffff82457510 t CalculateUrgentBurstFactor +ffffffff824577c0 t CalculateMaxVStartup +ffffffff82457930 t UseMinimumDCFCLK +ffffffff82458950 t CalculatePrefetchSchedulePerPlane +ffffffff824590d0 t CalculateFlipSchedule +ffffffff824596c0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8245a340 t CalculateSwathWidth +ffffffff8245a8b0 t CalculatePrefetchSchedule +ffffffff8245bdd0 t CalculateVupdateAndDynamicMetadataParameters +ffffffff8245d000 T dml314_rq_dlg_get_rq_reg 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dcn32_set_clock_limits +ffffffff82469a90 T dcn32_override_min_req_memclk +ffffffff82469b60 t subvp_drr_schedulable +ffffffff82469e30 t get_optimal_ntuple +ffffffff8246b000 T dml32_recalculate +ffffffff8246f510 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff82478000 T dml32_dscceComputeDelay +ffffffff82478150 T dml32_dscComputeDelay +ffffffff82478190 T IsVertical +ffffffff824781c0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff82478540 t dml_max3 +ffffffff824785b0 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff824788e0 T dml32_CalculateSwathAndDETConfiguration +ffffffff82479140 T dml32_CalculateSwathWidth +ffffffff82479ab0 T dml32_UnboundedRequest +ffffffff82479b20 T dml32_CalculateDETBufferSize +ffffffff8247a1a0 T dml32_CalculateODMMode +ffffffff8247a970 T dml32_CalculateRequiredDispclk +ffffffff8247ab40 T dml32_RoundToDFSGranularity +ffffffff8247abd0 T dml32_CalculateOutputLink +ffffffff8247b6d0 T dml32_TruncToValidBPP +ffffffff8247ba10 T dml32_CalculateDPPCLK +ffffffff8247bbc0 T dml32_RequiredDTBCLK +ffffffff8247be60 t dml_max4 +ffffffff8247bef0 T dml32_DSCDelayRequirement +ffffffff8247c400 T dml32_CalculateSurfaceSizeInMall +ffffffff8247d110 T dml32_CalculateVMRowAndSwath +ffffffff8247df50 T dml32_CalculateVMAndRowBytes +ffffffff8247ecb0 T dml32_CalculatePrefetchSourceLines +ffffffff8247ef20 T dml32_CalculateMALLUseForStaticScreen +ffffffff8247f060 T dml32_CalculateRowBandwidth +ffffffff8247f1c0 T dml32_CalculateUrgentLatency +ffffffff8247f280 T dml32_CalculateUrgentBurstFactor +ffffffff8247f540 T dml32_CalculateDCFCLKDeepSleep +ffffffff8247f8b0 T dml32_CalculateWriteBackDelay +ffffffff8247fa30 T dml32_UseMinimumDCFCLK +ffffffff82480b10 T dml32_CalculateExtraLatencyBytes +ffffffff82480ce0 T dml32_CalculateTWait +ffffffff82480de0 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff82481060 T dml32_get_return_bw_mbps +ffffffff82481240 T dml32_get_return_bw_mbps_vm_only +ffffffff82481330 T dml32_CalculateExtraLatency +ffffffff82481560 T dml32_CalculatePrefetchSchedule +ffffffff82482d30 T dml32_CalculateFlipSchedule +ffffffff82483300 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff824844c0 T dml32_CalculateWriteBackDISPCLK +ffffffff824846b0 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff82484700 T dml32_CalculatePixelDeliveryTimes +ffffffff82484b90 T dml32_CalculateMetaAndPTETimes +ffffffff82485300 T dml32_CalculateVMGroupAndRequestTimes +ffffffff82485870 T dml32_CalculateDCCConfiguration +ffffffff82485ed0 T dml32_CalculateStutterEfficiency +ffffffff82486e90 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff82486f90 T dml32_CalculateVActiveBandwithSupport +ffffffff82487100 T dml32_CalculatePrefetchBandwithSupport +ffffffff82487430 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff82487590 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff82487820 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff82488000 T dml32_rq_dlg_get_rq_reg +ffffffff82488750 T dml32_rq_dlg_get_dlg_reg +ffffffff8248b000 T dcn321_update_bw_bounding_box_fpu +ffffffff8248d860 t get_optimal_ntuple +ffffffff8248e000 T dml_init_instance +ffffffff8248e320 T dml_get_status_message +ffffffff8248e360 T dml_log_pipe_params +ffffffff8248e390 T dml_log_mode_support_params +ffffffff8248f000 T dml_get_voltage_level +ffffffff8248f2c0 t fetch_socbb_params +ffffffff8248f7b0 t fetch_ip_params +ffffffff8248fc50 t fetch_pipe_params +ffffffff82490ce0 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff82490d60 T get_clk_dcf_deepsleep +ffffffff82490eb0 T get_wm_urgent +ffffffff82491000 T get_wm_memory_trip +ffffffff82491150 T get_wm_writeback_urgent +ffffffff824912a0 T get_wm_stutter_exit +ffffffff824913f0 T get_wm_stutter_enter_exit +ffffffff82491540 T get_wm_z8_stutter_exit +ffffffff82491690 T get_wm_z8_stutter_enter_exit +ffffffff824917e0 T get_stutter_efficiency_z8 +ffffffff82491930 T get_stutter_num_bursts_z8 +ffffffff82491a80 T get_wm_dram_clock_change +ffffffff82491bd0 T get_wm_writeback_dram_clock_change +ffffffff82491d20 T get_stutter_efficiency +ffffffff82491e70 T get_stutter_efficiency_no_vblank +ffffffff82491fc0 T get_stutter_period +ffffffff82492110 T get_urgent_latency +ffffffff82492260 T get_urgent_extra_latency +ffffffff824923b0 T get_nonurgent_latency +ffffffff82492500 T get_dram_clock_change_latency +ffffffff82492650 T get_dispclk_calculated +ffffffff824927a0 T get_total_data_read_bw +ffffffff824928f0 T get_return_bw +ffffffff82492a40 T get_tcalc +ffffffff82492b90 T get_fraction_of_urgent_bandwidth +ffffffff82492ce0 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff82492e30 T get_cstate_max_cap_mode +ffffffff82492f90 T get_comp_buffer_size_kbytes +ffffffff824930e0 T get_pixel_chunk_size_in_kbyte +ffffffff82493230 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff82493380 T get_meta_chunk_size_in_kbyte +ffffffff824934d0 T get_min_pixel_chunk_size_in_byte +ffffffff82493620 T get_min_meta_chunk_size_in_byte +ffffffff82493770 T get_fclk_watermark +ffffffff824938c0 T get_usr_retraining_watermark +ffffffff82493a10 T get_comp_buffer_reserved_space_kbytes +ffffffff82493b60 T get_comp_buffer_reserved_space_64bytes +ffffffff82493cb0 T get_comp_buffer_reserved_space_zs +ffffffff82493e00 T get_unbounded_request_enabled +ffffffff82493f60 T get_dsc_delay +ffffffff824940c0 T get_dppclk_calculated +ffffffff82494220 T get_dscclk_calculated +ffffffff82494380 T get_min_ttu_vblank +ffffffff824944e0 T get_min_ttu_vblank_in_us +ffffffff82494640 T get_vratio_prefetch_l +ffffffff824947a0 T get_vratio_prefetch_c +ffffffff82494900 T get_dst_x_after_scaler +ffffffff82494a60 T get_dst_y_after_scaler +ffffffff82494bc0 T get_dst_y_per_vm_vblank +ffffffff82494d20 T get_dst_y_per_row_vblank +ffffffff82494e80 T get_dst_y_prefetch +ffffffff82494fe0 T get_dst_y_per_vm_flip +ffffffff82495140 T get_dst_y_per_row_flip +ffffffff824952a0 T get_refcyc_per_vm_group_vblank +ffffffff82495400 T get_refcyc_per_vm_group_flip +ffffffff82495560 T get_refcyc_per_vm_req_vblank +ffffffff824956c0 T get_refcyc_per_vm_req_flip +ffffffff82495820 T get_refcyc_per_vm_group_vblank_in_us +ffffffff82495980 T get_refcyc_per_vm_group_flip_in_us +ffffffff82495ae0 T get_refcyc_per_vm_req_vblank_in_us +ffffffff82495c40 T get_refcyc_per_vm_req_flip_in_us +ffffffff82495da0 T get_refcyc_per_vm_dmdata_in_us +ffffffff82495f00 T get_dmdata_dl_delta_in_us +ffffffff82496060 T get_refcyc_per_line_delivery_l_in_us +ffffffff824961c0 T get_refcyc_per_line_delivery_c_in_us +ffffffff82496320 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff82496480 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff824965e0 T get_refcyc_per_req_delivery_l_in_us +ffffffff82496740 T get_refcyc_per_req_delivery_c_in_us +ffffffff824968a0 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff82496a00 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff82496b60 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff82496cc0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff82496e20 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff82496f80 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff824970e0 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff82497240 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff824973a0 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff82497500 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff82497660 T get_vstartup +ffffffff824977c0 T get_vupdate_offset +ffffffff82497920 T get_vupdate_width +ffffffff82497a80 T get_vready_offset +ffffffff82497be0 T get_vready_at_or_after_vsync +ffffffff82497d50 T get_min_dst_y_next_start +ffffffff82497eb0 T get_dst_y_per_pte_row_nom_l +ffffffff82498010 T get_dst_y_per_pte_row_nom_c +ffffffff82498170 T get_dst_y_per_meta_row_nom_l +ffffffff824982d0 T get_dst_y_per_meta_row_nom_c +ffffffff82498430 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff82498590 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff824986f0 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff82498850 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff824989b0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff82498b10 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff82498c70 T get_vstartup_calculated +ffffffff82498dd0 T get_dpte_row_height_linear_c +ffffffff82498f30 T get_swath_height_l +ffffffff82499090 T get_swath_height_c +ffffffff824991f0 T get_det_stored_buffer_size_l_bytes +ffffffff82499350 T get_det_stored_buffer_size_c_bytes +ffffffff824994b0 T get_dpte_group_size_in_bytes +ffffffff82499610 T get_vm_group_size_in_bytes +ffffffff82499770 T get_dpte_row_height_linear_l +ffffffff824998d0 T get_pte_buffer_mode +ffffffff82499a40 T get_subviewport_lines_needed_in_mall +ffffffff82499ba0 T get_surface_size_in_mall +ffffffff82499d00 T get_total_immediate_flip_bytes +ffffffff82499e50 T get_total_immediate_flip_bw +ffffffff8249a060 T get_total_prefetch_bw +ffffffff8249a270 T get_total_surface_size_in_mall_bytes +ffffffff8249a450 T get_det_buffer_size_kbytes +ffffffff8249a5b0 T get_is_phantom_pipe +ffffffff8249a710 T Calculate256BBlockSizes +ffffffff8249a800 T CalculateMinAndMaxPrefetchMode +ffffffff8249a880 T ModeSupportAndSystemConfiguration +ffffffff8249abe0 T CalculateWriteBackDISPCLK +ffffffff8249c000 T print__rq_params_st +ffffffff8249c030 T print__data_rq_sizing_params_st +ffffffff8249c060 T print__data_rq_dlg_params_st +ffffffff8249c090 T print__data_rq_misc_params_st +ffffffff8249c0c0 T print__rq_dlg_params_st +ffffffff8249c0f0 T print__dlg_sys_params_st +ffffffff8249c120 T print__data_rq_regs_st +ffffffff8249c150 T print__rq_regs_st +ffffffff8249c180 T print__dlg_regs_st +ffffffff8249c1b0 T print__ttu_regs_st +ffffffff8249d000 T dml1_extract_rq_regs +ffffffff8249d340 T dml1_rq_dlg_get_rq_params +ffffffff8249d520 t get_surf_rq_param +ffffffff8249e110 T dml1_rq_dlg_get_dlg_params +ffffffff824a1000 T _do_calc_rc_params +ffffffff824a1fd0 t get_qp_set +ffffffff824a3000 T dc_bandwidth_in_kbps_from_timing +ffffffff824a32e0 T dc_dsc_stream_bandwidth_in_kbps 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dal_hw_translate_dce110_init +ffffffff824a8030 t offset_to_id +ffffffff824a83a0 t id_to_offset +ffffffff824a9000 T dal_hw_factory_dce120_init +ffffffff824a9060 t define_hpd_registers +ffffffff824a90b0 t define_ddc_registers +ffffffff824aa000 T dal_hw_translate_dce120_init +ffffffff824aa030 t offset_to_id +ffffffff824aa3b0 t id_to_offset +ffffffff824ab000 T dal_hw_factory_dce80_init +ffffffff824ab060 t define_hpd_registers +ffffffff824ab0b0 t define_ddc_registers +ffffffff824ac000 T dal_hw_translate_dce80_init +ffffffff824ac030 t offset_to_id +ffffffff824ac7d0 t id_to_offset +ffffffff824ad000 T dal_hw_factory_dcn10_init +ffffffff824ad060 t define_hpd_registers +ffffffff824ad0b0 t define_ddc_registers +ffffffff824ad150 t define_generic_registers +ffffffff824ae000 T dal_hw_translate_dcn10_init +ffffffff824ae030 t offset_to_id +ffffffff824ae3a0 t id_to_offset +ffffffff824af000 T dal_hw_factory_dcn20_init +ffffffff824af060 t define_hpd_registers +ffffffff824af0b0 t define_ddc_registers +ffffffff824af160 t define_generic_registers +ffffffff824b0000 T dal_hw_translate_dcn20_init +ffffffff824b0030 t offset_to_id +ffffffff824b02c0 t id_to_offset +ffffffff824b1000 T dal_hw_factory_dcn21_init +ffffffff824b1060 t define_hpd_registers +ffffffff824b10b0 t define_ddc_registers +ffffffff824b1160 t define_generic_registers +ffffffff824b2000 T dal_hw_translate_dcn21_init +ffffffff824b2030 t offset_to_id +ffffffff824b22b0 t id_to_offset +ffffffff824b3000 T dal_hw_factory_dcn30_init +ffffffff824b3060 t define_hpd_registers +ffffffff824b30b0 t define_ddc_registers +ffffffff824b3160 t define_generic_registers +ffffffff824b4000 T dal_hw_translate_dcn30_init +ffffffff824b4030 t offset_to_id +ffffffff824b42d0 t id_to_offset +ffffffff824b5000 T dal_hw_factory_dcn315_init +ffffffff824b5060 t define_hpd_registers +ffffffff824b50b0 t define_ddc_registers +ffffffff824b5160 t define_generic_registers +ffffffff824b6000 T dal_hw_translate_dcn315_init +ffffffff824b6030 t offset_to_id +ffffffff824b62b0 t id_to_offset +ffffffff824b7000 T dal_hw_factory_dcn32_init +ffffffff824b7060 t define_hpd_registers +ffffffff824b70b0 t define_ddc_registers +ffffffff824b7160 t define_generic_registers +ffffffff824b8000 T dal_hw_translate_dcn32_init +ffffffff824b8030 t offset_to_id +ffffffff824b8290 t id_to_offset +ffffffff824b9000 T dal_gpio_open +ffffffff824b90c0 T dal_gpio_open_ex +ffffffff824b9180 T dal_gpio_get_value +ffffffff824b9210 T dal_gpio_set_value +ffffffff824b92a0 T dal_gpio_get_mode +ffffffff824b92d0 T dal_gpio_lock_pin +ffffffff824b92f0 T dal_gpio_unlock_pin +ffffffff824b9310 T dal_gpio_change_mode +ffffffff824b93a0 T dal_gpio_get_id +ffffffff824b93d0 T dal_gpio_get_enum +ffffffff824b9400 T dal_gpio_set_config +ffffffff824b9490 T dal_gpio_get_pin_info +ffffffff824b94f0 T dal_gpio_get_sync_source +ffffffff824b9580 T dal_gpio_get_output_state +ffffffff824b95b0 T dal_gpio_get_ddc +ffffffff824b95e0 T dal_gpio_get_hpd +ffffffff824b9610 T dal_gpio_get_generic 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dal_ddc_change_mode +ffffffff824bb350 T dal_ddc_get_line +ffffffff824bb370 T dal_ddc_set_config +ffffffff824bc000 T dal_hw_ddc_init +ffffffff824bc120 T dal_hw_ddc_get_pin +ffffffff824bc130 t dal_hw_ddc_destroy +ffffffff824bc1a0 t set_config +ffffffff824bd000 T dal_hw_factory_init +ffffffff824be000 T dal_hw_generic_init +ffffffff824be120 T dal_hw_generic_get_pin +ffffffff824be130 t dal_hw_generic_destroy +ffffffff824be1a0 t set_config +ffffffff824bf000 T dal_hw_gpio_open +ffffffff824bf0d0 T dal_hw_gpio_config_mode +ffffffff824bf1c0 T dal_hw_gpio_get_value +ffffffff824bf230 T dal_hw_gpio_set_value +ffffffff824bf2c0 T dal_hw_gpio_change_mode +ffffffff824bf2d0 T dal_hw_gpio_close +ffffffff824bf3a0 T dal_hw_gpio_construct +ffffffff824bf400 T dal_hw_gpio_destruct +ffffffff824c0000 T dal_hw_hpd_init +ffffffff824c0120 T dal_hw_hpd_get_pin +ffffffff824c0130 t dal_hw_hpd_destroy +ffffffff824c01a0 t get_value +ffffffff824c0240 t set_config +ffffffff824c1000 T dal_hw_translate_init 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vcpu_reset_regs_svm -ffffffff82850960 T svm_setmsrbrw -ffffffff82850a70 T svm_setmsrbr -ffffffff82850b40 T svm_setmsrbw -ffffffff82850c20 T vmx_setmsrbr -ffffffff82850cd0 T vmx_setmsrbw -ffffffff82850d80 T vmx_setmsrbrw -ffffffff82850e90 T svm_set_clean -ffffffff82850ee0 T svm_set_dirty -ffffffff82850f30 T vcpu_reset_regs_vmx -ffffffff828519a0 T vcpu_vmx_check_cap -ffffffff82851aa0 T vcpu_vmx_compute_ctrl -ffffffff82851c80 T vcpu_init_vmx -ffffffff82852190 T vmm_alloc_vpid -ffffffff828522b0 T vcpu_deinit_vmx -ffffffff828523e0 T vcpu_reset_regs -ffffffff82852460 T vcpu_init_svm -ffffffff82852770 T vcpu_deinit_svm -ffffffff828528e0 T vcpu_init -ffffffff828529b0 T vmm_free_vpid -ffffffff82852a20 T vcpu_deinit -ffffffff82852a60 T vm_run -ffffffff82852c60 T vcpu_run_vmx -ffffffff82853740 T vcpu_run_svm -ffffffff82853e10 T vmm_fpurestore -ffffffff82853ee0 T vmm_fpusave -ffffffff82853f70 T vmm_translate_gva -ffffffff828542a0 T vmm_update_pvclock -ffffffff828543b0 T vmx_get_exit_info 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sdmmc_io_read_1 -ffffffff8285e1f0 T sdmmc_io_function_enable -ffffffff8285e690 T sdmmc_io_write_1 -ffffffff8285e830 T sdmmc_io_function_disable -ffffffff8285eb10 T sdmmc_io_attach -ffffffff8285ec00 T sdmmc_print -ffffffff8285eec0 T sdmmc_submatch -ffffffff8285ef50 T sdmmc_io_detach -ffffffff8285f010 T sdmmc_io_rw_direct -ffffffff8285f1e0 T sdmmc_io_rw_extended_subr -ffffffff8285f390 T sdmmc_io_rw_extended -ffffffff8285f7d0 T sdmmc_io_read_2 -ffffffff8285f940 T sdmmc_io_write_2 -ffffffff8285fac0 T sdmmc_io_read_4 -ffffffff8285fc30 T sdmmc_io_write_4 -ffffffff8285fdb0 T sdmmc_io_read_multi_1 -ffffffff8285feb0 T sdmmc_io_write_multi_1 -ffffffff8285ffb0 T sdmmc_io_read_region_1 -ffffffff828600b0 T sdmmc_io_write_region_1 -ffffffff828601b0 T sdmmc_io_xchg -ffffffff82860370 T sdmmc_intr_enable -ffffffff82860650 T sdmmc_intr_disable -ffffffff82860930 T sdmmc_intr_establish -ffffffff82860a50 T sdmmc_intr_disestablish -ffffffff82860b50 T sdmmc_card_intr -ffffffff82860ba0 T sdmmc_intr_task -ffffffff82860c60 T sdmmc_io_set_blocklen -ffffffff82861000 T sdmmc_mem_enable -ffffffff828614d0 T sdmmc_mem_send_op_cond -ffffffff828616b0 T sdmmc_mem_signal_voltage -ffffffff828617b0 T sdmmc_mem_scan -ffffffff82861b00 T sdmmc_decode_csd -ffffffff82861f50 T sdmmc_decode_cid -ffffffff82862400 T sdmmc_mem_send_scr -ffffffff82862560 T sdmmc_mem_decode_scr -ffffffff828625c0 T sdmmc_mem_send_cxd_data -ffffffff82862740 T sdmmc_mem_set_bus_width -ffffffff82862870 T sdmmc_mem_sd_switch -ffffffff82862b30 T sdmmc_be512_to_bitfield512 -ffffffff82862be0 T sdmmc_mem_mmc_switch -ffffffff82862cd0 T sdmmc_mem_init -ffffffff82862e60 T sdmmc_mem_set_blocklen -ffffffff82862f70 T sdmmc_mem_sd_init -ffffffff828633e0 T sdmmc_mem_mmc_init -ffffffff82863b60 T sdmmc_mem_select_transfer_mode -ffffffff82863be0 T sdmmc_mem_execute_tuning -ffffffff82863c70 T sdmmc_mem_read_block_subr -ffffffff82864000 T sdmmc_mem_single_read_block -ffffffff828640d0 T sdmmc_mem_read_block -ffffffff828642e0 T sdmmc_mem_write_block_subr -ffffffff82864660 T sdmmc_mem_single_write_block -ffffffff82864730 T sdmmc_mem_write_block -ffffffff82864940 T sdmmc_mem_hibernate_write -ffffffff82865000 T sdmmc_scsi_cmd -ffffffff82865200 T sdmmc_minphys -ffffffff82865280 T sdmmc_scsi_attach -ffffffff828654c0 T sdmmc_alloc_ccbs -ffffffff82865620 T sdmmc_free_ccbs -ffffffff82865680 T sdmmc_scsi_detach -ffffffff82865840 T sdmmc_stimeout -ffffffff828658e0 T sdmmc_ccb_alloc -ffffffff828659a0 T sdmmc_ccb_free -ffffffff82865aa0 T sdmmc_inquiry -ffffffff82865d30 T sdmmc_start_xs -ffffffff82865e50 T sdmmc_complete_xs -ffffffff82865f40 T sdmmc_done_xs -ffffffff82865f90 T sdmmc_scsi_hibernate_io -ffffffff82867000 T bwfm_sdio_preinit -ffffffff828675a0 T bwfm_sdio_txcheck -ffffffff828675e0 T bwfm_sdio_txdata -ffffffff82867660 T bwfm_sdio_txctl -ffffffff828677f0 T bwfm_sdio_buscore_read -ffffffff82867800 T bwfm_sdio_buscore_write -ffffffff82867820 T bwfm_sdio_buscore_prepare -ffffffff828679a0 T bwfm_sdio_buscore_activate -ffffffff82867a30 T bwfm_sdio_match -ffffffff82867ae0 T bwfm_sdio_attach -ffffffff82867e80 T bwfm_sdio_detach -ffffffff82867f00 T bwfm_sdio_task -ffffffff828680c0 T bwfm_sdio_write_1 -ffffffff828680f0 T bwfm_sdio_read_1 -ffffffff82868120 T bwfm_sdio_write_4 -ffffffff828681f0 T bwfm_sdio_read_4 -ffffffff828682b0 T bwfm_sdio_load_microcode -ffffffff828685a0 T bwfm_sdio_clkctl -ffffffff828686d0 T bwfm_sdio_dev_write -ffffffff82868720 T bwfm_sdio_intr -ffffffff82868770 T bwfm_sdio_ram_read_write -ffffffff828689f0 T bwfm_sdio_htclk -ffffffff82868cb0 T bwfm_sdio_readshared -ffffffff82868da0 T bwfm_sdio_dev_read -ffffffff82868de0 T bwfm_sdio_rx_frames -ffffffff82869210 T bwfm_sdio_tx_frames -ffffffff82869330 T bwfm_sdio_backplane -ffffffff82869400 T bwfm_sdio_buf_read -ffffffff82869500 T bwfm_sdio_buf_write -ffffffff828695d0 T bwfm_sdio_frame_read_write -ffffffff82869780 T bwfm_sdio_newbuf -ffffffff82869810 T bwfm_sdio_tx_ok -ffffffff82869870 T bwfm_sdio_tx_ctrlframe -ffffffff82869980 T bwfm_sdio_tx_dataframe -ffffffff82869af0 T bwfm_sdio_rx_glom -ffffffff8286a000 T onewire_match -ffffffff8286a060 T onewire_attach -ffffffff8286a120 T onewire_detach -ffffffff8286a190 T onewire_activate -ffffffff8286a1b0 T onewire_scan -ffffffff8286a400 T onewire_createthread -ffffffff8286a470 T onewire_print -ffffffff8286a560 T onewirebus_print -ffffffff8286a5b0 T onewire_lock -ffffffff8286a5d0 T onewire_unlock -ffffffff8286a5f0 T onewire_reset -ffffffff8286a610 T onewire_bit -ffffffff8286a630 T onewire_read_byte -ffffffff8286a7c0 T onewire_write_byte -ffffffff8286a8d0 T onewire_read_block -ffffffff8286a970 T onewire_write_block -ffffffff8286aa10 T onewire_triplet -ffffffff8286ab20 T onewire_matchrom -ffffffff8286ad10 T onewire_search -ffffffff8286b180 T onewire_thread -ffffffff8286c000 T onewire_crc -ffffffff8286c0b0 T onewire_crc16 -ffffffff8286c170 T onewire_famname -ffffffff8286c1b0 T onewire_matchbyfam -ffffffff8286d000 T owid_match -ffffffff8286d030 T owid_attach -ffffffff8286d120 T owid_detach -ffffffff8286d170 T owid_activate -ffffffff8286e000 T owsbm_match -ffffffff8286e030 T owsbm_attach -ffffffff8286e240 T owsbm_detach -ffffffff8286e2d0 T owsbm_activate -ffffffff8286e300 T owsbm_update -ffffffff8286f000 T owtemp_match -ffffffff8286f030 T owtemp_attach -ffffffff8286f160 T owtemp_detach -ffffffff8286f1f0 T owtemp_activate -ffffffff8286f220 T owtemp_update -ffffffff82870000 T owctr_match -ffffffff82870030 T owctr_attach -ffffffff828701c0 T owctr_detach -ffffffff82870250 T owctr_activate -ffffffff82870280 T owctr_update -ffffffff828702c0 T owctr_update_counter -ffffffff82871000 A __text_page_start -ffffffff82871000 T Xsyscall_meltdown -ffffffff8287100c T Xsyscall -ffffffff82871299 t Xsyscall_trampback -ffffffff828712b0 T intr_user_exit -ffffffff828712f2 t intr_user_exit_post_ast -ffffffff8287144b t Xiretq_trampback -ffffffff82871457 T doreti_iret -ffffffff82872000 T alltraps -ffffffff82872138 T recall_trap -ffffffff82872150 T alltraps_kern -ffffffff82872153 T alltraps_kern_meltdown -ffffffff82873000 ? Xtrap00 -ffffffff82873000 A __kutext_start -ffffffff82873000 A __text_page_end -ffffffff82873010 ? Xtrap01 -ffffffff82873020 ? Xtrap02 -ffffffff82873028 c calltrap_specstk -ffffffff828730f0 ? calltrap_specstk_tramp -ffffffff82873110 ? Xtrap03 -ffffffff82873120 ? Xtrap04 -ffffffff82873130 ? Xtrap05 -ffffffff82873140 ? Xtrap06 -ffffffff82873150 ? Xtrap07 -ffffffff82873160 ? Xtrap08 -ffffffff82873170 ? Xtrap09 -ffffffff82873180 ? Xtrap0a -ffffffff82873190 ? Xtrap0b -ffffffff828731a0 ? Xtrap0c -ffffffff828731b0 ? Xtrap0d -ffffffff82873240 ? Xtrap0e -ffffffff82873250 ? Xintrspurious -ffffffff82873250 ? Xtrap0f -ffffffff82873260 ? Xtrap10 -ffffffff82873270 ? Xtrap11 -ffffffff82873280 ? Xtrap12 -ffffffff82873290 ? Xtrap13 -ffffffff828732a0 ? Xtrap14 -ffffffff828732b0 ? Xtrap15 -ffffffff828732c0 ? Xtrap16 -ffffffff828732c0 ? Xtrap17 -ffffffff828732c0 ? Xtrap18 -ffffffff828732c0 ? Xtrap19 -ffffffff828732c0 ? Xtrap1a -ffffffff828732c0 ? Xtrap1b -ffffffff828732c0 ? Xtrap1c -ffffffff828732c0 ? Xtrap1d -ffffffff828732c0 ? Xtrap1e -ffffffff828732c0 ? Xtrap1f -ffffffff828732d0 ? x2apic_eoi -ffffffff828732f0 ? Xintr_lapic_ipi -ffffffff82873330 ? Xipi_invltlb -ffffffff82873360 ? Xipi_invept -ffffffff828733a0 ? Xipi_invlpg -ffffffff828733d0 ? Xipi_invlrange -ffffffff82873410 ? Xipi_invltlb_pcid -ffffffff82873450 ? Xipi_invlpg_pcid -ffffffff828734a0 ? Xipi_invlrange_pcid -ffffffff82873510 ? Xipi_wbinvd -ffffffff82873530 ? Xintr_lapic_ltimer -ffffffff82873570 ? Xintr_xen_upcall -ffffffff828735b0 ? Xintr_hyperv_upcall -ffffffff828735f0 ? Xintr_legacy0 -ffffffff82873630 ? Xintr_legacy1 -ffffffff82873670 ? Xintr_legacy2 -ffffffff828736b0 ? Xintr_legacy3 -ffffffff828736f0 ? Xintr_legacy4 -ffffffff82873730 ? Xintr_legacy5 -ffffffff82873770 ? Xintr_legacy6 -ffffffff828737b0 ? Xintr_legacy7 -ffffffff828737f0 ? Xintr_legacy8 -ffffffff82873830 ? Xintr_legacy9 -ffffffff82873870 ? Xintr_legacy10 -ffffffff828738b0 ? Xintr_legacy11 -ffffffff828738f0 ? Xintr_legacy12 -ffffffff82873930 ? Xintr_legacy13 -ffffffff82873970 ? Xintr_legacy14 -ffffffff828739b0 ? Xintr_legacy15 -ffffffff828739f0 ? Xintr_ioapic_edge0 -ffffffff82873a30 ? Xintr_ioapic_edge1 -ffffffff82873a70 ? Xintr_ioapic_edge2 -ffffffff82873ab0 ? Xintr_ioapic_edge3 -ffffffff82873af0 ? Xintr_ioapic_edge4 -ffffffff82873b30 ? Xintr_ioapic_edge5 -ffffffff82873b70 ? Xintr_ioapic_edge6 -ffffffff82873bb0 ? Xintr_ioapic_edge7 -ffffffff82873bf0 ? Xintr_ioapic_edge8 -ffffffff82873c30 ? Xintr_ioapic_edge9 -ffffffff82873c70 ? Xintr_ioapic_edge10 -ffffffff82873cb0 ? Xintr_ioapic_edge11 -ffffffff82873cf0 ? Xintr_ioapic_edge12 -ffffffff82873d30 ? Xintr_ioapic_edge13 -ffffffff82873d70 ? Xintr_ioapic_edge14 -ffffffff82873db0 ? Xintr_ioapic_edge15 -ffffffff82873df0 ? Xintr_ioapic_edge16 -ffffffff82873e30 ? Xintr_ioapic_edge17 -ffffffff82873e70 ? Xintr_ioapic_edge18 -ffffffff82873eb0 ? Xintr_ioapic_edge19 -ffffffff82873ef0 ? Xintr_ioapic_edge20 -ffffffff82873f30 ? Xintr_ioapic_edge21 -ffffffff82873f70 ? Xintr_ioapic_edge22 -ffffffff82873fb0 ? Xintr_ioapic_edge23 -ffffffff82873ff0 ? Xintr_ioapic_edge24 -ffffffff82874030 ? Xintr_ioapic_edge25 -ffffffff82874070 ? Xintr_ioapic_edge26 -ffffffff828740b0 ? Xintr_ioapic_edge27 -ffffffff828740f0 ? Xintr_ioapic_edge28 -ffffffff82874130 ? Xintr_ioapic_edge29 -ffffffff82874170 ? Xintr_ioapic_edge30 -ffffffff828741b0 ? Xintr_ioapic_edge31 -ffffffff828741f0 ? Xintr_ioapic_edge32 -ffffffff82874230 ? Xintr_ioapic_edge33 -ffffffff82874270 ? Xintr_ioapic_edge34 -ffffffff828742b0 ? Xintr_ioapic_edge35 -ffffffff828742f0 ? Xintr_ioapic_edge36 -ffffffff82874330 ? Xintr_ioapic_edge37 -ffffffff82874370 ? Xintr_ioapic_edge38 -ffffffff828743b0 ? Xintr_ioapic_edge39 -ffffffff828743f0 ? Xintr_ioapic_edge40 -ffffffff82874430 ? Xintr_ioapic_edge41 -ffffffff82874470 ? Xintr_ioapic_edge42 -ffffffff828744b0 ? Xintr_ioapic_edge43 -ffffffff828744f0 ? Xintr_ioapic_edge44 -ffffffff82874530 ? Xintr_ioapic_edge45 -ffffffff82874570 ? Xintr_ioapic_edge46 -ffffffff828745b0 ? Xintr_ioapic_edge47 -ffffffff828745f0 ? Xintr_ioapic_edge48 -ffffffff82874630 ? Xintr_ioapic_edge49 -ffffffff82874670 ? Xintr_ioapic_edge50 -ffffffff828746b0 ? Xintr_ioapic_edge51 -ffffffff828746f0 ? Xintr_ioapic_edge52 -ffffffff82874730 ? Xintr_ioapic_edge53 -ffffffff82874770 ? Xintr_ioapic_edge54 -ffffffff828747b0 ? Xintr_ioapic_edge55 -ffffffff828747f0 ? Xintr_ioapic_edge56 -ffffffff82874830 ? Xintr_ioapic_edge57 -ffffffff82874870 ? Xintr_ioapic_edge58 -ffffffff828748b0 ? Xintr_ioapic_edge59 -ffffffff828748f0 ? Xintr_ioapic_edge60 -ffffffff82874930 ? Xintr_ioapic_edge61 -ffffffff82874970 ? Xintr_ioapic_edge62 -ffffffff828749b0 ? Xintr_ioapic_edge63 -ffffffff828749f0 ? Xintr_ioapic_level0 -ffffffff82874a30 ? Xintr_ioapic_level1 -ffffffff82874a70 ? Xintr_ioapic_level2 -ffffffff82874ab0 ? Xintr_ioapic_level3 -ffffffff82874af0 ? Xintr_ioapic_level4 -ffffffff82874b30 ? Xintr_ioapic_level5 -ffffffff82874b70 ? Xintr_ioapic_level6 -ffffffff82874bb0 ? Xintr_ioapic_level7 -ffffffff82874bf0 ? Xintr_ioapic_level8 -ffffffff82874c30 ? Xintr_ioapic_level9 -ffffffff82874c70 ? Xintr_ioapic_level10 -ffffffff82874cb0 ? Xintr_ioapic_level11 -ffffffff82874cf0 ? Xintr_ioapic_level12 -ffffffff82874d30 ? Xintr_ioapic_level13 -ffffffff82874d70 ? Xintr_ioapic_level14 -ffffffff82874db0 ? Xintr_ioapic_level15 -ffffffff82874df0 ? Xintr_ioapic_level16 -ffffffff82874e30 ? Xintr_ioapic_level17 -ffffffff82874e70 ? Xintr_ioapic_level18 -ffffffff82874eb0 ? Xintr_ioapic_level19 -ffffffff82874ef0 ? Xintr_ioapic_level20 -ffffffff82874f30 ? Xintr_ioapic_level21 -ffffffff82874f70 ? Xintr_ioapic_level22 -ffffffff82874fb0 ? Xintr_ioapic_level23 -ffffffff82874ff0 ? Xintr_ioapic_level24 -ffffffff82875030 ? Xintr_ioapic_level25 -ffffffff82875070 ? Xintr_ioapic_level26 -ffffffff828750b0 ? Xintr_ioapic_level27 -ffffffff828750f0 ? Xintr_ioapic_level28 -ffffffff82875130 ? Xintr_ioapic_level29 -ffffffff82875170 ? Xintr_ioapic_level30 -ffffffff828751b0 ? Xintr_ioapic_level31 -ffffffff828751f0 ? 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mod_hdcp_hdcp2_validate_h_prime +ffffffff82528b20 T mod_hdcp_hdcp2_prepare_lc_init +ffffffff82528c40 T mod_hdcp_hdcp2_validate_l_prime +ffffffff82528d90 T mod_hdcp_hdcp2_prepare_eks +ffffffff82528f00 T mod_hdcp_hdcp2_enable_encryption +ffffffff82529080 T mod_hdcp_hdcp2_validate_rx_id_list +ffffffff82529230 T mod_hdcp_hdcp2_enable_dp_stream_encryption +ffffffff825293d0 T mod_hdcp_hdcp2_prepare_stream_management +ffffffff82529500 T mod_hdcp_hdcp2_validate_stream_ready +ffffffff8252a000 T mod_build_vsc_infopacket +ffffffff8252a260 T mod_build_hf_vsif_infopacket +ffffffff8252a3d0 T mod_build_adaptive_sync_infopacket +ffffffff8252a490 T mod_build_adaptive_sync_infopacket_v2 +ffffffff8252a500 T mod_build_adaptive_sync_infopacket_v1 +ffffffff8252b000 T dmub_init_abm_config +ffffffff8252b580 t fill_iram_v_2_3 +ffffffff8252ba30 T dmcu_load_iram +ffffffff8252c260 T is_psr_su_specific_panel +ffffffff8252c300 T mod_power_calc_psr_configs +ffffffff8252c400 T init_replay_config +ffffffff8252c450 T mod_power_only_edp +ffffffff8252c4a0 T psr_su_set_dsc_slice_height +ffffffff8252c5a0 T fill_custom_backlight_caps +ffffffff8252d000 T mod_vmid_get_for_ptb +ffffffff8252d240 T mod_vmid_reset +ffffffff8252d300 T mod_vmid_create +ffffffff8252d450 T mod_vmid_destroy +ffffffff8252e000 T amdgpu_dpm_get_sclk +ffffffff8252e0b0 T amdgpu_dpm_get_mclk +ffffffff8252e160 T amdgpu_dpm_set_powergating_by_smu +ffffffff8252e260 T amdgpu_dpm_set_gfx_power_up_by_imu +ffffffff8252e3f0 T amdgpu_dpm_baco_enter +ffffffff8252e4a0 T amdgpu_dpm_baco_exit +ffffffff8252e550 T amdgpu_dpm_set_mp1_state +ffffffff8252e600 T amdgpu_dpm_is_baco_supported +ffffffff8252e6d0 T amdgpu_dpm_mode2_reset +ffffffff8252e780 T amdgpu_dpm_enable_gfx_features +ffffffff8252e830 T amdgpu_dpm_baco_reset +ffffffff8252e900 T amdgpu_dpm_is_mode1_reset_supported +ffffffff8252e9a0 T amdgpu_dpm_mode1_reset +ffffffff8252ea40 T amdgpu_dpm_switch_power_profile +ffffffff8252eb00 T amdgpu_dpm_set_xgmi_pstate +ffffffff8252ebb0 T amdgpu_dpm_set_df_cstate +ffffffff8252ec60 T amdgpu_dpm_allow_xgmi_power_down +ffffffff8252ed00 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff8252edb0 T amdgpu_dpm_set_clockgating_by_smu +ffffffff8252ee60 T amdgpu_dpm_smu_i2c_bus_access +ffffffff8252ef20 T amdgpu_pm_acpi_event_handler +ffffffff8252eff0 T amdgpu_dpm_read_sensor +ffffffff8252f0c0 T amdgpu_dpm_get_apu_thermal_limit +ffffffff8252f170 T amdgpu_dpm_set_apu_thermal_limit +ffffffff8252f220 T amdgpu_dpm_compute_clocks +ffffffff8252f330 T amdgpu_dpm_enable_uvd +ffffffff8252f560 T amdgpu_dpm_enable_vce +ffffffff8252f790 T amdgpu_dpm_enable_jpeg +ffffffff8252f8b0 T amdgpu_pm_load_smu_firmware +ffffffff8252f980 T amdgpu_dpm_handle_passthrough_sbr +ffffffff8252fa20 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff8252fac0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff8252fb60 T amdgpu_dpm_get_dpm_freq_range +ffffffff8252fc20 T amdgpu_dpm_set_soft_freq_range +ffffffff8252fce0 T amdgpu_dpm_write_watermarks_table +ffffffff8252fd80 T amdgpu_dpm_wait_for_event +ffffffff8252fe30 T amdgpu_dpm_set_residency_gfxoff +ffffffff8252fed0 T amdgpu_dpm_get_residency_gfxoff +ffffffff8252ff70 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff82530010 T amdgpu_dpm_get_status_gfxoff +ffffffff825300b0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff82530110 T amdgpu_dpm_gfx_state_change +ffffffff82530180 T amdgpu_dpm_get_ecc_info +ffffffff82530220 T amdgpu_dpm_get_vce_clock_state +ffffffff825302d0 T amdgpu_dpm_get_current_power_state +ffffffff82530350 T amdgpu_dpm_set_power_state +ffffffff82530500 T amdgpu_dpm_dispatch_task +ffffffff825305c0 T amdgpu_dpm_get_performance_level +ffffffff82530660 T amdgpu_dpm_force_performance_level +ffffffff82530890 T amdgpu_dpm_get_pp_num_states +ffffffff82530940 T amdgpu_dpm_get_pp_table +ffffffff825309f0 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff82530ab0 T amdgpu_dpm_odn_edit_dpm_table +ffffffff82530b70 T amdgpu_dpm_print_clock_levels +ffffffff82530c20 T amdgpu_dpm_emit_clock_levels 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amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff82532850 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff82532900 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff825329b0 T amdgpu_dpm_get_uclk_dpm_states +ffffffff82532a70 T amdgpu_dpm_get_dpm_clock_table +ffffffff82533000 T amdgpu_dpm_get_active_displays +ffffffff825330a0 T amdgpu_dpm_get_vblank_time +ffffffff82533150 T amdgpu_dpm_get_vrefresh +ffffffff82534000 T amdgpu_pm_sysfs_init +ffffffff82534030 T amdgpu_pm_sysfs_fini +ffffffff82534060 T amdgpu_debugfs_pm_init +ffffffff82535000 T amdgpu_dpm_print_class_info +ffffffff82535340 T amdgpu_dpm_print_cap_info +ffffffff825353e0 T amdgpu_dpm_print_ps_status +ffffffff825354a0 T amdgpu_pm_print_power_states +ffffffff82535540 T amdgpu_get_platform_caps +ffffffff825355e0 T amdgpu_parse_extended_power_table +ffffffff82536420 t amdgpu_parse_clk_voltage_dep_table +ffffffff825364e0 T amdgpu_free_extended_power_table +ffffffff82536660 T amdgpu_add_thermal_controller +ffffffff82536b30 T amdgpu_get_vce_clock_state +ffffffff82536b70 T amdgpu_legacy_dpm_compute_clocks +ffffffff82537050 T amdgpu_dpm_thermal_work_handler +ffffffff82538000 t pp_early_init +ffffffff82538120 t pp_late_init +ffffffff82538250 t pp_sw_init +ffffffff825382f0 t pp_sw_fini +ffffffff82538350 t pp_hw_init +ffffffff825383b0 t pp_hw_fini +ffffffff82538430 t pp_late_fini +ffffffff825384a0 t pp_suspend +ffffffff82538500 t pp_resume +ffffffff82538520 t pp_is_idle +ffffffff82538550 t pp_wait_for_idle +ffffffff82538580 t pp_sw_reset +ffffffff825385b0 t pp_set_clockgating_state +ffffffff825385e0 t pp_set_powergating_state +ffffffff82538610 t pp_dpm_set_fan_control_mode +ffffffff82538680 t pp_dpm_get_fan_control_mode +ffffffff82538700 t pp_dpm_set_fan_speed_pwm +ffffffff82538760 t pp_dpm_get_fan_speed_pwm +ffffffff825387c0 t pp_dpm_force_clock_level +ffffffff82538820 t pp_dpm_print_clock_levels +ffffffff82538880 t pp_dpm_emit_clock_levels +ffffffff825388e0 t pp_dpm_force_performance_level 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t pp_set_min_deep_sleep_dcefclk +ffffffff82539fc0 t pp_get_asic_baco_capability +ffffffff8253a040 t pp_get_asic_baco_state +ffffffff8253a0b0 t pp_set_asic_baco_state +ffffffff8253a130 t pp_get_ppfeature_status +ffffffff8253a190 t pp_set_ppfeature_status +ffffffff8253a1e0 t pp_asic_reset_mode_2 +ffffffff8253a240 t pp_set_df_cstate +ffffffff8253a2b0 t pp_set_xgmi_pstate +ffffffff8253a320 t pp_get_gpu_metrics +ffffffff8253a380 t pp_get_prv_buffer_details +ffffffff8253a410 t pp_pm_compute_clocks +ffffffff8253a4f0 t pp_swctf_delayed_work_handler +ffffffff8253a670 t __delayed_work_tick +ffffffff8253b000 T ci_baco_set_state +ffffffff8253c000 T baco_program_registers +ffffffff8253c0d0 t baco_cmd_handler +ffffffff8253c2b0 T soc15_baco_program_registers +ffffffff8253d000 T fiji_baco_set_state +ffffffff8253e000 T phm_setup_asic +ffffffff8253e050 T phm_power_down_asic +ffffffff8253e0a0 T phm_set_power_state +ffffffff8253e120 T phm_enable_dynamic_state_management +ffffffff8253e1e0 T phm_disable_dynamic_state_management +ffffffff8253e280 T phm_force_dpm_levels +ffffffff8253e2d0 T phm_apply_state_adjust_rules +ffffffff8253e320 T phm_apply_clock_adjust_rules +ffffffff8253e370 T phm_powerdown_uvd +ffffffff8253e3c0 T phm_disable_clock_power_gatings +ffffffff8253e410 T phm_pre_display_configuration_changed +ffffffff8253e480 T phm_display_configuration_changed +ffffffff8253e4f0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff8253e560 T phm_stop_thermal_controller +ffffffff8253e5c0 T phm_register_irq_handlers +ffffffff8253e610 T phm_start_thermal_controller +ffffffff8253e760 T phm_check_smc_update_required_for_display_configuration +ffffffff8253e7c0 T phm_check_states_equal +ffffffff8253e810 T phm_store_dal_configuration_data +ffffffff8253e970 T phm_get_dal_power_level +ffffffff8253e9d0 T phm_set_cpu_power_state +ffffffff8253ea20 T phm_get_performance_level +ffffffff8253ea80 T phm_get_clock_info +ffffffff8253ec10 T phm_get_current_shallow_sleep_clocks +ffffffff8253ec60 T phm_get_clock_by_type +ffffffff8253ecb0 T phm_get_clock_by_type_with_latency +ffffffff8253ed00 T phm_get_clock_by_type_with_voltage +ffffffff8253ed50 T phm_set_watermarks_for_clocks_ranges +ffffffff8253eda0 T phm_display_clock_voltage_request +ffffffff8253edf0 T phm_get_max_high_clocks +ffffffff8253ee40 T phm_disable_smc_firmware_ctf +ffffffff8253eea0 T phm_set_active_display_count +ffffffff8253f000 T hwmgr_early_init +ffffffff8253f4a0 t polaris_set_asic_special_caps +ffffffff8253f520 T hwmgr_sw_init +ffffffff8253f5a0 T hwmgr_sw_fini +ffffffff8253f600 T hwmgr_hw_init +ffffffff8253f800 T hwmgr_hw_fini +ffffffff8253f8f0 T hwmgr_suspend +ffffffff8253f990 T hwmgr_resume +ffffffff8253fa50 T hwmgr_handle_task +ffffffff82540000 T polaris_baco_set_state +ffffffff82541000 T pp_override_get_default_fuse_value +ffffffff82542000 T psm_init_power_state_table +ffffffff82542350 T psm_fini_power_state_table +ffffffff82542430 T psm_set_boot_states +ffffffff825424e0 T psm_set_performance_states +ffffffff82542590 T psm_set_user_performance_state +ffffffff82542620 T psm_adjust_power_state_dynamic +ffffffff82543000 T atomctrl_initialize_mc_reg_table +ffffffff82543130 t atomctrl_retrieve_ac_timing +ffffffff82543290 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff825433c0 T atomctrl_set_engine_dram_timings_rv770 +ffffffff82543430 T atomctrl_get_memory_pll_dividers_si +ffffffff82543510 T atomctrl_get_memory_pll_dividers_vi +ffffffff82543590 T atomctrl_get_memory_pll_dividers_ai +ffffffff82543650 T atomctrl_get_engine_pll_dividers_kong +ffffffff825436d0 T atomctrl_get_engine_pll_dividers_vi +ffffffff825437a0 T atomctrl_get_engine_pll_dividers_ai +ffffffff82543890 T atomctrl_get_dfs_pll_dividers_vi +ffffffff82543960 T atomctrl_get_reference_clock +ffffffff825439d0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff82543a90 T atomctrl_get_voltage_table_v3 +ffffffff82543bf0 T atomctrl_get_pp_assign_pin +ffffffff82543cf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff82544200 t GetScaledFraction +ffffffff82544290 t fDecodeLeakageID +ffffffff825442f0 t fSqrt +ffffffff82544370 T atomctrl_get_voltage_evv_on_sclk +ffffffff825443f0 T atomctrl_get_voltage_evv +ffffffff825444b0 T atomctrl_get_mpll_reference_clock +ffffffff82544530 T atomctrl_is_asic_internal_ss_supported +ffffffff82544590 T atomctrl_get_memory_clock_spread_spectrum +ffffffff825446a0 T atomctrl_get_engine_clock_spread_spectrum +ffffffff825447b0 T atomctrl_read_efuse +ffffffff82544860 T atomctrl_set_ac_timing_ai +ffffffff825448d0 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff82544950 T atomctrl_get_smc_sclk_range_table +ffffffff82544a10 T atomctrl_get_vddc_shared_railinfo +ffffffff82544a90 T atomctrl_get_avfs_information +ffffffff82544c20 T atomctrl_get_svi2_info +ffffffff82544d00 T atomctrl_get_leakage_id_from_efuse +ffffffff82544d70 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff82544f10 T atomctrl_get_voltage_range +ffffffff82544fe0 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff82545070 T atomctrl_get_edc_leakage_table +ffffffff82546000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff825460e0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff825462c0 T pp_atomfwctrl_get_pp_assign_pin +ffffffff825463c0 T pp_atomfwctrl_enter_self_refresh +ffffffff825463f0 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff825464a0 T pp_atomfwctrl_get_avfs_information +ffffffff825467e0 T pp_atomfwctrl_get_gpio_information +ffffffff82546890 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff82546920 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff82546d10 T pp_atomfwctrl_get_smc_dpm_information +ffffffff82547000 T encode_pcie_lane_width +ffffffff82547030 T decode_pcie_lane_width +ffffffff82548000 t pp_tables_v1_0_initialize +ffffffff82549590 t pp_tables_v1_0_uninitialize +ffffffff825497b0 T get_number_of_powerplay_table_entries_v1_0 +ffffffff82549870 T get_powerplay_table_entry_v1_0 +ffffffff8254a000 T pp_tables_get_response_times +ffffffff8254a0f0 T pp_tables_get_num_of_entries +ffffffff8254a1c0 T pp_tables_get_entry +ffffffff8254a520 t init_non_clock_fields +ffffffff8254a660 t pp_tables_initialize +ffffffff8254b910 t pp_tables_uninitialize +ffffffff8254bba0 t get_number_of_vce_state_table_entries +ffffffff8254bc90 t get_vce_state_table_entry +ffffffff8254c000 T smu10_init_function_pointers +ffffffff8254c040 t smu10_hwmgr_backend_init +ffffffff8254c770 t smu10_hwmgr_backend_fini +ffffffff8254c8f0 t smu10_setup_asic_task +ffffffff8254c960 t smu10_get_power_state_size +ffffffff8254c990 t smu10_apply_state_adjust_rules +ffffffff8254c9c0 t smu10_dpm_force_dpm_level +ffffffff8254d080 t smu10_enable_dpm_tasks +ffffffff8254d150 t smu10_disable_dpm_tasks +ffffffff8254d180 t smu10_dpm_patch_boot_state +ffffffff8254d1b0 t smu10_dpm_get_pp_table_entry +ffffffff8254d210 t smu10_dpm_get_num_of_pp_table_entries +ffffffff8254d270 t smu10_powergate_vcn +ffffffff8254d330 t smu10_dpm_get_mclk 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smu7_fan_ctrl_get_fan_speed_rpm +ffffffff8255e230 T smu7_fan_ctrl_set_static_mode +ffffffff8255e390 T smu7_fan_ctrl_set_default_mode +ffffffff8255e4a0 T smu7_fan_ctrl_start_smc_fan_control +ffffffff8255e5f0 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff8255e610 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff8255e840 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff8255ea90 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff8255ecc0 T smu7_thermal_get_temperature +ffffffff8255ed20 T smu7_thermal_disable_alert +ffffffff8255ede0 T smu7_thermal_stop_thermal_controller +ffffffff8255efa0 T smu7_start_thermal_controller +ffffffff8255f3f0 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff82560000 T smu8_init_function_pointers +ffffffff82560040 t smu8_hwmgr_backend_init +ffffffff82560550 t smu8_hwmgr_backend_fini +ffffffff825605e0 t smu8_setup_asic_task +ffffffff82560bc0 t smu8_get_power_state_size +ffffffff82560bf0 t smu8_apply_state_adjust_rules +ffffffff82560d70 t smu8_dpm_force_dpm_level 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phm_trim_voltage_table_to_fit_state_table +ffffffff82564dd0 T phm_reset_single_dpm_table +ffffffff82564e30 T phm_setup_pcie_table_entry +ffffffff82564e70 T phm_get_dpm_level_enable_mask_value +ffffffff82564f50 T phm_get_voltage_index +ffffffff82564fd0 T phm_get_voltage_id +ffffffff82565050 T phm_find_closest_vddci +ffffffff825650c0 T phm_find_boot_level +ffffffff82565130 T phm_get_sclk_for_voltage_evv +ffffffff825651f0 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff82565310 T phm_get_lowest_enabled_level +ffffffff82565350 T phm_apply_dal_min_voltage_request +ffffffff82565420 T phm_get_voltage_evv_on_sclk +ffffffff825654e0 T phm_irq_process +ffffffff825656b0 T smu9_register_irq_handlers +ffffffff82565780 T smu_atom_get_data_table +ffffffff825657f0 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff82565900 T smu_set_watermarks_for_clocks_ranges +ffffffff82566000 T tonga_baco_set_state +ffffffff82567000 T vega10_baco_set_state +ffffffff82568000 T vega10_enable_disable_vce_dpm +ffffffff825680a0 T vega10_hwmgr_init +ffffffff82568100 t vega10_hwmgr_backend_init +ffffffff82568fd0 t vega10_hwmgr_backend_fini +ffffffff82569060 t vega10_setup_asic_task +ffffffff825691b0 t vega10_get_power_state_size +ffffffff825691e0 t vega10_apply_state_adjust_rules +ffffffff825695b0 t vega10_dpm_force_dpm_level +ffffffff82569a70 t vega10_enable_dpm_tasks +ffffffff8256cc10 t vega10_disable_dpm_tasks +ffffffff8256d2d0 t vega10_patch_boot_state +ffffffff8256d300 t vega10_get_pp_table_entry +ffffffff8256d380 t vega10_power_gate_vce +ffffffff8256d430 t vega10_power_gate_uvd +ffffffff8256d4e0 t vega10_dpm_get_mclk +ffffffff8256d590 t vega10_dpm_get_sclk +ffffffff8256d640 t vega10_set_power_state_tasks +ffffffff8256e040 t vega10_notify_smc_display_config_after_ps_adjustment +ffffffff8256e200 t vega10_display_configuration_changed_task +ffffffff8256e2e0 t vega10_set_fan_control_mode +ffffffff8256e350 t vega10_get_fan_control_mode +ffffffff8256e390 t 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vega10_initialize_power_tune_defaults +ffffffff82574240 T vega10_set_power_limit +ffffffff825742a0 T vega10_enable_power_containment +ffffffff825743e0 T vega10_disable_power_containment +ffffffff825744d0 T vega10_power_control_set_level +ffffffff82574540 t vega10_didt_set_mask +ffffffff82575000 t vega10_pp_tables_initialize +ffffffff825767a0 t vega10_pp_tables_uninitialize +ffffffff825769c0 T vega10_get_number_of_powerplay_table_entries +ffffffff82576a80 T vega10_get_powerplay_table_entry +ffffffff82576c20 T vega10_baco_set_cap +ffffffff82577000 T vega10_fan_ctrl_get_fan_speed_info +ffffffff82577080 T vega10_fan_ctrl_get_fan_speed_pwm +ffffffff825771d0 T vega10_fan_ctrl_get_fan_speed_rpm +ffffffff825772f0 T vega10_fan_ctrl_set_static_mode +ffffffff82577610 T vega10_fan_ctrl_set_default_mode +ffffffff82577880 T vega10_fan_ctrl_start_smc_fan_control +ffffffff82577960 T vega10_fan_ctrl_stop_smc_fan_control +ffffffff82577a40 T vega10_fan_ctrl_set_fan_speed_pwm +ffffffff82577cb0 T vega10_fan_ctrl_reset_fan_speed_to_default +ffffffff82577d90 T vega10_fan_ctrl_set_fan_speed_rpm +ffffffff82577fb0 T vega10_thermal_get_temperature +ffffffff82578050 T vega10_thermal_disable_alert +ffffffff82578170 T vega10_thermal_stop_thermal_controller +ffffffff825781d0 T vega10_enable_mgpu_fan_boost +ffffffff82578310 T vega10_start_thermal_controller +ffffffff82578970 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff82579000 T vega12_baco_set_state +ffffffff8257a000 T vega12_enable_disable_vce_dpm +ffffffff8257a0a0 T vega12_hwmgr_init +ffffffff8257a0e0 t vega12_hwmgr_backend_init +ffffffff8257a960 t vega12_hwmgr_backend_fini +ffffffff8257a9c0 t vega12_setup_asic_task +ffffffff8257aa00 t vega12_apply_clocks_adjust_rules +ffffffff8257adc0 t vega12_dpm_force_dpm_level +ffffffff8257b280 t vega12_enable_dpm_tasks +ffffffff8257bf00 t vega12_disable_dpm_tasks +ffffffff8257c020 t vega12_patch_boot_state +ffffffff8257c050 t vega12_power_gate_vce +ffffffff8257c100 t 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vega20_get_power_profile_mode +ffffffff825872a0 t vega20_set_power_profile_mode +ffffffff82587670 t vega20_odn_edit_dpm_table +ffffffff82587b40 t vega20_enable_mgpu_fan_boost +ffffffff82587bb0 t vega20_get_ppfeature_status +ffffffff82587c40 t vega20_set_ppfeature_status +ffffffff82587d60 t vega20_set_mp1_state +ffffffff82587e00 t vega20_smu_i2c_bus_access +ffffffff82587ea0 t vega20_set_df_cstate +ffffffff82587f20 t vega20_set_xgmi_pstate +ffffffff82587f90 t vega20_get_gpu_metrics +ffffffff82588280 t vega20_upload_dpm_min_level +ffffffff82588540 t vega20_upload_dpm_max_level +ffffffff825887b0 t vega20_enable_all_smu_features +ffffffff825888c0 t vega20_override_pcie_parameters +ffffffff82588b60 t vega20_setup_default_dpm_tables +ffffffff82589110 t vega20_init_max_sustainable_clocks +ffffffff82589550 t vega20_od8_initialize_default_settings +ffffffff82589c40 t vega20_populate_umdpstate_clocks +ffffffff82589ce0 t vega20_setup_single_dpm_table +ffffffff82589e20 t vega20_setup_memclk_dpm_table +ffffffff82589ed0 t vega20_get_max_sustainable_clock +ffffffff8258a000 T vega20_set_power_limit +ffffffff8258a050 T vega20_validate_power_level_request +ffffffff8258a090 T vega20_power_control_set_level +ffffffff8258b000 t vega20_pp_tables_initialize +ffffffff8258b7b0 t vega20_pp_tables_uninitialize +ffffffff8258c000 T vega20_fan_ctrl_stop_smc_fan_control +ffffffff8258c0a0 T vega20_fan_ctrl_start_smc_fan_control +ffffffff8258c140 T vega20_fan_ctrl_get_fan_speed_pwm +ffffffff8258c290 T vega20_fan_ctrl_set_fan_speed_pwm +ffffffff8258c4d0 t vega20_fan_ctrl_set_static_mode +ffffffff8258c6d0 T vega20_fan_ctrl_get_fan_speed_info +ffffffff8258c710 T vega20_fan_ctrl_get_fan_speed_rpm +ffffffff8258c780 T vega20_fan_ctrl_set_fan_speed_rpm +ffffffff8258c960 T vega20_thermal_get_temperature +ffffffff8258ca00 T vega20_thermal_disable_alert +ffffffff8258ca90 T vega20_thermal_stop_thermal_controller +ffffffff8258cb20 T vega20_start_thermal_controller +ffffffff8258d000 t ci_smu_init +ffffffff8258d070 t ci_smu_fini +ffffffff8258d0d0 t ci_start_smu +ffffffff8258d100 t ci_send_msg_to_smc +ffffffff8258d1c0 t ci_send_msg_to_smc_with_parameter +ffffffff8258d2a0 t ci_update_smc_table +ffffffff8258d510 t ci_process_firmware_header +ffffffff8258dba0 t ci_update_sclk_threshold +ffffffff8258dec0 t ci_thermal_setup_fan_table +ffffffff8258e160 t ci_init_smc_table +ffffffff8258ef20 t ci_populate_all_graphic_levels +ffffffff8258f3e0 t ci_populate_all_memory_levels +ffffffff8258fcd0 t ci_initialize_mc_reg_table +ffffffff82590a10 t ci_get_offsetof +ffffffff82590a60 t ci_get_mac_definition +ffffffff82590aa0 t ci_is_dpm_running +ffffffff82590b30 t ci_update_dpm_settings +ffffffff82590f70 t ci_stop_smc +ffffffff82591050 t ci_copy_bytes_to_smc +ffffffff82591380 t ci_program_memory_timing_parameters +ffffffff82591580 t ci_populate_smc_acp_level +ffffffff82591690 t ci_populate_smc_uvd_level +ffffffff82591800 t ci_populate_smc_boot_level +ffffffff82591910 t ci_populate_smc_initial_state +ffffffff825919c0 t ci_populate_bapm_parameters_in_dpm_table +ffffffff82591b50 t ci_populate_vr_config +ffffffff82591bf0 t ci_populate_initial_mc_reg_table +ffffffff82591f20 t ci_populate_pm_fuses +ffffffff82592630 t ci_start_smc +ffffffff82592730 t ci_populate_smc_voltage_table +ffffffff82593000 t fiji_smu_init +ffffffff825930b0 t fiji_start_smu +ffffffff82593720 t fiji_update_smc_table +ffffffff825938f0 t fiji_process_firmware_header +ffffffff82593a70 t fiji_update_sclk_threshold +ffffffff82593b60 t fiji_thermal_setup_fan_table +ffffffff82593e40 t fiji_thermal_avfs_enable +ffffffff82593e90 t fiji_init_smc_table +ffffffff82594a70 t fiji_populate_all_graphic_levels +ffffffff82595060 t fiji_populate_all_memory_levels +ffffffff82595440 t fiji_initialize_mc_reg_table +ffffffff82595640 t fiji_get_offsetof +ffffffff825956d0 t fiji_get_mac_definition +ffffffff82595730 t fiji_is_dpm_running +ffffffff82595790 t fiji_is_hw_avfs_present +ffffffff82595800 t fiji_update_dpm_settings +ffffffff82595c40 t fiji_program_memory_timing_parameters +ffffffff82595e30 t fiji_populate_smc_acp_level +ffffffff82595f80 t fiji_populate_smc_uvd_level +ffffffff82596150 t fiji_populate_smc_boot_level +ffffffff82596240 t fiji_populate_smc_initailial_state +ffffffff825962f0 t fiji_populate_bapm_parameters_in_dpm_table +ffffffff825965d0 t fiji_populate_clock_stretcher_data_table +ffffffff82596c00 t fiji_populate_vr_config +ffffffff82596cc0 t fiji_init_arb_table_index +ffffffff82596d50 t fiji_populate_pm_fuses +ffffffff82596fd0 t fiji_setup_dpm_led_config +ffffffff825970a0 t fiji_get_dependency_volt_by_clk +ffffffff82598000 t iceland_smu_init +ffffffff825980b0 t iceland_start_smu +ffffffff825984f0 t iceland_request_smu_load_specific_fw +ffffffff82598520 t iceland_process_firmware_header +ffffffff825986d0 t iceland_update_sclk_threshold +ffffffff82598a00 t iceland_thermal_setup_fan_table +ffffffff82598ca0 t iceland_init_smc_table +ffffffff825997a0 t iceland_populate_all_graphic_levels +ffffffff82599d70 t iceland_populate_all_memory_levels +ffffffff8259a600 t iceland_initialize_mc_reg_table +ffffffff8259b340 t iceland_get_offsetof +ffffffff8259b3d0 t iceland_get_mac_definition +ffffffff8259b440 t iceland_is_dpm_running +ffffffff8259b4a0 t iceland_program_memory_timing_parameters +ffffffff8259b6a0 t iceland_populate_smc_boot_level +ffffffff8259b7c0 t iceland_populate_smc_initial_state +ffffffff8259b870 t iceland_populate_bapm_parameters_in_dpm_table +ffffffff8259ba00 t iceland_populate_smc_svi2_config +ffffffff8259bab0 t iceland_populate_initial_mc_reg_table +ffffffff8259bde0 t iceland_populate_pm_fuses +ffffffff8259c140 t iceland_populate_smc_voltage_table +ffffffff8259d000 t polaris10_smu_init +ffffffff8259d0b0 t polaris10_start_smu +ffffffff8259d7e0 t polaris10_update_smc_table +ffffffff8259da70 t polaris10_process_firmware_header +ffffffff8259dbf0 t polaris10_update_sclk_threshold +ffffffff8259dce0 t polaris10_thermal_setup_fan_table +ffffffff8259dfc0 t polaris10_thermal_avfs_enable +ffffffff8259e060 t polaris10_init_smc_table +ffffffff8259f180 t polaris10_populate_all_graphic_levels +ffffffff8259f950 t polaris10_populate_all_memory_levels +ffffffff8259fcb0 t polaris10_initialize_mc_reg_table +ffffffff8259fd30 t polaris10_get_offsetof +ffffffff8259fdc0 t polaris10_get_mac_definition +ffffffff8259fe20 t polaris10_is_dpm_running +ffffffff8259fe80 t polaris10_is_hw_avfs_present +ffffffff8259fee0 t polaris10_update_dpm_settings +ffffffff825a0320 t polaris10_program_memory_timing_parameters +ffffffff825a0530 t polaris10_populate_smc_samu_level +ffffffff825a06c0 t polaris10_populate_smc_uvd_level +ffffffff825a08f0 t polaris10_populate_smc_boot_level +ffffffff825a0a00 t polaris10_populate_smc_initailial_state +ffffffff825a0ab0 t polaris10_populate_bapm_parameters_in_dpm_table +ffffffff825a0c50 t polaris10_populate_clock_stretcher_data_table +ffffffff825a0f00 t polaris10_populate_avfs_parameters +ffffffff825a1580 t polaris10_populate_vr_config +ffffffff825a16b0 t polaris10_populate_pm_fuses +ffffffff825a1930 t polaris10_get_dependency_volt_by_clk +ffffffff825a1b20 t polaris10_calculate_sclk_params +ffffffff825a2000 t smu10_smu_init +ffffffff825a2150 t smu10_smu_fini +ffffffff825a2200 t smu10_start_smu +ffffffff825a22d0 t smu10_read_arg_from_smc +ffffffff825a2330 t smu10_send_msg_to_smc +ffffffff825a25d0 t smu10_send_msg_to_smc_with_parameter +ffffffff825a28e0 t smu10_smc_table_manager +ffffffff825a3000 T smu7_copy_bytes_from_smc +ffffffff825a32b0 T smu7_read_smc_sram_dword +ffffffff825a33e0 T smu7_copy_bytes_to_smc +ffffffff825a3740 T smu7_program_jump_on_start +ffffffff825a37a0 T smu7_is_smc_ram_running +ffffffff825a3830 T smu7_send_msg_to_smc +ffffffff825a3930 T smu7_send_msg_to_smc_with_parameter +ffffffff825a3a70 T smu7_get_argument +ffffffff825a3a90 T smu7_send_msg_to_smc_offset +ffffffff825a3ab0 T smu7_convert_fw_type_to_cgs +ffffffff825a3b80 T smu7_write_smc_sram_dword +ffffffff825a3ca0 T smu7_request_smu_load_fw +ffffffff825a46f0 T smu7_check_fw_load_finish +ffffffff825a4750 T smu7_reload_firmware +ffffffff825a4770 T smu7_upload_smu_firmware_image +ffffffff825a4970 T smu7_setup_pwr_virus +ffffffff825a4e10 T smu7_init +ffffffff825a4f50 T smu7_smu_fini +ffffffff825a6000 t smu8_smu_init +ffffffff825a62e0 t smu8_smu_fini +ffffffff825a6390 t smu8_start_smu +ffffffff825a7630 t smu8_check_fw_load_finish +ffffffff825a7740 t smu8_get_argument +ffffffff825a7790 t smu8_send_msg_to_smc +ffffffff825a77a0 t smu8_send_msg_to_smc_with_parameter +ffffffff825a7a00 t smu8_download_pptable_settings +ffffffff825a7b00 t smu8_upload_pptable_settings +ffffffff825a7c00 t smu8_is_dpm_running +ffffffff825a8000 T smu9_is_smc_ram_running +ffffffff825a8050 T smu9_send_msg_to_smc +ffffffff825a81c0 t smu9_wait_for_response +ffffffff825a82e0 t smu9_send_msg_to_smc_without_waiting +ffffffff825a8390 T smu9_send_msg_to_smc_with_parameter +ffffffff825a85e0 T smu9_get_argument +ffffffff825a9000 T smum_thermal_avfs_enable +ffffffff825a9050 T smum_thermal_setup_fan_table +ffffffff825a9090 T smum_update_sclk_threshold +ffffffff825a90d0 T smum_update_smc_table +ffffffff825a9110 T smum_get_offsetof +ffffffff825a9160 T smum_process_firmware_header +ffffffff825a91a0 T smum_get_mac_definition +ffffffff825a91f0 T smum_download_powerplay_table +ffffffff825a9230 T smum_upload_powerplay_table +ffffffff825a9270 T smum_send_msg_to_smc +ffffffff825a9350 T smum_send_msg_to_smc_with_parameter +ffffffff825a9440 T smum_init_smc_table +ffffffff825a9490 T smum_populate_all_graphic_levels +ffffffff825a94e0 T smum_populate_all_memory_levels +ffffffff825a9530 T smum_initialize_mc_reg_table +ffffffff825a9580 T smum_is_dpm_running +ffffffff825a95d0 T smum_is_hw_avfs_present +ffffffff825a9620 T smum_update_dpm_settings +ffffffff825a9670 T smum_smc_table_manager +ffffffff825a96c0 T smum_stop_smc +ffffffff825aa000 t tonga_smu_init +ffffffff825aa0b0 t tonga_start_smu +ffffffff825aa550 t tonga_update_smc_table +ffffffff825aa710 t tonga_process_firmware_header +ffffffff825aa890 t tonga_update_sclk_threshold +ffffffff825aabc0 t tonga_thermal_setup_fan_table +ffffffff825aae60 t tonga_init_smc_table +ffffffff825abf00 t tonga_populate_all_graphic_levels +ffffffff825ac4f0 t tonga_populate_all_memory_levels +ffffffff825acc30 t tonga_initialize_mc_reg_table +ffffffff825ad970 t tonga_get_offsetof +ffffffff825ada00 t tonga_get_mac_definition +ffffffff825ada60 t tonga_is_dpm_running +ffffffff825adac0 t tonga_update_dpm_settings +ffffffff825adf00 t tonga_program_memory_timing_parameters +ffffffff825ae100 t tonga_populate_smc_acp_level +ffffffff825ae2a0 t tonga_populate_smc_uvd_level +ffffffff825ae4c0 t tonga_populate_smc_boot_level +ffffffff825ae620 t tonga_populate_bapm_parameters_in_dpm_table +ffffffff825ae770 t tonga_populate_clock_stretcher_data_table +ffffffff825aeed0 t tonga_populate_vr_config +ffffffff825aefa0 t tonga_init_arb_table_index +ffffffff825af030 t tonga_populate_pm_fuses +ffffffff825af270 t tonga_populate_initial_mc_reg_table +ffffffff825af5a0 t tonga_get_dependency_volt_by_clk +ffffffff825b0000 T vega10_enable_smc_features +ffffffff825b0040 T vega10_get_enabled_smc_features +ffffffff825b00b0 t vega10_smu_init +ffffffff825b0460 t vega10_smu_fini +ffffffff825b0570 t vega10_start_smu +ffffffff825b06e0 t vega10_is_dpm_running +ffffffff825b0740 t vega10_smc_table_manager +ffffffff825b1000 T vega12_enable_smc_features +ffffffff825b1100 T vega12_get_enabled_smc_features +ffffffff825b11d0 t vega12_smu_init +ffffffff825b15c0 t vega12_smu_fini +ffffffff825b1700 t vega12_start_smu +ffffffff825b17e0 t vega12_is_dpm_running +ffffffff825b1890 t vega12_smc_table_manager +ffffffff825b2000 T vega20_is_smc_ram_running +ffffffff825b2050 T vega20_set_activity_monitor_coeff +ffffffff825b2190 T vega20_get_activity_monitor_coeff +ffffffff825b22f0 T vega20_enable_smc_features +ffffffff825b23e0 T vega20_get_enabled_smc_features +ffffffff825b24c0 T vega20_set_pptable_driver_address +ffffffff825b2570 t vega20_smu_init +ffffffff825b29c0 t vega20_smu_fini +ffffffff825b2b10 t vega20_start_smu +ffffffff825b2c10 t vega20_get_argument +ffffffff825b2c70 t vega20_send_msg_to_smc +ffffffff825b2f10 t vega20_send_msg_to_smc_with_parameter +ffffffff825b3220 t vega20_is_dpm_running +ffffffff825b32d0 t vega20_smc_table_manager +ffffffff825b4000 t vegam_smu_init +ffffffff825b40b0 t vegam_start_smu +ffffffff825b45a0 t vegam_update_smc_table +ffffffff825b4830 t vegam_process_firmware_header +ffffffff825b49b0 t vegam_update_sclk_threshold +ffffffff825b4aa0 t vegam_thermal_setup_fan_table +ffffffff825b4b00 t vegam_thermal_avfs_enable +ffffffff825b4b90 t vegam_init_smc_table +ffffffff825b5970 t vegam_populate_all_graphic_levels +ffffffff825b6080 t vegam_populate_all_memory_levels +ffffffff825b63c0 t vegam_get_offsetof +ffffffff825b6450 t vegam_get_mac_definition +ffffffff825b64b0 t vegam_is_dpm_running +ffffffff825b6510 t vegam_is_hw_avfs_present +ffffffff825b6570 t vegam_program_memory_timing_parameters +ffffffff825b67f0 t vegam_populate_smc_uvd_level +ffffffff825b6a20 t vegam_populate_smc_boot_level +ffffffff825b6b10 t vegam_populate_smc_initial_state +ffffffff825b6bc0 t vegam_populate_bapm_parameters_in_dpm_table +ffffffff825b6d60 t vegam_populate_clock_stretcher_data_table +ffffffff825b6fb0 t vegam_populate_avfs_parameters +ffffffff825b7320 t vegam_populate_vr_config +ffffffff825b7460 t vegam_populate_pm_fuses +ffffffff825b76e0 t vegam_get_dependency_volt_by_clk +ffffffff825b78d0 t vegam_calculate_sclk_params +ffffffff825b8000 T smu_set_residency_gfxoff +ffffffff825b8050 T smu_get_residency_gfxoff +ffffffff825b80a0 T smu_get_entrycount_gfxoff +ffffffff825b80f0 T smu_get_status_gfxoff +ffffffff825b8150 T smu_set_soft_freq_range +ffffffff825b8190 T smu_get_dpm_freq_range +ffffffff825b81e0 T smu_set_gfx_power_up_by_imu +ffffffff825b8290 T is_support_sw_smu +ffffffff825b82e0 T is_support_cclk_dpm +ffffffff825b8350 T smu_allow_xgmi_power_down +ffffffff825b8420 T smu_write_watermarks_table +ffffffff825b8490 T smu_set_ac_dc +ffffffff825b85b0 t smu_early_init +ffffffff825b8900 t smu_late_init +ffffffff825b8d20 t smu_sw_init +ffffffff825b94a0 t smu_sw_fini +ffffffff825b9730 t smu_hw_init +ffffffff825b9bf0 t smu_hw_fini +ffffffff825b9d00 t smu_late_fini +ffffffff825b9d20 t smu_suspend +ffffffff825b9e10 t smu_resume +ffffffff825ba0e0 t smu_set_clockgating_state +ffffffff825ba110 t smu_set_powergating_state +ffffffff825ba140 T smu_get_power_limit +ffffffff825ba290 T smu_mode1_reset_is_support +ffffffff825ba2e0 T smu_mode2_reset_is_support +ffffffff825ba330 T smu_mode1_reset +ffffffff825ba380 T smu_handle_passthrough_sbr +ffffffff825ba3d0 T smu_get_ecc_info +ffffffff825ba430 T smu_wait_for_event +ffffffff825ba480 T smu_stb_collect_info +ffffffff825ba4e0 T amdgpu_smu_stb_debug_fs_init +ffffffff825ba510 T smu_send_hbm_bad_pages_num +ffffffff825ba560 T smu_send_hbm_bad_channel_flag +ffffffff825ba5b0 t smu_set_fan_control_mode +ffffffff825ba670 t smu_get_fan_control_mode +ffffffff825ba6f0 t smu_set_fan_speed_pwm +ffffffff825ba7b0 t smu_get_fan_speed_pwm +ffffffff825ba810 t smu_force_ppclk_levels +ffffffff825ba8e0 t smu_print_ppclk_levels +ffffffff825ba950 t smu_emit_ppclk_levels +ffffffff825ba9c0 t smu_force_performance_level +ffffffff825bac90 t smu_read_sensor +ffffffff825baef0 t smu_get_apu_thermal_limit +ffffffff825baf40 t smu_set_apu_thermal_limit +ffffffff825baf90 t smu_get_performance_level +ffffffff825bb000 t smu_get_current_power_state +ffffffff825bb060 t smu_get_fan_speed_rpm +ffffffff825bb0c0 t smu_set_fan_speed_rpm +ffffffff825bb180 t smu_get_power_num_states +ffffffff825bb200 t smu_sys_get_pp_table +ffffffff825bb270 t smu_sys_set_pp_table +ffffffff825bb4b0 t smu_switch_power_profile +ffffffff825bb5e0 t smu_handle_dpm_task +ffffffff825bb600 t smu_load_microcode +ffffffff825bb700 t smu_dpm_set_power_gate +ffffffff825bbac0 t smu_set_power_limit +ffffffff825bbc00 t smu_get_power_profile_mode +ffffffff825bbc60 t smu_set_power_profile_mode +ffffffff825bbcc0 t smu_od_edit_dpm_table +ffffffff825bbd20 t smu_set_mp1_state +ffffffff825bbd80 t smu_gfx_state_change_set +ffffffff825bbdc0 t smu_get_sclk +ffffffff825bbe40 t smu_get_mclk +ffffffff825bbec0 t smu_display_configuration_change +ffffffff825bbf50 t smu_get_clock_by_type_with_latency +ffffffff825bc010 t smu_display_clock_voltage_request +ffffffff825bc070 t smu_enable_mgpu_fan_boost +ffffffff825bc0d0 t smu_set_display_count +ffffffff825bc140 t smu_set_deep_sleep_dcefclk +ffffffff825bc1b0 t smu_get_baco_capability +ffffffff825bc220 t smu_baco_set_state +ffffffff825bc320 t smu_sys_get_pp_feature_mask +ffffffff825bc3a0 t smu_sys_set_pp_feature_mask +ffffffff825bc410 t smu_mode2_reset +ffffffff825bc4d0 t smu_enable_gfx_features +ffffffff825bc590 t smu_set_df_cstate +ffffffff825bc660 t smu_set_xgmi_pstate +ffffffff825bc720 t smu_sys_get_gpu_metrics +ffffffff825bc780 t smu_set_watermarks_for_clock_ranges +ffffffff825bc800 t smu_display_disable_memory_clock_switch +ffffffff825bc860 t smu_get_max_sustainable_clocks_by_dc +ffffffff825bc8c0 t smu_get_uclk_dpm_states +ffffffff825bc920 t smu_get_dpm_clock_table +ffffffff825bc980 t smu_get_prv_buffer_details +ffffffff825bc9f0 t smu_set_user_clk_dependencies +ffffffff825bca70 t smu_handle_task +ffffffff825bcb40 t smu_adjust_power_state_dynamic +ffffffff825bcde0 t smu_apply_default_config_table_settings +ffffffff825bcea0 t smu_restore_dpm_user_profile +ffffffff825bd320 t smu_throttling_logging_work_fn +ffffffff825bd370 t smu_interrupt_work_fn +ffffffff825bd3c0 t smu_swctf_delayed_work_handler +ffffffff825bd4f0 t __delayed_work_tick +ffffffff825bd510 t smu_smc_hw_setup +ffffffff825bdd60 t smu_set_default_dpm_table +ffffffff825bdf40 t smu_get_thermal_temperature_range +ffffffff825be030 t smu_smc_hw_cleanup +ffffffff825bf000 T arcturus_set_ppt_funcs +ffffffff825bf050 t arcturus_run_btc +ffffffff825bf110 t arcturus_get_allowed_feature_mask +ffffffff825bf170 t arcturus_set_default_dpm_table +ffffffff825bf3d0 t arcturus_populate_umd_state_clk +ffffffff825bf490 t arcturus_print_clk_levels +ffffffff825bf740 t arcturus_force_clk_levels +ffffffff825bf9f0 t arcturus_get_power_profile_mode +ffffffff825bfd20 t arcturus_set_power_profile_mode +ffffffff825c0060 t arcturus_dpm_set_vcn_enable +ffffffff825c0150 t arcturus_read_sensor +ffffffff825c0380 t arcturus_is_dpm_running +ffffffff825c03d0 t arcturus_get_fan_speed_pwm +ffffffff825c0530 t arcturus_get_fan_speed_rpm +ffffffff825c0650 t arcturus_get_thermal_temperature_range +ffffffff825c0740 t arcturus_set_performance_level +ffffffff825c0880 t arcturus_dump_pptable +ffffffff825c08b0 t arcturus_get_power_limit +ffffffff825c09d0 t arcturus_set_df_cstate +ffffffff825c0b10 t arcturus_allow_xgmi_power_down +ffffffff825c0c30 t arcturus_i2c_control_init +ffffffff825c0d80 t arcturus_i2c_control_fini +ffffffff825c0dc0 t arcturus_get_unique_id +ffffffff825c0f00 t arcturus_init_smc_tables +ffffffff825c1090 t arcturus_setup_pptable +ffffffff825c11f0 t arcturus_set_fan_speed_pwm +ffffffff825c13d0 t arcturus_set_fan_speed_rpm +ffffffff825c1520 t arcturus_log_thermal_throttling_event +ffffffff825c1970 t arcturus_get_gpu_metrics +ffffffff825c1bc0 t arcturus_get_fan_parameters +ffffffff825c1c00 t arcturus_get_current_clk_freq_by_table +ffffffff825c1d70 t arcturus_get_smu_metrics_data +ffffffff825c1ff0 t arcturus_upload_dpm_level +ffffffff825c2110 t arcturus_i2c_xfer +ffffffff825c23d0 t arcturus_i2c_func +ffffffff825c2400 t arcturus_set_fan_static_mode +ffffffff825c3000 T cyan_skillfish_set_ppt_funcs +ffffffff825c3030 t cyan_skillfish_print_clk_levels +ffffffff825c3170 t cyan_skillfish_od_edit_dpm_table +ffffffff825c34b0 t cyan_skillfish_read_sensor +ffffffff825c36e0 t cyan_skillfish_is_dpm_running +ffffffff825c3790 t cyan_skillfish_init_smc_tables +ffffffff825c3880 t cyan_skillfish_get_enabled_mask +ffffffff825c38c0 t cyan_skillfish_get_dpm_ultimate_freq +ffffffff825c3990 t cyan_skillfish_get_gpu_metrics +ffffffff825c3c40 t cyan_skillfish_get_smu_metrics_data +ffffffff825c4000 T navi10_set_ppt_funcs +ffffffff825c4050 t navi10_run_btc +ffffffff825c40e0 t navi10_get_allowed_feature_mask +ffffffff825c43d0 t navi10_set_default_dpm_table +ffffffff825c48f0 t navi10_populate_umd_state_clk +ffffffff825c4ab0 t navi10_print_clk_levels +ffffffff825c4cb0 t navi10_emit_clk_levels +ffffffff825c4f30 t navi10_force_clk_levels +ffffffff825c50a0 t navi10_od_edit_dpm_table +ffffffff825c56e0 t navi10_get_clock_by_type_with_latency +ffffffff825c57f0 t navi10_get_power_profile_mode +ffffffff825c5ad0 t navi10_set_power_profile_mode +ffffffff825c5dd0 t navi10_dpm_set_vcn_enable +ffffffff825c5e70 t navi10_dpm_set_jpeg_enable +ffffffff825c5f00 t navi10_read_sensor +ffffffff825c60b0 t navi10_pre_display_config_changed +ffffffff825c6170 t navi10_display_config_changed +ffffffff825c6210 t navi10_notify_smc_display_config +ffffffff825c63e0 t navi10_is_dpm_running +ffffffff825c6430 t navi10_get_fan_speed_rpm +ffffffff825c64e0 t navi10_set_watermarks_table +ffffffff825c6690 t navi10_get_thermal_temperature_range +ffffffff825c6780 t navi10_get_uclk_dpm_states +ffffffff825c6890 t navi10_set_default_od_settings +ffffffff825c6b20 t navi10_display_disable_memory_clock_switch +ffffffff825c6bb0 t navi10_get_power_limit +ffffffff825c6ce0 t navi10_update_pcie_parameters +ffffffff825c6e60 t navi10_i2c_control_init +ffffffff825c6fb0 t navi10_i2c_control_fini +ffffffff825c6ff0 t navi10_init_smc_tables +ffffffff825c7260 t navi10_setup_pptable +ffffffff825c74d0 t navi10_baco_enter +ffffffff825c7520 t navi10_baco_exit +ffffffff825c7680 t navi1x_get_gpu_metrics +ffffffff825c80f0 t navi10_enable_mgpu_fan_boost +ffffffff825c8170 t navi10_get_fan_parameters +ffffffff825c81b0 t navi10_post_smu_init +ffffffff825c84b0 t navi10_get_default_config_table_settings +ffffffff825c8500 t navi10_set_config_table +ffffffff825c85c0 t navi1x_get_smu_metrics_data +ffffffff825c8c90 t navi10_od_setting_check_range +ffffffff825c8d50 t navi10_i2c_xfer +ffffffff825c9010 t navi10_i2c_func +ffffffff825c9040 t navi10_umc_hybrid_cdr_workaround +ffffffff825ca000 T sienna_cichlid_set_ppt_funcs +ffffffff825ca050 t sienna_cichlid_run_btc +ffffffff825ca0e0 t sienna_cichlid_get_allowed_feature_mask +ffffffff825ca380 t sienna_cichlid_set_default_dpm_table +ffffffff825caa10 t sienna_cichlid_populate_umd_state_clk +ffffffff825caad0 t sienna_cichlid_print_clk_levels +ffffffff825cacf0 t sienna_cichlid_force_clk_levels +ffffffff825cae60 t sienna_cichlid_od_edit_dpm_table +ffffffff825cb460 t sienna_cichlid_restore_user_od_settings +ffffffff825cb4f0 t sienna_cichlid_get_power_profile_mode +ffffffff825cb7d0 t sienna_cichlid_set_power_profile_mode +ffffffff825cbad0 t sienna_cichlid_dpm_set_vcn_enable +ffffffff825cbba0 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff825cbc30 t sienna_cichlid_read_sensor +ffffffff825cc4f0 t sienna_cichlid_pre_display_config_changed +ffffffff825cc520 t sienna_cichlid_display_config_changed +ffffffff825cc580 t sienna_cichlid_notify_smc_display_config +ffffffff825cc750 t sienna_cichlid_is_dpm_running +ffffffff825cc7b0 t sienna_cichlid_get_fan_speed_rpm +ffffffff825cc8d0 t sienna_cichlid_set_watermarks_table +ffffffff825cca70 t sienna_cichlid_get_thermal_temperature_range +ffffffff825ccb50 t sienna_cichlid_get_uclk_dpm_states +ffffffff825ccc60 t sienna_cichlid_set_default_od_settings +ffffffff825cce30 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff825ccec0 t sienna_cichlid_dump_pptable +ffffffff825ccef0 t sienna_cichlid_get_power_limit +ffffffff825ccfc0 t sienna_cichlid_update_pcie_parameters +ffffffff825cd0f0 t sienna_cichlid_i2c_control_init +ffffffff825cd240 t sienna_cichlid_i2c_control_fini +ffffffff825cd280 t sienna_cichlid_get_unique_id +ffffffff825cd400 t sienna_cichlid_init_smc_tables +ffffffff825cd770 t sienna_cichlid_set_mp1_state +ffffffff825cd7b0 t sienna_cichlid_setup_pptable +ffffffff825cdc40 t sienna_cichlid_system_features_control +ffffffff825cdce0 t sienna_cichlid_baco_enter +ffffffff825cdd30 t sienna_cichlid_baco_exit +ffffffff825cde90 t sienna_cichlid_is_mode1_reset_supported +ffffffff825cdf20 t sienna_cichlid_is_mode2_reset_supported +ffffffff825cdf50 t sienna_cichlid_mode2_reset +ffffffff825ce0f0 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff825ce110 t sienna_cichlid_get_gpu_metrics +ffffffff825ce6e0 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff825ce730 t sienna_cichlid_get_fan_parameters +ffffffff825ce770 t sienna_cichlid_gpo_control +ffffffff825ce840 t sienna_cichlid_get_ecc_info +ffffffff825ce940 t sienna_cichlid_stb_get_data_direct +ffffffff825cea00 t sienna_cichlid_get_default_config_table_settings +ffffffff825cea70 t sienna_cichlid_set_config_table +ffffffff825ceb40 t sienna_cichlid_get_throttler_status_locked +ffffffff825ceca0 t sienna_cichlid_get_smartshift_power_percentage +ffffffff825cedd0 t sienna_cichlid_i2c_xfer +ffffffff825cf090 t sienna_cichlid_i2c_func +ffffffff825d0000 T smu_v11_0_init_microcode +ffffffff825d0170 T smu_v11_0_fini_microcode +ffffffff825d01d0 T smu_v11_0_load_microcode +ffffffff825d0330 T smu_v11_0_check_fw_status +ffffffff825d0390 T smu_v11_0_check_fw_version +ffffffff825d0530 T smu_v11_0_setup_pptable +ffffffff825d0650 T smu_v11_0_init_smc_tables +ffffffff825d07e0 T smu_v11_0_fini_smc_tables +ffffffff825d0aa0 T smu_v11_0_init_power +ffffffff825d0b40 T smu_v11_0_fini_power +ffffffff825d0bb0 T smu_v11_0_get_vbios_bootup_values +ffffffff825d0f60 T smu_v11_0_notify_memory_pool_location +ffffffff825d1080 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff825d1110 T smu_v11_0_set_driver_table_location +ffffffff825d1190 T smu_v11_0_set_tool_table_location +ffffffff825d1210 T smu_v11_0_init_display_count +ffffffff825d1270 T smu_v11_0_set_allowed_mask +ffffffff825d1350 T smu_v11_0_system_features_control +ffffffff825d1370 T smu_v11_0_notify_display_change +ffffffff825d13e0 T smu_v11_0_init_max_sustainable_clocks +ffffffff825d16b0 t smu_v11_0_get_max_sustainable_clock +ffffffff825d1820 T smu_v11_0_get_current_power_limit +ffffffff825d1920 T smu_v11_0_set_power_limit +ffffffff825d1a90 T smu_v11_0_interrupt_work +ffffffff825d1b20 T smu_v11_0_enable_thermal_alert +ffffffff825d1bd0 T smu_v11_0_disable_thermal_alert +ffffffff825d1bf0 T smu_v11_0_get_gfx_vdd +ffffffff825d1cb0 T smu_v11_0_display_clock_voltage_request +ffffffff825d1e20 T smu_v11_0_set_hard_freq_limited_range +ffffffff825d1f20 T smu_v11_0_gfx_off_control +ffffffff825d1fa0 T smu_v11_0_get_fan_control_mode +ffffffff825d2000 T smu_v11_0_set_fan_speed_pwm +ffffffff825d21e0 t smu_v11_0_set_fan_static_mode +ffffffff825d23e0 T smu_v11_0_set_fan_speed_rpm +ffffffff825d2530 T smu_v11_0_get_fan_speed_pwm +ffffffff825d2690 T smu_v11_0_get_fan_speed_rpm +ffffffff825d27a0 T smu_v11_0_set_fan_control_mode +ffffffff825d2990 T smu_v11_0_set_xgmi_pstate +ffffffff825d29b0 T smu_v11_0_register_irq_handler +ffffffff825d2a80 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff825d2b10 T smu_v11_0_set_azalia_d3_pme +ffffffff825d2b30 T smu_v11_0_baco_set_armd3_sequence +ffffffff825d2b50 T smu_v11_0_baco_is_support +ffffffff825d2bf0 T smu_v11_0_baco_get_state +ffffffff825d2c20 T smu_v11_0_baco_set_state +ffffffff825d2f40 T smu_v11_0_baco_enter +ffffffff825d3090 T smu_v11_0_baco_exit +ffffffff825d3210 T smu_v11_0_mode1_reset +ffffffff825d3290 T smu_v11_0_handle_passthrough_sbr +ffffffff825d32b0 T smu_v11_0_get_dpm_ultimate_freq +ffffffff825d3410 T smu_v11_0_set_soft_freq_limited_range +ffffffff825d3500 T smu_v11_0_set_performance_level +ffffffff825d38f0 T smu_v11_0_set_power_source +ffffffff825d3960 T smu_v11_0_get_dpm_freq_by_index +ffffffff825d3a20 T smu_v11_0_get_dpm_level_count +ffffffff825d3ad0 T smu_v11_0_set_single_dpm_table +ffffffff825d3db0 T smu_v11_0_get_dpm_level_range +ffffffff825d3f70 T smu_v11_0_get_current_pcie_link_width_level +ffffffff825d3fd0 T smu_v11_0_get_current_pcie_link_width +ffffffff825d4040 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff825d40a0 T smu_v11_0_get_current_pcie_link_speed +ffffffff825d4100 T smu_v11_0_gfx_ulv_control +ffffffff825d4180 T smu_v11_0_deep_sleep_control +ffffffff825d4390 T smu_v11_0_restore_user_od_settings +ffffffff825d4420 T smu_v11_0_set_smu_mailbox_registers +ffffffff825d4490 t smu_v11_0_set_irq_state +ffffffff825d4ae0 t smu_v11_0_irq_process +ffffffff825d5000 T vangogh_set_ppt_funcs +ffffffff825d5040 t vangogh_set_default_dpm_tables +ffffffff825d5070 t vangogh_common_print_clk_levels +ffffffff825d5530 t vangogh_force_clk_levels +ffffffff825d57b0 t vangogh_od_edit_dpm_table +ffffffff825d5d70 t vangogh_get_power_profile_mode +ffffffff825d5ed0 t vangogh_set_power_profile_mode +ffffffff825d6020 t vangogh_dpm_set_vcn_enable +ffffffff825d6080 t vangogh_dpm_set_jpeg_enable +ffffffff825d60e0 t vangogh_read_sensor +ffffffff825d67f0 t vangogh_get_apu_thermal_limit +ffffffff825d6810 t vangogh_set_apu_thermal_limit +ffffffff825d6830 t vangogh_is_dpm_running +ffffffff825d68a0 t vangogh_set_watermarks_table +ffffffff825d6a30 t vangogh_set_performance_level +ffffffff825d7400 t vangogh_get_power_limit +ffffffff825d7580 t vangogh_get_ppt_limit +ffffffff825d75f0 t vangogh_get_dpm_clock_table +ffffffff825d7760 t vangogh_init_smc_tables +ffffffff825d79d0 t vangogh_system_features_control +ffffffff825d7a20 t vangogh_set_power_limit +ffffffff825d7bb0 t vangogh_get_gfxoff_status +ffffffff825d7c40 t vangogh_get_gfxoff_entrycount +ffffffff825d7cc0 t vangogh_set_gfxoff_residency +ffffffff825d7d40 t vangogh_get_gfxoff_residency +ffffffff825d7d80 t vangogh_mode2_reset +ffffffff825d7f40 t vangogh_common_get_gpu_metrics +ffffffff825d8760 t vangogh_post_smu_init +ffffffff825d8920 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff825d8990 t vangogh_force_dpm_limit_value +ffffffff825d8b10 t vangogh_get_dpm_ultimate_freq +ffffffff825d8e40 t vangogh_set_soft_freq_limited_range +ffffffff825d9000 t vangogh_get_gpu_metrics_v2_3 +ffffffff825da000 T renoir_set_ppt_funcs +ffffffff825da0a0 t renoir_get_current_power_state +ffffffff825da120 t renoir_print_clk_levels +ffffffff825da570 t renoir_force_clk_levels +ffffffff825da7d0 t renoir_od_edit_dpm_table +ffffffff825dab10 t renoir_get_power_profile_mode +ffffffff825dac20 t renoir_set_power_profile_mode +ffffffff825dad70 t renoir_dpm_set_vcn_enable +ffffffff825dae10 t renoir_dpm_set_jpeg_enable +ffffffff825daea0 t renoir_read_sensor +ffffffff825db2b0 t renoir_is_dpm_running +ffffffff825db2f0 t renoir_set_watermarks_table +ffffffff825db4b0 t renoir_set_performance_level +ffffffff825dbaf0 t renoir_get_dpm_clock_table +ffffffff825dbe40 t renoir_init_smc_tables +ffffffff825dbfe0 t renoir_get_enabled_mask +ffffffff825dc020 t renoir_get_dpm_ultimate_freq +ffffffff825dc2f0 t renoir_get_gpu_metrics +ffffffff825dc530 t renoir_gfx_state_change_set +ffffffff825dc560 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff825dc610 t renoir_force_dpm_limit_value +ffffffff825dd000 T smu_v12_0_check_fw_status +ffffffff825dd060 T smu_v12_0_check_fw_version +ffffffff825dd0e0 T smu_v12_0_powergate_sdma +ffffffff825dd130 T smu_v12_0_set_gfx_cgpg +ffffffff825dd190 T smu_v12_0_get_gfxoff_status +ffffffff825dd220 T smu_v12_0_gfx_off_control +ffffffff825dd350 T smu_v12_0_fini_smc_tables +ffffffff825dd420 T smu_v12_0_set_default_dpm_tables +ffffffff825dd450 T smu_v12_0_mode2_reset +ffffffff825dd470 T smu_v12_0_set_soft_freq_limited_range +ffffffff825dd5f0 T smu_v12_0_set_driver_table_location +ffffffff825dd670 T smu_v12_0_get_vbios_bootup_values +ffffffff825de000 T aldebaran_set_ppt_funcs +ffffffff825de050 t aldebaran_get_allowed_feature_mask +ffffffff825de0b0 t aldebaran_set_default_dpm_table +ffffffff825de2f0 t aldebaran_populate_umd_state_clk +ffffffff825de3f0 t aldebaran_print_clk_levels +ffffffff825de5f0 t aldebaran_force_clk_levels +ffffffff825de800 t aldebaran_usr_edit_dpm_table +ffffffff825dea40 t aldebaran_read_sensor +ffffffff825decc0 t aldebaran_is_dpm_running +ffffffff825ded20 t aldebaran_get_thermal_temperature_range +ffffffff825dedf0 t aldebaran_set_performance_level +ffffffff825deea0 t aldebaran_get_power_limit +ffffffff825df060 t aldebaran_set_df_cstate +ffffffff825df0f0 t aldebaran_allow_xgmi_power_down +ffffffff825df1a0 t aldebaran_i2c_control_init +ffffffff825df270 t aldebaran_i2c_control_fini +ffffffff825df2b0 t aldebaran_get_unique_id +ffffffff825df3a0 t aldebaran_init_smc_tables +ffffffff825df590 t aldebaran_set_mp1_state +ffffffff825df5d0 t aldebaran_setup_pptable +ffffffff825df6c0 t aldebaran_system_features_control +ffffffff825df850 t aldebaran_set_power_limit +ffffffff825df8e0 t aldebaran_is_baco_supported +ffffffff825df910 t aldebaran_is_mode1_reset_supported +ffffffff825df940 t aldebaran_is_mode2_reset_supported +ffffffff825df970 t aldebaran_mode1_reset +ffffffff825dfa70 t aldebaran_mode2_reset +ffffffff825dfeb0 t aldebaran_set_soft_freq_limited_range +ffffffff825e00f0 t aldebaran_log_thermal_throttling_event +ffffffff825e0450 t aldebaran_get_gpu_metrics +ffffffff825e0720 t aldebaran_smu_handle_passthrough_sbr +ffffffff825e0740 t aldebaran_smu_send_hbm_bad_page_num +ffffffff825e07d0 t aldebaran_get_ecc_info +ffffffff825e0940 t aldebaran_send_hbm_bad_channel_flag +ffffffff825e0a30 t aldebaran_get_current_clk_freq_by_table +ffffffff825e0ba0 t aldebaran_get_smu_metrics_data +ffffffff825e0e20 t aldebaran_upload_dpm_level +ffffffff825e0f40 t aldebaran_i2c_xfer +ffffffff825e1200 t aldebaran_i2c_func +ffffffff825e2000 T smu_v13_0_init_microcode +ffffffff825e2150 T smu_v13_0_fini_microcode +ffffffff825e21b0 T smu_v13_0_load_microcode +ffffffff825e21e0 T smu_v13_0_init_pptable_microcode +ffffffff825e2390 T smu_v13_0_get_pptable_from_firmware +ffffffff825e24c0 T smu_v13_0_check_fw_status +ffffffff825e2540 T smu_v13_0_check_fw_version +ffffffff825e25d0 T smu_v13_0_setup_pptable +ffffffff825e2770 T smu_v13_0_init_smc_tables +ffffffff825e2940 T smu_v13_0_fini_smc_tables +ffffffff825e2be0 T smu_v13_0_init_power +ffffffff825e2c70 T smu_v13_0_fini_power +ffffffff825e2d00 T smu_v13_0_get_vbios_bootup_values +ffffffff825e2fd0 T smu_v13_0_notify_memory_pool_location +ffffffff825e30a0 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff825e3130 T smu_v13_0_set_driver_table_location +ffffffff825e31b0 T smu_v13_0_set_tool_table_location +ffffffff825e3230 T smu_v13_0_init_display_count +ffffffff825e3270 T smu_v13_0_set_allowed_mask +ffffffff825e3350 T smu_v13_0_gfx_off_control +ffffffff825e33d0 T smu_v13_0_system_features_control +ffffffff825e33f0 T smu_v13_0_notify_display_change +ffffffff825e3460 T smu_v13_0_init_max_sustainable_clocks +ffffffff825e3730 t smu_v13_0_get_max_sustainable_clock +ffffffff825e38a0 T smu_v13_0_get_current_power_limit +ffffffff825e39a0 T smu_v13_0_set_power_limit +ffffffff825e3ae0 T smu_v13_0_enable_thermal_alert +ffffffff825e3b80 T smu_v13_0_disable_thermal_alert +ffffffff825e3bc0 T smu_v13_0_get_gfx_vdd +ffffffff825e3c80 T smu_v13_0_display_clock_voltage_request +ffffffff825e3df0 T smu_v13_0_set_hard_freq_limited_range +ffffffff825e3ef0 T smu_v13_0_get_fan_control_mode +ffffffff825e3f40 T smu_v13_0_set_fan_speed_pwm +ffffffff825e41b0 t smu_v13_0_set_fan_static_mode +ffffffff825e43b0 T smu_v13_0_set_fan_control_mode +ffffffff825e4550 T smu_v13_0_set_fan_speed_rpm +ffffffff825e4740 T smu_v13_0_set_xgmi_pstate +ffffffff825e4760 T smu_v13_0_register_irq_handler +ffffffff825e4840 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff825e48d0 T smu_v13_0_set_azalia_d3_pme +ffffffff825e48f0 T smu_v13_0_wait_for_event +ffffffff825e4940 T smu_v13_0_get_dpm_ultimate_freq +ffffffff825e4ab0 T smu_v13_0_set_soft_freq_limited_range +ffffffff825e4ba0 T smu_v13_0_set_performance_level +ffffffff825e5400 T smu_v13_0_set_power_source +ffffffff825e5470 T smu_v13_0_get_dpm_freq_by_index +ffffffff825e5530 T smu_v13_0_set_single_dpm_table +ffffffff825e58b0 T smu_v13_0_get_current_pcie_link_width_level +ffffffff825e5910 T smu_v13_0_get_current_pcie_link_width +ffffffff825e5980 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff825e59e0 T smu_v13_0_get_current_pcie_link_speed +ffffffff825e5a50 T smu_v13_0_set_vcn_enable +ffffffff825e5b10 T smu_v13_0_set_jpeg_enable +ffffffff825e5b30 T smu_v13_0_run_btc +ffffffff825e5bc0 T smu_v13_0_gpo_control +ffffffff825e5c60 T smu_v13_0_deep_sleep_control +ffffffff825e5f60 T smu_v13_0_gfx_ulv_control +ffffffff825e5fe0 T smu_v13_0_baco_set_armd3_sequence +ffffffff825e6050 T smu_v13_0_baco_is_support +ffffffff825e60f0 T smu_v13_0_baco_get_state +ffffffff825e6120 T smu_v13_0_baco_set_state +ffffffff825e6220 T smu_v13_0_baco_enter +ffffffff825e63b0 T smu_v13_0_baco_exit +ffffffff825e6460 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff825e64a0 T smu_v13_0_od_edit_dpm_table +ffffffff825e67b0 T smu_v13_0_set_default_dpm_tables +ffffffff825e67e0 T smu_v13_0_set_smu_mailbox_registers +ffffffff825e6850 T smu_v13_0_mode1_reset +ffffffff825e68d0 T smu_v13_0_update_pcie_parameters +ffffffff825e6b50 t smu_v13_0_set_irq_state +ffffffff825e71a0 t smu_v13_0_irq_process +ffffffff825e8000 T smu_v13_0_0_set_ppt_funcs +ffffffff825e80f0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff825e8240 t smu_v13_0_0_set_default_dpm_table +ffffffff825e86c0 t smu_v13_0_0_populate_umd_state_clk +ffffffff825e8800 t smu_v13_0_0_print_clk_levels +ffffffff825e8950 t smu_v13_0_0_force_clk_levels +ffffffff825e8ae0 t smu_v13_0_0_od_edit_dpm_table +ffffffff825e9020 t smu_v13_0_0_restore_user_od_settings +ffffffff825e9100 t smu_v13_0_0_get_power_profile_mode +ffffffff825e9220 t smu_v13_0_0_set_power_profile_mode +ffffffff825e94b0 t smu_v13_0_0_read_sensor +ffffffff825e9730 t smu_v13_0_0_is_dpm_running +ffffffff825e9780 t smu_v13_0_0_get_fan_speed_pwm +ffffffff825e9870 t smu_v13_0_0_get_fan_speed_rpm +ffffffff825e98e0 t smu_v13_0_0_get_thermal_temperature_range +ffffffff825e99e0 t smu_v13_0_0_set_default_od_settings +ffffffff825e9b40 t smu_v13_0_0_dump_pptable +ffffffff825e9b70 t smu_v13_0_0_get_power_limit +ffffffff825e9c60 t smu_v13_0_0_set_df_cstate +ffffffff825e9c80 t smu_v13_0_0_i2c_control_init +ffffffff825e9dd0 t smu_v13_0_0_i2c_control_fini +ffffffff825e9e10 t smu_v13_0_0_get_unique_id +ffffffff825e9ec0 t smu_v13_0_0_init_smc_tables +ffffffff825ea130 t smu_v13_0_0_set_mp1_state +ffffffff825ea170 t smu_v13_0_0_setup_pptable +ffffffff825ea2f0 t smu_v13_0_0_system_features_control +ffffffff825ea300 t smu_v13_0_0_baco_enter +ffffffff825ea370 t smu_v13_0_0_baco_exit +ffffffff825ea3e0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff825ea440 t smu_v13_0_0_mode1_reset +ffffffff825ea5a0 t smu_v13_0_0_mode2_reset +ffffffff825ea5f0 t smu_v13_0_0_enable_gfx_features +ffffffff825ea650 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff825ea780 t smu_v13_0_0_get_gpu_metrics +ffffffff825eabe0 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff825eac30 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff825eacc0 t smu_v13_0_0_get_ecc_info +ffffffff825eade0 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff825eae70 t smu_v13_0_0_i2c_xfer +ffffffff825eb130 t smu_v13_0_0_i2c_func +ffffffff825ec000 T smu_v13_0_4_set_ppt_funcs +ffffffff825ec0c0 t smu_v13_0_4_print_clk_levels +ffffffff825ec140 t smu_v13_0_4_force_clk_levels +ffffffff825ec420 t smu_v13_0_4_read_sensor +ffffffff825ec760 t smu_v13_0_4_is_dpm_running +ffffffff825ec7c0 t smu_v13_0_4_set_watermarks_table +ffffffff825ec950 t smu_v13_0_4_set_performance_level +ffffffff825ed660 t smu_v13_0_4_init_smc_tables +ffffffff825ed800 t smu_v13_0_4_fini_smc_tables +ffffffff825ed8d0 t smu_v13_0_4_system_features_control +ffffffff825ed960 t smu_v13_0_4_mode2_reset +ffffffff825ed980 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff825eddb0 t smu_v13_0_4_get_gpu_metrics +ffffffff825edf90 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff825edff0 t smu_v13_0_4_get_current_clk_freq +ffffffff825ef000 T smu_v13_0_5_set_ppt_funcs +ffffffff825ef0a0 t smu_v13_0_5_set_default_dpm_tables +ffffffff825ef0d0 t smu_v13_0_5_print_clk_levels +ffffffff825ef170 t smu_v13_0_5_force_clk_levels +ffffffff825ef300 t smu_v13_0_5_od_edit_dpm_table +ffffffff825ef610 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff825ef630 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff825ef650 t smu_v13_0_5_read_sensor +ffffffff825ef8d0 t smu_v13_0_5_is_dpm_running +ffffffff825ef930 t smu_v13_0_5_set_watermarks_table +ffffffff825efac0 t smu_v13_0_5_set_performance_level +ffffffff825f0140 t smu_v13_0_5_init_smc_tables +ffffffff825f02e0 t smu_v13_0_5_fini_smc_tables +ffffffff825f03b0 t smu_v13_0_5_system_features_control +ffffffff825f0400 t smu_v13_0_5_mode2_reset +ffffffff825f0490 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff825f08d0 t smu_v13_0_5_get_gpu_metrics +ffffffff825f0a30 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff825f1000 T smu_v13_0_6_set_ppt_funcs +ffffffff825f1050 t smu_v13_0_6_get_allowed_feature_mask +ffffffff825f10b0 t smu_v13_0_6_set_default_dpm_table +ffffffff825f1600 t smu_v13_0_6_populate_umd_state_clk +ffffffff825f1700 t smu_v13_0_6_print_clk_levels +ffffffff825f1ad0 t smu_v13_0_6_force_clk_levels +ffffffff825f1ce0 t smu_v13_0_6_usr_edit_dpm_table +ffffffff825f1f20 t smu_v13_0_6_read_sensor +ffffffff825f2530 t smu_v13_0_6_is_dpm_running +ffffffff825f25c0 t smu_v13_0_6_get_thermal_temperature_range +ffffffff825f2740 t smu_v13_0_6_set_performance_level +ffffffff825f2870 t smu_v13_0_6_get_power_limit +ffffffff825f2950 t smu_v13_0_6_set_df_cstate +ffffffff825f2970 t smu_v13_0_6_allow_xgmi_power_down +ffffffff825f2990 t smu_v13_0_6_i2c_control_init +ffffffff825f2ae0 t smu_v13_0_6_i2c_control_fini +ffffffff825f2b20 t smu_v13_0_6_get_unique_id +ffffffff825f2ba0 t smu_v13_0_6_init_smc_tables +ffffffff825f2d60 t smu_v13_0_6_check_fw_status +ffffffff825f2dc0 t smu_v13_0_6_setup_pptable +ffffffff825f2df0 t smu_v13_0_6_system_features_control +ffffffff825f2e90 t smu_v13_0_6_get_enabled_mask +ffffffff825f2f10 t smu_v13_0_6_set_power_limit +ffffffff825f2f30 t smu_v13_0_6_register_irq_handler +ffffffff825f2f90 t smu_v13_0_6_is_baco_supported +ffffffff825f2fc0 t smu_v13_0_6_is_mode1_reset_supported +ffffffff825f2ff0 t smu_v13_0_6_is_mode2_reset_supported +ffffffff825f3020 t smu_v13_0_6_mode1_reset +ffffffff825f30e0 t smu_v13_0_6_mode2_reset +ffffffff825f34a0 t smu_v13_0_6_get_dpm_ultimate_freq +ffffffff825f36e0 t smu_v13_0_6_set_soft_freq_limited_range +ffffffff825f3960 t smu_v13_0_6_log_thermal_throttling_event +ffffffff825f3ca0 t smu_v13_0_6_get_gpu_metrics +ffffffff825f4050 t smu_v13_0_6_smu_send_hbm_bad_page_num +ffffffff825f40e0 t smu_v13_0_6_get_smu_metrics_data +ffffffff825f43a0 t smu_v13_0_6_upload_dpm_level +ffffffff825f44d0 t smu_v13_0_6_i2c_xfer +ffffffff825f4800 t smu_v13_0_6_i2c_func +ffffffff825f4830 t smu_v13_0_6_set_irq_state +ffffffff825f4b10 t smu_v13_0_6_irq_process +ffffffff825f5000 T smu_v13_0_7_set_ppt_funcs +ffffffff825f5060 t smu_v13_0_7_get_allowed_feature_mask +ffffffff825f51e0 t smu_v13_0_7_set_default_dpm_table +ffffffff825f5660 t smu_v13_0_7_populate_umd_state_clk +ffffffff825f57a0 t smu_v13_0_7_print_clk_levels +ffffffff825f58f0 t smu_v13_0_7_force_clk_levels +ffffffff825f5a80 t smu_v13_0_7_od_edit_dpm_table +ffffffff825f5fc0 t smu_v13_0_7_restore_user_od_settings +ffffffff825f60a0 t smu_v13_0_7_get_power_profile_mode +ffffffff825f6200 t smu_v13_0_7_set_power_profile_mode +ffffffff825f6470 t smu_v13_0_7_read_sensor +ffffffff825f66e0 t smu_v13_0_7_is_dpm_running +ffffffff825f6730 t smu_v13_0_7_get_fan_speed_pwm +ffffffff825f6820 t smu_v13_0_7_get_fan_speed_rpm +ffffffff825f6890 t smu_v13_0_7_get_thermal_temperature_range +ffffffff825f6990 t smu_v13_0_7_set_default_od_settings +ffffffff825f6af0 t smu_v13_0_7_dump_pptable +ffffffff825f6b20 t smu_v13_0_7_get_power_limit +ffffffff825f6c10 t smu_v13_0_7_set_df_cstate +ffffffff825f6c30 t smu_v13_0_7_init_smc_tables +ffffffff825f6e50 t smu_v13_0_7_check_fw_status +ffffffff825f6eb0 t smu_v13_0_7_set_mp1_state +ffffffff825f6ef0 t smu_v13_0_7_setup_pptable +ffffffff825f7060 t smu_v13_0_7_baco_enter +ffffffff825f70d0 t smu_v13_0_7_baco_exit +ffffffff825f7140 t smu_v13_0_7_is_mode1_reset_supported +ffffffff825f7180 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff825f72b0 t smu_v13_0_7_get_gpu_metrics +ffffffff825f7720 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff825f8000 T yellow_carp_set_ppt_funcs +ffffffff825f8050 t yellow_carp_set_default_dpm_tables +ffffffff825f8080 t yellow_carp_print_clk_levels +ffffffff825f8100 t yellow_carp_force_clk_levels +ffffffff825f83e0 t yellow_carp_od_edit_dpm_table +ffffffff825f86f0 t yellow_carp_dpm_set_vcn_enable +ffffffff825f8710 t yellow_carp_dpm_set_jpeg_enable +ffffffff825f8730 t yellow_carp_read_sensor +ffffffff825f8b00 t yellow_carp_is_dpm_running +ffffffff825f8b60 t yellow_carp_set_watermarks_table +ffffffff825f8cf0 t yellow_carp_set_performance_level +ffffffff825f98f0 t yellow_carp_init_smc_tables +ffffffff825f9a90 t yellow_carp_fini_smc_tables +ffffffff825f9b60 t yellow_carp_system_features_control +ffffffff825f9bb0 t yellow_carp_get_gfxoff_status +ffffffff825f9c40 t yellow_carp_mode2_reset +ffffffff825f9cd0 t yellow_carp_get_dpm_ultimate_freq +ffffffff825fa120 t yellow_carp_get_gpu_metrics +ffffffff825fa2f0 t yellow_carp_post_smu_init +ffffffff825fa380 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff825fa3e0 t yellow_carp_get_current_clk_freq +ffffffff825fa4f0 t yellow_carp_get_dpm_profile_freq +ffffffff825fb000 T smu_cmn_send_msg_without_waiting +ffffffff825fb1b0 T smu_cmn_wait_for_response +ffffffff825fb300 T smu_cmn_send_smc_msg_with_param +ffffffff825fb690 T smu_cmn_to_asic_specific_index +ffffffff825fb7c0 t __smu_cmn_reg_print_error +ffffffff825fba20 T smu_cmn_send_smc_msg +ffffffff825fba40 T smu_cmn_send_debug_smc_msg +ffffffff825fbae0 T smu_cmn_send_debug_smc_msg_with_param +ffffffff825fbb80 T smu_cmn_feature_is_supported +ffffffff825fbc30 T smu_cmn_feature_is_enabled +ffffffff825fbd30 T smu_cmn_clk_dpm_is_enabled +ffffffff825fbe40 T smu_cmn_get_enabled_mask +ffffffff825fbf40 T smu_cmn_get_indep_throttler_status +ffffffff825fbff0 T smu_cmn_feature_update_enable_state +ffffffff825fc0b0 T smu_cmn_feature_set_enabled +ffffffff825fc190 T smu_cmn_get_pp_feature_mask +ffffffff825fc340 T smu_cmn_set_pp_feature_mask +ffffffff825fc470 T smu_cmn_disable_all_features_with_exception +ffffffff825fc530 T smu_cmn_get_smc_version +ffffffff825fc620 T smu_cmn_update_table +ffffffff825fc7b0 T smu_cmn_write_watermarks_table +ffffffff825fc890 T smu_cmn_write_pptable +ffffffff825fc970 T smu_cmn_get_metrics_table +ffffffff825fcae0 T smu_cmn_get_combo_pptable +ffffffff825fcbd0 T smu_cmn_init_soft_gpu_metrics +ffffffff825fccd0 T smu_cmn_set_mp1_state +ffffffff825fcd80 T smu_cmn_is_audio_func_enabled +ffffffff825fd000 T pci_mcfg_init +ffffffff825fd050 T pci_lookup_segment +ffffffff825fd0b0 T pci_attach_hook +ffffffff825fd0e0 T pci_bus_maxdevs +ffffffff825fd110 T pci_make_tag +ffffffff825fd190 T pci_decompose_tag +ffffffff825fd1f0 T pci_conf_size +ffffffff825fd250 T pci_mcfg_map_bus +ffffffff825fd2e0 T pci_conf_read +ffffffff825fd450 T pci_conf_write +ffffffff825fd5a0 T pci_msix_table_map +ffffffff825fd6f0 T pci_msix_table_unmap +ffffffff825fd7a0 T msi_hwmask +ffffffff825fd880 T msi_hwunmask +ffffffff825fd960 T msi_addroute +ffffffff825fdaa0 T msi_delroute +ffffffff825fdb30 T msi_allocidtvec +ffffffff825fdca0 T pci_intr_enable_msivec +ffffffff825fdda0 T pci_intr_map_msi +ffffffff825fde60 T pci_intr_map_msivec +ffffffff825fdf20 T msix_hwmask +ffffffff825fe0c0 T msix_hwunmask +ffffffff825fe220 T msix_addroute +ffffffff825fe470 T msix_delroute +ffffffff825fe600 T pci_intr_map_msix +ffffffff825fe6e0 T pci_intr_map +ffffffff825fe940 T pci_intr_string +ffffffff825fea20 T pci_intr_establish +ffffffff825fea70 T pci_intr_establish_cpu +ffffffff825febf0 T pci_intr_disestablish +ffffffff825fec10 T pci_init_extents +ffffffff825fee30 T pci_probe_device_hook +ffffffff825fee70 T pci_dev_postattach +ffffffff825fee80 T pci_min_powerstate +ffffffff825fee90 T pci_set_powerstate_md +ffffffff825ff000 T pciide_machdep_compat_intr_establish +ffffffff825ff070 T pciide_machdep_compat_intr_disestablish +ffffffff82600000 T vga_post_init +ffffffff82600390 t vm86_emu_inb +ffffffff826003e0 t vm86_emu_inw +ffffffff82600420 t vm86_emu_inl +ffffffff82600460 t vm86_emu_outb +ffffffff826004b0 t vm86_emu_outw +ffffffff826004f0 t vm86_emu_outl +ffffffff82600530 T vga_post_call +ffffffff826005b0 T vga_post_free +ffffffff82600640 T ddb_vgapost +ffffffff82601000 T pchbmatch +ffffffff82601040 T pchbattach +ffffffff82601570 T pchbactivate +ffffffff826015f0 T pchb_amd64ht_attach +ffffffff82601750 T pchb_rnd +ffffffff826017e0 T pchb_print +ffffffff82602000 T amas_match +ffffffff82602060 T amas_attach +ffffffff826020c0 T amas_intl_nodes +ffffffff82602160 T amas_get_pagerange +ffffffff82603000 T agp_flush_cache +ffffffff82604000 T cardslotmatch +ffffffff82604050 T cardslotattach +ffffffff82604320 T cardslot_event +ffffffff82604380 T cardslot_cb_print +ffffffff826043e0 T cardslot_16_print +ffffffff82604430 T cardslot_16_submatch +ffffffff82604480 T cardslot_event_throw +ffffffff82604540 T cardslot_process_event +ffffffff82605000 T cardbusmatch +ffffffff82605060 T cardbusattach +ffffffff82605150 T cardbus_read_tuples +ffffffff826055e0 T parse_tuple +ffffffff82605860 T cardbus_attach_card +ffffffff82606170 T enable_function +ffffffff82606220 T decode_tuples +ffffffff82606300 T cardbusprint +ffffffff82606420 T cardbussubmatch +ffffffff82606480 T disable_function +ffffffff826064e0 T cardbus_detach_card +ffffffff826065d0 T cardbus_intr_establish +ffffffff82606600 T cardbus_intr_disestablish +ffffffff82606620 T cardbus_function_enable +ffffffff82606720 T cardbus_function_disable +ffffffff82606780 T cardbus_matchbyid +ffffffff826067f0 T decode_tuple +ffffffff82607000 T cardbus_mapreg_map +ffffffff826071d0 T cardbus_mapreg_unmap +ffffffff82608000 T cardbus_read_exrom +ffffffff82609000 T rbus_space_alloc +ffffffff82609070 T rbus_space_alloc_subregion +ffffffff82609270 T rbus_space_free +ffffffff82609310 T rbus_new_body +ffffffff826093b0 T rbus_new_root_delegate +ffffffff82609490 T rbus_new_root_share +ffffffff8260a000 T com_cardbus_match +ffffffff8260a080 T com_cardbus_attach +ffffffff8260a250 T com_cardbus_detach +ffffffff8260a300 T com_cardbus_find_csdev +ffffffff8260a480 T com_cardbus_gofigure +ffffffff8260a980 T com_cardbus_enable +ffffffff8260aa80 T com_cardbus_disable +ffffffff8260aad0 T com_cardbus_setup +ffffffff8260b000 T xl_cardbus_match +ffffffff8260b080 T xl_cardbus_attach +ffffffff8260b480 T xl_cardbus_detach +ffffffff8260b550 T xl_cardbus_lookup +ffffffff8260b600 T xl_cardbus_intr_ack +ffffffff8260c000 T dc_cardbus_match +ffffffff8260c030 T dc_cardbus_attach +ffffffff8260c450 T dc_cardbus_detach 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wskbd_detach +ffffffff82664760 T wskbd_activate +ffffffff826647a0 T wskbd_mux_open +ffffffff82664880 T wskbd_mux_close +ffffffff82664920 T wskbd_do_ioctl +ffffffff82664990 T wskbd_displayioctl +ffffffff826649b0 T wskbd_set_display +ffffffff82664b00 T wskbd_update_layout +ffffffff82664b40 T wskbddevprint +ffffffff82664b90 T wskbd_kbd_backlight_task +ffffffff82664c70 T wskbd_repeat +ffffffff82664d20 T wskbd_brightness_task +ffffffff82664da0 T wskbd_set_keymap +ffffffff82664e20 T wskbd_cnattach +ffffffff82664f20 T wskbd_cngetc +ffffffff82665040 T wskbd_cnpollc +ffffffff826650a0 T wskbd_cnbell +ffffffff826650f0 T wskbd_cndetach +ffffffff826651a0 T wskbd_deliver_event +ffffffff826652e0 T wskbdopen +ffffffff826653e0 T wskbd_input +ffffffff82665560 T wskbd_translate +ffffffff82665d40 T wskbd_rawinput +ffffffff82665d80 T wskbd_enable +ffffffff82665e20 T wskbd_do_open +ffffffff82665ef0 T wskbdclose +ffffffff82666030 T wskbdread +ffffffff82666110 T wskbdioctl +ffffffff826661a0 T wskbd_do_ioctl_sc +ffffffff826662a0 T wskbd_displayioctl_sc +ffffffff82666b80 T wskbdkqfilter +ffffffff82666be0 T wskbd_pickfree +ffffffff82666c50 T wskbd_set_console_display +ffffffff82666cb0 T wskbd_add_mux +ffffffff82666d30 T update_leds +ffffffff82666de0 T update_modifier +ffffffff82666ee0 T change_displayparam +ffffffff82666fa0 T internal_command +ffffffff82667410 T wskbd_debugger +ffffffff82668000 T wskbd_compose_value +ffffffff826681a0 T ksym_upcase +ffffffff82668220 T fillmapentry +ffffffff826683b0 T wskbd_get_mapentry +ffffffff826685d0 T wskbd_init_keymap +ffffffff82668670 T wskbd_load_keymap +ffffffff82669000 T wsmouse_match +ffffffff82669030 T wsmouse_attach +ffffffff826690e0 T wsmouse_detach +ffffffff826692f0 T wsmouse_activate +ffffffff82669330 T wsmouse_mux_open +ffffffff82669500 T wsmouse_mux_close +ffffffff82669560 T wsmousedoioctl +ffffffff826695d0 T wsmousedevprint +ffffffff82669620 T wsmouseopen +ffffffff82669720 T wsmouse_input_cleanup +ffffffff826697c0 T wsmousedoopen +ffffffff82669990 T wsmouseclose +ffffffff82669a90 T wsmouse_input_reset +ffffffff82669be0 T wsmouseread +ffffffff82669cc0 T wsmouseioctl +ffffffff82669d50 T wsmouse_do_ioctl +ffffffff82669f10 T wsmouse_param_ioctl +ffffffff8266a080 T wsmouse_set_params +ffffffff8266a3c0 T wsmouse_get_params +ffffffff8266a620 T wsmousekqfilter +ffffffff8266a680 T wsmouse_add_mux +ffffffff8266a700 T wsmouse_buttons +ffffffff8266a740 T wsmouse_motion +ffffffff8266a7a0 T wsmouse_position +ffffffff8266a8a0 T wsmouse_touch +ffffffff8266a940 T wsmouse_mtstate +ffffffff8266ab20 T wsmouse_set +ffffffff8266adf0 T wsmouse_touch_update +ffffffff8266ae90 T wsmouse_mt_update +ffffffff8266aed0 T wsmouse_hysteresis +ffffffff8266af20 T wsmouse_ptr_ctrl +ffffffff8266b080 T wsmouse_mt_convert +ffffffff8266b1e0 T wsmouse_evq_put +ffffffff8266b280 T wsmouse_btn_sync +ffffffff8266b390 T wsmouse_motion_sync +ffffffff8266b980 T wsmouse_touch_sync +ffffffff8266bb60 T wsmouse_log_input +ffffffff8266bd50 T wsmouse_log_events +ffffffff8266bea0 T wsmouse_input_sync +ffffffff8266c500 T wsmouse_id_to_slot +ffffffff8266c5f0 T wsmouse_matching +ffffffff8266ca60 T wsmouse_mtframe +ffffffff8266ce60 T wsmouse_mt_init +ffffffff8266cfe0 T wsmouse_set_mode +ffffffff8266d040 T wsmouse_get_hw +ffffffff8266d070 T wsmouse_configure +ffffffff8266e000 T wstpad_set_direction +ffffffff8266e180 T wstpad_is_stable +ffffffff8266e260 T wstpad_scroll_coords +ffffffff8266e360 T wstpad_scroll +ffffffff8266e4f0 T wstpad_f2scroll +ffffffff8266e7c0 T wstpad_edgescroll +ffffffff8266e930 T wstpad_get_sbtn +ffffffff8266eac0 T wstpad_mtbtn_contacts +ffffffff8266ebf0 T wstpad_get_mtbtn +ffffffff8266ec50 T wstpad_softbuttons +ffffffff8266ed30 T wstpad_is_tap +ffffffff8266edb0 T wstpad_tap_filter +ffffffff8266ee50 T wstpad_tap_touch +ffffffff8266f0a0 T wstpad_tap_button +ffffffff8266f0f0 T wstpad_tap +ffffffff8266f550 T wstpad_tap_sync +ffffffff8266f5b0 T wstpad_tap_timeout +ffffffff8266f850 T wstpad_click +ffffffff8266f8f0 T wstpad_cmds +ffffffff8266fb80 T wstpad_mt_inputs +ffffffff8266ff30 T wstpad_mt_masks +ffffffff826702f0 T wstpad_touch_inputs +ffffffff82670520 T wstpad_process_input +ffffffff82670880 T wstpad_track_interval +ffffffff826709f0 T wstpad_init_deceleration +ffffffff82670ac0 T wstpad_decelerate +ffffffff82670c30 T wstpad_filter +ffffffff82670f20 T wstpad_compat_convert +ffffffff82670fd0 T wstpad_init +ffffffff82671150 T wstpad_configure +ffffffff82671760 t isqrt +ffffffff82671950 T wstpad_reset +ffffffff826719d0 T wstpad_cleanup +ffffffff82671a80 T wstpad_set_param +ffffffff82671da0 T wstpad_get_param +ffffffff82673000 T wsmux_mux_open +ffffffff82673140 T wsmux_mux_close +ffffffff82673220 T wsmux_do_ioctl +ffffffff82673850 T wsmux_do_displayioctl +ffffffff826739a0 T wsmux_evsrc_set_display +ffffffff826739f0 T wsmuxattach +ffffffff82673a20 T wsmux_getmux +ffffffff82673c90 T wsmux_create +ffffffff82673d90 T wsmuxopen +ffffffff82673f40 T wsmux_detach_sc +ffffffff82674070 T wsmux_do_open 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vt100_selectattribute +ffffffff8267ba50 T wsemul_vt100_handle_dcs +ffffffff8267c000 T vt100_initchartables +ffffffff8267c120 T vt100_setnrc +ffffffff8267d000 T wsemul_vt100_translate +ffffffff8267e000 T pckbdprobe +ffffffff8267e160 T pckbdattach +ffffffff8267e380 T pckbdactivate +ffffffff8267e410 T pckbd_enable +ffffffff8267e5b0 T pckbd_set_leds +ffffffff8267e650 T pckbd_ioctl +ffffffff8267e7b0 T pckbd_cngetc +ffffffff8267e9a0 T pckbd_cnpollc +ffffffff8267ea50 T pckbd_cnbell +ffffffff8267eaa0 T pckbd_set_xtscancode +ffffffff8267ec60 T pckbd_init +ffffffff8267ecc0 T pckbd_input +ffffffff8267ef50 T pckbd_scancode_translate +ffffffff8267f030 T pckbd_bell +ffffffff8267f080 T pckbd_hookup_bell +ffffffff8267f0c0 T pckbd_cnattach +ffffffff82680000 T pmsprobe +ffffffff826800c0 T pmsattach +ffffffff826802e0 T pmsactivate +ffffffff826803a0 T pms_enable +ffffffff82680430 T pms_ioctl +ffffffff82680480 T pms_disable +ffffffff826804d0 T pms_sec_enable +ffffffff82680560 T pms_sec_ioctl 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pms_proc_elantech_v4 +ffffffff826833a0 T pms_enable_intelli +ffffffff826835c0 T pms_cmd +ffffffff82683650 T pms_spec_cmd +ffffffff82683920 T pms_set_scaling +ffffffff826839c0 T pms_set_resolution +ffffffff82683a60 T pms_get_devid +ffffffff82683b00 T pms_get_status +ffffffff82683ba0 T pms_set_rate +ffffffff82683c40 T pms_reset +ffffffff82683ce0 T pms_dev_enable +ffffffff82683da0 T pms_dev_disable +ffffffff82683e60 T pms_protocol_lookup +ffffffff82683f70 T pms_reset_detect +ffffffff82683ff0 T pms_reset_timo +ffffffff82684050 T pms_reset_task +ffffffff82684140 T pms_change_state +ffffffff82684530 T pmsinput +ffffffff82684700 T synaptics_set_mode +ffffffff82684820 T synaptics_query +ffffffff82684930 T synaptics_get_hwinfo +ffffffff82684ea0 T synaptics_sec_proc +ffffffff82684f80 T synaptics_knock +ffffffff82685220 T alps_sec_proc +ffffffff82685350 T alps_get_hwinfo +ffffffff82685810 T elantech_set_absolute_mode_v1 +ffffffff82685bf0 T elantech_set_absolute_mode_v2 +ffffffff826862c0 T elantech_ps2_cmd +ffffffff82686360 T elantech_set_absolute_mode_v3 +ffffffff82686940 T elantech_set_absolute_mode_v4 +ffffffff82686be0 T elantech_get_hwinfo_v1 +ffffffff82686e20 T elantech_get_hwinfo_v2 +ffffffff826871a0 T elantech_get_hwinfo_v3 +ffffffff826873e0 T elantech_get_hwinfo_v4 +ffffffff826876a0 T elantech_knock +ffffffff82688000 T wscnprobe +ffffffff826880a0 T wscninit +ffffffff82688170 T wscn_video_init +ffffffff82688200 T wscn_input_init +ffffffff82688280 T wscnputc +ffffffff82688290 T wscngetc +ffffffff826882a0 T wscnpollc +ffffffff82689000 T skgpio_match +ffffffff82689120 T skgpio_attach +ffffffff826893c0 T skgpio_gpio_read +ffffffff82689420 T skgpio_gpio_write +ffffffff826894a0 T skgpio_gpio_ctl +ffffffff82689530 T skgpio_led_read +ffffffff82689590 T skgpio_led_write +ffffffff826895c0 T skgpio_led_ctl +ffffffff8268a000 T pctrattach +ffffffff8268a060 T pctropen +ffffffff8268a0b0 T pctrclose +ffffffff8268a0e0 T pctrioctl +ffffffff8268a3c0 T pctr_reload +ffffffff8268a520 T pctr_resume +ffffffff8268b000 T nvramattach +ffffffff8268b0c0 T nvram_csum_valid +ffffffff8268b170 T nvramopen +ffffffff8268b1c0 T nvramclose +ffffffff8268b1f0 T nvramread +ffffffff8268b330 T nvram_get_byte +ffffffff8268c000 T hid_start_parse +ffffffff8268c080 T hid_end_parse +ffffffff8268c0c0 T hid_get_item +ffffffff8268cc70 T hid_report_size +ffffffff8268cdf0 T hid_locate +ffffffff8268cf80 T hid_get_data_sub +ffffffff8268d0a0 T hid_get_data +ffffffff8268d1b0 T hid_get_udata +ffffffff8268d2c0 T hid_is_collection +ffffffff8268d3f0 T hid_get_collection_data +ffffffff8268d4e0 T hid_get_id_of_collection +ffffffff8268e000 T hidkbd_attach +ffffffff8268e110 T hidkbd_parse_desc +ffffffff8268e4d0 T hidkbd_delayed_decode +ffffffff8268e4f0 T hidkbd_attach_wskbd +ffffffff8268e580 T hidkbd_detach +ffffffff8268e640 T hidkbd_translate +ffffffff8268e690 T hidkbd_apple_translate +ffffffff8268e740 T hidkbd_apple_munge +ffffffff8268e930 T hidkbd_apple_tb_munge +ffffffff8268ea20 T hidkbd_apple_iso_munge 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hidmt_enable +ffffffff82693090 T hidmt_ioctl +ffffffff82693180 T hidmt_disable +ffffffff82694000 T hidcc_match +ffffffff82694110 T hidcc_attach +ffffffff826942f0 T hidcc_parse +ffffffff82694710 T hidcc_attach_wskbd +ffffffff826947d0 T hidcc_detach +ffffffff826948a0 T hidcc_intr +ffffffff82694c40 T hidcc_intr_slice +ffffffff82694d40 T hidcc_setbits +ffffffff82694ed0 T hidcc_rawinput +ffffffff82694f80 T hidcc_input +ffffffff82694ff0 T hidcc_bits_to_int +ffffffff82695050 T hidcc_usage_to_sym +ffffffff82695260 T hidcc_bit_to_sym +ffffffff826952b0 T hidcc_enable +ffffffff826952d0 T hidcc_set_leds +ffffffff82695300 T hidcc_ioctl +ffffffff82695370 T hidcc_is_array +ffffffff826953c0 T hidcc_parse_array +ffffffff826954e0 T hidcc_add_key_volume +ffffffff82695610 T hidcc_add_key +ffffffff826956f0 T hidcc_bits_to_volume +ffffffff82696000 T usb_match +ffffffff82696030 T usb_attach +ffffffff826963b0 T usb_detach +ffffffff82696480 T usb_activate +ffffffff826965d0 T usb_create_task_threads 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T usbd_open_pipe_ival +ffffffff826983f0 T usbd_open_pipe_intr +ffffffff82698680 T usbd_alloc_xfer +ffffffff82698700 T usbd_setup_xfer +ffffffff82698770 T usbd_transfer +ffffffff82698a80 T usbd_free_xfer +ffffffff82698b00 T usbd_close_pipe +ffffffff82698c90 T usbd_abort_pipe +ffffffff82698d20 T usb_transfer_complete +ffffffff82698fe0 T usbd_dopoll +ffffffff82699000 T usbd_alloc_buffer +ffffffff82699090 T usbd_free_buffer +ffffffff826990d0 T usbd_setup_default_xfer +ffffffff82699150 T usbd_setup_isoc_xfer +ffffffff82699280 T usbd_get_xfer_status +ffffffff826992e0 T usbd_get_config_descriptor +ffffffff82699330 T usbd_get_interface_descriptor +ffffffff82699380 T usbd_get_device_descriptor +ffffffff826993b0 T usbd_interface2endpoint_descriptor +ffffffff82699400 T usbd_clear_endpoint_stall +ffffffff826994a0 T usbd_clear_endpoint_toggle +ffffffff826994e0 T usbd_do_request +ffffffff82699500 T usbd_clear_endpoint_stall_async +ffffffff826995e0 T usbd_request_async +ffffffff82699700 T usbd_device2interface_handle +ffffffff82699790 T usbd_set_interface +ffffffff82699890 T usbd_get_no_alts +ffffffff82699900 T usbd_get_interface_altindex +ffffffff82699930 T usbd_start_next +ffffffff82699a00 T usb_insert_transfer +ffffffff82699ad0 T usbd_do_request_flags +ffffffff82699d90 T usbd_request_async_cb +ffffffff82699e10 T usbd_get_quirks +ffffffff82699e60 T usbd_set_polling +ffffffff82699ec0 T usbd_get_endpoint_descriptor +ffffffff82699f20 T usbd_ratecheck +ffffffff82699f40 T usbd_match_device +ffffffff82699fb0 T usbd_desc_iter_init +ffffffff8269a020 T usbd_desc_iter_next +ffffffff8269a0a0 T usbd_str +ffffffff8269b000 T usbd_get_desc +ffffffff8269b070 T usbd_get_device_status +ffffffff8269b0d0 T usbd_get_hub_descriptor +ffffffff8269b140 T usbd_get_hub_ss_descriptor +ffffffff8269b1b0 T usbd_get_port_status +ffffffff8269b210 T usbd_set_hub_depth +ffffffff8269b270 T usbd_clear_port_feature +ffffffff8269b2d0 T usbd_clear_endpoint_feature +ffffffff8269b330 T usbd_set_port_feature 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thinkpad_get_brightness +ffffffff82824860 T thinkpad_toggle_wan +ffffffff82824990 T thinkpad_cmos +ffffffff82824a50 T thinkpad_set_brightness +ffffffff82824b50 T thinkpad_set_thinklight +ffffffff82824c10 T thinkpad_battery_inhibit_charge +ffffffff82824d50 T thinkpad_battery_force_discharge +ffffffff82825000 T toshiba_match +ffffffff828250b0 T toshiba_attach +ffffffff828251b0 T get_param_brightness +ffffffff82825210 T acpitoshiba_get_param +ffffffff82825270 T set_param_brightness +ffffffff82825310 T toshiba_update_brightness +ffffffff82825420 T acpitoshiba_set_param +ffffffff828254c0 T toshiba_set_brightness +ffffffff82825600 T toshiba_enable_events +ffffffff828256a0 T toshiba_read_events +ffffffff82825820 T toshiba_hotkey +ffffffff82825ab0 T toshiba_get_brightness +ffffffff82825c40 T toshiba_fn_key_brightness_up +ffffffff82825db0 T toshiba_fn_key_brightness_down +ffffffff82825f20 T toshiba_fn_key_video_output +ffffffff82826090 T toshiba_get_video_output +ffffffff82826220 T toshiba_set_video_output +ffffffff82827000 T acpisony_match +ffffffff82827070 T acpisony_attach +ffffffff828270f0 T acpisony_activate +ffffffff82827140 T acpisony_notify_setup +ffffffff82827380 T acpisony_notify +ffffffff828277b0 T acpisony_find_offset +ffffffff828278e0 T acpisony_set_hotkey +ffffffff82827b00 T acpisony_brightness_down +ffffffff82827c40 T acpisony_get_brightness +ffffffff82827ce0 T acpisony_set_brightness +ffffffff82828000 T acpivideo_match +ffffffff82828070 T acpivideo_attach +ffffffff828281f0 T acpivideo_getpcibus +ffffffff82828230 T acpivideo_notify +ffffffff828282a0 T acpivideo_set_policy +ffffffff82828380 T acpi_foundvout +ffffffff82828460 T acpivideo_print +ffffffff82829000 T acpivout_match +ffffffff82829070 T acpivout_attach +ffffffff82829200 T acpivout_notify +ffffffff828292e0 T acpivout_get_bcl +ffffffff82829440 T acpivout_get_brightness +ffffffff82829500 T acpivout_get_param +ffffffff828295a0 T acpivout_set_param +ffffffff82829710 T acpivout_select_brightness +ffffffff828297e0 T acpivout_find_brightness +ffffffff82829870 T acpivout_set_brightness +ffffffff8282a000 T acpipwrres_match +ffffffff8282a070 T acpipwrres_attach +ffffffff8282a310 T acpipwrres_foundcons +ffffffff8282a4d0 T acpipwrres_ref_incr +ffffffff8282a580 T acpipwrres_hascons +ffffffff8282a5d0 T acpipwrres_ref_decr +ffffffff8282a670 T acpipwrres_addcons +ffffffff8282b000 T aibs_match +ffffffff8282b030 T aibs_attach +ffffffff8282b190 T aibs_probe +ffffffff8282b320 T aibs_attach_new +ffffffff8282b450 T aibs_attach_sif +ffffffff8282b630 T aibs_notify +ffffffff8282b6a0 T aibs_add_sensor +ffffffff8282b940 T aibs_getpack +ffffffff8282b9d0 T aibs_refresh +ffffffff8282ba40 T aibs_refresh_r +ffffffff8282bb90 T aibs_getvalue +ffffffff8282bcf0 T aibs_find_cb +ffffffff8282c000 T aplgpio_match +ffffffff8282c060 T aplgpio_attach +ffffffff8282c390 T aplgpio_intr +ffffffff8282c500 T aplgpio_read_pin +ffffffff8282c560 T aplgpio_write_pin +ffffffff8282c5e0 T aplgpio_intr_establish +ffffffff8282c720 T aplgpio_intr_enable +ffffffff8282c7b0 T aplgpio_intr_disable +ffffffff8282d000 T bytgpio_match +ffffffff8282d060 T bytgpio_attach +ffffffff8282d3a0 T bytgpio_intr +ffffffff8282d4f0 T bytgpio_read_pin +ffffffff8282d560 T bytgpio_write_pin +ffffffff8282d5f0 T bytgpio_intr_establish +ffffffff8282d670 T bytgpio_intr_enable +ffffffff8282d760 T bytgpio_intr_disable +ffffffff8282e000 T chvgpio_match +ffffffff8282e060 T chvgpio_attach +ffffffff8282e380 T chvgpio_intr +ffffffff8282e470 T chvgpio_read_pin +ffffffff8282e520 T chvgpio_write_pin +ffffffff8282e5f0 T chvgpio_intr_establish +ffffffff8282e7e0 T chvgpio_intr_enable +ffffffff8282e8c0 T chvgpio_intr_disable +ffffffff8282e9a0 T chvgpio_opreg_handler +ffffffff8282ea40 T chvgpio_check_pin +ffffffff8282f000 T glkgpio_match +ffffffff8282f060 T glkgpio_attach +ffffffff8282f390 T glkgpio_intr +ffffffff8282f500 T glkgpio_read_pin +ffffffff8282f560 T glkgpio_write_pin +ffffffff8282f5e0 T glkgpio_intr_establish +ffffffff8282f720 T glkgpio_intr_enable +ffffffff8282f7b0 T glkgpio_intr_disable +ffffffff82830000 T pchgpio_match +ffffffff82830060 T pchgpio_attach +ffffffff82830660 T pchgpio_activate +ffffffff82830710 T pchgpio_intr +ffffffff82830960 T pchgpio_read_pin +ffffffff82830a50 T pchgpio_write_pin +ffffffff82830b70 T pchgpio_intr_establish +ffffffff82830dc0 T pchgpio_intr_enable +ffffffff82830f00 T pchgpio_intr_disable +ffffffff82831040 T pchgpio_save +ffffffff828310b0 T pchgpio_restore +ffffffff82831120 T pchgpio_find_group +ffffffff828311a0 T pchgpio_intr_handle +ffffffff828312a0 T pchgpio_save_pin +ffffffff82831480 T pchgpio_restore_pin +ffffffff82832000 T tipmic_match +ffffffff82832060 T tipmic_attach +ffffffff828322c0 T tipmic_write_1 +ffffffff828323a0 T tipmic_intr +ffffffff82832550 T tipmic_get_lpat +ffffffff82832690 T tipmic_read_pin +ffffffff828326c0 T tipmic_write_pin +ffffffff828326f0 T tipmic_thermal_opreg_handler +ffffffff82833120 T tipmic_power_opreg_handler +ffffffff82833400 T tipmic_read_1 +ffffffff828334f0 T tipmic_raw_to_temp +ffffffff82834000 T ccpmic_match +ffffffff82834060 T ccpmic_attach +ffffffff82834160 T ccpmic_get_lpat +ffffffff82834290 T ccpmic_read_pin +ffffffff82834450 T ccpmic_write_pin +ffffffff828345f0 T ccpmic_thermal_opreg_handler +ffffffff82834890 T ccpmic_power_opreg_handler +ffffffff82834ad0 T ccpmic_read_1 +ffffffff82834bc0 T ccpmic_write_1 +ffffffff82834ca0 T ccpmic_raw_to_temp +ffffffff82835000 T com_acpi_match +ffffffff82835150 T com_acpi_attach +ffffffff82835440 T com_acpi_is_designware +ffffffff828354c0 T com_acpi_intr_designware +ffffffff82835500 T com_acpi_is_console +ffffffff82836000 T sdhc_acpi_match +ffffffff82836060 T sdhc_acpi_attach +ffffffff82836400 T sdhc_acpi_parse_resources +ffffffff828364b0 T sdhc_acpi_card_detect_gpio +ffffffff82836510 T sdhc_acpi_card_detect_intr +ffffffff82836560 T sdhc_acpi_power_on +ffffffff828365f0 T sdhc_acpi_explore +ffffffff82836620 T sdhc_acpi_card_detect_nonremovable +ffffffff82836650 T sdhc_acpi_do_explore +ffffffff82837000 T dwiic_acpi_match +ffffffff82837050 T dwiic_acpi_attach +ffffffff828374f0 T dwiic_acpi_parse_crs +ffffffff82837650 T dwiic_acpi_power +ffffffff82837780 T dwiic_acpi_get_params +ffffffff82837900 T dwiic_i2c_intr_establish +ffffffff82837990 T dwiic_i2c_intr_disestablish +ffffffff828379b0 T dwiic_i2c_intr_string +ffffffff82837a40 T dwiic_acpi_acquire_bus +ffffffff82837aa0 T dwiic_acpi_release_bus +ffffffff82837ae0 T dwiic_acpi_bus_scan +ffffffff82837b20 T dwiic_acpi_found_hid +ffffffff82837f10 T dwiic_matchhids +ffffffff82837fa0 T dwiic_acpi_found_ihidev +ffffffff82838280 T dwiic_acpi_found_iatp +ffffffff82838400 T dwiic_acpi_found_ietp +ffffffff82839000 T acpicbkbd_match +ffffffff82839030 T acpicbkbd_attach +ffffffff828390e0 T acpicbkbd_activate +ffffffff82839140 T acpicbkbd_get_backlight +ffffffff828391c0 T acpicbkbd_set_backlight +ffffffff82839270 T acpicbkbd_write_backlight +ffffffff8283a000 T acpials_match +ffffffff8283a090 T acpials_attach +ffffffff8283a280 T acpials_read +ffffffff8283a310 T acpials_addtask +ffffffff8283a350 T acpials_notify +ffffffff8283a3e0 T acpials_update +ffffffff8283b000 T tpm_match +ffffffff8283b050 T tpm_attach +ffffffff8283b3a0 T tpm_activate +ffffffff8283b3f0 T tpm2_start_method +ffffffff8283b480 T tpm_probe +ffffffff8283b570 T tpm_init_tis +ffffffff8283b840 T tpm_init_crb +ffffffff8283bc30 T tpm_suspend +ffffffff8283bd60 T tpm_resume +ffffffff8283bd90 T tpm_write_tis +ffffffff8283c1e0 T tpm_read_tis +ffffffff8283c3f0 T tpm_write_crb +ffffffff8283c8c0 T tpm_read_crb +ffffffff8283cc60 T tpm_request_locality_tis +ffffffff8283cd80 T tpm_request_locality_crb +ffffffff8283cec0 T tpm_release_locality_crb +ffffffff8283cf20 T tpm_release_locality_tis +ffffffff8283cf90 T tpm_getburst +ffffffff8283d050 T tpm_status +ffffffff8283d070 T tpm_waitfor +ffffffff8283d160 T tpm_waitfor_status +ffffffff8283e000 T acpihve_match +ffffffff8283e0d0 T acpihve_attach +ffffffff8283f000 T acpisbs_match +ffffffff8283f030 T acpisbs_attach +ffffffff8283f320 T acpisbs_activate +ffffffff8283f410 T acpisbs_read +ffffffff8283f4e0 T acpisbs_setup_sensors +ffffffff8283f610 T acpisbs_refresh_sensors +ffffffff8283f760 T acpisbs_notify +ffffffff8283f8c0 T acpi_smbus_read +ffffffff82840000 T surface_match +ffffffff82840060 T surface_attach +ffffffff828400c0 T surface_hotkey +ffffffff82841000 T ipmi_acpi_match +ffffffff82841030 T ipmi_acpi_attach +ffffffff828412b0 T ipmi_acpi_parse_crs +ffffffff82842000 T amdgpio_match +ffffffff82842060 T amdgpio_attach +ffffffff82842330 T amdgpio_activate +ffffffff82842430 T amdgpio_intr +ffffffff82842610 T amdgpio_read_pin +ffffffff82842670 T amdgpio_write_pin +ffffffff828426f0 T amdgpio_intr_establish +ffffffff828427f0 T amdgpio_intr_enable +ffffffff82842880 T amdgpio_intr_disable +ffffffff82842910 T amdgpio_save +ffffffff828429a0 T amdgpio_restore +ffffffff82842a40 T amdgpio_save_pin +ffffffff82842ab0 T amdgpio_restore_pin +ffffffff82842b20 T amdgpio_pin_intr +ffffffff82843000 T acpihid_match +ffffffff82843030 T acpihid_attach +ffffffff82843270 T acpihid_init_dsm +ffffffff82843400 T acpihid_eval +ffffffff82843650 T acpihid_notify +ffffffff828436c0 T acpihid_button_array_enable +ffffffff82844000 t iosf_acpi_match +ffffffff82844050 t iosf_acpi_attach +ffffffff82844170 t iosf_acpi_mbi_mdr_rd +ffffffff828441f0 t iosf_acpi_mbi_mdr_wr +ffffffff82845000 T intelpmc_match +ffffffff82845030 T intelpmc_attach +ffffffff82845110 T intelpmc_activate +ffffffff82845320 T intelpmc_parse_lpit +ffffffff82845490 T intelpmc_suspend +ffffffff82845840 T intelpmc_resume +ffffffff82845bf0 T intelpmc_dsm +ffffffff82846000 T acpi_match +ffffffff82846070 T acpi_attach +ffffffff828460b0 T acpi_probe +ffffffff828462a0 T acpi_map +ffffffff828463b0 T acpi_unmap +ffffffff82846400 T acpi_bus_space_map +ffffffff82846420 T acpi_bus_space_unmap +ffffffff82846440 T acpi_intr_establish +ffffffff828465a0 T acpi_intr_disestablish +ffffffff828465b0 T acpi_scan +ffffffff82846780 T acpi_acquire_glk +ffffffff828467e0 T acpi_release_glk +ffffffff82846830 T acpi_attach_machdep +ffffffff82846a10 T acpi_sleep_cpu +ffffffff82846bd0 T acpi_resume_cpu +ffffffff82846d20 T sleep_mp +ffffffff82846e20 T resume_mp +ffffffff82846f20 T acpi_iommu_device_map +ffffffff82847000 T hibernate_resume_machdep +ffffffff82847050 T hibernate_drop_to_real_mode +ffffffff82847060 T hibernate_activate_resume_pt_machdep +ffffffff828470a0 T hibernate_switch_stack_machdep +ffffffff828470e0 T hibernate_flush +ffffffff82847110 T acpi_savecpu +ffffffff82848000 T sleep_showstate +ffffffff82848110 T sleep_setstate +ffffffff82848170 T gosleep +ffffffff82848340 T sleep_resume +ffffffff828483d0 T suspend_finish +ffffffff82849000 T acpiopen +ffffffff828490d0 T acpiclose +ffffffff82849170 T acpiioctl +ffffffff82849300 T request_sleep +ffffffff82849390 T acpi_filtdetach +ffffffff828493f0 T acpi_filtread +ffffffff82849430 T acpikqfilter +ffffffff8284a000 T acpipci_match +ffffffff8284a030 T acpipci_attach +ffffffff8284a370 T acpipci_osc +ffffffff8284a4e0 T acpipci_parse_resources +ffffffff8284a610 T acpipci_attach_bus +ffffffff8284a850 T acpipci_print +ffffffff8284a8d0 T acpipci_attach_busses +ffffffff8284b000 T efiopen +ffffffff8284b040 T eficlose +ffffffff8284b070 T efiioctl +ffffffff8284b110 T efiioc_get_table +ffffffff8284b280 T efiioc_var_get +ffffffff8284b530 T efiioc_var_next +ffffffff8284b760 T efiioc_var_set +ffffffff8284ba10 T efi_adapt_error +ffffffff8284c000 T efi_match +ffffffff8284c070 T efi_attach +ffffffff8284c390 T efi_map_runtime +ffffffff8284c520 T efi_enter +ffffffff8284c5d0 T efi_leave +ffffffff8284c660 T efi_fault +ffffffff8284d000 T vmm_probe +ffffffff8284d060 T vmm_attach +ffffffff8284d1b0 T vmm_activate +ffffffff8284d340 T vmmopen +ffffffff8284d390 T vmmclose +ffffffff8284d3c0 T vm_find +ffffffff8284d500 T vmmioctl +ffffffff8284d840 T vm_create +ffffffff8284dbb0 T vm_get_info +ffffffff8284de60 T vm_terminate +ffffffff8284e010 T vm_resetcpu +ffffffff8284e140 T vm_share_mem +ffffffff8284e2b0 T pledge_ioctl_vmm +ffffffff8284e3a0 T vm_find_vcpu +ffffffff8284e400 T vm_create_check_mem_ranges +ffffffff8284e5c0 T vm_teardown +ffffffff8284e740 T vcpu_must_stop +ffffffff8284f000 T vmm_enabled +ffffffff8284f080 T vmm_attach_machdep +ffffffff8284f260 T vmm_quiesce_vmx +ffffffff8284f470 T vmm_activate_machdep +ffffffff8284f510 T vmm_stop +ffffffff8284f680 T vmm_start +ffffffff8284f7a0 T vmmioctl_machdep +ffffffff8284f880 T vm_intr_pending +ffffffff8284f940 T pledge_ioctl_vmm_machdep +ffffffff8284f980 T vm_rwvmparams +ffffffff8284fb30 T vmm_init_pvclock +ffffffff8284fc10 T vm_rwregs +ffffffff8284fd50 T vcpu_readregs_vmx +ffffffff82850230 T vcpu_writeregs_vmx +ffffffff82850770 T vcpu_readregs_svm +ffffffff82850c20 T vcpu_writeregs_svm +ffffffff828510f0 T start_vmm_on_cpu +ffffffff82851230 T stop_vmm_on_cpu +ffffffff828512d0 T vmclear_on_cpu +ffffffff82851350 T vm_impl_init +ffffffff828514e0 T vm_impl_deinit +ffffffff82851510 T vcpu_reload_vmcs_vmx +ffffffff82851690 T vcpu_reset_regs_svm +ffffffff82851960 T svm_setmsrbrw +ffffffff82851a70 T svm_setmsrbr +ffffffff82851b40 T svm_setmsrbw +ffffffff82851c20 T vmx_setmsrbr +ffffffff82851cd0 T vmx_setmsrbw +ffffffff82851d80 T vmx_setmsrbrw +ffffffff82851e90 T svm_set_clean +ffffffff82851ee0 T svm_set_dirty +ffffffff82851f30 T vcpu_reset_regs_vmx +ffffffff828529a0 T vcpu_vmx_check_cap +ffffffff82852aa0 T vcpu_vmx_compute_ctrl +ffffffff82852c80 T vcpu_init_vmx +ffffffff82853190 T vmm_alloc_vpid +ffffffff828532b0 T vcpu_deinit_vmx +ffffffff828533e0 T vcpu_reset_regs +ffffffff82853460 T vcpu_init_svm +ffffffff82853770 T vcpu_deinit_svm +ffffffff828538e0 T vcpu_init +ffffffff828539b0 T vmm_free_vpid +ffffffff82853a20 T vcpu_deinit +ffffffff82853a60 T vm_run +ffffffff82853c60 T vcpu_run_vmx +ffffffff82854740 T vcpu_run_svm +ffffffff82854e10 T vmm_fpurestore +ffffffff82854ee0 T vmm_fpusave +ffffffff82854f70 T vmm_translate_gva +ffffffff828552a0 T vmm_update_pvclock +ffffffff828553b0 T vmx_get_exit_info +ffffffff82855430 T vmx_handle_exit +ffffffff828558a0 T vmx_instruction_error_decode +ffffffff82855a70 T vmm_get_guest_cpu_cpl +ffffffff82855b90 T vmx_handle_intr +ffffffff82855c30 T svm_handle_hlt +ffffffff82855c80 T vmx_handle_hlt +ffffffff82855d50 T svm_handle_exit +ffffffff828560d0 T svm_handle_np_fault +ffffffff82856270 T vmm_handle_cpuid +ffffffff82856950 T svm_handle_msr +ffffffff82856c40 T svm_handle_xsetbv +ffffffff82856d00 T svm_handle_inout +ffffffff82856e10 T vmm_inject_ud +ffffffff82856e50 T vmm_inject_db +ffffffff82856e90 T vmx_handle_np_fault +ffffffff82857010 T vmx_handle_inout +ffffffff828571b0 T vmx_handle_cr +ffffffff828573f0 T vmx_handle_rdmsr +ffffffff828574f0 T vmx_handle_wrmsr +ffffffff828577a0 T vmx_handle_xsetbv +ffffffff828578a0 T vmm_inject_gp +ffffffff828578e0 T vmm_get_guest_memtype +ffffffff82857960 T vmx_get_exit_qualification +ffffffff828579d0 T vmx_get_guest_faulttype +ffffffff82857a80 T svm_get_guest_faulttype +ffffffff82857ab0 T svm_fault_page +ffffffff82857b50 T vmx_fault_page +ffffffff82857ce0 T vmm_get_guest_cpu_mode +ffffffff82857df0 T vmx_load_pdptes +ffffffff82858110 T vmx_handle_cr0_write +ffffffff82858370 T vmx_handle_cr4_write +ffffffff82858430 T vmm_handle_xsetbv +ffffffff828584e0 T vmx_handle_misc_enable_msr +ffffffff82858540 T vmm_pat_is_valid +ffffffff82858620 t vmm_handle_cpuid_0xd +ffffffff82858720 T vmm_gpa_is_valid +ffffffff82858790 T vmx_exit_reason_decode +ffffffff828587d0 T svm_exit_reason_decode +ffffffff828595e0 T vcpu_state_decode +ffffffff8285a000 T vmm_dispatch_intr +ffffffff8285a030 T vmxon +ffffffff8285a060 T vmxoff +ffffffff8285a090 T vmclear +ffffffff8285a0c0 T vmptrld +ffffffff8285a0f0 T vmptrst +ffffffff8285a120 T vmwrite +ffffffff8285a150 T vmread +ffffffff8285a180 T invvpid +ffffffff8285a19b t invvpid_fail +ffffffff8285a1a2 t invvpid_ret +ffffffff8285a1c0 T invept +ffffffff8285a1db t invept_fail +ffffffff8285a1e2 t invept_ret +ffffffff8285a200 T vmx_enter_guest +ffffffff8285a22b t skip_init +ffffffff8285a298 t no_l1df_msr +ffffffff8285a29b t l1df_tlb_loop +ffffffff8285a2b4 t l1df_tlb_done +ffffffff8285a2bc t l1df_load_cache +ffffffff8285a2d3 t done_flush +ffffffff8285a366 t do_resume +ffffffff8285a3eb t fail_launch_or_resume +ffffffff8285a42d t fail_launch_unknown +ffffffff8285a43a t fail_launch_invalid_vmcs +ffffffff8285a447 t fail_launch_valid_vmcs +ffffffff8285a464 t vmx_exit_handler_asm +ffffffff8285a529 t restore_host +ffffffff8285a550 T svm_enter_guest +ffffffff8285a6d2 t restore_host_svm +ffffffff8285b000 T sdmmc_match +ffffffff8285b060 T sdmmc_attach +ffffffff8285b400 T sdmmc_detach +ffffffff8285b4c0 T sdmmc_activate +ffffffff8285b580 T sdmmc_discover_task +ffffffff8285b670 T sdmmc_create_thread +ffffffff8285b6e0 T sdmmc_holds_root_device +ffffffff8285b740 T sdmmc_task_thread +ffffffff8285b9c0 T sdmmc_needs_discover +ffffffff8285ba90 T sdmmc_del_task +ffffffff8285bb50 T sdmmc_card_detach +ffffffff8285bc60 T sdmmc_add_task +ffffffff8285bcf0 T sdmmc_card_attach +ffffffff8285be60 T sdmmc_enable +ffffffff8285bff0 T sdmmc_scan +ffffffff8285c090 T sdmmc_init +ffffffff8285c1c0 T sdmmc_disable +ffffffff8285c350 T sdmmc_function_free +ffffffff8285c370 T sdmmc_delay +ffffffff8285c3c0 T sdmmc_select_card +ffffffff8285c600 T sdmmc_set_bus_power +ffffffff8285c7c0 T sdmmc_function_alloc +ffffffff8285c860 T sdmmc_app_command +ffffffff8285ca20 T sdmmc_mmc_command +ffffffff8285cab0 T sdmmc_go_idle_state +ffffffff8285cbe0 T sdmmc_send_if_cond +ffffffff8285cd50 T sdmmc_set_relative_addr +ffffffff8285d000 T sdmmc_cisptr +ffffffff8285d0d0 T sdmmc_read_cis +ffffffff8285d4b0 T sdmmc_print_cis +ffffffff8285d6a0 T sdmmc_check_cis_quirks +ffffffff8285e000 T sdmmc_io_enable +ffffffff8285e2f0 T sdmmc_io_reset +ffffffff8285e450 T sdmmc_io_send_op_cond +ffffffff8285e5e0 T sdmmc_io_scan +ffffffff8285e760 T sdmmc_io_init +ffffffff8285e8d0 T sdmmc_io_set_highspeed +ffffffff8285ebd0 T sdmmc_io_set_bus_width +ffffffff8285eec0 T sdmmc_io_function_ready +ffffffff8285f070 T sdmmc_io_read_1 +ffffffff8285f1f0 T sdmmc_io_function_enable +ffffffff8285f690 T sdmmc_io_write_1 +ffffffff8285f830 T sdmmc_io_function_disable +ffffffff8285fb10 T sdmmc_io_attach +ffffffff8285fc00 T sdmmc_print +ffffffff8285fec0 T sdmmc_submatch +ffffffff8285ff50 T sdmmc_io_detach +ffffffff82860010 T sdmmc_io_rw_direct +ffffffff828601e0 T sdmmc_io_rw_extended_subr +ffffffff82860390 T sdmmc_io_rw_extended +ffffffff828607d0 T sdmmc_io_read_2 +ffffffff82860940 T sdmmc_io_write_2 +ffffffff82860ac0 T sdmmc_io_read_4 +ffffffff82860c30 T sdmmc_io_write_4 +ffffffff82860db0 T sdmmc_io_read_multi_1 +ffffffff82860eb0 T sdmmc_io_write_multi_1 +ffffffff82860fb0 T sdmmc_io_read_region_1 +ffffffff828610b0 T sdmmc_io_write_region_1 +ffffffff828611b0 T sdmmc_io_xchg +ffffffff82861370 T sdmmc_intr_enable +ffffffff82861650 T sdmmc_intr_disable +ffffffff82861930 T sdmmc_intr_establish +ffffffff82861a50 T sdmmc_intr_disestablish +ffffffff82861b50 T sdmmc_card_intr +ffffffff82861ba0 T sdmmc_intr_task +ffffffff82861c60 T sdmmc_io_set_blocklen +ffffffff82862000 T sdmmc_mem_enable +ffffffff828624d0 T sdmmc_mem_send_op_cond +ffffffff828626b0 T sdmmc_mem_signal_voltage +ffffffff828627b0 T sdmmc_mem_scan +ffffffff82862b00 T sdmmc_decode_csd +ffffffff82862f50 T sdmmc_decode_cid +ffffffff82863400 T sdmmc_mem_send_scr +ffffffff82863560 T sdmmc_mem_decode_scr +ffffffff828635c0 T sdmmc_mem_send_cxd_data +ffffffff82863740 T sdmmc_mem_set_bus_width +ffffffff82863870 T sdmmc_mem_sd_switch +ffffffff82863b30 T sdmmc_be512_to_bitfield512 +ffffffff82863be0 T sdmmc_mem_mmc_switch +ffffffff82863cd0 T sdmmc_mem_init +ffffffff82863e60 T sdmmc_mem_set_blocklen +ffffffff82863f70 T sdmmc_mem_sd_init +ffffffff828643e0 T sdmmc_mem_mmc_init +ffffffff82864b60 T sdmmc_mem_select_transfer_mode +ffffffff82864be0 T sdmmc_mem_execute_tuning +ffffffff82864c70 T sdmmc_mem_read_block_subr +ffffffff82865000 T sdmmc_mem_single_read_block +ffffffff828650d0 T sdmmc_mem_read_block +ffffffff828652e0 T sdmmc_mem_write_block_subr +ffffffff82865660 T sdmmc_mem_single_write_block +ffffffff82865730 T sdmmc_mem_write_block +ffffffff82865940 T sdmmc_mem_hibernate_write +ffffffff82866000 T sdmmc_scsi_cmd +ffffffff82866200 T sdmmc_minphys +ffffffff82866280 T sdmmc_scsi_attach +ffffffff828664c0 T sdmmc_alloc_ccbs +ffffffff82866620 T sdmmc_free_ccbs +ffffffff82866680 T sdmmc_scsi_detach +ffffffff82866840 T sdmmc_stimeout +ffffffff828668e0 T sdmmc_ccb_alloc +ffffffff828669a0 T sdmmc_ccb_free +ffffffff82866aa0 T sdmmc_inquiry +ffffffff82866d30 T sdmmc_start_xs +ffffffff82866e50 T sdmmc_complete_xs +ffffffff82866f40 T sdmmc_done_xs +ffffffff82866f90 T sdmmc_scsi_hibernate_io +ffffffff82868000 T bwfm_sdio_preinit +ffffffff828685a0 T bwfm_sdio_txcheck +ffffffff828685e0 T bwfm_sdio_txdata +ffffffff82868660 T bwfm_sdio_txctl +ffffffff828687f0 T bwfm_sdio_buscore_read +ffffffff82868800 T bwfm_sdio_buscore_write +ffffffff82868820 T bwfm_sdio_buscore_prepare +ffffffff828689a0 T bwfm_sdio_buscore_activate +ffffffff82868a30 T bwfm_sdio_match +ffffffff82868ae0 T bwfm_sdio_attach +ffffffff82868e80 T bwfm_sdio_detach +ffffffff82868f00 T bwfm_sdio_task +ffffffff828690c0 T bwfm_sdio_write_1 +ffffffff828690f0 T bwfm_sdio_read_1 +ffffffff82869120 T bwfm_sdio_write_4 +ffffffff828691f0 T bwfm_sdio_read_4 +ffffffff828692b0 T bwfm_sdio_load_microcode +ffffffff828695a0 T bwfm_sdio_clkctl +ffffffff828696d0 T bwfm_sdio_dev_write +ffffffff82869720 T bwfm_sdio_intr +ffffffff82869770 T bwfm_sdio_ram_read_write +ffffffff828699f0 T bwfm_sdio_htclk +ffffffff82869cb0 T bwfm_sdio_readshared +ffffffff82869da0 T bwfm_sdio_dev_read +ffffffff82869de0 T bwfm_sdio_rx_frames +ffffffff8286a210 T bwfm_sdio_tx_frames +ffffffff8286a330 T bwfm_sdio_backplane +ffffffff8286a400 T bwfm_sdio_buf_read +ffffffff8286a500 T bwfm_sdio_buf_write +ffffffff8286a5d0 T bwfm_sdio_frame_read_write +ffffffff8286a780 T bwfm_sdio_newbuf +ffffffff8286a810 T bwfm_sdio_tx_ok +ffffffff8286a870 T bwfm_sdio_tx_ctrlframe +ffffffff8286a980 T bwfm_sdio_tx_dataframe +ffffffff8286aaf0 T bwfm_sdio_rx_glom +ffffffff8286b000 T onewire_match +ffffffff8286b060 T onewire_attach +ffffffff8286b120 T onewire_detach +ffffffff8286b190 T onewire_activate +ffffffff8286b1b0 T onewire_scan +ffffffff8286b400 T onewire_createthread +ffffffff8286b470 T onewire_print +ffffffff8286b560 T onewirebus_print +ffffffff8286b5b0 T onewire_lock +ffffffff8286b5d0 T onewire_unlock +ffffffff8286b5f0 T onewire_reset +ffffffff8286b610 T onewire_bit +ffffffff8286b630 T onewire_read_byte +ffffffff8286b7c0 T onewire_write_byte +ffffffff8286b8d0 T onewire_read_block +ffffffff8286b970 T onewire_write_block +ffffffff8286ba10 T onewire_triplet +ffffffff8286bb20 T onewire_matchrom +ffffffff8286bd10 T onewire_search +ffffffff8286c180 T onewire_thread +ffffffff8286d000 T onewire_crc +ffffffff8286d0b0 T onewire_crc16 +ffffffff8286d170 T onewire_famname +ffffffff8286d1b0 T onewire_matchbyfam +ffffffff8286e000 T owid_match +ffffffff8286e030 T owid_attach +ffffffff8286e120 T owid_detach +ffffffff8286e170 T owid_activate +ffffffff8286f000 T owsbm_match +ffffffff8286f030 T owsbm_attach +ffffffff8286f240 T owsbm_detach +ffffffff8286f2d0 T owsbm_activate +ffffffff8286f300 T owsbm_update +ffffffff82870000 T owtemp_match +ffffffff82870030 T owtemp_attach +ffffffff82870160 T owtemp_detach +ffffffff828701f0 T owtemp_activate +ffffffff82870220 T owtemp_update +ffffffff82871000 T owctr_match +ffffffff82871030 T owctr_attach +ffffffff828711c0 T owctr_detach +ffffffff82871250 T owctr_activate +ffffffff82871280 T owctr_update +ffffffff828712c0 T owctr_update_counter +ffffffff82872000 A __text_page_start +ffffffff82872000 T Xsyscall_meltdown +ffffffff8287200c T Xsyscall +ffffffff82872299 t Xsyscall_trampback +ffffffff828722b0 T intr_user_exit +ffffffff828722f2 t intr_user_exit_post_ast +ffffffff8287244b t Xiretq_trampback +ffffffff82872457 T doreti_iret +ffffffff82873000 T alltraps +ffffffff82873138 T recall_trap +ffffffff82873150 T alltraps_kern +ffffffff82873153 T alltraps_kern_meltdown +ffffffff82874000 ? Xtrap00 +ffffffff82874000 A __kutext_start +ffffffff82874000 A __text_page_end +ffffffff82874010 ? Xtrap01 +ffffffff82874020 ? Xtrap02 +ffffffff82874028 c calltrap_specstk +ffffffff828740f0 ? calltrap_specstk_tramp +ffffffff82874110 ? Xtrap03 +ffffffff82874120 ? Xtrap04 +ffffffff82874130 ? Xtrap05 +ffffffff82874140 ? Xtrap06 +ffffffff82874150 ? Xtrap07 +ffffffff82874160 ? Xtrap08 +ffffffff82874170 ? Xtrap09 +ffffffff82874180 ? Xtrap0a +ffffffff82874190 ? Xtrap0b +ffffffff828741a0 ? Xtrap0c +ffffffff828741b0 ? Xtrap0d +ffffffff82874240 ? Xtrap0e +ffffffff82874250 ? Xintrspurious +ffffffff82874250 ? Xtrap0f +ffffffff82874260 ? Xtrap10 +ffffffff82874270 ? Xtrap11 +ffffffff82874280 ? Xtrap12 +ffffffff82874290 ? Xtrap13 +ffffffff828742a0 ? Xtrap14 +ffffffff828742b0 ? Xtrap15 +ffffffff828742c0 ? Xtrap16 +ffffffff828742c0 ? Xtrap17 +ffffffff828742c0 ? Xtrap18 +ffffffff828742c0 ? Xtrap19 +ffffffff828742c0 ? Xtrap1a +ffffffff828742c0 ? Xtrap1b +ffffffff828742c0 ? Xtrap1c +ffffffff828742c0 ? Xtrap1d +ffffffff828742c0 ? Xtrap1e +ffffffff828742c0 ? Xtrap1f +ffffffff828742d0 ? x2apic_eoi +ffffffff828742f0 ? Xintr_lapic_ipi +ffffffff82874330 ? Xipi_invltlb +ffffffff82874360 ? Xipi_invept +ffffffff828743a0 ? Xipi_invlpg +ffffffff828743d0 ? Xipi_invlrange +ffffffff82874410 ? Xipi_invltlb_pcid +ffffffff82874450 ? Xipi_invlpg_pcid +ffffffff828744a0 ? Xipi_invlrange_pcid +ffffffff82874510 ? Xipi_wbinvd +ffffffff82874530 ? Xintr_lapic_ltimer +ffffffff82874570 ? Xintr_xen_upcall +ffffffff828745b0 ? Xintr_hyperv_upcall +ffffffff828745f0 ? Xintr_legacy0 +ffffffff82874630 ? Xintr_legacy1 +ffffffff82874670 ? Xintr_legacy2 +ffffffff828746b0 ? Xintr_legacy3 +ffffffff828746f0 ? Xintr_legacy4 +ffffffff82874730 ? Xintr_legacy5 +ffffffff82874770 ? Xintr_legacy6 +ffffffff828747b0 ? Xintr_legacy7 +ffffffff828747f0 ? Xintr_legacy8 +ffffffff82874830 ? Xintr_legacy9 +ffffffff82874870 ? Xintr_legacy10 +ffffffff828748b0 ? Xintr_legacy11 +ffffffff828748f0 ? Xintr_legacy12 +ffffffff82874930 ? Xintr_legacy13 +ffffffff82874970 ? Xintr_legacy14 +ffffffff828749b0 ? Xintr_legacy15 +ffffffff828749f0 ? Xintr_ioapic_edge0 +ffffffff82874a30 ? Xintr_ioapic_edge1 +ffffffff82874a70 ? Xintr_ioapic_edge2 +ffffffff82874ab0 ? Xintr_ioapic_edge3 +ffffffff82874af0 ? Xintr_ioapic_edge4 +ffffffff82874b30 ? Xintr_ioapic_edge5 +ffffffff82874b70 ? Xintr_ioapic_edge6 +ffffffff82874bb0 ? Xintr_ioapic_edge7 +ffffffff82874bf0 ? Xintr_ioapic_edge8 +ffffffff82874c30 ? Xintr_ioapic_edge9 +ffffffff82874c70 ? Xintr_ioapic_edge10 +ffffffff82874cb0 ? Xintr_ioapic_edge11 +ffffffff82874cf0 ? Xintr_ioapic_edge12 +ffffffff82874d30 ? Xintr_ioapic_edge13 +ffffffff82874d70 ? Xintr_ioapic_edge14 +ffffffff82874db0 ? Xintr_ioapic_edge15 +ffffffff82874df0 ? Xintr_ioapic_edge16 +ffffffff82874e30 ? Xintr_ioapic_edge17 +ffffffff82874e70 ? Xintr_ioapic_edge18 +ffffffff82874eb0 ? Xintr_ioapic_edge19 +ffffffff82874ef0 ? Xintr_ioapic_edge20 +ffffffff82874f30 ? Xintr_ioapic_edge21 +ffffffff82874f70 ? Xintr_ioapic_edge22 +ffffffff82874fb0 ? Xintr_ioapic_edge23 +ffffffff82874ff0 ? Xintr_ioapic_edge24 +ffffffff82875030 ? Xintr_ioapic_edge25 +ffffffff82875070 ? Xintr_ioapic_edge26 +ffffffff828750b0 ? Xintr_ioapic_edge27 +ffffffff828750f0 ? Xintr_ioapic_edge28 +ffffffff82875130 ? Xintr_ioapic_edge29 +ffffffff82875170 ? Xintr_ioapic_edge30 +ffffffff828751b0 ? Xintr_ioapic_edge31 +ffffffff828751f0 ? Xintr_ioapic_edge32 +ffffffff82875230 ? Xintr_ioapic_edge33 +ffffffff82875270 ? Xintr_ioapic_edge34 +ffffffff828752b0 ? Xintr_ioapic_edge35 +ffffffff828752f0 ? Xintr_ioapic_edge36 +ffffffff82875330 ? Xintr_ioapic_edge37 +ffffffff82875370 ? Xintr_ioapic_edge38 +ffffffff828753b0 ? Xintr_ioapic_edge39 +ffffffff828753f0 ? Xintr_ioapic_edge40 +ffffffff82875430 ? Xintr_ioapic_edge41 +ffffffff82875470 ? Xintr_ioapic_edge42 +ffffffff828754b0 ? Xintr_ioapic_edge43 +ffffffff828754f0 ? Xintr_ioapic_edge44 +ffffffff82875530 ? Xintr_ioapic_edge45 +ffffffff82875570 ? Xintr_ioapic_edge46 +ffffffff828755b0 ? Xintr_ioapic_edge47 +ffffffff828755f0 ? Xintr_ioapic_edge48 +ffffffff82875630 ? Xintr_ioapic_edge49 +ffffffff82875670 ? Xintr_ioapic_edge50 +ffffffff828756b0 ? Xintr_ioapic_edge51 +ffffffff828756f0 ? Xintr_ioapic_edge52 +ffffffff82875730 ? Xintr_ioapic_edge53 +ffffffff82875770 ? Xintr_ioapic_edge54 +ffffffff828757b0 ? Xintr_ioapic_edge55 +ffffffff828757f0 ? Xintr_ioapic_edge56 +ffffffff82875830 ? Xintr_ioapic_edge57 +ffffffff82875870 ? Xintr_ioapic_edge58 +ffffffff828758b0 ? Xintr_ioapic_edge59 +ffffffff828758f0 ? Xintr_ioapic_edge60 +ffffffff82875930 ? Xintr_ioapic_edge61 +ffffffff82875970 ? Xintr_ioapic_edge62 +ffffffff828759b0 ? Xintr_ioapic_edge63 +ffffffff828759f0 ? Xintr_ioapic_level0 +ffffffff82875a30 ? Xintr_ioapic_level1 +ffffffff82875a70 ? Xintr_ioapic_level2 +ffffffff82875ab0 ? Xintr_ioapic_level3 +ffffffff82875af0 ? Xintr_ioapic_level4 +ffffffff82875b30 ? Xintr_ioapic_level5 +ffffffff82875b70 ? Xintr_ioapic_level6 +ffffffff82875bb0 ? Xintr_ioapic_level7 +ffffffff82875bf0 ? Xintr_ioapic_level8 +ffffffff82875c30 ? Xintr_ioapic_level9 +ffffffff82875c70 ? Xintr_ioapic_level10 +ffffffff82875cb0 ? Xintr_ioapic_level11 +ffffffff82875cf0 ? Xintr_ioapic_level12 +ffffffff82875d30 ? Xintr_ioapic_level13 +ffffffff82875d70 ? Xintr_ioapic_level14 +ffffffff82875db0 ? Xintr_ioapic_level15 +ffffffff82875df0 ? Xintr_ioapic_level16 +ffffffff82875e30 ? Xintr_ioapic_level17 +ffffffff82875e70 ? Xintr_ioapic_level18 +ffffffff82875eb0 ? Xintr_ioapic_level19 +ffffffff82875ef0 ? Xintr_ioapic_level20 +ffffffff82875f30 ? Xintr_ioapic_level21 +ffffffff82875f70 ? Xintr_ioapic_level22 +ffffffff82875fb0 ? Xintr_ioapic_level23 +ffffffff82875ff0 ? Xintr_ioapic_level24 +ffffffff82876030 ? Xintr_ioapic_level25 +ffffffff82876070 ? Xintr_ioapic_level26 +ffffffff828760b0 ? Xintr_ioapic_level27 +ffffffff828760f0 ? Xintr_ioapic_level28 +ffffffff82876130 ? Xintr_ioapic_level29 +ffffffff82876170 ? Xintr_ioapic_level30 +ffffffff828761b0 ? Xintr_ioapic_level31 +ffffffff828761f0 ? Xintr_ioapic_level32 +ffffffff82876230 ? Xintr_ioapic_level33 +ffffffff82876270 ? Xintr_ioapic_level34 +ffffffff828762b0 ? Xintr_ioapic_level35 +ffffffff828762f0 ? Xintr_ioapic_level36 +ffffffff82876330 ? Xintr_ioapic_level37 +ffffffff82876370 ? Xintr_ioapic_level38 +ffffffff828763b0 ? Xintr_ioapic_level39 +ffffffff828763f0 ? Xintr_ioapic_level40 +ffffffff82876430 ? Xintr_ioapic_level41 +ffffffff82876470 ? Xintr_ioapic_level42 +ffffffff828764b0 ? Xintr_ioapic_level43 +ffffffff828764f0 ? Xintr_ioapic_level44 +ffffffff82876530 ? Xintr_ioapic_level45 +ffffffff82876570 ? Xintr_ioapic_level46 +ffffffff828765b0 ? Xintr_ioapic_level47 +ffffffff828765f0 ? Xintr_ioapic_level48 +ffffffff82876630 ? Xintr_ioapic_level49 +ffffffff82876670 ? Xintr_ioapic_level50 +ffffffff828766b0 ? Xintr_ioapic_level51 +ffffffff828766f0 ? Xintr_ioapic_level52 +ffffffff82876730 ? Xintr_ioapic_level53 +ffffffff82876770 ? Xintr_ioapic_level54 +ffffffff828767b0 ? Xintr_ioapic_level55 +ffffffff828767f0 ? Xintr_ioapic_level56 +ffffffff82876830 ? Xintr_ioapic_level57 +ffffffff82876870 ? Xintr_ioapic_level58 +ffffffff828768b0 ? Xintr_ioapic_level59 +ffffffff828768f0 ? Xintr_ioapic_level60 +ffffffff82876930 ? Xintr_ioapic_level61 +ffffffff82876970 ? Xintr_ioapic_level62 +ffffffff828769b0 ? Xintr_ioapic_level63 +ffffffff82877000 ? codepatch_fill_nop +ffffffff82877000 A __cptext_start +ffffffff82877000 A __kutext_end +ffffffff828770b0 ? codepatch_maprw +ffffffff828771c0 ? codepatch_unmaprw +ffffffff82877230 ? codepatch_nop +ffffffff828773b0 ? codepatch_replace +ffffffff82877580 ? codepatch_call +ffffffff828775a0 ? codepatch_control_flow +ffffffff828777c0 ? codepatch_jmp +ffffffff82878000 A __cptext_end +ffffffff82878000 A __rodata_start +ffffffff82878000 C _etext +ffffffff82878000 C etext +ffffffff82879000 r seeprom_read +ffffffff82879004 r icl_mg_pll_find_divisors.div1_vals +ffffffff82879034 r athn_ac2qid +ffffffff82879034 r athn_ac2qid +ffffffff82879034 r athn_ac2qid +ffffffff82879040 r rtwn_get_rssi.cckoff +ffffffff82879068 r rsu_ac2qid +ffffffff82879078 r pckbc_portcmd +ffffffff8287907c r tht_fifo_write_pad.pad +ffffffff82879084 r rsu_get_rssi.cckoff +ffffffff828790a4 r adlp_n_revids +ffffffff828790e8 r apple_iso_trans +ffffffff828790f0 r wihap_check_tx.txratetable +ffffffff828790f4 r dmamode +ffffffff82879118 r gen9_edram_size_mb.sets +ffffffff8287912c r dg2_g12_revid_step_tbl +ffffffff8287a000 r isomappings +ffffffff8287a080 r unimappings +ffffffff8287a230 r replacements +ffffffff8287dada r apollo_pio_rec +ffffffff828cc82f r apollo_udma33_tim +ffffffff828e2550 r pp_r600_decoded_lanes +ffffffff8291a122 r cmd680_setup_channel.udma_tbl +ffffffff82922864 r apollo_udma100_tim +ffffffff8292286a r cmd0646_9_tim_udma +ffffffff8293157c r substchar +ffffffff82989e21 r apollo_udma133_tim +ffffffff82989e28 r apollo_udma66_tim +ffffffff82989e52 r cy_pio_rec +ffffffff8298f7f0 R drm_ca +ffffffff8298f818 R drm_filtops +ffffffff8298f848 R drmread_filtops +ffffffff82990000 r vga_emulops +ffffffff82990048 R vga_stdscreen +ffffffff82990078 R vga_stdscreen_mono +ffffffff829900a8 R vga_stdscreen_bf +ffffffff829900d8 R vga_40lscreen +ffffffff82990108 R vga_40lscreen_mono +ffffffff82990138 R vga_40lscreen_bf +ffffffff82990168 R vga_50lscreen +ffffffff82990198 R vga_50lscreen_mono +ffffffff829901c8 R vga_50lscreen_bf +ffffffff829901f8 R vga_screenlist +ffffffff82990208 R vga_screenlist_mono +ffffffff82990218 R vga_accessops +ffffffff82990278 r i945_wm_info +ffffffff829902b8 r bgansitopc +ffffffff829902c0 r pctoansi +ffffffff82990300 r sdma_offsets +ffffffff82990300 r sdma_offsets +ffffffff82990338 r iha_rate_tbl +ffffffff82990370 r i830_a_wm_info +ffffffff829903a8 r gen9_edram_size_mb.ways +ffffffff82990408 r aggr_periodic_times +ffffffff82990508 r michael_final.pad +ffffffff82990530 r rt_copysa.maskarray +ffffffff82990538 r i915_wm_info +ffffffff82990540 r amdgpu_ih_clientid_jpeg +ffffffff82990540 r amdgpu_ih_clientid_uvds +ffffffff82990540 r amdgpu_ih_clientid_vcns +ffffffff82990540 r amdgpu_ih_clientid_vcns +ffffffff82990540 r amdgpu_ih_clientid_vcns +ffffffff82990570 r jsl_ehl_revids +ffffffff82990580 r vga_setfontset.cmaptabb +ffffffff829905f0 r i830_bc_wm_info +ffffffff82990658 r hsw_activate_psr2.map +ffffffff82990660 r tgl_revids +ffffffff82990698 r __drm_universal_plane_init.default_modifiers +ffffffff829906a8 r iwn_tid2fifo +ffffffff829906c0 r vga_setfontset.cmaptaba +ffffffff829906c8 r crtc_offsets +ffffffff829906c8 r crtc_offsets +ffffffff829906c8 r crtc_offsets +ffffffff82990770 r rtwn_r88e_get_rssi.cckoff +ffffffff82991000 R edid_vendors +ffffffff829912c0 R edid_nvendors +ffffffff829912d0 R edid_products +ffffffff82991330 R edid_nproducts +ffffffff82991340 r _edid_modes +ffffffff82992000 R videomode_list +ffffffff82993140 R videomode_count +ffffffff82994000 r ahc_hard_errors +ffffffff82994080 r critical_sections +ffffffff829940b0 r patches +ffffffff82994d50 r seqprog +ffffffff82996000 r ahc_switch +ffffffff82997000 r termstat_strings +ffffffff82997020 r critical_sections +ffffffff82997060 r seqprog +ffffffff82997d50 r patches +ffffffff82999000 r ahd_switch +ffffffff8299a000 R aic_switch +ffffffff8299b000 R adw_switch +ffffffff8299c000 R gdt_switch +ffffffff8299d000 R twe_switch +ffffffff8299e000 R ciss_switch +ffffffff8299e030 R ciss_level +ffffffff8299e050 R ciss_stat +ffffffff8299f000 R ami_switch +ffffffff8299f028 R ami_raw_switch +ffffffff829a0000 R mfi_switch +ffffffff829a0028 R mfi_pd_switch +ffffffff829a0050 r mfi_iop_xscale +ffffffff829a0080 r mfi_iop_ppc +ffffffff829a00b0 r mfi_iop_gen2 +ffffffff829a00e0 r mfi_iop_skinny +ffffffff829a0110 r mfi_bbu_indicators +ffffffff829a1000 R qlw_switch +ffffffff829a2000 R isp_2100_risc_code +ffffffff829b4bf0 R isp_2200_risc_code +ffffffff829c7990 R isp_2300_risc_code +ffffffff829e1408 R qla_switch +ffffffff829e1430 r qla_regs_2100 +ffffffff829e1460 r qla_regs_2200 +ffffffff829e1490 r qla_regs_23XX +ffffffff829e2000 R ahci_atascsi_methods +ffffffff829e3000 R nvme_switch +ffffffff829e3028 r nvme_ops +ffffffff829e4000 R mpi_switch +ffffffff829e4060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff829e4090 r chv_oa_mux_regs +ffffffff829e40b0 r fiji_clock_stretcher_lookup_table +ffffffff829e40b0 r tonga_clock_stretcher_lookup_table +ffffffff829e40d0 r iosf_pci_devices +ffffffff829e40f0 r link_speed +ffffffff829e40f0 r link_speed +ffffffff829e4130 r drm_fb_xfrm.default_dst_pitch +ffffffff829e4130 r non_supported_protection +ffffffff829e4140 r tgl_uy_revids +ffffffff829e42c0 r bwi_phy_noise_11g_rev1 +ffffffff829e4330 r cardslot_process_event.antonym_ev +ffffffff829e43d0 r gen11_oa_mux_regs +ffffffff829e4470 r dpia_to_preferred_enc_id_table +ffffffff829e44c0 r dummy_eth_header +ffffffff829e44f0 r ddr2_cycle_tenths +ffffffff829e4560 r rtw_intr_rx.ratetbl +ffffffff829e45e0 r abm_config +ffffffff829e4660 r getbootinfo.ports +ffffffff829e46b0 r reg_offsets +ffffffff829e46c0 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff829e46d0 r glk_revids +ffffffff829e46e0 r init_non_clock_fields.look_up +ffffffff829e46f0 r uftdi_8u232am_getrate.roundoff +ffffffff829e4750 r zyd_rx_data.rates +ffffffff829e4770 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff829e47a0 r intel_engine_init_tlb_invalidation.gen8_regs +ffffffff829e47d0 r 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w83627ehf_sensors +ffffffff829f75c0 R w83627dhg_sensors +ffffffff829f77c0 R nct6776f_sensors +ffffffff829f7a00 R nct6779d_sensors +ffffffff829f7d60 R w83637hf_sensors +ffffffff829f7f20 R w83697hf_sensors +ffffffff829f80c0 R w83781d_sensors +ffffffff829f8280 R w83782d_sensors +ffffffff829f8480 R w83783s_sensors +ffffffff829f8600 R w83791d_sensors +ffffffff829f8860 R w83792d_sensors +ffffffff829f8ae0 R as99127f_sensors +ffffffff829f9000 r ar5k_known_products +ffffffff829f9110 r ar5111_gain_opt +ffffffff829f91e0 r ar5112_gain_opt +ffffffff829f92b0 r ar5k_5ghz_channels +ffffffff829f9a00 r ar5k_2ghz_channels +ffffffff829f9f10 r ar5111_rf +ffffffff829fa350 r ar5112a_rf +ffffffff829fa890 r ar5112_rf +ffffffff829fada0 r ar5413_rf +ffffffff829fb1b0 r ar2413_rf +ffffffff829fb4d0 r ar2425_rf +ffffffff829fb830 r ar5111_rfg +ffffffff829fbb30 r ar5112_rfg +ffffffff829fbe30 r ar5413_rfg +ffffffff829fc130 r ar2413_rfg +ffffffff829fc430 r ar5k_rt_11a +ffffffff829fc552 r ar5k_rt_11b +ffffffff829fc674 r ar5k_rt_11g +ffffffff829fc796 r ar5k_rt_xr +ffffffff829fd000 r ar5210_ini +ffffffff829fe000 r ar5211_mode +ffffffff829fe2c0 r ar5211_ini +ffffffff829fead0 r ar5211_rf +ffffffff829ff000 r ar5212_pcie +ffffffff829ff080 r ar5212_mode +ffffffff829ff310 r ar5212_ini +ffffffff829ffc80 r ar5212_ar5111_mode +ffffffff829fff20 r ar5212_ar5112_mode +ffffffff82a001b0 r ar5413_mode +ffffffff82a00b10 r ar2413_mode +ffffffff82a01430 r ar2425_mode +ffffffff82a01d90 r ar5111_bbgain +ffffffff82a02090 r ar5112_bbgain +ffffffff82a03000 r athn_5ghz_chans +ffffffff82a03020 r athn_rates +ffffffff82a04000 r athn_rates +ffffffff82a05000 r ar9160_ini +ffffffff82a05068 r ar5416_ini +ffffffff82a050d0 r ar5416_serdes +ffffffff82a050e8 r ar9160_1_1_addac +ffffffff82a050f8 r ar9160_1_0_addac +ffffffff82a05108 r ar5416_2_2_addac +ffffffff82a05118 r ar5416_2_1_addac +ffffffff82a05128 r ar5416_set_power_calib.chainoffset +ffffffff82a05140 r ar9160_bank6tpc_vals +ffffffff82a051c0 r ar5416_bank6tpc_vals +ffffffff82a05240 r ar5416_bb_rfgain_vals_2g +ffffffff82a05340 r ar5416_bb_rfgain_vals_5g +ffffffff82a05440 r ar5416_bank6_vals +ffffffff82a054c0 r ar9160_regs +ffffffff82a05540 r ar9160_vals_5g20 +ffffffff82a05640 r ar9160_vals_5g40 +ffffffff82a05740 r ar9160_vals_2g40 +ffffffff82a05840 r ar9160_vals_2g20 +ffffffff82a05940 r ar9160_cm_regs +ffffffff82a05c30 r ar9160_cm_vals +ffffffff82a06210 r ar5416_regs +ffffffff82a06290 r ar5416_vals_5g20 +ffffffff82a06390 r ar5416_vals_5g40 +ffffffff82a06490 r ar5416_vals_2g40 +ffffffff82a06590 r ar5416_vals_2g20 +ffffffff82a06690 r ar5416_cm_regs +ffffffff82a06980 r ar5416_cm_vals +ffffffff82a06f60 r ar5416_serdes_regs +ffffffff82a06f90 r ar5416_serdes_vals +ffffffff82a06fc0 r ar9160_1_1_addac_vals +ffffffff82a07040 r ar9160_1_0_addac_vals +ffffffff82a070c0 r ar5416_2_2_addac_vals +ffffffff82a07150 r ar5416_2_1_addac_vals +ffffffff82a08000 r ar9280_2_0_ini +ffffffff82a08068 r ar9280_2_0_serdes +ffffffff82a08080 r ar9280_2_0_rx_gain_23db_backoff +ffffffff82a080a0 r ar9280_2_0_rx_gain_13db_backoff +ffffffff82a080c0 r ar9280_2_0_rx_gain +ffffffff82a080e0 r ar9280_2_0_tx_gain_high_power +ffffffff82a08100 r ar9280_2_0_tx_gain +ffffffff82a08120 r ar9280_init_from_rom.chainoffset +ffffffff82a08130 r ar9280_2_0_regs +ffffffff82a08190 r ar9280_2_0_vals_5g20 +ffffffff82a08250 r ar9280_2_0_vals_5g40 +ffffffff82a08310 r ar9280_2_0_vals_2g40 +ffffffff82a083d0 r ar9280_2_0_vals_2g20 +ffffffff82a08490 r ar9280_2_0_cm_regs +ffffffff82a08740 r ar9280_2_0_cm_vals +ffffffff82a08c90 r ar9280_2_0_fast_clock_regs +ffffffff82a08cb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff82a08cf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff82a08d30 r ar9280_2_0_serdes_regs +ffffffff82a08d60 r ar9280_2_0_serdes_vals +ffffffff82a08d90 r ar9280_2_0_rx_gain_regs +ffffffff82a08ea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff82a090b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff82a092c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff82a094d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff82a096e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff82a098f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff82a09b00 r ar9280_2_0_tx_gain_regs +ffffffff82a09b40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff82a09bc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff82a09c40 r ar9280_2_0_tx_gain_vals_5g +ffffffff82a09cc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff82a0a000 r ar9271_ini +ffffffff82a0a068 r ar9285_1_2_ini +ffffffff82a0a0d0 r ar9280_2_0_serdes +ffffffff82a0a0e8 r ar9271_tx_gain_high_power +ffffffff82a0a108 r ar9271_tx_gain +ffffffff82a0a128 r ar9285_2_0_tx_gain_high_power +ffffffff82a0a148 r ar9285_2_0_tx_gain +ffffffff82a0a168 r ar9285_1_2_tx_gain_high_power +ffffffff82a0a188 r ar9285_1_2_tx_gain +ffffffff82a0a1b0 r ar9271_regs +ffffffff82a0a410 r ar9271_vals_2g40 +ffffffff82a0a8d0 r ar9271_vals_2g20 +ffffffff82a0ad90 r ar9271_cm_regs +ffffffff82a0b020 r ar9271_cm_vals +ffffffff82a0b540 r ar9285_1_2_regs +ffffffff82a0b7a0 r ar9285_1_2_vals_2g40 +ffffffff82a0bc60 r ar9285_1_2_vals_2g20 +ffffffff82a0c120 r ar9285_1_2_cm_regs +ffffffff82a0c3a0 r ar9285_1_2_cm_vals +ffffffff82a0c890 r ar9280_2_0_serdes_regs +ffffffff82a0c8c0 r ar9280_2_0_serdes_vals +ffffffff82a0c8f0 r ar9271_tx_gain_regs +ffffffff82a0c940 r ar9271_tx_gain_high_power_vals_2g +ffffffff82a0c9d0 r ar9271_tx_gain_vals_2g +ffffffff82a0ca60 r ar9285_1_2_tx_gain_regs +ffffffff82a0cab0 r ar9285_2_0_tx_gain_high_power_vals_2g +ffffffff82a0cb50 r ar9285_2_0_tx_gain_vals_2g +ffffffff82a0cbf0 r ar9285_1_2_tx_gain_high_power_vals_2g +ffffffff82a0cc90 r ar9285_1_2_tx_gain_vals_2g +ffffffff82a0d000 r ar9287_1_1_ini +ffffffff82a0d068 r ar9280_2_0_serdes +ffffffff82a0d080 r ar9287_1_1_rx_gain +ffffffff82a0d0a0 r ar9287_1_1_tx_gain +ffffffff82a0d0c0 r ar9287_1_1_regs +ffffffff82a0d120 r ar9287_1_1_vals_2g40 +ffffffff82a0d1d0 r ar9287_1_1_vals_2g20 +ffffffff82a0d280 r ar9287_1_1_cm_regs +ffffffff82a0d560 r ar9287_1_1_cm_vals +ffffffff82a0db20 r ar9280_2_0_serdes_regs +ffffffff82a0db50 r ar9280_2_0_serdes_vals +ffffffff82a0db80 r ar9287_1_1_rx_gain_regs +ffffffff82a0dd90 r ar9287_1_1_rx_gain_vals_2g +ffffffff82a0e1a0 r ar9287_1_1_tx_gain_regs +ffffffff82a0e200 r ar9287_1_1_tx_gain_vals_2g +ffffffff82a0f000 r athn_rates +ffffffff82a10000 r ar9485_1_1_ini +ffffffff82a10068 r ar9485_1_1_serdes +ffffffff82a10080 r ar9380_2_2_ini +ffffffff82a100e8 r ar9380_2_2_serdes +ffffffff82a10100 r ar9380_2_2_rx_gain_wo_xlna +ffffffff82a10120 r ar9380_2_2_rx_gain +ffffffff82a10140 r ar9485_1_1_rx_gain +ffffffff82a10160 r ar9380_2_2_tx_gain_high_ob_db +ffffffff82a10180 r ar9380_2_2_tx_gain_low_ob_db +ffffffff82a101a0 r ar9380_2_2_tx_gain_high_power +ffffffff82a101c0 r ar9380_2_2_tx_gain +ffffffff82a101e0 r ar9485_1_1_tx_gain +ffffffff82a10200 r ar9485_1_1_regs +ffffffff82a10270 r ar9485_1_1_vals_2g40 +ffffffff82a10350 r ar9485_1_1_vals_2g20 +ffffffff82a10430 r ar9485_1_1_cm_regs +ffffffff82a10720 r ar9485_1_1_cm_vals +ffffffff82a10d00 r ar9485_1_1_serdes_regs +ffffffff82a10d0c r ar9485_1_1_serdes_vals +ffffffff82a10d20 r ar9380_2_2_regs +ffffffff82a10db0 r ar9380_2_2_vals_5g20 +ffffffff82a10ed0 r ar9380_2_2_vals_5g40 +ffffffff82a10ff0 r ar9380_2_2_vals_2g40 +ffffffff82a11110 r ar9380_2_2_vals_2g20 +ffffffff82a11230 r ar9380_2_2_cm_regs +ffffffff82a115d0 r ar9380_2_2_cm_vals +ffffffff82a11d00 r ar9380_2_2_fast_clock_regs +ffffffff82a11d20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff82a11d50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff82a11d74 r ar9380_2_2_serdes_regs +ffffffff82a11d80 r ar9380_2_2_serdes_vals +ffffffff82a11d90 r ar9380_2_2_rx_gain_regs +ffffffff82a11f90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff82a12390 r ar9380_2_2_rx_gain_vals +ffffffff82a12790 r ar9485_1_1_rx_gain_regs +ffffffff82a12890 r ar9485_1_1_rx_gain_vals +ffffffff82a12a90 r ar9380_2_2_tx_gain_regs +ffffffff82a12b60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff82a12d00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff82a12ea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff82a13040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff82a131e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff82a13380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff82a13520 r ar9380_2_2_tx_gain_vals_5g +ffffffff82a136c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff82a13860 r ar9485_1_1_tx_gain_regs +ffffffff82a138f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff82a13a10 r ar9380_def_rom +ffffffff82a13e50 r ar9380_def_rom_h112 +ffffffff82a14290 r ar9380_def_rom_h116 +ffffffff82a146d0 r ar9380_def_rom_x112 +ffffffff82a14b10 r ar9380_def_rom_x113 +ffffffff82a15000 R atw_txthresh_tab_lo +ffffffff82a15050 R atw_txthresh_tab_hi +ffffffff82a150a0 r atw_attach.empty_macaddr +ffffffff82a150b0 r atw_attach.type_strings +ffffffff82a150d0 r atw_rfmd2958_ifn +ffffffff82a15110 r atw_rfmd2958_rf1r +ffffffff82a15150 r atw_rxintr.rate_tbl +ffffffff82a16000 r rtw_identify_sta.empty_macaddr +ffffffff82a17000 r rtwn_set_key.etherzeroaddr +ffffffff82a17010 r rtl8188eu_rf_prog +ffffffff82a17030 r rtl8188ftv_rf_prog +ffffffff82a17050 r rtl8192e_rf_prog +ffffffff82a17080 r rtl8188ce_rf_prog +ffffffff82a170a0 r rtl8188ru_rf_prog +ffffffff82a170c0 r rtl8188cu_rf_prog +ffffffff82a170e0 r rtl8192ce_rf_prog +ffffffff82a17110 r rtl8188ru_txagc +ffffffff82a17170 r rtl8188eu_rf_regs +ffffffff82a17230 r rtl8188eu_rf_vals +ffffffff82a173b0 r rtl8188ftv_rf_regs +ffffffff82a17490 r rtl8188ftv_rf_vals +ffffffff82a17640 r rtl8192e_rf_regs +ffffffff82a17710 r rtl8192e_rf_vals +ffffffff82a178b0 r rtl8192e_rf2_regs +ffffffff82a17950 r rtl8192e_rf2_vals +ffffffff82a17a90 r rtl8192ce_rf1_regs +ffffffff82a17bb0 r rtl8188ce_rf_vals +ffffffff82a17df0 r rtl8188ru_rf_vals +ffffffff82a18030 r rtl8188cu_rf_vals +ffffffff82a18270 r rtl8192ce_rf1_vals +ffffffff82a184b0 r rtl8192ce_rf2_regs +ffffffff82a18500 r rtl8192ce_rf2_vals +ffffffff82a185a0 r rtl8192cu_txagc +ffffffff82a19000 r rt2560_rf2522_r2 +ffffffff82a19040 r rt2560_rf2524_r2 +ffffffff82a19080 r rt2560_rf2525_hi_r2 +ffffffff82a190c0 r rt2560_rf2525_r2 +ffffffff82a19100 r rt2560_rf2525e_r2 +ffffffff82a19140 r rt2560_rf2526_hi_r2 +ffffffff82a19180 r rt2560_rf2526_r2 +ffffffff82a191c0 r rt2560_def_bbp +ffffffff82a19200 r rt2560_def_mac +ffffffff82a1a000 r rt2661_rf5225_1 +ffffffff82a1a300 r rt2661_rf5225_2 +ffffffff82a1a600 r rt2661_def_bbp +ffffffff82a1a640 r rt2661_def_mac +ffffffff82a1b000 r rt2860_rf2850 +ffffffff82a1b430 r rt2860_rates +ffffffff82a1b4f0 r rt3572_def_rf +ffffffff82a1b530 r rt3090_def_rf +ffffffff82a1b560 r rt5392_def_rf +ffffffff82a1b5e0 r rt3290_def_rf +ffffffff82a1b640 r rt5390_def_rf +ffffffff82a1b6c0 r rt5390_def_bbp +ffffffff82a1b6f0 r rt2860_def_mac +ffffffff82a1d000 r acx111_reg +ffffffff82a1d040 r acx111_rate_map +ffffffff82a1e000 r acx100_reg +ffffffff82a1e040 r acx100_txpower_rfmd +ffffffff82a1e060 r gen8_rcs_offsets +ffffffff82a1e090 r acx100_txpower_maxim +ffffffff82a1e0b0 r mtl_rcs_offsets +ffffffff82a1e0f0 r digits +ffffffff82a1e0f0 r pppdumpb.digits +ffffffff82a1e0f0 r pppdumpm.digits +ffffffff82a1e140 r hangpic +ffffffff82a1e180 r gen11_rcs_offsets +ffffffff82a1e1b0 r xehp_rcs_offsets +ffffffff82a1e1e0 r dg2_rcs_offsets +ffffffff82a1e220 r dg2_xcs_offsets +ffffffff82a1e250 r gen12_xcs_offsets +ffffffff82a1f000 r trinity_override_mgpg_sequences +ffffffff82a1f3c0 r voltage_swing_to_pre_emphasis +ffffffff82a1f3d0 r sgpr_init_compute_shader +ffffffff82a1f4a0 r intel_hpll_vco.cl_vco +ffffffff82a1f4c0 r vgpr_init_compute_shader +ffffffff82a20000 r malo_cmd_string.cmds +ffffffff82a200b0 r malo_cmd_string_result.results +ffffffff82a21000 R bwi_vendor_led_act +ffffffff82a2100c R bwi_default_led_act +ffffffff82a21010 R bwi_led_duration +ffffffff82a21380 r bwi_sup_bphy +ffffffff82a213c0 r bwi_phy_freq_11g_rev1 +ffffffff82a215c0 r bwi_phy_rotor_11g_rev1 +ffffffff82a216a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff82a216e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff82a21720 r bwi_phy_noise_scale_11g +ffffffff82a21760 r bwi_phy_sigma_sq_11g_rev2 +ffffffff82a217d0 r bwi_phy_sigma_sq_11g_rev7 +ffffffff82a21840 r bwi_phy_delay_11g_rev1 +ffffffff82a21920 r bwi_rf_get_gains.save_phy_regs +ffffffff82a21940 r bwi_rf_lo_find.map +ffffffff82a21960 r bwi_txpower_map_11b +ffffffff82a219a0 r bwi_txpower_map_11g +ffffffff82a219e0 r _bwi_rf_lo_update_11g.rf_atten_list +ffffffff82a21a20 r _bwi_rf_lo_update_11g.rf_atten_init_list +ffffffff82a21a60 r _bwi_rf_lo_update_11g.rf_lo_measure_order +ffffffff82a21aa0 r bwi_rf_set_nrssi_ofs_11g.save_phy_comm_regs +ffffffff82a21ac0 r bwi_bbpid_map +ffffffff82a21af0 r bwi_regwin_count +ffffffff82a21b40 r bwi_clkfreq +ffffffff82a21b58 r bwi_zero_addr +ffffffff82a22000 R ipq8074_ops +ffffffff82a22070 R ipq6018_ops +ffffffff82a220e0 R qca6390_ops +ffffffff82a22150 R qcn9074_ops +ffffffff82a221c0 R wcn6855_ops +ffffffff82a22230 R wcn6750_ops +ffffffff82a222a0 R ath11k_hw_ring_mask_ipq8074 +ffffffff82a222f8 R ath11k_hw_ring_mask_qca6390 +ffffffff82a22350 R ath11k_hw_ring_mask_qcn9074 +ffffffff82a223a8 R ath11k_hw_ring_mask_wcn6750 +ffffffff82a22400 R ath11k_target_ce_config_wlan_ipq8074 +ffffffff82a22510 R ath11k_target_service_to_ce_map_wlan_ipq8074 +ffffffff82a22620 R ath11k_target_service_to_ce_map_wlan_ipq6018 +ffffffff82a22710 R ath11k_target_ce_config_wlan_qca6390 +ffffffff82a227f0 R ath11k_target_service_to_ce_map_wlan_qca6390 +ffffffff82a228b0 R ath11k_target_ce_config_wlan_qcn9074 +ffffffff82a22990 R ath11k_target_service_to_ce_map_wlan_qcn9074 +ffffffff82a22a70 R qwx_host_ce_config_ipq8074 +ffffffff82a22d10 R qwx_host_ce_config_qca6390 +ffffffff82a22e30 R qwx_host_ce_config_qcn9074 +ffffffff82a22ef0 R ipq8074_regs +ffffffff82a22fc4 R qca6390_regs +ffffffff82a23098 R qcn9074_regs +ffffffff82a2316c R wcn6855_regs +ffffffff82a23240 R wcn6750_regs +ffffffff82a23320 R qmi_response_type_v01_ei +ffffffff82a23380 R qmi_wlanfw_ind_register_req_msg_v01_ei +ffffffff82a236a0 R qmi_wlanfw_ind_register_resp_msg_v01_ei +ffffffff82a23720 R qmi_wlanfw_host_cap_req_msg_v01_ei +ffffffff82a23aa0 R qmi_wlanfw_host_cap_resp_msg_v01_ei +ffffffff82a23ae0 R qmi_wlanfw_mem_cfg_s_v01_ei +ffffffff82a23b60 R qmi_wlanfw_mem_seg_s_v01_ei +ffffffff82a23c00 R qmi_wlanfw_request_mem_ind_msg_v01_ei +ffffffff82a23c60 R qmi_wlanfw_mem_seg_resp_s_v01_ei +ffffffff82a23d00 R qmi_wlanfw_respond_mem_req_msg_v01_ei +ffffffff82a23d60 R qmi_wlanfw_respond_mem_resp_msg_v01_ei +ffffffff82a23da0 R qmi_wlanfw_cap_req_msg_v01_ei +ffffffff82a23dc0 R qmi_wlanfw_rf_chip_info_s_v01_ei +ffffffff82a23e20 R qmi_wlanfw_rf_board_info_s_v01_ei +ffffffff82a23e60 R qmi_wlanfw_soc_info_s_v01_ei +ffffffff82a23ea0 R qmi_wlanfw_fw_version_info_s_v01_ei +ffffffff82a23f00 R qmi_wlanfw_cap_resp_msg_v01_ei +ffffffff82a241c0 R qmi_wlanfw_bdf_download_req_msg_v01_ei +ffffffff82a243a0 R qmi_wlanfw_bdf_download_resp_msg_v01_ei +ffffffff82a243e0 R qmi_wlanfw_m3_info_req_msg_v01_ei +ffffffff82a24440 R qmi_wlanfw_m3_info_resp_msg_v01_ei +ffffffff82a24480 R qmi_wlanfw_wlan_ini_req_msg_v01_ei +ffffffff82a244e0 R qmi_wlanfw_wlan_ini_resp_msg_v01_ei +ffffffff82a24520 R qmi_wlanfw_ce_tgt_pipe_cfg_s_v01_ei +ffffffff82a245e0 R qmi_wlanfw_ce_svc_pipe_cfg_s_v01_ei +ffffffff82a24660 R qmi_wlanfw_shadow_reg_cfg_s_v01_ei +ffffffff82a246c0 R qmi_wlanfw_shadow_reg_v2_cfg_s_v01_ei +ffffffff82a24700 R qmi_wlanfw_wlan_mode_req_msg_v01_ei +ffffffff82a24780 R qmi_wlanfw_wlan_mode_resp_msg_v01_ei +ffffffff82a247c0 R qmi_wlanfw_wlan_cfg_req_msg_v01_ei +ffffffff82a249a0 R qmi_wlanfw_wlan_cfg_resp_msg_v01_ei +ffffffff82a249e0 r wmi_tlv_policies +ffffffff82a26740 r qwx_hw_mode_pri_map +ffffffff82a26770 r ath11k_hw_params +ffffffff82a26cf0 r hw_srng_config_templ +ffffffff82a26fa8 r ath11k_hw_hal_params_ipq8074 +ffffffff82a26fb8 r ath11k_hw_hal_params_qca6390 +ffffffff82a26fc8 r ath11k_hw_hal_params_wcn6750 +ffffffff82a26fd8 r ath11k_hw_tcl2wbm_rbm_map_ipq8074 +ffffffff82a26fe1 r ath11k_hw_tcl2wbm_rbm_map_wcn6750 +ffffffff82a28000 R uhci_bus_methods +ffffffff82a28030 R uhci_root_ctrl_methods +ffffffff82a28060 R uhci_root_intr_methods +ffffffff82a28090 R uhci_device_ctrl_methods +ffffffff82a280c0 R uhci_device_intr_methods +ffffffff82a280f0 R uhci_device_bulk_methods +ffffffff82a28120 R uhci_device_isoc_methods +ffffffff82a28150 R uhci_devd +ffffffff82a28162 R uhci_confd +ffffffff82a2816b R uhci_ifcd +ffffffff82a28174 R uhci_endpd +ffffffff82a2817b R uhci_hubd_piix +ffffffff82a29000 R revbits +ffffffff82a29020 R ohci_bus_methods +ffffffff82a29050 R ohci_root_ctrl_methods +ffffffff82a29080 R ohci_root_intr_methods +ffffffff82a290b0 R ohci_device_ctrl_methods +ffffffff82a290e0 R ohci_device_intr_methods +ffffffff82a29110 R ohci_device_bulk_methods +ffffffff82a29140 R ohci_device_isoc_methods +ffffffff82a29170 R ohci_devd +ffffffff82a29182 R ohci_confd +ffffffff82a2918b R ohci_ifcd +ffffffff82a29194 R ohci_endpd +ffffffff82a2919b R ohci_hubd +ffffffff82a2a000 R ehci_bus_methods +ffffffff82a2a030 R ehci_root_ctrl_methods +ffffffff82a2a060 R ehci_root_intr_methods +ffffffff82a2a090 R ehci_device_ctrl_methods +ffffffff82a2a0c0 R ehci_device_intr_methods +ffffffff82a2a0f0 R ehci_device_bulk_methods +ffffffff82a2a120 R ehci_device_isoc_methods +ffffffff82a2a150 R ehci_devd +ffffffff82a2a162 R ehci_odevd +ffffffff82a2a16c R ehci_confd +ffffffff82a2a175 R ehci_ifcd +ffffffff82a2a17e R ehci_endpd +ffffffff82a2a185 R ehci_hubd +ffffffff82a2b000 R xhci_bus_methods +ffffffff82a2b030 R xhci_root_ctrl_methods +ffffffff82a2b060 R xhci_root_intr_methods +ffffffff82a2b090 R xhci_device_ctrl_methods +ffffffff82a2b0c0 R xhci_device_intr_methods +ffffffff82a2b0f0 R xhci_device_bulk_methods +ffffffff82a2b120 R xhci_device_isoc_methods +ffffffff82a2b150 R xhci_devd +ffffffff82a2b162 R xhci_confd +ffffffff82a2b16b R xhci_ifcd +ffffffff82a2b174 R xhci_endpd +ffffffff82a2b17b R xhci_endpcd +ffffffff82a2b181 R xhci_hubd +ffffffff82a2c000 R psp_ca +ffffffff82a2c030 R psp_ucode_table +ffffffff82a2f000 R radio_ca +ffffffff82a30000 R ipmi_ca +ffffffff82a31000 R vscsi_ca +ffffffff82a31028 R vscsi_switch +ffffffff82a31050 R vscsi_filtops +ffffffff82a32000 R mpath_ca +ffffffff82a32028 R mpath_switch +ffffffff82a33000 R softraid_ca +ffffffff82a33028 R sr_switch +ffffffff82a34000 r spdmem_basic_types +ffffffff82a340a0 r spdmem_parity_types +ffffffff82a340e0 r spdmem_ddr4_decode.ddr4_chipsize +ffffffff82a35000 R ufshci_switch +ffffffff82a36000 R kstat_rlock_ops +ffffffff82a36010 R kstat_wlock_ops +ffffffff82a36020 R kstat_mutex_ops +ffffffff82a36030 R kstat_cpu_ops +ffffffff82a36040 r kstat_id_tree_RBT_INFO +ffffffff82a36058 R kstat_id_tree_RBT_TYPE +ffffffff82a36060 r kstat_pv_tree_RBT_INFO +ffffffff82a36078 R kstat_pv_tree_RBT_TYPE +ffffffff82a36080 r kstat_nm_tree_RBT_INFO +ffffffff82a36098 R kstat_nm_tree_RBT_TYPE +ffffffff82a37000 r fuse_rd_filtops +ffffffff82a38000 R fusefs_vfsops +ffffffff82a38070 R fusefs_vars +ffffffff82a39000 R fusefs_vops +ffffffff82a39110 R fusefsread_filtops +ffffffff82a39140 R fusefswrite_filtops +ffffffff82a39170 R fusefsvnode_filtops +ffffffff82a3a000 r pf_state_tree_RBT_INFO +ffffffff82a3a018 R pf_state_tree_RBT_TYPE +ffffffff82a3a020 r pf_state_tree_id_RBT_INFO +ffffffff82a3a038 R pf_state_tree_id_RBT_TYPE +ffffffff82a3a040 r pf_translate_af.zero +ffffffff82a3b000 R hfsc_ops +ffffffff82a3b038 R ifq_hfsc_ops +ffffffff82a3b040 R hfsc_pf_ops +ffffffff82a3b088 R pfq_hfsc_ops +ffffffff82a3c000 r fqcodel_ops +ffffffff82a3c038 R ifq_fqcodel_ops +ffffffff82a3c040 r fqcodel_pf_ops +ffffffff82a3c088 R pfq_fqcodel_ops +ffffffff82a3c090 r codel_intervals +ffffffff82a3d000 r pfsync_bulk_req_state_names +ffffffff82a3d030 r pfsync_bulk_req_event_names +ffffffff82a3d060 r pfsync_qs +ffffffff82a3d0d8 r pfsync_kstat_tpl +ffffffff82a3d2e0 r pfsync_acts +ffffffff82a3e000 r bio_mappings_RBT_INFO +ffffffff82a3e018 R bio_mappings_RBT_TYPE +ffffffff82a3f000 R hotplugread_filtops +ffffffff82a40000 R dtps_static +ffffffff82a41000 R db_show_all_cmds +ffffffff82a41180 R db_show_cmds +ffffffff82a414c0 R db_boot_cmds +ffffffff82a415a0 R db_command_table +ffffffff82a42000 R ddb_vars +ffffffff82a43000 R audio_ca +ffffffff82a43028 R audioctlread_filtops +ffffffff82a43058 R audiowrite_filtops +ffffffff82a43088 R audioread_filtops +ffffffff82a44000 R midi_ca +ffffffff82a44028 R midiwrite_filtops +ffffffff82a44058 R midiread_filtops +ffffffff82a45000 r mulawtolin16 +ffffffff82a45200 r lintomulaw +ffffffff82a46000 R randomread_filtops +ffffffff82a46030 R randomwrite_filtops +ffffffff82a47000 R video_ca +ffffffff82a47028 R video_filtops +ffffffff82a48000 R cd9660_vfsops +ffffffff82a49000 R cd9660_vops +ffffffff82a49110 R cd9660_specvops +ffffffff82a49220 R cd9660_fifovops +ffffffff82a49330 R cd9660read_filtops +ffffffff82a49360 R cd9660write_filtops +ffffffff82a49390 R cd9660vnode_filtops +ffffffff82a4a000 R udf_vfsops +ffffffff82a4b000 R udf_vops +ffffffff82a4b110 r mon_lens +ffffffff82a4c000 r month_days +ffffffff82a4d000 R execsw +ffffffff82a4e000 r shstrtab +ffffffff82a4f000 R copyright +ffffffff82a4f0c0 r initpaths +ffffffff82a50000 R sysent +ffffffff82a52000 R bufq_impls +ffffffff82a53000 R kqueueops +ffffffff82a53038 R kqread_filtops +ffffffff82a53068 R proc_filtops +ffffffff82a53098 R sig_filtops +ffffffff82a530c8 R file_filtops +ffffffff82a530f8 R timer_filtops +ffffffff82a53130 R sysfilt_ops +ffffffff82a53178 R seltrue_filtops +ffffffff82a531a8 R dead_filtops +ffffffff82a531d8 R badfd_filtops +ffffffff82a53208 r mutex_klistops +ffffffff82a53220 r rwlock_klistops +ffffffff82a54000 R kv_exec +ffffffff82a55000 R addrmask +ffffffff82a56000 r rw_ops +ffffffff82a57000 r proc_printit.pstat +ffffffff82a58000 R pledge_syscalls +ffffffff82a58a60 r pledgenames +ffffffff82a58cb0 r pledgereq +ffffffff82a59000 r unvname_rbt_RBT_INFO +ffffffff82a59018 R unvname_rbt_RBT_TYPE +ffffffff82a5a000 R sigprop +ffffffff82a5b000 R kern_vars +ffffffff82a5b2f0 R hw_vars +ffffffff82a5c000 R tc_vars +ffffffff82a5d000 r sys_gettimeofday.zerotz +ffffffff82a5e000 r taskq_sys_name +ffffffff82a5e006 r taskq_sys_mp_name +ffffffff82a5e010 R systq +ffffffff82a5e018 R systqmp +ffffffff82a60000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff82a60010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff82a60020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff82a60030 r gpt_get_fstype.gpt_uuid_linux +ffffffff82a60040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff82a60050 r gpt_get_fstype.gpt_uuid_unused +ffffffff82a60060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff82a60070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff82a61000 r hiballoc_addr_RBT_INFO +ffffffff82a61018 R hiballoc_addr_RBT_TYPE +ffffffff82a62000 R logread_filtops +ffffffff82a63000 r phtree_RBT_INFO +ffffffff82a63018 R phtree_RBT_TYPE +ffffffff82a63020 r pool_lock_ops_rw +ffffffff82a63058 r pool_lock_ops_mtx +ffffffff82a64000 R pipe_rfiltops +ffffffff82a64030 R pipe_wfiltops +ffffffff82a64060 R pipe_efiltops +ffffffff82a64090 r pipeops +ffffffff82a65000 R socketops +ffffffff82a66000 R sysvsem_vars +ffffffff82a67000 R char_type +ffffffff82a67100 R ttyread_filtops +ffffffff82a67130 R ttywrite_filtops +ffffffff82a67160 R ttyexcept_filtops +ffffffff82a68000 R ptcread_filtops +ffffffff82a68030 R ptcwrite_filtops +ffffffff82a68060 R ptcexcept_filtops +ffffffff82a6a000 R domains +ffffffff82a6b000 R unixdomain +ffffffff82a6b050 R unixsw +ffffffff82a6c000 R soread_filtops +ffffffff82a6c030 R sowrite_filtops +ffffffff82a6c060 R soexcept_filtops +ffffffff82a6d000 R sun_noname +ffffffff82a6d010 R uipc_usrreqs +ffffffff82a6d0a0 R uipc_dgram_usrreqs +ffffffff82a6d130 R unpstctl_vars +ffffffff82a6d160 R unpsqctl_vars +ffffffff82a6d190 R unpdgctl_vars +ffffffff82a6e000 r namecache_rb_cache_RBT_INFO +ffffffff82a6e018 R namecache_rb_cache_RBT_TYPE +ffffffff82a6f000 R generic_filtops +ffffffff82a70000 r buf_rb_bufs_RBT_INFO +ffffffff82a70018 R buf_rb_bufs_RBT_TYPE +ffffffff82a70020 r typename +ffffffff82a71000 R sync_vops +ffffffff82a72000 R vnops +ffffffff82a73000 R spec_vops +ffffffff82a74000 R dead_vops +ffffffff82a75000 R fifo_vops +ffffffff82a75110 R fiforead_filtops +ffffffff82a75140 R fifowrite_filtops +ffffffff82a75170 R fifoexcept_filtops +ffffffff82a76000 R regyear +ffffffff82a76020 R leapyear +ffffffff82a76040 r dos2unix +ffffffff82a76140 r u2l +ffffffff82a76240 r unix2dos +ffffffff82a77008 R msdosfs_vfsops +ffffffff82a78000 R msdosfs_vops +ffffffff82a78110 R msdosfsread_filtops +ffffffff82a78140 R msdosfswrite_filtops +ffffffff82a78170 R msdosfsvnode_filtops +ffffffff82a79000 r _utf_count +ffffffff82a7a000 R ntfs_vfsops +ffffffff82a7b000 R ntfs_vops +ffffffff82a7c000 R bpfread_filtops +ffffffff82a7c030 R bpf_mbuf_ops +ffffffff82a7d000 r bpf_mem_ops +ffffffff82a7e000 R priq_ops +ffffffff82a7e038 R ifq_priq_ops +ffffffff82a7e040 r ifq_kstat_tpl +ffffffff82a7e180 r ifiq_kstat_tpl +ffffffff82a7f000 r ether_crc32_le_update.crctab +ffffffff82a7f040 r ether_crc32_be_update.crctab +ffffffff82a80000 r lcp +ffffffff82a80078 r ipcp +ffffffff82a800f0 r ipv6cp +ffffffff82a80168 r chap +ffffffff82a801e0 r pap +ffffffff82a81000 R ifmedia_baudrate_descriptions +ffffffff82a82000 r fcstab +ffffffff82a84000 R tunread_filtops +ffffffff82a84030 R tunwrite_filtops +ffffffff82a85000 R bridge_brport +ffffffff82a86000 R bstp_etheraddr +ffffffff82a87000 r eb_tree_RBT_INFO +ffffffff82a87018 R eb_tree_RBT_TYPE +ffffffff82a88000 r veb_etherbridge_ops +ffffffff82a88028 r veb_pf_ipv4 +ffffffff82a88040 r veb_pf_ipv6 +ffffffff82a89000 r pipex_pppoe_padding +ffffffff82a8a000 r rn_addmask.normal_chars +ffffffff82a8b000 R route_src +ffffffff82a8b010 R route_usrreqs +ffffffff82a8b0a0 R routedomain +ffffffff82a8b0f0 R routesw +ffffffff82a8c000 R gre_vars +ffffffff82a8c030 r mgre_tree_RBT_INFO +ffffffff82a8c048 R mgre_tree_RBT_TYPE +ffffffff82a8c050 r egre_tree_RBT_INFO +ffffffff82a8c068 R egre_tree_RBT_TYPE +ffffffff82a8c070 r nvgre_ucast_tree_RBT_INFO +ffffffff82a8c088 R nvgre_ucast_tree_RBT_TYPE +ffffffff82a8c090 r nvgre_mcast_tree_RBT_INFO +ffffffff82a8c0a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff82a8c0b0 r eoip_tree_RBT_INFO +ffffffff82a8c0c8 R eoip_tree_RBT_TYPE +ffffffff82a8c0d0 r nvgre_etherbridge_ops +ffffffff82a8d000 r trunk_protos +ffffffff82a8e000 R ethermulticastaddr_slowprotocols +ffffffff82a8e006 R lacp_info_tlv_template +ffffffff82a8e00e R marker_info_tlv_template +ffffffff82a8e012 R marker_response_tlv_template +ffffffff82a8e020 R lacp_timer_funcs +ffffffff82a8f000 r lacp_rxm_state_names +ffffffff82a8f040 r lacp_rxm_event_names +ffffffff82a8f090 r aggr_port_selected_names +ffffffff82a8f0b0 r lacp_mux_state_names +ffffffff82a8f0e0 r lacp_mux_event_names +ffffffff82a8f128 r lacp_address_slow +ffffffff82a90000 r tpmr_pf_ipv4 +ffffffff82a90018 r tpmr_pf_ipv6 +ffffffff82a91000 r bpe_tree_RBT_INFO +ffffffff82a91018 R bpe_tree_RBT_TYPE +ffffffff82a91020 r bpe_etherbridge_ops +ffffffff82a92000 R pppx_rd_filtops +ffffffff82a92030 R pppx_wr_filtops +ffffffff82a92060 r pppx_ifs_RBT_INFO +ffffffff82a92078 R pppx_ifs_RBT_TYPE +ffffffff82a92080 r pppac_rd_filtops +ffffffff82a920b0 r pppac_wr_filtops +ffffffff82a93000 r vxlan_peers_RBT_INFO +ffffffff82a93018 R vxlan_peers_RBT_TYPE +ffffffff82a93020 r vxlan_etherbridge_ops +ffffffff82a94000 R stoeplitz_cache +ffffffff82a95000 R ieee80211_std_rateset_11a +ffffffff82a95010 R ieee80211_std_rateset_11b +ffffffff82a95020 R ieee80211_std_rateset_11g +ffffffff82a95030 R ieee80211_std_ratesets_11n +ffffffff82a953b0 R ieee80211_std_ratesets_11ac +ffffffff82a956b0 r ieee80211_setbasicrates.basic +ffffffff82a95710 r ieee80211_setmode.chanflags +ffffffff82a95730 r ieee80211_rate2media.rates +ffffffff82a958c0 r ieee80211_media2rate.ieeerates +ffffffff82a96000 r Sbox +ffffffff82a98000 r ieee80211_ioctl.empty_macaddr +ffffffff82a99000 r ieee80211_find_rxnode.zero +ffffffff82a99008 r ieee80211_tree_RBT_INFO +ffffffff82a99020 R ieee80211_tree_RBT_TYPE +ffffffff82a99028 r ieee80211_ess_tree_RBT_INFO +ffffffff82a99040 R ieee80211_ess_tree_RBT_TYPE +ffffffff82a99048 r ieee80211_do_slow_print.merge_print_intvl +ffffffff82a9a020 R ieee80211_edca_table +ffffffff82a9a0e0 R ieee80211_qap_edca_table +ffffffff82a9b000 R ieee80211_mgt_subtype_name +ffffffff82a9b080 R ieee80211_state_name +ffffffff82a9b0b0 R ieee80211_phymode_name +ffffffff82a9c000 r ieee80211_r_ctry +ffffffff82a9cae0 r ieee80211_r_names +ffffffff82a9cf80 r ieee80211_r_map +ffffffff82a9e000 R zeroin46_addr +ffffffff82a9e010 R zeroin_addr +ffffffff82a9f000 R inetdomain +ffffffff82a9f050 R inetsw +ffffffff82aa0000 R divertctl_vars +ffffffff82aa0030 R divert_usrreqs +ffffffff82aa1000 R icmpctl_vars +ffffffff82aa2000 R ipctl_vars_unlocked +ffffffff82aa2050 R ipctl_vars +ffffffff82aa2140 R inetctlerrmap +ffffffff82aa3000 R rip_usrreqs +ffffffff82aa4000 R tcp_outflags +ffffffff82aa5000 R tcp_timer_funcs +ffffffff82aa5030 R tcp_backoff +ffffffff82aa5064 R tcp_totbackoff +ffffffff82aa6000 R tcp_usrreqs +ffffffff82aa6090 R tcp6_usrreqs +ffffffff82aa6120 R tcpctl_vars +ffffffff82aa7000 R udp_usrreqs +ffffffff82aa7090 R udp6_usrreqs +ffffffff82aa7120 R udpctl_vars +ffffffff82aa8000 R gre_usrreqs +ffffffff82aa9000 r ipsec_ids_tree_RBT_INFO +ffffffff82aa9018 R ipsec_ids_tree_RBT_TYPE +ffffffff82aa9020 r ipsec_ids_flows_RBT_INFO +ffffffff82aa9038 R ipsec_ids_flows_RBT_TYPE +ffffffff82aa9040 R xformsw +ffffffff82aa9158 R xformswNXFORMSW +ffffffff82aaa000 R espctl_vars +ffffffff82aaa050 R ahctl_vars +ffffffff82aaa070 R ipcompctl_vars +ffffffff82aaa090 R ipsecctl_vars +ffffffff82aab000 R ipseczeroes +ffffffff82aac000 R carpctl_vars +ffffffff82aac050 r carp_set_state.carp_states +ffffffff82aad000 r Rcon +ffffffff82aae000 r Te2 +ffffffff82aae400 r Te3 +ffffffff82aae800 r Te0 +ffffffff82aaec00 r Te1 +ffffffff82aaf000 r rcon +ffffffff82aaf030 r Td0 +ffffffff82aaf430 r Td1 +ffffffff82aaf830 r Td2 +ffffffff82aafc30 r Td3 +ffffffff82ab0030 r Td4 +ffffffff82ab2000 r K256 +ffffffff82ab2100 r sha512_initial_hash_value +ffffffff82ab2140 r K512 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lapic_timer_intrclock -ffffffff82b3d000 R ioapic_ca -ffffffff82b3e000 R efifb_ca -ffffffff82b3e028 R efifb_screen_list -ffffffff82b3f000 R pvbus_ca -ffffffff82b40000 R pvclock_ca -ffffffff82b41000 R vmt_ca -ffffffff82b42000 R xen_ca -ffffffff82b43000 R xs_errors -ffffffff82b44000 R xnf_ca -ffffffff82b45000 R xbf_ca -ffffffff82b45028 R xbf_switch -ffffffff82b46000 R hyperv_ca -ffffffff82b46028 R hv_guid_network -ffffffff82b46038 R hv_guid_ide -ffffffff82b46048 R hv_guid_scsi -ffffffff82b46058 R hv_guid_shutdown -ffffffff82b46068 R hv_guid_timesync -ffffffff82b46078 R hv_guid_heartbeat -ffffffff82b46088 R hv_guid_kvp -ffffffff82b47000 r kvp_pools -ffffffff82b48000 R hvn_ca -ffffffff82b49000 R hvs_ca -ffffffff82b49028 R hvs_switch -ffffffff82b4a000 r virtio_device_name -ffffffff82b4b000 R vio_ca -ffffffff82b4b030 r virtio_net_feature_names -ffffffff82b4c000 R vioblk_ca -ffffffff82b4c028 R vioblk_switch -ffffffff82b4d000 R viomb_ca -ffffffff82b4d030 r viomb_feature_names -ffffffff82b4e000 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spl_lowered +ffffffff82af50a6 r intr_spl_lowered +ffffffff82af5113 R _xrstor +ffffffff82af5117 R _xrstors +ffffffff82af511b R _xsave +ffffffff82af511f R _xsaves +ffffffff82af5123 R _xsaveopt +ffffffff82af5127 R _pcid_set_reuse +ffffffff82af5133 R _jmprax +ffffffff82af5136 R _jmprax_len +ffffffff82af5138 R _jmpr11 +ffffffff82af513c R _jmpr11_len +ffffffff82af513e R _jmpr13 +ffffffff82af5142 R _jmpr13_len +ffffffff82af7000 r cpurevs +ffffffff82af716c r amd64_errata_set5 +ffffffff82af716e r amd64_errata_set1 +ffffffff82af7180 r amd64_errata_set8 +ffffffff82af719f r amd64_errata_set6 +ffffffff82af71a4 r amd64_errata_set7 +ffffffff82af71ac r amd64_errata_set3 +ffffffff82af71af r amd64_errata_set2 +ffffffff82af71b8 r amd64_errata_set9 +ffffffff82af8000 R ptp_masks +ffffffff82af8020 R ptp_shifts +ffffffff82af8030 R nkptpmax +ffffffff82af8050 R nbpd +ffffffff82af8070 R normal_pdes +ffffffff82af9000 R trap_type +ffffffff82af90b0 R trap_types +ffffffff82afa000 r x86fpflags_to_siginfo.x86fp_siginfo_table +ffffffff82afb000 R x86_soft_intr_to_ssir +ffffffff82afd000 R Xexceptions +ffffffff82afd100 r spl_lowered +ffffffff82afd12d R i8259_stubs +ffffffff82afd2ad R ioapic_edge_stubs +ffffffff82afd8ad R ioapic_level_stubs +ffffffff82afe000 R _stac +ffffffff82afe003 R _clac +ffffffff82aff000 R x86_bus_space_io_ops +ffffffff82aff130 R x86_bus_space_mem_ops +ffffffff82b00000 ? cpu_spinup_trampoline +ffffffff82b000b6 R cpu_spinup_trampoline_end +ffffffff82b000b6 R mp_tramp_data_start +ffffffff82b000fc R mp_tramp_data_end +ffffffff82b02000 R db_acpi_cmds +ffffffff82b020a0 R db_machine_command_table +ffffffff82b03000 r i8254_delay.delaytab +ffffffff82b04000 R rasops_cmap +ffffffff82b05000 r reverse +ffffffff82b05100 r ibm437_level1 +ffffffff82b05230 r ibm437_level2_0 +ffffffff82b05248 r ibm437_level2_1 +ffffffff82b05260 r ibm437_level2_3 +ffffffff82b05278 r ibm437_level2_32 +ffffffff82b05290 r ibm437_level2_34 +ffffffff82b052a8 r ibm437_level2_35 +ffffffff82b052c0 r ibm437_level2_37 +ffffffff82b052e0 r ibm437_chars_0 +ffffffff82b053e0 r ibm437_chars_1 +ffffffff82b053f0 r ibm437_chars_3 +ffffffff82b05430 r ibm437_chars_32 +ffffffff82b05460 r ibm437_chars_34 +ffffffff82b054d0 r ibm437_chars_35 +ffffffff82b054f0 r ibm437_chars_37 +ffffffff82b06000 R mii_media_table +ffffffff82b07000 R nsphy_ca +ffffffff82b07028 R nsphy_funcs +ffffffff82b07040 r nsphys +ffffffff82b08000 R nsphyter_ca +ffffffff82b08028 R nsphyter_funcs +ffffffff82b08040 r nsphyterphys +ffffffff82b09000 R gentbi_ca +ffffffff82b09028 R gentbi_funcs +ffffffff82b0a000 R qsphy_ca +ffffffff82b0a028 R qsphy_funcs +ffffffff82b0a040 r qsphys +ffffffff82b0b000 R inphy_ca +ffffffff82b0b028 R inphy_funcs +ffffffff82b0b040 r inphys +ffffffff82b0c000 R iophy_ca +ffffffff82b0c028 R iophy_funcs +ffffffff82b0c040 r iophys +ffffffff82b0d000 R eephy_ca +ffffffff82b0d028 R eephy_funcs +ffffffff82b0d040 r eephys +ffffffff82b0e000 R exphy_ca +ffffffff82b0e028 R exphy_funcs +ffffffff82b0f000 R rlphy_ca +ffffffff82b0f028 R rlphy_funcs +ffffffff82b0f040 r rlphys +ffffffff82b10000 R lxtphy_ca +ffffffff82b10028 R lxtphy_funcs +ffffffff82b10040 R lxtphy971_funcs +ffffffff82b10060 r lxtphys +ffffffff82b11000 R luphy_ca +ffffffff82b11028 R luphy_funcs +ffffffff82b11040 r luphys +ffffffff82b12000 R mtdphy_ca +ffffffff82b12028 R mtdphy_funcs +ffffffff82b12040 r mtdphys +ffffffff82b13000 R icsphy_ca +ffffffff82b13028 R icsphy_funcs +ffffffff82b13040 r icsphys +ffffffff82b14000 R sqphy_ca +ffffffff82b14028 R sqphy_funcs +ffffffff82b14040 r sqphys +ffffffff82b15000 R tqphy_ca +ffffffff82b15028 R tqphy_funcs +ffffffff82b15040 r tqphys +ffffffff82b16000 R ukphy_ca +ffffffff82b16028 R ukphy_funcs +ffffffff82b17000 R dcphy_ca +ffffffff82b17028 R dcphy_funcs +ffffffff82b18000 R bmtphy_ca +ffffffff82b18028 R bmtphy_funcs +ffffffff82b18040 r bmtphys +ffffffff82b19000 R brgphy_ca +ffffffff82b19028 R brgphy_copper_funcs +ffffffff82b19040 R brgphy_fiber_funcs +ffffffff82b19058 R brgphy_5708s_funcs +ffffffff82b19070 R brgphy_5709s_funcs +ffffffff82b19090 r brgphys +ffffffff82b19300 r brgphy_bcm5401_dspcode.dspcode +ffffffff82b1a000 R xmphy_ca +ffffffff82b1a028 R xmphy_funcs +ffffffff82b1a040 r xmphys +ffffffff82b1b000 R amphy_ca +ffffffff82b1b028 R amphy_funcs +ffffffff82b1b040 r amphys +ffffffff82b1c000 R acphy_ca +ffffffff82b1c028 R acphy_funcs +ffffffff82b1c040 r acphys +ffffffff82b1d000 R nsgphy_ca +ffffffff82b1d028 R nsgphy_funcs +ffffffff82b1d040 r nsgphys +ffffffff82b1e000 R urlphy_ca +ffffffff82b1e028 R urlphy_funcs +ffffffff82b1f000 R rgephy_ca +ffffffff82b1f028 R rgephy_funcs +ffffffff82b1f040 r rgephys +ffffffff82b20000 R ciphy_ca +ffffffff82b20028 R ciphy_funcs +ffffffff82b20040 r ciphys +ffffffff82b21000 R ipgphy_ca +ffffffff82b21028 R ipgphy_funcs +ffffffff82b21040 r ipgphys +ffffffff82b22000 R etphy_funcs +ffffffff82b22018 R etphy_ca +ffffffff82b22040 r etphys +ffffffff82b22060 r etphy_dspcode +ffffffff82b23000 R jmphy_funcs +ffffffff82b23018 R jmphy_ca +ffffffff82b23040 r jmphys +ffffffff82b24000 R atphy_funcs +ffffffff82b24018 R atphy_ca +ffffffff82b24040 r atphys +ffffffff82b25000 r sense_keys +ffffffff82b25080 r adesc +ffffffff82b28000 R scsi_readsafe_cmd +ffffffff82b29000 R scsibus_ca +ffffffff82b29030 R scsi_quirk_patterns +ffffffff82b2a000 R cd_ca +ffffffff82b2a030 R cd_patterns +ffffffff82b2b000 R ch_ca +ffffffff82b2b030 R ch_patterns +ffffffff82b2c000 R sd_ca +ffffffff82b2c030 R sd_patterns +ffffffff82b2d000 R st_quirk_patterns +ffffffff82b2d210 R st_ca +ffffffff82b2d240 R st_patterns +ffffffff82b2e000 R uk_ca +ffffffff82b2f000 R safte_ca +ffffffff82b30000 R ses_ca +ffffffff82b31000 R sym_ca +ffffffff82b31028 R sym_mpath_sym_ops +ffffffff82b31048 R sym_mpath_asym_ops +ffffffff82b32000 R rdac_ca +ffffffff82b32028 R rdac_mpath_ops +ffffffff82b33000 R emc_ca +ffffffff82b33028 R emc_mpath_ops +ffffffff82b34000 R hds_ca +ffffffff82b34028 R hds_mpath_ops +ffffffff82b35000 R atapiscsi_ca +ffffffff82b35028 r atapiscsi_switch +ffffffff82b36000 R wd_ca +ffffffff82b37000 R atascsi_switch +ffffffff82b38000 R mainbus_ca +ffffffff82b39000 R bios_ca +ffffffff82b3a000 R mpbios_ca +ffffffff82b3a030 r loc_where +ffffffff82b3b000 R mpbios_icu_table +ffffffff82b3c000 R cpu_ca +ffffffff82b3d000 R lapic_timer_intrclock +ffffffff82b3e000 R ioapic_ca +ffffffff82b3f000 R efifb_ca +ffffffff82b3f028 R efifb_screen_list +ffffffff82b40000 R pvbus_ca +ffffffff82b41000 R pvclock_ca +ffffffff82b42000 R vmt_ca +ffffffff82b43000 R xen_ca +ffffffff82b44000 R xs_errors +ffffffff82b45000 R xnf_ca +ffffffff82b46000 R xbf_ca +ffffffff82b46028 R xbf_switch +ffffffff82b47000 R hyperv_ca +ffffffff82b47028 R hv_guid_network +ffffffff82b47038 R hv_guid_ide +ffffffff82b47048 R hv_guid_scsi +ffffffff82b47058 R hv_guid_shutdown +ffffffff82b47068 R hv_guid_timesync +ffffffff82b47078 R hv_guid_heartbeat +ffffffff82b47088 R hv_guid_kvp +ffffffff82b48000 r kvp_pools +ffffffff82b49000 R hvn_ca +ffffffff82b4a000 R hvs_ca +ffffffff82b4a028 R hvs_switch +ffffffff82b4b000 r virtio_device_name +ffffffff82b4c000 R vio_ca +ffffffff82b4c030 r virtio_net_feature_names +ffffffff82b4d000 R vioblk_ca +ffffffff82b4d028 R vioblk_switch +ffffffff82b4e000 R viomb_ca +ffffffff82b4e030 r viomb_feature_names +ffffffff82b4f000 R viornd_ca +ffffffff82b50000 R vioscsi_ca +ffffffff82b50028 R vioscsi_switch +ffffffff82b50050 R vioscsi_vq_names +ffffffff82b51000 R vmmci_ca +ffffffff82b52000 R pci_ca +ffffffff82b53000 r pci_quirks +ffffffff82b54000 R pci_subclass_prehistoric +ffffffff82b54050 R pci_subclass_mass_storage +ffffffff82b54160 R pci_subclass_network +ffffffff82b54250 R pci_subclass_display +ffffffff82b542d0 R pci_subclass_multimedia +ffffffff82b54360 R pci_subclass_memory +ffffffff82b543c0 R pci_subclass_bridge +ffffffff82b54510 R pci_subclass_communications +ffffffff82b545d0 R pci_subclass_system +ffffffff82b546c0 R pci_subclass_input +ffffffff82b54770 R pci_subclass_dock +ffffffff82b547c0 R pci_subclass_processor +ffffffff82b54880 R pci_subclass_serialbus +ffffffff82b54990 R pci_subclass_wireless +ffffffff82b54a70 R pci_subclass_i2o +ffffffff82b54aa0 R pci_subclass_satcom +ffffffff82b54b20 R pci_subclass_crypto +ffffffff82b54b80 R pci_subclass_dasp +ffffffff82b54c10 R pci_class +ffffffff82b54e20 r pci_known_vendors +ffffffff82b56410 r pci_known_products +ffffffff82b7b000 R vga_pci_ca +ffffffff82b7b030 r vga_devs +ffffffff82b7c000 R ahc_pci_ident_table +ffffffff82b7c5d0 R ahc_pci_ca +ffffffff82b7d000 R ahd_pci_ident_table +ffffffff82b7d198 R ahd_num_pci_devs +ffffffff82b7d1a0 R ahd_pci_ca +ffffffff82b7d1d0 r pci_bus_modes +ffffffff82b7d210 r pci_status_strings +ffffffff82b7d250 r pci_status_source +ffffffff82b7d290 r split_status_strings +ffffffff82b7e000 R adw_pci_ca +ffffffff82b7e028 R adw_pci_devices +ffffffff82b7f000 r adw_3550_Default_EEPROM +ffffffff82b7f080 r adw_38C0800_Default_EEPROM +ffffffff82b7f100 r adw_38C1600_Default_EEPROM +ffffffff82b80000 R adw_asc3550_mcode +ffffffff82b813a0 R adw_asc3550_mcode_data +ffffffff82b813b0 R adw_asc38C0800_mcode +ffffffff82b82888 R adw_asc38C0800_mcode_data +ffffffff82b828a0 R adw_asc38C1600_mcode +ffffffff82b84160 R adw_asc38C1600_mcode_data +ffffffff82b85000 R twe_pci_ca +ffffffff82b85028 R twe_pci_devices +ffffffff82b86000 R arc_ca +ffffffff82b86028 R arc_switch +ffffffff82b86050 r arc_devices +ffffffff82b86190 r arc_intel +ffffffff82b86198 r arc_marvell +ffffffff82b861a0 r arc_lsi +ffffffff82b861a8 r arc_marvell2 +ffffffff82b87000 R jmb_ca +ffffffff82b87030 r jmb_devices +ffffffff82b88000 R ahci_pci_ca +ffffffff82b88028 R ahci_jmb_ca +ffffffff82b88050 r ahci_devices +ffffffff82b89000 R nvme_pci_ca +ffffffff82b8a000 R ami_pci_ca +ffffffff82b8a030 r ami_pci_subsys +ffffffff82b8a270 r ami_pci_vendors +ffffffff82b8b000 R mfi_pci_ca +ffffffff82b8b030 r mfi_pci_devices +ffffffff82b8c000 R mfii_ca +ffffffff82b8c028 R mfii_switch +ffffffff82b8c050 R mfii_pd_switch +ffffffff82b8c078 R mfii_iop_thunderbolt +ffffffff82b8c088 R mfii_iop_25 +ffffffff82b8c098 R mfii_iop_35 +ffffffff82b8c0b0 R mfii_devices +ffffffff82b8c180 r mfi_bbu_indicators +ffffffff82b8d000 R ips_ca +ffffffff82b8d028 r ips_ids +ffffffff82b8d040 r ips_chips +ffffffff82b8d090 r ips_names +ffffffff82b8d128 r ips_switch +ffffffff82b8d150 r ips_pt_switch +ffffffff82b8e000 R eap_ca +ffffffff82b8e028 R eap1370_hw_if +ffffffff82b8e0e0 R eap1371_hw_if +ffffffff82b8e198 R eap_midi_hw_if +ffffffff82b8e1d0 R eap_devices +ffffffff82b8f000 R auacer_pci_devices +ffffffff82b8f008 R auacer_ca +ffffffff82b8f030 R auacer_hw_if +ffffffff82b90000 R auich_ca +ffffffff82b90028 R auich_hw_if +ffffffff82b900e0 r auich_devices +ffffffff82b91000 R azalia_ca +ffffffff82b91028 R azalia_hw_if +ffffffff82b910e0 R azalia_pci_devices +ffffffff82b91120 r pin_devices +ffffffff82b911a0 r line_colors +ffffffff82b91220 r wtypes +ffffffff82b92000 r azalia_codec_init_dolby_atmos.atmos_init +ffffffff82b92050 r azalia_codec_init_dolby_atmos.atmos_v23_v25 +ffffffff82b93000 R envy_ca +ffffffff82b93028 R envy_hw_if +ffffffff82b930e0 R envy_midi_hw_if +ffffffff82b94000 R emuxki_devices +ffffffff82b94010 R emu_ca +ffffffff82b94038 R emuxki_hw_if +ffffffff82b940f0 r emuxki_recbuf_sz +ffffffff82b94170 r emuxki_recsrc_szreg +ffffffff82b9417c r emuxki_recsrc_bufaddrreg +ffffffff82b94190 r emuxki_rate_to_pitch.logMagTable +ffffffff82b94390 r emuxki_rate_to_pitch.logSlopeTable +ffffffff82b95000 R auixp_pci_devices +ffffffff82b95010 R auixp_ca +ffffffff82b95038 R auixp_hw_if +ffffffff82b96000 R clcs_ca +ffffffff82b96028 R cs4280_hw_if +ffffffff82b960e0 R cs4280_devices +ffffffff82b97000 R yds_ca +ffffffff82b97028 r yds_hw_if +ffffffff82b970e0 r yds_chip_capability_list +ffffffff82b97120 r yds_get_lpfk.lpfkt +ffffffff82b97160 r yds_get_lpfq.lpfqt +ffffffff82b98000 R auvia_ca +ffffffff82b98028 R auvia_hw_if +ffffffff82b980e0 R auvia_devices +ffffffff82b980f0 r auvia_set_params_sub.slottab +ffffffff82b99000 R gdt_pci_ca +ffffffff82b9a000 R ciss_pci_ca +ffffffff82b9a030 R ciss_pci_devices +ffffffff82b9b000 R qlw_pci_ca +ffffffff82b9b030 r qlw_devices +ffffffff82b9b050 r isp_1040_risc_code +ffffffff82ba09f0 r isp_1080_risc_code +ffffffff82ba8470 r isp_12160_risc_code +ffffffff82bb0000 R qla_pci_ca +ffffffff82bb0030 r qla_devices +ffffffff82bb1000 R qle_ca +ffffffff82bb1028 R qle_switch +ffffffff82bb1050 r qle_devices +ffffffff82bb1070 r isp_2400_risc_code +ffffffff82be0a50 r isp_2500_risc_code +ffffffff82c13000 R mpi_pci_ca +ffffffff82c13030 r mpi_devices +ffffffff82c14000 R mpii_ca +ffffffff82c14028 R mpii_switch +ffffffff82c14050 r mpii_devices +ffffffff82c15000 R sili_pci_ca +ffffffff82c15030 r sili_devices +ffffffff82c16000 R aq_devices +ffffffff82c16060 R aq_products +ffffffff82c161d0 R aq_fw1x_ops +ffffffff82c161f8 R aq_fw2x_ops +ffffffff82c16220 R aq2_fw_ops +ffffffff82c16248 R aq_ca +ffffffff82c17000 R de_ca +ffffffff82c17030 r tulip_srom_conninfo +ffffffff82c17120 r tulip_mii_phy_attrlist +ffffffff82c171e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff82c17208 r tulip_21040_10baset_only_boardsw +ffffffff82c17230 r tulip_21040_boardsw +ffffffff82c17258 r tulip_2114x_isv_boardsw +ffffffff82c17280 r tulip_21140_smc9332_boardsw +ffffffff82c172a8 r tulip_21040_auibnc_only_boardsw +ffffffff82c172d0 r tulip_21140_cogent_em100_boardsw +ffffffff82c172f8 r tulip_21140_accton_boardsw +ffffffff82c17320 r tulip_21140_eb_boardsw +ffffffff82c17348 r tulip_21041_boardsw +ffffffff82c17370 r tulip_read_macaddr.testpat +ffffffff82c17380 r tulip_vendors +ffffffff82c17430 r tulip_media_to_ifmedia +ffffffff82c17490 r tulip_chipdescs +ffffffff82c18000 R ep_pci_ca +ffffffff82c18030 R ep_pci_devices +ffffffff82c19000 R pcn_ca +ffffffff82c19028 R pcn_devices +ffffffff82c19030 r pcn_79c970_rcvfw +ffffffff82c19050 r pcn_79c970_xmtsp +ffffffff82c19070 r pcn_79c970_xmtfw +ffffffff82c19090 r pcn_79c971_rcvfw +ffffffff82c190b0 r pcn_79c971_xmtsp_sram +ffffffff82c190d0 r pcn_79c971_xmtsp +ffffffff82c190f0 r pcn_79c971_xmtfw +ffffffff82c19110 r pcn_variants +ffffffff82c1a000 R siop_products +ffffffff82c1b000 R siop_pci_ca +ffffffff82c1c000 R rdcide_setup +ffffffff82c1c005 R rdcide_hold +ffffffff82c1c00a R rdcide_udmatim +ffffffff82c1c010 R rdcide_udmaclk +ffffffff82c1c028 R default_product_desc +ffffffff82c1c040 R pciide_intel_products +ffffffff82c1c630 R pciide_amd_products +ffffffff82c1c690 R pciide_cmd_products +ffffffff82c1c730 R pciide_via_products +ffffffff82c1c810 R pciide_cypress_products +ffffffff82c1c820 R pciide_sis_products +ffffffff82c1c870 R pciide_natsemi_products +ffffffff82c1c890 R pciide_acer_products +ffffffff82c1c8a0 R pciide_triones_products +ffffffff82c1c8f0 R pciide_promise_products +ffffffff82c1cac0 R pciide_acard_products +ffffffff82c1cb10 R pciide_serverworks_products +ffffffff82c1cbb0 R pciide_nvidia_products +ffffffff82c1ce80 R pciide_ite_products +ffffffff82c1cea0 R pciide_ati_products +ffffffff82c1cf20 R pciide_jmicron_products +ffffffff82c1cf70 R pciide_phison_products +ffffffff82c1cf80 R pciide_rdc_products +ffffffff82c1cf90 R pciide_vendors +ffffffff82c1d140 R pciide_pci_ca +ffffffff82c1d168 R pciide_jmb_ca +ffffffff82c1d190 r piix_isp_dma +ffffffff82c1d193 r piix_rtc_dma +ffffffff82c1d196 r apollo_pio_set +ffffffff82c1d19b r cmd0643_9_data_tim_pio +ffffffff82c1d1a0 r cmd0643_9_data_tim_dma +ffffffff82c1d1a3 r cmd680_channel_map.init_val +ffffffff82c1d1b1 r cmd680_setup_channel.udma2_tbl +ffffffff82c1d1b8 r cmd680_setup_channel.dma_tbl +ffffffff82c1d1be r cmd680_setup_channel.pio_tbl +ffffffff82c1d1d0 r satalink_ba5_regmap +ffffffff82c1d690 r sii3114_chansetup.channel_names +ffffffff82c1d6b0 r cy_pio_pulse +ffffffff82c1d6c0 r sis_udma133new_tim +ffffffff82c1d6e0 r sis_pio133new_tim +ffffffff82c1d6f4 r sis_dma133new_tim +ffffffff82c1d700 r sis_udma66_tim +ffffffff82c1d706 r sis_udma100new_tim +ffffffff82c1d70c r sis_udma133old_tim +ffffffff82c1d713 r sis_pio_act +ffffffff82c1d718 r sis_pio_rec +ffffffff82c1d71d r natsemi_pio_pulse +ffffffff82c1d722 r natsemi_pio_recover +ffffffff82c1d727 r natsemi_dma_pulse +ffffffff82c1d72a r natsemi_dma_recover +ffffffff82c1d730 r scx200_udma33 +ffffffff82c1d73c r scx200_dma33 +ffffffff82c1d750 r scx200_pio33 +ffffffff82c1d778 r acer_udma +ffffffff82c1d77e r acer_pio +ffffffff82c1d790 r hpt370_pio +ffffffff82c1d7a4 r hpt370_dma +ffffffff82c1d7b0 r hpt370_udma +ffffffff82c1d7d0 r hpt372_pio +ffffffff82c1d7e4 r hpt372_dma +ffffffff82c1d7f0 r hpt372_udma +ffffffff82c1d80c r hpt366_dma +ffffffff82c1d820 r hpt366_udma +ffffffff82c1d840 r hpt374_pio +ffffffff82c1d854 r hpt374_dma +ffffffff82c1d860 r hpt374_udma +ffffffff82c1d87c r pdc2xx_pa +ffffffff82c1d881 r pdc2xx_pb +ffffffff82c1d886 r pdc2xx_dma_mb +ffffffff82c1d889 r pdc2xx_dma_mc +ffffffff82c1d88c r pdc2xx_udma_mc +ffffffff82c1d892 r acard_act_udma +ffffffff82c1d899 r acard_rec_udma +ffffffff82c1d8a0 r acard_udma_conf +ffffffff82c1d8a7 r acard_act_dma +ffffffff82c1d8aa r acard_rec_dma +ffffffff82c1d8ad r acard_act_pio +ffffffff82c1d8b2 r acard_rec_pio +ffffffff82c1d8b7 r nforce_udma +ffffffff82c1d8be r nforce_pio +ffffffff82c1d8c3 r ixp_mdma_timings +ffffffff82c1d8c6 r ixp_pio_timings +ffffffff82c1e000 R ppb_ca +ffffffff82c1f000 R cy_pci_ca +ffffffff82c1f030 R cy_pci_devices +ffffffff82c20000 R rl_pci_ca +ffffffff82c20030 R rl_pci_devices +ffffffff82c21000 R re_pci_devices +ffffffff82c21030 R re_pci_ca +ffffffff82c22000 R vr_ca +ffffffff82c23000 R txp_ca +ffffffff82c23030 R txp_devices +ffffffff82c24000 r cards +ffffffff82c25000 r format_params +ffffffff82c251a0 r pixfmt_table +ffffffff82c25320 r meteor_pixfmt_table +ffffffff82c26000 R bktr_ca +ffffffff82c26028 R bktr_hw_if +ffffffff82c27000 r tuners +ffffffff82c27170 r freqTable +ffffffff82c27260 r nabcst +ffffffff82c272a0 r irccable +ffffffff82c27310 r hrccable +ffffffff82c27380 r weurope +ffffffff82c27420 r jpnbcst +ffffffff82c27460 r jpncable +ffffffff82c274c0 r xussr +ffffffff82c27530 r australia +ffffffff82c27590 r france +ffffffff82c28000 R xl_pci_ca +ffffffff82c28030 R xl_pci_devices +ffffffff82c29000 R fxp_pci_ca +ffffffff82c29030 R fxp_pci_devices +ffffffff82c2a000 R em_devices +ffffffff82c2a308 R em_ca +ffffffff82c2a330 r em_counters +ffffffff82c2b000 r em_igp_cable_length_table +ffffffff82c2b100 r em_igp_2_cable_length_table +ffffffff82c2c000 R ixgb_devices +ffffffff82c2c010 R ixgb_ca +ffffffff82c2d000 R ixgbe_devices +ffffffff82c2d0b8 R ix_ca +ffffffff82c2d0e0 r ix_counters +ffffffff82c2d3e0 r ix_rxq_kstats_tpl +ffffffff82c2d458 r ix_txq_kstats_tpl +ffffffff82c2e000 r ixgbe_mvals_base +ffffffff82c2e060 r ixgbe_mvals_X540 +ffffffff82c2e0c0 r ixgbe_mvals_X550 +ffffffff82c2e120 r ixgbe_mvals_X550EM_x +ffffffff82c2e180 r ixgbe_mvals_X550EM_a +ffffffff82c31000 R ixv_devices +ffffffff82c31018 R ixv_ca +ffffffff82c31040 r ixv_counters +ffffffff82c310b8 r ixv_txq_kstats_tpl +ffffffff82c31108 r ixv_rxq_kstats_tpl +ffffffff82c32000 R ixl_ca +ffffffff82c32030 R ixl_port_counters +ffffffff82c322c0 R ixl_vsi_counters +ffffffff82c32380 r ixl_devices +ffffffff82c324c0 r ixl_710 +ffffffff82c324e8 r ixl_722 +ffffffff82c32510 r ixl_pf_aq_regs +ffffffff82c32578 r ixl_710_decrepit +ffffffff82c325a0 r ixl_phy_type_map +ffffffff82c32770 r ixl_speed_type_map +ffffffff82c327b0 r ixl_hmc_pack_rxq +ffffffff82c32830 r ixl_hmc_pack_txq +ffffffff82c328a0 r ixl_sfp_ops +ffffffff82c328b8 r ixl_qsfp_ops +ffffffff82c33000 r dwqe_pci_devices +ffffffff82c33018 R dwqe_pci_ca +ffffffff82c34000 R ice_driver_version +ffffffff82c3400a R ice_major_version +ffffffff82c3400b R ice_minor_version +ffffffff82c3400c R ice_patch_version +ffffffff82c3400d R ice_rc_version +ffffffff82c3400e r ice_devices +ffffffff82c34020 r blk_sizes +ffffffff82c34080 r ice_blk_sids +ffffffff82c340f0 R ice_tlan_ctx_info +ffffffff82c341e0 r ice_rlan_ctx_info +ffffffff82c34290 r phy_link_speeds +ffffffff82c34360 r ice_ptypes_mac_il +ffffffff82c343e0 r ice_flds_info +ffffffff82c344d0 R ice_ca +ffffffff82c34500 r ice_ptypes_mac_ofos +ffffffff82c34580 r ice_ptypes_macvlan_il +ffffffff82c34600 r ice_ptypes_arp_of +ffffffff82c34680 r ice_ptypes_ipv4_il +ffffffff82c34700 r ice_ptypes_ipv6_il +ffffffff82c34780 r ice_ptypes_ipv4_ofos_no_l4 +ffffffff82c34800 r ice_ptypes_ipv4_il_no_l4 +ffffffff82c34880 r ice_ptypes_ipv4_ofos +ffffffff82c34900 r ice_ptypes_ipv6_ofos_no_l4 +ffffffff82c34980 r ice_ptypes_ipv6_il_no_l4 +ffffffff82c34a00 r ice_ptypes_ipv6_ofos +ffffffff82c34a80 r ice_ptypes_udp_il +ffffffff82c34b00 r ice_ptypes_tcp_il +ffffffff82c34b80 r ice_ptypes_sctp_il +ffffffff82c34c00 r ice_ptypes_icmp_of +ffffffff82c34c80 r ice_ptypes_icmp_il +ffffffff82c34d00 r ice_ptypes_gre_of +ffffffff82c36000 R xge_ca +ffffffff82c36028 R xge_devices +ffffffff82c36030 r xge_fix_mac +ffffffff82c36110 r xge_xena_dtx_cfg +ffffffff82c36170 r xge_herc_dtx_cfg +ffffffff82c37000 R thtc_ca +ffffffff82c37028 R tht_ca +ffffffff82c37050 r thtc_devices +ffffffff82c37068 r tht_link_state.interval +ffffffff82c38000 R myx_ca +ffffffff82c38028 R myx_devices +ffffffff82c39000 R oce_ca +ffffffff82c39030 R oce_devices +ffffffff82c3a000 R dc_pci_ca +ffffffff82c3b000 R epic_pci_ca +ffffffff82c3b028 R epic_pci_devices +ffffffff82c3c000 R ti_pci_ca +ffffffff82c3c030 R ti_devices +ffffffff82c3d000 R ne_pci_ca +ffffffff82c3d030 R ne_pci_prod +ffffffff82c3e000 R gem_pci_ca +ffffffff82c3e030 R gem_pci_devices +ffffffff82c3e050 r gem_promhdr +ffffffff82c3e052 r gem_promdat +ffffffff82c3e05a r gem_promdat2 +ffffffff82c3f000 R cas_ca +ffffffff82c3f028 R cas_pci_devices +ffffffff82c3f030 r cas_promhdr +ffffffff82c3f032 r cas_promdat_sun +ffffffff82c3f03a r cas_promdat_ns +ffffffff82c3f042 r cas_promdat2 +ffffffff82c40000 R sf_pci_ca +ffffffff82c40028 R sf_pci_products +ffffffff82c41000 R sis_ca +ffffffff82c41028 R sis_devices +ffffffff82c42000 R se_devices +ffffffff82c42008 R se_ca +ffffffff82c43000 R mbg_ca +ffffffff82c43030 R mbg_devices +ffffffff82c44000 R uhci_pci_ca +ffffffff82c45000 R ohci_pci_ca +ffffffff82c46000 R ehci_pci_ca +ffffffff82c47000 R xhci_pci_ca +ffffffff82c48000 R cbb_pci_ca +ffffffff82c48028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff82c49000 R skc_devices +ffffffff82c49030 R skc_ca +ffffffff82c49058 R sk_ca +ffffffff82c4a000 R mskc_devices +ffffffff82c4a0a8 R mskc_ca +ffffffff82c4a0d0 R msk_ca +ffffffff82c4a100 r msk_mib +ffffffff82c4b000 R puc_pci_ca +ffffffff82c4c000 R puc_devs +ffffffff82c51000 R com_puc_ca +ffffffff82c51030 r puc_port_types +ffffffff82c52000 R lpt_puc_ca +ffffffff82c53000 R wi_pci_ca +ffffffff82c53030 r wi_pci_products +ffffffff82c54000 R an_pci_ca +ffffffff82c54030 R an_pci_devices +ffffffff82c55000 R iwi_devices +ffffffff82c55010 R iwi_ca +ffffffff82c56000 R wpi_ca +ffffffff82c56028 r wpi_devices +ffffffff82c56030 r wpi_rates +ffffffff82c56050 r wpi_rf_gain_5ghz +ffffffff82c560a0 r wpi_dsp_gain_5ghz +ffffffff82c560f0 r wpi_rf_gain_2ghz +ffffffff82c56140 r wpi_dsp_gain_2ghz +ffffffff82c56190 r wpi_pmgt +ffffffff82c56310 r wpi_bands +ffffffff82c57000 R iwn_mcs2ridx +ffffffff82c57020 R iwn_ca +ffffffff82c57050 r iwn_devices +ffffffff82c570e8 r iwn4965_sensitivity_limits +ffffffff82c57124 r iwn5000_sensitivity_limits +ffffffff82c57160 r iwn5150_sensitivity_limits +ffffffff82c5719c r iwn1000_sensitivity_limits +ffffffff82c571d8 r iwn6000_sensitivity_limits +ffffffff82c57214 r iwn2000_sensitivity_limits +ffffffff82c57250 r iwn_fw_errmsg +ffffffff82c57340 r iwn4965_set_txpower.tdiv +ffffffff82c57360 r iwn4965_rf_gain_5ghz +ffffffff82c573d0 r iwn4965_dsp_gain_5ghz +ffffffff82c57440 r iwn4965_dsp_gain_2ghz +ffffffff82c574b0 r iwn_pmgt +ffffffff82c576f0 r iwn4965_post_alive.qid2fifo +ffffffff82c57700 r iwn_bands +ffffffff82c57770 r iwn_rates +ffffffff82c57820 r iwn4965_rf_gain_2ghz +ffffffff82c58000 R iwm_nvm_channels +ffffffff82c58030 R iwm_nvm_channels_8000 +ffffffff82c58070 R iwm_rates +ffffffff82c580d0 R iwm_ht_mcs2ridx +ffffffff82c58110 R iwm_tid_to_ac +ffffffff82c58118 R iwm_ac_to_tx_fifo +ffffffff82c58120 R iwm_nvm_to_read +ffffffff82c58144 r iwm_set_hw_address_8000.reserved_mac +ffffffff82c58180 r iwm_sf_full_timeout +ffffffff82c581b0 r iwm_sf_full_timeout_def +ffffffff82c581e0 r advanced_lookup +ffffffff82c58320 r iwm_devices +ffffffff82c58360 R iwm_ca +ffffffff82c59000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff82c59020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff82c59040 R iwx_qu_b0_hr1_b0 +ffffffff82c59060 R iwx_qu_b0_hr_b0 +ffffffff82c59080 R iwx_ax201_cfg_qu_hr +ffffffff82c590a0 R iwx_qu_c0_hr1_b0 +ffffffff82c590c0 R iwx_qu_c0_hr_b0 +ffffffff82c590e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff82c59100 R iwx_quz_a0_hr1_b0 +ffffffff82c59120 R iwx_ax201_cfg_quz_hr +ffffffff82c59140 R iwx_cfg_so_a0_hr_b0 +ffffffff82c59160 R iwx_cfg_quz_a0_hr_b0 +ffffffff82c59180 R iwx_2ax_cfg_so_gf_a0 +ffffffff82c591a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff82c591c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff82c591e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff82c59200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff82c59220 R iwx_2ax_cfg_so_jf_b0 +ffffffff82c59240 R iwx_cfg_ma_b0_hr_b0 +ffffffff82c59260 R iwx_cfg_ma_b0_gf_a0 +ffffffff82c59280 R iwx_cfg_ma_b0_gf4_a0 +ffffffff82c592a0 R iwx_cfg_ma_a0_fm_a0 +ffffffff82c592c0 R iwx_nvm_channels_8000 +ffffffff82c59300 R iwx_rates +ffffffff82c59360 R iwx_mcs2ridx +ffffffff82c593a0 R iwx_tid_to_ac +ffffffff82c593a8 R iwx_ac_to_tx_fifo +ffffffff82c593b0 r iwx_nvm_channels_uhb +ffffffff82c5941e r iwx_is_valid_mac_addr.reserved_mac +ffffffff82c59430 r iwx_sf_full_timeout +ffffffff82c59460 r iwx_sf_full_timeout_def +ffffffff82c59490 r advanced_lookup +ffffffff82c595d0 r iwx_devices +ffffffff82c59620 r iwx_dev_info_table +ffffffff82c59f38 R iwx_ca +ffffffff82c5a000 R qwx_pci_ca +ffffffff82c5a028 r qwx_pci_devices +ffffffff82c5a030 R qwx_msi_config_one_msi +ffffffff82c5a050 R qwx_msi_config +ffffffff82c5a0c8 r qwx_pci_ops_qca6390 +ffffffff82c5a0f8 r qwx_pci_ops_qcn9074 +ffffffff82c5b000 R cmpci_ca +ffffffff82c5b028 R cmpci_hw_if +ffffffff82c5b0e0 r cmpci_rate_table +ffffffff82c5b120 R cmpci_devices +ffffffff82c5b130 r cmpci_query_devinfo.mixer_port_names +ffffffff82c5b160 r cmpci_query_devinfo.mixer_classes +ffffffff82c5c000 R iha_pci_ca +ffffffff82c5c028 R iha_switch +ffffffff82c5d000 R pcscp_ca +ffffffff82c5e000 R bge_ca +ffffffff82c5e030 R bge_devices +ffffffff82c5e1b0 r bge_revisions +ffffffff82c5e610 r bge_majorrevs +ffffffff82c5e790 r bge_kstat_tpl +ffffffff82c5f000 R bnx_devices +ffffffff82c5f020 R bnx_ca +ffffffff82c60000 R vge_ca +ffffffff82c60028 R vge_devices +ffffffff82c61000 R stge_ca +ffffffff82c61028 R stge_mii_bitbang_ops +ffffffff82c61050 R stge_devices +ffffffff82c62000 R nfe_ca +ffffffff82c62030 R nfe_devices +ffffffff82c63000 R et_devices +ffffffff82c63008 R et_ca +ffffffff82c64000 R jme_devices +ffffffff82c64008 R jme_ca +ffffffff82c65000 R age_devices +ffffffff82c65008 R age_ca +ffffffff82c66000 R alc_devices +ffffffff82c66038 R alc_ca +ffffffff82c67000 R ale_devices +ffffffff82c67008 R ale_ca +ffffffff82c68000 R amdpm_ca +ffffffff82c68030 R amdpm_ids +ffffffff82c69000 R bce_ca +ffffffff82c69028 R bce_devices +ffffffff82c6a000 R ath_pci_ca +ffffffff82c6b000 R athn_pci_ca +ffffffff82c6b030 r athn_pci_devices +ffffffff82c6c000 R atw_pci_ca +ffffffff82c6c028 R atw_pci_devices +ffffffff82c6d000 R rtw_pci_ca +ffffffff82c6d030 R rtw_pci_products +ffffffff82c6e000 R rtwn_pci_ca +ffffffff82c6e030 r rtwn_pci_devices +ffffffff82c6e040 r rtl8188eu_mac +ffffffff82c6e1b0 r rtl8192cu_mac +ffffffff82c6e310 r rtl8192ce_mac +ffffffff82c6e458 r rtl8188eu_bb_prog +ffffffff82c6e480 r rtl8723a_bb_prog +ffffffff82c6e4a8 r rtl8192ce_bb_prog_1t +ffffffff82c6e4d0 r rtl8192ce_bb_prog_2t +ffffffff82c6e500 r rtl8188eu_bb_regs +ffffffff82c6e680 r rtl8188eu_bb_vals +ffffffff82c6e980 r rtl8188eu_agc_vals +ffffffff82c6eb80 r rtl8723a_bb_regs +ffffffff82c6ed00 r rtl8723a_bb_vals +ffffffff82c6eff0 r rtl8192ce_agc_vals +ffffffff82c6f270 r rtl8192ce_bb_regs +ffffffff82c6f3f0 r rtl8192ce_bb_vals_1t +ffffffff82c6f6e0 r rtl8192ce_bb_vals_2t +ffffffff82c70000 R ral_pci_ca +ffffffff82c70030 R ral_pci_devices +ffffffff82c71000 R acx_pci_ca +ffffffff82c71028 R acx_pci_devices +ffffffff82c72000 R pgt_pci_ca +ffffffff82c72028 R pgt_pci_devices +ffffffff82c73000 R malo_pci_ca +ffffffff82c73028 R malo_pci_devices +ffffffff82c74000 R bwi_pci_ca +ffffffff82c74030 R bwi_pci_devices +ffffffff82c75000 R piixpm_ca +ffffffff82c75030 R piixpm_ids +ffffffff82c76000 R vic_ca +ffffffff82c76028 R vic_devices +ffffffff82c77000 R vmx_devices +ffffffff82c77008 R vmx_ca +ffffffff82c77030 r vmx_tx_kstat_tpl +ffffffff82c770d0 r vmx_kstat_rate +ffffffff82c770e0 r vmx_rx_kstat_tpl +ffffffff82c78000 R vmwpvs_ca +ffffffff82c78028 R vmwpvs_switch +ffffffff82c79000 R lii_ca +ffffffff82c79028 R lii_devices +ffffffff82c7a000 R ichiic_ca +ffffffff82c7a030 R ichiic_ids +ffffffff82c7b000 R viapm_ca +ffffffff82c7b030 R viapm_ids +ffffffff82c7b070 r val_to_temp +ffffffff82c7b870 r val_to_uV.mult +ffffffff82c7c000 R amdiic_ca +ffffffff82c7c028 R amdiic_ids +ffffffff82c7d000 R nviic_ca +ffffffff82c7d030 R nviic_ids +ffffffff82c7e000 R sdhc_pci_ca +ffffffff82c7f000 R kate_ca +ffffffff82c7f030 r kate_proc +ffffffff82c80000 R km_ca +ffffffff82c80030 r km_devices +ffffffff82c81000 R ksmn_ca +ffffffff82c81030 r ksmn_devices +ffffffff82c82000 R iosf_pci_ca +ffffffff82c83000 R itherm_devices +ffffffff82c83008 R itherm_ca +ffffffff82c84000 R pchtemp_ca +ffffffff82c84030 R pchtemp_devices +ffffffff82c85000 R rtsx_pci_ca +ffffffff82c86000 R xspd_ca +ffffffff82c86028 R xspd_devices +ffffffff82c87000 R virtio_pci_ca +ffffffff82c87028 R virtio_pci_ops +ffffffff82c88000 R dwiic_pci_ca +ffffffff82c88030 R dwiic_pci_ids +ffffffff82c89000 R bwfm_pci_ca +ffffffff82c89030 r bwfm_pci_devices +ffffffff82c8a000 R ccp_pci_ca +ffffffff82c8a030 r ccp_pci_devices +ffffffff82c8b000 r psp_pci_devices +ffffffff82c8c000 R bnxt_devices +ffffffff82c8c040 R bnxt_ca +ffffffff82c8d000 R mcx_ca +ffffffff82c8d030 r mcx_devices +ffffffff82c8d060 r mcx_rss_config +ffffffff82c8d0d0 r mcx_eth_cap_map +ffffffff82c8d2d0 r mcx_ext_eth_cap_map +ffffffff82c8d3d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff82c8d3e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82c8d400 r mcx_kstat_ppcnt_rfc2819 +ffffffff82c8d418 r mcx_kstat_ppcnt_rfc3635 +ffffffff82c8d430 r mcx_ppcnt_ieee8023_tpl +ffffffff82c8d5b0 r mcx_ppcnt_rfc2863_tpl +ffffffff82c8d6c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82c8d870 r mcx_ppcnt_rfc3635_tpl +ffffffff82c8d9b0 r mcx_kstat_mtmp_tpl +ffffffff82c8da50 r mcx_kstat_mtmp_rate +ffffffff82c8da60 r mcx_queue_kstat_tpl +ffffffff82c8e000 R iavf_ca +ffffffff82c8e030 r iavf_devices +ffffffff82c8e040 r iavf_aq_regs +ffffffff82c8e0b0 r iavf_link_speeds +ffffffff82c8f000 R rge_ca +ffffffff82c8f028 R rge_devices +ffffffff82c8f040 r rge_phy_config_mac_cfg2_8126.mac_cfg2_a438_value +ffffffff82c8f070 r rge_phy_config_mac_cfg2_8126.mac_cfg2_b87e_value +ffffffff82c8f0c0 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff82c8f0e0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff82c8f140 r rtl8125_mac_cfg3_mcu +ffffffff82c8f9e0 r rtl8125_mac_cfg5_mcu +ffffffff82c90a00 r rtl8126_mac_cfg2_mcu +ffffffff82c97a20 r rtl8125_mac_bps +ffffffff82c97e20 r rtl8125b_mac_bps +ffffffff82c98048 r rge_kstats_tpl +ffffffff82c99000 R igc_devices +ffffffff82c99040 R igc_ca +ffffffff82c99070 r igc_counters +ffffffff82c9a000 R ngbe_devices +ffffffff82c9a008 R ngbe_ca +ffffffff82c9b000 R com_pci_ca +ffffffff82c9b030 R com_pci_ids +ffffffff82c9c000 R ufshci_pci_ca +ffffffff82c9d000 r agp_attach.agp_max +ffffffff82c9d048 R agp_ca +ffffffff82c9e000 R intagp_ca +ffffffff82c9f000 r drm_plane_create_rotation_property.props +ffffffff82ca0000 r drm_bridge_priv_state_funcs +ffffffff82ca2000 r color_encoding_name +ffffffff82ca2020 r color_range_name +ffffffff82ca3000 r drm_subpixel_enum_list +ffffffff82ca3060 r drm_dpms_enum_list +ffffffff82ca30a0 r drm_dvi_i_select_enum_list +ffffffff82ca30d0 r drm_dvi_i_subconnector_enum_list +ffffffff82ca3100 r drm_tv_mode_enum_list +ffffffff82ca3170 r drm_tv_select_enum_list +ffffffff82ca31c0 r drm_tv_subconnector_enum_list +ffffffff82ca3210 r drm_dp_subconnector_enum_list +ffffffff82ca3280 r colorspace_names +ffffffff82ca3300 r drm_link_status_enum_list +ffffffff82ca3320 r drm_scaling_mode_enum_list +ffffffff82ca3360 r drm_aspect_ratio_enum_list +ffffffff82ca3390 r drm_content_type_enum_list +ffffffff82ca33e0 r drm_panel_orientation_enum_list +ffffffff82ca3420 r privacy_screen_enum +ffffffff82ca4000 r drm_crtc_fence_ops +ffffffff82ca5000 r drm_dmt_modes +ffffffff82ca7940 r edid_cea_modes_1 +ffffffff82cab4d0 r edid_cea_modes_193 +ffffffff82cac180 r edid_quirk_list +ffffffff82cac360 r drm_mode_do_interlace_quirk.cea_interlaced +ffffffff82cac3a0 r edid_4k_modes +ffffffff82cac600 r edid_est_modes +ffffffff82cace00 r est3_modes +ffffffff82cacf60 r stereo_mandatory_modes +ffffffff82cacfe0 r extra_modes +ffffffff82cae000 r drm_encoder_enum_list +ffffffff82cb0000 r drm_fbdev_dma_helper_funcs +ffffffff82cb0010 r drm_fbdev_dma_client_funcs +ffffffff82cb0030 r drm_fbdev_dma_fb_ops +ffffffff82cb1000 r drm_fbdev_generic_helper_funcs +ffffffff82cb1010 r drm_fbdev_generic_client_funcs +ffffffff82cb1030 r drm_fbdev_generic_fb_ops +ffffffff82cb3000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82cb3004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82cb3008 r drm_fb_xrgb8888_to_xrgb1555.dst_pixsize +ffffffff82cb300c r drm_fb_xrgb8888_to_argb1555.dst_pixsize +ffffffff82cb3010 r drm_fb_xrgb8888_to_rgba5551.dst_pixsize +ffffffff82cb3014 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff82cb3018 r drm_fb_xrgb8888_to_argb8888.dst_pixsize +ffffffff82cb301c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82cb3020 r drm_fb_xrgb8888_to_argb2101010.dst_pixsize +ffffffff82cb3024 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82cb3028 r drm_fb_xrgb8888_to_xbgr8888.dst_pixsize +ffffffff82cb302c r drm_fb_xrgb8888_to_abgr8888.dst_pixsize +ffffffff82cb4000 r __drm_format_info.formats +ffffffff82cb5000 R drm_pgops +ffffffff82cb6000 r drm_gem_dma_default_funcs +ffffffff82cb7000 R drm_gem_fb_funcs +ffffffff82cb8000 r drm_ioctls +ffffffff82cba000 r dma_fence_stub_ops +ffffffff82cba040 R dma_fence_array_ops +ffffffff82cba080 R dma_fence_chain_ops +ffffffff82cba0c0 R dmabufops +ffffffff82cba0f8 R syncfileops +ffffffff82cbb000 r drm_plane_type_enum_list +ffffffff82cbc000 r tv_modes_parameters +ffffffff82cbc0c0 r drm_mode_status_names +ffffffff82cbc200 r drm_named_modes +ffffffff82cbd000 r primary_plane_funcs +ffffffff82cbd068 r safe_modeset_formats +ffffffff82cbe000 r orientation_data +ffffffff82cc2080 r lcd800x1280_rightside_up +ffffffff82cc2098 r lcd720x1280_rightside_up +ffffffff82cc20b0 r lcd800x1280_leftside_up +ffffffff82cc20c8 r lcd1080x1920_leftside_up +ffffffff82cc20e0 r lcd1600x2560_rightside_up +ffffffff82cc20f8 r lcd1200x1920_rightside_up +ffffffff82cc2110 r gpd_micropc +ffffffff82cc2128 r gpd_pocket +ffffffff82cc2140 r gpd_pocket2 +ffffffff82cc2158 r gpd_win +ffffffff82cc2170 r gpd_win2 +ffffffff82cc2188 r lcd1080x1920_rightside_up +ffffffff82cc21a0 r itworks_tw891 +ffffffff82cc21b8 r lcd1600x2560_leftside_up +ffffffff82cc21d0 r onegx1_pro +ffffffff82cc21e8 r lcd1280x1920_rightside_up +ffffffff82cc2200 r gpd_onemix2s +ffffffff82cc2218 r .compoundliteral +ffffffff82cc2228 r .compoundliteral.5 +ffffffff82cc2250 r .compoundliteral.9 +ffffffff82cc2270 r .compoundliteral.17 +ffffffff82cc22b0 r .compoundliteral.21 +ffffffff82cc22d0 r .compoundliteral.23 +ffffffff82cc22e0 r .compoundliteral.25 +ffffffff82cc22f0 r .compoundliteral.29 +ffffffff82cc3000 r drm_gem_prime_dmabuf_ops +ffffffff82cc5000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82cc6000 r drm_dp_phy_name.phy_names +ffffffff82cc6048 r drm_dp_i2c_algo +ffffffff82cc6058 r drm_dp_i2c_lock_ops +ffffffff82cc6070 r dp_aux_bl_ops +ffffffff82cc6090 r dpcd_quirk_list +ffffffff82cc6320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82cc7000 R drm_dp_mst_topology_state_funcs +ffffffff82cc7020 r drm_dp_mst_req_type_str.req_type_str +ffffffff82cc71f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str 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r chv_dpll +ffffffff82cd7050 r vlv_dpll +ffffffff82cd70a0 r g4x_dpll +ffffffff82cd70f0 r pch_dpll +ffffffff82cd7138 r intel_dp_enc_funcs +ffffffff82cd8000 r intel_hdmi_enc_funcs +ffffffff82cd9000 r vlv_primary_formats +ffffffff82cd9030 r ivb_primary_formats +ffffffff82cd9050 r i965_primary_formats +ffffffff82cd9070 r i8xx_primary_formats +ffffffff82cd9080 r i965_plane_funcs +ffffffff82cd90e8 r i8xx_plane_funcs +ffffffff82cda000 r ilk_wm_funcs +ffffffff82cda040 r vlv_wm_funcs +ffffffff82cda080 r g4x_wm_funcs +ffffffff82cda0c0 r nop_funcs +ffffffff82cda100 r pnv_wm_funcs +ffffffff82cda140 r i965_wm_funcs +ffffffff82cda180 r i9xx_wm_funcs +ffffffff82cda1c0 r i845_wm_funcs +ffffffff82cda200 r cxsr_latency_table +ffffffff82cdb000 r gen11_dsi_encoder_funcs +ffffffff82cdb020 r gen11_dsi_connector_funcs +ffffffff82cdb098 r gen11_dsi_connector_helper_funcs +ffffffff82cdb0f8 r gen11_dsi_host_ops +ffffffff82cdc000 r intel_plane_helper_funcs +ffffffff82cdd000 r g4x_audio_funcs +ffffffff82cdd018 r ibx_audio_funcs +ffffffff82cdd030 r hsw_audio_funcs +ffffffff82cdd050 r hdmi_audio_clock +ffffffff82cdd0c0 r hdmi_aud_ncts_36bpp +ffffffff82cdd1a0 r hdmi_aud_ncts_30bpp +ffffffff82cdd280 r hdmi_aud_ncts_24bpp +ffffffff82cde000 r intel_backlight_device_ops +ffffffff82cde018 r bxt_pwm_funcs +ffffffff82cde048 r cnp_pwm_funcs +ffffffff82cde078 r lpt_pwm_funcs +ffffffff82cde0a8 r spt_pwm_funcs +ffffffff82cde0d8 r pch_pwm_funcs +ffffffff82cde108 r ext_pwm_funcs +ffffffff82cde138 r vlv_pwm_funcs +ffffffff82cde168 r i965_pwm_funcs +ffffffff82cde198 r i9xx_pwm_funcs +ffffffff82cde1c8 r pwm_bl_funcs +ffffffff82cdf000 r bdb_blocks +ffffffff82cdf160 r adlp_aux_ch_map +ffffffff82cdf169 r adls_aux_ch_map +ffffffff82cdf170 r rkl_aux_ch_map +ffffffff82cdf175 r direct_aux_ch_map +ffffffff82cdf17e r translate_iboost.mapping +ffffffff82cdf181 r adlp_ddc_pin_map +ffffffff82cdf18e r adls_ddc_pin_map +ffffffff82cdf19b r rkl_pch_tgp_ddc_pin_map +ffffffff82cdf1a6 r gen9bc_tgp_ddc_pin_map +ffffffff82cdf1b1 r icp_ddc_pin_map +ffffffff82cdf1c0 r cnp_ddc_pin_map +ffffffff82ce0000 r mtl_sa_info +ffffffff82ce0006 r adlp_sa_info +ffffffff82ce000c r adls_sa_info +ffffffff82ce0012 r rkl_sa_info +ffffffff82ce0018 r tgl_sa_info +ffffffff82ce0020 r intel_bw_funcs +ffffffff82ce1000 r intel_cdclk_funcs +ffffffff82ce1010 r mtl_cdclk_funcs +ffffffff82ce1030 r mtl_cdclk_table +ffffffff82ce1088 r tgl_cdclk_funcs +ffffffff82ce10b0 r dg2_cdclk_table +ffffffff82ce1160 r adlp_a_step_cdclk_table +ffffffff82ce11e0 r rplu_cdclk_table +ffffffff82ce12c8 r rplu_cdclk_funcs +ffffffff82ce12f0 r adlp_cdclk_table +ffffffff82ce13b0 r rkl_cdclk_table +ffffffff82ce14a0 r icl_cdclk_table +ffffffff82ce1588 r ehl_cdclk_funcs +ffffffff82ce15a8 r icl_cdclk_funcs +ffffffff82ce15c8 r bxt_cdclk_funcs +ffffffff82ce15f0 r glk_cdclk_table +ffffffff82ce1620 r bxt_cdclk_table +ffffffff82ce1668 r skl_cdclk_funcs +ffffffff82ce1688 r bdw_cdclk_funcs +ffffffff82ce16a8 r hsw_cdclk_funcs +ffffffff82ce16c8 r chv_cdclk_funcs +ffffffff82ce16e8 r vlv_cdclk_funcs +ffffffff82ce1708 r fixed_400mhz_cdclk_funcs +ffffffff82ce1728 r ilk_cdclk_funcs +ffffffff82ce1748 r gm45_cdclk_funcs +ffffffff82ce1768 r g33_cdclk_funcs +ffffffff82ce1788 r i965gm_cdclk_funcs +ffffffff82ce17a8 r pnv_cdclk_funcs +ffffffff82ce17c8 r i945gm_cdclk_funcs +ffffffff82ce17e8 r i915gm_cdclk_funcs +ffffffff82ce1808 r i915g_cdclk_funcs +ffffffff82ce1828 r i865g_cdclk_funcs +ffffffff82ce1848 r i85x_cdclk_funcs +ffffffff82ce1868 r i845g_cdclk_funcs +ffffffff82ce1888 r i830_cdclk_funcs +ffffffff82ce18a8 r g33_get_cdclk.div_3200 +ffffffff82ce18ae r g33_get_cdclk.div_4000 +ffffffff82ce18b4 r g33_get_cdclk.div_4800 +ffffffff82ce18ba r g33_get_cdclk.div_5333 +ffffffff82ce18c0 r i965gm_get_cdclk.div_3200 +ffffffff82ce18c3 r i965gm_get_cdclk.div_4000 +ffffffff82ce18c6 r i965gm_get_cdclk.div_5333 +ffffffff82ce2000 r chv_color_funcs +ffffffff82ce2040 r vlv_color_funcs +ffffffff82ce2080 r i965_color_funcs +ffffffff82ce20c0 r i9xx_color_funcs +ffffffff82ce2100 r tgl_color_funcs +ffffffff82ce2140 r icl_color_funcs +ffffffff82ce2180 r glk_color_funcs +ffffffff82ce21c0 r skl_color_funcs +ffffffff82ce2200 r bdw_color_funcs +ffffffff82ce2240 r hsw_color_funcs +ffffffff82ce2280 r ivb_color_funcs +ffffffff82ce22c0 r ilk_color_funcs +ffffffff82ce2300 r chv_cgm_csc_matrix_identity +ffffffff82ce231e r ilk_csc_matrix_rgb_to_ycbcr +ffffffff82ce233c r ilk_csc_matrix_limited_range +ffffffff82ce235a r ilk_csc_matrix_identity +ffffffff82ce3000 r icl_procmon_values +ffffffff82ce4000 r force_audio_names +ffffffff82ce4040 r broadcast_rgb_names +ffffffff82ce5000 r intel_crt_connector_funcs +ffffffff82ce5078 r intel_crt_enc_funcs +ffffffff82ce50a0 r intel_spurious_crt_detect +ffffffff82ce54a8 r intel_crt_connector_helper_funcs +ffffffff82ce6000 r g4x_crtc_funcs +ffffffff82ce60c0 r i965_crtc_funcs +ffffffff82ce6180 r i915gm_crtc_funcs +ffffffff82ce6240 r i915_crtc_funcs +ffffffff82ce6300 r i8xx_crtc_funcs +ffffffff82ce63c0 r bdw_crtc_funcs +ffffffff82ce6480 r ilk_crtc_funcs +ffffffff82ce7000 r output_format_str +ffffffff82ce7020 r output_type_str +ffffffff82ce8000 r intel_cursor_plane_funcs +ffffffff82ce8068 r intel_cursor_formats +ffffffff82ce9000 r mtl_c10_hdmi_tables +ffffffff82ce9170 r mtl_c10_hdmi_25_2 +ffffffff82ce918c r mtl_c10_hdmi_27_0 +ffffffff82ce91a8 r mtl_c10_hdmi_27027 +ffffffff82ce91c4 r mtl_c10_hdmi_28320 +ffffffff82ce91e0 r mtl_c10_hdmi_30240 +ffffffff82ce91fc r mtl_c10_hdmi_31500 +ffffffff82ce9218 r mtl_c10_hdmi_36000 +ffffffff82ce9234 r mtl_c10_hdmi_40000 +ffffffff82ce9250 r mtl_c10_hdmi_49500 +ffffffff82ce926c r mtl_c10_hdmi_50000 +ffffffff82ce9288 r mtl_c10_hdmi_57284 +ffffffff82ce92a4 r mtl_c10_hdmi_58000 +ffffffff82ce92c0 r mtl_c10_hdmi_65000 +ffffffff82ce92dc r mtl_c10_hdmi_71000 +ffffffff82ce92f8 r mtl_c10_hdmi_74176 +ffffffff82ce9314 r mtl_c10_hdmi_74_25 +ffffffff82ce9330 r mtl_c10_hdmi_75000 +ffffffff82ce934c r mtl_c10_hdmi_78750 +ffffffff82ce9368 r mtl_c10_hdmi_85500 +ffffffff82ce9384 r mtl_c10_hdmi_88750 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mtl_c20_dp_hbr3 +ffffffff82ce9ae0 r mtl_c20_dp_uhbr13_5 +ffffffff82ce9b0c r mtl_c20_dp_uhbr10 +ffffffff82ce9b38 r mtl_c20_dp_uhbr20 +ffffffff82cea000 r intel_ddi_funcs +ffffffff82cea020 r index_to_dp_signal_levels +ffffffff82cea030 r gen9_chicken_trans_reg_by_port.trans +ffffffff82ceb000 r tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff82ceb010 r _tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff82ceb080 r mtl_c20_trans_uhbr +ffffffff82ceb090 r mtl_c20_trans_hdmi +ffffffff82ceb0a0 r mtl_c20_trans_dp14 +ffffffff82ceb0b0 r mtl_c10_trans_dp14 +ffffffff82ceb0c0 r _mtl_c20_trans_uhbr +ffffffff82ceb180 r _mtl_c20_trans_hdmi +ffffffff82ceb1c0 r _mtl_c20_trans_dp14 +ffffffff82ceb240 r _mtl_c10_trans_dp14 +ffffffff82ceb2b8 r dg2_snps_trans_uhbr +ffffffff82ceb2c8 r dg2_snps_trans +ffffffff82ceb2e0 r _dg2_snps_trans_uhbr +ffffffff82ceb3a0 r _dg2_snps_trans +ffffffff82ceb418 r icl_combo_phy_trans_hdmi +ffffffff82ceb430 r _icl_combo_phy_trans_hdmi +ffffffff82ceb488 r adlp_combo_phy_trans_edp_hbr3 +ffffffff82ceb498 r adlp_combo_phy_trans_edp_up_to_hbr2 +ffffffff82ceb4b0 r _adlp_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff82ceb530 r _adlp_combo_phy_trans_edp_hbr2 +ffffffff82ceb5a8 r adlp_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82ceb5b8 r adlp_combo_phy_trans_dp_hbr +ffffffff82ceb5d0 r _adlp_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82ceb650 r _adlp_combo_phy_trans_dp_hbr +ffffffff82ceb6c8 r tgl_dkl_phy_trans_hdmi +ffffffff82ceb6e0 r _tgl_dkl_phy_trans_hdmi +ffffffff82ceb758 r adlp_dkl_phy_trans_dp_hbr2_hbr3 +ffffffff82ceb768 r adlp_dkl_phy_trans_dp_hbr +ffffffff82ceb780 r _adlp_dkl_phy_trans_dp_hbr2_hbr3 +ffffffff82ceb800 r _adlp_dkl_phy_trans_dp_hbr +ffffffff82ceb878 r adls_combo_phy_trans_edp_hbr3 +ffffffff82ceb888 r adls_combo_phy_trans_edp_hbr2 +ffffffff82ceb8a0 r _adls_combo_phy_trans_edp_hbr3 +ffffffff82ceb920 r _adls_combo_phy_trans_edp_hbr2 +ffffffff82ceb998 r adls_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82ceb9a8 r tgl_combo_phy_trans_dp_hbr +ffffffff82ceb9c0 r _adls_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82ceba40 r _tgl_combo_phy_trans_dp_hbr +ffffffff82cebab8 r icl_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff82cebac8 r icl_combo_phy_trans_edp_hbr2 +ffffffff82cebae0 r _icl_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff82cebb60 r _icl_combo_phy_trans_edp_hbr2 +ffffffff82cebbd8 r rkl_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82cebbe8 r rkl_combo_phy_trans_dp_hbr +ffffffff82cebc00 r _rkl_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82cebc80 r _rkl_combo_phy_trans_dp_hbr +ffffffff82cebcf8 r dg1_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82cebd08 r dg1_combo_phy_trans_dp_rbr_hbr +ffffffff82cebd20 r _dg1_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82cebda0 r _dg1_combo_phy_trans_dp_rbr_hbr +ffffffff82cebe18 r tgl_uy_combo_phy_trans_dp_hbr2 +ffffffff82cebe28 r tgl_combo_phy_trans_dp_hbr2 +ffffffff82cebe40 r _tgl_uy_combo_phy_trans_dp_hbr2 +ffffffff82cebec0 r _tgl_combo_phy_trans_dp_hbr2 +ffffffff82cebf38 r tgl_dkl_phy_trans_dp_hbr2 +ffffffff82cebf48 r tgl_dkl_phy_trans_dp_hbr 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ilk_fbc_funcs +ffffffff82d030a8 r g4x_fbc_funcs +ffffffff82d030e0 r i965_fbc_funcs +ffffffff82d03118 r i8xx_fbc_funcs +ffffffff82d04000 r intel_fb_helper_funcs +ffffffff82d04010 r intelfb_ops +ffffffff82d05000 r ilk_funcs +ffffffff82d05008 r gen6_funcs +ffffffff82d05010 r ivb_funcs +ffffffff82d06000 r gmbus_algorithm +ffffffff82d06010 r gmbus_lock_ops +ffffffff82d06030 r gmbus_pins_dg2 +ffffffff82d060d0 r gmbus_pins_dg1 +ffffffff82d06120 r gmbus_pins_mtp +ffffffff82d061f0 r gmbus_pins_icp +ffffffff82d062e0 r gmbus_pins_cnp +ffffffff82d06330 r gmbus_pins_bxt +ffffffff82d06370 r gmbus_pins_skl +ffffffff82d063e0 r gmbus_pins_bdw +ffffffff82d06450 r gmbus_pins +ffffffff82d08000 r gsc_hdcp_ops +ffffffff82d09000 r intel_hdmi_connector_funcs +ffffffff82d09078 r intel_hdmi_connector_helper_funcs +ffffffff82d090d8 r intel_hdmi_hdcp_shim +ffffffff82d09190 r hdcp2_msg_timeout +ffffffff82d0a000 r i915_hpd_funcs +ffffffff82d0a010 r icp_hpd_funcs +ffffffff82d0a020 r dg1_hpd_funcs +ffffffff82d0a030 r xelpdp_hpd_funcs +ffffffff82d0a040 r gen11_hpd_funcs +ffffffff82d0a050 r bxt_hpd_funcs +ffffffff82d0a060 r spt_hpd_funcs +ffffffff82d0a070 r ilk_hpd_funcs +ffffffff82d0a080 r hpd_status_g4x +ffffffff82d0a0c0 r hpd_status_i915 +ffffffff82d0a100 r hpd_xelpdp +ffffffff82d0a140 r hpd_gen11 +ffffffff82d0a180 r hpd_sde_dg1 +ffffffff82d0a1c0 r hpd_mtp +ffffffff82d0a200 r hpd_icp +ffffffff82d0a240 r hpd_spt +ffffffff82d0a280 r hpd_cpt +ffffffff82d0a2c0 r hpd_ibx +ffffffff82d0a300 r hpd_bxt +ffffffff82d0a340 r hpd_bdw +ffffffff82d0a380 r hpd_ivb +ffffffff82d0a3c0 r hpd_ilk +ffffffff82d0a400 r hpd_mask_i915 +ffffffff82d0b000 r load_detect_mode +ffffffff82d0d000 r intel_no_lvds +ffffffff82d0f448 r intel_lvds_connector_funcs +ffffffff82d0f4c0 r intel_lvds_enc_funcs +ffffffff82d0f4e0 r intel_lvds_connector_helper_funcs +ffffffff82d0f540 r intel_dual_link_lvds +ffffffff82d10000 r power_state_map +ffffffff82d10030 r intel_no_opregion_vbt +ffffffff82d102e0 r intel_use_opregion_panel_type +ffffffff82d11000 r y_static_hcoeffs +ffffffff82d110b0 r uv_static_hcoeffs +ffffffff82d12000 r intel_pmdemand_funcs +ffffffff82d14014 r hsw_psr_setup_aux.aux_msg +ffffffff82d15000 r rc_range_minqp420_8bpc +ffffffff82d15100 r rc_range_minqp444_8bpc +ffffffff82d15330 r rc_range_minqp420_10bpc +ffffffff82d15490 r rc_range_minqp444_10bpc +ffffffff82d15770 r rc_range_minqp420_12bpc +ffffffff82d15930 r rc_range_minqp444_12bpc +ffffffff82d15cd0 r rc_range_maxqp420_8bpc +ffffffff82d15dd0 r rc_range_maxqp444_8bpc +ffffffff82d16000 r rc_range_maxqp420_10bpc +ffffffff82d16160 r rc_range_maxqp444_10bpc +ffffffff82d16440 r rc_range_maxqp420_12bpc +ffffffff82d16600 r rc_range_maxqp444_12bpc +ffffffff82d17000 r intel_quirks +ffffffff82d17240 r .compoundliteral +ffffffff82d17648 r .compoundliteral.9 +ffffffff82d18000 r intel_sdvo_enc_funcs +ffffffff82d18020 r intel_sdvo_ddc_proxy +ffffffff82d18030 r proxy_lock_ops +ffffffff82d18050 r sdvo_cmd_names +ffffffff82d18410 r cmd_status_names +ffffffff82d18450 r intel_sdvo_output_setup.probe_order +ffffffff82d18468 r intel_sdvo_connector_funcs +ffffffff82d184e0 r intel_sdvo_connector_helper_funcs +ffffffff82d18540 r sdvo_tv_modes +ffffffff82d18e30 r tv_format_names +ffffffff82d19000 r dg2_hdmi_tables +ffffffff82d19170 r dg2_edp_tables +ffffffff82d191c0 r dg2_dp_100_tables +ffffffff82d191f8 r dg2_dp_rbr_100 +ffffffff82d1921c r dg2_edp_r216 +ffffffff82d19240 r dg2_edp_r243 +ffffffff82d19264 r dg2_dp_hbr1_100 +ffffffff82d19288 r dg2_edp_r324 +ffffffff82d192ac r dg2_edp_r432 +ffffffff82d192d0 r dg2_dp_hbr2_100 +ffffffff82d192f4 r dg2_dp_hbr3_100 +ffffffff82d19318 r dg2_dp_uhbr10_100 +ffffffff82d1933c r dg2_dp_uhbr13_100 +ffffffff82d19360 r dg2_hdmi_25_175 +ffffffff82d19384 r dg2_hdmi_27_0 +ffffffff82d193a8 r dg2_hdmi_74_25 +ffffffff82d193cc r dg2_hdmi_148_5 +ffffffff82d193f0 r dg2_hdmi_297 +ffffffff82d19414 r dg2_hdmi_594 +ffffffff82d19438 r dg2_hdmi_25200 +ffffffff82d1945c r dg2_hdmi_27027 +ffffffff82d19480 r dg2_hdmi_28320 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ntsc_m_levels_svideo +ffffffff82d1c79c r ntsc_m_csc_composite +ffffffff82d1c7b4 r ntsc_m_csc_svideo +ffffffff82d1c7d0 r filter_table +ffffffff82d1cb08 r ntsc_j_levels_composite +ffffffff82d1cb0e r ntsc_j_levels_svideo +ffffffff82d1cb14 r ntsc_j_csc_composite +ffffffff82d1cb2c r ntsc_j_csc_svideo +ffffffff82d1cb44 r pal_m_levels_composite +ffffffff82d1cb4a r pal_m_levels_svideo +ffffffff82d1cb50 r pal_m_csc_composite +ffffffff82d1cb68 r pal_m_csc_svideo +ffffffff82d1cb80 r pal_n_levels_composite +ffffffff82d1cb86 r pal_n_levels_svideo +ffffffff82d1cb8c r pal_n_csc_composite +ffffffff82d1cba4 r pal_n_csc_svideo +ffffffff82d1cbbc r pal_levels_composite +ffffffff82d1cbc2 r pal_levels_svideo +ffffffff82d1cbc8 r pal_csc_composite +ffffffff82d1cbe0 r pal_csc_svideo +ffffffff82d1cbf8 r component_levels +ffffffff82d1cbfe r sdtv_csc_yprpb +ffffffff82d1cc16 r hdtv_csc_yprpb +ffffffff82d1cc30 r input_res_table +ffffffff82d1d000 r calculate_rc_params.ofs_und4 +ffffffff82d1d00f r calculate_rc_params.ofs_und6.1 +ffffffff82d1d01e r calculate_rc_params.ofs_und12 +ffffffff82d1d02d r calculate_rc_params.ofs_und15 +ffffffff82d1f000 r gen12_plane_funcs +ffffffff82d1f068 r skl_plane_funcs +ffffffff82d1f0d0 r icl_program_input_csc.input_csc_matrix +ffffffff82d1f110 r icl_hdr_plane_formats +ffffffff82d1f190 r icl_sdr_y_plane_formats +ffffffff82d1f1f0 r icl_sdr_uv_plane_formats +ffffffff82d1f260 r glk_planar_formats +ffffffff82d1f2b0 r skl_plane_formats +ffffffff82d1f2f0 r skl_planar_formats +ffffffff82d20000 r skl_wm_funcs +ffffffff82d20040 r intel_dbuf_funcs +ffffffff82d20050 r adlp_allowed_dbufs +ffffffff82d200c0 r dg2_allowed_dbufs +ffffffff82d20120 r tgl_allowed_dbufs +ffffffff82d20180 r icl_allowed_dbufs +ffffffff82d21000 r intel_dsi_funcs +ffffffff82d21020 r intel_dsi_host_ops +ffffffff82d21038 r intel_dsi_connector_funcs +ffffffff82d210b0 r intel_dsi_connector_helper_funcs +ffffffff82d22000 r lfsr_converts +ffffffff82d23000 r clflush_ops ffffffff82d24000 r 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R gen6_null_state -ffffffff82d30000 r hsw_clear_kernel -ffffffff82d30340 r ivb_clear_kernel -ffffffff82d31000 r gen7_null_state_relocs -ffffffff82d31018 R gen7_null_state -ffffffff82d31030 r gen7_null_state_batch -ffffffff82d32000 r gen8_null_state_relocs -ffffffff82d32018 R gen8_null_state -ffffffff82d32030 r gen8_null_state_batch -ffffffff82d33000 r gen9_null_state_relocs -ffffffff82d33018 R gen9_null_state -ffffffff82d33030 r gen9_null_state_batch -ffffffff82d34000 r intel_engines -ffffffff82d341b0 r get_reset_domain.engine_reset_domains -ffffffff82d34220 r get_reset_domain.engine_reset_domains.40 -ffffffff82d3426c r engine_class_guc_class_map -ffffffff82d34280 r intel_engine_init_tlb_invalidation.gen12_regs -ffffffff82d342a0 r intel_engine_init_tlb_invalidation.xehp_regs -ffffffff82d342c0 r intel_engine_init_tlb_invalidation.xelpmp_regs -ffffffff82d342e0 r __cs_pending_mi_force_wakes._reg -ffffffff82d35000 r wf_ops -ffffffff82d36000 r intel_engine_class_repr.uabi_names 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i915_region_stolen_lmem_ops +ffffffff82d2b020 r i915_region_stolen_smem_ops +ffffffff82d2b040 r i915_gem_object_stolen_ops +ffffffff82d2c000 R vm_ops_ttm +ffffffff82d2c048 r i915_gem_ttm_obj_ops +ffffffff82d2c0c8 r ttm_system_region_ops +ffffffff82d2c0e8 r sys_placement_flags +ffffffff82d2c0f8 r tt_rsgt_ops +ffffffff82d2d000 r dma_fence_memcpy_ops +ffffffff82d2e000 r i915_ttm_recover_region.recover_ops +ffffffff82d2e020 r i915_ttm_backup_region.backup_ops +ffffffff82d2e028 r i915_ttm_restore_region.restore_ops +ffffffff82d2f000 r pd_dummy_obj_ops +ffffffff82d2f080 r pd_vma_ops +ffffffff82d30000 r gen6_null_state_relocs +ffffffff82d30020 r gen6_null_state_batch +ffffffff82d30470 R gen6_null_state +ffffffff82d31000 r hsw_clear_kernel +ffffffff82d31340 r ivb_clear_kernel +ffffffff82d32000 r gen7_null_state_relocs +ffffffff82d32018 R gen7_null_state +ffffffff82d32030 r gen7_null_state_batch +ffffffff82d33000 r gen8_null_state_relocs +ffffffff82d33018 R gen8_null_state +ffffffff82d33030 r gen8_null_state_batch +ffffffff82d34000 r gen9_null_state_relocs +ffffffff82d34018 R gen9_null_state +ffffffff82d34030 r gen9_null_state_batch +ffffffff82d35000 r intel_engines +ffffffff82d351b0 r get_reset_domain.engine_reset_domains +ffffffff82d35220 r get_reset_domain.engine_reset_domains.40 +ffffffff82d3526c r engine_class_guc_class_map +ffffffff82d35280 r intel_engine_init_tlb_invalidation.gen12_regs +ffffffff82d352a0 r intel_engine_init_tlb_invalidation.xehp_regs +ffffffff82d352c0 r intel_engine_init_tlb_invalidation.xelpmp_regs +ffffffff82d352e0 r __cs_pending_mi_force_wakes._reg +ffffffff82d36000 r wf_ops +ffffffff82d37000 r intel_engine_class_repr.uabi_names +ffffffff82d37030 r uabi_classes +ffffffff82d3703c r legacy_ring_idx.map +ffffffff82d38000 r execlists_context_ops +ffffffff82d38090 r virtual_context_ops +ffffffff82d39000 r xelpmp_oaddrm_steering_table +ffffffff82d39020 r xelpg_instance0_steering_table +ffffffff82d39070 r xelpg_l3bank_steering_table +ffffffff82d39080 r xelpg_dss_steering_table +ffffffff82d390d0 r pvc_instance0_steering_table +ffffffff82d39140 r xehpsdv_mslice_steering_table +ffffffff82d39160 r dg2_lncf_steering_table +ffffffff82d39180 r xehpsdv_lncf_steering_table +ffffffff82d391a0 r xehpsdv_gam_steering_table +ffffffff82d391c0 r icl_l3bank_steering_table +ffffffff82d391d0 r intel_steering_types +ffffffff82d3a000 r wf_ops +ffffffff82d3b000 r gen12_rcs_offsets +ffffffff82d3b090 r gen9_rcs_offsets +ffffffff82d3b110 r gen9_xcs_offsets +ffffffff82d3b190 r gen8_xcs_offsets +ffffffff82d3c000 r mtl_mocs_table +ffffffff82d3c080 r pvc_mocs_table +ffffffff82d3c0a0 r dg2_mocs_table +ffffffff82d3c0c0 r xehpsdv_mocs_table +ffffffff82d3c2c0 r dg1_mocs_table +ffffffff82d3c4c0 r tgl_mocs_table +ffffffff82d3c6c0 r gen12_mocs_table +ffffffff82d3c8c0 r icl_mocs_table +ffffffff82d3cac0 r skl_mocs_table +ffffffff82d3ccc0 r broxton_mocs_table +ffffffff82d3cce0 r mocs_offset.offset +ffffffff82d3d000 r intel_region_lmem_ops +ffffffff82d3f000 r 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guc_class_engine_class_map +ffffffff82d4a000 r uc_ops_on +ffffffff82d4a040 r uc_ops_off +ffffffff82d4b000 r blobs_all +ffffffff82d4b030 r blobs_guc +ffffffff82d4b1b0 r blobs_huc +ffffffff82d4c000 r hsw_render_ring_cmd_table +ffffffff82d4c030 r gen7_render_cmd_table +ffffffff82d4c050 r hsw_render_reg_tables +ffffffff82d4c070 r ivb_render_reg_tables +ffffffff82d4c080 r gen7_video_cmd_table +ffffffff82d4c0a0 r gen9_blt_cmd_table +ffffffff82d4c0b0 r hsw_blt_ring_cmd_table +ffffffff82d4c0e0 r gen7_blt_cmd_table +ffffffff82d4c100 r gen9_blt_reg_tables +ffffffff82d4c110 r hsw_blt_reg_tables +ffffffff82d4c120 r ivb_blt_reg_tables +ffffffff82d4c130 r hsw_vebox_cmd_table +ffffffff82d4c150 r noop_desc +ffffffff82d4c1b0 r gen7_common_cmds +ffffffff82d4c5d0 r gen7_render_cmds +ffffffff82d4ccb0 r hsw_render_cmds +ffffffff82d4d2e0 r gen7_render_regs +ffffffff82d4d600 r hsw_render_regs +ffffffff82d4d7a0 r gen7_video_cmds +ffffffff82d4da10 r gen9_blt_cmds +ffffffff82d4e040 r gen7_blt_cmds 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xehpsdv_clock_gating_funcs +ffffffff82d5c020 r adlp_clock_gating_funcs +ffffffff82d5c028 r gen12lp_clock_gating_funcs +ffffffff82d5c030 r icl_clock_gating_funcs +ffffffff82d5c038 r cfl_clock_gating_funcs +ffffffff82d5c040 r skl_clock_gating_funcs +ffffffff82d5c048 r kbl_clock_gating_funcs +ffffffff82d5c050 r bxt_clock_gating_funcs +ffffffff82d5c058 r glk_clock_gating_funcs +ffffffff82d5c060 r bdw_clock_gating_funcs +ffffffff82d5c068 r chv_clock_gating_funcs +ffffffff82d5c070 r hsw_clock_gating_funcs +ffffffff82d5c078 r ivb_clock_gating_funcs +ffffffff82d5c080 r vlv_clock_gating_funcs +ffffffff82d5c088 r gen6_clock_gating_funcs +ffffffff82d5c090 r ilk_clock_gating_funcs +ffffffff82d5c098 r g4x_clock_gating_funcs +ffffffff82d5c0a0 r i965gm_clock_gating_funcs +ffffffff82d5c0a8 r i965g_clock_gating_funcs +ffffffff82d5c0b0 r gen3_clock_gating_funcs +ffffffff82d5c0b8 r i85x_clock_gating_funcs +ffffffff82d5c0c0 r i830_clock_gating_funcs +ffffffff82d5d000 r platform_names +ffffffff82d5d140 r subplatform_ult_ids +ffffffff82d5d1a4 r no_display +ffffffff82d5e000 r intel_region_map +ffffffff82d60000 r dg2_g10_revid_step_tbl +ffffffff82d60030 r dg2_g11_revid_step_tbl +ffffffff82d60050 r xehpsdv_revids +ffffffff82d60080 r adlp_rplp_revids +ffffffff82d600a0 r adlp_revids +ffffffff82d600e0 r adls_rpls_revids +ffffffff82d60120 r adls_revids +ffffffff82d60160 r rkl_revids +ffffffff82d60180 r bxt_revids +ffffffff82d601c0 r skl_revids +ffffffff82d601f0 r pvc_bd_subids +ffffffff82d60210 r pvc_ct_subids +ffffffff82d62000 r forcewake_domain_names +ffffffff82d62080 r __mtl_fw_ranges +ffffffff82d62200 r mtl_shadowed_regs +ffffffff82d62280 r __pvc_fw_ranges +ffffffff82d62430 r pvc_shadowed_regs +ffffffff82d62550 r __dg2_fw_ranges +ffffffff82d62820 r dg2_shadowed_regs +ffffffff82d62940 r __xehp_fw_ranges +ffffffff82d62c10 r gen12_shadowed_regs +ffffffff82d62d30 r __gen12_fw_ranges +ffffffff82d62f40 r __gen11_fw_ranges +ffffffff82d630f0 r gen11_shadowed_regs +ffffffff82d631b0 r __gen9_fw_ranges +ffffffff82d63330 r gen8_shadowed_regs +ffffffff82d63360 r __chv_fw_ranges +ffffffff82d63420 r __gen6_fw_ranges +ffffffff82d63430 r __vlv_fw_ranges +ffffffff82d63488 r uncore_get_fallback +ffffffff82d63490 r uncore_get_normal +ffffffff82d63498 r uncore_get_thread_status +ffffffff82d634a0 r __xelpmp_fw_ranges +ffffffff82d635d0 r xelpmp_shadowed_regs +ffffffff82d64000 r i915_pxp_tee_component_ops +ffffffff82d65000 r intel_dram_type_str.str +ffffffff82d66000 r atom_op_names +ffffffff82d663e0 r opcode_table +ffffffff82d66b90 r atom_dst_to_src +ffffffff82d66c10 r atom_io_names +ffffffff82d66c40 r atom_table_names +ffffffff82d66e90 r atom_iio_len +ffffffff82d67000 r atombios_helper_funcs +ffffffff82d67080 r vga_control_regs +ffffffff82d68000 r voltage_names +ffffffff82d68020 r pre_emph_names +ffffffff82d69000 r radeon_atom_backlight_ops +ffffffff82d69018 r radeon_atom_enc_funcs +ffffffff82d69038 r radeon_atom_dig_helper_funcs +ffffffff82d690a0 r radeon_atom_dac_helper_funcs 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hawaii_io_mc_regs +ffffffff82d6e1d0 r mc_cg_registers +ffffffff82d6e200 r bonaire_mgcg_cgcg_init +ffffffff82d6e5e0 r bonaire_golden_registers +ffffffff82d6e7d0 r bonaire_golden_common_registers +ffffffff82d6e800 r bonaire_golden_spm_registers +ffffffff82d6e810 r kalindi_mgcg_cgcg_init +ffffffff82d6eab0 r kalindi_golden_registers +ffffffff82d6ec20 r kalindi_golden_common_registers +ffffffff82d6ec50 r kalindi_golden_spm_registers +ffffffff82d6ec60 r godavari_golden_registers +ffffffff82d6ede0 r spectre_mgcg_cgcg_init +ffffffff82d6f200 r spectre_golden_registers +ffffffff82d6f330 r spectre_golden_common_registers +ffffffff82d6f360 r spectre_golden_spm_registers +ffffffff82d6f370 r hawaii_mgcg_cgcg_init +ffffffff82d6f880 r hawaii_golden_registers +ffffffff82d6fa30 r hawaii_golden_common_registers +ffffffff82d6fa6c r hawaii_golden_spm_registers +ffffffff82d6fa80 r spectre_rlc_save_restore_register_list +ffffffff82d70170 r kalindi_rlc_save_restore_register_list +ffffffff82d70680 r ci_cs_data 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+ffffffff82d76ba0 r sumo_golden_registers +ffffffff82d76be0 r barts_golden_registers +ffffffff82d76e00 r turks_golden_registers +ffffffff82d77040 r caicos_golden_registers +ffffffff82d77280 r sumo_rlc_save_restore_register_list +ffffffff82d773d0 r evergreen_cs_data +ffffffff82d77410 r SECT_CONTEXT_defs +ffffffff82d77490 r SECT_CLEAR_defs +ffffffff82d774b0 r SECT_CTRLCONST_defs +ffffffff82d774d0 r SECT_CONTEXT_def_2 +ffffffff82d774f0 r SECT_CONTEXT_def_4 +ffffffff82d77680 r SECT_CONTEXT_def_5 +ffffffff82d776a0 r SECT_CONTEXT_def_6 +ffffffff82d77780 r SECT_CONTEXT_def_1 +ffffffff82d77f20 r SECT_CONTEXT_def_3 +ffffffff82d78000 r SECT_CONTEXT_def_7 +ffffffff82d78488 r SECT_CLEAR_def_1 +ffffffff82d78494 r SECT_CTRLCONST_def_1 +ffffffff82d784a0 r evergreen_default_state +ffffffff82d79000 r cayman_reg_safe_bm +ffffffff82d7b000 r evergreen_reg_safe_bm +ffffffff82d7e000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82d7f000 r didt_config_kv +ffffffff82d80000 r barts_io_mc_regs +ffffffff82d800f0 r turks_io_mc_regs +ffffffff82d801e0 r caicos_io_mc_regs +ffffffff82d802d0 r cayman_io_mc_regs +ffffffff82d803c0 r cayman_golden_registers +ffffffff82d80580 r cayman_golden_registers2 +ffffffff82d805d0 r dvst_golden_registers +ffffffff82d80860 r dvst_golden_registers2 +ffffffff82d80890 r scrapper_golden_registers +ffffffff82d80d70 r tn_rlc_save_restore_register_list +ffffffff82d80f60 r cayman_cs_data +ffffffff82d80fa0 r SECT_CONTEXT_defs +ffffffff82d81020 r SECT_CLEAR_defs +ffffffff82d81040 r SECT_CTRLCONST_defs +ffffffff82d81060 r SECT_CONTEXT_def_2 +ffffffff82d81080 r SECT_CONTEXT_def_4 +ffffffff82d81210 r SECT_CONTEXT_def_5 +ffffffff82d81230 r SECT_CONTEXT_def_1 +ffffffff82d819d0 r SECT_CONTEXT_def_3 +ffffffff82d81ab0 r SECT_CONTEXT_def_6 +ffffffff82d81b90 r SECT_CONTEXT_def_7 +ffffffff82d82018 r SECT_CLEAR_def_1 +ffffffff82d82024 r SECT_CTRLCONST_def_1 +ffffffff82d82030 r cayman_default_state +ffffffff82d83000 r cac_weights_cayman_xt +ffffffff82d83128 r cac_weights_cayman_pro +ffffffff82d83250 r cac_weights_cayman_le +ffffffff82d83380 r cayman_cgcg_cgls_default +ffffffff82d835c0 r cayman_mgcg_default +ffffffff82d83f20 r cayman_sysls_default +ffffffff82d83ff0 r cayman_cgcg_cgls_enable +ffffffff82d84240 r cayman_cgcg_cgls_disable +ffffffff82d844a0 r cayman_mgcg_enable +ffffffff82d84520 r cayman_mgcg_disable +ffffffff82d845a0 r cayman_sysls_enable +ffffffff82d84670 r cayman_sysls_disable +ffffffff82d85000 r rn50_reg_safe_bm +ffffffff82d851a0 r r100_reg_safe_bm +ffffffff82d86000 r r200_reg_safe_bm +ffffffff82d87000 r r300_reg_safe_bm +ffffffff82d88000 r r420_reg_safe_bm +ffffffff82d8a000 r color_formats_table +ffffffff82d8a480 r r600_reg_safe_bm +ffffffff82d8d000 R r600_utc +ffffffff82d8d040 R r600_dtc +ffffffff82d8d080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82d8f000 r r100_gfx_ring +ffffffff82d8f070 r r300_gfx_ring +ffffffff82d8f0e0 r rv515_gfx_ring +ffffffff82d8f150 r r600_gfx_ring +ffffffff82d8f1c0 r r600_dma_ring +ffffffff82d8f230 r rv6xx_uvd_ring +ffffffff82d8f2a0 r rv770_uvd_ring +ffffffff82d8f310 r evergreen_gfx_ring +ffffffff82d8f380 r evergreen_dma_ring +ffffffff82d8f3f0 r cayman_gfx_ring +ffffffff82d8f460 r cayman_dma_ring +ffffffff82d8f4d0 r cayman_uvd_ring +ffffffff82d8f540 r trinity_vce_ring +ffffffff82d8f5b0 r si_gfx_ring +ffffffff82d8f620 r si_dma_ring +ffffffff82d8f690 r ci_gfx_ring +ffffffff82d8f700 r ci_cp_ring +ffffffff82d8f770 r ci_dma_ring +ffffffff82d8f7e0 r ci_vce_ring +ffffffff82d90000 r object_connector_convert +ffffffff82d90060 r supported_devices_connector_convert +ffffffff82d900a0 r supported_devices_connector_object_id_convert +ffffffff82d900c0 r thermal_controller_names +ffffffff82d90100 r pp_lib_thermal_controller_names +ffffffff82d91000 r pin_offsets +ffffffff82d91020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff82d93000 r thermal_controller_names +ffffffff82d93020 r default_primarydac_adj +ffffffff82d93120 r default_tvdac_adj +ffffffff82d93220 r default_tmds_pll +ffffffff82d94000 r radeon_dp_connector_funcs +ffffffff82d94078 r radeon_dp_connector_helper_funcs +ffffffff82d940d8 r radeon_lvds_bridge_connector_funcs +ffffffff82d94150 r radeon_vga_connector_funcs +ffffffff82d941c8 r radeon_vga_connector_helper_funcs +ffffffff82d94228 r radeon_dvi_connector_funcs +ffffffff82d942a0 r radeon_dvi_connector_helper_funcs +ffffffff82d94300 r radeon_edp_connector_funcs +ffffffff82d94378 r radeon_tv_connector_funcs +ffffffff82d943f0 r radeon_tv_connector_helper_funcs +ffffffff82d94450 r radeon_lvds_connector_funcs +ffffffff82d944c8 r radeon_lvds_connector_helper_funcs +ffffffff82d95000 r radeon_family_name +ffffffff82d953f0 r radeon_px_quirk_list +ffffffff82d96000 r radeon_fb_funcs +ffffffff82d96018 r radeon_mode_funcs +ffffffff82d96060 r radeon_tmds_pll_enum_list +ffffffff82d96080 r radeon_tv_std_enum_list +ffffffff82d96100 r radeon_underscan_enum_list +ffffffff82d96130 r radeon_audio_enum_list +ffffffff82d96160 r radeon_dither_enum_list +ffffffff82d96180 r radeon_output_csc_enum_list +ffffffff82d961c0 r radeon_crtc_funcs +ffffffff82d96280 r hpd_names +ffffffff82d962b0 r encoder_names +ffffffff82d963e0 r radeon_afmt_init.eg_offsets +ffffffff82d97000 r aux_offset +ffffffff82d98000 R radeondrm_ca +ffffffff82d98030 r pciidlist +ffffffff82d9c1d0 r kms_driver +ffffffff82d9c2c0 r radeon_ioctls_kms +ffffffff82d9d000 r radeon_fbdev_fb_helper_funcs +ffffffff82d9d010 r radeon_fbdev_client_funcs +ffffffff82d9d030 r radeon_fbdev_fb_ops +ffffffff82d9e000 R radeon_fence_ops +ffffffff82da0000 R radeon_gem_object_funcs +ffffffff82da0070 r radeon_gem_vm_ops +ffffffff82da1000 r radeon_i2c_algo +ffffffff82da1010 r radeon_atom_i2c_algo +ffffffff82da2000 r legacy_helper_funcs +ffffffff82da3000 r radeon_backlight_ops +ffffffff82da3018 r radeon_legacy_lvds_enc_funcs +ffffffff82da3038 r radeon_legacy_lvds_helper_funcs +ffffffff82da30a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82da30c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82da3128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82da3148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82da31b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82da31d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82da3238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82da3258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82da4000 r SLOPE_value +ffffffff82da4030 r YCOEF_EN_value +ffffffff82da4060 r YCOEF_value +ffffffff82da4090 r available_tv_modes +ffffffff82da4110 r hor_timing_NTSC +ffffffff82da4150 r vert_timing_NTSC +ffffffff82da4190 r hor_timing_PAL +ffffffff82da41d0 r vert_timing_PAL +ffffffff82da6000 r radeon_pm_state_type_name +ffffffff82da7000 r radeon_evict_flags.placements +ffffffff82daa000 r rs600_reg_safe_bm +ffffffff82dac000 r rv515_reg_safe_bm +ffffffff82dad000 r dll_speed_table +ffffffff82dae000 r r7xx_golden_registers +ffffffff82dae090 r r7xx_golden_dyn_gpr_registers +ffffffff82dae100 r rv770ce_golden_registers +ffffffff82dae160 r rv770_golden_registers +ffffffff82dae1b0 r rv770_mgcg_init +ffffffff82dae8f0 r rv730_golden_registers +ffffffff82dae950 r rv730_mgcg_init +ffffffff82daeee0 r rv710_golden_registers +ffffffff82daef30 r rv710_mgcg_init +ffffffff82daf1d0 r rv740_golden_registers +ffffffff82daf360 r rv740_mgcg_init +ffffffff82db1000 r rv730_smc_int_vectors +ffffffff82db1040 r rv710_smc_int_vectors +ffffffff82db1080 r rv740_smc_int_vectors +ffffffff82db10c0 r cypress_smc_int_vectors +ffffffff82db1100 r caicos_smc_int_vectors +ffffffff82db1140 r cayman_smc_int_vectors +ffffffff82db2000 r tahiti_io_mc_regs +ffffffff82db2120 r pitcairn_io_mc_regs +ffffffff82db2240 r verde_io_mc_regs +ffffffff82db2360 r oland_io_mc_regs +ffffffff82db2480 r hainan_io_mc_regs +ffffffff82db25a0 r crtc_offsets +ffffffff82db25c0 r si_disp_int_status +ffffffff82db25e0 r tahiti_golden_registers +ffffffff82db2760 r tahiti_golden_rlc_registers +ffffffff82db27b0 r tahiti_mgcg_cgcg_init +ffffffff82db2d98 r tahiti_golden_registers2 +ffffffff82db2db0 r pitcairn_golden_registers +ffffffff82db2f00 r pitcairn_golden_rlc_registers +ffffffff82db2f40 r pitcairn_mgcg_cgcg_init +ffffffff82db33b0 r verde_golden_registers +ffffffff82db3620 r verde_golden_rlc_registers +ffffffff82db3660 r verde_mgcg_cgcg_init +ffffffff82db3ae0 r oland_golden_registers +ffffffff82db3c30 r oland_golden_rlc_registers +ffffffff82db3c70 r oland_mgcg_cgcg_init +ffffffff82db4000 r hainan_golden_registers +ffffffff82db412c r hainan_golden_registers2 +ffffffff82db4140 r hainan_mgcg_cgcg_init +ffffffff82db44b0 r verde_rlc_save_restore_register_list +ffffffff82db4820 r si_cs_data +ffffffff82db4840 r si_SECT_CONTEXT_defs +ffffffff82db48c0 r si_SECT_CONTEXT_def_1 +ffffffff82db4c10 r si_SECT_CONTEXT_def_3 +ffffffff82db4c30 r si_SECT_CONTEXT_def_4 +ffffffff82db4ea4 r si_SECT_CONTEXT_def_5 +ffffffff82db4ea8 r si_SECT_CONTEXT_def_6 +ffffffff82db4eb0 r si_SECT_CONTEXT_def_2 +ffffffff82db52f0 r si_SECT_CONTEXT_def_7 +ffffffff82db56a0 r mc_cg_registers +ffffffff82db56d0 r si_default_state +ffffffff82db6000 r cac_weights_tahiti +ffffffff82db64d0 r lcac_tahiti +ffffffff82db6ba0 r cac_override_tahiti +ffffffff82db6bb4 r powertune_data_tahiti +ffffffff82db6bf0 r dte_data_tahiti +ffffffff82db6cc0 r dte_data_new_zealand +ffffffff82db6d90 r dte_data_malta +ffffffff82db6e60 r lcac_pitcairn +ffffffff82db7530 r cac_override_pitcairn +ffffffff82db7544 r powertune_data_pitcairn +ffffffff82db7580 r lcac_cape_verde +ffffffff82db79d0 r cac_override_cape_verde +ffffffff82db79e4 r powertune_data_cape_verde +ffffffff82db7a20 r cac_weights_cape_verde_pro +ffffffff82db7ef0 r cac_weights_heathrow +ffffffff82db83c0 r cac_weights_chelsea_xt +ffffffff82db8890 r cac_weights_chelsea_pro +ffffffff82db8d60 r cac_weights_cape_verde +ffffffff82db9230 r cac_weights_mars_pro +ffffffff82db9700 r lcac_mars_pro +ffffffff82db9a60 r cac_override_oland +ffffffff82db9a74 r powertune_data_mars_pro +ffffffff82db9ab0 r cac_weights_mars_xt +ffffffff82db9f80 r cac_weights_oland_pro +ffffffff82dba450 r cac_weights_oland_xt +ffffffff82dba920 r lcac_oland +ffffffff82dbac7c r powertune_data_oland +ffffffff82dbacc0 r cac_weights_hainan +ffffffff82dbb184 r powertune_data_hainan +ffffffff82dbb1c0 r dte_data_aruba_pro +ffffffff82dbb290 r dte_data_tahiti_pro +ffffffff82dbb360 r dte_data_curacao_pro +ffffffff82dbb430 r dte_data_neptune_xt +ffffffff82dbb500 r dte_data_sun_xt +ffffffff82dbb5d0 r dte_data_venus_xtx +ffffffff82dbb6a0 r dte_data_venus_xt +ffffffff82dbb770 r dte_data_venus_pro +ffffffff82dbb840 r dte_data_mars_pro +ffffffff82dbc000 r si_program_jump_on_start.data +ffffffff82dbd000 r sumo_dtc +ffffffff82dbe000 r trinity_mgcg_shls_default +ffffffff82dbe380 r trinity_sysls_enable +ffffffff82dbe450 r trinity_sysls_disable +ffffffff82dc0000 r GC_BASE +ffffffff82dc00a8 r HDP_BASE +ffffffff82dc0150 r MMHUB_BASE +ffffffff82dc01f8 r ATHUB_BASE +ffffffff82dc02a0 r NBIO_BASE +ffffffff82dc0348 r MP0_BASE +ffffffff82dc03f0 r MP1_BASE +ffffffff82dc0498 r DF_BASE +ffffffff82dc0540 r OSSSYS_BASE +ffffffff82dc05e8 r SDMA0_BASE +ffffffff82dc0690 r SDMA1_BASE +ffffffff82dc0738 r SDMA2_BASE +ffffffff82dc07e0 r SDMA3_BASE +ffffffff82dc0888 r SDMA4_BASE +ffffffff82dc0930 r SMUIO_BASE +ffffffff82dc09d8 r THM_BASE +ffffffff82dc0a80 r UMC_BASE +ffffffff82dc0b28 r VCN_BASE +ffffffff82dc1000 r amdgpu_afmt_predefined_acr +ffffffff82dc2000 r atom_op_names +ffffffff82dc23e0 r opcode_table +ffffffff82dc2bd0 r atom_dst_to_src +ffffffff82dc2c50 r atom_io_names +ffffffff82dc2c80 r atom_table_names +ffffffff82dc2ed0 r atom_iio_len +ffffffff82dc3000 r object_connector_convert +ffffffff82dc3058 R amdgpu_vbios_version_attr_group +ffffffff82dc4000 r voltage_names +ffffffff82dc4020 r pre_emph_names +ffffffff82dc5000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82dc7000 r amdgpu_benchmark.common_modes +ffffffff82dc8000 r amdgpu_cgs_ops +ffffffff82dc9000 r amdgpu_connector_dp_funcs +ffffffff82dc9078 r amdgpu_connector_dp_helper_funcs +ffffffff82dc90d8 r amdgpu_connector_edp_funcs +ffffffff82dc9150 r amdgpu_connector_vga_funcs +ffffffff82dc91c8 r amdgpu_connector_vga_helper_funcs +ffffffff82dc9228 r amdgpu_connector_dvi_funcs +ffffffff82dc92a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82dc9300 r amdgpu_connector_lvds_funcs +ffffffff82dc9378 r amdgpu_connector_lvds_helper_funcs +ffffffff82dc93e0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82dcb000 R amdgpu_ctx_num_entities +ffffffff82dcc000 r amdgpu_kms_driver +ffffffff82dcc0f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82dcd000 r hw_id_map +ffffffff82dcd090 r hw_id_names +ffffffff82dce000 r hpd_names +ffffffff82dce030 r encoder_names +ffffffff82dce180 r dcc_retile_formats +ffffffff82dce270 r dcc_formats +ffffffff82dce360 R amdgpu_mode_funcs +ffffffff82dce3b0 r amdgpu_underscan_enum_list +ffffffff82dce3e0 r amdgpu_audio_enum_list +ffffffff82dce410 r amdgpu_dither_enum_list +ffffffff82dce430 r amdgpu_fb_funcs_atomic +ffffffff82dce448 r amdgpu_fb_funcs +ffffffff82dcf000 R amdgpu_dmabuf_ops +ffffffff82dd0000 R amdgpu_ioctls_kms +ffffffff82dd0210 R amdgpu_partition_driver +ffffffff82dd02f8 R amdgpu_ca +ffffffff82dd0320 r pciidlist +ffffffff82dd11f0 r amdgpu_unsupported_pciidlist +ffffffff82dd1770 r amdgpu_kms_driver +ffffffff82dd2000 r amdgpu_job_fence_ops +ffffffff82dd2040 r amdgpu_fence_ops +ffffffff82dd3000 r amdgpu_gem_object_funcs +ffffffff82dd3070 r amdgpu_gem_vm_ops +ffffffff82dd4000 R amdgpu_gtt_mgr_attr_group +ffffffff82dd4018 r amdgpu_gtt_mgr_func +ffffffff82dd5000 r amdgpu_atombios_i2c_algo +ffffffff82dd6000 R node_id_to_phys_map +ffffffff82dd7000 R amdgpu_sched_ops +ffffffff82dd9000 r amdgpu_vram_names +ffffffff82dda000 r amdgpu_preempt_mgr_func +ffffffff82ddb000 R psp_ip_funcs +ffffffff82ddb0a8 R psp_v3_1_ip_block +ffffffff82ddb0c0 R psp_v10_0_ip_block +ffffffff82ddb0d8 R psp_v11_0_ip_block +ffffffff82ddb0f0 R psp_v11_0_8_ip_block +ffffffff82ddb108 R psp_v12_0_ip_block +ffffffff82ddb120 R psp_v13_0_ip_block +ffffffff82ddb138 R psp_v13_0_4_ip_block +ffffffff82ddd000 r sw_ring_info +ffffffff82dde000 r amdgpu_evict_flags.placements +ffffffff82de2000 R amdgpu_vkms_ip_block +ffffffff82de3000 R amdgpu_vm_cpu_funcs +ffffffff82de5000 R amdgpu_vm_sdma_funcs +ffffffff82de6000 R amdgpu_vram_mgr_attr_group +ffffffff82de6018 r amdgpu_vram_mgr_func +ffffffff82de6040 r amdgpu_dummy_vram_mgr_func +ffffffff82de7000 r xgmi_pcs_err_status_reg_arct +ffffffff82de7020 r xgmi3x16_pcs_ras_fields +ffffffff82de71f0 r xgmi_pcs_ras_fields +ffffffff82de7310 r wafl_pcs_ras_fields +ffffffff82de8000 r GC_BASE +ffffffff82de80c0 r HDP_BASE +ffffffff82de8180 r MMHUB_BASE +ffffffff82de8240 r ATHUB_BASE +ffffffff82de8300 r NBIF0_BASE +ffffffff82de83c0 r MP0_BASE +ffffffff82de8480 r MP1_BASE +ffffffff82de8540 r UVD_BASE +ffffffff82de8600 r DF_BASE +ffffffff82de86c0 r OSSSYS_BASE +ffffffff82de8780 r SDMA0_BASE +ffffffff82de8840 r SDMA1_BASE +ffffffff82de8900 r SDMA2_BASE +ffffffff82de89c0 r SDMA3_BASE +ffffffff82de8a80 r SDMA4_BASE +ffffffff82de8b40 r SDMA5_BASE +ffffffff82de8c00 r SDMA6_BASE +ffffffff82de8cc0 r SDMA7_BASE +ffffffff82de8d80 r SMUIO_BASE +ffffffff82de8e40 r THM_BASE +ffffffff82de8f00 r UMC_BASE +ffffffff82de8fc0 r RSMU_BASE +ffffffff82dea000 r cz_ih_ip_funcs +ffffffff82dea0a8 R cz_ih_ip_block +ffffffff82dea0c0 r cz_ih_funcs ffffffff82deb000 r crtc_offsets -ffffffff82deb020 r dce_v11_0_ip_funcs -ffffffff82deb0c8 R dce_v11_0_ip_block -ffffffff82deb0e0 R dce_v11_2_ip_block -ffffffff82deb0f8 r dce_v11_0_display_funcs +ffffffff82deb020 r dce_v10_0_ip_funcs +ffffffff82deb0c8 R dce_v10_0_ip_block +ffffffff82deb0e0 R dce_v10_1_ip_block +ffffffff82deb0f8 r dce_v10_0_display_funcs ffffffff82deb150 r hpd_offsets -ffffffff82deb168 r dce_v11_0_encoder_funcs -ffffffff82deb188 r dce_v11_0_dac_helper_funcs -ffffffff82deb1f0 r dce_v11_0_dig_helper_funcs -ffffffff82deb258 r dce_v11_0_ext_helper_funcs -ffffffff82deb2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82deb2f0 r dce_v11_0_crtc_irq_funcs -ffffffff82deb300 r dce_v11_0_pageflip_irq_funcs -ffffffff82deb310 r dce_v11_0_hpd_irq_funcs +ffffffff82deb168 r dce_v10_0_encoder_funcs +ffffffff82deb188 r dce_v10_0_dac_helper_funcs +ffffffff82deb1f0 r dce_v10_0_dig_helper_funcs +ffffffff82deb258 r dce_v10_0_ext_helper_funcs +ffffffff82deb2c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82deb2f0 r dce_v10_0_crtc_irq_funcs +ffffffff82deb300 r dce_v10_0_pageflip_irq_funcs +ffffffff82deb310 r dce_v10_0_hpd_irq_funcs ffffffff82deb320 r interrupt_status_offsets -ffffffff82deb380 r dce_v11_0_crtc_funcs -ffffffff82deb440 r dce_v11_0_crtc_helper_funcs +ffffffff82deb380 r dce_v10_0_crtc_funcs +ffffffff82deb440 r dce_v10_0_crtc_helper_funcs ffffffff82deb4c0 r vga_control_regs ffffffff82deb4e0 r dig_offsets -ffffffff82deb510 r cz_mgcg_cgcg_init -ffffffff82deb530 r cz_golden_settings_a11 -ffffffff82deb550 r stoney_golden_settings_a11 -ffffffff82deb570 r polaris11_golden_settings_a11 -ffffffff82deb5b0 r polaris10_golden_settings_a11 -ffffffff82dec000 R df_v1_7_funcs -ffffffff82dec070 r df_v1_7_channel_number -ffffffff82ded000 R df_v3_6_funcs -ffffffff82ded070 r df_v3_6_channel_number -ffffffff82dee000 R df_v4_3_funcs -ffffffff82def000 r GC_BASE -ffffffff82def0a8 r HDP_BASE -ffffffff82def150 r MMHUB_BASE -ffffffff82def1f8 r ATHUB_BASE -ffffffff82def2a0 r NBIO_BASE -ffffffff82def348 r MP0_BASE -ffffffff82def3f0 r MP1_BASE -ffffffff82def498 r VCN0_BASE -ffffffff82def540 r DF_BASE -ffffffff82def5e8 r DCN_BASE -ffffffff82def690 r OSSSYS_BASE -ffffffff82def738 r SMUIO_BASE -ffffffff82def7e0 r THM_BASE -ffffffff82df0000 r gfx_v10_0_ip_funcs -ffffffff82df00a8 R gfx_v10_0_ip_block -ffffffff82df00c0 r gfx_v10_0_gfx_funcs -ffffffff82df0120 r golden_settings_gc_rlc_spm_10_0_nv10 -ffffffff82df63c0 r golden_settings_gc_rlc_spm_10_1_nv14 -ffffffff82df9de0 r golden_settings_gc_rlc_spm_10_1_2_nv12 -ffffffff82e00080 r gfx_v10_0_kiq_pm4_funcs -ffffffff82e000c0 r gfx_v10_0_ring_funcs_kiq -ffffffff82e00200 r gfx_v10_0_ring_funcs_gfx -ffffffff82e00340 r gfx_v10_0_ring_funcs_compute -ffffffff82e00480 r gfx_v10_0_eop_irq_funcs -ffffffff82e00490 r gfx_v10_0_kiq_irq_funcs -ffffffff82e004a0 r gfx_v10_0_priv_reg_irq_funcs -ffffffff82e004b0 r gfx_v10_0_priv_inst_irq_funcs -ffffffff82e004c0 r gfx_v10_0_rlc_funcs -ffffffff82e00528 r gfx_v10_0_rlc_funcs_sriov -ffffffff82e00590 r gfx10_cs_data -ffffffff82e005b0 r gfx10_SECT_CONTEXT_defs -ffffffff82e00640 r gfx10_SECT_CONTEXT_def_1 -ffffffff82e009a0 r gfx10_SECT_CONTEXT_def_3 -ffffffff82e009b0 r gfx10_SECT_CONTEXT_def_4 -ffffffff82e00c28 r gfx10_SECT_CONTEXT_def_5 -ffffffff82e00c30 r gfx10_SECT_CONTEXT_def_6 -ffffffff82e00c40 r gfx10_SECT_CONTEXT_def_2 -ffffffff82e01080 r gfx10_SECT_CONTEXT_def_7 -ffffffff82e01190 r gfx10_SECT_CONTEXT_def_8 -ffffffff82e014c0 r golden_settings_gc_10_1 -ffffffff82e01880 r golden_settings_gc_10_0_nv10 -ffffffff82e01880 r golden_settings_gc_10_1_1 -ffffffff82e01c10 r golden_settings_gc_10_1_2 -ffffffff82e01c10 r golden_settings_gc_10_1_nv14 -ffffffff82e02000 r golden_settings_gc_10_1_2_nv12 -ffffffff82e02000 r golden_settings_gc_10_3 -ffffffff82e02408 r golden_settings_gc_10_3_sienna_cichlid -ffffffff82e02410 r golden_settings_gc_10_3_2 -ffffffff82e02800 r golden_settings_gc_10_3_vangogh -ffffffff82e02a60 r golden_settings_gc_10_3_3 -ffffffff82e02c40 r golden_settings_gc_10_3_4 -ffffffff82e02fa0 r golden_settings_gc_10_3_5 -ffffffff82e032a0 r golden_settings_gc_10_0_cyan_skillfish -ffffffff82e035d0 r golden_settings_gc_10_3_6 -ffffffff82e037e0 r golden_settings_gc_10_3_7 -ffffffff82e04000 r gfx_v11_0_ip_funcs -ffffffff82e040a8 R gfx_v11_0_ip_block -ffffffff82e040c0 r gfx_v11_0_gfx_funcs -ffffffff82e04120 r gfx_v11_0_kiq_pm4_funcs -ffffffff82e04160 r gfx_v11_0_ring_funcs_kiq -ffffffff82e042a0 r gfx_v11_0_ring_funcs_gfx -ffffffff82e043e0 r gfx_v11_0_ring_funcs_compute -ffffffff82e04520 r gfx_v11_0_eop_irq_funcs -ffffffff82e04530 r gfx_v11_0_priv_reg_irq_funcs -ffffffff82e04540 r gfx_v11_0_priv_inst_irq_funcs -ffffffff82e04550 r gfx_v11_0_rlc_gc_fed_irq_funcs -ffffffff82e04560 r gfx_v11_0_rlc_funcs -ffffffff82e045d0 r gfx11_cs_data -ffffffff82e045f0 r gfx11_SECT_CONTEXT_defs -ffffffff82e04670 r gfx11_SECT_CONTEXT_def_1 -ffffffff82e049d0 r gfx11_SECT_CONTEXT_def_3 -ffffffff82e049e0 r gfx11_SECT_CONTEXT_def_5 -ffffffff82e049e8 r gfx11_SECT_CONTEXT_def_6 -ffffffff82e049f0 r gfx11_SECT_CONTEXT_def_2 -ffffffff82e04e30 r gfx11_SECT_CONTEXT_def_4 -ffffffff82e050b0 r gfx11_SECT_CONTEXT_def_7 -ffffffff82e05520 r golden_settings_gc_11_0_1 -ffffffff82e05600 r golden_settings_gc_11_0 -ffffffff82e06000 r gfx_v8_0_ip_funcs -ffffffff82e060a8 R gfx_v8_0_ip_block -ffffffff82e060c0 R gfx_v8_1_ip_block -ffffffff82e060d8 r gfx_v8_0_gfx_funcs -ffffffff82e06138 r gfx_v8_0_ring_funcs_kiq -ffffffff82e06278 r gfx_v8_0_ring_funcs_gfx -ffffffff82e063b8 r gfx_v8_0_ring_funcs_compute -ffffffff82e06500 r amdgpu_gds_reg_offset -ffffffff82e06600 r gfx_v8_0_eop_irq_funcs -ffffffff82e06610 r gfx_v8_0_priv_reg_irq_funcs -ffffffff82e06620 r gfx_v8_0_priv_inst_irq_funcs -ffffffff82e06630 r gfx_v8_0_cp_ecc_error_irq_funcs -ffffffff82e06640 r gfx_v8_0_sq_irq_funcs -ffffffff82e06650 r sq_edc_source_names -ffffffff82e06688 r iceland_rlc_funcs -ffffffff82e066f0 r vi_cs_data -ffffffff82e06710 r vi_SECT_CONTEXT_defs -ffffffff82e06790 r vi_SECT_CONTEXT_def_1 -ffffffff82e06ae0 r vi_SECT_CONTEXT_def_3 -ffffffff82e06b00 r vi_SECT_CONTEXT_def_4 -ffffffff82e06d74 r vi_SECT_CONTEXT_def_5 -ffffffff82e06d7c r vi_SECT_CONTEXT_def_6 -ffffffff82e06d80 r vi_SECT_CONTEXT_def_2 -ffffffff82e071d0 r vi_SECT_CONTEXT_def_7 -ffffffff82e07580 r vgpr_init_compute_shader -ffffffff82e07690 r vgpr_init_regs -ffffffff82e07720 r sgpr1_init_regs -ffffffff82e077b0 r sgpr2_init_regs -ffffffff82e07840 r sec_ded_counter_registers -ffffffff82e078b0 r iceland_mgcg_cgcg_init -ffffffff82e07bb0 r golden_settings_iceland_a11 -ffffffff82e07c70 r iceland_golden_common_all -ffffffff82e07cd0 r fiji_mgcg_cgcg_init -ffffffff82e07e80 r golden_settings_fiji_a10 -ffffffff82e07f10 r fiji_golden_common_all -ffffffff82e07f90 r tonga_mgcg_cgcg_init -ffffffff82e08320 r golden_settings_tonga_a11 -ffffffff82e083e0 r tonga_golden_common_all -ffffffff82e08440 r golden_settings_vegam_a11 -ffffffff82e08510 r vegam_golden_common_all -ffffffff82e08560 r golden_settings_polaris11_a11 -ffffffff82e08630 r polaris11_golden_common_all -ffffffff82e08680 r golden_settings_polaris10_a11 -ffffffff82e08750 r polaris10_golden_common_all -ffffffff82e087b0 r cz_mgcg_cgcg_init -ffffffff82e08b40 r cz_golden_settings_a11 -ffffffff82e08bd0 r cz_golden_common_all -ffffffff82e08c30 r stoney_mgcg_cgcg_init -ffffffff82e08c70 r stoney_golden_settings_a11 -ffffffff82e08cf0 r stoney_golden_common_all -ffffffff82e09000 R gfx_v9_0_ras_ops -ffffffff82e09040 r gfx_v9_0_ip_funcs -ffffffff82e090e8 R gfx_v9_0_ip_block -ffffffff82e09100 r ras_gfx_subblocks -ffffffff82e09b80 r gfx_v9_0_edc_counter_regs -ffffffff82e09f20 r gfx_v9_0_ras_fields -ffffffff82e0b000 r gfx_v9_0_gfx_funcs -ffffffff82e0b060 r gfx_v9_0_kiq_pm4_funcs -ffffffff82e0b0a0 r gfx_v9_0_ring_funcs_kiq -ffffffff82e0b1e0 r gfx_v9_0_ring_funcs_gfx -ffffffff82e0b320 r gfx_v9_0_sw_ring_funcs_gfx -ffffffff82e0b460 r gfx_v9_0_ring_funcs_compute -ffffffff82e0b5a0 r gfx_v9_0_eop_irq_funcs -ffffffff82e0b5b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82e0b5c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82e0b5d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82e0b5e0 r gfx_v9_0_rlc_funcs -ffffffff82e0b650 r gfx9_cs_data -ffffffff82e0b670 r gfx9_SECT_CONTEXT_defs -ffffffff82e0b700 r gfx9_SECT_CONTEXT_def_1 -ffffffff82e0ba50 r gfx9_SECT_CONTEXT_def_3 -ffffffff82e0ba60 r gfx9_SECT_CONTEXT_def_4 -ffffffff82e0bcd4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82e0bcdc r gfx9_SECT_CONTEXT_def_6 -ffffffff82e0bce0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82e0bdf0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82e0c260 r gfx9_SECT_CONTEXT_def_8 -ffffffff82e0c4d0 r amdgpu_gfxoff_quirk_list -ffffffff82e0c520 r vgpr_init_compute_shader_arcturus -ffffffff82e0cdb0 r vgpr_init_regs_arcturus -ffffffff82e0cf40 r vgpr_init_regs -ffffffff82e0d0d0 r sgpr1_init_regs -ffffffff82e0d260 r sgpr2_init_regs -ffffffff82e0d3f0 r golden_settings_gc_9_0 -ffffffff82e0d5d0 r golden_settings_gc_9_0_vg10 -ffffffff82e0d780 r golden_settings_gc_9_2_1 -ffffffff82e0d900 r golden_settings_gc_9_2_1_vg12 -ffffffff82e0da40 r golden_settings_gc_9_0_vg20 -ffffffff82e0db50 r golden_settings_gc_9_4_1_arct -ffffffff82e0dc60 r golden_settings_gc_9_1 -ffffffff82e0dea0 r golden_settings_gc_9_1_rv2 -ffffffff82e0e070 r golden_settings_gc_9_1_rv1 -ffffffff82e0e120 r golden_settings_gc_9_1_rn -ffffffff82e0e240 r golden_settings_gc_9_x_common -ffffffff82e0f000 R gfx_v9_4_ras_ops -ffffffff82e0f040 r gfx_v9_4_edc_counter_regs -ffffffff82e0f420 r gfx_v9_4_ras_fields -ffffffff82e11000 R vgpr_init_regs_aldebaran -ffffffff82e111b0 R sgpr112_init_regs_aldebaran -ffffffff82e11360 R sgpr96_init_regs_aldebaran -ffffffff82e11510 R sgpr64_init_regs_aldebaran -ffffffff82e116c0 r golden_settings_gc_9_4_2_alde -ffffffff82e11720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82e117b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82e11840 r sgpr112_init_compute_shader_aldebaran -ffffffff82e11a60 r sgpr96_init_compute_shader_aldebaran -ffffffff82e11c50 r sgpr64_init_compute_shader_aldebaran -ffffffff82e11dc0 r vgpr_init_compute_shader_aldebaran -ffffffff82e126a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82e12a20 r gfx_v9_4_2_ras_fields -ffffffff82e143c0 r gfx_v9_4_2_utc_blocks -ffffffff82e15000 r gfx_v9_4_3_ip_funcs -ffffffff82e150a8 R gfx_v9_4_3_ip_block -ffffffff82e150c0 r gfx_v9_4_3_kiq_pm4_funcs -ffffffff82e15100 r gfx_v9_4_3_ring_funcs_kiq -ffffffff82e15240 r gfx_v9_4_3_ring_funcs_compute -ffffffff82e15380 r gfx_v9_4_3_eop_irq_funcs -ffffffff82e15390 r gfx_v9_4_3_priv_reg_irq_funcs -ffffffff82e153a0 r gfx_v9_4_3_priv_inst_irq_funcs -ffffffff82e153b0 r gfx_v9_4_3_rlc_funcs -ffffffff82e15418 r gfx_v9_4_3_gfx_funcs -ffffffff82e15480 r gfx_v9_4_3_ce_reg_list -ffffffff82e15810 r gfx_v9_4_3_ras_mem_list_array -ffffffff82e15970 r gfx_v9_4_3_ue_reg_list -ffffffff82e15d30 r gfx_v9_4_3_ras_cp_mem_list -ffffffff82e15d80 r gfx_v9_4_3_ras_gcea_mem_list -ffffffff82e15ec0 r gfx_v9_4_3_ras_gc_cane_mem_list -ffffffff82e15ed0 r gfx_v9_4_3_ras_gcutcl2_mem_list -ffffffff82e15ee0 r gfx_v9_4_3_ras_gds_mem_list -ffffffff82e15ef0 r gfx_v9_4_3_ras_lds_mem_list -ffffffff82e16110 r gfx_v9_4_3_ras_rlc_mem_list -ffffffff82e16190 r gfx_v9_4_3_ras_sp_mem_list -ffffffff82e161a0 r gfx_v9_4_3_ras_spi_mem_list -ffffffff82e161e0 r gfx_v9_4_3_ras_sqc_mem_list -ffffffff82e16350 r gfx_v9_4_3_ras_sq_mem_list -ffffffff82e16390 r gfx_v9_4_3_ras_ta_mem_list -ffffffff82e163e0 r gfx_v9_4_3_ras_tcc_mem_list -ffffffff82e163f0 r gfx_v9_4_3_ras_tca_mem_list -ffffffff82e16400 r gfx_v9_4_3_ras_tci_mem_list -ffffffff82e16410 r gfx_v9_4_3_ras_tcp_mem_list -ffffffff82e165a0 r gfx_v9_4_3_ras_td_mem_list -ffffffff82e165d0 r gfx_v9_4_3_ras_tcx_mem_list -ffffffff82e16b50 r gfx_v9_4_3_ras_atc_l2_mem_list -ffffffff82e16b60 r gfx_v9_4_3_ras_utcl2_mem_list -ffffffff82e16b70 r gfx_v9_4_3_ras_vml2_mem_list -ffffffff82e16b80 r gfx_v9_4_3_ras_vml2_walker_mem_list -ffffffff82e17000 R gfxhub_v1_0_funcs -ffffffff82e18000 R gfxhub_v1_2_funcs -ffffffff82e19000 R gfxhub_v2_0_funcs -ffffffff82e19060 r gfxhub_v2_0_vmhub_funcs -ffffffff82e19070 r gfxhub_client_ids -ffffffff82e1a000 R gfxhub_v2_1_funcs -ffffffff82e1a060 r gfxhub_v2_1_vmhub_funcs +ffffffff82deb500 r pin_offsets +ffffffff82deb520 r fiji_mgcg_cgcg_init +ffffffff82deb540 r golden_settings_fiji_a10 +ffffffff82deb570 r tonga_mgcg_cgcg_init +ffffffff82deb590 r golden_settings_tonga_a11 +ffffffff82dec000 r crtc_offsets +ffffffff82dec020 r dce_v11_0_ip_funcs +ffffffff82dec0c8 R dce_v11_0_ip_block +ffffffff82dec0e0 R dce_v11_2_ip_block +ffffffff82dec0f8 r dce_v11_0_display_funcs +ffffffff82dec150 r hpd_offsets +ffffffff82dec168 r dce_v11_0_encoder_funcs +ffffffff82dec188 r dce_v11_0_dac_helper_funcs +ffffffff82dec1f0 r dce_v11_0_dig_helper_funcs +ffffffff82dec258 r dce_v11_0_ext_helper_funcs +ffffffff82dec2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82dec2f0 r dce_v11_0_crtc_irq_funcs +ffffffff82dec300 r dce_v11_0_pageflip_irq_funcs +ffffffff82dec310 r dce_v11_0_hpd_irq_funcs +ffffffff82dec320 r interrupt_status_offsets +ffffffff82dec380 r dce_v11_0_crtc_funcs +ffffffff82dec440 r dce_v11_0_crtc_helper_funcs +ffffffff82dec4c0 r vga_control_regs +ffffffff82dec4e0 r dig_offsets +ffffffff82dec510 r cz_mgcg_cgcg_init +ffffffff82dec530 r cz_golden_settings_a11 +ffffffff82dec550 r stoney_golden_settings_a11 +ffffffff82dec570 r polaris11_golden_settings_a11 +ffffffff82dec5b0 r polaris10_golden_settings_a11 +ffffffff82ded000 R df_v1_7_funcs +ffffffff82ded070 r df_v1_7_channel_number +ffffffff82dee000 R df_v3_6_funcs +ffffffff82dee070 r df_v3_6_channel_number +ffffffff82def000 R df_v4_3_funcs +ffffffff82df0000 r GC_BASE +ffffffff82df00a8 r HDP_BASE +ffffffff82df0150 r MMHUB_BASE +ffffffff82df01f8 r ATHUB_BASE +ffffffff82df02a0 r NBIO_BASE +ffffffff82df0348 r MP0_BASE +ffffffff82df03f0 r MP1_BASE +ffffffff82df0498 r VCN0_BASE +ffffffff82df0540 r DF_BASE +ffffffff82df05e8 r DCN_BASE +ffffffff82df0690 r OSSSYS_BASE +ffffffff82df0738 r SMUIO_BASE +ffffffff82df07e0 r THM_BASE +ffffffff82df1000 r gfx_v10_0_ip_funcs +ffffffff82df10a8 R gfx_v10_0_ip_block +ffffffff82df10c0 r gfx_v10_0_gfx_funcs +ffffffff82df1120 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82df73c0 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82dfade0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82e01080 r gfx_v10_0_kiq_pm4_funcs +ffffffff82e010c0 r gfx_v10_0_ring_funcs_kiq +ffffffff82e01200 r gfx_v10_0_ring_funcs_gfx +ffffffff82e01340 r gfx_v10_0_ring_funcs_compute +ffffffff82e01480 r gfx_v10_0_eop_irq_funcs +ffffffff82e01490 r gfx_v10_0_kiq_irq_funcs +ffffffff82e014a0 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82e014b0 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82e014c0 r gfx_v10_0_rlc_funcs +ffffffff82e01528 r gfx_v10_0_rlc_funcs_sriov +ffffffff82e01590 r gfx10_cs_data +ffffffff82e015b0 r gfx10_SECT_CONTEXT_defs +ffffffff82e01640 r gfx10_SECT_CONTEXT_def_1 +ffffffff82e019a0 r gfx10_SECT_CONTEXT_def_3 +ffffffff82e019b0 r gfx10_SECT_CONTEXT_def_4 +ffffffff82e01c28 r gfx10_SECT_CONTEXT_def_5 +ffffffff82e01c30 r gfx10_SECT_CONTEXT_def_6 +ffffffff82e01c40 r gfx10_SECT_CONTEXT_def_2 +ffffffff82e02080 r gfx10_SECT_CONTEXT_def_7 +ffffffff82e02190 r gfx10_SECT_CONTEXT_def_8 +ffffffff82e024c0 r golden_settings_gc_10_1 +ffffffff82e02880 r golden_settings_gc_10_0_nv10 +ffffffff82e02880 r golden_settings_gc_10_1_1 +ffffffff82e02c10 r golden_settings_gc_10_1_2 +ffffffff82e02c10 r golden_settings_gc_10_1_nv14 +ffffffff82e03000 r golden_settings_gc_10_1_2_nv12 +ffffffff82e03000 r golden_settings_gc_10_3 +ffffffff82e03408 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82e03410 r golden_settings_gc_10_3_2 +ffffffff82e03800 r golden_settings_gc_10_3_vangogh +ffffffff82e03a60 r golden_settings_gc_10_3_3 +ffffffff82e03c40 r golden_settings_gc_10_3_4 +ffffffff82e03fa0 r golden_settings_gc_10_3_5 +ffffffff82e042a0 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82e045d0 r golden_settings_gc_10_3_6 +ffffffff82e047e0 r golden_settings_gc_10_3_7 +ffffffff82e05000 r gfx_v11_0_ip_funcs +ffffffff82e050a8 R gfx_v11_0_ip_block +ffffffff82e050c0 r gfx_v11_0_gfx_funcs +ffffffff82e05120 r gfx_v11_0_kiq_pm4_funcs +ffffffff82e05160 r gfx_v11_0_ring_funcs_kiq +ffffffff82e052a0 r gfx_v11_0_ring_funcs_gfx +ffffffff82e053e0 r gfx_v11_0_ring_funcs_compute +ffffffff82e05520 r gfx_v11_0_eop_irq_funcs +ffffffff82e05530 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82e05540 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82e05550 r gfx_v11_0_rlc_gc_fed_irq_funcs +ffffffff82e05560 r gfx_v11_0_rlc_funcs +ffffffff82e055d0 r gfx11_cs_data +ffffffff82e055f0 r gfx11_SECT_CONTEXT_defs +ffffffff82e05670 r gfx11_SECT_CONTEXT_def_1 +ffffffff82e059d0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82e059e0 r gfx11_SECT_CONTEXT_def_5 +ffffffff82e059e8 r gfx11_SECT_CONTEXT_def_6 +ffffffff82e059f0 r gfx11_SECT_CONTEXT_def_2 +ffffffff82e05e30 r gfx11_SECT_CONTEXT_def_4 +ffffffff82e060b0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82e06520 r golden_settings_gc_11_0_1 +ffffffff82e06600 r golden_settings_gc_11_0 +ffffffff82e07000 r gfx_v8_0_ip_funcs +ffffffff82e070a8 R gfx_v8_0_ip_block +ffffffff82e070c0 R gfx_v8_1_ip_block +ffffffff82e070d8 r gfx_v8_0_gfx_funcs +ffffffff82e07138 r gfx_v8_0_ring_funcs_kiq +ffffffff82e07278 r gfx_v8_0_ring_funcs_gfx +ffffffff82e073b8 r gfx_v8_0_ring_funcs_compute +ffffffff82e07500 r amdgpu_gds_reg_offset +ffffffff82e07600 r gfx_v8_0_eop_irq_funcs +ffffffff82e07610 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82e07620 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82e07630 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82e07640 r gfx_v8_0_sq_irq_funcs +ffffffff82e07650 r sq_edc_source_names +ffffffff82e07688 r iceland_rlc_funcs +ffffffff82e076f0 r vi_cs_data +ffffffff82e07710 r vi_SECT_CONTEXT_defs +ffffffff82e07790 r vi_SECT_CONTEXT_def_1 +ffffffff82e07ae0 r vi_SECT_CONTEXT_def_3 +ffffffff82e07b00 r vi_SECT_CONTEXT_def_4 +ffffffff82e07d74 r vi_SECT_CONTEXT_def_5 +ffffffff82e07d7c r vi_SECT_CONTEXT_def_6 +ffffffff82e07d80 r vi_SECT_CONTEXT_def_2 +ffffffff82e081d0 r vi_SECT_CONTEXT_def_7 +ffffffff82e08580 r vgpr_init_compute_shader +ffffffff82e08690 r vgpr_init_regs +ffffffff82e08720 r sgpr1_init_regs +ffffffff82e087b0 r sgpr2_init_regs +ffffffff82e08840 r sec_ded_counter_registers +ffffffff82e088b0 r iceland_mgcg_cgcg_init +ffffffff82e08bb0 r golden_settings_iceland_a11 +ffffffff82e08c70 r iceland_golden_common_all +ffffffff82e08cd0 r fiji_mgcg_cgcg_init +ffffffff82e08e80 r golden_settings_fiji_a10 +ffffffff82e08f10 r fiji_golden_common_all +ffffffff82e08f90 r tonga_mgcg_cgcg_init +ffffffff82e09320 r golden_settings_tonga_a11 +ffffffff82e093e0 r tonga_golden_common_all +ffffffff82e09440 r golden_settings_vegam_a11 +ffffffff82e09510 r vegam_golden_common_all +ffffffff82e09560 r golden_settings_polaris11_a11 +ffffffff82e09630 r polaris11_golden_common_all +ffffffff82e09680 r golden_settings_polaris10_a11 +ffffffff82e09750 r polaris10_golden_common_all +ffffffff82e097b0 r cz_mgcg_cgcg_init +ffffffff82e09b40 r cz_golden_settings_a11 +ffffffff82e09bd0 r cz_golden_common_all +ffffffff82e09c30 r stoney_mgcg_cgcg_init +ffffffff82e09c70 r stoney_golden_settings_a11 +ffffffff82e09cf0 r stoney_golden_common_all +ffffffff82e0a000 R gfx_v9_0_ras_ops +ffffffff82e0a040 r gfx_v9_0_ip_funcs +ffffffff82e0a0e8 R gfx_v9_0_ip_block +ffffffff82e0a100 r ras_gfx_subblocks +ffffffff82e0ab80 r gfx_v9_0_edc_counter_regs +ffffffff82e0af20 r gfx_v9_0_ras_fields +ffffffff82e0c000 r gfx_v9_0_gfx_funcs +ffffffff82e0c060 r gfx_v9_0_kiq_pm4_funcs +ffffffff82e0c0a0 r gfx_v9_0_ring_funcs_kiq +ffffffff82e0c1e0 r gfx_v9_0_ring_funcs_gfx +ffffffff82e0c320 r gfx_v9_0_sw_ring_funcs_gfx +ffffffff82e0c460 r gfx_v9_0_ring_funcs_compute +ffffffff82e0c5a0 r gfx_v9_0_eop_irq_funcs +ffffffff82e0c5b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82e0c5c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82e0c5d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82e0c5e0 r gfx_v9_0_rlc_funcs +ffffffff82e0c650 r gfx9_cs_data +ffffffff82e0c670 r gfx9_SECT_CONTEXT_defs +ffffffff82e0c700 r gfx9_SECT_CONTEXT_def_1 +ffffffff82e0ca50 r gfx9_SECT_CONTEXT_def_3 +ffffffff82e0ca60 r gfx9_SECT_CONTEXT_def_4 +ffffffff82e0ccd4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82e0ccdc r gfx9_SECT_CONTEXT_def_6 +ffffffff82e0cce0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82e0cdf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82e0d260 r gfx9_SECT_CONTEXT_def_8 +ffffffff82e0d4d0 r amdgpu_gfxoff_quirk_list +ffffffff82e0d520 r vgpr_init_compute_shader_arcturus +ffffffff82e0ddb0 r vgpr_init_regs_arcturus +ffffffff82e0df40 r vgpr_init_regs +ffffffff82e0e0d0 r sgpr1_init_regs +ffffffff82e0e260 r sgpr2_init_regs +ffffffff82e0e3f0 r golden_settings_gc_9_0 +ffffffff82e0e5d0 r golden_settings_gc_9_0_vg10 +ffffffff82e0e780 r golden_settings_gc_9_2_1 +ffffffff82e0e900 r golden_settings_gc_9_2_1_vg12 +ffffffff82e0ea40 r golden_settings_gc_9_0_vg20 +ffffffff82e0eb50 r golden_settings_gc_9_4_1_arct +ffffffff82e0ec60 r golden_settings_gc_9_1 +ffffffff82e0eea0 r golden_settings_gc_9_1_rv2 +ffffffff82e0f070 r golden_settings_gc_9_1_rv1 +ffffffff82e0f120 r golden_settings_gc_9_1_rn +ffffffff82e0f240 r golden_settings_gc_9_x_common +ffffffff82e10000 R gfx_v9_4_ras_ops +ffffffff82e10040 r gfx_v9_4_edc_counter_regs +ffffffff82e10420 r gfx_v9_4_ras_fields +ffffffff82e12000 R vgpr_init_regs_aldebaran +ffffffff82e121b0 R sgpr112_init_regs_aldebaran +ffffffff82e12360 R sgpr96_init_regs_aldebaran +ffffffff82e12510 R sgpr64_init_regs_aldebaran +ffffffff82e126c0 r golden_settings_gc_9_4_2_alde +ffffffff82e12720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82e127b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82e12840 r sgpr112_init_compute_shader_aldebaran +ffffffff82e12a60 r sgpr96_init_compute_shader_aldebaran +ffffffff82e12c50 r sgpr64_init_compute_shader_aldebaran +ffffffff82e12dc0 r vgpr_init_compute_shader_aldebaran +ffffffff82e136a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82e13a20 r gfx_v9_4_2_ras_fields +ffffffff82e153c0 r gfx_v9_4_2_utc_blocks +ffffffff82e16000 r gfx_v9_4_3_ip_funcs +ffffffff82e160a8 R gfx_v9_4_3_ip_block +ffffffff82e160c0 r gfx_v9_4_3_kiq_pm4_funcs +ffffffff82e16100 r gfx_v9_4_3_ring_funcs_kiq +ffffffff82e16240 r gfx_v9_4_3_ring_funcs_compute +ffffffff82e16380 r gfx_v9_4_3_eop_irq_funcs +ffffffff82e16390 r gfx_v9_4_3_priv_reg_irq_funcs +ffffffff82e163a0 r gfx_v9_4_3_priv_inst_irq_funcs +ffffffff82e163b0 r gfx_v9_4_3_rlc_funcs +ffffffff82e16418 r gfx_v9_4_3_gfx_funcs +ffffffff82e16480 r gfx_v9_4_3_ce_reg_list +ffffffff82e16810 r gfx_v9_4_3_ras_mem_list_array +ffffffff82e16970 r gfx_v9_4_3_ue_reg_list +ffffffff82e16d30 r gfx_v9_4_3_ras_cp_mem_list +ffffffff82e16d80 r gfx_v9_4_3_ras_gcea_mem_list +ffffffff82e16ec0 r gfx_v9_4_3_ras_gc_cane_mem_list +ffffffff82e16ed0 r gfx_v9_4_3_ras_gcutcl2_mem_list +ffffffff82e16ee0 r gfx_v9_4_3_ras_gds_mem_list +ffffffff82e16ef0 r gfx_v9_4_3_ras_lds_mem_list +ffffffff82e17110 r gfx_v9_4_3_ras_rlc_mem_list +ffffffff82e17190 r gfx_v9_4_3_ras_sp_mem_list +ffffffff82e171a0 r gfx_v9_4_3_ras_spi_mem_list +ffffffff82e171e0 r gfx_v9_4_3_ras_sqc_mem_list +ffffffff82e17350 r gfx_v9_4_3_ras_sq_mem_list +ffffffff82e17390 r gfx_v9_4_3_ras_ta_mem_list +ffffffff82e173e0 r gfx_v9_4_3_ras_tcc_mem_list +ffffffff82e173f0 r gfx_v9_4_3_ras_tca_mem_list +ffffffff82e17400 r gfx_v9_4_3_ras_tci_mem_list +ffffffff82e17410 r gfx_v9_4_3_ras_tcp_mem_list +ffffffff82e175a0 r gfx_v9_4_3_ras_td_mem_list +ffffffff82e175d0 r gfx_v9_4_3_ras_tcx_mem_list +ffffffff82e17b50 r gfx_v9_4_3_ras_atc_l2_mem_list +ffffffff82e17b60 r gfx_v9_4_3_ras_utcl2_mem_list +ffffffff82e17b70 r gfx_v9_4_3_ras_vml2_mem_list +ffffffff82e17b80 r gfx_v9_4_3_ras_vml2_walker_mem_list +ffffffff82e18000 R gfxhub_v1_0_funcs +ffffffff82e19000 R gfxhub_v1_2_funcs +ffffffff82e1a000 R gfxhub_v2_0_funcs +ffffffff82e1a060 r gfxhub_v2_0_vmhub_funcs ffffffff82e1a070 r gfxhub_client_ids -ffffffff82e1b000 R gfxhub_v3_0_funcs -ffffffff82e1b060 r gfxhub_v3_0_vmhub_funcs +ffffffff82e1b000 R gfxhub_v2_1_funcs +ffffffff82e1b060 r gfxhub_v2_1_vmhub_funcs ffffffff82e1b070 r gfxhub_client_ids -ffffffff82e1c000 R gfxhub_v3_0_3_funcs -ffffffff82e1c060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82e1c000 R gfxhub_v3_0_funcs +ffffffff82e1c060 r gfxhub_v3_0_vmhub_funcs ffffffff82e1c070 r gfxhub_client_ids -ffffffff82e1d000 R gmc_v10_0_ip_funcs -ffffffff82e1d0a8 R gmc_v10_0_ip_block -ffffffff82e1d0c0 r gmc_v10_0_gmc_funcs -ffffffff82e1d118 r gmc_v10_0_irq_funcs -ffffffff82e1d128 r gmc_v10_0_ecc_funcs -ffffffff82e1e000 R gmc_v11_0_ip_funcs -ffffffff82e1e0a8 R gmc_v11_0_ip_block -ffffffff82e1e0c0 r gmc_v11_0_gmc_funcs -ffffffff82e1e118 r gmc_v11_0_irq_funcs -ffffffff82e1e128 r gmc_v11_0_ecc_funcs -ffffffff82e1f000 r gmc_v7_0_ip_funcs -ffffffff82e1f0a8 R gmc_v7_0_ip_block -ffffffff82e1f0c0 R gmc_v7_4_ip_block -ffffffff82e1f0d8 r gmc_v7_0_gmc_funcs -ffffffff82e1f130 r gmc_v7_0_irq_funcs -ffffffff82e1f140 r iceland_mgcg_cgcg_init -ffffffff82e1f150 r golden_settings_iceland_a11 -ffffffff82e1f180 r mc_cg_registers -ffffffff82e1f1b0 r mc_cg_en -ffffffff82e1f1e0 r mc_cg_ls_en -ffffffff82e20000 r gmc_v8_0_ip_funcs -ffffffff82e200a8 R gmc_v8_0_ip_block -ffffffff82e200c0 R gmc_v8_1_ip_block -ffffffff82e200d8 R gmc_v8_5_ip_block -ffffffff82e200f0 r gmc_v8_0_gmc_funcs -ffffffff82e20148 r gmc_v8_0_irq_funcs -ffffffff82e20158 r fiji_mgcg_cgcg_init -ffffffff82e20170 r golden_settings_fiji_a10 -ffffffff82e201a0 r tonga_mgcg_cgcg_init -ffffffff82e201b0 r golden_settings_tonga_a11 -ffffffff82e20210 r golden_settings_polaris11_a11 -ffffffff82e20240 r golden_settings_polaris10_a11 -ffffffff82e2027c r cz_mgcg_cgcg_init -ffffffff82e20290 r stoney_mgcg_cgcg_init -ffffffff82e202b0 r golden_settings_stoney_common -ffffffff82e21000 R gmc_v9_0_ip_funcs -ffffffff82e210a8 R gmc_v9_0_ip_block -ffffffff82e210c0 r gmc_v9_0_gmc_funcs -ffffffff82e21118 r gmc_v9_0_irq_funcs -ffffffff82e21128 r gmc_v9_0_ecc_funcs -ffffffff82e21140 r gfxhub_client_ids -ffffffff82e211b0 r mmhub_client_ids_vega10 -ffffffff82e214a0 r mmhub_client_ids_vega12 -ffffffff82e217a0 r mmhub_client_ids_vega20 -ffffffff82e21a90 r mmhub_client_ids_arcturus -ffffffff82e232a0 r mmhub_client_ids_raven -ffffffff82e23460 r mmhub_client_ids_renoir -ffffffff82e23650 r mmhub_client_ids_aldebaran -ffffffff82e24e60 r ecc_umc_mcumc_ctrl_addrs -ffffffff82e24ee0 r ecc_umc_mcumc_ctrl_mask_addrs -ffffffff82e24f60 r golden_settings_mmhub_1_0_0 -ffffffff82e24f90 r golden_settings_athub_1_0_0 -ffffffff82e25000 R hdp_v4_0_funcs -ffffffff82e26000 R hdp_v5_0_funcs -ffffffff82e27000 R hdp_v5_2_funcs -ffffffff82e28000 R hdp_v6_0_funcs -ffffffff82e29000 r iceland_ih_ip_funcs -ffffffff82e290a8 R iceland_ih_ip_block -ffffffff82e290c0 r iceland_ih_funcs -ffffffff82e2a000 r ih_v6_0_ip_funcs -ffffffff82e2a0a8 R ih_v6_0_ip_block -ffffffff82e2a0c0 r ih_v6_0_funcs -ffffffff82e2a0e0 r ih_v6_0_self_irq_funcs -ffffffff82e2b000 r ih_v6_1_ip_funcs -ffffffff82e2b0a8 R ih_v6_1_ip_block -ffffffff82e2b0c0 r ih_v6_1_funcs -ffffffff82e2b0e0 r ih_v6_1_self_irq_funcs -ffffffff82e2c000 R gfx_v11_0_imu_funcs -ffffffff82e2c030 r imu_rlc_ram_golden_11 -ffffffff82e2c680 r imu_rlc_ram_golden_11_0_2 -ffffffff82e2d000 r imu_rlc_ram_golden_11_0_3 -ffffffff82e2e000 r jpeg_v1_0_decode_ring_vm_funcs -ffffffff82e2e140 r jpeg_v1_0_irq_funcs -ffffffff82e2f000 r jpeg_v2_0_ip_funcs -ffffffff82e2f0a8 R jpeg_v2_0_ip_block -ffffffff82e2f0c0 r jpeg_v2_0_dec_ring_vm_funcs -ffffffff82e2f200 r jpeg_v2_0_irq_funcs -ffffffff82e30000 r jpeg_v2_5_ip_funcs -ffffffff82e300a8 R jpeg_v2_5_ip_block -ffffffff82e300c0 r jpeg_v2_6_ip_funcs -ffffffff82e30168 R jpeg_v2_6_ip_block -ffffffff82e30180 R jpeg_v2_6_ras_hw_ops -ffffffff82e301c0 r jpeg_v2_5_dec_ring_vm_funcs -ffffffff82e30300 r jpeg_v2_6_dec_ring_vm_funcs -ffffffff82e30440 r jpeg_v2_5_irq_funcs -ffffffff82e30450 r jpeg_v2_6_ras_irq_funcs -ffffffff82e31000 r jpeg_v3_0_ip_funcs -ffffffff82e310a8 R jpeg_v3_0_ip_block -ffffffff82e310c0 r jpeg_v3_0_dec_ring_vm_funcs -ffffffff82e31200 r jpeg_v3_0_irq_funcs -ffffffff82e32000 r jpeg_v4_0_ip_funcs -ffffffff82e320a8 R jpeg_v4_0_ip_block -ffffffff82e320c0 R jpeg_v4_0_ras_hw_ops -ffffffff82e32100 r jpeg_v4_0_dec_ring_vm_funcs -ffffffff82e32240 r jpeg_v4_0_irq_funcs -ffffffff82e32250 r jpeg_v4_0_ras_irq_funcs -ffffffff82e33000 r jpeg_v4_0_3_ip_funcs -ffffffff82e330a8 R jpeg_v4_0_3_ip_block -ffffffff82e330c0 r jpeg_v4_0_3_dec_ring_vm_funcs -ffffffff82e33200 r jpeg_v4_0_3_irq_funcs -ffffffff82e33210 r jpeg_v4_0_3_ras_hw_ops -ffffffff82e33250 r jpeg_v4_0_3_ue_reg_list -ffffffff82e34000 R lsdma_v6_0_funcs -ffffffff82e35000 r mca_v3_0_mp0_hw_ops -ffffffff82e35040 r mca_v3_0_mp1_hw_ops -ffffffff82e35080 r mca_v3_0_mpio_hw_ops -ffffffff82e36000 r mes_v10_1_ip_funcs -ffffffff82e360a8 R mes_v10_1_ip_block -ffffffff82e360c0 r mes_v10_1_funcs -ffffffff82e360f0 r mes_v10_1_ring_funcs -ffffffff82e37000 r mes_v11_0_ip_funcs -ffffffff82e370a8 R mes_v11_0_ip_block -ffffffff82e370c0 r mes_v11_0_funcs -ffffffff82e370f0 r mes_v11_0_ring_funcs -ffffffff82e38000 R mmhub_v1_0_funcs -ffffffff82e38050 r mmhub_v1_0_edc_cnt_regs -ffffffff82e380c0 r mmhub_v1_0_ras_fields -ffffffff82e39000 R mmhub_v1_7_funcs -ffffffff82e39050 r mmhub_v1_7_edc_cnt_regs -ffffffff82e39250 r mmhub_v1_7_ras_fields -ffffffff82e3a9c0 r mmhub_v1_7_ea_err_status_regs -ffffffff82e3b000 R mmhub_v1_8_funcs -ffffffff82e3b050 r mmhub_v1_8_ras_hw_ops -ffffffff82e3b090 r mmhub_v1_8_ce_reg_list -ffffffff82e3b180 r mmhub_v1_8_ras_memory_list -ffffffff82e3b2b0 r mmhub_v1_8_ue_reg_list -ffffffff82e3c000 R mmhub_v2_0_funcs -ffffffff82e3c050 r mmhub_v2_0_vmhub_funcs -ffffffff82e3c060 r mmhub_client_ids_navi1x -ffffffff82e3c190 r mmhub_client_ids_sienna_cichlid -ffffffff82e3c450 r mmhub_client_ids_beige_goby -ffffffff82e3d000 R mmhub_v2_3_funcs -ffffffff82e3d050 r mmhub_v2_3_vmhub_funcs -ffffffff82e3d060 r mmhub_client_ids_vangogh -ffffffff82e3e000 R mmhub_v3_0_funcs -ffffffff82e3e050 r mmhub_v3_0_vmhub_funcs -ffffffff82e3e060 r mmhub_client_ids_v3_0_0 -ffffffff82e3f000 R mmhub_v3_0_1_funcs -ffffffff82e3f050 r mmhub_v3_0_1_vmhub_funcs -ffffffff82e3f060 r mmhub_client_ids_v3_0_1 -ffffffff82e40000 R mmhub_v3_0_2_funcs -ffffffff82e40050 r mmhub_v3_0_2_vmhub_funcs -ffffffff82e40060 r mmhub_client_ids_v3_0_2 -ffffffff82e41000 R mmhub_v9_4_ras_hw_ops -ffffffff82e41040 R mmhub_v9_4_funcs -ffffffff82e41090 r mmhub_v9_4_edc_cnt_regs -ffffffff82e41330 r mmhub_v9_4_ras_fields -ffffffff82e433b0 r mmhub_v9_4_err_status_regs -ffffffff82e44000 r xgpu_ai_mailbox_ack_irq_funcs -ffffffff82e44010 r xgpu_ai_mailbox_rcv_irq_funcs -ffffffff82e44020 R xgpu_ai_virt_ops -ffffffff82e45000 r xgpu_nv_mailbox_ack_irq_funcs -ffffffff82e45010 r xgpu_nv_mailbox_rcv_irq_funcs -ffffffff82e45020 R xgpu_nv_virt_ops -ffffffff82e46000 r xgpu_fiji_mgcg_cgcg_init -ffffffff82e46240 r xgpu_fiji_golden_settings_a10 -ffffffff82e46370 r xgpu_fiji_golden_common_all -ffffffff82e463f0 r xgpu_tonga_mgcg_cgcg_init -ffffffff82e46810 r xgpu_tonga_golden_settings_a11 -ffffffff82e469d0 r xgpu_tonga_golden_common_all -ffffffff82e46a28 r xgpu_vi_mailbox_ack_irq_funcs -ffffffff82e46a38 r xgpu_vi_mailbox_rcv_irq_funcs -ffffffff82e46a48 R xgpu_vi_virt_ops -ffffffff82e47000 r navi10_ih_ip_funcs -ffffffff82e470a8 R navi10_ih_ip_block -ffffffff82e470c0 r navi10_ih_funcs -ffffffff82e470e0 r navi10_ih_self_irq_funcs -ffffffff82e48000 R nbio_v2_3_hdp_flush_reg -ffffffff82e48048 R nbio_v2_3_funcs -ffffffff82e49000 R nbio_v4_3_hdp_flush_reg -ffffffff82e49048 R nbio_v4_3_funcs -ffffffff82e49158 R nbio_v4_3_sriov_funcs -ffffffff82e49268 r nbio_v4_3_ras_err_event_athub_irq_funcs -ffffffff82e4a000 R nbio_v6_1_hdp_flush_reg -ffffffff82e4a048 R nbio_v6_1_funcs -ffffffff82e4b000 R nbio_v7_0_hdp_flush_reg -ffffffff82e4b048 R nbio_v7_0_funcs -ffffffff82e4c000 R nbio_v7_2_hdp_flush_reg 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+ffffffff82e2d680 r imu_rlc_ram_golden_11_0_2 +ffffffff82e2e000 r imu_rlc_ram_golden_11_0_3 +ffffffff82e2f000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82e2f140 r jpeg_v1_0_irq_funcs +ffffffff82e30000 r jpeg_v2_0_ip_funcs +ffffffff82e300a8 R jpeg_v2_0_ip_block +ffffffff82e300c0 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82e30200 r jpeg_v2_0_irq_funcs +ffffffff82e31000 r jpeg_v2_5_ip_funcs +ffffffff82e310a8 R jpeg_v2_5_ip_block +ffffffff82e310c0 r jpeg_v2_6_ip_funcs +ffffffff82e31168 R jpeg_v2_6_ip_block +ffffffff82e31180 R jpeg_v2_6_ras_hw_ops +ffffffff82e311c0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82e31300 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82e31440 r jpeg_v2_5_irq_funcs +ffffffff82e31450 r jpeg_v2_6_ras_irq_funcs +ffffffff82e32000 r jpeg_v3_0_ip_funcs +ffffffff82e320a8 R jpeg_v3_0_ip_block +ffffffff82e320c0 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82e32200 r jpeg_v3_0_irq_funcs +ffffffff82e33000 r jpeg_v4_0_ip_funcs +ffffffff82e330a8 R jpeg_v4_0_ip_block +ffffffff82e330c0 R jpeg_v4_0_ras_hw_ops +ffffffff82e33100 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82e33240 r jpeg_v4_0_irq_funcs +ffffffff82e33250 r jpeg_v4_0_ras_irq_funcs +ffffffff82e34000 r jpeg_v4_0_3_ip_funcs +ffffffff82e340a8 R jpeg_v4_0_3_ip_block +ffffffff82e340c0 r jpeg_v4_0_3_dec_ring_vm_funcs +ffffffff82e34200 r jpeg_v4_0_3_irq_funcs +ffffffff82e34210 r jpeg_v4_0_3_ras_hw_ops +ffffffff82e34250 r jpeg_v4_0_3_ue_reg_list +ffffffff82e35000 R lsdma_v6_0_funcs +ffffffff82e36000 r mca_v3_0_mp0_hw_ops +ffffffff82e36040 r mca_v3_0_mp1_hw_ops +ffffffff82e36080 r mca_v3_0_mpio_hw_ops +ffffffff82e37000 r mes_v10_1_ip_funcs +ffffffff82e370a8 R mes_v10_1_ip_block +ffffffff82e370c0 r mes_v10_1_funcs +ffffffff82e370f0 r mes_v10_1_ring_funcs +ffffffff82e38000 r mes_v11_0_ip_funcs +ffffffff82e380a8 R mes_v11_0_ip_block +ffffffff82e380c0 r mes_v11_0_funcs +ffffffff82e380f0 r mes_v11_0_ring_funcs +ffffffff82e39000 R mmhub_v1_0_funcs +ffffffff82e39050 r mmhub_v1_0_edc_cnt_regs +ffffffff82e390c0 r mmhub_v1_0_ras_fields +ffffffff82e3a000 R mmhub_v1_7_funcs +ffffffff82e3a050 r mmhub_v1_7_edc_cnt_regs +ffffffff82e3a250 r mmhub_v1_7_ras_fields +ffffffff82e3b9c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82e3c000 R mmhub_v1_8_funcs +ffffffff82e3c050 r mmhub_v1_8_ras_hw_ops +ffffffff82e3c090 r mmhub_v1_8_ce_reg_list +ffffffff82e3c180 r mmhub_v1_8_ras_memory_list +ffffffff82e3c2b0 r mmhub_v1_8_ue_reg_list +ffffffff82e3d000 R mmhub_v2_0_funcs +ffffffff82e3d050 r mmhub_v2_0_vmhub_funcs +ffffffff82e3d060 r mmhub_client_ids_navi1x +ffffffff82e3d190 r mmhub_client_ids_sienna_cichlid +ffffffff82e3d450 r mmhub_client_ids_beige_goby +ffffffff82e3e000 R mmhub_v2_3_funcs +ffffffff82e3e050 r mmhub_v2_3_vmhub_funcs +ffffffff82e3e060 r mmhub_client_ids_vangogh +ffffffff82e3f000 R mmhub_v3_0_funcs +ffffffff82e3f050 r mmhub_v3_0_vmhub_funcs +ffffffff82e3f060 r mmhub_client_ids_v3_0_0 +ffffffff82e40000 R mmhub_v3_0_1_funcs +ffffffff82e40050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82e40060 r mmhub_client_ids_v3_0_1 +ffffffff82e41000 R mmhub_v3_0_2_funcs +ffffffff82e41050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82e41060 r mmhub_client_ids_v3_0_2 +ffffffff82e42000 R mmhub_v9_4_ras_hw_ops +ffffffff82e42040 R mmhub_v9_4_funcs +ffffffff82e42090 r mmhub_v9_4_edc_cnt_regs +ffffffff82e42330 r mmhub_v9_4_ras_fields +ffffffff82e443b0 r mmhub_v9_4_err_status_regs +ffffffff82e45000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82e45010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82e45020 R xgpu_ai_virt_ops +ffffffff82e46000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82e46010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82e46020 R xgpu_nv_virt_ops +ffffffff82e47000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82e47240 r xgpu_fiji_golden_settings_a10 +ffffffff82e47370 r xgpu_fiji_golden_common_all +ffffffff82e473f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82e47810 r xgpu_tonga_golden_settings_a11 +ffffffff82e479d0 r xgpu_tonga_golden_common_all +ffffffff82e47a28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82e47a38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82e47a48 R xgpu_vi_virt_ops +ffffffff82e48000 r navi10_ih_ip_funcs +ffffffff82e480a8 R navi10_ih_ip_block +ffffffff82e480c0 r navi10_ih_funcs +ffffffff82e480e0 r navi10_ih_self_irq_funcs +ffffffff82e49000 R nbio_v2_3_hdp_flush_reg +ffffffff82e49048 R nbio_v2_3_funcs +ffffffff82e4a000 R nbio_v4_3_hdp_flush_reg +ffffffff82e4a048 R nbio_v4_3_funcs +ffffffff82e4a158 R nbio_v4_3_sriov_funcs +ffffffff82e4a268 r nbio_v4_3_ras_err_event_athub_irq_funcs +ffffffff82e4b000 R nbio_v6_1_hdp_flush_reg +ffffffff82e4b048 R nbio_v6_1_funcs +ffffffff82e4c000 R nbio_v7_0_hdp_flush_reg +ffffffff82e4c048 R nbio_v7_0_funcs +ffffffff82e4d000 R nbio_v7_2_hdp_flush_reg +ffffffff82e4d048 R nbio_v7_2_funcs +ffffffff82e4e000 R nbio_v7_4_hdp_flush_reg +ffffffff82e4e048 R nbio_v7_4_ras_hw_ops +ffffffff82e4e088 R nbio_v7_4_funcs +ffffffff82e4e198 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82e4e1a8 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82e4f000 R nbio_v7_7_hdp_flush_reg +ffffffff82e4f048 R nbio_v7_7_funcs +ffffffff82e50000 R nbio_v7_9_hdp_flush_reg +ffffffff82e50048 R nbio_v7_9_funcs +ffffffff82e50158 R nbio_v7_9_ras_hw_ops +ffffffff82e50198 r nbio_v7_9_ras_controller_irq_funcs +ffffffff82e501a8 r nbio_v7_9_ras_err_event_athub_irq_funcs +ffffffff82e51000 r nv_common_ip_funcs +ffffffff82e510a8 R nv_common_ip_block +ffffffff82e510c0 r nv_asic_funcs +ffffffff82e51180 r nv_allowed_read_registers +ffffffff82e51300 r sc_video_codecs_encode +ffffffff82e51310 r sc_video_codecs_decode_vcn1 +ffffffff82e51320 r sc_video_codecs_decode_vcn0 +ffffffff82e51330 r yc_video_codecs_decode +ffffffff82e51340 r bg_video_codecs_encode +ffffffff82e51350 r bg_video_codecs_decode +ffffffff82e51360 r nv_video_codecs_encode +ffffffff82e51370 r nv_video_codecs_decode +ffffffff82e51380 r sc_video_codecs_encode_array +ffffffff82e513b0 r sc_video_codecs_decode_array_vcn1 +ffffffff82e51440 r sc_video_codecs_decode_array_vcn0 +ffffffff82e514e0 r yc_video_codecs_decode_array +ffffffff82e51550 r bg_video_codecs_decode_array +ffffffff82e51590 r nv_video_codecs_encode_array +ffffffff82e515c0 r nv_video_codecs_decode_array +ffffffff82e52000 r psp_v10_0_funcs +ffffffff82e53000 r psp_v11_0_funcs +ffffffff82e54000 r psp_v11_0_8_funcs +ffffffff82e55000 r psp_v12_0_funcs +ffffffff82e56000 r psp_v13_0_funcs +ffffffff82e57000 r psp_v13_0_4_funcs +ffffffff82e58000 r psp_v3_1_funcs +ffffffff82e59000 r sdma_v2_4_ip_funcs +ffffffff82e590a8 R sdma_v2_4_ip_block +ffffffff82e590c0 r sdma_v2_4_ring_funcs +ffffffff82e59200 r sdma_v2_4_buffer_funcs +ffffffff82e59220 r sdma_v2_4_vm_pte_funcs +ffffffff82e59240 r sdma_v2_4_trap_irq_funcs +ffffffff82e59250 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82e59260 r iceland_mgcg_cgcg_init +ffffffff82e59280 r golden_settings_iceland_a11 +ffffffff82e5a000 r sdma_v3_0_ip_funcs +ffffffff82e5a0a8 R sdma_v3_0_ip_block +ffffffff82e5a0c0 R sdma_v3_1_ip_block +ffffffff82e5a0d8 r sdma_v3_0_ring_funcs +ffffffff82e5a218 r sdma_v3_0_buffer_funcs +ffffffff82e5a238 r sdma_v3_0_vm_pte_funcs +ffffffff82e5a258 r sdma_v3_0_trap_irq_funcs +ffffffff82e5a268 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82e5a280 r fiji_mgcg_cgcg_init +ffffffff82e5a2a0 r golden_settings_fiji_a10 +ffffffff82e5a300 r tonga_mgcg_cgcg_init +ffffffff82e5a320 r golden_settings_tonga_a11 +ffffffff82e5a3a0 r golden_settings_polaris11_a11 +ffffffff82e5a420 r golden_settings_polaris10_a11 +ffffffff82e5a4a0 r cz_mgcg_cgcg_init +ffffffff82e5a4c0 r cz_golden_settings_a11 +ffffffff82e5a550 r stoney_mgcg_cgcg_init +ffffffff82e5a560 r stoney_golden_settings_a11 +ffffffff82e5b000 R sdma_v4_0_ip_funcs +ffffffff82e5b0a8 R sdma_v4_0_ras_hw_ops +ffffffff82e5b0e8 R sdma_v4_0_ip_block +ffffffff82e5b100 r sdma_v4_0_ring_funcs +ffffffff82e5b240 r sdma_v4_0_page_ring_funcs +ffffffff82e5b380 r sdma_v4_0_buffer_funcs +ffffffff82e5b3a0 r sdma_v4_0_vm_pte_funcs +ffffffff82e5b3c0 r sdma_v4_0_trap_irq_funcs +ffffffff82e5b3d0 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82e5b3e0 r sdma_v4_0_ecc_irq_funcs +ffffffff82e5b3f0 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82e5b400 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82e5b410 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82e5b420 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82e5b430 r golden_settings_sdma_4 +ffffffff82e5b690 r golden_settings_sdma_vg10 +ffffffff82e5b740 r golden_settings_sdma_vg12 +ffffffff82e5b7f0 r golden_settings_sdma0_4_2_init +ffffffff82e5b810 r golden_settings_sdma0_4_2 +ffffffff82e5baa0 r golden_settings_sdma1_4_2 +ffffffff82e5bd30 r golden_settings_sdma_arct +ffffffff82e5c030 r golden_settings_sdma_aldebaran +ffffffff82e5c1a0 r golden_settings_sdma_4_1 +ffffffff82e5c2b0 r golden_settings_sdma_rv2 +ffffffff82e5c2e0 r golden_settings_sdma_rv1 +ffffffff82e5c310 r golden_settings_sdma_4_3 +ffffffff82e5c400 r sdma_v4_0_ras_fields +ffffffff82e5d000 R sdma_v4_4_ras_hw_ops +ffffffff82e5d040 r sdma_v4_4_ras_fields +ffffffff82e5e000 R sdma_v4_4_2_ip_funcs +ffffffff82e5e0a8 R sdma_v4_4_2_ip_block +ffffffff82e5e0c0 r sdma_v4_4_2_ring_funcs +ffffffff82e5e200 r sdma_v4_4_2_page_ring_funcs +ffffffff82e5e340 r sdma_v4_4_2_buffer_funcs +ffffffff82e5e360 r sdma_v4_4_2_vm_pte_funcs +ffffffff82e5e380 r sdma_v4_4_2_trap_irq_funcs +ffffffff82e5e390 r sdma_v4_4_2_illegal_inst_irq_funcs +ffffffff82e5e3a0 r sdma_v4_4_2_ecc_irq_funcs +ffffffff82e5e3b0 r sdma_v4_4_2_vm_hole_irq_funcs +ffffffff82e5e3c0 r sdma_v4_4_2_doorbell_invalid_irq_funcs +ffffffff82e5e3d0 r sdma_v4_4_2_pool_timeout_irq_funcs +ffffffff82e5e3e0 r sdma_v4_4_2_srbm_write_irq_funcs +ffffffff82e5e3f0 r sdma_v4_4_2_ras_hw_ops +ffffffff82e5e430 r sdma_v4_2_2_ue_reg_list +ffffffff82e5e460 r sdma_v4_4_2_ras_memory_list +ffffffff82e5f000 R sdma_v5_0_ip_funcs +ffffffff82e5f0a8 R sdma_v5_0_ip_block +ffffffff82e5f0c0 r sdma_v5_0_ring_funcs +ffffffff82e5f200 r sdma_v5_0_buffer_funcs +ffffffff82e5f220 r sdma_v5_0_vm_pte_funcs +ffffffff82e5f240 r sdma_v5_0_trap_irq_funcs +ffffffff82e5f250 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82e5f260 r golden_settings_sdma_5 +ffffffff82e5f4a0 r golden_settings_sdma_nv10 +ffffffff82e5f4d0 r golden_settings_sdma_nv14 +ffffffff82e5f500 r golden_settings_sdma_5_sriov +ffffffff82e5f6e0 r golden_settings_sdma_nv12 +ffffffff82e5f770 r golden_settings_sdma_cyan_skillfish +ffffffff82e60000 R sdma_v5_2_ip_funcs +ffffffff82e600a8 R sdma_v5_2_ip_block +ffffffff82e600c0 r sdma_v5_2_ring_funcs +ffffffff82e60200 r sdma_v5_2_buffer_funcs +ffffffff82e60220 r sdma_v5_2_vm_pte_funcs +ffffffff82e60240 r sdma_v5_2_trap_irq_funcs +ffffffff82e60250 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82e61000 R sdma_v6_0_ip_funcs +ffffffff82e610a8 R sdma_v6_0_ip_block +ffffffff82e610c0 r sdma_v6_0_ring_funcs +ffffffff82e61200 r sdma_v6_0_buffer_funcs +ffffffff82e61220 r sdma_v6_0_vm_pte_funcs +ffffffff82e61240 r sdma_v6_0_trap_irq_funcs +ffffffff82e61250 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82e62000 r smu_v11_0_i2c_algo +ffffffff82e62010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82e62028 r smu_v11_0_i2c_control_quirks +ffffffff82e63000 R smuio_v11_0_funcs +ffffffff82e64000 R smuio_v11_0_6_funcs +ffffffff82e65000 R smuio_v13_0_funcs +ffffffff82e66000 R smuio_v13_0_3_funcs +ffffffff82e67000 R smuio_v13_0_6_funcs +ffffffff82e68000 R smuio_v9_0_funcs +ffffffff82e69000 r soc15_common_ip_funcs +ffffffff82e690a8 R vega10_common_ip_block +ffffffff82e690c0 r soc15_asic_funcs +ffffffff82e69180 r vega20_asic_funcs +ffffffff82e69240 r aqua_vanjaram_asic_funcs +ffffffff82e69300 r soc15_allowed_read_registers +ffffffff82e69490 r vega_video_codecs_encode +ffffffff82e694a0 r vega_video_codecs_decode +ffffffff82e694b0 r rv_video_codecs_decode +ffffffff82e694c0 r rn_video_codecs_decode +ffffffff82e694d0 r vcn_4_0_3_video_codecs_encode +ffffffff82e694e0 r vcn_4_0_3_video_codecs_decode +ffffffff82e694f0 r vega_video_codecs_encode_array +ffffffff82e69520 r vega_video_codecs_decode_array +ffffffff82e695a0 r rv_video_codecs_decode_array +ffffffff82e69630 r rn_video_codecs_decode_array +ffffffff82e696c0 r vcn_4_0_3_video_codecs_decode_array +ffffffff82e6a000 r soc21_common_ip_funcs +ffffffff82e6a0a8 R soc21_common_ip_block +ffffffff82e6a0c0 r soc21_asic_funcs +ffffffff82e6a180 r soc21_allowed_read_registers +ffffffff82e6a300 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82e6a310 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82e6a320 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82e6a330 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82e6a340 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82e6a370 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82e6a3c0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82e6a400 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82e6b000 r tonga_ih_ip_funcs +ffffffff82e6b0a8 R tonga_ih_ip_block +ffffffff82e6b0c0 r tonga_ih_funcs +ffffffff82e6c000 R umc_v6_0_funcs +ffffffff82e6d000 R umc_v6_1_channel_idx_tbl +ffffffff82e6d080 R umc_v6_1_ras_hw_ops +ffffffff82e6e000 R umc_v6_7_channel_idx_tbl_second +ffffffff82e6e080 R umc_v6_7_channel_idx_tbl_first +ffffffff82e6e100 R umc_v6_7_ras_hw_ops +ffffffff82e6f000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82e6f040 R umc_v8_10_channel_idx_tbl_ext0 +ffffffff82e6f080 R umc_v8_10_channel_idx_tbl +ffffffff82e6f0e0 R umc_v8_10_ras_hw_ops +ffffffff82e70000 R umc_v8_7_channel_idx_tbl +ffffffff82e70040 R umc_v8_7_ras_hw_ops +ffffffff82e71000 r uvd_v5_0_ip_funcs +ffffffff82e710a8 R uvd_v5_0_ip_block +ffffffff82e710c0 r uvd_v5_0_ring_funcs +ffffffff82e71200 r uvd_v5_0_irq_funcs +ffffffff82e72000 r uvd_v6_0_ip_funcs +ffffffff82e720a8 R uvd_v6_0_ip_block +ffffffff82e720c0 R uvd_v6_2_ip_block +ffffffff82e720d8 R uvd_v6_3_ip_block +ffffffff82e720f0 r uvd_v6_0_ring_vm_funcs +ffffffff82e72230 r uvd_v6_0_ring_phys_funcs +ffffffff82e72370 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82e724b0 r uvd_v6_0_irq_funcs +ffffffff82e73000 R uvd_v7_0_ip_funcs +ffffffff82e730a8 R uvd_v7_0_ip_block +ffffffff82e730c0 r uvd_v7_0_ring_vm_funcs +ffffffff82e73200 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82e73340 r uvd_v7_0_irq_funcs +ffffffff82e74000 r vce_v3_0_ip_funcs +ffffffff82e740a8 R vce_v3_0_ip_block +ffffffff82e740c0 R vce_v3_1_ip_block +ffffffff82e740d8 R vce_v3_4_ip_block +ffffffff82e740f0 r vce_v3_0_ring_vm_funcs +ffffffff82e74230 r vce_v3_0_ring_phys_funcs +ffffffff82e74370 r vce_v3_0_irq_funcs +ffffffff82e75000 R vce_v4_0_ip_funcs +ffffffff82e750a8 R vce_v4_0_ip_block +ffffffff82e750c0 r vce_v4_0_ring_vm_funcs +ffffffff82e75200 r vce_v4_0_irq_funcs +ffffffff82e76000 r vcn_v1_0_ip_funcs +ffffffff82e760a8 R vcn_v1_0_ip_block +ffffffff82e760c0 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82e76200 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82e76340 r vcn_v1_0_irq_funcs +ffffffff82e77000 r vcn_v2_0_ip_funcs +ffffffff82e770a8 R vcn_v2_0_ip_block +ffffffff82e770c0 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82e77200 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82e77340 r vcn_v2_0_irq_funcs +ffffffff82e78000 r vcn_v2_5_ip_funcs +ffffffff82e780a8 R vcn_v2_5_ip_block +ffffffff82e780c0 r vcn_v2_6_ip_funcs +ffffffff82e78168 R vcn_v2_6_ip_block +ffffffff82e78180 R vcn_v2_6_ras_hw_ops +ffffffff82e781c0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82e78300 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82e78440 r vcn_v2_5_irq_funcs +ffffffff82e78450 r vcn_v2_6_ras_irq_funcs +ffffffff82e79000 r vcn_v3_0_ip_funcs +ffffffff82e790a8 R vcn_v3_0_ip_block +ffffffff82e790c0 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82e79200 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82e79340 r vcn_v3_0_irq_funcs +ffffffff82e7a000 r vcn_v4_0_ip_funcs +ffffffff82e7a0a8 R vcn_v4_0_ip_block +ffffffff82e7a0c0 R vcn_v4_0_ras_hw_ops +ffffffff82e7a100 r vcn_v4_0_irq_funcs +ffffffff82e7a110 r vcn_v4_0_ras_irq_funcs +ffffffff82e7b000 r vcn_v4_0_3_ip_funcs +ffffffff82e7b0a8 R vcn_v4_0_3_ip_block +ffffffff82e7b0c0 r vcn_v4_0_3_unified_ring_vm_funcs +ffffffff82e7b200 r vcn_v4_0_3_irq_funcs +ffffffff82e7b210 r vcn_v4_0_3_ras_hw_ops +ffffffff82e7b250 r vcn_v4_0_3_ue_reg_list +ffffffff82e7c000 R vega10_ih_ip_funcs +ffffffff82e7c0a8 R vega10_ih_ip_block +ffffffff82e7c0c0 r vega10_ih_funcs +ffffffff82e7c0e0 r vega10_ih_self_irq_funcs +ffffffff82e7d000 r GC_BASE +ffffffff82e7d064 r HDP_BASE +ffffffff82e7d0c8 r MMHUB_BASE +ffffffff82e7d12c r ATHUB_BASE +ffffffff82e7d190 r NBIO_BASE +ffffffff82e7d1f4 r MP0_BASE +ffffffff82e7d258 r MP1_BASE +ffffffff82e7d2bc r VCE_BASE +ffffffff82e7d320 r VCN_BASE +ffffffff82e7d384 r DF_BASE +ffffffff82e7d3e8 r DCE_BASE +ffffffff82e7d44c r OSSSYS_BASE +ffffffff82e7d4b0 r SDMA0_BASE +ffffffff82e7d514 r SDMA1_BASE +ffffffff82e7d578 r SMUIO_BASE +ffffffff82e7d5dc r PWR_BASE +ffffffff82e7d640 r NBIF_BASE +ffffffff82e7d6a4 r THM_BASE +ffffffff82e7d708 r CLK_BASE +ffffffff82e7e000 R vega20_ih_ip_funcs +ffffffff82e7e0a8 R vega20_ih_ip_block +ffffffff82e7e0c0 r vega20_ih_funcs +ffffffff82e7e0e0 r vega20_ih_self_irq_funcs +ffffffff82e7f000 r GC_BASE +ffffffff82e7f090 r HDP_BASE +ffffffff82e7f120 r MMHUB_BASE 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tonga_video_codecs_decode_array +ffffffff82e804b0 r polaris_video_codecs_encode_array +ffffffff82e804e0 r cz_video_codecs_decode_array +ffffffff82e80560 r iceland_mgcg_cgcg_init +ffffffff82e805a0 r fiji_mgcg_cgcg_init +ffffffff82e80600 r tonga_mgcg_cgcg_init +ffffffff82e80660 r cz_mgcg_cgcg_init +ffffffff82e806a0 r stoney_mgcg_cgcg_init +ffffffff82e81000 r amdgpu_dm_funcs +ffffffff82e810a8 R dm_ip_block +ffffffff82e810c0 R amdgpu_dm_encoder_helper_funcs +ffffffff82e81128 r dm_display_funcs +ffffffff82e81180 r hpd_disconnect_quirk_table +ffffffff82e81ef0 r amdgpu_dm_mode_funcs +ffffffff82e81f38 r amdgpu_dm_audio_component_bind_ops +ffffffff82e81f48 r amdgpu_dm_audio_component_ops +ffffffff82e81f80 r amdgpu_dm_encoder_funcs +ffffffff82e81fa0 r amdgpu_dm_connector_funcs +ffffffff82e82018 r amdgpu_dm_connector_helper_funcs +ffffffff82e82078 r amdgpu_dm_i2c_algo +ffffffff82e82088 r amdgpu_dm_backlight_ops +ffffffff82e82260 r add_fs_modes.common_rates +ffffffff82e83000 r amdgpu_dm_crtc_funcs +ffffffff82e830c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82e84000 r dm_dtn_log_begin.msg +ffffffff82e8400d r dm_dtn_log_end.msg +ffffffff82e84018 r SYNAPTICS_DEVICE_ID +ffffffff82e85000 r dm_crtc_irq_funcs +ffffffff82e85010 r dm_vline0_irq_funcs +ffffffff82e85020 r dm_dmub_outbox_irq_funcs +ffffffff82e85030 r dm_vupdate_irq_funcs +ffffffff82e85040 r dm_dmub_trace_irq_funcs +ffffffff82e85050 r dm_pageflip_irq_funcs +ffffffff82e85060 r dm_hpd_irq_funcs +ffffffff82e86000 r amdgpu_dm_encoder_funcs +ffffffff82e86020 r dm_mst_cbs +ffffffff82e86030 r dm_dp_mst_connector_funcs +ffffffff82e860a8 r dm_dp_mst_connector_helper_funcs +ffffffff82e87000 r dm_plane_funcs +ffffffff82e87068 r dm_plane_helper_funcs ffffffff82e89000 r vbios_funcs -ffffffff82e8e000 r command_table_helper_funcs +ffffffff82e8a000 r vbios_funcs ffffffff82e8f000 r command_table_helper_funcs ffffffff82e90000 r command_table_helper_funcs ffffffff82e91000 r command_table_helper_funcs -ffffffff82e92000 r dce80_max_clks_by_state -ffffffff82e92028 r disp_clk_regs -ffffffff82e9207c r disp_clk_shift -ffffffff82e92088 r disp_clk_mask -ffffffff82e93000 r dce110_max_clks_by_state +ffffffff82e92000 r command_table_helper_funcs +ffffffff82e93000 r dce80_max_clks_by_state ffffffff82e93028 r disp_clk_regs ffffffff82e9307c r disp_clk_shift ffffffff82e93088 r disp_clk_mask -ffffffff82e94000 r dce112_max_clks_by_state +ffffffff82e94000 r dce110_max_clks_by_state ffffffff82e94028 r disp_clk_regs ffffffff82e9407c r disp_clk_shift ffffffff82e94088 r disp_clk_mask -ffffffff82e95000 r dce120_max_clks_by_state -ffffffff82e96000 r clk_mgr_regs -ffffffff82e96054 r clk_mgr_shift -ffffffff82e96060 r clk_mgr_mask +ffffffff82e95000 r dce112_max_clks_by_state +ffffffff82e95028 r disp_clk_regs +ffffffff82e9507c r disp_clk_shift +ffffffff82e95088 r disp_clk_mask +ffffffff82e96000 r dce120_max_clks_by_state ffffffff82e97000 r clk_mgr_regs ffffffff82e97054 r clk_mgr_shift ffffffff82e97060 r clk_mgr_mask ffffffff82e98000 r clk_mgr_regs ffffffff82e98054 r clk_mgr_shift ffffffff82e98060 r clk_mgr_mask -ffffffff82e99000 r lpddr5_wm_table -ffffffff82e990c0 r ddr5_wm_table +ffffffff82e99000 r clk_mgr_regs +ffffffff82e99054 r clk_mgr_shift +ffffffff82e99060 r clk_mgr_mask ffffffff82e9a000 r lpddr5_wm_table ffffffff82e9a0c0 r ddr5_wm_table -ffffffff82e9b000 r ddr5_wm_table -ffffffff82e9c000 r lpddr5_wm_table -ffffffff82e9c0c0 r ddr4_wm_table -ffffffff82e9d000 r clk_mgr_regs_dcn321 -ffffffff82e9d054 r clk_mgr_shift_dcn321 -ffffffff82e9d060 r clk_mgr_mask_dcn321 -ffffffff82e9d084 r clk_mgr_regs_dcn32 -ffffffff82e9d0d8 r clk_mgr_shift_dcn32 -ffffffff82e9d0e4 r clk_mgr_mask_dcn32 -ffffffff82e9e000 r DC_BUILD_ID -ffffffff82ea0000 r output_csc_matrix -ffffffff82ea00e0 r black_color_format -ffffffff82ea3000 r dce_funcs -ffffffff82ea4000 r funcs -ffffffff82ea5000 R video_optimized_pixel_rates -ffffffff82ea51c0 r dce110_clk_src_funcs -ffffffff82ea51e8 r dce112_clk_src_funcs -ffffffff82ea5210 r dcn20_clk_src_funcs -ffffffff82ea5238 r dcn3_clk_src_funcs -ffffffff82ea5260 r dcn31_clk_src_funcs -ffffffff82ea6000 r dce_funcs -ffffffff82ea6068 r dcn10_funcs -ffffffff82ea60d0 r dcn20_funcs -ffffffff82ea6138 r dcn21_funcs -ffffffff82ea7000 r dce_ipp_funcs -ffffffff82ea8000 r dce110_lnk_enc_funcs -ffffffff82ea9000 r dce_mi_funcs -ffffffff82ea9090 r dce112_mi_funcs -ffffffff82ea9120 r dce120_mi_funcs -ffffffff82ea91b0 r pte_settings -ffffffff82eaa000 r funcs -ffffffff82eab000 r dce_link_panel_cntl_funcs -ffffffff82eac000 r filter_3tap_16p_upscale -ffffffff82eac040 r filter_3tap_16p_116 -ffffffff82eac080 r filter_3tap_16p_149 -ffffffff82eac0c0 r filter_3tap_16p_183 -ffffffff82eac100 r filter_3tap_64p_upscale -ffffffff82eac1d0 r filter_3tap_64p_116 -ffffffff82eac2a0 r filter_3tap_64p_149 -ffffffff82eac370 r filter_3tap_64p_183 -ffffffff82eac440 r filter_4tap_16p_upscale -ffffffff82eac490 r filter_4tap_16p_116 -ffffffff82eac4e0 r filter_4tap_16p_149 -ffffffff82eac530 r filter_4tap_16p_183 -ffffffff82eac580 r filter_4tap_64p_upscale -ffffffff82eac690 r filter_4tap_64p_116 -ffffffff82eac7a0 r filter_4tap_64p_149 -ffffffff82eac8b0 r filter_4tap_64p_183 -ffffffff82eac9c0 r filter_5tap_64p_upscale -ffffffff82eacb10 r filter_5tap_64p_116 -ffffffff82eacc60 r filter_5tap_64p_149 -ffffffff82eacdb0 r filter_5tap_64p_183 -ffffffff82eacf00 r filter_6tap_64p_upscale -ffffffff82ead090 r filter_6tap_64p_116 -ffffffff82ead220 r filter_6tap_64p_149 -ffffffff82ead3b0 r filter_6tap_64p_183 -ffffffff82ead540 r filter_7tap_64p_upscale -ffffffff82ead710 r filter_7tap_64p_116 -ffffffff82ead8e0 r filter_7tap_64p_149 -ffffffff82eadab0 r filter_7tap_64p_183 -ffffffff82eadc80 r filter_8tap_64p_upscale -ffffffff82eade90 r filter_8tap_64p_116 -ffffffff82eae0a0 r filter_8tap_64p_149 -ffffffff82eae2b0 r filter_8tap_64p_183 -ffffffff82eae4c0 r filter_2tap_16p -ffffffff82eae4f0 r filter_2tap_64p -ffffffff82eaf000 r dce110_str_enc_funcs -ffffffff82eaf120 r audio_clock_info_table_48bpc -ffffffff82eaf2b0 r audio_clock_info_table_36bpc -ffffffff82eaf440 r audio_clock_info_table -ffffffff82eb0000 r global_color_matrix -ffffffff82eb00a8 r dce_transform_funcs -ffffffff82eb1000 r abm_funcs -ffffffff82eb2000 r psr_funcs -ffffffff82eb2040 r DP_SINK_DEVICE_STR_ID_1 -ffffffff82eb2045 r DP_SINK_DEVICE_STR_ID_2 -ffffffff82eb3000 r replay_funcs -ffffffff82eb4000 r reg_offsets -ffffffff82eb5000 r bios_regs -ffffffff82eb5008 r res_cap -ffffffff82eb5048 r dce100_res_pool_funcs -ffffffff82eb5140 r clk_src_regs -ffffffff82eb523c r dmcu_regs -ffffffff82eb5298 r dmcu_shift -ffffffff82eb52ac r dmcu_mask -ffffffff82eb52f8 r abm_regs -ffffffff82eb5360 r abm_shift -ffffffff82eb5384 r abm_mask -ffffffff82eb5410 r debug_defaults -ffffffff82eb55c0 r dce100_tg_offsets -ffffffff82eb5608 r plane_cap -ffffffff82eb5638 r res_create_funcs -ffffffff82eb5670 r panel_cntl_regs -ffffffff82eb5690 r panel_cntl_shift -ffffffff82eb56a0 r panel_cntl_mask -ffffffff82eb56e0 r link_enc_regs -ffffffff82eb5aa0 r link_enc_aux_regs -ffffffff82eb5af0 r link_enc_hpd_regs -ffffffff82eb5b08 r link_enc_feature -ffffffff82eb5b18 r cs_shift -ffffffff82eb5b24 r cs_mask -ffffffff82eb5b50 r mi_regs -ffffffff82eb5e68 r mi_shifts -ffffffff82eb5eb0 r mi_masks -ffffffff82eb5fd0 r ipp_regs -ffffffff82eb61c8 r ipp_shift -ffffffff82eb61f0 r ipp_mask -ffffffff82eb6290 r xfm_regs -ffffffff82eb6830 r xfm_shift -ffffffff82eb6890 r xfm_mask -ffffffff82eb6a10 r opp_regs -ffffffff82eb6b60 r opp_shift -ffffffff82eb6b8c r opp_mask -ffffffff82eb6c40 r aux_engine_regs -ffffffff82eb6d30 r aux_mask -ffffffff82eb6d90 r aux_shift -ffffffff82eb6db0 r i2c_hw_regs -ffffffff82eb6f00 r i2c_shifts -ffffffff82eb6f2c r i2c_masks -ffffffff82eb6fd0 r audio_regs -ffffffff82eb7104 r audio_shift -ffffffff82eb711c r audio_mask -ffffffff82eb7160 r stream_enc_regs -ffffffff82eb780c r se_shift -ffffffff82eb7890 r se_mask -ffffffff82eb7a94 r hwseq_reg -ffffffff82eb7cb0 r hwseq_shift -ffffffff82eb7d30 r hwseq_mask -ffffffff82eb8000 r reg_offsets -ffffffff82eb8018 r dce110_compressor_funcs -ffffffff82eb9000 r dce110_funcs -ffffffff82eb92e8 r dce110_private_funcs -ffffffff82eba000 r dce110_mem_input_v_funcs -ffffffff82eba090 r dvmm_Hw_Setting_1DTiling -ffffffff82eba120 r dvmm_Hw_Setting_2DTiling -ffffffff82eba1b0 r dvmm_Hw_Setting_Linear -ffffffff82ebb000 r global_color_matrix -ffffffff82ebb0b0 r input_csc_matrix -ffffffff82ebc000 r funcs -ffffffff82ebd000 r bios_regs -ffffffff82ebd008 r dce110_res_pool_funcs -ffffffff82ebd100 r debug_defaults -ffffffff82ebd2b0 r clk_src_regs -ffffffff82ebd3ac r dmcu_regs -ffffffff82ebd408 r dmcu_shift -ffffffff82ebd41c r dmcu_mask -ffffffff82ebd468 r abm_regs -ffffffff82ebd4d0 r abm_shift -ffffffff82ebd4f4 r abm_mask -ffffffff82ebd580 r dce110_tg_offsets -ffffffff82ebd5c8 r res_create_funcs -ffffffff82ebd5f8 r plane_cap -ffffffff82ebd624 r underlay_plane_cap -ffffffff82ebd650 r stoney_resource_cap -ffffffff82ebd68c r carrizo_resource_cap -ffffffff82ebd6d0 r panel_cntl_regs -ffffffff82ebd6f0 r panel_cntl_shift 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hwseq_stoney_reg -ffffffff82ebf3e0 r hwseq_cz_reg -ffffffff82ebf5fc r hwseq_shift -ffffffff82ebf67c r hwseq_mask -ffffffff82ec0000 r dce110_tg_funcs -ffffffff82ec1000 r dce110_tg_v_funcs -ffffffff82ec2000 r dce110_xfmv_funcs -ffffffff82ec3000 r reg_offsets +ffffffff82e9b000 r lpddr5_wm_table +ffffffff82e9b0c0 r ddr5_wm_table +ffffffff82e9c000 r ddr5_wm_table +ffffffff82e9d000 r lpddr5_wm_table +ffffffff82e9d0c0 r ddr4_wm_table +ffffffff82e9e000 r clk_mgr_regs_dcn321 +ffffffff82e9e054 r clk_mgr_shift_dcn321 +ffffffff82e9e060 r clk_mgr_mask_dcn321 +ffffffff82e9e084 r clk_mgr_regs_dcn32 +ffffffff82e9e0d8 r clk_mgr_shift_dcn32 +ffffffff82e9e0e4 r clk_mgr_mask_dcn32 +ffffffff82e9f000 r DC_BUILD_ID +ffffffff82ea1000 r output_csc_matrix +ffffffff82ea10e0 r black_color_format +ffffffff82ea4000 r dce_funcs +ffffffff82ea5000 r funcs +ffffffff82ea6000 R video_optimized_pixel_rates +ffffffff82ea61c0 r dce110_clk_src_funcs +ffffffff82ea61e8 r dce112_clk_src_funcs +ffffffff82ea6210 r dcn20_clk_src_funcs +ffffffff82ea6238 r dcn3_clk_src_funcs +ffffffff82ea6260 r dcn31_clk_src_funcs +ffffffff82ea7000 r dce_funcs +ffffffff82ea7068 r dcn10_funcs +ffffffff82ea70d0 r dcn20_funcs +ffffffff82ea7138 r dcn21_funcs +ffffffff82ea8000 r dce_ipp_funcs +ffffffff82ea9000 r dce110_lnk_enc_funcs +ffffffff82eaa000 r dce_mi_funcs +ffffffff82eaa090 r dce112_mi_funcs +ffffffff82eaa120 r dce120_mi_funcs +ffffffff82eaa1b0 r pte_settings +ffffffff82eab000 r funcs +ffffffff82eac000 r dce_link_panel_cntl_funcs +ffffffff82ead000 r filter_3tap_16p_upscale +ffffffff82ead040 r filter_3tap_16p_116 +ffffffff82ead080 r filter_3tap_16p_149 +ffffffff82ead0c0 r filter_3tap_16p_183 +ffffffff82ead100 r filter_3tap_64p_upscale +ffffffff82ead1d0 r filter_3tap_64p_116 +ffffffff82ead2a0 r filter_3tap_64p_149 +ffffffff82ead370 r filter_3tap_64p_183 +ffffffff82ead440 r filter_4tap_16p_upscale +ffffffff82ead490 r filter_4tap_16p_116 +ffffffff82ead4e0 r filter_4tap_16p_149 +ffffffff82ead530 r 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abm_shift +ffffffff82f52974 r abm_mask +ffffffff82f52a00 r res_create_funcs +ffffffff82f52a30 r plane_cap +ffffffff82f52a60 r link_enc_regs +ffffffff82f530c0 r link_enc_aux_regs +ffffffff82f53110 r link_enc_hpd_regs +ffffffff82f53124 r le_shift +ffffffff82f53214 r le_mask +ffffffff82f535cc r link_enc_feature +ffffffff82f535dc r panel_config_defaults +ffffffff82f53630 r debug_defaults_drv +ffffffff82f537d8 r cs_shift +ffffffff82f537e4 r cs_mask +ffffffff82f5380c r hubbub_reg +ffffffff82f53994 r hubbub_shift +ffffffff82f53a24 r hubbub_mask +ffffffff82f53c60 r vmid_regs +ffffffff82f53e20 r vmid_shifts +ffffffff82f53e28 r vmid_masks +ffffffff82f53e50 r hubp_regs +ffffffff82f54680 r hubp_shift +ffffffff82f5477c r hubp_mask +ffffffff82f54b70 r dpp_regs +ffffffff82f56080 r tf_shift +ffffffff82f56354 r tf_mask +ffffffff82f56ea0 r opp_regs +ffffffff82f57000 r opp_shift +ffffffff82f57038 r opp_mask +ffffffff82f57110 r optc_regs +ffffffff82f576b0 r optc_shift +ffffffff82f57784 r optc_mask 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hpo_dp_se_shift +ffffffff82f5ce18 r hpo_dp_se_mask +ffffffff82f5cec0 r apg_regs +ffffffff82f5cf00 r apg_shift +ffffffff82f5cf08 r apg_mask +ffffffff82f5cf20 r hpo_dp_link_enc_regs +ffffffff82f5d030 r hpo_dp_le_shift +ffffffff82f5d04c r hpo_dp_le_mask +ffffffff82f5d0b0 r hwseq_reg +ffffffff82f5d2cc r hwseq_shift +ffffffff82f5d34c r hwseq_mask +ffffffff82f5e000 r dccg314_funcs +ffffffff82f5f000 r dcn314_str_enc_funcs +ffffffff82f60000 r dcn314_funcs +ffffffff82f602e8 r dcn314_private_funcs +ffffffff82f61000 r bios_regs +ffffffff82f61008 r res_cap_dcn314 +ffffffff82f61048 r debug_defaults_diags +ffffffff82f611f0 r clk_src_regs +ffffffff82f61394 r dccg_regs +ffffffff82f61484 r dccg_shift +ffffffff82f61524 r dccg_mask +ffffffff82f617a0 r abm_regs +ffffffff82f61940 r abm_shift +ffffffff82f61964 r abm_mask +ffffffff82f619f0 r res_create_funcs +ffffffff82f61a20 r plane_cap +ffffffff82f61a50 r link_enc_regs +ffffffff82f620b0 r link_enc_aux_regs +ffffffff82f62100 r link_enc_hpd_regs +ffffffff82f62114 r le_shift +ffffffff82f62204 r le_mask +ffffffff82f625bc r link_enc_feature +ffffffff82f625cc r panel_config_defaults +ffffffff82f62620 r debug_defaults_drv +ffffffff82f627c8 r cs_shift +ffffffff82f627d4 r cs_mask +ffffffff82f627fc r hubbub_reg +ffffffff82f62984 r hubbub_shift +ffffffff82f62a14 r hubbub_mask +ffffffff82f62c50 r vmid_regs +ffffffff82f62e10 r vmid_shifts +ffffffff82f62e18 r vmid_masks +ffffffff82f62e40 r hubp_regs +ffffffff82f63670 r hubp_shift +ffffffff82f6376c r hubp_mask +ffffffff82f63b60 r dpp_regs +ffffffff82f65070 r tf_shift +ffffffff82f65344 r tf_mask +ffffffff82f65e90 r opp_regs +ffffffff82f65ff0 r opp_shift +ffffffff82f66028 r opp_mask +ffffffff82f66100 r optc_regs +ffffffff82f666a0 r optc_shift +ffffffff82f66774 r optc_mask +ffffffff82f66abc r mpc_regs +ffffffff82f682a8 r mpc_shift +ffffffff82f68384 r mpc_mask +ffffffff82f686f0 r dsc_regs +ffffffff82f68a00 r dsc_shift +ffffffff82f68ab8 r dsc_mask +ffffffff82f68d90 r dwbc30_regs +ffffffff82f68f6c r dwbc30_shift +ffffffff82f690a0 r dwbc30_mask +ffffffff82f69570 r mcif_wb30_regs +ffffffff82f6966c r mcif_wb30_shift +ffffffff82f69718 r mcif_wb30_mask +ffffffff82f699d0 r aux_engine_regs +ffffffff82f69a98 r aux_mask +ffffffff82f69af8 r aux_shift +ffffffff82f69b10 r i2c_hw_regs +ffffffff82f69c28 r i2c_shifts +ffffffff82f69c54 r i2c_masks +ffffffff82f69d00 r audio_regs +ffffffff82f69e34 r audio_shift +ffffffff82f69e4c r audio_mask +ffffffff82f69e90 r stream_enc_regs +ffffffff82f6a534 r se_shift +ffffffff82f6a610 r se_mask +ffffffff82f6a980 r vpg_regs +ffffffff82f6aa70 r vpg_shift +ffffffff82f6aa98 r vpg_mask +ffffffff82f6ab40 r afmt_regs +ffffffff82f6ac18 r afmt_shift +ffffffff82f6ac2c r afmt_mask +ffffffff82f6ac80 r hpo_dp_stream_enc_regs +ffffffff82f6aeb0 r hpo_dp_se_shift +ffffffff82f6aed8 r hpo_dp_se_mask +ffffffff82f6af80 r apg_regs +ffffffff82f6afc0 r apg_shift +ffffffff82f6afc8 r apg_mask +ffffffff82f6afe0 r hpo_dp_link_enc_regs +ffffffff82f6b0f0 r hpo_dp_le_shift +ffffffff82f6b10c r hpo_dp_le_mask +ffffffff82f6b170 r hwseq_reg +ffffffff82f6b38c r hwseq_shift +ffffffff82f6b40c r hwseq_mask +ffffffff82f6c000 r bios_regs +ffffffff82f6c008 r res_cap_dcn31 +ffffffff82f6c050 r clk_src_regs +ffffffff82f6c1f4 r dccg_regs +ffffffff82f6c2e4 r dccg_shift +ffffffff82f6c384 r dccg_mask +ffffffff82f6c600 r abm_regs +ffffffff82f6c7a0 r abm_shift +ffffffff82f6c7c4 r abm_mask +ffffffff82f6c850 r res_create_funcs +ffffffff82f6c880 r plane_cap +ffffffff82f6c8b0 r link_enc_regs +ffffffff82f6cf10 r link_enc_aux_regs +ffffffff82f6cf60 r link_enc_hpd_regs +ffffffff82f6cf74 r le_shift +ffffffff82f6d064 r le_mask +ffffffff82f6d41c r link_enc_feature +ffffffff82f6d42c r panel_config_defaults +ffffffff82f6d480 r debug_defaults_drv +ffffffff82f6d628 r cs_shift +ffffffff82f6d634 r cs_mask +ffffffff82f6d65c r hubbub_reg +ffffffff82f6d7e4 r hubbub_shift +ffffffff82f6d874 r hubbub_mask +ffffffff82f6dab0 r vmid_regs +ffffffff82f6dc70 r vmid_shifts +ffffffff82f6dc78 r vmid_masks +ffffffff82f6dca0 r hubp_regs +ffffffff82f6e4d0 r hubp_shift +ffffffff82f6e5cc r hubp_mask +ffffffff82f6e9c0 r dpp_regs +ffffffff82f6fed0 r tf_shift +ffffffff82f701a4 r tf_mask +ffffffff82f70cf0 r opp_regs +ffffffff82f70e50 r opp_shift +ffffffff82f70e88 r opp_mask +ffffffff82f70f60 r optc_regs +ffffffff82f71500 r optc_shift +ffffffff82f715d4 r optc_mask +ffffffff82f7191c r mpc_regs +ffffffff82f73108 r mpc_shift +ffffffff82f731e4 r mpc_mask +ffffffff82f73550 r dsc_regs +ffffffff82f7379c r dsc_shift +ffffffff82f73854 r dsc_mask +ffffffff82f73b30 r dwbc30_regs +ffffffff82f73d0c r dwbc30_shift +ffffffff82f73e40 r dwbc30_mask +ffffffff82f74310 r mcif_wb30_regs +ffffffff82f7440c r mcif_wb30_shift +ffffffff82f744b8 r mcif_wb30_mask +ffffffff82f74770 r aux_engine_regs +ffffffff82f74838 r aux_mask +ffffffff82f74898 r aux_shift +ffffffff82f748b0 r i2c_hw_regs +ffffffff82f749c8 r i2c_shifts +ffffffff82f749f4 r i2c_masks +ffffffff82f74aa0 r audio_regs +ffffffff82f74bd4 r audio_shift +ffffffff82f74bec r audio_mask +ffffffff82f74c30 r stream_enc_regs +ffffffff82f752d4 r se_shift +ffffffff82f753b0 r se_mask +ffffffff82f75720 r vpg_regs +ffffffff82f75810 r vpg_shift +ffffffff82f75838 r vpg_mask +ffffffff82f758e0 r afmt_regs +ffffffff82f759b8 r afmt_shift +ffffffff82f759cc r afmt_mask +ffffffff82f75a20 r hpo_dp_stream_enc_regs +ffffffff82f75c50 r hpo_dp_se_shift +ffffffff82f75c78 r hpo_dp_se_mask +ffffffff82f75d20 r apg_regs +ffffffff82f75d60 r apg_shift +ffffffff82f75d68 r apg_mask +ffffffff82f75d80 r hpo_dp_link_enc_regs +ffffffff82f75e90 r hpo_dp_le_shift +ffffffff82f75eac r hpo_dp_le_mask +ffffffff82f75f10 r hwseq_reg +ffffffff82f7612c r hwseq_shift +ffffffff82f761ac r hwseq_mask +ffffffff82f77000 r bios_regs +ffffffff82f77008 r res_cap_dcn31 +ffffffff82f77050 r clk_src_regs +ffffffff82f771f4 r dccg_regs +ffffffff82f772e4 r dccg_shift +ffffffff82f77384 r dccg_mask +ffffffff82f77600 r abm_regs +ffffffff82f777a0 r abm_shift +ffffffff82f777c4 r abm_mask +ffffffff82f77850 r res_create_funcs +ffffffff82f77880 r plane_cap +ffffffff82f778b0 r link_enc_regs +ffffffff82f77f10 r link_enc_aux_regs +ffffffff82f77f60 r link_enc_hpd_regs +ffffffff82f77f74 r le_shift +ffffffff82f78064 r le_mask +ffffffff82f7841c r link_enc_feature +ffffffff82f7842c r panel_config_defaults +ffffffff82f78480 r debug_defaults_drv +ffffffff82f78628 r cs_shift +ffffffff82f78634 r cs_mask +ffffffff82f7865c r hubbub_reg +ffffffff82f787e4 r hubbub_shift +ffffffff82f78874 r hubbub_mask +ffffffff82f78ab0 r vmid_regs +ffffffff82f78c70 r vmid_shifts +ffffffff82f78c78 r vmid_masks +ffffffff82f78ca0 r hubp_regs +ffffffff82f794d0 r hubp_shift +ffffffff82f795cc r hubp_mask +ffffffff82f799c0 r dpp_regs +ffffffff82f7aed0 r tf_shift +ffffffff82f7b1a4 r tf_mask +ffffffff82f7bcf0 r opp_regs +ffffffff82f7be50 r opp_shift +ffffffff82f7be88 r opp_mask +ffffffff82f7bf60 r optc_regs +ffffffff82f7c500 r optc_shift +ffffffff82f7c5d4 r optc_mask +ffffffff82f7c91c r mpc_regs +ffffffff82f7e108 r mpc_shift +ffffffff82f7e1e4 r mpc_mask +ffffffff82f7e550 r dsc_regs +ffffffff82f7e79c r dsc_shift +ffffffff82f7e854 r dsc_mask +ffffffff82f7eb30 r dwbc30_regs +ffffffff82f7ed0c r dwbc30_shift +ffffffff82f7ee40 r dwbc30_mask +ffffffff82f7f310 r mcif_wb30_regs +ffffffff82f7f40c r mcif_wb30_shift +ffffffff82f7f4b8 r mcif_wb30_mask +ffffffff82f7f770 r aux_engine_regs +ffffffff82f7f838 r aux_mask +ffffffff82f7f898 r aux_shift +ffffffff82f7f8b0 r i2c_hw_regs +ffffffff82f7f9c8 r i2c_shifts +ffffffff82f7f9f4 r i2c_masks +ffffffff82f7faa0 r audio_regs +ffffffff82f7fbd4 r audio_shift +ffffffff82f7fbec r audio_mask +ffffffff82f7fc30 r stream_enc_regs +ffffffff82f802d4 r se_shift +ffffffff82f803b0 r se_mask +ffffffff82f80720 r vpg_regs +ffffffff82f80810 r vpg_shift +ffffffff82f80838 r vpg_mask +ffffffff82f808e0 r afmt_regs +ffffffff82f809b8 r afmt_shift +ffffffff82f809cc r afmt_mask +ffffffff82f80a20 r hpo_dp_stream_enc_regs +ffffffff82f80c50 r hpo_dp_se_shift +ffffffff82f80c78 r hpo_dp_se_mask +ffffffff82f80d20 r apg_regs +ffffffff82f80d60 r apg_shift +ffffffff82f80d68 r apg_mask +ffffffff82f80d80 r hpo_dp_link_enc_regs +ffffffff82f80e90 r hpo_dp_le_shift +ffffffff82f80eac r hpo_dp_le_mask +ffffffff82f80f10 r hwseq_reg +ffffffff82f8112c r hwseq_shift +ffffffff82f811ac r hwseq_mask +ffffffff82f82000 r dccg32_funcs +ffffffff82f83000 r dcn32_link_enc_funcs +ffffffff82f84000 r dcn32_str_enc_funcs +ffffffff82f85000 r hubbub32_funcs +ffffffff82f86000 r dcn32_funcs +ffffffff82f862e8 r dcn32_private_funcs +ffffffff82f87000 r dcn32_mmhubbub_funcs +ffffffff82f88000 r dcn32_mpc_funcs +ffffffff82f89000 r res_cap_dcn32 +ffffffff82f8903c r dccg_shift +ffffffff82f890dc r dccg_mask +ffffffff82f89350 r abm_shift +ffffffff82f89374 r abm_mask +ffffffff82f89400 r res_create_funcs +ffffffff82f89430 r plane_cap +ffffffff82f8945c r le_shift +ffffffff82f8954c r le_mask +ffffffff82f89904 r link_enc_feature +ffffffff82f89918 r debug_defaults_drv +ffffffff82f89ac0 r cs_shift +ffffffff82f89acc r cs_mask +ffffffff82f89af4 r hubbub_shift +ffffffff82f89b84 r hubbub_mask +ffffffff82f89dbc r vmid_shifts +ffffffff82f89dc4 r vmid_masks +ffffffff82f89de4 r hubp_shift +ffffffff82f89ee0 r hubp_mask +ffffffff82f8a2d0 r tf_shift +ffffffff82f8a5a4 r tf_mask +ffffffff82f8b0e8 r opp_shift +ffffffff82f8b120 r opp_mask +ffffffff82f8b1f4 r optc_shift +ffffffff82f8b2c8 r optc_mask +ffffffff82f8b610 r mpc_shift +ffffffff82f8b6ec r mpc_mask +ffffffff82f8ba58 r dsc_shift +ffffffff82f8bb10 r dsc_mask +ffffffff82f8bde8 r dwbc30_shift +ffffffff82f8bf1c r dwbc30_mask +ffffffff82f8c3e4 r mcif_wb30_shift +ffffffff82f8c490 r mcif_wb30_mask +ffffffff82f8c73c r aux_mask +ffffffff82f8c79c r aux_shift +ffffffff82f8c7b4 r i2c_shifts +ffffffff82f8c7e0 r i2c_masks +ffffffff82f8c884 r audio_shift +ffffffff82f8c89c r audio_mask +ffffffff82f8c8d8 r se_shift +ffffffff82f8c9b4 r se_mask +ffffffff82f8cd20 r vpg_shift +ffffffff82f8cd48 r vpg_mask +ffffffff82f8cddc r afmt_shift +ffffffff82f8cdf0 r afmt_mask +ffffffff82f8ce34 r hpo_dp_se_shift +ffffffff82f8ce5c r hpo_dp_se_mask +ffffffff82f8cefc r apg_shift +ffffffff82f8cf04 r apg_mask +ffffffff82f8cf1c r hpo_dp_le_shift +ffffffff82f8cf38 r hpo_dp_le_mask +ffffffff82f8cf9c r hwseq_shift +ffffffff82f8d01c r hwseq_mask +ffffffff82f8e000 r dcn321_link_enc_funcs +ffffffff82f8f000 r res_cap_dcn321 +ffffffff82f8f03c r dccg_shift +ffffffff82f8f0dc r dccg_mask +ffffffff82f8f350 r abm_shift +ffffffff82f8f374 r abm_mask +ffffffff82f8f400 r res_create_funcs +ffffffff82f8f430 r plane_cap +ffffffff82f8f45c r le_shift +ffffffff82f8f54c r le_mask +ffffffff82f8f904 r link_enc_feature +ffffffff82f8f918 r debug_defaults_drv +ffffffff82f8fac0 r cs_shift +ffffffff82f8facc r cs_mask +ffffffff82f8faf4 r hubbub_shift +ffffffff82f8fb84 r hubbub_mask +ffffffff82f8fdbc r vmid_shifts +ffffffff82f8fdc4 r vmid_masks +ffffffff82f8fde4 r hubp_shift +ffffffff82f8fee0 r hubp_mask +ffffffff82f902d0 r tf_shift +ffffffff82f905a4 r tf_mask +ffffffff82f910e8 r opp_shift +ffffffff82f91120 r opp_mask +ffffffff82f911f4 r optc_shift +ffffffff82f912c8 r optc_mask +ffffffff82f91610 r mpc_shift +ffffffff82f916ec r mpc_mask +ffffffff82f91a58 r dsc_shift +ffffffff82f91b10 r dsc_mask +ffffffff82f91de8 r dwbc30_shift +ffffffff82f91f1c r dwbc30_mask +ffffffff82f923e4 r mcif_wb30_shift +ffffffff82f92490 r mcif_wb30_mask +ffffffff82f9273c r aux_mask +ffffffff82f9279c r aux_shift +ffffffff82f927b4 r i2c_shifts +ffffffff82f927e0 r i2c_masks +ffffffff82f92884 r audio_shift +ffffffff82f9289c r audio_mask +ffffffff82f928d8 r se_shift +ffffffff82f929b4 r se_mask +ffffffff82f92d20 r vpg_shift +ffffffff82f92d48 r vpg_mask +ffffffff82f92ddc r afmt_shift +ffffffff82f92df0 r afmt_mask +ffffffff82f92e34 r hpo_dp_se_shift +ffffffff82f92e5c r hpo_dp_se_mask +ffffffff82f92efc r apg_shift +ffffffff82f92f04 r apg_mask +ffffffff82f92f1c r hpo_dp_le_shift +ffffffff82f92f38 r hpo_dp_le_mask +ffffffff82f92f9c r hwseq_shift +ffffffff82f9301c r hwseq_mask +ffffffff82f95000 R dcn10_soc_defaults +ffffffff82f9508c R dcn10_ip_defaults +ffffffff82fa1000 r dml20_funcs +ffffffff82fa1030 r dml20v2_funcs +ffffffff82fa1060 r dml21_funcs +ffffffff82fa1090 r dml30_funcs +ffffffff82fa10c0 r dml31_funcs +ffffffff82fa10f0 r dml314_funcs +ffffffff82fa1120 r dml32_funcs +ffffffff82fa4000 r qp_table_444_8bpc_max +ffffffff82fa4940 r qp_table_444_8bpc_min +ffffffff82fa5280 r qp_table_444_10bpc_max +ffffffff82fa5ec0 r qp_table_444_10bpc_min +ffffffff82fa6b00 r qp_table_444_12bpc_max +ffffffff82fa7a40 r qp_table_444_12bpc_min +ffffffff82fa8980 r qp_table_422_8bpc_max +ffffffff82fa8ec0 r qp_table_422_8bpc_min +ffffffff82fa9400 r qp_table_422_10bpc_max +ffffffff82fa9b40 r qp_table_422_10bpc_min +ffffffff82faa280 r qp_table_422_12bpc_max +ffffffff82faabc0 r qp_table_422_12bpc_min +ffffffff82fab500 r qp_table_420_8bpc_max +ffffffff82fab940 r qp_table_420_8bpc_min +ffffffff82fabd80 r qp_table_420_10bpc_max +ffffffff82fac340 r qp_table_420_10bpc_min +ffffffff82fac900 r qp_table_420_12bpc_max +ffffffff82fad040 r qp_table_420_12bpc_min ffffffff82faf000 r funcs +ffffffff82faf050 r hpd_regs +ffffffff82faf1a0 r hpd_shift +ffffffff82faf1b0 r hpd_mask +ffffffff82faf1c0 r ddc_data_regs +ffffffff82faf3a0 r ddc_clk_regs +ffffffff82faf580 r ddc_shift +ffffffff82faf5a8 r ddc_mask ffffffff82fb0000 r funcs -ffffffff82fb0050 r hpd_regs -ffffffff82fb01a0 r hpd_shift -ffffffff82fb01b0 r hpd_mask -ffffffff82fb01c0 r ddc_data_regs -ffffffff82fb03a0 r ddc_clk_regs -ffffffff82fb0580 r ddc_shift -ffffffff82fb05a8 r ddc_mask ffffffff82fb1000 r funcs +ffffffff82fb1050 r hpd_regs +ffffffff82fb11a0 r hpd_shift +ffffffff82fb11b0 r hpd_mask +ffffffff82fb11c0 r ddc_data_regs +ffffffff82fb13a0 r ddc_clk_regs +ffffffff82fb1580 r ddc_shift +ffffffff82fb15a8 r ddc_mask ffffffff82fb2000 r funcs -ffffffff82fb2050 r hpd_regs -ffffffff82fb21a0 r hpd_shift -ffffffff82fb21b0 r hpd_mask -ffffffff82fb21c0 r ddc_data_regs -ffffffff82fb23a0 r ddc_clk_regs -ffffffff82fb2580 r ddc_shift -ffffffff82fb25a8 r ddc_mask ffffffff82fb3000 r funcs +ffffffff82fb3050 r hpd_regs +ffffffff82fb31a0 r hpd_shift +ffffffff82fb31b0 r hpd_mask +ffffffff82fb31c0 r ddc_data_regs +ffffffff82fb33a0 r ddc_clk_regs +ffffffff82fb3580 r ddc_shift +ffffffff82fb35a8 r ddc_mask ffffffff82fb4000 r funcs -ffffffff82fb4050 r hpd_regs -ffffffff82fb41a0 r hpd_shift -ffffffff82fb41b0 r hpd_mask -ffffffff82fb41c0 r ddc_data_regs -ffffffff82fb43a0 r ddc_clk_regs -ffffffff82fb4580 r ddc_shift -ffffffff82fb45a8 r ddc_mask -ffffffff82fb45d0 r generic_regs -ffffffff82fb4640 r generic_shift -ffffffff82fb4650 r generic_mask ffffffff82fb5000 r funcs +ffffffff82fb5050 r hpd_regs +ffffffff82fb51a0 r hpd_shift +ffffffff82fb51b0 r hpd_mask +ffffffff82fb51c0 r ddc_data_regs +ffffffff82fb53a0 r ddc_clk_regs +ffffffff82fb5580 r ddc_shift +ffffffff82fb55a8 r ddc_mask +ffffffff82fb55d0 r generic_regs +ffffffff82fb5640 r generic_shift +ffffffff82fb5650 r generic_mask ffffffff82fb6000 r funcs -ffffffff82fb6050 r hpd_regs -ffffffff82fb61a0 r hpd_shift -ffffffff82fb61b0 r hpd_mask -ffffffff82fb61c0 r ddc_data_regs_dcn -ffffffff82fb6370 r ddc_clk_regs_dcn -ffffffff82fb6520 r ddc_shift -ffffffff82fb6640 r ddc_mask -ffffffff82fb6760 r generic_regs -ffffffff82fb67d0 r generic_shift -ffffffff82fb67e0 r generic_mask ffffffff82fb7000 r funcs +ffffffff82fb7050 r hpd_regs +ffffffff82fb71a0 r hpd_shift +ffffffff82fb71b0 r hpd_mask +ffffffff82fb71c0 r ddc_data_regs_dcn +ffffffff82fb7370 r ddc_clk_regs_dcn +ffffffff82fb7520 r ddc_shift +ffffffff82fb7640 r ddc_mask +ffffffff82fb7760 r generic_regs +ffffffff82fb77d0 r generic_shift +ffffffff82fb77e0 r generic_mask ffffffff82fb8000 r funcs -ffffffff82fb8050 r hpd_regs -ffffffff82fb8168 r hpd_shift -ffffffff82fb8178 r hpd_mask -ffffffff82fb8190 r ddc_data_regs_dcn -ffffffff82fb82c0 r ddc_clk_regs_dcn -ffffffff82fb83f0 r ddc_shift -ffffffff82fb84e0 r ddc_mask -ffffffff82fb85d0 r generic_regs -ffffffff82fb8604 r generic_shift -ffffffff82fb860c r generic_mask ffffffff82fb9000 r funcs +ffffffff82fb9050 r hpd_regs +ffffffff82fb9168 r hpd_shift +ffffffff82fb9178 r hpd_mask +ffffffff82fb9190 r ddc_data_regs_dcn +ffffffff82fb92c0 r ddc_clk_regs_dcn +ffffffff82fb93f0 r ddc_shift +ffffffff82fb94e0 r ddc_mask +ffffffff82fb95d0 r generic_regs +ffffffff82fb9604 r generic_shift +ffffffff82fb960c r generic_mask ffffffff82fba000 r funcs -ffffffff82fba050 r hpd_regs -ffffffff82fba1a0 r hpd_shift -ffffffff82fba1b0 r hpd_mask -ffffffff82fba1c0 r ddc_data_regs_dcn -ffffffff82fba370 r ddc_clk_regs_dcn -ffffffff82fba520 r ddc_shift -ffffffff82fba640 r ddc_mask -ffffffff82fba760 r generic_regs -ffffffff82fba7d0 r generic_shift -ffffffff82fba7e0 r generic_mask ffffffff82fbb000 r funcs +ffffffff82fbb050 r hpd_regs +ffffffff82fbb1a0 r hpd_shift +ffffffff82fbb1b0 r hpd_mask +ffffffff82fbb1c0 r ddc_data_regs_dcn +ffffffff82fbb370 r ddc_clk_regs_dcn +ffffffff82fbb520 r ddc_shift +ffffffff82fbb640 r ddc_mask +ffffffff82fbb760 r generic_regs +ffffffff82fbb7d0 r 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-ffffffff82fbe730 r generic_regs -ffffffff82fbe7a0 r generic_shift -ffffffff82fbe7b0 r generic_mask ffffffff82fbf000 r funcs +ffffffff82fbf050 r hpd_regs +ffffffff82fbf168 r hpd_shift +ffffffff82fbf178 r hpd_mask +ffffffff82fbf190 r ddc_data_regs_dcn +ffffffff82fbf340 r ddc_clk_regs_dcn +ffffffff82fbf4f0 r ddc_shift +ffffffff82fbf610 r ddc_mask +ffffffff82fbf730 r generic_regs +ffffffff82fbf7a0 r generic_shift +ffffffff82fbf7b0 r generic_mask ffffffff82fc0000 r funcs ffffffff82fc1000 r funcs ffffffff82fc2000 r funcs -ffffffff82fc3000 r hdmi_14_protection -ffffffff82fc3010 r dp_11_protection -ffffffff82fc3020 r hdcp_i2c_offsets -ffffffff82fc3050 r hdcp_dpcd_addrs -ffffffff82fc4000 r irq_service_funcs_dce110 -ffffffff82fc4008 r dummy_irq_info_funcs -ffffffff82fc4018 r hpd_irq_info_funcs -ffffffff82fc4028 r hpd_rx_irq_info_funcs -ffffffff82fc4038 r pflip_irq_info_funcs -ffffffff82fc4048 r vupdate_irq_info_funcs -ffffffff82fc4058 r vblank_irq_info_funcs -ffffffff82fc4070 r irq_source_info_dce110 -ffffffff82fc6000 r irq_service_funcs_dce120 -ffffffff82fc6008 r dummy_irq_info_funcs -ffffffff82fc6018 r hpd_irq_info_funcs -ffffffff82fc6028 r hpd_rx_irq_info_funcs -ffffffff82fc6038 r pflip_irq_info_funcs -ffffffff82fc6048 r vupdate_irq_info_funcs -ffffffff82fc6058 r vblank_irq_info_funcs -ffffffff82fc6070 r irq_source_info_dce120 -ffffffff82fc8000 r irq_service_funcs_dce80 -ffffffff82fc8008 r dummy_irq_info_funcs -ffffffff82fc8018 r hpd_irq_info_funcs -ffffffff82fc8028 r hpd_rx_irq_info_funcs -ffffffff82fc8038 r pflip_irq_info_funcs -ffffffff82fc8048 r vupdate_irq_info_funcs -ffffffff82fc8058 r vblank_irq_info_funcs -ffffffff82fc8070 r irq_source_info_dce80 -ffffffff82fca000 r irq_service_funcs_dcn10 -ffffffff82fca008 r dummy_irq_info_funcs -ffffffff82fca018 r hpd_irq_info_funcs -ffffffff82fca028 r hpd_rx_irq_info_funcs -ffffffff82fca038 r pflip_irq_info_funcs -ffffffff82fca048 r vupdate_no_lock_irq_info_funcs -ffffffff82fca058 r vblank_irq_info_funcs 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hpd_irq_info_funcs -ffffffff82fd12b8 r hpd_rx_irq_info_funcs -ffffffff82fd12c8 r pflip_irq_info_funcs -ffffffff82fd12d8 r vupdate_no_lock_irq_info_funcs -ffffffff82fd12e8 r vblank_irq_info_funcs -ffffffff82fd12f8 r vline0_irq_info_funcs -ffffffff82fd1308 r dmub_outbox_irq_info_funcs -ffffffff82fd2000 r irq_source_info_dcn30 -ffffffff82fd3290 r irq_service_funcs_dcn30 -ffffffff82fd3298 r dummy_irq_info_funcs -ffffffff82fd32a8 r hpd_irq_info_funcs -ffffffff82fd32b8 r hpd_rx_irq_info_funcs -ffffffff82fd32c8 r pflip_irq_info_funcs -ffffffff82fd32d8 r vupdate_no_lock_irq_info_funcs -ffffffff82fd32e8 r vblank_irq_info_funcs -ffffffff82fd32f8 r vline0_irq_info_funcs -ffffffff82fd3308 r dmub_trace_irq_info_funcs -ffffffff82fd4000 r irq_source_info_dcn302 -ffffffff82fd5290 r irq_service_funcs_dcn302 -ffffffff82fd5298 r dummy_irq_info_funcs -ffffffff82fd52a8 r hpd_irq_info_funcs -ffffffff82fd52b8 r hpd_rx_irq_info_funcs -ffffffff82fd52c8 r pflip_irq_info_funcs -ffffffff82fd52d8 r vupdate_no_lock_irq_info_funcs -ffffffff82fd52e8 r vblank_irq_info_funcs -ffffffff82fd52f8 r vline0_irq_info_funcs -ffffffff82fd5308 r dmub_trace_irq_info_funcs -ffffffff82fd6000 r irq_service_funcs_dcn303 -ffffffff82fd6008 r dummy_irq_info_funcs -ffffffff82fd6018 r hpd_irq_info_funcs -ffffffff82fd6028 r hpd_rx_irq_info_funcs -ffffffff82fd6038 r pflip_irq_info_funcs -ffffffff82fd6048 r vupdate_no_lock_irq_info_funcs -ffffffff82fd6058 r vblank_irq_info_funcs -ffffffff82fd6068 r vline0_irq_info_funcs -ffffffff82fd6080 r irq_source_info_dcn303 -ffffffff82fd8000 r irq_source_info_dcn31 -ffffffff82fd9290 r irq_service_funcs_dcn31 -ffffffff82fd9298 r dummy_irq_info_funcs -ffffffff82fd92a8 r hpd_irq_info_funcs -ffffffff82fd92b8 r hpd_rx_irq_info_funcs -ffffffff82fd92c8 r pflip_irq_info_funcs -ffffffff82fd92d8 r vupdate_no_lock_irq_info_funcs -ffffffff82fd92e8 r vblank_irq_info_funcs -ffffffff82fd92f8 r vline0_irq_info_funcs -ffffffff82fd9308 r outbox_irq_info_funcs -ffffffff82fda000 r irq_source_info_dcn314 -ffffffff82fdb290 r irq_service_funcs_dcn314 -ffffffff82fdb298 r dummy_irq_info_funcs -ffffffff82fdb2a8 r hpd_irq_info_funcs -ffffffff82fdb2b8 r hpd_rx_irq_info_funcs -ffffffff82fdb2c8 r pflip_irq_info_funcs -ffffffff82fdb2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82fdb2e8 r vblank_irq_info_funcs -ffffffff82fdb2f8 r vline0_irq_info_funcs -ffffffff82fdb308 r outbox_irq_info_funcs -ffffffff82fdc000 r irq_source_info_dcn315 -ffffffff82fdd290 r irq_service_funcs_dcn315 -ffffffff82fdd298 r dummy_irq_info_funcs -ffffffff82fdd2a8 r hpd_irq_info_funcs -ffffffff82fdd2b8 r hpd_rx_irq_info_funcs -ffffffff82fdd2c8 r pflip_irq_info_funcs -ffffffff82fdd2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82fdd2e8 r vblank_irq_info_funcs -ffffffff82fdd2f8 r vline0_irq_info_funcs -ffffffff82fdd308 r outbox_irq_info_funcs -ffffffff82fde000 r irq_source_info_dcn32 -ffffffff82fdf290 r irq_service_funcs_dcn32 -ffffffff82fdf298 r dummy_irq_info_funcs -ffffffff82fdf2a8 r hpd_irq_info_funcs -ffffffff82fdf2b8 r hpd_rx_irq_info_funcs -ffffffff82fdf2c8 r pflip_irq_info_funcs -ffffffff82fdf2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82fdf2e8 r vblank_irq_info_funcs -ffffffff82fdf2f8 r vline0_irq_info_funcs -ffffffff82fdf308 r outbox_irq_info_funcs -ffffffff82fe1000 r dio_link_hwss -ffffffff82fe2000 r dio_fixed_vs_pe_retimer_link_hwss -ffffffff82fe3000 r dpia_link_hwss -ffffffff82fe4000 r hpo_dp_link_hwss -ffffffff82fe5000 r hpo_fixed_vs_pe_retimer_dp_link_hwss -ffffffff82fe6000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82fe7000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82fe7006 r DP_DVI_CONVERTER_ID_4 -ffffffff82fe700d r DP_DVI_CONVERTER_ID_5 -ffffffff82fe8000 r dp_lt_fallbacks -ffffffff82fec000 r mandatory_dpcd_partitions -ffffffff82fed000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82fed007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82fee000 r virtual_lnk_enc_funcs -ffffffff82fef000 r virtual_link_hwss -ffffffff82ff0000 r virtual_str_enc_funcs -ffffffff82ff1000 R dmub_srv_dcn20_regs -ffffffff82ff2000 R dmub_srv_dcn21_regs -ffffffff82ff3000 R dmub_srv_dcn30_regs -ffffffff82ff4000 R dmub_srv_dcn301_regs -ffffffff82ff5000 R dmub_srv_dcn302_regs -ffffffff82ff6000 R dmub_srv_dcn303_regs -ffffffff82ff7000 R dmub_srv_dcn31_regs -ffffffff82ff8000 R dmub_srv_dcn314_regs -ffffffff82ff9000 R dmub_srv_dcn315_regs -ffffffff82ffa000 R dmub_srv_dcn316_regs -ffffffff82ffb000 R dmub_srv_dcn32_regs -ffffffff82ffc000 r numerator01 -ffffffff82ffc020 r numerator02 -ffffffff82ffc040 r numerator04 -ffffffff82ffc060 r numerator05 -ffffffff83000000 r abm_settings -ffffffff83000020 r abm_settings_config0 -ffffffff83000060 r abm_settings_config1 -ffffffff830000a0 r abm_settings_config2 -ffffffff830000d8 r min_reduction_table_v_2_2 -ffffffff830000e5 r max_reduction_table_v_2_2 -ffffffff830000f2 r min_reduction_table -ffffffff830000ff r max_reduction_table -ffffffff83000110 r custom_backlight_curve0 -ffffffff83001000 R amdgpu_pp_profile_name -ffffffff83002000 r pp_lib_thermal_controller_names -ffffffff83003000 r pp_ip_funcs -ffffffff830030a8 R pp_smu_ip_block -ffffffff830030c0 r pp_dpm_funcs -ffffffff83004000 r gpio_tbl -ffffffff830040f0 r enable_fb_req_rej_tbl -ffffffff83004140 r use_bclk_tbl -ffffffff83004310 r turn_off_plls_tbl -ffffffff83004640 r enter_baco_tbl -ffffffff83004730 r exit_baco_tbl -ffffffff83004850 r clean_baco_tbl +ffffffff82fc3000 r funcs +ffffffff82fc4000 r hdmi_14_protection +ffffffff82fc4010 r dp_11_protection +ffffffff82fc4020 r hdcp_i2c_offsets +ffffffff82fc4050 r hdcp_dpcd_addrs +ffffffff82fc5000 r irq_service_funcs_dce110 +ffffffff82fc5008 r dummy_irq_info_funcs +ffffffff82fc5018 r hpd_irq_info_funcs +ffffffff82fc5028 r hpd_rx_irq_info_funcs +ffffffff82fc5038 r pflip_irq_info_funcs +ffffffff82fc5048 r vupdate_irq_info_funcs +ffffffff82fc5058 r vblank_irq_info_funcs +ffffffff82fc5070 r irq_source_info_dce110 +ffffffff82fc7000 r irq_service_funcs_dce120 +ffffffff82fc7008 r dummy_irq_info_funcs +ffffffff82fc7018 r hpd_irq_info_funcs +ffffffff82fc7028 r hpd_rx_irq_info_funcs +ffffffff82fc7038 r pflip_irq_info_funcs +ffffffff82fc7048 r vupdate_irq_info_funcs +ffffffff82fc7058 r vblank_irq_info_funcs +ffffffff82fc7070 r irq_source_info_dce120 +ffffffff82fc9000 r irq_service_funcs_dce80 +ffffffff82fc9008 r dummy_irq_info_funcs +ffffffff82fc9018 r hpd_irq_info_funcs +ffffffff82fc9028 r hpd_rx_irq_info_funcs +ffffffff82fc9038 r pflip_irq_info_funcs +ffffffff82fc9048 r vupdate_irq_info_funcs +ffffffff82fc9058 r vblank_irq_info_funcs +ffffffff82fc9070 r irq_source_info_dce80 +ffffffff82fcb000 r irq_service_funcs_dcn10 +ffffffff82fcb008 r dummy_irq_info_funcs +ffffffff82fcb018 r hpd_irq_info_funcs +ffffffff82fcb028 r hpd_rx_irq_info_funcs +ffffffff82fcb038 r pflip_irq_info_funcs +ffffffff82fcb048 r vupdate_no_lock_irq_info_funcs +ffffffff82fcb058 r vblank_irq_info_funcs +ffffffff82fcb068 r vline0_irq_info_funcs +ffffffff82fcb080 r irq_source_info_dcn10 +ffffffff82fcd000 r irq_service_funcs_dcn20 +ffffffff82fcd008 r dummy_irq_info_funcs +ffffffff82fcd018 r hpd_irq_info_funcs +ffffffff82fcd028 r hpd_rx_irq_info_funcs +ffffffff82fcd038 r pflip_irq_info_funcs +ffffffff82fcd048 r vupdate_no_lock_irq_info_funcs +ffffffff82fcd058 r vblank_irq_info_funcs +ffffffff82fcd068 r vline0_irq_info_funcs +ffffffff82fcd080 r irq_source_info_dcn20 +ffffffff82fcf000 r irq_service_funcs_dcn201 +ffffffff82fcf008 r dummy_irq_info_funcs +ffffffff82fcf018 r hpd_irq_info_funcs +ffffffff82fcf028 r hpd_rx_irq_info_funcs +ffffffff82fcf038 r pflip_irq_info_funcs +ffffffff82fcf048 r vupdate_no_lock_irq_info_funcs +ffffffff82fcf058 r vblank_irq_info_funcs +ffffffff82fcf068 r vline0_irq_info_funcs +ffffffff82fcf080 r irq_source_info_dcn201 +ffffffff82fd1000 r irq_source_info_dcn21 +ffffffff82fd2290 r irq_service_funcs_dcn21 +ffffffff82fd2298 r dummy_irq_info_funcs +ffffffff82fd22a8 r hpd_irq_info_funcs +ffffffff82fd22b8 r hpd_rx_irq_info_funcs +ffffffff82fd22c8 r pflip_irq_info_funcs +ffffffff82fd22d8 r vupdate_no_lock_irq_info_funcs +ffffffff82fd22e8 r vblank_irq_info_funcs +ffffffff82fd22f8 r vline0_irq_info_funcs +ffffffff82fd2308 r dmub_outbox_irq_info_funcs +ffffffff82fd3000 r irq_source_info_dcn30 +ffffffff82fd4290 r irq_service_funcs_dcn30 +ffffffff82fd4298 r dummy_irq_info_funcs +ffffffff82fd42a8 r hpd_irq_info_funcs +ffffffff82fd42b8 r hpd_rx_irq_info_funcs +ffffffff82fd42c8 r pflip_irq_info_funcs +ffffffff82fd42d8 r vupdate_no_lock_irq_info_funcs +ffffffff82fd42e8 r vblank_irq_info_funcs +ffffffff82fd42f8 r vline0_irq_info_funcs +ffffffff82fd4308 r dmub_trace_irq_info_funcs +ffffffff82fd5000 r irq_source_info_dcn302 +ffffffff82fd6290 r irq_service_funcs_dcn302 +ffffffff82fd6298 r dummy_irq_info_funcs +ffffffff82fd62a8 r hpd_irq_info_funcs +ffffffff82fd62b8 r hpd_rx_irq_info_funcs +ffffffff82fd62c8 r pflip_irq_info_funcs +ffffffff82fd62d8 r vupdate_no_lock_irq_info_funcs +ffffffff82fd62e8 r vblank_irq_info_funcs +ffffffff82fd62f8 r vline0_irq_info_funcs +ffffffff82fd6308 r dmub_trace_irq_info_funcs +ffffffff82fd7000 r irq_service_funcs_dcn303 +ffffffff82fd7008 r dummy_irq_info_funcs +ffffffff82fd7018 r hpd_irq_info_funcs +ffffffff82fd7028 r hpd_rx_irq_info_funcs +ffffffff82fd7038 r pflip_irq_info_funcs +ffffffff82fd7048 r vupdate_no_lock_irq_info_funcs +ffffffff82fd7058 r vblank_irq_info_funcs +ffffffff82fd7068 r vline0_irq_info_funcs +ffffffff82fd7080 r irq_source_info_dcn303 +ffffffff82fd9000 r irq_source_info_dcn31 +ffffffff82fda290 r irq_service_funcs_dcn31 +ffffffff82fda298 r dummy_irq_info_funcs +ffffffff82fda2a8 r hpd_irq_info_funcs +ffffffff82fda2b8 r hpd_rx_irq_info_funcs +ffffffff82fda2c8 r pflip_irq_info_funcs +ffffffff82fda2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82fda2e8 r vblank_irq_info_funcs +ffffffff82fda2f8 r vline0_irq_info_funcs +ffffffff82fda308 r outbox_irq_info_funcs +ffffffff82fdb000 r irq_source_info_dcn314 +ffffffff82fdc290 r irq_service_funcs_dcn314 +ffffffff82fdc298 r dummy_irq_info_funcs +ffffffff82fdc2a8 r hpd_irq_info_funcs +ffffffff82fdc2b8 r hpd_rx_irq_info_funcs +ffffffff82fdc2c8 r pflip_irq_info_funcs +ffffffff82fdc2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82fdc2e8 r vblank_irq_info_funcs +ffffffff82fdc2f8 r vline0_irq_info_funcs +ffffffff82fdc308 r outbox_irq_info_funcs +ffffffff82fdd000 r irq_source_info_dcn315 +ffffffff82fde290 r irq_service_funcs_dcn315 +ffffffff82fde298 r dummy_irq_info_funcs +ffffffff82fde2a8 r hpd_irq_info_funcs +ffffffff82fde2b8 r hpd_rx_irq_info_funcs +ffffffff82fde2c8 r pflip_irq_info_funcs +ffffffff82fde2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82fde2e8 r vblank_irq_info_funcs +ffffffff82fde2f8 r vline0_irq_info_funcs +ffffffff82fde308 r outbox_irq_info_funcs +ffffffff82fdf000 r irq_source_info_dcn32 +ffffffff82fe0290 r irq_service_funcs_dcn32 +ffffffff82fe0298 r dummy_irq_info_funcs +ffffffff82fe02a8 r hpd_irq_info_funcs +ffffffff82fe02b8 r hpd_rx_irq_info_funcs +ffffffff82fe02c8 r pflip_irq_info_funcs +ffffffff82fe02d8 r vupdate_no_lock_irq_info_funcs +ffffffff82fe02e8 r vblank_irq_info_funcs +ffffffff82fe02f8 r vline0_irq_info_funcs +ffffffff82fe0308 r outbox_irq_info_funcs +ffffffff82fe2000 r dio_link_hwss +ffffffff82fe3000 r dio_fixed_vs_pe_retimer_link_hwss +ffffffff82fe4000 r dpia_link_hwss +ffffffff82fe5000 r hpo_dp_link_hwss +ffffffff82fe6000 r hpo_fixed_vs_pe_retimer_dp_link_hwss +ffffffff82fe7000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82fe8000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82fe8006 r DP_DVI_CONVERTER_ID_4 +ffffffff82fe800d r DP_DVI_CONVERTER_ID_5 +ffffffff82fe9000 r dp_lt_fallbacks +ffffffff82fed000 r mandatory_dpcd_partitions +ffffffff82fee000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82fee007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82fef000 r virtual_lnk_enc_funcs +ffffffff82ff0000 r virtual_link_hwss +ffffffff82ff1000 r virtual_str_enc_funcs +ffffffff82ff2000 R dmub_srv_dcn20_regs +ffffffff82ff3000 R dmub_srv_dcn21_regs +ffffffff82ff4000 R dmub_srv_dcn30_regs +ffffffff82ff5000 R dmub_srv_dcn301_regs +ffffffff82ff6000 R dmub_srv_dcn302_regs +ffffffff82ff7000 R dmub_srv_dcn303_regs +ffffffff82ff8000 R dmub_srv_dcn31_regs +ffffffff82ff9000 R dmub_srv_dcn314_regs +ffffffff82ffa000 R dmub_srv_dcn315_regs +ffffffff82ffb000 R dmub_srv_dcn316_regs +ffffffff82ffc000 R dmub_srv_dcn32_regs +ffffffff82ffd000 r numerator01 +ffffffff82ffd020 r numerator02 +ffffffff82ffd040 r numerator04 +ffffffff82ffd060 r numerator05 +ffffffff83001000 r abm_settings +ffffffff83001020 r abm_settings_config0 +ffffffff83001060 r abm_settings_config1 +ffffffff830010a0 r abm_settings_config2 +ffffffff830010d8 r min_reduction_table_v_2_2 +ffffffff830010e5 r max_reduction_table_v_2_2 +ffffffff830010f2 r min_reduction_table +ffffffff830010ff r max_reduction_table +ffffffff83001110 r custom_backlight_curve0 +ffffffff83002000 R amdgpu_pp_profile_name +ffffffff83003000 r pp_lib_thermal_controller_names +ffffffff83004000 r pp_ip_funcs +ffffffff830040a8 R pp_smu_ip_block +ffffffff830040c0 r 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PSMSEEDCCtrlConfig_Vega10 -ffffffff83025350 r SEEDCForceStallPatternConfig_Vega10 -ffffffff830253e0 r SEEDCCtrlForceStallConfig_Vega10 -ffffffff83026000 R vega10_pptable_funcs -ffffffff83027000 r pre_baco_tbl -ffffffff83027090 r enter_baco_tbl -ffffffff830272b0 r exit_baco_tbl -ffffffff83027520 r clean_baco_tbl -ffffffff83028000 r vega12_hwmgr_funcs -ffffffff830282f0 r SMU7ThermalWithDelayPolicy -ffffffff83028340 r link_width -ffffffff83029000 R vega12_pptable_funcs -ffffffff8302a000 r clean_baco_tbl -ffffffff8302b000 r vega20_hwmgr_funcs -ffffffff8302b2f0 r SMU7ThermalWithDelayPolicy -ffffffff8302b340 r link_width -ffffffff8302c000 R vega20_pptable_funcs -ffffffff8302d000 R ci_smu_funcs -ffffffff8302d0e0 r defaults_hawaii_pro -ffffffff8302d12c r defaults_hawaii_xt -ffffffff8302d178 r defaults_saturn_xt -ffffffff8302d1c4 r defaults_bonaire_xt -ffffffff8302d210 r ci_program_jump_on_start.data -ffffffff8302e000 R fiji_smu_funcs -ffffffff8302e0e0 r avfs_graphics_level -ffffffff8302e240 r fiji_power_tune_data_set_array -ffffffff8302e246 r fiji_clock_stretch_amount_conversion -ffffffff8302e260 r fiji_clock_stretcher_ddt_table -ffffffff8302f000 R iceland_smu_funcs -ffffffff8302f0e0 r defaults_icelandxt -ffffffff8302f12c r defaults_icelandpro -ffffffff8302f178 r defaults_iceland -ffffffff83030000 R polaris10_smu_funcs -ffffffff830300e0 r avfs_graphics_level_polaris10 -ffffffff830302a0 r avfs_memory_level_polaris10 -ffffffff830302c0 r polaris10_power_tune_data_set_array -ffffffff83030310 r Range_Table -ffffffff83031000 R smu10_smu_funcs -ffffffff83032000 r smu7_program_jump_on_start.data -ffffffff83032010 r pwr_virus_table_pre -ffffffff83032680 r pwr_virus_table_post -ffffffff83032f80 r pwr_virus_section1 -ffffffff83033610 r pwr_virus_section2 -ffffffff83033660 r pwr_virus_section3 -ffffffff8303aab0 r pwr_virus_section4 -ffffffff8303ae80 r pwr_virus_section5 -ffffffff8303b490 r pwr_virus_section6 -ffffffff8303d000 R smu8_smu_funcs -ffffffff8303e000 R tonga_smu_funcs -ffffffff8303e0e0 r tonga_power_tune_data_set_array -ffffffff8303e12c r tonga_clock_stretch_amount_conversion -ffffffff8303e140 r tonga_clock_stretcher_ddt_table -ffffffff8303f000 R vega10_smu_funcs -ffffffff83040000 R vega12_smu_funcs -ffffffff83041000 R vega20_smu_funcs -ffffffff83042000 R vegam_smu_funcs -ffffffff830420e0 r vegam_power_tune_data_set_array -ffffffff83042130 r Range_Table -ffffffff83043000 R smu_ip_funcs -ffffffff830430a8 R smu_v11_0_ip_block -ffffffff830430c0 R smu_v12_0_ip_block -ffffffff830430d8 R smu_v13_0_ip_block -ffffffff830430f0 r swsmu_pm_funcs -ffffffff83044000 r arcturus_ppt_funcs -ffffffff830443f0 r arcturus_table_map -ffffffff83044470 r arcturus_pwr_src_map -ffffffff83044480 r arcturus_workload_map -ffffffff830444d0 r smu11_thermal_policy -ffffffff83044528 r arcturus_i2c_algo -ffffffff83044538 r arcturus_i2c_control_quirks -ffffffff83044550 r arcturus_throttler_map -ffffffff83044570 r arcturus_message_map -ffffffff83044ff0 r arcturus_clk_map -ffffffff830450b0 r arcturus_feature_mask_map -ffffffff83046000 r cyan_skillfish_ppt_funcs -ffffffff83047000 r navi10_ppt_funcs -ffffffff830473f0 r smu11_thermal_policy -ffffffff83047448 r navi10_i2c_algo -ffffffff83047458 r navi10_i2c_control_quirks -ffffffff83047470 r navi1x_throttler_map -ffffffff83047490 r NoDbiPrbs7 -ffffffff83048490 r DbiPrbs7 -ffffffff8304a000 r sienna_cichlid_ppt_funcs -ffffffff8304a3f0 r smu11_thermal_policy -ffffffff8304a448 r sienna_cichlid_i2c_algo -ffffffff8304a458 r sienna_cichlid_i2c_control_quirks -ffffffff8304a470 r sienna_cichlid_throttler_map -ffffffff8304b000 r smu_v11_0_irq_funcs -ffffffff8304b010 r link_width -ffffffff8304c000 r vangogh_ppt_funcs -ffffffff8304c3e8 r vangogh_throttler_map -ffffffff8304d000 r renoir_ppt_funcs -ffffffff8304d3e8 r renoir_throttler_map -ffffffff8304e000 r aldebaran_ppt_funcs -ffffffff8304e3f0 r aldebaran_clk_map -ffffffff8304e4b0 r aldebaran_table_map -ffffffff8304e530 r smu13_thermal_policy -ffffffff8304e588 r aldebaran_i2c_algo -ffffffff8304e598 r aldebaran_i2c_control_quirks -ffffffff8304e5b0 r aldebaran_throttler_map -ffffffff8304e5d0 r aldebaran_message_map -ffffffff8304f050 r aldebaran_feature_mask_map -ffffffff83050000 R pmfw_decoded_link_speed -ffffffff83050020 R pmfw_decoded_link_width -ffffffff83050040 r smu_v13_0_irq_funcs -ffffffff83051000 r smu_v13_0_0_ppt_funcs -ffffffff830513f0 r smu13_thermal_policy -ffffffff83051448 r smu_v13_0_0_i2c_algo -ffffffff83051458 r smu_v13_0_0_i2c_control_quirks -ffffffff83051470 r smu_v13_0_0_throttler_map -ffffffff83052000 r smu_v13_0_4_ppt_funcs -ffffffff83053000 r smu_v13_0_5_ppt_funcs -ffffffff83054000 r smu_v13_0_6_ppt_funcs -ffffffff830543f0 r smu_v13_0_6_message_map -ffffffff83054e70 r smu_v13_0_6_clk_map -ffffffff83054f30 r smu_v13_0_6_table_map -ffffffff83054fb0 r smu_v13_0_6_i2c_algo -ffffffff83054fc0 r smu_v13_0_6_i2c_control_quirks -ffffffff83054fd0 r smu_v13_0_6_irq_funcs -ffffffff83054fe0 r smu_v13_0_6_throttler_map -ffffffff83054ff0 r smu_v13_0_6_feature_mask_map -ffffffff83056000 r smu_v13_0_7_ppt_funcs -ffffffff830563f0 r smu13_thermal_policy -ffffffff83056450 r smu_v13_0_7_throttler_map -ffffffff83057000 r yellow_carp_ppt_funcs -ffffffff83058000 R link_speed -ffffffff83058020 r __smu_message_names -ffffffff83059000 R pchb_ca -ffffffff8305a000 R amas_ca -ffffffff8305a028 R amas_devices -ffffffff8305a040 r amas_feature -ffffffff8305b000 R cardslot_ca -ffffffff8305c000 R cardbus_ca -ffffffff8305d000 R com_cardbus_ca -ffffffff8305e000 R xl_cardbus_ca -ffffffff8305e030 R xl_cardbus_products -ffffffff8305f000 R dc_cardbus_ca -ffffffff8305f030 R dc_cardbus_devices -ffffffff83060000 R fxp_cardbus_ca -ffffffff83060028 R fxp_cardbus_devices -ffffffff83061000 R rl_cardbus_devices -ffffffff83061028 R rl_cardbus_ca -ffffffff83062000 R re_cardbus_ca -ffffffff83062028 R re_cardbus_devices -ffffffff83063000 R ath_cardbus_ca -ffffffff83064000 R athn_cardbus_ca -ffffffff83064030 r athn_cardbus_devices -ffffffff83065000 R atw_cardbus_ca -ffffffff83065028 R atw_cardbus_devices -ffffffff83066000 R rtw_cardbus_ca -ffffffff83066028 R rtw_cardbus_devices -ffffffff83067000 R ral_cardbus_ca -ffffffff83067030 r ral_cardbus_devices -ffffffff83068000 R acx_cardbus_ca -ffffffff83068028 r acx_cardbus_devices -ffffffff83069000 R pgt_cardbus_ca -ffffffff83069028 R pgt_cardbus_devices -ffffffff8306a000 R ehci_cardbus_ca -ffffffff8306b000 R ohci_cardbus_ca -ffffffff8306c000 R uhci_cardbus_ca -ffffffff8306d000 R malo_cardbus_ca -ffffffff8306d028 r malo_cardbus_devices -ffffffff8306e000 R bwi_cardbus_ca -ffffffff8306e030 r bwi_cardbus_devices -ffffffff8306f000 R pcmcia_ca -ffffffff83070000 r pcmcia_parse_cis_tuple.init_cfe -ffffffff83071000 r pcmcia_cis_quirks -ffffffff83072000 R ep_pcmcia_ca -ffffffff83073000 R ne_pcmcia_ca -ffffffff83073030 R ne2000devs -ffffffff83075000 R aic_pcmcia_ca -ffffffff83076000 R com_pcmcia_ca -ffffffff83077000 R wdc_pcmcia_ca -ffffffff83078000 R sm_pcmcia_ca -ffffffff83079000 R xe_pcmcia_ca -ffffffff8307a000 R wi_pcmcia_ca -ffffffff8307a030 r wi_pcmcia_products -ffffffff8307b000 R malo_pcmcia_ca -ffffffff8307c000 R an_pcmcia_ca -ffffffff8307d000 R pcib_ca -ffffffff8307e000 R amdpcib_ca -ffffffff8307e028 R amdpcib_devices -ffffffff8307f000 R tcpcib_ca -ffffffff8307f028 R tcpcib_devices -ffffffff83080000 R aapic_ca -ffffffff83081000 R hme_pci_ca -ffffffff83081028 r hme_promhdr -ffffffff8308102a r hme_promdat -ffffffff83082000 R isa_ca -ffffffff83083000 R isadma_ca -ffffffff83084000 R fdc_ca -ffffffff83085000 R fd_ca -ffffffff83086000 R com_isa_ca -ffffffff83087000 R pckbc_isa_ca -ffffffff83088000 R vga_isa_ca -ffffffff83089000 R wdc_isa_ca -ffffffff8308a000 R mpu_midi_hw_if -ffffffff8308b000 R mpu_isa_ca -ffffffff8308c000 R pcppi_ca -ffffffff8308d000 R spkr_ca -ffffffff8308d030 r pitchtab -ffffffff8308e000 R lpt_isa_ca -ffffffff8308f000 R wbsio_ca -ffffffff83090000 R schsio_ca -ffffffff83091000 R lm_isa_ca -ffffffff83091028 R lm_wbsio_ca -ffffffff83092000 R it_sensors -ffffffff83092110 R it_vrfact -ffffffff83092140 R it_fan_regs -ffffffff83092160 R it_fan_ext_regs -ffffffff83092178 R it_ca -ffffffff83093000 R abitkv_sensors -ffffffff83093200 R abitaa_sensors -ffffffff83093480 R abitav_sensors -ffffffff83093700 R abitas_sensors -ffffffff83093980 R abitax_sensors -ffffffff83093bc0 R abitm4_sensors -ffffffff83093e80 R abitan_sensors -ffffffff83094120 R abital_sensors -ffffffff830943a0 R abitaw_sensors -ffffffff83094700 R abitni_sensors -ffffffff830949a0 R abitat_sensors -ffffffff83094cc0 R abitan2_sensors -ffffffff83094f60 R abitab_sensors -ffffffff83095220 R abitan3_sensors -ffffffff83095500 R abitaw2_sensors -ffffffff83095860 R abitat2_sensors -ffffffff83095b60 R abitab2_sensors -ffffffff83095ea0 R abitin_sensors -ffffffff830961e0 R uguru_ca -ffffffff83097000 R aps_ca -ffffffff83098000 R wsdisplay_ca -ffffffff83098030 r charClass -ffffffff83099000 r usl_syncops -ffffffff8309a000 R wsevent_filtops -ffffffff8309b000 R wskbd_ca -ffffffff8309c000 r latin1_to_upper -ffffffff8309d000 R wsmouse_ca -ffffffff8309e000 R cyrillic_to_koi8 -ffffffff8309e060 R unicode_to_latin2 -ffffffff8309e0e0 R unicode_to_latin7 -ffffffff8309f000 R wsemul_vt100_ops -ffffffff830a0000 r decspcgr2uni -ffffffff830a0100 r dectech2uni -ffffffff830a0200 r nrctable -ffffffff830a1000 r vt100_fkeys -ffffffff830a10c0 r vt100_pfkeys -ffffffff830a10e0 r vt100_numpad -ffffffff830a2000 R pckbd_ca -ffffffff830a2028 R pckbd_accessops -ffffffff830a2040 R pckbd_consops -ffffffff830a2060 R pckbd_keymapdata -ffffffff830a2070 R pckbd_xtbl2 -ffffffff830a2100 R pckbd_xtbl2_ext -ffffffff830a3000 r pckbd_keydesc_us -ffffffff830a3250 r pckbd_keydesc_de -ffffffff830a32f0 r pckbd_keydesc_de_nodead -ffffffff830a3310 r pckbd_keydesc_fr -ffffffff830a33d0 r pckbd_keydesc_fr_dvorak_bepo -ffffffff830a3510 r pckbd_keydesc_dk -ffffffff830a35a0 r pckbd_keydesc_dk_nodead -ffffffff830a35b0 r pckbd_keydesc_it -ffffffff830a3640 r pckbd_keydesc_uk -ffffffff830a36e0 r pckbd_keydesc_jp -ffffffff830a3750 r pckbd_keydesc_sv -ffffffff830a3780 r pckbd_keydesc_sv_nodead -ffffffff830a3790 r pckbd_keydesc_no -ffffffff830a37c0 r pckbd_keydesc_no_nodead -ffffffff830a37d0 r pckbd_keydesc_us_declk -ffffffff830a3860 r pckbd_keydesc_us_dvorak -ffffffff830a3900 r pckbd_keydesc_us_colemak -ffffffff830a3948 r pckbd_keydesc_swapctrlcaps -ffffffff830a3960 r pckbd_keydesc_iopener -ffffffff830a39b0 r pckbd_keydesc_es -ffffffff830a3a50 r pckbd_keydesc_be -ffffffff830a3b10 r pckbd_keydesc_ru -ffffffff830a3c80 r pckbd_keydesc_ua -ffffffff830a3e10 r pckbd_keydesc_sg -ffffffff830a3ec0 r pckbd_keydesc_sg_nodead -ffffffff830a3ee0 r pckbd_keydesc_sf -ffffffff830a3f00 r pckbd_keydesc_pt -ffffffff830a3f90 r pckbd_keydesc_lt -ffffffff830a4070 r pckbd_keydesc_la -ffffffff830a4100 r pckbd_keydesc_br -ffffffff830a4180 r pckbd_keydesc_tr -ffffffff830a4230 r pckbd_keydesc_tr_nodead -ffffffff830a4250 r pckbd_keydesc_pl -ffffffff830a42b0 r pckbd_keydesc_hu -ffffffff830a43c0 r pckbd_keydesc_si -ffffffff830a44d0 r pckbd_keydesc_cf -ffffffff830a45a0 r pckbd_keydesc_cf_nodead -ffffffff830a45c0 r pckbd_keydesc_lv -ffffffff830a4640 r pckbd_keydesc_nl -ffffffff830a4720 r pckbd_keydesc_nl_nodead -ffffffff830a4740 r pckbd_keydesc_is -ffffffff830a47cc r pckbd_keydesc_is_nodead -ffffffff830a47e0 r pckbd_keydesc_ee -ffffffff830a4890 r pckbd_keydesc_ee_nodead -ffffffff830a48b0 R pckbd_keydesctab -ffffffff830a5000 R pms_ca -ffffffff830a5028 R pms_accessops -ffffffff830a5040 R pms_sec_accessops -ffffffff830a5060 R pms_protocols -ffffffff830a51e0 r alps_models -ffffffff830a6000 R skgpio_led_offset -ffffffff830a6008 R skgpio_ca -ffffffff830a7000 R hidkbd_trtab -ffffffff830a7100 r apple_fn_trans -ffffffff830a7120 r apple_tb_trans -ffffffff830a7140 r apple_mba_trans -ffffffff830a8000 r hidcc_attach_wskbd.accessops -ffffffff830a8020 r hidcc_keysyms -ffffffff830a9000 R usb_ca -ffffffff830aa000 R usb_known_products -ffffffff830b6280 R usb_known_vendors -ffffffff830b8ab0 R usbd_error_strs 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pflow_cloner -ffffffff83494000 d hotplug_mtx -ffffffff83495000 D pppoe_cloner -ffffffff83495030 D pppoediscinq -ffffffff83495060 D pppoeinq -ffffffff83496000 D dt_lock -ffffffff83497000 D dt_prov_profile -ffffffff83497030 D dt_prov_interval -ffffffff83498000 D dtps_nsysent -ffffffff83498008 D dt_prov_syscall -ffffffff83499000 D dt_prov_static -ffffffff83499030 D dt_static_sched_dequeue -ffffffff834990a0 D dt_static_sched_enqueue -ffffffff83499110 D dt_static_sched_fork -ffffffff83499180 D dt_static_sched_off__cpu -ffffffff834991f0 D dt_static_sched_on__cpu -ffffffff83499260 D dt_static_sched_remain__cpu -ffffffff834992d0 D dt_static_sched_sleep -ffffffff83499340 D dt_static_sched_steal -ffffffff834993b0 D dt_static_sched_unsleep -ffffffff83499420 D dt_static_sched_wakeup -ffffffff83499490 D dt_static_raw_syscalls_sys_enter -ffffffff83499500 D dt_static_raw_syscalls_sys_exit -ffffffff83499570 D dt_static_uvm_fault -ffffffff834995e0 D dt_static_uvm_map_insert -ffffffff83499650 D dt_static_uvm_map_remove -ffffffff834996c0 D dt_static_uvm_malloc -ffffffff83499730 D dt_static_uvm_free -ffffffff834997a0 D dt_static_uvm_pool_get -ffffffff83499810 D dt_static_uvm_pool_put -ffffffff83499880 D dt_static_vfs_bufcache_rel -ffffffff834998f0 D dt_static_vfs_bufcache_take -ffffffff83499960 D dt_static_vfs_cleaner -ffffffff834999d0 D dt_static_vmm_guest_enter -ffffffff83499a40 D dt_static_vmm_guest_exit -ffffffff83499ab0 D dt_static_vmm_inout -ffffffff83499b20 D dt_static_smr_call -ffffffff83499b90 D dt_static_smr_called -ffffffff83499c00 D dt_static_smr_barrier_enter -ffffffff83499c70 D dt_static_smr_barrier_exit -ffffffff83499ce0 D dt_static_smr_wakeup -ffffffff83499d50 D dt_static_smr_thread -ffffffff83499dc0 D dt_static_refcnt_none -ffffffff83499e30 D dt_static_refcnt_ethmulti -ffffffff83499ea0 D dt_static_refcnt_ifaddr -ffffffff83499f10 D dt_static_refcnt_ifmaddr -ffffffff83499f80 D dt_static_refcnt_inpcb -ffffffff83499ff0 D dt_static_refcnt_rtentry -ffffffff8349a060 D dt_static_refcnt_syncache -ffffffff8349a0d0 D dt_static_refcnt_tdb -ffffffff8349b000 D db_next_free_breakpoint -ffffffff8349b008 D db_breakpoints_inserted -ffffffff8349c000 D db_ed_style -ffffffff8349d000 D db_examine_format -ffffffff8349d078 D db_print_format -ffffffff8349e000 D db_history_size -ffffffff8349e008 D db_history_curr -ffffffff8349e010 D db_history_last -ffffffff8349f000 D db_tab_stop_width -ffffffff8349f004 D db_max_line -ffffffff8349f008 D db_max_width -ffffffff8349f00c D db_radix -ffffffff834a0000 D db_lastsym -ffffffff834a0008 D db_maxoff -ffffffff834a1000 D db_vars -ffffffff834a1090 D db_evars -ffffffff834a2000 D db_watchpoints_inserted -ffffffff834a2008 D db_next_free_watchpoint -ffffffff834a3000 D db_log -ffffffff834a4000 D audio_cd -ffffffff834a4020 D audio_lock -ffffffff834a5000 D midi_cd -ffffffff834a6000 D rnd_cold -ffffffff834a6004 D rnd_slowextract -ffffffff834a6008 D rnd_timeout -ffffffff834a6050 D rndlock -ffffffff834a6060 D rndreinit_timeout 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malloc_errintvl -ffffffff834b6000 D maxdmap -ffffffff834b6008 D maxsmap -ffffffff834b6010 D rlimit_lock -ffffffff834b7000 D sched_cost_priority -ffffffff834b7004 D sched_cost_runnable -ffffffff834b7008 D sched_cost_resident -ffffffff834b8000 D intrmap_lock -ffffffff834b9000 D nosuidcoredump -ffffffff834b9008 D sigio_lock -ffffffff834ba000 D smr_lock -ffffffff834ba010 D smr_logintvl -ffffffff834bb000 D startuphook_list -ffffffff834bc000 D sysctl_lock -ffffffff834bc010 D sysctl_disklock -ffffffff834bc020 d openbsd -ffffffff834bc024 d arg_max -ffffffff834bc028 d posix_version -ffffffff834bc02c d ngroups_max -ffffffff834bc030 d int_one -ffffffff834bc034 d maxpartitions -ffffffff834bc038 d raw_part -ffffffff834bc03c D allowpowerdown -ffffffff834bc040 D hw_power -ffffffff834bc044 d byte_order -ffffffff834bd000 D tc_lock -ffffffff834bd010 D windup_mtx -ffffffff834bd020 d dummy_timecounter -ffffffff834bd070 D timecounter -ffffffff834bd078 d timehands -ffffffff834bd080 d th0 -ffffffff834bd118 d th1 -ffffffff834be000 D itimer_mtx -ffffffff834be010 D ratecheck_mtx -ffffffff834be020 D ppsratecheck_mtx -ffffffff834be030 D resettodr_to -ffffffff834be078 D resettodr_task -ffffffff834bf000 D timeout_mutex -ffffffff834c0000 D wdog_auto -ffffffff834c1000 D taskq_sys -ffffffff834c1050 D taskq_sys_mp -ffffffff834c2000 d update_loadavg.to -ffffffff834c2048 D ccpu -ffffffff834c2050 d schedcpu.to -ffffffff834c2098 D perflevel -ffffffff834c209c D perfpolicy_on_ac -ffffffff834c20a0 D perfpolicy_on_battery -ffffffff834c20a8 D setperf_to -ffffffff834c3000 D autoconf_attdet_mtx -ffffffff834c3010 D msgs -ffffffff834c4000 d evcount_list -ffffffff834c4010 d evcount_percpu_init_list -ffffffff834c5000 D syslogf_rwlock -ffffffff834c5010 D log_mtx -ffffffff834c5020 D log_kq_mtx -ffffffff834c5030 D logstash_in -ffffffff834c5038 D logstash_out -ffffffff834c5040 D logstash_rwlock -ffffffff834c6000 D pool_head -ffffffff834c6010 D pool_lock -ffffffff834c6020 D pool_debug -ffffffff834c6028 D pool_allocator_single -ffffffff834c6040 D pool_allocator_multi -ffffffff834c6058 D pool_allocator_multi_ni -ffffffff834c6070 D pool_gc_tick -ffffffff834c60b8 D pool_gc_task -ffffffff834c7000 D kprintf_mutex -ffffffff834c7010 D db_panic -ffffffff834c7014 D splassert_ctl -ffffffff834c7018 D v_putc -ffffffff834c7020 D printf_flags -ffffffff834c8000 D userconf_base -ffffffff834c8004 D userconf_maxdev -ffffffff834c8008 D userconf_totdev -ffffffff834c800c D userconf_maxlocnames -ffffffff834c8010 D userconf_cnt -ffffffff834c8014 D userconf_lines -ffffffff834c8018 D userconf_histsz -ffffffff834c8020 D userconf_cmds -ffffffff834c9000 D ftlock -ffffffff834ca000 d ppollcollect.poll_errintvl -ffffffff834cb000 D ttydefchars -ffffffff834cb014 D ttclos -ffffffff834cb01b D ttopen -ffffffff834cb022 D ttybg -ffffffff834cb028 D ttyin -ffffffff834cb02e D ttyout -ffffffff834cb038 D ttylist_lock -ffffffff834cc000 D linesw -ffffffff834cc280 D nlinesw -ffffffff834cd000 D pt_softc_lock -ffffffff834ce000 d mbstat_boot_boot_cpumem -ffffffff834ce0c0 D mbstat -ffffffff834ce0d0 D mclsizes -ffffffff834ce0f0 D m_extref_mtx -ffffffff834ce100 D m_pool_allocator -ffffffff834ce120 D m_types -ffffffff834cf000 D somaxconn -ffffffff834cf004 D sominconn -ffffffff834cf008 D sosplice_lock -ffffffff834d0000 D sb_max -ffffffff834d1000 D unp_df_lock -ffffffff834d1010 D unp_gc_lock -ffffffff834d1020 D unp_rights_mtx -ffffffff834d1030 D unp_ino_mtx -ffffffff834d1040 D unp_gc_task -ffffffff834d1070 D unpst_sendspace -ffffffff834d1074 D unpst_recvspace -ffffffff834d1078 D unpsq_sendspace -ffffffff834d107c D unpsq_recvspace -ffffffff834d1080 D unpdg_sendspace -ffffffff834d1084 D unpdg_recvspace -ffffffff834d2000 D doingcache -ffffffff834d3000 D maxvfsconf -ffffffff834d3010 d vfsconflist -ffffffff834d4000 D lockf_lock -ffffffff834d4010 D maxlocksperuid -ffffffff834d5000 D iftovt_tab -ffffffff834d5040 D vttoif_tab -ffffffff834d5064 D suid_clear -ffffffff834d5068 D vnode_mtx -ffffffff834d5078 D vfs_stall_lock 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tcp_syn_use_limit -ffffffff83505020 D syn_cache_mtx -ffffffff83506000 D tcp_timer_mtx -ffffffff83506010 D tcp_mssdflt -ffffffff83506014 D tcp_rttdflt -ffffffff83506018 D tcp_do_rfc1323 -ffffffff8350601c D tcp_do_sack -ffffffff83506020 D tcp_do_rfc3390 -ffffffff83506024 D tcp_do_tso -ffffffff83506028 D tcp_reass_limit -ffffffff8350602c D tcp_sackhole_limit -ffffffff83507000 D tcp_sendspace -ffffffff83507004 D tcp_recvspace -ffffffff83507008 D tcp_autorcvbuf_inc -ffffffff83508000 D udpcksum -ffffffff83508004 D udp_sendspace -ffffffff83508008 D udp_recvspace -ffffffff83509000 D ipsec_flows_mtx -ffffffff83509010 D ipsec_ids_idle -ffffffff83509014 D ipsec_ids_next_flow -ffffffff83509018 D ipsec_policy_head -ffffffff83509028 D ipsp_ids_gc_timeout -ffffffff83509070 D tdb_sadb_mtx -ffffffff83509080 d tdb_hashmask -ffffffff8350a000 D ipo_tdb_mtx -ffffffff8350a010 D ipsec_acquire_mtx -ffffffff8350a020 D ipsec_acquire_head -ffffffff8350b000 D ipsec_keep_invalid -ffffffff8350b004 D ipsec_require_pfs -ffffffff8350b008 D ipsec_soft_timeout -ffffffff8350b00c D ipsec_exp_timeout -ffffffff8350b010 D ipsec_soft_first_use -ffffffff8350b014 D ipsec_exp_first_use -ffffffff8350b018 D ipsec_expire_acquire -ffffffff8350b01c D esp_enable -ffffffff8350b020 D ah_enable -ffffffff8350c000 D udpencap_enable -ffffffff8350c004 D udpencap_port -ffffffff8350d000 D carp_vh_rc -ffffffff8350d020 D carp_sc_rc -ffffffff8350d040 D carpctl_allow -ffffffff8350d044 D carpctl_log -ffffffff8350d048 D carp_cloner -ffffffff8350e000 d PADDING +ffffffff83006140 r use_bclk_tbl +ffffffff830062e0 r turn_off_plls_tbl +ffffffff83006370 r clk_req_b_tbl +ffffffff83006490 r enter_baco_tbl +ffffffff830065b0 r exit_baco_tbl +ffffffff830066d0 r clean_baco_tbl +ffffffff83007000 r gpio_tbl +ffffffff830070f0 r enable_fb_req_rej_tbl +ffffffff83007140 r use_bclk_tbl_vg +ffffffff83007200 r turn_off_plls_tbl_vg +ffffffff83007350 r use_bclk_tbl +ffffffff83007440 r turn_off_plls_tbl +ffffffff830075f0 r clk_req_b_tbl +ffffffff83007710 r enter_baco_tbl +ffffffff83007830 r exit_baco_tbl +ffffffff83007950 r clean_baco_tbl +ffffffff83008000 r vega10_fuses_default +ffffffff83017000 r pp_r600_encode_lanes +ffffffff83018000 R pptable_v1_0_funcs +ffffffff83019000 R pptable_funcs +ffffffff83019020 r soft_dummy_pp_table +ffffffff8301a000 r smu10_hwmgr_funcs +ffffffff8301b000 r smu7_hwmgr_funcs +ffffffff8301b2f8 r smu7_irq_funcs +ffffffff8301b310 r SMU7ThermalPolicy +ffffffff8301c000 r GCCACConfig_Polaris10 +ffffffff8301c1b0 r DIDTConfig_Polaris10 +ffffffff8301ca50 r GCCACConfig_Polaris11 +ffffffff8301cc00 r DIDTConfig_Polaris11_Kicker +ffffffff8301d4a0 r DIDTConfig_Polaris11 +ffffffff8301dd40 r DIDTConfig_Polaris12 +ffffffff8301e5e0 r GCCACConfig_VegaM +ffffffff8301e790 r DIDTConfig_VegaM +ffffffff83020000 r smu8_hwmgr_funcs +ffffffff830202f0 r SMU7ThermalPolicy +ffffffff83021000 r smu9_irq_funcs +ffffffff83022000 r gpio_tbl_iceland +ffffffff83022060 r gpio_tbl +ffffffff83022150 r enable_fb_req_rej_tbl +ffffffff830221a0 r use_bclk_tbl +ffffffff83022370 r turn_off_plls_tbl +ffffffff83022610 r enter_baco_tbl +ffffffff83022730 r exit_baco_tbl_iceland +ffffffff83022870 r clean_baco_tbl_iceland +ffffffff83022890 r exit_baco_tbl +ffffffff830229b0 r clean_baco_tbl +ffffffff83023000 r pre_baco_tbl +ffffffff83023090 r enter_baco_tbl +ffffffff830232b0 r exit_baco_tbl +ffffffff83023520 r clean_baco_tbl +ffffffff83024000 r vega10_hwmgr_funcs +ffffffff830242f0 r channel_number +ffffffff83024320 r SMU7ThermalWithDelayPolicy +ffffffff83025000 r SEDiDtStallCtrlConfig_vega10 +ffffffff83025110 r SEDiDtStallPatternConfig_vega10 +ffffffff830252e0 r SEDiDtWeightConfig_Vega10 +ffffffff830253b0 r SEDiDtCtrl1Config_Vega10 +ffffffff83025440 r SEDiDtCtrl2Config_Vega10 +ffffffff83025510 r SEDiDtCtrl3Config_vega10 +ffffffff83025820 r SEDiDtTuningCtrlConfig_Vega10 +ffffffff830258b0 r SELCacConfig_Vega10 +ffffffff83025a40 r SEDiDtCtrl0Config_Vega10 +ffffffff83025d10 r AvfsPSMInitConfig_vega10 +ffffffff83025d90 r SEEDCStallPatternConfig_Vega10 +ffffffff83025ea0 r SEEDCStallDelayConfig_Vega10 +ffffffff83025f80 r SEEDCCtrlConfig_Vega10 +ffffffff83026040 r PSMSEEDCStallPatternConfig_Vega10 +ffffffff830260c0 r PSMSEEDCStallDelayConfig_Vega10 +ffffffff830261d0 r PSMSEEDCCtrlResetConfig_Vega10 +ffffffff83026290 r PSMSEEDCCtrlConfig_Vega10 +ffffffff83026350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff830263e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff83027000 R vega10_pptable_funcs +ffffffff83028000 r pre_baco_tbl +ffffffff83028090 r enter_baco_tbl +ffffffff830282b0 r exit_baco_tbl +ffffffff83028520 r clean_baco_tbl +ffffffff83029000 r vega12_hwmgr_funcs +ffffffff830292f0 r SMU7ThermalWithDelayPolicy +ffffffff83029340 r link_width +ffffffff8302a000 R vega12_pptable_funcs +ffffffff8302b000 r clean_baco_tbl +ffffffff8302c000 r vega20_hwmgr_funcs +ffffffff8302c2f0 r SMU7ThermalWithDelayPolicy +ffffffff8302c340 r link_width +ffffffff8302d000 R vega20_pptable_funcs +ffffffff8302e000 R ci_smu_funcs +ffffffff8302e0e0 r defaults_hawaii_pro +ffffffff8302e12c r defaults_hawaii_xt +ffffffff8302e178 r defaults_saturn_xt +ffffffff8302e1c4 r defaults_bonaire_xt +ffffffff8302e210 r ci_program_jump_on_start.data +ffffffff8302f000 R fiji_smu_funcs +ffffffff8302f0e0 r avfs_graphics_level +ffffffff8302f240 r fiji_power_tune_data_set_array +ffffffff8302f246 r fiji_clock_stretch_amount_conversion +ffffffff8302f260 r fiji_clock_stretcher_ddt_table +ffffffff83030000 R iceland_smu_funcs +ffffffff830300e0 r defaults_icelandxt +ffffffff8303012c r defaults_icelandpro +ffffffff83030178 r defaults_iceland +ffffffff83031000 R polaris10_smu_funcs +ffffffff830310e0 r avfs_graphics_level_polaris10 +ffffffff830312a0 r avfs_memory_level_polaris10 +ffffffff830312c0 r polaris10_power_tune_data_set_array +ffffffff83031310 r Range_Table +ffffffff83032000 R smu10_smu_funcs +ffffffff83033000 r smu7_program_jump_on_start.data +ffffffff83033010 r pwr_virus_table_pre +ffffffff83033680 r pwr_virus_table_post +ffffffff83033f80 r pwr_virus_section1 +ffffffff83034610 r pwr_virus_section2 +ffffffff83034660 r pwr_virus_section3 +ffffffff8303bab0 r pwr_virus_section4 +ffffffff8303be80 r pwr_virus_section5 +ffffffff8303c490 r pwr_virus_section6 +ffffffff8303e000 R smu8_smu_funcs +ffffffff8303f000 R tonga_smu_funcs +ffffffff8303f0e0 r tonga_power_tune_data_set_array +ffffffff8303f12c r tonga_clock_stretch_amount_conversion +ffffffff8303f140 r tonga_clock_stretcher_ddt_table +ffffffff83040000 R vega10_smu_funcs +ffffffff83041000 R vega12_smu_funcs +ffffffff83042000 R vega20_smu_funcs +ffffffff83043000 R vegam_smu_funcs +ffffffff830430e0 r vegam_power_tune_data_set_array +ffffffff83043130 r Range_Table +ffffffff83044000 R smu_ip_funcs +ffffffff830440a8 R smu_v11_0_ip_block +ffffffff830440c0 R smu_v12_0_ip_block +ffffffff830440d8 R smu_v13_0_ip_block +ffffffff830440f0 r swsmu_pm_funcs +ffffffff83045000 r arcturus_ppt_funcs +ffffffff830453f0 r arcturus_table_map +ffffffff83045470 r arcturus_pwr_src_map +ffffffff83045480 r arcturus_workload_map +ffffffff830454d0 r smu11_thermal_policy +ffffffff83045528 r arcturus_i2c_algo +ffffffff83045538 r arcturus_i2c_control_quirks +ffffffff83045550 r arcturus_throttler_map +ffffffff83045570 r arcturus_message_map +ffffffff83045ff0 r arcturus_clk_map +ffffffff830460b0 r arcturus_feature_mask_map +ffffffff83047000 r cyan_skillfish_ppt_funcs +ffffffff83048000 r navi10_ppt_funcs +ffffffff830483f0 r smu11_thermal_policy +ffffffff83048448 r navi10_i2c_algo +ffffffff83048458 r navi10_i2c_control_quirks +ffffffff83048470 r navi1x_throttler_map +ffffffff83048490 r NoDbiPrbs7 +ffffffff83049490 r DbiPrbs7 +ffffffff8304b000 r sienna_cichlid_ppt_funcs +ffffffff8304b3f0 r smu11_thermal_policy +ffffffff8304b448 r sienna_cichlid_i2c_algo +ffffffff8304b458 r sienna_cichlid_i2c_control_quirks +ffffffff8304b470 r sienna_cichlid_throttler_map +ffffffff8304c000 r smu_v11_0_irq_funcs +ffffffff8304c010 r link_width +ffffffff8304d000 r vangogh_ppt_funcs +ffffffff8304d3e8 r vangogh_throttler_map +ffffffff8304e000 r renoir_ppt_funcs +ffffffff8304e3e8 r renoir_throttler_map +ffffffff8304f000 r aldebaran_ppt_funcs +ffffffff8304f3f0 r aldebaran_clk_map +ffffffff8304f4b0 r aldebaran_table_map +ffffffff8304f530 r smu13_thermal_policy +ffffffff8304f588 r aldebaran_i2c_algo +ffffffff8304f598 r aldebaran_i2c_control_quirks +ffffffff8304f5b0 r aldebaran_throttler_map +ffffffff8304f5d0 r aldebaran_message_map +ffffffff83050050 r aldebaran_feature_mask_map +ffffffff83051000 R pmfw_decoded_link_speed +ffffffff83051020 R pmfw_decoded_link_width +ffffffff83051040 r smu_v13_0_irq_funcs +ffffffff83052000 r smu_v13_0_0_ppt_funcs +ffffffff830523f0 r smu13_thermal_policy +ffffffff83052448 r smu_v13_0_0_i2c_algo +ffffffff83052458 r smu_v13_0_0_i2c_control_quirks +ffffffff83052470 r smu_v13_0_0_throttler_map +ffffffff83053000 r smu_v13_0_4_ppt_funcs +ffffffff83054000 r smu_v13_0_5_ppt_funcs +ffffffff83055000 r smu_v13_0_6_ppt_funcs +ffffffff830553f0 r smu_v13_0_6_message_map +ffffffff83055e70 r smu_v13_0_6_clk_map +ffffffff83055f30 r smu_v13_0_6_table_map +ffffffff83055fb0 r smu_v13_0_6_i2c_algo +ffffffff83055fc0 r smu_v13_0_6_i2c_control_quirks +ffffffff83055fd0 r smu_v13_0_6_irq_funcs +ffffffff83055fe0 r smu_v13_0_6_throttler_map +ffffffff83055ff0 r smu_v13_0_6_feature_mask_map +ffffffff83057000 r smu_v13_0_7_ppt_funcs +ffffffff830573f0 r smu13_thermal_policy +ffffffff83057450 r smu_v13_0_7_throttler_map +ffffffff83058000 r yellow_carp_ppt_funcs +ffffffff83059000 R link_speed +ffffffff83059020 r __smu_message_names +ffffffff8305a000 R pchb_ca +ffffffff8305b000 R amas_ca +ffffffff8305b028 R amas_devices +ffffffff8305b040 r amas_feature +ffffffff8305c000 R cardslot_ca +ffffffff8305d000 R cardbus_ca +ffffffff8305e000 R com_cardbus_ca +ffffffff8305f000 R xl_cardbus_ca +ffffffff8305f030 R xl_cardbus_products +ffffffff83060000 R dc_cardbus_ca +ffffffff83060030 R dc_cardbus_devices +ffffffff83061000 R fxp_cardbus_ca +ffffffff83061028 R fxp_cardbus_devices +ffffffff83062000 R rl_cardbus_devices +ffffffff83062028 R rl_cardbus_ca +ffffffff83063000 R re_cardbus_ca +ffffffff83063028 R re_cardbus_devices +ffffffff83064000 R ath_cardbus_ca +ffffffff83065000 R athn_cardbus_ca +ffffffff83065030 r athn_cardbus_devices +ffffffff83066000 R atw_cardbus_ca +ffffffff83066028 R atw_cardbus_devices +ffffffff83067000 R rtw_cardbus_ca +ffffffff83067028 R rtw_cardbus_devices +ffffffff83068000 R ral_cardbus_ca +ffffffff83068030 r ral_cardbus_devices +ffffffff83069000 R acx_cardbus_ca +ffffffff83069028 r acx_cardbus_devices +ffffffff8306a000 R pgt_cardbus_ca +ffffffff8306a028 R pgt_cardbus_devices +ffffffff8306b000 R ehci_cardbus_ca +ffffffff8306c000 R ohci_cardbus_ca +ffffffff8306d000 R uhci_cardbus_ca +ffffffff8306e000 R malo_cardbus_ca +ffffffff8306e028 r malo_cardbus_devices +ffffffff8306f000 R bwi_cardbus_ca +ffffffff8306f030 r bwi_cardbus_devices +ffffffff83070000 R pcmcia_ca +ffffffff83071000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff83072000 r pcmcia_cis_quirks +ffffffff83073000 R ep_pcmcia_ca +ffffffff83074000 R ne_pcmcia_ca +ffffffff83074030 R ne2000devs +ffffffff83076000 R aic_pcmcia_ca +ffffffff83077000 R com_pcmcia_ca +ffffffff83078000 R wdc_pcmcia_ca +ffffffff83079000 R sm_pcmcia_ca +ffffffff8307a000 R xe_pcmcia_ca +ffffffff8307b000 R wi_pcmcia_ca +ffffffff8307b030 r wi_pcmcia_products +ffffffff8307c000 R malo_pcmcia_ca +ffffffff8307d000 R an_pcmcia_ca +ffffffff8307e000 R pcib_ca +ffffffff8307f000 R amdpcib_ca +ffffffff8307f028 R amdpcib_devices +ffffffff83080000 R tcpcib_ca +ffffffff83080028 R tcpcib_devices +ffffffff83081000 R aapic_ca +ffffffff83082000 R hme_pci_ca +ffffffff83082028 r hme_promhdr +ffffffff8308202a r hme_promdat +ffffffff83083000 R isa_ca +ffffffff83084000 R isadma_ca +ffffffff83085000 R fdc_ca +ffffffff83086000 R fd_ca +ffffffff83087000 R com_isa_ca +ffffffff83088000 R pckbc_isa_ca +ffffffff83089000 R vga_isa_ca +ffffffff8308a000 R wdc_isa_ca +ffffffff8308b000 R mpu_midi_hw_if +ffffffff8308c000 R mpu_isa_ca +ffffffff8308d000 R pcppi_ca +ffffffff8308e000 R spkr_ca +ffffffff8308e030 r pitchtab +ffffffff8308f000 R lpt_isa_ca +ffffffff83090000 R wbsio_ca +ffffffff83091000 R schsio_ca +ffffffff83092000 R lm_isa_ca +ffffffff83092028 R lm_wbsio_ca +ffffffff83093000 R it_sensors +ffffffff83093110 R it_vrfact +ffffffff83093140 R it_fan_regs +ffffffff83093160 R it_fan_ext_regs +ffffffff83093178 R it_ca +ffffffff83094000 R abitkv_sensors +ffffffff83094200 R abitaa_sensors +ffffffff83094480 R abitav_sensors +ffffffff83094700 R abitas_sensors +ffffffff83094980 R abitax_sensors +ffffffff83094bc0 R abitm4_sensors +ffffffff83094e80 R abitan_sensors +ffffffff83095120 R abital_sensors +ffffffff830953a0 R abitaw_sensors +ffffffff83095700 R abitni_sensors +ffffffff830959a0 R abitat_sensors +ffffffff83095cc0 R abitan2_sensors +ffffffff83095f60 R abitab_sensors +ffffffff83096220 R abitan3_sensors +ffffffff83096500 R abitaw2_sensors +ffffffff83096860 R abitat2_sensors +ffffffff83096b60 R abitab2_sensors +ffffffff83096ea0 R abitin_sensors +ffffffff830971e0 R uguru_ca +ffffffff83098000 R aps_ca +ffffffff83099000 R wsdisplay_ca +ffffffff83099030 r charClass +ffffffff8309a000 r usl_syncops +ffffffff8309b000 R wsevent_filtops +ffffffff8309c000 R wskbd_ca +ffffffff8309d000 r latin1_to_upper +ffffffff8309e000 R wsmouse_ca +ffffffff8309f000 R cyrillic_to_koi8 +ffffffff8309f060 R unicode_to_latin2 +ffffffff8309f0e0 R unicode_to_latin7 +ffffffff830a0000 R wsemul_vt100_ops +ffffffff830a1000 r decspcgr2uni +ffffffff830a1100 r dectech2uni +ffffffff830a1200 r nrctable +ffffffff830a2000 r vt100_fkeys +ffffffff830a20c0 r vt100_pfkeys +ffffffff830a20e0 r vt100_numpad +ffffffff830a3000 R pckbd_ca +ffffffff830a3028 R pckbd_accessops +ffffffff830a3040 R pckbd_consops +ffffffff830a3060 R pckbd_keymapdata +ffffffff830a3070 R pckbd_xtbl2 +ffffffff830a3100 R pckbd_xtbl2_ext +ffffffff830a4000 r pckbd_keydesc_us +ffffffff830a4250 r pckbd_keydesc_de +ffffffff830a42f0 r pckbd_keydesc_de_nodead +ffffffff830a4310 r pckbd_keydesc_fr +ffffffff830a43d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff830a4510 r pckbd_keydesc_dk +ffffffff830a45a0 r pckbd_keydesc_dk_nodead +ffffffff830a45b0 r pckbd_keydesc_it +ffffffff830a4640 r pckbd_keydesc_uk +ffffffff830a46e0 r pckbd_keydesc_jp +ffffffff830a4750 r pckbd_keydesc_sv +ffffffff830a4780 r pckbd_keydesc_sv_nodead +ffffffff830a4790 r pckbd_keydesc_no +ffffffff830a47c0 r pckbd_keydesc_no_nodead +ffffffff830a47d0 r pckbd_keydesc_us_declk +ffffffff830a4860 r pckbd_keydesc_us_dvorak +ffffffff830a4900 r pckbd_keydesc_us_colemak +ffffffff830a4948 r pckbd_keydesc_swapctrlcaps +ffffffff830a4960 r pckbd_keydesc_iopener +ffffffff830a49b0 r pckbd_keydesc_es +ffffffff830a4a50 r pckbd_keydesc_be +ffffffff830a4b10 r pckbd_keydesc_ru +ffffffff830a4c80 r pckbd_keydesc_ua +ffffffff830a4e10 r pckbd_keydesc_sg +ffffffff830a4ec0 r pckbd_keydesc_sg_nodead +ffffffff830a4ee0 r pckbd_keydesc_sf +ffffffff830a4f00 r pckbd_keydesc_pt +ffffffff830a4f90 r pckbd_keydesc_lt +ffffffff830a5070 r pckbd_keydesc_la +ffffffff830a5100 r pckbd_keydesc_br +ffffffff830a5180 r pckbd_keydesc_tr +ffffffff830a5230 r pckbd_keydesc_tr_nodead +ffffffff830a5250 r pckbd_keydesc_pl +ffffffff830a52b0 r pckbd_keydesc_hu +ffffffff830a53c0 r pckbd_keydesc_si +ffffffff830a54d0 r pckbd_keydesc_cf +ffffffff830a55a0 r pckbd_keydesc_cf_nodead +ffffffff830a55c0 r pckbd_keydesc_lv +ffffffff830a5640 r pckbd_keydesc_nl +ffffffff830a5720 r pckbd_keydesc_nl_nodead +ffffffff830a5740 r pckbd_keydesc_is +ffffffff830a57cc r pckbd_keydesc_is_nodead +ffffffff830a57e0 r pckbd_keydesc_ee +ffffffff830a5890 r pckbd_keydesc_ee_nodead +ffffffff830a58b0 R pckbd_keydesctab +ffffffff830a6000 R pms_ca +ffffffff830a6028 R pms_accessops +ffffffff830a6040 R pms_sec_accessops +ffffffff830a6060 R pms_protocols +ffffffff830a61e0 r alps_models +ffffffff830a7000 R skgpio_led_offset +ffffffff830a7008 R skgpio_ca +ffffffff830a8000 R hidkbd_trtab +ffffffff830a8100 r apple_fn_trans +ffffffff830a8120 r apple_tb_trans +ffffffff830a8140 r apple_mba_trans +ffffffff830a9000 r hidcc_attach_wskbd.accessops +ffffffff830a9020 r hidcc_keysyms +ffffffff830aa000 R usb_ca +ffffffff830ab000 R usb_known_products +ffffffff830b7280 R usb_known_vendors +ffffffff830b9ab0 R usbd_error_strs +ffffffff830ba000 R usb_quirks +ffffffff830ba3e4 R usb_dev_quirks +ffffffff830ba3ec R usbd_no_quirk +ffffffff830bb000 R uhub_ca +ffffffff830bb028 R uhub_uhub_ca +ffffffff830bc000 R uaudio_ca +ffffffff830bc028 R uaudio_hw_if +ffffffff830bc0e0 R uaudio_rates +ffffffff830bc120 r uaudio_clkname.names +ffffffff830bc140 r uaudio_feature_addent.features +ffffffff830bd000 R uvideo_ca +ffffffff830bd028 R uvideo_hw_if +ffffffff830bd100 R uvideo_devs +ffffffff830be000 r utvfu_select_norm.pal +ffffffff830be040 r utvfu_select_norm.ntsc +ffffffff830be080 r utvfu_setup_capture.setup +ffffffff830be180 r utvfu_audio_start_chip.setup +ffffffff830be1c8 r utvfu_audio_stop_chip.setup +ffffffff830be1d8 R utvfu_ca +ffffffff830be200 R utvfu_vid_hw_if +ffffffff830be2d0 R utvfu_au_hw_if +ffffffff830bf000 R udl_ca +ffffffff830bf030 r udl_devs +ffffffff830bf110 r udl_modes +ffffffff830c0000 R umidi_hw_if +ffffffff830c0030 R umidi_ca +ffffffff830c0060 r umidi_evlen +ffffffff830c0080 r packet_length +ffffffff830c1000 r quirk_name +ffffffff830c2000 R ucom_ca +ffffffff830c3000 R ugen_ca +ffffffff830c3028 R ugenread_intr_filtops +ffffffff830c3058 R ugenread_isoc_filtops +ffffffff830c4000 R uhidev_ca +ffffffff830c4030 r uhid_graphire_report_descr +ffffffff830c40b0 r uhid_graphire3_4x5_report_descr +ffffffff830c4160 r uhid_xb360gp_report_descr +ffffffff830c4210 r uhid_xbonegp_report_descr +ffffffff830c5000 R uhid_ca +ffffffff830c5028 R uhidread_filtops +ffffffff830c6000 R fido_ca +ffffffff830c7000 R ujoy_ca +ffffffff830c8000 r ukbd_keydesc_us +ffffffff830c82a0 r ukbd_keydesc_de +ffffffff830c8350 r ukbd_keydesc_de_nodead +ffffffff830c8370 r ukbd_keydesc_fr +ffffffff830c8430 r ukbd_keydesc_fr_apple +ffffffff830c8570 r ukbd_keydesc_fr_dvorak_bepo +ffffffff830c86b0 r ukbd_keydesc_dk +ffffffff830c8750 r ukbd_keydesc_dk_nodead +ffffffff830c8760 r ukbd_keydesc_it +ffffffff830c8800 r ukbd_keydesc_uk +ffffffff830c88b0 r ukbd_keydesc_jp +ffffffff830c8920 r ukbd_keydesc_sv +ffffffff830c8950 r ukbd_keydesc_sv_nodead +ffffffff830c8960 r ukbd_keydesc_no +ffffffff830c8990 r ukbd_keydesc_no_nodead +ffffffff830c89a0 r ukbd_keydesc_us_dvorak +ffffffff830c8a40 r ukbd_keydesc_us_colemak +ffffffff830c8a88 r ukbd_keydesc_swapctrlcaps +ffffffff830c8aa0 r ukbd_keydesc_iopener +ffffffff830c8af0 r ukbd_keydesc_es +ffffffff830c8b90 r ukbd_keydesc_be +ffffffff830c8c50 r ukbd_keydesc_ru +ffffffff830c8dc0 r ukbd_keydesc_ua +ffffffff830c8f60 r ukbd_keydesc_sg +ffffffff830c9020 r ukbd_keydesc_sg_nodead +ffffffff830c9040 r ukbd_keydesc_sf +ffffffff830c9060 r ukbd_keydesc_pt +ffffffff830c90f0 r ukbd_keydesc_pt_apple +ffffffff830c9110 r ukbd_keydesc_lt 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uts_accessops +ffffffff830cd028 R uts_ca +ffffffff830ce000 R ubcmtp_accessops +ffffffff830ce018 R ubcmtp_ca +ffffffff830ce040 r ubcmtp_devices +ffffffff830cf000 R ucycom_methods +ffffffff830cf040 R ucycom_devs +ffffffff830cf050 R ucycom_ca +ffffffff830d0000 R uslhcom_methods +ffffffff830d0040 R uslhcom_ca +ffffffff830d0068 r uslhcom_devs +ffffffff830d1000 R ulpt_ca +ffffffff830d2000 R umass_ca +ffffffff830d2028 R umass_bbb_methods +ffffffff830d2040 R umass_cbi_methods +ffffffff830d3000 R umass_quirks +ffffffff830d4000 R umass_scsi_switch +ffffffff830d5000 R uthum_devs +ffffffff830d5008 R uthum_ca +ffffffff830d5030 r uthum_sensor_type_s +ffffffff830d6000 R ugold_devs +ffffffff830d6018 R ugold_ca +ffffffff830d7000 R utrh_devs +ffffffff830d7008 R utrh_ca +ffffffff830d8000 R uoakrh_devs +ffffffff830d8008 R uoakrh_ca +ffffffff830d8030 R uoakrh_methods +ffffffff830d9000 R uoaklux_devs +ffffffff830d9008 R uoaklux_ca +ffffffff830d9030 R uoaklux_methods +ffffffff830da000 R uoakv_devs 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qla_cd +ffffffff83456000 D ahci_cd +ffffffff83457000 D nvme_cd +ffffffff83458000 D mpi_cd +ffffffff83459000 D sili_error_test_inv_p +ffffffff83459004 D sili_error_restart_type +ffffffff83459008 D sili_cd +ffffffff8345a000 D esp_cd +ffffffff8345a020 D ncr53c9x_variant_names +ffffffff8345b000 D E_abs_script_sched_slot0_Used +ffffffff8345b0a0 D E_abs_targ0_Used +ffffffff8345b0dc D E_abs_msgin_Used +ffffffff8345b0e8 D E_abs_lunsw_return_Used +ffffffff8345b0f0 D E_abs_tag0_Used +ffffffff8345b130 D E_ldsa_abs_reselected_Used +ffffffff8345b134 D E_ldsa_abs_reselect_Used +ffffffff8345b138 D E_ldsa_abs_selected_Used +ffffffff8345b13c D E_ldsa_abs_data_Used +ffffffff8345b140 D E_ldsa_abs_slot_Used +ffffffff8345b148 D siop_cd +ffffffff8345c000 D ep_isa_media +ffffffff8345c060 D ep_cd +ffffffff8345d000 D wi_cd +ffffffff8345d020 D wi_func_io +ffffffff8345e000 D an_cd +ffffffff8345f000 D xl_cd +ffffffff83460000 D fxp_int_delay +ffffffff83460004 D fxp_bundle_max +ffffffff83460008 D fxp_min_size_mask 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bwfm_2ghz_channels +ffffffff83471010 D bwfm_5ghz_channels +ffffffff83471030 D bwfm_proto_bcdc_ops +ffffffff83471050 D bwfm_cd +ffffffff83472000 D atw_bbp_io_enable_delay +ffffffff83472004 D atw_bbp_io_disable_delay +ffffffff83472008 D atw_writewep_delay +ffffffff8347200c D atw_dwelltime +ffffffff83472010 D atw_cd +ffffffff83473000 D rtw_dwelltime +ffffffff83473004 D rtw_macbangbits_timeout +ffffffff83473008 D rtw_cd +ffffffff83474000 D ral_cd +ffffffff83475000 D rt3090_freqs +ffffffff83476000 D acx_beacon_intvl +ffffffff83476008 D acx_cd +ffffffff83477000 D pgt_cd +ffffffff83478000 D sf_cd +ffffffff83479000 D malo_cd +ffffffff8347a000 D bwi_cd +ffffffff8347a020 D bwi_constraint +ffffffff8347a030 D bwi_pa_mode +ffffffff8347b000 D qwx_cd +ffffffff8347b020 D qmi_data_type_name +ffffffff8347c000 D iosf_cd +ffffffff8347c020 d iosf_lock +ffffffff8347c030 d iosf_mbi_mtx +ffffffff8347d000 D uhci_cd +ffffffff8347e000 D ohci_cd +ffffffff8347f000 D ehci_cd +ffffffff83480000 D xhci_cd +ffffffff83481000 D ccp_cd +ffffffff83482000 D psp_cd +ffffffff83483000 D sdhc_functions +ffffffff83483068 D sdhc_cd +ffffffff83484000 D rtsx_functions +ffffffff83484068 D rtsx_cd +ffffffff83485000 D radio_cd +ffffffff83486000 D kcs_if +ffffffff83486040 D smic_if +ffffffff83486080 D bt_if +ffffffff834860c0 D ipmi_cd +ffffffff834860e0 D maxsdrlen +ffffffff83487000 D vscsi_cd +ffffffff83488000 D mpath_cd +ffffffff83489000 D softraid_cd +ffffffff83489020 D smd +ffffffff8348a000 D spdmem_cd +ffffffff8348b000 D dwiic_cd +ffffffff8348c000 D dwqe_cd +ffffffff8348d000 D ufshci_cd +ffffffff8348e000 D kstat_lock +ffffffff8348e010 D kstat_next_id +ffffffff8348e018 D kstat_default_lock +ffffffff8348f000 D pf_inp_mtx +ffffffff8348f010 D pf_hdr_limit +ffffffff8348f020 D pf_pool_limits +ffffffff8348f090 D pf_state_list +ffffffff8348f0c0 D pf_purge_states_task +ffffffff8348f0f0 D pf_purge_states_to +ffffffff8348f138 D pf_purge_states_collect +ffffffff8348f140 D pf_purge_to +ffffffff8348f188 D pf_purge_task +ffffffff83490000 D pf_tags +ffffffff83490010 D pf_qids +ffffffff83490020 D pf_lock +ffffffff83490030 D pf_state_lock +ffffffff83490040 D pfioctl_rw +ffffffff83490050 d pf_open_trans.ticket +ffffffff83491000 D pfi_update +ffffffff83492000 D pflog_cloner +ffffffff83493000 D pfsync_cloner +ffffffff83494000 D pflow_cloner +ffffffff83495000 d hotplug_mtx +ffffffff83496000 D pppoe_cloner +ffffffff83496030 D pppoediscinq +ffffffff83496060 D pppoeinq +ffffffff83497000 D dt_lock +ffffffff83498000 D dt_prov_profile +ffffffff83498030 D dt_prov_interval +ffffffff83499000 D dtps_nsysent +ffffffff83499008 D dt_prov_syscall +ffffffff8349a000 D dt_prov_static +ffffffff8349a030 D dt_static_sched_dequeue +ffffffff8349a0a0 D dt_static_sched_enqueue +ffffffff8349a110 D dt_static_sched_fork +ffffffff8349a180 D dt_static_sched_off__cpu +ffffffff8349a1f0 D dt_static_sched_on__cpu +ffffffff8349a260 D dt_static_sched_remain__cpu +ffffffff8349a2d0 D dt_static_sched_sleep +ffffffff8349a340 D dt_static_sched_steal +ffffffff8349a3b0 D dt_static_sched_unsleep +ffffffff8349a420 D dt_static_sched_wakeup +ffffffff8349a490 D dt_static_raw_syscalls_sys_enter +ffffffff8349a500 D dt_static_raw_syscalls_sys_exit +ffffffff8349a570 D dt_static_uvm_fault +ffffffff8349a5e0 D dt_static_uvm_map_insert +ffffffff8349a650 D dt_static_uvm_map_remove +ffffffff8349a6c0 D dt_static_uvm_malloc +ffffffff8349a730 D dt_static_uvm_free +ffffffff8349a7a0 D dt_static_uvm_pool_get +ffffffff8349a810 D dt_static_uvm_pool_put +ffffffff8349a880 D dt_static_vfs_bufcache_rel +ffffffff8349a8f0 D dt_static_vfs_bufcache_take +ffffffff8349a960 D dt_static_vfs_cleaner +ffffffff8349a9d0 D dt_static_vmm_guest_enter +ffffffff8349aa40 D dt_static_vmm_guest_exit +ffffffff8349aab0 D dt_static_vmm_inout +ffffffff8349ab20 D dt_static_smr_call +ffffffff8349ab90 D dt_static_smr_called +ffffffff8349ac00 D dt_static_smr_barrier_enter +ffffffff8349ac70 D dt_static_smr_barrier_exit +ffffffff8349ace0 D dt_static_smr_wakeup +ffffffff8349ad50 D dt_static_smr_thread +ffffffff8349adc0 D dt_static_refcnt_none +ffffffff8349ae30 D dt_static_refcnt_ethmulti +ffffffff8349aea0 D dt_static_refcnt_ifaddr +ffffffff8349af10 D dt_static_refcnt_ifmaddr +ffffffff8349af80 D dt_static_refcnt_inpcb +ffffffff8349aff0 D dt_static_refcnt_rtentry +ffffffff8349b060 D dt_static_refcnt_syncache +ffffffff8349b0d0 D dt_static_refcnt_tdb +ffffffff8349c000 D db_next_free_breakpoint +ffffffff8349c008 D db_breakpoints_inserted +ffffffff8349d000 D db_ed_style +ffffffff8349e000 D db_examine_format +ffffffff8349e078 D db_print_format +ffffffff8349f000 D db_history_size +ffffffff8349f008 D db_history_curr +ffffffff8349f010 D db_history_last +ffffffff834a0000 D db_tab_stop_width +ffffffff834a0004 D db_max_line +ffffffff834a0008 D db_max_width +ffffffff834a000c D db_radix +ffffffff834a1000 D db_lastsym +ffffffff834a1008 D db_maxoff +ffffffff834a2000 D db_vars +ffffffff834a2090 D db_evars +ffffffff834a3000 D db_watchpoints_inserted +ffffffff834a3008 D db_next_free_watchpoint +ffffffff834a4000 D db_log +ffffffff834a5000 D audio_cd +ffffffff834a5020 D audio_lock +ffffffff834a6000 D midi_cd +ffffffff834a7000 D rnd_cold +ffffffff834a7004 D rnd_slowextract +ffffffff834a7008 D rnd_timeout +ffffffff834a7050 D rndlock +ffffffff834a7060 D rndreinit_timeout +ffffffff834a70a8 D rnd_task +ffffffff834a8000 D video_cd +ffffffff834a9000 d rrip_table_analyze +ffffffff834a90e0 d rrip_table_getname +ffffffff834a91e0 d rrip_table_getsymname +ffffffff834a9280 d rrip_table_extref +ffffffff834aa000 D nexecs +ffffffff834ab000 D elf_note_names +ffffffff834ac000 D ncpus +ffffffff834ac004 D ncpusfound +ffffffff834ad000 D acct_lock +ffffffff834ad010 D acctsuspend +ffffffff834ad014 D acctresume +ffffffff834ad018 D acctrate +ffffffff834ae000 D bufqs_mtx +ffffffff834af000 D ticks +ffffffff834b0000 D fhdlk +ffffffff834b1000 D kqueue_klist_lock +ffffffff834b1010 D kqueue_ps_list_lock +ffffffff834b1020 D kq_timeoutmax +ffffffff834b2000 D stackgap_random +ffffffff834b3000 D deadproc_mutex +ffffffff834b4000 D nprocesses +ffffffff834b4004 D nthreads +ffffffff834b4008 D fork_tfmrate +ffffffff834b5000 D kthread_q +ffffffff834b6000 D nkmempages +ffffffff834b6008 D malloc_mtx +ffffffff834b6020 D memname +ffffffff834b64b0 D sysctl_kmemlock +ffffffff834b64c0 D malloc_errintvl +ffffffff834b7000 D maxdmap +ffffffff834b7008 D maxsmap +ffffffff834b7010 D rlimit_lock +ffffffff834b8000 D sched_cost_priority +ffffffff834b8004 D sched_cost_runnable +ffffffff834b8008 D sched_cost_resident +ffffffff834b9000 D intrmap_lock +ffffffff834ba000 D nosuidcoredump +ffffffff834ba008 D sigio_lock +ffffffff834bb000 D smr_lock +ffffffff834bb010 D smr_logintvl +ffffffff834bc000 D startuphook_list +ffffffff834bd000 D sysctl_lock +ffffffff834bd010 D sysctl_disklock +ffffffff834bd020 d openbsd +ffffffff834bd024 d arg_max +ffffffff834bd028 d posix_version +ffffffff834bd02c d ngroups_max +ffffffff834bd030 d int_one +ffffffff834bd034 d maxpartitions +ffffffff834bd038 d raw_part +ffffffff834bd03c D allowpowerdown +ffffffff834bd040 D hw_power +ffffffff834bd044 d byte_order +ffffffff834be000 D tc_lock +ffffffff834be010 D windup_mtx +ffffffff834be020 d dummy_timecounter +ffffffff834be070 D timecounter +ffffffff834be078 d timehands +ffffffff834be080 d th0 +ffffffff834be118 d th1 +ffffffff834bf000 D itimer_mtx +ffffffff834bf010 D ratecheck_mtx +ffffffff834bf020 D ppsratecheck_mtx +ffffffff834bf030 D resettodr_to +ffffffff834bf078 D resettodr_task +ffffffff834c0000 D timeout_mutex +ffffffff834c1000 D wdog_auto +ffffffff834c2000 D taskq_sys +ffffffff834c2050 D taskq_sys_mp +ffffffff834c3000 d update_loadavg.to +ffffffff834c3048 D ccpu +ffffffff834c3050 d schedcpu.to +ffffffff834c3098 D perflevel +ffffffff834c309c D perfpolicy_on_ac +ffffffff834c30a0 D perfpolicy_on_battery +ffffffff834c30a8 D setperf_to +ffffffff834c4000 D autoconf_attdet_mtx +ffffffff834c4010 D msgs +ffffffff834c5000 d evcount_list +ffffffff834c5010 d evcount_percpu_init_list +ffffffff834c6000 D syslogf_rwlock +ffffffff834c6010 D log_mtx +ffffffff834c6020 D log_kq_mtx +ffffffff834c6030 D logstash_in +ffffffff834c6038 D logstash_out +ffffffff834c6040 D logstash_rwlock +ffffffff834c7000 D pool_head +ffffffff834c7010 D pool_lock +ffffffff834c7020 D pool_debug +ffffffff834c7028 D pool_allocator_single +ffffffff834c7040 D pool_allocator_multi +ffffffff834c7058 D pool_allocator_multi_ni +ffffffff834c7070 D pool_gc_tick +ffffffff834c70b8 D pool_gc_task +ffffffff834c8000 D kprintf_mutex +ffffffff834c8010 D db_panic +ffffffff834c8014 D splassert_ctl +ffffffff834c8018 D v_putc +ffffffff834c8020 D printf_flags +ffffffff834c9000 D userconf_base +ffffffff834c9004 D userconf_maxdev +ffffffff834c9008 D userconf_totdev +ffffffff834c900c D userconf_maxlocnames +ffffffff834c9010 D userconf_cnt +ffffffff834c9014 D userconf_lines +ffffffff834c9018 D userconf_histsz +ffffffff834c9020 D userconf_cmds +ffffffff834ca000 D ftlock +ffffffff834cb000 d ppollcollect.poll_errintvl +ffffffff834cc000 D ttydefchars +ffffffff834cc014 D ttclos +ffffffff834cc01b D ttopen +ffffffff834cc022 D ttybg +ffffffff834cc028 D ttyin +ffffffff834cc02e D ttyout +ffffffff834cc038 D ttylist_lock +ffffffff834cd000 D linesw +ffffffff834cd280 D nlinesw +ffffffff834ce000 D pt_softc_lock +ffffffff834cf000 d mbstat_boot_boot_cpumem +ffffffff834cf0c0 D mbstat +ffffffff834cf0d0 D mclsizes +ffffffff834cf0f0 D m_extref_mtx +ffffffff834cf100 D m_pool_allocator +ffffffff834cf120 D m_types +ffffffff834d0000 D somaxconn +ffffffff834d0004 D sominconn +ffffffff834d0008 D sosplice_lock +ffffffff834d1000 D sb_max +ffffffff834d2000 D unp_df_lock +ffffffff834d2010 D unp_gc_lock +ffffffff834d2020 D unp_rights_mtx +ffffffff834d2030 D unp_ino_mtx +ffffffff834d2040 D unp_gc_task +ffffffff834d2070 D unpst_sendspace +ffffffff834d2074 D unpst_recvspace +ffffffff834d2078 D unpsq_sendspace +ffffffff834d207c D unpsq_recvspace +ffffffff834d2080 D unpdg_sendspace +ffffffff834d2084 D unpdg_recvspace +ffffffff834d3000 D doingcache +ffffffff834d4000 D maxvfsconf +ffffffff834d4010 d vfsconflist +ffffffff834d5000 D lockf_lock +ffffffff834d5010 D maxlocksperuid +ffffffff834d6000 D iftovt_tab +ffffffff834d6040 D vttoif_tab +ffffffff834d6064 D suid_clear +ffffffff834d6068 D vnode_mtx +ffffffff834d6078 D vfs_stall_lock +ffffffff834d6090 D vtypes +ffffffff834d60e0 D vtags +ffffffff834d7000 D syncer_maxdelay +ffffffff834d7004 D syncdelay +ffffffff834d8000 D dosdirtemplate +ffffffff834d9000 D ntfs_hashlock +ffffffff834da000 D ntfs_toupper_lock +ffffffff834db000 D art_table_gc_mtx +ffffffff834db010 D art_table_gc_task +ffffffff834db040 D art_node_gc_mtx +ffffffff834db050 D art_node_gc_task +ffffffff834dc000 D bpf_bufsize +ffffffff834dc004 D bpf_maxbufsize +ffffffff834dc008 D bpf_iflist +ffffffff834dd000 D ifg_head +ffffffff834dd010 D if_cloners_lock +ffffffff834dd020 D if_hooks_mtx +ffffffff834dd030 D if_input_task_locked +ffffffff834dd060 D netlock +ffffffff834dd070 D ifnetlist +ffffffff834de000 D ifiq_maxlen_drop +ffffffff834de004 D ifiq_maxlen_return +ffffffff834df000 D etherbroadcastaddr +ffffffff834df006 D ether_ipmulticast_min +ffffffff834df00c D ether_ipmulticast_max +ffffffff834df012 D ether_ip6multicast_min +ffffffff834df018 D ether_ip6multicast_max +ffffffff834e0000 D etherip_cloner +ffffffff834e0030 D etherip_list +ffffffff834e1000 D loop_cloner +ffffffff834e2000 D ifmedia_mtx +ffffffff834e3000 D ppp_compressors +ffffffff834e3020 D ppp_cloner +ffffffff834e4000 D ppp_pkt_init +ffffffff834e5000 D ppp_bsd_compress +ffffffff834e6000 D ppp_deflate +ffffffff834e6070 D ppp_deflate_draft +ffffffff834e7000 D tun_cloner +ffffffff834e7030 D tap_cloner +ffffffff834e8000 D bridgeintrq +ffffffff834e8038 D bridge_cloner +ffffffff834e9000 d veb_cloner +ffffffff834e9030 d vport_cloner +ffffffff834ea000 D vlan_tagh_lk +ffffffff834ea010 D vlan_cloner +ffffffff834ea040 D svlan_cloner +ffffffff834eb000 D pipex_list_mtx +ffffffff834eb010 D pipex_prune +ffffffff834eb018 D pipexoutq +ffffffff834eb050 d SHAPad2 +ffffffff834ec000 D rtmap_gc +ffffffff834ec018 D rt_rc +ffffffff834ed000 D rt_labels +ffffffff834ed010 D rtlabel_mtx +ffffffff834ee000 D enc_cloner +ffffffff834ef000 D gre_cloner +ffffffff834ef030 D gre_list +ffffffff834ef040 D mgre_cloner +ffffffff834ef070 D egre_cloner +ffffffff834ef0a0 D nvgre_cloner +ffffffff834ef0d0 D eoip_cloner +ffffffff834f0000 D trunk_cloner +ffffffff834f1000 d aggr_cloner +ffffffff834f2000 d tpmr_cloner +ffffffff834f3000 D mpe_cloner +ffffffff834f4000 D mpw_cloner +ffffffff834f5000 D mpip_cloner +ffffffff834f6000 d bpe_cloner +ffffffff834f6030 d bpe_lock +ffffffff834f7000 D vether_cloner +ffffffff834f8000 d rport_cloner +ffffffff834f8030 d rport_interfaces_lock +ffffffff834f9000 D pair_cloner +ffffffff834fa000 d vxlan_cloner +ffffffff834fa030 d vxlan_lock +ffffffff834fa040 d vxlan_teps +ffffffff834fb000 D underload_interval +ffffffff834fb010 D wg_cloner +ffffffff834fc000 d stoeplitz_keyseed +ffffffff834fd000 D ieee80211_cache_size +ffffffff834fe000 D arpt_prune +ffffffff834fe004 D arpt_keep +ffffffff834fe008 D arpt_down +ffffffff834fe010 D arpinq +ffffffff834fe048 D arp_mtx +ffffffff834fe058 D arp_maxtries +ffffffff834ff000 D ipport_firstauto +ffffffff834ff004 D ipport_lastauto +ffffffff834ff008 D ipport_hifirstauto +ffffffff834ff00c D ipport_hilastauto +ffffffff83500000 D divert_sendspace +ffffffff83500004 D divert_recvspace +ffffffff83500008 D divbhashsize +ffffffff83501000 D icmptstamprepl +ffffffff83501004 D icmperrppslim +ffffffff83501008 D icmp_redirtimeout +ffffffff83502000 D ip_sendredirects +ffffffff83502004 D ip_defttl +ffffffff83502008 D ip_mtudisc +ffffffff8350200c D ip_mtudisc_timeout +ffffffff83502010 D ipq_mutex +ffffffff83502020 D ip_maxqueue +ffffffff83502028 D ipintrq +ffffffff83502060 d ipsend_task +ffffffff83502090 d ipsendraw_task +ffffffff83503000 D ip_mrtproto +ffffffff83503004 d sin +ffffffff83504000 D rip_sendspace +ffffffff83504008 D rip_recvspace +ffffffff83505000 D tcp_debug_mtx +ffffffff83506000 D tcprexmtthresh +ffffffff83506004 D tcptv_keep_init +ffffffff83506008 D tcp_rst_ppslim +ffffffff8350600c D tcp_ackdrop_ppslim +ffffffff83506010 D tcp_syn_hash_size +ffffffff83506014 D tcp_syn_cache_limit +ffffffff83506018 D tcp_syn_bucket_limit +ffffffff8350601c D tcp_syn_use_limit +ffffffff83506020 D syn_cache_mtx +ffffffff83507000 D tcp_timer_mtx +ffffffff83507010 D tcp_mssdflt +ffffffff83507014 D tcp_rttdflt +ffffffff83507018 D tcp_do_rfc1323 +ffffffff8350701c D tcp_do_sack +ffffffff83507020 D tcp_do_rfc3390 +ffffffff83507024 D tcp_do_tso +ffffffff83507028 D tcp_reass_limit +ffffffff8350702c D tcp_sackhole_limit +ffffffff83508000 D tcp_sendspace +ffffffff83508004 D tcp_recvspace +ffffffff83508008 D tcp_autorcvbuf_inc +ffffffff83509000 D udpcksum +ffffffff83509004 D udp_sendspace +ffffffff83509008 D udp_recvspace +ffffffff8350a000 D ipsec_flows_mtx +ffffffff8350a010 D ipsec_ids_idle +ffffffff8350a014 D ipsec_ids_next_flow +ffffffff8350a018 D ipsec_policy_head +ffffffff8350a028 D ipsp_ids_gc_timeout +ffffffff8350a070 D tdb_sadb_mtx +ffffffff8350a080 d tdb_hashmask +ffffffff8350b000 D ipo_tdb_mtx +ffffffff8350b010 D ipsec_acquire_mtx +ffffffff8350b020 D ipsec_acquire_head +ffffffff8350c000 D ipsec_keep_invalid +ffffffff8350c004 D ipsec_require_pfs +ffffffff8350c008 D ipsec_soft_timeout +ffffffff8350c00c D ipsec_exp_timeout +ffffffff8350c010 D ipsec_soft_first_use +ffffffff8350c014 D ipsec_exp_first_use +ffffffff8350c018 D ipsec_expire_acquire +ffffffff8350c01c D esp_enable +ffffffff8350c020 D ah_enable +ffffffff8350d000 D udpencap_enable +ffffffff8350d004 D udpencap_port +ffffffff8350e000 D carp_vh_rc +ffffffff8350e020 D carp_sc_rc +ffffffff8350e040 D carpctl_allow +ffffffff8350e044 D carpctl_log +ffffffff8350e048 D carp_cloner ffffffff8350f000 d PADDING -ffffffff83510000 d weak_keys -ffffffff83511000 D swcr_id -ffffffff83512000 D window_inflate -ffffffff83512004 D window_deflate -ffffffff83513000 D ghash_update -ffffffff83514000 D mpls_defttl -ffffffff83514004 D mpls_mapttl_ip -ffffffff83515000 D nfskevq_lock -ffffffff83516000 D desirednfsrvcache -ffffffff83517000 D nfs_niothreads -ffffffff83518000 D fragtbl -ffffffff83519000 D ffs_vtbl -ffffffff8351a000 D dirchk -ffffffff8351b000 D desireddquot -ffffffff8351c000 D amap_list_lock -ffffffff8351d000 d uao_list_lock -ffffffff8351e000 D udv_lock -ffffffff8351f000 d uvmexp_countersboot_boot_cpumem -ffffffff8351f0c0 D uvmexp_counters -ffffffff8351f0c8 D vm_min_kernel_address -ffffffff83520000 D no_constraint -ffffffff83521000 d uvm_kmapent_warn_rate -ffffffff83522000 D maxslp -ffffffff83523000 D uvmpagerops -ffffffff83524000 D uvm_swap_data_lock -ffffffff83524010 D swap_syscall_lock -ffffffff83524020 D oommtx -ffffffff83525000 D uvm_doswapencrypt -ffffffff83526000 D gif_list -ffffffff83526010 D gif_cloner -ffffffff83527000 d sec_cloner -ffffffff83527030 d sec_tdb_gc_mtx -ffffffff83527040 d sec_tdb_gc_task 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virtio_cd +ffffffff835a5000 D vio_cd +ffffffff835a6000 D vioblk_cd +ffffffff835a7000 D viomb_cd +ffffffff835a8000 D viornd_cd +ffffffff835a9000 D vioscsi_cd +ffffffff835aa000 D vmmci_cd +ffffffff835ab000 D pci_cd +ffffffff835ac000 D arc_fw_hdr +ffffffff835ac008 D arc_cd +ffffffff835ad000 D jmb_cd +ffffffff835ae000 D mfii_cd +ffffffff835af000 D ips_cd +ffffffff835b0000 D eap_cd +ffffffff835b1000 D auacer_cd +ffffffff835b2000 D auich_cd +ffffffff835b3000 D azalia_cd +ffffffff835b4000 D envy_cd +ffffffff835b4020 D envy_matchids +ffffffff835b4030 D envy_rates +ffffffff835b40b0 D ak4524_dac +ffffffff835b40d8 D ak4524_adc +ffffffff835b4100 D ak4358_dac +ffffffff835b4128 D ak5365_adc +ffffffff835b4150 D unkenvy_codec +ffffffff835b4180 D envy_cards +ffffffff835b43f0 D envy_cards_ht +ffffffff835b4600 d julia_eeprom +ffffffff835b5000 D emu_cd +ffffffff835b6000 D auixp_cd +ffffffff835b7000 D clcs_cd +ffffffff835b8000 D yds_cd +ffffffff835b9000 D auvia_cd +ffffffff835ba000 D qle_cd +ffffffff835bb000 D mpii_cd +ffffffff835bc000 D aq_cd +ffffffff835bd000 D de_cd +ffffffff835be000 D pcn_cd +ffffffff835bf000 D wdc_sii3114_vtbl +ffffffff835bf038 D wdc_pdc203xx_vtbl +ffffffff835bf070 D wdc_svwsata_vtbl +ffffffff835bf0a8 D pciide_cd +ffffffff835bf0d0 d sis_hostbr_type +ffffffff835c0000 D ppb_cd +ffffffff835c1000 D vr_cd +ffffffff835c1020 D vr_devices +ffffffff835c2000 D txp_cd +ffffffff835c3000 D bt848_card_signature +ffffffff835c4000 D bktr_cd +ffffffff835c5000 D em_cd +ffffffff835c6000 D ixgb_cd +ffffffff835c7000 D ix_cd +ffffffff835c7020 D ixgbe_smart_speed +ffffffff835c7024 D ixgbe_enable_msix +ffffffff835c8000 D ixv_driver_version +ffffffff835c8008 D ixv_cd +ffffffff835c9000 D ixl_cd +ffffffff835c9020 d ixl_sff_lock +ffffffff835ca000 D ice_cd +ffffffff835cb000 D xge_cd +ffffffff835cc000 D thtc_cd +ffffffff835cc020 D tht_cd +ffffffff835cc040 D tht_txt_desc +ffffffff835cc068 D tht_rxf_desc +ffffffff835cc090 D tht_rxd_desc +ffffffff835cc0b8 D tht_txf_desc +ffffffff835cd000 D myx_cd +ffffffff835ce000 D oce_cd +ffffffff835cf000 D dc_devs +ffffffff835d0000 D cas_cd +ffffffff835d1000 D sis_cd +ffffffff835d2000 D se_cd +ffffffff835d3000 D mbg_cd +ffffffff835d4000 D cbb_cd +ffffffff835d4020 D yc_chipsets +ffffffff835d41b0 d pccbb_funcs +ffffffff835d41e0 d pccbb_pcmcia_funcs +ffffffff835d5000 D skc_cd +ffffffff835d5020 D sk_cd +ffffffff835d6000 D mskc_cd +ffffffff835d6020 D msk_cd +ffffffff835d7000 D puc_cd +ffffffff835d8000 D puc_ndevs +ffffffff835d9000 D iwi_cd +ffffffff835da000 D wpi_cd +ffffffff835db000 D iwn_cd +ffffffff835dc000 D iwm_cd +ffffffff835dd000 D iwx_cd +ffffffff835de000 d .compoundliteral +ffffffff835de040 d .compoundliteral.4 +ffffffff835de080 d .compoundliteral.5 +ffffffff835de0b0 d .compoundliteral.6 +ffffffff835de0f0 d .compoundliteral.7 +ffffffff835de130 d .compoundliteral.8 +ffffffff835df000 D cmpci_cd +ffffffff835e0000 D iha_cd +ffffffff835e1000 D pcscp_cd +ffffffff835e1020 D pcscp_glue +ffffffff835e2000 D bge_cd +ffffffff835e3000 D bnx_firmwares +ffffffff835e3160 D bnx_rv2ps +ffffffff835e31c0 D bnx_cd +ffffffff835e31e0 d flash_5709 +ffffffff835e3210 d flash_table +ffffffff835e4000 D vge_cd +ffffffff835e5000 D stge_cd +ffffffff835e6000 D nfe_cd +ffffffff835e7000 D et_cd +ffffffff835e8000 D jme_cd +ffffffff835e9000 D age_cd +ffffffff835ea000 D alc_dma_burst +ffffffff835ea020 D alc_cd +ffffffff835eb000 D ale_cd +ffffffff835ec000 D amdpm_cd +ffffffff835ec020 d amdpm_timecounter +ffffffff835ed000 D bce_cd +ffffffff835ee000 D rtwn_cd +ffffffff835ef000 d ral_rt2560_opns +ffffffff835ef028 d ral_rt2661_opns +ffffffff835ef050 d ral_rt2860_opns +ffffffff835f0000 D piixpm_cd +ffffffff835f1000 D vic_cd +ffffffff835f2000 D vmx_cd +ffffffff835f3000 D vmwpvs_cd +ffffffff835f4000 D lii_cd +ffffffff835f5000 D ichiic_cd +ffffffff835f6000 D viapm_cd +ffffffff835f6020 d viapm_timecounter +ffffffff835f7000 D amdiic_cd +ffffffff835f8000 D nviic_cd +ffffffff835f9000 D kate_cd +ffffffff835fa000 D km_cd +ffffffff835fb000 D cpu_model_offsets +ffffffff835fb070 D ksmn_cd +ffffffff835fc000 D itherm_cd +ffffffff835fd000 D pchtemp_cd +ffffffff835fe000 D xspd_cd +ffffffff835ff000 D bwfm_pci_buscore_ops +ffffffff835ff030 D bwfm_pci_bus_ops +ffffffff835ff058 D bwfm_pci_msgbuf_ops +ffffffff83600000 D bnxt_cd +ffffffff83601000 D mcx_cd +ffffffff83602000 D iavf_cd +ffffffff83603000 D rge_cd +ffffffff83604000 D igc_cd +ffffffff83605000 D ngbe_cd +ffffffff83606000 D agp_cd +ffffffff83607000 D intagp_cd +ffffffff83607020 D agp_i810_methods +ffffffff83608000 D reservation_ww_class +ffffffff83609000 d bridge_lock +ffffffff83609010 d bridge_list +ffffffff8360a000 d drm_connector_enum_list +ffffffff8360a1f8 d connector_list_lock +ffffffff8360a208 d connector_list +ffffffff8360b000 d kernel_fb_helper_list +ffffffff8360b010 d kernel_fb_helper_lock +ffffffff8360c000 D drm_global_mutex +ffffffff8360d000 D i2c_bit_algo +ffffffff8360d010 d drm_fence_context_count +ffffffff8360d018 d dma_fence_stub_mtx +ffffffff8360d028 D wait_bit_mtx +ffffffff8360d038 D shrinkers +ffffffff8360e000 d crtc_ww_class +ffffffff8360f000 d panel_lock +ffffffff8360f010 d panel_list +ffffffff83610000 d ttm_global_mutex +ffffffff83611000 D drm_sched_policy +ffffffff83612000 D intel_bbops +ffffffff83613000 d i915_sys_placement +ffffffff83613020 d i915_ttm_bo_driver +ffffffff83614000 d mchdev_lock +ffffffff83615000 D inteldrm_stdscreen +ffffffff83615030 D inteldrm_scrlist +ffffffff83615038 D inteldrm_screenlist +ffffffff83615048 D inteldrm_accessops +ffffffff836150a8 D inteldrm_cd +ffffffff83616000 d capture_mutex +ffffffff83617000 d mitigations +ffffffff83618000 D i915_modparams +ffffffff83619000 d schedule_lock +ffffffff8361a000 d unbind_fence_ops +ffffffff8361b000 D intel_graphics_stolen_res +ffffffff8361c000 D btc_valid_sclk +ffffffff8361d000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff8361d020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff8361e000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff8361e008 d r600_cs_packet_parse_vline.vline_status +ffffffff8361f000 d r100_asic +ffffffff8361f2e0 d r200_asic +ffffffff8361f5c0 d r300_asic_pcie +ffffffff8361f8a0 d r300_asic +ffffffff8361fb80 d r420_asic +ffffffff8361fe60 d rs400_asic +ffffffff83620140 d rs600_asic +ffffffff83620420 d rs690_asic +ffffffff83620700 d rv515_asic +ffffffff836209e0 d r520_asic +ffffffff83620cc0 d r600_asic +ffffffff83620fa0 d rv6xx_asic +ffffffff83621280 d rs780_asic +ffffffff83621560 d rv770_asic +ffffffff83621840 d evergreen_asic +ffffffff83621b20 d sumo_asic +ffffffff83621e00 d btc_asic +ffffffff836220e0 d cayman_asic +ffffffff836223c0 d trinity_asic +ffffffff836226a0 d si_asic +ffffffff83622980 d ci_asic +ffffffff83622c60 d kv_asic +ffffffff83623000 d dce6_funcs +ffffffff83623018 d dce6_hdmi_funcs +ffffffff83623088 d dce6_dp_funcs +ffffffff836230f8 d dce4_funcs +ffffffff83623110 d dce4_hdmi_funcs +ffffffff83623180 d dce4_dp_funcs +ffffffff836231f0 d dce32_funcs +ffffffff83623208 d dce32_hdmi_funcs +ffffffff83623278 d dce32_dp_funcs +ffffffff836232e8 d r600_funcs +ffffffff83623300 d r600_hdmi_funcs +ffffffff83624000 D radeon_modeset +ffffffff83624004 D radeon_dynclks +ffffffff83624008 D radeon_agpmode +ffffffff8362400c D radeon_gart_size +ffffffff83624010 D radeon_tv +ffffffff83624014 D radeon_audio +ffffffff83624018 D radeon_pcie_gen2 +ffffffff8362401c D radeon_msi +ffffffff83624020 D radeon_lockup_timeout +ffffffff83624024 D radeon_dpm +ffffffff83624028 D radeon_aspm +ffffffff8362402c D radeon_runtime_pm +ffffffff83624030 D radeon_vm_size +ffffffff83624034 D radeon_vm_block_size +ffffffff83624038 D radeon_use_pflipirq +ffffffff8362403c D radeon_bapm +ffffffff83624040 D radeon_backlight +ffffffff83624044 D radeon_auxch +ffffffff83624048 D radeon_uvd +ffffffff8362404c D radeon_vce +ffffffff83624050 D radeon_si_support +ffffffff83624054 D radeon_cik_support +ffffffff83624058 D radeondrm_cd +ffffffff83624078 D radeondrm_stdscreen +ffffffff836240a8 D radeondrm_scrlist +ffffffff836240b0 D radeondrm_screenlist +ffffffff836240c0 D radeondrm_accessops +ffffffff83625000 D radeon_bbops +ffffffff83626000 d radeon_bo_driver +ffffffff83627000 d verde_pg_init +ffffffff83628000 d cac_weights_pitcairn +ffffffff836284d0 d cac_weights_oland +ffffffff83629000 d aldebaran_mode2_handler +ffffffff8362a000 d amdgpu_vbios_version_attrs +ffffffff8362b000 D amdgpu_asic_name +ffffffff8362c000 D amdgpu_vram_limit +ffffffff8362c004 D amdgpu_gart_size +ffffffff8362c008 D amdgpu_gtt_size +ffffffff8362c00c D amdgpu_moverate +ffffffff8362c010 D amdgpu_audio +ffffffff8362c014 D amdgpu_pcie_gen2 +ffffffff8362c018 D amdgpu_msi +ffffffff8362c01c D amdgpu_dpm +ffffffff8362c020 D amdgpu_fw_load_type +ffffffff8362c024 D amdgpu_aspm +ffffffff8362c028 D amdgpu_runtime_pm +ffffffff8362c02c D amdgpu_ip_block_mask +ffffffff8362c030 D amdgpu_bapm +ffffffff8362c034 D amdgpu_vm_size +ffffffff8362c038 D amdgpu_vm_fragment_size +ffffffff8362c03c D amdgpu_vm_block_size +ffffffff8362c040 D amdgpu_vm_update_mode +ffffffff8362c044 D amdgpu_dc +ffffffff8362c048 D amdgpu_sched_jobs +ffffffff8362c04c D amdgpu_sched_hw_submission +ffffffff8362c050 D amdgpu_cg_mask +ffffffff8362c058 D amdgpu_pg_mask +ffffffff8362c05c D amdgpu_sdma_phase_quantum +ffffffff8362c060 D amdgpu_pp_feature_mask +ffffffff8362c064 D amdgpu_lbpw +ffffffff8362c068 D amdgpu_compute_multipipe +ffffffff8362c06c D amdgpu_gpu_recovery +ffffffff8362c070 D amdgpu_smu_pptable_id +ffffffff8362c074 D amdgpu_dc_feature_mask +ffffffff8362c078 D amdgpu_async_gfx_ring +ffffffff8362c07c D amdgpu_mcbp +ffffffff8362c080 D amdgpu_discovery +ffffffff8362c084 D amdgpu_noretry +ffffffff8362c088 D amdgpu_force_asic_type +ffffffff8362c08c D amdgpu_tmz +ffffffff8362c090 D amdgpu_reset_method +ffffffff8362c094 D amdgpu_num_kcq +ffffffff8362c098 D amdgpu_use_xgmi_p2p +ffffffff8362c09c D amdgpu_sg_display +ffffffff8362c0a0 D amdgpu_user_partt_mode +ffffffff8362c0a8 D mgpu_info +ffffffff8362c558 D amdgpu_ras_enable +ffffffff8362c55c D amdgpu_ras_mask +ffffffff8362c560 D amdgpu_bad_page_threshold +ffffffff8362c564 D amdgpu_backlight +ffffffff8362c568 D amdgpu_cd +ffffffff8362c588 D amdgpu_stdscreen +ffffffff8362c5b8 D amdgpu_scrlist +ffffffff8362c5c0 D amdgpu_screenlist +ffffffff8362c5d0 D amdgpu_accessops +ffffffff8362d000 d amdgpu_gtt_mgr_attributes +ffffffff8362e000 D amdgpu_bbops +ffffffff8362f000 D soc15_ih_clientid_name +ffffffff83630000 D ras_error_string +ffffffff83630030 D ras_block_string +ffffffff836300c0 D ras_mca_block_string +ffffffff83631000 d amdgpu_bo_driver +ffffffff83632000 d amdgpu_vram_mgr_attributes +ffffffff83633000 d xgmi_mutex +ffffffff83633010 D xgmi_ras_hw_ops +ffffffff83633050 D xgmi_ras +ffffffff83634000 D aqua_vanjaram_xcp_funcs +ffffffff83635000 D gfx_v11_0_3_ras +ffffffff83636000 d gfx_v9_0_ras +ffffffff83637000 D gfx_v9_4_ras +ffffffff83638000 D gfx_v9_4_2_ras_ops +ffffffff83638040 D gfx_v9_4_2_ras +ffffffff83639000 D gfx_v9_4_3_xcp_funcs +ffffffff83639020 D gfx_v9_4_3_ras_ops +ffffffff83639060 D gfx_v9_4_3_ras +ffffffff8363a000 D gfxhub_v1_2_xcp_funcs +ffffffff8363b000 D hdp_v4_0_ras_hw_ops +ffffffff8363b040 D hdp_v4_0_ras +ffffffff8363c000 d jpeg_v2_6_ras +ffffffff8363d000 d jpeg_v4_0_ras +ffffffff8363e000 d jpeg_v4_0_3_ras +ffffffff8363f000 D mca_v3_0_mp0_ras +ffffffff8363f058 D mca_v3_0_mp1_ras +ffffffff8363f0b0 D mca_v3_0_mpio_ras +ffffffff83640000 D mmhub_v1_0_ras_hw_ops +ffffffff83640040 D mmhub_v1_0_ras +ffffffff83641000 D mmhub_v1_7_ras_hw_ops +ffffffff83641040 D mmhub_v1_7_ras +ffffffff83642000 D mmhub_v1_8_ras +ffffffff83643000 D mmhub_v9_4_ras +ffffffff83644000 D nbio_v4_3_ras +ffffffff83645000 D nbio_v7_4_ras +ffffffff83646000 D nbio_v7_9_ras +ffffffff83647000 d sriov_sc_video_codecs_encode +ffffffff83647010 d sriov_sc_video_codecs_decode_vcn1 +ffffffff83647020 d sriov_sc_video_codecs_decode_vcn0 +ffffffff83647030 d sriov_sc_video_codecs_encode_array +ffffffff83647060 d sriov_sc_video_codecs_decode_array_vcn1 +ffffffff836470f0 d sriov_sc_video_codecs_decode_array_vcn0 +ffffffff83648000 d sdma_v4_0_ras +ffffffff83649000 D sdma_v4_4_ras +ffffffff8364a000 D sdma_v4_4_2_xcp_funcs +ffffffff8364a020 d sdma_v4_4_2_ras +ffffffff8364b000 d sdma_v6_0_3_ras +ffffffff8364c000 d sienna_cichlid_mode2_handler +ffffffff8364d000 d smu_v13_0_10_mode2_handler +ffffffff8364e000 d sriov_vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff8364e010 d sriov_vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff8364e020 d sriov_vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff8364e030 d sriov_vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff8364e040 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff8364e070 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff8364e100 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff8364e140 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff8364f000 D umc_v6_1_ras +ffffffff83650000 D umc_v6_7_ras +ffffffff83651000 D umc_v8_10_ras +ffffffff83652000 D umc_v8_7_ras +ffffffff83653000 d vcn_v2_6_ras +ffffffff83654000 d vcn_v4_0_unified_ring_vm_funcs +ffffffff83654140 d vcn_v4_0_ras +ffffffff83655000 d vcn_v4_0_3_ras +ffffffff83656000 d amdgpu_dm_mode_config_helperfuncs +ffffffff83656010 d dm_atomic_state_funcs +ffffffff83657000 d construct_integrated_info.result +ffffffff83657004 d bios_parser_get_firmware_info.result +ffffffff83658000 d dce_funcs +ffffffff83659000 d dce110_funcs +ffffffff8365a000 d dce112_funcs +ffffffff8365b000 d dce120_funcs +ffffffff8365c000 d rv1_clk_funcs +ffffffff8365c090 d rv1_clk_internal_funcs +ffffffff8365d000 d rv2_clk_internal_funcs +ffffffff8365e000 d dcn2_funcs +ffffffff8365f000 d dcn201_funcs +ffffffff83660000 d dcn21_funcs +ffffffff83660090 d rn_bw_params +ffffffff83661000 D dcn3_fpga_funcs +ffffffff83661090 d dcn3_funcs +ffffffff83662000 d vg_funcs +ffffffff83662090 d dummy_clocks +ffffffff836621c0 d vg_bw_params +ffffffff83663000 d dcn31_funcs +ffffffff83663090 d dcn31_bw_params +ffffffff83664000 d dcn314_funcs +ffffffff83664090 d dcn314_bw_params +ffffffff83665000 d dcn315_funcs +ffffffff83665090 d dcn315_bw_params +ffffffff83666000 d dcn316_funcs +ffffffff83666090 d dcn316_bw_params +ffffffff83667000 d dcn32_funcs +ffffffff83668000 d dcn10_dpp_cap +ffffffff83669000 d dcn20_dpp_funcs +ffffffff83669110 d dcn20_dpp_cap +ffffffff8366a000 d dcn20_hubp_funcs +ffffffff8366b000 d dcn20_opp_funcs +ffffffff8366c000 d dcn20_tg_funcs +ffffffff8366d000 d dcn201_dpp_funcs +ffffffff8366d110 d dcn201_dpp_cap +ffffffff8366e000 d dcn201_hubp_funcs +ffffffff8366f000 d dcn201_opp_funcs +ffffffff83670000 d dcn201_tg_funcs +ffffffff83671000 d dcn201_res_pool_funcs +ffffffff836710f8 d dcn201_ip +ffffffff836712b0 d dcn201_soc +ffffffff83673000 d dcn21_hubp_funcs +ffffffff83674000 d dcn30_afmt_funcs +ffffffff83675000 d dcn30_dpp_funcs +ffffffff83675110 d dcn30_dpp_cap +ffffffff83676000 d dcn30_hubp_funcs +ffffffff83677000 d dcn30_tg_funcs +ffffffff83678000 d dcn30_vpg_funcs +ffffffff83679000 d dcn30_tg_funcs +ffffffff8367a000 d res_cap_dcn301 +ffffffff8367a040 d dcn301_res_pool_funcs +ffffffff8367b000 d dcn302_res_pool_funcs +ffffffff8367c000 d dcn303_res_pool_funcs +ffffffff8367d000 d dcn31_afmt_funcs +ffffffff8367e000 d dcn31_apg_funcs +ffffffff8367f000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff83680000 d dcn31_hubp_funcs +ffffffff83681000 d dcn31_tg_funcs +ffffffff83682000 d dcn31_res_pool_funcs +ffffffff83683000 d dcn31_vpg_funcs +ffffffff83684000 d dcn314_tg_funcs +ffffffff83685000 d dcn314_res_pool_funcs +ffffffff83686000 d dcn315_res_pool_funcs +ffffffff83687000 d dcn316_res_pool_funcs +ffffffff83688000 d dcn32_dpp_funcs +ffffffff83688110 d dcn32_dpp_cap +ffffffff83689000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff8368a000 d dcn32_hubp_funcs +ffffffff8368b000 d dcn32_tg_funcs +ffffffff8368c000 d dcn32_res_pool_funcs +ffffffff8368d000 d dcn321_res_pool_funcs +ffffffff8368e000 D dcn1_0_ip +ffffffff8368e1b8 D dcn1_0_soc +ffffffff83690000 D dcn2_0_ip +ffffffff836901b8 D dcn2_0_nv14_ip +ffffffff83690370 D dcn2_0_soc +ffffffff836916a8 D dcn2_0_nv14_soc +ffffffff836929e0 D dcn2_0_nv12_soc +ffffffff83693d18 D dcn2_1_ip +ffffffff83693ed0 D dcn2_1_soc +ffffffff83695208 D ddr4_wm_table_gs +ffffffff836952c8 D lpddr4_wm_table_gs +ffffffff83695388 D lpddr4_wm_table_with_disabled_ppt +ffffffff83695448 D ddr4_wm_table_rn +ffffffff83695508 D ddr4_1R_wm_table_rn +ffffffff836955c8 D lpddr4_wm_table_rn +ffffffff83696000 D dcn3_0_ip +ffffffff836961b8 D dcn3_0_soc +ffffffff83698000 D dcn3_01_ip +ffffffff836981b8 D dcn3_01_soc +ffffffff836994f0 D ddr4_wm_table +ffffffff836995b0 D lpddr5_wm_table +ffffffff8369a000 D dcn3_02_ip +ffffffff8369a1b8 D dcn3_02_soc +ffffffff8369c000 D dcn3_03_ip +ffffffff8369c1b8 D dcn3_03_soc +ffffffff8369e000 D dcn3_1_ip +ffffffff8369e1b8 D dcn3_15_ip +ffffffff8369e370 D dcn3_16_ip +ffffffff8369e528 d dcn3_15_soc +ffffffff8369f860 d dcn3_1_soc +ffffffff836a0b98 d dcn3_16_soc +ffffffff836a2000 D dcn3_14_ip +ffffffff836a21b8 d dcn3_14_soc +ffffffff836a4000 D dcn3_2_ip +ffffffff836a41b8 D dcn3_2_soc +ffffffff836a6000 D dcn3_21_ip +ffffffff836a61b8 D dcn3_21_soc +ffffffff836a8000 d dsc_policy_max_target_bpp_limit +ffffffff836a9000 D DIDTEDCConfig_P12 +ffffffff836a9070 d smu7_profiling +ffffffff836aa000 d cyan_skillfish_table_map +ffffffff836aa080 d cyan_skillfish_message_map +ffffffff836ab000 d navi10_table_map +ffffffff836ab080 d navi10_pwr_src_map +ffffffff836ab090 d navi10_workload_map +ffffffff836ab0e0 d navi10_message_map +ffffffff836abb60 d navi10_clk_map +ffffffff836abc20 d navi10_feature_mask_map +ffffffff836ac000 d sienna_cichlid_table_map +ffffffff836ac080 d sienna_cichlid_pwr_src_map +ffffffff836ac090 d sienna_cichlid_workload_map +ffffffff836ac0e0 d sienna_cichlid_message_map +ffffffff836acb60 d sienna_cichlid_clk_map +ffffffff836acc20 d sienna_cichlid_feature_mask_map +ffffffff836ad000 d vangogh_message_map +ffffffff836ada80 d vangogh_table_map +ffffffff836adb00 d vangogh_workload_map +ffffffff836adb50 d vangogh_feature_mask_map +ffffffff836ae000 d renoir_table_map +ffffffff836ae080 d renoir_workload_map +ffffffff836ae0d0 d renoir_message_map +ffffffff836aeb50 d renoir_clk_map +ffffffff836af000 d smu_v13_0_0_message_map +ffffffff836afa80 d smu_v13_0_0_feature_mask_map +ffffffff836afe50 d smu_v13_0_0_table_map +ffffffff836afed0 d smu_v13_0_0_pwr_src_map +ffffffff836afee0 d smu_v13_0_0_workload_map +ffffffff836aff30 d smu_v13_0_0_clk_map +ffffffff836b0000 d smu_v13_0_4_table_map +ffffffff836b0080 d smu_v13_0_4_message_map +ffffffff836b0b00 d smu_v13_0_4_feature_mask_map +ffffffff836b1000 d smu_v13_0_5_table_map +ffffffff836b1080 d smu_v13_0_5_message_map +ffffffff836b1b00 d smu_v13_0_5_feature_mask_map +ffffffff836b2000 d smu_v13_0_7_message_map +ffffffff836b2a80 d smu_v13_0_7_feature_mask_map +ffffffff836b2e50 d smu_v13_0_7_table_map +ffffffff836b2ed0 d smu_v13_0_7_pwr_src_map +ffffffff836b2ee0 d smu_v13_0_7_workload_map +ffffffff836b2f30 d smu_v13_0_7_clk_map +ffffffff836b3000 d yellow_carp_table_map +ffffffff836b3080 d yellow_carp_message_map +ffffffff836b3b00 d yellow_carp_feature_mask_map +ffffffff836b4000 D pci_conf_lock +ffffffff836b4010 D pci_bus_dma_tag +ffffffff836b4088 D msi_pic +ffffffff836b4120 D msix_pic +ffffffff836b5000 D pchb_cd +ffffffff836b6000 D amas_cd +ffffffff836b7000 D cardslot_cd +ffffffff836b8000 D cardbus_cd +ffffffff836b9000 d csdevs +ffffffff836ba000 d ral_rt2560_opns +ffffffff836ba028 d ral_rt2661_opns +ffffffff836ba050 d ral_rt2860_opns +ffffffff836bb000 D pcmcia_cd +ffffffff836bc000 D pcmcia_3cxem556_func0 +ffffffff836bc0b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff836bc158 D pcmcia_megahertz_xjem1144_func0 +ffffffff836bc210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff836bc2b0 d pcmcia_3cxem556_func1 +ffffffff836bc368 d pcmcia_3cxem556_func1_cfe0 +ffffffff836bc408 d pcmcia_megahertz_xjem1144_func1 +ffffffff836bc4c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff836bc560 d pcmcia_sierra_a555_func1 +ffffffff836bc618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff836bc6b8 d pcmcia_sveclancard_func0 +ffffffff836bc770 d pcmcia_sveclancard_func0_cfe0 +ffffffff836bd000 D ep_pcmcia_prod +ffffffff836be000 D aic_pcmcia_prod +ffffffff836bf000 D com_pcmcia_prod +ffffffff836c0000 D wdc_pcmcia_pr +ffffffff836c1000 D sm_pcmcia_prod +ffffffff836c2000 D xe_cd +ffffffff836c3000 D pcib_cd +ffffffff836c4000 D amdpcib_cd +ffffffff836c5000 D tcpcib_cd +ffffffff836c6000 D aapic_cd +ffffffff836c7000 D hme_cd +ffffffff836c8000 D isa_cd +ffffffff836c9000 D isadma_cd +ffffffff836ca000 D fdc_cd +ffffffff836cb000 D fd_types +ffffffff836cb1f8 D fd_cd +ffffffff836cc000 D mpu_cd +ffffffff836cd000 D pcppi_cd +ffffffff836ce000 D spkr_cd +ffffffff836cf000 D wbsio_cd +ffffffff836d0000 D schsio_cd +ffffffff836d1000 D it_cd +ffffffff836d2000 D uguru_cd +ffffffff836d3000 D aps_cd +ffffffff836d4000 D isa_bus_dma_tag +ffffffff836d5000 D wsdisplay_cd +ffffffff836d5020 D wsdisplay_cons +ffffffff836d5058 D wsdisplay_defaultscreens +ffffffff836d6000 D wskbd_cd +ffffffff836d6020 D wskbd_default_bell_data +ffffffff836d6030 D wskbd_default_keyrepeat_data +ffffffff836d6040 D wskbd_srcops +ffffffff836d7000 d compose_tab +ffffffff836d8000 D wsmouse_cd +ffffffff836d8020 D wsmouse_srcops +ffffffff836d9000 D wsmux_srcops +ffffffff836d9030 D wsmux_tree_lock +ffffffff836da000 D vt100_output +ffffffff836db000 D pckbd_cd +ffffffff836dc000 D pms_cd +ffffffff836dc020 d synaptics_params +ffffffff836dc030 d alps_params +ffffffff836dd000 D skgpio_cd +ffffffff836de000 D pctr_conf_lock +ffffffff836df000 D ukbd_keymapdata +ffffffff836e0000 D usbrev_str +ffffffff836e0030 D usb_cd +ffffffff836e1000 d usbd_ratecheck.errinterval +ffffffff836e2000 D uhub_cd +ffffffff836e3000 D uaudio_cd +ffffffff836e4000 D uvideo_ctrls +ffffffff836e42d8 D uvideo_cd +ffffffff836e5000 D utvfu_norm_params +ffffffff836e5030 D utvfu_cd +ffffffff836e6000 D udl_reg_vals_640x480_60 +ffffffff836e6020 D udl_reg_vals_640x480_67 +ffffffff836e6040 D udl_reg_vals_640x480_72 +ffffffff836e6060 D udl_reg_vals_640x480_75 +ffffffff836e6080 D udl_reg_vals_800x480_61 +ffffffff836e60a0 D udl_reg_vals_800x600_56 +ffffffff836e60c0 D udl_reg_vals_800x600_60 +ffffffff836e60e0 D udl_reg_vals_800x600_72 +ffffffff836e6100 D udl_reg_vals_800x600_74 +ffffffff836e6120 D udl_reg_vals_800x600_75 +ffffffff836e6140 D udl_reg_vals_1024x768_60 +ffffffff836e6160 D udl_reg_vals_1024x768_70 +ffffffff836e6180 D udl_reg_vals_1024x768_75 +ffffffff836e61a0 D udl_reg_vals_1280x800_60 +ffffffff836e61c0 D udl_reg_vals_1280x960_60 +ffffffff836e61e0 D udl_reg_vals_1280x1024_60 +ffffffff836e6200 D udl_reg_vals_1280x1024_75 +ffffffff836e6220 D udl_reg_vals_1366x768_60 +ffffffff836e6240 D udl_reg_vals_1440x900_60 +ffffffff836e6260 D udl_reg_vals_1440x900_59 +ffffffff836e6280 D udl_reg_vals_1440x900_75 +ffffffff836e62a0 D udl_reg_vals_1680x1050_60 +ffffffff836e62c0 D udl_reg_vals_1600x1200_60 +ffffffff836e62e0 D udl_reg_vals_1920x1080_60 +ffffffff836e6300 D udl_null_key_1 +ffffffff836e6310 D udl_decomp_table +ffffffff836e7510 D udl_cd +ffffffff836e7530 D udl_stdscreen +ffffffff836e7560 D udl_scrlist +ffffffff836e7568 D udl_screenlist +ffffffff836e7578 D udl_accessops +ffffffff836e8000 D umidi_cd +ffffffff836e9000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff836e9020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff836e9040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff836e9060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff836e9080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff836e90a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff836e90c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff836e90e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff836e9100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff836e9120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff836e9140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff836e9160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff836e9180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff836e91a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff836e91c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff836e91e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff836e9200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff836e9220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff836e9240 D umidi_quirklist +ffffffff836e94a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff836e94c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff836e94d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff836e94f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff836e9500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff836e9520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff836e9530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff836e9550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff836e9560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff836e9580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff836e9590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff836e95b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff836e95c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff836e95e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff836e95f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff836e9610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff836e9620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff836e9640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff836e9650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff836e9670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff836e9680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff836e96a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff836e96b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff836e96d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff836e96e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff836e9700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff836e9710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff836e9730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff836e9740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff836e9760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff836e9770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff836e9790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff836e97a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff836e97c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff836e97d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff836e97f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff836ea000 D ucom_cd +ffffffff836ea020 D sysctl_ucomlock +ffffffff836eb000 D ugen_cd +ffffffff836ec000 D uhidev_cd +ffffffff836ec020 d uhidev_use_rdesc.reportbuf +ffffffff836ed000 D uhid_cd +ffffffff836ee000 D fido_cd +ffffffff836ef000 D ujoy_cd +ffffffff836f0000 D ukbd_cd +ffffffff836f1000 D ums_cd +ffffffff836f1020 d ums_fix_elecom_descriptor.match +ffffffff836f2000 D umt_cd +ffffffff836f3000 D def_scale +ffffffff836f3020 D uts_cd +ffffffff836f4000 D ubcmtp_cd +ffffffff836f4020 d ubcmtp_wsmousecfg +ffffffff836f5000 D ucycom_cd +ffffffff836f6000 D uslhcom_cd +ffffffff836f7000 D ulpt_fwdevs +ffffffff836f7060 D ulpt_cd +ffffffff836f7080 D ulptusein +ffffffff836f8000 D umass_cd +ffffffff836f8020 d umass_bbb_transfer.dCBWtag +ffffffff836f9000 D uthum_cd +ffffffff836fa000 D ugold_cd +ffffffff836fa020 d cmd_init +ffffffff836fa028 d cmd_type +ffffffff836fa030 d cmd_data +ffffffff836fb000 D utrh_cd +ffffffff836fc000 D uoakrh_cd +ffffffff836fd000 D uoaklux_cd +ffffffff836fe000 D uoakv_cd +ffffffff836ff000 D uonerng_cd +ffffffff83700000 D urng_cd +ffffffff83701000 D udcf_cd +ffffffff83702000 D umbg_cd +ffffffff83703000 D uvisor_cd +ffffffff83704000 D udsbr_cd +ffffffff83705000 D utwitch_cd +ffffffff83706000 D aue_cd +ffffffff83707000 D axe_cd +ffffffff83708000 D axen_cd +ffffffff83709000 D smsc_cd +ffffffff8370a000 D cue_devs +ffffffff8370a010 D cue_cd +ffffffff8370b000 D kue_cd +ffffffff8370c000 D cdce_cd +ffffffff8370d000 D urndis_cd +ffffffff8370e000 D mos_cd +ffffffff8370f000 D mue_cd +ffffffff83710000 D udav_cd +ffffffff83711000 D upl_devs +ffffffff83711008 D upl_cd +ffffffff83712000 D ugl_devs +ffffffff83712008 D ugl_cd +ffffffff83713000 D url_cd +ffffffff83714000 D ure_cd +ffffffff83715000 D uaq_cd +ffffffff83716000 D umodem_cd +ffffffff83717000 D uftdi_cd +ffffffff83718000 D uplcom_cd +ffffffff83719000 D umct_cd +ffffffff8371a000 D uvscom_cd +ffffffff8371b000 D ubsa_cd +ffffffff8371c000 D ukspan_cd +ffffffff8371d000 D uslcom_cd +ffffffff8371e000 D uark_cd +ffffffff8371f000 D moscom_cd +ffffffff83720000 D umcs_cd +ffffffff83721000 D uscom_cd +ffffffff83722000 D ucrcom_cd +ffffffff83723000 D uxrcom_cd +ffffffff83724000 D uipaq_cd +ffffffff83725000 D umsm_cd +ffffffff83726000 D uchcom_cd +ffffffff83727000 D uticom_cd +ffffffff83728000 D wi_func_usb +ffffffff83729000 D atu_cd +ffffffff83729020 D atu_devs +ffffffff83729270 D atu_radfirm +ffffffff8372a000 D ural_cd +ffffffff8372b000 D rum_cd +ffffffff8372c000 D run_cd +ffffffff8372c020 D rt3070_freqs +ffffffff8372d000 D mtw_cd +ffffffff8372e000 D zyd_cd +ffffffff8372f000 D upgt_cd +ffffffff83730000 D urtw_cd +ffffffff83731000 D urtwn_cd +ffffffff83732000 D rsu_cd +ffffffff83733000 D otus_cd +ffffffff83733020 d AR_PLCP_HDR_INTR +ffffffff83734000 D umb_xfer_tout +ffffffff83734010 D umb_uuid_basic_connect +ffffffff83734020 D umb_uuid_context_internet +ffffffff83734030 D umb_uuid_qmi_mbim +ffffffff83734040 D umb_cd +ffffffff83734060 D umb_delay +ffffffff83734070 D umb_qmi_alloc_cid +ffffffff83734080 D umb_qmi_fcc_auth +ffffffff83735000 D uath_cd +ffffffff83736000 D uow_cd +ffffffff83737000 D uberry_cd +ffffffff83738000 D upd_cd +ffffffff83738020 d upd_usage_roots +ffffffff837380a0 d upd_usage_batdep +ffffffff83739000 D uwacom_cd +ffffffff83739020 d uwacom_attach.wacom_report_buf +ffffffff8373a000 D bwfm_usb_bus_ops +ffffffff8373b000 D umstc_cd +ffffffff8373c000 D uhidpp_cd +ffffffff8373d000 D ucc_cd +ffffffff8373e000 D iic_cd +ffffffff8373f000 D probe_addrs_sensor +ffffffff8373f008 D probe_addrs_eeprom +ffffffff83740000 D lmtemp_cd +ffffffff83741000 D lmn_worklist +ffffffff83741240 D lmn_cd +ffffffff83742000 D lmenv_cd +ffffffff83743000 D maxtmp_cd +ffffffff83744000 D adc_cd +ffffffff83745000 D admtemp_cd +ffffffff83746000 D admlc_cd +ffffffff83747000 D admtm_cd +ffffffff83748000 D admtmp_cd +ffffffff83749000 D admtt_cd +ffffffff8374a000 D maxds_cd +ffffffff8374b000 D adt_chips +ffffffff8374b160 D worklist +ffffffff8374b1a0 D adt_cd +ffffffff8374c000 D admcts_cd +ffffffff8374d000 D wbng_cd +ffffffff8374e000 D nvt_cd +ffffffff8374f000 D adl_worklist +ffffffff8374f138 D adl_cd +ffffffff83750000 D andl_cd +ffffffff83751000 D sdtemp_cd +ffffffff83752000 D lisa_cd +ffffffff83753000 D ihidev_cd +ffffffff83754000 D ikbd_cd +ffffffff83755000 D ims_cd +ffffffff83756000 D imt_cd +ffffffff83757000 D iatp_cd +ffffffff83758000 D ietp_cd +ffffffff83759000 D bgw_cd +ffffffff8375a000 D icc_cd +ffffffff8375b000 D gpio_cd +ffffffff8375c000 D acpi_cd +ffffffff8375c020 D acpi_pcidevs +ffffffff8375c030 D acpi_pcirootdevs +ffffffff8375c040 D acpi_taskq +ffffffff8375c050 d acpi_indicator.save_led_state +ffffffff8375c060 d acpi_getprop.prop_guid +ffffffff8375c070 d acpi_getpropint.prop_guid +ffffffff8375c080 D acpi_skip_hids +ffffffff8375c0f0 D acpi_isa_hids +ffffffff8375c130 D acpi_quiet_hids +ffffffff8375d000 D aml_intlen +ffffffff8375d010 D aml_table +ffffffff8375daf0 d osstring +ffffffff8375db10 D aml_defobj +ffffffff8375dca0 D aml_valid_osi +ffffffff8375dd78 D acpi_max_osi +ffffffff8375dd80 D aml_regionspace +ffffffff8375f000 D acpitimer_cd +ffffffff8375f020 d acpi_timecounter +ffffffff83760000 D acpiac_cd +ffffffff83760020 D acpiac_hids +ffffffff83761000 D acpibat_cd +ffffffff83761020 D acpibat_hids +ffffffff83762000 D acpibtn_cd +ffffffff83762020 D acpibtn_hids +ffffffff83763000 D acpicmos_cd +ffffffff83763020 D acpicmos_hids +ffffffff83764000 D acpicpu_cd +ffffffff83764020 D acpicpu_hids +ffffffff83764030 d acpicpu_set_pdc.cpu_oscuuid +ffffffff83765000 D acpihpet_cd +ffffffff83765020 d hpet_timecounter +ffffffff83766000 D acpiec_cd +ffffffff83766020 D acpiec_hids +ffffffff83767000 D acpitz_cd +ffffffff83767020 D acpitz_perflevel +ffffffff83768000 D acpimadt_cd +ffffffff83769000 D acpimcfg_cd +ffffffff8376a000 D acpiprt_map_list +ffffffff8376a010 D acpiprt_cd +ffffffff8376a030 D acpiprt_pri +ffffffff8376b000 D acpidmar_force_cm +ffffffff8376b008 D acpidmar_cd +ffffffff8376b030 D vtd_faults +ffffffff8376c000 D acpidock_cd +ffffffff8376d000 D abl_cd +ffffffff8376d020 D abl_hids +ffffffff8376e000 D asmc_cd +ffffffff8376e020 D asmc_hids +ffffffff8376f000 D acpiasus_cd +ffffffff8376f020 D acpiasus_hids +ffffffff83770000 D acpithinkpad_cd +ffffffff83770020 D acpithinkpad_hids +ffffffff83771000 D acpitoshiba_cd +ffffffff83771020 D acpitoshiba_hids +ffffffff83772000 D acpisony_cd +ffffffff83773000 D acpivideo_cd +ffffffff83774000 D acpivout_cd +ffffffff83775000 D acpipwrres_cd +ffffffff83776000 D aibs_cd +ffffffff83776020 d aibs_hids +ffffffff83777000 D aplgpio_cd +ffffffff83777020 D aplgpio_hids +ffffffff83778000 D bytgpio_cd +ffffffff83778020 D bytgpio_hids +ffffffff83779000 D chvgpio_cd +ffffffff83779020 D chvgpio_hids +ffffffff8377a000 D glkgpio_cd +ffffffff8377a020 D glkgpio_hids +ffffffff8377b000 D pchgpio_cd +ffffffff8377b020 D pchgpio_hids +ffffffff8377b090 D pchgpio_devices +ffffffff8377c000 D tipmic_cd +ffffffff8377c020 D tipmic_thermal_regmap +ffffffff8377c030 D tipmic_power_regmap +ffffffff8377d000 D ccpmic_cd +ffffffff8377d020 D ccpmic_thermal_regmap +ffffffff8377d023 D ccpmic_power_regmap +ffffffff8377e000 D com_hids +ffffffff8377f000 D sdhc_hids +ffffffff83780000 D dwiic_hids +ffffffff83780050 D ihidev_hids +ffffffff83780070 D ietp_hids +ffffffff83780220 D iatp_hids +ffffffff83780240 d dwiic_acpi_found_ihidev.i2c_hid_guid +ffffffff83781000 D acpicbkbd_cd +ffffffff83781020 D acpicbkbd_hids +ffffffff83782000 D acpials_cd +ffffffff83782020 D acpials_hids +ffffffff83783000 D tpm_cd +ffffffff83783020 D tpm_hids +ffffffff83784000 D acpihve_cd +ffffffff83785000 D acpisbs_cd +ffffffff83785020 D acpisbs_hids +ffffffff83786000 D acpisurface_cd +ffffffff83786020 D acpisurface_hids +ffffffff83787000 D ipmi_acpi_hids +ffffffff83788000 D amdgpio_cd +ffffffff83788020 D amdgpio_hids +ffffffff83789000 D acpihid_cd +ffffffff83789020 D acpihid_hids +ffffffff83789030 d acpihid_guid +ffffffff8378a000 d iosf_hids +ffffffff8378b000 D intelpmc_cd +ffffffff8378b020 D intelpmc_hids +ffffffff8378b030 d intelpmc_dsm.lps0_dsm_guid +ffffffff8378c000 D acpipci_cd +ffffffff8378c020 D acpipci_hids +ffffffff8378c040 d acpipci_osc.uuid +ffffffff8378d000 D efi_cd +ffffffff8378e000 D vmm_cd +ffffffff8378f000 D vmm_hv_signature +ffffffff83790000 D sdmmc_cd +ffffffff83791000 D bwfm_sdio_bus_ops +ffffffff83791028 D bwfm_sdio_buscore_ops +ffffffff83792000 D onewire_cd +ffffffff83793000 D owid_cd +ffffffff83794000 D owsbm_cd +ffffffff83795000 D owtemp_cd +ffffffff83796000 D owctr_cd +ffffffff83797000 D hz +ffffffff83797004 D tick +ffffffff83797008 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tcp_ack_on_push +ffffffff838ab004 B tcp_do_ecn +ffffffff838ab008 B tcp_iss +ffffffff838ab010 B tcp_starttime +ffffffff838ab018 B tcpcb_pool +ffffffff838ab1c0 B tcpqe_pool +ffffffff838ab368 B sackhl_pool +ffffffff838ab510 B tcpcounters +ffffffff838ab520 B tcp_secret +ffffffff838ab530 B tcp_secret_ctx +ffffffff838ac000 B tcp_keepidle +ffffffff838ac004 B tcp_keepintvl +ffffffff838ac008 B tcp_maxpersistidle +ffffffff838ac00c B tcp_delack_msecs +ffffffff838ac010 B tcp_maxidle +ffffffff838ac014 B tcp_always_keepalive +ffffffff838ad000 B tcb6table +ffffffff838ad068 B tcbtable +ffffffff838ae000 B udpcounters +ffffffff838ae008 B udbtable +ffffffff838ae070 B udb6table +ffffffff838af000 B ipsec_in_use +ffffffff838af008 B ipsec_last_added +ffffffff838af010 B ipsp_ids_gc_list +ffffffff838af018 B tdb_pool +ffffffff838af1c0 b tdbkey +ffffffff838af1d0 b tdbh +ffffffff838af1d8 b tdbdst +ffffffff838af1e0 b tdbsrc +ffffffff838af1e8 b tdb_count +ffffffff838af1f0 B ipsec_ids_tree +ffffffff838af1f8 B ipsec_ids_flows +ffffffff838b0000 B spd_tables +ffffffff838b0008 B spd_table_max +ffffffff838b0010 B ipsec_policy_pool +ffffffff838b01b8 B ipsec_acquire_pool +ffffffff838b1000 B ipip_allow +ffffffff838b1008 B ipipcounters +ffffffff838b2000 B encdebug +ffffffff838b2004 B ipsec_soft_allocations +ffffffff838b2008 B ipsec_exp_allocations +ffffffff838b200c B ipsec_soft_bytes +ffffffff838b2010 B ipsec_exp_bytes +ffffffff838b2014 B ipcomp_enable +ffffffff838b2018 B espcounters +ffffffff838b2020 B ahcounters +ffffffff838b2028 B ipcompcounters +ffffffff838b2030 B ipseccounters +ffffffff838b2040 B ipsec_def_enc +ffffffff838b2060 B ipsec_def_auth +ffffffff838b2080 B ipsec_def_comp +ffffffff838b3000 B carpctl_preempt +ffffffff838b3004 B carp_send_all_recur +ffffffff838b3008 B carpcounters +ffffffff838b4000 B des_check_key +ffffffff838b5000 B crypto_drivers_num +ffffffff838b5008 B crypto_drivers +ffffffff838b5010 B cryptop_pool +ffffffff838b6000 B swcr_sessions +ffffffff838b6008 B swcr_sesnum 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nfs_true +ffffffff838bf064 B nfs_false +ffffffff838bf068 B nfs_xdrneg1 +ffffffff838bf06c B nfs_ticks +ffffffff838bf070 B nfsreqpl +ffffffff838bf218 B nfsstats +ffffffff838c0000 B nfsd_waiting +ffffffff838c0004 B nfssvc_sockhead_flag +ffffffff838c0008 B nfssvc_sockhead +ffffffff838c0018 B nfs_udpsock +ffffffff838c0020 B nfsd_head +ffffffff838c0030 b nfs_numnfsd +ffffffff838c0038 B nfsrv_descript_pl +ffffffff838c01e0 B nfsd_head_flag +ffffffff838c01f0 B nfs_asyncdaemon +ffffffff838c1000 B nfs_diskless +ffffffff838c2000 B nfs_numasync +ffffffff838c3000 b ffs_alloc.fsfull_last +ffffffff838c3010 b ffs_realloccg.fsfull_last +ffffffff838c3020 b ffs_inode_alloc.fsnoinodes_last +ffffffff838c4000 B ffs_ino_pool +ffffffff838c41a8 B ffs_dinode2_pool +ffffffff838c4350 B ffs_dinode1_pool +ffffffff838c44f8 b ffs_init.done +ffffffff838c5000 b mfs_minor +ffffffff838c6000 B ufs_mindirhashsize +ffffffff838c6004 B ufs_dirhashmem +ffffffff838c6008 B ufs_dirhashmaxmem +ffffffff838c6010 B ufsdirhash_mtx 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uao_create.kernel_object_store +ffffffff838d01f0 b uao_create.bootstrap_kernel_object_lock +ffffffff838d0200 b uao_create.kobj_alloced +ffffffff838d0208 B uvm_aobj_pool +ffffffff838d03b0 b uao_list +ffffffff838d1000 B udv_list +ffffffff838d2000 b uvmadvice +ffffffff838d3000 B uvmexp +ffffffff838d3158 B uvm +ffffffff838d4000 B kernel_map +ffffffff838d4008 b kernel_map_store +ffffffff838d5000 B uvm_maxkaddr +ffffffff838d5008 b uvm_kmapent_mtx +ffffffff838d5018 b uvm_kmapent_last_warn_time +ffffffff838d5028 B uvm_map_entry_kmem_pool +ffffffff838d51d0 B uvm_map_entry_pool +ffffffff838d5380 b uvm_map_init.kernel_map_entry +ffffffff838ff380 B uvm_vmspace_pool +ffffffff83900000 B malloc_conf +ffffffff83901000 B uvm_wxabort +ffffffff83902000 B vm_nphysseg +ffffffff83902010 B vm_physmem +ffffffff83902310 b virtual_space_start +ffffffff83902318 b virtual_space_end +ffffffff83903000 B psegs +ffffffff83903100 B uvm_pseg_lck +ffffffff83904000 B nowait_pma +ffffffff83905000 B oom +ffffffff83905008 B swap_priority +ffffffff83905010 B swapmap +ffffffff83905018 B vndxfer_pool +ffffffff839051c0 B vndbuf_pool +ffffffff83905370 B oompps +ffffffff83906000 B kcur +ffffffff83906008 B uvm_swpkeyscreated +ffffffff8390600c B uvm_swpkeysdeleted +ffffffff83906010 B swap_encrypt_initialized +ffffffff83906014 B swap_ctxt +ffffffff83907000 B uvn_wlist +ffffffff83907008 B uvn_sync_lock +ffffffff83907018 b uvn_flush.lasttime +ffffffff83907028 B uvn_sync_q +ffffffff83908000 b sec_mix +ffffffff83908040 b sec_map +ffffffff83908840 b sec_tdbh +ffffffff83909040 b sec_tdb_gc_list +ffffffff8390a000 B divb6table +ffffffff8390a068 B div6counters +ffffffff8390b000 b in6_get_hw_ifid.allzero +ffffffff8390c000 B ip6_forwarding +ffffffff8390c004 B ip6_mforwarding +ffffffff8390c008 B ip6_multipath +ffffffff8390c00c B ip6_mcast_pmtu +ffffffff8390c010 B ip6_log_time +ffffffff8390c020 B ip6_protox +ffffffff8390c120 B ip6_dad_pending +ffffffff8390d000 B ip6af_pool +ffffffff8390d1a8 B ip6q_pool +ffffffff8390d350 B frag6_queue +ffffffff8390d360 B frag6_nfrags +ffffffff8390d364 B frag6_nfragpackets +ffffffff8390e000 B icmp6_mtudisc_callbacks +ffffffff8390e008 B icmp6_mtudisc_timeout_q +ffffffff8390e040 B icmp6_redirect_timeout_q +ffffffff8390e078 B icmp6counters +ffffffff8390e080 b icmp6_redirect_diag.buf +ffffffff8390e480 b icmp6errppslim_last +ffffffff8390e490 b icmp6errpps_count +ffffffff8390f000 b ip6send_mq +ffffffff8390f030 B ip6counters +ffffffff8390f040 B ip6_soiikey +ffffffff83910000 B ip6_mrouter_ver +ffffffff83910010 B ip6_mrouter +ffffffff83910810 B ip6_mrouterq +ffffffff83910848 B mrt6stat +ffffffff839108b0 B ip6_mrtproto +ffffffff83911000 B ip6_id_ctx +ffffffff83912000 b mld6_init.hbh_buf +ffffffff83912008 B mld6_timers_are_running +ffffffff83912010 b ip6_opts +ffffffff83913000 B nd6_maxnudhint +ffffffff83913004 B nd6_debug +ffffffff83913008 B nd6_pool +ffffffff839131b0 B nd6_expire_task +ffffffff839131e0 B nd6_timer_to +ffffffff83913228 B nd6_slowtimo_ch +ffffffff83913270 B nd6_expire_timeout +ffffffff839132b8 B ln_hold_total +ffffffff839132bc B nd6_inuse +ffffffff83914000 B rawin6pcbtable +ffffffff83914068 B rip6counters +ffffffff83915000 B pkptable +ffffffff83915038 B pkpcb_pool +ffffffff839151e0 b nregistered +ffffffff839151e4 b npromisc +ffffffff83916000 B setperf_prio +ffffffff83916004 B cpureset_delay +ffffffff83916008 B ssym +ffffffff83916010 B esym +ffffffff83916018 B bootdev +ffffffff8391601c B biosbasemem +ffffffff83916020 B bootapiver +ffffffff83916024 B safepri +ffffffff83916028 B exec_map +ffffffff83916030 B phys_map +ffffffff83916038 B allowaperture +ffffffff83916040 B msgbuf_paddr +ffffffff83916048 B msgbuf_vaddr +ffffffff83916050 B physmem +ffffffff83916058 B idt_vaddr +ffffffff83916060 B idt_paddr +ffffffff83916068 B bios_diskinfo +ffffffff83916070 B bios_cksumlen +ffffffff83916074 B kbd_reset +ffffffff83916078 B forceukbd +ffffffff8391607c B dumpsize +ffffffff83916080 B dumplo +ffffffff83916088 B mem_cluster_cnt +ffffffff83916090 B mem_clusters +ffffffff83916190 B dumpmem_vaddr +ffffffff83916198 B dumppcb +ffffffff83916c50 B dumpmem_sz +ffffffff83916c58 B proc0paddr +ffffffff83916c60 B idt +ffffffff83916c68 b cpu_init_extents.already_done +ffffffff83916c70 B lo32_vaddr +ffffffff83916c78 B lo32_paddr +ffffffff83916c80 B tramp_pdirpa +ffffffff83916c88 B early_pte_pages +ffffffff83916c90 B bootinfo +ffffffff83917c90 B avail_start +ffffffff83917c98 B avail_end +ffffffff83917ca0 B bios_memmap +ffffffff83917ca8 B bios_efiinfo +ffffffff83917cb0 B mmap +ffffffff83917cb8 B kern_end +ffffffff83917cc0 B dumpmem_paddr +ffffffff83917cd0 B idt_allocmap +ffffffff83917dd0 B cpuresetfn +ffffffff83917dd8 B bios_bootmac +ffffffff83917de0 B bios_ucode +ffffffff83917de8 B amd64_delay_quality +ffffffff83917df0 B cpu_suspend_cycle_fcn +ffffffff83918000 B cpuspeed +ffffffff83918004 B amd64_has_xcrypt +ffffffff83918008 b identifycpu.prevcpu_1_ecx +ffffffff8391800c b identifycpu.prevcpu_tpm_ecxflags +ffffffff83918010 b identifycpu.prevcpu_d_1_eax +ffffffff83918014 b identifycpu.prevcpu_apmi_edx +ffffffff83918018 b identifycpu.prevcpu_arch_capa +ffffffff83918020 B cpu_model +ffffffff83918050 B amd64_pos_cbit +ffffffff83918058 B setperf_setup +ffffffff83918060 B has_rdrand +ffffffff83918064 B has_rdseed +ffffffff83918068 b prevcpu_perf_eax +ffffffff8391806c b prevcpu_perf_edx +ffffffff83919000 B tsc_is_invariant +ffffffff83919008 B tsc_frequency +ffffffff83919010 B tsc_recalibrate +ffffffff83919040 B tsc_bp_status +ffffffff839190c0 B tsc_test_cycles +ffffffff839190c8 B tsc_test_rounds +ffffffff839190cc B tsc_ingress_barrier +ffffffff839190d0 B tsc_egress_barrier +ffffffff83919100 B tsc_ap_status +ffffffff83919180 B tsc_ap_name +ffffffff8391a000 b vc3_sc +ffffffff8391a010 b viac3_rnd.buffer +ffffffff8391a058 B viac3_rnd_tmo +ffffffff8391a0a0 B viac3_rnd_present +ffffffff8391b000 B aesni_sc +ffffffff8391b008 B aesnipl +ffffffff8391b1b0 B aesni_ops +ffffffff8391c000 b amd64_errata.printed +ffffffff8391d000 B cpu_ucode_size +ffffffff8391d008 B cpu_ucode_data +ffffffff8391d010 B cpu_ucode_intel_applied +ffffffff8391e000 b ap_open_count +ffffffff8391e008 B zeropage +ffffffff8391e010 B mem_range_softc +ffffffff8391f000 B mtrrdef +ffffffff8391f008 B mtrrcap +ffffffff83920000 B nkptp +ffffffff83920020 B pg_nx +ffffffff83920028 B pg_g_kern +ffffffff83920030 B pg_crypt +ffffffff83920038 B pmap_initialized +ffffffff83920040 B kernel_pmap_store +ffffffff83920118 B cr3_reuse_pcid +ffffffff83920120 b cr3_pcid_temp +ffffffff83920128 B virtual_avail +ffffffff83920130 B pg_xo +ffffffff83920140 B protection_codes +ffffffff83920180 B pmap_use_pcid +ffffffff83920184 b cr3_pcid_proc +ffffffff83920188 B cr3_pcid_proc_intel +ffffffff83920190 B pmaps +ffffffff83920198 B pmap_pmap_pool +ffffffff83920340 B pmap_pv_pool +ffffffff839204e8 B pmap_pdp_pool +ffffffff83921000 B fpu_mxcsr_mask +ffffffff83921008 B xsave_mask +ffffffff83922000 B x86_soft_intrs +ffffffff83923000 B i8259_imen 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