--- 7.6/2025-01-01T07:17:04Z/2024-12-15T00:00:00Z/nm-bsd-ot14.txt Thu Jan 2 22:44:22 2025 +++ 7.6/2025-01-01T07:17:04Z/2024-12-16T00:00:00Z/nm-bsd-ot14.txt Fri Jan 3 01:23:18 2025 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001418f A acpi_pdirpa 01000000 A __kernel_phys_base -02874000 T __kernel_kutext_phys -02877000 C __kernel_cptext_phys -02878000 C __kernel_rodata_phys -0318d000 R __kernel_kutext_page_phys -0318f000 C __kernel_randomdata_phys -03443000 R __kernel_data_phys -037a2000 D __kernel_kudata_phys -037a4000 C __kernel_bss_phys +02873000 T __kernel_kutext_phys +02876000 C __kernel_cptext_phys +02877000 C __kernel_rodata_phys +0318c000 R __kernel_kutext_page_phys +0318e000 C __kernel_randomdata_phys +03442000 R __kernel_data_phys +037a1000 D __kernel_kudata_phys +037a3000 C __kernel_bss_phys 03c00000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -5988,22 +5988,24 @@ ffffffff812fe2c0 T randomioctl ffffffff812fe310 T sys_getentropy ffffffff812ff000 T videoprobe ffffffff812ff030 T videoattach -ffffffff812ff120 T videodetach -ffffffff812ff210 T videoactivate -ffffffff812ff250 T videoopen -ffffffff812ff350 T video_intr -ffffffff812ff3c0 T videoclose -ffffffff812ff480 T video_stop -ffffffff812ff4f0 T videoread -ffffffff812ff6d0 T video_claim -ffffffff812ff720 T videoioctl -ffffffff812ffbf0 T videommap -ffffffff812ffd30 T filt_videodetach -ffffffff812ffd90 T filt_videoread -ffffffff812ffdd0 T videokqfilter -ffffffff812fff70 T video_submatch -ffffffff812fffb0 T video_attach_mi -ffffffff81300020 T videoprint +ffffffff812ff170 T videodetach +ffffffff812ff250 T videoactivate +ffffffff812ff290 T videoopen +ffffffff812ff3a0 T video_intr +ffffffff812ff440 T videoclose +ffffffff812ff550 T video_stop +ffffffff812ff600 T videoread +ffffffff812ff840 T video_claim +ffffffff812ff890 T videoioctl +ffffffff812ffd60 T videommap +ffffffff812ffea0 T filt_videodetach +ffffffff812ffec0 T filt_videoread +ffffffff812fff00 T filt_videomodify +ffffffff812fffb0 T filt_videoprocess +ffffffff81300070 T videokqfilter +ffffffff813001e0 T video_submatch +ffffffff81300220 T video_attach_mi +ffffffff81300290 T videoprint ffffffff81301000 T cd9660_bmap ffffffff81302000 T cd9660_lookup ffffffff81302980 T cd9660_bufatoff @@ -6729,46 +6731,46 @@ ffffffff81352000 T sysctl_vslock ffffffff81352100 T sysctl_vsunlock ffffffff81352190 T sys_sysctl ffffffff813523e0 T kern_sysctl -ffffffff81352b30 T hw_sysctl -ffffffff813530e0 T kern_sysctl_dirs -ffffffff813536e0 T sysctl_doproc -ffffffff81353b10 T sysctl_proc_args -ffffffff81354080 T sysctl_proc_cwd -ffffffff81354270 T sysctl_proc_nobroadcastkill -ffffffff81354450 T sysctl_proc_vmmap -ffffffff813546d0 T sysctl_file -ffffffff81355990 T sysctl_sysvipc -ffffffff81355c40 T sysctl_intrcnt -ffffffff81355c60 T sysctl_cptime2 -ffffffff81355d40 T sysctl_video -ffffffff81355e30 T sysctl_cpustats -ffffffff81355fa0 T sysctl_audio -ffffffff81356090 T sysctl_securelevel_int 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iwm_set_key_v1 -ffffffff8195eb00 T iwm_set_key -ffffffff8195ed90 T iwm_delete_key_v1 -ffffffff8195eed0 T iwm_delete_key -ffffffff8195f160 T iwm_calib_timeout -ffffffff8195f230 T iwm_set_rate_table_vht -ffffffff8195f590 T iwm_set_rate_table -ffffffff8195f960 T iwm_media_change -ffffffff8195fb70 T iwm_stop -ffffffff819600a0 T iwm_init -ffffffff819603c0 T iwm_newstate_task -ffffffff81960590 T iwm_newstate -ffffffff81960740 T iwm_endscan -ffffffff81960790 T iwm_fill_sf_command -ffffffff81960860 T iwm_send_soc_conf -ffffffff819609b0 T iwm_send_update_mcc_cmd -ffffffff81960b70 T iwm_send_temp_report_ths_cmd -ffffffff81960c50 T iwm_tt_tx_backoff -ffffffff81960cf0 T iwm_fill_paging_mem -ffffffff819610a0 T iwm_alloc_fw_paging_mem -ffffffff819614d0 T iwm_init_hw -ffffffff81961cd0 T iwm_preinit -ffffffff81961ed0 T iwm_start -ffffffff819620c0 T iwm_watchdog -ffffffff81962290 T iwm_nic_error -ffffffff81962900 T iwm_dump_driver_status -ffffffff819629c0 T iwm_ioctl -ffffffff81962b60 T iwm_nic_umac_error -ffffffff81963100 T iwm_desc_lookup -ffffffff81963290 T iwm_rx_pkt_valid -ffffffff819632e0 T iwm_rx_pkt -ffffffff81964230 T iwm_notif_intr -ffffffff819643c0 T iwm_intr -ffffffff81964880 T iwm_intr_msix -ffffffff81964b90 T iwm_match -ffffffff81964bc0 T iwm_attach_hook -ffffffff81964c00 T iwm_attach -ffffffff81965ba0 T iwm_radiotap_attach -ffffffff81965c40 T iwm_init_task -ffffffff81965d30 T iwm_resume -ffffffff81965eb0 T iwm_wakeup -ffffffff81965f80 T iwm_activate -ffffffff81967000 T iwx_lookup_cmd_ver -ffffffff81967070 T iwx_lookup_notif_ver -ffffffff819670e0 T iwx_is_mimo_ht_plcp -ffffffff81967120 T iwx_store_cscheme -ffffffff81967170 T iwx_ctxt_info_alloc_dma -ffffffff81967220 T iwx_dma_contig_alloc -ffffffff81967470 T iwx_ctxt_info_free_paging -ffffffff81967600 T iwx_dma_contig_free -ffffffff819676f0 T iwx_get_num_sections -ffffffff81967770 T iwx_init_fw_sec -ffffffff81967c00 T iwx_fw_version_str -ffffffff81967c40 T iwx_alloc_fw_monitor_block -ffffffff81967cf0 T iwx_alloc_fw_monitor -ffffffff81967dc0 T iwx_apply_debug_destination -ffffffff81968390 T iwx_nic_lock -ffffffff81968510 T iwx_write_prph -ffffffff819685c0 T iwx_set_bits_prph -ffffffff819685e0 T iwx_clear_bits_prph -ffffffff81968600 T iwx_read_prph -ffffffff819686a0 T iwx_nic_unlock -ffffffff81968760 T iwx_set_ltr -ffffffff819688c0 T iwx_ctxt_info_init -ffffffff81968c20 T iwx_ctxt_info_free_fw_img -ffffffff81968dd0 T iwx_ctxt_info_gen3_init -ffffffff81969520 T iwx_write_umac_prph -ffffffff819695d0 T iwx_firmware_store_section -ffffffff81969670 T iwx_set_default_calib -ffffffff819696c0 T iwx_fw_info_free -ffffffff81969770 T iwx_read_firmware -ffffffff8196a2e0 T iwx_prph_addr_mask -ffffffff8196a320 T iwx_read_prph_unlocked -ffffffff8196a3a0 T iwx_nic_assert_locked -ffffffff8196a400 T iwx_write_prph_unlocked -ffffffff8196a490 T iwx_write_prph64 -ffffffff8196a5d0 T iwx_read_umac_prph_unlocked -ffffffff8196a660 T iwx_read_umac_prph -ffffffff8196a710 T iwx_write_umac_prph_unlocked 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iwx_rx_bar_frame_release -ffffffff819704b0 T iwx_release_frames -ffffffff819706c0 T iwx_reorder_timer_expired -ffffffff819708b0 T iwx_find_rxba_data -ffffffff81970940 T iwx_sta_rx_agg_baid_cfg_cmd -ffffffff81970b90 T iwx_send_cmd_pdu_status -ffffffff81970c20 T iwx_sta_rx_agg_sta_cmd -ffffffff81970e80 T iwx_sta_rx_agg -ffffffff819711a0 T iwx_mac_ctxt_task -ffffffff81971360 T iwx_mac_ctxt_cmd -ffffffff819715b0 T iwx_phy_ctxt_task -ffffffff81971780 T iwx_phy_ctxt_update -ffffffff81971c10 T iwx_updatechan -ffffffff81971cf0 T iwx_add_task -ffffffff81971d80 T iwx_updateprot -ffffffff81971e60 T iwx_updateslot -ffffffff81971f40 T iwx_updateedca -ffffffff81972020 T iwx_updatedtim -ffffffff81972100 T iwx_sta_tx_agg_start -ffffffff81972330 T iwx_ba_task -ffffffff819724b0 T iwx_ampdu_rx_start -ffffffff819725b0 T iwx_ampdu_rx_stop -ffffffff819726b0 T iwx_ampdu_tx_start -ffffffff81972760 T iwx_set_mac_addr_from_csr -ffffffff819729c0 T iwx_flip_hw_address -ffffffff81972a10 T iwx_is_valid_mac_addr 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iwx_rx_reorder -ffffffff81975780 T iwx_rx_mpdu_mq -ffffffff81975b00 T iwx_clear_tx_desc -ffffffff81975ca0 T iwx_txd_done -ffffffff81975d90 T iwx_txq_advance -ffffffff819760e0 T iwx_tx_update_byte_tbl -ffffffff81976180 T iwx_rx_tx_cmd -ffffffff81976300 T iwx_clear_oactive -ffffffff81976380 T iwx_rx_compressed_ba -ffffffff81976510 T iwx_rx_bmiss -ffffffff81976620 T iwx_binding_cmd -ffffffff819767c0 T iwx_get_vht_ctrl_pos -ffffffff81976830 T iwx_phy_ctxt_cmd_uhb_v3_v4 -ffffffff81976aa0 T iwx_phy_ctxt_cmd_v3_v4 -ffffffff81976d10 T iwx_phy_ctxt_cmd -ffffffff81976e30 T iwx_send_cmd_status -ffffffff81976f60 T iwx_cmd_done -ffffffff81977070 T iwx_fw_rateidx_ofdm -ffffffff819770d0 T iwx_fw_rateidx_cck -ffffffff81977130 T iwx_tx_fill_cmd -ffffffff819773d0 T iwx_rval2ridx -ffffffff81977460 T iwx_tx -ffffffff81977c60 T iwx_flush_sta_tids -ffffffff81977e30 T iwx_drain_sta -ffffffff81977ff0 T iwx_flush_sta -ffffffff81978330 T iwx_beacon_filter_send_cmd -ffffffff819783c0 T iwx_update_beacon_abort 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psp_v11_0_8_ring_create -ffffffff820d18b0 t psp_v11_0_8_ring_stop -ffffffff820d1db0 t psp_v11_0_8_ring_destroy -ffffffff820d1e40 t psp_v11_0_8_ring_get_wptr -ffffffff820d1eb0 t psp_v11_0_8_ring_set_wptr -ffffffff820d2000 T psp_v12_0_set_psp_funcs -ffffffff820d2030 t psp_v12_0_init_microcode -ffffffff820d2100 t psp_v12_0_bootloader_load_sysdrv -ffffffff820d2520 t psp_v12_0_bootloader_load_sos -ffffffff820d2990 t psp_v12_0_ring_create -ffffffff820d3670 t psp_v12_0_ring_stop -ffffffff820d3950 t psp_v12_0_ring_destroy -ffffffff820d39e0 t psp_v12_0_mode1_reset -ffffffff820d3b10 t psp_v12_0_ring_get_wptr -ffffffff820d3b80 t psp_v12_0_ring_set_wptr -ffffffff820d4000 T psp_v13_0_set_psp_funcs -ffffffff820d4030 t psp_v13_0_init_microcode -ffffffff820d4160 t psp_v13_0_wait_for_bootloader_steady_state -ffffffff820d4290 t psp_v13_0_bootloader_load_kdb -ffffffff820d42b0 t psp_v13_0_bootloader_load_spl -ffffffff820d42d0 t psp_v13_0_bootloader_load_sysdrv -ffffffff820d42f0 t psp_v13_0_bootloader_load_soc_drv -ffffffff820d4310 t psp_v13_0_bootloader_load_intf_drv -ffffffff820d4330 t psp_v13_0_bootloader_load_dbg_drv -ffffffff820d4350 t psp_v13_0_bootloader_load_ras_drv -ffffffff820d4370 t psp_v13_0_bootloader_load_sos -ffffffff820d4830 t psp_v13_0_ring_create -ffffffff820d50b0 t psp_v13_0_ring_stop -ffffffff820d55b0 t psp_v13_0_ring_destroy -ffffffff820d5640 t psp_v13_0_memory_training -ffffffff820d5b20 t psp_v13_0_ring_get_wptr -ffffffff820d5b90 t psp_v13_0_ring_set_wptr -ffffffff820d5ca0 t psp_v13_0_load_usbc_pd_fw -ffffffff820d5ed0 t psp_v13_0_read_usbc_pd_fw -ffffffff820d6010 t psp_v13_0_update_spirom -ffffffff820d6230 t psp_v13_0_vbflash_status -ffffffff820d6290 t psp_v13_0_fatal_error_recovery_quirk -ffffffff820d63f0 t psp_v13_0_bootloader_load_component -ffffffff820d66b0 t psp_v13_0_memory_training_send_msg -ffffffff820d6830 t psp_v13_0_exec_spi_cmd -ffffffff820d7000 T psp_v13_0_4_set_psp_funcs -ffffffff820d7030 t psp_v13_0_4_init_microcode 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psp_v3_1_ring_destroy -ffffffff820dabb0 t psp_v3_1_smu_reload_quirk -ffffffff820dac00 t psp_v3_1_mode1_reset -ffffffff820dad30 t psp_v3_1_ring_get_wptr -ffffffff820dad80 t psp_v3_1_ring_set_wptr -ffffffff820db000 t sdma_v2_4_early_init -ffffffff820db0f0 t sdma_v2_4_sw_init -ffffffff820db520 t sdma_v2_4_sw_fini -ffffffff820db5f0 t sdma_v2_4_hw_init -ffffffff820dbaa0 t sdma_v2_4_hw_fini -ffffffff820dbaf0 t sdma_v2_4_suspend -ffffffff820dbb40 t sdma_v2_4_resume -ffffffff820dbb50 t sdma_v2_4_is_idle -ffffffff820dbba0 t sdma_v2_4_wait_for_idle -ffffffff820dbc50 t sdma_v2_4_soft_reset -ffffffff820dbe00 t sdma_v2_4_set_clockgating_state -ffffffff820dbe30 t sdma_v2_4_set_powergating_state -ffffffff820dbe60 t sdma_v2_4_ring_get_rptr -ffffffff820dbea0 t sdma_v2_4_ring_get_wptr -ffffffff820dbf00 t sdma_v2_4_ring_set_wptr -ffffffff820dbf40 t sdma_v2_4_ring_emit_ib -ffffffff820dc220 t sdma_v2_4_ring_emit_fence -ffffffff820dc670 t sdma_v2_4_ring_emit_pipeline_sync -ffffffff820dc920 t sdma_v2_4_ring_emit_vm_flush -ffffffff820dcbd0 t sdma_v2_4_ring_emit_hdp_flush -ffffffff820dce80 t sdma_v2_4_ring_test_ring -ffffffff820dd1b0 t sdma_v2_4_ring_test_ib -ffffffff820dd3c0 t sdma_v2_4_ring_insert_nop -ffffffff820dd500 t sdma_v2_4_ring_pad_ib -ffffffff820dd630 t sdma_v2_4_ring_emit_wreg -ffffffff820dd790 t sdma_v2_4_emit_copy_buffer -ffffffff820dd850 t sdma_v2_4_emit_fill_buffer -ffffffff820dd8e0 t sdma_v2_4_vm_copy_pte -ffffffff820dd9a0 t sdma_v2_4_vm_write_pte -ffffffff820dda70 t sdma_v2_4_vm_set_pte_pde -ffffffff820ddb70 t sdma_v2_4_set_trap_irq_state -ffffffff820ddc60 t sdma_v2_4_process_trap_irq -ffffffff820ddd00 t sdma_v2_4_process_illegal_inst_irq -ffffffff820ddd80 t sdma_v2_4_enable -ffffffff820de000 t sdma_v3_0_early_init -ffffffff820de100 t sdma_v3_0_sw_init -ffffffff820de530 t sdma_v3_0_sw_fini -ffffffff820de600 t sdma_v3_0_hw_init -ffffffff820de770 t sdma_v3_0_hw_fini -ffffffff820de7d0 t sdma_v3_0_suspend -ffffffff820de830 t sdma_v3_0_resume -ffffffff820de840 t sdma_v3_0_is_idle -ffffffff820de890 t sdma_v3_0_wait_for_idle -ffffffff820de940 t sdma_v3_0_check_soft_reset -ffffffff820de9a0 t sdma_v3_0_pre_soft_reset -ffffffff820dea00 t sdma_v3_0_soft_reset -ffffffff820deb00 t sdma_v3_0_post_soft_reset -ffffffff820deb50 t sdma_v3_0_set_clockgating_state -ffffffff820dee00 t sdma_v3_0_set_powergating_state -ffffffff820dee30 t sdma_v3_0_get_clockgating_state -ffffffff820deed0 t sdma_v3_0_ring_get_rptr -ffffffff820def10 t sdma_v3_0_ring_get_wptr -ffffffff820def90 t sdma_v3_0_ring_set_wptr -ffffffff820df040 t sdma_v3_0_ring_emit_ib -ffffffff820df320 t sdma_v3_0_ring_emit_fence -ffffffff820df770 t sdma_v3_0_ring_emit_pipeline_sync -ffffffff820dfa20 t sdma_v3_0_ring_emit_vm_flush -ffffffff820dfcd0 t sdma_v3_0_ring_emit_hdp_flush -ffffffff820dff80 t sdma_v3_0_ring_test_ring -ffffffff820e02b0 t sdma_v3_0_ring_test_ib -ffffffff820e04c0 t sdma_v3_0_ring_insert_nop -ffffffff820e0600 t sdma_v3_0_ring_pad_ib -ffffffff820e0730 t sdma_v3_0_ring_emit_wreg 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sdma_v4_4_2_early_init -ffffffff820ec2b0 t sdma_v4_4_2_late_init -ffffffff820ec340 t sdma_v4_4_2_sw_init -ffffffff820ec920 t sdma_v4_4_2_sw_fini -ffffffff820ec9f0 t sdma_v4_4_2_hw_init -ffffffff820eca40 t sdma_v4_4_2_hw_fini -ffffffff820ecb20 t sdma_v4_4_2_suspend -ffffffff820ecc30 t sdma_v4_4_2_resume -ffffffff820ecc80 t sdma_v4_4_2_is_idle -ffffffff820ecd30 t sdma_v4_4_2_wait_for_idle -ffffffff820ece60 t sdma_v4_4_2_soft_reset -ffffffff820ece90 t sdma_v4_4_2_set_clockgating_state -ffffffff820ed350 t sdma_v4_4_2_set_powergating_state -ffffffff820ed380 t sdma_v4_4_2_get_clockgating_state -ffffffff820ed480 t sdma_v4_4_2_xcp_suspend -ffffffff820ed570 t sdma_v4_4_2_xcp_resume -ffffffff820ed5b0 t sdma_v4_4_2_ring_get_rptr -ffffffff820ed630 t sdma_v4_4_2_ring_get_wptr -ffffffff820ed790 t sdma_v4_4_2_ring_set_wptr -ffffffff820ed990 t sdma_v4_4_2_ring_emit_ib -ffffffff820edc70 t sdma_v4_4_2_ring_emit_fence -ffffffff820ee0e0 t sdma_v4_4_2_ring_emit_pipeline_sync -ffffffff820ee140 t sdma_v4_4_2_ring_emit_vm_flush -ffffffff820ee160 t sdma_v4_4_2_ring_emit_hdp_flush -ffffffff820ee230 t sdma_v4_4_2_ring_test_ring -ffffffff820ee560 t sdma_v4_4_2_ring_test_ib -ffffffff820ee770 t sdma_v4_4_2_ring_insert_nop -ffffffff820ee8b0 t sdma_v4_4_2_ring_pad_ib -ffffffff820ee9e0 t sdma_v4_4_2_ring_emit_wreg -ffffffff820eeb40 t sdma_v4_4_2_ring_emit_reg_wait -ffffffff820eeb90 t sdma_v4_4_2_wait_reg_mem -ffffffff820eeee0 t sdma_v4_4_2_page_ring_get_wptr -ffffffff820ef000 t sdma_v4_4_2_page_ring_set_wptr -ffffffff820ef130 t sdma_v4_4_2_emit_copy_buffer -ffffffff820ef1f0 t sdma_v4_4_2_emit_fill_buffer -ffffffff820ef280 t sdma_v4_4_2_vm_copy_pte -ffffffff820ef340 t sdma_v4_4_2_vm_write_pte -ffffffff820ef410 t sdma_v4_4_2_vm_set_pte_pde -ffffffff820ef510 t sdma_v4_4_2_set_trap_irq_state -ffffffff820ef610 t sdma_v4_4_2_process_trap_irq -ffffffff820ef740 t sdma_v4_4_2_process_illegal_inst_irq -ffffffff820ef7e0 t sdma_v4_4_2_set_ecc_irq_state -ffffffff820ef8f0 t sdma_v4_4_2_process_vm_hole_irq -ffffffff820ef9e0 t sdma_v4_4_2_process_doorbell_invalid_irq -ffffffff820efad0 t sdma_v4_4_2_process_pool_timeout_irq -ffffffff820efbc0 t sdma_v4_4_2_process_srbm_write_irq -ffffffff820efcb0 t sdma_v4_4_2_query_ras_error_count -ffffffff820efe30 t sdma_v4_4_2_reset_ras_error_count -ffffffff820effa0 t sdma_v4_4_2_inst_init_golden_registers -ffffffff820f0170 t sdma_v4_4_2_inst_start -ffffffff820f19a0 t sdma_v4_4_2_inst_ctx_switch_enable -ffffffff820f1cf0 t sdma_v4_4_2_inst_enable -ffffffff820f3000 t sdma_v5_0_early_init -ffffffff820f3130 t sdma_v5_0_sw_init -ffffffff820f3350 t sdma_v5_0_sw_fini -ffffffff820f33f0 t sdma_v5_0_hw_init -ffffffff820f48c0 t sdma_v5_0_hw_fini -ffffffff820f4930 t sdma_v5_0_suspend -ffffffff820f49a0 t sdma_v5_0_resume -ffffffff820f49b0 t sdma_v5_0_is_idle -ffffffff820f4a50 t sdma_v5_0_wait_for_idle -ffffffff820f4b30 t sdma_v5_0_soft_reset -ffffffff820f4b60 t sdma_v5_0_set_clockgating_state -ffffffff820f4d80 t sdma_v5_0_set_powergating_state -ffffffff820f4db0 t sdma_v5_0_get_clockgating_state -ffffffff820f4e60 t sdma_v5_0_ring_get_rptr -ffffffff820f4ec0 t sdma_v5_0_ring_get_wptr -ffffffff820f5080 t sdma_v5_0_ring_set_wptr -ffffffff820f5430 t sdma_v5_0_ring_emit_ib -ffffffff820f5730 t sdma_v5_0_ring_emit_fence -ffffffff820f5be0 t sdma_v5_0_ring_emit_pipeline_sync -ffffffff820f5e90 t sdma_v5_0_ring_emit_vm_flush -ffffffff820f5eb0 t sdma_v5_0_ring_emit_hdp_flush -ffffffff820f6180 t sdma_v5_0_ring_test_ring -ffffffff820f65b0 t sdma_v5_0_ring_test_ib -ffffffff820f6940 t sdma_v5_0_ring_insert_nop -ffffffff820f6a80 t sdma_v5_0_ring_pad_ib -ffffffff820f6bb0 t sdma_v5_0_ring_init_cond_exec -ffffffff820f6e00 t sdma_v5_0_ring_patch_cond_exec -ffffffff820f6ec0 t sdma_v5_0_ring_emit_wreg -ffffffff820f7020 t sdma_v5_0_ring_emit_reg_wait -ffffffff820f72c0 t sdma_v5_0_ring_emit_reg_write_reg_wait -ffffffff820f7350 t sdma_v5_0_ring_preempt_ib -ffffffff820f74e0 t sdma_v5_0_ring_emit_mem_sync -ffffffff820f7710 t sdma_v5_0_emit_copy_buffer -ffffffff820f77d0 t sdma_v5_0_emit_fill_buffer -ffffffff820f7860 t sdma_v5_0_vm_copy_pte -ffffffff820f7920 t sdma_v5_0_vm_write_pte -ffffffff820f79f0 t sdma_v5_0_vm_set_pte_pde -ffffffff820f7af0 t sdma_v5_0_set_trap_irq_state -ffffffff820f7b90 t sdma_v5_0_process_trap_irq -ffffffff820f7cd0 t sdma_v5_0_process_illegal_inst_irq -ffffffff820f7d00 t sdma_v5_0_mqd_init -ffffffff820f7df0 t sdma_v5_0_ctx_switch_enable -ffffffff820f8170 t sdma_v5_0_enable -ffffffff820f9000 t sdma_v5_2_early_init -ffffffff820f9130 t sdma_v5_2_sw_init -ffffffff820f93f0 t sdma_v5_2_sw_fini -ffffffff820f9490 t sdma_v5_2_hw_init -ffffffff820fb2c0 t sdma_v5_2_hw_fini -ffffffff820fb330 t sdma_v5_2_suspend -ffffffff820fb3a0 t sdma_v5_2_resume -ffffffff820fb3b0 t sdma_v5_2_is_idle -ffffffff820fb470 t sdma_v5_2_wait_for_idle -ffffffff820fb5a0 t sdma_v5_2_soft_reset -ffffffff820fb8c0 t sdma_v5_2_set_clockgating_state -ffffffff820fbc60 t sdma_v5_2_set_powergating_state -ffffffff820fbc90 t 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sdma_v5_2_ring_emit_mem_sync -ffffffff820fe450 t sdma_v5_2_emit_copy_buffer -ffffffff820fe510 t sdma_v5_2_emit_fill_buffer -ffffffff820fe5a0 t sdma_v5_2_vm_copy_pte -ffffffff820fe660 t sdma_v5_2_vm_write_pte -ffffffff820fe730 t sdma_v5_2_vm_set_pte_pde -ffffffff820fe830 t sdma_v5_2_set_trap_irq_state -ffffffff820fe8f0 t sdma_v5_2_process_trap_irq -ffffffff820fea60 t sdma_v5_2_process_illegal_inst_irq -ffffffff820fea90 t sdma_v5_2_mqd_init -ffffffff820feb80 t sdma_v5_2_ctx_switch_enable -ffffffff820fefd0 t sdma_v5_2_enable -ffffffff82100000 t sdma_v6_0_early_init -ffffffff82100120 t sdma_v6_0_sw_init -ffffffff82100330 t sdma_v6_0_sw_fini -ffffffff821003d0 t sdma_v6_0_hw_init -ffffffff821003e0 t sdma_v6_0_hw_fini -ffffffff821004d0 t sdma_v6_0_suspend -ffffffff82100510 t sdma_v6_0_resume -ffffffff82100520 t sdma_v6_0_is_idle -ffffffff821005c0 t sdma_v6_0_wait_for_idle -ffffffff821006a0 t sdma_v6_0_check_soft_reset -ffffffff82100770 t sdma_v6_0_soft_reset -ffffffff82100cc0 t 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Xresume_legacy2 +ffffffff8168cf40 T Xintr_legacy2_untramp +ffffffff8168d180 T Xrecurse_legacy3 +ffffffff8168d200 T Xresume_legacy3 +ffffffff8168d230 T Xintr_legacy3_untramp +ffffffff8168d470 T Xrecurse_legacy4 +ffffffff8168d4f0 T Xresume_legacy4 +ffffffff8168d520 T Xintr_legacy4_untramp +ffffffff8168d760 T Xrecurse_legacy5 +ffffffff8168d7e0 T Xresume_legacy5 +ffffffff8168d810 T Xintr_legacy5_untramp +ffffffff8168da50 T Xrecurse_legacy6 +ffffffff8168dad0 T Xresume_legacy6 +ffffffff8168db00 T Xintr_legacy6_untramp +ffffffff8168dd40 T Xrecurse_legacy7 +ffffffff8168ddc0 T Xresume_legacy7 +ffffffff8168ddf0 T Xintr_legacy7_untramp +ffffffff8168e030 T Xrecurse_legacy8 +ffffffff8168e0b0 T Xresume_legacy8 +ffffffff8168e0e0 T Xintr_legacy8_untramp +ffffffff8168e320 T Xrecurse_legacy9 +ffffffff8168e3a0 T Xresume_legacy9 +ffffffff8168e3d0 T Xintr_legacy9_untramp +ffffffff8168e610 T Xrecurse_legacy10 +ffffffff8168e690 T Xresume_legacy10 +ffffffff8168e6c0 T Xintr_legacy10_untramp +ffffffff8168e900 T Xrecurse_legacy11 +ffffffff8168e980 T Xresume_legacy11 +ffffffff8168e9b0 T Xintr_legacy11_untramp +ffffffff8168ebf0 T Xrecurse_legacy12 +ffffffff8168ec70 T Xresume_legacy12 +ffffffff8168eca0 T Xintr_legacy12_untramp +ffffffff8168eee0 T Xrecurse_legacy13 +ffffffff8168ef60 T Xresume_legacy13 +ffffffff8168ef90 T Xintr_legacy13_untramp +ffffffff8168f1d0 T Xrecurse_legacy14 +ffffffff8168f250 T Xresume_legacy14 +ffffffff8168f280 T Xintr_legacy14_untramp +ffffffff8168f4c0 T Xrecurse_legacy15 +ffffffff8168f540 T Xresume_legacy15 +ffffffff8168f570 T Xintr_legacy15_untramp +ffffffff8168f7b0 T Xrecurse_ioapic_edge0 +ffffffff8168f830 T Xresume_ioapic_edge0 +ffffffff8168f860 T Xintr_ioapic_edge0_untramp +ffffffff8168fa90 T Xrecurse_ioapic_edge1 +ffffffff8168fb10 T Xresume_ioapic_edge1 +ffffffff8168fb40 T Xintr_ioapic_edge1_untramp +ffffffff8168fd70 T Xrecurse_ioapic_edge2 +ffffffff8168fdf0 T Xresume_ioapic_edge2 +ffffffff8168fe20 T Xintr_ioapic_edge2_untramp +ffffffff81690050 T Xrecurse_ioapic_edge3 +ffffffff816900d0 T Xresume_ioapic_edge3 +ffffffff81690100 T Xintr_ioapic_edge3_untramp +ffffffff81690330 T Xrecurse_ioapic_edge4 +ffffffff816903b0 T Xresume_ioapic_edge4 +ffffffff816903e0 T Xintr_ioapic_edge4_untramp +ffffffff81690610 T Xrecurse_ioapic_edge5 +ffffffff81690690 T Xresume_ioapic_edge5 +ffffffff816906c0 T Xintr_ioapic_edge5_untramp +ffffffff816908f0 T Xrecurse_ioapic_edge6 +ffffffff81690970 T Xresume_ioapic_edge6 +ffffffff816909a0 T Xintr_ioapic_edge6_untramp +ffffffff81690bd0 T Xrecurse_ioapic_edge7 +ffffffff81690c50 T Xresume_ioapic_edge7 +ffffffff81690c80 T Xintr_ioapic_edge7_untramp +ffffffff81690eb0 T Xrecurse_ioapic_edge8 +ffffffff81690f30 T Xresume_ioapic_edge8 +ffffffff81690f60 T Xintr_ioapic_edge8_untramp +ffffffff81691190 T Xrecurse_ioapic_edge9 +ffffffff81691210 T Xresume_ioapic_edge9 +ffffffff81691240 T Xintr_ioapic_edge9_untramp +ffffffff81691470 T Xrecurse_ioapic_edge10 +ffffffff816914f0 T Xresume_ioapic_edge10 +ffffffff81691520 T Xintr_ioapic_edge10_untramp +ffffffff81691750 T Xrecurse_ioapic_edge11 +ffffffff816917d0 T Xresume_ioapic_edge11 +ffffffff81691800 T Xintr_ioapic_edge11_untramp +ffffffff81691a30 T Xrecurse_ioapic_edge12 +ffffffff81691ab0 T Xresume_ioapic_edge12 +ffffffff81691ae0 T Xintr_ioapic_edge12_untramp +ffffffff81691d10 T Xrecurse_ioapic_edge13 +ffffffff81691d90 T Xresume_ioapic_edge13 +ffffffff81691dc0 T Xintr_ioapic_edge13_untramp +ffffffff81691ff0 T Xrecurse_ioapic_edge14 +ffffffff81692070 T Xresume_ioapic_edge14 +ffffffff816920a0 T Xintr_ioapic_edge14_untramp +ffffffff816922d0 T Xrecurse_ioapic_edge15 +ffffffff81692350 T Xresume_ioapic_edge15 +ffffffff81692380 T Xintr_ioapic_edge15_untramp +ffffffff816925b0 T Xrecurse_ioapic_edge16 +ffffffff81692630 T Xresume_ioapic_edge16 +ffffffff81692660 T Xintr_ioapic_edge16_untramp +ffffffff81692890 T Xrecurse_ioapic_edge17 +ffffffff81692910 T Xresume_ioapic_edge17 +ffffffff81692940 T Xintr_ioapic_edge17_untramp +ffffffff81692b70 T Xrecurse_ioapic_edge18 +ffffffff81692bf0 T Xresume_ioapic_edge18 +ffffffff81692c20 T Xintr_ioapic_edge18_untramp +ffffffff81692e50 T Xrecurse_ioapic_edge19 +ffffffff81692ed0 T Xresume_ioapic_edge19 +ffffffff81692f00 T Xintr_ioapic_edge19_untramp +ffffffff81693130 T Xrecurse_ioapic_edge20 +ffffffff816931b0 T Xresume_ioapic_edge20 +ffffffff816931e0 T Xintr_ioapic_edge20_untramp +ffffffff81693410 T Xrecurse_ioapic_edge21 +ffffffff81693490 T Xresume_ioapic_edge21 +ffffffff816934c0 T Xintr_ioapic_edge21_untramp +ffffffff816936f0 T Xrecurse_ioapic_edge22 +ffffffff81693770 T Xresume_ioapic_edge22 +ffffffff816937a0 T Xintr_ioapic_edge22_untramp +ffffffff816939d0 T Xrecurse_ioapic_edge23 +ffffffff81693a50 T Xresume_ioapic_edge23 +ffffffff81693a80 T Xintr_ioapic_edge23_untramp +ffffffff81693cb0 T Xrecurse_ioapic_edge24 +ffffffff81693d30 T Xresume_ioapic_edge24 +ffffffff81693d60 T Xintr_ioapic_edge24_untramp +ffffffff81693f90 T Xrecurse_ioapic_edge25 +ffffffff81694010 T Xresume_ioapic_edge25 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Xrecurse_ioapic_edge33 +ffffffff81695710 T Xresume_ioapic_edge33 +ffffffff81695740 T Xintr_ioapic_edge33_untramp +ffffffff81695970 T Xrecurse_ioapic_edge34 +ffffffff816959f0 T Xresume_ioapic_edge34 +ffffffff81695a20 T Xintr_ioapic_edge34_untramp +ffffffff81695c50 T Xrecurse_ioapic_edge35 +ffffffff81695cd0 T Xresume_ioapic_edge35 +ffffffff81695d00 T Xintr_ioapic_edge35_untramp +ffffffff81695f30 T Xrecurse_ioapic_edge36 +ffffffff81695fb0 T Xresume_ioapic_edge36 +ffffffff81695fe0 T Xintr_ioapic_edge36_untramp +ffffffff81696210 T Xrecurse_ioapic_edge37 +ffffffff81696290 T Xresume_ioapic_edge37 +ffffffff816962c0 T Xintr_ioapic_edge37_untramp +ffffffff816964f0 T Xrecurse_ioapic_edge38 +ffffffff81696570 T Xresume_ioapic_edge38 +ffffffff816965a0 T Xintr_ioapic_edge38_untramp +ffffffff816967d0 T Xrecurse_ioapic_edge39 +ffffffff81696850 T Xresume_ioapic_edge39 +ffffffff81696880 T Xintr_ioapic_edge39_untramp +ffffffff81696ab0 T Xrecurse_ioapic_edge40 +ffffffff81696b30 T Xresume_ioapic_edge40 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Xrecurse_ioapic_edge48 +ffffffff81698230 T Xresume_ioapic_edge48 +ffffffff81698260 T Xintr_ioapic_edge48_untramp +ffffffff81698490 T Xrecurse_ioapic_edge49 +ffffffff81698510 T Xresume_ioapic_edge49 +ffffffff81698540 T Xintr_ioapic_edge49_untramp +ffffffff81698770 T Xrecurse_ioapic_edge50 +ffffffff816987f0 T Xresume_ioapic_edge50 +ffffffff81698820 T Xintr_ioapic_edge50_untramp +ffffffff81698a50 T Xrecurse_ioapic_edge51 +ffffffff81698ad0 T Xresume_ioapic_edge51 +ffffffff81698b00 T Xintr_ioapic_edge51_untramp +ffffffff81698d30 T Xrecurse_ioapic_edge52 +ffffffff81698db0 T Xresume_ioapic_edge52 +ffffffff81698de0 T Xintr_ioapic_edge52_untramp +ffffffff81699010 T Xrecurse_ioapic_edge53 +ffffffff81699090 T Xresume_ioapic_edge53 +ffffffff816990c0 T Xintr_ioapic_edge53_untramp +ffffffff816992f0 T Xrecurse_ioapic_edge54 +ffffffff81699370 T Xresume_ioapic_edge54 +ffffffff816993a0 T Xintr_ioapic_edge54_untramp +ffffffff816995d0 T Xrecurse_ioapic_edge55 +ffffffff81699650 T Xresume_ioapic_edge55 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x86_bus_space_mem_read_1 +ffffffff816b0970 T x86_bus_space_mem_read_2 +ffffffff816b09a0 T x86_bus_space_mem_read_4 +ffffffff816b09d0 T x86_bus_space_mem_read_8 +ffffffff816b0a00 T x86_bus_space_mem_read_multi_1 +ffffffff816b0a40 T x86_bus_space_mem_read_multi_2 +ffffffff816b0a80 T x86_bus_space_mem_read_multi_4 +ffffffff816b0ac0 T x86_bus_space_mem_read_multi_8 +ffffffff816b0b00 T x86_bus_space_mem_read_region_1 +ffffffff816b0b30 T x86_bus_space_mem_read_region_2 +ffffffff816b0b70 T x86_bus_space_mem_read_region_4 +ffffffff816b0ba0 T x86_bus_space_mem_read_region_8 +ffffffff816b0be0 T x86_bus_space_mem_write_1 +ffffffff816b0c10 T x86_bus_space_mem_write_2 +ffffffff816b0c40 T x86_bus_space_mem_write_4 +ffffffff816b0c70 T x86_bus_space_mem_write_8 +ffffffff816b0ca0 T x86_bus_space_mem_write_multi_1 +ffffffff816b0ce0 T x86_bus_space_mem_write_multi_2 +ffffffff816b0d20 T x86_bus_space_mem_write_multi_4 +ffffffff816b0d60 T x86_bus_space_mem_write_multi_8 +ffffffff816b0da0 T x86_bus_space_mem_write_region_1 +ffffffff816b0dd0 T x86_bus_space_mem_write_region_2 +ffffffff816b0e10 T x86_bus_space_mem_write_region_4 +ffffffff816b0e40 T x86_bus_space_mem_write_region_8 +ffffffff816b0e80 T x86_bus_space_mem_set_multi_1 +ffffffff816b0f00 T x86_bus_space_mem_set_multi_2 +ffffffff816b0f90 T x86_bus_space_mem_set_multi_4 +ffffffff816b1010 T x86_bus_space_mem_set_multi_8 +ffffffff816b10a0 T x86_bus_space_mem_set_region_1 +ffffffff816b1140 T x86_bus_space_mem_set_region_2 +ffffffff816b11e0 T x86_bus_space_mem_set_region_4 +ffffffff816b1280 T x86_bus_space_mem_set_region_8 +ffffffff816b1320 T x86_bus_space_mem_copy_1 +ffffffff816b1470 T x86_bus_space_mem_copy_2 +ffffffff816b15d0 T x86_bus_space_mem_copy_4 +ffffffff816b1720 T x86_bus_space_mem_copy_8 +ffffffff816b1890 T x86_bus_space_mem_vaddr +ffffffff816b18c0 T x86_bus_space_mem_mmap +ffffffff816b18f0 T x86_bus_space_init +ffffffff816b19a0 T x86_bus_space_mallocok +ffffffff816b19d0 T bus_space_map +ffffffff816b1c60 T x86_mem_add_mapping +ffffffff816b1db0 T _bus_space_map +ffffffff816b1f10 T bus_space_alloc +ffffffff816b21c0 T _bus_space_unmap +ffffffff816b2310 T bus_space_unmap +ffffffff816b2510 T bus_space_free +ffffffff816b2530 T bus_space_subregion +ffffffff816b3000 T _bus_dmamap_create +ffffffff816b3340 T _bus_dmamap_destroy +ffffffff816b3450 T _bus_dmamap_load +ffffffff816b3510 T _bus_dmamap_load_buffer +ffffffff816b3790 T _bus_dmamap_load_mbuf +ffffffff816b38c0 T _bus_dmamap_load_uio +ffffffff816b3a70 T _bus_dmamap_load_raw +ffffffff816b3d70 T _bus_dmamap_unload +ffffffff816b3db0 T _bus_dmamap_sync +ffffffff816b3ec0 T _bus_dmamem_alloc +ffffffff816b3f50 T _bus_dmamem_alloc_range +ffffffff816b40f0 T _bus_dmamem_free +ffffffff816b4200 T _bus_dmamem_map +ffffffff816b4400 T _bus_dmamem_unmap +ffffffff816b44b0 T _bus_dmamem_mmap +ffffffff816b5000 T cpu_spinup_finish +ffffffff816b6000 T x86_64_ipi_halt +ffffffff816b60e0 T x86_64_ipi_nop +ffffffff816b6110 T x86_64_ipi_vmclear_vmm +ffffffff816b6120 T x86_64_ipi_reload_mtrr +ffffffff816b6170 T x86_64_ipi_start_vmm +ffffffff816b6180 T x86_64_ipi_stop_vmm +ffffffff816b6190 T x86_64_ipi_wbinvd +ffffffff816b7000 T x86_send_ipi +ffffffff816b7060 T x86_fast_ipi +ffffffff816b70d0 T x86_broadcast_ipi +ffffffff816b7160 T x86_ipi_handler +ffffffff816b8000 T mp_setperf +ffffffff816b8070 T x86_setperf_ipi +ffffffff816b8090 T mp_setperf_init +ffffffff816b9000 T apic_format_redir +ffffffff816ba000 T consinit +ffffffff816bb000 T cninit +ffffffff816bc000 T dkcsumattach +ffffffff816bd000 T db_read_address +ffffffff816bd1e0 T db_print_address +ffffffff816bd300 T db_disasm_3dnow +ffffffff816bd3c0 T db_disasm_esc +ffffffff816bd600 T db_disasm +ffffffff816bf000 T db_printtrap +ffffffff816bf090 T db_ktrap +ffffffff816bf300 T db_enter_ddb +ffffffff816bf630 T db_sysregs_cmd +ffffffff816bf7b0 T db_cpuinfo_cmd +ffffffff816bf900 T db_startproc_cmd +ffffffff816bfa70 T db_startcpu +ffffffff816bfb00 T db_stopproc_cmd +ffffffff816bfce0 T db_stopcpu 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devid_free +ffffffff81700100 T scsi_remove_link +ffffffff81700170 T scsi_strvis +ffffffff81700300 T scsi_devid_pg83 +ffffffff81700560 T scsi_devid_pg80 +ffffffff81700770 T scsi_devid_wwn +ffffffff81700800 T devid_alloc +ffffffff817008a0 T devid_copy +ffffffff81701000 T cdmatch +ffffffff81701060 T cdattach +ffffffff81701120 T cddetach +ffffffff817011c0 T cdactivate +ffffffff81701250 T cd_interpret_sense +ffffffff817012d0 T cdstart +ffffffff81701590 T cdopen +ffffffff817017f0 T cd_get_parms +ffffffff817018a0 T cdgetdisklabel +ffffffff81701ad0 T cdclose +ffffffff81701c40 T cdstrategy +ffffffff81701da0 T cd_cmd_rw6 +ffffffff81701df0 T cd_cmd_rw10 +ffffffff81701e50 T cd_cmd_rw12 +ffffffff81701ec0 T cd_buf_done +ffffffff81702080 T cdminphys +ffffffff81702170 T cdread +ffffffff817021a0 T cdwrite +ffffffff817021d0 T cdioctl +ffffffff81702d80 T cd_set_pa_immed +ffffffff81702ed0 T cd_play_tracks +ffffffff817030a0 T cd_play_msf +ffffffff81703190 T cd_play +ffffffff81703250 T cd_read_subchannel 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ioapic_hwmask +ffffffff8172f8b0 T ioapic_hwunmask +ffffffff8172f960 T ioapic_addroute +ffffffff8172f9d0 T ioapic_delroute +ffffffff8172fab0 T apic_set_redir +ffffffff8172fd40 T ioapic_enable +ffffffff8172fe70 T ioapic_dump +ffffffff81730000 T efifb_match +ffffffff81730090 T efifb_attach +ffffffff817303e0 T efifb_ioctl +ffffffff81730510 T efifb_mmap +ffffffff81730570 T efifb_alloc_screen +ffffffff817305a0 T efifb_efiinfo_init +ffffffff817306b0 T efifb_rasops_init +ffffffff817308c0 T efifb_cnattach +ffffffff81730ac0 T efifb_cnattach_common +ffffffff81730bc0 T efifb_early_map +ffffffff81730bd0 T efifb_cnremap +ffffffff81730c80 T efifb_early_cleanup +ffffffff81730c90 T efifb_is_console +ffffffff81730d80 T efifb_is_primary +ffffffff81730eb0 T efifb_detach +ffffffff81730ee0 T efifb_reattach +ffffffff81730f00 T efifb_cb_cnattach +ffffffff81731090 T cb_find_fb +ffffffff81731220 T efifb_cb_found +ffffffff81731260 T efifb_stolen +ffffffff81732000 T pvbus_match +ffffffff81732060 T pvbus_attach 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xen_init_interrupts +ffffffff8173bcd0 T xen_init_grant_tables +ffffffff8173be50 T xen_probe_devices +ffffffff8173c190 T xen_disable_emulated_devices +ffffffff8173c210 T xen_deferred +ffffffff8173c2b0 T xen_intr_enable +ffffffff8173c430 T xen_control +ffffffff8173c630 T xen_resume +ffffffff8173c660 T xen_hypercall +ffffffff8173c840 T xen_hypercallv +ffffffff8173c900 T xen_intr_ack +ffffffff8173c960 T xen_intr +ffffffff8173cb90 T xen_intr_schedule +ffffffff8173ccc0 T xen_intr_barrier +ffffffff8173cd90 T xen_intr_signal +ffffffff8173cee0 T xen_intr_establish +ffffffff8173d210 T xen_intr_dispatch +ffffffff8173d340 T xen_intr_disestablish +ffffffff8173d540 T xen_intr_mask +ffffffff8173d610 T xen_intr_unmask +ffffffff8173d790 T xen_grant_table_grow +ffffffff8173da00 T xen_grant_table_alloc +ffffffff8173dcb0 T xen_grant_table_free +ffffffff8173dd60 T xen_grant_table_enter +ffffffff8173de10 T xen_grant_table_remove +ffffffff8173df70 T xen_attach_device +ffffffff8173e140 t xen_attach_print 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T hv_channel_send +ffffffff8174cc80 T hv_channel_send_sgl +ffffffff8174ceb0 T hv_channel_send_prpl +ffffffff8174d0f0 T hv_ring_peek +ffffffff8174d1e0 T hv_ring_read +ffffffff8174d320 T hv_channel_recv +ffffffff8174d650 t hv_attach_print +ffffffff8174d6b0 T hv_evcount_attach +ffffffff8174e000 T hv_attach_icdevs +ffffffff8174e1f0 T hv_heartbeat_attach +ffffffff8174e290 T hv_heartbeat +ffffffff8174e4a0 T hv_shutdown_attach +ffffffff8174e560 t hv_shutdown_task +ffffffff8174e570 T hv_shutdown +ffffffff8174e7e0 T hv_timesync_attach +ffffffff8174e8e0 T hv_timesync +ffffffff8174ebd0 T hv_kvp_attach +ffffffff8174f030 t kvp_pool_insert +ffffffff8174f1a0 T hv_kvop +ffffffff8174f6b0 T hv_kvp +ffffffff817505d0 t kvp_pool_import +ffffffff81750830 t kvp_pool_export +ffffffff81751000 T hvn_match +ffffffff81751060 T hvn_attach +ffffffff817513f0 T hvn_nvs_attach +ffffffff81751790 T hvn_rx_ring_create +ffffffff81751970 T hvn_tx_ring_create +ffffffff81751b90 T hvn_ioctl +ffffffff81751e10 T hvn_start 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hvn_rndis_complete +ffffffff81755260 T hvn_rndis_status +ffffffff81756000 T hvs_match +ffffffff81756080 T hvs_attach +ffffffff817562c0 T hvs_scsi_cmd +ffffffff81756760 T hvs_intr +ffffffff817568e0 T hvs_alloc_ccbs +ffffffff81756b70 T hvs_connect +ffffffff81757120 T hvs_scsi_probe +ffffffff81757160 T hvs_scsi_done +ffffffff817571e0 T hvs_scsi_cmd_done +ffffffff81757500 T hvs_poll +ffffffff81757610 T hvs_start +ffffffff81757730 T hvs_poll_done +ffffffff817577f0 T hvs_empty_done +ffffffff81757820 T hvs_put_ccb +ffffffff817578b0 T hvs_get_ccb +ffffffff81757950 T hvs_free_ccbs +ffffffff81758000 T virtio_device_string +ffffffff81758040 T virtio_reset +ffffffff817580a0 T virtio_reinit_start +ffffffff817581e0 T virtio_init_vq +ffffffff81758410 T virtio_reinit_end +ffffffff81758430 T virtio_check_vqs +ffffffff81758580 T virtio_check_vq +ffffffff81758670 T virtio_alloc_vq +ffffffff81758ae0 T virtio_free_vq +ffffffff81758c40 T vq_alloc_entry +ffffffff81758c80 T vq_free_entry +ffffffff81758cc0 T virtio_enqueue_prep +ffffffff81758d20 T virtio_enqueue_reserve +ffffffff81759010 T virtio_enqueue_abort +ffffffff817590c0 T virtio_enqueue +ffffffff817591b0 T virtio_enqueue_p +ffffffff81759230 T virtio_enqueue_commit +ffffffff81759510 T virtio_enqueue_trim +ffffffff81759630 T virtio_dequeue +ffffffff81759760 T virtio_dequeue_commit +ffffffff81759810 T virtio_postpone_intr +ffffffff81759900 T virtio_nused +ffffffff81759980 T virtio_postpone_intr_smart +ffffffff81759a80 T virtio_postpone_intr_far +ffffffff81759b70 T virtio_stop_vq_intr +ffffffff81759c50 T virtio_start_vq_intr +ffffffff8175a000 T vio_match +ffffffff8175a030 T vio_attach +ffffffff8175aa10 T vio_alloc_dmamem +ffffffff8175abc0 T vio_free_dmamem +ffffffff8175ac60 T vio_alloc_mem +ffffffff8175b200 T vio_get_lladdr +ffffffff8175b320 T vio_put_lladdr +ffffffff8175b410 T vio_rx_intr +ffffffff8175b520 T vio_tx_intr +ffffffff8175b5b0 T vio_ctrleof +ffffffff8175b6c0 T vio_start +ffffffff8175bd50 T vio_ioctl +ffffffff8175bf40 T vio_media_change +ffffffff8175bf70 T vio_media_status +ffffffff8175c040 T vio_config_change +ffffffff8175c140 T vio_txtick +ffffffff8175c1d0 T vio_rxtick +ffffffff8175c290 T vio_link_state +ffffffff8175c330 T vio_init +ffffffff8175c510 T vio_stop +ffffffff8175c830 T vio_populate_rx_mbufs +ffffffff8175cbd0 T vio_iff +ffffffff8175cdc0 T vio_ctrl_guest_offloads +ffffffff8175cf50 T vio_rxeof +ffffffff8175d250 T vio_ctrl_wakeup +ffffffff8175d270 T vio_tx_drain +ffffffff8175d410 T vio_rx_drain +ffffffff8175d520 T vio_tx_offload +ffffffff8175d6f0 T vio_tx_dequeue +ffffffff8175d960 T vio_encap +ffffffff8175da40 T vio_add_rx_mbuf +ffffffff8175db30 T vio_free_rx_mbuf +ffffffff8175dbc0 T vio_rx_offload +ffffffff8175dd70 T vio_txeof +ffffffff8175def0 T vio_ctrl_start +ffffffff8175e130 T vio_ctrl_submit +ffffffff8175e360 T vio_ctrl_finish +ffffffff8175e3b0 T vio_ctrl_rx +ffffffff8175e540 T vio_set_rx_filter +ffffffff8175f000 T vioblk_match +ffffffff8175f030 T vioblk_attach +ffffffff8175f370 T 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aq_fw1x_get_stats +ffffffff817e51f0 T aq_fw2x_reset +ffffffff817e5290 T aq_fw2x_set_mode +ffffffff817e5470 T aq_fw2x_get_mode +ffffffff817e5630 T aq_fw2x_get_stats +ffffffff817e5660 T aq2_fw_reset +ffffffff817e5850 T aq2_get_mac_addr +ffffffff817e5900 T aq2_fw_set_mode +ffffffff817e5b70 T aq2_fw_get_mode +ffffffff817e5c50 T aq2_fw_get_stats +ffffffff817e5c80 T aq_match +ffffffff817e5cb0 T aq_attach +ffffffff817e6bd0 T aq_activate +ffffffff817e6c00 T aq_lookup +ffffffff817e6c80 T aq_intr +ffffffff817e6e40 T aq_intr_link +ffffffff817e6f60 T aq1_fw_reboot +ffffffff817e7230 T aq2_fw_reboot +ffffffff817e7750 T aq_hw_reset +ffffffff817e7900 T aq_init_rss +ffffffff817e7d10 T aq_hw_init +ffffffff817e80c0 T aq_ifmedia_change +ffffffff817e81b0 T aq_ifmedia_status +ffffffff817e82c0 T aq_ioctl +ffffffff817e8550 T aq_start +ffffffff817e88e0 T aq_watchdog +ffffffff817e8910 T aq_set_linkmode +ffffffff817e8940 T aq_refill +ffffffff817e89c0 T aq_intr_queue +ffffffff817e8ac0 T aq_enable_intr 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aq_queue_down +ffffffff817eda40 T aq_invalidate_rx_desc_cache +ffffffff817edad0 T aq_up +ffffffff817edfc0 T aq_down +ffffffff817ee160 T aq_rxrinfo +ffffffff817ee270 T aq_iff +ffffffff817ef000 T tulip_probe +ffffffff817ef060 T tulip_attach +ffffffff817efcd0 T tulip_timeout_callback +ffffffff817efd40 T tulip_timeout +ffffffff817efdb0 T tulip_txprobe +ffffffff817eff30 T tulip_txput +ffffffff817f0590 T tulip_media_set +ffffffff817f0c50 T tulip_reset +ffffffff817f10a0 T tulip_mii_autonegotiate +ffffffff817f1400 T tulip_mii_readreg +ffffffff817f1640 T tulip_mii_writereg +ffffffff817f1890 T tulip_linkup +ffffffff817f1970 T tulip_init +ffffffff817f1b20 T tulip_media_print +ffffffff817f1b70 T tulip_media_link_monitor +ffffffff817f1de0 T tulip_mii_map_abilities +ffffffff817f1e70 T tulip_media_poll +ffffffff817f23c0 T tulip_mii_phy_readspecific +ffffffff817f25c0 T tulip_media_select +ffffffff817f2700 T tulip_21040_mediainfo_init +ffffffff817f2800 T tulip_21040_media_probe +ffffffff817f28f0 T tulip_21040_10baset_only_media_probe +ffffffff817f29b0 T tulip_21040_10baset_only_media_select +ffffffff817f2a10 T tulip_21040_auibnc_only_media_probe +ffffffff817f2ab0 T tulip_21040_auibnc_only_media_select +ffffffff817f2b00 T tulip_21041_mediainfo_init +ffffffff817f2bc0 T tulip_21041_media_probe +ffffffff817f2ca0 T tulip_21041_media_poll +ffffffff817f3010 T tulip_mii_get_phyaddr +ffffffff817f30e0 T tulip_2114x_media_preset +ffffffff817f3310 T tulip_null_media_poll +ffffffff817f3340 T tulip_21140_mediainit +ffffffff817f3390 T tulip_21140_evalboard_media_probe +ffffffff817f35c0 T tulip_21140_accton_media_probe +ffffffff817f3820 T tulip_21140_smc9332_media_probe +ffffffff817f3aa0 T tulip_21140_cogent_em100_media_probe +ffffffff817f3c40 T tulip_21140_znyx_zx34x_media_probe +ffffffff817f3ee0 T tulip_2114x_media_probe +ffffffff817f3f10 T tulip_delay_300ns +ffffffff817f4070 T tulip_srom_idle +ffffffff817f4d90 T tulip_srom_read +ffffffff817f5fe0 T tulip_mii_writebits +ffffffff817f66f0 T tulip_mii_turnaround +ffffffff817f7170 T tulip_mii_readbits +ffffffff817f7680 T tulip_identify_dec_nic +ffffffff817f7760 T tulip_identify_znyx_nic +ffffffff817f7a60 T tulip_identify_smc_nic +ffffffff817f7c50 T tulip_identify_cogent_nic +ffffffff817f7d60 T tulip_identify_accton_nic +ffffffff817f7ec0 T tulip_identify_asante_nic +ffffffff817f81d0 T tulip_identify_compex_nic +ffffffff817f8340 T tulip_srom_decode +ffffffff817f9000 T tulip_read_macaddr +ffffffff817f9a60 T tulip_ifmedia_add +ffffffff817f9b70 T tulip_ifmedia_change +ffffffff817f9d60 T tulip_ifmedia_status +ffffffff817f9dd0 T tulip_alloc_rxmap +ffffffff817f9e10 T tulip_free_rxmap +ffffffff817f9e50 T tulip_alloc_txmap +ffffffff817f9e90 T tulip_free_txmap +ffffffff817f9ed0 T tulip_addr_filter +ffffffff817fa230 T tulip_rx_intr +ffffffff817fa8f0 T tulip_txput_setup +ffffffff817fabd0 T tulip_tx_intr +ffffffff817fb030 T tulip_print_abnormal_interrupt +ffffffff817fb060 T tulip_intr_handler +ffffffff817fb450 T tulip_ifstart +ffffffff817fb530 T tulip_intr_shared +ffffffff817fb5b0 T tulip_intr_normal +ffffffff817fb600 T tulip_ifioctl +ffffffff817fb720 T tulip_ifwatchdog +ffffffff817fb840 T tulip_busdma_allocmem +ffffffff817fba00 T tulip_busdma_init +ffffffff817fbc50 T tulip_initcsrs +ffffffff817fbd50 T tulip_initring +ffffffff817fc000 T ep_pci_match +ffffffff817fc030 T ep_pci_attach +ffffffff817fd000 T pcn_match +ffffffff817fd070 T pcn_attach +ffffffff817fd960 T pcn_tick +ffffffff817fd9d0 T pcn_reset +ffffffff817fda60 T pcn_intr +ffffffff817fdd30 T pcn_ioctl +ffffffff817fded0 T pcn_start +ffffffff817fe390 T pcn_watchdog +ffffffff817fe410 T pcn_txintr +ffffffff817fe930 T pcn_init +ffffffff817ff3e0 T pcn_stop +ffffffff817ff590 T pcn_rxintr +ffffffff817ffb30 T pcn_spnd +ffffffff817ffc60 T pcn_add_rxbuf +ffffffff817ffe90 T pcn_rxdrain +ffffffff817fff40 T pcn_set_filter +ffffffff818000b0 T pcn_79c970_mediainit +ffffffff818001e0 T pcn_79c970_mediachange +ffffffff818003d0 T pcn_79c970_mediastatus +ffffffff81800410 T pcn_79c971_mediainit +ffffffff818004f0 T pcn_mii_readreg +ffffffff818005d0 T pcn_mii_writereg +ffffffff81800680 T pcn_mii_statchg +ffffffff818006f0 T pcn_79c971_mediachange +ffffffff81800740 T pcn_79c971_mediastatus +ffffffff81801000 T siop_lookup_product +ffffffff818010a0 T siop_pci_attach_common +ffffffff818015b0 T siop_pci_reset +ffffffff81802000 T siop_pci_match +ffffffff81802050 T siop_pci_attach +ffffffff81803000 T sii3114_read_reg +ffffffff81803060 T sii3114_write_reg +ffffffff818030d0 T pdc203xx_read_reg +ffffffff81803130 T pdc203xx_write_reg +ffffffff818031a0 T svwsata_read_reg +ffffffff81803210 T svwsata_write_reg +ffffffff81803260 T svwsata_lba48_write_reg +ffffffff818032b0 T pciide_pci_read +ffffffff81803300 T pciide_pci_write +ffffffff81803380 T default_chip_map +ffffffff81803ac0 T artisea_chip_map +ffffffff81803db0 T piix_chip_map +ffffffff81804470 T piixsata_chip_map +ffffffff81804a80 T sch_chip_map +ffffffff81804e40 T amd756_chip_map +ffffffff81805310 T ixp_chip_map +ffffffff81805720 T cmd_chip_map +ffffffff818058a0 T cmd0643_9_chip_map +ffffffff81805c10 T cmd680_chip_map +ffffffff81805e50 T sii3112_chip_map +ffffffff818062a0 T sii3114_chip_map +ffffffff818068f0 T apollo_chip_map +ffffffff81807070 T sata_chip_map +ffffffff818072b0 T cy693_chip_map +ffffffff81807710 T sis_chip_map +ffffffff81807fe0 T natsemi_chip_map +ffffffff81808540 T ns_scx200_chip_map +ffffffff81808980 T acer_chip_map +ffffffff81809150 T hpt_chip_map +ffffffff81809720 T pdc202xx_chip_map +ffffffff8180a200 T pdcsata_chip_map +ffffffff8180aae0 T acard_chip_map +ffffffff8180adb0 T serverworks_chip_map +ffffffff8180b180 T svwsata_chip_map +ffffffff8180b5e0 T nforce_chip_map +ffffffff8180baf0 T ite_chip_map +ffffffff8180be20 T jmicron_chip_map +ffffffff8180c2c0 T phison_chip_map +ffffffff8180c690 T rdc_chip_map +ffffffff8180cbb0 T pciide_match +ffffffff8180cc60 T pciide_attach +ffffffff8180cd40 T pciide_detach +ffffffff8180cdb0 T pciide_activate +ffffffff8180d610 T pciide_lookup_product +ffffffff8180d8c0 T pciide_dmacmd_read +ffffffff8180d8f0 T pciide_dmacmd_write +ffffffff8180d920 T pciide_dmactl_read +ffffffff8180d950 T pciide_dmactl_write +ffffffff8180d980 T pciide_dmatbl_write +ffffffff8180d9b0 T pciide_mapregs_compat +ffffffff8180db70 T pciide_unmapregs_compat +ffffffff8180dc10 T pciide_mapregs_native +ffffffff8180dfb0 T pciide_unmapregs_native +ffffffff8180e060 T pciide_mapreg_dma +ffffffff8180e220 T pciide_dma_init +ffffffff8180e520 T pciide_dma_start +ffffffff8180e5b0 T pciide_dma_finish +ffffffff8180e7c0 T pciide_unmapreg_dma +ffffffff8180e7f0 T pciide_intr_flag +ffffffff8180eab0 T pciide_compat_intr +ffffffff8180eb30 T pciide_pci_intr +ffffffff8180ec10 T pciide_channel_dma_setup +ffffffff8180ecf0 T pciide_dma_table_setup +ffffffff8180ef80 T pciide_irqack +ffffffff8180efe0 T pciide_chansetup +ffffffff8180f0d0 T pciide_chanfree +ffffffff8180f120 T pciide_mapchan +ffffffff8180f1c0 T pciide_unmap_chan +ffffffff8180f2c0 T pciide_chan_candisable +ffffffff8180f340 T pciide_map_compat_intr +ffffffff8180f400 T pciide_unmap_compat_intr +ffffffff8180f460 T pciide_print_channels +ffffffff8180f530 T pciide_print_modes +ffffffff8180f540 T default_chip_unmap +ffffffff8180f640 T sata_setup_channel +ffffffff8180f770 T piix_timing_debug +ffffffff8180f7a0 T piix_setup_channel +ffffffff8180fcb0 T piix3_4_setup_channel +ffffffff81810500 T piix_setup_idetim_timings +ffffffff81810570 T piix_setup_idetim_drvs +ffffffff81810680 T piix_setup_sidetim_timings +ffffffff818106f0 T amd756_setup_channel +ffffffff81810af0 T apollo_setup_channel +ffffffff81810e90 T cmd_channel_map +ffffffff81811230 T cmd_pci_intr +ffffffff81811360 T cmd646_9_irqack +ffffffff81811490 T cmd0643_9_setup_channel +ffffffff81811930 T cmd680_setup_channel +ffffffff81811ef0 T cmd680_channel_map +ffffffff81812240 T sii_fixup_cacheline +ffffffff818125d0 T sii3112_setup_channel +ffffffff818127d0 T sii3112_drv_probe +ffffffff81812bc0 T sii3114_mapreg_dma +ffffffff81812ed0 T sii3114_chansetup +ffffffff81812fa0 T sii3114_mapchan +ffffffff818132f0 T sii3114_dmacmd_read +ffffffff81813330 T sii3114_dmacmd_write +ffffffff81813370 T sii3114_dmactl_read +ffffffff818133b0 T sii3114_dmactl_write +ffffffff818133f0 T sii3114_dmatbl_write +ffffffff81813430 T cy693_setup_channel +ffffffff81813670 T sis_hostbr_match +ffffffff81813740 T sis_south_match +ffffffff81813780 T sis_setup_channel +ffffffff81813b00 T sis96x_setup_channel +ffffffff81813de0 T natsemi_irqack +ffffffff81813e90 T natsemi_setup_channel +ffffffff818142f0 T natsemi_pci_intr +ffffffff81814400 T ns_scx200_setup_channel +ffffffff81814730 T acer_dma_init +ffffffff81814770 T acer_setup_channel +ffffffff81814be0 T acer_pci_intr +ffffffff81814ce0 T hpt_setup_channel +ffffffff81815070 T hpt_pci_intr +ffffffff818151a0 T pdc268_config_read +ffffffff81815210 T pdc20268_setup_channel +ffffffff81815400 T pdc202xx_setup_channel +ffffffff81815880 T pdc20262_dma_start +ffffffff81815a00 T pdc20262_dma_finish +ffffffff81815af0 T pdc20265_pci_intr +ffffffff81815cd0 T pdc202xx_pci_intr +ffffffff81815e00 T pdc203xx_pci_intr +ffffffff81815f10 T pdc205xx_pci_intr +ffffffff81816080 T pdc203xx_irqack +ffffffff81816130 T pdc203xx_setup_channel +ffffffff81816250 T pdc205xx_do_reset +ffffffff81816320 T pdc205xx_drv_probe +ffffffff81816620 T pdc203xx_dma_start +ffffffff818166f0 T pdc203xx_dma_finish +ffffffff81816800 T serverworks_setup_channel +ffffffff81816c60 T serverworks_pci_intr +ffffffff81816d90 T svwsata_mapreg_dma +ffffffff81816e40 T svwsata_drv_probe +ffffffff818171b0 T svwsata_mapchan +ffffffff818172b0 T svwsata_dmacmd_read +ffffffff818172e0 T svwsata_dmacmd_write +ffffffff81817310 T svwsata_dmactl_read +ffffffff81817340 T svwsata_dmactl_write +ffffffff81817370 T svwsata_dmatbl_write +ffffffff818173a0 T acard_setup_channel +ffffffff81817820 T nforce_setup_channel +ffffffff81817ba0 T nforce_pci_intr +ffffffff81817cb0 T ite_setup_channel +ffffffff81818050 T ixp_setup_channel +ffffffff81818450 T jmicron_setup_channel +ffffffff818186c0 T phison_setup_channel +ffffffff818188e0 T sch_setup_channel +ffffffff81818af0 T rdc_setup_channel +ffffffff81818f60 t ba5_read_4_ind +ffffffff81819010 t ba5_write_4_ind +ffffffff8181a000 T ppbmatch +ffffffff8181a050 T ppbattach +ffffffff8181a940 T ppbdetach +ffffffff8181aa90 T ppbactivate +ffffffff8181b020 T ppb_alloc_busrange +ffffffff8181b1f0 T ppb_hotplug_insert +ffffffff8181b250 T ppb_hotplug_rescan +ffffffff8181b290 T ppb_hotplug_remove +ffffffff8181b410 T ppb_hotplug_insert_finish +ffffffff8181b440 T ppb_intr +ffffffff8181b520 T ppb_alloc_resources +ffffffff8181bd40 T ppbprint +ffffffff8181c000 T cy_pci_match +ffffffff8181c030 T cy_pci_attach +ffffffff8181d000 T rl_pci_match +ffffffff8181d060 T rl_pci_attach +ffffffff8181d260 T rl_pci_detach +ffffffff8181e000 T re_pci_probe +ffffffff8181e0b0 T re_pci_attach +ffffffff8181e4a0 T re_pci_detach +ffffffff8181e520 T re_pci_activate +ffffffff8181f000 T vr_probe +ffffffff8181f0d0 T vr_attach +ffffffff8181f7f0 T vr_activate +ffffffff8181f860 T vr_mii_readreg +ffffffff8181fa20 T vr_mii_writereg +ffffffff8181fbd0 T vr_miibus_readreg +ffffffff8181fc40 T vr_miibus_writereg +ffffffff8181fcb0 T vr_miibus_statchg +ffffffff8181fcd0 T vr_setcfg +ffffffff8181ff40 T vr_iff +ffffffff818200d0 T vr_reset +ffffffff81820210 T vr_quirks +ffffffff81820310 T vr_dmamem_alloc +ffffffff818204a0 T vr_dmamem_free +ffffffff81820530 T vr_intr +ffffffff818207b0 T vr_chipinit +ffffffff818208d0 T vr_ioctl +ffffffff81820ab0 T vr_start +ffffffff81820cb0 T vr_watchdog +ffffffff81820d60 T vr_wol +ffffffff81820f70 T vr_ifmedia_upd +ffffffff81820fc0 T vr_ifmedia_sts +ffffffff81821030 T vr_tick +ffffffff818210e0 T vr_rxtick +ffffffff818211e0 T vr_stop +ffffffff81821520 T vr_init +ffffffff81821c50 T vr_list_tx_init +ffffffff81821d50 T vr_list_rx_init +ffffffff81821f40 T vr_fill_rx_ring +ffffffff81822010 T vr_alloc_mbuf +ffffffff818221b0 T vr_rxeof +ffffffff81822490 T vr_rxeoc +ffffffff81822680 T vr_txeof +ffffffff81822860 T vr_encap +ffffffff81823000 T txp_probe +ffffffff81823030 T txp_attach +ffffffff818231f0 T txp_attachhook +ffffffff81823610 T txp_chip_init +ffffffff81823840 T txp_download_fw +ffffffff81823dd0 T txp_alloc_rings +ffffffff81824b90 T txp_command +ffffffff81824c70 T txp_ifmedia_upd +ffffffff81824d90 T txp_ifmedia_sts +ffffffff818250b0 T txp_ioctl +ffffffff81825210 T txp_start +ffffffff81825640 T txp_watchdog +ffffffff81825670 T txp_capabilities +ffffffff81825840 T txp_tick +ffffffff818259d0 T txp_intr +ffffffff81825ca0 T txp_reset_adapter +ffffffff81825dd0 T txp_download_fw_wait +ffffffff81825ee0 T txp_download_fw_section +ffffffff81826340 T txp_dma_malloc +ffffffff81826510 T txp_dma_free +ffffffff818265a0 T txp_rx_reclaim +ffffffff818268e0 T txp_rxbuf_reclaim +ffffffff81826bc0 T txp_tx_reclaim +ffffffff81826d90 T txp_init +ffffffff81826f10 T txp_stop +ffffffff81827030 T txp_set_filter +ffffffff818271d0 T txp_command2 +ffffffff81827520 T txp_cmd_desc_numfree +ffffffff81827580 T txp_response +ffffffff81827880 T txp_rsp_fixup +ffffffff81827970 T txp_show_descriptor +ffffffff81828000 T init_audio_devices +ffffffff81828150 T init_BTSC +ffffffff81828240 T set_audio +ffffffff81828660 T set_bctv_audio +ffffffff81828ab0 T msp_autodetect +ffffffff81828fd0 T temp_mute +ffffffff81829070 T set_BTSC +ffffffff81829090 T bctv_gpio_write +ffffffff81829250 T msp_read_id +ffffffff81829320 T dpl_read_id +ffffffff818293f0 T dpl_autodetect +ffffffff8182a000 T writeEEProm +ffffffff8182a030 T readEEProm +ffffffff8182a100 T signCard +ffffffff8182a1b0 T probeCard +ffffffff8182c000 T bktr_name +ffffffff8182c030 T common_bktr_attach +ffffffff8182c390 t oformat_meteor_to_bt +ffffffff8182c4b0 T common_bktr_intr +ffffffff8182cbc0 T video_open +ffffffff8182d170 t set_fps +ffffffff8182d2d0 T vbi_open +ffffffff8182d380 T tuner_open +ffffffff8182d3d0 T video_close +ffffffff8182d500 T tuner_close +ffffffff8182d530 T vbi_close +ffffffff8182d560 T video_read +ffffffff8182d770 t start_capture +ffffffff81830aa0 T vbi_read +ffffffff81830be0 T video_ioctl +ffffffff818322c0 T bktr_common_ioctl +ffffffff81832c30 T tuner_ioctl +ffffffff81833bd0 t remote_read +ffffffff81833e00 T i2cWrite +ffffffff81833f50 T i2cRead +ffffffff818340a0 T msp_dpl_read +ffffffff81834460 T msp_dpl_write +ffffffff818346d0 T msp_dpl_reset +ffffffff81834b10 t i2c_write_byte +ffffffff81834d90 t i2c_read_byte +ffffffff81835050 t split +ffffffff81835280 t getline +ffffffff81836000 t bktr_probe +ffffffff81836060 t bktr_attach +ffffffff81836390 T bktr_get_info +ffffffff81836480 T bktr_set_info +ffffffff81836620 T get_bktr_mem +ffffffff818368f0 T free_bktr_mem +ffffffff81836960 T bktropen +ffffffff81836a20 T bktrclose +ffffffff81836aa0 T bktrread +ffffffff81836b30 T bktrwrite +ffffffff81836b60 T bktrioctl +ffffffff81836c00 T bktrmmap +ffffffff81836ca0 t bktr_intr +ffffffff81837000 T select_tuner +ffffffff81837050 T tv_freq +ffffffff818372e0 T do_afc +ffffffff81837440 T get_tuner_status +ffffffff81837460 T tv_channel +ffffffff81837520 T tuner_getchnlset +ffffffff81838000 T xl_pci_match +ffffffff81838030 T xl_pci_attach +ffffffff81838410 T xl_pci_detach +ffffffff818384b0 T xl_pci_wol_power +ffffffff81838510 T xl_pci_intr_ack +ffffffff81839000 T fxp_pci_match +ffffffff81839030 T fxp_pci_attach +ffffffff818393b0 T fxp_pci_detach +ffffffff8183a000 T em_probe +ffffffff8183a030 T em_attach +ffffffff8183a620 T em_detach +ffffffff8183a6d0 T em_activate +ffffffff8183a740 T em_defer_attach +ffffffff8183a820 T em_stop +ffffffff8183a980 T em_free_pci_resources +ffffffff8183ac80 T em_setup_interface +ffffffff8183aee0 T em_update_link_status +ffffffff8183b130 T em_local_timer +ffffffff8183b210 T em_82547_move_tail +ffffffff8183b260 T em_identify_hardware +ffffffff8183b390 T em_allocate_pci_resources +ffffffff8183b830 T em_allocate_desc_rings +ffffffff8183b960 T em_hardware_init +ffffffff8183bcb0 T em_kstat_attach +ffffffff8183be30 T em_start +ffffffff8183c180 T em_encap +ffffffff8183c680 T em_82547_move_tail_locked +ffffffff8183c8e0 T em_82547_update_fifo_head +ffffffff8183c930 T em_ioctl +ffffffff8183cc80 T em_init +ffffffff8183d0c0 T em_get_sffpage +ffffffff8183d190 T em_disable_intr +ffffffff8183d2c0 T em_iff +ffffffff8183d660 T em_initialize_receive_unit +ffffffff8183deb0 T em_enable_intr +ffffffff8183e060 T em_watchdog +ffffffff8183e260 T em_enable_hw_vlans +ffffffff8183e310 T em_setup_transmit_structures +ffffffff8183e560 T em_initialize_transmit_unit +ffffffff8183ec40 T em_setup_receive_structures +ffffffff8183edb0 T em_setup_queues_msix +ffffffff8183f4e0 T em_intr +ffffffff8183f630 T em_txeof +ffffffff8183f820 T em_rxeof +ffffffff8183fd00 T em_rxrefill_locked +ffffffff8183fe20 T em_media_status +ffffffff81840080 T em_flowstatus +ffffffff818401a0 T em_media_change +ffffffff81840310 T em_tso_setup +ffffffff818404d0 T em_tx_ctx_setup +ffffffff81840640 T em_transmit_checksum_setup +ffffffff81840730 T em_fill_descriptors +ffffffff818407b0 T em_82547_fifo_workaround +ffffffff81840820 T em_82547_tx_fifo_reset +ffffffff81840d90 T em_pci_clear_mwi +ffffffff81840dc0 T em_pci_set_mwi +ffffffff81840df0 T em_smartspeed +ffffffff81841050 T em_kstat_read +ffffffff81841570 T em_flush_desc_rings +ffffffff818416d0 T em_free_transmit_structures +ffffffff81841900 T em_free_receive_structures +ffffffff81841b50 T em_legacy_irq_quirk_spt +ffffffff81841c40 T em_rxrefill +ffffffff81841c90 T em_allocate_msix +ffffffff81841f00 T em_allocate_legacy +ffffffff81842060 T em_dma_free +ffffffff818420f0 T em_disable_aspm +ffffffff818421d0 T em_dma_malloc +ffffffff81842390 T em_allocate_transmit_structures +ffffffff818424a0 T em_get_buf +ffffffff81842620 T em_allocate_receive_structures +ffffffff81842830 T em_rxfill +ffffffff81842990 T em_tbi_adjust_stats +ffffffff81842b60 T em_receive_checksum +ffffffff81842bd0 T em_write_pci_cfg +ffffffff81842c50 T em_read_pci_cfg +ffffffff81842cd0 T em_read_pcie_cap_reg +ffffffff81842d00 T em_flush_tx_ring +ffffffff81842e90 T em_flush_rx_ring +ffffffff818430b0 T em_queue_intr_msix +ffffffff81843180 T em_link_intr_msix +ffffffff818432f0 T em_enable_queue_intr_msix +ffffffff81844000 T em_set_mac_type +ffffffff81844a20 T em_set_sfp_media_type_82575 +ffffffff81844e10 T em_translate_82542_register +ffffffff81845040 T em_read_sfp_data_byte +ffffffff81845150 T em_set_media_type +ffffffff818453f0 T em_reset_hw +ffffffff81846260 T em_disable_pciex_master +ffffffff81846350 T em_check_phy_reset_block +ffffffff81846420 T em_gate_hw_phy_config_ich8lan +ffffffff818464d0 t em_get_software_flag +ffffffff818466a0 T em_hv_phy_workarounds_ich8lan +ffffffff81846b50 T em_lv_phy_workarounds_ich8lan +ffffffff81846c90 t em_phy_init_script +ffffffff81846fb0 T em_read_eeprom +ffffffff81847720 T em_set_eee_i350 +ffffffff81847870 T em_init_hw +ffffffff818497a0 T em_phy_reset +ffffffff81849a20 T em_clear_vfta_i350 +ffffffff81849c60 T em_read_phy_reg +ffffffff81849e50 T em_setup_link +ffffffff8184c6d0 T em_enable_tx_pkt_filtering +ffffffff8184cb70 T em_clear_hw_cntrs +ffffffff8184d740 T em_write_phy_reg +ffffffff8184d900 T em_power_up_serdes_link_82575 +ffffffff8184da20 T em_copper_link_autoneg +ffffffff8184db80 T em_phy_setup_autoneg +ffffffff8184dd00 T em_copper_link_postconfig +ffffffff8184de00 T em_config_collision_dist +ffffffff8184dea0 t em_config_mac_to_phy +ffffffff8184e040 t em_config_fc_after_link_up +ffffffff8184e2e0 t em_config_dsp_after_link_change +ffffffff8184ee10 T em_force_mac_fc +ffffffff8184eee0 T em_check_for_link +ffffffff8184f6b0 T em_get_pcs_speed_and_duplex_82575 +ffffffff8184f770 T em_k1_gig_workaround_hv +ffffffff8184f8d0 T em_link_stall_workaround_hv +ffffffff8184f9d0 T em_k1_workaround_lv +ffffffff8184faa0 T em_k1_workaround_lpt_lp +ffffffff8184fe00 t em_check_downshift +ffffffff8184fec0 T em_set_eee_pchlan +ffffffff8184ff70 t em_polarity_reversal_workaround +ffffffff81850250 T em_get_speed_and_duplex +ffffffff81850800 T em_access_phy_wakeup_reg_bm +ffffffff818509c0 t em_write_phy_reg_ex +ffffffff81850c90 t em_read_phy_reg_ex +ffffffff81851260 T em_access_phy_debug_regs_hv +ffffffff81851340 T em_access_phy_reg_hv +ffffffff818514d0 t em_swfw_sync_acquire +ffffffff818516c0 t em_swfw_sync_release +ffffffff81851860 T em_sgmii_uses_mdio_82575 +ffffffff818518d0 T em_read_phy_reg_i2c +ffffffff818519d0 T em_write_phy_reg_i2c +ffffffff81851ac0 T em_phy_hw_reset +ffffffff81852250 T em_oem_bits_config_pchlan +ffffffff81852400 T em_initialize_M88E1512_phy +ffffffff81852650 T em_init_eeprom_params +ffffffff81852ba0 T em_get_flash_presence_i210 +ffffffff81852c10 t em_acquire_eeprom +ffffffff81852e70 t em_read_eeprom_ich8 +ffffffff81853060 t em_release_eeprom +ffffffff81853210 t em_standby_eeprom +ffffffff81853490 t em_shift_out_ee_bits +ffffffff81853690 t em_shift_in_ee_bits +ffffffff81853820 T em_validate_eeprom_checksum +ffffffff81853a00 T em_write_eeprom +ffffffff81853d90 T em_update_eeprom_checksum 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ixgb_validate_eeprom_checksum +ffffffff8185e080 T ixgb_read_eeprom +ffffffff8185e3b0 T ixgb_update_eeprom_checksum +ffffffff8185e420 T ixgb_write_eeprom +ffffffff8185eaa0 t ixgb_shift_out_bits +ffffffff8185ec10 T ixgb_get_eeprom_data +ffffffff8185ecc0 T ixgb_get_eeprom_word +ffffffff8185eda0 T ixgb_get_ee_mac_addr +ffffffff8185eea0 T ixgb_get_ee_pba_number +ffffffff8185ef60 T ixgb_get_ee_device_id +ffffffff81860000 T ixgb_mac_reset +ffffffff81860270 T ixgb_adapter_stop +ffffffff81860400 T ixgb_init_hw +ffffffff81860790 T ixgb_init_rx_addrs +ffffffff818608f0 T mac_addr_valid +ffffffff81860950 T ixgb_clear_vfta +ffffffff818609d0 T ixgb_clear_hw_cntrs +ffffffff818612c0 T ixgb_setup_fc +ffffffff81861480 T ixgb_check_for_link +ffffffff81861700 T ixgb_rar_set +ffffffff81861780 T ixgb_mc_addr_list_update +ffffffff81861a60 T ixgb_write_vfta +ffffffff81861a90 T ixgb_read_phy_reg +ffffffff81862110 T ixgb_write_phy_reg +ffffffff81862790 T ixgb_check_for_bad_link +ffffffff81862860 T ixgb_led_on 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ixgbe_init_eeprom_params_generic +ffffffff8186c330 T ixgbe_read_eerd_generic +ffffffff8186c460 T ixgbe_read_eeprom_bit_bang_generic +ffffffff8186c7c0 T ixgbe_write_eeprom_generic +ffffffff8186cd50 T ixgbe_validate_eeprom_checksum_generic +ffffffff8186ce30 T ixgbe_update_eeprom_checksum_generic +ffffffff8186ced0 T ixgbe_calc_eeprom_checksum_generic +ffffffff8186d090 T ixgbe_init_hw_generic +ffffffff8186d0f0 T ixgbe_start_hw_generic +ffffffff8186d260 T ixgbe_clear_hw_cntrs_generic +ffffffff8186df40 T ixgbe_enable_rx_dma_generic +ffffffff8186dfa0 T ixgbe_get_mac_addr_generic +ffffffff8186e050 T ixgbe_stop_adapter_generic +ffffffff8186e200 T ixgbe_get_bus_info_generic +ffffffff8186e2c0 T ixgbe_set_lan_id_multi_port_pcie +ffffffff8186e3b0 T ixgbe_acquire_swfw_sync +ffffffff8186e680 T ixgbe_release_swfw_sync +ffffffff8186e760 T prot_autoc_read_generic +ffffffff8186e7c0 T prot_autoc_write_generic +ffffffff8186e820 T ixgbe_led_on_generic +ffffffff8186e900 T ixgbe_led_off_generic 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ixgbe_write_eewr_buffer_generic +ffffffff81870aa0 T ixgbe_write_eewr_generic +ffffffff81870af0 T ixgbe_acquire_eeprom +ffffffff81870cd0 T ixgbe_get_eeprom_semaphore +ffffffff81870f60 T ixgbe_release_eeprom_semaphore +ffffffff81870fe0 T ixgbe_ready_eeprom +ffffffff818711b0 T ixgbe_shift_out_eeprom_bits +ffffffff818713e0 T ixgbe_shift_in_eeprom_bits +ffffffff81871580 T ixgbe_standby_eeprom +ffffffff818716a0 T ixgbe_raise_eeprom_clk +ffffffff81871720 T ixgbe_lower_eeprom_clk +ffffffff818717a0 T ixgbe_release_eeprom +ffffffff818718b0 T ixgbe_validate_mac_addr +ffffffff81871910 T ixgbe_init_uta_tables +ffffffff81871950 T ixgbe_add_uc_addr +ffffffff818719d0 T ixgbe_mta_vector +ffffffff81871a90 T ixgbe_set_mta +ffffffff81871b60 T ixgbe_negotiate_fc +ffffffff81871c10 T ixgbe_fc_autoneg_fiber +ffffffff81871d50 T ixgbe_fc_autoneg_backplane +ffffffff81871ef0 T ixgbe_fc_autoneg_copper +ffffffff81872030 T ixgbe_disable_sec_rx_path_generic +ffffffff81872110 T ixgbe_enable_sec_rx_path_generic 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ixgbe_setup_mac_link_multispeed_fiber +ffffffff81873e10 T ixgbe_flap_tx_laser +ffffffff81873e50 T ixgbe_check_link +ffffffff81873ea0 T ixgbe_set_soft_rate_select_speed +ffffffff81873fc0 T ixgbe_init_shared_code +ffffffff818740b0 T ixgbe_set_mac_type +ffffffff81874250 T ixgbe_init_hw +ffffffff81874290 T ixgbe_get_media_type +ffffffff818742d0 T ixgbe_read_mbx +ffffffff81874330 T ixgbe_poll_mbx +ffffffff81874430 T ixgbe_poll_for_msg +ffffffff81874500 T ixgbe_write_mbx +ffffffff81874580 T ixgbe_check_for_msg +ffffffff818745c0 T ixgbe_check_for_ack +ffffffff81874600 T ixgbe_check_for_rst +ffffffff81874640 T ixgbe_poll_for_ack +ffffffff81874710 T ixgbe_read_posted_mbx +ffffffff81874810 T ixgbe_write_posted_mbx +ffffffff81874930 T ixgbe_init_mbx_ops_generic +ffffffff81874970 T ixgbe_check_for_bit_pf +ffffffff818749e0 T ixgbe_check_for_msg_pf +ffffffff81874a50 T ixgbe_check_for_ack_pf +ffffffff81874b30 T ixgbe_check_for_rst_pf +ffffffff81874c30 T ixgbe_obtain_mbx_lock_pf +ffffffff81874d30 T ixgbe_write_mbx_pf +ffffffff81875050 T ixgbe_read_mbx_pf +ffffffff81875210 T ixgbe_init_mbx_params_vf +ffffffff818752c0 t ixgbe_release_mbx_lock_dummy +ffffffff818752f0 t ixgbe_read_mbx_vf_legacy +ffffffff818754d0 t ixgbe_write_mbx_vf_legacy +ffffffff81875840 t ixgbe_check_for_msg_vf +ffffffff818758d0 t ixgbe_check_for_ack_vf +ffffffff818759c0 t ixgbe_check_for_rst_vf +ffffffff81875ab0 T ixgbe_init_mbx_params_pf +ffffffff81875b80 t ixgbe_read_mbx_pf_legacy +ffffffff81875d30 t ixgbe_write_mbx_pf_legacy +ffffffff81876060 t ixgbe_clear_mbx_pf +ffffffff81877000 T ixgbe_set_pcie_completion_timeout +ffffffff818770b0 T ixgbe_init_ops_82598 +ffffffff81877210 T ixgbe_init_phy_ops_82598 +ffffffff81877330 T ixgbe_start_hw_82598 +ffffffff81877510 T ixgbe_reset_hw_82598 +ffffffff81877900 T ixgbe_get_media_type_82598 +ffffffff818779c0 T ixgbe_get_supported_physical_layer_82598 +ffffffff81877bb0 T ixgbe_read_analog_reg8_82598 +ffffffff81877c90 T ixgbe_write_analog_reg8_82598 +ffffffff81877d30 T ixgbe_set_lan_id_multi_port_pcie_82598 +ffffffff81877df0 T ixgbe_enable_rx_dma_82598 +ffffffff81877e50 T ixgbe_set_vmdq_82598 +ffffffff81877f10 T ixgbe_clear_vmdq_82598 +ffffffff81877fd0 T ixgbe_set_vfta_82598 +ffffffff81878120 T ixgbe_clear_vfta_82598 +ffffffff81878300 T ixgbe_fc_enable_82598 +ffffffff818787f0 T ixgbe_read_i2c_eeprom_82598 +ffffffff81878810 T ixgbe_check_mac_link_82598 +ffffffff81878b00 T ixgbe_setup_mac_link_82598 +ffffffff81878d00 T ixgbe_get_link_capabilities_82598 +ffffffff81878dd0 T ixgbe_setup_copper_link_82598 +ffffffff81878f20 T ixgbe_start_mac_link_82598 +ffffffff81879070 T ixgbe_validate_link_ready +ffffffff81879130 T ixgbe_read_i2c_phy_82598 +ffffffff8187a000 T ixgbe_init_mac_link_ops_82599 +ffffffff8187a1d0 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff8187a2c0 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff8187a360 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff8187a4f0 T ixgbe_setup_mac_link_82599 +ffffffff8187a7c0 T ixgbe_set_hard_rate_select_speed +ffffffff8187a890 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff8187a970 T ixgbe_setup_mac_link_smartspeed +ffffffff8187ade0 T ixgbe_init_phy_ops_82599 +ffffffff8187af70 T ixgbe_read_i2c_byte_82599 +ffffffff8187b130 T ixgbe_write_i2c_byte_82599 +ffffffff8187b2f0 T ixgbe_setup_copper_link_82599 +ffffffff8187b360 T ixgbe_setup_sfp_modules_82599 +ffffffff8187b590 T prot_autoc_read_82599 +ffffffff8187b6f0 T prot_autoc_write_82599 +ffffffff8187b8b0 T ixgbe_reset_pipeline_82599 +ffffffff8187bce0 T ixgbe_init_ops_82599 +ffffffff8187bef0 T ixgbe_identify_phy_82599 +ffffffff8187bfa0 T ixgbe_reset_hw_82599 +ffffffff8187c3e0 T ixgbe_get_media_type_82599 +ffffffff8187c510 T ixgbe_get_supported_physical_layer_82599 +ffffffff8187c700 T ixgbe_enable_rx_dma_82599 +ffffffff8187c790 T ixgbe_read_analog_reg8_82599 +ffffffff8187c870 T ixgbe_write_analog_reg8_82599 +ffffffff8187c910 T ixgbe_start_hw_82599 +ffffffff8187ca40 T ixgbe_get_link_capabilities_82599 +ffffffff8187cb90 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff8187cc60 T ixgbe_read_eeprom_82599 +ffffffff8187cc90 T ixgbe_start_mac_link_82599 +ffffffff8187ced0 T ixgbe_verify_fw_version_82599 +ffffffff8187d000 T ixgbe_init_ops_X540 +ffffffff8187d230 T ixgbe_init_eeprom_params_X540 +ffffffff8187d2c0 T ixgbe_read_eerd_X540 +ffffffff8187d370 T ixgbe_write_eewr_X540 +ffffffff8187d420 T ixgbe_update_eeprom_checksum_X540 +ffffffff8187d520 T ixgbe_validate_eeprom_checksum_X540 +ffffffff8187d640 T ixgbe_calc_eeprom_checksum_X540 +ffffffff8187d810 T ixgbe_reset_hw_X540 +ffffffff8187da80 T ixgbe_get_media_type_X540 +ffffffff8187dab0 T ixgbe_get_supported_physical_layer_X540 +ffffffff8187db30 T ixgbe_start_hw_X540 +ffffffff8187db90 T ixgbe_acquire_swfw_sync_X540 +ffffffff8187e0d0 T ixgbe_release_swfw_sync_X540 +ffffffff8187e250 T ixgbe_init_swfw_sync_X540 +ffffffff8187e370 T ixgbe_setup_mac_link_X540 +ffffffff8187e390 T ixgbe_blink_led_start_X540 +ffffffff8187e4d0 T ixgbe_blink_led_stop_X540 +ffffffff8187e600 T ixgbe_get_link_capabilities_X540 +ffffffff8187e650 T ixgbe_update_flash_X540 +ffffffff8187e890 T ixgbe_poll_flash_update_done_X540 +ffffffff8187e940 T ixgbe_get_swfw_sync_semaphore +ffffffff8187eb10 T ixgbe_release_swfw_sync_semaphore +ffffffff8187f000 T ixgbe_init_ops_X550 +ffffffff8187f110 T ixgbe_dmac_config_X550 +ffffffff8187f210 T ixgbe_dmac_config_tcs_X550 +ffffffff8187f390 T ixgbe_dmac_update_tcs_X550 +ffffffff8187f470 T ixgbe_set_source_address_pruning_X550 +ffffffff8187f580 T ixgbe_init_eeprom_params_X550 +ffffffff8187f610 T ixgbe_calc_eeprom_checksum_X550 +ffffffff8187f630 T ixgbe_read_ee_hostif_X550 +ffffffff8187f720 T ixgbe_write_ee_hostif_X550 +ffffffff8187f7f0 T ixgbe_update_eeprom_checksum_X550 +ffffffff8187f9f0 T ixgbe_validate_eeprom_checksum_X550 +ffffffff8187fb80 T ixgbe_disable_rx_x550 +ffffffff8187fcd0 T ixgbe_led_on_t_X550em +ffffffff8187fda0 T ixgbe_led_off_t_X550em +ffffffff8187fe70 T ixgbe_read_cs4227 +ffffffff8187fea0 T ixgbe_write_cs4227 +ffffffff8187fed0 T ixgbe_read_pe +ffffffff8187ff20 T ixgbe_write_pe +ffffffff8187ff80 T ixgbe_reset_cs4227 +ffffffff81880290 T ixgbe_check_cs4227 +ffffffff818804c0 T ixgbe_setup_mux_ctl +ffffffff81880560 T ixgbe_identify_phy_x550em +ffffffff818807a0 T ixgbe_read_mng_if_sel_x550em +ffffffff81880820 T ixgbe_fw_phy_activity +ffffffff81880950 T ixgbe_get_phy_id_fw +ffffffff81880ad0 T ixgbe_identify_phy_fw +ffffffff81880b20 T ixgbe_shutdown_fw_phy +ffffffff81880c00 T ixgbe_read_phy_reg_x550em +ffffffff81880c30 T ixgbe_write_phy_reg_x550em +ffffffff81880c60 T ixgbe_init_ops_X550EM +ffffffff81880f00 T ixgbe_get_bus_info_X550em +ffffffff81880f50 T ixgbe_get_media_type_X550em +ffffffff81881020 T ixgbe_setup_sfp_modules_X550em +ffffffff818811b0 T ixgbe_get_link_capabilities_X550em +ffffffff81881280 T ixgbe_reset_hw_X550em +ffffffff818817d0 T ixgbe_get_supported_physical_layer_X550em +ffffffff81881980 T ixgbe_setup_fc_X550em +ffffffff81881af0 T ixgbe_init_phy_ops_X550em +ffffffff81882010 T ixgbe_setup_fw_link +ffffffff818821d0 T ixgbe_fc_autoneg_fw +ffffffff81882200 T ixgbe_setup_eee_fw +ffffffff81882260 T ixgbe_init_ops_X550EM_a +ffffffff818823a0 T ixgbe_read_iosf_sb_reg_x550 +ffffffff81882560 T ixgbe_write_iosf_sb_reg_x550 +ffffffff81882720 T ixgbe_read_iosf_sb_reg_x550a +ffffffff818827c0 T ixgbe_write_iosf_sb_reg_x550a +ffffffff81882850 T ixgbe_acquire_swfw_sync_X550a +ffffffff818829a0 T ixgbe_release_swfw_sync_X550a +ffffffff81882a40 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff81882a80 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff81882c10 T ixgbe_setup_fc_backplane_x550em_a +ffffffff81882e40 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff81882fd0 T ixgbe_init_ops_X550EM_x +ffffffff818830a0 T ixgbe_acquire_swfw_sync_X550em +ffffffff81883170 T ixgbe_release_swfw_sync_X550em +ffffffff81883210 T ixgbe_iosf_wait +ffffffff818832d0 T ixgbe_get_phy_token +ffffffff81883360 T ixgbe_put_phy_token +ffffffff818833e0 T ixgbe_supported_sfp_modules_X550em +ffffffff81883460 T ixgbe_identify_sfp_module_X550em +ffffffff818834e0 T ixgbe_init_mac_link_ops_X550em +ffffffff81883630 T ixgbe_restart_an_internal_phy_x550em +ffffffff81883760 T ixgbe_setup_sgmii +ffffffff81883970 T ixgbe_setup_sgmii_fw +ffffffff81883bb0 T ixgbe_setup_mac_link_sfp_x550a +ffffffff81883df0 T ixgbe_setup_mac_link_sfp_x550em +ffffffff81883eb0 T ixgbe_setup_mac_link_t_X550em +ffffffff81883f70 T ixgbe_check_link_t_X550em +ffffffff81884070 T ixgbe_get_lasi_ext_t_x550em +ffffffff81884230 T ixgbe_enable_lasi_ext_t_x550em +ffffffff81884420 T ixgbe_setup_kr_speed_x550em +ffffffff81884680 T ixgbe_reset_phy_fw +ffffffff81884820 T ixgbe_check_overtemp_fw +ffffffff818849a0 T ixgbe_read_phy_reg_x550a +ffffffff81884a60 T ixgbe_write_phy_reg_x550a +ffffffff81884b30 T ixgbe_setup_kr_x550em +ffffffff81884ba0 T ixgbe_setup_internal_phy_t_x550em +ffffffff81884d30 T ixgbe_enter_lplu_t_x550em +ffffffff81885000 T ixgbe_handle_lasi_ext_t_x550em +ffffffff81885080 T ixgbe_reset_phy_t_X550em +ffffffff818850e0 T ixgbe_set_mdio_speed +ffffffff818851c0 T ixgbe_init_ext_t_x550em +ffffffff81885290 T ixgbe_setup_sfi_x550a +ffffffff81885480 T ixgbe_setup_ixfi_x550em_x +ffffffff818856b0 T ixgbe_setup_ixfi_x550em +ffffffff818858d0 T ixgbe_ext_phy_t_x550em_get_link +ffffffff81885970 T ixgbe_setup_phy_loopback_x550em +ffffffff81885ba0 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff81885d60 T ixgbe_write_ee_hostif_data_X550 +ffffffff81885dd0 T ixgbe_checksum_ptr_x550 +ffffffff81885f60 T ixgbe_calc_checksum_X550 +ffffffff81886100 T ixgbe_update_flash_X550 +ffffffff81886160 T ixgbe_get_lcd_t_x550em +ffffffff81886220 T ixgbe_set_mux +ffffffff81887000 T ixgbe_read_i2c_combined_generic_int +ffffffff81887330 T ixgbe_i2c_start +ffffffff818874e0 t ixgbe_out_i2c_byte_ack +ffffffff81887530 T ixgbe_clock_in_i2c_byte +ffffffff81887670 T ixgbe_clock_out_i2c_bit +ffffffff818877c0 T ixgbe_i2c_stop +ffffffff818879a0 T ixgbe_i2c_bus_clear +ffffffff81887b00 T ixgbe_read_i2c_combined_generic +ffffffff81887b20 T ixgbe_read_i2c_combined_generic_unlocked +ffffffff81887b40 T ixgbe_write_i2c_combined_generic_int +ffffffff81887d80 T ixgbe_write_i2c_combined_generic +ffffffff81887da0 T ixgbe_write_i2c_combined_generic_unlocked +ffffffff81887dc0 T ixgbe_init_phy_ops_generic +ffffffff81887ef0 T ixgbe_identify_phy_generic +ffffffff81887fd0 T ixgbe_reset_phy_generic +ffffffff81888220 T ixgbe_read_phy_reg_generic +ffffffff818882e0 T ixgbe_write_phy_reg_generic +ffffffff818883a0 T ixgbe_read_phy_reg_mdi +ffffffff81888550 T ixgbe_write_phy_reg_mdi +ffffffff818886f0 T ixgbe_setup_phy_link_generic +ffffffff81888a00 T ixgbe_setup_phy_link_speed_generic +ffffffff81888a60 T ixgbe_get_phy_firmware_version_generic +ffffffff81888a90 T ixgbe_read_i2c_byte_generic +ffffffff81888ab0 T ixgbe_write_i2c_byte_generic +ffffffff81888ad0 T ixgbe_read_i2c_eeprom_generic +ffffffff81888b00 T ixgbe_write_i2c_eeprom_generic +ffffffff81888b20 T ixgbe_identify_module_generic +ffffffff81888ba0 T ixgbe_read_i2c_byte_generic_unlocked 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ixgbe_clock_out_i2c_byte +ffffffff8188ad10 T ixgbe_get_i2c_ack +ffffffff8188af80 T ixgbe_write_i2c_byte_generic_int +ffffffff8188b100 T ixgbe_set_i2c_data +ffffffff8188b300 T ixgbe_raise_i2c_clk +ffffffff8188b440 T ixgbe_lower_i2c_clk +ffffffff8188b4e0 T ixgbe_clock_in_i2c_bit +ffffffff8188b710 T ixgbe_get_i2c_data +ffffffff8188b7e0 T ixgbe_set_copper_phy_power +ffffffff8188c000 t ixv_probe +ffffffff8188c030 t ixv_attach +ffffffff8188c610 t ixv_detach +ffffffff8188c6e0 t ixv_negotiate_api +ffffffff8188c780 t ixv_setup_interface +ffffffff8188cb40 t ixv_allocate_msix +ffffffff8188ce40 t ixv_kstats_tick +ffffffff8188d210 t ixv_kstats_read +ffffffff8188d360 t ixv_rxq_kstats_read +ffffffff8188d4a0 t ixv_txq_kstats_read +ffffffff8188d5c0 t ixv_ioctl +ffffffff8188d850 t ixv_watchdog +ffffffff8188da20 t ixv_init +ffffffff8188ee90 t ixv_stop +ffffffff8188f0d0 t ixv_iff +ffffffff8188f230 t ixv_enable_intr +ffffffff8188f3d0 t ixv_mc_array_itr +ffffffff8188f410 t ixv_msix_que +ffffffff8188f510 t ixv_msix_mbx +ffffffff81890000 T ixgbe_init_ops_vf +ffffffff81890150 T ixgbe_init_hw_vf +ffffffff818901c0 T ixgbe_reset_hw_vf +ffffffff818905d0 T ixgbe_start_hw_vf +ffffffff81890600 t ixgbe_dummy_uint64_handler_vf +ffffffff81890630 T ixgbe_get_mac_addr_vf +ffffffff818906a0 T ixgbe_stop_adapter_vf +ffffffff81890860 T ixgbevf_negotiate_api_version +ffffffff81890910 T ixgbe_setup_mac_link_vf +ffffffff81890940 T ixgbe_check_mac_link_vf +ffffffff81890c90 T ixgbe_set_rar_vf +ffffffff81890d60 T ixgbevf_set_uc_addr_vf +ffffffff81890e30 T ixgbe_update_mc_addr_list_vf +ffffffff81890f30 T ixgbevf_update_xcast_mode +ffffffff81890ff0 T ixgbe_get_link_state_vf +ffffffff818910a0 T ixgbe_set_vfta_vf +ffffffff81891140 T ixgbevf_rlpml_set_vf +ffffffff818911e0 t ixgbe_dummy_handler_vf +ffffffff81891210 t ixgbe_dummy_void_handler_vf +ffffffff81891240 T ixgbe_get_num_of_tx_queues_vf +ffffffff81891270 T ixgbe_get_num_of_rx_queues_vf +ffffffff818912a0 T ixgbevf_get_queues +ffffffff81892000 t ixl_match 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ice_fwlog_register +ffffffff818a26e0 T ice_fwlog_unregister +ffffffff818a2780 T ice_acquire_nvm +ffffffff818a27e0 T ice_release_nvm +ffffffff818a2820 T ice_get_flash_bank_offset +ffffffff818a28e0 T ice_aq_read_nvm +ffffffff818a29b0 T ice_read_flat_nvm +ffffffff818a2b80 T ice_discover_flash_size +ffffffff818a2d30 T ice_read_sr_word_aq +ffffffff818a2ea0 T ice_read_sr_word +ffffffff818a3080 T ice_read_sr_pointer +ffffffff818a30f0 T ice_read_sr_area_size +ffffffff818a3150 T ice_determine_active_flash_banks +ffffffff818a3340 T ice_read_flash_module +ffffffff818a35c0 T ice_read_nvm_module +ffffffff818a3630 T ice_get_nvm_css_hdr_len +ffffffff818a36f0 T ice_get_nvm_srev +ffffffff818a37a0 T ice_read_nvm_sr_copy +ffffffff818a3890 T ice_get_nvm_ver_info +ffffffff818a39d0 T ice_read_orom_module +ffffffff818a3a40 T ice_get_orom_srev +ffffffff818a3b80 T ice_get_orom_civd_data +ffffffff818a3d10 T ice_get_orom_ver_info +ffffffff818a3dc0 T ice_read_netlist_module +ffffffff818a3e30 T ice_get_netlist_info +ffffffff818a3ff0 T ice_init_nvm +ffffffff818a4190 T ice_print_rollback_msg +ffffffff818a4290 T ice_clear_pf_cfg +ffffffff818a4310 T ice_aq_clear_pxe_mode +ffffffff818a4390 T ice_clear_pxe_mode +ffffffff818a4490 T ice_get_num_per_func +ffffffff818a44f0 T ice_print_led_caps +ffffffff818a4760 T ice_print_sdp_caps +ffffffff818a4930 T ice_parse_common_caps +ffffffff818a4cd0 T ice_recalc_port_limited_caps +ffffffff818a4d10 T ice_parse_vf_func_caps +ffffffff818a4d50 T ice_parse_vsi_func_caps +ffffffff818a4dc0 T ice_parse_func_caps +ffffffff818a4ee0 T ice_parse_valid_functions_cap +ffffffff818a4f60 T ice_parse_vf_dev_caps +ffffffff818a4fa0 T ice_parse_vsi_dev_caps +ffffffff818a4fe0 T ice_parse_nac_topo_dev_caps +ffffffff818a5020 T ice_is_vsi_valid +ffffffff818a5070 T ice_parse_sensor_reading_cap +ffffffff818a50b0 T ice_parse_dev_caps +ffffffff818a5240 T ice_aq_list_caps +ffffffff818a52f0 T ice_discover_dev_caps +ffffffff818a53f0 T ice_discover_func_caps +ffffffff818a55d0 T ice_set_safe_mode_caps +ffffffff818a5760 T ice_get_caps +ffffffff818a58a0 T ice_aq_get_sw_cfg +ffffffff818a5950 T ice_init_port_info +ffffffff818a59a0 T ice_get_initial_sw_cfg +ffffffff818a5b60 T ice_aq_query_sched_res +ffffffff818a5be0 T ice_sched_query_res_alloc +ffffffff818a5dc0 T ice_sched_get_psm_clk_freq +ffffffff818a5e30 T ice_aq_get_dflt_topo +ffffffff818a5ed0 T ice_sched_add_root_node +ffffffff818a5fb0 T ice_sched_find_node_by_teid +ffffffff818a6090 T ice_sched_get_tc_node +ffffffff818a6100 T ice_aqc_send_sched_elem_cmd +ffffffff818a61a0 T ice_aq_query_sched_elems +ffffffff818a6240 T ice_sched_query_elem +ffffffff818a62e0 T ice_sched_add_node +ffffffff818a64b0 T ice_aq_delete_sched_elems +ffffffff818a6550 T ice_sched_remove_elems +ffffffff818a66e0 T ice_sched_get_first_node +ffffffff818a6720 T ice_free_sched_node +ffffffff818a6980 T ice_rm_dflt_leaf_node +ffffffff818a6af0 T ice_sched_rm_dflt_nodes +ffffffff818a6b80 T ice_sched_init_port +ffffffff818a6f20 T ice_aq_rl_profile +ffffffff818a6fc0 T ice_aq_remove_rl_profile +ffffffff818a7060 T ice_sched_del_rl_profile +ffffffff818a7160 T ice_sched_clear_rl_prof +ffffffff818a72f0 T ice_sched_clear_tx_topo +ffffffff818a7360 T ice_sched_clear_port +ffffffff818a73e0 T ice_sched_cleanup_all +ffffffff818a74a0 T ice_is_fw_min_ver +ffffffff818a7500 T ice_is_fw_api_min_ver +ffffffff818a7550 T ice_fw_supports_report_dflt_cfg +ffffffff818a75a0 T ice_fw_supports_link_override +ffffffff818a75f0 T ice_dump_phy_type +ffffffff818a7620 T ice_phy_maps_to_media +ffffffff818a7680 T ice_set_media_type +ffffffff818a7820 T ice_aq_get_phy_caps +ffffffff818a7970 T ice_aq_get_link_info +ffffffff818a7b50 T ice_cfg_rl_burst_size +ffffffff818a7be0 T ice_init_def_sw_recp +ffffffff818a7d90 T ice_init_fltr_mgmt_struct +ffffffff818a7e50 T ice_aq_manage_mac_read +ffffffff818a7f70 T ice_rem_sw_rule_info +ffffffff818a8010 T ice_rm_sw_replay_rule_info +ffffffff818a8110 T ice_cleanup_fltr_mgmt_single +ffffffff818a8470 T ice_cleanup_fltr_mgmt_struct +ffffffff818a8490 T ice_is_fw_auto_drop_supported +ffffffff818a84d0 T ice_fill_tx_timer_and_fc_thresh +ffffffff818a8570 T ice_aq_set_mac_cfg +ffffffff818a8690 T ice_vsig_free +ffffffff818a87e0 T ice_free_vsig_tbl +ffffffff818a88a0 T ice_free_prof_map +ffffffff818a8970 T ice_free_flow_profs +ffffffff818a8a40 T ice_free_hw_tbls +ffffffff818a8de0 T ice_init_flow_profs +ffffffff818a8e30 T ice_init_hw_tbls +ffffffff818a9340 T ice_init_hw +ffffffff818a9ac0 T ice_deinit_hw +ffffffff818a9be0 T ice_rxfill +ffffffff818a9f50 T ice_aq_manage_mac_write +ffffffff818a9fe0 T ice_update_laa_mac +ffffffff818aa150 T ice_add_mac_to_list +ffffffff818aa220 T ice_free_fltr_list +ffffffff818aa2c0 T ice_find_rule_entry +ffffffff818aa350 T ice_fill_sw_info +ffffffff818aa3f0 T ice_fill_sw_rule +ffffffff818aa700 T ice_aq_sw_rules +ffffffff818aa7d0 T ice_create_pkt_fwd_rule +ffffffff818aa9c0 T ice_aq_alloc_free_res +ffffffff818aaa70 T ice_aq_alloc_free_vsi_list +ffffffff818aabd0 T ice_update_vsi_list_rule +ffffffff818aade0 T ice_create_vsi_list_rule +ffffffff818aaf70 T ice_update_pkt_fwd_rule +ffffffff818ab090 T ice_create_vsi_list_map +ffffffff818ab1d0 T ice_add_marker_act +ffffffff818ab390 T ice_add_update_vsi_list +ffffffff818ab740 T ice_add_rule_internal +ffffffff818ab8a0 T ice_add_mac_rule +ffffffff818abcb0 T ice_add_mac +ffffffff818abd00 T ice_add_vsi_mac_filter +ffffffff818abee0 T ice_cfg_pf_default_mac_filters +ffffffff818abf60 T ice_init_tx_tracking +ffffffff818ac000 T ice_setup_tx_ctx +ffffffff818ac0a0 T ice_get_vsi_ctx +ffffffff818ac0e0 T ice_get_lan_q_ctx +ffffffff818ac150 T ice_sched_find_node_in_subtree +ffffffff818ac1f0 T ice_sched_get_free_qgrp +ffffffff818ac2b0 T ice_sched_get_qgrp_layer +ffffffff818ac2e0 T ice_sched_get_vsi_layer +ffffffff818ac320 T ice_sched_get_free_qparent +ffffffff818ac4a0 T ice_aq_add_lan_txq +ffffffff818ac650 T ice_aq_add_sched_elems +ffffffff818ac6f0 T ice_aq_cfg_sched_elems +ffffffff818ac790 T ice_sched_update_elem +ffffffff818ac880 T ice_sched_replay_node_prio +ffffffff818ac9c0 T ice_sched_rm_unused_rl_prof +ffffffff818acb30 T ice_sched_get_rl_prof_layer +ffffffff818acc00 T ice_sched_get_node_rl_prof_id +ffffffff818acc60 T ice_sched_cfg_node_bw_lmt +ffffffff818ace30 T ice_sched_rm_rl_profile +ffffffff818acfa0 T ice_sched_set_node_bw_dflt +ffffffff818ad0c0 T ice_aq_add_rl_profile +ffffffff818ad160 T ice_sched_calc_wakeup +ffffffff818ad230 T ice_sched_bw_to_rl_profile +ffffffff818ad3e0 T ice_sched_add_rl_profile +ffffffff818ad730 T ice_sched_set_node_bw +ffffffff818ad880 T ice_sched_set_node_bw_lmt +ffffffff818adae0 T ice_sched_cfg_node_bw_alloc +ffffffff818adc70 T ice_sched_replay_node_bw +ffffffff818ae1d0 t ice_is_any_bit_set +ffffffff818ae340 T ice_sched_replay_q_bw +ffffffff818ae3c0 T ice_ena_vsi_txq +ffffffff818ae5e0 T ice_cfg_vsi_for_tx +ffffffff818ae8b0 T ice_aq_dis_lan_txq +ffffffff818aea80 T ice_dis_vsi_txq +ffffffff818aedf0 T ice_vsi_disable_tx +ffffffff818af120 T ice_copy_rxq_ctx_to_hw +ffffffff818af310 T ice_write_rxq_ctx +ffffffff818af3c0 T ice_setup_rx_ctx +ffffffff818af5c0 T ice_cfg_vsi_for_rx +ffffffff818af640 T ice_is_rxq_ready +ffffffff818af830 T ice_control_rx_queue +ffffffff818af9d0 T ice_control_all_rx_queues +ffffffff818afa40 T ice_configure_rxq_interrupt +ffffffff818afac0 T ice_configure_all_rxq_interrupts +ffffffff818afb90 T ice_configure_rx_itr +ffffffff818afc50 T ice_set_default_promisc_mask +ffffffff818afc80 T ice_set_vsi_promisc +ffffffff818b0010 T ice_vsi_uses_fltr +ffffffff818b0070 T ice_add_entry_to_vsi_fltr_list +ffffffff818b0170 T ice_determine_promisc_mask +ffffffff818b0240 T ice_remove_vsi_list_rule +ffffffff818b0370 T ice_rem_update_vsi_list +ffffffff818b0960 T ice_remove_rule_internal +ffffffff818b0bd0 T ice_remove_promisc +ffffffff818b0c60 T ice_clear_vsi_promisc +ffffffff818b1070 T ice_if_promisc_set +ffffffff818b11b0 T ice_enable_intr +ffffffff818b11f0 T ice_disable_intr +ffffffff818b1230 T ice_copy_phy_caps_to_cfg +ffffffff818b12c0 T ice_sysctl_speeds_to_aq_phy_types +ffffffff818b13a0 T ice_aq_phy_types_to_link_speeds +ffffffff818b1460 T ice_apply_supported_speed_filter +ffffffff818b14f0 T ice_intersect_phy_types_and_speeds +ffffffff818b17b0 T ice_apply_saved_phy_req_to_cfg +ffffffff818b1a10 T ice_get_pfa_module_tlv +ffffffff818b1b60 T ice_get_link_default_override +ffffffff818b1dd0 T ice_fw_supports_fec_dis_auto +ffffffff818b1e50 T ice_cfg_phy_fec +ffffffff818b2120 T ice_apply_saved_fec_req_to_cfg +ffffffff818b2180 T ice_apply_saved_fc_req_to_cfg +ffffffff818b21e0 T ice_caps_to_fc_mode +ffffffff818b2230 T ice_caps_to_fec_mode +ffffffff818b2290 T ice_aq_set_phy_cfg +ffffffff818b2390 T ice_apply_saved_phy_cfg +ffffffff818b27a0 T ice_aq_set_link_restart_an +ffffffff818b2860 T ice_set_link +ffffffff818b29f0 T ice_up +ffffffff818b2ee0 T ice_find_ucast_rule_entry +ffffffff818b2f80 T ice_remove_mac_rule +ffffffff818b3100 T ice_remove_mac +ffffffff818b3120 T ice_remove_vsi_mac_filter +ffffffff818b3290 T ice_rm_pf_default_mac_filters +ffffffff818b3310 T ice_flush_rxq_interrupts +ffffffff818b36b0 T ice_flush_txq_interrupts +ffffffff818b3a50 T ice_down +ffffffff818b3ce0 T ice_ioctl +ffffffff818b3e60 T ice_tx_setup_offload +ffffffff818b3f30 T ice_start +ffffffff818b4390 T ice_watchdog +ffffffff818b43b0 T ice_media_change +ffffffff818b4410 T ice_get_phy_type_low +ffffffff818b4820 T ice_get_phy_type_high +ffffffff818b4880 T ice_media_status +ffffffff818b4970 T ice_add_media_types +ffffffff818b4c40 T ice_is_fw_health_report_supported +ffffffff818b4c90 T ice_init_device_features +ffffffff818b4e20 T ice_aq_send_driver_ver +ffffffff818b4f00 T ice_send_version +ffffffff818b5060 T ice_reinit_hw +ffffffff818b50a0 T ice_cfg_tx_topo +ffffffff818b50d0 T pkg_ver_empty +ffffffff818b5120 T ice_active_pkg_version_str +ffffffff818b5260 T ice_os_pkg_version_str +ffffffff818b5390 T ice_is_init_pkg_successful +ffffffff818b53d0 T ice_pkg_ver_compatible +ffffffff818b5420 T ice_log_pkg_init +ffffffff818b5720 T ice_copy_and_init_pkg +ffffffff818b5750 T ice_load_pkg_file +ffffffff818b5790 T ice_aq_set_event_mask +ffffffff818b5820 T ice_init_link_events +ffffffff818b5960 T ice_pkg_get_supported_vlan_mode +ffffffff818b5990 T ice_pkg_supports_dvm +ffffffff818b59c0 T ice_aq_get_vlan_mode +ffffffff818b5a50 T ice_fw_supports_dvm +ffffffff818b5b50 T ice_is_dvm_supported +ffffffff818b5b80 T ice_aq_set_port_params +ffffffff818b5c20 T ice_aq_set_vlan_mode +ffffffff818b5cd0 T ice_set_svm +ffffffff818b5e20 T ice_set_vlan_mode +ffffffff818b5e50 T ice_nvm_version_str +ffffffff818b5fb0 T ice_print_nvm_version +ffffffff818b6120 T ice_setup_scctx +ffffffff818b6270 T ice_resmgr_init +ffffffff818b62f0 T ice_resmgr_init_contig_only +ffffffff818b6370 T ice_resmgr_destroy +ffffffff818b6520 T ice_resmgr_assign_contiguous +ffffffff818b6740 T ice_alloc_intr_tracking +ffffffff818b6890 T ice_resmgr_release_map +ffffffff818b6910 T ice_free_intr_tracking +ffffffff818b69f0 T ice_setup_vsi_common +ffffffff818b6a60 T ice_setup_pf_vsi +ffffffff818b6ae0 T ice_alloc_vsi_qmap +ffffffff818b6d50 T ice_vsig_find_vsi +ffffffff818b6db0 T ice_vsig_prof_id_count +ffffffff818b6e10 T ice_vsig_get_ref +ffffffff818b6e90 T ice_gen_key_word +ffffffff818b6f70 T ice_bits_max_set +ffffffff818b7040 T ice_set_key +ffffffff818b72c0 T ice_prof_gen_key +ffffffff818b7390 T ice_tcam_write_entry +ffffffff818b74b0 T ice_tcam_ent_rsrc_type +ffffffff818b7500 T ice_alloc_hw_res +ffffffff818b7670 T ice_free_hw_res +ffffffff818b77a0 T ice_free_tcam_ent +ffffffff818b78c0 T ice_rel_tcam_idx +ffffffff818b7ad0 T ice_rem_prof_id +ffffffff818b7b80 T ice_rem_vsig +ffffffff818b7de0 T ice_rem_prof_id_vsig +ffffffff818b7f90 T ice_rem_chg_tcam_ent +ffffffff818b8040 T ice_alloc_tcam_ent +ffffffff818b8180 T ice_prof_tcam_ena_dis +ffffffff818b8570 T ice_adj_prof_priorities +ffffffff818b8850 T ice_get_profs_vsig +ffffffff818b8990 T ice_rem_prof_from_list +ffffffff818b8a30 T ice_vsig_remove_vsi +ffffffff818b8b10 T ice_vsig_add_mv_vsi +ffffffff818b8ca0 T ice_move_vsi +ffffffff818b8de0 T ice_vsig_alloc_val +ffffffff818b8e60 T ice_vsig_alloc +ffffffff818b8f30 T ice_has_prof_vsig +ffffffff818b8fa0 T ice_search_prof_id +ffffffff818b8ff0 T ice_add_prof_id_vsig +ffffffff818b9590 T ice_create_vsig_from_lst +ffffffff818b97e0 T ice_upd_prof_hw +ffffffff818b9840 T ice_match_prop_lst +ffffffff818b98c0 T ice_find_dup_props_vsig +ffffffff818b99e0 T ice_rem_prof_id_flow +ffffffff818b9e50 T ice_flow_disassoc_prof +ffffffff818b9ef0 T ice_flow_find_prof_id +ffffffff818b9f40 T ice_rem_flow_all +ffffffff818ba0a0 T ice_prof_inc_ref +ffffffff818ba100 T ice_write_es +ffffffff818ba1a0 T ice_prof_id_rsrc_type +ffffffff818ba1f0 T ice_free_prof_id +ffffffff818ba310 T ice_prof_dec_ref +ffffffff818ba4c0 T ice_rem_prof +ffffffff818ba5c0 T ice_flow_rem_prof_sync +ffffffff818ba740 T ice_flow_rem_prof +ffffffff818ba7a0 T ice_rem_vsi_rss_cfg +ffffffff818baa30 T ice_rem_vsi_rss_list +ffffffff818bac20 T ice_clean_vsi_rss_cfg +ffffffff818bacb0 T ice_remove_vsi_mirroring +ffffffff818bacd0 T ice_sched_get_vsi_node +ffffffff818bad60 T ice_sched_is_leaf_node_present +ffffffff818badf0 T ice_sched_rm_agg_vsi_info +ffffffff818bae10 T ice_sched_rm_vsi_cfg +ffffffff818bb020 T ice_rm_vsi_lan_cfg +ffffffff818bb040 T ice_aq_free_vsi +ffffffff818bb100 T ice_clear_vsi_q_ctx +ffffffff818bb1d0 T ice_clear_vsi_ctx +ffffffff818bb2c0 T ice_free_vsi +ffffffff818bb470 T ice_deinit_vsi +ffffffff818bb610 T ice_free_vsi_qmaps +ffffffff818bb760 T ice_release_vsi +ffffffff818bb8c0 T ice_transition_recovery_mode +ffffffff818bba00 T ice_clear_hw_tbls +ffffffff818bbd70 T ice_prepare_for_reset +ffffffff818bbf70 T ice_configure_misc_interrupts +ffffffff818bc080 T ice_request_stack_reinit +ffffffff818bc0a0 T ice_rebuild_recovery_mode +ffffffff818bc230 T ice_clean_all_vsi_rss_cfg +ffffffff818bc350 T ice_reset_pf_stats +ffffffff818bc370 T ice_rebuild_pf_vsi_qmap +ffffffff818bc540 T ice_set_default_vsi_ctx +ffffffff818bc610 T ice_set_rss_vsi_ctx +ffffffff818bc650 T ice_vsi_set_rss_params +ffffffff818bc6a0 T ice_setup_vsi_qmap +ffffffff818bc830 T ice_aq_add_vsi +ffffffff818bc910 T ice_add_vsi +ffffffff818bcb00 T ice_aq_suspend_sched_elems +ffffffff818bcba0 T ice_aq_resume_sched_elems +ffffffff818bcc40 T ice_sched_suspend_resume_elems +ffffffff818bcde0 T ice_sched_calc_vsi_support_nodes +ffffffff818bcec0 T ice_sched_add_elems +ffffffff818bd1d0 T ice_sched_add_nodes_to_hw_layer +ffffffff818bd290 T ice_sched_add_nodes_to_layer +ffffffff818bd470 T ice_sched_add_vsi_support_nodes +ffffffff818bd5d0 T ice_sched_add_vsi_to_topo +ffffffff818bd740 T ice_alloc_lan_q_ctx +ffffffff818bd8b0 T ice_sched_calc_vsi_child_nodes +ffffffff818bd940 T ice_sched_add_vsi_child_nodes +ffffffff818bdb20 T ice_sched_update_vsi_child_nodes +ffffffff818bdd30 T ice_sched_cfg_vsi +ffffffff818be110 T ice_cfg_vsi_qs +ffffffff818be240 T ice_cfg_vsi_lan +ffffffff818be360 T ice_reset_vsi_stats +ffffffff818be380 T ice_initialize_vsi +ffffffff818be7b0 T ice_sched_replay_agg +ffffffff818be7e0 T ice_replay_post +ffffffff818be8e0 T ice_is_main_vsi +ffffffff818be920 T ice_replay_pre_init +ffffffff818be950 T ice_replay_rss_cfg +ffffffff818be980 T ice_find_vsi_list_entry +ffffffff818bea50 T ice_add_vlan_internal +ffffffff818beed0 T ice_replay_vsi_fltr +ffffffff818bf0f0 T ice_replay_vsi_all_fltr +ffffffff818bf1b0 T ice_sched_replay_vsi_agg +ffffffff818bf1e0 T ice_replay_vsi_agg +ffffffff818bf210 T ice_replay_vsi +ffffffff818bf260 T ice_replay_all_vsi_cfg +ffffffff818bf410 T ice_aq_set_health_status_config +ffffffff818bf490 T ice_init_health_events +ffffffff818bf5a0 T ice_fw_supports_lldp_fltr_ctrl +ffffffff818bf600 T ice_add_ethertype_to_list +ffffffff818bf700 T ice_lldp_fltr_add_remove +ffffffff818bf790 T ice_add_eth_mac_rule +ffffffff818bf830 T ice_add_eth_mac +ffffffff818bf8f0 T ice_add_rx_lldp_filter +ffffffff818bfb40 T ice_update_link_info +ffffffff818bfcd0 T ice_get_link_status +ffffffff818bfd50 T ice_set_default_local_mib_settings +ffffffff818bfe40 T ice_add_ieee_ets_common_tlv +ffffffff818bff30 T ice_add_ieee_ets_tlv +ffffffff818c0050 T ice_add_ieee_etsrec_tlv +ffffffff818c0160 T ice_add_ieee_pfc_tlv +ffffffff818c01d0 T ice_add_ieee_app_pri_tlv +ffffffff818c0290 T ice_add_dscp_up_tlv +ffffffff818c0320 T ice_add_dscp_enf_tlv +ffffffff818c03e0 T ice_add_dscp_tc_bw_tlv +ffffffff818c0490 T ice_add_dscp_pfc_tlv +ffffffff818c04e0 T ice_add_dcb_tlv +ffffffff818c0970 T ice_dcb_cfg_to_lldp +ffffffff818c0a70 T ice_aq_set_lldp_mib +ffffffff818c0b10 T ice_set_dcb_cfg +ffffffff818c0cf0 T ice_set_default_local_lldp_mib +ffffffff818c0e80 T ice_aq_speed_to_rate +ffffffff818c0f70 T ice_update_link_status +ffffffff818c11b0 T ice_aq_get_set_rss_key +ffffffff818c1260 T ice_aq_set_rss_key +ffffffff818c1320 T ice_set_rss_key +ffffffff818c1440 T ice_get_rss_hdr_type +ffffffff818c14b0 T ice_add_rss_list +ffffffff818c1700 T ice_flow_val_hdrs +ffffffff818c1820 T ice_flow_proc_seg_hdrs +ffffffff818c1f40 T ice_flow_xtract_fld +ffffffff818c2210 T ice_flow_create_xtrct_seq +ffffffff818c23d0 T ice_flow_proc_segs +ffffffff818c2450 T ice_find_prof_id +ffffffff818c2520 T ice_alloc_prof_id +ffffffff818c2670 T ice_ptg_find_ptype +ffffffff818c26d0 T ice_add_prof +ffffffff818c2c40 T ice_flow_add_prof_sync +ffffffff818c2f10 T ice_get_prof +ffffffff818c3080 T ice_add_prof_to_lst +ffffffff818c31a0 T ice_find_prof_vsig +ffffffff818c3390 T ice_create_prof_id_vsig +ffffffff818c3650 T ice_add_prof_id_flow +ffffffff818c3d20 T ice_flow_assoc_prof +ffffffff818c3dc0 T ice_flow_set_fld_ext +ffffffff818c3e40 T ice_flow_set_fld +ffffffff818c3ec0 T ice_flow_set_rss_seg_info +ffffffff818c40b0 T ice_flow_find_prof_conds +ffffffff818c4210 T ice_rem_rss_list +ffffffff818c4550 T ice_add_rss_cfg_sync +ffffffff818c49d0 t ice_flow_add_prof +ffffffff818c4b60 T ice_add_rss_cfg +ffffffff818c4c40 T ice_set_rss_flow_flds +ffffffff818c4f30 T ice_lut_type_to_size +ffffffff818c4f70 T ice_lut_size_to_flag +ffffffff818c4fc0 T ice_aq_get_set_rss_lut +ffffffff818c51a0 T ice_aq_set_rss_lut +ffffffff818c51c0 T ice_set_rss_lut +ffffffff818c52c0 T ice_config_rss +ffffffff818c5420 T ice_rebuild +ffffffff818c5b60 T ice_handle_reset_event +ffffffff818c5c80 T ice_handle_pf_reset_request +ffffffff818c5d70 T ice_handle_mdd_event +ffffffff818c6230 T ice_check_ctrlq_errors +ffffffff818c6490 T ice_process_link_event +ffffffff818c6670 T ice_info_fwlog +ffffffff818c66c0 T ice_fwlog_event_dump +ffffffff818c6710 T ice_handle_fw_log_event +ffffffff818c6760 T ice_debug_print_mib_change_event +ffffffff818c6790 T ice_aq_get_lldp_mib +ffffffff818c6870 T ice_parse_ieee_ets_common_tlv +ffffffff818c6960 T ice_parse_ieee_etscfg_tlv +ffffffff818c6a70 T ice_parse_ieee_etsrec_tlv +ffffffff818c6b60 T ice_parse_ieee_pfccfg_tlv +ffffffff818c6bb0 T ice_parse_ieee_app_tlv +ffffffff818c6c50 T ice_parse_ieee_tlv +ffffffff818c6f00 T ice_parse_cee_pgcfg_tlv +ffffffff818c7050 T ice_parse_cee_pfccfg_tlv +ffffffff818c7090 T ice_parse_cee_app_tlv +ffffffff818c71d0 T ice_parse_cee_tlv +ffffffff818c73b0 T ice_parse_org_tlv +ffffffff818c7400 T ice_lldp_to_dcb_cfg +ffffffff818c7530 T ice_aq_get_dcb_cfg +ffffffff818c7730 T ice_cee_to_dcb_cfg +ffffffff818c7ad0 T ice_get_dcb_cfg_from_mib_change +ffffffff818c7c70 T ice_aq_get_cee_dcb_cfg +ffffffff818c7cf0 T ice_get_ieee_or_cee_dcb_cfg +ffffffff818c7db0 T ice_get_dcb_cfg +ffffffff818c7f40 T ice_dcb_needs_reconfig +ffffffff818c8080 T ice_do_dcb_reconfig +ffffffff818c80a0 T ice_handle_mib_change_event +ffffffff818c82b0 T ice_handle_lan_overflow_event +ffffffff818c82e0 T ice_print_health_status_string +ffffffff818c8600 T ice_handle_health_status_event +ffffffff818c8690 T ice_process_ctrlq_event +ffffffff818c87f0 T ice_clean_rq_elem +ffffffff818c8a80 T ice_process_ctrlq +ffffffff818c8c90 T ice_poll_for_media_avail +ffffffff818c8dc0 T ice_stat_update40 +ffffffff818c8e60 T ice_stat_update32 +ffffffff818c8f00 T ice_stat_update_repc +ffffffff818c9000 T ice_update_pf_stats +ffffffff818ca500 T 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T ice_read_pba_string +ffffffff818cd4f0 T ice_cfg_pba_num +ffffffff818cd560 T ice_init_link_configuration +ffffffff818cd6b0 T ice_attach_hook +ffffffff818ce150 T ice_attach +ffffffff818cf000 T xge_match +ffffffff818cf030 T xge_attach +ffffffff818d00e0 T xge_setup_xgxs_xena +ffffffff818d0180 T xge_setup_xgxs_herc +ffffffff818d0220 T xge_alloc_txmem +ffffffff818d0460 T xge_alloc_rxmem +ffffffff818d0760 T xge_add_rxbuf +ffffffff818d0980 T xge_xgmii_mediachange +ffffffff818d09b0 T xge_ifmedia_status +ffffffff818d0a30 T xge_ioctl +ffffffff818d0d10 T xge_start +ffffffff818d10e0 T xge_intr +ffffffff818d1780 T xge_enable +ffffffff818d1850 T xge_init +ffffffff818d1dd0 T xge_stop +ffffffff818d1ec0 T xge_setpromisc +ffffffff818d1f40 T xge_setmulti +ffffffff818d3000 T thtc_match +ffffffff818d3060 T thtc_attach +ffffffff818d32c0 T tht_match +ffffffff818d32f0 T tht_attach +ffffffff818d35b0 T thtc_lookup +ffffffff818d3630 T tht_intr +ffffffff818d3840 T thtc_print +ffffffff818d38c0 T tht_sw_reset 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iwm_set_key_v1 +ffffffff8195db00 T iwm_set_key +ffffffff8195dd90 T iwm_delete_key_v1 +ffffffff8195ded0 T iwm_delete_key +ffffffff8195e160 T iwm_calib_timeout +ffffffff8195e230 T iwm_set_rate_table_vht +ffffffff8195e590 T iwm_set_rate_table +ffffffff8195e960 T iwm_media_change +ffffffff8195eb70 T iwm_stop +ffffffff8195f0a0 T iwm_init +ffffffff8195f3c0 T iwm_newstate_task +ffffffff8195f590 T iwm_newstate +ffffffff8195f740 T iwm_endscan +ffffffff8195f790 T iwm_fill_sf_command +ffffffff8195f860 T iwm_send_soc_conf +ffffffff8195f9b0 T iwm_send_update_mcc_cmd +ffffffff8195fb70 T iwm_send_temp_report_ths_cmd +ffffffff8195fc50 T iwm_tt_tx_backoff +ffffffff8195fcf0 T iwm_fill_paging_mem +ffffffff819600a0 T iwm_alloc_fw_paging_mem +ffffffff819604d0 T iwm_init_hw +ffffffff81960cd0 T iwm_preinit +ffffffff81960ed0 T iwm_start +ffffffff819610c0 T iwm_watchdog +ffffffff81961290 T iwm_nic_error +ffffffff81961900 T iwm_dump_driver_status +ffffffff819619c0 T iwm_ioctl +ffffffff81961b60 T iwm_nic_umac_error +ffffffff81962100 T iwm_desc_lookup +ffffffff81962290 T iwm_rx_pkt_valid +ffffffff819622e0 T iwm_rx_pkt +ffffffff81963230 T iwm_notif_intr +ffffffff819633c0 T iwm_intr +ffffffff81963880 T iwm_intr_msix +ffffffff81963b90 T iwm_match +ffffffff81963bc0 T iwm_attach_hook +ffffffff81963c00 T iwm_attach +ffffffff81964ba0 T iwm_radiotap_attach +ffffffff81964c40 T iwm_init_task +ffffffff81964d30 T iwm_resume +ffffffff81964eb0 T iwm_wakeup +ffffffff81964f80 T iwm_activate +ffffffff81966000 T iwx_lookup_cmd_ver +ffffffff81966070 T iwx_lookup_notif_ver +ffffffff819660e0 T iwx_is_mimo_ht_plcp +ffffffff81966120 T iwx_store_cscheme +ffffffff81966170 T iwx_ctxt_info_alloc_dma +ffffffff81966220 T iwx_dma_contig_alloc +ffffffff81966470 T iwx_ctxt_info_free_paging +ffffffff81966600 T iwx_dma_contig_free +ffffffff819666f0 T iwx_get_num_sections +ffffffff81966770 T iwx_init_fw_sec +ffffffff81966c00 T iwx_fw_version_str +ffffffff81966c40 T iwx_alloc_fw_monitor_block +ffffffff81966cf0 T iwx_alloc_fw_monitor +ffffffff81966dc0 T iwx_apply_debug_destination +ffffffff81967390 T iwx_nic_lock +ffffffff81967510 T iwx_write_prph +ffffffff819675c0 T iwx_set_bits_prph +ffffffff819675e0 T iwx_clear_bits_prph +ffffffff81967600 T iwx_read_prph +ffffffff819676a0 T iwx_nic_unlock +ffffffff81967760 T iwx_set_ltr +ffffffff819678c0 T iwx_ctxt_info_init +ffffffff81967c20 T iwx_ctxt_info_free_fw_img +ffffffff81967dd0 T iwx_ctxt_info_gen3_init +ffffffff81968520 T iwx_write_umac_prph +ffffffff819685d0 T iwx_firmware_store_section +ffffffff81968670 T iwx_set_default_calib +ffffffff819686c0 T iwx_fw_info_free +ffffffff81968770 T iwx_read_firmware +ffffffff819692e0 T iwx_prph_addr_mask +ffffffff81969320 T iwx_read_prph_unlocked +ffffffff819693a0 T iwx_nic_assert_locked +ffffffff81969400 T iwx_write_prph_unlocked +ffffffff81969490 T iwx_write_prph64 +ffffffff819695d0 T iwx_read_umac_prph_unlocked +ffffffff81969660 T iwx_read_umac_prph +ffffffff81969710 T iwx_write_umac_prph_unlocked +ffffffff819697a0 T iwx_read_mem +ffffffff81969900 T iwx_write_mem +ffffffff81969a70 T iwx_write_mem32 +ffffffff81969ba0 T iwx_poll_bit +ffffffff81969c90 T iwx_set_bits_mask_prph +ffffffff81969ec0 T iwx_alloc_rx_ring +ffffffff8196a0d0 T iwx_rx_addbuf +ffffffff8196a320 T iwx_free_rx_ring +ffffffff8196a690 T iwx_disable_rx_dma +ffffffff8196a920 T iwx_reset_rx_ring +ffffffff8196a9c0 T iwx_alloc_tx_ring +ffffffff8196ac00 T iwx_free_tx_ring +ffffffff8196af60 T iwx_reset_tx_ring +ffffffff8196b200 T iwx_enable_rfkill_int +ffffffff8196b300 T iwx_check_rfkill +ffffffff8196b390 T iwx_enable_interrupts +ffffffff8196b450 T iwx_enable_fwload_interrupt +ffffffff8196b540 T iwx_restore_interrupts +ffffffff8196b570 T iwx_disable_interrupts +ffffffff8196b640 T iwx_ict_reset +ffffffff8196b850 T iwx_set_hw_ready +ffffffff8196bab0 T iwx_prepare_card_hw +ffffffff8196bc30 T iwx_force_power_gating +ffffffff8196bd00 T iwx_apm_config +ffffffff8196be00 T iwx_apm_init +ffffffff8196c0f0 T iwx_apm_stop +ffffffff8196c5d0 T iwx_init_msix_hw +ffffffff8196c690 T iwx_conf_msix_hw +ffffffff8196cd60 T iwx_clear_persistence_bit +ffffffff8196cf20 T iwx_start_hw +ffffffff8196d400 T iwx_stop_device +ffffffff8196dbe0 T iwx_nic_config +ffffffff8196dc70 T iwx_nic_rx_init +ffffffff8196dcd0 T iwx_nic_init +ffffffff8196de20 T iwx_enable_txq +ffffffff8196e140 T iwx_send_cmd +ffffffff8196e790 T iwx_free_resp +ffffffff8196e810 T iwx_disable_txq +ffffffff8196ea80 T iwx_post_alive +ffffffff8196eb20 T iwx_schedule_session_protection +ffffffff8196ec00 T iwx_send_cmd_pdu +ffffffff8196ec90 T iwx_unprotect_session +ffffffff8196ed70 T iwx_fw_valid_tx_ant +ffffffff8196edc0 T iwx_fw_valid_rx_ant +ffffffff8196ee10 T iwx_init_channel_map +ffffffff8196f020 T iwx_mimo_enabled +ffffffff8196f060 T iwx_setup_ht_rates +ffffffff8196f110 T iwx_setup_vht_rates +ffffffff8196f1a0 T iwx_init_reorder_buffer +ffffffff8196f200 T iwx_clear_reorder_buffer +ffffffff8196f2d0 T iwx_rx_ba_session_expired +ffffffff8196f400 T iwx_rx_bar_frame_release +ffffffff8196f4b0 T iwx_release_frames +ffffffff8196f6c0 T iwx_reorder_timer_expired +ffffffff8196f8b0 T iwx_find_rxba_data +ffffffff8196f940 T iwx_sta_rx_agg_baid_cfg_cmd +ffffffff8196fb90 T iwx_send_cmd_pdu_status +ffffffff8196fc20 T iwx_sta_rx_agg_sta_cmd +ffffffff8196fe80 T iwx_sta_rx_agg +ffffffff819701a0 T iwx_mac_ctxt_task +ffffffff81970360 T iwx_mac_ctxt_cmd +ffffffff819705b0 T iwx_phy_ctxt_task +ffffffff81970780 T iwx_phy_ctxt_update +ffffffff81970c10 T iwx_updatechan +ffffffff81970cf0 T iwx_add_task +ffffffff81970d80 T iwx_updateprot +ffffffff81970e60 T iwx_updateslot +ffffffff81970f40 T iwx_updateedca +ffffffff81971020 T iwx_updatedtim +ffffffff81971100 T iwx_sta_tx_agg_start +ffffffff81971330 T iwx_ba_task +ffffffff819714b0 T iwx_ampdu_rx_start +ffffffff819715b0 T iwx_ampdu_rx_stop +ffffffff819716b0 T iwx_ampdu_tx_start +ffffffff81971760 T iwx_set_mac_addr_from_csr +ffffffff819719c0 T iwx_flip_hw_address +ffffffff81971a10 T iwx_is_valid_mac_addr +ffffffff81971ac0 T iwx_nvm_get +ffffffff81971de0 T iwx_load_firmware +ffffffff81972010 T iwx_start_fw +ffffffff81972250 T iwx_pnvm_setup_fragmented +ffffffff81972590 T iwx_pnvm_setup +ffffffff819727b0 T iwx_pnvm_handle_section +ffffffff81972b60 T iwx_ctxt_info_gen3_set_pnvm +ffffffff81972c40 T iwx_pnvm_parse +ffffffff81972d30 T iwx_load_pnvm +ffffffff819731c0 T iwx_send_tx_ant_cfg +ffffffff81973260 T iwx_send_phy_cfg_cmd +ffffffff81973310 T iwx_send_dqa_cmd +ffffffff819733b0 T iwx_load_ucode_wait_alive +ffffffff819734a0 T iwx_run_init_mvm_ucode +ffffffff81973780 T iwx_config_ltr +ffffffff81973840 T iwx_update_rx_desc +ffffffff819738e0 T iwx_rxmq_get_signal_strength +ffffffff81973930 T iwx_rx_rx_phy_cmd +ffffffff819739a0 T iwx_get_noise +ffffffff81973a10 T iwx_ccmp_decap +ffffffff81973b70 T iwx_rx_hwdecrypt +ffffffff81973c80 T iwx_rx_frame +ffffffff81973f60 T iwx_detect_duplicate +ffffffff81974080 T iwx_is_sn_less +ffffffff819740e0 T iwx_oldsn_workaround +ffffffff819741b0 T iwx_rx_reorder +ffffffff81974780 T iwx_rx_mpdu_mq +ffffffff81974b00 T iwx_clear_tx_desc +ffffffff81974ca0 T iwx_txd_done +ffffffff81974d90 T iwx_txq_advance +ffffffff819750e0 T iwx_tx_update_byte_tbl +ffffffff81975180 T iwx_rx_tx_cmd +ffffffff81975300 T iwx_clear_oactive +ffffffff81975380 T iwx_rx_compressed_ba +ffffffff81975510 T iwx_rx_bmiss +ffffffff81975620 T iwx_binding_cmd +ffffffff819757c0 T iwx_get_vht_ctrl_pos +ffffffff81975830 T iwx_phy_ctxt_cmd_uhb_v3_v4 +ffffffff81975aa0 T iwx_phy_ctxt_cmd_v3_v4 +ffffffff81975d10 T iwx_phy_ctxt_cmd +ffffffff81975e30 T iwx_send_cmd_status +ffffffff81975f60 T iwx_cmd_done +ffffffff81976070 T iwx_fw_rateidx_ofdm +ffffffff819760d0 T iwx_fw_rateidx_cck +ffffffff81976130 T iwx_tx_fill_cmd +ffffffff819763d0 T iwx_rval2ridx +ffffffff81976460 T iwx_tx +ffffffff81976c60 T iwx_flush_sta_tids +ffffffff81976e30 T iwx_drain_sta +ffffffff81976ff0 T iwx_flush_sta +ffffffff81977330 T iwx_beacon_filter_send_cmd +ffffffff819773c0 T iwx_update_beacon_abort +ffffffff819774d0 T iwx_power_build_cmd +ffffffff81977560 T iwx_power_mac_update_mode +ffffffff81977790 T iwx_power_update_device +ffffffff81977840 T iwx_enable_beacon_filter +ffffffff81977960 T iwx_disable_beacon_filter +ffffffff81977a60 T iwx_add_sta_cmd +ffffffff81977d80 T iwx_mld_add_sta_cmd +ffffffff81978140 T iwx_mld_modify_link_fill +ffffffff81978460 T iwx_ack_rates +ffffffff81978720 T iwx_rm_sta_cmd +ffffffff81978810 T iwx_mld_rm_sta_cmd +ffffffff819789f0 T iwx_rm_sta +ffffffff81978ed0 T iwx_disable_mgmt_queue +ffffffff81978fd0 T iwx_umac_scan_fill_channels +ffffffff819790f0 T iwx_fill_probe_req +ffffffff81979360 T iwx_config_umac_scan_reduced +ffffffff819794d0 T iwx_scan_umac_flags_v2 +ffffffff81979510 T iwx_scan_umac_dwell_v10 +ffffffff81979580 T iwx_scan_umac_fill_general_p_v10 +ffffffff81979610 T iwx_scan_umac_fill_ch_p_v6 +ffffffff81979740 T iwx_umac_scan_v14 +ffffffff81979a60 T iwx_mcc_update +ffffffff81979b00 T iwx_ridx2rate +ffffffff81979b70 T iwx_mac_ctxt_cmd_common +ffffffff81979e90 T iwx_mac_ctxt_cmd_fill_sta +ffffffff81979f20 T iwx_mld_mac_ctxt_cmd +ffffffff8197a0b0 T iwx_clear_statistics +ffffffff8197a190 T iwx_del_task +ffffffff8197a1f0 T iwx_scan +ffffffff8197a3d0 T iwx_scan_abort +ffffffff8197a480 T iwx_bgscan +ffffffff8197a520 T iwx_bgscan_done +ffffffff8197a5f0 T iwx_bgscan_done_task +ffffffff8197a9a0 T iwx_umac_scan_abort +ffffffff8197aa40 T iwx_enable_mgmt_queue +ffffffff8197aad0 T iwx_rs_rval2idx +ffffffff8197ab40 T iwx_rs_ht_rates +ffffffff8197ac10 T iwx_rs_vht_rates +ffffffff8197acd0 T iwx_rs_init_v3 +ffffffff8197b0e0 T iwx_rs_init_v4 +ffffffff8197b510 T iwx_rs_init +ffffffff8197b570 T iwx_rs_update +ffffffff8197b810 T iwx_phy_send_rlc +ffffffff8197b900 T iwx_auth +ffffffff8197bc10 T iwx_deauth +ffffffff8197be40 T iwx_run +ffffffff8197c350 T iwx_sf_config +ffffffff8197c570 T iwx_allow_mcast +ffffffff8197c690 T iwx_run_stop +ffffffff8197c9c0 T iwx_node_alloc +ffffffff8197c9e0 T iwx_set_key +ffffffff8197cb40 T iwx_mld_add_sta_key_cmd +ffffffff8197cd10 T iwx_add_sta_key_cmd +ffffffff8197cf30 T iwx_add_sta_key +ffffffff8197d1e0 T iwx_setkey_task +ffffffff8197d2f0 T iwx_delete_key +ffffffff8197d490 T iwx_media_change +ffffffff8197d510 T iwx_stop +ffffffff8197da50 T iwx_init +ffffffff8197dd70 T iwx_newstate_task +ffffffff8197df00 T iwx_newstate +ffffffff8197e120 T iwx_endscan +ffffffff8197e170 T iwx_fill_sf_command +ffffffff8197e240 T iwx_send_bt_init_conf +ffffffff8197e2e0 T iwx_send_soc_conf +ffffffff8197e430 T iwx_send_update_mcc_cmd +ffffffff8197e5d0 T iwx_send_temp_report_ths_cmd +ffffffff8197e6b0 T iwx_init_hw +ffffffff8197ed60 T iwx_preinit +ffffffff8197efa0 T iwx_start +ffffffff8197f190 T iwx_watchdog +ffffffff8197f3b0 T iwx_nic_error +ffffffff8197fa20 T iwx_dump_driver_status +ffffffff8197fcc0 T iwx_ioctl +ffffffff8197fe60 T iwx_nic_umac_error +ffffffff81980400 T iwx_desc_lookup +ffffffff81980590 T iwx_rx_pkt_valid +ffffffff819805e0 T iwx_rx_pkt +ffffffff81981800 T iwx_notif_intr +ffffffff81981980 T iwx_intr +ffffffff81981ea0 T iwx_intr_msix +ffffffff81982200 T iwx_match +ffffffff81982230 T iwx_attach_hook +ffffffff81982270 T iwx_find_device_cfg +ffffffff81982420 T iwx_attach +ffffffff819836f0 T iwx_radiotap_attach +ffffffff81983790 T iwx_init_task +ffffffff81983880 T iwx_resume +ffffffff81983a00 T iwx_wakeup +ffffffff81983b20 T iwx_activate +ffffffff81984000 T qwx_pci_match +ffffffff81984030 T qwx_pci_attach +ffffffff81984d30 T qwx_pci_detach +ffffffff81985000 T qwx_pci_init_qmi_ce_config +ffffffff81985020 T qwx_pcic_init_msi_config +ffffffff819850d0 T qwx_pci_alloc_msi +ffffffff819851d0 T qwx_pcic_map_service_to_pipe +ffffffff819852d0 T qwx_pcic_get_user_msi_vector +ffffffff819853c0 T qwx_pcic_read32 +ffffffff819854c0 T qwx_pcic_write32 +ffffffff819855d0 T qwx_pci_start +ffffffff819856f0 T qwx_pci_stop +ffffffff81985770 T qwx_pci_power_up +ffffffff819858d0 T qwx_pci_power_down +ffffffff81985b70 T qwx_mhi_submit_xfer +ffffffff81985e20 T qwx_pcic_ext_irq_enable +ffffffff81985e50 T qwx_pcic_ext_irq_disable +ffffffff81985e80 T qwx_pci_intr +ffffffff819861f0 T qwx_pci_intr_mhi_ctrl +ffffffff81986240 T qwx_pci_intr_mhi_data +ffffffff81986290 T qwx_pci_read_hw_version +ffffffff81986310 T qwx_pci_alloc_event_rings +ffffffff81986590 T qwx_pci_init_cmd_ring +ffffffff81986620 T qwx_mhi_register +ffffffff81986650 T qwx_pcic_config_irq +ffffffff81986900 T qwx_pci_attach_hook +ffffffff81986950 T qwx_pci_free_cmd_ring +ffffffff819869d0 T qwx_pci_free_event_rings +ffffffff81986ad0 T qwx_pci_free_xfer_rings +ffffffff81986b50 T qwx_pci_alloc_xfer_ring +ffffffff81986ea0 T qwx_pci_alloc_xfer_rings_qca6390 +ffffffff81986fd0 T qwx_pci_alloc_xfer_rings_qcn9074 +ffffffff81987100 T qwx_pci_alloc_event_ring +ffffffff819871f0 T qwx_pci_read +ffffffff81987220 T qwx_pci_write +ffffffff81987250 T qwx_pcic_ce_irq_enable +ffffffff81987290 T qwx_pcic_ce_irq_disable +ffffffff819872d0 T qwx_pcic_ext_grp_disable +ffffffff81987300 T qwx_pcic_ext_irq_config +ffffffff81987560 T qwx_pcic_ce_irqs_enable +ffffffff81987600 T qwx_pcic_ce_irqs_disable +ffffffff819876a0 T qwx_pci_aspm_restore +ffffffff81987720 T qwx_pcic_ce_irq_disable_sync +ffffffff819877c0 T qwx_pci_bus_wake_up +ffffffff81987860 T qwx_mhi_wake_db_clear_valid +ffffffff819878a0 T qwx_mhi_device_wake +ffffffff81987910 T qwx_pci_bus_release +ffffffff819879b0 T qwx_mhi_device_zzz +ffffffff81987a10 T qwx_pci_get_window_start +ffffffff81987a80 T qwx_pci_select_window +ffffffff81987b30 T qwx_pci_window_write32 +ffffffff81987c40 T qwx_pci_window_read32 +ffffffff81987d40 T qwx_pci_select_static_window +ffffffff81987d70 T qwx_pci_soc_global_reset +ffffffff819880a0 T qwx_pci_clear_dbg_registers +ffffffff81988440 T qwx_pci_set_link_reg +ffffffff81988720 T qwx_pci_fix_l1ss +ffffffff81988810 T qwx_pci_enable_ltssm +ffffffff81988c60 T qwx_pci_clear_all_intrs +ffffffff81988d60 T qwx_pci_set_wlaon_pwr_ctrl +ffffffff81988f20 T qwx_pci_force_wake +ffffffff81989010 T qwx_pci_sw_reset +ffffffff81989200 T qwx_mhi_clear_vector +ffffffff819892b0 T qwx_mhi_reset_device +ffffffff81989440 T qwx_pci_msi_config +ffffffff819894b0 T qwx_pci_msi_enable +ffffffff81989510 T qwx_pci_msi_disable +ffffffff81989570 T qwx_pci_aspm_disable +ffffffff81989610 T qwx_mhi_start +ffffffff819899b0 T qwx_mhi_stop +ffffffff819899d0 T qwx_mhi_unregister +ffffffff81989a00 T qwx_mhi_ring_doorbell +ffffffff81989a70 T qwx_mhi_init_xfer_rings +ffffffff81989b70 T qwx_mhi_init_event_rings +ffffffff81989cc0 T qwx_mhi_init_cmd_ring +ffffffff81989d40 T qwx_mhi_init_dev_ctxt +ffffffff81989f10 T qwx_pci_cmd_ring_get_elem +ffffffff81989f70 T qwx_mhi_cmd_ring_submit +ffffffff8198a0c0 T qwx_mhi_send_cmd +ffffffff8198a1a0 T qwx_pci_xfer_ring_get_elem +ffffffff8198a1f0 T qwx_pci_xfer_ring_get_data +ffffffff8198a240 T qwx_mhi_start_channel +ffffffff8198a550 T qwx_mhi_start_channels +ffffffff8198a680 T qwx_rddm_prepare +ffffffff8198a950 T qwx_mhi_fw_load_handler +ffffffff8198abc0 T qwx_mhi_await_device_reset +ffffffff8198ac90 T qwx_mhi_fw_load_bhi +ffffffff8198af30 T qwx_mhi_fw_load_bhie +ffffffff8198b300 T qwx_mhi_await_device_ready +ffffffff8198b4a0 T qwx_mhi_ready_state_transition +ffffffff8198b6a0 T qwx_mhi_init_mmio +ffffffff8198ba00 T qwx_mhi_set_state +ffffffff8198ba80 T qwx_mhi_mission_mode_state_transition +ffffffff8198bc00 T qwx_mhi_low_power_mode_state_transition +ffffffff8198bc70 T qwx_pci_event_ring_get_elem +ffffffff8198bcc0 T qwx_mhi_state_change +ffffffff8198c070 T qwx_pci_intr_ctrl_event_mhi +ffffffff8198c0b0 T qwx_pci_intr_ctrl_event_ee +ffffffff8198c0f0 T qwx_pci_intr_ctrl_event_cmd_complete +ffffffff8198c210 T qwx_pci_intr_ctrl_event +ffffffff8198c580 T qwx_pci_intr_data_event_tx +ffffffff8198c920 T qwx_pci_intr_data_event +ffffffff8198d000 T cmpci_match +ffffffff8198d030 T cmpci_attach +ffffffff8198d610 T cmpci_activate +ffffffff8198d6b0 T cmpci_open +ffffffff8198d6e0 T cmpci_close +ffffffff8198d710 T cmpci_set_params +ffffffff8198e2c0 T cmpci_round_blocksize +ffffffff8198e2f0 T cmpci_halt_output +ffffffff8198e530 T cmpci_halt_input +ffffffff8198e730 T cmpci_set_port +ffffffff8198e8a0 T cmpci_get_port +ffffffff8198e970 T cmpci_query_devinfo +ffffffff8198f280 T cmpci_malloc +ffffffff8198f2e0 T cmpci_free +ffffffff8198f3d0 T cmpci_round_buffersize +ffffffff8198f410 T cmpci_trigger_output +ffffffff8198f7a0 T cmpci_trigger_input +ffffffff8198faf0 T cmpci_mixerreg_read +ffffffff8198fba0 T cmpci_mixerreg_write +ffffffff8198fc30 T cmpci_reg_partial_write_1 +ffffffff8198fcd0 T cmpci_reg_partial_write_4 +ffffffff8198fd70 T cmpci_reg_set_1 +ffffffff8198fdf0 T cmpci_reg_clear_1 +ffffffff8198fe70 T cmpci_reg_set_4 +ffffffff8198fef0 T cmpci_reg_clear_4 +ffffffff8198ff70 T cmpci_reg_set_reg_misc +ffffffff8198ffc0 T cmpci_reg_clear_reg_misc +ffffffff81990010 T cmpci_rate_to_index +ffffffff81990090 T cmpci_index_to_rate +ffffffff819900c0 T cmpci_index_to_divider +ffffffff819900f0 T cmpci_intr +ffffffff819904a0 T cmpci_set_mixer_gain +ffffffff81990d10 T cmpci_resume +ffffffff81990da0 T cmpci_alloc_dmamem +ffffffff81990fa0 T cmpci_free_dmamem +ffffffff81991090 T cmpci_find_dmamem +ffffffff819910f0 T cmpci_adjust +ffffffff81991140 T cmpci_set_out_ports +ffffffff819918a0 T cmpci_set_in_ports +ffffffff81992000 T iha_pci_probe +ffffffff81992060 T iha_pci_attach +ffffffff81993000 T pcscp_match +ffffffff81993040 T pcscp_attach +ffffffff819934d0 T pcscp_read_reg +ffffffff81993500 T pcscp_write_reg +ffffffff81993530 T pcscp_dma_isintr +ffffffff81993590 T pcscp_dma_reset +ffffffff81993600 T pcscp_dma_intr +ffffffff81993c50 T pcscp_dma_setup +ffffffff81993ef0 T pcscp_dma_go +ffffffff81994050 T pcscp_dma_stop +ffffffff819940f0 T pcscp_dma_isactive +ffffffff81995000 T bge_probe +ffffffff81995030 T bge_attach +ffffffff81996760 T bge_detach +ffffffff81996900 T bge_activate +ffffffff81996970 T bge_readmem_ind +ffffffff81996a40 T bge_writemem_ind +ffffffff81996b20 T bge_writereg_ind +ffffffff81996b80 T bge_writembx +ffffffff81996bd0 T bge_ape_lock_init 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+ffffffff81999910 T bge_sig_post_reset +ffffffff81999990 T bge_sig_legacy +ffffffff819999c0 T bge_stop_fw +ffffffff819999f0 T bge_dma_swap_options +ffffffff81999a40 T bge_phy_addr +ffffffff81999b10 T bge_chipinit +ffffffff8199a030 T bge_blockinit +ffffffff8199bb00 T bge_lookup_rev +ffffffff8199bd90 T bge_can_use_msi +ffffffff8199be00 T bge_reset +ffffffff8199c960 T bge_kstat_attach +ffffffff8199caa0 T bge_ioctl +ffffffff8199ce50 T bge_start +ffffffff8199d040 T bge_watchdog +ffffffff8199d0b0 T bge_intr +ffffffff8199d300 T bge_ifmedia_upd +ffffffff8199d640 T bge_ifmedia_sts +ffffffff8199d760 T bge_tick +ffffffff8199d990 T bge_stop +ffffffff8199e9f0 T bge_init +ffffffff8199f020 T bge_rxeof +ffffffff8199f440 T bge_rxcsum +ffffffff8199f4e0 T bge_txeof +ffffffff8199f720 T bge_link_upd +ffffffff8199faf0 T bge_stats_update_regs +ffffffff8199fd50 T bge_stats_update +ffffffff8199fea0 T bge_compact_dma_runt +ffffffff819a00e0 T bge_cksum_pad +ffffffff819a01e0 T bge_encap +ffffffff819a0570 T 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T rtwn_llt_write +ffffffff819e3b00 T rtwn_llt_init +ffffffff819e3e20 T rtwn_92c_power_on +ffffffff819e43e0 T rtwn_88e_power_on +ffffffff819e4920 T rtwn_23a_power_on +ffffffff819e4ef0 T rtwn_tx_report +ffffffff819e5000 T ral_pci_match +ffffffff819e5030 T ral_pci_attach +ffffffff819e5260 T ral_pci_detach +ffffffff819e5310 T ral_pci_activate +ffffffff819e53b0 T ral_pci_wakeup +ffffffff819e6000 T acx_pci_match +ffffffff819e6030 T acx_pci_attach +ffffffff819e62c0 T acx_pci_detach +ffffffff819e7000 T pgt_pci_match +ffffffff819e7030 T pgt_pci_attach +ffffffff819e7260 T pgt_pci_detach +ffffffff819e8000 T malo_pci_match +ffffffff819e8030 T malo_pci_attach +ffffffff819e8230 T malo_pci_detach +ffffffff819e8290 T malo_pci_activate +ffffffff819e8300 T malo_pci_wakeup +ffffffff819e9000 T bwi_pci_match +ffffffff819e9070 T bwi_pci_attach +ffffffff819e9300 T bwi_pci_detach +ffffffff819e9360 T bwi_pci_activate +ffffffff819e93e0 T bwi_reset_bcm4331 +ffffffff819e9540 T bwi_pci_conf_write +ffffffff819e9570 T bwi_pci_conf_read +ffffffff819e95a0 T bwi_pci_wakeup +ffffffff819ea000 T piixpm_match +ffffffff819ea030 T piixpm_attach +ffffffff819ea5a0 T piixpm_intr +ffffffff819ea6e0 T piixpm_i2c_acquire_bus +ffffffff819ea7e0 T piixpm_i2c_release_bus +ffffffff819ea8d0 T piixpm_i2c_exec +ffffffff819eb000 T vic_match +ffffffff819eb0b0 T vic_attach +ffffffff819eb520 T vic_intr +ffffffff819eb5c0 T vic_query +ffffffff819eb8a0 T vic_alloc_data +ffffffff819ebbf0 T vic_tick +ffffffff819ebc70 T vic_ioctl +ffffffff819ebee0 T vic_start +ffffffff819ec290 T vic_watchdog +ffffffff819ec2c0 T vic_media_change +ffffffff819ec2f0 T vic_media_status +ffffffff819ec3b0 T vic_read +ffffffff819ec3d0 T vic_read_cmd +ffffffff819ec430 T vic_getlladdr +ffffffff819ec4f0 T vic_alloc_dmamem +ffffffff819ec690 T vic_rx_fill +ffffffff819ec8a0 T vic_alloc_mbuf +ffffffff819ec980 T vic_init_data +ffffffff819ecdb0 T vic_uninit_data +ffffffff819ecfd0 T vic_link_state +ffffffff819ed060 T vic_write +ffffffff819ed0b0 T vic_rx_proc +ffffffff819ed340 T vic_tx_proc +ffffffff819ed4e0 T vic_iff +ffffffff819ed630 T vic_setlladdr +ffffffff819ed6a0 T vic_load_txb +ffffffff819ed760 T vic_init +ffffffff819ed940 T vic_stop +ffffffff819edad0 T vic_rxrinfo +ffffffff819edbb0 T vic_free_dmamem +ffffffff819ee000 T vmxnet3_match +ffffffff819ee030 T vmxnet3_attach +ffffffff819eeac0 T vmxnet3_intr +ffffffff819eeb80 T vmxnet3_intr_event +ffffffff819eec10 T vmxnet3_intr_intx +ffffffff819eec90 T vmxnet3_intr_queue +ffffffff819eed30 T vmxnet3_dma_init +ffffffff819ef170 T vmxnet3_ioctl +ffffffff819ef450 T vmxnet3_start +ffffffff819ef870 T vmxnet3_watchdog +ffffffff819ef8e0 T vmxnet3_media_change +ffffffff819ef910 T vmxnet3_media_status +ffffffff819efa30 T vmxnet3_link_state +ffffffff819efb10 T vmxnet3_dma_allocmem +ffffffff819efcb0 T vmxnet3_alloc_txring +ffffffff819efe90 T vmxnet3_alloc_rxring +ffffffff819f0220 t vmx_dmamem_alloc +ffffffff819f03b0 T vmxnet3_rxfill_tick +ffffffff819f0430 T vmxnet3_txinit +ffffffff819f0540 T vmxnet3_rxfill +ffffffff819f08a0 T vmxnet3_rxinit +ffffffff819f0a90 T vmxnet3_txstop +ffffffff819f0bb0 T vmxnet3_rxstop +ffffffff819f0d60 T vmxnet3_enable_all_intrs +ffffffff819f0e40 T vmxnet3_disable_all_intrs +ffffffff819f0f20 T vmxnet3_evintr +ffffffff819f1120 T vmxnet3_rxintr +ffffffff819f15c0 T vmxnet3_txintr +ffffffff819f17b0 T vmxnet3_init +ffffffff819f1c20 T vmxnet3_rx_offload +ffffffff819f1df0 T vmxnet3_iff +ffffffff819f1f40 T vmxnet3_stop +ffffffff819f2260 T vmxnet3_reset +ffffffff819f22a0 T vmxnet3_tx_offload +ffffffff819f2440 t vmx_kstat_create +ffffffff819f26a0 t vmx_kstat_read +ffffffff819f3000 T vmwpvs_match +ffffffff819f3040 T vmwpvs_attach +ffffffff819f3bc0 T vmwpvs_scsi_cmd +ffffffff819f40a0 T vmwpvs_intx +ffffffff819f4130 T vmwpvs_msg_task +ffffffff819f4410 T vmwpvs_intr +ffffffff819f4640 T vmwpvs_get_config +ffffffff819f48d0 T vmwpvs_dmamem_zalloc +ffffffff819f4940 T vmwpvs_dmamem_alloc +ffffffff819f4af0 T vmwpvs_ccb_put +ffffffff819f4b60 T vmwpvs_setup_rings +ffffffff819f4ca0 T vmwpvs_setup_msg_ring +ffffffff819f4d90 T vmwpvs_ccb_get +ffffffff819f4e20 T vmwpvs_dmamem_free +ffffffff819f4ec0 T vmwpvs_cmd +ffffffff819f4f70 T vmwpvs_scsi_cmd_done +ffffffff819f5170 T vmwpvs_scsi_cmd_poll +ffffffff819f6000 T lii_match +ffffffff819f6030 T lii_attach +ffffffff819f6520 T lii_activate +ffffffff819f6620 T lii_reset +ffffffff819f69f0 T lii_spi_configure +ffffffff819f6b20 T lii_eeprom_present +ffffffff819f6bc0 T lii_eeprom_read +ffffffff819f6bf0 T lii_spi_read +ffffffff819f6f90 T lii_read_macaddr +ffffffff819f7120 T lii_intr +ffffffff819f7250 T lii_alloc_rings +ffffffff819f74b0 T lii_tick +ffffffff819f7520 T lii_mii_readreg +ffffffff819f7880 T lii_mii_writereg +ffffffff819f7be0 T lii_mii_statchg +ffffffff819f7c60 T lii_media_change +ffffffff819f7cb0 T lii_media_status +ffffffff819f7d20 T lii_ioctl +ffffffff819f7f00 T lii_start +ffffffff819f8100 T lii_watchdog +ffffffff819f8150 T lii_stop +ffffffff819f81e0 T lii_init +ffffffff819f8830 T lii_iff +ffffffff819f89a0 T lii_tx_put +ffffffff819f8ad0 T lii_free_tx_space +ffffffff819f8b10 T lii_rxintr +ffffffff819f8cf0 T lii_txintr +ffffffff819f9000 T ichiic_match +ffffffff819f9030 T ichiic_attach +ffffffff819f9280 T ichiic_intr +ffffffff819f93c0 T ichiic_i2c_acquire_bus +ffffffff819f9420 T ichiic_i2c_release_bus +ffffffff819f9470 T ichiic_i2c_exec +ffffffff819fa000 T viapm_match +ffffffff819fa030 T viapm_attach +ffffffff819fa800 T viapm_intr +ffffffff819fa940 T viapm_i2c_acquire_bus +ffffffff819fa9a0 T viapm_i2c_release_bus +ffffffff819fa9f0 T viapm_i2c_exec +ffffffff819fad90 T viapm_refresh_sensor_data +ffffffff819fb100 T viapm_refresh +ffffffff819fb130 T val_to_uK +ffffffff819fb1d0 T val_to_rpm +ffffffff819fb210 T val_to_uV +ffffffff819fb2b0 T viapm_get_timecount +ffffffff819fc000 T amdiic_match +ffffffff819fc030 T amdiic_attach +ffffffff819fc260 T amdiic_intr +ffffffff819fc350 T amdiic_i2c_acquire_bus +ffffffff819fc3b0 T amdiic_i2c_release_bus +ffffffff819fc400 T amdiic_i2c_exec +ffffffff819fc6b0 T amdiic_read +ffffffff819fc860 T amdiic_wait +ffffffff819fc920 T amdiic_write +ffffffff819fd000 T nviic_match +ffffffff819fd030 T nviic_attach +ffffffff819fd2d0 T nviic_i2c_acquire_bus +ffffffff819fd320 T nviic_i2c_release_bus +ffffffff819fd370 T nviic_i2c_exec +ffffffff819fd640 T nviic_write +ffffffff819fd6a0 T nviic_read +ffffffff819fe000 T sdhc_pci_match +ffffffff819fe060 T sdhc_pci_attach +ffffffff819fe3d0 T sdhc_pci_activate +ffffffff819fe430 T sdhc_takecontroller +ffffffff819fe4f0 T sdhc_ricohfix +ffffffff819fe6c0 T sdhc_pci_conf_write +ffffffff819ff000 T kate_match +ffffffff819ff180 T kate_attach +ffffffff819ff510 T kate_refresh +ffffffff81a00000 T km_match +ffffffff81a00050 T km_attach +ffffffff81a00110 T km_refresh +ffffffff81a01000 T ksmn_match +ffffffff81a01050 T ksmn_attach +ffffffff81a01280 T ksmn_ccd_attach +ffffffff81a01410 T ksmn_refresh +ffffffff81a015c0 T ksmn_read_reg +ffffffff81a02000 t iosf_pci_match +ffffffff81a02060 t iosf_pci_attach +ffffffff81a02110 t iosf_pci_mbi_mdr_rd +ffffffff81a02180 t iosf_pci_mbi_mdr_wr +ffffffff81a03000 T itherm_probe +ffffffff81a03030 T itherm_attach +ffffffff81a03500 T itherm_activate +ffffffff81a03590 T itherm_enable +ffffffff81a035f0 T itherm_refresh +ffffffff81a03600 T itherm_refresh_sensor_data +ffffffff81a03a50 T itherm_bias_temperature_sensor +ffffffff81a04000 T pchtemp_match +ffffffff81a04030 T pchtemp_attach +ffffffff81a041f0 T pchtemp_refresh +ffffffff81a05000 T rtsx_pci_match +ffffffff81a05080 T rtsx_pci_attach +ffffffff81a06000 T xspd_match +ffffffff81a06030 T xspd_attach +ffffffff81a06240 T xspd_intr +ffffffff81a07000 T virtio_pci_match +ffffffff81a07080 T virtio_pci_attach +ffffffff81a07660 T virtio_pci_detach +ffffffff81a07750 T virtio_pci_kick +ffffffff81a077a0 T virtio_pci_read_device_config_1 +ffffffff81a077d0 T virtio_pci_read_device_config_2 +ffffffff81a07800 T virtio_pci_read_device_config_4 +ffffffff81a07830 T virtio_pci_read_device_config_8 +ffffffff81a078c0 T virtio_pci_write_device_config_1 +ffffffff81a078f0 T virtio_pci_write_device_config_2 +ffffffff81a07920 T virtio_pci_write_device_config_4 +ffffffff81a07950 T virtio_pci_write_device_config_8 +ffffffff81a079c0 T virtio_pci_read_queue_size +ffffffff81a07a40 T virtio_pci_setup_queue +ffffffff81a07d70 T virtio_pci_setup_intrs +ffffffff81a07eb0 T virtio_pci_get_status +ffffffff81a07f20 T virtio_pci_set_status +ffffffff81a08090 T virtio_pci_negotiate_features +ffffffff81a081f0 T virtio_pci_poll_intr +ffffffff81a08270 T virtio_pci_intr_barrier +ffffffff81a08300 T virtio_pci_set_msix_queue_vector +ffffffff81a08380 T virtio_pci_set_msix_config_vector +ffffffff81a083c0 T virtio_pci_find_cap +ffffffff81a08590 T virtio_pci_attach_10 +ffffffff81a08a60 T virtio_pci_attach_09 +ffffffff81a08bd0 T virtio_pci_adjust_config_region +ffffffff81a08c80 T virtio_pci_setup_msix +ffffffff81a08e90 T virtio_pci_legacy_intr +ffffffff81a08f60 T virtio_pci_legacy_intr_mpsafe +ffffffff81a09010 T virtio_pci_free_irqs +ffffffff81a091d0 T virtio_pci_negotiate_features_10 +ffffffff81a09480 T virtio_pci_msix_establish +ffffffff81a09600 T virtio_pci_config_intr +ffffffff81a09640 T virtio_pci_shared_queue_intr +ffffffff81a09650 T virtio_pci_queue_intr +ffffffff81a0a000 T dwiic_pci_match +ffffffff81a0a030 T dwiic_pci_attach +ffffffff81a0a410 T dwiic_pci_activate +ffffffff81a0a490 T dwiic_pci_bus_scan +ffffffff81a0b000 T bwfm_pci_buscore_read +ffffffff81a0b070 T bwfm_pci_buscore_write +ffffffff81a0b0f0 T bwfm_pci_buscore_prepare +ffffffff81a0b120 T bwfm_pci_buscore_reset +ffffffff81a0b390 T bwfm_pci_buscore_activate +ffffffff81a0b3c0 T bwfm_pci_preinit +ffffffff81a0c410 T bwfm_pci_stop +ffffffff81a0c4b0 T bwfm_pci_txcheck +ffffffff81a0c570 T bwfm_pci_txdata +ffffffff81a0c910 T bwfm_pci_msgbuf_query_dcmd +ffffffff81a0cdd0 T bwfm_pci_msgbuf_set_dcmd +ffffffff81a0ce20 T bwfm_pci_match +ffffffff81a0ce50 T bwfm_pci_attach +ffffffff81a0d170 T bwfm_pci_detach +ffffffff81a0d1d0 T bwfm_pci_activate +ffffffff81a0d3f0 T bwfm_pci_intr +ffffffff81a0d6b0 T bwfm_pci_select_core +ffffffff81a0d7a0 T bwfm_pci_load_microcode +ffffffff81a0dd00 T bwfm_pci_dmamem_alloc +ffffffff81a0dee0 T bwfm_pci_setup_ring +ffffffff81a0e120 T bwfm_pci_intr_enable +ffffffff81a0e170 T bwfm_pci_hostready +ffffffff81a0e1e0 T bwfm_pci_fill_rx_rings +ffffffff81a0e240 T bwfm_pci_dmamem_free +ffffffff81a0e2d0 T bwfm_pci_cleanup +ffffffff81a0eb60 T bwfm_pci_send_mb_data +ffffffff81a0ecb0 T bwfm_pci_intmask +ffffffff81a0ecf0 T bwfm_pci_pktid_avail +ffffffff81a0ed70 T bwfm_pci_pktid_new +ffffffff81a0eef0 T bwfm_pci_pktid_free +ffffffff81a0efb0 T bwfm_pci_fill_rx_buf_ring +ffffffff81a0f340 T bwfm_pci_fill_rx_ioctl_ring +ffffffff81a0f700 T bwfm_pci_ring_write_reserve +ffffffff81a0f800 T bwfm_pci_ring_write_cancel +ffffffff81a0f840 T bwfm_pci_ring_write_commit +ffffffff81a0f930 T bwfm_pci_ring_write_rptr +ffffffff81a0f9b0 T bwfm_pci_ring_write_wptr +ffffffff81a0fa30 T bwfm_pci_setup_flowring +ffffffff81a0fba0 T bwfm_pci_ring_bell +ffffffff81a0fbe0 T bwfm_pci_ring_update_rptr +ffffffff81a0fc90 T bwfm_pci_ring_update_wptr +ffffffff81a0fd40 T bwfm_pci_ring_write_reserve_multi +ffffffff81a0fe60 T bwfm_pci_ring_read_avail +ffffffff81a0ff70 T bwfm_pci_ring_read_commit +ffffffff81a10000 T bwfm_pci_ring_rx +ffffffff81a10230 T bwfm_pci_msg_rx +ffffffff81a108d0 T bwfm_pci_flowring_delete_cb +ffffffff81a109a0 T bwfm_pci_msgbuf_rxioctl +ffffffff81a10aa0 T bwfm_pci_intr_status +ffffffff81a10ae0 T bwfm_pci_intr_ack +ffffffff81a10b20 T bwfm_pci_flowring_lookup +ffffffff81a10cb0 T bwfm_pci_flowring_create +ffffffff81a10df0 T bwfm_pci_flowring_create_cb +ffffffff81a11170 T bwfm_pci_flowring_delete +ffffffff81a11490 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff81a116e0 T bwfm_pci_handle_mb_data +ffffffff81a117d0 T bwfm_pci_intr_disable +ffffffff81a12000 T ccp_pci_match +ffffffff81a12030 T ccp_pci_attach +ffffffff81a13000 T psp_pci_match +ffffffff81a130a0 T psp_pci_intr_map +ffffffff81a13220 T psp_pci_attach +ffffffff81a14000 T bnxt_match +ffffffff81a14030 T bnxt_attach +ffffffff81a14e30 T bnxt_dmamem_alloc +ffffffff81a14ff0 T bnxt_dmamem_free +ffffffff81a150a0 T bnxt_hwrm_ver_get +ffffffff81a15210 T bnxt_hwrm_nvm_get_dev_info +ffffffff81a15370 T bnxt_hwrm_func_drv_rgtr +ffffffff81a154a0 T bnxt_hwrm_func_rgtr_async_events +ffffffff81a155e0 T bnxt_hwrm_func_qcaps +ffffffff81a156e0 T bnxt_admin_intr +ffffffff81a158f0 T bnxt_intr +ffffffff81a15eb0 T bnxt_hwrm_func_qcfg +ffffffff81a15f80 T bnxt_hwrm_queue_qportcfg +ffffffff81a16070 T bnxt_hwrm_func_reset +ffffffff81a16130 T bnxt_mark_cpr_invalid +ffffffff81a16190 T bnxt_hwrm_ring_alloc +ffffffff81a16350 T bnxt_cfg_async_cr +ffffffff81a16470 T bnxt_write_cp_doorbell +ffffffff81a164b0 T bnxt_set_cp_ring_aggint +ffffffff81a165a0 T bnxt_ioctl +ffffffff81a16780 T bnxt_start +ffffffff81a16d50 T bnxt_watchdog +ffffffff81a16d80 T bnxt_media_change +ffffffff81a16ef0 T bnxt_media_status +ffffffff81a16f10 T bnxt_refill +ffffffff81a17080 T bnxt_media_autonegotiate +ffffffff81a17180 T bnxt_hwrm_port_phy_qcfg +ffffffff81a17660 T bnxt_free_slots +ffffffff81a17710 T bnxt_hwrm_cmd_hdr_init +ffffffff81a17760 T hwrm_send_message +ffffffff81a177f0 T bnxt_queue_up +ffffffff81a185a0 T bnxt_hwrm_stat_ctx_alloc +ffffffff81a186c0 T bnxt_write_tx_doorbell +ffffffff81a18740 T bnxt_write_rx_doorbell +ffffffff81a187c0 T bnxt_hwrm_ring_grp_alloc +ffffffff81a188e0 T bnxt_rx_fill +ffffffff81a18990 T bnxt_rx_fill_ag +ffffffff81a18a50 T bnxt_hwrm_ring_grp_free +ffffffff81a18b60 T bnxt_hwrm_ring_free +ffffffff81a18c70 T bnxt_hwrm_stat_ctx_free +ffffffff81a18d80 T bnxt_queue_down +ffffffff81a19610 T bnxt_up +ffffffff81a19ce0 T bnxt_hwrm_vnic_ctx_alloc +ffffffff81a19dd0 T bnxt_hwrm_vnic_alloc +ffffffff81a19ee0 T bnxt_hwrm_vnic_cfg +ffffffff81a1a040 T bnxt_hwrm_vnic_cfg_placement +ffffffff81a1a130 T bnxt_hwrm_set_filter +ffffffff81a1a2d0 T bnxt_hwrm_vnic_rss_cfg +ffffffff81a1a3c0 T bnxt_iff +ffffffff81a1a540 T bnxt_hwrm_vnic_free +ffffffff81a1a650 T bnxt_hwrm_vnic_ctx_free +ffffffff81a1a760 T bnxt_down +ffffffff81a1ac10 T bnxt_hwrm_free_filter +ffffffff81a1ad10 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff81a1ae00 T bnxt_rxrinfo +ffffffff81a1af70 T bnxt_get_sffpage +ffffffff81a1b2f0 T bnxt_load_mbuf +ffffffff81a1b3c0 T bnxt_handle_async_event +ffffffff81a1b410 T bnxt_cpr_next_cmpl +ffffffff81a1b480 T bnxt_cpr_commit +ffffffff81a1b4b0 T bnxt_cpr_rollback +ffffffff81a1b4e0 T bnxt_write_cp_doorbell_index +ffffffff81a1b560 T bnxt_rx +ffffffff81a1b830 T bnxt_txeof +ffffffff81a1b970 T bnxt_get_media_type +ffffffff81a1bed0 T bnxt_add_media_type +ffffffff81a1c090 T _hwrm_send_message +ffffffff81a1ee40 T bnxt_rx_fill_slots +ffffffff81a1f040 T bnxt_hwrm_err_map +ffffffff81a1f080 T _bnxt_hwrm_set_async_event_bit +ffffffff81a20000 t mcx_match +ffffffff81a20030 t mcx_attach +ffffffff81a20fb0 T mcx_rx_fill +ffffffff81a21250 T mcx_load_mbuf +ffffffff81a21320 t mcx_dmamem_alloc +ffffffff81a214b0 t mcx_init_wait +ffffffff81a21550 t mcx_enable_hca +ffffffff81a21770 t mcx_issi +ffffffff81a21b80 t mcx_pages +ffffffff81a22680 t mcx_hca_max_caps +ffffffff81a22cb0 t mcx_hca_set_caps +ffffffff81a23240 t mcx_init_hca +ffffffff81a23450 t mcx_set_driver_version +ffffffff81a23850 t mcx_iff +ffffffff81a23d40 t mcx_alloc_uar +ffffffff81a23f80 t mcx_alloc_pd +ffffffff81a241b0 t mcx_alloc_tdomain +ffffffff81a243e0 t mcx_admin_intr +ffffffff81a245d0 t mcx_create_eq +ffffffff81a24c50 t mcx_query_nic_vport_context +ffffffff81a250a0 t mcx_query_special_contexts +ffffffff81a252d0 t mcx_set_port_mtu +ffffffff81a25400 t mcx_ioctl +ffffffff81a27bd0 t mcx_start +ffffffff81a28160 t mcx_watchdog +ffffffff81a28190 t mcx_media_change +ffffffff81a28500 t mcx_media_status +ffffffff81a286c0 t mcx_media_add_types +ffffffff81a28850 t mcx_refill +ffffffff81a288c0 t mcx_cq_intr +ffffffff81a28f40 t mcx_calibrate +ffffffff81a29120 t mcx_port_change +ffffffff81a29330 t mcx_kstat_attach +ffffffff81a297a0 t mcx_teardown_hca +ffffffff81a299d0 t mcx_dmamem_free +ffffffff81a29a60 t mcx_set_issi +ffffffff81a29c50 t mcx_set_flow_table_entry_mac +ffffffff81a2a1a0 t mcx_delete_flow_table_entry +ffffffff81a2a6b0 t mcx_access_hca_reg +ffffffff81a2ab80 t mcx_cmdq_exec +ffffffff81a2ae40 t mcx_down +ffffffff81a2c0a0 t mcx_create_flow_table +ffffffff81a2c4f0 t mcx_create_flow_group +ffffffff81a2ca40 t mcx_set_flow_table_root +ffffffff81a2ce40 t mcx_create_rqt +ffffffff81a2d330 t mcx_create_tir_direct +ffffffff81a2d6e0 t mcx_create_tir_indirect +ffffffff81a2dac0 t mcx_set_flow_table_entry_proto +ffffffff81a2e010 t mcx_ready_sq +ffffffff81a2e420 t mcx_ready_rq +ffffffff81a2e830 t mcx_calibrate_first +ffffffff81a2e960 t mcx_create_rq +ffffffff81a2ef70 t mcx_destroy_sq +ffffffff81a2f2b0 t mcx_destroy_cq +ffffffff81a2f5f0 t mcx_destroy_flow_table +ffffffff81a2f9e0 t mcx_kstat_attach_ppcnt +ffffffff81a2fb30 t mcx_kstat_ppcnt_read +ffffffff81a2fc60 t mcx_kstat_mtmp_read +ffffffff81a2fe00 t mcx_kstat_queue_read +ffffffff81a30fe0 t mcx_timecounter_read +ffffffff81a32000 t iavf_match +ffffffff81a32030 t iavf_attach +ffffffff81a32ad0 t iavf_reset +ffffffff81a32e50 t iavf_dmamem_alloc +ffffffff81a32fe0 t iavf_arq_fill +ffffffff81a332e0 t iavf_arq_timeout +ffffffff81a33310 t iavf_init_admin_queue +ffffffff81a33520 t iavf_get_version +ffffffff81a33790 t iavf_get_vf_resources +ffffffff81a339c0 t iavf_config_irq_map +ffffffff81a33c00 t iavf_intr +ffffffff81a343c0 t iavf_ioctl +ffffffff81a34a40 t iavf_start +ffffffff81a34ef0 t iavf_watchdog +ffffffff81a34f20 t iavf_media_change +ffffffff81a34f50 t iavf_media_status +ffffffff81a34fe0 t iavf_dmamem_free +ffffffff81a35070 t iavf_arq_unfill +ffffffff81a35190 t iavf_down +ffffffff81a35600 t iavf_up +ffffffff81a361e0 t iavf_queue_select +ffffffff81a36460 t iavf_txr_free +ffffffff81a365a0 t iavf_rxr_free +ffffffff81a366e0 t iavf_rxfill +ffffffff81a36a40 t iavf_rxrefill +ffffffff81a36a60 t iavf_process_arq +ffffffff81a36f40 t iavf_add_del_addr +ffffffff81a38000 T rge_match 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igc_force_mac_fc_generic +ffffffff81a5af70 T igc_config_fc_after_link_up_generic +ffffffff81a5b130 T igc_get_speed_and_duplex_copper_generic +ffffffff81a5b1e0 T igc_put_hw_semaphore_generic +ffffffff81a5b240 T igc_get_auto_rd_done_generic +ffffffff81a5b550 T igc_disable_pcie_master_generic +ffffffff81a5c000 T igc_init_nvm_ops_generic +ffffffff81a5c080 T igc_null_read_nvm +ffffffff81a5c0b0 T igc_null_nvm_generic +ffffffff81a5c0e0 T igc_reload_nvm_generic +ffffffff81a5c180 T igc_null_write_nvm +ffffffff81a5c1b0 T igc_poll_eerd_eewr_done +ffffffff81a5c260 T igc_read_nvm_eerd +ffffffff81a5c3c0 T igc_read_mac_addr_generic +ffffffff81a5c4b0 T igc_validate_nvm_checksum_generic +ffffffff81a5d000 T igc_init_phy_ops_generic +ffffffff81a5d0f0 T igc_null_set_page +ffffffff81a5d120 T igc_null_read_reg +ffffffff81a5d150 T igc_null_phy_generic +ffffffff81a5d180 T igc_null_lplu_state +ffffffff81a5d1b0 T igc_null_write_reg +ffffffff81a5d1e0 T igc_check_reset_block_generic +ffffffff81a5d240 T igc_get_phy_id +ffffffff81a5d310 T igc_read_phy_reg_mdic +ffffffff81a5d440 T igc_write_phy_reg_mdic +ffffffff81a5d570 T igc_phy_setup_autoneg +ffffffff81a5d7b0 T igc_copper_link_autoneg +ffffffff81a5d920 T igc_wait_autoneg +ffffffff81a5da00 T igc_setup_copper_link_generic +ffffffff81a5db50 T igc_phy_has_link_generic +ffffffff81a5dc80 T igc_check_downshift_generic +ffffffff81a5dcb0 T igc_phy_hw_reset_generic +ffffffff81a5dec0 T igc_power_up_phy_copper +ffffffff81a5df60 T igc_power_down_phy_copper +ffffffff81a5e010 T igc_write_phy_reg_gpy +ffffffff81a5e260 T igc_write_xmdio_reg +ffffffff81a5e380 T igc_read_phy_reg_gpy +ffffffff81a5e5d0 T igc_read_xmdio_reg +ffffffff81a5e6f0 T __igc_access_xmdio_reg +ffffffff81a5f000 T ngbe_match +ffffffff81a5f030 T ngbe_attach +ffffffff81a5f670 T ngbe_detach +ffffffff81a5f940 T ngbe_allocate_pci_resources +ffffffff81a5fa70 T ngbe_allocate_queues +ffffffff81a60030 T ngbe_allocate_isb +ffffffff81a600d0 T ngbe_init_shared_code +ffffffff81a603b0 T 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ngbe_stop_adapter +ffffffff81a67530 T ngbe_get_bus_info +ffffffff81a675f0 T ngbe_set_lan_id_multi_port_pcie +ffffffff81a67660 T ngbe_acquire_swfw_sync +ffffffff81a67930 T ngbe_release_swfw_sync +ffffffff81a67aa0 T ngbe_reset_hw +ffffffff81a67d40 T ngbe_get_media_type +ffffffff81a67d70 T ngbe_disable_sec_rx_path +ffffffff81a67e40 T ngbe_enable_sec_rx_path +ffffffff81a67ec0 T ngbe_enable_rx_dma +ffffffff81a67f20 T ngbe_start_hw +ffffffff81a68010 T ngbe_set_rar +ffffffff81a681a0 T ngbe_init_rx_addrs +ffffffff81a683a0 T ngbe_update_mc_addr_list +ffffffff81a68580 T ngbe_enable_rx +ffffffff81a686f0 T ngbe_disable_rx +ffffffff81a68840 T ngbe_clear_vfta +ffffffff81a68960 T ngbe_init_uta_tables +ffffffff81a689e0 T ngbe_fc_enable +ffffffff81a68cf0 T ngbe_setup_fc +ffffffff81a68de0 T ngbe_check_mac_link +ffffffff81a68f70 T ngbe_set_rxpba +ffffffff81a69020 T ngbe_eepromcheck_cap +ffffffff81a69100 T ngbe_phy_led_oem_chk +ffffffff81a69220 T ngbe_set_fw_drv_ver +ffffffff81a69370 T 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T dma_resv_iter_first +ffffffff81a70880 T dma_resv_iter_next +ffffffff81a70900 T dma_resv_copy_fences +ffffffff81a70d40 T dma_resv_get_fences +ffffffff81a711d0 T dma_resv_get_singleton +ffffffff81a71310 T dma_resv_wait_timeout +ffffffff81a71610 T dma_resv_test_signaled +ffffffff81a71790 T dma_resv_describe +ffffffff81a72000 T drm_legacy_agp_info +ffffffff81a720b0 T drm_legacy_agp_acquire +ffffffff81a72120 T drm_legacy_agp_release +ffffffff81a72190 T drm_legacy_agp_enable +ffffffff81a72210 T drm_legacy_agp_takedown +ffffffff81a72280 T drm_legacy_agp_init +ffffffff81a73000 T devm_aperture_acquire_from_firmware +ffffffff81a73060 T drm_aperture_remove_conflicting_framebuffers +ffffffff81a73090 T drm_aperture_remove_conflicting_pci_framebuffers +ffffffff81a74000 T __drm_crtc_commit_free +ffffffff81a74020 T drm_crtc_commit_wait +ffffffff81a74200 T drm_atomic_state_default_release +ffffffff81a74280 T drm_atomic_state_init +ffffffff81a743f0 T drm_atomic_state_alloc +ffffffff81a744a0 T drm_atomic_state_default_clear +ffffffff81a74800 T drm_atomic_state_clear +ffffffff81a74830 T __drm_atomic_state_free +ffffffff81a74940 T drm_atomic_get_crtc_state +ffffffff81a74ab0 T drm_atomic_get_plane_state +ffffffff81a74cc0 T drm_atomic_private_obj_init +ffffffff81a74db0 T drm_atomic_private_obj_fini +ffffffff81a74e50 T drm_atomic_get_private_obj_state +ffffffff81a75030 T drm_atomic_get_old_private_obj_state +ffffffff81a75090 T drm_atomic_get_new_private_obj_state +ffffffff81a750f0 T drm_atomic_get_old_connector_for_encoder +ffffffff81a75160 T drm_atomic_get_new_connector_for_encoder +ffffffff81a751d0 T drm_atomic_get_old_crtc_for_encoder +ffffffff81a75270 T drm_atomic_get_new_crtc_for_encoder +ffffffff81a75310 T drm_atomic_get_connector_state +ffffffff81a75590 T drm_atomic_get_bridge_state +ffffffff81a755a0 T drm_atomic_get_old_bridge_state +ffffffff81a75600 T drm_atomic_get_new_bridge_state +ffffffff81a75660 T drm_atomic_add_encoder_bridges +ffffffff81a75740 T drm_atomic_add_affected_connectors +ffffffff81a758a0 T drm_atomic_add_affected_planes +ffffffff81a759d0 T drm_atomic_check_only +ffffffff81a76560 T drm_atomic_commit +ffffffff81a76640 T drm_atomic_print_new_state +ffffffff81a76850 T drm_atomic_nonblocking_commit +ffffffff81a76900 T __drm_atomic_helper_disable_plane +ffffffff81a76990 T __drm_atomic_helper_set_config +ffffffff81a76d90 t drm_atomic_plane_print_state +ffffffff81a77020 t drm_atomic_crtc_print_state +ffffffff81a772f0 t drm_atomic_connector_print_state +ffffffff81a77450 T drm_state_dump +ffffffff81a78000 T drm_atomic_helper_check_modeset +ffffffff81a78e00 t handle_conflicting_encoders +ffffffff81a79170 t mode_fixup +ffffffff81a794f0 T drm_atomic_helper_check_wb_encoder_state +ffffffff81a79560 T drm_atomic_helper_check_plane_state +ffffffff81a79980 T drm_atomic_helper_check_crtc_primary_plane +ffffffff81a79a30 T drm_atomic_helper_check_planes +ffffffff81a79d10 T drm_atomic_helper_check +ffffffff81a79de0 T drm_atomic_helper_async_check +ffffffff81a7a0e0 T drm_atomic_helper_update_legacy_modeset_state +ffffffff81a7a350 T drm_atomic_helper_calc_timestamping_constants +ffffffff81a7a3f0 T drm_atomic_helper_commit_modeset_disables +ffffffff81a7aae0 T drm_atomic_helper_commit_modeset_enables +ffffffff81a7ae00 T drm_atomic_helper_wait_for_fences +ffffffff81a7b010 T drm_atomic_helper_wait_for_vblanks +ffffffff81a7b3c0 T drm_atomic_helper_wait_for_flip_done +ffffffff81a7b5b0 T drm_atomic_helper_commit_tail +ffffffff81a7b780 T drm_atomic_helper_commit_planes +ffffffff81a7bb30 T drm_atomic_helper_fake_vblank +ffffffff81a7bc30 T drm_atomic_helper_commit_hw_done +ffffffff81a7be50 T drm_atomic_helper_cleanup_planes +ffffffff81a7bf00 T drm_atomic_helper_commit_tail_rpm +ffffffff81a7c0d0 t try_wait_for_completion +ffffffff81a7c140 T drm_atomic_helper_async_commit +ffffffff81a7c410 T drm_atomic_helper_commit +ffffffff81a7c710 T drm_atomic_helper_prepare_planes +ffffffff81a7c9e0 T drm_atomic_helper_unprepare_planes +ffffffff81a7caf0 T drm_atomic_helper_setup_commit +ffffffff81a7d2e0 t commit_work +ffffffff81a7d300 T drm_atomic_helper_swap_state +ffffffff81a7d9c0 t commit_tail +ffffffff81a7dc10 t release_crtc_commit +ffffffff81a7dc50 t crtc_or_fake_commit +ffffffff81a7dd80 T drm_atomic_helper_wait_for_dependencies +ffffffff81a7dfc0 T drm_atomic_helper_commit_cleanup_done +ffffffff81a7e2b0 T drm_atomic_helper_commit_planes_on_crtc +ffffffff81a7e560 T drm_atomic_helper_disable_planes_on_crtc +ffffffff81a7e6d0 T drm_atomic_helper_update_plane +ffffffff81a7e830 T drm_atomic_helper_disable_plane +ffffffff81a7e930 T drm_atomic_helper_set_config +ffffffff81a7ea10 T drm_atomic_helper_disable_all +ffffffff81a7ec00 T drm_atomic_helper_shutdown +ffffffff81a7ed80 T drm_atomic_helper_duplicate_state +ffffffff81a7ef10 T drm_atomic_helper_suspend +ffffffff81a7f0b0 T drm_atomic_helper_commit_duplicated_state +ffffffff81a7f200 T drm_atomic_helper_resume +ffffffff81a7f370 T drm_atomic_helper_page_flip +ffffffff81a7f450 t page_flip_common +ffffffff81a7f580 T drm_atomic_helper_page_flip_target +ffffffff81a7f6c0 T drm_atomic_helper_bridge_propagate_bus_fmt +ffffffff81a7f740 t set_best_encoder +ffffffff81a80000 T __drm_atomic_helper_crtc_state_reset +ffffffff81a80030 T __drm_atomic_helper_crtc_reset +ffffffff81a800a0 T drm_atomic_helper_crtc_reset +ffffffff81a80150 T __drm_atomic_helper_crtc_duplicate_state +ffffffff81a80230 T drm_atomic_helper_crtc_duplicate_state +ffffffff81a802f0 T __drm_atomic_helper_crtc_destroy_state +ffffffff81a803e0 T drm_atomic_helper_crtc_destroy_state +ffffffff81a80420 T __drm_atomic_helper_plane_state_reset +ffffffff81a80500 T __drm_atomic_helper_plane_reset +ffffffff81a80560 T drm_atomic_helper_plane_reset +ffffffff81a80670 T __drm_atomic_helper_plane_destroy_state +ffffffff81a806e0 T __drm_atomic_helper_plane_duplicate_state +ffffffff81a80760 T drm_atomic_helper_plane_duplicate_state +ffffffff81a80860 T drm_atomic_helper_plane_destroy_state +ffffffff81a808e0 T __drm_atomic_helper_connector_state_reset +ffffffff81a80910 T __drm_atomic_helper_connector_reset +ffffffff81a80950 T drm_atomic_helper_connector_reset +ffffffff81a80a40 T __drm_atomic_helper_connector_destroy_state +ffffffff81a80aa0 T drm_atomic_helper_connector_tv_margins_reset +ffffffff81a80b00 T drm_atomic_helper_connector_tv_reset +ffffffff81a80d50 T drm_atomic_helper_connector_tv_check +ffffffff81a80e30 T __drm_atomic_helper_connector_duplicate_state +ffffffff81a80ed0 T drm_atomic_helper_connector_duplicate_state +ffffffff81a80fe0 T drm_atomic_helper_connector_destroy_state +ffffffff81a81050 T __drm_atomic_helper_private_obj_duplicate_state +ffffffff81a81090 T __drm_atomic_helper_bridge_duplicate_state +ffffffff81a810d0 T drm_atomic_helper_bridge_duplicate_state +ffffffff81a81190 T drm_atomic_helper_bridge_destroy_state +ffffffff81a811b0 T __drm_atomic_helper_bridge_reset +ffffffff81a81200 T drm_atomic_helper_bridge_reset +ffffffff81a82000 T drm_atomic_set_mode_for_crtc +ffffffff81a82250 T drm_atomic_set_mode_prop_for_crtc +ffffffff81a82530 T drm_atomic_set_crtc_for_plane +ffffffff81a826d0 T drm_atomic_set_fb_for_plane +ffffffff81a827c0 T drm_atomic_set_crtc_for_connector +ffffffff81a82950 T drm_atomic_get_property +ffffffff81a830f0 T drm_atomic_connector_commit_dpms +ffffffff81a83250 T drm_atomic_set_property +ffffffff81a83e50 T drm_mode_atomic_ioctl +ffffffff81a843d0 t prepare_signaling +ffffffff81a848f0 t complete_signaling +ffffffff81a84af0 t drm_atomic_replace_property_blob_from_id +ffffffff81a84c90 t drm_atomic_set_writeback_fb_for_connector +ffffffff81a84d00 t set_out_fence_for_connector +ffffffff81a85000 T drm_is_current_master +ffffffff81a85070 T drm_getmagic +ffffffff81a85160 T drm_authmagic +ffffffff81a85250 T drm_master_create +ffffffff81a85310 T drm_setmaster_ioctl +ffffffff81a853f0 t drm_new_set_master +ffffffff81a855e0 T drm_dropmaster_ioctl +ffffffff81a856f0 t drm_drop_master +ffffffff81a857d0 T drm_master_open +ffffffff81a858b0 T drm_master_get +ffffffff81a858e0 T drm_master_release +ffffffff81a859e0 T drm_master_put +ffffffff81a85aa0 T drm_file_get_master +ffffffff81a85b10 T drm_master_internal_acquire +ffffffff81a85b80 T drm_master_internal_release +ffffffff81a86000 T drm_plane_create_alpha_property +ffffffff81a860b0 T drm_plane_create_rotation_property +ffffffff81a86200 T drm_rotation_simplify +ffffffff81a86280 T drm_plane_create_zpos_property +ffffffff81a86350 T drm_plane_create_zpos_immutable_property +ffffffff81a86410 T drm_atomic_normalize_zpos +ffffffff81a86760 T drm_plane_create_blend_mode_property +ffffffff81a86940 t drm_atomic_state_zpos_cmp +ffffffff81a87000 T drm_bridge_add +ffffffff81a87080 T devm_drm_bridge_add +ffffffff81a87150 T drm_bridge_remove +ffffffff81a871c0 T drm_bridge_attach +ffffffff81a873a0 T drm_bridge_detach +ffffffff81a87490 T drm_bridge_chain_mode_fixup +ffffffff81a87540 T drm_bridge_chain_mode_valid +ffffffff81a875f0 T drm_bridge_chain_mode_set +ffffffff81a87690 T drm_atomic_bridge_chain_disable +ffffffff81a877a0 T drm_atomic_bridge_chain_post_disable +ffffffff81a879e0 T drm_atomic_bridge_chain_pre_enable +ffffffff81a87c50 T drm_atomic_bridge_chain_enable +ffffffff81a87d80 T drm_atomic_bridge_chain_check +ffffffff81a88180 T drm_bridge_detect +ffffffff81a881e0 T drm_bridge_get_modes +ffffffff81a88240 T drm_bridge_edid_read +ffffffff81a88310 T drm_bridge_get_edid +ffffffff81a88370 T drm_bridge_hpd_enable +ffffffff81a88450 T drm_bridge_hpd_disable +ffffffff81a884f0 T drm_bridge_hpd_notify +ffffffff81a88550 t drm_bridge_atomic_duplicate_priv_state +ffffffff81a88570 t drm_bridge_atomic_destroy_priv_state +ffffffff81a88590 t select_bus_fmt_recursive +ffffffff81a89000 T drm_buddy_init +ffffffff81a894c0 T drm_buddy_fini +ffffffff81a895d0 T drm_get_buddy +ffffffff81a89610 T drm_buddy_free_block +ffffffff81a89660 t __drm_buddy_free +ffffffff81a897c0 T drm_buddy_free_list +ffffffff81a898a0 T drm_buddy_block_trim +ffffffff81a89b00 t __alloc_range +ffffffff81a89e00 T drm_buddy_alloc_blocks +ffffffff81a8a4e0 t __drm_buddy_alloc_range +ffffffff81a8a580 T drm_buddy_block_print +ffffffff81a8a5c0 T drm_buddy_print +ffffffff81a8a740 T drm_buddy_module_exit +ffffffff81a8a760 T drm_buddy_module_init +ffffffff81a8a7d0 t split_block +ffffffff81a8b000 T drm_clflush_pages +ffffffff81a8b0e0 T drm_clflush_sg +ffffffff81a8b200 T drm_clflush_virt_range +ffffffff81a8b2a0 T drm_need_swiotlb +ffffffff81a8b2d0 T drm_memcpy_from_wc +ffffffff81a8b820 T drm_memcpy_init_early +ffffffff81a8c000 T drm_client_init +ffffffff81a8c150 T drm_client_register +ffffffff81a8c210 T drm_client_release +ffffffff81a8c2e0 T drm_client_dev_unregister +ffffffff81a8c400 T drm_client_dev_hotplug +ffffffff81a8c540 T drm_client_dev_restore +ffffffff81a8c640 T drm_client_buffer_vmap +ffffffff81a8c6c0 T drm_client_buffer_vunmap +ffffffff81a8c6e0 T drm_client_framebuffer_create +ffffffff81a8ca20 T drm_client_framebuffer_delete +ffffffff81a8cb20 T drm_client_framebuffer_flush +ffffffff81a8d000 T drm_client_modeset_create +ffffffff81a8d150 T drm_client_modeset_free +ffffffff81a8d280 T drm_client_modeset_probe +ffffffff81a8ecb0 t drm_client_pick_crtcs +ffffffff81a8efd0 T drm_client_rotation +ffffffff81a8f180 T drm_client_modeset_check +ffffffff81a8f230 t drm_client_modeset_commit_atomic +ffffffff81a8f4a0 T drm_client_modeset_commit_locked +ffffffff81a8f690 T drm_client_modeset_commit +ffffffff81a8f720 T drm_client_modeset_dpms +ffffffff81a8f9e0 t drm_connector_pick_cmdline_mode +ffffffff81a90000 T drm_color_ctm_s31_32_to_qm_n +ffffffff81a900d0 T drm_crtc_enable_color_mgmt +ffffffff81a901c0 T drm_mode_crtc_set_gamma_size +ffffffff81a902f0 T drm_mode_gamma_set_ioctl +ffffffff81a908b0 T drm_mode_gamma_get_ioctl +ffffffff81a90a20 T drm_get_color_encoding_name +ffffffff81a90aa0 T drm_get_color_range_name +ffffffff81a90b20 T drm_plane_create_color_properties +ffffffff81a90db0 T drm_color_lut_check +ffffffff81a91000 T drm_connector_ida_init +ffffffff81a911c0 T drm_connector_ida_destroy +ffffffff81a91380 T drm_get_connector_type_name +ffffffff81a913c0 T drm_connector_free_work_fn +ffffffff81a914a0 T drm_connector_init +ffffffff81a91530 t __drm_connector_init +ffffffff81a91930 T drm_connector_init_with_ddc +ffffffff81a919c0 T drmm_connector_init +ffffffff81a91a90 t drm_connector_cleanup_action +ffffffff81a91ab0 T drm_connector_attach_edid_property +ffffffff81a91ad0 T drm_connector_attach_encoder +ffffffff81a91b60 T drm_connector_has_possible_encoder +ffffffff81a91ba0 T drm_connector_cleanup +ffffffff81a91f90 T drm_connector_unregister +ffffffff81a92040 T drm_mode_put_tile_group +ffffffff81a920f0 T drm_connector_register +ffffffff81a92220 T drm_connector_unregister_all +ffffffff81a92400 T drm_connector_list_iter_begin +ffffffff81a92440 T drm_connector_list_iter_next +ffffffff81a92560 T drm_connector_list_iter_end +ffffffff81a92640 T drm_connector_register_all +ffffffff81a92800 T drm_get_connector_status_name +ffffffff81a92850 T drm_get_connector_force_name +ffffffff81a92890 T drm_get_subpixel_order_name +ffffffff81a928d0 T drm_get_dpms_name +ffffffff81a92910 T drm_display_info_set_bus_formats +ffffffff81a92a00 T drm_get_dvi_i_select_name +ffffffff81a92a60 T drm_get_dvi_i_subconnector_name +ffffffff81a92ac0 T drm_get_tv_mode_name +ffffffff81a92b00 T drm_get_tv_mode_from_name +ffffffff81a92d20 T drm_get_tv_select_name +ffffffff81a92d80 T drm_get_tv_subconnector_name +ffffffff81a92de0 T drm_get_dp_subconnector_name +ffffffff81a92e70 T drm_get_colorspace_name +ffffffff81a92eb0 T drm_connector_create_standard_properties +ffffffff81a93070 T drm_mode_create_dvi_i_properties +ffffffff81a93120 T drm_connector_attach_dp_subconnector_property +ffffffff81a93190 T drm_connector_attach_content_type_property +ffffffff81a93230 T drm_mode_create_content_type_property +ffffffff81a932c0 T drm_connector_attach_tv_margin_properties +ffffffff81a93340 T drm_mode_create_tv_margin_properties +ffffffff81a93480 T drm_mode_create_tv_properties_legacy +ffffffff81a93730 T drm_mode_create_tv_properties +ffffffff81a93920 T drm_mode_create_scaling_mode_property +ffffffff81a93990 T drm_connector_attach_vrr_capable_property +ffffffff81a93a30 T drm_connector_attach_scaling_mode_property +ffffffff81a93c50 T drm_mode_create_aspect_ratio_property +ffffffff81a93ce0 T drm_mode_create_hdmi_colorspace_property +ffffffff81a93d00 t drm_mode_create_colorspace_property +ffffffff81a93e50 T drm_mode_create_dp_colorspace_property +ffffffff81a93e80 T drm_mode_create_suggested_offset_properties +ffffffff81a93f60 T drm_connector_set_path_property +ffffffff81a93fc0 T drm_connector_set_tile_property +ffffffff81a94130 T drm_connector_set_link_status_property +ffffffff81a94190 T drm_connector_attach_max_bpc_property +ffffffff81a94260 T drm_connector_attach_hdr_output_metadata_property +ffffffff81a942b0 T drm_connector_attach_colorspace_property +ffffffff81a94300 T drm_connector_atomic_hdr_metadata_equal +ffffffff81a94380 T drm_connector_set_vrr_capable_property +ffffffff81a943d0 T drm_connector_set_panel_orientation +ffffffff81a944a0 T drm_connector_set_panel_orientation_with_quirk +ffffffff81a945a0 T drm_connector_set_orientation_from_panel +ffffffff81a946a0 T drm_connector_create_privacy_screen_properties +ffffffff81a94750 T drm_connector_attach_privacy_screen_properties +ffffffff81a947d0 T drm_connector_attach_privacy_screen_provider +ffffffff81a94900 t drm_connector_privacy_screen_notifier +ffffffff81a949d0 T drm_connector_update_privacy_screen +ffffffff81a94a40 T drm_connector_set_obj_prop +ffffffff81a94b50 T drm_connector_property_set_ioctl +ffffffff81a94bb0 T drm_mode_getconnector +ffffffff81a95130 T drm_connector_find_by_fwnode +ffffffff81a951f0 T drm_connector_oob_hotplug_event +ffffffff81a952f0 T drm_mode_get_tile_group +ffffffff81a95400 T drm_mode_create_tile_group +ffffffff81a954f0 t drm_connector_free +ffffffff81a95540 t kasprintf +ffffffff81a96000 T drm_crtc_from_index +ffffffff81a96060 T drm_crtc_force_disable +ffffffff81a961b0 T drm_mode_set_config_internal +ffffffff81a96230 T drm_crtc_register_all +ffffffff81a962c0 T drm_crtc_unregister_all +ffffffff81a96340 T drm_crtc_create_fence +ffffffff81a963d0 T drm_crtc_init_with_planes +ffffffff81a964b0 t __drm_crtc_init_with_planes +ffffffff81a96940 T drmm_crtc_init_with_planes +ffffffff81a96a60 T __drmm_crtc_alloc_with_planes +ffffffff81a96c00 T drm_crtc_cleanup +ffffffff81a96d40 T drm_mode_getcrtc +ffffffff81a96f20 t __drm_mode_set_config_internal +ffffffff81a970e0 T drm_crtc_check_viewport +ffffffff81a971a0 T drm_mode_setcrtc +ffffffff81a97a40 T drm_mode_crtc_set_obj_prop +ffffffff81a97ad0 T drm_crtc_create_scaling_filter_property +ffffffff81a97b50 t drm_crtc_fence_get_driver_name +ffffffff81a97bd0 t drm_crtc_fence_get_timeline_name +ffffffff81a97c40 t kasprintf +ffffffff81a97d20 t drmm_crtc_init_with_planes_cleanup +ffffffff81a98000 T drm_helper_encoder_in_use +ffffffff81a981b0 T drm_helper_crtc_in_use +ffffffff81a982e0 T drm_helper_disable_unused_functions +ffffffff81a98380 t __drm_helper_disable_unused_functions +ffffffff81a984c0 T drm_crtc_helper_set_mode +ffffffff81a98a40 T drm_crtc_helper_atomic_check +ffffffff81a98a90 T drm_connector_get_single_encoder +ffffffff81a98b70 T drm_crtc_helper_set_config +ffffffff81a999a0 T drm_helper_connector_dpms +ffffffff81a99d00 T drm_helper_resume_force_mode +ffffffff81a9a090 T drm_helper_force_disable_all +ffffffff81a9b000 T drm_atomic_helper_check_plane_damage +ffffffff81a9b0b0 T drm_atomic_helper_dirtyfb +ffffffff81a9b3f0 T drm_atomic_helper_damage_iter_init +ffffffff81a9b550 T drm_atomic_helper_damage_iter_next +ffffffff81a9b5f0 T drm_atomic_helper_damage_merged +ffffffff81a9c000 T displayid_iter_edid_begin +ffffffff81a9c050 T __displayid_iter_next +ffffffff81a9c320 T displayid_iter_end +ffffffff81a9c370 T displayid_version +ffffffff81a9c3a0 T displayid_primary_use +ffffffff81a9d000 T drm_mode_create_dumb +ffffffff81a9d0e0 T drm_mode_create_dumb_ioctl +ffffffff81a9d1c0 T drm_mode_mmap_dumb_ioctl +ffffffff81a9d230 T drm_mode_destroy_dumb +ffffffff81a9d280 T drm_mode_destroy_dumb_ioctl +ffffffff81a9e000 T drm_edid_header_is_valid +ffffffff81a9e080 T drm_edid_are_equal +ffffffff81a9e100 T drm_edid_block_valid +ffffffff81a9e370 t edid_block_check +ffffffff81a9e4b0 t edid_block_status_print +ffffffff81a9e5a0 T drm_edid_is_valid +ffffffff81a9e620 T drm_edid_valid +ffffffff81a9e760 t drm_edid_block_count +ffffffff81a9e8a0 T drm_edid_override_show +ffffffff81a9e900 T drm_edid_override_set +ffffffff81a9eb10 T drm_edid_alloc +ffffffff81a9ebf0 T drm_edid_free +ffffffff81a9ec50 T drm_edid_override_reset +ffffffff81a9ed30 T drm_edid_override_connector_update +ffffffff81a9ee30 t drm_edid_override_get +ffffffff81a9ef50 T drm_edid_connector_update +ffffffff81a9f430 T drm_edid_connector_add_modes +ffffffff81a9f590 T drm_do_get_edid +ffffffff81a9f5b0 t _drm_do_get_edid +ffffffff81a9fab0 T drm_edid_raw +ffffffff81a9fb40 T drm_edid_dup +ffffffff81a9fc30 T drm_probe_ddc +ffffffff81a9fd40 t drm_do_probe_ddc_edid +ffffffff81a9fea0 T drm_get_edid +ffffffff81aa0030 T drm_connector_update_edid_property +ffffffff81aa00a0 T drm_edid_read_custom +ffffffff81aa01c0 T drm_edid_read_ddc +ffffffff81aa0300 T drm_edid_read +ffffffff81aa0390 T drm_edid_get_panel_id +ffffffff81aa0560 t edid_block_read +ffffffff81aa0840 T drm_get_edid_switcheroo +ffffffff81aa0890 T drm_edid_read_switcheroo +ffffffff81aa08e0 T drm_edid_duplicate +ffffffff81aa0970 T drm_mode_find_dmt +ffffffff81aa0aa0 T drm_mode_fixup_1366x768 +ffffffff81aa0af0 T drm_find_edid_extension +ffffffff81aa0ba0 T drm_match_cea_mode +ffffffff81aa0e40 T drm_display_mode_from_cea_vic +ffffffff81aa0eb0 T drm_edid_get_monitor_name +ffffffff81aa0f70 t get_monitor_name +ffffffff81aa13e0 T drm_edid_to_sad +ffffffff81aa1610 T drm_edid_to_speaker_allocation +ffffffff81aa17f0 T drm_av_sync_delay +ffffffff81aa18a0 T drm_detect_hdmi_monitor +ffffffff81aa19e0 T drm_detect_monitor_audio +ffffffff81aa1b90 T drm_default_rgb_quant_range +ffffffff81aa1be0 t update_display_info +ffffffff81aa3590 t _drm_edid_connector_add_modes +ffffffff81aa4d50 T drm_add_edid_modes +ffffffff81aa4e70 T drm_add_modes_noedid +ffffffff81aa4f80 T drm_set_preferred_mode +ffffffff81aa4fe0 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff81aa52d0 T drm_hdmi_avi_infoframe_quant_range +ffffffff81aa5370 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff81aa5450 t connector_bad_edid +ffffffff81aa5640 t edid_filter_invalid_blocks +ffffffff81aa5800 t drm_for_each_detailed_block +ffffffff81aa59f0 t __cea_db_iter_next +ffffffff81aa5c10 t get_monitor_range +ffffffff81aa5cb0 t do_detailed_mode +ffffffff81aa6750 t do_cvt_mode +ffffffff81aa69e0 t drm_mode_std +ffffffff81aa7430 t do_standard_modes +ffffffff81aa75e0 t drm_monitor_supports_rb +ffffffff81aa79f0 t drm_gtf2_mode +ffffffff81aa87f0 t drm_gtf2_hbreak +ffffffff81aa8b60 t do_established_modes +ffffffff81aa8d80 t drm_match_hdmi_mode +ffffffff81aa8f10 t do_inferred_modes +ffffffff81aa9680 t mode_in_range +ffffffff81aaa000 T drm_encoder_register_all +ffffffff81aaa090 T drm_encoder_unregister_all +ffffffff81aaa110 T drm_encoder_init +ffffffff81aaa1e0 t __drm_encoder_init +ffffffff81aaa3e0 T drm_encoder_cleanup +ffffffff81aaa520 T __drmm_encoder_alloc +ffffffff81aaa660 T drmm_encoder_init +ffffffff81aaa750 T drm_mode_getencoder +ffffffff81aaa910 t kasprintf +ffffffff81aaa9f0 t drmm_encoder_alloc_release +ffffffff81aab000 T drm_i2c_encoder_dpms +ffffffff81aab020 T drm_i2c_encoder_mode_fixup +ffffffff81aab060 T drm_i2c_encoder_prepare +ffffffff81aab080 T drm_i2c_encoder_commit +ffffffff81aab0a0 T drm_i2c_encoder_mode_set +ffffffff81aab0c0 T drm_i2c_encoder_detect +ffffffff81aab0e0 T drm_i2c_encoder_save +ffffffff81aab100 T drm_i2c_encoder_restore +ffffffff81aac000 T drm_exec_init +ffffffff81aac080 T drm_exec_fini +ffffffff81aac110 t drm_exec_unlock_all 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drm_fb_helper_unregister_info +ffffffff81aad9f0 T drm_fb_helper_fini +ffffffff81aadb00 T drm_fb_helper_set_suspend +ffffffff81aadb30 T drm_fb_helper_set_suspend_unlocked +ffffffff81aadb60 T drm_fb_helper_set_par +ffffffff81aadc40 T drm_fb_helper_pan_display +ffffffff81aadd30 T drm_fb_helper_fill_info +ffffffff81aade00 T drm_fb_helper_initial_config +ffffffff81aade40 t __drm_fb_helper_initial_config_and_unlock +ffffffff81aae540 T drm_fb_helper_hotplug_event +ffffffff81aae6c0 t drm_setup_crtcs_fb +ffffffff81aae840 T drm_fb_helper_lastclose +ffffffff81aae910 T drm_fb_helper_output_poll_changed +ffffffff81aaf000 T drm_fb_dma_get_gem_obj +ffffffff81ab0000 T drm_fbdev_dma_setup +ffffffff81ab01d0 t drm_fbdev_dma_helper_fb_probe +ffffffff81ab0480 t drm_fbdev_dma_client_unregister +ffffffff81ab04e0 t drm_fbdev_dma_client_restore +ffffffff81ab0530 t drm_fbdev_dma_client_hotplug +ffffffff81ab1000 T drm_fbdev_generic_setup +ffffffff81ab11d0 t drm_fbdev_generic_helper_fb_probe +ffffffff81ab1370 t drm_fbdev_generic_helper_fb_dirty +ffffffff81ab1670 t drm_fbdev_generic_client_unregister +ffffffff81ab16d0 t drm_fbdev_generic_client_restore +ffffffff81ab1720 t drm_fbdev_generic_client_hotplug +ffffffff81ab2000 T drm_dev_needs_global_mutex +ffffffff81ab2060 T drm_file_alloc +ffffffff81ab2350 T drm_file_free +ffffffff81ab25e0 T drm_lastclose +ffffffff81ab2660 T drm_release +ffffffff81ab26c0 T drm_file_update_pid +ffffffff81ab2710 T drm_release_noglobal +ffffffff81ab2770 T drm_read +ffffffff81ab27d0 T drm_event_reserve_init_locked +ffffffff81ab2850 T drm_event_reserve_init +ffffffff81ab2920 T drm_event_cancel_free +ffffffff81ab29b0 T drm_send_event_timestamp_locked +ffffffff81ab29c0 t drm_send_event_helper +ffffffff81ab2be0 T drm_send_event_locked +ffffffff81ab2c00 T drm_send_event +ffffffff81ab2c60 T drm_print_memory_stats +ffffffff81ab2f00 T drm_show_memory_stats +ffffffff81ab3180 T drm_show_fdinfo +ffffffff81ab31a0 T mock_drm_getfile +ffffffff81ab4000 T drm_flip_work_allocate_task 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drm_fb_xrgb8888_to_rgba5551_line +ffffffff81ab60d0 T drm_fb_xrgb8888_to_rgb888 +ffffffff81ab6130 t drm_fb_xrgb8888_to_rgb888_line +ffffffff81ab61c0 T drm_fb_xrgb8888_to_argb8888 +ffffffff81ab6220 t drm_fb_xrgb8888_to_argb8888_line +ffffffff81ab62f0 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff81ab6350 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff81ab63d0 T drm_fb_xrgb8888_to_argb2101010 +ffffffff81ab6430 t drm_fb_xrgb8888_to_argb2101010_line +ffffffff81ab64c0 T drm_fb_xrgb8888_to_gray8 +ffffffff81ab6520 t drm_fb_xrgb8888_to_gray8_line +ffffffff81ab6590 T drm_fb_blit +ffffffff81ab6c90 T drm_fb_xrgb8888_to_mono +ffffffff81ab7030 T drm_fb_build_fourcc_list +ffffffff81ab7340 t drm_fb_xrgb8888_to_xbgr8888_line +ffffffff81ab7420 t drm_fb_xrgb8888_to_abgr8888_line +ffffffff81ab8000 T drm_mode_legacy_fb_format +ffffffff81ab80f0 T drm_driver_legacy_fb_format +ffffffff81ab81f0 T __drm_format_info +ffffffff81ab8270 T drm_format_info +ffffffff81ab8320 T drm_get_format_info +ffffffff81ab8410 T drm_format_info_block_width +ffffffff81ab8460 T drm_format_info_block_height +ffffffff81ab84b0 T drm_format_info_bpp +ffffffff81ab8530 T drm_format_info_min_pitch +ffffffff81ab9000 T drm_framebuffer_check_src_coords +ffffffff81ab9130 T drm_mode_addfb +ffffffff81ab9380 T drm_mode_addfb2 +ffffffff81ab94a0 T drm_mode_addfb_ioctl +ffffffff81ab94c0 T drm_internal_framebuffer_create +ffffffff81ab9b00 T drm_mode_addfb2_ioctl +ffffffff81ab9c20 T drm_mode_rmfb +ffffffff81ab9e60 T drm_framebuffer_lookup +ffffffff81ab9eb0 t drm_mode_rmfb_work_fn +ffffffff81ab9f80 T drm_mode_rmfb_ioctl +ffffffff81ab9fa0 T drm_mode_getfb +ffffffff81aba120 T drm_mode_getfb2_ioctl +ffffffff81aba510 T drm_mode_dirtyfb_ioctl +ffffffff81aba6d0 T drm_fb_release +ffffffff81aba800 T drm_framebuffer_free +ffffffff81aba840 T drm_framebuffer_init +ffffffff81aba9d0 T drm_framebuffer_unregister_private +ffffffff81abaa10 T drm_framebuffer_cleanup +ffffffff81abaa80 T drm_framebuffer_remove +ffffffff81abb000 T drm_framebuffer_plane_width +ffffffff81abb050 T drm_framebuffer_plane_height +ffffffff81abb0a0 T drm_framebuffer_print_info +ffffffff81abc000 T drm_ref +ffffffff81abc030 T drm_unref +ffffffff81abc0b0 T drm_fault +ffffffff81abc2d0 T drm_flush +ffffffff81abc300 T udv_attach_drm +ffffffff81abc560 T drm_gem_init +ffffffff81abc640 t drm_gem_init_release +ffffffff81abc660 T drm_gem_object_init +ffffffff81abc810 T drm_gem_private_object_init +ffffffff81abc950 T drm_gem_private_object_fini +ffffffff81abc9b0 T drm_gem_handle_delete +ffffffff81abcaf0 t drm_gem_object_release_handle +ffffffff81abcb90 T drm_gem_dumb_map_offset +ffffffff81abccf0 T drm_gem_object_lookup +ffffffff81abcd80 T drm_gem_create_mmap_offset +ffffffff81abcdb0 T drm_gem_handle_create_tail +ffffffff81abcfa0 t drm_gem_object_handle_put_unlocked +ffffffff81abd110 T drm_gem_handle_create +ffffffff81abd160 T drm_gem_free_mmap_offset +ffffffff81abd190 T drm_gem_create_mmap_offset_size +ffffffff81abd1c0 T drm_gem_get_pages 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drm_getclient +ffffffff81ac4140 T drm_noop +ffffffff81ac41a0 T drm_invalid_op +ffffffff81ac41d0 T drm_version +ffffffff81ac4440 T pledge_ioctl_drm +ffffffff81ac4520 T drm_ioctl_kernel +ffffffff81ac4580 T drm_ioctl +ffffffff81ac45e0 T drm_ioctl_flags +ffffffff81ac4630 T drm_do_ioctl +ffffffff81ac4a00 T drmioctl +ffffffff81ac4b90 t drm_getstats +ffffffff81ac4be0 t drm_setversion +ffffffff81ac4d70 t drm_getcap +ffffffff81ac4f30 t drm_setclientcap +ffffffff81ac6000 T tasklet_unlock_wait +ffffffff81ac6090 T tasklet_unlock_spin_wait +ffffffff81ac6120 T tasklet_run +ffffffff81ac6180 T set_current_state +ffffffff81ac6220 T __set_current_state +ffffffff81ac62b0 T schedule +ffffffff81ac62f0 T schedule_timeout +ffffffff81ac63b0 T schedule_timeout_uninterruptible +ffffffff81ac6420 T wake_up_process +ffffffff81ac64a0 T autoremove_wake_function +ffffffff81ac6540 T prepare_to_wait +ffffffff81ac6640 T finish_wait +ffffffff81ac6700 T flush_workqueue +ffffffff81ac6740 T flush_work +ffffffff81ac6790 T flush_delayed_work +ffffffff81ac6830 T kthread_func +ffffffff81ac6880 T kthread_run +ffffffff81ac6970 T kthread_create_worker +ffffffff81ac6a50 T kthread_destroy_worker +ffffffff81ac6a90 T kthread_init_work +ffffffff81ac6ab0 T kthread_queue_work +ffffffff81ac6b00 T kthread_cancel_work_sync +ffffffff81ac6b50 T kthread_flush_work +ffffffff81ac6b90 T kthread_flush_worker +ffffffff81ac6bd0 T kthread_lookup +ffffffff81ac6c50 T kthread_should_park +ffffffff81ac6ce0 T kthread_parkme +ffffffff81ac6dc0 T kthread_park +ffffffff81ac6ec0 T kthread_unpark +ffffffff81ac6f30 T kthread_should_stop +ffffffff81ac6fc0 T kthread_stop +ffffffff81ac7120 T dmi_match +ffffffff81ac71f0 T dmi_first_match +ffffffff81ac7310 T dmi_get_system_info +ffffffff81ac7380 T dmi_check_system +ffffffff81ac74b0 T alloc_pages +ffffffff81ac7590 T __free_pages +ffffffff81ac7700 T __pagevec_release +ffffffff81ac77b0 T kmap +ffffffff81ac77f0 T kunmap_va +ffffffff81ac7810 T kmap_atomic_prot +ffffffff81ac78a0 T kunmap_atomic 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idr_tree_SPLAY +ffffffff81ac9100 T idr_tree_SPLAY_MINMAX +ffffffff81ac91f0 T ida_init +ffffffff81ac9220 T ida_destroy +ffffffff81ac9230 T ida_simple_get +ffffffff81ac9250 T ida_simple_remove +ffffffff81ac9270 T ida_alloc_min +ffffffff81ac9290 T ida_alloc_max +ffffffff81ac92b0 T ida_free +ffffffff81ac92d0 T xarray_cmp +ffffffff81ac9310 T xarray_tree_SPLAY_INSERT +ffffffff81ac93c0 T xarray_tree_SPLAY +ffffffff81ac94f0 T xarray_tree_SPLAY_REMOVE +ffffffff81ac9590 T xarray_tree_SPLAY_MINMAX +ffffffff81ac9680 T xa_init_flags +ffffffff81ac96e0 T xa_destroy +ffffffff81ac9830 T __xa_alloc +ffffffff81ac99e0 T __xa_alloc_cyclic +ffffffff81ac9a40 T __xa_erase +ffffffff81ac9b30 T __xa_load +ffffffff81ac9bb0 T __xa_store +ffffffff81ac9d60 T xa_get_next +ffffffff81ac9e90 T sg_alloc_table +ffffffff81ac9f20 T sg_free_table +ffffffff81ac9f80 T sg_copy_from_buffer +ffffffff81ac9fb0 T i2c_master_xfer +ffffffff81aca100 T __i2c_transfer +ffffffff81aca1c0 T i2c_transfer +ffffffff81aca2a0 T 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dma_fence_chain_signaled +ffffffff81acd340 t dma_fence_chain_release +ffffffff81acd4a0 T dma_fence_is_container +ffffffff81acd4f0 T dmabuf_read +ffffffff81acd520 T dmabuf_write +ffffffff81acd550 T dmabuf_ioctl +ffffffff81acd580 T dmabuf_kqfilter +ffffffff81acd5b0 T dmabuf_stat +ffffffff81acd670 T dmabuf_close +ffffffff81acd700 T dmabuf_seek +ffffffff81acd7a0 T dma_buf_export +ffffffff81acd860 T dma_buf_get +ffffffff81acd900 T dma_buf_put +ffffffff81acd9b0 T dma_buf_fd +ffffffff81acdb00 T get_dma_buf +ffffffff81acdb50 T pcie_get_speed_cap +ffffffff81acdd40 T printk +ffffffff81acddf0 T pcie_get_width_cap +ffffffff81acdf10 T pcie_aspm_enabled +ffffffff81acdfb0 T wait_on_bit +ffffffff81ace090 T wait_on_bit_timeout +ffffffff81ace160 T wake_up_bit +ffffffff81ace1b0 T clear_and_wake_up_bit +ffffffff81ace220 T bit_waitqueue +ffffffff81ace250 T __var_waitqueue +ffffffff81ace280 T drm_linux_init +ffffffff81ace4a0 T drm_linux_exit +ffffffff81ace540 T pci_resize_resource +ffffffff81ace6b0 T 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drm_mode_probed_add +ffffffff81ad92f0 T drm_analog_tv_mode +ffffffff81ad9c50 T drm_cvt_mode +ffffffff81ada0e0 T drm_mode_set_name +ffffffff81ada130 T drm_gtf_mode_complex +ffffffff81ada440 T drm_gtf_mode +ffffffff81ada4a0 T drm_mode_get_hv_timing +ffffffff81ada4f0 T drm_mode_init +ffffffff81ada5c0 T drm_mode_set_crtcinfo +ffffffff81ada780 T drm_mode_copy +ffffffff81ada7e0 T drm_mode_duplicate +ffffffff81ada870 T drm_mode_match +ffffffff81adaa10 T drm_mode_equal +ffffffff81adaa30 T drm_mode_equal_no_clocks +ffffffff81adaa50 T drm_mode_equal_no_clocks_no_stereo +ffffffff81adab10 T drm_mode_validate_driver +ffffffff81adac00 T drm_mode_validate_size +ffffffff81adac50 T drm_mode_validate_ycbcr420 +ffffffff81adacc0 T drm_mode_is_420_only +ffffffff81adad20 T drm_get_mode_status_name +ffffffff81adada0 T drm_mode_prune_invalid +ffffffff81adb070 T drm_mode_sort +ffffffff81adb0a0 t drm_mode_compare +ffffffff81adb240 T drm_connector_list_update +ffffffff81adb430 T drm_mode_parse_command_line_for_connector +ffffffff81adb460 T drm_mode_create_from_cmdline_mode +ffffffff81adb680 T drm_mode_convert_to_umode +ffffffff81adb820 T drm_mode_convert_umode +ffffffff81adba50 T drm_mode_is_420_also +ffffffff81adbab0 T drm_mode_is_420 +ffffffff81adc000 T drm_helper_move_panel_connectors_to_head +ffffffff81adc100 T drm_helper_mode_fill_fb_struct +ffffffff81adc1d0 T drm_crtc_init +ffffffff81adc2c0 T drm_mode_config_helper_suspend +ffffffff81adc380 T drm_mode_config_helper_resume +ffffffff81add000 T drm_modeset_lock_all +ffffffff81add2f0 T drm_modeset_acquire_init +ffffffff81add380 T drm_modeset_lock_all_ctx +ffffffff81add480 T drm_modeset_backoff +ffffffff81add560 T drm_modeset_acquire_fini +ffffffff81add590 T drm_warn_on_modeset_not_all_locked +ffffffff81add710 T drm_modeset_unlock_all +ffffffff81add810 T drm_modeset_drop_locks +ffffffff81add8a0 T drm_modeset_unlock +ffffffff81add980 t modeset_lock +ffffffff81addd20 T drm_modeset_lock_init +ffffffff81addd90 T drm_modeset_lock +ffffffff81added0 T drm_modeset_lock_single_interruptible +ffffffff81ade020 t __ww_mutex_lock +ffffffff81adf000 T drm_mtrr_add +ffffffff81adf080 T drm_mtrr_del +ffffffff81ae0000 T drm_panel_init +ffffffff81ae0090 T drm_panel_add +ffffffff81ae00f0 T drm_panel_remove +ffffffff81ae0150 T drm_panel_prepare +ffffffff81ae0280 T drm_panel_unprepare +ffffffff81ae03c0 T drm_panel_enable +ffffffff81ae04d0 T drm_panel_disable +ffffffff81ae05d0 T drm_panel_get_modes +ffffffff81ae0630 T drm_is_panel_follower +ffffffff81ae0680 T drm_panel_add_follower +ffffffff81ae06e0 T drm_panel_remove_follower +ffffffff81ae0700 T devm_drm_panel_add_follower +ffffffff81ae0760 T drm_panel_of_backlight +ffffffff81ae1000 T drm_get_panel_orientation_quirk +ffffffff81ae2000 T drm_pci_set_busid +ffffffff81ae20b0 t kasprintf +ffffffff81ae3000 T drm_universal_plane_init +ffffffff81ae3100 t __drm_universal_plane_init +ffffffff81ae36b0 T __drmm_universal_plane_alloc +ffffffff81ae3820 t drmm_universal_plane_alloc_release +ffffffff81ae3870 T __drm_universal_plane_alloc +ffffffff81ae39d0 T drm_plane_register_all +ffffffff81ae3ae0 T drm_plane_unregister_all +ffffffff81ae3b60 T drm_plane_cleanup +ffffffff81ae3ce0 T drm_plane_from_index +ffffffff81ae3d40 T drm_plane_force_disable +ffffffff81ae3e80 T drm_mode_plane_set_obj_prop +ffffffff81ae3f10 T drm_mode_getplane_res +ffffffff81ae4050 T drm_mode_getplane +ffffffff81ae41d0 T drm_plane_check_pixel_format +ffffffff81ae4290 T drm_any_plane_has_format +ffffffff81ae43b0 T drm_mode_setplane +ffffffff81ae4720 T drm_mode_cursor_ioctl +ffffffff81ae4790 t drm_mode_cursor_common +ffffffff81ae4d60 T drm_mode_cursor2_ioctl +ffffffff81ae4d80 T drm_mode_page_flip_ioctl +ffffffff81ae53c0 T drm_plane_enable_fb_damage_clips +ffffffff81ae53e0 T drm_plane_get_damage_clips_count +ffffffff81ae5420 T __drm_plane_get_damage_clips +ffffffff81ae5460 T drm_plane_get_damage_clips +ffffffff81ae5500 T drm_create_scaling_filter_prop +ffffffff81ae5680 T drm_plane_create_scaling_filter_property +ffffffff81ae5700 t kvasprintf +ffffffff81ae57c0 t kasprintf +ffffffff81ae58a0 t create_in_format_blob +ffffffff81ae5ab0 t __setplane_atomic +ffffffff81ae5c60 t __setplane_internal +ffffffff81ae5ea0 t __setplane_check +ffffffff81ae7000 T drm_plane_helper_update_primary +ffffffff81ae7520 t get_connectors_for_crtc +ffffffff81ae7660 T drm_plane_helper_disable_primary +ffffffff81ae7720 T drm_plane_helper_destroy +ffffffff81ae7760 T drm_plane_helper_atomic_check +ffffffff81ae8000 T drm_prime_remove_buf_handle +ffffffff81ae80d0 T drm_prime_init_file_private +ffffffff81ae8130 T drm_prime_destroy_file_private +ffffffff81ae8190 T drm_gem_dmabuf_export +ffffffff81ae8210 T drm_gem_dmabuf_release +ffffffff81ae8250 T drm_gem_prime_fd_to_handle +ffffffff81ae84e0 T drm_gem_prime_import +ffffffff81ae8550 t drm_prime_add_buf_handle +ffffffff81ae86b0 T drm_prime_fd_to_handle_ioctl +ffffffff81ae86e0 T drm_gem_prime_handle_to_fd +ffffffff81ae8990 T drm_prime_handle_to_fd_ioctl +ffffffff81ae8a00 T drm_gem_map_attach +ffffffff81ae8a50 T drm_gem_map_detach +ffffffff81ae8a70 T drm_gem_dmabuf_vmap +ffffffff81ae8a90 T drm_gem_dmabuf_vunmap +ffffffff81ae8ab0 T drm_gem_prime_mmap +ffffffff81ae8b10 T drm_prime_pages_to_sg +ffffffff81ae8b70 T drm_prime_get_contiguous_size +ffffffff81ae8bc0 T drm_gem_prime_export +ffffffff81ae8c60 T drm_gem_prime_import_dev +ffffffff81ae8cd0 T drm_prime_sg_to_page_array +ffffffff81ae8d30 T drm_prime_sg_to_dma_addr_array +ffffffff81ae8d90 T drm_prime_gem_destroy +ffffffff81ae9000 T __drm_puts_coredump +ffffffff81ae9110 T __drm_printfn_coredump +ffffffff81ae9340 T __drm_puts_seq_file +ffffffff81ae9370 T __drm_printfn_seq_file +ffffffff81ae93a0 T __drm_printfn_info +ffffffff81ae93d0 T __drm_printfn_debug +ffffffff81ae9400 T __drm_printfn_err +ffffffff81ae9440 T drm_puts +ffffffff81ae9470 T drm_printf +ffffffff81ae9500 T drm_print_bits +ffffffff81ae9760 T drm_dev_printk +ffffffff81ae9800 T __drm_dev_dbg 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drm_crtc_helper_mode_valid_fixed +ffffffff81aebb70 T drm_connector_helper_get_modes_from_ddc +ffffffff81aebc20 T drm_connector_helper_get_modes_fixed +ffffffff81aebdb0 T drm_connector_helper_get_modes +ffffffff81aebe40 T drm_connector_helper_tv_get_modes +ffffffff81aec0b0 t __delayed_work_tick +ffffffff81aed000 T drm_property_create +ffffffff81aed220 T drm_property_create_enum +ffffffff81aed2e0 T drm_property_add_enum +ffffffff81aed510 T drm_property_destroy +ffffffff81aed5d0 T drm_property_create_bitmask +ffffffff81aed710 T drm_property_create_range +ffffffff81aed780 T drm_property_create_signed_range +ffffffff81aed7f0 T drm_property_create_object +ffffffff81aed8a0 T drm_property_create_bool +ffffffff81aed910 T drm_mode_getproperty_ioctl +ffffffff81aedb90 T drm_property_create_blob +ffffffff81aedd00 t drm_property_free_blob +ffffffff81aedd90 T drm_property_blob_put +ffffffff81aeddd0 T drm_property_destroy_user_blobs +ffffffff81aede60 T drm_property_blob_get +ffffffff81aedeb0 T drm_property_lookup_blob +ffffffff81aeded0 T drm_property_replace_global_blob +ffffffff81aee050 T drm_property_replace_blob +ffffffff81aee0c0 T drm_mode_getblob_ioctl +ffffffff81aee1a0 T drm_mode_createblob_ioctl +ffffffff81aee2d0 T drm_mode_destroyblob_ioctl +ffffffff81aee410 T drm_property_change_valid_get +ffffffff81aee680 T drm_property_change_valid_put +ffffffff81aef000 T drm_rect_intersect +ffffffff81aef080 T drm_rect_clip_scaled +ffffffff81aef2f0 T drm_rect_calc_hscale +ffffffff81aef3d0 T drm_rect_calc_vscale +ffffffff81aef4b0 T drm_rect_debug_print +ffffffff81aef5e0 T drm_rect_rotate +ffffffff81aef6a0 T drm_rect_rotate_inv +ffffffff81af0000 T drm_self_refresh_helper_update_avg_times +ffffffff81af0170 T drm_self_refresh_helper_alter_state +ffffffff81af0320 T drm_self_refresh_helper_init +ffffffff81af04f0 t drm_self_refresh_helper_entry_work +ffffffff81af06a0 T drm_self_refresh_helper_cleanup +ffffffff81af0730 t __delayed_work_tick +ffffffff81af1000 T drm_suballoc_manager_init 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+ffffffff81b05680 T drm_dp_dual_mode_get_tmds_output +ffffffff81b057c0 T drm_dp_dual_mode_set_tmds_output +ffffffff81b05a90 T drm_dp_get_dual_mode_type_name +ffffffff81b05b10 T drm_lspcon_get_mode +ffffffff81b05d80 T drm_lspcon_set_mode +ffffffff81b07000 T drm_dp_channel_eq_ok +ffffffff81b07080 T drm_dp_clock_recovery_ok +ffffffff81b070f0 T drm_dp_get_adjust_request_voltage +ffffffff81b07130 T drm_dp_get_adjust_request_pre_emphasis +ffffffff81b07180 T drm_dp_get_adjust_tx_ffe_preset +ffffffff81b071c0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff81b07240 T drm_dp_128b132b_lane_symbol_locked +ffffffff81b072b0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff81b072e0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff81b07310 T drm_dp_128b132b_link_training_failed +ffffffff81b07340 T drm_dp_read_clock_recovery_delay +ffffffff81b07450 T drm_dp_read_channel_eq_delay +ffffffff81b07560 T drm_dp_128b132b_read_aux_rd_interval +ffffffff81b07630 T drm_dp_link_train_clock_recovery_delay +ffffffff81b076c0 t __8b10b_clock_recovery_delay_us +ffffffff81b07740 T drm_dp_link_train_channel_eq_delay +ffffffff81b077b0 T drm_dp_phy_name +ffffffff81b077f0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff81b07810 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff81b07880 T drm_dp_link_rate_to_bw_code +ffffffff81b078f0 T drm_dp_bw_code_to_link_rate +ffffffff81b07950 T drm_dp_dpcd_probe +ffffffff81b07ac0 t drm_dp_dpcd_access +ffffffff81b07c30 T drm_dp_dpcd_set_powered +ffffffff81b07ca0 T drm_dp_dpcd_read +ffffffff81b07e00 T drm_dp_dpcd_write +ffffffff81b07f30 T drm_dp_dpcd_read_link_status +ffffffff81b07f50 T drm_dp_dpcd_read_phy_link_status +ffffffff81b08060 T drm_dp_downstream_is_type +ffffffff81b080b0 T drm_dp_downstream_is_tmds +ffffffff81b08120 T drm_dp_send_real_edid_checksum +ffffffff81b083c0 T drm_dp_read_dpcd_caps +ffffffff81b08580 T drm_dp_read_downstream_info +ffffffff81b08690 T drm_dp_downstream_max_dotclock +ffffffff81b086e0 T drm_dp_downstream_max_tmds_clock +ffffffff81b08780 T drm_dp_downstream_min_tmds_clock +ffffffff81b08800 T drm_dp_downstream_max_bpc +ffffffff81b088a0 T drm_dp_downstream_420_passthrough +ffffffff81b08900 T drm_dp_downstream_444_to_420_conversion +ffffffff81b08960 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff81b089c0 T drm_dp_downstream_mode +ffffffff81b08a50 T drm_dp_downstream_id +ffffffff81b08a70 T drm_dp_downstream_debug +ffffffff81b08b30 T drm_dp_subconnector_type +ffffffff81b08ba0 T drm_dp_set_subconnector_property +ffffffff81b08c10 T drm_dp_read_sink_count_cap +ffffffff81b08c60 T drm_dp_read_sink_count +ffffffff81b08cd0 T drm_dp_remote_aux_init +ffffffff81b08d00 t drm_dp_aux_crc_work +ffffffff81b08ea0 T drm_dp_aux_init +ffffffff81b08f70 T drm_dp_aux_register +ffffffff81b090c0 T drm_dp_aux_unregister +ffffffff81b090f0 T drm_dp_psr_setup_time +ffffffff81b09140 T drm_dp_start_crc +ffffffff81b09200 T drm_dp_stop_crc +ffffffff81b092b0 T drm_dp_read_desc +ffffffff81b094b0 T drm_dp_dsc_sink_max_slice_count +ffffffff81b09540 T drm_dp_dsc_sink_line_buf_depth +ffffffff81b09580 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff81b095f0 T drm_dp_read_lttpr_common_caps +ffffffff81b096c0 T drm_dp_read_lttpr_phy_caps +ffffffff81b09790 T drm_dp_lttpr_count +ffffffff81b09830 T drm_dp_lttpr_max_link_rate +ffffffff81b09890 T drm_dp_lttpr_max_lane_count +ffffffff81b098c0 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff81b098f0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff81b09920 T drm_dp_get_phy_test_pattern +ffffffff81b09a70 T drm_dp_set_phy_test_pattern +ffffffff81b09b40 T drm_dp_vsc_sdp_log +ffffffff81b09ea0 T drm_dp_get_pcon_max_frl_bw +ffffffff81b09ef0 T drm_dp_pcon_frl_prepare +ffffffff81b09f50 T drm_dp_pcon_is_frl_ready +ffffffff81b09fb0 T drm_dp_pcon_frl_configure_1 +ffffffff81b0a0c0 T drm_dp_pcon_frl_configure_2 +ffffffff81b0a130 T drm_dp_pcon_reset_frl_config +ffffffff81b0a190 T drm_dp_pcon_frl_enable +ffffffff81b0a260 T drm_dp_pcon_hdmi_link_active +ffffffff81b0a2c0 T drm_dp_pcon_hdmi_link_mode +ffffffff81b0a340 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff81b0a450 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff81b0a480 T drm_dp_pcon_dsc_max_slices +ffffffff81b0a510 T drm_dp_pcon_dsc_max_slice_width +ffffffff81b0a540 T drm_dp_pcon_dsc_bpp_incr +ffffffff81b0a580 T drm_dp_pcon_pps_default +ffffffff81b0a610 T drm_dp_pcon_pps_override_buf +ffffffff81b0a6d0 T drm_dp_pcon_pps_override_param +ffffffff81b0a7e0 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff81b0a890 T drm_edp_backlight_set_level +ffffffff81b0a980 T drm_edp_backlight_enable +ffffffff81b0abd0 t drm_edp_backlight_set_enable +ffffffff81b0ad30 T drm_edp_backlight_disable +ffffffff81b0ad80 T drm_edp_backlight_init +ffffffff81b0b340 T drm_panel_dp_aux_backlight +ffffffff81b0b500 t __128b132b_channel_eq_delay_us +ffffffff81b0b580 t __8b10b_channel_eq_delay_us +ffffffff81b0b600 t drm_dp_aux_get_crc +ffffffff81b0b700 t drm_dp_i2c_xfer +ffffffff81b0b9a0 t drm_dp_i2c_functionality +ffffffff81b0b9d0 t drm_dp_i2c_do_msg +ffffffff81b0be00 t lock_bus +ffffffff81b0be20 t trylock_bus +ffffffff81b0be80 t unlock_bus +ffffffff81b0bea0 t dp_aux_backlight_update_status +ffffffff81b0c000 T drm_dp_encode_sideband_req +ffffffff81b0c470 T drm_dp_decode_sideband_req +ffffffff81b0c9e0 T drm_dp_dump_sideband_msg_req_body +ffffffff81b0cde0 T drm_dp_mst_get_port_malloc +ffffffff81b0ce30 T drm_dp_mst_put_port_malloc +ffffffff81b0cf40 t kref_put +ffffffff81b0cf80 T drm_atomic_get_mst_payload_state +ffffffff81b0cfd0 T drm_dp_mst_dpcd_read +ffffffff81b0d2f0 T drm_dp_mst_dpcd_write +ffffffff81b0d350 t drm_dp_send_dpcd_write +ffffffff81b0d5f0 T drm_dp_mst_connector_late_register +ffffffff81b0d680 T drm_dp_mst_connector_early_unregister +ffffffff81b0d6c0 T drm_dp_send_power_updown_phy +ffffffff81b0d980 t drm_dp_mst_topology_put_port +ffffffff81b0dac0 t drm_dp_mst_wait_tx_reply +ffffffff81b0dea0 T drm_dp_send_query_stream_enc_status +ffffffff81b0e1d0 T drm_dp_add_payload_part1 +ffffffff81b0e3c0 T drm_dp_remove_payload +ffffffff81b0e590 T drm_dp_add_payload_part2 +ffffffff81b0e7a0 T drm_dp_get_vc_payload_bw +ffffffff81b0e840 T drm_dp_read_mst_cap +ffffffff81b0e8a0 T drm_dp_mst_topology_mgr_set_mst +ffffffff81b0ebb0 t drm_dp_dpcd_write_payload +ffffffff81b0ed80 t drm_dp_mst_topology_put_mstb +ffffffff81b0eea0 T drm_dp_mst_topology_mgr_suspend +ffffffff81b0efb0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff81b0f020 T drm_dp_mst_topology_mgr_resume +ffffffff81b0f2d0 T drm_dp_mst_hpd_irq_handle_event +ffffffff81b103d0 T drm_dp_mst_hpd_irq_send_new_request +ffffffff81b10470 T drm_dp_mst_detect_port +ffffffff81b10610 T drm_dp_mst_edid_read +ffffffff81b10740 T drm_dp_mst_get_edid +ffffffff81b107d0 T drm_dp_atomic_find_time_slots +ffffffff81b10ac0 T drm_atomic_get_mst_topology_state +ffffffff81b10ad0 T drm_dp_atomic_release_time_slots +ffffffff81b10d20 T drm_dp_mst_atomic_setup_commit +ffffffff81b10eb0 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff81b11030 T drm_dp_mst_root_conn_atomic_check +ffffffff81b11160 T drm_dp_mst_update_slots +ffffffff81b111c0 T drm_dp_check_act_status +ffffffff81b113b0 T drm_dp_calc_pbn_mode +ffffffff81b11410 T drm_dp_mst_dump_topology +ffffffff81b11740 t drm_dp_mst_dump_mstb +ffffffff81b117b0 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff81b11920 T drm_dp_mst_dsc_aux_for_port +ffffffff81b11bb0 T drm_dp_mst_atomic_enable_dsc +ffffffff81b11d60 T drm_dp_mst_atomic_check +ffffffff81b12090 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff81b12350 t drm_dp_mst_duplicate_state +ffffffff81b12550 t drm_dp_mst_destroy_state +ffffffff81b12630 T drm_atomic_get_old_mst_topology_state +ffffffff81b12640 T drm_atomic_get_new_mst_topology_state +ffffffff81b12650 T drm_dp_mst_topology_mgr_init +ffffffff81b12930 t drm_dp_mst_link_probe_work +ffffffff81b12c40 t drm_dp_tx_work +ffffffff81b12c90 t drm_dp_delayed_destroy_work +ffffffff81b13240 t drm_dp_mst_up_req_work +ffffffff81b13880 T drm_dp_mst_topology_mgr_destroy +ffffffff81b13930 t drm_dp_mst_is_virtual_dpcd +ffffffff81b13a30 t drm_dp_free_mst_branch_device +ffffffff81b13a70 t drm_dp_mst_topology_get_port_validated_locked +ffffffff81b13b00 t drm_dp_mst_dump_sideband_msg_tx +ffffffff81b13d50 t process_single_down_tx_qlock +ffffffff81b13ee0 t process_single_tx_qlock +ffffffff81b143e0 t drm_dp_msg_data_crc4 +ffffffff81b14510 t drm_dp_payload_send_msg +ffffffff81b149f0 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff81b14a80 t drm_dp_get_one_sb_msg +ffffffff81b15240 t drm_dp_get_mst_branch_device +ffffffff81b153c0 t drm_dp_check_and_send_link_address +ffffffff81b154a0 t drm_dp_send_link_address +ffffffff81b162c0 t drm_dp_send_enum_path_resources +ffffffff81b16560 t drm_dp_port_set_pdt +ffffffff81b16890 t drm_dp_mst_port_add_connector +ffffffff81b16ac0 t drm_dp_mst_i2c_xfer +ffffffff81b17290 t drm_dp_mst_i2c_functionality +ffffffff81b172c0 t get_mst_branch_device_by_guid_helper +ffffffff81b18000 T drm_dsc_dp_pps_header_init +ffffffff81b18030 T drm_dsc_dp_rc_buffer_size +ffffffff81b18090 T drm_dsc_pps_payload_pack +ffffffff81b18350 T drm_dsc_set_const_params +ffffffff81b183a0 T drm_dsc_set_rc_buf_thresh +ffffffff81b18410 T drm_dsc_setup_rc_params +ffffffff81b185e0 T drm_dsc_compute_rc_parameters +ffffffff81b188e0 T drm_dsc_get_bpp_int +ffffffff81b18970 T drm_dsc_initial_scale_value +ffffffff81b189b0 T drm_dsc_flatness_det_thresh +ffffffff81b19000 T drm_connector_attach_content_protection_property +ffffffff81b19030 T drm_hdcp_check_ksvs_revoked +ffffffff81b19090 T drm_hdcp_update_content_protection +ffffffff81b1a000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff81b1a120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff81b1a180 T drm_hdmi_avi_infoframe_bars +ffffffff81b1a1d0 T drm_hdmi_avi_infoframe_content_type +ffffffff81b1b000 T drm_scdc_read +ffffffff81b1b0a0 T drm_scdc_write +ffffffff81b1b1a0 T drm_scdc_get_scrambling_status +ffffffff81b1b280 T drm_scdc_set_scrambling +ffffffff81b1b440 T drm_scdc_set_high_tmds_clock_ratio +ffffffff81b1c000 T drm_gem_ttm_mmap +ffffffff81b1c080 T drm_gem_ttm_vmap +ffffffff81b1c090 T drm_gem_ttm_vunmap +ffffffff81b1d000 T ttm_agp_bind +ffffffff81b1d060 T ttm_agp_unbind +ffffffff81b1d080 T ttm_agp_is_bound +ffffffff81b1d0d0 T ttm_agp_destroy +ffffffff81b1d0f0 T ttm_agp_tt_create +ffffffff81b1e000 T ttm_bo_move_to_lru_tail +ffffffff81b1e040 T ttm_bo_set_bulk_move +ffffffff81b1e120 T ttm_bo_put +ffffffff81b1e750 T ttm_bo_eviction_valuable +ffffffff81b1e7a0 T ttm_mem_evict_first +ffffffff81b1efe0 t ttm_bo_evict_swapout_allowable +ffffffff81b1f220 t dma_resv_unlock +ffffffff81b1f2d0 t ttm_bo_cleanup_refs +ffffffff81b1f6e0 t ttm_bo_unreserve +ffffffff81b1f7e0 T ttm_bo_pin +ffffffff81b1f890 T ttm_bo_unpin +ffffffff81b1f9c0 T ttm_bo_mem_space +ffffffff81b1fc40 t ttm_bo_add_move_fence +ffffffff81b1fd40 T ttm_bo_validate +ffffffff81b1ff20 T ttm_bo_init_reserved +ffffffff81b20160 T ttm_bo_init_validate +ffffffff81b20210 T ttm_bo_unmap_virtual +ffffffff81b20370 T ttm_bo_wait_ctx +ffffffff81b20410 T ttm_bo_swapout +ffffffff81b20740 t ttm_bo_handle_move_mem +ffffffff81b20910 T ttm_bo_tt_destroy +ffffffff81b20990 t ttm_bo_delayed_delete +ffffffff81b21000 T ttm_mem_io_reserve +ffffffff81b21060 T ttm_mem_io_free +ffffffff81b210e0 T ttm_move_memcpy +ffffffff81b212e0 T ttm_bo_move_memcpy +ffffffff81b21580 T ttm_bo_move_sync_cleanup +ffffffff81b216a0 T ttm_io_prot +ffffffff81b216e0 T ttm_bo_kmap +ffffffff81b21a10 T ttm_bo_kunmap +ffffffff81b21b50 T ttm_bo_vmap +ffffffff81b21d80 T ttm_bo_vunmap +ffffffff81b21e70 T ttm_bo_move_accel_cleanup +ffffffff81b221c0 T ttm_bo_pipeline_gutting +ffffffff81b22430 t ttm_buffer_object_transfer +ffffffff81b226f0 t ttm_transfered_destroy +ffffffff81b23000 T ttm_bo_vm_reserve +ffffffff81b231c0 t dma_resv_lock_interruptible +ffffffff81b23300 T ttm_bo_vm_fault_reserved +ffffffff81b23690 T ttm_bo_vm_fault +ffffffff81b23800 T ttm_bo_vm_reference +ffffffff81b23830 T ttm_bo_vm_detach +ffffffff81b23840 T ttm_bo_mmap_obj +ffffffff81b24000 T ttm_global_swapout +ffffffff81b24100 T ttm_device_swapout +ffffffff81b24250 T ttm_device_init +ffffffff81b24570 T ttm_device_fini +ffffffff81b24790 T ttm_device_clear_dma_mappings +ffffffff81b24860 t ttm_device_clear_lru_dma_mappings +ffffffff81b25000 T ttm_eu_backoff_reservation +ffffffff81b25170 T ttm_eu_reserve_buffers +ffffffff81b25680 T ttm_eu_fence_buffer_objects +ffffffff81b25820 t __ww_mutex_lock +ffffffff81b26000 T ttm_prot_from_caching +ffffffff81b27000 T ttm_pool_alloc +ffffffff81b27b50 t ttm_pool_free_range +ffffffff81b27ed0 T ttm_pool_free +ffffffff81b27f40 t ttm_pool_shrink +ffffffff81b281a0 T ttm_pool_init +ffffffff81b28480 T ttm_pool_fini +ffffffff81b286d0 t ttm_pool_type_fini +ffffffff81b28970 T ttm_pool_mgr_init +ffffffff81b28cd0 t ttm_pool_shrinker_count +ffffffff81b28d30 t ttm_pool_shrinker_scan +ffffffff81b28d90 T ttm_pool_mgr_fini +ffffffff81b29000 T ttm_range_man_init_nocheck +ffffffff81b291b0 T ttm_range_man_fini_nocheck +ffffffff81b29380 t ttm_range_man_alloc +ffffffff81b29510 t ttm_range_man_free +ffffffff81b29590 t ttm_range_man_intersects +ffffffff81b295f0 t ttm_range_man_compatible +ffffffff81b29650 t ttm_range_man_debug +ffffffff81b2a000 T ttm_lru_bulk_move_init +ffffffff81b2a020 T ttm_lru_bulk_move_tail +ffffffff81b2a1e0 T ttm_resource_add_bulk_move +ffffffff81b2a2b0 T ttm_resource_del_bulk_move +ffffffff81b2a3f0 T ttm_resource_move_to_lru_tail +ffffffff81b2a560 T ttm_resource_init +ffffffff81b2a660 T ttm_resource_fini +ffffffff81b2a6d0 T ttm_resource_alloc +ffffffff81b2a840 T ttm_resource_free +ffffffff81b2aa30 T ttm_resource_intersects +ffffffff81b2aa90 T ttm_resource_compatible +ffffffff81b2aaf0 T ttm_resource_compat +ffffffff81b2ac90 T ttm_resource_set_bo +ffffffff81b2acf0 T ttm_resource_manager_init +ffffffff81b2ada0 T ttm_resource_manager_evict_all +ffffffff81b2b030 T ttm_resource_manager_usage +ffffffff81b2b0a0 T ttm_resource_manager_debug +ffffffff81b2b1c0 T ttm_resource_manager_first +ffffffff81b2b250 T ttm_resource_manager_next +ffffffff81b2b370 T ttm_kmap_iter_iomap_init +ffffffff81b2b3d0 T ttm_kmap_iter_linear_io_init +ffffffff81b2b5f0 T ttm_kmap_iter_linear_io_fini +ffffffff81b2b640 T ttm_resource_manager_create_debugfs +ffffffff81b2b670 t ttm_kmap_iter_iomap_map_local +ffffffff81b2b760 t ttm_kmap_iter_iomap_unmap_local +ffffffff81b2b790 t ttm_kmap_iter_linear_io_map_local +ffffffff81b2c000 T ttm_sys_man_init +ffffffff81b2c140 t ttm_sys_man_alloc +ffffffff81b2c1d0 t ttm_sys_man_free +ffffffff81b2d000 T ttm_tt_create +ffffffff81b2d120 T ttm_tt_destroy +ffffffff81b2d140 T ttm_tt_init +ffffffff81b2d240 T ttm_tt_fini +ffffffff81b2d370 T ttm_sg_tt_init +ffffffff81b2d600 T ttm_tt_swapin +ffffffff81b2d740 T ttm_tt_swapout +ffffffff81b2d7a0 T ttm_tt_populate +ffffffff81b2d950 T ttm_tt_unpopulate +ffffffff81b2da10 T ttm_tt_mgr_init +ffffffff81b2da70 T ttm_kmap_iter_tt_init +ffffffff81b2dad0 T ttm_tt_pages_limit +ffffffff81b2db00 t ttm_kmap_iter_tt_map_local +ffffffff81b2db60 t ttm_kmap_iter_tt_unmap_local +ffffffff81b2e000 T drm_sched_entity_init +ffffffff81b2e1b0 T drm_sched_entity_modify_sched +ffffffff81b2e230 T drm_sched_entity_is_ready +ffffffff81b2e270 T drm_sched_entity_error +ffffffff81b2e2b0 T drm_sched_entity_flush +ffffffff81b2e620 t drm_sched_entity_kill +ffffffff81b2e820 T drm_sched_entity_fini +ffffffff81b2e8c0 T drm_sched_entity_destroy +ffffffff81b2e990 T drm_sched_entity_set_priority +ffffffff81b2e9e0 T drm_sched_entity_pop_job +ffffffff81b2ec90 T drm_sched_entity_select_rq +ffffffff81b2ed90 T drm_sched_entity_push_job +ffffffff81b2ef20 t drm_sched_entity_kill_jobs_cb +ffffffff81b2f0e0 t drm_sched_entity_kill_jobs_work +ffffffff81b2f160 t drm_sched_entity_clear_dep +ffffffff81b2f180 t drm_sched_entity_wakeup +ffffffff81b30000 T drm_sched_fence_slab_init +ffffffff81b30070 T drm_sched_fence_slab_fini +ffffffff81b30090 T drm_sched_fence_scheduled +ffffffff81b30100 T drm_sched_fence_finished +ffffffff81b30120 T drm_sched_fence_free +ffffffff81b301d0 T to_drm_sched_fence +ffffffff81b30230 T drm_sched_fence_alloc +ffffffff81b302b0 T drm_sched_fence_init +ffffffff81b30340 t drm_sched_fence_get_driver_name +ffffffff81b30370 t drm_sched_fence_get_timeline_name +ffffffff81b303d0 t drm_sched_fence_release_scheduled +ffffffff81b304d0 t drm_sched_fence_release_finished +ffffffff81b30510 t drm_sched_fence_set_deadline_finished +ffffffff81b31000 T drm_sched_rq_update_fifo +ffffffff81b31110 T drm_sched_rq_add_entity +ffffffff81b311a0 T drm_sched_rq_remove_entity +ffffffff81b31290 T drm_sched_fault +ffffffff81b312e0 T drm_sched_suspend_timeout +ffffffff81b31370 T drm_sched_resume_timeout +ffffffff81b31430 T drm_sched_stop +ffffffff81b31640 T drm_sched_start +ffffffff81b31790 t drm_sched_job_done_cb +ffffffff81b317b0 t drm_sched_job_done +ffffffff81b318b0 T drm_sched_resubmit_jobs +ffffffff81b31a10 T drm_sched_job_init +ffffffff81b31ab0 T drm_sched_job_arm +ffffffff81b31b50 T drm_sched_job_add_dependency +ffffffff81b31d20 T drm_sched_job_add_syncobj_dependency +ffffffff81b31d90 T drm_sched_job_add_resv_dependencies +ffffffff81b31e70 T drm_sched_job_add_implicit_dependencies +ffffffff81b31f60 T drm_sched_job_cleanup +ffffffff81b32040 T drm_sched_wakeup_if_can_queue +ffffffff81b32120 T drm_sched_pick_best +ffffffff81b321e0 T drm_sched_init +ffffffff81b324f0 t drm_sched_job_timedout +ffffffff81b32670 t drm_sched_main +ffffffff81b32bb0 T drm_sched_fini +ffffffff81b32e10 T drm_sched_increase_karma +ffffffff81b32f60 t __delayed_work_tick +ffffffff81b32f80 t drm_sched_get_cleanup_job +ffffffff81b33100 t drm_sched_select_entity +ffffffff81b34000 t ch7017_init +ffffffff81b34160 t ch7017_dpms +ffffffff81b34470 t ch7017_mode_valid +ffffffff81b344b0 t ch7017_mode_set +ffffffff81b347e0 t ch7017_detect +ffffffff81b34810 t ch7017_get_hw_state +ffffffff81b348a0 t ch7017_destroy +ffffffff81b34900 t ch7017_dump_regs +ffffffff81b35000 t ch7xxx_init +ffffffff81b352d0 t ch7xxx_dpms +ffffffff81b353b0 t ch7xxx_mode_valid +ffffffff81b353f0 t ch7xxx_mode_set +ffffffff81b359d0 t ch7xxx_detect +ffffffff81b35c50 t ch7xxx_get_hw_state +ffffffff81b35d30 t ch7xxx_destroy +ffffffff81b35d90 t ch7xxx_dump_regs +ffffffff81b36000 t ivch_init +ffffffff81b363f0 t ivch_dpms +ffffffff81b36710 t ivch_mode_valid +ffffffff81b36750 t ivch_mode_set +ffffffff81b36a30 t ivch_detect +ffffffff81b36a60 t ivch_get_hw_state +ffffffff81b36b60 t ivch_destroy +ffffffff81b36bc0 t ivch_dump_regs +ffffffff81b37880 t ivch_reset +ffffffff81b38000 t ns2501_init +ffffffff81b38220 t ns2501_dpms +ffffffff81b38ac0 t ns2501_mode_valid +ffffffff81b38ba0 t ns2501_mode_set +ffffffff81b39f00 t ns2501_detect +ffffffff81b39f30 t ns2501_get_hw_state +ffffffff81b3a010 t ns2501_destroy +ffffffff81b3b000 t sil164_init +ffffffff81b3b220 t sil164_dpms +ffffffff81b3b370 t sil164_mode_valid +ffffffff81b3b3a0 t sil164_mode_set +ffffffff81b3b550 t sil164_detect +ffffffff81b3b640 t sil164_get_hw_state +ffffffff81b3b720 t sil164_destroy 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hsw_ips_disable +ffffffff81b43170 T hsw_ips_pre_update +ffffffff81b43210 T hsw_ips_post_update +ffffffff81b43440 T hsw_crtc_supports_ips +ffffffff81b434a0 T hsw_crtc_state_ips_capable +ffffffff81b43540 T hsw_ips_compute_config +ffffffff81b43680 T hsw_ips_get_config +ffffffff81b43720 T hsw_ips_crtc_debugfs_add +ffffffff81b44000 T i9xx_check_plane_surface +ffffffff81b44310 T i965_plane_max_stride +ffffffff81b44380 T intel_primary_plane_create +ffffffff81b44850 t i9xx_plane_min_cdclk +ffffffff81b448c0 t i9xx_plane_max_stride +ffffffff81b44930 t hsw_primary_max_stride +ffffffff81b44990 t ilk_primary_max_stride +ffffffff81b44a00 t i830_plane_update_arm +ffffffff81b44a50 t i9xx_plane_update_noarm +ffffffff81b44b80 t i9xx_plane_update_arm +ffffffff81b44f30 t i9xx_plane_disable_arm +ffffffff81b45040 t i9xx_plane_get_hw_state +ffffffff81b45140 t i9xx_plane_check +ffffffff81b45280 t vlv_primary_async_flip +ffffffff81b45310 t vlv_primary_enable_flip_done +ffffffff81b45380 t vlv_primary_disable_flip_done +ffffffff81b453f0 t g4x_primary_async_flip +ffffffff81b45520 t bdw_primary_enable_flip_done +ffffffff81b45590 t bdw_primary_disable_flip_done +ffffffff81b45600 t ivb_primary_enable_flip_done +ffffffff81b45670 t ivb_primary_disable_flip_done +ffffffff81b456e0 t ilk_primary_enable_flip_done +ffffffff81b45750 t ilk_primary_disable_flip_done +ffffffff81b457c0 T i9xx_get_initial_plane_config +ffffffff81b45c20 T i9xx_fixup_initial_plane_config +ffffffff81b45ce0 t i965_plane_format_mod_supported +ffffffff81b45de0 t i8xx_plane_format_mod_supported +ffffffff81b45e90 t i9xx_plane_ctl +ffffffff81b47000 T intel_set_memory_cxsr +ffffffff81b470b0 t _intel_set_memory_cxsr +ffffffff81b473c0 T ilk_disable_lp_wm +ffffffff81b474c0 T ilk_wm_sanitize +ffffffff81b47800 T i9xx_wm_init +ffffffff81b47e90 t intel_get_cxsr_latency +ffffffff81b47f50 t ilk_compute_pipe_wm +ffffffff81b48300 t ilk_compute_intermediate_wm +ffffffff81b48540 t ilk_initial_watermarks +ffffffff81b485d0 t ilk_optimize_watermarks +ffffffff81b486a0 t ilk_wm_get_hw_state +ffffffff81b48b20 t ilk_compute_wm_level +ffffffff81b49030 t ilk_validate_wm_level +ffffffff81b49180 t ilk_compute_wm_maximums +ffffffff81b493b0 t ilk_program_watermarks +ffffffff81b4a1e0 t ilk_wm_merge +ffffffff81b4a4a0 t vlv_compute_pipe_wm +ffffffff81b4ae90 t vlv_compute_intermediate_wm +ffffffff81b4b1e0 t vlv_initial_watermarks +ffffffff81b4b270 t vlv_atomic_update_fifo +ffffffff81b4b580 t vlv_optimize_watermarks +ffffffff81b4b650 t vlv_wm_get_hw_state_and_sanitize +ffffffff81b4c530 t _vlv_compute_pipe_wm +ffffffff81b4c850 t vlv_invalidate_wms +ffffffff81b4c9c0 t vlv_program_watermarks +ffffffff81b4d200 t chv_set_memory_dvfs +ffffffff81b4d410 t g4x_compute_pipe_wm +ffffffff81b4dd40 t g4x_compute_intermediate_wm +ffffffff81b4e1c0 t g4x_initial_watermarks +ffffffff81b4e280 t g4x_optimize_watermarks +ffffffff81b4e380 t g4x_wm_get_hw_state_and_sanitize +ffffffff81b4ed70 t _g4x_compute_pipe_wm +ffffffff81b4f030 t g4x_program_watermarks +ffffffff81b4f400 t pnv_update_wm +ffffffff81b4fb80 t i965_update_wm +ffffffff81b4ffc0 t i9xx_update_wm +ffffffff81b50810 t i845_update_wm +ffffffff81b51000 T icl_dsi_frame_update +ffffffff81b510c0 T icl_dsi_init +ffffffff81b51ac0 t gen11_dsi_pre_pll_enable +ffffffff81b51f60 t gen11_dsi_pre_enable +ffffffff81b551b0 t gen11_dsi_enable +ffffffff81b554c0 t gen11_dsi_disable +ffffffff81b55500 t gen11_dsi_post_disable +ffffffff81b56380 t gen11_dsi_get_config +ffffffff81b565d0 t gen11_dsi_sync_state +ffffffff81b56690 t gen11_dsi_compute_config +ffffffff81b56a50 t gen11_dsi_get_hw_state +ffffffff81b56c20 t gen11_dsi_initial_fastset_check +ffffffff81b56ca0 t gen11_dsi_get_power_domains +ffffffff81b56d90 t gen11_dsi_gate_clocks +ffffffff81b56e60 t gen11_dsi_is_clock_enabled +ffffffff81b56f30 t gen11_dsi_encoder_destroy +ffffffff81b56f40 t wait_for_cmds_dispatched_to_panel +ffffffff81b57430 t wait_for_header_credits +ffffffff81b575f0 t wait_for_payload_credits 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intel_plane_destroy_state +ffffffff81b591f0 T intel_plane_duplicate_state +ffffffff81b592c0 T intel_adjusted_rate +ffffffff81b59340 T intel_plane_pixel_rate +ffffffff81b593d0 T intel_plane_data_rate +ffffffff81b59490 T intel_plane_calc_min_cdclk +ffffffff81b59610 T intel_plane_copy_uapi_to_hw_state +ffffffff81b59780 T intel_plane_copy_hw_state +ffffffff81b59870 T intel_plane_set_invisible +ffffffff81b59970 T intel_plane_atomic_check_with_state +ffffffff81b5a610 T intel_plane_atomic_check +ffffffff81b5a790 T intel_plane_update_noarm +ffffffff81b5a7d0 T intel_plane_update_arm +ffffffff81b5a810 T intel_plane_disable_arm +ffffffff81b5a830 T intel_crtc_planes_update_noarm +ffffffff81b5a960 T intel_crtc_planes_update_arm +ffffffff81b5ad90 T intel_atomic_plane_check_clipping +ffffffff81b5b050 T intel_plane_check_src_coordinates +ffffffff81b5b220 T intel_plane_helper_add +ffffffff81b5b260 t intel_prepare_plane_fb +ffffffff81b5b540 t intel_cleanup_plane_fb +ffffffff81b5c000 T intel_audio_sdp_split_update +ffffffff81b5c0e0 T intel_audio_compute_config +ffffffff81b5c1a0 T intel_audio_codec_enable +ffffffff81b5c3b0 T intel_audio_codec_disable +ffffffff81b5c630 T intel_audio_codec_get_config +ffffffff81b5c680 T intel_audio_hooks_init +ffffffff81b5c700 T intel_audio_cdclk_change_pre +ffffffff81b5c7a0 T intel_audio_cdclk_change_post +ffffffff81b5c890 T intel_audio_init +ffffffff81b5c8a0 T intel_audio_register +ffffffff81b5c8d0 T intel_audio_deinit +ffffffff81b5c920 t g4x_audio_codec_enable +ffffffff81b5cb30 t g4x_audio_codec_disable +ffffffff81b5cbd0 t g4x_audio_codec_get_config +ffffffff81b5cd10 t ibx_audio_codec_enable +ffffffff81b5cf10 t ibx_audio_codec_disable +ffffffff81b5d120 t intel_acomp_get_config +ffffffff81b5d1a0 t audio_config_hdmi_pixel_clock +ffffffff81b5d390 t hsw_audio_codec_enable +ffffffff81b5db20 t hsw_audio_codec_disable +ffffffff81b5e000 T intel_backlight_invert_pwm_level +ffffffff81b5e0c0 T intel_backlight_set_pwm_level +ffffffff81b5e130 T intel_backlight_level_to_pwm +ffffffff81b5e350 T intel_backlight_level_from_pwm +ffffffff81b5e510 T intel_backlight_set_acpi +ffffffff81b5e750 T intel_backlight_disable +ffffffff81b5e840 T intel_backlight_enable +ffffffff81b5e900 t __intel_backlight_enable +ffffffff81b5ea50 T intel_backlight_device_register +ffffffff81b5ed70 t kasprintf +ffffffff81b5ee50 T intel_backlight_device_unregister +ffffffff81b5eeb0 T intel_backlight_update +ffffffff81b5ef50 T intel_backlight_setup +ffffffff81b5f140 T intel_backlight_destroy +ffffffff81b5f170 T intel_backlight_init_funcs +ffffffff81b5f2f0 t intel_backlight_device_update_status +ffffffff81b5f550 t intel_backlight_device_get_brightness +ffffffff81b5f720 t bxt_setup_backlight +ffffffff81b5f9b0 t bxt_get_backlight +ffffffff81b5f9f0 t bxt_set_backlight +ffffffff81b5fa30 t bxt_disable_backlight +ffffffff81b5fb90 t bxt_enable_backlight +ffffffff81b5fe70 t bxt_hz_to_pwm +ffffffff81b5feb0 t cnp_setup_backlight +ffffffff81b601b0 t cnp_disable_backlight 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intel_atomic_get_bw_state +ffffffff81b6af20 T intel_bw_min_cdclk +ffffffff81b6b1a0 T intel_bw_calc_min_cdclk +ffffffff81b6b5b0 T intel_bw_atomic_check +ffffffff81b6c0e0 T intel_bw_init +ffffffff81b6c160 t icl_get_qgv_points +ffffffff81b6c740 t skl_plane_calc_dbuf_bw +ffffffff81b6c890 t intel_bw_duplicate_state +ffffffff81b6c910 t intel_bw_destroy_state +ffffffff81b6d000 T intel_cdclk_get_cdclk +ffffffff81b6d020 T intel_cdclk_init_hw +ffffffff81b6d850 T intel_cdclk_uninit_hw +ffffffff81b6d970 T intel_cdclk_needs_modeset +ffffffff81b6d9b0 T intel_cdclk_dump_config +ffffffff81b6da30 T intel_set_cdclk_pre_plane_update +ffffffff81b6dda0 t intel_set_cdclk +ffffffff81b6e1c0 T intel_set_cdclk_post_plane_update +ffffffff81b6e480 T intel_crtc_compute_min_cdclk +ffffffff81b6e830 T intel_atomic_get_cdclk_state +ffffffff81b6e850 T intel_cdclk_atomic_check +ffffffff81b6e970 T intel_cdclk_init +ffffffff81b6e9f0 T intel_modeset_calc_cdclk +ffffffff81b6f0c0 t intel_cdclk_can_crawl +ffffffff81b6f150 T intel_update_max_cdclk +ffffffff81b6f4d0 T intel_update_cdclk +ffffffff81b6f570 T intel_read_rawclk +ffffffff81b6f720 t i9xx_hrawclk +ffffffff81b6f7e0 T intel_cdclk_debugfs_register +ffffffff81b6f810 T intel_init_cdclk_hooks +ffffffff81b6fc40 t bxt_set_cdclk +ffffffff81b70300 t _bxt_set_cdclk +ffffffff81b70b70 t skl_set_cdclk +ffffffff81b71230 t intel_cdclk_duplicate_state +ffffffff81b712c0 t intel_cdclk_destroy_state +ffffffff81b712e0 t bxt_get_cdclk +ffffffff81b71550 t bxt_modeset_calc_cdclk +ffffffff81b719e0 t tgl_calc_voltage_level +ffffffff81b71a30 t intel_compute_min_cdclk +ffffffff81b71c70 t rplu_calc_voltage_level +ffffffff81b71cc0 t ehl_calc_voltage_level +ffffffff81b71d10 t icl_calc_voltage_level +ffffffff81b71d60 t bxt_calc_voltage_level +ffffffff81b71db0 t skl_get_cdclk +ffffffff81b71fe0 t skl_modeset_calc_cdclk +ffffffff81b721f0 t bdw_get_cdclk +ffffffff81b722f0 t bdw_set_cdclk +ffffffff81b72950 t bdw_modeset_calc_cdclk +ffffffff81b72a50 t hsw_get_cdclk +ffffffff81b72b30 t fixed_modeset_calc_cdclk +ffffffff81b72b80 t vlv_get_cdclk +ffffffff81b72c70 t chv_set_cdclk +ffffffff81b73070 t vlv_modeset_calc_cdclk +ffffffff81b73250 t vlv_set_cdclk +ffffffff81b73870 t fixed_400mhz_get_cdclk +ffffffff81b738a0 t fixed_450mhz_get_cdclk +ffffffff81b738d0 t gm45_get_cdclk +ffffffff81b739f0 t intel_hpll_vco +ffffffff81b73b30 t g33_get_cdclk +ffffffff81b73c60 t i965gm_get_cdclk +ffffffff81b73d70 t pnv_get_cdclk +ffffffff81b73e30 t i945gm_get_cdclk +ffffffff81b73eb0 t i915gm_get_cdclk +ffffffff81b73f30 t fixed_333mhz_get_cdclk +ffffffff81b73f60 t fixed_266mhz_get_cdclk +ffffffff81b73f90 t i85x_get_cdclk +ffffffff81b74030 t fixed_200mhz_get_cdclk +ffffffff81b74060 t fixed_133mhz_get_cdclk +ffffffff81b75000 T intel_color_load_luts +ffffffff81b75030 T intel_color_commit_noarm +ffffffff81b75080 T intel_color_commit_arm +ffffffff81b750b0 T intel_color_post_update +ffffffff81b75100 T intel_color_prepare_commit +ffffffff81b75130 T intel_color_cleanup_commit +ffffffff81b75190 T intel_color_check +ffffffff81b751b0 T intel_color_get_config +ffffffff81b75230 T intel_color_lut_equal +ffffffff81b75290 T intel_color_assert_luts +ffffffff81b75590 T intel_color_crtc_init +ffffffff81b75610 T intel_color_init +ffffffff81b75750 T intel_color_init_hooks +ffffffff81b75880 t chv_color_check +ffffffff81b75dc0 t i9xx_color_commit_arm +ffffffff81b75dd0 t chv_load_luts +ffffffff81b761e0 t chv_read_luts +ffffffff81b76460 t chv_lut_equal +ffffffff81b76790 t chv_read_csc +ffffffff81b768b0 t intel_color_add_affected_planes +ffffffff81b76a30 t _check_luts +ffffffff81b76bb0 t i965_load_luts +ffffffff81b76f20 t i965_read_luts +ffffffff81b77300 t vlv_color_check +ffffffff81b777d0 t vlv_load_luts +ffffffff81b77980 t i965_lut_equal +ffffffff81b77b60 t vlv_read_csc +ffffffff81b77d40 t i9xx_color_check +ffffffff81b77ff0 t i9xx_load_luts +ffffffff81b78460 t i9xx_read_luts +ffffffff81b78810 t i9xx_lut_equal +ffffffff81b78a30 t icl_color_check +ffffffff81b78e50 t icl_color_commit_noarm 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intel_connector_get_hw_state +ffffffff81b812b0 T intel_connector_get_pipe +ffffffff81b81380 T intel_connector_update_modes +ffffffff81b813b0 T intel_ddc_get_modes +ffffffff81b81440 T intel_attach_force_audio_property +ffffffff81b814e0 T intel_attach_broadcast_rgb_property +ffffffff81b81590 T intel_attach_aspect_ratio_property +ffffffff81b81600 T intel_attach_hdmi_colorspace_property +ffffffff81b81660 T intel_attach_dp_colorspace_property +ffffffff81b816c0 T intel_attach_scaling_mode_property +ffffffff81b82000 T intel_crt_port_enabled +ffffffff81b82090 T intel_crt_reset +ffffffff81b82190 T intel_crt_init +ffffffff81b82650 t hsw_crt_get_config +ffffffff81b82710 t hsw_crt_compute_config +ffffffff81b82820 t hsw_pre_pll_enable_crt +ffffffff81b82890 t hsw_pre_enable_crt +ffffffff81b82940 t hsw_enable_crt +ffffffff81b82b30 t hsw_disable_crt +ffffffff81b82ba0 t hsw_post_disable_crt +ffffffff81b82d90 t pch_crt_compute_config +ffffffff81b82de0 t pch_disable_crt +ffffffff81b82e10 t pch_post_disable_crt +ffffffff81b82f00 t intel_crt_compute_config +ffffffff81b82f50 t intel_disable_crt +ffffffff81b83040 t intel_crt_get_config +ffffffff81b830e0 t intel_crt_get_hw_state +ffffffff81b831b0 t intel_enable_crt +ffffffff81b832a0 t intel_spurious_crt_detect_dmi_callback +ffffffff81b83300 t intel_crt_get_modes +ffffffff81b83450 t intel_crt_detect +ffffffff81b83740 t intel_crt_mode_valid +ffffffff81b83860 t intel_crt_get_edid +ffffffff81b83940 t intel_crt_detect_hotplug +ffffffff81b83e50 t intel_crt_detect_ddc +ffffffff81b83f50 t intel_crt_load_detect +ffffffff81b85000 T intel_first_crtc +ffffffff81b85020 T intel_crtc_for_pipe +ffffffff81b85080 T intel_crtc_wait_for_next_vblank +ffffffff81b85090 T intel_wait_for_vblank_if_active +ffffffff81b85100 T intel_crtc_get_vblank_counter +ffffffff81b85190 T intel_crtc_max_vblank_count +ffffffff81b85220 T intel_crtc_vblank_on +ffffffff81b852c0 t assert_vblank_disabled +ffffffff81b853b0 T intel_crtc_vblank_off +ffffffff81b853e0 T intel_crtc_state_alloc +ffffffff81b854a0 T intel_crtc_state_reset +ffffffff81b85540 T intel_crtc_init +ffffffff81b85940 T intel_wait_for_vblank_workers +ffffffff81b85a00 T intel_usecs_to_scanlines +ffffffff81b85a50 T intel_pipe_update_start +ffffffff81b85f20 T intel_pipe_update_end +ffffffff81b862a0 t intel_crtc_destroy +ffffffff81b862e0 t intel_crtc_late_register +ffffffff81b86310 t intel_crtc_vblank_work +ffffffff81b87000 T intel_output_format_name +ffffffff81b87040 T intel_crtc_state_dump +ffffffff81b88620 t ilk_dump_csc +ffffffff81b89000 T intel_cursor_plane_create +ffffffff81b89240 t i845_cursor_max_stride +ffffffff81b89270 t i845_cursor_update_arm +ffffffff81b894d0 t i845_cursor_disable_arm +ffffffff81b894f0 t i845_cursor_get_hw_state +ffffffff81b895b0 t i845_check_cursor +ffffffff81b89770 t i9xx_cursor_max_stride +ffffffff81b897b0 t i9xx_cursor_update_arm +ffffffff81b89b70 t i9xx_cursor_disable_arm +ffffffff81b89b90 t i9xx_cursor_get_hw_state +ffffffff81b89ca0 t i9xx_check_cursor +ffffffff81b89f50 t intel_check_cursor +ffffffff81b8a1a0 t intel_legacy_cursor_update +ffffffff81b8a600 t intel_cursor_format_mod_supported +ffffffff81b8b000 T intel_is_c10phy +ffffffff81b8b040 T intel_cx0_phy_set_signal_levels +ffffffff81b8b6f0 t intel_cx0_rmw +ffffffff81b8b800 T intel_c10pll_readout_hw_state +ffffffff81b8b9f0 T intel_c10pll_dump_hw_state +ffffffff81b8bcc0 T intel_cx0_phy_check_hdmi_link_rate +ffffffff81b8be50 T intel_cx0pll_calc_state +ffffffff81b8c2a0 T intel_c20pll_readout_hw_state +ffffffff81b8c8f0 t intel_c20_sram_read +ffffffff81b8ca30 T intel_c20pll_dump_hw_state +ffffffff81b8cea0 T intel_c10pll_calc_port_clock +ffffffff81b8cf80 T intel_c20pll_calc_port_clock +ffffffff81b8d080 T intel_mtl_tbt_calc_port_clock +ffffffff81b8d1f0 T intel_mtl_pll_enable +ffffffff81b8ede0 T intel_mtl_pll_disable +ffffffff81b8f300 T intel_mtl_port_pll_type +ffffffff81b8f390 T intel_c10pll_state_verify +ffffffff81b8f6d0 t __intel_cx0_read +ffffffff81b8fb20 t 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lpt_digital_port_connected +ffffffff81b9bf80 t bdw_digital_port_connected +ffffffff81b9bff0 t hsw_digital_port_connected +ffffffff81b9c060 t intel_ddi_init_dp_connector +ffffffff81b9c150 t intel_ddi_init_hdmi_connector +ffffffff81b9c1c0 t intel_ddi_encoder_reset +ffffffff81b9c2b0 t intel_ddi_encoder_destroy +ffffffff81b9c3a0 t intel_ddi_encoder_late_register +ffffffff81b9c400 t mtl_ddi_enable_d2d +ffffffff81b9c600 t intel_wait_ddi_buf_active +ffffffff81b9c980 t intel_ddi_main_link_aux_domain +ffffffff81b9ca80 t icl_program_mg_dp_mode +ffffffff81b9cdb0 t intel_ddi_init_dp_buf_reg +ffffffff81b9cfd0 t intel_disable_ddi_buf +ffffffff81b9d1b0 t mtl_disable_ddi_buf +ffffffff81b9d650 t intel_ddi_disable_fec_state +ffffffff81b9d7b0 t mtl_ddi_prepare_link_retrain +ffffffff81b9db50 t intel_ddi_prepare_link_retrain +ffffffff81b9e0e0 t intel_ddi_set_link_train +ffffffff81b9e240 t intel_ddi_set_idle_link_train +ffffffff81b9e430 t intel_ddi_dp_voltage_max +ffffffff81b9e4f0 t intel_ddi_dp_preemph_max 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intel_cpu_transcoder_set_m1_n1 +ffffffff81ba3940 T intel_cpu_transcoder_set_m2_n2 +ffffffff81ba3ab0 T i9xx_set_pipeconf +ffffffff81ba3c70 T ilk_set_pipeconf +ffffffff81ba3e50 T bdw_get_pipe_misc_bpp +ffffffff81ba3f30 T ilk_get_lanes_required +ffffffff81ba3f90 T intel_get_m_n +ffffffff81ba40c0 T intel_cpu_transcoder_get_m1_n1 +ffffffff81ba4290 T intel_cpu_transcoder_get_m2_n2 +ffffffff81ba4420 T intel_crtc_get_pipe_config +ffffffff81ba44a0 T i9xx_crtc_clock_get +ffffffff81ba4770 T intel_dotclock_calculate +ffffffff81ba47d0 T intel_crtc_dotclock +ffffffff81ba48a0 T intel_encoder_current_mode +ffffffff81ba4aa0 T intel_fuzzy_clock_check +ffffffff81ba4af0 T intel_pipe_config_compare +ffffffff81ba8560 t pipe_config_mismatch +ffffffff81ba8660 t pipe_config_infoframe_mismatch +ffffffff81ba8850 T intel_modeset_all_pipes +ffffffff81ba8a80 T intel_atomic_add_affected_planes +ffffffff81ba8b60 T intel_calc_active_pipes +ffffffff81ba8bf0 T intel_atomic_check +ffffffff81baaf30 t copy_bigjoiner_crtc_state_nomodeset +ffffffff81bab060 t intel_atomic_check_planes +ffffffff81babb50 t intel_modeset_checks +ffffffff81babce0 t intel_atomic_check_crtcs +ffffffff81bac170 t intel_async_flip_check_hw +ffffffff81bac660 T intel_crtc_arm_fifo_underrun +ffffffff81bac700 T intel_atomic_helper_free_state_worker +ffffffff81bac780 T intel_atomic_commit +ffffffff81bacb80 t intel_atomic_commit_ready +ffffffff81bacc10 t intel_atomic_commit_work +ffffffff81bacc30 t intel_atomic_commit_tail +ffffffff81bae0b0 T intel_plane_destroy +ffffffff81bae0f0 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81bae170 T assert_port_valid +ffffffff81bae1f0 T intel_setup_outputs +ffffffff81baec70 T intel_mode_valid +ffffffff81baedf0 T intel_cpu_transcoder_mode_valid +ffffffff81baeeb0 T intel_mode_valid_max_plane_size +ffffffff81baef30 T intel_init_display_hooks +ffffffff81baefb0 T intel_initial_commit +ffffffff81baf1c0 T i830_enable_pipe +ffffffff81baf940 T i830_disable_pipe +ffffffff81bafcd0 T intel_hpd_poll_fini +ffffffff81bafe10 T intel_scanout_needs_vtd_wa +ffffffff81bafe50 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81bafff0 t intel_atomic_cleanup_work +ffffffff81bb0120 t intel_pre_plane_update +ffffffff81bb0730 t hsw_get_pipe_config +ffffffff81bb1520 t hsw_crtc_enable +ffffffff81bb20d0 t hsw_crtc_disable +ffffffff81bb2430 t skl_commit_modeset_enables +ffffffff81bb2a70 t intel_get_transcoder_timings +ffffffff81bb2dc0 t intel_get_pipe_src_size +ffffffff81bb2ef0 t ilk_get_pfit_config +ffffffff81bb3090 t enabled_bigjoiner_pipes +ffffffff81bb3300 t bdw_set_pipe_misc +ffffffff81bb3460 t ilk_pfit_enable +ffffffff81bb3590 t intel_set_transcoder_timings +ffffffff81bb3990 t intel_update_crtc +ffffffff81bb40e0 t intel_commit_modeset_enables +ffffffff81bb4220 t ilk_get_pipe_config +ffffffff81bb44c0 t ilk_crtc_enable +ffffffff81bb4940 t ilk_crtc_disable +ffffffff81bb4c20 t i9xx_get_pipe_config +ffffffff81bb54a0 t valleyview_crtc_enable +ffffffff81bb59c0 t i9xx_crtc_disable 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ivb_display_irq_handler +ffffffff81bbce10 T gen8_de_pipe_underrun_mask +ffffffff81bbce50 T gen8_de_irq_handler +ffffffff81bbdbe0 T gen11_gu_misc_irq_ack +ffffffff81bbdc30 T gen11_gu_misc_irq_handler +ffffffff81bbdc70 T gen11_display_irq_handler +ffffffff81bbdd00 T i8xx_enable_vblank +ffffffff81bbdd90 T i915gm_enable_vblank +ffffffff81bbde60 T i965_enable_vblank +ffffffff81bbdef0 T ilk_enable_vblank +ffffffff81bbdfc0 T bdw_enable_vblank +ffffffff81bbe1d0 T i8xx_disable_vblank +ffffffff81bbe240 T i915gm_disable_vblank +ffffffff81bbe320 T i965_disable_vblank +ffffffff81bbe390 T ilk_disable_vblank +ffffffff81bbe4b0 T bdw_disable_vblank +ffffffff81bbe680 T vlv_display_irq_reset +ffffffff81bbe7a0 T vlv_display_irq_postinstall +ffffffff81bbe910 T gen8_display_irq_reset +ffffffff81bbeae0 T gen11_display_irq_reset +ffffffff81bbee10 T gen8_irq_power_well_post_enable +ffffffff81bbefb0 T gen8_irq_power_well_pre_disable +ffffffff81bbf100 T valleyview_enable_display_irqs +ffffffff81bbf260 T valleyview_disable_display_irqs +ffffffff81bbf3b0 T ilk_de_irq_postinstall +ffffffff81bbf4d0 T gen8_de_irq_postinstall +ffffffff81bbf9b0 T gen11_de_irq_postinstall +ffffffff81bbfa30 T dg1_de_irq_postinstall +ffffffff81bbfab0 T intel_display_irq_init +ffffffff81bc0000 T intel_display_power_domain_str +ffffffff81bc0070 T __intel_display_power_is_enabled +ffffffff81bc0150 T intel_display_power_is_enabled +ffffffff81bc0290 T intel_display_power_set_target_dc_state +ffffffff81bc03e0 T intel_display_power_get +ffffffff81bc0480 t __intel_display_power_get_domain +ffffffff81bc0690 T intel_display_power_get_if_enabled +ffffffff81bc0810 T __intel_display_power_put_async +ffffffff81bc0a40 t __intel_display_power_put_domain +ffffffff81bc0be0 T intel_display_power_flush_work +ffffffff81bc0d30 t release_async_put_domains +ffffffff81bc0e40 T intel_display_power_put_unchecked +ffffffff81bc0eb0 T intel_display_power_get_in_set +ffffffff81bc0fb0 T intel_display_power_get_in_set_if_enabled +ffffffff81bc1070 T intel_display_power_put_mask_in_set +ffffffff81bc1160 T intel_power_domains_init +ffffffff81bc13e0 t intel_display_power_put_async_work +ffffffff81bc16b0 T intel_power_domains_cleanup +ffffffff81bc16d0 T gen9_dbuf_slices_update +ffffffff81bc1930 T intel_power_domains_init_hw +ffffffff81bc1fa0 t icl_display_core_init +ffffffff81bc28b0 t bxt_display_core_init +ffffffff81bc2a60 t vlv_cmnlane_wa +ffffffff81bc2b70 t assert_ved_power_gated +ffffffff81bc2c40 t hsw_assert_cdclk +ffffffff81bc2d80 t intel_pch_reset_handshake +ffffffff81bc2e30 T intel_power_domains_driver_remove +ffffffff81bc2f50 T intel_power_domains_sanitize_state +ffffffff81bc3070 T intel_power_domains_enable +ffffffff81bc30e0 T intel_power_domains_disable +ffffffff81bc31c0 T intel_power_domains_suspend +ffffffff81bc3420 t icl_display_core_uninit +ffffffff81bc3580 t bxt_display_core_uninit +ffffffff81bc3680 T intel_power_domains_resume +ffffffff81bc3780 T intel_display_power_suspend_late +ffffffff81bc3880 t hsw_enable_pc8 +ffffffff81bc47b0 T intel_display_power_resume_early +ffffffff81bc48c0 t hsw_disable_pc8 +ffffffff81bc4dd0 T intel_display_power_suspend +ffffffff81bc4e60 T intel_display_power_resume +ffffffff81bc4f80 T intel_display_power_debug +ffffffff81bc5080 T intel_display_power_ddi_io_domain +ffffffff81bc5180 T intel_display_power_ddi_lanes_domain +ffffffff81bc5280 T intel_display_power_aux_io_domain +ffffffff81bc5390 T intel_display_power_legacy_aux_domain +ffffffff81bc54a0 T intel_display_power_tbt_aux_domain +ffffffff81bc55b0 t __delayed_work_tick +ffffffff81bc6000 T intel_display_power_map_init +ffffffff81bc6180 t __set_power_wells +ffffffff81bc6580 T intel_display_power_map_cleanup +ffffffff81bc7000 T lookup_power_well +ffffffff81bc70c0 T intel_power_well_enable +ffffffff81bc7160 T intel_power_well_name +ffffffff81bc71a0 T intel_power_well_disable +ffffffff81bc7210 T intel_power_well_sync_hw +ffffffff81bc7290 T intel_power_well_get +ffffffff81bc7340 T intel_power_well_put +ffffffff81bc7440 T intel_power_well_is_enabled +ffffffff81bc7460 T intel_power_well_is_enabled_cached +ffffffff81bc7490 T intel_display_power_well_is_enabled +ffffffff81bc7550 T intel_power_well_is_always_on +ffffffff81bc7590 T intel_power_well_domains +ffffffff81bc75c0 T intel_power_well_refcount +ffffffff81bc75f0 T gen9_sanitize_dc_state +ffffffff81bc76d0 T gen9_set_dc_state +ffffffff81bc7aa0 T gen9_enable_dc5 +ffffffff81bc7d60 T skl_enable_dc6 +ffffffff81bc7ef0 T bxt_enable_dc9 +ffffffff81bc80f0 T bxt_disable_dc9 +ffffffff81bc8210 T gen9_disable_dc_states +ffffffff81bc8650 T chv_phy_powergate_ch +ffffffff81bc8780 t assert_chv_phy_status +ffffffff81bc8b70 T chv_phy_powergate_lanes +ffffffff81bc8e30 t i9xx_power_well_sync_hw_noop +ffffffff81bc8e60 t i9xx_always_on_power_well_noop +ffffffff81bc8e90 t i9xx_always_on_power_well_enabled +ffffffff81bc8ec0 t chv_pipe_power_well_sync_hw +ffffffff81bc8ef0 t chv_pipe_power_well_enable +ffffffff81bc8f30 t chv_pipe_power_well_disable +ffffffff81bc8fc0 t chv_pipe_power_well_enabled +ffffffff81bc90e0 t chv_dpio_cmn_power_well_enable +ffffffff81bc9360 t chv_dpio_cmn_power_well_disable +ffffffff81bc94c0 t vlv_power_well_enabled +ffffffff81bc9600 t i830_pipes_power_well_sync_hw +ffffffff81bc9710 t i830_pipes_power_well_enable +ffffffff81bc97e0 t i830_pipes_power_well_disable +ffffffff81bc9820 t i830_pipes_power_well_enabled +ffffffff81bc98d0 t hsw_power_well_sync_hw +ffffffff81bc99e0 t hsw_power_well_enable +ffffffff81bc9ca0 t hsw_power_well_disable +ffffffff81bc9d70 t hsw_power_well_enabled +ffffffff81bc9e70 t gen9_dc_off_power_well_enable +ffffffff81bc9e80 t gen9_dc_off_power_well_disable +ffffffff81bc9f30 t gen9_dc_off_power_well_enabled +ffffffff81bc9fd0 t bxt_dpio_cmn_power_well_enable +ffffffff81bca000 t bxt_dpio_cmn_power_well_disable +ffffffff81bca030 t bxt_dpio_cmn_power_well_enabled +ffffffff81bca060 t vlv_display_power_well_enable +ffffffff81bca0a0 t vlv_display_power_well_disable +ffffffff81bca140 t vlv_dpio_cmn_power_well_enable +ffffffff81bca1e0 t vlv_dpio_cmn_power_well_disable +ffffffff81bca310 t vlv_power_well_enable +ffffffff81bca330 t vlv_power_well_disable +ffffffff81bca350 t icl_aux_power_well_enable +ffffffff81bcab20 t icl_aux_power_well_disable +ffffffff81bcadf0 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81bcae10 t tgl_tc_cold_off_power_well_enable +ffffffff81bcae30 t tgl_tc_cold_off_power_well_disable +ffffffff81bcae50 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81bcae80 t xelpdp_aux_power_well_enable +ffffffff81bcaf60 t xelpdp_aux_power_well_disable +ffffffff81bcb040 t xelpdp_aux_power_well_enabled +ffffffff81bcb100 t chv_set_pipe_power_well +ffffffff81bcb360 t vlv_display_power_well_init +ffffffff81bcb780 t vlv_set_power_well +ffffffff81bcba00 t hsw_wait_for_power_well_enable +ffffffff81bcbb60 t hsw_wait_for_power_well_disable +ffffffff81bcbe80 t tgl_tc_cold_request +ffffffff81bcd000 T intel_display_reset_prepare +ffffffff81bcd240 T intel_display_reset_finish +ffffffff81bce000 T intel_display_rps_boost_after_vblank +ffffffff81bce140 t do_rps_boost +ffffffff81bce200 T intel_display_rps_mark_interactive +ffffffff81bcf000 T intel_dkl_phy_init +ffffffff81bcf020 T intel_dkl_phy_read +ffffffff81bcf170 T intel_dkl_phy_write +ffffffff81bcf2a0 T intel_dkl_phy_rmw +ffffffff81bcf400 T intel_dkl_phy_posting_read +ffffffff81bd0000 T intel_dmc_has_payload +ffffffff81bd0050 T intel_dmc_enable_pipe +ffffffff81bd0180 T intel_dmc_disable_pipe +ffffffff81bd02b0 T intel_dmc_load_program +ffffffff81bd0bb0 t pipedmc_clock_gating_wa +ffffffff81bd0e00 T intel_dmc_disable_program +ffffffff81bd1060 T assert_dmc_loaded +ffffffff81bd1220 T intel_dmc_init +ffffffff81bd1510 t dmc_load_work_fn +ffffffff81bd1ef0 T intel_dmc_suspend +ffffffff81bd1f80 T intel_dmc_resume +ffffffff81bd2030 T intel_dmc_fini +ffffffff81bd21c0 T intel_dmc_print_error_state +ffffffff81bd22d0 T intel_dmc_debugfs_register +ffffffff81bd3000 T intel_dp_is_edp +ffffffff81bd3030 T intel_dp_is_uhbr +ffffffff81bd3070 T intel_dp_max_lane_count +ffffffff81bd30e0 T intel_dp_link_required +ffffffff81bd3120 T intel_dp_max_data_rate +ffffffff81bd3180 T intel_dp_can_bigjoiner +ffffffff81bd31f0 T intel_dp_get_link_train_fallback_values +ffffffff81bd35f0 T intel_dp_mode_to_fec_clock +ffffffff81bd3640 T intel_dp_dsc_nearest_valid_bpp +ffffffff81bd3750 T intel_dp_dsc_get_output_bpp +ffffffff81bd3880 T intel_dp_dsc_get_slice_count +ffffffff81bd3a30 T intel_dp_min_bpp +ffffffff81bd3a70 T intel_dp_need_bigjoiner +ffffffff81bd3ae0 T intel_dp_source_supports_tps3 +ffffffff81bd3b30 T intel_dp_source_supports_tps4 +ffffffff81bd3b70 T intel_dp_max_link_rate +ffffffff81bd3c30 T intel_dp_rate_select +ffffffff81bd3cd0 T intel_dp_compute_rate +ffffffff81bd3db0 T intel_dp_has_hdmi_sink +ffffffff81bd3df0 T intel_dp_adjust_compliance_config +ffffffff81bd3f40 T intel_dp_dsc_compute_bpp +ffffffff81bd4000 T intel_dp_dsc_compute_config +ffffffff81bd4760 T intel_dp_limited_color_range +ffffffff81bd47d0 T intel_dp_compute_psr_vsc_sdp +ffffffff81bd4850 T intel_dp_needs_vsc_sdp +ffffffff81bd48a0 t intel_dp_compute_vsc_colorimetry +ffffffff81bd4a20 T intel_dp_compute_config +ffffffff81bd4ef0 t intel_dp_compute_output_format +ffffffff81bd5150 t intel_dp_audio_compute_config +ffffffff81bd5240 t intel_dp_drrs_compute_config +ffffffff81bd5430 t intel_dp_compute_vsc_sdp +ffffffff81bd54e0 t intel_dp_compute_hdr_metadata_infoframe_sdp +ffffffff81bd5590 T intel_dp_set_link_params +ffffffff81bd55d0 T intel_edp_backlight_on +ffffffff81bd5680 T intel_edp_backlight_off +ffffffff81bd5730 T intel_dp_sink_set_decompression_state +ffffffff81bd57e0 T intel_dp_wait_source_oui +ffffffff81bd58e0 T intel_dp_set_power +ffffffff81bd5b60 T intel_dp_sync_state +ffffffff81bd5bf0 t intel_dp_get_dpcd +ffffffff81bd5d90 t intel_dp_reset_max_link_params +ffffffff81bd5eb0 T intel_dp_initial_fastset_check +ffffffff81bd6000 T intel_dp_check_frl_training +ffffffff81bd6690 T intel_dp_pcon_dsc_configure +ffffffff81bd68c0 T intel_dp_configure_protocol_converter +ffffffff81bd6ab0 T intel_dp_get_colorimetry_status +ffffffff81bd6b20 T intel_edp_fixup_vbt_bpp +ffffffff81bd6bb0 T intel_write_dp_vsc_sdp +ffffffff81bd6d60 T intel_dp_set_infoframes +ffffffff81bd6ea0 t intel_write_dp_sdp +ffffffff81bd71a0 T intel_read_dp_sdp +ffffffff81bd74f0 T intel_dp_get_active_pipes +ffffffff81bd7750 T intel_dp_retrain_link +ffffffff81bd7ac0 t intel_dp_needs_link_retrain +ffffffff81bd7c70 T intel_dp_phy_test +ffffffff81bd8440 T intel_digital_port_connected +ffffffff81bd8510 T intel_dp_encoder_flush_work +ffffffff81bd8590 T intel_dp_encoder_suspend +ffffffff81bd85d0 T intel_dp_encoder_shutdown +ffffffff81bd8610 T intel_dp_hpd_pulse +ffffffff81bd8da0 T intel_dp_is_port_edp +ffffffff81bd8e30 T intel_dp_init_connector +ffffffff81bda260 t intel_dp_modeset_retry_work_fn +ffffffff81bda320 t intel_dp_set_common_rates +ffffffff81bda4c0 T intel_dp_mst_suspend +ffffffff81bda570 T intel_dp_mst_resume +ffffffff81bda640 t intel_dp_output_format +ffffffff81bda780 t intel_dp_compute_link_config +ffffffff81bdafe0 t intel_dp_tmds_clock_valid +ffffffff81bdb080 t intel_dp_set_sink_rates +ffffffff81bdb2e0 t intel_dp_check_device_service_irq +ffffffff81bdb990 t intel_dp_force +ffffffff81bdbaf0 t intel_dp_connector_register +ffffffff81bdbbf0 t intel_dp_connector_unregister +ffffffff81bdbc50 t intel_dp_oob_hotplug_event +ffffffff81bdbce0 t intel_dp_set_edid +ffffffff81bdc190 t intel_dp_get_modes +ffffffff81bdc2a0 t intel_dp_detect +ffffffff81bdcc70 t intel_dp_mode_valid +ffffffff81bdd070 t intel_dp_connector_atomic_check +ffffffff81bdd480 t intel_dp_get_dsc_sink_cap +ffffffff81bdd610 t intel_dp_mode_min_output_bpp +ffffffff81bdd680 t intel_dp_mode_valid_downstream +ffffffff81bdd870 t icl_max_source_rate +ffffffff81bde000 T intel_dp_aux_pack +ffffffff81bde070 T intel_dp_aux_fini +ffffffff81bde090 T intel_dp_aux_init +ffffffff81bde2b0 t xelpdp_aux_ctl_reg +ffffffff81bde390 t xelpdp_aux_data_reg +ffffffff81bde470 t tgl_aux_ctl_reg +ffffffff81bde500 t tgl_aux_data_reg +ffffffff81bde5a0 t skl_aux_ctl_reg +ffffffff81bde630 t skl_aux_data_reg +ffffffff81bde6d0 t ilk_aux_ctl_reg +ffffffff81bde750 t ilk_aux_data_reg +ffffffff81bde7e0 t g4x_aux_ctl_reg +ffffffff81bde870 t g4x_aux_data_reg +ffffffff81bde910 t skl_get_aux_clock_divider +ffffffff81bde940 t hsw_get_aux_clock_divider +ffffffff81bde9d0 t ilk_get_aux_clock_divider +ffffffff81bdea30 t g4x_get_aux_clock_divider +ffffffff81bdea80 t skl_get_aux_send_ctl +ffffffff81bdeb00 t g4x_get_aux_send_ctl +ffffffff81bdeb60 t kasprintf +ffffffff81bdec40 t intel_dp_aux_transfer +ffffffff81bdef00 T intel_dp_aux_ch +ffffffff81bdf080 T intel_dp_aux_irq_handler +ffffffff81bdf120 t intel_dp_aux_xfer +ffffffff81be0000 T intel_dp_aux_init_backlight_funcs +ffffffff81be0290 t intel_dp_aux_hdr_setup_backlight +ffffffff81be0430 t intel_dp_aux_hdr_get_backlight +ffffffff81be05e0 t intel_dp_aux_hdr_set_backlight +ffffffff81be06f0 t intel_dp_aux_hdr_disable_backlight +ffffffff81be0780 t intel_dp_aux_hdr_enable_backlight +ffffffff81be0a10 t intel_dp_aux_vesa_setup_backlight +ffffffff81be0ca0 t intel_dp_aux_vesa_get_backlight +ffffffff81be0cd0 t intel_dp_aux_vesa_set_backlight +ffffffff81be0d70 t intel_dp_aux_vesa_disable_backlight +ffffffff81be0e30 t intel_dp_aux_vesa_enable_backlight +ffffffff81be1000 T intel_dp_hdcp_init +ffffffff81be10c0 t intel_dp_hdcp_write_an_aksv +ffffffff81be11d0 t intel_dp_hdcp_read_bksv +ffffffff81be1270 t intel_dp_hdcp_read_bstatus +ffffffff81be1310 t intel_dp_hdcp_repeater_present +ffffffff81be13d0 t intel_dp_hdcp_read_ri_prime +ffffffff81be1470 t intel_dp_hdcp_read_ksv_ready +ffffffff81be1520 t intel_dp_hdcp_read_ksv_fifo +ffffffff81be1620 t intel_dp_hdcp_read_v_prime_part +ffffffff81be16d0 t intel_dp_hdcp_toggle_signalling +ffffffff81be1700 t intel_dp_mst_hdcp_stream_encryption +ffffffff81be1910 t intel_dp_hdcp_check_link +ffffffff81be19a0 t intel_dp_hdcp_capable +ffffffff81be1a60 t intel_dp_hdcp2_capable +ffffffff81be1af0 t intel_dp_hdcp2_write_msg +ffffffff81be1cb0 t intel_dp_hdcp2_read_msg +ffffffff81be2400 t intel_dp_hdcp2_config_stream_type +ffffffff81be2460 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81be2700 t intel_dp_mst_hdcp2_check_link +ffffffff81be27d0 t intel_dp_hdcp2_check_link +ffffffff81be3000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81be3100 t intel_dp_init_lttpr +ffffffff81be3450 T intel_dp_get_adjust_train +ffffffff81be3cc0 T intel_dp_program_link_training_pattern +ffffffff81be3df0 T intel_dp_set_signal_levels +ffffffff81be41c0 T intel_dp_dump_link_status +ffffffff81be42c0 T intel_dp_stop_link_train +ffffffff81be45e0 T intel_dp_start_link_train +ffffffff81be68c0 T intel_dp_128b132b_sdp_crc16 +ffffffff81be69b0 t intel_dp_link_train_phy +ffffffff81be9000 T intel_dp_mst_encoder_active_links +ffffffff81be9030 T intel_dp_mst_encoder_init +ffffffff81be92a0 T intel_dp_mst_source_support +ffffffff81be92e0 T intel_dp_mst_encoder_cleanup +ffffffff81be9340 T intel_dp_mst_is_master_trans +ffffffff81be9380 T intel_dp_mst_is_slave_trans +ffffffff81be93c0 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81be9490 t intel_dp_add_mst_connector +ffffffff81be9750 t intel_dp_mst_poll_hpd_irq +ffffffff81be9770 t intel_dp_mst_get_hw_state +ffffffff81be97e0 t intel_dp_mst_connector_late_register +ffffffff81be9870 t intel_dp_mst_connector_early_unregister +ffffffff81be98b0 t intel_dp_mst_get_modes +ffffffff81be9960 t intel_dp_mst_detect +ffffffff81be9a70 t intel_dp_mst_mode_valid_ctx +ffffffff81be9d10 t intel_mst_atomic_best_encoder +ffffffff81be9d70 t intel_dp_mst_atomic_check +ffffffff81be9f60 t intel_dp_mst_compute_config +ffffffff81bea590 t intel_dp_mst_compute_config_late +ffffffff81bea6a0 t intel_mst_disable_dp +ffffffff81bea7c0 t intel_mst_post_disable_dp +ffffffff81beaaf0 t intel_mst_post_pll_disable_dp +ffffffff81beab50 t intel_mst_pre_pll_enable_dp +ffffffff81beab90 t intel_mst_pre_enable_dp +ffffffff81beae00 t intel_mst_enable_dp +ffffffff81beb250 t intel_dp_mst_enc_get_hw_state +ffffffff81beb290 t intel_dp_mst_enc_get_config +ffffffff81beb2b0 t intel_dp_mst_initial_fastset_check +ffffffff81beb2d0 t intel_dp_mst_encoder_destroy +ffffffff81beb310 t intel_dp_mst_find_vcpi_slots_for_bpp +ffffffff81bec000 T bxt_port_to_phy_channel +ffffffff81bec120 T bxt_ddi_phy_set_signal_levels +ffffffff81bec570 T bxt_ddi_phy_is_enabled +ffffffff81bec6c0 T bxt_ddi_phy_uninit +ffffffff81bec7c0 T bxt_ddi_phy_init +ffffffff81beca20 t _bxt_ddi_phy_init +ffffffff81bed020 T bxt_ddi_phy_verify_state +ffffffff81bed370 t __phy_reg_verify_state +ffffffff81bed490 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81bed500 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81bed7b0 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81bed9c0 T vlv_dig_port_to_channel +ffffffff81beda30 T vlv_dig_port_to_phy +ffffffff81bedaa0 T vlv_pipe_to_channel +ffffffff81bedb00 T chv_set_phy_signal_level +ffffffff81bedef0 T chv_data_lane_soft_reset +ffffffff81bee0f0 T chv_phy_pre_pll_enable +ffffffff81bee400 T chv_phy_pre_encoder_enable +ffffffff81bee6c0 T chv_phy_release_cl2_override +ffffffff81bee750 T chv_phy_post_pll_disable +ffffffff81bee830 T vlv_set_phy_signal_level +ffffffff81bee9e0 T vlv_phy_pre_pll_enable +ffffffff81beeb20 T vlv_phy_pre_encoder_enable +ffffffff81beec50 T vlv_phy_reset_lanes +ffffffff81bef000 T pnv_calc_dpll_params +ffffffff81bef0c0 T i9xx_calc_dpll_params +ffffffff81bef190 T vlv_calc_dpll_params +ffffffff81bef250 T chv_calc_dpll_params +ffffffff81bef330 T bxt_find_best_dpll +ffffffff81bef350 t chv_find_best_dpll +ffffffff81bef6a0 T i9xx_dpll_compute_fp +ffffffff81bef6e0 T vlv_compute_dpll +ffffffff81bef760 T chv_compute_dpll +ffffffff81bef7e0 T intel_dpll_crtc_compute_clock +ffffffff81bef8f0 T intel_dpll_crtc_get_shared_dpll +ffffffff81befa70 T intel_dpll_init_clock_hook +ffffffff81befb80 T i9xx_enable_pll +ffffffff81bf0010 T vlv_enable_pll +ffffffff81bf0640 T chv_enable_pll +ffffffff81bf0d40 T vlv_force_pll_on +ffffffff81bf0ec0 T vlv_disable_pll +ffffffff81bf0fb0 T chv_disable_pll +ffffffff81bf1130 T i9xx_disable_pll +ffffffff81bf1260 T vlv_force_pll_off +ffffffff81bf1380 T assert_pll_enabled +ffffffff81bf1490 T assert_pll_disabled +ffffffff81bf15a0 t intel_pll_is_valid +ffffffff81bf1660 t mtl_crtc_compute_clock +ffffffff81bf1760 t dg2_crtc_compute_clock +ffffffff81bf1800 t hsw_crtc_compute_clock +ffffffff81bf18e0 t hsw_crtc_get_shared_dpll +ffffffff81bf1990 t ilk_crtc_compute_clock +ffffffff81bf1ce0 t ilk_crtc_get_shared_dpll +ffffffff81bf1d30 t g4x_find_best_dpll +ffffffff81bf2090 t chv_crtc_compute_clock +ffffffff81bf21b0 t vlv_crtc_compute_clock +ffffffff81bf2660 t g4x_crtc_compute_clock +ffffffff81bf27f0 t i9xx_compute_dpll +ffffffff81bf2a90 t pnv_crtc_compute_clock +ffffffff81bf2ea0 t i9xx_crtc_compute_clock +ffffffff81bf2fe0 t i9xx_find_best_dpll +ffffffff81bf3320 t i8xx_crtc_compute_clock +ffffffff81bf4000 T intel_get_shared_dpll_by_id +ffffffff81bf4040 T assert_shared_dpll +ffffffff81bf4200 T intel_dpll_get_hw_state +ffffffff81bf4230 T icl_tc_port_to_pll_id +ffffffff81bf4260 T intel_enable_shared_dpll +ffffffff81bf4610 T intel_disable_shared_dpll +ffffffff81bf48f0 T intel_unreference_shared_dpll_crtc +ffffffff81bf4a00 T intel_shared_dpll_swap_state +ffffffff81bf4b00 T icl_set_active_port_dpll +ffffffff81bf4b40 T intel_shared_dpll_init +ffffffff81bf4d60 T intel_compute_shared_dplls +ffffffff81bf4df0 T intel_reserve_shared_dplls +ffffffff81bf4e80 T intel_release_shared_dplls +ffffffff81bf4ec0 T intel_update_active_dpll +ffffffff81bf4f20 T intel_dpll_get_freq +ffffffff81bf4fb0 T intel_dpll_update_ref_clks +ffffffff81bf5000 T intel_dpll_readout_hw_state +ffffffff81bf5260 T intel_dpll_sanitize_state +ffffffff81bf5360 T intel_dpll_dump_hw_state +ffffffff81bf53f0 T intel_shared_dpll_state_verify +ffffffff81bf55e0 t verify_single_dpll_state +ffffffff81bf5c10 T intel_shared_dpll_verify_disabled +ffffffff81bf5ca0 t icl_compute_dplls +ffffffff81bf6940 t icl_get_dplls +ffffffff81bf6ca0 t icl_put_dplls +ffffffff81bf6d60 t icl_update_active_dpll +ffffffff81bf6e20 t icl_update_dpll_ref_clks +ffffffff81bf6e60 t icl_dump_hw_state +ffffffff81bf6f30 t combo_pll_enable +ffffffff81bf7190 t combo_pll_disable +ffffffff81bf7270 t combo_pll_get_hw_state +ffffffff81bf72f0 t icl_ddi_combo_pll_get_freq +ffffffff81bf74d0 t icl_dpll_write +ffffffff81bf7740 t adlp_cmtg_clock_gating_wa +ffffffff81bf78e0 t icl_pll_disable +ffffffff81bf7ab0 t icl_pll_get_hw_state +ffffffff81bf7e00 t tbt_pll_enable +ffffffff81bf8000 t tbt_pll_disable +ffffffff81bf8020 t tbt_pll_get_hw_state +ffffffff81bf8040 t icl_ddi_tbt_pll_get_freq +ffffffff81bf80b0 t mg_pll_enable +ffffffff81bf8820 t mg_pll_disable +ffffffff81bf8860 t dkl_pll_get_hw_state +ffffffff81bf8ad0 t icl_ddi_mg_pll_get_freq +ffffffff81bf8bb0 t icl_calc_dpll_state +ffffffff81bf8cf0 t intel_find_shared_dpll +ffffffff81bf9060 t intel_reference_shared_dpll +ffffffff81bf92b0 t intel_unreference_shared_dpll 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intel_dpt_create +ffffffff81bfe920 t dpt_insert_page +ffffffff81bfe990 t dpt_clear_range +ffffffff81bfe9c0 t dpt_insert_entries +ffffffff81bfeab0 t dpt_cleanup +ffffffff81bfeb00 t dpt_bind_vma +ffffffff81bfeba0 t dpt_unbind_vma +ffffffff81bfebd0 T intel_dpt_destroy +ffffffff81bfec20 T intel_dpt_configure +ffffffff81bfedf0 t __ww_mutex_lock +ffffffff81bff000 T intel_drrs_type_str +ffffffff81bff040 T intel_drrs_is_active +ffffffff81bff070 T intel_drrs_activate +ffffffff81bff270 T intel_drrs_deactivate +ffffffff81bff470 T intel_drrs_invalidate +ffffffff81bff490 t intel_drrs_frontbuffer_update +ffffffff81bff720 T intel_drrs_flush +ffffffff81bff740 T intel_drrs_crtc_init +ffffffff81bff800 t intel_drrs_downclock_work +ffffffff81bff950 T intel_drrs_crtc_debugfs_add +ffffffff81bff980 T intel_drrs_connector_debugfs_add +ffffffff81bff990 t __delayed_work_tick +ffffffff81c00000 T intel_dsb_reg_write +ffffffff81c00140 T intel_dsb_finish +ffffffff81c001c0 T intel_dsb_commit +ffffffff81c00390 T intel_dsb_wait +ffffffff81c005b0 T intel_dsb_prepare +ffffffff81c00780 T intel_dsb_cleanup +ffffffff81c01000 T intel_dsi_wait_panel_power_cycle +ffffffff81c010f0 T intel_dsi_shutdown +ffffffff81c011e0 T intel_dsi_bitrate +ffffffff81c01270 T intel_dsi_tlpx_ns +ffffffff81c012c0 T intel_dsi_get_modes +ffffffff81c012d0 T intel_dsi_mode_valid +ffffffff81c013a0 T intel_dsi_host_init +ffffffff81c01460 T intel_dsi_get_panel_orientation +ffffffff81c02000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81c020a0 t dcs_setup_backlight +ffffffff81c02130 t dcs_get_backlight +ffffffff81c02230 t dcs_set_backlight +ffffffff81c02330 t dcs_disable_backlight +ffffffff81c02700 t dcs_enable_backlight +ffffffff81c03000 T intel_dsi_vbt_exec_sequence +ffffffff81c03020 T intel_dsi_log_params +ffffffff81c03460 T intel_dsi_vbt_init +ffffffff81c03970 T intel_dsi_vbt_gpio_init +ffffffff81c03990 T intel_dsi_vbt_gpio_cleanup +ffffffff81c04000 T intel_dvo_init +ffffffff81c04730 t intel_disable_dvo +ffffffff81c047f0 t intel_enable_dvo +ffffffff81c048f0 t intel_dvo_get_hw_state +ffffffff81c04970 t intel_dvo_get_config +ffffffff81c04a20 t intel_dvo_compute_config +ffffffff81c04ac0 t intel_dvo_pre_enable +ffffffff81c04bd0 t intel_dvo_connector_get_hw_state +ffffffff81c04c60 t intel_dvo_enc_destroy +ffffffff81c04ca0 t intel_dvo_detect +ffffffff81c04dc0 t intel_dvo_get_modes +ffffffff81c04e40 t intel_dvo_mode_valid +ffffffff81c05000 T intel_fb_get_format_info +ffffffff81c052b0 T intel_fb_is_tiled_modifier +ffffffff81c05300 t lookup_modifier +ffffffff81c05540 T intel_fb_is_ccs_modifier +ffffffff81c05590 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81c055e0 T intel_fb_is_mc_ccs_modifier +ffffffff81c05630 T intel_fb_plane_get_modifiers +ffffffff81c05830 T intel_fb_plane_supports_modifier +ffffffff81c058b0 T intel_format_info_is_yuv_semiplanar +ffffffff81c05930 T intel_fb_is_ccs_aux_plane +ffffffff81c059f0 T intel_fb_rc_ccs_cc_plane +ffffffff81c05ae0 T is_surface_linear +ffffffff81c05c70 T main_to_ccs_plane +ffffffff81c05d20 T skl_ccs_to_main_plane +ffffffff81c05e80 T skl_main_to_aux_plane +ffffffff81c05fc0 T intel_tile_size +ffffffff81c06000 T intel_tile_width_bytes +ffffffff81c06470 T intel_tile_height +ffffffff81c064e0 T intel_tile_row_size +ffffffff81c06570 T intel_fb_align_height +ffffffff81c065f0 T intel_fb_modifier_uses_dpt +ffffffff81c06630 T intel_fb_uses_dpt +ffffffff81c06690 T intel_cursor_alignment +ffffffff81c066f0 T intel_surf_alignment +ffffffff81c069c0 T intel_fb_plane_get_subsampling +ffffffff81c06b40 T intel_plane_adjust_aligned_offset +ffffffff81c06bc0 t intel_adjust_aligned_offset +ffffffff81c06d90 T intel_plane_compute_aligned_offset +ffffffff81c06ea0 t intel_compute_aligned_offset +ffffffff81c07090 T intel_fb_needs_pot_stride_remap +ffffffff81c07100 T intel_fb_supports_90_270_rotation +ffffffff81c07160 T intel_fill_fb_info +ffffffff81c07d90 t calc_plane_remap_info +ffffffff81c087b0 T intel_fb_fill_view +ffffffff81c08820 T intel_plane_compute_gtt +ffffffff81c08d60 t intel_plane_check_stride +ffffffff81c08ee0 T intel_framebuffer_init +ffffffff81c09880 t gen12_ccs_aux_stride +ffffffff81c09900 T intel_user_framebuffer_create +ffffffff81c09aa0 T intel_framebuffer_create +ffffffff81c09b50 t intel_adjust_tile_offset +ffffffff81c09c90 t intel_user_framebuffer_destroy +ffffffff81c09d10 t intel_user_framebuffer_create_handle +ffffffff81c09d40 t intel_user_framebuffer_dirty +ffffffff81c0a000 T intel_pin_and_fence_fb_obj +ffffffff81c0a3c0 t i915_gem_object_lock +ffffffff81c0a610 T intel_unpin_fb_vma +ffffffff81c0a680 T intel_plane_pin_fb +ffffffff81c0aab0 T intel_plane_unpin_fb +ffffffff81c0b000 T intel_fbc_cleanup +ffffffff81c0b240 T intel_fbc_pre_update +ffffffff81c0b900 T intel_fbc_post_update +ffffffff81c0bac0 T intel_fbc_invalidate +ffffffff81c0bc70 T intel_fbc_flush +ffffffff81c0bf60 T intel_fbc_atomic_check +ffffffff81c0c550 T intel_fbc_disable +ffffffff81c0c620 t __intel_fbc_disable +ffffffff81c0c780 T intel_fbc_update +ffffffff81c0cf00 T intel_fbc_reset_underrun +ffffffff81c0d090 T intel_fbc_handle_fifo_underrun_irq +ffffffff81c0d150 T intel_fbc_add_plane +ffffffff81c0d180 T intel_fbc_init +ffffffff81c0d440 T intel_fbc_sanitize +ffffffff81c0d520 T intel_fbc_crtc_debugfs_add +ffffffff81c0d550 T intel_fbc_debugfs_register +ffffffff81c0d580 t intel_fbc_is_ok +ffffffff81c0d700 t intel_fbc_update_state +ffffffff81c0daa0 t intel_fbc_underrun_work_fn +ffffffff81c0db90 t ivb_fbc_activate +ffffffff81c0de00 t ilk_fbc_deactivate +ffffffff81c0dec0 t ilk_fbc_is_active +ffffffff81c0df30 t ivb_fbc_is_compressing +ffffffff81c0dfa0 t snb_fbc_nuke +ffffffff81c0e020 t ilk_fbc_program_cfb +ffffffff81c0e080 t ivb_fbc_set_false_color +ffffffff81c0e100 t snb_fbc_activate +ffffffff81c0e1a0 t ilk_fbc_is_compressing +ffffffff81c0e210 t ilk_fbc_activate +ffffffff81c0e350 t i965_fbc_nuke +ffffffff81c0e3f0 t g4x_fbc_activate +ffffffff81c0e510 t g4x_fbc_deactivate +ffffffff81c0e5b0 t g4x_fbc_is_active +ffffffff81c0e610 t g4x_fbc_is_compressing +ffffffff81c0e670 t g4x_fbc_program_cfb +ffffffff81c0e6c0 t i8xx_fbc_activate +ffffffff81c0e850 t i8xx_fbc_deactivate +ffffffff81c0e950 t i8xx_fbc_is_active +ffffffff81c0e9b0 t i8xx_fbc_is_compressing +ffffffff81c0ea10 t i8xx_fbc_program_cfb +ffffffff81c0eab0 t i8xx_fbc_nuke +ffffffff81c0f000 T intel_fbdev_init +ffffffff81c0f590 t intel_fbdev_suspend_worker +ffffffff81c0f5c0 T intel_fbdev_initial_config_async +ffffffff81c0f630 T intel_fbdev_unregister +ffffffff81c0f670 T intel_fbdev_set_suspend +ffffffff81c0f6a0 T intel_fbdev_fini +ffffffff81c0f750 T intel_fbdev_output_poll_changed +ffffffff81c0f800 T intel_fbdev_restore_mode +ffffffff81c0f890 T intel_fbdev_framebuffer +ffffffff81c0f8d0 t intelfb_create +ffffffff81c10320 t intelfb_dirty +ffffffff81c10390 t intel_fbdev_set_par +ffffffff81c11000 T assert_fdi_tx_enabled +ffffffff81c11020 t assert_fdi_tx +ffffffff81c11170 T assert_fdi_tx_disabled +ffffffff81c11190 T assert_fdi_rx_enabled +ffffffff81c11280 T assert_fdi_rx_disabled +ffffffff81c11370 T assert_fdi_tx_pll_enabled +ffffffff81c11470 T assert_fdi_rx_pll_enabled +ffffffff81c11570 T assert_fdi_rx_pll_disabled +ffffffff81c11670 T intel_fdi_link_train +ffffffff81c11690 T intel_fdi_pll_freq_update +ffffffff81c11740 T intel_fdi_link_freq +ffffffff81c11790 T ilk_fdi_compute_config +ffffffff81c11b20 T intel_fdi_normal_train +ffffffff81c11ce0 T hsw_fdi_link_train +ffffffff81c12300 T hsw_fdi_disable +ffffffff81c124d0 T ilk_fdi_pll_enable +ffffffff81c12730 T ilk_fdi_pll_disable +ffffffff81c128b0 T ilk_fdi_disable +ffffffff81c12b80 T intel_fdi_init_hook +ffffffff81c12be0 t ilk_fdi_link_train +ffffffff81c133f0 t gen6_fdi_link_train +ffffffff81c13e60 t ivb_manual_fdi_link_train +ffffffff81c14920 t cpt_set_fdi_bc_bifurcation +ffffffff81c15000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81c15480 T intel_set_pch_fifo_underrun_reporting +ffffffff81c15720 T intel_cpu_fifo_underrun_irq_handler +ffffffff81c15940 T intel_pch_fifo_underrun_irq_handler +ffffffff81c159d0 T intel_check_cpu_fifo_underruns +ffffffff81c15c20 T intel_check_pch_fifo_underruns +ffffffff81c15d80 T intel_init_fifo_underrun_reporting +ffffffff81c16000 T intel_frontbuffer_flip_prepare +ffffffff81c16060 T intel_frontbuffer_flip_complete +ffffffff81c16180 T intel_frontbuffer_flip +ffffffff81c16290 T __intel_fb_invalidate +ffffffff81c16350 T __intel_fb_flush +ffffffff81c16480 T intel_frontbuffer_get +ffffffff81c16600 t frontbuffer_active +ffffffff81c16630 t frontbuffer_retire +ffffffff81c16670 T intel_frontbuffer_put +ffffffff81c167c0 T intel_frontbuffer_track +ffffffff81c17000 T intel_atomic_global_obj_init +ffffffff81c17070 T intel_atomic_global_obj_cleanup +ffffffff81c17170 T intel_atomic_get_global_obj_state +ffffffff81c173f0 T intel_atomic_get_old_global_obj_state +ffffffff81c17450 T intel_atomic_get_new_global_obj_state +ffffffff81c174b0 T intel_atomic_swap_global_state +ffffffff81c17600 T intel_atomic_clear_global_state +ffffffff81c17730 T intel_atomic_lock_global_state +ffffffff81c177c0 T intel_atomic_serialize_global_state +ffffffff81c17850 T intel_atomic_global_state_is_serialized +ffffffff81c18000 T intel_gmbus_is_valid_pin +ffffffff81c18100 T intel_gmbus_reset +ffffffff81c18170 T intel_bb_set_bits +ffffffff81c182d0 T intel_bb_set_dir +ffffffff81c18300 T intel_bb_read_bits +ffffffff81c184d0 T intel_acquire_bus +ffffffff81c18730 T intel_release_bus +ffffffff81c18910 T intel_send_start +ffffffff81c18930 T intel_send_stop +ffffffff81c18950 T intel_initiate_xfer +ffffffff81c18970 T intel_read_byte +ffffffff81c18990 T intel_write_byte +ffffffff81c189b0 T intel_gmbus_output_aksv +ffffffff81c18ab0 t do_gmbus_xfer +ffffffff81c19140 T intel_gmbus_setup +ffffffff81c194f0 T intel_gmbus_teardown +ffffffff81c19580 T intel_gmbus_get_adapter +ffffffff81c19600 T intel_gmbus_force_bit +ffffffff81c196b0 T intel_gmbus_is_forced_bit +ffffffff81c196e0 T intel_gmbus_irq_handler +ffffffff81c19780 t gmbus_xfer_read +ffffffff81c19a80 t gmbus_xfer_write +ffffffff81c19cd0 t gmbus_wait +ffffffff81c1a130 t gmbus_wait_idle +ffffffff81c1a300 t gmbus_xfer +ffffffff81c1a400 t gmbus_func +ffffffff81c1a450 t gmbus_lock_bus +ffffffff81c1a470 t gmbus_trylock_bus +ffffffff81c1a4d0 t gmbus_unlock_bus +ffffffff81c1b000 T intel_hdcp_capable +ffffffff81c1b0b0 t intel_hdcp_read_valid_bksv +ffffffff81c1b350 T intel_hdcp2_capable +ffffffff81c1b4b0 T is_hdcp_supported +ffffffff81c1b500 T intel_hdcp_component_init +ffffffff81c1b510 T intel_hdcp_init +ffffffff81c1b6c0 t intel_hdcp_check_work +ffffffff81c1e680 t intel_hdcp_prop_work +ffffffff81c1e720 T intel_hdcp_enable +ffffffff81c1e780 T intel_hdcp_disable +ffffffff81c1e900 t intel_hdcp_update_value +ffffffff81c1eb10 t _intel_hdcp2_disable +ffffffff81c1ef80 t _intel_hdcp_disable +ffffffff81c1f2e0 T intel_hdcp_update_pipe +ffffffff81c1f4e0 T intel_hdcp_component_fini +ffffffff81c1f590 T intel_hdcp_cleanup +ffffffff81c1f6e0 T intel_hdcp_atomic_check +ffffffff81c1f770 T intel_hdcp_handle_cp_irq +ffffffff81c1f890 t __delayed_work_tick +ffffffff81c1f8b0 t hdcp2_authenticate_repeater_topology +ffffffff81c1fbc0 t transcoder_name +ffffffff81c1fc00 t intel_hdcp_get_repeater_ctl +ffffffff81c1fce0 t ktime_get_raw +ffffffff81c1fd60 t wait_remaining_ms_from_jiffies +ffffffff81c1fdf0 t intel_hdcp_auth_downstream +ffffffff81c212e0 t intel_write_sha_text +ffffffff81c22000 T intel_hdcp_gsc_cs_required +ffffffff81c22040 T intel_hdcp_gsc_init +ffffffff81c22590 T intel_hdcp_gsc_fini +ffffffff81c22600 T intel_hdcp_gsc_msg_send +ffffffff81c229b0 t gsc_hdcp_initiate_session +ffffffff81c22a10 t gsc_hdcp_verify_receiver_cert_prepare_km +ffffffff81c22a70 t gsc_hdcp_verify_hprime +ffffffff81c22ad0 t gsc_hdcp_store_pairing_info +ffffffff81c22b30 t gsc_hdcp_initiate_locality_check +ffffffff81c22b90 t gsc_hdcp_verify_lprime +ffffffff81c22bf0 t gsc_hdcp_get_session_key +ffffffff81c22c50 t gsc_hdcp_repeater_check_flow_prepare_ack +ffffffff81c22cb0 t gsc_hdcp_verify_mprime +ffffffff81c22d10 t gsc_hdcp_enable_authentication +ffffffff81c22d70 t gsc_hdcp_close_session +ffffffff81c23000 T intel_hdmi_to_i915 +ffffffff81c23040 T hsw_write_infoframe +ffffffff81c234c0 t hsw_dip_data_reg +ffffffff81c23680 T hsw_read_infoframe +ffffffff81c23750 T intel_hdmi_infoframe_enable +ffffffff81c237f0 T intel_hdmi_infoframes_enabled +ffffffff81c23910 T intel_read_infoframe +ffffffff81c23ac0 T intel_hdmi_read_gcp_infoframe +ffffffff81c23ba0 T intel_dp_dual_mode_set_tmds_output +ffffffff81c23c70 T intel_hdmi_tmds_clock +ffffffff81c23cc0 T intel_hdmi_bpc_possible +ffffffff81c23df0 T intel_hdmi_limited_color_range +ffffffff81c23e60 T intel_hdmi_compute_has_hdmi_sink +ffffffff81c23ed0 T intel_hdmi_compute_config +ffffffff81c24520 t intel_hdmi_compute_output_format +ffffffff81c246a0 t intel_hdmi_compute_hdmi_infoframe +ffffffff81c24780 t intel_hdmi_compute_drm_infoframe +ffffffff81c24890 T intel_hdmi_encoder_shutdown +ffffffff81c24970 T intel_hdmi_handle_sink_scrambling +ffffffff81c24a70 T intel_infoframe_init +ffffffff81c24c10 t vlv_write_infoframe +ffffffff81c24f90 t vlv_read_infoframe +ffffffff81c25130 t vlv_set_infoframes +ffffffff81c254b0 t vlv_infoframes_enabled +ffffffff81c25550 t g4x_write_infoframe +ffffffff81c25840 t g4x_read_infoframe +ffffffff81c25990 t g4x_set_infoframes +ffffffff81c25c50 t g4x_infoframes_enabled +ffffffff81c25cd0 t hsw_set_infoframes +ffffffff81c25fb0 t hsw_infoframes_enabled +ffffffff81c26040 t ibx_write_infoframe +ffffffff81c26380 t ibx_read_infoframe +ffffffff81c26500 t ibx_set_infoframes +ffffffff81c26880 t ibx_infoframes_enabled +ffffffff81c26910 t cpt_write_infoframe +ffffffff81c26c50 t cpt_read_infoframe +ffffffff81c26dd0 t cpt_set_infoframes +ffffffff81c270f0 t cpt_infoframes_enabled +ffffffff81c27170 T intel_hdmi_init_connector +ffffffff81c27a00 T intel_hdmi_dsc_get_slice_height +ffffffff81c27a60 T intel_hdmi_dsc_get_num_slices +ffffffff81c27be0 T intel_hdmi_dsc_get_bpp +ffffffff81c27cc0 t intel_hdmi_compute_clock +ffffffff81c27f40 t hdmi_port_clock_valid +ffffffff81c281a0 t intel_write_infoframe +ffffffff81c28390 t intel_hdmi_detect +ffffffff81c28580 t intel_hdmi_force +ffffffff81c28630 t intel_hdmi_connector_register +ffffffff81c28640 t intel_hdmi_connector_unregister +ffffffff81c28650 t intel_hdmi_set_edid +ffffffff81c28990 t intel_hdmi_get_modes +ffffffff81c289a0 t intel_hdmi_mode_valid +ffffffff81c28b80 t intel_hdmi_connector_atomic_check +ffffffff81c28bb0 t intel_hdmi_mode_clock_valid +ffffffff81c28d70 t intel_hdmi_hdcp_write_an_aksv +ffffffff81c28ef0 t intel_hdmi_hdcp_read_bksv +ffffffff81c28fd0 t intel_hdmi_hdcp_read_bstatus +ffffffff81c290b0 t intel_hdmi_hdcp_repeater_present +ffffffff81c291a0 t intel_hdmi_hdcp_read_ri_prime +ffffffff81c29280 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81c29370 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81c29450 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81c29550 t intel_hdmi_hdcp_toggle_signalling +ffffffff81c29810 t intel_hdmi_hdcp_check_link +ffffffff81c29bb0 t intel_hdmi_hdcp2_capable +ffffffff81c29c80 t intel_hdmi_hdcp2_write_msg +ffffffff81c29da0 t intel_hdmi_hdcp2_read_msg +ffffffff81c2a210 t intel_hdmi_hdcp2_check_link +ffffffff81c2b000 T intel_hpd_pin_default +ffffffff81c2b030 T intel_encoder_hotplug +ffffffff81c2b190 T intel_hpd_trigger_irq +ffffffff81c2b210 T intel_hpd_irq_handler +ffffffff81c2b670 T intel_hpd_init +ffffffff81c2b790 T intel_hpd_poll_enable +ffffffff81c2b820 T intel_hpd_poll_disable +ffffffff81c2b880 T intel_hpd_init_early +ffffffff81c2b9d0 t i915_hotplug_work_func +ffffffff81c2be80 t i915_digport_work_func +ffffffff81c2c030 t i915_hpd_poll_init_work +ffffffff81c2c180 t intel_hpd_irq_storm_reenable_work +ffffffff81c2c4f0 T intel_hpd_cancel_work +ffffffff81c2c630 T intel_hpd_disable +ffffffff81c2c6d0 T intel_hpd_enable +ffffffff81c2c750 T intel_hpd_debugfs_register +ffffffff81c2c780 t __delayed_work_tick +ffffffff81c2d000 T i915_hotplug_interrupt_update_locked +ffffffff81c2d0c0 T i915_hotplug_interrupt_update +ffffffff81c2d1b0 T i9xx_hpd_irq_ack +ffffffff81c2d310 T i9xx_hpd_irq_handler +ffffffff81c2d4d0 T ibx_hpd_irq_handler +ffffffff81c2d6a0 T xelpdp_pica_irq_handler +ffffffff81c2d9c0 T icp_irq_handler +ffffffff81c2dca0 T spt_irq_handler +ffffffff81c2df70 T ilk_hpd_irq_handler +ffffffff81c2e0b0 T bxt_hpd_irq_handler +ffffffff81c2e230 T gen11_hpd_irq_handler +ffffffff81c2e4d0 T intel_hpd_enable_detection +ffffffff81c2e510 T intel_hpd_irq_setup +ffffffff81c2e560 T intel_hotplug_irq_init +ffffffff81c2e7f0 t i915_hpd_irq_setup +ffffffff81c2e910 t i915_hpd_enable_detection +ffffffff81c2e9c0 t icp_hpd_irq_setup +ffffffff81c2ebd0 t icp_hpd_enable_detection +ffffffff81c2ece0 t dg1_hpd_irq_setup +ffffffff81c2ed50 t dg1_hpd_enable_detection +ffffffff81c2eec0 t xelpdp_hpd_irq_setup +ffffffff81c2f340 t xelpdp_hpd_enable_detection +ffffffff81c2f510 t gen11_hpd_irq_setup +ffffffff81c2f7a0 t gen11_hpd_enable_detection +ffffffff81c2f9e0 t bxt_hpd_irq_setup +ffffffff81c2fb90 t bxt_hpd_enable_detection +ffffffff81c2fca0 t spt_hpd_irq_setup +ffffffff81c2fee0 t spt_hpd_enable_detection +ffffffff81c30020 t ilk_hpd_irq_setup +ffffffff81c302b0 t ilk_hpd_enable_detection +ffffffff81c31000 T intel_hti_init +ffffffff81c31070 T intel_hti_uses_phy +ffffffff81c31110 T intel_hti_dpll_mask +ffffffff81c32000 T intel_load_detect_get_pipe +ffffffff81c32430 t intel_modeset_disable_planes +ffffffff81c32510 T intel_load_detect_release_pipe +ffffffff81c33000 T intel_lpe_audio_irq_handler +ffffffff81c33020 T intel_lpe_audio_init +ffffffff81c33050 T intel_lpe_audio_teardown +ffffffff81c33070 T intel_lpe_audio_notify +ffffffff81c34000 T lspcon_detect_hdr_capability +ffffffff81c340c0 T lspcon_write_infoframe +ffffffff81c34950 T lspcon_read_infoframe +ffffffff81c34990 T lspcon_set_infoframes +ffffffff81c34c20 T lspcon_infoframes_enabled +ffffffff81c34e30 T lspcon_wait_pcon_mode +ffffffff81c34e50 t lspcon_wait_mode +ffffffff81c35180 T lspcon_init +ffffffff81c35660 T intel_lspcon_infoframes_enabled +ffffffff81c35690 T lspcon_resume +ffffffff81c359a0 t lspcon_change_mode +ffffffff81c36000 T intel_lvds_port_enabled +ffffffff81c36090 T intel_get_lvds_encoder +ffffffff81c360f0 T intel_is_dual_link_lvds +ffffffff81c36150 T intel_lvds_init +ffffffff81c36950 t intel_enable_lvds +ffffffff81c36ad0 t intel_pre_enable_lvds +ffffffff81c36df0 t intel_lvds_compute_config +ffffffff81c36f70 t pch_disable_lvds +ffffffff81c36f90 t pch_post_disable_lvds +ffffffff81c36fb0 t gmch_disable_lvds +ffffffff81c36ff0 t intel_lvds_get_hw_state +ffffffff81c370c0 t intel_lvds_get_config +ffffffff81c371e0 t intel_lvds_shutdown +ffffffff81c37290 t compute_is_dual_link_lvds +ffffffff81c37380 t intel_no_lvds_dmi_callback +ffffffff81c373d0 t intel_disable_lvds +ffffffff81c37520 t intel_lvds_get_modes +ffffffff81c37580 t intel_lvds_mode_valid +ffffffff81c37630 t intel_dual_link_lvds_callback +ffffffff81c38000 T _intel_modeset_lock_begin +ffffffff81c38070 T _intel_modeset_lock_loop +ffffffff81c380b0 T _intel_modeset_lock_end +ffffffff81c39000 T intel_modeset_setup_hw_state +ffffffff81c3a6b0 t intel_crtc_disable_noatomic +ffffffff81c3ad80 t intel_crtc_disable_noatomic_begin +ffffffff81c3c000 T intel_modeset_verify_crtc +ffffffff81c3c630 t verify_connector_state +ffffffff81c3cb10 T intel_modeset_verify_disabled +ffffffff81c3d000 T intel_opregion_notify_encoder +ffffffff81c3d190 t swsci +ffffffff81c3d530 T intel_opregion_notify_adapter +ffffffff81c3d590 T intel_opregion_asle_intr +ffffffff81c3d5e0 T intel_opregion_setup +ffffffff81c3df90 t asle_work +ffffffff81c3e490 T intel_opregion_get_panel_type +ffffffff81c3e5a0 T intel_opregion_get_edid +ffffffff81c3e690 T intel_opregion_headless_sku +ffffffff81c3e6e0 T intel_opregion_register +ffffffff81c3e780 T intel_opregion_resume +ffffffff81c3e820 T intel_opregion_suspend +ffffffff81c3e8e0 T intel_opregion_unregister +ffffffff81c3e9c0 T intel_opregion_cleanup +ffffffff81c3ead0 t intel_no_opregion_vbt_callback +ffffffff81c3eb30 t intel_use_opregion_panel_type_callback +ffffffff81c3f000 T intel_overlay_reset +ffffffff81c3f050 T intel_overlay_switch_off +ffffffff81c3f2a0 t intel_overlay_release_old_vid +ffffffff81c3f4a0 T intel_overlay_put_image_ioctl +ffffffff81c3f850 t update_pfit_vscale_ratio +ffffffff81c3f930 t check_overlay_dst +ffffffff81c3fa10 t check_overlay_src +ffffffff81c3fc60 t intel_overlay_do_put_image +ffffffff81c40920 T intel_overlay_attrs_ioctl +ffffffff81c40cc0 t check_gamma +ffffffff81c40eb0 T intel_overlay_setup +ffffffff81c41160 t intel_overlay_last_flip_retire +ffffffff81c411a0 T intel_overlay_cleanup +ffffffff81c41260 T intel_overlay_capture_error_state +ffffffff81c41370 T intel_overlay_print_error_state +ffffffff81c418b0 t intel_overlay_release_old_vid_tail +ffffffff81c41980 t intel_overlay_off_tail +ffffffff81c41b70 t intel_overlay_flip_prepare +ffffffff81c42000 T intel_panel_use_ssc +ffffffff81c42060 T intel_panel_preferred_fixed_mode +ffffffff81c420b0 T intel_panel_fixed_mode +ffffffff81c42230 T intel_panel_downclock_mode +ffffffff81c42330 T intel_panel_highest_mode +ffffffff81c42390 T intel_panel_get_modes +ffffffff81c42440 T intel_panel_drrs_type +ffffffff81c42470 T intel_panel_compute_config +ffffffff81c42630 T intel_panel_add_edid_fixed_modes +ffffffff81c42b90 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81c42c00 t intel_panel_add_fixed_mode +ffffffff81c42d90 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81c42e00 T intel_panel_add_encoder_fixed_mode +ffffffff81c42e40 T intel_panel_fitting +ffffffff81c434b0 T intel_panel_detect +ffffffff81c43550 T intel_panel_mode_valid +ffffffff81c43600 T intel_panel_init_alloc +ffffffff81c43650 T intel_panel_init +ffffffff81c43790 T intel_panel_fini +ffffffff81c44000 T intel_has_pch_trancoder +ffffffff81c44060 T intel_crtc_pch_transcoder +ffffffff81c440a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81c440f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81c44140 T ilk_pch_pre_enable +ffffffff81c44170 T ilk_pch_enable +ffffffff81c44820 t ilk_pch_transcoder_set_timings +ffffffff81c44af0 T ilk_pch_disable +ffffffff81c44b10 T ilk_pch_post_disable +ffffffff81c44fc0 T ilk_pch_get_config +ffffffff81c451d0 T lpt_pch_enable +ffffffff81c454a0 T lpt_pch_disable +ffffffff81c455e0 T lpt_pch_get_config +ffffffff81c456d0 T intel_pch_sanitize +ffffffff81c45a10 t assert_pch_dp_disabled +ffffffff81c45bc0 t assert_pch_hdmi_disabled +ffffffff81c46000 T lpt_disable_iclkip +ffffffff81c460a0 T lpt_iclkip +ffffffff81c46130 T lpt_program_iclkip +ffffffff81c46450 T lpt_get_iclkip +ffffffff81c46590 T lpt_disable_clkout_dp +ffffffff81c46690 T intel_init_pch_refclk +ffffffff81c48000 T intel_initial_plane_config +ffffffff81c49000 T intel_pmdemand_init +ffffffff81c49150 T intel_pmdemand_init_early +ffffffff81c491e0 T intel_pmdemand_update_phys_mask +ffffffff81c49290 T intel_pmdemand_update_port_clock +ffffffff81c492d0 T intel_pmdemand_atomic_check +ffffffff81c49710 t intel_pmdemand_update_max_ddiclk +ffffffff81c497e0 t intel_pmdemand_update_active_non_tc_phys +ffffffff81c49a10 T intel_pmdemand_init_pmdemand_params +ffffffff81c49c10 T intel_pmdemand_program_dbuf +ffffffff81c49de0 t intel_pmdemand_wait +ffffffff81c4a020 T intel_pmdemand_pre_plane_update +ffffffff81c4a140 t intel_pmdemand_program_params +ffffffff81c4a5f0 T intel_pmdemand_post_plane_update +ffffffff81c4a700 t intel_pmdemand_duplicate_state +ffffffff81c4a790 t intel_pmdemand_destroy_state +ffffffff81c4b000 T intel_pps_lock +ffffffff81c4b070 T intel_pps_unlock +ffffffff81c4b0e0 T intel_pps_reset_all +ffffffff81c4b240 T intel_pps_check_power_unlocked +ffffffff81c4b590 t pps_name +ffffffff81c4b640 T intel_pps_wait_power_cycle +ffffffff81c4b710 t wait_panel_power_cycle +ffffffff81c4b920 T intel_pps_vdd_on_unlocked +ffffffff81c4bf80 T intel_pps_vdd_on +ffffffff81c4c160 T intel_pps_vdd_off_sync +ffffffff81c4c270 t intel_pps_vdd_off_sync_unlocked +ffffffff81c4c730 T intel_pps_vdd_off_unlocked +ffffffff81c4c920 T intel_pps_on_unlocked +ffffffff81c4ce70 T intel_pps_on +ffffffff81c4cf40 T intel_pps_off_unlocked +ffffffff81c4d3b0 T intel_pps_off +ffffffff81c4d480 T intel_pps_backlight_on +ffffffff81c4d6d0 T intel_pps_backlight_off +ffffffff81c4d940 T intel_pps_backlight_power +ffffffff81c4db70 T vlv_pps_init +ffffffff81c4dd70 t vlv_detach_power_sequencer +ffffffff81c4df70 t vlv_steal_power_sequencer +ffffffff81c4e0b0 t pps_init_delays +ffffffff81c4e590 t pps_init_registers +ffffffff81c4e9a0 T intel_pps_have_panel_power_or_vdd +ffffffff81c4eb40 T intel_pps_encoder_reset +ffffffff81c4ed30 t vlv_initial_power_sequencer_setup +ffffffff81c4f0a0 t pps_vdd_init +ffffffff81c4f280 T intel_pps_init +ffffffff81c4f780 t edp_panel_vdd_work +ffffffff81c4f840 T intel_pps_init_late +ffffffff81c4fac0 T intel_pps_unlock_regs_wa +ffffffff81c4fbe0 T intel_pps_setup +ffffffff81c4fc50 T assert_pps_unlocked +ffffffff81c4ff20 t intel_pps_get_registers +ffffffff81c50830 t wait_panel_status +ffffffff81c50cd0 t intel_pps_readout_hw_state +ffffffff81c50ec0 t __delayed_work_tick +ffffffff81c51000 T intel_psr_irq_handler +ffffffff81c51710 t transcoder_name +ffffffff81c51750 T intel_psr_init_dpcd +ffffffff81c51a40 T intel_psr_compute_config +ffffffff81c51c40 t intel_psr2_config_valid +ffffffff81c52120 T intel_psr_get_config +ffffffff81c522e0 T intel_psr_disable +ffffffff81c52420 t intel_psr_disable_locked +ffffffff81c52810 T intel_psr_pause +ffffffff81c52a30 t intel_psr_exit +ffffffff81c52d10 T intel_psr_resume +ffffffff81c52db0 t intel_psr_activate +ffffffff81c53550 T intel_psr2_disable_plane_sel_fetch_arm +ffffffff81c535c0 T intel_psr2_program_plane_sel_fetch_arm +ffffffff81c53660 T intel_psr2_program_plane_sel_fetch_noarm +ffffffff81c537d0 T intel_psr2_program_trans_man_trk_ctl +ffffffff81c538c0 T intel_psr2_sel_fetch_update +ffffffff81c54070 T intel_psr_pre_plane_update +ffffffff81c54250 t wm_optimization_wa +ffffffff81c54410 T intel_psr_post_plane_update +ffffffff81c55190 T intel_psr_wait_for_idle_locked +ffffffff81c55380 T intel_psr_debug_set +ffffffff81c55750 T intel_psr_invalidate +ffffffff81c559b0 T intel_psr_flush +ffffffff81c55e50 T intel_psr_init +ffffffff81c55fa0 t intel_psr_work +ffffffff81c561a0 t tgl_dc3co_disable_work +ffffffff81c56200 T intel_psr_short_pulse +ffffffff81c56670 T intel_psr_enabled +ffffffff81c56700 T intel_psr_lock +ffffffff81c567c0 T intel_psr_unlock +ffffffff81c56880 T intel_psr_debugfs_register +ffffffff81c568b0 T intel_psr_connector_debugfs_add +ffffffff81c568e0 t _compute_psr2_sdp_prior_scanline_indication +ffffffff81c569a0 t _compute_psr2_wake_times +ffffffff81c56aa0 t intel_psr2_sel_fetch_config_valid +ffffffff81c56b30 t psr2_granularity_check +ffffffff81c56c20 t tgl_psr2_disable_dc3co +ffffffff81c56d40 t __delayed_work_tick +ffffffff81c57000 T intel_lookup_range_min_qp +ffffffff81c57120 T intel_lookup_range_max_qp +ffffffff81c58000 T intel_init_quirks +ffffffff81c58110 T intel_has_quirk +ffffffff81c58150 t quirk_ssc_force_disable +ffffffff81c58180 t quirk_invert_brightness +ffffffff81c581b0 t quirk_backlight_present +ffffffff81c581e0 t quirk_increase_t12_delay +ffffffff81c58210 t quirk_increase_ddi_disabled_time +ffffffff81c58240 t intel_dmi_reverse_brightness +ffffffff81c58290 t intel_dmi_no_pps_backlight +ffffffff81c59000 T intel_sdvo_port_enabled +ffffffff81c590b0 T intel_sdvo_init +ffffffff81c5a2f0 t intel_sdvo_compute_config +ffffffff81c5a720 t pch_disable_sdvo +ffffffff81c5a750 t pch_post_disable_sdvo +ffffffff81c5a760 t intel_disable_sdvo +ffffffff81c5a940 t intel_sdvo_pre_enable +ffffffff81c5b430 t intel_enable_sdvo +ffffffff81c5b650 t intel_sdvo_get_hw_state +ffffffff81c5b750 t intel_sdvo_get_config +ffffffff81c5bc30 t intel_sdvo_set_target_input +ffffffff81c5bcb0 t intel_sdvo_get_input_pixel_clock_range +ffffffff81c5bd60 t intel_sdvo_ddc_proxy_xfer +ffffffff81c5be10 t intel_sdvo_ddc_proxy_func +ffffffff81c5be40 t __intel_sdvo_write_cmd +ffffffff81c5c350 t proxy_lock_bus +ffffffff81c5c380 t proxy_trylock_bus +ffffffff81c5c3b0 t proxy_unlock_bus +ffffffff81c5c3e0 t intel_sdvo_enc_destroy +ffffffff81c5c3f0 t intel_sdvo_set_output_timings_from_mode +ffffffff81c5c520 t intel_sdvo_get_preferred_input_mode +ffffffff81c5c910 t intel_sdvo_get_dtd_from_mode +ffffffff81c5ca90 t intel_sdvo_read_response +ffffffff81c5d000 t intel_sdvo_get_value +ffffffff81c5d080 t intel_sdvo_write_sdvox +ffffffff81c5d2f0 t intel_sdvo_write_infoframe +ffffffff81c5d4f0 t intel_sdvo_read_infoframe +ffffffff81c5d770 t intel_sdvo_hotplug +ffffffff81c5d7c0 t intel_sdvo_connector_get_hw_state +ffffffff81c5d860 t intel_sdvo_detect +ffffffff81c5dbc0 t intel_sdvo_connector_register +ffffffff81c5dbd0 t intel_sdvo_connector_unregister +ffffffff81c5dbe0 t intel_sdvo_connector_duplicate_state +ffffffff81c5dc70 t intel_sdvo_connector_atomic_set_property +ffffffff81c5de40 t intel_sdvo_connector_atomic_get_property +ffffffff81c5e060 t intel_sdvo_get_analog_edid +ffffffff81c5e0a0 t intel_sdvo_connector_matches_edid +ffffffff81c5e140 t intel_sdvo_get_modes +ffffffff81c5e470 t intel_sdvo_mode_valid +ffffffff81c5e5a0 t intel_sdvo_atomic_check +ffffffff81c5e660 t intel_sdvo_create_enhance_property +ffffffff81c60000 T intel_snps_phy_wait_for_calibration +ffffffff81c600e0 T intel_snps_phy_update_psr_power_state +ffffffff81c601b0 T intel_snps_phy_set_signal_levels +ffffffff81c60460 T intel_mpllb_calc_state +ffffffff81c60610 T intel_snps_phy_check_hdmi_link_rate +ffffffff81c606b0 T intel_mpllb_enable +ffffffff81c60950 T intel_mpllb_disable +ffffffff81c60b00 T intel_mpllb_calc_port_clock +ffffffff81c60bd0 T intel_mpllb_readout_hw_state +ffffffff81c60d90 T intel_mpllb_state_verify +ffffffff81c62000 T vlv_plane_min_cdclk +ffffffff81c620f0 T ivb_plane_min_cdclk +ffffffff81c621b0 T hsw_plane_min_cdclk +ffffffff81c62250 T chv_plane_check_rotation +ffffffff81c622d0 T intel_sprite_plane_create +ffffffff81c62670 t vlv_sprite_update_noarm +ffffffff81c62770 t vlv_sprite_update_arm +ffffffff81c62e10 t vlv_sprite_disable_arm +ffffffff81c62ea0 t vlv_sprite_get_hw_state +ffffffff81c62f90 t vlv_sprite_check +ffffffff81c63090 t ivb_sprite_update_noarm +ffffffff81c63200 t ivb_sprite_update_arm +ffffffff81c635e0 t ivb_sprite_disable_arm +ffffffff81c63690 t ivb_sprite_get_hw_state +ffffffff81c63760 t g4x_sprite_check +ffffffff81c63a40 t hsw_sprite_max_stride +ffffffff81c63aa0 t g4x_sprite_max_stride +ffffffff81c63b10 t ivb_sprite_min_cdclk +ffffffff81c63c50 t g4x_sprite_update_noarm +ffffffff81c63db0 t g4x_sprite_update_arm +ffffffff81c64200 t g4x_sprite_disable_arm +ffffffff81c642b0 t g4x_sprite_get_hw_state +ffffffff81c64380 t g4x_sprite_min_cdclk +ffffffff81c64460 t vlv_sprite_ctl +ffffffff81c64660 t vlv_sprite_format_mod_supported +ffffffff81c647a0 t ivb_sprite_ctl +ffffffff81c649e0 t g4x_sprite_ctl +ffffffff81c64bb0 t snb_sprite_format_mod_supported +ffffffff81c64ca0 t g4x_sprite_format_mod_supported +ffffffff81c65000 T intel_sprite_set_colorkey_ioctl +ffffffff81c66000 T intel_tc_port_in_tbt_alt_mode +ffffffff81c66090 T intel_tc_port_in_dp_alt_mode +ffffffff81c66120 T intel_tc_port_in_legacy_mode +ffffffff81c661b0 T intel_tc_cold_requires_aux_pw +ffffffff81c66230 T intel_tc_port_get_lane_mask +ffffffff81c66380 T intel_tc_port_get_pin_assignment_mask +ffffffff81c664d0 T intel_tc_port_fia_max_lane_count +ffffffff81c66720 T intel_tc_port_set_fia_lane_count +ffffffff81c66910 T intel_tc_port_init_mode +ffffffff81c66b80 t intel_tc_port_update_mode +ffffffff81c66fb0 T intel_tc_port_sanitize_mode +ffffffff81c67340 T intel_tc_port_connected_locked +ffffffff81c674b0 T intel_tc_port_ref_held +ffffffff81c67510 T intel_tc_port_connected +ffffffff81c675a0 T intel_tc_port_link_needs_reset +ffffffff81c67670 T intel_tc_port_link_reset +ffffffff81c677b0 T intel_tc_port_link_cancel_reset_work +ffffffff81c67880 T intel_tc_port_lock +ffffffff81c678a0 t __intel_tc_port_lock +ffffffff81c67a20 T intel_tc_port_suspend +ffffffff81c67a90 T intel_tc_port_unlock +ffffffff81c67b10 T intel_tc_port_get_link +ffffffff81c67bb0 T intel_tc_port_put_link +ffffffff81c67c70 T intel_tc_port_init +ffffffff81c67f30 t kasprintf +ffffffff81c68010 t intel_tc_port_disconnect_phy_work +ffffffff81c68070 t intel_tc_port_link_reset_work +ffffffff81c68430 T intel_tc_port_cleanup +ffffffff81c68510 t intel_tc_port_needs_reset +ffffffff81c68630 t tgl_tc_phy_cold_off_domain +ffffffff81c68660 t xelpdp_tc_phy_hpd_live_status +ffffffff81c687a0 t adlp_tc_phy_is_ready +ffffffff81c688c0 t xelpdp_tc_phy_is_owned +ffffffff81c689b0 t xelpdp_tc_phy_get_hw_state +ffffffff81c68b80 t xelpdp_tc_phy_connect +ffffffff81c68e60 t xelpdp_tc_phy_disconnect +ffffffff81c68fe0 t adlp_tc_phy_init +ffffffff81c69050 t tc_phy_get_current_mode +ffffffff81c693b0 t tc_phy_wait_for_ready +ffffffff81c69550 t xelpdp_tc_phy_enable_tcss_power +ffffffff81c69800 t tc_phy_verify_legacy_or_dp_alt_mode +ffffffff81c69a10 t xelpdp_tc_phy_wait_for_tcss_power +ffffffff81c69c60 t adlp_tc_phy_cold_off_domain +ffffffff81c69cc0 t adlp_tc_phy_hpd_live_status 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skl_watermark_ipc_init +ffffffff81c7ef80 T skl_wm_init +ffffffff81c7f830 T intel_atomic_get_dbuf_state +ffffffff81c7f850 T intel_dbuf_init +ffffffff81c7f8d0 T intel_dbuf_pre_plane_update +ffffffff81c7fc10 T intel_dbuf_post_plane_update +ffffffff81c7fd00 T intel_mbus_dbox_update +ffffffff81c7ffa0 T skl_watermark_debugfs_register +ffffffff81c7ffd0 t skl_sagv_disable +ffffffff81c80110 t skl_compute_wm +ffffffff81c835e0 t skl_wm_get_hw_state_and_sanitize +ffffffff81c83e40 t skl_build_plane_wm_single +ffffffff81c841f0 t skl_compute_wm_params +ffffffff81c84600 t skl_compute_plane_wm +ffffffff81c84a50 t skl_compute_dbuf_slices +ffffffff81c84f50 t skl_ddb_entry_for_slices +ffffffff81c850a0 t intel_dbuf_duplicate_state +ffffffff81c85140 t intel_dbuf_destroy_state +ffffffff81c86000 T pixel_format_from_register_bits +ffffffff81c86070 T vlv_dsi_wait_for_fifo_empty +ffffffff81c86130 T vlv_dsi_init +ffffffff81c86ab0 t intel_dsi_compute_config +ffffffff81c86c30 t intel_dsi_pre_enable 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i915_gem_context_destroy_ioctl +ffffffff81c924b0 T i915_gem_context_getparam_ioctl +ffffffff81c92940 T i915_gem_context_setparam_ioctl +ffffffff81c92e90 t set_proto_ctx_param +ffffffff81c93680 T i915_gem_context_reset_stats_ioctl +ffffffff81c937a0 T i915_gem_engines_iter_next +ffffffff81c937f0 T i915_gem_context_module_exit +ffffffff81c93810 T i915_gem_context_module_init +ffffffff81c93870 t i915_gem_context_release_work +ffffffff81c93960 t intel_context_set_gem +ffffffff81c93a90 t engines_notify +ffffffff81c93c20 t intel_context_unpin +ffffffff81c93cb0 t kill_engines +ffffffff81c93e80 t create_setparam +ffffffff81c93f00 t invalid_ext +ffffffff81c93f30 t lookup_user_engine +ffffffff81c93ff0 t set_proto_ctx_engines_balance +ffffffff81c94320 t set_proto_ctx_engines_bond +ffffffff81c94730 t set_proto_ctx_engines_parallel_submit +ffffffff81c95000 T __i915_gem_object_create_user +ffffffff81c95020 t __i915_gem_object_create_user_ext +ffffffff81c95500 T i915_gem_dumb_create +ffffffff81c95690 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i915_gem_object_prepare_read +ffffffff81c984f0 T i915_gem_object_prepare_write +ffffffff81c99000 T i915_gem_execbuffer2_ioctl +ffffffff81c99d10 t eb_select_context +ffffffff81c99d90 t eb_select_engine +ffffffff81c9a280 t eb_lookup_vmas +ffffffff81c9aa50 t eb_release_vmas +ffffffff81c9ade0 t eb_relocate_parse +ffffffff81c9af50 t eb_capture_stage +ffffffff81c9b0a0 t eb_requests_create +ffffffff81c9b520 t eb_submit +ffffffff81c9b9d0 t eb_requests_get +ffffffff81c9ba50 t eb_requests_add +ffffffff81c9bc20 t signal_fence_array +ffffffff81c9bce0 t eb_requests_put +ffffffff81c9bd60 t eb_put_engine +ffffffff81c9bed0 t parse_timeline_fences +ffffffff81c9c360 t eb_pin_engine +ffffffff81c9c6b0 t eb_validate_vmas +ffffffff81c9d050 t eb_relocate_vma +ffffffff81c9d2b0 t eb_parse +ffffffff81c9d6b0 t eb_relocate_parse_slow +ffffffff81c9de60 t eb_pin_timeline +ffffffff81c9e100 t i915_gem_object_lock +ffffffff81c9e350 t eb_pin_flags +ffffffff81c9e3c0 t eb_relocate_entry +ffffffff81c9ec90 t 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i915_gem_dumb_mmap_offset +ffffffff81ca2470 t __assign_mmap_offset_handle +ffffffff81ca2a60 T i915_gem_mmap_offset_ioctl +ffffffff81ca2b50 T i915_gem_mmap +ffffffff81ca3000 T i915_gem_get_pat_index +ffffffff81ca3090 T i915_gem_object_has_cache_level +ffffffff81ca3140 T i915_gem_object_alloc +ffffffff81ca31a0 T i915_gem_object_free +ffffffff81ca31c0 T i915_gem_object_init +ffffffff81ca3300 T __i915_gem_object_fini +ffffffff81ca3320 T i915_gem_object_set_cache_coherency +ffffffff81ca3440 T i915_gem_object_set_pat_index +ffffffff81ca34f0 T i915_gem_object_can_bypass_llc +ffffffff81ca3550 T __i915_gem_free_object_rcu +ffffffff81ca35d0 T __i915_gem_object_pages_fini +ffffffff81ca39a0 T __i915_gem_free_object +ffffffff81ca3a60 T i915_gem_flush_free_objects +ffffffff81ca3ab0 t __i915_gem_free_objects +ffffffff81ca3bd0 T __i915_gem_object_flush_frontbuffer +ffffffff81ca3c80 T __i915_gem_object_invalidate_frontbuffer +ffffffff81ca3d30 T i915_gem_object_read_from_page +ffffffff81ca3ec0 T i915_gem_object_has_struct_page +ffffffff81ca3ef0 T i915_gem_object_has_iomem +ffffffff81ca3f30 T i915_gem_object_evictable +ffffffff81ca3ff0 T i915_gem_object_migratable +ffffffff81ca4030 T i915_gem_object_can_migrate +ffffffff81ca41b0 T i915_gem_object_migrate +ffffffff81ca4260 T __i915_gem_object_migrate +ffffffff81ca4300 T i915_gem_object_placement_possible +ffffffff81ca4390 T i915_gem_object_needs_ccs_pages +ffffffff81ca4430 T i915_gem_init__objects +ffffffff81ca4460 t __i915_gem_free_work +ffffffff81ca44b0 T i915_objects_module_exit +ffffffff81ca44d0 T i915_objects_module_init +ffffffff81ca4540 T i915_gem_object_get_moving_fence +ffffffff81ca4560 T i915_gem_object_wait_moving_fence +ffffffff81ca45e0 T i915_gem_object_has_unknown_state +ffffffff81ca4610 t i915_gem_free_object +ffffffff81ca46a0 t i915_gem_close_object +ffffffff81ca5000 T __i915_gem_object_set_pages +ffffffff81ca5370 T ____i915_gem_object_get_pages +ffffffff81ca53f0 T __i915_gem_object_get_pages +ffffffff81ca5460 T i915_gem_object_pin_pages_unlocked +ffffffff81ca55b0 t i915_gem_object_lock +ffffffff81ca5800 T i915_gem_object_truncate +ffffffff81ca5840 T __i915_gem_object_unset_pages +ffffffff81ca5a70 T __i915_gem_object_put_pages +ffffffff81ca5b00 T i915_gem_object_pin_map +ffffffff81ca6040 T i915_gem_object_pin_map_unlocked +ffffffff81ca6170 T __i915_gem_object_flush_map +ffffffff81ca6210 T __i915_gem_object_release_map +ffffffff81ca6290 T __i915_gem_object_page_iter_get_sg +ffffffff81ca64b0 T __i915_gem_object_get_page +ffffffff81ca6510 T __i915_gem_object_get_dirty_page +ffffffff81ca6590 T __i915_gem_object_get_dma_address_len +ffffffff81ca6620 T __i915_gem_object_get_dma_address +ffffffff81ca7000 T i915_gem_object_put_pages_phys +ffffffff81ca7210 T i915_gem_object_pwrite_phys +ffffffff81ca7340 T i915_gem_object_pread_phys +ffffffff81ca7400 T i915_gem_object_attach_phys +ffffffff81ca74f0 t i915_gem_object_shmem_to_phys +ffffffff81ca8000 T i915_gem_suspend +ffffffff81ca8070 T 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intel_gt_setup_lmem +ffffffff81cfe2e0 t region_lmem_init +ffffffff81cfe440 t region_lmem_release +ffffffff81cff000 T intel_renderstate_init +ffffffff81cff7c0 T intel_renderstate_emit +ffffffff81cff880 T intel_renderstate_fini +ffffffff81d00000 T __i915_request_reset +ffffffff81d002b0 T __intel_gt_reset +ffffffff81d006a0 T intel_has_gpu_reset +ffffffff81d00700 T intel_has_reset_engine +ffffffff81d00750 T intel_reset_guc +ffffffff81d008b0 T intel_gt_set_wedged +ffffffff81d00960 t __intel_gt_set_wedged +ffffffff81d00b30 T intel_gt_unset_wedged +ffffffff81d00bb0 t __intel_gt_unset_wedged +ffffffff81d00d40 T intel_gt_reset +ffffffff81d01290 t reset_finish +ffffffff81d01390 T __intel_engine_reset_bh +ffffffff81d01570 T intel_engine_reset +ffffffff81d01580 T intel_gt_handle_error +ffffffff81d01b10 T intel_gt_reset_trylock +ffffffff81d01b50 T intel_gt_reset_lock_interruptible +ffffffff81d01cc0 T intel_gt_reset_unlock +ffffffff81d01cf0 T intel_gt_terminally_wedged +ffffffff81d01e70 T intel_gt_set_wedged_on_init +ffffffff81d01f20 T intel_gt_set_wedged_on_fini +ffffffff81d01fd0 T intel_gt_init_reset +ffffffff81d02080 T intel_gt_fini_reset +ffffffff81d020b0 T __intel_init_wedge +ffffffff81d02150 t intel_wedge_me +ffffffff81d02250 T __intel_fini_wedge +ffffffff81d022c0 T intel_engine_reset_needs_wa_22011802037 +ffffffff81d023a0 t gen8_reset_engines +ffffffff81d02690 t gen6_reset_engines +ffffffff81d02720 t ilk_do_reset +ffffffff81d02800 t g4x_do_reset +ffffffff81d02b20 t g33_do_reset +ffffffff81d02cb0 t i915_do_reset +ffffffff81d02fd0 t __gen11_reset_engines +ffffffff81d034a0 t __gen6_reset_engines +ffffffff81d03620 t nop_submit_request +ffffffff81d036b0 t __delayed_work_tick +ffffffff81d04000 T intel_ring_update_space +ffffffff81d04040 T __intel_ring_pin +ffffffff81d04070 T intel_ring_pin +ffffffff81d041f0 T intel_ring_reset +ffffffff81d04230 T intel_ring_unpin +ffffffff81d042e0 T intel_engine_create_ring +ffffffff81d044b0 T intel_ring_free +ffffffff81d04500 T intel_ring_begin +ffffffff81d04680 t wait_for_space +ffffffff81d04790 T intel_ring_cacheline_align +ffffffff81d05000 T intel_ring_submission_setup +ffffffff81d05790 t i915_gem_object_lock +ffffffff81d059e0 t ring_release +ffffffff81d05b50 t xcs_resume +ffffffff81d061c0 t xcs_sanitize +ffffffff81d06240 t reset_prepare +ffffffff81d063a0 t reset_rewind +ffffffff81d06460 t reset_cancel +ffffffff81d06510 t reset_finish +ffffffff81d06540 t add_to_engine +ffffffff81d065c0 t remove_from_engine +ffffffff81d06660 t ring_request_alloc +ffffffff81d06a50 t i9xx_set_default_submission +ffffffff81d06a90 t irq_handler +ffffffff81d06ab0 t stop_ring +ffffffff81d06bb0 t ring_context_alloc +ffffffff81d06cc0 t ring_context_revoke +ffffffff81d06d90 t ring_context_pre_pin +ffffffff81d06ea0 t ring_context_pin +ffffffff81d06ed0 t ring_context_unpin +ffffffff81d06f00 t ring_context_post_unpin +ffffffff81d06f50 t ring_context_cancel_request +ffffffff81d06ff0 t ring_context_reset +ffffffff81d07040 t ring_context_destroy +ffffffff81d070a0 t switch_mm +ffffffff81d07200 t mi_set_context +ffffffff81d074e0 t i9xx_submit_request +ffffffff81d07540 t gen6_bsd_set_default_submission +ffffffff81d07580 t gen6_bsd_submit_request +ffffffff81d08000 T intel_rps_mark_interactive +ffffffff81d08090 t rps_set_power +ffffffff81d08230 T intel_rps_unpark +ffffffff81d08590 T intel_rps_set +ffffffff81d086c0 T intel_rps_park +ffffffff81d08890 t rps_disable_interrupts +ffffffff81d089c0 t rps_set +ffffffff81d08d70 T intel_rps_get_boost_frequency +ffffffff81d08e50 T intel_gpu_freq +ffffffff81d08f20 T intel_rps_set_boost_frequency +ffffffff81d090d0 T intel_rps_dec_waiters +ffffffff81d09130 T intel_rps_boost +ffffffff81d09250 T gen6_rps_get_freq_caps +ffffffff81d09450 T intel_rps_enable +ffffffff81d09ac0 t gen9_rps_enable +ffffffff81d09be0 t gen8_rps_enable +ffffffff81d09ce0 t gen6_rps_enable +ffffffff81d09df0 t gen5_rps_enable +ffffffff81d0aac0 T intel_rps_disable +ffffffff81d0ade0 T intel_freq_opcode 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intel_sseu_info_init +ffffffff81d137d0 t cherryview_sseu_info_init +ffffffff81d13a00 t hsw_sseu_info_init +ffffffff81d13d00 T intel_sseu_make_rpcs +ffffffff81d13ed0 T intel_sseu_dump +ffffffff81d14140 T intel_sseu_print_topology +ffffffff81d14440 T intel_sseu_print_ss_info +ffffffff81d144b0 T intel_slicemask_from_xehp_dssmask +ffffffff81d14500 t xehp_load_dss_mask +ffffffff81d14640 t gen11_compute_sseu_info +ffffffff81d15000 T intel_sseu_status +ffffffff81d15920 T intel_sseu_debugfs_register +ffffffff81d16000 T intel_gt_init_timelines +ffffffff81d16060 T __intel_timeline_create +ffffffff81d16270 T intel_timeline_create_from_engine +ffffffff81d16340 T __intel_timeline_pin +ffffffff81d16370 T intel_timeline_pin +ffffffff81d164d0 T intel_timeline_reset_seqno +ffffffff81d16500 T intel_timeline_enter +ffffffff81d165f0 T intel_timeline_exit +ffffffff81d166d0 T intel_timeline_get_seqno +ffffffff81d16740 t __intel_timeline_get_seqno +ffffffff81d167f0 T intel_timeline_read_hwsp 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kbl_whitelist_build +ffffffff81d1c450 t bxt_whitelist_build +ffffffff81d1c540 t skl_whitelist_build +ffffffff81d1c660 T intel_engine_apply_whitelist +ffffffff81d1c780 T intel_engine_init_workarounds +ffffffff81d1e280 T intel_engine_apply_workarounds +ffffffff81d1e2a0 T intel_engine_verify_workarounds +ffffffff81d1ec30 t gen12_ctx_workarounds_init +ffffffff81d1ed60 t _wa_add +ffffffff81d1f010 t gen9_ctx_workarounds_init +ffffffff81d1f2c0 t gen8_ctx_workarounds_init +ffffffff81d1f440 t gen12_gt_workarounds_init +ffffffff81d1f620 t gen9_gt_workarounds_init +ffffffff81d1f7d0 t xehp_init_mcr +ffffffff81d20000 T uao_create_from_data +ffffffff81d200b0 T uao_write +ffffffff81d200d0 T uao_create_from_object +ffffffff81d20200 T uao_read_to_iosys_map +ffffffff81d203e0 T uao_read +ffffffff81d20400 t __uao_rw +ffffffff81d21000 T intel_engines_add_sysfs +ffffffff81d22000 T intel_gsc_uc_fw_proxy_init_done +ffffffff81d220c0 T intel_gsc_uc_fw_proxy_get_status +ffffffff81d220f0 T intel_gsc_uc_fw_init_done +ffffffff81d22150 T intel_gsc_fw_get_binary_info +ffffffff81d22500 T intel_gsc_uc_fw_upload +ffffffff81d22970 t gsc_fw_query_compatibility_version +ffffffff81d23000 T intel_gsc_proxy_request_handler +ffffffff81d23920 T intel_gsc_proxy_irq_handler +ffffffff81d239c0 T intel_gsc_proxy_fini +ffffffff81d23a30 T intel_gsc_proxy_init +ffffffff81d24000 T intel_gsc_uc_init_early +ffffffff81d24120 t gsc_work +ffffffff81d24360 T intel_gsc_uc_init +ffffffff81d245e0 T intel_gsc_uc_fini +ffffffff81d246f0 T intel_gsc_uc_flush_work +ffffffff81d24730 T intel_gsc_uc_resume +ffffffff81d24800 T intel_gsc_uc_load_start +ffffffff81d248c0 T intel_gsc_uc_load_status +ffffffff81d25000 T intel_gsc_uc_debugfs_register +ffffffff81d26000 T intel_gsc_uc_heci_cmd_submit_packet +ffffffff81d26380 T intel_gsc_uc_heci_cmd_emit_mtl_header +ffffffff81d263e0 T intel_gsc_uc_heci_cmd_submit_nonpriv +ffffffff81d26980 t i915_gem_object_lock +ffffffff81d27000 T intel_guc_notify +ffffffff81d27040 T intel_guc_init_send_regs +ffffffff81d270f0 T intel_guc_init_early +ffffffff81d27290 t gen11_reset_guc_interrupts +ffffffff81d27300 t gen11_enable_guc_interrupts +ffffffff81d273a0 t gen11_disable_guc_interrupts +ffffffff81d27420 t gen9_reset_guc_interrupts +ffffffff81d27520 t gen9_enable_guc_interrupts +ffffffff81d276e0 t gen9_disable_guc_interrupts +ffffffff81d27810 T intel_guc_init_late +ffffffff81d27820 T intel_guc_write_params +ffffffff81d27ad0 T intel_guc_dump_time_info +ffffffff81d27c50 T intel_guc_init +ffffffff81d27e40 t guc_init_params +ffffffff81d28410 T intel_guc_fini +ffffffff81d284f0 T intel_guc_send_mmio +ffffffff81d28a60 T intel_guc_to_host_process_recv_msg +ffffffff81d28b50 T intel_guc_auth_huc +ffffffff81d28bb0 T intel_guc_suspend +ffffffff81d28cb0 T intel_guc_resume +ffffffff81d28ce0 T intel_guc_allocate_vma +ffffffff81d28e30 T intel_guc_allocate_and_map_vma +ffffffff81d28f10 T intel_guc_self_cfg32 +ffffffff81d29020 T intel_guc_self_cfg64 +ffffffff81d29140 T intel_guc_load_status +ffffffff81d29320 T intel_guc_write_barrier +ffffffff81d2a000 T intel_guc_ads_print_policy_info +ffffffff81d2a120 T intel_guc_global_policies_update +ffffffff81d2a330 T intel_guc_ads_create +ffffffff81d2a9b0 t guc_prep_golden_context +ffffffff81d2abd0 t guc_capture_prep_lists +ffffffff81d2b310 t __guc_ads_init +ffffffff81d2b870 T intel_guc_ads_init_late +ffffffff81d2baa0 T intel_guc_ads_destroy +ffffffff81d2bb10 T intel_guc_ads_reset +ffffffff81d2bbc0 T intel_guc_engine_usage_offset +ffffffff81d2bc00 T intel_guc_engine_usage_record_map +ffffffff81d2bcb0 t guc_mmio_reg_add +ffffffff81d2c000 T intel_guc_capture_getlistsize +ffffffff81d2c020 t guc_capture_getlistsize +ffffffff81d2c280 T intel_guc_capture_getlist +ffffffff81d2d410 t guc_cap_list_num_regs +ffffffff81d2d520 T intel_guc_capture_getnullheader +ffffffff81d2d600 T intel_guc_capture_print_engine_node +ffffffff81d2dba0 T intel_guc_capture_free_node +ffffffff81d2dc20 T intel_guc_capture_is_matching_engine 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intel_gt_fini_hwconfig +ffffffff81d36000 T intel_guc_log_section_size_capture +ffffffff81d36050 t guc_log_init_sizes +ffffffff81d362b0 T intel_guc_check_log_buf_overflow +ffffffff81d36360 T intel_guc_get_log_buffer_size +ffffffff81d36410 T intel_guc_get_log_buffer_offset +ffffffff81d36510 T intel_guc_log_init_early +ffffffff81d36590 t copy_debug_logs_work +ffffffff81d365b0 T intel_guc_log_create +ffffffff81d36830 T intel_guc_log_destroy +ffffffff81d36860 T intel_guc_log_set_level +ffffffff81d369d0 T intel_guc_log_relay_created +ffffffff81d36a00 T intel_guc_log_relay_open +ffffffff81d36ad0 T intel_guc_log_relay_start +ffffffff81d36b40 T intel_guc_log_relay_flush +ffffffff81d36c10 t guc_log_copy_debuglogs_for_relay +ffffffff81d36da0 T intel_guc_log_relay_close +ffffffff81d36e50 T intel_guc_log_handle_flush_event +ffffffff81d36ea0 T intel_guc_log_info +ffffffff81d36fb0 T intel_guc_log_dump +ffffffff81d38000 T intel_guc_log_debugfs_register +ffffffff81d39000 T intel_guc_rc_init_early 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intel_huc_auth +ffffffff81d47e00 T intel_huc_is_authenticated +ffffffff81d47ed0 T intel_huc_check_status +ffffffff81d47ff0 t huc_is_fully_authenticated +ffffffff81d48150 T intel_huc_update_auth_status +ffffffff81d48290 T intel_huc_load_status +ffffffff81d483a0 t sw_fence_dummy_notify +ffffffff81d483d0 t huc_delayed_load_timer_callback +ffffffff81d49000 T intel_huc_debugfs_register +ffffffff81d4a000 T intel_huc_fw_auth_via_gsccs +ffffffff81d4a4c0 T intel_huc_fw_get_binary_info +ffffffff81d4a7d0 T intel_huc_fw_load_and_auth_via_gsc +ffffffff81d4a890 T intel_huc_fw_upload +ffffffff81d4b000 T intel_uc_init_early +ffffffff81d4b190 T intel_uc_init_late +ffffffff81d4b1d0 T intel_uc_driver_late_release +ffffffff81d4b200 T intel_uc_init_mmio +ffffffff81d4b220 T intel_uc_driver_remove +ffffffff81d4b2c0 T intel_uc_reset_prepare +ffffffff81d4b340 t __uc_sanitize +ffffffff81d4b4a0 T intel_uc_reset +ffffffff81d4b4f0 T intel_uc_reset_finish +ffffffff81d4b540 T intel_uc_cancel_requests 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btc_skip_blacklist_clocks +ffffffff81dbd230 T btc_adjust_clock_combinations +ffffffff81dbd360 T btc_apply_voltage_delta_rules +ffffffff81dbd490 T btc_program_mgcg_hw_sequence +ffffffff81dbd5a0 T btc_dpm_enabled +ffffffff81dbd5b0 T btc_notify_uvd_to_smc +ffffffff81dbd640 T btc_reset_to_default +ffffffff81dbd690 T btc_read_arb_registers +ffffffff81dbd730 T btc_dpm_vblank_too_short +ffffffff81dbd7b0 T btc_dpm_pre_set_power_state +ffffffff81dbea00 T btc_dpm_set_power_state +ffffffff81dbede0 t btc_set_power_state_conditionally_enable_ulv +ffffffff81dbef60 T btc_dpm_post_set_power_state +ffffffff81dbf0a0 t btc_update_current_ps +ffffffff81dbf1b0 T btc_dpm_enable +ffffffff81dc02a0 t btc_cg_clock_gating_enable +ffffffff81dc03e0 t btc_mg_clock_gating_enable +ffffffff81dc0520 t btc_ls_clock_gating_enable +ffffffff81dc0660 t btc_init_stutter_mode +ffffffff81dc06e0 T btc_dpm_disable +ffffffff81dc0a50 T btc_dpm_setup_asic +ffffffff81dc0b70 T btc_dpm_init +ffffffff81dc0fe0 T btc_dpm_fini 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ci_notify_link_speed_change_after_state_change +ffffffff81dca600 T ci_dpm_display_configuration_changed +ffffffff81dca7f0 T ci_dpm_fini +ffffffff81dca8c0 T ci_dpm_init +ffffffff81dcb860 t ci_initialize_powertune_defaults +ffffffff81dcb950 t ci_get_leakage_voltages +ffffffff81dcbb30 t ci_patch_dependency_tables_with_leakage +ffffffff81dcc1a0 t ci_set_private_data_variables_based_on_pptable +ffffffff81dcc2b0 T ci_dpm_debugfs_print_current_performance_level +ffffffff81dcc410 T ci_dpm_print_power_state +ffffffff81dcc4f0 T ci_dpm_get_current_sclk +ffffffff81dcc5d0 T ci_dpm_get_current_mclk +ffffffff81dcc6b0 T ci_dpm_get_sclk +ffffffff81dcc700 T ci_dpm_get_mclk +ffffffff81dcc750 t ci_set_valid_flag +ffffffff81dcc7f0 t ci_populate_all_graphic_levels +ffffffff81dccdb0 t ci_populate_all_memory_levels +ffffffff81dcd6d0 t ci_populate_smc_vce_level +ffffffff81dcd7f0 t ci_populate_smc_acp_level +ffffffff81dcd8f0 t ci_populate_smc_samu_level +ffffffff81dcd9f0 t ci_do_program_memory_timing_parameters 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cik_pciep_rreg +ffffffff81dd0320 T cik_pciep_wreg +ffffffff81dd0390 T cik_get_xclk +ffffffff81dd0410 T cik_mm_rdoorbell +ffffffff81dd0480 T cik_mm_wdoorbell +ffffffff81dd04d0 T ci_mc_load_microcode +ffffffff81dd0840 T cik_ring_test +ffffffff81dd0b60 T cik_fence_gfx_ring_emit +ffffffff81dd0fb0 T cik_fence_compute_ring_emit +ffffffff81dd1260 T cik_semaphore_ring_emit +ffffffff81dd1450 T cik_copy_cpdma +ffffffff81dd1940 T cik_ring_ib_execute +ffffffff81dd1f50 T cik_ib_test +ffffffff81dd22e0 T cik_gfx_get_rptr +ffffffff81dd2340 T cik_gfx_get_wptr +ffffffff81dd2380 T cik_gfx_set_wptr +ffffffff81dd23c0 T cik_compute_get_rptr +ffffffff81dd24b0 T cik_compute_get_wptr +ffffffff81dd25a0 T cik_compute_set_wptr +ffffffff81dd2620 T cik_gpu_check_soft_reset +ffffffff81dd27a0 T cik_asic_reset +ffffffff81dd2cf0 t cik_gpu_pci_config_reset +ffffffff81dd3560 T cik_gfx_is_lockup +ffffffff81dd35e0 T cik_pcie_gart_tlb_flush +ffffffff81dd3630 T cik_ib_parse +ffffffff81dd3660 T cik_vm_init +ffffffff81dd36c0 T cik_vm_fini +ffffffff81dd36f0 T cik_vm_flush +ffffffff81dd44f0 T cik_enter_rlc_safe_mode +ffffffff81dd4600 T cik_exit_rlc_safe_mode +ffffffff81dd4640 T cik_update_cg +ffffffff81dd4b90 t cik_enable_mgcg +ffffffff81dd50c0 t cik_enable_cgcg +ffffffff81dd5450 T cik_init_cp_pg_table +ffffffff81dd56e0 T cik_get_csb_size +ffffffff81dd5770 T cik_get_csb_buffer +ffffffff81dd5900 T cik_irq_set +ffffffff81dd6780 t cik_disable_interrupt_state +ffffffff81dd6c90 T cik_irq_process +ffffffff81dd86e0 t cik_irq_ack +ffffffff81dd90c0 T cik_resume +ffffffff81dd9180 t cik_init_golden_registers +ffffffff81dd93b0 t cik_startup +ffffffff81ddc5d0 T cik_suspend +ffffffff81ddca80 T cik_init +ffffffff81ddd100 t cik_init_microcode +ffffffff81dde140 t cik_uvd_init +ffffffff81dde200 t cik_vce_init +ffffffff81dde2e0 t cik_cp_fini +ffffffff81dde370 t cik_irq_fini +ffffffff81dde4a0 t cik_mec_fini +ffffffff81dde580 t cik_pcie_gart_fini +ffffffff81dde690 T cik_fini +ffffffff81ddeac0 T dce8_program_fmt +ffffffff81ddec10 T dce8_bandwidth_update +ffffffff81ddf8c0 T cik_get_gpu_clock_counter +ffffffff81ddf990 T cik_set_uvd_clocks +ffffffff81ddfa10 t cik_set_uvd_clock +ffffffff81ddfbf0 T cik_set_vce_clocks +ffffffff81ddff10 t cik_wait_for_rlc_serdes +ffffffff81de0100 t cik_mec_init +ffffffff81de0340 t cik_uvd_start +ffffffff81de0450 t cik_vce_start +ffffffff81de05a0 t cik_irq_init +ffffffff81de11c0 t cik_cp_resume +ffffffff81de2b50 t cik_uvd_resume +ffffffff81de2c30 t cik_vce_resume +ffffffff81de2d40 t pcie_capability_set_word +ffffffff81de2e70 t pcie_capability_read_word +ffffffff81de2f20 t pcie_capability_clear_and_set_word +ffffffff81de3060 t pcie_capability_write_word +ffffffff81de3130 t cik_get_cu_active_bitmap +ffffffff81de32c0 t radeon_bo_reserve +ffffffff81de3460 t radeon_bo_unreserve +ffffffff81de3570 t cik_update_gfx_pg +ffffffff81de3720 t cik_compute_stop +ffffffff81de38a0 t cik_cp_compute_fini +ffffffff81de3ad0 t request_firmware +ffffffff81de3b80 t release_firmware +ffffffff81de3bc0 t dce8_latency_watermark +ffffffff81de4000 T cik_sdma_get_rptr +ffffffff81de4070 T cik_sdma_get_wptr +ffffffff81de40c0 T cik_sdma_set_wptr +ffffffff81de4110 T cik_sdma_ring_ib_execute +ffffffff81de4560 T cik_sdma_fence_ring_emit +ffffffff81de4760 t cik_sdma_hdp_flush_ring_emit +ffffffff81de49d0 T cik_sdma_semaphore_ring_emit +ffffffff81de4b00 T cik_sdma_enable +ffffffff81de4cf0 T cik_sdma_resume +ffffffff81de51f0 T cik_sdma_fini +ffffffff81de5240 T cik_copy_dma +ffffffff81de56e0 T cik_sdma_ring_test +ffffffff81de59e0 T cik_sdma_ib_test +ffffffff81de5c80 T cik_sdma_is_lockup +ffffffff81de5d10 T cik_sdma_vm_copy_pages +ffffffff81de5e20 T cik_sdma_vm_write_pages +ffffffff81de5fa0 T cik_sdma_vm_set_pages +ffffffff81de6120 T cik_sdma_vm_pad_ib +ffffffff81de6170 T cik_dma_vm_flush +ffffffff81de7000 T cypress_enable_spread_spectrum +ffffffff81de7140 T cypress_start_dpm +ffffffff81de7190 T cypress_enable_sclk_control +ffffffff81de71f0 T cypress_enable_mclk_control +ffffffff81de7250 T cypress_notify_smc_display_change +ffffffff81de72a0 T cypress_program_response_times +ffffffff81de7390 T cypress_advertise_gen2_capability +ffffffff81de74a0 T cypress_notify_link_speed_change_after_state_change +ffffffff81de7590 T cypress_notify_link_speed_change_before_state_change +ffffffff81de7670 T cypress_get_strobe_mode_settings +ffffffff81de7780 T cypress_get_mclk_frequency_ratio +ffffffff81de7830 T cypress_map_clkf_to_ibias +ffffffff81de78f0 T cypress_convert_power_level_to_smc +ffffffff81de7d10 t cypress_populate_mclk_value +ffffffff81de8150 T cypress_upload_sw_state +ffffffff81de8330 T cypress_upload_mc_reg_table +ffffffff81de8410 t cypress_convert_mc_reg_table_to_smc +ffffffff81de8860 T cypress_calculate_burst_time +ffffffff81de88f0 T cypress_program_memory_timing_parameters +ffffffff81de8ac0 T cypress_populate_smc_initial_state +ffffffff81de8eb0 T cypress_populate_smc_acpi_state +ffffffff81de9260 T cypress_construct_voltage_tables +ffffffff81de9420 T cypress_populate_smc_voltage_tables +ffffffff81de9560 T cypress_get_mvdd_configuration +ffffffff81de9650 T cypress_populate_mc_reg_table +ffffffff81de99e0 T cypress_get_table_locations +ffffffff81de9af0 T cypress_enable_display_gap +ffffffff81de9b50 T cypress_dpm_setup_asic +ffffffff81de9cb0 T cypress_dpm_enable +ffffffff81dea960 t cypress_force_mc_use_s1 +ffffffff81deac30 t cypress_gfx_clock_gating_enable +ffffffff81deb010 t cypress_mg_clock_gating_enable +ffffffff81deb2f0 T cypress_dpm_disable +ffffffff81deb580 T cypress_dpm_set_power_state +ffffffff81deb880 T cypress_dpm_display_configuration_changed +ffffffff81deb960 T cypress_dpm_init +ffffffff81debc30 T cypress_dpm_fini +ffffffff81debcd0 T cypress_dpm_vblank_too_short +ffffffff81debd50 t cypress_wait_for_mc_sequencer +ffffffff81dec000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81dec080 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81dec100 T dce3_2_afmt_write_sad_regs +ffffffff81dec200 T dce3_2_audio_set_dto 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sumo_set_uvd_clock +ffffffff81dee780 T evergreen_set_uvd_clocks +ffffffff81deee40 T evergreen_fix_pci_max_read_req_size +ffffffff81def040 T dce4_program_fmt +ffffffff81def170 T dce4_wait_for_vblank +ffffffff81def430 T evergreen_page_flip +ffffffff81def5e0 T evergreen_page_flip_pending +ffffffff81def660 T evergreen_get_temp +ffffffff81def730 T sumo_get_temp +ffffffff81def780 T sumo_pm_init_profile +ffffffff81def8d0 T btc_pm_init_profile +ffffffff81def9f0 T evergreen_pm_misc +ffffffff81defbb0 T evergreen_pm_prepare +ffffffff81defcd0 T evergreen_pm_finish +ffffffff81defdf0 T evergreen_hpd_sense +ffffffff81defe70 T evergreen_hpd_set_polarity +ffffffff81deffc0 T evergreen_hpd_init +ffffffff81df00a0 T evergreen_hpd_fini +ffffffff81df0150 T evergreen_get_number_of_dram_channels +ffffffff81df01a0 T evergreen_bandwidth_update +ffffffff81df0380 t evergreen_line_buffer_adjust +ffffffff81df05a0 t evergreen_program_watermarks +ffffffff81df10a0 T evergreen_mc_wait_for_idle +ffffffff81df1140 T evergreen_pcie_gart_tlb_flush +ffffffff81df1220 T evergreen_mc_stop +ffffffff81df1e80 T evergreen_mc_resume +ffffffff81df2650 T evergreen_mc_program +ffffffff81df2a70 T evergreen_ring_ib_execute +ffffffff81df2f70 T evergreen_mc_init +ffffffff81df30d0 T evergreen_print_gpu_status_regs +ffffffff81df3120 T evergreen_is_display_hung +ffffffff81df3350 T evergreen_gpu_check_soft_reset +ffffffff81df34c0 T evergreen_gpu_pci_config_reset +ffffffff81df3690 T evergreen_asic_reset +ffffffff81df3a80 T evergreen_gfx_is_lockup +ffffffff81df3b00 T sumo_rlc_fini +ffffffff81df3d40 t radeon_bo_reserve +ffffffff81df3ee0 t radeon_bo_unreserve +ffffffff81df3ff0 T sumo_rlc_init +ffffffff81df48e0 T evergreen_rlc_resume +ffffffff81df4c50 T evergreen_get_vblank_counter +ffffffff81df4cc0 T evergreen_disable_interrupt_state +ffffffff81df4fc0 T evergreen_irq_set +ffffffff81df5660 T evergreen_irq_suspend +ffffffff81df56d0 T evergreen_irq_process +ffffffff81df6370 t evergreen_irq_ack +ffffffff81df6aa0 T evergreen_resume +ffffffff81df6bb0 t evergreen_init_golden_registers +ffffffff81df6e20 t evergreen_startup +ffffffff81df8870 T evergreen_suspend +ffffffff81df8a80 T evergreen_init +ffffffff81df8fc0 t evergreen_pcie_gart_fini +ffffffff81df90f0 T evergreen_fini +ffffffff81df9390 T evergreen_pcie_gen2_enable +ffffffff81df9620 T evergreen_program_aspm +ffffffff81df9e10 t evergreen_latency_watermark +ffffffff81dfa010 t evergreen_uvd_start +ffffffff81dfa0f0 t evergreen_cp_load_microcode +ffffffff81dfa250 t evergreen_cp_resume +ffffffff81dfb070 t evergreen_uvd_resume +ffffffff81dfc000 T evergreen_cs_parse +ffffffff81dfea40 T evergreen_dma_cs_parse +ffffffff81dffc40 T evergreen_ib_parse +ffffffff81e00110 T evergreen_dma_ib_parse +ffffffff81e002f0 t evergreen_cs_track_check +ffffffff81e01470 t evergreen_cs_handle_reg +ffffffff81e033f0 t evergreen_surface_value_conv_check +ffffffff81e036e0 t evergreen_surface_check +ffffffff81e03b90 t evergreen_cs_track_validate_htile +ffffffff81e03e50 t evergreen_vm_reg_valid +ffffffff81e05000 T evergreen_dma_fence_ring_emit +ffffffff81e052f0 T evergreen_dma_ring_ib_execute +ffffffff81e05680 T evergreen_copy_dma +ffffffff81e05aa0 T evergreen_dma_is_lockup +ffffffff81e06000 T dce4_audio_enable +ffffffff81e06080 T evergreen_hdmi_update_acr +ffffffff81e062d0 T dce4_afmt_write_latency_fields +ffffffff81e06340 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81e063c0 T dce4_afmt_dp_write_speaker_allocation +ffffffff81e06440 T evergreen_hdmi_write_sad_regs +ffffffff81e06540 T evergreen_set_avi_packet +ffffffff81e06700 T dce4_hdmi_audio_set_dto +ffffffff81e067e0 T dce4_dp_audio_set_dto +ffffffff81e068e0 T dce4_set_vbi_packet +ffffffff81e06950 T dce4_hdmi_set_color_depth +ffffffff81e06ac0 T dce4_set_audio_packet +ffffffff81e06d10 T dce4_set_mute +ffffffff81e06e20 T evergreen_hdmi_enable +ffffffff81e071b0 T evergreen_dp_enable +ffffffff81e08000 T kv_dpm_enable_bapm +ffffffff81e08070 T kv_dpm_enable +ffffffff81e09060 t kv_populate_vce_table +ffffffff81e09300 t kv_populate_samu_table +ffffffff81e09580 t kv_populate_acp_table +ffffffff81e09730 t kv_start_am +ffffffff81e09770 t kv_enable_auto_thermal_throttling +ffffffff81e097b0 t kv_enable_dpm_voltage_scaling +ffffffff81e097f0 t kv_set_dpm_interval +ffffffff81e09830 t kv_start_dpm +ffffffff81e09880 t kv_enable_didt +ffffffff81e09b80 T kv_dpm_late_enable +ffffffff81e09dd0 T kv_dpm_powergate_uvd +ffffffff81e09f90 T kv_dpm_disable +ffffffff81e0a390 T kv_dpm_force_performance_level +ffffffff81e0a540 t kv_force_dpm_lowest +ffffffff81e0a620 T kv_dpm_pre_set_power_state +ffffffff81e0aba0 T kv_dpm_set_power_state +ffffffff81e0b490 t kv_set_valid_clock_range +ffffffff81e0b630 t kv_calculate_ds_divider +ffffffff81e0b7d0 t kv_calculate_nbps_level_settings +ffffffff81e0b950 t kv_update_vce_dpm +ffffffff81e0bb70 T kv_dpm_post_set_power_state +ffffffff81e0bc10 T kv_dpm_setup_asic +ffffffff81e0bc80 T kv_dpm_init +ffffffff81e0c580 T kv_dpm_debugfs_print_current_performance_level +ffffffff81e0c5f0 T kv_dpm_get_current_sclk +ffffffff81e0c660 T kv_dpm_get_current_mclk +ffffffff81e0c690 T kv_dpm_print_power_state +ffffffff81e0c760 T kv_dpm_fini +ffffffff81e0c810 T kv_dpm_display_configuration_changed +ffffffff81e0c840 T kv_dpm_get_sclk +ffffffff81e0c890 T kv_dpm_get_mclk +ffffffff81e0d000 T kv_notify_message_to_smu +ffffffff81e0d0c0 T kv_dpm_get_enable_mask +ffffffff81e0d1b0 T kv_send_msg_to_smc_with_parameter +ffffffff81e0d280 T kv_read_smc_sram_dword +ffffffff81e0d310 T kv_smc_dpm_enable +ffffffff81e0d450 T kv_smc_bapm_enable +ffffffff81e0d590 T kv_copy_bytes_to_smc +ffffffff81e0e000 T tn_smc_rreg +ffffffff81e0e090 T tn_smc_wreg +ffffffff81e0e100 T ni_mc_load_microcode +ffffffff81e0e2f0 T ni_init_microcode +ffffffff81e0e8c0 t request_firmware +ffffffff81e0e970 t release_firmware +ffffffff81e0e9b0 T cayman_get_allowed_info_register +ffffffff81e0ea40 T tn_get_temp +ffffffff81e0eae0 T cayman_pcie_gart_tlb_flush +ffffffff81e0eb30 T cayman_cp_int_cntl_setup +ffffffff81e0eb80 T cayman_fence_ring_emit +ffffffff81e0ef70 T cayman_ring_ib_execute +ffffffff81e0f440 T cayman_gfx_get_rptr +ffffffff81e0f4d0 T cayman_gfx_get_wptr +ffffffff81e0f540 T cayman_gfx_set_wptr +ffffffff81e0f5c0 T cayman_gpu_check_soft_reset +ffffffff81e0f760 T cayman_asic_reset +ffffffff81e0faf0 T cayman_gfx_is_lockup +ffffffff81e0fb70 T cayman_resume +ffffffff81e0fc30 t ni_init_golden_registers +ffffffff81e0fd20 t cayman_startup +ffffffff81e112e0 T cayman_suspend +ffffffff81e11520 T cayman_init +ffffffff81e119b0 t cayman_uvd_init +ffffffff81e11a70 t cayman_vce_init +ffffffff81e11b50 t cayman_cp_fini +ffffffff81e11be0 t cayman_pcie_gart_fini +ffffffff81e11d30 T cayman_fini +ffffffff81e12070 T cayman_vm_init +ffffffff81e120d0 T cayman_vm_fini +ffffffff81e12100 T cayman_vm_decode_fault +ffffffff81e121a0 T cayman_vm_flush +ffffffff81e12680 T tn_set_vce_clocks +ffffffff81e12980 t cayman_uvd_start +ffffffff81e12a60 t cayman_vce_start +ffffffff81e12bb0 t cayman_cp_load_microcode +ffffffff81e12d40 t cayman_cp_resume +ffffffff81e13df0 t cayman_uvd_resume +ffffffff81e13ed0 t cayman_vce_resume +ffffffff81e14000 T cayman_dma_get_rptr +ffffffff81e14070 T cayman_dma_get_wptr +ffffffff81e140c0 T cayman_dma_set_wptr +ffffffff81e14110 T cayman_dma_ring_ib_execute +ffffffff81e144e0 T cayman_dma_stop +ffffffff81e14590 T cayman_dma_resume +ffffffff81e14800 T cayman_dma_fini +ffffffff81e148c0 T cayman_dma_is_lockup +ffffffff81e14950 T cayman_dma_vm_copy_pages +ffffffff81e14a50 T cayman_dma_vm_write_pages +ffffffff81e14bc0 T cayman_dma_vm_set_pages +ffffffff81e14d30 T cayman_dma_vm_pad_ib +ffffffff81e14d80 T cayman_dma_vm_flush +ffffffff81e16000 T ni_get_pi +ffffffff81e16030 T ni_get_ps +ffffffff81e16060 T ni_dpm_vblank_too_short +ffffffff81e160e0 T ni_dpm_force_performance_level +ffffffff81e16250 T ni_copy_and_switch_arb_sets +ffffffff81e16520 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81e165a0 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81e16620 T ni_dpm_setup_asic +ffffffff81e16880 T ni_update_current_ps +ffffffff81e16950 T ni_update_requested_ps +ffffffff81e16a20 T ni_dpm_enable +ffffffff81e17a20 t ni_init_smc_table +ffffffff81e18450 t ni_init_smc_spll_table +ffffffff81e185e0 t ni_init_arb_table_index +ffffffff81e18690 t ni_populate_mc_reg_table +ffffffff81e18bd0 t ni_initialize_smc_cac_tables +ffffffff81e19ea0 t ni_initialize_hardware_cac_manager +ffffffff81e1a4d0 t ni_populate_smc_tdp_limits +ffffffff81e1a6b0 t ni_program_response_times +ffffffff81e1a800 T ni_dpm_disable +ffffffff81e1ac60 t ni_enable_power_containment +ffffffff81e1ad40 t ni_enable_smc_cac +ffffffff81e1aea0 T ni_dpm_pre_set_power_state +ffffffff81e1b510 T ni_dpm_set_power_state +ffffffff81e1b890 t ni_upload_sw_state +ffffffff81e1c550 t ni_upload_mc_reg_table +ffffffff81e1c7d0 t ni_power_control_set_level +ffffffff81e1c8d0 T ni_dpm_post_set_power_state +ffffffff81e1c9c0 T ni_dpm_init +ffffffff81e1d420 T ni_dpm_fini +ffffffff81e1d4f0 T ni_dpm_print_power_state +ffffffff81e1d5f0 T ni_dpm_debugfs_print_current_performance_level +ffffffff81e1d630 T ni_dpm_get_current_sclk +ffffffff81e1d6a0 T ni_dpm_get_current_mclk +ffffffff81e1d710 T ni_dpm_get_sclk +ffffffff81e1d780 T ni_dpm_get_mclk +ffffffff81e1d7e0 t ni_do_program_memory_timing_parameters +ffffffff81e1d940 t ni_calculate_sclk_params +ffffffff81e1db90 t ni_calculate_power_boost_limit +ffffffff81e1dd30 t ni_populate_mclk_value +ffffffff81e1f000 T r100_wait_for_vblank +ffffffff81e1f190 T r100_page_flip +ffffffff81e1f4a0 T r100_page_flip_pending +ffffffff81e1f570 T r100_pm_get_dynpm_state +ffffffff81e1f790 T r100_pm_init_profile +ffffffff81e1f870 T r100_pm_misc +ffffffff81e1fd10 T r100_pm_prepare +ffffffff81e1fdc0 T r100_pm_finish +ffffffff81e1fe70 T r100_gui_idle +ffffffff81e1feb0 T r100_hpd_sense +ffffffff81e1ff10 T r100_hpd_set_polarity +ffffffff81e1ffd0 T r100_hpd_init +ffffffff81e20080 T r100_hpd_fini +ffffffff81e200f0 T r100_pci_gart_tlb_flush +ffffffff81e20120 T r100_pci_gart_init +ffffffff81e20200 T r100_pci_gart_get_page_entry +ffffffff81e20230 T r100_pci_gart_set_page +ffffffff81e20270 T r100_pci_gart_enable +ffffffff81e20360 T r100_pci_gart_disable +ffffffff81e203e0 T r100_pci_gart_fini +ffffffff81e20460 T r100_irq_set +ffffffff81e20540 T r100_irq_disable +ffffffff81e205c0 T r100_irq_process +ffffffff81e208f0 T r100_get_vblank_counter +ffffffff81e20940 T r100_fence_ring_emit +ffffffff81e20e10 T r100_semaphore_ring_emit +ffffffff81e20e40 T r100_copy_blit +ffffffff81e21570 T r100_ring_start +ffffffff81e21670 T r100_gfx_get_rptr +ffffffff81e216d0 T r100_gfx_get_wptr +ffffffff81e21710 T r100_gfx_set_wptr +ffffffff81e21750 T r100_cp_init +ffffffff81e21d70 T r100_debugfs_cp_init +ffffffff81e21da0 T r100_cp_fini +ffffffff81e21e70 T r100_cp_disable +ffffffff81e21fd0 T r100_gui_wait_for_idle +ffffffff81e220c0 T r100_reloc_pitch_offset +ffffffff81e22230 T r100_packet3_load_vbpntr +ffffffff81e22520 T r100_cs_parse_packet0 +ffffffff81e22630 T r100_cs_packet_parse_vline +ffffffff81e22860 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81e228e0 T r100_cs_parse +ffffffff81e23bd0 T r100_cs_track_clear +ffffffff81e23f60 T r100_cs_track_check +ffffffff81e24820 T r100_mc_wait_for_idle +ffffffff81e248c0 T r100_gpu_is_lockup +ffffffff81e24930 T r100_enable_bm +ffffffff81e24980 T r100_bm_disable +ffffffff81e24a40 T r100_asic_reset +ffffffff81e24dd0 T r100_mc_stop +ffffffff81e24f90 T r100_mc_resume +ffffffff81e25050 T r100_set_common_regs +ffffffff81e25200 T r100_vram_init_sizes +ffffffff81e25410 T r100_vga_set_state +ffffffff81e25470 T r100_pll_errata_after_index +ffffffff81e254b0 T r100_pll_rreg +ffffffff81e25620 T r100_pll_wreg +ffffffff81e25770 T r100_debugfs_rbbm_init +ffffffff81e257a0 T r100_debugfs_mc_info_init +ffffffff81e257d0 T r100_set_surface_reg +ffffffff81e25a20 T r100_clear_surface_reg +ffffffff81e25ae0 T r100_bandwidth_update +ffffffff81e26550 T r100_ring_test +ffffffff81e26880 T r100_ring_ib_execute +ffffffff81e26b00 T r100_ib_test +ffffffff81e26ec0 T r100_vga_render_disable +ffffffff81e26f20 T r100_resume +ffffffff81e27160 t r100_startup +ffffffff81e27720 T r100_suspend +ffffffff81e27820 T r100_fini +ffffffff81e27990 T r100_restore_sanity +ffffffff81e27a30 T r100_init +ffffffff81e27f70 t r100_set_safe_registers +ffffffff81e27ff0 T r100_mm_rreg_slow +ffffffff81e28080 T r100_mm_wreg_slow +ffffffff81e280f0 T r100_io_rreg +ffffffff81e281a0 T r100_io_wreg +ffffffff81e28220 t r100_get_vtx_size +ffffffff81e28310 t r100_cs_track_texture_print +ffffffff81e29000 T r200_copy_dma +ffffffff81e294e0 T r200_packet0_check +ffffffff81e2a340 t r200_get_vtx_size_0 +ffffffff81e2a500 t r200_get_vtx_size_1 +ffffffff81e2a590 T r200_set_safe_registers +ffffffff81e2b000 T rv370_pcie_rreg +ffffffff81e2b090 T rv370_pcie_wreg +ffffffff81e2b100 T rv370_pcie_gart_tlb_flush +ffffffff81e2b390 T rv370_pcie_gart_get_page_entry +ffffffff81e2b3f0 T rv370_pcie_gart_set_page +ffffffff81e2b430 T rv370_pcie_gart_init +ffffffff81e2b510 T rv370_pcie_gart_enable +ffffffff81e2b950 T rv370_pcie_gart_disable +ffffffff81e2bb40 T rv370_pcie_gart_fini +ffffffff81e2bb80 T r300_fence_ring_emit +ffffffff81e2c190 T r300_ring_start +ffffffff81e2cc30 T r300_mc_wait_for_idle +ffffffff81e2ccd0 T r300_asic_reset +ffffffff81e2cf30 T r300_mc_init +ffffffff81e2d000 T rv370_set_pcie_lanes +ffffffff81e2d220 T rv370_get_pcie_lanes +ffffffff81e2d2e0 T r300_cs_parse +ffffffff81e2d6b0 t r300_packet0_check +ffffffff81e2e610 T r300_set_reg_safe +ffffffff81e2e650 T r300_mc_program +ffffffff81e2e800 T r300_clock_startup +ffffffff81e2e890 T r300_resume +ffffffff81e2eab0 t r300_startup +ffffffff81e2eea0 T r300_suspend +ffffffff81e2ef50 T r300_fini +ffffffff81e2f0b0 T r300_init +ffffffff81e30000 T r420_pm_init_profile +ffffffff81e300f0 T r420_pipes_init +ffffffff81e302f0 T r420_mc_rreg +ffffffff81e30380 T r420_mc_wreg +ffffffff81e30400 T r420_resume +ffffffff81e30620 t r420_startup +ffffffff81e308b0 T r420_suspend +ffffffff81e30aa0 T r420_fini +ffffffff81e30bf0 T r420_init +ffffffff81e30f50 T r420_debugfs_pipes_info_init +ffffffff81e30f80 t r420_cp_errata_init +ffffffff81e32000 T r520_mc_wait_for_idle +ffffffff81e320b0 T r520_resume +ffffffff81e321e0 t r520_startup +ffffffff81e326b0 T r520_init +ffffffff81e33000 T r600_rcu_rreg +ffffffff81e330a0 T r600_rcu_wreg +ffffffff81e33120 T r600_uvd_ctx_rreg +ffffffff81e331c0 T r600_uvd_ctx_wreg +ffffffff81e33240 T r600_get_allowed_info_register +ffffffff81e332c0 T r600_get_xclk +ffffffff81e332f0 T r600_set_uvd_clocks +ffffffff81e33980 T dce3_program_fmt +ffffffff81e33ab0 T rv6xx_get_temp +ffffffff81e33b00 T r600_pm_get_dynpm_state +ffffffff81e33f10 T rs780_pm_init_profile +ffffffff81e34020 T r600_pm_init_profile +ffffffff81e342e0 T r600_pm_misc +ffffffff81e343d0 T r600_gui_idle +ffffffff81e34410 T r600_hpd_sense +ffffffff81e34530 T r600_hpd_set_polarity +ffffffff81e347b0 T r600_hpd_init +ffffffff81e34990 T r600_hpd_fini +ffffffff81e34b40 T r600_pcie_gart_tlb_flush +ffffffff81e34c80 T r600_pcie_gart_init +ffffffff81e34d30 T r600_mc_wait_for_idle +ffffffff81e34dd0 T rs780_mc_rreg +ffffffff81e34e80 T rs780_mc_wreg +ffffffff81e34f10 T r600_vram_scratch_init +ffffffff81e35030 t radeon_bo_reserve +ffffffff81e351d0 t radeon_bo_unreserve +ffffffff81e352e0 T r600_vram_scratch_fini +ffffffff81e35370 T r600_set_bios_scratch_engine_hung +ffffffff81e353c0 T r600_gpu_check_soft_reset +ffffffff81e35790 T r600_asic_reset +ffffffff81e35bc0 t r600_gpu_pci_config_reset +ffffffff81e35e20 T r600_gfx_is_lockup +ffffffff81e35ea0 T r6xx_remap_render_backend +ffffffff81e36070 T r600_count_pipe_bits +ffffffff81e360e0 T r600_pciep_rreg +ffffffff81e36170 T r600_pciep_wreg +ffffffff81e361e0 T r600_cp_stop +ffffffff81e36260 T r600_init_microcode +ffffffff81e36810 t request_firmware +ffffffff81e368c0 t release_firmware +ffffffff81e36900 T r600_gfx_get_rptr +ffffffff81e36960 T r600_gfx_get_wptr +ffffffff81e369a0 T r600_gfx_set_wptr +ffffffff81e369e0 T r600_cp_start +ffffffff81e36db0 T r600_cp_resume +ffffffff81e371d0 T r600_ring_init +ffffffff81e37290 T r600_cp_fini +ffffffff81e37320 T r600_scratch_init +ffffffff81e37390 T r600_ring_test +ffffffff81e376b0 T r600_fence_ring_emit +ffffffff81e38020 T r600_semaphore_ring_emit +ffffffff81e38240 T r600_copy_cpdma +ffffffff81e388b0 T r600_set_surface_reg +ffffffff81e388e0 T r600_clear_surface_reg +ffffffff81e38910 T r600_vga_set_state +ffffffff81e38970 T r600_resume +ffffffff81e38a20 t r600_startup +ffffffff81e3a930 T r600_suspend +ffffffff81e3aaf0 T r600_irq_suspend +ffffffff81e3abd0 t r600_pcie_gart_disable +ffffffff81e3add0 T r600_init +ffffffff81e3b6f0 T r600_ih_ring_init +ffffffff81e3b760 T r600_irq_fini +ffffffff81e3b8e0 t r600_pcie_gart_fini +ffffffff81e3b920 T r600_fini +ffffffff81e3bb70 T r600_ring_ib_execute +ffffffff81e3c060 T r600_ib_test +ffffffff81e3c370 T r600_ih_ring_alloc +ffffffff81e3c4c0 T r600_ih_ring_fini +ffffffff81e3c570 T r600_rlc_stop +ffffffff81e3c780 T r600_disable_interrupts +ffffffff81e3c830 T r600_irq_init +ffffffff81e3ccd0 t r600_disable_interrupt_state +ffffffff81e3cfd0 T r600_irq_disable +ffffffff81e3d0a0 T r600_irq_set +ffffffff81e3d8a0 t r600_irq_ack +ffffffff81e3ddd0 T r600_irq_process +ffffffff81e3eb40 T r600_mmio_hdp_flush +ffffffff81e3ebc0 T r600_set_pcie_lanes +ffffffff81e3ed00 T r600_get_pcie_lanes +ffffffff81e3edf0 T r600_get_gpu_clock_counter +ffffffff81e3eea0 t r600_cp_load_microcode +ffffffff81e3f200 t r600_uvd_resume +ffffffff81e40000 T r600_fmt_is_valid_color +ffffffff81e40040 T r600_fmt_is_valid_texture +ffffffff81e40090 T r600_fmt_get_blocksize +ffffffff81e400d0 T r600_fmt_get_nblocksx +ffffffff81e40120 T r600_fmt_get_nblocksy +ffffffff81e40180 T r600_cs_common_vline_parse +ffffffff81e40470 T r600_mip_minify +ffffffff81e404d0 T r600_cs_parse +ffffffff81e42540 T r600_dma_cs_next_reloc +ffffffff81e425d0 T r600_dma_cs_parse +ffffffff81e42cb0 t r600_cs_track_check +ffffffff81e43e90 t r600_cs_check_reg +ffffffff81e44e70 t r600_is_safe_reg +ffffffff81e44f20 t r600_texture_size +ffffffff81e46000 T r600_dma_get_rptr +ffffffff81e46060 T r600_dma_get_wptr +ffffffff81e460a0 T r600_dma_set_wptr +ffffffff81e460e0 T r600_dma_stop +ffffffff81e46170 T r600_dma_resume +ffffffff81e46390 T r600_dma_fini +ffffffff81e46410 T r600_dma_is_lockup +ffffffff81e46490 T r600_dma_ring_test +ffffffff81e46750 T r600_dma_fence_ring_emit +ffffffff81e46960 T r600_dma_semaphore_ring_emit +ffffffff81e46aa0 T r600_dma_ib_test +ffffffff81e46d10 T r600_dma_ring_ib_execute +ffffffff81e470a0 T r600_copy_dma +ffffffff81e48000 T r600_dpm_print_class_info +ffffffff81e48340 T r600_dpm_print_cap_info +ffffffff81e483e0 T r600_dpm_print_ps_status +ffffffff81e484a0 T r600_dpm_get_vblank_time +ffffffff81e48560 T r600_dpm_get_vrefresh +ffffffff81e485f0 T r600_calculate_u_and_p +ffffffff81e48670 T r600_calculate_at +ffffffff81e48720 T r600_gfx_clockgating_enable +ffffffff81e48830 T r600_dynamicpm_enable +ffffffff81e48880 T r600_enable_thermal_protection +ffffffff81e488e0 T r600_enable_acpi_pm +ffffffff81e48930 T r600_enable_dynamic_pcie_gen2 +ffffffff81e48980 T r600_dynamicpm_enabled +ffffffff81e489c0 T r600_enable_sclk_control +ffffffff81e48a20 T r600_enable_mclk_control +ffffffff81e48a80 T r600_enable_spll_bypass +ffffffff81e48ad0 T r600_wait_for_spll_change +ffffffff81e48b60 T r600_set_bsp +ffffffff81e48ba0 T r600_set_at +ffffffff81e48c00 T r600_set_tc +ffffffff81e48c60 T r600_select_td +ffffffff81e48d10 T r600_set_vrc +ffffffff81e48d50 T r600_set_tpu +ffffffff81e48db0 T r600_set_tpc +ffffffff81e48e10 T r600_set_sstu +ffffffff81e48e70 T r600_set_sst +ffffffff81e48ec0 T r600_set_git +ffffffff81e48f10 T r600_set_fctu +ffffffff81e48f70 T r600_set_fct +ffffffff81e48fc0 T r600_set_ctxcgtt3d_rphc +ffffffff81e49020 T r600_set_ctxcgtt3d_rsdc +ffffffff81e49080 T r600_set_vddc3d_oorsu +ffffffff81e490e0 T r600_set_vddc3d_oorphc +ffffffff81e49140 T r600_set_vddc3d_oorsdc +ffffffff81e491a0 T r600_set_mpll_lock_time +ffffffff81e491f0 T r600_set_mpll_reset_time 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r600_hdmi_buffer_status_changed +ffffffff81e4c350 T r600_hdmi_update_audio_settings +ffffffff81e4c7c0 T r600_audio_enable +ffffffff81e4c840 T r600_audio_get_pin +ffffffff81e4c870 T r600_hdmi_update_acr +ffffffff81e4cc90 T r600_set_avi_packet +ffffffff81e4ced0 T r600_hdmi_audio_workaround +ffffffff81e4cfa0 T r600_hdmi_audio_set_dto +ffffffff81e4d060 T r600_set_vbi_packet +ffffffff81e4d120 T r600_set_audio_packet +ffffffff81e4d460 T r600_set_mute +ffffffff81e4d570 T r600_hdmi_enable +ffffffff81e4e000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81e4e040 T radeon_acpi_pcie_notify_device_ready +ffffffff81e4e170 T radeon_acpi_pcie_performance_request +ffffffff81e4e570 T radeon_acpi_init +ffffffff81e4ede0 t radeon_acpi_event +ffffffff81e4f160 T radeon_acpi_fini +ffffffff81e50000 T radeon_agp_head_init +ffffffff81e50050 T radeon_agp_init +ffffffff81e500b0 T radeon_agp_resume +ffffffff81e50150 T radeon_agp_fini +ffffffff81e501a0 T radeon_agp_suspend +ffffffff81e51000 T radeon_agp_disable +ffffffff81e51130 T radeon_asic_init +ffffffff81e51900 t radeon_invalid_rreg +ffffffff81e51940 t radeon_invalid_wreg +ffffffff81e51990 t radeon_invalid_get_allowed_info_register +ffffffff81e52000 T radeon_atombios_i2c_init +ffffffff81e523b0 T radeon_atombios_lookup_gpio +ffffffff81e524c0 T radeon_get_atom_connector_info_from_object_table +ffffffff81e52e70 t radeon_lookup_i2c_gpio +ffffffff81e53160 t radeon_atom_apply_quirks +ffffffff81e53590 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81e53af0 T radeon_atom_get_clock_info +ffffffff81e53ef0 T radeon_atombios_sideport_present +ffffffff81e53fb0 T radeon_atombios_get_tmds_info +ffffffff81e54100 T radeon_atombios_get_ppll_ss_info +ffffffff81e54230 T radeon_atombios_get_asic_ss_info +ffffffff81e54510 t radeon_atombios_get_igp_ss_overrides +ffffffff81e54630 T radeon_atombios_get_lvds_info +ffffffff81e549d0 T radeon_atombios_get_primary_dac_info +ffffffff81e54aa0 T radeon_atom_get_tv_timings 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radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81e56e10 T radeon_atom_get_voltage_evv +ffffffff81e56ed0 T radeon_atom_get_voltage_gpio_settings +ffffffff81e56ff0 T radeon_atom_is_voltage_gpio +ffffffff81e571a0 T radeon_atom_get_svi2_info +ffffffff81e57290 T radeon_atom_get_max_voltage +ffffffff81e57420 T radeon_atom_get_min_voltage +ffffffff81e57580 T radeon_atom_get_voltage_step +ffffffff81e576a0 T radeon_atom_round_to_true_voltage +ffffffff81e57820 T radeon_atom_get_voltage_table +ffffffff81e57ac0 T radeon_atom_get_memory_info +ffffffff81e57c80 T radeon_atom_get_mclk_range_table +ffffffff81e57ed0 T radeon_atom_init_mc_reg_table +ffffffff81e58160 T radeon_atom_initialize_bios_scratch_regs +ffffffff81e58230 T radeon_save_bios_scratch_regs +ffffffff81e58310 T radeon_restore_bios_scratch_regs +ffffffff81e583f0 T radeon_atom_output_lock +ffffffff81e58480 T radeon_atombios_connected_scratch_regs +ffffffff81e58ce0 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81e58e30 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81e59060 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81e59240 t radeon_atombios_add_pplib_thermal_controller +ffffffff81e596c0 t radeon_atombios_parse_pplib_clock_info +ffffffff81e59a80 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81e5a000 T radeon_audio_init +ffffffff81e5a200 t radeon_audio_enable +ffffffff81e5a360 T radeon_audio_endpoint_rreg +ffffffff81e5a3a0 T radeon_audio_endpoint_wreg +ffffffff81e5a3e0 T radeon_audio_get_pin +ffffffff81e5a430 T radeon_audio_detect +ffffffff81e5a5d0 T radeon_audio_fini +ffffffff81e5a660 T radeon_audio_mode_set +ffffffff81e5a6b0 T radeon_audio_dpms +ffffffff81e5a700 T radeon_audio_decode_dfs_div +ffffffff81e5a760 T radeon_audio_component_init +ffffffff81e5a7d0 T radeon_audio_component_fini +ffffffff81e5a820 t radeon_audio_hdmi_mode_set +ffffffff81e5af80 t radeon_audio_write_speaker_allocation +ffffffff81e5b060 t radeon_audio_write_sad_regs +ffffffff81e5b160 t radeon_audio_set_avi_packet +ffffffff81e5b2c0 t radeon_audio_dp_mode_set +ffffffff81e5b470 t radeon_audio_rreg +ffffffff81e5b4c0 t radeon_audio_wreg +ffffffff81e5c000 T radeon_benchmark +ffffffff81e5cc80 t radeon_benchmark_move +ffffffff81e5cff0 t radeon_bo_reserve +ffffffff81e5d190 t radeon_bo_unreserve +ffffffff81e5d2a0 t radeon_benchmark_do_move +ffffffff81e5e000 T radeon_get_bios +ffffffff81e5f0b0 t igp_read_bios_from_vram +ffffffff81e5f200 t radeon_read_bios +ffffffff81e60000 T radeon_legacy_get_engine_clock +ffffffff81e600f0 T radeon_legacy_get_memory_clock +ffffffff81e601e0 T radeon_get_clock_info +ffffffff81e607f0 T radeon_legacy_set_engine_clock +ffffffff81e60c30 T radeon_legacy_set_clock_gating +ffffffff81e63000 T radeon_combios_check_hardcoded_edid +ffffffff81e63120 t combios_get_table_offset +ffffffff81e63710 T radeon_bios_get_hardcoded_edid +ffffffff81e637b0 T radeon_combios_i2c_init +ffffffff81e63ea0 t combios_setup_i2c_bus +ffffffff81e64190 t radeon_combios_get_i2c_info_from_table +ffffffff81e643e0 T radeon_combios_get_clock_info +ffffffff81e645d0 T radeon_combios_sideport_present +ffffffff81e64650 T radeon_combios_get_primary_dac_info +ffffffff81e647a0 T radeon_combios_get_tv_info +ffffffff81e648b0 T radeon_combios_get_tv_dac_info +ffffffff81e64b70 T radeon_combios_get_lvds_info +ffffffff81e65220 T radeon_legacy_get_tmds_info_from_table +ffffffff81e652f0 T radeon_legacy_get_tmds_info_from_combios +ffffffff81e65520 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81e65760 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81e65ad0 T radeon_get_legacy_connector_info_from_table +ffffffff81e68060 T radeon_get_legacy_connector_info_from_bios +ffffffff81e68da0 T radeon_combios_get_power_modes +ffffffff81e694b0 T radeon_external_tmds_setup +ffffffff81e695a0 T radeon_combios_external_tmds_setup +ffffffff81e69b60 T radeon_combios_asic_init +ffffffff81e6a100 t combios_parse_mmio_table +ffffffff81e6a340 t combios_parse_pll_table +ffffffff81e6a6a0 T radeon_combios_initialize_bios_scratch_regs +ffffffff81e6a730 T radeon_combios_output_lock +ffffffff81e6a790 T radeon_combios_connected_scratch_regs +ffffffff81e6ab80 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81e6ac60 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81e6b000 T radeon_connector_hotplug +ffffffff81e6b140 T radeon_get_monitor_bpc +ffffffff81e6b610 T radeon_connector_edid +ffffffff81e6b6d0 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81e6b750 T radeon_connector_is_dp12_capable +ffffffff81e6b7f0 T radeon_add_atom_connector +ffffffff81e6c940 T radeon_add_legacy_connector +ffffffff81e6ced0 t radeon_dp_detect +ffffffff81e6d320 t radeon_dvi_force +ffffffff81e6d370 t radeon_connector_set_property +ffffffff81e6dc60 t radeon_connector_unregister +ffffffff81e6dcd0 t radeon_connector_destroy +ffffffff81e6dd60 t radeon_best_single_encoder +ffffffff81e6ddd0 t radeon_connector_get_edid +ffffffff81e6df40 t radeon_dp_get_modes +ffffffff81e6e2d0 t radeon_dp_mode_valid +ffffffff81e6e4d0 t radeon_dvi_encoder +ffffffff81e6e590 t radeon_fixup_lvds_native_mode +ffffffff81e6e700 t radeon_add_common_modes +ffffffff81e6e800 t radeon_fp_native_mode +ffffffff81e6e8f0 t radeon_lvds_set_property +ffffffff81e6e9f0 t radeon_vga_detect +ffffffff81e6ece0 t radeon_connector_analog_encoder_conflict_solve +ffffffff81e6ef30 t radeon_vga_get_modes +ffffffff81e6f020 t radeon_vga_mode_valid +ffffffff81e6f080 t radeon_dvi_detect +ffffffff81e6f7a0 t radeon_dvi_mode_valid +ffffffff81e6f940 t radeon_tv_detect +ffffffff81e6fbc0 t radeon_tv_get_modes +ffffffff81e6fcb0 t radeon_tv_mode_valid +ffffffff81e6fd00 t radeon_lvds_detect +ffffffff81e6fec0 t radeon_lvds_get_modes +ffffffff81e70050 t radeon_lvds_mode_valid +ffffffff81e71000 T radeon_cs_parser_init +ffffffff81e714e0 T radeon_cs_ioctl +ffffffff81e71dd0 t radeon_cs_parser_fini +ffffffff81e71fb0 t radeon_cs_ib_vm_chunk +ffffffff81e72390 T radeon_cs_packet_parse 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radeon_suspend_kms +ffffffff81e77cd0 T radeon_resume_kms +ffffffff81e77fc0 T radeon_gpu_reset +ffffffff81e79000 T radeon_crtc_load_lut +ffffffff81e7a030 T radeon_crtc_handle_vblank +ffffffff81e7a1d0 T radeon_get_crtc_scanoutpos +ffffffff81e7a7d0 T radeon_crtc_handle_flip +ffffffff81e7a920 T radeon_compute_pll_avivo +ffffffff81e7ae90 T radeon_compute_pll_legacy +ffffffff81e7b580 T radeon_framebuffer_init +ffffffff81e7b610 T radeon_update_display_priority +ffffffff81e7b670 T radeon_modeset_init +ffffffff81e7c2f0 T radeon_modeset_fini +ffffffff81e7c4b0 T radeon_crtc_scaling_mode_fixup +ffffffff81e7c840 T radeon_get_crtc_scanout_position +ffffffff81e7c8b0 t radeon_user_framebuffer_create +ffffffff81e7cab0 t radeon_crtc_gamma_set +ffffffff81e7cb00 t radeon_crtc_destroy +ffffffff81e7cb50 t radeon_crtc_set_config +ffffffff81e7cc30 t radeon_crtc_page_flip_target +ffffffff81e7d1a0 t radeon_flip_work_func +ffffffff81e7d440 t radeon_unpin_work_func +ffffffff81e7d4e0 t radeon_bo_reserve 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radeon_get_external_encoder +ffffffff81e815d0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81e81670 T radeon_panel_mode_fixup +ffffffff81e81840 T radeon_dig_monitor_is_duallink +ffffffff81e81970 T radeon_encoder_is_digital +ffffffff81e82000 T radeon_fbdev_setup +ffffffff81e82180 T radeon_fbdev_set_suspend +ffffffff81e821d0 T radeon_fbdev_robj_is_fb +ffffffff81e82250 T radeondrm_burner +ffffffff81e822e0 T radeondrm_burner_cb +ffffffff81e82310 t radeon_fbdev_fb_helper_fb_probe +ffffffff81e82980 t radeon_bo_reserve +ffffffff81e82b20 t radeon_bo_unreserve +ffffffff81e82c30 t radeon_fbdev_client_unregister +ffffffff81e82ca0 t radeon_fbdev_client_restore +ffffffff81e82cf0 t radeon_fbdev_client_hotplug +ffffffff81e83000 T radeon_fence_emit +ffffffff81e83140 T radeon_fence_process +ffffffff81e83220 t radeon_fence_activity +ffffffff81e834b0 T radeon_fence_signaled +ffffffff81e83530 t radeon_fence_seq_signaled +ffffffff81e83650 T radeon_fence_wait_timeout +ffffffff81e83790 t radeon_fence_wait_seq_timeout +ffffffff81e83c70 T radeon_fence_wait +ffffffff81e83dc0 T radeon_fence_wait_any +ffffffff81e83f10 T radeon_fence_wait_next +ffffffff81e83fe0 T radeon_fence_wait_empty +ffffffff81e84100 T radeon_fence_ref +ffffffff81e84150 T radeon_fence_unref +ffffffff81e84190 T radeon_fence_count_emitted +ffffffff81e842b0 T radeon_fence_need_sync +ffffffff81e84310 T radeon_fence_note_sync +ffffffff81e844e0 T radeon_fence_driver_start_ring +ffffffff81e846f0 T radeon_fence_driver_init +ffffffff81e84840 T radeon_debugfs_fence_init +ffffffff81e84870 T radeon_fence_driver_fini +ffffffff81e84af0 T radeon_fence_driver_force_completion +ffffffff81e84c00 t radeon_fence_get_driver_name +ffffffff81e84c30 t radeon_fence_get_timeline_name +ffffffff81e84cd0 t radeon_fence_enable_signaling +ffffffff81e84f40 t radeon_fence_is_signaled +ffffffff81e850c0 t radeon_fence_default_wait +ffffffff81e85260 t radeon_fence_any_seq_signaled +ffffffff81e853e0 t radeon_fence_check_lockup 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radeon_gem_object_close +ffffffff81e87680 t radeon_gem_object_mmap +ffffffff81e87730 T radeon_gem_info_ioctl +ffffffff81e877a0 T radeon_gem_create_ioctl +ffffffff81e878f0 T radeon_gem_userptr_ioctl +ffffffff81e87920 T radeon_gem_set_domain_ioctl +ffffffff81e87ad0 T radeon_mode_dumb_mmap +ffffffff81e87ba0 T radeon_gem_mmap_ioctl +ffffffff81e87c70 T radeon_gem_busy_ioctl +ffffffff81e87d40 T radeon_gem_wait_idle_ioctl +ffffffff81e87e70 T radeon_gem_set_tiling_ioctl +ffffffff81e87f40 T radeon_gem_get_tiling_ioctl +ffffffff81e88040 t radeon_bo_reserve +ffffffff81e88280 t radeon_bo_unreserve +ffffffff81e88390 T radeon_gem_va_ioctl +ffffffff81e88690 t radeon_gem_va_update_vm +ffffffff81e88820 T radeon_gem_op_ioctl +ffffffff81e88930 T radeon_align_pitch +ffffffff81e889c0 T radeon_mode_dumb_create +ffffffff81e88b20 T radeon_gem_debugfs_init +ffffffff81e89000 T radeon_ddc_probe +ffffffff81e890d0 T radeon_router_select_ddc_port +ffffffff81e89370 T radeon_bb_set_bits +ffffffff81e89500 T radeon_bb_set_dir +ffffffff81e89530 T radeon_bb_read_bits +ffffffff81e89620 T radeon_acquire_bus +ffffffff81e89b20 T radeon_release_bus +ffffffff81e89cc0 T radeon_send_start +ffffffff81e89ce0 T radeon_send_stop +ffffffff81e89d00 T radeon_initiate_xfer +ffffffff81e89d20 T radeon_read_byte +ffffffff81e89d40 T radeon_write_byte +ffffffff81e89d60 T radeon_i2c_create +ffffffff81e89fb0 T radeon_i2c_destroy +ffffffff81e8a030 T radeon_i2c_init +ffffffff81e8a080 T radeon_i2c_fini +ffffffff81e8a140 T radeon_i2c_add +ffffffff81e8a300 T radeon_i2c_lookup +ffffffff81e8a4d0 T radeon_i2c_get_byte +ffffffff81e8a5b0 T radeon_i2c_put_byte +ffffffff81e8a650 T radeon_router_select_cd_port +ffffffff81e8a8f0 t radeon_hw_i2c_xfer +ffffffff81e8b600 t radeon_hw_i2c_func +ffffffff81e8b630 t r100_hw_i2c_xfer +ffffffff81e8bd40 t radeon_get_i2c_prescale +ffffffff81e8c000 T radeon_ib_get +ffffffff81e8c120 T radeon_ib_free +ffffffff81e8c170 T radeon_ib_schedule +ffffffff81e8c470 T radeon_ib_pool_init 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radeon_bo_reserve +ffffffff81e8ef30 T radeon_driver_postclose_kms +ffffffff81e8f1b0 T radeon_get_vblank_counter_kms +ffffffff81e8f3a0 T radeon_enable_vblank_kms +ffffffff81e8f470 T radeon_disable_vblank_kms +ffffffff81e90000 T radeon_crtc_set_base +ffffffff81e90020 T radeon_crtc_do_set_base +ffffffff81e90650 T radeon_crtc_set_base_atomic +ffffffff81e90670 t radeon_bo_reserve +ffffffff81e90810 t radeon_bo_unreserve +ffffffff81e90920 T radeon_legacy_init_crtc +ffffffff81e90970 t radeon_crtc_dpms +ffffffff81e90b80 t radeon_crtc_prepare +ffffffff81e90c00 t radeon_crtc_commit +ffffffff81e90c80 t radeon_crtc_mode_fixup +ffffffff81e90ca0 t radeon_crtc_mode_set +ffffffff81e92380 t radeon_crtc_disable +ffffffff81e93000 T radeon_legacy_get_backlight_level +ffffffff81e93050 T radeon_legacy_set_backlight_level +ffffffff81e930a0 t radeon_legacy_lvds_update +ffffffff81e93440 T radeon_legacy_backlight_init +ffffffff81e93650 t radeon_legacy_backlight_get_brightness +ffffffff81e936b0 T radeon_add_legacy_encoder +ffffffff81e93aa0 t radeon_legacy_backlight_update_status +ffffffff81e93b50 t radeon_lvds_enc_destroy +ffffffff81e93c00 t radeon_legacy_lvds_dpms +ffffffff81e93c60 t radeon_legacy_mode_fixup +ffffffff81e93ce0 t radeon_legacy_lvds_prepare +ffffffff81e93d80 t radeon_legacy_lvds_commit +ffffffff81e93e10 t radeon_legacy_lvds_mode_set +ffffffff81e94040 t radeon_legacy_encoder_disable +ffffffff81e940a0 t radeon_legacy_tmds_int_dpms +ffffffff81e94170 t radeon_legacy_tmds_int_prepare +ffffffff81e94250 t radeon_legacy_tmds_int_commit +ffffffff81e94340 t radeon_legacy_tmds_int_mode_set +ffffffff81e945b0 t radeon_legacy_primary_dac_dpms +ffffffff81e946f0 t radeon_legacy_primary_dac_prepare +ffffffff81e94750 t radeon_legacy_primary_dac_commit +ffffffff81e947b0 t radeon_legacy_primary_dac_mode_set +ffffffff81e94940 t radeon_legacy_primary_dac_detect +ffffffff81e94b50 t radeon_legacy_tv_dac_dpms +ffffffff81e94d60 t radeon_legacy_tv_dac_prepare +ffffffff81e94dc0 t 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radeon_bo_pin +ffffffff81e99be0 T radeon_bo_unpin +ffffffff81e99c60 T radeon_bo_evict_vram +ffffffff81e99cc0 T radeon_bo_force_delete +ffffffff81e99e60 T radeon_bo_init +ffffffff81e99f70 T radeon_bo_fini +ffffffff81e99fb0 T radeon_bo_list_validate +ffffffff81e9a300 T radeon_bo_get_surface_reg +ffffffff81e9a590 T radeon_bo_set_tiling_flags +ffffffff81e9a900 T radeon_bo_get_tiling_flags +ffffffff81e9a950 T radeon_bo_move_notify +ffffffff81e9aa20 T radeon_bo_fault_reserve_notify +ffffffff81e9ace0 t ttm_bo_move_to_lru_tail_unlocked +ffffffff81e9ad30 T radeon_bo_fence +ffffffff81e9b000 T radeon_pm_get_type_index +ffffffff81e9b080 T radeon_pm_acpi_event_handler +ffffffff81e9b190 t radeon_pm_update_profile +ffffffff81e9b2b0 t radeon_pm_set_clocks +ffffffff81e9bda0 T radeon_dpm_enable_uvd +ffffffff81e9be80 T radeon_pm_compute_clocks +ffffffff81e9c9b0 T radeon_dpm_enable_vce +ffffffff81e9ca30 T radeon_pm_suspend +ffffffff81e9cb50 T radeon_pm_resume +ffffffff81e9ce80 T radeon_pm_init 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radeon_ring_init +ffffffff81e9fc70 t radeon_bo_reserve +ffffffff81e9fe10 t radeon_bo_unreserve +ffffffff81e9ff20 T radeon_ring_fini +ffffffff81ea0000 T radeon_sa_bo_manager_init +ffffffff81ea00e0 T radeon_sa_bo_manager_fini +ffffffff81ea0120 T radeon_sa_bo_manager_start +ffffffff81ea02a0 t radeon_bo_reserve +ffffffff81ea0440 t radeon_bo_unreserve +ffffffff81ea0550 T radeon_sa_bo_manager_suspend +ffffffff81ea0630 T radeon_sa_bo_new +ffffffff81ea06a0 T radeon_sa_bo_free +ffffffff81ea1000 T radeon_semaphore_create +ffffffff81ea1100 T radeon_semaphore_emit_signal +ffffffff81ea1190 T radeon_semaphore_emit_wait +ffffffff81ea1220 T radeon_semaphore_free +ffffffff81ea2000 T radeon_sync_create +ffffffff81ea2090 T radeon_sync_fence +ffffffff81ea2140 T radeon_sync_resv +ffffffff81ea22a0 T radeon_sync_rings +ffffffff81ea24c0 T radeon_sync_free +ffffffff81ea3000 T radeon_test_moves +ffffffff81ea3080 t radeon_do_test_moves +ffffffff81ea37e0 T radeon_test_ring_sync +ffffffff81ea3b90 t radeon_test_create_and_emit_fence +ffffffff81ea3d60 T radeon_test_syncing +ffffffff81ea40c0 t radeon_test_ring_sync2 +ffffffff81ea4530 t radeon_bo_reserve +ffffffff81ea46d0 t radeon_bo_unreserve +ffffffff81ea5000 T radeon_get_rdev +ffffffff81ea5030 T radeon_ttm_tt_set_userptr +ffffffff81ea5090 T radeon_ttm_tt_is_bound +ffffffff81ea50e0 T radeon_ttm_tt_has_userptr +ffffffff81ea5130 T radeon_ttm_tt_is_readonly +ffffffff81ea5180 T radeon_ttm_init +ffffffff81ea5410 T radeon_ttm_set_active_vram_size +ffffffff81ea5450 t radeon_bo_reserve +ffffffff81ea55f0 t radeon_bo_unreserve +ffffffff81ea5700 T radeon_ttm_fini +ffffffff81ea5810 t radeon_ttm_tt_create +ffffffff81ea5900 t radeon_ttm_tt_populate +ffffffff81ea59c0 t radeon_ttm_tt_unpopulate +ffffffff81ea5ad0 t radeon_ttm_tt_destroy +ffffffff81ea5b20 t radeon_evict_flags +ffffffff81ea5c80 t radeon_bo_move +ffffffff81ea6100 t radeon_ttm_io_mem_reserve +ffffffff81ea7000 T radeon_ucode_print_mc_hdr +ffffffff81ea70d0 t radeon_ucode_print_common_hdr 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T radeon_vm_bo_find +ffffffff81eae7d0 T radeon_vm_bo_add +ffffffff81eae8d0 T radeon_vm_bo_set_addr +ffffffff81eaee10 t radeon_bo_unreserve +ffffffff81eaef20 t radeon_vm_clear_bo +ffffffff81eaf150 T radeon_vm_map_gart +ffffffff81eaf190 T radeon_vm_update_page_directory +ffffffff81eaf560 T radeon_vm_bo_update +ffffffff81eafc70 t radeon_vm_fence_pts +ffffffff81eafd00 T radeon_vm_clear_freed +ffffffff81eafe40 T radeon_vm_clear_invalids +ffffffff81eaff10 T radeon_vm_bo_rmv +ffffffff81eb0030 T radeon_vm_bo_invalidate +ffffffff81eb00f0 T radeon_vm_init +ffffffff81eb03e0 T radeon_vm_fini +ffffffff81eb07a0 t radeon_bo_reserve +ffffffff81eb0940 t radeon_vm_frag_ptes +ffffffff81eb1000 T rs400_gart_adjust_size +ffffffff81eb10e0 T rs400_gart_tlb_flush +ffffffff81eb1180 T rs400_gart_init +ffffffff81eb1290 T rs400_gart_enable +ffffffff81eb1680 T rs400_gart_disable +ffffffff81eb16f0 T rs400_gart_fini +ffffffff81eb1780 T rs400_gart_get_page_entry +ffffffff81eb17e0 T rs400_gart_set_page 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rs780_dpm_enable +ffffffff81eb9f50 T rs780_dpm_disable +ffffffff81eba040 T rs780_dpm_set_power_state +ffffffff81eba490 t rs780_force_voltage +ffffffff81eba5e0 t rs780_enable_voltage_scaling +ffffffff81eba7b0 T rs780_dpm_setup_asic +ffffffff81eba7e0 T rs780_dpm_display_configuration_changed +ffffffff81eba940 T rs780_dpm_init +ffffffff81ebaef0 T rs780_dpm_print_power_state +ffffffff81ebafb0 T rs780_dpm_fini +ffffffff81ebb050 T rs780_dpm_get_sclk +ffffffff81ebb090 T rs780_dpm_get_mclk +ffffffff81ebb0c0 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81ebb0f0 T rs780_dpm_get_current_sclk +ffffffff81ebb180 T rs780_dpm_get_current_mclk +ffffffff81ebb1b0 T rs780_dpm_force_performance_level +ffffffff81ebb3d0 t rs780_force_fbdiv +ffffffff81ebc000 T rv515_ring_start +ffffffff81ebcc50 T rv515_mc_wait_for_idle +ffffffff81ebcd00 T rv515_vga_render_disable +ffffffff81ebcd50 T rv515_mc_rreg +ffffffff81ebcdf0 T rv515_mc_wreg +ffffffff81ebce70 T rv515_debugfs +ffffffff81ebce80 T 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sumo_construct_vid_mapping_table +ffffffff81ef7960 T sumo_dpm_init +ffffffff81ef8260 T sumo_dpm_print_power_state +ffffffff81ef8390 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81ef83c0 T sumo_dpm_get_current_sclk +ffffffff81ef8430 T sumo_dpm_get_current_mclk +ffffffff81ef8460 T sumo_dpm_get_current_vddc +ffffffff81ef8530 T sumo_dpm_fini +ffffffff81ef85d0 T sumo_dpm_get_sclk +ffffffff81ef8620 T sumo_dpm_get_mclk +ffffffff81ef8650 T sumo_dpm_force_performance_level +ffffffff81ef8ad0 t sumo_power_level_enable +ffffffff81ef8d20 t sumo_program_power_level +ffffffff81efa000 T sumo_initialize_m3_arb +ffffffff81efa3c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81efa470 t sumo_send_msg_to_smu +ffffffff81efa640 T sumo_smu_pg_init +ffffffff81efa660 T sumo_enable_boost_timer +ffffffff81efa7e0 T sumo_set_tdp_limit +ffffffff81efa860 T sumo_boost_state_enable +ffffffff81efa8b0 T sumo_get_running_fw_version +ffffffff81efb000 T trinity_dpm_enable_bapm +ffffffff81efb090 T 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uvd_v4_2_resume +ffffffff81f05000 T vce_v1_0_get_rptr +ffffffff81f05090 T vce_v1_0_get_wptr +ffffffff81f05120 T vce_v1_0_set_wptr +ffffffff81f051b0 T vce_v1_0_enable_mgcg +ffffffff81f054b0 T vce_v1_0_load_fw +ffffffff81f05680 T vce_v1_0_bo_size +ffffffff81f056f0 T vce_v1_0_resume +ffffffff81f06220 T vce_v1_0_start +ffffffff81f06b40 T vce_v1_0_init +ffffffff81f07000 T vce_v2_0_enable_mgcg +ffffffff81f07070 t vce_v2_0_set_dyn_cg +ffffffff81f07280 T vce_v2_0_bo_size +ffffffff81f072f0 T vce_v2_0_resume +ffffffff81f08000 T aldebaran_reset_init +ffffffff81f080e0 t aldebaran_async_reset +ffffffff81f08140 t aldebaran_get_reset_handler +ffffffff81f081e0 T aldebaran_reset_fini +ffffffff81f08240 t aldebaran_mode2_prepare_hwcontext +ffffffff81f08380 t aldebaran_mode2_perform_reset +ffffffff81f08590 t aldebaran_mode2_restore_hwcontext +ffffffff81f08c20 t aldebaran_mode2_reset +ffffffff81f09000 T aldebaran_reg_base_init +ffffffff81f0a000 T amdgpu_acpi_is_pcie_performance_request_supported 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amdgpu_amdkfd_get_cu_info +ffffffff81f0e0f0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81f0e240 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81f0e2c0 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81f0e360 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81f0e4e0 T amdgpu_amdkfd_submit_ib +ffffffff81f0e680 T amdgpu_amdkfd_set_compute_idle +ffffffff81f0e6d0 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81f0e710 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81f0e850 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81f0e890 T amdgpu_amdkfd_have_atomics_support +ffffffff81f0e8c0 T amdgpu_amdkfd_debug_mem_fence +ffffffff81f0e8e0 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81f0e8f0 T amdgpu_amdkfd_send_close_event_drain_irq +ffffffff81f0e910 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81f0e960 T amdgpu_amdkfd_check_and_lock_kfd +ffffffff81f0e990 T amdgpu_amdkfd_unlock_kfd +ffffffff81f0e9c0 T amdgpu_amdkfd_unmap_hiq +ffffffff81f0f000 T amdgpu_atom_execute_table +ffffffff81f0f0c0 t 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amdgpu_xgmi_ras_late_init +ffffffff81fbb470 T amdgpu_xgmi_ras_sw_init +ffffffff81fbc000 T aqua_vanjaram_doorbell_index_init +ffffffff81fbc120 T aqua_vanjaram_ip_map_init +ffffffff81fbc2d0 t aqua_vanjaram_logical_to_dev_inst +ffffffff81fbc330 t aqua_vanjaram_logical_to_dev_mask +ffffffff81fbc3f0 T aqua_vanjaram_encode_ext_smn_addressing +ffffffff81fbc430 t aqua_vanjaram_switch_partition_mode +ffffffff81fbc8b0 t aqua_vanjaram_query_partition_mode +ffffffff81fbc900 t aqua_vanjaram_get_xcp_ip_details +ffffffff81fbcab0 t aqua_vanjaram_get_xcp_mem_id +ffffffff81fbcbd0 t aqua_vanjaram_select_scheds +ffffffff81fbcd70 t aqua_vanjaram_update_partition_sched_list +ffffffff81fbd2e0 T aqua_vanjaram_init_soc_config +ffffffff81fbe000 T arct_reg_base_init +ffffffff81fbf000 T athub_v1_0_set_clockgating +ffffffff81fbf250 T athub_v1_0_get_clockgating +ffffffff81fc0000 T athub_v2_0_set_clockgating +ffffffff81fc0210 T athub_v2_0_get_clockgating +ffffffff81fc1000 T athub_v2_1_set_clockgating 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dce_v10_0_hw_fini +ffffffff81fc4db0 t dce_v10_0_suspend +ffffffff81fc4e30 t dce_v10_0_resume +ffffffff81fc4ec0 t dce_v10_0_is_idle +ffffffff81fc4ef0 t dce_v10_0_wait_for_idle +ffffffff81fc4f20 t dce_v10_0_check_soft_reset +ffffffff81fc4f30 t dce_v10_0_soft_reset +ffffffff81fc5040 t dce_v10_0_set_clockgating_state +ffffffff81fc5070 t dce_v10_0_set_powergating_state +ffffffff81fc50a0 t dce_v10_0_audio_endpt_rreg +ffffffff81fc5160 t dce_v10_0_audio_endpt_wreg +ffffffff81fc51f0 t dce_v10_0_bandwidth_update +ffffffff81fc5d40 t dce_v10_0_vblank_get_counter +ffffffff81fc5d90 t dce_v10_0_hpd_sense +ffffffff81fc5df0 t dce_v10_0_hpd_set_polarity +ffffffff81fc5ed0 t dce_v10_0_hpd_get_gpio_reg +ffffffff81fc5f00 t dce_v10_0_page_flip +ffffffff81fc6020 t dce_v10_0_crtc_get_scanoutpos +ffffffff81fc60d0 t dce_v10_0_encoder_add +ffffffff81fc6360 t dce_v10_0_latency_watermark +ffffffff81fc6590 t dce_v10_0_encoder_destroy +ffffffff81fc6600 t dce_v10_0_encoder_prepare +ffffffff81fc6840 t dce_v10_0_encoder_commit +ffffffff81fc6880 t dce_v10_0_encoder_mode_set +ffffffff81fc7b40 t dce_v10_0_encoder_disable +ffffffff81fc7c70 t dce_v10_0_ext_dpms +ffffffff81fc7ca0 t dce_v10_0_ext_prepare +ffffffff81fc7cd0 t dce_v10_0_ext_commit +ffffffff81fc7d00 t dce_v10_0_ext_mode_set +ffffffff81fc7d30 t dce_v10_0_ext_disable +ffffffff81fc7d60 t dce_v10_0_set_crtc_irq_state +ffffffff81fc7e60 t dce_v10_0_crtc_irq +ffffffff81fc8100 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81fc81e0 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81fc82c0 t dce_v10_0_set_pageflip_irq_state +ffffffff81fc8380 t dce_v10_0_pageflip_irq +ffffffff81fc8530 t dce_v10_0_set_hpd_irq_state +ffffffff81fc8620 t dce_v10_0_hpd_irq +ffffffff81fc8770 t dce_v10_0_afmt_init +ffffffff81fc88a0 t dce_v10_0_audio_init +ffffffff81fc8970 t INIT_DELAYED_WORK +ffffffff81fc89c0 t dce_v10_0_crtc_cursor_set2 +ffffffff81fc8d20 t dce_v10_0_crtc_cursor_move +ffffffff81fc8e20 t dce_v10_0_crtc_gamma_set +ffffffff81fc8e70 t dce_v10_0_crtc_destroy +ffffffff81fc8eb0 t amdgpu_bo_reserve +ffffffff81fc90f0 t amdgpu_bo_unreserve +ffffffff81fc9200 t dce_v10_0_lock_cursor +ffffffff81fc9270 t dce_v10_0_cursor_move_locked +ffffffff81fc93e0 t dce_v10_0_show_cursor +ffffffff81fc9490 t dce_v10_0_crtc_load_lut +ffffffff81fc9930 t dce_v10_0_crtc_dpms +ffffffff81fc9ba0 t dce_v10_0_crtc_prepare +ffffffff81fc9bf0 t dce_v10_0_crtc_commit +ffffffff81fc9c30 t dce_v10_0_crtc_mode_fixup +ffffffff81fc9e50 t dce_v10_0_crtc_mode_set +ffffffff81fca0b0 t dce_v10_0_crtc_set_base +ffffffff81fca0d0 t dce_v10_0_crtc_set_base_atomic +ffffffff81fca0f0 t dce_v10_0_crtc_disable +ffffffff81fca2c0 t dce_v10_0_crtc_do_set_base +ffffffff81fcaaf0 t __delayed_work_tick +ffffffff81fcab10 t dce_v10_0_is_display_hung +ffffffff81fcb000 T dce_v11_0_disable_dce +ffffffff81fcb1c0 t dce_v11_0_early_init +ffffffff81fcb2f0 t dce_v11_0_sw_init +ffffffff81fcb6c0 t dce_v11_0_sw_fini +ffffffff81fcb820 t dce_v11_0_hw_init +ffffffff81fcbcd0 t dce_v11_0_hw_fini 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+ffffffff81fd0370 t amdgpu_bo_unreserve +ffffffff81fd0480 t dce_v11_0_lock_cursor +ffffffff81fd04f0 t dce_v11_0_cursor_move_locked +ffffffff81fd0660 t dce_v11_0_show_cursor +ffffffff81fd0710 t dce_v11_0_crtc_load_lut +ffffffff81fd0b60 t dce_v11_0_crtc_dpms +ffffffff81fd0dd0 t dce_v11_0_crtc_prepare +ffffffff81fd0e20 t dce_v11_0_crtc_commit +ffffffff81fd0e60 t dce_v11_0_crtc_mode_fixup +ffffffff81fd1150 t dce_v11_0_crtc_mode_set +ffffffff81fd1430 t dce_v11_0_crtc_set_base +ffffffff81fd1450 t dce_v11_0_crtc_set_base_atomic +ffffffff81fd1470 t dce_v11_0_crtc_disable +ffffffff81fd1650 t dce_v11_0_crtc_do_set_base +ffffffff81fd1e80 t __delayed_work_tick +ffffffff81fd2000 t df_v1_7_sw_init +ffffffff81fd2040 t df_v1_7_sw_fini +ffffffff81fd2070 t df_v1_7_enable_broadcast_mode +ffffffff81fd21a0 t df_v1_7_get_fb_channel_number +ffffffff81fd2240 t df_v1_7_get_hbm_channel_number +ffffffff81fd22a0 t df_v1_7_update_medium_grain_clock_gating +ffffffff81fd2450 t df_v1_7_get_clockgating_state +ffffffff81fd24f0 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81fd3000 t df_v3_6_sw_init +ffffffff81fd3160 t df_v3_6_sw_fini +ffffffff81fd3190 t df_v3_6_enable_broadcast_mode +ffffffff81fd32c0 t df_v3_6_get_fb_channel_number +ffffffff81fd33c0 t df_v3_6_get_hbm_channel_number +ffffffff81fd3420 t df_v3_6_update_medium_grain_clock_gating +ffffffff81fd35f0 t df_v3_6_get_clockgating_state +ffffffff81fd3690 t df_v3_6_pmc_start +ffffffff81fd3a20 t df_v3_6_pmc_stop +ffffffff81fd3d60 t df_v3_6_pmc_get_count +ffffffff81fd3f40 t df_v3_6_get_fica +ffffffff81fd4090 t df_v3_6_set_fica +ffffffff81fd41c0 t df_v3_6_query_ras_poison_mode +ffffffff81fd5000 t df_v4_3_query_ras_poison_mode +ffffffff81fd6000 T dimgrey_cavefish_reg_base_init +ffffffff81fd7000 T emu_soc_asic_init +ffffffff81fd8000 t gfx_v10_0_early_init +ffffffff81fd8920 t gfx_v10_0_late_init +ffffffff81fd8990 t gfx_v10_0_sw_init +ffffffff81fd8f50 t gfx_v10_0_sw_fini +ffffffff81fd9210 t gfx_v10_0_hw_init +ffffffff81fdc3f0 t gfx_v10_0_hw_fini +ffffffff81fdc500 t gfx_v10_0_suspend +ffffffff81fdc540 t gfx_v10_0_resume +ffffffff81fdc550 t gfx_v10_0_is_idle +ffffffff81fdc5f0 t gfx_v10_0_wait_for_idle +ffffffff81fdc700 t gfx_v10_0_soft_reset +ffffffff81fdcae0 t gfx_v10_0_set_clockgating_state +ffffffff81fdce60 t gfx_v10_0_set_powergating_state +ffffffff81fdcf30 t gfx_v10_0_get_clockgating_state +ffffffff81fdd080 t gfx_v10_0_get_gpu_clock_counter +ffffffff81fdd600 t gfx_v10_0_select_se_sh +ffffffff81fdd6a0 t gfx_v10_0_read_wave_data +ffffffff81fdd990 t gfx_v10_0_read_wave_vgprs +ffffffff81fdd9c0 t gfx_v10_0_read_wave_sgprs +ffffffff81fdda40 t gfx_v10_0_select_me_pipe_q +ffffffff81fdda60 t gfx_v10_0_init_spm_golden_registers +ffffffff81fddad0 t gfx_v10_0_update_perfmon_mgcg +ffffffff81fddc00 t wave_read_ind +ffffffff81fddd00 t wave_read_regs +ffffffff81fdde80 t gfx10_kiq_set_resources +ffffffff81fde1e0 t gfx10_kiq_map_queues +ffffffff81fde5c0 t gfx10_kiq_unmap_queues +ffffffff81fdea00 t gfx10_kiq_query_status +ffffffff81fded20 t gfx10_kiq_invalidate_tlbs +ffffffff81fdee50 t gfx_v10_0_ring_get_rptr_compute +ffffffff81fdee80 t gfx_v10_0_ring_get_wptr_compute +ffffffff81fdeef0 t gfx_v10_0_ring_set_wptr_compute +ffffffff81fdf050 t gfx_v10_0_ring_emit_ib_compute +ffffffff81fdf3d0 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81fdf850 t gfx_v10_0_ring_test_ring +ffffffff81fdfb00 t gfx_v10_0_ring_test_ib +ffffffff81fdfde0 t gfx_v10_0_ring_emit_rreg +ffffffff81fe00a0 t gfx_v10_0_ring_emit_wreg +ffffffff81fe0300 t gfx_v10_0_ring_emit_reg_wait +ffffffff81fe0360 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81fe0400 t gfx_v10_0_wait_reg_mem +ffffffff81fe0760 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81fe0790 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81fe08b0 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81fe0af0 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81fe11e0 t gfx_v10_0_ring_emit_fence +ffffffff81fe1600 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81fe1670 t gfx_v10_0_ring_emit_vm_flush +ffffffff81fe1860 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81fe1950 t gfx_v10_0_ring_emit_gds_switch +ffffffff81fe1a50 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81fe1ca0 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81fe1d60 t gfx_v10_0_ring_emit_sb +ffffffff81fe1e50 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81fe2380 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81fe2490 t gfx_v10_0_ring_soft_recovery +ffffffff81fe2540 t gfx_v10_0_ring_preempt_ib +ffffffff81fe26f0 t gfx_v10_0_emit_mem_sync +ffffffff81fe2a60 t gfx_v10_0_write_data_to_reg +ffffffff81fe2c90 t gfx_v10_0_set_eop_interrupt_state +ffffffff81fe2d90 t gfx_v10_0_eop_irq +ffffffff81fe2f70 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81fe3130 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81fe3310 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81fe3680 t gfx_v10_0_kiq_irq +ffffffff81fe3710 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81fe3860 t gfx_v10_0_priv_reg_irq +ffffffff81fe38d0 t gfx_v10_0_handle_priv_fault +ffffffff81fe3a40 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81fe3b90 t gfx_v10_0_priv_inst_irq +ffffffff81fe3c00 t gfx_v10_0_is_rlc_enabled +ffffffff81fe3ca0 t gfx_v10_0_set_safe_mode +ffffffff81fe3fa0 t gfx_v10_0_unset_safe_mode +ffffffff81fe4050 t gfx_v10_0_rlc_init +ffffffff81fe4070 t gfx_v10_0_get_csb_size +ffffffff81fe40a0 t gfx_v10_0_get_csb_buffer +ffffffff81fe4210 t gfx_v10_0_rlc_resume +ffffffff81fe4dd0 t gfx_v10_0_rlc_stop +ffffffff81fe4eb0 t gfx_v10_0_rlc_reset +ffffffff81fe50a0 t gfx_v10_0_rlc_start +ffffffff81fe5290 t gfx_v10_0_update_spm_vmid +ffffffff81fe52e0 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81fe5d20 t gfx_v10_0_init_csb +ffffffff81fe6040 t gfx_v10_0_update_spm_vmid_internal +ffffffff81fe6130 t gfx_v10_0_rlc_backdoor_autoload_config_mec_cache +ffffffff81fe6450 t gfx_v10_0_is_rlcg_access_range +ffffffff81fe6480 t gfx_v10_0_gfx_mqd_init +ffffffff81fe68c0 t gfx_v10_0_compute_mqd_init +ffffffff81fe6dd0 t gfx_v10_0_mec_init +ffffffff81fe7060 t gfx_v10_0_compute_ring_init +ffffffff81fe71c0 t gfx_v10_0_rlc_backdoor_autoload_buffer_init +ffffffff81fe7460 t gfx_v10_0_gpu_early_init +ffffffff81fe76d0 t amdgpu_bo_unreserve +ffffffff81fe77e0 t gfx_v10_0_cp_resume +ffffffff81fea7a0 t gfx_v10_3_get_disabled_sa +ffffffff81fea8d0 t gfx_v10_0_get_rb_active_bitmap +ffffffff81feaa10 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81feab30 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81feac40 t gfx_v10_0_cp_gfx_enable +ffffffff81feaee0 t gfx_v10_0_cp_compute_enable +ffffffff81feb0a0 t amdgpu_bo_reserve +ffffffff81feb240 t gfx_v10_0_kiq_init_register +ffffffff81fec330 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81fec430 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81fec760 t gfx_v10_0_cp_gfx_start +ffffffff81fed250 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81fed5e0 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81fedde0 t gfx_v10_0_update_3d_clock_gating +ffffffff81fee210 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81fee640 t gfx_v10_cntl_pg +ffffffff81fef000 t gfx_v11_0_early_init +ffffffff81fef870 t gfx_v11_0_late_init +ffffffff81fef8e0 t gfx_v11_0_sw_init +ffffffff81fefee0 t gfx_v11_0_sw_fini +ffffffff81ff0190 t gfx_v11_0_hw_init +ffffffff81ff4d20 t gfx_v11_0_hw_fini +ffffffff81ff4e80 t gfx_v11_0_suspend +ffffffff81ff4ec0 t gfx_v11_0_resume +ffffffff81ff4ed0 t gfx_v11_0_is_idle +ffffffff81ff4f70 t gfx_v11_0_wait_for_idle +ffffffff81ff5080 t gfx_v11_0_check_soft_reset +ffffffff81ff51c0 t gfx_v11_0_soft_reset +ffffffff81ff6090 t gfx_v11_0_post_soft_reset +ffffffff81ff60a0 t gfx_v11_0_set_clockgating_state +ffffffff81ff6e00 t gfx_v11_0_set_powergating_state +ffffffff81ff6eb0 t gfx_v11_0_get_clockgating_state +ffffffff81ff70a0 t gfx_v11_0_get_gpu_clock_counter +ffffffff81ff7490 t gfx_v11_0_select_se_sh +ffffffff81ff7530 t gfx_v11_0_read_wave_data +ffffffff81ff7800 t gfx_v11_0_read_wave_vgprs +ffffffff81ff7830 t gfx_v11_0_read_wave_sgprs +ffffffff81ff78b0 t gfx_v11_0_select_me_pipe_q +ffffffff81ff78d0 t gfx_v11_0_update_perf_clk +ffffffff81ff7a10 t gfx_v11_0_get_gfx_shadow_info +ffffffff81ff7a80 t wave_read_ind +ffffffff81ff7b80 t wave_read_regs +ffffffff81ff7d00 t gfx11_kiq_set_resources +ffffffff81ff8060 t gfx11_kiq_map_queues +ffffffff81ff8440 t gfx11_kiq_unmap_queues +ffffffff81ff8880 t gfx11_kiq_query_status +ffffffff81ff8ba0 t gfx11_kiq_invalidate_tlbs +ffffffff81ff8cd0 t gfx_v11_0_ring_get_rptr_compute +ffffffff81ff8d00 t gfx_v11_0_ring_get_wptr_compute +ffffffff81ff8d70 t gfx_v11_0_ring_set_wptr_compute +ffffffff81ff8ed0 t gfx_v11_0_ring_emit_ib_compute +ffffffff81ff9250 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81ff96d0 t gfx_v11_0_ring_test_ring +ffffffff81ff99a0 t gfx_v11_0_ring_test_ib +ffffffff81ff9ca0 t gfx_v11_0_ring_emit_rreg +ffffffff81ff9f60 t gfx_v11_0_ring_emit_wreg +ffffffff81ffa1c0 t gfx_v11_0_ring_emit_reg_wait +ffffffff81ffa220 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81ffa290 t gfx_v11_0_wait_reg_mem +ffffffff81ffa5f0 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81ffa620 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81ffa740 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81ffa980 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81ffb080 t gfx_v11_0_ring_emit_fence +ffffffff81ffb490 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81ffb500 t gfx_v11_0_ring_emit_vm_flush +ffffffff81ffb6f0 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81ffb7e0 t gfx_v11_0_ring_emit_gds_switch +ffffffff81ffb8e0 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81ffbb30 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81ffbbf0 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81ffbd70 t gfx_v11_0_ring_emit_gfx_shadow +ffffffff81ffc180 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81ffc290 t gfx_v11_0_ring_soft_recovery +ffffffff81ffc340 t gfx_v11_0_ring_preempt_ib +ffffffff81ffc4f0 t gfx_v11_0_emit_mem_sync +ffffffff81ffc860 t gfx_v11_0_write_data_to_reg +ffffffff81ffca90 t gfx_v11_0_set_eop_interrupt_state +ffffffff81ffcb30 t gfx_v11_0_eop_irq +ffffffff81ffcd10 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81ffced0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81ffd080 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81ffd1d0 t gfx_v11_0_priv_reg_irq +ffffffff81ffd240 t gfx_v11_0_handle_priv_fault +ffffffff81ffd3b0 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81ffd500 t gfx_v11_0_priv_inst_irq +ffffffff81ffd570 t gfx_v11_0_rlc_gc_fed_irq +ffffffff81ffd5c0 t gfx_v11_0_is_rlc_enabled +ffffffff81ffd660 t gfx_v11_0_set_safe_mode +ffffffff81ffd7e0 t gfx_v11_0_unset_safe_mode +ffffffff81ffd850 t gfx_v11_0_rlc_init +ffffffff81ffd8d0 t gfx_v11_0_get_csb_size +ffffffff81ffd900 t gfx_v11_0_get_csb_buffer +ffffffff81ffda70 t gfx_v11_0_rlc_resume +ffffffff81ffe920 t gfx_v11_0_rlc_stop +ffffffff81ffea00 t gfx_v11_0_rlc_reset +ffffffff81ffebf0 t gfx_v11_0_rlc_start +ffffffff81ffede0 t gfx_v11_0_update_spm_vmid +ffffffff81ffef00 t gfx_v11_0_init_csb +ffffffff81fff0c0 t gfx_v11_0_gfx_mqd_init +ffffffff81fff4f0 t gfx_v11_0_compute_mqd_init +ffffffff81fffa90 t gfx_v11_0_mec_init +ffffffff81fffc20 t gfx_v11_0_compute_ring_init +ffffffff81fffd80 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff81ffff80 t gfx_v11_0_gpu_early_init +ffffffff82000050 t amdgpu_bo_unreserve +ffffffff82000160 t gfx_v11_0_disable_gpa_mode +ffffffff82000320 t gfx_v11_0_cp_resume +ffffffff82004a80 t gfx_v11_0_config_me_cache +ffffffff82004ea0 t gfx_v11_0_config_pfp_cache +ffffffff820052c0 t gfx_v11_0_config_mec_cache +ffffffff820056e0 t gfx_v11_0_get_sa_active_bitmap +ffffffff82005810 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff82005920 t gfx_v11_0_cp_compute_enable +ffffffff82005b20 t gfx_v11_0_cp_gfx_enable +ffffffff82005d50 t amdgpu_bo_reserve +ffffffff82005ef0 t gfx_v11_0_kiq_init_register +ffffffff82006ff0 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff820070e0 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff820072f0 t gfx_v11_0_cp_gfx_start +ffffffff82007c40 t gfx_v11_cntl_pg +ffffffff82008000 t gfx_v11_0_3_rlc_gc_fed_irq +ffffffff82008240 t gfx_v11_0_3_poison_consumption_handler +ffffffff82009000 t gfx_v8_0_early_init +ffffffff82009310 t gfx_v8_0_late_init +ffffffff82009ad0 t gfx_v8_0_sw_init +ffffffff82009f30 t gfx_v8_0_sw_fini +ffffffff8200a140 t gfx_v8_0_hw_init +ffffffff8200c720 t gfx_v8_0_hw_fini +ffffffff8200ccb0 t gfx_v8_0_suspend +ffffffff8200ccf0 t gfx_v8_0_resume +ffffffff8200cd00 t gfx_v8_0_is_idle +ffffffff8200cd80 t gfx_v8_0_wait_for_idle +ffffffff8200ce50 t gfx_v8_0_check_soft_reset +ffffffff8200cf50 t gfx_v8_0_pre_soft_reset +ffffffff8200d110 t gfx_v8_0_soft_reset +ffffffff8200d360 t gfx_v8_0_post_soft_reset +ffffffff8200d550 t gfx_v8_0_set_clockgating_state +ffffffff8200d830 t gfx_v8_0_set_powergating_state +ffffffff8200dce0 t gfx_v8_0_get_clockgating_state +ffffffff8200ddf0 t gfx_v8_0_get_gpu_clock_counter +ffffffff8200deb0 t gfx_v8_0_select_se_sh +ffffffff8200df10 t gfx_v8_0_read_wave_data +ffffffff8200e510 t gfx_v8_0_read_wave_sgprs +ffffffff8200e5e0 t gfx_v8_0_select_me_pipe_q +ffffffff8200e600 t gfx_v8_0_ring_get_rptr +ffffffff8200e630 t gfx_v8_0_ring_get_wptr_compute +ffffffff8200e660 t gfx_v8_0_ring_set_wptr_compute +ffffffff8200e6a0 t gfx_v8_0_ring_emit_fence_kiq +ffffffff8200eb10 t gfx_v8_0_ring_test_ring +ffffffff8200ed50 t gfx_v8_0_ring_emit_rreg +ffffffff8200f010 t gfx_v8_0_ring_emit_wreg +ffffffff8200f270 t gfx_v8_0_ring_get_wptr_gfx +ffffffff8200f2d0 t gfx_v8_0_ring_set_wptr_gfx +ffffffff8200f350 t gfx_v8_0_ring_emit_ib_gfx +ffffffff8200f910 t gfx_v8_0_ring_emit_fence_gfx +ffffffff8200fe60 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff82010180 t gfx_v8_0_ring_emit_vm_flush +ffffffff82010580 t gfx_v8_0_ring_emit_hdp_flush +ffffffff820108d0 t gfx_v8_0_ring_emit_gds_switch +ffffffff82011130 t gfx_v8_0_ring_test_ib +ffffffff82011320 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff82011570 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff82011620 t gfx_v8_ring_emit_sb +ffffffff82011710 t gfx_v8_ring_emit_cntxcntl +ffffffff82011d10 t gfx_v8_0_ring_soft_recovery +ffffffff82011d40 t gfx_v8_0_emit_mem_sync +ffffffff82011f60 t gfx_v8_0_ring_emit_ib_compute +ffffffff820122a0 t gfx_v8_0_ring_emit_fence_compute +ffffffff820125d0 t gfx_v8_0_emit_mem_sync_compute +ffffffff820128c0 t gfx_v8_0_emit_wave_limit +ffffffff82012a90 t gfx_v8_0_set_eop_interrupt_state +ffffffff82012d10 t gfx_v8_0_eop_irq +ffffffff82012e40 t gfx_v8_0_set_priv_reg_fault_state +ffffffff82012ed0 t gfx_v8_0_priv_reg_irq +ffffffff82012ff0 t gfx_v8_0_set_priv_inst_fault_state +ffffffff82013080 t gfx_v8_0_priv_inst_irq +ffffffff820131a0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff820134e0 t gfx_v8_0_cp_ecc_error_irq +ffffffff82013530 t gfx_v8_0_set_sq_int_state +ffffffff820135c0 t gfx_v8_0_sq_irq +ffffffff82013640 t gfx_v8_0_parse_sq_irq +ffffffff820138c0 t gfx_v8_0_is_rlc_enabled +ffffffff82013910 t gfx_v8_0_set_safe_mode +ffffffff82013a40 t gfx_v8_0_unset_safe_mode +ffffffff82013b00 t gfx_v8_0_rlc_init +ffffffff82013bc0 t gfx_v8_0_get_csb_size +ffffffff82013bf0 t gfx_v8_0_get_csb_buffer +ffffffff82013d60 t gfx_v8_0_cp_jump_table_num +ffffffff82013da0 t gfx_v8_0_rlc_resume +ffffffff82014250 t gfx_v8_0_rlc_stop +ffffffff820142e0 t gfx_v8_0_rlc_reset +ffffffff82014390 t gfx_v8_0_rlc_start +ffffffff82014430 t gfx_v8_0_update_spm_vmid +ffffffff820144c0 t gfx_v8_0_init_save_restore_list +ffffffff820149a0 t gfx_v8_0_wait_for_rlc_serdes +ffffffff82014c10 t gfx_v8_0_sq_irq_work_func +ffffffff82014c30 t gfx_v8_0_init_microcode +ffffffff820155c0 t gfx_v8_0_mec_init +ffffffff820156f0 t gfx_v8_0_compute_ring_init +ffffffff82015840 t gfx_v8_0_gpu_early_init +ffffffff82015d10 t amdgpu_bo_unreserve +ffffffff82015e20 t gfx_v8_0_kiq_resume +ffffffff82016170 t gfx_v8_0_cp_gfx_resume +ffffffff82016db0 t gfx_v8_0_kcq_resume +ffffffff820178c0 t amdgpu_bo_reserve +ffffffff82017a60 t gfx_v8_0_mqd_commit +ffffffff82017cd0 t gfx_v8_0_mqd_init +ffffffff820181e0 t gfx_v8_0_deactivate_hqd +ffffffff820182e0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff820186f0 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff82019000 t gfx_v9_0_ras_error_inject +ffffffff820191e0 t gfx_v9_0_query_ras_error_count +ffffffff82019f10 t gfx_v9_0_reset_ras_error_count +ffffffff8201aab0 T gfx_v9_0_select_se_sh +ffffffff8201ab50 t gfx_v9_0_early_init +ffffffff8201b740 t gfx_v9_0_late_init +ffffffff8201c720 t gfx_v9_0_sw_init +ffffffff8201cf00 t gfx_v9_0_sw_fini +ffffffff8201d160 t gfx_v9_0_hw_init +ffffffff820206d0 t gfx_v9_0_hw_fini +ffffffff82020f90 t gfx_v9_0_suspend +ffffffff82020fd0 t gfx_v9_0_resume +ffffffff82020fe0 t gfx_v9_0_is_idle +ffffffff82021080 t gfx_v9_0_wait_for_idle +ffffffff82021180 t gfx_v9_0_soft_reset +ffffffff82021590 t gfx_v9_0_set_clockgating_state +ffffffff82021690 t gfx_v9_0_set_powergating_state +ffffffff82021af0 t gfx_v9_0_get_clockgating_state +ffffffff82021c30 t gfx_v9_0_get_gpu_clock_counter +ffffffff82022510 t gfx_v9_0_read_wave_data +ffffffff820227e0 t gfx_v9_0_read_wave_vgprs +ffffffff82022850 t gfx_v9_0_read_wave_sgprs +ffffffff82022880 t gfx_v9_0_select_me_pipe_q +ffffffff820228a0 t wave_read_ind +ffffffff820229b0 t wave_read_regs +ffffffff82022b20 t gfx_v9_0_kiq_set_resources +ffffffff82022e80 t gfx_v9_0_kiq_map_queues +ffffffff82023200 t gfx_v9_0_kiq_unmap_queues +ffffffff82023570 t gfx_v9_0_kiq_query_status +ffffffff82023890 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff820239c0 t gfx_v9_0_ring_get_rptr_compute +ffffffff820239f0 t gfx_v9_0_ring_get_wptr_compute +ffffffff82023a60 t gfx_v9_0_ring_set_wptr_compute +ffffffff82023ac0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff82023f40 t gfx_v9_0_ring_test_ring +ffffffff820241b0 t gfx_v9_0_ring_emit_rreg +ffffffff82024470 t gfx_v9_0_ring_emit_wreg +ffffffff820246d0 t gfx_v9_0_ring_emit_reg_wait +ffffffff82024730 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff820247d0 t gfx_v9_0_wait_reg_mem +ffffffff82024b30 t gfx_v9_0_ring_get_rptr_gfx +ffffffff82024b60 t gfx_v9_0_ring_get_wptr_gfx +ffffffff82024c80 t gfx_v9_0_ring_set_wptr_gfx +ffffffff82024dc0 t gfx_v9_0_ring_emit_ib_gfx +ffffffff820254b0 t gfx_v9_0_ring_emit_fence +ffffffff820258c0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff82025930 t gfx_v9_0_ring_emit_vm_flush +ffffffff82025a50 t gfx_v9_0_ring_emit_hdp_flush +ffffffff82025b40 t gfx_v9_0_ring_emit_gds_switch +ffffffff82025c40 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff82025e90 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff82025f50 t gfx_v9_ring_emit_sb +ffffffff82026040 t gfx_v9_ring_emit_cntxcntl +ffffffff82026580 t gfx_v9_0_ring_emit_frame_cntl +ffffffff82026690 t gfx_v9_0_ring_soft_recovery +ffffffff82026740 t gfx_v9_0_ring_preempt_ib +ffffffff82026970 t gfx_v9_0_emit_mem_sync +ffffffff82026c60 t gfx_v9_0_write_data_to_reg +ffffffff82026e90 t gfx_v9_0_ring_test_ib +ffffffff82027080 t gfx_v9_0_ring_patch_cntl +ffffffff820270c0 t gfx_v9_0_ring_patch_ce_meta +ffffffff820271d0 t gfx_v9_0_ring_patch_de_meta +ffffffff820272a0 t gfx_v9_0_ring_emit_ib_compute +ffffffff82027600 t gfx_v9_0_emit_wave_limit +ffffffff82027800 t gfx_v9_0_set_eop_interrupt_state +ffffffff82027a00 t gfx_v9_0_eop_irq +ffffffff82027b70 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff82027d50 t gfx_v9_0_set_priv_reg_fault_state +ffffffff82027ea0 t gfx_v9_0_priv_reg_irq +ffffffff82027fc0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff82028110 t gfx_v9_0_priv_inst_irq +ffffffff82028230 t gfx_v9_0_set_cp_ecc_error_state +ffffffff82028c20 t gfx_v9_0_is_rlc_enabled +ffffffff82028cc0 t gfx_v9_0_set_safe_mode +ffffffff82028e40 t gfx_v9_0_unset_safe_mode +ffffffff82028eb0 t gfx_v9_0_rlc_init +ffffffff82028f30 t gfx_v9_0_get_csb_size +ffffffff82028f60 t gfx_v9_0_get_csb_buffer +ffffffff820290a0 t gfx_v9_0_cp_jump_table_num +ffffffff820290f0 t gfx_v9_0_rlc_resume +ffffffff8202ab20 t gfx_v9_0_rlc_stop +ffffffff8202af40 t gfx_v9_0_rlc_reset +ffffffff8202b120 t gfx_v9_0_rlc_start +ffffffff8202b2a0 t gfx_v9_0_update_spm_vmid +ffffffff8202b2f0 t gfx_v9_0_is_rlcg_access_range +ffffffff8202b340 t gfx_v9_0_init_csb +ffffffff8202b500 t gfx_v9_0_enable_lbpw +ffffffff8202b610 t gfx_v9_0_update_spm_vmid_internal +ffffffff8202b740 t gfx_v9_0_init_always_on_cu_mask +ffffffff8202ba00 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff8202bb10 t gfx_v9_0_mec_init +ffffffff8202bd70 t gfx_v9_0_compute_ring_init +ffffffff8202bed0 t gfx_v9_0_gpu_early_init +ffffffff8202c330 t amdgpu_bo_unreserve +ffffffff8202c440 t gfx_v9_0_cp_gfx_enable +ffffffff8202c540 t amdgpu_bo_reserve +ffffffff8202c6e0 t gfx_v9_0_kiq_init_register +ffffffff8202d550 t gfx_v9_0_mqd_init +ffffffff8202db20 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff8202e0d0 t gfx_v9_0_update_3d_clock_gating +ffffffff8202e530 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff8202f000 t gfx_v9_4_query_ras_error_count +ffffffff8202fef0 t gfx_v9_4_query_ras_error_status +ffffffff820300f0 t gfx_v9_4_reset_ras_error_count +ffffffff82031000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff82031890 T gfx_v9_4_2_init_golden_registers +ffffffff82031930 T gfx_v9_4_2_debug_trap_config_init +ffffffff82031a50 T gfx_v9_4_2_set_power_brake_sequence +ffffffff82031c70 t gfx_v9_4_2_query_ras_error_count +ffffffff82031d40 t gfx_v9_4_2_query_ras_error_status +ffffffff820326e0 t gfx_v9_4_2_reset_ras_error_count +ffffffff82032750 t gfx_v9_4_2_reset_ras_error_status +ffffffff82032cb0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff82032f10 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff82032fb0 t gfx_v9_4_2_run_shader +ffffffff820333e0 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff82033ac0 t gfx_v9_4_2_query_sram_edc_count +ffffffff82033e30 t gfx_v9_4_2_query_utc_edc_count +ffffffff82034020 t wave_read_ind +ffffffff82035000 t gfx_v9_4_3_xcp_suspend +ffffffff820350b0 t gfx_v9_4_3_xcp_resume +ffffffff82035250 t gfx_v9_4_3_query_ras_error_count +ffffffff82035270 t gfx_v9_4_3_query_ras_error_status +ffffffff82035290 t gfx_v9_4_3_reset_ras_error_count +ffffffff820352b0 t gfx_v9_4_3_reset_ras_error_status +ffffffff820352d0 t gfx_v9_4_3_enable_watchdog_timer +ffffffff820352f0 t gfx_v9_4_3_early_init +ffffffff82035a60 t gfx_v9_4_3_late_init +ffffffff82035af0 t gfx_v9_4_3_sw_init +ffffffff82035fe0 t gfx_v9_4_3_sw_fini +ffffffff82036210 t gfx_v9_4_3_hw_init +ffffffff82037090 t gfx_v9_4_3_hw_fini +ffffffff82037170 t gfx_v9_4_3_suspend +ffffffff82037250 t gfx_v9_4_3_resume +ffffffff82037260 t gfx_v9_4_3_is_idle +ffffffff82037450 t gfx_v9_4_3_wait_for_idle +ffffffff820374f0 t gfx_v9_4_3_soft_reset +ffffffff82037d30 t gfx_v9_4_3_set_clockgating_state +ffffffff82037ef0 t gfx_v9_4_3_set_powergating_state +ffffffff82037f20 t gfx_v9_4_3_get_clockgating_state +ffffffff820380d0 t gfx_v9_4_3_kiq_set_resources +ffffffff82038430 t gfx_v9_4_3_kiq_map_queues +ffffffff820387d0 t gfx_v9_4_3_kiq_unmap_queues +ffffffff82038b90 t gfx_v9_4_3_kiq_query_status +ffffffff82038eb0 t gfx_v9_4_3_kiq_invalidate_tlbs +ffffffff82038fe0 t gfx_v9_4_3_ring_get_rptr_compute +ffffffff82039020 t gfx_v9_4_3_ring_get_wptr_compute +ffffffff82039090 t gfx_v9_4_3_ring_set_wptr_compute +ffffffff820390f0 t gfx_v9_4_3_ring_emit_fence_kiq +ffffffff82039590 t gfx_v9_4_3_ring_test_ring +ffffffff82039830 t gfx_v9_4_3_ring_emit_rreg +ffffffff82039af0 t gfx_v9_4_3_ring_emit_wreg +ffffffff82039d50 t gfx_v9_4_3_ring_emit_reg_wait +ffffffff82039db0 t gfx_v9_4_3_ring_emit_reg_write_reg_wait +ffffffff82039dd0 t gfx_v9_4_3_wait_reg_mem +ffffffff8203a130 t gfx_v9_4_3_ring_emit_ib_compute +ffffffff8203a490 t gfx_v9_4_3_ring_emit_fence +ffffffff8203a880 t gfx_v9_4_3_ring_emit_pipeline_sync +ffffffff8203a8f0 t gfx_v9_4_3_ring_emit_vm_flush +ffffffff8203a910 t gfx_v9_4_3_ring_emit_hdp_flush +ffffffff8203aa00 t gfx_v9_4_3_ring_emit_gds_switch +ffffffff8203abe0 t gfx_v9_4_3_ring_test_ib +ffffffff8203add0 t gfx_v9_4_3_emit_mem_sync +ffffffff8203b0c0 t gfx_v9_4_3_emit_wave_limit +ffffffff8203b2d0 t gfx_v9_4_3_write_data_to_reg +ffffffff8203b500 t gfx_v9_4_3_set_eop_interrupt_state +ffffffff8203b680 t gfx_v9_4_3_eop_irq +ffffffff8203b830 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state +ffffffff8203b9b0 t gfx_v9_4_3_ih_to_xcc_inst +ffffffff8203ba90 t gfx_v9_4_3_set_priv_reg_fault_state +ffffffff8203bef0 t gfx_v9_4_3_priv_reg_irq +ffffffff8203bf60 t gfx_v9_4_3_fault +ffffffff8203c0e0 t gfx_v9_4_3_set_priv_inst_fault_state +ffffffff8203c540 t gfx_v9_4_3_priv_inst_irq +ffffffff8203c5b0 t gfx_v9_4_3_is_rlc_enabled +ffffffff8203c700 t gfx_v9_4_3_xcc_set_safe_mode +ffffffff8203ca10 t gfx_v9_4_3_xcc_unset_safe_mode +ffffffff8203cb50 t gfx_v9_4_3_rlc_init +ffffffff8203cbb0 t gfx_v9_4_3_rlc_resume +ffffffff8203cc70 t gfx_v9_4_3_rlc_stop +ffffffff8203cd20 t gfx_v9_4_3_rlc_reset +ffffffff8203d4a0 t gfx_v9_4_3_rlc_start +ffffffff8203d550 t gfx_v9_4_3_update_spm_vmid +ffffffff8203d7b0 t gfx_v9_4_3_is_rlcg_access_range +ffffffff8203d880 t gfx_v9_4_3_xcc_rlc_resume +ffffffff8203e240 t gfx_v9_4_3_xcc_rlc_stop +ffffffff8203eaa0 t gfx_v9_4_3_xcc_rlc_start +ffffffff8203eeb0 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt +ffffffff8203f110 t gfx_v9_4_3_xcc_select_se_sh +ffffffff8203f340 t gfx_v9_4_3_mec_init +ffffffff8203f6b0 t gfx_v9_4_3_gpu_early_init +ffffffff8203f900 t amdgpu_bo_unreserve +ffffffff8203fa10 t gfx_v9_4_3_get_gpu_clock_counter +ffffffff8203fde0 t gfx_v9_4_3_read_wave_data +ffffffff82040140 t gfx_v9_4_3_read_wave_vgprs +ffffffff82040160 t gfx_v9_4_3_read_wave_sgprs +ffffffff820401c0 t gfx_v9_4_3_select_me_pipe_q +ffffffff82040240 t gfx_v9_4_3_switch_compute_partition +ffffffff820405f0 t wave_read_ind +ffffffff82040830 t wave_read_regs +ffffffff82040b10 t gfx_v9_4_3_xcc_constants_init +ffffffff82041e80 t gfx_v9_4_3_xcc_cp_resume +ffffffff82043120 t gfx_v9_4_3_xcc_cp_compute_enable +ffffffff82043300 t amdgpu_bo_reserve +ffffffff820434a0 t gfx_v9_4_3_xcc_kiq_init_register +ffffffff82045540 t gfx_v9_4_3_xcc_mqd_init +ffffffff820460e0 t gfx_v9_4_3_xcc_fini +ffffffff82046760 t gfx_v9_4_3_xcc_q_fini_register +ffffffff820472c0 t gfx_v9_4_3_xcc_update_sram_fgcg +ffffffff82047570 t gfx_v9_4_3_xcc_update_repeater_fgcg +ffffffff82047820 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating +ffffffff82048510 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating +ffffffff82048ea0 t gfx_v9_4_3_inst_query_ras_err_count +ffffffff82049150 t gfx_v9_4_3_inst_query_ras_err_status +ffffffff8204a140 t gfx_v9_4_3_inst_reset_ras_err_count +ffffffff8204a330 t gfx_v9_4_3_inst_reset_ras_err_status +ffffffff8204abd0 t gfx_v9_4_3_inst_enable_watchdog_timer +ffffffff8204b000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff8204b0a0 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff8204b1f0 t gfxhub_v1_0_gart_enable +ffffffff8204c9c0 t gfxhub_v1_0_gart_disable +ffffffff8204ccb0 t gfxhub_v1_0_set_fault_enable_default +ffffffff8204cdb0 t gfxhub_v1_0_init +ffffffff8204d000 T gfxhub_v1_1_get_xgmi_info +ffffffff8204e000 t gfxhub_v1_2_get_mc_fb_offset +ffffffff8204e150 t gfxhub_v1_2_setup_vm_pt_regs +ffffffff8204e1c0 t gfxhub_v1_2_gart_enable +ffffffff8204e250 t gfxhub_v1_2_gart_disable +ffffffff8204e2b0 t gfxhub_v1_2_set_fault_enable_default +ffffffff8204e320 t gfxhub_v1_2_init +ffffffff8204e680 t gfxhub_v1_2_get_xgmi_info +ffffffff8204e930 t gfxhub_v1_2_xcp_suspend +ffffffff8204e980 t gfxhub_v1_2_xcp_resume +ffffffff8204ea00 t gfxhub_v1_2_xcc_setup_vm_pt_regs +ffffffff8204ed60 t gfxhub_v1_2_xcc_gart_enable +ffffffff820529d0 t gfxhub_v1_2_xcc_gart_disable +ffffffff82053130 t gfxhub_v1_2_xcc_set_fault_enable_default +ffffffff82054000 t gfxhub_v2_0_get_fb_location +ffffffff820540a0 t gfxhub_v2_0_get_mc_fb_offset +ffffffff82054140 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff82054290 t gfxhub_v2_0_gart_enable +ffffffff82055730 t gfxhub_v2_0_gart_disable +ffffffff820559a0 t gfxhub_v2_0_set_fault_enable_default +ffffffff82055aa0 t gfxhub_v2_0_init +ffffffff82055b70 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff82055d90 t gfxhub_v2_0_get_invalidate_req +ffffffff82056000 t gfxhub_v2_1_get_fb_location +ffffffff820560a0 t gfxhub_v2_1_get_mc_fb_offset +ffffffff82056140 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff82056290 t gfxhub_v2_1_gart_enable +ffffffff82057830 t gfxhub_v2_1_gart_disable +ffffffff82057aa0 t gfxhub_v2_1_set_fault_enable_default +ffffffff82057bc0 t gfxhub_v2_1_init +ffffffff82057c90 t gfxhub_v2_1_get_xgmi_info +ffffffff82057df0 t gfxhub_v2_1_utcl2_harvest +ffffffff82057fe0 t gfxhub_v2_1_save_regs +ffffffff82058b30 t gfxhub_v2_1_restore_regs +ffffffff82059900 t gfxhub_v2_1_halt +ffffffff82059d50 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff82059f70 t gfxhub_v2_1_get_invalidate_req +ffffffff8205a000 t gfxhub_v3_0_get_fb_location +ffffffff8205a0a0 t gfxhub_v3_0_get_mc_fb_offset +ffffffff8205a140 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff8205a290 t gfxhub_v3_0_gart_enable +ffffffff8205b830 t gfxhub_v3_0_gart_disable +ffffffff8205bb10 t gfxhub_v3_0_set_fault_enable_default +ffffffff8205bd00 t gfxhub_v3_0_init +ffffffff8205bdd0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff8205bff0 t gfxhub_v3_0_get_invalidate_req +ffffffff8205d000 t gfxhub_v3_0_3_get_fb_location +ffffffff8205d0a0 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff8205d140 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff8205d290 t gfxhub_v3_0_3_gart_enable +ffffffff8205e6f0 t gfxhub_v3_0_3_gart_disable +ffffffff8205e9f0 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff8205eb10 t gfxhub_v3_0_3_init +ffffffff8205ebe0 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff8205ee00 t gfxhub_v3_0_3_get_invalidate_req +ffffffff8205f000 t gmc_v10_0_early_init +ffffffff8205f170 t gmc_v10_0_late_init +ffffffff8205f1f0 t gmc_v10_0_sw_init +ffffffff8205f690 t gmc_v10_0_sw_fini +ffffffff8205f710 t gmc_v10_0_hw_init +ffffffff8205f990 t gmc_v10_0_hw_fini +ffffffff8205fa80 t gmc_v10_0_suspend +ffffffff8205fac0 t gmc_v10_0_resume +ffffffff8205fb20 t gmc_v10_0_is_idle +ffffffff8205fb50 t gmc_v10_0_wait_for_idle +ffffffff8205fb80 t gmc_v10_0_soft_reset +ffffffff8205fbb0 t gmc_v10_0_set_clockgating_state +ffffffff8205fc70 t gmc_v10_0_set_powergating_state +ffffffff8205fca0 t gmc_v10_0_get_clockgating_state +ffffffff8205fd50 t gmc_v10_0_flush_gpu_tlb +ffffffff82060060 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff82060380 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff82060560 t gmc_v10_0_emit_pasid_mapping +ffffffff820605e0 t gmc_v10_0_map_mtype +ffffffff82060630 t gmc_v10_0_get_vm_pde +ffffffff82060730 t gmc_v10_0_get_vm_pte +ffffffff82060810 t gmc_v10_0_get_vbios_fb_size +ffffffff820609a0 t gmc_v10_0_flush_vm_hub +ffffffff82060e40 t gmc_v10_0_vm_fault_interrupt_state +ffffffff82060ef0 t gmc_v10_0_process_interrupt +ffffffff82061220 t gmc_v10_0_ecc_interrupt_state +ffffffff82061250 t gmc_v10_0_gart_init +ffffffff82062000 t gmc_v11_0_early_init +ffffffff820621f0 t gmc_v11_0_late_init +ffffffff82062270 t gmc_v11_0_sw_init +ffffffff82062630 t gmc_v11_0_sw_fini +ffffffff820626b0 t gmc_v11_0_hw_init +ffffffff82062860 t gmc_v11_0_hw_fini +ffffffff82062920 t gmc_v11_0_suspend +ffffffff820629e0 t gmc_v11_0_resume +ffffffff82062a40 t gmc_v11_0_is_idle +ffffffff82062a70 t gmc_v11_0_wait_for_idle +ffffffff82062aa0 t gmc_v11_0_soft_reset +ffffffff82062ad0 t gmc_v11_0_set_clockgating_state +ffffffff82062b50 t gmc_v11_0_set_powergating_state +ffffffff82062b80 t gmc_v11_0_get_clockgating_state +ffffffff82062bc0 t gmc_v11_0_flush_gpu_tlb +ffffffff820630f0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff820633c0 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff820635a0 t gmc_v11_0_emit_pasid_mapping +ffffffff82063620 t gmc_v11_0_map_mtype +ffffffff82063670 t gmc_v11_0_get_vm_pde +ffffffff82063770 t gmc_v11_0_get_vm_pte +ffffffff82063850 t gmc_v11_0_get_vbios_fb_size +ffffffff820639e0 t gmc_v11_0_vm_fault_interrupt_state +ffffffff82063a90 t gmc_v11_0_process_interrupt +ffffffff82063cf0 t gmc_v11_0_ecc_interrupt_state +ffffffff82063d20 t gmc_v11_0_gart_init +ffffffff82064000 t gmc_v7_0_early_init +ffffffff820640a0 t gmc_v7_0_late_init +ffffffff820640f0 t gmc_v7_0_sw_init +ffffffff82064610 t gmc_v7_0_sw_fini +ffffffff820646c0 t gmc_v7_0_hw_init +ffffffff82065350 t gmc_v7_0_hw_fini +ffffffff82065460 t gmc_v7_0_suspend +ffffffff820654a0 t gmc_v7_0_resume +ffffffff82065500 t gmc_v7_0_is_idle +ffffffff82065550 t gmc_v7_0_wait_for_idle +ffffffff82065600 t gmc_v7_0_soft_reset +ffffffff82065910 t gmc_v7_0_set_clockgating_state +ffffffff82065bb0 t gmc_v7_0_set_powergating_state +ffffffff82065be0 t gmc_v7_0_flush_gpu_tlb +ffffffff82065c10 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff82065cf0 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff82065da0 t gmc_v7_0_emit_pasid_mapping +ffffffff82065dd0 t gmc_v7_0_set_prt +ffffffff82065ff0 t gmc_v7_0_get_vm_pde +ffffffff82066050 t gmc_v7_0_get_vm_pte +ffffffff82066090 t gmc_v7_0_get_vbios_fb_size +ffffffff82066110 t gmc_v7_0_vm_fault_interrupt_state +ffffffff82066210 t gmc_v7_0_process_interrupt +ffffffff82066520 t gmc_v7_0_gart_init +ffffffff82067000 t gmc_v8_0_early_init +ffffffff820670a0 t gmc_v8_0_late_init +ffffffff820670f0 t gmc_v8_0_sw_init +ffffffff820677b0 t gmc_v8_0_sw_fini +ffffffff82067860 t gmc_v8_0_hw_init +ffffffff82068890 t gmc_v8_0_hw_fini +ffffffff820689a0 t gmc_v8_0_suspend +ffffffff820689e0 t gmc_v8_0_resume +ffffffff82068a40 t gmc_v8_0_is_idle +ffffffff82068a90 t gmc_v8_0_wait_for_idle +ffffffff82068b40 t gmc_v8_0_check_soft_reset +ffffffff82068bc0 t gmc_v8_0_pre_soft_reset +ffffffff82068d70 t gmc_v8_0_soft_reset +ffffffff82068e70 t gmc_v8_0_post_soft_reset +ffffffff82068f00 t gmc_v8_0_set_clockgating_state +ffffffff82069730 t gmc_v8_0_set_powergating_state +ffffffff82069760 t gmc_v8_0_get_clockgating_state +ffffffff820697d0 t gmc_v8_0_flush_gpu_tlb +ffffffff82069800 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff820698e0 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff82069990 t gmc_v8_0_emit_pasid_mapping +ffffffff820699c0 t gmc_v8_0_set_prt +ffffffff82069be0 t gmc_v8_0_get_vm_pde +ffffffff82069c40 t gmc_v8_0_get_vm_pte +ffffffff82069c90 t gmc_v8_0_get_vbios_fb_size +ffffffff82069d10 t gmc_v8_0_vm_fault_interrupt_state +ffffffff82069e10 t gmc_v8_0_process_interrupt +ffffffff8206a230 t gmc_v8_0_gart_init +ffffffff8206b000 T gmc_v9_0_restore_registers +ffffffff8206b170 t gmc_v9_0_early_init +ffffffff8206b540 t gmc_v9_0_late_init +ffffffff8206b670 t gmc_v9_0_sw_init +ffffffff8206bee0 t gmc_v9_0_sw_fini +ffffffff8206bfe0 t gmc_v9_0_hw_init +ffffffff8206c560 t gmc_v9_0_hw_fini +ffffffff8206c660 t gmc_v9_0_suspend +ffffffff8206c6a0 t gmc_v9_0_resume +ffffffff8206c700 t gmc_v9_0_is_idle +ffffffff8206c730 t gmc_v9_0_wait_for_idle +ffffffff8206c760 t gmc_v9_0_soft_reset +ffffffff8206c790 t gmc_v9_0_set_clockgating_state +ffffffff8206c800 t gmc_v9_0_set_powergating_state +ffffffff8206c830 t gmc_v9_0_get_clockgating_state +ffffffff8206c870 t gmc_v9_0_flush_gpu_tlb +ffffffff8206cfa0 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff8206d3e0 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff8206d610 t gmc_v9_0_emit_pasid_mapping +ffffffff8206d690 t gmc_v9_0_map_mtype +ffffffff8206d6d0 t gmc_v9_0_get_vm_pde +ffffffff8206d7e0 t gmc_v9_0_get_vm_pte +ffffffff8206db20 t gmc_v9_0_override_vm_pte_flags +ffffffff8206dbe0 t gmc_v9_0_get_vbios_fb_size +ffffffff8206dd90 t gmc_v9_0_query_memory_partition +ffffffff8206ddf0 t gmc_v9_0_vm_fault_interrupt_state +ffffffff8206e2d0 t gmc_v9_0_process_interrupt +ffffffff8206eba0 t gmc_v9_0_ecc_interrupt_state +ffffffff8206ed50 t gmc_v9_0_init_mem_ranges +ffffffff8206f1c0 t gmc_v9_0_gart_init +ffffffff8206f330 t gmc_v9_0_save_registers +ffffffff82070000 t hdp_v4_0_query_ras_error_count +ffffffff820700d0 t hdp_v4_0_reset_ras_error_count +ffffffff82070200 t hdp_v4_0_flush_hdp +ffffffff82070250 t hdp_v4_0_invalidate_hdp +ffffffff82070330 t hdp_v4_0_update_clock_gating +ffffffff82070440 t hdp_v4_0_get_clockgating_state +ffffffff820704a0 t hdp_v4_0_init_registers +ffffffff82071000 t hdp_v5_0_flush_hdp +ffffffff82071050 t hdp_v5_0_invalidate_hdp +ffffffff820710f0 t hdp_v5_0_update_clock_gating +ffffffff82071530 t hdp_v5_0_get_clockgating_state +ffffffff82071670 t hdp_v5_0_init_registers +ffffffff82072000 t hdp_v5_2_flush_hdp +ffffffff82072050 t hdp_v5_2_update_clock_gating +ffffffff820724a0 t hdp_v5_2_get_clockgating_state +ffffffff82073000 t hdp_v6_0_flush_hdp +ffffffff82073050 t hdp_v6_0_update_clock_gating +ffffffff820733b0 t hdp_v6_0_get_clockgating_state +ffffffff82074000 t iceland_ih_early_init +ffffffff82074050 t iceland_ih_sw_init +ffffffff820740c0 t iceland_ih_sw_fini +ffffffff82074120 t iceland_ih_hw_init +ffffffff82074410 t iceland_ih_hw_fini +ffffffff82074520 t iceland_ih_suspend +ffffffff82074630 t iceland_ih_resume +ffffffff82074670 t iceland_ih_is_idle +ffffffff820746c0 t iceland_ih_wait_for_idle +ffffffff82074770 t iceland_ih_soft_reset +ffffffff82074890 t iceland_ih_set_clockgating_state +ffffffff820748c0 t iceland_ih_set_powergating_state +ffffffff820748f0 t iceland_ih_get_wptr +ffffffff82074a20 t iceland_ih_decode_iv +ffffffff82074aa0 t iceland_ih_set_rptr +ffffffff82075000 t ih_v6_0_early_init +ffffffff82075050 t ih_v6_0_sw_init +ffffffff820751d0 t ih_v6_0_sw_fini +ffffffff82075210 t ih_v6_0_hw_init +ffffffff820758a0 t ih_v6_0_hw_fini +ffffffff82075910 t ih_v6_0_suspend +ffffffff82075980 t ih_v6_0_resume +ffffffff82075990 t ih_v6_0_is_idle +ffffffff820759c0 t ih_v6_0_wait_for_idle +ffffffff820759f0 t ih_v6_0_soft_reset +ffffffff82075a20 t ih_v6_0_set_clockgating_state +ffffffff82075b60 t ih_v6_0_set_powergating_state +ffffffff82075d00 t ih_v6_0_get_clockgating_state +ffffffff82075da0 t ih_v6_0_get_wptr +ffffffff82075ee0 t ih_v6_0_set_rptr +ffffffff82075fc0 t ih_v6_0_self_irq +ffffffff82076030 t ih_v6_0_toggle_interrupts +ffffffff82076290 t force_update_wptr_for_self_int +ffffffff82077000 t ih_v6_1_early_init +ffffffff82077050 t ih_v6_1_sw_init +ffffffff820771d0 t ih_v6_1_sw_fini +ffffffff82077210 t ih_v6_1_hw_init +ffffffff820778a0 t ih_v6_1_hw_fini +ffffffff82077910 t ih_v6_1_suspend +ffffffff82077980 t ih_v6_1_resume +ffffffff82077990 t ih_v6_1_is_idle +ffffffff820779c0 t ih_v6_1_wait_for_idle +ffffffff820779f0 t ih_v6_1_soft_reset +ffffffff82077a20 t ih_v6_1_set_clockgating_state +ffffffff82077b60 t ih_v6_1_set_powergating_state +ffffffff82077d00 t ih_v6_1_get_clockgating_state +ffffffff82077da0 t ih_v6_1_get_wptr +ffffffff82077ee0 t ih_v6_1_set_rptr +ffffffff82077fc0 t ih_v6_1_self_irq +ffffffff82078030 t ih_v6_1_toggle_interrupts +ffffffff82078250 t force_update_wptr_for_self_int +ffffffff82079000 t imu_v11_0_init_microcode +ffffffff820791b0 t imu_v11_0_load_microcode +ffffffff82079580 t imu_v11_0_setup +ffffffff82079860 t imu_v11_0_start +ffffffff82079980 t imu_v11_0_program_rlc_ram +ffffffff82079b60 t imu_v11_0_wait_for_reset_status +ffffffff82079ce0 t program_imu_rlc_ram +ffffffff8207b000 T imu_v11_0_3_program_rlc_ram +ffffffff8207c000 T jpeg_v1_0_early_init +ffffffff8207c080 T jpeg_v1_0_sw_init +ffffffff8207c190 T jpeg_v1_0_sw_fini +ffffffff8207c1b0 T jpeg_v1_0_start +ffffffff8207ccf0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff8207cd80 t jpeg_v1_0_decode_ring_get_wptr +ffffffff8207ce10 t jpeg_v1_0_decode_ring_set_wptr +ffffffff8207ce80 t jpeg_v1_dec_ring_parse_cs +ffffffff8207cff0 t jpeg_v1_0_decode_ring_emit_ib +ffffffff8207da10 t jpeg_v1_0_decode_ring_emit_fence +ffffffff8207e460 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff8207e4d0 t jpeg_v1_0_decode_ring_nop +ffffffff8207e630 t jpeg_v1_0_decode_ring_insert_start +ffffffff8207e810 t jpeg_v1_0_decode_ring_insert_end +ffffffff8207e9f0 t jpeg_v1_0_ring_begin_use +ffffffff8207eb20 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff8207edb0 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff8207f210 t jpeg_v1_0_set_interrupt_state +ffffffff8207f240 t jpeg_v1_0_process_interrupt +ffffffff82080000 T jpeg_v2_0_dec_ring_insert_start +ffffffff820801c0 T jpeg_v2_0_dec_ring_insert_end +ffffffff82080380 T jpeg_v2_0_dec_ring_emit_fence +ffffffff82080af0 T jpeg_v2_0_dec_ring_emit_ib +ffffffff82081380 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff82081780 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff820817f0 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff82081a50 T jpeg_v2_0_dec_ring_nop +ffffffff82081bb0 t jpeg_v2_0_early_init +ffffffff82081c40 t jpeg_v2_0_sw_init +ffffffff82081d90 t jpeg_v2_0_sw_fini +ffffffff82081df0 t jpeg_v2_0_hw_init +ffffffff82081e80 t jpeg_v2_0_hw_fini +ffffffff82081f70 t jpeg_v2_0_suspend +ffffffff82081fa0 t jpeg_v2_0_resume +ffffffff82082050 t jpeg_v2_0_is_idle +ffffffff820820f0 t jpeg_v2_0_wait_for_idle +ffffffff82082130 t jpeg_v2_0_set_clockgating_state +ffffffff820821f0 t jpeg_v2_0_set_powergating_state +ffffffff82082a60 t jpeg_v2_0_dec_ring_get_rptr +ffffffff82082af0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff82082ba0 t jpeg_v2_0_dec_ring_set_wptr +ffffffff82082c40 t jpeg_v2_0_set_interrupt_state +ffffffff82082c70 t jpeg_v2_0_process_interrupt +ffffffff82082d10 t jpeg_v2_0_enable_clock_gating +ffffffff82082ee0 t jpeg_v2_0_disable_clock_gating +ffffffff82084000 t jpeg_v2_6_query_ras_poison_status +ffffffff82084160 t jpeg_v2_5_early_init +ffffffff82084380 t jpeg_v2_5_sw_init +ffffffff82084660 t jpeg_v2_5_sw_fini +ffffffff820846c0 t jpeg_v2_5_hw_init +ffffffff820847c0 t jpeg_v2_5_hw_fini +ffffffff82084980 t jpeg_v2_5_suspend +ffffffff820849b0 t jpeg_v2_5_resume +ffffffff82084ad0 t jpeg_v2_5_is_idle +ffffffff82084be0 t jpeg_v2_5_wait_for_idle +ffffffff82084ca0 t jpeg_v2_5_set_clockgating_state +ffffffff82084d60 t jpeg_v2_5_set_powergating_state +ffffffff820855c0 t jpeg_v2_5_dec_ring_get_rptr +ffffffff82085660 t jpeg_v2_5_dec_ring_get_wptr +ffffffff82085710 t jpeg_v2_5_dec_ring_set_wptr +ffffffff820857c0 t jpeg_v2_6_dec_ring_insert_start +ffffffff820859a0 t jpeg_v2_6_dec_ring_insert_end +ffffffff82085b80 t jpeg_v2_5_set_interrupt_state +ffffffff82085bb0 t jpeg_v2_5_process_interrupt +ffffffff82085c90 t jpeg_v2_6_set_ras_interrupt_state +ffffffff82085cc0 t jpeg_v2_5_enable_clock_gating +ffffffff82085da0 t jpeg_v2_5_disable_clock_gating +ffffffff82087000 t jpeg_v3_0_early_init +ffffffff82087120 t jpeg_v3_0_sw_init +ffffffff82087270 t jpeg_v3_0_sw_fini +ffffffff820872d0 t jpeg_v3_0_hw_init +ffffffff82087360 t jpeg_v3_0_hw_fini +ffffffff82087450 t jpeg_v3_0_suspend +ffffffff82087480 t jpeg_v3_0_resume +ffffffff82087530 t jpeg_v3_0_is_idle +ffffffff820875d0 t jpeg_v3_0_wait_for_idle +ffffffff82087610 t jpeg_v3_0_set_clockgating_state +ffffffff820876d0 t jpeg_v3_0_set_powergating_state +ffffffff82088020 t jpeg_v3_0_dec_ring_get_rptr +ffffffff820880b0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff82088160 t jpeg_v3_0_dec_ring_set_wptr +ffffffff82088200 t jpeg_v3_0_set_interrupt_state +ffffffff82088230 t jpeg_v3_0_process_interrupt +ffffffff820882d0 t jpeg_v3_0_enable_clock_gating +ffffffff820883b0 t jpeg_v3_0_disable_clock_gating +ffffffff82089000 t jpeg_v4_0_query_ras_poison_status +ffffffff82089160 t jpeg_v4_0_early_init +ffffffff82089240 t jpeg_v4_0_sw_init +ffffffff82089410 t jpeg_v4_0_sw_fini +ffffffff82089470 t jpeg_v4_0_hw_init +ffffffff82089b60 t jpeg_v4_0_hw_fini +ffffffff82089c60 t jpeg_v4_0_suspend +ffffffff82089c90 t jpeg_v4_0_resume +ffffffff82089cf0 t jpeg_v4_0_is_idle +ffffffff82089d90 t jpeg_v4_0_wait_for_idle +ffffffff82089dd0 t jpeg_v4_0_set_clockgating_state +ffffffff82089ea0 t jpeg_v4_0_set_powergating_state +ffffffff8208a760 t jpeg_v4_0_dec_ring_get_rptr +ffffffff8208a7f0 t jpeg_v4_0_dec_ring_get_wptr +ffffffff8208a8a0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff8208a940 t jpeg_v4_0_set_interrupt_state +ffffffff8208a970 t jpeg_v4_0_process_interrupt +ffffffff8208aa20 t jpeg_v4_0_set_ras_interrupt_state +ffffffff8208aa50 t jpeg_v4_0_enable_clock_gating +ffffffff8208ac30 t jpeg_v4_0_disable_clock_gating +ffffffff8208b000 T jpeg_v4_0_3_dec_ring_parse_cs +ffffffff8208b180 t jpeg_v4_0_3_early_init +ffffffff8208b300 t jpeg_v4_0_3_sw_init +ffffffff8208b680 t jpeg_v4_0_3_sw_fini +ffffffff8208b6e0 t jpeg_v4_0_3_hw_init +ffffffff8208c220 t jpeg_v4_0_3_hw_fini +ffffffff8208c2d0 t jpeg_v4_0_3_suspend +ffffffff8208c370 t jpeg_v4_0_3_resume +ffffffff8208c3d0 t jpeg_v4_0_3_is_idle +ffffffff8208c5e0 t jpeg_v4_0_3_wait_for_idle +ffffffff8208c750 t jpeg_v4_0_3_set_clockgating_state +ffffffff8208c7f0 t jpeg_v4_0_3_set_powergating_state +ffffffff8208d5d0 t jpeg_v4_0_3_dec_ring_get_rptr +ffffffff8208d770 t jpeg_v4_0_3_dec_ring_get_wptr +ffffffff8208d930 t jpeg_v4_0_3_dec_ring_set_wptr +ffffffff8208dae0 t jpeg_v4_0_3_dec_ring_emit_ib +ffffffff8208e440 t jpeg_v4_0_3_dec_ring_emit_fence +ffffffff8208ec90 t jpeg_v4_0_3_dec_ring_emit_vm_flush +ffffffff8208ed00 t jpeg_v4_0_3_dec_ring_nop +ffffffff8208ee60 t jpeg_v4_0_3_dec_ring_insert_start +ffffffff8208f020 t jpeg_v4_0_3_dec_ring_insert_end +ffffffff8208f1e0 t jpeg_v4_0_3_dec_ring_emit_wreg +ffffffff8208f440 t jpeg_v4_0_3_dec_ring_emit_reg_wait +ffffffff8208f840 t jpeg_v4_0_3_set_interrupt_state +ffffffff8208f870 t jpeg_v4_0_3_process_interrupt +ffffffff8208fb20 t jpeg_v4_0_3_query_ras_error_count +ffffffff8208fc40 t jpeg_v4_0_3_reset_ras_error_count +ffffffff8208fd50 t jpeg_v4_0_3_disable_clock_gating +ffffffff82090000 t lsdma_v6_0_copy_mem +ffffffff820903e0 t lsdma_v6_0_fill_mem +ffffffff82090740 t lsdma_v6_0_update_memory_power_gating +ffffffff82091000 t mca_v3_0_ras_block_match +ffffffff82091050 t mca_v3_0_mp0_query_ras_error_count +ffffffff82091070 t mca_v3_0_mp1_query_ras_error_count +ffffffff82091090 t mca_v3_0_mpio_query_ras_error_count +ffffffff82092000 t mes_v10_0_early_init +ffffffff82092070 t mes_v10_0_late_init +ffffffff820920c0 t mes_v10_1_sw_init +ffffffff82092630 t mes_v10_1_sw_fini +ffffffff820927c0 t mes_v10_1_hw_init +ffffffff820931b0 t mes_v10_1_hw_fini +ffffffff820932c0 t mes_v10_1_suspend +ffffffff82093400 t mes_v10_1_resume +ffffffff82093460 t mes_v10_1_kiq_hw_init +ffffffff820938f0 t mes_v10_1_add_hw_queue +ffffffff82093a80 t mes_v10_1_remove_hw_queue +ffffffff82093b20 t mes_v10_1_unmap_legacy_queue +ffffffff82093c20 t mes_v10_1_suspend_gang +ffffffff82093c50 t mes_v10_1_resume_gang +ffffffff82093c80 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff82093ed0 t mes_v10_1_load_microcode +ffffffff820947f0 t mes_v10_1_enable +ffffffff82094d00 t mes_v10_1_queue_init +ffffffff82094fe0 t amdgpu_bo_unreserve +ffffffff820950f0 t mes_v10_1_ring_get_rptr +ffffffff82095120 t mes_v10_1_ring_get_wptr +ffffffff82095190 t mes_v10_1_ring_set_wptr +ffffffff82096000 t mes_v11_0_early_init +ffffffff82096070 t mes_v11_0_late_init +ffffffff820960e0 t mes_v11_0_sw_init +ffffffff82096650 t mes_v11_0_sw_fini +ffffffff820968a0 t mes_v11_0_hw_init +ffffffff820971b0 t mes_v11_0_hw_fini +ffffffff820971e0 t mes_v11_0_suspend +ffffffff820971f0 t mes_v11_0_resume +ffffffff82097250 t mes_v11_0_kiq_hw_init +ffffffff820974a0 t mes_v11_0_kiq_hw_fini +ffffffff82097600 t mes_v11_0_add_hw_queue +ffffffff82097810 t mes_v11_0_remove_hw_queue +ffffffff820978b0 t mes_v11_0_unmap_legacy_queue +ffffffff820979d0 t mes_v11_0_suspend_gang +ffffffff82097a00 t mes_v11_0_resume_gang +ffffffff82097a30 t mes_v11_0_misc_op +ffffffff82097bf0 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff82097e50 t mes_v11_0_load_microcode +ffffffff820986f0 t mes_v11_0_enable +ffffffff82098ca0 t mes_v11_0_queue_init +ffffffff82099920 t amdgpu_bo_unreserve +ffffffff82099a30 t mes_v11_0_mqd_init +ffffffff82099c50 t mes_v11_0_kiq_dequeue +ffffffff8209a140 t mes_v11_0_ring_get_rptr +ffffffff8209a170 t mes_v11_0_ring_get_wptr +ffffffff8209a1e0 t mes_v11_0_ring_set_wptr +ffffffff8209b000 t mmhub_v1_0_query_ras_error_count +ffffffff8209b160 t mmhub_v1_0_reset_ras_error_count +ffffffff8209b230 t mmhub_v1_0_get_fb_location +ffffffff8209b360 t mmhub_v1_0_init +ffffffff8209b410 t mmhub_v1_0_gart_enable +ffffffff8209c9c0 t mmhub_v1_0_set_fault_enable_default +ffffffff8209cae0 t mmhub_v1_0_gart_disable +ffffffff8209cdb0 t mmhub_v1_0_set_clockgating +ffffffff8209d2a0 t mmhub_v1_0_get_clockgating +ffffffff8209d3e0 t mmhub_v1_0_setup_vm_pt_regs +ffffffff8209d530 t mmhub_v1_0_update_power_gating +ffffffff8209e000 t mmhub_v1_7_query_ras_error_count +ffffffff8209e160 t mmhub_v1_7_query_ras_error_status +ffffffff8209e270 t mmhub_v1_7_reset_ras_error_count +ffffffff8209e320 t mmhub_v1_7_reset_ras_error_status +ffffffff8209e440 t mmhub_v1_7_get_fb_location +ffffffff8209e570 t mmhub_v1_7_init +ffffffff8209e610 t mmhub_v1_7_gart_enable +ffffffff8209fdf0 t mmhub_v1_7_set_fault_enable_default +ffffffff8209ff10 t mmhub_v1_7_gart_disable +ffffffff820a01e0 t mmhub_v1_7_set_clockgating +ffffffff820a05c0 t mmhub_v1_7_get_clockgating +ffffffff820a0700 t mmhub_v1_7_setup_vm_pt_regs +ffffffff820a1000 t mmhub_v1_8_get_fb_location +ffffffff820a1130 t mmhub_v1_8_init +ffffffff820a12b0 t mmhub_v1_8_gart_enable +ffffffff820a31d0 t mmhub_v1_8_set_fault_enable_default +ffffffff820a33c0 t mmhub_v1_8_gart_disable +ffffffff820a3760 t mmhub_v1_8_set_clockgating +ffffffff820a3790 t mmhub_v1_8_get_clockgating +ffffffff820a37c0 t mmhub_v1_8_setup_vm_pt_regs +ffffffff820a39f0 t mmhub_v1_8_query_ras_error_count +ffffffff820a3b80 t mmhub_v1_8_query_ras_error_status +ffffffff820a3e80 t mmhub_v1_8_reset_ras_error_count +ffffffff820a3fc0 t mmhub_v1_8_reset_ras_error_status +ffffffff820a5000 t mmhub_v2_0_init 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mmhub_v3_0_gart_enable +ffffffff820ac690 t mmhub_v3_0_set_fault_enable_default +ffffffff820ac7b0 t mmhub_v3_0_gart_disable +ffffffff820aca80 t mmhub_v3_0_set_clockgating +ffffffff820acc70 t mmhub_v3_0_get_clockgating +ffffffff820acd30 t mmhub_v3_0_setup_vm_pt_regs +ffffffff820ace80 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff820ad0d0 t mmhub_v3_0_get_invalidate_req +ffffffff820ae000 t mmhub_v3_0_1_get_fb_location +ffffffff820ae0a0 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff820ae140 t mmhub_v3_0_1_init +ffffffff820ae210 t mmhub_v3_0_1_gart_enable +ffffffff820af7a0 t mmhub_v3_0_1_set_fault_enable_default +ffffffff820af8a0 t mmhub_v3_0_1_gart_disable +ffffffff820afb80 t mmhub_v3_0_1_set_clockgating +ffffffff820afd70 t mmhub_v3_0_1_get_clockgating +ffffffff820afe30 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff820aff80 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff820b01d0 t mmhub_v3_0_1_get_invalidate_req +ffffffff820b1000 t mmhub_v3_0_2_get_fb_location +ffffffff820b10a0 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff820b1140 t mmhub_v3_0_2_init +ffffffff820b1210 t mmhub_v3_0_2_gart_enable +ffffffff820b2660 t mmhub_v3_0_2_set_fault_enable_default +ffffffff820b2780 t mmhub_v3_0_2_gart_disable +ffffffff820b2a50 t mmhub_v3_0_2_set_clockgating +ffffffff820b2a80 t mmhub_v3_0_2_get_clockgating +ffffffff820b2ab0 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff820b2c00 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff820b2e30 t mmhub_v3_0_2_get_invalidate_req +ffffffff820b3000 t mmhub_v9_4_query_ras_error_count +ffffffff820b3160 t mmhub_v9_4_query_ras_error_status +ffffffff820b3270 t mmhub_v9_4_reset_ras_error_count +ffffffff820b3340 t mmhub_v9_4_get_fb_location +ffffffff820b3470 t mmhub_v9_4_init +ffffffff820b35c0 t mmhub_v9_4_gart_enable +ffffffff820b4c60 t mmhub_v9_4_set_fault_enable_default +ffffffff820b4e70 t mmhub_v9_4_gart_disable +ffffffff820b5210 t mmhub_v9_4_set_clockgating +ffffffff820b5750 t mmhub_v9_4_get_clockgating +ffffffff820b5890 t mmhub_v9_4_setup_vm_pt_regs +ffffffff820b58e0 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff820b6000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff820b6050 T xgpu_ai_mailbox_add_irq_id +ffffffff820b6100 T xgpu_ai_mailbox_get_irq +ffffffff820b61d0 t xgpu_ai_mailbox_flr_work +ffffffff820b6470 T xgpu_ai_mailbox_put_irq +ffffffff820b64b0 t xgpu_ai_request_full_gpu_access +ffffffff820b64d0 t xgpu_ai_release_full_gpu_access +ffffffff820b64f0 t xgpu_ai_request_init_data +ffffffff820b6560 t xgpu_ai_request_reset +ffffffff820b6630 t xgpu_ai_mailbox_trans_msg +ffffffff820b68f0 t xgpu_ai_ras_poison_handler +ffffffff820b6920 t xgpu_ai_set_mailbox_ack_irq +ffffffff820b69c0 t xgpu_ai_mailbox_ack_irq +ffffffff820b6a20 t xgpu_ai_set_mailbox_rcv_irq +ffffffff820b6ac0 t xgpu_ai_mailbox_rcv_irq +ffffffff820b6bd0 t xgpu_ai_send_access_requests +ffffffff820b6cf0 t xgpu_ai_poll_msg +ffffffff820b7000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff820b7050 T xgpu_nv_mailbox_add_irq_id +ffffffff820b7100 T xgpu_nv_mailbox_get_irq +ffffffff820b71d0 t xgpu_nv_mailbox_flr_work +ffffffff820b7490 T xgpu_nv_mailbox_put_irq +ffffffff820b74d0 t xgpu_nv_request_full_gpu_access +ffffffff820b74f0 t xgpu_nv_release_full_gpu_access +ffffffff820b7510 t xgpu_nv_request_init_data +ffffffff820b7530 t xgpu_nv_request_reset +ffffffff820b7690 t xgpu_nv_mailbox_trans_msg +ffffffff820b78c0 t xgpu_nv_ras_poison_handler +ffffffff820b78e0 t xgpu_nv_set_mailbox_ack_irq +ffffffff820b7970 t xgpu_nv_mailbox_ack_irq +ffffffff820b79d0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff820b7a60 t xgpu_nv_mailbox_rcv_irq +ffffffff820b7b30 t xgpu_nv_send_access_requests +ffffffff820b8000 T xgpu_vi_init_golden_registers +ffffffff820b80f0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff820b8140 T xgpu_vi_mailbox_add_irq_id +ffffffff820b81f0 T xgpu_vi_mailbox_get_irq +ffffffff820b82c0 t xgpu_vi_mailbox_flr_work +ffffffff820b8460 T xgpu_vi_mailbox_put_irq +ffffffff820b84a0 t xgpu_vi_request_full_gpu_access +ffffffff820b84c0 t xgpu_vi_release_full_gpu_access +ffffffff820b84e0 t xgpu_vi_request_reset +ffffffff820b8500 t xgpu_vi_wait_reset_cmpl +ffffffff820b8640 t xgpu_vi_set_mailbox_ack_irq +ffffffff820b86d0 t xgpu_vi_mailbox_ack_irq +ffffffff820b8730 t xgpu_vi_set_mailbox_rcv_irq +ffffffff820b87c0 t xgpu_vi_mailbox_rcv_irq +ffffffff820b8890 t xgpu_vi_mailbox_rcv_msg +ffffffff820b89f0 t xgpu_vi_send_access_requests +ffffffff820b9000 t navi10_ih_early_init +ffffffff820b9060 t navi10_ih_sw_init +ffffffff820b91f0 t navi10_ih_sw_fini +ffffffff820b9230 t navi10_ih_hw_init +ffffffff820b9710 t navi10_ih_hw_fini +ffffffff820b9780 t navi10_ih_suspend +ffffffff820b97f0 t navi10_ih_resume +ffffffff820b9800 t navi10_ih_is_idle +ffffffff820b9830 t navi10_ih_wait_for_idle +ffffffff820b9860 t navi10_ih_soft_reset +ffffffff820b9890 t navi10_ih_set_clockgating_state +ffffffff820b99d0 t navi10_ih_set_powergating_state +ffffffff820b9a00 t navi10_ih_get_clockgating_state +ffffffff820b9aa0 t navi10_ih_get_wptr +ffffffff820b9c00 t navi10_ih_set_rptr +ffffffff820b9cf0 t navi10_ih_self_irq +ffffffff820b9d70 t navi10_ih_toggle_interrupts +ffffffff820b9f00 t force_update_wptr_for_self_int +ffffffff820bb000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff820bb040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff820bb080 t nbio_v2_3_get_pcie_index_offset +ffffffff820bb0c0 t nbio_v2_3_get_pcie_data_offset +ffffffff820bb100 t nbio_v2_3_get_rev_id +ffffffff820bb160 t nbio_v2_3_mc_access_enable +ffffffff820bb210 t nbio_v2_3_get_memsize +ffffffff820bb280 t nbio_v2_3_sdma_doorbell_range +ffffffff820bb330 t nbio_v2_3_vcn_doorbell_range +ffffffff820bb3c0 t nbio_v2_3_enable_doorbell_aperture +ffffffff820bb4d0 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff820bb650 t nbio_v2_3_ih_doorbell_range +ffffffff820bb780 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff820bb830 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff820bb8e0 t nbio_v2_3_get_clockgating_state +ffffffff820bb970 t nbio_v2_3_ih_control +ffffffff820bbae0 t nbio_v2_3_init_registers +ffffffff820bbb80 t nbio_v2_3_remap_hdp_registers +ffffffff820bbca0 t nbio_v2_3_enable_aspm +ffffffff820bbd40 t nbio_v2_3_program_aspm +ffffffff820bc4c0 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff820bc560 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff820bc5e0 t nbio_v2_3_clear_doorbell_interrupt +ffffffff820bd000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff820bd040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff820bd080 t nbio_v4_3_get_pcie_index_offset +ffffffff820bd0b0 t nbio_v4_3_get_pcie_data_offset +ffffffff820bd0f0 t nbio_v4_3_get_rev_id +ffffffff820bd190 t nbio_v4_3_mc_access_enable +ffffffff820bd240 t nbio_v4_3_get_memsize +ffffffff820bd2b0 t nbio_v4_3_sdma_doorbell_range +ffffffff820bd430 t nbio_v4_3_vcn_doorbell_range +ffffffff820bd5f0 t nbio_v4_3_gc_doorbell_init +ffffffff820bd700 t nbio_v4_3_enable_doorbell_aperture +ffffffff820bd810 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff820bd990 t nbio_v4_3_ih_doorbell_range +ffffffff820bdac0 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff820bdc10 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff820bdd50 t nbio_v4_3_get_clockgating_state +ffffffff820bde90 t nbio_v4_3_ih_control +ffffffff820be000 t nbio_v4_3_init_registers +ffffffff820be140 t nbio_v4_3_remap_hdp_registers +ffffffff820be260 t nbio_v4_3_program_aspm +ffffffff820bf090 t nbio_v4_3_get_rom_offset +ffffffff820bf130 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff820bf160 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff820bf190 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff820bf1c0 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff820bf1f0 t nbio_v4_3_handle_ras_err_event_athub_intr_no_bifring +ffffffff820bf330 t nbio_v4_3_init_ras_err_event_athub_interrupt +ffffffff820bf370 t nbio_v4_3_set_ras_err_event_athub_irq_state +ffffffff820bf490 t nbio_v4_3_process_err_event_athub_irq +ffffffff820c0000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff820c0040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff820c0080 t nbio_v6_1_get_pcie_index_offset +ffffffff820c00c0 t nbio_v6_1_get_pcie_data_offset +ffffffff820c0100 t nbio_v6_1_get_rev_id +ffffffff820c01a0 t nbio_v6_1_mc_access_enable +ffffffff820c0250 t nbio_v6_1_get_memsize +ffffffff820c02c0 t nbio_v6_1_sdma_doorbell_range +ffffffff820c0360 t nbio_v6_1_enable_doorbell_aperture +ffffffff820c0470 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff820c05f0 t nbio_v6_1_ih_doorbell_range +ffffffff820c0720 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff820c07d0 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff820c0880 t nbio_v6_1_get_clockgating_state +ffffffff820c0910 t nbio_v6_1_ih_control +ffffffff820c0a80 t nbio_v6_1_init_registers +ffffffff820c0b60 t nbio_v6_1_remap_hdp_registers +ffffffff820c0c80 t nbio_v6_1_program_aspm +ffffffff820c2000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff820c2040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff820c2080 t nbio_v7_0_get_pcie_index_offset +ffffffff820c20c0 t nbio_v7_0_get_pcie_data_offset +ffffffff820c2100 t nbio_v7_0_get_rev_id +ffffffff820c21a0 t nbio_v7_0_mc_access_enable +ffffffff820c2250 t nbio_v7_0_get_memsize +ffffffff820c22c0 t nbio_v7_0_sdma_doorbell_range +ffffffff820c2360 t nbio_v7_0_vcn_doorbell_range +ffffffff820c23e0 t nbio_v7_0_enable_doorbell_aperture +ffffffff820c24f0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff820c2520 t nbio_v7_0_ih_doorbell_range +ffffffff820c2650 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff820c2790 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff820c2840 t nbio_v7_0_get_clockgating_state +ffffffff820c28d0 t nbio_v7_0_ih_control +ffffffff820c2a40 t nbio_v7_0_init_registers +ffffffff820c2a90 t nbio_v7_0_remap_hdp_registers +ffffffff820c2bb0 t nbio_7_0_read_syshub_ind_mmr +ffffffff820c2c90 t nbio_7_0_write_syshub_ind_mmr +ffffffff820c3000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff820c3040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff820c3080 t nbio_v7_2_get_pcie_index_offset +ffffffff820c30c0 t nbio_v7_2_get_pcie_data_offset +ffffffff820c3100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff820c3130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff820c3170 t nbio_v7_2_get_rev_id +ffffffff820c3260 t nbio_v7_2_mc_access_enable +ffffffff820c33a0 t nbio_v7_2_get_memsize +ffffffff820c3410 t nbio_v7_2_sdma_doorbell_range +ffffffff820c34b0 t nbio_v7_2_vcn_doorbell_range +ffffffff820c3540 t nbio_v7_2_enable_doorbell_aperture +ffffffff820c3630 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff820c37b0 t nbio_v7_2_ih_doorbell_range +ffffffff820c3840 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff820c3900 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff820c3ab0 t nbio_v7_2_get_clockgating_state +ffffffff820c3b50 t nbio_v7_2_ih_control +ffffffff820c3cc0 t nbio_v7_2_init_registers +ffffffff820c3ea0 t nbio_v7_2_remap_hdp_registers +ffffffff820c4000 t nbio_v7_4_query_ras_error_count +ffffffff820c41d0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff820c4480 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff820c4650 t nbio_v7_4_init_ras_controller_interrupt +ffffffff820c4690 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff820c46d0 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff820c4710 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff820c4750 t nbio_v7_4_get_pcie_index_offset +ffffffff820c4790 t nbio_v7_4_get_pcie_data_offset +ffffffff820c47d0 t nbio_v7_4_get_rev_id +ffffffff820c48b0 t nbio_v7_4_mc_access_enable +ffffffff820c4960 t nbio_v7_4_get_memsize +ffffffff820c49d0 t nbio_v7_4_sdma_doorbell_range +ffffffff820c4aa0 t nbio_v7_4_vcn_doorbell_range +ffffffff820c4b50 t nbio_v7_4_enable_doorbell_aperture +ffffffff820c4c60 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff820c4de0 t nbio_v7_4_ih_doorbell_range +ffffffff820c4f10 t nbio_v7_4_enable_doorbell_interrupt +ffffffff820c5070 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff820c50a0 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff820c5150 t nbio_v7_4_get_clockgating_state +ffffffff820c51e0 t nbio_v7_4_ih_control +ffffffff820c5350 t nbio_v7_4_init_registers +ffffffff820c5450 t nbio_v7_4_remap_hdp_registers +ffffffff820c5570 t nbio_v7_4_program_aspm +ffffffff820c5a20 t nbio_v7_4_set_ras_controller_irq_state +ffffffff820c5bd0 t nbio_v7_4_process_ras_controller_irq +ffffffff820c5c00 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff820c5db0 t nbio_v7_4_process_err_event_athub_irq +ffffffff820c6000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff820c6040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff820c6080 t nbio_v7_7_get_pcie_index_offset +ffffffff820c60c0 t nbio_v7_7_get_pcie_data_offset +ffffffff820c6100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff820c6130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff820c6170 t nbio_v7_7_get_rev_id +ffffffff820c6210 t nbio_v7_7_mc_access_enable +ffffffff820c62c0 t nbio_v7_7_get_memsize +ffffffff820c6330 t nbio_v7_7_sdma_doorbell_range +ffffffff820c63d0 t nbio_v7_7_vcn_doorbell_range +ffffffff820c6460 t nbio_v7_7_enable_doorbell_aperture +ffffffff820c6550 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff820c66d0 t nbio_v7_7_ih_doorbell_range +ffffffff820c6800 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff820c6950 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff820c6b80 t nbio_v7_7_get_clockgating_state +ffffffff820c6cc0 t nbio_v7_7_ih_control +ffffffff820c6e30 t nbio_v7_7_init_registers +ffffffff820c7040 t nbio_v7_7_remap_hdp_registers +ffffffff820c8000 t nbio_v7_9_get_hdp_flush_req_offset +ffffffff820c8040 t nbio_v7_9_get_hdp_flush_done_offset +ffffffff820c8080 t nbio_v7_9_get_pcie_index_offset +ffffffff820c80c0 t nbio_v7_9_get_pcie_data_offset +ffffffff820c8100 t nbio_v7_9_get_pcie_index_hi_offset +ffffffff820c8140 t nbio_v7_9_get_rev_id +ffffffff820c81e0 t nbio_v7_9_mc_access_enable +ffffffff820c8290 t nbio_v7_9_get_memsize +ffffffff820c8300 t nbio_v7_9_sdma_doorbell_range +ffffffff820c8680 t nbio_v7_9_vcn_doorbell_range +ffffffff820c8840 t nbio_v7_9_enable_doorbell_aperture +ffffffff820c89d0 t nbio_v7_9_enable_doorbell_selfring_aperture +ffffffff820c8b50 t nbio_v7_9_ih_doorbell_range +ffffffff820c8c70 t nbio_v7_9_enable_doorbell_interrupt +ffffffff820c8d90 t nbio_v7_9_update_medium_grain_clock_gating +ffffffff820c8dc0 t nbio_v7_9_update_medium_grain_light_sleep +ffffffff820c8df0 t nbio_v7_9_get_clockgating_state +ffffffff820c8e20 t nbio_v7_9_ih_control +ffffffff820c8f90 t nbio_v7_9_init_registers +ffffffff820c9320 t nbio_v7_9_remap_hdp_registers +ffffffff820c9440 t nbio_v7_9_get_compute_partition_mode +ffffffff820c94e0 t nbio_v7_9_get_memory_partition_mode +ffffffff820c95e0 t nbio_v7_9_get_pcie_replay_count +ffffffff820c9640 t nbio_v7_9_get_pcie_usage +ffffffff820c9800 t nbio_v7_9_query_ras_error_count +ffffffff820c9830 t nbio_v7_9_handle_ras_controller_intr_no_bifring +ffffffff820c9980 t nbio_v7_9_handle_ras_err_event_athub_intr_no_bifring +ffffffff820c9ac0 t nbio_v7_9_init_ras_controller_interrupt +ffffffff820c9b00 t nbio_v7_9_init_ras_err_event_athub_interrupt +ffffffff820c9b40 t nbio_v7_9_set_ras_controller_irq_state +ffffffff820c9b70 t nbio_v7_9_process_ras_controller_irq +ffffffff820c9ba0 t nbio_v7_9_set_ras_err_event_athub_irq_state +ffffffff820c9bd0 t nbio_v7_9_process_err_event_athub_irq +ffffffff820ca000 T nv_grbm_select +ffffffff820ca0a0 T nv_set_virt_ops +ffffffff820ca0e0 t nv_common_early_init +ffffffff820ca4e0 t nv_common_late_init +ffffffff820ca5a0 t nv_common_sw_init +ffffffff820ca5f0 t nv_common_sw_fini +ffffffff820ca620 t nv_common_hw_init +ffffffff820ca750 t nv_common_hw_fini +ffffffff820ca7c0 t nv_common_suspend +ffffffff820ca830 t nv_common_resume +ffffffff820ca870 t nv_common_is_idle +ffffffff820ca8a0 t nv_common_wait_for_idle +ffffffff820ca8d0 t nv_common_soft_reset +ffffffff820ca900 t nv_common_set_clockgating_state +ffffffff820ca9f0 t nv_common_set_powergating_state +ffffffff820caa20 t nv_common_get_clockgating_state +ffffffff820caaa0 t nv_didt_rreg +ffffffff820cab60 t nv_didt_wreg +ffffffff820cac00 t nv_read_disabled_bios +ffffffff820cac30 t nv_read_register +ffffffff820cad30 t nv_asic_reset +ffffffff820caec0 t nv_asic_reset_method +ffffffff820cafc0 t nv_get_xclk +ffffffff820caff0 t nv_set_uvd_clocks +ffffffff820cb020 t nv_set_vce_clocks +ffffffff820cb050 t nv_get_config_memsize +ffffffff820cb070 t nv_need_full_reset +ffffffff820cb0a0 t nv_init_doorbell_index +ffffffff820cb1d0 t nv_need_reset_on_init +ffffffff820cb280 t nv_pre_asic_init +ffffffff820cb2b0 t nv_update_umd_stable_pstate +ffffffff820cb380 t nv_query_video_codecs +ffffffff820cc000 T psp_v10_0_set_psp_funcs +ffffffff820cc030 t psp_v10_0_init_microcode +ffffffff820cc120 t psp_v10_0_ring_create +ffffffff820cc510 t psp_v10_0_ring_stop +ffffffff820cc7c0 t psp_v10_0_ring_destroy +ffffffff820cc850 t psp_v10_0_mode1_reset +ffffffff820cc8a0 t psp_v10_0_ring_get_wptr +ffffffff820cc900 t psp_v10_0_ring_set_wptr +ffffffff820cd000 T psp_v11_0_set_psp_funcs +ffffffff820cd030 t psp_v11_0_init_microcode +ffffffff820cd1e0 t psp_v11_0_bootloader_load_kdb +ffffffff820cd200 t psp_v11_0_bootloader_load_spl +ffffffff820cd220 t psp_v11_0_bootloader_load_sysdrv +ffffffff820cd240 t psp_v11_0_bootloader_load_sos +ffffffff820cd690 t psp_v11_0_ring_create +ffffffff820cdf10 t psp_v11_0_ring_stop +ffffffff820ce1f0 t psp_v11_0_ring_destroy +ffffffff820ce280 t psp_v11_0_mode1_reset +ffffffff820ce3b0 t psp_v11_0_memory_training +ffffffff820ce940 t psp_v11_0_ring_get_wptr +ffffffff820ce990 t psp_v11_0_ring_set_wptr +ffffffff820ceaf0 t psp_v11_0_load_usbc_pd_fw +ffffffff820ced20 t psp_v11_0_read_usbc_pd_fw +ffffffff820cee60 t psp_v11_0_bootloader_load_component +ffffffff820cf050 t psp_v11_0_wait_for_bootloader +ffffffff820cf270 t psp_v11_0_memory_training_send_msg +ffffffff820d0000 T psp_v11_0_8_set_psp_funcs +ffffffff820d0030 t psp_v11_0_8_ring_create +ffffffff820d08b0 t psp_v11_0_8_ring_stop +ffffffff820d0db0 t psp_v11_0_8_ring_destroy +ffffffff820d0e40 t psp_v11_0_8_ring_get_wptr +ffffffff820d0eb0 t psp_v11_0_8_ring_set_wptr +ffffffff820d1000 T psp_v12_0_set_psp_funcs +ffffffff820d1030 t psp_v12_0_init_microcode +ffffffff820d1100 t psp_v12_0_bootloader_load_sysdrv +ffffffff820d1520 t psp_v12_0_bootloader_load_sos +ffffffff820d1990 t psp_v12_0_ring_create +ffffffff820d2670 t psp_v12_0_ring_stop +ffffffff820d2950 t psp_v12_0_ring_destroy +ffffffff820d29e0 t psp_v12_0_mode1_reset +ffffffff820d2b10 t psp_v12_0_ring_get_wptr +ffffffff820d2b80 t psp_v12_0_ring_set_wptr +ffffffff820d3000 T psp_v13_0_set_psp_funcs +ffffffff820d3030 t psp_v13_0_init_microcode +ffffffff820d3160 t psp_v13_0_wait_for_bootloader_steady_state +ffffffff820d3290 t psp_v13_0_bootloader_load_kdb +ffffffff820d32b0 t psp_v13_0_bootloader_load_spl +ffffffff820d32d0 t psp_v13_0_bootloader_load_sysdrv +ffffffff820d32f0 t psp_v13_0_bootloader_load_soc_drv +ffffffff820d3310 t psp_v13_0_bootloader_load_intf_drv +ffffffff820d3330 t psp_v13_0_bootloader_load_dbg_drv +ffffffff820d3350 t psp_v13_0_bootloader_load_ras_drv +ffffffff820d3370 t psp_v13_0_bootloader_load_sos +ffffffff820d3830 t psp_v13_0_ring_create +ffffffff820d40b0 t psp_v13_0_ring_stop +ffffffff820d45b0 t psp_v13_0_ring_destroy +ffffffff820d4640 t psp_v13_0_memory_training +ffffffff820d4b20 t psp_v13_0_ring_get_wptr +ffffffff820d4b90 t psp_v13_0_ring_set_wptr +ffffffff820d4ca0 t psp_v13_0_load_usbc_pd_fw +ffffffff820d4ed0 t psp_v13_0_read_usbc_pd_fw +ffffffff820d5010 t psp_v13_0_update_spirom +ffffffff820d5230 t psp_v13_0_vbflash_status +ffffffff820d5290 t psp_v13_0_fatal_error_recovery_quirk +ffffffff820d53f0 t psp_v13_0_bootloader_load_component +ffffffff820d56b0 t psp_v13_0_memory_training_send_msg +ffffffff820d5830 t psp_v13_0_exec_spi_cmd +ffffffff820d6000 T psp_v13_0_4_set_psp_funcs +ffffffff820d6030 t psp_v13_0_4_init_microcode +ffffffff820d60f0 t psp_v13_0_4_bootloader_load_kdb +ffffffff820d6110 t psp_v13_0_4_bootloader_load_spl +ffffffff820d6130 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff820d6150 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff820d6170 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff820d6190 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff820d61b0 t psp_v13_0_4_bootloader_load_sos +ffffffff820d6620 t psp_v13_0_4_ring_create +ffffffff820d6eb0 t psp_v13_0_4_ring_stop +ffffffff820d73c0 t psp_v13_0_4_ring_destroy +ffffffff820d7450 t psp_v13_0_4_ring_get_wptr +ffffffff820d74c0 t psp_v13_0_4_ring_set_wptr +ffffffff820d75e0 t psp_v13_0_4_bootloader_load_component +ffffffff820d77f0 t psp_v13_0_4_wait_for_bootloader +ffffffff820d8000 T psp_v3_1_set_psp_funcs +ffffffff820d8030 t psp_v3_1_init_microcode +ffffffff820d80f0 t psp_v3_1_bootloader_load_sysdrv +ffffffff820d8510 t psp_v3_1_bootloader_load_sos +ffffffff820d8980 t psp_v3_1_ring_create +ffffffff820d9840 t psp_v3_1_ring_stop +ffffffff820d9b20 t psp_v3_1_ring_destroy +ffffffff820d9bb0 t psp_v3_1_smu_reload_quirk +ffffffff820d9c00 t psp_v3_1_mode1_reset +ffffffff820d9d30 t psp_v3_1_ring_get_wptr +ffffffff820d9d80 t psp_v3_1_ring_set_wptr +ffffffff820da000 t sdma_v2_4_early_init +ffffffff820da0f0 t sdma_v2_4_sw_init +ffffffff820da520 t sdma_v2_4_sw_fini +ffffffff820da5f0 t sdma_v2_4_hw_init +ffffffff820daaa0 t sdma_v2_4_hw_fini +ffffffff820daaf0 t sdma_v2_4_suspend +ffffffff820dab40 t sdma_v2_4_resume +ffffffff820dab50 t sdma_v2_4_is_idle +ffffffff820daba0 t sdma_v2_4_wait_for_idle +ffffffff820dac50 t sdma_v2_4_soft_reset +ffffffff820dae00 t sdma_v2_4_set_clockgating_state +ffffffff820dae30 t sdma_v2_4_set_powergating_state +ffffffff820dae60 t sdma_v2_4_ring_get_rptr +ffffffff820daea0 t sdma_v2_4_ring_get_wptr +ffffffff820daf00 t sdma_v2_4_ring_set_wptr +ffffffff820daf40 t sdma_v2_4_ring_emit_ib +ffffffff820db220 t sdma_v2_4_ring_emit_fence +ffffffff820db670 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff820db920 t sdma_v2_4_ring_emit_vm_flush +ffffffff820dbbd0 t sdma_v2_4_ring_emit_hdp_flush +ffffffff820dbe80 t sdma_v2_4_ring_test_ring +ffffffff820dc1b0 t sdma_v2_4_ring_test_ib +ffffffff820dc3c0 t sdma_v2_4_ring_insert_nop +ffffffff820dc500 t sdma_v2_4_ring_pad_ib +ffffffff820dc630 t sdma_v2_4_ring_emit_wreg +ffffffff820dc790 t sdma_v2_4_emit_copy_buffer +ffffffff820dc850 t sdma_v2_4_emit_fill_buffer +ffffffff820dc8e0 t sdma_v2_4_vm_copy_pte +ffffffff820dc9a0 t sdma_v2_4_vm_write_pte +ffffffff820dca70 t sdma_v2_4_vm_set_pte_pde +ffffffff820dcb70 t sdma_v2_4_set_trap_irq_state +ffffffff820dcc60 t sdma_v2_4_process_trap_irq +ffffffff820dcd00 t sdma_v2_4_process_illegal_inst_irq +ffffffff820dcd80 t sdma_v2_4_enable +ffffffff820dd000 t sdma_v3_0_early_init +ffffffff820dd100 t sdma_v3_0_sw_init +ffffffff820dd530 t sdma_v3_0_sw_fini +ffffffff820dd600 t sdma_v3_0_hw_init +ffffffff820dd770 t sdma_v3_0_hw_fini +ffffffff820dd7d0 t sdma_v3_0_suspend +ffffffff820dd830 t sdma_v3_0_resume +ffffffff820dd840 t sdma_v3_0_is_idle +ffffffff820dd890 t sdma_v3_0_wait_for_idle +ffffffff820dd940 t sdma_v3_0_check_soft_reset +ffffffff820dd9a0 t sdma_v3_0_pre_soft_reset +ffffffff820dda00 t sdma_v3_0_soft_reset +ffffffff820ddb00 t sdma_v3_0_post_soft_reset +ffffffff820ddb50 t sdma_v3_0_set_clockgating_state +ffffffff820dde00 t sdma_v3_0_set_powergating_state +ffffffff820dde30 t sdma_v3_0_get_clockgating_state +ffffffff820dded0 t sdma_v3_0_ring_get_rptr +ffffffff820ddf10 t sdma_v3_0_ring_get_wptr +ffffffff820ddf90 t sdma_v3_0_ring_set_wptr +ffffffff820de040 t sdma_v3_0_ring_emit_ib +ffffffff820de320 t sdma_v3_0_ring_emit_fence +ffffffff820de770 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff820dea20 t sdma_v3_0_ring_emit_vm_flush +ffffffff820decd0 t sdma_v3_0_ring_emit_hdp_flush +ffffffff820def80 t sdma_v3_0_ring_test_ring +ffffffff820df2b0 t sdma_v3_0_ring_test_ib +ffffffff820df4c0 t sdma_v3_0_ring_insert_nop +ffffffff820df600 t sdma_v3_0_ring_pad_ib +ffffffff820df730 t sdma_v3_0_ring_emit_wreg +ffffffff820df890 t sdma_v3_0_emit_copy_buffer +ffffffff820df950 t sdma_v3_0_emit_fill_buffer +ffffffff820df9e0 t sdma_v3_0_vm_copy_pte +ffffffff820dfaa0 t sdma_v3_0_vm_write_pte +ffffffff820dfb70 t sdma_v3_0_vm_set_pte_pde +ffffffff820dfc70 t sdma_v3_0_set_trap_irq_state +ffffffff820dfd60 t sdma_v3_0_process_trap_irq +ffffffff820dfe00 t sdma_v3_0_process_illegal_inst_irq +ffffffff820dfe80 t sdma_v3_0_ctx_switch_enable +ffffffff820e0050 t sdma_v3_0_enable +ffffffff820e0200 t sdma_v3_0_gfx_resume +ffffffff820e1000 t sdma_v4_0_early_init +ffffffff820e12f0 t sdma_v4_0_late_init +ffffffff820e15b0 t sdma_v4_0_sw_init +ffffffff820e1a60 t sdma_v4_0_sw_fini +ffffffff820e1b30 t sdma_v4_0_hw_init +ffffffff820e4cf0 t sdma_v4_0_hw_fini +ffffffff820e4df0 t sdma_v4_0_suspend +ffffffff820e4e50 t sdma_v4_0_resume +ffffffff820e4ee0 t sdma_v4_0_is_idle +ffffffff820e5010 t sdma_v4_0_wait_for_idle +ffffffff820e51c0 t sdma_v4_0_soft_reset +ffffffff820e51f0 t sdma_v4_0_set_clockgating_state +ffffffff820e5720 t sdma_v4_0_set_powergating_state +ffffffff820e5800 t sdma_v4_0_get_clockgating_state +ffffffff820e58b0 t sdma_v4_0_query_ras_error_count +ffffffff820e5aa0 t sdma_v4_0_reset_ras_error_count +ffffffff820e5c20 t sdma_v4_0_ring_get_rptr +ffffffff820e5c80 t sdma_v4_0_ring_get_wptr +ffffffff820e5e90 t sdma_v4_0_ring_set_wptr +ffffffff820e6140 t sdma_v4_0_ring_emit_ib +ffffffff820e6420 t sdma_v4_0_ring_emit_fence +ffffffff820e6890 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff820e68f0 t sdma_v4_0_ring_emit_vm_flush +ffffffff820e6910 t sdma_v4_0_ring_emit_hdp_flush +ffffffff820e69d0 t sdma_v4_0_ring_test_ring +ffffffff820e6d00 t sdma_v4_0_ring_test_ib +ffffffff820e6f10 t sdma_v4_0_ring_insert_nop +ffffffff820e7050 t sdma_v4_0_ring_pad_ib +ffffffff820e7180 t sdma_v4_0_ring_emit_wreg +ffffffff820e72e0 t sdma_v4_0_ring_emit_reg_wait +ffffffff820e7330 t sdma_v4_0_wait_reg_mem +ffffffff820e7680 t sdma_v4_0_page_ring_get_wptr +ffffffff820e7840 t sdma_v4_0_page_ring_set_wptr +ffffffff820e7a10 t sdma_v4_0_emit_copy_buffer +ffffffff820e7ad0 t sdma_v4_0_emit_fill_buffer +ffffffff820e7b60 t sdma_v4_0_vm_copy_pte +ffffffff820e7c20 t sdma_v4_0_vm_write_pte +ffffffff820e7cf0 t sdma_v4_0_vm_set_pte_pde +ffffffff820e7df0 t sdma_v4_0_set_trap_irq_state +ffffffff820e7fa0 t sdma_v4_0_process_trap_irq +ffffffff820e8100 t sdma_v4_0_process_illegal_inst_irq +ffffffff820e8220 t sdma_v4_0_set_ecc_irq_state +ffffffff820e83d0 t sdma_v4_0_process_vm_hole_irq +ffffffff820e8420 t sdma_v4_0_print_iv_entry +ffffffff820e8570 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff820e85c0 t sdma_v4_0_process_pool_timeout_irq +ffffffff820e8610 t sdma_v4_0_process_srbm_write_irq +ffffffff820e8660 t sdma_v4_0_process_ras_data_cb +ffffffff820e86e0 t sdma_v4_0_ctx_switch_enable +ffffffff820e8e00 t sdma_v4_0_enable +ffffffff820e93f0 t sdma_v4_0_gfx_enable +ffffffff820ea000 t sdma_v4_4_query_ras_error_count +ffffffff820ea2b0 t sdma_v4_4_reset_ras_error_count +ffffffff820eb000 t sdma_v4_4_2_early_init +ffffffff820eb2b0 t sdma_v4_4_2_late_init +ffffffff820eb340 t sdma_v4_4_2_sw_init +ffffffff820eb920 t sdma_v4_4_2_sw_fini +ffffffff820eb9f0 t sdma_v4_4_2_hw_init +ffffffff820eba40 t sdma_v4_4_2_hw_fini +ffffffff820ebb20 t sdma_v4_4_2_suspend +ffffffff820ebc30 t sdma_v4_4_2_resume +ffffffff820ebc80 t sdma_v4_4_2_is_idle +ffffffff820ebd30 t sdma_v4_4_2_wait_for_idle +ffffffff820ebe60 t sdma_v4_4_2_soft_reset +ffffffff820ebe90 t sdma_v4_4_2_set_clockgating_state +ffffffff820ec350 t sdma_v4_4_2_set_powergating_state +ffffffff820ec380 t sdma_v4_4_2_get_clockgating_state +ffffffff820ec480 t sdma_v4_4_2_xcp_suspend +ffffffff820ec570 t sdma_v4_4_2_xcp_resume +ffffffff820ec5b0 t sdma_v4_4_2_ring_get_rptr +ffffffff820ec630 t sdma_v4_4_2_ring_get_wptr +ffffffff820ec790 t sdma_v4_4_2_ring_set_wptr +ffffffff820ec990 t sdma_v4_4_2_ring_emit_ib +ffffffff820ecc70 t sdma_v4_4_2_ring_emit_fence +ffffffff820ed0e0 t sdma_v4_4_2_ring_emit_pipeline_sync +ffffffff820ed140 t sdma_v4_4_2_ring_emit_vm_flush +ffffffff820ed160 t sdma_v4_4_2_ring_emit_hdp_flush +ffffffff820ed230 t sdma_v4_4_2_ring_test_ring +ffffffff820ed560 t sdma_v4_4_2_ring_test_ib +ffffffff820ed770 t sdma_v4_4_2_ring_insert_nop +ffffffff820ed8b0 t sdma_v4_4_2_ring_pad_ib +ffffffff820ed9e0 t sdma_v4_4_2_ring_emit_wreg +ffffffff820edb40 t sdma_v4_4_2_ring_emit_reg_wait +ffffffff820edb90 t sdma_v4_4_2_wait_reg_mem +ffffffff820edee0 t sdma_v4_4_2_page_ring_get_wptr +ffffffff820ee000 t sdma_v4_4_2_page_ring_set_wptr +ffffffff820ee130 t sdma_v4_4_2_emit_copy_buffer +ffffffff820ee1f0 t sdma_v4_4_2_emit_fill_buffer +ffffffff820ee280 t sdma_v4_4_2_vm_copy_pte +ffffffff820ee340 t sdma_v4_4_2_vm_write_pte +ffffffff820ee410 t sdma_v4_4_2_vm_set_pte_pde +ffffffff820ee510 t sdma_v4_4_2_set_trap_irq_state +ffffffff820ee610 t sdma_v4_4_2_process_trap_irq +ffffffff820ee740 t sdma_v4_4_2_process_illegal_inst_irq +ffffffff820ee7e0 t sdma_v4_4_2_set_ecc_irq_state +ffffffff820ee8f0 t sdma_v4_4_2_process_vm_hole_irq +ffffffff820ee9e0 t sdma_v4_4_2_process_doorbell_invalid_irq +ffffffff820eead0 t sdma_v4_4_2_process_pool_timeout_irq +ffffffff820eebc0 t sdma_v4_4_2_process_srbm_write_irq +ffffffff820eecb0 t sdma_v4_4_2_query_ras_error_count +ffffffff820eee30 t sdma_v4_4_2_reset_ras_error_count +ffffffff820eefa0 t sdma_v4_4_2_inst_init_golden_registers +ffffffff820ef170 t sdma_v4_4_2_inst_start +ffffffff820f09a0 t sdma_v4_4_2_inst_ctx_switch_enable +ffffffff820f0cf0 t sdma_v4_4_2_inst_enable +ffffffff820f2000 t sdma_v5_0_early_init +ffffffff820f2130 t sdma_v5_0_sw_init +ffffffff820f2350 t sdma_v5_0_sw_fini +ffffffff820f23f0 t sdma_v5_0_hw_init +ffffffff820f38c0 t sdma_v5_0_hw_fini +ffffffff820f3930 t sdma_v5_0_suspend +ffffffff820f39a0 t sdma_v5_0_resume +ffffffff820f39b0 t sdma_v5_0_is_idle +ffffffff820f3a50 t sdma_v5_0_wait_for_idle +ffffffff820f3b30 t sdma_v5_0_soft_reset +ffffffff820f3b60 t sdma_v5_0_set_clockgating_state +ffffffff820f3d80 t sdma_v5_0_set_powergating_state +ffffffff820f3db0 t sdma_v5_0_get_clockgating_state +ffffffff820f3e60 t sdma_v5_0_ring_get_rptr +ffffffff820f3ec0 t sdma_v5_0_ring_get_wptr +ffffffff820f4080 t sdma_v5_0_ring_set_wptr +ffffffff820f4430 t sdma_v5_0_ring_emit_ib +ffffffff820f4730 t sdma_v5_0_ring_emit_fence +ffffffff820f4be0 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff820f4e90 t sdma_v5_0_ring_emit_vm_flush +ffffffff820f4eb0 t sdma_v5_0_ring_emit_hdp_flush +ffffffff820f5180 t sdma_v5_0_ring_test_ring +ffffffff820f55b0 t sdma_v5_0_ring_test_ib +ffffffff820f5940 t sdma_v5_0_ring_insert_nop +ffffffff820f5a80 t sdma_v5_0_ring_pad_ib +ffffffff820f5bb0 t sdma_v5_0_ring_init_cond_exec +ffffffff820f5e00 t sdma_v5_0_ring_patch_cond_exec +ffffffff820f5ec0 t sdma_v5_0_ring_emit_wreg +ffffffff820f6020 t sdma_v5_0_ring_emit_reg_wait +ffffffff820f62c0 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff820f6350 t sdma_v5_0_ring_preempt_ib +ffffffff820f64e0 t sdma_v5_0_ring_emit_mem_sync +ffffffff820f6710 t sdma_v5_0_emit_copy_buffer +ffffffff820f67d0 t sdma_v5_0_emit_fill_buffer +ffffffff820f6860 t sdma_v5_0_vm_copy_pte +ffffffff820f6920 t sdma_v5_0_vm_write_pte +ffffffff820f69f0 t sdma_v5_0_vm_set_pte_pde +ffffffff820f6af0 t sdma_v5_0_set_trap_irq_state +ffffffff820f6b90 t sdma_v5_0_process_trap_irq +ffffffff820f6cd0 t sdma_v5_0_process_illegal_inst_irq +ffffffff820f6d00 t sdma_v5_0_mqd_init +ffffffff820f6df0 t sdma_v5_0_ctx_switch_enable +ffffffff820f7170 t sdma_v5_0_enable +ffffffff820f8000 t sdma_v5_2_early_init +ffffffff820f8130 t sdma_v5_2_sw_init +ffffffff820f83f0 t sdma_v5_2_sw_fini +ffffffff820f8490 t sdma_v5_2_hw_init +ffffffff820fa2c0 t sdma_v5_2_hw_fini +ffffffff820fa330 t sdma_v5_2_suspend +ffffffff820fa3a0 t sdma_v5_2_resume +ffffffff820fa3b0 t sdma_v5_2_is_idle +ffffffff820fa470 t sdma_v5_2_wait_for_idle +ffffffff820fa5a0 t sdma_v5_2_soft_reset +ffffffff820fa8c0 t sdma_v5_2_set_clockgating_state +ffffffff820fac60 t sdma_v5_2_set_powergating_state +ffffffff820fac90 t sdma_v5_2_get_clockgating_state +ffffffff820fad40 t sdma_v5_2_ring_get_rptr +ffffffff820fada0 t sdma_v5_2_ring_get_wptr +ffffffff820faef0 t sdma_v5_2_ring_set_wptr +ffffffff820fb0d0 t sdma_v5_2_ring_emit_ib +ffffffff820fb3d0 t sdma_v5_2_ring_emit_fence +ffffffff820fb880 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff820fbb30 t sdma_v5_2_ring_emit_vm_flush +ffffffff820fbb50 t sdma_v5_2_ring_emit_hdp_flush +ffffffff820fbe50 t sdma_v5_2_ring_test_ring +ffffffff820fc280 t sdma_v5_2_ring_test_ib +ffffffff820fc610 t sdma_v5_2_ring_insert_nop +ffffffff820fc750 t sdma_v5_2_ring_pad_ib +ffffffff820fc880 t sdma_v5_2_ring_init_cond_exec +ffffffff820fcad0 t sdma_v5_2_ring_patch_cond_exec +ffffffff820fcb90 t sdma_v5_2_ring_begin_use +ffffffff820fcbb0 t sdma_v5_2_ring_end_use +ffffffff820fcbd0 t sdma_v5_2_ring_emit_wreg +ffffffff820fcd30 t sdma_v5_2_ring_emit_reg_wait +ffffffff820fcfd0 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff820fd060 t sdma_v5_2_ring_preempt_ib +ffffffff820fd220 t sdma_v5_2_ring_emit_mem_sync +ffffffff820fd450 t sdma_v5_2_emit_copy_buffer +ffffffff820fd510 t sdma_v5_2_emit_fill_buffer +ffffffff820fd5a0 t sdma_v5_2_vm_copy_pte +ffffffff820fd660 t sdma_v5_2_vm_write_pte +ffffffff820fd730 t sdma_v5_2_vm_set_pte_pde +ffffffff820fd830 t sdma_v5_2_set_trap_irq_state +ffffffff820fd8f0 t sdma_v5_2_process_trap_irq +ffffffff820fda60 t sdma_v5_2_process_illegal_inst_irq +ffffffff820fda90 t sdma_v5_2_mqd_init +ffffffff820fdb80 t sdma_v5_2_ctx_switch_enable +ffffffff820fdfd0 t sdma_v5_2_enable +ffffffff820ff000 t sdma_v6_0_early_init +ffffffff820ff120 t sdma_v6_0_sw_init +ffffffff820ff330 t sdma_v6_0_sw_fini +ffffffff820ff3d0 t sdma_v6_0_hw_init +ffffffff820ff3e0 t sdma_v6_0_hw_fini +ffffffff820ff4d0 t sdma_v6_0_suspend +ffffffff820ff510 t sdma_v6_0_resume +ffffffff820ff520 t sdma_v6_0_is_idle +ffffffff820ff5c0 t sdma_v6_0_wait_for_idle +ffffffff820ff6a0 t sdma_v6_0_check_soft_reset +ffffffff820ff770 t sdma_v6_0_soft_reset +ffffffff820ffcc0 t sdma_v6_0_set_clockgating_state +ffffffff820ffcf0 t sdma_v6_0_set_powergating_state +ffffffff820ffd20 t sdma_v6_0_get_clockgating_state +ffffffff820ffd50 t sdma_v6_0_ring_get_rptr +ffffffff820ffdb0 t sdma_v6_0_ring_get_wptr +ffffffff820ffe30 t sdma_v6_0_ring_set_wptr +ffffffff821001e0 t sdma_v6_0_ring_emit_ib +ffffffff821004e0 t sdma_v6_0_ring_emit_fence +ffffffff82100990 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff82100c40 t sdma_v6_0_ring_emit_vm_flush +ffffffff82100ee0 t sdma_v6_0_ring_emit_hdp_flush +ffffffff821011b0 t sdma_v6_0_ring_test_ring +ffffffff821015e0 t sdma_v6_0_ring_test_ib +ffffffff82101970 t sdma_v6_0_ring_insert_nop +ffffffff82101ab0 t sdma_v6_0_ring_pad_ib +ffffffff82101be0 t sdma_v6_0_ring_init_cond_exec +ffffffff82101e30 t sdma_v6_0_ring_patch_cond_exec +ffffffff82101ef0 t sdma_v6_0_ring_emit_wreg +ffffffff82102050 t sdma_v6_0_ring_emit_reg_wait +ffffffff821022f0 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff82102380 t sdma_v6_0_ring_preempt_ib +ffffffff82102510 t sdma_v6_0_ring_emit_mem_sync +ffffffff82102740 t sdma_v6_0_emit_copy_buffer +ffffffff82102800 t sdma_v6_0_emit_fill_buffer +ffffffff82102890 t sdma_v6_0_vm_copy_pte +ffffffff82102950 t sdma_v6_0_vm_write_pte +ffffffff82102a20 t sdma_v6_0_vm_set_pte_pde +ffffffff82102b20 t sdma_v6_0_set_trap_irq_state +ffffffff82102bc0 t sdma_v6_0_process_trap_irq +ffffffff82102d20 t sdma_v6_0_process_illegal_inst_irq +ffffffff82102d50 t sdma_v6_0_mqd_init +ffffffff82102e80 t sdma_v6_0_start +ffffffff821031e0 t sdma_v6_0_enable +ffffffff82103380 t sdma_v6_0_gfx_resume +ffffffff821045c0 t sdma_v6_0_gfx_stop +ffffffff82105000 T sienna_cichlid_reset_init +ffffffff821050e0 t sienna_cichlid_async_reset +ffffffff82105140 t sienna_cichlid_get_reset_handler +ffffffff821051d0 T sienna_cichlid_reset_fini +ffffffff82105230 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff821053a0 t sienna_cichlid_mode2_perform_reset +ffffffff82105430 t sienna_cichlid_mode2_restore_hwcontext +ffffffff821057a0 t sienna_cichlid_mode2_reset +ffffffff82106000 T smu_v11_0_i2c_control_init +ffffffff821060e0 T smu_v11_0_i2c_control_fini +ffffffff82106120 t smu_v11_0_i2c_xfer +ffffffff82107490 t smu_v11_0_i2c_func +ffffffff821074c0 t smu_v11_0_i2c_enable +ffffffff82107620 t smu_v11_0_i2c_abort +ffffffff82107740 t lock_bus +ffffffff821077f0 t trylock_bus +ffffffff82107850 t unlock_bus +ffffffff82108000 T smu_v13_0_10_reset_init +ffffffff821080e0 t smu_v13_0_10_async_reset +ffffffff82108140 t smu_v13_0_10_get_reset_handler +ffffffff821081f0 T smu_v13_0_10_reset_fini +ffffffff82108250 t smu_v13_0_10_mode2_prepare_hwcontext +ffffffff821083a0 t smu_v13_0_10_mode2_perform_reset +ffffffff82108430 t smu_v13_0_10_mode2_restore_hwcontext +ffffffff82108820 t smu_v13_0_10_mode2_reset +ffffffff82109000 t smuio_v11_0_get_rom_index_offset +ffffffff82109040 t smuio_v11_0_get_rom_data_offset +ffffffff82109080 t smuio_v11_0_update_rom_clock_gating +ffffffff821091d0 t smuio_v11_0_get_clock_gating_state +ffffffff8210a000 t smuio_v11_0_6_get_rom_index_offset +ffffffff8210a040 t smuio_v11_0_6_get_rom_data_offset +ffffffff8210a080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff8210a1e0 t smuio_v11_0_6_get_clock_gating_state +ffffffff8210b000 t smuio_v13_0_get_rom_index_offset +ffffffff8210b040 t smuio_v13_0_get_rom_data_offset +ffffffff8210b080 t smuio_v13_0_update_rom_clock_gating +ffffffff8210b1e0 t smuio_v13_0_get_clock_gating_state +ffffffff8210b290 t smuio_v13_0_get_die_id +ffffffff8210b320 t smuio_v13_0_get_socket_id +ffffffff8210b3c0 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff8210c000 t smuio_v13_0_3_get_die_id +ffffffff8210c0a0 t smuio_v13_0_3_get_socket_id +ffffffff8210c140 t smuio_v13_0_3_get_pkg_type +ffffffff8210d000 t smuio_v13_0_6_get_rom_index_offset +ffffffff8210d040 t smuio_v13_0_6_get_rom_data_offset +ffffffff8210e000 t smuio_v9_0_get_rom_index_offset +ffffffff8210e040 t smuio_v9_0_get_rom_data_offset +ffffffff8210e080 t smuio_v9_0_update_rom_clock_gating +ffffffff8210e1e0 t smuio_v9_0_get_clock_gating_state +ffffffff8210f000 T soc15_grbm_select +ffffffff8210f090 T soc15_program_register_sequence +ffffffff8210f2b0 T soc15_set_virt_ops +ffffffff8210f320 t soc15_common_early_init +ffffffff8210f750 t soc15_common_late_init +ffffffff8210f7c0 t soc15_common_sw_init +ffffffff8210f820 t soc15_common_sw_fini +ffffffff8210f880 t soc15_common_hw_init +ffffffff8210f9d0 t soc15_common_hw_fini +ffffffff8210fad0 t soc15_common_suspend +ffffffff8210fb10 t soc15_common_resume +ffffffff8210fc00 t soc15_common_is_idle +ffffffff8210fc30 t soc15_common_wait_for_idle +ffffffff8210fc60 t soc15_common_soft_reset +ffffffff8210fc90 t soc15_common_set_clockgating_state +ffffffff82110040 t soc15_common_set_powergating_state +ffffffff82110070 t soc15_common_get_clockgating_state +ffffffff821101b0 t soc15_uvd_ctx_rreg +ffffffff82110280 t soc15_uvd_ctx_wreg +ffffffff82110320 t soc15_didt_rreg +ffffffff821103e0 t soc15_didt_wreg +ffffffff82110480 t soc15_gc_cac_rreg +ffffffff821105d0 t soc15_gc_cac_wreg +ffffffff82110710 t soc15_se_cac_rreg +ffffffff82110860 t soc15_se_cac_wreg +ffffffff821109a0 t soc15_read_disabled_bios +ffffffff821109d0 t soc15_read_register +ffffffff82110ae0 t soc15_asic_reset +ffffffff82110cb0 t soc15_asic_reset_method +ffffffff82110e80 t soc15_get_xclk +ffffffff82110ef0 t soc15_set_uvd_clocks +ffffffff82110f20 t soc15_set_vce_clocks +ffffffff82110f50 t soc15_get_config_memsize +ffffffff82110f70 t soc15_need_full_reset +ffffffff82110fa0 t soc15_get_pcie_usage +ffffffff82111110 t soc15_need_reset_on_init +ffffffff821111d0 t soc15_get_pcie_replay_count +ffffffff82111250 t soc15_supports_baco +ffffffff821112c0 t soc15_pre_asic_init +ffffffff821112d0 t soc15_query_video_codecs +ffffffff821113c0 t vega20_get_pcie_usage +ffffffff82112000 T soc21_grbm_select +ffffffff82112090 t soc21_common_early_init +ffffffff82112210 t soc21_common_late_init +ffffffff82112310 t soc21_common_sw_init +ffffffff82112360 t soc21_common_sw_fini +ffffffff82112390 t soc21_common_hw_init +ffffffff82112470 t soc21_common_hw_fini +ffffffff82112520 t soc21_common_suspend +ffffffff821125d0 t soc21_common_resume +ffffffff821127e0 t soc21_common_is_idle +ffffffff82112810 t soc21_common_wait_for_idle +ffffffff82112840 t soc21_common_soft_reset +ffffffff82112870 t soc21_common_set_clockgating_state +ffffffff82112930 t soc21_common_set_powergating_state +ffffffff821129a0 t soc21_common_get_clockgating_state +ffffffff821129f0 t soc21_didt_rreg +ffffffff82112ab0 t soc21_didt_wreg +ffffffff82112b50 t soc21_read_disabled_bios +ffffffff82112b80 t soc21_read_register +ffffffff82112c80 t soc21_asic_reset +ffffffff82112d70 t soc21_asic_reset_method +ffffffff82112e50 t soc21_get_xclk +ffffffff82112e80 t soc21_set_uvd_clocks +ffffffff82112eb0 t soc21_set_vce_clocks +ffffffff82112ee0 t soc21_get_config_memsize +ffffffff82112f00 t soc21_need_full_reset +ffffffff82112f30 t soc21_init_doorbell_index +ffffffff82113050 t soc21_need_reset_on_init +ffffffff82113100 t soc21_pre_asic_init +ffffffff82113130 t soc21_update_umd_stable_pstate +ffffffff821131b0 t soc21_query_video_codecs +ffffffff82114000 t tonga_ih_early_init +ffffffff82114050 t tonga_ih_sw_init +ffffffff821140e0 t tonga_ih_sw_fini +ffffffff82114140 t tonga_ih_hw_init +ffffffff821143c0 t tonga_ih_hw_fini +ffffffff82114490 t tonga_ih_suspend +ffffffff82114560 t tonga_ih_resume +ffffffff821145a0 t tonga_ih_is_idle +ffffffff821145f0 t tonga_ih_wait_for_idle +ffffffff821146a0 t tonga_ih_check_soft_reset +ffffffff82114700 t tonga_ih_pre_soft_reset +ffffffff821147e0 t tonga_ih_soft_reset +ffffffff821148e0 t tonga_ih_post_soft_reset +ffffffff82114930 t tonga_ih_set_clockgating_state +ffffffff82114960 t tonga_ih_set_powergating_state +ffffffff82114990 t tonga_ih_get_wptr +ffffffff82114ac0 t tonga_ih_decode_iv +ffffffff82114b40 t tonga_ih_set_rptr +ffffffff82115000 t umc_v6_0_init_registers +ffffffff82116000 t umc_v6_1_query_ras_error_count +ffffffff821165c0 t umc_v6_1_query_ras_error_address +ffffffff821168f0 t umc_v6_1_err_cnt_init +ffffffff82117000 T umc_v6_7_convert_error_address +ffffffff821173a0 t umc_v6_7_query_ras_error_count +ffffffff821173e0 t umc_v6_7_query_ras_error_address +ffffffff82117400 t umc_v6_7_query_ras_poison_mode +ffffffff82117460 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff82117480 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff821174a0 t umc_v6_7_query_ecc_error_count +ffffffff821177a0 t umc_v6_7_reset_error_count_per_channel +ffffffff821178e0 t umc_v6_7_query_error_address +ffffffff82117a10 t umc_v6_7_ecc_info_querry_ecc_error_count +ffffffff82117c20 t umc_v6_7_ecc_info_query_error_address +ffffffff82118000 t umc_v8_10_query_ras_error_count +ffffffff82118040 t umc_v8_10_query_ras_error_address +ffffffff82118060 t umc_v8_10_err_cnt_init +ffffffff82118080 t umc_v8_10_query_ras_poison_mode +ffffffff821180b0 t umc_v8_10_ecc_info_query_ras_error_count +ffffffff821180d0 t umc_v8_10_ecc_info_query_ras_error_address +ffffffff821180f0 t umc_v8_10_set_eeprom_table_version +ffffffff82118120 t umc_v8_10_query_ecc_error_count +ffffffff82118200 t umc_v8_10_clear_error_count_per_channel +ffffffff82118270 t umc_v8_10_query_error_address +ffffffff821183b0 t umc_v8_10_convert_error_address +ffffffff821185e0 t umc_v8_10_err_cnt_init_per_channel +ffffffff821186b0 t umc_v8_10_ecc_info_query_ecc_error_count +ffffffff821187a0 t umc_v8_10_ecc_info_query_error_address +ffffffff82119000 t umc_v8_7_query_ras_error_count +ffffffff82119370 t umc_v8_7_query_ras_error_address +ffffffff82119540 t umc_v8_7_err_cnt_init +ffffffff821196d0 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff82119800 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff8211a000 t uvd_v5_0_early_init +ffffffff8211a050 t uvd_v5_0_sw_init +ffffffff8211a170 t uvd_v5_0_sw_fini +ffffffff8211a1d0 t uvd_v5_0_hw_init +ffffffff8211a780 t uvd_v5_0_hw_fini +ffffffff8211a810 t uvd_v5_0_suspend +ffffffff8211a950 t uvd_v5_0_resume +ffffffff8211a9b0 t uvd_v5_0_is_idle +ffffffff8211aa00 t uvd_v5_0_wait_for_idle +ffffffff8211aa90 t uvd_v5_0_soft_reset +ffffffff8211ab80 t uvd_v5_0_set_clockgating_state +ffffffff8211ad80 t uvd_v5_0_set_powergating_state +ffffffff8211add0 t uvd_v5_0_get_clockgating_state +ffffffff8211ae70 t uvd_v5_0_ring_get_rptr +ffffffff8211aec0 t uvd_v5_0_ring_get_wptr +ffffffff8211af10 t uvd_v5_0_ring_set_wptr +ffffffff8211af40 t uvd_v5_0_ring_emit_ib +ffffffff8211b1e0 t uvd_v5_0_ring_emit_fence +ffffffff8211b800 t uvd_v5_0_ring_test_ring +ffffffff8211b9d0 t uvd_v5_0_ring_insert_nop +ffffffff8211bb30 t uvd_v5_0_set_interrupt_state +ffffffff8211bb60 t uvd_v5_0_process_interrupt +ffffffff8211bbd0 t uvd_v5_0_stop +ffffffff8211bd50 t uvd_v5_0_start +ffffffff8211d000 t uvd_v6_0_early_init +ffffffff8211d190 t uvd_v6_0_sw_init +ffffffff8211d450 t uvd_v6_0_sw_fini +ffffffff8211d520 t uvd_v6_0_hw_init +ffffffff8211db90 t uvd_v6_0_hw_fini +ffffffff8211dc20 t uvd_v6_0_suspend +ffffffff8211dd60 t uvd_v6_0_resume +ffffffff8211ddc0 t uvd_v6_0_is_idle +ffffffff8211de10 t uvd_v6_0_wait_for_idle +ffffffff8211dea0 t uvd_v6_0_check_soft_reset +ffffffff8211df30 t uvd_v6_0_pre_soft_reset +ffffffff8211df80 t uvd_v6_0_soft_reset +ffffffff8211e080 t uvd_v6_0_post_soft_reset +ffffffff8211e150 t uvd_v6_0_set_clockgating_state +ffffffff8211e340 t uvd_v6_0_set_powergating_state +ffffffff8211e3c0 t uvd_v6_0_get_clockgating_state +ffffffff8211e470 t uvd_v6_0_ring_get_rptr +ffffffff8211e4c0 t uvd_v6_0_ring_get_wptr +ffffffff8211e510 t uvd_v6_0_ring_set_wptr +ffffffff8211e540 t uvd_v6_0_ring_emit_ib +ffffffff8211e8e0 t uvd_v6_0_ring_emit_fence +ffffffff8211ef00 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff8211f340 t uvd_v6_0_ring_emit_vm_flush +ffffffff8211f6e0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff8211f710 t uvd_v6_0_ring_test_ring +ffffffff8211f8e0 t uvd_v6_0_ring_insert_nop +ffffffff8211fa40 t uvd_v6_0_ring_emit_wreg +ffffffff8211fcf0 t uvd_v6_0_enc_ring_get_rptr +ffffffff8211fd50 t uvd_v6_0_enc_ring_get_wptr +ffffffff8211fdb0 t uvd_v6_0_enc_ring_set_wptr +ffffffff8211fdf0 t uvd_v6_0_enc_ring_emit_ib +ffffffff82120060 t uvd_v6_0_enc_ring_emit_fence +ffffffff821202c0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff82120490 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff821206c0 t uvd_v6_0_enc_ring_test_ring +ffffffff82120830 t uvd_v6_0_enc_ring_test_ib +ffffffff82120d90 t uvd_v6_0_enc_ring_insert_end +ffffffff82120e20 t uvd_v6_0_set_interrupt_state +ffffffff82120e50 t uvd_v6_0_process_interrupt +ffffffff82120f50 t uvd_v6_0_stop +ffffffff821210d0 t uvd_v6_0_start +ffffffff82122000 t uvd_v7_0_early_init +ffffffff82122290 t uvd_v7_0_sw_init +ffffffff82122720 t uvd_v7_0_sw_fini +ffffffff82122830 t uvd_v7_0_hw_init +ffffffff82125d00 t uvd_v7_0_hw_fini +ffffffff821260b0 t uvd_v7_0_suspend +ffffffff82126190 t uvd_v7_0_resume +ffffffff821261f0 t uvd_v7_0_set_clockgating_state +ffffffff82126220 t uvd_v7_0_ring_get_rptr +ffffffff821262c0 t uvd_v7_0_ring_get_wptr +ffffffff82126360 t uvd_v7_0_ring_set_wptr +ffffffff821263e0 t uvd_v7_0_ring_patch_cs_in_place +ffffffff82126450 t uvd_v7_0_ring_emit_ib +ffffffff82126840 t uvd_v7_0_ring_emit_fence +ffffffff82126f00 t uvd_v7_0_ring_emit_vm_flush +ffffffff82126f70 t uvd_v7_0_ring_emit_hdp_flush +ffffffff82126fa0 t uvd_v7_0_ring_test_ring +ffffffff82127270 t uvd_v7_0_ring_insert_nop +ffffffff82127410 t uvd_v7_0_ring_emit_wreg +ffffffff82127700 t uvd_v7_0_ring_emit_reg_wait +ffffffff82127ae0 t uvd_v7_0_enc_ring_get_rptr +ffffffff82127be0 t uvd_v7_0_enc_ring_get_wptr +ffffffff82127cf0 t uvd_v7_0_enc_ring_set_wptr +ffffffff82127df0 t uvd_v7_0_enc_ring_emit_ib +ffffffff82128060 t uvd_v7_0_enc_ring_emit_fence +ffffffff821282c0 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff82128330 t uvd_v7_0_enc_ring_test_ring +ffffffff821284b0 t uvd_v7_0_enc_ring_test_ib +ffffffff82128a10 t uvd_v7_0_enc_ring_insert_end +ffffffff82128aa0 t uvd_v7_0_enc_ring_emit_wreg +ffffffff82128c00 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff82128dd0 t uvd_v7_0_set_interrupt_state +ffffffff82128e00 t uvd_v7_0_process_interrupt +ffffffff82129000 t vce_v3_0_early_init +ffffffff821291a0 t vce_v3_0_sw_init +ffffffff82129340 t vce_v3_0_sw_fini +ffffffff821293a0 t vce_v3_0_hw_init +ffffffff821294a0 t vce_v3_0_hw_fini +ffffffff821295a0 t vce_v3_0_suspend +ffffffff821296b0 t vce_v3_0_resume +ffffffff821297d0 t vce_v3_0_is_idle +ffffffff82129840 t vce_v3_0_wait_for_idle +ffffffff82129900 t vce_v3_0_check_soft_reset +ffffffff82129a30 t vce_v3_0_pre_soft_reset +ffffffff82129b00 t vce_v3_0_soft_reset +ffffffff82129c00 t vce_v3_0_post_soft_reset +ffffffff82129cd0 t vce_v3_0_set_clockgating_state +ffffffff8212a0b0 t vce_v3_0_set_powergating_state +ffffffff8212ac00 t vce_v3_0_get_clockgating_state +ffffffff8212acf0 t vce_v3_0_ring_get_rptr +ffffffff8212ade0 t vce_v3_0_ring_get_wptr +ffffffff8212aed0 t vce_v3_0_ring_set_wptr +ffffffff8212afa0 t vce_v3_0_ring_emit_ib +ffffffff8212b210 t vce_v3_0_emit_pipeline_sync +ffffffff8212b3e0 t vce_v3_0_emit_vm_flush +ffffffff8212b680 t vce_v3_0_set_interrupt_state +ffffffff8212b700 t vce_v3_0_process_interrupt +ffffffff8212b7e0 t vce_v3_0_stop +ffffffff8212c000 t vce_v4_0_early_init +ffffffff8212c0c0 t vce_v4_0_sw_init +ffffffff8212c3d0 t vce_v4_0_sw_fini +ffffffff8212c470 t vce_v4_0_hw_init +ffffffff8212ccc0 t vce_v4_0_hw_fini +ffffffff8212ce30 t vce_v4_0_suspend +ffffffff8212cfa0 t vce_v4_0_resume +ffffffff8212d070 t vce_v4_0_set_clockgating_state +ffffffff8212d0a0 t vce_v4_0_set_powergating_state +ffffffff8212d1b0 t vce_v4_0_ring_get_rptr +ffffffff8212d220 t vce_v4_0_ring_get_wptr +ffffffff8212d2b0 t vce_v4_0_ring_set_wptr +ffffffff8212d340 t vce_v4_0_ring_emit_ib +ffffffff8212d5b0 t vce_v4_0_ring_emit_fence +ffffffff8212d810 t vce_v4_0_emit_vm_flush +ffffffff8212d880 t vce_v4_0_ring_insert_end +ffffffff8212d910 t vce_v4_0_emit_wreg +ffffffff8212da70 t vce_v4_0_emit_reg_wait +ffffffff8212dc40 t vce_v4_0_set_interrupt_state +ffffffff8212dcd0 t vce_v4_0_process_interrupt +ffffffff8212dd80 t vce_v4_0_start +ffffffff8212f000 T vcn_dec_sw_ring_emit_fence +ffffffff8212f260 T vcn_dec_sw_ring_insert_end +ffffffff8212f2f0 T vcn_dec_sw_ring_emit_ib +ffffffff8212f560 T vcn_dec_sw_ring_emit_reg_wait +ffffffff8212f730 T vcn_dec_sw_ring_emit_vm_flush +ffffffff8212f7a0 T vcn_dec_sw_ring_emit_wreg +ffffffff82130000 T vcn_v1_0_set_pg_for_begin_use +ffffffff82130160 T vcn_v1_0_ring_end_use +ffffffff821301d0 t vcn_v1_0_early_init +ffffffff82130340 t vcn_v1_0_sw_init +ffffffff82130640 t vcn_v1_0_sw_fini +ffffffff821306b0 t vcn_v1_0_hw_init +ffffffff821307b0 t vcn_v1_0_hw_fini +ffffffff821308d0 t vcn_v1_0_suspend +ffffffff82130960 t vcn_v1_0_resume +ffffffff82130a80 t vcn_v1_0_is_idle +ffffffff82130b20 t vcn_v1_0_wait_for_idle +ffffffff82130b60 t vcn_v1_0_set_clockgating_state +ffffffff82130c30 t vcn_v1_0_set_powergating_state +ffffffff821312a0 t vcn_v1_0_dec_ring_get_rptr +ffffffff82131330 t vcn_v1_0_dec_ring_get_wptr +ffffffff821313c0 t vcn_v1_0_dec_ring_set_wptr +ffffffff821314e0 t vcn_v1_0_ring_patch_cs_in_place +ffffffff821316d0 t vcn_v1_0_dec_ring_emit_ib +ffffffff82131aa0 t vcn_v1_0_dec_ring_emit_fence +ffffffff82132130 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff821321a0 t vcn_v1_0_dec_ring_insert_nop +ffffffff82132340 t vcn_v1_0_dec_ring_insert_start +ffffffff82132530 t vcn_v1_0_dec_ring_insert_end +ffffffff82132640 t vcn_v1_0_ring_begin_use +ffffffff82132700 t vcn_v1_0_dec_ring_emit_wreg +ffffffff821329e0 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff82132da0 t vcn_v1_0_enc_ring_get_rptr +ffffffff82132e80 t vcn_v1_0_enc_ring_get_wptr +ffffffff82132f60 t vcn_v1_0_enc_ring_set_wptr +ffffffff82133020 t vcn_v1_0_enc_ring_emit_ib +ffffffff82133290 t vcn_v1_0_enc_ring_emit_fence +ffffffff821334f0 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff82133560 t vcn_v1_0_enc_ring_insert_end +ffffffff821335f0 t vcn_v1_0_enc_ring_emit_wreg +ffffffff82133750 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff82133920 t vcn_v1_0_set_interrupt_state +ffffffff82133950 t vcn_v1_0_process_interrupt +ffffffff82133a10 t vcn_v1_0_idle_work_handler +ffffffff82133bc0 t vcn_v1_0_pause_dpg_mode +ffffffff82134c90 t vcn_v1_0_enable_clock_gating +ffffffff82135130 t vcn_v1_0_disable_clock_gating +ffffffff82135790 t vcn_1_0_enable_static_power_gating +ffffffff82135960 t vcn_v1_0_start_dpg_mode +ffffffff8213a190 t vcn_v1_0_start_spg_mode +ffffffff8213c9f0 t vcn_v1_0_clock_gating_dpg_mode +ffffffff8213e000 T vcn_v2_0_dec_ring_insert_start +ffffffff8213e1d0 T vcn_v2_0_dec_ring_insert_end +ffffffff8213e2d0 T vcn_v2_0_dec_ring_insert_nop +ffffffff8213e450 T vcn_v2_0_dec_ring_emit_fence +ffffffff8213ea80 T vcn_v2_0_dec_ring_emit_ib +ffffffff8213ee20 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff8213f1b0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff8213f220 T vcn_v2_0_dec_ring_emit_wreg +ffffffff8213f4d0 T vcn_v2_0_enc_ring_emit_fence +ffffffff8213f730 T vcn_v2_0_enc_ring_insert_end +ffffffff8213f7c0 T vcn_v2_0_enc_ring_emit_ib +ffffffff8213fa30 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff8213fc00 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff8213fc70 T vcn_v2_0_enc_ring_emit_wreg +ffffffff8213fdd0 T vcn_v2_0_dec_ring_test_ring +ffffffff821400b0 t vcn_v2_0_early_init +ffffffff82140220 t vcn_v2_0_sw_init +ffffffff821405c0 t vcn_v2_0_sw_fini +ffffffff82140670 t vcn_v2_0_hw_init +ffffffff821410b0 t vcn_v2_0_hw_fini +ffffffff821411d0 t vcn_v2_0_suspend +ffffffff82141200 t vcn_v2_0_resume +ffffffff82141260 t vcn_v2_0_is_idle +ffffffff82141300 t vcn_v2_0_wait_for_idle +ffffffff82141340 t vcn_v2_0_set_clockgating_state +ffffffff821413f0 t vcn_v2_0_set_powergating_state +ffffffff82141ab0 t vcn_v2_0_dec_ring_get_rptr +ffffffff82141b40 t vcn_v2_0_dec_ring_get_wptr +ffffffff82141bf0 t vcn_v2_0_dec_ring_set_wptr +ffffffff82141d30 t vcn_v2_0_enc_ring_get_rptr +ffffffff82141e10 t vcn_v2_0_enc_ring_get_wptr +ffffffff82141f10 t vcn_v2_0_enc_ring_set_wptr +ffffffff82142000 t vcn_v2_0_set_interrupt_state +ffffffff82142030 t vcn_v2_0_process_interrupt +ffffffff821420f0 t vcn_v2_0_pause_dpg_mode +ffffffff821429c0 t vcn_v2_0_enable_clock_gating +ffffffff82142c80 t vcn_v2_0_disable_clock_gating +ffffffff82143110 t vcn_v2_0_start +ffffffff821480e0 t vcn_v2_0_enable_static_power_gating +ffffffff82148260 t vcn_v2_0_clock_gating_dpg_mode +ffffffff82149140 t vcn_v2_0_mc_resume_dpg_mode +ffffffff8214e000 t vcn_v2_6_query_poison_status +ffffffff8214e0e0 t vcn_v2_5_early_init +ffffffff8214e3e0 t vcn_v2_5_sw_init +ffffffff8214e930 t vcn_v2_5_sw_fini +ffffffff8214ea20 t vcn_v2_5_hw_init +ffffffff8214f530 t vcn_v2_5_hw_fini +ffffffff8214f6e0 t vcn_v2_5_suspend +ffffffff8214f710 t vcn_v2_5_resume +ffffffff8214f770 t vcn_v2_5_is_idle +ffffffff8214f870 t vcn_v2_5_wait_for_idle +ffffffff8214f920 t vcn_v2_5_set_clockgating_state +ffffffff8214f9b0 t vcn_v2_5_set_powergating_state +ffffffff821521b0 t vcn_v2_5_dec_ring_get_rptr +ffffffff82152250 t vcn_v2_5_dec_ring_get_wptr +ffffffff82152310 t vcn_v2_5_dec_ring_set_wptr +ffffffff821523c0 t vcn_v2_5_enc_ring_get_rptr +ffffffff821524c0 t vcn_v2_5_enc_ring_get_wptr +ffffffff821525d0 t vcn_v2_5_enc_ring_set_wptr +ffffffff821526e0 t vcn_v2_5_set_interrupt_state +ffffffff82152710 t vcn_v2_5_process_interrupt +ffffffff82152830 t vcn_v2_6_set_ras_interrupt_state +ffffffff82152860 t vcn_v2_5_pause_dpg_mode +ffffffff821530a0 t vcn_v2_5_enable_clock_gating +ffffffff82153400 t vcn_v2_5_disable_clock_gating +ffffffff82153970 t vcn_v2_5_start_dpg_mode +ffffffff82157910 t vcn_v2_5_clock_gating_dpg_mode +ffffffff82158820 t vcn_v2_5_mc_resume_dpg_mode +ffffffff8215e000 t vcn_v3_0_early_init +ffffffff8215e230 t vcn_v3_0_sw_init +ffffffff8215e750 t vcn_v3_0_sw_fini +ffffffff8215e850 t vcn_v3_0_hw_init +ffffffff8215f470 t vcn_v3_0_hw_fini +ffffffff8215f590 t vcn_v3_0_suspend +ffffffff8215f5c0 t vcn_v3_0_resume +ffffffff8215f620 t vcn_v3_0_is_idle +ffffffff8215f720 t vcn_v3_0_wait_for_idle +ffffffff8215f7d0 t vcn_v3_0_set_clockgating_state +ffffffff8215f8f0 t vcn_v3_0_set_powergating_state +ffffffff821624e0 t vcn_v3_0_dec_ring_get_rptr +ffffffff82162580 t vcn_v3_0_dec_ring_get_wptr +ffffffff82162640 t vcn_v3_0_dec_ring_set_wptr +ffffffff821627b0 t vcn_v3_0_ring_patch_cs_in_place +ffffffff82162b30 t vcn_v3_0_enc_ring_get_rptr +ffffffff82162c30 t vcn_v3_0_enc_ring_get_wptr +ffffffff82162d40 t vcn_v3_0_enc_ring_set_wptr +ffffffff82162e50 t vcn_v3_0_set_interrupt_state +ffffffff82162e80 t vcn_v3_0_process_interrupt +ffffffff82162fa0 t vcn_v3_0_pause_dpg_mode +ffffffff821638c0 t vcn_v3_0_enable_clock_gating +ffffffff82163b90 t vcn_v3_0_disable_clock_gating +ffffffff82164150 t vcn_v3_0_start_dpg_mode +ffffffff82167960 t vcn_v3_0_clock_gating_dpg_mode +ffffffff821688a0 t vcn_v3_0_mc_resume_dpg_mode +ffffffff8216e000 t vcn_v4_0_query_ras_poison_status +ffffffff8216e0e0 t vcn_v4_0_early_init +ffffffff8216e2b0 t vcn_v4_0_sw_init +ffffffff8216e5b0 t vcn_v4_0_sw_fini +ffffffff8216e6b0 t vcn_v4_0_hw_init +ffffffff8216f1a0 t vcn_v4_0_hw_fini +ffffffff8216f310 t vcn_v4_0_suspend +ffffffff8216f340 t vcn_v4_0_resume +ffffffff8216f3a0 t vcn_v4_0_is_idle +ffffffff8216f4b0 t vcn_v4_0_wait_for_idle +ffffffff8216f570 t vcn_v4_0_set_clockgating_state +ffffffff8216f6a0 t vcn_v4_0_set_powergating_state +ffffffff82170010 t vcn_v4_0_unified_ring_get_rptr +ffffffff821700f0 t vcn_v4_0_unified_ring_get_wptr +ffffffff821701f0 t vcn_v4_0_unified_ring_set_wptr +ffffffff821702f0 t vcn_v4_0_ring_patch_cs_in_place +ffffffff821706e0 t vcn_v4_0_limit_sched +ffffffff82170750 t vcn_v4_0_set_interrupt_state +ffffffff82170780 t vcn_v4_0_process_interrupt +ffffffff82170850 t vcn_v4_0_set_ras_interrupt_state +ffffffff82170880 t vcn_v4_0_pause_dpg_mode +ffffffff82170b40 t vcn_v4_0_enable_clock_gating +ffffffff82170e70 t vcn_v4_0_disable_clock_gating +ffffffff821713b0 t vcn_v4_0_start +ffffffff82176940 t vcn_v4_0_disable_clock_gating_dpg_mode +ffffffff82177880 t vcn_v4_0_mc_resume_dpg_mode +ffffffff8217d000 t vcn_v4_0_3_early_init +ffffffff8217d110 t vcn_v4_0_3_sw_init +ffffffff8217d410 t vcn_v4_0_3_sw_fini +ffffffff8217d4e0 t vcn_v4_0_3_hw_init +ffffffff8217e2f0 t vcn_v4_0_3_hw_fini +ffffffff8217e390 t vcn_v4_0_3_suspend +ffffffff8217e410 t vcn_v4_0_3_resume +ffffffff8217e470 t vcn_v4_0_3_is_idle +ffffffff8217e610 t vcn_v4_0_3_wait_for_idle +ffffffff8217e730 t vcn_v4_0_3_set_clockgating_state +ffffffff8217e900 t vcn_v4_0_3_set_powergating_state +ffffffff8217f0d0 t vcn_v4_0_3_unified_ring_get_rptr +ffffffff8217f270 t vcn_v4_0_3_unified_ring_get_wptr +ffffffff8217f430 t vcn_v4_0_3_unified_ring_set_wptr +ffffffff8217f600 t vcn_v4_0_3_set_interrupt_state +ffffffff8217f630 t vcn_v4_0_3_process_interrupt +ffffffff8217f770 t vcn_v4_0_3_query_ras_error_count +ffffffff8217f890 t vcn_v4_0_3_reset_ras_error_count +ffffffff8217f9a0 t vcn_v4_0_3_pause_dpg_mode +ffffffff8217f9d0 t vcn_v4_0_3_enable_clock_gating +ffffffff8217fd30 t vcn_v4_0_3_disable_clock_gating +ffffffff821802a0 t vcn_v4_0_3_start +ffffffff82185360 t vcn_v4_0_3_disable_clock_gating_dpg_mode +ffffffff82186270 t vcn_v4_0_3_mc_resume_dpg_mode +ffffffff8218c000 t vega10_ih_early_init +ffffffff8218c050 t vega10_ih_sw_init +ffffffff8218c330 t vega10_ih_sw_fini +ffffffff8218c370 t vega10_ih_hw_init +ffffffff8218c780 t vega10_ih_hw_fini +ffffffff8218c7e0 t vega10_ih_suspend +ffffffff8218c840 t vega10_ih_resume +ffffffff8218c850 t vega10_ih_is_idle +ffffffff8218c880 t vega10_ih_wait_for_idle +ffffffff8218c8b0 t vega10_ih_soft_reset +ffffffff8218c8e0 t vega10_ih_set_clockgating_state +ffffffff8218ca40 t vega10_ih_set_powergating_state +ffffffff8218ca70 t vega10_ih_get_wptr +ffffffff8218cbd0 t vega10_ih_set_rptr +ffffffff8218ccc0 t vega10_ih_self_irq +ffffffff8218cd40 t vega10_ih_toggle_interrupts +ffffffff8218d000 T vega10_reg_base_init +ffffffff8218d150 T vega10_doorbell_index_init +ffffffff8218e000 t vega20_ih_early_init +ffffffff8218e050 t vega20_ih_sw_init +ffffffff8218e360 t vega20_ih_sw_fini +ffffffff8218e3a0 t vega20_ih_hw_init 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vi_common_suspend +ffffffff821923a0 t vi_common_resume +ffffffff821923e0 t vi_common_is_idle +ffffffff82192410 t vi_common_wait_for_idle +ffffffff82192440 t vi_common_soft_reset +ffffffff82192470 t vi_common_set_clockgating_state +ffffffff82192a70 t vi_common_set_powergating_state +ffffffff82192aa0 t vi_common_get_clockgating_state +ffffffff82192b90 t cz_smc_rreg +ffffffff82192c30 t cz_smc_wreg +ffffffff82192cb0 t vi_smc_rreg +ffffffff82192d60 t vi_smc_wreg +ffffffff82192df0 t vi_pcie_rreg +ffffffff82192eb0 t vi_pcie_wreg +ffffffff82192f70 t vi_uvd_ctx_rreg +ffffffff82193020 t vi_uvd_ctx_wreg +ffffffff821930b0 t vi_didt_rreg +ffffffff82193150 t vi_didt_wreg +ffffffff821931d0 t vi_gc_cac_rreg +ffffffff82193270 t vi_gc_cac_wreg +ffffffff821932f0 t vi_read_disabled_bios +ffffffff82193530 t vi_read_bios_from_rom +ffffffff82193660 t vi_read_register +ffffffff82193940 t vi_asic_reset +ffffffff82193ae0 t vi_asic_reset_method +ffffffff82193ba0 t vi_get_xclk +ffffffff82193c60 t vi_set_uvd_clocks +ffffffff82193d20 t vi_set_vce_clocks +ffffffff821940a0 t vi_get_config_memsize +ffffffff821940c0 t vi_flush_hdp +ffffffff82194140 t vi_invalidate_hdp +ffffffff821941c0 t vi_need_full_reset +ffffffff82194210 t vi_get_pcie_usage +ffffffff82194370 t vi_need_reset_on_init +ffffffff82194410 t vi_get_pcie_replay_count +ffffffff82194490 t vi_asic_supports_baco +ffffffff821944e0 t vi_pre_asic_init +ffffffff82194510 t vi_query_video_codecs +ffffffff821945b0 t vi_set_uvd_clock +ffffffff82195000 T amdgpu_xcp_drm_dev_alloc +ffffffff82195060 T amdgpu_xcp_drv_release +ffffffff82196000 T amdgpu_dm_find_first_crtc_matching_connector +ffffffff82196070 T amdgpu_dm_update_connector_after_detect +ffffffff82196680 T amdgpu_dm_update_freesync_caps +ffffffff82196c40 T dm_atomic_get_state +ffffffff82196cb0 T amdgpu_dm_connector_atomic_set_property +ffffffff82196d70 T amdgpu_dm_connector_atomic_get_property +ffffffff82196e10 T amdgpu_dm_connector_funcs_reset +ffffffff82196f10 T amdgpu_dm_connector_atomic_duplicate_state +ffffffff82197020 T create_validate_stream_for_sink +ffffffff821989b0 T amdgpu_dm_connector_mode_valid +ffffffff82198bb0 T convert_dc_color_depth_into_bpc +ffffffff82198bf0 t dm_encoder_helper_disable +ffffffff82198c20 t dm_encoder_helper_atomic_check +ffffffff82198e30 T amdgpu_dm_connector_init_helper +ffffffff82199220 T amdgpu_dm_get_encoder_crtc_mask +ffffffff82199270 T dm_restore_drm_connector_state +ffffffff82199400 t parse_hdmi_amd_vsdb +ffffffff821997b0 T amdgpu_dm_trigger_timing_sync +ffffffff82199990 T dm_write_reg_func +ffffffff821999b0 T dm_read_reg_func +ffffffff82199a60 T amdgpu_dm_process_dmub_aux_transfer_sync +ffffffff82199cd0 T amdgpu_dm_process_dmub_set_config_sync +ffffffff82199e70 T check_seamless_boot_capability +ffffffff82199ec0 T dm_execute_dmub_cmd +ffffffff82199ee0 T dm_execute_dmub_cmd_list +ffffffff82199f00 t dm_early_init +ffffffff8219a2d0 t dm_late_init +ffffffff8219a5d0 t dm_sw_init +ffffffff8219abf0 t dm_sw_fini +ffffffff8219acc0 t amdgpu_dm_early_fini +ffffffff8219ad20 t dm_hw_init +ffffffff8219cd50 t dm_hw_fini +ffffffff8219cdc0 t dm_suspend +ffffffff8219d200 t dm_resume +ffffffff8219dc60 t dm_is_idle +ffffffff8219dc90 t dm_wait_for_idle +ffffffff8219dcc0 t dm_check_soft_reset +ffffffff8219dcf0 t dm_soft_reset +ffffffff8219dd20 t dm_set_clockgating_state +ffffffff8219dd50 t dm_set_powergating_state +ffffffff8219dd80 t dm_bandwidth_update +ffffffff8219ddb0 t dm_vblank_get_counter +ffffffff8219de30 t dm_crtc_get_scanoutpos +ffffffff8219df20 t amdgpu_dm_dmub_reg_read +ffffffff8219dfd0 t amdgpu_dm_dmub_reg_write +ffffffff8219e000 t dm_dmub_hw_init +ffffffff8219e460 t dmub_aux_setconfig_callback +ffffffff8219e510 t amdgpu_dm_fini +ffffffff8219e760 t emulated_link_detect +ffffffff8219e870 t amdgpu_dm_atomic_check +ffffffff8219f760 t dm_update_plane_state +ffffffff8219fe10 t dm_update_crtc_state +ffffffff821a0900 t dm_check_crtc_cursor +ffffffff821a0c80 t is_scaling_state_different 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amdgpu_dm_connector_detect +ffffffff821a5ca0 t amdgpu_dm_connector_funcs_force +ffffffff821a5d90 t amdgpu_dm_connector_late_register +ffffffff821a5f10 t amdgpu_dm_connector_unregister +ffffffff821a5f30 t amdgpu_dm_connector_destroy +ffffffff821a6040 t amdgpu_dm_backlight_update_status +ffffffff821a60d0 t amdgpu_dm_backlight_get_brightness +ffffffff821a6300 t get_modes +ffffffff821a6310 t amdgpu_dm_connector_atomic_check +ffffffff821a6470 t amdgpu_dm_connector_get_modes +ffffffff821a6af0 t dm_crtc_high_irq +ffffffff821a6cb0 t dm_vupdate_high_irq +ffffffff821a6e60 t dm_pflip_high_irq +ffffffff821a70b0 t register_hpd_handlers +ffffffff821a71d0 t dmub_hpd_callback +ffffffff821a73c0 t handle_hpd_irq +ffffffff821a73d0 t handle_hpd_rx_irq +ffffffff821a7780 t handle_hpd_irq_helper +ffffffff821a7940 t schedule_hpd_rx_offload_work +ffffffff821a7a10 t dm_handle_hpd_rx_offload_work +ffffffff821a7df0 t dm_gpureset_toggle_interrupts +ffffffff821a8030 t s3_handle_mst +ffffffff821a9000 T amdgpu_dm_init_color_mod +ffffffff821a9010 T amdgpu_dm_verify_lut_sizes +ffffffff821a90f0 T amdgpu_dm_update_crtc_color_mgmt +ffffffff821a97e0 T amdgpu_dm_update_plane_color_mgmt +ffffffff821aa000 T amdgpu_dm_crtc_handle_vblank +ffffffff821aa090 T amdgpu_dm_crtc_modeset_required +ffffffff821aa0d0 T amdgpu_dm_crtc_vrr_active_irq +ffffffff821aa110 T amdgpu_dm_crtc_set_vupdate_irq +ffffffff821aa1d0 T amdgpu_dm_crtc_vrr_active +ffffffff821aa210 T amdgpu_dm_crtc_enable_vblank +ffffffff821aa230 t dm_set_vblank +ffffffff821aa4f0 T amdgpu_dm_crtc_disable_vblank +ffffffff821aa510 T amdgpu_dm_crtc_init +ffffffff821aa730 t vblank_control_worker +ffffffff821aa880 t dm_crtc_reset_state +ffffffff821aa930 t amdgpu_dm_crtc_destroy +ffffffff821aa970 t dm_crtc_duplicate_state +ffffffff821aab40 t dm_crtc_destroy_state +ffffffff821aab90 t dm_crtc_helper_mode_fixup +ffffffff821aabc0 t dm_crtc_helper_disable +ffffffff821aabf0 t dm_crtc_helper_atomic_check +ffffffff821ab000 T hdcp_update_display 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+ffffffff821ad7f0 T dm_helpers_dp_mst_send_payload_allocation +ffffffff821ad8d0 T dm_dtn_log_begin +ffffffff821ad920 T dm_dtn_log_append_v +ffffffff821adaa0 T dm_dtn_log_end +ffffffff821adaf0 T dm_helpers_dp_mst_start_top_mgr +ffffffff821adbd0 T dm_helpers_dp_mst_stop_top_mgr +ffffffff821adc80 T dm_helpers_dp_read_dpcd +ffffffff821add20 T dm_helpers_dp_write_dpcd +ffffffff821addb0 T dm_helpers_submit_i2c +ffffffff821adf00 T dm_helpers_dp_write_dsc_enable +ffffffff821ae640 T dm_helpers_is_dp_sink_present +ffffffff821ae6f0 T dm_helpers_read_local_edid +ffffffff821ae9a0 T dm_helper_dmub_aux_transfer_sync +ffffffff821ae9f0 T dm_helpers_dmub_set_config_sync +ffffffff821aea10 T dm_set_dcn_clocks +ffffffff821aea40 T dm_helpers_smu_timeout +ffffffff821aea70 T dm_helpers_init_panel_settings +ffffffff821aeae0 T dm_helpers_override_panel_settings +ffffffff821aeb20 T dm_helpers_allocate_gpu_mem +ffffffff821aec30 T dm_helpers_free_gpu_mem +ffffffff821aecd0 T dm_helpers_dmub_outbox_interrupt_control +ffffffff821aed70 T dm_helpers_mst_enable_stream_features +ffffffff821aeea0 T dm_helpers_dp_handle_test_pattern_request +ffffffff821af1f0 T dm_set_phyd32clk +ffffffff821af220 T dm_helpers_enable_periodic_detection +ffffffff821af250 T dm_helpers_dp_mst_update_branch_bandwidth +ffffffff821af280 T dm_get_adaptive_sync_support_type +ffffffff821af2f0 t execute_synaptics_rc_command +ffffffff821b0000 T amdgpu_dm_irq_register_interrupt +ffffffff821b01d0 t dm_irq_work_func +ffffffff821b01f0 T amdgpu_dm_irq_unregister_interrupt +ffffffff821b03b0 T amdgpu_dm_irq_init +ffffffff821b04b0 T amdgpu_dm_irq_fini +ffffffff821b0680 T amdgpu_dm_irq_suspend +ffffffff821b07d0 T amdgpu_dm_irq_resume_early +ffffffff821b09a0 T amdgpu_dm_irq_resume_late +ffffffff821b0b70 T amdgpu_dm_set_irq_funcs +ffffffff821b0c30 T amdgpu_dm_outbox_init +ffffffff821b0c60 T amdgpu_dm_hpd_init +ffffffff821b0d30 T amdgpu_dm_hpd_fini +ffffffff821b0e00 t amdgpu_dm_set_crtc_irq_state +ffffffff821b0e90 t amdgpu_dm_irq_handler +ffffffff821b10f0 t amdgpu_dm_set_vline0_irq_state +ffffffff821b1180 t amdgpu_dm_set_dmub_outbox_irq_state +ffffffff821b11e0 t amdgpu_dm_set_vupdate_irq_state +ffffffff821b1270 t amdgpu_dm_set_dmub_trace_irq_state +ffffffff821b12d0 t amdgpu_dm_set_pflip_irq_state +ffffffff821b1360 t amdgpu_dm_set_hpd_irq_state +ffffffff821b2000 T needs_dsc_aux_workaround +ffffffff821b2050 T dm_dp_create_fake_mst_encoders +ffffffff821b2110 T dm_handle_mst_sideband_msg_ready_event +ffffffff821b23b0 T amdgpu_dm_initialize_dp_connector +ffffffff821b24d0 t kasprintf +ffffffff821b25b0 t dm_dp_aux_transfer +ffffffff821b2700 T dm_mst_get_pbn_divider +ffffffff821b2770 T compute_mst_dsc_configs_for_state +ffffffff821b2a30 t is_dsc_need_re_compute +ffffffff821b2c00 t compute_mst_dsc_configs_for_link +ffffffff821b32c0 T pre_validate_dsc +ffffffff821b38e0 T dm_dp_mst_is_port_support_mode +ffffffff821b3ba0 t amdgpu_dm_encoder_destroy +ffffffff821b3bb0 t dm_dp_add_mst_connector +ffffffff821b3de0 t dm_handle_mst_down_rep_msg_ready +ffffffff821b3e00 t amdgpu_dm_mst_connector_late_register +ffffffff821b3e50 t amdgpu_dm_mst_connector_early_unregister +ffffffff821b3f70 t dm_dp_mst_connector_destroy +ffffffff821b4010 t dm_dp_mst_get_modes +ffffffff821b45a0 t dm_dp_mst_detect +ffffffff821b47c0 t dm_mst_atomic_best_encoder +ffffffff821b4820 t dm_dp_mst_atomic_check +ffffffff821b4850 t set_dsc_configs_from_fairness_vars +ffffffff821b4b40 t increase_dsc_bpp +ffffffff821b50e0 t try_disable_dsc +ffffffff821b6000 T amdgpu_dm_plane_get_format_info +ffffffff821b6020 T amdgpu_dm_plane_fill_blending_from_plane_state +ffffffff821b6120 T amdgpu_dm_plane_fill_plane_buffer_attributes +ffffffff821b66a0 T amdgpu_dm_plane_helper_check_state +ffffffff821b68c0 T amdgpu_dm_plane_fill_dc_scaling_info +ffffffff821b6b20 T amdgpu_dm_plane_handle_cursor_update +ffffffff821b6e00 T amdgpu_dm_plane_init +ffffffff821b7db0 T is_video_format +ffffffff821b7e00 t dm_drm_plane_reset +ffffffff821b7ea0 t dm_drm_plane_duplicate_state +ffffffff821b7f40 t dm_drm_plane_destroy_state +ffffffff821b7f80 t dm_plane_format_mod_supported +ffffffff821b80b0 t dm_plane_helper_prepare_fb +ffffffff821b8430 t dm_plane_helper_cleanup_fb +ffffffff821b84e0 t dm_plane_atomic_check +ffffffff821b85d0 t dm_plane_atomic_async_check +ffffffff821b8610 t dm_plane_atomic_async_update +ffffffff821b86c0 t amdgpu_bo_reserve +ffffffff821b8900 t amdgpu_bo_unreserve +ffffffff821b9000 T dm_pp_apply_display_requirements +ffffffff821b91f0 T dm_pp_get_clock_levels_by_type +ffffffff821b95b0 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff821b97a0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff821b9990 T dm_pp_notify_wm_clock_changes +ffffffff821b99f0 T dm_pp_apply_power_level_change_request +ffffffff821b9a20 T dm_pp_apply_clock_for_voltage_request +ffffffff821b9ad0 T dm_pp_get_static_clocks +ffffffff821b9ba0 T dm_pp_get_funcs +ffffffff821b9cb0 t pp_rv_set_wm_ranges +ffffffff821b9e40 t pp_rv_set_pme_wa_enable +ffffffff821b9e60 t pp_rv_set_active_display_count +ffffffff821b9e80 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff821b9ea0 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff821b9ec0 t pp_rv_set_hard_min_fclk_by_freq +ffffffff821b9ee0 t pp_nv_set_display_count +ffffffff821b9f40 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff821b9fb0 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff821ba010 t pp_nv_set_voltage_by_freq +ffffffff821ba0b0 t pp_nv_set_wm_ranges +ffffffff821ba100 t pp_nv_set_hard_min_uclk_by_freq +ffffffff821ba170 t pp_nv_get_maximum_sustainable_clocks +ffffffff821ba1d0 t pp_nv_get_uclk_dpm_states +ffffffff821ba230 t pp_nv_set_pstate_handshake_support +ffffffff821ba290 t pp_rn_set_wm_ranges +ffffffff821ba2e0 t pp_rn_get_dpm_clock_table +ffffffff821bb000 T amdgpu_dm_set_psr_caps +ffffffff821bb160 T amdgpu_dm_link_setup_psr +ffffffff821bb320 T amdgpu_dm_psr_enable +ffffffff821bb430 T amdgpu_dm_psr_disable +ffffffff821bb4c0 T amdgpu_dm_psr_disable_all +ffffffff821bc000 T amdgpu_dm_setup_replay +ffffffff821bc100 T amdgpu_dm_replay_enable +ffffffff821bc2b0 T amdgpu_dm_replay_disable +ffffffff821bd000 T dm_get_elapse_time_in_ns +ffffffff821bd030 T dm_perf_trace_timestamp +ffffffff821be000 T dc_assert_fp_enabled +ffffffff821be080 T dc_fpu_begin +ffffffff821be0d0 T dc_fpu_end +ffffffff821bf000 T dal_vector_construct +ffffffff821bf0e0 T dal_vector_presized_create +ffffffff821bf3a0 T dal_vector_create +ffffffff821bf4e0 T dal_vector_destruct +ffffffff821bf540 T dal_vector_destroy +ffffffff821bf5d0 T dal_vector_get_count +ffffffff821bf600 T dal_vector_at_index +ffffffff821bf640 T dal_vector_remove_at_index +ffffffff821bf6e0 T dal_vector_set_at_index +ffffffff821bf740 T dal_vector_insert_at +ffffffff821bf870 T dal_vector_reserve +ffffffff821bf930 T dal_vector_append +ffffffff821bfa60 T dal_vector_clone +ffffffff821bfb20 T dal_vector_capacity +ffffffff821bfb50 T dal_vector_clear +ffffffff821c0000 T fixed_point_to_int_frac +ffffffff821c0220 T convert_float_matrix +ffffffff821c02f0 T reduce_fraction +ffffffff821c1000 T is_rgb_cspace +ffffffff821c1090 T is_lower_pipe_tree_visible +ffffffff821c1100 T is_upper_pipe_tree_visible +ffffffff821c1170 T is_pipe_tree_visible +ffffffff821c1200 T build_prescale_params +ffffffff821c2000 T dc_fixpt_from_fraction +ffffffff821c21e0 T dc_fixpt_mul +ffffffff821c23a0 T dc_fixpt_sqr +ffffffff821c2520 T dc_fixpt_recip +ffffffff821c2590 T dc_fixpt_sinc +ffffffff821c27d0 T dc_fixpt_sin +ffffffff821c2800 T dc_fixpt_cos +ffffffff821c2920 T dc_fixpt_exp +ffffffff821c2c40 t fixed31_32_exp_from_taylor_series +ffffffff821c3110 T dc_fixpt_log +ffffffff821c3350 T dc_fixpt_u4d19 +ffffffff821c3390 T dc_fixpt_u3d19 +ffffffff821c33d0 T dc_fixpt_u2d19 +ffffffff821c3410 T dc_fixpt_u0d19 +ffffffff821c3440 T dc_fixpt_clamp_u0d14 +ffffffff821c3490 T dc_fixpt_clamp_u0d10 +ffffffff821c34e0 T dc_fixpt_s4d19 +ffffffff821c4000 T bios_parser_create +ffffffff821c5380 t bios_parser_get_connectors_number +ffffffff821c53e0 t bios_parser_get_connector_id +ffffffff821c5490 t bios_parser_get_src_obj +ffffffff821c55c0 t bios_parser_get_i2c_info +ffffffff821c5800 t bios_parser_get_hpd_info +ffffffff821c58f0 t bios_parser_get_device_tag +ffffffff821c5b10 t bios_parser_get_spread_spectrum_info +ffffffff821c5d30 t bios_parser_get_ss_entry_number +ffffffff821c5fa0 t bios_parser_get_embedded_panel_info +ffffffff821c6530 t bios_parser_get_gpio_pin_info +ffffffff821c6650 t bios_parser_get_encoder_cap_info +ffffffff821c6760 t bios_parser_set_scratch_critical_state +ffffffff821c6770 t bios_parser_is_device_id_supported +ffffffff821c6830 t bios_parser_encoder_control +ffffffff821c6870 t bios_parser_transmitter_control +ffffffff821c68b0 t bios_parser_enable_crtc +ffffffff821c6900 t bios_parser_adjust_pixel_clock +ffffffff821c6940 t bios_parser_set_pixel_clock +ffffffff821c6980 t bios_parser_set_dce_clock +ffffffff821c69c0 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff821c6a10 t bios_parser_program_crtc_timing +ffffffff821c6a50 t bios_parser_program_display_engine_pll +ffffffff821c6a90 t bios_parser_enable_disp_power_gating +ffffffff821c6ad0 t bios_parser_destroy +ffffffff821c6bb0 t bios_get_board_layout_info +ffffffff821c6e50 t get_bios_object +ffffffff821c7050 t get_ss_info_from_ss_info_table +ffffffff821c7240 t get_ss_info_v3_1 +ffffffff821c73d0 t get_ss_entry_number_from_ss_info_tbl +ffffffff821c8000 T firmware_parser_create +ffffffff821ca000 t bios_parser_get_connectors_number +ffffffff821ca170 t bios_parser_get_connector_id +ffffffff821ca1d0 t bios_parser_get_src_obj +ffffffff821ca4b0 t bios_parser_get_i2c_info +ffffffff821ca780 t bios_parser_get_hpd_info +ffffffff821ca920 t bios_parser_get_device_tag +ffffffff821cac10 t bios_parser_get_spread_spectrum_info +ffffffff821cb0c0 t bios_parser_get_ss_entry_number +ffffffff821cb0f0 t bios_parser_get_embedded_panel_info +ffffffff821cb300 t bios_parser_get_gpio_pin_info +ffffffff821cb420 t bios_parser_get_encoder_cap_info +ffffffff821cb590 t bios_parser_is_accelerated_mode +ffffffff821cb5a0 t bios_parser_set_scratch_critical_state +ffffffff821cb5b0 t bios_parser_is_device_id_supported +ffffffff821cb620 t bios_parser_encoder_control +ffffffff821cb660 t bios_parser_transmitter_control +ffffffff821cb6a0 t bios_parser_enable_crtc +ffffffff821cb6f0 t bios_parser_set_pixel_clock +ffffffff821cb730 t bios_parser_set_dce_clock +ffffffff821cb770 t bios_parser_program_crtc_timing +ffffffff821cb7b0 t bios_parser_enable_disp_power_gating +ffffffff821cb7f0 t firmware_parser_destroy +ffffffff821cb8d0 t bios_get_board_layout_info +ffffffff821cbdc0 t bios_parser_pack_data_tables +ffffffff821cbdf0 t bios_get_atom_dc_golden_table +ffffffff821cbf50 t bios_parser_enable_lvtma_control +ffffffff821cbfa0 t bios_parser_get_soc_bb_info +ffffffff821cc0b0 t bios_parser_get_disp_connector_caps_info +ffffffff821cc230 t bios_parser_get_lttpr_caps +ffffffff821cc3a0 t bios_parser_get_lttpr_interop +ffffffff821cc500 t bios_parser_get_connector_speed_cap_info +ffffffff821cc650 t get_bios_object +ffffffff821cc7c0 t get_bios_object_from_path_v3 +ffffffff821cd000 T object_id_from_bios_object_id +ffffffff821ce000 T bios_get_image +ffffffff821ce050 T bios_is_accelerated_mode +ffffffff821ce0b0 T bios_set_scratch_acc_mode_change +ffffffff821ce0f0 T bios_set_scratch_critical_state +ffffffff821ce130 T bios_get_vga_enabled_displays +ffffffff821cf000 T dal_bios_parser_create +ffffffff821cf070 T dal_bios_parser_destroy +ffffffff821d0000 T dal_bios_parser_init_cmd_tbl +ffffffff821d0910 t encoder_control_digx_v3 +ffffffff821d0a30 t encoder_control_digx_v4 +ffffffff821d0b50 t encoder_control_digx_v5 +ffffffff821d0cb0 t encoder_control_dig1_v1 +ffffffff821d0d50 t encoder_control_dig2_v1 +ffffffff821d0df0 t encoder_control_dig_v1 +ffffffff821d0e50 t transmitter_control_v2 +ffffffff821d1000 t transmitter_control_v3 +ffffffff821d11d0 t transmitter_control_v4 +ffffffff821d1390 t transmitter_control_v1_5 +ffffffff821d1530 t transmitter_control_v1_6 +ffffffff821d16b0 t set_pixel_clock_v3 +ffffffff821d1850 t set_pixel_clock_v5 +ffffffff821d1a20 t set_pixel_clock_v6 +ffffffff821d1bf0 t set_pixel_clock_v7 +ffffffff821d1e00 t enable_spread_spectrum_on_ppll_v1 +ffffffff821d1f20 t enable_spread_spectrum_on_ppll_v2 +ffffffff821d2060 t enable_spread_spectrum_on_ppll_v3 +ffffffff821d2180 t adjust_display_pll_v2 +ffffffff821d22f0 t adjust_display_pll_v3 +ffffffff821d2490 t dac1_encoder_control_v1 +ffffffff821d2510 t dac2_encoder_control_v1 +ffffffff821d2590 t dac1_output_control_v1 +ffffffff821d2600 t dac2_output_control_v1 +ffffffff821d2670 t set_crtc_using_dtd_timing_v3 +ffffffff821d27e0 t set_crtc_timing_v1 +ffffffff821d2980 t enable_crtc_v1 +ffffffff821d2a30 t enable_crtc_mem_req_v1 +ffffffff821d2ae0 t program_clock_v5 +ffffffff821d2c00 t program_clock_v6 +ffffffff821d2d30 t external_encoder_control_v3 +ffffffff821d2f00 t enable_disp_power_gating_v2_1 +ffffffff821d2fe0 t set_dce_clock_v2_1 +ffffffff821d4000 T dal_firmware_parser_init_cmd_tbl +ffffffff821d4460 t encoder_control_digx_v1_5 +ffffffff821d4650 t encoder_control_fallback +ffffffff821d46b0 t transmitter_control_v1_6 +ffffffff821d4880 t transmitter_control_v1_7 +ffffffff821d4aa0 t transmitter_control_fallback +ffffffff821d4b00 t set_pixel_clock_v7 +ffffffff821d4d90 t set_pixel_clock_fallback +ffffffff821d4df0 t set_crtc_using_dtd_timing_v3 +ffffffff821d4f60 t enable_crtc_v1 +ffffffff821d5010 t external_encoder_control_v3 +ffffffff821d5040 t enable_disp_power_gating_v2_1 +ffffffff821d51c0 t enable_disp_power_gating_fallback +ffffffff821d5220 t set_dce_clock_v2_1 +ffffffff821d5360 t get_smu_clock_info_v3_1 +ffffffff821d53d0 t enable_lvtma_control +ffffffff821d6000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff821d60c0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff821d61e0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff821d6270 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff821d6300 T dal_cmd_table_helper_assign_control_parameter +ffffffff821d63e0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff821d64c0 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff821d7000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff821d70d0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff821d71e0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff821d7270 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff821d7300 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff821d73e0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff821d8000 T dal_cmd_tbl_helper_dce110_get_table +ffffffff821d8030 t encoder_action_to_atom +ffffffff821d80b0 t engine_bp_to_atom +ffffffff821d8100 t clock_source_id_to_atom +ffffffff821d81a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff821d81f0 t signal_type_to_atom_dig_mode +ffffffff821d8250 t hpd_sel_to_atom +ffffffff821d8290 t dig_encoder_sel_to_atom +ffffffff821d82c0 t phy_id_to_atom +ffffffff821d8300 t disp_power_gating_action_to_atom +ffffffff821d9000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff821d9030 t encoder_action_to_atom ffffffff821d90b0 t engine_bp_to_atom ffffffff821d9100 t clock_source_id_to_atom -ffffffff821d91a0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff821d91f0 t signal_type_to_atom_dig_mode -ffffffff821d9250 t hpd_sel_to_atom -ffffffff821d9290 t dig_encoder_sel_to_atom -ffffffff821d92c0 t phy_id_to_atom -ffffffff821d9300 t disp_power_gating_action_to_atom -ffffffff821da000 T dal_cmd_tbl_helper_dce112_get_table2 +ffffffff821d91d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff821d9220 t signal_type_to_atom_dig_mode +ffffffff821d9280 t hpd_sel_to_atom +ffffffff821d92c0 t dig_encoder_sel_to_atom +ffffffff821d92f0 t phy_id_to_atom +ffffffff821d9330 t disp_power_gating_action_to_atom +ffffffff821d93a0 t dc_clock_type_to_atom +ffffffff821d9420 t transmitter_color_depth_to_atom +ffffffff821da000 T dal_cmd_tbl_helper_dce112_get_table ffffffff821da030 t encoder_action_to_atom ffffffff821da0b0 t engine_bp_to_atom ffffffff821da100 t clock_source_id_to_atom @@ -32506,7 +32520,7 @@ ffffffff821da2f0 t phy_id_to_atom ffffffff821da330 t disp_power_gating_action_to_atom ffffffff821da3a0 t dc_clock_type_to_atom ffffffff821da420 t transmitter_color_depth_to_atom -ffffffff821db000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff821db000 T dal_cmd_tbl_helper_dce80_get_table ffffffff821db030 t encoder_action_to_atom ffffffff821db0b0 t engine_bp_to_atom ffffffff821db100 t clock_source_id_to_atom @@ -32514,26511 +32528,26499 @@ ffffffff821db1d0 t clock_source_id_to_atom_phy_clk_src ffffffff821db220 t signal_type_to_atom_dig_mode ffffffff821db280 t hpd_sel_to_atom ffffffff821db2c0 t dig_encoder_sel_to_atom -ffffffff821db2f0 t phy_id_to_atom -ffffffff821db330 t disp_power_gating_action_to_atom -ffffffff821db3a0 t dc_clock_type_to_atom -ffffffff821db420 t transmitter_color_depth_to_atom -ffffffff821dc000 T dal_cmd_tbl_helper_dce80_get_table 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dcn301_smu_set_display_idle_optimization +ffffffff821ed630 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff821ed690 T dcn301_smu_enable_pme_wa +ffffffff821ed6b0 T dcn301_smu_set_dram_addr_high +ffffffff821ed710 T dcn301_smu_set_dram_addr_low +ffffffff821ed770 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff821ed790 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff821ee000 T vg_clk_mgr_construct +ffffffff821ee930 T vg_clk_mgr_destroy +ffffffff821ee980 t vg_update_clocks +ffffffff821eed00 t vg_init_clocks +ffffffff821eeda0 t vg_enable_pme_wa +ffffffff821eedb0 t vg_are_clock_states_equal +ffffffff821eee00 t vg_notify_wm_ranges +ffffffff821f0000 T dcn31_update_clocks +ffffffff821f06a0 T dcn31_init_clocks +ffffffff821f0750 T dcn31_are_clock_states_equal +ffffffff821f07b0 T dcn31_get_dtb_ref_freq_khz +ffffffff821f07e0 T dcn31_clk_mgr_construct +ffffffff821f0f50 T dcn31_clk_mgr_destroy +ffffffff821f0fa0 t dcn31_set_low_power_state +ffffffff821f11c0 t dcn31_enable_pme_wa +ffffffff821f11d0 t dcn31_notify_wm_ranges +ffffffff821f1570 t find_clk_for_voltage +ffffffff821f2000 T dcn31_smu_get_smu_version +ffffffff821f2020 t dcn31_smu_send_msg_with_param +ffffffff821f2290 T dcn31_smu_set_dispclk +ffffffff821f2310 T dcn31_smu_set_dprefclk +ffffffff821f2390 T dcn31_smu_set_hard_min_dcfclk +ffffffff821f2420 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff821f24b0 T dcn31_smu_set_dppclk +ffffffff821f2530 T dcn31_smu_set_display_idle_optimization +ffffffff821f2580 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff821f25d0 T dcn31_smu_enable_pme_wa +ffffffff821f2610 T dcn31_smu_set_dram_addr_high +ffffffff821f2650 T dcn31_smu_set_dram_addr_low +ffffffff821f2690 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff821f26d0 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff821f2710 T dcn31_smu_set_zstate_support +ffffffff821f2780 T dcn31_smu_set_dtbclk +ffffffff821f3000 T dcn314_update_clocks +ffffffff821f36d0 T dcn314_are_clock_states_equal +ffffffff821f3730 T dcn314_clk_mgr_construct +ffffffff821f44f0 T dcn314_clk_mgr_destroy +ffffffff821f4540 t dcn314_enable_pme_wa +ffffffff821f4550 t dcn314_notify_wm_ranges +ffffffff821f5000 T dcn314_smu_get_smu_version +ffffffff821f5020 t dcn314_smu_send_msg_with_param +ffffffff821f52b0 T dcn314_smu_set_dispclk +ffffffff821f5330 T dcn314_smu_set_dprefclk +ffffffff821f53b0 T dcn314_smu_set_hard_min_dcfclk +ffffffff821f5440 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff821f54d0 T dcn314_smu_set_dppclk +ffffffff821f5550 T dcn314_smu_set_display_idle_optimization +ffffffff821f55a0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff821f55f0 T dcn314_smu_enable_pme_wa +ffffffff821f5630 T dcn314_smu_set_dram_addr_high +ffffffff821f5670 T dcn314_smu_set_dram_addr_low +ffffffff821f56b0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff821f56f0 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff821f5730 T dcn314_smu_set_zstate_support +ffffffff821f5780 T dcn314_smu_set_dtbclk +ffffffff821f6000 T dcn315_clk_mgr_construct +ffffffff821f6890 T dcn315_clk_mgr_destroy +ffffffff821f68e0 t dcn315_update_clocks +ffffffff821f6ef0 t dcn315_enable_pme_wa +ffffffff821f6f00 t dcn315_notify_wm_ranges +ffffffff821f72a0 t dcn315_disable_otg_wa +ffffffff821f8000 T dcn315_smu_get_smu_version +ffffffff821f8020 t dcn315_smu_send_msg_with_param +ffffffff821f83d0 T dcn315_smu_set_dispclk +ffffffff821f8450 T dcn315_smu_set_hard_min_dcfclk +ffffffff821f84e0 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff821f8570 T dcn315_smu_set_dppclk +ffffffff821f85f0 T dcn315_smu_set_display_idle_optimization +ffffffff821f8640 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff821f8690 T dcn315_smu_enable_pme_wa +ffffffff821f86d0 T dcn315_smu_set_dram_addr_high +ffffffff821f8710 T dcn315_smu_set_dram_addr_low +ffffffff821f8750 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff821f8790 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff821f87d0 T dcn315_smu_get_dpref_clk +ffffffff821f8830 T dcn315_smu_get_dtbclk +ffffffff821f8890 T dcn315_smu_set_dtbclk +ffffffff821f9000 T dcn316_clk_mgr_construct +ffffffff821f96e0 T dcn316_clk_mgr_destroy +ffffffff821f9730 t dcn316_update_clocks +ffffffff821f9da0 t dcn316_enable_pme_wa +ffffffff821f9db0 t dcn316_notify_wm_ranges +ffffffff821fa150 t find_clk_for_voltage +ffffffff821fb000 T dcn316_smu_get_smu_version +ffffffff821fb020 t dcn316_smu_send_msg_with_param +ffffffff821fb200 T dcn316_smu_set_dispclk +ffffffff821fb280 T dcn316_smu_set_hard_min_dcfclk +ffffffff821fb310 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff821fb3a0 T dcn316_smu_set_dppclk +ffffffff821fb420 T dcn316_smu_set_display_idle_optimization +ffffffff821fb470 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff821fb4c0 T dcn316_smu_set_dram_addr_high +ffffffff821fb500 T dcn316_smu_set_dram_addr_low +ffffffff821fb540 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff821fb580 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff821fb5c0 T dcn316_smu_enable_pme_wa +ffffffff821fb600 T dcn316_smu_set_dtbclk +ffffffff821fb640 T dcn316_smu_get_dpref_clk +ffffffff821fb6a0 T dcn316_smu_get_smu_fclk +ffffffff821fc000 T dcn32_init_clocks +ffffffff821fc620 T dcn32_update_clocks_update_dpp_dto +ffffffff821fc760 T dcn32_clk_mgr_construct +ffffffff821fca70 t dcn32_dump_clk_registers +ffffffff821fcd10 T dcn32_clk_mgr_destroy +ffffffff821fcd80 t dcn32_update_clocks +ffffffff821fd6e0 t dcn32_enable_pme_wa +ffffffff821fd720 t dcn32_are_clock_states_equal +ffffffff821fd790 t dcn32_notify_wm_ranges +ffffffff821fd920 t dcn32_set_hard_min_memclk +ffffffff821fd9b0 t dcn32_set_hard_max_memclk +ffffffff821fda00 t dcn32_set_max_memclk +ffffffff821fda40 t dcn32_set_min_memclk +ffffffff821fda80 t dcn32_get_memclk_states_from_smu +ffffffff821fdd10 t dcn32_is_smu_present +ffffffff821fdd40 t dcn32_get_dispclk_from_dentist +ffffffff821fdde0 t dcn32_update_clocks_update_dentist +ffffffff821ff000 T dcn32_smu_send_fclk_pstate_message +ffffffff821ff020 t dcn32_smu_send_msg_with_param +ffffffff821ff1a0 T dcn32_smu_send_cab_for_uclk_message +ffffffff821ff1d0 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff821ff1f0 T dcn32_smu_set_pme_workaround +ffffffff821ff210 T dcn32_smu_set_hard_min_by_freq +ffffffff821ff270 T dcn32_smu_wait_for_dmub_ack_mclk +ffffffff82200000 T dc_stream_adjust_vmin_vmax +ffffffff82200170 T dc_stream_get_last_used_drr_vtotal +ffffffff822002e0 T dc_stream_get_crtc_position +ffffffff82200540 T dc_stream_configure_crc +ffffffff822006d0 T dc_stream_get_crc +ffffffff822007c0 T dc_stream_set_dyn_expansion +ffffffff82200a50 T dc_stream_set_dither_option +ffffffff82200bf0 T dc_stream_set_gamut_remap +ffffffff82200da0 T dc_stream_program_csc_matrix +ffffffff82201000 T dc_stream_set_static_screen_params +ffffffff82201190 T dc_create +ffffffff822017e0 t dc_construct_ctx +ffffffff82201980 t dc_destruct +ffffffff82201ce0 T dc_hardware_init +ffffffff82201db0 T dc_init_callbacks +ffffffff82201e00 T dc_deinit_callbacks +ffffffff82201e50 T dc_destroy +ffffffff82201ec0 T dc_validate_boot_timing +ffffffff822022d0 T dc_enable_stereo +ffffffff822023e0 T dc_trigger_sync +ffffffff82202a40 T dc_z10_restore +ffffffff82202a80 T dc_z10_save_init +ffffffff82202ac0 T dc_commit_streams +ffffffff82203010 t commit_minimal_transition_state +ffffffff82203490 T dc_create_state +ffffffff82203530 t dc_commit_state_no_check +ffffffff82204e70 T dc_release_state +ffffffff82204ee0 T dc_acquire_release_mpc_3dlut +ffffffff82204fb0 T dc_post_update_surfaces_to_stream +ffffffff82205430 T dc_copy_state +ffffffff82205620 T dc_retain_state +ffffffff82205650 T dc_set_generic_gpio_for_stereo +ffffffff822057b0 T dc_check_update_surfaces_for_stream +ffffffff822061c0 T dc_dmub_update_dirty_rect +ffffffff822063d0 T dc_update_planes_and_stream +ffffffff82207070 t fast_update_only +ffffffff822073d0 t commit_planes_for_stream_fast +ffffffff82207820 t commit_planes_for_stream +ffffffff82208f90 T dc_commit_updates_for_stream +ffffffff82209670 t copy_surface_update_to_plane +ffffffff82209a90 t copy_stream_update_to_stream +ffffffff8220a190 T dc_get_current_stream_count +ffffffff8220a1d0 T dc_get_stream_at_index +ffffffff8220a220 T dc_interrupt_to_irq_source +ffffffff8220a240 T dc_interrupt_set +ffffffff8220a290 T dc_interrupt_ack +ffffffff8220a2b0 T dc_power_down_on_boot +ffffffff8220a300 T dc_set_power_state +ffffffff8220a530 T dc_resume +ffffffff8220a5b0 T dc_is_dmcu_initialized +ffffffff8220a600 T get_clock_requirements_for_state +ffffffff8220a680 T dc_set_clock +ffffffff8220a6c0 T dc_get_clock +ffffffff8220a700 T dc_set_psr_allow_active +ffffffff8220a810 T dc_allow_idle_optimizations +ffffffff8220a8d0 T dc_unlock_memory_clock_frequency +ffffffff8220a950 T dc_lock_memory_clock_frequency +ffffffff8220a9f0 T dc_enable_dcmode_clk_limit +ffffffff8220abc0 t blank_and_force_memclk +ffffffff8220adf0 T dc_is_plane_eligible_for_idle_optimizations +ffffffff8220ae50 T dc_hardware_release +ffffffff8220aea0 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff8220aee0 T dc_is_dmub_outbox_supported +ffffffff8220af50 T dc_enable_dmub_notifications +ffffffff8220afc0 T dc_enable_dmub_outbox +ffffffff8220b010 T dc_process_dmub_aux_transfer_async +ffffffff8220b1a0 T get_link_index_from_dpia_port_index +ffffffff8220b260 T dc_process_dmub_set_config_async +ffffffff8220b340 T dc_process_dmub_set_mst_slots +ffffffff8220b430 T dc_process_dmub_dpia_hpd_int_enable +ffffffff8220b500 T dc_print_dmub_diagnostic_data +ffffffff8220b520 T dc_disable_accelerated_mode +ffffffff8220b540 T dc_notify_vsync_int_state +ffffffff8220b770 T dc_abm_save_restore +ffffffff8220b960 T dc_query_current_properties +ffffffff8220b9d0 T dc_set_edp_power +ffffffff8220ba40 t create_links +ffffffff8220bef0 t create_link_encoders +ffffffff8220bfe0 t dc_update_viusal_confirm_color +ffffffff8220d000 T pre_surface_trace +ffffffff8220d030 T update_surface_trace +ffffffff8220d060 T post_surface_trace +ffffffff8220d090 T context_timing_trace +ffffffff8220d260 T context_clock_trace +ffffffff8220d290 T dc_status_to_str +ffffffff8220e000 T find_color_matrix +ffffffff8220e0b0 T color_space_to_black_color +ffffffff8220e120 T hwss_wait_for_blank_complete +ffffffff8220e1d0 T get_mpctree_visual_confirm_color +ffffffff8220e230 T get_surface_visual_confirm_color +ffffffff8220e2e0 T get_hdr_visual_confirm_color +ffffffff8220e3a0 T get_subvp_visual_confirm_color +ffffffff8220e4a0 T hwss_build_fast_sequence +ffffffff8220eb60 T hwss_execute_sequence +ffffffff8220efc0 T hwss_setup_dpp +ffffffff8220f060 T hwss_program_bias_and_scale +ffffffff8220f0e0 T hwss_program_manual_trigger +ffffffff8220f130 T hwss_power_on_mpc_mem_pwr +ffffffff8220f180 T hwss_set_output_csc +ffffffff8220f1d0 T hwss_set_ocsc_default +ffffffff8220f220 T hwss_send_dmcub_cmd +ffffffff8220f240 T get_mclk_switch_visual_confirm_color +ffffffff8220f3a0 T get_surface_tile_visual_confirm_color +ffffffff82210000 T link_enc_cfg_init +ffffffff822101f0 T link_enc_cfg_copy +ffffffff82210220 T link_enc_cfg_link_encs_assign +ffffffff822116c0 T link_enc_cfg_validate +ffffffff82211e70 T link_enc_cfg_link_enc_unassign +ffffffff82212000 T link_enc_cfg_is_transmitter_mappable +ffffffff82212120 T link_enc_cfg_get_stream_using_link_enc +ffffffff82212220 T link_enc_cfg_get_link_using_link_enc +ffffffff82212330 T link_enc_cfg_get_link_enc_used_by_link +ffffffff822124b0 T link_enc_cfg_get_next_avail_link_enc +ffffffff82212620 T link_enc_cfg_get_link_enc_used_by_stream +ffffffff82212640 T link_enc_cfg_get_link_enc +ffffffff822126d0 T link_enc_cfg_get_link_enc_used_by_stream_current +ffffffff82212850 T link_enc_cfg_is_link_enc_avail +ffffffff82212a50 T link_enc_cfg_set_transient_mode +ffffffff82213000 T dc_get_link_at_index +ffffffff82213030 T dc_get_edp_links +ffffffff822130b0 T dc_get_edp_link_panel_inst +ffffffff82213170 T dc_link_detect +ffffffff822131a0 T dc_link_detect_connection_type +ffffffff822131d0 T dc_link_get_status +ffffffff82213200 T dc_link_is_hdcp14 +ffffffff82213230 T dc_link_is_hdcp22 +ffffffff82213260 T dc_link_clear_dprx_states +ffffffff82213290 T dc_link_reset_cur_dp_mst_topology +ffffffff822132c0 T dc_link_bandwidth_kbps +ffffffff822132f0 T dc_get_cur_link_res_map +ffffffff82213310 T dc_restore_link_res_map +ffffffff82213330 T dc_link_update_dsc_config +ffffffff82213360 T dc_is_oem_i2c_device_present +ffffffff822133b0 T dc_submit_i2c +ffffffff822133e0 T dc_submit_i2c_oem +ffffffff82213430 T dc_link_dp_handle_automated_test +ffffffff82213460 T dc_link_dp_set_test_pattern +ffffffff82213490 T dc_link_set_drive_settings +ffffffff82213530 T dc_link_set_preferred_link_settings +ffffffff82213550 T dc_link_set_preferred_training_settings +ffffffff82213580 T dc_dp_trace_is_initialized +ffffffff822135b0 T dc_dp_trace_set_is_logged_flag +ffffffff822135e0 T dc_dp_trace_is_logged +ffffffff82213610 T dc_dp_trace_get_lt_end_timestamp +ffffffff82213640 T dc_dp_trace_get_lt_counts +ffffffff82213670 T dc_dp_trace_get_link_loss_count +ffffffff822136a0 T dc_link_add_remote_sink +ffffffff822136d0 T dc_link_remove_remote_sink +ffffffff82213700 T dc_link_aux_transfer_raw +ffffffff82213730 T dc_link_bw_kbps_from_raw_frl_link_rate_data +ffffffff82213750 T dc_link_decide_edp_link_settings +ffffffff82213780 T dc_link_dp_get_max_link_enc_cap +ffffffff822137b0 T dc_link_dp_mst_decide_link_encoding_format +ffffffff822137e0 T dc_link_get_link_cap +ffffffff82213810 T dc_link_get_highest_encoding_format +ffffffff822138e0 T dc_link_is_dp_sink_present +ffffffff82213910 T dc_link_is_fec_supported +ffffffff82213940 T dc_link_overwrite_extended_receiver_cap +ffffffff82213970 T dc_link_should_enable_fec +ffffffff822139a0 T dc_link_dp_dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff822139d0 T dc_link_handle_usb4_bw_alloc_response +ffffffff82213a00 T dc_link_check_link_loss_status +ffffffff82213a30 T dc_link_dp_allow_hpd_rx_irq +ffffffff82213a60 T dc_link_dp_handle_link_loss +ffffffff82213a90 T dc_link_dp_read_hpd_rx_irq_data +ffffffff82213ac0 T dc_link_handle_hpd_rx_irq +ffffffff82213af0 T dc_link_dp_receiver_power_ctrl +ffffffff82213b20 T dc_link_decide_lttpr_mode +ffffffff82213b50 T dc_link_edp_panel_backlight_power_on +ffffffff82213b80 T dc_link_get_backlight_level +ffffffff82213bb0 T dc_link_get_backlight_level_nits +ffffffff82213be0 T dc_link_set_backlight_level +ffffffff82213c10 T dc_link_set_backlight_level_nits +ffffffff82213c40 T dc_link_get_target_backlight_pwm +ffffffff82213c70 T dc_link_get_psr_state +ffffffff82213ca0 T dc_link_set_psr_allow_active +ffffffff82213cd0 T dc_link_setup_psr +ffffffff82213d00 T dc_link_get_replay_state +ffffffff82213d30 T dc_link_wait_for_t12 +ffffffff82213d60 T dc_link_get_hpd_state +ffffffff82213d90 T dc_link_enable_hpd +ffffffff82213dc0 T dc_link_disable_hpd +ffffffff82213df0 T dc_link_enable_hpd_filter +ffffffff82213e20 T dc_link_dp_dpia_validate +ffffffff82214000 T resource_parse_asic_id +ffffffff82214250 T dc_create_resource_pool +ffffffff82214620 T dc_destroy_resource_pool +ffffffff82214690 T resource_construct +ffffffff82214c70 T resource_unreference_clock_source +ffffffff82214cf0 T resource_reference_clock_source +ffffffff82214d70 T resource_get_clock_source_reference +ffffffff82214df0 T resource_are_vblanks_synchronizable +ffffffff82215020 T resource_are_streams_timing_synchronizable +ffffffff82215110 T resource_find_used_clk_src_for_sharing +ffffffff82215250 T resource_get_num_mpc_splits +ffffffff822152e0 T resource_get_num_odm_splits +ffffffff822153b0 T resource_get_otg_master +ffffffff82215460 T resource_build_scaling_params +ffffffff822162f0 t calculate_odm_slice_in_timing_active +ffffffff82216490 T resource_build_scaling_params_for_context +ffffffff82216610 T resource_find_free_secondary_pipe_legacy +ffffffff822166b0 T resource_find_free_pipe_used_in_cur_mpc_blending_tree +ffffffff82216720 T resource_is_pipe_type +ffffffff822167a0 T recource_find_free_pipe_not_used_in_cur_res_ctx +ffffffff82216820 T resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine +ffffffff82216940 T resource_is_for_mpcc_combine +ffffffff822169d0 T resource_find_any_free_pipe +ffffffff82216a40 T resource_get_otg_master_for_stream +ffffffff82216b70 T resource_get_opp_head +ffffffff82216c10 T dc_add_plane_to_context +ffffffff82216f10 T dc_remove_plane_from_context +ffffffff82217110 T dc_rem_all_planes_for_stream +ffffffff822172d0 T dc_add_all_planes_for_stream +ffffffff82217450 T dc_is_timing_changed +ffffffff822174c0 T dc_is_stream_unchanged +ffffffff822175b0 T dc_is_stream_scaling_unchanged +ffffffff82217660 T update_audio_usage +ffffffff822176d0 T dc_add_stream_to_ctx +ffffffff822177c0 T dc_remove_stream_from_ctx +ffffffff82217c10 T resource_map_pool_resources +ffffffff82218700 t acquire_first_split_pipe +ffffffff82218880 t add_hpo_dp_link_enc_to_ctx +ffffffff82218950 t find_first_free_audio +ffffffff82218a10 T dc_resource_state_copy_construct_current +ffffffff82218a30 T dc_resource_state_copy_construct +ffffffff82218c00 T dc_resource_state_construct +ffffffff82218c20 T dc_resource_is_dsc_encoding_supported +ffffffff82218c70 T dc_validate_with_context +ffffffff82219930 t planes_changed_for_existing_stream +ffffffff82219ad0 T dc_validate_global_state +ffffffff82219e90 T dc_resource_state_destruct +ffffffff82219f70 T dc_resource_find_first_free_pll +ffffffff82219fe0 T resource_build_info_frame +ffffffff8221a720 T resource_map_clock_resources +ffffffff8221a8d0 T pipe_need_reprogram +ffffffff8221aa50 T resource_build_bit_depth_reduction_params +ffffffff8221ac80 T dc_validate_stream +ffffffff8221ae90 T dc_validate_plane +ffffffff8221af20 T resource_pixel_format_to_bpp +ffffffff8221afa0 T get_audio_check +ffffffff8221b0c0 T get_temp_dp_link_res +ffffffff8221b1d0 T reset_syncd_pipes_from_disabled_pipes +ffffffff8221b320 T check_syncd_pipes_for_disabled_master_pipe +ffffffff8221b480 T reset_sync_context_for_pipe +ffffffff8221b530 T resource_transmitter_to_phy_idx +ffffffff8221b590 T get_link_hwss +ffffffff8221b650 T is_h_timing_divisible_by_2 +ffffffff8221b6b0 T dc_resource_acquire_secondary_pipe_for_mpc_odm +ffffffff8221b8e0 T update_dp_encoder_resources_for_test_harness +ffffffff8221bba0 t calculate_plane_rec_in_timing_active +ffffffff8221bec0 t calculate_init_and_vp +ffffffff8221d000 T dc_sink_retain +ffffffff8221d030 T dc_sink_release +ffffffff8221d0b0 T dc_sink_create +ffffffff8221e000 T dc_stat_get_dmub_notification +ffffffff8221e0d0 T dc_stat_get_dmub_dataout +ffffffff8221f000 T update_stream_signal +ffffffff8221f080 T dc_stream_retain +ffffffff8221f0b0 T dc_stream_release +ffffffff8221f150 T dc_create_stream_for_sink +ffffffff8221f4c0 T dc_copy_stream +ffffffff8221f5a0 T dc_stream_get_status_from_state +ffffffff8221f600 T dc_stream_get_status +ffffffff8221f670 T dc_optimize_timing_for_fsft +ffffffff8221f6c0 T dc_stream_set_cursor_attributes +ffffffff8221f900 t program_cursor_attributes +ffffffff8221fa90 T dc_stream_set_cursor_position +ffffffff8221fbf0 t program_cursor_position +ffffffff8221fd50 T dc_stream_add_writeback +ffffffff8221ff70 T dc_stream_remove_writeback +ffffffff822200b0 T dc_stream_warmup_writeback +ffffffff822200f0 T dc_stream_get_vblank_counter +ffffffff822201c0 T dc_stream_send_dp_sdp +ffffffff822204d0 T dc_stream_get_scanoutpos +ffffffff822205b0 T dc_stream_dmdata_status_done +ffffffff82220670 T dc_stream_set_dynamic_metadata +ffffffff822207e0 T dc_stream_add_dsc_to_resource +ffffffff82220830 T dc_stream_get_pipe_ctx +ffffffff822208e0 T dc_stream_log +ffffffff82221000 T enable_surface_flip_reporting +ffffffff82221030 T dc_create_plane_state +ffffffff82221200 T dc_plane_get_status +ffffffff82221390 T dc_plane_state_retain +ffffffff822213c0 T dc_plane_state_release +ffffffff82221510 T dc_gamma_retain +ffffffff82221540 T dc_gamma_release +ffffffff822215a0 T dc_create_gamma +ffffffff82221600 T dc_transfer_func_retain +ffffffff82221630 T dc_transfer_func_release +ffffffff82221680 T dc_create_transfer_func +ffffffff822216e0 T dc_create_3dlut_func +ffffffff82221740 T dc_3dlut_func_release +ffffffff82221790 T dc_3dlut_func_retain +ffffffff82222000 T vm_helper_mark_vmid_used +ffffffff82222030 T dc_setup_system_context +ffffffff822220d0 T dc_setup_vm_context +ffffffff82222100 T dc_get_vmid_use_vector +ffffffff82222160 T vm_helper_init +ffffffff82223000 T dc_dmub_srv_create +ffffffff822230a0 T dc_dmub_srv_destroy +ffffffff82223100 T dc_dmub_srv_wait_idle +ffffffff82223180 T dc_dmub_srv_log_diagnostic_data +ffffffff822237f0 T dc_dmub_srv_clear_inbox0_ack +ffffffff82223860 T dc_dmub_srv_wait_for_inbox0_ack +ffffffff822238d0 T dc_dmub_srv_send_inbox0_cmd +ffffffff82223940 T dc_dmub_srv_cmd_run +ffffffff82223960 T dc_dmub_srv_cmd_run_list +ffffffff82223b40 T dc_dmub_srv_optimized_init_done +ffffffff82223bd0 T dc_dmub_srv_notify_stream_mask +ffffffff82223c30 T dc_dmub_srv_is_restore_required +ffffffff82223cc0 T dc_dmub_srv_get_dmub_outbox0_msg +ffffffff82223cf0 T dc_dmub_trace_event_control +ffffffff82223d10 T dc_dmub_srv_drr_update_cmd +ffffffff82223db0 T dc_dmub_srv_set_drr_manual_trigger_cmd +ffffffff82223e50 T dc_dmub_srv_p_state_delegate +ffffffff82224200 T dc_dmub_srv_query_caps_cmd +ffffffff822242c0 T dc_dmub_srv_get_visual_confirm_color_cmd +ffffffff822243b0 T dc_dmub_setup_subvp_dmub_command +ffffffff82224e60 T dc_dmub_srv_get_diagnostic_data +ffffffff82224ea0 T dc_send_update_cursor_info_to_dmu +ffffffff82225210 T dc_dmub_check_min_version +ffffffff82225250 T dc_dmub_srv_enable_dpia_trace +ffffffff82226000 T dc_edid_parser_send_cea +ffffffff822260b0 T dc_edid_parser_recv_cea_ack +ffffffff82226140 T dc_edid_parser_recv_amd_vsdb +ffffffff82227000 T generic_reg_update_ex +ffffffff82227370 t set_reg_field_values +ffffffff82227530 T generic_reg_set_ex +ffffffff82227750 T generic_reg_get +ffffffff822277c0 T generic_reg_get2 +ffffffff82227850 T generic_reg_get3 +ffffffff822278f0 T generic_reg_get4 +ffffffff822279a0 T generic_reg_get5 +ffffffff82227a70 T generic_reg_get6 +ffffffff82227b50 T generic_reg_get7 +ffffffff82227c50 T generic_reg_get8 +ffffffff82227d70 T generic_reg_wait +ffffffff82227ff0 T generic_write_indirect_reg +ffffffff82228050 T generic_read_indirect_reg +ffffffff82228110 T generic_indirect_reg_get +ffffffff822282d0 T generic_indirect_reg_update_ex +ffffffff82228500 T generic_indirect_reg_update_ex_sync +ffffffff82228700 T generic_indirect_reg_get_sync +ffffffff82228830 T reg_sequence_start_gather +ffffffff822288d0 T reg_sequence_start_execute +ffffffff82228a80 T reg_sequence_wait_done +ffffffff82228ae0 T dce_version_to_string +ffffffff82229000 T dce_abm_create +ffffffff822290c0 T dce_abm_destroy +ffffffff82229110 t dce_abm_init +ffffffff82229400 t dce_abm_set_level +ffffffff82229510 t dce_abm_immediate_disable +ffffffff82229560 t dce_abm_set_pipe +ffffffff822296e0 t dce_abm_set_backlight_level_pwm +ffffffff82229930 t dce_abm_get_current_backlight +ffffffff82229960 t dce_abm_get_target_backlight +ffffffff8222a000 T dce_aud_az_enable +ffffffff8222a190 T dce_aud_az_disable +ffffffff8222a3d0 T dce_aud_az_configure +ffffffff8222b210 t check_audio_bandwidth +ffffffff8222b3a0 T dce_aud_wall_dto_setup +ffffffff8222b550 T dce_aud_hw_init +ffffffff8222b760 T dce_aud_destroy +ffffffff8222b7b0 T dce_audio_create +ffffffff8222b880 t dce_aud_endpoint_valid +ffffffff8222c000 T dce110_engine_destroy +ffffffff8222c050 T dce110_aux_engine_construct +ffffffff8222c0d0 t dce_aux_configure_timeout +ffffffff8222c2d0 T dce_aux_transfer_raw +ffffffff8222cc00 t acquire +ffffffff8222cee0 T dce_aux_transfer_dmub_raw +ffffffff8222d010 T dce_aux_transfer_with_retries +ffffffff8222e000 T look_up_in_video_optimized_rate_tlb +ffffffff8222e070 T dce110_clk_src_construct +ffffffff8222e2b0 t calc_pll_max_vco_construct +ffffffff8222e460 T dce112_clk_src_construct +ffffffff8222e500 T dcn20_clk_src_construct +ffffffff8222e5b0 T dcn3_clk_src_construct +ffffffff8222e660 T dcn31_clk_src_construct +ffffffff8222e710 T dcn301_clk_src_construct +ffffffff8222e7c0 t dce110_clock_source_power_down +ffffffff8222e860 t dce110_program_pix_clk +ffffffff8222ef90 t dce110_get_pix_clk_dividers +ffffffff8222f630 t get_pixel_clk_frequency_100hz +ffffffff8222f750 t get_ss_info_from_atombios +ffffffff8222fa50 t dce112_program_pix_clk +ffffffff8222fc70 t dce112_get_pix_clk_dividers +ffffffff8222fd80 t dcn20_program_pix_clk +ffffffff8222fe20 t dcn20_override_dp_pix_clk +ffffffff8222ff30 t dcn3_program_pix_clk +ffffffff82230120 t dcn3_get_pix_clk_dividers +ffffffff822301f0 t dcn31_program_pix_clk +ffffffff82231000 T dce_dmcu_create +ffffffff822310c0 T dcn10_dmcu_create +ffffffff82231180 T dcn20_dmcu_create +ffffffff82231240 T dcn21_dmcu_create +ffffffff82231340 T dce_dmcu_destroy +ffffffff82231390 t dce_dmcu_init +ffffffff822313c0 t dce_dmcu_load_iram +ffffffff82231550 t dce_dmcu_set_psr_enable +ffffffff822316c0 t dce_dmcu_setup_psr +ffffffff82231a40 t dce_get_dmcu_psr_state +ffffffff82231b50 t dce_psr_wait_loop +ffffffff82231ca0 t dce_get_psr_wait_loop +ffffffff82231cd0 t dce_is_dmcu_initialized +ffffffff82231d40 t dcn10_dmcu_init +ffffffff82232360 t dcn10_dmcu_load_iram +ffffffff822325f0 t dcn10_dmcu_set_psr_enable +ffffffff822327c0 t dcn10_dmcu_setup_psr +ffffffff82232be0 t dcn10_get_dmcu_psr_state +ffffffff82232d20 t dcn10_psr_wait_loop +ffffffff82232e50 t dcn10_get_psr_wait_loop +ffffffff82232e80 t dcn10_is_dmcu_initialized +ffffffff82232eb0 t dcn10_send_edid_cea +ffffffff82233090 t dcn10_recv_amd_vsdb +ffffffff82233150 t dcn10_recv_edid_cea_ack +ffffffff822331d0 t dcn10_get_scp_results +ffffffff82233310 t dcn20_lock_phy +ffffffff82233460 t dcn20_unlock_phy +ffffffff822335b0 t dcn21_dmcu_init +ffffffff82234000 T dce_enable_fe_clock +ffffffff82234040 T dce_pipe_control_lock +ffffffff82234270 T dce_set_blender_mode +ffffffff82234390 T dce_clock_gating_power_up +ffffffff82234440 T dce_crtc_switch_to_clk_src +ffffffff82234610 T dce_use_lut +ffffffff82235000 T dce_i2c_oem_device_present +ffffffff82235090 T dce_i2c_submit_command +ffffffff82236000 T acquire_i2c_hw_engine +ffffffff82236430 T dce_i2c_submit_command_hw +ffffffff82236e40 t set_speed +ffffffff82236fb0 T dce_i2c_hw_construct +ffffffff82237020 T dce100_i2c_hw_construct +ffffffff82237090 T dce112_i2c_hw_construct +ffffffff82237100 T dcn1_i2c_hw_construct +ffffffff82237170 T dcn2_i2c_hw_construct +ffffffff82237200 t is_hw_busy +ffffffff82238000 T dce_i2c_sw_construct +ffffffff82238030 T dce_i2c_engine_acquire_sw +ffffffff822380f0 T dce_i2c_submit_command_sw +ffffffff82238b60 t write_byte_sw +ffffffff82239000 T dce_ipp_construct +ffffffff82239050 T dce_ipp_destroy +ffffffff822390a0 t dce_ipp_cursor_set_position +ffffffff822391f0 t dce_ipp_cursor_set_attributes +ffffffff822394d0 t dce_ipp_program_prescale +ffffffff822396b0 t dce_ipp_program_input_lut +ffffffff82239ba0 t dce_ipp_set_degamma +ffffffff8223a000 T dce110_get_dig_frontend +ffffffff8223a0c0 T dce110_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff8223a180 T dce110_psr_program_dp_dphy_fast_training +ffffffff8223a200 T dce110_psr_program_secondary_packet +ffffffff8223a270 T dce110_is_dig_enabled +ffffffff8223a2d0 T dce110_link_encoder_validate_dvi_output +ffffffff8223a380 T dce110_link_encoder_validate_dp_output +ffffffff8223a3b0 T dce110_link_encoder_construct +ffffffff8223a5a0 T dce110_link_encoder_validate_output_with_stream +ffffffff8223a750 T dce110_link_encoder_hw_init +ffffffff8223a9c0 T dce110_link_encoder_destroy +ffffffff8223aa10 T dce110_link_encoder_setup +ffffffff8223ab40 T dce110_link_encoder_enable_tmds_output +ffffffff8223ac40 T dce110_link_encoder_enable_lvds_output +ffffffff8223ad40 T dce110_link_encoder_enable_dp_output +ffffffff8223aec0 T dce110_link_encoder_enable_dp_mst_output +ffffffff8223b040 T dce110_link_encoder_disable_output +ffffffff8223b2a0 T dce110_link_encoder_dp_set_lane_settings +ffffffff8223b450 T dce110_link_encoder_dp_set_phy_pattern +ffffffff8223bd50 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff8223bfd0 T dce110_link_encoder_update_mst_stream_allocation_table +ffffffff8223c2a0 T dce110_link_encoder_connect_dig_be_to_fe +ffffffff8223c3f0 T dce110_link_encoder_enable_hpd +ffffffff8223c420 T dce110_link_encoder_disable_hpd +ffffffff8223c450 T dce110_link_encoder_get_max_link_cap +ffffffff8223d000 T dce_mem_input_construct +ffffffff8223d060 T dce112_mem_input_construct +ffffffff8223d0c0 T dce120_mem_input_construct +ffffffff8223d120 t dce_mi_program_display_marks +ffffffff8223d450 t dce_mi_allocate_dmif +ffffffff8223d6c0 t dce_mi_free_dmif +ffffffff8223d840 t dce_mi_program_surface_flip_and_addr +ffffffff8223dba0 t dce_mi_program_pte_vm +ffffffff8223dd90 t dce_mi_program_surface_config +ffffffff8223e6b0 t dce_mi_is_flip_pending +ffffffff8223e750 t program_nbp_watermark +ffffffff8223e980 t dce112_mi_program_display_marks +ffffffff8223ef40 t dce120_mi_program_display_marks +ffffffff8223f4b0 t dce120_program_stutter_watermark +ffffffff82240000 T dce110_opp_set_clamping +ffffffff822402e0 T dce110_opp_program_bit_depth_reduction +ffffffff82240b50 T dce110_opp_program_clamping_and_pixel_encoding +ffffffff82240d20 T dce110_opp_set_dyn_expansion +ffffffff82240e80 T dce110_opp_program_fmt +ffffffff82241040 T dce110_opp_construct +ffffffff822410a0 T dce110_opp_destroy +ffffffff82242000 T dce_panel_cntl_construct +ffffffff82242060 t dce_panel_cntl_destroy +ffffffff822420b0 t dce_panel_cntl_hw_init +ffffffff82242380 t dce_is_panel_backlight_on +ffffffff82242440 t dce_is_panel_powered_on +ffffffff82242500 t dce_store_backlight_level +ffffffff822425c0 t dce_driver_set_backlight +ffffffff82242770 t dce_get_16_bit_backlight_from_pwm +ffffffff82243000 T get_filter_3tap_16p +ffffffff822430a0 T get_filter_3tap_64p +ffffffff82243140 T get_filter_4tap_16p +ffffffff822431e0 T get_filter_4tap_64p +ffffffff82243280 T get_filter_5tap_64p +ffffffff82243320 T get_filter_6tap_64p +ffffffff822433c0 T get_filter_7tap_64p +ffffffff82243460 T get_filter_8tap_64p +ffffffff82243500 T get_filter_2tap_16p +ffffffff82243530 T get_filter_2tap_64p +ffffffff82244000 T dce110_se_audio_mute_control +ffffffff82244050 T dce110_se_dp_audio_setup +ffffffff82244060 t dce110_se_audio_setup +ffffffff822441d0 T dce110_se_dp_audio_enable +ffffffff82244460 T dce110_se_dp_audio_disable +ffffffff822445d0 T dce110_se_hdmi_audio_setup +ffffffff82244b40 T dce110_se_hdmi_audio_disable +ffffffff82244ba0 T dce110_stream_encoder_construct +ffffffff82244bf0 t dce110_stream_encoder_dp_set_stream_attribute +ffffffff822452b0 t dce110_stream_encoder_hdmi_set_stream_attribute +ffffffff82245850 t dce110_stream_encoder_dvi_set_stream_attribute +ffffffff822459a0 t dce110_stream_encoder_lvds_set_stream_attribute +ffffffff82245a90 t dce110_stream_encoder_set_throttled_vcp_size +ffffffff82245cc0 t dce110_stream_encoder_update_hdmi_info_packets +ffffffff822464a0 t dce110_stream_encoder_stop_hdmi_info_packets +ffffffff82246760 t dce110_stream_encoder_update_dp_info_packets +ffffffff82246910 t dce110_stream_encoder_stop_dp_info_packets +ffffffff82246a90 t dce110_stream_encoder_dp_blank +ffffffff82246c00 t dce110_stream_encoder_dp_unblank +ffffffff82246e00 t setup_stereo_sync +ffffffff82246e90 t dce110_stream_encoder_set_avmute +ffffffff82246ed0 t dig_connect_to_otg +ffffffff82246f10 t dce110_reset_hdmi_stream_attribute +ffffffff82247020 t dig_source_otg +ffffffff82247090 t dce110_stream_encoder_set_stream_attribute_helper +ffffffff82247190 t dce110_update_generic_info_packet +ffffffff82248000 T dce_transform_get_optimal_number_of_taps +ffffffff82248360 T dce110_opp_set_csc_adjustment +ffffffff82248440 t program_color_matrix +ffffffff822486a0 T dce110_opp_set_csc_default +ffffffff822487f0 T dce110_opp_program_regamma_pwl +ffffffff82249170 T dce110_opp_power_on_regamma_lut +ffffffff82249230 T dce110_opp_set_regamma_mode +ffffffff822492b0 T dce_transform_construct +ffffffff82249330 t dce_transform_reset +ffffffff82249370 t dce_transform_set_scaler +ffffffff82249fa0 t dce_transform_set_pixel_storage_depth +ffffffff8224a4a0 t dce_transform_set_gamut_remap +ffffffff8224a830 t program_multi_taps_filter +ffffffff8224b000 T dmub_abm_create +ffffffff8224b0d0 T dmub_abm_destroy +ffffffff8224b120 t dmub_abm_init_ex +ffffffff8224b130 t dmub_abm_set_level_ex +ffffffff8224b1f0 t dmub_abm_set_backlight_level_pwm_ex +ffffffff8224b2a0 t dmub_abm_get_current_backlight_ex +ffffffff8224b2b0 t dmub_abm_get_target_backlight_ex +ffffffff8224b2c0 t dmub_abm_init_config_ex +ffffffff8224b360 t dmub_abm_set_pause_ex +ffffffff8224b410 t dmub_abm_save_restore_ex +ffffffff8224b4b0 t dmub_abm_set_pipe_ex +ffffffff8224c000 T dmub_abm_init +ffffffff8224c440 T dmub_abm_get_current_backlight +ffffffff8224c470 T dmub_abm_get_target_backlight +ffffffff8224c4a0 T dmub_abm_set_level +ffffffff8224c540 T dmub_abm_init_config +ffffffff8224c650 T dmub_abm_set_pause +ffffffff8224c700 T dmub_abm_save_restore +ffffffff8224c840 T dmub_abm_set_pipe +ffffffff8224c8f0 T dmub_abm_set_backlight_level +ffffffff8224d000 T dmub_hw_lock_mgr_cmd +ffffffff8224d0b0 T dmub_hw_lock_mgr_inbox0_cmd +ffffffff8224d100 T should_use_dmub_lock +ffffffff8224e000 T dmub_enable_outbox_notification +ffffffff8224f000 T dmub_psr_create +ffffffff8224f0a0 T dmub_psr_destroy +ffffffff8224f0f0 t dmub_psr_copy_settings +ffffffff8224f630 t dmub_psr_enable +ffffffff8224f7e0 t dmub_psr_get_state +ffffffff8224fb10 t dmub_psr_set_level +ffffffff8224fbf0 t dmub_psr_force_static +ffffffff8224fc90 t dmub_psr_get_residency +ffffffff8224fce0 t dmub_psr_set_sink_vtotal_in_psr_active +ffffffff8224fd80 t dmub_psr_set_power_opt +ffffffff82250000 T dmub_replay_create +ffffffff822500a0 T dmub_replay_destroy +ffffffff822500f0 t dmub_replay_get_state +ffffffff822501f0 t dmub_replay_enable +ffffffff82250450 t dmub_replay_copy_settings +ffffffff82250720 t dmub_replay_set_power_opt +ffffffff822507c0 t dmub_replay_set_coasting_vtotal +ffffffff82250860 t dmub_replay_residency +ffffffff82251000 T dce100_enable_display_power_gating +ffffffff822510c0 T dce100_prepare_bandwidth +ffffffff82251110 T dce100_optimize_bandwidth +ffffffff82251160 T dce100_hw_sequencer_construct +ffffffff82252000 T dce100_add_stream_to_ctx +ffffffff822520d0 T dce100_validate_plane +ffffffff82252110 T dce100_find_first_free_match_stream_enc_for_link +ffffffff822521c0 T dce100_create_resource_pool +ffffffff822531b0 t dce100_resource_destruct +ffffffff822534e0 t dce100_destroy_resource_pool +ffffffff82253550 t dce100_panel_cntl_create +ffffffff822535e0 t dce100_link_encoder_create +ffffffff82253700 t dce100_validate_bandwidth +ffffffff82253840 t dce100_validate_global +ffffffff822538e0 t read_dce_straps +ffffffff82253950 t create_audio +ffffffff82253980 t dce100_stream_encoder_create +ffffffff82253a20 t dce100_hwseq_create +ffffffff82254000 T dce110_compressor_power_up_fbc +ffffffff82254170 T dce110_compressor_enable_fbc +ffffffff822543e0 T dce110_compressor_is_fbc_enabled_in_hw +ffffffff822544b0 T dce110_compressor_disable_fbc +ffffffff82254810 T dce110_compressor_program_compressed_surface_address_and_pitch +ffffffff82254950 T dce110_compressor_set_fbc_invalidation_triggers +ffffffff822549f0 T dce110_compressor_create +ffffffff82254aa0 T dce110_compressor_construct +ffffffff82254b20 T dce110_compressor_destroy +ffffffff82254b70 T get_max_support_fbc_buffersize +ffffffff82255000 T dce110_update_info_frame +ffffffff82255100 T dce110_enable_stream +ffffffff822551c0 T dce110_edp_wait_for_hpd_ready +ffffffff822554c0 T dce110_edp_power_control +ffffffff82255ae0 T dce110_edp_wait_for_T12 +ffffffff82255cd0 T dce110_edp_backlight_control +ffffffff82256080 T dce110_enable_audio_stream +ffffffff82256160 T dce110_disable_audio_stream +ffffffff82256240 T dce110_disable_stream +ffffffff82256500 T dce110_unblank_stream +ffffffff82256610 T dce110_blank_stream +ffffffff822567b0 T dce110_set_avmute +ffffffff82256800 T dce110_enable_accelerated_mode +ffffffff82256c00 t power_down_all_hw_blocks +ffffffff82256e00 T dce110_set_safe_displaymarks +ffffffff82256f30 T dce110_apply_ctx_to_hw +ffffffff82257900 t enable_fbc +ffffffff82257ae0 T dce110_power_down +ffffffff82257c00 T dce110_prepare_bandwidth +ffffffff82257d70 T dce110_optimize_bandwidth +ffffffff82257f90 T dce110_set_backlight_level +ffffffff822580b0 T dce110_set_abm_immediate_disable +ffffffff82258140 T dce110_set_pipe +ffffffff822581b0 T dce110_enable_lvds_link_output +ffffffff82258210 T dce110_enable_tmds_link_output +ffffffff82258280 T dce110_enable_dp_link_output +ffffffff822584e0 T dce110_disable_link_output +ffffffff822585f0 T dce110_hw_sequencer_construct +ffffffff82258650 t enable_display_pipe_clock_gating +ffffffff82258680 t build_audio_output +ffffffff822587f0 t init_hw +ffffffff82258b10 t dce110_power_down_fe +ffffffff82258bf0 t dce110_apply_ctx_for_surface +ffffffff822593c0 t dce110_post_unlock_program_front_end +ffffffff822593f0 t update_plane_addr +ffffffff82259460 t dce110_wait_for_mpcc_disconnect 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+ffffffff8225c2d0 t dce_mem_input_v_program_surface_flip_and_addr +ffffffff8225c450 t dce_mem_input_v_program_pte_vm +ffffffff8225c770 t dce_mem_input_v_program_surface_config +ffffffff8225cbf0 t dce_mem_input_v_is_surface_pending +ffffffff8225cc70 t program_urgency_watermark +ffffffff8225cdc0 t program_nbp_watermark +ffffffff8225cf90 t program_stutter_watermark +ffffffff8225e000 T dce110_opp_v_set_csc_default +ffffffff8225e360 t program_color_matrix_v +ffffffff8225e500 t configure_graphics_mode_v +ffffffff8225e5f0 T dce110_opp_v_set_csc_adjustment +ffffffff8225f000 T dce110_opp_program_regamma_pwl_v +ffffffff8225f590 t power_on_lut +ffffffff8225f6f0 T dce110_opp_power_on_regamma_lut_v +ffffffff8225f760 T dce110_opp_set_regamma_mode_v +ffffffff82260000 T dce110_opp_v_construct +ffffffff82261000 T dce110_resource_build_pipe_hw_param +ffffffff82261160 T dce110_find_first_free_match_stream_enc_for_link +ffffffff82261200 T dce110_create_resource_pool +ffffffff82262460 t dce110_resource_destruct +ffffffff82262830 t dce110_destroy_resource_pool +ffffffff822628a0 t dce110_panel_cntl_create +ffffffff82262930 t dce110_link_encoder_create +ffffffff82262a50 t dce110_validate_bandwidth +ffffffff82262b50 t dce110_validate_global +ffffffff82262c30 t dce110_acquire_underlay +ffffffff82262e30 t dce110_validate_plane +ffffffff82262e90 t dce110_add_stream_to_ctx +ffffffff82262f90 t read_dce_straps +ffffffff82263000 t create_audio +ffffffff82263030 t dce110_stream_encoder_create +ffffffff822630d0 t dce110_hwseq_create +ffffffff82264000 T dce110_timing_generator_set_early_control +ffffffff82264080 T dce110_timing_generator_enable_crtc +ffffffff82264130 T dce110_timing_generator_program_blank_color +ffffffff822641d0 T dce110_timing_generator_disable_crtc +ffffffff82264230 T dce110_timing_generator_program_timing_generator +ffffffff82264450 T dce110_timing_generator_set_drr +ffffffff822645c0 T dce110_timing_generator_set_static_screen_control +ffffffff82264650 T dce110_timing_generator_get_vblank_counter +ffffffff822646b0 T dce110_timing_generator_get_position +ffffffff82264760 T dce110_timing_generator_get_crtc_scanoutpos +ffffffff82264860 T dce110_timing_generator_program_blanking +ffffffff82264b40 T dce110_timing_generator_set_test_pattern +ffffffff82264ea0 T dce110_timing_generator_validate_timing +ffffffff82264f70 T dce110_timing_generator_wait_for_vblank +ffffffff82265110 T dce110_timing_generator_is_counter_moving +ffffffff822651a0 T dce110_timing_generator_wait_for_vactive +ffffffff82265290 T dce110_timing_generator_setup_global_swap_lock +ffffffff82265430 T dce110_timing_generator_tear_down_global_swap_lock +ffffffff822654c0 T dce110_timing_generator_enable_advanced_request +ffffffff82265560 T dce110_timing_generator_set_lock_master +ffffffff822655d0 T dce110_timing_generator_enable_reset_trigger +ffffffff822656e0 T dce110_timing_generator_enable_crtc_reset +ffffffff82265920 T dce110_timing_generator_disable_reset_trigger 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dce110_transform_v_construct +ffffffff82268060 t dce110_xfmv_reset +ffffffff822680c0 t dce110_xfmv_set_scaler +ffffffff82268960 t dce110_xfmv_set_pixel_storage_depth +ffffffff82268a50 t dce110_xfmv_set_gamut_remap +ffffffff82268a80 t program_multi_taps_filter +ffffffff82268f40 t program_viewport +ffffffff8226a000 T dce112_compressor_power_up_fbc +ffffffff8226a170 T dce112_compressor_enable_fbc +ffffffff8226a370 T dce112_compressor_is_fbc_enabled_in_hw +ffffffff8226a440 T dce112_compressor_enable_lpt +ffffffff8226a5a0 t wait_for_fbc_state_changed +ffffffff8226a8f0 T dce112_compressor_disable_fbc +ffffffff8226aa10 T dce112_compressor_disable_lpt +ffffffff8226abd0 T dce112_compressor_is_lpt_enabled_in_hw +ffffffff8226ac30 T dce112_compressor_program_compressed_surface_address_and_pitch +ffffffff8226ada0 T dce112_compressor_program_lpt_control +ffffffff8226b020 T dce112_compressor_set_fbc_invalidation_triggers +ffffffff8226b0c0 T dce112_compressor_construct +ffffffff8226b190 T dce112_compressor_create +ffffffff8226b290 T dce112_compressor_destroy +ffffffff8226c000 T dce112_hw_sequencer_construct +ffffffff8226c060 t dce112_enable_display_power_gating +ffffffff8226d000 T dce112_validate_bandwidth +ffffffff8226d0d0 T resource_map_phy_clock_resources +ffffffff8226d250 T dce112_add_stream_to_ctx +ffffffff8226d320 T dce112_create_resource_pool +ffffffff8226e9c0 t dce112_resource_destruct +ffffffff8226ecf0 t dce112_destroy_resource_pool +ffffffff8226ed60 t dce112_panel_cntl_create +ffffffff8226edf0 t dce112_link_encoder_create +ffffffff8226ef10 t dce112_validate_global +ffffffff8226efb0 t read_dce_straps +ffffffff8226f020 t create_audio +ffffffff8226f050 t dce112_stream_encoder_create +ffffffff8226f0f0 t dce112_hwseq_create +ffffffff82270000 T dce121_xgmi_enabled +ffffffff82270070 T dce120_hw_sequencer_construct +ffffffff822700d0 t dce120_enable_display_power_gating +ffffffff82270100 t dce120_update_dchub +ffffffff82271000 T dce120_create_resource_pool +ffffffff822725f0 t dce120_resource_destruct +ffffffff82272910 t dce120_destroy_resource_pool +ffffffff82272980 t dce120_panel_cntl_create +ffffffff82272a10 t dce120_link_encoder_create +ffffffff82272b30 t read_dce_straps +ffffffff82272bd0 t create_audio +ffffffff82272c00 t dce120_stream_encoder_create +ffffffff82272ca0 t dce121_hwseq_create +ffffffff82272d10 t dce120_hwseq_create +ffffffff82273000 T dce120_timing_generator_construct +ffffffff82273090 t dce120_tg_validate_timing +ffffffff82273150 t dce120_tg_program_timing +ffffffff82273350 t dce120_timing_generator_enable_crtc +ffffffff82273410 t dce120_timing_generator_get_crtc_position +ffffffff822734c0 t dce120_timing_generator_get_vblank_counter +ffffffff82273520 t dce120_timing_generator_get_crtc_scanoutpos +ffffffff82273620 t dce120_timing_generator_set_early_control +ffffffff82273660 t dce120_tg_wait_for_state +ffffffff822737b0 t dce120_tg_set_blank +ffffffff82273880 t dce120_tg_is_blanked +ffffffff822738f0 t dce120_timing_generator_set_overscan_color_black +ffffffff822739e0 t dce120_timing_generator_program_blank_color +ffffffff82273a60 t dce120_tg_set_colors +ffffffff82273ba0 t dce120_timing_generator_disable_vga +ffffffff82273c10 t dce120_timing_generator_did_triggered_reset_occur +ffffffff82273c70 t dce120_timing_generator_setup_global_swap_lock +ffffffff82273dc0 t dce120_timing_generator_enable_reset_trigger +ffffffff82273ef0 t dce120_timing_generator_disable_reset_trigger +ffffffff82273fb0 t dce120_timing_generator_tear_down_global_swap_lock +ffffffff82274090 t dce120_timing_generator_enable_advanced_request +ffffffff82274130 t dce120_timing_generator_set_drr +ffffffff82274320 t dce120_timing_generator_set_static_screen_control +ffffffff822743a0 t dce120_timing_generator_set_test_pattern +ffffffff822748d0 t dce120_arm_vert_intr +ffffffff822749a0 t dce120_is_tg_enabled +ffffffff82274a00 t dce120_configure_crc +ffffffff82274c20 t dce120_get_crc +ffffffff82275000 T dce80_hw_sequencer_construct +ffffffff82276000 T dce80_create_resource_pool +ffffffff82277050 T dce81_create_resource_pool +ffffffff82278090 T dce83_create_resource_pool +ffffffff82278f70 t dce80_resource_destruct +ffffffff82279290 t dce80_destroy_resource_pool +ffffffff82279300 t dce80_panel_cntl_create +ffffffff82279390 t dce80_link_encoder_create +ffffffff822794b0 t dce80_validate_bandwidth +ffffffff822795f0 t dce80_validate_global +ffffffff82279690 t read_dce_straps +ffffffff82279700 t create_audio +ffffffff82279730 t dce80_stream_encoder_create +ffffffff822797d0 t dce80_hwseq_create +ffffffff8227a000 T dce80_timing_generator_construct +ffffffff8227a090 t program_timing +ffffffff8227a190 t dce80_timing_generator_enable_advanced_request +ffffffff8227b000 T cm_helper_program_color_matrices +ffffffff8227b0d0 T cm_helper_program_xfer_func +ffffffff8227b500 T cm_helper_convert_to_custom_float +ffffffff8227ba60 T cm_helper_translate_curve_to_hw_format +ffffffff8227c750 T cm_helper_translate_curve_to_degamma_hw_format +ffffffff8227e000 T dpp_read_state +ffffffff8227e2d0 T dpp1_get_optimal_number_of_taps +ffffffff8227e490 T dpp_reset +ffffffff8227e4e0 T dpp1_cnv_setup +ffffffff8227ea50 T dpp1_set_cursor_attributes +ffffffff8227eb90 T dpp1_set_cursor_position +ffffffff8227ecf0 T dpp1_cnv_set_optional_cursor_attributes +ffffffff8227edc0 T dpp1_dppclk_control +ffffffff8227eed0 T dpp1_construct +ffffffff8227ef50 t dpp1_cm_set_regamma_pwl +ffffffff82280000 T dpp1_cm_set_gamut_remap +ffffffff822801b0 T dpp1_cm_set_output_csc_default +ffffffff82280250 t dpp1_cm_program_color_matrix +ffffffff82280430 T dpp1_cm_set_output_csc_adjustment +ffffffff82280440 T dpp1_cm_power_on_regamma_lut +ffffffff822804d0 T dpp1_cm_program_regamma_lut +ffffffff82280720 T dpp1_cm_configure_regamma_lut +ffffffff82280840 T dpp1_cm_program_regamma_luta_settings +ffffffff822809f0 T dpp1_cm_program_regamma_lutb_settings +ffffffff82280ba0 T dpp1_program_input_csc +ffffffff82280e20 T dpp1_program_bias_and_scale +ffffffff82280fa0 T dpp1_program_degamma_lutb_settings +ffffffff82281160 T dpp1_program_degamma_luta_settings +ffffffff82281320 T dpp1_power_on_degamma_lut +ffffffff822813b0 T dpp1_set_degamma +ffffffff822815c0 T dpp1_degamma_ram_select +ffffffff82281620 T dpp1_program_degamma_lut +ffffffff82281990 T dpp1_set_degamma_pwl +ffffffff82281ba0 T dpp1_full_bypass +ffffffff82281d60 T dpp1_program_input_lut +ffffffff822824c0 T dpp1_set_hdr_multiplier +ffffffff82283000 T dpp1_dscl_calc_lb_num_partitions +ffffffff822831e0 T dpp1_dscl_is_lb_conf_valid +ffffffff82283220 T dpp1_dscl_set_scaler_manual_scale +ffffffff82284830 t dpp1_dscl_get_filter_coeffs_64p +ffffffff82284900 t dpp1_dscl_set_scaler_filter +ffffffff82285000 t dwb1_get_caps +ffffffff822850a0 t dwb1_enable +ffffffff822851b0 t dwb1_disable +ffffffff82285340 T dcn10_dwbc_construct +ffffffff82286000 T hubbub1_wm_read_state +ffffffff822863d0 T hubbub1_allow_self_refresh_control +ffffffff82286460 T hubbub1_is_allow_self_refresh_enabled +ffffffff822864d0 T hubbub1_verify_allow_pstate_change_high +ffffffff822866d0 T hubbub1_wm_change_req_wa +ffffffff82286780 T hubbub1_program_urgent_watermarks +ffffffff82286ba0 T hubbub1_program_stutter_watermarks +ffffffff82287050 T hubbub1_program_pstate_watermarks +ffffffff822872c0 T hubbub1_program_watermarks +ffffffff82287420 T hubbub1_update_dchub +ffffffff82287690 T hubbub1_toggle_watermark_change_req +ffffffff82287740 T hubbub1_soft_reset +ffffffff82287780 T hubbub1_construct +ffffffff822877e0 t hubbub1_get_dcc_compression_cap +ffffffff82287a20 t hubbub1_dcc_support_swizzle +ffffffff82287ab0 t hubbub1_dcc_support_pixel_format +ffffffff82288000 T hubp1_set_blank +ffffffff82288130 T hubp1_clear_underflow +ffffffff82288180 T hubp1_vready_workaround +ffffffff82288220 T hubp1_program_tiling +ffffffff822884c0 T hubp1_program_size +ffffffff82288660 T hubp1_program_rotation +ffffffff822887e0 T hubp1_program_pixel_format +ffffffff82288dc0 T hubp1_program_surface_flip_and_addr +ffffffff82289700 T hubp1_dcc_control +ffffffff822897d0 T hubp1_program_surface_config +ffffffff82289900 T hubp1_program_requestor +ffffffff82289cf0 T hubp1_program_deadline +ffffffff8228a4b0 T hubp1_is_flip_pending +ffffffff8228a5e0 T min_set_viewport +ffffffff8228a920 T hubp1_read_state_common +ffffffff8228b7d0 T hubp1_read_state +ffffffff8228bac0 T hubp1_get_cursor_pitch +ffffffff8228bb70 T hubp1_cursor_set_attributes +ffffffff8228be50 T hubp1_cursor_set_position +ffffffff8228c1f0 T hubp1_clk_cntl +ffffffff8228c240 T hubp1_vtg_sel +ffffffff8228c280 T hubp1_in_blank +ffffffff8228c2f0 T hubp1_soft_reset +ffffffff8228c330 T hubp1_set_flip_int +ffffffff8228c380 T hubp1_init +ffffffff8228c3b0 T dcn10_hubp_construct +ffffffff8228c420 t hubp1_setup +ffffffff8228c4f0 t hubp1_setup_interdependent +ffffffff8228c8c0 t hubp1_set_vm_system_aperture_settings +ffffffff8228cb10 t hubp1_set_vm_context0_settings +ffffffff8228ce40 t hubp1_set_hubp_blank_en +ffffffff8228ce80 t hubp1_disconnect +ffffffff8228cf20 t hubp1_disable_control +ffffffff8228cf60 t hubp1_get_underflow_status +ffffffff8228cfd0 t hubp1_wait_pipe_read_start +ffffffff8228e000 T dcn10_lock_all_pipes +ffffffff8228e150 T dcn10_log_hw_state +ffffffff8228fec0 T dcn10_did_underflow_occur +ffffffff8228ff80 T dcn10_enable_power_gating_plane +ffffffff82290160 T dcn10_disable_vga +ffffffff822903a0 T dcn10_dpp_pg_control +ffffffff82290610 T dcn10_hubp_pg_control +ffffffff822908a0 T dcn10_bios_golden_init +ffffffff82290a30 T dcn10_enable_stream_timing +ffffffff82290eb0 T dcn10_verify_allow_pstate_change_high +ffffffff82291260 T dcn10_plane_atomic_disconnect +ffffffff822913a0 T dcn10_plane_atomic_power_down +ffffffff82291510 T dcn10_plane_atomic_disable +ffffffff82291680 T dcn10_disable_plane +ffffffff82291850 T dcn10_init_pipes +ffffffff82291fe0 T dcn10_init_hw +ffffffff822925a0 T dcn10_power_down_on_boot +ffffffff82292730 T dcn10_reset_hw_ctx_wrap +ffffffff82292ad0 T dcn10_update_plane_addr +ffffffff82292c00 T dcn10_set_input_transfer_func +ffffffff82292da0 T dcn10_set_output_transfer_func +ffffffff82292e80 T dcn10_pipe_control_lock +ffffffff82292f50 T dcn10_cursor_lock +ffffffff82293140 T dcn10_enable_vblanks_synchronization +ffffffff822939b0 T dcn10_enable_timing_synchronization +ffffffff82293e40 T dcn10_enable_per_frame_crtc_position_reset +ffffffff82294070 T dcn10_program_gamut_remap +ffffffff82294270 T dcn10_program_output_csc +ffffffff822943c0 T dcn10_update_visual_confirm_color +ffffffff82294440 T dcn10_update_mpcc +ffffffff82294740 T dcn10_blank_pixel_data +ffffffff822948c0 T dcn10_set_hdr_multiplier +ffffffff82294960 T dcn10_program_pipe +ffffffff822956a0 T dcn10_wait_for_pending_cleared +ffffffff822957c0 T dcn10_post_unlock_program_front_end +ffffffff82295a80 T dcn10_prepare_bandwidth +ffffffff82295c50 T dcn10_optimize_bandwidth +ffffffff82295e20 T dcn10_set_drr +ffffffff82295f20 T dcn10_get_position +ffffffff82295fb0 T dcn10_set_static_screen_control +ffffffff82296060 T dcn10_setup_stereo +ffffffff822961d0 T dcn10_wait_for_mpcc_disconnect +ffffffff822963a0 T dcn10_dummy_display_power_gating +ffffffff822963d0 T dcn10_update_pending_status +ffffffff82296530 T dcn10_update_dchub +ffffffff82296560 T dcn10_set_cursor_position +ffffffff82296ab0 T dcn10_set_cursor_attribute +ffffffff82296b10 T dcn10_set_cursor_sdr_white_level +ffffffff82296be0 T dcn10_get_vupdate_offset_from_vsync +ffffffff82296c80 T dcn10_calc_vupdate_position +ffffffff82296d20 T dcn10_setup_periodic_interrupt +ffffffff82296e40 T dcn10_setup_vupdate_interrupt +ffffffff82296f10 T dcn10_unblank_stream +ffffffff82297030 T dcn10_send_immediate_sdp_message +ffffffff82297090 T dcn10_set_clock +ffffffff822971a0 T dcn10_get_clock +ffffffff82297200 T dcn10_get_dcc_en_bits +ffffffff82298000 T snprintf_count +ffffffff82298090 T dcn10_clear_status_bits +ffffffff82298260 T dcn10_get_hw_state +ffffffff8229a000 T dcn10_hw_sequencer_construct +ffffffff8229b000 T dcn10_ipp_construct +ffffffff8229b050 T dcn20_ipp_construct +ffffffff8229b0a0 t dcn10_ipp_destroy +ffffffff8229c000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff8229c0d0 T dcn10_get_dig_frontend +ffffffff8229c190 T enc1_configure_encoder +ffffffff8229c210 T dcn10_psr_program_dp_dphy_fast_training +ffffffff8229c2a0 T dcn10_psr_program_secondary_packet +ffffffff8229c320 T dcn10_is_dig_enabled +ffffffff8229c390 T dcn10_link_encoder_validate_dvi_output +ffffffff8229c440 T dcn10_link_encoder_validate_dp_output +ffffffff8229c480 T dcn10_link_encoder_construct +ffffffff8229c680 T dcn10_link_encoder_validate_output_with_stream +ffffffff8229c880 T dcn10_link_encoder_hw_init +ffffffff8229cac0 T dcn10_aux_initialize +ffffffff8229cb60 T dcn10_link_encoder_destroy +ffffffff8229cbb0 T dcn10_link_encoder_setup +ffffffff8229cd00 T dcn10_link_encoder_enable_tmds_output +ffffffff8229ce00 T dcn10_link_encoder_enable_tmds_output_with_clk_pattern_wa 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mpc1_assert_mpcc_idle_before_connect +ffffffff8229f7e0 T mpc1_insert_plane +ffffffff8229fe00 T mpc1_remove_mpcc +ffffffff822a0210 T mpc1_mpc_init +ffffffff822a0580 T mpc1_mpc_init_single_inst +ffffffff822a0790 T mpc1_init_mpcc_list_from_hw +ffffffff822a0ab0 T mpc1_read_mpcc_state +ffffffff822a0c70 T mpc1_cursor_lock +ffffffff822a0cf0 T mpc1_get_mpc_out_mux +ffffffff822a0d80 T dcn10_mpc_construct +ffffffff822a0f00 t mpc1_update_blending +ffffffff822a2000 T opp1_program_bit_depth_reduction +ffffffff822a2440 T opp1_set_dyn_expansion +ffffffff822a25c0 T opp1_program_fmt +ffffffff822a28e0 T opp1_program_stereo +ffffffff822a29e0 T opp1_pipe_clock_control +ffffffff822a2a20 T opp1_destroy +ffffffff822a2a70 T dcn10_opp_construct +ffffffff822a3000 T optc1_program_global_sync +ffffffff822a3170 T optc1_setup_vertical_interrupt0 +ffffffff822a3200 T optc1_setup_vertical_interrupt1 +ffffffff822a3270 T optc1_setup_vertical_interrupt2 +ffffffff822a32e0 T optc1_program_timing +ffffffff822a3a30 T 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optc1_set_vtotal_min_max +ffffffff822a4e60 T optc1_get_crtc_scanoutpos +ffffffff822a4f80 T optc1_program_stereo +ffffffff822a51c0 T optc1_is_stereo_left_eye +ffffffff822a5230 T optc1_get_hw_timing +ffffffff822a5350 T optc1_read_otg_state +ffffffff822a5700 T optc1_get_otg_active_size +ffffffff822a5830 T optc1_clear_optc_underflow +ffffffff822a5880 T optc1_tg_init +ffffffff822a5940 T optc1_is_tg_enabled +ffffffff822a59b0 T optc1_is_optc_underflow_occurred +ffffffff822a5a30 T optc1_configure_crc +ffffffff822a5ce0 T optc1_get_crc +ffffffff822a5df0 T dcn10_timing_generator_init +ffffffff822a5e60 t optc1_enable_crtc +ffffffff822a5f90 t optc1_set_test_pattern +ffffffff822a6710 t optc1_program_manual_trigger +ffffffff822a67d0 t optc1_setup_manual_trigger +ffffffff822a7000 T dcn10_find_first_free_match_stream_enc_for_link +ffffffff822a70b0 T dcn10_create_resource_pool +ffffffff822a8520 t dcn10_resource_destruct +ffffffff822a88a0 t dcn10_destroy_resource_pool +ffffffff822a8910 t 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enc3_stream_encoder_update_dp_info_packets +ffffffff822fc350 T enc3_audio_mute_control +ffffffff822fc3d0 T enc3_se_dp_audio_setup +ffffffff822fc460 T enc3_se_dp_audio_enable +ffffffff822fc580 T enc3_se_hdmi_audio_setup +ffffffff822fc910 T dcn30_dio_stream_encoder_construct +ffffffff822fc980 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff822fd010 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff822fd260 t enc3_read_state +ffffffff822fd420 t enc3_dp_set_dsc_config +ffffffff822fd500 t enc3_dp_set_odm_combine +ffffffff822fe000 T dpp30_read_state +ffffffff822fe050 T dpp3_program_post_csc +ffffffff822fe250 T dpp3_set_pre_degam +ffffffff822fe310 T dpp3_cnv_setup +ffffffff822fec80 T dpp3_set_cursor_attributes +ffffffff822fee00 T dpp3_get_optimal_number_of_taps +ffffffff822ff920 T dpp3_construct +ffffffff822ff980 t dpp3_deferred_update +ffffffff822ffdb0 t dpp3_program_blnd_lut +ffffffff823008b0 t dpp3_program_shaper +ffffffff82302b30 t dpp3_program_3dlut +ffffffff823033b0 t dpp3_set3dlut_ram12 +ffffffff82304000 T dpp3_program_cm_dealpha +ffffffff823040a0 T dpp3_program_cm_bias +ffffffff823041a0 T dpp3_program_gamcor_lut +ffffffff82304c90 t dpp3_power_on_gamcor_lut +ffffffff82304de0 T dpp3_set_hdr_multiplier +ffffffff82304e30 T dpp3_cm_set_gamut_remap +ffffffff82306000 T dwb3_config_fc +ffffffff823061f0 T dwb3_set_stereo +ffffffff823062d0 T dwb3_enable +ffffffff82306450 T dwb3_set_denorm +ffffffff82306590 T dwb3_disable +ffffffff82306660 T dwb3_update +ffffffff823067d0 T dwb3_is_enabled +ffffffff82306880 T dwb3_set_new_content +ffffffff823068c0 T dcn30_dwbc_construct +ffffffff82306910 T dwb3_set_host_read_rate_control +ffffffff82306990 t dwb3_get_caps +ffffffff82307000 T dwb3_ogam_set_input_transfer_func +ffffffff82307aa0 T dwb3_set_gamut_remap +ffffffff82307d90 T dwb3_program_hdr_mult +ffffffff82308000 T hubbub3_init_dchub_sys_ctx +ffffffff82308200 T hubbub3_program_watermarks +ffffffff82308340 T hubbub3_dcc_support_swizzle +ffffffff82308400 T hubbub3_get_dcc_compression_cap +ffffffff82308600 T hubbub3_force_wm_propagate_to_pipes +ffffffff823086c0 T hubbub3_force_pstate_change_control +ffffffff82308740 T hubbub3_init_watermarks +ffffffff82308b70 T hubbub3_construct +ffffffff82309000 T hubp3_set_vm_system_aperture_settings +ffffffff82309150 T hubp3_program_surface_flip_and_addr +ffffffff82309c40 T hubp3_dcc_control +ffffffff82309d10 T hubp3_dcc_control_sienna_cichlid +ffffffff82309e30 T hubp3_dmdata_set_attributes +ffffffff8230a070 T hubp3_program_surface_config +ffffffff8230a3b0 T hubp3_read_state +ffffffff8230a6b0 T hubp3_setup +ffffffff8230a760 T hubp3_init +ffffffff8230a790 T hubp3_construct +ffffffff8230b000 T dcn30_set_blend_lut +ffffffff8230b070 T dcn30_set_input_transfer_func +ffffffff8230b1f0 T dcn30_set_output_transfer_func +ffffffff8230b5a0 T dcn30_update_writeback +ffffffff8230b640 t dcn30_set_writeback +ffffffff8230b820 T dcn30_mmhubbub_warmup +ffffffff8230ba90 T dcn30_enable_writeback +ffffffff8230bb50 T dcn30_disable_writeback +ffffffff8230bc50 T dcn30_program_all_writeback_pipes_in_tree +ffffffff8230bf90 T dcn30_init_hw +ffffffff8230c800 T dcn30_set_avmute +ffffffff8230c940 T dcn30_update_info_frame +ffffffff8230ca40 T dcn30_program_dmdata_engine +ffffffff8230cae0 T dcn30_apply_idle_power_optimizations +ffffffff8230d020 T dcn30_does_plane_fit_in_mall +ffffffff8230d0d0 T dcn30_hardware_release +ffffffff8230d1d0 T dcn30_set_disp_pattern_generator +ffffffff8230d250 T dcn30_prepare_bandwidth +ffffffff8230d350 T dcn30_set_static_screen_control +ffffffff8230e000 T dcn30_hw_sequencer_construct +ffffffff8230f000 T dcn30_mmhubbub_construct +ffffffff8230f050 t mmhubbub3_warmup_mcif +ffffffff8230f2a0 t mmhubbub3_config_mcif_buf +ffffffff8230f800 t mmhubbub3_config_mcif_arb +ffffffff82310000 T mpc3_is_dwb_idle +ffffffff82310080 T mpc3_set_dwb_mux +ffffffff82310100 T mpc3_disable_dwb_mux +ffffffff82310180 T mpc3_set_out_rate_control +ffffffff823102b0 T mpc3_get_ogam_current +ffffffff82310360 T mpc3_power_on_ogam_lut +ffffffff82310440 T mpc3_set_output_gamma +ffffffff82311140 T mpc3_set_denorm +ffffffff823111b0 T mpc3_set_denorm_clamp +ffffffff82311320 T mpc3_program_shaper +ffffffff823136d0 t mpc3_power_on_shaper_3dlut +ffffffff82313a90 T mpc3_init_mpcc +ffffffff82313b10 T mpc3_set_gamut_remap +ffffffff82313da0 T mpc3_program_3dlut +ffffffff823145e0 t mpc3_set3dlut_ram12 +ffffffff823147d0 T mpc3_set_output_csc +ffffffff82314950 T mpc3_set_ocsc_default +ffffffff82314af0 T mpc3_set_rmu_mux +ffffffff82314b90 T mpc3_get_rmu_mux_status +ffffffff82314c40 T mpcc3_acquire_rmu +ffffffff82314db0 T dcn30_mpc_construct +ffffffff82314e80 t mpcc3_release_rmu +ffffffff82314ff0 t mpc3_set_mpc_mem_lp_mode +ffffffff82316000 T optc3_triplebuffer_lock +ffffffff82316140 T optc3_lock_doublebuffer_enable +ffffffff82316410 T optc3_lock_doublebuffer_disable +ffffffff82316550 T optc3_lock +ffffffff82316640 T optc3_set_out_mux +ffffffff82316680 T optc3_program_blank_color +ffffffff823167d0 T optc3_set_drr_trigger_window +ffffffff82316870 T optc3_set_vtotal_change_limit +ffffffff823168f0 T optc3_set_dsc_config +ffffffff82316950 T optc3_set_odm_bypass +ffffffff82316af0 T optc3_set_odm_combine +ffffffff82316e70 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff82316ef0 T optc3_set_vtotal_min_max +ffffffff82316f30 T optc3_tg_init +ffffffff82316fa0 T dcn30_timing_generator_init +ffffffff82318000 T dcn30_add_stream_to_ctx +ffffffff82318020 T dcn30_populate_dml_pipes_from_context +ffffffff82318120 T dcn30_populate_dml_writeback_from_context +ffffffff82318190 T dcn30_calc_max_scaled_time +ffffffff823181f0 T dcn30_set_mcif_arb_params +ffffffff82318370 T dcn30_acquire_post_bldn_3dlut +ffffffff82318500 T dcn30_release_post_bldn_3dlut +ffffffff823185b0 T dcn30_internal_validate_bw +ffffffff823193e0 t dcn30_split_stream_for_mpc_or_odm +ffffffff82319740 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82319830 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff823198e0 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff82319990 T dcn30_update_soc_for_wm_a +ffffffff823199f0 T dcn30_calculate_wm_and_dlg +ffffffff82319a70 T dcn30_validate_bandwidth +ffffffff82319f40 T dcn30_update_bw_bounding_box +ffffffff8231a630 T dcn30_create_resource_pool +ffffffff8231bf30 t dcn30_resource_destruct +ffffffff8231c590 t dcn30_destroy_resource_pool +ffffffff8231c600 t dcn30_panel_cntl_create +ffffffff8231c690 t dcn30_link_encoder_create +ffffffff8231c750 t dcn30_get_panel_config_defaults +ffffffff8231c7d0 t read_dce_straps +ffffffff8231c800 t dcn30_create_audio +ffffffff8231c830 t dcn30_stream_encoder_create +ffffffff8231c9f0 t dcn30_hwseq_create +ffffffff8231d000 T vpg3_update_generic_info_packet +ffffffff8231da10 T vpg3_construct +ffffffff8231e000 T dccg301_create +ffffffff8231f000 T dcn301_link_encoder_construct +ffffffff82320000 T hubbub301_construct +ffffffff82321000 T dcn301_hw_sequencer_construct +ffffffff82322000 T optc301_set_drr +ffffffff82322260 T optc301_setup_manual_trigger +ffffffff82322390 T dcn301_timing_generator_init +ffffffff82323000 T dcn301_panel_cntl_construct +ffffffff82323050 t dcn301_panel_cntl_destroy +ffffffff823230a0 t dcn301_panel_cntl_hw_init +ffffffff82323320 t dcn301_is_panel_backlight_on +ffffffff82323390 t dcn301_is_panel_powered_on +ffffffff82323450 t dcn301_store_backlight_level +ffffffff82323510 t dcn301_get_16_bit_backlight_from_pwm +ffffffff82324000 T dcn301_create_resource_pool +ffffffff823258a0 t dcn301_destruct +ffffffff82325ec0 t dcn301_destroy_resource_pool +ffffffff82325f30 t dcn301_panel_cntl_create +ffffffff82325fc0 t dcn301_link_encoder_create +ffffffff82326080 t dcn301_calculate_wm_and_dlg +ffffffff82326100 t read_dce_straps +ffffffff82326130 t dcn301_create_audio +ffffffff82326160 t dcn301_stream_encoder_create +ffffffff82326320 t dcn301_hwseq_create +ffffffff82327000 T dcn302_dpp_pg_control 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dcn303_resource_destruct +ffffffff8232fb70 t dcn303_destroy_resource_pool +ffffffff8232fbe0 t dcn303_panel_cntl_create +ffffffff8232fc70 t dcn303_link_encoder_create +ffffffff8232fd30 t dcn303_get_panel_config_defaults +ffffffff8232fdb0 t read_dce_straps +ffffffff8232fde0 t dcn303_create_audio +ffffffff8232fe10 t dcn303_stream_encoder_create +ffffffff8232ffd0 t dcn303_hwseq_create +ffffffff82331000 T afmt31_powerdown +ffffffff82331090 T afmt31_poweron +ffffffff82331120 T afmt31_construct +ffffffff82332000 T apg31_construct +ffffffff82332050 t apg31_se_audio_setup +ffffffff82332170 t apg31_enable +ffffffff823322a0 t apg31_disable +ffffffff82333000 T dccg31_update_dpp_dto +ffffffff82333180 T dccg31_set_dpstreamclk +ffffffff82333320 t dccg31_disable_dpstreamclk +ffffffff82333480 T dccg31_enable_symclk32_se +ffffffff823337b0 T dccg31_disable_symclk32_se +ffffffff82333ab0 T dccg31_enable_symclk32_le +ffffffff82333bd0 T dccg31_disable_symclk32_le +ffffffff82333cc0 T dccg31_set_symclk32_le_root_clock_gating +ffffffff82333de0 T dccg31_disable_dscclk +ffffffff82334050 T dccg31_enable_dscclk +ffffffff823342f0 T dccg31_set_physymclk +ffffffff82334860 T dccg31_set_dtbclk_dto +ffffffff82334b50 T dccg31_set_audio_dtbclk_dto +ffffffff82334c80 T dccg31_get_dccg_ref_freq +ffffffff82334cb0 T dccg31_set_dispclk_change_mode +ffffffff82334d00 T dccg31_init +ffffffff823353a0 T dccg31_otg_add_pixel +ffffffff823353e0 T dccg31_otg_drop_pixel +ffffffff82335420 T dccg31_create +ffffffff82336000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff823363c0 T dcn31_link_encoder_construct +ffffffff823365b0 T dcn31_link_encoder_construct_minimal +ffffffff82336630 T dcn31_link_encoder_enable_dp_output +ffffffff823368b0 T dcn31_link_encoder_enable_dp_mst_output +ffffffff82336b30 T dcn31_link_encoder_disable_output +ffffffff82336de0 T dcn31_link_encoder_is_in_alt_mode +ffffffff82336f40 T dcn31_link_encoder_get_max_link_cap +ffffffff823370d0 t enc31_hw_init +ffffffff82338000 T dcn31_hpo_dp_link_enc_enable +ffffffff82338180 T dcn31_hpo_dp_link_enc_disable +ffffffff82338200 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff82338be0 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff82338e90 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff82339170 T dcn31_hpo_dp_link_enc_read_state +ffffffff82339480 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff82339590 T dcn31_hpo_dp_link_enc_disable_output +ffffffff823396f0 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff823397f0 T hpo_dp_link_encoder31_construct +ffffffff82339850 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff8233a000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff8233a070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff8233a1e0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff8233a500 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff8233a630 t dcn31_hpo_dp_stream_enc_disable +ffffffff8233a6b0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff8233afd0 t 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read_dce_straps +ffffffff823592f0 t dcn31_create_audio +ffffffff82359320 t dcn316_stream_encoder_create +ffffffff823594e0 t dcn31_hpo_dp_stream_encoder_create +ffffffff823596f0 t dcn31_hpo_dp_link_encoder_create +ffffffff82359790 t dcn31_hwseq_create +ffffffff8235a000 T dccg32_create +ffffffff8235a0c0 t dccg32_get_dccg_ref_freq +ffffffff8235a0f0 t dccg32_otg_add_pixel +ffffffff8235a130 t dccg32_otg_drop_pixel +ffffffff8235a170 t dccg32_set_dpstreamclk +ffffffff8235a4c0 t dccg32_set_dtbclk_dto +ffffffff8235a700 t dccg32_set_pixel_rate_div +ffffffff8235aa80 t dccg32_set_valid_pixel_rate +ffffffff8235ab00 t dccg32_trigger_dio_fifo_resync +ffffffff8235b000 T enc32_hw_init +ffffffff8235b0b0 T dcn32_link_encoder_enable_dp_output +ffffffff8235b100 T dcn32_link_encoder_construct +ffffffff8235b300 t dcn32_link_encoder_is_in_alt_mode +ffffffff8235b380 t dcn32_link_encoder_get_max_link_cap +ffffffff8235c000 T enc32_stream_encoder_dp_unblank +ffffffff8235c5b0 T enc32_enable_fifo +ffffffff8235c670 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dcn32_subvp_pipe_control_lock_fast +ffffffff82364f00 T dcn32_set_mpc_shaper_3dlut +ffffffff82365030 T dcn32_set_mcm_luts +ffffffff823651f0 T dcn32_set_input_transfer_func +ffffffff82365350 T dcn32_set_output_transfer_func +ffffffff823655d0 T dcn32_update_force_pstate +ffffffff82365820 T dcn32_update_mall_sel +ffffffff82365a30 T dcn32_program_mall_pipe_config +ffffffff82365b20 T dcn32_init_hw +ffffffff82366530 T dcn32_update_odm +ffffffff82366bd0 T dcn32_calculate_dccg_k1_k2_values +ffffffff82366e30 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff82366ee0 T dcn32_set_pixels_per_cycle +ffffffff82367040 T dcn32_resync_fifo_dccg_dio +ffffffff82367210 T dcn32_unblank_stream +ffffffff82367460 T dcn32_disable_link_output +ffffffff82367850 T dcn32_update_phantom_vp_position +ffffffff82367960 T dcn32_apply_update_flags_for_phantom +ffffffff823679f0 T dcn32_dsc_pg_status +ffffffff82367ad0 T dcn32_update_dsc_pg +ffffffff82367be0 T dcn32_enable_phantom_streams +ffffffff82367d40 T dcn32_init_blank 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scaler_settings_calculation +ffffffff823b1370 T mode_support_and_system_configuration +ffffffff823b7680 T display_pipe_configuration +ffffffff823b8000 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff823bd000 T dcn_bw_mod +ffffffff823bd060 T dcn_bw_min2 +ffffffff823bd0a0 T dcn_bw_max +ffffffff823bd0d0 T dcn_bw_max2 +ffffffff823bd110 T dcn_bw_floor2 +ffffffff823bd1c0 T dcn_bw_floor +ffffffff823bd1f0 T dcn_bw_ceil +ffffffff823bd230 T dcn_bw_ceil2 +ffffffff823bd2e0 T dcn_bw_max3 +ffffffff823bd360 T dcn_bw_max5 +ffffffff823bd4a0 T dcn_bw_pow +ffffffff823bd540 T dcn_bw_fabs +ffffffff823bd580 T dcn_bw_log +ffffffff823be000 T swizzle_mode_to_macro_tile_size +ffffffff823be0a0 T dcn_validate_bandwidth +ffffffff823c0450 T dcn_bw_sync_calcs_and_dml +ffffffff823c06a0 t dcn_bw_calc_rq_dlg_ttu +ffffffff823c0ed0 T dcn_find_dcfclk_suits_all +ffffffff823c1390 T dcn_bw_update_from_pplib_fclks +ffffffff823c1510 T dcn_bw_update_from_pplib_dcfclks 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dcn30_fpu_update_bw_bounding_box +ffffffff82408cd0 T dcn3_fpu_build_wm_range_table +ffffffff82408fb0 T patch_dcn30_soc_bounding_box +ffffffff8240a000 T dml30_recalculate +ffffffff8240a610 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82411470 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff824116e0 T dml30_CalculateWriteBackDISPCLK +ffffffff82411870 t dml_max3 +ffffffff824118e0 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff824197a0 t CalculateSwathAndDETConfiguration +ffffffff82419ec0 t TruncToValidBPP +ffffffff8241a130 t CalculateVMAndRowBytes +ffffffff8241a800 t CalculatePrefetchSourceLines +ffffffff8241a9f0 t CalculateUrgentBurstFactor +ffffffff8241aca0 t CalculateDCFCLKDeepSleep +ffffffff8241aff0 t UseMinimumDCFCLK +ffffffff8241c390 t CalculatePrefetchSchedule +ffffffff8241d940 t CalculateFlipSchedule +ffffffff8241de90 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8241ec40 t CalculateSwathWidth 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dcn316_update_bw_bounding_box +ffffffff824283a0 T dcn_get_max_non_odm_pix_rate_100hz +ffffffff82428400 T dcn_get_approx_det_segs_required_for_pstate +ffffffff82429000 T dml31_recalculate +ffffffff82429300 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82430640 T dml31_CalculateWriteBackDISPCLK +ffffffff824307d0 t dml_max3 +ffffffff82430840 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff82438d20 t CalculateSwathAndDETConfiguration +ffffffff824393c0 t TruncToValidBPP +ffffffff82439620 t CalculateDCFCLKDeepSleep +ffffffff82439970 t CalculateVMAndRowBytes +ffffffff8243a010 t CalculatePrefetchSourceLines +ffffffff8243a200 t CalculateUrgentBurstFactor +ffffffff8243a4b0 t UseMinimumDCFCLK +ffffffff8243b4d0 t CalculatePrefetchSchedulePerPlane +ffffffff8243bc50 t CalculateFlipSchedule +ffffffff8243c240 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8243cec0 t CalculateSwathWidth +ffffffff8243d430 t CalculatePrefetchSchedule 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CalculateMaxVStartup +ffffffff82456930 t UseMinimumDCFCLK +ffffffff82457950 t CalculatePrefetchSchedulePerPlane +ffffffff824580d0 t CalculateFlipSchedule +ffffffff824586c0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82459340 t CalculateSwathWidth +ffffffff824598b0 t CalculatePrefetchSchedule +ffffffff8245add0 t CalculateVupdateAndDynamicMetadataParameters +ffffffff8245c000 T dml314_rq_dlg_get_rq_reg +ffffffff8245c4f0 t dml_rq_dlg_get_rq_params +ffffffff8245c790 T dml314_rq_dlg_get_dlg_reg +ffffffff8245f670 t get_surf_rq_param +ffffffff82461000 T dcn32_build_wm_range_table_fpu +ffffffff824613a0 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff82461570 T dcn32_internal_validate_bw +ffffffff82463620 T dcn32_helper_populate_phantom_dlg_params +ffffffff824637e0 T dcn32_predict_pipe_split +ffffffff82463a30 T dcn32_set_phantom_stream_timing +ffffffff82463d60 T dcn32_determine_max_vratio_prefetch +ffffffff82463e40 t dcn32_split_stream_for_mpc_or_odm +ffffffff82464230 T dcn32_calculate_wm_and_dlg_fpu +ffffffff82465b50 T dcn32_patch_dpm_table +ffffffff82465d60 T dcn32_update_bw_bounding_box_fpu +ffffffff824684b0 T dcn32_zero_pipe_dcc_fraction +ffffffff82468520 T dcn32_allow_subvp_with_active_margin +ffffffff824685f0 T dcn32_allow_subvp_high_refresh_rate +ffffffff82468810 T dcn32_assign_fpo_vactive_candidate +ffffffff824688d0 T dcn32_find_vactive_pipe +ffffffff82468a40 T dcn32_set_clock_limits +ffffffff82468a90 T dcn32_override_min_req_memclk +ffffffff82468b60 t subvp_drr_schedulable +ffffffff82468e30 t get_optimal_ntuple +ffffffff8246a000 T dml32_recalculate +ffffffff8246e510 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff82477000 T dml32_dscceComputeDelay +ffffffff82477150 T dml32_dscComputeDelay +ffffffff82477190 T IsVertical +ffffffff824771c0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff82477540 t dml_max3 +ffffffff824775b0 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff824778e0 T dml32_CalculateSwathAndDETConfiguration +ffffffff82478140 T dml32_CalculateSwathWidth +ffffffff82478ab0 T dml32_UnboundedRequest +ffffffff82478b20 T dml32_CalculateDETBufferSize +ffffffff824791a0 T dml32_CalculateODMMode +ffffffff82479970 T dml32_CalculateRequiredDispclk +ffffffff82479b40 T dml32_RoundToDFSGranularity +ffffffff82479bd0 T dml32_CalculateOutputLink +ffffffff8247a6d0 T dml32_TruncToValidBPP +ffffffff8247aa10 T dml32_CalculateDPPCLK +ffffffff8247abc0 T dml32_RequiredDTBCLK +ffffffff8247ae60 t dml_max4 +ffffffff8247aef0 T dml32_DSCDelayRequirement +ffffffff8247b400 T dml32_CalculateSurfaceSizeInMall +ffffffff8247c110 T dml32_CalculateVMRowAndSwath +ffffffff8247cf50 T dml32_CalculateVMAndRowBytes +ffffffff8247dcb0 T dml32_CalculatePrefetchSourceLines +ffffffff8247df20 T dml32_CalculateMALLUseForStaticScreen +ffffffff8247e060 T dml32_CalculateRowBandwidth +ffffffff8247e1c0 T dml32_CalculateUrgentLatency +ffffffff8247e280 T dml32_CalculateUrgentBurstFactor +ffffffff8247e540 T dml32_CalculateDCFCLKDeepSleep +ffffffff8247e8b0 T dml32_CalculateWriteBackDelay +ffffffff8247ea30 T dml32_UseMinimumDCFCLK +ffffffff8247fb10 T dml32_CalculateExtraLatencyBytes +ffffffff8247fce0 T dml32_CalculateTWait +ffffffff8247fde0 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff82480060 T dml32_get_return_bw_mbps +ffffffff82480240 T dml32_get_return_bw_mbps_vm_only +ffffffff82480330 T dml32_CalculateExtraLatency +ffffffff82480560 T dml32_CalculatePrefetchSchedule +ffffffff82481d30 T dml32_CalculateFlipSchedule +ffffffff82482300 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff824834c0 T dml32_CalculateWriteBackDISPCLK +ffffffff824836b0 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff82483700 T dml32_CalculatePixelDeliveryTimes +ffffffff82483b90 T dml32_CalculateMetaAndPTETimes +ffffffff82484300 T dml32_CalculateVMGroupAndRequestTimes +ffffffff82484870 T dml32_CalculateDCCConfiguration +ffffffff82484ed0 T dml32_CalculateStutterEfficiency +ffffffff82485e90 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff82485f90 T dml32_CalculateVActiveBandwithSupport +ffffffff82486100 T dml32_CalculatePrefetchBandwithSupport +ffffffff82486430 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff82486590 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff82486820 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff82487000 T dml32_rq_dlg_get_rq_reg +ffffffff82487750 T dml32_rq_dlg_get_dlg_reg +ffffffff8248a000 T dcn321_update_bw_bounding_box_fpu +ffffffff8248c860 t get_optimal_ntuple +ffffffff8248d000 T dml_init_instance +ffffffff8248d320 T dml_get_status_message +ffffffff8248d360 T dml_log_pipe_params +ffffffff8248d390 T dml_log_mode_support_params +ffffffff8248e000 T dml_get_voltage_level +ffffffff8248e2c0 t fetch_socbb_params +ffffffff8248e7b0 t fetch_ip_params +ffffffff8248ec50 t fetch_pipe_params +ffffffff8248fce0 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff8248fd60 T get_clk_dcf_deepsleep +ffffffff8248feb0 T get_wm_urgent +ffffffff82490000 T get_wm_memory_trip +ffffffff82490150 T get_wm_writeback_urgent +ffffffff824902a0 T get_wm_stutter_exit +ffffffff824903f0 T get_wm_stutter_enter_exit +ffffffff82490540 T get_wm_z8_stutter_exit +ffffffff82490690 T get_wm_z8_stutter_enter_exit +ffffffff824907e0 T get_stutter_efficiency_z8 +ffffffff82490930 T get_stutter_num_bursts_z8 +ffffffff82490a80 T get_wm_dram_clock_change +ffffffff82490bd0 T get_wm_writeback_dram_clock_change +ffffffff82490d20 T get_stutter_efficiency +ffffffff82490e70 T get_stutter_efficiency_no_vblank +ffffffff82490fc0 T get_stutter_period +ffffffff82491110 T get_urgent_latency +ffffffff82491260 T get_urgent_extra_latency +ffffffff824913b0 T get_nonurgent_latency +ffffffff82491500 T get_dram_clock_change_latency +ffffffff82491650 T get_dispclk_calculated +ffffffff824917a0 T get_total_data_read_bw +ffffffff824918f0 T get_return_bw +ffffffff82491a40 T get_tcalc +ffffffff82491b90 T get_fraction_of_urgent_bandwidth +ffffffff82491ce0 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff82491e30 T get_cstate_max_cap_mode +ffffffff82491f90 T get_comp_buffer_size_kbytes +ffffffff824920e0 T get_pixel_chunk_size_in_kbyte +ffffffff82492230 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff82492380 T get_meta_chunk_size_in_kbyte +ffffffff824924d0 T get_min_pixel_chunk_size_in_byte +ffffffff82492620 T get_min_meta_chunk_size_in_byte +ffffffff82492770 T get_fclk_watermark +ffffffff824928c0 T get_usr_retraining_watermark +ffffffff82492a10 T get_comp_buffer_reserved_space_kbytes +ffffffff82492b60 T get_comp_buffer_reserved_space_64bytes +ffffffff82492cb0 T get_comp_buffer_reserved_space_zs +ffffffff82492e00 T get_unbounded_request_enabled +ffffffff82492f60 T get_dsc_delay +ffffffff824930c0 T get_dppclk_calculated +ffffffff82493220 T get_dscclk_calculated +ffffffff82493380 T get_min_ttu_vblank +ffffffff824934e0 T get_min_ttu_vblank_in_us +ffffffff82493640 T get_vratio_prefetch_l +ffffffff824937a0 T get_vratio_prefetch_c +ffffffff82493900 T get_dst_x_after_scaler +ffffffff82493a60 T get_dst_y_after_scaler +ffffffff82493bc0 T get_dst_y_per_vm_vblank +ffffffff82493d20 T get_dst_y_per_row_vblank +ffffffff82493e80 T get_dst_y_prefetch +ffffffff82493fe0 T get_dst_y_per_vm_flip +ffffffff82494140 T get_dst_y_per_row_flip +ffffffff824942a0 T get_refcyc_per_vm_group_vblank +ffffffff82494400 T get_refcyc_per_vm_group_flip +ffffffff82494560 T get_refcyc_per_vm_req_vblank +ffffffff824946c0 T get_refcyc_per_vm_req_flip +ffffffff82494820 T get_refcyc_per_vm_group_vblank_in_us +ffffffff82494980 T get_refcyc_per_vm_group_flip_in_us +ffffffff82494ae0 T get_refcyc_per_vm_req_vblank_in_us +ffffffff82494c40 T get_refcyc_per_vm_req_flip_in_us +ffffffff82494da0 T get_refcyc_per_vm_dmdata_in_us +ffffffff82494f00 T get_dmdata_dl_delta_in_us +ffffffff82495060 T get_refcyc_per_line_delivery_l_in_us +ffffffff824951c0 T get_refcyc_per_line_delivery_c_in_us +ffffffff82495320 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff82495480 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff824955e0 T get_refcyc_per_req_delivery_l_in_us +ffffffff82495740 T get_refcyc_per_req_delivery_c_in_us +ffffffff824958a0 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff82495a00 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff82495b60 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff82495cc0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff82495e20 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff82495f80 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff824960e0 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff82496240 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff824963a0 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff82496500 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff82496660 T get_vstartup +ffffffff824967c0 T get_vupdate_offset +ffffffff82496920 T get_vupdate_width +ffffffff82496a80 T get_vready_offset +ffffffff82496be0 T get_vready_at_or_after_vsync +ffffffff82496d50 T get_min_dst_y_next_start +ffffffff82496eb0 T get_dst_y_per_pte_row_nom_l +ffffffff82497010 T get_dst_y_per_pte_row_nom_c +ffffffff82497170 T get_dst_y_per_meta_row_nom_l +ffffffff824972d0 T get_dst_y_per_meta_row_nom_c +ffffffff82497430 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff82497590 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff824976f0 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff82497850 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff824979b0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff82497b10 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff82497c70 T get_vstartup_calculated +ffffffff82497dd0 T get_dpte_row_height_linear_c +ffffffff82497f30 T get_swath_height_l +ffffffff82498090 T get_swath_height_c +ffffffff824981f0 T get_det_stored_buffer_size_l_bytes +ffffffff82498350 T get_det_stored_buffer_size_c_bytes +ffffffff824984b0 T get_dpte_group_size_in_bytes +ffffffff82498610 T get_vm_group_size_in_bytes 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dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff824a38c0 T dc_set_disable_128b_132b_stream_overhead +ffffffff824a38f0 T dc_dsc_get_default_config_option +ffffffff824a3940 t fit_num_slices_up +ffffffff824a39f0 t decide_dsc_target_bpp_x16 +ffffffff824a4000 T calc_rc_params +ffffffff824a5000 T dscc_compute_dsc_parameters +ffffffff824a6000 T dal_hw_factory_dce110_init +ffffffff824a6060 t define_hpd_registers +ffffffff824a60b0 t define_ddc_registers +ffffffff824a7000 T dal_hw_translate_dce110_init +ffffffff824a7030 t offset_to_id +ffffffff824a73a0 t id_to_offset +ffffffff824a8000 T dal_hw_factory_dce120_init +ffffffff824a8060 t define_hpd_registers +ffffffff824a80b0 t define_ddc_registers +ffffffff824a9000 T dal_hw_translate_dce120_init +ffffffff824a9030 t offset_to_id +ffffffff824a93b0 t id_to_offset +ffffffff824aa000 T dal_hw_factory_dce80_init +ffffffff824aa060 t define_hpd_registers +ffffffff824aa0b0 t define_ddc_registers +ffffffff824ab000 T dal_hw_translate_dce80_init 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define_hpd_registers +ffffffff824b20b0 t define_ddc_registers +ffffffff824b2160 t define_generic_registers +ffffffff824b3000 T dal_hw_translate_dcn30_init +ffffffff824b3030 t offset_to_id +ffffffff824b32d0 t id_to_offset +ffffffff824b4000 T dal_hw_factory_dcn315_init +ffffffff824b4060 t define_hpd_registers +ffffffff824b40b0 t define_ddc_registers +ffffffff824b4160 t define_generic_registers +ffffffff824b5000 T dal_hw_translate_dcn315_init +ffffffff824b5030 t offset_to_id +ffffffff824b52b0 t id_to_offset +ffffffff824b6000 T dal_hw_factory_dcn32_init +ffffffff824b6060 t define_hpd_registers +ffffffff824b60b0 t define_ddc_registers +ffffffff824b6160 t define_generic_registers +ffffffff824b7000 T dal_hw_translate_dcn32_init +ffffffff824b7030 t offset_to_id +ffffffff824b7290 t id_to_offset +ffffffff824b8000 T dal_gpio_open +ffffffff824b80c0 T dal_gpio_open_ex +ffffffff824b8180 T dal_gpio_get_value +ffffffff824b8210 T dal_gpio_set_value +ffffffff824b82a0 T dal_gpio_get_mode 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T vmx_setmsrbrw -ffffffff82851e90 T svm_set_clean -ffffffff82851ee0 T svm_set_dirty -ffffffff82851f30 T vcpu_reset_regs_vmx -ffffffff828529a0 T vcpu_vmx_check_cap -ffffffff82852aa0 T vcpu_vmx_compute_ctrl -ffffffff82852c80 T vcpu_init_vmx -ffffffff82853190 T vmm_alloc_vpid -ffffffff828532b0 T vcpu_deinit_vmx -ffffffff828533e0 T vcpu_reset_regs -ffffffff82853460 T vcpu_init_svm -ffffffff82853770 T vcpu_deinit_svm -ffffffff828538e0 T vcpu_init -ffffffff828539b0 T vmm_free_vpid -ffffffff82853a20 T vcpu_deinit -ffffffff82853a60 T vm_run -ffffffff82853c60 T vcpu_run_vmx -ffffffff82854740 T vcpu_run_svm -ffffffff82854e10 T vmm_fpurestore -ffffffff82854ee0 T vmm_fpusave -ffffffff82854f70 T vmm_translate_gva -ffffffff828552a0 T vmm_update_pvclock -ffffffff828553b0 T vmx_get_exit_info -ffffffff82855430 T vmx_handle_exit -ffffffff828558a0 T vmx_instruction_error_decode -ffffffff82855a70 T vmm_get_guest_cpu_cpl -ffffffff82855b90 T vmx_handle_intr -ffffffff82855c30 T svm_handle_hlt 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sdmmc_print -ffffffff8285fec0 T sdmmc_submatch -ffffffff8285ff50 T sdmmc_io_detach -ffffffff82860010 T sdmmc_io_rw_direct -ffffffff828601e0 T sdmmc_io_rw_extended_subr -ffffffff82860390 T sdmmc_io_rw_extended -ffffffff828607d0 T sdmmc_io_read_2 -ffffffff82860940 T sdmmc_io_write_2 -ffffffff82860ac0 T sdmmc_io_read_4 -ffffffff82860c30 T sdmmc_io_write_4 -ffffffff82860db0 T sdmmc_io_read_multi_1 -ffffffff82860eb0 T sdmmc_io_write_multi_1 -ffffffff82860fb0 T sdmmc_io_read_region_1 -ffffffff828610b0 T sdmmc_io_write_region_1 -ffffffff828611b0 T sdmmc_io_xchg -ffffffff82861370 T sdmmc_intr_enable -ffffffff82861650 T sdmmc_intr_disable -ffffffff82861930 T sdmmc_intr_establish -ffffffff82861a50 T sdmmc_intr_disestablish -ffffffff82861b50 T sdmmc_card_intr -ffffffff82861ba0 T sdmmc_intr_task -ffffffff82861c60 T sdmmc_io_set_blocklen -ffffffff82862000 T sdmmc_mem_enable -ffffffff828624d0 T sdmmc_mem_send_op_cond -ffffffff828626b0 T sdmmc_mem_signal_voltage -ffffffff828627b0 T sdmmc_mem_scan -ffffffff82862b00 T sdmmc_decode_csd -ffffffff82862f50 T sdmmc_decode_cid -ffffffff82863400 T sdmmc_mem_send_scr -ffffffff82863560 T sdmmc_mem_decode_scr -ffffffff828635c0 T sdmmc_mem_send_cxd_data -ffffffff82863740 T sdmmc_mem_set_bus_width -ffffffff82863870 T sdmmc_mem_sd_switch -ffffffff82863b30 T sdmmc_be512_to_bitfield512 -ffffffff82863be0 T sdmmc_mem_mmc_switch -ffffffff82863cd0 T sdmmc_mem_init -ffffffff82863e60 T sdmmc_mem_set_blocklen -ffffffff82863f70 T sdmmc_mem_sd_init -ffffffff828643e0 T sdmmc_mem_mmc_init -ffffffff82864b60 T sdmmc_mem_select_transfer_mode -ffffffff82864be0 T sdmmc_mem_execute_tuning -ffffffff82864c70 T sdmmc_mem_read_block_subr -ffffffff82865000 T sdmmc_mem_single_read_block -ffffffff828650d0 T sdmmc_mem_read_block -ffffffff828652e0 T sdmmc_mem_write_block_subr -ffffffff82865660 T sdmmc_mem_single_write_block -ffffffff82865730 T sdmmc_mem_write_block -ffffffff82865940 T sdmmc_mem_hibernate_write -ffffffff82866000 T sdmmc_scsi_cmd -ffffffff82866200 T sdmmc_minphys -ffffffff82866280 T sdmmc_scsi_attach -ffffffff828664c0 T sdmmc_alloc_ccbs -ffffffff82866620 T sdmmc_free_ccbs -ffffffff82866680 T sdmmc_scsi_detach -ffffffff82866840 T sdmmc_stimeout -ffffffff828668e0 T sdmmc_ccb_alloc -ffffffff828669a0 T sdmmc_ccb_free -ffffffff82866aa0 T sdmmc_inquiry -ffffffff82866d30 T sdmmc_start_xs -ffffffff82866e50 T sdmmc_complete_xs -ffffffff82866f40 T sdmmc_done_xs -ffffffff82866f90 T sdmmc_scsi_hibernate_io -ffffffff82868000 T bwfm_sdio_preinit -ffffffff828685a0 T bwfm_sdio_txcheck -ffffffff828685e0 T bwfm_sdio_txdata -ffffffff82868660 T bwfm_sdio_txctl -ffffffff828687f0 T bwfm_sdio_buscore_read -ffffffff82868800 T bwfm_sdio_buscore_write -ffffffff82868820 T bwfm_sdio_buscore_prepare -ffffffff828689a0 T bwfm_sdio_buscore_activate -ffffffff82868a30 T bwfm_sdio_match -ffffffff82868ae0 T bwfm_sdio_attach -ffffffff82868e80 T bwfm_sdio_detach -ffffffff82868f00 T bwfm_sdio_task -ffffffff828690c0 T bwfm_sdio_write_1 -ffffffff828690f0 T bwfm_sdio_read_1 -ffffffff82869120 T bwfm_sdio_write_4 -ffffffff828691f0 T bwfm_sdio_read_4 -ffffffff828692b0 T bwfm_sdio_load_microcode -ffffffff828695a0 T bwfm_sdio_clkctl -ffffffff828696d0 T bwfm_sdio_dev_write -ffffffff82869720 T bwfm_sdio_intr -ffffffff82869770 T bwfm_sdio_ram_read_write -ffffffff828699f0 T bwfm_sdio_htclk -ffffffff82869cb0 T bwfm_sdio_readshared -ffffffff82869da0 T bwfm_sdio_dev_read -ffffffff82869de0 T bwfm_sdio_rx_frames -ffffffff8286a210 T bwfm_sdio_tx_frames -ffffffff8286a330 T bwfm_sdio_backplane -ffffffff8286a400 T bwfm_sdio_buf_read -ffffffff8286a500 T bwfm_sdio_buf_write -ffffffff8286a5d0 T bwfm_sdio_frame_read_write -ffffffff8286a780 T bwfm_sdio_newbuf -ffffffff8286a810 T bwfm_sdio_tx_ok -ffffffff8286a870 T bwfm_sdio_tx_ctrlframe -ffffffff8286a980 T bwfm_sdio_tx_dataframe -ffffffff8286aaf0 T bwfm_sdio_rx_glom -ffffffff8286b000 T onewire_match -ffffffff8286b060 T onewire_attach -ffffffff8286b120 T onewire_detach -ffffffff8286b190 T onewire_activate -ffffffff8286b1b0 T onewire_scan -ffffffff8286b400 T onewire_createthread -ffffffff8286b470 T onewire_print -ffffffff8286b560 T onewirebus_print -ffffffff8286b5b0 T onewire_lock -ffffffff8286b5d0 T onewire_unlock -ffffffff8286b5f0 T onewire_reset -ffffffff8286b610 T onewire_bit -ffffffff8286b630 T onewire_read_byte -ffffffff8286b7c0 T onewire_write_byte -ffffffff8286b8d0 T onewire_read_block -ffffffff8286b970 T onewire_write_block -ffffffff8286ba10 T onewire_triplet -ffffffff8286bb20 T onewire_matchrom -ffffffff8286bd10 T onewire_search -ffffffff8286c180 T onewire_thread -ffffffff8286d000 T onewire_crc -ffffffff8286d0b0 T onewire_crc16 -ffffffff8286d170 T onewire_famname -ffffffff8286d1b0 T onewire_matchbyfam -ffffffff8286e000 T owid_match -ffffffff8286e030 T owid_attach -ffffffff8286e120 T owid_detach -ffffffff8286e170 T owid_activate -ffffffff8286f000 T owsbm_match -ffffffff8286f030 T owsbm_attach -ffffffff8286f240 T owsbm_detach -ffffffff8286f2d0 T owsbm_activate -ffffffff8286f300 T owsbm_update -ffffffff82870000 T owtemp_match -ffffffff82870030 T owtemp_attach -ffffffff82870160 T owtemp_detach -ffffffff828701f0 T owtemp_activate -ffffffff82870220 T owtemp_update -ffffffff82871000 T owctr_match -ffffffff82871030 T owctr_attach -ffffffff828711c0 T owctr_detach -ffffffff82871250 T owctr_activate -ffffffff82871280 T owctr_update -ffffffff828712c0 T owctr_update_counter -ffffffff82872000 A __text_page_start -ffffffff82872000 T Xsyscall_meltdown -ffffffff8287200c T Xsyscall -ffffffff82872299 t Xsyscall_trampback -ffffffff828722b0 T intr_user_exit -ffffffff828722f2 t intr_user_exit_post_ast -ffffffff8287244b t Xiretq_trampback -ffffffff82872457 T doreti_iret -ffffffff82873000 T alltraps -ffffffff82873138 T recall_trap -ffffffff82873150 T alltraps_kern -ffffffff82873153 T alltraps_kern_meltdown -ffffffff82874000 ? Xtrap00 -ffffffff82874000 A __kutext_start -ffffffff82874000 A __text_page_end -ffffffff82874010 ? Xtrap01 -ffffffff82874020 ? Xtrap02 -ffffffff82874028 c calltrap_specstk -ffffffff828740f0 ? calltrap_specstk_tramp -ffffffff82874110 ? Xtrap03 -ffffffff82874120 ? Xtrap04 -ffffffff82874130 ? Xtrap05 -ffffffff82874140 ? Xtrap06 -ffffffff82874150 ? Xtrap07 -ffffffff82874160 ? Xtrap08 -ffffffff82874170 ? Xtrap09 -ffffffff82874180 ? Xtrap0a -ffffffff82874190 ? Xtrap0b -ffffffff828741a0 ? Xtrap0c -ffffffff828741b0 ? Xtrap0d -ffffffff82874240 ? Xtrap0e -ffffffff82874250 ? Xintrspurious -ffffffff82874250 ? Xtrap0f -ffffffff82874260 ? Xtrap10 -ffffffff82874270 ? Xtrap11 -ffffffff82874280 ? Xtrap12 -ffffffff82874290 ? Xtrap13 -ffffffff828742a0 ? Xtrap14 -ffffffff828742b0 ? Xtrap15 -ffffffff828742c0 ? Xtrap16 -ffffffff828742c0 ? Xtrap17 -ffffffff828742c0 ? Xtrap18 -ffffffff828742c0 ? Xtrap19 -ffffffff828742c0 ? Xtrap1a -ffffffff828742c0 ? Xtrap1b -ffffffff828742c0 ? Xtrap1c -ffffffff828742c0 ? Xtrap1d -ffffffff828742c0 ? Xtrap1e -ffffffff828742c0 ? Xtrap1f -ffffffff828742d0 ? x2apic_eoi -ffffffff828742f0 ? Xintr_lapic_ipi -ffffffff82874330 ? Xipi_invltlb -ffffffff82874360 ? Xipi_invept -ffffffff828743a0 ? Xipi_invlpg -ffffffff828743d0 ? Xipi_invlrange -ffffffff82874410 ? Xipi_invltlb_pcid -ffffffff82874450 ? Xipi_invlpg_pcid -ffffffff828744a0 ? Xipi_invlrange_pcid -ffffffff82874510 ? Xipi_wbinvd -ffffffff82874530 ? Xintr_lapic_ltimer -ffffffff82874570 ? Xintr_xen_upcall -ffffffff828745b0 ? Xintr_hyperv_upcall -ffffffff828745f0 ? Xintr_legacy0 -ffffffff82874630 ? Xintr_legacy1 -ffffffff82874670 ? Xintr_legacy2 -ffffffff828746b0 ? Xintr_legacy3 -ffffffff828746f0 ? Xintr_legacy4 -ffffffff82874730 ? Xintr_legacy5 -ffffffff82874770 ? Xintr_legacy6 -ffffffff828747b0 ? Xintr_legacy7 -ffffffff828747f0 ? Xintr_legacy8 -ffffffff82874830 ? Xintr_legacy9 -ffffffff82874870 ? Xintr_legacy10 -ffffffff828748b0 ? Xintr_legacy11 -ffffffff828748f0 ? Xintr_legacy12 -ffffffff82874930 ? Xintr_legacy13 -ffffffff82874970 ? Xintr_legacy14 -ffffffff828749b0 ? Xintr_legacy15 -ffffffff828749f0 ? Xintr_ioapic_edge0 -ffffffff82874a30 ? Xintr_ioapic_edge1 -ffffffff82874a70 ? Xintr_ioapic_edge2 -ffffffff82874ab0 ? Xintr_ioapic_edge3 -ffffffff82874af0 ? Xintr_ioapic_edge4 -ffffffff82874b30 ? Xintr_ioapic_edge5 -ffffffff82874b70 ? Xintr_ioapic_edge6 -ffffffff82874bb0 ? Xintr_ioapic_edge7 -ffffffff82874bf0 ? Xintr_ioapic_edge8 -ffffffff82874c30 ? Xintr_ioapic_edge9 -ffffffff82874c70 ? Xintr_ioapic_edge10 -ffffffff82874cb0 ? Xintr_ioapic_edge11 -ffffffff82874cf0 ? Xintr_ioapic_edge12 -ffffffff82874d30 ? Xintr_ioapic_edge13 -ffffffff82874d70 ? Xintr_ioapic_edge14 -ffffffff82874db0 ? Xintr_ioapic_edge15 -ffffffff82874df0 ? Xintr_ioapic_edge16 -ffffffff82874e30 ? Xintr_ioapic_edge17 -ffffffff82874e70 ? Xintr_ioapic_edge18 -ffffffff82874eb0 ? Xintr_ioapic_edge19 -ffffffff82874ef0 ? Xintr_ioapic_edge20 -ffffffff82874f30 ? Xintr_ioapic_edge21 -ffffffff82874f70 ? Xintr_ioapic_edge22 -ffffffff82874fb0 ? Xintr_ioapic_edge23 -ffffffff82874ff0 ? Xintr_ioapic_edge24 -ffffffff82875030 ? Xintr_ioapic_edge25 -ffffffff82875070 ? Xintr_ioapic_edge26 -ffffffff828750b0 ? Xintr_ioapic_edge27 -ffffffff828750f0 ? Xintr_ioapic_edge28 -ffffffff82875130 ? Xintr_ioapic_edge29 -ffffffff82875170 ? Xintr_ioapic_edge30 -ffffffff828751b0 ? Xintr_ioapic_edge31 -ffffffff828751f0 ? Xintr_ioapic_edge32 -ffffffff82875230 ? Xintr_ioapic_edge33 -ffffffff82875270 ? Xintr_ioapic_edge34 -ffffffff828752b0 ? Xintr_ioapic_edge35 -ffffffff828752f0 ? Xintr_ioapic_edge36 -ffffffff82875330 ? Xintr_ioapic_edge37 -ffffffff82875370 ? Xintr_ioapic_edge38 -ffffffff828753b0 ? Xintr_ioapic_edge39 -ffffffff828753f0 ? Xintr_ioapic_edge40 -ffffffff82875430 ? Xintr_ioapic_edge41 -ffffffff82875470 ? Xintr_ioapic_edge42 -ffffffff828754b0 ? Xintr_ioapic_edge43 -ffffffff828754f0 ? Xintr_ioapic_edge44 -ffffffff82875530 ? Xintr_ioapic_edge45 -ffffffff82875570 ? Xintr_ioapic_edge46 -ffffffff828755b0 ? Xintr_ioapic_edge47 -ffffffff828755f0 ? Xintr_ioapic_edge48 -ffffffff82875630 ? Xintr_ioapic_edge49 -ffffffff82875670 ? Xintr_ioapic_edge50 -ffffffff828756b0 ? Xintr_ioapic_edge51 -ffffffff828756f0 ? Xintr_ioapic_edge52 -ffffffff82875730 ? Xintr_ioapic_edge53 -ffffffff82875770 ? Xintr_ioapic_edge54 -ffffffff828757b0 ? Xintr_ioapic_edge55 -ffffffff828757f0 ? Xintr_ioapic_edge56 -ffffffff82875830 ? Xintr_ioapic_edge57 -ffffffff82875870 ? Xintr_ioapic_edge58 -ffffffff828758b0 ? Xintr_ioapic_edge59 -ffffffff828758f0 ? Xintr_ioapic_edge60 -ffffffff82875930 ? Xintr_ioapic_edge61 -ffffffff82875970 ? Xintr_ioapic_edge62 -ffffffff828759b0 ? Xintr_ioapic_edge63 -ffffffff828759f0 ? Xintr_ioapic_level0 -ffffffff82875a30 ? Xintr_ioapic_level1 -ffffffff82875a70 ? Xintr_ioapic_level2 -ffffffff82875ab0 ? Xintr_ioapic_level3 -ffffffff82875af0 ? Xintr_ioapic_level4 -ffffffff82875b30 ? Xintr_ioapic_level5 -ffffffff82875b70 ? Xintr_ioapic_level6 -ffffffff82875bb0 ? Xintr_ioapic_level7 -ffffffff82875bf0 ? Xintr_ioapic_level8 -ffffffff82875c30 ? Xintr_ioapic_level9 -ffffffff82875c70 ? Xintr_ioapic_level10 -ffffffff82875cb0 ? Xintr_ioapic_level11 -ffffffff82875cf0 ? Xintr_ioapic_level12 -ffffffff82875d30 ? Xintr_ioapic_level13 -ffffffff82875d70 ? Xintr_ioapic_level14 -ffffffff82875db0 ? Xintr_ioapic_level15 -ffffffff82875df0 ? Xintr_ioapic_level16 -ffffffff82875e30 ? Xintr_ioapic_level17 -ffffffff82875e70 ? Xintr_ioapic_level18 -ffffffff82875eb0 ? Xintr_ioapic_level19 -ffffffff82875ef0 ? Xintr_ioapic_level20 -ffffffff82875f30 ? Xintr_ioapic_level21 -ffffffff82875f70 ? Xintr_ioapic_level22 -ffffffff82875fb0 ? Xintr_ioapic_level23 -ffffffff82875ff0 ? Xintr_ioapic_level24 -ffffffff82876030 ? Xintr_ioapic_level25 -ffffffff82876070 ? Xintr_ioapic_level26 -ffffffff828760b0 ? Xintr_ioapic_level27 -ffffffff828760f0 ? Xintr_ioapic_level28 -ffffffff82876130 ? Xintr_ioapic_level29 -ffffffff82876170 ? Xintr_ioapic_level30 -ffffffff828761b0 ? Xintr_ioapic_level31 -ffffffff828761f0 ? Xintr_ioapic_level32 -ffffffff82876230 ? Xintr_ioapic_level33 -ffffffff82876270 ? Xintr_ioapic_level34 -ffffffff828762b0 ? Xintr_ioapic_level35 -ffffffff828762f0 ? Xintr_ioapic_level36 -ffffffff82876330 ? Xintr_ioapic_level37 -ffffffff82876370 ? Xintr_ioapic_level38 -ffffffff828763b0 ? Xintr_ioapic_level39 -ffffffff828763f0 ? Xintr_ioapic_level40 -ffffffff82876430 ? Xintr_ioapic_level41 -ffffffff82876470 ? Xintr_ioapic_level42 -ffffffff828764b0 ? Xintr_ioapic_level43 -ffffffff828764f0 ? Xintr_ioapic_level44 -ffffffff82876530 ? Xintr_ioapic_level45 -ffffffff82876570 ? Xintr_ioapic_level46 -ffffffff828765b0 ? Xintr_ioapic_level47 -ffffffff828765f0 ? Xintr_ioapic_level48 -ffffffff82876630 ? Xintr_ioapic_level49 -ffffffff82876670 ? Xintr_ioapic_level50 -ffffffff828766b0 ? Xintr_ioapic_level51 -ffffffff828766f0 ? Xintr_ioapic_level52 -ffffffff82876730 ? Xintr_ioapic_level53 -ffffffff82876770 ? Xintr_ioapic_level54 -ffffffff828767b0 ? Xintr_ioapic_level55 -ffffffff828767f0 ? Xintr_ioapic_level56 -ffffffff82876830 ? Xintr_ioapic_level57 -ffffffff82876870 ? Xintr_ioapic_level58 -ffffffff828768b0 ? Xintr_ioapic_level59 -ffffffff828768f0 ? Xintr_ioapic_level60 -ffffffff82876930 ? Xintr_ioapic_level61 -ffffffff82876970 ? Xintr_ioapic_level62 -ffffffff828769b0 ? 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vga_50lscreen_mono -ffffffff829901c8 R vga_50lscreen_bf -ffffffff829901f8 R vga_screenlist -ffffffff82990208 R vga_screenlist_mono -ffffffff82990218 R vga_accessops -ffffffff82990278 r i945_wm_info -ffffffff829902b8 r bgansitopc -ffffffff829902c0 r pctoansi -ffffffff82990300 r sdma_offsets -ffffffff82990300 r sdma_offsets -ffffffff82990338 r iha_rate_tbl -ffffffff82990370 r i830_a_wm_info -ffffffff829903a8 r gen9_edram_size_mb.ways -ffffffff82990408 r aggr_periodic_times -ffffffff82990508 r michael_final.pad -ffffffff82990530 r rt_copysa.maskarray -ffffffff82990538 r i915_wm_info -ffffffff82990540 r amdgpu_ih_clientid_jpeg -ffffffff82990540 r amdgpu_ih_clientid_uvds -ffffffff82990540 r amdgpu_ih_clientid_vcns -ffffffff82990540 r amdgpu_ih_clientid_vcns -ffffffff82990540 r amdgpu_ih_clientid_vcns -ffffffff82990570 r jsl_ehl_revids -ffffffff82990580 r vga_setfontset.cmaptabb -ffffffff829905f0 r i830_bc_wm_info -ffffffff82990658 r hsw_activate_psr2.map -ffffffff82990660 r tgl_revids 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dp_trace_get_edp_poweron_timestamp +ffffffff824d3720 T dp_trace_get_edp_poweroff_timestamp +ffffffff824d3750 T dp_trace_source_sequence +ffffffff824d4000 T dp_fpga_hpo_enable_link_and_stream +ffffffff824d5000 T set_dio_throttled_vcp_size +ffffffff824d5020 T setup_dio_stream_encoder +ffffffff824d5130 T reset_dio_stream_encoder +ffffffff824d5220 T setup_dio_stream_attribute +ffffffff824d53e0 T enable_dio_dp_link_output +ffffffff824d5480 T disable_dio_link_output +ffffffff824d54f0 T set_dio_dp_link_test_pattern +ffffffff824d5560 T set_dio_dp_lane_settings +ffffffff824d55a0 T update_dio_stream_allocation_table +ffffffff824d5620 T setup_dio_audio_output +ffffffff824d5690 T enable_dio_audio_packet +ffffffff824d5760 T disable_dio_audio_packet +ffffffff824d5850 T can_use_dio_link_hwss +ffffffff824d5890 T get_dio_link_hwss +ffffffff824d6000 T dp_dio_fixed_vs_pe_retimer_lane_cfg_to_hw_cfg +ffffffff824d6040 T dp_dio_fixed_vs_pe_retimer_exit_manual_automation +ffffffff824d62e0 T enable_dio_fixed_vs_pe_retimer_program_4lane_output +ffffffff824d6440 T requires_fixed_vs_pe_retimer_dio_link_hwss +ffffffff824d6480 T get_dio_fixed_vs_pe_retimer_link_hwss +ffffffff824d64b0 t enable_dio_fixed_vs_pe_retimer_dp_link_output +ffffffff824d6650 t set_dio_fixed_vs_pe_retimer_dp_link_test_pattern +ffffffff824d7000 T can_use_dpia_link_hwss +ffffffff824d7050 T get_dpia_link_hwss +ffffffff824d7080 t update_dpia_stream_allocation_table +ffffffff824d8000 T set_hpo_dp_throttled_vcp_size +ffffffff824d8030 T set_hpo_dp_hblank_min_symbol_width +ffffffff824d8160 T setup_hpo_dp_stream_encoder +ffffffff824d81b0 T reset_hpo_dp_stream_encoder +ffffffff824d81d0 T setup_hpo_dp_stream_attribute +ffffffff824d8250 T enable_hpo_dp_link_output +ffffffff824d8300 T disable_hpo_dp_link_output +ffffffff824d83d0 T update_hpo_dp_stream_allocation_table +ffffffff824d83f0 T setup_hpo_dp_audio_output +ffffffff824d8430 T enable_hpo_dp_audio_packet +ffffffff824d8450 T disable_hpo_dp_audio_packet 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link_blank_all_dp_displays +ffffffff824dd0f0 T link_blank_dp_stream +ffffffff824dd230 T link_blank_all_edp_displays +ffffffff824dd300 T link_set_all_streams_dpms_off_for_link +ffffffff824dd420 T link_get_master_pipes_with_dpms_on +ffffffff824dd610 T link_resume +ffffffff824dd650 T link_set_dsc_on_stream +ffffffff824ddba0 T link_set_dsc_pps_packet +ffffffff824ddf70 T link_set_dsc_enable +ffffffff824de020 T link_update_dsc_config +ffffffff824de0b0 T link_calculate_sst_avg_time_slots_per_mtp +ffffffff824de150 T link_reduce_mst_payload +ffffffff824de620 t update_mst_stream_alloc_table +ffffffff824de8b0 T link_increase_mst_payload +ffffffff824ded70 T link_set_dpms_off +ffffffff824dfae0 t update_psp_stream_config +ffffffff824dfd20 t update_sst_payload +ffffffff824e04d0 t get_ext_hdmi_settings +ffffffff824e0720 t write_i2c_retimer_setting +ffffffff824e0e00 t write_i2c_default_retimer_setting +ffffffff824e1390 t write_i2c_redriver_setting +ffffffff824e14c0 t disable_link +ffffffff824e1660 T link_set_dpms_on +ffffffff824e2250 t enable_stream_features +ffffffff824e2310 t allocate_usb4_bandwidth +ffffffff824e2350 t allocate_mst_payload +ffffffff824e2880 t log_vcp_x_y +ffffffff824e2a30 t write_i2c +ffffffff824e2ad0 t enable_link_dp +ffffffff824e3000 T link_create_link_service +ffffffff824e3480 T link_destroy_link_service +ffffffff824e34d0 T link_create +ffffffff824e46d0 T link_destroy +ffffffff824e5000 T link_get_cur_link_res +ffffffff824e5150 T link_get_cur_res_map +ffffffff824e5240 T link_restore_res_map +ffffffff824e6000 T dp_link_bandwidth_kbps +ffffffff824e60b0 T link_validate_mode_timing +ffffffff824e66d0 t get_tmds_output_pixel_clock_100hz +ffffffff824e6740 T link_validate_dpia_bandwidth +ffffffff824e7000 T link_create_ddc_service +ffffffff824e71b0 T link_destroy_ddc_service +ffffffff824e7260 T set_ddc_transaction_type +ffffffff824e7290 T link_is_in_aux_transaction_mode +ffffffff824e72d0 T set_dongle_type +ffffffff824e7300 T link_get_aux_defer_delay +ffffffff824e7440 T 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amdgpu_dpm_display_configuration_change +ffffffff82531020 T amdgpu_dpm_get_clock_by_type +ffffffff825310d0 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff82531180 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff82531230 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff825312e0 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff82531390 T amdgpu_dpm_display_clock_voltage_request +ffffffff82531440 T amdgpu_dpm_get_current_clocks +ffffffff825314f0 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff82531590 T amdgpu_dpm_set_active_display_count +ffffffff82531640 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff825316f0 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff825317a0 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff82531850 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff82531900 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff825319b0 T amdgpu_dpm_get_uclk_dpm_states +ffffffff82531a70 T amdgpu_dpm_get_dpm_clock_table +ffffffff82532000 T amdgpu_dpm_get_active_displays +ffffffff825320a0 T amdgpu_dpm_get_vblank_time +ffffffff82532150 T amdgpu_dpm_get_vrefresh +ffffffff82533000 T amdgpu_pm_sysfs_init +ffffffff82533030 T amdgpu_pm_sysfs_fini +ffffffff82533060 T amdgpu_debugfs_pm_init +ffffffff82534000 T amdgpu_dpm_print_class_info +ffffffff82534340 T amdgpu_dpm_print_cap_info +ffffffff825343e0 T amdgpu_dpm_print_ps_status +ffffffff825344a0 T amdgpu_pm_print_power_states +ffffffff82534540 T amdgpu_get_platform_caps +ffffffff825345e0 T amdgpu_parse_extended_power_table +ffffffff82535420 t amdgpu_parse_clk_voltage_dep_table +ffffffff825354e0 T amdgpu_free_extended_power_table +ffffffff82535660 T amdgpu_add_thermal_controller +ffffffff82535b30 T amdgpu_get_vce_clock_state +ffffffff82535b70 T amdgpu_legacy_dpm_compute_clocks +ffffffff82536050 T amdgpu_dpm_thermal_work_handler +ffffffff82537000 t pp_early_init +ffffffff82537120 t pp_late_init +ffffffff82537250 t pp_sw_init +ffffffff825372f0 t pp_sw_fini +ffffffff82537350 t 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t pp_display_configuration_change +ffffffff82538a00 t pp_get_display_power_level +ffffffff82538a40 t pp_get_current_clocks +ffffffff82538b80 t pp_get_clock_by_type +ffffffff82538bd0 t pp_get_clock_by_type_with_latency +ffffffff82538c20 t pp_get_clock_by_type_with_voltage +ffffffff82538c70 t pp_set_watermarks_for_clocks_ranges +ffffffff82538cb0 t pp_display_clock_voltage_request +ffffffff82538cf0 t pp_get_display_mode_validation_clocks +ffffffff82538d50 t pp_notify_smu_enable_pwe +ffffffff82538dc0 t pp_enable_mgpu_fan_boost +ffffffff82538e30 t pp_set_active_display_count +ffffffff82538e70 t pp_set_hard_min_dcefclk_by_freq +ffffffff82538ee0 t pp_set_hard_min_fclk_by_freq +ffffffff82538f50 t pp_set_min_deep_sleep_dcefclk +ffffffff82538fc0 t pp_get_asic_baco_capability +ffffffff82539040 t pp_get_asic_baco_state +ffffffff825390b0 t pp_set_asic_baco_state +ffffffff82539130 t pp_get_ppfeature_status +ffffffff82539190 t pp_set_ppfeature_status +ffffffff825391e0 t pp_asic_reset_mode_2 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phm_pre_display_configuration_changed +ffffffff8253d480 T phm_display_configuration_changed +ffffffff8253d4f0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff8253d560 T phm_stop_thermal_controller +ffffffff8253d5c0 T phm_register_irq_handlers +ffffffff8253d610 T phm_start_thermal_controller +ffffffff8253d760 T phm_check_smc_update_required_for_display_configuration +ffffffff8253d7c0 T phm_check_states_equal +ffffffff8253d810 T phm_store_dal_configuration_data +ffffffff8253d970 T phm_get_dal_power_level +ffffffff8253d9d0 T phm_set_cpu_power_state +ffffffff8253da20 T phm_get_performance_level +ffffffff8253da80 T phm_get_clock_info +ffffffff8253dc10 T phm_get_current_shallow_sleep_clocks +ffffffff8253dc60 T phm_get_clock_by_type +ffffffff8253dcb0 T phm_get_clock_by_type_with_latency +ffffffff8253dd00 T phm_get_clock_by_type_with_voltage +ffffffff8253dd50 T phm_set_watermarks_for_clocks_ranges +ffffffff8253dda0 T phm_display_clock_voltage_request +ffffffff8253ddf0 T phm_get_max_high_clocks +ffffffff8253de40 T phm_disable_smc_firmware_ctf +ffffffff8253dea0 T phm_set_active_display_count +ffffffff8253e000 T hwmgr_early_init +ffffffff8253e4a0 t polaris_set_asic_special_caps +ffffffff8253e520 T hwmgr_sw_init +ffffffff8253e5a0 T hwmgr_sw_fini +ffffffff8253e600 T hwmgr_hw_init +ffffffff8253e800 T hwmgr_hw_fini +ffffffff8253e8f0 T hwmgr_suspend +ffffffff8253e990 T hwmgr_resume +ffffffff8253ea50 T hwmgr_handle_task +ffffffff8253f000 T polaris_baco_set_state +ffffffff82540000 T pp_override_get_default_fuse_value +ffffffff82541000 T psm_init_power_state_table +ffffffff82541350 T psm_fini_power_state_table +ffffffff82541430 T psm_set_boot_states +ffffffff825414e0 T psm_set_performance_states +ffffffff82541590 T psm_set_user_performance_state +ffffffff82541620 T psm_adjust_power_state_dynamic +ffffffff82542000 T atomctrl_initialize_mc_reg_table +ffffffff82542130 t atomctrl_retrieve_ac_timing +ffffffff82542290 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff825423c0 T atomctrl_set_engine_dram_timings_rv770 +ffffffff82542430 T atomctrl_get_memory_pll_dividers_si +ffffffff82542510 T atomctrl_get_memory_pll_dividers_vi +ffffffff82542590 T atomctrl_get_memory_pll_dividers_ai +ffffffff82542650 T atomctrl_get_engine_pll_dividers_kong +ffffffff825426d0 T atomctrl_get_engine_pll_dividers_vi +ffffffff825427a0 T atomctrl_get_engine_pll_dividers_ai +ffffffff82542890 T atomctrl_get_dfs_pll_dividers_vi +ffffffff82542960 T atomctrl_get_reference_clock +ffffffff825429d0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff82542a90 T atomctrl_get_voltage_table_v3 +ffffffff82542bf0 T atomctrl_get_pp_assign_pin +ffffffff82542cf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff82543200 t GetScaledFraction +ffffffff82543290 t fDecodeLeakageID +ffffffff825432f0 t fSqrt +ffffffff82543370 T atomctrl_get_voltage_evv_on_sclk +ffffffff825433f0 T atomctrl_get_voltage_evv +ffffffff825434b0 T atomctrl_get_mpll_reference_clock +ffffffff82543530 T atomctrl_is_asic_internal_ss_supported +ffffffff82543590 T atomctrl_get_memory_clock_spread_spectrum +ffffffff825436a0 T atomctrl_get_engine_clock_spread_spectrum +ffffffff825437b0 T atomctrl_read_efuse +ffffffff82543860 T atomctrl_set_ac_timing_ai +ffffffff825438d0 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff82543950 T atomctrl_get_smc_sclk_range_table +ffffffff82543a10 T atomctrl_get_vddc_shared_railinfo +ffffffff82543a90 T atomctrl_get_avfs_information +ffffffff82543c20 T atomctrl_get_svi2_info +ffffffff82543d00 T atomctrl_get_leakage_id_from_efuse +ffffffff82543d70 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff82543f10 T atomctrl_get_voltage_range +ffffffff82543fe0 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff82544070 T atomctrl_get_edc_leakage_table +ffffffff82545000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff825450e0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff825452c0 T pp_atomfwctrl_get_pp_assign_pin +ffffffff825453c0 T pp_atomfwctrl_enter_self_refresh +ffffffff825453f0 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff825454a0 T pp_atomfwctrl_get_avfs_information +ffffffff825457e0 T pp_atomfwctrl_get_gpio_information +ffffffff82545890 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff82545920 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff82545d10 T pp_atomfwctrl_get_smc_dpm_information +ffffffff82546000 T encode_pcie_lane_width +ffffffff82546030 T decode_pcie_lane_width +ffffffff82547000 t pp_tables_v1_0_initialize +ffffffff82548590 t pp_tables_v1_0_uninitialize +ffffffff825487b0 T get_number_of_powerplay_table_entries_v1_0 +ffffffff82548870 T get_powerplay_table_entry_v1_0 +ffffffff82549000 T pp_tables_get_response_times +ffffffff825490f0 T pp_tables_get_num_of_entries +ffffffff825491c0 T pp_tables_get_entry +ffffffff82549520 t init_non_clock_fields +ffffffff82549660 t pp_tables_initialize +ffffffff8254a910 t pp_tables_uninitialize +ffffffff8254aba0 t get_number_of_vce_state_table_entries +ffffffff8254ac90 t get_vce_state_table_entry +ffffffff8254b000 T smu10_init_function_pointers +ffffffff8254b040 t smu10_hwmgr_backend_init +ffffffff8254b770 t smu10_hwmgr_backend_fini +ffffffff8254b8f0 t smu10_setup_asic_task +ffffffff8254b960 t smu10_get_power_state_size +ffffffff8254b990 t smu10_apply_state_adjust_rules +ffffffff8254b9c0 t smu10_dpm_force_dpm_level +ffffffff8254c080 t smu10_enable_dpm_tasks +ffffffff8254c150 t smu10_disable_dpm_tasks +ffffffff8254c180 t smu10_dpm_patch_boot_state +ffffffff8254c1b0 t smu10_dpm_get_pp_table_entry +ffffffff8254c210 t smu10_dpm_get_num_of_pp_table_entries +ffffffff8254c270 t smu10_powergate_vcn +ffffffff8254c330 t smu10_dpm_get_mclk +ffffffff8254c390 t smu10_dpm_get_sclk +ffffffff8254c3e0 t smu10_set_power_state_tasks +ffffffff8254c460 t smu10_set_cpu_power_state +ffffffff8254c490 t smu10_store_cc6_data +ffffffff8254c500 t smu10_get_dal_power_level +ffffffff8254c530 t smu10_get_performance_level +ffffffff8254c5d0 t smu10_get_current_shallow_sleep_clocks +ffffffff8254c630 t smu10_get_clock_by_type_with_latency +ffffffff8254c780 t smu10_get_clock_by_type_with_voltage +ffffffff8254c890 t smu10_set_watermarks_for_clocks_ranges +ffffffff8254c970 t smu10_display_clock_voltage_request +ffffffff8254ca20 t smu10_get_max_high_clocks +ffffffff8254ca50 t smu10_power_off_asic +ffffffff8254caa0 t smu10_force_clock_level +ffffffff8254cc80 t smu10_print_clock_levels +ffffffff8254d100 t smu10_gfx_off_control +ffffffff8254d220 t smu10_read_sensor +ffffffff8254d3d0 t smu10_set_active_display_count +ffffffff8254d430 t smu10_set_min_deep_sleep_dcefclk +ffffffff8254d4a0 t smu10_get_power_profile_mode +ffffffff8254d4e0 t smu10_set_power_profile_mode +ffffffff8254d630 t smu10_set_fine_grain_clk_vol +ffffffff8254d8c0 t smu10_powergate_mmhub +ffffffff8254d8e0 t smu10_smus_notify_pwe +ffffffff8254d900 t smu10_powergate_sdma +ffffffff8254d920 t smu10_set_hard_min_dcefclk_by_freq +ffffffff8254d990 t smu10_set_hard_min_fclk_by_freq +ffffffff8254da00 t smu10_set_hard_min_gfxclk_by_freq +ffffffff8254da70 t smu10_set_soft_max_gfxclk_by_freq +ffffffff8254dae0 t smu10_asic_reset +ffffffff8254db00 t smu10_gfx_state_change +ffffffff8254db50 t smu10_dpm_get_pp_table_entry_callback +ffffffff8254e000 T smu7_baco_get_capability +ffffffff8254e070 T smu7_baco_get_state +ffffffff8254e0d0 T smu7_baco_set_state +ffffffff8254f000 T smu7_powerdown_uvd +ffffffff8254f060 T smu7_disable_clock_power_gating +ffffffff8254f100 T smu7_powergate_uvd +ffffffff8254f240 T smu7_powergate_vce +ffffffff8254f380 T smu7_update_clock_gatings +ffffffff8254f780 T smu7_powergate_gfx +ffffffff82550000 T smu7_get_sleep_divider_id_from_clock +ffffffff825500a0 T smu7_init_function_pointers +ffffffff82550100 t smu7_hwmgr_backend_init +ffffffff825520c0 t smu7_hwmgr_backend_fini +ffffffff82552150 t smu7_setup_asic_task +ffffffff82552590 t smu7_get_power_state_size +ffffffff825525c0 t smu7_apply_state_adjust_rules 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smu7_get_clock_by_type_with_latency +ffffffff82558750 t smu7_set_watermarks_for_clocks_ranges +ffffffff82558980 t smu7_get_max_high_clocks +ffffffff82558a00 t smu7_power_off_asic +ffffffff82558a60 t smu7_force_clock_level +ffffffff82558ba0 t smu7_print_clock_levels +ffffffff82559220 t smu7_get_sclk_od +ffffffff82559280 t smu7_set_sclk_od +ffffffff82559340 t smu7_get_mclk_od +ffffffff825593a0 t smu7_set_mclk_od +ffffffff82559460 t smu7_read_sensor +ffffffff825596e0 t smu7_avfs_control +ffffffff825597d0 t smu7_notify_cac_buffer_info +ffffffff825599c0 t smu7_get_thermal_temperature_range +ffffffff82559a60 t smu7_get_power_profile_mode +ffffffff82559aa0 t smu7_set_power_profile_mode +ffffffff82559d30 t smu7_odn_edit_dpm_table +ffffffff82559f10 t phm_add_voltage +ffffffff8255a030 t smu7_copy_and_switch_arb_sets +ffffffff8255a2f0 t smu7_check_dpm_table_updated +ffffffff8255a450 t smu7_odn_initial_default_setting +ffffffff8255a590 t smu7_set_dpm_event_sources +ffffffff8255a6e0 t smu7_get_pp_table_entry_callback_func_v0 +ffffffff8255abc0 t smu7_get_pp_table_entry_callback_func_v1 +ffffffff8255b610 t smu7_get_gpu_power +ffffffff8255c000 T smu7_enable_didt_config +ffffffff8255c450 t smu7_program_pt_config_registers +ffffffff8255c650 t smu7_enable_didt +ffffffff8255c880 T smu7_disable_didt_config +ffffffff8255c970 T smu7_enable_smc_cac +ffffffff8255ca10 T smu7_disable_smc_cac +ffffffff8255cab0 T smu7_set_power_limit +ffffffff8255cb10 T smu7_enable_power_containment +ffffffff8255ccc0 T smu7_disable_power_containment +ffffffff8255ce20 T smu7_power_control_set_level +ffffffff8255d000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff8255d080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff8255d160 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff8255d230 T smu7_fan_ctrl_set_static_mode +ffffffff8255d390 T smu7_fan_ctrl_set_default_mode +ffffffff8255d4a0 T smu7_fan_ctrl_start_smc_fan_control +ffffffff8255d5f0 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff8255d610 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff8255d840 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff8255da90 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff8255dcc0 T smu7_thermal_get_temperature +ffffffff8255dd20 T smu7_thermal_disable_alert +ffffffff8255dde0 T smu7_thermal_stop_thermal_controller +ffffffff8255dfa0 T smu7_start_thermal_controller +ffffffff8255e3f0 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff8255f000 T smu8_init_function_pointers +ffffffff8255f040 t smu8_hwmgr_backend_init +ffffffff8255f550 t smu8_hwmgr_backend_fini +ffffffff8255f5e0 t smu8_setup_asic_task +ffffffff8255fbc0 t smu8_get_power_state_size +ffffffff8255fbf0 t smu8_apply_state_adjust_rules +ffffffff8255fd70 t smu8_dpm_force_dpm_level +ffffffff82560060 t smu8_enable_dpm_tasks +ffffffff82560210 t smu8_disable_dpm_tasks +ffffffff82560310 t smu8_dpm_patch_boot_state +ffffffff82560370 t smu8_dpm_get_pp_table_entry +ffffffff825603d0 t smu8_dpm_get_num_of_pp_table_entries +ffffffff82560430 t smu8_dpm_powerdown_uvd +ffffffff82560480 t smu8_dpm_powergate_vce +ffffffff82560690 t smu8_dpm_powergate_uvd +ffffffff825608e0 t smu8_dpm_powergate_acp +ffffffff82560940 t smu8_dpm_get_mclk +ffffffff82560970 t smu8_dpm_get_sclk +ffffffff825609e0 t smu8_set_power_state_tasks +ffffffff82560d10 t smu8_set_cpu_power_state +ffffffff82560d90 t smu8_store_cc6_data +ffffffff82560e10 t smu8_get_dal_power_level +ffffffff82560e90 t smu8_get_performance_level +ffffffff82560f90 t smu8_get_current_shallow_sleep_clocks +ffffffff82560ff0 t smu8_get_clock_by_type +ffffffff82561130 t smu8_get_max_high_clocks +ffffffff82561200 t smu8_power_off_asic +ffffffff82561290 t smu8_force_clock_level +ffffffff82561310 t smu8_print_clock_levels +ffffffff82561520 t smu8_read_sensor +ffffffff82561860 t smu8_notify_cac_buffer_info +ffffffff82561940 t smu8_get_thermal_temperature_range +ffffffff825619c0 t smu8_dpm_get_pp_table_entry_callback +ffffffff82562000 T smu9_baco_get_capability +ffffffff82562100 T smu9_baco_get_state +ffffffff82563000 T convert_to_vid +ffffffff82563050 T convert_to_vddc +ffffffff82563090 T phm_copy_clock_limits_array +ffffffff82563170 T phm_copy_overdrive_settings_limits_array +ffffffff82563250 T phm_set_field_to_u32 +ffffffff825632b0 T phm_wait_on_register +ffffffff825633c0 T phm_wait_on_indirect_register +ffffffff82563500 T phm_wait_for_register_unequal +ffffffff825635f0 T phm_wait_for_indirect_register_unequal +ffffffff82563710 T phm_cf_want_uvd_power_gating +ffffffff82563750 T phm_cf_want_vce_power_gating +ffffffff82563790 T phm_trim_voltage_table +ffffffff825638d0 T phm_get_svi2_mvdd_voltage_table +ffffffff82563a80 T phm_get_svi2_vddci_voltage_table +ffffffff82563c30 T phm_get_svi2_vdd_voltage_table +ffffffff82563ce0 T phm_trim_voltage_table_to_fit_state_table +ffffffff82563dd0 T phm_reset_single_dpm_table +ffffffff82563e30 T phm_setup_pcie_table_entry +ffffffff82563e70 T phm_get_dpm_level_enable_mask_value +ffffffff82563f50 T phm_get_voltage_index +ffffffff82563fd0 T phm_get_voltage_id +ffffffff82564050 T phm_find_closest_vddci +ffffffff825640c0 T phm_find_boot_level +ffffffff82564130 T phm_get_sclk_for_voltage_evv +ffffffff825641f0 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff82564310 T phm_get_lowest_enabled_level +ffffffff82564350 T phm_apply_dal_min_voltage_request +ffffffff82564420 T phm_get_voltage_evv_on_sclk +ffffffff825644e0 T phm_irq_process +ffffffff825646b0 T smu9_register_irq_handlers +ffffffff82564780 T smu_atom_get_data_table +ffffffff825647f0 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff82564900 T smu_set_watermarks_for_clocks_ranges +ffffffff82565000 T tonga_baco_set_state +ffffffff82566000 T vega10_baco_set_state +ffffffff82567000 T vega10_enable_disable_vce_dpm +ffffffff825670a0 T vega10_hwmgr_init +ffffffff82567100 t vega10_hwmgr_backend_init +ffffffff82567fd0 t vega10_hwmgr_backend_fini +ffffffff82568060 t vega10_setup_asic_task +ffffffff825681b0 t vega10_get_power_state_size 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+ffffffff8256d840 t vega10_get_clock_by_type_with_voltage +ffffffff8256d920 t vega10_set_watermarks_for_clocks_ranges +ffffffff8256d990 t vega10_display_clock_voltage_request +ffffffff8256da10 t vega10_power_off_asic +ffffffff8256da90 t vega10_force_clock_level +ffffffff8256dc00 t vega10_emit_clock_levels +ffffffff8256ddb0 t vega10_print_clock_levels +ffffffff8256e640 t vega10_get_sclk_od +ffffffff8256e6b0 t vega10_set_sclk_od +ffffffff8256e7b0 t vega10_get_mclk_od +ffffffff8256e820 t vega10_set_mclk_od +ffffffff8256e910 t vega10_read_sensor +ffffffff8256ebd0 t vega10_avfs_enable +ffffffff8256ecc0 t vega10_notify_cac_buffer_info +ffffffff8256eda0 t vega10_get_thermal_temperature_range +ffffffff8256eec0 t vega10_get_power_profile_mode +ffffffff8256ef00 t vega10_set_power_profile_mode +ffffffff8256f030 t vega10_odn_edit_dpm_table +ffffffff8256f5c0 t vega10_get_ppfeature_status +ffffffff8256f650 t vega10_set_ppfeature_status +ffffffff8256f710 t vega10_set_mp1_state +ffffffff8256f7a0 t vega10_disable_power_features_for_compute_performance +ffffffff8256f9a0 t vega10_upload_dpm_bootup_level +ffffffff8256fad0 t vega10_upload_dpm_max_level +ffffffff8256fbd0 t vega10_odn_initial_default_setting +ffffffff8256fdd0 t vega10_populate_all_graphic_levels +ffffffff82570010 t vega10_populate_all_memory_levels +ffffffff82570190 t vega10_populate_single_gfx_level +ffffffff825702f0 t vega10_populate_single_soc_level +ffffffff82570440 t vega10_populate_single_memory_level +ffffffff825705d0 t vega10_get_pp_table_entry_callback_func +ffffffff82570820 t vega10_odn_update_power_state +ffffffff82571000 T vega10_enable_didt_config +ffffffff82572df0 T vega10_disable_didt_config +ffffffff82573100 T vega10_initialize_power_tune_defaults +ffffffff82573240 T vega10_set_power_limit +ffffffff825732a0 T vega10_enable_power_containment +ffffffff825733e0 T vega10_disable_power_containment +ffffffff825734d0 T vega10_power_control_set_level +ffffffff82573540 t vega10_didt_set_mask +ffffffff82574000 t vega10_pp_tables_initialize +ffffffff825757a0 t vega10_pp_tables_uninitialize +ffffffff825759c0 T vega10_get_number_of_powerplay_table_entries +ffffffff82575a80 T vega10_get_powerplay_table_entry +ffffffff82575c20 T vega10_baco_set_cap +ffffffff82576000 T vega10_fan_ctrl_get_fan_speed_info +ffffffff82576080 T vega10_fan_ctrl_get_fan_speed_pwm +ffffffff825761d0 T vega10_fan_ctrl_get_fan_speed_rpm +ffffffff825762f0 T vega10_fan_ctrl_set_static_mode +ffffffff82576610 T vega10_fan_ctrl_set_default_mode +ffffffff82576880 T vega10_fan_ctrl_start_smc_fan_control +ffffffff82576960 T vega10_fan_ctrl_stop_smc_fan_control +ffffffff82576a40 T vega10_fan_ctrl_set_fan_speed_pwm +ffffffff82576cb0 T vega10_fan_ctrl_reset_fan_speed_to_default +ffffffff82576d90 T vega10_fan_ctrl_set_fan_speed_rpm +ffffffff82576fb0 T vega10_thermal_get_temperature +ffffffff82577050 T vega10_thermal_disable_alert +ffffffff82577170 T vega10_thermal_stop_thermal_controller +ffffffff825771d0 T vega10_enable_mgpu_fan_boost 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vega20_baco_apply_vdci_flush_workaround +ffffffff82581000 T vega20_hwmgr_init +ffffffff82581040 t vega20_hwmgr_backend_init +ffffffff82581990 t vega20_hwmgr_backend_fini +ffffffff825819f0 t vega20_setup_asic_task +ffffffff82581b00 t vega20_apply_clocks_adjust_rules +ffffffff82581fb0 t vega20_dpm_force_dpm_level +ffffffff825827f0 t vega20_enable_dpm_tasks +ffffffff82582cf0 t vega20_disable_dpm_tasks +ffffffff82582ea0 t vega20_power_gate_vce +ffffffff82583000 t vega20_power_gate_uvd +ffffffff825830b0 t vega20_dpm_get_mclk +ffffffff825831f0 t vega20_dpm_get_sclk +ffffffff82583320 t vega20_notify_smc_display_config_after_ps_adjustment +ffffffff82583490 t vega20_pre_display_configuration_changed_task +ffffffff82583620 t vega20_display_configuration_changed_task +ffffffff82583710 t vega20_set_fan_control_mode +ffffffff82583780 t vega20_get_fan_control_mode +ffffffff825837c0 t vega20_check_smc_update_required_for_display_configuration +ffffffff82583820 t vega20_get_dal_power_level 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T smu7_init +ffffffff825a3f50 T smu7_smu_fini +ffffffff825a5000 t smu8_smu_init +ffffffff825a52e0 t smu8_smu_fini +ffffffff825a5390 t smu8_start_smu +ffffffff825a6630 t smu8_check_fw_load_finish +ffffffff825a6740 t smu8_get_argument +ffffffff825a6790 t smu8_send_msg_to_smc +ffffffff825a67a0 t smu8_send_msg_to_smc_with_parameter +ffffffff825a6a00 t smu8_download_pptable_settings +ffffffff825a6b00 t smu8_upload_pptable_settings +ffffffff825a6c00 t smu8_is_dpm_running +ffffffff825a7000 T smu9_is_smc_ram_running +ffffffff825a7050 T smu9_send_msg_to_smc +ffffffff825a71c0 t smu9_wait_for_response +ffffffff825a72e0 t smu9_send_msg_to_smc_without_waiting +ffffffff825a7390 T smu9_send_msg_to_smc_with_parameter +ffffffff825a75e0 T smu9_get_argument +ffffffff825a8000 T smum_thermal_avfs_enable +ffffffff825a8050 T smum_thermal_setup_fan_table +ffffffff825a8090 T smum_update_sclk_threshold +ffffffff825a80d0 T smum_update_smc_table +ffffffff825a8110 T smum_get_offsetof +ffffffff825a8160 T smum_process_firmware_header +ffffffff825a81a0 T smum_get_mac_definition +ffffffff825a81f0 T smum_download_powerplay_table +ffffffff825a8230 T smum_upload_powerplay_table +ffffffff825a8270 T smum_send_msg_to_smc +ffffffff825a8350 T smum_send_msg_to_smc_with_parameter +ffffffff825a8440 T smum_init_smc_table +ffffffff825a8490 T smum_populate_all_graphic_levels +ffffffff825a84e0 T smum_populate_all_memory_levels +ffffffff825a8530 T smum_initialize_mc_reg_table +ffffffff825a8580 T smum_is_dpm_running +ffffffff825a85d0 T smum_is_hw_avfs_present +ffffffff825a8620 T smum_update_dpm_settings +ffffffff825a8670 T smum_smc_table_manager +ffffffff825a86c0 T smum_stop_smc +ffffffff825a9000 t tonga_smu_init +ffffffff825a90b0 t tonga_start_smu +ffffffff825a9550 t tonga_update_smc_table +ffffffff825a9710 t tonga_process_firmware_header +ffffffff825a9890 t tonga_update_sclk_threshold +ffffffff825a9bc0 t tonga_thermal_setup_fan_table +ffffffff825a9e60 t tonga_init_smc_table +ffffffff825aaf00 t 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t vegam_populate_bapm_parameters_in_dpm_table +ffffffff825b5d60 t vegam_populate_clock_stretcher_data_table +ffffffff825b5fb0 t vegam_populate_avfs_parameters +ffffffff825b6320 t vegam_populate_vr_config +ffffffff825b6460 t vegam_populate_pm_fuses +ffffffff825b66e0 t vegam_get_dependency_volt_by_clk +ffffffff825b68d0 t vegam_calculate_sclk_params +ffffffff825b7000 T smu_set_residency_gfxoff +ffffffff825b7050 T smu_get_residency_gfxoff +ffffffff825b70a0 T smu_get_entrycount_gfxoff +ffffffff825b70f0 T smu_get_status_gfxoff +ffffffff825b7150 T smu_set_soft_freq_range +ffffffff825b7190 T smu_get_dpm_freq_range +ffffffff825b71e0 T smu_set_gfx_power_up_by_imu +ffffffff825b7290 T is_support_sw_smu +ffffffff825b72e0 T is_support_cclk_dpm +ffffffff825b7350 T smu_allow_xgmi_power_down +ffffffff825b7420 T smu_write_watermarks_table +ffffffff825b7490 T smu_set_ac_dc +ffffffff825b75b0 t smu_early_init +ffffffff825b7900 t smu_late_init +ffffffff825b7d20 t smu_sw_init +ffffffff825b84a0 t smu_sw_fini +ffffffff825b8730 t smu_hw_init +ffffffff825b8bf0 t smu_hw_fini +ffffffff825b8d00 t smu_late_fini +ffffffff825b8d20 t smu_suspend +ffffffff825b8e10 t smu_resume +ffffffff825b90e0 t smu_set_clockgating_state +ffffffff825b9110 t smu_set_powergating_state +ffffffff825b9140 T smu_get_power_limit +ffffffff825b9290 T smu_mode1_reset_is_support +ffffffff825b92e0 T smu_mode2_reset_is_support +ffffffff825b9330 T smu_mode1_reset +ffffffff825b9380 T smu_handle_passthrough_sbr +ffffffff825b93d0 T smu_get_ecc_info +ffffffff825b9430 T smu_wait_for_event +ffffffff825b9480 T smu_stb_collect_info +ffffffff825b94e0 T amdgpu_smu_stb_debug_fs_init +ffffffff825b9510 T smu_send_hbm_bad_pages_num +ffffffff825b9560 T smu_send_hbm_bad_channel_flag +ffffffff825b95b0 t smu_set_fan_control_mode +ffffffff825b9670 t smu_get_fan_control_mode +ffffffff825b96f0 t smu_set_fan_speed_pwm +ffffffff825b97b0 t smu_get_fan_speed_pwm +ffffffff825b9810 t smu_force_ppclk_levels +ffffffff825b98e0 t smu_print_ppclk_levels +ffffffff825b9950 t smu_emit_ppclk_levels +ffffffff825b99c0 t smu_force_performance_level +ffffffff825b9c90 t smu_read_sensor +ffffffff825b9ef0 t smu_get_apu_thermal_limit +ffffffff825b9f40 t smu_set_apu_thermal_limit +ffffffff825b9f90 t smu_get_performance_level +ffffffff825ba000 t smu_get_current_power_state +ffffffff825ba060 t smu_get_fan_speed_rpm +ffffffff825ba0c0 t smu_set_fan_speed_rpm +ffffffff825ba180 t smu_get_power_num_states +ffffffff825ba200 t smu_sys_get_pp_table +ffffffff825ba270 t smu_sys_set_pp_table +ffffffff825ba4b0 t smu_switch_power_profile +ffffffff825ba5e0 t smu_handle_dpm_task +ffffffff825ba600 t smu_load_microcode +ffffffff825ba700 t smu_dpm_set_power_gate +ffffffff825baac0 t smu_set_power_limit +ffffffff825bac00 t smu_get_power_profile_mode +ffffffff825bac60 t smu_set_power_profile_mode +ffffffff825bacc0 t smu_od_edit_dpm_table +ffffffff825bad20 t smu_set_mp1_state +ffffffff825bad80 t smu_gfx_state_change_set +ffffffff825badc0 t smu_get_sclk +ffffffff825bae40 t smu_get_mclk +ffffffff825baec0 t smu_display_configuration_change +ffffffff825baf50 t smu_get_clock_by_type_with_latency +ffffffff825bb010 t smu_display_clock_voltage_request +ffffffff825bb070 t smu_enable_mgpu_fan_boost +ffffffff825bb0d0 t smu_set_display_count +ffffffff825bb140 t smu_set_deep_sleep_dcefclk +ffffffff825bb1b0 t smu_get_baco_capability +ffffffff825bb220 t smu_baco_set_state +ffffffff825bb320 t smu_sys_get_pp_feature_mask +ffffffff825bb3a0 t smu_sys_set_pp_feature_mask +ffffffff825bb410 t smu_mode2_reset +ffffffff825bb4d0 t smu_enable_gfx_features +ffffffff825bb590 t smu_set_df_cstate +ffffffff825bb660 t smu_set_xgmi_pstate +ffffffff825bb720 t smu_sys_get_gpu_metrics +ffffffff825bb780 t smu_set_watermarks_for_clock_ranges +ffffffff825bb800 t smu_display_disable_memory_clock_switch +ffffffff825bb860 t smu_get_max_sustainable_clocks_by_dc +ffffffff825bb8c0 t smu_get_uclk_dpm_states +ffffffff825bb920 t smu_get_dpm_clock_table +ffffffff825bb980 t smu_get_prv_buffer_details +ffffffff825bb9f0 t smu_set_user_clk_dependencies +ffffffff825bba70 t smu_handle_task +ffffffff825bbb40 t smu_adjust_power_state_dynamic +ffffffff825bbde0 t smu_apply_default_config_table_settings +ffffffff825bbea0 t smu_restore_dpm_user_profile +ffffffff825bc320 t smu_throttling_logging_work_fn +ffffffff825bc370 t smu_interrupt_work_fn +ffffffff825bc3c0 t smu_swctf_delayed_work_handler +ffffffff825bc4f0 t __delayed_work_tick +ffffffff825bc510 t smu_smc_hw_setup +ffffffff825bcd60 t smu_set_default_dpm_table +ffffffff825bcf40 t smu_get_thermal_temperature_range +ffffffff825bd030 t smu_smc_hw_cleanup +ffffffff825be000 T arcturus_set_ppt_funcs +ffffffff825be050 t arcturus_run_btc +ffffffff825be110 t arcturus_get_allowed_feature_mask +ffffffff825be170 t arcturus_set_default_dpm_table +ffffffff825be3d0 t arcturus_populate_umd_state_clk +ffffffff825be490 t arcturus_print_clk_levels +ffffffff825be740 t arcturus_force_clk_levels +ffffffff825be9f0 t arcturus_get_power_profile_mode +ffffffff825bed20 t arcturus_set_power_profile_mode +ffffffff825bf060 t arcturus_dpm_set_vcn_enable +ffffffff825bf150 t arcturus_read_sensor +ffffffff825bf380 t arcturus_is_dpm_running +ffffffff825bf3d0 t arcturus_get_fan_speed_pwm +ffffffff825bf530 t arcturus_get_fan_speed_rpm +ffffffff825bf650 t arcturus_get_thermal_temperature_range +ffffffff825bf740 t arcturus_set_performance_level +ffffffff825bf880 t arcturus_dump_pptable +ffffffff825bf8b0 t arcturus_get_power_limit +ffffffff825bf9d0 t arcturus_set_df_cstate +ffffffff825bfb10 t arcturus_allow_xgmi_power_down +ffffffff825bfc30 t arcturus_i2c_control_init +ffffffff825bfd80 t arcturus_i2c_control_fini +ffffffff825bfdc0 t arcturus_get_unique_id +ffffffff825bff00 t arcturus_init_smc_tables +ffffffff825c0090 t arcturus_setup_pptable +ffffffff825c01f0 t arcturus_set_fan_speed_pwm +ffffffff825c03d0 t arcturus_set_fan_speed_rpm +ffffffff825c0520 t arcturus_log_thermal_throttling_event +ffffffff825c0970 t arcturus_get_gpu_metrics +ffffffff825c0bc0 t arcturus_get_fan_parameters +ffffffff825c0c00 t arcturus_get_current_clk_freq_by_table +ffffffff825c0d70 t arcturus_get_smu_metrics_data +ffffffff825c0ff0 t arcturus_upload_dpm_level +ffffffff825c1110 t arcturus_i2c_xfer +ffffffff825c13d0 t arcturus_i2c_func +ffffffff825c1400 t arcturus_set_fan_static_mode +ffffffff825c2000 T cyan_skillfish_set_ppt_funcs +ffffffff825c2030 t cyan_skillfish_print_clk_levels +ffffffff825c2170 t cyan_skillfish_od_edit_dpm_table +ffffffff825c24b0 t cyan_skillfish_read_sensor +ffffffff825c26e0 t cyan_skillfish_is_dpm_running +ffffffff825c2790 t cyan_skillfish_init_smc_tables +ffffffff825c2880 t cyan_skillfish_get_enabled_mask +ffffffff825c28c0 t cyan_skillfish_get_dpm_ultimate_freq +ffffffff825c2990 t cyan_skillfish_get_gpu_metrics +ffffffff825c2c40 t cyan_skillfish_get_smu_metrics_data +ffffffff825c3000 T navi10_set_ppt_funcs +ffffffff825c3050 t navi10_run_btc +ffffffff825c30e0 t navi10_get_allowed_feature_mask +ffffffff825c33d0 t navi10_set_default_dpm_table +ffffffff825c38f0 t navi10_populate_umd_state_clk +ffffffff825c3ab0 t navi10_print_clk_levels +ffffffff825c3cb0 t navi10_emit_clk_levels +ffffffff825c3f30 t navi10_force_clk_levels +ffffffff825c40a0 t navi10_od_edit_dpm_table +ffffffff825c46e0 t navi10_get_clock_by_type_with_latency +ffffffff825c47f0 t navi10_get_power_profile_mode +ffffffff825c4ad0 t navi10_set_power_profile_mode +ffffffff825c4dd0 t navi10_dpm_set_vcn_enable +ffffffff825c4e70 t navi10_dpm_set_jpeg_enable +ffffffff825c4f00 t navi10_read_sensor +ffffffff825c50b0 t navi10_pre_display_config_changed +ffffffff825c5170 t navi10_display_config_changed +ffffffff825c5210 t navi10_notify_smc_display_config +ffffffff825c53e0 t navi10_is_dpm_running +ffffffff825c5430 t navi10_get_fan_speed_rpm +ffffffff825c54e0 t navi10_set_watermarks_table +ffffffff825c5690 t navi10_get_thermal_temperature_range +ffffffff825c5780 t navi10_get_uclk_dpm_states +ffffffff825c5890 t navi10_set_default_od_settings +ffffffff825c5b20 t navi10_display_disable_memory_clock_switch +ffffffff825c5bb0 t navi10_get_power_limit +ffffffff825c5ce0 t navi10_update_pcie_parameters +ffffffff825c5e60 t navi10_i2c_control_init +ffffffff825c5fb0 t navi10_i2c_control_fini +ffffffff825c5ff0 t navi10_init_smc_tables +ffffffff825c6260 t navi10_setup_pptable +ffffffff825c64d0 t navi10_baco_enter +ffffffff825c6520 t navi10_baco_exit +ffffffff825c6680 t navi1x_get_gpu_metrics +ffffffff825c70f0 t navi10_enable_mgpu_fan_boost +ffffffff825c7170 t navi10_get_fan_parameters +ffffffff825c71b0 t navi10_post_smu_init +ffffffff825c74b0 t navi10_get_default_config_table_settings +ffffffff825c7500 t navi10_set_config_table +ffffffff825c75c0 t navi1x_get_smu_metrics_data +ffffffff825c7c90 t navi10_od_setting_check_range +ffffffff825c7d50 t navi10_i2c_xfer +ffffffff825c8010 t navi10_i2c_func +ffffffff825c8040 t navi10_umc_hybrid_cdr_workaround +ffffffff825c9000 T sienna_cichlid_set_ppt_funcs +ffffffff825c9050 t sienna_cichlid_run_btc +ffffffff825c90e0 t sienna_cichlid_get_allowed_feature_mask +ffffffff825c9380 t sienna_cichlid_set_default_dpm_table +ffffffff825c9a10 t sienna_cichlid_populate_umd_state_clk +ffffffff825c9ad0 t sienna_cichlid_print_clk_levels +ffffffff825c9cf0 t sienna_cichlid_force_clk_levels +ffffffff825c9e60 t sienna_cichlid_od_edit_dpm_table +ffffffff825ca460 t sienna_cichlid_restore_user_od_settings +ffffffff825ca4f0 t sienna_cichlid_get_power_profile_mode +ffffffff825ca7d0 t sienna_cichlid_set_power_profile_mode +ffffffff825caad0 t sienna_cichlid_dpm_set_vcn_enable +ffffffff825caba0 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff825cac30 t sienna_cichlid_read_sensor +ffffffff825cb4f0 t sienna_cichlid_pre_display_config_changed +ffffffff825cb520 t sienna_cichlid_display_config_changed +ffffffff825cb580 t sienna_cichlid_notify_smc_display_config +ffffffff825cb750 t sienna_cichlid_is_dpm_running +ffffffff825cb7b0 t sienna_cichlid_get_fan_speed_rpm +ffffffff825cb8d0 t sienna_cichlid_set_watermarks_table +ffffffff825cba70 t sienna_cichlid_get_thermal_temperature_range +ffffffff825cbb50 t sienna_cichlid_get_uclk_dpm_states +ffffffff825cbc60 t sienna_cichlid_set_default_od_settings +ffffffff825cbe30 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff825cbec0 t sienna_cichlid_dump_pptable +ffffffff825cbef0 t sienna_cichlid_get_power_limit +ffffffff825cbfc0 t sienna_cichlid_update_pcie_parameters +ffffffff825cc0f0 t sienna_cichlid_i2c_control_init +ffffffff825cc240 t sienna_cichlid_i2c_control_fini +ffffffff825cc280 t sienna_cichlid_get_unique_id +ffffffff825cc400 t sienna_cichlid_init_smc_tables +ffffffff825cc770 t sienna_cichlid_set_mp1_state +ffffffff825cc7b0 t sienna_cichlid_setup_pptable +ffffffff825ccc40 t sienna_cichlid_system_features_control +ffffffff825ccce0 t sienna_cichlid_baco_enter +ffffffff825ccd30 t sienna_cichlid_baco_exit +ffffffff825cce90 t sienna_cichlid_is_mode1_reset_supported +ffffffff825ccf20 t sienna_cichlid_is_mode2_reset_supported +ffffffff825ccf50 t sienna_cichlid_mode2_reset +ffffffff825cd0f0 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff825cd110 t sienna_cichlid_get_gpu_metrics +ffffffff825cd6e0 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff825cd730 t sienna_cichlid_get_fan_parameters +ffffffff825cd770 t sienna_cichlid_gpo_control +ffffffff825cd840 t sienna_cichlid_get_ecc_info +ffffffff825cd940 t sienna_cichlid_stb_get_data_direct +ffffffff825cda00 t sienna_cichlid_get_default_config_table_settings +ffffffff825cda70 t sienna_cichlid_set_config_table +ffffffff825cdb40 t sienna_cichlid_get_throttler_status_locked +ffffffff825cdca0 t sienna_cichlid_get_smartshift_power_percentage +ffffffff825cddd0 t sienna_cichlid_i2c_xfer +ffffffff825ce090 t sienna_cichlid_i2c_func +ffffffff825cf000 T smu_v11_0_init_microcode +ffffffff825cf170 T smu_v11_0_fini_microcode +ffffffff825cf1d0 T smu_v11_0_load_microcode +ffffffff825cf330 T smu_v11_0_check_fw_status +ffffffff825cf390 T smu_v11_0_check_fw_version +ffffffff825cf530 T smu_v11_0_setup_pptable +ffffffff825cf650 T smu_v11_0_init_smc_tables +ffffffff825cf7e0 T smu_v11_0_fini_smc_tables +ffffffff825cfaa0 T smu_v11_0_init_power +ffffffff825cfb40 T smu_v11_0_fini_power +ffffffff825cfbb0 T smu_v11_0_get_vbios_bootup_values +ffffffff825cff60 T smu_v11_0_notify_memory_pool_location +ffffffff825d0080 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff825d0110 T smu_v11_0_set_driver_table_location +ffffffff825d0190 T smu_v11_0_set_tool_table_location +ffffffff825d0210 T smu_v11_0_init_display_count +ffffffff825d0270 T smu_v11_0_set_allowed_mask +ffffffff825d0350 T smu_v11_0_system_features_control +ffffffff825d0370 T smu_v11_0_notify_display_change +ffffffff825d03e0 T smu_v11_0_init_max_sustainable_clocks +ffffffff825d06b0 t smu_v11_0_get_max_sustainable_clock +ffffffff825d0820 T smu_v11_0_get_current_power_limit +ffffffff825d0920 T smu_v11_0_set_power_limit +ffffffff825d0a90 T smu_v11_0_interrupt_work +ffffffff825d0b20 T smu_v11_0_enable_thermal_alert +ffffffff825d0bd0 T smu_v11_0_disable_thermal_alert +ffffffff825d0bf0 T smu_v11_0_get_gfx_vdd +ffffffff825d0cb0 T smu_v11_0_display_clock_voltage_request +ffffffff825d0e20 T smu_v11_0_set_hard_freq_limited_range +ffffffff825d0f20 T smu_v11_0_gfx_off_control +ffffffff825d0fa0 T smu_v11_0_get_fan_control_mode +ffffffff825d1000 T smu_v11_0_set_fan_speed_pwm +ffffffff825d11e0 t smu_v11_0_set_fan_static_mode +ffffffff825d13e0 T smu_v11_0_set_fan_speed_rpm +ffffffff825d1530 T smu_v11_0_get_fan_speed_pwm +ffffffff825d1690 T smu_v11_0_get_fan_speed_rpm +ffffffff825d17a0 T smu_v11_0_set_fan_control_mode +ffffffff825d1990 T smu_v11_0_set_xgmi_pstate +ffffffff825d19b0 T smu_v11_0_register_irq_handler +ffffffff825d1a80 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff825d1b10 T smu_v11_0_set_azalia_d3_pme +ffffffff825d1b30 T smu_v11_0_baco_set_armd3_sequence +ffffffff825d1b50 T smu_v11_0_baco_is_support +ffffffff825d1bf0 T smu_v11_0_baco_get_state +ffffffff825d1c20 T smu_v11_0_baco_set_state +ffffffff825d1f40 T smu_v11_0_baco_enter +ffffffff825d2090 T smu_v11_0_baco_exit +ffffffff825d2210 T smu_v11_0_mode1_reset +ffffffff825d2290 T smu_v11_0_handle_passthrough_sbr +ffffffff825d22b0 T smu_v11_0_get_dpm_ultimate_freq +ffffffff825d2410 T smu_v11_0_set_soft_freq_limited_range +ffffffff825d2500 T smu_v11_0_set_performance_level +ffffffff825d28f0 T smu_v11_0_set_power_source +ffffffff825d2960 T smu_v11_0_get_dpm_freq_by_index +ffffffff825d2a20 T smu_v11_0_get_dpm_level_count +ffffffff825d2ad0 T smu_v11_0_set_single_dpm_table +ffffffff825d2db0 T smu_v11_0_get_dpm_level_range +ffffffff825d2f70 T smu_v11_0_get_current_pcie_link_width_level +ffffffff825d2fd0 T smu_v11_0_get_current_pcie_link_width +ffffffff825d3040 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff825d30a0 T smu_v11_0_get_current_pcie_link_speed +ffffffff825d3100 T smu_v11_0_gfx_ulv_control +ffffffff825d3180 T smu_v11_0_deep_sleep_control +ffffffff825d3390 T smu_v11_0_restore_user_od_settings +ffffffff825d3420 T smu_v11_0_set_smu_mailbox_registers +ffffffff825d3490 t smu_v11_0_set_irq_state +ffffffff825d3ae0 t smu_v11_0_irq_process +ffffffff825d4000 T vangogh_set_ppt_funcs +ffffffff825d4040 t vangogh_set_default_dpm_tables +ffffffff825d4070 t vangogh_common_print_clk_levels +ffffffff825d4530 t vangogh_force_clk_levels +ffffffff825d47b0 t vangogh_od_edit_dpm_table +ffffffff825d4d70 t vangogh_get_power_profile_mode +ffffffff825d4ed0 t vangogh_set_power_profile_mode +ffffffff825d5020 t vangogh_dpm_set_vcn_enable +ffffffff825d5080 t vangogh_dpm_set_jpeg_enable +ffffffff825d50e0 t vangogh_read_sensor +ffffffff825d57f0 t vangogh_get_apu_thermal_limit +ffffffff825d5810 t vangogh_set_apu_thermal_limit +ffffffff825d5830 t vangogh_is_dpm_running +ffffffff825d58a0 t vangogh_set_watermarks_table +ffffffff825d5a30 t vangogh_set_performance_level +ffffffff825d6400 t vangogh_get_power_limit +ffffffff825d6580 t vangogh_get_ppt_limit +ffffffff825d65f0 t vangogh_get_dpm_clock_table +ffffffff825d6760 t vangogh_init_smc_tables +ffffffff825d69d0 t vangogh_system_features_control +ffffffff825d6a20 t vangogh_set_power_limit +ffffffff825d6bb0 t vangogh_get_gfxoff_status +ffffffff825d6c40 t vangogh_get_gfxoff_entrycount +ffffffff825d6cc0 t vangogh_set_gfxoff_residency +ffffffff825d6d40 t vangogh_get_gfxoff_residency +ffffffff825d6d80 t vangogh_mode2_reset +ffffffff825d6f40 t vangogh_common_get_gpu_metrics +ffffffff825d7760 t vangogh_post_smu_init +ffffffff825d7920 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff825d7990 t vangogh_force_dpm_limit_value +ffffffff825d7b10 t vangogh_get_dpm_ultimate_freq +ffffffff825d7e40 t vangogh_set_soft_freq_limited_range +ffffffff825d8000 t vangogh_get_gpu_metrics_v2_3 +ffffffff825d9000 T renoir_set_ppt_funcs +ffffffff825d90a0 t renoir_get_current_power_state +ffffffff825d9120 t renoir_print_clk_levels +ffffffff825d9570 t renoir_force_clk_levels +ffffffff825d97d0 t renoir_od_edit_dpm_table +ffffffff825d9b10 t renoir_get_power_profile_mode +ffffffff825d9c20 t renoir_set_power_profile_mode +ffffffff825d9d70 t renoir_dpm_set_vcn_enable +ffffffff825d9e10 t renoir_dpm_set_jpeg_enable +ffffffff825d9ea0 t renoir_read_sensor +ffffffff825da2b0 t renoir_is_dpm_running +ffffffff825da2f0 t renoir_set_watermarks_table +ffffffff825da4b0 t renoir_set_performance_level +ffffffff825daaf0 t renoir_get_dpm_clock_table +ffffffff825dae40 t renoir_init_smc_tables +ffffffff825dafe0 t renoir_get_enabled_mask +ffffffff825db020 t renoir_get_dpm_ultimate_freq +ffffffff825db2f0 t renoir_get_gpu_metrics +ffffffff825db530 t renoir_gfx_state_change_set +ffffffff825db560 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff825db610 t renoir_force_dpm_limit_value +ffffffff825dc000 T smu_v12_0_check_fw_status +ffffffff825dc060 T smu_v12_0_check_fw_version +ffffffff825dc0e0 T smu_v12_0_powergate_sdma +ffffffff825dc130 T smu_v12_0_set_gfx_cgpg +ffffffff825dc190 T smu_v12_0_get_gfxoff_status +ffffffff825dc220 T smu_v12_0_gfx_off_control +ffffffff825dc350 T smu_v12_0_fini_smc_tables +ffffffff825dc420 T smu_v12_0_set_default_dpm_tables +ffffffff825dc450 T smu_v12_0_mode2_reset +ffffffff825dc470 T smu_v12_0_set_soft_freq_limited_range +ffffffff825dc5f0 T smu_v12_0_set_driver_table_location +ffffffff825dc670 T smu_v12_0_get_vbios_bootup_values +ffffffff825dd000 T aldebaran_set_ppt_funcs +ffffffff825dd050 t aldebaran_get_allowed_feature_mask +ffffffff825dd0b0 t aldebaran_set_default_dpm_table +ffffffff825dd2f0 t aldebaran_populate_umd_state_clk +ffffffff825dd3f0 t aldebaran_print_clk_levels +ffffffff825dd5f0 t aldebaran_force_clk_levels +ffffffff825dd800 t aldebaran_usr_edit_dpm_table +ffffffff825dda40 t aldebaran_read_sensor +ffffffff825ddcc0 t aldebaran_is_dpm_running +ffffffff825ddd20 t aldebaran_get_thermal_temperature_range +ffffffff825dddf0 t aldebaran_set_performance_level +ffffffff825ddea0 t aldebaran_get_power_limit +ffffffff825de060 t aldebaran_set_df_cstate +ffffffff825de0f0 t aldebaran_allow_xgmi_power_down +ffffffff825de1a0 t aldebaran_i2c_control_init +ffffffff825de270 t aldebaran_i2c_control_fini +ffffffff825de2b0 t aldebaran_get_unique_id +ffffffff825de3a0 t aldebaran_init_smc_tables +ffffffff825de590 t aldebaran_set_mp1_state +ffffffff825de5d0 t aldebaran_setup_pptable +ffffffff825de6c0 t aldebaran_system_features_control +ffffffff825de850 t aldebaran_set_power_limit +ffffffff825de8e0 t aldebaran_is_baco_supported +ffffffff825de910 t aldebaran_is_mode1_reset_supported +ffffffff825de940 t aldebaran_is_mode2_reset_supported +ffffffff825de970 t aldebaran_mode1_reset +ffffffff825dea70 t aldebaran_mode2_reset +ffffffff825deeb0 t aldebaran_set_soft_freq_limited_range +ffffffff825df0f0 t aldebaran_log_thermal_throttling_event +ffffffff825df450 t aldebaran_get_gpu_metrics +ffffffff825df720 t aldebaran_smu_handle_passthrough_sbr +ffffffff825df740 t aldebaran_smu_send_hbm_bad_page_num +ffffffff825df7d0 t aldebaran_get_ecc_info +ffffffff825df940 t aldebaran_send_hbm_bad_channel_flag +ffffffff825dfa30 t aldebaran_get_current_clk_freq_by_table +ffffffff825dfba0 t aldebaran_get_smu_metrics_data +ffffffff825dfe20 t aldebaran_upload_dpm_level +ffffffff825dff40 t aldebaran_i2c_xfer +ffffffff825e0200 t aldebaran_i2c_func +ffffffff825e1000 T smu_v13_0_init_microcode +ffffffff825e1150 T smu_v13_0_fini_microcode +ffffffff825e11b0 T smu_v13_0_load_microcode +ffffffff825e11e0 T smu_v13_0_init_pptable_microcode +ffffffff825e1390 T smu_v13_0_get_pptable_from_firmware +ffffffff825e14c0 T smu_v13_0_check_fw_status +ffffffff825e1540 T smu_v13_0_check_fw_version +ffffffff825e15d0 T smu_v13_0_setup_pptable +ffffffff825e1770 T smu_v13_0_init_smc_tables +ffffffff825e1940 T smu_v13_0_fini_smc_tables +ffffffff825e1be0 T smu_v13_0_init_power +ffffffff825e1c70 T smu_v13_0_fini_power +ffffffff825e1d00 T smu_v13_0_get_vbios_bootup_values +ffffffff825e1fd0 T smu_v13_0_notify_memory_pool_location +ffffffff825e20a0 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff825e2130 T smu_v13_0_set_driver_table_location +ffffffff825e21b0 T smu_v13_0_set_tool_table_location +ffffffff825e2230 T smu_v13_0_init_display_count +ffffffff825e2270 T smu_v13_0_set_allowed_mask +ffffffff825e2350 T smu_v13_0_gfx_off_control +ffffffff825e23d0 T smu_v13_0_system_features_control +ffffffff825e23f0 T smu_v13_0_notify_display_change +ffffffff825e2460 T smu_v13_0_init_max_sustainable_clocks +ffffffff825e2730 t smu_v13_0_get_max_sustainable_clock +ffffffff825e28a0 T smu_v13_0_get_current_power_limit +ffffffff825e29a0 T smu_v13_0_set_power_limit +ffffffff825e2ae0 T smu_v13_0_enable_thermal_alert +ffffffff825e2b80 T smu_v13_0_disable_thermal_alert +ffffffff825e2bc0 T smu_v13_0_get_gfx_vdd +ffffffff825e2c80 T smu_v13_0_display_clock_voltage_request +ffffffff825e2df0 T smu_v13_0_set_hard_freq_limited_range +ffffffff825e2ef0 T smu_v13_0_get_fan_control_mode +ffffffff825e2f40 T smu_v13_0_set_fan_speed_pwm +ffffffff825e31b0 t smu_v13_0_set_fan_static_mode +ffffffff825e33b0 T smu_v13_0_set_fan_control_mode +ffffffff825e3550 T smu_v13_0_set_fan_speed_rpm +ffffffff825e3740 T smu_v13_0_set_xgmi_pstate +ffffffff825e3760 T smu_v13_0_register_irq_handler +ffffffff825e3840 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff825e38d0 T smu_v13_0_set_azalia_d3_pme +ffffffff825e38f0 T smu_v13_0_wait_for_event +ffffffff825e3940 T smu_v13_0_get_dpm_ultimate_freq +ffffffff825e3ab0 T smu_v13_0_set_soft_freq_limited_range +ffffffff825e3ba0 T smu_v13_0_set_performance_level +ffffffff825e4400 T smu_v13_0_set_power_source +ffffffff825e4470 T smu_v13_0_get_dpm_freq_by_index +ffffffff825e4530 T smu_v13_0_set_single_dpm_table +ffffffff825e48b0 T smu_v13_0_get_current_pcie_link_width_level +ffffffff825e4910 T smu_v13_0_get_current_pcie_link_width +ffffffff825e4980 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff825e49e0 T smu_v13_0_get_current_pcie_link_speed +ffffffff825e4a50 T smu_v13_0_set_vcn_enable +ffffffff825e4b10 T smu_v13_0_set_jpeg_enable +ffffffff825e4b30 T smu_v13_0_run_btc +ffffffff825e4bc0 T smu_v13_0_gpo_control +ffffffff825e4c60 T smu_v13_0_deep_sleep_control +ffffffff825e4f60 T smu_v13_0_gfx_ulv_control +ffffffff825e4fe0 T smu_v13_0_baco_set_armd3_sequence +ffffffff825e5050 T smu_v13_0_baco_is_support +ffffffff825e50f0 T smu_v13_0_baco_get_state +ffffffff825e5120 T smu_v13_0_baco_set_state +ffffffff825e5220 T smu_v13_0_baco_enter +ffffffff825e53b0 T smu_v13_0_baco_exit +ffffffff825e5460 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff825e54a0 T smu_v13_0_od_edit_dpm_table +ffffffff825e57b0 T smu_v13_0_set_default_dpm_tables +ffffffff825e57e0 T smu_v13_0_set_smu_mailbox_registers +ffffffff825e5850 T smu_v13_0_mode1_reset +ffffffff825e58d0 T smu_v13_0_update_pcie_parameters +ffffffff825e5b50 t smu_v13_0_set_irq_state +ffffffff825e61a0 t smu_v13_0_irq_process +ffffffff825e7000 T smu_v13_0_0_set_ppt_funcs +ffffffff825e70f0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff825e7240 t smu_v13_0_0_set_default_dpm_table +ffffffff825e76c0 t smu_v13_0_0_populate_umd_state_clk +ffffffff825e7800 t smu_v13_0_0_print_clk_levels +ffffffff825e7950 t smu_v13_0_0_force_clk_levels +ffffffff825e7ae0 t smu_v13_0_0_od_edit_dpm_table +ffffffff825e8020 t smu_v13_0_0_restore_user_od_settings +ffffffff825e8100 t smu_v13_0_0_get_power_profile_mode +ffffffff825e8220 t smu_v13_0_0_set_power_profile_mode +ffffffff825e84b0 t smu_v13_0_0_read_sensor +ffffffff825e8730 t smu_v13_0_0_is_dpm_running +ffffffff825e8780 t smu_v13_0_0_get_fan_speed_pwm +ffffffff825e8870 t smu_v13_0_0_get_fan_speed_rpm +ffffffff825e88e0 t smu_v13_0_0_get_thermal_temperature_range +ffffffff825e89e0 t smu_v13_0_0_set_default_od_settings +ffffffff825e8b40 t smu_v13_0_0_dump_pptable +ffffffff825e8b70 t smu_v13_0_0_get_power_limit +ffffffff825e8c60 t smu_v13_0_0_set_df_cstate +ffffffff825e8c80 t smu_v13_0_0_i2c_control_init +ffffffff825e8dd0 t smu_v13_0_0_i2c_control_fini +ffffffff825e8e10 t smu_v13_0_0_get_unique_id +ffffffff825e8ec0 t smu_v13_0_0_init_smc_tables +ffffffff825e9130 t smu_v13_0_0_set_mp1_state +ffffffff825e9170 t smu_v13_0_0_setup_pptable +ffffffff825e92f0 t smu_v13_0_0_system_features_control +ffffffff825e9300 t smu_v13_0_0_baco_enter +ffffffff825e9370 t smu_v13_0_0_baco_exit +ffffffff825e93e0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff825e9440 t smu_v13_0_0_mode1_reset +ffffffff825e95a0 t smu_v13_0_0_mode2_reset +ffffffff825e95f0 t smu_v13_0_0_enable_gfx_features +ffffffff825e9650 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff825e9780 t smu_v13_0_0_get_gpu_metrics +ffffffff825e9be0 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff825e9c30 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff825e9cc0 t smu_v13_0_0_get_ecc_info +ffffffff825e9de0 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff825e9e70 t smu_v13_0_0_i2c_xfer +ffffffff825ea130 t smu_v13_0_0_i2c_func +ffffffff825eb000 T smu_v13_0_4_set_ppt_funcs +ffffffff825eb0c0 t smu_v13_0_4_print_clk_levels +ffffffff825eb140 t smu_v13_0_4_force_clk_levels +ffffffff825eb420 t smu_v13_0_4_read_sensor +ffffffff825eb760 t smu_v13_0_4_is_dpm_running +ffffffff825eb7c0 t smu_v13_0_4_set_watermarks_table +ffffffff825eb950 t smu_v13_0_4_set_performance_level +ffffffff825ec660 t smu_v13_0_4_init_smc_tables +ffffffff825ec800 t smu_v13_0_4_fini_smc_tables +ffffffff825ec8d0 t smu_v13_0_4_system_features_control +ffffffff825ec960 t smu_v13_0_4_mode2_reset +ffffffff825ec980 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff825ecdb0 t smu_v13_0_4_get_gpu_metrics +ffffffff825ecf90 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff825ecff0 t smu_v13_0_4_get_current_clk_freq +ffffffff825ee000 T smu_v13_0_5_set_ppt_funcs +ffffffff825ee0a0 t smu_v13_0_5_set_default_dpm_tables +ffffffff825ee0d0 t smu_v13_0_5_print_clk_levels +ffffffff825ee170 t smu_v13_0_5_force_clk_levels +ffffffff825ee300 t smu_v13_0_5_od_edit_dpm_table +ffffffff825ee610 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff825ee630 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff825ee650 t smu_v13_0_5_read_sensor +ffffffff825ee8d0 t smu_v13_0_5_is_dpm_running +ffffffff825ee930 t smu_v13_0_5_set_watermarks_table +ffffffff825eeac0 t smu_v13_0_5_set_performance_level +ffffffff825ef140 t smu_v13_0_5_init_smc_tables +ffffffff825ef2e0 t smu_v13_0_5_fini_smc_tables +ffffffff825ef3b0 t smu_v13_0_5_system_features_control +ffffffff825ef400 t smu_v13_0_5_mode2_reset +ffffffff825ef490 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff825ef8d0 t smu_v13_0_5_get_gpu_metrics +ffffffff825efa30 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff825f0000 T smu_v13_0_6_set_ppt_funcs +ffffffff825f0050 t smu_v13_0_6_get_allowed_feature_mask +ffffffff825f00b0 t smu_v13_0_6_set_default_dpm_table +ffffffff825f0600 t smu_v13_0_6_populate_umd_state_clk +ffffffff825f0700 t smu_v13_0_6_print_clk_levels +ffffffff825f0ad0 t smu_v13_0_6_force_clk_levels +ffffffff825f0ce0 t smu_v13_0_6_usr_edit_dpm_table +ffffffff825f0f20 t smu_v13_0_6_read_sensor +ffffffff825f1530 t smu_v13_0_6_is_dpm_running +ffffffff825f15c0 t smu_v13_0_6_get_thermal_temperature_range +ffffffff825f1740 t smu_v13_0_6_set_performance_level +ffffffff825f1870 t smu_v13_0_6_get_power_limit +ffffffff825f1950 t smu_v13_0_6_set_df_cstate +ffffffff825f1970 t smu_v13_0_6_allow_xgmi_power_down +ffffffff825f1990 t smu_v13_0_6_i2c_control_init +ffffffff825f1ae0 t smu_v13_0_6_i2c_control_fini +ffffffff825f1b20 t smu_v13_0_6_get_unique_id +ffffffff825f1ba0 t smu_v13_0_6_init_smc_tables +ffffffff825f1d60 t smu_v13_0_6_check_fw_status +ffffffff825f1dc0 t smu_v13_0_6_setup_pptable +ffffffff825f1df0 t smu_v13_0_6_system_features_control +ffffffff825f1e90 t smu_v13_0_6_get_enabled_mask +ffffffff825f1f10 t smu_v13_0_6_set_power_limit +ffffffff825f1f30 t smu_v13_0_6_register_irq_handler +ffffffff825f1f90 t smu_v13_0_6_is_baco_supported +ffffffff825f1fc0 t smu_v13_0_6_is_mode1_reset_supported +ffffffff825f1ff0 t smu_v13_0_6_is_mode2_reset_supported +ffffffff825f2020 t smu_v13_0_6_mode1_reset +ffffffff825f20e0 t smu_v13_0_6_mode2_reset +ffffffff825f24a0 t smu_v13_0_6_get_dpm_ultimate_freq +ffffffff825f26e0 t smu_v13_0_6_set_soft_freq_limited_range +ffffffff825f2960 t smu_v13_0_6_log_thermal_throttling_event +ffffffff825f2ca0 t smu_v13_0_6_get_gpu_metrics +ffffffff825f3050 t smu_v13_0_6_smu_send_hbm_bad_page_num +ffffffff825f30e0 t smu_v13_0_6_get_smu_metrics_data +ffffffff825f33a0 t smu_v13_0_6_upload_dpm_level +ffffffff825f34d0 t smu_v13_0_6_i2c_xfer +ffffffff825f3800 t smu_v13_0_6_i2c_func +ffffffff825f3830 t smu_v13_0_6_set_irq_state +ffffffff825f3b10 t smu_v13_0_6_irq_process +ffffffff825f4000 T smu_v13_0_7_set_ppt_funcs +ffffffff825f4060 t smu_v13_0_7_get_allowed_feature_mask +ffffffff825f41e0 t smu_v13_0_7_set_default_dpm_table +ffffffff825f4660 t smu_v13_0_7_populate_umd_state_clk +ffffffff825f47a0 t smu_v13_0_7_print_clk_levels +ffffffff825f48f0 t smu_v13_0_7_force_clk_levels +ffffffff825f4a80 t smu_v13_0_7_od_edit_dpm_table +ffffffff825f4fc0 t smu_v13_0_7_restore_user_od_settings +ffffffff825f50a0 t smu_v13_0_7_get_power_profile_mode +ffffffff825f5200 t smu_v13_0_7_set_power_profile_mode +ffffffff825f5470 t smu_v13_0_7_read_sensor +ffffffff825f56e0 t smu_v13_0_7_is_dpm_running +ffffffff825f5730 t smu_v13_0_7_get_fan_speed_pwm +ffffffff825f5820 t smu_v13_0_7_get_fan_speed_rpm +ffffffff825f5890 t smu_v13_0_7_get_thermal_temperature_range +ffffffff825f5990 t smu_v13_0_7_set_default_od_settings +ffffffff825f5af0 t smu_v13_0_7_dump_pptable +ffffffff825f5b20 t smu_v13_0_7_get_power_limit +ffffffff825f5c10 t smu_v13_0_7_set_df_cstate +ffffffff825f5c30 t smu_v13_0_7_init_smc_tables +ffffffff825f5e50 t smu_v13_0_7_check_fw_status +ffffffff825f5eb0 t smu_v13_0_7_set_mp1_state +ffffffff825f5ef0 t smu_v13_0_7_setup_pptable +ffffffff825f6060 t smu_v13_0_7_baco_enter +ffffffff825f60d0 t smu_v13_0_7_baco_exit +ffffffff825f6140 t smu_v13_0_7_is_mode1_reset_supported +ffffffff825f6180 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff825f62b0 t smu_v13_0_7_get_gpu_metrics +ffffffff825f6720 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff825f7000 T yellow_carp_set_ppt_funcs +ffffffff825f7050 t yellow_carp_set_default_dpm_tables +ffffffff825f7080 t yellow_carp_print_clk_levels +ffffffff825f7100 t yellow_carp_force_clk_levels +ffffffff825f73e0 t yellow_carp_od_edit_dpm_table +ffffffff825f76f0 t yellow_carp_dpm_set_vcn_enable +ffffffff825f7710 t yellow_carp_dpm_set_jpeg_enable +ffffffff825f7730 t yellow_carp_read_sensor +ffffffff825f7b00 t yellow_carp_is_dpm_running +ffffffff825f7b60 t yellow_carp_set_watermarks_table +ffffffff825f7cf0 t yellow_carp_set_performance_level +ffffffff825f88f0 t yellow_carp_init_smc_tables +ffffffff825f8a90 t yellow_carp_fini_smc_tables +ffffffff825f8b60 t yellow_carp_system_features_control +ffffffff825f8bb0 t yellow_carp_get_gfxoff_status +ffffffff825f8c40 t yellow_carp_mode2_reset +ffffffff825f8cd0 t yellow_carp_get_dpm_ultimate_freq +ffffffff825f9120 t yellow_carp_get_gpu_metrics +ffffffff825f92f0 t yellow_carp_post_smu_init +ffffffff825f9380 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff825f93e0 t yellow_carp_get_current_clk_freq +ffffffff825f94f0 t yellow_carp_get_dpm_profile_freq +ffffffff825fa000 T smu_cmn_send_msg_without_waiting +ffffffff825fa1b0 T smu_cmn_wait_for_response +ffffffff825fa300 T smu_cmn_send_smc_msg_with_param +ffffffff825fa690 T smu_cmn_to_asic_specific_index +ffffffff825fa7c0 t __smu_cmn_reg_print_error +ffffffff825faa20 T smu_cmn_send_smc_msg +ffffffff825faa40 T smu_cmn_send_debug_smc_msg +ffffffff825faae0 T smu_cmn_send_debug_smc_msg_with_param +ffffffff825fab80 T smu_cmn_feature_is_supported +ffffffff825fac30 T smu_cmn_feature_is_enabled +ffffffff825fad30 T smu_cmn_clk_dpm_is_enabled +ffffffff825fae40 T smu_cmn_get_enabled_mask +ffffffff825faf40 T smu_cmn_get_indep_throttler_status +ffffffff825faff0 T smu_cmn_feature_update_enable_state +ffffffff825fb0b0 T smu_cmn_feature_set_enabled +ffffffff825fb190 T smu_cmn_get_pp_feature_mask +ffffffff825fb340 T smu_cmn_set_pp_feature_mask +ffffffff825fb470 T smu_cmn_disable_all_features_with_exception +ffffffff825fb530 T smu_cmn_get_smc_version +ffffffff825fb620 T smu_cmn_update_table +ffffffff825fb7b0 T smu_cmn_write_watermarks_table +ffffffff825fb890 T smu_cmn_write_pptable +ffffffff825fb970 T smu_cmn_get_metrics_table +ffffffff825fbae0 T smu_cmn_get_combo_pptable +ffffffff825fbbd0 T smu_cmn_init_soft_gpu_metrics +ffffffff825fbcd0 T smu_cmn_set_mp1_state +ffffffff825fbd80 T smu_cmn_is_audio_func_enabled +ffffffff825fc000 T pci_mcfg_init +ffffffff825fc050 T pci_lookup_segment +ffffffff825fc0b0 T pci_attach_hook +ffffffff825fc0e0 T pci_bus_maxdevs +ffffffff825fc110 T pci_make_tag +ffffffff825fc190 T pci_decompose_tag +ffffffff825fc1f0 T pci_conf_size +ffffffff825fc250 T pci_mcfg_map_bus +ffffffff825fc2e0 T pci_conf_read +ffffffff825fc450 T pci_conf_write +ffffffff825fc5a0 T pci_msix_table_map +ffffffff825fc6f0 T pci_msix_table_unmap +ffffffff825fc7a0 T msi_hwmask +ffffffff825fc880 T msi_hwunmask +ffffffff825fc960 T msi_addroute +ffffffff825fcaa0 T msi_delroute +ffffffff825fcb30 T msi_allocidtvec +ffffffff825fcca0 T pci_intr_enable_msivec +ffffffff825fcda0 T pci_intr_map_msi +ffffffff825fce60 T pci_intr_map_msivec +ffffffff825fcf20 T msix_hwmask +ffffffff825fd0c0 T msix_hwunmask +ffffffff825fd220 T msix_addroute +ffffffff825fd470 T msix_delroute +ffffffff825fd600 T pci_intr_map_msix +ffffffff825fd6e0 T pci_intr_map +ffffffff825fd940 T pci_intr_string +ffffffff825fda20 T pci_intr_establish +ffffffff825fda70 T pci_intr_establish_cpu +ffffffff825fdbf0 T pci_intr_disestablish +ffffffff825fdc10 T pci_init_extents +ffffffff825fde30 T pci_probe_device_hook +ffffffff825fde70 T pci_dev_postattach +ffffffff825fde80 T pci_min_powerstate +ffffffff825fde90 T pci_set_powerstate_md +ffffffff825fe000 T pciide_machdep_compat_intr_establish +ffffffff825fe070 T pciide_machdep_compat_intr_disestablish +ffffffff825ff000 T vga_post_init +ffffffff825ff390 t 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com_cardbus_match +ffffffff82609080 T com_cardbus_attach +ffffffff82609250 T com_cardbus_detach +ffffffff82609300 T com_cardbus_find_csdev +ffffffff82609480 T com_cardbus_gofigure +ffffffff82609980 T com_cardbus_enable +ffffffff82609a80 T com_cardbus_disable +ffffffff82609ad0 T com_cardbus_setup +ffffffff8260a000 T xl_cardbus_match +ffffffff8260a080 T xl_cardbus_attach +ffffffff8260a480 T xl_cardbus_detach +ffffffff8260a550 T xl_cardbus_lookup +ffffffff8260a600 T xl_cardbus_intr_ack +ffffffff8260b000 T dc_cardbus_match +ffffffff8260b030 T dc_cardbus_attach +ffffffff8260b450 T dc_cardbus_detach +ffffffff8260b500 T dc_cardbus_setup +ffffffff8260c000 T fxp_cardbus_match +ffffffff8260c030 T fxp_cardbus_attach +ffffffff8260c290 T fxp_cardbus_detach +ffffffff8260c340 T fxp_cardbus_setup +ffffffff8260d000 t rl_cardbus_match +ffffffff8260d030 t rl_cardbus_attach +ffffffff8260d220 t rl_cardbus_detach +ffffffff8260d2e0 T rl_cardbus_setup +ffffffff8260e000 T re_cardbus_probe +ffffffff8260e030 T re_cardbus_attach +ffffffff8260e280 T re_cardbus_detach +ffffffff8260e320 T re_cardbus_setup +ffffffff8260f000 T ath_cardbus_match +ffffffff8260f060 T ath_cardbus_attach +ffffffff8260f1c0 T ath_cardbus_detach +ffffffff8260f2a0 T ath_cardbus_enable +ffffffff8260f3a0 T ath_cardbus_disable +ffffffff8260f400 T ath_cardbus_power +ffffffff8260f440 T ath_cardbus_setup +ffffffff82610000 T athn_cardbus_match +ffffffff82610030 T athn_cardbus_attach +ffffffff826101a0 T athn_cardbus_detach +ffffffff82610250 T athn_cardbus_enable +ffffffff82610350 T athn_cardbus_disable +ffffffff826103b0 T athn_cardbus_power +ffffffff826103f0 T athn_cardbus_read +ffffffff82610420 T athn_cardbus_write +ffffffff82610450 T athn_cardbus_write_barrier +ffffffff82610480 T athn_cardbus_setup +ffffffff82611000 T atw_cardbus_match +ffffffff82611030 T atw_cardbus_attach +ffffffff82611260 T atw_cardbus_detach +ffffffff82611330 T atw_cardbus_enable +ffffffff82611430 T atw_cardbus_disable +ffffffff82611490 T atw_cardbus_power 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pgt_cardbus_match +ffffffff82615030 T pgt_cardbus_attach +ffffffff82615290 T pgt_cardbus_detach +ffffffff82615350 T pgt_cardbus_enable +ffffffff82615500 T pgt_cardbus_disable +ffffffff82615560 T pgt_cardbus_power +ffffffff826155c0 T pgt_cardbus_setup +ffffffff82616000 T ehci_cardbus_match +ffffffff82616040 T ehci_cardbus_attach +ffffffff82616360 T ehci_cardbus_detach +ffffffff82617000 T ohci_cardbus_match +ffffffff82617040 T ohci_cardbus_attach +ffffffff82617360 T ohci_cardbus_detach +ffffffff82618000 T uhci_cardbus_match +ffffffff82618040 T uhci_cardbus_attach +ffffffff826183d0 T uhci_cardbus_detach +ffffffff82619000 T malo_cardbus_match +ffffffff82619030 T malo_cardbus_attach +ffffffff826192f0 T malo_cardbus_detach +ffffffff826193e0 T malo_cardbus_enable +ffffffff826195b0 T malo_cardbus_disable +ffffffff82619610 T malo_cardbus_setup +ffffffff8261a000 T bwi_cardbus_match +ffffffff8261a030 T bwi_cardbus_attach +ffffffff8261a310 T bwi_cardbus_detach +ffffffff8261a3d0 T bwi_cardbus_enable +ffffffff8261a580 T bwi_cardbus_disable +ffffffff8261a5e0 T bwi_cardbus_setup +ffffffff8261a6a0 T bwi_cardbus_conf_read +ffffffff8261a6d0 T bwi_cardbus_conf_write +ffffffff8261b000 T rbus_pccbb_parent_mem +ffffffff8261b060 T rbus_pccbb_parent_io +ffffffff8261b0d0 T pccbb_attach_hook +ffffffff8261c000 T pcmcia_match +ffffffff8261c060 T pcmcia_attach +ffffffff8261c0f0 T pcmcia_activate +ffffffff8261c1c0 T pcmcia_ccr_read +ffffffff8261c220 T pcmcia_ccr_write +ffffffff8261c290 T pcmcia_card_attach +ffffffff8261c4c0 T pcmcia_print +ffffffff8261c790 T pcmcia_submatch +ffffffff8261c7e0 T pcmcia_card_detach +ffffffff8261c8a0 T pcmcia_card_deactivate +ffffffff8261c910 T pcmcia_card_gettype +ffffffff8261c970 T pcmcia_function_init +ffffffff8261c9d0 T pcmcia_function_enable +ffffffff8261ce50 T pcmcia_function_disable +ffffffff8261cf80 T pcmcia_io_map +ffffffff8261d1f0 T pcmcia_intr_establish +ffffffff8261d4b0 T pcmcia_card_intr +ffffffff8261d5f0 T pcmcia_intr_disestablish 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com_pcmcia_attach +ffffffff826275c0 T com_pcmcia_detach +ffffffff82627670 T com_pcmcia_activate +ffffffff82627750 T com_pcmcia_enable1 +ffffffff82627810 T com_pcmcia_enable +ffffffff82627930 T com_pcmcia_disable +ffffffff82627970 T com_pcmcia_disable1 +ffffffff82628000 t wdc_pcmcia_match +ffffffff826280f0 t wdc_pcmcia_attach +ffffffff82628630 T wdc_pcmcia_detach +ffffffff82628750 T wdc_pcmcia_activate +ffffffff82628890 T wdc_pcmcia_disk_device_interface_callback +ffffffff82628940 T wdc_pcmcia_disk_device_interface +ffffffff826289b0 T wdc_pcmcia_lookup +ffffffff82629000 T sm_pcmcia_match +ffffffff82629100 T sm_pcmcia_attach +ffffffff82629370 T sm_pcmcia_detach +ffffffff82629430 T sm_pcmcia_activate +ffffffff826294d0 T sm_pcmcia_funce_enaddr +ffffffff826294f0 T sm_pcmcia_ascii_enaddr +ffffffff82629600 T sm_pcmcia_lannid_ciscallback +ffffffff82629760 T sm_pcmcia_enable +ffffffff82629810 T sm_pcmcia_disable +ffffffff8262a000 T xe_pcmcia_match +ffffffff8262a050 T xe_pcmcia_attach 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cmalo_cmd_set_rate +ffffffff82633750 T cmalo_cmd_set_snmp +ffffffff82633910 T cmalo_cmd_set_macaddr +ffffffff82633ac0 T cmalo_wep +ffffffff82633b70 T cmalo_cmd_set_reset +ffffffff82633cb0 T cmalo_select_network +ffffffff82633e00 T cmalo_cmd_set_auth +ffffffff82633ee0 T cmalo_cmd_set_assoc +ffffffff826342c0 T cmalo_reflect_network +ffffffff826343d0 T cmalo_tx_done +ffffffff82634490 T cmalo_rx +ffffffff826346e0 T cmalo_cmd_response +ffffffff82634970 T cmalo_event +ffffffff826349f0 T cmalo_tx +ffffffff82634c40 T cmalo_cmd_set_wep +ffffffff82634ef0 T cmalo_rate2bitmap +ffffffff82634f30 T cmalo_hexdump +ffffffff82634f60 T cmalo_cmd_request +ffffffff82635100 T cmalo_cmd_rsp_hwspec +ffffffff82635170 T cmalo_cmd_rsp_scan +ffffffff826353a0 T cmalo_parse_elements +ffffffff826354a0 T cmalo_cmd_rsp_assoc +ffffffff826354e0 T cmalo_cmd_set_80211d +ffffffff82635600 T cmalo_cmd_set_bgscan_config +ffffffff826357a0 T cmalo_cmd_set_bgscan_query +ffffffff82636000 T an_pcmcia_match +ffffffff82636060 T an_pcmcia_attach +ffffffff826362a0 T an_pcmcia_detach +ffffffff82636350 T an_pcmcia_activate +ffffffff82637000 T pcibmatch +ffffffff826370c0 T pcibattach +ffffffff82637100 T pcib_callback +ffffffff82637180 T pcib_print +ffffffff82638000 T amdpcib_match +ffffffff82638060 T amdpcib_attach +ffffffff826381c0 T amdpcib_get_timecount +ffffffff82639000 T tcpcib_match +ffffffff82639060 T tcpcib_attach +ffffffff826393c0 T tcpcib_activate +ffffffff82639710 T tcpcib_wdt_init +ffffffff82639890 T tcpcib_wdt_start +ffffffff826398c0 T tcpcib_wdt_stop +ffffffff82639960 T tcpcib_hpet_get_timecount +ffffffff82639990 T tcpcib_wdt_cb +ffffffff8263a000 T aapic_match +ffffffff8263a040 T aapic_attach +ffffffff8263b000 T hme_config +ffffffff8263b5a0 T hme_stop +ffffffff8263b840 T hme_start +ffffffff8263bbd0 T hme_ioctl +ffffffff8263bdc0 T hme_watchdog +ffffffff8263be30 t hme_mii_readreg +ffffffff8263c000 t hme_mii_writereg +ffffffff8263c1d0 t hme_mii_statchg +ffffffff8263c270 T hme_mediachange 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wskbd_kbd_backlight_task +ffffffff82663c70 T wskbd_repeat +ffffffff82663d20 T wskbd_brightness_task +ffffffff82663da0 T wskbd_set_keymap +ffffffff82663e20 T wskbd_cnattach +ffffffff82663f20 T wskbd_cngetc +ffffffff82664040 T wskbd_cnpollc +ffffffff826640a0 T wskbd_cnbell +ffffffff826640f0 T wskbd_cndetach +ffffffff826641a0 T wskbd_deliver_event +ffffffff826642e0 T wskbdopen +ffffffff826643e0 T wskbd_input +ffffffff82664560 T wskbd_translate +ffffffff82664d40 T wskbd_rawinput +ffffffff82664d80 T wskbd_enable +ffffffff82664e20 T wskbd_do_open +ffffffff82664ef0 T wskbdclose +ffffffff82665030 T wskbdread +ffffffff82665110 T wskbdioctl +ffffffff826651a0 T wskbd_do_ioctl_sc +ffffffff826652a0 T wskbd_displayioctl_sc +ffffffff82665b80 T wskbdkqfilter +ffffffff82665be0 T wskbd_pickfree +ffffffff82665c50 T wskbd_set_console_display +ffffffff82665cb0 T wskbd_add_mux +ffffffff82665d30 T update_leds +ffffffff82665de0 T update_modifier +ffffffff82665ee0 T change_displayparam +ffffffff82665fa0 T internal_command +ffffffff82666410 T wskbd_debugger +ffffffff82667000 T wskbd_compose_value +ffffffff826671a0 T ksym_upcase +ffffffff82667220 T fillmapentry +ffffffff826673b0 T wskbd_get_mapentry +ffffffff826675d0 T wskbd_init_keymap +ffffffff82667670 T wskbd_load_keymap +ffffffff82668000 T wsmouse_match +ffffffff82668030 T wsmouse_attach +ffffffff826680e0 T wsmouse_detach +ffffffff826682f0 T wsmouse_activate +ffffffff82668330 T wsmouse_mux_open +ffffffff82668500 T wsmouse_mux_close +ffffffff82668560 T wsmousedoioctl +ffffffff826685d0 T wsmousedevprint +ffffffff82668620 T wsmouseopen +ffffffff82668720 T wsmouse_input_cleanup +ffffffff826687c0 T wsmousedoopen +ffffffff82668990 T wsmouseclose +ffffffff82668a90 T wsmouse_input_reset +ffffffff82668be0 T wsmouseread +ffffffff82668cc0 T wsmouseioctl +ffffffff82668d50 T wsmouse_do_ioctl +ffffffff82668f10 T wsmouse_param_ioctl +ffffffff82669080 T wsmouse_set_params +ffffffff826693c0 T wsmouse_get_params +ffffffff82669620 T wsmousekqfilter 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wstpad_set_direction +ffffffff8266d180 T wstpad_is_stable +ffffffff8266d260 T wstpad_scroll_coords +ffffffff8266d360 T wstpad_scroll +ffffffff8266d4f0 T wstpad_f2scroll +ffffffff8266d7c0 T wstpad_edgescroll +ffffffff8266d930 T wstpad_get_sbtn +ffffffff8266dac0 T wstpad_mtbtn_contacts +ffffffff8266dbf0 T wstpad_get_mtbtn +ffffffff8266dc50 T wstpad_softbuttons +ffffffff8266dd30 T wstpad_is_tap +ffffffff8266ddb0 T wstpad_tap_filter +ffffffff8266de50 T wstpad_tap_touch +ffffffff8266e0a0 T wstpad_tap_button +ffffffff8266e0f0 T wstpad_tap +ffffffff8266e550 T wstpad_tap_sync +ffffffff8266e5b0 T wstpad_tap_timeout +ffffffff8266e850 T wstpad_click +ffffffff8266e8f0 T wstpad_cmds +ffffffff8266eb80 T wstpad_mt_inputs +ffffffff8266ef30 T wstpad_mt_masks +ffffffff8266f2f0 T wstpad_touch_inputs +ffffffff8266f520 T wstpad_process_input +ffffffff8266f880 T wstpad_track_interval +ffffffff8266f9f0 T wstpad_init_deceleration +ffffffff8266fac0 T wstpad_decelerate +ffffffff8266fc30 T wstpad_filter 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wsmux_set_display +ffffffff82673ad0 T wsmux_get_layout +ffffffff82673b00 T wsmux_set_layout +ffffffff82674000 T wsemul_pick +ffffffff82674070 T wsemul_getname +ffffffff82675000 T wsemul_getchar +ffffffff826751d0 T wsemul_local_translate +ffffffff826754b0 T wsemul_utf8_translate +ffffffff82676000 T wsemul_vt100_cnattach +ffffffff82676210 T wsemul_vt100_attach +ffffffff82676550 T wsemul_vt100_output +ffffffff826768d0 T wsemul_vt100_detach +ffffffff82676a40 T wsemul_vt100_resetop +ffffffff82676c10 T wsemul_vt100_output_esc +ffffffff826772c0 T wsemul_vt100_output_csi +ffffffff82677400 T wsemul_vt100_output_scs94 +ffffffff826774c0 T wsemul_vt100_output_scs94_percent +ffffffff82677510 T wsemul_vt100_output_scs96 +ffffffff82677660 T wsemul_vt100_output_scs96_percent +ffffffff826776b0 T wsemul_vt100_output_esc_hash +ffffffff82677a10 T wsemul_vt100_output_esc_spc +ffffffff82677a50 T wsemul_vt100_output_string +ffffffff82677ac0 T wsemul_vt100_output_string_esc +ffffffff82677b20 T wsemul_vt100_output_dcs +ffffffff82677bd0 T wsemul_vt100_output_dcs_dollar +ffffffff82677c30 T wsemul_vt100_output_esc_percent +ffffffff82677c90 T wsemul_vt100_init +ffffffff82677cf0 T wsemul_vt100_reset +ffffffff82677e30 T wsemul_vt100_nextline +ffffffff82677ec0 T wsemul_vt100_output_normal +ffffffff82678160 T wsemul_vt100_output_c0c1 +ffffffff82678400 T wsemul_vt100_jump_scroll +ffffffff82679000 T wsemul_vt100_scrollup +ffffffff82679170 T wsemul_vt100_scrolldown +ffffffff826792e0 T wsemul_vt100_ed +ffffffff82679570 T wsemul_vt100_el +ffffffff82679670 T wsemul_vt100_handle_csi +ffffffff8267a750 T vt100_ansimode +ffffffff8267a7d0 T vt100_decmode +ffffffff8267a900 T vt100_selectattribute +ffffffff8267aa50 T wsemul_vt100_handle_dcs +ffffffff8267b000 T vt100_initchartables +ffffffff8267b120 T vt100_setnrc +ffffffff8267c000 T wsemul_vt100_translate +ffffffff8267d000 T pckbdprobe +ffffffff8267d160 T pckbdattach +ffffffff8267d380 T pckbdactivate +ffffffff8267d410 T pckbd_enable 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pms_disable_synaptics +ffffffff82680350 T pms_enable_alps +ffffffff826809a0 T pms_ioctl_alps +ffffffff82680a60 T pms_sync_alps +ffffffff82680b10 T pms_proc_alps +ffffffff82680df0 T pms_enable_elantech_v1 +ffffffff82681050 T pms_ioctl_elantech +ffffffff82681120 T pms_sync_elantech_v1 +ffffffff82681200 T pms_proc_elantech_v1 +ffffffff82681390 T pms_enable_elantech_v2 +ffffffff82681590 T pms_sync_elantech_v2 +ffffffff82681680 T pms_proc_elantech_v2 +ffffffff82681810 T pms_enable_elantech_v3 +ffffffff82681a10 T pms_sync_elantech_v3 +ffffffff82681aa0 T pms_proc_elantech_v3 +ffffffff82681cc0 T pms_enable_elantech_v4 +ffffffff82681f30 T pms_sync_elantech_v4 +ffffffff82682000 T pms_proc_elantech_v4 +ffffffff826823a0 T pms_enable_intelli +ffffffff826825c0 T pms_cmd +ffffffff82682650 T pms_spec_cmd +ffffffff82682920 T pms_set_scaling +ffffffff826829c0 T pms_set_resolution +ffffffff82682a60 T pms_get_devid +ffffffff82682b00 T pms_get_status +ffffffff82682ba0 T pms_set_rate +ffffffff82682c40 T pms_reset +ffffffff82682ce0 T pms_dev_enable +ffffffff82682da0 T pms_dev_disable +ffffffff82682e60 T pms_protocol_lookup +ffffffff82682f70 T pms_reset_detect +ffffffff82682ff0 T pms_reset_timo +ffffffff82683050 T pms_reset_task +ffffffff82683140 T pms_change_state +ffffffff82683530 T pmsinput +ffffffff82683700 T synaptics_set_mode +ffffffff82683820 T synaptics_query +ffffffff82683930 T synaptics_get_hwinfo +ffffffff82683ea0 T synaptics_sec_proc +ffffffff82683f80 T synaptics_knock +ffffffff82684220 T alps_sec_proc +ffffffff82684350 T alps_get_hwinfo +ffffffff82684810 T elantech_set_absolute_mode_v1 +ffffffff82684bf0 T elantech_set_absolute_mode_v2 +ffffffff826852c0 T elantech_ps2_cmd +ffffffff82685360 T elantech_set_absolute_mode_v3 +ffffffff82685940 T elantech_set_absolute_mode_v4 +ffffffff82685be0 T elantech_get_hwinfo_v1 +ffffffff82685e20 T elantech_get_hwinfo_v2 +ffffffff826861a0 T elantech_get_hwinfo_v3 +ffffffff826863e0 T elantech_get_hwinfo_v4 +ffffffff826866a0 T elantech_knock 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T hidkbd_cngetc +ffffffff8268e690 T hidkbd_hookup_bell +ffffffff8268f000 T hidms_stylus_hid_parse +ffffffff8268f330 T hidms_pad_buttons_hid_parse +ffffffff8268f410 T hidms_wacom_setup +ffffffff8268f750 T hidms_setup +ffffffff8268fda0 T hidms_attach +ffffffff8268ff30 T hidms_detach +ffffffff8268ff70 T hidms_input +ffffffff82690280 T hidms_enable +ffffffff826902d0 T hidms_ioctl +ffffffff826904a0 T hidms_disable +ffffffff82691000 T hidmt_get_resolution +ffffffff82691110 T hidmt_setup +ffffffff82691870 T hidmt_set_input_mode +ffffffff82691920 T hidmt_configure +ffffffff826919d0 T hidmt_attach +ffffffff82691af0 T hidmt_detach +ffffffff82691b30 T hidmt_input +ffffffff82692050 T hidmt_enable +ffffffff82692090 T hidmt_ioctl +ffffffff82692180 T hidmt_disable +ffffffff82693000 T hidcc_match +ffffffff82693110 T hidcc_attach +ffffffff826932f0 T hidcc_parse +ffffffff82693710 T hidcc_attach_wskbd +ffffffff826937d0 T hidcc_detach +ffffffff826938a0 T hidcc_intr +ffffffff82693c40 T hidcc_intr_slice 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ivhd_issue_command +ffffffff8281ac20 T ivhd_invalidate_iommu_all +ffffffff8281ad30 T ivhd_invalidate_interrupt_table +ffffffff8281ae50 T ivhd_showreg +ffffffff8281afe0 T ivhd_checkerr +ffffffff8281b280 T ivhd_iommu_init +ffffffff8281b840 T acpiivrs_ivhd +ffffffff8281b8c0 T acpiivrs_init +ffffffff8281ba10 T acpidmar_msi_hwmask +ffffffff8281bab0 T acpidmar_msi_hwunmask +ffffffff8281bb40 T acpidmar_msi_addroute +ffffffff8281bc20 T acpidmar_msi_delroute +ffffffff8281bc40 T iommu_showfault +ffffffff8281be10 T iommu_showpte +ffffffff8281c000 T acpidock_match +ffffffff8281c070 T acpidock_attach +ffffffff8281c410 T acpidock_status +ffffffff8281c4a0 T acpidock_docklock +ffffffff8281c590 T acpidock_dockctl +ffffffff8281c680 T acpidock_foundejd +ffffffff8281c750 T acpidock_notify +ffffffff8281ccc0 T acpidock_eject +ffffffff8281cdc0 T acpidock_walkchildren +ffffffff8281d000 T abl_match +ffffffff8281d030 T abl_attach +ffffffff8281d280 T abl_get_brightness +ffffffff8281d320 T abl_get_param +ffffffff8281d380 T abl_set_param +ffffffff8281d450 T abl_set_brightness +ffffffff8281e000 T asmc_match +ffffffff8281e050 T asmc_attach +ffffffff8281e700 T asmc_activate +ffffffff8281e790 T asmc_try +ffffffff8281ec20 T asmc_get_backlight +ffffffff8281eca0 T asmc_set_backlight +ffffffff8281ed30 T asmc_backlight +ffffffff8281edd0 T asmc_init +ffffffff8281f030 T asmc_update +ffffffff8281f1e0 T asmc_detach +ffffffff8281f450 t asmc_temp +ffffffff8281f600 t asmc_fan +ffffffff8281f810 t asmc_light +ffffffff82820000 T acpiasus_match +ffffffff82820030 T acpiasus_attach +ffffffff82820180 T acpiasus_activate +ffffffff82820330 T acpiasus_init +ffffffff82820430 T acpiasus_notify +ffffffff82821000 T thinkpad_match +ffffffff828210c0 T thinkpad_attach +ffffffff82821540 T thinkpad_activate +ffffffff828216e0 T thinkpad_sensor_attach +ffffffff82821890 T thinkpad_get_temp +ffffffff82821940 T thinkpad_sensor_refresh +ffffffff82821ae0 T thinkpad_get_volume_mute +ffffffff82821b50 T thinkpad_attach_deferred +ffffffff82821b70 T thinkpad_enable_events +ffffffff82821d70 T thinkpad_get_kbd_backlight +ffffffff82821e00 T thinkpad_set_kbd_backlight +ffffffff82821ee0 T thinkpad_get_param +ffffffff82821f40 T thinkpad_set_param +ffffffff82822000 T thinkpad_battery_setchargestart +ffffffff82822150 T thinkpad_battery_setchargestop +ffffffff828222c0 T thinkpad_battery_setchargemode +ffffffff828228e0 T thinkpad_hotkey +ffffffff82822fa0 T thinkpad_brightness_up +ffffffff82823170 T thinkpad_brightness_down +ffffffff82823330 T thinkpad_toggle_bluetooth +ffffffff82823460 T thinkpad_volume_mute +ffffffff82823520 T thinkpad_volume_down +ffffffff828235e0 T thinkpad_volume_up +ffffffff828236a0 T thinkpad_get_thinklight +ffffffff828236f0 T thinkpad_adaptive_change +ffffffff82823820 T thinkpad_get_brightness +ffffffff82823860 T thinkpad_toggle_wan +ffffffff82823990 T thinkpad_cmos +ffffffff82823a50 T thinkpad_set_brightness +ffffffff82823b50 T thinkpad_set_thinklight +ffffffff82823c10 T thinkpad_battery_inhibit_charge +ffffffff82823d50 T thinkpad_battery_force_discharge +ffffffff82824000 T toshiba_match +ffffffff828240b0 T toshiba_attach +ffffffff828241b0 T get_param_brightness +ffffffff82824210 T acpitoshiba_get_param +ffffffff82824270 T set_param_brightness +ffffffff82824310 T toshiba_update_brightness +ffffffff82824420 T acpitoshiba_set_param +ffffffff828244c0 T toshiba_set_brightness +ffffffff82824600 T toshiba_enable_events +ffffffff828246a0 T toshiba_read_events +ffffffff82824820 T toshiba_hotkey +ffffffff82824ab0 T toshiba_get_brightness +ffffffff82824c40 T toshiba_fn_key_brightness_up +ffffffff82824db0 T toshiba_fn_key_brightness_down +ffffffff82824f20 T toshiba_fn_key_video_output +ffffffff82825090 T toshiba_get_video_output +ffffffff82825220 T toshiba_set_video_output +ffffffff82826000 T acpisony_match +ffffffff82826070 T acpisony_attach +ffffffff828260f0 T acpisony_activate +ffffffff82826140 T acpisony_notify_setup +ffffffff82826380 T acpisony_notify +ffffffff828267b0 T acpisony_find_offset +ffffffff828268e0 T acpisony_set_hotkey +ffffffff82826b00 T acpisony_brightness_down +ffffffff82826c40 T acpisony_get_brightness +ffffffff82826ce0 T acpisony_set_brightness +ffffffff82827000 T acpivideo_match +ffffffff82827070 T acpivideo_attach +ffffffff828271f0 T acpivideo_getpcibus +ffffffff82827230 T acpivideo_notify +ffffffff828272a0 T acpivideo_set_policy +ffffffff82827380 T acpi_foundvout +ffffffff82827460 T acpivideo_print +ffffffff82828000 T acpivout_match +ffffffff82828070 T acpivout_attach +ffffffff82828200 T acpivout_notify +ffffffff828282e0 T acpivout_get_bcl +ffffffff82828440 T acpivout_get_brightness +ffffffff82828500 T acpivout_get_param +ffffffff828285a0 T acpivout_set_param +ffffffff82828710 T acpivout_select_brightness +ffffffff828287e0 T acpivout_find_brightness +ffffffff82828870 T acpivout_set_brightness +ffffffff82829000 T acpipwrres_match +ffffffff82829070 T acpipwrres_attach +ffffffff82829310 T acpipwrres_foundcons +ffffffff828294d0 T acpipwrres_ref_incr +ffffffff82829580 T acpipwrres_hascons +ffffffff828295d0 T acpipwrres_ref_decr +ffffffff82829670 T acpipwrres_addcons +ffffffff8282a000 T aibs_match +ffffffff8282a030 T aibs_attach +ffffffff8282a190 T aibs_probe +ffffffff8282a320 T aibs_attach_new +ffffffff8282a450 T aibs_attach_sif +ffffffff8282a630 T aibs_notify +ffffffff8282a6a0 T aibs_add_sensor +ffffffff8282a940 T aibs_getpack +ffffffff8282a9d0 T aibs_refresh +ffffffff8282aa40 T aibs_refresh_r +ffffffff8282ab90 T aibs_getvalue +ffffffff8282acf0 T aibs_find_cb +ffffffff8282b000 T aplgpio_match +ffffffff8282b060 T aplgpio_attach +ffffffff8282b390 T aplgpio_intr +ffffffff8282b500 T aplgpio_read_pin +ffffffff8282b560 T aplgpio_write_pin +ffffffff8282b5e0 T aplgpio_intr_establish +ffffffff8282b720 T aplgpio_intr_enable +ffffffff8282b7b0 T aplgpio_intr_disable +ffffffff8282c000 T bytgpio_match +ffffffff8282c060 T bytgpio_attach +ffffffff8282c3a0 T bytgpio_intr +ffffffff8282c4f0 T bytgpio_read_pin +ffffffff8282c560 T bytgpio_write_pin +ffffffff8282c5f0 T bytgpio_intr_establish +ffffffff8282c670 T bytgpio_intr_enable +ffffffff8282c760 T bytgpio_intr_disable +ffffffff8282d000 T chvgpio_match +ffffffff8282d060 T chvgpio_attach +ffffffff8282d380 T chvgpio_intr +ffffffff8282d470 T chvgpio_read_pin +ffffffff8282d520 T chvgpio_write_pin +ffffffff8282d5f0 T chvgpio_intr_establish +ffffffff8282d7e0 T chvgpio_intr_enable +ffffffff8282d8c0 T chvgpio_intr_disable +ffffffff8282d9a0 T chvgpio_opreg_handler +ffffffff8282da40 T chvgpio_check_pin +ffffffff8282e000 T glkgpio_match +ffffffff8282e060 T glkgpio_attach +ffffffff8282e390 T glkgpio_intr +ffffffff8282e500 T glkgpio_read_pin +ffffffff8282e560 T glkgpio_write_pin +ffffffff8282e5e0 T glkgpio_intr_establish +ffffffff8282e720 T glkgpio_intr_enable +ffffffff8282e7b0 T glkgpio_intr_disable +ffffffff8282f000 T pchgpio_match +ffffffff8282f060 T pchgpio_attach +ffffffff8282f660 T pchgpio_activate +ffffffff8282f710 T pchgpio_intr +ffffffff8282f960 T pchgpio_read_pin +ffffffff8282fa50 T pchgpio_write_pin +ffffffff8282fb70 T pchgpio_intr_establish +ffffffff8282fdc0 T pchgpio_intr_enable +ffffffff8282ff00 T pchgpio_intr_disable +ffffffff82830040 T pchgpio_save +ffffffff828300b0 T pchgpio_restore +ffffffff82830120 T pchgpio_find_group +ffffffff828301a0 T pchgpio_intr_handle +ffffffff828302a0 T pchgpio_save_pin +ffffffff82830480 T pchgpio_restore_pin +ffffffff82831000 T tipmic_match +ffffffff82831060 T tipmic_attach +ffffffff828312c0 T tipmic_write_1 +ffffffff828313a0 T tipmic_intr +ffffffff82831550 T tipmic_get_lpat +ffffffff82831690 T tipmic_read_pin +ffffffff828316c0 T tipmic_write_pin +ffffffff828316f0 T tipmic_thermal_opreg_handler +ffffffff82832120 T tipmic_power_opreg_handler +ffffffff82832400 T tipmic_read_1 +ffffffff828324f0 T tipmic_raw_to_temp +ffffffff82833000 T ccpmic_match +ffffffff82833060 T ccpmic_attach +ffffffff82833160 T ccpmic_get_lpat +ffffffff82833290 T ccpmic_read_pin +ffffffff82833450 T ccpmic_write_pin +ffffffff828335f0 T ccpmic_thermal_opreg_handler +ffffffff82833890 T ccpmic_power_opreg_handler +ffffffff82833ad0 T ccpmic_read_1 +ffffffff82833bc0 T ccpmic_write_1 +ffffffff82833ca0 T ccpmic_raw_to_temp +ffffffff82834000 T com_acpi_match +ffffffff82834150 T com_acpi_attach +ffffffff82834440 T com_acpi_is_designware +ffffffff828344c0 T com_acpi_intr_designware +ffffffff82834500 T com_acpi_is_console +ffffffff82835000 T sdhc_acpi_match +ffffffff82835060 T sdhc_acpi_attach +ffffffff82835400 T sdhc_acpi_parse_resources +ffffffff828354b0 T sdhc_acpi_card_detect_gpio +ffffffff82835510 T sdhc_acpi_card_detect_intr +ffffffff82835560 T sdhc_acpi_power_on +ffffffff828355f0 T sdhc_acpi_explore +ffffffff82835620 T sdhc_acpi_card_detect_nonremovable +ffffffff82835650 T sdhc_acpi_do_explore +ffffffff82836000 T dwiic_acpi_match +ffffffff82836050 T dwiic_acpi_attach +ffffffff828364f0 T dwiic_acpi_parse_crs +ffffffff82836650 T dwiic_acpi_power +ffffffff82836780 T dwiic_acpi_get_params +ffffffff82836900 T dwiic_i2c_intr_establish +ffffffff82836990 T dwiic_i2c_intr_disestablish +ffffffff828369b0 T dwiic_i2c_intr_string +ffffffff82836a40 T dwiic_acpi_acquire_bus +ffffffff82836aa0 T dwiic_acpi_release_bus +ffffffff82836ae0 T dwiic_acpi_bus_scan +ffffffff82836b20 T dwiic_acpi_found_hid +ffffffff82836f10 T dwiic_matchhids +ffffffff82836fa0 T dwiic_acpi_found_ihidev +ffffffff82837280 T dwiic_acpi_found_iatp +ffffffff82837400 T dwiic_acpi_found_ietp +ffffffff82838000 T acpicbkbd_match +ffffffff82838030 T acpicbkbd_attach +ffffffff828380e0 T acpicbkbd_activate +ffffffff82838140 T acpicbkbd_get_backlight +ffffffff828381c0 T acpicbkbd_set_backlight +ffffffff82838270 T acpicbkbd_write_backlight +ffffffff82839000 T acpials_match +ffffffff82839090 T acpials_attach +ffffffff82839280 T acpials_read +ffffffff82839310 T acpials_addtask +ffffffff82839350 T acpials_notify +ffffffff828393e0 T acpials_update +ffffffff8283a000 T tpm_match +ffffffff8283a050 T tpm_attach +ffffffff8283a3a0 T tpm_activate +ffffffff8283a3f0 T tpm2_start_method +ffffffff8283a480 T tpm_probe +ffffffff8283a570 T tpm_init_tis +ffffffff8283a840 T tpm_init_crb +ffffffff8283ac30 T tpm_suspend +ffffffff8283ad60 T tpm_resume +ffffffff8283ad90 T tpm_write_tis +ffffffff8283b1e0 T tpm_read_tis +ffffffff8283b3f0 T tpm_write_crb +ffffffff8283b8c0 T tpm_read_crb +ffffffff8283bc60 T tpm_request_locality_tis +ffffffff8283bd80 T tpm_request_locality_crb +ffffffff8283bec0 T tpm_release_locality_crb +ffffffff8283bf20 T tpm_release_locality_tis +ffffffff8283bf90 T tpm_getburst +ffffffff8283c050 T tpm_status +ffffffff8283c070 T tpm_waitfor +ffffffff8283c160 T tpm_waitfor_status +ffffffff8283d000 T acpihve_match +ffffffff8283d0d0 T acpihve_attach +ffffffff8283e000 T acpisbs_match +ffffffff8283e030 T acpisbs_attach +ffffffff8283e320 T acpisbs_activate +ffffffff8283e410 T acpisbs_read +ffffffff8283e4e0 T acpisbs_setup_sensors +ffffffff8283e610 T acpisbs_refresh_sensors +ffffffff8283e760 T acpisbs_notify +ffffffff8283e8c0 T acpi_smbus_read +ffffffff8283f000 T surface_match +ffffffff8283f060 T surface_attach +ffffffff8283f0c0 T surface_hotkey +ffffffff82840000 T ipmi_acpi_match +ffffffff82840030 T ipmi_acpi_attach +ffffffff828402b0 T ipmi_acpi_parse_crs +ffffffff82841000 T amdgpio_match +ffffffff82841060 T amdgpio_attach +ffffffff82841330 T amdgpio_activate +ffffffff82841430 T amdgpio_intr +ffffffff82841610 T amdgpio_read_pin +ffffffff82841670 T amdgpio_write_pin +ffffffff828416f0 T amdgpio_intr_establish +ffffffff828417f0 T amdgpio_intr_enable +ffffffff82841880 T amdgpio_intr_disable +ffffffff82841910 T amdgpio_save +ffffffff828419a0 T amdgpio_restore +ffffffff82841a40 T amdgpio_save_pin +ffffffff82841ab0 T amdgpio_restore_pin +ffffffff82841b20 T amdgpio_pin_intr +ffffffff82842000 T acpihid_match +ffffffff82842030 T acpihid_attach +ffffffff82842270 T acpihid_init_dsm +ffffffff82842400 T acpihid_eval +ffffffff82842650 T acpihid_notify +ffffffff828426c0 T acpihid_button_array_enable +ffffffff82843000 t iosf_acpi_match +ffffffff82843050 t iosf_acpi_attach +ffffffff82843170 t iosf_acpi_mbi_mdr_rd +ffffffff828431f0 t iosf_acpi_mbi_mdr_wr +ffffffff82844000 T intelpmc_match +ffffffff82844030 T intelpmc_attach +ffffffff82844110 T intelpmc_activate +ffffffff82844320 T intelpmc_parse_lpit +ffffffff82844490 T intelpmc_suspend +ffffffff82844840 T intelpmc_resume +ffffffff82844bf0 T intelpmc_dsm +ffffffff82845000 T acpi_match +ffffffff82845070 T acpi_attach +ffffffff828450b0 T acpi_probe +ffffffff828452a0 T acpi_map +ffffffff828453b0 T acpi_unmap +ffffffff82845400 T acpi_bus_space_map +ffffffff82845420 T acpi_bus_space_unmap +ffffffff82845440 T acpi_intr_establish +ffffffff828455a0 T acpi_intr_disestablish +ffffffff828455b0 T acpi_scan +ffffffff82845780 T acpi_acquire_glk +ffffffff828457e0 T acpi_release_glk +ffffffff82845830 T acpi_attach_machdep +ffffffff82845a10 T acpi_sleep_cpu +ffffffff82845bd0 T acpi_resume_cpu +ffffffff82845d20 T sleep_mp +ffffffff82845e20 T resume_mp +ffffffff82845f20 T acpi_iommu_device_map +ffffffff82846000 T hibernate_resume_machdep +ffffffff82846050 T hibernate_drop_to_real_mode +ffffffff82846060 T hibernate_activate_resume_pt_machdep +ffffffff828460a0 T hibernate_switch_stack_machdep +ffffffff828460e0 T hibernate_flush +ffffffff82846110 T acpi_savecpu +ffffffff82847000 T sleep_showstate +ffffffff82847110 T sleep_setstate +ffffffff82847170 T gosleep +ffffffff82847340 T sleep_resume +ffffffff828473d0 T suspend_finish +ffffffff82848000 T acpiopen +ffffffff828480d0 T acpiclose +ffffffff82848170 T acpiioctl +ffffffff82848300 T request_sleep +ffffffff82848390 T acpi_filtdetach +ffffffff828483f0 T acpi_filtread +ffffffff82848430 T acpikqfilter +ffffffff82849000 T acpipci_match +ffffffff82849030 T acpipci_attach +ffffffff82849370 T acpipci_osc +ffffffff828494e0 T acpipci_parse_resources +ffffffff82849610 T acpipci_attach_bus +ffffffff82849850 T acpipci_print +ffffffff828498d0 T acpipci_attach_busses +ffffffff8284a000 T efiopen +ffffffff8284a040 T eficlose +ffffffff8284a070 T efiioctl +ffffffff8284a110 T efiioc_get_table +ffffffff8284a280 T efiioc_var_get +ffffffff8284a530 T efiioc_var_next +ffffffff8284a760 T efiioc_var_set +ffffffff8284aa10 T efi_adapt_error +ffffffff8284b000 T efi_match +ffffffff8284b070 T efi_attach +ffffffff8284b390 T efi_map_runtime +ffffffff8284b520 T efi_enter +ffffffff8284b5d0 T efi_leave +ffffffff8284b660 T efi_fault +ffffffff8284c000 T vmm_probe +ffffffff8284c060 T vmm_attach +ffffffff8284c1b0 T vmm_activate +ffffffff8284c340 T vmmopen +ffffffff8284c390 T vmmclose +ffffffff8284c3c0 T vm_find +ffffffff8284c500 T vmmioctl +ffffffff8284c840 T vm_create +ffffffff8284cbb0 T vm_get_info +ffffffff8284ce60 T vm_terminate +ffffffff8284d010 T vm_resetcpu +ffffffff8284d140 T vm_share_mem +ffffffff8284d2b0 T pledge_ioctl_vmm +ffffffff8284d3a0 T vm_find_vcpu +ffffffff8284d400 T vm_create_check_mem_ranges +ffffffff8284d5c0 T vm_teardown +ffffffff8284d740 T vcpu_must_stop +ffffffff8284e000 T vmm_enabled +ffffffff8284e080 T vmm_attach_machdep +ffffffff8284e260 T vmm_quiesce_vmx +ffffffff8284e470 T vmm_activate_machdep +ffffffff8284e510 T vmm_stop +ffffffff8284e680 T vmm_start +ffffffff8284e7a0 T vmmioctl_machdep +ffffffff8284e880 T vm_intr_pending +ffffffff8284e940 T pledge_ioctl_vmm_machdep +ffffffff8284e980 T vm_rwvmparams +ffffffff8284eb30 T vmm_init_pvclock +ffffffff8284ec10 T vm_rwregs +ffffffff8284ed50 T vcpu_readregs_vmx +ffffffff8284f230 T vcpu_writeregs_vmx +ffffffff8284f770 T vcpu_readregs_svm +ffffffff8284fc20 T vcpu_writeregs_svm +ffffffff828500f0 T start_vmm_on_cpu +ffffffff82850230 T stop_vmm_on_cpu +ffffffff828502d0 T vmclear_on_cpu +ffffffff82850350 T vm_impl_init +ffffffff828504e0 T vm_impl_deinit +ffffffff82850510 T vcpu_reload_vmcs_vmx +ffffffff82850690 T vcpu_reset_regs_svm +ffffffff82850960 T svm_setmsrbrw +ffffffff82850a70 T svm_setmsrbr +ffffffff82850b40 T svm_setmsrbw +ffffffff82850c20 T vmx_setmsrbr +ffffffff82850cd0 T vmx_setmsrbw +ffffffff82850d80 T vmx_setmsrbrw +ffffffff82850e90 T svm_set_clean +ffffffff82850ee0 T svm_set_dirty +ffffffff82850f30 T vcpu_reset_regs_vmx +ffffffff828519a0 T vcpu_vmx_check_cap +ffffffff82851aa0 T vcpu_vmx_compute_ctrl +ffffffff82851c80 T vcpu_init_vmx +ffffffff82852190 T vmm_alloc_vpid +ffffffff828522b0 T vcpu_deinit_vmx +ffffffff828523e0 T vcpu_reset_regs +ffffffff82852460 T vcpu_init_svm +ffffffff82852770 T vcpu_deinit_svm +ffffffff828528e0 T vcpu_init +ffffffff828529b0 T vmm_free_vpid +ffffffff82852a20 T vcpu_deinit +ffffffff82852a60 T vm_run +ffffffff82852c60 T vcpu_run_vmx +ffffffff82853740 T vcpu_run_svm +ffffffff82853e10 T vmm_fpurestore +ffffffff82853ee0 T vmm_fpusave +ffffffff82853f70 T vmm_translate_gva +ffffffff828542a0 T vmm_update_pvclock +ffffffff828543b0 T vmx_get_exit_info +ffffffff82854430 T vmx_handle_exit +ffffffff828548a0 T vmx_instruction_error_decode +ffffffff82854a70 T vmm_get_guest_cpu_cpl +ffffffff82854b90 T vmx_handle_intr +ffffffff82854c30 T svm_handle_hlt +ffffffff82854c80 T vmx_handle_hlt +ffffffff82854d50 T svm_handle_exit +ffffffff828550d0 T svm_handle_np_fault +ffffffff82855270 T vmm_handle_cpuid +ffffffff82855950 T svm_handle_msr +ffffffff82855c40 T svm_handle_xsetbv +ffffffff82855d00 T svm_handle_inout +ffffffff82855e10 T vmm_inject_ud +ffffffff82855e50 T vmm_inject_db +ffffffff82855e90 T vmx_handle_np_fault +ffffffff82856010 T vmx_handle_inout +ffffffff828561b0 T vmx_handle_cr +ffffffff828563f0 T vmx_handle_rdmsr +ffffffff828564f0 T vmx_handle_wrmsr +ffffffff828567a0 T vmx_handle_xsetbv +ffffffff828568a0 T vmm_inject_gp +ffffffff828568e0 T vmm_get_guest_memtype +ffffffff82856960 T vmx_get_exit_qualification +ffffffff828569d0 T vmx_get_guest_faulttype +ffffffff82856a80 T svm_get_guest_faulttype +ffffffff82856ab0 T svm_fault_page +ffffffff82856b50 T vmx_fault_page +ffffffff82856ce0 T vmm_get_guest_cpu_mode +ffffffff82856df0 T vmx_load_pdptes +ffffffff82857110 T vmx_handle_cr0_write +ffffffff82857370 T vmx_handle_cr4_write +ffffffff82857430 T vmm_handle_xsetbv +ffffffff828574e0 T vmx_handle_misc_enable_msr +ffffffff82857540 T vmm_pat_is_valid +ffffffff82857620 t vmm_handle_cpuid_0xd +ffffffff82857720 T vmm_gpa_is_valid +ffffffff82857790 T vmx_exit_reason_decode +ffffffff828577d0 T svm_exit_reason_decode +ffffffff828585e0 T vcpu_state_decode +ffffffff82859000 T vmm_dispatch_intr +ffffffff82859030 T vmxon +ffffffff82859060 T vmxoff +ffffffff82859090 T vmclear +ffffffff828590c0 T vmptrld +ffffffff828590f0 T vmptrst +ffffffff82859120 T vmwrite +ffffffff82859150 T vmread +ffffffff82859180 T invvpid +ffffffff8285919b t invvpid_fail +ffffffff828591a2 t invvpid_ret +ffffffff828591c0 T invept +ffffffff828591db t invept_fail +ffffffff828591e2 t invept_ret +ffffffff82859200 T vmx_enter_guest +ffffffff8285922b t skip_init +ffffffff82859298 t no_l1df_msr +ffffffff8285929b t l1df_tlb_loop +ffffffff828592b4 t l1df_tlb_done +ffffffff828592bc t l1df_load_cache +ffffffff828592d3 t done_flush +ffffffff82859366 t do_resume +ffffffff828593eb t fail_launch_or_resume +ffffffff8285942d t fail_launch_unknown +ffffffff8285943a t fail_launch_invalid_vmcs +ffffffff82859447 t fail_launch_valid_vmcs +ffffffff82859464 t vmx_exit_handler_asm +ffffffff82859529 t restore_host +ffffffff82859550 T svm_enter_guest +ffffffff828596d2 t restore_host_svm +ffffffff8285a000 T sdmmc_match +ffffffff8285a060 T sdmmc_attach +ffffffff8285a400 T sdmmc_detach +ffffffff8285a4c0 T sdmmc_activate +ffffffff8285a580 T sdmmc_discover_task +ffffffff8285a670 T sdmmc_create_thread +ffffffff8285a6e0 T sdmmc_holds_root_device +ffffffff8285a740 T sdmmc_task_thread +ffffffff8285a9c0 T sdmmc_needs_discover +ffffffff8285aa90 T sdmmc_del_task +ffffffff8285ab50 T sdmmc_card_detach +ffffffff8285ac60 T sdmmc_add_task +ffffffff8285acf0 T sdmmc_card_attach +ffffffff8285ae60 T sdmmc_enable +ffffffff8285aff0 T sdmmc_scan +ffffffff8285b090 T sdmmc_init +ffffffff8285b1c0 T sdmmc_disable +ffffffff8285b350 T sdmmc_function_free +ffffffff8285b370 T sdmmc_delay +ffffffff8285b3c0 T sdmmc_select_card +ffffffff8285b600 T sdmmc_set_bus_power +ffffffff8285b7c0 T sdmmc_function_alloc +ffffffff8285b860 T sdmmc_app_command +ffffffff8285ba20 T sdmmc_mmc_command +ffffffff8285bab0 T sdmmc_go_idle_state +ffffffff8285bbe0 T sdmmc_send_if_cond +ffffffff8285bd50 T sdmmc_set_relative_addr +ffffffff8285c000 T sdmmc_cisptr +ffffffff8285c0d0 T sdmmc_read_cis +ffffffff8285c4b0 T sdmmc_print_cis +ffffffff8285c6a0 T sdmmc_check_cis_quirks +ffffffff8285d000 T sdmmc_io_enable +ffffffff8285d2f0 T sdmmc_io_reset +ffffffff8285d450 T sdmmc_io_send_op_cond +ffffffff8285d5e0 T sdmmc_io_scan +ffffffff8285d760 T sdmmc_io_init +ffffffff8285d8d0 T sdmmc_io_set_highspeed +ffffffff8285dbd0 T sdmmc_io_set_bus_width +ffffffff8285dec0 T sdmmc_io_function_ready +ffffffff8285e070 T sdmmc_io_read_1 +ffffffff8285e1f0 T sdmmc_io_function_enable +ffffffff8285e690 T sdmmc_io_write_1 +ffffffff8285e830 T sdmmc_io_function_disable +ffffffff8285eb10 T sdmmc_io_attach +ffffffff8285ec00 T sdmmc_print +ffffffff8285eec0 T sdmmc_submatch +ffffffff8285ef50 T sdmmc_io_detach +ffffffff8285f010 T sdmmc_io_rw_direct +ffffffff8285f1e0 T sdmmc_io_rw_extended_subr +ffffffff8285f390 T sdmmc_io_rw_extended +ffffffff8285f7d0 T sdmmc_io_read_2 +ffffffff8285f940 T sdmmc_io_write_2 +ffffffff8285fac0 T sdmmc_io_read_4 +ffffffff8285fc30 T sdmmc_io_write_4 +ffffffff8285fdb0 T sdmmc_io_read_multi_1 +ffffffff8285feb0 T sdmmc_io_write_multi_1 +ffffffff8285ffb0 T sdmmc_io_read_region_1 +ffffffff828600b0 T sdmmc_io_write_region_1 +ffffffff828601b0 T sdmmc_io_xchg +ffffffff82860370 T sdmmc_intr_enable +ffffffff82860650 T sdmmc_intr_disable +ffffffff82860930 T sdmmc_intr_establish +ffffffff82860a50 T sdmmc_intr_disestablish +ffffffff82860b50 T sdmmc_card_intr +ffffffff82860ba0 T sdmmc_intr_task +ffffffff82860c60 T sdmmc_io_set_blocklen +ffffffff82861000 T sdmmc_mem_enable +ffffffff828614d0 T sdmmc_mem_send_op_cond +ffffffff828616b0 T sdmmc_mem_signal_voltage +ffffffff828617b0 T sdmmc_mem_scan +ffffffff82861b00 T sdmmc_decode_csd +ffffffff82861f50 T sdmmc_decode_cid +ffffffff82862400 T sdmmc_mem_send_scr +ffffffff82862560 T sdmmc_mem_decode_scr +ffffffff828625c0 T sdmmc_mem_send_cxd_data +ffffffff82862740 T sdmmc_mem_set_bus_width +ffffffff82862870 T sdmmc_mem_sd_switch +ffffffff82862b30 T sdmmc_be512_to_bitfield512 +ffffffff82862be0 T sdmmc_mem_mmc_switch +ffffffff82862cd0 T sdmmc_mem_init +ffffffff82862e60 T sdmmc_mem_set_blocklen +ffffffff82862f70 T sdmmc_mem_sd_init +ffffffff828633e0 T sdmmc_mem_mmc_init +ffffffff82863b60 T sdmmc_mem_select_transfer_mode +ffffffff82863be0 T sdmmc_mem_execute_tuning +ffffffff82863c70 T sdmmc_mem_read_block_subr +ffffffff82864000 T sdmmc_mem_single_read_block +ffffffff828640d0 T sdmmc_mem_read_block +ffffffff828642e0 T sdmmc_mem_write_block_subr +ffffffff82864660 T sdmmc_mem_single_write_block +ffffffff82864730 T sdmmc_mem_write_block +ffffffff82864940 T sdmmc_mem_hibernate_write +ffffffff82865000 T sdmmc_scsi_cmd +ffffffff82865200 T sdmmc_minphys +ffffffff82865280 T sdmmc_scsi_attach +ffffffff828654c0 T sdmmc_alloc_ccbs +ffffffff82865620 T sdmmc_free_ccbs +ffffffff82865680 T sdmmc_scsi_detach +ffffffff82865840 T sdmmc_stimeout +ffffffff828658e0 T sdmmc_ccb_alloc +ffffffff828659a0 T sdmmc_ccb_free +ffffffff82865aa0 T sdmmc_inquiry +ffffffff82865d30 T sdmmc_start_xs +ffffffff82865e50 T sdmmc_complete_xs +ffffffff82865f40 T sdmmc_done_xs +ffffffff82865f90 T sdmmc_scsi_hibernate_io +ffffffff82867000 T bwfm_sdio_preinit +ffffffff828675a0 T bwfm_sdio_txcheck +ffffffff828675e0 T bwfm_sdio_txdata +ffffffff82867660 T bwfm_sdio_txctl +ffffffff828677f0 T bwfm_sdio_buscore_read +ffffffff82867800 T bwfm_sdio_buscore_write +ffffffff82867820 T bwfm_sdio_buscore_prepare +ffffffff828679a0 T bwfm_sdio_buscore_activate +ffffffff82867a30 T bwfm_sdio_match +ffffffff82867ae0 T bwfm_sdio_attach +ffffffff82867e80 T bwfm_sdio_detach +ffffffff82867f00 T bwfm_sdio_task +ffffffff828680c0 T bwfm_sdio_write_1 +ffffffff828680f0 T bwfm_sdio_read_1 +ffffffff82868120 T bwfm_sdio_write_4 +ffffffff828681f0 T bwfm_sdio_read_4 +ffffffff828682b0 T bwfm_sdio_load_microcode +ffffffff828685a0 T bwfm_sdio_clkctl +ffffffff828686d0 T bwfm_sdio_dev_write +ffffffff82868720 T bwfm_sdio_intr +ffffffff82868770 T bwfm_sdio_ram_read_write +ffffffff828689f0 T bwfm_sdio_htclk +ffffffff82868cb0 T bwfm_sdio_readshared +ffffffff82868da0 T bwfm_sdio_dev_read +ffffffff82868de0 T bwfm_sdio_rx_frames +ffffffff82869210 T bwfm_sdio_tx_frames +ffffffff82869330 T bwfm_sdio_backplane +ffffffff82869400 T bwfm_sdio_buf_read +ffffffff82869500 T bwfm_sdio_buf_write +ffffffff828695d0 T bwfm_sdio_frame_read_write +ffffffff82869780 T bwfm_sdio_newbuf +ffffffff82869810 T bwfm_sdio_tx_ok +ffffffff82869870 T bwfm_sdio_tx_ctrlframe +ffffffff82869980 T bwfm_sdio_tx_dataframe +ffffffff82869af0 T bwfm_sdio_rx_glom +ffffffff8286a000 T onewire_match +ffffffff8286a060 T onewire_attach +ffffffff8286a120 T onewire_detach +ffffffff8286a190 T onewire_activate +ffffffff8286a1b0 T onewire_scan +ffffffff8286a400 T onewire_createthread +ffffffff8286a470 T onewire_print +ffffffff8286a560 T onewirebus_print +ffffffff8286a5b0 T onewire_lock +ffffffff8286a5d0 T onewire_unlock +ffffffff8286a5f0 T onewire_reset +ffffffff8286a610 T onewire_bit +ffffffff8286a630 T onewire_read_byte +ffffffff8286a7c0 T onewire_write_byte +ffffffff8286a8d0 T onewire_read_block +ffffffff8286a970 T onewire_write_block +ffffffff8286aa10 T onewire_triplet +ffffffff8286ab20 T onewire_matchrom +ffffffff8286ad10 T onewire_search +ffffffff8286b180 T onewire_thread +ffffffff8286c000 T onewire_crc +ffffffff8286c0b0 T onewire_crc16 +ffffffff8286c170 T onewire_famname +ffffffff8286c1b0 T onewire_matchbyfam +ffffffff8286d000 T owid_match +ffffffff8286d030 T owid_attach +ffffffff8286d120 T owid_detach +ffffffff8286d170 T owid_activate +ffffffff8286e000 T owsbm_match +ffffffff8286e030 T owsbm_attach +ffffffff8286e240 T owsbm_detach +ffffffff8286e2d0 T owsbm_activate +ffffffff8286e300 T owsbm_update +ffffffff8286f000 T owtemp_match +ffffffff8286f030 T owtemp_attach +ffffffff8286f160 T owtemp_detach +ffffffff8286f1f0 T owtemp_activate +ffffffff8286f220 T owtemp_update +ffffffff82870000 T owctr_match +ffffffff82870030 T owctr_attach +ffffffff828701c0 T owctr_detach +ffffffff82870250 T owctr_activate +ffffffff82870280 T owctr_update +ffffffff828702c0 T owctr_update_counter +ffffffff82871000 A __text_page_start +ffffffff82871000 T Xsyscall_meltdown +ffffffff8287100c T Xsyscall +ffffffff82871299 t Xsyscall_trampback +ffffffff828712b0 T intr_user_exit +ffffffff828712f2 t intr_user_exit_post_ast +ffffffff8287144b t Xiretq_trampback +ffffffff82871457 T doreti_iret +ffffffff82872000 T alltraps +ffffffff82872138 T recall_trap +ffffffff82872150 T alltraps_kern +ffffffff82872153 T alltraps_kern_meltdown +ffffffff82873000 ? Xtrap00 +ffffffff82873000 A __kutext_start +ffffffff82873000 A __text_page_end +ffffffff82873010 ? Xtrap01 +ffffffff82873020 ? Xtrap02 +ffffffff82873028 c calltrap_specstk +ffffffff828730f0 ? calltrap_specstk_tramp +ffffffff82873110 ? Xtrap03 +ffffffff82873120 ? Xtrap04 +ffffffff82873130 ? Xtrap05 +ffffffff82873140 ? Xtrap06 +ffffffff82873150 ? Xtrap07 +ffffffff82873160 ? Xtrap08 +ffffffff82873170 ? Xtrap09 +ffffffff82873180 ? Xtrap0a +ffffffff82873190 ? Xtrap0b +ffffffff828731a0 ? Xtrap0c +ffffffff828731b0 ? Xtrap0d +ffffffff82873240 ? Xtrap0e +ffffffff82873250 ? Xintrspurious +ffffffff82873250 ? Xtrap0f +ffffffff82873260 ? Xtrap10 +ffffffff82873270 ? Xtrap11 +ffffffff82873280 ? Xtrap12 +ffffffff82873290 ? Xtrap13 +ffffffff828732a0 ? Xtrap14 +ffffffff828732b0 ? Xtrap15 +ffffffff828732c0 ? Xtrap16 +ffffffff828732c0 ? Xtrap17 +ffffffff828732c0 ? Xtrap18 +ffffffff828732c0 ? Xtrap19 +ffffffff828732c0 ? Xtrap1a +ffffffff828732c0 ? Xtrap1b +ffffffff828732c0 ? Xtrap1c +ffffffff828732c0 ? Xtrap1d +ffffffff828732c0 ? Xtrap1e +ffffffff828732c0 ? Xtrap1f +ffffffff828732d0 ? x2apic_eoi +ffffffff828732f0 ? Xintr_lapic_ipi +ffffffff82873330 ? Xipi_invltlb +ffffffff82873360 ? Xipi_invept +ffffffff828733a0 ? Xipi_invlpg +ffffffff828733d0 ? Xipi_invlrange +ffffffff82873410 ? Xipi_invltlb_pcid +ffffffff82873450 ? Xipi_invlpg_pcid +ffffffff828734a0 ? Xipi_invlrange_pcid +ffffffff82873510 ? Xipi_wbinvd +ffffffff82873530 ? Xintr_lapic_ltimer +ffffffff82873570 ? Xintr_xen_upcall +ffffffff828735b0 ? Xintr_hyperv_upcall +ffffffff828735f0 ? Xintr_legacy0 +ffffffff82873630 ? Xintr_legacy1 +ffffffff82873670 ? Xintr_legacy2 +ffffffff828736b0 ? Xintr_legacy3 +ffffffff828736f0 ? Xintr_legacy4 +ffffffff82873730 ? Xintr_legacy5 +ffffffff82873770 ? Xintr_legacy6 +ffffffff828737b0 ? Xintr_legacy7 +ffffffff828737f0 ? Xintr_legacy8 +ffffffff82873830 ? Xintr_legacy9 +ffffffff82873870 ? Xintr_legacy10 +ffffffff828738b0 ? Xintr_legacy11 +ffffffff828738f0 ? Xintr_legacy12 +ffffffff82873930 ? Xintr_legacy13 +ffffffff82873970 ? Xintr_legacy14 +ffffffff828739b0 ? Xintr_legacy15 +ffffffff828739f0 ? Xintr_ioapic_edge0 +ffffffff82873a30 ? Xintr_ioapic_edge1 +ffffffff82873a70 ? Xintr_ioapic_edge2 +ffffffff82873ab0 ? Xintr_ioapic_edge3 +ffffffff82873af0 ? Xintr_ioapic_edge4 +ffffffff82873b30 ? Xintr_ioapic_edge5 +ffffffff82873b70 ? Xintr_ioapic_edge6 +ffffffff82873bb0 ? Xintr_ioapic_edge7 +ffffffff82873bf0 ? Xintr_ioapic_edge8 +ffffffff82873c30 ? Xintr_ioapic_edge9 +ffffffff82873c70 ? Xintr_ioapic_edge10 +ffffffff82873cb0 ? Xintr_ioapic_edge11 +ffffffff82873cf0 ? Xintr_ioapic_edge12 +ffffffff82873d30 ? Xintr_ioapic_edge13 +ffffffff82873d70 ? Xintr_ioapic_edge14 +ffffffff82873db0 ? Xintr_ioapic_edge15 +ffffffff82873df0 ? Xintr_ioapic_edge16 +ffffffff82873e30 ? Xintr_ioapic_edge17 +ffffffff82873e70 ? Xintr_ioapic_edge18 +ffffffff82873eb0 ? Xintr_ioapic_edge19 +ffffffff82873ef0 ? Xintr_ioapic_edge20 +ffffffff82873f30 ? Xintr_ioapic_edge21 +ffffffff82873f70 ? Xintr_ioapic_edge22 +ffffffff82873fb0 ? Xintr_ioapic_edge23 +ffffffff82873ff0 ? Xintr_ioapic_edge24 +ffffffff82874030 ? Xintr_ioapic_edge25 +ffffffff82874070 ? Xintr_ioapic_edge26 +ffffffff828740b0 ? Xintr_ioapic_edge27 +ffffffff828740f0 ? Xintr_ioapic_edge28 +ffffffff82874130 ? Xintr_ioapic_edge29 +ffffffff82874170 ? Xintr_ioapic_edge30 +ffffffff828741b0 ? Xintr_ioapic_edge31 +ffffffff828741f0 ? Xintr_ioapic_edge32 +ffffffff82874230 ? Xintr_ioapic_edge33 +ffffffff82874270 ? Xintr_ioapic_edge34 +ffffffff828742b0 ? Xintr_ioapic_edge35 +ffffffff828742f0 ? Xintr_ioapic_edge36 +ffffffff82874330 ? Xintr_ioapic_edge37 +ffffffff82874370 ? Xintr_ioapic_edge38 +ffffffff828743b0 ? Xintr_ioapic_edge39 +ffffffff828743f0 ? Xintr_ioapic_edge40 +ffffffff82874430 ? Xintr_ioapic_edge41 +ffffffff82874470 ? Xintr_ioapic_edge42 +ffffffff828744b0 ? Xintr_ioapic_edge43 +ffffffff828744f0 ? Xintr_ioapic_edge44 +ffffffff82874530 ? Xintr_ioapic_edge45 +ffffffff82874570 ? Xintr_ioapic_edge46 +ffffffff828745b0 ? Xintr_ioapic_edge47 +ffffffff828745f0 ? Xintr_ioapic_edge48 +ffffffff82874630 ? Xintr_ioapic_edge49 +ffffffff82874670 ? Xintr_ioapic_edge50 +ffffffff828746b0 ? Xintr_ioapic_edge51 +ffffffff828746f0 ? Xintr_ioapic_edge52 +ffffffff82874730 ? Xintr_ioapic_edge53 +ffffffff82874770 ? Xintr_ioapic_edge54 +ffffffff828747b0 ? Xintr_ioapic_edge55 +ffffffff828747f0 ? Xintr_ioapic_edge56 +ffffffff82874830 ? Xintr_ioapic_edge57 +ffffffff82874870 ? Xintr_ioapic_edge58 +ffffffff828748b0 ? Xintr_ioapic_edge59 +ffffffff828748f0 ? Xintr_ioapic_edge60 +ffffffff82874930 ? Xintr_ioapic_edge61 +ffffffff82874970 ? Xintr_ioapic_edge62 +ffffffff828749b0 ? Xintr_ioapic_edge63 +ffffffff828749f0 ? Xintr_ioapic_level0 +ffffffff82874a30 ? Xintr_ioapic_level1 +ffffffff82874a70 ? Xintr_ioapic_level2 +ffffffff82874ab0 ? Xintr_ioapic_level3 +ffffffff82874af0 ? Xintr_ioapic_level4 +ffffffff82874b30 ? Xintr_ioapic_level5 +ffffffff82874b70 ? Xintr_ioapic_level6 +ffffffff82874bb0 ? Xintr_ioapic_level7 +ffffffff82874bf0 ? Xintr_ioapic_level8 +ffffffff82874c30 ? Xintr_ioapic_level9 +ffffffff82874c70 ? Xintr_ioapic_level10 +ffffffff82874cb0 ? Xintr_ioapic_level11 +ffffffff82874cf0 ? Xintr_ioapic_level12 +ffffffff82874d30 ? Xintr_ioapic_level13 +ffffffff82874d70 ? Xintr_ioapic_level14 +ffffffff82874db0 ? Xintr_ioapic_level15 +ffffffff82874df0 ? Xintr_ioapic_level16 +ffffffff82874e30 ? Xintr_ioapic_level17 +ffffffff82874e70 ? Xintr_ioapic_level18 +ffffffff82874eb0 ? Xintr_ioapic_level19 +ffffffff82874ef0 ? Xintr_ioapic_level20 +ffffffff82874f30 ? Xintr_ioapic_level21 +ffffffff82874f70 ? Xintr_ioapic_level22 +ffffffff82874fb0 ? Xintr_ioapic_level23 +ffffffff82874ff0 ? Xintr_ioapic_level24 +ffffffff82875030 ? Xintr_ioapic_level25 +ffffffff82875070 ? Xintr_ioapic_level26 +ffffffff828750b0 ? Xintr_ioapic_level27 +ffffffff828750f0 ? Xintr_ioapic_level28 +ffffffff82875130 ? Xintr_ioapic_level29 +ffffffff82875170 ? Xintr_ioapic_level30 +ffffffff828751b0 ? Xintr_ioapic_level31 +ffffffff828751f0 ? Xintr_ioapic_level32 +ffffffff82875230 ? Xintr_ioapic_level33 +ffffffff82875270 ? Xintr_ioapic_level34 +ffffffff828752b0 ? Xintr_ioapic_level35 +ffffffff828752f0 ? Xintr_ioapic_level36 +ffffffff82875330 ? Xintr_ioapic_level37 +ffffffff82875370 ? Xintr_ioapic_level38 +ffffffff828753b0 ? Xintr_ioapic_level39 +ffffffff828753f0 ? Xintr_ioapic_level40 +ffffffff82875430 ? Xintr_ioapic_level41 +ffffffff82875470 ? Xintr_ioapic_level42 +ffffffff828754b0 ? Xintr_ioapic_level43 +ffffffff828754f0 ? Xintr_ioapic_level44 +ffffffff82875530 ? Xintr_ioapic_level45 +ffffffff82875570 ? Xintr_ioapic_level46 +ffffffff828755b0 ? Xintr_ioapic_level47 +ffffffff828755f0 ? Xintr_ioapic_level48 +ffffffff82875630 ? Xintr_ioapic_level49 +ffffffff82875670 ? Xintr_ioapic_level50 +ffffffff828756b0 ? Xintr_ioapic_level51 +ffffffff828756f0 ? Xintr_ioapic_level52 +ffffffff82875730 ? Xintr_ioapic_level53 +ffffffff82875770 ? Xintr_ioapic_level54 +ffffffff828757b0 ? Xintr_ioapic_level55 +ffffffff828757f0 ? Xintr_ioapic_level56 +ffffffff82875830 ? Xintr_ioapic_level57 +ffffffff82875870 ? Xintr_ioapic_level58 +ffffffff828758b0 ? Xintr_ioapic_level59 +ffffffff828758f0 ? Xintr_ioapic_level60 +ffffffff82875930 ? Xintr_ioapic_level61 +ffffffff82875970 ? Xintr_ioapic_level62 +ffffffff828759b0 ? Xintr_ioapic_level63 +ffffffff82876000 ? codepatch_fill_nop +ffffffff82876000 A __cptext_start +ffffffff82876000 A __kutext_end +ffffffff828760b0 ? codepatch_maprw +ffffffff828761c0 ? codepatch_unmaprw +ffffffff82876230 ? codepatch_nop +ffffffff828763b0 ? codepatch_replace +ffffffff82876580 ? codepatch_call +ffffffff828765a0 ? codepatch_control_flow +ffffffff828767c0 ? codepatch_jmp +ffffffff82877000 A __cptext_end +ffffffff82877000 A __rodata_start +ffffffff82877000 C _etext +ffffffff82877000 C etext +ffffffff82878000 r seeprom_read +ffffffff82878004 r icl_mg_pll_find_divisors.div1_vals +ffffffff82878034 r athn_ac2qid +ffffffff82878034 r athn_ac2qid +ffffffff82878034 r athn_ac2qid +ffffffff82878040 r rtwn_get_rssi.cckoff +ffffffff82878068 r rsu_ac2qid +ffffffff82878078 r pckbc_portcmd +ffffffff8287807c r tht_fifo_write_pad.pad +ffffffff82878084 r rsu_get_rssi.cckoff +ffffffff828780a4 r adlp_n_revids +ffffffff828780e8 r apple_iso_trans +ffffffff828780f0 r wihap_check_tx.txratetable +ffffffff828780f4 r dmamode +ffffffff82878118 r gen9_edram_size_mb.sets +ffffffff8287812c r dg2_g12_revid_step_tbl +ffffffff82879000 r isomappings +ffffffff82879080 r unimappings +ffffffff82879230 r replacements +ffffffff8287cada r apollo_pio_rec +ffffffff828cb669 r apollo_udma33_tim +ffffffff828e136e r pp_r600_decoded_lanes +ffffffff82918e91 r cmd680_setup_channel.udma_tbl +ffffffff829215d3 r apollo_udma100_tim +ffffffff829215d9 r cmd0646_9_tim_udma +ffffffff829302eb r substchar +ffffffff82988c20 r apollo_udma133_tim +ffffffff82988c27 r apollo_udma66_tim +ffffffff82988c51 r cy_pio_rec +ffffffff8298e5f0 R drm_ca +ffffffff8298e618 R drm_filtops +ffffffff8298e648 R drmread_filtops +ffffffff8298f000 r vga_emulops +ffffffff8298f048 R vga_stdscreen +ffffffff8298f078 R vga_stdscreen_mono +ffffffff8298f0a8 R vga_stdscreen_bf +ffffffff8298f0d8 R vga_40lscreen +ffffffff8298f108 R vga_40lscreen_mono +ffffffff8298f138 R vga_40lscreen_bf +ffffffff8298f168 R vga_50lscreen +ffffffff8298f198 R vga_50lscreen_mono +ffffffff8298f1c8 R vga_50lscreen_bf +ffffffff8298f1f8 R vga_screenlist +ffffffff8298f208 R vga_screenlist_mono +ffffffff8298f218 R vga_accessops +ffffffff8298f278 r i945_wm_info +ffffffff8298f2b8 r bgansitopc +ffffffff8298f2c0 r pctoansi +ffffffff8298f300 r sdma_offsets +ffffffff8298f300 r sdma_offsets +ffffffff8298f338 r iha_rate_tbl +ffffffff8298f370 r i830_a_wm_info +ffffffff8298f3a8 r gen9_edram_size_mb.ways +ffffffff8298f408 r aggr_periodic_times +ffffffff8298f508 r michael_final.pad +ffffffff8298f530 r rt_copysa.maskarray +ffffffff8298f538 r i915_wm_info +ffffffff8298f540 r amdgpu_ih_clientid_jpeg +ffffffff8298f540 r amdgpu_ih_clientid_uvds +ffffffff8298f540 r amdgpu_ih_clientid_vcns +ffffffff8298f540 r amdgpu_ih_clientid_vcns +ffffffff8298f540 r amdgpu_ih_clientid_vcns +ffffffff8298f570 r jsl_ehl_revids +ffffffff8298f580 r vga_setfontset.cmaptabb +ffffffff8298f5f0 r i830_bc_wm_info +ffffffff8298f658 r hsw_activate_psr2.map +ffffffff8298f660 r tgl_revids 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w83627ehf_sensors +ffffffff829f65c0 R w83627dhg_sensors +ffffffff829f67c0 R nct6776f_sensors +ffffffff829f6a00 R nct6779d_sensors +ffffffff829f6d60 R w83637hf_sensors +ffffffff829f6f20 R w83697hf_sensors +ffffffff829f70c0 R w83781d_sensors +ffffffff829f7280 R w83782d_sensors +ffffffff829f7480 R w83783s_sensors +ffffffff829f7600 R w83791d_sensors +ffffffff829f7860 R w83792d_sensors +ffffffff829f7ae0 R as99127f_sensors +ffffffff829f8000 r ar5k_known_products +ffffffff829f8110 r ar5111_gain_opt +ffffffff829f81e0 r ar5112_gain_opt +ffffffff829f82b0 r ar5k_5ghz_channels +ffffffff829f8a00 r ar5k_2ghz_channels +ffffffff829f8f10 r ar5111_rf +ffffffff829f9350 r ar5112a_rf +ffffffff829f9890 r ar5112_rf +ffffffff829f9da0 r ar5413_rf +ffffffff829fa1b0 r ar2413_rf +ffffffff829fa4d0 r ar2425_rf +ffffffff829fa830 r ar5111_rfg +ffffffff829fab30 r ar5112_rfg +ffffffff829fae30 r ar5413_rfg +ffffffff829fb130 r ar2413_rfg +ffffffff829fb430 r ar5k_rt_11a +ffffffff829fb552 r ar5k_rt_11b +ffffffff829fb674 r ar5k_rt_11g +ffffffff829fb796 r ar5k_rt_xr +ffffffff829fc000 r ar5210_ini +ffffffff829fd000 r ar5211_mode +ffffffff829fd2c0 r ar5211_ini +ffffffff829fdad0 r ar5211_rf +ffffffff829fe000 r ar5212_pcie +ffffffff829fe080 r ar5212_mode +ffffffff829fe310 r ar5212_ini +ffffffff829fec80 r ar5212_ar5111_mode +ffffffff829fef20 r ar5212_ar5112_mode +ffffffff829ff1b0 r ar5413_mode +ffffffff829ffb10 r ar2413_mode +ffffffff82a00430 r ar2425_mode +ffffffff82a00d90 r ar5111_bbgain +ffffffff82a01090 r ar5112_bbgain +ffffffff82a02000 r athn_5ghz_chans +ffffffff82a02020 r athn_rates +ffffffff82a03000 r athn_rates +ffffffff82a04000 r ar9160_ini +ffffffff82a04068 r ar5416_ini +ffffffff82a040d0 r ar5416_serdes +ffffffff82a040e8 r ar9160_1_1_addac +ffffffff82a040f8 r ar9160_1_0_addac +ffffffff82a04108 r ar5416_2_2_addac +ffffffff82a04118 r ar5416_2_1_addac +ffffffff82a04128 r ar5416_set_power_calib.chainoffset +ffffffff82a04140 r ar9160_bank6tpc_vals +ffffffff82a041c0 r ar5416_bank6tpc_vals +ffffffff82a04240 r ar5416_bb_rfgain_vals_2g +ffffffff82a04340 r ar5416_bb_rfgain_vals_5g +ffffffff82a04440 r ar5416_bank6_vals +ffffffff82a044c0 r ar9160_regs +ffffffff82a04540 r ar9160_vals_5g20 +ffffffff82a04640 r ar9160_vals_5g40 +ffffffff82a04740 r ar9160_vals_2g40 +ffffffff82a04840 r ar9160_vals_2g20 +ffffffff82a04940 r ar9160_cm_regs +ffffffff82a04c30 r ar9160_cm_vals +ffffffff82a05210 r ar5416_regs +ffffffff82a05290 r ar5416_vals_5g20 +ffffffff82a05390 r ar5416_vals_5g40 +ffffffff82a05490 r ar5416_vals_2g40 +ffffffff82a05590 r ar5416_vals_2g20 +ffffffff82a05690 r ar5416_cm_regs +ffffffff82a05980 r ar5416_cm_vals +ffffffff82a05f60 r ar5416_serdes_regs +ffffffff82a05f90 r ar5416_serdes_vals +ffffffff82a05fc0 r ar9160_1_1_addac_vals +ffffffff82a06040 r ar9160_1_0_addac_vals +ffffffff82a060c0 r ar5416_2_2_addac_vals +ffffffff82a06150 r ar5416_2_1_addac_vals +ffffffff82a07000 r ar9280_2_0_ini +ffffffff82a07068 r ar9280_2_0_serdes +ffffffff82a07080 r ar9280_2_0_rx_gain_23db_backoff +ffffffff82a070a0 r ar9280_2_0_rx_gain_13db_backoff +ffffffff82a070c0 r ar9280_2_0_rx_gain +ffffffff82a070e0 r ar9280_2_0_tx_gain_high_power +ffffffff82a07100 r ar9280_2_0_tx_gain +ffffffff82a07120 r ar9280_init_from_rom.chainoffset +ffffffff82a07130 r ar9280_2_0_regs +ffffffff82a07190 r ar9280_2_0_vals_5g20 +ffffffff82a07250 r ar9280_2_0_vals_5g40 +ffffffff82a07310 r ar9280_2_0_vals_2g40 +ffffffff82a073d0 r ar9280_2_0_vals_2g20 +ffffffff82a07490 r ar9280_2_0_cm_regs +ffffffff82a07740 r ar9280_2_0_cm_vals +ffffffff82a07c90 r ar9280_2_0_fast_clock_regs +ffffffff82a07cb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff82a07cf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff82a07d30 r ar9280_2_0_serdes_regs +ffffffff82a07d60 r ar9280_2_0_serdes_vals +ffffffff82a07d90 r ar9280_2_0_rx_gain_regs +ffffffff82a07ea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff82a080b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff82a082c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff82a084d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff82a086e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff82a088f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff82a08b00 r ar9280_2_0_tx_gain_regs +ffffffff82a08b40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff82a08bc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff82a08c40 r ar9280_2_0_tx_gain_vals_5g +ffffffff82a08cc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff82a09000 r ar9271_ini +ffffffff82a09068 r ar9285_1_2_ini +ffffffff82a090d0 r ar9280_2_0_serdes +ffffffff82a090e8 r ar9271_tx_gain_high_power +ffffffff82a09108 r ar9271_tx_gain +ffffffff82a09128 r ar9285_2_0_tx_gain_high_power +ffffffff82a09148 r ar9285_2_0_tx_gain +ffffffff82a09168 r ar9285_1_2_tx_gain_high_power +ffffffff82a09188 r ar9285_1_2_tx_gain +ffffffff82a091b0 r ar9271_regs +ffffffff82a09410 r ar9271_vals_2g40 +ffffffff82a098d0 r ar9271_vals_2g20 +ffffffff82a09d90 r ar9271_cm_regs +ffffffff82a0a020 r ar9271_cm_vals +ffffffff82a0a540 r ar9285_1_2_regs +ffffffff82a0a7a0 r ar9285_1_2_vals_2g40 +ffffffff82a0ac60 r ar9285_1_2_vals_2g20 +ffffffff82a0b120 r ar9285_1_2_cm_regs +ffffffff82a0b3a0 r ar9285_1_2_cm_vals +ffffffff82a0b890 r ar9280_2_0_serdes_regs +ffffffff82a0b8c0 r ar9280_2_0_serdes_vals +ffffffff82a0b8f0 r ar9271_tx_gain_regs +ffffffff82a0b940 r ar9271_tx_gain_high_power_vals_2g +ffffffff82a0b9d0 r ar9271_tx_gain_vals_2g +ffffffff82a0ba60 r ar9285_1_2_tx_gain_regs +ffffffff82a0bab0 r ar9285_2_0_tx_gain_high_power_vals_2g +ffffffff82a0bb50 r ar9285_2_0_tx_gain_vals_2g +ffffffff82a0bbf0 r ar9285_1_2_tx_gain_high_power_vals_2g +ffffffff82a0bc90 r ar9285_1_2_tx_gain_vals_2g +ffffffff82a0c000 r ar9287_1_1_ini +ffffffff82a0c068 r ar9280_2_0_serdes +ffffffff82a0c080 r ar9287_1_1_rx_gain +ffffffff82a0c0a0 r ar9287_1_1_tx_gain +ffffffff82a0c0c0 r ar9287_1_1_regs +ffffffff82a0c120 r ar9287_1_1_vals_2g40 +ffffffff82a0c1d0 r ar9287_1_1_vals_2g20 +ffffffff82a0c280 r ar9287_1_1_cm_regs +ffffffff82a0c560 r ar9287_1_1_cm_vals +ffffffff82a0cb20 r ar9280_2_0_serdes_regs +ffffffff82a0cb50 r ar9280_2_0_serdes_vals +ffffffff82a0cb80 r ar9287_1_1_rx_gain_regs +ffffffff82a0cd90 r ar9287_1_1_rx_gain_vals_2g +ffffffff82a0d1a0 r ar9287_1_1_tx_gain_regs +ffffffff82a0d200 r ar9287_1_1_tx_gain_vals_2g +ffffffff82a0e000 r athn_rates +ffffffff82a0f000 r ar9485_1_1_ini +ffffffff82a0f068 r ar9485_1_1_serdes +ffffffff82a0f080 r ar9380_2_2_ini +ffffffff82a0f0e8 r ar9380_2_2_serdes +ffffffff82a0f100 r ar9380_2_2_rx_gain_wo_xlna +ffffffff82a0f120 r ar9380_2_2_rx_gain +ffffffff82a0f140 r ar9485_1_1_rx_gain +ffffffff82a0f160 r ar9380_2_2_tx_gain_high_ob_db +ffffffff82a0f180 r ar9380_2_2_tx_gain_low_ob_db +ffffffff82a0f1a0 r ar9380_2_2_tx_gain_high_power +ffffffff82a0f1c0 r ar9380_2_2_tx_gain +ffffffff82a0f1e0 r ar9485_1_1_tx_gain +ffffffff82a0f200 r ar9485_1_1_regs +ffffffff82a0f270 r ar9485_1_1_vals_2g40 +ffffffff82a0f350 r ar9485_1_1_vals_2g20 +ffffffff82a0f430 r ar9485_1_1_cm_regs +ffffffff82a0f720 r ar9485_1_1_cm_vals +ffffffff82a0fd00 r ar9485_1_1_serdes_regs +ffffffff82a0fd0c r ar9485_1_1_serdes_vals +ffffffff82a0fd20 r ar9380_2_2_regs +ffffffff82a0fdb0 r ar9380_2_2_vals_5g20 +ffffffff82a0fed0 r ar9380_2_2_vals_5g40 +ffffffff82a0fff0 r ar9380_2_2_vals_2g40 +ffffffff82a10110 r ar9380_2_2_vals_2g20 +ffffffff82a10230 r ar9380_2_2_cm_regs +ffffffff82a105d0 r ar9380_2_2_cm_vals +ffffffff82a10d00 r ar9380_2_2_fast_clock_regs +ffffffff82a10d20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff82a10d50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff82a10d74 r ar9380_2_2_serdes_regs +ffffffff82a10d80 r ar9380_2_2_serdes_vals +ffffffff82a10d90 r ar9380_2_2_rx_gain_regs +ffffffff82a10f90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff82a11390 r ar9380_2_2_rx_gain_vals +ffffffff82a11790 r ar9485_1_1_rx_gain_regs +ffffffff82a11890 r ar9485_1_1_rx_gain_vals +ffffffff82a11a90 r ar9380_2_2_tx_gain_regs +ffffffff82a11b60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff82a11d00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff82a11ea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff82a12040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff82a121e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff82a12380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff82a12520 r ar9380_2_2_tx_gain_vals_5g +ffffffff82a126c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff82a12860 r ar9485_1_1_tx_gain_regs +ffffffff82a128f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff82a12a10 r ar9380_def_rom +ffffffff82a12e50 r ar9380_def_rom_h112 +ffffffff82a13290 r ar9380_def_rom_h116 +ffffffff82a136d0 r ar9380_def_rom_x112 +ffffffff82a13b10 r ar9380_def_rom_x113 +ffffffff82a14000 R atw_txthresh_tab_lo +ffffffff82a14050 R atw_txthresh_tab_hi +ffffffff82a140a0 r atw_attach.empty_macaddr +ffffffff82a140b0 r atw_attach.type_strings +ffffffff82a140d0 r atw_rfmd2958_ifn +ffffffff82a14110 r atw_rfmd2958_rf1r +ffffffff82a14150 r atw_rxintr.rate_tbl +ffffffff82a15000 r rtw_identify_sta.empty_macaddr +ffffffff82a16000 r rtwn_set_key.etherzeroaddr +ffffffff82a16010 r rtl8188eu_rf_prog +ffffffff82a16030 r rtl8188ftv_rf_prog +ffffffff82a16050 r rtl8192e_rf_prog +ffffffff82a16080 r rtl8188ce_rf_prog +ffffffff82a160a0 r rtl8188ru_rf_prog +ffffffff82a160c0 r rtl8188cu_rf_prog +ffffffff82a160e0 r rtl8192ce_rf_prog +ffffffff82a16110 r rtl8188ru_txagc +ffffffff82a16170 r rtl8188eu_rf_regs +ffffffff82a16230 r rtl8188eu_rf_vals +ffffffff82a163b0 r rtl8188ftv_rf_regs +ffffffff82a16490 r rtl8188ftv_rf_vals +ffffffff82a16640 r rtl8192e_rf_regs +ffffffff82a16710 r rtl8192e_rf_vals +ffffffff82a168b0 r rtl8192e_rf2_regs +ffffffff82a16950 r rtl8192e_rf2_vals +ffffffff82a16a90 r rtl8192ce_rf1_regs +ffffffff82a16bb0 r rtl8188ce_rf_vals +ffffffff82a16df0 r rtl8188ru_rf_vals +ffffffff82a17030 r rtl8188cu_rf_vals +ffffffff82a17270 r rtl8192ce_rf1_vals +ffffffff82a174b0 r rtl8192ce_rf2_regs +ffffffff82a17500 r rtl8192ce_rf2_vals +ffffffff82a175a0 r rtl8192cu_txagc +ffffffff82a18000 r rt2560_rf2522_r2 +ffffffff82a18040 r rt2560_rf2524_r2 +ffffffff82a18080 r rt2560_rf2525_hi_r2 +ffffffff82a180c0 r rt2560_rf2525_r2 +ffffffff82a18100 r rt2560_rf2525e_r2 +ffffffff82a18140 r rt2560_rf2526_hi_r2 +ffffffff82a18180 r rt2560_rf2526_r2 +ffffffff82a181c0 r rt2560_def_bbp +ffffffff82a18200 r rt2560_def_mac +ffffffff82a19000 r rt2661_rf5225_1 +ffffffff82a19300 r rt2661_rf5225_2 +ffffffff82a19600 r rt2661_def_bbp +ffffffff82a19640 r rt2661_def_mac +ffffffff82a1a000 r rt2860_rf2850 +ffffffff82a1a430 r rt2860_rates +ffffffff82a1a4f0 r rt3572_def_rf +ffffffff82a1a530 r rt3090_def_rf +ffffffff82a1a560 r rt5392_def_rf +ffffffff82a1a5e0 r rt3290_def_rf +ffffffff82a1a640 r rt5390_def_rf +ffffffff82a1a6c0 r rt5390_def_bbp +ffffffff82a1a6f0 r rt2860_def_mac +ffffffff82a1c000 r acx111_reg +ffffffff82a1c040 r acx111_rate_map +ffffffff82a1d000 r acx100_reg +ffffffff82a1d040 r acx100_txpower_rfmd +ffffffff82a1d060 r gen8_rcs_offsets +ffffffff82a1d090 r acx100_txpower_maxim +ffffffff82a1d0b0 r mtl_rcs_offsets +ffffffff82a1d0f0 r digits +ffffffff82a1d0f0 r pppdumpb.digits +ffffffff82a1d0f0 r pppdumpm.digits +ffffffff82a1d140 r hangpic +ffffffff82a1d180 r gen11_rcs_offsets +ffffffff82a1d1b0 r xehp_rcs_offsets +ffffffff82a1d1e0 r dg2_rcs_offsets +ffffffff82a1d220 r dg2_xcs_offsets +ffffffff82a1d250 r gen12_xcs_offsets +ffffffff82a1e000 r trinity_override_mgpg_sequences +ffffffff82a1e3c0 r voltage_swing_to_pre_emphasis +ffffffff82a1e3d0 r sgpr_init_compute_shader +ffffffff82a1e4a0 r intel_hpll_vco.cl_vco +ffffffff82a1e4c0 r vgpr_init_compute_shader +ffffffff82a1f000 r malo_cmd_string.cmds +ffffffff82a1f0b0 r malo_cmd_string_result.results +ffffffff82a20000 R bwi_vendor_led_act +ffffffff82a2000c R bwi_default_led_act +ffffffff82a20010 R bwi_led_duration +ffffffff82a20380 r bwi_sup_bphy +ffffffff82a203c0 r bwi_phy_freq_11g_rev1 +ffffffff82a205c0 r bwi_phy_rotor_11g_rev1 +ffffffff82a206a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff82a206e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff82a20720 r bwi_phy_noise_scale_11g +ffffffff82a20760 r bwi_phy_sigma_sq_11g_rev2 +ffffffff82a207d0 r bwi_phy_sigma_sq_11g_rev7 +ffffffff82a20840 r bwi_phy_delay_11g_rev1 +ffffffff82a20920 r bwi_rf_get_gains.save_phy_regs +ffffffff82a20940 r bwi_rf_lo_find.map +ffffffff82a20960 r bwi_txpower_map_11b +ffffffff82a209a0 r bwi_txpower_map_11g +ffffffff82a209e0 r _bwi_rf_lo_update_11g.rf_atten_list +ffffffff82a20a20 r _bwi_rf_lo_update_11g.rf_atten_init_list +ffffffff82a20a60 r _bwi_rf_lo_update_11g.rf_lo_measure_order +ffffffff82a20aa0 r bwi_rf_set_nrssi_ofs_11g.save_phy_comm_regs +ffffffff82a20ac0 r bwi_bbpid_map +ffffffff82a20af0 r bwi_regwin_count +ffffffff82a20b40 r bwi_clkfreq +ffffffff82a20b58 r bwi_zero_addr +ffffffff82a21000 R ipq8074_ops +ffffffff82a21070 R ipq6018_ops +ffffffff82a210e0 R qca6390_ops +ffffffff82a21150 R qcn9074_ops +ffffffff82a211c0 R wcn6855_ops +ffffffff82a21230 R wcn6750_ops +ffffffff82a212a0 R ath11k_hw_ring_mask_ipq8074 +ffffffff82a212f8 R ath11k_hw_ring_mask_qca6390 +ffffffff82a21350 R ath11k_hw_ring_mask_qcn9074 +ffffffff82a213a8 R ath11k_hw_ring_mask_wcn6750 +ffffffff82a21400 R ath11k_target_ce_config_wlan_ipq8074 +ffffffff82a21510 R ath11k_target_service_to_ce_map_wlan_ipq8074 +ffffffff82a21620 R ath11k_target_service_to_ce_map_wlan_ipq6018 +ffffffff82a21710 R ath11k_target_ce_config_wlan_qca6390 +ffffffff82a217f0 R ath11k_target_service_to_ce_map_wlan_qca6390 +ffffffff82a218b0 R ath11k_target_ce_config_wlan_qcn9074 +ffffffff82a21990 R ath11k_target_service_to_ce_map_wlan_qcn9074 +ffffffff82a21a70 R qwx_host_ce_config_ipq8074 +ffffffff82a21d10 R qwx_host_ce_config_qca6390 +ffffffff82a21e30 R qwx_host_ce_config_qcn9074 +ffffffff82a21ef0 R ipq8074_regs +ffffffff82a21fc4 R qca6390_regs +ffffffff82a22098 R qcn9074_regs +ffffffff82a2216c R wcn6855_regs +ffffffff82a22240 R wcn6750_regs +ffffffff82a22320 R qmi_response_type_v01_ei +ffffffff82a22380 R qmi_wlanfw_ind_register_req_msg_v01_ei +ffffffff82a226a0 R qmi_wlanfw_ind_register_resp_msg_v01_ei +ffffffff82a22720 R qmi_wlanfw_host_cap_req_msg_v01_ei +ffffffff82a22aa0 R qmi_wlanfw_host_cap_resp_msg_v01_ei +ffffffff82a22ae0 R qmi_wlanfw_mem_cfg_s_v01_ei +ffffffff82a22b60 R qmi_wlanfw_mem_seg_s_v01_ei +ffffffff82a22c00 R qmi_wlanfw_request_mem_ind_msg_v01_ei +ffffffff82a22c60 R qmi_wlanfw_mem_seg_resp_s_v01_ei +ffffffff82a22d00 R qmi_wlanfw_respond_mem_req_msg_v01_ei +ffffffff82a22d60 R qmi_wlanfw_respond_mem_resp_msg_v01_ei +ffffffff82a22da0 R qmi_wlanfw_cap_req_msg_v01_ei +ffffffff82a22dc0 R qmi_wlanfw_rf_chip_info_s_v01_ei +ffffffff82a22e20 R qmi_wlanfw_rf_board_info_s_v01_ei +ffffffff82a22e60 R qmi_wlanfw_soc_info_s_v01_ei +ffffffff82a22ea0 R qmi_wlanfw_fw_version_info_s_v01_ei +ffffffff82a22f00 R qmi_wlanfw_cap_resp_msg_v01_ei +ffffffff82a231c0 R qmi_wlanfw_bdf_download_req_msg_v01_ei +ffffffff82a233a0 R qmi_wlanfw_bdf_download_resp_msg_v01_ei +ffffffff82a233e0 R qmi_wlanfw_m3_info_req_msg_v01_ei +ffffffff82a23440 R qmi_wlanfw_m3_info_resp_msg_v01_ei +ffffffff82a23480 R qmi_wlanfw_wlan_ini_req_msg_v01_ei +ffffffff82a234e0 R qmi_wlanfw_wlan_ini_resp_msg_v01_ei +ffffffff82a23520 R qmi_wlanfw_ce_tgt_pipe_cfg_s_v01_ei +ffffffff82a235e0 R qmi_wlanfw_ce_svc_pipe_cfg_s_v01_ei +ffffffff82a23660 R qmi_wlanfw_shadow_reg_cfg_s_v01_ei +ffffffff82a236c0 R qmi_wlanfw_shadow_reg_v2_cfg_s_v01_ei +ffffffff82a23700 R qmi_wlanfw_wlan_mode_req_msg_v01_ei +ffffffff82a23780 R qmi_wlanfw_wlan_mode_resp_msg_v01_ei +ffffffff82a237c0 R qmi_wlanfw_wlan_cfg_req_msg_v01_ei +ffffffff82a239a0 R qmi_wlanfw_wlan_cfg_resp_msg_v01_ei +ffffffff82a239e0 r wmi_tlv_policies +ffffffff82a25740 r qwx_hw_mode_pri_map +ffffffff82a25770 r ath11k_hw_params +ffffffff82a25cf0 r hw_srng_config_templ +ffffffff82a25fa8 r ath11k_hw_hal_params_ipq8074 +ffffffff82a25fb8 r ath11k_hw_hal_params_qca6390 +ffffffff82a25fc8 r ath11k_hw_hal_params_wcn6750 +ffffffff82a25fd8 r ath11k_hw_tcl2wbm_rbm_map_ipq8074 +ffffffff82a25fe1 r ath11k_hw_tcl2wbm_rbm_map_wcn6750 +ffffffff82a27000 R uhci_bus_methods +ffffffff82a27030 R uhci_root_ctrl_methods +ffffffff82a27060 R uhci_root_intr_methods +ffffffff82a27090 R uhci_device_ctrl_methods +ffffffff82a270c0 R uhci_device_intr_methods +ffffffff82a270f0 R uhci_device_bulk_methods +ffffffff82a27120 R uhci_device_isoc_methods +ffffffff82a27150 R uhci_devd +ffffffff82a27162 R uhci_confd +ffffffff82a2716b R uhci_ifcd +ffffffff82a27174 R uhci_endpd +ffffffff82a2717b R uhci_hubd_piix +ffffffff82a28000 R revbits +ffffffff82a28020 R ohci_bus_methods +ffffffff82a28050 R ohci_root_ctrl_methods +ffffffff82a28080 R ohci_root_intr_methods +ffffffff82a280b0 R ohci_device_ctrl_methods +ffffffff82a280e0 R ohci_device_intr_methods +ffffffff82a28110 R ohci_device_bulk_methods +ffffffff82a28140 R ohci_device_isoc_methods +ffffffff82a28170 R ohci_devd +ffffffff82a28182 R ohci_confd +ffffffff82a2818b R ohci_ifcd +ffffffff82a28194 R ohci_endpd +ffffffff82a2819b R ohci_hubd +ffffffff82a29000 R ehci_bus_methods +ffffffff82a29030 R ehci_root_ctrl_methods +ffffffff82a29060 R ehci_root_intr_methods +ffffffff82a29090 R ehci_device_ctrl_methods +ffffffff82a290c0 R ehci_device_intr_methods +ffffffff82a290f0 R ehci_device_bulk_methods +ffffffff82a29120 R ehci_device_isoc_methods +ffffffff82a29150 R ehci_devd +ffffffff82a29162 R ehci_odevd +ffffffff82a2916c R ehci_confd +ffffffff82a29175 R ehci_ifcd +ffffffff82a2917e R ehci_endpd +ffffffff82a29185 R ehci_hubd +ffffffff82a2a000 R xhci_bus_methods +ffffffff82a2a030 R xhci_root_ctrl_methods +ffffffff82a2a060 R xhci_root_intr_methods +ffffffff82a2a090 R xhci_device_ctrl_methods +ffffffff82a2a0c0 R xhci_device_intr_methods +ffffffff82a2a0f0 R xhci_device_bulk_methods +ffffffff82a2a120 R xhci_device_isoc_methods +ffffffff82a2a150 R xhci_devd +ffffffff82a2a162 R xhci_confd +ffffffff82a2a16b R xhci_ifcd +ffffffff82a2a174 R xhci_endpd +ffffffff82a2a17b R xhci_endpcd +ffffffff82a2a181 R xhci_hubd +ffffffff82a2b000 R psp_ca +ffffffff82a2b030 R psp_ucode_table +ffffffff82a2e000 R radio_ca +ffffffff82a2f000 R ipmi_ca +ffffffff82a30000 R vscsi_ca +ffffffff82a30028 R vscsi_switch +ffffffff82a30050 R vscsi_filtops +ffffffff82a31000 R mpath_ca +ffffffff82a31028 R mpath_switch +ffffffff82a32000 R softraid_ca +ffffffff82a32028 R sr_switch +ffffffff82a33000 r spdmem_basic_types +ffffffff82a330a0 r spdmem_parity_types +ffffffff82a330e0 r spdmem_ddr4_decode.ddr4_chipsize +ffffffff82a34000 R ufshci_switch +ffffffff82a35000 R kstat_rlock_ops +ffffffff82a35010 R kstat_wlock_ops +ffffffff82a35020 R kstat_mutex_ops +ffffffff82a35030 R kstat_cpu_ops +ffffffff82a35040 r kstat_id_tree_RBT_INFO +ffffffff82a35058 R kstat_id_tree_RBT_TYPE +ffffffff82a35060 r kstat_pv_tree_RBT_INFO +ffffffff82a35078 R kstat_pv_tree_RBT_TYPE +ffffffff82a35080 r kstat_nm_tree_RBT_INFO +ffffffff82a35098 R kstat_nm_tree_RBT_TYPE +ffffffff82a36000 r fuse_rd_filtops +ffffffff82a37000 R fusefs_vfsops +ffffffff82a37070 R fusefs_vars +ffffffff82a38000 R fusefs_vops +ffffffff82a38110 R fusefsread_filtops +ffffffff82a38140 R fusefswrite_filtops +ffffffff82a38170 R fusefsvnode_filtops +ffffffff82a39000 r pf_state_tree_RBT_INFO +ffffffff82a39018 R pf_state_tree_RBT_TYPE +ffffffff82a39020 r pf_state_tree_id_RBT_INFO +ffffffff82a39038 R pf_state_tree_id_RBT_TYPE +ffffffff82a39040 r pf_translate_af.zero +ffffffff82a3a000 R hfsc_ops +ffffffff82a3a038 R ifq_hfsc_ops +ffffffff82a3a040 R hfsc_pf_ops +ffffffff82a3a088 R pfq_hfsc_ops +ffffffff82a3b000 r fqcodel_ops +ffffffff82a3b038 R ifq_fqcodel_ops +ffffffff82a3b040 r fqcodel_pf_ops +ffffffff82a3b088 R pfq_fqcodel_ops +ffffffff82a3b090 r codel_intervals +ffffffff82a3c000 r pfsync_bulk_req_state_names +ffffffff82a3c030 r pfsync_bulk_req_event_names +ffffffff82a3c060 r pfsync_qs +ffffffff82a3c0d8 r pfsync_kstat_tpl +ffffffff82a3c2e0 r pfsync_acts +ffffffff82a3d000 r bio_mappings_RBT_INFO +ffffffff82a3d018 R bio_mappings_RBT_TYPE +ffffffff82a3e000 R hotplugread_filtops +ffffffff82a3f000 R dtps_static +ffffffff82a40000 R db_show_all_cmds +ffffffff82a40180 R db_show_cmds +ffffffff82a404c0 R db_boot_cmds +ffffffff82a405a0 R db_command_table +ffffffff82a41000 R ddb_vars +ffffffff82a42000 R audio_ca +ffffffff82a42028 R audioctlread_filtops +ffffffff82a42058 R audiowrite_filtops +ffffffff82a42088 R audioread_filtops +ffffffff82a43000 R midi_ca +ffffffff82a43028 R midiwrite_filtops +ffffffff82a43058 R midiread_filtops +ffffffff82a44000 r mulawtolin16 +ffffffff82a44200 r lintomulaw +ffffffff82a45000 R randomread_filtops +ffffffff82a45030 R randomwrite_filtops +ffffffff82a46000 R video_ca +ffffffff82a46028 R video_filtops +ffffffff82a47000 R cd9660_vfsops +ffffffff82a48000 R cd9660_vops +ffffffff82a48110 R cd9660_specvops +ffffffff82a48220 R cd9660_fifovops +ffffffff82a48330 R cd9660read_filtops +ffffffff82a48360 R cd9660write_filtops +ffffffff82a48390 R cd9660vnode_filtops +ffffffff82a49000 R udf_vfsops +ffffffff82a4a000 R udf_vops +ffffffff82a4a110 r mon_lens +ffffffff82a4b000 r month_days +ffffffff82a4c000 R execsw +ffffffff82a4d000 r shstrtab +ffffffff82a4e000 R copyright +ffffffff82a4e0c0 r initpaths +ffffffff82a4f000 R sysent +ffffffff82a51000 R bufq_impls +ffffffff82a52000 R kqueueops +ffffffff82a52038 R kqread_filtops +ffffffff82a52068 R proc_filtops +ffffffff82a52098 R sig_filtops +ffffffff82a520c8 R file_filtops +ffffffff82a520f8 R timer_filtops +ffffffff82a52130 R sysfilt_ops +ffffffff82a52178 R seltrue_filtops +ffffffff82a521a8 R dead_filtops +ffffffff82a521d8 R badfd_filtops +ffffffff82a52208 r mutex_klistops +ffffffff82a52220 r rwlock_klistops +ffffffff82a53000 R kv_exec +ffffffff82a54000 R addrmask +ffffffff82a55000 r rw_ops +ffffffff82a56000 r proc_printit.pstat +ffffffff82a57000 R pledge_syscalls +ffffffff82a57a60 r pledgenames +ffffffff82a57cb0 r pledgereq +ffffffff82a58000 r unvname_rbt_RBT_INFO +ffffffff82a58018 R unvname_rbt_RBT_TYPE +ffffffff82a59000 R sigprop +ffffffff82a5a000 R kern_vars +ffffffff82a5a2f0 R hw_vars +ffffffff82a5b000 R tc_vars +ffffffff82a5c000 r sys_gettimeofday.zerotz +ffffffff82a5d000 r taskq_sys_name +ffffffff82a5d006 r taskq_sys_mp_name +ffffffff82a5d010 R systq +ffffffff82a5d018 R systqmp +ffffffff82a5f000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff82a5f010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff82a5f020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff82a5f030 r gpt_get_fstype.gpt_uuid_linux +ffffffff82a5f040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff82a5f050 r gpt_get_fstype.gpt_uuid_unused +ffffffff82a5f060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff82a5f070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff82a60000 r hiballoc_addr_RBT_INFO +ffffffff82a60018 R hiballoc_addr_RBT_TYPE +ffffffff82a61000 R logread_filtops +ffffffff82a62000 r phtree_RBT_INFO +ffffffff82a62018 R phtree_RBT_TYPE +ffffffff82a62020 r pool_lock_ops_rw +ffffffff82a62058 r pool_lock_ops_mtx +ffffffff82a63000 R pipe_rfiltops +ffffffff82a63030 R pipe_wfiltops +ffffffff82a63060 R pipe_efiltops +ffffffff82a63090 r pipeops +ffffffff82a64000 R socketops +ffffffff82a65000 R sysvsem_vars +ffffffff82a66000 R char_type +ffffffff82a66100 R ttyread_filtops +ffffffff82a66130 R ttywrite_filtops +ffffffff82a66160 R ttyexcept_filtops +ffffffff82a67000 R ptcread_filtops +ffffffff82a67030 R ptcwrite_filtops +ffffffff82a67060 R ptcexcept_filtops +ffffffff82a69000 R domains +ffffffff82a6a000 R unixdomain +ffffffff82a6a050 R unixsw +ffffffff82a6b000 R soread_filtops +ffffffff82a6b030 R sowrite_filtops +ffffffff82a6b060 R soexcept_filtops +ffffffff82a6c000 R sun_noname +ffffffff82a6c010 R uipc_usrreqs +ffffffff82a6c0a0 R uipc_dgram_usrreqs +ffffffff82a6c130 R unpstctl_vars +ffffffff82a6c160 R unpsqctl_vars +ffffffff82a6c190 R unpdgctl_vars +ffffffff82a6d000 r namecache_rb_cache_RBT_INFO +ffffffff82a6d018 R namecache_rb_cache_RBT_TYPE +ffffffff82a6e000 R generic_filtops +ffffffff82a6f000 r buf_rb_bufs_RBT_INFO +ffffffff82a6f018 R buf_rb_bufs_RBT_TYPE +ffffffff82a6f020 r typename +ffffffff82a70000 R sync_vops +ffffffff82a71000 R vnops +ffffffff82a72000 R spec_vops +ffffffff82a73000 R dead_vops +ffffffff82a74000 R fifo_vops +ffffffff82a74110 R fiforead_filtops +ffffffff82a74140 R fifowrite_filtops +ffffffff82a74170 R fifoexcept_filtops +ffffffff82a75000 R regyear +ffffffff82a75020 R leapyear +ffffffff82a75040 r dos2unix +ffffffff82a75140 r u2l +ffffffff82a75240 r unix2dos +ffffffff82a76008 R msdosfs_vfsops +ffffffff82a77000 R msdosfs_vops +ffffffff82a77110 R msdosfsread_filtops +ffffffff82a77140 R msdosfswrite_filtops +ffffffff82a77170 R msdosfsvnode_filtops +ffffffff82a78000 r _utf_count +ffffffff82a79000 R ntfs_vfsops +ffffffff82a7a000 R ntfs_vops +ffffffff82a7b000 R bpfread_filtops +ffffffff82a7b030 R bpf_mbuf_ops +ffffffff82a7c000 r bpf_mem_ops +ffffffff82a7d000 R priq_ops +ffffffff82a7d038 R ifq_priq_ops +ffffffff82a7d040 r ifq_kstat_tpl +ffffffff82a7d180 r ifiq_kstat_tpl +ffffffff82a7e000 r ether_crc32_le_update.crctab +ffffffff82a7e040 r ether_crc32_be_update.crctab +ffffffff82a7f000 r lcp +ffffffff82a7f078 r ipcp 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udpctl_vars +ffffffff82aa6000 R gre_usrreqs +ffffffff82aa7000 r ipsec_ids_tree_RBT_INFO +ffffffff82aa7018 R ipsec_ids_tree_RBT_TYPE +ffffffff82aa7020 r ipsec_ids_flows_RBT_INFO +ffffffff82aa7038 R ipsec_ids_flows_RBT_TYPE +ffffffff82aa7040 R xformsw +ffffffff82aa7158 R xformswNXFORMSW +ffffffff82aa8000 R espctl_vars +ffffffff82aa8050 R ahctl_vars +ffffffff82aa8070 R ipcompctl_vars +ffffffff82aa8090 R ipsecctl_vars +ffffffff82aa9000 R ipseczeroes +ffffffff82aaa000 r carp_set_state.carp_states +ffffffff82aab000 r Rcon +ffffffff82aac000 r Te2 +ffffffff82aac400 r Te3 +ffffffff82aac800 r Te0 +ffffffff82aacc00 r Te1 +ffffffff82aad000 r rcon +ffffffff82aad030 r Td0 +ffffffff82aad430 r Td1 +ffffffff82aad830 r Td2 +ffffffff82aadc30 r Td3 +ffffffff82aae030 r Td4 +ffffffff82ab0000 r K256 +ffffffff82ab0100 r sha512_initial_hash_value +ffffffff82ab0140 r K512 +ffffffff82ab03c0 r sha384_initial_hash_value +ffffffff82ab1000 r Blowfish_initstate.initstate +ffffffff82ab3000 r cast_sbox1 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spl_lowered -ffffffff82afc12d R i8259_stubs -ffffffff82afc2ad R ioapic_edge_stubs -ffffffff82afc8ad R ioapic_level_stubs -ffffffff82afd000 R _stac -ffffffff82afd003 R _clac -ffffffff82afe000 R x86_bus_space_io_ops -ffffffff82afe130 R x86_bus_space_mem_ops -ffffffff82aff000 ? cpu_spinup_trampoline -ffffffff82aff0b6 R cpu_spinup_trampoline_end -ffffffff82aff0b6 R mp_tramp_data_start -ffffffff82aff0fc R mp_tramp_data_end -ffffffff82b01000 R db_acpi_cmds -ffffffff82b010a0 R db_machine_command_table -ffffffff82b02000 r i8254_delay.delaytab -ffffffff82b03000 R rasops_cmap -ffffffff82b04000 r reverse -ffffffff82b04100 r ibm437_level1 -ffffffff82b04230 r ibm437_level2_0 -ffffffff82b04248 r ibm437_level2_1 -ffffffff82b04260 r ibm437_level2_3 -ffffffff82b04278 r ibm437_level2_32 -ffffffff82b04290 r ibm437_level2_34 -ffffffff82b042a8 r ibm437_level2_35 -ffffffff82b042c0 r ibm437_level2_37 -ffffffff82b042e0 r ibm437_chars_0 -ffffffff82b043e0 r ibm437_chars_1 -ffffffff82b043f0 r ibm437_chars_3 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calculate_rc_params.ofs_und15 -ffffffff82d1e000 r gen12_plane_funcs -ffffffff82d1e068 r skl_plane_funcs -ffffffff82d1e0d0 r icl_program_input_csc.input_csc_matrix -ffffffff82d1e110 r icl_hdr_plane_formats -ffffffff82d1e190 r icl_sdr_y_plane_formats -ffffffff82d1e1f0 r icl_sdr_uv_plane_formats -ffffffff82d1e260 r glk_planar_formats -ffffffff82d1e2b0 r skl_plane_formats -ffffffff82d1e2f0 r skl_planar_formats -ffffffff82d1f000 r skl_wm_funcs -ffffffff82d1f040 r intel_dbuf_funcs -ffffffff82d1f050 r adlp_allowed_dbufs -ffffffff82d1f0c0 r dg2_allowed_dbufs -ffffffff82d1f120 r tgl_allowed_dbufs -ffffffff82d1f180 r icl_allowed_dbufs -ffffffff82d20000 r intel_dsi_funcs -ffffffff82d20020 r intel_dsi_host_ops -ffffffff82d20038 r intel_dsi_connector_funcs -ffffffff82d200b0 r intel_dsi_connector_helper_funcs -ffffffff82d21000 r lfsr_converts -ffffffff82d22000 r clflush_ops +ffffffff82aeb000 r inflate_table.lbase +ffffffff82aeb040 r inflate_table.lext +ffffffff82aeb080 r inflate_table.dbase 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Xexceptions +ffffffff82afb100 r spl_lowered +ffffffff82afb12d R i8259_stubs +ffffffff82afb2ad R ioapic_edge_stubs +ffffffff82afb8ad R ioapic_level_stubs +ffffffff82afc000 R _stac +ffffffff82afc003 R _clac +ffffffff82afd000 R x86_bus_space_io_ops +ffffffff82afd130 R x86_bus_space_mem_ops +ffffffff82afe000 ? cpu_spinup_trampoline +ffffffff82afe0b6 R cpu_spinup_trampoline_end +ffffffff82afe0b6 R mp_tramp_data_start +ffffffff82afe0fc R mp_tramp_data_end +ffffffff82b00000 R db_acpi_cmds +ffffffff82b000a0 R db_machine_command_table +ffffffff82b01000 r i8254_delay.delaytab +ffffffff82b02000 R rasops_cmap +ffffffff82b03000 r reverse +ffffffff82b03100 r ibm437_level1 +ffffffff82b03230 r ibm437_level2_0 +ffffffff82b03248 r ibm437_level2_1 +ffffffff82b03260 r ibm437_level2_3 +ffffffff82b03278 r ibm437_level2_32 +ffffffff82b03290 r ibm437_level2_34 +ffffffff82b032a8 r ibm437_level2_35 +ffffffff82b032c0 r ibm437_level2_37 +ffffffff82b032e0 r ibm437_chars_0 +ffffffff82b033e0 r ibm437_chars_1 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brgphy_bcm5401_dspcode.dspcode +ffffffff82b18000 R xmphy_ca +ffffffff82b18028 R xmphy_funcs +ffffffff82b18040 r xmphys +ffffffff82b19000 R amphy_ca +ffffffff82b19028 R amphy_funcs +ffffffff82b19040 r amphys +ffffffff82b1a000 R acphy_ca +ffffffff82b1a028 R acphy_funcs +ffffffff82b1a040 r acphys +ffffffff82b1b000 R nsgphy_ca +ffffffff82b1b028 R nsgphy_funcs +ffffffff82b1b040 r nsgphys +ffffffff82b1c000 R urlphy_ca +ffffffff82b1c028 R urlphy_funcs +ffffffff82b1d000 R rgephy_ca +ffffffff82b1d028 R rgephy_funcs +ffffffff82b1d040 r rgephys +ffffffff82b1e000 R ciphy_ca +ffffffff82b1e028 R ciphy_funcs +ffffffff82b1e040 r ciphys +ffffffff82b1f000 R ipgphy_ca +ffffffff82b1f028 R ipgphy_funcs +ffffffff82b1f040 r ipgphys +ffffffff82b20000 R etphy_funcs +ffffffff82b20018 R etphy_ca +ffffffff82b20040 r etphys +ffffffff82b20060 r etphy_dspcode +ffffffff82b21000 R jmphy_funcs +ffffffff82b21018 R jmphy_ca +ffffffff82b21040 r jmphys +ffffffff82b22000 R atphy_funcs +ffffffff82b22018 R atphy_ca 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virtio_net_feature_names +ffffffff82b4b000 R vioblk_ca +ffffffff82b4b028 R vioblk_switch +ffffffff82b4c000 R viomb_ca +ffffffff82b4c030 r viomb_feature_names +ffffffff82b4d000 R viornd_ca +ffffffff82b4e000 R vioscsi_ca +ffffffff82b4e028 R vioscsi_switch +ffffffff82b4e050 R vioscsi_vq_names +ffffffff82b4f000 R vmmci_ca +ffffffff82b50000 R pci_ca +ffffffff82b51000 r pci_quirks +ffffffff82b52000 R pci_subclass_prehistoric +ffffffff82b52050 R pci_subclass_mass_storage +ffffffff82b52160 R pci_subclass_network +ffffffff82b52250 R pci_subclass_display +ffffffff82b522d0 R pci_subclass_multimedia +ffffffff82b52360 R pci_subclass_memory +ffffffff82b523c0 R pci_subclass_bridge +ffffffff82b52510 R pci_subclass_communications +ffffffff82b525d0 R pci_subclass_system +ffffffff82b526c0 R pci_subclass_input +ffffffff82b52770 R pci_subclass_dock +ffffffff82b527c0 R pci_subclass_processor +ffffffff82b52880 R pci_subclass_serialbus +ffffffff82b52990 R pci_subclass_wireless +ffffffff82b52a70 R pci_subclass_i2o +ffffffff82b52aa0 R pci_subclass_satcom +ffffffff82b52b20 R pci_subclass_crypto +ffffffff82b52b80 R pci_subclass_dasp +ffffffff82b52c10 R pci_class +ffffffff82b52e20 r pci_known_vendors +ffffffff82b54410 r pci_known_products +ffffffff82b79000 R vga_pci_ca +ffffffff82b79030 r vga_devs +ffffffff82b7a000 R ahc_pci_ident_table +ffffffff82b7a5d0 R ahc_pci_ca +ffffffff82b7b000 R ahd_pci_ident_table +ffffffff82b7b198 R ahd_num_pci_devs +ffffffff82b7b1a0 R ahd_pci_ca +ffffffff82b7b1d0 r pci_bus_modes +ffffffff82b7b210 r pci_status_strings +ffffffff82b7b250 r pci_status_source +ffffffff82b7b290 r split_status_strings +ffffffff82b7c000 R adw_pci_ca +ffffffff82b7c028 R adw_pci_devices +ffffffff82b7d000 r adw_3550_Default_EEPROM +ffffffff82b7d080 r adw_38C0800_Default_EEPROM +ffffffff82b7d100 r adw_38C1600_Default_EEPROM +ffffffff82b7e000 R adw_asc3550_mcode +ffffffff82b7f3a0 R adw_asc3550_mcode_data +ffffffff82b7f3b0 R adw_asc38C0800_mcode +ffffffff82b80888 R adw_asc38C0800_mcode_data +ffffffff82b808a0 R adw_asc38C1600_mcode +ffffffff82b82160 R adw_asc38C1600_mcode_data +ffffffff82b83000 R twe_pci_ca +ffffffff82b83028 R twe_pci_devices +ffffffff82b84000 R arc_ca +ffffffff82b84028 R arc_switch +ffffffff82b84050 r arc_devices +ffffffff82b84190 r arc_intel +ffffffff82b84198 r arc_marvell +ffffffff82b841a0 r arc_lsi +ffffffff82b841a8 r arc_marvell2 +ffffffff82b85000 R jmb_ca +ffffffff82b85030 r jmb_devices +ffffffff82b86000 R ahci_pci_ca +ffffffff82b86028 R ahci_jmb_ca +ffffffff82b86050 r ahci_devices +ffffffff82b87000 R nvme_pci_ca +ffffffff82b88000 R ami_pci_ca +ffffffff82b88030 r ami_pci_subsys +ffffffff82b88270 r ami_pci_vendors +ffffffff82b89000 R mfi_pci_ca +ffffffff82b89030 r mfi_pci_devices +ffffffff82b8a000 R mfii_ca +ffffffff82b8a028 R mfii_switch +ffffffff82b8a050 R mfii_pd_switch +ffffffff82b8a078 R mfii_iop_thunderbolt +ffffffff82b8a088 R mfii_iop_25 +ffffffff82b8a098 R mfii_iop_35 +ffffffff82b8a0b0 R mfii_devices +ffffffff82b8a180 r mfi_bbu_indicators +ffffffff82b8b000 R ips_ca +ffffffff82b8b028 r ips_ids +ffffffff82b8b040 r ips_chips +ffffffff82b8b090 r ips_names +ffffffff82b8b128 r ips_switch +ffffffff82b8b150 r ips_pt_switch +ffffffff82b8c000 R eap_ca +ffffffff82b8c028 R eap1370_hw_if +ffffffff82b8c0e0 R eap1371_hw_if +ffffffff82b8c198 R eap_midi_hw_if +ffffffff82b8c1d0 R eap_devices +ffffffff82b8d000 R auacer_pci_devices +ffffffff82b8d008 R auacer_ca +ffffffff82b8d030 R auacer_hw_if +ffffffff82b8e000 R auich_ca +ffffffff82b8e028 R auich_hw_if +ffffffff82b8e0e0 r auich_devices +ffffffff82b8f000 R azalia_ca +ffffffff82b8f028 R azalia_hw_if +ffffffff82b8f0e0 R azalia_pci_devices +ffffffff82b8f120 r pin_devices +ffffffff82b8f1a0 r line_colors +ffffffff82b8f220 r wtypes +ffffffff82b90000 r azalia_codec_init_dolby_atmos.atmos_init +ffffffff82b90050 r azalia_codec_init_dolby_atmos.atmos_v23_v25 +ffffffff82b91000 R envy_ca +ffffffff82b91028 R envy_hw_if +ffffffff82b910e0 R envy_midi_hw_if +ffffffff82b92000 R emuxki_devices +ffffffff82b92010 R emu_ca +ffffffff82b92038 R emuxki_hw_if +ffffffff82b920f0 r emuxki_recbuf_sz +ffffffff82b92170 r emuxki_recsrc_szreg +ffffffff82b9217c r emuxki_recsrc_bufaddrreg +ffffffff82b92190 r emuxki_rate_to_pitch.logMagTable +ffffffff82b92390 r emuxki_rate_to_pitch.logSlopeTable +ffffffff82b93000 R auixp_pci_devices +ffffffff82b93010 R auixp_ca +ffffffff82b93038 R auixp_hw_if +ffffffff82b94000 R clcs_ca +ffffffff82b94028 R cs4280_hw_if +ffffffff82b940e0 R cs4280_devices +ffffffff82b95000 R yds_ca +ffffffff82b95028 r yds_hw_if +ffffffff82b950e0 r yds_chip_capability_list +ffffffff82b95120 r yds_get_lpfk.lpfkt +ffffffff82b95160 r yds_get_lpfq.lpfqt +ffffffff82b96000 R auvia_ca +ffffffff82b96028 R auvia_hw_if +ffffffff82b960e0 R auvia_devices +ffffffff82b960f0 r auvia_set_params_sub.slottab +ffffffff82b97000 R gdt_pci_ca +ffffffff82b98000 R ciss_pci_ca +ffffffff82b98030 R ciss_pci_devices +ffffffff82b99000 R qlw_pci_ca +ffffffff82b99030 r qlw_devices +ffffffff82b99050 r isp_1040_risc_code +ffffffff82b9e9f0 r isp_1080_risc_code +ffffffff82ba6470 r isp_12160_risc_code +ffffffff82bae000 R qla_pci_ca +ffffffff82bae030 r qla_devices +ffffffff82baf000 R qle_ca +ffffffff82baf028 R qle_switch +ffffffff82baf050 r qle_devices +ffffffff82baf070 r isp_2400_risc_code +ffffffff82bdea50 r isp_2500_risc_code +ffffffff82c11000 R mpi_pci_ca +ffffffff82c11030 r mpi_devices +ffffffff82c12000 R mpii_ca +ffffffff82c12028 R mpii_switch +ffffffff82c12050 r mpii_devices +ffffffff82c13000 R sili_pci_ca +ffffffff82c13030 r sili_devices +ffffffff82c14000 R aq_devices +ffffffff82c14060 R aq_products +ffffffff82c141d0 R aq_fw1x_ops +ffffffff82c141f8 R aq_fw2x_ops +ffffffff82c14220 R aq2_fw_ops +ffffffff82c14248 R aq_ca +ffffffff82c15000 R de_ca +ffffffff82c15030 r tulip_srom_conninfo +ffffffff82c15120 r tulip_mii_phy_attrlist +ffffffff82c151e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff82c15208 r tulip_21040_10baset_only_boardsw +ffffffff82c15230 r tulip_21040_boardsw +ffffffff82c15258 r tulip_2114x_isv_boardsw +ffffffff82c15280 r tulip_21140_smc9332_boardsw +ffffffff82c152a8 r tulip_21040_auibnc_only_boardsw +ffffffff82c152d0 r tulip_21140_cogent_em100_boardsw +ffffffff82c152f8 r tulip_21140_accton_boardsw +ffffffff82c15320 r tulip_21140_eb_boardsw +ffffffff82c15348 r tulip_21041_boardsw +ffffffff82c15370 r tulip_read_macaddr.testpat +ffffffff82c15380 r tulip_vendors +ffffffff82c15430 r tulip_media_to_ifmedia +ffffffff82c15490 r tulip_chipdescs +ffffffff82c16000 R ep_pci_ca +ffffffff82c16030 R ep_pci_devices +ffffffff82c17000 R pcn_ca +ffffffff82c17028 R pcn_devices +ffffffff82c17030 r pcn_79c970_rcvfw +ffffffff82c17050 r pcn_79c970_xmtsp +ffffffff82c17070 r pcn_79c970_xmtfw +ffffffff82c17090 r pcn_79c971_rcvfw +ffffffff82c170b0 r pcn_79c971_xmtsp_sram +ffffffff82c170d0 r pcn_79c971_xmtsp +ffffffff82c170f0 r pcn_79c971_xmtfw +ffffffff82c17110 r pcn_variants +ffffffff82c18000 R siop_products +ffffffff82c19000 R siop_pci_ca +ffffffff82c1a000 R rdcide_setup +ffffffff82c1a005 R rdcide_hold +ffffffff82c1a00a R rdcide_udmatim +ffffffff82c1a010 R rdcide_udmaclk +ffffffff82c1a028 R default_product_desc +ffffffff82c1a040 R pciide_intel_products +ffffffff82c1a630 R pciide_amd_products +ffffffff82c1a690 R pciide_cmd_products +ffffffff82c1a730 R pciide_via_products +ffffffff82c1a810 R pciide_cypress_products +ffffffff82c1a820 R pciide_sis_products +ffffffff82c1a870 R pciide_natsemi_products +ffffffff82c1a890 R pciide_acer_products +ffffffff82c1a8a0 R pciide_triones_products +ffffffff82c1a8f0 R pciide_promise_products +ffffffff82c1aac0 R pciide_acard_products +ffffffff82c1ab10 R pciide_serverworks_products +ffffffff82c1abb0 R pciide_nvidia_products +ffffffff82c1ae80 R pciide_ite_products +ffffffff82c1aea0 R pciide_ati_products +ffffffff82c1af20 R pciide_jmicron_products +ffffffff82c1af70 R pciide_phison_products +ffffffff82c1af80 R pciide_rdc_products +ffffffff82c1af90 R pciide_vendors +ffffffff82c1b140 R pciide_pci_ca +ffffffff82c1b168 R pciide_jmb_ca +ffffffff82c1b190 r piix_isp_dma +ffffffff82c1b193 r piix_rtc_dma +ffffffff82c1b196 r apollo_pio_set +ffffffff82c1b19b r cmd0643_9_data_tim_pio +ffffffff82c1b1a0 r cmd0643_9_data_tim_dma +ffffffff82c1b1a3 r cmd680_channel_map.init_val +ffffffff82c1b1b1 r cmd680_setup_channel.udma2_tbl +ffffffff82c1b1b8 r cmd680_setup_channel.dma_tbl +ffffffff82c1b1be r cmd680_setup_channel.pio_tbl +ffffffff82c1b1d0 r satalink_ba5_regmap +ffffffff82c1b690 r sii3114_chansetup.channel_names +ffffffff82c1b6b0 r cy_pio_pulse +ffffffff82c1b6c0 r sis_udma133new_tim +ffffffff82c1b6e0 r sis_pio133new_tim +ffffffff82c1b6f4 r sis_dma133new_tim +ffffffff82c1b700 r sis_udma66_tim +ffffffff82c1b706 r sis_udma100new_tim +ffffffff82c1b70c r sis_udma133old_tim +ffffffff82c1b713 r sis_pio_act +ffffffff82c1b718 r sis_pio_rec +ffffffff82c1b71d r natsemi_pio_pulse +ffffffff82c1b722 r natsemi_pio_recover +ffffffff82c1b727 r natsemi_dma_pulse +ffffffff82c1b72a r natsemi_dma_recover +ffffffff82c1b730 r scx200_udma33 +ffffffff82c1b73c r scx200_dma33 +ffffffff82c1b750 r scx200_pio33 +ffffffff82c1b778 r acer_udma +ffffffff82c1b77e r acer_pio +ffffffff82c1b790 r hpt370_pio +ffffffff82c1b7a4 r hpt370_dma +ffffffff82c1b7b0 r hpt370_udma +ffffffff82c1b7d0 r hpt372_pio +ffffffff82c1b7e4 r hpt372_dma +ffffffff82c1b7f0 r hpt372_udma +ffffffff82c1b80c r hpt366_dma +ffffffff82c1b820 r hpt366_udma +ffffffff82c1b840 r hpt374_pio +ffffffff82c1b854 r hpt374_dma +ffffffff82c1b860 r hpt374_udma +ffffffff82c1b87c r pdc2xx_pa +ffffffff82c1b881 r pdc2xx_pb +ffffffff82c1b886 r pdc2xx_dma_mb +ffffffff82c1b889 r pdc2xx_dma_mc +ffffffff82c1b88c r pdc2xx_udma_mc +ffffffff82c1b892 r acard_act_udma +ffffffff82c1b899 r acard_rec_udma +ffffffff82c1b8a0 r acard_udma_conf +ffffffff82c1b8a7 r acard_act_dma +ffffffff82c1b8aa r acard_rec_dma +ffffffff82c1b8ad r acard_act_pio +ffffffff82c1b8b2 r acard_rec_pio +ffffffff82c1b8b7 r nforce_udma +ffffffff82c1b8be r nforce_pio +ffffffff82c1b8c3 r ixp_mdma_timings +ffffffff82c1b8c6 r ixp_pio_timings +ffffffff82c1c000 R ppb_ca +ffffffff82c1d000 R cy_pci_ca +ffffffff82c1d030 R cy_pci_devices +ffffffff82c1e000 R rl_pci_ca +ffffffff82c1e030 R rl_pci_devices +ffffffff82c1f000 R re_pci_devices +ffffffff82c1f030 R re_pci_ca +ffffffff82c20000 R vr_ca +ffffffff82c21000 R txp_ca +ffffffff82c21030 R txp_devices +ffffffff82c22000 r cards +ffffffff82c23000 r format_params +ffffffff82c231a0 r pixfmt_table +ffffffff82c23320 r meteor_pixfmt_table +ffffffff82c24000 R bktr_ca +ffffffff82c24028 R bktr_hw_if +ffffffff82c25000 r tuners +ffffffff82c25170 r freqTable +ffffffff82c25260 r nabcst +ffffffff82c252a0 r irccable +ffffffff82c25310 r hrccable +ffffffff82c25380 r weurope +ffffffff82c25420 r jpnbcst +ffffffff82c25460 r jpncable +ffffffff82c254c0 r xussr +ffffffff82c25530 r australia +ffffffff82c25590 r france +ffffffff82c26000 R xl_pci_ca +ffffffff82c26030 R xl_pci_devices +ffffffff82c27000 R fxp_pci_ca +ffffffff82c27030 R fxp_pci_devices +ffffffff82c28000 R em_devices +ffffffff82c28308 R em_ca +ffffffff82c28330 r em_counters +ffffffff82c29000 r em_igp_cable_length_table +ffffffff82c29100 r em_igp_2_cable_length_table +ffffffff82c2a000 R ixgb_devices +ffffffff82c2a010 R ixgb_ca +ffffffff82c2b000 R ixgbe_devices +ffffffff82c2b0b8 R ix_ca +ffffffff82c2b0e0 r ix_counters +ffffffff82c2b3e0 r ix_rxq_kstats_tpl +ffffffff82c2b458 r ix_txq_kstats_tpl +ffffffff82c2c000 r ixgbe_mvals_base +ffffffff82c2c060 r ixgbe_mvals_X540 +ffffffff82c2c0c0 r ixgbe_mvals_X550 +ffffffff82c2c120 r ixgbe_mvals_X550EM_x +ffffffff82c2c180 r ixgbe_mvals_X550EM_a +ffffffff82c2f000 R ixv_devices +ffffffff82c2f018 R ixv_ca +ffffffff82c2f040 r ixv_counters +ffffffff82c2f0b8 r ixv_txq_kstats_tpl +ffffffff82c2f108 r ixv_rxq_kstats_tpl +ffffffff82c30000 R ixl_ca +ffffffff82c30030 R ixl_port_counters +ffffffff82c302c0 R ixl_vsi_counters +ffffffff82c30380 r ixl_devices +ffffffff82c304c0 r ixl_710 +ffffffff82c304e8 r ixl_722 +ffffffff82c30510 r ixl_pf_aq_regs +ffffffff82c30578 r ixl_710_decrepit +ffffffff82c305a0 r ixl_phy_type_map +ffffffff82c30770 r ixl_speed_type_map +ffffffff82c307b0 r ixl_hmc_pack_rxq +ffffffff82c30830 r ixl_hmc_pack_txq +ffffffff82c308a0 r ixl_sfp_ops +ffffffff82c308b8 r ixl_qsfp_ops +ffffffff82c31000 r dwqe_pci_devices +ffffffff82c31018 R dwqe_pci_ca +ffffffff82c32000 R ice_driver_version +ffffffff82c3200a R ice_major_version +ffffffff82c3200b R ice_minor_version +ffffffff82c3200c R ice_patch_version +ffffffff82c3200d R ice_rc_version +ffffffff82c3200e r ice_devices +ffffffff82c32020 r blk_sizes +ffffffff82c32080 r ice_blk_sids +ffffffff82c320f0 R ice_tlan_ctx_info +ffffffff82c321e0 r ice_rlan_ctx_info +ffffffff82c32290 r phy_link_speeds +ffffffff82c32360 r ice_ptypes_mac_il +ffffffff82c323e0 r ice_flds_info +ffffffff82c324d0 R ice_ca +ffffffff82c32500 r ice_ptypes_mac_ofos +ffffffff82c32580 r ice_ptypes_macvlan_il +ffffffff82c32600 r ice_ptypes_arp_of +ffffffff82c32680 r ice_ptypes_ipv4_il +ffffffff82c32700 r ice_ptypes_ipv6_il +ffffffff82c32780 r ice_ptypes_ipv4_ofos_no_l4 +ffffffff82c32800 r ice_ptypes_ipv4_il_no_l4 +ffffffff82c32880 r ice_ptypes_ipv4_ofos +ffffffff82c32900 r ice_ptypes_ipv6_ofos_no_l4 +ffffffff82c32980 r ice_ptypes_ipv6_il_no_l4 +ffffffff82c32a00 r ice_ptypes_ipv6_ofos +ffffffff82c32a80 r ice_ptypes_udp_il +ffffffff82c32b00 r ice_ptypes_tcp_il +ffffffff82c32b80 r ice_ptypes_sctp_il +ffffffff82c32c00 r ice_ptypes_icmp_of +ffffffff82c32c80 r ice_ptypes_icmp_il +ffffffff82c32d00 r ice_ptypes_gre_of +ffffffff82c34000 R xge_ca +ffffffff82c34028 R xge_devices +ffffffff82c34030 r xge_fix_mac +ffffffff82c34110 r xge_xena_dtx_cfg +ffffffff82c34170 r xge_herc_dtx_cfg +ffffffff82c35000 R thtc_ca +ffffffff82c35028 R tht_ca +ffffffff82c35050 r thtc_devices +ffffffff82c35068 r tht_link_state.interval +ffffffff82c36000 R myx_ca +ffffffff82c36028 R myx_devices +ffffffff82c37000 R oce_ca +ffffffff82c37030 R oce_devices +ffffffff82c38000 R dc_pci_ca +ffffffff82c39000 R epic_pci_ca +ffffffff82c39028 R epic_pci_devices +ffffffff82c3a000 R ti_pci_ca +ffffffff82c3a030 R ti_devices +ffffffff82c3b000 R ne_pci_ca +ffffffff82c3b030 R ne_pci_prod +ffffffff82c3c000 R gem_pci_ca +ffffffff82c3c030 R gem_pci_devices +ffffffff82c3c050 r gem_promhdr +ffffffff82c3c052 r gem_promdat +ffffffff82c3c05a r gem_promdat2 +ffffffff82c3d000 R cas_ca +ffffffff82c3d028 R cas_pci_devices +ffffffff82c3d030 r cas_promhdr +ffffffff82c3d032 r cas_promdat_sun +ffffffff82c3d03a r cas_promdat_ns +ffffffff82c3d042 r cas_promdat2 +ffffffff82c3e000 R sf_pci_ca +ffffffff82c3e028 R sf_pci_products +ffffffff82c3f000 R sis_ca +ffffffff82c3f028 R sis_devices +ffffffff82c40000 R se_devices +ffffffff82c40008 R se_ca +ffffffff82c41000 R mbg_ca +ffffffff82c41030 R mbg_devices +ffffffff82c42000 R uhci_pci_ca +ffffffff82c43000 R ohci_pci_ca +ffffffff82c44000 R ehci_pci_ca +ffffffff82c45000 R xhci_pci_ca +ffffffff82c46000 R cbb_pci_ca +ffffffff82c46028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff82c47000 R skc_devices +ffffffff82c47030 R skc_ca +ffffffff82c47058 R sk_ca +ffffffff82c48000 R mskc_devices +ffffffff82c480a8 R mskc_ca +ffffffff82c480d0 R msk_ca +ffffffff82c48100 r msk_mib +ffffffff82c49000 R puc_pci_ca +ffffffff82c4a000 R puc_devs +ffffffff82c4f000 R com_puc_ca +ffffffff82c4f030 r puc_port_types +ffffffff82c50000 R lpt_puc_ca +ffffffff82c51000 R wi_pci_ca +ffffffff82c51030 r wi_pci_products +ffffffff82c52000 R an_pci_ca +ffffffff82c52030 R an_pci_devices +ffffffff82c53000 R iwi_devices +ffffffff82c53010 R iwi_ca +ffffffff82c54000 R wpi_ca +ffffffff82c54028 r wpi_devices +ffffffff82c54030 r wpi_rates +ffffffff82c54050 r wpi_rf_gain_5ghz +ffffffff82c540a0 r wpi_dsp_gain_5ghz +ffffffff82c540f0 r wpi_rf_gain_2ghz +ffffffff82c54140 r wpi_dsp_gain_2ghz +ffffffff82c54190 r wpi_pmgt +ffffffff82c54310 r wpi_bands +ffffffff82c55000 R iwn_mcs2ridx +ffffffff82c55020 R iwn_ca +ffffffff82c55050 r iwn_devices +ffffffff82c550e8 r iwn4965_sensitivity_limits +ffffffff82c55124 r iwn5000_sensitivity_limits +ffffffff82c55160 r iwn5150_sensitivity_limits +ffffffff82c5519c r iwn1000_sensitivity_limits +ffffffff82c551d8 r iwn6000_sensitivity_limits +ffffffff82c55214 r iwn2000_sensitivity_limits +ffffffff82c55250 r iwn_fw_errmsg +ffffffff82c55340 r iwn4965_set_txpower.tdiv +ffffffff82c55360 r iwn4965_rf_gain_5ghz +ffffffff82c553d0 r iwn4965_dsp_gain_5ghz +ffffffff82c55440 r iwn4965_dsp_gain_2ghz +ffffffff82c554b0 r iwn_pmgt +ffffffff82c556f0 r iwn4965_post_alive.qid2fifo +ffffffff82c55700 r iwn_bands +ffffffff82c55770 r iwn_rates +ffffffff82c55820 r iwn4965_rf_gain_2ghz +ffffffff82c56000 R iwm_nvm_channels +ffffffff82c56030 R iwm_nvm_channels_8000 +ffffffff82c56070 R iwm_rates +ffffffff82c560d0 R iwm_ht_mcs2ridx +ffffffff82c56110 R iwm_tid_to_ac +ffffffff82c56118 R iwm_ac_to_tx_fifo +ffffffff82c56120 R iwm_nvm_to_read +ffffffff82c56144 r iwm_set_hw_address_8000.reserved_mac +ffffffff82c56180 r iwm_sf_full_timeout +ffffffff82c561b0 r iwm_sf_full_timeout_def +ffffffff82c561e0 r advanced_lookup +ffffffff82c56320 r iwm_devices +ffffffff82c56360 R iwm_ca +ffffffff82c57000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff82c57020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff82c57040 R iwx_qu_b0_hr1_b0 +ffffffff82c57060 R iwx_qu_b0_hr_b0 +ffffffff82c57080 R iwx_ax201_cfg_qu_hr +ffffffff82c570a0 R iwx_qu_c0_hr1_b0 +ffffffff82c570c0 R iwx_qu_c0_hr_b0 +ffffffff82c570e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff82c57100 R iwx_quz_a0_hr1_b0 +ffffffff82c57120 R iwx_ax201_cfg_quz_hr +ffffffff82c57140 R iwx_cfg_so_a0_hr_b0 +ffffffff82c57160 R iwx_cfg_quz_a0_hr_b0 +ffffffff82c57180 R iwx_2ax_cfg_so_gf_a0 +ffffffff82c571a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff82c571c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff82c571e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff82c57200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff82c57220 R iwx_2ax_cfg_so_jf_b0 +ffffffff82c57240 R iwx_cfg_ma_b0_hr_b0 +ffffffff82c57260 R iwx_cfg_ma_b0_gf_a0 +ffffffff82c57280 R iwx_cfg_ma_b0_gf4_a0 +ffffffff82c572a0 R iwx_cfg_ma_a0_fm_a0 +ffffffff82c572c0 R iwx_nvm_channels_8000 +ffffffff82c57300 R iwx_rates +ffffffff82c57360 R iwx_mcs2ridx +ffffffff82c573a0 R iwx_tid_to_ac +ffffffff82c573a8 R iwx_ac_to_tx_fifo +ffffffff82c573b0 r iwx_nvm_channels_uhb +ffffffff82c5741e r iwx_is_valid_mac_addr.reserved_mac +ffffffff82c57430 r iwx_sf_full_timeout +ffffffff82c57460 r iwx_sf_full_timeout_def +ffffffff82c57490 r advanced_lookup +ffffffff82c575d0 r iwx_devices +ffffffff82c57620 r iwx_dev_info_table +ffffffff82c57f38 R iwx_ca +ffffffff82c58000 R qwx_pci_ca +ffffffff82c58028 r qwx_pci_devices +ffffffff82c58030 R qwx_msi_config_one_msi +ffffffff82c58050 R qwx_msi_config +ffffffff82c580c8 r qwx_pci_ops_qca6390 +ffffffff82c580f8 r qwx_pci_ops_qcn9074 +ffffffff82c59000 R cmpci_ca +ffffffff82c59028 R cmpci_hw_if +ffffffff82c590e0 r cmpci_rate_table +ffffffff82c59120 R cmpci_devices +ffffffff82c59130 r cmpci_query_devinfo.mixer_port_names +ffffffff82c59160 r cmpci_query_devinfo.mixer_classes +ffffffff82c5a000 R iha_pci_ca +ffffffff82c5a028 R iha_switch +ffffffff82c5b000 R pcscp_ca +ffffffff82c5c000 R bge_ca +ffffffff82c5c030 R bge_devices +ffffffff82c5c1b0 r bge_revisions +ffffffff82c5c610 r bge_majorrevs +ffffffff82c5c790 r bge_kstat_tpl +ffffffff82c5d000 R bnx_devices +ffffffff82c5d020 R bnx_ca +ffffffff82c5e000 R vge_ca +ffffffff82c5e028 R vge_devices +ffffffff82c5f000 R stge_ca +ffffffff82c5f028 R stge_mii_bitbang_ops +ffffffff82c5f050 R stge_devices +ffffffff82c60000 R nfe_ca +ffffffff82c60030 R nfe_devices +ffffffff82c61000 R et_devices +ffffffff82c61008 R et_ca +ffffffff82c62000 R jme_devices +ffffffff82c62008 R jme_ca +ffffffff82c63000 R age_devices +ffffffff82c63008 R age_ca +ffffffff82c64000 R alc_devices +ffffffff82c64038 R alc_ca +ffffffff82c65000 R ale_devices +ffffffff82c65008 R ale_ca +ffffffff82c66000 R amdpm_ca +ffffffff82c66030 R amdpm_ids +ffffffff82c67000 R bce_ca +ffffffff82c67028 R bce_devices +ffffffff82c68000 R ath_pci_ca +ffffffff82c69000 R athn_pci_ca +ffffffff82c69030 r athn_pci_devices +ffffffff82c6a000 R atw_pci_ca +ffffffff82c6a028 R atw_pci_devices +ffffffff82c6b000 R rtw_pci_ca +ffffffff82c6b030 R rtw_pci_products +ffffffff82c6c000 R rtwn_pci_ca +ffffffff82c6c030 r rtwn_pci_devices +ffffffff82c6c040 r rtl8188eu_mac +ffffffff82c6c1b0 r rtl8192cu_mac +ffffffff82c6c310 r rtl8192ce_mac +ffffffff82c6c458 r rtl8188eu_bb_prog +ffffffff82c6c480 r rtl8723a_bb_prog +ffffffff82c6c4a8 r rtl8192ce_bb_prog_1t +ffffffff82c6c4d0 r rtl8192ce_bb_prog_2t +ffffffff82c6c500 r rtl8188eu_bb_regs +ffffffff82c6c680 r rtl8188eu_bb_vals +ffffffff82c6c980 r rtl8188eu_agc_vals +ffffffff82c6cb80 r rtl8723a_bb_regs +ffffffff82c6cd00 r rtl8723a_bb_vals +ffffffff82c6cff0 r rtl8192ce_agc_vals +ffffffff82c6d270 r rtl8192ce_bb_regs +ffffffff82c6d3f0 r rtl8192ce_bb_vals_1t +ffffffff82c6d6e0 r rtl8192ce_bb_vals_2t +ffffffff82c6e000 R ral_pci_ca +ffffffff82c6e030 R ral_pci_devices +ffffffff82c6f000 R acx_pci_ca +ffffffff82c6f028 R acx_pci_devices +ffffffff82c70000 R pgt_pci_ca +ffffffff82c70028 R pgt_pci_devices +ffffffff82c71000 R malo_pci_ca +ffffffff82c71028 R malo_pci_devices +ffffffff82c72000 R bwi_pci_ca +ffffffff82c72030 R bwi_pci_devices +ffffffff82c73000 R piixpm_ca +ffffffff82c73030 R piixpm_ids +ffffffff82c74000 R vic_ca +ffffffff82c74028 R vic_devices +ffffffff82c75000 R vmx_devices +ffffffff82c75008 R vmx_ca +ffffffff82c75030 r vmx_tx_kstat_tpl +ffffffff82c750d0 r vmx_kstat_rate +ffffffff82c750e0 r vmx_rx_kstat_tpl +ffffffff82c76000 R vmwpvs_ca +ffffffff82c76028 R vmwpvs_switch +ffffffff82c77000 R lii_ca +ffffffff82c77028 R lii_devices +ffffffff82c78000 R ichiic_ca +ffffffff82c78030 R ichiic_ids +ffffffff82c79000 R viapm_ca +ffffffff82c79030 R viapm_ids +ffffffff82c79070 r val_to_temp +ffffffff82c79870 r val_to_uV.mult +ffffffff82c7a000 R amdiic_ca +ffffffff82c7a028 R amdiic_ids +ffffffff82c7b000 R nviic_ca +ffffffff82c7b030 R nviic_ids +ffffffff82c7c000 R sdhc_pci_ca +ffffffff82c7d000 R kate_ca +ffffffff82c7d030 r kate_proc +ffffffff82c7e000 R km_ca +ffffffff82c7e030 r km_devices +ffffffff82c7f000 R ksmn_ca +ffffffff82c7f030 r ksmn_devices +ffffffff82c80000 R iosf_pci_ca +ffffffff82c81000 R itherm_devices +ffffffff82c81008 R itherm_ca +ffffffff82c82000 R pchtemp_ca +ffffffff82c82030 R pchtemp_devices +ffffffff82c83000 R rtsx_pci_ca +ffffffff82c84000 R xspd_ca +ffffffff82c84028 R xspd_devices +ffffffff82c85000 R virtio_pci_ca +ffffffff82c85028 R virtio_pci_ops +ffffffff82c86000 R dwiic_pci_ca +ffffffff82c86030 R dwiic_pci_ids +ffffffff82c87000 R bwfm_pci_ca +ffffffff82c87030 r bwfm_pci_devices +ffffffff82c88000 R ccp_pci_ca +ffffffff82c88030 r ccp_pci_devices +ffffffff82c89000 r psp_pci_devices +ffffffff82c8a000 R bnxt_devices +ffffffff82c8a040 R bnxt_ca +ffffffff82c8b000 R mcx_ca +ffffffff82c8b030 r mcx_devices +ffffffff82c8b060 r mcx_rss_config +ffffffff82c8b0d0 r mcx_eth_cap_map +ffffffff82c8b2d0 r mcx_ext_eth_cap_map +ffffffff82c8b3d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff82c8b3e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82c8b400 r mcx_kstat_ppcnt_rfc2819 +ffffffff82c8b418 r mcx_kstat_ppcnt_rfc3635 +ffffffff82c8b430 r mcx_ppcnt_ieee8023_tpl +ffffffff82c8b5b0 r mcx_ppcnt_rfc2863_tpl +ffffffff82c8b6c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82c8b870 r mcx_ppcnt_rfc3635_tpl +ffffffff82c8b9b0 r mcx_kstat_mtmp_tpl +ffffffff82c8ba50 r mcx_kstat_mtmp_rate +ffffffff82c8ba60 r mcx_queue_kstat_tpl +ffffffff82c8c000 R iavf_ca +ffffffff82c8c030 r iavf_devices +ffffffff82c8c040 r iavf_aq_regs +ffffffff82c8c0b0 r iavf_link_speeds +ffffffff82c8d000 R rge_ca +ffffffff82c8d028 R rge_devices +ffffffff82c8d040 r rge_phy_config_mac_cfg2_8126.mac_cfg2_a438_value +ffffffff82c8d070 r rge_phy_config_mac_cfg2_8126.mac_cfg2_b87e_value +ffffffff82c8d0c0 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff82c8d0e0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff82c8d140 r rtl8125_mac_cfg3_mcu +ffffffff82c8d9e0 r rtl8125_mac_cfg5_mcu +ffffffff82c8ea00 r rtl8126_mac_cfg2_mcu +ffffffff82c95a20 r rtl8125_mac_bps +ffffffff82c95e20 r rtl8125b_mac_bps +ffffffff82c96048 r rge_kstats_tpl +ffffffff82c97000 R igc_devices +ffffffff82c97040 R igc_ca +ffffffff82c97070 r igc_counters +ffffffff82c98000 R ngbe_devices +ffffffff82c98008 R ngbe_ca +ffffffff82c99000 R com_pci_ca +ffffffff82c99030 R com_pci_ids +ffffffff82c9a000 R ufshci_pci_ca +ffffffff82c9b000 r agp_attach.agp_max +ffffffff82c9b048 R agp_ca +ffffffff82c9c000 R intagp_ca +ffffffff82c9d000 r drm_plane_create_rotation_property.props +ffffffff82c9e000 r drm_bridge_priv_state_funcs +ffffffff82ca0000 r color_encoding_name +ffffffff82ca0020 r color_range_name +ffffffff82ca1000 r drm_subpixel_enum_list +ffffffff82ca1060 r drm_dpms_enum_list +ffffffff82ca10a0 r drm_dvi_i_select_enum_list +ffffffff82ca10d0 r drm_dvi_i_subconnector_enum_list +ffffffff82ca1100 r drm_tv_mode_enum_list +ffffffff82ca1170 r drm_tv_select_enum_list +ffffffff82ca11c0 r drm_tv_subconnector_enum_list +ffffffff82ca1210 r drm_dp_subconnector_enum_list +ffffffff82ca1280 r colorspace_names +ffffffff82ca1300 r drm_link_status_enum_list +ffffffff82ca1320 r drm_scaling_mode_enum_list +ffffffff82ca1360 r drm_aspect_ratio_enum_list +ffffffff82ca1390 r drm_content_type_enum_list +ffffffff82ca13e0 r drm_panel_orientation_enum_list +ffffffff82ca1420 r privacy_screen_enum +ffffffff82ca2000 r drm_crtc_fence_ops +ffffffff82ca3000 r drm_dmt_modes +ffffffff82ca5940 r edid_cea_modes_1 +ffffffff82ca94d0 r edid_cea_modes_193 +ffffffff82caa180 r edid_quirk_list +ffffffff82caa360 r drm_mode_do_interlace_quirk.cea_interlaced +ffffffff82caa3a0 r edid_4k_modes +ffffffff82caa600 r edid_est_modes +ffffffff82caae00 r est3_modes +ffffffff82caaf60 r stereo_mandatory_modes +ffffffff82caafe0 r extra_modes +ffffffff82cac000 r drm_encoder_enum_list +ffffffff82cae000 r drm_fbdev_dma_helper_funcs +ffffffff82cae010 r drm_fbdev_dma_client_funcs +ffffffff82cae030 r drm_fbdev_dma_fb_ops +ffffffff82caf000 r drm_fbdev_generic_helper_funcs +ffffffff82caf010 r drm_fbdev_generic_client_funcs +ffffffff82caf030 r drm_fbdev_generic_fb_ops +ffffffff82cb1000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82cb1004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82cb1008 r drm_fb_xrgb8888_to_xrgb1555.dst_pixsize +ffffffff82cb100c r drm_fb_xrgb8888_to_argb1555.dst_pixsize +ffffffff82cb1010 r drm_fb_xrgb8888_to_rgba5551.dst_pixsize +ffffffff82cb1014 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff82cb1018 r drm_fb_xrgb8888_to_argb8888.dst_pixsize +ffffffff82cb101c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82cb1020 r drm_fb_xrgb8888_to_argb2101010.dst_pixsize +ffffffff82cb1024 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82cb1028 r drm_fb_xrgb8888_to_xbgr8888.dst_pixsize +ffffffff82cb102c r drm_fb_xrgb8888_to_abgr8888.dst_pixsize +ffffffff82cb2000 r __drm_format_info.formats +ffffffff82cb3000 R drm_pgops +ffffffff82cb4000 r drm_gem_dma_default_funcs +ffffffff82cb5000 R drm_gem_fb_funcs +ffffffff82cb6000 r drm_ioctls +ffffffff82cb8000 r dma_fence_stub_ops +ffffffff82cb8040 R dma_fence_array_ops +ffffffff82cb8080 R dma_fence_chain_ops +ffffffff82cb80c0 R dmabufops +ffffffff82cb80f8 R syncfileops +ffffffff82cb9000 r drm_plane_type_enum_list +ffffffff82cba000 r tv_modes_parameters +ffffffff82cba0c0 r drm_mode_status_names +ffffffff82cba200 r drm_named_modes +ffffffff82cbb000 r primary_plane_funcs +ffffffff82cbb068 r safe_modeset_formats +ffffffff82cbc000 r orientation_data +ffffffff82cc0080 r lcd800x1280_rightside_up +ffffffff82cc0098 r lcd720x1280_rightside_up +ffffffff82cc00b0 r lcd800x1280_leftside_up +ffffffff82cc00c8 r lcd1080x1920_leftside_up +ffffffff82cc00e0 r lcd1600x2560_rightside_up +ffffffff82cc00f8 r lcd1200x1920_rightside_up +ffffffff82cc0110 r gpd_micropc +ffffffff82cc0128 r gpd_pocket +ffffffff82cc0140 r gpd_pocket2 +ffffffff82cc0158 r gpd_win +ffffffff82cc0170 r gpd_win2 +ffffffff82cc0188 r lcd1080x1920_rightside_up +ffffffff82cc01a0 r itworks_tw891 +ffffffff82cc01b8 r lcd1600x2560_leftside_up +ffffffff82cc01d0 r onegx1_pro +ffffffff82cc01e8 r lcd1280x1920_rightside_up +ffffffff82cc0200 r gpd_onemix2s +ffffffff82cc0218 r .compoundliteral +ffffffff82cc0228 r .compoundliteral.5 +ffffffff82cc0250 r .compoundliteral.9 +ffffffff82cc0270 r .compoundliteral.17 +ffffffff82cc02b0 r .compoundliteral.21 +ffffffff82cc02d0 r .compoundliteral.23 +ffffffff82cc02e0 r .compoundliteral.25 +ffffffff82cc02f0 r .compoundliteral.29 +ffffffff82cc1000 r drm_gem_prime_dmabuf_ops +ffffffff82cc3000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82cc4000 r drm_dp_phy_name.phy_names +ffffffff82cc4048 r drm_dp_i2c_algo +ffffffff82cc4058 r drm_dp_i2c_lock_ops +ffffffff82cc4070 r dp_aux_bl_ops +ffffffff82cc4090 r dpcd_quirk_list +ffffffff82cc4320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82cc5000 R drm_dp_mst_topology_state_funcs +ffffffff82cc5020 r drm_dp_mst_req_type_str.req_type_str +ffffffff82cc51f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82cc5220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82cc5278 r drm_dp_mst_i2c_algo +ffffffff82cc6000 r rc_parameters_1_2_444 +ffffffff82cc65f0 r rc_parameters_pre_scr +ffffffff82cc6920 r rc_parameters_1_2_422 +ffffffff82cc6df0 r rc_parameters_1_2_420 +ffffffff82cc8000 r hdmi_colorimetry_val +ffffffff82cc9018 R ttm_bo_vm_ops +ffffffff82cca000 r ttm_range_manager_func +ffffffff82ccb018 r ttm_kmap_iter_io_ops +ffffffff82ccb030 r ttm_kmap_iter_linear_io_ops +ffffffff82ccc000 r ttm_sys_manager_func +ffffffff82ccd000 r ttm_kmap_iter_tt_ops +ffffffff82cce000 r drm_sched_fence_ops_scheduled +ffffffff82cce040 r drm_sched_fence_ops_finished +ffffffff82ccf000 R ch7017_ops +ffffffff82cd0000 R ch7xxx_ops +ffffffff82cd0060 r ch7xxx_ids +ffffffff82cd1000 R ivch_ops +ffffffff82cd1060 r backup_addresses +ffffffff82cd2000 R ns2501_ops +ffffffff82cd2060 r mode_agnostic_values +ffffffff82cd20e0 r ns2501_modes +ffffffff82cd3000 R sil164_ops +ffffffff82cd4000 R tfp410_ops +ffffffff82cd5000 r chv_dpll +ffffffff82cd5050 r vlv_dpll +ffffffff82cd50a0 r g4x_dpll +ffffffff82cd50f0 r pch_dpll +ffffffff82cd5138 r intel_dp_enc_funcs +ffffffff82cd6000 r intel_hdmi_enc_funcs +ffffffff82cd7000 r vlv_primary_formats +ffffffff82cd7030 r ivb_primary_formats +ffffffff82cd7050 r i965_primary_formats +ffffffff82cd7070 r i8xx_primary_formats +ffffffff82cd7080 r i965_plane_funcs +ffffffff82cd70e8 r i8xx_plane_funcs +ffffffff82cd8000 r ilk_wm_funcs +ffffffff82cd8040 r vlv_wm_funcs +ffffffff82cd8080 r g4x_wm_funcs +ffffffff82cd80c0 r nop_funcs +ffffffff82cd8100 r pnv_wm_funcs +ffffffff82cd8140 r i965_wm_funcs +ffffffff82cd8180 r i9xx_wm_funcs +ffffffff82cd81c0 r i845_wm_funcs +ffffffff82cd8200 r cxsr_latency_table +ffffffff82cd9000 r gen11_dsi_encoder_funcs +ffffffff82cd9020 r gen11_dsi_connector_funcs +ffffffff82cd9098 r gen11_dsi_connector_helper_funcs +ffffffff82cd90f8 r gen11_dsi_host_ops +ffffffff82cda000 r intel_plane_helper_funcs +ffffffff82cdb000 r g4x_audio_funcs +ffffffff82cdb018 r ibx_audio_funcs +ffffffff82cdb030 r hsw_audio_funcs +ffffffff82cdb050 r hdmi_audio_clock +ffffffff82cdb0c0 r hdmi_aud_ncts_36bpp +ffffffff82cdb1a0 r hdmi_aud_ncts_30bpp +ffffffff82cdb280 r hdmi_aud_ncts_24bpp +ffffffff82cdc000 r intel_backlight_device_ops +ffffffff82cdc018 r bxt_pwm_funcs +ffffffff82cdc048 r cnp_pwm_funcs +ffffffff82cdc078 r lpt_pwm_funcs +ffffffff82cdc0a8 r spt_pwm_funcs +ffffffff82cdc0d8 r pch_pwm_funcs +ffffffff82cdc108 r ext_pwm_funcs +ffffffff82cdc138 r vlv_pwm_funcs +ffffffff82cdc168 r i965_pwm_funcs +ffffffff82cdc198 r i9xx_pwm_funcs +ffffffff82cdc1c8 r pwm_bl_funcs +ffffffff82cdd000 r bdb_blocks +ffffffff82cdd160 r adlp_aux_ch_map +ffffffff82cdd169 r adls_aux_ch_map +ffffffff82cdd170 r rkl_aux_ch_map +ffffffff82cdd175 r direct_aux_ch_map +ffffffff82cdd17e r translate_iboost.mapping +ffffffff82cdd181 r adlp_ddc_pin_map +ffffffff82cdd18e r adls_ddc_pin_map +ffffffff82cdd19b r rkl_pch_tgp_ddc_pin_map +ffffffff82cdd1a6 r gen9bc_tgp_ddc_pin_map +ffffffff82cdd1b1 r icp_ddc_pin_map +ffffffff82cdd1c0 r cnp_ddc_pin_map +ffffffff82cde000 r mtl_sa_info +ffffffff82cde006 r adlp_sa_info +ffffffff82cde00c r adls_sa_info +ffffffff82cde012 r rkl_sa_info +ffffffff82cde018 r tgl_sa_info +ffffffff82cde020 r intel_bw_funcs +ffffffff82cdf000 r intel_cdclk_funcs +ffffffff82cdf010 r mtl_cdclk_funcs +ffffffff82cdf030 r mtl_cdclk_table +ffffffff82cdf088 r tgl_cdclk_funcs +ffffffff82cdf0b0 r dg2_cdclk_table +ffffffff82cdf160 r adlp_a_step_cdclk_table +ffffffff82cdf1e0 r rplu_cdclk_table +ffffffff82cdf2c8 r rplu_cdclk_funcs +ffffffff82cdf2f0 r adlp_cdclk_table +ffffffff82cdf3b0 r rkl_cdclk_table +ffffffff82cdf4a0 r icl_cdclk_table +ffffffff82cdf588 r ehl_cdclk_funcs +ffffffff82cdf5a8 r icl_cdclk_funcs +ffffffff82cdf5c8 r bxt_cdclk_funcs +ffffffff82cdf5f0 r glk_cdclk_table +ffffffff82cdf620 r bxt_cdclk_table +ffffffff82cdf668 r skl_cdclk_funcs +ffffffff82cdf688 r bdw_cdclk_funcs +ffffffff82cdf6a8 r hsw_cdclk_funcs +ffffffff82cdf6c8 r chv_cdclk_funcs +ffffffff82cdf6e8 r vlv_cdclk_funcs +ffffffff82cdf708 r fixed_400mhz_cdclk_funcs +ffffffff82cdf728 r ilk_cdclk_funcs +ffffffff82cdf748 r gm45_cdclk_funcs +ffffffff82cdf768 r g33_cdclk_funcs +ffffffff82cdf788 r i965gm_cdclk_funcs +ffffffff82cdf7a8 r pnv_cdclk_funcs +ffffffff82cdf7c8 r i945gm_cdclk_funcs +ffffffff82cdf7e8 r i915gm_cdclk_funcs +ffffffff82cdf808 r i915g_cdclk_funcs +ffffffff82cdf828 r i865g_cdclk_funcs +ffffffff82cdf848 r i85x_cdclk_funcs +ffffffff82cdf868 r i845g_cdclk_funcs +ffffffff82cdf888 r i830_cdclk_funcs +ffffffff82cdf8a8 r g33_get_cdclk.div_3200 +ffffffff82cdf8ae r g33_get_cdclk.div_4000 +ffffffff82cdf8b4 r g33_get_cdclk.div_4800 +ffffffff82cdf8ba r g33_get_cdclk.div_5333 +ffffffff82cdf8c0 r i965gm_get_cdclk.div_3200 +ffffffff82cdf8c3 r i965gm_get_cdclk.div_4000 +ffffffff82cdf8c6 r i965gm_get_cdclk.div_5333 +ffffffff82ce0000 r chv_color_funcs +ffffffff82ce0040 r vlv_color_funcs +ffffffff82ce0080 r i965_color_funcs +ffffffff82ce00c0 r i9xx_color_funcs +ffffffff82ce0100 r tgl_color_funcs +ffffffff82ce0140 r icl_color_funcs +ffffffff82ce0180 r glk_color_funcs +ffffffff82ce01c0 r skl_color_funcs +ffffffff82ce0200 r bdw_color_funcs +ffffffff82ce0240 r hsw_color_funcs +ffffffff82ce0280 r ivb_color_funcs +ffffffff82ce02c0 r ilk_color_funcs +ffffffff82ce0300 r chv_cgm_csc_matrix_identity +ffffffff82ce031e r ilk_csc_matrix_rgb_to_ycbcr +ffffffff82ce033c r ilk_csc_matrix_limited_range +ffffffff82ce035a r ilk_csc_matrix_identity +ffffffff82ce1000 r icl_procmon_values +ffffffff82ce2000 r force_audio_names +ffffffff82ce2040 r broadcast_rgb_names +ffffffff82ce3000 r intel_crt_connector_funcs +ffffffff82ce3078 r intel_crt_enc_funcs +ffffffff82ce30a0 r intel_spurious_crt_detect +ffffffff82ce34a8 r intel_crt_connector_helper_funcs +ffffffff82ce4000 r g4x_crtc_funcs +ffffffff82ce40c0 r i965_crtc_funcs +ffffffff82ce4180 r i915gm_crtc_funcs +ffffffff82ce4240 r i915_crtc_funcs +ffffffff82ce4300 r i8xx_crtc_funcs +ffffffff82ce43c0 r bdw_crtc_funcs +ffffffff82ce4480 r ilk_crtc_funcs +ffffffff82ce5000 r output_format_str +ffffffff82ce5020 r output_type_str +ffffffff82ce6000 r intel_cursor_plane_funcs +ffffffff82ce6068 r intel_cursor_formats +ffffffff82ce7000 r mtl_c10_hdmi_tables +ffffffff82ce7170 r mtl_c10_hdmi_25_2 +ffffffff82ce718c r mtl_c10_hdmi_27_0 +ffffffff82ce71a8 r mtl_c10_hdmi_27027 +ffffffff82ce71c4 r mtl_c10_hdmi_28320 +ffffffff82ce71e0 r mtl_c10_hdmi_30240 +ffffffff82ce71fc r mtl_c10_hdmi_31500 +ffffffff82ce7218 r mtl_c10_hdmi_36000 +ffffffff82ce7234 r mtl_c10_hdmi_40000 +ffffffff82ce7250 r mtl_c10_hdmi_49500 +ffffffff82ce726c r mtl_c10_hdmi_50000 +ffffffff82ce7288 r mtl_c10_hdmi_57284 +ffffffff82ce72a4 r mtl_c10_hdmi_58000 +ffffffff82ce72c0 r mtl_c10_hdmi_65000 +ffffffff82ce72dc r mtl_c10_hdmi_71000 +ffffffff82ce72f8 r mtl_c10_hdmi_74176 +ffffffff82ce7314 r mtl_c10_hdmi_74_25 +ffffffff82ce7330 r mtl_c10_hdmi_75000 +ffffffff82ce734c r mtl_c10_hdmi_78750 +ffffffff82ce7368 r mtl_c10_hdmi_85500 +ffffffff82ce7384 r mtl_c10_hdmi_88750 +ffffffff82ce73a0 r mtl_c10_hdmi_106500 +ffffffff82ce73bc r mtl_c10_hdmi_108000 +ffffffff82ce73d8 r mtl_c10_hdmi_115500 +ffffffff82ce73f4 r mtl_c10_hdmi_119000 +ffffffff82ce7410 r mtl_c10_hdmi_135000 +ffffffff82ce742c r mtl_c10_hdmi_138500 +ffffffff82ce7448 r mtl_c10_hdmi_147160 +ffffffff82ce7464 r mtl_c10_hdmi_148352 +ffffffff82ce7480 r mtl_c10_hdmi_148_5 +ffffffff82ce749c r mtl_c10_hdmi_154000 +ffffffff82ce74b8 r mtl_c10_hdmi_162000 +ffffffff82ce74d4 r mtl_c10_hdmi_167000 +ffffffff82ce74f0 r mtl_c10_hdmi_197802 +ffffffff82ce750c r mtl_c10_hdmi_198000 +ffffffff82ce7528 r mtl_c10_hdmi_209800 +ffffffff82ce7544 r mtl_c10_hdmi_241500 +ffffffff82ce7560 r mtl_c10_hdmi_262750 +ffffffff82ce757c r mtl_c10_hdmi_268500 +ffffffff82ce7598 r mtl_c10_hdmi_296703 +ffffffff82ce75b4 r mtl_c10_hdmi_297000 +ffffffff82ce75d0 r mtl_c10_hdmi_319750 +ffffffff82ce75ec r mtl_c10_hdmi_497750 +ffffffff82ce7608 r mtl_c10_hdmi_592000 +ffffffff82ce7624 r mtl_c10_hdmi_593407 +ffffffff82ce7640 r mtl_c10_hdmi_594 +ffffffff82ce7660 r mtl_c20_hdmi_tables +ffffffff82ce76b8 r mtl_c20_hdmi_25_175 +ffffffff82ce76e4 r mtl_c20_hdmi_27_0 +ffffffff82ce7710 r mtl_c20_hdmi_74_25 +ffffffff82ce773c r mtl_c20_hdmi_148_5 +ffffffff82ce7768 r mtl_c20_hdmi_594 +ffffffff82ce7794 r mtl_c20_hdmi_300 +ffffffff82ce77c0 r mtl_c20_hdmi_600 +ffffffff82ce77ec r mtl_c20_hdmi_800 +ffffffff82ce7818 r mtl_c20_hdmi_1000 +ffffffff82ce7844 r mtl_c20_hdmi_1200 +ffffffff82ce7870 r mtl_c10_edp_tables +ffffffff82ce78c0 r mtl_c10_dp_tables +ffffffff82ce78e8 r mtl_c10_dp_rbr +ffffffff82ce7904 r mtl_c10_edp_r216 +ffffffff82ce7920 r mtl_c10_edp_r243 +ffffffff82ce793c r mtl_c10_dp_hbr1 +ffffffff82ce7958 r mtl_c10_edp_r324 +ffffffff82ce7974 r mtl_c10_edp_r432 +ffffffff82ce7990 r mtl_c10_dp_hbr2 +ffffffff82ce79ac r mtl_c10_edp_r675 +ffffffff82ce79c8 r mtl_c10_dp_hbr3 +ffffffff82ce79f0 r mtl_c20_dp_tables +ffffffff82ce7a30 r mtl_c20_dp_rbr +ffffffff82ce7a5c r mtl_c20_dp_hbr1 +ffffffff82ce7a88 r mtl_c20_dp_hbr2 +ffffffff82ce7ab4 r mtl_c20_dp_hbr3 +ffffffff82ce7ae0 r mtl_c20_dp_uhbr13_5 +ffffffff82ce7b0c r mtl_c20_dp_uhbr10 +ffffffff82ce7b38 r mtl_c20_dp_uhbr20 +ffffffff82ce8000 r intel_ddi_funcs +ffffffff82ce8020 r index_to_dp_signal_levels +ffffffff82ce8030 r gen9_chicken_trans_reg_by_port.trans +ffffffff82ce9000 r tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff82ce9010 r _tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff82ce9080 r mtl_c20_trans_uhbr +ffffffff82ce9090 r mtl_c20_trans_hdmi +ffffffff82ce90a0 r mtl_c20_trans_dp14 +ffffffff82ce90b0 r mtl_c10_trans_dp14 +ffffffff82ce90c0 r _mtl_c20_trans_uhbr +ffffffff82ce9180 r _mtl_c20_trans_hdmi +ffffffff82ce91c0 r _mtl_c20_trans_dp14 +ffffffff82ce9240 r _mtl_c10_trans_dp14 +ffffffff82ce92b8 r dg2_snps_trans_uhbr +ffffffff82ce92c8 r dg2_snps_trans +ffffffff82ce92e0 r _dg2_snps_trans_uhbr +ffffffff82ce93a0 r _dg2_snps_trans +ffffffff82ce9418 r icl_combo_phy_trans_hdmi +ffffffff82ce9430 r _icl_combo_phy_trans_hdmi +ffffffff82ce9488 r adlp_combo_phy_trans_edp_hbr3 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bxt_pll_mgr +ffffffff82cfc1c0 r skl_pll_mgr +ffffffff82cfc1f8 r hsw_pll_mgr +ffffffff82cfc230 r pch_pll_mgr +ffffffff82cfc270 r adlp_plls +ffffffff82cfc330 r combo_pll_funcs +ffffffff82cfc350 r tbt_pll_funcs +ffffffff82cfc370 r dkl_pll_funcs +ffffffff82cfc390 r icl_calc_wrpll.dividers +ffffffff82cfc450 r icl_dp_combo_pll_24MHz_values +ffffffff82cfc550 r icl_dp_combo_pll_19_2MHz_values +ffffffff82cfc650 r tgl_tbt_pll_19_2MHz_values +ffffffff82cfc66c r tgl_tbt_pll_24MHz_values +ffffffff82cfc688 r icl_tbt_pll_19_2MHz_values +ffffffff82cfc6a4 r icl_tbt_pll_24MHz_values +ffffffff82cfc6c0 r adls_plls +ffffffff82cfc740 r dg1_plls +ffffffff82cfc7c0 r rkl_plls +ffffffff82cfc820 r tgl_plls +ffffffff82cfc910 r ehl_plls +ffffffff82cfc970 r icl_plls +ffffffff82cfca30 r mg_pll_funcs +ffffffff82cfca50 r bxt_plls +ffffffff82cfcab0 r bxt_ddi_pll_funcs +ffffffff82cfcad0 r bxt_dp_clk_val +ffffffff82cfcbd0 r skl_plls +ffffffff82cfcc48 r skl_ddi_dpll0_funcs +ffffffff82cfcc68 r skl_ddi_pll_funcs +ffffffff82cfcc90 r skl_dpll_regs +ffffffff82cfccc0 r skl_ddi_calculate_wrpll.even_dividers +ffffffff82cfcce4 r skl_ddi_calculate_wrpll.odd_dividers +ffffffff82cfccf0 r skl_ddi_calculate_wrpll.dividers +ffffffff82cfcd10 r hsw_plls +ffffffff82cfcdb8 r hsw_ddi_wrpll_funcs +ffffffff82cfcdd8 r hsw_ddi_spll_funcs +ffffffff82cfcdf8 r hsw_ddi_lcpll_funcs +ffffffff82cfce20 r pch_plls +ffffffff82cfce68 r ibx_pch_dpll_funcs +ffffffff82cfd000 r intel_drrs_type_str.str +ffffffff82cfe000 r dcs_bl_funcs +ffffffff82cff000 r intel_dvo_enc_funcs +ffffffff82cff020 r intel_dvo_connector_funcs +ffffffff82cff098 r intel_dvo_connector_helper_funcs +ffffffff82cff100 r intel_dvo_devices +ffffffff82d00000 r intel_modifiers +ffffffff82d00200 r intel_fb_funcs +ffffffff82d00220 r gen12_ccs_formats +ffffffff82d00360 r gen12_ccs_cc_formats +ffffffff82d003c0 r gen12_flat_ccs_cc_formats +ffffffff82d00420 r skl_ccs_formats +ffffffff82d01000 r ivb_fbc_funcs +ffffffff82d01038 r snb_fbc_funcs +ffffffff82d01070 r ilk_fbc_funcs +ffffffff82d010a8 r g4x_fbc_funcs +ffffffff82d010e0 r i965_fbc_funcs +ffffffff82d01118 r i8xx_fbc_funcs +ffffffff82d02000 r intel_fb_helper_funcs +ffffffff82d02010 r intelfb_ops +ffffffff82d03000 r ilk_funcs +ffffffff82d03008 r gen6_funcs +ffffffff82d03010 r ivb_funcs +ffffffff82d04000 r gmbus_algorithm +ffffffff82d04010 r gmbus_lock_ops +ffffffff82d04030 r gmbus_pins_dg2 +ffffffff82d040d0 r gmbus_pins_dg1 +ffffffff82d04120 r gmbus_pins_mtp +ffffffff82d041f0 r gmbus_pins_icp +ffffffff82d042e0 r gmbus_pins_cnp +ffffffff82d04330 r gmbus_pins_bxt +ffffffff82d04370 r gmbus_pins_skl +ffffffff82d043e0 r gmbus_pins_bdw +ffffffff82d04450 r gmbus_pins +ffffffff82d06000 r gsc_hdcp_ops +ffffffff82d07000 r intel_hdmi_connector_funcs +ffffffff82d07078 r intel_hdmi_connector_helper_funcs +ffffffff82d070d8 r intel_hdmi_hdcp_shim +ffffffff82d07190 r hdcp2_msg_timeout +ffffffff82d08000 r i915_hpd_funcs +ffffffff82d08010 r icp_hpd_funcs +ffffffff82d08020 r dg1_hpd_funcs +ffffffff82d08030 r xelpdp_hpd_funcs +ffffffff82d08040 r gen11_hpd_funcs +ffffffff82d08050 r bxt_hpd_funcs +ffffffff82d08060 r spt_hpd_funcs +ffffffff82d08070 r ilk_hpd_funcs +ffffffff82d08080 r hpd_status_g4x +ffffffff82d080c0 r hpd_status_i915 +ffffffff82d08100 r hpd_xelpdp +ffffffff82d08140 r hpd_gen11 +ffffffff82d08180 r hpd_sde_dg1 +ffffffff82d081c0 r hpd_mtp +ffffffff82d08200 r hpd_icp +ffffffff82d08240 r hpd_spt +ffffffff82d08280 r hpd_cpt +ffffffff82d082c0 r hpd_ibx +ffffffff82d08300 r hpd_bxt +ffffffff82d08340 r hpd_bdw +ffffffff82d08380 r hpd_ivb +ffffffff82d083c0 r hpd_ilk +ffffffff82d08400 r hpd_mask_i915 +ffffffff82d09000 r load_detect_mode +ffffffff82d0b000 r intel_no_lvds +ffffffff82d0d448 r intel_lvds_connector_funcs +ffffffff82d0d4c0 r intel_lvds_enc_funcs +ffffffff82d0d4e0 r intel_lvds_connector_helper_funcs +ffffffff82d0d540 r intel_dual_link_lvds +ffffffff82d0e000 r power_state_map +ffffffff82d0e030 r intel_no_opregion_vbt +ffffffff82d0e2e0 r intel_use_opregion_panel_type +ffffffff82d0f000 r y_static_hcoeffs +ffffffff82d0f0b0 r uv_static_hcoeffs +ffffffff82d10000 r intel_pmdemand_funcs +ffffffff82d12014 r hsw_psr_setup_aux.aux_msg +ffffffff82d13000 r rc_range_minqp420_8bpc +ffffffff82d13100 r rc_range_minqp444_8bpc +ffffffff82d13330 r rc_range_minqp420_10bpc +ffffffff82d13490 r rc_range_minqp444_10bpc +ffffffff82d13770 r rc_range_minqp420_12bpc +ffffffff82d13930 r rc_range_minqp444_12bpc +ffffffff82d13cd0 r rc_range_maxqp420_8bpc +ffffffff82d13dd0 r rc_range_maxqp444_8bpc +ffffffff82d14000 r rc_range_maxqp420_10bpc +ffffffff82d14160 r rc_range_maxqp444_10bpc +ffffffff82d14440 r rc_range_maxqp420_12bpc +ffffffff82d14600 r rc_range_maxqp444_12bpc +ffffffff82d15000 r intel_quirks +ffffffff82d15240 r .compoundliteral +ffffffff82d15648 r .compoundliteral.9 +ffffffff82d16000 r intel_sdvo_enc_funcs +ffffffff82d16020 r intel_sdvo_ddc_proxy +ffffffff82d16030 r proxy_lock_ops +ffffffff82d16050 r sdvo_cmd_names +ffffffff82d16410 r cmd_status_names +ffffffff82d16450 r intel_sdvo_output_setup.probe_order +ffffffff82d16468 r intel_sdvo_connector_funcs +ffffffff82d164e0 r intel_sdvo_connector_helper_funcs +ffffffff82d16540 r sdvo_tv_modes +ffffffff82d16e30 r tv_format_names +ffffffff82d17000 r dg2_hdmi_tables +ffffffff82d17170 r dg2_edp_tables +ffffffff82d171c0 r dg2_dp_100_tables +ffffffff82d171f8 r dg2_dp_rbr_100 +ffffffff82d1721c r dg2_edp_r216 +ffffffff82d17240 r dg2_edp_r243 +ffffffff82d17264 r dg2_dp_hbr1_100 +ffffffff82d17288 r dg2_edp_r324 +ffffffff82d172ac r dg2_edp_r432 +ffffffff82d172d0 r dg2_dp_hbr2_100 +ffffffff82d172f4 r dg2_dp_hbr3_100 +ffffffff82d17318 r dg2_dp_uhbr10_100 +ffffffff82d1733c r dg2_dp_uhbr13_100 +ffffffff82d17360 r dg2_hdmi_25_175 +ffffffff82d17384 r dg2_hdmi_27_0 +ffffffff82d173a8 r dg2_hdmi_74_25 +ffffffff82d173cc r dg2_hdmi_148_5 +ffffffff82d173f0 r dg2_hdmi_297 +ffffffff82d17414 r dg2_hdmi_594 +ffffffff82d17438 r dg2_hdmi_25200 +ffffffff82d1745c r dg2_hdmi_27027 +ffffffff82d17480 r dg2_hdmi_28320 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ntsc_m_levels_svideo +ffffffff82d1a79c r ntsc_m_csc_composite +ffffffff82d1a7b4 r ntsc_m_csc_svideo +ffffffff82d1a7d0 r filter_table +ffffffff82d1ab08 r ntsc_j_levels_composite +ffffffff82d1ab0e r ntsc_j_levels_svideo +ffffffff82d1ab14 r ntsc_j_csc_composite +ffffffff82d1ab2c r ntsc_j_csc_svideo +ffffffff82d1ab44 r pal_m_levels_composite +ffffffff82d1ab4a r pal_m_levels_svideo +ffffffff82d1ab50 r pal_m_csc_composite +ffffffff82d1ab68 r pal_m_csc_svideo +ffffffff82d1ab80 r pal_n_levels_composite +ffffffff82d1ab86 r pal_n_levels_svideo +ffffffff82d1ab8c r pal_n_csc_composite +ffffffff82d1aba4 r pal_n_csc_svideo +ffffffff82d1abbc r pal_levels_composite +ffffffff82d1abc2 r pal_levels_svideo +ffffffff82d1abc8 r pal_csc_composite +ffffffff82d1abe0 r pal_csc_svideo +ffffffff82d1abf8 r component_levels +ffffffff82d1abfe r sdtv_csc_yprpb +ffffffff82d1ac16 r hdtv_csc_yprpb +ffffffff82d1ac30 r input_res_table +ffffffff82d1b000 r calculate_rc_params.ofs_und4 +ffffffff82d1b00f r calculate_rc_params.ofs_und6.1 +ffffffff82d1b01e r calculate_rc_params.ofs_und12 +ffffffff82d1b02d r calculate_rc_params.ofs_und15 +ffffffff82d1d000 r gen12_plane_funcs +ffffffff82d1d068 r skl_plane_funcs +ffffffff82d1d0d0 r icl_program_input_csc.input_csc_matrix +ffffffff82d1d110 r icl_hdr_plane_formats +ffffffff82d1d190 r icl_sdr_y_plane_formats +ffffffff82d1d1f0 r icl_sdr_uv_plane_formats +ffffffff82d1d260 r glk_planar_formats +ffffffff82d1d2b0 r skl_plane_formats +ffffffff82d1d2f0 r skl_planar_formats +ffffffff82d1e000 r skl_wm_funcs +ffffffff82d1e040 r intel_dbuf_funcs +ffffffff82d1e050 r adlp_allowed_dbufs +ffffffff82d1e0c0 r dg2_allowed_dbufs +ffffffff82d1e120 r tgl_allowed_dbufs +ffffffff82d1e180 r icl_allowed_dbufs +ffffffff82d1f000 r intel_dsi_funcs +ffffffff82d1f020 r intel_dsi_host_ops +ffffffff82d1f038 r intel_dsi_connector_funcs +ffffffff82d1f0b0 r intel_dsi_connector_helper_funcs +ffffffff82d20000 r lfsr_converts +ffffffff82d21000 r clflush_ops +ffffffff82d22000 r create_extensions +ffffffff82d22010 r set_proto_ctx_engines_extensions ffffffff82d23000 r create_extensions -ffffffff82d23010 r set_proto_ctx_engines_extensions -ffffffff82d24000 r create_extensions -ffffffff82d25000 r i915_dmabuf_ops -ffffffff82d26000 r execbuf_extensions -ffffffff82d26010 r user_ring_map -ffffffff82d27000 r i915_gem_object_internal_ops -ffffffff82d28000 r i915_gem_object_funcs -ffffffff82d29000 R i915_gem_shmem_ops -ffffffff82d29080 r shmem_region_ops -ffffffff82d2a000 r i915_region_stolen_lmem_ops -ffffffff82d2a020 r i915_region_stolen_smem_ops -ffffffff82d2a040 r i915_gem_object_stolen_ops -ffffffff82d2b000 R vm_ops_ttm -ffffffff82d2b048 r i915_gem_ttm_obj_ops -ffffffff82d2b0c8 r ttm_system_region_ops -ffffffff82d2b0e8 r sys_placement_flags -ffffffff82d2b0f8 r tt_rsgt_ops -ffffffff82d2c000 r dma_fence_memcpy_ops -ffffffff82d2d000 r i915_ttm_recover_region.recover_ops -ffffffff82d2d020 r i915_ttm_backup_region.backup_ops -ffffffff82d2d028 r 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i915_gem_object_internal_ops +ffffffff82d27000 r i915_gem_object_funcs +ffffffff82d28000 R i915_gem_shmem_ops +ffffffff82d28080 r shmem_region_ops +ffffffff82d29000 r i915_region_stolen_lmem_ops +ffffffff82d29020 r i915_region_stolen_smem_ops +ffffffff82d29040 r i915_gem_object_stolen_ops +ffffffff82d2a000 R vm_ops_ttm +ffffffff82d2a048 r i915_gem_ttm_obj_ops +ffffffff82d2a0c8 r ttm_system_region_ops +ffffffff82d2a0e8 r sys_placement_flags +ffffffff82d2a0f8 r tt_rsgt_ops +ffffffff82d2b000 r dma_fence_memcpy_ops +ffffffff82d2c000 r i915_ttm_recover_region.recover_ops +ffffffff82d2c020 r i915_ttm_backup_region.backup_ops +ffffffff82d2c028 r i915_ttm_restore_region.restore_ops +ffffffff82d2d000 r pd_dummy_obj_ops +ffffffff82d2d080 r pd_vma_ops +ffffffff82d2e000 r gen6_null_state_relocs +ffffffff82d2e020 r gen6_null_state_batch +ffffffff82d2e470 R gen6_null_state +ffffffff82d2f000 r hsw_clear_kernel +ffffffff82d2f340 r ivb_clear_kernel +ffffffff82d30000 r gen7_null_state_relocs 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gen7_render_regs +ffffffff82d4b600 r hsw_render_regs +ffffffff82d4b7a0 r gen7_video_cmds +ffffffff82d4ba10 r gen9_blt_cmds +ffffffff82d4c040 r gen7_blt_cmds +ffffffff82d4c250 r hsw_blt_cmds +ffffffff82d4c300 r gen9_blt_regs +ffffffff82d4c4e0 r gen7_blt_regs +ffffffff82d4c540 r gen7_vecs_cmds +ffffffff82d4d000 R inteldrm_backlight_ops +ffffffff82d4d018 R inteldrm_ca +ffffffff82d4d040 r i915_drm_driver +ffffffff82d4d130 r i915_ioctls +ffffffff82d4e000 r init_funcs +ffffffff82d4f000 R pciidlist +ffffffff82d511d8 r i830_info +ffffffff82d51240 r i845g_info +ffffffff82d512a8 r i85x_info +ffffffff82d51310 r i865g_info +ffffffff82d51378 r i915g_info +ffffffff82d513e0 r i915gm_info +ffffffff82d51448 r i945g_info +ffffffff82d514b0 r i945gm_info +ffffffff82d51518 r i965g_info +ffffffff82d51580 r g33_info +ffffffff82d515e8 r i965gm_info +ffffffff82d51650 r gm45_info +ffffffff82d516b8 r g45_info +ffffffff82d51720 r pnv_g_info +ffffffff82d51788 r pnv_m_info +ffffffff82d517f0 r ilk_d_info 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gen3_clock_gating_funcs +ffffffff82d5a0b8 r i85x_clock_gating_funcs +ffffffff82d5a0c0 r i830_clock_gating_funcs +ffffffff82d5b000 r platform_names +ffffffff82d5b140 r subplatform_ult_ids +ffffffff82d5b1a4 r no_display +ffffffff82d5c000 r intel_region_map +ffffffff82d5e000 r dg2_g10_revid_step_tbl +ffffffff82d5e030 r dg2_g11_revid_step_tbl +ffffffff82d5e050 r xehpsdv_revids +ffffffff82d5e080 r adlp_rplp_revids +ffffffff82d5e0a0 r adlp_revids +ffffffff82d5e0e0 r adls_rpls_revids +ffffffff82d5e120 r adls_revids +ffffffff82d5e160 r rkl_revids +ffffffff82d5e180 r bxt_revids +ffffffff82d5e1c0 r skl_revids +ffffffff82d5e1f0 r pvc_bd_subids +ffffffff82d5e210 r pvc_ct_subids +ffffffff82d60000 r forcewake_domain_names +ffffffff82d60080 r __mtl_fw_ranges +ffffffff82d60200 r mtl_shadowed_regs +ffffffff82d60280 r __pvc_fw_ranges +ffffffff82d60430 r pvc_shadowed_regs +ffffffff82d60550 r __dg2_fw_ranges +ffffffff82d60820 r dg2_shadowed_regs +ffffffff82d60940 r __xehp_fw_ranges +ffffffff82d60c10 r gen12_shadowed_regs +ffffffff82d60d30 r __gen12_fw_ranges +ffffffff82d60f40 r __gen11_fw_ranges +ffffffff82d610f0 r gen11_shadowed_regs +ffffffff82d611b0 r __gen9_fw_ranges +ffffffff82d61330 r gen8_shadowed_regs +ffffffff82d61360 r __chv_fw_ranges +ffffffff82d61420 r __gen6_fw_ranges +ffffffff82d61430 r __vlv_fw_ranges +ffffffff82d61488 r uncore_get_fallback +ffffffff82d61490 r uncore_get_normal +ffffffff82d61498 r uncore_get_thread_status +ffffffff82d614a0 r __xelpmp_fw_ranges +ffffffff82d615d0 r xelpmp_shadowed_regs +ffffffff82d62000 r i915_pxp_tee_component_ops +ffffffff82d63000 r intel_dram_type_str.str +ffffffff82d64000 r atom_op_names +ffffffff82d643e0 r opcode_table +ffffffff82d64b90 r atom_dst_to_src +ffffffff82d64c10 r atom_io_names +ffffffff82d64c40 r atom_table_names +ffffffff82d64e90 r atom_iio_len +ffffffff82d65000 r atombios_helper_funcs +ffffffff82d65080 r vga_control_regs +ffffffff82d66000 r voltage_names +ffffffff82d66020 r pre_emph_names +ffffffff82d67000 r radeon_atom_backlight_ops +ffffffff82d67018 r radeon_atom_enc_funcs +ffffffff82d67038 r radeon_atom_dig_helper_funcs +ffffffff82d670a0 r radeon_atom_dac_helper_funcs +ffffffff82d67108 r radeon_atom_ext_helper_funcs +ffffffff82d68000 r caicos_cgcg_cgls_default +ffffffff82d68240 r barts_mgcg_default +ffffffff82d68900 r turks_mgcg_default +ffffffff82d68d80 r caicos_mgcg_default +ffffffff82d69110 r turks_sysls_default +ffffffff82d691d0 r caicos_sysls_default +ffffffff82d69280 r caicos_cgcg_cgls_enable +ffffffff82d694d0 r caicos_cgcg_cgls_disable +ffffffff82d69730 r barts_mgcg_enable +ffffffff82d697b0 r turks_mgcg_enable +ffffffff82d69830 r caicos_mgcg_enable +ffffffff82d698b0 r caicos_mgcg_disable +ffffffff82d69930 r turks_sysls_enable +ffffffff82d699f0 r caicos_sysls_enable +ffffffff82d69aa0 r turks_sysls_disable +ffffffff82d69b60 r caicos_sysls_disable +ffffffff82d6a000 r didt_config_ci +ffffffff82d6a5b4 r defaults_bonaire_xt +ffffffff82d6a600 r defaults_saturn_xt +ffffffff82d6a64c r defaults_hawaii_xt +ffffffff82d6a698 r defaults_hawaii_pro +ffffffff82d6b000 r ci_program_jump_on_start.data +ffffffff82d6c000 r bonaire_io_mc_regs +ffffffff82d6c120 r hawaii_io_mc_regs +ffffffff82d6c1d0 r mc_cg_registers +ffffffff82d6c200 r bonaire_mgcg_cgcg_init +ffffffff82d6c5e0 r bonaire_golden_registers +ffffffff82d6c7d0 r bonaire_golden_common_registers +ffffffff82d6c800 r bonaire_golden_spm_registers +ffffffff82d6c810 r kalindi_mgcg_cgcg_init +ffffffff82d6cab0 r kalindi_golden_registers +ffffffff82d6cc20 r kalindi_golden_common_registers +ffffffff82d6cc50 r kalindi_golden_spm_registers +ffffffff82d6cc60 r godavari_golden_registers +ffffffff82d6cde0 r spectre_mgcg_cgcg_init +ffffffff82d6d200 r spectre_golden_registers +ffffffff82d6d330 r spectre_golden_common_registers +ffffffff82d6d360 r spectre_golden_spm_registers +ffffffff82d6d370 r hawaii_mgcg_cgcg_init +ffffffff82d6d880 r hawaii_golden_registers +ffffffff82d6da30 r hawaii_golden_common_registers +ffffffff82d6da6c r hawaii_golden_spm_registers +ffffffff82d6da80 r spectre_rlc_save_restore_register_list +ffffffff82d6e170 r kalindi_rlc_save_restore_register_list +ffffffff82d6e680 r ci_cs_data +ffffffff82d6e6a0 r ci_SECT_CONTEXT_defs +ffffffff82d6e720 r ci_SECT_CONTEXT_def_1 +ffffffff82d6ea70 r ci_SECT_CONTEXT_def_3 +ffffffff82d6ea90 r ci_SECT_CONTEXT_def_4 +ffffffff82d6ed04 r ci_SECT_CONTEXT_def_5 +ffffffff82d6ed0c r ci_SECT_CONTEXT_def_6 +ffffffff82d6ed10 r ci_SECT_CONTEXT_def_2 +ffffffff82d6f160 r ci_SECT_CONTEXT_def_7 +ffffffff82d6f510 r cik_default_state +ffffffff82d71000 r dce3_2_afmt_write_sad_regs.eld_reg_to_type +ffffffff82d72000 r dce6_afmt_write_sad_regs.eld_reg_to_type +ffffffff82d73000 r ni_tx_offsets +ffffffff82d73020 r evergreen_dp_offsets +ffffffff82d73040 r evergreen_disp_int_status +ffffffff82d73060 r evergreen_golden_registers +ffffffff82d73260 r evergreen_golden_registers2 +ffffffff82d73310 r cypress_mgcg_init +ffffffff82d73a10 r juniper_mgcg_init +ffffffff82d73e80 r redwood_mgcg_init +ffffffff82d741b0 r cedar_golden_registers +ffffffff82d74390 r cedar_mgcg_init +ffffffff82d745f0 r wrestler_golden_registers +ffffffff82d74840 r supersumo_golden_registers +ffffffff82d74ba0 r sumo_golden_registers +ffffffff82d74be0 r barts_golden_registers +ffffffff82d74e00 r turks_golden_registers +ffffffff82d75040 r caicos_golden_registers +ffffffff82d75280 r sumo_rlc_save_restore_register_list +ffffffff82d753d0 r evergreen_cs_data +ffffffff82d75410 r SECT_CONTEXT_defs +ffffffff82d75490 r SECT_CLEAR_defs +ffffffff82d754b0 r SECT_CTRLCONST_defs +ffffffff82d754d0 r SECT_CONTEXT_def_2 +ffffffff82d754f0 r SECT_CONTEXT_def_4 +ffffffff82d75680 r SECT_CONTEXT_def_5 +ffffffff82d756a0 r SECT_CONTEXT_def_6 +ffffffff82d75780 r SECT_CONTEXT_def_1 +ffffffff82d75f20 r SECT_CONTEXT_def_3 +ffffffff82d76000 r SECT_CONTEXT_def_7 +ffffffff82d76488 r SECT_CLEAR_def_1 +ffffffff82d76494 r SECT_CTRLCONST_def_1 +ffffffff82d764a0 r evergreen_default_state +ffffffff82d77000 r cayman_reg_safe_bm +ffffffff82d79000 r evergreen_reg_safe_bm +ffffffff82d7c000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82d7d000 r didt_config_kv +ffffffff82d7e000 r barts_io_mc_regs +ffffffff82d7e0f0 r turks_io_mc_regs +ffffffff82d7e1e0 r caicos_io_mc_regs +ffffffff82d7e2d0 r cayman_io_mc_regs +ffffffff82d7e3c0 r cayman_golden_registers +ffffffff82d7e580 r cayman_golden_registers2 +ffffffff82d7e5d0 r dvst_golden_registers +ffffffff82d7e860 r dvst_golden_registers2 +ffffffff82d7e890 r scrapper_golden_registers +ffffffff82d7ed70 r tn_rlc_save_restore_register_list +ffffffff82d7ef60 r cayman_cs_data +ffffffff82d7efa0 r SECT_CONTEXT_defs +ffffffff82d7f020 r SECT_CLEAR_defs +ffffffff82d7f040 r SECT_CTRLCONST_defs +ffffffff82d7f060 r SECT_CONTEXT_def_2 +ffffffff82d7f080 r SECT_CONTEXT_def_4 +ffffffff82d7f210 r SECT_CONTEXT_def_5 +ffffffff82d7f230 r SECT_CONTEXT_def_1 +ffffffff82d7f9d0 r SECT_CONTEXT_def_3 +ffffffff82d7fab0 r SECT_CONTEXT_def_6 +ffffffff82d7fb90 r SECT_CONTEXT_def_7 +ffffffff82d80018 r SECT_CLEAR_def_1 +ffffffff82d80024 r SECT_CTRLCONST_def_1 +ffffffff82d80030 r cayman_default_state +ffffffff82d81000 r cac_weights_cayman_xt +ffffffff82d81128 r cac_weights_cayman_pro +ffffffff82d81250 r cac_weights_cayman_le +ffffffff82d81380 r cayman_cgcg_cgls_default +ffffffff82d815c0 r cayman_mgcg_default +ffffffff82d81f20 r cayman_sysls_default +ffffffff82d81ff0 r cayman_cgcg_cgls_enable +ffffffff82d82240 r cayman_cgcg_cgls_disable +ffffffff82d824a0 r cayman_mgcg_enable +ffffffff82d82520 r cayman_mgcg_disable +ffffffff82d825a0 r cayman_sysls_enable +ffffffff82d82670 r cayman_sysls_disable +ffffffff82d83000 r rn50_reg_safe_bm +ffffffff82d831a0 r r100_reg_safe_bm +ffffffff82d84000 r r200_reg_safe_bm +ffffffff82d85000 r r300_reg_safe_bm +ffffffff82d86000 r r420_reg_safe_bm +ffffffff82d88000 r color_formats_table +ffffffff82d88480 r r600_reg_safe_bm +ffffffff82d8b000 R r600_utc +ffffffff82d8b040 R r600_dtc +ffffffff82d8b080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82d8d000 r r100_gfx_ring +ffffffff82d8d070 r r300_gfx_ring +ffffffff82d8d0e0 r rv515_gfx_ring +ffffffff82d8d150 r r600_gfx_ring +ffffffff82d8d1c0 r r600_dma_ring +ffffffff82d8d230 r rv6xx_uvd_ring +ffffffff82d8d2a0 r rv770_uvd_ring +ffffffff82d8d310 r evergreen_gfx_ring +ffffffff82d8d380 r evergreen_dma_ring +ffffffff82d8d3f0 r cayman_gfx_ring +ffffffff82d8d460 r cayman_dma_ring +ffffffff82d8d4d0 r cayman_uvd_ring +ffffffff82d8d540 r trinity_vce_ring +ffffffff82d8d5b0 r si_gfx_ring +ffffffff82d8d620 r si_dma_ring +ffffffff82d8d690 r ci_gfx_ring +ffffffff82d8d700 r ci_cp_ring +ffffffff82d8d770 r ci_dma_ring +ffffffff82d8d7e0 r ci_vce_ring +ffffffff82d8e000 r object_connector_convert +ffffffff82d8e060 r supported_devices_connector_convert +ffffffff82d8e0a0 r supported_devices_connector_object_id_convert +ffffffff82d8e0c0 r thermal_controller_names +ffffffff82d8e100 r pp_lib_thermal_controller_names +ffffffff82d8f000 r pin_offsets +ffffffff82d8f020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff82d91000 r thermal_controller_names +ffffffff82d91020 r default_primarydac_adj +ffffffff82d91120 r default_tvdac_adj +ffffffff82d91220 r default_tmds_pll +ffffffff82d92000 r radeon_dp_connector_funcs +ffffffff82d92078 r radeon_dp_connector_helper_funcs +ffffffff82d920d8 r radeon_lvds_bridge_connector_funcs +ffffffff82d92150 r radeon_vga_connector_funcs +ffffffff82d921c8 r radeon_vga_connector_helper_funcs +ffffffff82d92228 r radeon_dvi_connector_funcs +ffffffff82d922a0 r radeon_dvi_connector_helper_funcs +ffffffff82d92300 r radeon_edp_connector_funcs +ffffffff82d92378 r radeon_tv_connector_funcs +ffffffff82d923f0 r radeon_tv_connector_helper_funcs +ffffffff82d92450 r radeon_lvds_connector_funcs +ffffffff82d924c8 r radeon_lvds_connector_helper_funcs +ffffffff82d93000 r radeon_family_name +ffffffff82d933f0 r radeon_px_quirk_list +ffffffff82d94000 r radeon_fb_funcs +ffffffff82d94018 r radeon_mode_funcs +ffffffff82d94060 r radeon_tmds_pll_enum_list +ffffffff82d94080 r radeon_tv_std_enum_list +ffffffff82d94100 r radeon_underscan_enum_list +ffffffff82d94130 r radeon_audio_enum_list +ffffffff82d94160 r radeon_dither_enum_list +ffffffff82d94180 r radeon_output_csc_enum_list +ffffffff82d941c0 r radeon_crtc_funcs +ffffffff82d94280 r hpd_names +ffffffff82d942b0 r encoder_names +ffffffff82d943e0 r radeon_afmt_init.eg_offsets +ffffffff82d95000 r aux_offset +ffffffff82d96000 R radeondrm_ca +ffffffff82d96030 r pciidlist +ffffffff82d9a1d0 r kms_driver +ffffffff82d9a2c0 r radeon_ioctls_kms +ffffffff82d9b000 r radeon_fbdev_fb_helper_funcs +ffffffff82d9b010 r radeon_fbdev_client_funcs +ffffffff82d9b030 r radeon_fbdev_fb_ops +ffffffff82d9c000 R radeon_fence_ops +ffffffff82d9e000 R radeon_gem_object_funcs +ffffffff82d9e070 r radeon_gem_vm_ops +ffffffff82d9f000 r radeon_i2c_algo +ffffffff82d9f010 r radeon_atom_i2c_algo +ffffffff82da0000 r legacy_helper_funcs +ffffffff82da1000 r radeon_backlight_ops +ffffffff82da1018 r radeon_legacy_lvds_enc_funcs +ffffffff82da1038 r radeon_legacy_lvds_helper_funcs +ffffffff82da10a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82da10c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82da1128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82da1148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82da11b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82da11d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82da1238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82da1258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82da2000 r SLOPE_value +ffffffff82da2030 r YCOEF_EN_value +ffffffff82da2060 r YCOEF_value +ffffffff82da2090 r available_tv_modes +ffffffff82da2110 r hor_timing_NTSC +ffffffff82da2150 r vert_timing_NTSC +ffffffff82da2190 r hor_timing_PAL +ffffffff82da21d0 r vert_timing_PAL +ffffffff82da4000 r radeon_pm_state_type_name +ffffffff82da5000 r radeon_evict_flags.placements +ffffffff82da8000 r rs600_reg_safe_bm +ffffffff82daa000 r rv515_reg_safe_bm +ffffffff82dab000 r dll_speed_table +ffffffff82dac000 r r7xx_golden_registers +ffffffff82dac090 r r7xx_golden_dyn_gpr_registers +ffffffff82dac100 r rv770ce_golden_registers +ffffffff82dac160 r rv770_golden_registers +ffffffff82dac1b0 r rv770_mgcg_init +ffffffff82dac8f0 r rv730_golden_registers +ffffffff82dac950 r rv730_mgcg_init +ffffffff82dacee0 r rv710_golden_registers +ffffffff82dacf30 r rv710_mgcg_init +ffffffff82dad1d0 r rv740_golden_registers +ffffffff82dad360 r rv740_mgcg_init +ffffffff82daf000 r rv730_smc_int_vectors +ffffffff82daf040 r rv710_smc_int_vectors +ffffffff82daf080 r rv740_smc_int_vectors +ffffffff82daf0c0 r cypress_smc_int_vectors +ffffffff82daf100 r caicos_smc_int_vectors +ffffffff82daf140 r cayman_smc_int_vectors +ffffffff82db0000 r tahiti_io_mc_regs +ffffffff82db0120 r pitcairn_io_mc_regs +ffffffff82db0240 r verde_io_mc_regs +ffffffff82db0360 r oland_io_mc_regs +ffffffff82db0480 r hainan_io_mc_regs +ffffffff82db05a0 r crtc_offsets +ffffffff82db05c0 r si_disp_int_status +ffffffff82db05e0 r tahiti_golden_registers +ffffffff82db0760 r tahiti_golden_rlc_registers +ffffffff82db07b0 r tahiti_mgcg_cgcg_init +ffffffff82db0d98 r tahiti_golden_registers2 +ffffffff82db0db0 r pitcairn_golden_registers +ffffffff82db0f00 r pitcairn_golden_rlc_registers +ffffffff82db0f40 r pitcairn_mgcg_cgcg_init +ffffffff82db13b0 r verde_golden_registers +ffffffff82db1620 r verde_golden_rlc_registers +ffffffff82db1660 r verde_mgcg_cgcg_init +ffffffff82db1ae0 r oland_golden_registers +ffffffff82db1c30 r oland_golden_rlc_registers +ffffffff82db1c70 r oland_mgcg_cgcg_init +ffffffff82db2000 r hainan_golden_registers +ffffffff82db212c r hainan_golden_registers2 +ffffffff82db2140 r hainan_mgcg_cgcg_init +ffffffff82db24b0 r verde_rlc_save_restore_register_list +ffffffff82db2820 r si_cs_data +ffffffff82db2840 r si_SECT_CONTEXT_defs +ffffffff82db28c0 r si_SECT_CONTEXT_def_1 +ffffffff82db2c10 r si_SECT_CONTEXT_def_3 +ffffffff82db2c30 r si_SECT_CONTEXT_def_4 +ffffffff82db2ea4 r si_SECT_CONTEXT_def_5 +ffffffff82db2ea8 r si_SECT_CONTEXT_def_6 +ffffffff82db2eb0 r si_SECT_CONTEXT_def_2 +ffffffff82db32f0 r si_SECT_CONTEXT_def_7 +ffffffff82db36a0 r mc_cg_registers +ffffffff82db36d0 r si_default_state +ffffffff82db4000 r cac_weights_tahiti +ffffffff82db44d0 r lcac_tahiti +ffffffff82db4ba0 r cac_override_tahiti +ffffffff82db4bb4 r powertune_data_tahiti +ffffffff82db4bf0 r dte_data_tahiti +ffffffff82db4cc0 r dte_data_new_zealand +ffffffff82db4d90 r dte_data_malta +ffffffff82db4e60 r lcac_pitcairn +ffffffff82db5530 r cac_override_pitcairn +ffffffff82db5544 r powertune_data_pitcairn +ffffffff82db5580 r lcac_cape_verde +ffffffff82db59d0 r cac_override_cape_verde +ffffffff82db59e4 r powertune_data_cape_verde +ffffffff82db5a20 r cac_weights_cape_verde_pro +ffffffff82db5ef0 r cac_weights_heathrow +ffffffff82db63c0 r cac_weights_chelsea_xt +ffffffff82db6890 r cac_weights_chelsea_pro +ffffffff82db6d60 r cac_weights_cape_verde +ffffffff82db7230 r cac_weights_mars_pro +ffffffff82db7700 r lcac_mars_pro +ffffffff82db7a60 r cac_override_oland +ffffffff82db7a74 r powertune_data_mars_pro +ffffffff82db7ab0 r cac_weights_mars_xt +ffffffff82db7f80 r cac_weights_oland_pro +ffffffff82db8450 r cac_weights_oland_xt +ffffffff82db8920 r lcac_oland +ffffffff82db8c7c r powertune_data_oland +ffffffff82db8cc0 r cac_weights_hainan +ffffffff82db9184 r powertune_data_hainan +ffffffff82db91c0 r dte_data_aruba_pro +ffffffff82db9290 r dte_data_tahiti_pro +ffffffff82db9360 r dte_data_curacao_pro +ffffffff82db9430 r dte_data_neptune_xt +ffffffff82db9500 r dte_data_sun_xt +ffffffff82db95d0 r dte_data_venus_xtx +ffffffff82db96a0 r dte_data_venus_xt +ffffffff82db9770 r dte_data_venus_pro +ffffffff82db9840 r dte_data_mars_pro +ffffffff82dba000 r si_program_jump_on_start.data +ffffffff82dbb000 r sumo_dtc +ffffffff82dbc000 r trinity_mgcg_shls_default +ffffffff82dbc380 r trinity_sysls_enable +ffffffff82dbc450 r trinity_sysls_disable +ffffffff82dbe000 r GC_BASE +ffffffff82dbe0a8 r HDP_BASE +ffffffff82dbe150 r MMHUB_BASE +ffffffff82dbe1f8 r ATHUB_BASE +ffffffff82dbe2a0 r NBIO_BASE +ffffffff82dbe348 r MP0_BASE +ffffffff82dbe3f0 r MP1_BASE +ffffffff82dbe498 r DF_BASE +ffffffff82dbe540 r OSSSYS_BASE +ffffffff82dbe5e8 r SDMA0_BASE +ffffffff82dbe690 r SDMA1_BASE +ffffffff82dbe738 r SDMA2_BASE +ffffffff82dbe7e0 r SDMA3_BASE +ffffffff82dbe888 r SDMA4_BASE +ffffffff82dbe930 r SMUIO_BASE +ffffffff82dbe9d8 r THM_BASE +ffffffff82dbea80 r UMC_BASE +ffffffff82dbeb28 r VCN_BASE +ffffffff82dbf000 r amdgpu_afmt_predefined_acr +ffffffff82dc0000 r atom_op_names +ffffffff82dc03e0 r opcode_table +ffffffff82dc0bd0 r atom_dst_to_src +ffffffff82dc0c50 r atom_io_names +ffffffff82dc0c80 r atom_table_names +ffffffff82dc0ed0 r atom_iio_len +ffffffff82dc1000 r object_connector_convert +ffffffff82dc1058 R amdgpu_vbios_version_attr_group +ffffffff82dc2000 r voltage_names +ffffffff82dc2020 r pre_emph_names +ffffffff82dc3000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82dc5000 r amdgpu_benchmark.common_modes +ffffffff82dc6000 r amdgpu_cgs_ops +ffffffff82dc7000 r amdgpu_connector_dp_funcs +ffffffff82dc7078 r amdgpu_connector_dp_helper_funcs +ffffffff82dc70d8 r amdgpu_connector_edp_funcs +ffffffff82dc7150 r amdgpu_connector_vga_funcs +ffffffff82dc71c8 r amdgpu_connector_vga_helper_funcs +ffffffff82dc7228 r amdgpu_connector_dvi_funcs +ffffffff82dc72a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82dc7300 r amdgpu_connector_lvds_funcs +ffffffff82dc7378 r amdgpu_connector_lvds_helper_funcs +ffffffff82dc73e0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82dc9000 R amdgpu_ctx_num_entities +ffffffff82dca000 r amdgpu_kms_driver +ffffffff82dca0f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82dcb000 r hw_id_map +ffffffff82dcb090 r hw_id_names +ffffffff82dcc000 r hpd_names +ffffffff82dcc030 r encoder_names +ffffffff82dcc180 r dcc_retile_formats +ffffffff82dcc270 r dcc_formats +ffffffff82dcc360 R amdgpu_mode_funcs +ffffffff82dcc3b0 r amdgpu_underscan_enum_list +ffffffff82dcc3e0 r amdgpu_audio_enum_list +ffffffff82dcc410 r amdgpu_dither_enum_list +ffffffff82dcc430 r amdgpu_fb_funcs_atomic +ffffffff82dcc448 r amdgpu_fb_funcs +ffffffff82dcd000 R amdgpu_dmabuf_ops +ffffffff82dce000 R amdgpu_ioctls_kms +ffffffff82dce210 R amdgpu_partition_driver +ffffffff82dce2f8 R amdgpu_ca +ffffffff82dce320 r pciidlist +ffffffff82dcf1f0 r amdgpu_unsupported_pciidlist +ffffffff82dcf770 r amdgpu_kms_driver +ffffffff82dd0000 r amdgpu_job_fence_ops +ffffffff82dd0040 r amdgpu_fence_ops +ffffffff82dd1000 r amdgpu_gem_object_funcs +ffffffff82dd1070 r amdgpu_gem_vm_ops +ffffffff82dd2000 R amdgpu_gtt_mgr_attr_group +ffffffff82dd2018 r amdgpu_gtt_mgr_func +ffffffff82dd3000 r amdgpu_atombios_i2c_algo +ffffffff82dd4000 R node_id_to_phys_map +ffffffff82dd5000 R amdgpu_sched_ops +ffffffff82dd7000 r amdgpu_vram_names +ffffffff82dd8000 r amdgpu_preempt_mgr_func +ffffffff82dd9000 R psp_ip_funcs +ffffffff82dd90a8 R psp_v3_1_ip_block +ffffffff82dd90c0 R psp_v10_0_ip_block +ffffffff82dd90d8 R psp_v11_0_ip_block +ffffffff82dd90f0 R psp_v11_0_8_ip_block +ffffffff82dd9108 R psp_v12_0_ip_block +ffffffff82dd9120 R psp_v13_0_ip_block +ffffffff82dd9138 R psp_v13_0_4_ip_block +ffffffff82ddb000 r sw_ring_info +ffffffff82ddc000 r amdgpu_evict_flags.placements +ffffffff82de0000 R amdgpu_vkms_ip_block +ffffffff82de1000 R amdgpu_vm_cpu_funcs +ffffffff82de3000 R amdgpu_vm_sdma_funcs +ffffffff82de4000 R amdgpu_vram_mgr_attr_group +ffffffff82de4018 r amdgpu_vram_mgr_func +ffffffff82de4040 r amdgpu_dummy_vram_mgr_func +ffffffff82de5000 r xgmi_pcs_err_status_reg_arct +ffffffff82de5020 r xgmi3x16_pcs_ras_fields +ffffffff82de51f0 r xgmi_pcs_ras_fields +ffffffff82de5310 r wafl_pcs_ras_fields +ffffffff82de6000 r GC_BASE +ffffffff82de60c0 r HDP_BASE +ffffffff82de6180 r MMHUB_BASE +ffffffff82de6240 r ATHUB_BASE +ffffffff82de6300 r NBIF0_BASE +ffffffff82de63c0 r MP0_BASE +ffffffff82de6480 r MP1_BASE +ffffffff82de6540 r UVD_BASE +ffffffff82de6600 r DF_BASE +ffffffff82de66c0 r OSSSYS_BASE +ffffffff82de6780 r SDMA0_BASE +ffffffff82de6840 r SDMA1_BASE +ffffffff82de6900 r SDMA2_BASE +ffffffff82de69c0 r SDMA3_BASE +ffffffff82de6a80 r SDMA4_BASE +ffffffff82de6b40 r SDMA5_BASE +ffffffff82de6c00 r SDMA6_BASE +ffffffff82de6cc0 r SDMA7_BASE +ffffffff82de6d80 r SMUIO_BASE +ffffffff82de6e40 r THM_BASE +ffffffff82de6f00 r UMC_BASE +ffffffff82de6fc0 r RSMU_BASE +ffffffff82de8000 r cz_ih_ip_funcs +ffffffff82de80a8 R cz_ih_ip_block +ffffffff82de80c0 r cz_ih_funcs +ffffffff82de9000 r crtc_offsets +ffffffff82de9020 r dce_v10_0_ip_funcs +ffffffff82de90c8 R dce_v10_0_ip_block +ffffffff82de90e0 R dce_v10_1_ip_block +ffffffff82de90f8 r dce_v10_0_display_funcs +ffffffff82de9150 r hpd_offsets +ffffffff82de9168 r dce_v10_0_encoder_funcs +ffffffff82de9188 r dce_v10_0_dac_helper_funcs +ffffffff82de91f0 r dce_v10_0_dig_helper_funcs +ffffffff82de9258 r dce_v10_0_ext_helper_funcs +ffffffff82de92c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82de92f0 r dce_v10_0_crtc_irq_funcs +ffffffff82de9300 r dce_v10_0_pageflip_irq_funcs +ffffffff82de9310 r dce_v10_0_hpd_irq_funcs +ffffffff82de9320 r interrupt_status_offsets +ffffffff82de9380 r dce_v10_0_crtc_funcs +ffffffff82de9440 r dce_v10_0_crtc_helper_funcs +ffffffff82de94c0 r vga_control_regs +ffffffff82de94e0 r dig_offsets +ffffffff82de9500 r pin_offsets +ffffffff82de9520 r fiji_mgcg_cgcg_init +ffffffff82de9540 r golden_settings_fiji_a10 +ffffffff82de9570 r tonga_mgcg_cgcg_init +ffffffff82de9590 r golden_settings_tonga_a11 ffffffff82dea000 r crtc_offsets -ffffffff82dea020 r dce_v10_0_ip_funcs -ffffffff82dea0c8 R dce_v10_0_ip_block -ffffffff82dea0e0 R dce_v10_1_ip_block -ffffffff82dea0f8 r dce_v10_0_display_funcs +ffffffff82dea020 r dce_v11_0_ip_funcs +ffffffff82dea0c8 R dce_v11_0_ip_block +ffffffff82dea0e0 R dce_v11_2_ip_block +ffffffff82dea0f8 r dce_v11_0_display_funcs ffffffff82dea150 r hpd_offsets -ffffffff82dea168 r dce_v10_0_encoder_funcs -ffffffff82dea188 r dce_v10_0_dac_helper_funcs -ffffffff82dea1f0 r dce_v10_0_dig_helper_funcs -ffffffff82dea258 r dce_v10_0_ext_helper_funcs -ffffffff82dea2c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82dea2f0 r dce_v10_0_crtc_irq_funcs -ffffffff82dea300 r dce_v10_0_pageflip_irq_funcs -ffffffff82dea310 r dce_v10_0_hpd_irq_funcs +ffffffff82dea168 r dce_v11_0_encoder_funcs +ffffffff82dea188 r dce_v11_0_dac_helper_funcs +ffffffff82dea1f0 r dce_v11_0_dig_helper_funcs +ffffffff82dea258 r dce_v11_0_ext_helper_funcs +ffffffff82dea2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82dea2f0 r dce_v11_0_crtc_irq_funcs +ffffffff82dea300 r dce_v11_0_pageflip_irq_funcs +ffffffff82dea310 r dce_v11_0_hpd_irq_funcs ffffffff82dea320 r interrupt_status_offsets -ffffffff82dea380 r dce_v10_0_crtc_funcs -ffffffff82dea440 r dce_v10_0_crtc_helper_funcs +ffffffff82dea380 r dce_v11_0_crtc_funcs +ffffffff82dea440 r dce_v11_0_crtc_helper_funcs ffffffff82dea4c0 r vga_control_regs ffffffff82dea4e0 r dig_offsets -ffffffff82dea500 r pin_offsets -ffffffff82dea520 r fiji_mgcg_cgcg_init -ffffffff82dea540 r golden_settings_fiji_a10 -ffffffff82dea570 r tonga_mgcg_cgcg_init -ffffffff82dea590 r golden_settings_tonga_a11 -ffffffff82deb000 r crtc_offsets -ffffffff82deb020 r dce_v11_0_ip_funcs -ffffffff82deb0c8 R dce_v11_0_ip_block -ffffffff82deb0e0 R dce_v11_2_ip_block -ffffffff82deb0f8 r dce_v11_0_display_funcs -ffffffff82deb150 r hpd_offsets -ffffffff82deb168 r dce_v11_0_encoder_funcs -ffffffff82deb188 r dce_v11_0_dac_helper_funcs -ffffffff82deb1f0 r dce_v11_0_dig_helper_funcs -ffffffff82deb258 r dce_v11_0_ext_helper_funcs -ffffffff82deb2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82deb2f0 r dce_v11_0_crtc_irq_funcs -ffffffff82deb300 r dce_v11_0_pageflip_irq_funcs -ffffffff82deb310 r dce_v11_0_hpd_irq_funcs -ffffffff82deb320 r interrupt_status_offsets -ffffffff82deb380 r dce_v11_0_crtc_funcs -ffffffff82deb440 r dce_v11_0_crtc_helper_funcs -ffffffff82deb4c0 r vga_control_regs -ffffffff82deb4e0 r dig_offsets -ffffffff82deb510 r cz_mgcg_cgcg_init -ffffffff82deb530 r cz_golden_settings_a11 -ffffffff82deb550 r stoney_golden_settings_a11 -ffffffff82deb570 r polaris11_golden_settings_a11 -ffffffff82deb5b0 r polaris10_golden_settings_a11 -ffffffff82dec000 R df_v1_7_funcs -ffffffff82dec070 r df_v1_7_channel_number -ffffffff82ded000 R df_v3_6_funcs -ffffffff82ded070 r df_v3_6_channel_number -ffffffff82dee000 R df_v4_3_funcs -ffffffff82def000 r GC_BASE -ffffffff82def0a8 r HDP_BASE -ffffffff82def150 r MMHUB_BASE -ffffffff82def1f8 r ATHUB_BASE -ffffffff82def2a0 r NBIO_BASE -ffffffff82def348 r MP0_BASE -ffffffff82def3f0 r MP1_BASE -ffffffff82def498 r VCN0_BASE -ffffffff82def540 r DF_BASE -ffffffff82def5e8 r DCN_BASE -ffffffff82def690 r OSSSYS_BASE -ffffffff82def738 r SMUIO_BASE -ffffffff82def7e0 r THM_BASE -ffffffff82df0000 r gfx_v10_0_ip_funcs -ffffffff82df00a8 R gfx_v10_0_ip_block -ffffffff82df00c0 r gfx_v10_0_gfx_funcs -ffffffff82df0120 r golden_settings_gc_rlc_spm_10_0_nv10 -ffffffff82df63c0 r golden_settings_gc_rlc_spm_10_1_nv14 -ffffffff82df9de0 r golden_settings_gc_rlc_spm_10_1_2_nv12 -ffffffff82e00080 r gfx_v10_0_kiq_pm4_funcs -ffffffff82e000c0 r gfx_v10_0_ring_funcs_kiq -ffffffff82e00200 r gfx_v10_0_ring_funcs_gfx -ffffffff82e00340 r gfx_v10_0_ring_funcs_compute -ffffffff82e00480 r gfx_v10_0_eop_irq_funcs -ffffffff82e00490 r gfx_v10_0_kiq_irq_funcs -ffffffff82e004a0 r gfx_v10_0_priv_reg_irq_funcs -ffffffff82e004b0 r gfx_v10_0_priv_inst_irq_funcs -ffffffff82e004c0 r gfx_v10_0_rlc_funcs -ffffffff82e00528 r gfx_v10_0_rlc_funcs_sriov -ffffffff82e00590 r gfx10_cs_data -ffffffff82e005b0 r gfx10_SECT_CONTEXT_defs -ffffffff82e00640 r gfx10_SECT_CONTEXT_def_1 -ffffffff82e009a0 r gfx10_SECT_CONTEXT_def_3 -ffffffff82e009b0 r gfx10_SECT_CONTEXT_def_4 -ffffffff82e00c28 r gfx10_SECT_CONTEXT_def_5 -ffffffff82e00c30 r gfx10_SECT_CONTEXT_def_6 -ffffffff82e00c40 r gfx10_SECT_CONTEXT_def_2 -ffffffff82e01080 r gfx10_SECT_CONTEXT_def_7 -ffffffff82e01190 r gfx10_SECT_CONTEXT_def_8 -ffffffff82e014c0 r golden_settings_gc_10_1 -ffffffff82e01880 r golden_settings_gc_10_0_nv10 -ffffffff82e01880 r golden_settings_gc_10_1_1 -ffffffff82e01c10 r golden_settings_gc_10_1_2 -ffffffff82e01c10 r golden_settings_gc_10_1_nv14 -ffffffff82e02000 r golden_settings_gc_10_1_2_nv12 -ffffffff82e02000 r golden_settings_gc_10_3 -ffffffff82e02408 r golden_settings_gc_10_3_sienna_cichlid -ffffffff82e02410 r golden_settings_gc_10_3_2 -ffffffff82e02800 r golden_settings_gc_10_3_vangogh -ffffffff82e02a60 r golden_settings_gc_10_3_3 -ffffffff82e02c40 r golden_settings_gc_10_3_4 -ffffffff82e02fa0 r golden_settings_gc_10_3_5 -ffffffff82e032a0 r golden_settings_gc_10_0_cyan_skillfish -ffffffff82e035d0 r golden_settings_gc_10_3_6 -ffffffff82e037e0 r golden_settings_gc_10_3_7 -ffffffff82e04000 r gfx_v11_0_ip_funcs -ffffffff82e040a8 R gfx_v11_0_ip_block -ffffffff82e040c0 r gfx_v11_0_gfx_funcs -ffffffff82e04120 r gfx_v11_0_kiq_pm4_funcs -ffffffff82e04160 r gfx_v11_0_ring_funcs_kiq -ffffffff82e042a0 r gfx_v11_0_ring_funcs_gfx -ffffffff82e043e0 r gfx_v11_0_ring_funcs_compute -ffffffff82e04520 r gfx_v11_0_eop_irq_funcs -ffffffff82e04530 r gfx_v11_0_priv_reg_irq_funcs -ffffffff82e04540 r gfx_v11_0_priv_inst_irq_funcs -ffffffff82e04550 r gfx_v11_0_rlc_gc_fed_irq_funcs -ffffffff82e04560 r gfx_v11_0_rlc_funcs -ffffffff82e045d0 r gfx11_cs_data -ffffffff82e045f0 r gfx11_SECT_CONTEXT_defs -ffffffff82e04670 r gfx11_SECT_CONTEXT_def_1 -ffffffff82e049d0 r gfx11_SECT_CONTEXT_def_3 -ffffffff82e049e0 r gfx11_SECT_CONTEXT_def_5 -ffffffff82e049e8 r gfx11_SECT_CONTEXT_def_6 -ffffffff82e049f0 r gfx11_SECT_CONTEXT_def_2 -ffffffff82e04e30 r gfx11_SECT_CONTEXT_def_4 -ffffffff82e050b0 r gfx11_SECT_CONTEXT_def_7 -ffffffff82e05520 r golden_settings_gc_11_0_1 -ffffffff82e05600 r golden_settings_gc_11_0 -ffffffff82e06000 r gfx_v8_0_ip_funcs -ffffffff82e060a8 R gfx_v8_0_ip_block -ffffffff82e060c0 R gfx_v8_1_ip_block -ffffffff82e060d8 r gfx_v8_0_gfx_funcs -ffffffff82e06138 r gfx_v8_0_ring_funcs_kiq -ffffffff82e06278 r gfx_v8_0_ring_funcs_gfx -ffffffff82e063b8 r gfx_v8_0_ring_funcs_compute -ffffffff82e06500 r amdgpu_gds_reg_offset -ffffffff82e06600 r gfx_v8_0_eop_irq_funcs -ffffffff82e06610 r gfx_v8_0_priv_reg_irq_funcs -ffffffff82e06620 r gfx_v8_0_priv_inst_irq_funcs -ffffffff82e06630 r gfx_v8_0_cp_ecc_error_irq_funcs -ffffffff82e06640 r gfx_v8_0_sq_irq_funcs -ffffffff82e06650 r sq_edc_source_names -ffffffff82e06688 r iceland_rlc_funcs -ffffffff82e066f0 r vi_cs_data -ffffffff82e06710 r vi_SECT_CONTEXT_defs -ffffffff82e06790 r vi_SECT_CONTEXT_def_1 -ffffffff82e06ae0 r vi_SECT_CONTEXT_def_3 -ffffffff82e06b00 r vi_SECT_CONTEXT_def_4 -ffffffff82e06d74 r vi_SECT_CONTEXT_def_5 -ffffffff82e06d7c r vi_SECT_CONTEXT_def_6 -ffffffff82e06d80 r vi_SECT_CONTEXT_def_2 -ffffffff82e071d0 r vi_SECT_CONTEXT_def_7 -ffffffff82e07580 r vgpr_init_compute_shader -ffffffff82e07690 r vgpr_init_regs -ffffffff82e07720 r sgpr1_init_regs -ffffffff82e077b0 r sgpr2_init_regs -ffffffff82e07840 r sec_ded_counter_registers -ffffffff82e078b0 r iceland_mgcg_cgcg_init -ffffffff82e07bb0 r golden_settings_iceland_a11 -ffffffff82e07c70 r iceland_golden_common_all -ffffffff82e07cd0 r fiji_mgcg_cgcg_init -ffffffff82e07e80 r golden_settings_fiji_a10 -ffffffff82e07f10 r fiji_golden_common_all -ffffffff82e07f90 r tonga_mgcg_cgcg_init -ffffffff82e08320 r golden_settings_tonga_a11 -ffffffff82e083e0 r tonga_golden_common_all -ffffffff82e08440 r golden_settings_vegam_a11 -ffffffff82e08510 r vegam_golden_common_all -ffffffff82e08560 r golden_settings_polaris11_a11 -ffffffff82e08630 r polaris11_golden_common_all -ffffffff82e08680 r golden_settings_polaris10_a11 -ffffffff82e08750 r polaris10_golden_common_all -ffffffff82e087b0 r cz_mgcg_cgcg_init -ffffffff82e08b40 r cz_golden_settings_a11 -ffffffff82e08bd0 r cz_golden_common_all -ffffffff82e08c30 r stoney_mgcg_cgcg_init -ffffffff82e08c70 r stoney_golden_settings_a11 -ffffffff82e08cf0 r stoney_golden_common_all -ffffffff82e09000 R gfx_v9_0_ras_ops -ffffffff82e09040 r gfx_v9_0_ip_funcs -ffffffff82e090e8 R gfx_v9_0_ip_block -ffffffff82e09100 r ras_gfx_subblocks -ffffffff82e09b80 r gfx_v9_0_edc_counter_regs -ffffffff82e09f20 r gfx_v9_0_ras_fields -ffffffff82e0b000 r gfx_v9_0_gfx_funcs -ffffffff82e0b060 r gfx_v9_0_kiq_pm4_funcs -ffffffff82e0b0a0 r gfx_v9_0_ring_funcs_kiq -ffffffff82e0b1e0 r gfx_v9_0_ring_funcs_gfx -ffffffff82e0b320 r gfx_v9_0_sw_ring_funcs_gfx -ffffffff82e0b460 r gfx_v9_0_ring_funcs_compute -ffffffff82e0b5a0 r gfx_v9_0_eop_irq_funcs -ffffffff82e0b5b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82e0b5c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82e0b5d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82e0b5e0 r gfx_v9_0_rlc_funcs -ffffffff82e0b650 r gfx9_cs_data -ffffffff82e0b670 r gfx9_SECT_CONTEXT_defs -ffffffff82e0b700 r gfx9_SECT_CONTEXT_def_1 -ffffffff82e0ba50 r gfx9_SECT_CONTEXT_def_3 -ffffffff82e0ba60 r gfx9_SECT_CONTEXT_def_4 -ffffffff82e0bcd4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82e0bcdc r gfx9_SECT_CONTEXT_def_6 -ffffffff82e0bce0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82e0bdf0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82e0c260 r gfx9_SECT_CONTEXT_def_8 -ffffffff82e0c4d0 r amdgpu_gfxoff_quirk_list -ffffffff82e0c520 r vgpr_init_compute_shader_arcturus -ffffffff82e0cdb0 r vgpr_init_regs_arcturus -ffffffff82e0cf40 r vgpr_init_regs -ffffffff82e0d0d0 r sgpr1_init_regs -ffffffff82e0d260 r sgpr2_init_regs -ffffffff82e0d3f0 r golden_settings_gc_9_0 -ffffffff82e0d5d0 r golden_settings_gc_9_0_vg10 -ffffffff82e0d780 r golden_settings_gc_9_2_1 -ffffffff82e0d900 r golden_settings_gc_9_2_1_vg12 -ffffffff82e0da40 r golden_settings_gc_9_0_vg20 -ffffffff82e0db50 r golden_settings_gc_9_4_1_arct -ffffffff82e0dc60 r golden_settings_gc_9_1 -ffffffff82e0dea0 r golden_settings_gc_9_1_rv2 -ffffffff82e0e070 r golden_settings_gc_9_1_rv1 -ffffffff82e0e120 r golden_settings_gc_9_1_rn -ffffffff82e0e240 r golden_settings_gc_9_x_common -ffffffff82e0f000 R gfx_v9_4_ras_ops -ffffffff82e0f040 r gfx_v9_4_edc_counter_regs -ffffffff82e0f420 r gfx_v9_4_ras_fields -ffffffff82e11000 R vgpr_init_regs_aldebaran -ffffffff82e111b0 R sgpr112_init_regs_aldebaran -ffffffff82e11360 R sgpr96_init_regs_aldebaran -ffffffff82e11510 R sgpr64_init_regs_aldebaran -ffffffff82e116c0 r golden_settings_gc_9_4_2_alde -ffffffff82e11720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82e117b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82e11840 r sgpr112_init_compute_shader_aldebaran -ffffffff82e11a60 r sgpr96_init_compute_shader_aldebaran -ffffffff82e11c50 r sgpr64_init_compute_shader_aldebaran -ffffffff82e11dc0 r vgpr_init_compute_shader_aldebaran -ffffffff82e126a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82e12a20 r gfx_v9_4_2_ras_fields -ffffffff82e143c0 r gfx_v9_4_2_utc_blocks -ffffffff82e15000 r gfx_v9_4_3_ip_funcs -ffffffff82e150a8 R gfx_v9_4_3_ip_block -ffffffff82e150c0 r gfx_v9_4_3_kiq_pm4_funcs -ffffffff82e15100 r gfx_v9_4_3_ring_funcs_kiq -ffffffff82e15240 r gfx_v9_4_3_ring_funcs_compute -ffffffff82e15380 r gfx_v9_4_3_eop_irq_funcs -ffffffff82e15390 r gfx_v9_4_3_priv_reg_irq_funcs -ffffffff82e153a0 r gfx_v9_4_3_priv_inst_irq_funcs -ffffffff82e153b0 r gfx_v9_4_3_rlc_funcs -ffffffff82e15418 r gfx_v9_4_3_gfx_funcs -ffffffff82e15480 r gfx_v9_4_3_ce_reg_list -ffffffff82e15810 r gfx_v9_4_3_ras_mem_list_array -ffffffff82e15970 r gfx_v9_4_3_ue_reg_list -ffffffff82e15d30 r gfx_v9_4_3_ras_cp_mem_list -ffffffff82e15d80 r gfx_v9_4_3_ras_gcea_mem_list -ffffffff82e15ec0 r gfx_v9_4_3_ras_gc_cane_mem_list -ffffffff82e15ed0 r gfx_v9_4_3_ras_gcutcl2_mem_list -ffffffff82e15ee0 r gfx_v9_4_3_ras_gds_mem_list -ffffffff82e15ef0 r gfx_v9_4_3_ras_lds_mem_list -ffffffff82e16110 r gfx_v9_4_3_ras_rlc_mem_list -ffffffff82e16190 r gfx_v9_4_3_ras_sp_mem_list -ffffffff82e161a0 r gfx_v9_4_3_ras_spi_mem_list -ffffffff82e161e0 r gfx_v9_4_3_ras_sqc_mem_list -ffffffff82e16350 r gfx_v9_4_3_ras_sq_mem_list -ffffffff82e16390 r gfx_v9_4_3_ras_ta_mem_list -ffffffff82e163e0 r gfx_v9_4_3_ras_tcc_mem_list -ffffffff82e163f0 r gfx_v9_4_3_ras_tca_mem_list -ffffffff82e16400 r gfx_v9_4_3_ras_tci_mem_list -ffffffff82e16410 r gfx_v9_4_3_ras_tcp_mem_list -ffffffff82e165a0 r gfx_v9_4_3_ras_td_mem_list -ffffffff82e165d0 r gfx_v9_4_3_ras_tcx_mem_list -ffffffff82e16b50 r gfx_v9_4_3_ras_atc_l2_mem_list -ffffffff82e16b60 r gfx_v9_4_3_ras_utcl2_mem_list -ffffffff82e16b70 r gfx_v9_4_3_ras_vml2_mem_list -ffffffff82e16b80 r gfx_v9_4_3_ras_vml2_walker_mem_list -ffffffff82e17000 R gfxhub_v1_0_funcs -ffffffff82e18000 R gfxhub_v1_2_funcs -ffffffff82e19000 R gfxhub_v2_0_funcs -ffffffff82e19060 r gfxhub_v2_0_vmhub_funcs +ffffffff82dea510 r cz_mgcg_cgcg_init +ffffffff82dea530 r cz_golden_settings_a11 +ffffffff82dea550 r stoney_golden_settings_a11 +ffffffff82dea570 r polaris11_golden_settings_a11 +ffffffff82dea5b0 r polaris10_golden_settings_a11 +ffffffff82deb000 R df_v1_7_funcs +ffffffff82deb070 r df_v1_7_channel_number +ffffffff82dec000 R df_v3_6_funcs +ffffffff82dec070 r df_v3_6_channel_number +ffffffff82ded000 R df_v4_3_funcs +ffffffff82dee000 r GC_BASE +ffffffff82dee0a8 r HDP_BASE +ffffffff82dee150 r MMHUB_BASE +ffffffff82dee1f8 r ATHUB_BASE +ffffffff82dee2a0 r NBIO_BASE +ffffffff82dee348 r MP0_BASE +ffffffff82dee3f0 r MP1_BASE +ffffffff82dee498 r VCN0_BASE +ffffffff82dee540 r DF_BASE +ffffffff82dee5e8 r DCN_BASE +ffffffff82dee690 r OSSSYS_BASE +ffffffff82dee738 r SMUIO_BASE +ffffffff82dee7e0 r THM_BASE +ffffffff82def000 r gfx_v10_0_ip_funcs +ffffffff82def0a8 R gfx_v10_0_ip_block +ffffffff82def0c0 r gfx_v10_0_gfx_funcs +ffffffff82def120 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82df53c0 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82df8de0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82dff080 r gfx_v10_0_kiq_pm4_funcs +ffffffff82dff0c0 r gfx_v10_0_ring_funcs_kiq +ffffffff82dff200 r gfx_v10_0_ring_funcs_gfx +ffffffff82dff340 r gfx_v10_0_ring_funcs_compute +ffffffff82dff480 r gfx_v10_0_eop_irq_funcs +ffffffff82dff490 r gfx_v10_0_kiq_irq_funcs +ffffffff82dff4a0 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82dff4b0 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82dff4c0 r gfx_v10_0_rlc_funcs +ffffffff82dff528 r gfx_v10_0_rlc_funcs_sriov +ffffffff82dff590 r gfx10_cs_data +ffffffff82dff5b0 r gfx10_SECT_CONTEXT_defs +ffffffff82dff640 r gfx10_SECT_CONTEXT_def_1 +ffffffff82dff9a0 r gfx10_SECT_CONTEXT_def_3 +ffffffff82dff9b0 r gfx10_SECT_CONTEXT_def_4 +ffffffff82dffc28 r gfx10_SECT_CONTEXT_def_5 +ffffffff82dffc30 r gfx10_SECT_CONTEXT_def_6 +ffffffff82dffc40 r gfx10_SECT_CONTEXT_def_2 +ffffffff82e00080 r gfx10_SECT_CONTEXT_def_7 +ffffffff82e00190 r gfx10_SECT_CONTEXT_def_8 +ffffffff82e004c0 r golden_settings_gc_10_1 +ffffffff82e00880 r golden_settings_gc_10_0_nv10 +ffffffff82e00880 r golden_settings_gc_10_1_1 +ffffffff82e00c10 r golden_settings_gc_10_1_2 +ffffffff82e00c10 r golden_settings_gc_10_1_nv14 +ffffffff82e01000 r golden_settings_gc_10_1_2_nv12 +ffffffff82e01000 r golden_settings_gc_10_3 +ffffffff82e01408 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82e01410 r golden_settings_gc_10_3_2 +ffffffff82e01800 r golden_settings_gc_10_3_vangogh +ffffffff82e01a60 r golden_settings_gc_10_3_3 +ffffffff82e01c40 r golden_settings_gc_10_3_4 +ffffffff82e01fa0 r golden_settings_gc_10_3_5 +ffffffff82e022a0 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82e025d0 r golden_settings_gc_10_3_6 +ffffffff82e027e0 r golden_settings_gc_10_3_7 +ffffffff82e03000 r gfx_v11_0_ip_funcs +ffffffff82e030a8 R gfx_v11_0_ip_block +ffffffff82e030c0 r gfx_v11_0_gfx_funcs +ffffffff82e03120 r gfx_v11_0_kiq_pm4_funcs +ffffffff82e03160 r gfx_v11_0_ring_funcs_kiq +ffffffff82e032a0 r gfx_v11_0_ring_funcs_gfx +ffffffff82e033e0 r gfx_v11_0_ring_funcs_compute +ffffffff82e03520 r gfx_v11_0_eop_irq_funcs +ffffffff82e03530 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82e03540 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82e03550 r gfx_v11_0_rlc_gc_fed_irq_funcs +ffffffff82e03560 r gfx_v11_0_rlc_funcs +ffffffff82e035d0 r gfx11_cs_data +ffffffff82e035f0 r gfx11_SECT_CONTEXT_defs +ffffffff82e03670 r gfx11_SECT_CONTEXT_def_1 +ffffffff82e039d0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82e039e0 r gfx11_SECT_CONTEXT_def_5 +ffffffff82e039e8 r gfx11_SECT_CONTEXT_def_6 +ffffffff82e039f0 r gfx11_SECT_CONTEXT_def_2 +ffffffff82e03e30 r gfx11_SECT_CONTEXT_def_4 +ffffffff82e040b0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82e04520 r golden_settings_gc_11_0_1 +ffffffff82e04600 r golden_settings_gc_11_0 +ffffffff82e05000 r gfx_v8_0_ip_funcs +ffffffff82e050a8 R gfx_v8_0_ip_block +ffffffff82e050c0 R gfx_v8_1_ip_block +ffffffff82e050d8 r gfx_v8_0_gfx_funcs +ffffffff82e05138 r gfx_v8_0_ring_funcs_kiq +ffffffff82e05278 r gfx_v8_0_ring_funcs_gfx +ffffffff82e053b8 r gfx_v8_0_ring_funcs_compute +ffffffff82e05500 r amdgpu_gds_reg_offset +ffffffff82e05600 r gfx_v8_0_eop_irq_funcs +ffffffff82e05610 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82e05620 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82e05630 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82e05640 r gfx_v8_0_sq_irq_funcs +ffffffff82e05650 r sq_edc_source_names +ffffffff82e05688 r iceland_rlc_funcs +ffffffff82e056f0 r vi_cs_data +ffffffff82e05710 r vi_SECT_CONTEXT_defs +ffffffff82e05790 r vi_SECT_CONTEXT_def_1 +ffffffff82e05ae0 r vi_SECT_CONTEXT_def_3 +ffffffff82e05b00 r vi_SECT_CONTEXT_def_4 +ffffffff82e05d74 r vi_SECT_CONTEXT_def_5 +ffffffff82e05d7c r vi_SECT_CONTEXT_def_6 +ffffffff82e05d80 r vi_SECT_CONTEXT_def_2 +ffffffff82e061d0 r vi_SECT_CONTEXT_def_7 +ffffffff82e06580 r vgpr_init_compute_shader +ffffffff82e06690 r vgpr_init_regs +ffffffff82e06720 r sgpr1_init_regs +ffffffff82e067b0 r sgpr2_init_regs +ffffffff82e06840 r sec_ded_counter_registers +ffffffff82e068b0 r iceland_mgcg_cgcg_init +ffffffff82e06bb0 r golden_settings_iceland_a11 +ffffffff82e06c70 r iceland_golden_common_all +ffffffff82e06cd0 r fiji_mgcg_cgcg_init +ffffffff82e06e80 r golden_settings_fiji_a10 +ffffffff82e06f10 r fiji_golden_common_all +ffffffff82e06f90 r tonga_mgcg_cgcg_init +ffffffff82e07320 r golden_settings_tonga_a11 +ffffffff82e073e0 r tonga_golden_common_all +ffffffff82e07440 r golden_settings_vegam_a11 +ffffffff82e07510 r vegam_golden_common_all +ffffffff82e07560 r golden_settings_polaris11_a11 +ffffffff82e07630 r polaris11_golden_common_all +ffffffff82e07680 r golden_settings_polaris10_a11 +ffffffff82e07750 r polaris10_golden_common_all +ffffffff82e077b0 r cz_mgcg_cgcg_init +ffffffff82e07b40 r cz_golden_settings_a11 +ffffffff82e07bd0 r cz_golden_common_all +ffffffff82e07c30 r stoney_mgcg_cgcg_init +ffffffff82e07c70 r stoney_golden_settings_a11 +ffffffff82e07cf0 r stoney_golden_common_all +ffffffff82e08000 R gfx_v9_0_ras_ops +ffffffff82e08040 r gfx_v9_0_ip_funcs +ffffffff82e080e8 R gfx_v9_0_ip_block +ffffffff82e08100 r ras_gfx_subblocks +ffffffff82e08b80 r gfx_v9_0_edc_counter_regs +ffffffff82e08f20 r gfx_v9_0_ras_fields +ffffffff82e0a000 r gfx_v9_0_gfx_funcs +ffffffff82e0a060 r gfx_v9_0_kiq_pm4_funcs +ffffffff82e0a0a0 r gfx_v9_0_ring_funcs_kiq +ffffffff82e0a1e0 r gfx_v9_0_ring_funcs_gfx +ffffffff82e0a320 r gfx_v9_0_sw_ring_funcs_gfx +ffffffff82e0a460 r gfx_v9_0_ring_funcs_compute +ffffffff82e0a5a0 r gfx_v9_0_eop_irq_funcs +ffffffff82e0a5b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82e0a5c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82e0a5d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82e0a5e0 r gfx_v9_0_rlc_funcs +ffffffff82e0a650 r gfx9_cs_data +ffffffff82e0a670 r gfx9_SECT_CONTEXT_defs +ffffffff82e0a700 r gfx9_SECT_CONTEXT_def_1 +ffffffff82e0aa50 r gfx9_SECT_CONTEXT_def_3 +ffffffff82e0aa60 r gfx9_SECT_CONTEXT_def_4 +ffffffff82e0acd4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82e0acdc r gfx9_SECT_CONTEXT_def_6 +ffffffff82e0ace0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82e0adf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82e0b260 r gfx9_SECT_CONTEXT_def_8 +ffffffff82e0b4d0 r amdgpu_gfxoff_quirk_list +ffffffff82e0b520 r vgpr_init_compute_shader_arcturus +ffffffff82e0bdb0 r vgpr_init_regs_arcturus +ffffffff82e0bf40 r vgpr_init_regs +ffffffff82e0c0d0 r sgpr1_init_regs +ffffffff82e0c260 r sgpr2_init_regs +ffffffff82e0c3f0 r golden_settings_gc_9_0 +ffffffff82e0c5d0 r golden_settings_gc_9_0_vg10 +ffffffff82e0c780 r golden_settings_gc_9_2_1 +ffffffff82e0c900 r golden_settings_gc_9_2_1_vg12 +ffffffff82e0ca40 r golden_settings_gc_9_0_vg20 +ffffffff82e0cb50 r golden_settings_gc_9_4_1_arct +ffffffff82e0cc60 r golden_settings_gc_9_1 +ffffffff82e0cea0 r golden_settings_gc_9_1_rv2 +ffffffff82e0d070 r golden_settings_gc_9_1_rv1 +ffffffff82e0d120 r golden_settings_gc_9_1_rn +ffffffff82e0d240 r golden_settings_gc_9_x_common +ffffffff82e0e000 R gfx_v9_4_ras_ops +ffffffff82e0e040 r gfx_v9_4_edc_counter_regs +ffffffff82e0e420 r gfx_v9_4_ras_fields +ffffffff82e10000 R vgpr_init_regs_aldebaran +ffffffff82e101b0 R sgpr112_init_regs_aldebaran +ffffffff82e10360 R sgpr96_init_regs_aldebaran +ffffffff82e10510 R sgpr64_init_regs_aldebaran +ffffffff82e106c0 r golden_settings_gc_9_4_2_alde +ffffffff82e10720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82e107b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82e10840 r sgpr112_init_compute_shader_aldebaran +ffffffff82e10a60 r sgpr96_init_compute_shader_aldebaran +ffffffff82e10c50 r sgpr64_init_compute_shader_aldebaran +ffffffff82e10dc0 r vgpr_init_compute_shader_aldebaran +ffffffff82e116a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82e11a20 r gfx_v9_4_2_ras_fields +ffffffff82e133c0 r gfx_v9_4_2_utc_blocks +ffffffff82e14000 r gfx_v9_4_3_ip_funcs +ffffffff82e140a8 R gfx_v9_4_3_ip_block +ffffffff82e140c0 r gfx_v9_4_3_kiq_pm4_funcs +ffffffff82e14100 r gfx_v9_4_3_ring_funcs_kiq +ffffffff82e14240 r gfx_v9_4_3_ring_funcs_compute +ffffffff82e14380 r gfx_v9_4_3_eop_irq_funcs +ffffffff82e14390 r gfx_v9_4_3_priv_reg_irq_funcs +ffffffff82e143a0 r gfx_v9_4_3_priv_inst_irq_funcs +ffffffff82e143b0 r gfx_v9_4_3_rlc_funcs +ffffffff82e14418 r gfx_v9_4_3_gfx_funcs +ffffffff82e14480 r gfx_v9_4_3_ce_reg_list +ffffffff82e14810 r gfx_v9_4_3_ras_mem_list_array +ffffffff82e14970 r gfx_v9_4_3_ue_reg_list +ffffffff82e14d30 r gfx_v9_4_3_ras_cp_mem_list +ffffffff82e14d80 r gfx_v9_4_3_ras_gcea_mem_list +ffffffff82e14ec0 r gfx_v9_4_3_ras_gc_cane_mem_list +ffffffff82e14ed0 r gfx_v9_4_3_ras_gcutcl2_mem_list +ffffffff82e14ee0 r gfx_v9_4_3_ras_gds_mem_list +ffffffff82e14ef0 r gfx_v9_4_3_ras_lds_mem_list +ffffffff82e15110 r gfx_v9_4_3_ras_rlc_mem_list +ffffffff82e15190 r gfx_v9_4_3_ras_sp_mem_list +ffffffff82e151a0 r gfx_v9_4_3_ras_spi_mem_list +ffffffff82e151e0 r gfx_v9_4_3_ras_sqc_mem_list +ffffffff82e15350 r gfx_v9_4_3_ras_sq_mem_list +ffffffff82e15390 r gfx_v9_4_3_ras_ta_mem_list +ffffffff82e153e0 r gfx_v9_4_3_ras_tcc_mem_list +ffffffff82e153f0 r gfx_v9_4_3_ras_tca_mem_list +ffffffff82e15400 r gfx_v9_4_3_ras_tci_mem_list +ffffffff82e15410 r gfx_v9_4_3_ras_tcp_mem_list +ffffffff82e155a0 r gfx_v9_4_3_ras_td_mem_list +ffffffff82e155d0 r gfx_v9_4_3_ras_tcx_mem_list +ffffffff82e15b50 r gfx_v9_4_3_ras_atc_l2_mem_list +ffffffff82e15b60 r gfx_v9_4_3_ras_utcl2_mem_list +ffffffff82e15b70 r gfx_v9_4_3_ras_vml2_mem_list +ffffffff82e15b80 r gfx_v9_4_3_ras_vml2_walker_mem_list +ffffffff82e16000 R gfxhub_v1_0_funcs +ffffffff82e17000 R gfxhub_v1_2_funcs +ffffffff82e18000 R gfxhub_v2_0_funcs +ffffffff82e18060 r gfxhub_v2_0_vmhub_funcs +ffffffff82e18070 r gfxhub_client_ids +ffffffff82e19000 R gfxhub_v2_1_funcs +ffffffff82e19060 r gfxhub_v2_1_vmhub_funcs ffffffff82e19070 r gfxhub_client_ids -ffffffff82e1a000 R gfxhub_v2_1_funcs -ffffffff82e1a060 r gfxhub_v2_1_vmhub_funcs +ffffffff82e1a000 R gfxhub_v3_0_funcs +ffffffff82e1a060 r gfxhub_v3_0_vmhub_funcs ffffffff82e1a070 r gfxhub_client_ids -ffffffff82e1b000 R gfxhub_v3_0_funcs -ffffffff82e1b060 r gfxhub_v3_0_vmhub_funcs +ffffffff82e1b000 R gfxhub_v3_0_3_funcs +ffffffff82e1b060 r gfxhub_v3_0_3_vmhub_funcs ffffffff82e1b070 r gfxhub_client_ids -ffffffff82e1c000 R gfxhub_v3_0_3_funcs -ffffffff82e1c060 r gfxhub_v3_0_3_vmhub_funcs -ffffffff82e1c070 r gfxhub_client_ids -ffffffff82e1d000 R gmc_v10_0_ip_funcs -ffffffff82e1d0a8 R gmc_v10_0_ip_block -ffffffff82e1d0c0 r gmc_v10_0_gmc_funcs -ffffffff82e1d118 r gmc_v10_0_irq_funcs -ffffffff82e1d128 r gmc_v10_0_ecc_funcs -ffffffff82e1e000 R gmc_v11_0_ip_funcs -ffffffff82e1e0a8 R gmc_v11_0_ip_block -ffffffff82e1e0c0 r gmc_v11_0_gmc_funcs -ffffffff82e1e118 r gmc_v11_0_irq_funcs -ffffffff82e1e128 r gmc_v11_0_ecc_funcs -ffffffff82e1f000 r gmc_v7_0_ip_funcs -ffffffff82e1f0a8 R gmc_v7_0_ip_block -ffffffff82e1f0c0 R gmc_v7_4_ip_block -ffffffff82e1f0d8 r gmc_v7_0_gmc_funcs -ffffffff82e1f130 r gmc_v7_0_irq_funcs -ffffffff82e1f140 r iceland_mgcg_cgcg_init -ffffffff82e1f150 r golden_settings_iceland_a11 -ffffffff82e1f180 r mc_cg_registers -ffffffff82e1f1b0 r mc_cg_en -ffffffff82e1f1e0 r mc_cg_ls_en -ffffffff82e20000 r gmc_v8_0_ip_funcs -ffffffff82e200a8 R gmc_v8_0_ip_block -ffffffff82e200c0 R gmc_v8_1_ip_block -ffffffff82e200d8 R gmc_v8_5_ip_block -ffffffff82e200f0 r gmc_v8_0_gmc_funcs -ffffffff82e20148 r gmc_v8_0_irq_funcs -ffffffff82e20158 r fiji_mgcg_cgcg_init -ffffffff82e20170 r golden_settings_fiji_a10 -ffffffff82e201a0 r tonga_mgcg_cgcg_init -ffffffff82e201b0 r golden_settings_tonga_a11 -ffffffff82e20210 r golden_settings_polaris11_a11 -ffffffff82e20240 r golden_settings_polaris10_a11 -ffffffff82e2027c r cz_mgcg_cgcg_init -ffffffff82e20290 r stoney_mgcg_cgcg_init -ffffffff82e202b0 r golden_settings_stoney_common -ffffffff82e21000 R gmc_v9_0_ip_funcs -ffffffff82e210a8 R gmc_v9_0_ip_block -ffffffff82e210c0 r gmc_v9_0_gmc_funcs -ffffffff82e21118 r gmc_v9_0_irq_funcs -ffffffff82e21128 r gmc_v9_0_ecc_funcs -ffffffff82e21140 r gfxhub_client_ids -ffffffff82e211b0 r mmhub_client_ids_vega10 -ffffffff82e214a0 r mmhub_client_ids_vega12 -ffffffff82e217a0 r mmhub_client_ids_vega20 -ffffffff82e21a90 r mmhub_client_ids_arcturus -ffffffff82e232a0 r mmhub_client_ids_raven -ffffffff82e23460 r mmhub_client_ids_renoir -ffffffff82e23650 r mmhub_client_ids_aldebaran -ffffffff82e24e60 r ecc_umc_mcumc_ctrl_addrs -ffffffff82e24ee0 r ecc_umc_mcumc_ctrl_mask_addrs -ffffffff82e24f60 r golden_settings_mmhub_1_0_0 -ffffffff82e24f90 r golden_settings_athub_1_0_0 -ffffffff82e25000 R hdp_v4_0_funcs -ffffffff82e26000 R hdp_v5_0_funcs -ffffffff82e27000 R hdp_v5_2_funcs -ffffffff82e28000 R hdp_v6_0_funcs -ffffffff82e29000 r iceland_ih_ip_funcs -ffffffff82e290a8 R iceland_ih_ip_block -ffffffff82e290c0 r iceland_ih_funcs -ffffffff82e2a000 r ih_v6_0_ip_funcs -ffffffff82e2a0a8 R ih_v6_0_ip_block -ffffffff82e2a0c0 r ih_v6_0_funcs -ffffffff82e2a0e0 r ih_v6_0_self_irq_funcs -ffffffff82e2b000 r ih_v6_1_ip_funcs -ffffffff82e2b0a8 R ih_v6_1_ip_block -ffffffff82e2b0c0 r ih_v6_1_funcs -ffffffff82e2b0e0 r ih_v6_1_self_irq_funcs -ffffffff82e2c000 R gfx_v11_0_imu_funcs -ffffffff82e2c030 r imu_rlc_ram_golden_11 -ffffffff82e2c680 r imu_rlc_ram_golden_11_0_2 -ffffffff82e2d000 r imu_rlc_ram_golden_11_0_3 -ffffffff82e2e000 r jpeg_v1_0_decode_ring_vm_funcs -ffffffff82e2e140 r jpeg_v1_0_irq_funcs -ffffffff82e2f000 r jpeg_v2_0_ip_funcs -ffffffff82e2f0a8 R jpeg_v2_0_ip_block -ffffffff82e2f0c0 r jpeg_v2_0_dec_ring_vm_funcs -ffffffff82e2f200 r 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ih_v6_1_ip_block +ffffffff82e2a0c0 r ih_v6_1_funcs +ffffffff82e2a0e0 r ih_v6_1_self_irq_funcs +ffffffff82e2b000 R gfx_v11_0_imu_funcs +ffffffff82e2b030 r imu_rlc_ram_golden_11 +ffffffff82e2b680 r imu_rlc_ram_golden_11_0_2 +ffffffff82e2c000 r imu_rlc_ram_golden_11_0_3 +ffffffff82e2d000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82e2d140 r jpeg_v1_0_irq_funcs +ffffffff82e2e000 r jpeg_v2_0_ip_funcs +ffffffff82e2e0a8 R jpeg_v2_0_ip_block +ffffffff82e2e0c0 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82e2e200 r jpeg_v2_0_irq_funcs +ffffffff82e2f000 r jpeg_v2_5_ip_funcs +ffffffff82e2f0a8 R jpeg_v2_5_ip_block +ffffffff82e2f0c0 r jpeg_v2_6_ip_funcs +ffffffff82e2f168 R jpeg_v2_6_ip_block +ffffffff82e2f180 R jpeg_v2_6_ras_hw_ops +ffffffff82e2f1c0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82e2f300 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82e2f440 r jpeg_v2_5_irq_funcs +ffffffff82e2f450 r jpeg_v2_6_ras_irq_funcs +ffffffff82e30000 r jpeg_v3_0_ip_funcs +ffffffff82e300a8 R jpeg_v3_0_ip_block +ffffffff82e300c0 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82e30200 r jpeg_v3_0_irq_funcs +ffffffff82e31000 r jpeg_v4_0_ip_funcs +ffffffff82e310a8 R jpeg_v4_0_ip_block +ffffffff82e310c0 R jpeg_v4_0_ras_hw_ops +ffffffff82e31100 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82e31240 r jpeg_v4_0_irq_funcs +ffffffff82e31250 r jpeg_v4_0_ras_irq_funcs +ffffffff82e32000 r jpeg_v4_0_3_ip_funcs +ffffffff82e320a8 R jpeg_v4_0_3_ip_block +ffffffff82e320c0 r jpeg_v4_0_3_dec_ring_vm_funcs +ffffffff82e32200 r jpeg_v4_0_3_irq_funcs +ffffffff82e32210 r jpeg_v4_0_3_ras_hw_ops +ffffffff82e32250 r jpeg_v4_0_3_ue_reg_list +ffffffff82e33000 R lsdma_v6_0_funcs +ffffffff82e34000 r mca_v3_0_mp0_hw_ops +ffffffff82e34040 r mca_v3_0_mp1_hw_ops +ffffffff82e34080 r mca_v3_0_mpio_hw_ops +ffffffff82e35000 r mes_v10_1_ip_funcs +ffffffff82e350a8 R mes_v10_1_ip_block +ffffffff82e350c0 r mes_v10_1_funcs +ffffffff82e350f0 r mes_v10_1_ring_funcs +ffffffff82e36000 r mes_v11_0_ip_funcs +ffffffff82e360a8 R mes_v11_0_ip_block +ffffffff82e360c0 r mes_v11_0_funcs +ffffffff82e360f0 r mes_v11_0_ring_funcs +ffffffff82e37000 R mmhub_v1_0_funcs +ffffffff82e37050 r mmhub_v1_0_edc_cnt_regs +ffffffff82e370c0 r mmhub_v1_0_ras_fields +ffffffff82e38000 R mmhub_v1_7_funcs +ffffffff82e38050 r mmhub_v1_7_edc_cnt_regs +ffffffff82e38250 r mmhub_v1_7_ras_fields +ffffffff82e399c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82e3a000 R mmhub_v1_8_funcs +ffffffff82e3a050 r mmhub_v1_8_ras_hw_ops +ffffffff82e3a090 r mmhub_v1_8_ce_reg_list +ffffffff82e3a180 r mmhub_v1_8_ras_memory_list +ffffffff82e3a2b0 r mmhub_v1_8_ue_reg_list +ffffffff82e3b000 R mmhub_v2_0_funcs +ffffffff82e3b050 r mmhub_v2_0_vmhub_funcs +ffffffff82e3b060 r mmhub_client_ids_navi1x +ffffffff82e3b190 r mmhub_client_ids_sienna_cichlid +ffffffff82e3b450 r mmhub_client_ids_beige_goby +ffffffff82e3c000 R mmhub_v2_3_funcs +ffffffff82e3c050 r mmhub_v2_3_vmhub_funcs +ffffffff82e3c060 r mmhub_client_ids_vangogh +ffffffff82e3d000 R mmhub_v3_0_funcs +ffffffff82e3d050 r mmhub_v3_0_vmhub_funcs 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+ffffffff82e5b000 R sdma_v4_4_ras_hw_ops +ffffffff82e5b040 r sdma_v4_4_ras_fields +ffffffff82e5c000 R sdma_v4_4_2_ip_funcs +ffffffff82e5c0a8 R sdma_v4_4_2_ip_block +ffffffff82e5c0c0 r sdma_v4_4_2_ring_funcs +ffffffff82e5c200 r sdma_v4_4_2_page_ring_funcs +ffffffff82e5c340 r sdma_v4_4_2_buffer_funcs +ffffffff82e5c360 r sdma_v4_4_2_vm_pte_funcs +ffffffff82e5c380 r sdma_v4_4_2_trap_irq_funcs +ffffffff82e5c390 r sdma_v4_4_2_illegal_inst_irq_funcs +ffffffff82e5c3a0 r sdma_v4_4_2_ecc_irq_funcs +ffffffff82e5c3b0 r sdma_v4_4_2_vm_hole_irq_funcs +ffffffff82e5c3c0 r sdma_v4_4_2_doorbell_invalid_irq_funcs +ffffffff82e5c3d0 r sdma_v4_4_2_pool_timeout_irq_funcs +ffffffff82e5c3e0 r sdma_v4_4_2_srbm_write_irq_funcs +ffffffff82e5c3f0 r sdma_v4_4_2_ras_hw_ops +ffffffff82e5c430 r sdma_v4_2_2_ue_reg_list +ffffffff82e5c460 r sdma_v4_4_2_ras_memory_list +ffffffff82e5d000 R sdma_v5_0_ip_funcs +ffffffff82e5d0a8 R sdma_v5_0_ip_block +ffffffff82e5d0c0 r sdma_v5_0_ring_funcs +ffffffff82e5d200 r sdma_v5_0_buffer_funcs +ffffffff82e5d220 r sdma_v5_0_vm_pte_funcs +ffffffff82e5d240 r sdma_v5_0_trap_irq_funcs +ffffffff82e5d250 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82e5d260 r golden_settings_sdma_5 +ffffffff82e5d4a0 r golden_settings_sdma_nv10 +ffffffff82e5d4d0 r golden_settings_sdma_nv14 +ffffffff82e5d500 r golden_settings_sdma_5_sriov +ffffffff82e5d6e0 r golden_settings_sdma_nv12 +ffffffff82e5d770 r golden_settings_sdma_cyan_skillfish +ffffffff82e5e000 R sdma_v5_2_ip_funcs +ffffffff82e5e0a8 R sdma_v5_2_ip_block +ffffffff82e5e0c0 r sdma_v5_2_ring_funcs +ffffffff82e5e200 r sdma_v5_2_buffer_funcs +ffffffff82e5e220 r sdma_v5_2_vm_pte_funcs +ffffffff82e5e240 r sdma_v5_2_trap_irq_funcs +ffffffff82e5e250 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82e5f000 R sdma_v6_0_ip_funcs +ffffffff82e5f0a8 R sdma_v6_0_ip_block +ffffffff82e5f0c0 r sdma_v6_0_ring_funcs +ffffffff82e5f200 r sdma_v6_0_buffer_funcs +ffffffff82e5f220 r sdma_v6_0_vm_pte_funcs +ffffffff82e5f240 r sdma_v6_0_trap_irq_funcs +ffffffff82e5f250 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82e60000 r smu_v11_0_i2c_algo +ffffffff82e60010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82e60028 r smu_v11_0_i2c_control_quirks +ffffffff82e61000 R smuio_v11_0_funcs +ffffffff82e62000 R smuio_v11_0_6_funcs +ffffffff82e63000 R smuio_v13_0_funcs +ffffffff82e64000 R smuio_v13_0_3_funcs +ffffffff82e65000 R smuio_v13_0_6_funcs +ffffffff82e66000 R smuio_v9_0_funcs +ffffffff82e67000 r soc15_common_ip_funcs +ffffffff82e670a8 R vega10_common_ip_block +ffffffff82e670c0 r soc15_asic_funcs +ffffffff82e67180 r vega20_asic_funcs +ffffffff82e67240 r aqua_vanjaram_asic_funcs +ffffffff82e67300 r soc15_allowed_read_registers +ffffffff82e67490 r vega_video_codecs_encode +ffffffff82e674a0 r vega_video_codecs_decode +ffffffff82e674b0 r rv_video_codecs_decode +ffffffff82e674c0 r rn_video_codecs_decode +ffffffff82e674d0 r vcn_4_0_3_video_codecs_encode +ffffffff82e674e0 r vcn_4_0_3_video_codecs_decode +ffffffff82e674f0 r vega_video_codecs_encode_array +ffffffff82e67520 r vega_video_codecs_decode_array +ffffffff82e675a0 r rv_video_codecs_decode_array +ffffffff82e67630 r rn_video_codecs_decode_array +ffffffff82e676c0 r vcn_4_0_3_video_codecs_decode_array +ffffffff82e68000 r soc21_common_ip_funcs +ffffffff82e680a8 R soc21_common_ip_block +ffffffff82e680c0 r soc21_asic_funcs +ffffffff82e68180 r soc21_allowed_read_registers +ffffffff82e68300 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82e68310 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82e68320 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82e68330 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82e68340 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82e68370 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82e683c0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82e68400 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82e69000 r tonga_ih_ip_funcs +ffffffff82e690a8 R tonga_ih_ip_block +ffffffff82e690c0 r tonga_ih_funcs +ffffffff82e6a000 R umc_v6_0_funcs +ffffffff82e6b000 R umc_v6_1_channel_idx_tbl +ffffffff82e6b080 R umc_v6_1_ras_hw_ops +ffffffff82e6c000 R umc_v6_7_channel_idx_tbl_second +ffffffff82e6c080 R umc_v6_7_channel_idx_tbl_first +ffffffff82e6c100 R umc_v6_7_ras_hw_ops +ffffffff82e6d000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82e6d040 R umc_v8_10_channel_idx_tbl_ext0 +ffffffff82e6d080 R umc_v8_10_channel_idx_tbl +ffffffff82e6d0e0 R umc_v8_10_ras_hw_ops +ffffffff82e6e000 R umc_v8_7_channel_idx_tbl +ffffffff82e6e040 R umc_v8_7_ras_hw_ops +ffffffff82e6f000 r uvd_v5_0_ip_funcs +ffffffff82e6f0a8 R uvd_v5_0_ip_block +ffffffff82e6f0c0 r uvd_v5_0_ring_funcs +ffffffff82e6f200 r uvd_v5_0_irq_funcs +ffffffff82e70000 r uvd_v6_0_ip_funcs +ffffffff82e700a8 R uvd_v6_0_ip_block +ffffffff82e700c0 R uvd_v6_2_ip_block +ffffffff82e700d8 R uvd_v6_3_ip_block +ffffffff82e700f0 r uvd_v6_0_ring_vm_funcs +ffffffff82e70230 r uvd_v6_0_ring_phys_funcs +ffffffff82e70370 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82e704b0 r uvd_v6_0_irq_funcs +ffffffff82e71000 R uvd_v7_0_ip_funcs +ffffffff82e710a8 R uvd_v7_0_ip_block +ffffffff82e710c0 r uvd_v7_0_ring_vm_funcs +ffffffff82e71200 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82e71340 r uvd_v7_0_irq_funcs +ffffffff82e72000 r vce_v3_0_ip_funcs +ffffffff82e720a8 R vce_v3_0_ip_block +ffffffff82e720c0 R vce_v3_1_ip_block +ffffffff82e720d8 R vce_v3_4_ip_block +ffffffff82e720f0 r vce_v3_0_ring_vm_funcs +ffffffff82e72230 r vce_v3_0_ring_phys_funcs +ffffffff82e72370 r vce_v3_0_irq_funcs +ffffffff82e73000 R vce_v4_0_ip_funcs +ffffffff82e730a8 R vce_v4_0_ip_block +ffffffff82e730c0 r vce_v4_0_ring_vm_funcs +ffffffff82e73200 r vce_v4_0_irq_funcs +ffffffff82e74000 r vcn_v1_0_ip_funcs +ffffffff82e740a8 R vcn_v1_0_ip_block +ffffffff82e740c0 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82e74200 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82e74340 r vcn_v1_0_irq_funcs +ffffffff82e75000 r vcn_v2_0_ip_funcs +ffffffff82e750a8 R vcn_v2_0_ip_block +ffffffff82e750c0 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82e75200 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82e75340 r vcn_v2_0_irq_funcs +ffffffff82e76000 r vcn_v2_5_ip_funcs +ffffffff82e760a8 R vcn_v2_5_ip_block +ffffffff82e760c0 r vcn_v2_6_ip_funcs +ffffffff82e76168 R vcn_v2_6_ip_block +ffffffff82e76180 R vcn_v2_6_ras_hw_ops +ffffffff82e761c0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82e76300 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82e76440 r vcn_v2_5_irq_funcs +ffffffff82e76450 r vcn_v2_6_ras_irq_funcs +ffffffff82e77000 r vcn_v3_0_ip_funcs +ffffffff82e770a8 R vcn_v3_0_ip_block +ffffffff82e770c0 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82e77200 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82e77340 r vcn_v3_0_irq_funcs +ffffffff82e78000 r vcn_v4_0_ip_funcs +ffffffff82e780a8 R vcn_v4_0_ip_block +ffffffff82e780c0 R vcn_v4_0_ras_hw_ops +ffffffff82e78100 r vcn_v4_0_irq_funcs +ffffffff82e78110 r vcn_v4_0_ras_irq_funcs +ffffffff82e79000 r vcn_v4_0_3_ip_funcs +ffffffff82e790a8 R vcn_v4_0_3_ip_block +ffffffff82e790c0 r vcn_v4_0_3_unified_ring_vm_funcs +ffffffff82e79200 r vcn_v4_0_3_irq_funcs +ffffffff82e79210 r vcn_v4_0_3_ras_hw_ops +ffffffff82e79250 r vcn_v4_0_3_ue_reg_list +ffffffff82e7a000 R vega10_ih_ip_funcs +ffffffff82e7a0a8 R vega10_ih_ip_block +ffffffff82e7a0c0 r vega10_ih_funcs +ffffffff82e7a0e0 r vega10_ih_self_irq_funcs +ffffffff82e7b000 r GC_BASE +ffffffff82e7b064 r HDP_BASE +ffffffff82e7b0c8 r MMHUB_BASE +ffffffff82e7b12c r ATHUB_BASE +ffffffff82e7b190 r NBIO_BASE +ffffffff82e7b1f4 r MP0_BASE +ffffffff82e7b258 r MP1_BASE +ffffffff82e7b2bc r VCE_BASE +ffffffff82e7b320 r VCN_BASE +ffffffff82e7b384 r DF_BASE +ffffffff82e7b3e8 r DCE_BASE +ffffffff82e7b44c r OSSSYS_BASE +ffffffff82e7b4b0 r SDMA0_BASE +ffffffff82e7b514 r SDMA1_BASE +ffffffff82e7b578 r SMUIO_BASE +ffffffff82e7b5dc r PWR_BASE +ffffffff82e7b640 r NBIF_BASE +ffffffff82e7b6a4 r THM_BASE +ffffffff82e7b708 r CLK_BASE +ffffffff82e7c000 R vega20_ih_ip_funcs +ffffffff82e7c0a8 R vega20_ih_ip_block +ffffffff82e7c0c0 r vega20_ih_funcs +ffffffff82e7c0e0 r vega20_ih_self_irq_funcs +ffffffff82e7d000 r GC_BASE +ffffffff82e7d090 r HDP_BASE +ffffffff82e7d120 r MMHUB_BASE +ffffffff82e7d1b0 r ATHUB_BASE +ffffffff82e7d240 r NBIO_BASE +ffffffff82e7d2d0 r MP0_BASE +ffffffff82e7d360 r MP1_BASE +ffffffff82e7d3f0 r UVD_BASE +ffffffff82e7d480 r VCE_BASE +ffffffff82e7d510 r DF_BASE +ffffffff82e7d5a0 r DCE_BASE +ffffffff82e7d630 r OSSSYS_BASE +ffffffff82e7d6c0 r SDMA0_BASE +ffffffff82e7d750 r SDMA1_BASE +ffffffff82e7d7e0 r SMUIO_BASE +ffffffff82e7d870 r THM_BASE +ffffffff82e7d900 r CLK_BASE +ffffffff82e7d990 r UMC_BASE +ffffffff82e7da20 r RSMU_BASE +ffffffff82e7e000 r vi_common_ip_block +ffffffff82e7e018 r vi_common_ip_funcs +ffffffff82e7e0c0 r vi_asic_funcs +ffffffff82e7e180 r vi_allowed_read_registers +ffffffff82e7e3e0 r topaz_video_codecs_encode +ffffffff82e7e3f0 r topaz_video_codecs_decode +ffffffff82e7e400 r tonga_video_codecs_encode +ffffffff82e7e410 r tonga_video_codecs_decode +ffffffff82e7e420 r polaris_video_codecs_encode +ffffffff82e7e430 r cz_video_codecs_decode +ffffffff82e7e440 r tonga_video_codecs_encode_array +ffffffff82e7e460 r tonga_video_codecs_decode_array +ffffffff82e7e4b0 r polaris_video_codecs_encode_array +ffffffff82e7e4e0 r cz_video_codecs_decode_array +ffffffff82e7e560 r iceland_mgcg_cgcg_init +ffffffff82e7e5a0 r fiji_mgcg_cgcg_init +ffffffff82e7e600 r tonga_mgcg_cgcg_init +ffffffff82e7e660 r cz_mgcg_cgcg_init +ffffffff82e7e6a0 r stoney_mgcg_cgcg_init +ffffffff82e7f000 r amdgpu_dm_funcs +ffffffff82e7f0a8 R dm_ip_block +ffffffff82e7f0c0 R amdgpu_dm_encoder_helper_funcs +ffffffff82e7f128 r dm_display_funcs +ffffffff82e7f180 r hpd_disconnect_quirk_table +ffffffff82e7fef0 r amdgpu_dm_mode_funcs +ffffffff82e7ff38 r amdgpu_dm_audio_component_bind_ops +ffffffff82e7ff48 r amdgpu_dm_audio_component_ops +ffffffff82e7ff80 r amdgpu_dm_encoder_funcs +ffffffff82e7ffa0 r amdgpu_dm_connector_funcs +ffffffff82e80018 r amdgpu_dm_connector_helper_funcs +ffffffff82e80078 r amdgpu_dm_i2c_algo +ffffffff82e80088 r amdgpu_dm_backlight_ops +ffffffff82e80260 r add_fs_modes.common_rates +ffffffff82e81000 r amdgpu_dm_crtc_funcs +ffffffff82e810c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82e82000 r dm_dtn_log_begin.msg +ffffffff82e8200d r dm_dtn_log_end.msg +ffffffff82e82018 r SYNAPTICS_DEVICE_ID +ffffffff82e83000 r dm_crtc_irq_funcs +ffffffff82e83010 r dm_vline0_irq_funcs +ffffffff82e83020 r dm_dmub_outbox_irq_funcs +ffffffff82e83030 r dm_vupdate_irq_funcs +ffffffff82e83040 r dm_dmub_trace_irq_funcs +ffffffff82e83050 r dm_pageflip_irq_funcs +ffffffff82e83060 r dm_hpd_irq_funcs +ffffffff82e84000 r amdgpu_dm_encoder_funcs +ffffffff82e84020 r dm_mst_cbs +ffffffff82e84030 r dm_dp_mst_connector_funcs +ffffffff82e840a8 r dm_dp_mst_connector_helper_funcs +ffffffff82e85000 r dm_plane_funcs +ffffffff82e85068 r dm_plane_helper_funcs +ffffffff82e87000 r vbios_funcs ffffffff82e88000 r vbios_funcs -ffffffff82e89000 r vbios_funcs +ffffffff82e8d000 r command_table_helper_funcs ffffffff82e8e000 r command_table_helper_funcs ffffffff82e8f000 r command_table_helper_funcs ffffffff82e90000 r command_table_helper_funcs -ffffffff82e91000 r command_table_helper_funcs -ffffffff82e92000 r dce80_max_clks_by_state +ffffffff82e91000 r dce80_max_clks_by_state +ffffffff82e91028 r disp_clk_regs +ffffffff82e9107c r disp_clk_shift +ffffffff82e91088 r disp_clk_mask +ffffffff82e92000 r dce110_max_clks_by_state ffffffff82e92028 r disp_clk_regs ffffffff82e9207c r disp_clk_shift ffffffff82e92088 r disp_clk_mask -ffffffff82e93000 r dce110_max_clks_by_state +ffffffff82e93000 r dce112_max_clks_by_state ffffffff82e93028 r disp_clk_regs ffffffff82e9307c r disp_clk_shift ffffffff82e93088 r disp_clk_mask -ffffffff82e94000 r dce112_max_clks_by_state -ffffffff82e94028 r disp_clk_regs -ffffffff82e9407c r disp_clk_shift -ffffffff82e94088 r disp_clk_mask -ffffffff82e95000 r dce120_max_clks_by_state +ffffffff82e94000 r dce120_max_clks_by_state +ffffffff82e95000 r clk_mgr_regs +ffffffff82e95054 r clk_mgr_shift +ffffffff82e95060 r clk_mgr_mask ffffffff82e96000 r clk_mgr_regs ffffffff82e96054 r clk_mgr_shift ffffffff82e96060 r clk_mgr_mask ffffffff82e97000 r clk_mgr_regs ffffffff82e97054 r clk_mgr_shift ffffffff82e97060 r clk_mgr_mask -ffffffff82e98000 r clk_mgr_regs -ffffffff82e98054 r clk_mgr_shift -ffffffff82e98060 r clk_mgr_mask +ffffffff82e98000 r lpddr5_wm_table +ffffffff82e980c0 r ddr5_wm_table ffffffff82e99000 r lpddr5_wm_table ffffffff82e990c0 r ddr5_wm_table -ffffffff82e9a000 r lpddr5_wm_table -ffffffff82e9a0c0 r ddr5_wm_table -ffffffff82e9b000 r ddr5_wm_table -ffffffff82e9c000 r lpddr5_wm_table -ffffffff82e9c0c0 r ddr4_wm_table -ffffffff82e9d000 r clk_mgr_regs_dcn321 -ffffffff82e9d054 r clk_mgr_shift_dcn321 -ffffffff82e9d060 r clk_mgr_mask_dcn321 -ffffffff82e9d084 r clk_mgr_regs_dcn32 -ffffffff82e9d0d8 r clk_mgr_shift_dcn32 -ffffffff82e9d0e4 r clk_mgr_mask_dcn32 -ffffffff82e9e000 r DC_BUILD_ID -ffffffff82ea0000 r output_csc_matrix -ffffffff82ea00e0 r black_color_format -ffffffff82ea3000 r dce_funcs -ffffffff82ea4000 r funcs -ffffffff82ea5000 R video_optimized_pixel_rates -ffffffff82ea51c0 r dce110_clk_src_funcs -ffffffff82ea51e8 r dce112_clk_src_funcs -ffffffff82ea5210 r dcn20_clk_src_funcs -ffffffff82ea5238 r dcn3_clk_src_funcs -ffffffff82ea5260 r dcn31_clk_src_funcs -ffffffff82ea6000 r dce_funcs -ffffffff82ea6068 r dcn10_funcs -ffffffff82ea60d0 r dcn20_funcs -ffffffff82ea6138 r dcn21_funcs -ffffffff82ea7000 r dce_ipp_funcs -ffffffff82ea8000 r dce110_lnk_enc_funcs -ffffffff82ea9000 r dce_mi_funcs -ffffffff82ea9090 r dce112_mi_funcs -ffffffff82ea9120 r dce120_mi_funcs -ffffffff82ea91b0 r pte_settings -ffffffff82eaa000 r funcs -ffffffff82eab000 r dce_link_panel_cntl_funcs -ffffffff82eac000 r filter_3tap_16p_upscale -ffffffff82eac040 r filter_3tap_16p_116 -ffffffff82eac080 r filter_3tap_16p_149 -ffffffff82eac0c0 r filter_3tap_16p_183 -ffffffff82eac100 r filter_3tap_64p_upscale -ffffffff82eac1d0 r filter_3tap_64p_116 -ffffffff82eac2a0 r filter_3tap_64p_149 -ffffffff82eac370 r filter_3tap_64p_183 -ffffffff82eac440 r filter_4tap_16p_upscale -ffffffff82eac490 r filter_4tap_16p_116 -ffffffff82eac4e0 r filter_4tap_16p_149 -ffffffff82eac530 r filter_4tap_16p_183 -ffffffff82eac580 r filter_4tap_64p_upscale -ffffffff82eac690 r filter_4tap_64p_116 -ffffffff82eac7a0 r filter_4tap_64p_149 -ffffffff82eac8b0 r filter_4tap_64p_183 -ffffffff82eac9c0 r filter_5tap_64p_upscale -ffffffff82eacb10 r filter_5tap_64p_116 -ffffffff82eacc60 r filter_5tap_64p_149 -ffffffff82eacdb0 r filter_5tap_64p_183 -ffffffff82eacf00 r filter_6tap_64p_upscale -ffffffff82ead090 r filter_6tap_64p_116 -ffffffff82ead220 r filter_6tap_64p_149 -ffffffff82ead3b0 r filter_6tap_64p_183 -ffffffff82ead540 r filter_7tap_64p_upscale -ffffffff82ead710 r filter_7tap_64p_116 -ffffffff82ead8e0 r filter_7tap_64p_149 -ffffffff82eadab0 r filter_7tap_64p_183 -ffffffff82eadc80 r filter_8tap_64p_upscale -ffffffff82eade90 r filter_8tap_64p_116 -ffffffff82eae0a0 r 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+ffffffff82f8ae5c r hpo_dp_se_mask +ffffffff82f8aefc r apg_shift +ffffffff82f8af04 r apg_mask +ffffffff82f8af1c r hpo_dp_le_shift +ffffffff82f8af38 r hpo_dp_le_mask +ffffffff82f8af9c r hwseq_shift +ffffffff82f8b01c r hwseq_mask +ffffffff82f8c000 r dcn321_link_enc_funcs +ffffffff82f8d000 r res_cap_dcn321 +ffffffff82f8d03c r dccg_shift +ffffffff82f8d0dc r dccg_mask +ffffffff82f8d350 r abm_shift +ffffffff82f8d374 r abm_mask +ffffffff82f8d400 r res_create_funcs +ffffffff82f8d430 r plane_cap +ffffffff82f8d45c r le_shift +ffffffff82f8d54c r le_mask +ffffffff82f8d904 r link_enc_feature +ffffffff82f8d918 r debug_defaults_drv +ffffffff82f8dac0 r cs_shift +ffffffff82f8dacc r cs_mask +ffffffff82f8daf4 r hubbub_shift +ffffffff82f8db84 r hubbub_mask +ffffffff82f8ddbc r vmid_shifts +ffffffff82f8ddc4 r vmid_masks +ffffffff82f8dde4 r hubp_shift +ffffffff82f8dee0 r hubp_mask +ffffffff82f8e2d0 r tf_shift +ffffffff82f8e5a4 r tf_mask +ffffffff82f8f0e8 r opp_shift +ffffffff82f8f120 r opp_mask +ffffffff82f8f1f4 r optc_shift +ffffffff82f8f2c8 r optc_mask +ffffffff82f8f610 r mpc_shift +ffffffff82f8f6ec r mpc_mask +ffffffff82f8fa58 r dsc_shift +ffffffff82f8fb10 r dsc_mask +ffffffff82f8fde8 r dwbc30_shift +ffffffff82f8ff1c r dwbc30_mask +ffffffff82f903e4 r mcif_wb30_shift +ffffffff82f90490 r mcif_wb30_mask +ffffffff82f9073c r aux_mask +ffffffff82f9079c r aux_shift +ffffffff82f907b4 r i2c_shifts +ffffffff82f907e0 r i2c_masks +ffffffff82f90884 r audio_shift +ffffffff82f9089c r audio_mask +ffffffff82f908d8 r se_shift +ffffffff82f909b4 r se_mask +ffffffff82f90d20 r vpg_shift +ffffffff82f90d48 r vpg_mask +ffffffff82f90ddc r afmt_shift +ffffffff82f90df0 r afmt_mask +ffffffff82f90e34 r hpo_dp_se_shift +ffffffff82f90e5c r hpo_dp_se_mask +ffffffff82f90efc r apg_shift +ffffffff82f90f04 r apg_mask +ffffffff82f90f1c r hpo_dp_le_shift +ffffffff82f90f38 r hpo_dp_le_mask +ffffffff82f90f9c r hwseq_shift +ffffffff82f9101c r hwseq_mask +ffffffff82f93000 R dcn10_soc_defaults +ffffffff82f9308c R dcn10_ip_defaults +ffffffff82f9f000 r dml20_funcs +ffffffff82f9f030 r dml20v2_funcs +ffffffff82f9f060 r dml21_funcs +ffffffff82f9f090 r dml30_funcs +ffffffff82f9f0c0 r dml31_funcs +ffffffff82f9f0f0 r dml314_funcs +ffffffff82f9f120 r dml32_funcs +ffffffff82fa2000 r qp_table_444_8bpc_max +ffffffff82fa2940 r qp_table_444_8bpc_min +ffffffff82fa3280 r qp_table_444_10bpc_max +ffffffff82fa3ec0 r qp_table_444_10bpc_min +ffffffff82fa4b00 r qp_table_444_12bpc_max +ffffffff82fa5a40 r qp_table_444_12bpc_min +ffffffff82fa6980 r qp_table_422_8bpc_max +ffffffff82fa6ec0 r qp_table_422_8bpc_min +ffffffff82fa7400 r qp_table_422_10bpc_max +ffffffff82fa7b40 r qp_table_422_10bpc_min +ffffffff82fa8280 r qp_table_422_12bpc_max +ffffffff82fa8bc0 r qp_table_422_12bpc_min +ffffffff82fa9500 r qp_table_420_8bpc_max +ffffffff82fa9940 r qp_table_420_8bpc_min +ffffffff82fa9d80 r qp_table_420_10bpc_max +ffffffff82faa340 r qp_table_420_10bpc_min +ffffffff82faa900 r qp_table_420_12bpc_max +ffffffff82fab040 r qp_table_420_12bpc_min +ffffffff82fad000 r funcs +ffffffff82fad050 r hpd_regs +ffffffff82fad1a0 r hpd_shift +ffffffff82fad1b0 r hpd_mask +ffffffff82fad1c0 r ddc_data_regs +ffffffff82fad3a0 r ddc_clk_regs +ffffffff82fad580 r ddc_shift +ffffffff82fad5a8 r ddc_mask ffffffff82fae000 r funcs -ffffffff82fae050 r hpd_regs -ffffffff82fae1a0 r hpd_shift -ffffffff82fae1b0 r hpd_mask -ffffffff82fae1c0 r ddc_data_regs -ffffffff82fae3a0 r ddc_clk_regs -ffffffff82fae580 r ddc_shift -ffffffff82fae5a8 r ddc_mask ffffffff82faf000 r funcs +ffffffff82faf050 r hpd_regs +ffffffff82faf1a0 r hpd_shift +ffffffff82faf1b0 r hpd_mask +ffffffff82faf1c0 r ddc_data_regs +ffffffff82faf3a0 r ddc_clk_regs +ffffffff82faf580 r ddc_shift +ffffffff82faf5a8 r ddc_mask ffffffff82fb0000 r funcs -ffffffff82fb0050 r hpd_regs -ffffffff82fb01a0 r hpd_shift -ffffffff82fb01b0 r hpd_mask -ffffffff82fb01c0 r ddc_data_regs -ffffffff82fb03a0 r ddc_clk_regs -ffffffff82fb0580 r ddc_shift -ffffffff82fb05a8 r ddc_mask ffffffff82fb1000 r funcs +ffffffff82fb1050 r hpd_regs +ffffffff82fb11a0 r hpd_shift +ffffffff82fb11b0 r hpd_mask +ffffffff82fb11c0 r ddc_data_regs +ffffffff82fb13a0 r ddc_clk_regs +ffffffff82fb1580 r ddc_shift +ffffffff82fb15a8 r ddc_mask ffffffff82fb2000 r funcs -ffffffff82fb2050 r hpd_regs -ffffffff82fb21a0 r hpd_shift -ffffffff82fb21b0 r hpd_mask -ffffffff82fb21c0 r ddc_data_regs -ffffffff82fb23a0 r ddc_clk_regs -ffffffff82fb2580 r ddc_shift -ffffffff82fb25a8 r ddc_mask ffffffff82fb3000 r funcs +ffffffff82fb3050 r hpd_regs +ffffffff82fb31a0 r hpd_shift +ffffffff82fb31b0 r hpd_mask +ffffffff82fb31c0 r ddc_data_regs +ffffffff82fb33a0 r ddc_clk_regs +ffffffff82fb3580 r ddc_shift +ffffffff82fb35a8 r ddc_mask +ffffffff82fb35d0 r generic_regs +ffffffff82fb3640 r generic_shift +ffffffff82fb3650 r generic_mask ffffffff82fb4000 r funcs -ffffffff82fb4050 r hpd_regs -ffffffff82fb41a0 r hpd_shift -ffffffff82fb41b0 r hpd_mask -ffffffff82fb41c0 r ddc_data_regs -ffffffff82fb43a0 r ddc_clk_regs -ffffffff82fb4580 r ddc_shift -ffffffff82fb45a8 r ddc_mask -ffffffff82fb45d0 r generic_regs -ffffffff82fb4640 r generic_shift -ffffffff82fb4650 r generic_mask ffffffff82fb5000 r funcs +ffffffff82fb5050 r hpd_regs +ffffffff82fb51a0 r hpd_shift +ffffffff82fb51b0 r hpd_mask +ffffffff82fb51c0 r ddc_data_regs_dcn +ffffffff82fb5370 r ddc_clk_regs_dcn +ffffffff82fb5520 r ddc_shift +ffffffff82fb5640 r ddc_mask +ffffffff82fb5760 r generic_regs +ffffffff82fb57d0 r generic_shift +ffffffff82fb57e0 r generic_mask ffffffff82fb6000 r funcs -ffffffff82fb6050 r hpd_regs -ffffffff82fb61a0 r hpd_shift -ffffffff82fb61b0 r hpd_mask -ffffffff82fb61c0 r ddc_data_regs_dcn -ffffffff82fb6370 r ddc_clk_regs_dcn -ffffffff82fb6520 r ddc_shift -ffffffff82fb6640 r ddc_mask -ffffffff82fb6760 r generic_regs -ffffffff82fb67d0 r generic_shift -ffffffff82fb67e0 r generic_mask ffffffff82fb7000 r funcs +ffffffff82fb7050 r hpd_regs +ffffffff82fb7168 r hpd_shift +ffffffff82fb7178 r hpd_mask +ffffffff82fb7190 r ddc_data_regs_dcn +ffffffff82fb72c0 r ddc_clk_regs_dcn +ffffffff82fb73f0 r ddc_shift +ffffffff82fb74e0 r ddc_mask +ffffffff82fb75d0 r generic_regs +ffffffff82fb7604 r generic_shift +ffffffff82fb760c r generic_mask ffffffff82fb8000 r funcs -ffffffff82fb8050 r hpd_regs -ffffffff82fb8168 r hpd_shift -ffffffff82fb8178 r hpd_mask -ffffffff82fb8190 r ddc_data_regs_dcn -ffffffff82fb82c0 r ddc_clk_regs_dcn -ffffffff82fb83f0 r ddc_shift -ffffffff82fb84e0 r ddc_mask -ffffffff82fb85d0 r generic_regs -ffffffff82fb8604 r generic_shift -ffffffff82fb860c r generic_mask ffffffff82fb9000 r funcs +ffffffff82fb9050 r hpd_regs +ffffffff82fb91a0 r hpd_shift +ffffffff82fb91b0 r hpd_mask +ffffffff82fb91c0 r ddc_data_regs_dcn +ffffffff82fb9370 r ddc_clk_regs_dcn +ffffffff82fb9520 r ddc_shift +ffffffff82fb9640 r ddc_mask +ffffffff82fb9760 r generic_regs +ffffffff82fb97d0 r generic_shift +ffffffff82fb97e0 r generic_mask ffffffff82fba000 r funcs -ffffffff82fba050 r hpd_regs -ffffffff82fba1a0 r hpd_shift -ffffffff82fba1b0 r hpd_mask -ffffffff82fba1c0 r ddc_data_regs_dcn -ffffffff82fba370 r ddc_clk_regs_dcn -ffffffff82fba520 r ddc_shift -ffffffff82fba640 r ddc_mask -ffffffff82fba760 r generic_regs -ffffffff82fba7d0 r generic_shift -ffffffff82fba7e0 r generic_mask ffffffff82fbb000 r funcs +ffffffff82fbb050 r hpd_regs +ffffffff82fbb168 r hpd_shift +ffffffff82fbb178 r hpd_mask +ffffffff82fbb190 r ddc_data_regs_dcn +ffffffff82fbb300 r ddc_clk_regs_dcn +ffffffff82fbb470 r ddc_shift +ffffffff82fbb560 r ddc_mask +ffffffff82fbb650 r generic_regs +ffffffff82fbb6c0 r generic_shift +ffffffff82fbb6d0 r generic_mask ffffffff82fbc000 r funcs -ffffffff82fbc050 r hpd_regs -ffffffff82fbc168 r hpd_shift -ffffffff82fbc178 r hpd_mask -ffffffff82fbc190 r ddc_data_regs_dcn -ffffffff82fbc300 r ddc_clk_regs_dcn -ffffffff82fbc470 r ddc_shift -ffffffff82fbc560 r ddc_mask -ffffffff82fbc650 r generic_regs -ffffffff82fbc6c0 r generic_shift -ffffffff82fbc6d0 r generic_mask ffffffff82fbd000 r funcs +ffffffff82fbd050 r hpd_regs +ffffffff82fbd168 r hpd_shift +ffffffff82fbd178 r hpd_mask +ffffffff82fbd190 r ddc_data_regs_dcn +ffffffff82fbd340 r ddc_clk_regs_dcn +ffffffff82fbd4f0 r ddc_shift +ffffffff82fbd610 r ddc_mask +ffffffff82fbd730 r generic_regs +ffffffff82fbd7a0 r generic_shift +ffffffff82fbd7b0 r generic_mask ffffffff82fbe000 r funcs -ffffffff82fbe050 r hpd_regs -ffffffff82fbe168 r hpd_shift -ffffffff82fbe178 r hpd_mask -ffffffff82fbe190 r ddc_data_regs_dcn -ffffffff82fbe340 r ddc_clk_regs_dcn -ffffffff82fbe4f0 r ddc_shift -ffffffff82fbe610 r ddc_mask -ffffffff82fbe730 r generic_regs -ffffffff82fbe7a0 r generic_shift -ffffffff82fbe7b0 r generic_mask ffffffff82fbf000 r funcs ffffffff82fc0000 r funcs ffffffff82fc1000 r funcs -ffffffff82fc2000 r funcs -ffffffff82fc3000 r hdmi_14_protection -ffffffff82fc3010 r dp_11_protection -ffffffff82fc3020 r hdcp_i2c_offsets -ffffffff82fc3050 r hdcp_dpcd_addrs -ffffffff82fc4000 r irq_service_funcs_dce110 -ffffffff82fc4008 r dummy_irq_info_funcs -ffffffff82fc4018 r hpd_irq_info_funcs -ffffffff82fc4028 r hpd_rx_irq_info_funcs -ffffffff82fc4038 r pflip_irq_info_funcs -ffffffff82fc4048 r vupdate_irq_info_funcs -ffffffff82fc4058 r vblank_irq_info_funcs -ffffffff82fc4070 r irq_source_info_dce110 -ffffffff82fc6000 r irq_service_funcs_dce120 -ffffffff82fc6008 r dummy_irq_info_funcs -ffffffff82fc6018 r hpd_irq_info_funcs -ffffffff82fc6028 r hpd_rx_irq_info_funcs -ffffffff82fc6038 r pflip_irq_info_funcs -ffffffff82fc6048 r vupdate_irq_info_funcs -ffffffff82fc6058 r vblank_irq_info_funcs -ffffffff82fc6070 r irq_source_info_dce120 -ffffffff82fc8000 r irq_service_funcs_dce80 -ffffffff82fc8008 r dummy_irq_info_funcs -ffffffff82fc8018 r hpd_irq_info_funcs -ffffffff82fc8028 r hpd_rx_irq_info_funcs -ffffffff82fc8038 r pflip_irq_info_funcs -ffffffff82fc8048 r vupdate_irq_info_funcs -ffffffff82fc8058 r vblank_irq_info_funcs -ffffffff82fc8070 r irq_source_info_dce80 -ffffffff82fca000 r irq_service_funcs_dcn10 -ffffffff82fca008 r dummy_irq_info_funcs -ffffffff82fca018 r hpd_irq_info_funcs -ffffffff82fca028 r hpd_rx_irq_info_funcs -ffffffff82fca038 r pflip_irq_info_funcs -ffffffff82fca048 r vupdate_no_lock_irq_info_funcs -ffffffff82fca058 r vblank_irq_info_funcs -ffffffff82fca068 r vline0_irq_info_funcs -ffffffff82fca080 r irq_source_info_dcn10 -ffffffff82fcc000 r irq_service_funcs_dcn20 -ffffffff82fcc008 r dummy_irq_info_funcs -ffffffff82fcc018 r hpd_irq_info_funcs -ffffffff82fcc028 r hpd_rx_irq_info_funcs -ffffffff82fcc038 r pflip_irq_info_funcs -ffffffff82fcc048 r vupdate_no_lock_irq_info_funcs -ffffffff82fcc058 r vblank_irq_info_funcs -ffffffff82fcc068 r vline0_irq_info_funcs -ffffffff82fcc080 r irq_source_info_dcn20 -ffffffff82fce000 r irq_service_funcs_dcn201 -ffffffff82fce008 r dummy_irq_info_funcs -ffffffff82fce018 r hpd_irq_info_funcs -ffffffff82fce028 r hpd_rx_irq_info_funcs -ffffffff82fce038 r pflip_irq_info_funcs -ffffffff82fce048 r vupdate_no_lock_irq_info_funcs -ffffffff82fce058 r vblank_irq_info_funcs -ffffffff82fce068 r vline0_irq_info_funcs -ffffffff82fce080 r irq_source_info_dcn201 -ffffffff82fd0000 r irq_source_info_dcn21 -ffffffff82fd1290 r irq_service_funcs_dcn21 -ffffffff82fd1298 r dummy_irq_info_funcs -ffffffff82fd12a8 r hpd_irq_info_funcs -ffffffff82fd12b8 r hpd_rx_irq_info_funcs -ffffffff82fd12c8 r pflip_irq_info_funcs -ffffffff82fd12d8 r vupdate_no_lock_irq_info_funcs -ffffffff82fd12e8 r vblank_irq_info_funcs -ffffffff82fd12f8 r vline0_irq_info_funcs -ffffffff82fd1308 r dmub_outbox_irq_info_funcs -ffffffff82fd2000 r irq_source_info_dcn30 -ffffffff82fd3290 r irq_service_funcs_dcn30 -ffffffff82fd3298 r dummy_irq_info_funcs -ffffffff82fd32a8 r hpd_irq_info_funcs -ffffffff82fd32b8 r hpd_rx_irq_info_funcs -ffffffff82fd32c8 r pflip_irq_info_funcs -ffffffff82fd32d8 r vupdate_no_lock_irq_info_funcs -ffffffff82fd32e8 r vblank_irq_info_funcs -ffffffff82fd32f8 r vline0_irq_info_funcs -ffffffff82fd3308 r dmub_trace_irq_info_funcs -ffffffff82fd4000 r irq_source_info_dcn302 -ffffffff82fd5290 r irq_service_funcs_dcn302 -ffffffff82fd5298 r dummy_irq_info_funcs -ffffffff82fd52a8 r hpd_irq_info_funcs -ffffffff82fd52b8 r hpd_rx_irq_info_funcs -ffffffff82fd52c8 r pflip_irq_info_funcs -ffffffff82fd52d8 r vupdate_no_lock_irq_info_funcs -ffffffff82fd52e8 r vblank_irq_info_funcs -ffffffff82fd52f8 r vline0_irq_info_funcs -ffffffff82fd5308 r dmub_trace_irq_info_funcs -ffffffff82fd6000 r irq_service_funcs_dcn303 -ffffffff82fd6008 r dummy_irq_info_funcs -ffffffff82fd6018 r hpd_irq_info_funcs -ffffffff82fd6028 r hpd_rx_irq_info_funcs -ffffffff82fd6038 r pflip_irq_info_funcs -ffffffff82fd6048 r vupdate_no_lock_irq_info_funcs -ffffffff82fd6058 r vblank_irq_info_funcs -ffffffff82fd6068 r vline0_irq_info_funcs -ffffffff82fd6080 r irq_source_info_dcn303 -ffffffff82fd8000 r irq_source_info_dcn31 -ffffffff82fd9290 r irq_service_funcs_dcn31 -ffffffff82fd9298 r dummy_irq_info_funcs -ffffffff82fd92a8 r hpd_irq_info_funcs -ffffffff82fd92b8 r hpd_rx_irq_info_funcs -ffffffff82fd92c8 r pflip_irq_info_funcs -ffffffff82fd92d8 r vupdate_no_lock_irq_info_funcs -ffffffff82fd92e8 r vblank_irq_info_funcs -ffffffff82fd92f8 r vline0_irq_info_funcs -ffffffff82fd9308 r outbox_irq_info_funcs -ffffffff82fda000 r irq_source_info_dcn314 -ffffffff82fdb290 r irq_service_funcs_dcn314 -ffffffff82fdb298 r dummy_irq_info_funcs -ffffffff82fdb2a8 r hpd_irq_info_funcs -ffffffff82fdb2b8 r hpd_rx_irq_info_funcs -ffffffff82fdb2c8 r pflip_irq_info_funcs -ffffffff82fdb2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82fdb2e8 r vblank_irq_info_funcs -ffffffff82fdb2f8 r vline0_irq_info_funcs -ffffffff82fdb308 r outbox_irq_info_funcs -ffffffff82fdc000 r irq_source_info_dcn315 -ffffffff82fdd290 r irq_service_funcs_dcn315 -ffffffff82fdd298 r dummy_irq_info_funcs -ffffffff82fdd2a8 r hpd_irq_info_funcs -ffffffff82fdd2b8 r hpd_rx_irq_info_funcs -ffffffff82fdd2c8 r pflip_irq_info_funcs -ffffffff82fdd2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82fdd2e8 r vblank_irq_info_funcs -ffffffff82fdd2f8 r vline0_irq_info_funcs -ffffffff82fdd308 r outbox_irq_info_funcs -ffffffff82fde000 r irq_source_info_dcn32 -ffffffff82fdf290 r irq_service_funcs_dcn32 -ffffffff82fdf298 r dummy_irq_info_funcs -ffffffff82fdf2a8 r hpd_irq_info_funcs -ffffffff82fdf2b8 r hpd_rx_irq_info_funcs -ffffffff82fdf2c8 r pflip_irq_info_funcs -ffffffff82fdf2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82fdf2e8 r vblank_irq_info_funcs -ffffffff82fdf2f8 r vline0_irq_info_funcs -ffffffff82fdf308 r outbox_irq_info_funcs -ffffffff82fe1000 r dio_link_hwss -ffffffff82fe2000 r dio_fixed_vs_pe_retimer_link_hwss -ffffffff82fe3000 r dpia_link_hwss -ffffffff82fe4000 r hpo_dp_link_hwss -ffffffff82fe5000 r hpo_fixed_vs_pe_retimer_dp_link_hwss -ffffffff82fe6000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82fe7000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82fe7006 r DP_DVI_CONVERTER_ID_4 -ffffffff82fe700d r DP_DVI_CONVERTER_ID_5 -ffffffff82fe8000 r dp_lt_fallbacks -ffffffff82fec000 r mandatory_dpcd_partitions -ffffffff82fed000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82fed007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82fee000 r virtual_lnk_enc_funcs -ffffffff82fef000 r virtual_link_hwss -ffffffff82ff0000 r virtual_str_enc_funcs -ffffffff82ff1000 R dmub_srv_dcn20_regs -ffffffff82ff2000 R dmub_srv_dcn21_regs -ffffffff82ff3000 R dmub_srv_dcn30_regs -ffffffff82ff4000 R dmub_srv_dcn301_regs -ffffffff82ff5000 R dmub_srv_dcn302_regs -ffffffff82ff6000 R dmub_srv_dcn303_regs -ffffffff82ff7000 R dmub_srv_dcn31_regs -ffffffff82ff8000 R dmub_srv_dcn314_regs -ffffffff82ff9000 R dmub_srv_dcn315_regs -ffffffff82ffa000 R dmub_srv_dcn316_regs -ffffffff82ffb000 R dmub_srv_dcn32_regs -ffffffff82ffc000 r numerator01 -ffffffff82ffc020 r numerator02 -ffffffff82ffc040 r numerator04 -ffffffff82ffc060 r numerator05 -ffffffff83000000 r abm_settings -ffffffff83000020 r abm_settings_config0 -ffffffff83000060 r abm_settings_config1 -ffffffff830000a0 r abm_settings_config2 -ffffffff830000d8 r min_reduction_table_v_2_2 -ffffffff830000e5 r max_reduction_table_v_2_2 -ffffffff830000f2 r min_reduction_table -ffffffff830000ff r max_reduction_table -ffffffff83000110 r custom_backlight_curve0 -ffffffff83001000 R amdgpu_pp_profile_name -ffffffff83002000 r pp_lib_thermal_controller_names -ffffffff83003000 r pp_ip_funcs -ffffffff830030a8 R pp_smu_ip_block -ffffffff830030c0 r pp_dpm_funcs +ffffffff82fc2000 r hdmi_14_protection +ffffffff82fc2010 r dp_11_protection +ffffffff82fc2020 r hdcp_i2c_offsets +ffffffff82fc2050 r hdcp_dpcd_addrs +ffffffff82fc3000 r irq_service_funcs_dce110 +ffffffff82fc3008 r dummy_irq_info_funcs +ffffffff82fc3018 r hpd_irq_info_funcs +ffffffff82fc3028 r hpd_rx_irq_info_funcs +ffffffff82fc3038 r pflip_irq_info_funcs +ffffffff82fc3048 r vupdate_irq_info_funcs +ffffffff82fc3058 r vblank_irq_info_funcs +ffffffff82fc3070 r irq_source_info_dce110 +ffffffff82fc5000 r irq_service_funcs_dce120 +ffffffff82fc5008 r dummy_irq_info_funcs +ffffffff82fc5018 r hpd_irq_info_funcs +ffffffff82fc5028 r hpd_rx_irq_info_funcs +ffffffff82fc5038 r pflip_irq_info_funcs +ffffffff82fc5048 r vupdate_irq_info_funcs +ffffffff82fc5058 r vblank_irq_info_funcs +ffffffff82fc5070 r irq_source_info_dce120 +ffffffff82fc7000 r irq_service_funcs_dce80 +ffffffff82fc7008 r dummy_irq_info_funcs +ffffffff82fc7018 r hpd_irq_info_funcs +ffffffff82fc7028 r hpd_rx_irq_info_funcs +ffffffff82fc7038 r pflip_irq_info_funcs +ffffffff82fc7048 r vupdate_irq_info_funcs +ffffffff82fc7058 r vblank_irq_info_funcs +ffffffff82fc7070 r irq_source_info_dce80 +ffffffff82fc9000 r irq_service_funcs_dcn10 +ffffffff82fc9008 r dummy_irq_info_funcs +ffffffff82fc9018 r hpd_irq_info_funcs +ffffffff82fc9028 r hpd_rx_irq_info_funcs +ffffffff82fc9038 r pflip_irq_info_funcs +ffffffff82fc9048 r vupdate_no_lock_irq_info_funcs +ffffffff82fc9058 r vblank_irq_info_funcs +ffffffff82fc9068 r vline0_irq_info_funcs +ffffffff82fc9080 r irq_source_info_dcn10 +ffffffff82fcb000 r irq_service_funcs_dcn20 +ffffffff82fcb008 r dummy_irq_info_funcs +ffffffff82fcb018 r hpd_irq_info_funcs +ffffffff82fcb028 r hpd_rx_irq_info_funcs +ffffffff82fcb038 r pflip_irq_info_funcs +ffffffff82fcb048 r vupdate_no_lock_irq_info_funcs +ffffffff82fcb058 r vblank_irq_info_funcs +ffffffff82fcb068 r vline0_irq_info_funcs +ffffffff82fcb080 r irq_source_info_dcn20 +ffffffff82fcd000 r irq_service_funcs_dcn201 +ffffffff82fcd008 r dummy_irq_info_funcs +ffffffff82fcd018 r hpd_irq_info_funcs +ffffffff82fcd028 r hpd_rx_irq_info_funcs +ffffffff82fcd038 r pflip_irq_info_funcs +ffffffff82fcd048 r vupdate_no_lock_irq_info_funcs +ffffffff82fcd058 r vblank_irq_info_funcs +ffffffff82fcd068 r vline0_irq_info_funcs +ffffffff82fcd080 r irq_source_info_dcn201 +ffffffff82fcf000 r irq_source_info_dcn21 +ffffffff82fd0290 r irq_service_funcs_dcn21 +ffffffff82fd0298 r dummy_irq_info_funcs +ffffffff82fd02a8 r hpd_irq_info_funcs +ffffffff82fd02b8 r hpd_rx_irq_info_funcs +ffffffff82fd02c8 r pflip_irq_info_funcs +ffffffff82fd02d8 r vupdate_no_lock_irq_info_funcs +ffffffff82fd02e8 r vblank_irq_info_funcs +ffffffff82fd02f8 r vline0_irq_info_funcs +ffffffff82fd0308 r dmub_outbox_irq_info_funcs +ffffffff82fd1000 r irq_source_info_dcn30 +ffffffff82fd2290 r irq_service_funcs_dcn30 +ffffffff82fd2298 r dummy_irq_info_funcs +ffffffff82fd22a8 r hpd_irq_info_funcs +ffffffff82fd22b8 r hpd_rx_irq_info_funcs +ffffffff82fd22c8 r pflip_irq_info_funcs +ffffffff82fd22d8 r vupdate_no_lock_irq_info_funcs +ffffffff82fd22e8 r vblank_irq_info_funcs +ffffffff82fd22f8 r vline0_irq_info_funcs +ffffffff82fd2308 r dmub_trace_irq_info_funcs +ffffffff82fd3000 r irq_source_info_dcn302 +ffffffff82fd4290 r irq_service_funcs_dcn302 +ffffffff82fd4298 r dummy_irq_info_funcs +ffffffff82fd42a8 r hpd_irq_info_funcs +ffffffff82fd42b8 r hpd_rx_irq_info_funcs +ffffffff82fd42c8 r pflip_irq_info_funcs +ffffffff82fd42d8 r vupdate_no_lock_irq_info_funcs +ffffffff82fd42e8 r vblank_irq_info_funcs +ffffffff82fd42f8 r vline0_irq_info_funcs +ffffffff82fd4308 r dmub_trace_irq_info_funcs +ffffffff82fd5000 r irq_service_funcs_dcn303 +ffffffff82fd5008 r dummy_irq_info_funcs +ffffffff82fd5018 r hpd_irq_info_funcs +ffffffff82fd5028 r hpd_rx_irq_info_funcs +ffffffff82fd5038 r pflip_irq_info_funcs +ffffffff82fd5048 r vupdate_no_lock_irq_info_funcs +ffffffff82fd5058 r vblank_irq_info_funcs +ffffffff82fd5068 r vline0_irq_info_funcs +ffffffff82fd5080 r irq_source_info_dcn303 +ffffffff82fd7000 r irq_source_info_dcn31 +ffffffff82fd8290 r irq_service_funcs_dcn31 +ffffffff82fd8298 r dummy_irq_info_funcs +ffffffff82fd82a8 r hpd_irq_info_funcs +ffffffff82fd82b8 r hpd_rx_irq_info_funcs +ffffffff82fd82c8 r pflip_irq_info_funcs +ffffffff82fd82d8 r vupdate_no_lock_irq_info_funcs +ffffffff82fd82e8 r vblank_irq_info_funcs +ffffffff82fd82f8 r vline0_irq_info_funcs +ffffffff82fd8308 r outbox_irq_info_funcs +ffffffff82fd9000 r irq_source_info_dcn314 +ffffffff82fda290 r irq_service_funcs_dcn314 +ffffffff82fda298 r dummy_irq_info_funcs +ffffffff82fda2a8 r hpd_irq_info_funcs +ffffffff82fda2b8 r hpd_rx_irq_info_funcs +ffffffff82fda2c8 r pflip_irq_info_funcs +ffffffff82fda2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82fda2e8 r vblank_irq_info_funcs +ffffffff82fda2f8 r vline0_irq_info_funcs +ffffffff82fda308 r outbox_irq_info_funcs +ffffffff82fdb000 r irq_source_info_dcn315 +ffffffff82fdc290 r irq_service_funcs_dcn315 +ffffffff82fdc298 r dummy_irq_info_funcs +ffffffff82fdc2a8 r hpd_irq_info_funcs +ffffffff82fdc2b8 r hpd_rx_irq_info_funcs +ffffffff82fdc2c8 r pflip_irq_info_funcs +ffffffff82fdc2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82fdc2e8 r vblank_irq_info_funcs +ffffffff82fdc2f8 r vline0_irq_info_funcs +ffffffff82fdc308 r outbox_irq_info_funcs +ffffffff82fdd000 r irq_source_info_dcn32 +ffffffff82fde290 r irq_service_funcs_dcn32 +ffffffff82fde298 r dummy_irq_info_funcs +ffffffff82fde2a8 r hpd_irq_info_funcs +ffffffff82fde2b8 r hpd_rx_irq_info_funcs +ffffffff82fde2c8 r pflip_irq_info_funcs +ffffffff82fde2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82fde2e8 r vblank_irq_info_funcs +ffffffff82fde2f8 r vline0_irq_info_funcs +ffffffff82fde308 r outbox_irq_info_funcs +ffffffff82fe0000 r dio_link_hwss +ffffffff82fe1000 r dio_fixed_vs_pe_retimer_link_hwss +ffffffff82fe2000 r dpia_link_hwss +ffffffff82fe3000 r hpo_dp_link_hwss +ffffffff82fe4000 r hpo_fixed_vs_pe_retimer_dp_link_hwss +ffffffff82fe5000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82fe6000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82fe6006 r DP_DVI_CONVERTER_ID_4 +ffffffff82fe600d r DP_DVI_CONVERTER_ID_5 +ffffffff82fe7000 r dp_lt_fallbacks +ffffffff82feb000 r mandatory_dpcd_partitions +ffffffff82fec000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82fec007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82fed000 r virtual_lnk_enc_funcs +ffffffff82fee000 r virtual_link_hwss +ffffffff82fef000 r virtual_str_enc_funcs +ffffffff82ff0000 R dmub_srv_dcn20_regs +ffffffff82ff1000 R dmub_srv_dcn21_regs +ffffffff82ff2000 R dmub_srv_dcn30_regs +ffffffff82ff3000 R dmub_srv_dcn301_regs +ffffffff82ff4000 R dmub_srv_dcn302_regs +ffffffff82ff5000 R dmub_srv_dcn303_regs +ffffffff82ff6000 R dmub_srv_dcn31_regs +ffffffff82ff7000 R dmub_srv_dcn314_regs +ffffffff82ff8000 R dmub_srv_dcn315_regs +ffffffff82ff9000 R dmub_srv_dcn316_regs +ffffffff82ffa000 R dmub_srv_dcn32_regs +ffffffff82ffb000 r numerator01 +ffffffff82ffb020 r numerator02 +ffffffff82ffb040 r numerator04 +ffffffff82ffb060 r numerator05 +ffffffff82fff000 r abm_settings +ffffffff82fff020 r abm_settings_config0 +ffffffff82fff060 r abm_settings_config1 +ffffffff82fff0a0 r abm_settings_config2 +ffffffff82fff0d8 r min_reduction_table_v_2_2 +ffffffff82fff0e5 r max_reduction_table_v_2_2 +ffffffff82fff0f2 r min_reduction_table +ffffffff82fff0ff r max_reduction_table +ffffffff82fff110 r custom_backlight_curve0 +ffffffff83000000 R amdgpu_pp_profile_name +ffffffff83001000 r pp_lib_thermal_controller_names +ffffffff83002000 r pp_ip_funcs +ffffffff830020a8 R pp_smu_ip_block +ffffffff830020c0 r pp_dpm_funcs +ffffffff83003000 r gpio_tbl +ffffffff830030f0 r enable_fb_req_rej_tbl +ffffffff83003140 r use_bclk_tbl +ffffffff83003310 r turn_off_plls_tbl +ffffffff83003640 r enter_baco_tbl +ffffffff83003730 r exit_baco_tbl +ffffffff83003850 r clean_baco_tbl ffffffff83004000 r gpio_tbl ffffffff830040f0 r enable_fb_req_rej_tbl ffffffff83004140 r use_bclk_tbl -ffffffff83004310 r turn_off_plls_tbl -ffffffff83004640 r enter_baco_tbl -ffffffff83004730 r exit_baco_tbl -ffffffff83004850 r clean_baco_tbl +ffffffff830042e0 r turn_off_plls_tbl +ffffffff83004370 r clk_req_b_tbl +ffffffff83004490 r enter_baco_tbl +ffffffff830045b0 r exit_baco_tbl +ffffffff830046d0 r clean_baco_tbl ffffffff83005000 r gpio_tbl ffffffff830050f0 r enable_fb_req_rej_tbl -ffffffff83005140 r use_bclk_tbl -ffffffff830052e0 r turn_off_plls_tbl -ffffffff83005370 r clk_req_b_tbl -ffffffff83005490 r enter_baco_tbl -ffffffff830055b0 r exit_baco_tbl -ffffffff830056d0 r clean_baco_tbl -ffffffff83006000 r gpio_tbl -ffffffff830060f0 r enable_fb_req_rej_tbl -ffffffff83006140 r use_bclk_tbl_vg -ffffffff83006200 r turn_off_plls_tbl_vg -ffffffff83006350 r use_bclk_tbl -ffffffff83006440 r turn_off_plls_tbl -ffffffff830065f0 r clk_req_b_tbl -ffffffff83006710 r enter_baco_tbl -ffffffff83006830 r exit_baco_tbl -ffffffff83006950 r clean_baco_tbl -ffffffff83007000 r vega10_fuses_default -ffffffff83016000 r pp_r600_encode_lanes -ffffffff83017000 R pptable_v1_0_funcs -ffffffff83018000 R pptable_funcs -ffffffff83018020 r soft_dummy_pp_table -ffffffff83019000 r smu10_hwmgr_funcs -ffffffff8301a000 r smu7_hwmgr_funcs -ffffffff8301a2f8 r smu7_irq_funcs -ffffffff8301a310 r SMU7ThermalPolicy -ffffffff8301b000 r GCCACConfig_Polaris10 -ffffffff8301b1b0 r DIDTConfig_Polaris10 -ffffffff8301ba50 r GCCACConfig_Polaris11 -ffffffff8301bc00 r DIDTConfig_Polaris11_Kicker -ffffffff8301c4a0 r DIDTConfig_Polaris11 -ffffffff8301cd40 r DIDTConfig_Polaris12 -ffffffff8301d5e0 r GCCACConfig_VegaM -ffffffff8301d790 r DIDTConfig_VegaM -ffffffff8301f000 r smu8_hwmgr_funcs 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SEDiDtTuningCtrlConfig_Vega10 -ffffffff830248b0 r SELCacConfig_Vega10 -ffffffff83024a40 r SEDiDtCtrl0Config_Vega10 -ffffffff83024d10 r AvfsPSMInitConfig_vega10 -ffffffff83024d90 r SEEDCStallPatternConfig_Vega10 -ffffffff83024ea0 r SEEDCStallDelayConfig_Vega10 -ffffffff83024f80 r SEEDCCtrlConfig_Vega10 -ffffffff83025040 r PSMSEEDCStallPatternConfig_Vega10 -ffffffff830250c0 r PSMSEEDCStallDelayConfig_Vega10 -ffffffff830251d0 r PSMSEEDCCtrlResetConfig_Vega10 -ffffffff83025290 r PSMSEEDCCtrlConfig_Vega10 -ffffffff83025350 r SEEDCForceStallPatternConfig_Vega10 -ffffffff830253e0 r SEEDCCtrlForceStallConfig_Vega10 -ffffffff83026000 R vega10_pptable_funcs -ffffffff83027000 r pre_baco_tbl -ffffffff83027090 r enter_baco_tbl -ffffffff830272b0 r exit_baco_tbl -ffffffff83027520 r clean_baco_tbl -ffffffff83028000 r vega12_hwmgr_funcs -ffffffff830282f0 r SMU7ThermalWithDelayPolicy -ffffffff83028340 r link_width -ffffffff83029000 R vega12_pptable_funcs -ffffffff8302a000 r clean_baco_tbl -ffffffff8302b000 r vega20_hwmgr_funcs -ffffffff8302b2f0 r SMU7ThermalWithDelayPolicy -ffffffff8302b340 r link_width -ffffffff8302c000 R vega20_pptable_funcs -ffffffff8302d000 R ci_smu_funcs -ffffffff8302d0e0 r defaults_hawaii_pro -ffffffff8302d12c r defaults_hawaii_xt -ffffffff8302d178 r defaults_saturn_xt -ffffffff8302d1c4 r defaults_bonaire_xt -ffffffff8302d210 r ci_program_jump_on_start.data -ffffffff8302e000 R fiji_smu_funcs -ffffffff8302e0e0 r avfs_graphics_level -ffffffff8302e240 r fiji_power_tune_data_set_array -ffffffff8302e246 r fiji_clock_stretch_amount_conversion -ffffffff8302e260 r fiji_clock_stretcher_ddt_table -ffffffff8302f000 R iceland_smu_funcs -ffffffff8302f0e0 r defaults_icelandxt -ffffffff8302f12c r defaults_icelandpro -ffffffff8302f178 r defaults_iceland -ffffffff83030000 R polaris10_smu_funcs -ffffffff830300e0 r avfs_graphics_level_polaris10 -ffffffff830302a0 r avfs_memory_level_polaris10 -ffffffff830302c0 r polaris10_power_tune_data_set_array -ffffffff83030310 r Range_Table -ffffffff83031000 R smu10_smu_funcs -ffffffff83032000 r smu7_program_jump_on_start.data -ffffffff83032010 r pwr_virus_table_pre -ffffffff83032680 r pwr_virus_table_post -ffffffff83032f80 r pwr_virus_section1 -ffffffff83033610 r pwr_virus_section2 -ffffffff83033660 r pwr_virus_section3 -ffffffff8303aab0 r pwr_virus_section4 -ffffffff8303ae80 r pwr_virus_section5 -ffffffff8303b490 r pwr_virus_section6 -ffffffff8303d000 R smu8_smu_funcs -ffffffff8303e000 R tonga_smu_funcs -ffffffff8303e0e0 r tonga_power_tune_data_set_array -ffffffff8303e12c r tonga_clock_stretch_amount_conversion -ffffffff8303e140 r tonga_clock_stretcher_ddt_table -ffffffff8303f000 R vega10_smu_funcs -ffffffff83040000 R vega12_smu_funcs -ffffffff83041000 R vega20_smu_funcs -ffffffff83042000 R vegam_smu_funcs -ffffffff830420e0 r vegam_power_tune_data_set_array -ffffffff83042130 r Range_Table -ffffffff83043000 R smu_ip_funcs -ffffffff830430a8 R smu_v11_0_ip_block -ffffffff830430c0 R smu_v12_0_ip_block -ffffffff830430d8 R smu_v13_0_ip_block -ffffffff830430f0 r swsmu_pm_funcs -ffffffff83044000 r arcturus_ppt_funcs -ffffffff830443f0 r arcturus_table_map -ffffffff83044470 r arcturus_pwr_src_map -ffffffff83044480 r arcturus_workload_map -ffffffff830444d0 r smu11_thermal_policy -ffffffff83044528 r arcturus_i2c_algo -ffffffff83044538 r arcturus_i2c_control_quirks -ffffffff83044550 r arcturus_throttler_map -ffffffff83044570 r arcturus_message_map -ffffffff83044ff0 r arcturus_clk_map -ffffffff830450b0 r arcturus_feature_mask_map -ffffffff83046000 r cyan_skillfish_ppt_funcs -ffffffff83047000 r navi10_ppt_funcs -ffffffff830473f0 r smu11_thermal_policy -ffffffff83047448 r navi10_i2c_algo -ffffffff83047458 r navi10_i2c_control_quirks -ffffffff83047470 r navi1x_throttler_map -ffffffff83047490 r NoDbiPrbs7 -ffffffff83048490 r DbiPrbs7 -ffffffff8304a000 r sienna_cichlid_ppt_funcs -ffffffff8304a3f0 r smu11_thermal_policy -ffffffff8304a448 r sienna_cichlid_i2c_algo -ffffffff8304a458 r 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-ffffffff83051470 r smu_v13_0_0_throttler_map -ffffffff83052000 r smu_v13_0_4_ppt_funcs -ffffffff83053000 r smu_v13_0_5_ppt_funcs -ffffffff83054000 r smu_v13_0_6_ppt_funcs -ffffffff830543f0 r smu_v13_0_6_message_map -ffffffff83054e70 r smu_v13_0_6_clk_map -ffffffff83054f30 r smu_v13_0_6_table_map -ffffffff83054fb0 r smu_v13_0_6_i2c_algo -ffffffff83054fc0 r smu_v13_0_6_i2c_control_quirks -ffffffff83054fd0 r smu_v13_0_6_irq_funcs -ffffffff83054fe0 r smu_v13_0_6_throttler_map -ffffffff83054ff0 r smu_v13_0_6_feature_mask_map -ffffffff83056000 r smu_v13_0_7_ppt_funcs -ffffffff830563f0 r smu13_thermal_policy -ffffffff83056450 r smu_v13_0_7_throttler_map -ffffffff83057000 r yellow_carp_ppt_funcs -ffffffff83058000 R link_speed -ffffffff83058020 r __smu_message_names -ffffffff83059000 R pchb_ca -ffffffff8305a000 R amas_ca -ffffffff8305a028 R amas_devices -ffffffff8305a040 r amas_feature -ffffffff8305b000 R cardslot_ca -ffffffff8305c000 R cardbus_ca -ffffffff8305d000 R com_cardbus_ca -ffffffff8305e000 R xl_cardbus_ca -ffffffff8305e030 R xl_cardbus_products -ffffffff8305f000 R dc_cardbus_ca -ffffffff8305f030 R dc_cardbus_devices -ffffffff83060000 R fxp_cardbus_ca -ffffffff83060028 R fxp_cardbus_devices -ffffffff83061000 R rl_cardbus_devices -ffffffff83061028 R rl_cardbus_ca -ffffffff83062000 R re_cardbus_ca -ffffffff83062028 R re_cardbus_devices -ffffffff83063000 R ath_cardbus_ca -ffffffff83064000 R athn_cardbus_ca -ffffffff83064030 r athn_cardbus_devices -ffffffff83065000 R atw_cardbus_ca -ffffffff83065028 R atw_cardbus_devices -ffffffff83066000 R rtw_cardbus_ca -ffffffff83066028 R rtw_cardbus_devices -ffffffff83067000 R ral_cardbus_ca -ffffffff83067030 r ral_cardbus_devices -ffffffff83068000 R acx_cardbus_ca -ffffffff83068028 r acx_cardbus_devices -ffffffff83069000 R pgt_cardbus_ca -ffffffff83069028 R pgt_cardbus_devices -ffffffff8306a000 R ehci_cardbus_ca -ffffffff8306b000 R ohci_cardbus_ca -ffffffff8306c000 R uhci_cardbus_ca -ffffffff8306d000 R malo_cardbus_ca -ffffffff8306d028 r malo_cardbus_devices -ffffffff8306e000 R bwi_cardbus_ca -ffffffff8306e030 r bwi_cardbus_devices -ffffffff8306f000 R pcmcia_ca -ffffffff83070000 r pcmcia_parse_cis_tuple.init_cfe -ffffffff83071000 r pcmcia_cis_quirks -ffffffff83072000 R ep_pcmcia_ca -ffffffff83073000 R ne_pcmcia_ca -ffffffff83073030 R ne2000devs -ffffffff83075000 R aic_pcmcia_ca -ffffffff83076000 R com_pcmcia_ca -ffffffff83077000 R wdc_pcmcia_ca -ffffffff83078000 R sm_pcmcia_ca -ffffffff83079000 R xe_pcmcia_ca -ffffffff8307a000 R wi_pcmcia_ca -ffffffff8307a030 r wi_pcmcia_products -ffffffff8307b000 R malo_pcmcia_ca -ffffffff8307c000 R an_pcmcia_ca -ffffffff8307d000 R pcib_ca -ffffffff8307e000 R amdpcib_ca -ffffffff8307e028 R amdpcib_devices -ffffffff8307f000 R tcpcib_ca -ffffffff8307f028 R tcpcib_devices -ffffffff83080000 R aapic_ca -ffffffff83081000 R hme_pci_ca -ffffffff83081028 r hme_promhdr -ffffffff8308102a r hme_promdat -ffffffff83082000 R isa_ca -ffffffff83083000 R isadma_ca -ffffffff83084000 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userconf_histsz -ffffffff834c8020 D userconf_cmds -ffffffff834c9000 D ftlock -ffffffff834ca000 d ppollcollect.poll_errintvl -ffffffff834cb000 D ttydefchars -ffffffff834cb014 D ttclos -ffffffff834cb01b D ttopen -ffffffff834cb022 D ttybg -ffffffff834cb028 D ttyin -ffffffff834cb02e D ttyout -ffffffff834cb038 D ttylist_lock -ffffffff834cc000 D linesw -ffffffff834cc280 D nlinesw -ffffffff834cd000 D pt_softc_lock -ffffffff834ce000 d mbstat_boot_boot_cpumem -ffffffff834ce0c0 D mbstat -ffffffff834ce0d0 D mclsizes -ffffffff834ce0f0 D m_extref_mtx -ffffffff834ce100 D m_pool_allocator -ffffffff834ce120 D m_types -ffffffff834cf000 D somaxconn -ffffffff834cf004 D sominconn -ffffffff834cf008 D sosplice_lock -ffffffff834d0000 D sb_max -ffffffff834d1000 D unp_df_lock -ffffffff834d1010 D unp_gc_lock -ffffffff834d1020 D unp_rights_mtx -ffffffff834d1030 D unp_ino_mtx -ffffffff834d1040 D unp_gc_task -ffffffff834d1070 D unpst_sendspace -ffffffff834d1074 D unpst_recvspace -ffffffff834d1078 D unpsq_sendspace -ffffffff834d107c D unpsq_recvspace -ffffffff834d1080 D unpdg_sendspace -ffffffff834d1084 D unpdg_recvspace -ffffffff834d2000 D doingcache -ffffffff834d3000 D maxvfsconf -ffffffff834d3010 d vfsconflist -ffffffff834d4000 D lockf_lock -ffffffff834d4010 D maxlocksperuid -ffffffff834d5000 D iftovt_tab -ffffffff834d5040 D vttoif_tab -ffffffff834d5064 D suid_clear -ffffffff834d5068 D vnode_mtx -ffffffff834d5078 D vfs_stall_lock -ffffffff834d5090 D vtypes -ffffffff834d50e0 D vtags -ffffffff834d6000 D syncer_maxdelay -ffffffff834d6004 D syncdelay -ffffffff834d7000 D dosdirtemplate -ffffffff834d8000 D ntfs_hashlock -ffffffff834d9000 D ntfs_toupper_lock -ffffffff834da000 D art_table_gc_mtx -ffffffff834da010 D art_table_gc_task -ffffffff834da040 D art_node_gc_mtx -ffffffff834da050 D art_node_gc_task -ffffffff834db000 D bpf_bufsize -ffffffff834db004 D bpf_maxbufsize -ffffffff834db008 D bpf_iflist -ffffffff834dc000 D ifg_head -ffffffff834dc010 D if_cloners_lock -ffffffff834dc020 D if_hooks_mtx -ffffffff834dc030 D if_input_task_locked -ffffffff834dc060 D netlock -ffffffff834dc070 D ifnetlist -ffffffff834dd000 D ifiq_maxlen_drop -ffffffff834dd004 D ifiq_maxlen_return -ffffffff834de000 D etherbroadcastaddr -ffffffff834de006 D ether_ipmulticast_min -ffffffff834de00c D ether_ipmulticast_max -ffffffff834de012 D ether_ip6multicast_min -ffffffff834de018 D ether_ip6multicast_max -ffffffff834df000 D etherip_cloner -ffffffff834df030 D etherip_list -ffffffff834e0000 D loop_cloner -ffffffff834e1000 D ifmedia_mtx -ffffffff834e2000 D ppp_compressors -ffffffff834e2020 D ppp_cloner -ffffffff834e3000 D ppp_pkt_init -ffffffff834e4000 D ppp_bsd_compress -ffffffff834e5000 D ppp_deflate -ffffffff834e5070 D ppp_deflate_draft -ffffffff834e6000 D tun_cloner -ffffffff834e6030 D tap_cloner -ffffffff834e7000 D bridgeintrq -ffffffff834e7038 D bridge_cloner -ffffffff834e8000 d veb_cloner -ffffffff834e8030 d vport_cloner -ffffffff834e9000 D vlan_tagh_lk -ffffffff834e9010 D vlan_cloner -ffffffff834e9040 D svlan_cloner -ffffffff834ea000 D pipex_list_mtx -ffffffff834ea010 D pipex_prune -ffffffff834ea018 D pipexoutq -ffffffff834ea050 d SHAPad2 -ffffffff834eb000 D rtmap_gc -ffffffff834eb018 D rt_rc -ffffffff834ec000 D rt_labels -ffffffff834ec010 D rtlabel_mtx -ffffffff834ed000 D enc_cloner -ffffffff834ee000 D gre_cloner -ffffffff834ee030 D gre_list -ffffffff834ee040 D mgre_cloner -ffffffff834ee070 D egre_cloner -ffffffff834ee0a0 D nvgre_cloner -ffffffff834ee0d0 D eoip_cloner -ffffffff834ef000 D trunk_cloner -ffffffff834f0000 d aggr_cloner -ffffffff834f1000 d tpmr_cloner -ffffffff834f2000 D mpe_cloner -ffffffff834f3000 D mpw_cloner -ffffffff834f4000 D mpip_cloner -ffffffff834f5000 d bpe_cloner -ffffffff834f5030 d bpe_lock -ffffffff834f6000 D vether_cloner -ffffffff834f7000 d rport_cloner -ffffffff834f7030 d rport_interfaces_lock -ffffffff834f8000 D pair_cloner -ffffffff834f9000 d vxlan_cloner -ffffffff834f9030 d vxlan_lock -ffffffff834f9040 d vxlan_teps -ffffffff834fa000 D underload_interval -ffffffff834fa010 D wg_cloner -ffffffff834fb000 d stoeplitz_keyseed -ffffffff834fc000 D ieee80211_cache_size -ffffffff834fd000 D arpt_prune -ffffffff834fd004 D arpt_keep -ffffffff834fd008 D arpt_down -ffffffff834fd010 D arpinq -ffffffff834fd048 D arp_mtx -ffffffff834fd058 D arp_maxtries -ffffffff834fe000 D ipport_firstauto -ffffffff834fe004 D ipport_lastauto -ffffffff834fe008 D ipport_hifirstauto -ffffffff834fe00c D ipport_hilastauto -ffffffff834ff000 D divert_sendspace -ffffffff834ff004 D divert_recvspace -ffffffff834ff008 D divbhashsize -ffffffff83500000 D icmptstamprepl -ffffffff83500004 D icmperrppslim -ffffffff83500008 D icmp_redirtimeout -ffffffff83501000 D ip_sendredirects -ffffffff83501004 D ip_defttl -ffffffff83501008 D ip_mtudisc -ffffffff8350100c D ip_mtudisc_timeout -ffffffff83501010 D ipq_mutex -ffffffff83501020 D ip_maxqueue -ffffffff83501028 D ipintrq -ffffffff83501060 d ipsend_task -ffffffff83501090 d ipsendraw_task -ffffffff83502000 D ip_mrtproto -ffffffff83502004 d sin -ffffffff83503000 D rip_sendspace -ffffffff83503008 D rip_recvspace -ffffffff83504000 D tcp_debug_mtx -ffffffff83505000 D tcprexmtthresh -ffffffff83505004 D tcptv_keep_init -ffffffff83505008 D tcp_rst_ppslim -ffffffff8350500c D tcp_ackdrop_ppslim -ffffffff83505010 D tcp_syn_hash_size -ffffffff83505014 D tcp_syn_cache_limit -ffffffff83505018 D tcp_syn_bucket_limit -ffffffff8350501c D tcp_syn_use_limit -ffffffff83505020 D syn_cache_mtx -ffffffff83506000 D tcp_outflags -ffffffff83507000 D tcp_timer_mtx -ffffffff83507010 D tcp_mssdflt -ffffffff83507014 D tcp_rttdflt -ffffffff83507018 D tcp_do_rfc1323 -ffffffff8350701c D tcp_do_sack -ffffffff83507020 D tcp_do_rfc3390 -ffffffff83507024 D tcp_do_tso -ffffffff83507028 D tcp_reass_limit -ffffffff8350702c D tcp_sackhole_limit -ffffffff83508000 D tcp_backoff -ffffffff83508034 D tcp_totbackoff -ffffffff83509000 D tcp_sendspace -ffffffff83509004 D tcp_recvspace -ffffffff83509008 D tcp_autorcvbuf_inc -ffffffff8350a000 D udpcksum -ffffffff8350a004 D udp_sendspace -ffffffff8350a008 D udp_recvspace -ffffffff8350b000 D ipsec_flows_mtx -ffffffff8350b010 D ipsec_ids_idle -ffffffff8350b014 D ipsec_ids_next_flow -ffffffff8350b018 D ipsec_policy_head -ffffffff8350b028 D ipsp_ids_gc_timeout -ffffffff8350b070 D tdb_sadb_mtx -ffffffff8350b080 d tdb_hashmask -ffffffff8350c000 D ipo_tdb_mtx -ffffffff8350c010 D ipsec_acquire_mtx -ffffffff8350c020 D ipsec_acquire_head -ffffffff8350d000 D ipsec_keep_invalid -ffffffff8350d004 D ipsec_require_pfs -ffffffff8350d008 D ipsec_soft_timeout -ffffffff8350d00c D ipsec_exp_timeout -ffffffff8350d010 D ipsec_soft_first_use -ffffffff8350d014 D ipsec_exp_first_use -ffffffff8350d018 D ipsec_expire_acquire -ffffffff8350d01c D esp_enable -ffffffff8350d020 D ah_enable -ffffffff8350e000 D udpencap_enable -ffffffff8350e004 D udpencap_port -ffffffff8350f000 D carp_vh_rc -ffffffff8350f020 D carp_sc_rc -ffffffff8350f040 D carp_opts -ffffffff8350f058 D carp_cloner +ffffffff83005140 r use_bclk_tbl_vg +ffffffff83005200 r turn_off_plls_tbl_vg +ffffffff83005350 r use_bclk_tbl +ffffffff83005440 r turn_off_plls_tbl +ffffffff830055f0 r clk_req_b_tbl +ffffffff83005710 r enter_baco_tbl +ffffffff83005830 r exit_baco_tbl +ffffffff83005950 r clean_baco_tbl +ffffffff83006000 r vega10_fuses_default +ffffffff83015000 r pp_r600_encode_lanes +ffffffff83016000 R pptable_v1_0_funcs +ffffffff83017000 R pptable_funcs +ffffffff83017020 r soft_dummy_pp_table +ffffffff83018000 r smu10_hwmgr_funcs +ffffffff83019000 r smu7_hwmgr_funcs +ffffffff830192f8 r smu7_irq_funcs +ffffffff83019310 r SMU7ThermalPolicy +ffffffff8301a000 r GCCACConfig_Polaris10 +ffffffff8301a1b0 r DIDTConfig_Polaris10 +ffffffff8301aa50 r GCCACConfig_Polaris11 +ffffffff8301ac00 r DIDTConfig_Polaris11_Kicker +ffffffff8301b4a0 r DIDTConfig_Polaris11 +ffffffff8301bd40 r DIDTConfig_Polaris12 +ffffffff8301c5e0 r GCCACConfig_VegaM +ffffffff8301c790 r DIDTConfig_VegaM +ffffffff8301e000 r smu8_hwmgr_funcs +ffffffff8301e2f0 r SMU7ThermalPolicy +ffffffff8301f000 r smu9_irq_funcs +ffffffff83020000 r gpio_tbl_iceland +ffffffff83020060 r gpio_tbl +ffffffff83020150 r enable_fb_req_rej_tbl +ffffffff830201a0 r use_bclk_tbl +ffffffff83020370 r turn_off_plls_tbl +ffffffff83020610 r enter_baco_tbl +ffffffff83020730 r exit_baco_tbl_iceland +ffffffff83020870 r clean_baco_tbl_iceland +ffffffff83020890 r exit_baco_tbl +ffffffff830209b0 r clean_baco_tbl +ffffffff83021000 r pre_baco_tbl +ffffffff83021090 r enter_baco_tbl +ffffffff830212b0 r exit_baco_tbl +ffffffff83021520 r clean_baco_tbl +ffffffff83022000 r vega10_hwmgr_funcs +ffffffff830222f0 r channel_number +ffffffff83022320 r SMU7ThermalWithDelayPolicy +ffffffff83023000 r SEDiDtStallCtrlConfig_vega10 +ffffffff83023110 r SEDiDtStallPatternConfig_vega10 +ffffffff830232e0 r SEDiDtWeightConfig_Vega10 +ffffffff830233b0 r SEDiDtCtrl1Config_Vega10 +ffffffff83023440 r SEDiDtCtrl2Config_Vega10 +ffffffff83023510 r SEDiDtCtrl3Config_vega10 +ffffffff83023820 r SEDiDtTuningCtrlConfig_Vega10 +ffffffff830238b0 r SELCacConfig_Vega10 +ffffffff83023a40 r SEDiDtCtrl0Config_Vega10 +ffffffff83023d10 r AvfsPSMInitConfig_vega10 +ffffffff83023d90 r SEEDCStallPatternConfig_Vega10 +ffffffff83023ea0 r SEEDCStallDelayConfig_Vega10 +ffffffff83023f80 r SEEDCCtrlConfig_Vega10 +ffffffff83024040 r PSMSEEDCStallPatternConfig_Vega10 +ffffffff830240c0 r PSMSEEDCStallDelayConfig_Vega10 +ffffffff830241d0 r PSMSEEDCCtrlResetConfig_Vega10 +ffffffff83024290 r PSMSEEDCCtrlConfig_Vega10 +ffffffff83024350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff830243e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff83025000 R vega10_pptable_funcs +ffffffff83026000 r pre_baco_tbl +ffffffff83026090 r enter_baco_tbl +ffffffff830262b0 r exit_baco_tbl +ffffffff83026520 r clean_baco_tbl +ffffffff83027000 r vega12_hwmgr_funcs +ffffffff830272f0 r SMU7ThermalWithDelayPolicy +ffffffff83027340 r link_width +ffffffff83028000 R vega12_pptable_funcs +ffffffff83029000 r clean_baco_tbl +ffffffff8302a000 r vega20_hwmgr_funcs +ffffffff8302a2f0 r SMU7ThermalWithDelayPolicy +ffffffff8302a340 r link_width +ffffffff8302b000 R vega20_pptable_funcs +ffffffff8302c000 R ci_smu_funcs +ffffffff8302c0e0 r defaults_hawaii_pro +ffffffff8302c12c r defaults_hawaii_xt +ffffffff8302c178 r defaults_saturn_xt +ffffffff8302c1c4 r defaults_bonaire_xt +ffffffff8302c210 r ci_program_jump_on_start.data +ffffffff8302d000 R fiji_smu_funcs +ffffffff8302d0e0 r avfs_graphics_level +ffffffff8302d240 r fiji_power_tune_data_set_array +ffffffff8302d246 r fiji_clock_stretch_amount_conversion +ffffffff8302d260 r fiji_clock_stretcher_ddt_table +ffffffff8302e000 R iceland_smu_funcs +ffffffff8302e0e0 r defaults_icelandxt +ffffffff8302e12c r defaults_icelandpro +ffffffff8302e178 r defaults_iceland +ffffffff8302f000 R polaris10_smu_funcs +ffffffff8302f0e0 r avfs_graphics_level_polaris10 +ffffffff8302f2a0 r avfs_memory_level_polaris10 +ffffffff8302f2c0 r polaris10_power_tune_data_set_array +ffffffff8302f310 r Range_Table +ffffffff83030000 R smu10_smu_funcs +ffffffff83031000 r smu7_program_jump_on_start.data +ffffffff83031010 r pwr_virus_table_pre +ffffffff83031680 r pwr_virus_table_post +ffffffff83031f80 r pwr_virus_section1 +ffffffff83032610 r pwr_virus_section2 +ffffffff83032660 r pwr_virus_section3 +ffffffff83039ab0 r pwr_virus_section4 +ffffffff83039e80 r pwr_virus_section5 +ffffffff8303a490 r pwr_virus_section6 +ffffffff8303c000 R smu8_smu_funcs +ffffffff8303d000 R tonga_smu_funcs +ffffffff8303d0e0 r tonga_power_tune_data_set_array +ffffffff8303d12c r tonga_clock_stretch_amount_conversion +ffffffff8303d140 r tonga_clock_stretcher_ddt_table +ffffffff8303e000 R vega10_smu_funcs +ffffffff8303f000 R vega12_smu_funcs +ffffffff83040000 R vega20_smu_funcs +ffffffff83041000 R vegam_smu_funcs +ffffffff830410e0 r vegam_power_tune_data_set_array +ffffffff83041130 r Range_Table +ffffffff83042000 R smu_ip_funcs +ffffffff830420a8 R smu_v11_0_ip_block +ffffffff830420c0 R smu_v12_0_ip_block +ffffffff830420d8 R smu_v13_0_ip_block +ffffffff830420f0 r swsmu_pm_funcs +ffffffff83043000 r arcturus_ppt_funcs +ffffffff830433f0 r arcturus_table_map +ffffffff83043470 r arcturus_pwr_src_map +ffffffff83043480 r arcturus_workload_map +ffffffff830434d0 r smu11_thermal_policy +ffffffff83043528 r arcturus_i2c_algo +ffffffff83043538 r arcturus_i2c_control_quirks +ffffffff83043550 r arcturus_throttler_map +ffffffff83043570 r arcturus_message_map +ffffffff83043ff0 r arcturus_clk_map +ffffffff830440b0 r arcturus_feature_mask_map +ffffffff83045000 r cyan_skillfish_ppt_funcs +ffffffff83046000 r navi10_ppt_funcs +ffffffff830463f0 r smu11_thermal_policy +ffffffff83046448 r navi10_i2c_algo +ffffffff83046458 r navi10_i2c_control_quirks +ffffffff83046470 r navi1x_throttler_map +ffffffff83046490 r NoDbiPrbs7 +ffffffff83047490 r DbiPrbs7 +ffffffff83049000 r sienna_cichlid_ppt_funcs +ffffffff830493f0 r smu11_thermal_policy +ffffffff83049448 r sienna_cichlid_i2c_algo +ffffffff83049458 r sienna_cichlid_i2c_control_quirks +ffffffff83049470 r sienna_cichlid_throttler_map +ffffffff8304a000 r smu_v11_0_irq_funcs +ffffffff8304a010 r link_width +ffffffff8304b000 r vangogh_ppt_funcs +ffffffff8304b3e8 r vangogh_throttler_map +ffffffff8304c000 r renoir_ppt_funcs +ffffffff8304c3e8 r renoir_throttler_map +ffffffff8304d000 r aldebaran_ppt_funcs +ffffffff8304d3f0 r aldebaran_clk_map +ffffffff8304d4b0 r aldebaran_table_map +ffffffff8304d530 r smu13_thermal_policy +ffffffff8304d588 r aldebaran_i2c_algo +ffffffff8304d598 r aldebaran_i2c_control_quirks +ffffffff8304d5b0 r aldebaran_throttler_map +ffffffff8304d5d0 r aldebaran_message_map +ffffffff8304e050 r aldebaran_feature_mask_map +ffffffff8304f000 R pmfw_decoded_link_speed +ffffffff8304f020 R pmfw_decoded_link_width +ffffffff8304f040 r smu_v13_0_irq_funcs +ffffffff83050000 r smu_v13_0_0_ppt_funcs +ffffffff830503f0 r smu13_thermal_policy +ffffffff83050448 r smu_v13_0_0_i2c_algo +ffffffff83050458 r smu_v13_0_0_i2c_control_quirks +ffffffff83050470 r smu_v13_0_0_throttler_map +ffffffff83051000 r smu_v13_0_4_ppt_funcs +ffffffff83052000 r smu_v13_0_5_ppt_funcs +ffffffff83053000 r smu_v13_0_6_ppt_funcs +ffffffff830533f0 r smu_v13_0_6_message_map +ffffffff83053e70 r smu_v13_0_6_clk_map +ffffffff83053f30 r smu_v13_0_6_table_map +ffffffff83053fb0 r smu_v13_0_6_i2c_algo +ffffffff83053fc0 r smu_v13_0_6_i2c_control_quirks +ffffffff83053fd0 r smu_v13_0_6_irq_funcs +ffffffff83053fe0 r smu_v13_0_6_throttler_map +ffffffff83053ff0 r smu_v13_0_6_feature_mask_map +ffffffff83055000 r smu_v13_0_7_ppt_funcs +ffffffff830553f0 r smu13_thermal_policy +ffffffff83055450 r smu_v13_0_7_throttler_map +ffffffff83056000 r yellow_carp_ppt_funcs +ffffffff83057000 R link_speed +ffffffff83057020 r __smu_message_names +ffffffff83058000 R pchb_ca +ffffffff83059000 R amas_ca +ffffffff83059028 R amas_devices +ffffffff83059040 r amas_feature +ffffffff8305a000 R cardslot_ca +ffffffff8305b000 R cardbus_ca +ffffffff8305c000 R com_cardbus_ca +ffffffff8305d000 R xl_cardbus_ca +ffffffff8305d030 R xl_cardbus_products +ffffffff8305e000 R dc_cardbus_ca +ffffffff8305e030 R dc_cardbus_devices +ffffffff8305f000 R fxp_cardbus_ca +ffffffff8305f028 R fxp_cardbus_devices +ffffffff83060000 R rl_cardbus_devices +ffffffff83060028 R rl_cardbus_ca +ffffffff83061000 R re_cardbus_ca +ffffffff83061028 R re_cardbus_devices +ffffffff83062000 R ath_cardbus_ca +ffffffff83063000 R athn_cardbus_ca +ffffffff83063030 r athn_cardbus_devices +ffffffff83064000 R atw_cardbus_ca +ffffffff83064028 R atw_cardbus_devices +ffffffff83065000 R rtw_cardbus_ca +ffffffff83065028 R rtw_cardbus_devices +ffffffff83066000 R ral_cardbus_ca +ffffffff83066030 r ral_cardbus_devices +ffffffff83067000 R acx_cardbus_ca +ffffffff83067028 r acx_cardbus_devices +ffffffff83068000 R pgt_cardbus_ca +ffffffff83068028 R pgt_cardbus_devices +ffffffff83069000 R ehci_cardbus_ca +ffffffff8306a000 R ohci_cardbus_ca +ffffffff8306b000 R uhci_cardbus_ca +ffffffff8306c000 R malo_cardbus_ca +ffffffff8306c028 r malo_cardbus_devices +ffffffff8306d000 R bwi_cardbus_ca +ffffffff8306d030 r bwi_cardbus_devices +ffffffff8306e000 R pcmcia_ca +ffffffff8306f000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff83070000 r pcmcia_cis_quirks +ffffffff83071000 R ep_pcmcia_ca +ffffffff83072000 R ne_pcmcia_ca +ffffffff83072030 R ne2000devs +ffffffff83074000 R aic_pcmcia_ca +ffffffff83075000 R com_pcmcia_ca +ffffffff83076000 R wdc_pcmcia_ca +ffffffff83077000 R sm_pcmcia_ca +ffffffff83078000 R xe_pcmcia_ca +ffffffff83079000 R wi_pcmcia_ca +ffffffff83079030 r wi_pcmcia_products +ffffffff8307a000 R malo_pcmcia_ca +ffffffff8307b000 R an_pcmcia_ca +ffffffff8307c000 R pcib_ca +ffffffff8307d000 R amdpcib_ca +ffffffff8307d028 R amdpcib_devices +ffffffff8307e000 R tcpcib_ca +ffffffff8307e028 R tcpcib_devices +ffffffff8307f000 R aapic_ca +ffffffff83080000 R hme_pci_ca +ffffffff83080028 r hme_promhdr +ffffffff8308002a r hme_promdat +ffffffff83081000 R isa_ca +ffffffff83082000 R isadma_ca +ffffffff83083000 R fdc_ca +ffffffff83084000 R fd_ca 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abitan2_sensors +ffffffff83093f60 R abitab_sensors +ffffffff83094220 R abitan3_sensors +ffffffff83094500 R abitaw2_sensors +ffffffff83094860 R abitat2_sensors +ffffffff83094b60 R abitab2_sensors +ffffffff83094ea0 R abitin_sensors +ffffffff830951e0 R uguru_ca +ffffffff83096000 R aps_ca +ffffffff83097000 R wsdisplay_ca +ffffffff83097030 r charClass +ffffffff83098000 r usl_syncops +ffffffff83099000 R wsevent_filtops +ffffffff8309a000 R wskbd_ca +ffffffff8309b000 r latin1_to_upper +ffffffff8309c000 R wsmouse_ca +ffffffff8309d000 R cyrillic_to_koi8 +ffffffff8309d060 R unicode_to_latin2 +ffffffff8309d0e0 R unicode_to_latin7 +ffffffff8309e000 R wsemul_vt100_ops +ffffffff8309f000 r decspcgr2uni +ffffffff8309f100 r dectech2uni +ffffffff8309f200 r nrctable +ffffffff830a0000 r vt100_fkeys +ffffffff830a00c0 r vt100_pfkeys +ffffffff830a00e0 r vt100_numpad +ffffffff830a1000 R pckbd_ca +ffffffff830a1028 R pckbd_accessops +ffffffff830a1040 R pckbd_consops +ffffffff830a1060 R pckbd_keymapdata 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ukbd_keydesc_us +ffffffff830c62a0 r ukbd_keydesc_de +ffffffff830c6350 r ukbd_keydesc_de_nodead +ffffffff830c6370 r ukbd_keydesc_fr +ffffffff830c6430 r ukbd_keydesc_fr_apple +ffffffff830c6570 r ukbd_keydesc_fr_dvorak_bepo +ffffffff830c66b0 r ukbd_keydesc_dk +ffffffff830c6750 r ukbd_keydesc_dk_nodead +ffffffff830c6760 r ukbd_keydesc_it +ffffffff830c6800 r ukbd_keydesc_uk +ffffffff830c68b0 r ukbd_keydesc_jp +ffffffff830c6920 r ukbd_keydesc_sv +ffffffff830c6950 r ukbd_keydesc_sv_nodead +ffffffff830c6960 r ukbd_keydesc_no +ffffffff830c6990 r ukbd_keydesc_no_nodead +ffffffff830c69a0 r ukbd_keydesc_us_dvorak +ffffffff830c6a40 r ukbd_keydesc_us_colemak +ffffffff830c6a88 r ukbd_keydesc_swapctrlcaps +ffffffff830c6aa0 r ukbd_keydesc_iopener +ffffffff830c6af0 r ukbd_keydesc_es +ffffffff830c6b90 r ukbd_keydesc_be +ffffffff830c6c50 r ukbd_keydesc_ru +ffffffff830c6dc0 r ukbd_keydesc_ua +ffffffff830c6f60 r ukbd_keydesc_sg +ffffffff830c7020 r ukbd_keydesc_sg_nodead +ffffffff830c7040 r ukbd_keydesc_sf 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+ffffffff830ca000 R umt_accessops +ffffffff830ca018 R umt_ca +ffffffff830cb000 R uts_devs +ffffffff830cb010 R uts_accessops +ffffffff830cb028 R uts_ca +ffffffff830cc000 R ubcmtp_accessops +ffffffff830cc018 R ubcmtp_ca +ffffffff830cc040 r ubcmtp_devices +ffffffff830cd000 R ucycom_methods +ffffffff830cd040 R ucycom_devs +ffffffff830cd050 R ucycom_ca +ffffffff830ce000 R uslhcom_methods +ffffffff830ce040 R uslhcom_ca +ffffffff830ce068 r uslhcom_devs +ffffffff830cf000 R ulpt_ca +ffffffff830d0000 R umass_ca +ffffffff830d0028 R umass_bbb_methods +ffffffff830d0040 R umass_cbi_methods +ffffffff830d1000 R umass_quirks +ffffffff830d2000 R umass_scsi_switch +ffffffff830d3000 R uthum_devs +ffffffff830d3008 R uthum_ca +ffffffff830d3030 r uthum_sensor_type_s +ffffffff830d4000 R ugold_devs +ffffffff830d4018 R ugold_ca +ffffffff830d5000 R utrh_devs +ffffffff830d5008 R utrh_ca +ffffffff830d6000 R uoakrh_devs +ffffffff830d6008 R uoakrh_ca +ffffffff830d6030 R uoakrh_methods +ffffffff830d7000 R uoaklux_devs +ffffffff830d7008 R uoaklux_ca +ffffffff830d7030 R uoaklux_methods +ffffffff830d8000 R uoakv_devs +ffffffff830d8008 R uoakv_ca +ffffffff830d8030 R uoakv_methods +ffffffff830d9000 R uonerng_ca +ffffffff830da000 R urng_ca +ffffffff830da030 r urng_devs +ffffffff830db000 R udcf_ca +ffffffff830db028 r udcf_devs +ffffffff830dc000 R umbg_ca +ffffffff830dd000 R uvisor_methods +ffffffff830dd040 R uvisor_ca +ffffffff830dd070 r uvisor_devs +ffffffff830de000 R udsbr_hw_if +ffffffff830de028 R udsbr_ca +ffffffff830df000 R utwitch_devs +ffffffff830df008 R utwitch_ca +ffffffff830e0000 R aue_devs +ffffffff830e01b0 R aue_ca +ffffffff830e1000 R axe_devs +ffffffff830e10d0 R axe_ca +ffffffff830e2000 R axen_devs +ffffffff830e2020 R axen_ca +ffffffff830e3000 R smsc_ca +ffffffff830e3030 r smsc_devs +ffffffff830e4000 R cue_ca +ffffffff830e5000 R kue_devs +ffffffff830e5088 R kue_ca +ffffffff830e6000 R cdce_devs +ffffffff830e6048 R cdce_ca +ffffffff830e7000 R urndis_ca +ffffffff830e7030 R urndis_class +ffffffff830e8000 R mos_devs +ffffffff830e8018 R mos_ca +ffffffff830e9000 R mue_devs +ffffffff830e9020 R mue_ca +ffffffff830ea000 R udav_ca +ffffffff830ea030 r udav_devs +ffffffff830eb000 R upl_ca +ffffffff830ec000 R ugl_ca +ffffffff830ed000 R url_ca +ffffffff830ed030 r url_devs +ffffffff830ee000 R ure_devs +ffffffff830ee0e8 R ure_ca +ffffffff830ef000 R uaq_devs +ffffffff830ef018 R uaq_ca +ffffffff830f0000 R umodem_methods +ffffffff830f0040 R umodem_ca +ffffffff830f1000 R uftdi_methods +ffffffff830f1040 R uftdi_ca +ffffffff830f1070 r uftdi_devs +ffffffff830f2000 R uplcom_methods +ffffffff830f2040 R uplcom_ca +ffffffff830f2070 r uplcom_devs +ffffffff830f3000 R umct_methods +ffffffff830f3040 R umct_ca +ffffffff830f3070 r umct_devs +ffffffff830f4000 R uvscom_methods +ffffffff830f4040 R uvscom_ca +ffffffff830f4070 r uvscom_devs +ffffffff830f5000 R ubsa_methods +ffffffff830f5040 R ubsa_devs +ffffffff830f5060 R ubsa_ca +ffffffff830f6000 R ukspan_ca +ffffffff830f6028 r ukspan_devs +ffffffff830f6030 r ukspan_methods +ffffffff830f7000 R uslcom_methods +ffffffff830f7040 R uslcom_ca +ffffffff830f7070 r uslcom_devs +ffffffff830f8000 R uark_methods +ffffffff830f8040 R uark_ca +ffffffff830f8068 r uark_devs +ffffffff830f9000 R moscom_methods +ffffffff830f9040 R moscom_ca +ffffffff830f9068 r moscom_devs +ffffffff830fa000 R umcs_methods +ffffffff830fa040 R umcs_devs +ffffffff830fa050 R umcs_ca +ffffffff830fb000 R uscom_methods +ffffffff830fb040 R uscom_ca +ffffffff830fb068 r uscom_devs +ffffffff830fc000 R ucrcom_methods +ffffffff830fc040 R ucrcom_ca +ffffffff830fd000 R uxrcom_methods +ffffffff830fd040 R uxrcom_ca +ffffffff830fd068 r uxrcom_devs +ffffffff830fe000 R uipaq_methods +ffffffff830fe040 R uipaq_ca +ffffffff830fe070 r uipaq_devs +ffffffff830ff000 R umsm_methods +ffffffff830ff040 R umsm_ca +ffffffff830ff070 r umsm_devs +ffffffff83100000 R uchcom_methods +ffffffff83100040 R uchcom_ca +ffffffff83100070 r uchcom_devs +ffffffff83100090 r dividers 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upgt_devs_1 +ffffffff8310b030 r upgt_devs_2 +ffffffff8310c000 R urtw_ca +ffffffff8310c030 r urtw_devs +ffffffff8310c090 r urtw_ratetable +ffffffff8310c0f0 r urtw_8225_gain +ffffffff8310c110 r urtw_8225_txpwr_cck_ch14 +ffffffff8310c140 r urtw_8225_txpwr_cck +ffffffff8310c170 r urtw_8225_tx_gain_cck_ofdm +ffffffff8310c176 r urtw_8225_txpwr_ofdm +ffffffff8310c180 r urtw_8225_rf_part1 +ffffffff8310c200 r urtw_8225_rxgain +ffffffff8310c2c0 r urtw_8225_agc +ffffffff8310c340 r urtw_8225_rf_part2 +ffffffff8310c470 r urtw_8225_rf_part3 +ffffffff8310c550 r urtw_8225_channel +ffffffff8310c58c r urtw_8225_threshold +ffffffff8310c5a0 r urtw_8225v2_gain_bg +ffffffff8310c5c0 r urtw_8225v2_tx_gain_cck_ofdm +ffffffff8310c5f0 r urtw_8225v2_rf_part1 +ffffffff8310c670 r urtw_8225v2_rxgain +ffffffff8310c730 r urtw_8225v2_rf_part2 +ffffffff8310c870 r urtw_8225v2_rf_part3 +ffffffff8310c970 r urtw_8187b_regtbl +ffffffff8310ca90 r urtw_8225v2_b_rf +ffffffff8310cb20 r urtw_8225v2_agc +ffffffff8310cba0 r urtw_8225v2_ofdm +ffffffff8310d000 R urtwn_ca +ffffffff8310d030 r urtwn_devs +ffffffff8310d340 r rtl8188eu_mac +ffffffff8310d4b0 r rtl8188ftv_mac +ffffffff8310d650 r rtl8192eu_mac +ffffffff8310d7f0 r rtl8192cu_mac +ffffffff8310d948 r rtl8188eu_bb_prog +ffffffff8310d970 r rtl8188ftv_bb_prog +ffffffff8310d998 r rtl8192eu_bb_prog +ffffffff8310d9c0 r rtl8188ce_bb_prog +ffffffff8310d9e8 r rtl8188ru_bb_prog +ffffffff8310da10 r rtl8188cu_bb_prog +ffffffff8310da38 r rtl8192ce_bb_prog +ffffffff8310da60 r rtl8192cu_bb_prog +ffffffff8310da90 r rtl8188eu_bb_regs +ffffffff8310dc10 r rtl8188eu_bb_vals +ffffffff8310df10 r rtl8188eu_agc_vals +ffffffff8310e110 r rtl8188ftv_bb_regs +ffffffff8310e2b0 r rtl8188ftv_bb_vals +ffffffff8310e5f0 r rtl8188ftv_agc_vals +ffffffff8310e6f0 r rtl8192e_bb_regs +ffffffff8310e890 r rtl8192e_bb_vals +ffffffff8310ebd0 r rtl8192eu_agc_vals +ffffffff8310edd0 r rtl8192ce_bb_regs +ffffffff8310ef50 r rtl8188ce_bb_vals +ffffffff8310f240 r rtl8188ce_agc_vals +ffffffff8310f4c0 r rtl8188ru_bb_regs +ffffffff8310f640 r rtl8188ru_bb_vals +ffffffff8310f940 r rtl8188ru_agc_vals +ffffffff8310fbc0 r rtl8188cu_bb_vals +ffffffff8310feb0 r rtl8192ce_bb_vals +ffffffff831101a0 r rtl8192ce_agc_vals +ffffffff83110420 r rtl8192cu_bb_vals +ffffffff83111000 R rsu_ca +ffffffff83111030 r rsu_devs +ffffffff831110c8 r rsu_devs_noht +ffffffff831110d0 r rsu_qid2idx_4ep +ffffffff831110da r rsu_qid2idx_6ep +ffffffff831110e4 r rsu_qid2idx_11ep +ffffffff831110ee r r92s_epaddr +ffffffff83112000 R otus_ca +ffffffff83112030 r otus_devs +ffffffff83112090 r ar_chans +ffffffff831120c0 r otus_rates +ffffffff831120e0 r ar5416_phy_regs +ffffffff83112380 r ar5416_phy_vals_2ghz_20mhz +ffffffff831128b0 r ar5416_phy_vals_5ghz_20mhz +ffffffff83112de0 r ar5416_banks_vals_5ghz +ffffffff83112ef0 r ar5416_banks_vals_2ghz +ffffffff83113000 r ar5416_banks_regs +ffffffff83114000 R umb_regstates +ffffffff83114080 R umb_dataclasses +ffffffff83114190 R umb_simstate +ffffffff83114210 R umb_messages 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userconf_histsz +ffffffff834c7020 D userconf_cmds +ffffffff834c8000 D ftlock +ffffffff834c9000 d ppollcollect.poll_errintvl +ffffffff834ca000 D ttydefchars +ffffffff834ca014 D ttclos +ffffffff834ca01b D ttopen +ffffffff834ca022 D ttybg +ffffffff834ca028 D ttyin +ffffffff834ca02e D ttyout +ffffffff834ca038 D ttylist_lock +ffffffff834cb000 D linesw +ffffffff834cb280 D nlinesw +ffffffff834cc000 D pt_softc_lock +ffffffff834cd000 d mbstat_boot_boot_cpumem +ffffffff834cd0c0 D mbstat +ffffffff834cd0d0 D mclsizes +ffffffff834cd0f0 D m_extref_mtx +ffffffff834cd100 D m_pool_allocator +ffffffff834cd120 D m_types +ffffffff834ce000 D somaxconn +ffffffff834ce004 D sominconn +ffffffff834ce008 D sosplice_lock +ffffffff834cf000 D sb_max +ffffffff834d0000 D unp_df_lock +ffffffff834d0010 D unp_gc_lock +ffffffff834d0020 D unp_rights_mtx +ffffffff834d0030 D unp_ino_mtx +ffffffff834d0040 D unp_gc_task +ffffffff834d0070 D unpst_sendspace +ffffffff834d0074 D unpst_recvspace +ffffffff834d0078 D unpsq_sendspace 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svlan_cloner +ffffffff834e9000 D pipex_list_mtx +ffffffff834e9010 D pipex_prune +ffffffff834e9018 D pipexoutq +ffffffff834e9050 d SHAPad2 +ffffffff834ea000 D rtmap_gc +ffffffff834ea018 D rt_rc +ffffffff834eb000 D rt_labels +ffffffff834eb010 D rtlabel_mtx +ffffffff834ec000 D enc_cloner +ffffffff834ed000 D gre_cloner +ffffffff834ed030 D gre_list +ffffffff834ed040 D mgre_cloner +ffffffff834ed070 D egre_cloner +ffffffff834ed0a0 D nvgre_cloner +ffffffff834ed0d0 D eoip_cloner +ffffffff834ee000 D trunk_cloner +ffffffff834ef000 d aggr_cloner +ffffffff834f0000 d tpmr_cloner +ffffffff834f1000 D mpe_cloner +ffffffff834f2000 D mpw_cloner +ffffffff834f3000 D mpip_cloner +ffffffff834f4000 d bpe_cloner +ffffffff834f4030 d bpe_lock +ffffffff834f5000 D vether_cloner +ffffffff834f6000 d rport_cloner +ffffffff834f6030 d rport_interfaces_lock +ffffffff834f7000 D pair_cloner +ffffffff834f8000 d vxlan_cloner +ffffffff834f8030 d vxlan_lock +ffffffff834f8040 d vxlan_teps +ffffffff834f9000 D underload_interval +ffffffff834f9010 D wg_cloner +ffffffff834fa000 d stoeplitz_keyseed +ffffffff834fb000 D ieee80211_cache_size +ffffffff834fc000 D arpt_prune +ffffffff834fc004 D arpt_keep +ffffffff834fc008 D arpt_down +ffffffff834fc010 D arpinq +ffffffff834fc048 D arp_mtx +ffffffff834fc058 D arp_maxtries +ffffffff834fd000 D ipport_firstauto +ffffffff834fd004 D ipport_lastauto +ffffffff834fd008 D ipport_hifirstauto +ffffffff834fd00c D ipport_hilastauto +ffffffff834fe000 D divert_sendspace +ffffffff834fe004 D divert_recvspace +ffffffff834fe008 D divbhashsize +ffffffff834ff000 D icmptstamprepl +ffffffff834ff004 D icmperrppslim +ffffffff834ff008 D icmp_redirtimeout +ffffffff83500000 D ip_sendredirects +ffffffff83500004 D ip_defttl +ffffffff83500008 D ip_mtudisc +ffffffff8350000c D ip_mtudisc_timeout +ffffffff83500010 D ipq_mutex +ffffffff83500020 D ip_maxqueue +ffffffff83500028 D ipintrq +ffffffff83500060 d ipsend_task +ffffffff83500090 d ipsendraw_task +ffffffff83501000 D ip_mrtproto +ffffffff83501004 d sin +ffffffff83502000 D rip_sendspace +ffffffff83502008 D rip_recvspace +ffffffff83503000 D tcp_debug_mtx +ffffffff83504000 D tcprexmtthresh +ffffffff83504004 D tcptv_keep_init +ffffffff83504008 D tcp_rst_ppslim +ffffffff8350400c D tcp_ackdrop_ppslim +ffffffff83504010 D tcp_syn_hash_size +ffffffff83504014 D tcp_syn_cache_limit +ffffffff83504018 D tcp_syn_bucket_limit +ffffffff8350401c D tcp_syn_use_limit +ffffffff83504020 D syn_cache_mtx +ffffffff83505000 D tcp_outflags +ffffffff83506000 D tcp_timer_mtx +ffffffff83506010 D tcp_mssdflt +ffffffff83506014 D tcp_rttdflt +ffffffff83506018 D tcp_do_rfc1323 +ffffffff8350601c D tcp_do_sack +ffffffff83506020 D tcp_do_rfc3390 +ffffffff83506024 D tcp_do_tso +ffffffff83506028 D tcp_reass_limit +ffffffff8350602c D tcp_sackhole_limit +ffffffff83507000 D tcp_backoff +ffffffff83507034 D tcp_totbackoff +ffffffff83508000 D tcp_sendspace +ffffffff83508004 D tcp_recvspace +ffffffff83508008 D tcp_autorcvbuf_inc +ffffffff83509000 D udpcksum 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ffffffff83510000 d PADDING -ffffffff83511000 d PADDING -ffffffff83512000 d weak_keys -ffffffff83513000 D swcr_id -ffffffff83514000 D window_inflate -ffffffff83514004 D window_deflate -ffffffff83515000 D ghash_update -ffffffff83516000 D mpls_defttl -ffffffff83516004 D mpls_mapttl_ip -ffffffff83517000 D nfskevq_lock -ffffffff83518000 D desirednfsrvcache -ffffffff83519000 D nfs_niothreads -ffffffff8351a000 D fragtbl -ffffffff8351b000 D ffs_vtbl -ffffffff8351c000 D dirchk -ffffffff8351d000 D desireddquot -ffffffff8351e000 D amap_list_lock -ffffffff8351f000 d uao_list_lock -ffffffff83520000 D udv_lock -ffffffff83521000 d uvmexp_countersboot_boot_cpumem -ffffffff835210c0 D uvmexp_counters -ffffffff835210c8 D vm_min_kernel_address -ffffffff83522000 D no_constraint -ffffffff83523000 d uvm_kmapent_warn_rate -ffffffff83524000 D maxslp -ffffffff83525000 D uvmpagerops -ffffffff83526000 D uvm_swap_data_lock -ffffffff83526010 D swap_syscall_lock -ffffffff83526020 D oommtx -ffffffff83527000 D uvm_doswapencrypt -ffffffff83528000 D gif_list -ffffffff83528010 D gif_cloner -ffffffff83529000 d sec_cloner -ffffffff83529030 d sec_tdb_gc_mtx -ffffffff83529040 d sec_tdb_gc_task -ffffffff8352a000 D divert6_sendspace -ffffffff8352a004 D divert6_recvspace -ffffffff8352a008 D divb6hashsize -ffffffff8352b000 d in6_get_hw_ifid.allone -ffffffff8352c000 D ip6_sendredirects -ffffffff8352c004 D ip6_defhlim -ffffffff8352c008 D ip6_defmcasthlim -ffffffff8352c00c D ip6_maxfragpackets -ffffffff8352c010 D ip6_maxfrags -ffffffff8352c014 D ip6_log_interval -ffffffff8352c018 D ip6_hdrnestlimit -ffffffff8352c01c D ip6_dad_count -ffffffff8352c020 D ip6_auto_flowlabel -ffffffff8352c024 D ip6_use_deprecated -ffffffff8352c028 D ip6_neighborgcthresh -ffffffff8352c02c D ip6_maxdynroutes -ffffffff8352c030 D rip6_sendspace -ffffffff8352c038 D rip6_recvspace -ffffffff8352c040 D icmp6_redirtimeout -ffffffff8352c044 D icmp6errppslim -ffffffff8352c048 D ip6_mtudisc_timeout -ffffffff8352d000 D frag6_mutex -ffffffff8352e000 d icmp6_mtudisc_hiwat -ffffffff8352e004 d icmp6_mtudisc_lowat -ffffffff8352f000 d randomtab_20 -ffffffff83530000 D ip6intrq -ffffffff83530038 d ip6send_task -ffffffff83531000 D nd6_timer_next -ffffffff83531008 D nd6_expire_next -ffffffff83531010 D nd6_delay -ffffffff83531014 D nd6_umaxtries -ffffffff83531018 D nd6_mmaxtries -ffffffff8353101c D nd6_gctimer -ffffffff83531020 D nd6_maxndopt -ffffffff83531028 D nd6_mtx -ffffffff83531038 D nd6_list -ffffffff83532000 d dadq -ffffffff83533000 D pfkeyv2_mtx -ffffffff83533010 d pfkeyv2_seq -ffffffff83534000 D sadb_exts_allowed_in -ffffffff83534090 D sadb_exts_required_in -ffffffff83535000 D cold -ffffffff83536000 D bdevsw -ffffffff83536460 D nblkdev -ffffffff83536470 D cdevsw -ffffffff83538450 D nchrdev -ffffffff83538454 D mem_no -ffffffff83538458 D swapdev -ffffffff83538460 D constab -ffffffff83539000 D machine -ffffffff83539008 D cpu_idle_cycle_fcn -ffffffff83539010 D lid_action -ffffffff83539014 D pwr_action -ffffffff83539018 D isa_constraint -ffffffff83539028 D dma_constraint -ffffffff83539040 D uvm_md_constraints -ffffffff83539058 D delay_func -ffffffff83539060 D initclock_func -ffffffff83539068 D startclock_func -ffffffff83539070 D bootinfo_size -ffffffff83539074 D waittime -ffffffff83539078 D dumpmag -ffffffff8353a000 d identifycpu.prevci -ffffffff8353b000 D tsc_rdtsc -ffffffff8353b008 D tsc_timecounter -ffffffff8353b058 D tsc_is_synchronized -ffffffff8353c000 D local_apic -ffffffff8353c020 D lapic_id -ffffffff8353c080 D lapic_tpr -ffffffff8353c0a0 d lapic_ppr -ffffffff8353c100 d lapic_isr -ffffffff8353d000 D warn_once -ffffffff8353e000 d errata -ffffffff8353f000 D cpu_ucode_mtx -ffffffff83540000 D mem_owner_bios -ffffffff83540008 D mrops -ffffffff83540028 D mtrrmask -ffffffff83540030 D mtrrtomrt -ffffffff83541000 D pg_frame -ffffffff83541008 D pg_lgframe -ffffffff83541010 D pmap_pg_wc -ffffffff83541018 D pmaps_lock -ffffffff83541028 d pmap_maxkvaddr -ffffffff83542000 D kv_physwait -ffffffff83543000 D fpu_save_len -ffffffff83544000 D i8259_pic -ffffffff83545000 D softintr_pic -ffffffff83546000 D ipifunc -ffffffff83547000 D setperf_mp_mutex -ffffffff83548000 D db_Grp6 -ffffffff83548040 D db_Grp7 -ffffffff83548100 D db_Grp8 -ffffffff83548140 D db_Grp9 -ffffffff83548200 D db_GrpA -ffffffff83548240 D db_GrpB -ffffffff83548280 D db_GrpC -ffffffff835482c0 D db_Grp0f1e -ffffffff83548380 D db_inst_0f0x -ffffffff83548500 D db_inst_0f1x -ffffffff83548680 D db_inst_0f2x -ffffffff83548800 D db_inst_0f3x -ffffffff83548980 D db_inst_0f8x -ffffffff83548b00 D db_inst_0f9x -ffffffff83548c80 D db_inst_0fax -ffffffff83548e00 D db_inst_0fbx -ffffffff83548f80 D db_inst_0fcx -ffffffff83549100 D db_inst_0f -ffffffff83549180 D db_Esc92 -ffffffff835491c0 D db_Esc94 -ffffffff83549200 D db_Esc95 -ffffffff83549240 D db_Esc96 -ffffffff83549280 D db_Esc97 -ffffffff835492c0 D db_Esca5 -ffffffff83549300 D db_Escb4 -ffffffff83549340 D db_Esce3 -ffffffff83549380 D db_Escf4 -ffffffff835493c0 D db_Esc8 -ffffffff83549480 D db_Esc9 -ffffffff83549540 D db_Esca -ffffffff83549600 D db_Escb -ffffffff835496c0 D db_Escc -ffffffff83549780 D db_Escd -ffffffff83549840 D db_Esce -ffffffff83549900 D db_Escf -ffffffff835499c0 D db_Esc_inst -ffffffff83549a00 D db_Grp1 -ffffffff83549a40 D db_Grp2 -ffffffff83549a80 D db_Grp3 -ffffffff83549b40 D db_Grp4 -ffffffff83549c00 D db_Grp5 -ffffffff83549cc0 D db_inst_table -ffffffff8354b4c0 D db_bad_inst -ffffffff8354b4e0 D db_index_reg_16 -ffffffff8354b520 D db_reg -ffffffff8354b720 D db_seg_reg -ffffffff8354b760 D db_lengths -ffffffff8354c000 D db_regs -ffffffff8354c1e0 D db_eregs -ffffffff8354c1f0 D db_reg_args -ffffffff8354d000 D timer_mutex -ffffffff8354d010 d i8254_timecounter -ffffffff8354e000 D spleen8x16 -ffffffff8354e058 D spleen12x24 -ffffffff8354e0b0 D spleen16x32 -ffffffff8354e108 D spleen32x64 -ffffffff8354e160 d builtin_fonts -ffffffff8354e1e0 d wsfont_add.cookiegen -ffffffff8354e1f0 d spleen8x16_data -ffffffff8354eff0 d spleen12x24_data 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-ffffffff83597008 D mp_cpu_funcs -ffffffff83597020 D cpu_cd -ffffffff83597040 D cpu_info -ffffffff83598000 D local_pic -ffffffff83598098 D lapic_readreg -ffffffff835980a0 D lapic_writereg -ffffffff835980a8 D x86_ipi -ffffffff83599000 D ioapic_cold -ffffffff83599008 D ioapic_cd -ffffffff8359a000 D efifb_std_descr -ffffffff8359a030 D efifb_descrs -ffffffff8359a038 D efifb_accessops -ffffffff8359a098 D efifb_cd -ffffffff8359b000 D pvbus_cd -ffffffff8359b020 D pvbus_types -ffffffff8359b0e0 D pvbus_dma_tag -ffffffff8359c000 D pvclock_cd -ffffffff8359c020 D pvclock_timecounter -ffffffff8359d000 D vmt_tclo_rpc -ffffffff8359d0d0 D vmt_cd -ffffffff8359e000 D xen_cd -ffffffff8359e020 D xen_bus_dma_tag -ffffffff8359f000 D xnf_cd -ffffffff835a0000 D xbf_cd -ffffffff835a1000 D hv_msg_dispatch -ffffffff835a1110 D hv_timecounter -ffffffff835a1160 D hyperv_cd -ffffffff835a2000 d hv_ic_devs -ffffffff835a3000 D hvn_cd -ffffffff835a4000 D hvs_cd -ffffffff835a5000 D virtio_cd -ffffffff835a6000 D vio_cd -ffffffff835a7000 D vioblk_cd -ffffffff835a8000 D viomb_cd -ffffffff835a9000 D viornd_cd -ffffffff835aa000 D vioscsi_cd -ffffffff835ab000 D vmmci_cd -ffffffff835ac000 D pci_cd -ffffffff835ad000 D arc_fw_hdr -ffffffff835ad008 D arc_cd -ffffffff835ae000 D jmb_cd -ffffffff835af000 D mfii_cd -ffffffff835b0000 D ips_cd -ffffffff835b1000 D eap_cd -ffffffff835b2000 D auacer_cd -ffffffff835b3000 D auich_cd -ffffffff835b4000 D azalia_cd -ffffffff835b5000 D envy_cd -ffffffff835b5020 D envy_matchids -ffffffff835b5030 D envy_rates -ffffffff835b50b0 D ak4524_dac -ffffffff835b50d8 D ak4524_adc -ffffffff835b5100 D ak4358_dac -ffffffff835b5128 D ak5365_adc -ffffffff835b5150 D unkenvy_codec -ffffffff835b5180 D envy_cards -ffffffff835b53f0 D envy_cards_ht -ffffffff835b5600 d julia_eeprom -ffffffff835b6000 D emu_cd -ffffffff835b7000 D auixp_cd -ffffffff835b8000 D clcs_cd -ffffffff835b9000 D yds_cd -ffffffff835ba000 D auvia_cd -ffffffff835bb000 D qle_cd -ffffffff835bc000 D mpii_cd -ffffffff835bd000 D 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B k8pnow_current_state -ffffffff8392d000 B bus_clock -ffffffff8392d008 b est_fqlist -ffffffff8392e000 B k1x_current_state -ffffffff8392f000 B rotatedfonts -ffffffff8392f008 B rasops_framebuffers +ffffffff83511000 d weak_keys +ffffffff83512000 D swcr_id +ffffffff83513000 D window_inflate +ffffffff83513004 D window_deflate +ffffffff83514000 D ghash_update +ffffffff83515000 D mpls_defttl +ffffffff83515004 D mpls_mapttl_ip +ffffffff83516000 D nfskevq_lock +ffffffff83517000 D desirednfsrvcache +ffffffff83518000 D nfs_niothreads +ffffffff83519000 D fragtbl +ffffffff8351a000 D ffs_vtbl +ffffffff8351b000 D dirchk +ffffffff8351c000 D desireddquot +ffffffff8351d000 D amap_list_lock +ffffffff8351e000 d uao_list_lock +ffffffff8351f000 D udv_lock +ffffffff83520000 d uvmexp_countersboot_boot_cpumem +ffffffff835200c0 D uvmexp_counters +ffffffff835200c8 D vm_min_kernel_address +ffffffff83521000 D no_constraint +ffffffff83522000 d uvm_kmapent_warn_rate +ffffffff83523000 D maxslp +ffffffff83524000 D uvmpagerops +ffffffff83525000 D uvm_swap_data_lock +ffffffff83525010 D swap_syscall_lock +ffffffff83525020 D oommtx +ffffffff83526000 D uvm_doswapencrypt +ffffffff83527000 D gif_list +ffffffff83527010 D gif_cloner +ffffffff83528000 d sec_cloner +ffffffff83528030 d sec_tdb_gc_mtx +ffffffff83528040 d sec_tdb_gc_task +ffffffff83529000 D divert6_sendspace +ffffffff83529004 D divert6_recvspace +ffffffff83529008 D divb6hashsize +ffffffff8352a000 d in6_get_hw_ifid.allone +ffffffff8352b000 D ip6_sendredirects +ffffffff8352b004 D ip6_defhlim +ffffffff8352b008 D ip6_defmcasthlim +ffffffff8352b00c D ip6_maxfragpackets +ffffffff8352b010 D ip6_maxfrags +ffffffff8352b014 D ip6_log_interval +ffffffff8352b018 D ip6_hdrnestlimit +ffffffff8352b01c D ip6_dad_count +ffffffff8352b020 D ip6_auto_flowlabel +ffffffff8352b024 D ip6_use_deprecated +ffffffff8352b028 D ip6_neighborgcthresh +ffffffff8352b02c D ip6_maxdynroutes +ffffffff8352b030 D rip6_sendspace +ffffffff8352b038 D rip6_recvspace +ffffffff8352b040 D icmp6_redirtimeout +ffffffff8352b044 D icmp6errppslim +ffffffff8352b048 D ip6_mtudisc_timeout +ffffffff8352c000 D frag6_mutex +ffffffff8352d000 d icmp6_mtudisc_hiwat +ffffffff8352d004 d icmp6_mtudisc_lowat +ffffffff8352e000 d randomtab_20 +ffffffff8352f000 D ip6intrq +ffffffff8352f038 d ip6send_task +ffffffff83530000 D nd6_timer_next +ffffffff83530008 D nd6_expire_next +ffffffff83530010 D nd6_delay +ffffffff83530014 D nd6_umaxtries +ffffffff83530018 D nd6_mmaxtries +ffffffff8353001c D nd6_gctimer +ffffffff83530020 D nd6_maxndopt +ffffffff83530028 D nd6_mtx +ffffffff83530038 D nd6_list +ffffffff83531000 d dadq +ffffffff83532000 D pfkeyv2_mtx +ffffffff83532010 d pfkeyv2_seq +ffffffff83533000 D sadb_exts_allowed_in +ffffffff83533090 D sadb_exts_required_in +ffffffff83534000 D cold +ffffffff83535000 D bdevsw +ffffffff83535460 D nblkdev +ffffffff83535470 D cdevsw +ffffffff83537450 D nchrdev +ffffffff83537454 D mem_no +ffffffff83537458 D swapdev +ffffffff83537460 D constab +ffffffff83538000 D machine +ffffffff83538008 D cpu_idle_cycle_fcn +ffffffff83538010 D lid_action +ffffffff83538014 D pwr_action +ffffffff83538018 D isa_constraint +ffffffff83538028 D dma_constraint +ffffffff83538040 D uvm_md_constraints +ffffffff83538058 D delay_func +ffffffff83538060 D initclock_func +ffffffff83538068 D startclock_func +ffffffff83538070 D bootinfo_size +ffffffff83538074 D waittime +ffffffff83538078 D dumpmag +ffffffff83539000 d identifycpu.prevci +ffffffff8353a000 D tsc_rdtsc +ffffffff8353a008 D tsc_timecounter +ffffffff8353a058 D tsc_is_synchronized +ffffffff8353b000 D local_apic +ffffffff8353b020 D lapic_id +ffffffff8353b080 D lapic_tpr +ffffffff8353b0a0 d lapic_ppr +ffffffff8353b100 d lapic_isr +ffffffff8353c000 D warn_once +ffffffff8353d000 d errata +ffffffff8353e000 D cpu_ucode_mtx +ffffffff8353f000 D mem_owner_bios +ffffffff8353f008 D mrops +ffffffff8353f028 D mtrrmask +ffffffff8353f030 D mtrrtomrt +ffffffff83540000 D pg_frame +ffffffff83540008 D pg_lgframe +ffffffff83540010 D pmap_pg_wc +ffffffff83540018 D pmaps_lock +ffffffff83540028 d pmap_maxkvaddr +ffffffff83541000 D kv_physwait +ffffffff83542000 D fpu_save_len +ffffffff83543000 D i8259_pic +ffffffff83544000 D softintr_pic +ffffffff83545000 D ipifunc +ffffffff83546000 D setperf_mp_mutex +ffffffff83547000 D db_Grp6 +ffffffff83547040 D db_Grp7 +ffffffff83547100 D db_Grp8 +ffffffff83547140 D db_Grp9 +ffffffff83547200 D db_GrpA +ffffffff83547240 D db_GrpB +ffffffff83547280 D db_GrpC +ffffffff835472c0 D db_Grp0f1e +ffffffff83547380 D db_inst_0f0x +ffffffff83547500 D db_inst_0f1x +ffffffff83547680 D db_inst_0f2x +ffffffff83547800 D db_inst_0f3x +ffffffff83547980 D db_inst_0f8x +ffffffff83547b00 D db_inst_0f9x +ffffffff83547c80 D db_inst_0fax +ffffffff83547e00 D db_inst_0fbx +ffffffff83547f80 D db_inst_0fcx +ffffffff83548100 D db_inst_0f +ffffffff83548180 D db_Esc92 +ffffffff835481c0 D db_Esc94 +ffffffff83548200 D db_Esc95 +ffffffff83548240 D db_Esc96 +ffffffff83548280 D db_Esc97 +ffffffff835482c0 D db_Esca5 +ffffffff83548300 D db_Escb4 +ffffffff83548340 D db_Esce3 +ffffffff83548380 D db_Escf4 +ffffffff835483c0 D db_Esc8 +ffffffff83548480 D db_Esc9 +ffffffff83548540 D db_Esca +ffffffff83548600 D db_Escb +ffffffff835486c0 D db_Escc +ffffffff83548780 D db_Escd +ffffffff83548840 D db_Esce +ffffffff83548900 D db_Escf +ffffffff835489c0 D db_Esc_inst +ffffffff83548a00 D db_Grp1 +ffffffff83548a40 D db_Grp2 +ffffffff83548a80 D db_Grp3 +ffffffff83548b40 D db_Grp4 +ffffffff83548c00 D db_Grp5 +ffffffff83548cc0 D db_inst_table +ffffffff8354a4c0 D db_bad_inst +ffffffff8354a4e0 D db_index_reg_16 +ffffffff8354a520 D db_reg +ffffffff8354a720 D db_seg_reg +ffffffff8354a760 D db_lengths +ffffffff8354b000 D db_regs +ffffffff8354b1e0 D db_eregs +ffffffff8354b1f0 D db_reg_args +ffffffff8354c000 D timer_mutex +ffffffff8354c010 d i8254_timecounter +ffffffff8354d000 D spleen8x16 +ffffffff8354d058 D spleen12x24 +ffffffff8354d0b0 D spleen16x32 +ffffffff8354d108 D spleen32x64 +ffffffff8354d160 d builtin_fonts +ffffffff8354d1e0 d wsfont_add.cookiegen +ffffffff8354d1f0 d spleen8x16_data +ffffffff8354dff0 d spleen12x24_data +ffffffff835509f0 d spleen16x32_data +ffffffff835541f0 d spleen32x64_data +ffffffff83563000 D nsphy_cd +ffffffff83564000 D nsphyter_cd +ffffffff83565000 D gentbi_cd +ffffffff83566000 D qsphy_cd +ffffffff83567000 D inphy_cd +ffffffff83568000 D iophy_cd +ffffffff83569000 D eephy_cd +ffffffff8356a000 D exphy_cd +ffffffff8356b000 D rlphy_cd +ffffffff8356c000 D lxtphy_cd +ffffffff8356d000 D luphy_cd +ffffffff8356e000 D mtdphy_cd +ffffffff8356f000 D icsphy_cd +ffffffff83570000 D sqphy_cd +ffffffff83571000 D tqphy_cd +ffffffff83572000 D ukphy_cd +ffffffff83573000 D dcphy_cd +ffffffff83574000 D bmtphy_cd +ffffffff83575000 D brgphy_cd +ffffffff83576000 D xmphy_cd +ffffffff83577000 D amphy_cd +ffffffff83578000 D acphy_cd +ffffffff83579000 D nsgphy_cd +ffffffff8357a000 D urlphy_cd +ffffffff8357b000 D rgephy_cd +ffffffff8357c000 D ciphy_cd +ffffffff8357d000 D ipgphy_cd +ffffffff8357e000 D etphy_cd +ffffffff8357f000 D jmphy_cd +ffffffff83580000 D atphy_cd +ffffffff83581000 D scsi_autoconf +ffffffff83581008 D scsibus_cd +ffffffff83582000 D cd_cd +ffffffff83583000 D ch_cd +ffffffff83583020 D chquirks +ffffffff83584000 D sd_cd +ffffffff83585000 D st_cd +ffffffff83586000 D uk_cd +ffffffff83587000 D safte_cd +ffffffff83588000 D ses_cd +ffffffff83589000 D sym_cd +ffffffff83589020 D sym_devices +ffffffff83589070 D asym_devices +ffffffff8358a000 D rdac_cd +ffffffff8358a020 D rdac_devices +ffffffff8358b000 D emc_cd +ffffffff8358b020 D emc_devices +ffffffff8358c000 D hds_cd +ffffffff8358c020 D hds_devices +ffffffff8358d000 D atapiscsi_cd +ffffffff8358e000 D wd_cd +ffffffff8358e020 d wddumpmulti +ffffffff8358f000 D mainbus_cd +ffffffff8358f020 D mba_iba +ffffffff83590000 D bios_cd +ffffffff83590020 D smbios_uninfo +ffffffff83591000 D mpbios_cd +ffffffff83591020 d mp_conf +ffffffff83591070 d extint_bus +ffffffff835910a0 d smi_bus +ffffffff835910d0 d nmi_bus +ffffffff83592000 D need_retpoline +ffffffff83593000 D cpu_info_full_primary +ffffffff83596000 D cpu_info_list +ffffffff83596008 D mp_cpu_funcs +ffffffff83596020 D cpu_cd +ffffffff83596040 D cpu_info +ffffffff83597000 D local_pic +ffffffff83597098 D lapic_readreg +ffffffff835970a0 D lapic_writereg +ffffffff835970a8 D x86_ipi +ffffffff83598000 D ioapic_cold +ffffffff83598008 D ioapic_cd +ffffffff83599000 D efifb_std_descr +ffffffff83599030 D efifb_descrs +ffffffff83599038 D efifb_accessops +ffffffff83599098 D efifb_cd +ffffffff8359a000 D pvbus_cd +ffffffff8359a020 D pvbus_types +ffffffff8359a0e0 D pvbus_dma_tag +ffffffff8359b000 D pvclock_cd +ffffffff8359b020 D pvclock_timecounter +ffffffff8359c000 D vmt_tclo_rpc +ffffffff8359c0d0 D vmt_cd +ffffffff8359d000 D xen_cd +ffffffff8359d020 D xen_bus_dma_tag +ffffffff8359e000 D xnf_cd +ffffffff8359f000 D xbf_cd +ffffffff835a0000 D hv_msg_dispatch +ffffffff835a0110 D hv_timecounter +ffffffff835a0160 D hyperv_cd +ffffffff835a1000 d hv_ic_devs +ffffffff835a2000 D hvn_cd +ffffffff835a3000 D hvs_cd +ffffffff835a4000 D virtio_cd +ffffffff835a5000 D vio_cd +ffffffff835a6000 D vioblk_cd +ffffffff835a7000 D viomb_cd +ffffffff835a8000 D viornd_cd +ffffffff835a9000 D vioscsi_cd +ffffffff835aa000 D vmmci_cd +ffffffff835ab000 D pci_cd +ffffffff835ac000 D arc_fw_hdr +ffffffff835ac008 D arc_cd +ffffffff835ad000 D jmb_cd +ffffffff835ae000 D mfii_cd +ffffffff835af000 D ips_cd +ffffffff835b0000 D eap_cd +ffffffff835b1000 D auacer_cd +ffffffff835b2000 D auich_cd +ffffffff835b3000 D azalia_cd +ffffffff835b4000 D envy_cd +ffffffff835b4020 D envy_matchids +ffffffff835b4030 D envy_rates +ffffffff835b40b0 D ak4524_dac +ffffffff835b40d8 D ak4524_adc +ffffffff835b4100 D ak4358_dac +ffffffff835b4128 D ak5365_adc +ffffffff835b4150 D unkenvy_codec +ffffffff835b4180 D envy_cards +ffffffff835b43f0 D envy_cards_ht +ffffffff835b4600 d julia_eeprom +ffffffff835b5000 D emu_cd +ffffffff835b6000 D auixp_cd +ffffffff835b7000 D clcs_cd +ffffffff835b8000 D yds_cd +ffffffff835b9000 D auvia_cd +ffffffff835ba000 D qle_cd +ffffffff835bb000 D mpii_cd +ffffffff835bc000 D aq_cd +ffffffff835bd000 D de_cd +ffffffff835be000 D pcn_cd +ffffffff835bf000 D wdc_sii3114_vtbl +ffffffff835bf038 D wdc_pdc203xx_vtbl +ffffffff835bf070 D wdc_svwsata_vtbl +ffffffff835bf0a8 D pciide_cd +ffffffff835bf0d0 d sis_hostbr_type +ffffffff835c0000 D ppb_cd +ffffffff835c1000 D vr_cd +ffffffff835c1020 D vr_devices +ffffffff835c2000 D txp_cd +ffffffff835c3000 D bt848_card_signature +ffffffff835c4000 D bktr_cd +ffffffff835c5000 D em_cd +ffffffff835c6000 D ixgb_cd +ffffffff835c7000 D ix_cd +ffffffff835c7020 D ixgbe_smart_speed +ffffffff835c7024 D ixgbe_enable_msix +ffffffff835c8000 D ixv_driver_version +ffffffff835c8008 D ixv_cd +ffffffff835c9000 D ixl_cd +ffffffff835c9020 d ixl_sff_lock +ffffffff835ca000 D ice_cd +ffffffff835cb000 D xge_cd +ffffffff835cc000 D thtc_cd +ffffffff835cc020 D tht_cd +ffffffff835cc040 D tht_txt_desc +ffffffff835cc068 D tht_rxf_desc +ffffffff835cc090 D tht_rxd_desc +ffffffff835cc0b8 D tht_txf_desc +ffffffff835cd000 D myx_cd +ffffffff835ce000 D oce_cd +ffffffff835cf000 D dc_devs +ffffffff835d0000 D cas_cd +ffffffff835d1000 D sis_cd +ffffffff835d2000 D se_cd +ffffffff835d3000 D mbg_cd +ffffffff835d4000 D cbb_cd +ffffffff835d4020 D yc_chipsets +ffffffff835d41b0 d pccbb_funcs +ffffffff835d41e0 d pccbb_pcmcia_funcs +ffffffff835d5000 D skc_cd +ffffffff835d5020 D sk_cd +ffffffff835d6000 D mskc_cd +ffffffff835d6020 D msk_cd +ffffffff835d7000 D puc_cd +ffffffff835d8000 D puc_ndevs +ffffffff835d9000 D iwi_cd +ffffffff835da000 D wpi_cd +ffffffff835db000 D iwn_cd +ffffffff835dc000 D iwm_cd +ffffffff835dd000 D iwx_cd +ffffffff835de000 d .compoundliteral +ffffffff835de040 d .compoundliteral.4 +ffffffff835de080 d .compoundliteral.5 +ffffffff835de0b0 d .compoundliteral.6 +ffffffff835de0f0 d .compoundliteral.7 +ffffffff835de130 d .compoundliteral.8 +ffffffff835df000 D cmpci_cd +ffffffff835e0000 D iha_cd +ffffffff835e1000 D pcscp_cd +ffffffff835e1020 D pcscp_glue +ffffffff835e2000 D bge_cd +ffffffff835e3000 D bnx_firmwares +ffffffff835e3160 D bnx_rv2ps +ffffffff835e31c0 D bnx_cd +ffffffff835e31e0 d flash_5709 +ffffffff835e3210 d flash_table +ffffffff835e4000 D vge_cd +ffffffff835e5000 D stge_cd +ffffffff835e6000 D nfe_cd +ffffffff835e7000 D et_cd +ffffffff835e8000 D jme_cd +ffffffff835e9000 D age_cd +ffffffff835ea000 D alc_dma_burst +ffffffff835ea020 D alc_cd +ffffffff835eb000 D ale_cd +ffffffff835ec000 D amdpm_cd +ffffffff835ec020 d amdpm_timecounter +ffffffff835ed000 D bce_cd +ffffffff835ee000 D rtwn_cd +ffffffff835ef000 d ral_rt2560_opns +ffffffff835ef028 d ral_rt2661_opns +ffffffff835ef050 d ral_rt2860_opns +ffffffff835f0000 D piixpm_cd +ffffffff835f1000 D vic_cd +ffffffff835f2000 D vmx_cd +ffffffff835f3000 D vmwpvs_cd +ffffffff835f4000 D lii_cd +ffffffff835f5000 D ichiic_cd +ffffffff835f6000 D viapm_cd +ffffffff835f6020 d viapm_timecounter +ffffffff835f7000 D amdiic_cd +ffffffff835f8000 D nviic_cd +ffffffff835f9000 D kate_cd +ffffffff835fa000 D km_cd +ffffffff835fb000 D cpu_model_offsets +ffffffff835fb070 D ksmn_cd +ffffffff835fc000 D itherm_cd +ffffffff835fd000 D pchtemp_cd +ffffffff835fe000 D xspd_cd +ffffffff835ff000 D bwfm_pci_buscore_ops +ffffffff835ff030 D bwfm_pci_bus_ops +ffffffff835ff058 D bwfm_pci_msgbuf_ops +ffffffff83600000 D bnxt_cd +ffffffff83601000 D mcx_cd +ffffffff83602000 D iavf_cd +ffffffff83603000 D rge_cd +ffffffff83604000 D igc_cd +ffffffff83605000 D ngbe_cd +ffffffff83606000 D agp_cd +ffffffff83607000 D intagp_cd +ffffffff83607020 D agp_i810_methods +ffffffff83608000 D reservation_ww_class +ffffffff83609000 d bridge_lock +ffffffff83609010 d bridge_list +ffffffff8360a000 d drm_connector_enum_list +ffffffff8360a1f8 d connector_list_lock +ffffffff8360a208 d connector_list +ffffffff8360b000 d kernel_fb_helper_list +ffffffff8360b010 d kernel_fb_helper_lock +ffffffff8360c000 D drm_global_mutex +ffffffff8360d000 D i2c_bit_algo +ffffffff8360d010 d drm_fence_context_count +ffffffff8360d018 d dma_fence_stub_mtx +ffffffff8360d028 D wait_bit_mtx +ffffffff8360d038 D shrinkers +ffffffff8360e000 d crtc_ww_class +ffffffff8360f000 d panel_lock +ffffffff8360f010 d panel_list +ffffffff83610000 d ttm_global_mutex +ffffffff83611000 D drm_sched_policy +ffffffff83612000 D intel_bbops +ffffffff83613000 d i915_sys_placement +ffffffff83613020 d i915_ttm_bo_driver +ffffffff83614000 d mchdev_lock +ffffffff83615000 D inteldrm_stdscreen +ffffffff83615030 D inteldrm_scrlist +ffffffff83615038 D inteldrm_screenlist +ffffffff83615048 D inteldrm_accessops +ffffffff836150a8 D inteldrm_cd +ffffffff83616000 d capture_mutex +ffffffff83617000 d mitigations +ffffffff83618000 D i915_modparams +ffffffff83619000 d schedule_lock +ffffffff8361a000 d unbind_fence_ops +ffffffff8361b000 D intel_graphics_stolen_res +ffffffff8361c000 D btc_valid_sclk +ffffffff8361d000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff8361d020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff8361e000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff8361e008 d r600_cs_packet_parse_vline.vline_status +ffffffff8361f000 d r100_asic +ffffffff8361f2e0 d r200_asic +ffffffff8361f5c0 d r300_asic_pcie +ffffffff8361f8a0 d r300_asic +ffffffff8361fb80 d r420_asic +ffffffff8361fe60 d rs400_asic +ffffffff83620140 d rs600_asic +ffffffff83620420 d rs690_asic +ffffffff83620700 d rv515_asic +ffffffff836209e0 d r520_asic +ffffffff83620cc0 d r600_asic +ffffffff83620fa0 d rv6xx_asic +ffffffff83621280 d rs780_asic +ffffffff83621560 d rv770_asic +ffffffff83621840 d evergreen_asic +ffffffff83621b20 d sumo_asic +ffffffff83621e00 d btc_asic +ffffffff836220e0 d cayman_asic +ffffffff836223c0 d trinity_asic +ffffffff836226a0 d si_asic +ffffffff83622980 d ci_asic +ffffffff83622c60 d kv_asic +ffffffff83623000 d dce6_funcs +ffffffff83623018 d dce6_hdmi_funcs +ffffffff83623088 d dce6_dp_funcs +ffffffff836230f8 d dce4_funcs +ffffffff83623110 d dce4_hdmi_funcs +ffffffff83623180 d dce4_dp_funcs +ffffffff836231f0 d dce32_funcs +ffffffff83623208 d dce32_hdmi_funcs +ffffffff83623278 d dce32_dp_funcs +ffffffff836232e8 d r600_funcs +ffffffff83623300 d r600_hdmi_funcs +ffffffff83624000 D radeon_modeset +ffffffff83624004 D radeon_dynclks +ffffffff83624008 D radeon_agpmode +ffffffff8362400c D radeon_gart_size +ffffffff83624010 D radeon_tv +ffffffff83624014 D radeon_audio +ffffffff83624018 D radeon_pcie_gen2 +ffffffff8362401c D radeon_msi +ffffffff83624020 D radeon_lockup_timeout +ffffffff83624024 D radeon_dpm +ffffffff83624028 D radeon_aspm +ffffffff8362402c D radeon_runtime_pm +ffffffff83624030 D radeon_vm_size +ffffffff83624034 D radeon_vm_block_size +ffffffff83624038 D radeon_use_pflipirq +ffffffff8362403c D radeon_bapm +ffffffff83624040 D radeon_backlight +ffffffff83624044 D radeon_auxch +ffffffff83624048 D radeon_uvd +ffffffff8362404c D radeon_vce +ffffffff83624050 D radeon_si_support +ffffffff83624054 D radeon_cik_support +ffffffff83624058 D radeondrm_cd +ffffffff83624078 D radeondrm_stdscreen +ffffffff836240a8 D radeondrm_scrlist +ffffffff836240b0 D radeondrm_screenlist +ffffffff836240c0 D radeondrm_accessops +ffffffff83625000 D radeon_bbops +ffffffff83626000 d radeon_bo_driver +ffffffff83627000 d verde_pg_init +ffffffff83628000 d cac_weights_pitcairn +ffffffff836284d0 d cac_weights_oland +ffffffff83629000 d aldebaran_mode2_handler +ffffffff8362a000 d amdgpu_vbios_version_attrs +ffffffff8362b000 D amdgpu_asic_name +ffffffff8362c000 D amdgpu_vram_limit +ffffffff8362c004 D amdgpu_gart_size +ffffffff8362c008 D amdgpu_gtt_size +ffffffff8362c00c D amdgpu_moverate +ffffffff8362c010 D amdgpu_audio +ffffffff8362c014 D amdgpu_pcie_gen2 +ffffffff8362c018 D amdgpu_msi +ffffffff8362c01c D amdgpu_dpm +ffffffff8362c020 D amdgpu_fw_load_type +ffffffff8362c024 D amdgpu_aspm +ffffffff8362c028 D amdgpu_runtime_pm +ffffffff8362c02c D amdgpu_ip_block_mask +ffffffff8362c030 D amdgpu_bapm +ffffffff8362c034 D amdgpu_vm_size +ffffffff8362c038 D amdgpu_vm_fragment_size +ffffffff8362c03c D amdgpu_vm_block_size +ffffffff8362c040 D amdgpu_vm_update_mode +ffffffff8362c044 D amdgpu_dc +ffffffff8362c048 D amdgpu_sched_jobs +ffffffff8362c04c D amdgpu_sched_hw_submission +ffffffff8362c050 D amdgpu_cg_mask +ffffffff8362c058 D amdgpu_pg_mask +ffffffff8362c05c D amdgpu_sdma_phase_quantum +ffffffff8362c060 D amdgpu_pp_feature_mask +ffffffff8362c064 D amdgpu_lbpw +ffffffff8362c068 D amdgpu_compute_multipipe +ffffffff8362c06c D amdgpu_gpu_recovery +ffffffff8362c070 D amdgpu_smu_pptable_id +ffffffff8362c074 D amdgpu_dc_feature_mask +ffffffff8362c078 D amdgpu_async_gfx_ring +ffffffff8362c07c D amdgpu_mcbp +ffffffff8362c080 D amdgpu_discovery +ffffffff8362c084 D amdgpu_noretry +ffffffff8362c088 D amdgpu_force_asic_type +ffffffff8362c08c D amdgpu_tmz +ffffffff8362c090 D amdgpu_reset_method +ffffffff8362c094 D amdgpu_num_kcq +ffffffff8362c098 D amdgpu_use_xgmi_p2p +ffffffff8362c09c D amdgpu_sg_display +ffffffff8362c0a0 D amdgpu_user_partt_mode +ffffffff8362c0a8 D mgpu_info +ffffffff8362c558 D amdgpu_ras_enable +ffffffff8362c55c D amdgpu_ras_mask +ffffffff8362c560 D amdgpu_bad_page_threshold +ffffffff8362c564 D amdgpu_backlight +ffffffff8362c568 D amdgpu_cd +ffffffff8362c588 D amdgpu_stdscreen +ffffffff8362c5b8 D amdgpu_scrlist +ffffffff8362c5c0 D amdgpu_screenlist +ffffffff8362c5d0 D amdgpu_accessops +ffffffff8362d000 d amdgpu_gtt_mgr_attributes +ffffffff8362e000 D amdgpu_bbops +ffffffff8362f000 D soc15_ih_clientid_name +ffffffff83630000 D ras_error_string +ffffffff83630030 D ras_block_string +ffffffff836300c0 D ras_mca_block_string +ffffffff83631000 d amdgpu_bo_driver +ffffffff83632000 d amdgpu_vram_mgr_attributes +ffffffff83633000 d xgmi_mutex +ffffffff83633010 D xgmi_ras_hw_ops +ffffffff83633050 D xgmi_ras +ffffffff83634000 D aqua_vanjaram_xcp_funcs +ffffffff83635000 D gfx_v11_0_3_ras +ffffffff83636000 d gfx_v9_0_ras +ffffffff83637000 D gfx_v9_4_ras +ffffffff83638000 D gfx_v9_4_2_ras_ops +ffffffff83638040 D gfx_v9_4_2_ras +ffffffff83639000 D gfx_v9_4_3_xcp_funcs +ffffffff83639020 D gfx_v9_4_3_ras_ops +ffffffff83639060 D gfx_v9_4_3_ras +ffffffff8363a000 D gfxhub_v1_2_xcp_funcs +ffffffff8363b000 D hdp_v4_0_ras_hw_ops +ffffffff8363b040 D hdp_v4_0_ras +ffffffff8363c000 d jpeg_v2_6_ras +ffffffff8363d000 d jpeg_v4_0_ras +ffffffff8363e000 d jpeg_v4_0_3_ras +ffffffff8363f000 D mca_v3_0_mp0_ras +ffffffff8363f058 D mca_v3_0_mp1_ras +ffffffff8363f0b0 D mca_v3_0_mpio_ras +ffffffff83640000 D mmhub_v1_0_ras_hw_ops +ffffffff83640040 D mmhub_v1_0_ras +ffffffff83641000 D mmhub_v1_7_ras_hw_ops +ffffffff83641040 D mmhub_v1_7_ras +ffffffff83642000 D mmhub_v1_8_ras +ffffffff83643000 D mmhub_v9_4_ras +ffffffff83644000 D nbio_v4_3_ras +ffffffff83645000 D nbio_v7_4_ras +ffffffff83646000 D nbio_v7_9_ras +ffffffff83647000 d sriov_sc_video_codecs_encode +ffffffff83647010 d sriov_sc_video_codecs_decode_vcn1 +ffffffff83647020 d sriov_sc_video_codecs_decode_vcn0 +ffffffff83647030 d sriov_sc_video_codecs_encode_array +ffffffff83647060 d sriov_sc_video_codecs_decode_array_vcn1 +ffffffff836470f0 d sriov_sc_video_codecs_decode_array_vcn0 +ffffffff83648000 d sdma_v4_0_ras +ffffffff83649000 D sdma_v4_4_ras +ffffffff8364a000 D sdma_v4_4_2_xcp_funcs +ffffffff8364a020 d sdma_v4_4_2_ras +ffffffff8364b000 d sdma_v6_0_3_ras +ffffffff8364c000 d sienna_cichlid_mode2_handler +ffffffff8364d000 d smu_v13_0_10_mode2_handler +ffffffff8364e000 d sriov_vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff8364e010 d sriov_vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff8364e020 d sriov_vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff8364e030 d sriov_vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff8364e040 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff8364e070 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff8364e100 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff8364e140 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff8364f000 D umc_v6_1_ras +ffffffff83650000 D umc_v6_7_ras +ffffffff83651000 D umc_v8_10_ras +ffffffff83652000 D umc_v8_7_ras +ffffffff83653000 d vcn_v2_6_ras +ffffffff83654000 d vcn_v4_0_unified_ring_vm_funcs +ffffffff83654140 d vcn_v4_0_ras +ffffffff83655000 d vcn_v4_0_3_ras +ffffffff83656000 d amdgpu_dm_mode_config_helperfuncs +ffffffff83656010 d dm_atomic_state_funcs +ffffffff83657000 d construct_integrated_info.result +ffffffff83657004 d bios_parser_get_firmware_info.result +ffffffff83658000 d dce_funcs +ffffffff83659000 d dce110_funcs +ffffffff8365a000 d dce112_funcs +ffffffff8365b000 d dce120_funcs +ffffffff8365c000 d rv1_clk_funcs +ffffffff8365c090 d rv1_clk_internal_funcs +ffffffff8365d000 d rv2_clk_internal_funcs +ffffffff8365e000 d dcn2_funcs +ffffffff8365f000 d dcn201_funcs +ffffffff83660000 d dcn21_funcs +ffffffff83660090 d rn_bw_params +ffffffff83661000 D dcn3_fpga_funcs +ffffffff83661090 d dcn3_funcs +ffffffff83662000 d vg_funcs +ffffffff83662090 d dummy_clocks +ffffffff836621c0 d vg_bw_params +ffffffff83663000 d dcn31_funcs +ffffffff83663090 d dcn31_bw_params +ffffffff83664000 d dcn314_funcs +ffffffff83664090 d dcn314_bw_params +ffffffff83665000 d dcn315_funcs +ffffffff83665090 d dcn315_bw_params +ffffffff83666000 d dcn316_funcs +ffffffff83666090 d dcn316_bw_params +ffffffff83667000 d dcn32_funcs +ffffffff83668000 d dcn10_dpp_cap +ffffffff83669000 d dcn20_dpp_funcs +ffffffff83669110 d dcn20_dpp_cap +ffffffff8366a000 d dcn20_hubp_funcs +ffffffff8366b000 d dcn20_opp_funcs +ffffffff8366c000 d dcn20_tg_funcs +ffffffff8366d000 d dcn201_dpp_funcs +ffffffff8366d110 d dcn201_dpp_cap +ffffffff8366e000 d dcn201_hubp_funcs +ffffffff8366f000 d dcn201_opp_funcs +ffffffff83670000 d dcn201_tg_funcs +ffffffff83671000 d dcn201_res_pool_funcs +ffffffff836710f8 d dcn201_ip +ffffffff836712b0 d dcn201_soc +ffffffff83673000 d dcn21_hubp_funcs +ffffffff83674000 d dcn30_afmt_funcs +ffffffff83675000 d dcn30_dpp_funcs +ffffffff83675110 d dcn30_dpp_cap +ffffffff83676000 d dcn30_hubp_funcs +ffffffff83677000 d dcn30_tg_funcs +ffffffff83678000 d dcn30_vpg_funcs +ffffffff83679000 d dcn30_tg_funcs +ffffffff8367a000 d res_cap_dcn301 +ffffffff8367a040 d dcn301_res_pool_funcs +ffffffff8367b000 d dcn302_res_pool_funcs +ffffffff8367c000 d dcn303_res_pool_funcs +ffffffff8367d000 d dcn31_afmt_funcs +ffffffff8367e000 d dcn31_apg_funcs +ffffffff8367f000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff83680000 d dcn31_hubp_funcs +ffffffff83681000 d dcn31_tg_funcs +ffffffff83682000 d dcn31_res_pool_funcs +ffffffff83683000 d dcn31_vpg_funcs +ffffffff83684000 d dcn314_tg_funcs +ffffffff83685000 d dcn314_res_pool_funcs +ffffffff83686000 d dcn315_res_pool_funcs +ffffffff83687000 d dcn316_res_pool_funcs +ffffffff83688000 d dcn32_dpp_funcs +ffffffff83688110 d dcn32_dpp_cap +ffffffff83689000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff8368a000 d dcn32_hubp_funcs +ffffffff8368b000 d dcn32_tg_funcs +ffffffff8368c000 d dcn32_res_pool_funcs +ffffffff8368d000 d dcn321_res_pool_funcs +ffffffff8368e000 D dcn1_0_ip +ffffffff8368e1b8 D dcn1_0_soc +ffffffff83690000 D dcn2_0_ip +ffffffff836901b8 D dcn2_0_nv14_ip +ffffffff83690370 D dcn2_0_soc +ffffffff836916a8 D dcn2_0_nv14_soc +ffffffff836929e0 D dcn2_0_nv12_soc +ffffffff83693d18 D dcn2_1_ip +ffffffff83693ed0 D dcn2_1_soc +ffffffff83695208 D ddr4_wm_table_gs +ffffffff836952c8 D lpddr4_wm_table_gs +ffffffff83695388 D lpddr4_wm_table_with_disabled_ppt +ffffffff83695448 D ddr4_wm_table_rn +ffffffff83695508 D ddr4_1R_wm_table_rn +ffffffff836955c8 D lpddr4_wm_table_rn +ffffffff83696000 D dcn3_0_ip +ffffffff836961b8 D dcn3_0_soc +ffffffff83698000 D dcn3_01_ip +ffffffff836981b8 D dcn3_01_soc +ffffffff836994f0 D ddr4_wm_table +ffffffff836995b0 D lpddr5_wm_table +ffffffff8369a000 D dcn3_02_ip +ffffffff8369a1b8 D dcn3_02_soc +ffffffff8369c000 D dcn3_03_ip +ffffffff8369c1b8 D dcn3_03_soc +ffffffff8369e000 D dcn3_1_ip +ffffffff8369e1b8 D dcn3_15_ip +ffffffff8369e370 D dcn3_16_ip +ffffffff8369e528 d dcn3_15_soc +ffffffff8369f860 d dcn3_1_soc +ffffffff836a0b98 d dcn3_16_soc +ffffffff836a2000 D dcn3_14_ip +ffffffff836a21b8 d dcn3_14_soc +ffffffff836a4000 D dcn3_2_ip +ffffffff836a41b8 D dcn3_2_soc +ffffffff836a6000 D dcn3_21_ip +ffffffff836a61b8 D dcn3_21_soc +ffffffff836a8000 d dsc_policy_max_target_bpp_limit +ffffffff836a9000 D DIDTEDCConfig_P12 +ffffffff836a9070 d smu7_profiling +ffffffff836aa000 d cyan_skillfish_table_map +ffffffff836aa080 d cyan_skillfish_message_map +ffffffff836ab000 d navi10_table_map +ffffffff836ab080 d navi10_pwr_src_map +ffffffff836ab090 d navi10_workload_map +ffffffff836ab0e0 d navi10_message_map +ffffffff836abb60 d navi10_clk_map +ffffffff836abc20 d navi10_feature_mask_map +ffffffff836ac000 d sienna_cichlid_table_map +ffffffff836ac080 d sienna_cichlid_pwr_src_map +ffffffff836ac090 d sienna_cichlid_workload_map +ffffffff836ac0e0 d sienna_cichlid_message_map +ffffffff836acb60 d sienna_cichlid_clk_map +ffffffff836acc20 d sienna_cichlid_feature_mask_map +ffffffff836ad000 d vangogh_message_map +ffffffff836ada80 d vangogh_table_map +ffffffff836adb00 d vangogh_workload_map +ffffffff836adb50 d vangogh_feature_mask_map +ffffffff836ae000 d renoir_table_map +ffffffff836ae080 d renoir_workload_map +ffffffff836ae0d0 d renoir_message_map +ffffffff836aeb50 d renoir_clk_map +ffffffff836af000 d smu_v13_0_0_message_map +ffffffff836afa80 d smu_v13_0_0_feature_mask_map +ffffffff836afe50 d smu_v13_0_0_table_map +ffffffff836afed0 d smu_v13_0_0_pwr_src_map +ffffffff836afee0 d smu_v13_0_0_workload_map +ffffffff836aff30 d smu_v13_0_0_clk_map +ffffffff836b0000 d smu_v13_0_4_table_map +ffffffff836b0080 d smu_v13_0_4_message_map +ffffffff836b0b00 d smu_v13_0_4_feature_mask_map +ffffffff836b1000 d smu_v13_0_5_table_map +ffffffff836b1080 d smu_v13_0_5_message_map +ffffffff836b1b00 d smu_v13_0_5_feature_mask_map +ffffffff836b2000 d smu_v13_0_7_message_map +ffffffff836b2a80 d smu_v13_0_7_feature_mask_map +ffffffff836b2e50 d smu_v13_0_7_table_map +ffffffff836b2ed0 d smu_v13_0_7_pwr_src_map +ffffffff836b2ee0 d smu_v13_0_7_workload_map +ffffffff836b2f30 d smu_v13_0_7_clk_map +ffffffff836b3000 d yellow_carp_table_map +ffffffff836b3080 d yellow_carp_message_map +ffffffff836b3b00 d yellow_carp_feature_mask_map +ffffffff836b4000 D pci_conf_lock +ffffffff836b4010 D pci_bus_dma_tag +ffffffff836b4088 D msi_pic +ffffffff836b4120 D msix_pic +ffffffff836b5000 D pchb_cd +ffffffff836b6000 D amas_cd +ffffffff836b7000 D cardslot_cd +ffffffff836b8000 D cardbus_cd +ffffffff836b9000 d csdevs +ffffffff836ba000 d ral_rt2560_opns +ffffffff836ba028 d ral_rt2661_opns +ffffffff836ba050 d ral_rt2860_opns +ffffffff836bb000 D pcmcia_cd +ffffffff836bc000 D pcmcia_3cxem556_func0 +ffffffff836bc0b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff836bc158 D pcmcia_megahertz_xjem1144_func0 +ffffffff836bc210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff836bc2b0 d pcmcia_3cxem556_func1 +ffffffff836bc368 d pcmcia_3cxem556_func1_cfe0 +ffffffff836bc408 d pcmcia_megahertz_xjem1144_func1 +ffffffff836bc4c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff836bc560 d pcmcia_sierra_a555_func1 +ffffffff836bc618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff836bc6b8 d pcmcia_sveclancard_func0 +ffffffff836bc770 d pcmcia_sveclancard_func0_cfe0 +ffffffff836bd000 D ep_pcmcia_prod +ffffffff836be000 D aic_pcmcia_prod +ffffffff836bf000 D com_pcmcia_prod +ffffffff836c0000 D wdc_pcmcia_pr +ffffffff836c1000 D sm_pcmcia_prod +ffffffff836c2000 D xe_cd +ffffffff836c3000 D pcib_cd +ffffffff836c4000 D amdpcib_cd +ffffffff836c5000 D tcpcib_cd +ffffffff836c6000 D aapic_cd +ffffffff836c7000 D hme_cd +ffffffff836c8000 D isa_cd +ffffffff836c9000 D isadma_cd +ffffffff836ca000 D fdc_cd +ffffffff836cb000 D fd_types +ffffffff836cb1f8 D fd_cd +ffffffff836cc000 D mpu_cd +ffffffff836cd000 D pcppi_cd +ffffffff836ce000 D spkr_cd +ffffffff836cf000 D wbsio_cd +ffffffff836d0000 D schsio_cd +ffffffff836d1000 D it_cd +ffffffff836d2000 D uguru_cd +ffffffff836d3000 D aps_cd +ffffffff836d4000 D isa_bus_dma_tag +ffffffff836d5000 D wsdisplay_cd +ffffffff836d5020 D wsdisplay_cons +ffffffff836d5058 D wsdisplay_defaultscreens +ffffffff836d6000 D wskbd_cd +ffffffff836d6020 D wskbd_default_bell_data +ffffffff836d6030 D wskbd_default_keyrepeat_data +ffffffff836d6040 D wskbd_srcops +ffffffff836d7000 d compose_tab +ffffffff836d8000 D wsmouse_cd +ffffffff836d8020 D wsmouse_srcops +ffffffff836d9000 D wsmux_srcops +ffffffff836d9030 D wsmux_tree_lock +ffffffff836da000 D vt100_output +ffffffff836db000 D pckbd_cd +ffffffff836dc000 D pms_cd +ffffffff836dc020 d synaptics_params +ffffffff836dc030 d alps_params +ffffffff836dd000 D skgpio_cd +ffffffff836de000 D pctr_conf_lock +ffffffff836df000 D ukbd_keymapdata +ffffffff836e0000 D usbrev_str +ffffffff836e0030 D usb_cd +ffffffff836e1000 d usbd_ratecheck.errinterval +ffffffff836e2000 D uhub_cd +ffffffff836e3000 D uaudio_cd +ffffffff836e4000 D uvideo_ctrls +ffffffff836e42d8 D uvideo_cd +ffffffff836e5000 D utvfu_norm_params +ffffffff836e5030 D utvfu_cd +ffffffff836e6000 D udl_reg_vals_640x480_60 +ffffffff836e6020 D udl_reg_vals_640x480_67 +ffffffff836e6040 D udl_reg_vals_640x480_72 +ffffffff836e6060 D udl_reg_vals_640x480_75 +ffffffff836e6080 D udl_reg_vals_800x480_61 +ffffffff836e60a0 D udl_reg_vals_800x600_56 +ffffffff836e60c0 D udl_reg_vals_800x600_60 +ffffffff836e60e0 D udl_reg_vals_800x600_72 +ffffffff836e6100 D udl_reg_vals_800x600_74 +ffffffff836e6120 D udl_reg_vals_800x600_75 +ffffffff836e6140 D udl_reg_vals_1024x768_60 +ffffffff836e6160 D udl_reg_vals_1024x768_70 +ffffffff836e6180 D udl_reg_vals_1024x768_75 +ffffffff836e61a0 D udl_reg_vals_1280x800_60 +ffffffff836e61c0 D udl_reg_vals_1280x960_60 +ffffffff836e61e0 D udl_reg_vals_1280x1024_60 +ffffffff836e6200 D udl_reg_vals_1280x1024_75 +ffffffff836e6220 D udl_reg_vals_1366x768_60 +ffffffff836e6240 D udl_reg_vals_1440x900_60 +ffffffff836e6260 D udl_reg_vals_1440x900_59 +ffffffff836e6280 D udl_reg_vals_1440x900_75 +ffffffff836e62a0 D udl_reg_vals_1680x1050_60 +ffffffff836e62c0 D udl_reg_vals_1600x1200_60 +ffffffff836e62e0 D udl_reg_vals_1920x1080_60 +ffffffff836e6300 D udl_null_key_1 +ffffffff836e6310 D udl_decomp_table +ffffffff836e7510 D udl_cd +ffffffff836e7530 D udl_stdscreen +ffffffff836e7560 D udl_scrlist +ffffffff836e7568 D udl_screenlist +ffffffff836e7578 D udl_accessops +ffffffff836e8000 D umidi_cd +ffffffff836e9000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff836e9020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff836e9040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff836e9060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff836e9080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff836e90a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff836e90c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff836e90e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff836e9100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff836e9120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff836e9140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff836e9160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff836e9180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff836e91a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff836e91c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff836e91e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff836e9200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff836e9220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff836e9240 D umidi_quirklist +ffffffff836e94a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff836e94c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff836e94d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff836e94f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff836e9500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff836e9520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff836e9530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff836e9550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff836e9560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff836e9580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff836e9590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff836e95b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff836e95c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff836e95e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff836e95f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff836e9610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff836e9620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff836e9640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff836e9650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff836e9670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff836e9680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff836e96a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff836e96b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff836e96d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff836e96e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff836e9700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff836e9710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff836e9730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff836e9740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff836e9760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff836e9770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff836e9790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff836e97a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff836e97c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff836e97d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff836e97f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff836ea000 D ucom_cd +ffffffff836ea020 D sysctl_ucomlock +ffffffff836eb000 D ugen_cd +ffffffff836ec000 D uhidev_cd +ffffffff836ec020 d uhidev_use_rdesc.reportbuf +ffffffff836ed000 D uhid_cd +ffffffff836ee000 D fido_cd +ffffffff836ef000 D ujoy_cd +ffffffff836f0000 D ukbd_cd +ffffffff836f1000 D ums_cd +ffffffff836f1020 d ums_fix_elecom_descriptor.match +ffffffff836f2000 D umt_cd +ffffffff836f3000 D def_scale +ffffffff836f3020 D uts_cd +ffffffff836f4000 D ubcmtp_cd +ffffffff836f4020 d ubcmtp_wsmousecfg +ffffffff836f5000 D ucycom_cd +ffffffff836f6000 D uslhcom_cd +ffffffff836f7000 D ulpt_fwdevs +ffffffff836f7060 D ulpt_cd +ffffffff836f7080 D ulptusein +ffffffff836f8000 D umass_cd +ffffffff836f8020 d umass_bbb_transfer.dCBWtag +ffffffff836f9000 D uthum_cd +ffffffff836fa000 D ugold_cd +ffffffff836fa020 d cmd_init +ffffffff836fa028 d cmd_type +ffffffff836fa030 d cmd_data +ffffffff836fb000 D utrh_cd +ffffffff836fc000 D uoakrh_cd +ffffffff836fd000 D uoaklux_cd +ffffffff836fe000 D uoakv_cd +ffffffff836ff000 D uonerng_cd +ffffffff83700000 D urng_cd +ffffffff83701000 D udcf_cd +ffffffff83702000 D umbg_cd +ffffffff83703000 D uvisor_cd +ffffffff83704000 D udsbr_cd +ffffffff83705000 D utwitch_cd +ffffffff83706000 D aue_cd +ffffffff83707000 D axe_cd +ffffffff83708000 D axen_cd +ffffffff83709000 D smsc_cd +ffffffff8370a000 D cue_devs +ffffffff8370a010 D cue_cd +ffffffff8370b000 D kue_cd +ffffffff8370c000 D cdce_cd +ffffffff8370d000 D urndis_cd +ffffffff8370e000 D mos_cd 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pf_state_key_pl +ffffffff837bfc10 B pf_purge_states_limit +ffffffff837bfc18 B pf_rule_item_pl +ffffffff837bfdc0 b pf_purge_expired_states.cur +ffffffff837bfdc8 B pf_tcp_secret_init +ffffffff837bfdd0 B pf_tcp_secret +ffffffff837bfde0 B pf_tcp_secret_ctx +ffffffff837bfeb0 B pf_tcp_iss_off +ffffffff837bfec0 B pf_queues +ffffffff837bfee0 B pf_queues_active +ffffffff837bfee8 B pf_queues_inactive +ffffffff837bfef0 B pf_rule_pl +ffffffff837c0098 B pf_queue_pl +ffffffff837c1000 B pf_frent_pl +ffffffff837c11a8 B pf_frnode_pl +ffffffff837c1350 B pf_frag_pl +ffffffff837c14f8 B pf_state_scrub_pl +ffffffff837c16a0 B pf_fragqueue +ffffffff837c16b0 B pf_frag_mtx +ffffffff837c16c0 B pf_frnode_tree +ffffffff837c2000 B pf_anchors +ffffffff837c2008 B pf_main_anchor +ffffffff837c2510 B pf_anchor_pl +ffffffff837c3000 B pf_ioctl_trans +ffffffff837c3008 B pf_default_rule +ffffffff837c3548 B pf_tag_pl +ffffffff837c36f0 B pf_default_rule_new +ffffffff837c3c30 B pf_anchor_stack +ffffffff837c3c38 B pf_trans_set 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+ffffffff83aea000 B aml_root +ffffffff83aea060 B aml_lastscope +ffffffff83aea068 B aml_ophash +ffffffff83aea070 b aml_mnem.mnemstr +ffffffff83aea090 B aml_notify_list +ffffffff83aea098 B acpi_nalloc +ffffffff83aea0a0 b acpi_sleep.acpinowait +ffffffff83aea0b0 b aml_nodename.namebuf +ffffffff83aea130 b aml_getname.namebuf +ffffffff83aea1b0 b aml_getname.p +ffffffff83aea1b8 b global_lock_count +ffffffff83aea1c0 b aml_eisaid.id +ffffffff83aea1c8 B aml_global_lock +ffffffff83aea1d0 b aml_mapresource.map +ffffffff83aea210 b aml_val_to_string.buffer +ffffffff83aea310 B aml_error +ffffffff83aea314 B odp +ffffffff83aea318 B maxdp +ffffffff83aea31c B aml_busy +ffffffff83aeb000 B scope +ffffffff83aec000 B acpibtn_lids +ffffffff83aed000 B cst_stats +ffffffff83aee000 B acpihpet_attached +ffffffff83aef000 b acpiec_wait.acpiecnowait +ffffffff83af0000 B acpitz_cpu_setperf +ffffffff83af1000 B acpimadt_busses +ffffffff83af4000 B acpimadt_isa_bus +ffffffff83af4030 b lapic_map +ffffffff83af5000 B acpidmar_ddb +ffffffff83af5010 b dmar_bdf.bdf +ffffffff83af5030 B acpidmar_sc +ffffffff83af5038 B domain_map_page +ffffffff83af5040 b dom_bdf.mmm +ffffffff83af5070 b iommu_init.niommu +ffffffff83af5078 b acpidmar_pci_attach.dom +ffffffff83af5080 b sid_flag +ffffffff83b35080 b ivhd_showpage.show +ffffffff83b35084 b ivhd_iommu_init.niommu +ffffffff83b35088 b acpidmar_intr.ofe.0 +ffffffff83b35090 b acpidmar_intr.ofe.1 +ffffffff83b36000 b dwiic_i2c_intr_string.irqstr +ffffffff83b37000 B acpihve_attached +ffffffff83b38000 B efi_get_variable +ffffffff83b38008 B efi_get_next_variable_name +ffffffff83b38010 B efi_set_variable +ffffffff83b39000 B efi_jmpbuf +ffffffff83b3a000 B vm_pool +ffffffff83b3a1a8 B vcpu_pool +ffffffff83b3a350 B vmm_softc +ffffffff83b3b000 B l1tf_flush_region +ffffffff83b3c000 B sdmmc_verbose +ffffffff83b3d000 B utc_offset +ffffffff83b3d008 B bufpages +ffffffff83b3d010 B utsname +ffffffff83b3e000 B mountroot +ffffffff83b3f000 B __kernel_bss_end ffffffff83c00000 B _end ffffffff83c00000 B end