--- 7.6/2024-12-05T13:22:15Z/2024-11-04T00:00:00Z/nm-bsd-ot14.txt Thu Dec 5 23:34:09 2024 +++ 7.6/2024-12-05T13:22:15Z/2024-11-05T00:00:00Z/nm-bsd-ot14.txt Fri Dec 6 02:15:18 2024 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001418f A acpi_pdirpa 01000000 A __kernel_phys_base -02836000 T __kernel_kutext_phys -02839000 C __kernel_cptext_phys -0283a000 C __kernel_rodata_phys -03149000 R __kernel_kutext_page_phys -0314b000 C __kernel_randomdata_phys -03405000 R __kernel_data_phys -03763000 D __kernel_kudata_phys -03764000 C __kernel_bss_phys +02837000 T __kernel_kutext_phys +0283a000 C __kernel_cptext_phys +0283b000 C __kernel_rodata_phys +0314a000 R __kernel_kutext_page_phys +0314c000 C __kernel_randomdata_phys +03406000 R __kernel_data_phys +03764000 D __kernel_kudata_phys +03765000 C __kernel_bss_phys 03c00000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -6674,33 +6674,33 @@ ffffffff8134ba10 T pgsignal ffffffff8134bac0 T pgsigio ffffffff8134bcb0 T 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ieee80211_input_hwdecrypt -ffffffff814ad290 T ieee80211_inputm -ffffffff814ade80 T ieee80211_input_ba -ffffffff814ae190 T ieee80211_amsdu_decap -ffffffff814ae4b0 T ieee80211_decap -ffffffff814ae660 T ieee80211_recv_pspoll -ffffffff814ae7a0 T ieee80211_recv_bar -ffffffff814ae890 T ieee80211_input -ffffffff814ae910 T ieee80211_ba_move_window -ffffffff814aea70 T ieee80211_input_ba_seq -ffffffff814aec10 T ieee80211_input_ba_flush -ffffffff814aed40 T ieee80211_input_ba_gap_skip -ffffffff814aede0 T ieee80211_input_ba_gap_timeout -ffffffff814aef20 T ieee80211_enqueue_data -ffffffff814af120 T ieee80211_amsdu_decap_validate -ffffffff814af1f0 T ieee80211_parse_edca_params_body -ffffffff814af360 T ieee80211_parse_edca_params -ffffffff814af3c0 T ieee80211_parse_wmm_params -ffffffff814af420 T ieee80211_parse_rsn_cipher -ffffffff814af4e0 T ieee80211_parse_rsn_akm -ffffffff814af5a0 T ieee80211_parse_rsn_body -ffffffff814af860 T ieee80211_parse_rsn -ffffffff814af8b0 T ieee80211_parse_wpa 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ieee80211_disable_wep -ffffffff814b3620 T ieee80211_disable_rsn -ffffffff814b3690 T ieee80211_ioctl -ffffffff814b4d60 t ieee80211_ioctl_setnwkeys -ffffffff814b4f70 t ieee80211_ioctl_setwpaparms -ffffffff814b6000 T ieee80211_inact_timeout -ffffffff814b60d0 T ieee80211_node_cache_timeout -ffffffff814b6110 T ieee80211_clean_nodes -ffffffff814b6470 T ieee80211_print_ess -ffffffff814b66c0 T ieee80211_print_ess_list -ffffffff814b6750 T ieee80211_get_ess -ffffffff814b67f0 T ieee80211_del_ess -ffffffff814b6960 T ieee80211_add_ess -ffffffff814b70c0 T ieee80211_ess_adjust_rssi -ffffffff814b7130 T ieee80211_ess_calculate_score -ffffffff814b72a0 T ieee80211_ess_is_better -ffffffff814b7420 T ieee80211_match_ess -ffffffff814b7520 T ieee80211_switch_ess -ffffffff814b7820 T ieee80211_set_ess -ffffffff814b7b40 T ieee80211_deselect_ess -ffffffff814b7bb0 T ieee80211_node_attach -ffffffff814b7dc0 T ieee80211_node_alloc -ffffffff814b7de0 T ieee80211_node_free -ffffffff814b7eb0 T ieee80211_node_copy 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-ffffffff814ba6c0 T ieee80211_node_choose_bss -ffffffff814ba8e0 T ieee80211_free_node -ffffffff814baa10 T ieee80211_node_cmp -ffffffff814baa30 T ieee80211_clean_inactive_nodes -ffffffff814bab10 T ieee80211_get_rate -ffffffff814bab70 T ieee80211_ba_del -ffffffff814bac90 T ieee80211_node_set_timeouts -ffffffff814badc0 T ieee80211_node_addba_request_ac_be_to -ffffffff814bade0 T ieee80211_node_addba_request_ac_bk_to -ffffffff814bae10 T ieee80211_node_addba_request_ac_vi_to -ffffffff814bae40 T ieee80211_node_addba_request_ac_vo_to -ffffffff814bae70 T ieee80211_setup_node -ffffffff814bb050 T ieee80211_alloc_node -ffffffff814bb110 T ieee80211_dup_bss -ffffffff814bb200 T ieee80211_find_txnode -ffffffff814bb460 T ieee80211_find_rxnode -ffffffff814bb7f0 T ieee80211_node_tx_ba_clear -ffffffff814bb870 T ieee80211_release_node -ffffffff814bb920 T ieee80211_clean_cached -ffffffff814bb9e0 T ieee80211_node_leave -ffffffff814bbc60 T ieee80211_setup_htcaps -ffffffff814bbd10 T ieee80211_clear_htcaps -ffffffff814bbd90 T ieee80211_40mhz_valid_secondary_above -ffffffff814bbe20 T ieee80211_40mhz_valid_secondary_below -ffffffff814bbea0 T ieee80211_40mhz_center_freq_valid -ffffffff814bbf00 T ieee80211_setup_htop -ffffffff814bbff0 T ieee80211_setup_vhtcaps -ffffffff814bc070 T ieee80211_80mhz_center_freq_valid -ffffffff814bc0e0 T ieee80211_setup_vhtop -ffffffff814bc1e0 T ieee80211_clear_vhtcaps -ffffffff814bc230 T ieee80211_setup_rates -ffffffff814bc310 T ieee80211_node_trigger_addba_req -ffffffff814bc370 T ieee80211_node_addba_request -ffffffff814bc3a0 T ieee80211_iserp_sta -ffffffff814bc560 T ieee80211_needs_auth -ffffffff814bc590 T ieee80211_node_join_ht -ffffffff814bc5e0 T ieee80211_node_join_rsn -ffffffff814bc700 T ieee80211_count_longslotsta -ffffffff814bc750 T ieee80211_count_nonerpsta -ffffffff814bc7b0 T ieee80211_count_pssta -ffffffff814bc800 T ieee80211_count_rekeysta -ffffffff814bc850 T ieee80211_node_join_11g -ffffffff814bca50 T ieee80211_node_join -ffffffff814bcd80 T ieee80211_node_leave_ht -ffffffff814bcec0 T ieee80211_node_leave_vht -ffffffff814bcf10 T ieee80211_node_leave_rsn -ffffffff814bd080 T ieee80211_node_leave_11g -ffffffff814bd2c0 T ieee80211_node_leave_pwrsave -ffffffff814bd4e0 T ieee80211_ibss_merge -ffffffff814bd890 T ieee80211_notify_dtim -ffffffff814bd990 T ieee80211_ess_cmp -ffffffff814bd9b0 t ieee80211_tree_RBT_COMPARE -ffffffff814bd9d0 t ieee80211_ess_tree_RBT_COMPARE -ffffffff814be000 T ieee80211_output -ffffffff814be100 T ieee80211_action_name -ffffffff814be150 T ieee80211_mgmt_output -ffffffff814be400 T ieee80211_pwrsave -ffffffff814be550 T ieee80211_up_to_ac -ffffffff814be610 T ieee80211_classify -ffffffff814be720 T ieee80211_can_use_ampdu -ffffffff814be780 T ieee80211_tx_compressed_bar -ffffffff814be8e0 T ieee80211_get_compressed_bar -ffffffff814be9d0 T ieee80211_encap -ffffffff814beec0 T ieee80211_add_capinfo -ffffffff814bef50 T ieee80211_add_ssid -ffffffff814befc0 T ieee80211_add_rates -ffffffff814bf040 T ieee80211_add_ds_params -ffffffff814bf0a0 T ieee80211_add_tim -ffffffff814bf1f0 T ieee80211_add_ibss_params -ffffffff814bf220 T ieee80211_add_edca_params -ffffffff814bf3b0 T ieee80211_add_erp -ffffffff814bf460 T ieee80211_add_qos_capability -ffffffff814bf4a0 T ieee80211_add_wme_info -ffffffff814bf4e0 T ieee80211_add_wme_param -ffffffff814bf680 T ieee80211_add_rsn_body -ffffffff814bf9a0 T ieee80211_add_rsn -ffffffff814bfa10 T ieee80211_add_wpa -ffffffff814bfa80 T ieee80211_add_xrates -ffffffff814bfb10 T ieee80211_add_htcaps -ffffffff814bfbf0 T ieee80211_add_htop -ffffffff814bfcd0 T ieee80211_add_vhtcaps -ffffffff814bfd80 T ieee80211_add_tie -ffffffff814bfdd0 T ieee80211_getmgmt -ffffffff814bfea0 T ieee80211_get_probe_req -ffffffff814c02e0 T ieee80211_get_probe_resp -ffffffff814c0900 T ieee80211_get_auth -ffffffff814c09a0 T ieee80211_get_deauth -ffffffff814c0a30 T ieee80211_get_assoc_req -ffffffff814c0f70 T ieee80211_get_assoc_resp -ffffffff814c13a0 T ieee80211_get_disassoc -ffffffff814c1430 T ieee80211_get_addba_req -ffffffff814c1540 T ieee80211_output_ba_move_window -ffffffff814c1640 T ieee80211_output_ba_move_window_to_first_unacked -ffffffff814c1810 T ieee80211_output_ba_record_ack -ffffffff814c1940 T ieee80211_get_addba_resp -ffffffff814c1a50 T ieee80211_get_delba -ffffffff814c1af0 T ieee80211_get_sa_query -ffffffff814c1b90 T ieee80211_get_action -ffffffff814c1e50 T ieee80211_send_mgmt -ffffffff814c2280 T ieee80211_get_rts -ffffffff814c2320 T ieee80211_get_cts_to_self -ffffffff814c23b0 T ieee80211_beacon_alloc -ffffffff814c3000 T ieee80211_eapol_key_input -ffffffff814c3270 T ieee80211_recv_eapol_key_req -ffffffff814c33d0 T ieee80211_recv_4way_msg3 -ffffffff814c3e50 T ieee80211_recv_4way_msg2or4 -ffffffff814c3fb0 T ieee80211_recv_4way_msg1 -ffffffff814c42c0 T ieee80211_recv_wpa_group_msg1 -ffffffff814c4620 T ieee80211_recv_rsn_group_msg1 -ffffffff814c4bb0 T ieee80211_recv_group_msg2 -ffffffff814c4d30 T ieee80211_recv_4way_msg2 -ffffffff814c4f70 T ieee80211_must_update_group_key -ffffffff814c4fe0 T ieee80211_recv_4way_msg4 -ffffffff814c6000 T ieee80211_send_eapol_key -ffffffff814c6210 T ieee80211_eapol_timeout -ffffffff814c62a0 T ieee80211_send_4way_msg1 -ffffffff814c65b0 T ieee80211_send_4way_msg3 -ffffffff814c6b70 T ieee80211_send_group_msg1 -ffffffff814c70f0 T ieee80211_add_gtk_kde -ffffffff814c71b0 T ieee80211_add_pmkid_kde -ffffffff814c7200 T ieee80211_add_igtk_kde -ffffffff814c72d0 T ieee80211_get_eapol_key -ffffffff814c73a0 T ieee80211_send_4way_msg2 -ffffffff814c7600 T ieee80211_send_4way_msg4 -ffffffff814c7800 T ieee80211_send_group_msg2 -ffffffff814c7a00 T ieee80211_send_eapol_key_req -ffffffff814c8000 T ieee80211_proto_attach -ffffffff814c80c0 T ieee80211_newstate -ffffffff814c8f40 T ieee80211_proto_detach -ffffffff814c8f80 T ieee80211_print_essid -ffffffff814c9120 T ieee80211_fix_rate -ffffffff814c9420 T ieee80211_reset_erp -ffffffff814c9550 T ieee80211_set_shortslottime -ffffffff814c95b0 T ieee80211_keyrun -ffffffff814c9730 T ieee80211_setkeys -ffffffff814c99c0 t ieee80211_node_gtk_rekey -ffffffff814c9a30 T ieee80211_setkeysdone -ffffffff814c9b40 T ieee80211_gtk_rekey_timeout -ffffffff814c9bb0 T ieee80211_sa_query_timeout -ffffffff814c9c90 T ieee80211_sa_query_request -ffffffff814c9d20 T ieee80211_ht_negotiate -ffffffff814c9ef0 T ieee80211_vht_negotiate -ffffffff814ca110 T ieee80211_tx_ba_timeout -ffffffff814ca240 T ieee80211_delba_request -ffffffff814ca3d0 T ieee80211_rx_ba_timeout -ffffffff814ca470 T ieee80211_addba_request -ffffffff814ca670 T ieee80211_auth_open_confirm -ffffffff814ca740 T ieee80211_try_another_bss -ffffffff814ca880 T ieee80211_auth_open -ffffffff814cabd0 T ieee80211_set_beacon_miss_threshold -ffffffff814cac60 T ieee80211_stop_ampdu_tx -ffffffff814cad80 T ieee80211_check_wpa_supplicant_failure -ffffffff814cae00 T ieee80211_set_link_state -ffffffff814cae90 T ieee80211_rtm_80211info_task -ffffffff814cb000 T ieee80211_ra_get_ht_rateset -ffffffff814cb090 T ieee80211_ra_use_ht_sgi -ffffffff814cb110 T ieee80211_ra_get_txrate -ffffffff814cb1b0 T ieee80211_ra_next_lower_intra_rate -ffffffff814cb340 T ieee80211_ra_next_intra_rate -ffffffff814cb4c0 T ieee80211_ra_next_rateset -ffffffff814cb6d0 T ieee80211_ra_best_mcs_in_rateset -ffffffff814cb750 T ieee80211_ra_probe_next_rateset -ffffffff814cba20 T ieee80211_ra_next_mcs -ffffffff814cba70 T ieee80211_ra_probe_clear -ffffffff814cbab0 T ieee80211_ra_probe_done -ffffffff814cbaf0 T ieee80211_ra_intra_mode_ra_finished -ffffffff814cbea0 T ieee80211_ra_trigger_next_rateset -ffffffff814cbf20 T ieee80211_ra_inter_mode_ra_finished -ffffffff814cbf50 T ieee80211_ra_best_rate -ffffffff814cbff0 T ieee80211_ra_probe_next_rate -ffffffff814cc0a0 T ieee80211_ra_valid_tx_mcs -ffffffff814cc120 T ieee80211_ra_valid_rates -ffffffff814cc1f0 T ieee80211_ra_probe_valid -ffffffff814cc240 T ieee80211_ra_add_stats_ht -ffffffff814cc4d0 T ieee80211_ra_choose -ffffffff814cc950 T ieee80211_ra_node_init -ffffffff814cd000 T ieee80211_ra_vht_get_rateset -ffffffff814cd0b0 T ieee80211_ra_vht_use_sgi -ffffffff814cd1a0 T ieee80211_ra_vht_get_txrate -ffffffff814cd250 T ieee80211_ra_vht_next_lower_intra_rate -ffffffff814cd290 T ieee80211_ra_vht_get_max_mcs -ffffffff814cd320 T ieee80211_ra_vht_next_intra_rate -ffffffff814cd410 T ieee80211_ra_vht_next_rateset -ffffffff814cd610 T ieee80211_ra_vht_best_mcs_in_rateset -ffffffff814cd6b0 T ieee80211_ra_vht_probe_next_rateset -ffffffff814cda50 T ieee80211_ra_vht_next_mcs -ffffffff814cdae0 T ieee80211_ra_vht_probe_clear -ffffffff814cdb10 T ieee80211_ra_vht_probe_done -ffffffff814cdb60 T ieee80211_ra_vht_intra_mode_ra_finished -ffffffff814ce020 T ieee80211_ra_vht_trigger_next_rateset -ffffffff814ce0a0 T ieee80211_ra_vht_inter_mode_ra_finished -ffffffff814ce0d0 T ieee80211_ra_vht_best_rate -ffffffff814ce440 T ieee80211_ra_vht_probe_next_rate -ffffffff814ce500 T ieee80211_ra_vht_init_valid_rates -ffffffff814ce710 T ieee80211_ra_vht_probe_valid -ffffffff814ce760 T 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sdma_v2_4_ring_emit_vm_flush -ffffffff8209ebd0 t sdma_v2_4_ring_emit_hdp_flush -ffffffff8209ee80 t sdma_v2_4_ring_test_ring -ffffffff8209f1b0 t sdma_v2_4_ring_test_ib -ffffffff8209f3c0 t sdma_v2_4_ring_insert_nop -ffffffff8209f500 t sdma_v2_4_ring_pad_ib -ffffffff8209f630 t sdma_v2_4_ring_emit_wreg -ffffffff8209f790 t sdma_v2_4_emit_copy_buffer -ffffffff8209f850 t sdma_v2_4_emit_fill_buffer -ffffffff8209f8e0 t sdma_v2_4_vm_copy_pte -ffffffff8209f9a0 t sdma_v2_4_vm_write_pte -ffffffff8209fa70 t sdma_v2_4_vm_set_pte_pde -ffffffff8209fb70 t sdma_v2_4_set_trap_irq_state -ffffffff8209fc60 t sdma_v2_4_process_trap_irq -ffffffff8209fd00 t sdma_v2_4_process_illegal_inst_irq -ffffffff8209fd80 t sdma_v2_4_enable -ffffffff820a0000 t sdma_v3_0_early_init -ffffffff820a0100 t sdma_v3_0_sw_init -ffffffff820a0530 t sdma_v3_0_sw_fini -ffffffff820a0600 t sdma_v3_0_hw_init -ffffffff820a0770 t sdma_v3_0_hw_fini -ffffffff820a07d0 t sdma_v3_0_suspend -ffffffff820a0830 t sdma_v3_0_resume -ffffffff820a0840 t sdma_v3_0_is_idle -ffffffff820a0890 t sdma_v3_0_wait_for_idle -ffffffff820a0940 t sdma_v3_0_check_soft_reset -ffffffff820a09a0 t sdma_v3_0_pre_soft_reset -ffffffff820a0a00 t sdma_v3_0_soft_reset -ffffffff820a0b00 t sdma_v3_0_post_soft_reset -ffffffff820a0b50 t sdma_v3_0_set_clockgating_state -ffffffff820a0e00 t sdma_v3_0_set_powergating_state -ffffffff820a0e30 t sdma_v3_0_get_clockgating_state -ffffffff820a0ed0 t sdma_v3_0_ring_get_rptr -ffffffff820a0f10 t sdma_v3_0_ring_get_wptr -ffffffff820a0f90 t sdma_v3_0_ring_set_wptr -ffffffff820a1040 t sdma_v3_0_ring_emit_ib -ffffffff820a1320 t sdma_v3_0_ring_emit_fence -ffffffff820a1770 t sdma_v3_0_ring_emit_pipeline_sync -ffffffff820a1a20 t sdma_v3_0_ring_emit_vm_flush -ffffffff820a1cd0 t sdma_v3_0_ring_emit_hdp_flush -ffffffff820a1f80 t sdma_v3_0_ring_test_ring -ffffffff820a22b0 t sdma_v3_0_ring_test_ib -ffffffff820a24c0 t sdma_v3_0_ring_insert_nop -ffffffff820a2600 t sdma_v3_0_ring_pad_ib -ffffffff820a2730 t sdma_v3_0_ring_emit_wreg -ffffffff820a2890 t sdma_v3_0_emit_copy_buffer -ffffffff820a2950 t sdma_v3_0_emit_fill_buffer -ffffffff820a29e0 t sdma_v3_0_vm_copy_pte -ffffffff820a2aa0 t sdma_v3_0_vm_write_pte -ffffffff820a2b70 t sdma_v3_0_vm_set_pte_pde -ffffffff820a2c70 t sdma_v3_0_set_trap_irq_state -ffffffff820a2d60 t sdma_v3_0_process_trap_irq -ffffffff820a2e00 t sdma_v3_0_process_illegal_inst_irq -ffffffff820a2e80 t sdma_v3_0_ctx_switch_enable -ffffffff820a3050 t sdma_v3_0_enable -ffffffff820a3200 t sdma_v3_0_gfx_resume -ffffffff820a4000 t sdma_v4_0_early_init -ffffffff820a42f0 t sdma_v4_0_late_init -ffffffff820a45b0 t sdma_v4_0_sw_init -ffffffff820a4a60 t sdma_v4_0_sw_fini -ffffffff820a4b30 t sdma_v4_0_hw_init -ffffffff820a7cf0 t sdma_v4_0_hw_fini -ffffffff820a7df0 t sdma_v4_0_suspend -ffffffff820a7e50 t sdma_v4_0_resume -ffffffff820a7ee0 t sdma_v4_0_is_idle -ffffffff820a8010 t sdma_v4_0_wait_for_idle -ffffffff820a81c0 t sdma_v4_0_soft_reset -ffffffff820a81f0 t sdma_v4_0_set_clockgating_state -ffffffff820a8720 t sdma_v4_0_set_powergating_state -ffffffff820a8800 t sdma_v4_0_get_clockgating_state -ffffffff820a88b0 t sdma_v4_0_query_ras_error_count -ffffffff820a8aa0 t sdma_v4_0_reset_ras_error_count -ffffffff820a8c20 t sdma_v4_0_ring_get_rptr -ffffffff820a8c80 t sdma_v4_0_ring_get_wptr -ffffffff820a8e90 t sdma_v4_0_ring_set_wptr -ffffffff820a9140 t sdma_v4_0_ring_emit_ib -ffffffff820a9420 t sdma_v4_0_ring_emit_fence -ffffffff820a9890 t sdma_v4_0_ring_emit_pipeline_sync -ffffffff820a98f0 t sdma_v4_0_ring_emit_vm_flush -ffffffff820a9910 t sdma_v4_0_ring_emit_hdp_flush -ffffffff820a99d0 t sdma_v4_0_ring_test_ring -ffffffff820a9d00 t sdma_v4_0_ring_test_ib -ffffffff820a9f10 t sdma_v4_0_ring_insert_nop -ffffffff820aa050 t sdma_v4_0_ring_pad_ib -ffffffff820aa180 t sdma_v4_0_ring_emit_wreg -ffffffff820aa2e0 t sdma_v4_0_ring_emit_reg_wait -ffffffff820aa330 t sdma_v4_0_wait_reg_mem -ffffffff820aa680 t sdma_v4_0_page_ring_get_wptr -ffffffff820aa840 t sdma_v4_0_page_ring_set_wptr -ffffffff820aaa10 t sdma_v4_0_emit_copy_buffer -ffffffff820aaad0 t sdma_v4_0_emit_fill_buffer -ffffffff820aab60 t sdma_v4_0_vm_copy_pte -ffffffff820aac20 t sdma_v4_0_vm_write_pte -ffffffff820aacf0 t sdma_v4_0_vm_set_pte_pde -ffffffff820aadf0 t sdma_v4_0_set_trap_irq_state -ffffffff820aafa0 t sdma_v4_0_process_trap_irq -ffffffff820ab100 t sdma_v4_0_process_illegal_inst_irq -ffffffff820ab220 t sdma_v4_0_set_ecc_irq_state -ffffffff820ab3d0 t sdma_v4_0_process_vm_hole_irq -ffffffff820ab420 t sdma_v4_0_print_iv_entry -ffffffff820ab570 t sdma_v4_0_process_doorbell_invalid_irq -ffffffff820ab5c0 t sdma_v4_0_process_pool_timeout_irq -ffffffff820ab610 t sdma_v4_0_process_srbm_write_irq -ffffffff820ab660 t sdma_v4_0_process_ras_data_cb -ffffffff820ab6e0 t sdma_v4_0_ctx_switch_enable -ffffffff820abe00 t sdma_v4_0_enable -ffffffff820ac3f0 t sdma_v4_0_gfx_enable -ffffffff820ad000 t sdma_v4_4_query_ras_error_count -ffffffff820ad2b0 t sdma_v4_4_reset_ras_error_count -ffffffff820ae000 t sdma_v4_4_2_early_init -ffffffff820ae2b0 t sdma_v4_4_2_late_init -ffffffff820ae340 t sdma_v4_4_2_sw_init -ffffffff820ae920 t sdma_v4_4_2_sw_fini -ffffffff820ae9f0 t sdma_v4_4_2_hw_init -ffffffff820aea40 t sdma_v4_4_2_hw_fini -ffffffff820aeb20 t sdma_v4_4_2_suspend -ffffffff820aec30 t sdma_v4_4_2_resume -ffffffff820aec80 t sdma_v4_4_2_is_idle -ffffffff820aed30 t sdma_v4_4_2_wait_for_idle -ffffffff820aee60 t sdma_v4_4_2_soft_reset -ffffffff820aee90 t sdma_v4_4_2_set_clockgating_state -ffffffff820af350 t sdma_v4_4_2_set_powergating_state -ffffffff820af380 t sdma_v4_4_2_get_clockgating_state -ffffffff820af480 t sdma_v4_4_2_xcp_suspend -ffffffff820af570 t sdma_v4_4_2_xcp_resume -ffffffff820af5b0 t sdma_v4_4_2_ring_get_rptr -ffffffff820af630 t sdma_v4_4_2_ring_get_wptr -ffffffff820af790 t sdma_v4_4_2_ring_set_wptr -ffffffff820af990 t sdma_v4_4_2_ring_emit_ib -ffffffff820afc70 t sdma_v4_4_2_ring_emit_fence -ffffffff820b00e0 t sdma_v4_4_2_ring_emit_pipeline_sync -ffffffff820b0140 t sdma_v4_4_2_ring_emit_vm_flush -ffffffff820b0160 t sdma_v4_4_2_ring_emit_hdp_flush -ffffffff820b0230 t sdma_v4_4_2_ring_test_ring -ffffffff820b0560 t sdma_v4_4_2_ring_test_ib -ffffffff820b0770 t sdma_v4_4_2_ring_insert_nop -ffffffff820b08b0 t sdma_v4_4_2_ring_pad_ib -ffffffff820b09e0 t sdma_v4_4_2_ring_emit_wreg -ffffffff820b0b40 t sdma_v4_4_2_ring_emit_reg_wait -ffffffff820b0b90 t sdma_v4_4_2_wait_reg_mem -ffffffff820b0ee0 t sdma_v4_4_2_page_ring_get_wptr -ffffffff820b1000 t sdma_v4_4_2_page_ring_set_wptr -ffffffff820b1130 t sdma_v4_4_2_emit_copy_buffer -ffffffff820b11f0 t sdma_v4_4_2_emit_fill_buffer -ffffffff820b1280 t sdma_v4_4_2_vm_copy_pte -ffffffff820b1340 t sdma_v4_4_2_vm_write_pte -ffffffff820b1410 t sdma_v4_4_2_vm_set_pte_pde -ffffffff820b1510 t sdma_v4_4_2_set_trap_irq_state -ffffffff820b1610 t sdma_v4_4_2_process_trap_irq -ffffffff820b1740 t sdma_v4_4_2_process_illegal_inst_irq -ffffffff820b17e0 t sdma_v4_4_2_set_ecc_irq_state -ffffffff820b18f0 t sdma_v4_4_2_process_vm_hole_irq -ffffffff820b19e0 t sdma_v4_4_2_process_doorbell_invalid_irq -ffffffff820b1ad0 t sdma_v4_4_2_process_pool_timeout_irq -ffffffff820b1bc0 t sdma_v4_4_2_process_srbm_write_irq -ffffffff820b1cb0 t sdma_v4_4_2_query_ras_error_count -ffffffff820b1e30 t sdma_v4_4_2_reset_ras_error_count -ffffffff820b1fa0 t sdma_v4_4_2_inst_init_golden_registers -ffffffff820b2170 t sdma_v4_4_2_inst_start -ffffffff820b39a0 t sdma_v4_4_2_inst_ctx_switch_enable -ffffffff820b3cf0 t sdma_v4_4_2_inst_enable -ffffffff820b5000 t sdma_v5_0_early_init -ffffffff820b5130 t sdma_v5_0_sw_init -ffffffff820b5350 t sdma_v5_0_sw_fini -ffffffff820b53f0 t sdma_v5_0_hw_init -ffffffff820b68c0 t sdma_v5_0_hw_fini -ffffffff820b6930 t sdma_v5_0_suspend -ffffffff820b69a0 t sdma_v5_0_resume -ffffffff820b69b0 t sdma_v5_0_is_idle -ffffffff820b6a50 t sdma_v5_0_wait_for_idle -ffffffff820b6b30 t sdma_v5_0_soft_reset -ffffffff820b6b60 t sdma_v5_0_set_clockgating_state -ffffffff820b6d80 t sdma_v5_0_set_powergating_state -ffffffff820b6db0 t sdma_v5_0_get_clockgating_state -ffffffff820b6e60 t sdma_v5_0_ring_get_rptr -ffffffff820b6ec0 t sdma_v5_0_ring_get_wptr -ffffffff820b7080 t sdma_v5_0_ring_set_wptr -ffffffff820b7430 t sdma_v5_0_ring_emit_ib -ffffffff820b7730 t sdma_v5_0_ring_emit_fence -ffffffff820b7be0 t sdma_v5_0_ring_emit_pipeline_sync -ffffffff820b7e90 t sdma_v5_0_ring_emit_vm_flush -ffffffff820b7eb0 t sdma_v5_0_ring_emit_hdp_flush -ffffffff820b8180 t sdma_v5_0_ring_test_ring -ffffffff820b85b0 t sdma_v5_0_ring_test_ib -ffffffff820b8940 t sdma_v5_0_ring_insert_nop -ffffffff820b8a80 t sdma_v5_0_ring_pad_ib -ffffffff820b8bb0 t sdma_v5_0_ring_init_cond_exec -ffffffff820b8e00 t sdma_v5_0_ring_patch_cond_exec -ffffffff820b8ec0 t sdma_v5_0_ring_emit_wreg -ffffffff820b9020 t sdma_v5_0_ring_emit_reg_wait -ffffffff820b92c0 t sdma_v5_0_ring_emit_reg_write_reg_wait -ffffffff820b9350 t sdma_v5_0_ring_preempt_ib -ffffffff820b94e0 t sdma_v5_0_ring_emit_mem_sync -ffffffff820b9710 t sdma_v5_0_emit_copy_buffer -ffffffff820b97d0 t sdma_v5_0_emit_fill_buffer -ffffffff820b9860 t sdma_v5_0_vm_copy_pte -ffffffff820b9920 t sdma_v5_0_vm_write_pte -ffffffff820b99f0 t sdma_v5_0_vm_set_pte_pde -ffffffff820b9af0 t sdma_v5_0_set_trap_irq_state -ffffffff820b9b90 t sdma_v5_0_process_trap_irq -ffffffff820b9cd0 t sdma_v5_0_process_illegal_inst_irq -ffffffff820b9d00 t sdma_v5_0_mqd_init -ffffffff820b9df0 t sdma_v5_0_ctx_switch_enable -ffffffff820ba170 t sdma_v5_0_enable -ffffffff820bb000 t sdma_v5_2_early_init -ffffffff820bb130 t sdma_v5_2_sw_init -ffffffff820bb3f0 t sdma_v5_2_sw_fini -ffffffff820bb490 t sdma_v5_2_hw_init -ffffffff820bd2c0 t sdma_v5_2_hw_fini -ffffffff820bd330 t sdma_v5_2_suspend -ffffffff820bd3a0 t sdma_v5_2_resume -ffffffff820bd3b0 t sdma_v5_2_is_idle -ffffffff820bd470 t sdma_v5_2_wait_for_idle -ffffffff820bd5a0 t sdma_v5_2_soft_reset -ffffffff820bd8c0 t sdma_v5_2_set_clockgating_state -ffffffff820bdc60 t sdma_v5_2_set_powergating_state -ffffffff820bdc90 t sdma_v5_2_get_clockgating_state -ffffffff820bdd40 t sdma_v5_2_ring_get_rptr -ffffffff820bdda0 t sdma_v5_2_ring_get_wptr -ffffffff820bdef0 t sdma_v5_2_ring_set_wptr -ffffffff820be0d0 t sdma_v5_2_ring_emit_ib -ffffffff820be3d0 t sdma_v5_2_ring_emit_fence -ffffffff820be880 t sdma_v5_2_ring_emit_pipeline_sync -ffffffff820beb30 t sdma_v5_2_ring_emit_vm_flush -ffffffff820beb50 t sdma_v5_2_ring_emit_hdp_flush -ffffffff820bee50 t sdma_v5_2_ring_test_ring -ffffffff820bf280 t sdma_v5_2_ring_test_ib -ffffffff820bf610 t sdma_v5_2_ring_insert_nop -ffffffff820bf750 t sdma_v5_2_ring_pad_ib -ffffffff820bf880 t sdma_v5_2_ring_init_cond_exec -ffffffff820bfad0 t sdma_v5_2_ring_patch_cond_exec -ffffffff820bfb90 t sdma_v5_2_ring_begin_use -ffffffff820bfbb0 t sdma_v5_2_ring_end_use -ffffffff820bfbd0 t sdma_v5_2_ring_emit_wreg -ffffffff820bfd30 t sdma_v5_2_ring_emit_reg_wait -ffffffff820bffd0 t sdma_v5_2_ring_emit_reg_write_reg_wait -ffffffff820c0060 t sdma_v5_2_ring_preempt_ib -ffffffff820c0220 t sdma_v5_2_ring_emit_mem_sync -ffffffff820c0450 t sdma_v5_2_emit_copy_buffer -ffffffff820c0510 t sdma_v5_2_emit_fill_buffer -ffffffff820c05a0 t sdma_v5_2_vm_copy_pte -ffffffff820c0660 t sdma_v5_2_vm_write_pte -ffffffff820c0730 t sdma_v5_2_vm_set_pte_pde -ffffffff820c0830 t sdma_v5_2_set_trap_irq_state -ffffffff820c08f0 t sdma_v5_2_process_trap_irq -ffffffff820c0a60 t sdma_v5_2_process_illegal_inst_irq -ffffffff820c0a90 t sdma_v5_2_mqd_init -ffffffff820c0b80 t sdma_v5_2_ctx_switch_enable -ffffffff820c0fd0 t sdma_v5_2_enable -ffffffff820c2000 t sdma_v6_0_early_init -ffffffff820c2120 t sdma_v6_0_sw_init -ffffffff820c2330 t sdma_v6_0_sw_fini -ffffffff820c23d0 t sdma_v6_0_hw_init -ffffffff820c23e0 t sdma_v6_0_hw_fini -ffffffff820c24d0 t sdma_v6_0_suspend -ffffffff820c2510 t sdma_v6_0_resume -ffffffff820c2520 t sdma_v6_0_is_idle -ffffffff820c25c0 t sdma_v6_0_wait_for_idle -ffffffff820c26a0 t sdma_v6_0_check_soft_reset -ffffffff820c2770 t sdma_v6_0_soft_reset -ffffffff820c2cc0 t sdma_v6_0_set_clockgating_state -ffffffff820c2cf0 t sdma_v6_0_set_powergating_state -ffffffff820c2d20 t sdma_v6_0_get_clockgating_state -ffffffff820c2d50 t sdma_v6_0_ring_get_rptr -ffffffff820c2db0 t sdma_v6_0_ring_get_wptr -ffffffff820c2e30 t sdma_v6_0_ring_set_wptr -ffffffff820c31e0 t sdma_v6_0_ring_emit_ib -ffffffff820c34e0 t sdma_v6_0_ring_emit_fence -ffffffff820c3990 t sdma_v6_0_ring_emit_pipeline_sync -ffffffff820c3c40 t sdma_v6_0_ring_emit_vm_flush -ffffffff820c3ee0 t sdma_v6_0_ring_emit_hdp_flush -ffffffff820c41b0 t sdma_v6_0_ring_test_ring -ffffffff820c45e0 t sdma_v6_0_ring_test_ib -ffffffff820c4970 t sdma_v6_0_ring_insert_nop -ffffffff820c4ab0 t sdma_v6_0_ring_pad_ib -ffffffff820c4be0 t sdma_v6_0_ring_init_cond_exec -ffffffff820c4e30 t sdma_v6_0_ring_patch_cond_exec -ffffffff820c4ef0 t sdma_v6_0_ring_emit_wreg -ffffffff820c5050 t sdma_v6_0_ring_emit_reg_wait -ffffffff820c52f0 t sdma_v6_0_ring_emit_reg_write_reg_wait -ffffffff820c5380 t sdma_v6_0_ring_preempt_ib -ffffffff820c5510 t sdma_v6_0_ring_emit_mem_sync -ffffffff820c5740 t sdma_v6_0_emit_copy_buffer -ffffffff820c5800 t sdma_v6_0_emit_fill_buffer -ffffffff820c5890 t sdma_v6_0_vm_copy_pte -ffffffff820c5950 t sdma_v6_0_vm_write_pte -ffffffff820c5a20 t sdma_v6_0_vm_set_pte_pde -ffffffff820c5b20 t sdma_v6_0_set_trap_irq_state -ffffffff820c5bc0 t sdma_v6_0_process_trap_irq -ffffffff820c5d20 t sdma_v6_0_process_illegal_inst_irq -ffffffff820c5d50 t sdma_v6_0_mqd_init -ffffffff820c5e80 t sdma_v6_0_start -ffffffff820c61e0 t sdma_v6_0_enable -ffffffff820c6380 t sdma_v6_0_gfx_resume -ffffffff820c75c0 t sdma_v6_0_gfx_stop -ffffffff820c8000 T sienna_cichlid_reset_init -ffffffff820c80e0 t sienna_cichlid_async_reset -ffffffff820c8140 t sienna_cichlid_get_reset_handler -ffffffff820c81d0 T sienna_cichlid_reset_fini -ffffffff820c8230 t sienna_cichlid_mode2_prepare_hwcontext -ffffffff820c83a0 t sienna_cichlid_mode2_perform_reset -ffffffff820c8430 t sienna_cichlid_mode2_restore_hwcontext -ffffffff820c87a0 t sienna_cichlid_mode2_reset -ffffffff820c9000 T smu_v11_0_i2c_control_init -ffffffff820c90e0 T smu_v11_0_i2c_control_fini -ffffffff820c9120 t smu_v11_0_i2c_xfer -ffffffff820ca490 t smu_v11_0_i2c_func -ffffffff820ca4c0 t smu_v11_0_i2c_enable -ffffffff820ca620 t smu_v11_0_i2c_abort -ffffffff820ca740 t lock_bus -ffffffff820ca7f0 t trylock_bus -ffffffff820ca850 t unlock_bus -ffffffff820cb000 T smu_v13_0_10_reset_init -ffffffff820cb0e0 t smu_v13_0_10_async_reset -ffffffff820cb140 t smu_v13_0_10_get_reset_handler -ffffffff820cb1f0 T smu_v13_0_10_reset_fini -ffffffff820cb250 t smu_v13_0_10_mode2_prepare_hwcontext -ffffffff820cb3a0 t smu_v13_0_10_mode2_perform_reset -ffffffff820cb430 t smu_v13_0_10_mode2_restore_hwcontext -ffffffff820cb820 t smu_v13_0_10_mode2_reset -ffffffff820cc000 t smuio_v11_0_get_rom_index_offset -ffffffff820cc040 t smuio_v11_0_get_rom_data_offset -ffffffff820cc080 t smuio_v11_0_update_rom_clock_gating -ffffffff820cc1d0 t smuio_v11_0_get_clock_gating_state -ffffffff820cd000 t smuio_v11_0_6_get_rom_index_offset -ffffffff820cd040 t smuio_v11_0_6_get_rom_data_offset -ffffffff820cd080 t smuio_v11_0_6_update_rom_clock_gating -ffffffff820cd1e0 t smuio_v11_0_6_get_clock_gating_state -ffffffff820ce000 t smuio_v13_0_get_rom_index_offset -ffffffff820ce040 t smuio_v13_0_get_rom_data_offset -ffffffff820ce080 t smuio_v13_0_update_rom_clock_gating -ffffffff820ce1e0 t smuio_v13_0_get_clock_gating_state -ffffffff820ce290 t smuio_v13_0_get_die_id -ffffffff820ce320 t smuio_v13_0_get_socket_id -ffffffff820ce3c0 t smuio_v13_0_is_host_gpu_xgmi_supported -ffffffff820cf000 t smuio_v13_0_3_get_die_id -ffffffff820cf0a0 t smuio_v13_0_3_get_socket_id -ffffffff820cf140 t smuio_v13_0_3_get_pkg_type -ffffffff820d0000 t smuio_v13_0_6_get_rom_index_offset -ffffffff820d0040 t smuio_v13_0_6_get_rom_data_offset -ffffffff820d1000 t smuio_v9_0_get_rom_index_offset -ffffffff820d1040 t smuio_v9_0_get_rom_data_offset -ffffffff820d1080 t smuio_v9_0_update_rom_clock_gating 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bridge_rtdaddr +ffffffff814400e0 T bridge_addrule +ffffffff81440270 T bridge_flushrule +ffffffff814403b0 T bridge_brlconf +ffffffff81440780 T bridge_tunnel +ffffffff814407d0 T bridge_hash +ffffffff81440830 T bridge_copytag +ffffffff81440920 T bridge_rtlookup +ffffffff81440b30 T bridge_tunneltag +ffffffff81440c20 T bridge_rtage +ffffffff81440d60 T bridge_rtagenode +ffffffff81440ed0 T bridge_rtdelete +ffffffff81440fd0 T bridge_copyaddr +ffffffff81441020 T bridge_update +ffffffff81441120 T bridge_arpfilter +ffffffff814412f0 T bridge_filterrule +ffffffff81441430 T bridge_tunneluntag +ffffffff81442000 T bstp_transmit +ffffffff81442160 T bstp_hello_timer_expiry +ffffffff814421d0 T bstp_transmit_bpdu +ffffffff814423b0 T bstp_transmit_tcn +ffffffff81442510 T bstp_timer_start +ffffffff81442550 T bstp_pdu_flags +ffffffff81442620 T bstp_send_bpdu +ffffffff814427b0 T bstp_decode_bpdu +ffffffff814428b0 T bstp_input +ffffffff81442a50 T bstp_set_port_proto +ffffffff81442ac0 T bstp_received_stp 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noise_local_init +ffffffff8149b0f0 T noise_local_lock_identity +ffffffff8149b100 T noise_local_unlock_identity +ffffffff8149b110 T noise_local_set_private +ffffffff8149b1c0 T noise_local_keys +ffffffff8149b290 T noise_remote_init +ffffffff8149b3b0 T noise_remote_precompute +ffffffff8149b4a0 T noise_remote_set_psk +ffffffff8149b560 T noise_remote_keys +ffffffff8149b650 t noise_remote_handshake_index_drop +ffffffff8149b6c0 T noise_create_initiation +ffffffff8149baf0 t noise_param_init +ffffffff8149bcb0 t noise_msg_ephemeral +ffffffff8149be20 T noise_consume_initiation +ffffffff8149c4c0 t noise_timer_expired +ffffffff8149c570 T noise_create_response +ffffffff8149ca70 T noise_consume_response +ffffffff8149d150 T noise_remote_begin_session +ffffffff8149d770 t noise_kdf +ffffffff8149d9d0 T noise_remote_clear +ffffffff8149dc30 T noise_remote_expire_current +ffffffff8149dc90 T noise_remote_ready +ffffffff8149dda0 T noise_remote_encrypt +ffffffff8149df50 T noise_remote_decrypt +ffffffff8149f000 T cookie_maker_init +ffffffff8149f180 T cookie_checker_init +ffffffff8149f310 t ratelimit_deinit +ffffffff8149f3f0 T cookie_checker_update +ffffffff8149f5c0 T cookie_checker_deinit +ffffffff8149f600 T cookie_checker_create_payload +ffffffff8149f700 t cookie_checker_make_cookie +ffffffff8149f8d0 T cookie_maker_consume_payload +ffffffff8149f9c0 T cookie_maker_mac +ffffffff8149fba0 T cookie_checker_validate_macs +ffffffff8149fdf0 t ratelimit_allow +ffffffff814a1000 T parity +ffffffff814a1050 T stoeplitz_random_seed +ffffffff814a10d0 T stoeplitz_init +ffffffff814a1260 T stoeplitz_cache_init +ffffffff814a1370 T stoeplitz_hash_ip4 +ffffffff814a13c0 T stoeplitz_hash_ip4port +ffffffff814a1420 T stoeplitz_hash_ip6 +ffffffff814a1480 T stoeplitz_hash_ip6port +ffffffff814a14f0 T stoeplitz_hash_eaddr +ffffffff814a1540 T stoeplitz_to_key +ffffffff814a2000 T ieee80211_begin_bgscan +ffffffff814a20e0 T ieee80211_bgscan_timeout +ffffffff814a21c0 T ieee80211_channel_init +ffffffff814a23c0 T ieee80211_chan2ieee +ffffffff814a2440 T ieee80211_ifattach +ffffffff814a2660 T ieee80211_setbasicrates +ffffffff814a2750 T ieee80211_setmode +ffffffff814a2a30 T ieee80211_ifdetach +ffffffff814a2ae0 T ieee80211_mhz2ieee +ffffffff814a2b70 T ieee80211_ieee2mhz +ffffffff814a2be0 T ieee80211_configure_ampdu_tx +ffffffff814a2c40 T ieee80211_media_init +ffffffff814a3770 T ieee80211_rate2media +ffffffff814a3b40 T ieee80211_media_status +ffffffff814a3d50 T ieee80211_findrate +ffffffff814a3dc0 T ieee80211_media_change +ffffffff814a4370 T ieee80211_media2mcs +ffffffff814a43d0 T ieee80211_media2rate +ffffffff814a4420 T ieee80211_mcs2media +ffffffff814a44b0 T ieee80211_watchdog +ffffffff814a45f0 T ieee80211_min_basic_rate +ffffffff814a46f0 T ieee80211_max_basic_rate +ffffffff814a47d0 T ieee80211_next_mode +ffffffff814a48d0 T ieee80211_chan2mode +ffffffff814a4960 T ieee80211_rate2plcp +ffffffff814a4a70 T ieee80211_plcp2rate +ffffffff814a5000 T ieee80211_amrr_node_init +ffffffff814a5040 T ieee80211_amrr_choose +ffffffff814a6000 T ieee80211_crypto_attach +ffffffff814a6090 T ieee80211_set_key +ffffffff814a6150 T ieee80211_delete_key +ffffffff814a61f0 T ieee80211_crypto_detach +ffffffff814a62e0 T ieee80211_crypto_clear_groupkeys +ffffffff814a6450 T ieee80211_cipher_keylen +ffffffff814a64b0 T ieee80211_get_txkey +ffffffff814a6530 T ieee80211_get_rxkey +ffffffff814a6610 T ieee80211_encrypt +ffffffff814a66a0 T ieee80211_decrypt +ffffffff814a6820 T ieee80211_prf +ffffffff814a6980 T ieee80211_kdf +ffffffff814a6b10 T ieee80211_derive_ptk +ffffffff814a6ca0 T ieee80211_derive_pmkid +ffffffff814a6e10 T ieee80211_eapol_key_mic +ffffffff814a6fa0 T ieee80211_eapol_key_check_mic +ffffffff814a7030 T ieee80211_eapol_key_encrypt +ffffffff814a7210 T ieee80211_eapol_key_decrypt +ffffffff814a7350 T ieee80211_pmksa_add +ffffffff814a74c0 T ieee80211_pmksa_find +ffffffff814a8000 T ieee80211_bip_set_key +ffffffff814a8090 T ieee80211_bip_delete_key +ffffffff814a8110 T ieee80211_bip_encap +ffffffff814a8360 T ieee80211_bip_decap +ffffffff814a9000 T ieee80211_ccmp_set_key +ffffffff814a9090 T ieee80211_ccmp_delete_key +ffffffff814a9110 T ieee80211_ccmp_encrypt +ffffffff814a9680 t ieee80211_ccmp_phase1 +ffffffff814a9a20 T ieee80211_ccmp_get_pn +ffffffff814a9b40 T ieee80211_ccmp_decrypt +ffffffff814ab000 T ieee80211_tkip_set_key +ffffffff814ab0a0 T ieee80211_tkip_delete_key +ffffffff814ab120 T ieee80211_tkip_mic +ffffffff814ab2e0 T ieee80211_tkip_encrypt +ffffffff814ab800 t Phase1 +ffffffff814ab990 t Phase2 +ffffffff814abbd0 T ieee80211_tkip_get_tsc +ffffffff814abce0 T ieee80211_tkip_decrypt +ffffffff814ac2b0 T ieee80211_michael_mic_failure +ffffffff814ac490 T ieee80211_michael_mic_failure_timeout +ffffffff814ac4c0 t ieee80211_tkip_deauth +ffffffff814ad000 T ieee80211_wep_set_key +ffffffff814ad070 T ieee80211_wep_delete_key +ffffffff814ad0f0 T ieee80211_wep_encrypt +ffffffff814ad560 T ieee80211_wep_decrypt +ffffffff814ae000 T ieee80211_get_hdrlen +ffffffff814ae090 T ieee80211_input_hwdecrypt +ffffffff814ae290 T ieee80211_inputm +ffffffff814aee80 T ieee80211_input_ba +ffffffff814af190 T ieee80211_amsdu_decap +ffffffff814af4b0 T ieee80211_decap +ffffffff814af660 T ieee80211_recv_pspoll +ffffffff814af7a0 T ieee80211_recv_bar +ffffffff814af890 T ieee80211_input +ffffffff814af910 T ieee80211_ba_move_window +ffffffff814afa70 T ieee80211_input_ba_seq +ffffffff814afc10 T ieee80211_input_ba_flush +ffffffff814afd40 T ieee80211_input_ba_gap_skip +ffffffff814afde0 T ieee80211_input_ba_gap_timeout +ffffffff814aff20 T ieee80211_enqueue_data +ffffffff814b0120 T ieee80211_amsdu_decap_validate +ffffffff814b01f0 T ieee80211_parse_edca_params_body +ffffffff814b0360 T ieee80211_parse_edca_params +ffffffff814b03c0 T ieee80211_parse_wmm_params +ffffffff814b0420 T ieee80211_parse_rsn_cipher +ffffffff814b04e0 T ieee80211_parse_rsn_akm +ffffffff814b05a0 T ieee80211_parse_rsn_body +ffffffff814b0860 T ieee80211_parse_rsn +ffffffff814b08b0 T ieee80211_parse_wpa +ffffffff814b0910 T ieee80211_save_ie +ffffffff814b09e0 T ieee80211_recv_probe_resp +ffffffff814b17e0 T ieee80211_recv_probe_req +ffffffff814b1ad0 T ieee80211_recv_auth +ffffffff814b1b70 T ieee80211_recv_assoc_req +ffffffff814b2580 T ieee80211_recv_assoc_resp +ffffffff814b2b90 T ieee80211_recv_deauth +ffffffff814b2d10 T ieee80211_recv_disassoc +ffffffff814b2e30 T ieee80211_recv_addba_req +ffffffff814b3220 T ieee80211_addba_req_refuse +ffffffff814b32c0 T ieee80211_addba_req_accept +ffffffff814b3350 T ieee80211_recv_addba_resp +ffffffff814b34b0 T ieee80211_addba_resp_refuse +ffffffff814b34f0 T ieee80211_addba_resp_accept +ffffffff814b3570 T ieee80211_recv_delba +ffffffff814b3720 T ieee80211_recv_sa_query_req +ffffffff814b3790 T ieee80211_recv_sa_query_resp +ffffffff814b3810 T ieee80211_recv_action +ffffffff814b3950 T ieee80211_recv_mgmt +ffffffff814b3aa0 T ieee80211_bar_tid +ffffffff814b4000 T ieee80211_node2req +ffffffff814b43c0 T ieee80211_req2node +ffffffff814b44f0 T ieee80211_disable_wep +ffffffff814b4620 T ieee80211_disable_rsn +ffffffff814b4690 T ieee80211_ioctl +ffffffff814b5d60 t ieee80211_ioctl_setnwkeys +ffffffff814b5f70 t ieee80211_ioctl_setwpaparms +ffffffff814b7000 T ieee80211_inact_timeout +ffffffff814b70d0 T ieee80211_node_cache_timeout +ffffffff814b7110 T ieee80211_clean_nodes +ffffffff814b7470 T ieee80211_print_ess +ffffffff814b76c0 T ieee80211_print_ess_list +ffffffff814b7750 T ieee80211_get_ess +ffffffff814b77f0 T ieee80211_del_ess +ffffffff814b7960 T ieee80211_add_ess +ffffffff814b80c0 T ieee80211_ess_adjust_rssi +ffffffff814b8130 T ieee80211_ess_calculate_score +ffffffff814b82a0 T ieee80211_ess_is_better +ffffffff814b8420 T ieee80211_match_ess +ffffffff814b8520 T ieee80211_switch_ess +ffffffff814b8820 T ieee80211_set_ess +ffffffff814b8b40 T ieee80211_deselect_ess +ffffffff814b8bb0 T ieee80211_node_attach +ffffffff814b8dc0 T ieee80211_node_alloc +ffffffff814b8de0 T ieee80211_node_free +ffffffff814b8eb0 T ieee80211_node_copy +ffffffff814b90c0 T ieee80211_node_getrssi +ffffffff814b90f0 T ieee80211_node_checkrssi +ffffffff814b9180 T ieee80211_set_tim +ffffffff814b91f0 T ieee80211_alloc_node_helper +ffffffff814b9270 T ieee80211_node_lateattach +ffffffff814b9350 T ieee80211_node_detach +ffffffff814b9510 T ieee80211_free_allnodes +ffffffff814b9680 T ieee80211_reset_scan +ffffffff814b9710 T ieee80211_node_raise_inact +ffffffff814b9750 T ieee80211_begin_scan +ffffffff814b9950 T ieee80211_node_cleanup +ffffffff814b9a30 T ieee80211_iterate_nodes +ffffffff814b9ae0 T ieee80211_next_scan +ffffffff814b9c30 T ieee80211_end_scan +ffffffff814ba220 T ieee80211_create_ibss +ffffffff814ba760 T ieee80211_match_bss +ffffffff814bac10 T ieee80211_node_free_unref_cb +ffffffff814bac90 T ieee80211_node_tx_stopped +ffffffff814badb0 T ieee80211_node_switch_bss +ffffffff814bb0f0 T ieee80211_node_tx_flushed +ffffffff814bb280 T ieee80211_find_node +ffffffff814bb350 T ieee80211_node_join_bss +ffffffff814bb580 T ieee80211_choose_rsnparams +ffffffff814bb6c0 T ieee80211_node_choose_bss +ffffffff814bb8e0 T ieee80211_free_node +ffffffff814bba10 T ieee80211_node_cmp +ffffffff814bba30 T ieee80211_clean_inactive_nodes +ffffffff814bbb10 T ieee80211_get_rate +ffffffff814bbb70 T ieee80211_ba_del +ffffffff814bbc90 T ieee80211_node_set_timeouts +ffffffff814bbdc0 T ieee80211_node_addba_request_ac_be_to +ffffffff814bbde0 T ieee80211_node_addba_request_ac_bk_to +ffffffff814bbe10 T ieee80211_node_addba_request_ac_vi_to +ffffffff814bbe40 T ieee80211_node_addba_request_ac_vo_to +ffffffff814bbe70 T ieee80211_setup_node +ffffffff814bc050 T ieee80211_alloc_node +ffffffff814bc110 T ieee80211_dup_bss +ffffffff814bc200 T ieee80211_find_txnode +ffffffff814bc460 T ieee80211_find_rxnode +ffffffff814bc7f0 T ieee80211_node_tx_ba_clear +ffffffff814bc870 T ieee80211_release_node +ffffffff814bc920 T ieee80211_clean_cached +ffffffff814bc9e0 T ieee80211_node_leave +ffffffff814bcc60 T ieee80211_setup_htcaps +ffffffff814bcd10 T ieee80211_clear_htcaps +ffffffff814bcd90 T ieee80211_40mhz_valid_secondary_above +ffffffff814bce20 T ieee80211_40mhz_valid_secondary_below +ffffffff814bcea0 T ieee80211_40mhz_center_freq_valid +ffffffff814bcf00 T ieee80211_setup_htop +ffffffff814bcff0 T ieee80211_setup_vhtcaps +ffffffff814bd070 T ieee80211_80mhz_center_freq_valid +ffffffff814bd0e0 T ieee80211_setup_vhtop +ffffffff814bd1e0 T ieee80211_clear_vhtcaps +ffffffff814bd230 T ieee80211_setup_rates +ffffffff814bd310 T ieee80211_node_trigger_addba_req +ffffffff814bd370 T ieee80211_node_addba_request +ffffffff814bd3a0 T ieee80211_iserp_sta +ffffffff814bd560 T ieee80211_needs_auth +ffffffff814bd590 T ieee80211_node_join_ht +ffffffff814bd5e0 T ieee80211_node_join_rsn +ffffffff814bd700 T ieee80211_count_longslotsta +ffffffff814bd750 T ieee80211_count_nonerpsta +ffffffff814bd7b0 T ieee80211_count_pssta +ffffffff814bd800 T ieee80211_count_rekeysta +ffffffff814bd850 T ieee80211_node_join_11g +ffffffff814bda50 T ieee80211_node_join +ffffffff814bdd80 T ieee80211_node_leave_ht +ffffffff814bdec0 T ieee80211_node_leave_vht +ffffffff814bdf10 T ieee80211_node_leave_rsn +ffffffff814be080 T ieee80211_node_leave_11g +ffffffff814be2c0 T ieee80211_node_leave_pwrsave +ffffffff814be4e0 T ieee80211_ibss_merge +ffffffff814be890 T ieee80211_notify_dtim +ffffffff814be990 T ieee80211_ess_cmp +ffffffff814be9b0 t ieee80211_tree_RBT_COMPARE +ffffffff814be9d0 t ieee80211_ess_tree_RBT_COMPARE +ffffffff814bf000 T ieee80211_output +ffffffff814bf100 T ieee80211_action_name +ffffffff814bf150 T ieee80211_mgmt_output +ffffffff814bf400 T ieee80211_pwrsave +ffffffff814bf550 T ieee80211_up_to_ac +ffffffff814bf610 T ieee80211_classify +ffffffff814bf720 T ieee80211_can_use_ampdu +ffffffff814bf780 T ieee80211_tx_compressed_bar +ffffffff814bf8e0 T ieee80211_get_compressed_bar +ffffffff814bf9d0 T ieee80211_encap +ffffffff814bfec0 T ieee80211_add_capinfo +ffffffff814bff50 T ieee80211_add_ssid +ffffffff814bffc0 T ieee80211_add_rates +ffffffff814c0040 T ieee80211_add_ds_params +ffffffff814c00a0 T ieee80211_add_tim +ffffffff814c01f0 T ieee80211_add_ibss_params +ffffffff814c0220 T ieee80211_add_edca_params +ffffffff814c03b0 T ieee80211_add_erp +ffffffff814c0460 T ieee80211_add_qos_capability +ffffffff814c04a0 T ieee80211_add_wme_info +ffffffff814c04e0 T ieee80211_add_wme_param +ffffffff814c0680 T ieee80211_add_rsn_body +ffffffff814c09a0 T ieee80211_add_rsn +ffffffff814c0a10 T ieee80211_add_wpa +ffffffff814c0a80 T ieee80211_add_xrates +ffffffff814c0b10 T ieee80211_add_htcaps +ffffffff814c0bf0 T ieee80211_add_htop +ffffffff814c0cd0 T ieee80211_add_vhtcaps +ffffffff814c0d80 T ieee80211_add_tie +ffffffff814c0dd0 T ieee80211_getmgmt +ffffffff814c0ea0 T ieee80211_get_probe_req +ffffffff814c12e0 T ieee80211_get_probe_resp +ffffffff814c1900 T ieee80211_get_auth +ffffffff814c19a0 T ieee80211_get_deauth +ffffffff814c1a30 T ieee80211_get_assoc_req +ffffffff814c1f70 T ieee80211_get_assoc_resp +ffffffff814c23a0 T ieee80211_get_disassoc +ffffffff814c2430 T ieee80211_get_addba_req +ffffffff814c2540 T ieee80211_output_ba_move_window +ffffffff814c2640 T ieee80211_output_ba_move_window_to_first_unacked +ffffffff814c2810 T ieee80211_output_ba_record_ack +ffffffff814c2940 T ieee80211_get_addba_resp +ffffffff814c2a50 T ieee80211_get_delba +ffffffff814c2af0 T ieee80211_get_sa_query +ffffffff814c2b90 T ieee80211_get_action +ffffffff814c2e50 T ieee80211_send_mgmt +ffffffff814c3280 T ieee80211_get_rts +ffffffff814c3320 T ieee80211_get_cts_to_self +ffffffff814c33b0 T ieee80211_beacon_alloc +ffffffff814c4000 T ieee80211_eapol_key_input +ffffffff814c4270 T ieee80211_recv_eapol_key_req +ffffffff814c43d0 T ieee80211_recv_4way_msg3 +ffffffff814c4e50 T ieee80211_recv_4way_msg2or4 +ffffffff814c4fb0 T ieee80211_recv_4way_msg1 +ffffffff814c52c0 T ieee80211_recv_wpa_group_msg1 +ffffffff814c5620 T ieee80211_recv_rsn_group_msg1 +ffffffff814c5bb0 T ieee80211_recv_group_msg2 +ffffffff814c5d30 T ieee80211_recv_4way_msg2 +ffffffff814c5f70 T ieee80211_must_update_group_key +ffffffff814c5fe0 T ieee80211_recv_4way_msg4 +ffffffff814c7000 T ieee80211_send_eapol_key +ffffffff814c7210 T ieee80211_eapol_timeout +ffffffff814c72a0 T ieee80211_send_4way_msg1 +ffffffff814c75b0 T ieee80211_send_4way_msg3 +ffffffff814c7b70 T ieee80211_send_group_msg1 +ffffffff814c80f0 T ieee80211_add_gtk_kde +ffffffff814c81b0 T ieee80211_add_pmkid_kde +ffffffff814c8200 T ieee80211_add_igtk_kde +ffffffff814c82d0 T ieee80211_get_eapol_key +ffffffff814c83a0 T ieee80211_send_4way_msg2 +ffffffff814c8600 T ieee80211_send_4way_msg4 +ffffffff814c8800 T ieee80211_send_group_msg2 +ffffffff814c8a00 T ieee80211_send_eapol_key_req +ffffffff814c9000 T ieee80211_proto_attach +ffffffff814c90c0 T ieee80211_newstate +ffffffff814c9f40 T ieee80211_proto_detach +ffffffff814c9f80 T ieee80211_print_essid +ffffffff814ca120 T ieee80211_fix_rate +ffffffff814ca420 T ieee80211_reset_erp +ffffffff814ca550 T ieee80211_set_shortslottime +ffffffff814ca5b0 T ieee80211_keyrun +ffffffff814ca730 T ieee80211_setkeys +ffffffff814ca9c0 t ieee80211_node_gtk_rekey +ffffffff814caa30 T ieee80211_setkeysdone +ffffffff814cab40 T ieee80211_gtk_rekey_timeout +ffffffff814cabb0 T ieee80211_sa_query_timeout +ffffffff814cac90 T ieee80211_sa_query_request +ffffffff814cad20 T ieee80211_ht_negotiate +ffffffff814caef0 T ieee80211_vht_negotiate +ffffffff814cb110 T ieee80211_tx_ba_timeout +ffffffff814cb240 T ieee80211_delba_request +ffffffff814cb3d0 T ieee80211_rx_ba_timeout +ffffffff814cb470 T ieee80211_addba_request +ffffffff814cb670 T ieee80211_auth_open_confirm +ffffffff814cb740 T ieee80211_try_another_bss +ffffffff814cb880 T ieee80211_auth_open +ffffffff814cbbd0 T ieee80211_set_beacon_miss_threshold +ffffffff814cbc60 T ieee80211_stop_ampdu_tx +ffffffff814cbd80 T ieee80211_check_wpa_supplicant_failure +ffffffff814cbe00 T ieee80211_set_link_state +ffffffff814cbe90 T ieee80211_rtm_80211info_task +ffffffff814cc000 T ieee80211_ra_get_ht_rateset +ffffffff814cc090 T ieee80211_ra_use_ht_sgi +ffffffff814cc110 T ieee80211_ra_get_txrate +ffffffff814cc1b0 T ieee80211_ra_next_lower_intra_rate +ffffffff814cc340 T ieee80211_ra_next_intra_rate +ffffffff814cc4c0 T ieee80211_ra_next_rateset +ffffffff814cc6d0 T ieee80211_ra_best_mcs_in_rateset +ffffffff814cc750 T ieee80211_ra_probe_next_rateset +ffffffff814cca20 T ieee80211_ra_next_mcs +ffffffff814cca70 T ieee80211_ra_probe_clear +ffffffff814ccab0 T ieee80211_ra_probe_done +ffffffff814ccaf0 T ieee80211_ra_intra_mode_ra_finished +ffffffff814ccea0 T ieee80211_ra_trigger_next_rateset +ffffffff814ccf20 T ieee80211_ra_inter_mode_ra_finished +ffffffff814ccf50 T ieee80211_ra_best_rate +ffffffff814ccff0 T ieee80211_ra_probe_next_rate +ffffffff814cd0a0 T ieee80211_ra_valid_tx_mcs +ffffffff814cd120 T ieee80211_ra_valid_rates +ffffffff814cd1f0 T ieee80211_ra_probe_valid +ffffffff814cd240 T ieee80211_ra_add_stats_ht +ffffffff814cd4d0 T ieee80211_ra_choose +ffffffff814cd950 T ieee80211_ra_node_init +ffffffff814ce000 T ieee80211_ra_vht_get_rateset +ffffffff814ce0b0 T ieee80211_ra_vht_use_sgi +ffffffff814ce1a0 T ieee80211_ra_vht_get_txrate +ffffffff814ce250 T ieee80211_ra_vht_next_lower_intra_rate +ffffffff814ce290 T ieee80211_ra_vht_get_max_mcs +ffffffff814ce320 T ieee80211_ra_vht_next_intra_rate +ffffffff814ce410 T ieee80211_ra_vht_next_rateset +ffffffff814ce610 T ieee80211_ra_vht_best_mcs_in_rateset +ffffffff814ce6b0 T ieee80211_ra_vht_probe_next_rateset +ffffffff814cea50 T ieee80211_ra_vht_next_mcs +ffffffff814ceae0 T ieee80211_ra_vht_probe_clear +ffffffff814ceb10 T ieee80211_ra_vht_probe_done +ffffffff814ceb60 T ieee80211_ra_vht_intra_mode_ra_finished +ffffffff814cf020 T ieee80211_ra_vht_trigger_next_rateset +ffffffff814cf0a0 T ieee80211_ra_vht_inter_mode_ra_finished +ffffffff814cf0d0 T ieee80211_ra_vht_best_rate +ffffffff814cf440 T ieee80211_ra_vht_probe_next_rate +ffffffff814cf500 T ieee80211_ra_vht_init_valid_rates +ffffffff814cf710 T ieee80211_ra_vht_probe_valid +ffffffff814cf760 T ieee80211_ra_vht_add_stats +ffffffff814cfbb0 T ieee80211_ra_vht_choose +ffffffff814d00c0 T ieee80211_ra_vht_node_init +ffffffff814d1000 T ieee80211_rssadapt_choose +ffffffff814d10e0 T ieee80211_rssadapt_updatestats +ffffffff814d1170 T ieee80211_rssadapt_input +ffffffff814d11b0 T ieee80211_rssadapt_lower_rate +ffffffff814d1230 T ieee80211_rssadapt_raise_rate +ffffffff814d2000 T bsearch +ffffffff814d20c0 T ieee80211_regdomain_compare_cn +ffffffff814d20e0 T ieee80211_regdomain_compare_rn +ffffffff814d2100 T ieee80211_name2countrycode +ffffffff814d21b0 T ieee80211_name2regdomain +ffffffff814d2260 T ieee80211_countrycode2name +ffffffff814d22f0 T ieee80211_regdomain2name +ffffffff814d2370 T ieee80211_regdomain2flag +ffffffff814d2430 T ieee80211_countrycode2regdomain +ffffffff814d3000 T arptimer +ffffffff814d3090 T arptfree +ffffffff814d31a0 T arpinit +ffffffff814d3230 T arp_rtrequest +ffffffff814d3700 T arprequest +ffffffff814d3850 T arpinvalidate +ffffffff814d38c0 T arpreply +ffffffff814d39c0 T arpresolve +ffffffff814d3f00 T arppullup +ffffffff814d3fc0 T arpinput +ffffffff814d4020 T arpintr +ffffffff814d4100 T in_arpinput +ffffffff814d4600 T arplookup +ffffffff814d4700 T arpcache +ffffffff814d4b40 T arpproxy +ffffffff814d4c50 T revarpinput +ffffffff814d4cb0 T in_revarpinput +ffffffff814d4d80 T revarprequest +ffffffff814d4ed0 T revarpwhoarewe +ffffffff814d50e0 T revarpwhoami +ffffffff814d6000 T igmp_init +ffffffff814d60a0 T rti_fill +ffffffff814d6170 T rti_find +ffffffff814d6270 T rti_delete +ffffffff814d6300 T igmp_input +ffffffff814d6410 T igmp_input_if +ffffffff814d6c10 T igmp_joingroup +ffffffff814d6d60 T igmp_sendpkt +ffffffff814d6f00 T igmp_leavegroup +ffffffff814d6f80 T igmp_fasttimo +ffffffff814d7030 T igmp_checktimer +ffffffff814d7130 T igmp_slowtimo +ffffffff814d71a0 T igmp_sysctl +ffffffff814d72c0 T igmp_sysctl_igmpstat +ffffffff814d8000 T in_canforward +ffffffff814d8060 T in_socktrim +ffffffff814d80c0 T in_mask2len +ffffffff814d81b0 T in_len2mask +ffffffff814d8270 T in_nam2sin +ffffffff814d82d0 T in_sa2sin +ffffffff814d8310 T in_control +ffffffff814d8350 T in_ioctl +ffffffff814d86f0 T in_ioctl_get +ffffffff814d8870 T in_ioctl_set_ifaddr +ffffffff814d8ab0 T in_ioctl_change_ifaddr +ffffffff814d8f00 T in_scrubhost +ffffffff814d8f30 T in_addhost +ffffffff814d8f60 T in_ifscrub +ffffffff814d9010 T in_ifinit +ffffffff814d9300 T in_purgeaddr +ffffffff814d9440 T in_remove_prefix +ffffffff814d94c0 T in_insert_prefix +ffffffff814d9550 T in_addmulti +ffffffff814d9740 T in_delmulti +ffffffff814d98d0 T in_broadcast +ffffffff814d9970 T in_hasmulti +ffffffff814d9a20 T in_ifdetach +ffffffff814d9ac0 T in_prefixlen2mask +ffffffff814da000 T in_init +ffffffff814da060 T in_pcbhash +ffffffff814da1b0 T in_pcblhash +ffffffff814da270 T in_pcbinit +ffffffff814da350 T in_baddynamic +ffffffff814da3c0 T in_rootonly +ffffffff814da440 T in_pcballoc +ffffffff814da5f0 T in_pcbresize +ffffffff814da7f0 T in_pcbhash_insert +ffffffff814da9e0 T in_pcbbind_locked +ffffffff814dad20 T in_pcbaddrisavail_lock +ffffffff814dafa0 T in_pcbpickport +ffffffff814db200 T in_pcbrehash +ffffffff814db270 T in_pcbbind +ffffffff814db310 T in_pcblookup_local_lock +ffffffff814db710 T in_pcbunref +ffffffff814db800 T in_pcbaddrisavail +ffffffff814db820 T in_pcbconnect +ffffffff814dba80 T in_pcbselsrc +ffffffff814dbca0 T in_pcblookup_lock +ffffffff814dbea0 T in_pcbdisconnect +ffffffff814dbf20 T in_pcbdetach +ffffffff814dc0b0 T in_pcbref +ffffffff814dc100 T in_setsockaddr +ffffffff814dc170 T in_setpeeraddr +ffffffff814dc1e0 T in_sockaddr +ffffffff814dc260 T in_peeraddr +ffffffff814dc2e0 T in_pcbnotifyall +ffffffff814dc4a0 T in_losing +ffffffff814dc540 T in_rtchange +ffffffff814dc590 T in_pcbrtentry +ffffffff814dc600 T in_pcbhash_lookup +ffffffff814dc7a0 T in_pcblookup +ffffffff814dc7f0 T in_pcblookup_listen +ffffffff814dca70 T in_pcbset_rtableid +ffffffff814dcb70 T in_pcbset_laddr +ffffffff814dccc0 T in_pcbunset_faddr +ffffffff814dcda0 T in_pcbunset_laddr +ffffffff814dd000 T inet_nat64_mask +ffffffff814dd060 T inet_nat64 +ffffffff814dd200 T inet_nat64_inet +ffffffff814dd2c0 T inet_nat64_inet6 +ffffffff814dd3a0 T inet_nat46 +ffffffff814dd450 T inet_nat46_inet +ffffffff814dd4b0 T inet_nat46_inet6 +ffffffff814de000 T inet_ntop +ffffffff814de0e0 t inet_ntop6 +ffffffff814de670 T sockaddr_ntop +ffffffff814df000 T divert_attach +ffffffff814df0a0 T divert_detach +ffffffff814df100 T divert_bind +ffffffff814df150 T divert_shutdown +ffffffff814df1b0 T divert_send +ffffffff814df200 T divert_init +ffffffff814df270 T divert_output +ffffffff814df510 T divert_packet +ffffffff814df810 T divert_sysctl_divstat +ffffffff814df8d0 T divert_sysctl +ffffffff814e0000 T icmp_init +ffffffff814e0090 T icmp_mtudisc_timeout +ffffffff814e01b0 T icmp_do_error +ffffffff814e0520 T icmp_ratelimit +ffffffff814e0580 T icmp_error +ffffffff814e0620 T icmp_reflect +ffffffff814e09b0 T icmp_send +ffffffff814e0aa0 T icmp_input +ffffffff814e0b60 T icmp_input_if +ffffffff814e14d0 T iptime +ffffffff814e1570 T icmp_sysctl +ffffffff814e1770 T icmp_sysctl_icmpstat +ffffffff814e1880 T icmp_mtudisc_clone +ffffffff814e1a70 T icmp_mtudisc +ffffffff814e1c60 T icmp_do_exthdr +ffffffff814e2000 T ip_randomid +ffffffff814e3000 T ip_init +ffffffff814e32f0 T ip_ours +ffffffff814e3440 T ip_fragcheck +ffffffff814e37b0 T ip_deliver +ffffffff814e3b80 T ipintr +ffffffff814e3cd0 T ipv4_input +ffffffff814e3d50 T ip_input_if +ffffffff814e4280 T ipv4_check +ffffffff814e4590 T ip_dooptions +ffffffff814e4c50 T in_ouraddr +ffffffff814e4f20 T ip_forward +ffffffff814e53d0 T ip_flush +ffffffff814e54f0 T ip_reass +ffffffff814e5b40 T ip_freef +ffffffff814e5c60 t carp_strict_addr_chk +ffffffff814e5ce0 T ip_slowtimo +ffffffff814e5d70 T save_rte +ffffffff814e5e60 T ip_srcroute +ffffffff814e5fe0 T ip_stripoptions +ffffffff814e6080 T ip_sysctl +ffffffff814e6510 T ip_sysctl_ipstat +ffffffff814e6790 T ip_savecontrol +ffffffff814e6a10 T ip_send_do_dispatch +ffffffff814e6b40 T ip_send +ffffffff814e6b90 T ip_send_raw +ffffffff814e6be0 t ip_send_dispatch +ffffffff814e6c00 t ip_sendraw_dispatch +ffffffff814e7000 T mfc_find +ffffffff814e70e0 T ip_mrouter_set +ffffffff814e7260 T ip_mrouter_init +ffffffff814e72e0 T ip_mrouter_done +ffffffff814e7560 T add_vif +ffffffff814e77a0 T del_vif +ffffffff814e7920 T add_mfc +ffffffff814e7af0 T del_mfc +ffffffff814e7cd0 T set_api_config +ffffffff814e7d70 T ip_mrouter_get +ffffffff814e7e20 T get_version +ffffffff814e7e60 T get_api_support +ffffffff814e7eb0 T get_api_config +ffffffff814e7f00 T mrt_ioctl +ffffffff814e8070 T get_vif_cnt +ffffffff814e8100 T get_sg_cnt +ffffffff814e8250 T if_lookupbyvif +ffffffff814e82b0 T mrt_sysctl_vif +ffffffff814e8430 T mrt_rtwalk_mfcsysctl +ffffffff814e8580 T mrt_sysctl_mfc +ffffffff814e86f0 T mrouter_rtwalk_delete +ffffffff814e8730 T mrt_mcast_del +ffffffff814e87f0 T vif_delete +ffffffff814e88c0 T mfc_expire_route +ffffffff814e89d0 T mfc_add_route +ffffffff814e8ba0 T rt_mcast_add +ffffffff814e8d00 T update_mfc_params +ffffffff814e9060 T mfc_add +ffffffff814e9170 T socket_send +ffffffff814e9250 T ip_mforward +ffffffff814e9520 T ip_mdq +ffffffff814ea000 T ip_output +ffffffff814eaad0 T ip_insertoptions +ffffffff814eac90 T ip_output_ipsec_lookup +ffffffff814eae30 T in_proto_cksum_out +ffffffff814eb110 T ip_mloopback +ffffffff814eb210 T ip_output_ipsec_send +ffffffff814eb5d0 T ip_fragment +ffffffff814eba80 T ip_output_ipsec_pmtu_update +ffffffff814ebba0 T ip_optcopy +ffffffff814ebce0 T in_hdr_cksum_out +ffffffff814ebdc0 T ip_ctloutput +ffffffff814ec670 T ip_pcbopts +ffffffff814ec8d0 T ip_setmoptions +ffffffff814ecef0 T ip_getmoptions +ffffffff814ed060 T ip_multicast_if +ffffffff814ed160 T ip_freemoptions +ffffffff814ed200 T in_ifcap_cksum +ffffffff814ed260 T in_delayed_cksum +ffffffff814ee000 T rip_attach +ffffffff814ee120 T rip_detach +ffffffff814ee1b0 T rip_bind +ffffffff814ee2c0 T rip_connect +ffffffff814ee380 T rip_disconnect +ffffffff814ee420 T rip_shutdown +ffffffff814ee480 T rip_send +ffffffff814ee590 T rip_init +ffffffff814ee5b0 T rip_input +ffffffff814eea40 T rip_output +ffffffff814eec60 T rip_chkhdr +ffffffff814eed70 T rip_ctloutput +ffffffff814ef000 T tcp_trace +ffffffff814f0000 T tcp_reass +ffffffff814f03e0 t tcpstat_pkt +ffffffff814f0440 T tcp_flush_queue +ffffffff814f0600 T tcp_input +ffffffff814f3cf0 T syn_cache_reset +ffffffff814f3ea0 T syn_cache_get +ffffffff814f46f0 T syn_cache_add +ffffffff814f4ec0 T tcp_del_sackholes +ffffffff814f4f90 T tcp_dooptions +ffffffff814f54e0 T tcp_xmit_timer +ffffffff814f5630 t sb_notify +ffffffff814f56c0 t sbspace +ffffffff814f5770 T tcp_clean_sackreport +ffffffff814f57f0 T tcp_mss +ffffffff814f5a90 T tcp_sack_partialack +ffffffff814f5b50 T tcp_newreno_partialack +ffffffff814f5c50 T tcp_seq_subtract +ffffffff814f5c80 T tcp_pulloutofband +ffffffff814f5d50 T tcp_update_sack_list +ffffffff814f6210 T tcp_sack_option +ffffffff814f6750 T tcp_hdrsz +ffffffff814f67c0 T tcp_mss_update +ffffffff814f6920 T tcp_mss_adv +ffffffff814f69f0 T syn_cache_rm +ffffffff814f6b90 T syn_cache_put +ffffffff814f6c20 T syn_cache_init +ffffffff814f6d50 T syn_cache_insert +ffffffff814f7390 T syn_cache_timer +ffffffff814f7610 T syn_cache_respond +ffffffff814f7cc0 T syn_cache_cleanup +ffffffff814f7e30 T syn_cache_lookup +ffffffff814f80c0 T syn_cache_unreach +ffffffff814f9000 T tcp_sack_output +ffffffff814f9080 T tcp_sack_adjust +ffffffff814f9100 T tcp_output +ffffffff814faf10 T tcp_setpersist +ffffffff814fb000 T tcp_chopper +ffffffff814fb5c0 T tcp_if_output_tso +ffffffff814fc000 T tcp_init +ffffffff814fc220 T tcp6_mtudisc_callback +ffffffff814fc290 T tcp_template +ffffffff814fc410 T tcp_respond +ffffffff814fc930 T tcp_newtcpcb +ffffffff814fcba0 T tcp_drop +ffffffff814fcca0 T tcp_close +ffffffff814fce20 T tcp_freeq +ffffffff814fcee0 T tcp_rscale +ffffffff814fcfb0 T tcp_notify +ffffffff814fd070 T tcp6_ctlinput +ffffffff814fd2f0 T tcp_ctlinput +ffffffff814fd630 T tcp_mtudisc +ffffffff814fd760 T tcp_mtudisc_increase +ffffffff814fd7e0 T tcp_set_iss_tsm +ffffffff814fd9a0 T tcp_signature_tdb_attach +ffffffff814fd9d0 T tcp_signature_tdb_init +ffffffff814fda80 T tcp_signature_tdb_zeroize +ffffffff814fdb10 T tcp_signature_tdb_input +ffffffff814fdb70 T tcp_signature_tdb_output +ffffffff814fdbc0 T tcp_signature_apply +ffffffff814fdc10 T tcp_signature +ffffffff814fe000 T tcp_timer_rexmt +ffffffff814fe590 T tcp_timer_persist +ffffffff814fe790 T tcp_timer_keep +ffffffff814fea10 T tcp_timer_2msl +ffffffff814feba0 T tcp_timer_reaper +ffffffff814fec20 T tcp_timer_delack +ffffffff814fecf0 T tcp_timer_init +ffffffff814fed90 T tcp_slowtimo +ffffffff814fede0 T tcp_canceltimers +ffffffff814feea0 T tcp_timer_freesack +ffffffff814ff000 T tcp_attach +ffffffff814ff220 T tcp_detach +ffffffff814ff300 T tcp_bind +ffffffff814ff3e0 T tcp_listen +ffffffff814ff4e0 T tcp_connect +ffffffff814ff7e0 T tcp_accept +ffffffff814ff8b0 T tcp_disconnect +ffffffff814ff990 T tcp_shutdown +ffffffff814ffb60 T tcp_rcvd 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udp_sysctl +ffffffff81505390 T udp_sysctl_udpstat +ffffffff81506000 T gre_send +ffffffff81507000 T ipsp_ids_gc +ffffffff81507160 T ipsp_init +ffffffff81507260 T tdb_hash +ffffffff815073b0 T reserve_spi +ffffffff815076c0 T tdb_alloc +ffffffff81507820 T gettdb_dir +ffffffff815079b0 T tdb_unref +ffffffff81507a10 T puttdb +ffffffff81507a60 T tdb_ref +ffffffff81507ab0 T gettdbbysrcdst_dir +ffffffff81507d00 T ipsp_aux_match +ffffffff81507dc0 T ipsp_ids_match +ffffffff81507df0 T gettdbbydst +ffffffff81507fb0 T gettdbbysrc +ffffffff81508170 T tdb_hashstats +ffffffff81508560 T tdb_printit +ffffffff81508fa0 T ipsp_address +ffffffff81509010 T tdb_walk +ffffffff815091e0 T tdb_timeout +ffffffff81509290 T tdb_delete +ffffffff815094f0 T tdb_firstuse +ffffffff815095a0 T tdb_addtimeouts +ffffffff81509640 T tdb_soft_timeout +ffffffff815096f0 T tdb_soft_firstuse +ffffffff815097b0 T tdb_rehash +ffffffff81509b10 T puttdb_locked +ffffffff81509d20 T tdb_unlink +ffffffff81509d70 T tdb_unlink_locked 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Xrecurse_ioapic_edge33 +ffffffff81692710 T Xresume_ioapic_edge33 +ffffffff81692740 T Xintr_ioapic_edge33_untramp +ffffffff81692970 T Xrecurse_ioapic_edge34 +ffffffff816929f0 T Xresume_ioapic_edge34 +ffffffff81692a20 T Xintr_ioapic_edge34_untramp +ffffffff81692c50 T Xrecurse_ioapic_edge35 +ffffffff81692cd0 T Xresume_ioapic_edge35 +ffffffff81692d00 T Xintr_ioapic_edge35_untramp +ffffffff81692f30 T Xrecurse_ioapic_edge36 +ffffffff81692fb0 T Xresume_ioapic_edge36 +ffffffff81692fe0 T Xintr_ioapic_edge36_untramp +ffffffff81693210 T Xrecurse_ioapic_edge37 +ffffffff81693290 T Xresume_ioapic_edge37 +ffffffff816932c0 T Xintr_ioapic_edge37_untramp +ffffffff816934f0 T Xrecurse_ioapic_edge38 +ffffffff81693570 T Xresume_ioapic_edge38 +ffffffff816935a0 T Xintr_ioapic_edge38_untramp +ffffffff816937d0 T Xrecurse_ioapic_edge39 +ffffffff81693850 T Xresume_ioapic_edge39 +ffffffff81693880 T Xintr_ioapic_edge39_untramp +ffffffff81693ab0 T Xrecurse_ioapic_edge40 +ffffffff81693b30 T Xresume_ioapic_edge40 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Xrecurse_ioapic_edge48 +ffffffff81695230 T Xresume_ioapic_edge48 +ffffffff81695260 T Xintr_ioapic_edge48_untramp +ffffffff81695490 T Xrecurse_ioapic_edge49 +ffffffff81695510 T Xresume_ioapic_edge49 +ffffffff81695540 T Xintr_ioapic_edge49_untramp +ffffffff81695770 T Xrecurse_ioapic_edge50 +ffffffff816957f0 T Xresume_ioapic_edge50 +ffffffff81695820 T Xintr_ioapic_edge50_untramp +ffffffff81695a50 T Xrecurse_ioapic_edge51 +ffffffff81695ad0 T Xresume_ioapic_edge51 +ffffffff81695b00 T Xintr_ioapic_edge51_untramp +ffffffff81695d30 T Xrecurse_ioapic_edge52 +ffffffff81695db0 T Xresume_ioapic_edge52 +ffffffff81695de0 T Xintr_ioapic_edge52_untramp +ffffffff81696010 T Xrecurse_ioapic_edge53 +ffffffff81696090 T Xresume_ioapic_edge53 +ffffffff816960c0 T Xintr_ioapic_edge53_untramp +ffffffff816962f0 T Xrecurse_ioapic_edge54 +ffffffff81696370 T Xresume_ioapic_edge54 +ffffffff816963a0 T Xintr_ioapic_edge54_untramp +ffffffff816965d0 T Xrecurse_ioapic_edge55 +ffffffff81696650 T Xresume_ioapic_edge55 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Xrecurse_ioapic_edge63 +ffffffff81697d50 T Xresume_ioapic_edge63 +ffffffff81697d80 T Xintr_ioapic_edge63_untramp +ffffffff81697fb0 T Xrecurse_ioapic_level0 +ffffffff81698030 T Xresume_ioapic_level0 +ffffffff81698060 T Xintr_ioapic_level0_untramp +ffffffff81698370 T Xrecurse_ioapic_level1 +ffffffff816983f0 T Xresume_ioapic_level1 +ffffffff81698420 T Xintr_ioapic_level1_untramp +ffffffff81698730 T Xrecurse_ioapic_level2 +ffffffff816987b0 T Xresume_ioapic_level2 +ffffffff816987e0 T Xintr_ioapic_level2_untramp +ffffffff81698af0 T Xrecurse_ioapic_level3 +ffffffff81698b70 T Xresume_ioapic_level3 +ffffffff81698ba0 T Xintr_ioapic_level3_untramp +ffffffff81698eb0 T Xrecurse_ioapic_level4 +ffffffff81698f30 T Xresume_ioapic_level4 +ffffffff81698f60 T Xintr_ioapic_level4_untramp +ffffffff81699270 T Xrecurse_ioapic_level5 +ffffffff816992f0 T Xresume_ioapic_level5 +ffffffff81699320 T Xintr_ioapic_level5_untramp +ffffffff81699630 T Xrecurse_ioapic_level6 +ffffffff816996b0 T Xresume_ioapic_level6 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vmt_tclo_reset +ffffffff817333b0 T vmt_tclo_abortbackup +ffffffff817335e0 T vmt_tclo_backupdone +ffffffff81733800 T vmt_tclo_startbackup +ffffffff81733a60 T vmt_match +ffffffff81733c00 T vmt_attach +ffffffff81733ec0 T vmt_activate +ffffffff81734180 T vmt_probe_cmd +ffffffff81734240 T vm_cmd +ffffffff817342b0 T vmt_probe +ffffffff81734430 T vm_rpc_open +ffffffff81734530 T vm_rpc_send_rpci_tx +ffffffff817345e0 T vmt_tick_hook +ffffffff81734620 T vmt_tclo_tick +ffffffff81734f00 T vmt_nicinfo_task +ffffffff817350e0 T vmt_kvop +ffffffff81735730 T vm_rpc_send +ffffffff817358f0 T vm_rpc_get_length +ffffffff81735a00 T vm_rpc_get_data +ffffffff81735bc0 T vm_rpc_close +ffffffff81735cd0 T vmt_resume +ffffffff81735e00 T vmt_shutdown +ffffffff81735fc0 T vmt_update_guest_uptime +ffffffff81736030 T vmt_clear_guest_info +ffffffff817360b0 T vmt_update_guest_info +ffffffff817361d0 T vmt_tick +ffffffff817363a0 T vmt_tclo_state_change_success +ffffffff81736400 T vmt_do_shutdown +ffffffff81736600 T vm_rpc_send_str +ffffffff817367e0 T vmt_do_reboot +ffffffff817369e0 T vm_rpci_response_successful +ffffffff81736a20 T vmt_set_backup_status +ffffffff81736a50 T vmt_quiesce_task +ffffffff81736b90 T vmt_quiesce_done_task +ffffffff81736c50 T vmt_tclo_process +ffffffff81736d20 T vmt_xdr_ifaddr +ffffffff81736e90 T vmt_xdr_nic_entry +ffffffff81737050 T vmt_xdr_nic_info +ffffffff81737170 T vm_rpc_send_rpci_tx_buf +ffffffff817376f0 T vm_ins +ffffffff81737760 T vm_outs +ffffffff81738000 T xen_match +ffffffff81738040 T xen_attach +ffffffff817382d0 T xen_activate +ffffffff81738300 T xen_bus_dmamap_create +ffffffff817384c0 T xen_bus_dmamap_destroy +ffffffff81738570 T xen_bus_dmamap_load +ffffffff817386b0 T xen_bus_dmamap_load_mbuf +ffffffff817387f0 T xen_bus_dmamap_unload +ffffffff817388a0 T xen_bus_dmamap_sync +ffffffff817388e0 T xen_init_hypercall +ffffffff81738990 T xen_getfeatures +ffffffff81738a40 T xen_init_info_page +ffffffff81738b70 T xen_init_cbvec +ffffffff81738c10 T xen_init_interrupts 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hvn_media_change +ffffffff8174f010 T hvn_media_status +ffffffff8174f0e0 T hvn_rndis_attach +ffffffff8174f830 T hvn_set_capabilities +ffffffff8174f8e0 T hvn_rndis_detach +ffffffff8174fb50 T hvn_get_lladdr +ffffffff8174fbd0 T hvn_rx_ring_destroy +ffffffff8174fd00 T hvn_tx_ring_destroy +ffffffff8174feb0 T hvn_nvs_detach +ffffffff8174ff30 T hvn_init +ffffffff81750080 T hvn_stop +ffffffff81750130 T hvn_iff +ffffffff817501f0 T hvn_get_link_status +ffffffff81750270 T hvn_link_status +ffffffff817502c0 T hvn_rndis_set +ffffffff817505f0 T hvn_rndis_close +ffffffff81750650 T hvn_encap +ffffffff817509d0 T hvn_rndis_output +ffffffff81750a10 T hvn_decap +ffffffff81750ac0 T hvn_txeof +ffffffff81750bf0 T hvn_nvs_cmd +ffffffff81750e70 T hvn_rndis_query +ffffffff817511b0 T hvn_set_lladdr +ffffffff817511e0 T hvn_nvs_intr +ffffffff81751400 T hvn_rndis_input +ffffffff81751640 T hvn_nvs_ack +ffffffff81751800 T hvn_rndis_cmd +ffffffff81751de0 T hvn_rxeof +ffffffff81752060 T hvn_rndis_complete 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vioscsi_req_get +ffffffff817608c0 T vioscsi_req_put +ffffffff81760920 T vioscsi_alloc_reqs +ffffffff81760dd0 T vioscsi_req_done +ffffffff81761000 T vmmci_match +ffffffff81761040 T vmmci_attach +ffffffff81761170 T vmmci_activate +ffffffff817611f0 T vmmci_config_change +ffffffff81761330 T vmmci_tick_hook +ffffffff81761450 T vmmci_tick +ffffffff81762000 T pcimatch +ffffffff81762090 T pciattach +ffffffff81762200 T pcidetach +ffffffff81762210 T pciactivate +ffffffff817622e0 T pci_enumerate_bus +ffffffff817624e0 T pci_reserve_resources +ffffffff81762bf0 T pci_primary_vga +ffffffff81762c90 T pci_detach_devices +ffffffff81762d90 T pci_suspend +ffffffff81763020 T pci_resume +ffffffff817632f0 T pci_powerdown +ffffffff81763420 T pci_get_capability +ffffffff81763550 T pci_suspend_msix +ffffffff817636f0 T pci_get_powerstate +ffffffff81763780 T pci_set_powerstate +ffffffff81763920 T pci_resume_msix +ffffffff81763ad0 T pciprint +ffffffff81763bf0 T pcisubmatch +ffffffff81763c50 T pci_probe_device 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ahc_aic7895_setup +ffffffff8176c8a0 t ahc_aic7896_setup +ffffffff8176c910 t ahc_aic7899_setup +ffffffff8176c980 t ahc_raid_setup +ffffffff8176c9d0 T ahc_pci_probe +ffffffff8176caa0 T ahc_pci_attach +ffffffff8176d7e0 T ahc_find_pci_device +ffffffff8176d8c0 T ahc_pci_intr +ffffffff8176db90 t ahc_pci_chip_init +ffffffff8176dda0 t ahc_probe_ext_scbram +ffffffff8176e1e0 t ahc_scbram_config +ffffffff8176f000 T ahd_aic7901_setup +ffffffff8176f020 T ahd_aic7901A_setup +ffffffff8176f040 T ahd_aic7902_setup +ffffffff8176f070 T ahd_pci_probe +ffffffff8176f0e0 T ahd_pci_attach +ffffffff8176f6d0 T ahd_activate +ffffffff8176f730 T ahd_find_pci_device +ffffffff8176f9f0 T ahd_pci_test_register_access +ffffffff8176fd80 T ahd_pci_intr +ffffffff81770040 T ahd_check_extport +ffffffff81770410 T ahd_configure_termination +ffffffff81770680 T ahd_pci_split_intr +ffffffff81770f90 T ahd_aic790X_setup +ffffffff81772000 T adw_pci_match +ffffffff81772030 T adw_pci_attach +ffffffff81773000 T AdwInitFromEEPROM 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ahci_ati_sb_idetoahci +ffffffff81780570 T ahci_ati_sb600_attach +ffffffff817805c0 T ahci_ati_sb700_attach +ffffffff81780610 T ahci_amd_hudson2_attach +ffffffff81780660 T ahci_intel_attach +ffffffff81780690 T ahci_samsung_attach +ffffffff817806c0 T ahci_storx_attach +ffffffff817806f0 T ahci_map_regs +ffffffff817807b0 T ahci_map_intr +ffffffff81780850 T ahci_unmap_regs +ffffffff817808b0 T ahci_unmap_intr +ffffffff81781000 T nvme_pci_match +ffffffff81781070 T nvme_pci_attach +ffffffff817812a0 T nvme_pci_detach +ffffffff817812d0 T nvme_pci_activate +ffffffff81782000 T ami_pci_match +ffffffff81782100 T ami_pci_attach +ffffffff81782890 T ami_pci_find_device +ffffffff81783000 T mfi_pci_match +ffffffff81783080 T mfi_pci_attach +ffffffff81783380 T mfi_pci_find_device +ffffffff81784000 T mfii_match +ffffffff81784090 T mfii_attach +ffffffff81784c00 T mfii_detach +ffffffff81784fc0 T mfii_activate +ffffffff81785080 T mfii_scsi_cmd +ffffffff817853c0 T mfii_scsi_ioctl +ffffffff81785420 T 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yds_write_codec +ffffffff817c7de0 T yds_reset_codec +ffffffff817c7f20 T yds_get_portnum_by_name +ffffffff817c7f50 T yds_mixer_set_port +ffffffff817c7f70 T yds_allocmem +ffffffff817c8100 T yds_freemem +ffffffff817c81b0 T yds_open +ffffffff817c8250 T yds_close +ffffffff817c8510 T yds_halt_output +ffffffff817c8620 T yds_halt_input +ffffffff817c8720 T yds_set_params +ffffffff817c8870 T yds_round_blocksize +ffffffff817c88b0 T yds_trigger_output +ffffffff817c8e50 T yds_trigger_input +ffffffff817c9150 T yds_mixer_get_port +ffffffff817c9170 T yds_query_devinfo +ffffffff817c9190 T yds_malloc +ffffffff817c9250 T yds_free +ffffffff817c9380 T yds_round_buffersize +ffffffff817ca000 T auvia_match +ffffffff817ca030 T auvia_attach +ffffffff817ca570 T auvia_activate +ffffffff817ca5f0 T auvia_open +ffffffff817ca640 T auvia_close +ffffffff817ca710 T auvia_set_params +ffffffff817caa40 T auvia_round_blocksize +ffffffff817caaa0 T auvia_halt_output +ffffffff817cab10 T auvia_halt_input +ffffffff817cab80 T auvia_set_port +ffffffff817caba0 T auvia_get_port +ffffffff817cabc0 T auvia_query_devinfo +ffffffff817cabe0 T auvia_malloc +ffffffff817cae60 T auvia_free +ffffffff817caf60 T auvia_round_buffersize +ffffffff817cafa0 T auvia_trigger_output +ffffffff817cb1a0 T auvia_trigger_input +ffffffff817cb3a0 T auvia_resume +ffffffff817cb410 T auvia_intr +ffffffff817cb550 T auvia_attach_codec +ffffffff817cb580 T auvia_read_codec +ffffffff817cb760 T auvia_write_codec +ffffffff817cb870 T auvia_reset_codec +ffffffff817cb9b0 T auvia_spdif_event +ffffffff817cb9e0 T auvia_waitready_codec +ffffffff817cbaa0 T auvia_waitvalid_codec +ffffffff817cbb60 T auvia_set_params_sub +ffffffff817cbce0 T auvia_build_dma_ops +ffffffff817cc000 T gdt_pci_probe +ffffffff817cc080 T gdt_pci_attach +ffffffff817ccb30 T gdt_pci_copy_cmd +ffffffff817ccb60 T gdt_pci_get_status +ffffffff817ccb90 T gdt_pci_intr +ffffffff817ccbc0 T gdt_pci_release_event +ffffffff817ccbf0 T gdt_pci_set_sema0 +ffffffff817ccc20 T gdt_pci_test_busy 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mpi_pci_detach +ffffffff817d9000 T mpii_match +ffffffff817d9030 T mpii_attach +ffffffff817d99b0 T mpii_detach +ffffffff817d9a40 T mpii_scsi_cmd +ffffffff817d9d60 T mpii_scsi_probe +ffffffff817d9f90 T mpii_scsi_ioctl +ffffffff817da010 T mpii_write +ffffffff817da070 T mpii_iocfacts +ffffffff817da350 T mpii_init +ffffffff817da6a0 T mpii_alloc_ccbs +ffffffff817dabb0 T mpii_alloc_replies +ffffffff817dac80 T mpii_alloc_queues +ffffffff817dae30 T mpii_iocinit +ffffffff817dafc0 T mpii_wait_eq +ffffffff817db0e0 T mpii_read +ffffffff817db1a0 T mpii_push_replies +ffffffff817db2f0 T mpii_init_queues +ffffffff817db370 T mpii_board_info +ffffffff817db5a0 T mpii_portfacts +ffffffff817db6f0 T mpii_target_map +ffffffff817db7f0 T mpii_cfg_coalescing +ffffffff817db8d0 T mpii_eventnotify +ffffffff817dbad0 T mpii_portenable +ffffffff817dbbe0 T mpii_intr +ffffffff817dc070 T mpii_ioctl +ffffffff817dc190 T mpii_create_sensors +ffffffff817dc360 T mpii_dmamem_free +ffffffff817dc410 T mpii_get_ccb +ffffffff817dc4c0 T mpii_reply +ffffffff817dc5a0 T mpii_event_process +ffffffff817dc8b0 T mpii_load_xs_sas3 +ffffffff817dca70 T mpii_load_xs +ffffffff817dcc70 T mpii_req_cfg_header +ffffffff817dce40 T mpii_req_cfg_page +ffffffff817dd0c0 T mpii_wait_ne +ffffffff817dd1e0 T mpii_reset_soft +ffffffff817dd460 T mpii_reset_hard +ffffffff817dd7d0 T mpii_handshake_send +ffffffff817ddc80 T mpii_handshake_recv_dword +ffffffff817ddfa0 T mpii_handshake_recv +ffffffff817de250 T mpii_empty_done +ffffffff817de280 T mpii_push_reply +ffffffff817de300 T mpii_poll +ffffffff817de520 T mpii_eventack +ffffffff817de740 T mpii_eventack_done +ffffffff817de7c0 T mpii_start +ffffffff817de890 T mpii_event_sas +ffffffff817ded00 T mpii_eventnotify_done +ffffffff817ded40 T mpii_event_raid +ffffffff817df0a0 T mpii_find_dev +ffffffff817df100 T mpii_insert_dev +ffffffff817df180 T mpii_remove_dev +ffffffff817df200 T mpii_event_discovery +ffffffff817df260 T mpii_sas_remove_device +ffffffff817df430 T mpii_event_done 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aq_fw1x_get_stats +ffffffff817e21f0 T aq_fw2x_reset +ffffffff817e2290 T aq_fw2x_set_mode +ffffffff817e2470 T aq_fw2x_get_mode +ffffffff817e2630 T aq_fw2x_get_stats +ffffffff817e2660 T aq2_fw_reset +ffffffff817e2850 T aq2_get_mac_addr +ffffffff817e2900 T aq2_fw_set_mode +ffffffff817e2b70 T aq2_fw_get_mode +ffffffff817e2c50 T aq2_fw_get_stats +ffffffff817e2c80 T aq_match +ffffffff817e2cb0 T aq_attach +ffffffff817e3bd0 T aq_activate +ffffffff817e3c00 T aq_lookup +ffffffff817e3c80 T aq_intr +ffffffff817e3e40 T aq_intr_link +ffffffff817e3f60 T aq1_fw_reboot +ffffffff817e4230 T aq2_fw_reboot +ffffffff817e4750 T aq_hw_reset +ffffffff817e4900 T aq_init_rss +ffffffff817e4d10 T aq_hw_init +ffffffff817e50c0 T aq_ifmedia_change +ffffffff817e51b0 T aq_ifmedia_status +ffffffff817e52c0 T aq_ioctl +ffffffff817e5550 T aq_start +ffffffff817e58e0 T aq_watchdog +ffffffff817e5910 T aq_set_linkmode +ffffffff817e5940 T aq_refill +ffffffff817e59c0 T aq_intr_queue +ffffffff817e5ac0 T aq_enable_intr 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aq_queue_down +ffffffff817eaa40 T aq_invalidate_rx_desc_cache +ffffffff817eaad0 T aq_up +ffffffff817eafc0 T aq_down +ffffffff817eb160 T aq_rxrinfo +ffffffff817eb270 T aq_iff +ffffffff817ec000 T tulip_probe +ffffffff817ec060 T tulip_attach +ffffffff817eccd0 T tulip_timeout_callback +ffffffff817ecd40 T tulip_timeout +ffffffff817ecdb0 T tulip_txprobe +ffffffff817ecf30 T tulip_txput +ffffffff817ed540 T tulip_media_set +ffffffff817edc00 T tulip_reset +ffffffff817ee050 T tulip_mii_autonegotiate +ffffffff817ee3b0 T tulip_mii_readreg +ffffffff817ee5f0 T tulip_mii_writereg +ffffffff817ee840 T tulip_linkup +ffffffff817ee920 T tulip_init +ffffffff817eead0 T tulip_media_print +ffffffff817eeb20 T tulip_media_link_monitor +ffffffff817eed90 T tulip_mii_map_abilities +ffffffff817eee20 T tulip_media_poll +ffffffff817ef370 T tulip_mii_phy_readspecific +ffffffff817ef570 T tulip_media_select +ffffffff817ef6b0 T tulip_21040_mediainfo_init +ffffffff817ef7b0 T tulip_21040_media_probe +ffffffff817ef8a0 T tulip_21040_10baset_only_media_probe +ffffffff817ef960 T tulip_21040_10baset_only_media_select +ffffffff817ef9c0 T tulip_21040_auibnc_only_media_probe +ffffffff817efa60 T tulip_21040_auibnc_only_media_select +ffffffff817efab0 T tulip_21041_mediainfo_init +ffffffff817efb70 T tulip_21041_media_probe +ffffffff817efc50 T tulip_21041_media_poll +ffffffff817effc0 T tulip_mii_get_phyaddr +ffffffff817f0090 T tulip_2114x_media_preset +ffffffff817f02c0 T tulip_null_media_poll +ffffffff817f02f0 T tulip_21140_mediainit +ffffffff817f0340 T tulip_21140_evalboard_media_probe +ffffffff817f0570 T tulip_21140_accton_media_probe +ffffffff817f07d0 T tulip_21140_smc9332_media_probe +ffffffff817f0a50 T tulip_21140_cogent_em100_media_probe +ffffffff817f0bf0 T tulip_21140_znyx_zx34x_media_probe +ffffffff817f0e90 T tulip_2114x_media_probe +ffffffff817f0ec0 T tulip_delay_300ns +ffffffff817f1020 T tulip_srom_idle +ffffffff817f1d40 T tulip_srom_read +ffffffff817f2f90 T tulip_mii_writebits +ffffffff817f36a0 T tulip_mii_turnaround +ffffffff817f4120 T tulip_mii_readbits +ffffffff817f4630 T tulip_identify_dec_nic +ffffffff817f4710 T tulip_identify_znyx_nic +ffffffff817f4a10 T tulip_identify_smc_nic +ffffffff817f4c00 T tulip_identify_cogent_nic +ffffffff817f4d10 T tulip_identify_accton_nic +ffffffff817f4e70 T tulip_identify_asante_nic +ffffffff817f5180 T tulip_identify_compex_nic +ffffffff817f52f0 T tulip_srom_decode +ffffffff817f5fb0 T tulip_read_macaddr +ffffffff817f6a10 T tulip_ifmedia_add +ffffffff817f6b20 T tulip_ifmedia_change +ffffffff817f6d10 T tulip_ifmedia_status +ffffffff817f6d80 T tulip_alloc_rxmap +ffffffff817f6dc0 T tulip_free_rxmap +ffffffff817f6e00 T tulip_alloc_txmap +ffffffff817f6e40 T tulip_free_txmap +ffffffff817f6e80 T tulip_addr_filter +ffffffff817f71e0 T tulip_rx_intr +ffffffff817f78a0 T tulip_txput_setup +ffffffff817f7b80 T tulip_tx_intr +ffffffff817f7fe0 T tulip_print_abnormal_interrupt +ffffffff817f8010 T tulip_intr_handler +ffffffff817f8400 T tulip_ifstart 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T pcn_79c971_mediainit +ffffffff817fd4f0 T pcn_mii_readreg +ffffffff817fd5d0 T pcn_mii_writereg +ffffffff817fd680 T pcn_mii_statchg +ffffffff817fd6f0 T pcn_79c971_mediachange +ffffffff817fd740 T pcn_79c971_mediastatus +ffffffff817fe000 T siop_lookup_product +ffffffff817fe0a0 T siop_pci_attach_common +ffffffff817fe5b0 T siop_pci_reset +ffffffff817ff000 T siop_pci_match +ffffffff817ff050 T siop_pci_attach +ffffffff81800000 T sii3114_read_reg +ffffffff81800060 T sii3114_write_reg +ffffffff818000d0 T pdc203xx_read_reg +ffffffff81800130 T pdc203xx_write_reg +ffffffff818001a0 T svwsata_read_reg +ffffffff81800210 T svwsata_write_reg +ffffffff81800260 T svwsata_lba48_write_reg +ffffffff818002b0 T pciide_pci_read +ffffffff81800300 T pciide_pci_write +ffffffff81800380 T default_chip_map +ffffffff81800ac0 T artisea_chip_map +ffffffff81800db0 T piix_chip_map +ffffffff81801470 T piixsata_chip_map +ffffffff81801a80 T sch_chip_map +ffffffff81801e40 T amd756_chip_map +ffffffff81802310 T ixp_chip_map +ffffffff81802720 T cmd_chip_map +ffffffff818028a0 T cmd0643_9_chip_map +ffffffff81802c10 T cmd680_chip_map +ffffffff81802e50 T sii3112_chip_map +ffffffff818032a0 T sii3114_chip_map +ffffffff818038f0 T apollo_chip_map +ffffffff81804070 T sata_chip_map +ffffffff818042b0 T cy693_chip_map +ffffffff81804710 T sis_chip_map +ffffffff81804fe0 T natsemi_chip_map +ffffffff81805540 T ns_scx200_chip_map +ffffffff81805980 T acer_chip_map +ffffffff81806150 T hpt_chip_map +ffffffff81806720 T pdc202xx_chip_map +ffffffff81807200 T pdcsata_chip_map +ffffffff81807ae0 T acard_chip_map +ffffffff81807db0 T serverworks_chip_map +ffffffff81808180 T svwsata_chip_map +ffffffff818085e0 T nforce_chip_map +ffffffff81808af0 T ite_chip_map +ffffffff81808e20 T jmicron_chip_map +ffffffff818092c0 T phison_chip_map +ffffffff81809690 T rdc_chip_map +ffffffff81809bb0 T pciide_match +ffffffff81809c60 T pciide_attach +ffffffff81809d40 T pciide_detach +ffffffff81809db0 T pciide_activate +ffffffff8180a610 T pciide_lookup_product +ffffffff8180a8c0 T pciide_dmacmd_read +ffffffff8180a8f0 T pciide_dmacmd_write +ffffffff8180a920 T pciide_dmactl_read +ffffffff8180a950 T pciide_dmactl_write +ffffffff8180a980 T pciide_dmatbl_write +ffffffff8180a9b0 T pciide_mapregs_compat +ffffffff8180ab70 T pciide_unmapregs_compat +ffffffff8180ac10 T pciide_mapregs_native +ffffffff8180afb0 T pciide_unmapregs_native +ffffffff8180b060 T pciide_mapreg_dma +ffffffff8180b220 T pciide_dma_init +ffffffff8180b520 T pciide_dma_start +ffffffff8180b5b0 T pciide_dma_finish +ffffffff8180b7c0 T pciide_unmapreg_dma +ffffffff8180b7f0 T pciide_intr_flag +ffffffff8180bab0 T pciide_compat_intr +ffffffff8180bb30 T pciide_pci_intr +ffffffff8180bc10 T pciide_channel_dma_setup +ffffffff8180bcf0 T pciide_dma_table_setup +ffffffff8180bf80 T pciide_irqack +ffffffff8180bfe0 T pciide_chansetup +ffffffff8180c0d0 T pciide_chanfree +ffffffff8180c120 T pciide_mapchan +ffffffff8180c1c0 T pciide_unmap_chan +ffffffff8180c2c0 T pciide_chan_candisable +ffffffff8180c340 T pciide_map_compat_intr +ffffffff8180c400 T pciide_unmap_compat_intr +ffffffff8180c460 T pciide_print_channels +ffffffff8180c530 T pciide_print_modes +ffffffff8180c540 T default_chip_unmap +ffffffff8180c640 T sata_setup_channel +ffffffff8180c770 T piix_timing_debug +ffffffff8180c7a0 T piix_setup_channel +ffffffff8180ccb0 T piix3_4_setup_channel +ffffffff8180d500 T piix_setup_idetim_timings +ffffffff8180d570 T piix_setup_idetim_drvs +ffffffff8180d680 T piix_setup_sidetim_timings +ffffffff8180d6f0 T amd756_setup_channel +ffffffff8180daf0 T apollo_setup_channel +ffffffff8180de90 T cmd_channel_map +ffffffff8180e230 T cmd_pci_intr +ffffffff8180e360 T cmd646_9_irqack +ffffffff8180e490 T cmd0643_9_setup_channel +ffffffff8180e930 T cmd680_setup_channel +ffffffff8180eef0 T cmd680_channel_map +ffffffff8180f240 T sii_fixup_cacheline +ffffffff8180f5d0 T sii3112_setup_channel +ffffffff8180f7d0 T sii3112_drv_probe +ffffffff8180fbc0 T sii3114_mapreg_dma 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pdc20262_dma_finish +ffffffff81812af0 T pdc20265_pci_intr +ffffffff81812cd0 T pdc202xx_pci_intr +ffffffff81812e00 T pdc203xx_pci_intr +ffffffff81812f10 T pdc205xx_pci_intr +ffffffff81813080 T pdc203xx_irqack +ffffffff81813130 T pdc203xx_setup_channel +ffffffff81813250 T pdc205xx_do_reset +ffffffff81813320 T pdc205xx_drv_probe +ffffffff81813620 T pdc203xx_dma_start +ffffffff818136f0 T pdc203xx_dma_finish +ffffffff81813800 T serverworks_setup_channel +ffffffff81813c60 T serverworks_pci_intr +ffffffff81813d90 T svwsata_mapreg_dma +ffffffff81813e40 T svwsata_drv_probe +ffffffff818141b0 T svwsata_mapchan +ffffffff818142b0 T svwsata_dmacmd_read +ffffffff818142e0 T svwsata_dmacmd_write +ffffffff81814310 T svwsata_dmactl_read +ffffffff81814340 T svwsata_dmactl_write +ffffffff81814370 T svwsata_dmatbl_write +ffffffff818143a0 T acard_setup_channel +ffffffff81814820 T nforce_setup_channel +ffffffff81814ba0 T nforce_pci_intr +ffffffff81814cb0 T ite_setup_channel +ffffffff81815050 T ixp_setup_channel +ffffffff81815450 T jmicron_setup_channel +ffffffff818156c0 T phison_setup_channel +ffffffff818158e0 T sch_setup_channel +ffffffff81815af0 T rdc_setup_channel +ffffffff81815f60 t ba5_read_4_ind +ffffffff81816010 t ba5_write_4_ind +ffffffff81817000 T ppbmatch +ffffffff81817050 T ppbattach +ffffffff81817940 T ppbdetach +ffffffff81817a90 T ppbactivate +ffffffff81818020 T ppb_alloc_busrange +ffffffff818181f0 T ppb_hotplug_insert +ffffffff81818250 T ppb_hotplug_rescan +ffffffff81818290 T ppb_hotplug_remove +ffffffff81818410 T ppb_hotplug_insert_finish +ffffffff81818440 T ppb_intr +ffffffff81818520 T ppb_alloc_resources +ffffffff81818d40 T ppbprint +ffffffff81819000 T cy_pci_match +ffffffff81819030 T cy_pci_attach +ffffffff8181a000 T rl_pci_match +ffffffff8181a060 T rl_pci_attach +ffffffff8181a260 T rl_pci_detach +ffffffff8181b000 T re_pci_probe +ffffffff8181b0b0 T re_pci_attach +ffffffff8181b4a0 T re_pci_detach +ffffffff8181b520 T re_pci_activate +ffffffff8181c000 T vr_probe +ffffffff8181c0d0 T vr_attach +ffffffff8181c7f0 T vr_activate +ffffffff8181c860 T vr_mii_readreg +ffffffff8181ca20 T vr_mii_writereg +ffffffff8181cbd0 T vr_miibus_readreg +ffffffff8181cc40 T vr_miibus_writereg +ffffffff8181ccb0 T vr_miibus_statchg +ffffffff8181ccd0 T vr_setcfg +ffffffff8181cf40 T vr_iff +ffffffff8181d0d0 T vr_reset +ffffffff8181d210 T vr_quirks +ffffffff8181d310 T vr_dmamem_alloc +ffffffff8181d4a0 T vr_dmamem_free +ffffffff8181d530 T vr_intr +ffffffff8181d7b0 T vr_chipinit +ffffffff8181d8d0 T vr_ioctl +ffffffff8181dab0 T vr_start +ffffffff8181dcb0 T vr_watchdog +ffffffff8181dd60 T vr_wol +ffffffff8181df70 T vr_ifmedia_upd +ffffffff8181dfc0 T vr_ifmedia_sts +ffffffff8181e030 T vr_tick +ffffffff8181e0e0 T vr_rxtick +ffffffff8181e1e0 T vr_stop +ffffffff8181e520 T vr_init +ffffffff8181ec50 T vr_list_tx_init +ffffffff8181ed50 T vr_list_rx_init +ffffffff8181ef40 T vr_fill_rx_ring +ffffffff8181f010 T vr_alloc_mbuf +ffffffff8181f1b0 T vr_rxeof +ffffffff8181f490 T vr_rxeoc +ffffffff8181f680 T vr_txeof +ffffffff8181f860 T vr_encap +ffffffff81820000 T txp_probe +ffffffff81820030 T txp_attach +ffffffff818201f0 T txp_attachhook +ffffffff81820610 T txp_chip_init +ffffffff81820840 T txp_download_fw +ffffffff81820dd0 T txp_alloc_rings +ffffffff81821b90 T txp_command +ffffffff81821c70 T txp_ifmedia_upd +ffffffff81821d90 T txp_ifmedia_sts +ffffffff818220b0 T txp_ioctl +ffffffff81822210 T txp_start +ffffffff81822640 T txp_watchdog +ffffffff81822670 T txp_capabilities +ffffffff81822840 T txp_tick +ffffffff818229d0 T txp_intr +ffffffff81822ca0 T txp_reset_adapter +ffffffff81822dd0 T txp_download_fw_wait +ffffffff81822ee0 T txp_download_fw_section +ffffffff81823340 T txp_dma_malloc +ffffffff81823510 T txp_dma_free +ffffffff818235a0 T txp_rx_reclaim +ffffffff818238e0 T txp_rxbuf_reclaim +ffffffff81823bc0 T txp_tx_reclaim +ffffffff81823d90 T txp_init +ffffffff81823f10 T txp_stop +ffffffff81824030 T txp_set_filter +ffffffff818241d0 T txp_command2 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do_afc +ffffffff81834440 T get_tuner_status +ffffffff81834460 T tv_channel +ffffffff81834520 T tuner_getchnlset +ffffffff81835000 T xl_pci_match +ffffffff81835030 T xl_pci_attach +ffffffff81835410 T xl_pci_detach +ffffffff818354b0 T xl_pci_wol_power +ffffffff81835510 T xl_pci_intr_ack +ffffffff81836000 T fxp_pci_match +ffffffff81836030 T fxp_pci_attach +ffffffff818363b0 T fxp_pci_detach +ffffffff81837000 T em_probe +ffffffff81837030 T em_attach +ffffffff81837620 T em_detach +ffffffff818376d0 T em_activate +ffffffff81837740 T em_defer_attach +ffffffff81837820 T em_stop +ffffffff81837980 T em_free_pci_resources +ffffffff81837c80 T em_setup_interface +ffffffff81837ee0 T em_update_link_status +ffffffff81838130 T em_local_timer +ffffffff81838210 T em_82547_move_tail +ffffffff81838260 T em_identify_hardware +ffffffff81838390 T em_allocate_pci_resources +ffffffff81838830 T em_allocate_desc_rings +ffffffff81838960 T em_hardware_init +ffffffff81838cb0 T em_kstat_attach +ffffffff81838e30 T em_start +ffffffff81839180 T em_encap +ffffffff81839680 T em_82547_move_tail_locked +ffffffff818398e0 T em_82547_update_fifo_head +ffffffff81839930 T em_ioctl +ffffffff81839c80 T em_init +ffffffff8183a0c0 T em_get_sffpage +ffffffff8183a190 T em_disable_intr +ffffffff8183a2c0 T em_iff +ffffffff8183a660 T em_initialize_receive_unit +ffffffff8183aeb0 T em_enable_intr +ffffffff8183b060 T em_watchdog +ffffffff8183b260 T em_enable_hw_vlans +ffffffff8183b310 T em_setup_transmit_structures +ffffffff8183b560 T em_initialize_transmit_unit +ffffffff8183bc40 T em_setup_receive_structures +ffffffff8183bdb0 T em_setup_queues_msix +ffffffff8183c4e0 T em_intr +ffffffff8183c630 T em_txeof +ffffffff8183c820 T em_rxeof +ffffffff8183cd00 T em_rxrefill_locked +ffffffff8183ce20 T em_media_status +ffffffff8183d080 T em_flowstatus +ffffffff8183d1a0 T em_media_change +ffffffff8183d310 T em_tso_setup +ffffffff8183d4d0 T em_tx_ctx_setup +ffffffff8183d640 T em_transmit_checksum_setup +ffffffff8183d730 T em_fill_descriptors +ffffffff8183d7b0 T em_82547_fifo_workaround +ffffffff8183d820 T em_82547_tx_fifo_reset +ffffffff8183dd90 T em_pci_clear_mwi +ffffffff8183ddc0 T em_pci_set_mwi +ffffffff8183ddf0 T em_smartspeed +ffffffff8183e050 T em_kstat_read +ffffffff8183e570 T em_flush_desc_rings +ffffffff8183e6d0 T em_free_transmit_structures +ffffffff8183e900 T em_free_receive_structures +ffffffff8183eb50 T em_legacy_irq_quirk_spt +ffffffff8183ec40 T em_rxrefill +ffffffff8183ec90 T em_allocate_msix +ffffffff8183ef00 T em_allocate_legacy +ffffffff8183f060 T em_dma_free +ffffffff8183f0f0 T em_disable_aspm +ffffffff8183f1d0 T em_dma_malloc +ffffffff8183f390 T em_allocate_transmit_structures +ffffffff8183f4a0 T em_get_buf +ffffffff8183f620 T em_allocate_receive_structures +ffffffff8183f830 T em_rxfill +ffffffff8183f990 T em_tbi_adjust_stats +ffffffff8183fb60 T em_receive_checksum +ffffffff8183fbd0 T em_write_pci_cfg +ffffffff8183fc50 T em_read_pci_cfg +ffffffff8183fcd0 T em_read_pcie_cap_reg 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em_setup_link +ffffffff818496d0 T em_enable_tx_pkt_filtering +ffffffff81849b70 T em_clear_hw_cntrs +ffffffff8184a740 T em_write_phy_reg +ffffffff8184a900 T em_power_up_serdes_link_82575 +ffffffff8184aa20 T em_copper_link_autoneg +ffffffff8184ab80 T em_phy_setup_autoneg +ffffffff8184ad00 T em_copper_link_postconfig +ffffffff8184ae00 T em_config_collision_dist +ffffffff8184aea0 t em_config_mac_to_phy +ffffffff8184b040 t em_config_fc_after_link_up +ffffffff8184b2e0 t em_config_dsp_after_link_change +ffffffff8184be10 T em_force_mac_fc +ffffffff8184bee0 T em_check_for_link +ffffffff8184c6b0 T em_get_pcs_speed_and_duplex_82575 +ffffffff8184c770 T em_k1_gig_workaround_hv +ffffffff8184c8d0 T em_link_stall_workaround_hv +ffffffff8184c9d0 T em_k1_workaround_lv +ffffffff8184caa0 T em_k1_workaround_lpt_lp +ffffffff8184ce00 t em_check_downshift +ffffffff8184cec0 T em_set_eee_pchlan +ffffffff8184cf70 t em_polarity_reversal_workaround +ffffffff8184d250 T em_get_speed_and_duplex +ffffffff8184d800 T em_access_phy_wakeup_reg_bm +ffffffff8184d9c0 t em_write_phy_reg_ex +ffffffff8184dc90 t em_read_phy_reg_ex +ffffffff8184e260 T em_access_phy_debug_regs_hv +ffffffff8184e340 T em_access_phy_reg_hv +ffffffff8184e4d0 t em_swfw_sync_acquire +ffffffff8184e6c0 t em_swfw_sync_release +ffffffff8184e860 T em_sgmii_uses_mdio_82575 +ffffffff8184e8d0 T em_read_phy_reg_i2c +ffffffff8184e9d0 T em_write_phy_reg_i2c +ffffffff8184eac0 T em_phy_hw_reset +ffffffff8184f250 T em_oem_bits_config_pchlan +ffffffff8184f400 T em_initialize_M88E1512_phy +ffffffff8184f650 T em_init_eeprom_params +ffffffff8184fba0 T em_get_flash_presence_i210 +ffffffff8184fc10 t em_acquire_eeprom +ffffffff8184fe70 t em_read_eeprom_ich8 +ffffffff81850060 t em_release_eeprom +ffffffff81850210 t em_standby_eeprom +ffffffff81850490 t em_shift_out_ee_bits +ffffffff81850690 t em_shift_in_ee_bits +ffffffff81850820 T em_validate_eeprom_checksum +ffffffff81850a00 T em_write_eeprom +ffffffff81850d90 T em_update_eeprom_checksum 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ixgb_validate_eeprom_checksum +ffffffff8185b080 T ixgb_read_eeprom +ffffffff8185b3b0 T ixgb_update_eeprom_checksum +ffffffff8185b420 T ixgb_write_eeprom +ffffffff8185baa0 t ixgb_shift_out_bits +ffffffff8185bc10 T ixgb_get_eeprom_data +ffffffff8185bcc0 T ixgb_get_eeprom_word +ffffffff8185bda0 T ixgb_get_ee_mac_addr +ffffffff8185bea0 T ixgb_get_ee_pba_number +ffffffff8185bf60 T ixgb_get_ee_device_id +ffffffff8185d000 T ixgb_mac_reset +ffffffff8185d270 T ixgb_adapter_stop +ffffffff8185d400 T ixgb_init_hw +ffffffff8185d790 T ixgb_init_rx_addrs +ffffffff8185d8f0 T mac_addr_valid +ffffffff8185d950 T ixgb_clear_vfta +ffffffff8185d9d0 T ixgb_clear_hw_cntrs +ffffffff8185e2c0 T ixgb_setup_fc +ffffffff8185e480 T ixgb_check_for_link +ffffffff8185e700 T ixgb_rar_set +ffffffff8185e780 T ixgb_mc_addr_list_update +ffffffff8185ea60 T ixgb_write_vfta +ffffffff8185ea90 T ixgb_read_phy_reg +ffffffff8185f110 T ixgb_write_phy_reg +ffffffff8185f790 T ixgb_check_for_bad_link +ffffffff8185f860 T ixgb_led_on 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T ixgbe_setup_transmit_structures +ffffffff81864400 T ixgbe_initialize_transmit_units +ffffffff81864750 T ixgbe_setup_receive_structures +ffffffff81864890 T ixgbe_initialize_receive_units +ffffffff81864e40 T ixgbe_config_gpie +ffffffff81864f20 T ixgbe_setup_vlan_hw_support +ffffffff818650c0 T ixgbe_configure_ivars +ffffffff818652a0 T ixgbe_set_ivar +ffffffff81865460 T ixgbe_config_link +ffffffff81865650 T ixgbe_config_delay_values +ffffffff81865770 t ix_kstats_tick +ffffffff81865870 T ixgbe_enable_queue +ffffffff81865940 T ixgbe_disable_queue +ffffffff81865a10 T ixgbe_link_intr +ffffffff81865a20 T ixgbe_intr +ffffffff81865fc0 T ixgbe_queue_intr +ffffffff81866130 T ixgbe_rxeof +ffffffff81866520 T ixgbe_txeof +ffffffff818666e0 T ixgbe_rxrefill +ffffffff81866790 T ixgbe_legacy_intr +ffffffff81866960 T ixgbe_update_link_status +ffffffff81866ac0 T ixgbe_handle_mod +ffffffff81866c10 T ixgbe_handle_msf +ffffffff81866d00 T ixgbe_handle_phy +ffffffff81866d90 T ixgbe_media_status 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ixgbe_init_eeprom_params_generic +ffffffff81869330 T ixgbe_read_eerd_generic +ffffffff81869460 T ixgbe_read_eeprom_bit_bang_generic +ffffffff818697c0 T ixgbe_write_eeprom_generic +ffffffff81869d50 T ixgbe_validate_eeprom_checksum_generic +ffffffff81869e30 T ixgbe_update_eeprom_checksum_generic +ffffffff81869ed0 T ixgbe_calc_eeprom_checksum_generic +ffffffff8186a090 T ixgbe_init_hw_generic +ffffffff8186a0f0 T ixgbe_start_hw_generic +ffffffff8186a260 T ixgbe_clear_hw_cntrs_generic +ffffffff8186af40 T ixgbe_enable_rx_dma_generic +ffffffff8186afa0 T ixgbe_get_mac_addr_generic +ffffffff8186b050 T ixgbe_stop_adapter_generic +ffffffff8186b200 T ixgbe_get_bus_info_generic +ffffffff8186b2c0 T ixgbe_set_lan_id_multi_port_pcie +ffffffff8186b3b0 T ixgbe_acquire_swfw_sync +ffffffff8186b680 T ixgbe_release_swfw_sync +ffffffff8186b760 T prot_autoc_read_generic +ffffffff8186b7c0 T prot_autoc_write_generic +ffffffff8186b820 T ixgbe_led_on_generic +ffffffff8186b900 T ixgbe_led_off_generic +ffffffff8186b9d0 T ixgbe_blink_led_start_generic +ffffffff8186bb90 T ixgbe_blink_led_stop_generic +ffffffff8186bce0 T ixgbe_set_rar_generic +ffffffff8186be20 T ixgbe_clear_rar_generic +ffffffff8186bf40 T ixgbe_init_rx_addrs_generic +ffffffff8186c160 T ixgbe_update_mc_addr_list_generic +ffffffff8186c380 T ixgbe_enable_mc_generic +ffffffff8186c3f0 T ixgbe_disable_mc_generic +ffffffff8186c450 T ixgbe_enable_rx_generic +ffffffff8186c540 T ixgbe_disable_rx_generic +ffffffff8186c650 T ixgbe_fc_enable_generic +ffffffff8186cb00 T ixgbe_setup_fc_generic +ffffffff8186ce10 T ixgbe_fc_autoneg +ffffffff8186d140 T ixgbe_device_supports_autoneg_fc +ffffffff8186d240 T ixgbe_start_hw_gen2 +ffffffff8186d460 T ixgbe_identify_phy +ffffffff8186d4c0 T ixgbe_set_pci_config_data_generic +ffffffff8186d530 T ixgbe_disable_rx +ffffffff8186d570 T ixgbe_disable_pcie_master +ffffffff8186d6f0 T ixgbe_read_eerd_buffer_generic +ffffffff8186d850 T ixgbe_poll_eerd_eewr_done +ffffffff8186d900 T ixgbe_write_eewr_buffer_generic +ffffffff8186daa0 T ixgbe_write_eewr_generic +ffffffff8186daf0 T ixgbe_acquire_eeprom +ffffffff8186dcd0 T ixgbe_get_eeprom_semaphore +ffffffff8186df60 T ixgbe_release_eeprom_semaphore +ffffffff8186dfe0 T ixgbe_ready_eeprom +ffffffff8186e1b0 T ixgbe_shift_out_eeprom_bits +ffffffff8186e3e0 T ixgbe_shift_in_eeprom_bits +ffffffff8186e580 T ixgbe_standby_eeprom +ffffffff8186e6a0 T ixgbe_raise_eeprom_clk +ffffffff8186e720 T ixgbe_lower_eeprom_clk +ffffffff8186e7a0 T ixgbe_release_eeprom +ffffffff8186e8b0 T ixgbe_validate_mac_addr +ffffffff8186e910 T ixgbe_init_uta_tables +ffffffff8186e950 T ixgbe_add_uc_addr +ffffffff8186e9d0 T ixgbe_mta_vector +ffffffff8186ea90 T ixgbe_set_mta +ffffffff8186eb60 T ixgbe_negotiate_fc +ffffffff8186ec10 T ixgbe_fc_autoneg_fiber +ffffffff8186ed50 T ixgbe_fc_autoneg_backplane +ffffffff8186eef0 T ixgbe_fc_autoneg_copper +ffffffff8186f030 T ixgbe_disable_sec_rx_path_generic +ffffffff8186f110 T ixgbe_enable_sec_rx_path_generic +ffffffff8186f1c0 T ixgbe_enable_rx +ffffffff8186f200 T ixgbe_get_pcie_msix_count_generic +ffffffff8186f290 T ixgbe_insert_mac_addr_generic +ffffffff8186f4e0 T ixgbe_set_vmdq +ffffffff8186f520 T ixgbe_set_rar +ffffffff8186f570 T ixgbe_clear_vmdq +ffffffff8186f5b0 T ixgbe_clear_vmdq_generic +ffffffff8186f790 T ixgbe_set_vmdq_generic +ffffffff8186f860 T ixgbe_init_uta_tables_generic +ffffffff8186f8e0 T ixgbe_find_vlvf_slot +ffffffff8186f9a0 T ixgbe_set_vfta_generic +ffffffff8186fac0 T ixgbe_set_vlvf_generic +ffffffff8186fd90 T ixgbe_clear_vfta_generic +ffffffff8186fec0 T ixgbe_need_crosstalk_fix +ffffffff8186ff20 T ixgbe_check_mac_link_generic +ffffffff81870140 T ixgbe_get_device_caps_generic +ffffffff81870190 T ixgbe_calculate_checksum +ffffffff81870250 T ixgbe_hic_unlocked +ffffffff81870460 T ixgbe_host_interface_command +ffffffff81870660 T ixgbe_clear_tx_pending +ffffffff81870890 T ixgbe_mng_present +ffffffff81870900 T ixgbe_mng_enabled +ffffffff818709d0 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff81870e10 T ixgbe_flap_tx_laser +ffffffff81870e50 T ixgbe_check_link +ffffffff81870ea0 T ixgbe_set_soft_rate_select_speed +ffffffff81870fc0 T ixgbe_init_shared_code +ffffffff818710b0 T ixgbe_set_mac_type +ffffffff81871250 T ixgbe_init_hw +ffffffff81871290 T ixgbe_get_media_type +ffffffff818712d0 T ixgbe_read_mbx +ffffffff81871330 T ixgbe_poll_mbx +ffffffff81871430 T ixgbe_poll_for_msg +ffffffff81871500 T ixgbe_write_mbx +ffffffff81871580 T ixgbe_check_for_msg +ffffffff818715c0 T ixgbe_check_for_ack +ffffffff81871600 T ixgbe_check_for_rst +ffffffff81871640 T ixgbe_poll_for_ack +ffffffff81871710 T ixgbe_read_posted_mbx +ffffffff81871810 T ixgbe_write_posted_mbx +ffffffff81871930 T ixgbe_init_mbx_ops_generic +ffffffff81871970 T ixgbe_check_for_bit_pf +ffffffff818719e0 T ixgbe_check_for_msg_pf +ffffffff81871a50 T ixgbe_check_for_ack_pf +ffffffff81871b30 T ixgbe_check_for_rst_pf +ffffffff81871c30 T ixgbe_obtain_mbx_lock_pf +ffffffff81871d30 T ixgbe_write_mbx_pf +ffffffff81872050 T ixgbe_read_mbx_pf +ffffffff81872210 T ixgbe_init_mbx_params_vf +ffffffff818722c0 t ixgbe_release_mbx_lock_dummy +ffffffff818722f0 t ixgbe_read_mbx_vf_legacy +ffffffff818724d0 t ixgbe_write_mbx_vf_legacy +ffffffff81872840 t ixgbe_check_for_msg_vf +ffffffff818728d0 t ixgbe_check_for_ack_vf +ffffffff818729c0 t ixgbe_check_for_rst_vf +ffffffff81872ab0 T ixgbe_init_mbx_params_pf +ffffffff81872b80 t ixgbe_read_mbx_pf_legacy +ffffffff81872d30 t ixgbe_write_mbx_pf_legacy +ffffffff81873060 t ixgbe_clear_mbx_pf +ffffffff81874000 T ixgbe_set_pcie_completion_timeout +ffffffff818740b0 T ixgbe_init_ops_82598 +ffffffff81874210 T ixgbe_init_phy_ops_82598 +ffffffff81874330 T ixgbe_start_hw_82598 +ffffffff81874510 T ixgbe_reset_hw_82598 +ffffffff81874900 T ixgbe_get_media_type_82598 +ffffffff818749c0 T ixgbe_get_supported_physical_layer_82598 +ffffffff81874bb0 T ixgbe_read_analog_reg8_82598 +ffffffff81874c90 T ixgbe_write_analog_reg8_82598 +ffffffff81874d30 T ixgbe_set_lan_id_multi_port_pcie_82598 +ffffffff81874df0 T ixgbe_enable_rx_dma_82598 +ffffffff81874e50 T ixgbe_set_vmdq_82598 +ffffffff81874f10 T ixgbe_clear_vmdq_82598 +ffffffff81874fd0 T ixgbe_set_vfta_82598 +ffffffff81875120 T ixgbe_clear_vfta_82598 +ffffffff81875300 T ixgbe_fc_enable_82598 +ffffffff818757f0 T ixgbe_read_i2c_eeprom_82598 +ffffffff81875810 T ixgbe_check_mac_link_82598 +ffffffff81875b00 T ixgbe_setup_mac_link_82598 +ffffffff81875d00 T ixgbe_get_link_capabilities_82598 +ffffffff81875dd0 T ixgbe_setup_copper_link_82598 +ffffffff81875f20 T ixgbe_start_mac_link_82598 +ffffffff81876070 T ixgbe_validate_link_ready +ffffffff81876130 T ixgbe_read_i2c_phy_82598 +ffffffff81877000 T ixgbe_init_mac_link_ops_82599 +ffffffff818771d0 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff818772c0 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff81877360 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff818774f0 T ixgbe_setup_mac_link_82599 +ffffffff818777c0 T ixgbe_set_hard_rate_select_speed +ffffffff81877890 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff81877970 T ixgbe_setup_mac_link_smartspeed +ffffffff81877de0 T ixgbe_init_phy_ops_82599 +ffffffff81877f70 T ixgbe_read_i2c_byte_82599 +ffffffff81878130 T ixgbe_write_i2c_byte_82599 +ffffffff818782f0 T ixgbe_setup_copper_link_82599 +ffffffff81878360 T ixgbe_setup_sfp_modules_82599 +ffffffff81878590 T prot_autoc_read_82599 +ffffffff818786f0 T prot_autoc_write_82599 +ffffffff818788b0 T ixgbe_reset_pipeline_82599 +ffffffff81878ce0 T ixgbe_init_ops_82599 +ffffffff81878ef0 T ixgbe_identify_phy_82599 +ffffffff81878fa0 T ixgbe_reset_hw_82599 +ffffffff818793e0 T ixgbe_get_media_type_82599 +ffffffff81879510 T ixgbe_get_supported_physical_layer_82599 +ffffffff81879700 T ixgbe_enable_rx_dma_82599 +ffffffff81879790 T ixgbe_read_analog_reg8_82599 +ffffffff81879870 T ixgbe_write_analog_reg8_82599 +ffffffff81879910 T ixgbe_start_hw_82599 +ffffffff81879a40 T ixgbe_get_link_capabilities_82599 +ffffffff81879b90 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff81879c60 T ixgbe_read_eeprom_82599 +ffffffff81879c90 T ixgbe_start_mac_link_82599 +ffffffff81879ed0 T ixgbe_verify_fw_version_82599 +ffffffff8187a000 T ixgbe_init_ops_X540 +ffffffff8187a230 T ixgbe_init_eeprom_params_X540 +ffffffff8187a2c0 T ixgbe_read_eerd_X540 +ffffffff8187a370 T ixgbe_write_eewr_X540 +ffffffff8187a420 T ixgbe_update_eeprom_checksum_X540 +ffffffff8187a520 T ixgbe_validate_eeprom_checksum_X540 +ffffffff8187a640 T ixgbe_calc_eeprom_checksum_X540 +ffffffff8187a810 T ixgbe_reset_hw_X540 +ffffffff8187aa80 T ixgbe_get_media_type_X540 +ffffffff8187aab0 T ixgbe_get_supported_physical_layer_X540 +ffffffff8187ab30 T ixgbe_start_hw_X540 +ffffffff8187ab90 T ixgbe_acquire_swfw_sync_X540 +ffffffff8187b0d0 T ixgbe_release_swfw_sync_X540 +ffffffff8187b250 T ixgbe_init_swfw_sync_X540 +ffffffff8187b370 T ixgbe_setup_mac_link_X540 +ffffffff8187b390 T ixgbe_blink_led_start_X540 +ffffffff8187b4d0 T ixgbe_blink_led_stop_X540 +ffffffff8187b600 T ixgbe_get_link_capabilities_X540 +ffffffff8187b650 T ixgbe_update_flash_X540 +ffffffff8187b890 T ixgbe_poll_flash_update_done_X540 +ffffffff8187b940 T ixgbe_get_swfw_sync_semaphore +ffffffff8187bb10 T ixgbe_release_swfw_sync_semaphore +ffffffff8187c000 T ixgbe_init_ops_X550 +ffffffff8187c110 T ixgbe_dmac_config_X550 +ffffffff8187c210 T ixgbe_dmac_config_tcs_X550 +ffffffff8187c390 T ixgbe_dmac_update_tcs_X550 +ffffffff8187c470 T ixgbe_set_source_address_pruning_X550 +ffffffff8187c580 T ixgbe_init_eeprom_params_X550 +ffffffff8187c610 T ixgbe_calc_eeprom_checksum_X550 +ffffffff8187c630 T ixgbe_read_ee_hostif_X550 +ffffffff8187c720 T ixgbe_write_ee_hostif_X550 +ffffffff8187c7f0 T ixgbe_update_eeprom_checksum_X550 +ffffffff8187c9f0 T ixgbe_validate_eeprom_checksum_X550 +ffffffff8187cb80 T ixgbe_disable_rx_x550 +ffffffff8187ccd0 T ixgbe_led_on_t_X550em +ffffffff8187cda0 T ixgbe_led_off_t_X550em +ffffffff8187ce70 T ixgbe_read_cs4227 +ffffffff8187cea0 T ixgbe_write_cs4227 +ffffffff8187ced0 T ixgbe_read_pe +ffffffff8187cf20 T ixgbe_write_pe +ffffffff8187cf80 T ixgbe_reset_cs4227 +ffffffff8187d290 T ixgbe_check_cs4227 +ffffffff8187d4c0 T ixgbe_setup_mux_ctl +ffffffff8187d560 T ixgbe_identify_phy_x550em +ffffffff8187d7a0 T ixgbe_read_mng_if_sel_x550em +ffffffff8187d820 T ixgbe_fw_phy_activity +ffffffff8187d950 T ixgbe_get_phy_id_fw +ffffffff8187dad0 T ixgbe_identify_phy_fw +ffffffff8187db20 T ixgbe_shutdown_fw_phy +ffffffff8187dc00 T ixgbe_read_phy_reg_x550em +ffffffff8187dc30 T ixgbe_write_phy_reg_x550em +ffffffff8187dc60 T ixgbe_init_ops_X550EM +ffffffff8187df00 T ixgbe_get_bus_info_X550em +ffffffff8187df50 T ixgbe_get_media_type_X550em +ffffffff8187e020 T ixgbe_setup_sfp_modules_X550em +ffffffff8187e1b0 T ixgbe_get_link_capabilities_X550em +ffffffff8187e280 T ixgbe_reset_hw_X550em +ffffffff8187e7d0 T ixgbe_get_supported_physical_layer_X550em +ffffffff8187e980 T ixgbe_setup_fc_X550em +ffffffff8187eaf0 T ixgbe_init_phy_ops_X550em +ffffffff8187f010 T ixgbe_setup_fw_link +ffffffff8187f1d0 T ixgbe_fc_autoneg_fw +ffffffff8187f200 T ixgbe_setup_eee_fw +ffffffff8187f260 T ixgbe_init_ops_X550EM_a +ffffffff8187f3a0 T ixgbe_read_iosf_sb_reg_x550 +ffffffff8187f560 T ixgbe_write_iosf_sb_reg_x550 +ffffffff8187f720 T ixgbe_read_iosf_sb_reg_x550a +ffffffff8187f7c0 T ixgbe_write_iosf_sb_reg_x550a +ffffffff8187f850 T ixgbe_acquire_swfw_sync_X550a +ffffffff8187f9a0 T ixgbe_release_swfw_sync_X550a +ffffffff8187fa40 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff8187fa80 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff8187fc10 T ixgbe_setup_fc_backplane_x550em_a +ffffffff8187fe40 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff8187ffd0 T ixgbe_init_ops_X550EM_x +ffffffff818800a0 T ixgbe_acquire_swfw_sync_X550em +ffffffff81880170 T ixgbe_release_swfw_sync_X550em +ffffffff81880210 T ixgbe_iosf_wait +ffffffff818802d0 T ixgbe_get_phy_token +ffffffff81880360 T ixgbe_put_phy_token +ffffffff818803e0 T ixgbe_supported_sfp_modules_X550em +ffffffff81880460 T ixgbe_identify_sfp_module_X550em +ffffffff818804e0 T ixgbe_init_mac_link_ops_X550em +ffffffff81880630 T ixgbe_restart_an_internal_phy_x550em +ffffffff81880760 T ixgbe_setup_sgmii +ffffffff81880970 T ixgbe_setup_sgmii_fw +ffffffff81880bb0 T ixgbe_setup_mac_link_sfp_x550a +ffffffff81880df0 T ixgbe_setup_mac_link_sfp_x550em +ffffffff81880eb0 T ixgbe_setup_mac_link_t_X550em +ffffffff81880f70 T ixgbe_check_link_t_X550em +ffffffff81881070 T ixgbe_get_lasi_ext_t_x550em +ffffffff81881230 T ixgbe_enable_lasi_ext_t_x550em +ffffffff81881420 T ixgbe_setup_kr_speed_x550em +ffffffff81881680 T ixgbe_reset_phy_fw +ffffffff81881820 T ixgbe_check_overtemp_fw +ffffffff818819a0 T ixgbe_read_phy_reg_x550a +ffffffff81881a60 T ixgbe_write_phy_reg_x550a +ffffffff81881b30 T ixgbe_setup_kr_x550em +ffffffff81881ba0 T ixgbe_setup_internal_phy_t_x550em +ffffffff81881d30 T ixgbe_enter_lplu_t_x550em +ffffffff81882000 T ixgbe_handle_lasi_ext_t_x550em +ffffffff81882080 T ixgbe_reset_phy_t_X550em +ffffffff818820e0 T ixgbe_set_mdio_speed +ffffffff818821c0 T ixgbe_init_ext_t_x550em +ffffffff81882290 T ixgbe_setup_sfi_x550a +ffffffff81882480 T ixgbe_setup_ixfi_x550em_x +ffffffff818826b0 T ixgbe_setup_ixfi_x550em +ffffffff818828d0 T ixgbe_ext_phy_t_x550em_get_link +ffffffff81882970 T ixgbe_setup_phy_loopback_x550em +ffffffff81882ba0 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff81882d60 T ixgbe_write_ee_hostif_data_X550 +ffffffff81882dd0 T ixgbe_checksum_ptr_x550 +ffffffff81882f60 T ixgbe_calc_checksum_X550 +ffffffff81883100 T ixgbe_update_flash_X550 +ffffffff81883160 T ixgbe_get_lcd_t_x550em +ffffffff81883220 T ixgbe_set_mux +ffffffff81884000 T ixgbe_read_i2c_combined_generic_int +ffffffff81884330 T ixgbe_i2c_start +ffffffff818844e0 t ixgbe_out_i2c_byte_ack +ffffffff81884530 T ixgbe_clock_in_i2c_byte +ffffffff81884670 T ixgbe_clock_out_i2c_bit +ffffffff818847c0 T ixgbe_i2c_stop +ffffffff818849a0 T ixgbe_i2c_bus_clear +ffffffff81884b00 T ixgbe_read_i2c_combined_generic +ffffffff81884b20 T ixgbe_read_i2c_combined_generic_unlocked +ffffffff81884b40 T ixgbe_write_i2c_combined_generic_int +ffffffff81884d80 T ixgbe_write_i2c_combined_generic +ffffffff81884da0 T ixgbe_write_i2c_combined_generic_unlocked +ffffffff81884dc0 T ixgbe_init_phy_ops_generic +ffffffff81884ef0 T ixgbe_identify_phy_generic +ffffffff81884fd0 T ixgbe_reset_phy_generic +ffffffff81885220 T ixgbe_read_phy_reg_generic +ffffffff818852e0 T ixgbe_write_phy_reg_generic +ffffffff818853a0 T ixgbe_read_phy_reg_mdi +ffffffff81885550 T ixgbe_write_phy_reg_mdi +ffffffff818856f0 T ixgbe_setup_phy_link_generic +ffffffff81885a00 T ixgbe_setup_phy_link_speed_generic +ffffffff81885a60 T ixgbe_get_phy_firmware_version_generic +ffffffff81885a90 T ixgbe_read_i2c_byte_generic +ffffffff81885ab0 T ixgbe_write_i2c_byte_generic +ffffffff81885ad0 T ixgbe_read_i2c_eeprom_generic +ffffffff81885b00 T ixgbe_write_i2c_eeprom_generic +ffffffff81885b20 T ixgbe_identify_module_generic +ffffffff81885ba0 T ixgbe_read_i2c_byte_generic_unlocked +ffffffff81885bc0 T ixgbe_write_i2c_byte_generic_unlocked +ffffffff81885be0 T ixgbe_tn_check_overtemp +ffffffff81885c60 t ixgbe_probe_phy +ffffffff81885e90 T ixgbe_check_reset_blocked +ffffffff81885ef0 T ixgbe_validate_phy_addr +ffffffff81885f60 T ixgbe_get_phy_id +ffffffff81886020 T ixgbe_get_phy_type_from_id +ffffffff818860e0 T ixgbe_get_copper_link_capabilities_generic +ffffffff818861d0 T ixgbe_get_copper_speeds_supported +ffffffff81886290 T ixgbe_check_phy_link_tnx +ffffffff81886600 T ixgbe_setup_phy_link_tnx +ffffffff81886900 T ixgbe_get_phy_firmware_version_tnx +ffffffff81886930 T ixgbe_reset_phy_nl +ffffffff81886c40 T ixgbe_get_sfp_init_sequence_offsets +ffffffff81886e90 T ixgbe_is_sfp +ffffffff81886ee0 T ixgbe_identify_sfp_module_generic +ffffffff81887320 T ixgbe_identify_qsfp_module_generic +ffffffff81887680 T ixgbe_get_supported_phy_sfp_layer_generic +ffffffff81887850 T ixgbe_is_sfp_probe +ffffffff818878a0 T ixgbe_read_i2c_byte_generic_int +ffffffff81887b40 T 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ixl_lldp_shut +ffffffff8188c400 t ixl_phy_mask_ints +ffffffff8188c4d0 t ixl_restart_an +ffffffff8188c5a0 t ixl_get_switch_config +ffffffff8188c7e0 t ixl_get_phy_types +ffffffff8188ca30 t ixl_get_link_status +ffffffff8188cb20 t ixl_get_vsi +ffffffff8188cca0 t ixl_set_vsi +ffffffff8188ce30 t ixl_intr0 +ffffffff8188d0d0 t ixl_intr_vector +ffffffff8188d190 t ixl_ioctl +ffffffff8188f1d0 t ixl_start +ffffffff8188f7d0 t ixl_watchdog +ffffffff8188f800 t ixl_media_change +ffffffff8188f830 t ixl_media_status +ffffffff8188f8c0 t ixl_media_add +ffffffff8188f960 t ixl_link_state_update +ffffffff8188fae0 t ixl_remove_macvlan +ffffffff8188fbe0 t ixl_add_macvlan +ffffffff8188fcd0 t ixl_kstat_attach +ffffffff8188fda0 t ixl_dmamem_free +ffffffff8188fe30 t ixl_hmc_free +ffffffff8188ff60 t ixl_arq_unfill +ffffffff81890080 t ixl_link_state_update_iaq +ffffffff81890140 t ixl_set_link_status +ffffffff818902c0 t ixl_atq_poll +ffffffff81890510 t ixl_rxeof +ffffffff81890820 t ixl_txeof +ffffffff81890a40 t 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T iwm_add_aux_sta +ffffffff8191e8b0 T iwm_drain_sta +ffffffff8191ea70 T iwm_rm_sta_cmd +ffffffff8191eb50 T iwm_scan_rx_chain +ffffffff8191ebc0 T iwm_scan_rate_n_flags +ffffffff8191ecc0 T iwm_lmac_scan_fill_channels +ffffffff8191edb0 T iwm_umac_scan_fill_channels +ffffffff8191ee90 T iwm_fill_probe_req_v1 +ffffffff8191ef40 T iwm_fill_probe_req +ffffffff8191f1b0 T iwm_lmac_scan +ffffffff8191f6e0 T iwm_config_umac_scan +ffffffff8191f920 T iwm_umac_scan_size +ffffffff8191f990 T iwm_get_scan_req_umac_chan_param +ffffffff8191f9e0 T iwm_get_scan_req_umac_data +ffffffff8191fa30 T iwm_umac_scan +ffffffff8191fed0 T iwm_mcc_update +ffffffff8191ff70 T iwm_ridx2rate +ffffffff8191ffe0 T iwm_ack_rates +ffffffff819202a0 T iwm_mac_ctxt_cmd_common +ffffffff819205c0 T iwm_mac_ctxt_cmd_fill_sta +ffffffff81920680 T iwm_update_quotas +ffffffff81920a50 T iwm_del_task +ffffffff81920ab0 T iwm_scan +ffffffff81920d70 T iwm_scan_abort +ffffffff81920eb0 T iwm_bgscan +ffffffff81920f60 T iwm_bgscan_done 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iwm_fill_paging_mem +ffffffff819250a0 T iwm_alloc_fw_paging_mem +ffffffff819254d0 T iwm_init_hw +ffffffff81925cd0 T iwm_preinit +ffffffff81925ed0 T iwm_start +ffffffff819260c0 T iwm_watchdog +ffffffff81926290 T iwm_nic_error +ffffffff81926900 T iwm_dump_driver_status +ffffffff819269c0 T iwm_ioctl +ffffffff81926b60 T iwm_nic_umac_error +ffffffff81927100 T iwm_desc_lookup +ffffffff81927290 T iwm_rx_pkt_valid +ffffffff819272e0 T iwm_rx_pkt +ffffffff81928230 T iwm_notif_intr +ffffffff819283c0 T iwm_intr +ffffffff81928880 T iwm_intr_msix +ffffffff81928b90 T iwm_match +ffffffff81928bc0 T iwm_attach_hook +ffffffff81928c00 T iwm_attach +ffffffff81929ba0 T iwm_radiotap_attach +ffffffff81929c40 T iwm_init_task +ffffffff81929d30 T iwm_resume +ffffffff81929eb0 T iwm_wakeup +ffffffff81929f80 T iwm_activate +ffffffff8192b000 T iwx_lookup_cmd_ver +ffffffff8192b070 T iwx_lookup_notif_ver +ffffffff8192b0e0 T iwx_is_mimo_ht_plcp +ffffffff8192b120 T iwx_store_cscheme +ffffffff8192b170 T iwx_ctxt_info_alloc_dma +ffffffff8192b220 T iwx_dma_contig_alloc +ffffffff8192b470 T iwx_ctxt_info_free_paging +ffffffff8192b600 T iwx_dma_contig_free +ffffffff8192b6f0 T iwx_get_num_sections +ffffffff8192b770 T iwx_init_fw_sec +ffffffff8192bc00 T iwx_fw_version_str +ffffffff8192bc40 T iwx_alloc_fw_monitor_block +ffffffff8192bcf0 T iwx_alloc_fw_monitor +ffffffff8192bdc0 T iwx_apply_debug_destination +ffffffff8192c390 T iwx_nic_lock +ffffffff8192c510 T iwx_write_prph +ffffffff8192c5c0 T iwx_set_bits_prph +ffffffff8192c5e0 T iwx_clear_bits_prph +ffffffff8192c600 T iwx_read_prph +ffffffff8192c6a0 T iwx_nic_unlock +ffffffff8192c760 T iwx_set_ltr +ffffffff8192c8c0 T iwx_ctxt_info_init +ffffffff8192cc20 T iwx_ctxt_info_free_fw_img +ffffffff8192cdd0 T iwx_ctxt_info_gen3_init +ffffffff8192d520 T iwx_write_umac_prph +ffffffff8192d5d0 T iwx_firmware_store_section +ffffffff8192d670 T iwx_set_default_calib +ffffffff8192d6c0 T iwx_fw_info_free +ffffffff8192d770 T iwx_read_firmware +ffffffff8192e2e0 T iwx_prph_addr_mask +ffffffff8192e320 T iwx_read_prph_unlocked +ffffffff8192e3a0 T iwx_nic_assert_locked +ffffffff8192e400 T iwx_write_prph_unlocked +ffffffff8192e490 T iwx_write_prph64 +ffffffff8192e5d0 T iwx_read_umac_prph_unlocked +ffffffff8192e660 T iwx_read_umac_prph +ffffffff8192e710 T iwx_write_umac_prph_unlocked +ffffffff8192e7a0 T iwx_read_mem +ffffffff8192e900 T iwx_write_mem +ffffffff8192ea70 T iwx_write_mem32 +ffffffff8192eba0 T iwx_poll_bit +ffffffff8192ec90 T iwx_set_bits_mask_prph +ffffffff8192eec0 T iwx_alloc_rx_ring +ffffffff8192f0d0 T iwx_rx_addbuf +ffffffff8192f320 T iwx_free_rx_ring +ffffffff8192f690 T iwx_disable_rx_dma +ffffffff8192f920 T iwx_reset_rx_ring +ffffffff8192f9c0 T iwx_alloc_tx_ring +ffffffff8192fc00 T iwx_free_tx_ring +ffffffff8192ff60 T iwx_reset_tx_ring +ffffffff81930200 T iwx_enable_rfkill_int +ffffffff81930300 T iwx_check_rfkill +ffffffff81930390 T iwx_enable_interrupts +ffffffff81930450 T iwx_enable_fwload_interrupt +ffffffff81930540 T iwx_restore_interrupts +ffffffff81930570 T iwx_disable_interrupts +ffffffff81930640 T iwx_ict_reset +ffffffff81930850 T iwx_set_hw_ready +ffffffff81930ab0 T iwx_prepare_card_hw +ffffffff81930c30 T iwx_force_power_gating +ffffffff81930d00 T iwx_apm_config +ffffffff81930e00 T iwx_apm_init +ffffffff819310f0 T iwx_apm_stop +ffffffff819315d0 T iwx_init_msix_hw +ffffffff81931690 T iwx_conf_msix_hw +ffffffff81931d60 T iwx_clear_persistence_bit +ffffffff81931f20 T iwx_start_hw +ffffffff81932400 T iwx_stop_device +ffffffff81932af0 T iwx_nic_config +ffffffff81932b80 T iwx_nic_rx_init +ffffffff81932be0 T iwx_nic_init +ffffffff81932d30 T iwx_enable_txq +ffffffff81933050 T iwx_send_cmd +ffffffff819336a0 T iwx_free_resp +ffffffff81933720 T iwx_disable_txq +ffffffff81933990 T iwx_post_alive +ffffffff81933a30 T iwx_schedule_session_protection +ffffffff81933b10 T iwx_send_cmd_pdu +ffffffff81933ba0 T iwx_unprotect_session +ffffffff81933c80 T iwx_fw_valid_tx_ant +ffffffff81933cc0 T iwx_fw_valid_rx_ant +ffffffff81933d10 T iwx_init_channel_map +ffffffff81933f20 T iwx_mimo_enabled +ffffffff81933f60 T iwx_setup_ht_rates +ffffffff81934010 T iwx_setup_vht_rates +ffffffff819340a0 T iwx_init_reorder_buffer +ffffffff81934100 T iwx_clear_reorder_buffer +ffffffff819341d0 T iwx_rx_ba_session_expired +ffffffff81934300 T iwx_rx_bar_frame_release +ffffffff819343b0 T iwx_release_frames +ffffffff819345c0 T iwx_reorder_timer_expired +ffffffff819347b0 T iwx_find_rxba_data +ffffffff81934840 T iwx_sta_rx_agg_baid_cfg_cmd +ffffffff81934a90 T iwx_send_cmd_pdu_status +ffffffff81934b20 T iwx_sta_rx_agg_sta_cmd +ffffffff81934d80 T iwx_sta_rx_agg +ffffffff819350a0 T iwx_mac_ctxt_task +ffffffff81935260 T iwx_mac_ctxt_cmd +ffffffff81935480 T iwx_phy_ctxt_task +ffffffff81935650 T iwx_phy_ctxt_update +ffffffff81935ae0 T iwx_updatechan +ffffffff81935bc0 T iwx_add_task +ffffffff81935c50 T iwx_updateprot +ffffffff81935d30 T iwx_updateslot +ffffffff81935e10 T iwx_updateedca +ffffffff81935ef0 T iwx_updatedtim +ffffffff81935fd0 T iwx_sta_tx_agg_start +ffffffff81936200 T iwx_ba_task +ffffffff81936380 T iwx_ampdu_rx_start +ffffffff81936480 T iwx_ampdu_rx_stop +ffffffff81936580 T iwx_ampdu_tx_start +ffffffff81936630 T iwx_set_mac_addr_from_csr +ffffffff81936890 T iwx_flip_hw_address +ffffffff819368e0 T iwx_is_valid_mac_addr +ffffffff81936990 T iwx_nvm_get +ffffffff81936cb0 T iwx_load_firmware +ffffffff81936ee0 T iwx_start_fw +ffffffff81937120 T iwx_pnvm_handle_section +ffffffff81937470 T iwx_ctxt_info_gen3_set_pnvm +ffffffff819374c0 T iwx_pnvm_parse +ffffffff819375b0 T iwx_load_pnvm +ffffffff819379e0 T iwx_send_tx_ant_cfg +ffffffff81937a80 T iwx_send_phy_cfg_cmd +ffffffff81937b30 T iwx_send_dqa_cmd +ffffffff81937bd0 T iwx_load_ucode_wait_alive +ffffffff81937cc0 T iwx_run_init_mvm_ucode +ffffffff81937f70 T iwx_config_ltr +ffffffff81938030 T iwx_update_rx_desc +ffffffff819380d0 T iwx_rxmq_get_signal_strength +ffffffff81938120 T iwx_rx_rx_phy_cmd +ffffffff81938190 T iwx_get_noise +ffffffff81938200 T iwx_ccmp_decap +ffffffff81938360 T iwx_rx_hwdecrypt +ffffffff81938470 T iwx_rx_frame +ffffffff81938750 T iwx_detect_duplicate +ffffffff81938870 T iwx_is_sn_less +ffffffff819388d0 T iwx_oldsn_workaround +ffffffff819389a0 T iwx_rx_reorder +ffffffff81938f70 T iwx_rx_mpdu_mq +ffffffff819392f0 T iwx_clear_tx_desc +ffffffff81939490 T iwx_txd_done +ffffffff81939580 T iwx_txq_advance +ffffffff819398d0 T iwx_tx_update_byte_tbl +ffffffff81939970 T iwx_rx_tx_cmd +ffffffff81939af0 T iwx_clear_oactive +ffffffff81939b70 T iwx_rx_compressed_ba +ffffffff81939d00 T iwx_rx_bmiss +ffffffff81939e10 T iwx_binding_cmd +ffffffff81939fa0 T iwx_get_vht_ctrl_pos +ffffffff8193a010 T iwx_phy_ctxt_cmd_uhb_v3_v4 +ffffffff8193a280 T iwx_phy_ctxt_cmd_v3_v4 +ffffffff8193a4f0 T iwx_phy_ctxt_cmd +ffffffff8193a610 T iwx_send_cmd_status +ffffffff8193a740 T iwx_cmd_done +ffffffff8193a850 T iwx_fw_rateidx_ofdm +ffffffff8193a8b0 T iwx_fw_rateidx_cck +ffffffff8193a910 T iwx_tx_fill_cmd +ffffffff8193abb0 T iwx_rval2ridx +ffffffff8193ac40 T iwx_tx +ffffffff8193b440 T iwx_flush_sta_tids +ffffffff8193b610 T iwx_drain_sta +ffffffff8193b7c0 T iwx_flush_sta +ffffffff8193bab0 T iwx_beacon_filter_send_cmd +ffffffff8193bb40 T iwx_update_beacon_abort +ffffffff8193bc50 T iwx_power_build_cmd +ffffffff8193bce0 T iwx_power_mac_update_mode +ffffffff8193bf10 T iwx_power_update_device +ffffffff8193bfc0 T iwx_enable_beacon_filter +ffffffff8193c0e0 T iwx_disable_beacon_filter +ffffffff8193c1e0 T iwx_add_sta_cmd +ffffffff8193c4f0 T iwx_rm_sta_cmd +ffffffff8193c5c0 T iwx_rm_sta +ffffffff8193ca80 T iwx_disable_mgmt_queue +ffffffff8193cb80 T iwx_umac_scan_fill_channels +ffffffff8193cca0 T iwx_fill_probe_req +ffffffff8193cf10 T iwx_config_umac_scan_reduced +ffffffff8193d080 T iwx_scan_umac_flags_v2 +ffffffff8193d0c0 T iwx_scan_umac_dwell_v10 +ffffffff8193d130 T iwx_scan_umac_fill_general_p_v10 +ffffffff8193d1c0 T iwx_scan_umac_fill_ch_p_v6 +ffffffff8193d2f0 T iwx_umac_scan_v14 +ffffffff8193d610 T iwx_mcc_update +ffffffff8193d6b0 T iwx_ridx2rate +ffffffff8193d720 T iwx_ack_rates +ffffffff8193d9e0 T iwx_mac_ctxt_cmd_common +ffffffff8193dd00 T iwx_mac_ctxt_cmd_fill_sta +ffffffff8193dd90 T iwx_clear_statistics +ffffffff8193de70 T iwx_del_task +ffffffff8193ded0 T iwx_scan +ffffffff8193e0b0 T iwx_scan_abort +ffffffff8193e160 T iwx_bgscan +ffffffff8193e200 T iwx_bgscan_done +ffffffff8193e2d0 T iwx_bgscan_done_task +ffffffff8193e680 T iwx_umac_scan_abort +ffffffff8193e720 T iwx_enable_mgmt_queue +ffffffff8193e7b0 T iwx_rs_rval2idx +ffffffff8193e820 T iwx_rs_ht_rates +ffffffff8193e8f0 T iwx_rs_vht_rates +ffffffff8193e9b0 T iwx_rs_init_v3 +ffffffff8193edc0 T iwx_rs_init_v4 +ffffffff8193f1f0 T iwx_rs_init +ffffffff8193f250 T iwx_rs_update +ffffffff8193f4f0 T iwx_phy_send_rlc +ffffffff8193f5e0 T iwx_auth +ffffffff8193f9b0 T iwx_deauth +ffffffff8193fc90 T iwx_run +ffffffff819401a0 T iwx_sf_config +ffffffff819403c0 T iwx_allow_mcast +ffffffff819404e0 T iwx_run_stop +ffffffff81940810 T iwx_node_alloc +ffffffff81940830 T iwx_set_key +ffffffff81940990 T iwx_add_sta_key +ffffffff81940c30 T iwx_setkey_task +ffffffff81940d40 T iwx_delete_key +ffffffff81940ee0 T iwx_media_change +ffffffff81940f60 T iwx_stop +ffffffff819414a0 T iwx_init +ffffffff819417c0 T iwx_newstate_task +ffffffff81941950 T iwx_newstate +ffffffff81941b70 T iwx_endscan +ffffffff81941bc0 T iwx_fill_sf_command +ffffffff81941c90 T iwx_send_bt_init_conf +ffffffff81941d30 T iwx_send_soc_conf +ffffffff81941e80 T iwx_send_update_mcc_cmd +ffffffff81942020 T iwx_send_temp_report_ths_cmd +ffffffff81942100 T iwx_init_hw +ffffffff819427b0 T iwx_preinit +ffffffff819429f0 T iwx_start +ffffffff81942be0 T iwx_watchdog +ffffffff81942e00 T iwx_nic_error +ffffffff81943470 T iwx_dump_driver_status +ffffffff81943710 T iwx_ioctl +ffffffff819438b0 T iwx_nic_umac_error +ffffffff81943e50 T iwx_desc_lookup +ffffffff81943fe0 T iwx_rx_pkt_valid +ffffffff81944030 T iwx_rx_pkt +ffffffff819451d0 T iwx_notif_intr +ffffffff81945350 T iwx_intr +ffffffff81945870 T iwx_intr_msix +ffffffff81945bd0 T iwx_match +ffffffff81945c00 T iwx_attach_hook +ffffffff81945c40 T iwx_find_device_cfg +ffffffff81945df0 T iwx_attach +ffffffff81947080 T iwx_radiotap_attach +ffffffff81947120 T iwx_init_task +ffffffff81947210 T iwx_resume +ffffffff81947390 T iwx_wakeup +ffffffff819474b0 T iwx_activate +ffffffff81948000 T qwx_pci_match +ffffffff81948030 T qwx_pci_attach +ffffffff81948d30 T qwx_pci_detach +ffffffff81949000 T qwx_pci_init_qmi_ce_config +ffffffff81949020 T qwx_pcic_init_msi_config +ffffffff819490d0 T qwx_pci_alloc_msi +ffffffff819491d0 T qwx_pcic_map_service_to_pipe +ffffffff819492d0 T qwx_pcic_get_user_msi_vector +ffffffff819493c0 T qwx_pcic_read32 +ffffffff819494c0 T qwx_pcic_write32 +ffffffff819495d0 T qwx_pci_start +ffffffff819496f0 T qwx_pci_stop +ffffffff81949770 T qwx_pci_power_up +ffffffff819498d0 T qwx_pci_power_down +ffffffff81949b70 T qwx_mhi_submit_xfer +ffffffff81949e20 T qwx_pcic_ext_irq_enable +ffffffff81949e50 T qwx_pcic_ext_irq_disable +ffffffff81949e80 T qwx_pci_intr +ffffffff8194a1f0 T qwx_pci_intr_mhi_ctrl +ffffffff8194a240 T qwx_pci_intr_mhi_data +ffffffff8194a290 T qwx_pci_read_hw_version +ffffffff8194a310 T qwx_pci_alloc_event_rings +ffffffff8194a590 T qwx_pci_init_cmd_ring +ffffffff8194a620 T qwx_mhi_register +ffffffff8194a650 T qwx_pcic_config_irq +ffffffff8194a900 T qwx_pci_attach_hook +ffffffff8194a950 T qwx_pci_free_cmd_ring +ffffffff8194a9d0 T qwx_pci_free_event_rings +ffffffff8194aad0 T qwx_pci_free_xfer_rings +ffffffff8194ab50 T qwx_pci_alloc_xfer_ring +ffffffff8194aea0 T qwx_pci_alloc_xfer_rings_qca6390 +ffffffff8194afd0 T qwx_pci_alloc_xfer_rings_qcn9074 +ffffffff8194b100 T qwx_pci_alloc_event_ring +ffffffff8194b1f0 T qwx_pci_read +ffffffff8194b220 T qwx_pci_write +ffffffff8194b250 T qwx_pcic_ce_irq_enable +ffffffff8194b290 T qwx_pcic_ce_irq_disable +ffffffff8194b2d0 T qwx_pcic_ext_grp_disable +ffffffff8194b300 T qwx_pcic_ext_irq_config +ffffffff8194b560 T qwx_pcic_ce_irqs_enable +ffffffff8194b600 T qwx_pcic_ce_irqs_disable +ffffffff8194b6a0 T qwx_pci_aspm_restore +ffffffff8194b720 T qwx_pcic_ce_irq_disable_sync +ffffffff8194b7c0 T qwx_pci_bus_wake_up +ffffffff8194b860 T qwx_mhi_wake_db_clear_valid +ffffffff8194b8a0 T qwx_mhi_device_wake +ffffffff8194b910 T qwx_pci_bus_release +ffffffff8194b9b0 T qwx_mhi_device_zzz +ffffffff8194ba10 T qwx_pci_get_window_start +ffffffff8194ba80 T qwx_pci_select_window +ffffffff8194bb30 T qwx_pci_window_write32 +ffffffff8194bc40 T qwx_pci_window_read32 +ffffffff8194bd40 T qwx_pci_select_static_window +ffffffff8194bd70 T qwx_pci_soc_global_reset +ffffffff8194c0a0 T qwx_pci_clear_dbg_registers +ffffffff8194c440 T qwx_pci_set_link_reg +ffffffff8194c720 T qwx_pci_fix_l1ss +ffffffff8194c810 T qwx_pci_enable_ltssm +ffffffff8194cc60 T qwx_pci_clear_all_intrs +ffffffff8194cd60 T qwx_pci_set_wlaon_pwr_ctrl +ffffffff8194cf20 T qwx_pci_force_wake +ffffffff8194d010 T qwx_pci_sw_reset +ffffffff8194d200 T qwx_mhi_clear_vector +ffffffff8194d2b0 T qwx_mhi_reset_device +ffffffff8194d440 T qwx_pci_msi_config +ffffffff8194d4b0 T qwx_pci_msi_enable +ffffffff8194d510 T qwx_pci_msi_disable +ffffffff8194d570 T qwx_pci_aspm_disable +ffffffff8194d610 T qwx_mhi_start +ffffffff8194d9b0 T qwx_mhi_stop +ffffffff8194d9d0 T qwx_mhi_unregister +ffffffff8194da00 T qwx_mhi_ring_doorbell +ffffffff8194da70 T qwx_mhi_init_xfer_rings +ffffffff8194db70 T qwx_mhi_init_event_rings +ffffffff8194dcc0 T qwx_mhi_init_cmd_ring +ffffffff8194dd40 T qwx_mhi_init_dev_ctxt +ffffffff8194df10 T qwx_pci_cmd_ring_get_elem +ffffffff8194df70 T qwx_mhi_cmd_ring_submit +ffffffff8194e0c0 T qwx_mhi_send_cmd +ffffffff8194e1a0 T qwx_pci_xfer_ring_get_elem +ffffffff8194e1f0 T qwx_pci_xfer_ring_get_data +ffffffff8194e240 T qwx_mhi_start_channel +ffffffff8194e550 T qwx_mhi_start_channels +ffffffff8194e680 T qwx_rddm_prepare +ffffffff8194e950 T qwx_mhi_fw_load_handler +ffffffff8194ebc0 T qwx_mhi_await_device_reset +ffffffff8194ec90 T qwx_mhi_fw_load_bhi +ffffffff8194ef30 T qwx_mhi_fw_load_bhie +ffffffff8194f300 T qwx_mhi_await_device_ready +ffffffff8194f4a0 T qwx_mhi_ready_state_transition +ffffffff8194f6a0 T qwx_mhi_init_mmio +ffffffff8194fa00 T qwx_mhi_set_state +ffffffff8194fa80 T qwx_mhi_mission_mode_state_transition +ffffffff8194fc00 T qwx_mhi_low_power_mode_state_transition +ffffffff8194fc70 T qwx_pci_event_ring_get_elem +ffffffff8194fcc0 T qwx_mhi_state_change +ffffffff81950070 T qwx_pci_intr_ctrl_event_mhi +ffffffff819500b0 T qwx_pci_intr_ctrl_event_ee +ffffffff819500f0 T qwx_pci_intr_ctrl_event_cmd_complete +ffffffff81950210 T qwx_pci_intr_ctrl_event +ffffffff81950580 T qwx_pci_intr_data_event_tx +ffffffff81950920 T qwx_pci_intr_data_event +ffffffff81951000 T cmpci_match +ffffffff81951030 T cmpci_attach +ffffffff81951610 T cmpci_activate +ffffffff819516b0 T cmpci_open +ffffffff819516e0 T cmpci_close +ffffffff81951710 T cmpci_set_params +ffffffff819522c0 T cmpci_round_blocksize +ffffffff819522f0 T cmpci_halt_output +ffffffff81952530 T cmpci_halt_input +ffffffff81952730 T cmpci_set_port +ffffffff819528a0 T cmpci_get_port +ffffffff81952970 T cmpci_query_devinfo +ffffffff81953280 T cmpci_malloc +ffffffff819532e0 T cmpci_free +ffffffff819533d0 T cmpci_round_buffersize +ffffffff81953410 T cmpci_trigger_output +ffffffff819537a0 T cmpci_trigger_input +ffffffff81953af0 T cmpci_mixerreg_read +ffffffff81953ba0 T cmpci_mixerreg_write +ffffffff81953c30 T cmpci_reg_partial_write_1 +ffffffff81953cd0 T cmpci_reg_partial_write_4 +ffffffff81953d70 T cmpci_reg_set_1 +ffffffff81953df0 T cmpci_reg_clear_1 +ffffffff81953e70 T cmpci_reg_set_4 +ffffffff81953ef0 T cmpci_reg_clear_4 +ffffffff81953f70 T cmpci_reg_set_reg_misc +ffffffff81953fc0 T cmpci_reg_clear_reg_misc +ffffffff81954010 T cmpci_rate_to_index +ffffffff81954090 T cmpci_index_to_rate +ffffffff819540c0 T cmpci_index_to_divider +ffffffff819540f0 T cmpci_intr +ffffffff819544a0 T cmpci_set_mixer_gain +ffffffff81954d10 T cmpci_resume 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+ffffffff8195ae40 T bge_ape_read_fw_ver +ffffffff8195afc0 T bge_ape_lock +ffffffff8195b1b0 T bge_ape_unlock +ffffffff8195b270 T bge_ape_send_event +ffffffff8195b490 T bge_ape_driver_state_change +ffffffff8195b6d0 T bge_nvram_getbyte +ffffffff8195b9b0 T bge_read_nvram +ffffffff8195ba70 T bge_eeprom_getbyte +ffffffff8195bc60 T bge_read_eeprom +ffffffff8195bd00 T bge_miibus_readreg +ffffffff8195c050 T bge_miibus_writereg +ffffffff8195c3b0 T bge_miibus_statchg +ffffffff8195c5e0 T bge_newbuf +ffffffff8195c7a0 T bge_newbuf_jumbo +ffffffff8195ca60 T bge_init_rx_ring_std +ffffffff8195cbf0 T bge_fill_rx_ring_std +ffffffff8195cd70 T bge_rxtick +ffffffff8195cdb0 T bge_rxtick_jumbo +ffffffff8195cdf0 T bge_fill_rx_ring_jumbo +ffffffff8195cf70 T bge_free_rx_ring_std +ffffffff8195d0c0 T bge_init_rx_ring_jumbo +ffffffff8195d2c0 T bge_free_rx_ring_jumbo +ffffffff8195d450 T bge_free_tx_ring +ffffffff8195d540 T bge_init_tx_ring +ffffffff8195d740 T bge_iff +ffffffff8195d8d0 T bge_sig_pre_reset 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bge_rxrinfo +ffffffff819646f0 T bge_stop_block +ffffffff819647e0 T bge_kstat_read +ffffffff81965000 T bnx_probe +ffffffff81965030 T bnx_attach +ffffffff819654a0 T nswaph +ffffffff819654f0 T bnx_read_firmware +ffffffff819660e0 T bnx_read_rv2p +ffffffff81966220 T bnx_reg_rd_ind +ffffffff81966280 T bnx_intr +ffffffff81966550 T bnx_attachhook +ffffffff81966a00 T bnx_release_resources +ffffffff81966a80 T bnx_reset +ffffffff819670d0 T bnx_chipinit +ffffffff819673d0 T bnx_nvram_test +ffffffff81967560 T bnx_get_mac_addr +ffffffff819676a0 T bnx_get_media +ffffffff81967860 T bnx_dma_alloc +ffffffff81968310 T bnx_ioctl +ffffffff81968570 T bnx_start +ffffffff81968740 T bnx_watchdog +ffffffff819687e0 T bnx_miibus_read_reg +ffffffff81968ac0 T bnx_miibus_write_reg +ffffffff81968d60 T bnx_miibus_statchg +ffffffff81968f70 T bnx_init_media +ffffffff81969020 T bnx_ifmedia_upd +ffffffff819690b0 T bnx_ifmedia_sts +ffffffff81969130 T bnx_tick +ffffffff81969270 T bnx_rxrefill +ffffffff819692d0 T bnx_mgmt_init +ffffffff81969420 T bnx_reg_wr_ind +ffffffff81969480 T bnx_ctx_wr +ffffffff819696e0 T bnx_acquire_nvram_lock +ffffffff819697b0 T bnx_release_nvram_lock +ffffffff81969880 T bnx_enable_nvram_access +ffffffff819698e0 T bnx_disable_nvram_access +ffffffff81969940 T bnx_nvram_read_dword +ffffffff81969af0 T bnx_init_nvram +ffffffff8196a320 T bnx_nvram_read +ffffffff8196a6d0 T bnx_dma_free +ffffffff8196ad40 T bnx_fw_sync +ffffffff8196af60 T bnx_load_rv2p_fw +ffffffff8196b090 T bnx_load_cpu_fw +ffffffff8196b660 T bnx_init_cpus +ffffffff8196c070 T bnx_init_context +ffffffff8196c960 T bnx_set_mac_addr +ffffffff8196c9e0 T bnx_stop +ffffffff8196cd70 T bnx_disable_intr +ffffffff8196cdd0 T bnx_free_rx_chain +ffffffff8196cec0 T bnx_free_tx_chain +ffffffff8196cff0 T bnx_blockinit +ffffffff8196d6e0 T bnx_get_buf +ffffffff8196d8d0 T bnx_init_tx_context +ffffffff8196d9a0 T bnx_init_tx_chain +ffffffff8196db00 T bnx_init_rx_context +ffffffff8196dbe0 T bnx_fill_rx_chain +ffffffff8196dd40 T bnx_init_rx_chain +ffffffff8196de70 T bnx_phy_intr +ffffffff8196df20 T bnx_rx_intr +ffffffff8196e2e0 T bnx_tx_intr +ffffffff8196e460 T bnx_enable_intr +ffffffff8196e530 T bnx_init +ffffffff8196ea30 T bnx_iff +ffffffff8196eef0 T bnx_tx_encap +ffffffff8196f150 T bnx_stats_update +ffffffff81970000 T vge_probe +ffffffff81970030 T vge_attach +ffffffff81970510 T vge_detach +ffffffff81970610 T vge_read_eeprom +ffffffff81970740 T vge_miipoll_stop +ffffffff81970820 T vge_miipoll_start +ffffffff819709b0 T vge_miibus_readreg +ffffffff81970c10 T vge_miibus_writereg +ffffffff81970e60 T vge_cam_clear +ffffffff819712c0 T vge_cam_set +ffffffff81971770 T vge_iff +ffffffff81971950 T vge_reset +ffffffff81971b50 T vge_allocmem +ffffffff81972030 T vge_freemem +ffffffff819721d0 T vge_intr +ffffffff81972420 T vge_ioctl +ffffffff819725b0 T vge_start +ffffffff81972800 T vge_watchdog +ffffffff819728a0 T vge_miibus_statchg +ffffffff81972b40 T vge_ifmedia_upd +ffffffff81972b60 T vge_ifmedia_sts +ffffffff81972bd0 T vge_tick +ffffffff81972cd0 T vge_stop +ffffffff81972f40 T vge_newbuf +ffffffff81973190 T vge_tx_list_init +ffffffff81973250 T vge_rx_list_init +ffffffff81973370 T vge_rxeof +ffffffff81973820 T vge_txeof +ffffffff819739c0 T vge_init +ffffffff81974370 T vge_encap +ffffffff81975000 T stge_match +ffffffff81975030 T stge_attach +ffffffff81975930 T stge_mii_bitbang_read +ffffffff81975980 T stge_mii_bitbang_write +ffffffff819759b0 T stge_tick +ffffffff81975b50 T stge_intr +ffffffff81975ef0 T stge_reset +ffffffff81976000 T stge_read_eeprom +ffffffff81976170 T stge_mii_readreg +ffffffff81976190 T stge_mii_writereg +ffffffff819761b0 T stge_mii_statchg +ffffffff81976200 T stge_mediachange +ffffffff81976250 T stge_mediastatus +ffffffff819762c0 T stge_ioctl +ffffffff81976450 T stge_start +ffffffff819767c0 T stge_watchdog +ffffffff81976870 T stge_txintr +ffffffff819769e0 T stge_init +ffffffff81977380 T stge_stop +ffffffff81977630 T stge_iff +ffffffff81977770 T stge_rxintr +ffffffff81977ce0 T stge_stats_update +ffffffff81977e40 T stge_add_rxbuf +ffffffff81978090 T stge_rxdrain +ffffffff81979000 T nfe_match +ffffffff81979030 T nfe_attach +ffffffff819797f0 T nfe_activate +ffffffff81979870 T nfe_stop +ffffffff81979a30 T nfe_init +ffffffff8197a120 T nfe_intr +ffffffff8197a230 T nfe_get_macaddr +ffffffff8197a330 T nfe_alloc_tx_ring +ffffffff8197a580 T nfe_alloc_rx_ring +ffffffff8197a950 T nfe_free_tx_ring +ffffffff8197ab00 T nfe_ioctl +ffffffff8197ac90 T nfe_start +ffffffff8197aec0 T nfe_watchdog +ffffffff8197af30 T nfe_wol +ffffffff8197afb0 T nfe_miibus_readreg +ffffffff8197b170 T nfe_miibus_writereg +ffffffff8197b310 T nfe_miibus_statchg +ffffffff8197b4b0 T nfe_ifmedia_upd +ffffffff8197b510 T nfe_ifmedia_sts +ffffffff8197b580 T nfe_tick +ffffffff8197b5f0 T nfe_rxeof +ffffffff8197ba30 T nfe_txeof +ffffffff8197bd00 T nfe_iff +ffffffff8197c020 T nfe_txdesc32_sync +ffffffff8197c060 T nfe_txdesc64_sync +ffffffff8197c0a0 T nfe_txdesc32_rsync +ffffffff8197c140 T nfe_txdesc64_rsync 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jme_discard_rxbufs +ffffffff819861e0 T jme_rxpkt +ffffffff81986580 T jme_newbuf +ffffffff81986730 T jme_init_rx_ring +ffffffff81986860 T jme_set_vlan +ffffffff81987000 T age_match +ffffffff81987030 T age_attach +ffffffff819875e0 T age_intr +ffffffff81987800 T age_phy_reset +ffffffff81988250 T age_reset +ffffffff819883c0 T age_dma_alloc +ffffffff81988c40 T age_get_macaddr +ffffffff81988e50 T age_ioctl +ffffffff81988fe0 T age_start +ffffffff81989180 T age_watchdog +ffffffff81989230 T age_miibus_readreg +ffffffff81989350 T age_miibus_writereg +ffffffff81989470 T age_miibus_statchg +ffffffff81989680 T age_mediachange +ffffffff819896e0 T age_mediastatus +ffffffff81989750 T age_tick +ffffffff819897d0 T age_dma_free +ffffffff81989ad0 T age_detach +ffffffff81989be0 T age_stop +ffffffff81989fc0 T age_stop_rxmac +ffffffff8198a110 T age_stop_txmac +ffffffff8198a260 T age_mac_config +ffffffff8198a310 T age_rxintr +ffffffff8198a510 T age_txintr +ffffffff8198a700 T age_init +ffffffff8198b2e0 T age_stats_update +ffffffff8198b610 T age_encap +ffffffff8198b8a0 T age_iff +ffffffff8198ba20 T age_rxeof +ffffffff8198bdd0 T age_newbuf +ffffffff8198bfb0 T age_init_rx_ring +ffffffff8198c0a0 T age_init_rr_ring +ffffffff8198c130 T age_init_tx_ring +ffffffff8198c1f0 T age_init_cmb_block +ffffffff8198c240 T age_init_smb_block +ffffffff8198c2a0 T age_rxvlan +ffffffff8198d000 T alc_match +ffffffff8198d030 T alc_attach +ffffffff8198da00 T alc_detach +ffffffff8198db30 T alc_activate +ffffffff8198dba0 T alc_miibus_readreg +ffffffff8198dd90 T alc_mii_readreg_816x +ffffffff8198deb0 T alc_mii_readreg_813x +ffffffff8198dfe0 T alc_miibus_writereg +ffffffff8198e1d0 T alc_mii_writereg_816x +ffffffff8198e300 T alc_mii_writereg_813x +ffffffff8198e410 T alc_miibus_statchg +ffffffff8198e830 T alc_stop_mac +ffffffff8198e940 T alc_start_queue +ffffffff8198ea10 T alc_mac_config +ffffffff8198eaf0 T alc_aspm +ffffffff8198ebc0 T alc_dsp_fixup +ffffffff8198f2b0 T alc_miidbg_readreg +ffffffff8198f300 T alc_miidbg_writereg +ffffffff8198f350 T alc_miiext_readreg +ffffffff8198f4a0 T alc_miiext_writereg +ffffffff8198f600 T alc_mediastatus +ffffffff8198f680 T alc_mediachange +ffffffff8198f6e0 T alc_get_macaddr +ffffffff8198f700 T alc_get_macaddr_816x +ffffffff8198fa10 T alc_get_macaddr_813x +ffffffff8198ffc0 T alc_get_macaddr_par +ffffffff81990080 T alc_disable_l0s_l1 +ffffffff81990110 T alc_phy_reset +ffffffff81990130 T alc_phy_reset_816x +ffffffff81990be0 T alc_phy_reset_813x +ffffffff819910f0 T alc_phy_down +ffffffff81991230 T alc_aspm_816x +ffffffff819912f0 T alc_aspm_813x +ffffffff819914f0 T alc_init_pcie +ffffffff819918f0 T alc_config_msi +ffffffff819919d0 T alc_intr +ffffffff81991c00 T alc_reset +ffffffff81992080 T alc_dma_alloc +ffffffff81992900 T alc_ioctl +ffffffff81992a90 T alc_start +ffffffff81992c50 T alc_watchdog +ffffffff81992ce0 T alc_tick +ffffffff81992d70 T alc_dma_free +ffffffff81993080 T alc_stop +ffffffff81993490 T alc_init +ffffffff81994650 T alc_encap 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ale_dma_alloc +ffffffff81998350 T ale_ioctl +ffffffff819984e0 T ale_start +ffffffff81998660 T ale_watchdog +ffffffff819986f0 T ale_tick +ffffffff81998780 T ale_dma_free +ffffffff81998a70 T ale_detach +ffffffff81998b80 T ale_stop +ffffffff81998ef0 T ale_init +ffffffff81999af0 T ale_encap +ffffffff81999d80 T ale_txeof +ffffffff81999f90 T ale_iff +ffffffff8199a110 T ale_stats_clear +ffffffff8199a200 T ale_stats_update +ffffffff8199a5a0 T ale_rxeof +ffffffff8199a880 T ale_rx_update_page +ffffffff8199aa00 T ale_rxcsum +ffffffff8199aab0 T ale_init_rx_pages +ffffffff8199ac10 T ale_init_tx_ring +ffffffff8199ad10 T ale_rxvlan +ffffffff8199b000 T amdpm_match +ffffffff8199b030 T amdpm_attach +ffffffff8199b400 T amdpm_activate +ffffffff8199b470 T amdpm_rnd_callout +ffffffff8199b4f0 T amdpm_i2c_acquire_bus +ffffffff8199b550 T amdpm_i2c_release_bus +ffffffff8199b5a0 T amdpm_i2c_exec +ffffffff8199b980 T amdpm_get_timecount +ffffffff8199b9b0 T amdpm_intr +ffffffff8199c000 T bce_probe +ffffffff8199c030 T bce_attach +ffffffff8199ca40 T bce_activate +ffffffff8199cac0 T bce_intr +ffffffff8199ce40 T bce_reset +ffffffff8199d580 T bce_ioctl +ffffffff8199d720 T bce_start +ffffffff8199d9a0 T bce_watchdog +ffffffff8199da00 T bce_mii_read +ffffffff8199db70 T bce_mii_write +ffffffff8199dcd0 T bce_statchg +ffffffff8199e150 T bce_mediachange +ffffffff8199e1a0 T bce_mediastatus +ffffffff8199e210 T bce_tick +ffffffff8199e280 T bce_stop +ffffffff8199e3f0 T bce_init +ffffffff8199e910 T bce_iff +ffffffff8199ea30 T bce_rxintr +ffffffff8199ec00 T bce_txintr +ffffffff8199ed00 T bce_add_rxbuf +ffffffff8199edc0 T bce_add_mac +ffffffff8199f000 T ath_pci_match +ffffffff8199f070 T ath_pci_attach +ffffffff8199f2f0 T ath_pci_detach +ffffffff819a0000 T athn_pci_match +ffffffff819a0030 T athn_pci_attach +ffffffff819a0340 T athn_pci_detach +ffffffff819a03c0 T athn_pci_activate +ffffffff819a04a0 T athn_pci_read +ffffffff819a04d0 T athn_pci_write +ffffffff819a0500 T athn_pci_write_barrier +ffffffff819a0530 T athn_pci_disable_aspm +ffffffff819a05a0 T athn_pci_wakeup +ffffffff819a1000 T atw_pci_match +ffffffff819a1030 T atw_pci_attach +ffffffff819a1300 T atw_pci_detach +ffffffff819a1390 t atw_pci_enable +ffffffff819a1440 t atw_pci_disable +ffffffff819a2000 T rtw_pci_match +ffffffff819a2030 T rtw_pci_attach +ffffffff819a22a0 T rtw_pci_detach +ffffffff819a2330 T rtw_pci_enable +ffffffff819a23e0 T rtw_pci_disable +ffffffff819a3000 T rtwn_pci_match +ffffffff819a3030 T rtwn_pci_attach +ffffffff819a3700 T rtwn_pci_detach +ffffffff819a3880 T rtwn_pci_activate +ffffffff819a38a0 T rtwn_calib_to +ffffffff819a3920 T rtwn_scan_to +ffffffff819a3940 T rtwn_intr +ffffffff819a3c80 T rtwn_alloc_rx_list +ffffffff819a4000 T rtwn_alloc_tx_list +ffffffff819a4290 T rtwn_free_rx_list +ffffffff819a4420 T rtwn_pci_write_1 +ffffffff819a4450 T rtwn_pci_write_2 +ffffffff819a4480 T rtwn_pci_write_4 +ffffffff819a44b0 T rtwn_pci_read_1 +ffffffff819a44e0 T rtwn_pci_read_2 +ffffffff819a4510 T rtwn_pci_read_4 +ffffffff819a4540 T rtwn_tx +ffffffff819a4b50 T rtwn_power_on +ffffffff819a4b80 T rtwn_dma_init +ffffffff819a4ff0 T rtwn_pci_load_firmware +ffffffff819a50a0 T rtwn_fw_loadpage +ffffffff819a5200 T rtwn_mac_init +ffffffff819a5350 T rtwn_bb_init +ffffffff819a5920 T rtwn_alloc_buffers +ffffffff819a5950 T rtwn_pci_init +ffffffff819a5a50 T rtwn_pci_stop +ffffffff819a5c10 T rtwn_is_oactive +ffffffff819a5c50 T rtwn_next_calib +ffffffff819a5c70 T rtwn_cancel_calib +ffffffff819a5cb0 T rtwn_pci_next_scan +ffffffff819a5cd0 T rtwn_cancel_scan +ffffffff819a5d10 T rtwn_wait_async +ffffffff819a5d40 T rtwn_free_tx_list +ffffffff819a5ee0 T rtwn_setup_rx_desc +ffffffff819a5f50 T rtwn_reset_rx_list +ffffffff819a5ff0 T rtwn_reset_tx_list +ffffffff819a6170 T rtwn_rx_frame +ffffffff819a6650 T rtwn_tx_done +ffffffff819a6820 T rtwn_poll_c2h_events +ffffffff819a6a10 T rtwn_pci_92c_stop +ffffffff819a6c70 T rtwn_pci_88e_stop +ffffffff819a7190 T rtwn_pci_23a_stop +ffffffff819a7660 T rtwn_88e_intr +ffffffff819a7a20 T rtwn_llt_write +ffffffff819a7b00 T rtwn_llt_init +ffffffff819a7e20 T rtwn_92c_power_on +ffffffff819a83e0 T rtwn_88e_power_on +ffffffff819a8920 T rtwn_23a_power_on +ffffffff819a8ef0 T rtwn_tx_report +ffffffff819a9000 T ral_pci_match +ffffffff819a9030 T ral_pci_attach +ffffffff819a9260 T ral_pci_detach +ffffffff819a9310 T ral_pci_activate +ffffffff819a93b0 T ral_pci_wakeup +ffffffff819aa000 T acx_pci_match +ffffffff819aa030 T acx_pci_attach +ffffffff819aa2c0 T acx_pci_detach +ffffffff819ab000 T pgt_pci_match +ffffffff819ab030 T pgt_pci_attach +ffffffff819ab260 T pgt_pci_detach +ffffffff819ac000 T malo_pci_match +ffffffff819ac030 T malo_pci_attach +ffffffff819ac230 T malo_pci_detach +ffffffff819ac290 T malo_pci_activate +ffffffff819ac300 T malo_pci_wakeup +ffffffff819ad000 T bwi_pci_match +ffffffff819ad070 T bwi_pci_attach +ffffffff819ad300 T bwi_pci_detach +ffffffff819ad360 T bwi_pci_activate +ffffffff819ad3e0 T bwi_reset_bcm4331 +ffffffff819ad540 T bwi_pci_conf_write +ffffffff819ad570 T bwi_pci_conf_read +ffffffff819ad5a0 T bwi_pci_wakeup +ffffffff819ae000 T piixpm_match +ffffffff819ae030 T piixpm_attach +ffffffff819ae5a0 T piixpm_intr +ffffffff819ae6e0 T piixpm_i2c_acquire_bus +ffffffff819ae7e0 T piixpm_i2c_release_bus +ffffffff819ae8d0 T piixpm_i2c_exec +ffffffff819af000 T vic_match +ffffffff819af0b0 T vic_attach +ffffffff819af520 T vic_intr +ffffffff819af5c0 T vic_query +ffffffff819af8a0 T vic_alloc_data +ffffffff819afbf0 T vic_tick +ffffffff819afc70 T vic_ioctl +ffffffff819afee0 T vic_start +ffffffff819b0290 T vic_watchdog +ffffffff819b02c0 T vic_media_change +ffffffff819b02f0 T vic_media_status +ffffffff819b03b0 T vic_read +ffffffff819b03d0 T vic_read_cmd +ffffffff819b0430 T vic_getlladdr +ffffffff819b04f0 T vic_alloc_dmamem +ffffffff819b0690 T vic_rx_fill +ffffffff819b08a0 T vic_alloc_mbuf +ffffffff819b0980 T vic_init_data +ffffffff819b0db0 T vic_uninit_data +ffffffff819b0fd0 T vic_link_state +ffffffff819b1060 T vic_write +ffffffff819b10b0 T vic_rx_proc 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vmxnet3_rxfill +ffffffff819b48a0 T vmxnet3_rxinit +ffffffff819b4a90 T vmxnet3_txstop +ffffffff819b4bb0 T vmxnet3_rxstop +ffffffff819b4d60 T vmxnet3_enable_all_intrs +ffffffff819b4e40 T vmxnet3_disable_all_intrs +ffffffff819b4f20 T vmxnet3_evintr +ffffffff819b5120 T vmxnet3_rxintr +ffffffff819b55c0 T vmxnet3_txintr +ffffffff819b57b0 T vmxnet3_init +ffffffff819b5c20 T vmxnet3_rx_offload +ffffffff819b5df0 T vmxnet3_iff +ffffffff819b5f40 T vmxnet3_stop +ffffffff819b6260 T vmxnet3_reset +ffffffff819b62a0 T vmxnet3_tx_offload +ffffffff819b6440 t vmx_kstat_create +ffffffff819b66a0 t vmx_kstat_read +ffffffff819b7000 T vmwpvs_match +ffffffff819b7040 T vmwpvs_attach +ffffffff819b7bc0 T vmwpvs_scsi_cmd +ffffffff819b80a0 T vmwpvs_intx +ffffffff819b8130 T vmwpvs_msg_task +ffffffff819b8410 T vmwpvs_intr +ffffffff819b8640 T vmwpvs_get_config +ffffffff819b88d0 T vmwpvs_dmamem_zalloc +ffffffff819b8940 T vmwpvs_dmamem_alloc +ffffffff819b8af0 T vmwpvs_ccb_put +ffffffff819b8b60 T vmwpvs_setup_rings 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virtio_pci_write_device_config_1 +ffffffff819cb8f0 T virtio_pci_write_device_config_2 +ffffffff819cb920 T virtio_pci_write_device_config_4 +ffffffff819cb950 T virtio_pci_write_device_config_8 +ffffffff819cb9c0 T virtio_pci_read_queue_size +ffffffff819cba40 T virtio_pci_setup_queue +ffffffff819cbd70 T virtio_pci_setup_intrs +ffffffff819cbeb0 T virtio_pci_get_status +ffffffff819cbf20 T virtio_pci_set_status +ffffffff819cc090 T virtio_pci_negotiate_features +ffffffff819cc1f0 T virtio_pci_poll_intr +ffffffff819cc270 T virtio_pci_set_msix_queue_vector +ffffffff819cc2f0 T virtio_pci_set_msix_config_vector +ffffffff819cc330 T virtio_pci_find_cap +ffffffff819cc500 T virtio_pci_attach_10 +ffffffff819cc9d0 T virtio_pci_attach_09 +ffffffff819ccb40 T virtio_pci_adjust_config_region +ffffffff819ccbf0 T virtio_pci_setup_msix +ffffffff819cce00 T virtio_pci_legacy_intr +ffffffff819cced0 T virtio_pci_legacy_intr_mpsafe +ffffffff819ccf80 T virtio_pci_free_irqs +ffffffff819cd140 T virtio_pci_negotiate_features_10 +ffffffff819cd3f0 T virtio_pci_msix_establish +ffffffff819cd570 T virtio_pci_config_intr +ffffffff819cd5b0 T virtio_pci_shared_queue_intr +ffffffff819cd5c0 T virtio_pci_queue_intr +ffffffff819ce000 T dwiic_pci_match +ffffffff819ce030 T dwiic_pci_attach +ffffffff819ce410 T dwiic_pci_activate +ffffffff819ce490 T dwiic_pci_bus_scan +ffffffff819cf000 T bwfm_pci_buscore_read +ffffffff819cf070 T bwfm_pci_buscore_write +ffffffff819cf0f0 T bwfm_pci_buscore_prepare +ffffffff819cf120 T bwfm_pci_buscore_reset +ffffffff819cf390 T bwfm_pci_buscore_activate +ffffffff819cf3c0 T bwfm_pci_preinit +ffffffff819d0410 T bwfm_pci_stop +ffffffff819d04b0 T bwfm_pci_txcheck +ffffffff819d0570 T bwfm_pci_txdata +ffffffff819d0910 T bwfm_pci_msgbuf_query_dcmd +ffffffff819d0dd0 T bwfm_pci_msgbuf_set_dcmd +ffffffff819d0e20 T bwfm_pci_match +ffffffff819d0e50 T bwfm_pci_attach +ffffffff819d1170 T bwfm_pci_detach +ffffffff819d11d0 T bwfm_pci_activate +ffffffff819d13f0 T bwfm_pci_intr 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bwfm_pci_ring_update_rptr +ffffffff819d3c90 T bwfm_pci_ring_update_wptr +ffffffff819d3d40 T bwfm_pci_ring_write_reserve_multi +ffffffff819d3e60 T bwfm_pci_ring_read_avail +ffffffff819d3f70 T bwfm_pci_ring_read_commit +ffffffff819d4000 T bwfm_pci_ring_rx +ffffffff819d4230 T bwfm_pci_msg_rx +ffffffff819d48d0 T bwfm_pci_flowring_delete_cb +ffffffff819d49a0 T bwfm_pci_msgbuf_rxioctl +ffffffff819d4aa0 T bwfm_pci_intr_status +ffffffff819d4ae0 T bwfm_pci_intr_ack +ffffffff819d4b20 T bwfm_pci_flowring_lookup +ffffffff819d4cb0 T bwfm_pci_flowring_create +ffffffff819d4df0 T bwfm_pci_flowring_create_cb +ffffffff819d5170 T bwfm_pci_flowring_delete +ffffffff819d5490 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff819d56e0 T bwfm_pci_handle_mb_data +ffffffff819d57d0 T bwfm_pci_intr_disable +ffffffff819d6000 T ccp_pci_match +ffffffff819d6030 T ccp_pci_attach +ffffffff819d7000 T psp_pci_match +ffffffff819d70a0 T psp_pci_intr_map +ffffffff819d7220 T psp_pci_attach +ffffffff819d8000 T bnxt_match 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bnxt_hwrm_port_phy_qcfg +ffffffff819db660 T bnxt_free_slots +ffffffff819db710 T bnxt_hwrm_cmd_hdr_init +ffffffff819db760 T hwrm_send_message +ffffffff819db7f0 T bnxt_queue_up +ffffffff819dc5a0 T bnxt_hwrm_stat_ctx_alloc +ffffffff819dc6c0 T bnxt_write_tx_doorbell +ffffffff819dc740 T bnxt_write_rx_doorbell +ffffffff819dc7c0 T bnxt_hwrm_ring_grp_alloc +ffffffff819dc8e0 T bnxt_rx_fill +ffffffff819dc990 T bnxt_rx_fill_ag +ffffffff819dca50 T bnxt_hwrm_ring_grp_free +ffffffff819dcb60 T bnxt_hwrm_ring_free +ffffffff819dcc70 T bnxt_hwrm_stat_ctx_free +ffffffff819dcd80 T bnxt_queue_down +ffffffff819dd610 T bnxt_up +ffffffff819ddce0 T bnxt_hwrm_vnic_ctx_alloc +ffffffff819dddd0 T bnxt_hwrm_vnic_alloc +ffffffff819ddee0 T bnxt_hwrm_vnic_cfg +ffffffff819de040 T bnxt_hwrm_vnic_cfg_placement +ffffffff819de130 T bnxt_hwrm_set_filter +ffffffff819de2d0 T bnxt_hwrm_vnic_rss_cfg +ffffffff819de3c0 T bnxt_iff +ffffffff819de540 T bnxt_hwrm_vnic_free +ffffffff819de650 T bnxt_hwrm_vnic_ctx_free +ffffffff819de760 T bnxt_down +ffffffff819dec10 T bnxt_hwrm_free_filter +ffffffff819ded10 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff819dee00 T bnxt_rxrinfo +ffffffff819def70 T bnxt_get_sffpage +ffffffff819df2f0 T bnxt_load_mbuf +ffffffff819df3c0 T bnxt_handle_async_event +ffffffff819df410 T bnxt_cpr_next_cmpl +ffffffff819df480 T bnxt_cpr_commit +ffffffff819df4b0 T bnxt_cpr_rollback +ffffffff819df4e0 T bnxt_write_cp_doorbell_index +ffffffff819df560 T bnxt_rx +ffffffff819df830 T bnxt_txeof +ffffffff819df970 T bnxt_get_media_type +ffffffff819dfed0 T bnxt_add_media_type +ffffffff819e0090 T _hwrm_send_message +ffffffff819e2e40 T bnxt_rx_fill_slots +ffffffff819e3040 T bnxt_hwrm_err_map +ffffffff819e3080 T _bnxt_hwrm_set_async_event_bit +ffffffff819e4000 t mcx_match +ffffffff819e4030 t mcx_attach +ffffffff819e4fb0 T mcx_rx_fill +ffffffff819e5250 T mcx_load_mbuf +ffffffff819e5320 t mcx_dmamem_alloc +ffffffff819e54b0 t mcx_init_wait +ffffffff819e5550 t mcx_enable_hca +ffffffff819e5770 t mcx_issi +ffffffff819e5b80 t mcx_pages +ffffffff819e6680 t mcx_hca_max_caps +ffffffff819e6cb0 t mcx_hca_set_caps +ffffffff819e7240 t mcx_init_hca +ffffffff819e7450 t mcx_set_driver_version +ffffffff819e7850 t mcx_iff +ffffffff819e7d40 t mcx_alloc_uar +ffffffff819e7f80 t mcx_alloc_pd +ffffffff819e81b0 t mcx_alloc_tdomain +ffffffff819e83e0 t mcx_admin_intr +ffffffff819e85d0 t mcx_create_eq +ffffffff819e8c50 t mcx_query_nic_vport_context +ffffffff819e90a0 t mcx_query_special_contexts +ffffffff819e92d0 t mcx_set_port_mtu +ffffffff819e9400 t mcx_ioctl +ffffffff819ebbd0 t mcx_start +ffffffff819ec160 t mcx_watchdog +ffffffff819ec190 t mcx_media_change +ffffffff819ec500 t mcx_media_status +ffffffff819ec6c0 t mcx_media_add_types +ffffffff819ec850 t mcx_refill +ffffffff819ec8c0 t mcx_cq_intr +ffffffff819ecf40 t mcx_calibrate +ffffffff819ed120 t mcx_port_change +ffffffff819ed330 t mcx_kstat_attach +ffffffff819ed7a0 t mcx_teardown_hca +ffffffff819ed9d0 t mcx_dmamem_free +ffffffff819eda60 t mcx_set_issi +ffffffff819edc50 t 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igc_allocate_transmit_buffers +ffffffff81a18520 T igc_setup_transmit_ring +ffffffff81a18690 T igc_free_transmit_buffers +ffffffff81a187e0 T igc_allocate_receive_buffers +ffffffff81a18930 T igc_setup_receive_ring +ffffffff81a18a10 T igc_initialize_rss_mapping +ffffffff81a18ca0 T igc_free_receive_buffers +ffffffff81a18de0 t igc_kstat_tick +ffffffff81a18e40 t igc_kstat_read +ffffffff81a18ea0 t igc_stat_read +ffffffff81a1a000 T igc_init_mac_params +ffffffff81a1a040 T igc_init_nvm_params +ffffffff81a1a080 T igc_init_phy_params +ffffffff81a1a0c0 T igc_set_mac_type +ffffffff81a1a160 T igc_setup_init_funcs +ffffffff81a1a2f0 T igc_update_mc_addr_list +ffffffff81a1a330 T igc_check_for_link +ffffffff81a1a370 T igc_reset_hw +ffffffff81a1a3b0 T igc_init_hw +ffffffff81a1a3f0 T igc_get_speed_and_duplex +ffffffff81a1a430 T igc_rar_set +ffffffff81a1a470 T igc_check_reset_block +ffffffff81a1a4b0 T igc_get_phy_info +ffffffff81a1a4f0 T igc_phy_hw_reset +ffffffff81a1a530 T igc_read_mac_addr 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__igc_write_nvm_srwr +ffffffff81a1d300 T igc_update_flash_i225 +ffffffff81a1d7b0 T igc_set_flsw_flash_burst_counter_i225 +ffffffff81a1d820 T igc_write_erase_flash_command_i225 +ffffffff81a1d950 T igc_pool_flash_update_done_i225 +ffffffff81a1d9f0 T igc_set_ltr_i225 +ffffffff81a1dcc0 T igc_init_function_pointers_i225 +ffffffff81a1dd40 T igc_set_eee_i225 +ffffffff81a1e000 T igc_init_mac_ops_generic +ffffffff81a1e050 T igc_null_ops_generic +ffffffff81a1e080 T igc_config_collision_dist_generic +ffffffff81a1e100 T igc_rar_set_generic +ffffffff81a1e200 T igc_write_vfta_generic +ffffffff81a1e260 T igc_init_rx_addrs_generic +ffffffff81a1e320 T igc_check_alt_mac_addr_generic +ffffffff81a1e4d0 T igc_hash_mc_addr_generic +ffffffff81a1e570 T igc_update_mc_addr_list_generic +ffffffff81a1e6e0 T igc_clear_hw_cntrs_base_generic +ffffffff81a1ec20 T igc_setup_link_generic +ffffffff81a1edf0 T igc_set_fc_watermarks_generic +ffffffff81a1eeb0 T igc_force_mac_fc_generic +ffffffff81a1ef70 T igc_config_fc_after_link_up_generic +ffffffff81a1f130 T igc_get_speed_and_duplex_copper_generic +ffffffff81a1f1e0 T igc_put_hw_semaphore_generic +ffffffff81a1f240 T igc_get_auto_rd_done_generic +ffffffff81a1f550 T igc_disable_pcie_master_generic +ffffffff81a20000 T igc_init_nvm_ops_generic +ffffffff81a20080 T igc_null_read_nvm +ffffffff81a200b0 T igc_null_nvm_generic +ffffffff81a200e0 T igc_reload_nvm_generic +ffffffff81a20180 T igc_null_write_nvm +ffffffff81a201b0 T igc_poll_eerd_eewr_done +ffffffff81a20260 T igc_read_nvm_eerd +ffffffff81a203c0 T igc_read_mac_addr_generic +ffffffff81a204b0 T igc_validate_nvm_checksum_generic +ffffffff81a21000 T igc_init_phy_ops_generic +ffffffff81a210f0 T igc_null_set_page +ffffffff81a21120 T igc_null_read_reg +ffffffff81a21150 T igc_null_phy_generic +ffffffff81a21180 T igc_null_lplu_state +ffffffff81a211b0 T igc_null_write_reg +ffffffff81a211e0 T igc_check_reset_block_generic +ffffffff81a21240 T igc_get_phy_id +ffffffff81a21310 T igc_read_phy_reg_mdic +ffffffff81a21440 T igc_write_phy_reg_mdic +ffffffff81a21570 T igc_phy_setup_autoneg +ffffffff81a217b0 T igc_copper_link_autoneg +ffffffff81a21920 T igc_wait_autoneg +ffffffff81a21a00 T igc_setup_copper_link_generic +ffffffff81a21b50 T igc_phy_has_link_generic +ffffffff81a21c80 T igc_check_downshift_generic +ffffffff81a21cb0 T igc_phy_hw_reset_generic +ffffffff81a21ec0 T igc_power_up_phy_copper +ffffffff81a21f60 T igc_power_down_phy_copper +ffffffff81a22010 T igc_write_phy_reg_gpy +ffffffff81a22260 T igc_write_xmdio_reg +ffffffff81a22380 T igc_read_phy_reg_gpy +ffffffff81a225d0 T igc_read_xmdio_reg +ffffffff81a226f0 T __igc_access_xmdio_reg +ffffffff81a23000 T ngbe_match +ffffffff81a23030 T ngbe_attach +ffffffff81a23670 T ngbe_detach +ffffffff81a23940 T ngbe_allocate_pci_resources +ffffffff81a23a70 T ngbe_allocate_queues +ffffffff81a24030 T ngbe_allocate_isb +ffffffff81a240d0 T ngbe_init_shared_code +ffffffff81a243b0 T ngbe_check_flash_load +ffffffff81a24720 T ngbe_allocate_msix +ffffffff81a249b0 T ngbe_setup_interface +ffffffff81a24c20 T ngbe_free_isb +ffffffff81a24d30 T ngbe_free_transmit_structures +ffffffff81a24db0 T ngbe_free_receive_structures +ffffffff81a24e70 T ngbe_free_pci_resources +ffffffff81a24f00 T ngbe_stop +ffffffff81a25570 T ngbe_release_hw_control +ffffffff81a25600 T ngbe_init +ffffffff81a25c20 T ngbe_setup_isb +ffffffff81a25c90 T ngbe_configure_pb +ffffffff81a25d80 T ngbe_iff +ffffffff81a25fb0 T ngbe_setup_vlan_hw_support +ffffffff81a26080 T ngbe_setup_transmit_structures +ffffffff81a26160 T ngbe_initialize_transmit_unit +ffffffff81a26570 T ngbe_setup_receive_structures +ffffffff81a26690 T ngbe_initialize_receive_unit +ffffffff81a26c20 T ngbe_get_hw_control +ffffffff81a26ca0 T ngbe_setup_gpie +ffffffff81a26cd0 T ngbe_configure_ivars +ffffffff81a26f40 T ngbe_non_sfp_link_config +ffffffff81a27000 T ngbe_enable_intr +ffffffff81a271e0 t NGBE_WRITE_REG_MASK +ffffffff81a27290 T ngbe_ioctl +ffffffff81a27540 T ngbe_rxrinfo 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ngbe_setup_psrtype +ffffffff81a29460 T ngbe_initialize_rss_mapping +ffffffff81a296f0 T ngbe_handle_phy_event +ffffffff81a297a0 T ngbe_enable_queue +ffffffff81a29800 T ngbe_rxeof +ffffffff81a29bb0 T ngbe_txeof +ffffffff81a29d70 T ngbe_init_eeprom_params +ffffffff81a29df0 T ngbe_init_hw +ffffffff81a29e60 T ngbe_init_ops +ffffffff81a2a070 T ngbe_phy_reset +ffffffff81a2a230 T ngbe_phy_read_reg +ffffffff81a2a2e0 T ngbe_phy_write_reg +ffffffff81a2a390 T ngbe_phy_setup_link +ffffffff81a2a660 T ngbe_phy_led_ctrl +ffffffff81a2a770 T ngbe_phy_check_overtemp +ffffffff81a2a7d0 T ngbe_phy_identify +ffffffff81a2a810 T ngbe_phy_init +ffffffff81a2aaa0 T ngbe_phy_check_event +ffffffff81a2ab00 T ngbe_phy_get_advertised_pause +ffffffff81a2ab70 T ngbe_phy_get_lp_advertised_pause +ffffffff81a2ac40 T ngbe_phy_set_pause_advertisement +ffffffff81a2acd0 T ngbe_phy_setup +ffffffff81a2aec0 T ngbe_clear_hw_cntrs +ffffffff81a2b1a0 T ngbe_get_mac_addr +ffffffff81a2b270 T ngbe_stop_adapter +ffffffff81a2b530 T ngbe_get_bus_info +ffffffff81a2b5f0 T ngbe_set_lan_id_multi_port_pcie +ffffffff81a2b660 T ngbe_acquire_swfw_sync +ffffffff81a2b930 T ngbe_release_swfw_sync +ffffffff81a2baa0 T ngbe_reset_hw +ffffffff81a2bd40 T ngbe_get_media_type +ffffffff81a2bd70 T ngbe_disable_sec_rx_path +ffffffff81a2be40 T ngbe_enable_sec_rx_path +ffffffff81a2bec0 T ngbe_enable_rx_dma +ffffffff81a2bf20 T ngbe_start_hw +ffffffff81a2c010 T ngbe_set_rar +ffffffff81a2c1a0 T ngbe_init_rx_addrs +ffffffff81a2c3a0 T ngbe_update_mc_addr_list +ffffffff81a2c580 T ngbe_enable_rx +ffffffff81a2c6f0 T ngbe_disable_rx +ffffffff81a2c840 T ngbe_clear_vfta +ffffffff81a2c960 T ngbe_init_uta_tables +ffffffff81a2c9e0 T ngbe_fc_enable +ffffffff81a2ccf0 T ngbe_setup_fc +ffffffff81a2cde0 T ngbe_check_mac_link +ffffffff81a2cf70 T ngbe_set_rxpba +ffffffff81a2d020 T ngbe_eepromcheck_cap +ffffffff81a2d100 T ngbe_phy_led_oem_chk +ffffffff81a2d220 T ngbe_set_fw_drv_ver +ffffffff81a2d370 T ngbe_init_thermal_sensor_thresh +ffffffff81a2d450 T ngbe_validate_mac_addr +ffffffff81a2d4b0 T ngbe_fc_autoneg +ffffffff81a2d650 T ngbe_fc_autoneg_copper +ffffffff81a2d770 T ngbe_negotiate_fc +ffffffff81a2d820 T ngbe_fmgr_cmd_op +ffffffff81a2d920 T ngbe_flash_read_dword +ffffffff81a2da30 T ngbe_calculate_checksum +ffffffff81a2daf0 T ngbe_check_internal_phy_id +ffffffff81a2dc70 T ngbe_gphy_wait_mdio_access_on +ffffffff81a2dd00 T ngbe_check_mng_access +ffffffff81a2dd60 T ngbe_mng_present +ffffffff81a2ddc0 T ngbe_check_reset_blocked +ffffffff81a2de50 T ngbe_set_ivar +ffffffff81a2df50 T ngbe_pbthresh_setup +ffffffff81a2e020 T ngbe_disable_queue +ffffffff81a2e080 T ngbe_host_interface_command +ffffffff81a2e4f0 T ngbe_tx_ctx_setup +ffffffff81a2e580 T ngbe_read_pci_cfg_word +ffffffff81a2e5e0 T ngbe_set_pci_config_data +ffffffff81a2e670 T ngbe_get_copper_link_capabilities +ffffffff81a2e6c0 T ngbe_get_eeprom_semaphore +ffffffff81a2e860 T ngbe_release_eeprom_semaphore +ffffffff81a2e930 T ngbe_gphy_dis_eee +ffffffff81a2ea90 T ngbe_gphy_efuse_calibration +ffffffff81a2ef30 T ngbe_hpbthresh +ffffffff81a2efd0 T ngbe_lpbthresh +ffffffff81a2f010 T ngbe_mta_vector +ffffffff81a2f060 T ngbe_setup_copper_link +ffffffff81a2f0b0 T ngbe_reset_misc +ffffffff81a2f4a0 T ngbe_set_mta +ffffffff81a2f510 T ngbe_rx_checksum +ffffffff81a30000 T com_pci_match +ffffffff81a30030 T com_pci_attach +ffffffff81a303a0 T com_pci_detach +ffffffff81a30450 T com_pci_activate +ffffffff81a30560 T com_pci_intr_designware +ffffffff81a31000 T ufshci_pci_match +ffffffff81a31040 T ufshci_pci_attach +ffffffff81a311d0 T ufshci_pci_detach +ffffffff81a32000 T agpdev_print +ffffffff81a32050 T agpbus_probe +ffffffff81a320c0 T agpvga_match +ffffffff81a32130 T agp_attach_bus +ffffffff81a321c0 T agp_probe +ffffffff81a321f0 T agp_attach +ffffffff81a32310 T agp_alloc_gatt +ffffffff81a32520 T agp_alloc_dmamem +ffffffff81a32670 T agp_free_dmamem +ffffffff81a326e0 T agp_free_gatt +ffffffff81a32790 T agp_generic_enable +ffffffff81a32960 T agp_find_device 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drm_atomic_helper_update_legacy_modeset_state +ffffffff81a3e350 T drm_atomic_helper_calc_timestamping_constants +ffffffff81a3e3f0 T drm_atomic_helper_commit_modeset_disables +ffffffff81a3eae0 T drm_atomic_helper_commit_modeset_enables +ffffffff81a3ee00 T drm_atomic_helper_wait_for_fences +ffffffff81a3f010 T drm_atomic_helper_wait_for_vblanks +ffffffff81a3f3c0 T drm_atomic_helper_wait_for_flip_done +ffffffff81a3f5b0 T drm_atomic_helper_commit_tail +ffffffff81a3f780 T drm_atomic_helper_commit_planes +ffffffff81a3fb30 T drm_atomic_helper_fake_vblank +ffffffff81a3fc30 T drm_atomic_helper_commit_hw_done +ffffffff81a3fe50 T drm_atomic_helper_cleanup_planes +ffffffff81a3ff00 T drm_atomic_helper_commit_tail_rpm +ffffffff81a400d0 t try_wait_for_completion +ffffffff81a40140 T drm_atomic_helper_async_commit +ffffffff81a40410 T drm_atomic_helper_commit +ffffffff81a40710 T drm_atomic_helper_prepare_planes +ffffffff81a409e0 T drm_atomic_helper_unprepare_planes +ffffffff81a40af0 T drm_atomic_helper_setup_commit +ffffffff81a412e0 t commit_work +ffffffff81a41300 T drm_atomic_helper_swap_state +ffffffff81a419c0 t commit_tail +ffffffff81a41c10 t release_crtc_commit +ffffffff81a41c50 t crtc_or_fake_commit +ffffffff81a41d80 T drm_atomic_helper_wait_for_dependencies +ffffffff81a41fc0 T drm_atomic_helper_commit_cleanup_done +ffffffff81a422b0 T drm_atomic_helper_commit_planes_on_crtc +ffffffff81a42560 T drm_atomic_helper_disable_planes_on_crtc +ffffffff81a426d0 T drm_atomic_helper_update_plane +ffffffff81a42830 T drm_atomic_helper_disable_plane +ffffffff81a42930 T drm_atomic_helper_set_config +ffffffff81a42a10 T drm_atomic_helper_disable_all +ffffffff81a42c00 T drm_atomic_helper_shutdown +ffffffff81a42d80 T drm_atomic_helper_duplicate_state +ffffffff81a42f10 T drm_atomic_helper_suspend +ffffffff81a430b0 T drm_atomic_helper_commit_duplicated_state +ffffffff81a43200 T drm_atomic_helper_resume +ffffffff81a43370 T drm_atomic_helper_page_flip +ffffffff81a43450 t page_flip_common +ffffffff81a43580 T drm_atomic_helper_page_flip_target +ffffffff81a436c0 T drm_atomic_helper_bridge_propagate_bus_fmt +ffffffff81a43740 t set_best_encoder +ffffffff81a44000 T __drm_atomic_helper_crtc_state_reset +ffffffff81a44030 T __drm_atomic_helper_crtc_reset +ffffffff81a440a0 T drm_atomic_helper_crtc_reset +ffffffff81a44150 T __drm_atomic_helper_crtc_duplicate_state +ffffffff81a44230 T drm_atomic_helper_crtc_duplicate_state +ffffffff81a442f0 T __drm_atomic_helper_crtc_destroy_state +ffffffff81a443e0 T drm_atomic_helper_crtc_destroy_state +ffffffff81a44420 T __drm_atomic_helper_plane_state_reset +ffffffff81a44500 T __drm_atomic_helper_plane_reset +ffffffff81a44560 T drm_atomic_helper_plane_reset +ffffffff81a44670 T __drm_atomic_helper_plane_destroy_state +ffffffff81a446e0 T __drm_atomic_helper_plane_duplicate_state +ffffffff81a44760 T drm_atomic_helper_plane_duplicate_state +ffffffff81a44860 T drm_atomic_helper_plane_destroy_state +ffffffff81a448e0 T __drm_atomic_helper_connector_state_reset +ffffffff81a44910 T __drm_atomic_helper_connector_reset +ffffffff81a44950 T drm_atomic_helper_connector_reset +ffffffff81a44a40 T __drm_atomic_helper_connector_destroy_state +ffffffff81a44aa0 T drm_atomic_helper_connector_tv_margins_reset +ffffffff81a44b00 T drm_atomic_helper_connector_tv_reset +ffffffff81a44d50 T drm_atomic_helper_connector_tv_check +ffffffff81a44e30 T __drm_atomic_helper_connector_duplicate_state +ffffffff81a44ed0 T drm_atomic_helper_connector_duplicate_state +ffffffff81a44fe0 T drm_atomic_helper_connector_destroy_state +ffffffff81a45050 T __drm_atomic_helper_private_obj_duplicate_state +ffffffff81a45090 T __drm_atomic_helper_bridge_duplicate_state +ffffffff81a450d0 T drm_atomic_helper_bridge_duplicate_state +ffffffff81a45190 T drm_atomic_helper_bridge_destroy_state +ffffffff81a451b0 T __drm_atomic_helper_bridge_reset +ffffffff81a45200 T drm_atomic_helper_bridge_reset +ffffffff81a46000 T drm_atomic_set_mode_for_crtc +ffffffff81a46250 T drm_atomic_set_mode_prop_for_crtc +ffffffff81a46530 T drm_atomic_set_crtc_for_plane +ffffffff81a466d0 T drm_atomic_set_fb_for_plane +ffffffff81a467c0 T drm_atomic_set_crtc_for_connector +ffffffff81a46950 T drm_atomic_get_property +ffffffff81a470f0 T drm_atomic_connector_commit_dpms +ffffffff81a47250 T drm_atomic_set_property +ffffffff81a47e50 T drm_mode_atomic_ioctl +ffffffff81a483d0 t prepare_signaling +ffffffff81a488f0 t complete_signaling +ffffffff81a48af0 t drm_atomic_replace_property_blob_from_id +ffffffff81a48c90 t drm_atomic_set_writeback_fb_for_connector +ffffffff81a48d00 t set_out_fence_for_connector +ffffffff81a49000 T drm_is_current_master +ffffffff81a49070 T drm_getmagic +ffffffff81a49160 T drm_authmagic +ffffffff81a49250 T drm_master_create +ffffffff81a49310 T drm_setmaster_ioctl +ffffffff81a493f0 t drm_new_set_master +ffffffff81a495e0 T drm_dropmaster_ioctl +ffffffff81a496f0 t drm_drop_master +ffffffff81a497d0 T drm_master_open +ffffffff81a498b0 T drm_master_get +ffffffff81a498e0 T drm_master_release +ffffffff81a499e0 T drm_master_put +ffffffff81a49aa0 T drm_file_get_master +ffffffff81a49b10 T drm_master_internal_acquire +ffffffff81a49b80 T drm_master_internal_release +ffffffff81a4a000 T drm_plane_create_alpha_property +ffffffff81a4a0b0 T drm_plane_create_rotation_property +ffffffff81a4a200 T drm_rotation_simplify +ffffffff81a4a280 T drm_plane_create_zpos_property +ffffffff81a4a350 T drm_plane_create_zpos_immutable_property +ffffffff81a4a410 T drm_atomic_normalize_zpos +ffffffff81a4a760 T drm_plane_create_blend_mode_property +ffffffff81a4a940 t drm_atomic_state_zpos_cmp +ffffffff81a4b000 T drm_bridge_add +ffffffff81a4b080 T devm_drm_bridge_add +ffffffff81a4b150 T drm_bridge_remove +ffffffff81a4b1c0 T drm_bridge_attach +ffffffff81a4b3a0 T drm_bridge_detach +ffffffff81a4b490 T drm_bridge_chain_mode_fixup +ffffffff81a4b540 T drm_bridge_chain_mode_valid +ffffffff81a4b5f0 T drm_bridge_chain_mode_set +ffffffff81a4b690 T drm_atomic_bridge_chain_disable +ffffffff81a4b7a0 T drm_atomic_bridge_chain_post_disable +ffffffff81a4b9e0 T drm_atomic_bridge_chain_pre_enable +ffffffff81a4bc50 T drm_atomic_bridge_chain_enable +ffffffff81a4bd80 T drm_atomic_bridge_chain_check +ffffffff81a4c180 T drm_bridge_detect +ffffffff81a4c1e0 T drm_bridge_get_modes +ffffffff81a4c240 T drm_bridge_edid_read +ffffffff81a4c310 T drm_bridge_get_edid +ffffffff81a4c370 T drm_bridge_hpd_enable +ffffffff81a4c450 T drm_bridge_hpd_disable +ffffffff81a4c4f0 T drm_bridge_hpd_notify +ffffffff81a4c550 t drm_bridge_atomic_duplicate_priv_state +ffffffff81a4c570 t drm_bridge_atomic_destroy_priv_state +ffffffff81a4c590 t select_bus_fmt_recursive +ffffffff81a4d000 T drm_buddy_init +ffffffff81a4d4c0 T drm_buddy_fini +ffffffff81a4d5d0 T drm_get_buddy +ffffffff81a4d610 T drm_buddy_free_block +ffffffff81a4d660 t __drm_buddy_free +ffffffff81a4d7c0 T drm_buddy_free_list +ffffffff81a4d8a0 T drm_buddy_block_trim +ffffffff81a4db00 t __alloc_range +ffffffff81a4de00 T drm_buddy_alloc_blocks +ffffffff81a4e4e0 t __drm_buddy_alloc_range +ffffffff81a4e580 T drm_buddy_block_print +ffffffff81a4e5c0 T drm_buddy_print +ffffffff81a4e740 T drm_buddy_module_exit +ffffffff81a4e760 T drm_buddy_module_init +ffffffff81a4e7d0 t split_block +ffffffff81a4f000 T drm_clflush_pages +ffffffff81a4f0e0 T drm_clflush_sg +ffffffff81a4f200 T drm_clflush_virt_range +ffffffff81a4f2a0 T drm_need_swiotlb +ffffffff81a4f2d0 T drm_memcpy_from_wc +ffffffff81a4f820 T drm_memcpy_init_early +ffffffff81a50000 T drm_client_init +ffffffff81a50150 T drm_client_register +ffffffff81a50210 T drm_client_release +ffffffff81a502e0 T drm_client_dev_unregister +ffffffff81a50400 T drm_client_dev_hotplug +ffffffff81a50540 T drm_client_dev_restore +ffffffff81a50640 T drm_client_buffer_vmap +ffffffff81a506c0 T drm_client_buffer_vunmap +ffffffff81a506e0 T drm_client_framebuffer_create +ffffffff81a50a20 T drm_client_framebuffer_delete +ffffffff81a50b20 T drm_client_framebuffer_flush +ffffffff81a51000 T drm_client_modeset_create +ffffffff81a51150 T drm_client_modeset_free +ffffffff81a51280 T drm_client_modeset_probe +ffffffff81a52cb0 t drm_client_pick_crtcs +ffffffff81a52fd0 T drm_client_rotation +ffffffff81a53180 T drm_client_modeset_check +ffffffff81a53230 t drm_client_modeset_commit_atomic +ffffffff81a534a0 T drm_client_modeset_commit_locked +ffffffff81a53690 T drm_client_modeset_commit +ffffffff81a53720 T drm_client_modeset_dpms +ffffffff81a539e0 t drm_connector_pick_cmdline_mode +ffffffff81a54000 T drm_color_ctm_s31_32_to_qm_n +ffffffff81a540d0 T drm_crtc_enable_color_mgmt +ffffffff81a541c0 T drm_mode_crtc_set_gamma_size +ffffffff81a542f0 T drm_mode_gamma_set_ioctl +ffffffff81a548b0 T drm_mode_gamma_get_ioctl +ffffffff81a54a20 T drm_get_color_encoding_name +ffffffff81a54aa0 T drm_get_color_range_name +ffffffff81a54b20 T drm_plane_create_color_properties +ffffffff81a54db0 T drm_color_lut_check +ffffffff81a55000 T drm_connector_ida_init +ffffffff81a551c0 T drm_connector_ida_destroy +ffffffff81a55380 T drm_get_connector_type_name +ffffffff81a553c0 T drm_connector_free_work_fn +ffffffff81a554a0 T drm_connector_init +ffffffff81a55530 t __drm_connector_init +ffffffff81a55930 T drm_connector_init_with_ddc +ffffffff81a559c0 T drmm_connector_init +ffffffff81a55a90 t drm_connector_cleanup_action +ffffffff81a55ab0 T drm_connector_attach_edid_property +ffffffff81a55ad0 T drm_connector_attach_encoder +ffffffff81a55b60 T drm_connector_has_possible_encoder +ffffffff81a55ba0 T drm_connector_cleanup +ffffffff81a55f90 T drm_connector_unregister +ffffffff81a56040 T drm_mode_put_tile_group +ffffffff81a560f0 T drm_connector_register +ffffffff81a56220 T drm_connector_unregister_all +ffffffff81a56400 T drm_connector_list_iter_begin +ffffffff81a56440 T drm_connector_list_iter_next +ffffffff81a56560 T drm_connector_list_iter_end +ffffffff81a56640 T drm_connector_register_all +ffffffff81a56800 T drm_get_connector_status_name +ffffffff81a56850 T drm_get_connector_force_name +ffffffff81a56890 T drm_get_subpixel_order_name +ffffffff81a568d0 T drm_get_dpms_name +ffffffff81a56910 T drm_display_info_set_bus_formats +ffffffff81a56a00 T drm_get_dvi_i_select_name +ffffffff81a56a60 T drm_get_dvi_i_subconnector_name +ffffffff81a56ac0 T drm_get_tv_mode_name +ffffffff81a56b00 T drm_get_tv_mode_from_name +ffffffff81a56d20 T drm_get_tv_select_name +ffffffff81a56d80 T drm_get_tv_subconnector_name +ffffffff81a56de0 T drm_get_dp_subconnector_name +ffffffff81a56e70 T drm_get_colorspace_name +ffffffff81a56eb0 T drm_connector_create_standard_properties +ffffffff81a57070 T drm_mode_create_dvi_i_properties +ffffffff81a57120 T drm_connector_attach_dp_subconnector_property +ffffffff81a57190 T drm_connector_attach_content_type_property +ffffffff81a57230 T drm_mode_create_content_type_property +ffffffff81a572c0 T drm_connector_attach_tv_margin_properties +ffffffff81a57340 T drm_mode_create_tv_margin_properties +ffffffff81a57480 T drm_mode_create_tv_properties_legacy +ffffffff81a57730 T drm_mode_create_tv_properties +ffffffff81a57920 T drm_mode_create_scaling_mode_property +ffffffff81a57990 T drm_connector_attach_vrr_capable_property +ffffffff81a57a30 T drm_connector_attach_scaling_mode_property +ffffffff81a57c50 T drm_mode_create_aspect_ratio_property +ffffffff81a57ce0 T drm_mode_create_hdmi_colorspace_property +ffffffff81a57d00 t drm_mode_create_colorspace_property +ffffffff81a57e50 T drm_mode_create_dp_colorspace_property +ffffffff81a57e80 T drm_mode_create_suggested_offset_properties +ffffffff81a57f60 T drm_connector_set_path_property +ffffffff81a57fc0 T drm_connector_set_tile_property +ffffffff81a58130 T drm_connector_set_link_status_property +ffffffff81a58190 T drm_connector_attach_max_bpc_property +ffffffff81a58260 T drm_connector_attach_hdr_output_metadata_property +ffffffff81a582b0 T drm_connector_attach_colorspace_property +ffffffff81a58300 T drm_connector_atomic_hdr_metadata_equal +ffffffff81a58380 T drm_connector_set_vrr_capable_property +ffffffff81a583d0 T drm_connector_set_panel_orientation +ffffffff81a584a0 T drm_connector_set_panel_orientation_with_quirk +ffffffff81a585a0 T drm_connector_set_orientation_from_panel +ffffffff81a586a0 T drm_connector_create_privacy_screen_properties +ffffffff81a58750 T drm_connector_attach_privacy_screen_properties +ffffffff81a587d0 T drm_connector_attach_privacy_screen_provider +ffffffff81a58900 t drm_connector_privacy_screen_notifier +ffffffff81a589d0 T drm_connector_update_privacy_screen +ffffffff81a58a40 T drm_connector_set_obj_prop +ffffffff81a58b50 T drm_connector_property_set_ioctl +ffffffff81a58bb0 T drm_mode_getconnector +ffffffff81a59130 T drm_connector_find_by_fwnode +ffffffff81a591f0 T drm_connector_oob_hotplug_event +ffffffff81a592f0 T drm_mode_get_tile_group +ffffffff81a59400 T drm_mode_create_tile_group +ffffffff81a594f0 t drm_connector_free +ffffffff81a59540 t kasprintf +ffffffff81a5a000 T drm_crtc_from_index +ffffffff81a5a060 T drm_crtc_force_disable +ffffffff81a5a1b0 T drm_mode_set_config_internal +ffffffff81a5a230 T drm_crtc_register_all +ffffffff81a5a2c0 T drm_crtc_unregister_all +ffffffff81a5a340 T drm_crtc_create_fence +ffffffff81a5a3d0 T drm_crtc_init_with_planes +ffffffff81a5a4b0 t __drm_crtc_init_with_planes +ffffffff81a5a940 T drmm_crtc_init_with_planes +ffffffff81a5aa60 T __drmm_crtc_alloc_with_planes +ffffffff81a5ac00 T drm_crtc_cleanup +ffffffff81a5ad40 T drm_mode_getcrtc +ffffffff81a5af20 t __drm_mode_set_config_internal +ffffffff81a5b0e0 T drm_crtc_check_viewport +ffffffff81a5b1a0 T drm_mode_setcrtc +ffffffff81a5ba40 T drm_mode_crtc_set_obj_prop +ffffffff81a5bad0 T drm_crtc_create_scaling_filter_property +ffffffff81a5bb50 t drm_crtc_fence_get_driver_name +ffffffff81a5bbd0 t drm_crtc_fence_get_timeline_name +ffffffff81a5bc40 t kasprintf +ffffffff81a5bd20 t drmm_crtc_init_with_planes_cleanup +ffffffff81a5c000 T drm_helper_encoder_in_use +ffffffff81a5c1b0 T drm_helper_crtc_in_use +ffffffff81a5c2e0 T drm_helper_disable_unused_functions +ffffffff81a5c380 t __drm_helper_disable_unused_functions +ffffffff81a5c4c0 T drm_crtc_helper_set_mode +ffffffff81a5ca40 T drm_crtc_helper_atomic_check +ffffffff81a5ca90 T drm_connector_get_single_encoder +ffffffff81a5cb70 T drm_crtc_helper_set_config +ffffffff81a5d9a0 T drm_helper_connector_dpms +ffffffff81a5dd00 T drm_helper_resume_force_mode +ffffffff81a5e090 T drm_helper_force_disable_all +ffffffff81a5f000 T drm_atomic_helper_check_plane_damage +ffffffff81a5f0b0 T drm_atomic_helper_dirtyfb +ffffffff81a5f3f0 T drm_atomic_helper_damage_iter_init +ffffffff81a5f550 T drm_atomic_helper_damage_iter_next +ffffffff81a5f5f0 T drm_atomic_helper_damage_merged +ffffffff81a60000 T displayid_iter_edid_begin +ffffffff81a60050 T __displayid_iter_next +ffffffff81a60320 T displayid_iter_end +ffffffff81a60370 T displayid_version +ffffffff81a603a0 T displayid_primary_use +ffffffff81a61000 T drm_mode_create_dumb +ffffffff81a610e0 T drm_mode_create_dumb_ioctl +ffffffff81a611c0 T drm_mode_mmap_dumb_ioctl +ffffffff81a61230 T drm_mode_destroy_dumb +ffffffff81a61280 T drm_mode_destroy_dumb_ioctl +ffffffff81a62000 T drm_edid_header_is_valid +ffffffff81a62080 T drm_edid_are_equal +ffffffff81a62100 T drm_edid_block_valid +ffffffff81a62370 t edid_block_check +ffffffff81a624b0 t edid_block_status_print +ffffffff81a625a0 T drm_edid_is_valid +ffffffff81a62620 T drm_edid_valid +ffffffff81a62760 t drm_edid_block_count +ffffffff81a628a0 T drm_edid_override_show +ffffffff81a62900 T drm_edid_override_set +ffffffff81a62b10 T drm_edid_alloc +ffffffff81a62bf0 T drm_edid_free +ffffffff81a62c50 T drm_edid_override_reset +ffffffff81a62d30 T drm_edid_override_connector_update +ffffffff81a62e30 t drm_edid_override_get +ffffffff81a62f50 T drm_edid_connector_update +ffffffff81a63430 T drm_edid_connector_add_modes +ffffffff81a63590 T drm_do_get_edid +ffffffff81a635b0 t _drm_do_get_edid +ffffffff81a63ab0 T drm_edid_raw +ffffffff81a63b40 T drm_edid_dup +ffffffff81a63c30 T drm_probe_ddc +ffffffff81a63d40 t drm_do_probe_ddc_edid +ffffffff81a63ea0 T drm_get_edid +ffffffff81a64030 T drm_connector_update_edid_property +ffffffff81a640a0 T drm_edid_read_custom +ffffffff81a641c0 T drm_edid_read_ddc +ffffffff81a64300 T drm_edid_read +ffffffff81a64390 T drm_edid_get_panel_id +ffffffff81a64560 t edid_block_read +ffffffff81a64840 T drm_get_edid_switcheroo +ffffffff81a64890 T drm_edid_read_switcheroo +ffffffff81a648e0 T drm_edid_duplicate +ffffffff81a64970 T drm_mode_find_dmt +ffffffff81a64aa0 T drm_mode_fixup_1366x768 +ffffffff81a64af0 T drm_find_edid_extension +ffffffff81a64ba0 T drm_match_cea_mode +ffffffff81a64e40 T drm_display_mode_from_cea_vic +ffffffff81a64eb0 T drm_edid_get_monitor_name +ffffffff81a64f70 t get_monitor_name +ffffffff81a653e0 T drm_edid_to_sad +ffffffff81a65610 T drm_edid_to_speaker_allocation +ffffffff81a657f0 T drm_av_sync_delay +ffffffff81a658a0 T drm_detect_hdmi_monitor +ffffffff81a659e0 T drm_detect_monitor_audio +ffffffff81a65b90 T drm_default_rgb_quant_range +ffffffff81a65be0 t update_display_info +ffffffff81a67590 t _drm_edid_connector_add_modes +ffffffff81a68d50 T drm_add_edid_modes +ffffffff81a68e70 T drm_add_modes_noedid +ffffffff81a68f80 T drm_set_preferred_mode +ffffffff81a68fe0 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff81a692d0 T drm_hdmi_avi_infoframe_quant_range +ffffffff81a69370 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff81a69450 t connector_bad_edid +ffffffff81a69640 t edid_filter_invalid_blocks +ffffffff81a69800 t drm_for_each_detailed_block +ffffffff81a699f0 t __cea_db_iter_next +ffffffff81a69c10 t get_monitor_range +ffffffff81a69cb0 t do_detailed_mode +ffffffff81a6a750 t do_cvt_mode +ffffffff81a6a9e0 t drm_mode_std +ffffffff81a6b430 t do_standard_modes +ffffffff81a6b5e0 t drm_monitor_supports_rb +ffffffff81a6b9f0 t drm_gtf2_mode +ffffffff81a6c7f0 t drm_gtf2_hbreak +ffffffff81a6cb60 t do_established_modes +ffffffff81a6cd80 t drm_match_hdmi_mode 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drm_exec_lock_obj +ffffffff81a70660 t drm_exec_obj_locked +ffffffff81a70750 t dma_resv_unlock +ffffffff81a70800 T drm_exec_unlock_obj +ffffffff81a709b0 T drm_exec_prepare_obj +ffffffff81a70a50 T drm_exec_prepare_array +ffffffff81a70b20 t dma_resv_lock_slow_interruptible +ffffffff81a70c80 t dma_resv_lock_slow +ffffffff81a70d70 t __ww_mutex_lock +ffffffff81a71000 T drm_fb_helper_debug_enter +ffffffff81a71110 T drm_fb_helper_debug_leave +ffffffff81a712b0 T drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81a71370 t __drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81a71440 T drm_fb_helper_blank +ffffffff81a71570 T drm_fb_helper_prepare +ffffffff81a71690 t drm_fb_helper_resume_worker +ffffffff81a716c0 t drm_fb_helper_damage_work +ffffffff81a71850 T drm_fb_helper_unprepare +ffffffff81a71880 T drm_fb_helper_init +ffffffff81a71900 T drm_fb_helper_alloc_info +ffffffff81a71970 T drm_fb_helper_release_info +ffffffff81a719c0 T drm_fb_helper_unregister_info +ffffffff81a719f0 T drm_fb_helper_fini +ffffffff81a71b00 T drm_fb_helper_set_suspend +ffffffff81a71b30 T drm_fb_helper_set_suspend_unlocked +ffffffff81a71b60 T drm_fb_helper_set_par +ffffffff81a71c40 T drm_fb_helper_pan_display +ffffffff81a71d30 T drm_fb_helper_fill_info +ffffffff81a71e00 T drm_fb_helper_initial_config +ffffffff81a71e40 t __drm_fb_helper_initial_config_and_unlock +ffffffff81a72540 T drm_fb_helper_hotplug_event +ffffffff81a726c0 t drm_setup_crtcs_fb +ffffffff81a72840 T drm_fb_helper_lastclose +ffffffff81a72910 T drm_fb_helper_output_poll_changed +ffffffff81a73000 T drm_fb_dma_get_gem_obj +ffffffff81a74000 T drm_fbdev_dma_setup +ffffffff81a741d0 t drm_fbdev_dma_helper_fb_probe +ffffffff81a74480 t drm_fbdev_dma_client_unregister +ffffffff81a744e0 t drm_fbdev_dma_client_restore +ffffffff81a74530 t drm_fbdev_dma_client_hotplug +ffffffff81a75000 T drm_fbdev_generic_setup +ffffffff81a751d0 t drm_fbdev_generic_helper_fb_probe +ffffffff81a75370 t drm_fbdev_generic_helper_fb_dirty +ffffffff81a75670 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drm_fb_xrgb8888_to_rgb888 +ffffffff81a7a130 t drm_fb_xrgb8888_to_rgb888_line +ffffffff81a7a1c0 T drm_fb_xrgb8888_to_argb8888 +ffffffff81a7a220 t drm_fb_xrgb8888_to_argb8888_line +ffffffff81a7a2f0 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff81a7a350 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff81a7a3d0 T drm_fb_xrgb8888_to_argb2101010 +ffffffff81a7a430 t drm_fb_xrgb8888_to_argb2101010_line +ffffffff81a7a4c0 T drm_fb_xrgb8888_to_gray8 +ffffffff81a7a520 t drm_fb_xrgb8888_to_gray8_line +ffffffff81a7a590 T drm_fb_blit +ffffffff81a7ac90 T drm_fb_xrgb8888_to_mono +ffffffff81a7b030 T drm_fb_build_fourcc_list +ffffffff81a7b340 t drm_fb_xrgb8888_to_xbgr8888_line +ffffffff81a7b420 t drm_fb_xrgb8888_to_abgr8888_line +ffffffff81a7c000 T drm_mode_legacy_fb_format +ffffffff81a7c0f0 T drm_driver_legacy_fb_format +ffffffff81a7c1f0 T __drm_format_info +ffffffff81a7c270 T drm_format_info +ffffffff81a7c320 T drm_get_format_info +ffffffff81a7c410 T drm_format_info_block_width +ffffffff81a7c460 T drm_format_info_block_height +ffffffff81a7c4b0 T drm_format_info_bpp +ffffffff81a7c530 T drm_format_info_min_pitch +ffffffff81a7d000 T drm_framebuffer_check_src_coords +ffffffff81a7d130 T drm_mode_addfb +ffffffff81a7d380 T drm_mode_addfb2 +ffffffff81a7d4a0 T drm_mode_addfb_ioctl +ffffffff81a7d4c0 T drm_internal_framebuffer_create +ffffffff81a7db00 T drm_mode_addfb2_ioctl +ffffffff81a7dc20 T drm_mode_rmfb +ffffffff81a7de60 T drm_framebuffer_lookup +ffffffff81a7deb0 t drm_mode_rmfb_work_fn +ffffffff81a7df80 T drm_mode_rmfb_ioctl +ffffffff81a7dfa0 T drm_mode_getfb +ffffffff81a7e120 T drm_mode_getfb2_ioctl +ffffffff81a7e510 T drm_mode_dirtyfb_ioctl +ffffffff81a7e6d0 T drm_fb_release +ffffffff81a7e800 T drm_framebuffer_free +ffffffff81a7e840 T drm_framebuffer_init +ffffffff81a7e9d0 T drm_framebuffer_unregister_private +ffffffff81a7ea10 T drm_framebuffer_cleanup +ffffffff81a7ea80 T drm_framebuffer_remove +ffffffff81a7f000 T drm_framebuffer_plane_width +ffffffff81a7f050 T drm_framebuffer_plane_height +ffffffff81a7f0a0 T drm_framebuffer_print_info +ffffffff81a80000 T drm_ref +ffffffff81a80030 T drm_unref +ffffffff81a800b0 T drm_fault +ffffffff81a802d0 T drm_flush +ffffffff81a80300 T udv_attach_drm +ffffffff81a80560 T drm_gem_init +ffffffff81a80640 t drm_gem_init_release +ffffffff81a80660 T drm_gem_object_init +ffffffff81a80810 T drm_gem_private_object_init +ffffffff81a80950 T drm_gem_private_object_fini +ffffffff81a809b0 T drm_gem_handle_delete +ffffffff81a80af0 t drm_gem_object_release_handle +ffffffff81a80b90 T drm_gem_dumb_map_offset +ffffffff81a80cf0 T drm_gem_object_lookup +ffffffff81a80d80 T drm_gem_create_mmap_offset +ffffffff81a80db0 T drm_gem_handle_create_tail +ffffffff81a80fa0 t drm_gem_object_handle_put_unlocked +ffffffff81a81110 T drm_gem_handle_create +ffffffff81a81160 T drm_gem_free_mmap_offset +ffffffff81a81190 T drm_gem_create_mmap_offset_size +ffffffff81a811c0 T drm_gem_get_pages +ffffffff81a81220 T drm_gem_put_pages +ffffffff81a81250 T drm_gem_objects_lookup +ffffffff81a81400 T drm_gem_dma_resv_wait +ffffffff81a81570 T drm_gem_close_ioctl +ffffffff81a815c0 T drm_gem_flink_ioctl +ffffffff81a81780 T drm_gem_open_ioctl +ffffffff81a818e0 T drm_gem_open +ffffffff81a81920 T drm_gem_release +ffffffff81a81960 T drm_gem_object_release +ffffffff81a81ad0 T drm_gem_lru_remove +ffffffff81a81bc0 T drm_gem_object_free +ffffffff81a81c10 T drm_gem_mmap_obj +ffffffff81a81d20 T drm_gem_mmap +ffffffff81a81fe0 T drm_gem_print_info +ffffffff81a82130 T drm_gem_pin +ffffffff81a82170 T drm_gem_unpin +ffffffff81a821b0 T drm_gem_vmap +ffffffff81a82220 T drm_gem_vunmap +ffffffff81a82290 T drm_gem_vmap_unlocked +ffffffff81a824d0 T drm_gem_vunmap_unlocked +ffffffff81a826d0 T drm_gem_lock_reservations +ffffffff81a82b40 T drm_gem_unlock_reservations +ffffffff81a82c70 T drm_gem_lru_init +ffffffff81a82cb0 T drm_gem_lru_move_tail_locked +ffffffff81a82db0 T drm_gem_lru_move_tail +ffffffff81a82ea0 T drm_gem_lru_scan +ffffffff81a83310 T drm_gem_evict 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drm_invalid_op +ffffffff81a881d0 T drm_version +ffffffff81a88440 T pledge_ioctl_drm +ffffffff81a88520 T drm_ioctl_kernel +ffffffff81a88580 T drm_ioctl +ffffffff81a885e0 T drm_ioctl_flags +ffffffff81a88630 T drm_do_ioctl +ffffffff81a88a00 T drmioctl +ffffffff81a88b90 t drm_getstats +ffffffff81a88be0 t drm_setversion +ffffffff81a88d70 t drm_getcap +ffffffff81a88f30 t drm_setclientcap +ffffffff81a8a000 T tasklet_unlock_wait +ffffffff81a8a090 T tasklet_unlock_spin_wait +ffffffff81a8a120 T tasklet_run +ffffffff81a8a180 T set_current_state +ffffffff81a8a220 T __set_current_state +ffffffff81a8a2b0 T schedule +ffffffff81a8a2f0 T schedule_timeout +ffffffff81a8a3b0 T schedule_timeout_uninterruptible +ffffffff81a8a420 T wake_up_process +ffffffff81a8a4a0 T autoremove_wake_function +ffffffff81a8a540 T prepare_to_wait +ffffffff81a8a640 T finish_wait +ffffffff81a8a700 T flush_workqueue +ffffffff81a8a740 T flush_work +ffffffff81a8a790 T flush_delayed_work +ffffffff81a8a830 T kthread_func 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idr_tree_SPLAY_MINMAX +ffffffff81a8d1f0 T ida_init +ffffffff81a8d220 T ida_destroy +ffffffff81a8d230 T ida_simple_get +ffffffff81a8d250 T ida_simple_remove +ffffffff81a8d270 T ida_alloc_min +ffffffff81a8d290 T ida_alloc_max +ffffffff81a8d2b0 T ida_free +ffffffff81a8d2d0 T xarray_cmp +ffffffff81a8d310 T xarray_tree_SPLAY_INSERT +ffffffff81a8d3c0 T xarray_tree_SPLAY +ffffffff81a8d4f0 T xarray_tree_SPLAY_REMOVE +ffffffff81a8d590 T xarray_tree_SPLAY_MINMAX +ffffffff81a8d680 T xa_init_flags +ffffffff81a8d6e0 T xa_destroy +ffffffff81a8d830 T __xa_alloc +ffffffff81a8d9e0 T __xa_alloc_cyclic +ffffffff81a8da40 T __xa_erase +ffffffff81a8db30 T __xa_load +ffffffff81a8dbb0 T __xa_store +ffffffff81a8dd60 T xa_get_next +ffffffff81a8de90 T sg_alloc_table +ffffffff81a8df20 T sg_free_table +ffffffff81a8df80 T sg_copy_from_buffer +ffffffff81a8dfb0 T i2c_master_xfer +ffffffff81a8e100 T __i2c_transfer +ffffffff81a8e1c0 T i2c_transfer +ffffffff81a8e2a0 T i2c_bb_master_xfer +ffffffff81a8e380 T i2c_bb_functionality +ffffffff81a8e3b0 T i2c_bit_add_bus +ffffffff81a8e3f0 T vga_disable_bridge +ffffffff81a8e4c0 T vga_get_uninterruptible +ffffffff81a8e510 T vga_put +ffffffff81a8e5a0 T acpi_get_table +ffffffff81a8e680 T acpi_put_table +ffffffff81a8e6b0 T acpi_get_handle +ffffffff81a8e710 T acpi_get_name +ffffffff81a8e7d0 T acpi_evaluate_object +ffffffff81a8ea70 T drm_linux_acpi_notify +ffffffff81a8eaf0 T register_acpi_notifier +ffffffff81a8eb30 T unregister_acpi_notifier +ffffffff81a8ebc0 T acpi_format_exception +ffffffff81a8ec10 T acpi_target_system_state +ffffffff81a8ec50 T backlight_do_update_status +ffffffff81a8ec70 T backlight_device_register +ffffffff81a8ed30 T backlight_device_unregister +ffffffff81a8ed90 T backlight_schedule_update_status +ffffffff81a8edb0 T backlight_enable +ffffffff81a8edf0 T backlight_disable +ffffffff81a8ee30 T backlight_device_get_by_name +ffffffff81a8eeb0 T dev_set_drvdata +ffffffff81a8ef50 T dev_get_drvdata +ffffffff81a8efb0 T drm_sysfs_hotplug_event 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dma_fence_chain_release +ffffffff81a914a0 T dma_fence_is_container +ffffffff81a914f0 T dmabuf_read +ffffffff81a91520 T dmabuf_write +ffffffff81a91550 T dmabuf_ioctl +ffffffff81a91580 T dmabuf_kqfilter +ffffffff81a915b0 T dmabuf_stat +ffffffff81a91670 T dmabuf_close +ffffffff81a91700 T dmabuf_seek +ffffffff81a917a0 T dma_buf_export +ffffffff81a91860 T dma_buf_get +ffffffff81a91900 T dma_buf_put +ffffffff81a919b0 T dma_buf_fd +ffffffff81a91b00 T get_dma_buf +ffffffff81a91b50 T pcie_get_speed_cap +ffffffff81a91d40 T printk +ffffffff81a91df0 T pcie_get_width_cap +ffffffff81a91f10 T pcie_aspm_enabled +ffffffff81a91fb0 T wait_on_bit +ffffffff81a92090 T wait_on_bit_timeout +ffffffff81a92160 T wake_up_bit +ffffffff81a921b0 T clear_and_wake_up_bit +ffffffff81a92220 T bit_waitqueue +ffffffff81a92250 T __var_waitqueue +ffffffff81a92280 T drm_linux_init +ffffffff81a924a0 T drm_linux_exit +ffffffff81a92540 T pci_resize_resource +ffffffff81a926b0 T register_shrinker +ffffffff81a92700 T unregister_shrinker +ffffffff81a92760 T drmbackoff +ffffffff81a92810 T bitmap_zalloc +ffffffff81a92840 T bitmap_free +ffffffff81a92860 T atomic_dec_and_mutex_lock +ffffffff81a928f0 T interval_tree_iter_first +ffffffff81a929a0 T interval_tree_remove +ffffffff81a929c0 T interval_tree_insert +ffffffff81a92a30 T syncfile_read +ffffffff81a92a60 T syncfile_write +ffffffff81a92a90 T syncfile_ioctl +ffffffff81a92ac0 T syncfile_kqfilter +ffffffff81a92af0 T syncfile_stat +ffffffff81a92ba0 T syncfile_close +ffffffff81a92c50 T syncfile_seek +ffffffff81a92ce0 T fd_install +ffffffff81a92dd0 T fput +ffffffff81a92e30 T get_unused_fd_flags +ffffffff81a92f70 T put_unused_fd +ffffffff81a93010 T sync_file_get_fence +ffffffff81a930d0 T sync_file_create +ffffffff81a93180 T drm_firmware_drivers_only +ffffffff81a931b0 T memremap +ffffffff81a93210 T memunmap +ffffffff81a93230 T dma_tag_lookup +ffffffff81a932a0 T dma_alloc_coherent +ffffffff81a933a0 T dma_free_coherent +ffffffff81a934d0 T dma_get_sgtable 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mipi_dsi_turn_on_peripheral +ffffffff81a95490 T mipi_dsi_set_maximum_return_packet_size +ffffffff81a95540 T mipi_dsi_compression_mode +ffffffff81a955f0 T mipi_dsi_picture_parameter_set +ffffffff81a956a0 T mipi_dsi_generic_write +ffffffff81a95760 T mipi_dsi_generic_read +ffffffff81a95820 T mipi_dsi_dcs_write_buffer +ffffffff81a958e0 T mipi_dsi_dcs_write +ffffffff81a95a40 T mipi_dsi_dcs_read +ffffffff81a95ae0 T mipi_dsi_dcs_nop +ffffffff81a95b90 T mipi_dsi_dcs_soft_reset +ffffffff81a95c40 T mipi_dsi_dcs_get_power_mode +ffffffff81a95d00 T mipi_dsi_dcs_get_pixel_format +ffffffff81a95dc0 T mipi_dsi_dcs_enter_sleep_mode +ffffffff81a95e70 T mipi_dsi_dcs_exit_sleep_mode +ffffffff81a95f20 T mipi_dsi_dcs_set_display_off +ffffffff81a95fd0 T mipi_dsi_dcs_set_display_on +ffffffff81a96080 T mipi_dsi_dcs_set_column_address +ffffffff81a96140 T mipi_dsi_dcs_set_page_address +ffffffff81a96200 T mipi_dsi_dcs_set_tear_off +ffffffff81a962b0 T mipi_dsi_dcs_set_tear_on +ffffffff81a96370 T mipi_dsi_dcs_set_pixel_format +ffffffff81a97000 T __drm_mm_interval_first +ffffffff81a970c0 T drm_mm_reserve_node +ffffffff81a97360 t add_hole +ffffffff81a974d0 T drm_mm_insert_node_in_range +ffffffff81a97af0 T drm_mm_remove_node +ffffffff81a97c50 T drm_mm_replace_node +ffffffff81a97e30 T drm_mm_scan_init_with_range +ffffffff81a97ec0 T drm_mm_scan_add_block +ffffffff81a98040 T drm_mm_scan_remove_block +ffffffff81a980c0 T drm_mm_scan_color_evict +ffffffff81a981b0 T drm_mm_init +ffffffff81a98260 T drm_mm_takedown +ffffffff81a982a0 T drm_mm_print +ffffffff81a99000 T drm_modeset_register_all +ffffffff81a990d0 T drm_modeset_unregister_all +ffffffff81a99120 T drm_mode_getresources +ffffffff81a99420 T drm_mode_config_reset +ffffffff81a995c0 T drmm_mode_config_init +ffffffff81a99d80 T drm_mode_config_cleanup +ffffffff81a9a150 t drm_mode_config_init_release +ffffffff81a9a160 T drm_mode_config_validate +ffffffff81a9b000 T __drm_mode_object_add +ffffffff81a9b120 T drm_mode_object_add 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drm_analog_tv_mode +ffffffff81a9dc50 T drm_cvt_mode +ffffffff81a9e0e0 T drm_mode_set_name +ffffffff81a9e130 T drm_gtf_mode_complex +ffffffff81a9e440 T drm_gtf_mode +ffffffff81a9e4a0 T drm_mode_get_hv_timing +ffffffff81a9e4f0 T drm_mode_init +ffffffff81a9e5c0 T drm_mode_set_crtcinfo +ffffffff81a9e780 T drm_mode_copy +ffffffff81a9e7e0 T drm_mode_duplicate +ffffffff81a9e870 T drm_mode_match +ffffffff81a9ea10 T drm_mode_equal +ffffffff81a9ea30 T drm_mode_equal_no_clocks +ffffffff81a9ea50 T drm_mode_equal_no_clocks_no_stereo +ffffffff81a9eb10 T drm_mode_validate_driver +ffffffff81a9ec00 T drm_mode_validate_size +ffffffff81a9ec50 T drm_mode_validate_ycbcr420 +ffffffff81a9ecc0 T drm_mode_is_420_only +ffffffff81a9ed20 T drm_get_mode_status_name +ffffffff81a9eda0 T drm_mode_prune_invalid +ffffffff81a9f070 T drm_mode_sort +ffffffff81a9f0a0 t drm_mode_compare +ffffffff81a9f240 T drm_connector_list_update +ffffffff81a9f430 T drm_mode_parse_command_line_for_connector +ffffffff81a9f460 T drm_mode_create_from_cmdline_mode +ffffffff81a9f680 T drm_mode_convert_to_umode +ffffffff81a9f820 T drm_mode_convert_umode +ffffffff81a9fa50 T drm_mode_is_420_also +ffffffff81a9fab0 T drm_mode_is_420 +ffffffff81aa0000 T drm_helper_move_panel_connectors_to_head +ffffffff81aa0100 T drm_helper_mode_fill_fb_struct +ffffffff81aa01d0 T drm_crtc_init +ffffffff81aa02c0 T drm_mode_config_helper_suspend +ffffffff81aa0380 T drm_mode_config_helper_resume +ffffffff81aa1000 T drm_modeset_lock_all +ffffffff81aa12f0 T drm_modeset_acquire_init +ffffffff81aa1380 T drm_modeset_lock_all_ctx +ffffffff81aa1480 T drm_modeset_backoff +ffffffff81aa1560 T drm_modeset_acquire_fini +ffffffff81aa1590 T drm_warn_on_modeset_not_all_locked +ffffffff81aa1710 T drm_modeset_unlock_all +ffffffff81aa1810 T drm_modeset_drop_locks +ffffffff81aa18a0 T drm_modeset_unlock +ffffffff81aa1980 t modeset_lock +ffffffff81aa1d20 T drm_modeset_lock_init +ffffffff81aa1d90 T drm_modeset_lock +ffffffff81aa1ed0 T drm_modeset_lock_single_interruptible +ffffffff81aa2020 t __ww_mutex_lock +ffffffff81aa3000 T drm_mtrr_add +ffffffff81aa3080 T drm_mtrr_del +ffffffff81aa4000 T drm_panel_init +ffffffff81aa4090 T drm_panel_add +ffffffff81aa40f0 T drm_panel_remove +ffffffff81aa4150 T drm_panel_prepare +ffffffff81aa4280 T drm_panel_unprepare +ffffffff81aa43c0 T drm_panel_enable +ffffffff81aa44d0 T drm_panel_disable +ffffffff81aa45d0 T drm_panel_get_modes +ffffffff81aa4630 T drm_is_panel_follower +ffffffff81aa4680 T drm_panel_add_follower +ffffffff81aa46e0 T drm_panel_remove_follower +ffffffff81aa4700 T devm_drm_panel_add_follower +ffffffff81aa4760 T drm_panel_of_backlight +ffffffff81aa5000 T drm_get_panel_orientation_quirk +ffffffff81aa6000 T drm_pci_set_busid +ffffffff81aa60b0 t kasprintf +ffffffff81aa7000 T drm_universal_plane_init +ffffffff81aa7100 t __drm_universal_plane_init +ffffffff81aa76b0 T __drmm_universal_plane_alloc +ffffffff81aa7820 t drmm_universal_plane_alloc_release +ffffffff81aa7870 T __drm_universal_plane_alloc +ffffffff81aa79d0 T drm_plane_register_all +ffffffff81aa7ae0 T drm_plane_unregister_all +ffffffff81aa7b60 T drm_plane_cleanup +ffffffff81aa7ce0 T drm_plane_from_index +ffffffff81aa7d40 T drm_plane_force_disable +ffffffff81aa7e80 T drm_mode_plane_set_obj_prop +ffffffff81aa7f10 T drm_mode_getplane_res +ffffffff81aa8050 T drm_mode_getplane +ffffffff81aa81d0 T drm_plane_check_pixel_format +ffffffff81aa8290 T drm_any_plane_has_format +ffffffff81aa83b0 T drm_mode_setplane +ffffffff81aa8720 T drm_mode_cursor_ioctl +ffffffff81aa8790 t drm_mode_cursor_common +ffffffff81aa8d60 T drm_mode_cursor2_ioctl +ffffffff81aa8d80 T drm_mode_page_flip_ioctl +ffffffff81aa93c0 T drm_plane_enable_fb_damage_clips +ffffffff81aa93e0 T drm_plane_get_damage_clips_count +ffffffff81aa9420 T __drm_plane_get_damage_clips +ffffffff81aa9460 T drm_plane_get_damage_clips +ffffffff81aa9500 T drm_create_scaling_filter_prop +ffffffff81aa9680 T drm_plane_create_scaling_filter_property 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drm_gem_map_attach +ffffffff81aaca50 T drm_gem_map_detach +ffffffff81aaca70 T drm_gem_dmabuf_vmap +ffffffff81aaca90 T drm_gem_dmabuf_vunmap +ffffffff81aacab0 T drm_gem_prime_mmap +ffffffff81aacb10 T drm_prime_pages_to_sg +ffffffff81aacb70 T drm_prime_get_contiguous_size +ffffffff81aacbc0 T drm_gem_prime_export +ffffffff81aacc60 T drm_gem_prime_import_dev +ffffffff81aaccd0 T drm_prime_sg_to_page_array +ffffffff81aacd30 T drm_prime_sg_to_dma_addr_array +ffffffff81aacd90 T drm_prime_gem_destroy +ffffffff81aad000 T __drm_puts_coredump +ffffffff81aad110 T __drm_printfn_coredump +ffffffff81aad340 T __drm_puts_seq_file +ffffffff81aad370 T __drm_printfn_seq_file +ffffffff81aad3a0 T __drm_printfn_info +ffffffff81aad3d0 T __drm_printfn_debug +ffffffff81aad400 T __drm_printfn_err +ffffffff81aad440 T drm_puts +ffffffff81aad470 T drm_printf +ffffffff81aad500 T drm_print_bits +ffffffff81aad760 T drm_dev_printk +ffffffff81aad800 T __drm_dev_dbg +ffffffff81aad8a0 T ___drm_dbg +ffffffff81aad940 T __drm_err +ffffffff81aad9e0 T drm_print_regset32 +ffffffff81aae000 T drm_crtc_mode_valid +ffffffff81aae050 T drm_encoder_mode_valid +ffffffff81aae090 T drm_connector_mode_valid +ffffffff81aae110 T drm_kms_helper_poll_enable +ffffffff81aae2d0 T drm_kms_helper_poll_reschedule +ffffffff81aae330 T drm_helper_probe_detect +ffffffff81aae570 T drm_helper_probe_single_connector_modes +ffffffff81aaecd0 t __drm_helper_update_and_validate +ffffffff81aaf0e0 T drm_kms_helper_hotplug_event +ffffffff81aaf130 T drm_kms_helper_connector_hotplug_event +ffffffff81aaf180 T drm_kms_helper_is_poll_worker +ffffffff81aaf1b0 T drm_kms_helper_poll_disable +ffffffff81aaf2e0 T drm_kms_helper_poll_init +ffffffff81aaf360 t output_poll_execute +ffffffff81aaf630 T drm_kms_helper_poll_fini +ffffffff81aaf680 T drm_connector_helper_hpd_irq_event +ffffffff81aaf770 t check_connector_changed +ffffffff81aaf970 T drm_helper_hpd_irq_event +ffffffff81aafb20 T drm_crtc_helper_mode_valid_fixed +ffffffff81aafb70 T drm_connector_helper_get_modes_from_ddc +ffffffff81aafc20 T drm_connector_helper_get_modes_fixed +ffffffff81aafdb0 T drm_connector_helper_get_modes +ffffffff81aafe40 T drm_connector_helper_tv_get_modes +ffffffff81ab00b0 t __delayed_work_tick +ffffffff81ab1000 T drm_property_create +ffffffff81ab1220 T drm_property_create_enum +ffffffff81ab12e0 T drm_property_add_enum +ffffffff81ab1510 T drm_property_destroy +ffffffff81ab15d0 T drm_property_create_bitmask +ffffffff81ab1710 T drm_property_create_range +ffffffff81ab1780 T drm_property_create_signed_range +ffffffff81ab17f0 T drm_property_create_object +ffffffff81ab18a0 T drm_property_create_bool +ffffffff81ab1910 T drm_mode_getproperty_ioctl +ffffffff81ab1b90 T drm_property_create_blob +ffffffff81ab1d00 t drm_property_free_blob +ffffffff81ab1d90 T drm_property_blob_put +ffffffff81ab1dd0 T drm_property_destroy_user_blobs +ffffffff81ab1e60 T drm_property_blob_get +ffffffff81ab1eb0 T drm_property_lookup_blob +ffffffff81ab1ed0 T drm_property_replace_global_blob +ffffffff81ab2050 T drm_property_replace_blob +ffffffff81ab20c0 T drm_mode_getblob_ioctl +ffffffff81ab21a0 T drm_mode_createblob_ioctl +ffffffff81ab22d0 T drm_mode_destroyblob_ioctl +ffffffff81ab2410 T drm_property_change_valid_get +ffffffff81ab2680 T drm_property_change_valid_put +ffffffff81ab3000 T drm_rect_intersect +ffffffff81ab3080 T drm_rect_clip_scaled +ffffffff81ab32f0 T drm_rect_calc_hscale +ffffffff81ab33d0 T drm_rect_calc_vscale +ffffffff81ab34b0 T drm_rect_debug_print +ffffffff81ab35e0 T drm_rect_rotate +ffffffff81ab36a0 T drm_rect_rotate_inv +ffffffff81ab4000 T drm_self_refresh_helper_update_avg_times +ffffffff81ab4170 T drm_self_refresh_helper_alter_state +ffffffff81ab4320 T drm_self_refresh_helper_init +ffffffff81ab44f0 t drm_self_refresh_helper_entry_work +ffffffff81ab46a0 T drm_self_refresh_helper_cleanup +ffffffff81ab4730 t __delayed_work_tick +ffffffff81ab5000 T drm_suballoc_manager_init +ffffffff81ab51a0 T drm_suballoc_manager_fini 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drm_dp_pcon_hdmi_frl_link_error_count +ffffffff81ace450 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff81ace480 T drm_dp_pcon_dsc_max_slices +ffffffff81ace510 T drm_dp_pcon_dsc_max_slice_width +ffffffff81ace540 T drm_dp_pcon_dsc_bpp_incr +ffffffff81ace580 T drm_dp_pcon_pps_default +ffffffff81ace610 T drm_dp_pcon_pps_override_buf +ffffffff81ace6d0 T drm_dp_pcon_pps_override_param +ffffffff81ace7e0 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff81ace890 T drm_edp_backlight_set_level +ffffffff81ace980 T drm_edp_backlight_enable +ffffffff81acebd0 t drm_edp_backlight_set_enable +ffffffff81aced30 T drm_edp_backlight_disable +ffffffff81aced80 T drm_edp_backlight_init +ffffffff81acf340 T drm_panel_dp_aux_backlight +ffffffff81acf500 t __128b132b_channel_eq_delay_us +ffffffff81acf580 t __8b10b_channel_eq_delay_us +ffffffff81acf600 t drm_dp_aux_get_crc +ffffffff81acf700 t drm_dp_i2c_xfer +ffffffff81acf9a0 t drm_dp_i2c_functionality +ffffffff81acf9d0 t drm_dp_i2c_do_msg +ffffffff81acfe00 t lock_bus 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drm_dp_add_payload_part2 +ffffffff81ad27a0 T drm_dp_get_vc_payload_bw +ffffffff81ad2840 T drm_dp_read_mst_cap +ffffffff81ad28a0 T drm_dp_mst_topology_mgr_set_mst +ffffffff81ad2bb0 t drm_dp_dpcd_write_payload +ffffffff81ad2d80 t drm_dp_mst_topology_put_mstb +ffffffff81ad2ea0 T drm_dp_mst_topology_mgr_suspend +ffffffff81ad2fb0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff81ad3020 T drm_dp_mst_topology_mgr_resume +ffffffff81ad32d0 T drm_dp_mst_hpd_irq_handle_event +ffffffff81ad43d0 T drm_dp_mst_hpd_irq_send_new_request +ffffffff81ad4470 T drm_dp_mst_detect_port +ffffffff81ad4610 T drm_dp_mst_edid_read +ffffffff81ad4740 T drm_dp_mst_get_edid +ffffffff81ad47d0 T drm_dp_atomic_find_time_slots +ffffffff81ad4ac0 T drm_atomic_get_mst_topology_state +ffffffff81ad4ad0 T drm_dp_atomic_release_time_slots +ffffffff81ad4d20 T drm_dp_mst_atomic_setup_commit +ffffffff81ad4eb0 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff81ad5030 T drm_dp_mst_root_conn_atomic_check +ffffffff81ad5160 T drm_dp_mst_update_slots +ffffffff81ad51c0 T drm_dp_check_act_status +ffffffff81ad53b0 T drm_dp_calc_pbn_mode +ffffffff81ad5410 T drm_dp_mst_dump_topology +ffffffff81ad5740 t drm_dp_mst_dump_mstb +ffffffff81ad57b0 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff81ad5920 T drm_dp_mst_dsc_aux_for_port +ffffffff81ad5bb0 T drm_dp_mst_atomic_enable_dsc +ffffffff81ad5d60 T drm_dp_mst_atomic_check +ffffffff81ad6090 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff81ad6350 t drm_dp_mst_duplicate_state +ffffffff81ad6550 t drm_dp_mst_destroy_state +ffffffff81ad6630 T drm_atomic_get_old_mst_topology_state +ffffffff81ad6640 T drm_atomic_get_new_mst_topology_state +ffffffff81ad6650 T drm_dp_mst_topology_mgr_init +ffffffff81ad6930 t drm_dp_mst_link_probe_work +ffffffff81ad6c40 t drm_dp_tx_work +ffffffff81ad6c90 t drm_dp_delayed_destroy_work +ffffffff81ad7240 t drm_dp_mst_up_req_work +ffffffff81ad7880 T drm_dp_mst_topology_mgr_destroy +ffffffff81ad7930 t drm_dp_mst_is_virtual_dpcd +ffffffff81ad7a30 t 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drm_dsc_pps_payload_pack +ffffffff81adc350 T drm_dsc_set_const_params +ffffffff81adc3a0 T drm_dsc_set_rc_buf_thresh +ffffffff81adc410 T drm_dsc_setup_rc_params +ffffffff81adc5e0 T drm_dsc_compute_rc_parameters +ffffffff81adc8e0 T drm_dsc_get_bpp_int +ffffffff81adc970 T drm_dsc_initial_scale_value +ffffffff81adc9b0 T drm_dsc_flatness_det_thresh +ffffffff81add000 T drm_connector_attach_content_protection_property +ffffffff81add030 T drm_hdcp_check_ksvs_revoked +ffffffff81add090 T drm_hdcp_update_content_protection +ffffffff81ade000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff81ade120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff81ade180 T drm_hdmi_avi_infoframe_bars +ffffffff81ade1d0 T drm_hdmi_avi_infoframe_content_type +ffffffff81adf000 T drm_scdc_read +ffffffff81adf0a0 T drm_scdc_write +ffffffff81adf1a0 T drm_scdc_get_scrambling_status +ffffffff81adf280 T drm_scdc_set_scrambling +ffffffff81adf440 T drm_scdc_set_high_tmds_clock_ratio +ffffffff81ae0000 T drm_gem_ttm_mmap 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ttm_kmap_iter_iomap_init +ffffffff81aef3d0 T ttm_kmap_iter_linear_io_init +ffffffff81aef5f0 T ttm_kmap_iter_linear_io_fini +ffffffff81aef640 T ttm_resource_manager_create_debugfs +ffffffff81aef670 t ttm_kmap_iter_iomap_map_local +ffffffff81aef760 t ttm_kmap_iter_iomap_unmap_local +ffffffff81aef790 t ttm_kmap_iter_linear_io_map_local +ffffffff81af0000 T ttm_sys_man_init +ffffffff81af0140 t ttm_sys_man_alloc +ffffffff81af01d0 t ttm_sys_man_free +ffffffff81af1000 T ttm_tt_create +ffffffff81af1120 T ttm_tt_destroy +ffffffff81af1140 T ttm_tt_init +ffffffff81af1240 T ttm_tt_fini +ffffffff81af1370 T ttm_sg_tt_init +ffffffff81af1600 T ttm_tt_swapin +ffffffff81af1740 T ttm_tt_swapout +ffffffff81af17a0 T ttm_tt_populate +ffffffff81af1950 T ttm_tt_unpopulate +ffffffff81af1a10 T ttm_tt_mgr_init +ffffffff81af1a70 T ttm_kmap_iter_tt_init +ffffffff81af1ad0 T ttm_tt_pages_limit +ffffffff81af1b00 t ttm_kmap_iter_tt_map_local +ffffffff81af1b60 t ttm_kmap_iter_tt_unmap_local +ffffffff81af2000 T drm_sched_entity_init +ffffffff81af21b0 T drm_sched_entity_modify_sched +ffffffff81af2230 T drm_sched_entity_is_ready +ffffffff81af2270 T drm_sched_entity_error +ffffffff81af22b0 T drm_sched_entity_flush +ffffffff81af2620 t drm_sched_entity_kill +ffffffff81af2820 T drm_sched_entity_fini +ffffffff81af28c0 T drm_sched_entity_destroy +ffffffff81af2990 T drm_sched_entity_set_priority +ffffffff81af29e0 T drm_sched_entity_pop_job +ffffffff81af2c90 T drm_sched_entity_select_rq +ffffffff81af2d90 T drm_sched_entity_push_job +ffffffff81af2f20 t drm_sched_entity_kill_jobs_cb +ffffffff81af30e0 t drm_sched_entity_kill_jobs_work +ffffffff81af3160 t drm_sched_entity_clear_dep +ffffffff81af3180 t drm_sched_entity_wakeup +ffffffff81af4000 T drm_sched_fence_slab_init +ffffffff81af4070 T drm_sched_fence_slab_fini +ffffffff81af4090 T drm_sched_fence_scheduled +ffffffff81af4100 T drm_sched_fence_finished +ffffffff81af4120 T drm_sched_fence_free +ffffffff81af41d0 T to_drm_sched_fence +ffffffff81af4230 T drm_sched_fence_alloc +ffffffff81af42b0 T drm_sched_fence_init +ffffffff81af4340 t drm_sched_fence_get_driver_name +ffffffff81af4370 t drm_sched_fence_get_timeline_name +ffffffff81af43d0 t drm_sched_fence_release_scheduled +ffffffff81af44d0 t drm_sched_fence_release_finished +ffffffff81af4510 t drm_sched_fence_set_deadline_finished +ffffffff81af5000 T drm_sched_rq_update_fifo +ffffffff81af5110 T drm_sched_rq_add_entity +ffffffff81af51a0 T drm_sched_rq_remove_entity +ffffffff81af5290 T drm_sched_fault +ffffffff81af52e0 T drm_sched_suspend_timeout +ffffffff81af5370 T drm_sched_resume_timeout +ffffffff81af5430 T drm_sched_stop +ffffffff81af5640 T drm_sched_start +ffffffff81af5790 t drm_sched_job_done_cb +ffffffff81af57b0 t drm_sched_job_done +ffffffff81af58b0 T drm_sched_resubmit_jobs +ffffffff81af5a10 T drm_sched_job_init +ffffffff81af5ab0 T drm_sched_job_arm +ffffffff81af5b50 T drm_sched_job_add_dependency +ffffffff81af5d20 T drm_sched_job_add_syncobj_dependency +ffffffff81af5d90 T drm_sched_job_add_resv_dependencies +ffffffff81af5e70 T drm_sched_job_add_implicit_dependencies +ffffffff81af5f60 T drm_sched_job_cleanup +ffffffff81af6040 T drm_sched_wakeup_if_can_queue +ffffffff81af6120 T drm_sched_pick_best +ffffffff81af61e0 T drm_sched_init +ffffffff81af64f0 t drm_sched_job_timedout +ffffffff81af6670 t drm_sched_main +ffffffff81af6bb0 T drm_sched_fini +ffffffff81af6e10 T drm_sched_increase_karma +ffffffff81af6f60 t __delayed_work_tick +ffffffff81af6f80 t drm_sched_get_cleanup_job +ffffffff81af7100 t drm_sched_select_entity +ffffffff81af8000 t ch7017_init +ffffffff81af8160 t ch7017_dpms +ffffffff81af8470 t ch7017_mode_valid +ffffffff81af84b0 t ch7017_mode_set +ffffffff81af87e0 t ch7017_detect +ffffffff81af8810 t ch7017_get_hw_state +ffffffff81af88a0 t ch7017_destroy +ffffffff81af8900 t ch7017_dump_regs +ffffffff81af9000 t ch7xxx_init +ffffffff81af92d0 t ch7xxx_dpms +ffffffff81af93b0 t ch7xxx_mode_valid +ffffffff81af93f0 t ch7xxx_mode_set +ffffffff81af99d0 t ch7xxx_detect +ffffffff81af9c50 t ch7xxx_get_hw_state +ffffffff81af9d30 t ch7xxx_destroy +ffffffff81af9d90 t ch7xxx_dump_regs +ffffffff81afa000 t ivch_init +ffffffff81afa3f0 t ivch_dpms +ffffffff81afa710 t ivch_mode_valid +ffffffff81afa750 t ivch_mode_set +ffffffff81afaa30 t ivch_detect +ffffffff81afaa60 t ivch_get_hw_state +ffffffff81afab60 t ivch_destroy +ffffffff81afabc0 t ivch_dump_regs +ffffffff81afb880 t ivch_reset +ffffffff81afc000 t ns2501_init +ffffffff81afc220 t ns2501_dpms +ffffffff81afcac0 t ns2501_mode_valid +ffffffff81afcba0 t ns2501_mode_set +ffffffff81afdf00 t ns2501_detect +ffffffff81afdf30 t ns2501_get_hw_state +ffffffff81afe010 t ns2501_destroy +ffffffff81aff000 t sil164_init +ffffffff81aff220 t sil164_dpms +ffffffff81aff370 t sil164_mode_valid +ffffffff81aff3a0 t sil164_mode_set +ffffffff81aff550 t sil164_detect +ffffffff81aff640 t sil164_get_hw_state +ffffffff81aff720 t sil164_destroy +ffffffff81aff780 t sil164_dump_regs +ffffffff81b00000 t tfp410_init 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g4x_enable_dp +ffffffff81b03410 t g4x_disable_dp +ffffffff81b034a0 t g4x_post_disable_dp +ffffffff81b036e0 t cpt_set_link_train +ffffffff81b037b0 t g4x_set_link_train +ffffffff81b03880 t chv_set_signal_levels +ffffffff81b03960 t vlv_set_signal_levels +ffffffff81b03a40 t ivb_cpu_edp_set_signal_levels +ffffffff81b03b60 t snb_cpu_edp_set_signal_levels +ffffffff81b03c80 t g4x_set_signal_levels +ffffffff81b03d90 t intel_dp_preemph_max_3 +ffffffff81b03dc0 t intel_dp_voltage_max_3 +ffffffff81b03df0 t intel_dp_preemph_max_2 +ffffffff81b03e20 t intel_dp_voltage_max_2 +ffffffff81b03e50 t g4x_digital_port_connected +ffffffff81b03ef0 t ilk_digital_port_connected +ffffffff81b03f60 t ibx_digital_port_connected +ffffffff81b03fd0 t intel_dp_encoder_reset +ffffffff81b040f0 t intel_dp_encoder_destroy +ffffffff81b04160 t intel_dp_prepare +ffffffff81b04410 t intel_enable_dp +ffffffff81b046d0 t intel_dp_link_down +ffffffff81b04a90 t assert_dp_port +ffffffff81b05000 T g4x_hdmi_connector_atomic_check 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bdw_primary_enable_flip_done +ffffffff81b09590 t bdw_primary_disable_flip_done +ffffffff81b09600 t ivb_primary_enable_flip_done +ffffffff81b09670 t ivb_primary_disable_flip_done +ffffffff81b096e0 t ilk_primary_enable_flip_done +ffffffff81b09750 t ilk_primary_disable_flip_done +ffffffff81b097c0 T i9xx_get_initial_plane_config +ffffffff81b09c20 T i9xx_fixup_initial_plane_config +ffffffff81b09ce0 t i965_plane_format_mod_supported +ffffffff81b09de0 t i8xx_plane_format_mod_supported +ffffffff81b09e90 t i9xx_plane_ctl +ffffffff81b0b000 T intel_set_memory_cxsr +ffffffff81b0b0b0 t _intel_set_memory_cxsr +ffffffff81b0b3c0 T ilk_disable_lp_wm +ffffffff81b0b4c0 T ilk_wm_sanitize +ffffffff81b0b800 T i9xx_wm_init +ffffffff81b0be90 t intel_get_cxsr_latency +ffffffff81b0bf50 t ilk_compute_pipe_wm +ffffffff81b0c300 t ilk_compute_intermediate_wm +ffffffff81b0c540 t ilk_initial_watermarks +ffffffff81b0c5d0 t ilk_optimize_watermarks +ffffffff81b0c6a0 t ilk_wm_get_hw_state +ffffffff81b0cb20 t ilk_compute_wm_level +ffffffff81b0d030 t ilk_validate_wm_level +ffffffff81b0d180 t ilk_compute_wm_maximums +ffffffff81b0d3b0 t ilk_program_watermarks +ffffffff81b0e1e0 t ilk_wm_merge +ffffffff81b0e4a0 t vlv_compute_pipe_wm +ffffffff81b0ee90 t vlv_compute_intermediate_wm +ffffffff81b0f1e0 t vlv_initial_watermarks +ffffffff81b0f270 t vlv_atomic_update_fifo +ffffffff81b0f580 t vlv_optimize_watermarks +ffffffff81b0f650 t vlv_wm_get_hw_state_and_sanitize +ffffffff81b10530 t _vlv_compute_pipe_wm +ffffffff81b10850 t vlv_invalidate_wms +ffffffff81b109c0 t vlv_program_watermarks +ffffffff81b11200 t chv_set_memory_dvfs +ffffffff81b11410 t g4x_compute_pipe_wm +ffffffff81b11d40 t g4x_compute_intermediate_wm +ffffffff81b121c0 t g4x_initial_watermarks +ffffffff81b12280 t g4x_optimize_watermarks +ffffffff81b12380 t g4x_wm_get_hw_state_and_sanitize +ffffffff81b12d70 t _g4x_compute_pipe_wm +ffffffff81b13030 t g4x_program_watermarks +ffffffff81b13400 t pnv_update_wm +ffffffff81b13b80 t i965_update_wm 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gen11_dsi_host_detach +ffffffff81b1b890 t gen11_dsi_host_transfer +ffffffff81b1c000 T intel_digital_connector_atomic_get_property +ffffffff81b1c0a0 T intel_digital_connector_atomic_set_property +ffffffff81b1c130 T intel_digital_connector_atomic_check +ffffffff81b1c240 T intel_digital_connector_duplicate_state +ffffffff81b1c2d0 T intel_connector_needs_modeset +ffffffff81b1c340 T intel_any_crtc_needs_modeset +ffffffff81b1c3d0 T intel_atomic_get_digital_connector_state +ffffffff81b1c3e0 T intel_crtc_duplicate_state +ffffffff81b1c530 T intel_crtc_free_hw_state +ffffffff81b1c5b0 T intel_crtc_destroy_state +ffffffff81b1c690 T intel_atomic_state_alloc +ffffffff81b1c730 T intel_atomic_state_free +ffffffff81b1c780 T intel_atomic_state_clear +ffffffff81b1c7e0 T intel_atomic_get_crtc_state +ffffffff81b1d000 T intel_plane_alloc +ffffffff81b1d0e0 T intel_plane_free +ffffffff81b1d120 T intel_plane_destroy_state +ffffffff81b1d1f0 T intel_plane_duplicate_state +ffffffff81b1d2c0 T intel_adjusted_rate +ffffffff81b1d340 T intel_plane_pixel_rate +ffffffff81b1d3d0 T intel_plane_data_rate +ffffffff81b1d490 T intel_plane_calc_min_cdclk +ffffffff81b1d610 T intel_plane_copy_uapi_to_hw_state +ffffffff81b1d780 T intel_plane_copy_hw_state +ffffffff81b1d870 T intel_plane_set_invisible +ffffffff81b1d970 T intel_plane_atomic_check_with_state +ffffffff81b1e610 T intel_plane_atomic_check +ffffffff81b1e790 T intel_plane_update_noarm +ffffffff81b1e7d0 T intel_plane_update_arm +ffffffff81b1e810 T intel_plane_disable_arm +ffffffff81b1e830 T intel_crtc_planes_update_noarm +ffffffff81b1e960 T intel_crtc_planes_update_arm +ffffffff81b1ed90 T intel_atomic_plane_check_clipping +ffffffff81b1f050 T intel_plane_check_src_coordinates +ffffffff81b1f220 T intel_plane_helper_add +ffffffff81b1f260 t intel_prepare_plane_fb +ffffffff81b1f540 t intel_cleanup_plane_fb +ffffffff81b20000 T intel_audio_sdp_split_update +ffffffff81b200e0 T intel_audio_compute_config +ffffffff81b201a0 T intel_audio_codec_enable +ffffffff81b203b0 T intel_audio_codec_disable +ffffffff81b20630 T intel_audio_codec_get_config +ffffffff81b20680 T intel_audio_hooks_init +ffffffff81b20700 T intel_audio_cdclk_change_pre +ffffffff81b207a0 T intel_audio_cdclk_change_post +ffffffff81b20890 T intel_audio_init +ffffffff81b208a0 T intel_audio_register +ffffffff81b208d0 T intel_audio_deinit +ffffffff81b20920 t g4x_audio_codec_enable +ffffffff81b20b30 t g4x_audio_codec_disable +ffffffff81b20bd0 t g4x_audio_codec_get_config +ffffffff81b20d10 t ibx_audio_codec_enable +ffffffff81b20f10 t ibx_audio_codec_disable +ffffffff81b21120 t intel_acomp_get_config +ffffffff81b211a0 t audio_config_hdmi_pixel_clock +ffffffff81b21390 t hsw_audio_codec_enable +ffffffff81b21b20 t hsw_audio_codec_disable +ffffffff81b22000 T intel_backlight_invert_pwm_level +ffffffff81b220c0 T intel_backlight_set_pwm_level +ffffffff81b22130 T intel_backlight_level_to_pwm +ffffffff81b22350 T intel_backlight_level_from_pwm +ffffffff81b22510 T intel_backlight_set_acpi +ffffffff81b22750 T intel_backlight_disable +ffffffff81b22840 T intel_backlight_enable +ffffffff81b22900 t __intel_backlight_enable +ffffffff81b22a50 T intel_backlight_device_register +ffffffff81b22d70 t kasprintf +ffffffff81b22e50 T intel_backlight_device_unregister +ffffffff81b22eb0 T intel_backlight_update +ffffffff81b22f50 T intel_backlight_setup +ffffffff81b23140 T intel_backlight_destroy +ffffffff81b23170 T intel_backlight_init_funcs +ffffffff81b232f0 t intel_backlight_device_update_status +ffffffff81b23550 t intel_backlight_device_get_brightness +ffffffff81b23720 t bxt_setup_backlight +ffffffff81b239b0 t bxt_get_backlight +ffffffff81b239f0 t bxt_set_backlight +ffffffff81b23a30 t bxt_disable_backlight +ffffffff81b23b90 t bxt_enable_backlight +ffffffff81b23e70 t bxt_hz_to_pwm +ffffffff81b23eb0 t cnp_setup_backlight +ffffffff81b241b0 t cnp_disable_backlight +ffffffff81b24290 t cnp_enable_backlight +ffffffff81b24480 t cnp_hz_to_pwm +ffffffff81b244c0 t lpt_setup_backlight +ffffffff81b248a0 t lpt_get_backlight +ffffffff81b24900 t lpt_set_backlight +ffffffff81b24980 t lpt_disable_backlight +ffffffff81b24ad0 t lpt_enable_backlight +ffffffff81b24d20 t lpt_hz_to_pwm +ffffffff81b24d90 t pch_get_backlight +ffffffff81b24df0 t spt_hz_to_pwm +ffffffff81b24e40 t pch_setup_backlight +ffffffff81b25090 t pch_set_backlight +ffffffff81b25110 t pch_disable_backlight +ffffffff81b25230 t pch_enable_backlight +ffffffff81b254f0 t pch_hz_to_pwm +ffffffff81b25530 t ext_pwm_setup_backlight +ffffffff81b255f0 t ext_pwm_get_backlight +ffffffff81b25640 t ext_pwm_set_backlight +ffffffff81b25660 t ext_pwm_disable_backlight +ffffffff81b25680 t ext_pwm_enable_backlight +ffffffff81b256b0 t vlv_setup_backlight +ffffffff81b25940 t vlv_get_backlight +ffffffff81b259f0 t vlv_set_backlight +ffffffff81b25a80 t vlv_disable_backlight +ffffffff81b25b60 t vlv_enable_backlight +ffffffff81b25d40 t vlv_hz_to_pwm +ffffffff81b25df0 t i965_setup_backlight +ffffffff81b26060 t i9xx_get_backlight +ffffffff81b26110 t i9xx_set_backlight +ffffffff81b26270 t i965_disable_backlight +ffffffff81b26340 t i965_enable_backlight +ffffffff81b26530 t i965_hz_to_pwm +ffffffff81b26590 t i9xx_setup_backlight +ffffffff81b26910 t i9xx_disable_backlight +ffffffff81b26980 t i9xx_enable_backlight +ffffffff81b26b60 t i9xx_hz_to_pwm +ffffffff81b26bc0 t intel_pwm_setup_backlight +ffffffff81b26ce0 t intel_pwm_get_backlight +ffffffff81b26dc0 t intel_pwm_set_backlight +ffffffff81b26e80 t intel_pwm_disable_backlight +ffffffff81b26f40 t intel_pwm_enable_backlight +ffffffff81b28000 T intel_bios_encoder_port +ffffffff81b28080 t dvo_port_to_port +ffffffff81b28260 T intel_bios_dp_max_link_rate +ffffffff81b282e0 T intel_bios_dp_max_lane_count +ffffffff81b28330 T intel_bios_encoder_supports_dvi +ffffffff81b28360 T intel_bios_encoder_supports_hdmi +ffffffff81b283a0 T intel_bios_encoder_supports_dp +ffffffff81b283d0 T intel_bios_encoder_supports_edp +ffffffff81b28410 T intel_bios_encoder_supports_dsi +ffffffff81b28440 T intel_bios_encoder_is_lspcon +ffffffff81b28490 T intel_bios_hdmi_level_shift +ffffffff81b284f0 T intel_bios_hdmi_max_tmds_clock +ffffffff81b28580 T intel_bios_is_valid_vbt +ffffffff81b28680 T intel_bios_init +ffffffff81b2a750 T intel_bios_init_panel_early +ffffffff81b2a770 t intel_bios_init_panel +ffffffff81b2ca40 T intel_bios_init_panel_late +ffffffff81b2ca60 T intel_bios_driver_remove +ffffffff81b2cb70 T intel_bios_fini_panel +ffffffff81b2cc80 T intel_bios_is_tv_present +ffffffff81b2cd00 T intel_bios_is_lvds_present +ffffffff81b2cdb0 T intel_bios_is_port_present +ffffffff81b2ce90 T intel_bios_encoder_supports_dp_dual_mode +ffffffff81b2cf00 T intel_bios_is_dsi_present +ffffffff81b2cfd0 T intel_bios_get_dsc_params +ffffffff81b2d200 T intel_bios_dp_aux_ch +ffffffff81b2d300 T intel_bios_dp_has_shared_aux_ch +ffffffff81b2d390 T intel_bios_dp_boost_level +ffffffff81b2d420 T intel_bios_hdmi_boost_level +ffffffff81b2d4c0 T intel_bios_hdmi_ddc_pin +ffffffff81b2d630 T intel_bios_encoder_supports_typec_usb +ffffffff81b2d680 T intel_bios_encoder_supports_tbt +ffffffff81b2d6d0 T intel_bios_encoder_lane_reversal +ffffffff81b2d710 T intel_bios_encoder_hpd_invert +ffffffff81b2d750 T intel_bios_encoder_data_lookup +ffffffff81b2d820 T intel_bios_for_each_encoder +ffffffff81b2d8a0 t opregion_get_panel_type +ffffffff81b2d8c0 t vbt_get_panel_type +ffffffff81b2d9d0 t pnpid_get_panel_type +ffffffff81b2dbd0 t fallback_get_panel_type +ffffffff81b2dc00 t fill_detail_timing_data +ffffffff81b2e000 T icl_pcode_restrict_qgv_points +ffffffff81b2e130 T intel_bw_init_hw +ffffffff81b2e2a0 t tgl_get_bw_info +ffffffff81b2e8c0 t icl_get_bw_info +ffffffff81b2ecb0 T intel_bw_crtc_update +ffffffff81b2eda0 t intel_bw_crtc_data_rate +ffffffff81b2eec0 T intel_atomic_get_old_bw_state +ffffffff81b2eee0 T intel_atomic_get_new_bw_state +ffffffff81b2ef00 T intel_atomic_get_bw_state +ffffffff81b2ef20 T intel_bw_min_cdclk +ffffffff81b2f1a0 T intel_bw_calc_min_cdclk +ffffffff81b2f5b0 T intel_bw_atomic_check +ffffffff81b300e0 T intel_bw_init +ffffffff81b30160 t icl_get_qgv_points +ffffffff81b30740 t skl_plane_calc_dbuf_bw +ffffffff81b30890 t intel_bw_duplicate_state +ffffffff81b30910 t intel_bw_destroy_state +ffffffff81b31000 T intel_cdclk_get_cdclk +ffffffff81b31020 T intel_cdclk_init_hw +ffffffff81b31850 T intel_cdclk_uninit_hw +ffffffff81b31970 T intel_cdclk_needs_modeset +ffffffff81b319b0 T intel_cdclk_dump_config +ffffffff81b31a30 T intel_set_cdclk_pre_plane_update +ffffffff81b31da0 t intel_set_cdclk +ffffffff81b321c0 T intel_set_cdclk_post_plane_update +ffffffff81b32480 T intel_crtc_compute_min_cdclk +ffffffff81b32830 T intel_atomic_get_cdclk_state +ffffffff81b32850 T intel_cdclk_atomic_check +ffffffff81b32970 T intel_cdclk_init +ffffffff81b329f0 T intel_modeset_calc_cdclk +ffffffff81b330c0 t intel_cdclk_can_crawl +ffffffff81b33150 T intel_update_max_cdclk +ffffffff81b334d0 T intel_update_cdclk +ffffffff81b33570 T intel_read_rawclk +ffffffff81b33720 t i9xx_hrawclk +ffffffff81b337e0 T intel_cdclk_debugfs_register +ffffffff81b33810 T intel_init_cdclk_hooks +ffffffff81b33c40 t bxt_set_cdclk +ffffffff81b34300 t _bxt_set_cdclk +ffffffff81b34b70 t skl_set_cdclk +ffffffff81b35230 t intel_cdclk_duplicate_state +ffffffff81b352c0 t intel_cdclk_destroy_state +ffffffff81b352e0 t bxt_get_cdclk +ffffffff81b35550 t bxt_modeset_calc_cdclk +ffffffff81b359e0 t tgl_calc_voltage_level +ffffffff81b35a30 t intel_compute_min_cdclk +ffffffff81b35c70 t rplu_calc_voltage_level +ffffffff81b35cc0 t ehl_calc_voltage_level +ffffffff81b35d10 t icl_calc_voltage_level +ffffffff81b35d60 t bxt_calc_voltage_level +ffffffff81b35db0 t skl_get_cdclk +ffffffff81b35fe0 t skl_modeset_calc_cdclk +ffffffff81b361f0 t bdw_get_cdclk +ffffffff81b362f0 t bdw_set_cdclk +ffffffff81b36950 t bdw_modeset_calc_cdclk +ffffffff81b36a50 t hsw_get_cdclk +ffffffff81b36b30 t fixed_modeset_calc_cdclk +ffffffff81b36b80 t vlv_get_cdclk +ffffffff81b36c70 t chv_set_cdclk +ffffffff81b37070 t vlv_modeset_calc_cdclk +ffffffff81b37250 t vlv_set_cdclk +ffffffff81b37870 t fixed_400mhz_get_cdclk +ffffffff81b378a0 t fixed_450mhz_get_cdclk +ffffffff81b378d0 t gm45_get_cdclk +ffffffff81b379f0 t intel_hpll_vco +ffffffff81b37b30 t g33_get_cdclk +ffffffff81b37c60 t i965gm_get_cdclk +ffffffff81b37d70 t pnv_get_cdclk +ffffffff81b37e30 t i945gm_get_cdclk +ffffffff81b37eb0 t i915gm_get_cdclk +ffffffff81b37f30 t fixed_333mhz_get_cdclk +ffffffff81b37f60 t fixed_266mhz_get_cdclk +ffffffff81b37f90 t i85x_get_cdclk +ffffffff81b38030 t fixed_200mhz_get_cdclk +ffffffff81b38060 t fixed_133mhz_get_cdclk +ffffffff81b39000 T intel_color_load_luts +ffffffff81b39030 T intel_color_commit_noarm +ffffffff81b39080 T intel_color_commit_arm +ffffffff81b390b0 T intel_color_post_update +ffffffff81b39100 T intel_color_prepare_commit +ffffffff81b39130 T intel_color_cleanup_commit +ffffffff81b39190 T intel_color_check +ffffffff81b391b0 T intel_color_get_config +ffffffff81b39230 T intel_color_lut_equal +ffffffff81b39290 T intel_color_assert_luts +ffffffff81b39590 T intel_color_crtc_init +ffffffff81b39610 T intel_color_init +ffffffff81b39750 T intel_color_init_hooks +ffffffff81b39880 t chv_color_check +ffffffff81b39dc0 t i9xx_color_commit_arm +ffffffff81b39dd0 t chv_load_luts +ffffffff81b3a1e0 t chv_read_luts +ffffffff81b3a460 t chv_lut_equal +ffffffff81b3a790 t chv_read_csc +ffffffff81b3a8b0 t intel_color_add_affected_planes +ffffffff81b3aa30 t _check_luts +ffffffff81b3abb0 t i965_load_luts +ffffffff81b3af20 t i965_read_luts +ffffffff81b3b300 t vlv_color_check +ffffffff81b3b7d0 t vlv_load_luts +ffffffff81b3b980 t i965_lut_equal +ffffffff81b3bb60 t vlv_read_csc +ffffffff81b3bd40 t i9xx_color_check +ffffffff81b3bff0 t i9xx_load_luts +ffffffff81b3c460 t i9xx_read_luts +ffffffff81b3c810 t i9xx_lut_equal +ffffffff81b3ca30 t icl_color_check +ffffffff81b3ce50 t icl_color_commit_noarm +ffffffff81b3d110 t icl_color_commit_arm +ffffffff81b3d200 t icl_load_luts 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ilk_assign_luts +ffffffff81b41a50 t ilk_color_commit_noarm +ffffffff81b41aa0 t hsw_color_commit_arm +ffffffff81b41b60 t ilk_read_csc +ffffffff81b41bb0 t ivb_load_luts +ffffffff81b41db0 t ivb_read_luts +ffffffff81b422a0 t ivb_load_lut_10 +ffffffff81b424b0 t ilk_color_commit_arm +ffffffff81b42540 t ilk_color_check +ffffffff81b427c0 t ilk_load_luts +ffffffff81b42a50 t ilk_read_luts +ffffffff81b42cd0 t ilk_lut_equal +ffffffff81b44000 T intel_combo_phy_power_up_lanes +ffffffff81b44140 T intel_combo_phy_init +ffffffff81b446b0 T intel_combo_phy_uninit +ffffffff81b448a0 t icl_combo_phy_verify_state +ffffffff81b45000 T intel_connector_init +ffffffff81b45090 T intel_connector_alloc +ffffffff81b45140 T intel_connector_free +ffffffff81b45190 T intel_connector_destroy +ffffffff81b45210 T intel_connector_register +ffffffff81b45220 T intel_connector_unregister +ffffffff81b45230 T intel_connector_attach_encoder +ffffffff81b45250 T intel_connector_get_hw_state +ffffffff81b452b0 T intel_connector_get_pipe +ffffffff81b45380 T intel_connector_update_modes +ffffffff81b453b0 T intel_ddc_get_modes +ffffffff81b45440 T intel_attach_force_audio_property +ffffffff81b454e0 T intel_attach_broadcast_rgb_property +ffffffff81b45590 T intel_attach_aspect_ratio_property +ffffffff81b45600 T intel_attach_hdmi_colorspace_property +ffffffff81b45660 T intel_attach_dp_colorspace_property +ffffffff81b456c0 T intel_attach_scaling_mode_property +ffffffff81b46000 T intel_crt_port_enabled +ffffffff81b46090 T intel_crt_reset +ffffffff81b46190 T intel_crt_init +ffffffff81b46650 t hsw_crt_get_config +ffffffff81b46710 t hsw_crt_compute_config +ffffffff81b46820 t hsw_pre_pll_enable_crt +ffffffff81b46890 t hsw_pre_enable_crt +ffffffff81b46940 t hsw_enable_crt +ffffffff81b46b30 t hsw_disable_crt +ffffffff81b46ba0 t hsw_post_disable_crt +ffffffff81b46d90 t pch_crt_compute_config +ffffffff81b46de0 t pch_disable_crt +ffffffff81b46e10 t pch_post_disable_crt +ffffffff81b46f00 t intel_crt_compute_config +ffffffff81b46f50 t intel_disable_crt +ffffffff81b47040 t intel_crt_get_config +ffffffff81b470e0 t intel_crt_get_hw_state +ffffffff81b471b0 t intel_enable_crt +ffffffff81b472a0 t intel_spurious_crt_detect_dmi_callback +ffffffff81b47300 t intel_crt_get_modes +ffffffff81b47450 t intel_crt_detect +ffffffff81b47740 t intel_crt_mode_valid +ffffffff81b47860 t intel_crt_get_edid +ffffffff81b47940 t intel_crt_detect_hotplug +ffffffff81b47e50 t intel_crt_detect_ddc +ffffffff81b47f50 t intel_crt_load_detect +ffffffff81b49000 T intel_first_crtc +ffffffff81b49020 T intel_crtc_for_pipe +ffffffff81b49080 T intel_crtc_wait_for_next_vblank +ffffffff81b49090 T intel_wait_for_vblank_if_active +ffffffff81b49100 T intel_crtc_get_vblank_counter +ffffffff81b49190 T intel_crtc_max_vblank_count +ffffffff81b49220 T intel_crtc_vblank_on +ffffffff81b492c0 t assert_vblank_disabled +ffffffff81b493b0 T intel_crtc_vblank_off +ffffffff81b493e0 T intel_crtc_state_alloc +ffffffff81b494a0 T intel_crtc_state_reset +ffffffff81b49540 T intel_crtc_init +ffffffff81b49940 T intel_wait_for_vblank_workers +ffffffff81b49a00 T intel_usecs_to_scanlines +ffffffff81b49a50 T intel_pipe_update_start +ffffffff81b49f20 T intel_pipe_update_end +ffffffff81b4a2a0 t intel_crtc_destroy +ffffffff81b4a2e0 t intel_crtc_late_register +ffffffff81b4a310 t intel_crtc_vblank_work +ffffffff81b4b000 T intel_output_format_name +ffffffff81b4b040 T intel_crtc_state_dump +ffffffff81b4c620 t ilk_dump_csc +ffffffff81b4d000 T intel_cursor_plane_create +ffffffff81b4d240 t i845_cursor_max_stride +ffffffff81b4d270 t i845_cursor_update_arm +ffffffff81b4d4d0 t i845_cursor_disable_arm +ffffffff81b4d4f0 t i845_cursor_get_hw_state +ffffffff81b4d5b0 t i845_check_cursor +ffffffff81b4d770 t i9xx_cursor_max_stride +ffffffff81b4d7b0 t i9xx_cursor_update_arm +ffffffff81b4db70 t i9xx_cursor_disable_arm +ffffffff81b4db90 t i9xx_cursor_get_hw_state +ffffffff81b4dca0 t i9xx_check_cursor +ffffffff81b4df50 t intel_check_cursor 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icl_ddi_combo_get_config +ffffffff81b5d190 t icl_ddi_combo_enable_clock +ffffffff81b5d310 t icl_ddi_combo_disable_clock +ffffffff81b5d3d0 t icl_ddi_combo_is_clock_enabled +ffffffff81b5d460 t icl_ddi_tc_enable_clock +ffffffff81b5d670 t icl_ddi_tc_disable_clock +ffffffff81b5d770 t icl_ddi_tc_is_clock_enabled +ffffffff81b5d840 t icl_ddi_tc_get_config +ffffffff81b5dab0 t bxt_ddi_get_config +ffffffff81b5db40 t skl_ddi_enable_clock +ffffffff81b5dc60 t skl_ddi_disable_clock +ffffffff81b5dd00 t skl_ddi_is_clock_enabled +ffffffff81b5dd80 t skl_ddi_get_config +ffffffff81b5de30 t icl_combo_phy_set_signal_levels +ffffffff81b5eb10 t tgl_dkl_phy_set_signal_levels +ffffffff81b5eeb0 t icl_mg_phy_set_signal_levels +ffffffff81b5f940 t hsw_set_signal_levels +ffffffff81b5fd20 t intel_ddi_max_lanes +ffffffff81b5fe10 t need_aux_ch +ffffffff81b5fe90 t intel_ddi_tc_encoder_suspend_complete +ffffffff81b5fed0 t intel_ddi_tc_encoder_shutdown_complete +ffffffff81b5ff10 t lpt_digital_port_connected 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is_hobl_buf_trans +ffffffff81b63040 T intel_ddi_buf_trans_init +ffffffff81b63330 t mtl_get_cx0_buf_trans +ffffffff81b63430 t dg2_get_snps_buf_trans +ffffffff81b634b0 t adlp_get_combo_buf_trans +ffffffff81b635d0 t adlp_get_dkl_buf_trans +ffffffff81b63630 t adls_get_combo_buf_trans +ffffffff81b63750 t rkl_get_combo_buf_trans +ffffffff81b63870 t dg1_get_combo_buf_trans +ffffffff81b63990 t tgl_get_combo_buf_trans +ffffffff81b63ad0 t tgl_get_dkl_buf_trans +ffffffff81b63b30 t jsl_get_combo_buf_trans +ffffffff81b63bd0 t ehl_get_combo_buf_trans +ffffffff81b63c70 t icl_get_combo_buf_trans +ffffffff81b63d20 t icl_get_mg_buf_trans +ffffffff81b63d80 t bxt_get_buf_trans +ffffffff81b63e00 t kbl_y_get_buf_trans +ffffffff81b63ea0 t kbl_u_get_buf_trans +ffffffff81b63f40 t kbl_get_buf_trans +ffffffff81b63fe0 t skl_y_get_buf_trans +ffffffff81b64080 t skl_u_get_buf_trans +ffffffff81b64120 t skl_get_buf_trans +ffffffff81b641c0 t bdw_get_buf_trans +ffffffff81b64250 t hsw_get_buf_trans +ffffffff81b65000 T vlv_get_hpll_vco +ffffffff81b65050 T vlv_get_cck_clock +ffffffff81b65100 T vlv_get_cck_clock_hpll +ffffffff81b65220 T intel_update_czclk +ffffffff81b652b0 T is_trans_port_sync_master +ffffffff81b652e0 T is_trans_port_sync_mode +ffffffff81b65320 T intel_crtc_bigjoiner_slave_pipes +ffffffff81b65380 T intel_crtc_is_bigjoiner_slave +ffffffff81b653e0 T intel_crtc_is_bigjoiner_master +ffffffff81b65440 T intel_master_crtc +ffffffff81b654e0 T assert_transcoder +ffffffff81b656e0 t transcoder_name +ffffffff81b65720 T vlv_wait_port_ready +ffffffff81b65880 T intel_enable_transcoder +ffffffff81b65b60 t assert_planes_disabled +ffffffff81b65cb0 T intel_disable_transcoder +ffffffff81b65f10 T intel_rotation_info_size +ffffffff81b65f60 T intel_remapped_info_size +ffffffff81b66090 T intel_plane_uses_fence +ffffffff81b660e0 T intel_fb_xy_to_linear +ffffffff81b66130 T intel_add_fb_offsets +ffffffff81b66180 T intel_plane_fb_max_stride +ffffffff81b66210 T intel_set_plane_visible +ffffffff81b66260 T intel_plane_fixup_bitmasks +ffffffff81b66310 T intel_plane_disable_noatomic +ffffffff81b66530 T intel_plane_fence_y_offset +ffffffff81b665a0 T intel_has_pending_fb_unpin +ffffffff81b666b0 T intel_get_crtc_new_encoder +ffffffff81b66850 T ilk_pfit_disable +ffffffff81b66910 T intel_phy_is_combo +ffffffff81b66980 T intel_phy_is_tc +ffffffff81b669f0 T intel_phy_is_snps +ffffffff81b66a40 T intel_port_to_phy +ffffffff81b66af0 T intel_port_to_tc +ffffffff81b66c00 T intel_aux_power_domain +ffffffff81b66c50 T intel_modeset_get_crtc_power_domains +ffffffff81b66e90 T intel_modeset_put_crtc_power_domains +ffffffff81b66ec0 T intel_encoder_destroy +ffffffff81b66f00 T intel_encoder_get_config +ffffffff81b66f40 t intel_crtc_readout_derived_state +ffffffff81b673b0 T intel_link_compute_m_n +ffffffff81b674e0 T intel_panel_sanitize_ssc +ffffffff81b675d0 T intel_zero_m_n +ffffffff81b67610 T intel_set_m_n +ffffffff81b676f0 T intel_cpu_transcoder_has_m2_n2 +ffffffff81b67750 T intel_cpu_transcoder_set_m1_n1 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intel_scanout_needs_vtd_wa +ffffffff81b73e50 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81b73ff0 t intel_atomic_cleanup_work +ffffffff81b74120 t intel_pre_plane_update +ffffffff81b74730 t hsw_get_pipe_config +ffffffff81b75520 t hsw_crtc_enable +ffffffff81b760d0 t hsw_crtc_disable +ffffffff81b76430 t skl_commit_modeset_enables +ffffffff81b76a70 t intel_get_transcoder_timings +ffffffff81b76dc0 t intel_get_pipe_src_size +ffffffff81b76ef0 t ilk_get_pfit_config +ffffffff81b77090 t enabled_bigjoiner_pipes +ffffffff81b77300 t bdw_set_pipe_misc +ffffffff81b77460 t ilk_pfit_enable +ffffffff81b77590 t intel_set_transcoder_timings +ffffffff81b77990 t intel_update_crtc +ffffffff81b780e0 t intel_commit_modeset_enables +ffffffff81b78220 t ilk_get_pipe_config +ffffffff81b784c0 t ilk_crtc_enable +ffffffff81b78940 t ilk_crtc_disable +ffffffff81b78c20 t i9xx_get_pipe_config +ffffffff81b794a0 t valleyview_crtc_enable +ffffffff81b799c0 t i9xx_crtc_disable +ffffffff81b79de0 t i9xx_pfit_enable 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gen8_de_pipe_underrun_mask +ffffffff81b80e50 T gen8_de_irq_handler +ffffffff81b81be0 T gen11_gu_misc_irq_ack +ffffffff81b81c30 T gen11_gu_misc_irq_handler +ffffffff81b81c70 T gen11_display_irq_handler +ffffffff81b81d00 T i8xx_enable_vblank +ffffffff81b81d90 T i915gm_enable_vblank +ffffffff81b81e60 T i965_enable_vblank +ffffffff81b81ef0 T ilk_enable_vblank +ffffffff81b81fc0 T bdw_enable_vblank +ffffffff81b821d0 T i8xx_disable_vblank +ffffffff81b82240 T i915gm_disable_vblank +ffffffff81b82320 T i965_disable_vblank +ffffffff81b82390 T ilk_disable_vblank +ffffffff81b824b0 T bdw_disable_vblank +ffffffff81b82680 T vlv_display_irq_reset +ffffffff81b827a0 T vlv_display_irq_postinstall +ffffffff81b82910 T gen8_display_irq_reset +ffffffff81b82ae0 T gen11_display_irq_reset +ffffffff81b82e10 T gen8_irq_power_well_post_enable +ffffffff81b82fb0 T gen8_irq_power_well_pre_disable +ffffffff81b83100 T valleyview_enable_display_irqs +ffffffff81b83260 T valleyview_disable_display_irqs +ffffffff81b833b0 T ilk_de_irq_postinstall +ffffffff81b834d0 T gen8_de_irq_postinstall +ffffffff81b839b0 T gen11_de_irq_postinstall +ffffffff81b83a30 T dg1_de_irq_postinstall +ffffffff81b83ab0 T intel_display_irq_init +ffffffff81b84000 T intel_display_power_domain_str +ffffffff81b84070 T __intel_display_power_is_enabled +ffffffff81b84150 T intel_display_power_is_enabled +ffffffff81b84290 T intel_display_power_set_target_dc_state +ffffffff81b843e0 T intel_display_power_get +ffffffff81b84480 t __intel_display_power_get_domain +ffffffff81b84690 T intel_display_power_get_if_enabled +ffffffff81b84810 T __intel_display_power_put_async +ffffffff81b84a40 t __intel_display_power_put_domain +ffffffff81b84be0 T intel_display_power_flush_work +ffffffff81b84d30 t release_async_put_domains +ffffffff81b84e40 T intel_display_power_put_unchecked +ffffffff81b84eb0 T intel_display_power_get_in_set +ffffffff81b84fb0 T intel_display_power_get_in_set_if_enabled +ffffffff81b85070 T intel_display_power_put_mask_in_set +ffffffff81b85160 T intel_power_domains_init +ffffffff81b853e0 t intel_display_power_put_async_work +ffffffff81b856b0 T intel_power_domains_cleanup +ffffffff81b856d0 T gen9_dbuf_slices_update +ffffffff81b85930 T intel_power_domains_init_hw +ffffffff81b85fa0 t icl_display_core_init +ffffffff81b868b0 t bxt_display_core_init +ffffffff81b86a60 t vlv_cmnlane_wa +ffffffff81b86b70 t assert_ved_power_gated +ffffffff81b86c40 t hsw_assert_cdclk +ffffffff81b86d80 t intel_pch_reset_handshake +ffffffff81b86e30 T intel_power_domains_driver_remove +ffffffff81b86f50 T intel_power_domains_sanitize_state +ffffffff81b87070 T intel_power_domains_enable +ffffffff81b870e0 T intel_power_domains_disable +ffffffff81b871c0 T intel_power_domains_suspend +ffffffff81b87420 t icl_display_core_uninit +ffffffff81b87580 t bxt_display_core_uninit +ffffffff81b87680 T intel_power_domains_resume +ffffffff81b87780 T intel_display_power_suspend_late +ffffffff81b87880 t hsw_enable_pc8 +ffffffff81b887b0 T intel_display_power_resume_early +ffffffff81b888c0 t hsw_disable_pc8 +ffffffff81b88dd0 T intel_display_power_suspend +ffffffff81b88e60 T intel_display_power_resume +ffffffff81b88f80 T intel_display_power_debug +ffffffff81b89080 T intel_display_power_ddi_io_domain +ffffffff81b89180 T intel_display_power_ddi_lanes_domain +ffffffff81b89280 T intel_display_power_aux_io_domain +ffffffff81b89390 T intel_display_power_legacy_aux_domain +ffffffff81b894a0 T intel_display_power_tbt_aux_domain +ffffffff81b895b0 t __delayed_work_tick +ffffffff81b8a000 T intel_display_power_map_init +ffffffff81b8a180 t __set_power_wells +ffffffff81b8a580 T intel_display_power_map_cleanup +ffffffff81b8b000 T lookup_power_well +ffffffff81b8b0c0 T intel_power_well_enable +ffffffff81b8b160 T intel_power_well_name +ffffffff81b8b1a0 T intel_power_well_disable +ffffffff81b8b210 T intel_power_well_sync_hw +ffffffff81b8b290 T intel_power_well_get +ffffffff81b8b340 T intel_power_well_put +ffffffff81b8b440 T intel_power_well_is_enabled +ffffffff81b8b460 T intel_power_well_is_enabled_cached +ffffffff81b8b490 T intel_display_power_well_is_enabled +ffffffff81b8b550 T intel_power_well_is_always_on +ffffffff81b8b590 T intel_power_well_domains +ffffffff81b8b5c0 T intel_power_well_refcount +ffffffff81b8b5f0 T gen9_sanitize_dc_state +ffffffff81b8b6d0 T gen9_set_dc_state +ffffffff81b8baa0 T gen9_enable_dc5 +ffffffff81b8bd60 T skl_enable_dc6 +ffffffff81b8bef0 T bxt_enable_dc9 +ffffffff81b8c0f0 T bxt_disable_dc9 +ffffffff81b8c210 T gen9_disable_dc_states +ffffffff81b8c650 T chv_phy_powergate_ch +ffffffff81b8c780 t assert_chv_phy_status +ffffffff81b8cb70 T chv_phy_powergate_lanes +ffffffff81b8ce30 t i9xx_power_well_sync_hw_noop +ffffffff81b8ce60 t i9xx_always_on_power_well_noop +ffffffff81b8ce90 t i9xx_always_on_power_well_enabled +ffffffff81b8cec0 t chv_pipe_power_well_sync_hw +ffffffff81b8cef0 t chv_pipe_power_well_enable +ffffffff81b8cf30 t chv_pipe_power_well_disable +ffffffff81b8cfc0 t chv_pipe_power_well_enabled +ffffffff81b8d0e0 t chv_dpio_cmn_power_well_enable +ffffffff81b8d360 t chv_dpio_cmn_power_well_disable +ffffffff81b8d4c0 t vlv_power_well_enabled +ffffffff81b8d600 t i830_pipes_power_well_sync_hw +ffffffff81b8d710 t i830_pipes_power_well_enable +ffffffff81b8d7e0 t i830_pipes_power_well_disable +ffffffff81b8d820 t i830_pipes_power_well_enabled +ffffffff81b8d8d0 t hsw_power_well_sync_hw +ffffffff81b8d9e0 t hsw_power_well_enable +ffffffff81b8dca0 t hsw_power_well_disable +ffffffff81b8dd70 t hsw_power_well_enabled +ffffffff81b8de70 t gen9_dc_off_power_well_enable +ffffffff81b8de80 t gen9_dc_off_power_well_disable +ffffffff81b8df30 t gen9_dc_off_power_well_enabled +ffffffff81b8dfd0 t bxt_dpio_cmn_power_well_enable +ffffffff81b8e000 t bxt_dpio_cmn_power_well_disable +ffffffff81b8e030 t bxt_dpio_cmn_power_well_enabled +ffffffff81b8e060 t vlv_display_power_well_enable +ffffffff81b8e0a0 t vlv_display_power_well_disable +ffffffff81b8e140 t vlv_dpio_cmn_power_well_enable +ffffffff81b8e1e0 t vlv_dpio_cmn_power_well_disable +ffffffff81b8e310 t vlv_power_well_enable +ffffffff81b8e330 t vlv_power_well_disable +ffffffff81b8e350 t icl_aux_power_well_enable +ffffffff81b8eb20 t icl_aux_power_well_disable +ffffffff81b8edf0 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81b8ee10 t tgl_tc_cold_off_power_well_enable +ffffffff81b8ee30 t tgl_tc_cold_off_power_well_disable +ffffffff81b8ee50 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81b8ee80 t xelpdp_aux_power_well_enable +ffffffff81b8ef60 t xelpdp_aux_power_well_disable +ffffffff81b8f040 t xelpdp_aux_power_well_enabled +ffffffff81b8f100 t chv_set_pipe_power_well +ffffffff81b8f360 t vlv_display_power_well_init +ffffffff81b8f780 t vlv_set_power_well +ffffffff81b8fa00 t hsw_wait_for_power_well_enable +ffffffff81b8fb60 t hsw_wait_for_power_well_disable +ffffffff81b8fe80 t tgl_tc_cold_request +ffffffff81b91000 T intel_display_reset_prepare +ffffffff81b91240 T intel_display_reset_finish +ffffffff81b92000 T intel_display_rps_boost_after_vblank +ffffffff81b92140 t do_rps_boost +ffffffff81b92200 T intel_display_rps_mark_interactive +ffffffff81b93000 T intel_dkl_phy_init +ffffffff81b93020 T intel_dkl_phy_read +ffffffff81b93170 T intel_dkl_phy_write +ffffffff81b932a0 T intel_dkl_phy_rmw +ffffffff81b93400 T intel_dkl_phy_posting_read +ffffffff81b94000 T intel_dmc_has_payload +ffffffff81b94050 T intel_dmc_enable_pipe +ffffffff81b94180 T intel_dmc_disable_pipe +ffffffff81b942b0 T intel_dmc_load_program +ffffffff81b94bb0 t pipedmc_clock_gating_wa +ffffffff81b94e00 T intel_dmc_disable_program +ffffffff81b95060 T assert_dmc_loaded +ffffffff81b95220 T intel_dmc_init +ffffffff81b95510 t dmc_load_work_fn +ffffffff81b95ef0 T intel_dmc_suspend +ffffffff81b95f80 T intel_dmc_resume +ffffffff81b96030 T intel_dmc_fini +ffffffff81b961c0 T intel_dmc_print_error_state +ffffffff81b962d0 T intel_dmc_debugfs_register +ffffffff81b97000 T intel_dp_is_edp +ffffffff81b97030 T intel_dp_is_uhbr +ffffffff81b97070 T intel_dp_max_lane_count +ffffffff81b970e0 T intel_dp_link_required +ffffffff81b97120 T intel_dp_max_data_rate +ffffffff81b97180 T intel_dp_can_bigjoiner +ffffffff81b971f0 T intel_dp_get_link_train_fallback_values +ffffffff81b975f0 T intel_dp_mode_to_fec_clock +ffffffff81b97640 T intel_dp_dsc_nearest_valid_bpp +ffffffff81b97750 T intel_dp_dsc_get_output_bpp +ffffffff81b97880 T intel_dp_dsc_get_slice_count +ffffffff81b97a30 T intel_dp_min_bpp +ffffffff81b97a70 T intel_dp_need_bigjoiner +ffffffff81b97ae0 T intel_dp_source_supports_tps3 +ffffffff81b97b30 T intel_dp_source_supports_tps4 +ffffffff81b97b70 T intel_dp_max_link_rate +ffffffff81b97c30 T intel_dp_rate_select +ffffffff81b97cd0 T intel_dp_compute_rate +ffffffff81b97db0 T intel_dp_has_hdmi_sink +ffffffff81b97df0 T intel_dp_adjust_compliance_config +ffffffff81b97f40 T intel_dp_dsc_compute_bpp +ffffffff81b98000 T intel_dp_dsc_compute_config +ffffffff81b98760 T intel_dp_limited_color_range +ffffffff81b987d0 T intel_dp_compute_psr_vsc_sdp +ffffffff81b98850 T intel_dp_needs_vsc_sdp +ffffffff81b988a0 t intel_dp_compute_vsc_colorimetry +ffffffff81b98a20 T intel_dp_compute_config +ffffffff81b98ef0 t intel_dp_compute_output_format +ffffffff81b99150 t intel_dp_audio_compute_config +ffffffff81b99240 t intel_dp_drrs_compute_config +ffffffff81b99430 t intel_dp_compute_vsc_sdp +ffffffff81b994e0 t intel_dp_compute_hdr_metadata_infoframe_sdp +ffffffff81b99590 T intel_dp_set_link_params +ffffffff81b995d0 T intel_edp_backlight_on +ffffffff81b99680 T intel_edp_backlight_off +ffffffff81b99730 T intel_dp_sink_set_decompression_state +ffffffff81b997e0 T intel_dp_wait_source_oui +ffffffff81b998e0 T intel_dp_set_power +ffffffff81b99b60 T intel_dp_sync_state +ffffffff81b99bf0 t intel_dp_get_dpcd +ffffffff81b99d90 t intel_dp_reset_max_link_params +ffffffff81b99eb0 T intel_dp_initial_fastset_check +ffffffff81b9a000 T intel_dp_check_frl_training +ffffffff81b9a690 T intel_dp_pcon_dsc_configure +ffffffff81b9a8c0 T intel_dp_configure_protocol_converter +ffffffff81b9aab0 T intel_dp_get_colorimetry_status +ffffffff81b9ab20 T intel_edp_fixup_vbt_bpp +ffffffff81b9abb0 T intel_write_dp_vsc_sdp +ffffffff81b9ad60 T intel_dp_set_infoframes +ffffffff81b9aea0 t intel_write_dp_sdp +ffffffff81b9b1a0 T intel_read_dp_sdp +ffffffff81b9b4f0 T intel_dp_get_active_pipes +ffffffff81b9b750 T intel_dp_retrain_link +ffffffff81b9bac0 t intel_dp_needs_link_retrain +ffffffff81b9bc70 T intel_dp_phy_test +ffffffff81b9c440 T intel_digital_port_connected +ffffffff81b9c510 T intel_dp_encoder_flush_work +ffffffff81b9c590 T intel_dp_encoder_suspend +ffffffff81b9c5d0 T intel_dp_encoder_shutdown +ffffffff81b9c610 T intel_dp_hpd_pulse +ffffffff81b9cda0 T intel_dp_is_port_edp +ffffffff81b9ce30 T intel_dp_init_connector +ffffffff81b9e260 t intel_dp_modeset_retry_work_fn +ffffffff81b9e320 t intel_dp_set_common_rates +ffffffff81b9e4c0 T intel_dp_mst_suspend +ffffffff81b9e570 T intel_dp_mst_resume +ffffffff81b9e640 t intel_dp_output_format +ffffffff81b9e780 t intel_dp_compute_link_config +ffffffff81b9efe0 t intel_dp_tmds_clock_valid +ffffffff81b9f080 t intel_dp_set_sink_rates +ffffffff81b9f2e0 t intel_dp_check_device_service_irq +ffffffff81b9f990 t intel_dp_force +ffffffff81b9faf0 t intel_dp_connector_register +ffffffff81b9fbf0 t intel_dp_connector_unregister +ffffffff81b9fc50 t intel_dp_oob_hotplug_event +ffffffff81b9fce0 t intel_dp_set_edid +ffffffff81ba0190 t intel_dp_get_modes +ffffffff81ba02a0 t intel_dp_detect +ffffffff81ba0c70 t intel_dp_mode_valid +ffffffff81ba1070 t intel_dp_connector_atomic_check +ffffffff81ba1480 t intel_dp_get_dsc_sink_cap +ffffffff81ba1610 t intel_dp_mode_min_output_bpp +ffffffff81ba1680 t intel_dp_mode_valid_downstream +ffffffff81ba1870 t icl_max_source_rate +ffffffff81ba2000 T intel_dp_aux_pack +ffffffff81ba2070 T intel_dp_aux_fini +ffffffff81ba2090 T intel_dp_aux_init +ffffffff81ba22b0 t xelpdp_aux_ctl_reg +ffffffff81ba2390 t xelpdp_aux_data_reg +ffffffff81ba2470 t tgl_aux_ctl_reg +ffffffff81ba2500 t tgl_aux_data_reg +ffffffff81ba25a0 t skl_aux_ctl_reg +ffffffff81ba2630 t skl_aux_data_reg +ffffffff81ba26d0 t ilk_aux_ctl_reg +ffffffff81ba2750 t ilk_aux_data_reg +ffffffff81ba27e0 t g4x_aux_ctl_reg +ffffffff81ba2870 t g4x_aux_data_reg +ffffffff81ba2910 t skl_get_aux_clock_divider +ffffffff81ba2940 t hsw_get_aux_clock_divider +ffffffff81ba29d0 t ilk_get_aux_clock_divider +ffffffff81ba2a30 t g4x_get_aux_clock_divider +ffffffff81ba2a80 t skl_get_aux_send_ctl +ffffffff81ba2b00 t g4x_get_aux_send_ctl +ffffffff81ba2b60 t kasprintf +ffffffff81ba2c40 t intel_dp_aux_transfer +ffffffff81ba2f00 T intel_dp_aux_ch +ffffffff81ba3080 T intel_dp_aux_irq_handler +ffffffff81ba3120 t intel_dp_aux_xfer +ffffffff81ba4000 T intel_dp_aux_init_backlight_funcs +ffffffff81ba4290 t intel_dp_aux_hdr_setup_backlight +ffffffff81ba4430 t intel_dp_aux_hdr_get_backlight +ffffffff81ba45e0 t intel_dp_aux_hdr_set_backlight +ffffffff81ba46f0 t intel_dp_aux_hdr_disable_backlight +ffffffff81ba4780 t intel_dp_aux_hdr_enable_backlight +ffffffff81ba4a10 t intel_dp_aux_vesa_setup_backlight +ffffffff81ba4ca0 t intel_dp_aux_vesa_get_backlight +ffffffff81ba4cd0 t intel_dp_aux_vesa_set_backlight +ffffffff81ba4d70 t intel_dp_aux_vesa_disable_backlight +ffffffff81ba4e30 t intel_dp_aux_vesa_enable_backlight +ffffffff81ba5000 T intel_dp_hdcp_init +ffffffff81ba50c0 t intel_dp_hdcp_write_an_aksv +ffffffff81ba51d0 t intel_dp_hdcp_read_bksv +ffffffff81ba5270 t intel_dp_hdcp_read_bstatus +ffffffff81ba5310 t intel_dp_hdcp_repeater_present +ffffffff81ba53d0 t intel_dp_hdcp_read_ri_prime +ffffffff81ba5470 t intel_dp_hdcp_read_ksv_ready +ffffffff81ba5520 t intel_dp_hdcp_read_ksv_fifo +ffffffff81ba5620 t intel_dp_hdcp_read_v_prime_part +ffffffff81ba56d0 t intel_dp_hdcp_toggle_signalling +ffffffff81ba5700 t intel_dp_mst_hdcp_stream_encryption +ffffffff81ba5910 t intel_dp_hdcp_check_link +ffffffff81ba59a0 t intel_dp_hdcp_capable +ffffffff81ba5a60 t intel_dp_hdcp2_capable +ffffffff81ba5af0 t intel_dp_hdcp2_write_msg +ffffffff81ba5cb0 t intel_dp_hdcp2_read_msg +ffffffff81ba6400 t intel_dp_hdcp2_config_stream_type +ffffffff81ba6460 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81ba6700 t intel_dp_mst_hdcp2_check_link +ffffffff81ba67d0 t intel_dp_hdcp2_check_link +ffffffff81ba7000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81ba7100 t intel_dp_init_lttpr +ffffffff81ba7450 T intel_dp_get_adjust_train +ffffffff81ba7cc0 T intel_dp_program_link_training_pattern +ffffffff81ba7df0 T intel_dp_set_signal_levels +ffffffff81ba81c0 T intel_dp_dump_link_status +ffffffff81ba82c0 T intel_dp_stop_link_train +ffffffff81ba85e0 T intel_dp_start_link_train +ffffffff81baa8c0 T intel_dp_128b132b_sdp_crc16 +ffffffff81baa9b0 t intel_dp_link_train_phy +ffffffff81bad000 T intel_dp_mst_encoder_active_links +ffffffff81bad030 T intel_dp_mst_encoder_init +ffffffff81bad2a0 T intel_dp_mst_source_support +ffffffff81bad2e0 T intel_dp_mst_encoder_cleanup +ffffffff81bad340 T intel_dp_mst_is_master_trans +ffffffff81bad380 T intel_dp_mst_is_slave_trans +ffffffff81bad3c0 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81bad490 t intel_dp_add_mst_connector +ffffffff81bad750 t intel_dp_mst_poll_hpd_irq +ffffffff81bad770 t intel_dp_mst_get_hw_state +ffffffff81bad7e0 t intel_dp_mst_connector_late_register +ffffffff81bad870 t intel_dp_mst_connector_early_unregister +ffffffff81bad8b0 t intel_dp_mst_get_modes +ffffffff81bad960 t intel_dp_mst_detect +ffffffff81bada70 t intel_dp_mst_mode_valid_ctx +ffffffff81badd10 t intel_mst_atomic_best_encoder +ffffffff81badd70 t intel_dp_mst_atomic_check +ffffffff81badf60 t intel_dp_mst_compute_config +ffffffff81bae590 t intel_dp_mst_compute_config_late +ffffffff81bae6a0 t intel_mst_disable_dp +ffffffff81bae7c0 t intel_mst_post_disable_dp +ffffffff81baeaf0 t intel_mst_post_pll_disable_dp +ffffffff81baeb50 t intel_mst_pre_pll_enable_dp +ffffffff81baeb90 t intel_mst_pre_enable_dp +ffffffff81baee00 t intel_mst_enable_dp +ffffffff81baf250 t intel_dp_mst_enc_get_hw_state +ffffffff81baf290 t intel_dp_mst_enc_get_config +ffffffff81baf2b0 t intel_dp_mst_initial_fastset_check +ffffffff81baf2d0 t intel_dp_mst_encoder_destroy +ffffffff81baf310 t intel_dp_mst_find_vcpi_slots_for_bpp +ffffffff81bb0000 T bxt_port_to_phy_channel +ffffffff81bb0120 T bxt_ddi_phy_set_signal_levels +ffffffff81bb0570 T bxt_ddi_phy_is_enabled +ffffffff81bb06c0 T bxt_ddi_phy_uninit +ffffffff81bb07c0 T bxt_ddi_phy_init +ffffffff81bb0a20 t _bxt_ddi_phy_init +ffffffff81bb1020 T bxt_ddi_phy_verify_state +ffffffff81bb1370 t __phy_reg_verify_state +ffffffff81bb1490 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81bb1500 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81bb17b0 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81bb19c0 T vlv_dig_port_to_channel +ffffffff81bb1a30 T vlv_dig_port_to_phy +ffffffff81bb1aa0 T vlv_pipe_to_channel +ffffffff81bb1b00 T chv_set_phy_signal_level +ffffffff81bb1ef0 T chv_data_lane_soft_reset +ffffffff81bb20f0 T chv_phy_pre_pll_enable +ffffffff81bb2400 T chv_phy_pre_encoder_enable +ffffffff81bb26c0 T chv_phy_release_cl2_override +ffffffff81bb2750 T chv_phy_post_pll_disable +ffffffff81bb2830 T vlv_set_phy_signal_level +ffffffff81bb29e0 T vlv_phy_pre_pll_enable +ffffffff81bb2b20 T vlv_phy_pre_encoder_enable +ffffffff81bb2c50 T vlv_phy_reset_lanes +ffffffff81bb3000 T pnv_calc_dpll_params +ffffffff81bb30c0 T i9xx_calc_dpll_params +ffffffff81bb3190 T vlv_calc_dpll_params +ffffffff81bb3250 T chv_calc_dpll_params +ffffffff81bb3330 T bxt_find_best_dpll +ffffffff81bb3350 t chv_find_best_dpll +ffffffff81bb36a0 T i9xx_dpll_compute_fp +ffffffff81bb36e0 T vlv_compute_dpll +ffffffff81bb3760 T chv_compute_dpll +ffffffff81bb37e0 T intel_dpll_crtc_compute_clock +ffffffff81bb38f0 T intel_dpll_crtc_get_shared_dpll +ffffffff81bb3a70 T intel_dpll_init_clock_hook +ffffffff81bb3b80 T i9xx_enable_pll +ffffffff81bb4010 T vlv_enable_pll +ffffffff81bb4640 T chv_enable_pll +ffffffff81bb4d40 T vlv_force_pll_on +ffffffff81bb4ec0 T vlv_disable_pll +ffffffff81bb4fb0 T chv_disable_pll +ffffffff81bb5130 T i9xx_disable_pll +ffffffff81bb5260 T vlv_force_pll_off +ffffffff81bb5380 T assert_pll_enabled +ffffffff81bb5490 T assert_pll_disabled +ffffffff81bb55a0 t intel_pll_is_valid +ffffffff81bb5660 t mtl_crtc_compute_clock +ffffffff81bb5760 t dg2_crtc_compute_clock +ffffffff81bb5800 t hsw_crtc_compute_clock +ffffffff81bb58e0 t hsw_crtc_get_shared_dpll +ffffffff81bb5990 t ilk_crtc_compute_clock +ffffffff81bb5ce0 t ilk_crtc_get_shared_dpll +ffffffff81bb5d30 t g4x_find_best_dpll +ffffffff81bb6090 t chv_crtc_compute_clock +ffffffff81bb61b0 t vlv_crtc_compute_clock +ffffffff81bb6660 t g4x_crtc_compute_clock +ffffffff81bb67f0 t i9xx_compute_dpll +ffffffff81bb6a90 t pnv_crtc_compute_clock +ffffffff81bb6ea0 t i9xx_crtc_compute_clock +ffffffff81bb6fe0 t i9xx_find_best_dpll +ffffffff81bb7320 t i8xx_crtc_compute_clock +ffffffff81bb8000 T intel_get_shared_dpll_by_id +ffffffff81bb8040 T assert_shared_dpll +ffffffff81bb8200 T intel_dpll_get_hw_state +ffffffff81bb8230 T icl_tc_port_to_pll_id +ffffffff81bb8260 T intel_enable_shared_dpll +ffffffff81bb8610 T intel_disable_shared_dpll +ffffffff81bb88f0 T intel_unreference_shared_dpll_crtc +ffffffff81bb8a00 T intel_shared_dpll_swap_state +ffffffff81bb8b00 T icl_set_active_port_dpll +ffffffff81bb8b40 T intel_shared_dpll_init +ffffffff81bb8d60 T intel_compute_shared_dplls +ffffffff81bb8df0 T intel_reserve_shared_dplls +ffffffff81bb8e80 T intel_release_shared_dplls +ffffffff81bb8ec0 T intel_update_active_dpll +ffffffff81bb8f20 T intel_dpll_get_freq +ffffffff81bb8fb0 T intel_dpll_update_ref_clks +ffffffff81bb9000 T intel_dpll_readout_hw_state +ffffffff81bb9260 T intel_dpll_sanitize_state +ffffffff81bb9360 T intel_dpll_dump_hw_state +ffffffff81bb93f0 T intel_shared_dpll_state_verify +ffffffff81bb95e0 t verify_single_dpll_state +ffffffff81bb9c10 T intel_shared_dpll_verify_disabled +ffffffff81bb9ca0 t icl_compute_dplls +ffffffff81bba940 t icl_get_dplls +ffffffff81bbaca0 t icl_put_dplls +ffffffff81bbad60 t icl_update_active_dpll +ffffffff81bbae20 t icl_update_dpll_ref_clks +ffffffff81bbae60 t icl_dump_hw_state +ffffffff81bbaf30 t combo_pll_enable +ffffffff81bbb190 t combo_pll_disable +ffffffff81bbb270 t combo_pll_get_hw_state +ffffffff81bbb2f0 t icl_ddi_combo_pll_get_freq +ffffffff81bbb4d0 t icl_dpll_write +ffffffff81bbb740 t adlp_cmtg_clock_gating_wa +ffffffff81bbb8e0 t icl_pll_disable +ffffffff81bbbab0 t icl_pll_get_hw_state +ffffffff81bbbe00 t tbt_pll_enable +ffffffff81bbc000 t tbt_pll_disable +ffffffff81bbc020 t tbt_pll_get_hw_state +ffffffff81bbc040 t icl_ddi_tbt_pll_get_freq +ffffffff81bbc0b0 t mg_pll_enable +ffffffff81bbc820 t mg_pll_disable +ffffffff81bbc860 t dkl_pll_get_hw_state +ffffffff81bbcad0 t icl_ddi_mg_pll_get_freq +ffffffff81bbcbb0 t icl_calc_dpll_state +ffffffff81bbccf0 t intel_find_shared_dpll +ffffffff81bbd060 t intel_reference_shared_dpll +ffffffff81bbd2b0 t intel_unreference_shared_dpll +ffffffff81bbd4f0 t mg_pll_get_hw_state +ffffffff81bbd7b0 t bxt_compute_dpll +ffffffff81bbdae0 t bxt_get_dpll +ffffffff81bbdbc0 t intel_put_dpll +ffffffff81bbdc20 t bxt_update_dpll_ref_clks +ffffffff81bbdc60 t bxt_dump_hw_state +ffffffff81bbdd20 t bxt_ddi_pll_enable +ffffffff81bbe880 t bxt_ddi_pll_disable +ffffffff81bbeae0 t bxt_ddi_pll_get_hw_state +ffffffff81bbefb0 t bxt_ddi_pll_get_freq +ffffffff81bbf050 t bxt_ddi_set_dpll_hw_state +ffffffff81bbf250 t skl_compute_dpll +ffffffff81bbf9b0 t skl_get_dpll +ffffffff81bbfa70 t skl_update_dpll_ref_clks +ffffffff81bbfab0 t skl_dump_hw_state +ffffffff81bbfb20 t skl_ddi_dpll0_enable +ffffffff81bbfbf0 t skl_ddi_dpll0_disable +ffffffff81bbfc20 t skl_ddi_dpll0_get_hw_state +ffffffff81bbfd50 t skl_ddi_pll_get_freq +ffffffff81bbfde0 t skl_ddi_wrpll_get_freq +ffffffff81bbff40 t skl_ddi_pll_enable +ffffffff81bc01c0 t skl_ddi_pll_disable +ffffffff81bc0260 t skl_ddi_pll_get_hw_state +ffffffff81bc03b0 t hsw_compute_dpll +ffffffff81bc0be0 t hsw_get_dpll +ffffffff81bc0d40 t hsw_update_dpll_ref_clks +ffffffff81bc0dc0 t hsw_dump_hw_state +ffffffff81bc0df0 t hsw_ddi_wrpll_enable +ffffffff81bc0e80 t hsw_ddi_wrpll_disable +ffffffff81bc0f80 t hsw_ddi_wrpll_get_hw_state +ffffffff81bc1040 t hsw_ddi_wrpll_get_freq +ffffffff81bc1130 t hsw_ddi_spll_enable +ffffffff81bc11b0 t hsw_ddi_spll_disable +ffffffff81bc1290 t hsw_ddi_spll_get_hw_state +ffffffff81bc1330 t hsw_ddi_spll_get_freq +ffffffff81bc13d0 t hsw_ddi_lcpll_enable +ffffffff81bc1400 t hsw_ddi_lcpll_disable +ffffffff81bc1430 t hsw_ddi_lcpll_get_hw_state +ffffffff81bc1460 t hsw_ddi_lcpll_get_freq +ffffffff81bc14e0 t ibx_compute_dpll +ffffffff81bc1510 t ibx_get_dpll +ffffffff81bc1630 t ibx_dump_hw_state +ffffffff81bc16a0 t ibx_pch_dpll_enable +ffffffff81bc18a0 t ibx_pch_dpll_disable +ffffffff81bc1930 t ibx_pch_dpll_get_hw_state +ffffffff81bc2000 T intel_dpt_pin +ffffffff81bc2220 T intel_dpt_unpin +ffffffff81bc22a0 T intel_dpt_resume +ffffffff81bc2390 T intel_dpt_suspend +ffffffff81bc2480 T intel_dpt_create +ffffffff81bc2920 t dpt_insert_page +ffffffff81bc2990 t dpt_clear_range +ffffffff81bc29c0 t dpt_insert_entries +ffffffff81bc2ab0 t dpt_cleanup +ffffffff81bc2b00 t dpt_bind_vma +ffffffff81bc2ba0 t dpt_unbind_vma +ffffffff81bc2bd0 T intel_dpt_destroy +ffffffff81bc2c20 T intel_dpt_configure +ffffffff81bc2df0 t __ww_mutex_lock +ffffffff81bc3000 T intel_drrs_type_str +ffffffff81bc3040 T intel_drrs_is_active +ffffffff81bc3070 T intel_drrs_activate +ffffffff81bc3270 T intel_drrs_deactivate +ffffffff81bc3470 T intel_drrs_invalidate +ffffffff81bc3490 t intel_drrs_frontbuffer_update +ffffffff81bc3720 T intel_drrs_flush +ffffffff81bc3740 T intel_drrs_crtc_init +ffffffff81bc3800 t intel_drrs_downclock_work +ffffffff81bc3950 T intel_drrs_crtc_debugfs_add +ffffffff81bc3980 T intel_drrs_connector_debugfs_add +ffffffff81bc3990 t __delayed_work_tick +ffffffff81bc4000 T intel_dsb_reg_write +ffffffff81bc4140 T intel_dsb_finish +ffffffff81bc41c0 T intel_dsb_commit +ffffffff81bc4390 T intel_dsb_wait +ffffffff81bc45b0 T intel_dsb_prepare +ffffffff81bc4780 T intel_dsb_cleanup +ffffffff81bc5000 T intel_dsi_wait_panel_power_cycle +ffffffff81bc50f0 T intel_dsi_shutdown +ffffffff81bc51e0 T intel_dsi_bitrate +ffffffff81bc5270 T intel_dsi_tlpx_ns +ffffffff81bc52c0 T intel_dsi_get_modes +ffffffff81bc52d0 T intel_dsi_mode_valid +ffffffff81bc53a0 T intel_dsi_host_init +ffffffff81bc5460 T intel_dsi_get_panel_orientation +ffffffff81bc6000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81bc60a0 t dcs_setup_backlight +ffffffff81bc6130 t dcs_get_backlight +ffffffff81bc6230 t dcs_set_backlight +ffffffff81bc6330 t dcs_disable_backlight +ffffffff81bc6700 t dcs_enable_backlight +ffffffff81bc7000 T intel_dsi_vbt_exec_sequence +ffffffff81bc7020 T intel_dsi_log_params +ffffffff81bc7460 T intel_dsi_vbt_init +ffffffff81bc7970 T intel_dsi_vbt_gpio_init +ffffffff81bc7990 T intel_dsi_vbt_gpio_cleanup +ffffffff81bc8000 T intel_dvo_init +ffffffff81bc8730 t intel_disable_dvo +ffffffff81bc87f0 t intel_enable_dvo +ffffffff81bc88f0 t intel_dvo_get_hw_state +ffffffff81bc8970 t intel_dvo_get_config +ffffffff81bc8a20 t intel_dvo_compute_config +ffffffff81bc8ac0 t intel_dvo_pre_enable +ffffffff81bc8bd0 t intel_dvo_connector_get_hw_state +ffffffff81bc8c60 t intel_dvo_enc_destroy +ffffffff81bc8ca0 t intel_dvo_detect +ffffffff81bc8dc0 t intel_dvo_get_modes +ffffffff81bc8e40 t intel_dvo_mode_valid +ffffffff81bc9000 T intel_fb_get_format_info +ffffffff81bc92b0 T intel_fb_is_tiled_modifier +ffffffff81bc9300 t lookup_modifier +ffffffff81bc9540 T intel_fb_is_ccs_modifier +ffffffff81bc9590 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81bc95e0 T intel_fb_is_mc_ccs_modifier +ffffffff81bc9630 T intel_fb_plane_get_modifiers +ffffffff81bc9830 T intel_fb_plane_supports_modifier +ffffffff81bc98b0 T intel_format_info_is_yuv_semiplanar +ffffffff81bc9930 T intel_fb_is_ccs_aux_plane +ffffffff81bc99f0 T intel_fb_rc_ccs_cc_plane +ffffffff81bc9ae0 T is_surface_linear +ffffffff81bc9c70 T main_to_ccs_plane +ffffffff81bc9d20 T skl_ccs_to_main_plane +ffffffff81bc9e80 T skl_main_to_aux_plane +ffffffff81bc9fc0 T intel_tile_size +ffffffff81bca000 T intel_tile_width_bytes +ffffffff81bca470 T intel_tile_height +ffffffff81bca4e0 T intel_tile_row_size +ffffffff81bca570 T intel_fb_align_height +ffffffff81bca5f0 T intel_fb_modifier_uses_dpt +ffffffff81bca630 T intel_fb_uses_dpt +ffffffff81bca690 T intel_cursor_alignment +ffffffff81bca6f0 T intel_surf_alignment +ffffffff81bca9c0 T intel_fb_plane_get_subsampling +ffffffff81bcab40 T intel_plane_adjust_aligned_offset +ffffffff81bcabc0 t intel_adjust_aligned_offset +ffffffff81bcad90 T intel_plane_compute_aligned_offset +ffffffff81bcaea0 t intel_compute_aligned_offset +ffffffff81bcb090 T intel_fb_needs_pot_stride_remap +ffffffff81bcb100 T intel_fb_supports_90_270_rotation +ffffffff81bcb160 T intel_fill_fb_info +ffffffff81bcbd90 t calc_plane_remap_info +ffffffff81bcc7b0 T intel_fb_fill_view +ffffffff81bcc820 T intel_plane_compute_gtt +ffffffff81bccd60 t intel_plane_check_stride +ffffffff81bccee0 T intel_framebuffer_init +ffffffff81bcd880 t gen12_ccs_aux_stride +ffffffff81bcd900 T intel_user_framebuffer_create +ffffffff81bcdaa0 T intel_framebuffer_create +ffffffff81bcdb50 t intel_adjust_tile_offset +ffffffff81bcdc90 t intel_user_framebuffer_destroy +ffffffff81bcdd10 t intel_user_framebuffer_create_handle +ffffffff81bcdd40 t intel_user_framebuffer_dirty +ffffffff81bce000 T intel_pin_and_fence_fb_obj +ffffffff81bce3c0 t i915_gem_object_lock +ffffffff81bce610 T intel_unpin_fb_vma +ffffffff81bce680 T intel_plane_pin_fb +ffffffff81bceab0 T intel_plane_unpin_fb +ffffffff81bcf000 T intel_fbc_cleanup +ffffffff81bcf240 T intel_fbc_pre_update +ffffffff81bcf900 T intel_fbc_post_update +ffffffff81bcfac0 T intel_fbc_invalidate +ffffffff81bcfc70 T intel_fbc_flush +ffffffff81bcff60 T intel_fbc_atomic_check +ffffffff81bd0550 T intel_fbc_disable +ffffffff81bd0620 t __intel_fbc_disable +ffffffff81bd0780 T intel_fbc_update +ffffffff81bd0f00 T intel_fbc_reset_underrun +ffffffff81bd1090 T intel_fbc_handle_fifo_underrun_irq +ffffffff81bd1150 T intel_fbc_add_plane +ffffffff81bd1180 T intel_fbc_init +ffffffff81bd1440 T intel_fbc_sanitize +ffffffff81bd1520 T intel_fbc_crtc_debugfs_add +ffffffff81bd1550 T intel_fbc_debugfs_register +ffffffff81bd1580 t intel_fbc_is_ok +ffffffff81bd1700 t intel_fbc_update_state +ffffffff81bd1aa0 t intel_fbc_underrun_work_fn +ffffffff81bd1b90 t ivb_fbc_activate +ffffffff81bd1e00 t ilk_fbc_deactivate +ffffffff81bd1ec0 t ilk_fbc_is_active +ffffffff81bd1f30 t ivb_fbc_is_compressing +ffffffff81bd1fa0 t snb_fbc_nuke +ffffffff81bd2020 t ilk_fbc_program_cfb +ffffffff81bd2080 t ivb_fbc_set_false_color +ffffffff81bd2100 t snb_fbc_activate +ffffffff81bd21a0 t ilk_fbc_is_compressing +ffffffff81bd2210 t ilk_fbc_activate +ffffffff81bd2350 t i965_fbc_nuke +ffffffff81bd23f0 t g4x_fbc_activate +ffffffff81bd2510 t g4x_fbc_deactivate +ffffffff81bd25b0 t g4x_fbc_is_active +ffffffff81bd2610 t g4x_fbc_is_compressing +ffffffff81bd2670 t g4x_fbc_program_cfb +ffffffff81bd26c0 t i8xx_fbc_activate +ffffffff81bd2850 t i8xx_fbc_deactivate +ffffffff81bd2950 t i8xx_fbc_is_active +ffffffff81bd29b0 t i8xx_fbc_is_compressing +ffffffff81bd2a10 t i8xx_fbc_program_cfb +ffffffff81bd2ab0 t i8xx_fbc_nuke +ffffffff81bd3000 T intel_fbdev_init +ffffffff81bd3590 t intel_fbdev_suspend_worker +ffffffff81bd35c0 T intel_fbdev_initial_config_async +ffffffff81bd3630 T intel_fbdev_unregister +ffffffff81bd3670 T intel_fbdev_set_suspend +ffffffff81bd36a0 T intel_fbdev_fini +ffffffff81bd3750 T intel_fbdev_output_poll_changed +ffffffff81bd3800 T intel_fbdev_restore_mode +ffffffff81bd3890 T intel_fbdev_framebuffer +ffffffff81bd38d0 t intelfb_create +ffffffff81bd4320 t intelfb_dirty +ffffffff81bd4390 t intel_fbdev_set_par +ffffffff81bd5000 T assert_fdi_tx_enabled +ffffffff81bd5020 t assert_fdi_tx +ffffffff81bd5170 T assert_fdi_tx_disabled +ffffffff81bd5190 T assert_fdi_rx_enabled +ffffffff81bd5280 T assert_fdi_rx_disabled +ffffffff81bd5370 T assert_fdi_tx_pll_enabled +ffffffff81bd5470 T assert_fdi_rx_pll_enabled +ffffffff81bd5570 T assert_fdi_rx_pll_disabled +ffffffff81bd5670 T intel_fdi_link_train +ffffffff81bd5690 T intel_fdi_pll_freq_update +ffffffff81bd5740 T intel_fdi_link_freq +ffffffff81bd5790 T ilk_fdi_compute_config +ffffffff81bd5b20 T intel_fdi_normal_train +ffffffff81bd5ce0 T hsw_fdi_link_train +ffffffff81bd6300 T hsw_fdi_disable +ffffffff81bd64d0 T ilk_fdi_pll_enable +ffffffff81bd6730 T ilk_fdi_pll_disable +ffffffff81bd68b0 T ilk_fdi_disable +ffffffff81bd6b80 T intel_fdi_init_hook +ffffffff81bd6be0 t ilk_fdi_link_train +ffffffff81bd73f0 t gen6_fdi_link_train +ffffffff81bd7e60 t ivb_manual_fdi_link_train +ffffffff81bd8920 t cpt_set_fdi_bc_bifurcation +ffffffff81bd9000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81bd9480 T intel_set_pch_fifo_underrun_reporting +ffffffff81bd9720 T intel_cpu_fifo_underrun_irq_handler +ffffffff81bd9940 T intel_pch_fifo_underrun_irq_handler +ffffffff81bd99d0 T intel_check_cpu_fifo_underruns +ffffffff81bd9c20 T intel_check_pch_fifo_underruns +ffffffff81bd9d80 T intel_init_fifo_underrun_reporting +ffffffff81bda000 T intel_frontbuffer_flip_prepare +ffffffff81bda060 T intel_frontbuffer_flip_complete +ffffffff81bda180 T intel_frontbuffer_flip +ffffffff81bda290 T __intel_fb_invalidate +ffffffff81bda350 T __intel_fb_flush +ffffffff81bda480 T intel_frontbuffer_get +ffffffff81bda600 t frontbuffer_active +ffffffff81bda630 t frontbuffer_retire +ffffffff81bda670 T intel_frontbuffer_put +ffffffff81bda7c0 T intel_frontbuffer_track +ffffffff81bdb000 T intel_atomic_global_obj_init +ffffffff81bdb070 T intel_atomic_global_obj_cleanup +ffffffff81bdb170 T intel_atomic_get_global_obj_state +ffffffff81bdb3f0 T intel_atomic_get_old_global_obj_state +ffffffff81bdb450 T intel_atomic_get_new_global_obj_state +ffffffff81bdb4b0 T intel_atomic_swap_global_state +ffffffff81bdb600 T intel_atomic_clear_global_state +ffffffff81bdb730 T intel_atomic_lock_global_state +ffffffff81bdb7c0 T intel_atomic_serialize_global_state +ffffffff81bdb850 T intel_atomic_global_state_is_serialized +ffffffff81bdc000 T intel_gmbus_is_valid_pin +ffffffff81bdc100 T intel_gmbus_reset +ffffffff81bdc170 T intel_bb_set_bits +ffffffff81bdc2d0 T intel_bb_set_dir +ffffffff81bdc300 T intel_bb_read_bits +ffffffff81bdc4d0 T intel_acquire_bus +ffffffff81bdc730 T intel_release_bus +ffffffff81bdc910 T intel_send_start +ffffffff81bdc930 T intel_send_stop +ffffffff81bdc950 T intel_initiate_xfer +ffffffff81bdc970 T intel_read_byte +ffffffff81bdc990 T intel_write_byte +ffffffff81bdc9b0 T intel_gmbus_output_aksv +ffffffff81bdcab0 t do_gmbus_xfer +ffffffff81bdd140 T intel_gmbus_setup +ffffffff81bdd4f0 T intel_gmbus_teardown +ffffffff81bdd580 T intel_gmbus_get_adapter +ffffffff81bdd600 T intel_gmbus_force_bit +ffffffff81bdd6b0 T intel_gmbus_is_forced_bit +ffffffff81bdd6e0 T intel_gmbus_irq_handler +ffffffff81bdd780 t gmbus_xfer_read +ffffffff81bdda80 t gmbus_xfer_write +ffffffff81bddcd0 t gmbus_wait +ffffffff81bde130 t gmbus_wait_idle +ffffffff81bde300 t gmbus_xfer +ffffffff81bde400 t gmbus_func +ffffffff81bde450 t gmbus_lock_bus +ffffffff81bde470 t gmbus_trylock_bus +ffffffff81bde4d0 t gmbus_unlock_bus +ffffffff81bdf000 T intel_hdcp_capable +ffffffff81bdf0b0 t intel_hdcp_read_valid_bksv +ffffffff81bdf350 T intel_hdcp2_capable +ffffffff81bdf4b0 T is_hdcp_supported +ffffffff81bdf500 T intel_hdcp_component_init +ffffffff81bdf510 T intel_hdcp_init +ffffffff81bdf6c0 t intel_hdcp_check_work +ffffffff81be2680 t intel_hdcp_prop_work +ffffffff81be2720 T intel_hdcp_enable +ffffffff81be2780 T intel_hdcp_disable +ffffffff81be2900 t intel_hdcp_update_value +ffffffff81be2b10 t _intel_hdcp2_disable +ffffffff81be2f80 t _intel_hdcp_disable +ffffffff81be32e0 T intel_hdcp_update_pipe +ffffffff81be34e0 T intel_hdcp_component_fini +ffffffff81be3590 T intel_hdcp_cleanup +ffffffff81be36e0 T intel_hdcp_atomic_check +ffffffff81be3770 T intel_hdcp_handle_cp_irq +ffffffff81be3890 t __delayed_work_tick +ffffffff81be38b0 t hdcp2_authenticate_repeater_topology +ffffffff81be3bc0 t transcoder_name +ffffffff81be3c00 t intel_hdcp_get_repeater_ctl +ffffffff81be3ce0 t ktime_get_raw +ffffffff81be3d60 t wait_remaining_ms_from_jiffies +ffffffff81be3df0 t intel_hdcp_auth_downstream +ffffffff81be52e0 t intel_write_sha_text +ffffffff81be6000 T intel_hdcp_gsc_cs_required +ffffffff81be6040 T intel_hdcp_gsc_init +ffffffff81be6590 T intel_hdcp_gsc_fini +ffffffff81be6600 T intel_hdcp_gsc_msg_send +ffffffff81be69b0 t gsc_hdcp_initiate_session +ffffffff81be6a10 t gsc_hdcp_verify_receiver_cert_prepare_km +ffffffff81be6a70 t gsc_hdcp_verify_hprime +ffffffff81be6ad0 t gsc_hdcp_store_pairing_info +ffffffff81be6b30 t gsc_hdcp_initiate_locality_check +ffffffff81be6b90 t gsc_hdcp_verify_lprime +ffffffff81be6bf0 t gsc_hdcp_get_session_key +ffffffff81be6c50 t gsc_hdcp_repeater_check_flow_prepare_ack +ffffffff81be6cb0 t gsc_hdcp_verify_mprime +ffffffff81be6d10 t gsc_hdcp_enable_authentication +ffffffff81be6d70 t gsc_hdcp_close_session +ffffffff81be7000 T intel_hdmi_to_i915 +ffffffff81be7040 T hsw_write_infoframe +ffffffff81be74c0 t hsw_dip_data_reg +ffffffff81be7680 T hsw_read_infoframe +ffffffff81be7750 T intel_hdmi_infoframe_enable +ffffffff81be77f0 T intel_hdmi_infoframes_enabled +ffffffff81be7910 T intel_read_infoframe +ffffffff81be7ac0 T intel_hdmi_read_gcp_infoframe +ffffffff81be7ba0 T intel_dp_dual_mode_set_tmds_output +ffffffff81be7c70 T intel_hdmi_tmds_clock +ffffffff81be7cc0 T intel_hdmi_bpc_possible +ffffffff81be7df0 T intel_hdmi_limited_color_range +ffffffff81be7e60 T intel_hdmi_compute_has_hdmi_sink +ffffffff81be7ed0 T intel_hdmi_compute_config +ffffffff81be8520 t intel_hdmi_compute_output_format +ffffffff81be86a0 t intel_hdmi_compute_hdmi_infoframe +ffffffff81be8780 t intel_hdmi_compute_drm_infoframe +ffffffff81be8890 T intel_hdmi_encoder_shutdown +ffffffff81be8970 T intel_hdmi_handle_sink_scrambling +ffffffff81be8a70 T intel_infoframe_init +ffffffff81be8c10 t vlv_write_infoframe +ffffffff81be8f90 t vlv_read_infoframe +ffffffff81be9130 t vlv_set_infoframes +ffffffff81be94b0 t vlv_infoframes_enabled +ffffffff81be9550 t g4x_write_infoframe +ffffffff81be9840 t g4x_read_infoframe +ffffffff81be9990 t g4x_set_infoframes +ffffffff81be9c50 t g4x_infoframes_enabled +ffffffff81be9cd0 t hsw_set_infoframes +ffffffff81be9fb0 t hsw_infoframes_enabled +ffffffff81bea040 t ibx_write_infoframe +ffffffff81bea380 t ibx_read_infoframe +ffffffff81bea500 t ibx_set_infoframes +ffffffff81bea880 t ibx_infoframes_enabled +ffffffff81bea910 t cpt_write_infoframe +ffffffff81beac50 t cpt_read_infoframe +ffffffff81beadd0 t cpt_set_infoframes +ffffffff81beb0f0 t cpt_infoframes_enabled +ffffffff81beb170 T intel_hdmi_init_connector +ffffffff81beba00 T intel_hdmi_dsc_get_slice_height +ffffffff81beba60 T intel_hdmi_dsc_get_num_slices +ffffffff81bebbe0 T intel_hdmi_dsc_get_bpp +ffffffff81bebcc0 t intel_hdmi_compute_clock +ffffffff81bebf40 t hdmi_port_clock_valid +ffffffff81bec1a0 t intel_write_infoframe +ffffffff81bec390 t intel_hdmi_detect +ffffffff81bec580 t intel_hdmi_force +ffffffff81bec630 t intel_hdmi_connector_register +ffffffff81bec640 t intel_hdmi_connector_unregister +ffffffff81bec650 t intel_hdmi_set_edid +ffffffff81bec990 t intel_hdmi_get_modes +ffffffff81bec9a0 t intel_hdmi_mode_valid +ffffffff81becb80 t intel_hdmi_connector_atomic_check +ffffffff81becbb0 t intel_hdmi_mode_clock_valid +ffffffff81becd70 t intel_hdmi_hdcp_write_an_aksv +ffffffff81becef0 t intel_hdmi_hdcp_read_bksv +ffffffff81becfd0 t intel_hdmi_hdcp_read_bstatus +ffffffff81bed0b0 t intel_hdmi_hdcp_repeater_present +ffffffff81bed1a0 t intel_hdmi_hdcp_read_ri_prime +ffffffff81bed280 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81bed370 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81bed450 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81bed550 t intel_hdmi_hdcp_toggle_signalling +ffffffff81bed810 t intel_hdmi_hdcp_check_link +ffffffff81bedbb0 t intel_hdmi_hdcp2_capable +ffffffff81bedc80 t intel_hdmi_hdcp2_write_msg +ffffffff81bedda0 t intel_hdmi_hdcp2_read_msg +ffffffff81bee210 t intel_hdmi_hdcp2_check_link +ffffffff81bef000 T intel_hpd_pin_default +ffffffff81bef030 T intel_encoder_hotplug +ffffffff81bef190 T intel_hpd_trigger_irq +ffffffff81bef210 T intel_hpd_irq_handler +ffffffff81bef670 T intel_hpd_init +ffffffff81bef790 T intel_hpd_poll_enable +ffffffff81bef820 T intel_hpd_poll_disable +ffffffff81bef880 T intel_hpd_init_early +ffffffff81bef9d0 t i915_hotplug_work_func +ffffffff81befe80 t i915_digport_work_func +ffffffff81bf0030 t i915_hpd_poll_init_work +ffffffff81bf0180 t intel_hpd_irq_storm_reenable_work +ffffffff81bf04f0 T intel_hpd_cancel_work +ffffffff81bf0630 T intel_hpd_disable +ffffffff81bf06d0 T intel_hpd_enable +ffffffff81bf0750 T intel_hpd_debugfs_register +ffffffff81bf0780 t __delayed_work_tick +ffffffff81bf1000 T i915_hotplug_interrupt_update_locked +ffffffff81bf10c0 T i915_hotplug_interrupt_update +ffffffff81bf11b0 T i9xx_hpd_irq_ack +ffffffff81bf1310 T i9xx_hpd_irq_handler +ffffffff81bf14d0 T ibx_hpd_irq_handler +ffffffff81bf16a0 T xelpdp_pica_irq_handler +ffffffff81bf19c0 T icp_irq_handler +ffffffff81bf1ca0 T spt_irq_handler +ffffffff81bf1f70 T ilk_hpd_irq_handler +ffffffff81bf20b0 T bxt_hpd_irq_handler +ffffffff81bf2230 T gen11_hpd_irq_handler +ffffffff81bf24d0 T intel_hpd_enable_detection +ffffffff81bf2510 T intel_hpd_irq_setup +ffffffff81bf2560 T intel_hotplug_irq_init +ffffffff81bf27f0 t i915_hpd_irq_setup +ffffffff81bf2910 t i915_hpd_enable_detection +ffffffff81bf29c0 t icp_hpd_irq_setup +ffffffff81bf2bd0 t icp_hpd_enable_detection +ffffffff81bf2ce0 t dg1_hpd_irq_setup +ffffffff81bf2d50 t dg1_hpd_enable_detection +ffffffff81bf2ec0 t xelpdp_hpd_irq_setup +ffffffff81bf3340 t xelpdp_hpd_enable_detection +ffffffff81bf3510 t gen11_hpd_irq_setup +ffffffff81bf37a0 t gen11_hpd_enable_detection +ffffffff81bf39e0 t bxt_hpd_irq_setup +ffffffff81bf3b90 t bxt_hpd_enable_detection +ffffffff81bf3ca0 t spt_hpd_irq_setup +ffffffff81bf3ee0 t spt_hpd_enable_detection +ffffffff81bf4020 t ilk_hpd_irq_setup +ffffffff81bf42b0 t ilk_hpd_enable_detection +ffffffff81bf5000 T intel_hti_init +ffffffff81bf5070 T intel_hti_uses_phy +ffffffff81bf5110 T intel_hti_dpll_mask +ffffffff81bf6000 T intel_load_detect_get_pipe +ffffffff81bf6430 t intel_modeset_disable_planes +ffffffff81bf6510 T intel_load_detect_release_pipe +ffffffff81bf7000 T intel_lpe_audio_irq_handler +ffffffff81bf7020 T intel_lpe_audio_init +ffffffff81bf7050 T intel_lpe_audio_teardown +ffffffff81bf7070 T intel_lpe_audio_notify +ffffffff81bf8000 T lspcon_detect_hdr_capability +ffffffff81bf80c0 T lspcon_write_infoframe +ffffffff81bf8950 T lspcon_read_infoframe +ffffffff81bf8990 T lspcon_set_infoframes +ffffffff81bf8c20 T lspcon_infoframes_enabled +ffffffff81bf8e30 T lspcon_wait_pcon_mode +ffffffff81bf8e50 t lspcon_wait_mode +ffffffff81bf9180 T lspcon_init +ffffffff81bf9660 T intel_lspcon_infoframes_enabled +ffffffff81bf9690 T lspcon_resume +ffffffff81bf99a0 t lspcon_change_mode +ffffffff81bfa000 T intel_lvds_port_enabled +ffffffff81bfa090 T intel_get_lvds_encoder +ffffffff81bfa0f0 T intel_is_dual_link_lvds +ffffffff81bfa150 T intel_lvds_init +ffffffff81bfa950 t intel_enable_lvds +ffffffff81bfaad0 t intel_pre_enable_lvds +ffffffff81bfadf0 t intel_lvds_compute_config +ffffffff81bfaf70 t pch_disable_lvds +ffffffff81bfaf90 t pch_post_disable_lvds +ffffffff81bfafb0 t gmch_disable_lvds +ffffffff81bfaff0 t intel_lvds_get_hw_state +ffffffff81bfb0c0 t intel_lvds_get_config +ffffffff81bfb1e0 t intel_lvds_shutdown +ffffffff81bfb290 t compute_is_dual_link_lvds +ffffffff81bfb380 t intel_no_lvds_dmi_callback +ffffffff81bfb3d0 t intel_disable_lvds +ffffffff81bfb520 t intel_lvds_get_modes +ffffffff81bfb580 t intel_lvds_mode_valid +ffffffff81bfb630 t intel_dual_link_lvds_callback +ffffffff81bfc000 T _intel_modeset_lock_begin +ffffffff81bfc070 T _intel_modeset_lock_loop +ffffffff81bfc0b0 T _intel_modeset_lock_end +ffffffff81bfd000 T intel_modeset_setup_hw_state +ffffffff81bfe6b0 t intel_crtc_disable_noatomic +ffffffff81bfed80 t intel_crtc_disable_noatomic_begin +ffffffff81c00000 T intel_modeset_verify_crtc +ffffffff81c00630 t verify_connector_state +ffffffff81c00b10 T intel_modeset_verify_disabled +ffffffff81c01000 T intel_opregion_notify_encoder +ffffffff81c01190 t swsci +ffffffff81c01530 T intel_opregion_notify_adapter +ffffffff81c01590 T intel_opregion_asle_intr +ffffffff81c015e0 T intel_opregion_setup +ffffffff81c01f90 t asle_work +ffffffff81c02490 T intel_opregion_get_panel_type +ffffffff81c025a0 T intel_opregion_get_edid +ffffffff81c02690 T intel_opregion_headless_sku +ffffffff81c026e0 T intel_opregion_register +ffffffff81c02780 T intel_opregion_resume +ffffffff81c02820 T intel_opregion_suspend +ffffffff81c028e0 T intel_opregion_unregister +ffffffff81c029c0 T intel_opregion_cleanup +ffffffff81c02ad0 t intel_no_opregion_vbt_callback +ffffffff81c02b30 t intel_use_opregion_panel_type_callback +ffffffff81c03000 T intel_overlay_reset +ffffffff81c03050 T intel_overlay_switch_off +ffffffff81c032a0 t intel_overlay_release_old_vid +ffffffff81c034a0 T intel_overlay_put_image_ioctl +ffffffff81c03850 t update_pfit_vscale_ratio +ffffffff81c03930 t check_overlay_dst +ffffffff81c03a10 t check_overlay_src +ffffffff81c03c60 t intel_overlay_do_put_image +ffffffff81c04920 T intel_overlay_attrs_ioctl +ffffffff81c04cc0 t check_gamma +ffffffff81c04eb0 T intel_overlay_setup +ffffffff81c05160 t intel_overlay_last_flip_retire +ffffffff81c051a0 T intel_overlay_cleanup +ffffffff81c05260 T intel_overlay_capture_error_state +ffffffff81c05370 T intel_overlay_print_error_state +ffffffff81c058b0 t intel_overlay_release_old_vid_tail +ffffffff81c05980 t intel_overlay_off_tail +ffffffff81c05b70 t intel_overlay_flip_prepare +ffffffff81c06000 T intel_panel_use_ssc +ffffffff81c06060 T intel_panel_preferred_fixed_mode +ffffffff81c060b0 T intel_panel_fixed_mode +ffffffff81c06230 T intel_panel_downclock_mode +ffffffff81c06330 T intel_panel_highest_mode +ffffffff81c06390 T intel_panel_get_modes +ffffffff81c06440 T intel_panel_drrs_type +ffffffff81c06470 T intel_panel_compute_config +ffffffff81c06630 T intel_panel_add_edid_fixed_modes +ffffffff81c06b90 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81c06c00 t intel_panel_add_fixed_mode +ffffffff81c06d90 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81c06e00 T intel_panel_add_encoder_fixed_mode +ffffffff81c06e40 T intel_panel_fitting +ffffffff81c074b0 T intel_panel_detect +ffffffff81c07550 T intel_panel_mode_valid +ffffffff81c07600 T intel_panel_init_alloc +ffffffff81c07650 T intel_panel_init +ffffffff81c07790 T intel_panel_fini +ffffffff81c08000 T intel_has_pch_trancoder +ffffffff81c08060 T intel_crtc_pch_transcoder +ffffffff81c080a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81c080f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81c08140 T ilk_pch_pre_enable +ffffffff81c08170 T ilk_pch_enable +ffffffff81c08820 t ilk_pch_transcoder_set_timings +ffffffff81c08af0 T ilk_pch_disable +ffffffff81c08b10 T ilk_pch_post_disable +ffffffff81c08fc0 T ilk_pch_get_config +ffffffff81c091d0 T lpt_pch_enable +ffffffff81c094a0 T lpt_pch_disable +ffffffff81c095e0 T lpt_pch_get_config +ffffffff81c096d0 T intel_pch_sanitize +ffffffff81c09a10 t assert_pch_dp_disabled +ffffffff81c09bc0 t assert_pch_hdmi_disabled +ffffffff81c0a000 T lpt_disable_iclkip +ffffffff81c0a0a0 T lpt_iclkip +ffffffff81c0a130 T lpt_program_iclkip +ffffffff81c0a450 T lpt_get_iclkip +ffffffff81c0a590 T lpt_disable_clkout_dp +ffffffff81c0a690 T intel_init_pch_refclk +ffffffff81c0c000 T intel_initial_plane_config +ffffffff81c0d000 T intel_pmdemand_init +ffffffff81c0d150 T intel_pmdemand_init_early +ffffffff81c0d1e0 T intel_pmdemand_update_phys_mask +ffffffff81c0d290 T intel_pmdemand_update_port_clock +ffffffff81c0d2d0 T intel_pmdemand_atomic_check +ffffffff81c0d710 t intel_pmdemand_update_max_ddiclk +ffffffff81c0d7e0 t intel_pmdemand_update_active_non_tc_phys +ffffffff81c0da10 T intel_pmdemand_init_pmdemand_params +ffffffff81c0dc10 T intel_pmdemand_program_dbuf +ffffffff81c0dde0 t intel_pmdemand_wait +ffffffff81c0e020 T intel_pmdemand_pre_plane_update +ffffffff81c0e140 t intel_pmdemand_program_params +ffffffff81c0e5f0 T intel_pmdemand_post_plane_update +ffffffff81c0e700 t intel_pmdemand_duplicate_state +ffffffff81c0e790 t intel_pmdemand_destroy_state +ffffffff81c0f000 T intel_pps_lock +ffffffff81c0f070 T intel_pps_unlock +ffffffff81c0f0e0 T intel_pps_reset_all +ffffffff81c0f240 T intel_pps_check_power_unlocked +ffffffff81c0f590 t pps_name +ffffffff81c0f640 T intel_pps_wait_power_cycle +ffffffff81c0f710 t wait_panel_power_cycle +ffffffff81c0f920 T intel_pps_vdd_on_unlocked +ffffffff81c0ff80 T intel_pps_vdd_on +ffffffff81c10160 T intel_pps_vdd_off_sync +ffffffff81c10270 t intel_pps_vdd_off_sync_unlocked +ffffffff81c10730 T intel_pps_vdd_off_unlocked +ffffffff81c10920 T intel_pps_on_unlocked +ffffffff81c10e70 T intel_pps_on +ffffffff81c10f40 T intel_pps_off_unlocked +ffffffff81c113b0 T intel_pps_off +ffffffff81c11480 T intel_pps_backlight_on +ffffffff81c116d0 T intel_pps_backlight_off +ffffffff81c11940 T intel_pps_backlight_power +ffffffff81c11b70 T vlv_pps_init +ffffffff81c11d70 t vlv_detach_power_sequencer +ffffffff81c11f70 t vlv_steal_power_sequencer +ffffffff81c120b0 t pps_init_delays +ffffffff81c12590 t pps_init_registers +ffffffff81c129a0 T intel_pps_have_panel_power_or_vdd +ffffffff81c12b40 T intel_pps_encoder_reset +ffffffff81c12d30 t vlv_initial_power_sequencer_setup +ffffffff81c130a0 t pps_vdd_init +ffffffff81c13280 T intel_pps_init +ffffffff81c13780 t edp_panel_vdd_work +ffffffff81c13840 T intel_pps_init_late +ffffffff81c13ac0 T intel_pps_unlock_regs_wa +ffffffff81c13be0 T intel_pps_setup +ffffffff81c13c50 T assert_pps_unlocked +ffffffff81c13f20 t intel_pps_get_registers +ffffffff81c14830 t wait_panel_status +ffffffff81c14cd0 t intel_pps_readout_hw_state +ffffffff81c14ec0 t __delayed_work_tick +ffffffff81c15000 T intel_psr_irq_handler +ffffffff81c15710 t transcoder_name +ffffffff81c15750 T intel_psr_init_dpcd +ffffffff81c15a40 T intel_psr_compute_config +ffffffff81c15c40 t intel_psr2_config_valid +ffffffff81c16120 T intel_psr_get_config +ffffffff81c162e0 T intel_psr_disable +ffffffff81c16420 t intel_psr_disable_locked +ffffffff81c16810 T intel_psr_pause +ffffffff81c16a30 t intel_psr_exit +ffffffff81c16d10 T intel_psr_resume +ffffffff81c16db0 t intel_psr_activate +ffffffff81c17550 T intel_psr2_disable_plane_sel_fetch_arm +ffffffff81c175c0 T intel_psr2_program_plane_sel_fetch_arm +ffffffff81c17660 T intel_psr2_program_plane_sel_fetch_noarm +ffffffff81c177d0 T intel_psr2_program_trans_man_trk_ctl +ffffffff81c178c0 T intel_psr2_sel_fetch_update +ffffffff81c18070 T intel_psr_pre_plane_update +ffffffff81c18250 t wm_optimization_wa +ffffffff81c18410 T intel_psr_post_plane_update +ffffffff81c19190 T intel_psr_wait_for_idle_locked +ffffffff81c19380 T intel_psr_debug_set +ffffffff81c19750 T intel_psr_invalidate +ffffffff81c199b0 T intel_psr_flush +ffffffff81c19e50 T intel_psr_init +ffffffff81c19fa0 t intel_psr_work +ffffffff81c1a1a0 t tgl_dc3co_disable_work +ffffffff81c1a200 T intel_psr_short_pulse +ffffffff81c1a670 T intel_psr_enabled +ffffffff81c1a700 T intel_psr_lock +ffffffff81c1a7c0 T intel_psr_unlock +ffffffff81c1a880 T intel_psr_debugfs_register +ffffffff81c1a8b0 T intel_psr_connector_debugfs_add +ffffffff81c1a8e0 t _compute_psr2_sdp_prior_scanline_indication +ffffffff81c1a9a0 t _compute_psr2_wake_times +ffffffff81c1aaa0 t intel_psr2_sel_fetch_config_valid +ffffffff81c1ab30 t psr2_granularity_check +ffffffff81c1ac20 t tgl_psr2_disable_dc3co +ffffffff81c1ad40 t __delayed_work_tick +ffffffff81c1b000 T intel_lookup_range_min_qp +ffffffff81c1b120 T intel_lookup_range_max_qp +ffffffff81c1c000 T intel_init_quirks +ffffffff81c1c110 T intel_has_quirk +ffffffff81c1c150 t quirk_ssc_force_disable +ffffffff81c1c180 t quirk_invert_brightness +ffffffff81c1c1b0 t quirk_backlight_present +ffffffff81c1c1e0 t quirk_increase_t12_delay +ffffffff81c1c210 t quirk_increase_ddi_disabled_time +ffffffff81c1c240 t intel_dmi_reverse_brightness +ffffffff81c1c290 t intel_dmi_no_pps_backlight +ffffffff81c1d000 T intel_sdvo_port_enabled +ffffffff81c1d0b0 T intel_sdvo_init +ffffffff81c1e2f0 t intel_sdvo_compute_config +ffffffff81c1e720 t pch_disable_sdvo +ffffffff81c1e750 t pch_post_disable_sdvo +ffffffff81c1e760 t intel_disable_sdvo +ffffffff81c1e940 t intel_sdvo_pre_enable +ffffffff81c1f430 t intel_enable_sdvo +ffffffff81c1f650 t intel_sdvo_get_hw_state +ffffffff81c1f750 t intel_sdvo_get_config +ffffffff81c1fc30 t intel_sdvo_set_target_input +ffffffff81c1fcb0 t intel_sdvo_get_input_pixel_clock_range +ffffffff81c1fd60 t intel_sdvo_ddc_proxy_xfer +ffffffff81c1fe10 t intel_sdvo_ddc_proxy_func +ffffffff81c1fe40 t __intel_sdvo_write_cmd +ffffffff81c20350 t proxy_lock_bus +ffffffff81c20380 t proxy_trylock_bus +ffffffff81c203b0 t proxy_unlock_bus +ffffffff81c203e0 t intel_sdvo_enc_destroy +ffffffff81c203f0 t intel_sdvo_set_output_timings_from_mode +ffffffff81c20520 t intel_sdvo_get_preferred_input_mode +ffffffff81c20910 t intel_sdvo_get_dtd_from_mode +ffffffff81c20a90 t intel_sdvo_read_response +ffffffff81c21000 t intel_sdvo_get_value +ffffffff81c21080 t intel_sdvo_write_sdvox +ffffffff81c212f0 t intel_sdvo_write_infoframe +ffffffff81c214f0 t intel_sdvo_read_infoframe +ffffffff81c21770 t intel_sdvo_hotplug +ffffffff81c217c0 t intel_sdvo_connector_get_hw_state +ffffffff81c21860 t intel_sdvo_detect +ffffffff81c21bc0 t intel_sdvo_connector_register +ffffffff81c21bd0 t intel_sdvo_connector_unregister +ffffffff81c21be0 t intel_sdvo_connector_duplicate_state +ffffffff81c21c70 t intel_sdvo_connector_atomic_set_property +ffffffff81c21e40 t intel_sdvo_connector_atomic_get_property +ffffffff81c22060 t intel_sdvo_get_analog_edid +ffffffff81c220a0 t intel_sdvo_connector_matches_edid +ffffffff81c22140 t intel_sdvo_get_modes +ffffffff81c22470 t intel_sdvo_mode_valid +ffffffff81c225a0 t intel_sdvo_atomic_check +ffffffff81c22660 t intel_sdvo_create_enhance_property +ffffffff81c24000 T intel_snps_phy_wait_for_calibration +ffffffff81c240e0 T intel_snps_phy_update_psr_power_state +ffffffff81c241b0 T intel_snps_phy_set_signal_levels +ffffffff81c24460 T intel_mpllb_calc_state +ffffffff81c24610 T intel_snps_phy_check_hdmi_link_rate +ffffffff81c246b0 T intel_mpllb_enable +ffffffff81c24950 T intel_mpllb_disable +ffffffff81c24b00 T intel_mpllb_calc_port_clock +ffffffff81c24bd0 T intel_mpllb_readout_hw_state +ffffffff81c24d90 T intel_mpllb_state_verify +ffffffff81c26000 T vlv_plane_min_cdclk +ffffffff81c260f0 T ivb_plane_min_cdclk +ffffffff81c261b0 T hsw_plane_min_cdclk +ffffffff81c26250 T chv_plane_check_rotation +ffffffff81c262d0 T intel_sprite_plane_create +ffffffff81c26670 t vlv_sprite_update_noarm +ffffffff81c26770 t vlv_sprite_update_arm +ffffffff81c26e10 t vlv_sprite_disable_arm +ffffffff81c26ea0 t vlv_sprite_get_hw_state +ffffffff81c26f90 t vlv_sprite_check +ffffffff81c27090 t ivb_sprite_update_noarm +ffffffff81c27200 t ivb_sprite_update_arm +ffffffff81c275e0 t ivb_sprite_disable_arm +ffffffff81c27690 t ivb_sprite_get_hw_state +ffffffff81c27760 t g4x_sprite_check +ffffffff81c27a40 t hsw_sprite_max_stride +ffffffff81c27aa0 t g4x_sprite_max_stride +ffffffff81c27b10 t ivb_sprite_min_cdclk +ffffffff81c27c50 t g4x_sprite_update_noarm +ffffffff81c27db0 t g4x_sprite_update_arm +ffffffff81c28200 t g4x_sprite_disable_arm +ffffffff81c282b0 t g4x_sprite_get_hw_state +ffffffff81c28380 t g4x_sprite_min_cdclk +ffffffff81c28460 t vlv_sprite_ctl +ffffffff81c28660 t vlv_sprite_format_mod_supported +ffffffff81c287a0 t ivb_sprite_ctl +ffffffff81c289e0 t g4x_sprite_ctl +ffffffff81c28bb0 t snb_sprite_format_mod_supported +ffffffff81c28ca0 t g4x_sprite_format_mod_supported +ffffffff81c29000 T intel_sprite_set_colorkey_ioctl +ffffffff81c2a000 T intel_tc_port_in_tbt_alt_mode +ffffffff81c2a090 T intel_tc_port_in_dp_alt_mode +ffffffff81c2a120 T intel_tc_port_in_legacy_mode +ffffffff81c2a1b0 T intel_tc_cold_requires_aux_pw +ffffffff81c2a230 T intel_tc_port_get_lane_mask +ffffffff81c2a380 T intel_tc_port_get_pin_assignment_mask +ffffffff81c2a4d0 T intel_tc_port_fia_max_lane_count +ffffffff81c2a720 T intel_tc_port_set_fia_lane_count +ffffffff81c2a910 T intel_tc_port_init_mode +ffffffff81c2ab80 t intel_tc_port_update_mode +ffffffff81c2afb0 T intel_tc_port_sanitize_mode +ffffffff81c2b340 T intel_tc_port_connected_locked +ffffffff81c2b4b0 T intel_tc_port_ref_held +ffffffff81c2b510 T intel_tc_port_connected +ffffffff81c2b5a0 T intel_tc_port_link_needs_reset +ffffffff81c2b670 T intel_tc_port_link_reset +ffffffff81c2b7b0 T intel_tc_port_link_cancel_reset_work +ffffffff81c2b880 T intel_tc_port_lock +ffffffff81c2b8a0 t __intel_tc_port_lock +ffffffff81c2ba20 T intel_tc_port_suspend +ffffffff81c2ba90 T intel_tc_port_unlock +ffffffff81c2bb10 T intel_tc_port_get_link +ffffffff81c2bbb0 T intel_tc_port_put_link +ffffffff81c2bc70 T intel_tc_port_init +ffffffff81c2bf30 t kasprintf +ffffffff81c2c010 t intel_tc_port_disconnect_phy_work +ffffffff81c2c070 t intel_tc_port_link_reset_work +ffffffff81c2c430 T intel_tc_port_cleanup +ffffffff81c2c510 t intel_tc_port_needs_reset +ffffffff81c2c630 t tgl_tc_phy_cold_off_domain +ffffffff81c2c660 t xelpdp_tc_phy_hpd_live_status +ffffffff81c2c7a0 t adlp_tc_phy_is_ready +ffffffff81c2c8c0 t xelpdp_tc_phy_is_owned +ffffffff81c2c9b0 t xelpdp_tc_phy_get_hw_state +ffffffff81c2cb80 t xelpdp_tc_phy_connect +ffffffff81c2ce60 t xelpdp_tc_phy_disconnect +ffffffff81c2cfe0 t adlp_tc_phy_init +ffffffff81c2d050 t tc_phy_get_current_mode +ffffffff81c2d3b0 t tc_phy_wait_for_ready +ffffffff81c2d550 t xelpdp_tc_phy_enable_tcss_power +ffffffff81c2d800 t tc_phy_verify_legacy_or_dp_alt_mode +ffffffff81c2da10 t xelpdp_tc_phy_wait_for_tcss_power +ffffffff81c2dc60 t adlp_tc_phy_cold_off_domain +ffffffff81c2dcc0 t adlp_tc_phy_hpd_live_status +ffffffff81c2dde0 t adlp_tc_phy_is_owned +ffffffff81c2dec0 t adlp_tc_phy_get_hw_state +ffffffff81c2df80 t adlp_tc_phy_connect +ffffffff81c2e320 t adlp_tc_phy_disconnect +ffffffff81c2e4c0 t icl_tc_phy_hpd_live_status +ffffffff81c2e660 t icl_tc_phy_is_ready +ffffffff81c2e780 t icl_tc_phy_is_owned +ffffffff81c2e8a0 t icl_tc_phy_get_hw_state +ffffffff81c2e960 t icl_tc_phy_connect +ffffffff81c2eb20 t icl_tc_phy_disconnect +ffffffff81c2ebb0 t tgl_tc_phy_init +ffffffff81c2ed20 t icl_tc_phy_take_ownership +ffffffff81c2eeb0 t icl_tc_phy_cold_off_domain +ffffffff81c2ef10 t icl_tc_phy_init +ffffffff81c2ef70 t __delayed_work_tick +ffffffff81c2f000 T intel_tv_init +ffffffff81c2f490 t intel_tv_compute_config +ffffffff81c2f990 t intel_tv_get_config +ffffffff81c2feb0 t intel_tv_pre_enable +ffffffff81c308f0 t intel_enable_tv +ffffffff81c30970 t intel_disable_tv +ffffffff81c309e0 t intel_tv_get_hw_state +ffffffff81c30a50 t intel_tv_connector_duplicate_state +ffffffff81c30ae0 t intel_tv_mode_to_mode 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skl_watermark_ipc_init +ffffffff81c42f80 T skl_wm_init +ffffffff81c43830 T intel_atomic_get_dbuf_state +ffffffff81c43850 T intel_dbuf_init +ffffffff81c438d0 T intel_dbuf_pre_plane_update +ffffffff81c43c10 T intel_dbuf_post_plane_update +ffffffff81c43d00 T intel_mbus_dbox_update +ffffffff81c43fa0 T skl_watermark_debugfs_register +ffffffff81c43fd0 t skl_sagv_disable +ffffffff81c44110 t skl_compute_wm +ffffffff81c475e0 t skl_wm_get_hw_state_and_sanitize +ffffffff81c47e40 t skl_build_plane_wm_single +ffffffff81c481f0 t skl_compute_wm_params +ffffffff81c48600 t skl_compute_plane_wm +ffffffff81c48a50 t skl_compute_dbuf_slices +ffffffff81c48f50 t skl_ddb_entry_for_slices +ffffffff81c490a0 t intel_dbuf_duplicate_state +ffffffff81c49140 t intel_dbuf_destroy_state +ffffffff81c4a000 T pixel_format_from_register_bits +ffffffff81c4a070 T vlv_dsi_wait_for_fifo_empty +ffffffff81c4a130 T vlv_dsi_init +ffffffff81c4aab0 t intel_dsi_compute_config +ffffffff81c4ac30 t intel_dsi_pre_enable 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i915_gem_context_destroy_ioctl +ffffffff81c564b0 T i915_gem_context_getparam_ioctl +ffffffff81c56940 T i915_gem_context_setparam_ioctl +ffffffff81c56e90 t set_proto_ctx_param +ffffffff81c57680 T i915_gem_context_reset_stats_ioctl +ffffffff81c577a0 T i915_gem_engines_iter_next +ffffffff81c577f0 T i915_gem_context_module_exit +ffffffff81c57810 T i915_gem_context_module_init +ffffffff81c57870 t i915_gem_context_release_work +ffffffff81c57960 t intel_context_set_gem +ffffffff81c57a90 t engines_notify +ffffffff81c57c20 t intel_context_unpin +ffffffff81c57cb0 t kill_engines +ffffffff81c57e80 t create_setparam +ffffffff81c57f00 t invalid_ext +ffffffff81c57f30 t lookup_user_engine +ffffffff81c57ff0 t set_proto_ctx_engines_balance +ffffffff81c58320 t set_proto_ctx_engines_bond +ffffffff81c58730 t set_proto_ctx_engines_parallel_submit +ffffffff81c59000 T __i915_gem_object_create_user +ffffffff81c59020 t __i915_gem_object_create_user_ext +ffffffff81c59500 T i915_gem_dumb_create +ffffffff81c59690 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i915_gem_object_prepare_read +ffffffff81c5c4f0 T i915_gem_object_prepare_write +ffffffff81c5d000 T i915_gem_execbuffer2_ioctl +ffffffff81c5dd10 t eb_select_context +ffffffff81c5dd90 t eb_select_engine +ffffffff81c5e280 t eb_lookup_vmas +ffffffff81c5ea50 t eb_release_vmas +ffffffff81c5ede0 t eb_relocate_parse +ffffffff81c5ef50 t eb_capture_stage +ffffffff81c5f0a0 t eb_requests_create +ffffffff81c5f520 t eb_submit +ffffffff81c5f9d0 t eb_requests_get +ffffffff81c5fa50 t eb_requests_add +ffffffff81c5fc20 t signal_fence_array +ffffffff81c5fce0 t eb_requests_put +ffffffff81c5fd60 t eb_put_engine +ffffffff81c5fed0 t parse_timeline_fences +ffffffff81c60360 t eb_pin_engine +ffffffff81c606b0 t eb_validate_vmas +ffffffff81c61050 t eb_relocate_vma +ffffffff81c612b0 t eb_parse +ffffffff81c616b0 t eb_relocate_parse_slow +ffffffff81c61e60 t eb_pin_timeline +ffffffff81c62100 t i915_gem_object_lock +ffffffff81c62350 t eb_pin_flags +ffffffff81c623c0 t eb_relocate_entry +ffffffff81c62c90 t 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i915_gem_dumb_mmap_offset +ffffffff81c66480 t __assign_mmap_offset_handle +ffffffff81c66a70 T i915_gem_mmap_offset_ioctl +ffffffff81c66b60 T i915_gem_mmap +ffffffff81c67000 T i915_gem_get_pat_index +ffffffff81c67090 T i915_gem_object_has_cache_level +ffffffff81c67140 T i915_gem_object_alloc +ffffffff81c671a0 T i915_gem_object_free +ffffffff81c671c0 T i915_gem_object_init +ffffffff81c67300 T __i915_gem_object_fini +ffffffff81c67320 T i915_gem_object_set_cache_coherency +ffffffff81c67440 T i915_gem_object_set_pat_index +ffffffff81c674f0 T i915_gem_object_can_bypass_llc +ffffffff81c67550 T __i915_gem_free_object_rcu +ffffffff81c675d0 T __i915_gem_object_pages_fini +ffffffff81c679a0 T __i915_gem_free_object +ffffffff81c67a60 T i915_gem_flush_free_objects +ffffffff81c67ab0 t __i915_gem_free_objects +ffffffff81c67bd0 T __i915_gem_object_flush_frontbuffer +ffffffff81c67c80 T __i915_gem_object_invalidate_frontbuffer +ffffffff81c67d30 T i915_gem_object_read_from_page +ffffffff81c67ec0 T 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intel_gt_setup_lmem +ffffffff81cc22e0 t region_lmem_init +ffffffff81cc2440 t region_lmem_release +ffffffff81cc3000 T intel_renderstate_init +ffffffff81cc37c0 T intel_renderstate_emit +ffffffff81cc3880 T intel_renderstate_fini +ffffffff81cc4000 T __i915_request_reset +ffffffff81cc42b0 T __intel_gt_reset +ffffffff81cc46a0 T intel_has_gpu_reset +ffffffff81cc4700 T intel_has_reset_engine +ffffffff81cc4750 T intel_reset_guc +ffffffff81cc48b0 T intel_gt_set_wedged +ffffffff81cc4960 t __intel_gt_set_wedged +ffffffff81cc4b30 T intel_gt_unset_wedged +ffffffff81cc4bb0 t __intel_gt_unset_wedged +ffffffff81cc4d40 T intel_gt_reset +ffffffff81cc5290 t reset_finish +ffffffff81cc5390 T __intel_engine_reset_bh +ffffffff81cc5570 T intel_engine_reset +ffffffff81cc5580 T intel_gt_handle_error +ffffffff81cc5b10 T intel_gt_reset_trylock +ffffffff81cc5b50 T intel_gt_reset_lock_interruptible +ffffffff81cc5cc0 T intel_gt_reset_unlock +ffffffff81cc5cf0 T intel_gt_terminally_wedged +ffffffff81cc5e70 T intel_gt_set_wedged_on_init +ffffffff81cc5f20 T intel_gt_set_wedged_on_fini +ffffffff81cc5fd0 T intel_gt_init_reset +ffffffff81cc6080 T intel_gt_fini_reset +ffffffff81cc60b0 T __intel_init_wedge +ffffffff81cc6150 t intel_wedge_me +ffffffff81cc6250 T __intel_fini_wedge +ffffffff81cc62c0 T intel_engine_reset_needs_wa_22011802037 +ffffffff81cc63a0 t gen8_reset_engines +ffffffff81cc6690 t gen6_reset_engines +ffffffff81cc6720 t ilk_do_reset +ffffffff81cc6800 t g4x_do_reset +ffffffff81cc6b20 t g33_do_reset +ffffffff81cc6cb0 t i915_do_reset +ffffffff81cc6fd0 t __gen11_reset_engines +ffffffff81cc74a0 t __gen6_reset_engines +ffffffff81cc7620 t nop_submit_request +ffffffff81cc76b0 t __delayed_work_tick +ffffffff81cc8000 T intel_ring_update_space +ffffffff81cc8040 T __intel_ring_pin +ffffffff81cc8070 T intel_ring_pin +ffffffff81cc81f0 T intel_ring_reset +ffffffff81cc8230 T intel_ring_unpin +ffffffff81cc82e0 T intel_engine_create_ring +ffffffff81cc84b0 T intel_ring_free +ffffffff81cc8500 T intel_ring_begin +ffffffff81cc8680 t wait_for_space +ffffffff81cc8790 T intel_ring_cacheline_align +ffffffff81cc9000 T intel_ring_submission_setup +ffffffff81cc9790 t i915_gem_object_lock +ffffffff81cc99e0 t ring_release +ffffffff81cc9b50 t xcs_resume +ffffffff81cca1c0 t xcs_sanitize +ffffffff81cca240 t reset_prepare +ffffffff81cca3a0 t reset_rewind +ffffffff81cca460 t reset_cancel +ffffffff81cca510 t reset_finish +ffffffff81cca540 t add_to_engine +ffffffff81cca5c0 t remove_from_engine +ffffffff81cca660 t ring_request_alloc +ffffffff81ccaa50 t i9xx_set_default_submission +ffffffff81ccaa90 t irq_handler +ffffffff81ccaab0 t stop_ring +ffffffff81ccabb0 t ring_context_alloc +ffffffff81ccacc0 t ring_context_revoke +ffffffff81ccad90 t ring_context_pre_pin +ffffffff81ccaea0 t ring_context_pin +ffffffff81ccaed0 t ring_context_unpin +ffffffff81ccaf00 t ring_context_post_unpin +ffffffff81ccaf50 t ring_context_cancel_request +ffffffff81ccaff0 t ring_context_reset +ffffffff81ccb040 t ring_context_destroy +ffffffff81ccb0a0 t switch_mm +ffffffff81ccb200 t mi_set_context +ffffffff81ccb4e0 t i9xx_submit_request +ffffffff81ccb540 t gen6_bsd_set_default_submission +ffffffff81ccb580 t gen6_bsd_submit_request +ffffffff81ccc000 T intel_rps_mark_interactive +ffffffff81ccc090 t rps_set_power +ffffffff81ccc230 T intel_rps_unpark +ffffffff81ccc590 T intel_rps_set +ffffffff81ccc6c0 T intel_rps_park +ffffffff81ccc890 t rps_disable_interrupts +ffffffff81ccc9c0 t rps_set +ffffffff81cccd70 T intel_rps_get_boost_frequency +ffffffff81ccce50 T intel_gpu_freq +ffffffff81cccf20 T intel_rps_set_boost_frequency +ffffffff81ccd0d0 T intel_rps_dec_waiters +ffffffff81ccd130 T intel_rps_boost +ffffffff81ccd250 T gen6_rps_get_freq_caps +ffffffff81ccd450 T intel_rps_enable +ffffffff81ccdac0 t gen9_rps_enable +ffffffff81ccdbe0 t gen8_rps_enable +ffffffff81ccdce0 t gen6_rps_enable +ffffffff81ccddf0 t gen5_rps_enable +ffffffff81cceac0 T intel_rps_disable +ffffffff81ccede0 T intel_freq_opcode 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intel_sseu_info_init +ffffffff81cd77d0 t cherryview_sseu_info_init +ffffffff81cd7a00 t hsw_sseu_info_init +ffffffff81cd7d00 T intel_sseu_make_rpcs +ffffffff81cd7ed0 T intel_sseu_dump +ffffffff81cd8140 T intel_sseu_print_topology +ffffffff81cd8440 T intel_sseu_print_ss_info +ffffffff81cd84b0 T intel_slicemask_from_xehp_dssmask +ffffffff81cd8500 t xehp_load_dss_mask +ffffffff81cd8640 t gen11_compute_sseu_info +ffffffff81cd9000 T intel_sseu_status +ffffffff81cd9920 T intel_sseu_debugfs_register +ffffffff81cda000 T intel_gt_init_timelines +ffffffff81cda060 T __intel_timeline_create +ffffffff81cda270 T intel_timeline_create_from_engine +ffffffff81cda340 T __intel_timeline_pin +ffffffff81cda370 T intel_timeline_pin +ffffffff81cda4d0 T intel_timeline_reset_seqno +ffffffff81cda500 T intel_timeline_enter +ffffffff81cda5f0 T intel_timeline_exit +ffffffff81cda6d0 T intel_timeline_get_seqno +ffffffff81cda740 t __intel_timeline_get_seqno +ffffffff81cda7f0 T intel_timeline_read_hwsp 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intel_gsc_uc_fw_init_done +ffffffff81ce6150 T intel_gsc_fw_get_binary_info +ffffffff81ce6500 T intel_gsc_uc_fw_upload +ffffffff81ce6970 t gsc_fw_query_compatibility_version +ffffffff81ce7000 T intel_gsc_proxy_request_handler +ffffffff81ce7920 T intel_gsc_proxy_irq_handler +ffffffff81ce79c0 T intel_gsc_proxy_fini +ffffffff81ce7a30 T intel_gsc_proxy_init +ffffffff81ce8000 T intel_gsc_uc_init_early +ffffffff81ce8120 t gsc_work +ffffffff81ce8360 T intel_gsc_uc_init +ffffffff81ce85e0 T intel_gsc_uc_fini +ffffffff81ce86f0 T intel_gsc_uc_flush_work +ffffffff81ce8730 T intel_gsc_uc_resume +ffffffff81ce8800 T intel_gsc_uc_load_start +ffffffff81ce88c0 T intel_gsc_uc_load_status +ffffffff81ce9000 T intel_gsc_uc_debugfs_register +ffffffff81cea000 T intel_gsc_uc_heci_cmd_submit_packet +ffffffff81cea380 T intel_gsc_uc_heci_cmd_emit_mtl_header +ffffffff81cea3e0 T intel_gsc_uc_heci_cmd_submit_nonpriv +ffffffff81cea980 t i915_gem_object_lock +ffffffff81ceb000 T intel_guc_notify +ffffffff81ceb040 T intel_guc_init_send_regs +ffffffff81ceb0f0 T intel_guc_init_early +ffffffff81ceb290 t gen11_reset_guc_interrupts +ffffffff81ceb300 t gen11_enable_guc_interrupts +ffffffff81ceb3a0 t gen11_disable_guc_interrupts +ffffffff81ceb420 t gen9_reset_guc_interrupts +ffffffff81ceb520 t gen9_enable_guc_interrupts +ffffffff81ceb6e0 t gen9_disable_guc_interrupts +ffffffff81ceb810 T intel_guc_init_late +ffffffff81ceb820 T intel_guc_write_params +ffffffff81cebad0 T intel_guc_dump_time_info +ffffffff81cebc50 T intel_guc_init +ffffffff81cebe40 t guc_init_params +ffffffff81cec410 T intel_guc_fini +ffffffff81cec4f0 T intel_guc_send_mmio +ffffffff81ceca60 T intel_guc_to_host_process_recv_msg +ffffffff81cecb50 T intel_guc_auth_huc +ffffffff81cecbb0 T intel_guc_suspend +ffffffff81ceccb0 T intel_guc_resume +ffffffff81cecce0 T intel_guc_allocate_vma +ffffffff81cece30 T intel_guc_allocate_and_map_vma +ffffffff81cecf10 T intel_guc_self_cfg32 +ffffffff81ced020 T intel_guc_self_cfg64 +ffffffff81ced140 T intel_guc_load_status +ffffffff81ced320 T intel_guc_write_barrier +ffffffff81cee000 T intel_guc_ads_print_policy_info +ffffffff81cee120 T intel_guc_global_policies_update +ffffffff81cee330 T intel_guc_ads_create +ffffffff81cee9b0 t guc_prep_golden_context +ffffffff81ceebd0 t guc_capture_prep_lists +ffffffff81cef310 t __guc_ads_init +ffffffff81cef870 T intel_guc_ads_init_late +ffffffff81cefaa0 T intel_guc_ads_destroy +ffffffff81cefb10 T intel_guc_ads_reset +ffffffff81cefbc0 T intel_guc_engine_usage_offset +ffffffff81cefc00 T intel_guc_engine_usage_record_map +ffffffff81cefcb0 t guc_mmio_reg_add +ffffffff81cf0000 T intel_guc_capture_getlistsize +ffffffff81cf0020 t guc_capture_getlistsize +ffffffff81cf0280 T intel_guc_capture_getlist +ffffffff81cf1410 t guc_cap_list_num_regs +ffffffff81cf1520 T intel_guc_capture_getnullheader +ffffffff81cf1600 T intel_guc_capture_print_engine_node +ffffffff81cf1ba0 T intel_guc_capture_free_node +ffffffff81cf1c20 T intel_guc_capture_is_matching_engine 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intel_gt_fini_hwconfig +ffffffff81cfa000 T intel_guc_log_section_size_capture +ffffffff81cfa050 t guc_log_init_sizes +ffffffff81cfa2b0 T intel_guc_check_log_buf_overflow +ffffffff81cfa360 T intel_guc_get_log_buffer_size +ffffffff81cfa410 T intel_guc_get_log_buffer_offset +ffffffff81cfa510 T intel_guc_log_init_early +ffffffff81cfa590 t copy_debug_logs_work +ffffffff81cfa5b0 T intel_guc_log_create +ffffffff81cfa830 T intel_guc_log_destroy +ffffffff81cfa860 T intel_guc_log_set_level +ffffffff81cfa9d0 T intel_guc_log_relay_created +ffffffff81cfaa00 T intel_guc_log_relay_open +ffffffff81cfaad0 T intel_guc_log_relay_start +ffffffff81cfab40 T intel_guc_log_relay_flush +ffffffff81cfac10 t guc_log_copy_debuglogs_for_relay +ffffffff81cfada0 T intel_guc_log_relay_close +ffffffff81cfae50 T intel_guc_log_handle_flush_event +ffffffff81cfaea0 T intel_guc_log_info +ffffffff81cfafb0 T intel_guc_log_dump +ffffffff81cfc000 T intel_guc_log_debugfs_register +ffffffff81cfd000 T intel_guc_rc_init_early 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intel_huc_auth +ffffffff81d0be00 T intel_huc_is_authenticated +ffffffff81d0bed0 T intel_huc_check_status +ffffffff81d0bff0 t huc_is_fully_authenticated +ffffffff81d0c150 T intel_huc_update_auth_status +ffffffff81d0c290 T intel_huc_load_status +ffffffff81d0c3a0 t sw_fence_dummy_notify +ffffffff81d0c3d0 t huc_delayed_load_timer_callback +ffffffff81d0d000 T intel_huc_debugfs_register +ffffffff81d0e000 T intel_huc_fw_auth_via_gsccs +ffffffff81d0e4c0 T intel_huc_fw_get_binary_info +ffffffff81d0e7d0 T intel_huc_fw_load_and_auth_via_gsc +ffffffff81d0e890 T intel_huc_fw_upload +ffffffff81d0f000 T intel_uc_init_early +ffffffff81d0f190 T intel_uc_init_late +ffffffff81d0f1d0 T intel_uc_driver_late_release +ffffffff81d0f200 T intel_uc_init_mmio +ffffffff81d0f220 T intel_uc_driver_remove +ffffffff81d0f2c0 T intel_uc_reset_prepare +ffffffff81d0f340 t __uc_sanitize +ffffffff81d0f4a0 T intel_uc_reset +ffffffff81d0f4f0 T intel_uc_reset_finish +ffffffff81d0f540 T intel_uc_cancel_requests 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i915_active_fini +ffffffff81d16120 T i915_active_acquire_preallocate_barrier +ffffffff81d16540 t node_retire +ffffffff81d165d0 T i915_active_acquire_barrier +ffffffff81d16750 T i915_request_add_active_barriers +ffffffff81d16800 T i915_active_fence_set +ffffffff81d16880 T i915_active_noop +ffffffff81d168c0 T i915_active_get +ffffffff81d168f0 T i915_active_put +ffffffff81d16960 T i915_active_create +ffffffff81d16a70 t auto_active +ffffffff81d16aa0 t auto_retire +ffffffff81d16b10 T i915_active_module_exit +ffffffff81d16b30 T i915_active_module_init +ffffffff81d16ba0 t __active_retire +ffffffff81d16de0 t barrier_wake +ffffffff81d17000 T intel_engine_init_cmd_parser +ffffffff81d17730 t gen7_render_get_cmd_length_mask +ffffffff81d177c0 t gen7_bsd_get_cmd_length_mask +ffffffff81d17870 t gen7_blt_get_cmd_length_mask +ffffffff81d178f0 t gen9_blt_get_cmd_length_mask +ffffffff81d17970 T intel_engine_cleanup_cmd_parser +ffffffff81d17a40 T intel_engine_cmd_parser +ffffffff81d18700 T i915_cmd_parser_get_version +ffffffff81d19000 T i915_fence_context_timeout +ffffffff81d1a000 T i915_deps_init +ffffffff81d1a070 T i915_deps_fini +ffffffff81d1a100 T i915_deps_sync +ffffffff81d1a1c0 T i915_deps_add_dependency +ffffffff81d1a490 T i915_deps_add_resv +ffffffff81d1b000 T i915_print_iommu_status +ffffffff81d1b050 T i915_driver_probe +ffffffff81d1bc60 t i915_driver_register +ffffffff81d1bdb0 T inteldrm_init_backlight +ffffffff81d1be40 t i915_welcome_messages +ffffffff81d1c000 T i915_driver_remove +ffffffff81d1c190 T i915_driver_shutdown +ffffffff81d1c3c0 T i915_driver_resume_switcheroo +ffffffff81d1c430 t i915_drm_resume_early +ffffffff81d1c550 t i915_drm_resume +ffffffff81d1c850 T intagpsubmatch +ffffffff81d1c8a0 T intagp_print +ffffffff81d1c8f0 T inteldrm_wsioctl +ffffffff81d1cb00 T inteldrm_wsmmap +ffffffff81d1cb30 T inteldrm_alloc_screen +ffffffff81d1cb60 T inteldrm_free_screen +ffffffff81d1cb80 T inteldrm_show_screen +ffffffff81d1cc60 T inteldrm_load_font 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i915_drm_client_alloc +ffffffff81d1f090 T __i915_drm_client_free +ffffffff81d20000 T i915_gem_get_aperture_ioctl +ffffffff81d200e0 T i915_gem_object_unbind +ffffffff81d203c0 T i915_gem_pread_ioctl +ffffffff81d20590 t i915_gem_shmem_pread +ffffffff81d20a40 t i915_gem_gtt_pread +ffffffff81d20d40 T i915_gem_pwrite_ioctl +ffffffff81d20f60 t i915_gem_gtt_pwrite_fast +ffffffff81d21300 t i915_gem_shmem_pwrite +ffffffff81d21890 T i915_gem_sw_finish_ioctl +ffffffff81d21930 T i915_gem_runtime_suspend +ffffffff81d21a50 T i915_gem_object_ggtt_pin_ww +ffffffff81d21d50 T i915_gem_object_ggtt_pin +ffffffff81d21e90 t i915_gem_object_lock +ffffffff81d220e0 T i915_gem_madvise_ioctl +ffffffff81d22550 T i915_gem_drain_freed_objects +ffffffff81d225d0 T i915_gem_drain_workqueue +ffffffff81d22700 T i915_gem_init +ffffffff81d22a60 T i915_gem_driver_register +ffffffff81d22a70 T i915_gem_driver_unregister +ffffffff81d22a80 T i915_gem_driver_remove +ffffffff81d22ae0 T i915_gem_driver_release +ffffffff81d22bf0 T i915_gem_init_early +ffffffff81d22c90 T i915_gem_cleanup_early +ffffffff81d22d10 T i915_gem_open +ffffffff81d22e50 t i915_gem_gtt_prepare +ffffffff81d24000 T i915_gem_evict_something +ffffffff81d244d0 t ungrab_vma +ffffffff81d24620 t grab_vma +ffffffff81d24760 T i915_gem_evict_for_node +ffffffff81d249d0 T i915_gem_evict_vm +ffffffff81d25000 T i915_gem_gtt_prepare_pages +ffffffff81d25030 T i915_gem_gtt_finish_pages +ffffffff81d25090 T i915_gem_gtt_reserve +ffffffff81d25150 T i915_gem_gtt_insert +ffffffff81d26000 T i915_gem_ww_ctx_init +ffffffff81d26060 T i915_gem_ww_unlock_single +ffffffff81d261c0 T i915_gem_ww_ctx_fini +ffffffff81d26240 t i915_gem_ww_ctx_unlock_all +ffffffff81d263c0 T i915_gem_ww_ctx_backoff +ffffffff81d27000 T i915_getparam_ioctl +ffffffff81d28000 T intel_gpu_error_find_batch +ffffffff81d28070 T i915_error_printf +ffffffff81d28140 T intel_gpu_error_print_vma +ffffffff81d28170 T i915_gpu_coredump_copy_to_buffer +ffffffff81d281d0 T __i915_gpu_coredump_free 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atombios_set_backlight_level +ffffffff81d7b230 T atombios_dig_transmitter_setup +ffffffff81d7b250 T radeon_atom_backlight_init +ffffffff81d7b480 t radeon_atom_backlight_get_brightness +ffffffff81d7b4e0 T atombios_dvo_setup +ffffffff81d7b6d0 T atombios_digital_setup +ffffffff81d7b9c0 T atombios_get_encoder_mode +ffffffff81d7bcd0 T atombios_dig_encoder_setup2 +ffffffff81d7c160 T atombios_dig_encoder_setup +ffffffff81d7c180 T atombios_dig_transmitter_setup2 +ffffffff81d7cbf0 T atombios_set_edp_panel_power +ffffffff81d7cd30 T radeon_atom_release_dig_encoder +ffffffff81d7cd70 T radeon_atom_pick_dig_encoder +ffffffff81d7cfd0 T radeon_atom_encoder_init +ffffffff81d7d0b0 t atombios_external_encoder_setup +ffffffff81d7d370 T radeon_atom_ext_encoder_setup_ddc +ffffffff81d7d3d0 T radeon_enc_destroy +ffffffff81d7d4b0 T radeon_add_atom_encoder +ffffffff81d7d960 t radeon_atombios_set_dig_info +ffffffff81d7d9d0 t radeon_atombios_set_dac_info +ffffffff81d7da50 t radeon_atom_backlight_update_status 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btc_skip_blacklist_clocks +ffffffff81d81230 T btc_adjust_clock_combinations +ffffffff81d81360 T btc_apply_voltage_delta_rules +ffffffff81d81490 T btc_program_mgcg_hw_sequence +ffffffff81d815a0 T btc_dpm_enabled +ffffffff81d815b0 T btc_notify_uvd_to_smc +ffffffff81d81640 T btc_reset_to_default +ffffffff81d81690 T btc_read_arb_registers +ffffffff81d81730 T btc_dpm_vblank_too_short +ffffffff81d817b0 T btc_dpm_pre_set_power_state +ffffffff81d82a00 T btc_dpm_set_power_state +ffffffff81d82de0 t btc_set_power_state_conditionally_enable_ulv +ffffffff81d82f60 T btc_dpm_post_set_power_state +ffffffff81d830a0 t btc_update_current_ps +ffffffff81d831b0 T btc_dpm_enable +ffffffff81d842a0 t btc_cg_clock_gating_enable +ffffffff81d843e0 t btc_mg_clock_gating_enable +ffffffff81d84520 t btc_ls_clock_gating_enable +ffffffff81d84660 t btc_init_stutter_mode +ffffffff81d846e0 T btc_dpm_disable +ffffffff81d84a50 T btc_dpm_setup_asic +ffffffff81d84b70 T btc_dpm_init +ffffffff81d84fe0 T btc_dpm_fini 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ci_populate_initial_mc_reg_table +ffffffff81d8ac90 t ci_populate_pm_base +ffffffff81d8b020 t ci_dpm_start_smc +ffffffff81d8b0d0 t ci_enable_vr_hot_gpio_interrupt +ffffffff81d8b190 t ci_notify_smc_display_change +ffffffff81d8b270 t ci_enable_sclk_control +ffffffff81d8b2b0 t ci_enable_ulv +ffffffff81d8b430 t ci_enable_ds_master_switch +ffffffff81d8b650 t ci_start_dpm +ffffffff81d8b8a0 t ci_enable_didt +ffffffff81d8bba0 t ci_enable_smc_cac +ffffffff81d8bd50 t ci_enable_power_containment +ffffffff81d8c230 t ci_power_control_set_level +ffffffff81d8c360 t ci_enable_auto_throttle_source +ffffffff81d8c450 t ci_enable_thermal_based_sclk_dpm +ffffffff81d8c5d0 t ci_thermal_start_thermal_controller +ffffffff81d8c930 T ci_dpm_late_enable +ffffffff81d8c9f0 T ci_dpm_disable +ffffffff81d8d290 T ci_dpm_set_power_state +ffffffff81d8dfe0 t ci_update_sclk_t +ffffffff81d8e060 t ci_update_and_upload_mc_reg_table +ffffffff81d8e2e0 t ci_unfreeze_sclk_mclk_dpm +ffffffff81d8e4c0 t ci_notify_link_speed_change_after_state_change +ffffffff81d8e600 T ci_dpm_display_configuration_changed +ffffffff81d8e7f0 T ci_dpm_fini +ffffffff81d8e8c0 T ci_dpm_init +ffffffff81d8f860 t ci_initialize_powertune_defaults +ffffffff81d8f950 t ci_get_leakage_voltages +ffffffff81d8fb30 t ci_patch_dependency_tables_with_leakage +ffffffff81d901a0 t ci_set_private_data_variables_based_on_pptable +ffffffff81d902b0 T ci_dpm_debugfs_print_current_performance_level +ffffffff81d90410 T ci_dpm_print_power_state +ffffffff81d904f0 T ci_dpm_get_current_sclk +ffffffff81d905d0 T ci_dpm_get_current_mclk +ffffffff81d906b0 T ci_dpm_get_sclk +ffffffff81d90700 T ci_dpm_get_mclk +ffffffff81d90750 t ci_set_valid_flag +ffffffff81d907f0 t ci_populate_all_graphic_levels +ffffffff81d90db0 t ci_populate_all_memory_levels +ffffffff81d916d0 t ci_populate_smc_vce_level +ffffffff81d917f0 t ci_populate_smc_acp_level +ffffffff81d918f0 t ci_populate_smc_samu_level +ffffffff81d919f0 t ci_do_program_memory_timing_parameters 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cik_pciep_rreg +ffffffff81d94320 T cik_pciep_wreg +ffffffff81d94390 T cik_get_xclk +ffffffff81d94410 T cik_mm_rdoorbell +ffffffff81d94480 T cik_mm_wdoorbell +ffffffff81d944d0 T ci_mc_load_microcode +ffffffff81d94840 T cik_ring_test +ffffffff81d94b60 T cik_fence_gfx_ring_emit +ffffffff81d94fb0 T cik_fence_compute_ring_emit +ffffffff81d95260 T cik_semaphore_ring_emit +ffffffff81d95450 T cik_copy_cpdma +ffffffff81d95940 T cik_ring_ib_execute +ffffffff81d95f50 T cik_ib_test +ffffffff81d962e0 T cik_gfx_get_rptr +ffffffff81d96340 T cik_gfx_get_wptr +ffffffff81d96380 T cik_gfx_set_wptr +ffffffff81d963c0 T cik_compute_get_rptr +ffffffff81d964b0 T cik_compute_get_wptr +ffffffff81d965a0 T cik_compute_set_wptr +ffffffff81d96620 T cik_gpu_check_soft_reset +ffffffff81d967a0 T cik_asic_reset +ffffffff81d96cf0 t cik_gpu_pci_config_reset +ffffffff81d97560 T cik_gfx_is_lockup +ffffffff81d975e0 T cik_pcie_gart_tlb_flush +ffffffff81d97630 T cik_ib_parse +ffffffff81d97660 T cik_vm_init +ffffffff81d976c0 T cik_vm_fini +ffffffff81d976f0 T cik_vm_flush +ffffffff81d984f0 T cik_enter_rlc_safe_mode +ffffffff81d98600 T cik_exit_rlc_safe_mode +ffffffff81d98640 T cik_update_cg +ffffffff81d98b90 t cik_enable_mgcg +ffffffff81d990c0 t cik_enable_cgcg +ffffffff81d99450 T cik_init_cp_pg_table +ffffffff81d996e0 T cik_get_csb_size +ffffffff81d99770 T cik_get_csb_buffer +ffffffff81d99900 T cik_irq_set +ffffffff81d9a780 t cik_disable_interrupt_state +ffffffff81d9ac90 T cik_irq_process +ffffffff81d9c6e0 t cik_irq_ack +ffffffff81d9d0c0 T cik_resume +ffffffff81d9d180 t cik_init_golden_registers +ffffffff81d9d3b0 t cik_startup +ffffffff81da05d0 T cik_suspend +ffffffff81da0a80 T cik_init +ffffffff81da1100 t cik_init_microcode +ffffffff81da2140 t cik_uvd_init +ffffffff81da2200 t cik_vce_init +ffffffff81da22e0 t cik_cp_fini +ffffffff81da2370 t cik_irq_fini +ffffffff81da24a0 t cik_mec_fini +ffffffff81da2580 t cik_pcie_gart_fini +ffffffff81da2690 T cik_fini +ffffffff81da2ac0 T dce8_program_fmt +ffffffff81da2c10 T dce8_bandwidth_update +ffffffff81da38c0 T cik_get_gpu_clock_counter +ffffffff81da3990 T cik_set_uvd_clocks +ffffffff81da3a10 t cik_set_uvd_clock +ffffffff81da3bf0 T cik_set_vce_clocks +ffffffff81da3f10 t cik_wait_for_rlc_serdes +ffffffff81da4100 t cik_mec_init +ffffffff81da4340 t cik_uvd_start +ffffffff81da4450 t cik_vce_start +ffffffff81da45a0 t cik_irq_init +ffffffff81da51c0 t cik_cp_resume +ffffffff81da6b50 t cik_uvd_resume +ffffffff81da6c30 t cik_vce_resume +ffffffff81da6d40 t pcie_capability_set_word +ffffffff81da6e70 t pcie_capability_read_word +ffffffff81da6f20 t pcie_capability_clear_and_set_word +ffffffff81da7060 t pcie_capability_write_word +ffffffff81da7130 t cik_get_cu_active_bitmap +ffffffff81da72c0 t radeon_bo_reserve +ffffffff81da7460 t radeon_bo_unreserve +ffffffff81da7570 t cik_update_gfx_pg +ffffffff81da7720 t cik_compute_stop +ffffffff81da78a0 t cik_cp_compute_fini +ffffffff81da7ad0 t request_firmware +ffffffff81da7b80 t release_firmware +ffffffff81da7bc0 t dce8_latency_watermark +ffffffff81da8000 T cik_sdma_get_rptr +ffffffff81da8070 T cik_sdma_get_wptr +ffffffff81da80c0 T cik_sdma_set_wptr +ffffffff81da8110 T cik_sdma_ring_ib_execute +ffffffff81da8560 T cik_sdma_fence_ring_emit +ffffffff81da8760 t cik_sdma_hdp_flush_ring_emit +ffffffff81da89d0 T cik_sdma_semaphore_ring_emit +ffffffff81da8b00 T cik_sdma_enable +ffffffff81da8cf0 T cik_sdma_resume +ffffffff81da91f0 T cik_sdma_fini +ffffffff81da9240 T cik_copy_dma +ffffffff81da96e0 T cik_sdma_ring_test +ffffffff81da99e0 T cik_sdma_ib_test +ffffffff81da9c80 T cik_sdma_is_lockup +ffffffff81da9d10 T cik_sdma_vm_copy_pages +ffffffff81da9e20 T cik_sdma_vm_write_pages +ffffffff81da9fa0 T cik_sdma_vm_set_pages +ffffffff81daa120 T cik_sdma_vm_pad_ib +ffffffff81daa170 T cik_dma_vm_flush +ffffffff81dab000 T cypress_enable_spread_spectrum +ffffffff81dab140 T cypress_start_dpm +ffffffff81dab190 T cypress_enable_sclk_control +ffffffff81dab1f0 T cypress_enable_mclk_control +ffffffff81dab250 T cypress_notify_smc_display_change +ffffffff81dab2a0 T cypress_program_response_times +ffffffff81dab390 T cypress_advertise_gen2_capability +ffffffff81dab4a0 T cypress_notify_link_speed_change_after_state_change +ffffffff81dab590 T cypress_notify_link_speed_change_before_state_change +ffffffff81dab670 T cypress_get_strobe_mode_settings +ffffffff81dab780 T cypress_get_mclk_frequency_ratio +ffffffff81dab830 T cypress_map_clkf_to_ibias +ffffffff81dab8f0 T cypress_convert_power_level_to_smc +ffffffff81dabd10 t cypress_populate_mclk_value +ffffffff81dac150 T cypress_upload_sw_state +ffffffff81dac330 T cypress_upload_mc_reg_table +ffffffff81dac410 t cypress_convert_mc_reg_table_to_smc +ffffffff81dac860 T cypress_calculate_burst_time +ffffffff81dac8f0 T cypress_program_memory_timing_parameters +ffffffff81dacac0 T cypress_populate_smc_initial_state +ffffffff81daceb0 T cypress_populate_smc_acpi_state +ffffffff81dad260 T cypress_construct_voltage_tables +ffffffff81dad420 T cypress_populate_smc_voltage_tables +ffffffff81dad560 T cypress_get_mvdd_configuration +ffffffff81dad650 T cypress_populate_mc_reg_table +ffffffff81dad9e0 T cypress_get_table_locations +ffffffff81dadaf0 T cypress_enable_display_gap +ffffffff81dadb50 T cypress_dpm_setup_asic +ffffffff81dadcb0 T cypress_dpm_enable +ffffffff81dae960 t cypress_force_mc_use_s1 +ffffffff81daec30 t cypress_gfx_clock_gating_enable +ffffffff81daf010 t cypress_mg_clock_gating_enable +ffffffff81daf2f0 T cypress_dpm_disable +ffffffff81daf580 T cypress_dpm_set_power_state +ffffffff81daf880 T cypress_dpm_display_configuration_changed +ffffffff81daf960 T cypress_dpm_init +ffffffff81dafc30 T cypress_dpm_fini +ffffffff81dafcd0 T cypress_dpm_vblank_too_short +ffffffff81dafd50 t cypress_wait_for_mc_sequencer +ffffffff81db0000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81db0080 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81db0100 T dce3_2_afmt_write_sad_regs +ffffffff81db0200 T dce3_2_audio_set_dto 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sumo_set_uvd_clock +ffffffff81db2780 T evergreen_set_uvd_clocks +ffffffff81db2e40 T evergreen_fix_pci_max_read_req_size +ffffffff81db3040 T dce4_program_fmt +ffffffff81db3170 T dce4_wait_for_vblank +ffffffff81db3430 T evergreen_page_flip +ffffffff81db35e0 T evergreen_page_flip_pending +ffffffff81db3660 T evergreen_get_temp +ffffffff81db3730 T sumo_get_temp +ffffffff81db3780 T sumo_pm_init_profile +ffffffff81db38d0 T btc_pm_init_profile +ffffffff81db39f0 T evergreen_pm_misc +ffffffff81db3bb0 T evergreen_pm_prepare +ffffffff81db3cd0 T evergreen_pm_finish +ffffffff81db3df0 T evergreen_hpd_sense +ffffffff81db3e70 T evergreen_hpd_set_polarity +ffffffff81db3fc0 T evergreen_hpd_init +ffffffff81db40a0 T evergreen_hpd_fini +ffffffff81db4150 T evergreen_get_number_of_dram_channels +ffffffff81db41a0 T evergreen_bandwidth_update +ffffffff81db4380 t evergreen_line_buffer_adjust +ffffffff81db45a0 t evergreen_program_watermarks +ffffffff81db50a0 T evergreen_mc_wait_for_idle +ffffffff81db5140 T evergreen_pcie_gart_tlb_flush +ffffffff81db5220 T evergreen_mc_stop +ffffffff81db5e80 T evergreen_mc_resume +ffffffff81db6650 T evergreen_mc_program +ffffffff81db6a70 T evergreen_ring_ib_execute +ffffffff81db6f70 T evergreen_mc_init +ffffffff81db70d0 T evergreen_print_gpu_status_regs +ffffffff81db7120 T evergreen_is_display_hung +ffffffff81db7350 T evergreen_gpu_check_soft_reset +ffffffff81db74c0 T evergreen_gpu_pci_config_reset +ffffffff81db7690 T evergreen_asic_reset +ffffffff81db7a80 T evergreen_gfx_is_lockup +ffffffff81db7b00 T sumo_rlc_fini +ffffffff81db7d40 t radeon_bo_reserve +ffffffff81db7ee0 t radeon_bo_unreserve +ffffffff81db7ff0 T sumo_rlc_init +ffffffff81db88e0 T evergreen_rlc_resume +ffffffff81db8c50 T evergreen_get_vblank_counter +ffffffff81db8cc0 T evergreen_disable_interrupt_state +ffffffff81db8fc0 T evergreen_irq_set +ffffffff81db9660 T evergreen_irq_suspend +ffffffff81db96d0 T evergreen_irq_process +ffffffff81dba370 t evergreen_irq_ack +ffffffff81dbaaa0 T evergreen_resume +ffffffff81dbabb0 t evergreen_init_golden_registers +ffffffff81dbae20 t evergreen_startup +ffffffff81dbc870 T evergreen_suspend +ffffffff81dbca80 T evergreen_init +ffffffff81dbcfc0 t evergreen_pcie_gart_fini +ffffffff81dbd0f0 T evergreen_fini +ffffffff81dbd390 T evergreen_pcie_gen2_enable +ffffffff81dbd620 T evergreen_program_aspm +ffffffff81dbde10 t evergreen_latency_watermark +ffffffff81dbe010 t evergreen_uvd_start +ffffffff81dbe0f0 t evergreen_cp_load_microcode +ffffffff81dbe250 t evergreen_cp_resume +ffffffff81dbf070 t evergreen_uvd_resume +ffffffff81dc0000 T evergreen_cs_parse +ffffffff81dc2a40 T evergreen_dma_cs_parse +ffffffff81dc3c40 T evergreen_ib_parse +ffffffff81dc4110 T evergreen_dma_ib_parse +ffffffff81dc42f0 t evergreen_cs_track_check +ffffffff81dc5470 t evergreen_cs_handle_reg +ffffffff81dc73f0 t evergreen_surface_value_conv_check +ffffffff81dc76e0 t evergreen_surface_check +ffffffff81dc7b90 t evergreen_cs_track_validate_htile +ffffffff81dc7e50 t evergreen_vm_reg_valid +ffffffff81dc9000 T evergreen_dma_fence_ring_emit +ffffffff81dc92f0 T evergreen_dma_ring_ib_execute +ffffffff81dc9680 T evergreen_copy_dma +ffffffff81dc9aa0 T evergreen_dma_is_lockup +ffffffff81dca000 T dce4_audio_enable +ffffffff81dca080 T evergreen_hdmi_update_acr +ffffffff81dca2d0 T dce4_afmt_write_latency_fields +ffffffff81dca340 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81dca3c0 T dce4_afmt_dp_write_speaker_allocation +ffffffff81dca440 T evergreen_hdmi_write_sad_regs +ffffffff81dca540 T evergreen_set_avi_packet +ffffffff81dca700 T dce4_hdmi_audio_set_dto +ffffffff81dca7e0 T dce4_dp_audio_set_dto +ffffffff81dca8e0 T dce4_set_vbi_packet +ffffffff81dca950 T dce4_hdmi_set_color_depth +ffffffff81dcaac0 T dce4_set_audio_packet +ffffffff81dcad10 T dce4_set_mute +ffffffff81dcae20 T evergreen_hdmi_enable +ffffffff81dcb1b0 T evergreen_dp_enable +ffffffff81dcc000 T kv_dpm_enable_bapm +ffffffff81dcc070 T kv_dpm_enable +ffffffff81dcd060 t kv_populate_vce_table +ffffffff81dcd300 t kv_populate_samu_table +ffffffff81dcd580 t kv_populate_acp_table +ffffffff81dcd730 t kv_start_am +ffffffff81dcd770 t kv_enable_auto_thermal_throttling +ffffffff81dcd7b0 t kv_enable_dpm_voltage_scaling +ffffffff81dcd7f0 t kv_set_dpm_interval +ffffffff81dcd830 t kv_start_dpm +ffffffff81dcd880 t kv_enable_didt +ffffffff81dcdb80 T kv_dpm_late_enable +ffffffff81dcddd0 T kv_dpm_powergate_uvd +ffffffff81dcdf90 T kv_dpm_disable +ffffffff81dce390 T kv_dpm_force_performance_level +ffffffff81dce540 t kv_force_dpm_lowest +ffffffff81dce620 T kv_dpm_pre_set_power_state +ffffffff81dceba0 T kv_dpm_set_power_state +ffffffff81dcf490 t kv_set_valid_clock_range +ffffffff81dcf630 t kv_calculate_ds_divider +ffffffff81dcf7d0 t kv_calculate_nbps_level_settings +ffffffff81dcf950 t kv_update_vce_dpm +ffffffff81dcfb70 T kv_dpm_post_set_power_state +ffffffff81dcfc10 T kv_dpm_setup_asic +ffffffff81dcfc80 T kv_dpm_init +ffffffff81dd0580 T kv_dpm_debugfs_print_current_performance_level +ffffffff81dd05f0 T kv_dpm_get_current_sclk +ffffffff81dd0660 T kv_dpm_get_current_mclk +ffffffff81dd0690 T kv_dpm_print_power_state +ffffffff81dd0760 T kv_dpm_fini +ffffffff81dd0810 T kv_dpm_display_configuration_changed +ffffffff81dd0840 T kv_dpm_get_sclk +ffffffff81dd0890 T kv_dpm_get_mclk +ffffffff81dd1000 T kv_notify_message_to_smu +ffffffff81dd10c0 T kv_dpm_get_enable_mask +ffffffff81dd11b0 T kv_send_msg_to_smc_with_parameter +ffffffff81dd1280 T kv_read_smc_sram_dword +ffffffff81dd1310 T kv_smc_dpm_enable +ffffffff81dd1450 T kv_smc_bapm_enable +ffffffff81dd1590 T kv_copy_bytes_to_smc +ffffffff81dd2000 T tn_smc_rreg +ffffffff81dd2090 T tn_smc_wreg +ffffffff81dd2100 T ni_mc_load_microcode +ffffffff81dd22f0 T ni_init_microcode +ffffffff81dd28c0 t request_firmware +ffffffff81dd2970 t release_firmware +ffffffff81dd29b0 T cayman_get_allowed_info_register +ffffffff81dd2a40 T tn_get_temp +ffffffff81dd2ae0 T cayman_pcie_gart_tlb_flush +ffffffff81dd2b30 T cayman_cp_int_cntl_setup +ffffffff81dd2b80 T cayman_fence_ring_emit +ffffffff81dd2f70 T cayman_ring_ib_execute +ffffffff81dd3440 T cayman_gfx_get_rptr +ffffffff81dd34d0 T cayman_gfx_get_wptr +ffffffff81dd3540 T cayman_gfx_set_wptr +ffffffff81dd35c0 T cayman_gpu_check_soft_reset +ffffffff81dd3760 T cayman_asic_reset +ffffffff81dd3af0 T cayman_gfx_is_lockup +ffffffff81dd3b70 T cayman_resume +ffffffff81dd3c30 t ni_init_golden_registers +ffffffff81dd3d20 t cayman_startup +ffffffff81dd52e0 T cayman_suspend +ffffffff81dd5520 T cayman_init +ffffffff81dd59b0 t cayman_uvd_init +ffffffff81dd5a70 t cayman_vce_init +ffffffff81dd5b50 t cayman_cp_fini +ffffffff81dd5be0 t cayman_pcie_gart_fini +ffffffff81dd5d30 T cayman_fini +ffffffff81dd6070 T cayman_vm_init +ffffffff81dd60d0 T cayman_vm_fini +ffffffff81dd6100 T cayman_vm_decode_fault +ffffffff81dd61a0 T cayman_vm_flush +ffffffff81dd6680 T tn_set_vce_clocks +ffffffff81dd6980 t cayman_uvd_start +ffffffff81dd6a60 t cayman_vce_start +ffffffff81dd6bb0 t cayman_cp_load_microcode +ffffffff81dd6d40 t cayman_cp_resume +ffffffff81dd7df0 t cayman_uvd_resume +ffffffff81dd7ed0 t cayman_vce_resume +ffffffff81dd8000 T cayman_dma_get_rptr +ffffffff81dd8070 T cayman_dma_get_wptr +ffffffff81dd80c0 T cayman_dma_set_wptr +ffffffff81dd8110 T cayman_dma_ring_ib_execute +ffffffff81dd84e0 T cayman_dma_stop +ffffffff81dd8590 T cayman_dma_resume +ffffffff81dd8800 T cayman_dma_fini +ffffffff81dd88c0 T cayman_dma_is_lockup +ffffffff81dd8950 T cayman_dma_vm_copy_pages +ffffffff81dd8a50 T cayman_dma_vm_write_pages +ffffffff81dd8bc0 T cayman_dma_vm_set_pages +ffffffff81dd8d30 T cayman_dma_vm_pad_ib +ffffffff81dd8d80 T cayman_dma_vm_flush +ffffffff81dda000 T ni_get_pi +ffffffff81dda030 T ni_get_ps +ffffffff81dda060 T ni_dpm_vblank_too_short +ffffffff81dda0e0 T ni_dpm_force_performance_level +ffffffff81dda250 T ni_copy_and_switch_arb_sets +ffffffff81dda520 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81dda5a0 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81dda620 T ni_dpm_setup_asic +ffffffff81dda880 T ni_update_current_ps +ffffffff81dda950 T ni_update_requested_ps +ffffffff81ddaa20 T ni_dpm_enable +ffffffff81ddba20 t ni_init_smc_table +ffffffff81ddc450 t ni_init_smc_spll_table +ffffffff81ddc5e0 t ni_init_arb_table_index +ffffffff81ddc690 t ni_populate_mc_reg_table +ffffffff81ddcbd0 t ni_initialize_smc_cac_tables +ffffffff81dddea0 t ni_initialize_hardware_cac_manager +ffffffff81dde4d0 t ni_populate_smc_tdp_limits +ffffffff81dde6b0 t ni_program_response_times +ffffffff81dde800 T ni_dpm_disable +ffffffff81ddec60 t ni_enable_power_containment +ffffffff81dded40 t ni_enable_smc_cac +ffffffff81ddeea0 T ni_dpm_pre_set_power_state +ffffffff81ddf510 T ni_dpm_set_power_state +ffffffff81ddf890 t ni_upload_sw_state +ffffffff81de0550 t ni_upload_mc_reg_table +ffffffff81de07d0 t ni_power_control_set_level +ffffffff81de08d0 T ni_dpm_post_set_power_state +ffffffff81de09c0 T ni_dpm_init +ffffffff81de1420 T ni_dpm_fini +ffffffff81de14f0 T ni_dpm_print_power_state +ffffffff81de15f0 T ni_dpm_debugfs_print_current_performance_level +ffffffff81de1630 T ni_dpm_get_current_sclk +ffffffff81de16a0 T ni_dpm_get_current_mclk +ffffffff81de1710 T ni_dpm_get_sclk +ffffffff81de1780 T ni_dpm_get_mclk +ffffffff81de17e0 t ni_do_program_memory_timing_parameters +ffffffff81de1940 t ni_calculate_sclk_params +ffffffff81de1b90 t ni_calculate_power_boost_limit +ffffffff81de1d30 t ni_populate_mclk_value +ffffffff81de3000 T r100_wait_for_vblank +ffffffff81de3190 T r100_page_flip +ffffffff81de34a0 T r100_page_flip_pending +ffffffff81de3570 T r100_pm_get_dynpm_state +ffffffff81de3790 T r100_pm_init_profile +ffffffff81de3870 T r100_pm_misc +ffffffff81de3d10 T r100_pm_prepare +ffffffff81de3dc0 T r100_pm_finish +ffffffff81de3e70 T r100_gui_idle +ffffffff81de3eb0 T r100_hpd_sense +ffffffff81de3f10 T r100_hpd_set_polarity +ffffffff81de3fd0 T r100_hpd_init +ffffffff81de4080 T r100_hpd_fini +ffffffff81de40f0 T r100_pci_gart_tlb_flush +ffffffff81de4120 T r100_pci_gart_init +ffffffff81de4200 T r100_pci_gart_get_page_entry +ffffffff81de4230 T r100_pci_gart_set_page +ffffffff81de4270 T r100_pci_gart_enable +ffffffff81de4360 T r100_pci_gart_disable +ffffffff81de43e0 T r100_pci_gart_fini +ffffffff81de4460 T r100_irq_set +ffffffff81de4540 T r100_irq_disable +ffffffff81de45c0 T r100_irq_process +ffffffff81de48f0 T r100_get_vblank_counter +ffffffff81de4940 T r100_fence_ring_emit +ffffffff81de4e10 T r100_semaphore_ring_emit +ffffffff81de4e40 T r100_copy_blit +ffffffff81de5570 T r100_ring_start +ffffffff81de5670 T r100_gfx_get_rptr +ffffffff81de56d0 T r100_gfx_get_wptr +ffffffff81de5710 T r100_gfx_set_wptr +ffffffff81de5750 T r100_cp_init +ffffffff81de5d70 T r100_debugfs_cp_init +ffffffff81de5da0 T r100_cp_fini +ffffffff81de5e70 T r100_cp_disable +ffffffff81de5fd0 T r100_gui_wait_for_idle +ffffffff81de60c0 T r100_reloc_pitch_offset +ffffffff81de6230 T r100_packet3_load_vbpntr +ffffffff81de6520 T r100_cs_parse_packet0 +ffffffff81de6630 T r100_cs_packet_parse_vline +ffffffff81de6860 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81de68e0 T r100_cs_parse +ffffffff81de7bd0 T r100_cs_track_clear +ffffffff81de7f60 T r100_cs_track_check +ffffffff81de8820 T r100_mc_wait_for_idle +ffffffff81de88c0 T r100_gpu_is_lockup +ffffffff81de8930 T r100_enable_bm +ffffffff81de8980 T r100_bm_disable +ffffffff81de8a40 T r100_asic_reset +ffffffff81de8dd0 T r100_mc_stop +ffffffff81de8f90 T r100_mc_resume +ffffffff81de9050 T r100_set_common_regs +ffffffff81de9200 T r100_vram_init_sizes +ffffffff81de9410 T r100_vga_set_state +ffffffff81de9470 T r100_pll_errata_after_index +ffffffff81de94b0 T r100_pll_rreg +ffffffff81de9620 T r100_pll_wreg +ffffffff81de9770 T r100_debugfs_rbbm_init +ffffffff81de97a0 T r100_debugfs_mc_info_init +ffffffff81de97d0 T r100_set_surface_reg +ffffffff81de9a20 T r100_clear_surface_reg +ffffffff81de9ae0 T r100_bandwidth_update +ffffffff81dea550 T r100_ring_test +ffffffff81dea880 T r100_ring_ib_execute +ffffffff81deab00 T r100_ib_test +ffffffff81deaec0 T r100_vga_render_disable +ffffffff81deaf20 T r100_resume +ffffffff81deb160 t r100_startup +ffffffff81deb720 T r100_suspend +ffffffff81deb820 T r100_fini +ffffffff81deb990 T r100_restore_sanity +ffffffff81deba30 T r100_init +ffffffff81debf70 t r100_set_safe_registers +ffffffff81debff0 T r100_mm_rreg_slow +ffffffff81dec080 T r100_mm_wreg_slow +ffffffff81dec0f0 T r100_io_rreg +ffffffff81dec1a0 T r100_io_wreg +ffffffff81dec220 t r100_get_vtx_size +ffffffff81dec310 t r100_cs_track_texture_print +ffffffff81ded000 T r200_copy_dma +ffffffff81ded4e0 T r200_packet0_check +ffffffff81dee340 t r200_get_vtx_size_0 +ffffffff81dee500 t r200_get_vtx_size_1 +ffffffff81dee590 T r200_set_safe_registers +ffffffff81def000 T rv370_pcie_rreg +ffffffff81def090 T rv370_pcie_wreg +ffffffff81def100 T rv370_pcie_gart_tlb_flush +ffffffff81def390 T rv370_pcie_gart_get_page_entry +ffffffff81def3f0 T rv370_pcie_gart_set_page +ffffffff81def430 T rv370_pcie_gart_init +ffffffff81def510 T rv370_pcie_gart_enable +ffffffff81def950 T rv370_pcie_gart_disable +ffffffff81defb40 T rv370_pcie_gart_fini +ffffffff81defb80 T r300_fence_ring_emit +ffffffff81df0190 T r300_ring_start +ffffffff81df0c30 T r300_mc_wait_for_idle +ffffffff81df0cd0 T r300_asic_reset +ffffffff81df0f30 T r300_mc_init +ffffffff81df1000 T rv370_set_pcie_lanes +ffffffff81df1220 T rv370_get_pcie_lanes +ffffffff81df12e0 T r300_cs_parse +ffffffff81df16b0 t r300_packet0_check +ffffffff81df2610 T r300_set_reg_safe +ffffffff81df2650 T r300_mc_program +ffffffff81df2800 T r300_clock_startup +ffffffff81df2890 T r300_resume +ffffffff81df2ab0 t r300_startup +ffffffff81df2ea0 T r300_suspend +ffffffff81df2f50 T r300_fini +ffffffff81df30b0 T r300_init +ffffffff81df4000 T r420_pm_init_profile +ffffffff81df40f0 T r420_pipes_init +ffffffff81df42f0 T r420_mc_rreg +ffffffff81df4380 T r420_mc_wreg +ffffffff81df4400 T r420_resume +ffffffff81df4620 t r420_startup +ffffffff81df48b0 T r420_suspend +ffffffff81df4aa0 T r420_fini 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r600_pcie_gart_init +ffffffff81df8d30 T r600_mc_wait_for_idle +ffffffff81df8dd0 T rs780_mc_rreg +ffffffff81df8e80 T rs780_mc_wreg +ffffffff81df8f10 T r600_vram_scratch_init +ffffffff81df9030 t radeon_bo_reserve +ffffffff81df91d0 t radeon_bo_unreserve +ffffffff81df92e0 T r600_vram_scratch_fini +ffffffff81df9370 T r600_set_bios_scratch_engine_hung +ffffffff81df93c0 T r600_gpu_check_soft_reset +ffffffff81df9790 T r600_asic_reset +ffffffff81df9bc0 t r600_gpu_pci_config_reset +ffffffff81df9e20 T r600_gfx_is_lockup +ffffffff81df9ea0 T r6xx_remap_render_backend +ffffffff81dfa070 T r600_count_pipe_bits +ffffffff81dfa0e0 T r600_pciep_rreg +ffffffff81dfa170 T r600_pciep_wreg +ffffffff81dfa1e0 T r600_cp_stop +ffffffff81dfa260 T r600_init_microcode +ffffffff81dfa810 t request_firmware +ffffffff81dfa8c0 t release_firmware +ffffffff81dfa900 T r600_gfx_get_rptr +ffffffff81dfa960 T r600_gfx_get_wptr +ffffffff81dfa9a0 T r600_gfx_set_wptr +ffffffff81dfa9e0 T r600_cp_start +ffffffff81dfadb0 T r600_cp_resume +ffffffff81dfb1d0 T r600_ring_init +ffffffff81dfb290 T r600_cp_fini +ffffffff81dfb320 T r600_scratch_init +ffffffff81dfb390 T r600_ring_test +ffffffff81dfb6b0 T r600_fence_ring_emit +ffffffff81dfc020 T r600_semaphore_ring_emit +ffffffff81dfc240 T r600_copy_cpdma +ffffffff81dfc8b0 T r600_set_surface_reg +ffffffff81dfc8e0 T r600_clear_surface_reg +ffffffff81dfc910 T r600_vga_set_state +ffffffff81dfc970 T r600_resume +ffffffff81dfca20 t r600_startup +ffffffff81dfe930 T r600_suspend +ffffffff81dfeaf0 T r600_irq_suspend +ffffffff81dfebd0 t r600_pcie_gart_disable +ffffffff81dfedd0 T r600_init +ffffffff81dff6f0 T r600_ih_ring_init +ffffffff81dff760 T r600_irq_fini +ffffffff81dff8e0 t r600_pcie_gart_fini +ffffffff81dff920 T r600_fini +ffffffff81dffb70 T r600_ring_ib_execute +ffffffff81e00060 T r600_ib_test +ffffffff81e00370 T r600_ih_ring_alloc +ffffffff81e004c0 T r600_ih_ring_fini +ffffffff81e00570 T r600_rlc_stop +ffffffff81e00780 T r600_disable_interrupts +ffffffff81e00830 T r600_irq_init +ffffffff81e00cd0 t r600_disable_interrupt_state +ffffffff81e00fd0 T r600_irq_disable +ffffffff81e010a0 T r600_irq_set +ffffffff81e018a0 t r600_irq_ack +ffffffff81e01dd0 T r600_irq_process +ffffffff81e02b40 T r600_mmio_hdp_flush +ffffffff81e02bc0 T r600_set_pcie_lanes +ffffffff81e02d00 T r600_get_pcie_lanes +ffffffff81e02df0 T r600_get_gpu_clock_counter +ffffffff81e02ea0 t r600_cp_load_microcode +ffffffff81e03200 t r600_uvd_resume +ffffffff81e04000 T r600_fmt_is_valid_color +ffffffff81e04040 T r600_fmt_is_valid_texture +ffffffff81e04090 T r600_fmt_get_blocksize +ffffffff81e040d0 T r600_fmt_get_nblocksx +ffffffff81e04120 T r600_fmt_get_nblocksy +ffffffff81e04180 T r600_cs_common_vline_parse +ffffffff81e04470 T r600_mip_minify +ffffffff81e044d0 T r600_cs_parse +ffffffff81e06540 T r600_dma_cs_next_reloc +ffffffff81e065d0 T r600_dma_cs_parse +ffffffff81e06cb0 t r600_cs_track_check +ffffffff81e07e90 t r600_cs_check_reg +ffffffff81e08e70 t r600_is_safe_reg +ffffffff81e08f20 t r600_texture_size +ffffffff81e0a000 T r600_dma_get_rptr +ffffffff81e0a060 T r600_dma_get_wptr +ffffffff81e0a0a0 T r600_dma_set_wptr +ffffffff81e0a0e0 T r600_dma_stop +ffffffff81e0a170 T r600_dma_resume +ffffffff81e0a390 T r600_dma_fini +ffffffff81e0a410 T r600_dma_is_lockup +ffffffff81e0a490 T r600_dma_ring_test +ffffffff81e0a750 T r600_dma_fence_ring_emit +ffffffff81e0a960 T r600_dma_semaphore_ring_emit +ffffffff81e0aaa0 T r600_dma_ib_test +ffffffff81e0ad10 T r600_dma_ring_ib_execute +ffffffff81e0b0a0 T r600_copy_dma +ffffffff81e0c000 T r600_dpm_print_class_info +ffffffff81e0c340 T r600_dpm_print_cap_info +ffffffff81e0c3e0 T r600_dpm_print_ps_status +ffffffff81e0c4a0 T r600_dpm_get_vblank_time +ffffffff81e0c560 T r600_dpm_get_vrefresh +ffffffff81e0c5f0 T r600_calculate_u_and_p +ffffffff81e0c670 T r600_calculate_at +ffffffff81e0c720 T r600_gfx_clockgating_enable +ffffffff81e0c830 T r600_dynamicpm_enable +ffffffff81e0c880 T r600_enable_thermal_protection +ffffffff81e0c8e0 T r600_enable_acpi_pm +ffffffff81e0c930 T r600_enable_dynamic_pcie_gen2 +ffffffff81e0c980 T r600_dynamicpm_enabled +ffffffff81e0c9c0 T r600_enable_sclk_control +ffffffff81e0ca20 T r600_enable_mclk_control +ffffffff81e0ca80 T r600_enable_spll_bypass +ffffffff81e0cad0 T r600_wait_for_spll_change +ffffffff81e0cb60 T r600_set_bsp +ffffffff81e0cba0 T r600_set_at +ffffffff81e0cc00 T r600_set_tc +ffffffff81e0cc60 T r600_select_td +ffffffff81e0cd10 T r600_set_vrc +ffffffff81e0cd50 T r600_set_tpu +ffffffff81e0cdb0 T r600_set_tpc +ffffffff81e0ce10 T r600_set_sstu +ffffffff81e0ce70 T r600_set_sst +ffffffff81e0cec0 T r600_set_git +ffffffff81e0cf10 T r600_set_fctu +ffffffff81e0cf70 T r600_set_fct +ffffffff81e0cfc0 T r600_set_ctxcgtt3d_rphc +ffffffff81e0d020 T r600_set_ctxcgtt3d_rsdc +ffffffff81e0d080 T r600_set_vddc3d_oorsu +ffffffff81e0d0e0 T r600_set_vddc3d_oorphc +ffffffff81e0d140 T r600_set_vddc3d_oorsdc +ffffffff81e0d1a0 T r600_set_mpll_lock_time +ffffffff81e0d1f0 T r600_set_mpll_reset_time +ffffffff81e0d240 T r600_engine_clock_entry_enable +ffffffff81e0d340 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81e0d440 T r600_engine_clock_entry_enable_post_divider +ffffffff81e0d540 T r600_engine_clock_entry_set_post_divider +ffffffff81e0d610 T r600_engine_clock_entry_set_reference_divider +ffffffff81e0d6e0 T r600_engine_clock_entry_set_feedback_divider +ffffffff81e0d7b0 T r600_engine_clock_entry_set_step_time +ffffffff81e0d880 T r600_vid_rt_set_ssu +ffffffff81e0d8e0 T r600_vid_rt_set_vru +ffffffff81e0d940 T r600_vid_rt_set_vrt +ffffffff81e0d9a0 T r600_voltage_control_enable_pins +ffffffff81e0d9f0 T r600_voltage_control_program_voltages +ffffffff81e0da80 T r600_voltage_control_deactivate_static_control +ffffffff81e0db10 T r600_power_level_enable +ffffffff81e0db80 T r600_power_level_set_voltage_index +ffffffff81e0dbf0 T r600_power_level_set_mem_clock_index +ffffffff81e0dc50 T r600_power_level_set_eng_clock_index +ffffffff81e0dcc0 T r600_power_level_set_watermark_id +ffffffff81e0dd30 T r600_power_level_set_pcie_gen2 +ffffffff81e0dd90 T r600_power_level_get_current_index +ffffffff81e0ddd0 T r600_power_level_get_target_index +ffffffff81e0de10 T r600_power_level_set_enter_index +ffffffff81e0de70 T r600_wait_for_power_level_unequal +ffffffff81e0df70 T r600_wait_for_power_level +ffffffff81e0e070 T r600_start_dpm +ffffffff81e0e360 T r600_stop_dpm +ffffffff81e0e3b0 T r600_dpm_pre_set_power_state +ffffffff81e0e3e0 T r600_dpm_post_set_power_state +ffffffff81e0e410 T r600_is_uvd_state +ffffffff81e0e450 T r600_is_internal_thermal_sensor +ffffffff81e0e490 T r600_dpm_late_enable +ffffffff81e0e5a0 T r600_get_platform_caps +ffffffff81e0e640 T r600_parse_extended_power_table +ffffffff81e0f490 T r600_free_extended_power_table +ffffffff81e0f5f0 T r600_get_pcie_gen_support +ffffffff81e0f640 T r600_get_pcie_lane_support +ffffffff81e0f6a0 T r600_encode_pci_lane_width +ffffffff81e10000 T r600_audio_update_hdmi +ffffffff81e10180 t r600_audio_status +ffffffff81e102a0 T r600_hdmi_buffer_status_changed +ffffffff81e10350 T r600_hdmi_update_audio_settings +ffffffff81e107c0 T r600_audio_enable +ffffffff81e10840 T r600_audio_get_pin +ffffffff81e10870 T r600_hdmi_update_acr +ffffffff81e10c90 T r600_set_avi_packet +ffffffff81e10ed0 T r600_hdmi_audio_workaround +ffffffff81e10fa0 T r600_hdmi_audio_set_dto +ffffffff81e11060 T r600_set_vbi_packet +ffffffff81e11120 T r600_set_audio_packet +ffffffff81e11460 T r600_set_mute +ffffffff81e11570 T r600_hdmi_enable +ffffffff81e12000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81e12040 T radeon_acpi_pcie_notify_device_ready +ffffffff81e12170 T radeon_acpi_pcie_performance_request +ffffffff81e12570 T radeon_acpi_init +ffffffff81e12de0 t radeon_acpi_event +ffffffff81e13160 T radeon_acpi_fini +ffffffff81e14000 T radeon_agp_head_init +ffffffff81e14050 T radeon_agp_init +ffffffff81e140b0 T radeon_agp_resume +ffffffff81e14150 T radeon_agp_fini +ffffffff81e141a0 T radeon_agp_suspend +ffffffff81e15000 T radeon_agp_disable +ffffffff81e15130 T radeon_asic_init +ffffffff81e15900 t radeon_invalid_rreg +ffffffff81e15940 t radeon_invalid_wreg +ffffffff81e15990 t radeon_invalid_get_allowed_info_register +ffffffff81e16000 T radeon_atombios_i2c_init +ffffffff81e163b0 T radeon_atombios_lookup_gpio +ffffffff81e164c0 T radeon_get_atom_connector_info_from_object_table +ffffffff81e16e70 t radeon_lookup_i2c_gpio +ffffffff81e17160 t radeon_atom_apply_quirks +ffffffff81e17590 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81e17af0 T radeon_atom_get_clock_info +ffffffff81e17ef0 T radeon_atombios_sideport_present +ffffffff81e17fb0 T radeon_atombios_get_tmds_info +ffffffff81e18100 T radeon_atombios_get_ppll_ss_info +ffffffff81e18230 T radeon_atombios_get_asic_ss_info +ffffffff81e18510 t radeon_atombios_get_igp_ss_overrides +ffffffff81e18630 T radeon_atombios_get_lvds_info +ffffffff81e189d0 T radeon_atombios_get_primary_dac_info +ffffffff81e18aa0 T radeon_atom_get_tv_timings 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radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81e1ae10 T radeon_atom_get_voltage_evv +ffffffff81e1aed0 T radeon_atom_get_voltage_gpio_settings +ffffffff81e1aff0 T radeon_atom_is_voltage_gpio +ffffffff81e1b1a0 T radeon_atom_get_svi2_info +ffffffff81e1b290 T radeon_atom_get_max_voltage +ffffffff81e1b420 T radeon_atom_get_min_voltage +ffffffff81e1b580 T radeon_atom_get_voltage_step +ffffffff81e1b6a0 T radeon_atom_round_to_true_voltage +ffffffff81e1b820 T radeon_atom_get_voltage_table +ffffffff81e1bac0 T radeon_atom_get_memory_info +ffffffff81e1bc80 T radeon_atom_get_mclk_range_table +ffffffff81e1bed0 T radeon_atom_init_mc_reg_table +ffffffff81e1c160 T radeon_atom_initialize_bios_scratch_regs +ffffffff81e1c230 T radeon_save_bios_scratch_regs +ffffffff81e1c310 T radeon_restore_bios_scratch_regs +ffffffff81e1c3f0 T radeon_atom_output_lock +ffffffff81e1c480 T radeon_atombios_connected_scratch_regs +ffffffff81e1cce0 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81e1ce30 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81e1d060 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81e1d240 t radeon_atombios_add_pplib_thermal_controller +ffffffff81e1d6c0 t radeon_atombios_parse_pplib_clock_info +ffffffff81e1da80 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81e1e000 T radeon_audio_init +ffffffff81e1e200 t radeon_audio_enable +ffffffff81e1e360 T radeon_audio_endpoint_rreg +ffffffff81e1e3a0 T radeon_audio_endpoint_wreg +ffffffff81e1e3e0 T radeon_audio_get_pin +ffffffff81e1e430 T radeon_audio_detect +ffffffff81e1e5d0 T radeon_audio_fini +ffffffff81e1e660 T radeon_audio_mode_set +ffffffff81e1e6b0 T radeon_audio_dpms +ffffffff81e1e700 T radeon_audio_decode_dfs_div +ffffffff81e1e760 T radeon_audio_component_init +ffffffff81e1e7d0 T radeon_audio_component_fini +ffffffff81e1e820 t radeon_audio_hdmi_mode_set +ffffffff81e1ef80 t radeon_audio_write_speaker_allocation +ffffffff81e1f060 t radeon_audio_write_sad_regs +ffffffff81e1f160 t radeon_audio_set_avi_packet +ffffffff81e1f2c0 t radeon_audio_dp_mode_set +ffffffff81e1f470 t radeon_audio_rreg +ffffffff81e1f4c0 t radeon_audio_wreg +ffffffff81e20000 T radeon_benchmark +ffffffff81e20c80 t radeon_benchmark_move +ffffffff81e20ff0 t radeon_bo_reserve +ffffffff81e21190 t radeon_bo_unreserve +ffffffff81e212a0 t radeon_benchmark_do_move +ffffffff81e22000 T radeon_get_bios +ffffffff81e230b0 t igp_read_bios_from_vram +ffffffff81e23200 t radeon_read_bios +ffffffff81e24000 T radeon_legacy_get_engine_clock +ffffffff81e240f0 T radeon_legacy_get_memory_clock +ffffffff81e241e0 T radeon_get_clock_info +ffffffff81e247f0 T radeon_legacy_set_engine_clock +ffffffff81e24c30 T radeon_legacy_set_clock_gating +ffffffff81e27000 T radeon_combios_check_hardcoded_edid +ffffffff81e27120 t combios_get_table_offset +ffffffff81e27710 T radeon_bios_get_hardcoded_edid +ffffffff81e277b0 T radeon_combios_i2c_init +ffffffff81e27ea0 t combios_setup_i2c_bus +ffffffff81e28190 t radeon_combios_get_i2c_info_from_table +ffffffff81e283e0 T radeon_combios_get_clock_info +ffffffff81e285d0 T radeon_combios_sideport_present +ffffffff81e28650 T radeon_combios_get_primary_dac_info +ffffffff81e287a0 T radeon_combios_get_tv_info +ffffffff81e288b0 T radeon_combios_get_tv_dac_info +ffffffff81e28b70 T radeon_combios_get_lvds_info +ffffffff81e29220 T radeon_legacy_get_tmds_info_from_table +ffffffff81e292f0 T radeon_legacy_get_tmds_info_from_combios +ffffffff81e29520 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81e29760 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81e29ad0 T radeon_get_legacy_connector_info_from_table +ffffffff81e2c060 T radeon_get_legacy_connector_info_from_bios +ffffffff81e2cda0 T radeon_combios_get_power_modes +ffffffff81e2d4b0 T radeon_external_tmds_setup +ffffffff81e2d5a0 T radeon_combios_external_tmds_setup +ffffffff81e2db60 T radeon_combios_asic_init +ffffffff81e2e100 t combios_parse_mmio_table +ffffffff81e2e340 t combios_parse_pll_table +ffffffff81e2e6a0 T radeon_combios_initialize_bios_scratch_regs +ffffffff81e2e730 T radeon_combios_output_lock +ffffffff81e2e790 T radeon_combios_connected_scratch_regs +ffffffff81e2eb80 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81e2ec60 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81e2f000 T radeon_connector_hotplug +ffffffff81e2f140 T radeon_get_monitor_bpc +ffffffff81e2f610 T radeon_connector_edid +ffffffff81e2f6d0 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81e2f750 T radeon_connector_is_dp12_capable +ffffffff81e2f7f0 T radeon_add_atom_connector +ffffffff81e30940 T radeon_add_legacy_connector +ffffffff81e30ed0 t radeon_dp_detect +ffffffff81e31320 t radeon_dvi_force +ffffffff81e31370 t radeon_connector_set_property +ffffffff81e31c60 t radeon_connector_unregister +ffffffff81e31cd0 t radeon_connector_destroy +ffffffff81e31d60 t radeon_best_single_encoder +ffffffff81e31dd0 t radeon_connector_get_edid +ffffffff81e31f40 t radeon_dp_get_modes +ffffffff81e322d0 t radeon_dp_mode_valid +ffffffff81e324d0 t radeon_dvi_encoder +ffffffff81e32590 t radeon_fixup_lvds_native_mode +ffffffff81e32700 t radeon_add_common_modes +ffffffff81e32800 t radeon_fp_native_mode +ffffffff81e328f0 t radeon_lvds_set_property +ffffffff81e329f0 t radeon_vga_detect +ffffffff81e32ce0 t radeon_connector_analog_encoder_conflict_solve +ffffffff81e32f30 t radeon_vga_get_modes +ffffffff81e33020 t radeon_vga_mode_valid +ffffffff81e33080 t radeon_dvi_detect +ffffffff81e337a0 t radeon_dvi_mode_valid +ffffffff81e33940 t radeon_tv_detect +ffffffff81e33bc0 t radeon_tv_get_modes +ffffffff81e33cb0 t radeon_tv_mode_valid +ffffffff81e33d00 t radeon_lvds_detect +ffffffff81e33ec0 t radeon_lvds_get_modes +ffffffff81e34050 t radeon_lvds_mode_valid +ffffffff81e35000 T radeon_cs_parser_init +ffffffff81e354e0 T radeon_cs_ioctl +ffffffff81e35dd0 t radeon_cs_parser_fini +ffffffff81e35fb0 t radeon_cs_ib_vm_chunk +ffffffff81e36390 T radeon_cs_packet_parse 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radeon_suspend_kms +ffffffff81e3bcd0 T radeon_resume_kms +ffffffff81e3bfc0 T radeon_gpu_reset +ffffffff81e3d000 T radeon_crtc_load_lut +ffffffff81e3e030 T radeon_crtc_handle_vblank +ffffffff81e3e1d0 T radeon_get_crtc_scanoutpos +ffffffff81e3e7d0 T radeon_crtc_handle_flip +ffffffff81e3e920 T radeon_compute_pll_avivo +ffffffff81e3ee90 T radeon_compute_pll_legacy +ffffffff81e3f580 T radeon_framebuffer_init +ffffffff81e3f610 T radeon_update_display_priority +ffffffff81e3f670 T radeon_modeset_init +ffffffff81e402f0 T radeon_modeset_fini +ffffffff81e404b0 T radeon_crtc_scaling_mode_fixup +ffffffff81e40840 T radeon_get_crtc_scanout_position +ffffffff81e408b0 t radeon_user_framebuffer_create +ffffffff81e40ab0 t radeon_crtc_gamma_set +ffffffff81e40b00 t radeon_crtc_destroy +ffffffff81e40b50 t radeon_crtc_set_config +ffffffff81e40c30 t radeon_crtc_page_flip_target +ffffffff81e411a0 t radeon_flip_work_func +ffffffff81e41440 t radeon_unpin_work_func +ffffffff81e414e0 t radeon_bo_reserve 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radeon_get_external_encoder +ffffffff81e455d0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81e45670 T radeon_panel_mode_fixup +ffffffff81e45840 T radeon_dig_monitor_is_duallink +ffffffff81e45970 T radeon_encoder_is_digital +ffffffff81e46000 T radeon_fbdev_setup +ffffffff81e46180 T radeon_fbdev_set_suspend +ffffffff81e461d0 T radeon_fbdev_robj_is_fb +ffffffff81e46250 T radeondrm_burner +ffffffff81e462e0 T radeondrm_burner_cb +ffffffff81e46310 t radeon_fbdev_fb_helper_fb_probe +ffffffff81e46980 t radeon_bo_reserve +ffffffff81e46b20 t radeon_bo_unreserve +ffffffff81e46c30 t radeon_fbdev_client_unregister +ffffffff81e46ca0 t radeon_fbdev_client_restore +ffffffff81e46cf0 t radeon_fbdev_client_hotplug +ffffffff81e47000 T radeon_fence_emit +ffffffff81e47140 T radeon_fence_process +ffffffff81e47220 t radeon_fence_activity +ffffffff81e474b0 T radeon_fence_signaled +ffffffff81e47530 t radeon_fence_seq_signaled +ffffffff81e47650 T radeon_fence_wait_timeout +ffffffff81e47790 t radeon_fence_wait_seq_timeout +ffffffff81e47c70 T radeon_fence_wait +ffffffff81e47dc0 T radeon_fence_wait_any +ffffffff81e47f10 T radeon_fence_wait_next +ffffffff81e47fe0 T radeon_fence_wait_empty +ffffffff81e48100 T radeon_fence_ref +ffffffff81e48150 T radeon_fence_unref +ffffffff81e48190 T radeon_fence_count_emitted +ffffffff81e482b0 T radeon_fence_need_sync +ffffffff81e48310 T radeon_fence_note_sync +ffffffff81e484e0 T radeon_fence_driver_start_ring +ffffffff81e486f0 T radeon_fence_driver_init +ffffffff81e48840 T radeon_debugfs_fence_init +ffffffff81e48870 T radeon_fence_driver_fini +ffffffff81e48af0 T radeon_fence_driver_force_completion +ffffffff81e48c00 t radeon_fence_get_driver_name +ffffffff81e48c30 t radeon_fence_get_timeline_name +ffffffff81e48cd0 t radeon_fence_enable_signaling +ffffffff81e48f40 t radeon_fence_is_signaled +ffffffff81e490c0 t radeon_fence_default_wait +ffffffff81e49260 t radeon_fence_any_seq_signaled +ffffffff81e493e0 t radeon_fence_check_lockup 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radeon_add_legacy_encoder +ffffffff81e57aa0 t radeon_legacy_backlight_update_status +ffffffff81e57b50 t radeon_lvds_enc_destroy +ffffffff81e57c00 t radeon_legacy_lvds_dpms +ffffffff81e57c60 t radeon_legacy_mode_fixup +ffffffff81e57ce0 t radeon_legacy_lvds_prepare +ffffffff81e57d80 t radeon_legacy_lvds_commit +ffffffff81e57e10 t radeon_legacy_lvds_mode_set +ffffffff81e58040 t radeon_legacy_encoder_disable +ffffffff81e580a0 t radeon_legacy_tmds_int_dpms +ffffffff81e58170 t radeon_legacy_tmds_int_prepare +ffffffff81e58250 t radeon_legacy_tmds_int_commit +ffffffff81e58340 t radeon_legacy_tmds_int_mode_set +ffffffff81e585b0 t radeon_legacy_primary_dac_dpms +ffffffff81e586f0 t radeon_legacy_primary_dac_prepare +ffffffff81e58750 t radeon_legacy_primary_dac_commit +ffffffff81e587b0 t radeon_legacy_primary_dac_mode_set +ffffffff81e58940 t radeon_legacy_primary_dac_detect +ffffffff81e58b50 t radeon_legacy_tv_dac_dpms +ffffffff81e58d60 t radeon_legacy_tv_dac_prepare +ffffffff81e58dc0 t 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radeon_bo_pin +ffffffff81e5dbe0 T radeon_bo_unpin +ffffffff81e5dc60 T radeon_bo_evict_vram +ffffffff81e5dcc0 T radeon_bo_force_delete +ffffffff81e5de60 T radeon_bo_init +ffffffff81e5df70 T radeon_bo_fini +ffffffff81e5dfb0 T radeon_bo_list_validate +ffffffff81e5e300 T radeon_bo_get_surface_reg +ffffffff81e5e590 T radeon_bo_set_tiling_flags +ffffffff81e5e900 T radeon_bo_get_tiling_flags +ffffffff81e5e950 T radeon_bo_move_notify +ffffffff81e5ea20 T radeon_bo_fault_reserve_notify +ffffffff81e5ece0 t ttm_bo_move_to_lru_tail_unlocked +ffffffff81e5ed30 T radeon_bo_fence +ffffffff81e5f000 T radeon_pm_get_type_index +ffffffff81e5f080 T radeon_pm_acpi_event_handler +ffffffff81e5f190 t radeon_pm_update_profile +ffffffff81e5f2b0 t radeon_pm_set_clocks +ffffffff81e5fda0 T radeon_dpm_enable_uvd +ffffffff81e5fe80 T radeon_pm_compute_clocks +ffffffff81e609b0 T radeon_dpm_enable_vce +ffffffff81e60a30 T radeon_pm_suspend +ffffffff81e60b50 T radeon_pm_resume +ffffffff81e60e80 T radeon_pm_init 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radeon_ring_init +ffffffff81e63c70 t radeon_bo_reserve +ffffffff81e63e10 t radeon_bo_unreserve +ffffffff81e63f20 T radeon_ring_fini +ffffffff81e64000 T radeon_sa_bo_manager_init +ffffffff81e640e0 T radeon_sa_bo_manager_fini +ffffffff81e64120 T radeon_sa_bo_manager_start +ffffffff81e642a0 t radeon_bo_reserve +ffffffff81e64440 t radeon_bo_unreserve +ffffffff81e64550 T radeon_sa_bo_manager_suspend +ffffffff81e64630 T radeon_sa_bo_new +ffffffff81e646a0 T radeon_sa_bo_free +ffffffff81e65000 T radeon_semaphore_create +ffffffff81e65100 T radeon_semaphore_emit_signal +ffffffff81e65190 T radeon_semaphore_emit_wait +ffffffff81e65220 T radeon_semaphore_free +ffffffff81e66000 T radeon_sync_create +ffffffff81e66090 T radeon_sync_fence +ffffffff81e66140 T radeon_sync_resv +ffffffff81e662a0 T radeon_sync_rings +ffffffff81e664c0 T radeon_sync_free +ffffffff81e67000 T radeon_test_moves +ffffffff81e67080 t radeon_do_test_moves +ffffffff81e677e0 T radeon_test_ring_sync +ffffffff81e67b90 t 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rv515_mc_stop +ffffffff81e814b0 T rv515_mc_resume +ffffffff81e81b10 T rv515_clock_startup +ffffffff81e81c00 T rv515_resume +ffffffff81e81ed0 t rv515_startup +ffffffff81e824a0 T rv515_suspend +ffffffff81e82530 T rv515_set_safe_registers +ffffffff81e82570 T rv515_fini +ffffffff81e82680 T rv515_init +ffffffff81e82a60 T atom_rv515_force_tv_scaler +ffffffff81e868d0 T rv515_bandwidth_avivo_update +ffffffff81e86ab0 t rv515_crtc_bandwidth_compute +ffffffff81e86dd0 t rv515_compute_mode_priority +ffffffff81e872a0 T rv515_bandwidth_update +ffffffff81e88000 T rv6xx_dpm_enable +ffffffff81e88a30 t rv6xx_calculate_stepping_parameters +ffffffff81e88c10 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81e89250 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81e89340 t rv6xx_enable_dynamic_pcie_gen2 +ffffffff81e89570 T rv6xx_dpm_disable +ffffffff81e89830 T rv6xx_dpm_set_power_state +ffffffff81e8a470 T rv6xx_setup_asic +ffffffff81e8a600 T rv6xx_dpm_display_configuration_changed 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rv770_enable_backbias +ffffffff81e94780 T rv770_setup_bsp +ffffffff81e94880 T rv770_program_git +ffffffff81e948d0 T rv770_program_tp +ffffffff81e94950 T rv770_program_tpp +ffffffff81e94990 T rv770_program_sstp +ffffffff81e949d0 T rv770_program_engine_speed_parameters +ffffffff81e94a20 T rv770_program_vc +ffffffff81e94a70 T rv770_clear_vc +ffffffff81e94ab0 T rv770_upload_firmware +ffffffff81e94b00 T rv770_populate_initial_mvdd_value +ffffffff81e94b50 T rv770_get_memory_module_index +ffffffff81e94b90 T rv770_enable_voltage_control +ffffffff81e94be0 T rv770_halt_smc +ffffffff81e94c50 T rv770_resume_smc +ffffffff81e94ca0 T rv770_set_sw_state +ffffffff81e94d00 T rv770_set_boot_state +ffffffff81e94d50 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81e94dc0 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81e94e30 T rv770_restrict_performance_levels_before_switch +ffffffff81e94eb0 T rv770_dpm_force_performance_level +ffffffff81e94f90 T r7xx_start_smc +ffffffff81e94fc0 T r7xx_stop_smc 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si_set_power_state_conditionally_enable_ulv +ffffffff81eb4590 t si_power_control_set_level +ffffffff81eb4780 T si_dpm_post_set_power_state +ffffffff81eb47c0 T si_dpm_display_configuration_changed +ffffffff81eb48a0 T si_dpm_init +ffffffff81eb6420 T si_dpm_fini +ffffffff81eb64f0 T si_dpm_debugfs_print_current_performance_level +ffffffff81eb6550 T si_dpm_get_current_sclk +ffffffff81eb65d0 T si_dpm_get_current_mclk +ffffffff81eb6650 t si_do_program_memory_timing_parameters +ffffffff81eb6800 t si_populate_mvdd_value +ffffffff81eb6890 t si_convert_power_level_to_smc +ffffffff81eb7190 t si_calculate_sclk_params +ffffffff81eb73d0 t si_program_cac_config_registers +ffffffff81eb8000 T si_copy_bytes_to_smc +ffffffff81eb8260 T si_start_smc +ffffffff81eb82a0 T si_reset_smc +ffffffff81eb82f0 T si_program_jump_on_start +ffffffff81eb8320 T si_stop_smc_clock +ffffffff81eb8360 T si_start_smc_clock +ffffffff81eb83a0 T si_is_smc_running +ffffffff81eb8410 T si_send_msg_to_smc +ffffffff81eb8500 T si_wait_for_smc_inactive +ffffffff81eb85c0 T si_load_smc_ucode +ffffffff81eb8780 T si_read_smc_sram_dword +ffffffff81eb8870 T si_write_smc_sram_dword +ffffffff81eb9000 T sumo_get_pi +ffffffff81eb9030 T sumo_gfx_clockgating_initialize +ffffffff81eb9130 T sumo_program_vc +ffffffff81eb9170 T sumo_clear_vc +ffffffff81eb91b0 T sumo_program_sstp +ffffffff81eb9240 T sumo_take_smu_control +ffffffff81eb9270 T sumo_get_sleep_divider_from_id +ffffffff81eb92a0 T sumo_get_sleep_divider_id_from_clock +ffffffff81eb9350 T sumo_dpm_enable +ffffffff81eb9a40 T sumo_dpm_late_enable +ffffffff81eba110 T sumo_dpm_disable +ffffffff81eba480 T sumo_dpm_pre_set_power_state +ffffffff81eba970 T sumo_dpm_set_power_state +ffffffff81ebb4d0 T sumo_dpm_post_set_power_state +ffffffff81ebb570 T sumo_dpm_setup_asic +ffffffff81ebb690 T sumo_dpm_display_configuration_changed +ffffffff81ebb6c0 T sumo_convert_vid2_to_vid7 +ffffffff81ebb710 T sumo_construct_sclk_voltage_mapping_table +ffffffff81ebb7d0 T sumo_construct_vid_mapping_table +ffffffff81ebb960 T sumo_dpm_init +ffffffff81ebc260 T sumo_dpm_print_power_state +ffffffff81ebc390 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81ebc3c0 T sumo_dpm_get_current_sclk +ffffffff81ebc430 T sumo_dpm_get_current_mclk +ffffffff81ebc460 T sumo_dpm_get_current_vddc +ffffffff81ebc530 T sumo_dpm_fini +ffffffff81ebc5d0 T sumo_dpm_get_sclk +ffffffff81ebc620 T sumo_dpm_get_mclk +ffffffff81ebc650 T sumo_dpm_force_performance_level +ffffffff81ebcad0 t sumo_power_level_enable +ffffffff81ebcd20 t sumo_program_power_level +ffffffff81ebe000 T sumo_initialize_m3_arb +ffffffff81ebe3c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81ebe470 t sumo_send_msg_to_smu +ffffffff81ebe640 T sumo_smu_pg_init +ffffffff81ebe660 T sumo_enable_boost_timer +ffffffff81ebe7e0 T sumo_set_tdp_limit +ffffffff81ebe860 T sumo_boost_state_enable +ffffffff81ebe8b0 T sumo_get_running_fw_version +ffffffff81ebf000 T trinity_dpm_enable_bapm +ffffffff81ebf090 T trinity_dpm_enable +ffffffff81ebf690 T trinity_dpm_late_enable +ffffffff81ebfcc0 T trinity_dpm_disable +ffffffff81ec0160 T trinity_dpm_force_performance_level +ffffffff81ec0230 T trinity_dpm_pre_set_power_state +ffffffff81ec0810 T trinity_dpm_set_power_state +ffffffff81ec0e60 T trinity_dpm_post_set_power_state +ffffffff81ec0f00 T trinity_dpm_setup_asic +ffffffff81ec0f80 T trinity_dpm_display_configuration_changed +ffffffff81ec1010 T trinity_dpm_init +ffffffff81ec1970 T trinity_dpm_print_power_state +ffffffff81ec1ac0 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81ec1b50 T trinity_dpm_get_current_sclk +ffffffff81ec1bb0 T trinity_dpm_get_current_mclk +ffffffff81ec1be0 T trinity_dpm_fini +ffffffff81ec1ca0 T trinity_dpm_get_sclk +ffffffff81ec1cf0 T trinity_dpm_get_mclk +ffffffff81ec1d20 t trinity_program_power_level +ffffffff81ec3000 T trinity_dpm_bapm_enable +ffffffff81ec3170 T trinity_dpm_config +ffffffff81ec3270 T trinity_dpm_force_state +ffffffff81ec3370 T trinity_dpm_n_levels_disabled +ffffffff81ec3470 T trinity_uvd_dpm_config +ffffffff81ec3550 T trinity_dpm_no_forced_level +ffffffff81ec3630 T trinity_dce_enable_voltage_adjustment +ffffffff81ec37a0 T trinity_gfx_dynamic_mgpg_config +ffffffff81ec3880 T trinity_acquire_mutex +ffffffff81ec3920 T trinity_release_mutex +ffffffff81ec4000 T uvd_v1_0_get_rptr +ffffffff81ec4040 T uvd_v1_0_get_wptr +ffffffff81ec4080 T uvd_v1_0_set_wptr +ffffffff81ec40c0 T uvd_v1_0_fence_emit +ffffffff81ec4500 T uvd_v1_0_resume +ffffffff81ec4660 T uvd_v1_0_init +ffffffff81ec4c60 T uvd_v1_0_start +ffffffff81ec5600 T uvd_v1_0_fini +ffffffff81ec57b0 T uvd_v1_0_stop +ffffffff81ec5950 T uvd_v1_0_ring_test +ffffffff81ec5b50 T uvd_v1_0_semaphore_emit +ffffffff81ec5b80 T uvd_v1_0_ib_execute +ffffffff81ec5d30 T uvd_v1_0_ib_test +ffffffff81ec6000 T uvd_v2_2_fence_emit +ffffffff81ec64d0 T uvd_v2_2_semaphore_emit +ffffffff81ec6700 T uvd_v2_2_resume +ffffffff81ec7000 T uvd_v3_1_semaphore_emit +ffffffff81ec8000 T uvd_v4_2_resume +ffffffff81ec9000 T vce_v1_0_get_rptr +ffffffff81ec9090 T vce_v1_0_get_wptr +ffffffff81ec9120 T vce_v1_0_set_wptr +ffffffff81ec91b0 T vce_v1_0_enable_mgcg +ffffffff81ec94b0 T vce_v1_0_load_fw +ffffffff81ec9680 T vce_v1_0_bo_size +ffffffff81ec96f0 T vce_v1_0_resume +ffffffff81eca220 T vce_v1_0_start +ffffffff81ecab40 T vce_v1_0_init +ffffffff81ecb000 T vce_v2_0_enable_mgcg +ffffffff81ecb070 t vce_v2_0_set_dyn_cg +ffffffff81ecb280 T vce_v2_0_bo_size +ffffffff81ecb2f0 T vce_v2_0_resume +ffffffff81ecc000 T aldebaran_reset_init +ffffffff81ecc0e0 t aldebaran_async_reset +ffffffff81ecc140 t aldebaran_get_reset_handler +ffffffff81ecc1e0 T aldebaran_reset_fini +ffffffff81ecc240 t aldebaran_mode2_prepare_hwcontext +ffffffff81ecc380 t aldebaran_mode2_perform_reset +ffffffff81ecc590 t aldebaran_mode2_restore_hwcontext +ffffffff81eccc20 t aldebaran_mode2_reset +ffffffff81ecd000 T aldebaran_reg_base_init +ffffffff81ece000 T amdgpu_acpi_is_pcie_performance_request_supported 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amdgpu_amdkfd_get_cu_info +ffffffff81ed20f0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81ed2240 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81ed22c0 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81ed2360 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81ed24e0 T amdgpu_amdkfd_submit_ib +ffffffff81ed2680 T amdgpu_amdkfd_set_compute_idle +ffffffff81ed26d0 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81ed2710 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81ed2850 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81ed2890 T amdgpu_amdkfd_have_atomics_support +ffffffff81ed28c0 T amdgpu_amdkfd_debug_mem_fence +ffffffff81ed28e0 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81ed28f0 T amdgpu_amdkfd_send_close_event_drain_irq +ffffffff81ed2910 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81ed2960 T amdgpu_amdkfd_check_and_lock_kfd +ffffffff81ed2990 T amdgpu_amdkfd_unlock_kfd +ffffffff81ed29c0 T amdgpu_amdkfd_unmap_hiq +ffffffff81ed3000 T amdgpu_atom_execute_table +ffffffff81ed30c0 t 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gfx_v10_0_ring_emit_hdp_flush +ffffffff81fa5950 t gfx_v10_0_ring_emit_gds_switch +ffffffff81fa5a50 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81fa5ca0 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81fa5d60 t gfx_v10_0_ring_emit_sb +ffffffff81fa5e50 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81fa6380 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81fa6490 t gfx_v10_0_ring_soft_recovery +ffffffff81fa6540 t gfx_v10_0_ring_preempt_ib +ffffffff81fa66f0 t gfx_v10_0_emit_mem_sync +ffffffff81fa6a60 t gfx_v10_0_write_data_to_reg +ffffffff81fa6c90 t gfx_v10_0_set_eop_interrupt_state +ffffffff81fa6d90 t gfx_v10_0_eop_irq +ffffffff81fa6f70 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81fa7130 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81fa7310 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81fa7680 t gfx_v10_0_kiq_irq +ffffffff81fa7710 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81fa7860 t gfx_v10_0_priv_reg_irq +ffffffff81fa78d0 t gfx_v10_0_handle_priv_fault +ffffffff81fa7a40 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81fa7b90 t gfx_v10_0_priv_inst_irq +ffffffff81fa7c00 t gfx_v10_0_is_rlc_enabled +ffffffff81fa7ca0 t gfx_v10_0_set_safe_mode +ffffffff81fa7fa0 t gfx_v10_0_unset_safe_mode +ffffffff81fa8050 t gfx_v10_0_rlc_init +ffffffff81fa8070 t gfx_v10_0_get_csb_size +ffffffff81fa80a0 t gfx_v10_0_get_csb_buffer +ffffffff81fa8210 t gfx_v10_0_rlc_resume +ffffffff81fa8dd0 t gfx_v10_0_rlc_stop +ffffffff81fa8eb0 t gfx_v10_0_rlc_reset +ffffffff81fa90a0 t gfx_v10_0_rlc_start +ffffffff81fa9290 t gfx_v10_0_update_spm_vmid +ffffffff81fa92e0 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81fa9d20 t gfx_v10_0_init_csb +ffffffff81faa040 t gfx_v10_0_update_spm_vmid_internal +ffffffff81faa130 t gfx_v10_0_rlc_backdoor_autoload_config_mec_cache +ffffffff81faa450 t gfx_v10_0_is_rlcg_access_range +ffffffff81faa480 t gfx_v10_0_gfx_mqd_init +ffffffff81faa8c0 t gfx_v10_0_compute_mqd_init +ffffffff81faadd0 t gfx_v10_0_mec_init +ffffffff81fab060 t gfx_v10_0_compute_ring_init +ffffffff81fab1c0 t gfx_v10_0_rlc_backdoor_autoload_buffer_init +ffffffff81fab460 t gfx_v10_0_gpu_early_init +ffffffff81fab6d0 t amdgpu_bo_unreserve +ffffffff81fab7e0 t gfx_v10_0_cp_resume +ffffffff81fae7a0 t gfx_v10_3_get_disabled_sa +ffffffff81fae8d0 t gfx_v10_0_get_rb_active_bitmap +ffffffff81faea10 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81faeb30 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81faec40 t gfx_v10_0_cp_gfx_enable +ffffffff81faeee0 t gfx_v10_0_cp_compute_enable +ffffffff81faf0a0 t amdgpu_bo_reserve +ffffffff81faf240 t gfx_v10_0_kiq_init_register +ffffffff81fb0330 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81fb0430 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81fb0760 t gfx_v10_0_cp_gfx_start +ffffffff81fb1250 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81fb15e0 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81fb1de0 t gfx_v10_0_update_3d_clock_gating +ffffffff81fb2210 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81fb2640 t gfx_v10_cntl_pg +ffffffff81fb3000 t gfx_v11_0_early_init +ffffffff81fb3870 t gfx_v11_0_late_init +ffffffff81fb38e0 t gfx_v11_0_sw_init +ffffffff81fb3ee0 t gfx_v11_0_sw_fini +ffffffff81fb4190 t gfx_v11_0_hw_init +ffffffff81fb8d20 t gfx_v11_0_hw_fini +ffffffff81fb8e80 t gfx_v11_0_suspend +ffffffff81fb8ec0 t gfx_v11_0_resume +ffffffff81fb8ed0 t gfx_v11_0_is_idle +ffffffff81fb8f70 t gfx_v11_0_wait_for_idle +ffffffff81fb9080 t gfx_v11_0_check_soft_reset +ffffffff81fb91c0 t gfx_v11_0_soft_reset +ffffffff81fba090 t gfx_v11_0_post_soft_reset +ffffffff81fba0a0 t gfx_v11_0_set_clockgating_state +ffffffff81fbae00 t gfx_v11_0_set_powergating_state +ffffffff81fbaeb0 t gfx_v11_0_get_clockgating_state +ffffffff81fbb0a0 t gfx_v11_0_get_gpu_clock_counter +ffffffff81fbb490 t gfx_v11_0_select_se_sh +ffffffff81fbb530 t gfx_v11_0_read_wave_data +ffffffff81fbb800 t gfx_v11_0_read_wave_vgprs +ffffffff81fbb830 t gfx_v11_0_read_wave_sgprs +ffffffff81fbb8b0 t gfx_v11_0_select_me_pipe_q +ffffffff81fbb8d0 t gfx_v11_0_update_perf_clk +ffffffff81fbba10 t gfx_v11_0_get_gfx_shadow_info +ffffffff81fbba80 t wave_read_ind +ffffffff81fbbb80 t wave_read_regs +ffffffff81fbbd00 t gfx11_kiq_set_resources +ffffffff81fbc060 t gfx11_kiq_map_queues +ffffffff81fbc440 t gfx11_kiq_unmap_queues +ffffffff81fbc880 t gfx11_kiq_query_status +ffffffff81fbcba0 t gfx11_kiq_invalidate_tlbs +ffffffff81fbccd0 t gfx_v11_0_ring_get_rptr_compute +ffffffff81fbcd00 t gfx_v11_0_ring_get_wptr_compute +ffffffff81fbcd70 t gfx_v11_0_ring_set_wptr_compute +ffffffff81fbced0 t gfx_v11_0_ring_emit_ib_compute +ffffffff81fbd250 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81fbd6d0 t gfx_v11_0_ring_test_ring +ffffffff81fbd9a0 t gfx_v11_0_ring_test_ib +ffffffff81fbdca0 t gfx_v11_0_ring_emit_rreg +ffffffff81fbdf60 t gfx_v11_0_ring_emit_wreg +ffffffff81fbe1c0 t gfx_v11_0_ring_emit_reg_wait +ffffffff81fbe220 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81fbe290 t gfx_v11_0_wait_reg_mem +ffffffff81fbe5f0 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81fbe620 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81fbe740 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81fbe980 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81fbf080 t gfx_v11_0_ring_emit_fence +ffffffff81fbf490 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81fbf500 t gfx_v11_0_ring_emit_vm_flush +ffffffff81fbf6f0 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81fbf7e0 t gfx_v11_0_ring_emit_gds_switch +ffffffff81fbf8e0 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81fbfb30 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81fbfbf0 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81fbfd70 t gfx_v11_0_ring_emit_gfx_shadow +ffffffff81fc0180 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81fc0290 t gfx_v11_0_ring_soft_recovery +ffffffff81fc0340 t gfx_v11_0_ring_preempt_ib +ffffffff81fc04f0 t gfx_v11_0_emit_mem_sync +ffffffff81fc0860 t gfx_v11_0_write_data_to_reg +ffffffff81fc0a90 t gfx_v11_0_set_eop_interrupt_state +ffffffff81fc0b30 t gfx_v11_0_eop_irq +ffffffff81fc0d10 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81fc0ed0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81fc1080 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81fc11d0 t gfx_v11_0_priv_reg_irq +ffffffff81fc1240 t gfx_v11_0_handle_priv_fault +ffffffff81fc13b0 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81fc1500 t gfx_v11_0_priv_inst_irq +ffffffff81fc1570 t gfx_v11_0_rlc_gc_fed_irq +ffffffff81fc15c0 t gfx_v11_0_is_rlc_enabled +ffffffff81fc1660 t gfx_v11_0_set_safe_mode +ffffffff81fc17e0 t gfx_v11_0_unset_safe_mode +ffffffff81fc1850 t gfx_v11_0_rlc_init +ffffffff81fc18d0 t gfx_v11_0_get_csb_size +ffffffff81fc1900 t gfx_v11_0_get_csb_buffer +ffffffff81fc1a70 t gfx_v11_0_rlc_resume +ffffffff81fc2920 t gfx_v11_0_rlc_stop +ffffffff81fc2a00 t gfx_v11_0_rlc_reset +ffffffff81fc2bf0 t gfx_v11_0_rlc_start +ffffffff81fc2de0 t gfx_v11_0_update_spm_vmid +ffffffff81fc2f00 t gfx_v11_0_init_csb +ffffffff81fc30c0 t gfx_v11_0_gfx_mqd_init +ffffffff81fc34f0 t gfx_v11_0_compute_mqd_init +ffffffff81fc3a90 t gfx_v11_0_mec_init +ffffffff81fc3c20 t gfx_v11_0_compute_ring_init +ffffffff81fc3d80 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff81fc3f80 t gfx_v11_0_gpu_early_init +ffffffff81fc4050 t amdgpu_bo_unreserve +ffffffff81fc4160 t gfx_v11_0_disable_gpa_mode +ffffffff81fc4320 t gfx_v11_0_cp_resume +ffffffff81fc8a80 t gfx_v11_0_config_me_cache +ffffffff81fc8ea0 t gfx_v11_0_config_pfp_cache +ffffffff81fc92c0 t gfx_v11_0_config_mec_cache +ffffffff81fc96e0 t gfx_v11_0_get_sa_active_bitmap +ffffffff81fc9810 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81fc9920 t gfx_v11_0_cp_compute_enable +ffffffff81fc9b20 t gfx_v11_0_cp_gfx_enable +ffffffff81fc9d50 t amdgpu_bo_reserve +ffffffff81fc9ef0 t gfx_v11_0_kiq_init_register +ffffffff81fcaff0 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81fcb0e0 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81fcb2f0 t gfx_v11_0_cp_gfx_start +ffffffff81fcbc40 t gfx_v11_cntl_pg +ffffffff81fcc000 t gfx_v11_0_3_rlc_gc_fed_irq +ffffffff81fcc240 t gfx_v11_0_3_poison_consumption_handler +ffffffff81fcd000 t gfx_v8_0_early_init +ffffffff81fcd310 t gfx_v8_0_late_init +ffffffff81fcdad0 t gfx_v8_0_sw_init +ffffffff81fcdf30 t gfx_v8_0_sw_fini +ffffffff81fce140 t gfx_v8_0_hw_init +ffffffff81fd0720 t gfx_v8_0_hw_fini +ffffffff81fd0cb0 t gfx_v8_0_suspend +ffffffff81fd0cf0 t gfx_v8_0_resume +ffffffff81fd0d00 t gfx_v8_0_is_idle +ffffffff81fd0d80 t gfx_v8_0_wait_for_idle +ffffffff81fd0e50 t gfx_v8_0_check_soft_reset +ffffffff81fd0f50 t gfx_v8_0_pre_soft_reset +ffffffff81fd1110 t gfx_v8_0_soft_reset +ffffffff81fd1360 t gfx_v8_0_post_soft_reset +ffffffff81fd1550 t gfx_v8_0_set_clockgating_state +ffffffff81fd1830 t gfx_v8_0_set_powergating_state +ffffffff81fd1ce0 t gfx_v8_0_get_clockgating_state +ffffffff81fd1df0 t gfx_v8_0_get_gpu_clock_counter +ffffffff81fd1eb0 t gfx_v8_0_select_se_sh +ffffffff81fd1f10 t gfx_v8_0_read_wave_data +ffffffff81fd2510 t gfx_v8_0_read_wave_sgprs +ffffffff81fd25e0 t gfx_v8_0_select_me_pipe_q +ffffffff81fd2600 t gfx_v8_0_ring_get_rptr +ffffffff81fd2630 t gfx_v8_0_ring_get_wptr_compute +ffffffff81fd2660 t gfx_v8_0_ring_set_wptr_compute +ffffffff81fd26a0 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81fd2b10 t gfx_v8_0_ring_test_ring +ffffffff81fd2d50 t gfx_v8_0_ring_emit_rreg +ffffffff81fd3010 t gfx_v8_0_ring_emit_wreg +ffffffff81fd3270 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81fd32d0 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81fd3350 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81fd3910 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81fd3e60 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81fd4180 t gfx_v8_0_ring_emit_vm_flush +ffffffff81fd4580 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81fd48d0 t gfx_v8_0_ring_emit_gds_switch +ffffffff81fd5130 t gfx_v8_0_ring_test_ib +ffffffff81fd5320 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81fd5570 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81fd5620 t gfx_v8_ring_emit_sb +ffffffff81fd5710 t gfx_v8_ring_emit_cntxcntl +ffffffff81fd5d10 t gfx_v8_0_ring_soft_recovery +ffffffff81fd5d40 t gfx_v8_0_emit_mem_sync +ffffffff81fd5f60 t gfx_v8_0_ring_emit_ib_compute +ffffffff81fd62a0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81fd65d0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81fd68c0 t gfx_v8_0_emit_wave_limit +ffffffff81fd6a90 t gfx_v8_0_set_eop_interrupt_state +ffffffff81fd6d10 t gfx_v8_0_eop_irq +ffffffff81fd6e40 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81fd6ed0 t gfx_v8_0_priv_reg_irq +ffffffff81fd6ff0 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81fd7080 t gfx_v8_0_priv_inst_irq +ffffffff81fd71a0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81fd74e0 t gfx_v8_0_cp_ecc_error_irq +ffffffff81fd7530 t gfx_v8_0_set_sq_int_state +ffffffff81fd75c0 t gfx_v8_0_sq_irq +ffffffff81fd7640 t gfx_v8_0_parse_sq_irq +ffffffff81fd78c0 t gfx_v8_0_is_rlc_enabled +ffffffff81fd7910 t gfx_v8_0_set_safe_mode +ffffffff81fd7a40 t gfx_v8_0_unset_safe_mode +ffffffff81fd7b00 t gfx_v8_0_rlc_init +ffffffff81fd7bc0 t gfx_v8_0_get_csb_size +ffffffff81fd7bf0 t gfx_v8_0_get_csb_buffer +ffffffff81fd7d60 t gfx_v8_0_cp_jump_table_num +ffffffff81fd7da0 t gfx_v8_0_rlc_resume +ffffffff81fd8250 t gfx_v8_0_rlc_stop +ffffffff81fd82e0 t gfx_v8_0_rlc_reset +ffffffff81fd8390 t gfx_v8_0_rlc_start +ffffffff81fd8430 t gfx_v8_0_update_spm_vmid +ffffffff81fd84c0 t gfx_v8_0_init_save_restore_list +ffffffff81fd89a0 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81fd8c10 t gfx_v8_0_sq_irq_work_func +ffffffff81fd8c30 t gfx_v8_0_init_microcode +ffffffff81fd95c0 t gfx_v8_0_mec_init +ffffffff81fd96f0 t gfx_v8_0_compute_ring_init +ffffffff81fd9840 t gfx_v8_0_gpu_early_init +ffffffff81fd9d10 t amdgpu_bo_unreserve +ffffffff81fd9e20 t gfx_v8_0_kiq_resume +ffffffff81fda170 t gfx_v8_0_cp_gfx_resume +ffffffff81fdadb0 t gfx_v8_0_kcq_resume +ffffffff81fdb8c0 t amdgpu_bo_reserve +ffffffff81fdba60 t gfx_v8_0_mqd_commit +ffffffff81fdbcd0 t gfx_v8_0_mqd_init +ffffffff81fdc1e0 t gfx_v8_0_deactivate_hqd +ffffffff81fdc2e0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81fdc6f0 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81fdd000 t gfx_v9_0_ras_error_inject +ffffffff81fdd1e0 t gfx_v9_0_query_ras_error_count +ffffffff81fddf10 t gfx_v9_0_reset_ras_error_count +ffffffff81fdeab0 T gfx_v9_0_select_se_sh +ffffffff81fdeb50 t gfx_v9_0_early_init +ffffffff81fdf740 t gfx_v9_0_late_init +ffffffff81fe0720 t gfx_v9_0_sw_init +ffffffff81fe0f00 t gfx_v9_0_sw_fini +ffffffff81fe1160 t gfx_v9_0_hw_init +ffffffff81fe46d0 t gfx_v9_0_hw_fini +ffffffff81fe4f90 t gfx_v9_0_suspend +ffffffff81fe4fd0 t gfx_v9_0_resume +ffffffff81fe4fe0 t gfx_v9_0_is_idle +ffffffff81fe5080 t gfx_v9_0_wait_for_idle +ffffffff81fe5180 t gfx_v9_0_soft_reset +ffffffff81fe5590 t gfx_v9_0_set_clockgating_state +ffffffff81fe5690 t gfx_v9_0_set_powergating_state +ffffffff81fe5af0 t gfx_v9_0_get_clockgating_state +ffffffff81fe5c30 t gfx_v9_0_get_gpu_clock_counter +ffffffff81fe6510 t gfx_v9_0_read_wave_data +ffffffff81fe67e0 t gfx_v9_0_read_wave_vgprs +ffffffff81fe6850 t gfx_v9_0_read_wave_sgprs +ffffffff81fe6880 t gfx_v9_0_select_me_pipe_q +ffffffff81fe68a0 t wave_read_ind +ffffffff81fe69b0 t wave_read_regs +ffffffff81fe6b20 t gfx_v9_0_kiq_set_resources +ffffffff81fe6e80 t gfx_v9_0_kiq_map_queues +ffffffff81fe7200 t gfx_v9_0_kiq_unmap_queues +ffffffff81fe7570 t gfx_v9_0_kiq_query_status +ffffffff81fe7890 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81fe79c0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81fe79f0 t gfx_v9_0_ring_get_wptr_compute +ffffffff81fe7a60 t gfx_v9_0_ring_set_wptr_compute +ffffffff81fe7ac0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81fe7f40 t gfx_v9_0_ring_test_ring +ffffffff81fe81b0 t gfx_v9_0_ring_emit_rreg +ffffffff81fe8470 t gfx_v9_0_ring_emit_wreg +ffffffff81fe86d0 t gfx_v9_0_ring_emit_reg_wait +ffffffff81fe8730 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81fe87d0 t gfx_v9_0_wait_reg_mem +ffffffff81fe8b30 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81fe8b60 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81fe8c80 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81fe8dc0 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81fe94b0 t gfx_v9_0_ring_emit_fence +ffffffff81fe98c0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81fe9930 t gfx_v9_0_ring_emit_vm_flush +ffffffff81fe9a50 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81fe9b40 t gfx_v9_0_ring_emit_gds_switch +ffffffff81fe9c40 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81fe9e90 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81fe9f50 t gfx_v9_ring_emit_sb +ffffffff81fea040 t gfx_v9_ring_emit_cntxcntl +ffffffff81fea580 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81fea690 t gfx_v9_0_ring_soft_recovery +ffffffff81fea740 t gfx_v9_0_ring_preempt_ib +ffffffff81fea970 t gfx_v9_0_emit_mem_sync +ffffffff81feac60 t gfx_v9_0_write_data_to_reg +ffffffff81feae90 t gfx_v9_0_ring_test_ib +ffffffff81feb080 t gfx_v9_0_ring_patch_cntl +ffffffff81feb0c0 t gfx_v9_0_ring_patch_ce_meta +ffffffff81feb1d0 t gfx_v9_0_ring_patch_de_meta +ffffffff81feb2a0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81feb600 t gfx_v9_0_emit_wave_limit +ffffffff81feb800 t gfx_v9_0_set_eop_interrupt_state +ffffffff81feba00 t gfx_v9_0_eop_irq +ffffffff81febb70 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81febd50 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81febea0 t gfx_v9_0_priv_reg_irq +ffffffff81febfc0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81fec110 t gfx_v9_0_priv_inst_irq +ffffffff81fec230 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81fecc20 t gfx_v9_0_is_rlc_enabled +ffffffff81feccc0 t gfx_v9_0_set_safe_mode +ffffffff81fece40 t gfx_v9_0_unset_safe_mode +ffffffff81feceb0 t gfx_v9_0_rlc_init +ffffffff81fecf30 t gfx_v9_0_get_csb_size +ffffffff81fecf60 t gfx_v9_0_get_csb_buffer +ffffffff81fed0a0 t gfx_v9_0_cp_jump_table_num +ffffffff81fed0f0 t gfx_v9_0_rlc_resume +ffffffff81feeb20 t gfx_v9_0_rlc_stop +ffffffff81feef40 t gfx_v9_0_rlc_reset +ffffffff81fef120 t gfx_v9_0_rlc_start +ffffffff81fef2a0 t gfx_v9_0_update_spm_vmid +ffffffff81fef2f0 t gfx_v9_0_is_rlcg_access_range +ffffffff81fef340 t gfx_v9_0_init_csb +ffffffff81fef500 t gfx_v9_0_enable_lbpw +ffffffff81fef610 t gfx_v9_0_update_spm_vmid_internal +ffffffff81fef740 t gfx_v9_0_init_always_on_cu_mask +ffffffff81fefa00 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81fefb10 t gfx_v9_0_mec_init +ffffffff81fefd70 t gfx_v9_0_compute_ring_init +ffffffff81fefed0 t gfx_v9_0_gpu_early_init +ffffffff81ff0330 t amdgpu_bo_unreserve +ffffffff81ff0440 t gfx_v9_0_cp_gfx_enable +ffffffff81ff0540 t amdgpu_bo_reserve +ffffffff81ff06e0 t gfx_v9_0_kiq_init_register +ffffffff81ff1550 t gfx_v9_0_mqd_init +ffffffff81ff1b20 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81ff20d0 t gfx_v9_0_update_3d_clock_gating +ffffffff81ff2530 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81ff3000 t gfx_v9_4_query_ras_error_count +ffffffff81ff3ef0 t gfx_v9_4_query_ras_error_status +ffffffff81ff40f0 t gfx_v9_4_reset_ras_error_count +ffffffff81ff5000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81ff5890 T gfx_v9_4_2_init_golden_registers +ffffffff81ff5930 T gfx_v9_4_2_debug_trap_config_init +ffffffff81ff5a50 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81ff5c70 t gfx_v9_4_2_query_ras_error_count +ffffffff81ff5d40 t gfx_v9_4_2_query_ras_error_status +ffffffff81ff66e0 t gfx_v9_4_2_reset_ras_error_count +ffffffff81ff6750 t gfx_v9_4_2_reset_ras_error_status +ffffffff81ff6cb0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81ff6f10 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81ff6fb0 t gfx_v9_4_2_run_shader +ffffffff81ff73e0 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81ff7ac0 t gfx_v9_4_2_query_sram_edc_count +ffffffff81ff7e30 t gfx_v9_4_2_query_utc_edc_count +ffffffff81ff8020 t wave_read_ind +ffffffff81ff9000 t gfx_v9_4_3_xcp_suspend +ffffffff81ff90b0 t gfx_v9_4_3_xcp_resume +ffffffff81ff9250 t gfx_v9_4_3_query_ras_error_count +ffffffff81ff9270 t gfx_v9_4_3_query_ras_error_status +ffffffff81ff9290 t gfx_v9_4_3_reset_ras_error_count +ffffffff81ff92b0 t gfx_v9_4_3_reset_ras_error_status +ffffffff81ff92d0 t gfx_v9_4_3_enable_watchdog_timer +ffffffff81ff92f0 t gfx_v9_4_3_early_init +ffffffff81ff9a60 t gfx_v9_4_3_late_init +ffffffff81ff9af0 t gfx_v9_4_3_sw_init +ffffffff81ff9fe0 t gfx_v9_4_3_sw_fini +ffffffff81ffa210 t gfx_v9_4_3_hw_init +ffffffff81ffb090 t gfx_v9_4_3_hw_fini +ffffffff81ffb170 t gfx_v9_4_3_suspend +ffffffff81ffb250 t gfx_v9_4_3_resume +ffffffff81ffb260 t gfx_v9_4_3_is_idle +ffffffff81ffb450 t gfx_v9_4_3_wait_for_idle +ffffffff81ffb4f0 t gfx_v9_4_3_soft_reset +ffffffff81ffbd30 t gfx_v9_4_3_set_clockgating_state +ffffffff81ffbef0 t gfx_v9_4_3_set_powergating_state +ffffffff81ffbf20 t gfx_v9_4_3_get_clockgating_state +ffffffff81ffc0d0 t gfx_v9_4_3_kiq_set_resources +ffffffff81ffc430 t gfx_v9_4_3_kiq_map_queues +ffffffff81ffc7d0 t gfx_v9_4_3_kiq_unmap_queues +ffffffff81ffcb90 t gfx_v9_4_3_kiq_query_status +ffffffff81ffceb0 t gfx_v9_4_3_kiq_invalidate_tlbs +ffffffff81ffcfe0 t gfx_v9_4_3_ring_get_rptr_compute +ffffffff81ffd020 t gfx_v9_4_3_ring_get_wptr_compute +ffffffff81ffd090 t gfx_v9_4_3_ring_set_wptr_compute +ffffffff81ffd0f0 t gfx_v9_4_3_ring_emit_fence_kiq +ffffffff81ffd590 t gfx_v9_4_3_ring_test_ring +ffffffff81ffd830 t gfx_v9_4_3_ring_emit_rreg +ffffffff81ffdaf0 t gfx_v9_4_3_ring_emit_wreg +ffffffff81ffdd50 t gfx_v9_4_3_ring_emit_reg_wait +ffffffff81ffddb0 t gfx_v9_4_3_ring_emit_reg_write_reg_wait +ffffffff81ffddd0 t gfx_v9_4_3_wait_reg_mem +ffffffff81ffe130 t gfx_v9_4_3_ring_emit_ib_compute +ffffffff81ffe490 t gfx_v9_4_3_ring_emit_fence +ffffffff81ffe880 t gfx_v9_4_3_ring_emit_pipeline_sync +ffffffff81ffe8f0 t gfx_v9_4_3_ring_emit_vm_flush +ffffffff81ffe910 t gfx_v9_4_3_ring_emit_hdp_flush +ffffffff81ffea00 t gfx_v9_4_3_ring_emit_gds_switch +ffffffff81ffebe0 t gfx_v9_4_3_ring_test_ib +ffffffff81ffedd0 t gfx_v9_4_3_emit_mem_sync +ffffffff81fff0c0 t gfx_v9_4_3_emit_wave_limit +ffffffff81fff2d0 t gfx_v9_4_3_write_data_to_reg +ffffffff81fff500 t gfx_v9_4_3_set_eop_interrupt_state +ffffffff81fff680 t gfx_v9_4_3_eop_irq +ffffffff81fff830 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state +ffffffff81fff9b0 t gfx_v9_4_3_ih_to_xcc_inst +ffffffff81fffa90 t gfx_v9_4_3_set_priv_reg_fault_state +ffffffff81fffef0 t gfx_v9_4_3_priv_reg_irq +ffffffff81ffff60 t gfx_v9_4_3_fault +ffffffff820000e0 t gfx_v9_4_3_set_priv_inst_fault_state +ffffffff82000540 t gfx_v9_4_3_priv_inst_irq +ffffffff820005b0 t gfx_v9_4_3_is_rlc_enabled +ffffffff82000700 t gfx_v9_4_3_xcc_set_safe_mode +ffffffff82000a10 t gfx_v9_4_3_xcc_unset_safe_mode +ffffffff82000b50 t gfx_v9_4_3_rlc_init +ffffffff82000bb0 t gfx_v9_4_3_rlc_resume +ffffffff82000c70 t gfx_v9_4_3_rlc_stop +ffffffff82000d20 t gfx_v9_4_3_rlc_reset +ffffffff820014a0 t gfx_v9_4_3_rlc_start +ffffffff82001550 t gfx_v9_4_3_update_spm_vmid +ffffffff820017b0 t gfx_v9_4_3_is_rlcg_access_range +ffffffff82001880 t gfx_v9_4_3_xcc_rlc_resume +ffffffff82002240 t gfx_v9_4_3_xcc_rlc_stop +ffffffff82002aa0 t gfx_v9_4_3_xcc_rlc_start +ffffffff82002eb0 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt +ffffffff82003110 t gfx_v9_4_3_xcc_select_se_sh +ffffffff82003340 t gfx_v9_4_3_mec_init +ffffffff820036b0 t gfx_v9_4_3_gpu_early_init +ffffffff82003900 t amdgpu_bo_unreserve +ffffffff82003a10 t gfx_v9_4_3_get_gpu_clock_counter +ffffffff82003de0 t gfx_v9_4_3_read_wave_data +ffffffff82004140 t gfx_v9_4_3_read_wave_vgprs +ffffffff82004160 t gfx_v9_4_3_read_wave_sgprs +ffffffff820041c0 t gfx_v9_4_3_select_me_pipe_q +ffffffff82004240 t gfx_v9_4_3_switch_compute_partition +ffffffff820045f0 t wave_read_ind +ffffffff82004830 t wave_read_regs +ffffffff82004b10 t gfx_v9_4_3_xcc_constants_init +ffffffff82005e80 t gfx_v9_4_3_xcc_cp_resume +ffffffff82007120 t gfx_v9_4_3_xcc_cp_compute_enable +ffffffff82007300 t amdgpu_bo_reserve +ffffffff820074a0 t gfx_v9_4_3_xcc_kiq_init_register +ffffffff82009540 t gfx_v9_4_3_xcc_mqd_init +ffffffff8200a0e0 t gfx_v9_4_3_xcc_fini +ffffffff8200a760 t gfx_v9_4_3_xcc_q_fini_register +ffffffff8200b2c0 t gfx_v9_4_3_xcc_update_sram_fgcg +ffffffff8200b570 t gfx_v9_4_3_xcc_update_repeater_fgcg +ffffffff8200b820 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating +ffffffff8200c510 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating +ffffffff8200cea0 t gfx_v9_4_3_inst_query_ras_err_count +ffffffff8200d150 t gfx_v9_4_3_inst_query_ras_err_status +ffffffff8200e140 t gfx_v9_4_3_inst_reset_ras_err_count +ffffffff8200e330 t gfx_v9_4_3_inst_reset_ras_err_status +ffffffff8200ebd0 t gfx_v9_4_3_inst_enable_watchdog_timer +ffffffff8200f000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff8200f0a0 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff8200f1f0 t gfxhub_v1_0_gart_enable +ffffffff820109c0 t gfxhub_v1_0_gart_disable +ffffffff82010cb0 t gfxhub_v1_0_set_fault_enable_default +ffffffff82010db0 t gfxhub_v1_0_init +ffffffff82011000 T gfxhub_v1_1_get_xgmi_info +ffffffff82012000 t gfxhub_v1_2_get_mc_fb_offset +ffffffff82012150 t gfxhub_v1_2_setup_vm_pt_regs +ffffffff820121c0 t gfxhub_v1_2_gart_enable +ffffffff82012250 t gfxhub_v1_2_gart_disable +ffffffff820122b0 t gfxhub_v1_2_set_fault_enable_default +ffffffff82012320 t gfxhub_v1_2_init +ffffffff82012680 t gfxhub_v1_2_get_xgmi_info +ffffffff82012930 t gfxhub_v1_2_xcp_suspend +ffffffff82012980 t gfxhub_v1_2_xcp_resume +ffffffff82012a00 t gfxhub_v1_2_xcc_setup_vm_pt_regs +ffffffff82012d60 t gfxhub_v1_2_xcc_gart_enable +ffffffff820169d0 t gfxhub_v1_2_xcc_gart_disable +ffffffff82017130 t gfxhub_v1_2_xcc_set_fault_enable_default +ffffffff82018000 t gfxhub_v2_0_get_fb_location +ffffffff820180a0 t gfxhub_v2_0_get_mc_fb_offset +ffffffff82018140 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff82018290 t gfxhub_v2_0_gart_enable +ffffffff82019730 t gfxhub_v2_0_gart_disable +ffffffff820199a0 t gfxhub_v2_0_set_fault_enable_default +ffffffff82019aa0 t gfxhub_v2_0_init +ffffffff82019b70 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff82019d90 t gfxhub_v2_0_get_invalidate_req +ffffffff8201a000 t gfxhub_v2_1_get_fb_location +ffffffff8201a0a0 t gfxhub_v2_1_get_mc_fb_offset +ffffffff8201a140 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff8201a290 t gfxhub_v2_1_gart_enable +ffffffff8201b830 t gfxhub_v2_1_gart_disable +ffffffff8201baa0 t gfxhub_v2_1_set_fault_enable_default +ffffffff8201bbc0 t gfxhub_v2_1_init +ffffffff8201bc90 t gfxhub_v2_1_get_xgmi_info +ffffffff8201bdf0 t gfxhub_v2_1_utcl2_harvest +ffffffff8201bfe0 t gfxhub_v2_1_save_regs +ffffffff8201cb30 t gfxhub_v2_1_restore_regs +ffffffff8201d900 t gfxhub_v2_1_halt +ffffffff8201dd50 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff8201df70 t gfxhub_v2_1_get_invalidate_req +ffffffff8201e000 t gfxhub_v3_0_get_fb_location +ffffffff8201e0a0 t gfxhub_v3_0_get_mc_fb_offset +ffffffff8201e140 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff8201e290 t gfxhub_v3_0_gart_enable +ffffffff8201f830 t gfxhub_v3_0_gart_disable +ffffffff8201fb10 t gfxhub_v3_0_set_fault_enable_default +ffffffff8201fd00 t gfxhub_v3_0_init +ffffffff8201fdd0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff8201fff0 t gfxhub_v3_0_get_invalidate_req +ffffffff82021000 t gfxhub_v3_0_3_get_fb_location +ffffffff820210a0 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff82021140 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff82021290 t gfxhub_v3_0_3_gart_enable +ffffffff820226f0 t gfxhub_v3_0_3_gart_disable +ffffffff820229f0 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff82022b10 t gfxhub_v3_0_3_init +ffffffff82022be0 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff82022e00 t gfxhub_v3_0_3_get_invalidate_req +ffffffff82023000 t gmc_v10_0_early_init +ffffffff82023170 t gmc_v10_0_late_init +ffffffff820231f0 t gmc_v10_0_sw_init +ffffffff82023690 t gmc_v10_0_sw_fini +ffffffff82023710 t gmc_v10_0_hw_init +ffffffff82023990 t gmc_v10_0_hw_fini +ffffffff82023a80 t gmc_v10_0_suspend +ffffffff82023ac0 t gmc_v10_0_resume +ffffffff82023b20 t gmc_v10_0_is_idle +ffffffff82023b50 t gmc_v10_0_wait_for_idle +ffffffff82023b80 t gmc_v10_0_soft_reset +ffffffff82023bb0 t gmc_v10_0_set_clockgating_state +ffffffff82023c70 t gmc_v10_0_set_powergating_state +ffffffff82023ca0 t gmc_v10_0_get_clockgating_state +ffffffff82023d50 t gmc_v10_0_flush_gpu_tlb +ffffffff82024060 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff82024380 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff82024560 t gmc_v10_0_emit_pasid_mapping +ffffffff820245e0 t gmc_v10_0_map_mtype +ffffffff82024630 t gmc_v10_0_get_vm_pde +ffffffff82024730 t gmc_v10_0_get_vm_pte +ffffffff82024810 t gmc_v10_0_get_vbios_fb_size +ffffffff820249a0 t gmc_v10_0_flush_vm_hub +ffffffff82024e40 t gmc_v10_0_vm_fault_interrupt_state +ffffffff82024ef0 t gmc_v10_0_process_interrupt +ffffffff82025220 t gmc_v10_0_ecc_interrupt_state +ffffffff82025250 t gmc_v10_0_gart_init +ffffffff82026000 t gmc_v11_0_early_init +ffffffff820261f0 t gmc_v11_0_late_init +ffffffff82026270 t gmc_v11_0_sw_init +ffffffff82026630 t gmc_v11_0_sw_fini +ffffffff820266b0 t gmc_v11_0_hw_init +ffffffff82026860 t gmc_v11_0_hw_fini +ffffffff82026920 t gmc_v11_0_suspend +ffffffff820269e0 t gmc_v11_0_resume +ffffffff82026a40 t gmc_v11_0_is_idle +ffffffff82026a70 t gmc_v11_0_wait_for_idle +ffffffff82026aa0 t gmc_v11_0_soft_reset +ffffffff82026ad0 t gmc_v11_0_set_clockgating_state +ffffffff82026b50 t gmc_v11_0_set_powergating_state +ffffffff82026b80 t gmc_v11_0_get_clockgating_state +ffffffff82026bc0 t gmc_v11_0_flush_gpu_tlb +ffffffff820270f0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff820273c0 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff820275a0 t gmc_v11_0_emit_pasid_mapping +ffffffff82027620 t gmc_v11_0_map_mtype +ffffffff82027670 t gmc_v11_0_get_vm_pde +ffffffff82027770 t gmc_v11_0_get_vm_pte +ffffffff82027850 t gmc_v11_0_get_vbios_fb_size +ffffffff820279e0 t gmc_v11_0_vm_fault_interrupt_state +ffffffff82027a90 t gmc_v11_0_process_interrupt +ffffffff82027cf0 t gmc_v11_0_ecc_interrupt_state +ffffffff82027d20 t gmc_v11_0_gart_init +ffffffff82028000 t gmc_v7_0_early_init +ffffffff820280a0 t gmc_v7_0_late_init +ffffffff820280f0 t gmc_v7_0_sw_init +ffffffff82028610 t gmc_v7_0_sw_fini +ffffffff820286c0 t gmc_v7_0_hw_init +ffffffff82029350 t gmc_v7_0_hw_fini +ffffffff82029460 t gmc_v7_0_suspend +ffffffff820294a0 t gmc_v7_0_resume +ffffffff82029500 t gmc_v7_0_is_idle +ffffffff82029550 t gmc_v7_0_wait_for_idle +ffffffff82029600 t gmc_v7_0_soft_reset +ffffffff82029910 t gmc_v7_0_set_clockgating_state +ffffffff82029bb0 t gmc_v7_0_set_powergating_state +ffffffff82029be0 t gmc_v7_0_flush_gpu_tlb +ffffffff82029c10 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff82029cf0 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff82029da0 t gmc_v7_0_emit_pasid_mapping +ffffffff82029dd0 t gmc_v7_0_set_prt +ffffffff82029ff0 t gmc_v7_0_get_vm_pde +ffffffff8202a050 t gmc_v7_0_get_vm_pte +ffffffff8202a090 t gmc_v7_0_get_vbios_fb_size +ffffffff8202a110 t gmc_v7_0_vm_fault_interrupt_state +ffffffff8202a210 t gmc_v7_0_process_interrupt +ffffffff8202a520 t gmc_v7_0_gart_init +ffffffff8202b000 t gmc_v8_0_early_init +ffffffff8202b0a0 t gmc_v8_0_late_init +ffffffff8202b0f0 t gmc_v8_0_sw_init +ffffffff8202b7b0 t gmc_v8_0_sw_fini +ffffffff8202b860 t gmc_v8_0_hw_init +ffffffff8202c890 t gmc_v8_0_hw_fini +ffffffff8202c9a0 t gmc_v8_0_suspend +ffffffff8202c9e0 t gmc_v8_0_resume +ffffffff8202ca40 t gmc_v8_0_is_idle +ffffffff8202ca90 t gmc_v8_0_wait_for_idle +ffffffff8202cb40 t gmc_v8_0_check_soft_reset +ffffffff8202cbc0 t gmc_v8_0_pre_soft_reset +ffffffff8202cd70 t gmc_v8_0_soft_reset +ffffffff8202ce70 t gmc_v8_0_post_soft_reset +ffffffff8202cf00 t gmc_v8_0_set_clockgating_state +ffffffff8202d730 t gmc_v8_0_set_powergating_state +ffffffff8202d760 t gmc_v8_0_get_clockgating_state +ffffffff8202d7d0 t gmc_v8_0_flush_gpu_tlb +ffffffff8202d800 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff8202d8e0 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff8202d990 t gmc_v8_0_emit_pasid_mapping +ffffffff8202d9c0 t gmc_v8_0_set_prt +ffffffff8202dbe0 t gmc_v8_0_get_vm_pde +ffffffff8202dc40 t gmc_v8_0_get_vm_pte +ffffffff8202dc90 t gmc_v8_0_get_vbios_fb_size +ffffffff8202dd10 t gmc_v8_0_vm_fault_interrupt_state +ffffffff8202de10 t gmc_v8_0_process_interrupt +ffffffff8202e230 t gmc_v8_0_gart_init +ffffffff8202f000 T gmc_v9_0_restore_registers +ffffffff8202f170 t gmc_v9_0_early_init +ffffffff8202f540 t gmc_v9_0_late_init +ffffffff8202f670 t gmc_v9_0_sw_init +ffffffff8202fee0 t gmc_v9_0_sw_fini +ffffffff8202ffe0 t gmc_v9_0_hw_init +ffffffff82030560 t gmc_v9_0_hw_fini +ffffffff82030660 t gmc_v9_0_suspend +ffffffff820306a0 t gmc_v9_0_resume +ffffffff82030700 t gmc_v9_0_is_idle +ffffffff82030730 t gmc_v9_0_wait_for_idle +ffffffff82030760 t gmc_v9_0_soft_reset +ffffffff82030790 t gmc_v9_0_set_clockgating_state +ffffffff82030800 t gmc_v9_0_set_powergating_state +ffffffff82030830 t gmc_v9_0_get_clockgating_state +ffffffff82030870 t gmc_v9_0_flush_gpu_tlb +ffffffff82030fa0 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff820313e0 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff82031610 t gmc_v9_0_emit_pasid_mapping +ffffffff82031690 t gmc_v9_0_map_mtype +ffffffff820316d0 t gmc_v9_0_get_vm_pde +ffffffff820317e0 t gmc_v9_0_get_vm_pte +ffffffff82031b20 t gmc_v9_0_override_vm_pte_flags +ffffffff82031be0 t gmc_v9_0_get_vbios_fb_size +ffffffff82031d90 t gmc_v9_0_query_memory_partition +ffffffff82031df0 t gmc_v9_0_vm_fault_interrupt_state +ffffffff820322d0 t gmc_v9_0_process_interrupt +ffffffff82032ba0 t gmc_v9_0_ecc_interrupt_state +ffffffff82032d50 t gmc_v9_0_init_mem_ranges +ffffffff820331c0 t gmc_v9_0_gart_init +ffffffff82033330 t gmc_v9_0_save_registers +ffffffff82034000 t hdp_v4_0_query_ras_error_count +ffffffff820340d0 t hdp_v4_0_reset_ras_error_count +ffffffff82034200 t hdp_v4_0_flush_hdp +ffffffff82034250 t hdp_v4_0_invalidate_hdp +ffffffff82034330 t hdp_v4_0_update_clock_gating +ffffffff82034440 t hdp_v4_0_get_clockgating_state +ffffffff820344a0 t hdp_v4_0_init_registers +ffffffff82035000 t hdp_v5_0_flush_hdp +ffffffff82035050 t hdp_v5_0_invalidate_hdp +ffffffff820350f0 t hdp_v5_0_update_clock_gating +ffffffff82035530 t hdp_v5_0_get_clockgating_state +ffffffff82035670 t hdp_v5_0_init_registers +ffffffff82036000 t hdp_v5_2_flush_hdp +ffffffff82036050 t hdp_v5_2_update_clock_gating +ffffffff820364a0 t hdp_v5_2_get_clockgating_state +ffffffff82037000 t hdp_v6_0_flush_hdp +ffffffff82037050 t hdp_v6_0_update_clock_gating +ffffffff820373b0 t hdp_v6_0_get_clockgating_state +ffffffff82038000 t iceland_ih_early_init +ffffffff82038050 t iceland_ih_sw_init +ffffffff820380c0 t iceland_ih_sw_fini +ffffffff82038120 t iceland_ih_hw_init +ffffffff82038410 t iceland_ih_hw_fini +ffffffff82038520 t iceland_ih_suspend +ffffffff82038630 t iceland_ih_resume +ffffffff82038670 t iceland_ih_is_idle +ffffffff820386c0 t iceland_ih_wait_for_idle +ffffffff82038770 t iceland_ih_soft_reset +ffffffff82038890 t iceland_ih_set_clockgating_state +ffffffff820388c0 t iceland_ih_set_powergating_state +ffffffff820388f0 t iceland_ih_get_wptr +ffffffff82038a20 t iceland_ih_decode_iv +ffffffff82038aa0 t iceland_ih_set_rptr +ffffffff82039000 t ih_v6_0_early_init +ffffffff82039050 t ih_v6_0_sw_init +ffffffff820391d0 t ih_v6_0_sw_fini +ffffffff82039210 t ih_v6_0_hw_init +ffffffff820398a0 t ih_v6_0_hw_fini +ffffffff82039910 t ih_v6_0_suspend +ffffffff82039980 t ih_v6_0_resume +ffffffff82039990 t ih_v6_0_is_idle +ffffffff820399c0 t ih_v6_0_wait_for_idle +ffffffff820399f0 t ih_v6_0_soft_reset +ffffffff82039a20 t ih_v6_0_set_clockgating_state +ffffffff82039b60 t ih_v6_0_set_powergating_state +ffffffff82039d00 t ih_v6_0_get_clockgating_state +ffffffff82039da0 t ih_v6_0_get_wptr +ffffffff82039ee0 t ih_v6_0_set_rptr +ffffffff82039fc0 t ih_v6_0_self_irq +ffffffff8203a030 t ih_v6_0_toggle_interrupts +ffffffff8203a290 t force_update_wptr_for_self_int +ffffffff8203b000 t ih_v6_1_early_init +ffffffff8203b050 t ih_v6_1_sw_init +ffffffff8203b1d0 t ih_v6_1_sw_fini +ffffffff8203b210 t ih_v6_1_hw_init +ffffffff8203b8a0 t ih_v6_1_hw_fini +ffffffff8203b910 t ih_v6_1_suspend +ffffffff8203b980 t ih_v6_1_resume +ffffffff8203b990 t ih_v6_1_is_idle +ffffffff8203b9c0 t ih_v6_1_wait_for_idle +ffffffff8203b9f0 t ih_v6_1_soft_reset +ffffffff8203ba20 t ih_v6_1_set_clockgating_state +ffffffff8203bb60 t ih_v6_1_set_powergating_state +ffffffff8203bd00 t ih_v6_1_get_clockgating_state +ffffffff8203bda0 t ih_v6_1_get_wptr +ffffffff8203bee0 t ih_v6_1_set_rptr +ffffffff8203bfc0 t ih_v6_1_self_irq +ffffffff8203c030 t ih_v6_1_toggle_interrupts +ffffffff8203c250 t force_update_wptr_for_self_int +ffffffff8203d000 t imu_v11_0_init_microcode +ffffffff8203d1b0 t imu_v11_0_load_microcode +ffffffff8203d580 t imu_v11_0_setup +ffffffff8203d860 t imu_v11_0_start +ffffffff8203d980 t imu_v11_0_program_rlc_ram +ffffffff8203db60 t imu_v11_0_wait_for_reset_status +ffffffff8203dce0 t program_imu_rlc_ram +ffffffff8203f000 T imu_v11_0_3_program_rlc_ram +ffffffff82040000 T jpeg_v1_0_early_init +ffffffff82040080 T jpeg_v1_0_sw_init +ffffffff82040190 T jpeg_v1_0_sw_fini +ffffffff820401b0 T jpeg_v1_0_start +ffffffff82040cf0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff82040d80 t jpeg_v1_0_decode_ring_get_wptr +ffffffff82040e10 t jpeg_v1_0_decode_ring_set_wptr +ffffffff82040e80 t jpeg_v1_dec_ring_parse_cs +ffffffff82040ff0 t jpeg_v1_0_decode_ring_emit_ib +ffffffff82041a10 t jpeg_v1_0_decode_ring_emit_fence +ffffffff82042460 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff820424d0 t jpeg_v1_0_decode_ring_nop +ffffffff82042630 t jpeg_v1_0_decode_ring_insert_start +ffffffff82042810 t jpeg_v1_0_decode_ring_insert_end +ffffffff820429f0 t jpeg_v1_0_ring_begin_use +ffffffff82042b20 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff82042db0 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff82043210 t jpeg_v1_0_set_interrupt_state +ffffffff82043240 t jpeg_v1_0_process_interrupt +ffffffff82044000 T jpeg_v2_0_dec_ring_insert_start +ffffffff820441c0 T jpeg_v2_0_dec_ring_insert_end +ffffffff82044380 T jpeg_v2_0_dec_ring_emit_fence +ffffffff82044af0 T jpeg_v2_0_dec_ring_emit_ib +ffffffff82045380 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff82045780 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff820457f0 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff82045a50 T jpeg_v2_0_dec_ring_nop +ffffffff82045bb0 t jpeg_v2_0_early_init +ffffffff82045c40 t jpeg_v2_0_sw_init +ffffffff82045d90 t jpeg_v2_0_sw_fini +ffffffff82045df0 t jpeg_v2_0_hw_init +ffffffff82045e80 t jpeg_v2_0_hw_fini +ffffffff82045f70 t jpeg_v2_0_suspend +ffffffff82045fa0 t jpeg_v2_0_resume +ffffffff82046050 t jpeg_v2_0_is_idle +ffffffff820460f0 t jpeg_v2_0_wait_for_idle +ffffffff82046130 t jpeg_v2_0_set_clockgating_state +ffffffff820461f0 t jpeg_v2_0_set_powergating_state +ffffffff82046a60 t jpeg_v2_0_dec_ring_get_rptr +ffffffff82046af0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff82046ba0 t jpeg_v2_0_dec_ring_set_wptr +ffffffff82046c40 t jpeg_v2_0_set_interrupt_state +ffffffff82046c70 t jpeg_v2_0_process_interrupt +ffffffff82046d10 t jpeg_v2_0_enable_clock_gating +ffffffff82046ee0 t jpeg_v2_0_disable_clock_gating +ffffffff82048000 t jpeg_v2_6_query_ras_poison_status +ffffffff82048160 t jpeg_v2_5_early_init +ffffffff82048380 t jpeg_v2_5_sw_init +ffffffff82048660 t jpeg_v2_5_sw_fini +ffffffff820486c0 t jpeg_v2_5_hw_init +ffffffff820487c0 t jpeg_v2_5_hw_fini +ffffffff82048980 t jpeg_v2_5_suspend +ffffffff820489b0 t jpeg_v2_5_resume +ffffffff82048ad0 t jpeg_v2_5_is_idle +ffffffff82048be0 t jpeg_v2_5_wait_for_idle +ffffffff82048ca0 t jpeg_v2_5_set_clockgating_state +ffffffff82048d60 t jpeg_v2_5_set_powergating_state +ffffffff820495c0 t jpeg_v2_5_dec_ring_get_rptr +ffffffff82049660 t jpeg_v2_5_dec_ring_get_wptr +ffffffff82049710 t jpeg_v2_5_dec_ring_set_wptr +ffffffff820497c0 t jpeg_v2_6_dec_ring_insert_start +ffffffff820499a0 t jpeg_v2_6_dec_ring_insert_end +ffffffff82049b80 t jpeg_v2_5_set_interrupt_state +ffffffff82049bb0 t jpeg_v2_5_process_interrupt +ffffffff82049c90 t jpeg_v2_6_set_ras_interrupt_state +ffffffff82049cc0 t jpeg_v2_5_enable_clock_gating +ffffffff82049da0 t jpeg_v2_5_disable_clock_gating +ffffffff8204b000 t jpeg_v3_0_early_init +ffffffff8204b120 t jpeg_v3_0_sw_init +ffffffff8204b270 t jpeg_v3_0_sw_fini +ffffffff8204b2d0 t jpeg_v3_0_hw_init +ffffffff8204b360 t jpeg_v3_0_hw_fini +ffffffff8204b450 t jpeg_v3_0_suspend +ffffffff8204b480 t jpeg_v3_0_resume +ffffffff8204b530 t jpeg_v3_0_is_idle +ffffffff8204b5d0 t jpeg_v3_0_wait_for_idle +ffffffff8204b610 t jpeg_v3_0_set_clockgating_state +ffffffff8204b6d0 t jpeg_v3_0_set_powergating_state +ffffffff8204c020 t jpeg_v3_0_dec_ring_get_rptr +ffffffff8204c0b0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff8204c160 t jpeg_v3_0_dec_ring_set_wptr +ffffffff8204c200 t jpeg_v3_0_set_interrupt_state +ffffffff8204c230 t jpeg_v3_0_process_interrupt +ffffffff8204c2d0 t jpeg_v3_0_enable_clock_gating +ffffffff8204c3b0 t jpeg_v3_0_disable_clock_gating +ffffffff8204d000 t jpeg_v4_0_query_ras_poison_status +ffffffff8204d160 t jpeg_v4_0_early_init +ffffffff8204d240 t jpeg_v4_0_sw_init +ffffffff8204d410 t jpeg_v4_0_sw_fini +ffffffff8204d470 t jpeg_v4_0_hw_init +ffffffff8204db60 t jpeg_v4_0_hw_fini +ffffffff8204dc60 t jpeg_v4_0_suspend +ffffffff8204dc90 t jpeg_v4_0_resume +ffffffff8204dcf0 t jpeg_v4_0_is_idle +ffffffff8204dd90 t jpeg_v4_0_wait_for_idle +ffffffff8204ddd0 t jpeg_v4_0_set_clockgating_state +ffffffff8204dea0 t jpeg_v4_0_set_powergating_state +ffffffff8204e760 t jpeg_v4_0_dec_ring_get_rptr +ffffffff8204e7f0 t jpeg_v4_0_dec_ring_get_wptr +ffffffff8204e8a0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff8204e940 t jpeg_v4_0_set_interrupt_state +ffffffff8204e970 t jpeg_v4_0_process_interrupt +ffffffff8204ea20 t jpeg_v4_0_set_ras_interrupt_state +ffffffff8204ea50 t jpeg_v4_0_enable_clock_gating +ffffffff8204ec30 t jpeg_v4_0_disable_clock_gating +ffffffff8204f000 T jpeg_v4_0_3_dec_ring_parse_cs +ffffffff8204f180 t jpeg_v4_0_3_early_init +ffffffff8204f300 t jpeg_v4_0_3_sw_init +ffffffff8204f680 t jpeg_v4_0_3_sw_fini +ffffffff8204f6e0 t jpeg_v4_0_3_hw_init +ffffffff82050220 t jpeg_v4_0_3_hw_fini +ffffffff820502d0 t jpeg_v4_0_3_suspend +ffffffff82050370 t jpeg_v4_0_3_resume +ffffffff820503d0 t jpeg_v4_0_3_is_idle +ffffffff820505e0 t jpeg_v4_0_3_wait_for_idle +ffffffff82050750 t jpeg_v4_0_3_set_clockgating_state +ffffffff820507f0 t jpeg_v4_0_3_set_powergating_state +ffffffff820515d0 t jpeg_v4_0_3_dec_ring_get_rptr +ffffffff82051770 t jpeg_v4_0_3_dec_ring_get_wptr +ffffffff82051930 t jpeg_v4_0_3_dec_ring_set_wptr +ffffffff82051ae0 t jpeg_v4_0_3_dec_ring_emit_ib +ffffffff82052440 t jpeg_v4_0_3_dec_ring_emit_fence +ffffffff82052c90 t jpeg_v4_0_3_dec_ring_emit_vm_flush +ffffffff82052d00 t jpeg_v4_0_3_dec_ring_nop +ffffffff82052e60 t jpeg_v4_0_3_dec_ring_insert_start +ffffffff82053020 t jpeg_v4_0_3_dec_ring_insert_end +ffffffff820531e0 t jpeg_v4_0_3_dec_ring_emit_wreg +ffffffff82053440 t jpeg_v4_0_3_dec_ring_emit_reg_wait +ffffffff82053840 t jpeg_v4_0_3_set_interrupt_state +ffffffff82053870 t jpeg_v4_0_3_process_interrupt +ffffffff82053b20 t jpeg_v4_0_3_query_ras_error_count +ffffffff82053c40 t jpeg_v4_0_3_reset_ras_error_count +ffffffff82053d50 t jpeg_v4_0_3_disable_clock_gating +ffffffff82054000 t lsdma_v6_0_copy_mem +ffffffff820543e0 t lsdma_v6_0_fill_mem +ffffffff82054740 t lsdma_v6_0_update_memory_power_gating +ffffffff82055000 t mca_v3_0_ras_block_match +ffffffff82055050 t mca_v3_0_mp0_query_ras_error_count +ffffffff82055070 t mca_v3_0_mp1_query_ras_error_count +ffffffff82055090 t mca_v3_0_mpio_query_ras_error_count +ffffffff82056000 t mes_v10_0_early_init +ffffffff82056070 t mes_v10_0_late_init +ffffffff820560c0 t mes_v10_1_sw_init +ffffffff82056630 t mes_v10_1_sw_fini +ffffffff820567c0 t mes_v10_1_hw_init +ffffffff820571b0 t mes_v10_1_hw_fini +ffffffff820572c0 t mes_v10_1_suspend +ffffffff82057400 t mes_v10_1_resume +ffffffff82057460 t mes_v10_1_kiq_hw_init +ffffffff820578f0 t mes_v10_1_add_hw_queue +ffffffff82057a80 t mes_v10_1_remove_hw_queue +ffffffff82057b20 t mes_v10_1_unmap_legacy_queue +ffffffff82057c20 t mes_v10_1_suspend_gang +ffffffff82057c50 t mes_v10_1_resume_gang +ffffffff82057c80 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff82057ed0 t mes_v10_1_load_microcode +ffffffff820587f0 t mes_v10_1_enable +ffffffff82058d00 t mes_v10_1_queue_init +ffffffff82058fe0 t amdgpu_bo_unreserve +ffffffff820590f0 t mes_v10_1_ring_get_rptr +ffffffff82059120 t mes_v10_1_ring_get_wptr +ffffffff82059190 t mes_v10_1_ring_set_wptr +ffffffff8205a000 t mes_v11_0_early_init +ffffffff8205a070 t mes_v11_0_late_init +ffffffff8205a0e0 t mes_v11_0_sw_init +ffffffff8205a650 t mes_v11_0_sw_fini +ffffffff8205a8a0 t mes_v11_0_hw_init +ffffffff8205b1b0 t mes_v11_0_hw_fini +ffffffff8205b1e0 t mes_v11_0_suspend +ffffffff8205b1f0 t mes_v11_0_resume +ffffffff8205b250 t mes_v11_0_kiq_hw_init +ffffffff8205b4a0 t mes_v11_0_kiq_hw_fini +ffffffff8205b600 t mes_v11_0_add_hw_queue +ffffffff8205b810 t mes_v11_0_remove_hw_queue +ffffffff8205b8b0 t mes_v11_0_unmap_legacy_queue +ffffffff8205b9d0 t mes_v11_0_suspend_gang +ffffffff8205ba00 t mes_v11_0_resume_gang +ffffffff8205ba30 t mes_v11_0_misc_op +ffffffff8205bbf0 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff8205be50 t mes_v11_0_load_microcode +ffffffff8205c6f0 t mes_v11_0_enable +ffffffff8205cca0 t mes_v11_0_queue_init +ffffffff8205d920 t amdgpu_bo_unreserve +ffffffff8205da30 t mes_v11_0_mqd_init +ffffffff8205dc50 t mes_v11_0_kiq_dequeue +ffffffff8205e140 t mes_v11_0_ring_get_rptr +ffffffff8205e170 t mes_v11_0_ring_get_wptr +ffffffff8205e1e0 t mes_v11_0_ring_set_wptr +ffffffff8205f000 t mmhub_v1_0_query_ras_error_count +ffffffff8205f160 t mmhub_v1_0_reset_ras_error_count +ffffffff8205f230 t mmhub_v1_0_get_fb_location +ffffffff8205f360 t mmhub_v1_0_init +ffffffff8205f410 t mmhub_v1_0_gart_enable +ffffffff820609c0 t mmhub_v1_0_set_fault_enable_default +ffffffff82060ae0 t mmhub_v1_0_gart_disable +ffffffff82060db0 t mmhub_v1_0_set_clockgating +ffffffff820612a0 t mmhub_v1_0_get_clockgating +ffffffff820613e0 t mmhub_v1_0_setup_vm_pt_regs +ffffffff82061530 t mmhub_v1_0_update_power_gating +ffffffff82062000 t mmhub_v1_7_query_ras_error_count +ffffffff82062160 t mmhub_v1_7_query_ras_error_status +ffffffff82062270 t mmhub_v1_7_reset_ras_error_count +ffffffff82062320 t mmhub_v1_7_reset_ras_error_status +ffffffff82062440 t mmhub_v1_7_get_fb_location +ffffffff82062570 t mmhub_v1_7_init +ffffffff82062610 t mmhub_v1_7_gart_enable +ffffffff82063df0 t mmhub_v1_7_set_fault_enable_default +ffffffff82063f10 t mmhub_v1_7_gart_disable +ffffffff820641e0 t mmhub_v1_7_set_clockgating +ffffffff820645c0 t mmhub_v1_7_get_clockgating +ffffffff82064700 t mmhub_v1_7_setup_vm_pt_regs +ffffffff82065000 t mmhub_v1_8_get_fb_location +ffffffff82065130 t mmhub_v1_8_init +ffffffff820652b0 t mmhub_v1_8_gart_enable +ffffffff820671d0 t mmhub_v1_8_set_fault_enable_default +ffffffff820673c0 t mmhub_v1_8_gart_disable +ffffffff82067760 t mmhub_v1_8_set_clockgating +ffffffff82067790 t mmhub_v1_8_get_clockgating +ffffffff820677c0 t mmhub_v1_8_setup_vm_pt_regs +ffffffff820679f0 t mmhub_v1_8_query_ras_error_count +ffffffff82067b80 t mmhub_v1_8_query_ras_error_status +ffffffff82067e80 t mmhub_v1_8_reset_ras_error_count +ffffffff82067fc0 t mmhub_v1_8_reset_ras_error_status +ffffffff82069000 t mmhub_v2_0_init +ffffffff820690d0 t mmhub_v2_0_gart_enable +ffffffff8206a4f0 t mmhub_v2_0_set_fault_enable_default +ffffffff8206a610 t mmhub_v2_0_gart_disable +ffffffff8206a8e0 t mmhub_v2_0_set_clockgating +ffffffff8206ac70 t mmhub_v2_0_get_clockgating +ffffffff8206ae30 t mmhub_v2_0_setup_vm_pt_regs +ffffffff8206af90 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff8206b230 t mmhub_v2_0_get_invalidate_req +ffffffff8206c000 t mmhub_v2_3_init +ffffffff8206c0e0 t mmhub_v2_3_gart_enable +ffffffff8206d760 t mmhub_v2_3_set_fault_enable_default +ffffffff8206d860 t mmhub_v2_3_gart_disable +ffffffff8206db40 t mmhub_v2_3_set_clockgating +ffffffff8206e050 t mmhub_v2_3_get_clockgating +ffffffff8206e270 t mmhub_v2_3_setup_vm_pt_regs +ffffffff8206e3c0 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff8206e610 t mmhub_v2_3_get_invalidate_req +ffffffff8206f000 t mmhub_v3_0_get_fb_location +ffffffff8206f0a0 t mmhub_v3_0_get_mc_fb_offset +ffffffff8206f140 t mmhub_v3_0_init +ffffffff8206f220 t mmhub_v3_0_gart_enable +ffffffff82070690 t mmhub_v3_0_set_fault_enable_default +ffffffff820707b0 t mmhub_v3_0_gart_disable +ffffffff82070a80 t mmhub_v3_0_set_clockgating +ffffffff82070c70 t mmhub_v3_0_get_clockgating +ffffffff82070d30 t mmhub_v3_0_setup_vm_pt_regs +ffffffff82070e80 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff820710d0 t mmhub_v3_0_get_invalidate_req +ffffffff82072000 t mmhub_v3_0_1_get_fb_location +ffffffff820720a0 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff82072140 t mmhub_v3_0_1_init +ffffffff82072210 t mmhub_v3_0_1_gart_enable +ffffffff820737a0 t mmhub_v3_0_1_set_fault_enable_default +ffffffff820738a0 t mmhub_v3_0_1_gart_disable +ffffffff82073b80 t mmhub_v3_0_1_set_clockgating +ffffffff82073d70 t mmhub_v3_0_1_get_clockgating +ffffffff82073e30 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff82073f80 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff820741d0 t mmhub_v3_0_1_get_invalidate_req +ffffffff82075000 t mmhub_v3_0_2_get_fb_location +ffffffff820750a0 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff82075140 t mmhub_v3_0_2_init +ffffffff82075210 t mmhub_v3_0_2_gart_enable +ffffffff82076660 t mmhub_v3_0_2_set_fault_enable_default +ffffffff82076780 t mmhub_v3_0_2_gart_disable +ffffffff82076a50 t mmhub_v3_0_2_set_clockgating +ffffffff82076a80 t mmhub_v3_0_2_get_clockgating +ffffffff82076ab0 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff82076c00 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff82076e30 t mmhub_v3_0_2_get_invalidate_req +ffffffff82077000 t mmhub_v9_4_query_ras_error_count +ffffffff82077160 t mmhub_v9_4_query_ras_error_status +ffffffff82077270 t mmhub_v9_4_reset_ras_error_count +ffffffff82077340 t mmhub_v9_4_get_fb_location +ffffffff82077470 t mmhub_v9_4_init +ffffffff820775c0 t mmhub_v9_4_gart_enable +ffffffff82078c60 t mmhub_v9_4_set_fault_enable_default +ffffffff82078e70 t mmhub_v9_4_gart_disable +ffffffff82079210 t mmhub_v9_4_set_clockgating +ffffffff82079750 t mmhub_v9_4_get_clockgating +ffffffff82079890 t mmhub_v9_4_setup_vm_pt_regs +ffffffff820798e0 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff8207a000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff8207a050 T xgpu_ai_mailbox_add_irq_id +ffffffff8207a100 T xgpu_ai_mailbox_get_irq +ffffffff8207a1d0 t xgpu_ai_mailbox_flr_work +ffffffff8207a470 T xgpu_ai_mailbox_put_irq +ffffffff8207a4b0 t xgpu_ai_request_full_gpu_access +ffffffff8207a4d0 t xgpu_ai_release_full_gpu_access +ffffffff8207a4f0 t xgpu_ai_request_init_data +ffffffff8207a560 t xgpu_ai_request_reset +ffffffff8207a630 t xgpu_ai_mailbox_trans_msg +ffffffff8207a8f0 t xgpu_ai_ras_poison_handler +ffffffff8207a920 t xgpu_ai_set_mailbox_ack_irq +ffffffff8207a9c0 t xgpu_ai_mailbox_ack_irq +ffffffff8207aa20 t xgpu_ai_set_mailbox_rcv_irq +ffffffff8207aac0 t xgpu_ai_mailbox_rcv_irq +ffffffff8207abd0 t xgpu_ai_send_access_requests +ffffffff8207acf0 t xgpu_ai_poll_msg +ffffffff8207b000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff8207b050 T xgpu_nv_mailbox_add_irq_id +ffffffff8207b100 T xgpu_nv_mailbox_get_irq +ffffffff8207b1d0 t xgpu_nv_mailbox_flr_work +ffffffff8207b490 T xgpu_nv_mailbox_put_irq +ffffffff8207b4d0 t xgpu_nv_request_full_gpu_access +ffffffff8207b4f0 t xgpu_nv_release_full_gpu_access +ffffffff8207b510 t xgpu_nv_request_init_data +ffffffff8207b530 t xgpu_nv_request_reset +ffffffff8207b690 t xgpu_nv_mailbox_trans_msg +ffffffff8207b8c0 t xgpu_nv_ras_poison_handler +ffffffff8207b8e0 t xgpu_nv_set_mailbox_ack_irq +ffffffff8207b970 t xgpu_nv_mailbox_ack_irq +ffffffff8207b9d0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff8207ba60 t xgpu_nv_mailbox_rcv_irq +ffffffff8207bb30 t xgpu_nv_send_access_requests +ffffffff8207c000 T xgpu_vi_init_golden_registers +ffffffff8207c0f0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff8207c140 T xgpu_vi_mailbox_add_irq_id +ffffffff8207c1f0 T xgpu_vi_mailbox_get_irq +ffffffff8207c2c0 t xgpu_vi_mailbox_flr_work +ffffffff8207c460 T xgpu_vi_mailbox_put_irq +ffffffff8207c4a0 t xgpu_vi_request_full_gpu_access +ffffffff8207c4c0 t xgpu_vi_release_full_gpu_access +ffffffff8207c4e0 t xgpu_vi_request_reset +ffffffff8207c500 t xgpu_vi_wait_reset_cmpl +ffffffff8207c640 t xgpu_vi_set_mailbox_ack_irq +ffffffff8207c6d0 t xgpu_vi_mailbox_ack_irq +ffffffff8207c730 t xgpu_vi_set_mailbox_rcv_irq +ffffffff8207c7c0 t xgpu_vi_mailbox_rcv_irq +ffffffff8207c890 t xgpu_vi_mailbox_rcv_msg +ffffffff8207c9f0 t xgpu_vi_send_access_requests +ffffffff8207d000 t navi10_ih_early_init +ffffffff8207d060 t navi10_ih_sw_init +ffffffff8207d1f0 t navi10_ih_sw_fini +ffffffff8207d230 t navi10_ih_hw_init +ffffffff8207d710 t navi10_ih_hw_fini +ffffffff8207d780 t navi10_ih_suspend +ffffffff8207d7f0 t navi10_ih_resume +ffffffff8207d800 t navi10_ih_is_idle +ffffffff8207d830 t navi10_ih_wait_for_idle +ffffffff8207d860 t navi10_ih_soft_reset +ffffffff8207d890 t navi10_ih_set_clockgating_state +ffffffff8207d9d0 t navi10_ih_set_powergating_state +ffffffff8207da00 t navi10_ih_get_clockgating_state +ffffffff8207daa0 t navi10_ih_get_wptr +ffffffff8207dc00 t navi10_ih_set_rptr +ffffffff8207dcf0 t navi10_ih_self_irq +ffffffff8207dd70 t navi10_ih_toggle_interrupts +ffffffff8207df00 t force_update_wptr_for_self_int +ffffffff8207f000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff8207f040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff8207f080 t nbio_v2_3_get_pcie_index_offset +ffffffff8207f0c0 t nbio_v2_3_get_pcie_data_offset +ffffffff8207f100 t nbio_v2_3_get_rev_id +ffffffff8207f160 t nbio_v2_3_mc_access_enable +ffffffff8207f210 t nbio_v2_3_get_memsize +ffffffff8207f280 t nbio_v2_3_sdma_doorbell_range +ffffffff8207f330 t nbio_v2_3_vcn_doorbell_range +ffffffff8207f3c0 t nbio_v2_3_enable_doorbell_aperture +ffffffff8207f4d0 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff8207f650 t nbio_v2_3_ih_doorbell_range +ffffffff8207f780 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff8207f830 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff8207f8e0 t nbio_v2_3_get_clockgating_state +ffffffff8207f970 t nbio_v2_3_ih_control +ffffffff8207fae0 t nbio_v2_3_init_registers +ffffffff8207fb80 t nbio_v2_3_remap_hdp_registers +ffffffff8207fca0 t nbio_v2_3_enable_aspm +ffffffff8207fd40 t nbio_v2_3_program_aspm +ffffffff820804c0 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff82080560 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff820805e0 t nbio_v2_3_clear_doorbell_interrupt +ffffffff82081000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff82081040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff82081080 t nbio_v4_3_get_pcie_index_offset +ffffffff820810b0 t nbio_v4_3_get_pcie_data_offset +ffffffff820810f0 t nbio_v4_3_get_rev_id +ffffffff82081190 t nbio_v4_3_mc_access_enable +ffffffff82081240 t nbio_v4_3_get_memsize +ffffffff820812b0 t nbio_v4_3_sdma_doorbell_range +ffffffff82081430 t nbio_v4_3_vcn_doorbell_range +ffffffff820815f0 t nbio_v4_3_gc_doorbell_init +ffffffff82081700 t nbio_v4_3_enable_doorbell_aperture +ffffffff82081810 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff82081990 t nbio_v4_3_ih_doorbell_range +ffffffff82081ac0 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff82081c10 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff82081d50 t nbio_v4_3_get_clockgating_state +ffffffff82081e90 t nbio_v4_3_ih_control +ffffffff82082000 t nbio_v4_3_init_registers +ffffffff82082140 t nbio_v4_3_remap_hdp_registers +ffffffff82082260 t nbio_v4_3_program_aspm +ffffffff82083090 t nbio_v4_3_get_rom_offset +ffffffff82083130 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff82083160 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff82083190 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff820831c0 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff820831f0 t nbio_v4_3_handle_ras_err_event_athub_intr_no_bifring +ffffffff82083330 t nbio_v4_3_init_ras_err_event_athub_interrupt +ffffffff82083370 t nbio_v4_3_set_ras_err_event_athub_irq_state +ffffffff82083490 t nbio_v4_3_process_err_event_athub_irq +ffffffff82084000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff82084040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff82084080 t nbio_v6_1_get_pcie_index_offset +ffffffff820840c0 t nbio_v6_1_get_pcie_data_offset +ffffffff82084100 t nbio_v6_1_get_rev_id +ffffffff820841a0 t nbio_v6_1_mc_access_enable +ffffffff82084250 t nbio_v6_1_get_memsize +ffffffff820842c0 t nbio_v6_1_sdma_doorbell_range +ffffffff82084360 t nbio_v6_1_enable_doorbell_aperture +ffffffff82084470 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff820845f0 t nbio_v6_1_ih_doorbell_range +ffffffff82084720 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff820847d0 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff82084880 t nbio_v6_1_get_clockgating_state +ffffffff82084910 t nbio_v6_1_ih_control +ffffffff82084a80 t nbio_v6_1_init_registers +ffffffff82084b60 t nbio_v6_1_remap_hdp_registers +ffffffff82084c80 t nbio_v6_1_program_aspm +ffffffff82086000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff82086040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff82086080 t nbio_v7_0_get_pcie_index_offset +ffffffff820860c0 t nbio_v7_0_get_pcie_data_offset +ffffffff82086100 t nbio_v7_0_get_rev_id +ffffffff820861a0 t nbio_v7_0_mc_access_enable +ffffffff82086250 t nbio_v7_0_get_memsize +ffffffff820862c0 t nbio_v7_0_sdma_doorbell_range +ffffffff82086360 t nbio_v7_0_vcn_doorbell_range +ffffffff820863e0 t nbio_v7_0_enable_doorbell_aperture +ffffffff820864f0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff82086520 t nbio_v7_0_ih_doorbell_range +ffffffff82086650 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff82086790 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff82086840 t nbio_v7_0_get_clockgating_state +ffffffff820868d0 t nbio_v7_0_ih_control +ffffffff82086a40 t nbio_v7_0_init_registers +ffffffff82086a90 t nbio_v7_0_remap_hdp_registers +ffffffff82086bb0 t nbio_7_0_read_syshub_ind_mmr +ffffffff82086c90 t nbio_7_0_write_syshub_ind_mmr +ffffffff82087000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff82087040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff82087080 t nbio_v7_2_get_pcie_index_offset +ffffffff820870c0 t nbio_v7_2_get_pcie_data_offset +ffffffff82087100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff82087130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff82087170 t nbio_v7_2_get_rev_id +ffffffff82087260 t nbio_v7_2_mc_access_enable +ffffffff820873a0 t nbio_v7_2_get_memsize +ffffffff82087410 t nbio_v7_2_sdma_doorbell_range +ffffffff820874b0 t nbio_v7_2_vcn_doorbell_range +ffffffff82087540 t nbio_v7_2_enable_doorbell_aperture +ffffffff82087630 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff820877b0 t nbio_v7_2_ih_doorbell_range +ffffffff82087840 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff82087900 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff82087ab0 t nbio_v7_2_get_clockgating_state +ffffffff82087b50 t nbio_v7_2_ih_control +ffffffff82087cc0 t nbio_v7_2_init_registers +ffffffff82087ea0 t nbio_v7_2_remap_hdp_registers +ffffffff82088000 t nbio_v7_4_query_ras_error_count +ffffffff820881d0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff82088480 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff82088650 t nbio_v7_4_init_ras_controller_interrupt +ffffffff82088690 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff820886d0 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff82088710 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff82088750 t nbio_v7_4_get_pcie_index_offset +ffffffff82088790 t nbio_v7_4_get_pcie_data_offset +ffffffff820887d0 t nbio_v7_4_get_rev_id +ffffffff820888b0 t nbio_v7_4_mc_access_enable +ffffffff82088960 t nbio_v7_4_get_memsize +ffffffff820889d0 t nbio_v7_4_sdma_doorbell_range +ffffffff82088aa0 t nbio_v7_4_vcn_doorbell_range +ffffffff82088b50 t nbio_v7_4_enable_doorbell_aperture +ffffffff82088c60 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff82088de0 t nbio_v7_4_ih_doorbell_range +ffffffff82088f10 t nbio_v7_4_enable_doorbell_interrupt +ffffffff82089070 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff820890a0 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff82089150 t nbio_v7_4_get_clockgating_state +ffffffff820891e0 t nbio_v7_4_ih_control +ffffffff82089350 t nbio_v7_4_init_registers +ffffffff82089450 t nbio_v7_4_remap_hdp_registers +ffffffff82089570 t nbio_v7_4_program_aspm +ffffffff82089a20 t nbio_v7_4_set_ras_controller_irq_state +ffffffff82089bd0 t nbio_v7_4_process_ras_controller_irq +ffffffff82089c00 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff82089db0 t nbio_v7_4_process_err_event_athub_irq +ffffffff8208a000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff8208a040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff8208a080 t nbio_v7_7_get_pcie_index_offset +ffffffff8208a0c0 t nbio_v7_7_get_pcie_data_offset +ffffffff8208a100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff8208a130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff8208a170 t nbio_v7_7_get_rev_id +ffffffff8208a210 t nbio_v7_7_mc_access_enable +ffffffff8208a2c0 t nbio_v7_7_get_memsize +ffffffff8208a330 t nbio_v7_7_sdma_doorbell_range +ffffffff8208a3d0 t nbio_v7_7_vcn_doorbell_range +ffffffff8208a460 t nbio_v7_7_enable_doorbell_aperture +ffffffff8208a550 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff8208a6d0 t nbio_v7_7_ih_doorbell_range +ffffffff8208a800 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff8208a950 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff8208ab80 t nbio_v7_7_get_clockgating_state +ffffffff8208acc0 t nbio_v7_7_ih_control +ffffffff8208ae30 t nbio_v7_7_init_registers +ffffffff8208af50 t nbio_v7_7_remap_hdp_registers +ffffffff8208c000 t nbio_v7_9_get_hdp_flush_req_offset +ffffffff8208c040 t nbio_v7_9_get_hdp_flush_done_offset +ffffffff8208c080 t nbio_v7_9_get_pcie_index_offset +ffffffff8208c0c0 t nbio_v7_9_get_pcie_data_offset +ffffffff8208c100 t nbio_v7_9_get_pcie_index_hi_offset +ffffffff8208c140 t nbio_v7_9_get_rev_id +ffffffff8208c1e0 t nbio_v7_9_mc_access_enable +ffffffff8208c290 t nbio_v7_9_get_memsize +ffffffff8208c300 t nbio_v7_9_sdma_doorbell_range +ffffffff8208c680 t nbio_v7_9_vcn_doorbell_range +ffffffff8208c840 t nbio_v7_9_enable_doorbell_aperture +ffffffff8208c9d0 t nbio_v7_9_enable_doorbell_selfring_aperture +ffffffff8208cb50 t nbio_v7_9_ih_doorbell_range +ffffffff8208cc70 t nbio_v7_9_enable_doorbell_interrupt +ffffffff8208cd90 t nbio_v7_9_update_medium_grain_clock_gating +ffffffff8208cdc0 t nbio_v7_9_update_medium_grain_light_sleep +ffffffff8208cdf0 t nbio_v7_9_get_clockgating_state +ffffffff8208ce20 t nbio_v7_9_ih_control +ffffffff8208cf90 t nbio_v7_9_init_registers +ffffffff8208d320 t nbio_v7_9_remap_hdp_registers +ffffffff8208d440 t nbio_v7_9_get_compute_partition_mode +ffffffff8208d4e0 t nbio_v7_9_get_memory_partition_mode +ffffffff8208d5e0 t nbio_v7_9_get_pcie_replay_count +ffffffff8208d640 t nbio_v7_9_get_pcie_usage +ffffffff8208d800 t nbio_v7_9_query_ras_error_count +ffffffff8208d830 t nbio_v7_9_handle_ras_controller_intr_no_bifring +ffffffff8208d980 t nbio_v7_9_handle_ras_err_event_athub_intr_no_bifring +ffffffff8208dac0 t nbio_v7_9_init_ras_controller_interrupt +ffffffff8208db00 t nbio_v7_9_init_ras_err_event_athub_interrupt +ffffffff8208db40 t nbio_v7_9_set_ras_controller_irq_state +ffffffff8208db70 t nbio_v7_9_process_ras_controller_irq +ffffffff8208dba0 t nbio_v7_9_set_ras_err_event_athub_irq_state +ffffffff8208dbd0 t nbio_v7_9_process_err_event_athub_irq +ffffffff8208e000 T nv_grbm_select +ffffffff8208e0a0 T nv_set_virt_ops +ffffffff8208e0e0 t nv_common_early_init +ffffffff8208e4e0 t nv_common_late_init +ffffffff8208e5a0 t nv_common_sw_init +ffffffff8208e5f0 t nv_common_sw_fini +ffffffff8208e620 t nv_common_hw_init +ffffffff8208e750 t nv_common_hw_fini +ffffffff8208e7c0 t nv_common_suspend +ffffffff8208e830 t nv_common_resume +ffffffff8208e870 t nv_common_is_idle +ffffffff8208e8a0 t nv_common_wait_for_idle +ffffffff8208e8d0 t nv_common_soft_reset +ffffffff8208e900 t nv_common_set_clockgating_state +ffffffff8208e9f0 t nv_common_set_powergating_state +ffffffff8208ea20 t nv_common_get_clockgating_state +ffffffff8208eaa0 t nv_didt_rreg +ffffffff8208eb60 t nv_didt_wreg +ffffffff8208ec00 t nv_read_disabled_bios +ffffffff8208ec30 t nv_read_register +ffffffff8208ed30 t nv_asic_reset +ffffffff8208eec0 t nv_asic_reset_method +ffffffff8208efc0 t nv_get_xclk +ffffffff8208eff0 t nv_set_uvd_clocks +ffffffff8208f020 t nv_set_vce_clocks +ffffffff8208f050 t nv_get_config_memsize +ffffffff8208f070 t nv_need_full_reset +ffffffff8208f0a0 t nv_init_doorbell_index +ffffffff8208f1d0 t nv_need_reset_on_init +ffffffff8208f280 t nv_pre_asic_init +ffffffff8208f2b0 t nv_update_umd_stable_pstate +ffffffff8208f380 t nv_query_video_codecs +ffffffff82090000 T psp_v10_0_set_psp_funcs +ffffffff82090030 t psp_v10_0_init_microcode +ffffffff82090120 t psp_v10_0_ring_create +ffffffff82090510 t psp_v10_0_ring_stop +ffffffff820907c0 t psp_v10_0_ring_destroy +ffffffff82090850 t psp_v10_0_mode1_reset +ffffffff820908a0 t psp_v10_0_ring_get_wptr +ffffffff82090900 t psp_v10_0_ring_set_wptr +ffffffff82091000 T psp_v11_0_set_psp_funcs +ffffffff82091030 t psp_v11_0_init_microcode +ffffffff820911e0 t psp_v11_0_bootloader_load_kdb +ffffffff82091200 t psp_v11_0_bootloader_load_spl +ffffffff82091220 t psp_v11_0_bootloader_load_sysdrv +ffffffff82091240 t psp_v11_0_bootloader_load_sos +ffffffff82091690 t psp_v11_0_ring_create +ffffffff82091f10 t psp_v11_0_ring_stop +ffffffff820921f0 t psp_v11_0_ring_destroy +ffffffff82092280 t psp_v11_0_mode1_reset +ffffffff820923b0 t psp_v11_0_memory_training +ffffffff82092940 t psp_v11_0_ring_get_wptr +ffffffff82092990 t psp_v11_0_ring_set_wptr +ffffffff82092af0 t psp_v11_0_load_usbc_pd_fw +ffffffff82092d20 t psp_v11_0_read_usbc_pd_fw +ffffffff82092e60 t psp_v11_0_bootloader_load_component +ffffffff82093050 t psp_v11_0_wait_for_bootloader +ffffffff82093270 t psp_v11_0_memory_training_send_msg +ffffffff82094000 T psp_v11_0_8_set_psp_funcs +ffffffff82094030 t psp_v11_0_8_ring_create +ffffffff820948b0 t psp_v11_0_8_ring_stop +ffffffff82094db0 t psp_v11_0_8_ring_destroy +ffffffff82094e40 t psp_v11_0_8_ring_get_wptr +ffffffff82094eb0 t psp_v11_0_8_ring_set_wptr +ffffffff82095000 T psp_v12_0_set_psp_funcs +ffffffff82095030 t psp_v12_0_init_microcode +ffffffff82095100 t psp_v12_0_bootloader_load_sysdrv +ffffffff82095520 t psp_v12_0_bootloader_load_sos +ffffffff82095990 t psp_v12_0_ring_create +ffffffff82096670 t psp_v12_0_ring_stop +ffffffff82096950 t psp_v12_0_ring_destroy +ffffffff820969e0 t psp_v12_0_mode1_reset +ffffffff82096b10 t psp_v12_0_ring_get_wptr +ffffffff82096b80 t psp_v12_0_ring_set_wptr +ffffffff82097000 T psp_v13_0_set_psp_funcs +ffffffff82097030 t psp_v13_0_init_microcode +ffffffff82097160 t psp_v13_0_wait_for_bootloader_steady_state +ffffffff82097290 t psp_v13_0_bootloader_load_kdb +ffffffff820972b0 t psp_v13_0_bootloader_load_spl +ffffffff820972d0 t psp_v13_0_bootloader_load_sysdrv +ffffffff820972f0 t psp_v13_0_bootloader_load_soc_drv +ffffffff82097310 t psp_v13_0_bootloader_load_intf_drv +ffffffff82097330 t psp_v13_0_bootloader_load_dbg_drv +ffffffff82097350 t psp_v13_0_bootloader_load_ras_drv +ffffffff82097370 t psp_v13_0_bootloader_load_sos +ffffffff82097830 t psp_v13_0_ring_create +ffffffff820980b0 t psp_v13_0_ring_stop +ffffffff820985b0 t psp_v13_0_ring_destroy +ffffffff82098640 t psp_v13_0_memory_training +ffffffff82098b20 t psp_v13_0_ring_get_wptr +ffffffff82098b90 t psp_v13_0_ring_set_wptr +ffffffff82098ca0 t psp_v13_0_load_usbc_pd_fw +ffffffff82098ed0 t psp_v13_0_read_usbc_pd_fw +ffffffff82099010 t psp_v13_0_update_spirom +ffffffff82099230 t psp_v13_0_vbflash_status +ffffffff82099290 t psp_v13_0_fatal_error_recovery_quirk +ffffffff820993f0 t psp_v13_0_bootloader_load_component +ffffffff820996b0 t psp_v13_0_memory_training_send_msg +ffffffff82099830 t psp_v13_0_exec_spi_cmd +ffffffff8209a000 T psp_v13_0_4_set_psp_funcs +ffffffff8209a030 t psp_v13_0_4_init_microcode +ffffffff8209a0f0 t psp_v13_0_4_bootloader_load_kdb +ffffffff8209a110 t psp_v13_0_4_bootloader_load_spl +ffffffff8209a130 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff8209a150 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff8209a170 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff8209a190 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff8209a1b0 t psp_v13_0_4_bootloader_load_sos +ffffffff8209a620 t psp_v13_0_4_ring_create +ffffffff8209aeb0 t psp_v13_0_4_ring_stop +ffffffff8209b3c0 t psp_v13_0_4_ring_destroy +ffffffff8209b450 t psp_v13_0_4_ring_get_wptr +ffffffff8209b4c0 t psp_v13_0_4_ring_set_wptr +ffffffff8209b5e0 t psp_v13_0_4_bootloader_load_component +ffffffff8209b7f0 t psp_v13_0_4_wait_for_bootloader +ffffffff8209c000 T psp_v3_1_set_psp_funcs +ffffffff8209c030 t psp_v3_1_init_microcode +ffffffff8209c0f0 t psp_v3_1_bootloader_load_sysdrv +ffffffff8209c510 t psp_v3_1_bootloader_load_sos +ffffffff8209c980 t psp_v3_1_ring_create +ffffffff8209d840 t psp_v3_1_ring_stop +ffffffff8209db20 t psp_v3_1_ring_destroy +ffffffff8209dbb0 t psp_v3_1_smu_reload_quirk +ffffffff8209dc00 t psp_v3_1_mode1_reset +ffffffff8209dd30 t psp_v3_1_ring_get_wptr +ffffffff8209dd80 t psp_v3_1_ring_set_wptr +ffffffff8209e000 t sdma_v2_4_early_init +ffffffff8209e0f0 t sdma_v2_4_sw_init +ffffffff8209e520 t sdma_v2_4_sw_fini +ffffffff8209e5f0 t sdma_v2_4_hw_init +ffffffff8209eaa0 t sdma_v2_4_hw_fini +ffffffff8209eaf0 t sdma_v2_4_suspend +ffffffff8209eb40 t sdma_v2_4_resume +ffffffff8209eb50 t sdma_v2_4_is_idle +ffffffff8209eba0 t sdma_v2_4_wait_for_idle +ffffffff8209ec50 t sdma_v2_4_soft_reset +ffffffff8209ee00 t sdma_v2_4_set_clockgating_state +ffffffff8209ee30 t sdma_v2_4_set_powergating_state +ffffffff8209ee60 t sdma_v2_4_ring_get_rptr +ffffffff8209eea0 t sdma_v2_4_ring_get_wptr +ffffffff8209ef00 t sdma_v2_4_ring_set_wptr +ffffffff8209ef40 t sdma_v2_4_ring_emit_ib +ffffffff8209f220 t sdma_v2_4_ring_emit_fence +ffffffff8209f670 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff8209f920 t sdma_v2_4_ring_emit_vm_flush +ffffffff8209fbd0 t sdma_v2_4_ring_emit_hdp_flush +ffffffff8209fe80 t sdma_v2_4_ring_test_ring +ffffffff820a01b0 t sdma_v2_4_ring_test_ib +ffffffff820a03c0 t sdma_v2_4_ring_insert_nop +ffffffff820a0500 t sdma_v2_4_ring_pad_ib +ffffffff820a0630 t sdma_v2_4_ring_emit_wreg +ffffffff820a0790 t sdma_v2_4_emit_copy_buffer +ffffffff820a0850 t sdma_v2_4_emit_fill_buffer +ffffffff820a08e0 t sdma_v2_4_vm_copy_pte +ffffffff820a09a0 t sdma_v2_4_vm_write_pte +ffffffff820a0a70 t sdma_v2_4_vm_set_pte_pde +ffffffff820a0b70 t sdma_v2_4_set_trap_irq_state +ffffffff820a0c60 t sdma_v2_4_process_trap_irq +ffffffff820a0d00 t sdma_v2_4_process_illegal_inst_irq +ffffffff820a0d80 t sdma_v2_4_enable +ffffffff820a1000 t sdma_v3_0_early_init +ffffffff820a1100 t sdma_v3_0_sw_init +ffffffff820a1530 t sdma_v3_0_sw_fini +ffffffff820a1600 t sdma_v3_0_hw_init +ffffffff820a1770 t sdma_v3_0_hw_fini +ffffffff820a17d0 t sdma_v3_0_suspend +ffffffff820a1830 t sdma_v3_0_resume +ffffffff820a1840 t sdma_v3_0_is_idle +ffffffff820a1890 t sdma_v3_0_wait_for_idle +ffffffff820a1940 t sdma_v3_0_check_soft_reset +ffffffff820a19a0 t sdma_v3_0_pre_soft_reset +ffffffff820a1a00 t sdma_v3_0_soft_reset +ffffffff820a1b00 t sdma_v3_0_post_soft_reset +ffffffff820a1b50 t sdma_v3_0_set_clockgating_state +ffffffff820a1e00 t sdma_v3_0_set_powergating_state +ffffffff820a1e30 t sdma_v3_0_get_clockgating_state +ffffffff820a1ed0 t sdma_v3_0_ring_get_rptr +ffffffff820a1f10 t sdma_v3_0_ring_get_wptr +ffffffff820a1f90 t sdma_v3_0_ring_set_wptr +ffffffff820a2040 t sdma_v3_0_ring_emit_ib +ffffffff820a2320 t sdma_v3_0_ring_emit_fence +ffffffff820a2770 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff820a2a20 t sdma_v3_0_ring_emit_vm_flush +ffffffff820a2cd0 t sdma_v3_0_ring_emit_hdp_flush +ffffffff820a2f80 t sdma_v3_0_ring_test_ring +ffffffff820a32b0 t sdma_v3_0_ring_test_ib +ffffffff820a34c0 t sdma_v3_0_ring_insert_nop +ffffffff820a3600 t sdma_v3_0_ring_pad_ib +ffffffff820a3730 t sdma_v3_0_ring_emit_wreg +ffffffff820a3890 t sdma_v3_0_emit_copy_buffer +ffffffff820a3950 t sdma_v3_0_emit_fill_buffer +ffffffff820a39e0 t sdma_v3_0_vm_copy_pte +ffffffff820a3aa0 t sdma_v3_0_vm_write_pte +ffffffff820a3b70 t sdma_v3_0_vm_set_pte_pde +ffffffff820a3c70 t sdma_v3_0_set_trap_irq_state +ffffffff820a3d60 t sdma_v3_0_process_trap_irq +ffffffff820a3e00 t sdma_v3_0_process_illegal_inst_irq +ffffffff820a3e80 t sdma_v3_0_ctx_switch_enable +ffffffff820a4050 t sdma_v3_0_enable +ffffffff820a4200 t sdma_v3_0_gfx_resume +ffffffff820a5000 t sdma_v4_0_early_init +ffffffff820a52f0 t sdma_v4_0_late_init +ffffffff820a55b0 t sdma_v4_0_sw_init +ffffffff820a5a60 t sdma_v4_0_sw_fini +ffffffff820a5b30 t sdma_v4_0_hw_init +ffffffff820a8cf0 t sdma_v4_0_hw_fini +ffffffff820a8df0 t sdma_v4_0_suspend +ffffffff820a8e50 t sdma_v4_0_resume +ffffffff820a8ee0 t sdma_v4_0_is_idle +ffffffff820a9010 t sdma_v4_0_wait_for_idle +ffffffff820a91c0 t sdma_v4_0_soft_reset +ffffffff820a91f0 t sdma_v4_0_set_clockgating_state +ffffffff820a9720 t sdma_v4_0_set_powergating_state +ffffffff820a9800 t sdma_v4_0_get_clockgating_state +ffffffff820a98b0 t sdma_v4_0_query_ras_error_count +ffffffff820a9aa0 t sdma_v4_0_reset_ras_error_count +ffffffff820a9c20 t sdma_v4_0_ring_get_rptr +ffffffff820a9c80 t sdma_v4_0_ring_get_wptr +ffffffff820a9e90 t sdma_v4_0_ring_set_wptr +ffffffff820aa140 t sdma_v4_0_ring_emit_ib +ffffffff820aa420 t sdma_v4_0_ring_emit_fence +ffffffff820aa890 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff820aa8f0 t sdma_v4_0_ring_emit_vm_flush +ffffffff820aa910 t sdma_v4_0_ring_emit_hdp_flush +ffffffff820aa9d0 t sdma_v4_0_ring_test_ring +ffffffff820aad00 t sdma_v4_0_ring_test_ib +ffffffff820aaf10 t sdma_v4_0_ring_insert_nop +ffffffff820ab050 t sdma_v4_0_ring_pad_ib +ffffffff820ab180 t sdma_v4_0_ring_emit_wreg +ffffffff820ab2e0 t sdma_v4_0_ring_emit_reg_wait +ffffffff820ab330 t sdma_v4_0_wait_reg_mem +ffffffff820ab680 t sdma_v4_0_page_ring_get_wptr +ffffffff820ab840 t sdma_v4_0_page_ring_set_wptr +ffffffff820aba10 t sdma_v4_0_emit_copy_buffer +ffffffff820abad0 t sdma_v4_0_emit_fill_buffer +ffffffff820abb60 t sdma_v4_0_vm_copy_pte +ffffffff820abc20 t sdma_v4_0_vm_write_pte +ffffffff820abcf0 t sdma_v4_0_vm_set_pte_pde +ffffffff820abdf0 t sdma_v4_0_set_trap_irq_state +ffffffff820abfa0 t sdma_v4_0_process_trap_irq +ffffffff820ac100 t sdma_v4_0_process_illegal_inst_irq +ffffffff820ac220 t sdma_v4_0_set_ecc_irq_state +ffffffff820ac3d0 t sdma_v4_0_process_vm_hole_irq +ffffffff820ac420 t sdma_v4_0_print_iv_entry +ffffffff820ac570 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff820ac5c0 t sdma_v4_0_process_pool_timeout_irq +ffffffff820ac610 t sdma_v4_0_process_srbm_write_irq +ffffffff820ac660 t sdma_v4_0_process_ras_data_cb +ffffffff820ac6e0 t sdma_v4_0_ctx_switch_enable +ffffffff820ace00 t sdma_v4_0_enable +ffffffff820ad3f0 t sdma_v4_0_gfx_enable +ffffffff820ae000 t sdma_v4_4_query_ras_error_count +ffffffff820ae2b0 t sdma_v4_4_reset_ras_error_count +ffffffff820af000 t sdma_v4_4_2_early_init +ffffffff820af2b0 t sdma_v4_4_2_late_init +ffffffff820af340 t sdma_v4_4_2_sw_init +ffffffff820af920 t sdma_v4_4_2_sw_fini +ffffffff820af9f0 t sdma_v4_4_2_hw_init +ffffffff820afa40 t sdma_v4_4_2_hw_fini +ffffffff820afb20 t sdma_v4_4_2_suspend +ffffffff820afc30 t sdma_v4_4_2_resume +ffffffff820afc80 t sdma_v4_4_2_is_idle +ffffffff820afd30 t sdma_v4_4_2_wait_for_idle +ffffffff820afe60 t sdma_v4_4_2_soft_reset +ffffffff820afe90 t sdma_v4_4_2_set_clockgating_state +ffffffff820b0350 t sdma_v4_4_2_set_powergating_state +ffffffff820b0380 t sdma_v4_4_2_get_clockgating_state +ffffffff820b0480 t sdma_v4_4_2_xcp_suspend +ffffffff820b0570 t sdma_v4_4_2_xcp_resume +ffffffff820b05b0 t sdma_v4_4_2_ring_get_rptr +ffffffff820b0630 t sdma_v4_4_2_ring_get_wptr +ffffffff820b0790 t sdma_v4_4_2_ring_set_wptr +ffffffff820b0990 t sdma_v4_4_2_ring_emit_ib +ffffffff820b0c70 t sdma_v4_4_2_ring_emit_fence +ffffffff820b10e0 t sdma_v4_4_2_ring_emit_pipeline_sync +ffffffff820b1140 t sdma_v4_4_2_ring_emit_vm_flush +ffffffff820b1160 t sdma_v4_4_2_ring_emit_hdp_flush +ffffffff820b1230 t sdma_v4_4_2_ring_test_ring +ffffffff820b1560 t sdma_v4_4_2_ring_test_ib +ffffffff820b1770 t sdma_v4_4_2_ring_insert_nop +ffffffff820b18b0 t sdma_v4_4_2_ring_pad_ib +ffffffff820b19e0 t sdma_v4_4_2_ring_emit_wreg +ffffffff820b1b40 t sdma_v4_4_2_ring_emit_reg_wait +ffffffff820b1b90 t sdma_v4_4_2_wait_reg_mem +ffffffff820b1ee0 t sdma_v4_4_2_page_ring_get_wptr +ffffffff820b2000 t sdma_v4_4_2_page_ring_set_wptr +ffffffff820b2130 t sdma_v4_4_2_emit_copy_buffer +ffffffff820b21f0 t sdma_v4_4_2_emit_fill_buffer +ffffffff820b2280 t sdma_v4_4_2_vm_copy_pte +ffffffff820b2340 t sdma_v4_4_2_vm_write_pte +ffffffff820b2410 t sdma_v4_4_2_vm_set_pte_pde +ffffffff820b2510 t sdma_v4_4_2_set_trap_irq_state +ffffffff820b2610 t sdma_v4_4_2_process_trap_irq +ffffffff820b2740 t sdma_v4_4_2_process_illegal_inst_irq +ffffffff820b27e0 t sdma_v4_4_2_set_ecc_irq_state +ffffffff820b28f0 t sdma_v4_4_2_process_vm_hole_irq +ffffffff820b29e0 t sdma_v4_4_2_process_doorbell_invalid_irq +ffffffff820b2ad0 t sdma_v4_4_2_process_pool_timeout_irq +ffffffff820b2bc0 t sdma_v4_4_2_process_srbm_write_irq +ffffffff820b2cb0 t sdma_v4_4_2_query_ras_error_count +ffffffff820b2e30 t sdma_v4_4_2_reset_ras_error_count +ffffffff820b2fa0 t sdma_v4_4_2_inst_init_golden_registers +ffffffff820b3170 t sdma_v4_4_2_inst_start +ffffffff820b49a0 t sdma_v4_4_2_inst_ctx_switch_enable +ffffffff820b4cf0 t sdma_v4_4_2_inst_enable +ffffffff820b6000 t sdma_v5_0_early_init +ffffffff820b6130 t sdma_v5_0_sw_init +ffffffff820b6350 t sdma_v5_0_sw_fini +ffffffff820b63f0 t sdma_v5_0_hw_init +ffffffff820b78c0 t sdma_v5_0_hw_fini +ffffffff820b7930 t sdma_v5_0_suspend +ffffffff820b79a0 t sdma_v5_0_resume +ffffffff820b79b0 t sdma_v5_0_is_idle +ffffffff820b7a50 t sdma_v5_0_wait_for_idle +ffffffff820b7b30 t sdma_v5_0_soft_reset +ffffffff820b7b60 t sdma_v5_0_set_clockgating_state +ffffffff820b7d80 t sdma_v5_0_set_powergating_state +ffffffff820b7db0 t sdma_v5_0_get_clockgating_state +ffffffff820b7e60 t sdma_v5_0_ring_get_rptr +ffffffff820b7ec0 t sdma_v5_0_ring_get_wptr +ffffffff820b8080 t sdma_v5_0_ring_set_wptr +ffffffff820b8430 t sdma_v5_0_ring_emit_ib +ffffffff820b8730 t sdma_v5_0_ring_emit_fence +ffffffff820b8be0 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff820b8e90 t sdma_v5_0_ring_emit_vm_flush +ffffffff820b8eb0 t sdma_v5_0_ring_emit_hdp_flush +ffffffff820b9180 t sdma_v5_0_ring_test_ring +ffffffff820b95b0 t sdma_v5_0_ring_test_ib +ffffffff820b9940 t sdma_v5_0_ring_insert_nop +ffffffff820b9a80 t sdma_v5_0_ring_pad_ib +ffffffff820b9bb0 t sdma_v5_0_ring_init_cond_exec +ffffffff820b9e00 t sdma_v5_0_ring_patch_cond_exec +ffffffff820b9ec0 t sdma_v5_0_ring_emit_wreg +ffffffff820ba020 t sdma_v5_0_ring_emit_reg_wait +ffffffff820ba2c0 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff820ba350 t sdma_v5_0_ring_preempt_ib +ffffffff820ba4e0 t sdma_v5_0_ring_emit_mem_sync +ffffffff820ba710 t sdma_v5_0_emit_copy_buffer +ffffffff820ba7d0 t sdma_v5_0_emit_fill_buffer +ffffffff820ba860 t sdma_v5_0_vm_copy_pte +ffffffff820ba920 t sdma_v5_0_vm_write_pte +ffffffff820ba9f0 t sdma_v5_0_vm_set_pte_pde +ffffffff820baaf0 t sdma_v5_0_set_trap_irq_state +ffffffff820bab90 t sdma_v5_0_process_trap_irq +ffffffff820bacd0 t sdma_v5_0_process_illegal_inst_irq +ffffffff820bad00 t sdma_v5_0_mqd_init +ffffffff820badf0 t sdma_v5_0_ctx_switch_enable +ffffffff820bb170 t sdma_v5_0_enable +ffffffff820bc000 t sdma_v5_2_early_init +ffffffff820bc130 t sdma_v5_2_sw_init +ffffffff820bc3f0 t sdma_v5_2_sw_fini +ffffffff820bc490 t sdma_v5_2_hw_init +ffffffff820be2c0 t sdma_v5_2_hw_fini +ffffffff820be330 t sdma_v5_2_suspend +ffffffff820be3a0 t sdma_v5_2_resume +ffffffff820be3b0 t sdma_v5_2_is_idle +ffffffff820be470 t sdma_v5_2_wait_for_idle +ffffffff820be5a0 t sdma_v5_2_soft_reset +ffffffff820be8c0 t sdma_v5_2_set_clockgating_state +ffffffff820bec60 t sdma_v5_2_set_powergating_state +ffffffff820bec90 t sdma_v5_2_get_clockgating_state +ffffffff820bed40 t sdma_v5_2_ring_get_rptr +ffffffff820beda0 t sdma_v5_2_ring_get_wptr +ffffffff820beef0 t sdma_v5_2_ring_set_wptr +ffffffff820bf0d0 t sdma_v5_2_ring_emit_ib +ffffffff820bf3d0 t sdma_v5_2_ring_emit_fence +ffffffff820bf880 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff820bfb30 t sdma_v5_2_ring_emit_vm_flush +ffffffff820bfb50 t sdma_v5_2_ring_emit_hdp_flush +ffffffff820bfe50 t sdma_v5_2_ring_test_ring +ffffffff820c0280 t sdma_v5_2_ring_test_ib +ffffffff820c0610 t sdma_v5_2_ring_insert_nop +ffffffff820c0750 t sdma_v5_2_ring_pad_ib +ffffffff820c0880 t sdma_v5_2_ring_init_cond_exec +ffffffff820c0ad0 t sdma_v5_2_ring_patch_cond_exec +ffffffff820c0b90 t sdma_v5_2_ring_begin_use +ffffffff820c0bb0 t sdma_v5_2_ring_end_use +ffffffff820c0bd0 t sdma_v5_2_ring_emit_wreg +ffffffff820c0d30 t sdma_v5_2_ring_emit_reg_wait +ffffffff820c0fd0 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff820c1060 t sdma_v5_2_ring_preempt_ib +ffffffff820c1220 t sdma_v5_2_ring_emit_mem_sync +ffffffff820c1450 t sdma_v5_2_emit_copy_buffer +ffffffff820c1510 t sdma_v5_2_emit_fill_buffer +ffffffff820c15a0 t sdma_v5_2_vm_copy_pte +ffffffff820c1660 t sdma_v5_2_vm_write_pte +ffffffff820c1730 t sdma_v5_2_vm_set_pte_pde +ffffffff820c1830 t sdma_v5_2_set_trap_irq_state +ffffffff820c18f0 t sdma_v5_2_process_trap_irq +ffffffff820c1a60 t sdma_v5_2_process_illegal_inst_irq +ffffffff820c1a90 t sdma_v5_2_mqd_init +ffffffff820c1b80 t sdma_v5_2_ctx_switch_enable +ffffffff820c1fd0 t sdma_v5_2_enable +ffffffff820c3000 t sdma_v6_0_early_init +ffffffff820c3120 t sdma_v6_0_sw_init +ffffffff820c3330 t sdma_v6_0_sw_fini +ffffffff820c33d0 t sdma_v6_0_hw_init +ffffffff820c33e0 t sdma_v6_0_hw_fini +ffffffff820c34d0 t sdma_v6_0_suspend +ffffffff820c3510 t sdma_v6_0_resume +ffffffff820c3520 t sdma_v6_0_is_idle +ffffffff820c35c0 t sdma_v6_0_wait_for_idle +ffffffff820c36a0 t sdma_v6_0_check_soft_reset +ffffffff820c3770 t sdma_v6_0_soft_reset +ffffffff820c3cc0 t sdma_v6_0_set_clockgating_state +ffffffff820c3cf0 t sdma_v6_0_set_powergating_state +ffffffff820c3d20 t sdma_v6_0_get_clockgating_state +ffffffff820c3d50 t sdma_v6_0_ring_get_rptr +ffffffff820c3db0 t sdma_v6_0_ring_get_wptr +ffffffff820c3e30 t sdma_v6_0_ring_set_wptr +ffffffff820c41e0 t sdma_v6_0_ring_emit_ib +ffffffff820c44e0 t sdma_v6_0_ring_emit_fence +ffffffff820c4990 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff820c4c40 t sdma_v6_0_ring_emit_vm_flush +ffffffff820c4ee0 t sdma_v6_0_ring_emit_hdp_flush +ffffffff820c51b0 t sdma_v6_0_ring_test_ring +ffffffff820c55e0 t sdma_v6_0_ring_test_ib +ffffffff820c5970 t sdma_v6_0_ring_insert_nop +ffffffff820c5ab0 t sdma_v6_0_ring_pad_ib +ffffffff820c5be0 t sdma_v6_0_ring_init_cond_exec +ffffffff820c5e30 t sdma_v6_0_ring_patch_cond_exec +ffffffff820c5ef0 t sdma_v6_0_ring_emit_wreg +ffffffff820c6050 t sdma_v6_0_ring_emit_reg_wait +ffffffff820c62f0 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff820c6380 t sdma_v6_0_ring_preempt_ib +ffffffff820c6510 t sdma_v6_0_ring_emit_mem_sync +ffffffff820c6740 t sdma_v6_0_emit_copy_buffer +ffffffff820c6800 t sdma_v6_0_emit_fill_buffer +ffffffff820c6890 t sdma_v6_0_vm_copy_pte +ffffffff820c6950 t sdma_v6_0_vm_write_pte +ffffffff820c6a20 t sdma_v6_0_vm_set_pte_pde +ffffffff820c6b20 t sdma_v6_0_set_trap_irq_state +ffffffff820c6bc0 t sdma_v6_0_process_trap_irq +ffffffff820c6d20 t sdma_v6_0_process_illegal_inst_irq +ffffffff820c6d50 t sdma_v6_0_mqd_init +ffffffff820c6e80 t sdma_v6_0_start +ffffffff820c71e0 t sdma_v6_0_enable +ffffffff820c7380 t sdma_v6_0_gfx_resume +ffffffff820c85c0 t sdma_v6_0_gfx_stop +ffffffff820c9000 T sienna_cichlid_reset_init +ffffffff820c90e0 t sienna_cichlid_async_reset +ffffffff820c9140 t sienna_cichlid_get_reset_handler +ffffffff820c91d0 T sienna_cichlid_reset_fini +ffffffff820c9230 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff820c93a0 t sienna_cichlid_mode2_perform_reset +ffffffff820c9430 t sienna_cichlid_mode2_restore_hwcontext +ffffffff820c97a0 t sienna_cichlid_mode2_reset +ffffffff820ca000 T smu_v11_0_i2c_control_init +ffffffff820ca0e0 T smu_v11_0_i2c_control_fini +ffffffff820ca120 t smu_v11_0_i2c_xfer +ffffffff820cb490 t smu_v11_0_i2c_func +ffffffff820cb4c0 t smu_v11_0_i2c_enable +ffffffff820cb620 t smu_v11_0_i2c_abort +ffffffff820cb740 t lock_bus +ffffffff820cb7f0 t trylock_bus +ffffffff820cb850 t unlock_bus +ffffffff820cc000 T smu_v13_0_10_reset_init +ffffffff820cc0e0 t smu_v13_0_10_async_reset +ffffffff820cc140 t smu_v13_0_10_get_reset_handler +ffffffff820cc1f0 T smu_v13_0_10_reset_fini +ffffffff820cc250 t smu_v13_0_10_mode2_prepare_hwcontext +ffffffff820cc3a0 t smu_v13_0_10_mode2_perform_reset +ffffffff820cc430 t smu_v13_0_10_mode2_restore_hwcontext +ffffffff820cc820 t smu_v13_0_10_mode2_reset +ffffffff820cd000 t smuio_v11_0_get_rom_index_offset +ffffffff820cd040 t smuio_v11_0_get_rom_data_offset +ffffffff820cd080 t smuio_v11_0_update_rom_clock_gating +ffffffff820cd1d0 t smuio_v11_0_get_clock_gating_state +ffffffff820ce000 t smuio_v11_0_6_get_rom_index_offset +ffffffff820ce040 t smuio_v11_0_6_get_rom_data_offset +ffffffff820ce080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff820ce1e0 t smuio_v11_0_6_get_clock_gating_state +ffffffff820cf000 t smuio_v13_0_get_rom_index_offset +ffffffff820cf040 t smuio_v13_0_get_rom_data_offset +ffffffff820cf080 t smuio_v13_0_update_rom_clock_gating +ffffffff820cf1e0 t smuio_v13_0_get_clock_gating_state +ffffffff820cf290 t smuio_v13_0_get_die_id +ffffffff820cf320 t smuio_v13_0_get_socket_id +ffffffff820cf3c0 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff820d0000 t smuio_v13_0_3_get_die_id +ffffffff820d00a0 t smuio_v13_0_3_get_socket_id +ffffffff820d0140 t smuio_v13_0_3_get_pkg_type +ffffffff820d1000 t smuio_v13_0_6_get_rom_index_offset +ffffffff820d1040 t smuio_v13_0_6_get_rom_data_offset +ffffffff820d2000 t smuio_v9_0_get_rom_index_offset +ffffffff820d2040 t smuio_v9_0_get_rom_data_offset +ffffffff820d2080 t smuio_v9_0_update_rom_clock_gating +ffffffff820d21e0 t smuio_v9_0_get_clock_gating_state +ffffffff820d3000 T soc15_grbm_select +ffffffff820d3090 T soc15_program_register_sequence +ffffffff820d32b0 T soc15_set_virt_ops +ffffffff820d3320 t soc15_common_early_init +ffffffff820d3750 t soc15_common_late_init +ffffffff820d37c0 t soc15_common_sw_init +ffffffff820d3820 t soc15_common_sw_fini +ffffffff820d3880 t soc15_common_hw_init +ffffffff820d39d0 t soc15_common_hw_fini +ffffffff820d3ad0 t soc15_common_suspend +ffffffff820d3b10 t soc15_common_resume +ffffffff820d3c00 t soc15_common_is_idle +ffffffff820d3c30 t soc15_common_wait_for_idle +ffffffff820d3c60 t soc15_common_soft_reset +ffffffff820d3c90 t soc15_common_set_clockgating_state +ffffffff820d4040 t soc15_common_set_powergating_state +ffffffff820d4070 t soc15_common_get_clockgating_state +ffffffff820d41b0 t soc15_uvd_ctx_rreg +ffffffff820d4280 t soc15_uvd_ctx_wreg +ffffffff820d4320 t soc15_didt_rreg +ffffffff820d43e0 t soc15_didt_wreg +ffffffff820d4480 t soc15_gc_cac_rreg +ffffffff820d45d0 t soc15_gc_cac_wreg +ffffffff820d4710 t soc15_se_cac_rreg +ffffffff820d4860 t soc15_se_cac_wreg +ffffffff820d49a0 t soc15_read_disabled_bios +ffffffff820d49d0 t soc15_read_register +ffffffff820d4ae0 t soc15_asic_reset +ffffffff820d4cb0 t soc15_asic_reset_method +ffffffff820d4e80 t soc15_get_xclk +ffffffff820d4ef0 t soc15_set_uvd_clocks +ffffffff820d4f20 t soc15_set_vce_clocks +ffffffff820d4f50 t soc15_get_config_memsize +ffffffff820d4f70 t soc15_need_full_reset +ffffffff820d4fa0 t soc15_get_pcie_usage +ffffffff820d5110 t soc15_need_reset_on_init +ffffffff820d51d0 t soc15_get_pcie_replay_count +ffffffff820d5250 t soc15_supports_baco +ffffffff820d52c0 t soc15_pre_asic_init +ffffffff820d52d0 t soc15_query_video_codecs +ffffffff820d53c0 t vega20_get_pcie_usage +ffffffff820d6000 T soc21_grbm_select +ffffffff820d6090 t soc21_common_early_init +ffffffff820d6210 t soc21_common_late_init +ffffffff820d6310 t soc21_common_sw_init +ffffffff820d6360 t soc21_common_sw_fini +ffffffff820d6390 t soc21_common_hw_init +ffffffff820d6470 t soc21_common_hw_fini +ffffffff820d6520 t soc21_common_suspend +ffffffff820d65d0 t soc21_common_resume +ffffffff820d67e0 t soc21_common_is_idle +ffffffff820d6810 t soc21_common_wait_for_idle +ffffffff820d6840 t soc21_common_soft_reset +ffffffff820d6870 t soc21_common_set_clockgating_state +ffffffff820d6930 t soc21_common_set_powergating_state +ffffffff820d69a0 t soc21_common_get_clockgating_state +ffffffff820d69f0 t soc21_didt_rreg +ffffffff820d6ab0 t soc21_didt_wreg +ffffffff820d6b50 t soc21_read_disabled_bios +ffffffff820d6b80 t soc21_read_register +ffffffff820d6c80 t soc21_asic_reset +ffffffff820d6d70 t soc21_asic_reset_method +ffffffff820d6e50 t soc21_get_xclk +ffffffff820d6e80 t soc21_set_uvd_clocks +ffffffff820d6eb0 t soc21_set_vce_clocks +ffffffff820d6ee0 t soc21_get_config_memsize +ffffffff820d6f00 t soc21_need_full_reset +ffffffff820d6f30 t soc21_init_doorbell_index +ffffffff820d7050 t soc21_need_reset_on_init +ffffffff820d7100 t soc21_pre_asic_init +ffffffff820d7130 t soc21_update_umd_stable_pstate +ffffffff820d71b0 t soc21_query_video_codecs +ffffffff820d8000 t tonga_ih_early_init +ffffffff820d8050 t tonga_ih_sw_init +ffffffff820d80e0 t tonga_ih_sw_fini +ffffffff820d8140 t tonga_ih_hw_init +ffffffff820d83c0 t tonga_ih_hw_fini +ffffffff820d8490 t tonga_ih_suspend +ffffffff820d8560 t tonga_ih_resume +ffffffff820d85a0 t tonga_ih_is_idle +ffffffff820d85f0 t tonga_ih_wait_for_idle +ffffffff820d86a0 t tonga_ih_check_soft_reset +ffffffff820d8700 t tonga_ih_pre_soft_reset +ffffffff820d87e0 t tonga_ih_soft_reset +ffffffff820d88e0 t tonga_ih_post_soft_reset +ffffffff820d8930 t tonga_ih_set_clockgating_state +ffffffff820d8960 t tonga_ih_set_powergating_state +ffffffff820d8990 t tonga_ih_get_wptr +ffffffff820d8ac0 t tonga_ih_decode_iv +ffffffff820d8b40 t tonga_ih_set_rptr +ffffffff820d9000 t umc_v6_0_init_registers +ffffffff820da000 t umc_v6_1_query_ras_error_count +ffffffff820da5c0 t umc_v6_1_query_ras_error_address +ffffffff820da8f0 t umc_v6_1_err_cnt_init +ffffffff820db000 T umc_v6_7_convert_error_address +ffffffff820db3a0 t umc_v6_7_query_ras_error_count +ffffffff820db3e0 t umc_v6_7_query_ras_error_address +ffffffff820db400 t umc_v6_7_query_ras_poison_mode +ffffffff820db460 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff820db480 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff820db4a0 t umc_v6_7_query_ecc_error_count +ffffffff820db7a0 t umc_v6_7_reset_error_count_per_channel +ffffffff820db8e0 t umc_v6_7_query_error_address +ffffffff820dba10 t umc_v6_7_ecc_info_querry_ecc_error_count +ffffffff820dbc20 t umc_v6_7_ecc_info_query_error_address +ffffffff820dc000 t umc_v8_10_query_ras_error_count +ffffffff820dc040 t umc_v8_10_query_ras_error_address +ffffffff820dc060 t umc_v8_10_err_cnt_init +ffffffff820dc080 t umc_v8_10_query_ras_poison_mode +ffffffff820dc0b0 t umc_v8_10_ecc_info_query_ras_error_count +ffffffff820dc0d0 t umc_v8_10_ecc_info_query_ras_error_address +ffffffff820dc0f0 t umc_v8_10_set_eeprom_table_version +ffffffff820dc120 t umc_v8_10_query_ecc_error_count +ffffffff820dc200 t umc_v8_10_clear_error_count_per_channel +ffffffff820dc270 t umc_v8_10_query_error_address +ffffffff820dc3b0 t umc_v8_10_convert_error_address +ffffffff820dc5e0 t umc_v8_10_err_cnt_init_per_channel +ffffffff820dc6b0 t umc_v8_10_ecc_info_query_ecc_error_count +ffffffff820dc7a0 t umc_v8_10_ecc_info_query_error_address +ffffffff820dd000 t umc_v8_7_query_ras_error_count +ffffffff820dd370 t umc_v8_7_query_ras_error_address +ffffffff820dd540 t umc_v8_7_err_cnt_init +ffffffff820dd6d0 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff820dd800 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff820de000 t uvd_v5_0_early_init +ffffffff820de050 t uvd_v5_0_sw_init +ffffffff820de170 t uvd_v5_0_sw_fini +ffffffff820de1d0 t uvd_v5_0_hw_init +ffffffff820de780 t uvd_v5_0_hw_fini +ffffffff820de810 t uvd_v5_0_suspend +ffffffff820de950 t uvd_v5_0_resume +ffffffff820de9b0 t uvd_v5_0_is_idle +ffffffff820dea00 t uvd_v5_0_wait_for_idle +ffffffff820dea90 t uvd_v5_0_soft_reset +ffffffff820deb80 t uvd_v5_0_set_clockgating_state +ffffffff820ded80 t uvd_v5_0_set_powergating_state +ffffffff820dedd0 t uvd_v5_0_get_clockgating_state +ffffffff820dee70 t uvd_v5_0_ring_get_rptr +ffffffff820deec0 t uvd_v5_0_ring_get_wptr +ffffffff820def10 t uvd_v5_0_ring_set_wptr +ffffffff820def40 t uvd_v5_0_ring_emit_ib +ffffffff820df1e0 t uvd_v5_0_ring_emit_fence +ffffffff820df800 t uvd_v5_0_ring_test_ring +ffffffff820df9d0 t uvd_v5_0_ring_insert_nop +ffffffff820dfb30 t uvd_v5_0_set_interrupt_state +ffffffff820dfb60 t uvd_v5_0_process_interrupt +ffffffff820dfbd0 t uvd_v5_0_stop +ffffffff820dfd50 t uvd_v5_0_start +ffffffff820e1000 t uvd_v6_0_early_init +ffffffff820e1190 t uvd_v6_0_sw_init +ffffffff820e1450 t uvd_v6_0_sw_fini +ffffffff820e1520 t uvd_v6_0_hw_init +ffffffff820e1b90 t uvd_v6_0_hw_fini +ffffffff820e1c20 t uvd_v6_0_suspend +ffffffff820e1d60 t uvd_v6_0_resume +ffffffff820e1dc0 t uvd_v6_0_is_idle +ffffffff820e1e10 t uvd_v6_0_wait_for_idle +ffffffff820e1ea0 t uvd_v6_0_check_soft_reset +ffffffff820e1f30 t uvd_v6_0_pre_soft_reset +ffffffff820e1f80 t uvd_v6_0_soft_reset +ffffffff820e2080 t uvd_v6_0_post_soft_reset +ffffffff820e2150 t uvd_v6_0_set_clockgating_state +ffffffff820e2340 t uvd_v6_0_set_powergating_state +ffffffff820e23c0 t uvd_v6_0_get_clockgating_state +ffffffff820e2470 t uvd_v6_0_ring_get_rptr +ffffffff820e24c0 t uvd_v6_0_ring_get_wptr +ffffffff820e2510 t uvd_v6_0_ring_set_wptr +ffffffff820e2540 t uvd_v6_0_ring_emit_ib +ffffffff820e28e0 t uvd_v6_0_ring_emit_fence +ffffffff820e2f00 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff820e3340 t uvd_v6_0_ring_emit_vm_flush +ffffffff820e36e0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff820e3710 t uvd_v6_0_ring_test_ring +ffffffff820e38e0 t uvd_v6_0_ring_insert_nop +ffffffff820e3a40 t uvd_v6_0_ring_emit_wreg +ffffffff820e3cf0 t uvd_v6_0_enc_ring_get_rptr +ffffffff820e3d50 t uvd_v6_0_enc_ring_get_wptr +ffffffff820e3db0 t uvd_v6_0_enc_ring_set_wptr +ffffffff820e3df0 t uvd_v6_0_enc_ring_emit_ib +ffffffff820e4060 t uvd_v6_0_enc_ring_emit_fence +ffffffff820e42c0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff820e4490 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff820e46c0 t uvd_v6_0_enc_ring_test_ring +ffffffff820e4830 t uvd_v6_0_enc_ring_test_ib +ffffffff820e4d90 t uvd_v6_0_enc_ring_insert_end +ffffffff820e4e20 t uvd_v6_0_set_interrupt_state +ffffffff820e4e50 t uvd_v6_0_process_interrupt +ffffffff820e4f50 t uvd_v6_0_stop +ffffffff820e50d0 t uvd_v6_0_start +ffffffff820e6000 t uvd_v7_0_early_init +ffffffff820e6290 t uvd_v7_0_sw_init +ffffffff820e6720 t uvd_v7_0_sw_fini +ffffffff820e6830 t uvd_v7_0_hw_init +ffffffff820e9d00 t uvd_v7_0_hw_fini +ffffffff820ea0b0 t uvd_v7_0_suspend +ffffffff820ea190 t uvd_v7_0_resume +ffffffff820ea1f0 t uvd_v7_0_set_clockgating_state +ffffffff820ea220 t uvd_v7_0_ring_get_rptr +ffffffff820ea2c0 t uvd_v7_0_ring_get_wptr +ffffffff820ea360 t uvd_v7_0_ring_set_wptr +ffffffff820ea3e0 t uvd_v7_0_ring_patch_cs_in_place +ffffffff820ea450 t uvd_v7_0_ring_emit_ib +ffffffff820ea840 t uvd_v7_0_ring_emit_fence +ffffffff820eaf00 t uvd_v7_0_ring_emit_vm_flush +ffffffff820eaf70 t uvd_v7_0_ring_emit_hdp_flush +ffffffff820eafa0 t uvd_v7_0_ring_test_ring +ffffffff820eb270 t uvd_v7_0_ring_insert_nop +ffffffff820eb410 t uvd_v7_0_ring_emit_wreg +ffffffff820eb700 t uvd_v7_0_ring_emit_reg_wait +ffffffff820ebae0 t uvd_v7_0_enc_ring_get_rptr +ffffffff820ebbe0 t uvd_v7_0_enc_ring_get_wptr +ffffffff820ebcf0 t uvd_v7_0_enc_ring_set_wptr +ffffffff820ebdf0 t uvd_v7_0_enc_ring_emit_ib +ffffffff820ec060 t uvd_v7_0_enc_ring_emit_fence +ffffffff820ec2c0 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff820ec330 t uvd_v7_0_enc_ring_test_ring +ffffffff820ec4b0 t uvd_v7_0_enc_ring_test_ib +ffffffff820eca10 t uvd_v7_0_enc_ring_insert_end +ffffffff820ecaa0 t uvd_v7_0_enc_ring_emit_wreg +ffffffff820ecc00 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff820ecdd0 t uvd_v7_0_set_interrupt_state +ffffffff820ece00 t uvd_v7_0_process_interrupt +ffffffff820ed000 t vce_v3_0_early_init +ffffffff820ed1a0 t vce_v3_0_sw_init +ffffffff820ed340 t vce_v3_0_sw_fini +ffffffff820ed3a0 t vce_v3_0_hw_init +ffffffff820ed4a0 t vce_v3_0_hw_fini +ffffffff820ed5a0 t vce_v3_0_suspend +ffffffff820ed6b0 t vce_v3_0_resume +ffffffff820ed7d0 t vce_v3_0_is_idle +ffffffff820ed840 t vce_v3_0_wait_for_idle +ffffffff820ed900 t vce_v3_0_check_soft_reset +ffffffff820eda30 t vce_v3_0_pre_soft_reset +ffffffff820edb00 t vce_v3_0_soft_reset +ffffffff820edc00 t vce_v3_0_post_soft_reset +ffffffff820edcd0 t vce_v3_0_set_clockgating_state +ffffffff820ee0b0 t vce_v3_0_set_powergating_state +ffffffff820eec00 t vce_v3_0_get_clockgating_state +ffffffff820eecf0 t vce_v3_0_ring_get_rptr +ffffffff820eede0 t vce_v3_0_ring_get_wptr +ffffffff820eeed0 t vce_v3_0_ring_set_wptr +ffffffff820eefa0 t vce_v3_0_ring_emit_ib +ffffffff820ef210 t vce_v3_0_emit_pipeline_sync +ffffffff820ef3e0 t vce_v3_0_emit_vm_flush +ffffffff820ef680 t vce_v3_0_set_interrupt_state +ffffffff820ef700 t vce_v3_0_process_interrupt +ffffffff820ef7e0 t vce_v3_0_stop +ffffffff820f0000 t vce_v4_0_early_init +ffffffff820f00c0 t vce_v4_0_sw_init +ffffffff820f03d0 t vce_v4_0_sw_fini +ffffffff820f0470 t vce_v4_0_hw_init +ffffffff820f0cc0 t vce_v4_0_hw_fini +ffffffff820f0e30 t vce_v4_0_suspend +ffffffff820f0fa0 t vce_v4_0_resume +ffffffff820f1070 t vce_v4_0_set_clockgating_state +ffffffff820f10a0 t vce_v4_0_set_powergating_state +ffffffff820f11b0 t vce_v4_0_ring_get_rptr +ffffffff820f1220 t vce_v4_0_ring_get_wptr +ffffffff820f12b0 t vce_v4_0_ring_set_wptr +ffffffff820f1340 t vce_v4_0_ring_emit_ib +ffffffff820f15b0 t vce_v4_0_ring_emit_fence +ffffffff820f1810 t vce_v4_0_emit_vm_flush +ffffffff820f1880 t vce_v4_0_ring_insert_end +ffffffff820f1910 t vce_v4_0_emit_wreg +ffffffff820f1a70 t vce_v4_0_emit_reg_wait +ffffffff820f1c40 t vce_v4_0_set_interrupt_state +ffffffff820f1cd0 t vce_v4_0_process_interrupt +ffffffff820f1d80 t vce_v4_0_start +ffffffff820f3000 T vcn_dec_sw_ring_emit_fence +ffffffff820f3260 T vcn_dec_sw_ring_insert_end +ffffffff820f32f0 T vcn_dec_sw_ring_emit_ib +ffffffff820f3560 T vcn_dec_sw_ring_emit_reg_wait +ffffffff820f3730 T vcn_dec_sw_ring_emit_vm_flush +ffffffff820f37a0 T vcn_dec_sw_ring_emit_wreg +ffffffff820f4000 T vcn_v1_0_set_pg_for_begin_use +ffffffff820f4160 T vcn_v1_0_ring_end_use +ffffffff820f41d0 t vcn_v1_0_early_init +ffffffff820f4340 t vcn_v1_0_sw_init +ffffffff820f4640 t vcn_v1_0_sw_fini +ffffffff820f46b0 t vcn_v1_0_hw_init +ffffffff820f47b0 t vcn_v1_0_hw_fini +ffffffff820f48d0 t vcn_v1_0_suspend +ffffffff820f4960 t vcn_v1_0_resume +ffffffff820f4a80 t vcn_v1_0_is_idle +ffffffff820f4b20 t vcn_v1_0_wait_for_idle +ffffffff820f4b60 t vcn_v1_0_set_clockgating_state +ffffffff820f4c30 t vcn_v1_0_set_powergating_state +ffffffff820f52a0 t vcn_v1_0_dec_ring_get_rptr +ffffffff820f5330 t vcn_v1_0_dec_ring_get_wptr +ffffffff820f53c0 t vcn_v1_0_dec_ring_set_wptr +ffffffff820f54e0 t vcn_v1_0_ring_patch_cs_in_place +ffffffff820f56d0 t vcn_v1_0_dec_ring_emit_ib +ffffffff820f5aa0 t vcn_v1_0_dec_ring_emit_fence +ffffffff820f6130 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff820f61a0 t vcn_v1_0_dec_ring_insert_nop +ffffffff820f6340 t vcn_v1_0_dec_ring_insert_start +ffffffff820f6530 t vcn_v1_0_dec_ring_insert_end +ffffffff820f6640 t vcn_v1_0_ring_begin_use +ffffffff820f6700 t vcn_v1_0_dec_ring_emit_wreg +ffffffff820f69e0 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff820f6da0 t vcn_v1_0_enc_ring_get_rptr +ffffffff820f6e80 t vcn_v1_0_enc_ring_get_wptr +ffffffff820f6f60 t vcn_v1_0_enc_ring_set_wptr +ffffffff820f7020 t vcn_v1_0_enc_ring_emit_ib +ffffffff820f7290 t vcn_v1_0_enc_ring_emit_fence +ffffffff820f74f0 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff820f7560 t vcn_v1_0_enc_ring_insert_end +ffffffff820f75f0 t vcn_v1_0_enc_ring_emit_wreg +ffffffff820f7750 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff820f7920 t vcn_v1_0_set_interrupt_state +ffffffff820f7950 t vcn_v1_0_process_interrupt +ffffffff820f7a10 t vcn_v1_0_idle_work_handler +ffffffff820f7bc0 t vcn_v1_0_pause_dpg_mode +ffffffff820f8c90 t vcn_v1_0_enable_clock_gating +ffffffff820f9130 t vcn_v1_0_disable_clock_gating +ffffffff820f9790 t vcn_1_0_enable_static_power_gating +ffffffff820f9960 t vcn_v1_0_start_dpg_mode +ffffffff820fe190 t vcn_v1_0_start_spg_mode +ffffffff821009f0 t vcn_v1_0_clock_gating_dpg_mode +ffffffff82102000 T vcn_v2_0_dec_ring_insert_start +ffffffff821021d0 T vcn_v2_0_dec_ring_insert_end +ffffffff821022d0 T vcn_v2_0_dec_ring_insert_nop +ffffffff82102450 T vcn_v2_0_dec_ring_emit_fence +ffffffff82102a80 T vcn_v2_0_dec_ring_emit_ib +ffffffff82102e20 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff821031b0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff82103220 T vcn_v2_0_dec_ring_emit_wreg +ffffffff821034d0 T vcn_v2_0_enc_ring_emit_fence +ffffffff82103730 T vcn_v2_0_enc_ring_insert_end +ffffffff821037c0 T vcn_v2_0_enc_ring_emit_ib +ffffffff82103a30 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff82103c00 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff82103c70 T vcn_v2_0_enc_ring_emit_wreg +ffffffff82103dd0 T vcn_v2_0_dec_ring_test_ring +ffffffff821040b0 t vcn_v2_0_early_init +ffffffff82104220 t vcn_v2_0_sw_init +ffffffff821045c0 t vcn_v2_0_sw_fini +ffffffff82104670 t vcn_v2_0_hw_init +ffffffff821050b0 t vcn_v2_0_hw_fini +ffffffff821051d0 t vcn_v2_0_suspend +ffffffff82105200 t vcn_v2_0_resume +ffffffff82105260 t vcn_v2_0_is_idle +ffffffff82105300 t vcn_v2_0_wait_for_idle +ffffffff82105340 t vcn_v2_0_set_clockgating_state +ffffffff821053f0 t vcn_v2_0_set_powergating_state +ffffffff82105ab0 t vcn_v2_0_dec_ring_get_rptr +ffffffff82105b40 t vcn_v2_0_dec_ring_get_wptr +ffffffff82105bf0 t vcn_v2_0_dec_ring_set_wptr +ffffffff82105d30 t vcn_v2_0_enc_ring_get_rptr +ffffffff82105e10 t vcn_v2_0_enc_ring_get_wptr +ffffffff82105f10 t vcn_v2_0_enc_ring_set_wptr +ffffffff82106000 t vcn_v2_0_set_interrupt_state +ffffffff82106030 t vcn_v2_0_process_interrupt +ffffffff821060f0 t vcn_v2_0_pause_dpg_mode +ffffffff821069c0 t vcn_v2_0_enable_clock_gating +ffffffff82106c80 t vcn_v2_0_disable_clock_gating +ffffffff82107110 t vcn_v2_0_start +ffffffff8210c0e0 t vcn_v2_0_enable_static_power_gating +ffffffff8210c260 t vcn_v2_0_clock_gating_dpg_mode +ffffffff8210d140 t vcn_v2_0_mc_resume_dpg_mode +ffffffff82112000 t vcn_v2_6_query_poison_status +ffffffff821120e0 t vcn_v2_5_early_init +ffffffff821123e0 t vcn_v2_5_sw_init +ffffffff82112930 t vcn_v2_5_sw_fini +ffffffff82112a20 t vcn_v2_5_hw_init +ffffffff82113530 t vcn_v2_5_hw_fini +ffffffff821136e0 t vcn_v2_5_suspend +ffffffff82113710 t vcn_v2_5_resume +ffffffff82113770 t vcn_v2_5_is_idle +ffffffff82113870 t vcn_v2_5_wait_for_idle +ffffffff82113920 t vcn_v2_5_set_clockgating_state +ffffffff821139b0 t vcn_v2_5_set_powergating_state +ffffffff821161b0 t vcn_v2_5_dec_ring_get_rptr +ffffffff82116250 t vcn_v2_5_dec_ring_get_wptr +ffffffff82116310 t vcn_v2_5_dec_ring_set_wptr +ffffffff821163c0 t vcn_v2_5_enc_ring_get_rptr +ffffffff821164c0 t vcn_v2_5_enc_ring_get_wptr +ffffffff821165d0 t vcn_v2_5_enc_ring_set_wptr +ffffffff821166e0 t vcn_v2_5_set_interrupt_state +ffffffff82116710 t vcn_v2_5_process_interrupt +ffffffff82116830 t vcn_v2_6_set_ras_interrupt_state +ffffffff82116860 t vcn_v2_5_pause_dpg_mode +ffffffff821170a0 t vcn_v2_5_enable_clock_gating +ffffffff82117400 t vcn_v2_5_disable_clock_gating +ffffffff82117970 t vcn_v2_5_start_dpg_mode +ffffffff8211b910 t vcn_v2_5_clock_gating_dpg_mode +ffffffff8211c820 t vcn_v2_5_mc_resume_dpg_mode +ffffffff82122000 t vcn_v3_0_early_init +ffffffff82122230 t vcn_v3_0_sw_init +ffffffff82122750 t vcn_v3_0_sw_fini +ffffffff82122850 t vcn_v3_0_hw_init +ffffffff82123470 t vcn_v3_0_hw_fini +ffffffff82123590 t vcn_v3_0_suspend +ffffffff821235c0 t vcn_v3_0_resume +ffffffff82123620 t vcn_v3_0_is_idle +ffffffff82123720 t vcn_v3_0_wait_for_idle +ffffffff821237d0 t vcn_v3_0_set_clockgating_state +ffffffff821238f0 t vcn_v3_0_set_powergating_state +ffffffff821264e0 t vcn_v3_0_dec_ring_get_rptr +ffffffff82126580 t vcn_v3_0_dec_ring_get_wptr +ffffffff82126640 t vcn_v3_0_dec_ring_set_wptr +ffffffff821267b0 t vcn_v3_0_ring_patch_cs_in_place +ffffffff82126b30 t vcn_v3_0_enc_ring_get_rptr +ffffffff82126c30 t vcn_v3_0_enc_ring_get_wptr +ffffffff82126d40 t vcn_v3_0_enc_ring_set_wptr +ffffffff82126e50 t vcn_v3_0_set_interrupt_state +ffffffff82126e80 t vcn_v3_0_process_interrupt +ffffffff82126fa0 t vcn_v3_0_pause_dpg_mode +ffffffff821278c0 t vcn_v3_0_enable_clock_gating +ffffffff82127b90 t vcn_v3_0_disable_clock_gating +ffffffff82128150 t vcn_v3_0_start_dpg_mode +ffffffff8212b960 t vcn_v3_0_clock_gating_dpg_mode +ffffffff8212c8a0 t vcn_v3_0_mc_resume_dpg_mode +ffffffff82132000 t vcn_v4_0_query_ras_poison_status +ffffffff821320e0 t vcn_v4_0_early_init +ffffffff821322b0 t vcn_v4_0_sw_init +ffffffff821325b0 t vcn_v4_0_sw_fini +ffffffff821326b0 t vcn_v4_0_hw_init +ffffffff821331a0 t vcn_v4_0_hw_fini +ffffffff82133310 t vcn_v4_0_suspend +ffffffff82133340 t vcn_v4_0_resume +ffffffff821333a0 t vcn_v4_0_is_idle +ffffffff821334b0 t vcn_v4_0_wait_for_idle +ffffffff82133570 t vcn_v4_0_set_clockgating_state +ffffffff821336a0 t vcn_v4_0_set_powergating_state +ffffffff82134010 t vcn_v4_0_unified_ring_get_rptr +ffffffff821340f0 t vcn_v4_0_unified_ring_get_wptr +ffffffff821341f0 t vcn_v4_0_unified_ring_set_wptr +ffffffff821342f0 t vcn_v4_0_ring_patch_cs_in_place +ffffffff821346e0 t vcn_v4_0_limit_sched +ffffffff82134750 t vcn_v4_0_set_interrupt_state +ffffffff82134780 t vcn_v4_0_process_interrupt +ffffffff82134850 t vcn_v4_0_set_ras_interrupt_state +ffffffff82134880 t vcn_v4_0_pause_dpg_mode +ffffffff82134b40 t vcn_v4_0_enable_clock_gating +ffffffff82134e70 t vcn_v4_0_disable_clock_gating +ffffffff821353b0 t vcn_v4_0_start +ffffffff8213a940 t vcn_v4_0_disable_clock_gating_dpg_mode +ffffffff8213b880 t vcn_v4_0_mc_resume_dpg_mode +ffffffff82141000 t vcn_v4_0_3_early_init +ffffffff82141110 t vcn_v4_0_3_sw_init +ffffffff82141410 t vcn_v4_0_3_sw_fini +ffffffff821414e0 t vcn_v4_0_3_hw_init +ffffffff821422f0 t vcn_v4_0_3_hw_fini +ffffffff82142390 t vcn_v4_0_3_suspend +ffffffff82142410 t vcn_v4_0_3_resume +ffffffff82142470 t vcn_v4_0_3_is_idle +ffffffff82142610 t vcn_v4_0_3_wait_for_idle +ffffffff82142730 t vcn_v4_0_3_set_clockgating_state +ffffffff82142900 t vcn_v4_0_3_set_powergating_state +ffffffff821430d0 t vcn_v4_0_3_unified_ring_get_rptr +ffffffff82143270 t vcn_v4_0_3_unified_ring_get_wptr +ffffffff82143430 t vcn_v4_0_3_unified_ring_set_wptr +ffffffff82143600 t vcn_v4_0_3_set_interrupt_state +ffffffff82143630 t vcn_v4_0_3_process_interrupt +ffffffff82143770 t vcn_v4_0_3_query_ras_error_count +ffffffff82143890 t vcn_v4_0_3_reset_ras_error_count +ffffffff821439a0 t vcn_v4_0_3_pause_dpg_mode +ffffffff821439d0 t vcn_v4_0_3_enable_clock_gating +ffffffff82143d30 t vcn_v4_0_3_disable_clock_gating +ffffffff821442a0 t vcn_v4_0_3_start +ffffffff82149360 t vcn_v4_0_3_disable_clock_gating_dpg_mode +ffffffff8214a270 t vcn_v4_0_3_mc_resume_dpg_mode +ffffffff82150000 t vega10_ih_early_init +ffffffff82150050 t vega10_ih_sw_init +ffffffff82150330 t vega10_ih_sw_fini +ffffffff82150370 t vega10_ih_hw_init +ffffffff82150780 t vega10_ih_hw_fini +ffffffff821507e0 t vega10_ih_suspend +ffffffff82150840 t vega10_ih_resume +ffffffff82150850 t vega10_ih_is_idle +ffffffff82150880 t vega10_ih_wait_for_idle +ffffffff821508b0 t vega10_ih_soft_reset +ffffffff821508e0 t vega10_ih_set_clockgating_state +ffffffff82150a40 t vega10_ih_set_powergating_state +ffffffff82150a70 t vega10_ih_get_wptr +ffffffff82150bd0 t vega10_ih_set_rptr +ffffffff82150cc0 t vega10_ih_self_irq +ffffffff82150d40 t vega10_ih_toggle_interrupts +ffffffff82151000 T vega10_reg_base_init +ffffffff82151150 T vega10_doorbell_index_init +ffffffff82152000 t vega20_ih_early_init +ffffffff82152050 t vega20_ih_sw_init +ffffffff82152360 t vega20_ih_sw_fini +ffffffff821523a0 t vega20_ih_hw_init +ffffffff82152a80 t vega20_ih_hw_fini +ffffffff82152ae0 t vega20_ih_suspend +ffffffff82152b40 t vega20_ih_resume +ffffffff82152b50 t vega20_ih_is_idle +ffffffff82152b80 t vega20_ih_wait_for_idle +ffffffff82152bb0 t vega20_ih_soft_reset +ffffffff82152be0 t vega20_ih_set_clockgating_state +ffffffff82152d20 t vega20_ih_set_powergating_state +ffffffff82152d50 t vega20_ih_get_wptr +ffffffff82152eb0 t vega20_ih_set_rptr +ffffffff82152fa0 t vega20_ih_self_irq +ffffffff82153020 t vega20_ih_toggle_interrupts +ffffffff82154000 T vega20_reg_base_init +ffffffff82154160 T vega20_doorbell_index_init +ffffffff82155000 T vi_srbm_select +ffffffff82155050 T vi_set_virt_ops +ffffffff82155090 T vi_set_ip_blocks +ffffffff82155640 T legacy_doorbell_index_init +ffffffff821556f0 t vi_common_early_init +ffffffff821559f0 t vi_common_late_init +ffffffff82155a40 t vi_common_sw_init +ffffffff82155a90 t vi_common_sw_fini +ffffffff82155ac0 t vi_common_hw_init +ffffffff821562a0 t vi_common_hw_fini +ffffffff82156320 t vi_common_suspend +ffffffff821563a0 t vi_common_resume +ffffffff821563e0 t vi_common_is_idle +ffffffff82156410 t vi_common_wait_for_idle +ffffffff82156440 t vi_common_soft_reset +ffffffff82156470 t vi_common_set_clockgating_state +ffffffff82156a70 t vi_common_set_powergating_state +ffffffff82156aa0 t vi_common_get_clockgating_state +ffffffff82156b90 t cz_smc_rreg +ffffffff82156c30 t cz_smc_wreg +ffffffff82156cb0 t vi_smc_rreg +ffffffff82156d60 t vi_smc_wreg +ffffffff82156df0 t vi_pcie_rreg +ffffffff82156eb0 t vi_pcie_wreg +ffffffff82156f70 t vi_uvd_ctx_rreg +ffffffff82157020 t vi_uvd_ctx_wreg +ffffffff821570b0 t vi_didt_rreg +ffffffff82157150 t vi_didt_wreg +ffffffff821571d0 t vi_gc_cac_rreg +ffffffff82157270 t vi_gc_cac_wreg +ffffffff821572f0 t vi_read_disabled_bios +ffffffff82157530 t vi_read_bios_from_rom +ffffffff82157660 t vi_read_register +ffffffff82157940 t vi_asic_reset +ffffffff82157ae0 t vi_asic_reset_method +ffffffff82157ba0 t vi_get_xclk +ffffffff82157c60 t vi_set_uvd_clocks +ffffffff82157d20 t vi_set_vce_clocks +ffffffff821580a0 t vi_get_config_memsize +ffffffff821580c0 t vi_flush_hdp +ffffffff82158140 t vi_invalidate_hdp +ffffffff821581c0 t vi_need_full_reset +ffffffff82158210 t vi_get_pcie_usage +ffffffff82158370 t vi_need_reset_on_init +ffffffff82158410 t vi_get_pcie_replay_count +ffffffff82158490 t vi_asic_supports_baco +ffffffff821584e0 t vi_pre_asic_init +ffffffff82158510 t vi_query_video_codecs +ffffffff821585b0 t vi_set_uvd_clock +ffffffff82159000 T amdgpu_xcp_drm_dev_alloc +ffffffff82159060 T amdgpu_xcp_drv_release +ffffffff8215a000 T amdgpu_dm_find_first_crtc_matching_connector +ffffffff8215a070 T amdgpu_dm_update_connector_after_detect +ffffffff8215a680 T amdgpu_dm_update_freesync_caps +ffffffff8215ac40 T dm_atomic_get_state +ffffffff8215acb0 T amdgpu_dm_connector_atomic_set_property +ffffffff8215ad70 T amdgpu_dm_connector_atomic_get_property +ffffffff8215ae10 T amdgpu_dm_connector_funcs_reset +ffffffff8215af10 T amdgpu_dm_connector_atomic_duplicate_state +ffffffff8215b020 T create_validate_stream_for_sink +ffffffff8215c9b0 T amdgpu_dm_connector_mode_valid +ffffffff8215cbb0 T convert_dc_color_depth_into_bpc +ffffffff8215cbf0 t dm_encoder_helper_disable +ffffffff8215cc20 t dm_encoder_helper_atomic_check +ffffffff8215ce30 T amdgpu_dm_connector_init_helper +ffffffff8215d220 T amdgpu_dm_get_encoder_crtc_mask +ffffffff8215d270 T dm_restore_drm_connector_state +ffffffff8215d400 t parse_hdmi_amd_vsdb +ffffffff8215d7b0 T amdgpu_dm_trigger_timing_sync +ffffffff8215d990 T dm_write_reg_func +ffffffff8215d9b0 T dm_read_reg_func +ffffffff8215da60 T amdgpu_dm_process_dmub_aux_transfer_sync +ffffffff8215dcd0 T amdgpu_dm_process_dmub_set_config_sync +ffffffff8215de70 T check_seamless_boot_capability +ffffffff8215dec0 T dm_execute_dmub_cmd +ffffffff8215dee0 T dm_execute_dmub_cmd_list +ffffffff8215df00 t dm_early_init +ffffffff8215e2d0 t dm_late_init +ffffffff8215e5d0 t dm_sw_init +ffffffff8215ebf0 t dm_sw_fini +ffffffff8215ecc0 t amdgpu_dm_early_fini +ffffffff8215ed20 t dm_hw_init +ffffffff82160d50 t dm_hw_fini +ffffffff82160dc0 t dm_suspend +ffffffff82161200 t dm_resume +ffffffff82161c60 t dm_is_idle +ffffffff82161c90 t dm_wait_for_idle +ffffffff82161cc0 t dm_check_soft_reset +ffffffff82161cf0 t dm_soft_reset +ffffffff82161d20 t dm_set_clockgating_state +ffffffff82161d50 t dm_set_powergating_state +ffffffff82161d80 t dm_bandwidth_update +ffffffff82161db0 t dm_vblank_get_counter +ffffffff82161e30 t dm_crtc_get_scanoutpos +ffffffff82161f20 t amdgpu_dm_dmub_reg_read +ffffffff82161fd0 t amdgpu_dm_dmub_reg_write +ffffffff82162000 t dm_dmub_hw_init +ffffffff82162460 t dmub_aux_setconfig_callback +ffffffff82162510 t amdgpu_dm_fini +ffffffff82162760 t emulated_link_detect +ffffffff82162870 t amdgpu_dm_atomic_check +ffffffff82163760 t dm_update_plane_state +ffffffff82163e10 t dm_update_crtc_state +ffffffff82164900 t dm_check_crtc_cursor +ffffffff82164c80 t is_scaling_state_different +ffffffff82164d20 t do_aquire_global_lock +ffffffff82164ff0 t dm_update_mst_vcpi_slots_for_dsc +ffffffff82165200 t dm_atomic_destroy_state +ffffffff82165240 t dm_check_cursor_fb +ffffffff821653f0 t fill_dc_plane_attributes +ffffffff821656a0 t fill_dc_plane_info_and_addr +ffffffff821659f0 t fill_hdr_info_packet +ffffffff82165b60 t is_timing_unchanged_for_freesync +ffffffff82165c90 t get_highest_refresh_rate_mode +ffffffff82165df0 t update_stream_scaling_settings +ffffffff82165f40 t amdgpu_dm_atomic_commit_tail +ffffffff82169100 t amdgpu_dm_backlight_set_level +ffffffff82169350 t dm_atomic_duplicate_state +ffffffff82169410 t amdgpu_dm_audio_component_bind +ffffffff82169480 t amdgpu_dm_audio_component_unbind +ffffffff821694e0 t amdgpu_dm_audio_component_get_eld +ffffffff82169640 t dm_dmub_outbox1_low_irq +ffffffff82169980 t dm_handle_hpd_work +ffffffff82169a10 t amdgpu_dm_encoder_destroy +ffffffff82169a50 t amdgpu_dm_i2c_xfer +ffffffff82169bb0 t amdgpu_dm_i2c_func +ffffffff82169be0 t amdgpu_dm_connector_detect +ffffffff82169ca0 t amdgpu_dm_connector_funcs_force +ffffffff82169d90 t amdgpu_dm_connector_late_register +ffffffff82169f10 t amdgpu_dm_connector_unregister +ffffffff82169f30 t amdgpu_dm_connector_destroy +ffffffff8216a040 t amdgpu_dm_backlight_update_status +ffffffff8216a0d0 t amdgpu_dm_backlight_get_brightness +ffffffff8216a300 t get_modes +ffffffff8216a310 t amdgpu_dm_connector_atomic_check +ffffffff8216a470 t amdgpu_dm_connector_get_modes +ffffffff8216aaf0 t dm_crtc_high_irq +ffffffff8216acb0 t dm_vupdate_high_irq +ffffffff8216ae60 t dm_pflip_high_irq +ffffffff8216b0b0 t register_hpd_handlers +ffffffff8216b1d0 t dmub_hpd_callback +ffffffff8216b3c0 t handle_hpd_irq +ffffffff8216b3d0 t handle_hpd_rx_irq +ffffffff8216b780 t handle_hpd_irq_helper +ffffffff8216b940 t schedule_hpd_rx_offload_work +ffffffff8216ba10 t dm_handle_hpd_rx_offload_work +ffffffff8216bdf0 t dm_gpureset_toggle_interrupts +ffffffff8216c030 t s3_handle_mst +ffffffff8216d000 T amdgpu_dm_init_color_mod +ffffffff8216d010 T amdgpu_dm_verify_lut_sizes +ffffffff8216d0f0 T amdgpu_dm_update_crtc_color_mgmt +ffffffff8216d7e0 T amdgpu_dm_update_plane_color_mgmt +ffffffff8216e000 T amdgpu_dm_crtc_handle_vblank +ffffffff8216e090 T amdgpu_dm_crtc_modeset_required +ffffffff8216e0d0 T amdgpu_dm_crtc_vrr_active_irq +ffffffff8216e110 T amdgpu_dm_crtc_set_vupdate_irq +ffffffff8216e1d0 T amdgpu_dm_crtc_vrr_active +ffffffff8216e210 T amdgpu_dm_crtc_enable_vblank +ffffffff8216e230 t dm_set_vblank +ffffffff8216e4f0 T amdgpu_dm_crtc_disable_vblank +ffffffff8216e510 T amdgpu_dm_crtc_init +ffffffff8216e730 t vblank_control_worker +ffffffff8216e880 t dm_crtc_reset_state +ffffffff8216e930 t amdgpu_dm_crtc_destroy +ffffffff8216e970 t dm_crtc_duplicate_state +ffffffff8216eb40 t dm_crtc_destroy_state +ffffffff8216eb90 t dm_crtc_helper_mode_fixup +ffffffff8216ebc0 t dm_crtc_helper_disable +ffffffff8216ebf0 t dm_crtc_helper_atomic_check +ffffffff8216f000 T hdcp_update_display +ffffffff8216f2d0 t process_output +ffffffff8216f430 T hdcp_reset_display +ffffffff8216f5c0 T hdcp_handle_cpirq +ffffffff8216f5f0 T hdcp_destroy +ffffffff8216f720 T hdcp_create_workqueue +ffffffff8216fb90 t event_cpirq +ffffffff8216fc00 t event_property_update +ffffffff8216fe70 t event_callback +ffffffff8216ff20 t event_watchdog_timer +ffffffff8216ffd0 t event_property_validate +ffffffff82170180 t lp_write_i2c +ffffffff82170210 t lp_read_i2c +ffffffff821702c0 t lp_write_dpcd +ffffffff821702f0 t lp_read_dpcd +ffffffff82170320 t update_config +ffffffff821706d0 t enable_assr +ffffffff82170820 t __delayed_work_tick +ffffffff82171000 T dm_helpers_parse_edid_caps +ffffffff821712d0 T dm_helpers_dp_update_branch_info +ffffffff82171300 T dm_helpers_dp_mst_write_payload_allocation_table +ffffffff82171710 T dm_helpers_dp_mst_poll_pending_down_reply +ffffffff82171740 T dm_helpers_dp_mst_clear_payload_allocation_table +ffffffff82171770 T dm_helpers_dp_mst_poll_for_allocation_change_trigger +ffffffff821717f0 T dm_helpers_dp_mst_send_payload_allocation +ffffffff821718d0 T dm_dtn_log_begin +ffffffff82171920 T dm_dtn_log_append_v +ffffffff82171aa0 T dm_dtn_log_end +ffffffff82171af0 T dm_helpers_dp_mst_start_top_mgr +ffffffff82171bd0 T dm_helpers_dp_mst_stop_top_mgr +ffffffff82171c80 T dm_helpers_dp_read_dpcd +ffffffff82171d20 T dm_helpers_dp_write_dpcd +ffffffff82171db0 T dm_helpers_submit_i2c +ffffffff82171f00 T dm_helpers_dp_write_dsc_enable +ffffffff82172640 T dm_helpers_is_dp_sink_present +ffffffff821726f0 T dm_helpers_read_local_edid +ffffffff821729a0 T dm_helper_dmub_aux_transfer_sync +ffffffff821729f0 T dm_helpers_dmub_set_config_sync +ffffffff82172a10 T dm_set_dcn_clocks +ffffffff82172a40 T dm_helpers_smu_timeout +ffffffff82172a70 T dm_helpers_init_panel_settings +ffffffff82172ae0 T dm_helpers_override_panel_settings +ffffffff82172b20 T dm_helpers_allocate_gpu_mem +ffffffff82172c30 T dm_helpers_free_gpu_mem +ffffffff82172cd0 T dm_helpers_dmub_outbox_interrupt_control +ffffffff82172d70 T dm_helpers_mst_enable_stream_features +ffffffff82172ea0 T dm_helpers_dp_handle_test_pattern_request +ffffffff821731f0 T dm_set_phyd32clk +ffffffff82173220 T dm_helpers_enable_periodic_detection +ffffffff82173250 T dm_helpers_dp_mst_update_branch_bandwidth +ffffffff82173280 T dm_get_adaptive_sync_support_type +ffffffff821732f0 t execute_synaptics_rc_command +ffffffff82174000 T amdgpu_dm_irq_register_interrupt +ffffffff821741d0 t dm_irq_work_func +ffffffff821741f0 T amdgpu_dm_irq_unregister_interrupt +ffffffff821743b0 T amdgpu_dm_irq_init +ffffffff821744b0 T amdgpu_dm_irq_fini +ffffffff82174680 T amdgpu_dm_irq_suspend +ffffffff821747d0 T amdgpu_dm_irq_resume_early +ffffffff821749a0 T amdgpu_dm_irq_resume_late +ffffffff82174b70 T amdgpu_dm_set_irq_funcs +ffffffff82174c30 T amdgpu_dm_outbox_init +ffffffff82174c60 T amdgpu_dm_hpd_init +ffffffff82174d30 T amdgpu_dm_hpd_fini +ffffffff82174e00 t amdgpu_dm_set_crtc_irq_state +ffffffff82174e90 t amdgpu_dm_irq_handler +ffffffff821750f0 t amdgpu_dm_set_vline0_irq_state +ffffffff82175180 t amdgpu_dm_set_dmub_outbox_irq_state +ffffffff821751e0 t amdgpu_dm_set_vupdate_irq_state +ffffffff82175270 t amdgpu_dm_set_dmub_trace_irq_state +ffffffff821752d0 t amdgpu_dm_set_pflip_irq_state +ffffffff82175360 t amdgpu_dm_set_hpd_irq_state +ffffffff82176000 T needs_dsc_aux_workaround +ffffffff82176050 T dm_dp_create_fake_mst_encoders +ffffffff82176110 T dm_handle_mst_sideband_msg_ready_event +ffffffff821763b0 T amdgpu_dm_initialize_dp_connector +ffffffff821764d0 t kasprintf +ffffffff821765b0 t dm_dp_aux_transfer +ffffffff82176700 T dm_mst_get_pbn_divider +ffffffff82176770 T compute_mst_dsc_configs_for_state +ffffffff82176a30 t is_dsc_need_re_compute +ffffffff82176c00 t compute_mst_dsc_configs_for_link +ffffffff821772c0 T pre_validate_dsc +ffffffff821778e0 T dm_dp_mst_is_port_support_mode +ffffffff82177ba0 t amdgpu_dm_encoder_destroy +ffffffff82177bb0 t dm_dp_add_mst_connector +ffffffff82177de0 t dm_handle_mst_down_rep_msg_ready +ffffffff82177e00 t amdgpu_dm_mst_connector_late_register +ffffffff82177e50 t amdgpu_dm_mst_connector_early_unregister +ffffffff82177f40 t dm_dp_mst_connector_destroy +ffffffff82177fe0 t dm_dp_mst_get_modes +ffffffff82178570 t dm_dp_mst_detect +ffffffff82178780 t dm_mst_atomic_best_encoder +ffffffff821787e0 t dm_dp_mst_atomic_check +ffffffff82178810 t set_dsc_configs_from_fairness_vars +ffffffff82178b00 t increase_dsc_bpp +ffffffff821790a0 t try_disable_dsc +ffffffff8217a000 T amdgpu_dm_plane_get_format_info +ffffffff8217a020 T amdgpu_dm_plane_fill_blending_from_plane_state +ffffffff8217a120 T amdgpu_dm_plane_fill_plane_buffer_attributes +ffffffff8217a6a0 T amdgpu_dm_plane_helper_check_state +ffffffff8217a8c0 T amdgpu_dm_plane_fill_dc_scaling_info +ffffffff8217ab20 T amdgpu_dm_plane_handle_cursor_update +ffffffff8217ae00 T amdgpu_dm_plane_init +ffffffff8217bdb0 T is_video_format +ffffffff8217be00 t dm_drm_plane_reset +ffffffff8217bea0 t dm_drm_plane_duplicate_state +ffffffff8217bf40 t dm_drm_plane_destroy_state +ffffffff8217bf80 t dm_plane_format_mod_supported +ffffffff8217c0b0 t dm_plane_helper_prepare_fb +ffffffff8217c430 t dm_plane_helper_cleanup_fb +ffffffff8217c4e0 t dm_plane_atomic_check +ffffffff8217c5d0 t dm_plane_atomic_async_check +ffffffff8217c610 t dm_plane_atomic_async_update +ffffffff8217c6c0 t amdgpu_bo_reserve +ffffffff8217c900 t amdgpu_bo_unreserve +ffffffff8217d000 T dm_pp_apply_display_requirements +ffffffff8217d1f0 T dm_pp_get_clock_levels_by_type +ffffffff8217d5b0 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff8217d7a0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff8217d990 T dm_pp_notify_wm_clock_changes +ffffffff8217d9f0 T dm_pp_apply_power_level_change_request +ffffffff8217da20 T dm_pp_apply_clock_for_voltage_request +ffffffff8217dad0 T dm_pp_get_static_clocks +ffffffff8217dba0 T dm_pp_get_funcs +ffffffff8217dcb0 t pp_rv_set_wm_ranges +ffffffff8217de40 t pp_rv_set_pme_wa_enable +ffffffff8217de60 t pp_rv_set_active_display_count +ffffffff8217de80 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff8217dea0 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff8217dec0 t pp_rv_set_hard_min_fclk_by_freq +ffffffff8217dee0 t pp_nv_set_display_count +ffffffff8217df40 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff8217dfb0 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff8217e010 t pp_nv_set_voltage_by_freq +ffffffff8217e0b0 t pp_nv_set_wm_ranges +ffffffff8217e100 t pp_nv_set_hard_min_uclk_by_freq +ffffffff8217e170 t pp_nv_get_maximum_sustainable_clocks +ffffffff8217e1d0 t pp_nv_get_uclk_dpm_states +ffffffff8217e230 t pp_nv_set_pstate_handshake_support +ffffffff8217e290 t pp_rn_set_wm_ranges +ffffffff8217e2e0 t pp_rn_get_dpm_clock_table +ffffffff8217f000 T amdgpu_dm_set_psr_caps +ffffffff8217f160 T amdgpu_dm_link_setup_psr +ffffffff8217f320 T amdgpu_dm_psr_enable +ffffffff8217f430 T amdgpu_dm_psr_disable +ffffffff8217f4c0 T amdgpu_dm_psr_disable_all +ffffffff82180000 T amdgpu_dm_setup_replay +ffffffff82180100 T amdgpu_dm_replay_enable +ffffffff821802b0 T amdgpu_dm_replay_disable +ffffffff82181000 T dm_get_elapse_time_in_ns +ffffffff82181030 T dm_perf_trace_timestamp +ffffffff82182000 T dc_assert_fp_enabled +ffffffff82182080 T dc_fpu_begin +ffffffff821820d0 T dc_fpu_end +ffffffff82183000 T dal_vector_construct +ffffffff821830e0 T dal_vector_presized_create +ffffffff821833a0 T dal_vector_create +ffffffff821834e0 T dal_vector_destruct +ffffffff82183540 T dal_vector_destroy +ffffffff821835d0 T dal_vector_get_count +ffffffff82183600 T dal_vector_at_index +ffffffff82183640 T dal_vector_remove_at_index +ffffffff821836e0 T dal_vector_set_at_index +ffffffff82183740 T dal_vector_insert_at +ffffffff82183870 T dal_vector_reserve +ffffffff82183930 T dal_vector_append +ffffffff82183a60 T dal_vector_clone +ffffffff82183b20 T dal_vector_capacity +ffffffff82183b50 T dal_vector_clear +ffffffff82184000 T fixed_point_to_int_frac +ffffffff82184220 T convert_float_matrix +ffffffff821842f0 T reduce_fraction +ffffffff82185000 T is_rgb_cspace +ffffffff82185090 T is_lower_pipe_tree_visible +ffffffff82185100 T is_upper_pipe_tree_visible +ffffffff82185170 T is_pipe_tree_visible +ffffffff82185200 T build_prescale_params +ffffffff82186000 T dc_fixpt_from_fraction +ffffffff821861e0 T dc_fixpt_mul +ffffffff821863a0 T dc_fixpt_sqr +ffffffff82186520 T dc_fixpt_recip +ffffffff82186590 T dc_fixpt_sinc +ffffffff821867d0 T dc_fixpt_sin +ffffffff82186800 T dc_fixpt_cos +ffffffff82186920 T dc_fixpt_exp +ffffffff82186c40 t fixed31_32_exp_from_taylor_series +ffffffff82187110 T dc_fixpt_log +ffffffff82187350 T dc_fixpt_u4d19 +ffffffff82187390 T dc_fixpt_u3d19 +ffffffff821873d0 T dc_fixpt_u2d19 +ffffffff82187410 T dc_fixpt_u0d19 +ffffffff82187440 T dc_fixpt_clamp_u0d14 +ffffffff82187490 T dc_fixpt_clamp_u0d10 +ffffffff821874e0 T dc_fixpt_s4d19 +ffffffff82188000 T bios_parser_create +ffffffff82189380 t bios_parser_get_connectors_number +ffffffff821893e0 t bios_parser_get_connector_id +ffffffff82189490 t bios_parser_get_src_obj +ffffffff821895c0 t bios_parser_get_i2c_info +ffffffff82189800 t bios_parser_get_hpd_info +ffffffff821898f0 t bios_parser_get_device_tag +ffffffff82189b10 t bios_parser_get_spread_spectrum_info +ffffffff82189d30 t bios_parser_get_ss_entry_number +ffffffff82189fa0 t bios_parser_get_embedded_panel_info +ffffffff8218a530 t bios_parser_get_gpio_pin_info +ffffffff8218a650 t bios_parser_get_encoder_cap_info +ffffffff8218a760 t bios_parser_set_scratch_critical_state +ffffffff8218a770 t bios_parser_is_device_id_supported +ffffffff8218a830 t bios_parser_encoder_control +ffffffff8218a870 t bios_parser_transmitter_control +ffffffff8218a8b0 t bios_parser_enable_crtc +ffffffff8218a900 t bios_parser_adjust_pixel_clock +ffffffff8218a940 t bios_parser_set_pixel_clock +ffffffff8218a980 t bios_parser_set_dce_clock +ffffffff8218a9c0 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff8218aa10 t bios_parser_program_crtc_timing +ffffffff8218aa50 t bios_parser_program_display_engine_pll +ffffffff8218aa90 t bios_parser_enable_disp_power_gating +ffffffff8218aad0 t bios_parser_destroy +ffffffff8218abb0 t bios_get_board_layout_info +ffffffff8218ae50 t get_bios_object +ffffffff8218b050 t get_ss_info_from_ss_info_table +ffffffff8218b240 t get_ss_info_v3_1 +ffffffff8218b3d0 t get_ss_entry_number_from_ss_info_tbl +ffffffff8218c000 T firmware_parser_create +ffffffff8218e000 t bios_parser_get_connectors_number +ffffffff8218e170 t bios_parser_get_connector_id +ffffffff8218e1d0 t bios_parser_get_src_obj +ffffffff8218e4b0 t bios_parser_get_i2c_info +ffffffff8218e780 t bios_parser_get_hpd_info +ffffffff8218e920 t bios_parser_get_device_tag +ffffffff8218ec10 t bios_parser_get_spread_spectrum_info +ffffffff8218f0c0 t bios_parser_get_ss_entry_number +ffffffff8218f0f0 t bios_parser_get_embedded_panel_info +ffffffff8218f300 t bios_parser_get_gpio_pin_info +ffffffff8218f420 t bios_parser_get_encoder_cap_info +ffffffff8218f590 t bios_parser_is_accelerated_mode +ffffffff8218f5a0 t bios_parser_set_scratch_critical_state +ffffffff8218f5b0 t bios_parser_is_device_id_supported +ffffffff8218f620 t bios_parser_encoder_control +ffffffff8218f660 t bios_parser_transmitter_control +ffffffff8218f6a0 t bios_parser_enable_crtc +ffffffff8218f6f0 t bios_parser_set_pixel_clock +ffffffff8218f730 t bios_parser_set_dce_clock +ffffffff8218f770 t bios_parser_program_crtc_timing +ffffffff8218f7b0 t bios_parser_enable_disp_power_gating +ffffffff8218f7f0 t firmware_parser_destroy +ffffffff8218f8d0 t bios_get_board_layout_info +ffffffff8218fdc0 t bios_parser_pack_data_tables +ffffffff8218fdf0 t bios_get_atom_dc_golden_table +ffffffff8218ff50 t bios_parser_enable_lvtma_control +ffffffff8218ffa0 t bios_parser_get_soc_bb_info +ffffffff821900b0 t bios_parser_get_disp_connector_caps_info +ffffffff82190230 t bios_parser_get_lttpr_caps +ffffffff821903a0 t bios_parser_get_lttpr_interop +ffffffff82190500 t bios_parser_get_connector_speed_cap_info +ffffffff82190650 t get_bios_object +ffffffff821907c0 t get_bios_object_from_path_v3 +ffffffff82191000 T object_id_from_bios_object_id +ffffffff82192000 T bios_get_image +ffffffff82192050 T bios_is_accelerated_mode +ffffffff821920b0 T bios_set_scratch_acc_mode_change +ffffffff821920f0 T bios_set_scratch_critical_state +ffffffff82192130 T bios_get_vga_enabled_displays +ffffffff82193000 T dal_bios_parser_create +ffffffff82193070 T dal_bios_parser_destroy +ffffffff82194000 T dal_bios_parser_init_cmd_tbl +ffffffff82194910 t encoder_control_digx_v3 +ffffffff82194a30 t encoder_control_digx_v4 +ffffffff82194b50 t encoder_control_digx_v5 +ffffffff82194cb0 t encoder_control_dig1_v1 +ffffffff82194d50 t encoder_control_dig2_v1 +ffffffff82194df0 t encoder_control_dig_v1 +ffffffff82194e50 t transmitter_control_v2 +ffffffff82195000 t transmitter_control_v3 +ffffffff821951d0 t transmitter_control_v4 +ffffffff82195390 t transmitter_control_v1_5 +ffffffff82195530 t transmitter_control_v1_6 +ffffffff821956b0 t set_pixel_clock_v3 +ffffffff82195850 t set_pixel_clock_v5 +ffffffff82195a20 t set_pixel_clock_v6 +ffffffff82195bf0 t set_pixel_clock_v7 +ffffffff82195e00 t enable_spread_spectrum_on_ppll_v1 +ffffffff82195f20 t enable_spread_spectrum_on_ppll_v2 +ffffffff82196060 t enable_spread_spectrum_on_ppll_v3 +ffffffff82196180 t adjust_display_pll_v2 +ffffffff821962f0 t adjust_display_pll_v3 +ffffffff82196490 t dac1_encoder_control_v1 +ffffffff82196510 t dac2_encoder_control_v1 +ffffffff82196590 t dac1_output_control_v1 +ffffffff82196600 t dac2_output_control_v1 +ffffffff82196670 t set_crtc_using_dtd_timing_v3 +ffffffff821967e0 t set_crtc_timing_v1 +ffffffff82196980 t enable_crtc_v1 +ffffffff82196a30 t enable_crtc_mem_req_v1 +ffffffff82196ae0 t program_clock_v5 +ffffffff82196c00 t program_clock_v6 +ffffffff82196d30 t external_encoder_control_v3 +ffffffff82196f00 t enable_disp_power_gating_v2_1 +ffffffff82196fe0 t set_dce_clock_v2_1 +ffffffff82198000 T dal_firmware_parser_init_cmd_tbl +ffffffff82198460 t encoder_control_digx_v1_5 +ffffffff82198650 t encoder_control_fallback +ffffffff821986b0 t transmitter_control_v1_6 +ffffffff82198880 t transmitter_control_v1_7 +ffffffff82198aa0 t transmitter_control_fallback +ffffffff82198b00 t set_pixel_clock_v7 +ffffffff82198d90 t set_pixel_clock_fallback +ffffffff82198df0 t set_crtc_using_dtd_timing_v3 +ffffffff82198f60 t enable_crtc_v1 +ffffffff82199010 t external_encoder_control_v3 +ffffffff82199040 t enable_disp_power_gating_v2_1 +ffffffff821991c0 t enable_disp_power_gating_fallback +ffffffff82199220 t set_dce_clock_v2_1 +ffffffff82199360 t get_smu_clock_info_v3_1 +ffffffff821993d0 t enable_lvtma_control +ffffffff8219a000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff8219a0c0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff8219a1e0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff8219a270 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff8219a300 T dal_cmd_table_helper_assign_control_parameter +ffffffff8219a3e0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff8219a4c0 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff8219b000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff8219b0d0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff8219b1e0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff8219b270 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff8219b300 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff8219b3e0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff8219c000 T dal_cmd_tbl_helper_dce110_get_table ffffffff8219c030 t encoder_action_to_atom ffffffff8219c0b0 t engine_bp_to_atom ffffffff8219c100 t clock_source_id_to_atom -ffffffff8219c1d0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff8219c220 t signal_type_to_atom_dig_mode -ffffffff8219c280 t hpd_sel_to_atom -ffffffff8219c2c0 t dig_encoder_sel_to_atom -ffffffff8219c2f0 t phy_id_to_atom -ffffffff8219c330 t disp_power_gating_action_to_atom -ffffffff8219c3a0 t dc_clock_type_to_atom -ffffffff8219c420 t transmitter_color_depth_to_atom -ffffffff8219d000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff8219c1a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff8219c1f0 t signal_type_to_atom_dig_mode +ffffffff8219c250 t hpd_sel_to_atom +ffffffff8219c290 t dig_encoder_sel_to_atom +ffffffff8219c2c0 t phy_id_to_atom +ffffffff8219c300 t disp_power_gating_action_to_atom +ffffffff8219d000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff8219d030 t encoder_action_to_atom ffffffff8219d0b0 t engine_bp_to_atom ffffffff8219d100 t clock_source_id_to_atom @@ -31869,7 +31857,7 @@ ffffffff8219d2f0 t phy_id_to_atom ffffffff8219d330 t disp_power_gating_action_to_atom ffffffff8219d3a0 t dc_clock_type_to_atom ffffffff8219d420 t transmitter_color_depth_to_atom -ffffffff8219e000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff8219e000 T dal_cmd_tbl_helper_dce112_get_table ffffffff8219e030 t encoder_action_to_atom ffffffff8219e0b0 t engine_bp_to_atom ffffffff8219e100 t clock_source_id_to_atom @@ -31877,26447 +31865,26459 @@ ffffffff8219e1d0 t clock_source_id_to_atom_phy_clk_src ffffffff8219e220 t signal_type_to_atom_dig_mode ffffffff8219e280 t hpd_sel_to_atom ffffffff8219e2c0 t dig_encoder_sel_to_atom -ffffffff8219e310 t phy_id_to_atom -ffffffff8219e350 t disp_power_gating_action_to_atom -ffffffff8219f000 T clk_mgr_helper_get_active_display_cnt -ffffffff8219f0e0 T clk_mgr_helper_get_active_plane_cnt -ffffffff8219f190 T clk_mgr_exit_optimized_pwr_state -ffffffff8219f2b0 T clk_mgr_optimize_pwr_state -ffffffff8219f3b0 T dc_clk_mgr_create -ffffffff8219fb90 T dc_destroy_clk_mgr -ffffffff821a0000 T dentist_get_divider_from_did -ffffffff821a0070 T dce_adjust_dp_ref_freq_for_ss -ffffffff821a0190 T dce_get_dp_ref_freq_khz -ffffffff821a02e0 T dce12_get_dp_ref_freq_khz -ffffffff821a0300 T dce_get_max_pixel_clock_for_all_paths -ffffffff821a0510 T dce_get_required_clocks_state -ffffffff821a05c0 T dce_set_clock -ffffffff821a0730 T dce_clock_read_ss_info -ffffffff821a0870 T dce_clk_mgr_construct -ffffffff821a0a70 t dce_update_clocks -ffffffff821a1000 T dce110_get_min_vblank_time_us -ffffffff821a1090 T dce110_fill_display_configs -ffffffff821a1310 T dce11_pplib_apply_display_requirements -ffffffff821a1630 T dce110_clk_mgr_construct -ffffffff821a16e0 t dce11_update_clocks -ffffffff821a2000 T dce112_set_clock -ffffffff821a21a0 T dce112_set_dispclk -ffffffff821a22d0 T dce112_set_dprefclk -ffffffff821a2350 T dce112_clk_mgr_construct -ffffffff821a2410 t dce112_update_clocks -ffffffff821a3000 T dce120_clk_mgr_construct -ffffffff821a30a0 T dce121_clk_mgr_construct -ffffffff821a31e0 t dce12_update_clocks -ffffffff821a4000 T rv1_clk_mgr_construct -ffffffff821a40c0 t rv1_update_clocks -ffffffff821a4600 t rv1_init_clocks -ffffffff821a4690 t rv1_enable_pme_wa -ffffffff821a5000 T rv1_vbios_smu_set_dispclk -ffffffff821a50f0 t rv1_vbios_smu_send_msg_with_param -ffffffff821a5230 T rv1_vbios_smu_set_dprefclk -ffffffff821a6000 T rv2_clk_mgr_construct -ffffffff821a7000 T dentist_get_did_from_divider -ffffffff821a7080 T dcn20_update_clocks_update_dpp_dto -ffffffff821a7160 T dcn20_update_clocks_update_dentist -ffffffff821a76f0 T dcn2_update_clocks -ffffffff821a7ce0 T dcn2_read_clocks_from_hw_dentist -ffffffff821a7dd0 T dcn2_update_clocks_fpga -ffffffff821a7f00 T dcn2_init_clocks -ffffffff821a7fa0 T dcn2_get_clock -ffffffff821a8010 T dcn20_clk_mgr_construct -ffffffff821a8160 t dcn2_enable_pme_wa -ffffffff821a81b0 t dcn2_are_clock_states_equal -ffffffff821a8220 t dcn2_notify_link_rate_change -ffffffff821a9000 T dcn201_clk_mgr_construct -ffffffff821a9130 t dcn201_update_clocks -ffffffff821a9370 t dcn201_init_clocks -ffffffff821aa000 T rn_clk_mgr_construct -ffffffff821aa970 t rn_update_clocks -ffffffff821aaf70 t rn_set_low_power_state -ffffffff821ab160 t rn_init_clocks -ffffffff821ab200 t rn_enable_pme_wa -ffffffff821ab210 t rn_are_clock_states_equal -ffffffff821ab260 t rn_notify_wm_ranges -ffffffff821ab5f0 t rn_notify_link_rate_change -ffffffff821ac000 T rn_vbios_smu_get_smu_version -ffffffff821ac020 t rn_vbios_smu_send_msg_with_param -ffffffff821ac200 T rn_vbios_smu_set_dispclk -ffffffff821ac330 T rn_vbios_smu_set_dprefclk -ffffffff821ac3a0 T rn_vbios_smu_set_hard_min_dcfclk -ffffffff821ac420 T rn_vbios_smu_set_min_deep_sleep_dcfclk -ffffffff821ac4a0 T rn_vbios_smu_set_phyclk -ffffffff821ac4e0 T rn_vbios_smu_set_dppclk -ffffffff821ac5a0 T rn_vbios_smu_set_dcn_low_power_state -ffffffff821ac5c0 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn -ffffffff821ac5e0 T rn_vbios_smu_enable_pme_wa -ffffffff821ac600 T rn_vbios_smu_is_periodic_retraining_disabled -ffffffff821ad000 T dcn3_init_clocks -ffffffff821ad470 t dcn3_init_clocks_fpga -ffffffff821ad480 T dcn3_clk_mgr_construct -ffffffff821ad600 T dcn3_clk_mgr_destroy -ffffffff821ad670 t dcn3_update_clocks -ffffffff821adad0 t dcn3_enable_pme_wa -ffffffff821adb10 t dcn3_are_clock_states_equal -ffffffff821adb70 t dcn3_notify_wm_ranges -ffffffff821ade20 t dcn30_notify_link_rate_change -ffffffff821adf40 t dcn3_set_hard_min_memclk -ffffffff821adfe0 t dcn3_set_hard_max_memclk -ffffffff821ae040 t dcn3_set_max_memclk -ffffffff821ae080 t dcn3_set_min_memclk -ffffffff821ae0c0 t dcn3_get_memclk_states_from_smu -ffffffff821ae220 t dcn3_is_smu_present -ffffffff821af000 T dcn30_smu_test_message -ffffffff821af070 t dcn30_smu_send_msg_with_param -ffffffff821af220 T dcn30_smu_get_smu_version -ffffffff821af240 T dcn30_smu_check_driver_if_version -ffffffff821af2a0 T dcn30_smu_check_msg_header_version -ffffffff821af300 T dcn30_smu_set_dram_addr_high -ffffffff821af320 T dcn30_smu_set_dram_addr_low -ffffffff821af340 T dcn30_smu_transfer_wm_table_smu_2_dram -ffffffff821af360 T dcn30_smu_transfer_wm_table_dram_2_smu -ffffffff821af380 T dcn30_smu_set_hard_min_by_freq -ffffffff821af3e0 T dcn30_smu_set_hard_max_by_freq -ffffffff821af440 T dcn30_smu_get_dpm_freq_by_index -ffffffff821af4a0 T dcn30_smu_get_dc_mode_max_dpm_freq -ffffffff821af500 T dcn30_smu_set_min_deep_sleep_dcef_clk -ffffffff821af520 T dcn30_smu_set_num_of_displays -ffffffff821af540 T dcn30_smu_set_display_refresh_from_mall -ffffffff821af570 T dcn30_smu_set_external_client_df_cstate_allow -ffffffff821af590 T dcn30_smu_set_pme_workaround -ffffffff821b0000 T dcn301_smu_get_smu_version -ffffffff821b0080 t dcn301_smu_send_msg_with_param -ffffffff821b0250 T dcn301_smu_set_dispclk -ffffffff821b0300 T dcn301_smu_set_dprefclk -ffffffff821b03c0 T dcn301_smu_set_hard_min_dcfclk -ffffffff821b0470 T dcn301_smu_set_min_deep_sleep_dcfclk -ffffffff821b0520 T dcn301_smu_set_dppclk -ffffffff821b05d0 T dcn301_smu_set_display_idle_optimization -ffffffff821b0630 T dcn301_smu_enable_phy_refclk_pwrdwn -ffffffff821b0690 T dcn301_smu_enable_pme_wa -ffffffff821b06b0 T dcn301_smu_set_dram_addr_high -ffffffff821b0710 T dcn301_smu_set_dram_addr_low -ffffffff821b0770 T dcn301_smu_transfer_dpm_table_smu_2_dram -ffffffff821b0790 T dcn301_smu_transfer_wm_table_dram_2_smu -ffffffff821b1000 T vg_clk_mgr_construct -ffffffff821b1930 T vg_clk_mgr_destroy -ffffffff821b1980 t vg_update_clocks -ffffffff821b1d00 t vg_init_clocks -ffffffff821b1da0 t vg_enable_pme_wa -ffffffff821b1db0 t vg_are_clock_states_equal -ffffffff821b1e00 t vg_notify_wm_ranges -ffffffff821b3000 T dcn31_update_clocks -ffffffff821b36a0 T dcn31_init_clocks -ffffffff821b3750 T dcn31_are_clock_states_equal -ffffffff821b37b0 T dcn31_get_dtb_ref_freq_khz -ffffffff821b37e0 T dcn31_clk_mgr_construct -ffffffff821b3f50 T dcn31_clk_mgr_destroy -ffffffff821b3fa0 t dcn31_set_low_power_state -ffffffff821b41c0 t dcn31_enable_pme_wa -ffffffff821b41d0 t dcn31_notify_wm_ranges -ffffffff821b4570 t find_clk_for_voltage -ffffffff821b5000 T dcn31_smu_get_smu_version -ffffffff821b5020 t dcn31_smu_send_msg_with_param -ffffffff821b5290 T dcn31_smu_set_dispclk -ffffffff821b5310 T dcn31_smu_set_dprefclk -ffffffff821b5390 T dcn31_smu_set_hard_min_dcfclk -ffffffff821b5420 T dcn31_smu_set_min_deep_sleep_dcfclk -ffffffff821b54b0 T dcn31_smu_set_dppclk -ffffffff821b5530 T dcn31_smu_set_display_idle_optimization -ffffffff821b5580 T dcn31_smu_enable_phy_refclk_pwrdwn -ffffffff821b55d0 T dcn31_smu_enable_pme_wa -ffffffff821b5610 T dcn31_smu_set_dram_addr_high -ffffffff821b5650 T dcn31_smu_set_dram_addr_low -ffffffff821b5690 T dcn31_smu_transfer_dpm_table_smu_2_dram -ffffffff821b56d0 T dcn31_smu_transfer_wm_table_dram_2_smu -ffffffff821b5710 T dcn31_smu_set_zstate_support -ffffffff821b5780 T dcn31_smu_set_dtbclk -ffffffff821b6000 T dcn314_update_clocks -ffffffff821b66d0 T dcn314_are_clock_states_equal -ffffffff821b6730 T dcn314_clk_mgr_construct -ffffffff821b74f0 T dcn314_clk_mgr_destroy -ffffffff821b7540 t dcn314_enable_pme_wa -ffffffff821b7550 t dcn314_notify_wm_ranges -ffffffff821b8000 T dcn314_smu_get_smu_version -ffffffff821b8020 t dcn314_smu_send_msg_with_param -ffffffff821b82b0 T dcn314_smu_set_dispclk -ffffffff821b8330 T dcn314_smu_set_dprefclk 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dcn315_smu_set_dispclk -ffffffff821bb450 T dcn315_smu_set_hard_min_dcfclk -ffffffff821bb4e0 T dcn315_smu_set_min_deep_sleep_dcfclk -ffffffff821bb570 T dcn315_smu_set_dppclk -ffffffff821bb5f0 T dcn315_smu_set_display_idle_optimization -ffffffff821bb640 T dcn315_smu_enable_phy_refclk_pwrdwn -ffffffff821bb690 T dcn315_smu_enable_pme_wa -ffffffff821bb6d0 T dcn315_smu_set_dram_addr_high -ffffffff821bb710 T dcn315_smu_set_dram_addr_low -ffffffff821bb750 T dcn315_smu_transfer_dpm_table_smu_2_dram -ffffffff821bb790 T dcn315_smu_transfer_wm_table_dram_2_smu -ffffffff821bb7d0 T dcn315_smu_get_dpref_clk -ffffffff821bb830 T dcn315_smu_get_dtbclk -ffffffff821bb890 T dcn315_smu_set_dtbclk -ffffffff821bc000 T dcn316_clk_mgr_construct -ffffffff821bc6e0 T dcn316_clk_mgr_destroy -ffffffff821bc730 t dcn316_update_clocks -ffffffff821bcda0 t dcn316_enable_pme_wa -ffffffff821bcdb0 t dcn316_notify_wm_ranges -ffffffff821bd150 t find_clk_for_voltage -ffffffff821be000 T dcn316_smu_get_smu_version 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+ffffffff821b0570 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff821b0590 T dcn30_smu_set_pme_workaround +ffffffff821b1000 T dcn301_smu_get_smu_version +ffffffff821b1080 t dcn301_smu_send_msg_with_param +ffffffff821b1250 T dcn301_smu_set_dispclk +ffffffff821b1300 T dcn301_smu_set_dprefclk +ffffffff821b13c0 T dcn301_smu_set_hard_min_dcfclk +ffffffff821b1470 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff821b1520 T dcn301_smu_set_dppclk +ffffffff821b15d0 T dcn301_smu_set_display_idle_optimization +ffffffff821b1630 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff821b1690 T dcn301_smu_enable_pme_wa +ffffffff821b16b0 T dcn301_smu_set_dram_addr_high +ffffffff821b1710 T dcn301_smu_set_dram_addr_low +ffffffff821b1770 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff821b1790 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff821b2000 T vg_clk_mgr_construct +ffffffff821b2930 T vg_clk_mgr_destroy +ffffffff821b2980 t vg_update_clocks +ffffffff821b2d00 t vg_init_clocks +ffffffff821b2da0 t vg_enable_pme_wa +ffffffff821b2db0 t vg_are_clock_states_equal +ffffffff821b2e00 t vg_notify_wm_ranges +ffffffff821b4000 T dcn31_update_clocks +ffffffff821b46a0 T dcn31_init_clocks +ffffffff821b4750 T dcn31_are_clock_states_equal +ffffffff821b47b0 T dcn31_get_dtb_ref_freq_khz +ffffffff821b47e0 T dcn31_clk_mgr_construct +ffffffff821b4f50 T dcn31_clk_mgr_destroy +ffffffff821b4fa0 t dcn31_set_low_power_state +ffffffff821b51c0 t dcn31_enable_pme_wa +ffffffff821b51d0 t dcn31_notify_wm_ranges +ffffffff821b5570 t find_clk_for_voltage +ffffffff821b6000 T dcn31_smu_get_smu_version +ffffffff821b6020 t dcn31_smu_send_msg_with_param +ffffffff821b6290 T dcn31_smu_set_dispclk +ffffffff821b6310 T dcn31_smu_set_dprefclk +ffffffff821b6390 T dcn31_smu_set_hard_min_dcfclk +ffffffff821b6420 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff821b64b0 T dcn31_smu_set_dppclk +ffffffff821b6530 T dcn31_smu_set_display_idle_optimization +ffffffff821b6580 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff821b65d0 T dcn31_smu_enable_pme_wa +ffffffff821b6610 T dcn31_smu_set_dram_addr_high +ffffffff821b6650 T dcn31_smu_set_dram_addr_low +ffffffff821b6690 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff821b66d0 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff821b6710 T dcn31_smu_set_zstate_support +ffffffff821b6780 T dcn31_smu_set_dtbclk +ffffffff821b7000 T dcn314_update_clocks +ffffffff821b76d0 T dcn314_are_clock_states_equal +ffffffff821b7730 T dcn314_clk_mgr_construct +ffffffff821b84f0 T dcn314_clk_mgr_destroy +ffffffff821b8540 t dcn314_enable_pme_wa +ffffffff821b8550 t dcn314_notify_wm_ranges +ffffffff821b9000 T dcn314_smu_get_smu_version +ffffffff821b9020 t dcn314_smu_send_msg_with_param +ffffffff821b92b0 T dcn314_smu_set_dispclk +ffffffff821b9330 T dcn314_smu_set_dprefclk +ffffffff821b93b0 T dcn314_smu_set_hard_min_dcfclk +ffffffff821b9440 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff821b94d0 T dcn314_smu_set_dppclk +ffffffff821b9550 T dcn314_smu_set_display_idle_optimization +ffffffff821b95a0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff821b95f0 T dcn314_smu_enable_pme_wa +ffffffff821b9630 T dcn314_smu_set_dram_addr_high +ffffffff821b9670 T dcn314_smu_set_dram_addr_low +ffffffff821b96b0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff821b96f0 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff821b9730 T dcn314_smu_set_zstate_support +ffffffff821b9780 T dcn314_smu_set_dtbclk +ffffffff821ba000 T dcn315_clk_mgr_construct +ffffffff821ba890 T dcn315_clk_mgr_destroy +ffffffff821ba8e0 t dcn315_update_clocks +ffffffff821baef0 t dcn315_enable_pme_wa +ffffffff821baf00 t dcn315_notify_wm_ranges +ffffffff821bb2a0 t dcn315_disable_otg_wa +ffffffff821bc000 T dcn315_smu_get_smu_version +ffffffff821bc020 t dcn315_smu_send_msg_with_param +ffffffff821bc3d0 T dcn315_smu_set_dispclk +ffffffff821bc450 T dcn315_smu_set_hard_min_dcfclk +ffffffff821bc4e0 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff821bc570 T dcn315_smu_set_dppclk +ffffffff821bc5f0 T dcn315_smu_set_display_idle_optimization +ffffffff821bc640 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff821bc690 T dcn315_smu_enable_pme_wa +ffffffff821bc6d0 T dcn315_smu_set_dram_addr_high +ffffffff821bc710 T dcn315_smu_set_dram_addr_low +ffffffff821bc750 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff821bc790 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff821bc7d0 T dcn315_smu_get_dpref_clk +ffffffff821bc830 T dcn315_smu_get_dtbclk +ffffffff821bc890 T dcn315_smu_set_dtbclk +ffffffff821bd000 T dcn316_clk_mgr_construct +ffffffff821bd6e0 T dcn316_clk_mgr_destroy +ffffffff821bd730 t dcn316_update_clocks +ffffffff821bdda0 t dcn316_enable_pme_wa +ffffffff821bddb0 t dcn316_notify_wm_ranges +ffffffff821be150 t find_clk_for_voltage +ffffffff821bf000 T dcn316_smu_get_smu_version +ffffffff821bf020 t dcn316_smu_send_msg_with_param +ffffffff821bf200 T dcn316_smu_set_dispclk +ffffffff821bf280 T dcn316_smu_set_hard_min_dcfclk +ffffffff821bf310 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff821bf3a0 T dcn316_smu_set_dppclk +ffffffff821bf420 T dcn316_smu_set_display_idle_optimization +ffffffff821bf470 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff821bf4c0 T dcn316_smu_set_dram_addr_high +ffffffff821bf500 T dcn316_smu_set_dram_addr_low +ffffffff821bf540 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff821bf580 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff821bf5c0 T dcn316_smu_enable_pme_wa +ffffffff821bf600 T dcn316_smu_set_dtbclk +ffffffff821bf640 T dcn316_smu_get_dpref_clk +ffffffff821bf6a0 T dcn316_smu_get_smu_fclk +ffffffff821c0000 T dcn32_init_clocks +ffffffff821c0620 T dcn32_update_clocks_update_dpp_dto +ffffffff821c0760 T dcn32_clk_mgr_construct +ffffffff821c0a40 t dcn32_dump_clk_registers +ffffffff821c0ce0 T dcn32_clk_mgr_destroy +ffffffff821c0d50 t dcn32_update_clocks +ffffffff821c16b0 t dcn32_enable_pme_wa +ffffffff821c16f0 t dcn32_are_clock_states_equal +ffffffff821c1760 t dcn32_notify_wm_ranges +ffffffff821c18f0 t dcn32_set_hard_min_memclk +ffffffff821c1980 t dcn32_set_hard_max_memclk +ffffffff821c19d0 t dcn32_set_max_memclk +ffffffff821c1a10 t dcn32_set_min_memclk +ffffffff821c1a50 t dcn32_get_memclk_states_from_smu +ffffffff821c1ce0 t dcn32_is_smu_present +ffffffff821c1d10 t dcn32_get_dispclk_from_dentist +ffffffff821c1db0 t dcn32_update_clocks_update_dentist +ffffffff821c3000 T dcn32_smu_send_fclk_pstate_message +ffffffff821c3020 t dcn32_smu_send_msg_with_param +ffffffff821c31a0 T dcn32_smu_send_cab_for_uclk_message +ffffffff821c31d0 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff821c31f0 T dcn32_smu_set_pme_workaround +ffffffff821c3210 T dcn32_smu_set_hard_min_by_freq +ffffffff821c3270 T dcn32_smu_wait_for_dmub_ack_mclk +ffffffff821c4000 T dc_stream_adjust_vmin_vmax +ffffffff821c4170 T dc_stream_get_last_used_drr_vtotal +ffffffff821c42e0 T dc_stream_get_crtc_position +ffffffff821c4540 T dc_stream_configure_crc +ffffffff821c46d0 T dc_stream_get_crc +ffffffff821c47c0 T dc_stream_set_dyn_expansion +ffffffff821c4a50 T dc_stream_set_dither_option +ffffffff821c4bf0 T dc_stream_set_gamut_remap +ffffffff821c4da0 T dc_stream_program_csc_matrix +ffffffff821c5000 T dc_stream_set_static_screen_params +ffffffff821c5190 T dc_create +ffffffff821c57e0 t dc_construct_ctx +ffffffff821c5980 t dc_destruct +ffffffff821c5ce0 T dc_hardware_init +ffffffff821c5db0 T dc_init_callbacks +ffffffff821c5e00 T dc_deinit_callbacks +ffffffff821c5e50 T dc_destroy +ffffffff821c5ec0 T dc_validate_boot_timing +ffffffff821c62d0 T dc_enable_stereo +ffffffff821c63e0 T dc_trigger_sync +ffffffff821c6a40 T dc_z10_restore +ffffffff821c6a80 T dc_z10_save_init +ffffffff821c6ac0 T dc_commit_streams +ffffffff821c7010 t commit_minimal_transition_state +ffffffff821c7490 T dc_create_state +ffffffff821c7530 t dc_commit_state_no_check +ffffffff821c8e70 T dc_release_state +ffffffff821c8ee0 T dc_acquire_release_mpc_3dlut +ffffffff821c8fb0 T dc_post_update_surfaces_to_stream +ffffffff821c9430 T dc_copy_state +ffffffff821c9620 T dc_retain_state +ffffffff821c9650 T dc_set_generic_gpio_for_stereo +ffffffff821c97b0 T dc_check_update_surfaces_for_stream +ffffffff821ca1c0 T dc_dmub_update_dirty_rect +ffffffff821ca3d0 T dc_update_planes_and_stream +ffffffff821cb070 t fast_update_only +ffffffff821cb3d0 t commit_planes_for_stream_fast +ffffffff821cb820 t commit_planes_for_stream +ffffffff821ccf90 T dc_commit_updates_for_stream +ffffffff821cd670 t copy_surface_update_to_plane +ffffffff821cda90 t copy_stream_update_to_stream +ffffffff821ce190 T dc_get_current_stream_count +ffffffff821ce1d0 T dc_get_stream_at_index +ffffffff821ce220 T dc_interrupt_to_irq_source +ffffffff821ce240 T dc_interrupt_set +ffffffff821ce290 T dc_interrupt_ack +ffffffff821ce2b0 T dc_power_down_on_boot +ffffffff821ce300 T dc_set_power_state +ffffffff821ce530 T dc_resume +ffffffff821ce5b0 T dc_is_dmcu_initialized +ffffffff821ce600 T get_clock_requirements_for_state +ffffffff821ce680 T dc_set_clock +ffffffff821ce6c0 T dc_get_clock +ffffffff821ce700 T dc_set_psr_allow_active +ffffffff821ce810 T dc_allow_idle_optimizations +ffffffff821ce8d0 T dc_unlock_memory_clock_frequency +ffffffff821ce950 T dc_lock_memory_clock_frequency +ffffffff821ce9f0 T dc_enable_dcmode_clk_limit +ffffffff821cebc0 t blank_and_force_memclk +ffffffff821cedf0 T dc_is_plane_eligible_for_idle_optimizations +ffffffff821cee50 T dc_hardware_release +ffffffff821ceea0 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff821ceee0 T dc_is_dmub_outbox_supported +ffffffff821cef50 T dc_enable_dmub_notifications +ffffffff821cefc0 T dc_enable_dmub_outbox +ffffffff821cf010 T dc_process_dmub_aux_transfer_async +ffffffff821cf1a0 T get_link_index_from_dpia_port_index +ffffffff821cf260 T dc_process_dmub_set_config_async +ffffffff821cf340 T dc_process_dmub_set_mst_slots +ffffffff821cf430 T dc_process_dmub_dpia_hpd_int_enable +ffffffff821cf500 T dc_print_dmub_diagnostic_data +ffffffff821cf520 T dc_disable_accelerated_mode +ffffffff821cf540 T dc_notify_vsync_int_state +ffffffff821cf770 T dc_abm_save_restore +ffffffff821cf960 T dc_query_current_properties +ffffffff821cf9d0 T dc_set_edp_power +ffffffff821cfa40 t create_links +ffffffff821cfef0 t create_link_encoders +ffffffff821cffe0 t dc_update_viusal_confirm_color +ffffffff821d1000 T pre_surface_trace +ffffffff821d1030 T update_surface_trace +ffffffff821d1060 T post_surface_trace +ffffffff821d1090 T context_timing_trace +ffffffff821d1260 T context_clock_trace +ffffffff821d1290 T dc_status_to_str +ffffffff821d2000 T find_color_matrix +ffffffff821d20b0 T color_space_to_black_color +ffffffff821d2120 T hwss_wait_for_blank_complete +ffffffff821d21d0 T get_mpctree_visual_confirm_color +ffffffff821d2230 T get_surface_visual_confirm_color +ffffffff821d22e0 T get_hdr_visual_confirm_color +ffffffff821d23a0 T get_subvp_visual_confirm_color +ffffffff821d24a0 T hwss_build_fast_sequence +ffffffff821d2b60 T hwss_execute_sequence +ffffffff821d2fc0 T hwss_setup_dpp +ffffffff821d3060 T hwss_program_bias_and_scale +ffffffff821d30e0 T hwss_program_manual_trigger +ffffffff821d3130 T hwss_power_on_mpc_mem_pwr +ffffffff821d3180 T hwss_set_output_csc +ffffffff821d31d0 T hwss_set_ocsc_default +ffffffff821d3220 T hwss_send_dmcub_cmd +ffffffff821d3240 T get_mclk_switch_visual_confirm_color +ffffffff821d33a0 T get_surface_tile_visual_confirm_color +ffffffff821d4000 T link_enc_cfg_init +ffffffff821d41f0 T link_enc_cfg_copy +ffffffff821d4220 T link_enc_cfg_link_encs_assign +ffffffff821d56c0 T link_enc_cfg_validate +ffffffff821d5e70 T link_enc_cfg_link_enc_unassign +ffffffff821d6000 T link_enc_cfg_is_transmitter_mappable +ffffffff821d6120 T link_enc_cfg_get_stream_using_link_enc +ffffffff821d6220 T link_enc_cfg_get_link_using_link_enc +ffffffff821d6330 T link_enc_cfg_get_link_enc_used_by_link +ffffffff821d64b0 T link_enc_cfg_get_next_avail_link_enc +ffffffff821d6620 T link_enc_cfg_get_link_enc_used_by_stream +ffffffff821d6640 T link_enc_cfg_get_link_enc +ffffffff821d66d0 T link_enc_cfg_get_link_enc_used_by_stream_current +ffffffff821d6850 T link_enc_cfg_is_link_enc_avail +ffffffff821d6a50 T link_enc_cfg_set_transient_mode +ffffffff821d7000 T dc_get_link_at_index +ffffffff821d7030 T dc_get_edp_links +ffffffff821d70b0 T dc_get_edp_link_panel_inst +ffffffff821d7170 T dc_link_detect +ffffffff821d71a0 T dc_link_detect_connection_type +ffffffff821d71d0 T dc_link_get_status +ffffffff821d7200 T dc_link_is_hdcp14 +ffffffff821d7230 T dc_link_is_hdcp22 +ffffffff821d7260 T dc_link_clear_dprx_states +ffffffff821d7290 T dc_link_reset_cur_dp_mst_topology +ffffffff821d72c0 T dc_link_bandwidth_kbps +ffffffff821d72f0 T dc_get_cur_link_res_map +ffffffff821d7310 T dc_restore_link_res_map +ffffffff821d7330 T dc_link_update_dsc_config +ffffffff821d7360 T dc_is_oem_i2c_device_present +ffffffff821d73b0 T dc_submit_i2c +ffffffff821d73e0 T dc_submit_i2c_oem +ffffffff821d7430 T dc_link_dp_handle_automated_test +ffffffff821d7460 T dc_link_dp_set_test_pattern +ffffffff821d7490 T dc_link_set_drive_settings +ffffffff821d7530 T dc_link_set_preferred_link_settings +ffffffff821d7550 T dc_link_set_preferred_training_settings +ffffffff821d7580 T dc_dp_trace_is_initialized +ffffffff821d75b0 T dc_dp_trace_set_is_logged_flag +ffffffff821d75e0 T dc_dp_trace_is_logged +ffffffff821d7610 T dc_dp_trace_get_lt_end_timestamp +ffffffff821d7640 T dc_dp_trace_get_lt_counts +ffffffff821d7670 T dc_dp_trace_get_link_loss_count +ffffffff821d76a0 T dc_link_add_remote_sink +ffffffff821d76d0 T dc_link_remove_remote_sink +ffffffff821d7700 T dc_link_aux_transfer_raw +ffffffff821d7730 T dc_link_bw_kbps_from_raw_frl_link_rate_data +ffffffff821d7750 T dc_link_decide_edp_link_settings +ffffffff821d7780 T dc_link_dp_get_max_link_enc_cap +ffffffff821d77b0 T dc_link_dp_mst_decide_link_encoding_format +ffffffff821d77e0 T dc_link_get_link_cap +ffffffff821d7810 T dc_link_get_highest_encoding_format +ffffffff821d78e0 T dc_link_is_dp_sink_present +ffffffff821d7910 T dc_link_is_fec_supported +ffffffff821d7940 T dc_link_overwrite_extended_receiver_cap +ffffffff821d7970 T dc_link_should_enable_fec +ffffffff821d79a0 T dc_link_dp_dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff821d79d0 T dc_link_handle_usb4_bw_alloc_response +ffffffff821d7a00 T dc_link_check_link_loss_status +ffffffff821d7a30 T dc_link_dp_allow_hpd_rx_irq +ffffffff821d7a60 T dc_link_dp_handle_link_loss +ffffffff821d7a90 T dc_link_dp_read_hpd_rx_irq_data +ffffffff821d7ac0 T dc_link_handle_hpd_rx_irq +ffffffff821d7af0 T dc_link_dp_receiver_power_ctrl +ffffffff821d7b20 T dc_link_decide_lttpr_mode +ffffffff821d7b50 T dc_link_edp_panel_backlight_power_on +ffffffff821d7b80 T dc_link_get_backlight_level +ffffffff821d7bb0 T dc_link_get_backlight_level_nits +ffffffff821d7be0 T dc_link_set_backlight_level +ffffffff821d7c10 T dc_link_set_backlight_level_nits +ffffffff821d7c40 T dc_link_get_target_backlight_pwm +ffffffff821d7c70 T dc_link_get_psr_state +ffffffff821d7ca0 T dc_link_set_psr_allow_active +ffffffff821d7cd0 T dc_link_setup_psr +ffffffff821d7d00 T dc_link_get_replay_state +ffffffff821d7d30 T dc_link_wait_for_t12 +ffffffff821d7d60 T dc_link_get_hpd_state +ffffffff821d7d90 T dc_link_enable_hpd +ffffffff821d7dc0 T dc_link_disable_hpd +ffffffff821d7df0 T dc_link_enable_hpd_filter +ffffffff821d7e20 T dc_link_dp_dpia_validate +ffffffff821d8000 T resource_parse_asic_id +ffffffff821d8250 T dc_create_resource_pool +ffffffff821d8620 T dc_destroy_resource_pool +ffffffff821d8690 T resource_construct +ffffffff821d8c70 T resource_unreference_clock_source +ffffffff821d8cf0 T resource_reference_clock_source +ffffffff821d8d70 T resource_get_clock_source_reference +ffffffff821d8df0 T resource_are_vblanks_synchronizable +ffffffff821d9020 T resource_are_streams_timing_synchronizable +ffffffff821d9110 T resource_find_used_clk_src_for_sharing +ffffffff821d9250 T resource_get_num_mpc_splits +ffffffff821d92e0 T resource_get_num_odm_splits +ffffffff821d93b0 T resource_get_otg_master +ffffffff821d9460 T resource_build_scaling_params +ffffffff821da2f0 t calculate_odm_slice_in_timing_active +ffffffff821da490 T resource_build_scaling_params_for_context +ffffffff821da610 T resource_find_free_secondary_pipe_legacy +ffffffff821da6b0 T resource_find_free_pipe_used_in_cur_mpc_blending_tree +ffffffff821da720 T resource_is_pipe_type +ffffffff821da7a0 T recource_find_free_pipe_not_used_in_cur_res_ctx +ffffffff821da820 T resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine +ffffffff821da940 T resource_is_for_mpcc_combine +ffffffff821da9d0 T resource_find_any_free_pipe +ffffffff821daa40 T resource_get_otg_master_for_stream +ffffffff821dab70 T resource_get_opp_head +ffffffff821dac10 T dc_add_plane_to_context +ffffffff821daf10 T dc_remove_plane_from_context +ffffffff821db110 T dc_rem_all_planes_for_stream +ffffffff821db2d0 T dc_add_all_planes_for_stream +ffffffff821db450 T dc_is_timing_changed +ffffffff821db4c0 T dc_is_stream_unchanged +ffffffff821db5b0 T dc_is_stream_scaling_unchanged +ffffffff821db660 T update_audio_usage +ffffffff821db6d0 T dc_add_stream_to_ctx +ffffffff821db7c0 T dc_remove_stream_from_ctx +ffffffff821dbc10 T resource_map_pool_resources +ffffffff821dc700 t acquire_first_split_pipe +ffffffff821dc880 t add_hpo_dp_link_enc_to_ctx +ffffffff821dc950 t find_first_free_audio +ffffffff821dca10 T dc_resource_state_copy_construct_current +ffffffff821dca30 T dc_resource_state_copy_construct +ffffffff821dcc00 T dc_resource_state_construct +ffffffff821dcc20 T dc_resource_is_dsc_encoding_supported +ffffffff821dcc70 T dc_validate_with_context +ffffffff821dd930 t planes_changed_for_existing_stream +ffffffff821ddad0 T dc_validate_global_state +ffffffff821dde90 T dc_resource_state_destruct +ffffffff821ddf70 T dc_resource_find_first_free_pll +ffffffff821ddfe0 T resource_build_info_frame +ffffffff821de720 T resource_map_clock_resources +ffffffff821de8d0 T pipe_need_reprogram +ffffffff821dea50 T resource_build_bit_depth_reduction_params +ffffffff821dec80 T dc_validate_stream +ffffffff821dee90 T dc_validate_plane +ffffffff821def20 T resource_pixel_format_to_bpp +ffffffff821defa0 T get_audio_check +ffffffff821df0c0 T get_temp_dp_link_res +ffffffff821df1d0 T reset_syncd_pipes_from_disabled_pipes +ffffffff821df320 T check_syncd_pipes_for_disabled_master_pipe +ffffffff821df480 T reset_sync_context_for_pipe +ffffffff821df530 T resource_transmitter_to_phy_idx +ffffffff821df590 T get_link_hwss +ffffffff821df650 T is_h_timing_divisible_by_2 +ffffffff821df6b0 T dc_resource_acquire_secondary_pipe_for_mpc_odm +ffffffff821df8e0 T update_dp_encoder_resources_for_test_harness +ffffffff821dfba0 t calculate_plane_rec_in_timing_active +ffffffff821dfec0 t calculate_init_and_vp +ffffffff821e1000 T dc_sink_retain +ffffffff821e1030 T dc_sink_release +ffffffff821e10b0 T dc_sink_create +ffffffff821e2000 T dc_stat_get_dmub_notification +ffffffff821e20d0 T dc_stat_get_dmub_dataout +ffffffff821e3000 T update_stream_signal +ffffffff821e3080 T dc_stream_retain +ffffffff821e30b0 T dc_stream_release +ffffffff821e3150 T dc_create_stream_for_sink +ffffffff821e34c0 T dc_copy_stream +ffffffff821e35a0 T dc_stream_get_status_from_state +ffffffff821e3600 T dc_stream_get_status +ffffffff821e3670 T dc_optimize_timing_for_fsft +ffffffff821e36c0 T dc_stream_set_cursor_attributes +ffffffff821e3900 t program_cursor_attributes +ffffffff821e3a90 T dc_stream_set_cursor_position +ffffffff821e3bf0 t program_cursor_position +ffffffff821e3d50 T dc_stream_add_writeback +ffffffff821e3f70 T dc_stream_remove_writeback +ffffffff821e40b0 T dc_stream_warmup_writeback +ffffffff821e40f0 T dc_stream_get_vblank_counter +ffffffff821e41c0 T dc_stream_send_dp_sdp +ffffffff821e44d0 T dc_stream_get_scanoutpos +ffffffff821e45b0 T dc_stream_dmdata_status_done +ffffffff821e4670 T dc_stream_set_dynamic_metadata +ffffffff821e47e0 T dc_stream_add_dsc_to_resource +ffffffff821e4830 T dc_stream_get_pipe_ctx +ffffffff821e48e0 T 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dce110_enable_dp_link_output +ffffffff8221c4e0 T dce110_disable_link_output +ffffffff8221c5f0 T dce110_hw_sequencer_construct +ffffffff8221c650 t enable_display_pipe_clock_gating +ffffffff8221c680 t build_audio_output +ffffffff8221c7f0 t init_hw +ffffffff8221cb10 t dce110_power_down_fe +ffffffff8221cbf0 t dce110_apply_ctx_for_surface +ffffffff8221d3c0 t dce110_post_unlock_program_front_end +ffffffff8221d3f0 t update_plane_addr +ffffffff8221d460 t dce110_wait_for_mpcc_disconnect +ffffffff8221d490 t dce110_update_pending_status +ffffffff8221d580 t get_position +ffffffff8221d610 t dce110_enable_per_frame_crtc_position_reset +ffffffff8221d920 t dce110_enable_timing_synchronization +ffffffff8221dc90 t set_drr +ffffffff8221dd90 t set_static_screen_control +ffffffff8221de70 t dce110_set_cursor_position +ffffffff8221dfc0 t dce110_set_cursor_attribute +ffffffff8221e080 t program_gamut_remap +ffffffff8221e1e0 t program_output_csc +ffffffff8221e2e0 t init_pipes +ffffffff8221e310 t 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t dce110_hwseq_create +ffffffff82228000 T dce110_timing_generator_set_early_control +ffffffff82228080 T dce110_timing_generator_enable_crtc +ffffffff82228130 T dce110_timing_generator_program_blank_color +ffffffff822281d0 T dce110_timing_generator_disable_crtc +ffffffff82228230 T dce110_timing_generator_program_timing_generator +ffffffff82228450 T dce110_timing_generator_set_drr +ffffffff822285c0 T dce110_timing_generator_set_static_screen_control +ffffffff82228650 T dce110_timing_generator_get_vblank_counter +ffffffff822286b0 T dce110_timing_generator_get_position +ffffffff82228760 T dce110_timing_generator_get_crtc_scanoutpos +ffffffff82228860 T dce110_timing_generator_program_blanking +ffffffff82228b40 T dce110_timing_generator_set_test_pattern +ffffffff82228ea0 T dce110_timing_generator_validate_timing +ffffffff82228f70 T dce110_timing_generator_wait_for_vblank +ffffffff82229110 T dce110_timing_generator_is_counter_moving +ffffffff822291a0 T dce110_timing_generator_wait_for_vactive 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dce110_tg_set_colors +ffffffff8222a180 T dce110_arm_vert_intr +ffffffff8222a260 T dce110_configure_crc +ffffffff8222a3f0 t dce110_is_tg_enabled +ffffffff8222a450 T dce110_get_crc +ffffffff8222a540 T dce110_timing_generator_construct +ffffffff8222b000 T dce110_timing_generator_v_construct +ffffffff8222b070 t dce110_timing_generator_v_program_timing +ffffffff8222b3d0 t dce110_timing_generator_v_enable_crtc +ffffffff8222b470 t dce110_timing_generator_v_disable_crtc +ffffffff8222b4f0 t dce110_timing_generator_v_is_counter_moving +ffffffff8222b580 t dce110_timing_generator_v_get_vblank_counter +ffffffff8222b5e0 t dce110_timing_generator_v_set_early_control +ffffffff8222b650 t dce110_timing_generator_v_wait_for_state +ffffffff8222b840 t dce110_timing_generator_v_set_blank +ffffffff8222b8e0 t dce110_timing_generator_v_set_overscan_color_black +ffffffff8222b990 t dce110_timing_generator_v_program_blank_color +ffffffff8222ba20 t dce110_timing_generator_v_set_colors +ffffffff8222bb60 t dce110_timing_generator_v_disable_vga +ffffffff8222bb90 t dce110_timing_generator_v_did_triggered_reset_occur +ffffffff8222bbe0 t dce110_timing_generator_v_setup_global_swap_lock +ffffffff8222bc00 t dce110_timing_generator_v_enable_reset_trigger +ffffffff8222bc20 t dce110_timing_generator_v_disable_reset_trigger +ffffffff8222bc40 t dce110_timing_generator_v_tear_down_global_swap_lock +ffffffff8222bc60 t dce110_timing_generator_v_enable_advanced_request +ffffffff8222c000 T dce110_transform_v_construct +ffffffff8222c060 t dce110_xfmv_reset +ffffffff8222c0c0 t dce110_xfmv_set_scaler +ffffffff8222c960 t dce110_xfmv_set_pixel_storage_depth +ffffffff8222ca50 t dce110_xfmv_set_gamut_remap +ffffffff8222ca80 t program_multi_taps_filter +ffffffff8222cf40 t program_viewport +ffffffff8222e000 T dce112_compressor_power_up_fbc +ffffffff8222e170 T dce112_compressor_enable_fbc +ffffffff8222e370 T dce112_compressor_is_fbc_enabled_in_hw +ffffffff8222e440 T dce112_compressor_enable_lpt +ffffffff8222e5a0 t wait_for_fbc_state_changed +ffffffff8222e8f0 T dce112_compressor_disable_fbc +ffffffff8222ea10 T dce112_compressor_disable_lpt +ffffffff8222ebd0 T dce112_compressor_is_lpt_enabled_in_hw +ffffffff8222ec30 T dce112_compressor_program_compressed_surface_address_and_pitch +ffffffff8222eda0 T dce112_compressor_program_lpt_control +ffffffff8222f020 T dce112_compressor_set_fbc_invalidation_triggers +ffffffff8222f0c0 T dce112_compressor_construct +ffffffff8222f190 T dce112_compressor_create +ffffffff8222f290 T dce112_compressor_destroy +ffffffff82230000 T dce112_hw_sequencer_construct +ffffffff82230060 t dce112_enable_display_power_gating +ffffffff82231000 T dce112_validate_bandwidth +ffffffff822310d0 T resource_map_phy_clock_resources +ffffffff82231250 T dce112_add_stream_to_ctx +ffffffff82231320 T dce112_create_resource_pool +ffffffff822329c0 t dce112_resource_destruct +ffffffff82232cf0 t dce112_destroy_resource_pool +ffffffff82232d60 t dce112_panel_cntl_create +ffffffff82232df0 t dce112_link_encoder_create +ffffffff82232f10 t dce112_validate_global +ffffffff82232fb0 t read_dce_straps +ffffffff82233020 t create_audio +ffffffff82233050 t dce112_stream_encoder_create +ffffffff822330f0 t dce112_hwseq_create +ffffffff82234000 T dce121_xgmi_enabled +ffffffff82234070 T dce120_hw_sequencer_construct +ffffffff822340d0 t dce120_enable_display_power_gating +ffffffff82234100 t dce120_update_dchub +ffffffff82235000 T dce120_create_resource_pool +ffffffff822365f0 t dce120_resource_destruct +ffffffff82236910 t dce120_destroy_resource_pool +ffffffff82236980 t dce120_panel_cntl_create +ffffffff82236a10 t dce120_link_encoder_create +ffffffff82236b30 t read_dce_straps +ffffffff82236bd0 t create_audio +ffffffff82236c00 t dce120_stream_encoder_create +ffffffff82236ca0 t dce121_hwseq_create +ffffffff82236d10 t dce120_hwseq_create +ffffffff82237000 T dce120_timing_generator_construct +ffffffff82237090 t dce120_tg_validate_timing +ffffffff82237150 t dce120_tg_program_timing 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dce120_timing_generator_tear_down_global_swap_lock +ffffffff82238090 t dce120_timing_generator_enable_advanced_request +ffffffff82238130 t dce120_timing_generator_set_drr +ffffffff82238320 t dce120_timing_generator_set_static_screen_control +ffffffff822383a0 t dce120_timing_generator_set_test_pattern +ffffffff822388d0 t dce120_arm_vert_intr +ffffffff822389a0 t dce120_is_tg_enabled +ffffffff82238a00 t dce120_configure_crc +ffffffff82238c20 t dce120_get_crc +ffffffff82239000 T dce80_hw_sequencer_construct +ffffffff8223a000 T dce80_create_resource_pool +ffffffff8223b050 T dce81_create_resource_pool +ffffffff8223c090 T dce83_create_resource_pool +ffffffff8223cf70 t dce80_resource_destruct +ffffffff8223d290 t dce80_destroy_resource_pool +ffffffff8223d300 t dce80_panel_cntl_create +ffffffff8223d390 t dce80_link_encoder_create +ffffffff8223d4b0 t dce80_validate_bandwidth +ffffffff8223d5f0 t dce80_validate_global +ffffffff8223d690 t read_dce_straps +ffffffff8223d700 t create_audio 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dpp1_dscl_calc_lb_num_partitions +ffffffff822471e0 T dpp1_dscl_is_lb_conf_valid +ffffffff82247220 T dpp1_dscl_set_scaler_manual_scale +ffffffff82248830 t dpp1_dscl_get_filter_coeffs_64p +ffffffff82248900 t dpp1_dscl_set_scaler_filter +ffffffff82249000 t dwb1_get_caps +ffffffff822490a0 t dwb1_enable +ffffffff822491b0 t dwb1_disable +ffffffff82249340 T dcn10_dwbc_construct +ffffffff8224a000 T hubbub1_wm_read_state +ffffffff8224a3d0 T hubbub1_allow_self_refresh_control +ffffffff8224a460 T hubbub1_is_allow_self_refresh_enabled +ffffffff8224a4d0 T hubbub1_verify_allow_pstate_change_high +ffffffff8224a6d0 T hubbub1_wm_change_req_wa +ffffffff8224a780 T hubbub1_program_urgent_watermarks +ffffffff8224aba0 T hubbub1_program_stutter_watermarks +ffffffff8224b050 T hubbub1_program_pstate_watermarks +ffffffff8224b2c0 T hubbub1_program_watermarks +ffffffff8224b420 T hubbub1_update_dchub +ffffffff8224b690 T hubbub1_toggle_watermark_change_req +ffffffff8224b740 T hubbub1_soft_reset +ffffffff8224b780 T hubbub1_construct +ffffffff8224b7e0 t hubbub1_get_dcc_compression_cap +ffffffff8224ba20 t hubbub1_dcc_support_swizzle +ffffffff8224bab0 t hubbub1_dcc_support_pixel_format +ffffffff8224c000 T hubp1_set_blank +ffffffff8224c130 T hubp1_clear_underflow +ffffffff8224c180 T hubp1_vready_workaround +ffffffff8224c220 T hubp1_program_tiling +ffffffff8224c4c0 T hubp1_program_size +ffffffff8224c660 T hubp1_program_rotation +ffffffff8224c7e0 T hubp1_program_pixel_format +ffffffff8224cdc0 T hubp1_program_surface_flip_and_addr +ffffffff8224d700 T hubp1_dcc_control +ffffffff8224d7d0 T hubp1_program_surface_config +ffffffff8224d900 T hubp1_program_requestor +ffffffff8224dcf0 T hubp1_program_deadline +ffffffff8224e4b0 T hubp1_is_flip_pending +ffffffff8224e5e0 T min_set_viewport +ffffffff8224e920 T hubp1_read_state_common +ffffffff8224f7d0 T hubp1_read_state +ffffffff8224fac0 T hubp1_get_cursor_pitch +ffffffff8224fb70 T hubp1_cursor_set_attributes +ffffffff8224fe50 T hubp1_cursor_set_position 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dcn10_setup_periodic_interrupt +ffffffff8225ae40 T dcn10_setup_vupdate_interrupt +ffffffff8225af10 T dcn10_unblank_stream +ffffffff8225b030 T dcn10_send_immediate_sdp_message +ffffffff8225b090 T dcn10_set_clock +ffffffff8225b1a0 T dcn10_get_clock +ffffffff8225b200 T dcn10_get_dcc_en_bits +ffffffff8225c000 T snprintf_count +ffffffff8225c090 T dcn10_clear_status_bits +ffffffff8225c260 T dcn10_get_hw_state +ffffffff8225e000 T dcn10_hw_sequencer_construct +ffffffff8225f000 T dcn10_ipp_construct +ffffffff8225f050 T dcn20_ipp_construct +ffffffff8225f0a0 t dcn10_ipp_destroy +ffffffff82260000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff822600d0 T dcn10_get_dig_frontend +ffffffff82260190 T enc1_configure_encoder +ffffffff82260210 T dcn10_psr_program_dp_dphy_fast_training +ffffffff822602a0 T dcn10_psr_program_secondary_packet +ffffffff82260320 T dcn10_is_dig_enabled +ffffffff82260390 T dcn10_link_encoder_validate_dvi_output +ffffffff82260440 T dcn10_link_encoder_validate_dp_output +ffffffff82260480 T dcn10_link_encoder_construct +ffffffff82260680 T dcn10_link_encoder_validate_output_with_stream +ffffffff82260880 T dcn10_link_encoder_hw_init +ffffffff82260ac0 T dcn10_aux_initialize +ffffffff82260b60 T dcn10_link_encoder_destroy +ffffffff82260bb0 T dcn10_link_encoder_setup +ffffffff82260d00 T dcn10_link_encoder_enable_tmds_output +ffffffff82260e00 T dcn10_link_encoder_enable_tmds_output_with_clk_pattern_wa +ffffffff82260f40 T dcn10_link_encoder_enable_dp_output +ffffffff822610d0 T dcn10_link_encoder_enable_dp_mst_output +ffffffff82261260 T dcn10_link_encoder_disable_output +ffffffff82261470 T dcn10_link_encoder_dp_set_lane_settings +ffffffff82261620 T dcn10_link_encoder_dp_set_phy_pattern +ffffffff82261df0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff82262050 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff82262380 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff822624e0 T dcn10_link_encoder_enable_hpd +ffffffff82262520 T dcn10_link_encoder_disable_hpd +ffffffff82262560 T dcn10_get_dig_mode +ffffffff822625e0 T dcn10_link_encoder_get_max_link_cap +ffffffff82262660 t program_pattern_symbols +ffffffff82263000 T mpc1_set_bg_color +ffffffff82263210 T mpc1_get_mpcc +ffffffff822632b0 T mpc1_update_stereo_mix +ffffffff822633e0 T mpc1_assert_idle_mpcc +ffffffff822634c0 T mpc1_get_mpcc_for_dpp +ffffffff82263580 T mpc1_is_mpcc_idle +ffffffff82263680 T mpc1_assert_mpcc_idle_before_connect +ffffffff822637e0 T mpc1_insert_plane +ffffffff82263e00 T mpc1_remove_mpcc +ffffffff82264210 T mpc1_mpc_init +ffffffff82264580 T mpc1_mpc_init_single_inst +ffffffff82264790 T mpc1_init_mpcc_list_from_hw +ffffffff82264ab0 T mpc1_read_mpcc_state +ffffffff82264c70 T mpc1_cursor_lock +ffffffff82264cf0 T mpc1_get_mpc_out_mux +ffffffff82264d80 T dcn10_mpc_construct +ffffffff82264f00 t mpc1_update_blending +ffffffff82266000 T opp1_program_bit_depth_reduction +ffffffff82266440 T opp1_set_dyn_expansion +ffffffff822665c0 T opp1_program_fmt +ffffffff822668e0 T opp1_program_stereo +ffffffff822669e0 T opp1_pipe_clock_control +ffffffff82266a20 T opp1_destroy +ffffffff82266a70 T dcn10_opp_construct +ffffffff82267000 T optc1_program_global_sync +ffffffff82267170 T optc1_setup_vertical_interrupt0 +ffffffff82267200 T optc1_setup_vertical_interrupt1 +ffffffff82267270 T optc1_setup_vertical_interrupt2 +ffffffff822672e0 T optc1_program_timing +ffffffff82267a30 T optc1_is_two_pixels_per_containter +ffffffff82267a80 T optc1_set_vtg_params +ffffffff82267bb0 T optc1_set_blank_data_double_buffer +ffffffff82267bf0 T optc1_set_timing_double_buffer +ffffffff82267c30 T optc1_set_blank +ffffffff82267d20 T optc1_is_blanked +ffffffff82267db0 T optc1_enable_optc_clock +ffffffff82268010 T optc1_disable_crtc +ffffffff82268120 T optc1_program_blank_color +ffffffff822681e0 T optc1_validate_timing +ffffffff822682f0 T optc1_get_vblank_counter +ffffffff82268360 T optc1_lock +ffffffff82268460 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dpp2_power_on_obuf +ffffffff82273310 T dpp2_dummy_program_input_lut +ffffffff82273340 T dscl2_calc_lb_num_partitions +ffffffff82273470 T dpp2_cnv_set_alpha_keyer +ffffffff82273740 T dpp2_set_cursor_attributes +ffffffff822738b0 T oppn20_dummy_program_regamma_pwl +ffffffff822738e0 T dpp2_construct +ffffffff82273960 t dpp2_cnv_setup +ffffffff82275000 T dpp2_set_degamma_pwl +ffffffff82275430 T dpp2_set_degamma +ffffffff822755e0 T dpp2_cm_set_gamut_remap +ffffffff82275830 T dpp2_program_input_csc +ffffffff82275a80 T dpp20_program_blnd_lut +ffffffff82276250 T dpp20_program_shaper +ffffffff822783d0 T dpp20_program_3dlut +ffffffff82278b60 t dpp20_set3dlut_ram12 +ffffffff82278d50 T dpp2_set_hdr_multiplier +ffffffff82279000 T dsc2_construct +ffffffff82279050 T dsc2_get_enc_caps +ffffffff822790d0 T dsc_config_log +ffffffff82279190 T dsc2_get_packed_pps +ffffffff82279390 T dsc_prepare_config +ffffffff82279950 T dsc_log_pps +ffffffff8227a2c0 T dsc_override_rc_params +ffffffff8227a410 T dsc_init_reg_values +ffffffff8227a500 T dsc_dc_pixel_encoding_to_dsc_pixel_format +ffffffff8227a5b0 T dsc_dc_color_depth_to_dsc_bits_per_comp +ffffffff8227a5f0 T dsc_update_from_dsc_parameters +ffffffff8227a6b0 t dsc2_read_state +ffffffff8227a8b0 t dsc2_validate_stream +ffffffff8227a910 t dsc2_set_config +ffffffff8227bde0 t dsc2_enable +ffffffff8227bfd0 t dsc2_disable +ffffffff8227c190 t dsc2_disconnect +ffffffff8227d000 T dwb2_config_dwb_cnv +ffffffff8227d240 T dwb2_disable +ffffffff8227d380 T dwb2_is_enabled +ffffffff8227d430 T dwb2_set_stereo +ffffffff8227d530 T dwb2_set_new_content +ffffffff8227d5b0 T dwb2_set_scaler +ffffffff8227d9b0 T dcn20_dwbc_construct +ffffffff8227da00 t dwb2_get_caps +ffffffff8227dae0 t dwb2_enable +ffffffff8227dc70 t dwb2_update +ffffffff8227de00 t dwb2_set_warmup +ffffffff8227e000 T dwb_program_horz_scalar +ffffffff8227e590 t wbscl_get_filter_coeffs_16p +ffffffff8227eb10 t wbscl_set_scaler_filter +ffffffff8227ed30 T dwb_program_vert_scalar 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hubp2_cursor_set_attributes +ffffffff82284100 T hubp2_dmdata_set_attributes +ffffffff82284550 T hubp2_dmdata_load +ffffffff822845f0 T hubp2_dmdata_status_done +ffffffff82284670 T hubp2_program_surface_flip_and_addr +ffffffff82285030 T hubp2_enable_triplebuffer +ffffffff82285100 T hubp2_is_triplebuffer_enabled +ffffffff82285180 T hubp2_set_flip_control_surface_gsl +ffffffff822851d0 T hubp2_is_flip_pending +ffffffff82285300 T hubp2_set_blank +ffffffff82285370 T hubp2_set_blank_regs +ffffffff82285480 T hubp2_cursor_set_position +ffffffff82285930 T hubp2_clk_cntl +ffffffff82285980 T hubp2_vtg_sel +ffffffff822859c0 T hubp2_clear_underflow +ffffffff82285a10 T hubp2_read_state_common +ffffffff82286800 T hubp2_read_state +ffffffff82286af0 T hubp2_construct +ffffffff82286b60 t hubp2_setup +ffffffff82287030 t hubp2_validate_dml_output +ffffffff82289000 T dcn20_set_flip_control_gsl +ffffffff82289050 T dcn20_enable_power_gating_plane +ffffffff82289550 T dcn20_dccg_init +ffffffff822895e0 T dcn20_disable_vga +ffffffff822896d0 T dcn20_program_triple_buffer +ffffffff82289720 T dcn20_init_blank +ffffffff82289980 T dcn20_dsc_pg_control +ffffffff82289df0 T dcn20_dpp_pg_control +ffffffff8228a0e0 T dcn20_hubp_pg_control +ffffffff8228a3d0 T dcn20_plane_atomic_disable +ffffffff8228a560 t dcn20_setup_gsl_group_as_lock +ffffffff8228a7d0 T dcn20_disable_plane +ffffffff8228a8b0 T dcn20_disable_pixel_data +ffffffff8228a8d0 T dcn20_blank_pixel_data +ffffffff8228ab20 T dcn20_enable_stream_timing +ffffffff8228b160 T dcn20_program_output_csc +ffffffff8228b250 T dcn20_set_output_transfer_func +ffffffff8228b3f0 T dcn20_set_blend_lut +ffffffff8228b470 T dcn20_set_shaper_3dlut +ffffffff8228b540 T dcn20_set_input_transfer_func +ffffffff8228b740 T dcn20_update_odm +ffffffff8228b840 T dcn20_pipe_control_lock +ffffffff8228bb80 T dcn20_program_front_end_for_ctx +ffffffff8228c9e0 t dcn20_program_pipe +ffffffff8228d5c0 T dcn20_post_unlock_program_front_end +ffffffff8228d930 T dcn20_prepare_bandwidth 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hubp21_validate_dml_output +ffffffff822b4000 T dcn21_init_sys_ctx +ffffffff822b4120 T dcn21_s0i3_golden_init_wa +ffffffff822b4190 T dcn21_exit_optimized_pwr_state +ffffffff822b41b0 T dcn21_optimize_pwr_state +ffffffff822b41e0 T dcn21_PLAT_58856_wa +ffffffff822b4290 T dcn21_set_abm_immediate_disable +ffffffff822b43d0 T dcn21_set_pipe +ffffffff822b4510 T dcn21_set_backlight_level +ffffffff822b4750 T dcn21_is_abm_supported +ffffffff822b5000 T dcn21_hw_sequencer_construct +ffffffff822b6000 T dcn21_link_encoder_enable_dp_output +ffffffff822b6150 t dcn21_link_encoder_acquire_phy +ffffffff822b6370 T dcn21_link_encoder_construct +ffffffff822b6570 t dcn21_link_encoder_enable_dp_mst_output +ffffffff822b65e0 t dcn21_link_encoder_disable_output +ffffffff822b7000 T dcn21_fast_validate_bw +ffffffff822b7790 T dcn21_create_resource_pool +ffffffff822b8db0 t dcn21_resource_destruct +ffffffff822b92f0 t dcn21_destroy_resource_pool +ffffffff822b9360 t dcn21_panel_cntl_create +ffffffff822b93f0 t dcn21_link_encoder_create +ffffffff822b9500 t dcn21_validate_bandwidth +ffffffff822b95a0 t dcn21_patch_unknown_plane_state +ffffffff822b95f0 t dcn21_get_panel_config_defaults +ffffffff822b9630 t read_dce_straps +ffffffff822b9660 t dcn21_create_audio +ffffffff822b9690 t dcn21_stream_encoder_create +ffffffff822b9730 t dcn21_hwseq_create +ffffffff822ba000 T afmt3_setup_hdmi_audio +ffffffff822ba200 T afmt3_se_audio_setup +ffffffff822ba3b0 T afmt3_audio_mute_control +ffffffff822ba420 T afmt3_audio_info_immediate_update +ffffffff822ba460 T afmt3_setup_dp_audio +ffffffff822ba570 T afmt3_construct +ffffffff822bb000 T cm_helper_program_gamcor_xfer_func +ffffffff822bb430 T cm3_helper_translate_curve_to_hw_format +ffffffff822bc160 T cm3_helper_convert_to_custom_float +ffffffff822bc6a0 T cm3_helper_translate_curve_to_degamma_hw_format +ffffffff822bcf80 T is_rgb_equal +ffffffff822bd000 T dccg3_create +ffffffff822bd0c0 T dccg30_create +ffffffff822be000 T dcn30_link_encoder_validate_output_with_stream +ffffffff822be010 T dcn30_link_encoder_construct +ffffffff822be210 T enc3_hw_init +ffffffff822bf000 T enc3_stream_encoder_update_hdmi_info_packets +ffffffff822bf150 t enc3_update_hdmi_info_packet +ffffffff822bf590 T enc3_stream_encoder_stop_hdmi_info_packets +ffffffff822bfbf0 T enc3_dp_set_dsc_pps_info_packet +ffffffff822bff70 T enc3_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff822c0040 T enc3_stream_encoder_update_dp_info_packets +ffffffff822c0350 T enc3_audio_mute_control +ffffffff822c03d0 T enc3_se_dp_audio_setup +ffffffff822c0460 T enc3_se_dp_audio_enable +ffffffff822c0580 T enc3_se_hdmi_audio_setup +ffffffff822c0910 T dcn30_dio_stream_encoder_construct +ffffffff822c0980 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff822c1010 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff822c1260 t enc3_read_state +ffffffff822c1420 t enc3_dp_set_dsc_config +ffffffff822c1500 t enc3_dp_set_odm_combine +ffffffff822c2000 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dwb3_set_new_content +ffffffff822ca8c0 T dcn30_dwbc_construct +ffffffff822ca910 T dwb3_set_host_read_rate_control +ffffffff822ca990 t dwb3_get_caps +ffffffff822cb000 T dwb3_ogam_set_input_transfer_func +ffffffff822cbaa0 T dwb3_set_gamut_remap +ffffffff822cbd90 T dwb3_program_hdr_mult +ffffffff822cc000 T hubbub3_init_dchub_sys_ctx +ffffffff822cc200 T hubbub3_program_watermarks +ffffffff822cc340 T hubbub3_dcc_support_swizzle +ffffffff822cc400 T hubbub3_get_dcc_compression_cap +ffffffff822cc600 T hubbub3_force_wm_propagate_to_pipes +ffffffff822cc6c0 T hubbub3_force_pstate_change_control +ffffffff822cc740 T hubbub3_init_watermarks +ffffffff822ccb70 T hubbub3_construct +ffffffff822cd000 T hubp3_set_vm_system_aperture_settings +ffffffff822cd150 T hubp3_program_surface_flip_and_addr +ffffffff822cdc40 T hubp3_dcc_control +ffffffff822cdd10 T hubp3_dcc_control_sienna_cichlid +ffffffff822cde30 T hubp3_dmdata_set_attributes +ffffffff822ce070 T hubp3_program_surface_config +ffffffff822ce3b0 T hubp3_read_state +ffffffff822ce6b0 T hubp3_setup +ffffffff822ce760 T hubp3_init +ffffffff822ce790 T hubp3_construct +ffffffff822cf000 T dcn30_set_blend_lut +ffffffff822cf070 T dcn30_set_input_transfer_func +ffffffff822cf1f0 T dcn30_set_output_transfer_func +ffffffff822cf5a0 T dcn30_update_writeback +ffffffff822cf640 t dcn30_set_writeback +ffffffff822cf820 T dcn30_mmhubbub_warmup +ffffffff822cfa90 T dcn30_enable_writeback +ffffffff822cfb50 T dcn30_disable_writeback +ffffffff822cfc50 T dcn30_program_all_writeback_pipes_in_tree +ffffffff822cff90 T dcn30_init_hw +ffffffff822d07e0 T dcn30_set_avmute +ffffffff822d0920 T dcn30_update_info_frame +ffffffff822d0a20 T dcn30_program_dmdata_engine +ffffffff822d0ac0 T dcn30_apply_idle_power_optimizations +ffffffff822d1000 T dcn30_does_plane_fit_in_mall +ffffffff822d10b0 T dcn30_hardware_release +ffffffff822d11b0 T dcn30_set_disp_pattern_generator +ffffffff822d1230 T dcn30_prepare_bandwidth +ffffffff822d1330 T dcn30_set_static_screen_control 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dcn31_reset_hw_ctx_wrap +ffffffff82305a40 T dcn31_setup_hpo_hw_control +ffffffff82306000 T dcn31_hw_sequencer_construct +ffffffff82307000 T optc31_immediate_disable_crtc +ffffffff82307120 T optc31_set_drr +ffffffff82307360 T optc3_init_odm +ffffffff823074e0 T dcn31_timing_generator_init +ffffffff82307550 t optc31_enable_crtc +ffffffff82307680 t optc31_disable_crtc +ffffffff82307780 t optc31_set_odm_combine +ffffffff82308000 T dcn31_panel_cntl_construct +ffffffff82308040 t dcn31_panel_cntl_destroy +ffffffff82308090 t dcn31_panel_cntl_hw_init +ffffffff82308190 t dcn31_is_panel_backlight_on +ffffffff82308240 t dcn31_is_panel_powered_on +ffffffff82308300 t dcn31_store_backlight_level +ffffffff823083d0 t dcn31_get_16_bit_backlight_from_pwm +ffffffff82309000 T dcn31x_populate_dml_pipes_from_context +ffffffff82309190 T dcn31_populate_dml_pipes_from_context +ffffffff82309610 T dcn31_calculate_wm_and_dlg +ffffffff82309690 T dcn31_populate_dml_writeback_from_context +ffffffff82309700 T dcn31_set_mcif_arb_params +ffffffff82309770 T dcn31_validate_bandwidth +ffffffff82309bd0 T dcn31_create_resource_pool +ffffffff8230b220 t dcn31_resource_destruct +ffffffff8230b9a0 t dcn31_destroy_resource_pool +ffffffff8230ba10 t dcn31_panel_cntl_create +ffffffff8230ba80 t dcn31_link_encoder_create +ffffffff8230bb40 t dcn31_link_enc_create_minimal +ffffffff8230bc00 t dcn31_get_panel_config_defaults +ffffffff8230bc40 t read_dce_straps +ffffffff8230bc70 t dcn31_create_audio +ffffffff8230bca0 t dcn31_stream_encoder_create +ffffffff8230be60 t dcn31_hpo_dp_stream_encoder_create +ffffffff8230c070 t dcn31_hpo_dp_link_encoder_create +ffffffff8230c110 t dcn31_hwseq_create +ffffffff8230d000 T vpg31_powerdown +ffffffff8230d090 T vpg31_poweron +ffffffff8230d130 T vpg31_construct +ffffffff8230e000 T dccg314_create +ffffffff8230e0c0 t dccg314_init +ffffffff8230e2b0 t dccg314_set_dpstreamclk +ffffffff8230e6a0 t dccg314_set_dtbclk_dto +ffffffff8230e8d0 t dccg314_set_pixel_rate_div +ffffffff8230ec50 t dccg314_set_valid_pixel_rate +ffffffff8230ecc0 t dccg314_trigger_dio_fifo_resync +ffffffff8230ed70 t dccg314_dpp_root_clock_control +ffffffff8230f000 T dcn314_dio_stream_encoder_construct +ffffffff8230f070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff8230f700 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff8230f950 t enc314_stream_encoder_dp_blank +ffffffff8230f9e0 t enc314_stream_encoder_dp_unblank +ffffffff8230fdf0 t enc314_read_state +ffffffff8230ff80 t enc314_dp_set_dsc_config +ffffffff8230ffd0 t enc314_dp_set_odm_combine +ffffffff82310010 t enc314_set_dig_input_mode +ffffffff82310060 t enc314_enable_fifo +ffffffff82310120 t enc314_disable_fifo +ffffffff82310170 t enc314_reset_fifo +ffffffff82311000 T dcn314_update_odm +ffffffff823116a0 T dcn314_dsc_pg_control +ffffffff82311ac0 T dcn314_enable_power_gating_plane +ffffffff82311da0 T dcn314_calculate_dccg_k1_k2_values +ffffffff82311f60 T dcn314_set_pixels_per_cycle +ffffffff82312050 T dcn314_resync_fifo_dccg_dio +ffffffff82312210 T dcn314_dpp_root_clock_control +ffffffff82312270 T dcn314_disable_link_output +ffffffff82313000 T dcn314_hw_sequencer_construct +ffffffff82314000 T dcn314_timing_generator_init +ffffffff82314070 t optc314_enable_crtc +ffffffff823141a0 t optc314_disable_crtc +ffffffff82314290 t optc314_phantom_crtc_post_enable +ffffffff82314360 t optc314_set_odm_bypass +ffffffff823144f0 t optc314_set_odm_combine +ffffffff82314810 t optc314_set_h_timing_div_manual_mode +ffffffff82315000 T dcn314_validate_bandwidth +ffffffff82315520 T dcn314_create_resource_pool +ffffffff82316b30 t dcn314_resource_destruct +ffffffff823172b0 t dcn314_get_preferred_eng_id_dpia +ffffffff823172e0 t dcn314_destroy_resource_pool +ffffffff82317350 t dcn31_panel_cntl_create +ffffffff823173c0 t dcn31_link_encoder_create +ffffffff82317480 t dcn31_link_enc_create_minimal +ffffffff82317540 t dcn314_populate_dml_pipes_from_context +ffffffff823175f0 t dcn314_update_bw_bounding_box +ffffffff82317650 t dcn314_get_panel_config_defaults +ffffffff82317690 t read_dce_straps +ffffffff823176c0 t dcn31_create_audio +ffffffff823176f0 t dcn314_stream_encoder_create +ffffffff823178b0 t dcn31_hpo_dp_stream_encoder_create +ffffffff82317ac0 t dcn31_hpo_dp_link_encoder_create +ffffffff82317b60 t dcn314_hwseq_create +ffffffff82318000 T dcn315_create_resource_pool +ffffffff82319540 t dcn315_resource_destruct +ffffffff82319ca0 t dcn315_destroy_resource_pool +ffffffff82319d10 t dcn31_panel_cntl_create +ffffffff82319d80 t dcn31_link_encoder_create +ffffffff82319e40 t dcn31_link_enc_create_minimal +ffffffff82319f00 t dcn315_populate_dml_pipes_from_context +ffffffff8231a670 t dcn315_get_panel_config_defaults +ffffffff8231a6b0 t read_dce_straps +ffffffff8231a6e0 t dcn31_create_audio +ffffffff8231a710 t dcn315_stream_encoder_create +ffffffff8231a8d0 t dcn31_hpo_dp_stream_encoder_create +ffffffff8231aae0 t dcn31_hpo_dp_link_encoder_create +ffffffff8231ab80 t dcn31_hwseq_create +ffffffff8231b000 T dcn316_create_resource_pool +ffffffff8231c550 t dcn316_resource_destruct +ffffffff8231ccb0 t dcn316_destroy_resource_pool +ffffffff8231cd20 t dcn31_panel_cntl_create +ffffffff8231cd90 t dcn31_link_encoder_create +ffffffff8231ce50 t dcn31_link_enc_create_minimal +ffffffff8231cf10 t dcn316_populate_dml_pipes_from_context +ffffffff8231d290 t dcn316_get_panel_config_defaults +ffffffff8231d2d0 t read_dce_straps +ffffffff8231d300 t dcn31_create_audio +ffffffff8231d330 t dcn316_stream_encoder_create +ffffffff8231d4f0 t dcn31_hpo_dp_stream_encoder_create +ffffffff8231d700 t dcn31_hpo_dp_link_encoder_create +ffffffff8231d7a0 t dcn31_hwseq_create +ffffffff8231e000 T dccg32_create +ffffffff8231e0c0 t dccg32_get_dccg_ref_freq +ffffffff8231e0f0 t dccg32_otg_add_pixel +ffffffff8231e130 t dccg32_otg_drop_pixel +ffffffff8231e170 t dccg32_set_dpstreamclk +ffffffff8231e4c0 t dccg32_set_dtbclk_dto +ffffffff8231e700 t dccg32_set_pixel_rate_div +ffffffff8231ea80 t dccg32_set_valid_pixel_rate +ffffffff8231eb00 t dccg32_trigger_dio_fifo_resync +ffffffff8231f000 T enc32_hw_init +ffffffff8231f0b0 T dcn32_link_encoder_enable_dp_output +ffffffff8231f100 T dcn32_link_encoder_construct +ffffffff8231f300 t dcn32_link_encoder_is_in_alt_mode +ffffffff8231f380 t dcn32_link_encoder_get_max_link_cap +ffffffff82320000 T enc32_stream_encoder_dp_unblank +ffffffff823205b0 T enc32_enable_fifo +ffffffff82320670 t enc32_reset_fifo +ffffffff82320790 T dcn32_dio_stream_encoder_construct +ffffffff82320800 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff82320df0 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff82320f90 t enc32_read_state +ffffffff82321120 t enc32_dp_set_dsc_config +ffffffff82321170 t enc32_dp_set_odm_combine +ffffffff823211b0 t enc32_set_dig_input_mode +ffffffff82322000 T dpp32_construct +ffffffff82322060 t dscl32_calc_lb_num_partitions +ffffffff82323000 T hpo_dp_link_encoder32_construct +ffffffff82323060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff82324000 T hubbub32_set_request_limit +ffffffff82324140 T dcn32_program_det_size +ffffffff82324310 T hubbub32_program_urgent_watermarks +ffffffff82324b10 T hubbub32_program_stutter_watermarks +ffffffff82324fa0 T hubbub32_program_pstate_watermarks +ffffffff82325470 T hubbub32_program_usr_watermarks +ffffffff823256f0 T hubbub32_force_usr_retraining_allow +ffffffff82325780 T hubbub32_force_wm_propagate_to_pipes +ffffffff82325830 T hubbub32_init +ffffffff82325990 T hubbub32_construct +ffffffff82325a10 t hubbub32_wm_read_state +ffffffff82325f10 t hubbub32_program_watermarks +ffffffff82326060 t hubbub32_init_watermarks +ffffffff823265e0 t dcn32_program_compbuf_size +ffffffff823268b0 t dcn32_init_crb +ffffffff82327000 T hubp32_update_force_pstate_disallow +ffffffff82327090 T hubp32_update_force_cursor_pstate_disallow +ffffffff82327120 T hubp32_update_mall_sel +ffffffff823271c0 T hubp32_prepare_subvp_buffering +ffffffff82327260 T hubp32_phantom_hubp_post_enable +ffffffff82327390 T hubp32_cursor_set_attributes +ffffffff82327690 T hubp32_init +ffffffff823276c0 T hubp32_construct +ffffffff82328000 T dcn32_dsc_pg_control +ffffffff82328370 T dcn32_enable_power_gating_plane +ffffffff82328630 T dcn32_hubp_pg_control +ffffffff823288e0 T dcn32_apply_idle_power_optimizations +ffffffff82328bf0 T dcn32_commit_subvp_config +ffffffff82328ca0 T dcn32_subvp_pipe_control_lock +ffffffff82328e80 T dcn32_subvp_pipe_control_lock_fast +ffffffff82328f00 T dcn32_set_mpc_shaper_3dlut +ffffffff82329030 T dcn32_set_mcm_luts +ffffffff823291f0 T dcn32_set_input_transfer_func +ffffffff82329350 T dcn32_set_output_transfer_func +ffffffff823295d0 T dcn32_update_force_pstate +ffffffff82329820 T dcn32_update_mall_sel +ffffffff82329a30 T dcn32_program_mall_pipe_config +ffffffff82329b20 T dcn32_init_hw +ffffffff8232a520 T dcn32_update_odm +ffffffff8232abc0 T dcn32_calculate_dccg_k1_k2_values +ffffffff8232ae20 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff8232aed0 T dcn32_set_pixels_per_cycle +ffffffff8232b030 T dcn32_resync_fifo_dccg_dio +ffffffff8232b200 T dcn32_unblank_stream +ffffffff8232b450 T dcn32_disable_link_output +ffffffff8232b840 T dcn32_update_phantom_vp_position +ffffffff8232b950 T dcn32_apply_update_flags_for_phantom +ffffffff8232b9e0 T dcn32_dsc_pg_status +ffffffff8232bac0 T dcn32_update_dsc_pg +ffffffff8232bbd0 T dcn32_enable_phantom_streams +ffffffff8232bd30 T dcn32_init_blank +ffffffff8232bfc0 T dcn32_blank_phantom +ffffffff8232c170 T dcn32_is_pipe_topology_transition_seamless +ffffffff8232d000 T dcn32_hw_sequencer_init_functions +ffffffff8232e000 T dcn32_mmhubbub_construct +ffffffff8232e050 t mmhubbub32_warmup_mcif +ffffffff8232e2a0 t mmhubbub32_config_mcif_buf +ffffffff8232e800 t mmhubbub32_config_mcif_arb +ffffffff8232f000 T mpc32_mpc_init +ffffffff8232f210 T mpc32_power_on_blnd_lut +ffffffff8232f3b0 T mpc32_configure_post1dlut +ffffffff8232f4c0 T mpc32_program_post1dluta_settings +ffffffff8232f6e0 T mpc32_program_post1dlutb_settings +ffffffff8232f900 T mpc32_program_post1dlut_pwl +ffffffff8232fd90 T mpc32_program_post1dlut +ffffffff82330100 T mpc32_configure_shaper_lut +ffffffff82330230 T mpc32_program_shaper_luta_settings +ffffffff82331190 T mpc32_program_shaper_lutb_settings +ffffffff823320f0 T mpc32_program_shaper_lut +ffffffff823322b0 T mpc32_power_on_shaper_3dlut +ffffffff82332510 T mpc32_program_shaper +ffffffff823328a0 T mpc32_select_3dlut_ram +ffffffff82332950 T mpc32_select_3dlut_ram_mask +ffffffff82332a30 T mpc32_set3dlut_ram12 +ffffffff82332c40 T mpc32_set3dlut_ram10 +ffffffff82332d20 T mpc32_program_3dlut +ffffffff823337e0 T dcn32_mpc_construct +ffffffff82334000 T optc32_set_h_timing_div_manual_mode +ffffffff82334040 T dcn32_timing_generator_init +ffffffff823340b0 t optc32_enable_crtc +ffffffff823341e0 t optc32_disable_crtc +ffffffff823343c0 t optc32_phantom_crtc_post_enable +ffffffff82334490 t optc32_disable_phantom_otg +ffffffff82334590 t optc32_set_drr +ffffffff82334770 t optc32_set_odm_bypass +ffffffff82334900 t optc32_set_odm_combine +ffffffff82335000 T dcn32_panel_cntl_create +ffffffff82335070 T dcn32_acquire_post_bldn_3dlut +ffffffff82335170 T dcn32_release_post_bldn_3dlut +ffffffff82335220 T dcn32_retain_phantom_pipes +ffffffff82335330 T dcn32_remove_phantom_pipes +ffffffff823354d0 T dcn32_add_phantom_pipes +ffffffff82335950 T dcn32_validate_bandwidth +ffffffff82335ec0 T dcn32_populate_dml_pipes_from_context +ffffffff82336350 T dcn32_calculate_wm_and_dlg +ffffffff823363d0 T dcn32_create_resource_pool +ffffffff823364a0 t dcn32_resource_construct +ffffffff82341ca0 T dcn32_acquire_free_pipe_as_secondary_dpp_pipe +ffffffff82341fc0 T dcn32_calc_num_avail_chans_for_mall +ffffffff82342030 t dcn32_mpc_create +ffffffff82346690 t dcn32_dwbc_create +ffffffff823470c0 t dcn32_mmhubbub_create +ffffffff823475a0 t dcn32_resource_destruct +ffffffff82347d30 t dcn32_destroy_resource_pool +ffffffff82347da0 t dcn32_link_encoder_create +ffffffff82348e80 t dcn32_update_bw_bounding_box +ffffffff82348ee0 t read_dce_straps +ffffffff82348f10 t dcn32_create_audio +ffffffff82349290 t dcn32_stream_encoder_create +ffffffff8234b110 t dcn32_hpo_dp_stream_encoder_create +ffffffff8234bf40 t dcn32_hpo_dp_link_encoder_create +ffffffff8234c3b0 t dcn32_hwseq_create +ffffffff8234c8a0 t dcn32_vpg_create +ffffffff8234d000 T dcn32_helper_mall_bytes_to_ways +ffffffff8234d060 T dcn32_helper_calculate_mall_bytes_for_cursor +ffffffff8234d100 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff8234d180 T dcn32_merge_pipes_for_subvp +ffffffff8234d350 T dcn32_all_pipes_have_stream_and_plane +ffffffff8234d3e0 T dcn32_subvp_in_use +ffffffff8234d470 T dcn32_mpo_in_use +ffffffff8234d4e0 T dcn32_any_surfaces_rotated +ffffffff8234d570 T dcn32_is_center_timing +ffffffff8234d5f0 T dcn32_is_psr_capable +ffffffff8234d640 T dcn32_determine_det_override +ffffffff8234d980 T dcn32_set_det_allocations +ffffffff8234db10 T dcn32_save_mall_state +ffffffff8234dbc0 T dcn32_restore_mall_state +ffffffff8234dc70 T dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8234de60 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8234df10 T dcn32_check_native_scaling_for_res +ffffffff8234df80 T dcn32_subvp_drr_admissable +ffffffff8234e150 T dcn32_subvp_vblank_admissable +ffffffff8234f000 T dcn321_link_encoder_construct +ffffffff82350000 T dcn321_create_resource_pool +ffffffff823500d0 t dcn321_resource_construct +ffffffff8235b840 t dcn321_mpc_create +ffffffff8235fea0 t dcn321_dwbc_create +ffffffff823608d0 t dcn321_mmhubbub_create +ffffffff82360db0 t dcn321_resource_destruct +ffffffff82361540 t dcn321_destroy_resource_pool +ffffffff823615b0 t dcn321_link_encoder_create +ffffffff82362690 t dcn321_update_bw_bounding_box +ffffffff823626f0 t read_dce_straps +ffffffff82362720 t dcn321_create_audio +ffffffff82362aa0 t dcn321_stream_encoder_create +ffffffff82364920 t dcn321_hpo_dp_stream_encoder_create +ffffffff82365750 t dcn321_hpo_dp_link_encoder_create +ffffffff82365bc0 t dcn321_hwseq_create +ffffffff823660b0 t dcn321_vpg_create +ffffffff82367000 T bw_int_to_fixed_nonconst +ffffffff823670a0 T bw_frc_to_fixed +ffffffff82367290 T bw_floor2 +ffffffff82367350 T bw_ceil2 +ffffffff823673d0 T bw_mul +ffffffff82368000 T convert_to_custom_float_format +ffffffff82369000 T bw_calcs_init +ffffffff82369f30 T bw_calcs +ffffffff8236be40 t calculate_bandwidth +ffffffff82375000 T scaler_settings_calculation +ffffffff82375370 T mode_support_and_system_configuration +ffffffff8237b680 T display_pipe_configuration +ffffffff8237c000 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff82381000 T dcn_bw_mod +ffffffff82381060 T dcn_bw_min2 +ffffffff823810a0 T dcn_bw_max +ffffffff823810d0 T dcn_bw_max2 +ffffffff82381110 T dcn_bw_floor2 +ffffffff823811c0 T dcn_bw_floor +ffffffff823811f0 T dcn_bw_ceil +ffffffff82381230 T dcn_bw_ceil2 +ffffffff823812e0 T dcn_bw_max3 +ffffffff82381360 T dcn_bw_max5 +ffffffff823814a0 T dcn_bw_pow +ffffffff82381540 T dcn_bw_fabs +ffffffff82381580 T dcn_bw_log +ffffffff82382000 T swizzle_mode_to_macro_tile_size +ffffffff823820a0 T dcn_validate_bandwidth +ffffffff82384450 T dcn_bw_sync_calcs_and_dml +ffffffff823846a0 t dcn_bw_calc_rq_dlg_ttu +ffffffff82384ed0 T dcn_find_dcfclk_suits_all +ffffffff82385390 T dcn_bw_update_from_pplib_fclks +ffffffff82385510 T dcn_bw_update_from_pplib_dcfclks +ffffffff823855e0 T dcn_get_soc_clks +ffffffff82385660 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff82386000 T dcn10_resource_construct_fp +ffffffff82387000 T dcn20_populate_dml_writeback_from_context +ffffffff82387190 T dcn20_fpu_set_wb_arb_params +ffffffff82387390 T dcn20_calculate_dlg_params +ffffffff82387c20 T dcn20_populate_dml_pipes_from_context +ffffffff82388bc0 T dcn20_calculate_wm +ffffffff823894c0 T dcn20_update_bounding_box +ffffffff82389750 T dcn20_cap_soc_clocks +ffffffff82389ac0 T dcn20_patch_bounding_box +ffffffff82389cb0 T dcn20_validate_bandwidth_fp +ffffffff82389e80 t dcn20_validate_bandwidth_internal +ffffffff8238a300 T dcn20_fpu_set_wm_ranges +ffffffff8238a3b0 T dcn20_fpu_adjust_dppclk +ffffffff8238a450 T dcn21_populate_dml_pipes_from_context +ffffffff8238a570 T dcn21_validate_bandwidth_fp +ffffffff8238b0b0 T dcn21_update_bw_bounding_box +ffffffff8238b4e0 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff8238b550 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff8238b860 t calculate_wm_set_for_vlevel +ffffffff8238c000 T dml20_recalculate +ffffffff8238c7b0 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82392050 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff82399900 t TruncToValidBPP +ffffffff82399af0 t CalculateVMAndRowBytes +ffffffff8239a210 t CalculatePrefetchSourceLines +ffffffff8239a400 t CalculateWriteBackDelay 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+ffffffff823b16b0 T dml20v2_rq_dlg_get_dlg_reg +ffffffff823b3990 t get_surf_rq_param +ffffffff823b4250 t calculate_ttu_cursor +ffffffff823b5000 T dml21_recalculate +ffffffff823b5770 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff823bb290 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff823c1b30 t TruncToValidBPP +ffffffff823c20d0 t CalculateDCFCLKDeepSleep +ffffffff823c2440 t CalculateVMAndRowBytes +ffffffff823c2cf0 t CalculatePrefetchSourceLines +ffffffff823c2ee0 t CalculateWriteBackDelay +ffffffff823c3220 t CalculatePrefetchSchedulePerPlane +ffffffff823c3a80 t CalculateUrgentBurstFactor +ffffffff823c3ec0 t CalculateFlipSchedule +ffffffff823c4400 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff823c5440 t CalculatePrefetchSchedule +ffffffff823c7000 T dml21_rq_dlg_get_rq_reg +ffffffff823c74e0 t dml_rq_dlg_get_rq_params +ffffffff823c76b0 T dml21_rq_dlg_get_dlg_reg +ffffffff823c9e10 t get_surf_rq_param +ffffffff823ca770 t calculate_ttu_cursor +ffffffff823cb000 T optc3_fpu_set_vrr_m_const +ffffffff823cb540 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff823cb860 T dcn30_fpu_set_mcif_arb_params +ffffffff823cba20 T dcn30_fpu_update_soc_for_wm_a +ffffffff823cbaf0 T dcn30_fpu_calculate_wm_and_dlg +ffffffff823cc690 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff823cc8b0 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff823cc920 T dcn30_fpu_update_max_clk +ffffffff823cc9d0 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff823ccae0 T dcn30_fpu_update_bw_bounding_box +ffffffff823cccd0 T dcn3_fpu_build_wm_range_table +ffffffff823ccfb0 T patch_dcn30_soc_bounding_box +ffffffff823ce000 T dml30_recalculate +ffffffff823ce610 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff823d5470 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff823d56e0 T dml30_CalculateWriteBackDISPCLK +ffffffff823d5870 t dml_max3 +ffffffff823d58e0 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff823dd7a0 t CalculateSwathAndDETConfiguration +ffffffff823ddec0 t TruncToValidBPP +ffffffff823de130 t CalculateVMAndRowBytes +ffffffff823de800 t CalculatePrefetchSourceLines +ffffffff823de9f0 t CalculateUrgentBurstFactor +ffffffff823deca0 t CalculateDCFCLKDeepSleep +ffffffff823deff0 t UseMinimumDCFCLK +ffffffff823e0390 t CalculatePrefetchSchedule +ffffffff823e1940 t CalculateFlipSchedule +ffffffff823e1e90 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff823e2c40 t CalculateSwathWidth +ffffffff823e4000 T dml30_rq_dlg_get_rq_reg +ffffffff823e44f0 t dml_rq_dlg_get_rq_params +ffffffff823e4790 T dml30_rq_dlg_get_dlg_reg +ffffffff823e72f0 t get_surf_rq_param +ffffffff823e7cb0 t calculate_ttu_cursor +ffffffff823e8000 T dcn301_update_bw_bounding_box +ffffffff823e8300 T dcn301_fpu_set_wm_ranges +ffffffff823e83b0 T dcn301_fpu_init_soc_bounding_box +ffffffff823e8460 T dcn301_calculate_wm_and_dlg_fp +ffffffff823e87d0 t calculate_wm_set_for_vlevel +ffffffff823e9000 T dcn302_fpu_update_bw_bounding_box +ffffffff823e99e0 T dcn302_fpu_init_soc_bounding_box +ffffffff823ea000 T dcn303_fpu_update_bw_bounding_box +ffffffff823eaa40 T dcn303_fpu_init_soc_bounding_box +ffffffff823eb000 T dcn31_zero_pipe_dcc_fraction +ffffffff823eb070 T dcn31_update_soc_for_wm_a +ffffffff823eb130 T dcn315_update_soc_for_wm_a +ffffffff823eb210 T dcn31_calculate_wm_and_dlg_fp +ffffffff823eb900 T dcn31_update_bw_bounding_box +ffffffff823ebcc0 T dcn315_update_bw_bounding_box +ffffffff823ebfc0 T dcn316_update_bw_bounding_box +ffffffff823ec3a0 T dcn_get_max_non_odm_pix_rate_100hz +ffffffff823ec400 T dcn_get_approx_det_segs_required_for_pstate +ffffffff823ed000 T dml31_recalculate +ffffffff823ed300 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff823f4640 T dml31_CalculateWriteBackDISPCLK +ffffffff823f47d0 t dml_max3 +ffffffff823f4840 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff823fcd20 t CalculateSwathAndDETConfiguration +ffffffff823fd3c0 t TruncToValidBPP +ffffffff823fd620 t CalculateDCFCLKDeepSleep +ffffffff823fd970 t CalculateVMAndRowBytes +ffffffff823fe010 t CalculatePrefetchSourceLines +ffffffff823fe200 t CalculateUrgentBurstFactor +ffffffff823fe4b0 t UseMinimumDCFCLK +ffffffff823ff4d0 t CalculatePrefetchSchedulePerPlane +ffffffff823ffc50 t CalculateFlipSchedule +ffffffff82400240 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82400ec0 t CalculateSwathWidth +ffffffff82401430 t CalculatePrefetchSchedule +ffffffff82402950 t CalculateVupdateAndDynamicMetadataParameters +ffffffff82403000 T dml31_rq_dlg_get_rq_reg +ffffffff824034f0 t dml_rq_dlg_get_rq_params +ffffffff82403790 T dml31_rq_dlg_get_dlg_reg +ffffffff82406680 t get_surf_rq_param +ffffffff82408000 T dcn314_update_bw_bounding_box_fpu +ffffffff82408410 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff82409000 T dml314_recalculate +ffffffff824092a0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff824104c0 T dml314_CalculateWriteBackDISPCLK +ffffffff82410650 t dml_max3 +ffffffff824106c0 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff82418df0 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff82419060 t CalculateSwathAndDETConfiguration +ffffffff824196d0 t TruncToValidBPP +ffffffff82419930 t CalculateDCFCLKDeepSleep +ffffffff82419c80 t CalculateVMAndRowBytes +ffffffff8241a320 t CalculatePrefetchSourceLines +ffffffff8241a510 t CalculateUrgentBurstFactor +ffffffff8241a7c0 t CalculateMaxVStartup +ffffffff8241a930 t UseMinimumDCFCLK +ffffffff8241b950 t CalculatePrefetchSchedulePerPlane +ffffffff8241c0d0 t CalculateFlipSchedule +ffffffff8241c6c0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8241d340 t CalculateSwathWidth +ffffffff8241d8b0 t CalculatePrefetchSchedule +ffffffff8241edd0 t CalculateVupdateAndDynamicMetadataParameters +ffffffff82420000 T dml314_rq_dlg_get_rq_reg +ffffffff824204f0 t dml_rq_dlg_get_rq_params +ffffffff82420790 T dml314_rq_dlg_get_dlg_reg +ffffffff82423670 t get_surf_rq_param +ffffffff82425000 T dcn32_build_wm_range_table_fpu +ffffffff824253a0 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff82425570 T dcn32_internal_validate_bw +ffffffff82427610 T dcn32_helper_populate_phantom_dlg_params +ffffffff824277d0 T dcn32_predict_pipe_split +ffffffff82427a20 T dcn32_set_phantom_stream_timing +ffffffff82427d50 T dcn32_determine_max_vratio_prefetch +ffffffff82427e30 t dcn32_split_stream_for_mpc_or_odm +ffffffff82428220 T dcn32_calculate_wm_and_dlg_fpu +ffffffff82429b40 T dcn32_patch_dpm_table +ffffffff82429d50 T dcn32_update_bw_bounding_box_fpu +ffffffff8242c4a0 T dcn32_zero_pipe_dcc_fraction +ffffffff8242c510 T dcn32_allow_subvp_with_active_margin +ffffffff8242c5e0 T dcn32_allow_subvp_high_refresh_rate +ffffffff8242c800 T dcn32_assign_fpo_vactive_candidate +ffffffff8242c8c0 T dcn32_find_vactive_pipe +ffffffff8242ca30 T dcn32_set_clock_limits +ffffffff8242ca80 T dcn32_override_min_req_memclk +ffffffff8242cb50 t subvp_drr_schedulable +ffffffff8242ce20 t get_optimal_ntuple +ffffffff8242e000 T dml32_recalculate +ffffffff82432510 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff8243b000 T dml32_dscceComputeDelay +ffffffff8243b150 T dml32_dscComputeDelay +ffffffff8243b190 T IsVertical +ffffffff8243b1c0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff8243b540 t dml_max3 +ffffffff8243b5b0 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff8243b8e0 T dml32_CalculateSwathAndDETConfiguration +ffffffff8243c140 T dml32_CalculateSwathWidth +ffffffff8243cab0 T dml32_UnboundedRequest +ffffffff8243cb20 T dml32_CalculateDETBufferSize +ffffffff8243d1a0 T dml32_CalculateODMMode +ffffffff8243d970 T dml32_CalculateRequiredDispclk +ffffffff8243db40 T dml32_RoundToDFSGranularity +ffffffff8243dbd0 T dml32_CalculateOutputLink +ffffffff8243e6d0 T dml32_TruncToValidBPP +ffffffff8243ea10 T dml32_CalculateDPPCLK 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+ffffffff82444560 T dml32_CalculatePrefetchSchedule +ffffffff82445d30 T dml32_CalculateFlipSchedule +ffffffff82446300 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff824474c0 T dml32_CalculateWriteBackDISPCLK +ffffffff824476b0 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff82447700 T dml32_CalculatePixelDeliveryTimes +ffffffff82447b90 T dml32_CalculateMetaAndPTETimes +ffffffff82448300 T dml32_CalculateVMGroupAndRequestTimes +ffffffff82448870 T dml32_CalculateDCCConfiguration +ffffffff82448ed0 T dml32_CalculateStutterEfficiency +ffffffff82449e90 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff82449f90 T dml32_CalculateVActiveBandwithSupport +ffffffff8244a100 T dml32_CalculatePrefetchBandwithSupport +ffffffff8244a430 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff8244a590 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff8244a820 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff8244b000 T dml32_rq_dlg_get_rq_reg +ffffffff8244b750 T dml32_rq_dlg_get_dlg_reg +ffffffff8244e000 T dcn321_update_bw_bounding_box_fpu +ffffffff82450860 t get_optimal_ntuple +ffffffff82451000 T dml_init_instance +ffffffff82451320 T dml_get_status_message +ffffffff82451360 T dml_log_pipe_params +ffffffff82451390 T dml_log_mode_support_params +ffffffff82452000 T dml_get_voltage_level +ffffffff824522c0 t fetch_socbb_params +ffffffff824527b0 t fetch_ip_params +ffffffff82452c50 t fetch_pipe_params +ffffffff82453ce0 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff82453d60 T get_clk_dcf_deepsleep +ffffffff82453eb0 T get_wm_urgent +ffffffff82454000 T get_wm_memory_trip +ffffffff82454150 T get_wm_writeback_urgent +ffffffff824542a0 T get_wm_stutter_exit +ffffffff824543f0 T get_wm_stutter_enter_exit +ffffffff82454540 T get_wm_z8_stutter_exit +ffffffff82454690 T get_wm_z8_stutter_enter_exit +ffffffff824547e0 T get_stutter_efficiency_z8 +ffffffff82454930 T get_stutter_num_bursts_z8 +ffffffff82454a80 T get_wm_dram_clock_change +ffffffff82454bd0 T get_wm_writeback_dram_clock_change +ffffffff82454d20 T get_stutter_efficiency +ffffffff82454e70 T get_stutter_efficiency_no_vblank +ffffffff82454fc0 T get_stutter_period +ffffffff82455110 T get_urgent_latency +ffffffff82455260 T get_urgent_extra_latency +ffffffff824553b0 T get_nonurgent_latency +ffffffff82455500 T get_dram_clock_change_latency +ffffffff82455650 T get_dispclk_calculated +ffffffff824557a0 T get_total_data_read_bw +ffffffff824558f0 T get_return_bw +ffffffff82455a40 T get_tcalc +ffffffff82455b90 T get_fraction_of_urgent_bandwidth +ffffffff82455ce0 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff82455e30 T get_cstate_max_cap_mode +ffffffff82455f90 T get_comp_buffer_size_kbytes +ffffffff824560e0 T get_pixel_chunk_size_in_kbyte +ffffffff82456230 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff82456380 T get_meta_chunk_size_in_kbyte +ffffffff824564d0 T get_min_pixel_chunk_size_in_byte +ffffffff82456620 T get_min_meta_chunk_size_in_byte +ffffffff82456770 T get_fclk_watermark +ffffffff824568c0 T get_usr_retraining_watermark +ffffffff82456a10 T get_comp_buffer_reserved_space_kbytes +ffffffff82456b60 T get_comp_buffer_reserved_space_64bytes +ffffffff82456cb0 T get_comp_buffer_reserved_space_zs +ffffffff82456e00 T get_unbounded_request_enabled +ffffffff82456f60 T get_dsc_delay +ffffffff824570c0 T get_dppclk_calculated +ffffffff82457220 T get_dscclk_calculated +ffffffff82457380 T get_min_ttu_vblank +ffffffff824574e0 T get_min_ttu_vblank_in_us +ffffffff82457640 T get_vratio_prefetch_l +ffffffff824577a0 T get_vratio_prefetch_c +ffffffff82457900 T get_dst_x_after_scaler +ffffffff82457a60 T get_dst_y_after_scaler +ffffffff82457bc0 T get_dst_y_per_vm_vblank +ffffffff82457d20 T get_dst_y_per_row_vblank +ffffffff82457e80 T get_dst_y_prefetch +ffffffff82457fe0 T get_dst_y_per_vm_flip +ffffffff82458140 T get_dst_y_per_row_flip +ffffffff824582a0 T get_refcyc_per_vm_group_vblank +ffffffff82458400 T get_refcyc_per_vm_group_flip +ffffffff82458560 T get_refcyc_per_vm_req_vblank +ffffffff824586c0 T get_refcyc_per_vm_req_flip +ffffffff82458820 T get_refcyc_per_vm_group_vblank_in_us +ffffffff82458980 T get_refcyc_per_vm_group_flip_in_us +ffffffff82458ae0 T get_refcyc_per_vm_req_vblank_in_us +ffffffff82458c40 T get_refcyc_per_vm_req_flip_in_us +ffffffff82458da0 T get_refcyc_per_vm_dmdata_in_us +ffffffff82458f00 T get_dmdata_dl_delta_in_us +ffffffff82459060 T get_refcyc_per_line_delivery_l_in_us +ffffffff824591c0 T get_refcyc_per_line_delivery_c_in_us +ffffffff82459320 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff82459480 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff824595e0 T get_refcyc_per_req_delivery_l_in_us +ffffffff82459740 T get_refcyc_per_req_delivery_c_in_us +ffffffff824598a0 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff82459a00 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff82459b60 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff82459cc0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff82459e20 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff82459f80 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff8245a0e0 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff8245a240 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff8245a3a0 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff8245a500 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff8245a660 T get_vstartup +ffffffff8245a7c0 T get_vupdate_offset +ffffffff8245a920 T get_vupdate_width +ffffffff8245aa80 T get_vready_offset +ffffffff8245abe0 T get_vready_at_or_after_vsync +ffffffff8245ad50 T get_min_dst_y_next_start +ffffffff8245aeb0 T get_dst_y_per_pte_row_nom_l +ffffffff8245b010 T get_dst_y_per_pte_row_nom_c +ffffffff8245b170 T get_dst_y_per_meta_row_nom_l +ffffffff8245b2d0 T get_dst_y_per_meta_row_nom_c +ffffffff8245b430 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff8245b590 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff8245b6f0 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff8245b850 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff8245b9b0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff8245bb10 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff8245bc70 T get_vstartup_calculated +ffffffff8245bdd0 T get_dpte_row_height_linear_c +ffffffff8245bf30 T get_swath_height_l +ffffffff8245c090 T get_swath_height_c +ffffffff8245c1f0 T get_det_stored_buffer_size_l_bytes +ffffffff8245c350 T get_det_stored_buffer_size_c_bytes +ffffffff8245c4b0 T get_dpte_group_size_in_bytes +ffffffff8245c610 T get_vm_group_size_in_bytes +ffffffff8245c770 T get_dpte_row_height_linear_l +ffffffff8245c8d0 T get_pte_buffer_mode +ffffffff8245ca40 T get_subviewport_lines_needed_in_mall +ffffffff8245cba0 T get_surface_size_in_mall +ffffffff8245cd00 T get_total_immediate_flip_bytes +ffffffff8245ce50 T get_total_immediate_flip_bw +ffffffff8245d060 T get_total_prefetch_bw +ffffffff8245d270 T get_total_surface_size_in_mall_bytes +ffffffff8245d450 T get_det_buffer_size_kbytes +ffffffff8245d5b0 T get_is_phantom_pipe +ffffffff8245d710 T Calculate256BBlockSizes +ffffffff8245d800 T CalculateMinAndMaxPrefetchMode +ffffffff8245d880 T ModeSupportAndSystemConfiguration +ffffffff8245dbe0 T CalculateWriteBackDISPCLK +ffffffff8245f000 T print__rq_params_st +ffffffff8245f030 T print__data_rq_sizing_params_st +ffffffff8245f060 T print__data_rq_dlg_params_st +ffffffff8245f090 T print__data_rq_misc_params_st +ffffffff8245f0c0 T print__rq_dlg_params_st +ffffffff8245f0f0 T print__dlg_sys_params_st +ffffffff8245f120 T print__data_rq_regs_st +ffffffff8245f150 T print__rq_regs_st +ffffffff8245f180 T print__dlg_regs_st +ffffffff8245f1b0 T print__ttu_regs_st +ffffffff82460000 T dml1_extract_rq_regs +ffffffff82460340 T dml1_rq_dlg_get_rq_params +ffffffff82460520 t get_surf_rq_param +ffffffff82461120 T dml1_rq_dlg_get_dlg_params +ffffffff82464000 T _do_calc_rc_params +ffffffff82464fd0 t get_qp_set +ffffffff82466000 T dc_bandwidth_in_kbps_from_timing +ffffffff824662e0 T dc_dsc_stream_bandwidth_in_kbps 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dal_hw_translate_dce110_init +ffffffff8246b030 t offset_to_id +ffffffff8246b3a0 t id_to_offset +ffffffff8246c000 T dal_hw_factory_dce120_init +ffffffff8246c060 t define_hpd_registers +ffffffff8246c0b0 t define_ddc_registers +ffffffff8246d000 T dal_hw_translate_dce120_init +ffffffff8246d030 t offset_to_id +ffffffff8246d3b0 t id_to_offset +ffffffff8246e000 T dal_hw_factory_dce80_init +ffffffff8246e060 t define_hpd_registers +ffffffff8246e0b0 t define_ddc_registers +ffffffff8246f000 T dal_hw_translate_dce80_init +ffffffff8246f030 t offset_to_id +ffffffff8246f7d0 t id_to_offset +ffffffff82470000 T dal_hw_factory_dcn10_init +ffffffff82470060 t define_hpd_registers +ffffffff824700b0 t define_ddc_registers +ffffffff82470150 t define_generic_registers +ffffffff82471000 T dal_hw_translate_dcn10_init +ffffffff82471030 t offset_to_id +ffffffff824713a0 t id_to_offset +ffffffff82472000 T dal_hw_factory_dcn20_init +ffffffff82472060 t define_hpd_registers +ffffffff824720b0 t define_ddc_registers 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sdmmc_io_send_op_cond -ffffffff828205e0 T sdmmc_io_scan -ffffffff82820760 T sdmmc_io_init -ffffffff828208d0 T sdmmc_io_set_highspeed -ffffffff82820bd0 T sdmmc_io_set_bus_width -ffffffff82820ec0 T sdmmc_io_function_ready -ffffffff82821070 T sdmmc_io_read_1 -ffffffff828211f0 T sdmmc_io_function_enable -ffffffff82821690 T sdmmc_io_write_1 -ffffffff82821830 T sdmmc_io_function_disable -ffffffff82821b10 T sdmmc_io_attach -ffffffff82821c00 T sdmmc_print -ffffffff82821ec0 T sdmmc_submatch -ffffffff82821f50 T sdmmc_io_detach -ffffffff82822010 T sdmmc_io_rw_direct -ffffffff828221e0 T sdmmc_io_rw_extended_subr -ffffffff82822390 T sdmmc_io_rw_extended -ffffffff828227d0 T sdmmc_io_read_2 -ffffffff82822940 T sdmmc_io_write_2 -ffffffff82822ac0 T sdmmc_io_read_4 -ffffffff82822c30 T sdmmc_io_write_4 -ffffffff82822db0 T sdmmc_io_read_multi_1 -ffffffff82822eb0 T sdmmc_io_write_multi_1 -ffffffff82822fb0 T sdmmc_io_read_region_1 -ffffffff828230b0 T sdmmc_io_write_region_1 -ffffffff828231b0 T sdmmc_io_xchg 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sdmmc_mem_select_transfer_mode -ffffffff82826be0 T sdmmc_mem_execute_tuning -ffffffff82826c70 T sdmmc_mem_read_block_subr -ffffffff82827000 T sdmmc_mem_single_read_block -ffffffff828270d0 T sdmmc_mem_read_block -ffffffff828272e0 T sdmmc_mem_write_block_subr -ffffffff82827660 T sdmmc_mem_single_write_block -ffffffff82827730 T sdmmc_mem_write_block -ffffffff82827940 T sdmmc_mem_hibernate_write -ffffffff82828000 T sdmmc_scsi_cmd -ffffffff82828200 T sdmmc_minphys -ffffffff82828280 T sdmmc_scsi_attach -ffffffff828284c0 T sdmmc_alloc_ccbs -ffffffff82828620 T sdmmc_free_ccbs -ffffffff82828680 T sdmmc_scsi_detach -ffffffff82828840 T sdmmc_stimeout -ffffffff828288e0 T sdmmc_ccb_alloc -ffffffff828289a0 T sdmmc_ccb_free -ffffffff82828aa0 T sdmmc_inquiry -ffffffff82828d30 T sdmmc_start_xs -ffffffff82828e50 T sdmmc_complete_xs -ffffffff82828f40 T sdmmc_done_xs -ffffffff82828f90 T sdmmc_scsi_hibernate_io -ffffffff8282a000 T bwfm_sdio_preinit -ffffffff8282a5a0 T bwfm_sdio_txcheck -ffffffff8282a5e0 T bwfm_sdio_txdata -ffffffff8282a660 T bwfm_sdio_txctl -ffffffff8282a7f0 T bwfm_sdio_buscore_read -ffffffff8282a800 T bwfm_sdio_buscore_write -ffffffff8282a820 T bwfm_sdio_buscore_prepare -ffffffff8282a9a0 T bwfm_sdio_buscore_activate -ffffffff8282aa30 T bwfm_sdio_match -ffffffff8282aae0 T bwfm_sdio_attach -ffffffff8282ae80 T bwfm_sdio_detach -ffffffff8282af00 T bwfm_sdio_task -ffffffff8282b0c0 T bwfm_sdio_write_1 -ffffffff8282b0f0 T bwfm_sdio_read_1 -ffffffff8282b120 T bwfm_sdio_write_4 -ffffffff8282b1f0 T bwfm_sdio_read_4 -ffffffff8282b2b0 T bwfm_sdio_load_microcode -ffffffff8282b5a0 T bwfm_sdio_clkctl -ffffffff8282b6d0 T bwfm_sdio_dev_write -ffffffff8282b720 T bwfm_sdio_intr -ffffffff8282b770 T bwfm_sdio_ram_read_write -ffffffff8282b9f0 T bwfm_sdio_htclk -ffffffff8282bcb0 T bwfm_sdio_readshared -ffffffff8282bda0 T bwfm_sdio_dev_read -ffffffff8282bde0 T bwfm_sdio_rx_frames -ffffffff8282c210 T bwfm_sdio_tx_frames -ffffffff8282c330 T bwfm_sdio_backplane -ffffffff8282c400 T bwfm_sdio_buf_read -ffffffff8282c500 T bwfm_sdio_buf_write -ffffffff8282c5d0 T bwfm_sdio_frame_read_write -ffffffff8282c780 T bwfm_sdio_newbuf -ffffffff8282c810 T bwfm_sdio_tx_ok -ffffffff8282c870 T bwfm_sdio_tx_ctrlframe -ffffffff8282c980 T bwfm_sdio_tx_dataframe -ffffffff8282caf0 T bwfm_sdio_rx_glom -ffffffff8282d000 T onewire_match -ffffffff8282d060 T onewire_attach -ffffffff8282d120 T onewire_detach -ffffffff8282d190 T onewire_activate -ffffffff8282d1b0 T onewire_scan -ffffffff8282d400 T onewire_createthread -ffffffff8282d470 T onewire_print -ffffffff8282d560 T onewirebus_print -ffffffff8282d5b0 T onewire_lock -ffffffff8282d5d0 T onewire_unlock -ffffffff8282d5f0 T onewire_reset -ffffffff8282d610 T onewire_bit -ffffffff8282d630 T onewire_read_byte -ffffffff8282d7c0 T onewire_write_byte -ffffffff8282d8d0 T onewire_read_block -ffffffff8282d970 T onewire_write_block -ffffffff8282da10 T onewire_triplet -ffffffff8282db20 T onewire_matchrom -ffffffff8282dd10 T onewire_search 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-ffffffff828342b0 T intr_user_exit -ffffffff828342f2 t intr_user_exit_post_ast -ffffffff8283444b t Xiretq_trampback -ffffffff82834457 T doreti_iret -ffffffff82835000 T alltraps -ffffffff82835138 T recall_trap -ffffffff82835150 T alltraps_kern -ffffffff82835153 T alltraps_kern_meltdown -ffffffff82836000 ? Xtrap00 -ffffffff82836000 A __kutext_start -ffffffff82836000 A __text_page_end -ffffffff82836010 ? Xtrap01 -ffffffff82836020 ? Xtrap02 -ffffffff82836028 c calltrap_specstk -ffffffff828360f0 ? calltrap_specstk_tramp -ffffffff82836110 ? Xtrap03 -ffffffff82836120 ? Xtrap04 -ffffffff82836130 ? Xtrap05 -ffffffff82836140 ? Xtrap06 -ffffffff82836150 ? Xtrap07 -ffffffff82836160 ? Xtrap08 -ffffffff82836170 ? Xtrap09 -ffffffff82836180 ? Xtrap0a -ffffffff82836190 ? Xtrap0b -ffffffff828361a0 ? Xtrap0c -ffffffff828361b0 ? Xtrap0d -ffffffff82836240 ? Xtrap0e -ffffffff82836250 ? Xintrspurious -ffffffff82836250 ? Xtrap0f -ffffffff82836260 ? Xtrap10 -ffffffff82836270 ? Xtrap11 -ffffffff82836280 ? Xtrap12 -ffffffff82836290 ? Xtrap13 -ffffffff828362a0 ? Xtrap14 -ffffffff828362b0 ? Xtrap15 -ffffffff828362c0 ? Xtrap16 -ffffffff828362c0 ? Xtrap17 -ffffffff828362c0 ? Xtrap18 -ffffffff828362c0 ? Xtrap19 -ffffffff828362c0 ? Xtrap1a -ffffffff828362c0 ? Xtrap1b -ffffffff828362c0 ? Xtrap1c -ffffffff828362c0 ? Xtrap1d -ffffffff828362c0 ? Xtrap1e -ffffffff828362c0 ? Xtrap1f -ffffffff828362d0 ? x2apic_eoi -ffffffff828362f0 ? Xintr_lapic_ipi -ffffffff82836330 ? Xipi_invltlb -ffffffff82836360 ? Xipi_invept -ffffffff828363a0 ? Xipi_invlpg -ffffffff828363d0 ? Xipi_invlrange -ffffffff82836410 ? Xipi_invltlb_pcid -ffffffff82836450 ? Xipi_invlpg_pcid -ffffffff828364a0 ? Xipi_invlrange_pcid -ffffffff82836510 ? Xintr_lapic_ltimer -ffffffff82836550 ? Xintr_xen_upcall -ffffffff82836590 ? Xintr_hyperv_upcall -ffffffff828365d0 ? Xintr_legacy0 -ffffffff82836610 ? Xintr_legacy1 -ffffffff82836650 ? Xintr_legacy2 -ffffffff82836690 ? Xintr_legacy3 -ffffffff828366d0 ? Xintr_legacy4 -ffffffff82836710 ? Xintr_legacy5 -ffffffff82836750 ? Xintr_legacy6 -ffffffff82836790 ? Xintr_legacy7 -ffffffff828367d0 ? Xintr_legacy8 -ffffffff82836810 ? Xintr_legacy9 -ffffffff82836850 ? Xintr_legacy10 -ffffffff82836890 ? Xintr_legacy11 -ffffffff828368d0 ? Xintr_legacy12 -ffffffff82836910 ? Xintr_legacy13 -ffffffff82836950 ? Xintr_legacy14 -ffffffff82836990 ? Xintr_legacy15 -ffffffff828369d0 ? Xintr_ioapic_edge0 -ffffffff82836a10 ? Xintr_ioapic_edge1 -ffffffff82836a50 ? Xintr_ioapic_edge2 -ffffffff82836a90 ? Xintr_ioapic_edge3 -ffffffff82836ad0 ? Xintr_ioapic_edge4 -ffffffff82836b10 ? Xintr_ioapic_edge5 -ffffffff82836b50 ? Xintr_ioapic_edge6 -ffffffff82836b90 ? Xintr_ioapic_edge7 -ffffffff82836bd0 ? Xintr_ioapic_edge8 -ffffffff82836c10 ? Xintr_ioapic_edge9 -ffffffff82836c50 ? Xintr_ioapic_edge10 -ffffffff82836c90 ? Xintr_ioapic_edge11 -ffffffff82836cd0 ? Xintr_ioapic_edge12 -ffffffff82836d10 ? Xintr_ioapic_edge13 -ffffffff82836d50 ? Xintr_ioapic_edge14 -ffffffff82836d90 ? Xintr_ioapic_edge15 -ffffffff82836dd0 ? Xintr_ioapic_edge16 -ffffffff82836e10 ? Xintr_ioapic_edge17 -ffffffff82836e50 ? Xintr_ioapic_edge18 -ffffffff82836e90 ? Xintr_ioapic_edge19 -ffffffff82836ed0 ? Xintr_ioapic_edge20 -ffffffff82836f10 ? Xintr_ioapic_edge21 -ffffffff82836f50 ? Xintr_ioapic_edge22 -ffffffff82836f90 ? Xintr_ioapic_edge23 -ffffffff82836fd0 ? Xintr_ioapic_edge24 -ffffffff82837010 ? Xintr_ioapic_edge25 -ffffffff82837050 ? Xintr_ioapic_edge26 -ffffffff82837090 ? Xintr_ioapic_edge27 -ffffffff828370d0 ? Xintr_ioapic_edge28 -ffffffff82837110 ? Xintr_ioapic_edge29 -ffffffff82837150 ? Xintr_ioapic_edge30 -ffffffff82837190 ? Xintr_ioapic_edge31 -ffffffff828371d0 ? Xintr_ioapic_edge32 -ffffffff82837210 ? Xintr_ioapic_edge33 -ffffffff82837250 ? Xintr_ioapic_edge34 -ffffffff82837290 ? Xintr_ioapic_edge35 -ffffffff828372d0 ? Xintr_ioapic_edge36 -ffffffff82837310 ? Xintr_ioapic_edge37 -ffffffff82837350 ? Xintr_ioapic_edge38 -ffffffff82837390 ? Xintr_ioapic_edge39 -ffffffff828373d0 ? Xintr_ioapic_edge40 -ffffffff82837410 ? Xintr_ioapic_edge41 -ffffffff82837450 ? Xintr_ioapic_edge42 -ffffffff82837490 ? Xintr_ioapic_edge43 -ffffffff828374d0 ? Xintr_ioapic_edge44 -ffffffff82837510 ? Xintr_ioapic_edge45 -ffffffff82837550 ? Xintr_ioapic_edge46 -ffffffff82837590 ? Xintr_ioapic_edge47 -ffffffff828375d0 ? Xintr_ioapic_edge48 -ffffffff82837610 ? Xintr_ioapic_edge49 -ffffffff82837650 ? Xintr_ioapic_edge50 -ffffffff82837690 ? Xintr_ioapic_edge51 -ffffffff828376d0 ? Xintr_ioapic_edge52 -ffffffff82837710 ? Xintr_ioapic_edge53 -ffffffff82837750 ? Xintr_ioapic_edge54 -ffffffff82837790 ? Xintr_ioapic_edge55 -ffffffff828377d0 ? Xintr_ioapic_edge56 -ffffffff82837810 ? Xintr_ioapic_edge57 -ffffffff82837850 ? Xintr_ioapic_edge58 -ffffffff82837890 ? Xintr_ioapic_edge59 -ffffffff828378d0 ? Xintr_ioapic_edge60 -ffffffff82837910 ? Xintr_ioapic_edge61 -ffffffff82837950 ? Xintr_ioapic_edge62 -ffffffff82837990 ? Xintr_ioapic_edge63 -ffffffff828379d0 ? Xintr_ioapic_level0 -ffffffff82837a10 ? Xintr_ioapic_level1 -ffffffff82837a50 ? Xintr_ioapic_level2 -ffffffff82837a90 ? Xintr_ioapic_level3 -ffffffff82837ad0 ? Xintr_ioapic_level4 -ffffffff82837b10 ? Xintr_ioapic_level5 -ffffffff82837b50 ? Xintr_ioapic_level6 -ffffffff82837b90 ? Xintr_ioapic_level7 -ffffffff82837bd0 ? Xintr_ioapic_level8 -ffffffff82837c10 ? Xintr_ioapic_level9 -ffffffff82837c50 ? Xintr_ioapic_level10 -ffffffff82837c90 ? Xintr_ioapic_level11 -ffffffff82837cd0 ? Xintr_ioapic_level12 -ffffffff82837d10 ? Xintr_ioapic_level13 -ffffffff82837d50 ? Xintr_ioapic_level14 -ffffffff82837d90 ? Xintr_ioapic_level15 -ffffffff82837dd0 ? Xintr_ioapic_level16 -ffffffff82837e10 ? Xintr_ioapic_level17 -ffffffff82837e50 ? Xintr_ioapic_level18 -ffffffff82837e90 ? Xintr_ioapic_level19 -ffffffff82837ed0 ? Xintr_ioapic_level20 -ffffffff82837f10 ? Xintr_ioapic_level21 -ffffffff82837f50 ? Xintr_ioapic_level22 -ffffffff82837f90 ? Xintr_ioapic_level23 -ffffffff82837fd0 ? Xintr_ioapic_level24 -ffffffff82838010 ? Xintr_ioapic_level25 -ffffffff82838050 ? Xintr_ioapic_level26 -ffffffff82838090 ? Xintr_ioapic_level27 -ffffffff828380d0 ? Xintr_ioapic_level28 -ffffffff82838110 ? Xintr_ioapic_level29 -ffffffff82838150 ? Xintr_ioapic_level30 -ffffffff82838190 ? Xintr_ioapic_level31 -ffffffff828381d0 ? Xintr_ioapic_level32 -ffffffff82838210 ? Xintr_ioapic_level33 -ffffffff82838250 ? Xintr_ioapic_level34 -ffffffff82838290 ? Xintr_ioapic_level35 -ffffffff828382d0 ? Xintr_ioapic_level36 -ffffffff82838310 ? Xintr_ioapic_level37 -ffffffff82838350 ? Xintr_ioapic_level38 -ffffffff82838390 ? Xintr_ioapic_level39 -ffffffff828383d0 ? Xintr_ioapic_level40 -ffffffff82838410 ? Xintr_ioapic_level41 -ffffffff82838450 ? Xintr_ioapic_level42 -ffffffff82838490 ? Xintr_ioapic_level43 -ffffffff828384d0 ? Xintr_ioapic_level44 -ffffffff82838510 ? Xintr_ioapic_level45 -ffffffff82838550 ? Xintr_ioapic_level46 -ffffffff82838590 ? Xintr_ioapic_level47 -ffffffff828385d0 ? Xintr_ioapic_level48 -ffffffff82838610 ? Xintr_ioapic_level49 -ffffffff82838650 ? Xintr_ioapic_level50 -ffffffff82838690 ? Xintr_ioapic_level51 -ffffffff828386d0 ? Xintr_ioapic_level52 -ffffffff82838710 ? Xintr_ioapic_level53 -ffffffff82838750 ? Xintr_ioapic_level54 -ffffffff82838790 ? Xintr_ioapic_level55 -ffffffff828387d0 ? Xintr_ioapic_level56 -ffffffff82838810 ? Xintr_ioapic_level57 -ffffffff82838850 ? Xintr_ioapic_level58 -ffffffff82838890 ? Xintr_ioapic_level59 -ffffffff828388d0 ? Xintr_ioapic_level60 -ffffffff82838910 ? Xintr_ioapic_level61 -ffffffff82838950 ? Xintr_ioapic_level62 -ffffffff82838990 ? Xintr_ioapic_level63 -ffffffff82839000 ? codepatch_fill_nop -ffffffff82839000 A __cptext_start -ffffffff82839000 A __kutext_end -ffffffff828390b0 ? codepatch_maprw -ffffffff828391c0 ? codepatch_unmaprw -ffffffff82839230 ? codepatch_nop -ffffffff828393b0 ? codepatch_replace -ffffffff82839580 ? codepatch_call -ffffffff828395a0 ? codepatch_control_flow -ffffffff828397c0 ? codepatch_jmp -ffffffff8283a000 A __cptext_end -ffffffff8283a000 A __rodata_start -ffffffff8283a000 C _etext -ffffffff8283a000 C etext -ffffffff8283b000 r seeprom_read -ffffffff8283b004 r icl_mg_pll_find_divisors.div1_vals -ffffffff8283b034 r athn_ac2qid -ffffffff8283b034 r athn_ac2qid -ffffffff8283b034 r athn_ac2qid -ffffffff8283b040 r rtwn_get_rssi.cckoff -ffffffff8283b068 r rsu_ac2qid -ffffffff8283b078 r pckbc_portcmd -ffffffff8283b07c r tht_fifo_write_pad.pad -ffffffff8283b084 r rsu_get_rssi.cckoff -ffffffff8283b0a4 r adlp_n_revids -ffffffff8283b0e8 r apple_iso_trans -ffffffff8283b0f0 r wihap_check_tx.txratetable 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vga_50lscreen_mono -ffffffff8294f1c8 R vga_50lscreen_bf -ffffffff8294f1f8 R vga_screenlist -ffffffff8294f208 R vga_screenlist_mono -ffffffff8294f218 R vga_accessops -ffffffff8294f278 r i945_wm_info -ffffffff8294f2b8 r bgansitopc -ffffffff8294f2c0 r pctoansi -ffffffff8294f300 r sdma_offsets -ffffffff8294f300 r sdma_offsets -ffffffff8294f338 r iha_rate_tbl -ffffffff8294f370 r i830_a_wm_info -ffffffff8294f3a8 r gen9_edram_size_mb.ways -ffffffff8294f408 r aggr_periodic_times -ffffffff8294f508 r michael_final.pad -ffffffff8294f530 r rt_copysa.maskarray -ffffffff8294f538 r i915_wm_info -ffffffff8294f540 r amdgpu_ih_clientid_jpeg -ffffffff8294f540 r amdgpu_ih_clientid_uvds -ffffffff8294f540 r amdgpu_ih_clientid_vcns -ffffffff8294f540 r amdgpu_ih_clientid_vcns -ffffffff8294f540 r amdgpu_ih_clientid_vcns -ffffffff8294f570 r jsl_ehl_revids -ffffffff8294f580 r vga_setfontset.cmaptabb -ffffffff8294f5f0 r i830_bc_wm_info -ffffffff8294f658 r hsw_activate_psr2.map -ffffffff8294f660 r tgl_revids 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ciss_switch -ffffffff8295d030 R ciss_level -ffffffff8295d050 R ciss_stat -ffffffff8295e000 R ami_switch -ffffffff8295e028 R ami_raw_switch -ffffffff8295f000 R mfi_switch -ffffffff8295f028 R mfi_pd_switch -ffffffff8295f050 r mfi_iop_xscale -ffffffff8295f080 r mfi_iop_ppc -ffffffff8295f0b0 r mfi_iop_gen2 -ffffffff8295f0e0 r mfi_iop_skinny -ffffffff8295f110 r mfi_bbu_indicators -ffffffff82960000 R qlw_switch -ffffffff82961000 R isp_2100_risc_code -ffffffff82973bf0 R isp_2200_risc_code -ffffffff82986990 R isp_2300_risc_code -ffffffff829a0408 R qla_switch -ffffffff829a0430 r qla_regs_2100 -ffffffff829a0460 r qla_regs_2200 -ffffffff829a0490 r qla_regs_23XX -ffffffff829a1000 R ahci_atascsi_methods -ffffffff829a2000 R nvme_switch -ffffffff829a2028 r nvme_ops -ffffffff829a3000 R mpi_switch -ffffffff829a3060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs -ffffffff829a3090 r chv_oa_mux_regs -ffffffff829a30b0 r fiji_clock_stretcher_lookup_table -ffffffff829a30b0 r tonga_clock_stretcher_lookup_table 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hpt366_pio -ffffffff829a3810 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs -ffffffff829a3830 r ether_crc32_be_update.rev -ffffffff829a3830 r rtw_grf5101_mac_crypt.caesar -ffffffff829a3880 r snb_b_fdi_train_param -ffffffff829a3960 r intel_hpll_vco.elk_vco -ffffffff829a3980 r icl_revids -ffffffff829a39e0 r pin_offsets -ffffffff829a3a00 r amdgpu_ih_srcid_jpeg -ffffffff829a3a40 r firmware_list -ffffffff829a3aa0 r atom_arg_shift -ffffffff829a3aa0 r atom_arg_shift -ffffffff829a3ae0 r pf_syncookie_wstab -ffffffff829a3b00 r ieee80211_media_init.mopts -ffffffff829a3b60 r add_entropy_words.twist_table -ffffffff829a3c00 r urtw_8225v2_txpwr_cck -ffffffff829a3c20 r bwfm_pci_prio2fifo -ffffffff829a3c20 r ieee80211_up_to_ac.up_to_ac -ffffffff829a3ce0 r paritytab -ffffffff829a3ce0 r x86emu_parity_tab -ffffffff829a3d00 r legacy_connector_convert -ffffffff829a3d40 r gen7_oa_mux_regs -ffffffff829a3d60 r hsw_oa_mux_regs -ffffffff829a3d80 r notetab -ffffffff829a3da0 r urtw_8225v2_txpwr_cck_ch14 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T fill_custom_backlight_caps +ffffffff824f0000 T mod_vmid_get_for_ptb +ffffffff824f0240 T mod_vmid_reset +ffffffff824f0300 T mod_vmid_create +ffffffff824f0450 T mod_vmid_destroy +ffffffff824f1000 T amdgpu_dpm_get_sclk +ffffffff824f10b0 T amdgpu_dpm_get_mclk +ffffffff824f1160 T amdgpu_dpm_set_powergating_by_smu +ffffffff824f1260 T amdgpu_dpm_set_gfx_power_up_by_imu +ffffffff824f13f0 T amdgpu_dpm_baco_enter +ffffffff824f14a0 T amdgpu_dpm_baco_exit +ffffffff824f1550 T amdgpu_dpm_set_mp1_state +ffffffff824f1600 T amdgpu_dpm_is_baco_supported +ffffffff824f16d0 T amdgpu_dpm_mode2_reset +ffffffff824f1780 T amdgpu_dpm_enable_gfx_features +ffffffff824f1830 T amdgpu_dpm_baco_reset +ffffffff824f1900 T amdgpu_dpm_is_mode1_reset_supported +ffffffff824f19a0 T amdgpu_dpm_mode1_reset +ffffffff824f1a40 T amdgpu_dpm_switch_power_profile +ffffffff824f1b00 T amdgpu_dpm_set_xgmi_pstate +ffffffff824f1bb0 T amdgpu_dpm_set_df_cstate +ffffffff824f1c60 T amdgpu_dpm_allow_xgmi_power_down +ffffffff824f1d00 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff824f1db0 T amdgpu_dpm_set_clockgating_by_smu +ffffffff824f1e60 T amdgpu_dpm_smu_i2c_bus_access +ffffffff824f1f20 T amdgpu_pm_acpi_event_handler +ffffffff824f1ff0 T amdgpu_dpm_read_sensor +ffffffff824f20c0 T amdgpu_dpm_get_apu_thermal_limit +ffffffff824f2170 T amdgpu_dpm_set_apu_thermal_limit +ffffffff824f2220 T amdgpu_dpm_compute_clocks +ffffffff824f2330 T amdgpu_dpm_enable_uvd +ffffffff824f2560 T amdgpu_dpm_enable_vce +ffffffff824f2790 T amdgpu_dpm_enable_jpeg +ffffffff824f28b0 T amdgpu_pm_load_smu_firmware +ffffffff824f2980 T amdgpu_dpm_handle_passthrough_sbr +ffffffff824f2a20 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff824f2ac0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff824f2b60 T amdgpu_dpm_get_dpm_freq_range +ffffffff824f2c20 T amdgpu_dpm_set_soft_freq_range +ffffffff824f2ce0 T amdgpu_dpm_write_watermarks_table +ffffffff824f2d80 T amdgpu_dpm_wait_for_event +ffffffff824f2e30 T amdgpu_dpm_set_residency_gfxoff +ffffffff824f2ed0 T amdgpu_dpm_get_residency_gfxoff +ffffffff824f2f70 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff824f3010 T amdgpu_dpm_get_status_gfxoff +ffffffff824f30b0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff824f3110 T amdgpu_dpm_gfx_state_change +ffffffff824f3180 T amdgpu_dpm_get_ecc_info +ffffffff824f3220 T amdgpu_dpm_get_vce_clock_state +ffffffff824f32d0 T amdgpu_dpm_get_current_power_state +ffffffff824f3350 T amdgpu_dpm_set_power_state +ffffffff824f3500 T amdgpu_dpm_dispatch_task +ffffffff824f35c0 T amdgpu_dpm_get_performance_level +ffffffff824f3660 T amdgpu_dpm_force_performance_level +ffffffff824f3890 T amdgpu_dpm_get_pp_num_states +ffffffff824f3940 T amdgpu_dpm_get_pp_table +ffffffff824f39f0 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff824f3ab0 T amdgpu_dpm_odn_edit_dpm_table +ffffffff824f3b70 T amdgpu_dpm_print_clock_levels +ffffffff824f3c20 T amdgpu_dpm_emit_clock_levels +ffffffff824f3ce0 T amdgpu_dpm_set_ppfeature_status +ffffffff824f3d90 T amdgpu_dpm_get_ppfeature_status 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amdgpu_dpm_thermal_work_handler +ffffffff824fb000 t pp_early_init +ffffffff824fb120 t pp_late_init +ffffffff824fb250 t pp_sw_init +ffffffff824fb2f0 t pp_sw_fini +ffffffff824fb350 t pp_hw_init +ffffffff824fb3b0 t pp_hw_fini +ffffffff824fb430 t pp_late_fini +ffffffff824fb4a0 t pp_suspend +ffffffff824fb500 t pp_resume +ffffffff824fb520 t pp_is_idle +ffffffff824fb550 t pp_wait_for_idle +ffffffff824fb580 t pp_sw_reset +ffffffff824fb5b0 t pp_set_clockgating_state +ffffffff824fb5e0 t pp_set_powergating_state +ffffffff824fb610 t pp_dpm_set_fan_control_mode +ffffffff824fb680 t pp_dpm_get_fan_control_mode +ffffffff824fb700 t pp_dpm_set_fan_speed_pwm +ffffffff824fb760 t pp_dpm_get_fan_speed_pwm +ffffffff824fb7c0 t pp_dpm_force_clock_level +ffffffff824fb820 t pp_dpm_print_clock_levels +ffffffff824fb880 t pp_dpm_emit_clock_levels +ffffffff824fb8e0 t pp_dpm_force_performance_level +ffffffff824fb980 t pp_dpm_get_sclk_od +ffffffff824fb9e0 t pp_dpm_set_sclk_od +ffffffff824fba40 t pp_dpm_get_mclk_od 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pp_dpm_set_mp1_state +ffffffff824fc840 t pp_smu_i2c_bus_access +ffffffff824fc8a0 t pp_gfx_state_change_set +ffffffff824fc910 t pp_dpm_get_sclk +ffffffff824fc960 t pp_dpm_get_mclk +ffffffff824fc9b0 t pp_display_configuration_change +ffffffff824fca00 t pp_get_display_power_level +ffffffff824fca40 t pp_get_current_clocks +ffffffff824fcb80 t pp_get_clock_by_type +ffffffff824fcbd0 t pp_get_clock_by_type_with_latency +ffffffff824fcc20 t pp_get_clock_by_type_with_voltage +ffffffff824fcc70 t pp_set_watermarks_for_clocks_ranges +ffffffff824fccb0 t pp_display_clock_voltage_request +ffffffff824fccf0 t pp_get_display_mode_validation_clocks +ffffffff824fcd50 t pp_notify_smu_enable_pwe +ffffffff824fcdc0 t pp_enable_mgpu_fan_boost +ffffffff824fce30 t pp_set_active_display_count +ffffffff824fce70 t pp_set_hard_min_dcefclk_by_freq +ffffffff824fcee0 t pp_set_hard_min_fclk_by_freq +ffffffff824fcf50 t pp_set_min_deep_sleep_dcefclk +ffffffff824fcfc0 t pp_get_asic_baco_capability +ffffffff824fd040 t pp_get_asic_baco_state +ffffffff824fd0b0 t pp_set_asic_baco_state +ffffffff824fd130 t pp_get_ppfeature_status +ffffffff824fd190 t pp_set_ppfeature_status +ffffffff824fd1e0 t pp_asic_reset_mode_2 +ffffffff824fd240 t pp_set_df_cstate +ffffffff824fd2b0 t pp_set_xgmi_pstate +ffffffff824fd320 t pp_get_gpu_metrics +ffffffff824fd380 t pp_get_prv_buffer_details +ffffffff824fd410 t pp_pm_compute_clocks +ffffffff824fd4f0 t pp_swctf_delayed_work_handler +ffffffff824fd670 t __delayed_work_tick +ffffffff824fe000 T ci_baco_set_state +ffffffff824ff000 T baco_program_registers +ffffffff824ff0d0 t baco_cmd_handler +ffffffff824ff2b0 T soc15_baco_program_registers +ffffffff82500000 T fiji_baco_set_state +ffffffff82501000 T phm_setup_asic +ffffffff82501050 T phm_power_down_asic +ffffffff825010a0 T phm_set_power_state +ffffffff82501120 T phm_enable_dynamic_state_management +ffffffff825011e0 T phm_disable_dynamic_state_management +ffffffff82501280 T phm_force_dpm_levels +ffffffff825012d0 T phm_apply_state_adjust_rules +ffffffff82501320 T phm_apply_clock_adjust_rules +ffffffff82501370 T phm_powerdown_uvd +ffffffff825013c0 T phm_disable_clock_power_gatings +ffffffff82501410 T phm_pre_display_configuration_changed +ffffffff82501480 T phm_display_configuration_changed +ffffffff825014f0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff82501560 T phm_stop_thermal_controller +ffffffff825015c0 T phm_register_irq_handlers +ffffffff82501610 T phm_start_thermal_controller +ffffffff82501760 T phm_check_smc_update_required_for_display_configuration +ffffffff825017c0 T phm_check_states_equal +ffffffff82501810 T phm_store_dal_configuration_data +ffffffff82501970 T phm_get_dal_power_level +ffffffff825019d0 T phm_set_cpu_power_state +ffffffff82501a20 T phm_get_performance_level +ffffffff82501a80 T phm_get_clock_info +ffffffff82501c10 T phm_get_current_shallow_sleep_clocks +ffffffff82501c60 T phm_get_clock_by_type +ffffffff82501cb0 T phm_get_clock_by_type_with_latency +ffffffff82501d00 T phm_get_clock_by_type_with_voltage +ffffffff82501d50 T phm_set_watermarks_for_clocks_ranges +ffffffff82501da0 T phm_display_clock_voltage_request +ffffffff82501df0 T phm_get_max_high_clocks +ffffffff82501e40 T phm_disable_smc_firmware_ctf +ffffffff82501ea0 T phm_set_active_display_count +ffffffff82502000 T hwmgr_early_init +ffffffff825024a0 t polaris_set_asic_special_caps +ffffffff82502520 T hwmgr_sw_init +ffffffff825025a0 T hwmgr_sw_fini +ffffffff82502600 T hwmgr_hw_init +ffffffff82502800 T hwmgr_hw_fini +ffffffff825028f0 T hwmgr_suspend +ffffffff82502990 T hwmgr_resume +ffffffff82502a50 T hwmgr_handle_task +ffffffff82503000 T polaris_baco_set_state +ffffffff82504000 T pp_override_get_default_fuse_value +ffffffff82505000 T psm_init_power_state_table +ffffffff82505350 T psm_fini_power_state_table +ffffffff82505430 T psm_set_boot_states +ffffffff825054e0 T psm_set_performance_states +ffffffff82505590 T psm_set_user_performance_state +ffffffff82505620 T psm_adjust_power_state_dynamic +ffffffff82506000 T atomctrl_initialize_mc_reg_table +ffffffff82506130 t atomctrl_retrieve_ac_timing +ffffffff82506290 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff825063c0 T atomctrl_set_engine_dram_timings_rv770 +ffffffff82506430 T atomctrl_get_memory_pll_dividers_si +ffffffff82506510 T atomctrl_get_memory_pll_dividers_vi +ffffffff82506590 T atomctrl_get_memory_pll_dividers_ai +ffffffff82506650 T atomctrl_get_engine_pll_dividers_kong +ffffffff825066d0 T atomctrl_get_engine_pll_dividers_vi +ffffffff825067a0 T atomctrl_get_engine_pll_dividers_ai +ffffffff82506890 T atomctrl_get_dfs_pll_dividers_vi +ffffffff82506960 T atomctrl_get_reference_clock +ffffffff825069d0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff82506a90 T atomctrl_get_voltage_table_v3 +ffffffff82506bf0 T atomctrl_get_pp_assign_pin +ffffffff82506cf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff82507200 t GetScaledFraction +ffffffff82507290 t fDecodeLeakageID +ffffffff825072f0 t fSqrt +ffffffff82507370 T atomctrl_get_voltage_evv_on_sclk +ffffffff825073f0 T atomctrl_get_voltage_evv +ffffffff825074b0 T atomctrl_get_mpll_reference_clock +ffffffff82507530 T atomctrl_is_asic_internal_ss_supported +ffffffff82507590 T atomctrl_get_memory_clock_spread_spectrum +ffffffff825076a0 T atomctrl_get_engine_clock_spread_spectrum +ffffffff825077b0 T atomctrl_read_efuse +ffffffff82507860 T atomctrl_set_ac_timing_ai +ffffffff825078d0 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff82507950 T atomctrl_get_smc_sclk_range_table +ffffffff82507a10 T atomctrl_get_vddc_shared_railinfo +ffffffff82507a90 T atomctrl_get_avfs_information +ffffffff82507c20 T atomctrl_get_svi2_info +ffffffff82507d00 T atomctrl_get_leakage_id_from_efuse +ffffffff82507d70 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff82507f10 T atomctrl_get_voltage_range +ffffffff82507fe0 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff82508070 T atomctrl_get_edc_leakage_table +ffffffff82509000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff825090e0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff825092c0 T pp_atomfwctrl_get_pp_assign_pin +ffffffff825093c0 T pp_atomfwctrl_enter_self_refresh +ffffffff825093f0 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff825094a0 T pp_atomfwctrl_get_avfs_information +ffffffff825097e0 T pp_atomfwctrl_get_gpio_information +ffffffff82509890 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff82509920 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff82509d10 T pp_atomfwctrl_get_smc_dpm_information +ffffffff8250a000 T encode_pcie_lane_width +ffffffff8250a030 T decode_pcie_lane_width +ffffffff8250b000 t pp_tables_v1_0_initialize +ffffffff8250c590 t pp_tables_v1_0_uninitialize +ffffffff8250c7b0 T get_number_of_powerplay_table_entries_v1_0 +ffffffff8250c870 T get_powerplay_table_entry_v1_0 +ffffffff8250d000 T pp_tables_get_response_times +ffffffff8250d0f0 T pp_tables_get_num_of_entries +ffffffff8250d1c0 T pp_tables_get_entry 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smu10_set_cpu_power_state +ffffffff82510490 t smu10_store_cc6_data +ffffffff82510500 t smu10_get_dal_power_level +ffffffff82510530 t smu10_get_performance_level +ffffffff825105d0 t smu10_get_current_shallow_sleep_clocks +ffffffff82510630 t smu10_get_clock_by_type_with_latency +ffffffff82510780 t smu10_get_clock_by_type_with_voltage +ffffffff82510890 t smu10_set_watermarks_for_clocks_ranges +ffffffff82510970 t smu10_display_clock_voltage_request +ffffffff82510a20 t smu10_get_max_high_clocks +ffffffff82510a50 t smu10_power_off_asic +ffffffff82510aa0 t smu10_force_clock_level +ffffffff82510c80 t smu10_print_clock_levels +ffffffff82511100 t smu10_gfx_off_control +ffffffff82511220 t smu10_read_sensor +ffffffff825113d0 t smu10_set_active_display_count +ffffffff82511430 t smu10_set_min_deep_sleep_dcefclk +ffffffff825114a0 t smu10_get_power_profile_mode +ffffffff825114e0 t smu10_set_power_profile_mode +ffffffff82511630 t smu10_set_fine_grain_clk_vol +ffffffff825118c0 t smu10_powergate_mmhub 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smu7_hwmgr_backend_fini +ffffffff82516150 t smu7_setup_asic_task +ffffffff82516590 t smu7_get_power_state_size +ffffffff825165c0 t smu7_apply_state_adjust_rules +ffffffff82516aa0 t smu7_force_dpm_level +ffffffff82517040 t smu7_enable_dpm_tasks +ffffffff82519e80 t smu7_disable_dpm_tasks +ffffffff8251a6b0 t smu7_dpm_patch_boot_state +ffffffff8251a810 t smu7_get_pp_table_entry +ffffffff8251ac10 t smu7_get_number_of_powerplay_table_entries +ffffffff8251ac90 t smu7_dpm_get_mclk +ffffffff8251ad40 t smu7_dpm_get_sclk +ffffffff8251adf0 t smu7_set_power_state_tasks +ffffffff8251bca0 t smu7_notify_smc_display_config_after_ps_adjustment +ffffffff8251bcd0 t smu7_display_configuration_changed_task +ffffffff8251bee0 t smu7_set_max_fan_rpm_output +ffffffff8251bf10 t smu7_set_max_fan_pwm_output +ffffffff8251bf30 t smu7_set_fan_control_mode +ffffffff8251bfd0 t smu7_get_fan_control_mode +ffffffff8251c010 t smu7_register_irq_handlers +ffffffff8251c0e0 t smu7_check_smc_update_required_for_display_configuration +ffffffff8251c190 t smu7_check_states_equal +ffffffff8251c330 t smu7_get_performance_level +ffffffff8251c3c0 t smu7_get_clock_by_type +ffffffff8251c580 t smu7_get_clock_by_type_with_latency +ffffffff8251c750 t smu7_set_watermarks_for_clocks_ranges +ffffffff8251c980 t smu7_get_max_high_clocks +ffffffff8251ca00 t smu7_power_off_asic +ffffffff8251ca60 t smu7_force_clock_level +ffffffff8251cba0 t smu7_print_clock_levels +ffffffff8251d220 t smu7_get_sclk_od +ffffffff8251d280 t smu7_set_sclk_od +ffffffff8251d340 t smu7_get_mclk_od +ffffffff8251d3a0 t smu7_set_mclk_od +ffffffff8251d460 t smu7_read_sensor +ffffffff8251d6e0 t smu7_avfs_control +ffffffff8251d7d0 t smu7_notify_cac_buffer_info +ffffffff8251d9c0 t smu7_get_thermal_temperature_range +ffffffff8251da60 t smu7_get_power_profile_mode +ffffffff8251daa0 t smu7_set_power_profile_mode +ffffffff8251dd30 t smu7_odn_edit_dpm_table +ffffffff8251df10 t phm_add_voltage +ffffffff8251e030 t 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phm_trim_voltage_table_to_fit_state_table +ffffffff82527dd0 T phm_reset_single_dpm_table +ffffffff82527e30 T phm_setup_pcie_table_entry +ffffffff82527e70 T phm_get_dpm_level_enable_mask_value +ffffffff82527f50 T phm_get_voltage_index +ffffffff82527fd0 T phm_get_voltage_id +ffffffff82528050 T phm_find_closest_vddci +ffffffff825280c0 T phm_find_boot_level +ffffffff82528130 T phm_get_sclk_for_voltage_evv +ffffffff825281f0 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff82528310 T phm_get_lowest_enabled_level +ffffffff82528350 T phm_apply_dal_min_voltage_request +ffffffff82528420 T phm_get_voltage_evv_on_sclk +ffffffff825284e0 T phm_irq_process +ffffffff825286b0 T smu9_register_irq_handlers +ffffffff82528780 T smu_atom_get_data_table +ffffffff825287f0 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff82528900 T smu_set_watermarks_for_clocks_ranges +ffffffff82529000 T tonga_baco_set_state +ffffffff8252a000 T vega10_baco_set_state +ffffffff8252b000 T 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vega10_initialize_power_tune_defaults +ffffffff82537240 T vega10_set_power_limit +ffffffff825372a0 T vega10_enable_power_containment +ffffffff825373e0 T vega10_disable_power_containment +ffffffff825374d0 T vega10_power_control_set_level +ffffffff82537540 t vega10_didt_set_mask +ffffffff82538000 t vega10_pp_tables_initialize +ffffffff825397a0 t vega10_pp_tables_uninitialize +ffffffff825399c0 T vega10_get_number_of_powerplay_table_entries +ffffffff82539a80 T vega10_get_powerplay_table_entry +ffffffff82539c20 T vega10_baco_set_cap +ffffffff8253a000 T vega10_fan_ctrl_get_fan_speed_info +ffffffff8253a080 T vega10_fan_ctrl_get_fan_speed_pwm +ffffffff8253a1d0 T vega10_fan_ctrl_get_fan_speed_rpm +ffffffff8253a2f0 T vega10_fan_ctrl_set_static_mode +ffffffff8253a610 T vega10_fan_ctrl_set_default_mode +ffffffff8253a880 T vega10_fan_ctrl_start_smc_fan_control +ffffffff8253a960 T vega10_fan_ctrl_stop_smc_fan_control +ffffffff8253aa40 T vega10_fan_ctrl_set_fan_speed_pwm +ffffffff8253acb0 T vega10_fan_ctrl_reset_fan_speed_to_default +ffffffff8253ad90 T vega10_fan_ctrl_set_fan_speed_rpm +ffffffff8253afb0 T vega10_thermal_get_temperature +ffffffff8253b050 T vega10_thermal_disable_alert +ffffffff8253b170 T vega10_thermal_stop_thermal_controller +ffffffff8253b1d0 T vega10_enable_mgpu_fan_boost +ffffffff8253b310 T vega10_start_thermal_controller +ffffffff8253b970 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff8253c000 T vega12_baco_set_state +ffffffff8253d000 T vega12_enable_disable_vce_dpm +ffffffff8253d0a0 T vega12_hwmgr_init +ffffffff8253d0e0 t vega12_hwmgr_backend_init +ffffffff8253d960 t vega12_hwmgr_backend_fini +ffffffff8253d9c0 t vega12_setup_asic_task +ffffffff8253da00 t vega12_apply_clocks_adjust_rules +ffffffff8253ddc0 t vega12_dpm_force_dpm_level +ffffffff8253e280 t vega12_enable_dpm_tasks +ffffffff8253ef00 t vega12_disable_dpm_tasks +ffffffff8253f020 t vega12_patch_boot_state +ffffffff8253f050 t vega12_power_gate_vce +ffffffff8253f100 t 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vega20_setup_memclk_dpm_table +ffffffff8254ced0 t vega20_get_max_sustainable_clock +ffffffff8254d000 T vega20_set_power_limit +ffffffff8254d050 T vega20_validate_power_level_request +ffffffff8254d090 T vega20_power_control_set_level +ffffffff8254e000 t vega20_pp_tables_initialize +ffffffff8254e7b0 t vega20_pp_tables_uninitialize +ffffffff8254f000 T vega20_fan_ctrl_stop_smc_fan_control +ffffffff8254f0a0 T vega20_fan_ctrl_start_smc_fan_control +ffffffff8254f140 T vega20_fan_ctrl_get_fan_speed_pwm +ffffffff8254f290 T vega20_fan_ctrl_set_fan_speed_pwm +ffffffff8254f4d0 t vega20_fan_ctrl_set_static_mode +ffffffff8254f6d0 T vega20_fan_ctrl_get_fan_speed_info +ffffffff8254f710 T vega20_fan_ctrl_get_fan_speed_rpm +ffffffff8254f780 T vega20_fan_ctrl_set_fan_speed_rpm +ffffffff8254f960 T vega20_thermal_get_temperature +ffffffff8254fa00 T vega20_thermal_disable_alert +ffffffff8254fa90 T vega20_thermal_stop_thermal_controller +ffffffff8254fb20 T vega20_start_thermal_controller +ffffffff82550000 t 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vega20_get_enabled_smc_features +ffffffff825754c0 T vega20_set_pptable_driver_address +ffffffff82575570 t vega20_smu_init +ffffffff825759c0 t vega20_smu_fini +ffffffff82575b10 t vega20_start_smu +ffffffff82575c10 t vega20_get_argument +ffffffff82575c70 t vega20_send_msg_to_smc +ffffffff82575f10 t vega20_send_msg_to_smc_with_parameter +ffffffff82576220 t vega20_is_dpm_running +ffffffff825762d0 t vega20_smc_table_manager +ffffffff82577000 t vegam_smu_init +ffffffff825770b0 t vegam_start_smu +ffffffff825775a0 t vegam_update_smc_table +ffffffff82577830 t vegam_process_firmware_header +ffffffff825779b0 t vegam_update_sclk_threshold +ffffffff82577aa0 t vegam_thermal_setup_fan_table +ffffffff82577b00 t vegam_thermal_avfs_enable +ffffffff82577b90 t vegam_init_smc_table +ffffffff82578970 t vegam_populate_all_graphic_levels +ffffffff82579080 t vegam_populate_all_memory_levels +ffffffff825793c0 t vegam_get_offsetof +ffffffff82579450 t vegam_get_mac_definition +ffffffff825794b0 t vegam_is_dpm_running +ffffffff82579510 t vegam_is_hw_avfs_present +ffffffff82579570 t vegam_program_memory_timing_parameters +ffffffff825797f0 t vegam_populate_smc_uvd_level +ffffffff82579a20 t vegam_populate_smc_boot_level +ffffffff82579b10 t vegam_populate_smc_initial_state +ffffffff82579bc0 t vegam_populate_bapm_parameters_in_dpm_table +ffffffff82579d60 t vegam_populate_clock_stretcher_data_table +ffffffff82579fb0 t vegam_populate_avfs_parameters +ffffffff8257a320 t vegam_populate_vr_config +ffffffff8257a460 t vegam_populate_pm_fuses +ffffffff8257a6e0 t vegam_get_dependency_volt_by_clk +ffffffff8257a8d0 t vegam_calculate_sclk_params +ffffffff8257b000 T smu_set_residency_gfxoff +ffffffff8257b050 T smu_get_residency_gfxoff +ffffffff8257b0a0 T smu_get_entrycount_gfxoff +ffffffff8257b0f0 T smu_get_status_gfxoff +ffffffff8257b150 T smu_set_soft_freq_range +ffffffff8257b190 T smu_get_dpm_freq_range +ffffffff8257b1e0 T smu_set_gfx_power_up_by_imu +ffffffff8257b290 T is_support_sw_smu +ffffffff8257b2e0 T is_support_cclk_dpm +ffffffff8257b350 T smu_allow_xgmi_power_down +ffffffff8257b420 T smu_write_watermarks_table +ffffffff8257b490 T smu_set_ac_dc +ffffffff8257b5b0 t smu_early_init +ffffffff8257b900 t smu_late_init +ffffffff8257bd20 t smu_sw_init +ffffffff8257c4a0 t smu_sw_fini +ffffffff8257c730 t smu_hw_init +ffffffff8257cbf0 t smu_hw_fini +ffffffff8257cd00 t smu_late_fini +ffffffff8257cd20 t smu_suspend +ffffffff8257ce10 t smu_resume +ffffffff8257d0e0 t smu_set_clockgating_state +ffffffff8257d110 t smu_set_powergating_state +ffffffff8257d140 T smu_get_power_limit +ffffffff8257d290 T smu_mode1_reset_is_support +ffffffff8257d2e0 T smu_mode2_reset_is_support +ffffffff8257d330 T smu_mode1_reset +ffffffff8257d380 T smu_handle_passthrough_sbr +ffffffff8257d3d0 T smu_get_ecc_info +ffffffff8257d430 T smu_wait_for_event +ffffffff8257d480 T smu_stb_collect_info +ffffffff8257d4e0 T amdgpu_smu_stb_debug_fs_init +ffffffff8257d510 T smu_send_hbm_bad_pages_num +ffffffff8257d560 T smu_send_hbm_bad_channel_flag +ffffffff8257d5b0 t smu_set_fan_control_mode +ffffffff8257d670 t smu_get_fan_control_mode +ffffffff8257d6f0 t smu_set_fan_speed_pwm +ffffffff8257d7b0 t smu_get_fan_speed_pwm +ffffffff8257d810 t smu_force_ppclk_levels +ffffffff8257d8e0 t smu_print_ppclk_levels +ffffffff8257d950 t smu_emit_ppclk_levels +ffffffff8257d9c0 t smu_force_performance_level +ffffffff8257dc90 t smu_read_sensor +ffffffff8257def0 t smu_get_apu_thermal_limit +ffffffff8257df40 t smu_set_apu_thermal_limit +ffffffff8257df90 t smu_get_performance_level +ffffffff8257e000 t smu_get_current_power_state +ffffffff8257e060 t smu_get_fan_speed_rpm +ffffffff8257e0c0 t smu_set_fan_speed_rpm +ffffffff8257e180 t smu_get_power_num_states +ffffffff8257e200 t smu_sys_get_pp_table +ffffffff8257e270 t smu_sys_set_pp_table +ffffffff8257e4b0 t smu_switch_power_profile +ffffffff8257e5e0 t smu_handle_dpm_task +ffffffff8257e600 t smu_load_microcode +ffffffff8257e700 t smu_dpm_set_power_gate +ffffffff8257eac0 t smu_set_power_limit +ffffffff8257ec00 t smu_get_power_profile_mode +ffffffff8257ec60 t smu_set_power_profile_mode +ffffffff8257ecc0 t smu_od_edit_dpm_table +ffffffff8257ed20 t smu_set_mp1_state +ffffffff8257ed80 t smu_gfx_state_change_set +ffffffff8257edc0 t smu_get_sclk +ffffffff8257ee40 t smu_get_mclk +ffffffff8257eec0 t smu_display_configuration_change +ffffffff8257ef50 t smu_get_clock_by_type_with_latency +ffffffff8257f010 t smu_display_clock_voltage_request +ffffffff8257f070 t smu_enable_mgpu_fan_boost +ffffffff8257f0d0 t smu_set_display_count +ffffffff8257f140 t smu_set_deep_sleep_dcefclk +ffffffff8257f1b0 t smu_get_baco_capability +ffffffff8257f220 t smu_baco_set_state +ffffffff8257f320 t smu_sys_get_pp_feature_mask +ffffffff8257f3a0 t smu_sys_set_pp_feature_mask +ffffffff8257f410 t smu_mode2_reset +ffffffff8257f4d0 t smu_enable_gfx_features +ffffffff8257f590 t smu_set_df_cstate +ffffffff8257f660 t smu_set_xgmi_pstate +ffffffff8257f720 t smu_sys_get_gpu_metrics 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arcturus_get_unique_id +ffffffff82583f00 t arcturus_init_smc_tables +ffffffff82584090 t arcturus_setup_pptable +ffffffff825841f0 t arcturus_set_fan_speed_pwm +ffffffff825843d0 t arcturus_set_fan_speed_rpm +ffffffff82584520 t arcturus_log_thermal_throttling_event +ffffffff82584970 t arcturus_get_gpu_metrics +ffffffff82584bc0 t arcturus_get_fan_parameters +ffffffff82584c00 t arcturus_get_current_clk_freq_by_table +ffffffff82584d70 t arcturus_get_smu_metrics_data +ffffffff82584ff0 t arcturus_upload_dpm_level +ffffffff82585110 t arcturus_i2c_xfer +ffffffff825853d0 t arcturus_i2c_func +ffffffff82585400 t arcturus_set_fan_static_mode +ffffffff82586000 T cyan_skillfish_set_ppt_funcs +ffffffff82586030 t cyan_skillfish_print_clk_levels +ffffffff82586170 t cyan_skillfish_od_edit_dpm_table +ffffffff825864b0 t cyan_skillfish_read_sensor +ffffffff825866e0 t cyan_skillfish_is_dpm_running +ffffffff82586790 t cyan_skillfish_init_smc_tables +ffffffff82586880 t cyan_skillfish_get_enabled_mask +ffffffff825868c0 t cyan_skillfish_get_dpm_ultimate_freq +ffffffff82586990 t cyan_skillfish_get_gpu_metrics +ffffffff82586c40 t cyan_skillfish_get_smu_metrics_data +ffffffff82587000 T navi10_set_ppt_funcs +ffffffff82587050 t navi10_run_btc +ffffffff825870e0 t navi10_get_allowed_feature_mask +ffffffff825873d0 t navi10_set_default_dpm_table +ffffffff825878f0 t navi10_populate_umd_state_clk +ffffffff82587ab0 t navi10_print_clk_levels +ffffffff82587cb0 t navi10_emit_clk_levels +ffffffff82587f30 t navi10_force_clk_levels +ffffffff825880a0 t navi10_od_edit_dpm_table +ffffffff825886e0 t navi10_get_clock_by_type_with_latency +ffffffff825887f0 t navi10_get_power_profile_mode +ffffffff82588ad0 t navi10_set_power_profile_mode +ffffffff82588dd0 t navi10_dpm_set_vcn_enable +ffffffff82588e70 t navi10_dpm_set_jpeg_enable +ffffffff82588f00 t navi10_read_sensor +ffffffff825890b0 t navi10_pre_display_config_changed +ffffffff82589170 t navi10_display_config_changed +ffffffff82589210 t navi10_notify_smc_display_config +ffffffff825893e0 t navi10_is_dpm_running +ffffffff82589430 t navi10_get_fan_speed_rpm +ffffffff825894e0 t navi10_set_watermarks_table +ffffffff82589690 t navi10_get_thermal_temperature_range +ffffffff82589780 t navi10_get_uclk_dpm_states +ffffffff82589890 t navi10_set_default_od_settings +ffffffff82589b20 t navi10_display_disable_memory_clock_switch +ffffffff82589bb0 t navi10_get_power_limit +ffffffff82589ce0 t navi10_update_pcie_parameters +ffffffff82589e60 t navi10_i2c_control_init +ffffffff82589fb0 t navi10_i2c_control_fini +ffffffff82589ff0 t navi10_init_smc_tables +ffffffff8258a260 t navi10_setup_pptable +ffffffff8258a4d0 t navi10_baco_enter +ffffffff8258a520 t navi10_baco_exit +ffffffff8258a680 t navi1x_get_gpu_metrics +ffffffff8258b0f0 t navi10_enable_mgpu_fan_boost +ffffffff8258b170 t navi10_get_fan_parameters +ffffffff8258b1b0 t navi10_post_smu_init +ffffffff8258b4b0 t navi10_get_default_config_table_settings +ffffffff8258b500 t navi10_set_config_table +ffffffff8258b5c0 t navi1x_get_smu_metrics_data +ffffffff8258bc90 t navi10_od_setting_check_range +ffffffff8258bd50 t navi10_i2c_xfer +ffffffff8258c010 t navi10_i2c_func +ffffffff8258c040 t navi10_umc_hybrid_cdr_workaround +ffffffff8258d000 T sienna_cichlid_set_ppt_funcs +ffffffff8258d050 t sienna_cichlid_run_btc +ffffffff8258d0e0 t sienna_cichlid_get_allowed_feature_mask +ffffffff8258d380 t sienna_cichlid_set_default_dpm_table +ffffffff8258da10 t sienna_cichlid_populate_umd_state_clk +ffffffff8258dad0 t sienna_cichlid_print_clk_levels +ffffffff8258dcf0 t sienna_cichlid_force_clk_levels +ffffffff8258de60 t sienna_cichlid_od_edit_dpm_table +ffffffff8258e460 t sienna_cichlid_restore_user_od_settings +ffffffff8258e4f0 t sienna_cichlid_get_power_profile_mode +ffffffff8258e7d0 t sienna_cichlid_set_power_profile_mode +ffffffff8258ead0 t sienna_cichlid_dpm_set_vcn_enable +ffffffff8258eba0 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff8258ec30 t sienna_cichlid_read_sensor +ffffffff8258f4f0 t sienna_cichlid_pre_display_config_changed +ffffffff8258f520 t sienna_cichlid_display_config_changed +ffffffff8258f580 t sienna_cichlid_notify_smc_display_config +ffffffff8258f750 t sienna_cichlid_is_dpm_running +ffffffff8258f7b0 t sienna_cichlid_get_fan_speed_rpm +ffffffff8258f8d0 t sienna_cichlid_set_watermarks_table +ffffffff8258fa70 t sienna_cichlid_get_thermal_temperature_range +ffffffff8258fb50 t sienna_cichlid_get_uclk_dpm_states +ffffffff8258fc60 t sienna_cichlid_set_default_od_settings +ffffffff8258fe30 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff8258fec0 t sienna_cichlid_dump_pptable +ffffffff8258fef0 t sienna_cichlid_get_power_limit +ffffffff8258ffc0 t sienna_cichlid_update_pcie_parameters +ffffffff825900f0 t sienna_cichlid_i2c_control_init +ffffffff82590240 t sienna_cichlid_i2c_control_fini +ffffffff82590280 t sienna_cichlid_get_unique_id +ffffffff82590400 t sienna_cichlid_init_smc_tables +ffffffff82590770 t sienna_cichlid_set_mp1_state +ffffffff825907b0 t sienna_cichlid_setup_pptable +ffffffff82590c40 t sienna_cichlid_system_features_control +ffffffff82590ce0 t sienna_cichlid_baco_enter +ffffffff82590d30 t sienna_cichlid_baco_exit +ffffffff82590e90 t sienna_cichlid_is_mode1_reset_supported +ffffffff82590f20 t sienna_cichlid_is_mode2_reset_supported +ffffffff82590f50 t sienna_cichlid_mode2_reset +ffffffff825910f0 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff82591110 t sienna_cichlid_get_gpu_metrics +ffffffff825916e0 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff82591730 t sienna_cichlid_get_fan_parameters +ffffffff82591770 t sienna_cichlid_gpo_control +ffffffff82591840 t sienna_cichlid_get_ecc_info +ffffffff82591940 t sienna_cichlid_stb_get_data_direct +ffffffff82591a00 t sienna_cichlid_get_default_config_table_settings +ffffffff82591a70 t sienna_cichlid_set_config_table +ffffffff82591b40 t sienna_cichlid_get_throttler_status_locked +ffffffff82591ca0 t sienna_cichlid_get_smartshift_power_percentage +ffffffff82591dd0 t sienna_cichlid_i2c_xfer +ffffffff82592090 t sienna_cichlid_i2c_func +ffffffff82593000 T smu_v11_0_init_microcode +ffffffff82593170 T smu_v11_0_fini_microcode +ffffffff825931d0 T smu_v11_0_load_microcode +ffffffff82593330 T smu_v11_0_check_fw_status +ffffffff82593390 T smu_v11_0_check_fw_version +ffffffff82593530 T smu_v11_0_setup_pptable +ffffffff82593650 T smu_v11_0_init_smc_tables +ffffffff825937e0 T smu_v11_0_fini_smc_tables +ffffffff82593aa0 T smu_v11_0_init_power +ffffffff82593b40 T smu_v11_0_fini_power +ffffffff82593bb0 T smu_v11_0_get_vbios_bootup_values +ffffffff82593f60 T smu_v11_0_notify_memory_pool_location +ffffffff82594080 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff82594110 T smu_v11_0_set_driver_table_location +ffffffff82594190 T smu_v11_0_set_tool_table_location +ffffffff82594210 T smu_v11_0_init_display_count +ffffffff82594270 T smu_v11_0_set_allowed_mask +ffffffff82594350 T smu_v11_0_system_features_control +ffffffff82594370 T smu_v11_0_notify_display_change +ffffffff825943e0 T smu_v11_0_init_max_sustainable_clocks +ffffffff825946b0 t smu_v11_0_get_max_sustainable_clock +ffffffff82594820 T smu_v11_0_get_current_power_limit +ffffffff82594920 T smu_v11_0_set_power_limit +ffffffff82594a90 T smu_v11_0_interrupt_work +ffffffff82594b20 T smu_v11_0_enable_thermal_alert +ffffffff82594bd0 T smu_v11_0_disable_thermal_alert +ffffffff82594bf0 T smu_v11_0_get_gfx_vdd +ffffffff82594cb0 T smu_v11_0_display_clock_voltage_request +ffffffff82594e20 T smu_v11_0_set_hard_freq_limited_range +ffffffff82594f20 T smu_v11_0_gfx_off_control +ffffffff82594fa0 T smu_v11_0_get_fan_control_mode +ffffffff82595000 T smu_v11_0_set_fan_speed_pwm +ffffffff825951e0 t smu_v11_0_set_fan_static_mode +ffffffff825953e0 T smu_v11_0_set_fan_speed_rpm +ffffffff82595530 T smu_v11_0_get_fan_speed_pwm +ffffffff82595690 T smu_v11_0_get_fan_speed_rpm +ffffffff825957a0 T smu_v11_0_set_fan_control_mode +ffffffff82595990 T smu_v11_0_set_xgmi_pstate +ffffffff825959b0 T smu_v11_0_register_irq_handler +ffffffff82595a80 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff82595b10 T smu_v11_0_set_azalia_d3_pme +ffffffff82595b30 T smu_v11_0_baco_set_armd3_sequence +ffffffff82595b50 T smu_v11_0_baco_is_support +ffffffff82595bf0 T smu_v11_0_baco_get_state +ffffffff82595c20 T smu_v11_0_baco_set_state +ffffffff82595f40 T smu_v11_0_baco_enter +ffffffff82596090 T smu_v11_0_baco_exit +ffffffff82596210 T smu_v11_0_mode1_reset +ffffffff82596290 T smu_v11_0_handle_passthrough_sbr +ffffffff825962b0 T smu_v11_0_get_dpm_ultimate_freq +ffffffff82596410 T smu_v11_0_set_soft_freq_limited_range +ffffffff82596500 T smu_v11_0_set_performance_level +ffffffff825968f0 T smu_v11_0_set_power_source +ffffffff82596960 T smu_v11_0_get_dpm_freq_by_index +ffffffff82596a20 T smu_v11_0_get_dpm_level_count +ffffffff82596ad0 T smu_v11_0_set_single_dpm_table +ffffffff82596db0 T smu_v11_0_get_dpm_level_range +ffffffff82596f70 T smu_v11_0_get_current_pcie_link_width_level +ffffffff82596fd0 T smu_v11_0_get_current_pcie_link_width +ffffffff82597040 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff825970a0 T smu_v11_0_get_current_pcie_link_speed +ffffffff82597100 T smu_v11_0_gfx_ulv_control +ffffffff82597180 T smu_v11_0_deep_sleep_control +ffffffff82597390 T smu_v11_0_restore_user_od_settings +ffffffff82597420 T smu_v11_0_set_smu_mailbox_registers +ffffffff82597490 t smu_v11_0_set_irq_state +ffffffff82597ae0 t smu_v11_0_irq_process +ffffffff82598000 T vangogh_set_ppt_funcs +ffffffff82598040 t vangogh_set_default_dpm_tables +ffffffff82598070 t vangogh_common_print_clk_levels +ffffffff82598530 t vangogh_force_clk_levels +ffffffff825987b0 t vangogh_od_edit_dpm_table +ffffffff82598d70 t vangogh_get_power_profile_mode +ffffffff82598ed0 t vangogh_set_power_profile_mode +ffffffff82599020 t vangogh_dpm_set_vcn_enable +ffffffff82599080 t vangogh_dpm_set_jpeg_enable +ffffffff825990e0 t vangogh_read_sensor +ffffffff825997f0 t vangogh_get_apu_thermal_limit +ffffffff82599810 t vangogh_set_apu_thermal_limit +ffffffff82599830 t vangogh_is_dpm_running +ffffffff825998a0 t vangogh_set_watermarks_table +ffffffff82599a30 t vangogh_set_performance_level +ffffffff8259a400 t vangogh_get_power_limit +ffffffff8259a580 t vangogh_get_ppt_limit +ffffffff8259a5f0 t vangogh_get_dpm_clock_table +ffffffff8259a760 t vangogh_init_smc_tables +ffffffff8259a9e0 t vangogh_system_features_control +ffffffff8259aa30 t vangogh_set_power_limit +ffffffff8259abc0 t vangogh_get_gfxoff_status +ffffffff8259ac50 t vangogh_get_gfxoff_entrycount +ffffffff8259acd0 t vangogh_set_gfxoff_residency +ffffffff8259ad50 t vangogh_get_gfxoff_residency +ffffffff8259ad90 t vangogh_mode2_reset +ffffffff8259af50 t vangogh_common_get_gpu_metrics +ffffffff8259b770 t vangogh_post_smu_init +ffffffff8259b930 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff8259b9a0 t vangogh_force_dpm_limit_value +ffffffff8259bb20 t vangogh_get_dpm_ultimate_freq +ffffffff8259be50 t vangogh_set_soft_freq_limited_range +ffffffff8259c010 t vangogh_get_gpu_metrics_v2_3 +ffffffff8259d000 T renoir_set_ppt_funcs +ffffffff8259d0a0 t renoir_get_current_power_state +ffffffff8259d120 t renoir_print_clk_levels +ffffffff8259d570 t renoir_force_clk_levels +ffffffff8259d7d0 t renoir_od_edit_dpm_table +ffffffff8259db10 t renoir_get_power_profile_mode +ffffffff8259dc20 t renoir_set_power_profile_mode +ffffffff8259dd70 t renoir_dpm_set_vcn_enable +ffffffff8259de10 t renoir_dpm_set_jpeg_enable +ffffffff8259dea0 t renoir_read_sensor +ffffffff8259e2b0 t renoir_is_dpm_running +ffffffff8259e2f0 t renoir_set_watermarks_table +ffffffff8259e4b0 t renoir_set_performance_level +ffffffff8259eaf0 t renoir_get_dpm_clock_table +ffffffff8259ee40 t renoir_init_smc_tables +ffffffff8259efe0 t renoir_get_enabled_mask +ffffffff8259f020 t renoir_get_dpm_ultimate_freq +ffffffff8259f2f0 t renoir_get_gpu_metrics +ffffffff8259f530 t renoir_gfx_state_change_set +ffffffff8259f560 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff8259f610 t renoir_force_dpm_limit_value +ffffffff825a0000 T smu_v12_0_check_fw_status +ffffffff825a0060 T smu_v12_0_check_fw_version +ffffffff825a00e0 T smu_v12_0_powergate_sdma +ffffffff825a0130 T smu_v12_0_set_gfx_cgpg +ffffffff825a0190 T smu_v12_0_get_gfxoff_status +ffffffff825a0220 T smu_v12_0_gfx_off_control +ffffffff825a0350 T smu_v12_0_fini_smc_tables +ffffffff825a0420 T smu_v12_0_set_default_dpm_tables +ffffffff825a0450 T smu_v12_0_mode2_reset +ffffffff825a0470 T smu_v12_0_set_soft_freq_limited_range +ffffffff825a05f0 T smu_v12_0_set_driver_table_location +ffffffff825a0670 T smu_v12_0_get_vbios_bootup_values +ffffffff825a1000 T aldebaran_set_ppt_funcs +ffffffff825a1050 t aldebaran_get_allowed_feature_mask +ffffffff825a10b0 t aldebaran_set_default_dpm_table +ffffffff825a12f0 t aldebaran_populate_umd_state_clk +ffffffff825a13f0 t aldebaran_print_clk_levels +ffffffff825a15f0 t aldebaran_force_clk_levels +ffffffff825a1800 t aldebaran_usr_edit_dpm_table +ffffffff825a1a40 t aldebaran_read_sensor +ffffffff825a1cc0 t aldebaran_is_dpm_running +ffffffff825a1d20 t aldebaran_get_thermal_temperature_range +ffffffff825a1df0 t aldebaran_set_performance_level +ffffffff825a1ea0 t aldebaran_get_power_limit +ffffffff825a2060 t aldebaran_set_df_cstate +ffffffff825a20f0 t aldebaran_allow_xgmi_power_down +ffffffff825a21a0 t aldebaran_i2c_control_init +ffffffff825a2270 t aldebaran_i2c_control_fini +ffffffff825a22b0 t aldebaran_get_unique_id +ffffffff825a23a0 t aldebaran_init_smc_tables +ffffffff825a2590 t aldebaran_set_mp1_state +ffffffff825a25d0 t aldebaran_setup_pptable +ffffffff825a26c0 t aldebaran_system_features_control +ffffffff825a2850 t aldebaran_set_power_limit +ffffffff825a28e0 t aldebaran_is_baco_supported +ffffffff825a2910 t aldebaran_is_mode1_reset_supported +ffffffff825a2940 t aldebaran_is_mode2_reset_supported +ffffffff825a2970 t aldebaran_mode1_reset +ffffffff825a2a70 t aldebaran_mode2_reset +ffffffff825a2eb0 t aldebaran_set_soft_freq_limited_range +ffffffff825a30f0 t aldebaran_log_thermal_throttling_event +ffffffff825a3450 t aldebaran_get_gpu_metrics +ffffffff825a3720 t aldebaran_smu_handle_passthrough_sbr +ffffffff825a3740 t aldebaran_smu_send_hbm_bad_page_num +ffffffff825a37d0 t aldebaran_get_ecc_info +ffffffff825a3940 t aldebaran_send_hbm_bad_channel_flag +ffffffff825a3a30 t aldebaran_get_current_clk_freq_by_table +ffffffff825a3ba0 t aldebaran_get_smu_metrics_data +ffffffff825a3e20 t aldebaran_upload_dpm_level +ffffffff825a3f40 t aldebaran_i2c_xfer +ffffffff825a4200 t aldebaran_i2c_func +ffffffff825a5000 T smu_v13_0_init_microcode +ffffffff825a5150 T smu_v13_0_fini_microcode +ffffffff825a51b0 T smu_v13_0_load_microcode +ffffffff825a51e0 T smu_v13_0_init_pptable_microcode +ffffffff825a5390 T smu_v13_0_get_pptable_from_firmware +ffffffff825a54c0 T smu_v13_0_check_fw_status +ffffffff825a5540 T smu_v13_0_check_fw_version +ffffffff825a55d0 T smu_v13_0_setup_pptable +ffffffff825a5770 T smu_v13_0_init_smc_tables +ffffffff825a5940 T smu_v13_0_fini_smc_tables +ffffffff825a5be0 T smu_v13_0_init_power +ffffffff825a5c70 T smu_v13_0_fini_power +ffffffff825a5d00 T smu_v13_0_get_vbios_bootup_values +ffffffff825a5fd0 T smu_v13_0_notify_memory_pool_location +ffffffff825a60a0 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff825a6130 T smu_v13_0_set_driver_table_location +ffffffff825a61b0 T smu_v13_0_set_tool_table_location +ffffffff825a6230 T smu_v13_0_init_display_count +ffffffff825a6270 T smu_v13_0_set_allowed_mask +ffffffff825a6350 T smu_v13_0_gfx_off_control +ffffffff825a63d0 T smu_v13_0_system_features_control +ffffffff825a63f0 T smu_v13_0_notify_display_change +ffffffff825a6460 T smu_v13_0_init_max_sustainable_clocks +ffffffff825a6730 t smu_v13_0_get_max_sustainable_clock +ffffffff825a68a0 T smu_v13_0_get_current_power_limit +ffffffff825a69a0 T smu_v13_0_set_power_limit +ffffffff825a6ae0 T smu_v13_0_enable_thermal_alert +ffffffff825a6b80 T smu_v13_0_disable_thermal_alert +ffffffff825a6bc0 T smu_v13_0_get_gfx_vdd +ffffffff825a6c80 T smu_v13_0_display_clock_voltage_request +ffffffff825a6df0 T smu_v13_0_set_hard_freq_limited_range +ffffffff825a6ef0 T smu_v13_0_get_fan_control_mode +ffffffff825a6f40 T smu_v13_0_set_fan_speed_pwm +ffffffff825a71b0 t smu_v13_0_set_fan_static_mode +ffffffff825a73b0 T smu_v13_0_set_fan_control_mode +ffffffff825a7550 T smu_v13_0_set_fan_speed_rpm +ffffffff825a7740 T smu_v13_0_set_xgmi_pstate +ffffffff825a7760 T smu_v13_0_register_irq_handler +ffffffff825a7840 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff825a78d0 T smu_v13_0_set_azalia_d3_pme +ffffffff825a78f0 T smu_v13_0_wait_for_event +ffffffff825a7940 T smu_v13_0_get_dpm_ultimate_freq +ffffffff825a7ab0 T smu_v13_0_set_soft_freq_limited_range +ffffffff825a7ba0 T smu_v13_0_set_performance_level +ffffffff825a8400 T smu_v13_0_set_power_source +ffffffff825a8470 T smu_v13_0_get_dpm_freq_by_index +ffffffff825a8530 T smu_v13_0_set_single_dpm_table +ffffffff825a88b0 T smu_v13_0_get_current_pcie_link_width_level +ffffffff825a8910 T smu_v13_0_get_current_pcie_link_width +ffffffff825a8980 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff825a89e0 T smu_v13_0_get_current_pcie_link_speed +ffffffff825a8a50 T smu_v13_0_set_vcn_enable +ffffffff825a8b10 T smu_v13_0_set_jpeg_enable +ffffffff825a8b30 T smu_v13_0_run_btc +ffffffff825a8bc0 T smu_v13_0_gpo_control +ffffffff825a8c60 T smu_v13_0_deep_sleep_control +ffffffff825a8f60 T smu_v13_0_gfx_ulv_control +ffffffff825a8fe0 T smu_v13_0_baco_set_armd3_sequence +ffffffff825a9050 T smu_v13_0_baco_is_support +ffffffff825a90f0 T smu_v13_0_baco_get_state +ffffffff825a9120 T smu_v13_0_baco_set_state +ffffffff825a9220 T smu_v13_0_baco_enter +ffffffff825a93b0 T smu_v13_0_baco_exit +ffffffff825a9460 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff825a94a0 T smu_v13_0_od_edit_dpm_table +ffffffff825a97b0 T smu_v13_0_set_default_dpm_tables +ffffffff825a97e0 T smu_v13_0_set_smu_mailbox_registers +ffffffff825a9850 T smu_v13_0_mode1_reset +ffffffff825a98d0 T smu_v13_0_update_pcie_parameters +ffffffff825a9b50 t smu_v13_0_set_irq_state +ffffffff825aa1a0 t smu_v13_0_irq_process +ffffffff825ab000 T smu_v13_0_0_set_ppt_funcs +ffffffff825ab0f0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff825ab240 t smu_v13_0_0_set_default_dpm_table +ffffffff825ab6c0 t smu_v13_0_0_populate_umd_state_clk +ffffffff825ab800 t smu_v13_0_0_print_clk_levels +ffffffff825ab950 t smu_v13_0_0_force_clk_levels +ffffffff825abae0 t smu_v13_0_0_od_edit_dpm_table +ffffffff825ac020 t smu_v13_0_0_restore_user_od_settings +ffffffff825ac100 t smu_v13_0_0_get_power_profile_mode +ffffffff825ac220 t smu_v13_0_0_set_power_profile_mode +ffffffff825ac4b0 t smu_v13_0_0_read_sensor +ffffffff825ac730 t smu_v13_0_0_is_dpm_running +ffffffff825ac780 t smu_v13_0_0_get_fan_speed_pwm +ffffffff825ac870 t smu_v13_0_0_get_fan_speed_rpm +ffffffff825ac8e0 t smu_v13_0_0_get_thermal_temperature_range +ffffffff825ac9e0 t smu_v13_0_0_set_default_od_settings +ffffffff825acb40 t smu_v13_0_0_dump_pptable +ffffffff825acb70 t smu_v13_0_0_get_power_limit +ffffffff825acc60 t smu_v13_0_0_set_df_cstate +ffffffff825acc80 t smu_v13_0_0_i2c_control_init +ffffffff825acdd0 t smu_v13_0_0_i2c_control_fini +ffffffff825ace10 t smu_v13_0_0_get_unique_id +ffffffff825acec0 t smu_v13_0_0_init_smc_tables +ffffffff825ad130 t smu_v13_0_0_set_mp1_state +ffffffff825ad170 t smu_v13_0_0_setup_pptable +ffffffff825ad2f0 t smu_v13_0_0_system_features_control +ffffffff825ad300 t smu_v13_0_0_baco_enter +ffffffff825ad370 t smu_v13_0_0_baco_exit +ffffffff825ad3e0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff825ad440 t smu_v13_0_0_mode1_reset +ffffffff825ad5a0 t smu_v13_0_0_mode2_reset +ffffffff825ad5f0 t smu_v13_0_0_enable_gfx_features +ffffffff825ad650 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff825ad780 t smu_v13_0_0_get_gpu_metrics +ffffffff825adbe0 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff825adc30 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff825adcc0 t smu_v13_0_0_get_ecc_info +ffffffff825adde0 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff825ade70 t smu_v13_0_0_i2c_xfer +ffffffff825ae130 t smu_v13_0_0_i2c_func +ffffffff825af000 T smu_v13_0_4_set_ppt_funcs +ffffffff825af0c0 t smu_v13_0_4_print_clk_levels +ffffffff825af140 t smu_v13_0_4_force_clk_levels +ffffffff825af420 t smu_v13_0_4_read_sensor +ffffffff825af760 t smu_v13_0_4_is_dpm_running +ffffffff825af7c0 t smu_v13_0_4_set_watermarks_table +ffffffff825af950 t smu_v13_0_4_set_performance_level +ffffffff825b0660 t smu_v13_0_4_init_smc_tables +ffffffff825b0800 t smu_v13_0_4_fini_smc_tables +ffffffff825b08d0 t smu_v13_0_4_system_features_control +ffffffff825b0960 t smu_v13_0_4_mode2_reset +ffffffff825b0980 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff825b0db0 t smu_v13_0_4_get_gpu_metrics +ffffffff825b0f90 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff825b0ff0 t smu_v13_0_4_get_current_clk_freq +ffffffff825b2000 T smu_v13_0_5_set_ppt_funcs +ffffffff825b20a0 t smu_v13_0_5_set_default_dpm_tables +ffffffff825b20d0 t smu_v13_0_5_print_clk_levels +ffffffff825b2170 t smu_v13_0_5_force_clk_levels +ffffffff825b2300 t smu_v13_0_5_od_edit_dpm_table +ffffffff825b2610 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff825b2630 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff825b2650 t smu_v13_0_5_read_sensor +ffffffff825b28d0 t smu_v13_0_5_is_dpm_running +ffffffff825b2930 t smu_v13_0_5_set_watermarks_table +ffffffff825b2ac0 t smu_v13_0_5_set_performance_level +ffffffff825b3140 t smu_v13_0_5_init_smc_tables +ffffffff825b32e0 t smu_v13_0_5_fini_smc_tables +ffffffff825b33b0 t smu_v13_0_5_system_features_control +ffffffff825b3400 t smu_v13_0_5_mode2_reset +ffffffff825b3490 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff825b38d0 t smu_v13_0_5_get_gpu_metrics +ffffffff825b3a30 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff825b4000 T smu_v13_0_6_set_ppt_funcs +ffffffff825b4050 t smu_v13_0_6_get_allowed_feature_mask +ffffffff825b40b0 t smu_v13_0_6_set_default_dpm_table +ffffffff825b4600 t smu_v13_0_6_populate_umd_state_clk +ffffffff825b4700 t smu_v13_0_6_print_clk_levels +ffffffff825b4ad0 t smu_v13_0_6_force_clk_levels +ffffffff825b4ce0 t smu_v13_0_6_usr_edit_dpm_table +ffffffff825b4f20 t smu_v13_0_6_read_sensor +ffffffff825b5530 t smu_v13_0_6_is_dpm_running +ffffffff825b55c0 t smu_v13_0_6_get_thermal_temperature_range +ffffffff825b5740 t smu_v13_0_6_set_performance_level +ffffffff825b5870 t smu_v13_0_6_get_power_limit +ffffffff825b5950 t smu_v13_0_6_set_df_cstate +ffffffff825b5970 t smu_v13_0_6_allow_xgmi_power_down +ffffffff825b5990 t smu_v13_0_6_i2c_control_init +ffffffff825b5ae0 t smu_v13_0_6_i2c_control_fini +ffffffff825b5b20 t smu_v13_0_6_get_unique_id +ffffffff825b5ba0 t smu_v13_0_6_init_smc_tables +ffffffff825b5d60 t smu_v13_0_6_check_fw_status +ffffffff825b5dc0 t smu_v13_0_6_setup_pptable +ffffffff825b5df0 t smu_v13_0_6_system_features_control +ffffffff825b5e90 t smu_v13_0_6_get_enabled_mask +ffffffff825b5f10 t smu_v13_0_6_set_power_limit +ffffffff825b5f30 t smu_v13_0_6_register_irq_handler +ffffffff825b5f90 t smu_v13_0_6_is_baco_supported +ffffffff825b5fc0 t smu_v13_0_6_is_mode1_reset_supported +ffffffff825b5ff0 t smu_v13_0_6_is_mode2_reset_supported +ffffffff825b6020 t smu_v13_0_6_mode1_reset +ffffffff825b60e0 t smu_v13_0_6_mode2_reset +ffffffff825b64a0 t smu_v13_0_6_get_dpm_ultimate_freq +ffffffff825b66e0 t smu_v13_0_6_set_soft_freq_limited_range +ffffffff825b6960 t smu_v13_0_6_log_thermal_throttling_event +ffffffff825b6ca0 t smu_v13_0_6_get_gpu_metrics +ffffffff825b7050 t smu_v13_0_6_smu_send_hbm_bad_page_num +ffffffff825b70e0 t smu_v13_0_6_get_smu_metrics_data +ffffffff825b73a0 t smu_v13_0_6_upload_dpm_level +ffffffff825b74d0 t smu_v13_0_6_i2c_xfer +ffffffff825b7800 t smu_v13_0_6_i2c_func +ffffffff825b7830 t smu_v13_0_6_set_irq_state +ffffffff825b7b10 t smu_v13_0_6_irq_process +ffffffff825b8000 T smu_v13_0_7_set_ppt_funcs +ffffffff825b8060 t smu_v13_0_7_get_allowed_feature_mask +ffffffff825b81e0 t smu_v13_0_7_set_default_dpm_table +ffffffff825b8660 t smu_v13_0_7_populate_umd_state_clk +ffffffff825b87a0 t smu_v13_0_7_print_clk_levels +ffffffff825b88f0 t smu_v13_0_7_force_clk_levels +ffffffff825b8a80 t smu_v13_0_7_od_edit_dpm_table +ffffffff825b8fc0 t smu_v13_0_7_restore_user_od_settings +ffffffff825b90a0 t smu_v13_0_7_get_power_profile_mode +ffffffff825b9200 t smu_v13_0_7_set_power_profile_mode +ffffffff825b9470 t smu_v13_0_7_read_sensor +ffffffff825b96e0 t smu_v13_0_7_is_dpm_running +ffffffff825b9730 t smu_v13_0_7_get_fan_speed_pwm +ffffffff825b9820 t smu_v13_0_7_get_fan_speed_rpm +ffffffff825b9890 t smu_v13_0_7_get_thermal_temperature_range +ffffffff825b9990 t smu_v13_0_7_set_default_od_settings +ffffffff825b9af0 t smu_v13_0_7_dump_pptable +ffffffff825b9b20 t smu_v13_0_7_get_power_limit +ffffffff825b9c10 t smu_v13_0_7_set_df_cstate +ffffffff825b9c30 t smu_v13_0_7_init_smc_tables +ffffffff825b9e50 t smu_v13_0_7_check_fw_status +ffffffff825b9eb0 t smu_v13_0_7_set_mp1_state +ffffffff825b9ef0 t smu_v13_0_7_setup_pptable +ffffffff825ba060 t smu_v13_0_7_baco_enter +ffffffff825ba0d0 t smu_v13_0_7_baco_exit +ffffffff825ba140 t smu_v13_0_7_is_mode1_reset_supported +ffffffff825ba180 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff825ba2b0 t smu_v13_0_7_get_gpu_metrics +ffffffff825ba700 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff825bb000 T yellow_carp_set_ppt_funcs +ffffffff825bb050 t yellow_carp_set_default_dpm_tables +ffffffff825bb080 t yellow_carp_print_clk_levels +ffffffff825bb100 t yellow_carp_force_clk_levels +ffffffff825bb3e0 t yellow_carp_od_edit_dpm_table +ffffffff825bb6f0 t yellow_carp_dpm_set_vcn_enable +ffffffff825bb710 t yellow_carp_dpm_set_jpeg_enable +ffffffff825bb730 t yellow_carp_read_sensor +ffffffff825bbb00 t yellow_carp_is_dpm_running +ffffffff825bbb60 t yellow_carp_set_watermarks_table +ffffffff825bbcf0 t yellow_carp_set_performance_level +ffffffff825bc8f0 t yellow_carp_init_smc_tables +ffffffff825bca90 t yellow_carp_fini_smc_tables +ffffffff825bcb60 t yellow_carp_system_features_control +ffffffff825bcbb0 t yellow_carp_get_gfxoff_status +ffffffff825bcc40 t yellow_carp_mode2_reset +ffffffff825bccd0 t yellow_carp_get_dpm_ultimate_freq +ffffffff825bd120 t yellow_carp_get_gpu_metrics +ffffffff825bd2f0 t yellow_carp_post_smu_init +ffffffff825bd380 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff825bd3e0 t yellow_carp_get_current_clk_freq +ffffffff825bd4f0 t yellow_carp_get_dpm_profile_freq +ffffffff825be000 T smu_cmn_send_msg_without_waiting +ffffffff825be1b0 T smu_cmn_wait_for_response +ffffffff825be300 T smu_cmn_send_smc_msg_with_param +ffffffff825be690 T smu_cmn_to_asic_specific_index +ffffffff825be7c0 t __smu_cmn_reg_print_error +ffffffff825bea20 T smu_cmn_send_smc_msg +ffffffff825bea40 T smu_cmn_send_debug_smc_msg +ffffffff825beae0 T smu_cmn_send_debug_smc_msg_with_param +ffffffff825beb80 T smu_cmn_feature_is_supported +ffffffff825bec30 T smu_cmn_feature_is_enabled +ffffffff825bed30 T smu_cmn_clk_dpm_is_enabled +ffffffff825bee40 T smu_cmn_get_enabled_mask +ffffffff825bef40 T smu_cmn_get_indep_throttler_status +ffffffff825beff0 T smu_cmn_feature_update_enable_state +ffffffff825bf0b0 T smu_cmn_feature_set_enabled +ffffffff825bf190 T smu_cmn_get_pp_feature_mask +ffffffff825bf340 T smu_cmn_set_pp_feature_mask +ffffffff825bf470 T smu_cmn_disable_all_features_with_exception +ffffffff825bf530 T smu_cmn_get_smc_version +ffffffff825bf620 T smu_cmn_update_table +ffffffff825bf7b0 T smu_cmn_write_watermarks_table +ffffffff825bf890 T smu_cmn_write_pptable +ffffffff825bf970 T smu_cmn_get_metrics_table +ffffffff825bfae0 T smu_cmn_get_combo_pptable +ffffffff825bfbd0 T smu_cmn_init_soft_gpu_metrics +ffffffff825bfcd0 T smu_cmn_set_mp1_state +ffffffff825bfd80 T smu_cmn_is_audio_func_enabled +ffffffff825c0000 T pci_mcfg_init +ffffffff825c0050 T pci_lookup_segment +ffffffff825c00b0 T pci_attach_hook +ffffffff825c00e0 T pci_bus_maxdevs +ffffffff825c0110 T pci_make_tag +ffffffff825c0190 T pci_decompose_tag +ffffffff825c01f0 T pci_conf_size +ffffffff825c0250 T pci_mcfg_map_bus +ffffffff825c02e0 T pci_conf_read +ffffffff825c0450 T pci_conf_write +ffffffff825c05a0 T pci_msix_table_map +ffffffff825c06f0 T pci_msix_table_unmap +ffffffff825c07a0 T msi_hwmask +ffffffff825c0880 T msi_hwunmask +ffffffff825c0960 T msi_addroute +ffffffff825c0aa0 T msi_delroute +ffffffff825c0b30 T msi_allocidtvec +ffffffff825c0ca0 T pci_intr_enable_msivec +ffffffff825c0da0 T pci_intr_map_msi +ffffffff825c0e60 T pci_intr_map_msivec +ffffffff825c0f20 T msix_hwmask +ffffffff825c10c0 T msix_hwunmask +ffffffff825c1220 T msix_addroute +ffffffff825c1470 T msix_delroute +ffffffff825c1600 T pci_intr_map_msix +ffffffff825c16e0 T pci_intr_map +ffffffff825c1940 T pci_intr_string +ffffffff825c1a20 T pci_intr_establish +ffffffff825c1a70 T pci_intr_establish_cpu +ffffffff825c1bf0 T pci_intr_disestablish +ffffffff825c1c10 T pci_init_extents +ffffffff825c1e30 T pci_probe_device_hook +ffffffff825c1e70 T pci_dev_postattach +ffffffff825c1e80 T pci_min_powerstate +ffffffff825c1e90 T pci_set_powerstate_md +ffffffff825c2000 T pciide_machdep_compat_intr_establish +ffffffff825c2070 T pciide_machdep_compat_intr_disestablish +ffffffff825c3000 T vga_post_init +ffffffff825c3390 t vm86_emu_inb +ffffffff825c33e0 t vm86_emu_inw +ffffffff825c3420 t vm86_emu_inl +ffffffff825c3460 t vm86_emu_outb +ffffffff825c34b0 t vm86_emu_outw +ffffffff825c34f0 t vm86_emu_outl +ffffffff825c3530 T vga_post_call +ffffffff825c35b0 T vga_post_free +ffffffff825c3640 T ddb_vgapost +ffffffff825c4000 T pchbmatch +ffffffff825c4040 T pchbattach +ffffffff825c4570 T pchbactivate +ffffffff825c45f0 T pchb_amd64ht_attach +ffffffff825c4750 T pchb_rnd +ffffffff825c47e0 T pchb_print +ffffffff825c5000 T amas_match +ffffffff825c5060 T amas_attach +ffffffff825c50c0 T amas_intl_nodes +ffffffff825c5160 T amas_get_pagerange +ffffffff825c6000 T agp_flush_cache +ffffffff825c7000 T cardslotmatch +ffffffff825c7050 T cardslotattach +ffffffff825c7320 T cardslot_event +ffffffff825c7380 T cardslot_cb_print +ffffffff825c73e0 T cardslot_16_print +ffffffff825c7430 T cardslot_16_submatch +ffffffff825c7480 T cardslot_event_throw +ffffffff825c7540 T cardslot_process_event +ffffffff825c8000 T cardbusmatch +ffffffff825c8060 T cardbusattach +ffffffff825c8150 T cardbus_read_tuples +ffffffff825c85e0 T parse_tuple +ffffffff825c8860 T cardbus_attach_card +ffffffff825c9170 T enable_function +ffffffff825c9220 T decode_tuples +ffffffff825c9300 T cardbusprint +ffffffff825c9420 T cardbussubmatch +ffffffff825c9480 T disable_function +ffffffff825c94e0 T cardbus_detach_card +ffffffff825c95d0 T cardbus_intr_establish +ffffffff825c9600 T cardbus_intr_disestablish +ffffffff825c9620 T cardbus_function_enable +ffffffff825c9720 T cardbus_function_disable +ffffffff825c9780 T cardbus_matchbyid +ffffffff825c97f0 T decode_tuple +ffffffff825ca000 T cardbus_mapreg_map +ffffffff825ca1d0 T cardbus_mapreg_unmap +ffffffff825cb000 T cardbus_read_exrom +ffffffff825cc000 T rbus_space_alloc +ffffffff825cc070 T rbus_space_alloc_subregion +ffffffff825cc270 T rbus_space_free +ffffffff825cc310 T rbus_new_body +ffffffff825cc3b0 T rbus_new_root_delegate +ffffffff825cc490 T rbus_new_root_share +ffffffff825cd000 T com_cardbus_match +ffffffff825cd080 T com_cardbus_attach +ffffffff825cd250 T com_cardbus_detach +ffffffff825cd300 T com_cardbus_find_csdev +ffffffff825cd480 T com_cardbus_gofigure +ffffffff825cd980 T com_cardbus_enable +ffffffff825cda80 T com_cardbus_disable +ffffffff825cdad0 T com_cardbus_setup +ffffffff825ce000 T xl_cardbus_match +ffffffff825ce080 T xl_cardbus_attach +ffffffff825ce480 T xl_cardbus_detach +ffffffff825ce550 T xl_cardbus_lookup +ffffffff825ce600 T xl_cardbus_intr_ack +ffffffff825cf000 T dc_cardbus_match +ffffffff825cf030 T dc_cardbus_attach +ffffffff825cf450 T dc_cardbus_detach +ffffffff825cf500 T dc_cardbus_setup +ffffffff825d0000 T fxp_cardbus_match +ffffffff825d0030 T fxp_cardbus_attach +ffffffff825d0290 T fxp_cardbus_detach +ffffffff825d0340 T fxp_cardbus_setup +ffffffff825d1000 t rl_cardbus_match +ffffffff825d1030 t rl_cardbus_attach +ffffffff825d1220 t rl_cardbus_detach +ffffffff825d12e0 T rl_cardbus_setup +ffffffff825d2000 T re_cardbus_probe +ffffffff825d2030 T re_cardbus_attach +ffffffff825d2280 T re_cardbus_detach +ffffffff825d2320 T re_cardbus_setup +ffffffff825d3000 T ath_cardbus_match +ffffffff825d3060 T ath_cardbus_attach +ffffffff825d31c0 T ath_cardbus_detach +ffffffff825d32a0 T ath_cardbus_enable +ffffffff825d33a0 T ath_cardbus_disable +ffffffff825d3400 T ath_cardbus_power +ffffffff825d3440 T ath_cardbus_setup +ffffffff825d4000 T athn_cardbus_match +ffffffff825d4030 T athn_cardbus_attach +ffffffff825d41a0 T athn_cardbus_detach +ffffffff825d4250 T athn_cardbus_enable +ffffffff825d4350 T athn_cardbus_disable +ffffffff825d43b0 T athn_cardbus_power +ffffffff825d43f0 T athn_cardbus_read +ffffffff825d4420 T athn_cardbus_write +ffffffff825d4450 T athn_cardbus_write_barrier +ffffffff825d4480 T athn_cardbus_setup +ffffffff825d5000 T atw_cardbus_match +ffffffff825d5030 T atw_cardbus_attach +ffffffff825d5260 T atw_cardbus_detach +ffffffff825d5330 T atw_cardbus_enable +ffffffff825d5430 T atw_cardbus_disable +ffffffff825d5490 T atw_cardbus_power +ffffffff825d54d0 T atw_cardbus_setup +ffffffff825d6000 T rtw_cardbus_match +ffffffff825d6030 T rtw_cardbus_attach +ffffffff825d62e0 T rtw_cardbus_detach +ffffffff825d6430 T rtw_cardbus_intr_ack +ffffffff825d6450 T rtw_cardbus_funcregen +ffffffff825d64d0 T rtw_cardbus_enable +ffffffff825d6690 T rtw_cardbus_disable +ffffffff825d67b0 T rtw_cardbus_power +ffffffff825d67f0 T rtw_cardbus_setup +ffffffff825d7000 T ral_cardbus_match +ffffffff825d7030 T ral_cardbus_attach +ffffffff825d7280 T ral_cardbus_detach +ffffffff825d7350 T ral_cardbus_activate +ffffffff825d73f0 T ral_cardbus_enable +ffffffff825d75a0 T ral_cardbus_disable +ffffffff825d7600 T ral_cardbus_setup +ffffffff825d76c0 T ral_cardbus_wakeup +ffffffff825d8000 T acx_cardbus_match +ffffffff825d8030 T acx_cardbus_attach +ffffffff825d82b0 T acx_cardbus_detach +ffffffff825d8400 T acx_cardbus_enable +ffffffff825d8510 T acx_cardbus_disable +ffffffff825d8570 T acx_cardbus_power +ffffffff825d85b0 T acx_cardbus_setup +ffffffff825d9000 T pgt_cardbus_match +ffffffff825d9030 T pgt_cardbus_attach +ffffffff825d9290 T pgt_cardbus_detach +ffffffff825d9350 T pgt_cardbus_enable +ffffffff825d9500 T pgt_cardbus_disable +ffffffff825d9560 T pgt_cardbus_power +ffffffff825d95c0 T pgt_cardbus_setup +ffffffff825da000 T ehci_cardbus_match +ffffffff825da040 T ehci_cardbus_attach +ffffffff825da360 T ehci_cardbus_detach +ffffffff825db000 T ohci_cardbus_match +ffffffff825db040 T ohci_cardbus_attach +ffffffff825db360 T ohci_cardbus_detach +ffffffff825dc000 T uhci_cardbus_match +ffffffff825dc040 T uhci_cardbus_attach +ffffffff825dc3d0 T uhci_cardbus_detach +ffffffff825dd000 T malo_cardbus_match +ffffffff825dd030 T malo_cardbus_attach +ffffffff825dd2f0 T malo_cardbus_detach +ffffffff825dd3e0 T malo_cardbus_enable +ffffffff825dd5b0 T malo_cardbus_disable +ffffffff825dd610 T malo_cardbus_setup +ffffffff825de000 T bwi_cardbus_match +ffffffff825de030 T bwi_cardbus_attach +ffffffff825de310 T bwi_cardbus_detach +ffffffff825de3d0 T bwi_cardbus_enable +ffffffff825de580 T bwi_cardbus_disable +ffffffff825de5e0 T bwi_cardbus_setup +ffffffff825de6a0 T bwi_cardbus_conf_read +ffffffff825de6d0 T bwi_cardbus_conf_write +ffffffff825df000 T rbus_pccbb_parent_mem +ffffffff825df060 T rbus_pccbb_parent_io +ffffffff825df0d0 T pccbb_attach_hook +ffffffff825e0000 T pcmcia_match +ffffffff825e0060 T pcmcia_attach +ffffffff825e00f0 T pcmcia_activate +ffffffff825e01c0 T pcmcia_ccr_read +ffffffff825e0220 T pcmcia_ccr_write +ffffffff825e0290 T pcmcia_card_attach +ffffffff825e04c0 T pcmcia_print +ffffffff825e0790 T pcmcia_submatch +ffffffff825e07e0 T pcmcia_card_detach +ffffffff825e08a0 T pcmcia_card_deactivate +ffffffff825e0910 T pcmcia_card_gettype +ffffffff825e0970 T pcmcia_function_init +ffffffff825e09d0 T pcmcia_function_enable +ffffffff825e0e50 T pcmcia_function_disable +ffffffff825e0f80 T pcmcia_io_map +ffffffff825e11f0 T pcmcia_intr_establish +ffffffff825e14b0 T pcmcia_card_intr +ffffffff825e15f0 T pcmcia_intr_disestablish +ffffffff825e1840 T pcmcia_intr_string +ffffffff825e2000 T pcmcia_cis_read_1 +ffffffff825e2120 T pcmcia_read_cis +ffffffff825e2220 T pcmcia_scan_cis +ffffffff825e4270 T pcmcia_parse_cis_tuple +ffffffff825e5690 T pcmcia_print_cis +ffffffff825e6000 T pcmcia_check_cis_quirks +ffffffff825e7000 T ep_pcmcia_match +ffffffff825e7110 T ep_pcmcia_attach +ffffffff825e75b0 T ep_pcmcia_detach +ffffffff825e7660 T ep_pcmcia_activate +ffffffff825e7760 T ep_pcmcia_lookup +ffffffff825e7870 T ep_pcmcia_enable1 +ffffffff825e7930 T ep_pcmcia_get_enaddr +ffffffff825e8000 T ne_pcmcia_match +ffffffff825e8150 T ne_pcmcia_attach +ffffffff825e8850 T ne_pcmcia_detach +ffffffff825e8930 T ne_pcmcia_activate +ffffffff825e8a50 T ne_pcmcia_get_enaddr +ffffffff825e8c80 T ne_pcmcia_dl10019_get_enaddr +ffffffff825e8f40 T ne_pcmcia_ax88190_set_iobase +ffffffff825ea000 T aic_pcmcia_match +ffffffff825ea0b0 T aic_pcmcia_attach +ffffffff825ea300 T aic_pcmcia_detach +ffffffff825eb000 T com_pcmcia_match +ffffffff825eb270 T com_pcmcia_attach +ffffffff825eb5c0 T com_pcmcia_detach +ffffffff825eb670 T com_pcmcia_activate +ffffffff825eb750 T com_pcmcia_enable1 +ffffffff825eb810 T com_pcmcia_enable +ffffffff825eb930 T com_pcmcia_disable +ffffffff825eb970 T com_pcmcia_disable1 +ffffffff825ec000 t wdc_pcmcia_match +ffffffff825ec0f0 t wdc_pcmcia_attach +ffffffff825ec630 T wdc_pcmcia_detach +ffffffff825ec750 T wdc_pcmcia_activate +ffffffff825ec890 T wdc_pcmcia_disk_device_interface_callback +ffffffff825ec940 T wdc_pcmcia_disk_device_interface +ffffffff825ec9b0 T wdc_pcmcia_lookup +ffffffff825ed000 T sm_pcmcia_match +ffffffff825ed100 T sm_pcmcia_attach +ffffffff825ed370 T sm_pcmcia_detach +ffffffff825ed430 T sm_pcmcia_activate +ffffffff825ed4d0 T sm_pcmcia_funce_enaddr +ffffffff825ed4f0 T sm_pcmcia_ascii_enaddr +ffffffff825ed600 T sm_pcmcia_lannid_ciscallback +ffffffff825ed760 T sm_pcmcia_enable +ffffffff825ed810 T sm_pcmcia_disable +ffffffff825ee000 T xe_pcmcia_match +ffffffff825ee050 T xe_pcmcia_attach +ffffffff825ee730 T xe_pcmcia_detach +ffffffff825ee830 T xe_pcmcia_activate +ffffffff825eebc0 T xe_pcmcia_interpret_manfid +ffffffff825eec80 T xe_pcmcia_funce_enaddr +ffffffff825eeca0 T xe_ioctl +ffffffff825ef090 T xe_start +ffffffff825ef3a0 T xe_watchdog +ffffffff825ef3f0 T xe_intr +ffffffff825ef830 T xe_full_reset +ffffffff825eff80 T xe_mdi_read +ffffffff825f0bd0 T xe_mdi_write +ffffffff825f1780 T xe_statchg +ffffffff825f17b0 T xe_mediachange +ffffffff825f1850 T xe_mediastatus +ffffffff825f18c0 T xe_init +ffffffff825f1930 T xe_stop +ffffffff825f1aa0 T xe_reset +ffffffff825f1c80 T xe_pcmcia_lan_nid_ciscallback +ffffffff825f1e30 T xe_pcmcia_manfid_ciscallback +ffffffff825f1f60 T xe_get +ffffffff825f2270 T xe_set_address +ffffffff825f2590 T xe_cycle_power +ffffffff825f3000 T wi_pcmcia_match +ffffffff825f3140 T wi_pcmcia_attach +ffffffff825f3480 T wi_pcmcia_detach +ffffffff825f3560 T wi_pcmcia_activate +ffffffff825f3680 T wi_pcmcia_wakeup +ffffffff825f4000 T malo_pcmcia_match +ffffffff825f4050 T malo_pcmcia_attach +ffffffff825f4280 T malo_pcmcia_detach +ffffffff825f4320 T malo_pcmcia_activate +ffffffff825f4610 T cmalo_intr +ffffffff825f48d0 T cmalo_attach +ffffffff825f4f00 T cmalo_detach +ffffffff825f5000 T cmalo_stop +ffffffff825f5180 T malo_pcmcia_wakeup +ffffffff825f5240 T cmalo_init +ffffffff825f5610 T cmalo_intr_mask +ffffffff825f56b0 T cmalo_fw_alloc +ffffffff825f57a0 T cmalo_fw_load_helper +ffffffff825f5a60 T cmalo_fw_load_main +ffffffff825f5fd0 T cmalo_cmd_get_hwspec +ffffffff825f6160 T cmalo_ioctl +ffffffff825f6610 T cmalo_start +ffffffff825f66b0 T cmalo_watchdog +ffffffff825f66e0 T cmalo_newstate +ffffffff825f6a10 T cmalo_media_change +ffffffff825f6a80 T cmalo_cmd_set_scan +ffffffff825f6c70 T cmalo_fw_free +ffffffff825f6d00 T cmalo_cmd_set_macctrl +ffffffff825f6ea0 T cmalo_cmd_set_txpower +ffffffff825f7030 T cmalo_cmd_set_antenna +ffffffff825f71d0 T cmalo_cmd_set_radio +ffffffff825f7370 T cmalo_cmd_set_channel +ffffffff825f7500 T cmalo_cmd_set_rate +ffffffff825f7750 T cmalo_cmd_set_snmp +ffffffff825f7910 T cmalo_cmd_set_macaddr +ffffffff825f7ac0 T cmalo_wep +ffffffff825f7b70 T cmalo_cmd_set_reset +ffffffff825f7cb0 T cmalo_select_network +ffffffff825f7e00 T cmalo_cmd_set_auth +ffffffff825f7ee0 T cmalo_cmd_set_assoc +ffffffff825f82c0 T cmalo_reflect_network +ffffffff825f83d0 T cmalo_tx_done +ffffffff825f8490 T cmalo_rx +ffffffff825f86e0 T cmalo_cmd_response +ffffffff825f8970 T cmalo_event +ffffffff825f89f0 T cmalo_tx +ffffffff825f8c40 T cmalo_cmd_set_wep +ffffffff825f8ef0 T cmalo_rate2bitmap +ffffffff825f8f30 T cmalo_hexdump +ffffffff825f8f60 T cmalo_cmd_request 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aapic_match +ffffffff825fe040 T aapic_attach +ffffffff825ff000 T hme_config +ffffffff825ff5a0 T hme_stop +ffffffff825ff840 T hme_start +ffffffff825ffbd0 T hme_ioctl +ffffffff825ffdc0 T hme_watchdog +ffffffff825ffe30 t hme_mii_readreg +ffffffff82600000 t hme_mii_writereg +ffffffff826001d0 t hme_mii_statchg +ffffffff82600270 T hme_mediachange +ffffffff82600390 T hme_mediastatus +ffffffff82600410 T hme_mifinit +ffffffff826004f0 T hme_tick +ffffffff82600680 T hme_unconfig +ffffffff826007b0 T hme_fill_rx_ring +ffffffff82600960 T hme_reset +ffffffff826009b0 T hme_init +ffffffff82601000 T hme_meminit +ffffffff82601160 T hme_iff +ffffffff82601340 T hme_tint +ffffffff826014b0 T hme_rint +ffffffff826016b0 T hme_eint +ffffffff82601760 T hme_intr +ffffffff82601880 T hme_newbuf +ffffffff82602000 T hmematch_pci +ffffffff82602040 T hmeattach_pci +ffffffff82602390 T hmedetach_pci +ffffffff82602430 T hme_pci_enaddr +ffffffff82603000 T isamatch +ffffffff82603060 T isaattach +ffffffff826031d0 T isascan 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fdcresult +ffffffff82606840 T fdcstart +ffffffff82606870 T fdcstatus +ffffffff82607000 T fdprobe +ffffffff826071d0 T fdattach +ffffffff82607340 T fdactivate +ffffffff82607400 T fdgetdisklabel +ffffffff82607540 T fdstrategy +ffffffff826077c0 T fd_motor_on +ffffffff82607830 T fd_motor_off +ffffffff82607920 T fdtimeout +ffffffff826079b0 T fd_nvtotype +ffffffff82607a30 T fdstart +ffffffff82607af0 T fdfinish +ffffffff82607c50 T fdread +ffffffff82607c80 T fdwrite +ffffffff82607cb0 T fd_set_motor +ffffffff82607d70 T fdintr +ffffffff82608cc0 T fdopen +ffffffff82608f30 T fdclose +ffffffff82608fc0 T fdsize +ffffffff82608ff0 T fddump +ffffffff82609020 T fdretry +ffffffff826091e0 T fdioctl +ffffffff82609720 T fdformat +ffffffff8260a000 T com_isa_probe +ffffffff8260a0e0 T com_isa_attach +ffffffff8260b000 T pckbc_isa_match +ffffffff8260b230 T pckbc_isa_attach +ffffffff8260b430 T pckbc_isa_activate +ffffffff8260c000 T vga_isa_match +ffffffff8260c100 T vga_isa_attach +ffffffff8260c150 T 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wsdisplay_burner_setup +ffffffff826202b0 T wsdisplay_switch +ffffffff82620500 T wsmoused +ffffffff82620620 T wsdisplaymmap +ffffffff826206a0 T wsdisplaykqfilter +ffffffff82620700 T mouse_remove +ffffffff826207d0 T wsdisplaystop +ffffffff82620850 T wsdisplay_emulbell +ffffffff826208a0 T wsdisplay_emulinput +ffffffff82620940 T wsdisplay_kbdinput +ffffffff82620a60 T wsdisplay_rawkbdinput +ffffffff82620b00 T wsdisplay_switch3 +ffffffff82620d10 T wsdisplay_switch1 +ffffffff82620ea0 T wsdisplay_switch2 +ffffffff82621090 T wsdisplay_reset +ffffffff82621100 T wsscreen_attach_sync +ffffffff82621180 T wsscreen_detach_sync +ffffffff826211c0 T wsscreen_lookup_sync +ffffffff82621210 T wsdisplay_maxscreenidx +ffffffff82621240 T wsdisplay_screenstate +ffffffff82621290 T wsdisplay_getactivescreen +ffffffff826212d0 T wsscreen_switchwait +ffffffff82621410 T wsdisplay_kbdholdscreen +ffffffff82621480 T wsdisplay_set_console_kbd +ffffffff826214f0 T wsdisplay_set_cons_kbd +ffffffff82621530 T wsdisplay_unset_cons_kbd +ffffffff82621580 T wsdisplay_enter_ddb +ffffffff82621610 T wsdisplay_suspend +ffffffff82621690 T wsdisplay_suspend_device +ffffffff826218f0 T wsdisplay_resume +ffffffff826219f0 T wsdisplay_resume_device +ffffffff82621ab0 T wsscrollback +ffffffff82621b30 T wsdisplay_get_param +ffffffff82621c80 T wsdisplay_set_param +ffffffff82621d90 T wsdisplay_brightness_step +ffffffff82621f40 T wsdisplay_brightness_zero +ffffffff82622070 T wsdisplay_brightness_cycle +ffffffff826220f0 T motion_event +ffffffff826221b0 T button_event +ffffffff82622370 T ctrl_event +ffffffff82622590 T mouse_moverel +ffffffff826226f0 T mouse_zaxis +ffffffff82622780 T mouse_copy_end +ffffffff826227f0 T mouse_copy_selection +ffffffff82622940 T mouse_copy_start +ffffffff82622ad0 T mouse_copy_word +ffffffff82622ef0 T mouse_copy_line +ffffffff82623070 T mouse_paste +ffffffff82623120 T mouse_copy_extend_after +ffffffff82623240 T mouse_copy_extend +ffffffff826232e0 T inverse_char +ffffffff82623400 T inverse_region +ffffffff82623480 T skip_spc_right +ffffffff82623570 T skip_spc_left +ffffffff82623640 T skip_char_right +ffffffff82623740 T skip_char_left +ffffffff82623850 T class_cmp +ffffffff82623930 T remove_selection +ffffffff826239e0 T mouse_copy_extend_char +ffffffff82623d90 T mouse_copy_extend_word +ffffffff82624570 T mouse_copy_extend_line +ffffffff82624850 T mouse_hide +ffffffff82625000 T usl_sync_init +ffffffff82625170 T usl_attachtimeout +ffffffff826251e0 T usl_detachtimeout +ffffffff82625250 T usl_sync_done +ffffffff826252f0 T usl_sync_check +ffffffff826253f0 T usl_sync_get +ffffffff82625450 T usl_detachproc +ffffffff82625500 T usl_detachack +ffffffff82625590 T usl_attachproc +ffffffff82625640 T usl_attachack +ffffffff826256d0 T wsdisplay_usl_ioctl1 +ffffffff826258d0 T wsdisplay_usl_ioctl2 +ffffffff82626000 T filt_wseventdetach +ffffffff82626060 T filt_wseventread +ffffffff826260c0 T wsevent_init +ffffffff82626170 T wsevent_fini +ffffffff826261f0 T wsevent_read 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usb_match +ffffffff82659030 T usb_attach +ffffffff826593b0 T usb_detach +ffffffff82659480 T usb_activate +ffffffff826595d0 T usb_create_task_threads +ffffffff82659680 T usb_explore +ffffffff82659850 T usb_attach_roothub +ffffffff82659900 T usb_needs_explore +ffffffff82659950 T usb_detach_roothub +ffffffff82659a50 T usb_wait_task +ffffffff82659b00 T usb_abort_task_thread +ffffffff82659c40 T usb_task_thread +ffffffff82659db0 T usb_add_task +ffffffff82659e90 T usb_rem_task +ffffffff82659f50 T usb_rem_wait_task +ffffffff8265a080 T usbctlprint +ffffffff8265a0d0 T usbopen +ffffffff8265a140 T usbclose +ffffffff8265a170 T usb_fill_udc_task +ffffffff8265a220 T usb_fill_udf_task +ffffffff8265a2a0 T usbioctl +ffffffff8265a9a0 T usb_needs_reattach +ffffffff8265a9f0 T usb_schedsoftintr +ffffffff8265aad0 T usb_tap +ffffffff8265b000 T usbd_is_dying +ffffffff8265b040 T usbd_deactivate +ffffffff8265b070 T usbd_ref_incr +ffffffff8265b0a0 T usbd_ref_decr +ffffffff8265b0e0 T usbd_ref_wait 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domain_map_page_intel +ffffffff827d99d0 T iommu_flush_cache +ffffffff827d9a20 T iommu_alloc_page +ffffffff827d9ad0 T pte_lvl +ffffffff827d9c00 T domain_map_page_amd +ffffffff827d9ce0 T domain_unload_map +ffffffff827d9f30 T dom_bdf +ffffffff827da010 T domain_load_map +ffffffff827da290 T iommu_enable_translation +ffffffff827da5e0 T iommu_flush_tlb +ffffffff827da770 T iommu_flush_write_buffer +ffffffff827da940 T iommu_set_rtaddr +ffffffff827daac0 T iommu_write_8 +ffffffff827daaf0 T iommu_write_4 +ffffffff827dab20 T iommu_read_4 +ffffffff827dab40 T iommu_alloc_hwdte +ffffffff827dacb0 T iommu_issue_qi +ffffffff827dace0 T iommu_flush_tlb_qi +ffffffff827dad10 T iommu_flush_ctx_qi +ffffffff827dad40 T ivhd_invalidate_domain +ffffffff827dadb0 T iommu_read_8 +ffffffff827dadd0 T iommu_flush_ctx +ffffffff827daf00 T iommu_enable_qi +ffffffff827db050 T iommu_showcfg +ffffffff827db2b0 T iommu_init +ffffffff827db680 T acpidmar_intr_establish +ffffffff827db7a0 T acpidmar_intr +ffffffff827db970 T acpidmar_match_devscope +ffffffff827dbad0 T domain_create +ffffffff827dbd50 t dmar_dmamap_create +ffffffff827dbd70 t dmar_dmamap_destroy +ffffffff827dbd80 t dmar_dmamap_load +ffffffff827dbdf0 t dmar_dmamap_load_mbuf +ffffffff827dbe60 t dmar_dmamap_load_uio +ffffffff827dbed0 t dmar_dmamap_load_raw +ffffffff827dbf40 t dmar_dmamap_unload +ffffffff827dbf80 t dmar_dmamap_sync +ffffffff827dbfa0 t dmar_dmamem_alloc +ffffffff827dbfc0 t dmar_dmamem_free +ffffffff827dbfe0 t dmar_dmamem_map +ffffffff827dc000 t dmar_dmamem_unmap +ffffffff827dc020 t dmar_dmamem_mmap +ffffffff827dc040 T domain_add_device +ffffffff827dc0d0 T domain_remove_device +ffffffff827dc190 T domain_lookup +ffffffff827dc390 T _iommu_map +ffffffff827dc460 T _iommu_domain +ffffffff827dc4d0 T domain_map_device +ffffffff827dc820 T ivhd_flush_devtab +ffffffff827dc880 T acpidmar_pci_hook +ffffffff827dca80 T acpidmar_parse_devscope +ffffffff827dcbb0 T acpidmar_drhd +ffffffff827dcda0 T acpidmar_rmrr +ffffffff827dd060 T acpidmar_atsr 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thinkpad_volume_up +ffffffff827e76a0 T thinkpad_get_thinklight +ffffffff827e76f0 T thinkpad_adaptive_change +ffffffff827e7820 T thinkpad_get_brightness +ffffffff827e7860 T thinkpad_toggle_wan +ffffffff827e7990 T thinkpad_cmos +ffffffff827e7a50 T thinkpad_set_brightness +ffffffff827e7b50 T thinkpad_set_thinklight +ffffffff827e7c10 T thinkpad_battery_inhibit_charge +ffffffff827e7d50 T thinkpad_battery_force_discharge +ffffffff827e8000 T toshiba_match +ffffffff827e80b0 T toshiba_attach +ffffffff827e81b0 T get_param_brightness +ffffffff827e8210 T acpitoshiba_get_param +ffffffff827e8270 T set_param_brightness +ffffffff827e8310 T toshiba_update_brightness +ffffffff827e8420 T acpitoshiba_set_param +ffffffff827e84c0 T toshiba_set_brightness +ffffffff827e8600 T toshiba_enable_events +ffffffff827e86a0 T toshiba_read_events +ffffffff827e8820 T toshiba_hotkey +ffffffff827e8ab0 T toshiba_get_brightness +ffffffff827e8c40 T toshiba_fn_key_brightness_up +ffffffff827e8db0 T toshiba_fn_key_brightness_down +ffffffff827e8f20 T toshiba_fn_key_video_output +ffffffff827e9090 T toshiba_get_video_output +ffffffff827e9220 T toshiba_set_video_output +ffffffff827ea000 T acpisony_match +ffffffff827ea070 T acpisony_attach +ffffffff827ea0f0 T acpisony_activate +ffffffff827ea140 T acpisony_notify_setup +ffffffff827ea380 T acpisony_notify +ffffffff827ea7b0 T acpisony_find_offset +ffffffff827ea8e0 T acpisony_set_hotkey +ffffffff827eab00 T acpisony_brightness_down +ffffffff827eac40 T acpisony_get_brightness +ffffffff827eace0 T acpisony_set_brightness +ffffffff827eb000 T acpivideo_match +ffffffff827eb070 T acpivideo_attach +ffffffff827eb1f0 T acpivideo_getpcibus +ffffffff827eb230 T acpivideo_notify +ffffffff827eb2a0 T acpivideo_set_policy +ffffffff827eb380 T acpi_foundvout +ffffffff827eb460 T acpivideo_print +ffffffff827ec000 T acpivout_match +ffffffff827ec070 T acpivout_attach +ffffffff827ec200 T acpivout_notify +ffffffff827ec2e0 T acpivout_get_bcl +ffffffff827ec440 T acpivout_get_brightness +ffffffff827ec500 T acpivout_get_param +ffffffff827ec5a0 T acpivout_set_param +ffffffff827ec710 T acpivout_select_brightness +ffffffff827ec7e0 T acpivout_find_brightness +ffffffff827ec870 T acpivout_set_brightness +ffffffff827ed000 T acpipwrres_match +ffffffff827ed070 T acpipwrres_attach +ffffffff827ed310 T acpipwrres_foundcons +ffffffff827ed4d0 T acpipwrres_ref_incr +ffffffff827ed580 T acpipwrres_hascons +ffffffff827ed5d0 T acpipwrres_ref_decr +ffffffff827ed670 T acpipwrres_addcons +ffffffff827ee000 T aibs_match +ffffffff827ee030 T aibs_attach +ffffffff827ee190 T aibs_probe +ffffffff827ee320 T aibs_attach_new +ffffffff827ee450 T aibs_attach_sif +ffffffff827ee630 T aibs_notify +ffffffff827ee6a0 T aibs_add_sensor +ffffffff827ee940 T aibs_getpack +ffffffff827ee9d0 T aibs_refresh +ffffffff827eea40 T aibs_refresh_r +ffffffff827eeb90 T aibs_getvalue +ffffffff827eecf0 T aibs_find_cb +ffffffff827ef000 T aplgpio_match +ffffffff827ef060 T aplgpio_attach +ffffffff827ef390 T aplgpio_intr +ffffffff827ef500 T aplgpio_read_pin +ffffffff827ef560 T aplgpio_write_pin +ffffffff827ef5e0 T aplgpio_intr_establish +ffffffff827ef720 T aplgpio_intr_enable +ffffffff827ef7b0 T aplgpio_intr_disable +ffffffff827f0000 T bytgpio_match +ffffffff827f0060 T bytgpio_attach +ffffffff827f03a0 T bytgpio_intr +ffffffff827f04f0 T bytgpio_read_pin +ffffffff827f0560 T bytgpio_write_pin +ffffffff827f05f0 T bytgpio_intr_establish +ffffffff827f0670 T bytgpio_intr_enable +ffffffff827f0760 T bytgpio_intr_disable +ffffffff827f1000 T chvgpio_match +ffffffff827f1060 T chvgpio_attach +ffffffff827f1380 T chvgpio_intr +ffffffff827f1470 T chvgpio_read_pin +ffffffff827f1520 T chvgpio_write_pin +ffffffff827f15f0 T chvgpio_intr_establish +ffffffff827f17e0 T chvgpio_intr_enable +ffffffff827f18c0 T chvgpio_intr_disable +ffffffff827f19a0 T chvgpio_opreg_handler +ffffffff827f1a40 T chvgpio_check_pin +ffffffff827f2000 T glkgpio_match +ffffffff827f2060 T glkgpio_attach +ffffffff827f2390 T glkgpio_intr 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tipmic_write_pin +ffffffff827f56f0 T tipmic_thermal_opreg_handler +ffffffff827f6120 T tipmic_power_opreg_handler +ffffffff827f6400 T tipmic_read_1 +ffffffff827f64f0 T tipmic_raw_to_temp +ffffffff827f7000 T ccpmic_match +ffffffff827f7060 T ccpmic_attach +ffffffff827f7160 T ccpmic_get_lpat +ffffffff827f7290 T ccpmic_read_pin +ffffffff827f7450 T ccpmic_write_pin +ffffffff827f75f0 T ccpmic_thermal_opreg_handler +ffffffff827f7890 T ccpmic_power_opreg_handler +ffffffff827f7ad0 T ccpmic_read_1 +ffffffff827f7bc0 T ccpmic_write_1 +ffffffff827f7ca0 T ccpmic_raw_to_temp +ffffffff827f8000 T com_acpi_match +ffffffff827f8150 T com_acpi_attach +ffffffff827f8440 T com_acpi_is_designware +ffffffff827f84c0 T com_acpi_intr_designware +ffffffff827f8500 T com_acpi_is_console +ffffffff827f9000 T sdhc_acpi_match +ffffffff827f9060 T sdhc_acpi_attach +ffffffff827f9400 T sdhc_acpi_parse_resources +ffffffff827f94b0 T sdhc_acpi_card_detect_gpio +ffffffff827f9510 T sdhc_acpi_card_detect_intr +ffffffff827f9560 T sdhc_acpi_power_on +ffffffff827f95f0 T sdhc_acpi_explore +ffffffff827f9620 T sdhc_acpi_card_detect_nonremovable +ffffffff827f9650 T sdhc_acpi_do_explore +ffffffff827fa000 T dwiic_acpi_match +ffffffff827fa050 T dwiic_acpi_attach +ffffffff827fa4f0 T dwiic_acpi_parse_crs +ffffffff827fa650 T dwiic_acpi_power +ffffffff827fa780 T dwiic_acpi_get_params +ffffffff827fa900 T dwiic_i2c_intr_establish +ffffffff827fa990 T dwiic_i2c_intr_disestablish +ffffffff827fa9b0 T dwiic_i2c_intr_string +ffffffff827faa40 T dwiic_acpi_acquire_bus +ffffffff827faaa0 T dwiic_acpi_release_bus +ffffffff827faae0 T dwiic_acpi_bus_scan +ffffffff827fab20 T dwiic_acpi_found_hid +ffffffff827faf10 T dwiic_matchhids +ffffffff827fafa0 T dwiic_acpi_found_ihidev +ffffffff827fb280 T dwiic_acpi_found_iatp +ffffffff827fb400 T dwiic_acpi_found_ietp +ffffffff827fc000 T acpicbkbd_match +ffffffff827fc030 T acpicbkbd_attach +ffffffff827fc0e0 T acpicbkbd_activate +ffffffff827fc140 T acpicbkbd_get_backlight +ffffffff827fc1c0 T acpicbkbd_set_backlight +ffffffff827fc270 T acpicbkbd_write_backlight +ffffffff827fd000 T acpials_match +ffffffff827fd090 T acpials_attach +ffffffff827fd280 T acpials_read +ffffffff827fd310 T acpials_addtask +ffffffff827fd350 T acpials_notify +ffffffff827fd3e0 T acpials_update +ffffffff827fe000 T tpm_match +ffffffff827fe050 T tpm_attach +ffffffff827fe3a0 T tpm_activate +ffffffff827fe3f0 T tpm2_start_method +ffffffff827fe480 T tpm_probe +ffffffff827fe570 T tpm_init_tis +ffffffff827fe840 T tpm_init_crb +ffffffff827fec30 T tpm_suspend +ffffffff827fed60 T tpm_resume +ffffffff827fed90 T tpm_write_tis +ffffffff827ff1e0 T tpm_read_tis +ffffffff827ff3f0 T tpm_write_crb +ffffffff827ff8c0 T tpm_read_crb +ffffffff827ffc60 T tpm_request_locality_tis +ffffffff827ffd80 T tpm_request_locality_crb +ffffffff827ffec0 T tpm_release_locality_crb +ffffffff827fff20 T tpm_release_locality_tis +ffffffff827fff90 T tpm_getburst +ffffffff82800050 T tpm_status +ffffffff82800070 T tpm_waitfor +ffffffff82800160 T tpm_waitfor_status +ffffffff82801000 T acpihve_match +ffffffff828010d0 T acpihve_attach +ffffffff82802000 T acpisbs_match +ffffffff82802030 T acpisbs_attach +ffffffff82802320 T acpisbs_activate +ffffffff82802410 T acpisbs_read +ffffffff828024e0 T acpisbs_setup_sensors +ffffffff82802610 T acpisbs_refresh_sensors +ffffffff82802760 T acpisbs_notify +ffffffff828028c0 T acpi_smbus_read +ffffffff82803000 T surface_match +ffffffff82803060 T surface_attach +ffffffff828030c0 T surface_hotkey +ffffffff82804000 T ipmi_acpi_match +ffffffff82804030 T ipmi_acpi_attach +ffffffff828042b0 T ipmi_acpi_parse_crs +ffffffff82805000 T amdgpio_match +ffffffff82805060 T amdgpio_attach +ffffffff82805330 T amdgpio_activate +ffffffff82805430 T amdgpio_intr +ffffffff82805610 T amdgpio_read_pin +ffffffff82805670 T amdgpio_write_pin +ffffffff828056f0 T amdgpio_intr_establish +ffffffff828057f0 T amdgpio_intr_enable +ffffffff82805880 T amdgpio_intr_disable +ffffffff82805910 T amdgpio_save +ffffffff828059a0 T amdgpio_restore +ffffffff82805a40 T amdgpio_save_pin +ffffffff82805ab0 T amdgpio_restore_pin +ffffffff82805b20 T amdgpio_pin_intr +ffffffff82806000 T acpihid_match +ffffffff82806030 T acpihid_attach +ffffffff82806270 T acpihid_init_dsm +ffffffff82806400 T acpihid_eval +ffffffff82806650 T acpihid_notify +ffffffff828066c0 T acpihid_button_array_enable +ffffffff82807000 t iosf_acpi_match +ffffffff82807050 t iosf_acpi_attach +ffffffff82807170 t iosf_acpi_mbi_mdr_rd +ffffffff828071f0 t iosf_acpi_mbi_mdr_wr +ffffffff82808000 T intelpmc_match +ffffffff82808030 T intelpmc_attach +ffffffff82808110 T intelpmc_activate +ffffffff82808320 T intelpmc_parse_lpit +ffffffff82808490 T intelpmc_suspend +ffffffff82808840 T intelpmc_resume +ffffffff82808bf0 T intelpmc_dsm +ffffffff82809000 T acpi_match +ffffffff82809070 T acpi_attach +ffffffff828090b0 T acpi_probe +ffffffff828092a0 T acpi_map +ffffffff828093b0 T acpi_unmap +ffffffff82809400 T acpi_bus_space_map +ffffffff82809420 T acpi_bus_space_unmap +ffffffff82809440 T acpi_intr_establish +ffffffff828095a0 T acpi_intr_disestablish +ffffffff828095b0 T acpi_scan +ffffffff82809780 T acpi_acquire_glk +ffffffff828097e0 T acpi_release_glk +ffffffff82809830 T acpi_attach_machdep +ffffffff82809a10 T acpi_sleep_cpu +ffffffff82809bd0 T acpi_resume_cpu +ffffffff82809d20 T sleep_mp +ffffffff82809e20 T resume_mp +ffffffff82809f20 T acpi_iommu_device_map +ffffffff8280a000 T hibernate_resume_machdep +ffffffff8280a050 T hibernate_drop_to_real_mode +ffffffff8280a060 T hibernate_activate_resume_pt_machdep +ffffffff8280a0a0 T hibernate_switch_stack_machdep +ffffffff8280a0e0 T hibernate_flush +ffffffff8280a110 T acpi_savecpu +ffffffff8280b000 T sleep_showstate +ffffffff8280b110 T sleep_setstate +ffffffff8280b170 T gosleep +ffffffff8280b340 T sleep_resume +ffffffff8280b3d0 T suspend_finish +ffffffff8280c000 T acpiopen +ffffffff8280c0d0 T acpiclose +ffffffff8280c170 T acpiioctl +ffffffff8280c300 T request_sleep +ffffffff8280c390 T acpi_filtdetach +ffffffff8280c3f0 T acpi_filtread +ffffffff8280c430 T acpikqfilter +ffffffff8280d000 T acpipci_match +ffffffff8280d030 T acpipci_attach +ffffffff8280d370 T acpipci_osc +ffffffff8280d4e0 T acpipci_parse_resources +ffffffff8280d610 T acpipci_attach_bus +ffffffff8280d850 T acpipci_print +ffffffff8280d8d0 T acpipci_attach_busses +ffffffff8280e000 T efiopen +ffffffff8280e040 T eficlose +ffffffff8280e070 T efiioctl +ffffffff8280e110 T efiioc_get_table +ffffffff8280e280 T efiioc_var_get +ffffffff8280e530 T efiioc_var_next +ffffffff8280e760 T efiioc_var_set +ffffffff8280ea10 T efi_adapt_error +ffffffff8280f000 T efi_match +ffffffff8280f070 T efi_attach +ffffffff8280f390 T efi_map_runtime +ffffffff8280f520 T efi_enter +ffffffff8280f5d0 T efi_leave +ffffffff8280f660 T efi_fault +ffffffff82810000 T vmm_probe +ffffffff82810060 T vmm_attach +ffffffff828101b0 T vmm_activate +ffffffff82810340 T vmmopen +ffffffff82810390 T vmmclose +ffffffff828103c0 T vm_find +ffffffff82810500 T vmmioctl +ffffffff82810840 T vm_create +ffffffff82810bb0 T vm_get_info +ffffffff82810e60 T vm_terminate +ffffffff82811010 T vm_resetcpu +ffffffff82811140 T vm_share_mem +ffffffff828112b0 T pledge_ioctl_vmm +ffffffff828113a0 T vm_find_vcpu +ffffffff82811400 T vm_create_check_mem_ranges +ffffffff828115c0 T vm_teardown +ffffffff82811740 T vcpu_must_stop +ffffffff82812000 T vmm_enabled +ffffffff82812080 T vmm_attach_machdep +ffffffff82812260 T vmm_quiesce_vmx +ffffffff82812470 T vmm_activate_machdep +ffffffff82812510 T vmm_stop +ffffffff82812680 T vmm_start +ffffffff828127a0 T vmmioctl_machdep +ffffffff82812880 T vm_intr_pending +ffffffff82812940 T pledge_ioctl_vmm_machdep +ffffffff82812980 T vm_rwvmparams +ffffffff82812b30 T vmm_init_pvclock +ffffffff82812c10 T vm_rwregs +ffffffff82812d50 T vcpu_readregs_vmx +ffffffff82813230 T vcpu_writeregs_vmx +ffffffff82813770 T vcpu_readregs_svm +ffffffff82813c20 T vcpu_writeregs_svm +ffffffff828140f0 T vmx_pmap_find_pte_ept +ffffffff828141c0 T start_vmm_on_cpu +ffffffff82814300 T stop_vmm_on_cpu +ffffffff828143a0 T vmclear_on_cpu +ffffffff82814420 T vm_impl_init +ffffffff828145b0 T vm_impl_deinit +ffffffff828145e0 T vcpu_reload_vmcs_vmx +ffffffff82814760 T vcpu_reset_regs_svm +ffffffff82814a30 T svm_setmsrbrw +ffffffff82814b40 T svm_setmsrbr +ffffffff82814c10 T svm_setmsrbw +ffffffff82814cf0 T vmx_setmsrbr +ffffffff82814da0 T vmx_setmsrbw +ffffffff82814e50 T vmx_setmsrbrw +ffffffff82814f60 T svm_set_clean +ffffffff82814fb0 T svm_set_dirty +ffffffff82815000 T vcpu_reset_regs_vmx +ffffffff82815a70 T vcpu_vmx_check_cap +ffffffff82815b70 T vcpu_vmx_compute_ctrl +ffffffff82815d50 T vcpu_init_vmx +ffffffff82816260 T vmm_alloc_vpid +ffffffff82816380 T vcpu_deinit_vmx +ffffffff828164b0 T vcpu_reset_regs +ffffffff82816530 T vcpu_init_svm +ffffffff82816840 T vcpu_deinit_svm +ffffffff828169b0 T vcpu_init +ffffffff82816a80 T vmm_free_vpid +ffffffff82816af0 T vcpu_deinit +ffffffff82816b30 T vm_run +ffffffff82816d30 T vcpu_run_vmx +ffffffff82817810 T vcpu_run_svm +ffffffff82817ee0 T vmm_fpurestore +ffffffff82817fb0 T vmm_fpusave +ffffffff82818040 T vmm_translate_gva +ffffffff82818370 T vmm_update_pvclock +ffffffff82818480 T vmx_get_exit_info +ffffffff82818500 T vmx_handle_exit +ffffffff82818970 T vmx_instruction_error_decode +ffffffff82818b40 T vmm_get_guest_cpu_cpl +ffffffff82818c60 T vmx_handle_intr +ffffffff82818d00 T svm_handle_hlt +ffffffff82818d50 T vmx_handle_hlt +ffffffff82818e20 T svm_handle_exit +ffffffff828191a0 T svm_handle_np_fault +ffffffff82819340 T vmm_handle_cpuid +ffffffff82819a20 T svm_handle_msr +ffffffff82819d10 T svm_handle_xsetbv +ffffffff82819dd0 T svm_handle_inout +ffffffff82819ee0 T vmm_inject_ud +ffffffff82819f20 T vmm_inject_db +ffffffff82819f60 T vmx_handle_np_fault +ffffffff8281a0e0 T vmx_handle_inout +ffffffff8281a280 T vmx_handle_cr +ffffffff8281a4c0 T vmx_handle_rdmsr +ffffffff8281a5c0 T vmx_handle_wrmsr +ffffffff8281a870 T vmx_handle_xsetbv +ffffffff8281a970 T vmm_inject_gp +ffffffff8281a9b0 T vmm_get_guest_memtype +ffffffff8281aa30 T vmx_get_exit_qualification +ffffffff8281aaa0 T vmx_get_guest_faulttype +ffffffff8281ab50 T svm_get_guest_faulttype +ffffffff8281ab80 T svm_fault_page +ffffffff8281ac10 T vmx_fault_page +ffffffff8281ad90 T vmm_get_guest_cpu_mode +ffffffff8281aea0 T vmx_load_pdptes +ffffffff8281b1c0 T vmx_handle_cr0_write +ffffffff8281b420 T vmx_handle_cr4_write +ffffffff8281b4e0 T vmm_handle_xsetbv +ffffffff8281b590 T vmx_handle_misc_enable_msr +ffffffff8281b5f0 T vmm_pat_is_valid +ffffffff8281b6d0 t vmm_handle_cpuid_0xd +ffffffff8281b7d0 T vmm_gpa_is_valid +ffffffff8281b840 T vmx_exit_reason_decode +ffffffff8281b880 T svm_exit_reason_decode +ffffffff8281c690 T vcpu_state_decode +ffffffff8281d000 T vmm_dispatch_intr +ffffffff8281d030 T vmxon +ffffffff8281d060 T vmxoff +ffffffff8281d090 T vmclear +ffffffff8281d0c0 T vmptrld +ffffffff8281d0f0 T vmptrst +ffffffff8281d120 T vmwrite +ffffffff8281d150 T vmread +ffffffff8281d180 T invvpid +ffffffff8281d19b t invvpid_fail +ffffffff8281d1a2 t invvpid_ret +ffffffff8281d1c0 T invept +ffffffff8281d1db t invept_fail +ffffffff8281d1e2 t invept_ret +ffffffff8281d200 T vmx_enter_guest +ffffffff8281d22b t skip_init +ffffffff8281d298 t no_l1df_msr +ffffffff8281d29b t l1df_tlb_loop +ffffffff8281d2b4 t l1df_tlb_done +ffffffff8281d2bc t l1df_load_cache +ffffffff8281d2d3 t done_flush +ffffffff8281d366 t do_resume +ffffffff8281d3eb t fail_launch_or_resume +ffffffff8281d42d t fail_launch_unknown +ffffffff8281d43a t fail_launch_invalid_vmcs +ffffffff8281d447 t fail_launch_valid_vmcs +ffffffff8281d464 t vmx_exit_handler_asm +ffffffff8281d529 t restore_host +ffffffff8281d550 T svm_enter_guest +ffffffff8281d6d2 t restore_host_svm +ffffffff8281e000 T sdmmc_match +ffffffff8281e060 T sdmmc_attach +ffffffff8281e400 T sdmmc_detach +ffffffff8281e4c0 T sdmmc_activate +ffffffff8281e580 T sdmmc_discover_task +ffffffff8281e670 T sdmmc_create_thread +ffffffff8281e6e0 T sdmmc_holds_root_device +ffffffff8281e740 T sdmmc_task_thread +ffffffff8281e9c0 T sdmmc_needs_discover +ffffffff8281ea90 T sdmmc_del_task +ffffffff8281eb50 T sdmmc_card_detach +ffffffff8281ec60 T sdmmc_add_task +ffffffff8281ecf0 T sdmmc_card_attach +ffffffff8281ee60 T sdmmc_enable +ffffffff8281eff0 T sdmmc_scan +ffffffff8281f090 T sdmmc_init +ffffffff8281f1c0 T sdmmc_disable +ffffffff8281f350 T sdmmc_function_free +ffffffff8281f370 T sdmmc_delay +ffffffff8281f3c0 T sdmmc_select_card +ffffffff8281f600 T sdmmc_set_bus_power +ffffffff8281f7c0 T sdmmc_function_alloc +ffffffff8281f860 T sdmmc_app_command +ffffffff8281fa20 T sdmmc_mmc_command +ffffffff8281fab0 T sdmmc_go_idle_state +ffffffff8281fbe0 T sdmmc_send_if_cond +ffffffff8281fd50 T sdmmc_set_relative_addr +ffffffff82820000 T sdmmc_cisptr +ffffffff828200d0 T sdmmc_read_cis +ffffffff828204b0 T sdmmc_print_cis +ffffffff828206a0 T sdmmc_check_cis_quirks +ffffffff82821000 T sdmmc_io_enable +ffffffff828212f0 T sdmmc_io_reset +ffffffff82821450 T sdmmc_io_send_op_cond +ffffffff828215e0 T sdmmc_io_scan +ffffffff82821760 T sdmmc_io_init +ffffffff828218d0 T sdmmc_io_set_highspeed +ffffffff82821bd0 T sdmmc_io_set_bus_width +ffffffff82821ec0 T sdmmc_io_function_ready +ffffffff82822070 T sdmmc_io_read_1 +ffffffff828221f0 T sdmmc_io_function_enable +ffffffff82822690 T sdmmc_io_write_1 +ffffffff82822830 T sdmmc_io_function_disable +ffffffff82822b10 T sdmmc_io_attach +ffffffff82822c00 T sdmmc_print +ffffffff82822ec0 T sdmmc_submatch +ffffffff82822f50 T sdmmc_io_detach +ffffffff82823010 T sdmmc_io_rw_direct +ffffffff828231e0 T sdmmc_io_rw_extended_subr +ffffffff82823390 T sdmmc_io_rw_extended +ffffffff828237d0 T sdmmc_io_read_2 +ffffffff82823940 T sdmmc_io_write_2 +ffffffff82823ac0 T sdmmc_io_read_4 +ffffffff82823c30 T sdmmc_io_write_4 +ffffffff82823db0 T sdmmc_io_read_multi_1 +ffffffff82823eb0 T sdmmc_io_write_multi_1 +ffffffff82823fb0 T sdmmc_io_read_region_1 +ffffffff828240b0 T sdmmc_io_write_region_1 +ffffffff828241b0 T sdmmc_io_xchg +ffffffff82824370 T sdmmc_intr_enable +ffffffff82824650 T sdmmc_intr_disable +ffffffff82824930 T sdmmc_intr_establish +ffffffff82824a50 T sdmmc_intr_disestablish +ffffffff82824b50 T sdmmc_card_intr +ffffffff82824ba0 T sdmmc_intr_task +ffffffff82824c60 T sdmmc_io_set_blocklen +ffffffff82825000 T sdmmc_mem_enable +ffffffff828254d0 T sdmmc_mem_send_op_cond +ffffffff828256b0 T sdmmc_mem_signal_voltage +ffffffff828257b0 T sdmmc_mem_scan +ffffffff82825b00 T sdmmc_decode_csd +ffffffff82825f50 T sdmmc_decode_cid +ffffffff82826400 T sdmmc_mem_send_scr +ffffffff82826560 T sdmmc_mem_decode_scr +ffffffff828265c0 T sdmmc_mem_send_cxd_data +ffffffff82826740 T sdmmc_mem_set_bus_width +ffffffff82826870 T sdmmc_mem_sd_switch +ffffffff82826b30 T sdmmc_be512_to_bitfield512 +ffffffff82826be0 T sdmmc_mem_mmc_switch +ffffffff82826cd0 T sdmmc_mem_init +ffffffff82826e60 T sdmmc_mem_set_blocklen +ffffffff82826f70 T sdmmc_mem_sd_init +ffffffff828273e0 T sdmmc_mem_mmc_init +ffffffff82827b60 T sdmmc_mem_select_transfer_mode +ffffffff82827be0 T sdmmc_mem_execute_tuning +ffffffff82827c70 T sdmmc_mem_read_block_subr +ffffffff82828000 T sdmmc_mem_single_read_block +ffffffff828280d0 T sdmmc_mem_read_block +ffffffff828282e0 T sdmmc_mem_write_block_subr +ffffffff82828660 T sdmmc_mem_single_write_block +ffffffff82828730 T sdmmc_mem_write_block +ffffffff82828940 T sdmmc_mem_hibernate_write +ffffffff82829000 T sdmmc_scsi_cmd +ffffffff82829200 T sdmmc_minphys +ffffffff82829280 T sdmmc_scsi_attach +ffffffff828294c0 T sdmmc_alloc_ccbs +ffffffff82829620 T sdmmc_free_ccbs +ffffffff82829680 T sdmmc_scsi_detach +ffffffff82829840 T sdmmc_stimeout +ffffffff828298e0 T sdmmc_ccb_alloc +ffffffff828299a0 T sdmmc_ccb_free +ffffffff82829aa0 T sdmmc_inquiry +ffffffff82829d30 T sdmmc_start_xs +ffffffff82829e50 T sdmmc_complete_xs +ffffffff82829f40 T sdmmc_done_xs +ffffffff82829f90 T sdmmc_scsi_hibernate_io +ffffffff8282b000 T bwfm_sdio_preinit +ffffffff8282b5a0 T bwfm_sdio_txcheck +ffffffff8282b5e0 T bwfm_sdio_txdata +ffffffff8282b660 T bwfm_sdio_txctl +ffffffff8282b7f0 T bwfm_sdio_buscore_read +ffffffff8282b800 T bwfm_sdio_buscore_write +ffffffff8282b820 T bwfm_sdio_buscore_prepare +ffffffff8282b9a0 T bwfm_sdio_buscore_activate +ffffffff8282ba30 T bwfm_sdio_match +ffffffff8282bae0 T bwfm_sdio_attach +ffffffff8282be80 T bwfm_sdio_detach +ffffffff8282bf00 T bwfm_sdio_task +ffffffff8282c0c0 T bwfm_sdio_write_1 +ffffffff8282c0f0 T bwfm_sdio_read_1 +ffffffff8282c120 T bwfm_sdio_write_4 +ffffffff8282c1f0 T bwfm_sdio_read_4 +ffffffff8282c2b0 T bwfm_sdio_load_microcode +ffffffff8282c5a0 T bwfm_sdio_clkctl +ffffffff8282c6d0 T bwfm_sdio_dev_write +ffffffff8282c720 T bwfm_sdio_intr +ffffffff8282c770 T bwfm_sdio_ram_read_write +ffffffff8282c9f0 T bwfm_sdio_htclk +ffffffff8282ccb0 T bwfm_sdio_readshared +ffffffff8282cda0 T bwfm_sdio_dev_read +ffffffff8282cde0 T bwfm_sdio_rx_frames +ffffffff8282d210 T bwfm_sdio_tx_frames +ffffffff8282d330 T bwfm_sdio_backplane +ffffffff8282d400 T bwfm_sdio_buf_read +ffffffff8282d500 T bwfm_sdio_buf_write +ffffffff8282d5d0 T bwfm_sdio_frame_read_write +ffffffff8282d780 T bwfm_sdio_newbuf +ffffffff8282d810 T bwfm_sdio_tx_ok +ffffffff8282d870 T bwfm_sdio_tx_ctrlframe +ffffffff8282d980 T bwfm_sdio_tx_dataframe +ffffffff8282daf0 T bwfm_sdio_rx_glom +ffffffff8282e000 T onewire_match +ffffffff8282e060 T onewire_attach +ffffffff8282e120 T onewire_detach +ffffffff8282e190 T onewire_activate +ffffffff8282e1b0 T onewire_scan +ffffffff8282e400 T onewire_createthread +ffffffff8282e470 T onewire_print +ffffffff8282e560 T onewirebus_print +ffffffff8282e5b0 T onewire_lock +ffffffff8282e5d0 T onewire_unlock +ffffffff8282e5f0 T onewire_reset +ffffffff8282e610 T onewire_bit +ffffffff8282e630 T onewire_read_byte +ffffffff8282e7c0 T onewire_write_byte +ffffffff8282e8d0 T onewire_read_block +ffffffff8282e970 T onewire_write_block +ffffffff8282ea10 T onewire_triplet +ffffffff8282eb20 T onewire_matchrom +ffffffff8282ed10 T onewire_search +ffffffff8282f180 T onewire_thread +ffffffff82830000 T onewire_crc +ffffffff828300b0 T onewire_crc16 +ffffffff82830170 T onewire_famname +ffffffff828301b0 T onewire_matchbyfam +ffffffff82831000 T owid_match +ffffffff82831030 T owid_attach +ffffffff82831120 T owid_detach +ffffffff82831170 T owid_activate +ffffffff82832000 T owsbm_match +ffffffff82832030 T owsbm_attach +ffffffff82832240 T owsbm_detach +ffffffff828322d0 T owsbm_activate +ffffffff82832300 T owsbm_update +ffffffff82833000 T owtemp_match +ffffffff82833030 T owtemp_attach +ffffffff82833160 T owtemp_detach +ffffffff828331f0 T owtemp_activate +ffffffff82833220 T owtemp_update +ffffffff82834000 T owctr_match +ffffffff82834030 T owctr_attach +ffffffff828341c0 T owctr_detach +ffffffff82834250 T owctr_activate +ffffffff82834280 T owctr_update +ffffffff828342c0 T owctr_update_counter +ffffffff82835000 A __text_page_start +ffffffff82835000 T Xsyscall_meltdown +ffffffff8283500c T Xsyscall +ffffffff82835299 t Xsyscall_trampback +ffffffff828352b0 T intr_user_exit +ffffffff828352f2 t intr_user_exit_post_ast +ffffffff8283544b t Xiretq_trampback +ffffffff82835457 T doreti_iret +ffffffff82836000 T alltraps +ffffffff82836138 T recall_trap +ffffffff82836150 T alltraps_kern +ffffffff82836153 T alltraps_kern_meltdown +ffffffff82837000 ? Xtrap00 +ffffffff82837000 A __kutext_start +ffffffff82837000 A __text_page_end +ffffffff82837010 ? Xtrap01 +ffffffff82837020 ? Xtrap02 +ffffffff82837028 c calltrap_specstk +ffffffff828370f0 ? calltrap_specstk_tramp +ffffffff82837110 ? Xtrap03 +ffffffff82837120 ? Xtrap04 +ffffffff82837130 ? Xtrap05 +ffffffff82837140 ? Xtrap06 +ffffffff82837150 ? Xtrap07 +ffffffff82837160 ? Xtrap08 +ffffffff82837170 ? Xtrap09 +ffffffff82837180 ? Xtrap0a +ffffffff82837190 ? Xtrap0b +ffffffff828371a0 ? Xtrap0c +ffffffff828371b0 ? Xtrap0d +ffffffff82837240 ? Xtrap0e +ffffffff82837250 ? Xintrspurious +ffffffff82837250 ? Xtrap0f +ffffffff82837260 ? Xtrap10 +ffffffff82837270 ? Xtrap11 +ffffffff82837280 ? Xtrap12 +ffffffff82837290 ? Xtrap13 +ffffffff828372a0 ? Xtrap14 +ffffffff828372b0 ? Xtrap15 +ffffffff828372c0 ? Xtrap16 +ffffffff828372c0 ? Xtrap17 +ffffffff828372c0 ? Xtrap18 +ffffffff828372c0 ? Xtrap19 +ffffffff828372c0 ? Xtrap1a +ffffffff828372c0 ? Xtrap1b +ffffffff828372c0 ? Xtrap1c +ffffffff828372c0 ? Xtrap1d +ffffffff828372c0 ? Xtrap1e +ffffffff828372c0 ? Xtrap1f +ffffffff828372d0 ? x2apic_eoi +ffffffff828372f0 ? Xintr_lapic_ipi +ffffffff82837330 ? Xipi_invltlb +ffffffff82837360 ? Xipi_invept +ffffffff828373a0 ? Xipi_invlpg +ffffffff828373d0 ? Xipi_invlrange +ffffffff82837410 ? Xipi_invltlb_pcid +ffffffff82837450 ? Xipi_invlpg_pcid +ffffffff828374a0 ? Xipi_invlrange_pcid +ffffffff82837510 ? Xintr_lapic_ltimer +ffffffff82837550 ? Xintr_xen_upcall +ffffffff82837590 ? Xintr_hyperv_upcall +ffffffff828375d0 ? Xintr_legacy0 +ffffffff82837610 ? Xintr_legacy1 +ffffffff82837650 ? Xintr_legacy2 +ffffffff82837690 ? Xintr_legacy3 +ffffffff828376d0 ? Xintr_legacy4 +ffffffff82837710 ? Xintr_legacy5 +ffffffff82837750 ? Xintr_legacy6 +ffffffff82837790 ? Xintr_legacy7 +ffffffff828377d0 ? Xintr_legacy8 +ffffffff82837810 ? Xintr_legacy9 +ffffffff82837850 ? Xintr_legacy10 +ffffffff82837890 ? Xintr_legacy11 +ffffffff828378d0 ? Xintr_legacy12 +ffffffff82837910 ? Xintr_legacy13 +ffffffff82837950 ? Xintr_legacy14 +ffffffff82837990 ? Xintr_legacy15 +ffffffff828379d0 ? Xintr_ioapic_edge0 +ffffffff82837a10 ? Xintr_ioapic_edge1 +ffffffff82837a50 ? Xintr_ioapic_edge2 +ffffffff82837a90 ? Xintr_ioapic_edge3 +ffffffff82837ad0 ? Xintr_ioapic_edge4 +ffffffff82837b10 ? Xintr_ioapic_edge5 +ffffffff82837b50 ? Xintr_ioapic_edge6 +ffffffff82837b90 ? Xintr_ioapic_edge7 +ffffffff82837bd0 ? Xintr_ioapic_edge8 +ffffffff82837c10 ? Xintr_ioapic_edge9 +ffffffff82837c50 ? Xintr_ioapic_edge10 +ffffffff82837c90 ? Xintr_ioapic_edge11 +ffffffff82837cd0 ? Xintr_ioapic_edge12 +ffffffff82837d10 ? Xintr_ioapic_edge13 +ffffffff82837d50 ? Xintr_ioapic_edge14 +ffffffff82837d90 ? Xintr_ioapic_edge15 +ffffffff82837dd0 ? Xintr_ioapic_edge16 +ffffffff82837e10 ? Xintr_ioapic_edge17 +ffffffff82837e50 ? Xintr_ioapic_edge18 +ffffffff82837e90 ? Xintr_ioapic_edge19 +ffffffff82837ed0 ? Xintr_ioapic_edge20 +ffffffff82837f10 ? Xintr_ioapic_edge21 +ffffffff82837f50 ? Xintr_ioapic_edge22 +ffffffff82837f90 ? Xintr_ioapic_edge23 +ffffffff82837fd0 ? Xintr_ioapic_edge24 +ffffffff82838010 ? Xintr_ioapic_edge25 +ffffffff82838050 ? Xintr_ioapic_edge26 +ffffffff82838090 ? Xintr_ioapic_edge27 +ffffffff828380d0 ? Xintr_ioapic_edge28 +ffffffff82838110 ? Xintr_ioapic_edge29 +ffffffff82838150 ? Xintr_ioapic_edge30 +ffffffff82838190 ? Xintr_ioapic_edge31 +ffffffff828381d0 ? Xintr_ioapic_edge32 +ffffffff82838210 ? Xintr_ioapic_edge33 +ffffffff82838250 ? Xintr_ioapic_edge34 +ffffffff82838290 ? Xintr_ioapic_edge35 +ffffffff828382d0 ? Xintr_ioapic_edge36 +ffffffff82838310 ? Xintr_ioapic_edge37 +ffffffff82838350 ? Xintr_ioapic_edge38 +ffffffff82838390 ? Xintr_ioapic_edge39 +ffffffff828383d0 ? Xintr_ioapic_edge40 +ffffffff82838410 ? Xintr_ioapic_edge41 +ffffffff82838450 ? Xintr_ioapic_edge42 +ffffffff82838490 ? Xintr_ioapic_edge43 +ffffffff828384d0 ? Xintr_ioapic_edge44 +ffffffff82838510 ? Xintr_ioapic_edge45 +ffffffff82838550 ? Xintr_ioapic_edge46 +ffffffff82838590 ? Xintr_ioapic_edge47 +ffffffff828385d0 ? Xintr_ioapic_edge48 +ffffffff82838610 ? Xintr_ioapic_edge49 +ffffffff82838650 ? Xintr_ioapic_edge50 +ffffffff82838690 ? Xintr_ioapic_edge51 +ffffffff828386d0 ? Xintr_ioapic_edge52 +ffffffff82838710 ? Xintr_ioapic_edge53 +ffffffff82838750 ? Xintr_ioapic_edge54 +ffffffff82838790 ? Xintr_ioapic_edge55 +ffffffff828387d0 ? Xintr_ioapic_edge56 +ffffffff82838810 ? Xintr_ioapic_edge57 +ffffffff82838850 ? Xintr_ioapic_edge58 +ffffffff82838890 ? Xintr_ioapic_edge59 +ffffffff828388d0 ? Xintr_ioapic_edge60 +ffffffff82838910 ? Xintr_ioapic_edge61 +ffffffff82838950 ? Xintr_ioapic_edge62 +ffffffff82838990 ? Xintr_ioapic_edge63 +ffffffff828389d0 ? Xintr_ioapic_level0 +ffffffff82838a10 ? Xintr_ioapic_level1 +ffffffff82838a50 ? Xintr_ioapic_level2 +ffffffff82838a90 ? Xintr_ioapic_level3 +ffffffff82838ad0 ? Xintr_ioapic_level4 +ffffffff82838b10 ? Xintr_ioapic_level5 +ffffffff82838b50 ? Xintr_ioapic_level6 +ffffffff82838b90 ? Xintr_ioapic_level7 +ffffffff82838bd0 ? Xintr_ioapic_level8 +ffffffff82838c10 ? Xintr_ioapic_level9 +ffffffff82838c50 ? Xintr_ioapic_level10 +ffffffff82838c90 ? Xintr_ioapic_level11 +ffffffff82838cd0 ? Xintr_ioapic_level12 +ffffffff82838d10 ? Xintr_ioapic_level13 +ffffffff82838d50 ? Xintr_ioapic_level14 +ffffffff82838d90 ? Xintr_ioapic_level15 +ffffffff82838dd0 ? Xintr_ioapic_level16 +ffffffff82838e10 ? Xintr_ioapic_level17 +ffffffff82838e50 ? Xintr_ioapic_level18 +ffffffff82838e90 ? Xintr_ioapic_level19 +ffffffff82838ed0 ? Xintr_ioapic_level20 +ffffffff82838f10 ? Xintr_ioapic_level21 +ffffffff82838f50 ? Xintr_ioapic_level22 +ffffffff82838f90 ? Xintr_ioapic_level23 +ffffffff82838fd0 ? Xintr_ioapic_level24 +ffffffff82839010 ? Xintr_ioapic_level25 +ffffffff82839050 ? Xintr_ioapic_level26 +ffffffff82839090 ? Xintr_ioapic_level27 +ffffffff828390d0 ? Xintr_ioapic_level28 +ffffffff82839110 ? Xintr_ioapic_level29 +ffffffff82839150 ? Xintr_ioapic_level30 +ffffffff82839190 ? Xintr_ioapic_level31 +ffffffff828391d0 ? Xintr_ioapic_level32 +ffffffff82839210 ? Xintr_ioapic_level33 +ffffffff82839250 ? Xintr_ioapic_level34 +ffffffff82839290 ? Xintr_ioapic_level35 +ffffffff828392d0 ? Xintr_ioapic_level36 +ffffffff82839310 ? Xintr_ioapic_level37 +ffffffff82839350 ? Xintr_ioapic_level38 +ffffffff82839390 ? Xintr_ioapic_level39 +ffffffff828393d0 ? Xintr_ioapic_level40 +ffffffff82839410 ? Xintr_ioapic_level41 +ffffffff82839450 ? Xintr_ioapic_level42 +ffffffff82839490 ? Xintr_ioapic_level43 +ffffffff828394d0 ? Xintr_ioapic_level44 +ffffffff82839510 ? Xintr_ioapic_level45 +ffffffff82839550 ? Xintr_ioapic_level46 +ffffffff82839590 ? Xintr_ioapic_level47 +ffffffff828395d0 ? Xintr_ioapic_level48 +ffffffff82839610 ? Xintr_ioapic_level49 +ffffffff82839650 ? Xintr_ioapic_level50 +ffffffff82839690 ? Xintr_ioapic_level51 +ffffffff828396d0 ? Xintr_ioapic_level52 +ffffffff82839710 ? Xintr_ioapic_level53 +ffffffff82839750 ? Xintr_ioapic_level54 +ffffffff82839790 ? Xintr_ioapic_level55 +ffffffff828397d0 ? Xintr_ioapic_level56 +ffffffff82839810 ? Xintr_ioapic_level57 +ffffffff82839850 ? Xintr_ioapic_level58 +ffffffff82839890 ? Xintr_ioapic_level59 +ffffffff828398d0 ? Xintr_ioapic_level60 +ffffffff82839910 ? Xintr_ioapic_level61 +ffffffff82839950 ? Xintr_ioapic_level62 +ffffffff82839990 ? Xintr_ioapic_level63 +ffffffff8283a000 ? codepatch_fill_nop +ffffffff8283a000 A __cptext_start +ffffffff8283a000 A __kutext_end +ffffffff8283a0b0 ? codepatch_maprw +ffffffff8283a1c0 ? codepatch_unmaprw +ffffffff8283a230 ? codepatch_nop +ffffffff8283a3b0 ? codepatch_replace +ffffffff8283a580 ? codepatch_call +ffffffff8283a5a0 ? codepatch_control_flow +ffffffff8283a7c0 ? codepatch_jmp +ffffffff8283b000 A __cptext_end +ffffffff8283b000 A __rodata_start +ffffffff8283b000 C _etext +ffffffff8283b000 C etext +ffffffff8283c000 r seeprom_read +ffffffff8283c004 r icl_mg_pll_find_divisors.div1_vals +ffffffff8283c034 r athn_ac2qid +ffffffff8283c034 r athn_ac2qid +ffffffff8283c034 r athn_ac2qid +ffffffff8283c040 r rtwn_get_rssi.cckoff +ffffffff8283c068 r rsu_ac2qid +ffffffff8283c078 r pckbc_portcmd +ffffffff8283c07c r tht_fifo_write_pad.pad +ffffffff8283c084 r rsu_get_rssi.cckoff +ffffffff8283c0a4 r adlp_n_revids +ffffffff8283c0e8 r apple_iso_trans +ffffffff8283c0f0 r wihap_check_tx.txratetable +ffffffff8283c0f4 r dmamode +ffffffff8283c118 r gen9_edram_size_mb.sets +ffffffff8283c12c r dg2_g12_revid_step_tbl +ffffffff8283d000 r isomappings +ffffffff8283d080 r unimappings +ffffffff8283d230 r replacements +ffffffff82840abf r apollo_pio_rec +ffffffff8288eadc r apollo_udma33_tim +ffffffff828a41a2 r pp_r600_decoded_lanes +ffffffff828db262 r cmd680_setup_channel.udma_tbl +ffffffff828e37e6 r apollo_udma100_tim +ffffffff828e37ec r cmd0646_9_tim_udma +ffffffff828f2127 r substchar +ffffffff82949987 r apollo_udma133_tim +ffffffff8294998e r apollo_udma66_tim +ffffffff829499b8 r cy_pio_rec +ffffffff8294f1c8 R drm_ca +ffffffff8294f1f0 R drm_filtops +ffffffff8294f220 R drmread_filtops +ffffffff82950000 r vga_emulops +ffffffff82950048 R vga_stdscreen +ffffffff82950078 R vga_stdscreen_mono +ffffffff829500a8 R vga_stdscreen_bf +ffffffff829500d8 R vga_40lscreen +ffffffff82950108 R vga_40lscreen_mono +ffffffff82950138 R vga_40lscreen_bf +ffffffff82950168 R vga_50lscreen +ffffffff82950198 R vga_50lscreen_mono +ffffffff829501c8 R vga_50lscreen_bf +ffffffff829501f8 R vga_screenlist +ffffffff82950208 R vga_screenlist_mono +ffffffff82950218 R vga_accessops +ffffffff82950278 r i945_wm_info +ffffffff829502b8 r bgansitopc +ffffffff829502c0 r pctoansi +ffffffff82950300 r sdma_offsets +ffffffff82950300 r sdma_offsets +ffffffff82950338 r iha_rate_tbl +ffffffff82950370 r i830_a_wm_info +ffffffff829503a8 r gen9_edram_size_mb.ways +ffffffff82950408 r aggr_periodic_times +ffffffff82950508 r michael_final.pad +ffffffff82950530 r rt_copysa.maskarray +ffffffff82950538 r i915_wm_info +ffffffff82950540 r amdgpu_ih_clientid_jpeg +ffffffff82950540 r amdgpu_ih_clientid_uvds +ffffffff82950540 r amdgpu_ih_clientid_vcns +ffffffff82950540 r amdgpu_ih_clientid_vcns +ffffffff82950540 r amdgpu_ih_clientid_vcns +ffffffff82950570 r jsl_ehl_revids +ffffffff82950580 r vga_setfontset.cmaptabb +ffffffff829505f0 r i830_bc_wm_info +ffffffff82950658 r hsw_activate_psr2.map +ffffffff82950660 r tgl_revids +ffffffff82950698 r __drm_universal_plane_init.default_modifiers +ffffffff829506a8 r iwn_tid2fifo +ffffffff829506c0 r vga_setfontset.cmaptaba +ffffffff829506c8 r crtc_offsets +ffffffff829506c8 r crtc_offsets +ffffffff829506c8 r crtc_offsets +ffffffff82950770 r rtwn_r88e_get_rssi.cckoff +ffffffff82951000 R edid_vendors +ffffffff829512c0 R edid_nvendors +ffffffff829512d0 R edid_products +ffffffff82951330 R edid_nproducts +ffffffff82951340 r _edid_modes +ffffffff82952000 R videomode_list +ffffffff82953080 R videomode_count +ffffffff82954000 r ahc_hard_errors +ffffffff82954080 r critical_sections +ffffffff829540b0 r patches +ffffffff82954d50 r seqprog +ffffffff82956000 r ahc_switch +ffffffff82957000 r termstat_strings +ffffffff82957020 r critical_sections +ffffffff82957060 r seqprog +ffffffff82957d50 r patches +ffffffff82959000 r ahd_switch +ffffffff8295a000 R aic_switch +ffffffff8295b000 R adw_switch +ffffffff8295c000 R gdt_switch +ffffffff8295d000 R twe_switch +ffffffff8295e000 R ciss_switch +ffffffff8295e030 R ciss_level +ffffffff8295e050 R ciss_stat +ffffffff8295f000 R ami_switch +ffffffff8295f028 R ami_raw_switch +ffffffff82960000 R mfi_switch +ffffffff82960028 R mfi_pd_switch +ffffffff82960050 r mfi_iop_xscale +ffffffff82960080 r mfi_iop_ppc +ffffffff829600b0 r mfi_iop_gen2 +ffffffff829600e0 r mfi_iop_skinny +ffffffff82960110 r mfi_bbu_indicators +ffffffff82961000 R qlw_switch +ffffffff82962000 R isp_2100_risc_code +ffffffff82974bf0 R isp_2200_risc_code +ffffffff82987990 R isp_2300_risc_code +ffffffff829a1408 R qla_switch +ffffffff829a1430 r qla_regs_2100 +ffffffff829a1460 r qla_regs_2200 +ffffffff829a1490 r qla_regs_23XX +ffffffff829a2000 R ahci_atascsi_methods +ffffffff829a3000 R nvme_switch +ffffffff829a3028 r nvme_ops +ffffffff829a4000 R mpi_switch +ffffffff829a4060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff829a4090 r chv_oa_mux_regs +ffffffff829a40b0 r fiji_clock_stretcher_lookup_table +ffffffff829a40b0 r tonga_clock_stretcher_lookup_table +ffffffff829a40d0 r iosf_pci_devices +ffffffff829a40f0 r link_speed +ffffffff829a40f0 r link_speed +ffffffff829a4130 r drm_fb_xfrm.default_dst_pitch +ffffffff829a4130 r non_supported_protection +ffffffff829a4140 r tgl_uy_revids +ffffffff829a42b0 r bwi_phy_noise_11g_rev1 +ffffffff829a4320 r cardslot_process_event.antonym_ev +ffffffff829a43b0 r gen11_oa_mux_regs +ffffffff829a4450 r dpia_to_preferred_enc_id_table +ffffffff829a44c0 r ddr2_cycle_tenths +ffffffff829a4530 r rtw_intr_rx.ratetbl +ffffffff829a45b0 r abm_config +ffffffff829a4630 r getbootinfo.ports +ffffffff829a4680 r reg_offsets +ffffffff829a4690 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff829a46a0 r glk_revids +ffffffff829a46b0 r init_non_clock_fields.look_up +ffffffff829a46c0 r uftdi_8u232am_getrate.roundoff +ffffffff829a4720 r zyd_rx_data.rates +ffffffff829a4740 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff829a4770 r intel_engine_init_tlb_invalidation.gen8_regs +ffffffff829a47a0 r bwi_phy_noise_11g +ffffffff829a47b0 r hpt366_pio +ffffffff829a4810 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff829a4830 r ether_crc32_be_update.rev +ffffffff829a4830 r rtw_grf5101_mac_crypt.caesar +ffffffff829a4880 r snb_b_fdi_train_param +ffffffff829a4960 r intel_hpll_vco.elk_vco +ffffffff829a4980 r icl_revids +ffffffff829a49e0 r pin_offsets +ffffffff829a4a00 r amdgpu_ih_srcid_jpeg +ffffffff829a4a40 r firmware_list +ffffffff829a4aa0 r atom_arg_shift +ffffffff829a4aa0 r atom_arg_shift +ffffffff829a4ae0 r pf_syncookie_wstab +ffffffff829a4b00 r ieee80211_media_init.mopts +ffffffff829a4b60 r add_entropy_words.twist_table +ffffffff829a4c00 r urtw_8225v2_txpwr_cck +ffffffff829a4c20 r bwfm_pci_prio2fifo +ffffffff829a4c20 r ieee80211_up_to_ac.up_to_ac +ffffffff829a4ce0 r paritytab +ffffffff829a4ce0 r x86emu_parity_tab +ffffffff829a4d00 r legacy_connector_convert +ffffffff829a4d40 r gen7_oa_mux_regs +ffffffff829a4d60 r hsw_oa_mux_regs +ffffffff829a4d80 r notetab +ffffffff829a4da0 r urtw_8225v2_txpwr_cck_ch14 +ffffffff829a4dc0 r bwi_rf_calibval.rf_calibvals +ffffffff829a4e60 r pf_syncookie_msstab +ffffffff829a4ec0 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff829a4f20 r uath_wme_init.uath_wme_11g +ffffffff829a4f60 r gen7_oa_b_counters +ffffffff829a5160 r rtwn_iq_calib_run.reg_adda +ffffffff829a5180 r nfs_backoff +ffffffff829a51c0 r atom_def_dst +ffffffff829a51c0 r atom_def_dst +ffffffff829a5200 r sha256_initial_hash_value +ffffffff829a5260 r otus_edca_def +ffffffff829a5280 r intel_hpll_vco.blb_vco +ffffffff829a5360 r epic_pci_subsys_info +ffffffff829a5380 r kbl_revids +ffffffff829a53a0 r atom_arg_mask +ffffffff829a53a0 r atom_arg_mask +ffffffff829a5400 r butmap +ffffffff829a5440 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff829a5480 r comsoft.lsrmap +ffffffff829a54c0 r xgmi3x16_pcs_err_noncorrectable_mask_reg_aldebaran +ffffffff829a54e0 r tulip_mii_phy_readspecific.table +ffffffff829a5580 r intel_hpll_vco.pnv_vco +ffffffff829a55e0 r dmapageport +ffffffff829a56c0 r intel_hpll_vco.ctg_vco +ffffffff829a5780 r drm_calculate_luminance_range.pre_computed_values +ffffffff829a6000 R sili_atascsi_methods +ffffffff829a7000 R ncr53c9x_switch +ffffffff829a8000 r scf_period +ffffffff829a9000 R siop_script +ffffffff829a95a0 R lun_switch +ffffffff829a95d0 R tag_switch +ffffffff829a9660 R load_dsa +ffffffff829a96c4 R siop_led_on +ffffffff829a96cc R siop_led_off +ffffffff829a96d8 R siop_switch +ffffffff829aa000 R ep_vortex_media +ffffffff829aa100 R ep_default_to_media +ffffffff829ab000 R wi_card_ident +ffffffff829ad000 R ucode_table +ffffffff829ae000 r re_revisions +ffffffff829ae290 r re_kstats_tpl +ffffffff829b0000 R smc91cxx_media +ffffffff829b0010 R smc91cxx_mii_bitbang_ops +ffffffff829b1000 R dl10019_mii_bitbang_ops +ffffffff829b1028 R dl10022_mii_bitbang_ops +ffffffff829b2000 R ax88190_mii_bitbang_ops +ffffffff829b4000 R ac97_on_off +ffffffff829b4304 R ac97_mic_select +ffffffff829b4608 R ac97_mono_select +ffffffff829b490c R ac97_source +ffffffff829b4c10 R ac97_volume_stereo +ffffffff829b4c2c R ac97_volume_mono +ffffffff829b4c50 R source_info +ffffffff829b5450 R ac97_ad +ffffffff829b5560 R ac97_ak +ffffffff829b55f0 R ac97_av +ffffffff829b5730 R ac97_rl +ffffffff829b5780 R ac97_cm +ffffffff829b5800 R ac97_cr +ffffffff829b5820 R ac97_cs +ffffffff829b5900 R ac97_cx +ffffffff829b5960 R ac97_dt +ffffffff829b5980 R ac97_em +ffffffff829b59b0 R ac97_es +ffffffff829b59d0 R ac97_is +ffffffff829b59f0 R ac97_ic +ffffffff829b5a70 R ac97_it +ffffffff829b5aa0 R ac97_ns +ffffffff829b5b60 R ac97_ps +ffffffff829b5b90 R ac97_sl +ffffffff829b5bb0 R ac97_st +ffffffff829b5d00 R ac97_vi +ffffffff829b5d30 R ac97_tt +ffffffff829b5db0 R ac97_ti +ffffffff829b5dd0 R ac97_wb +ffffffff829b5df0 R ac97_wo +ffffffff829b5e80 R ac97_ym +ffffffff829b5ed0 R ac97_vendors +ffffffff829b61d0 R ac97enhancement +ffffffff829b62d0 R ac97feature +ffffffff829b7000 R lm_chips +ffffffff829b7020 R lm78_sensors +ffffffff829b71a0 R w83627hf_sensors +ffffffff829b73a0 R w83627ehf_sensors +ffffffff829b75c0 R w83627dhg_sensors +ffffffff829b77c0 R nct6776f_sensors +ffffffff829b7a00 R nct6779d_sensors +ffffffff829b7d60 R w83637hf_sensors +ffffffff829b7f20 R w83697hf_sensors +ffffffff829b80c0 R w83781d_sensors +ffffffff829b8280 R w83782d_sensors +ffffffff829b8480 R w83783s_sensors +ffffffff829b8600 R w83791d_sensors +ffffffff829b8860 R w83792d_sensors +ffffffff829b8ae0 R as99127f_sensors +ffffffff829b9000 r ar5k_known_products +ffffffff829b9110 r ar5111_gain_opt +ffffffff829b91e0 r ar5112_gain_opt +ffffffff829b92b0 r ar5k_5ghz_channels +ffffffff829b9a00 r ar5k_2ghz_channels +ffffffff829b9f10 r ar5111_rf +ffffffff829ba350 r ar5112a_rf +ffffffff829ba890 r ar5112_rf +ffffffff829bada0 r ar5413_rf +ffffffff829bb1b0 r ar2413_rf +ffffffff829bb4d0 r ar2425_rf +ffffffff829bb830 r ar5111_rfg +ffffffff829bbb30 r ar5112_rfg +ffffffff829bbe30 r ar5413_rfg +ffffffff829bc130 r ar2413_rfg +ffffffff829bc430 r ar5k_rt_11a +ffffffff829bc552 r ar5k_rt_11b +ffffffff829bc674 r ar5k_rt_11g +ffffffff829bc796 r ar5k_rt_xr +ffffffff829bd000 r ar5210_ini +ffffffff829be000 r ar5211_mode +ffffffff829be2c0 r ar5211_ini +ffffffff829bead0 r ar5211_rf +ffffffff829bf000 r ar5212_pcie +ffffffff829bf080 r ar5212_mode +ffffffff829bf310 r ar5212_ini +ffffffff829bfc80 r ar5212_ar5111_mode +ffffffff829bff20 r ar5212_ar5112_mode +ffffffff829c01b0 r ar5413_mode +ffffffff829c0b10 r ar2413_mode +ffffffff829c1430 r ar2425_mode +ffffffff829c1d90 r ar5111_bbgain +ffffffff829c2090 r ar5112_bbgain +ffffffff829c3000 r athn_5ghz_chans +ffffffff829c3020 r athn_rates +ffffffff829c4000 r athn_rates +ffffffff829c5000 r ar9160_ini +ffffffff829c5068 r ar5416_ini +ffffffff829c50d0 r ar5416_serdes +ffffffff829c50e8 r ar9160_1_1_addac +ffffffff829c50f8 r ar9160_1_0_addac +ffffffff829c5108 r ar5416_2_2_addac +ffffffff829c5118 r ar5416_2_1_addac +ffffffff829c5128 r ar5416_set_power_calib.chainoffset +ffffffff829c5140 r ar9160_bank6tpc_vals +ffffffff829c51c0 r ar5416_bank6tpc_vals +ffffffff829c5240 r ar5416_bb_rfgain_vals_2g +ffffffff829c5340 r ar5416_bb_rfgain_vals_5g +ffffffff829c5440 r ar5416_bank6_vals +ffffffff829c54c0 r ar9160_regs +ffffffff829c5540 r ar9160_vals_5g20 +ffffffff829c5640 r ar9160_vals_5g40 +ffffffff829c5740 r ar9160_vals_2g40 +ffffffff829c5840 r ar9160_vals_2g20 +ffffffff829c5940 r ar9160_cm_regs +ffffffff829c5c30 r ar9160_cm_vals +ffffffff829c6210 r ar5416_regs +ffffffff829c6290 r ar5416_vals_5g20 +ffffffff829c6390 r ar5416_vals_5g40 +ffffffff829c6490 r ar5416_vals_2g40 +ffffffff829c6590 r ar5416_vals_2g20 +ffffffff829c6690 r ar5416_cm_regs +ffffffff829c6980 r ar5416_cm_vals +ffffffff829c6f60 r ar5416_serdes_regs +ffffffff829c6f90 r ar5416_serdes_vals +ffffffff829c6fc0 r ar9160_1_1_addac_vals +ffffffff829c7040 r ar9160_1_0_addac_vals +ffffffff829c70c0 r ar5416_2_2_addac_vals +ffffffff829c7150 r ar5416_2_1_addac_vals +ffffffff829c8000 r ar9280_2_0_ini +ffffffff829c8068 r ar9280_2_0_serdes +ffffffff829c8080 r ar9280_2_0_rx_gain_23db_backoff +ffffffff829c80a0 r ar9280_2_0_rx_gain_13db_backoff +ffffffff829c80c0 r ar9280_2_0_rx_gain +ffffffff829c80e0 r ar9280_2_0_tx_gain_high_power +ffffffff829c8100 r ar9280_2_0_tx_gain +ffffffff829c8120 r ar9280_init_from_rom.chainoffset +ffffffff829c8130 r ar9280_2_0_regs +ffffffff829c8190 r ar9280_2_0_vals_5g20 +ffffffff829c8250 r ar9280_2_0_vals_5g40 +ffffffff829c8310 r ar9280_2_0_vals_2g40 +ffffffff829c83d0 r ar9280_2_0_vals_2g20 +ffffffff829c8490 r ar9280_2_0_cm_regs +ffffffff829c8740 r ar9280_2_0_cm_vals +ffffffff829c8c90 r ar9280_2_0_fast_clock_regs +ffffffff829c8cb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff829c8cf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff829c8d30 r ar9280_2_0_serdes_regs +ffffffff829c8d60 r ar9280_2_0_serdes_vals +ffffffff829c8d90 r ar9280_2_0_rx_gain_regs +ffffffff829c8ea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff829c90b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff829c92c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff829c94d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff829c96e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff829c98f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff829c9b00 r ar9280_2_0_tx_gain_regs +ffffffff829c9b40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff829c9bc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff829c9c40 r ar9280_2_0_tx_gain_vals_5g +ffffffff829c9cc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff829ca000 r ar9271_ini +ffffffff829ca068 r ar9285_1_2_ini +ffffffff829ca0d0 r ar9280_2_0_serdes +ffffffff829ca0e8 r ar9271_tx_gain_high_power +ffffffff829ca108 r ar9271_tx_gain +ffffffff829ca128 r ar9285_2_0_tx_gain_high_power +ffffffff829ca148 r ar9285_2_0_tx_gain +ffffffff829ca168 r ar9285_1_2_tx_gain_high_power +ffffffff829ca188 r ar9285_1_2_tx_gain +ffffffff829ca1b0 r ar9271_regs +ffffffff829ca410 r ar9271_vals_2g40 +ffffffff829ca8d0 r ar9271_vals_2g20 +ffffffff829cad90 r ar9271_cm_regs +ffffffff829cb020 r ar9271_cm_vals +ffffffff829cb540 r ar9285_1_2_regs +ffffffff829cb7a0 r ar9285_1_2_vals_2g40 +ffffffff829cbc60 r ar9285_1_2_vals_2g20 +ffffffff829cc120 r ar9285_1_2_cm_regs +ffffffff829cc3a0 r ar9285_1_2_cm_vals +ffffffff829cc890 r ar9280_2_0_serdes_regs +ffffffff829cc8c0 r ar9280_2_0_serdes_vals +ffffffff829cc8f0 r ar9271_tx_gain_regs +ffffffff829cc940 r ar9271_tx_gain_high_power_vals_2g +ffffffff829cc9d0 r ar9271_tx_gain_vals_2g +ffffffff829cca60 r ar9285_1_2_tx_gain_regs +ffffffff829ccab0 r ar9285_2_0_tx_gain_high_power_vals_2g +ffffffff829ccb50 r ar9285_2_0_tx_gain_vals_2g +ffffffff829ccbf0 r ar9285_1_2_tx_gain_high_power_vals_2g +ffffffff829ccc90 r ar9285_1_2_tx_gain_vals_2g +ffffffff829cd000 r ar9287_1_1_ini +ffffffff829cd068 r ar9280_2_0_serdes +ffffffff829cd080 r ar9287_1_1_rx_gain +ffffffff829cd0a0 r ar9287_1_1_tx_gain +ffffffff829cd0c0 r ar9287_1_1_regs +ffffffff829cd120 r ar9287_1_1_vals_2g40 +ffffffff829cd1d0 r ar9287_1_1_vals_2g20 +ffffffff829cd280 r ar9287_1_1_cm_regs +ffffffff829cd560 r ar9287_1_1_cm_vals +ffffffff829cdb20 r ar9280_2_0_serdes_regs +ffffffff829cdb50 r ar9280_2_0_serdes_vals +ffffffff829cdb80 r ar9287_1_1_rx_gain_regs +ffffffff829cdd90 r ar9287_1_1_rx_gain_vals_2g +ffffffff829ce1a0 r ar9287_1_1_tx_gain_regs +ffffffff829ce200 r ar9287_1_1_tx_gain_vals_2g +ffffffff829cf000 r athn_rates +ffffffff829d0000 r ar9485_1_1_ini +ffffffff829d0068 r ar9485_1_1_serdes +ffffffff829d0080 r ar9380_2_2_ini +ffffffff829d00e8 r ar9380_2_2_serdes +ffffffff829d0100 r ar9380_2_2_rx_gain_wo_xlna +ffffffff829d0120 r ar9380_2_2_rx_gain +ffffffff829d0140 r ar9485_1_1_rx_gain +ffffffff829d0160 r ar9380_2_2_tx_gain_high_ob_db +ffffffff829d0180 r ar9380_2_2_tx_gain_low_ob_db +ffffffff829d01a0 r ar9380_2_2_tx_gain_high_power +ffffffff829d01c0 r ar9380_2_2_tx_gain +ffffffff829d01e0 r ar9485_1_1_tx_gain +ffffffff829d0200 r ar9485_1_1_regs +ffffffff829d0270 r ar9485_1_1_vals_2g40 +ffffffff829d0350 r ar9485_1_1_vals_2g20 +ffffffff829d0430 r ar9485_1_1_cm_regs +ffffffff829d0720 r ar9485_1_1_cm_vals +ffffffff829d0d00 r ar9485_1_1_serdes_regs +ffffffff829d0d0c r ar9485_1_1_serdes_vals +ffffffff829d0d20 r ar9380_2_2_regs +ffffffff829d0db0 r ar9380_2_2_vals_5g20 +ffffffff829d0ed0 r ar9380_2_2_vals_5g40 +ffffffff829d0ff0 r ar9380_2_2_vals_2g40 +ffffffff829d1110 r ar9380_2_2_vals_2g20 +ffffffff829d1230 r ar9380_2_2_cm_regs +ffffffff829d15d0 r ar9380_2_2_cm_vals +ffffffff829d1d00 r ar9380_2_2_fast_clock_regs +ffffffff829d1d20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff829d1d50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff829d1d74 r ar9380_2_2_serdes_regs +ffffffff829d1d80 r ar9380_2_2_serdes_vals +ffffffff829d1d90 r ar9380_2_2_rx_gain_regs +ffffffff829d1f90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff829d2390 r ar9380_2_2_rx_gain_vals +ffffffff829d2790 r ar9485_1_1_rx_gain_regs +ffffffff829d2890 r ar9485_1_1_rx_gain_vals +ffffffff829d2a90 r ar9380_2_2_tx_gain_regs +ffffffff829d2b60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff829d2d00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff829d2ea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff829d3040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff829d31e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff829d3380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff829d3520 r ar9380_2_2_tx_gain_vals_5g +ffffffff829d36c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff829d3860 r ar9485_1_1_tx_gain_regs +ffffffff829d38f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff829d3a10 r ar9380_def_rom +ffffffff829d3e50 r ar9380_def_rom_h112 +ffffffff829d4290 r ar9380_def_rom_h116 +ffffffff829d46d0 r ar9380_def_rom_x112 +ffffffff829d4b10 r ar9380_def_rom_x113 +ffffffff829d5000 R atw_txthresh_tab_lo +ffffffff829d5050 R atw_txthresh_tab_hi +ffffffff829d50a0 r atw_attach.empty_macaddr +ffffffff829d50b0 r atw_attach.type_strings +ffffffff829d50d0 r atw_rfmd2958_ifn +ffffffff829d5110 r atw_rfmd2958_rf1r +ffffffff829d5150 r atw_rxintr.rate_tbl +ffffffff829d6000 r rtw_identify_sta.empty_macaddr +ffffffff829d7000 r rtwn_set_key.etherzeroaddr +ffffffff829d7010 r rtl8188eu_rf_prog +ffffffff829d7030 r rtl8188ftv_rf_prog +ffffffff829d7050 r rtl8192e_rf_prog +ffffffff829d7080 r rtl8188ce_rf_prog +ffffffff829d70a0 r rtl8188ru_rf_prog +ffffffff829d70c0 r rtl8188cu_rf_prog +ffffffff829d70e0 r rtl8192ce_rf_prog +ffffffff829d7110 r rtl8188ru_txagc +ffffffff829d7170 r rtl8188eu_rf_regs +ffffffff829d7230 r rtl8188eu_rf_vals +ffffffff829d73b0 r rtl8188ftv_rf_regs +ffffffff829d7490 r rtl8188ftv_rf_vals +ffffffff829d7640 r rtl8192e_rf_regs +ffffffff829d7710 r rtl8192e_rf_vals +ffffffff829d78b0 r rtl8192e_rf2_regs +ffffffff829d7950 r rtl8192e_rf2_vals +ffffffff829d7a90 r rtl8192ce_rf1_regs +ffffffff829d7bb0 r rtl8188ce_rf_vals +ffffffff829d7df0 r rtl8188ru_rf_vals +ffffffff829d8030 r rtl8188cu_rf_vals +ffffffff829d8270 r rtl8192ce_rf1_vals +ffffffff829d84b0 r rtl8192ce_rf2_regs +ffffffff829d8500 r rtl8192ce_rf2_vals +ffffffff829d85a0 r rtl8192cu_txagc +ffffffff829d9000 r rt2560_rf2522_r2 +ffffffff829d9040 r rt2560_rf2524_r2 +ffffffff829d9080 r rt2560_rf2525_hi_r2 +ffffffff829d90c0 r rt2560_rf2525_r2 +ffffffff829d9100 r rt2560_rf2525e_r2 +ffffffff829d9140 r rt2560_rf2526_hi_r2 +ffffffff829d9180 r rt2560_rf2526_r2 +ffffffff829d91c0 r rt2560_def_bbp +ffffffff829d9200 r rt2560_def_mac +ffffffff829da000 r rt2661_rf5225_1 +ffffffff829da300 r rt2661_rf5225_2 +ffffffff829da600 r rt2661_def_bbp +ffffffff829da640 r rt2661_def_mac +ffffffff829db000 r rt2860_rf2850 +ffffffff829db430 r rt2860_rates +ffffffff829db4f0 r rt3572_def_rf +ffffffff829db530 r rt3090_def_rf +ffffffff829db560 r rt5392_def_rf +ffffffff829db5e0 r rt3290_def_rf +ffffffff829db640 r rt5390_def_rf +ffffffff829db6c0 r rt5390_def_bbp +ffffffff829db6f0 r rt2860_def_mac +ffffffff829dd000 r acx111_reg +ffffffff829dd040 r acx111_rate_map +ffffffff829de000 r acx100_reg +ffffffff829de040 r acx100_txpower_rfmd +ffffffff829de060 r gen8_rcs_offsets +ffffffff829de090 r acx100_txpower_maxim +ffffffff829de0b0 r mtl_rcs_offsets +ffffffff829de0f0 r digits +ffffffff829de0f0 r pppdumpb.digits +ffffffff829de0f0 r pppdumpm.digits +ffffffff829de140 r hangpic +ffffffff829de180 r gen11_rcs_offsets +ffffffff829de1b0 r xehp_rcs_offsets +ffffffff829de1e0 r dg2_rcs_offsets +ffffffff829de220 r dg2_xcs_offsets +ffffffff829de250 r gen12_xcs_offsets +ffffffff829df000 r trinity_override_mgpg_sequences +ffffffff829df3c0 r voltage_swing_to_pre_emphasis +ffffffff829df3d0 r sgpr_init_compute_shader +ffffffff829df4a0 r intel_hpll_vco.cl_vco +ffffffff829df4c0 r vgpr_init_compute_shader +ffffffff829e0000 r malo_cmd_string.cmds +ffffffff829e00b0 r malo_cmd_string_result.results +ffffffff829e1000 R bwi_vendor_led_act +ffffffff829e100c R bwi_default_led_act +ffffffff829e1010 R bwi_led_duration +ffffffff829e1380 r bwi_sup_bphy +ffffffff829e13c0 r bwi_phy_freq_11g_rev1 +ffffffff829e15c0 r bwi_phy_rotor_11g_rev1 +ffffffff829e16a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff829e16e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff829e1720 r bwi_phy_noise_scale_11g +ffffffff829e1760 r bwi_phy_sigma_sq_11g_rev2 +ffffffff829e17d0 r bwi_phy_sigma_sq_11g_rev7 +ffffffff829e1840 r bwi_phy_delay_11g_rev1 +ffffffff829e1920 r bwi_rf_get_gains.save_phy_regs +ffffffff829e1940 r bwi_rf_lo_find.map +ffffffff829e1960 r bwi_txpower_map_11b +ffffffff829e19a0 r bwi_txpower_map_11g +ffffffff829e19e0 r _bwi_rf_lo_update_11g.rf_atten_list +ffffffff829e1a20 r _bwi_rf_lo_update_11g.rf_atten_init_list +ffffffff829e1a60 r _bwi_rf_lo_update_11g.rf_lo_measure_order +ffffffff829e1aa0 r bwi_rf_set_nrssi_ofs_11g.save_phy_comm_regs +ffffffff829e1ac0 r bwi_bbpid_map +ffffffff829e1af0 r bwi_regwin_count +ffffffff829e1b40 r bwi_clkfreq +ffffffff829e1b58 r bwi_zero_addr +ffffffff829e2000 R ipq8074_ops +ffffffff829e2070 R ipq6018_ops +ffffffff829e20e0 R qca6390_ops +ffffffff829e2150 R qcn9074_ops +ffffffff829e21c0 R wcn6855_ops +ffffffff829e2230 R wcn6750_ops +ffffffff829e22a0 R ath11k_hw_ring_mask_ipq8074 +ffffffff829e22f8 R ath11k_hw_ring_mask_qca6390 +ffffffff829e2350 R ath11k_hw_ring_mask_qcn9074 +ffffffff829e23a8 R ath11k_hw_ring_mask_wcn6750 +ffffffff829e2400 R ath11k_target_ce_config_wlan_ipq8074 +ffffffff829e2510 R ath11k_target_service_to_ce_map_wlan_ipq8074 +ffffffff829e2620 R ath11k_target_service_to_ce_map_wlan_ipq6018 +ffffffff829e2710 R ath11k_target_ce_config_wlan_qca6390 +ffffffff829e27f0 R ath11k_target_service_to_ce_map_wlan_qca6390 +ffffffff829e28b0 R ath11k_target_ce_config_wlan_qcn9074 +ffffffff829e2990 R ath11k_target_service_to_ce_map_wlan_qcn9074 +ffffffff829e2a70 R qwx_host_ce_config_ipq8074 +ffffffff829e2d10 R qwx_host_ce_config_qca6390 +ffffffff829e2e30 R qwx_host_ce_config_qcn9074 +ffffffff829e2ef0 R ipq8074_regs +ffffffff829e2fc4 R qca6390_regs +ffffffff829e3098 R qcn9074_regs +ffffffff829e316c R wcn6855_regs +ffffffff829e3240 R wcn6750_regs +ffffffff829e3320 R qmi_response_type_v01_ei +ffffffff829e3380 R qmi_wlanfw_ind_register_req_msg_v01_ei +ffffffff829e36a0 R qmi_wlanfw_ind_register_resp_msg_v01_ei +ffffffff829e3720 R qmi_wlanfw_host_cap_req_msg_v01_ei +ffffffff829e3aa0 R qmi_wlanfw_host_cap_resp_msg_v01_ei +ffffffff829e3ae0 R qmi_wlanfw_mem_cfg_s_v01_ei +ffffffff829e3b60 R qmi_wlanfw_mem_seg_s_v01_ei +ffffffff829e3c00 R qmi_wlanfw_request_mem_ind_msg_v01_ei +ffffffff829e3c60 R qmi_wlanfw_mem_seg_resp_s_v01_ei +ffffffff829e3d00 R qmi_wlanfw_respond_mem_req_msg_v01_ei +ffffffff829e3d60 R qmi_wlanfw_respond_mem_resp_msg_v01_ei +ffffffff829e3da0 R qmi_wlanfw_cap_req_msg_v01_ei +ffffffff829e3dc0 R qmi_wlanfw_rf_chip_info_s_v01_ei +ffffffff829e3e20 R qmi_wlanfw_rf_board_info_s_v01_ei +ffffffff829e3e60 R qmi_wlanfw_soc_info_s_v01_ei +ffffffff829e3ea0 R qmi_wlanfw_fw_version_info_s_v01_ei +ffffffff829e3f00 R qmi_wlanfw_cap_resp_msg_v01_ei +ffffffff829e41c0 R qmi_wlanfw_bdf_download_req_msg_v01_ei +ffffffff829e43a0 R qmi_wlanfw_bdf_download_resp_msg_v01_ei +ffffffff829e43e0 R qmi_wlanfw_m3_info_req_msg_v01_ei +ffffffff829e4440 R qmi_wlanfw_m3_info_resp_msg_v01_ei +ffffffff829e4480 R qmi_wlanfw_wlan_ini_req_msg_v01_ei +ffffffff829e44e0 R qmi_wlanfw_wlan_ini_resp_msg_v01_ei +ffffffff829e4520 R qmi_wlanfw_ce_tgt_pipe_cfg_s_v01_ei +ffffffff829e45e0 R qmi_wlanfw_ce_svc_pipe_cfg_s_v01_ei +ffffffff829e4660 R qmi_wlanfw_shadow_reg_cfg_s_v01_ei +ffffffff829e46c0 R qmi_wlanfw_shadow_reg_v2_cfg_s_v01_ei +ffffffff829e4700 R qmi_wlanfw_wlan_mode_req_msg_v01_ei +ffffffff829e4780 R qmi_wlanfw_wlan_mode_resp_msg_v01_ei +ffffffff829e47c0 R qmi_wlanfw_wlan_cfg_req_msg_v01_ei +ffffffff829e49a0 R qmi_wlanfw_wlan_cfg_resp_msg_v01_ei +ffffffff829e49e0 r wmi_tlv_policies +ffffffff829e6740 r qwx_hw_mode_pri_map +ffffffff829e6770 r ath11k_hw_params +ffffffff829e6cf0 r hw_srng_config_templ +ffffffff829e6fa8 r ath11k_hw_hal_params_ipq8074 +ffffffff829e6fb8 r ath11k_hw_hal_params_qca6390 +ffffffff829e6fc8 r ath11k_hw_hal_params_wcn6750 +ffffffff829e6fd8 r ath11k_hw_tcl2wbm_rbm_map_ipq8074 +ffffffff829e6fe1 r ath11k_hw_tcl2wbm_rbm_map_wcn6750 +ffffffff829e8000 R uhci_bus_methods +ffffffff829e8030 R uhci_root_ctrl_methods +ffffffff829e8060 R uhci_root_intr_methods +ffffffff829e8090 R uhci_device_ctrl_methods +ffffffff829e80c0 R uhci_device_intr_methods +ffffffff829e80f0 R uhci_device_bulk_methods +ffffffff829e8120 R uhci_device_isoc_methods +ffffffff829e8150 R uhci_devd +ffffffff829e8162 R uhci_confd +ffffffff829e816b R uhci_ifcd +ffffffff829e8174 R uhci_endpd +ffffffff829e817b R uhci_hubd_piix +ffffffff829e9000 R revbits +ffffffff829e9020 R ohci_bus_methods +ffffffff829e9050 R ohci_root_ctrl_methods +ffffffff829e9080 R ohci_root_intr_methods +ffffffff829e90b0 R ohci_device_ctrl_methods +ffffffff829e90e0 R ohci_device_intr_methods +ffffffff829e9110 R ohci_device_bulk_methods +ffffffff829e9140 R ohci_device_isoc_methods +ffffffff829e9170 R ohci_devd +ffffffff829e9182 R ohci_confd +ffffffff829e918b R ohci_ifcd +ffffffff829e9194 R ohci_endpd +ffffffff829e919b R ohci_hubd +ffffffff829ea000 R ehci_bus_methods +ffffffff829ea030 R ehci_root_ctrl_methods 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sys_gettimeofday.zerotz +ffffffff82a1e000 r taskq_sys_name +ffffffff82a1e006 r taskq_sys_mp_name +ffffffff82a1e010 R systq +ffffffff82a1e018 R systqmp +ffffffff82a20000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff82a20010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff82a20020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff82a20030 r gpt_get_fstype.gpt_uuid_linux +ffffffff82a20040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff82a20050 r gpt_get_fstype.gpt_uuid_unused +ffffffff82a20060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff82a20070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff82a21000 r hiballoc_addr_RBT_INFO +ffffffff82a21018 R hiballoc_addr_RBT_TYPE +ffffffff82a22000 R logread_filtops +ffffffff82a23000 r phtree_RBT_INFO +ffffffff82a23018 R phtree_RBT_TYPE +ffffffff82a23020 r pool_lock_ops_rw +ffffffff82a23058 r pool_lock_ops_mtx +ffffffff82a24000 R pipe_rfiltops +ffffffff82a24030 R pipe_wfiltops +ffffffff82a24060 R pipe_efiltops +ffffffff82a24090 r pipeops +ffffffff82a25000 R socketops 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R spec_vops +ffffffff82a34000 R dead_vops +ffffffff82a35000 R fifo_vops +ffffffff82a35110 R fiforead_filtops +ffffffff82a35140 R fifowrite_filtops +ffffffff82a35170 R fifoexcept_filtops +ffffffff82a36000 R regyear +ffffffff82a36020 R leapyear +ffffffff82a36040 r dos2unix +ffffffff82a36140 r u2l +ffffffff82a36240 r unix2dos +ffffffff82a37008 R msdosfs_vfsops +ffffffff82a38000 R msdosfs_vops +ffffffff82a38110 R msdosfsread_filtops +ffffffff82a38140 R msdosfswrite_filtops +ffffffff82a38170 R msdosfsvnode_filtops +ffffffff82a39000 r _utf_count +ffffffff82a3a000 R ntfs_vfsops +ffffffff82a3b000 R ntfs_vops +ffffffff82a3c000 R bpfread_filtops +ffffffff82a3c030 R bpf_mbuf_ops +ffffffff82a3d000 r bpf_mem_ops +ffffffff82a3e000 R priq_ops +ffffffff82a3e038 R ifq_priq_ops +ffffffff82a3e040 r ifq_kstat_tpl +ffffffff82a3e180 r ifiq_kstat_tpl +ffffffff82a3f000 r ether_crc32_le_update.crctab +ffffffff82a3f040 r ether_crc32_be_update.crctab +ffffffff82a40000 r lcp +ffffffff82a40078 r ipcp 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nvgre_mcast_tree_RBT_INFO +ffffffff82a4c0a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff82a4c0b0 r eoip_tree_RBT_INFO +ffffffff82a4c0c8 R eoip_tree_RBT_TYPE +ffffffff82a4c0d0 r nvgre_etherbridge_ops +ffffffff82a4d000 r trunk_protos +ffffffff82a4e000 R ethermulticastaddr_slowprotocols +ffffffff82a4e006 R lacp_info_tlv_template +ffffffff82a4e00e R marker_info_tlv_template +ffffffff82a4e012 R marker_response_tlv_template +ffffffff82a4e020 R lacp_timer_funcs +ffffffff82a4f000 r lacp_rxm_state_names +ffffffff82a4f040 r lacp_rxm_event_names +ffffffff82a4f090 r aggr_port_selected_names +ffffffff82a4f0b0 r lacp_mux_state_names +ffffffff82a4f0e0 r lacp_mux_event_names +ffffffff82a4f128 r lacp_address_slow +ffffffff82a50000 r tpmr_pf_ipv4 +ffffffff82a50018 r tpmr_pf_ipv6 +ffffffff82a51000 r bpe_tree_RBT_INFO +ffffffff82a51018 R bpe_tree_RBT_TYPE +ffffffff82a51020 r bpe_etherbridge_ops +ffffffff82a52000 R pppx_rd_filtops +ffffffff82a52030 R pppx_wr_filtops +ffffffff82a52060 r pppx_ifs_RBT_INFO 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ieee80211_ess_tree_RBT_TYPE +ffffffff82a59048 r ieee80211_do_slow_print.merge_print_intvl +ffffffff82a5a020 R ieee80211_edca_table +ffffffff82a5a0e0 R ieee80211_qap_edca_table +ffffffff82a5b000 R ieee80211_mgt_subtype_name +ffffffff82a5b080 R ieee80211_state_name +ffffffff82a5b0b0 R ieee80211_phymode_name +ffffffff82a5c000 r ieee80211_r_ctry +ffffffff82a5cae0 r ieee80211_r_names +ffffffff82a5cf80 r ieee80211_r_map +ffffffff82a5e000 R zeroin46_addr +ffffffff82a5e010 R zeroin_addr +ffffffff82a5f000 R inetdomain +ffffffff82a5f050 R inetsw +ffffffff82a60000 R divertctl_vars +ffffffff82a60030 R divert_usrreqs +ffffffff82a61000 R icmpctl_vars +ffffffff82a62000 R ipctl_vars_unlocked +ffffffff82a62050 R ipctl_vars +ffffffff82a62140 R inetctlerrmap +ffffffff82a63000 R rip_usrreqs +ffffffff82a64000 R tcp_timer_funcs +ffffffff82a65000 R tcp_usrreqs +ffffffff82a65090 R tcp6_usrreqs +ffffffff82a65120 R tcpctl_vars +ffffffff82a66000 R udp_usrreqs +ffffffff82a66090 R udp6_usrreqs +ffffffff82a66120 R udpctl_vars +ffffffff82a67000 R gre_usrreqs +ffffffff82a68000 r ipsec_ids_tree_RBT_INFO +ffffffff82a68018 R ipsec_ids_tree_RBT_TYPE +ffffffff82a68020 r ipsec_ids_flows_RBT_INFO +ffffffff82a68038 R ipsec_ids_flows_RBT_TYPE +ffffffff82a68040 R xformsw +ffffffff82a68158 R xformswNXFORMSW +ffffffff82a69000 R espctl_vars +ffffffff82a69050 R ahctl_vars +ffffffff82a69070 R ipcompctl_vars +ffffffff82a69090 R ipsecctl_vars +ffffffff82a6a000 R ipseczeroes +ffffffff82a6b000 r carp_set_state.carp_states +ffffffff82a6c000 r Rcon +ffffffff82a6d000 r Te2 +ffffffff82a6d400 r Te3 +ffffffff82a6d800 r Te0 +ffffffff82a6dc00 r Te1 +ffffffff82a6e000 r rcon +ffffffff82a6e030 r Td0 +ffffffff82a6e430 r Td1 +ffffffff82a6e830 r Td2 +ffffffff82a6ec30 r Td3 +ffffffff82a6f030 r Td4 +ffffffff82a71000 r K256 +ffffffff82a71100 r sha512_initial_hash_value +ffffffff82a71140 r K512 +ffffffff82a713c0 r sha384_initial_hash_value +ffffffff82a72000 r Blowfish_initstate.initstate +ffffffff82a74000 r cast_sbox1 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+ffffffff82a793e8 R auth_hash_hmac_sha2_512_256 +ffffffff82a79430 R auth_hash_gmac_aes_128 +ffffffff82a79478 R auth_hash_gmac_aes_192 +ffffffff82a794c0 R auth_hash_gmac_aes_256 +ffffffff82a79508 R auth_hash_chacha20_poly1305 +ffffffff82a79550 R comp_algo_deflate +ffffffff82a7a000 r IV +ffffffff82a7b000 r idgen32_ftable +ffffffff82a7c000 r Chacha20_Poly1305_Update.zeroes +ffffffff82a7c010 r pad0 +ffffffff82a7d000 r null_point +ffffffff82a7d020 r base_point +ffffffff82a7e000 R mplsdomain +ffffffff82a7f000 R mplsctl_vars +ffffffff82a80000 r nfsread_filtops +ffffffff82a80030 r nfswrite_filtops +ffffffff82a80060 r nfsvnode_filtops +ffffffff82a81000 r nfs_nodetree_RBT_INFO +ffffffff82a81018 R nfs_nodetree_RBT_TYPE +ffffffff82a82000 r nfs_ptimers +ffffffff82a83000 R nfsv2_type +ffffffff82a83030 R nfsv3_type +ffffffff82a83060 R nv2tov_type +ffffffff82a83080 R nv3tov_type +ffffffff82a830a0 R nfsv3_procid +ffffffff82a83100 R nfsv2_procid +ffffffff82a83160 r nfsrv_v3errmap +ffffffff82a83210 r nfsrv_v2errmap +ffffffff82a83256 r nfsv3err_null +ffffffff82a8325a r nfsv3err_getattr +ffffffff82a83270 r nfsv3err_setattr +ffffffff82a83290 r nfsv3err_lookup +ffffffff82a832a4 r nfsv3err_access +ffffffff82a832b0 r nfsv3err_readlink +ffffffff82a832d0 r nfsv3err_read +ffffffff82a832f0 r nfsv3err_write +ffffffff82a83310 r nfsv3err_create +ffffffff82a83330 r nfsv3err_mkdir +ffffffff82a83350 r nfsv3err_symlink +ffffffff82a83370 r nfsv3err_mknod +ffffffff82a83390 r nfsv3err_remove +ffffffff82a833b0 r nfsv3err_rmdir +ffffffff82a833d0 r nfsv3err_rename +ffffffff82a83400 r nfsv3err_link +ffffffff82a83430 r nfsv3err_readdir +ffffffff82a83450 r nfsv3err_readdirplus +ffffffff82a83466 r nfsv3err_fsstat +ffffffff82a83472 r nfsv3err_fsinfo +ffffffff82a8347c r nfsv3err_pathconf +ffffffff82a83486 r nfsv3err_commit +ffffffff82a84000 r nfsrv3_procs +ffffffff82a85000 R nfs_vfsops +ffffffff82a86000 R nfs_vops +ffffffff82a86110 R nfs_specvops +ffffffff82a86220 R nfs_fifovops +ffffffff82a87000 r fserr_interval +ffffffff82a88000 R around +ffffffff82a88030 R inside +ffffffff82a88060 R fragtbl124 +ffffffff82a88160 R fragtbl8 +ffffffff82a89000 R ffs_vfsops +ffffffff82a89070 R sbtry +ffffffff82a89080 R ffs_vars +ffffffff82a8a000 R ffs_vops +ffffffff82a8a110 R ffs_specvops +ffffffff82a8a220 R ffs_fifovops +ffffffff82a8b000 R mfs_vfsops +ffffffff82a8c000 R mfs_vops +ffffffff82a8d000 r quotatypes +ffffffff82a8e000 R ufsread_filtops +ffffffff82a8e030 R ufswrite_filtops +ffffffff82a8e060 R ufsvnode_filtops +ffffffff82a90000 R ext2fs_vfsops +ffffffff82a90070 r incompat +ffffffff82a91000 R ext2fs_vops +ffffffff82a91110 R ext2fs_specvops +ffffffff82a91220 R ext2fs_fifovops +ffffffff82a92000 R uaddr_kernel_functions +ffffffff82a92030 R uaddr_rnd_functions +ffffffff82a92060 R uaddr_bestfit_functions +ffffffff82a92090 R uaddr_pivot_functions +ffffffff82a920c0 R uaddr_stack_brk_functions +ffffffff82a920f0 r uaddr_free_rbtree_RBT_INFO +ffffffff82a92108 R uaddr_free_rbtree_RBT_TYPE +ffffffff82a93000 R aobj_pager +ffffffff82a94000 R uvm_deviceops +ffffffff82a95000 R kv_uarea +ffffffff82a96000 R kv_any +ffffffff82a96018 R kv_intrsafe +ffffffff82a96030 R kv_page +ffffffff82a96048 R kp_dirty +ffffffff82a96070 R kp_dma +ffffffff82a96098 R kp_dma_contig +ffffffff82a960c0 R kp_dma_zero +ffffffff82a960e8 R kp_zero +ffffffff82a96110 R kp_pageable +ffffffff82a96138 R kp_none +ffffffff82a96160 R kd_waitok +ffffffff82a96178 R kd_nowait +ffffffff82a96190 R kd_trylock +ffffffff82a97000 R vmmapbsy +ffffffff82a97010 r page_flagbits +ffffffff82a970a8 r uvm_map_addr_RBT_INFO +ffffffff82a970c0 R uvm_map_addr_RBT_TYPE +ffffffff82a98000 R pmap_pager +ffffffff82a98048 R bufcache_pager +ffffffff82a99000 r uvm_objtree_RBT_INFO +ffffffff82a99018 R uvm_objtree_RBT_TYPE +ffffffff82a9a000 r uvm_pmr_addr_RBT_INFO +ffffffff82a9a018 R uvm_pmr_addr_RBT_TYPE +ffffffff82a9a020 r uvm_pmr_size_RBT_INFO +ffffffff82a9a038 R uvm_pmr_size_RBT_TYPE +ffffffff82a9a040 r uvm_pmemrange_addr_RBT_INFO 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pci_subclass_network +ffffffff82b13250 R pci_subclass_display +ffffffff82b132d0 R pci_subclass_multimedia +ffffffff82b13360 R pci_subclass_memory +ffffffff82b133c0 R pci_subclass_bridge +ffffffff82b13510 R pci_subclass_communications +ffffffff82b135d0 R pci_subclass_system +ffffffff82b136c0 R pci_subclass_input +ffffffff82b13770 R pci_subclass_dock +ffffffff82b137c0 R pci_subclass_processor +ffffffff82b13880 R pci_subclass_serialbus +ffffffff82b13990 R pci_subclass_wireless +ffffffff82b13a70 R pci_subclass_i2o +ffffffff82b13aa0 R pci_subclass_satcom +ffffffff82b13b20 R pci_subclass_crypto +ffffffff82b13b80 R pci_subclass_dasp +ffffffff82b13c10 R pci_class +ffffffff82b13e20 r pci_known_vendors +ffffffff82b15410 r pci_known_products +ffffffff82b3a000 R vga_pci_ca +ffffffff82b3a030 r vga_devs +ffffffff82b3b000 R ahc_pci_ident_table +ffffffff82b3b5d0 R ahc_pci_ca +ffffffff82b3c000 R ahd_pci_ident_table +ffffffff82b3c198 R ahd_num_pci_devs +ffffffff82b3c1a0 R ahd_pci_ca +ffffffff82b3c1d0 r pci_bus_modes +ffffffff82b3c210 r pci_status_strings +ffffffff82b3c250 r pci_status_source +ffffffff82b3c290 r split_status_strings +ffffffff82b3d000 R adw_pci_ca +ffffffff82b3d028 R adw_pci_devices +ffffffff82b3e000 r adw_3550_Default_EEPROM +ffffffff82b3e080 r adw_38C0800_Default_EEPROM +ffffffff82b3e100 r adw_38C1600_Default_EEPROM +ffffffff82b3f000 R adw_asc3550_mcode +ffffffff82b403a0 R adw_asc3550_mcode_data +ffffffff82b403b0 R adw_asc38C0800_mcode +ffffffff82b41888 R adw_asc38C0800_mcode_data +ffffffff82b418a0 R adw_asc38C1600_mcode +ffffffff82b43160 R adw_asc38C1600_mcode_data +ffffffff82b44000 R twe_pci_ca +ffffffff82b44028 R twe_pci_devices +ffffffff82b45000 R arc_ca +ffffffff82b45028 R arc_switch +ffffffff82b45050 r arc_devices +ffffffff82b45190 r arc_intel +ffffffff82b45198 r arc_marvell +ffffffff82b451a0 r arc_lsi +ffffffff82b451a8 r arc_marvell2 +ffffffff82b46000 R jmb_ca +ffffffff82b46030 r jmb_devices +ffffffff82b47000 R ahci_pci_ca +ffffffff82b47028 R ahci_jmb_ca +ffffffff82b47050 r ahci_devices +ffffffff82b48000 R nvme_pci_ca +ffffffff82b49000 R ami_pci_ca +ffffffff82b49030 r ami_pci_subsys +ffffffff82b49270 r ami_pci_vendors +ffffffff82b4a000 R mfi_pci_ca +ffffffff82b4a030 r mfi_pci_devices +ffffffff82b4b000 R mfii_ca +ffffffff82b4b028 R mfii_switch +ffffffff82b4b050 R mfii_pd_switch +ffffffff82b4b078 R mfii_iop_thunderbolt +ffffffff82b4b088 R mfii_iop_25 +ffffffff82b4b098 R mfii_iop_35 +ffffffff82b4b0b0 R mfii_devices +ffffffff82b4b180 r mfi_bbu_indicators +ffffffff82b4c000 R ips_ca +ffffffff82b4c028 r ips_ids +ffffffff82b4c040 r ips_chips +ffffffff82b4c090 r ips_names +ffffffff82b4c128 r ips_switch +ffffffff82b4c150 r ips_pt_switch +ffffffff82b4d000 R eap_ca +ffffffff82b4d028 R eap1370_hw_if +ffffffff82b4d0e0 R eap1371_hw_if +ffffffff82b4d198 R eap_midi_hw_if +ffffffff82b4d1d0 R eap_devices +ffffffff82b4e000 R auacer_pci_devices +ffffffff82b4e008 R auacer_ca +ffffffff82b4e030 R auacer_hw_if +ffffffff82b4f000 R auich_ca +ffffffff82b4f028 R auich_hw_if +ffffffff82b4f0e0 r auich_devices +ffffffff82b50000 R azalia_ca +ffffffff82b50028 R azalia_hw_if +ffffffff82b500e0 R azalia_pci_devices +ffffffff82b50120 r pin_devices +ffffffff82b501a0 r line_colors +ffffffff82b50220 r wtypes +ffffffff82b51000 r azalia_codec_init_dolby_atmos.atmos_init +ffffffff82b51050 r azalia_codec_init_dolby_atmos.atmos_v23_v25 +ffffffff82b52000 R envy_ca +ffffffff82b52028 R envy_hw_if +ffffffff82b520e0 R envy_midi_hw_if +ffffffff82b53000 R emuxki_devices +ffffffff82b53010 R emu_ca +ffffffff82b53038 R emuxki_hw_if +ffffffff82b530f0 r emuxki_recbuf_sz +ffffffff82b53170 r emuxki_recsrc_szreg +ffffffff82b5317c r emuxki_recsrc_bufaddrreg +ffffffff82b53190 r emuxki_rate_to_pitch.logMagTable +ffffffff82b53390 r emuxki_rate_to_pitch.logSlopeTable +ffffffff82b54000 R auixp_pci_devices +ffffffff82b54010 R auixp_ca +ffffffff82b54038 R auixp_hw_if +ffffffff82b55000 R clcs_ca +ffffffff82b55028 R cs4280_hw_if +ffffffff82b550e0 R cs4280_devices +ffffffff82b56000 R yds_ca +ffffffff82b56028 r yds_hw_if +ffffffff82b560e0 r yds_chip_capability_list +ffffffff82b56120 r yds_get_lpfk.lpfkt +ffffffff82b56160 r yds_get_lpfq.lpfqt +ffffffff82b57000 R auvia_ca +ffffffff82b57028 R auvia_hw_if +ffffffff82b570e0 R auvia_devices +ffffffff82b570f0 r auvia_set_params_sub.slottab +ffffffff82b58000 R gdt_pci_ca +ffffffff82b59000 R ciss_pci_ca +ffffffff82b59030 R ciss_pci_devices +ffffffff82b5a000 R qlw_pci_ca +ffffffff82b5a030 r qlw_devices +ffffffff82b5a050 r isp_1040_risc_code +ffffffff82b5f9f0 r isp_1080_risc_code +ffffffff82b67470 r isp_12160_risc_code +ffffffff82b6f000 R qla_pci_ca +ffffffff82b6f030 r qla_devices +ffffffff82b70000 R qle_ca +ffffffff82b70028 R qle_switch +ffffffff82b70050 r qle_devices +ffffffff82b70070 r isp_2400_risc_code +ffffffff82b9fa50 r isp_2500_risc_code +ffffffff82bd2000 R mpi_pci_ca +ffffffff82bd2030 r mpi_devices +ffffffff82bd3000 R mpii_ca +ffffffff82bd3028 R mpii_switch +ffffffff82bd3050 r mpii_devices +ffffffff82bd4000 R sili_pci_ca +ffffffff82bd4030 r sili_devices +ffffffff82bd5000 R aq_devices +ffffffff82bd5060 R aq_products +ffffffff82bd51d0 R aq_fw1x_ops +ffffffff82bd51f8 R aq_fw2x_ops +ffffffff82bd5220 R aq2_fw_ops +ffffffff82bd5248 R aq_ca +ffffffff82bd6000 R de_ca +ffffffff82bd6030 r tulip_srom_conninfo +ffffffff82bd6120 r tulip_mii_phy_attrlist +ffffffff82bd61e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff82bd6208 r tulip_21040_10baset_only_boardsw +ffffffff82bd6230 r tulip_21040_boardsw +ffffffff82bd6258 r tulip_2114x_isv_boardsw +ffffffff82bd6280 r tulip_21140_smc9332_boardsw +ffffffff82bd62a8 r tulip_21040_auibnc_only_boardsw +ffffffff82bd62d0 r tulip_21140_cogent_em100_boardsw +ffffffff82bd62f8 r tulip_21140_accton_boardsw +ffffffff82bd6320 r tulip_21140_eb_boardsw +ffffffff82bd6348 r tulip_21041_boardsw +ffffffff82bd6370 r tulip_read_macaddr.testpat +ffffffff82bd6380 r tulip_vendors +ffffffff82bd6430 r tulip_media_to_ifmedia +ffffffff82bd6490 r tulip_chipdescs +ffffffff82bd7000 R ep_pci_ca +ffffffff82bd7030 R ep_pci_devices +ffffffff82bd8000 R pcn_ca +ffffffff82bd8028 R pcn_devices +ffffffff82bd8030 r pcn_79c970_rcvfw +ffffffff82bd8050 r pcn_79c970_xmtsp +ffffffff82bd8070 r pcn_79c970_xmtfw +ffffffff82bd8090 r pcn_79c971_rcvfw +ffffffff82bd80b0 r pcn_79c971_xmtsp_sram +ffffffff82bd80d0 r pcn_79c971_xmtsp +ffffffff82bd80f0 r pcn_79c971_xmtfw +ffffffff82bd8110 r pcn_variants +ffffffff82bd9000 R siop_products +ffffffff82bda000 R siop_pci_ca +ffffffff82bdb000 R rdcide_setup +ffffffff82bdb005 R rdcide_hold +ffffffff82bdb00a R rdcide_udmatim +ffffffff82bdb010 R rdcide_udmaclk +ffffffff82bdb028 R default_product_desc +ffffffff82bdb040 R pciide_intel_products +ffffffff82bdb630 R pciide_amd_products +ffffffff82bdb690 R pciide_cmd_products +ffffffff82bdb730 R pciide_via_products +ffffffff82bdb810 R pciide_cypress_products +ffffffff82bdb820 R pciide_sis_products +ffffffff82bdb870 R pciide_natsemi_products +ffffffff82bdb890 R pciide_acer_products +ffffffff82bdb8a0 R pciide_triones_products +ffffffff82bdb8f0 R pciide_promise_products +ffffffff82bdbac0 R pciide_acard_products +ffffffff82bdbb10 R pciide_serverworks_products +ffffffff82bdbbb0 R pciide_nvidia_products +ffffffff82bdbe80 R pciide_ite_products +ffffffff82bdbea0 R pciide_ati_products +ffffffff82bdbf20 R pciide_jmicron_products +ffffffff82bdbf70 R pciide_phison_products +ffffffff82bdbf80 R pciide_rdc_products +ffffffff82bdbf90 R pciide_vendors +ffffffff82bdc140 R pciide_pci_ca +ffffffff82bdc168 R pciide_jmb_ca +ffffffff82bdc190 r piix_isp_dma +ffffffff82bdc193 r piix_rtc_dma +ffffffff82bdc196 r apollo_pio_set +ffffffff82bdc19b r cmd0643_9_data_tim_pio +ffffffff82bdc1a0 r cmd0643_9_data_tim_dma +ffffffff82bdc1a3 r cmd680_channel_map.init_val +ffffffff82bdc1b1 r cmd680_setup_channel.udma2_tbl +ffffffff82bdc1b8 r cmd680_setup_channel.dma_tbl +ffffffff82bdc1be r cmd680_setup_channel.pio_tbl +ffffffff82bdc1d0 r satalink_ba5_regmap +ffffffff82bdc690 r sii3114_chansetup.channel_names +ffffffff82bdc6b0 r cy_pio_pulse +ffffffff82bdc6c0 r sis_udma133new_tim +ffffffff82bdc6e0 r sis_pio133new_tim +ffffffff82bdc6f4 r sis_dma133new_tim +ffffffff82bdc700 r sis_udma66_tim +ffffffff82bdc706 r sis_udma100new_tim +ffffffff82bdc70c r sis_udma133old_tim +ffffffff82bdc713 r sis_pio_act +ffffffff82bdc718 r sis_pio_rec +ffffffff82bdc71d r natsemi_pio_pulse +ffffffff82bdc722 r natsemi_pio_recover +ffffffff82bdc727 r natsemi_dma_pulse +ffffffff82bdc72a r natsemi_dma_recover +ffffffff82bdc730 r scx200_udma33 +ffffffff82bdc73c r scx200_dma33 +ffffffff82bdc750 r scx200_pio33 +ffffffff82bdc778 r acer_udma +ffffffff82bdc77e r acer_pio +ffffffff82bdc790 r hpt370_pio +ffffffff82bdc7a4 r hpt370_dma +ffffffff82bdc7b0 r hpt370_udma +ffffffff82bdc7d0 r hpt372_pio +ffffffff82bdc7e4 r hpt372_dma +ffffffff82bdc7f0 r hpt372_udma +ffffffff82bdc80c r hpt366_dma +ffffffff82bdc820 r hpt366_udma +ffffffff82bdc840 r hpt374_pio +ffffffff82bdc854 r hpt374_dma +ffffffff82bdc860 r hpt374_udma +ffffffff82bdc87c r pdc2xx_pa +ffffffff82bdc881 r pdc2xx_pb +ffffffff82bdc886 r pdc2xx_dma_mb +ffffffff82bdc889 r pdc2xx_dma_mc +ffffffff82bdc88c r pdc2xx_udma_mc +ffffffff82bdc892 r acard_act_udma +ffffffff82bdc899 r acard_rec_udma +ffffffff82bdc8a0 r acard_udma_conf +ffffffff82bdc8a7 r acard_act_dma +ffffffff82bdc8aa r acard_rec_dma +ffffffff82bdc8ad r acard_act_pio +ffffffff82bdc8b2 r acard_rec_pio +ffffffff82bdc8b7 r nforce_udma +ffffffff82bdc8be r nforce_pio +ffffffff82bdc8c3 r ixp_mdma_timings +ffffffff82bdc8c6 r ixp_pio_timings +ffffffff82bdd000 R ppb_ca +ffffffff82bde000 R cy_pci_ca +ffffffff82bde030 R cy_pci_devices +ffffffff82bdf000 R rl_pci_ca +ffffffff82bdf030 R rl_pci_devices +ffffffff82be0000 R re_pci_devices +ffffffff82be0030 R re_pci_ca +ffffffff82be1000 R vr_ca +ffffffff82be2000 R txp_ca +ffffffff82be2030 R txp_devices +ffffffff82be3000 r cards +ffffffff82be4000 r format_params +ffffffff82be41a0 r pixfmt_table +ffffffff82be4320 r meteor_pixfmt_table +ffffffff82be5000 R bktr_ca +ffffffff82be5028 R bktr_hw_if +ffffffff82be6000 r tuners +ffffffff82be6170 r freqTable +ffffffff82be6260 r nabcst +ffffffff82be62a0 r irccable +ffffffff82be6310 r hrccable +ffffffff82be6380 r weurope +ffffffff82be6420 r jpnbcst +ffffffff82be6460 r jpncable +ffffffff82be64c0 r xussr +ffffffff82be6530 r australia +ffffffff82be6590 r france +ffffffff82be7000 R xl_pci_ca +ffffffff82be7030 R xl_pci_devices +ffffffff82be8000 R fxp_pci_ca +ffffffff82be8030 R fxp_pci_devices +ffffffff82be9000 R em_devices +ffffffff82be9308 R em_ca +ffffffff82be9330 r em_counters +ffffffff82bea000 r em_igp_cable_length_table +ffffffff82bea100 r em_igp_2_cable_length_table +ffffffff82beb000 R ixgb_devices +ffffffff82beb010 R ixgb_ca +ffffffff82bec000 R ixgbe_devices +ffffffff82bec0b8 R ix_ca +ffffffff82bec0e0 r ix_counters +ffffffff82bec3e0 r ix_rxq_kstats_tpl +ffffffff82bec458 r ix_txq_kstats_tpl +ffffffff82bed000 r ixgbe_mvals_base +ffffffff82bed060 r ixgbe_mvals_X540 +ffffffff82bed0c0 r ixgbe_mvals_X550 +ffffffff82bed120 r ixgbe_mvals_X550EM_x +ffffffff82bed180 r ixgbe_mvals_X550EM_a +ffffffff82bf0000 R ixl_ca +ffffffff82bf0030 R ixl_port_counters +ffffffff82bf02c0 R ixl_vsi_counters +ffffffff82bf0380 r ixl_devices +ffffffff82bf04c0 r ixl_710 +ffffffff82bf04e8 r ixl_722 +ffffffff82bf0510 r ixl_pf_aq_regs +ffffffff82bf0578 r ixl_710_decrepit +ffffffff82bf05a0 r ixl_phy_type_map +ffffffff82bf0770 r ixl_speed_type_map +ffffffff82bf07b0 r ixl_hmc_pack_rxq +ffffffff82bf0830 r ixl_hmc_pack_txq +ffffffff82bf08a0 r ixl_sfp_ops +ffffffff82bf08b8 r ixl_qsfp_ops +ffffffff82bf1000 r dwqe_pci_devices +ffffffff82bf1018 R dwqe_pci_ca +ffffffff82bf2000 R xge_ca +ffffffff82bf2028 R xge_devices +ffffffff82bf2030 r xge_fix_mac +ffffffff82bf2110 r xge_xena_dtx_cfg +ffffffff82bf2170 r xge_herc_dtx_cfg +ffffffff82bf3000 R thtc_ca +ffffffff82bf3028 R tht_ca +ffffffff82bf3050 r thtc_devices +ffffffff82bf3068 r tht_link_state.interval +ffffffff82bf4000 R myx_ca +ffffffff82bf4028 R myx_devices +ffffffff82bf5000 R oce_ca +ffffffff82bf5030 R oce_devices +ffffffff82bf6000 R dc_pci_ca +ffffffff82bf7000 R epic_pci_ca +ffffffff82bf7028 R epic_pci_devices +ffffffff82bf8000 R ti_pci_ca +ffffffff82bf8030 R ti_devices +ffffffff82bf9000 R ne_pci_ca +ffffffff82bf9030 R ne_pci_prod +ffffffff82bfa000 R gem_pci_ca +ffffffff82bfa030 R gem_pci_devices +ffffffff82bfa050 r gem_promhdr +ffffffff82bfa052 r gem_promdat +ffffffff82bfa05a r gem_promdat2 +ffffffff82bfb000 R cas_ca +ffffffff82bfb028 R cas_pci_devices +ffffffff82bfb030 r cas_promhdr +ffffffff82bfb032 r cas_promdat_sun +ffffffff82bfb03a r cas_promdat_ns +ffffffff82bfb042 r cas_promdat2 +ffffffff82bfc000 R sf_pci_ca +ffffffff82bfc028 R sf_pci_products +ffffffff82bfd000 R sis_ca +ffffffff82bfd028 R sis_devices +ffffffff82bfe000 R se_devices +ffffffff82bfe008 R se_ca +ffffffff82bff000 R mbg_ca +ffffffff82bff030 R mbg_devices +ffffffff82c00000 R uhci_pci_ca +ffffffff82c01000 R ohci_pci_ca +ffffffff82c02000 R ehci_pci_ca +ffffffff82c03000 R xhci_pci_ca +ffffffff82c04000 R cbb_pci_ca +ffffffff82c04028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff82c05000 R skc_devices +ffffffff82c05030 R skc_ca +ffffffff82c05058 R sk_ca +ffffffff82c06000 R mskc_devices +ffffffff82c060a8 R mskc_ca +ffffffff82c060d0 R msk_ca +ffffffff82c06100 r msk_mib +ffffffff82c07000 R puc_pci_ca +ffffffff82c08000 R puc_devs +ffffffff82c0d000 R com_puc_ca +ffffffff82c0d030 r puc_port_types +ffffffff82c0e000 R lpt_puc_ca +ffffffff82c0f000 R wi_pci_ca +ffffffff82c0f030 r wi_pci_products +ffffffff82c10000 R an_pci_ca +ffffffff82c10030 R an_pci_devices +ffffffff82c11000 R iwi_devices +ffffffff82c11010 R iwi_ca +ffffffff82c12000 R wpi_ca +ffffffff82c12028 r wpi_devices +ffffffff82c12030 r wpi_rates +ffffffff82c12050 r wpi_rf_gain_5ghz +ffffffff82c120a0 r wpi_dsp_gain_5ghz +ffffffff82c120f0 r wpi_rf_gain_2ghz +ffffffff82c12140 r wpi_dsp_gain_2ghz +ffffffff82c12190 r wpi_pmgt +ffffffff82c12310 r wpi_bands +ffffffff82c13000 R iwn_mcs2ridx +ffffffff82c13020 R iwn_ca +ffffffff82c13050 r iwn_devices +ffffffff82c130e8 r iwn4965_sensitivity_limits +ffffffff82c13124 r iwn5000_sensitivity_limits +ffffffff82c13160 r iwn5150_sensitivity_limits +ffffffff82c1319c r iwn1000_sensitivity_limits +ffffffff82c131d8 r iwn6000_sensitivity_limits +ffffffff82c13214 r iwn2000_sensitivity_limits +ffffffff82c13250 r iwn_fw_errmsg +ffffffff82c13340 r iwn4965_set_txpower.tdiv +ffffffff82c13360 r iwn4965_rf_gain_5ghz +ffffffff82c133d0 r iwn4965_dsp_gain_5ghz +ffffffff82c13440 r iwn4965_dsp_gain_2ghz +ffffffff82c134b0 r iwn_pmgt +ffffffff82c136f0 r iwn4965_post_alive.qid2fifo +ffffffff82c13700 r iwn_bands +ffffffff82c13770 r iwn_rates +ffffffff82c13820 r iwn4965_rf_gain_2ghz +ffffffff82c14000 R iwm_nvm_channels +ffffffff82c14030 R iwm_nvm_channels_8000 +ffffffff82c14070 R iwm_rates +ffffffff82c140d0 R iwm_ht_mcs2ridx +ffffffff82c14110 R iwm_tid_to_ac +ffffffff82c14118 R iwm_ac_to_tx_fifo +ffffffff82c14120 R iwm_nvm_to_read +ffffffff82c14144 r iwm_set_hw_address_8000.reserved_mac +ffffffff82c14180 r iwm_sf_full_timeout +ffffffff82c141b0 r iwm_sf_full_timeout_def +ffffffff82c141e0 r advanced_lookup +ffffffff82c14320 r iwm_devices +ffffffff82c14360 R iwm_ca +ffffffff82c15000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff82c15020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff82c15040 R iwx_qu_b0_hr1_b0 +ffffffff82c15060 R iwx_qu_b0_hr_b0 +ffffffff82c15080 R iwx_ax201_cfg_qu_hr +ffffffff82c150a0 R iwx_qu_c0_hr1_b0 +ffffffff82c150c0 R iwx_qu_c0_hr_b0 +ffffffff82c150e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff82c15100 R iwx_quz_a0_hr1_b0 +ffffffff82c15120 R iwx_ax201_cfg_quz_hr +ffffffff82c15140 R iwx_cfg_so_a0_hr_b0 +ffffffff82c15160 R iwx_cfg_quz_a0_hr_b0 +ffffffff82c15180 R iwx_2ax_cfg_so_gf_a0 +ffffffff82c151a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff82c151c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff82c151e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff82c15200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff82c15220 R iwx_2ax_cfg_so_jf_b0 +ffffffff82c15240 R iwx_nvm_channels_8000 +ffffffff82c15280 R iwx_rates +ffffffff82c152e0 R iwx_mcs2ridx +ffffffff82c15320 R iwx_tid_to_ac +ffffffff82c15328 R iwx_ac_to_tx_fifo +ffffffff82c15330 r iwx_nvm_channels_uhb +ffffffff82c1539e r iwx_is_valid_mac_addr.reserved_mac +ffffffff82c153b0 r iwx_sf_full_timeout +ffffffff82c153e0 r iwx_sf_full_timeout_def +ffffffff82c15410 r advanced_lookup +ffffffff82c15550 r iwx_devices +ffffffff82c15590 r iwx_dev_info_table +ffffffff82c15e18 R iwx_ca +ffffffff82c16000 R qwx_pci_ca +ffffffff82c16028 r qwx_pci_devices +ffffffff82c16030 R qwx_msi_config_one_msi +ffffffff82c16050 R qwx_msi_config +ffffffff82c160c8 r qwx_pci_ops_qca6390 +ffffffff82c160f8 r qwx_pci_ops_qcn9074 +ffffffff82c17000 R cmpci_ca +ffffffff82c17028 R cmpci_hw_if +ffffffff82c170e0 r cmpci_rate_table +ffffffff82c17120 R cmpci_devices +ffffffff82c17130 r cmpci_query_devinfo.mixer_port_names +ffffffff82c17160 r cmpci_query_devinfo.mixer_classes +ffffffff82c18000 R iha_pci_ca +ffffffff82c18028 R iha_switch +ffffffff82c19000 R pcscp_ca +ffffffff82c1a000 R bge_ca +ffffffff82c1a030 R bge_devices +ffffffff82c1a1b0 r bge_revisions +ffffffff82c1a610 r bge_majorrevs +ffffffff82c1a790 r bge_kstat_tpl +ffffffff82c1b000 R bnx_devices +ffffffff82c1b020 R bnx_ca +ffffffff82c1c000 R vge_ca +ffffffff82c1c028 R vge_devices +ffffffff82c1d000 R stge_ca +ffffffff82c1d028 R stge_mii_bitbang_ops +ffffffff82c1d050 R stge_devices +ffffffff82c1e000 R nfe_ca +ffffffff82c1e030 R nfe_devices +ffffffff82c1f000 R et_devices +ffffffff82c1f008 R et_ca +ffffffff82c20000 R jme_devices +ffffffff82c20008 R jme_ca +ffffffff82c21000 R age_devices +ffffffff82c21008 R age_ca +ffffffff82c22000 R alc_devices +ffffffff82c22038 R alc_ca +ffffffff82c23000 R ale_devices +ffffffff82c23008 R ale_ca +ffffffff82c24000 R amdpm_ca +ffffffff82c24030 R amdpm_ids +ffffffff82c25000 R bce_ca +ffffffff82c25028 R bce_devices +ffffffff82c26000 R ath_pci_ca +ffffffff82c27000 R athn_pci_ca +ffffffff82c27030 r athn_pci_devices +ffffffff82c28000 R atw_pci_ca +ffffffff82c28028 R atw_pci_devices +ffffffff82c29000 R rtw_pci_ca +ffffffff82c29030 R rtw_pci_products +ffffffff82c2a000 R rtwn_pci_ca +ffffffff82c2a030 r rtwn_pci_devices +ffffffff82c2a040 r rtl8188eu_mac +ffffffff82c2a1b0 r rtl8192cu_mac +ffffffff82c2a310 r rtl8192ce_mac +ffffffff82c2a458 r rtl8188eu_bb_prog +ffffffff82c2a480 r rtl8723a_bb_prog +ffffffff82c2a4a8 r rtl8192ce_bb_prog_1t +ffffffff82c2a4d0 r rtl8192ce_bb_prog_2t +ffffffff82c2a500 r rtl8188eu_bb_regs +ffffffff82c2a680 r rtl8188eu_bb_vals +ffffffff82c2a980 r rtl8188eu_agc_vals +ffffffff82c2ab80 r rtl8723a_bb_regs +ffffffff82c2ad00 r rtl8723a_bb_vals +ffffffff82c2aff0 r rtl8192ce_agc_vals +ffffffff82c2b270 r rtl8192ce_bb_regs +ffffffff82c2b3f0 r rtl8192ce_bb_vals_1t +ffffffff82c2b6e0 r rtl8192ce_bb_vals_2t +ffffffff82c2c000 R ral_pci_ca +ffffffff82c2c030 R ral_pci_devices +ffffffff82c2d000 R acx_pci_ca +ffffffff82c2d028 R acx_pci_devices +ffffffff82c2e000 R pgt_pci_ca +ffffffff82c2e028 R pgt_pci_devices +ffffffff82c2f000 R malo_pci_ca +ffffffff82c2f028 R malo_pci_devices +ffffffff82c30000 R bwi_pci_ca +ffffffff82c30030 R bwi_pci_devices +ffffffff82c31000 R piixpm_ca +ffffffff82c31030 R piixpm_ids +ffffffff82c32000 R vic_ca +ffffffff82c32028 R vic_devices +ffffffff82c33000 R vmx_devices +ffffffff82c33008 R vmx_ca +ffffffff82c33030 r vmx_tx_kstat_tpl +ffffffff82c330d0 r vmx_kstat_rate +ffffffff82c330e0 r vmx_rx_kstat_tpl +ffffffff82c34000 R vmwpvs_ca +ffffffff82c34028 R vmwpvs_switch +ffffffff82c35000 R lii_ca +ffffffff82c35028 R lii_devices +ffffffff82c36000 R ichiic_ca +ffffffff82c36030 R ichiic_ids +ffffffff82c37000 R viapm_ca +ffffffff82c37030 R viapm_ids +ffffffff82c37070 r val_to_temp +ffffffff82c37870 r val_to_uV.mult +ffffffff82c38000 R amdiic_ca +ffffffff82c38028 R amdiic_ids +ffffffff82c39000 R nviic_ca +ffffffff82c39030 R nviic_ids +ffffffff82c3a000 R sdhc_pci_ca +ffffffff82c3b000 R kate_ca +ffffffff82c3b030 r kate_proc +ffffffff82c3c000 R km_ca +ffffffff82c3c030 r km_devices +ffffffff82c3d000 R ksmn_ca +ffffffff82c3d030 r ksmn_devices +ffffffff82c3e000 R iosf_pci_ca +ffffffff82c3f000 R itherm_devices +ffffffff82c3f008 R itherm_ca +ffffffff82c40000 R pchtemp_ca +ffffffff82c40030 R pchtemp_devices +ffffffff82c41000 R rtsx_pci_ca +ffffffff82c42000 R xspd_ca +ffffffff82c42028 R xspd_devices +ffffffff82c43000 R virtio_pci_ca +ffffffff82c43028 R virtio_pci_ops +ffffffff82c44000 R dwiic_pci_ca +ffffffff82c44030 R dwiic_pci_ids +ffffffff82c45000 R bwfm_pci_ca +ffffffff82c45030 r bwfm_pci_devices +ffffffff82c46000 R ccp_pci_ca +ffffffff82c46030 r ccp_pci_devices +ffffffff82c47000 r psp_pci_devices +ffffffff82c48000 R bnxt_devices +ffffffff82c48040 R bnxt_ca +ffffffff82c49000 R mcx_ca +ffffffff82c49030 r mcx_devices +ffffffff82c49060 r mcx_rss_config +ffffffff82c490d0 r mcx_eth_cap_map +ffffffff82c492d0 r mcx_ext_eth_cap_map +ffffffff82c493d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff82c493e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82c49400 r mcx_kstat_ppcnt_rfc2819 +ffffffff82c49418 r mcx_kstat_ppcnt_rfc3635 +ffffffff82c49430 r mcx_ppcnt_ieee8023_tpl +ffffffff82c495b0 r mcx_ppcnt_rfc2863_tpl +ffffffff82c496c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82c49870 r mcx_ppcnt_rfc3635_tpl +ffffffff82c499b0 r mcx_kstat_mtmp_tpl +ffffffff82c49a50 r mcx_kstat_mtmp_rate +ffffffff82c49a60 r mcx_queue_kstat_tpl +ffffffff82c4a000 R iavf_ca +ffffffff82c4a030 r iavf_devices +ffffffff82c4a040 r iavf_aq_regs +ffffffff82c4a0b0 r iavf_link_speeds +ffffffff82c4b000 R rge_ca +ffffffff82c4b028 R rge_devices +ffffffff82c4b040 r rge_phy_config_mac_cfg2_8126.mac_cfg2_a438_value +ffffffff82c4b070 r rge_phy_config_mac_cfg2_8126.mac_cfg2_b87e_value +ffffffff82c4b0c0 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff82c4b0e0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff82c4b140 r rtl8125_mac_cfg3_mcu +ffffffff82c4b9e0 r rtl8125_mac_cfg5_mcu +ffffffff82c4ca00 r rtl8126_mac_cfg2_mcu +ffffffff82c53a20 r rtl8125_mac_bps +ffffffff82c53e20 r rtl8125b_mac_bps +ffffffff82c54048 r rge_kstats_tpl +ffffffff82c55000 R igc_devices +ffffffff82c55040 R igc_ca +ffffffff82c55070 r igc_counters +ffffffff82c56000 R ngbe_devices +ffffffff82c56008 R ngbe_ca +ffffffff82c57000 R com_pci_ca +ffffffff82c57030 R com_pci_ids +ffffffff82c58000 R ufshci_pci_ca +ffffffff82c59000 r agp_attach.agp_max +ffffffff82c59048 R agp_ca +ffffffff82c5a000 R intagp_ca +ffffffff82c5b000 r drm_plane_create_rotation_property.props +ffffffff82c5c000 r drm_bridge_priv_state_funcs +ffffffff82c5e000 r color_encoding_name +ffffffff82c5e020 r color_range_name +ffffffff82c5f000 r drm_subpixel_enum_list +ffffffff82c5f060 r drm_dpms_enum_list +ffffffff82c5f0a0 r drm_dvi_i_select_enum_list +ffffffff82c5f0d0 r drm_dvi_i_subconnector_enum_list +ffffffff82c5f100 r drm_tv_mode_enum_list +ffffffff82c5f170 r drm_tv_select_enum_list +ffffffff82c5f1c0 r drm_tv_subconnector_enum_list +ffffffff82c5f210 r drm_dp_subconnector_enum_list +ffffffff82c5f280 r colorspace_names +ffffffff82c5f300 r drm_link_status_enum_list +ffffffff82c5f320 r drm_scaling_mode_enum_list +ffffffff82c5f360 r drm_aspect_ratio_enum_list +ffffffff82c5f390 r drm_content_type_enum_list +ffffffff82c5f3e0 r drm_panel_orientation_enum_list +ffffffff82c5f420 r privacy_screen_enum +ffffffff82c60000 r drm_crtc_fence_ops +ffffffff82c61000 r drm_dmt_modes +ffffffff82c63940 r edid_cea_modes_1 +ffffffff82c674d0 r edid_cea_modes_193 +ffffffff82c68180 r edid_quirk_list +ffffffff82c68360 r drm_mode_do_interlace_quirk.cea_interlaced +ffffffff82c683a0 r edid_4k_modes +ffffffff82c68600 r edid_est_modes +ffffffff82c68e00 r est3_modes +ffffffff82c68f60 r stereo_mandatory_modes +ffffffff82c68fe0 r extra_modes +ffffffff82c6a000 r drm_encoder_enum_list +ffffffff82c6c000 r drm_fbdev_dma_helper_funcs +ffffffff82c6c010 r drm_fbdev_dma_client_funcs +ffffffff82c6c030 r drm_fbdev_dma_fb_ops +ffffffff82c6d000 r drm_fbdev_generic_helper_funcs +ffffffff82c6d010 r drm_fbdev_generic_client_funcs +ffffffff82c6d030 r drm_fbdev_generic_fb_ops +ffffffff82c6f000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82c6f004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82c6f008 r drm_fb_xrgb8888_to_xrgb1555.dst_pixsize +ffffffff82c6f00c r drm_fb_xrgb8888_to_argb1555.dst_pixsize +ffffffff82c6f010 r drm_fb_xrgb8888_to_rgba5551.dst_pixsize +ffffffff82c6f014 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff82c6f018 r drm_fb_xrgb8888_to_argb8888.dst_pixsize +ffffffff82c6f01c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82c6f020 r drm_fb_xrgb8888_to_argb2101010.dst_pixsize +ffffffff82c6f024 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82c6f028 r drm_fb_xrgb8888_to_xbgr8888.dst_pixsize +ffffffff82c6f02c r drm_fb_xrgb8888_to_abgr8888.dst_pixsize +ffffffff82c70000 r __drm_format_info.formats +ffffffff82c71000 R drm_pgops +ffffffff82c72000 r drm_gem_dma_default_funcs +ffffffff82c73000 R drm_gem_fb_funcs +ffffffff82c74000 r drm_ioctls +ffffffff82c76000 r dma_fence_stub_ops +ffffffff82c76040 R dma_fence_array_ops +ffffffff82c76080 R dma_fence_chain_ops +ffffffff82c760c0 R dmabufops +ffffffff82c760f8 R syncfileops +ffffffff82c77000 r drm_plane_type_enum_list +ffffffff82c78000 r tv_modes_parameters +ffffffff82c780c0 r drm_mode_status_names +ffffffff82c78200 r drm_named_modes +ffffffff82c79000 r primary_plane_funcs +ffffffff82c79068 r safe_modeset_formats +ffffffff82c7a000 r orientation_data +ffffffff82c7e080 r lcd800x1280_rightside_up +ffffffff82c7e098 r lcd720x1280_rightside_up +ffffffff82c7e0b0 r lcd800x1280_leftside_up +ffffffff82c7e0c8 r lcd1080x1920_leftside_up +ffffffff82c7e0e0 r lcd1600x2560_rightside_up +ffffffff82c7e0f8 r lcd1200x1920_rightside_up +ffffffff82c7e110 r gpd_micropc +ffffffff82c7e128 r gpd_pocket +ffffffff82c7e140 r gpd_pocket2 +ffffffff82c7e158 r gpd_win +ffffffff82c7e170 r gpd_win2 +ffffffff82c7e188 r lcd1080x1920_rightside_up +ffffffff82c7e1a0 r itworks_tw891 +ffffffff82c7e1b8 r lcd1600x2560_leftside_up +ffffffff82c7e1d0 r onegx1_pro +ffffffff82c7e1e8 r lcd1280x1920_rightside_up +ffffffff82c7e200 r gpd_onemix2s +ffffffff82c7e218 r .compoundliteral +ffffffff82c7e228 r .compoundliteral.5 +ffffffff82c7e250 r .compoundliteral.9 +ffffffff82c7e270 r .compoundliteral.17 +ffffffff82c7e2b0 r .compoundliteral.21 +ffffffff82c7e2d0 r .compoundliteral.23 +ffffffff82c7e2e0 r .compoundliteral.25 +ffffffff82c7e2f0 r .compoundliteral.29 +ffffffff82c7f000 r drm_gem_prime_dmabuf_ops +ffffffff82c81000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82c82000 r drm_dp_phy_name.phy_names +ffffffff82c82048 r drm_dp_i2c_algo +ffffffff82c82058 r drm_dp_i2c_lock_ops +ffffffff82c82070 r dp_aux_bl_ops +ffffffff82c82090 r dpcd_quirk_list +ffffffff82c82320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82c83000 R drm_dp_mst_topology_state_funcs +ffffffff82c83020 r drm_dp_mst_req_type_str.req_type_str +ffffffff82c831f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82c83220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82c83278 r drm_dp_mst_i2c_algo +ffffffff82c84000 r rc_parameters_1_2_444 +ffffffff82c845f0 r rc_parameters_pre_scr +ffffffff82c84920 r rc_parameters_1_2_422 +ffffffff82c84df0 r rc_parameters_1_2_420 +ffffffff82c86000 r hdmi_colorimetry_val +ffffffff82c87018 R ttm_bo_vm_ops +ffffffff82c88000 r ttm_range_manager_func +ffffffff82c89018 r ttm_kmap_iter_io_ops +ffffffff82c89030 r ttm_kmap_iter_linear_io_ops +ffffffff82c8a000 r ttm_sys_manager_func +ffffffff82c8b000 r ttm_kmap_iter_tt_ops +ffffffff82c8c000 r drm_sched_fence_ops_scheduled +ffffffff82c8c040 r drm_sched_fence_ops_finished +ffffffff82c8d000 R ch7017_ops +ffffffff82c8e000 R ch7xxx_ops +ffffffff82c8e060 r ch7xxx_ids +ffffffff82c8f000 R ivch_ops +ffffffff82c8f060 r backup_addresses +ffffffff82c90000 R ns2501_ops +ffffffff82c90060 r mode_agnostic_values +ffffffff82c900e0 r ns2501_modes +ffffffff82c91000 R sil164_ops +ffffffff82c92000 R tfp410_ops +ffffffff82c93000 r chv_dpll +ffffffff82c93050 r vlv_dpll +ffffffff82c930a0 r g4x_dpll +ffffffff82c930f0 r pch_dpll +ffffffff82c93138 r intel_dp_enc_funcs +ffffffff82c94000 r intel_hdmi_enc_funcs +ffffffff82c95000 r vlv_primary_formats +ffffffff82c95030 r ivb_primary_formats +ffffffff82c95050 r i965_primary_formats +ffffffff82c95070 r i8xx_primary_formats +ffffffff82c95080 r i965_plane_funcs +ffffffff82c950e8 r i8xx_plane_funcs +ffffffff82c96000 r ilk_wm_funcs +ffffffff82c96040 r vlv_wm_funcs +ffffffff82c96080 r g4x_wm_funcs +ffffffff82c960c0 r nop_funcs +ffffffff82c96100 r pnv_wm_funcs +ffffffff82c96140 r i965_wm_funcs +ffffffff82c96180 r i9xx_wm_funcs +ffffffff82c961c0 r i845_wm_funcs +ffffffff82c96200 r cxsr_latency_table +ffffffff82c97000 r gen11_dsi_encoder_funcs +ffffffff82c97020 r gen11_dsi_connector_funcs +ffffffff82c97098 r gen11_dsi_connector_helper_funcs +ffffffff82c970f8 r gen11_dsi_host_ops +ffffffff82c98000 r intel_plane_helper_funcs +ffffffff82c99000 r g4x_audio_funcs +ffffffff82c99018 r ibx_audio_funcs +ffffffff82c99030 r hsw_audio_funcs +ffffffff82c99050 r hdmi_audio_clock +ffffffff82c990c0 r hdmi_aud_ncts_36bpp +ffffffff82c991a0 r hdmi_aud_ncts_30bpp +ffffffff82c99280 r hdmi_aud_ncts_24bpp +ffffffff82c9a000 r intel_backlight_device_ops +ffffffff82c9a018 r bxt_pwm_funcs +ffffffff82c9a048 r cnp_pwm_funcs +ffffffff82c9a078 r lpt_pwm_funcs +ffffffff82c9a0a8 r spt_pwm_funcs +ffffffff82c9a0d8 r pch_pwm_funcs +ffffffff82c9a108 r ext_pwm_funcs +ffffffff82c9a138 r vlv_pwm_funcs +ffffffff82c9a168 r i965_pwm_funcs +ffffffff82c9a198 r i9xx_pwm_funcs +ffffffff82c9a1c8 r pwm_bl_funcs +ffffffff82c9b000 r bdb_blocks +ffffffff82c9b160 r adlp_aux_ch_map +ffffffff82c9b169 r adls_aux_ch_map +ffffffff82c9b170 r rkl_aux_ch_map +ffffffff82c9b175 r direct_aux_ch_map +ffffffff82c9b17e r translate_iboost.mapping +ffffffff82c9b181 r adlp_ddc_pin_map +ffffffff82c9b18e r adls_ddc_pin_map +ffffffff82c9b19b r rkl_pch_tgp_ddc_pin_map +ffffffff82c9b1a6 r gen9bc_tgp_ddc_pin_map +ffffffff82c9b1b1 r icp_ddc_pin_map +ffffffff82c9b1c0 r cnp_ddc_pin_map +ffffffff82c9c000 r mtl_sa_info +ffffffff82c9c006 r adlp_sa_info +ffffffff82c9c00c r adls_sa_info +ffffffff82c9c012 r rkl_sa_info +ffffffff82c9c018 r tgl_sa_info +ffffffff82c9c020 r intel_bw_funcs +ffffffff82c9d000 r intel_cdclk_funcs +ffffffff82c9d010 r mtl_cdclk_funcs +ffffffff82c9d030 r mtl_cdclk_table +ffffffff82c9d088 r tgl_cdclk_funcs +ffffffff82c9d0b0 r dg2_cdclk_table +ffffffff82c9d160 r adlp_a_step_cdclk_table +ffffffff82c9d1e0 r rplu_cdclk_table +ffffffff82c9d2c8 r rplu_cdclk_funcs +ffffffff82c9d2f0 r adlp_cdclk_table +ffffffff82c9d3b0 r rkl_cdclk_table +ffffffff82c9d4a0 r icl_cdclk_table +ffffffff82c9d588 r ehl_cdclk_funcs +ffffffff82c9d5a8 r icl_cdclk_funcs +ffffffff82c9d5c8 r bxt_cdclk_funcs +ffffffff82c9d5f0 r glk_cdclk_table +ffffffff82c9d620 r bxt_cdclk_table +ffffffff82c9d668 r skl_cdclk_funcs +ffffffff82c9d688 r bdw_cdclk_funcs +ffffffff82c9d6a8 r hsw_cdclk_funcs +ffffffff82c9d6c8 r chv_cdclk_funcs +ffffffff82c9d6e8 r vlv_cdclk_funcs +ffffffff82c9d708 r fixed_400mhz_cdclk_funcs +ffffffff82c9d728 r ilk_cdclk_funcs +ffffffff82c9d748 r gm45_cdclk_funcs +ffffffff82c9d768 r g33_cdclk_funcs +ffffffff82c9d788 r i965gm_cdclk_funcs +ffffffff82c9d7a8 r pnv_cdclk_funcs +ffffffff82c9d7c8 r i945gm_cdclk_funcs +ffffffff82c9d7e8 r i915gm_cdclk_funcs +ffffffff82c9d808 r i915g_cdclk_funcs +ffffffff82c9d828 r i865g_cdclk_funcs +ffffffff82c9d848 r i85x_cdclk_funcs +ffffffff82c9d868 r i845g_cdclk_funcs +ffffffff82c9d888 r i830_cdclk_funcs +ffffffff82c9d8a8 r g33_get_cdclk.div_3200 +ffffffff82c9d8ae r g33_get_cdclk.div_4000 +ffffffff82c9d8b4 r g33_get_cdclk.div_4800 +ffffffff82c9d8ba r g33_get_cdclk.div_5333 +ffffffff82c9d8c0 r i965gm_get_cdclk.div_3200 +ffffffff82c9d8c3 r i965gm_get_cdclk.div_4000 +ffffffff82c9d8c6 r i965gm_get_cdclk.div_5333 +ffffffff82c9e000 r chv_color_funcs +ffffffff82c9e040 r vlv_color_funcs +ffffffff82c9e080 r i965_color_funcs +ffffffff82c9e0c0 r i9xx_color_funcs +ffffffff82c9e100 r tgl_color_funcs +ffffffff82c9e140 r icl_color_funcs +ffffffff82c9e180 r glk_color_funcs +ffffffff82c9e1c0 r skl_color_funcs +ffffffff82c9e200 r bdw_color_funcs +ffffffff82c9e240 r hsw_color_funcs +ffffffff82c9e280 r ivb_color_funcs +ffffffff82c9e2c0 r ilk_color_funcs +ffffffff82c9e300 r chv_cgm_csc_matrix_identity +ffffffff82c9e31e r ilk_csc_matrix_rgb_to_ycbcr +ffffffff82c9e33c r ilk_csc_matrix_limited_range +ffffffff82c9e35a r ilk_csc_matrix_identity +ffffffff82c9f000 r icl_procmon_values +ffffffff82ca0000 r force_audio_names +ffffffff82ca0040 r broadcast_rgb_names +ffffffff82ca1000 r intel_crt_connector_funcs +ffffffff82ca1078 r intel_crt_enc_funcs +ffffffff82ca10a0 r intel_spurious_crt_detect +ffffffff82ca14a8 r intel_crt_connector_helper_funcs +ffffffff82ca2000 r g4x_crtc_funcs +ffffffff82ca20c0 r i965_crtc_funcs +ffffffff82ca2180 r i915gm_crtc_funcs +ffffffff82ca2240 r i915_crtc_funcs +ffffffff82ca2300 r i8xx_crtc_funcs +ffffffff82ca23c0 r bdw_crtc_funcs +ffffffff82ca2480 r ilk_crtc_funcs +ffffffff82ca3000 r output_format_str +ffffffff82ca3020 r output_type_str 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ivb_m_gt1_info +ffffffff82d0fb30 r ivb_m_gt2_info +ffffffff82d0fb98 r ivb_d_gt1_info +ffffffff82d0fc00 r ivb_d_gt2_info +ffffffff82d0fc68 r hsw_gt1_info +ffffffff82d0fcd0 r hsw_gt2_info +ffffffff82d0fd38 r hsw_gt3_info +ffffffff82d0fda0 r vlv_info +ffffffff82d0fe08 r bdw_gt1_info +ffffffff82d0fe70 r bdw_gt2_info +ffffffff82d0fed8 r bdw_gt3_info +ffffffff82d0ff40 r bdw_rsvd_info +ffffffff82d0ffa8 r chv_info +ffffffff82d10010 r skl_gt1_info +ffffffff82d10078 r skl_gt2_info +ffffffff82d100e0 r skl_gt3_info +ffffffff82d10148 r skl_gt4_info +ffffffff82d101b0 r bxt_info +ffffffff82d10218 r glk_info +ffffffff82d10280 r kbl_gt1_info +ffffffff82d102e8 r kbl_gt2_info +ffffffff82d10350 r kbl_gt3_info +ffffffff82d103b8 r cfl_gt1_info +ffffffff82d10420 r cfl_gt2_info +ffffffff82d10488 r cfl_gt3_info +ffffffff82d104f0 r cml_gt1_info +ffffffff82d10558 r cml_gt2_info +ffffffff82d105c0 r icl_info +ffffffff82d10628 r ehl_info +ffffffff82d10690 r jsl_info +ffffffff82d106f8 r tgl_info +ffffffff82d10760 r rkl_info +ffffffff82d107c8 r adl_s_info +ffffffff82d10830 r adl_p_info +ffffffff82d10898 r dg1_info +ffffffff82d10900 r dg2_info +ffffffff82d10968 r ats_m_info +ffffffff82d109d0 r xelpmp_extra_gt +ffffffff82d10a10 r mtl_info +ffffffff82d11000 r oa_formats +ffffffff82d110f0 r gen8_update_reg_state_unlocked.flex_regs +ffffffff82d11110 r gen8_oa_mux_regs +ffffffff82d11130 r xehp_oa_b_counters +ffffffff82d11150 r gen12_oa_b_counters +ffffffff82d11190 r mtl_oam_b_counters +ffffffff82d111c0 r mtl_oa_mux_regs +ffffffff82d111f0 r gen12_oa_mux_regs +ffffffff82d12000 r i915_query_funcs +ffffffff82d13000 R i915_fence_ops +ffffffff82d14000 r rsgt_ops +ffffffff82d15000 r fence_ops +ffffffff82d16000 r i915_ttm_buddy_manager_func +ffffffff82d17000 r bind_ops +ffffffff82d18000 r nop_clock_gating_funcs +ffffffff82d18008 r pvc_clock_gating_funcs +ffffffff82d18010 r dg2_clock_gating_funcs +ffffffff82d18018 r xehpsdv_clock_gating_funcs +ffffffff82d18020 r adlp_clock_gating_funcs +ffffffff82d18028 r gen12lp_clock_gating_funcs +ffffffff82d18030 r icl_clock_gating_funcs +ffffffff82d18038 r cfl_clock_gating_funcs +ffffffff82d18040 r skl_clock_gating_funcs +ffffffff82d18048 r kbl_clock_gating_funcs +ffffffff82d18050 r bxt_clock_gating_funcs +ffffffff82d18058 r glk_clock_gating_funcs +ffffffff82d18060 r bdw_clock_gating_funcs +ffffffff82d18068 r chv_clock_gating_funcs +ffffffff82d18070 r hsw_clock_gating_funcs +ffffffff82d18078 r ivb_clock_gating_funcs +ffffffff82d18080 r vlv_clock_gating_funcs +ffffffff82d18088 r gen6_clock_gating_funcs +ffffffff82d18090 r ilk_clock_gating_funcs +ffffffff82d18098 r g4x_clock_gating_funcs +ffffffff82d180a0 r i965gm_clock_gating_funcs +ffffffff82d180a8 r i965g_clock_gating_funcs +ffffffff82d180b0 r gen3_clock_gating_funcs +ffffffff82d180b8 r i85x_clock_gating_funcs +ffffffff82d180c0 r i830_clock_gating_funcs +ffffffff82d19000 r platform_names +ffffffff82d19140 r subplatform_ult_ids +ffffffff82d191a4 r no_display +ffffffff82d1a000 r intel_region_map +ffffffff82d1c000 r dg2_g10_revid_step_tbl +ffffffff82d1c030 r dg2_g11_revid_step_tbl +ffffffff82d1c050 r xehpsdv_revids +ffffffff82d1c080 r adlp_rplp_revids +ffffffff82d1c0a0 r adlp_revids +ffffffff82d1c0e0 r adls_rpls_revids +ffffffff82d1c120 r adls_revids +ffffffff82d1c160 r rkl_revids +ffffffff82d1c180 r bxt_revids +ffffffff82d1c1c0 r skl_revids +ffffffff82d1c1f0 r pvc_bd_subids +ffffffff82d1c210 r pvc_ct_subids +ffffffff82d1e000 r forcewake_domain_names +ffffffff82d1e080 r __mtl_fw_ranges +ffffffff82d1e200 r mtl_shadowed_regs +ffffffff82d1e280 r __pvc_fw_ranges +ffffffff82d1e430 r pvc_shadowed_regs +ffffffff82d1e550 r __dg2_fw_ranges +ffffffff82d1e820 r dg2_shadowed_regs +ffffffff82d1e940 r __xehp_fw_ranges +ffffffff82d1ec10 r gen12_shadowed_regs +ffffffff82d1ed30 r __gen12_fw_ranges +ffffffff82d1ef40 r __gen11_fw_ranges +ffffffff82d1f0f0 r gen11_shadowed_regs +ffffffff82d1f1b0 r __gen9_fw_ranges +ffffffff82d1f330 r gen8_shadowed_regs +ffffffff82d1f360 r __chv_fw_ranges +ffffffff82d1f420 r __gen6_fw_ranges +ffffffff82d1f430 r __vlv_fw_ranges +ffffffff82d1f488 r uncore_get_fallback +ffffffff82d1f490 r uncore_get_normal +ffffffff82d1f498 r uncore_get_thread_status +ffffffff82d1f4a0 r __xelpmp_fw_ranges +ffffffff82d1f5d0 r xelpmp_shadowed_regs +ffffffff82d20000 r i915_pxp_tee_component_ops +ffffffff82d21000 r intel_dram_type_str.str +ffffffff82d22000 r atom_op_names +ffffffff82d223e0 r opcode_table +ffffffff82d22b90 r atom_dst_to_src +ffffffff82d22c10 r atom_io_names +ffffffff82d22c40 r atom_table_names +ffffffff82d22e90 r atom_iio_len +ffffffff82d23000 r atombios_helper_funcs +ffffffff82d23080 r vga_control_regs +ffffffff82d24000 r voltage_names +ffffffff82d24020 r pre_emph_names +ffffffff82d25000 r radeon_atom_backlight_ops +ffffffff82d25018 r radeon_atom_enc_funcs +ffffffff82d25038 r radeon_atom_dig_helper_funcs +ffffffff82d250a0 r radeon_atom_dac_helper_funcs +ffffffff82d25108 r radeon_atom_ext_helper_funcs +ffffffff82d26000 r caicos_cgcg_cgls_default +ffffffff82d26240 r barts_mgcg_default +ffffffff82d26900 r turks_mgcg_default +ffffffff82d26d80 r caicos_mgcg_default +ffffffff82d27110 r turks_sysls_default +ffffffff82d271d0 r caicos_sysls_default +ffffffff82d27280 r caicos_cgcg_cgls_enable +ffffffff82d274d0 r caicos_cgcg_cgls_disable +ffffffff82d27730 r barts_mgcg_enable +ffffffff82d277b0 r turks_mgcg_enable +ffffffff82d27830 r caicos_mgcg_enable +ffffffff82d278b0 r caicos_mgcg_disable +ffffffff82d27930 r turks_sysls_enable +ffffffff82d279f0 r caicos_sysls_enable +ffffffff82d27aa0 r turks_sysls_disable +ffffffff82d27b60 r caicos_sysls_disable +ffffffff82d28000 r didt_config_ci +ffffffff82d285b4 r defaults_bonaire_xt +ffffffff82d28600 r defaults_saturn_xt +ffffffff82d2864c r defaults_hawaii_xt +ffffffff82d28698 r defaults_hawaii_pro +ffffffff82d29000 r ci_program_jump_on_start.data +ffffffff82d2a000 r bonaire_io_mc_regs +ffffffff82d2a120 r hawaii_io_mc_regs +ffffffff82d2a1d0 r mc_cg_registers +ffffffff82d2a200 r bonaire_mgcg_cgcg_init +ffffffff82d2a5e0 r bonaire_golden_registers +ffffffff82d2a7d0 r bonaire_golden_common_registers +ffffffff82d2a800 r bonaire_golden_spm_registers +ffffffff82d2a810 r kalindi_mgcg_cgcg_init +ffffffff82d2aab0 r kalindi_golden_registers +ffffffff82d2ac20 r kalindi_golden_common_registers +ffffffff82d2ac50 r kalindi_golden_spm_registers +ffffffff82d2ac60 r godavari_golden_registers +ffffffff82d2ade0 r spectre_mgcg_cgcg_init +ffffffff82d2b200 r spectre_golden_registers +ffffffff82d2b330 r spectre_golden_common_registers +ffffffff82d2b360 r spectre_golden_spm_registers +ffffffff82d2b370 r hawaii_mgcg_cgcg_init +ffffffff82d2b880 r hawaii_golden_registers +ffffffff82d2ba30 r hawaii_golden_common_registers +ffffffff82d2ba6c r hawaii_golden_spm_registers +ffffffff82d2ba80 r spectre_rlc_save_restore_register_list +ffffffff82d2c170 r kalindi_rlc_save_restore_register_list +ffffffff82d2c680 r ci_cs_data +ffffffff82d2c6a0 r ci_SECT_CONTEXT_defs +ffffffff82d2c720 r ci_SECT_CONTEXT_def_1 +ffffffff82d2ca70 r ci_SECT_CONTEXT_def_3 +ffffffff82d2ca90 r ci_SECT_CONTEXT_def_4 +ffffffff82d2cd04 r ci_SECT_CONTEXT_def_5 +ffffffff82d2cd0c r ci_SECT_CONTEXT_def_6 +ffffffff82d2cd10 r ci_SECT_CONTEXT_def_2 +ffffffff82d2d160 r ci_SECT_CONTEXT_def_7 +ffffffff82d2d510 r cik_default_state +ffffffff82d2f000 r dce3_2_afmt_write_sad_regs.eld_reg_to_type +ffffffff82d30000 r dce6_afmt_write_sad_regs.eld_reg_to_type +ffffffff82d31000 r ni_tx_offsets +ffffffff82d31020 r evergreen_dp_offsets +ffffffff82d31040 r evergreen_disp_int_status +ffffffff82d31060 r evergreen_golden_registers +ffffffff82d31260 r evergreen_golden_registers2 +ffffffff82d31310 r cypress_mgcg_init +ffffffff82d31a10 r juniper_mgcg_init +ffffffff82d31e80 r redwood_mgcg_init +ffffffff82d321b0 r cedar_golden_registers +ffffffff82d32390 r cedar_mgcg_init +ffffffff82d325f0 r wrestler_golden_registers +ffffffff82d32840 r supersumo_golden_registers +ffffffff82d32ba0 r sumo_golden_registers +ffffffff82d32be0 r barts_golden_registers +ffffffff82d32e00 r turks_golden_registers +ffffffff82d33040 r caicos_golden_registers +ffffffff82d33280 r sumo_rlc_save_restore_register_list +ffffffff82d333d0 r evergreen_cs_data +ffffffff82d33410 r SECT_CONTEXT_defs +ffffffff82d33490 r SECT_CLEAR_defs +ffffffff82d334b0 r SECT_CTRLCONST_defs +ffffffff82d334d0 r SECT_CONTEXT_def_2 +ffffffff82d334f0 r SECT_CONTEXT_def_4 +ffffffff82d33680 r SECT_CONTEXT_def_5 +ffffffff82d336a0 r SECT_CONTEXT_def_6 +ffffffff82d33780 r SECT_CONTEXT_def_1 +ffffffff82d33f20 r SECT_CONTEXT_def_3 +ffffffff82d34000 r SECT_CONTEXT_def_7 +ffffffff82d34488 r SECT_CLEAR_def_1 +ffffffff82d34494 r SECT_CTRLCONST_def_1 +ffffffff82d344a0 r evergreen_default_state +ffffffff82d35000 r cayman_reg_safe_bm +ffffffff82d37000 r evergreen_reg_safe_bm +ffffffff82d3a000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82d3b000 r didt_config_kv +ffffffff82d3c000 r barts_io_mc_regs +ffffffff82d3c0f0 r turks_io_mc_regs +ffffffff82d3c1e0 r caicos_io_mc_regs +ffffffff82d3c2d0 r cayman_io_mc_regs +ffffffff82d3c3c0 r cayman_golden_registers +ffffffff82d3c580 r cayman_golden_registers2 +ffffffff82d3c5d0 r dvst_golden_registers +ffffffff82d3c860 r dvst_golden_registers2 +ffffffff82d3c890 r scrapper_golden_registers +ffffffff82d3cd70 r tn_rlc_save_restore_register_list +ffffffff82d3cf60 r cayman_cs_data +ffffffff82d3cfa0 r SECT_CONTEXT_defs +ffffffff82d3d020 r SECT_CLEAR_defs +ffffffff82d3d040 r SECT_CTRLCONST_defs +ffffffff82d3d060 r SECT_CONTEXT_def_2 +ffffffff82d3d080 r SECT_CONTEXT_def_4 +ffffffff82d3d210 r SECT_CONTEXT_def_5 +ffffffff82d3d230 r SECT_CONTEXT_def_1 +ffffffff82d3d9d0 r SECT_CONTEXT_def_3 +ffffffff82d3dab0 r SECT_CONTEXT_def_6 +ffffffff82d3db90 r SECT_CONTEXT_def_7 +ffffffff82d3e018 r SECT_CLEAR_def_1 +ffffffff82d3e024 r SECT_CTRLCONST_def_1 +ffffffff82d3e030 r cayman_default_state +ffffffff82d3f000 r cac_weights_cayman_xt +ffffffff82d3f128 r cac_weights_cayman_pro +ffffffff82d3f250 r cac_weights_cayman_le +ffffffff82d3f380 r cayman_cgcg_cgls_default +ffffffff82d3f5c0 r cayman_mgcg_default +ffffffff82d3ff20 r cayman_sysls_default +ffffffff82d3fff0 r cayman_cgcg_cgls_enable +ffffffff82d40240 r cayman_cgcg_cgls_disable +ffffffff82d404a0 r cayman_mgcg_enable +ffffffff82d40520 r cayman_mgcg_disable +ffffffff82d405a0 r cayman_sysls_enable +ffffffff82d40670 r cayman_sysls_disable +ffffffff82d41000 r rn50_reg_safe_bm +ffffffff82d411a0 r r100_reg_safe_bm +ffffffff82d42000 r r200_reg_safe_bm +ffffffff82d43000 r r300_reg_safe_bm +ffffffff82d44000 r r420_reg_safe_bm +ffffffff82d46000 r color_formats_table +ffffffff82d46480 r r600_reg_safe_bm +ffffffff82d49000 R r600_utc +ffffffff82d49040 R r600_dtc +ffffffff82d49080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82d4b000 r r100_gfx_ring +ffffffff82d4b070 r r300_gfx_ring +ffffffff82d4b0e0 r rv515_gfx_ring +ffffffff82d4b150 r r600_gfx_ring +ffffffff82d4b1c0 r r600_dma_ring +ffffffff82d4b230 r rv6xx_uvd_ring +ffffffff82d4b2a0 r rv770_uvd_ring +ffffffff82d4b310 r evergreen_gfx_ring +ffffffff82d4b380 r evergreen_dma_ring +ffffffff82d4b3f0 r cayman_gfx_ring +ffffffff82d4b460 r cayman_dma_ring +ffffffff82d4b4d0 r cayman_uvd_ring +ffffffff82d4b540 r trinity_vce_ring +ffffffff82d4b5b0 r si_gfx_ring +ffffffff82d4b620 r si_dma_ring +ffffffff82d4b690 r ci_gfx_ring +ffffffff82d4b700 r ci_cp_ring +ffffffff82d4b770 r ci_dma_ring +ffffffff82d4b7e0 r ci_vce_ring +ffffffff82d4c000 r object_connector_convert +ffffffff82d4c060 r supported_devices_connector_convert +ffffffff82d4c0a0 r supported_devices_connector_object_id_convert +ffffffff82d4c0c0 r thermal_controller_names +ffffffff82d4c100 r pp_lib_thermal_controller_names +ffffffff82d4d000 r pin_offsets +ffffffff82d4d020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff82d4f000 r thermal_controller_names +ffffffff82d4f020 r default_primarydac_adj +ffffffff82d4f120 r default_tvdac_adj +ffffffff82d4f220 r default_tmds_pll +ffffffff82d50000 r radeon_dp_connector_funcs +ffffffff82d50078 r radeon_dp_connector_helper_funcs +ffffffff82d500d8 r radeon_lvds_bridge_connector_funcs +ffffffff82d50150 r radeon_vga_connector_funcs +ffffffff82d501c8 r radeon_vga_connector_helper_funcs +ffffffff82d50228 r radeon_dvi_connector_funcs +ffffffff82d502a0 r radeon_dvi_connector_helper_funcs +ffffffff82d50300 r radeon_edp_connector_funcs +ffffffff82d50378 r radeon_tv_connector_funcs +ffffffff82d503f0 r radeon_tv_connector_helper_funcs +ffffffff82d50450 r radeon_lvds_connector_funcs +ffffffff82d504c8 r radeon_lvds_connector_helper_funcs +ffffffff82d51000 r radeon_family_name +ffffffff82d513f0 r radeon_px_quirk_list +ffffffff82d52000 r radeon_fb_funcs +ffffffff82d52018 r radeon_mode_funcs +ffffffff82d52060 r radeon_tmds_pll_enum_list +ffffffff82d52080 r radeon_tv_std_enum_list +ffffffff82d52100 r radeon_underscan_enum_list +ffffffff82d52130 r radeon_audio_enum_list +ffffffff82d52160 r radeon_dither_enum_list +ffffffff82d52180 r radeon_output_csc_enum_list +ffffffff82d521c0 r radeon_crtc_funcs +ffffffff82d52280 r hpd_names +ffffffff82d522b0 r encoder_names +ffffffff82d523e0 r radeon_afmt_init.eg_offsets +ffffffff82d53000 r aux_offset +ffffffff82d54000 R radeondrm_ca +ffffffff82d54030 r pciidlist +ffffffff82d581d0 r kms_driver +ffffffff82d582c0 r radeon_ioctls_kms +ffffffff82d59000 r radeon_fbdev_fb_helper_funcs +ffffffff82d59010 r radeon_fbdev_client_funcs +ffffffff82d59030 r radeon_fbdev_fb_ops +ffffffff82d5a000 R radeon_fence_ops +ffffffff82d5c000 R radeon_gem_object_funcs +ffffffff82d5c070 r radeon_gem_vm_ops +ffffffff82d5d000 r radeon_i2c_algo +ffffffff82d5d010 r radeon_atom_i2c_algo +ffffffff82d5e000 r legacy_helper_funcs +ffffffff82d5f000 r radeon_backlight_ops +ffffffff82d5f018 r radeon_legacy_lvds_enc_funcs +ffffffff82d5f038 r radeon_legacy_lvds_helper_funcs +ffffffff82d5f0a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82d5f0c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82d5f128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82d5f148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82d5f1b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82d5f1d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82d5f238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82d5f258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82d60000 r SLOPE_value +ffffffff82d60030 r YCOEF_EN_value +ffffffff82d60060 r YCOEF_value +ffffffff82d60090 r available_tv_modes +ffffffff82d60110 r hor_timing_NTSC +ffffffff82d60150 r vert_timing_NTSC +ffffffff82d60190 r hor_timing_PAL +ffffffff82d601d0 r vert_timing_PAL +ffffffff82d62000 r radeon_pm_state_type_name +ffffffff82d63000 r radeon_evict_flags.placements +ffffffff82d66000 r rs600_reg_safe_bm +ffffffff82d68000 r rv515_reg_safe_bm +ffffffff82d69000 r dll_speed_table +ffffffff82d6a000 r r7xx_golden_registers +ffffffff82d6a090 r r7xx_golden_dyn_gpr_registers +ffffffff82d6a100 r rv770ce_golden_registers +ffffffff82d6a160 r rv770_golden_registers +ffffffff82d6a1b0 r rv770_mgcg_init +ffffffff82d6a8f0 r rv730_golden_registers +ffffffff82d6a950 r rv730_mgcg_init +ffffffff82d6aee0 r rv710_golden_registers +ffffffff82d6af30 r rv710_mgcg_init +ffffffff82d6b1d0 r rv740_golden_registers +ffffffff82d6b360 r rv740_mgcg_init +ffffffff82d6d000 r rv730_smc_int_vectors +ffffffff82d6d040 r rv710_smc_int_vectors +ffffffff82d6d080 r rv740_smc_int_vectors +ffffffff82d6d0c0 r cypress_smc_int_vectors +ffffffff82d6d100 r caicos_smc_int_vectors +ffffffff82d6d140 r cayman_smc_int_vectors +ffffffff82d6e000 r tahiti_io_mc_regs +ffffffff82d6e120 r pitcairn_io_mc_regs +ffffffff82d6e240 r verde_io_mc_regs +ffffffff82d6e360 r oland_io_mc_regs +ffffffff82d6e480 r hainan_io_mc_regs +ffffffff82d6e5a0 r crtc_offsets +ffffffff82d6e5c0 r si_disp_int_status +ffffffff82d6e5e0 r tahiti_golden_registers +ffffffff82d6e760 r tahiti_golden_rlc_registers +ffffffff82d6e7b0 r tahiti_mgcg_cgcg_init +ffffffff82d6ed98 r tahiti_golden_registers2 +ffffffff82d6edb0 r pitcairn_golden_registers +ffffffff82d6ef00 r pitcairn_golden_rlc_registers +ffffffff82d6ef40 r pitcairn_mgcg_cgcg_init +ffffffff82d6f3b0 r verde_golden_registers +ffffffff82d6f620 r verde_golden_rlc_registers +ffffffff82d6f660 r verde_mgcg_cgcg_init +ffffffff82d6fae0 r oland_golden_registers +ffffffff82d6fc30 r oland_golden_rlc_registers +ffffffff82d6fc70 r oland_mgcg_cgcg_init +ffffffff82d70000 r hainan_golden_registers +ffffffff82d7012c r hainan_golden_registers2 +ffffffff82d70140 r hainan_mgcg_cgcg_init +ffffffff82d704b0 r verde_rlc_save_restore_register_list +ffffffff82d70820 r si_cs_data +ffffffff82d70840 r si_SECT_CONTEXT_defs +ffffffff82d708c0 r si_SECT_CONTEXT_def_1 +ffffffff82d70c10 r si_SECT_CONTEXT_def_3 +ffffffff82d70c30 r si_SECT_CONTEXT_def_4 +ffffffff82d70ea4 r si_SECT_CONTEXT_def_5 +ffffffff82d70ea8 r si_SECT_CONTEXT_def_6 +ffffffff82d70eb0 r si_SECT_CONTEXT_def_2 +ffffffff82d712f0 r si_SECT_CONTEXT_def_7 +ffffffff82d716a0 r mc_cg_registers +ffffffff82d716d0 r si_default_state +ffffffff82d72000 r cac_weights_tahiti +ffffffff82d724d0 r lcac_tahiti +ffffffff82d72ba0 r cac_override_tahiti +ffffffff82d72bb4 r powertune_data_tahiti +ffffffff82d72bf0 r dte_data_tahiti +ffffffff82d72cc0 r dte_data_new_zealand +ffffffff82d72d90 r dte_data_malta +ffffffff82d72e60 r lcac_pitcairn +ffffffff82d73530 r cac_override_pitcairn +ffffffff82d73544 r powertune_data_pitcairn +ffffffff82d73580 r lcac_cape_verde +ffffffff82d739d0 r cac_override_cape_verde +ffffffff82d739e4 r powertune_data_cape_verde +ffffffff82d73a20 r cac_weights_cape_verde_pro +ffffffff82d73ef0 r cac_weights_heathrow +ffffffff82d743c0 r cac_weights_chelsea_xt +ffffffff82d74890 r cac_weights_chelsea_pro +ffffffff82d74d60 r cac_weights_cape_verde +ffffffff82d75230 r cac_weights_mars_pro +ffffffff82d75700 r lcac_mars_pro +ffffffff82d75a60 r cac_override_oland +ffffffff82d75a74 r powertune_data_mars_pro +ffffffff82d75ab0 r cac_weights_mars_xt +ffffffff82d75f80 r cac_weights_oland_pro +ffffffff82d76450 r cac_weights_oland_xt +ffffffff82d76920 r lcac_oland +ffffffff82d76c7c r powertune_data_oland +ffffffff82d76cc0 r cac_weights_hainan +ffffffff82d77184 r powertune_data_hainan +ffffffff82d771c0 r dte_data_aruba_pro +ffffffff82d77290 r dte_data_tahiti_pro +ffffffff82d77360 r dte_data_curacao_pro +ffffffff82d77430 r dte_data_neptune_xt +ffffffff82d77500 r dte_data_sun_xt +ffffffff82d775d0 r dte_data_venus_xtx +ffffffff82d776a0 r dte_data_venus_xt +ffffffff82d77770 r dte_data_venus_pro +ffffffff82d77840 r dte_data_mars_pro +ffffffff82d78000 r si_program_jump_on_start.data +ffffffff82d79000 r sumo_dtc +ffffffff82d7a000 r trinity_mgcg_shls_default +ffffffff82d7a380 r trinity_sysls_enable +ffffffff82d7a450 r trinity_sysls_disable +ffffffff82d7c000 r GC_BASE +ffffffff82d7c0a8 r HDP_BASE +ffffffff82d7c150 r MMHUB_BASE +ffffffff82d7c1f8 r ATHUB_BASE +ffffffff82d7c2a0 r NBIO_BASE +ffffffff82d7c348 r MP0_BASE +ffffffff82d7c3f0 r MP1_BASE +ffffffff82d7c498 r DF_BASE +ffffffff82d7c540 r OSSSYS_BASE +ffffffff82d7c5e8 r SDMA0_BASE +ffffffff82d7c690 r SDMA1_BASE +ffffffff82d7c738 r SDMA2_BASE +ffffffff82d7c7e0 r SDMA3_BASE +ffffffff82d7c888 r SDMA4_BASE +ffffffff82d7c930 r SMUIO_BASE +ffffffff82d7c9d8 r THM_BASE +ffffffff82d7ca80 r UMC_BASE +ffffffff82d7cb28 r VCN_BASE +ffffffff82d7d000 r amdgpu_afmt_predefined_acr +ffffffff82d7e000 r atom_op_names +ffffffff82d7e3e0 r opcode_table +ffffffff82d7ebd0 r atom_dst_to_src +ffffffff82d7ec50 r atom_io_names +ffffffff82d7ec80 r atom_table_names +ffffffff82d7eed0 r atom_iio_len +ffffffff82d7f000 r object_connector_convert +ffffffff82d7f058 R amdgpu_vbios_version_attr_group +ffffffff82d80000 r voltage_names +ffffffff82d80020 r pre_emph_names +ffffffff82d81000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82d83000 r amdgpu_benchmark.common_modes +ffffffff82d84000 r amdgpu_cgs_ops +ffffffff82d85000 r amdgpu_connector_dp_funcs +ffffffff82d85078 r amdgpu_connector_dp_helper_funcs +ffffffff82d850d8 r amdgpu_connector_edp_funcs +ffffffff82d85150 r amdgpu_connector_vga_funcs +ffffffff82d851c8 r amdgpu_connector_vga_helper_funcs +ffffffff82d85228 r amdgpu_connector_dvi_funcs +ffffffff82d852a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82d85300 r amdgpu_connector_lvds_funcs +ffffffff82d85378 r amdgpu_connector_lvds_helper_funcs +ffffffff82d853e0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82d87000 R amdgpu_ctx_num_entities +ffffffff82d88000 r amdgpu_kms_driver +ffffffff82d880f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82d89000 r hw_id_map +ffffffff82d89090 r hw_id_names +ffffffff82d8a000 r hpd_names +ffffffff82d8a030 r encoder_names +ffffffff82d8a180 r dcc_retile_formats +ffffffff82d8a270 r dcc_formats +ffffffff82d8a360 R amdgpu_mode_funcs +ffffffff82d8a3b0 r amdgpu_underscan_enum_list +ffffffff82d8a3e0 r amdgpu_audio_enum_list +ffffffff82d8a410 r amdgpu_dither_enum_list +ffffffff82d8a430 r amdgpu_fb_funcs_atomic +ffffffff82d8a448 r amdgpu_fb_funcs +ffffffff82d8b000 R amdgpu_dmabuf_ops +ffffffff82d8c000 R amdgpu_ioctls_kms +ffffffff82d8c210 R amdgpu_partition_driver +ffffffff82d8c2f8 R amdgpu_ca +ffffffff82d8c320 r pciidlist +ffffffff82d8d1f0 r amdgpu_unsupported_pciidlist +ffffffff82d8d770 r amdgpu_kms_driver +ffffffff82d8e000 r amdgpu_job_fence_ops +ffffffff82d8e040 r amdgpu_fence_ops +ffffffff82d8f000 r amdgpu_gem_object_funcs +ffffffff82d8f070 r amdgpu_gem_vm_ops +ffffffff82d90000 R amdgpu_gtt_mgr_attr_group +ffffffff82d90018 r amdgpu_gtt_mgr_func +ffffffff82d91000 r amdgpu_atombios_i2c_algo +ffffffff82d92000 R node_id_to_phys_map +ffffffff82d93000 R amdgpu_sched_ops +ffffffff82d95000 r amdgpu_vram_names +ffffffff82d96000 r amdgpu_preempt_mgr_func +ffffffff82d97000 R psp_ip_funcs +ffffffff82d970a8 R psp_v3_1_ip_block +ffffffff82d970c0 R psp_v10_0_ip_block +ffffffff82d970d8 R psp_v11_0_ip_block +ffffffff82d970f0 R psp_v11_0_8_ip_block +ffffffff82d97108 R psp_v12_0_ip_block +ffffffff82d97120 R psp_v13_0_ip_block +ffffffff82d97138 R psp_v13_0_4_ip_block +ffffffff82d99000 r sw_ring_info +ffffffff82d9a000 r amdgpu_evict_flags.placements +ffffffff82d9e000 R amdgpu_vkms_ip_block +ffffffff82d9f000 R amdgpu_vm_cpu_funcs +ffffffff82da1000 R amdgpu_vm_sdma_funcs +ffffffff82da2000 R amdgpu_vram_mgr_attr_group +ffffffff82da2018 r amdgpu_vram_mgr_func +ffffffff82da2040 r amdgpu_dummy_vram_mgr_func +ffffffff82da3000 r xgmi_pcs_err_status_reg_arct +ffffffff82da3020 r xgmi3x16_pcs_ras_fields +ffffffff82da31f0 r xgmi_pcs_ras_fields +ffffffff82da3310 r wafl_pcs_ras_fields +ffffffff82da4000 r GC_BASE +ffffffff82da40c0 r HDP_BASE +ffffffff82da4180 r MMHUB_BASE +ffffffff82da4240 r ATHUB_BASE +ffffffff82da4300 r NBIF0_BASE +ffffffff82da43c0 r MP0_BASE +ffffffff82da4480 r MP1_BASE +ffffffff82da4540 r UVD_BASE +ffffffff82da4600 r DF_BASE +ffffffff82da46c0 r OSSSYS_BASE +ffffffff82da4780 r SDMA0_BASE +ffffffff82da4840 r SDMA1_BASE +ffffffff82da4900 r SDMA2_BASE +ffffffff82da49c0 r SDMA3_BASE +ffffffff82da4a80 r SDMA4_BASE +ffffffff82da4b40 r SDMA5_BASE +ffffffff82da4c00 r SDMA6_BASE +ffffffff82da4cc0 r SDMA7_BASE +ffffffff82da4d80 r SMUIO_BASE +ffffffff82da4e40 r THM_BASE +ffffffff82da4f00 r UMC_BASE +ffffffff82da4fc0 r RSMU_BASE +ffffffff82da6000 r cz_ih_ip_funcs +ffffffff82da60a8 R cz_ih_ip_block +ffffffff82da60c0 r cz_ih_funcs ffffffff82da7000 r crtc_offsets -ffffffff82da7020 r dce_v11_0_ip_funcs -ffffffff82da70c8 R dce_v11_0_ip_block -ffffffff82da70e0 R dce_v11_2_ip_block -ffffffff82da70f8 r dce_v11_0_display_funcs +ffffffff82da7020 r dce_v10_0_ip_funcs +ffffffff82da70c8 R dce_v10_0_ip_block +ffffffff82da70e0 R dce_v10_1_ip_block +ffffffff82da70f8 r dce_v10_0_display_funcs ffffffff82da7150 r hpd_offsets -ffffffff82da7168 r dce_v11_0_encoder_funcs -ffffffff82da7188 r dce_v11_0_dac_helper_funcs -ffffffff82da71f0 r dce_v11_0_dig_helper_funcs -ffffffff82da7258 r dce_v11_0_ext_helper_funcs -ffffffff82da72c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82da72f0 r dce_v11_0_crtc_irq_funcs -ffffffff82da7300 r dce_v11_0_pageflip_irq_funcs -ffffffff82da7310 r dce_v11_0_hpd_irq_funcs +ffffffff82da7168 r dce_v10_0_encoder_funcs +ffffffff82da7188 r dce_v10_0_dac_helper_funcs +ffffffff82da71f0 r dce_v10_0_dig_helper_funcs +ffffffff82da7258 r dce_v10_0_ext_helper_funcs +ffffffff82da72c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82da72f0 r dce_v10_0_crtc_irq_funcs +ffffffff82da7300 r dce_v10_0_pageflip_irq_funcs +ffffffff82da7310 r dce_v10_0_hpd_irq_funcs ffffffff82da7320 r interrupt_status_offsets -ffffffff82da7380 r dce_v11_0_crtc_funcs -ffffffff82da7440 r dce_v11_0_crtc_helper_funcs +ffffffff82da7380 r dce_v10_0_crtc_funcs +ffffffff82da7440 r dce_v10_0_crtc_helper_funcs ffffffff82da74c0 r vga_control_regs ffffffff82da74e0 r dig_offsets -ffffffff82da7510 r cz_mgcg_cgcg_init -ffffffff82da7530 r cz_golden_settings_a11 -ffffffff82da7550 r stoney_golden_settings_a11 -ffffffff82da7570 r polaris11_golden_settings_a11 -ffffffff82da75b0 r polaris10_golden_settings_a11 -ffffffff82da8000 R df_v1_7_funcs -ffffffff82da8070 r df_v1_7_channel_number -ffffffff82da9000 R df_v3_6_funcs -ffffffff82da9070 r df_v3_6_channel_number -ffffffff82daa000 R df_v4_3_funcs -ffffffff82dab000 r GC_BASE -ffffffff82dab0a8 r HDP_BASE -ffffffff82dab150 r MMHUB_BASE -ffffffff82dab1f8 r ATHUB_BASE -ffffffff82dab2a0 r NBIO_BASE -ffffffff82dab348 r MP0_BASE -ffffffff82dab3f0 r MP1_BASE -ffffffff82dab498 r VCN0_BASE -ffffffff82dab540 r DF_BASE -ffffffff82dab5e8 r DCN_BASE -ffffffff82dab690 r OSSSYS_BASE -ffffffff82dab738 r SMUIO_BASE -ffffffff82dab7e0 r THM_BASE -ffffffff82dac000 r gfx_v10_0_ip_funcs -ffffffff82dac0a8 R gfx_v10_0_ip_block -ffffffff82dac0c0 r gfx_v10_0_gfx_funcs -ffffffff82dac120 r golden_settings_gc_rlc_spm_10_0_nv10 -ffffffff82db23c0 r golden_settings_gc_rlc_spm_10_1_nv14 -ffffffff82db5de0 r golden_settings_gc_rlc_spm_10_1_2_nv12 -ffffffff82dbc080 r gfx_v10_0_kiq_pm4_funcs -ffffffff82dbc0c0 r gfx_v10_0_ring_funcs_kiq -ffffffff82dbc200 r gfx_v10_0_ring_funcs_gfx -ffffffff82dbc340 r gfx_v10_0_ring_funcs_compute -ffffffff82dbc480 r gfx_v10_0_eop_irq_funcs -ffffffff82dbc490 r gfx_v10_0_kiq_irq_funcs -ffffffff82dbc4a0 r gfx_v10_0_priv_reg_irq_funcs -ffffffff82dbc4b0 r gfx_v10_0_priv_inst_irq_funcs -ffffffff82dbc4c0 r gfx_v10_0_rlc_funcs -ffffffff82dbc528 r gfx_v10_0_rlc_funcs_sriov -ffffffff82dbc590 r gfx10_cs_data -ffffffff82dbc5b0 r gfx10_SECT_CONTEXT_defs -ffffffff82dbc640 r gfx10_SECT_CONTEXT_def_1 -ffffffff82dbc9a0 r gfx10_SECT_CONTEXT_def_3 -ffffffff82dbc9b0 r gfx10_SECT_CONTEXT_def_4 -ffffffff82dbcc28 r gfx10_SECT_CONTEXT_def_5 -ffffffff82dbcc30 r gfx10_SECT_CONTEXT_def_6 -ffffffff82dbcc40 r gfx10_SECT_CONTEXT_def_2 -ffffffff82dbd080 r gfx10_SECT_CONTEXT_def_7 -ffffffff82dbd190 r gfx10_SECT_CONTEXT_def_8 -ffffffff82dbd4c0 r golden_settings_gc_10_1 -ffffffff82dbd880 r golden_settings_gc_10_0_nv10 -ffffffff82dbd880 r golden_settings_gc_10_1_1 -ffffffff82dbdc10 r golden_settings_gc_10_1_2 -ffffffff82dbdc10 r golden_settings_gc_10_1_nv14 -ffffffff82dbe000 r golden_settings_gc_10_1_2_nv12 -ffffffff82dbe000 r golden_settings_gc_10_3 -ffffffff82dbe408 r golden_settings_gc_10_3_sienna_cichlid -ffffffff82dbe410 r golden_settings_gc_10_3_2 -ffffffff82dbe800 r golden_settings_gc_10_3_vangogh -ffffffff82dbea60 r golden_settings_gc_10_3_3 -ffffffff82dbec40 r golden_settings_gc_10_3_4 -ffffffff82dbefa0 r golden_settings_gc_10_3_5 -ffffffff82dbf2a0 r golden_settings_gc_10_0_cyan_skillfish -ffffffff82dbf5d0 r golden_settings_gc_10_3_6 -ffffffff82dbf7e0 r golden_settings_gc_10_3_7 -ffffffff82dc0000 r gfx_v11_0_ip_funcs -ffffffff82dc00a8 R gfx_v11_0_ip_block -ffffffff82dc00c0 r gfx_v11_0_gfx_funcs -ffffffff82dc0120 r gfx_v11_0_kiq_pm4_funcs -ffffffff82dc0160 r gfx_v11_0_ring_funcs_kiq -ffffffff82dc02a0 r gfx_v11_0_ring_funcs_gfx -ffffffff82dc03e0 r gfx_v11_0_ring_funcs_compute -ffffffff82dc0520 r gfx_v11_0_eop_irq_funcs -ffffffff82dc0530 r gfx_v11_0_priv_reg_irq_funcs -ffffffff82dc0540 r gfx_v11_0_priv_inst_irq_funcs -ffffffff82dc0550 r gfx_v11_0_rlc_gc_fed_irq_funcs -ffffffff82dc0560 r gfx_v11_0_rlc_funcs -ffffffff82dc05d0 r gfx11_cs_data -ffffffff82dc05f0 r gfx11_SECT_CONTEXT_defs -ffffffff82dc0670 r gfx11_SECT_CONTEXT_def_1 -ffffffff82dc09d0 r gfx11_SECT_CONTEXT_def_3 -ffffffff82dc09e0 r gfx11_SECT_CONTEXT_def_5 -ffffffff82dc09e8 r gfx11_SECT_CONTEXT_def_6 -ffffffff82dc09f0 r gfx11_SECT_CONTEXT_def_2 -ffffffff82dc0e30 r gfx11_SECT_CONTEXT_def_4 -ffffffff82dc10b0 r gfx11_SECT_CONTEXT_def_7 -ffffffff82dc1520 r golden_settings_gc_11_0_1 -ffffffff82dc1600 r golden_settings_gc_11_0 -ffffffff82dc2000 r gfx_v8_0_ip_funcs -ffffffff82dc20a8 R gfx_v8_0_ip_block -ffffffff82dc20c0 R gfx_v8_1_ip_block -ffffffff82dc20d8 r gfx_v8_0_gfx_funcs -ffffffff82dc2138 r gfx_v8_0_ring_funcs_kiq -ffffffff82dc2278 r gfx_v8_0_ring_funcs_gfx -ffffffff82dc23b8 r gfx_v8_0_ring_funcs_compute -ffffffff82dc2500 r amdgpu_gds_reg_offset -ffffffff82dc2600 r gfx_v8_0_eop_irq_funcs -ffffffff82dc2610 r gfx_v8_0_priv_reg_irq_funcs -ffffffff82dc2620 r gfx_v8_0_priv_inst_irq_funcs -ffffffff82dc2630 r gfx_v8_0_cp_ecc_error_irq_funcs -ffffffff82dc2640 r gfx_v8_0_sq_irq_funcs -ffffffff82dc2650 r sq_edc_source_names -ffffffff82dc2688 r iceland_rlc_funcs -ffffffff82dc26f0 r vi_cs_data -ffffffff82dc2710 r vi_SECT_CONTEXT_defs -ffffffff82dc2790 r vi_SECT_CONTEXT_def_1 -ffffffff82dc2ae0 r vi_SECT_CONTEXT_def_3 -ffffffff82dc2b00 r vi_SECT_CONTEXT_def_4 -ffffffff82dc2d74 r vi_SECT_CONTEXT_def_5 -ffffffff82dc2d7c r vi_SECT_CONTEXT_def_6 -ffffffff82dc2d80 r vi_SECT_CONTEXT_def_2 -ffffffff82dc31d0 r vi_SECT_CONTEXT_def_7 -ffffffff82dc3580 r vgpr_init_compute_shader -ffffffff82dc3690 r vgpr_init_regs -ffffffff82dc3720 r sgpr1_init_regs -ffffffff82dc37b0 r sgpr2_init_regs -ffffffff82dc3840 r sec_ded_counter_registers -ffffffff82dc38b0 r iceland_mgcg_cgcg_init -ffffffff82dc3bb0 r golden_settings_iceland_a11 -ffffffff82dc3c70 r iceland_golden_common_all -ffffffff82dc3cd0 r fiji_mgcg_cgcg_init -ffffffff82dc3e80 r golden_settings_fiji_a10 -ffffffff82dc3f10 r fiji_golden_common_all -ffffffff82dc3f90 r tonga_mgcg_cgcg_init -ffffffff82dc4320 r golden_settings_tonga_a11 -ffffffff82dc43e0 r tonga_golden_common_all -ffffffff82dc4440 r golden_settings_vegam_a11 -ffffffff82dc4510 r vegam_golden_common_all -ffffffff82dc4560 r golden_settings_polaris11_a11 -ffffffff82dc4630 r polaris11_golden_common_all -ffffffff82dc4680 r golden_settings_polaris10_a11 -ffffffff82dc4750 r polaris10_golden_common_all -ffffffff82dc47b0 r cz_mgcg_cgcg_init -ffffffff82dc4b40 r cz_golden_settings_a11 -ffffffff82dc4bd0 r cz_golden_common_all -ffffffff82dc4c30 r stoney_mgcg_cgcg_init -ffffffff82dc4c70 r stoney_golden_settings_a11 -ffffffff82dc4cf0 r stoney_golden_common_all -ffffffff82dc5000 R gfx_v9_0_ras_ops -ffffffff82dc5040 r gfx_v9_0_ip_funcs -ffffffff82dc50e8 R gfx_v9_0_ip_block -ffffffff82dc5100 r ras_gfx_subblocks -ffffffff82dc5b80 r gfx_v9_0_edc_counter_regs -ffffffff82dc5f20 r gfx_v9_0_ras_fields -ffffffff82dc7000 r gfx_v9_0_gfx_funcs -ffffffff82dc7060 r gfx_v9_0_kiq_pm4_funcs -ffffffff82dc70a0 r gfx_v9_0_ring_funcs_kiq -ffffffff82dc71e0 r gfx_v9_0_ring_funcs_gfx -ffffffff82dc7320 r gfx_v9_0_sw_ring_funcs_gfx -ffffffff82dc7460 r gfx_v9_0_ring_funcs_compute -ffffffff82dc75a0 r gfx_v9_0_eop_irq_funcs -ffffffff82dc75b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82dc75c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82dc75d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82dc75e0 r gfx_v9_0_rlc_funcs -ffffffff82dc7650 r gfx9_cs_data -ffffffff82dc7670 r gfx9_SECT_CONTEXT_defs -ffffffff82dc7700 r gfx9_SECT_CONTEXT_def_1 -ffffffff82dc7a50 r gfx9_SECT_CONTEXT_def_3 -ffffffff82dc7a60 r gfx9_SECT_CONTEXT_def_4 -ffffffff82dc7cd4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82dc7cdc r gfx9_SECT_CONTEXT_def_6 -ffffffff82dc7ce0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82dc7df0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82dc8260 r gfx9_SECT_CONTEXT_def_8 -ffffffff82dc84d0 r amdgpu_gfxoff_quirk_list -ffffffff82dc8520 r vgpr_init_compute_shader_arcturus -ffffffff82dc8db0 r vgpr_init_regs_arcturus -ffffffff82dc8f40 r vgpr_init_regs -ffffffff82dc90d0 r sgpr1_init_regs -ffffffff82dc9260 r sgpr2_init_regs -ffffffff82dc93f0 r golden_settings_gc_9_0 -ffffffff82dc95d0 r golden_settings_gc_9_0_vg10 -ffffffff82dc9780 r golden_settings_gc_9_2_1 -ffffffff82dc9900 r golden_settings_gc_9_2_1_vg12 -ffffffff82dc9a40 r golden_settings_gc_9_0_vg20 -ffffffff82dc9b50 r golden_settings_gc_9_4_1_arct -ffffffff82dc9c60 r golden_settings_gc_9_1 -ffffffff82dc9ea0 r golden_settings_gc_9_1_rv2 -ffffffff82dca070 r golden_settings_gc_9_1_rv1 -ffffffff82dca120 r golden_settings_gc_9_1_rn -ffffffff82dca240 r golden_settings_gc_9_x_common -ffffffff82dcb000 R gfx_v9_4_ras_ops -ffffffff82dcb040 r gfx_v9_4_edc_counter_regs -ffffffff82dcb420 r gfx_v9_4_ras_fields -ffffffff82dcd000 R vgpr_init_regs_aldebaran -ffffffff82dcd1b0 R sgpr112_init_regs_aldebaran -ffffffff82dcd360 R sgpr96_init_regs_aldebaran -ffffffff82dcd510 R sgpr64_init_regs_aldebaran -ffffffff82dcd6c0 r golden_settings_gc_9_4_2_alde -ffffffff82dcd720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82dcd7b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82dcd840 r sgpr112_init_compute_shader_aldebaran -ffffffff82dcda60 r sgpr96_init_compute_shader_aldebaran -ffffffff82dcdc50 r sgpr64_init_compute_shader_aldebaran -ffffffff82dcddc0 r vgpr_init_compute_shader_aldebaran -ffffffff82dce6a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82dcea20 r gfx_v9_4_2_ras_fields -ffffffff82dd03c0 r gfx_v9_4_2_utc_blocks -ffffffff82dd1000 r gfx_v9_4_3_ip_funcs -ffffffff82dd10a8 R gfx_v9_4_3_ip_block -ffffffff82dd10c0 r gfx_v9_4_3_kiq_pm4_funcs -ffffffff82dd1100 r gfx_v9_4_3_ring_funcs_kiq -ffffffff82dd1240 r gfx_v9_4_3_ring_funcs_compute -ffffffff82dd1380 r gfx_v9_4_3_eop_irq_funcs -ffffffff82dd1390 r gfx_v9_4_3_priv_reg_irq_funcs -ffffffff82dd13a0 r gfx_v9_4_3_priv_inst_irq_funcs -ffffffff82dd13b0 r gfx_v9_4_3_rlc_funcs -ffffffff82dd1418 r gfx_v9_4_3_gfx_funcs -ffffffff82dd1480 r gfx_v9_4_3_ce_reg_list -ffffffff82dd1810 r gfx_v9_4_3_ras_mem_list_array -ffffffff82dd1970 r gfx_v9_4_3_ue_reg_list -ffffffff82dd1d30 r gfx_v9_4_3_ras_cp_mem_list -ffffffff82dd1d80 r gfx_v9_4_3_ras_gcea_mem_list -ffffffff82dd1ec0 r gfx_v9_4_3_ras_gc_cane_mem_list -ffffffff82dd1ed0 r gfx_v9_4_3_ras_gcutcl2_mem_list -ffffffff82dd1ee0 r gfx_v9_4_3_ras_gds_mem_list -ffffffff82dd1ef0 r gfx_v9_4_3_ras_lds_mem_list -ffffffff82dd2110 r gfx_v9_4_3_ras_rlc_mem_list -ffffffff82dd2190 r gfx_v9_4_3_ras_sp_mem_list -ffffffff82dd21a0 r gfx_v9_4_3_ras_spi_mem_list -ffffffff82dd21e0 r gfx_v9_4_3_ras_sqc_mem_list -ffffffff82dd2350 r gfx_v9_4_3_ras_sq_mem_list -ffffffff82dd2390 r gfx_v9_4_3_ras_ta_mem_list -ffffffff82dd23e0 r gfx_v9_4_3_ras_tcc_mem_list -ffffffff82dd23f0 r gfx_v9_4_3_ras_tca_mem_list -ffffffff82dd2400 r gfx_v9_4_3_ras_tci_mem_list -ffffffff82dd2410 r gfx_v9_4_3_ras_tcp_mem_list -ffffffff82dd25a0 r gfx_v9_4_3_ras_td_mem_list -ffffffff82dd25d0 r gfx_v9_4_3_ras_tcx_mem_list -ffffffff82dd2b50 r gfx_v9_4_3_ras_atc_l2_mem_list -ffffffff82dd2b60 r gfx_v9_4_3_ras_utcl2_mem_list -ffffffff82dd2b70 r gfx_v9_4_3_ras_vml2_mem_list -ffffffff82dd2b80 r gfx_v9_4_3_ras_vml2_walker_mem_list -ffffffff82dd3000 R gfxhub_v1_0_funcs -ffffffff82dd4000 R gfxhub_v1_2_funcs -ffffffff82dd5000 R gfxhub_v2_0_funcs -ffffffff82dd5060 r gfxhub_v2_0_vmhub_funcs -ffffffff82dd5070 r gfxhub_client_ids -ffffffff82dd6000 R gfxhub_v2_1_funcs -ffffffff82dd6060 r gfxhub_v2_1_vmhub_funcs +ffffffff82da7500 r pin_offsets +ffffffff82da7520 r fiji_mgcg_cgcg_init +ffffffff82da7540 r golden_settings_fiji_a10 +ffffffff82da7570 r tonga_mgcg_cgcg_init +ffffffff82da7590 r golden_settings_tonga_a11 +ffffffff82da8000 r crtc_offsets +ffffffff82da8020 r dce_v11_0_ip_funcs +ffffffff82da80c8 R dce_v11_0_ip_block +ffffffff82da80e0 R dce_v11_2_ip_block +ffffffff82da80f8 r dce_v11_0_display_funcs +ffffffff82da8150 r hpd_offsets +ffffffff82da8168 r dce_v11_0_encoder_funcs +ffffffff82da8188 r dce_v11_0_dac_helper_funcs +ffffffff82da81f0 r dce_v11_0_dig_helper_funcs +ffffffff82da8258 r dce_v11_0_ext_helper_funcs +ffffffff82da82c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82da82f0 r dce_v11_0_crtc_irq_funcs +ffffffff82da8300 r dce_v11_0_pageflip_irq_funcs +ffffffff82da8310 r dce_v11_0_hpd_irq_funcs +ffffffff82da8320 r interrupt_status_offsets +ffffffff82da8380 r dce_v11_0_crtc_funcs +ffffffff82da8440 r dce_v11_0_crtc_helper_funcs +ffffffff82da84c0 r vga_control_regs +ffffffff82da84e0 r dig_offsets +ffffffff82da8510 r cz_mgcg_cgcg_init +ffffffff82da8530 r cz_golden_settings_a11 +ffffffff82da8550 r stoney_golden_settings_a11 +ffffffff82da8570 r polaris11_golden_settings_a11 +ffffffff82da85b0 r polaris10_golden_settings_a11 +ffffffff82da9000 R df_v1_7_funcs +ffffffff82da9070 r df_v1_7_channel_number +ffffffff82daa000 R df_v3_6_funcs +ffffffff82daa070 r df_v3_6_channel_number +ffffffff82dab000 R df_v4_3_funcs +ffffffff82dac000 r GC_BASE +ffffffff82dac0a8 r HDP_BASE +ffffffff82dac150 r MMHUB_BASE +ffffffff82dac1f8 r ATHUB_BASE +ffffffff82dac2a0 r NBIO_BASE +ffffffff82dac348 r MP0_BASE +ffffffff82dac3f0 r MP1_BASE +ffffffff82dac498 r VCN0_BASE +ffffffff82dac540 r DF_BASE +ffffffff82dac5e8 r DCN_BASE +ffffffff82dac690 r OSSSYS_BASE +ffffffff82dac738 r SMUIO_BASE +ffffffff82dac7e0 r THM_BASE +ffffffff82dad000 r gfx_v10_0_ip_funcs +ffffffff82dad0a8 R gfx_v10_0_ip_block +ffffffff82dad0c0 r gfx_v10_0_gfx_funcs +ffffffff82dad120 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82db33c0 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82db6de0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82dbd080 r gfx_v10_0_kiq_pm4_funcs +ffffffff82dbd0c0 r gfx_v10_0_ring_funcs_kiq +ffffffff82dbd200 r gfx_v10_0_ring_funcs_gfx +ffffffff82dbd340 r gfx_v10_0_ring_funcs_compute +ffffffff82dbd480 r gfx_v10_0_eop_irq_funcs +ffffffff82dbd490 r gfx_v10_0_kiq_irq_funcs +ffffffff82dbd4a0 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82dbd4b0 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82dbd4c0 r gfx_v10_0_rlc_funcs +ffffffff82dbd528 r gfx_v10_0_rlc_funcs_sriov +ffffffff82dbd590 r gfx10_cs_data +ffffffff82dbd5b0 r gfx10_SECT_CONTEXT_defs +ffffffff82dbd640 r gfx10_SECT_CONTEXT_def_1 +ffffffff82dbd9a0 r gfx10_SECT_CONTEXT_def_3 +ffffffff82dbd9b0 r gfx10_SECT_CONTEXT_def_4 +ffffffff82dbdc28 r gfx10_SECT_CONTEXT_def_5 +ffffffff82dbdc30 r gfx10_SECT_CONTEXT_def_6 +ffffffff82dbdc40 r gfx10_SECT_CONTEXT_def_2 +ffffffff82dbe080 r gfx10_SECT_CONTEXT_def_7 +ffffffff82dbe190 r gfx10_SECT_CONTEXT_def_8 +ffffffff82dbe4c0 r golden_settings_gc_10_1 +ffffffff82dbe880 r golden_settings_gc_10_0_nv10 +ffffffff82dbe880 r golden_settings_gc_10_1_1 +ffffffff82dbec10 r golden_settings_gc_10_1_2 +ffffffff82dbec10 r golden_settings_gc_10_1_nv14 +ffffffff82dbf000 r golden_settings_gc_10_1_2_nv12 +ffffffff82dbf000 r golden_settings_gc_10_3 +ffffffff82dbf408 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82dbf410 r golden_settings_gc_10_3_2 +ffffffff82dbf800 r golden_settings_gc_10_3_vangogh +ffffffff82dbfa60 r golden_settings_gc_10_3_3 +ffffffff82dbfc40 r golden_settings_gc_10_3_4 +ffffffff82dbffa0 r golden_settings_gc_10_3_5 +ffffffff82dc02a0 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82dc05d0 r golden_settings_gc_10_3_6 +ffffffff82dc07e0 r golden_settings_gc_10_3_7 +ffffffff82dc1000 r gfx_v11_0_ip_funcs +ffffffff82dc10a8 R gfx_v11_0_ip_block +ffffffff82dc10c0 r gfx_v11_0_gfx_funcs +ffffffff82dc1120 r gfx_v11_0_kiq_pm4_funcs +ffffffff82dc1160 r gfx_v11_0_ring_funcs_kiq +ffffffff82dc12a0 r gfx_v11_0_ring_funcs_gfx +ffffffff82dc13e0 r gfx_v11_0_ring_funcs_compute +ffffffff82dc1520 r gfx_v11_0_eop_irq_funcs +ffffffff82dc1530 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82dc1540 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82dc1550 r gfx_v11_0_rlc_gc_fed_irq_funcs +ffffffff82dc1560 r gfx_v11_0_rlc_funcs +ffffffff82dc15d0 r gfx11_cs_data +ffffffff82dc15f0 r gfx11_SECT_CONTEXT_defs +ffffffff82dc1670 r gfx11_SECT_CONTEXT_def_1 +ffffffff82dc19d0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82dc19e0 r gfx11_SECT_CONTEXT_def_5 +ffffffff82dc19e8 r gfx11_SECT_CONTEXT_def_6 +ffffffff82dc19f0 r gfx11_SECT_CONTEXT_def_2 +ffffffff82dc1e30 r gfx11_SECT_CONTEXT_def_4 +ffffffff82dc20b0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82dc2520 r golden_settings_gc_11_0_1 +ffffffff82dc2600 r golden_settings_gc_11_0 +ffffffff82dc3000 r gfx_v8_0_ip_funcs +ffffffff82dc30a8 R gfx_v8_0_ip_block +ffffffff82dc30c0 R gfx_v8_1_ip_block +ffffffff82dc30d8 r gfx_v8_0_gfx_funcs +ffffffff82dc3138 r gfx_v8_0_ring_funcs_kiq +ffffffff82dc3278 r gfx_v8_0_ring_funcs_gfx +ffffffff82dc33b8 r gfx_v8_0_ring_funcs_compute +ffffffff82dc3500 r amdgpu_gds_reg_offset +ffffffff82dc3600 r gfx_v8_0_eop_irq_funcs +ffffffff82dc3610 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82dc3620 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82dc3630 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82dc3640 r gfx_v8_0_sq_irq_funcs +ffffffff82dc3650 r sq_edc_source_names +ffffffff82dc3688 r iceland_rlc_funcs +ffffffff82dc36f0 r vi_cs_data +ffffffff82dc3710 r vi_SECT_CONTEXT_defs +ffffffff82dc3790 r vi_SECT_CONTEXT_def_1 +ffffffff82dc3ae0 r vi_SECT_CONTEXT_def_3 +ffffffff82dc3b00 r vi_SECT_CONTEXT_def_4 +ffffffff82dc3d74 r vi_SECT_CONTEXT_def_5 +ffffffff82dc3d7c r vi_SECT_CONTEXT_def_6 +ffffffff82dc3d80 r vi_SECT_CONTEXT_def_2 +ffffffff82dc41d0 r vi_SECT_CONTEXT_def_7 +ffffffff82dc4580 r vgpr_init_compute_shader +ffffffff82dc4690 r vgpr_init_regs +ffffffff82dc4720 r sgpr1_init_regs +ffffffff82dc47b0 r sgpr2_init_regs +ffffffff82dc4840 r sec_ded_counter_registers +ffffffff82dc48b0 r iceland_mgcg_cgcg_init +ffffffff82dc4bb0 r golden_settings_iceland_a11 +ffffffff82dc4c70 r iceland_golden_common_all +ffffffff82dc4cd0 r fiji_mgcg_cgcg_init +ffffffff82dc4e80 r golden_settings_fiji_a10 +ffffffff82dc4f10 r fiji_golden_common_all +ffffffff82dc4f90 r tonga_mgcg_cgcg_init +ffffffff82dc5320 r golden_settings_tonga_a11 +ffffffff82dc53e0 r tonga_golden_common_all +ffffffff82dc5440 r golden_settings_vegam_a11 +ffffffff82dc5510 r vegam_golden_common_all +ffffffff82dc5560 r golden_settings_polaris11_a11 +ffffffff82dc5630 r polaris11_golden_common_all +ffffffff82dc5680 r golden_settings_polaris10_a11 +ffffffff82dc5750 r polaris10_golden_common_all +ffffffff82dc57b0 r cz_mgcg_cgcg_init +ffffffff82dc5b40 r cz_golden_settings_a11 +ffffffff82dc5bd0 r cz_golden_common_all +ffffffff82dc5c30 r stoney_mgcg_cgcg_init +ffffffff82dc5c70 r stoney_golden_settings_a11 +ffffffff82dc5cf0 r stoney_golden_common_all +ffffffff82dc6000 R gfx_v9_0_ras_ops +ffffffff82dc6040 r gfx_v9_0_ip_funcs +ffffffff82dc60e8 R gfx_v9_0_ip_block +ffffffff82dc6100 r ras_gfx_subblocks +ffffffff82dc6b80 r gfx_v9_0_edc_counter_regs +ffffffff82dc6f20 r gfx_v9_0_ras_fields +ffffffff82dc8000 r gfx_v9_0_gfx_funcs +ffffffff82dc8060 r gfx_v9_0_kiq_pm4_funcs +ffffffff82dc80a0 r gfx_v9_0_ring_funcs_kiq +ffffffff82dc81e0 r gfx_v9_0_ring_funcs_gfx +ffffffff82dc8320 r gfx_v9_0_sw_ring_funcs_gfx +ffffffff82dc8460 r gfx_v9_0_ring_funcs_compute +ffffffff82dc85a0 r gfx_v9_0_eop_irq_funcs +ffffffff82dc85b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82dc85c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82dc85d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82dc85e0 r gfx_v9_0_rlc_funcs +ffffffff82dc8650 r gfx9_cs_data +ffffffff82dc8670 r gfx9_SECT_CONTEXT_defs +ffffffff82dc8700 r gfx9_SECT_CONTEXT_def_1 +ffffffff82dc8a50 r gfx9_SECT_CONTEXT_def_3 +ffffffff82dc8a60 r gfx9_SECT_CONTEXT_def_4 +ffffffff82dc8cd4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82dc8cdc r gfx9_SECT_CONTEXT_def_6 +ffffffff82dc8ce0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82dc8df0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82dc9260 r gfx9_SECT_CONTEXT_def_8 +ffffffff82dc94d0 r amdgpu_gfxoff_quirk_list +ffffffff82dc9520 r vgpr_init_compute_shader_arcturus +ffffffff82dc9db0 r vgpr_init_regs_arcturus +ffffffff82dc9f40 r vgpr_init_regs +ffffffff82dca0d0 r sgpr1_init_regs +ffffffff82dca260 r sgpr2_init_regs +ffffffff82dca3f0 r golden_settings_gc_9_0 +ffffffff82dca5d0 r golden_settings_gc_9_0_vg10 +ffffffff82dca780 r golden_settings_gc_9_2_1 +ffffffff82dca900 r golden_settings_gc_9_2_1_vg12 +ffffffff82dcaa40 r golden_settings_gc_9_0_vg20 +ffffffff82dcab50 r golden_settings_gc_9_4_1_arct +ffffffff82dcac60 r golden_settings_gc_9_1 +ffffffff82dcaea0 r golden_settings_gc_9_1_rv2 +ffffffff82dcb070 r golden_settings_gc_9_1_rv1 +ffffffff82dcb120 r golden_settings_gc_9_1_rn +ffffffff82dcb240 r golden_settings_gc_9_x_common +ffffffff82dcc000 R gfx_v9_4_ras_ops +ffffffff82dcc040 r gfx_v9_4_edc_counter_regs +ffffffff82dcc420 r gfx_v9_4_ras_fields +ffffffff82dce000 R vgpr_init_regs_aldebaran +ffffffff82dce1b0 R sgpr112_init_regs_aldebaran +ffffffff82dce360 R sgpr96_init_regs_aldebaran +ffffffff82dce510 R sgpr64_init_regs_aldebaran +ffffffff82dce6c0 r golden_settings_gc_9_4_2_alde +ffffffff82dce720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82dce7b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82dce840 r sgpr112_init_compute_shader_aldebaran +ffffffff82dcea60 r sgpr96_init_compute_shader_aldebaran +ffffffff82dcec50 r sgpr64_init_compute_shader_aldebaran +ffffffff82dcedc0 r vgpr_init_compute_shader_aldebaran +ffffffff82dcf6a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82dcfa20 r gfx_v9_4_2_ras_fields +ffffffff82dd13c0 r gfx_v9_4_2_utc_blocks +ffffffff82dd2000 r gfx_v9_4_3_ip_funcs +ffffffff82dd20a8 R gfx_v9_4_3_ip_block +ffffffff82dd20c0 r gfx_v9_4_3_kiq_pm4_funcs +ffffffff82dd2100 r gfx_v9_4_3_ring_funcs_kiq +ffffffff82dd2240 r gfx_v9_4_3_ring_funcs_compute +ffffffff82dd2380 r gfx_v9_4_3_eop_irq_funcs +ffffffff82dd2390 r gfx_v9_4_3_priv_reg_irq_funcs +ffffffff82dd23a0 r gfx_v9_4_3_priv_inst_irq_funcs +ffffffff82dd23b0 r gfx_v9_4_3_rlc_funcs +ffffffff82dd2418 r gfx_v9_4_3_gfx_funcs +ffffffff82dd2480 r gfx_v9_4_3_ce_reg_list +ffffffff82dd2810 r gfx_v9_4_3_ras_mem_list_array +ffffffff82dd2970 r gfx_v9_4_3_ue_reg_list +ffffffff82dd2d30 r gfx_v9_4_3_ras_cp_mem_list +ffffffff82dd2d80 r gfx_v9_4_3_ras_gcea_mem_list +ffffffff82dd2ec0 r gfx_v9_4_3_ras_gc_cane_mem_list +ffffffff82dd2ed0 r gfx_v9_4_3_ras_gcutcl2_mem_list +ffffffff82dd2ee0 r gfx_v9_4_3_ras_gds_mem_list +ffffffff82dd2ef0 r gfx_v9_4_3_ras_lds_mem_list +ffffffff82dd3110 r gfx_v9_4_3_ras_rlc_mem_list +ffffffff82dd3190 r gfx_v9_4_3_ras_sp_mem_list +ffffffff82dd31a0 r gfx_v9_4_3_ras_spi_mem_list +ffffffff82dd31e0 r gfx_v9_4_3_ras_sqc_mem_list +ffffffff82dd3350 r gfx_v9_4_3_ras_sq_mem_list +ffffffff82dd3390 r gfx_v9_4_3_ras_ta_mem_list +ffffffff82dd33e0 r gfx_v9_4_3_ras_tcc_mem_list +ffffffff82dd33f0 r gfx_v9_4_3_ras_tca_mem_list +ffffffff82dd3400 r gfx_v9_4_3_ras_tci_mem_list +ffffffff82dd3410 r gfx_v9_4_3_ras_tcp_mem_list +ffffffff82dd35a0 r gfx_v9_4_3_ras_td_mem_list +ffffffff82dd35d0 r gfx_v9_4_3_ras_tcx_mem_list +ffffffff82dd3b50 r gfx_v9_4_3_ras_atc_l2_mem_list +ffffffff82dd3b60 r gfx_v9_4_3_ras_utcl2_mem_list +ffffffff82dd3b70 r gfx_v9_4_3_ras_vml2_mem_list +ffffffff82dd3b80 r gfx_v9_4_3_ras_vml2_walker_mem_list +ffffffff82dd4000 R gfxhub_v1_0_funcs +ffffffff82dd5000 R gfxhub_v1_2_funcs +ffffffff82dd6000 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nbio_v7_7_hdp_flush_reg +ffffffff82e0b048 R nbio_v7_7_funcs +ffffffff82e0c000 R nbio_v7_9_hdp_flush_reg +ffffffff82e0c048 R nbio_v7_9_funcs +ffffffff82e0c158 R nbio_v7_9_ras_hw_ops +ffffffff82e0c198 r nbio_v7_9_ras_controller_irq_funcs +ffffffff82e0c1a8 r nbio_v7_9_ras_err_event_athub_irq_funcs +ffffffff82e0d000 r nv_common_ip_funcs +ffffffff82e0d0a8 R nv_common_ip_block +ffffffff82e0d0c0 r nv_asic_funcs +ffffffff82e0d180 r nv_allowed_read_registers +ffffffff82e0d300 r sc_video_codecs_encode +ffffffff82e0d310 r sc_video_codecs_decode_vcn1 +ffffffff82e0d320 r sc_video_codecs_decode_vcn0 +ffffffff82e0d330 r yc_video_codecs_decode +ffffffff82e0d340 r bg_video_codecs_encode +ffffffff82e0d350 r bg_video_codecs_decode +ffffffff82e0d360 r nv_video_codecs_encode +ffffffff82e0d370 r nv_video_codecs_decode +ffffffff82e0d380 r sc_video_codecs_encode_array +ffffffff82e0d3b0 r sc_video_codecs_decode_array_vcn1 +ffffffff82e0d440 r sc_video_codecs_decode_array_vcn0 +ffffffff82e0d4e0 r yc_video_codecs_decode_array +ffffffff82e0d550 r bg_video_codecs_decode_array +ffffffff82e0d590 r nv_video_codecs_encode_array +ffffffff82e0d5c0 r nv_video_codecs_decode_array +ffffffff82e0e000 r psp_v10_0_funcs +ffffffff82e0f000 r psp_v11_0_funcs +ffffffff82e10000 r psp_v11_0_8_funcs +ffffffff82e11000 r psp_v12_0_funcs +ffffffff82e12000 r psp_v13_0_funcs +ffffffff82e13000 r psp_v13_0_4_funcs +ffffffff82e14000 r psp_v3_1_funcs +ffffffff82e15000 r sdma_v2_4_ip_funcs +ffffffff82e150a8 R sdma_v2_4_ip_block +ffffffff82e150c0 r sdma_v2_4_ring_funcs +ffffffff82e15200 r sdma_v2_4_buffer_funcs +ffffffff82e15220 r sdma_v2_4_vm_pte_funcs +ffffffff82e15240 r sdma_v2_4_trap_irq_funcs +ffffffff82e15250 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82e15260 r iceland_mgcg_cgcg_init +ffffffff82e15280 r golden_settings_iceland_a11 +ffffffff82e16000 r sdma_v3_0_ip_funcs +ffffffff82e160a8 R sdma_v3_0_ip_block +ffffffff82e160c0 R sdma_v3_1_ip_block +ffffffff82e160d8 r sdma_v3_0_ring_funcs +ffffffff82e16218 r sdma_v3_0_buffer_funcs +ffffffff82e16238 r sdma_v3_0_vm_pte_funcs +ffffffff82e16258 r sdma_v3_0_trap_irq_funcs +ffffffff82e16268 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82e16280 r fiji_mgcg_cgcg_init +ffffffff82e162a0 r golden_settings_fiji_a10 +ffffffff82e16300 r tonga_mgcg_cgcg_init +ffffffff82e16320 r golden_settings_tonga_a11 +ffffffff82e163a0 r golden_settings_polaris11_a11 +ffffffff82e16420 r golden_settings_polaris10_a11 +ffffffff82e164a0 r cz_mgcg_cgcg_init +ffffffff82e164c0 r cz_golden_settings_a11 +ffffffff82e16550 r stoney_mgcg_cgcg_init +ffffffff82e16560 r stoney_golden_settings_a11 +ffffffff82e17000 R sdma_v4_0_ip_funcs +ffffffff82e170a8 R sdma_v4_0_ras_hw_ops +ffffffff82e170e8 R sdma_v4_0_ip_block +ffffffff82e17100 r sdma_v4_0_ring_funcs +ffffffff82e17240 r sdma_v4_0_page_ring_funcs +ffffffff82e17380 r sdma_v4_0_buffer_funcs +ffffffff82e173a0 r sdma_v4_0_vm_pte_funcs +ffffffff82e173c0 r sdma_v4_0_trap_irq_funcs +ffffffff82e173d0 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82e173e0 r sdma_v4_0_ecc_irq_funcs +ffffffff82e173f0 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82e17400 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82e17410 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82e17420 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82e17430 r golden_settings_sdma_4 +ffffffff82e17690 r golden_settings_sdma_vg10 +ffffffff82e17740 r golden_settings_sdma_vg12 +ffffffff82e177f0 r golden_settings_sdma0_4_2_init +ffffffff82e17810 r golden_settings_sdma0_4_2 +ffffffff82e17aa0 r golden_settings_sdma1_4_2 +ffffffff82e17d30 r golden_settings_sdma_arct +ffffffff82e18030 r golden_settings_sdma_aldebaran +ffffffff82e181a0 r golden_settings_sdma_4_1 +ffffffff82e182b0 r golden_settings_sdma_rv2 +ffffffff82e182e0 r golden_settings_sdma_rv1 +ffffffff82e18310 r golden_settings_sdma_4_3 +ffffffff82e18400 r sdma_v4_0_ras_fields +ffffffff82e19000 R sdma_v4_4_ras_hw_ops +ffffffff82e19040 r sdma_v4_4_ras_fields +ffffffff82e1a000 R sdma_v4_4_2_ip_funcs +ffffffff82e1a0a8 R sdma_v4_4_2_ip_block +ffffffff82e1a0c0 r sdma_v4_4_2_ring_funcs +ffffffff82e1a200 r sdma_v4_4_2_page_ring_funcs +ffffffff82e1a340 r sdma_v4_4_2_buffer_funcs +ffffffff82e1a360 r sdma_v4_4_2_vm_pte_funcs +ffffffff82e1a380 r sdma_v4_4_2_trap_irq_funcs +ffffffff82e1a390 r sdma_v4_4_2_illegal_inst_irq_funcs +ffffffff82e1a3a0 r sdma_v4_4_2_ecc_irq_funcs +ffffffff82e1a3b0 r sdma_v4_4_2_vm_hole_irq_funcs +ffffffff82e1a3c0 r sdma_v4_4_2_doorbell_invalid_irq_funcs +ffffffff82e1a3d0 r sdma_v4_4_2_pool_timeout_irq_funcs +ffffffff82e1a3e0 r sdma_v4_4_2_srbm_write_irq_funcs +ffffffff82e1a3f0 r sdma_v4_4_2_ras_hw_ops +ffffffff82e1a430 r sdma_v4_2_2_ue_reg_list +ffffffff82e1a460 r sdma_v4_4_2_ras_memory_list +ffffffff82e1b000 R sdma_v5_0_ip_funcs +ffffffff82e1b0a8 R sdma_v5_0_ip_block +ffffffff82e1b0c0 r sdma_v5_0_ring_funcs +ffffffff82e1b200 r sdma_v5_0_buffer_funcs +ffffffff82e1b220 r sdma_v5_0_vm_pte_funcs +ffffffff82e1b240 r sdma_v5_0_trap_irq_funcs +ffffffff82e1b250 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82e1b260 r golden_settings_sdma_5 +ffffffff82e1b4a0 r golden_settings_sdma_nv10 +ffffffff82e1b4d0 r golden_settings_sdma_nv14 +ffffffff82e1b500 r golden_settings_sdma_5_sriov +ffffffff82e1b6e0 r golden_settings_sdma_nv12 +ffffffff82e1b770 r golden_settings_sdma_cyan_skillfish +ffffffff82e1c000 R sdma_v5_2_ip_funcs +ffffffff82e1c0a8 R sdma_v5_2_ip_block +ffffffff82e1c0c0 r sdma_v5_2_ring_funcs +ffffffff82e1c200 r sdma_v5_2_buffer_funcs +ffffffff82e1c220 r sdma_v5_2_vm_pte_funcs +ffffffff82e1c240 r sdma_v5_2_trap_irq_funcs +ffffffff82e1c250 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82e1d000 R sdma_v6_0_ip_funcs +ffffffff82e1d0a8 R sdma_v6_0_ip_block +ffffffff82e1d0c0 r sdma_v6_0_ring_funcs +ffffffff82e1d200 r sdma_v6_0_buffer_funcs +ffffffff82e1d220 r sdma_v6_0_vm_pte_funcs +ffffffff82e1d240 r sdma_v6_0_trap_irq_funcs +ffffffff82e1d250 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82e1e000 r smu_v11_0_i2c_algo +ffffffff82e1e010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82e1e028 r smu_v11_0_i2c_control_quirks +ffffffff82e1f000 R smuio_v11_0_funcs +ffffffff82e20000 R smuio_v11_0_6_funcs +ffffffff82e21000 R smuio_v13_0_funcs +ffffffff82e22000 R smuio_v13_0_3_funcs +ffffffff82e23000 R smuio_v13_0_6_funcs +ffffffff82e24000 R smuio_v9_0_funcs +ffffffff82e25000 r soc15_common_ip_funcs +ffffffff82e250a8 R vega10_common_ip_block +ffffffff82e250c0 r soc15_asic_funcs +ffffffff82e25180 r vega20_asic_funcs +ffffffff82e25240 r aqua_vanjaram_asic_funcs +ffffffff82e25300 r soc15_allowed_read_registers +ffffffff82e25490 r vega_video_codecs_encode +ffffffff82e254a0 r vega_video_codecs_decode +ffffffff82e254b0 r rv_video_codecs_decode +ffffffff82e254c0 r rn_video_codecs_decode +ffffffff82e254d0 r vcn_4_0_3_video_codecs_encode +ffffffff82e254e0 r vcn_4_0_3_video_codecs_decode +ffffffff82e254f0 r vega_video_codecs_encode_array +ffffffff82e25520 r vega_video_codecs_decode_array +ffffffff82e255a0 r rv_video_codecs_decode_array +ffffffff82e25630 r rn_video_codecs_decode_array +ffffffff82e256c0 r vcn_4_0_3_video_codecs_decode_array +ffffffff82e26000 r soc21_common_ip_funcs +ffffffff82e260a8 R soc21_common_ip_block +ffffffff82e260c0 r soc21_asic_funcs +ffffffff82e26180 r soc21_allowed_read_registers +ffffffff82e26300 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82e26310 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82e26320 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82e26330 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82e26340 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82e26370 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82e263c0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82e26400 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82e27000 r tonga_ih_ip_funcs +ffffffff82e270a8 R tonga_ih_ip_block +ffffffff82e270c0 r tonga_ih_funcs +ffffffff82e28000 R umc_v6_0_funcs +ffffffff82e29000 R umc_v6_1_channel_idx_tbl +ffffffff82e29080 R umc_v6_1_ras_hw_ops +ffffffff82e2a000 R umc_v6_7_channel_idx_tbl_second +ffffffff82e2a080 R umc_v6_7_channel_idx_tbl_first +ffffffff82e2a100 R umc_v6_7_ras_hw_ops +ffffffff82e2b000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82e2b040 R umc_v8_10_channel_idx_tbl_ext0 +ffffffff82e2b080 R umc_v8_10_channel_idx_tbl +ffffffff82e2b0e0 R umc_v8_10_ras_hw_ops +ffffffff82e2c000 R umc_v8_7_channel_idx_tbl +ffffffff82e2c040 R umc_v8_7_ras_hw_ops +ffffffff82e2d000 r uvd_v5_0_ip_funcs +ffffffff82e2d0a8 R uvd_v5_0_ip_block +ffffffff82e2d0c0 r uvd_v5_0_ring_funcs +ffffffff82e2d200 r uvd_v5_0_irq_funcs +ffffffff82e2e000 r uvd_v6_0_ip_funcs +ffffffff82e2e0a8 R uvd_v6_0_ip_block +ffffffff82e2e0c0 R uvd_v6_2_ip_block +ffffffff82e2e0d8 R uvd_v6_3_ip_block +ffffffff82e2e0f0 r uvd_v6_0_ring_vm_funcs +ffffffff82e2e230 r uvd_v6_0_ring_phys_funcs +ffffffff82e2e370 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82e2e4b0 r uvd_v6_0_irq_funcs +ffffffff82e2f000 R uvd_v7_0_ip_funcs +ffffffff82e2f0a8 R uvd_v7_0_ip_block +ffffffff82e2f0c0 r uvd_v7_0_ring_vm_funcs +ffffffff82e2f200 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82e2f340 r uvd_v7_0_irq_funcs +ffffffff82e30000 r vce_v3_0_ip_funcs +ffffffff82e300a8 R vce_v3_0_ip_block +ffffffff82e300c0 R vce_v3_1_ip_block +ffffffff82e300d8 R vce_v3_4_ip_block +ffffffff82e300f0 r vce_v3_0_ring_vm_funcs +ffffffff82e30230 r vce_v3_0_ring_phys_funcs +ffffffff82e30370 r vce_v3_0_irq_funcs +ffffffff82e31000 R vce_v4_0_ip_funcs +ffffffff82e310a8 R vce_v4_0_ip_block +ffffffff82e310c0 r vce_v4_0_ring_vm_funcs +ffffffff82e31200 r vce_v4_0_irq_funcs +ffffffff82e32000 r vcn_v1_0_ip_funcs +ffffffff82e320a8 R vcn_v1_0_ip_block +ffffffff82e320c0 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82e32200 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82e32340 r vcn_v1_0_irq_funcs +ffffffff82e33000 r vcn_v2_0_ip_funcs +ffffffff82e330a8 R vcn_v2_0_ip_block +ffffffff82e330c0 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82e33200 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82e33340 r vcn_v2_0_irq_funcs +ffffffff82e34000 r vcn_v2_5_ip_funcs +ffffffff82e340a8 R vcn_v2_5_ip_block +ffffffff82e340c0 r vcn_v2_6_ip_funcs +ffffffff82e34168 R vcn_v2_6_ip_block +ffffffff82e34180 R vcn_v2_6_ras_hw_ops +ffffffff82e341c0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82e34300 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82e34440 r vcn_v2_5_irq_funcs +ffffffff82e34450 r vcn_v2_6_ras_irq_funcs +ffffffff82e35000 r vcn_v3_0_ip_funcs +ffffffff82e350a8 R vcn_v3_0_ip_block +ffffffff82e350c0 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82e35200 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82e35340 r vcn_v3_0_irq_funcs +ffffffff82e36000 r vcn_v4_0_ip_funcs +ffffffff82e360a8 R vcn_v4_0_ip_block +ffffffff82e360c0 R vcn_v4_0_ras_hw_ops +ffffffff82e36100 r vcn_v4_0_irq_funcs +ffffffff82e36110 r vcn_v4_0_ras_irq_funcs +ffffffff82e37000 r vcn_v4_0_3_ip_funcs +ffffffff82e370a8 R vcn_v4_0_3_ip_block +ffffffff82e370c0 r vcn_v4_0_3_unified_ring_vm_funcs +ffffffff82e37200 r vcn_v4_0_3_irq_funcs +ffffffff82e37210 r vcn_v4_0_3_ras_hw_ops +ffffffff82e37250 r vcn_v4_0_3_ue_reg_list +ffffffff82e38000 R vega10_ih_ip_funcs +ffffffff82e380a8 R vega10_ih_ip_block +ffffffff82e380c0 r vega10_ih_funcs +ffffffff82e380e0 r vega10_ih_self_irq_funcs +ffffffff82e39000 r GC_BASE +ffffffff82e39064 r HDP_BASE +ffffffff82e390c8 r MMHUB_BASE +ffffffff82e3912c r ATHUB_BASE +ffffffff82e39190 r NBIO_BASE +ffffffff82e391f4 r MP0_BASE +ffffffff82e39258 r MP1_BASE +ffffffff82e392bc r VCE_BASE +ffffffff82e39320 r VCN_BASE +ffffffff82e39384 r DF_BASE +ffffffff82e393e8 r DCE_BASE +ffffffff82e3944c r OSSSYS_BASE +ffffffff82e394b0 r SDMA0_BASE +ffffffff82e39514 r SDMA1_BASE +ffffffff82e39578 r SMUIO_BASE +ffffffff82e395dc r PWR_BASE +ffffffff82e39640 r NBIF_BASE +ffffffff82e396a4 r THM_BASE +ffffffff82e39708 r CLK_BASE +ffffffff82e3a000 R vega20_ih_ip_funcs +ffffffff82e3a0a8 R vega20_ih_ip_block +ffffffff82e3a0c0 r vega20_ih_funcs +ffffffff82e3a0e0 r vega20_ih_self_irq_funcs +ffffffff82e3b000 r GC_BASE +ffffffff82e3b090 r HDP_BASE +ffffffff82e3b120 r MMHUB_BASE +ffffffff82e3b1b0 r ATHUB_BASE +ffffffff82e3b240 r NBIO_BASE +ffffffff82e3b2d0 r MP0_BASE +ffffffff82e3b360 r MP1_BASE +ffffffff82e3b3f0 r UVD_BASE +ffffffff82e3b480 r VCE_BASE +ffffffff82e3b510 r DF_BASE +ffffffff82e3b5a0 r DCE_BASE +ffffffff82e3b630 r OSSSYS_BASE +ffffffff82e3b6c0 r SDMA0_BASE +ffffffff82e3b750 r SDMA1_BASE +ffffffff82e3b7e0 r SMUIO_BASE +ffffffff82e3b870 r THM_BASE +ffffffff82e3b900 r CLK_BASE +ffffffff82e3b990 r UMC_BASE +ffffffff82e3ba20 r RSMU_BASE +ffffffff82e3c000 r vi_common_ip_block +ffffffff82e3c018 r vi_common_ip_funcs +ffffffff82e3c0c0 r vi_asic_funcs +ffffffff82e3c180 r vi_allowed_read_registers +ffffffff82e3c3e0 r topaz_video_codecs_encode +ffffffff82e3c3f0 r topaz_video_codecs_decode +ffffffff82e3c400 r tonga_video_codecs_encode +ffffffff82e3c410 r tonga_video_codecs_decode +ffffffff82e3c420 r polaris_video_codecs_encode +ffffffff82e3c430 r cz_video_codecs_decode +ffffffff82e3c440 r tonga_video_codecs_encode_array +ffffffff82e3c460 r tonga_video_codecs_decode_array +ffffffff82e3c4b0 r polaris_video_codecs_encode_array +ffffffff82e3c4e0 r cz_video_codecs_decode_array +ffffffff82e3c560 r iceland_mgcg_cgcg_init +ffffffff82e3c5a0 r fiji_mgcg_cgcg_init +ffffffff82e3c600 r tonga_mgcg_cgcg_init +ffffffff82e3c660 r cz_mgcg_cgcg_init +ffffffff82e3c6a0 r stoney_mgcg_cgcg_init +ffffffff82e3d000 r amdgpu_dm_funcs +ffffffff82e3d0a8 R dm_ip_block +ffffffff82e3d0c0 R amdgpu_dm_encoder_helper_funcs +ffffffff82e3d128 r dm_display_funcs +ffffffff82e3d180 r hpd_disconnect_quirk_table +ffffffff82e3def0 r amdgpu_dm_mode_funcs +ffffffff82e3df38 r amdgpu_dm_audio_component_bind_ops +ffffffff82e3df48 r amdgpu_dm_audio_component_ops +ffffffff82e3df80 r amdgpu_dm_encoder_funcs +ffffffff82e3dfa0 r amdgpu_dm_connector_funcs +ffffffff82e3e018 r amdgpu_dm_connector_helper_funcs +ffffffff82e3e078 r amdgpu_dm_i2c_algo +ffffffff82e3e088 r amdgpu_dm_backlight_ops +ffffffff82e3e260 r add_fs_modes.common_rates +ffffffff82e3f000 r amdgpu_dm_crtc_funcs +ffffffff82e3f0c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82e40000 r dm_dtn_log_begin.msg +ffffffff82e4000d r dm_dtn_log_end.msg +ffffffff82e40018 r SYNAPTICS_DEVICE_ID +ffffffff82e41000 r dm_crtc_irq_funcs +ffffffff82e41010 r dm_vline0_irq_funcs +ffffffff82e41020 r dm_dmub_outbox_irq_funcs +ffffffff82e41030 r dm_vupdate_irq_funcs +ffffffff82e41040 r dm_dmub_trace_irq_funcs +ffffffff82e41050 r dm_pageflip_irq_funcs +ffffffff82e41060 r dm_hpd_irq_funcs +ffffffff82e42000 r amdgpu_dm_encoder_funcs +ffffffff82e42020 r dm_mst_cbs +ffffffff82e42030 r dm_dp_mst_connector_funcs +ffffffff82e420a8 r dm_dp_mst_connector_helper_funcs +ffffffff82e43000 r dm_plane_funcs +ffffffff82e43068 r dm_plane_helper_funcs ffffffff82e45000 r vbios_funcs -ffffffff82e4a000 r command_table_helper_funcs +ffffffff82e46000 r vbios_funcs ffffffff82e4b000 r command_table_helper_funcs ffffffff82e4c000 r command_table_helper_funcs ffffffff82e4d000 r command_table_helper_funcs -ffffffff82e4e000 r dce80_max_clks_by_state -ffffffff82e4e028 r disp_clk_regs -ffffffff82e4e07c r disp_clk_shift -ffffffff82e4e088 r disp_clk_mask -ffffffff82e4f000 r dce110_max_clks_by_state +ffffffff82e4e000 r command_table_helper_funcs +ffffffff82e4f000 r dce80_max_clks_by_state ffffffff82e4f028 r disp_clk_regs ffffffff82e4f07c r disp_clk_shift ffffffff82e4f088 r disp_clk_mask -ffffffff82e50000 r dce112_max_clks_by_state +ffffffff82e50000 r dce110_max_clks_by_state ffffffff82e50028 r disp_clk_regs ffffffff82e5007c r disp_clk_shift ffffffff82e50088 r disp_clk_mask -ffffffff82e51000 r dce120_max_clks_by_state -ffffffff82e52000 r clk_mgr_regs -ffffffff82e52054 r clk_mgr_shift -ffffffff82e52060 r clk_mgr_mask +ffffffff82e51000 r dce112_max_clks_by_state +ffffffff82e51028 r disp_clk_regs +ffffffff82e5107c r disp_clk_shift +ffffffff82e51088 r disp_clk_mask +ffffffff82e52000 r dce120_max_clks_by_state ffffffff82e53000 r clk_mgr_regs ffffffff82e53054 r clk_mgr_shift ffffffff82e53060 r clk_mgr_mask ffffffff82e54000 r clk_mgr_regs ffffffff82e54054 r clk_mgr_shift ffffffff82e54060 r clk_mgr_mask -ffffffff82e55000 r lpddr5_wm_table -ffffffff82e550c0 r ddr5_wm_table +ffffffff82e55000 r clk_mgr_regs +ffffffff82e55054 r clk_mgr_shift +ffffffff82e55060 r clk_mgr_mask ffffffff82e56000 r lpddr5_wm_table ffffffff82e560c0 r ddr5_wm_table -ffffffff82e57000 r ddr5_wm_table -ffffffff82e58000 r lpddr5_wm_table -ffffffff82e580c0 r ddr4_wm_table -ffffffff82e59000 r clk_mgr_regs_dcn321 -ffffffff82e59054 r clk_mgr_shift_dcn321 -ffffffff82e59060 r clk_mgr_mask_dcn321 -ffffffff82e59084 r clk_mgr_regs_dcn32 -ffffffff82e590d8 r clk_mgr_shift_dcn32 -ffffffff82e590e4 r clk_mgr_mask_dcn32 -ffffffff82e5a000 r DC_BUILD_ID -ffffffff82e5c000 r output_csc_matrix -ffffffff82e5c0e0 r black_color_format -ffffffff82e5f000 r dce_funcs -ffffffff82e60000 r funcs -ffffffff82e61000 R video_optimized_pixel_rates -ffffffff82e611c0 r dce110_clk_src_funcs -ffffffff82e611e8 r dce112_clk_src_funcs -ffffffff82e61210 r dcn20_clk_src_funcs -ffffffff82e61238 r dcn3_clk_src_funcs -ffffffff82e61260 r dcn31_clk_src_funcs -ffffffff82e62000 r dce_funcs -ffffffff82e62068 r dcn10_funcs -ffffffff82e620d0 r dcn20_funcs -ffffffff82e62138 r dcn21_funcs -ffffffff82e63000 r dce_ipp_funcs -ffffffff82e64000 r dce110_lnk_enc_funcs -ffffffff82e65000 r dce_mi_funcs -ffffffff82e65090 r dce112_mi_funcs -ffffffff82e65120 r dce120_mi_funcs -ffffffff82e651b0 r pte_settings -ffffffff82e66000 r funcs -ffffffff82e67000 r dce_link_panel_cntl_funcs -ffffffff82e68000 r filter_3tap_16p_upscale -ffffffff82e68040 r filter_3tap_16p_116 -ffffffff82e68080 r filter_3tap_16p_149 -ffffffff82e680c0 r filter_3tap_16p_183 -ffffffff82e68100 r filter_3tap_64p_upscale -ffffffff82e681d0 r filter_3tap_64p_116 -ffffffff82e682a0 r filter_3tap_64p_149 -ffffffff82e68370 r filter_3tap_64p_183 -ffffffff82e68440 r filter_4tap_16p_upscale -ffffffff82e68490 r filter_4tap_16p_116 -ffffffff82e684e0 r filter_4tap_16p_149 -ffffffff82e68530 r filter_4tap_16p_183 -ffffffff82e68580 r filter_4tap_64p_upscale -ffffffff82e68690 r filter_4tap_64p_116 -ffffffff82e687a0 r filter_4tap_64p_149 -ffffffff82e688b0 r filter_4tap_64p_183 -ffffffff82e689c0 r filter_5tap_64p_upscale -ffffffff82e68b10 r filter_5tap_64p_116 -ffffffff82e68c60 r filter_5tap_64p_149 -ffffffff82e68db0 r filter_5tap_64p_183 -ffffffff82e68f00 r filter_6tap_64p_upscale -ffffffff82e69090 r filter_6tap_64p_116 -ffffffff82e69220 r filter_6tap_64p_149 -ffffffff82e693b0 r filter_6tap_64p_183 -ffffffff82e69540 r filter_7tap_64p_upscale -ffffffff82e69710 r filter_7tap_64p_116 -ffffffff82e698e0 r filter_7tap_64p_149 -ffffffff82e69ab0 r filter_7tap_64p_183 -ffffffff82e69c80 r filter_8tap_64p_upscale -ffffffff82e69e90 r filter_8tap_64p_116 -ffffffff82e6a0a0 r filter_8tap_64p_149 -ffffffff82e6a2b0 r filter_8tap_64p_183 -ffffffff82e6a4c0 r filter_2tap_16p -ffffffff82e6a4f0 r filter_2tap_64p -ffffffff82e6b000 r dce110_str_enc_funcs -ffffffff82e6b120 r audio_clock_info_table_48bpc -ffffffff82e6b2b0 r audio_clock_info_table_36bpc -ffffffff82e6b440 r audio_clock_info_table -ffffffff82e6c000 r global_color_matrix -ffffffff82e6c0a8 r dce_transform_funcs -ffffffff82e6d000 r abm_funcs -ffffffff82e6e000 r psr_funcs -ffffffff82e6e040 r DP_SINK_DEVICE_STR_ID_1 -ffffffff82e6e045 r DP_SINK_DEVICE_STR_ID_2 -ffffffff82e6f000 r replay_funcs -ffffffff82e70000 r reg_offsets -ffffffff82e71000 r bios_regs -ffffffff82e71008 r res_cap -ffffffff82e71048 r dce100_res_pool_funcs -ffffffff82e71140 r clk_src_regs -ffffffff82e7123c r dmcu_regs -ffffffff82e71298 r dmcu_shift -ffffffff82e712ac r dmcu_mask -ffffffff82e712f8 r abm_regs -ffffffff82e71360 r abm_shift -ffffffff82e71384 r abm_mask -ffffffff82e71410 r debug_defaults -ffffffff82e715c0 r dce100_tg_offsets -ffffffff82e71608 r plane_cap -ffffffff82e71638 r res_create_funcs -ffffffff82e71670 r panel_cntl_regs -ffffffff82e71690 r panel_cntl_shift -ffffffff82e716a0 r panel_cntl_mask -ffffffff82e716e0 r link_enc_regs -ffffffff82e71aa0 r link_enc_aux_regs -ffffffff82e71af0 r link_enc_hpd_regs -ffffffff82e71b08 r link_enc_feature -ffffffff82e71b18 r cs_shift -ffffffff82e71b24 r cs_mask -ffffffff82e71b50 r mi_regs -ffffffff82e71e68 r mi_shifts -ffffffff82e71eb0 r mi_masks -ffffffff82e71fd0 r ipp_regs -ffffffff82e721c8 r ipp_shift -ffffffff82e721f0 r ipp_mask -ffffffff82e72290 r xfm_regs -ffffffff82e72830 r xfm_shift -ffffffff82e72890 r xfm_mask -ffffffff82e72a10 r opp_regs -ffffffff82e72b60 r opp_shift -ffffffff82e72b8c r opp_mask -ffffffff82e72c40 r aux_engine_regs -ffffffff82e72d30 r aux_mask -ffffffff82e72d90 r aux_shift -ffffffff82e72db0 r i2c_hw_regs -ffffffff82e72f00 r i2c_shifts -ffffffff82e72f2c r i2c_masks -ffffffff82e72fd0 r audio_regs -ffffffff82e73104 r audio_shift -ffffffff82e7311c r audio_mask -ffffffff82e73160 r stream_enc_regs -ffffffff82e7380c r se_shift -ffffffff82e73890 r se_mask -ffffffff82e73a94 r hwseq_reg -ffffffff82e73cb0 r hwseq_shift -ffffffff82e73d30 r hwseq_mask -ffffffff82e74000 r reg_offsets -ffffffff82e74018 r dce110_compressor_funcs -ffffffff82e75000 r dce110_funcs -ffffffff82e752e8 r dce110_private_funcs -ffffffff82e76000 r dce110_mem_input_v_funcs -ffffffff82e76090 r dvmm_Hw_Setting_1DTiling -ffffffff82e76120 r dvmm_Hw_Setting_2DTiling -ffffffff82e761b0 r dvmm_Hw_Setting_Linear -ffffffff82e77000 r global_color_matrix -ffffffff82e770b0 r input_csc_matrix -ffffffff82e78000 r funcs -ffffffff82e79000 r bios_regs -ffffffff82e79008 r dce110_res_pool_funcs -ffffffff82e79100 r debug_defaults -ffffffff82e792b0 r clk_src_regs -ffffffff82e793ac r dmcu_regs -ffffffff82e79408 r dmcu_shift -ffffffff82e7941c r dmcu_mask -ffffffff82e79468 r abm_regs -ffffffff82e794d0 r abm_shift -ffffffff82e794f4 r abm_mask -ffffffff82e79580 r dce110_tg_offsets -ffffffff82e795c8 r res_create_funcs -ffffffff82e795f8 r plane_cap -ffffffff82e79624 r underlay_plane_cap -ffffffff82e79650 r stoney_resource_cap -ffffffff82e7968c r carrizo_resource_cap -ffffffff82e796d0 r panel_cntl_regs -ffffffff82e796f0 r panel_cntl_shift -ffffffff82e79700 r panel_cntl_mask -ffffffff82e79740 r link_enc_regs -ffffffff82e79b00 r link_enc_aux_regs -ffffffff82e79b50 r link_enc_hpd_regs -ffffffff82e79b68 r link_enc_feature -ffffffff82e79b78 r cs_shift -ffffffff82e79b84 r cs_mask -ffffffff82e79bb0 r mi_regs -ffffffff82e79d3c r mi_shifts -ffffffff82e79d84 r mi_masks -ffffffff82e79ea0 r ipp_regs -ffffffff82e79f9c r ipp_shift -ffffffff82e79fc4 r ipp_mask -ffffffff82e7a060 r xfm_regs -ffffffff82e7a330 r xfm_shift -ffffffff82e7a390 r xfm_mask -ffffffff82e7a510 r opp_regs -ffffffff82e7a660 r opp_shift -ffffffff82e7a68c r opp_mask -ffffffff82e7a740 r aux_engine_regs -ffffffff82e7a830 r aux_mask -ffffffff82e7a890 r aux_shift -ffffffff82e7a8b0 r i2c_hw_regs -ffffffff82e7aa00 r i2c_shifts -ffffffff82e7aa2c r i2c_masks -ffffffff82e7aad0 r audio_regs -ffffffff82e7ac04 r audio_shift -ffffffff82e7ac1c r audio_mask -ffffffff82e7ac60 r stream_enc_regs -ffffffff82e7af3c r se_shift -ffffffff82e7afc0 r se_mask -ffffffff82e7b1c4 r hwseq_stoney_reg -ffffffff82e7b3e0 r hwseq_cz_reg -ffffffff82e7b5fc r hwseq_shift -ffffffff82e7b67c r hwseq_mask -ffffffff82e7c000 r dce110_tg_funcs -ffffffff82e7d000 r dce110_tg_v_funcs -ffffffff82e7e000 r dce110_xfmv_funcs -ffffffff82e7f000 r reg_offsets +ffffffff82e57000 r lpddr5_wm_table +ffffffff82e570c0 r ddr5_wm_table +ffffffff82e58000 r ddr5_wm_table +ffffffff82e59000 r lpddr5_wm_table +ffffffff82e590c0 r ddr4_wm_table +ffffffff82e5a000 r clk_mgr_regs_dcn321 +ffffffff82e5a054 r clk_mgr_shift_dcn321 +ffffffff82e5a060 r clk_mgr_mask_dcn321 +ffffffff82e5a084 r clk_mgr_regs_dcn32 +ffffffff82e5a0d8 r clk_mgr_shift_dcn32 +ffffffff82e5a0e4 r clk_mgr_mask_dcn32 +ffffffff82e5b000 r DC_BUILD_ID +ffffffff82e5d000 r output_csc_matrix +ffffffff82e5d0e0 r black_color_format +ffffffff82e60000 r dce_funcs +ffffffff82e61000 r funcs +ffffffff82e62000 R video_optimized_pixel_rates +ffffffff82e621c0 r dce110_clk_src_funcs +ffffffff82e621e8 r dce112_clk_src_funcs +ffffffff82e62210 r dcn20_clk_src_funcs +ffffffff82e62238 r dcn3_clk_src_funcs +ffffffff82e62260 r dcn31_clk_src_funcs +ffffffff82e63000 r dce_funcs +ffffffff82e63068 r dcn10_funcs +ffffffff82e630d0 r dcn20_funcs +ffffffff82e63138 r dcn21_funcs +ffffffff82e64000 r dce_ipp_funcs +ffffffff82e65000 r dce110_lnk_enc_funcs +ffffffff82e66000 r dce_mi_funcs +ffffffff82e66090 r dce112_mi_funcs +ffffffff82e66120 r dce120_mi_funcs +ffffffff82e661b0 r pte_settings +ffffffff82e67000 r funcs +ffffffff82e68000 r dce_link_panel_cntl_funcs +ffffffff82e69000 r filter_3tap_16p_upscale +ffffffff82e69040 r filter_3tap_16p_116 +ffffffff82e69080 r filter_3tap_16p_149 +ffffffff82e690c0 r filter_3tap_16p_183 +ffffffff82e69100 r filter_3tap_64p_upscale +ffffffff82e691d0 r filter_3tap_64p_116 +ffffffff82e692a0 r filter_3tap_64p_149 +ffffffff82e69370 r filter_3tap_64p_183 +ffffffff82e69440 r filter_4tap_16p_upscale +ffffffff82e69490 r filter_4tap_16p_116 +ffffffff82e694e0 r filter_4tap_16p_149 +ffffffff82e69530 r filter_4tap_16p_183 +ffffffff82e69580 r filter_4tap_64p_upscale +ffffffff82e69690 r filter_4tap_64p_116 +ffffffff82e697a0 r filter_4tap_64p_149 +ffffffff82e698b0 r filter_4tap_64p_183 +ffffffff82e699c0 r filter_5tap_64p_upscale +ffffffff82e69b10 r filter_5tap_64p_116 +ffffffff82e69c60 r filter_5tap_64p_149 +ffffffff82e69db0 r filter_5tap_64p_183 +ffffffff82e69f00 r filter_6tap_64p_upscale +ffffffff82e6a090 r filter_6tap_64p_116 +ffffffff82e6a220 r filter_6tap_64p_149 +ffffffff82e6a3b0 r filter_6tap_64p_183 +ffffffff82e6a540 r filter_7tap_64p_upscale +ffffffff82e6a710 r filter_7tap_64p_116 +ffffffff82e6a8e0 r filter_7tap_64p_149 +ffffffff82e6aab0 r filter_7tap_64p_183 +ffffffff82e6ac80 r filter_8tap_64p_upscale +ffffffff82e6ae90 r filter_8tap_64p_116 +ffffffff82e6b0a0 r filter_8tap_64p_149 +ffffffff82e6b2b0 r filter_8tap_64p_183 +ffffffff82e6b4c0 r filter_2tap_16p +ffffffff82e6b4f0 r filter_2tap_64p +ffffffff82e6c000 r dce110_str_enc_funcs +ffffffff82e6c120 r audio_clock_info_table_48bpc +ffffffff82e6c2b0 r audio_clock_info_table_36bpc +ffffffff82e6c440 r audio_clock_info_table +ffffffff82e6d000 r global_color_matrix +ffffffff82e6d0a8 r dce_transform_funcs +ffffffff82e6e000 r abm_funcs +ffffffff82e6f000 r psr_funcs +ffffffff82e6f040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82e6f045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82e70000 r replay_funcs +ffffffff82e71000 r reg_offsets +ffffffff82e72000 r bios_regs +ffffffff82e72008 r res_cap +ffffffff82e72048 r dce100_res_pool_funcs +ffffffff82e72140 r clk_src_regs +ffffffff82e7223c r dmcu_regs +ffffffff82e72298 r dmcu_shift +ffffffff82e722ac r dmcu_mask +ffffffff82e722f8 r abm_regs +ffffffff82e72360 r abm_shift +ffffffff82e72384 r abm_mask +ffffffff82e72410 r debug_defaults +ffffffff82e725c0 r dce100_tg_offsets +ffffffff82e72608 r plane_cap +ffffffff82e72638 r res_create_funcs +ffffffff82e72670 r panel_cntl_regs +ffffffff82e72690 r panel_cntl_shift +ffffffff82e726a0 r panel_cntl_mask +ffffffff82e726e0 r link_enc_regs +ffffffff82e72aa0 r link_enc_aux_regs +ffffffff82e72af0 r link_enc_hpd_regs +ffffffff82e72b08 r link_enc_feature +ffffffff82e72b18 r cs_shift +ffffffff82e72b24 r cs_mask +ffffffff82e72b50 r mi_regs +ffffffff82e72e68 r mi_shifts +ffffffff82e72eb0 r mi_masks +ffffffff82e72fd0 r ipp_regs +ffffffff82e731c8 r ipp_shift +ffffffff82e731f0 r ipp_mask +ffffffff82e73290 r xfm_regs +ffffffff82e73830 r xfm_shift +ffffffff82e73890 r xfm_mask +ffffffff82e73a10 r opp_regs +ffffffff82e73b60 r opp_shift +ffffffff82e73b8c r opp_mask +ffffffff82e73c40 r aux_engine_regs +ffffffff82e73d30 r aux_mask +ffffffff82e73d90 r aux_shift +ffffffff82e73db0 r i2c_hw_regs +ffffffff82e73f00 r i2c_shifts +ffffffff82e73f2c r i2c_masks +ffffffff82e73fd0 r audio_regs +ffffffff82e74104 r audio_shift +ffffffff82e7411c r audio_mask +ffffffff82e74160 r stream_enc_regs +ffffffff82e7480c r se_shift +ffffffff82e74890 r se_mask +ffffffff82e74a94 r hwseq_reg +ffffffff82e74cb0 r hwseq_shift +ffffffff82e74d30 r hwseq_mask +ffffffff82e75000 r reg_offsets +ffffffff82e75018 r dce110_compressor_funcs +ffffffff82e76000 r dce110_funcs +ffffffff82e762e8 r dce110_private_funcs +ffffffff82e77000 r dce110_mem_input_v_funcs +ffffffff82e77090 r dvmm_Hw_Setting_1DTiling +ffffffff82e77120 r dvmm_Hw_Setting_2DTiling +ffffffff82e771b0 r dvmm_Hw_Setting_Linear +ffffffff82e78000 r global_color_matrix +ffffffff82e780b0 r input_csc_matrix +ffffffff82e79000 r funcs +ffffffff82e7a000 r bios_regs +ffffffff82e7a008 r dce110_res_pool_funcs +ffffffff82e7a100 r debug_defaults +ffffffff82e7a2b0 r clk_src_regs +ffffffff82e7a3ac r dmcu_regs +ffffffff82e7a408 r dmcu_shift +ffffffff82e7a41c r dmcu_mask +ffffffff82e7a468 r abm_regs +ffffffff82e7a4d0 r abm_shift +ffffffff82e7a4f4 r abm_mask +ffffffff82e7a580 r dce110_tg_offsets +ffffffff82e7a5c8 r res_create_funcs +ffffffff82e7a5f8 r plane_cap +ffffffff82e7a624 r underlay_plane_cap +ffffffff82e7a650 r stoney_resource_cap +ffffffff82e7a68c r carrizo_resource_cap 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r se_shift +ffffffff82e7bfc0 r se_mask +ffffffff82e7c1c4 r hwseq_stoney_reg +ffffffff82e7c3e0 r hwseq_cz_reg +ffffffff82e7c5fc r hwseq_shift +ffffffff82e7c67c r hwseq_mask +ffffffff82e7d000 r dce110_tg_funcs +ffffffff82e7e000 r dce110_tg_v_funcs +ffffffff82e7f000 r dce110_xfmv_funcs ffffffff82e80000 r reg_offsets -ffffffff82e81000 r bios_regs -ffffffff82e81008 r dce112_res_pool_funcs -ffffffff82e81100 r debug_defaults -ffffffff82e812b0 r clk_src_regs -ffffffff82e814a8 r dmcu_regs -ffffffff82e81504 r dmcu_shift -ffffffff82e81518 r dmcu_mask -ffffffff82e81564 r abm_regs -ffffffff82e815cc r abm_shift -ffffffff82e815f0 r abm_mask -ffffffff82e81680 r dce112_tg_offsets -ffffffff82e816c8 r res_create_funcs -ffffffff82e816f8 r plane_cap -ffffffff82e81724 r polaris_11_resource_cap -ffffffff82e81760 r polaris_10_resource_cap -ffffffff82e817a0 r panel_cntl_regs -ffffffff82e817c0 r panel_cntl_shift -ffffffff82e817d0 r panel_cntl_mask -ffffffff82e81810 r link_enc_regs -ffffffff82e81bd0 r link_enc_aux_regs -ffffffff82e81c20 r link_enc_hpd_regs -ffffffff82e81c38 r link_enc_feature -ffffffff82e81c48 r cs_shift -ffffffff82e81c54 r cs_mask -ffffffff82e81c80 r mi_regs -ffffffff82e81f98 r mi_shifts -ffffffff82e81fe0 r mi_masks -ffffffff82e82100 r ipp_regs -ffffffff82e822f8 r ipp_shift -ffffffff82e82320 r ipp_mask -ffffffff82e823c0 r xfm_regs -ffffffff82e82960 r xfm_shift -ffffffff82e829c0 r xfm_mask -ffffffff82e82b40 r opp_regs -ffffffff82e82c90 r opp_shift -ffffffff82e82cbc r opp_mask -ffffffff82e82d70 r aux_engine_regs -ffffffff82e82e60 r aux_mask -ffffffff82e82ec0 r aux_shift -ffffffff82e82ee0 r i2c_hw_regs -ffffffff82e83030 r i2c_shifts -ffffffff82e8305c r i2c_masks -ffffffff82e83100 r audio_regs -ffffffff82e83208 r audio_shift -ffffffff82e83220 r audio_mask -ffffffff82e83260 r stream_enc_regs -ffffffff82e83818 r se_shift -ffffffff82e8389c r se_mask -ffffffff82e83aa0 r hwseq_reg -ffffffff82e83cbc r hwseq_shift -ffffffff82e83d3c r hwseq_mask -ffffffff82e84000 r bios_regs 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r xfm_shift -ffffffff82e859c0 r xfm_mask -ffffffff82e85b40 r opp_regs -ffffffff82e85c90 r opp_shift -ffffffff82e85cbc r opp_mask -ffffffff82e85d70 r aux_engine_regs -ffffffff82e85e60 r aux_mask -ffffffff82e85ec0 r aux_shift -ffffffff82e85ee0 r i2c_hw_regs -ffffffff82e86030 r i2c_shifts -ffffffff82e8605c r i2c_masks -ffffffff82e86100 r audio_regs -ffffffff82e86234 r audio_shift -ffffffff82e8624c r audio_mask -ffffffff82e86290 r stream_enc_regs -ffffffff82e86848 r se_shift -ffffffff82e868cc r se_mask -ffffffff82e86ad0 r dce121_hwseq_reg -ffffffff82e86cec r dce121_hwseq_shift -ffffffff82e86d6c r dce121_hwseq_mask -ffffffff82e86f60 r hwseq_reg -ffffffff82e8717c r hwseq_shift -ffffffff82e871fc r hwseq_mask -ffffffff82e88000 r dce120_tg_funcs -ffffffff82e89000 r bios_regs -ffffffff82e89008 r res_cap -ffffffff82e89048 r dce80_res_pool_funcs -ffffffff82e89140 r debug_defaults -ffffffff82e892f0 r clk_src_regs -ffffffff82e893ec r dmcu_regs -ffffffff82e89448 r dmcu_shift -ffffffff82e8945c r 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r mpc_regs +ffffffff82f3a108 r mpc_shift +ffffffff82f3a1e4 r mpc_mask +ffffffff82f3a550 r dsc_regs +ffffffff82f3a79c r dsc_shift +ffffffff82f3a854 r dsc_mask +ffffffff82f3ab30 r dwbc30_regs +ffffffff82f3ad0c r dwbc30_shift +ffffffff82f3ae40 r dwbc30_mask +ffffffff82f3b310 r mcif_wb30_regs +ffffffff82f3b40c r mcif_wb30_shift +ffffffff82f3b4b8 r mcif_wb30_mask +ffffffff82f3b770 r aux_engine_regs +ffffffff82f3b838 r aux_mask +ffffffff82f3b898 r aux_shift +ffffffff82f3b8b0 r i2c_hw_regs +ffffffff82f3b9c8 r i2c_shifts +ffffffff82f3b9f4 r i2c_masks +ffffffff82f3baa0 r audio_regs +ffffffff82f3bbd4 r audio_shift +ffffffff82f3bbec r audio_mask +ffffffff82f3bc30 r stream_enc_regs +ffffffff82f3c2d4 r se_shift +ffffffff82f3c3b0 r se_mask +ffffffff82f3c720 r vpg_regs +ffffffff82f3c810 r vpg_shift +ffffffff82f3c838 r vpg_mask +ffffffff82f3c8e0 r afmt_regs +ffffffff82f3c9b8 r afmt_shift +ffffffff82f3c9cc r afmt_mask +ffffffff82f3ca20 r hpo_dp_stream_enc_regs +ffffffff82f3cc50 r hpo_dp_se_shift +ffffffff82f3cc78 r hpo_dp_se_mask +ffffffff82f3cd20 r apg_regs +ffffffff82f3cd60 r apg_shift +ffffffff82f3cd68 r apg_mask +ffffffff82f3cd80 r hpo_dp_link_enc_regs +ffffffff82f3ce90 r hpo_dp_le_shift +ffffffff82f3ceac r hpo_dp_le_mask +ffffffff82f3cf10 r hwseq_reg +ffffffff82f3d12c r hwseq_shift +ffffffff82f3d1ac r hwseq_mask +ffffffff82f3e000 r dccg32_funcs +ffffffff82f3f000 r dcn32_link_enc_funcs +ffffffff82f40000 r dcn32_str_enc_funcs +ffffffff82f41000 r hubbub32_funcs +ffffffff82f42000 r dcn32_funcs +ffffffff82f422e8 r dcn32_private_funcs +ffffffff82f43000 r dcn32_mmhubbub_funcs +ffffffff82f44000 r dcn32_mpc_funcs +ffffffff82f45000 r res_cap_dcn32 +ffffffff82f4503c r dccg_shift +ffffffff82f450dc r dccg_mask +ffffffff82f45350 r abm_shift +ffffffff82f45374 r abm_mask +ffffffff82f45400 r res_create_funcs +ffffffff82f45430 r plane_cap +ffffffff82f4545c r le_shift +ffffffff82f4554c r le_mask +ffffffff82f45904 r link_enc_feature +ffffffff82f45918 r debug_defaults_drv +ffffffff82f45ac0 r cs_shift +ffffffff82f45acc r cs_mask +ffffffff82f45af4 r hubbub_shift +ffffffff82f45b84 r hubbub_mask +ffffffff82f45dbc r vmid_shifts +ffffffff82f45dc4 r vmid_masks +ffffffff82f45de4 r hubp_shift +ffffffff82f45ee0 r hubp_mask +ffffffff82f462d0 r tf_shift +ffffffff82f465a4 r tf_mask +ffffffff82f470e8 r opp_shift +ffffffff82f47120 r opp_mask +ffffffff82f471f4 r optc_shift +ffffffff82f472c8 r optc_mask +ffffffff82f47610 r mpc_shift +ffffffff82f476ec r mpc_mask +ffffffff82f47a58 r dsc_shift +ffffffff82f47b10 r dsc_mask +ffffffff82f47de8 r dwbc30_shift +ffffffff82f47f1c r dwbc30_mask +ffffffff82f483e4 r mcif_wb30_shift +ffffffff82f48490 r mcif_wb30_mask +ffffffff82f4873c r aux_mask +ffffffff82f4879c r aux_shift +ffffffff82f487b4 r i2c_shifts +ffffffff82f487e0 r i2c_masks +ffffffff82f48884 r audio_shift +ffffffff82f4889c r audio_mask +ffffffff82f488d8 r se_shift +ffffffff82f489b4 r se_mask +ffffffff82f48d20 r vpg_shift +ffffffff82f48d48 r vpg_mask +ffffffff82f48ddc r afmt_shift +ffffffff82f48df0 r afmt_mask +ffffffff82f48e34 r hpo_dp_se_shift +ffffffff82f48e5c r hpo_dp_se_mask +ffffffff82f48efc r apg_shift +ffffffff82f48f04 r apg_mask +ffffffff82f48f1c r hpo_dp_le_shift +ffffffff82f48f38 r hpo_dp_le_mask +ffffffff82f48f9c r hwseq_shift +ffffffff82f4901c r hwseq_mask +ffffffff82f4a000 r dcn321_link_enc_funcs +ffffffff82f4b000 r res_cap_dcn321 +ffffffff82f4b03c r dccg_shift +ffffffff82f4b0dc r dccg_mask +ffffffff82f4b350 r abm_shift +ffffffff82f4b374 r abm_mask +ffffffff82f4b400 r res_create_funcs +ffffffff82f4b430 r plane_cap +ffffffff82f4b45c r le_shift +ffffffff82f4b54c r le_mask +ffffffff82f4b904 r link_enc_feature +ffffffff82f4b918 r debug_defaults_drv +ffffffff82f4bac0 r cs_shift +ffffffff82f4bacc r cs_mask +ffffffff82f4baf4 r hubbub_shift +ffffffff82f4bb84 r hubbub_mask +ffffffff82f4bdbc r vmid_shifts +ffffffff82f4bdc4 r vmid_masks +ffffffff82f4bde4 r hubp_shift +ffffffff82f4bee0 r hubp_mask +ffffffff82f4c2d0 r tf_shift +ffffffff82f4c5a4 r tf_mask +ffffffff82f4d0e8 r opp_shift +ffffffff82f4d120 r opp_mask +ffffffff82f4d1f4 r optc_shift +ffffffff82f4d2c8 r optc_mask +ffffffff82f4d610 r mpc_shift +ffffffff82f4d6ec r mpc_mask +ffffffff82f4da58 r dsc_shift +ffffffff82f4db10 r dsc_mask +ffffffff82f4dde8 r dwbc30_shift +ffffffff82f4df1c r dwbc30_mask +ffffffff82f4e3e4 r mcif_wb30_shift +ffffffff82f4e490 r mcif_wb30_mask +ffffffff82f4e73c r aux_mask +ffffffff82f4e79c r aux_shift +ffffffff82f4e7b4 r i2c_shifts +ffffffff82f4e7e0 r i2c_masks +ffffffff82f4e884 r audio_shift +ffffffff82f4e89c r audio_mask +ffffffff82f4e8d8 r se_shift +ffffffff82f4e9b4 r se_mask +ffffffff82f4ed20 r vpg_shift +ffffffff82f4ed48 r vpg_mask +ffffffff82f4eddc r afmt_shift +ffffffff82f4edf0 r afmt_mask +ffffffff82f4ee34 r hpo_dp_se_shift +ffffffff82f4ee5c r hpo_dp_se_mask +ffffffff82f4eefc r apg_shift +ffffffff82f4ef04 r apg_mask +ffffffff82f4ef1c r hpo_dp_le_shift +ffffffff82f4ef38 r hpo_dp_le_mask +ffffffff82f4ef9c r hwseq_shift +ffffffff82f4f01c r hwseq_mask +ffffffff82f51000 R dcn10_soc_defaults +ffffffff82f5108c R dcn10_ip_defaults +ffffffff82f5d000 r dml20_funcs +ffffffff82f5d030 r dml20v2_funcs +ffffffff82f5d060 r dml21_funcs +ffffffff82f5d090 r dml30_funcs +ffffffff82f5d0c0 r dml31_funcs +ffffffff82f5d0f0 r dml314_funcs +ffffffff82f5d120 r dml32_funcs +ffffffff82f60000 r qp_table_444_8bpc_max +ffffffff82f60940 r qp_table_444_8bpc_min +ffffffff82f61280 r qp_table_444_10bpc_max +ffffffff82f61ec0 r qp_table_444_10bpc_min +ffffffff82f62b00 r qp_table_444_12bpc_max +ffffffff82f63a40 r qp_table_444_12bpc_min +ffffffff82f64980 r qp_table_422_8bpc_max +ffffffff82f64ec0 r qp_table_422_8bpc_min +ffffffff82f65400 r qp_table_422_10bpc_max +ffffffff82f65b40 r qp_table_422_10bpc_min +ffffffff82f66280 r qp_table_422_12bpc_max +ffffffff82f66bc0 r qp_table_422_12bpc_min +ffffffff82f67500 r qp_table_420_8bpc_max +ffffffff82f67940 r qp_table_420_8bpc_min +ffffffff82f67d80 r qp_table_420_10bpc_max +ffffffff82f68340 r qp_table_420_10bpc_min +ffffffff82f68900 r qp_table_420_12bpc_max +ffffffff82f69040 r qp_table_420_12bpc_min ffffffff82f6b000 r funcs +ffffffff82f6b050 r hpd_regs +ffffffff82f6b1a0 r hpd_shift +ffffffff82f6b1b0 r hpd_mask +ffffffff82f6b1c0 r ddc_data_regs +ffffffff82f6b3a0 r ddc_clk_regs +ffffffff82f6b580 r ddc_shift +ffffffff82f6b5a8 r ddc_mask ffffffff82f6c000 r funcs -ffffffff82f6c050 r hpd_regs -ffffffff82f6c1a0 r hpd_shift -ffffffff82f6c1b0 r hpd_mask -ffffffff82f6c1c0 r ddc_data_regs -ffffffff82f6c3a0 r ddc_clk_regs -ffffffff82f6c580 r ddc_shift -ffffffff82f6c5a8 r ddc_mask ffffffff82f6d000 r funcs +ffffffff82f6d050 r hpd_regs +ffffffff82f6d1a0 r hpd_shift +ffffffff82f6d1b0 r hpd_mask +ffffffff82f6d1c0 r ddc_data_regs +ffffffff82f6d3a0 r ddc_clk_regs +ffffffff82f6d580 r ddc_shift +ffffffff82f6d5a8 r ddc_mask ffffffff82f6e000 r funcs -ffffffff82f6e050 r hpd_regs -ffffffff82f6e1a0 r hpd_shift -ffffffff82f6e1b0 r hpd_mask -ffffffff82f6e1c0 r ddc_data_regs -ffffffff82f6e3a0 r ddc_clk_regs -ffffffff82f6e580 r ddc_shift -ffffffff82f6e5a8 r ddc_mask ffffffff82f6f000 r funcs +ffffffff82f6f050 r hpd_regs +ffffffff82f6f1a0 r hpd_shift +ffffffff82f6f1b0 r hpd_mask +ffffffff82f6f1c0 r ddc_data_regs +ffffffff82f6f3a0 r ddc_clk_regs +ffffffff82f6f580 r ddc_shift +ffffffff82f6f5a8 r ddc_mask ffffffff82f70000 r funcs -ffffffff82f70050 r hpd_regs -ffffffff82f701a0 r hpd_shift -ffffffff82f701b0 r hpd_mask -ffffffff82f701c0 r ddc_data_regs -ffffffff82f703a0 r ddc_clk_regs -ffffffff82f70580 r ddc_shift -ffffffff82f705a8 r ddc_mask -ffffffff82f705d0 r generic_regs -ffffffff82f70640 r generic_shift -ffffffff82f70650 r generic_mask ffffffff82f71000 r funcs +ffffffff82f71050 r hpd_regs +ffffffff82f711a0 r hpd_shift +ffffffff82f711b0 r hpd_mask +ffffffff82f711c0 r ddc_data_regs +ffffffff82f713a0 r ddc_clk_regs +ffffffff82f71580 r ddc_shift +ffffffff82f715a8 r ddc_mask +ffffffff82f715d0 r generic_regs +ffffffff82f71640 r generic_shift +ffffffff82f71650 r generic_mask ffffffff82f72000 r funcs -ffffffff82f72050 r hpd_regs -ffffffff82f721a0 r hpd_shift -ffffffff82f721b0 r hpd_mask -ffffffff82f721c0 r ddc_data_regs_dcn -ffffffff82f72370 r ddc_clk_regs_dcn -ffffffff82f72520 r ddc_shift -ffffffff82f72640 r ddc_mask -ffffffff82f72760 r generic_regs -ffffffff82f727d0 r generic_shift -ffffffff82f727e0 r generic_mask ffffffff82f73000 r funcs +ffffffff82f73050 r hpd_regs +ffffffff82f731a0 r hpd_shift +ffffffff82f731b0 r hpd_mask +ffffffff82f731c0 r ddc_data_regs_dcn +ffffffff82f73370 r ddc_clk_regs_dcn +ffffffff82f73520 r ddc_shift +ffffffff82f73640 r ddc_mask +ffffffff82f73760 r generic_regs +ffffffff82f737d0 r generic_shift +ffffffff82f737e0 r generic_mask ffffffff82f74000 r funcs -ffffffff82f74050 r hpd_regs -ffffffff82f74168 r hpd_shift -ffffffff82f74178 r hpd_mask -ffffffff82f74190 r ddc_data_regs_dcn -ffffffff82f742c0 r ddc_clk_regs_dcn -ffffffff82f743f0 r ddc_shift -ffffffff82f744e0 r ddc_mask -ffffffff82f745d0 r generic_regs -ffffffff82f74604 r generic_shift -ffffffff82f7460c r generic_mask ffffffff82f75000 r funcs +ffffffff82f75050 r hpd_regs +ffffffff82f75168 r hpd_shift +ffffffff82f75178 r hpd_mask +ffffffff82f75190 r ddc_data_regs_dcn +ffffffff82f752c0 r ddc_clk_regs_dcn +ffffffff82f753f0 r ddc_shift +ffffffff82f754e0 r ddc_mask +ffffffff82f755d0 r generic_regs +ffffffff82f75604 r generic_shift +ffffffff82f7560c r generic_mask ffffffff82f76000 r funcs -ffffffff82f76050 r hpd_regs -ffffffff82f761a0 r hpd_shift -ffffffff82f761b0 r hpd_mask -ffffffff82f761c0 r ddc_data_regs_dcn -ffffffff82f76370 r ddc_clk_regs_dcn -ffffffff82f76520 r ddc_shift -ffffffff82f76640 r ddc_mask -ffffffff82f76760 r generic_regs -ffffffff82f767d0 r generic_shift -ffffffff82f767e0 r generic_mask ffffffff82f77000 r funcs +ffffffff82f77050 r hpd_regs +ffffffff82f771a0 r hpd_shift +ffffffff82f771b0 r hpd_mask +ffffffff82f771c0 r ddc_data_regs_dcn +ffffffff82f77370 r ddc_clk_regs_dcn +ffffffff82f77520 r ddc_shift +ffffffff82f77640 r ddc_mask +ffffffff82f77760 r generic_regs +ffffffff82f777d0 r generic_shift +ffffffff82f777e0 r generic_mask ffffffff82f78000 r funcs -ffffffff82f78050 r hpd_regs -ffffffff82f78168 r hpd_shift -ffffffff82f78178 r hpd_mask -ffffffff82f78190 r ddc_data_regs_dcn -ffffffff82f78300 r ddc_clk_regs_dcn -ffffffff82f78470 r ddc_shift -ffffffff82f78560 r ddc_mask -ffffffff82f78650 r generic_regs -ffffffff82f786c0 r generic_shift -ffffffff82f786d0 r generic_mask ffffffff82f79000 r funcs +ffffffff82f79050 r hpd_regs +ffffffff82f79168 r hpd_shift +ffffffff82f79178 r hpd_mask +ffffffff82f79190 r ddc_data_regs_dcn +ffffffff82f79300 r ddc_clk_regs_dcn +ffffffff82f79470 r ddc_shift +ffffffff82f79560 r ddc_mask +ffffffff82f79650 r generic_regs +ffffffff82f796c0 r generic_shift +ffffffff82f796d0 r generic_mask ffffffff82f7a000 r funcs -ffffffff82f7a050 r hpd_regs -ffffffff82f7a168 r hpd_shift -ffffffff82f7a178 r hpd_mask -ffffffff82f7a190 r ddc_data_regs_dcn -ffffffff82f7a340 r ddc_clk_regs_dcn -ffffffff82f7a4f0 r ddc_shift -ffffffff82f7a610 r ddc_mask -ffffffff82f7a730 r generic_regs -ffffffff82f7a7a0 r generic_shift -ffffffff82f7a7b0 r generic_mask ffffffff82f7b000 r funcs +ffffffff82f7b050 r hpd_regs +ffffffff82f7b168 r hpd_shift +ffffffff82f7b178 r hpd_mask +ffffffff82f7b190 r ddc_data_regs_dcn +ffffffff82f7b340 r ddc_clk_regs_dcn +ffffffff82f7b4f0 r ddc_shift +ffffffff82f7b610 r ddc_mask +ffffffff82f7b730 r generic_regs +ffffffff82f7b7a0 r generic_shift +ffffffff82f7b7b0 r generic_mask ffffffff82f7c000 r funcs ffffffff82f7d000 r funcs ffffffff82f7e000 r funcs -ffffffff82f7f000 r hdmi_14_protection -ffffffff82f7f010 r dp_11_protection -ffffffff82f7f020 r hdcp_i2c_offsets -ffffffff82f7f050 r hdcp_dpcd_addrs -ffffffff82f80000 r irq_service_funcs_dce110 -ffffffff82f80008 r dummy_irq_info_funcs -ffffffff82f80018 r hpd_irq_info_funcs -ffffffff82f80028 r hpd_rx_irq_info_funcs -ffffffff82f80038 r pflip_irq_info_funcs -ffffffff82f80048 r vupdate_irq_info_funcs -ffffffff82f80058 r vblank_irq_info_funcs -ffffffff82f80070 r irq_source_info_dce110 -ffffffff82f82000 r irq_service_funcs_dce120 -ffffffff82f82008 r dummy_irq_info_funcs -ffffffff82f82018 r hpd_irq_info_funcs -ffffffff82f82028 r hpd_rx_irq_info_funcs -ffffffff82f82038 r pflip_irq_info_funcs -ffffffff82f82048 r vupdate_irq_info_funcs -ffffffff82f82058 r vblank_irq_info_funcs -ffffffff82f82070 r irq_source_info_dce120 -ffffffff82f84000 r irq_service_funcs_dce80 -ffffffff82f84008 r dummy_irq_info_funcs -ffffffff82f84018 r hpd_irq_info_funcs -ffffffff82f84028 r hpd_rx_irq_info_funcs -ffffffff82f84038 r pflip_irq_info_funcs -ffffffff82f84048 r vupdate_irq_info_funcs -ffffffff82f84058 r vblank_irq_info_funcs -ffffffff82f84070 r irq_source_info_dce80 -ffffffff82f86000 r irq_service_funcs_dcn10 -ffffffff82f86008 r dummy_irq_info_funcs -ffffffff82f86018 r hpd_irq_info_funcs -ffffffff82f86028 r hpd_rx_irq_info_funcs -ffffffff82f86038 r pflip_irq_info_funcs -ffffffff82f86048 r vupdate_no_lock_irq_info_funcs -ffffffff82f86058 r vblank_irq_info_funcs -ffffffff82f86068 r vline0_irq_info_funcs -ffffffff82f86080 r irq_source_info_dcn10 -ffffffff82f88000 r irq_service_funcs_dcn20 -ffffffff82f88008 r dummy_irq_info_funcs -ffffffff82f88018 r hpd_irq_info_funcs -ffffffff82f88028 r hpd_rx_irq_info_funcs -ffffffff82f88038 r pflip_irq_info_funcs -ffffffff82f88048 r vupdate_no_lock_irq_info_funcs -ffffffff82f88058 r vblank_irq_info_funcs -ffffffff82f88068 r vline0_irq_info_funcs -ffffffff82f88080 r irq_source_info_dcn20 -ffffffff82f8a000 r irq_service_funcs_dcn201 -ffffffff82f8a008 r dummy_irq_info_funcs -ffffffff82f8a018 r hpd_irq_info_funcs -ffffffff82f8a028 r hpd_rx_irq_info_funcs -ffffffff82f8a038 r pflip_irq_info_funcs -ffffffff82f8a048 r vupdate_no_lock_irq_info_funcs -ffffffff82f8a058 r vblank_irq_info_funcs -ffffffff82f8a068 r vline0_irq_info_funcs -ffffffff82f8a080 r irq_source_info_dcn201 -ffffffff82f8c000 r irq_source_info_dcn21 -ffffffff82f8d290 r irq_service_funcs_dcn21 -ffffffff82f8d298 r dummy_irq_info_funcs -ffffffff82f8d2a8 r hpd_irq_info_funcs -ffffffff82f8d2b8 r hpd_rx_irq_info_funcs -ffffffff82f8d2c8 r pflip_irq_info_funcs -ffffffff82f8d2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82f8d2e8 r vblank_irq_info_funcs -ffffffff82f8d2f8 r vline0_irq_info_funcs -ffffffff82f8d308 r dmub_outbox_irq_info_funcs -ffffffff82f8e000 r irq_source_info_dcn30 -ffffffff82f8f290 r irq_service_funcs_dcn30 -ffffffff82f8f298 r dummy_irq_info_funcs -ffffffff82f8f2a8 r hpd_irq_info_funcs -ffffffff82f8f2b8 r hpd_rx_irq_info_funcs -ffffffff82f8f2c8 r pflip_irq_info_funcs -ffffffff82f8f2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82f8f2e8 r vblank_irq_info_funcs -ffffffff82f8f2f8 r vline0_irq_info_funcs -ffffffff82f8f308 r dmub_trace_irq_info_funcs -ffffffff82f90000 r irq_source_info_dcn302 -ffffffff82f91290 r irq_service_funcs_dcn302 -ffffffff82f91298 r dummy_irq_info_funcs -ffffffff82f912a8 r hpd_irq_info_funcs -ffffffff82f912b8 r hpd_rx_irq_info_funcs -ffffffff82f912c8 r pflip_irq_info_funcs -ffffffff82f912d8 r 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irq_source_info_dcn314 -ffffffff82f97290 r irq_service_funcs_dcn314 -ffffffff82f97298 r dummy_irq_info_funcs -ffffffff82f972a8 r hpd_irq_info_funcs -ffffffff82f972b8 r hpd_rx_irq_info_funcs -ffffffff82f972c8 r pflip_irq_info_funcs -ffffffff82f972d8 r vupdate_no_lock_irq_info_funcs -ffffffff82f972e8 r vblank_irq_info_funcs -ffffffff82f972f8 r vline0_irq_info_funcs -ffffffff82f97308 r outbox_irq_info_funcs -ffffffff82f98000 r irq_source_info_dcn315 -ffffffff82f99290 r irq_service_funcs_dcn315 -ffffffff82f99298 r dummy_irq_info_funcs -ffffffff82f992a8 r hpd_irq_info_funcs -ffffffff82f992b8 r hpd_rx_irq_info_funcs -ffffffff82f992c8 r pflip_irq_info_funcs -ffffffff82f992d8 r vupdate_no_lock_irq_info_funcs -ffffffff82f992e8 r vblank_irq_info_funcs -ffffffff82f992f8 r vline0_irq_info_funcs -ffffffff82f99308 r outbox_irq_info_funcs -ffffffff82f9a000 r irq_source_info_dcn32 -ffffffff82f9b290 r irq_service_funcs_dcn32 -ffffffff82f9b298 r dummy_irq_info_funcs -ffffffff82f9b2a8 r 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dmub_srv_dcn20_regs -ffffffff82fae000 R dmub_srv_dcn21_regs -ffffffff82faf000 R dmub_srv_dcn30_regs -ffffffff82fb0000 R dmub_srv_dcn301_regs -ffffffff82fb1000 R dmub_srv_dcn302_regs -ffffffff82fb2000 R dmub_srv_dcn303_regs -ffffffff82fb3000 R dmub_srv_dcn31_regs -ffffffff82fb4000 R dmub_srv_dcn314_regs -ffffffff82fb5000 R dmub_srv_dcn315_regs -ffffffff82fb6000 R dmub_srv_dcn316_regs -ffffffff82fb7000 R dmub_srv_dcn32_regs -ffffffff82fb8000 r numerator01 -ffffffff82fb8020 r numerator02 -ffffffff82fb8040 r numerator04 -ffffffff82fb8060 r numerator05 -ffffffff82fbc000 r abm_settings -ffffffff82fbc020 r abm_settings_config0 -ffffffff82fbc060 r abm_settings_config1 -ffffffff82fbc0a0 r abm_settings_config2 -ffffffff82fbc0d8 r min_reduction_table_v_2_2 -ffffffff82fbc0e5 r max_reduction_table_v_2_2 -ffffffff82fbc0f2 r min_reduction_table -ffffffff82fbc0ff r max_reduction_table -ffffffff82fbc110 r custom_backlight_curve0 -ffffffff82fbd000 R amdgpu_pp_profile_name -ffffffff82fbe000 r pp_lib_thermal_controller_names -ffffffff82fbf000 r pp_ip_funcs -ffffffff82fbf0a8 R pp_smu_ip_block -ffffffff82fbf0c0 r pp_dpm_funcs -ffffffff82fc0000 r gpio_tbl -ffffffff82fc00f0 r enable_fb_req_rej_tbl -ffffffff82fc0140 r use_bclk_tbl -ffffffff82fc0310 r turn_off_plls_tbl -ffffffff82fc0640 r enter_baco_tbl -ffffffff82fc0730 r exit_baco_tbl -ffffffff82fc0850 r clean_baco_tbl +ffffffff82f7f000 r funcs +ffffffff82f80000 r hdmi_14_protection +ffffffff82f80010 r dp_11_protection +ffffffff82f80020 r hdcp_i2c_offsets +ffffffff82f80050 r hdcp_dpcd_addrs +ffffffff82f81000 r irq_service_funcs_dce110 +ffffffff82f81008 r dummy_irq_info_funcs +ffffffff82f81018 r hpd_irq_info_funcs +ffffffff82f81028 r hpd_rx_irq_info_funcs +ffffffff82f81038 r pflip_irq_info_funcs +ffffffff82f81048 r vupdate_irq_info_funcs +ffffffff82f81058 r vblank_irq_info_funcs +ffffffff82f81070 r irq_source_info_dce110 +ffffffff82f83000 r irq_service_funcs_dce120 +ffffffff82f83008 r dummy_irq_info_funcs +ffffffff82f83018 r hpd_irq_info_funcs +ffffffff82f83028 r hpd_rx_irq_info_funcs +ffffffff82f83038 r pflip_irq_info_funcs +ffffffff82f83048 r vupdate_irq_info_funcs +ffffffff82f83058 r vblank_irq_info_funcs +ffffffff82f83070 r irq_source_info_dce120 +ffffffff82f85000 r irq_service_funcs_dce80 +ffffffff82f85008 r dummy_irq_info_funcs +ffffffff82f85018 r hpd_irq_info_funcs +ffffffff82f85028 r hpd_rx_irq_info_funcs +ffffffff82f85038 r pflip_irq_info_funcs +ffffffff82f85048 r vupdate_irq_info_funcs +ffffffff82f85058 r vblank_irq_info_funcs +ffffffff82f85070 r irq_source_info_dce80 +ffffffff82f87000 r irq_service_funcs_dcn10 +ffffffff82f87008 r dummy_irq_info_funcs +ffffffff82f87018 r hpd_irq_info_funcs +ffffffff82f87028 r hpd_rx_irq_info_funcs +ffffffff82f87038 r pflip_irq_info_funcs +ffffffff82f87048 r vupdate_no_lock_irq_info_funcs +ffffffff82f87058 r vblank_irq_info_funcs +ffffffff82f87068 r vline0_irq_info_funcs +ffffffff82f87080 r irq_source_info_dcn10 +ffffffff82f89000 r irq_service_funcs_dcn20 +ffffffff82f89008 r dummy_irq_info_funcs +ffffffff82f89018 r hpd_irq_info_funcs +ffffffff82f89028 r hpd_rx_irq_info_funcs +ffffffff82f89038 r pflip_irq_info_funcs +ffffffff82f89048 r vupdate_no_lock_irq_info_funcs +ffffffff82f89058 r vblank_irq_info_funcs +ffffffff82f89068 r vline0_irq_info_funcs +ffffffff82f89080 r irq_source_info_dcn20 +ffffffff82f8b000 r irq_service_funcs_dcn201 +ffffffff82f8b008 r dummy_irq_info_funcs +ffffffff82f8b018 r hpd_irq_info_funcs +ffffffff82f8b028 r hpd_rx_irq_info_funcs +ffffffff82f8b038 r pflip_irq_info_funcs +ffffffff82f8b048 r vupdate_no_lock_irq_info_funcs +ffffffff82f8b058 r vblank_irq_info_funcs +ffffffff82f8b068 r vline0_irq_info_funcs +ffffffff82f8b080 r irq_source_info_dcn201 +ffffffff82f8d000 r irq_source_info_dcn21 +ffffffff82f8e290 r irq_service_funcs_dcn21 +ffffffff82f8e298 r dummy_irq_info_funcs +ffffffff82f8e2a8 r hpd_irq_info_funcs +ffffffff82f8e2b8 r hpd_rx_irq_info_funcs +ffffffff82f8e2c8 r pflip_irq_info_funcs +ffffffff82f8e2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82f8e2e8 r vblank_irq_info_funcs +ffffffff82f8e2f8 r vline0_irq_info_funcs +ffffffff82f8e308 r dmub_outbox_irq_info_funcs +ffffffff82f8f000 r irq_source_info_dcn30 +ffffffff82f90290 r irq_service_funcs_dcn30 +ffffffff82f90298 r dummy_irq_info_funcs +ffffffff82f902a8 r hpd_irq_info_funcs +ffffffff82f902b8 r hpd_rx_irq_info_funcs +ffffffff82f902c8 r pflip_irq_info_funcs +ffffffff82f902d8 r vupdate_no_lock_irq_info_funcs +ffffffff82f902e8 r vblank_irq_info_funcs +ffffffff82f902f8 r vline0_irq_info_funcs +ffffffff82f90308 r dmub_trace_irq_info_funcs +ffffffff82f91000 r irq_source_info_dcn302 +ffffffff82f92290 r irq_service_funcs_dcn302 +ffffffff82f92298 r dummy_irq_info_funcs +ffffffff82f922a8 r hpd_irq_info_funcs +ffffffff82f922b8 r hpd_rx_irq_info_funcs +ffffffff82f922c8 r pflip_irq_info_funcs +ffffffff82f922d8 r vupdate_no_lock_irq_info_funcs +ffffffff82f922e8 r vblank_irq_info_funcs +ffffffff82f922f8 r vline0_irq_info_funcs +ffffffff82f92308 r dmub_trace_irq_info_funcs +ffffffff82f93000 r irq_service_funcs_dcn303 +ffffffff82f93008 r dummy_irq_info_funcs +ffffffff82f93018 r hpd_irq_info_funcs +ffffffff82f93028 r hpd_rx_irq_info_funcs +ffffffff82f93038 r pflip_irq_info_funcs +ffffffff82f93048 r vupdate_no_lock_irq_info_funcs +ffffffff82f93058 r vblank_irq_info_funcs +ffffffff82f93068 r vline0_irq_info_funcs +ffffffff82f93080 r irq_source_info_dcn303 +ffffffff82f95000 r irq_source_info_dcn31 +ffffffff82f96290 r irq_service_funcs_dcn31 +ffffffff82f96298 r dummy_irq_info_funcs +ffffffff82f962a8 r hpd_irq_info_funcs +ffffffff82f962b8 r hpd_rx_irq_info_funcs +ffffffff82f962c8 r pflip_irq_info_funcs +ffffffff82f962d8 r vupdate_no_lock_irq_info_funcs +ffffffff82f962e8 r vblank_irq_info_funcs +ffffffff82f962f8 r vline0_irq_info_funcs +ffffffff82f96308 r outbox_irq_info_funcs +ffffffff82f97000 r irq_source_info_dcn314 +ffffffff82f98290 r irq_service_funcs_dcn314 +ffffffff82f98298 r dummy_irq_info_funcs +ffffffff82f982a8 r hpd_irq_info_funcs +ffffffff82f982b8 r hpd_rx_irq_info_funcs +ffffffff82f982c8 r pflip_irq_info_funcs +ffffffff82f982d8 r vupdate_no_lock_irq_info_funcs +ffffffff82f982e8 r vblank_irq_info_funcs +ffffffff82f982f8 r vline0_irq_info_funcs +ffffffff82f98308 r outbox_irq_info_funcs +ffffffff82f99000 r irq_source_info_dcn315 +ffffffff82f9a290 r irq_service_funcs_dcn315 +ffffffff82f9a298 r dummy_irq_info_funcs +ffffffff82f9a2a8 r hpd_irq_info_funcs +ffffffff82f9a2b8 r hpd_rx_irq_info_funcs +ffffffff82f9a2c8 r pflip_irq_info_funcs +ffffffff82f9a2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82f9a2e8 r vblank_irq_info_funcs +ffffffff82f9a2f8 r vline0_irq_info_funcs +ffffffff82f9a308 r outbox_irq_info_funcs +ffffffff82f9b000 r irq_source_info_dcn32 +ffffffff82f9c290 r irq_service_funcs_dcn32 +ffffffff82f9c298 r dummy_irq_info_funcs +ffffffff82f9c2a8 r hpd_irq_info_funcs +ffffffff82f9c2b8 r hpd_rx_irq_info_funcs +ffffffff82f9c2c8 r pflip_irq_info_funcs +ffffffff82f9c2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82f9c2e8 r vblank_irq_info_funcs +ffffffff82f9c2f8 r vline0_irq_info_funcs +ffffffff82f9c308 r outbox_irq_info_funcs +ffffffff82f9e000 r dio_link_hwss +ffffffff82f9f000 r dio_fixed_vs_pe_retimer_link_hwss +ffffffff82fa0000 r dpia_link_hwss +ffffffff82fa1000 r hpo_dp_link_hwss +ffffffff82fa2000 r hpo_fixed_vs_pe_retimer_dp_link_hwss +ffffffff82fa3000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82fa4000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82fa4006 r DP_DVI_CONVERTER_ID_4 +ffffffff82fa400d r DP_DVI_CONVERTER_ID_5 +ffffffff82fa5000 r dp_lt_fallbacks +ffffffff82fa9000 r mandatory_dpcd_partitions +ffffffff82faa000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82faa007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82fab000 r virtual_lnk_enc_funcs +ffffffff82fac000 r virtual_link_hwss +ffffffff82fad000 r virtual_str_enc_funcs +ffffffff82fae000 R dmub_srv_dcn20_regs +ffffffff82faf000 R dmub_srv_dcn21_regs +ffffffff82fb0000 R dmub_srv_dcn30_regs +ffffffff82fb1000 R dmub_srv_dcn301_regs +ffffffff82fb2000 R dmub_srv_dcn302_regs +ffffffff82fb3000 R dmub_srv_dcn303_regs +ffffffff82fb4000 R dmub_srv_dcn31_regs +ffffffff82fb5000 R dmub_srv_dcn314_regs +ffffffff82fb6000 R dmub_srv_dcn315_regs +ffffffff82fb7000 R dmub_srv_dcn316_regs +ffffffff82fb8000 R dmub_srv_dcn32_regs +ffffffff82fb9000 r numerator01 +ffffffff82fb9020 r numerator02 +ffffffff82fb9040 r numerator04 +ffffffff82fb9060 r numerator05 +ffffffff82fbd000 r abm_settings +ffffffff82fbd020 r abm_settings_config0 +ffffffff82fbd060 r abm_settings_config1 +ffffffff82fbd0a0 r abm_settings_config2 +ffffffff82fbd0d8 r min_reduction_table_v_2_2 +ffffffff82fbd0e5 r max_reduction_table_v_2_2 +ffffffff82fbd0f2 r min_reduction_table +ffffffff82fbd0ff r max_reduction_table +ffffffff82fbd110 r custom_backlight_curve0 +ffffffff82fbe000 R amdgpu_pp_profile_name +ffffffff82fbf000 r pp_lib_thermal_controller_names +ffffffff82fc0000 r pp_ip_funcs +ffffffff82fc00a8 R pp_smu_ip_block +ffffffff82fc00c0 r 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db_next_free_breakpoint -ffffffff8345d008 D db_breakpoints_inserted -ffffffff8345e000 D db_ed_style -ffffffff8345f000 D db_examine_format -ffffffff8345f078 D db_print_format -ffffffff83460000 D db_history_size -ffffffff83460008 D db_history_curr -ffffffff83460010 D db_history_last -ffffffff83461000 D db_tab_stop_width -ffffffff83461004 D db_max_line -ffffffff83461008 D db_max_width -ffffffff8346100c D db_radix -ffffffff83462000 D db_lastsym -ffffffff83462008 D db_maxoff -ffffffff83463000 D db_vars -ffffffff83463090 D db_evars -ffffffff83464000 D db_watchpoints_inserted -ffffffff83464008 D db_next_free_watchpoint -ffffffff83465000 D db_log -ffffffff83466000 D audio_cd -ffffffff83466020 D audio_lock -ffffffff83467000 D midi_cd -ffffffff83468000 D rnd_cold -ffffffff83468004 D rnd_slowextract -ffffffff83468008 D rnd_timeout -ffffffff83468050 D rndlock -ffffffff83468060 D rndreinit_timeout -ffffffff834680a8 D rnd_task -ffffffff83469000 D video_cd -ffffffff8346a000 d rrip_table_analyze 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pool_allocator_multi_ni -ffffffff83489070 D pool_gc_tick -ffffffff834890b8 D pool_gc_task -ffffffff8348a000 D kprintf_mutex -ffffffff8348a010 D db_panic -ffffffff8348a014 D splassert_ctl -ffffffff8348a018 D v_putc -ffffffff8348a020 D printf_flags -ffffffff8348b000 D userconf_base -ffffffff8348b004 D userconf_maxdev -ffffffff8348b008 D userconf_totdev -ffffffff8348b00c D userconf_maxlocnames -ffffffff8348b010 D userconf_cnt -ffffffff8348b014 D userconf_lines -ffffffff8348b018 D userconf_histsz -ffffffff8348b020 D userconf_cmds -ffffffff8348c000 D ftlock -ffffffff8348d000 d ppollcollect.poll_errintvl -ffffffff8348e000 D ttydefchars -ffffffff8348e014 D ttclos -ffffffff8348e01b D ttopen -ffffffff8348e022 D ttybg -ffffffff8348e028 D ttyin -ffffffff8348e02e D ttyout -ffffffff8348e038 D ttylist_lock -ffffffff8348f000 D linesw -ffffffff8348f280 D nlinesw -ffffffff83490000 D pt_softc_lock -ffffffff83491000 d mbstat_boot_boot_cpumem -ffffffff834910c0 D mbstat -ffffffff834910d0 D mclsizes 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syncer_maxdelay -ffffffff83499004 D syncdelay -ffffffff8349a000 D dosdirtemplate -ffffffff8349b000 D ntfs_hashlock -ffffffff8349c000 D ntfs_toupper_lock -ffffffff8349d000 D art_table_gc_mtx -ffffffff8349d010 D art_table_gc_task -ffffffff8349d040 D art_node_gc_mtx -ffffffff8349d050 D art_node_gc_task -ffffffff8349e000 D bpf_bufsize -ffffffff8349e004 D bpf_maxbufsize -ffffffff8349f000 D ifg_head -ffffffff8349f010 D if_cloners_lock -ffffffff8349f020 D if_hooks_mtx -ffffffff8349f030 D if_input_task_locked -ffffffff8349f060 D netlock -ffffffff8349f070 D ifnetlist -ffffffff834a0000 D ifiq_maxlen_drop -ffffffff834a0004 D ifiq_maxlen_return -ffffffff834a1000 D etherbroadcastaddr -ffffffff834a1006 D ether_ipmulticast_min -ffffffff834a100c D ether_ipmulticast_max -ffffffff834a1012 D ether_ip6multicast_min -ffffffff834a1018 D ether_ip6multicast_max -ffffffff834a2000 D etherip_cloner -ffffffff834a2030 D etherip_list -ffffffff834a3000 D loop_cloner -ffffffff834a4000 D ifmedia_mtx -ffffffff834a5000 D ppp_compressors -ffffffff834a5020 D ppp_cloner -ffffffff834a6000 D ppp_pkt_init -ffffffff834a7000 D ppp_bsd_compress -ffffffff834a8000 D ppp_deflate -ffffffff834a8070 D ppp_deflate_draft -ffffffff834a9000 D tun_cloner -ffffffff834a9030 D tap_cloner -ffffffff834aa000 D bridgeintrq -ffffffff834aa038 D bridge_cloner -ffffffff834ab000 d veb_cloner -ffffffff834ab030 d vport_cloner -ffffffff834ac000 D vlan_tagh_lk -ffffffff834ac010 D vlan_cloner -ffffffff834ac040 D svlan_cloner -ffffffff834ad000 D pipex_list_mtx -ffffffff834ad010 D pipex_prune -ffffffff834ad018 D pipexoutq -ffffffff834ad050 d SHAPad2 -ffffffff834ae000 D rtmap_gc -ffffffff834ae018 D rt_rc -ffffffff834af000 D rt_labels -ffffffff834af010 D rtlabel_mtx -ffffffff834b0000 D enc_cloner -ffffffff834b1000 D gre_cloner -ffffffff834b1030 D gre_list -ffffffff834b1040 D mgre_cloner -ffffffff834b1070 D egre_cloner -ffffffff834b10a0 D nvgre_cloner -ffffffff834b10d0 D eoip_cloner -ffffffff834b2000 D trunk_cloner -ffffffff834b3000 d aggr_cloner -ffffffff834b4000 d tpmr_cloner -ffffffff834b5000 D mpe_cloner -ffffffff834b6000 D mpw_cloner -ffffffff834b7000 D mpip_cloner -ffffffff834b8000 d bpe_cloner -ffffffff834b8030 d bpe_lock -ffffffff834b9000 D vether_cloner -ffffffff834ba000 d rport_cloner -ffffffff834ba030 d rport_interfaces_lock -ffffffff834bb000 D pair_cloner -ffffffff834bc000 d vxlan_cloner -ffffffff834bc030 d vxlan_lock -ffffffff834bc040 d vxlan_teps -ffffffff834bd000 D underload_interval -ffffffff834bd010 D wg_cloner -ffffffff834be000 d stoeplitz_keyseed -ffffffff834bf000 D ieee80211_cache_size -ffffffff834c0000 D arpt_prune -ffffffff834c0004 D arpt_keep -ffffffff834c0008 D arpt_down -ffffffff834c0010 D arpinq -ffffffff834c0048 D arp_mtx -ffffffff834c0058 D arp_maxtries -ffffffff834c1000 D ipport_firstauto -ffffffff834c1004 D ipport_lastauto -ffffffff834c1008 D ipport_hifirstauto -ffffffff834c100c D ipport_hilastauto -ffffffff834c2000 D divert_sendspace -ffffffff834c2004 D divert_recvspace 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use_bclk_tbl +ffffffff82fde370 r turn_off_plls_tbl +ffffffff82fde610 r enter_baco_tbl +ffffffff82fde730 r exit_baco_tbl_iceland +ffffffff82fde870 r clean_baco_tbl_iceland +ffffffff82fde890 r exit_baco_tbl +ffffffff82fde9b0 r clean_baco_tbl +ffffffff82fdf000 r pre_baco_tbl +ffffffff82fdf090 r enter_baco_tbl +ffffffff82fdf2b0 r exit_baco_tbl +ffffffff82fdf520 r clean_baco_tbl +ffffffff82fe0000 r vega10_hwmgr_funcs +ffffffff82fe02f0 r channel_number +ffffffff82fe0320 r SMU7ThermalWithDelayPolicy +ffffffff82fe1000 r SEDiDtStallCtrlConfig_vega10 +ffffffff82fe1110 r SEDiDtStallPatternConfig_vega10 +ffffffff82fe12e0 r SEDiDtWeightConfig_Vega10 +ffffffff82fe13b0 r SEDiDtCtrl1Config_Vega10 +ffffffff82fe1440 r SEDiDtCtrl2Config_Vega10 +ffffffff82fe1510 r SEDiDtCtrl3Config_vega10 +ffffffff82fe1820 r SEDiDtTuningCtrlConfig_Vega10 +ffffffff82fe18b0 r SELCacConfig_Vega10 +ffffffff82fe1a40 r SEDiDtCtrl0Config_Vega10 +ffffffff82fe1d10 r AvfsPSMInitConfig_vega10 +ffffffff82fe1d90 r SEEDCStallPatternConfig_Vega10 +ffffffff82fe1ea0 r SEEDCStallDelayConfig_Vega10 +ffffffff82fe1f80 r SEEDCCtrlConfig_Vega10 +ffffffff82fe2040 r PSMSEEDCStallPatternConfig_Vega10 +ffffffff82fe20c0 r PSMSEEDCStallDelayConfig_Vega10 +ffffffff82fe21d0 r PSMSEEDCCtrlResetConfig_Vega10 +ffffffff82fe2290 r PSMSEEDCCtrlConfig_Vega10 +ffffffff82fe2350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff82fe23e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff82fe3000 R vega10_pptable_funcs +ffffffff82fe4000 r pre_baco_tbl +ffffffff82fe4090 r enter_baco_tbl +ffffffff82fe42b0 r exit_baco_tbl +ffffffff82fe4520 r clean_baco_tbl +ffffffff82fe5000 r vega12_hwmgr_funcs +ffffffff82fe52f0 r SMU7ThermalWithDelayPolicy +ffffffff82fe5340 r link_width +ffffffff82fe6000 R vega12_pptable_funcs +ffffffff82fe7000 r clean_baco_tbl +ffffffff82fe8000 r vega20_hwmgr_funcs +ffffffff82fe82f0 r SMU7ThermalWithDelayPolicy +ffffffff82fe8340 r link_width +ffffffff82fe9000 R vega20_pptable_funcs +ffffffff82fea000 R ci_smu_funcs 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arcturus_pwr_src_map +ffffffff83001480 r arcturus_workload_map +ffffffff830014d0 r smu11_thermal_policy +ffffffff83001528 r arcturus_i2c_algo +ffffffff83001538 r arcturus_i2c_control_quirks +ffffffff83001550 r arcturus_throttler_map +ffffffff83001570 r arcturus_message_map +ffffffff83001ff0 r arcturus_clk_map +ffffffff830020b0 r arcturus_feature_mask_map +ffffffff83003000 r cyan_skillfish_ppt_funcs +ffffffff83004000 r navi10_ppt_funcs +ffffffff830043f0 r smu11_thermal_policy +ffffffff83004448 r navi10_i2c_algo +ffffffff83004458 r navi10_i2c_control_quirks +ffffffff83004470 r navi1x_throttler_map +ffffffff83004490 r NoDbiPrbs7 +ffffffff83005490 r DbiPrbs7 +ffffffff83007000 r sienna_cichlid_ppt_funcs +ffffffff830073f0 r smu11_thermal_policy +ffffffff83007448 r sienna_cichlid_i2c_algo +ffffffff83007458 r sienna_cichlid_i2c_control_quirks +ffffffff83007470 r sienna_cichlid_throttler_map +ffffffff83008000 r smu_v11_0_irq_funcs +ffffffff83008010 r link_width +ffffffff83009000 r vangogh_ppt_funcs +ffffffff830093e8 r vangogh_throttler_map +ffffffff8300a000 r renoir_ppt_funcs +ffffffff8300a3e8 r renoir_throttler_map +ffffffff8300b000 r aldebaran_ppt_funcs +ffffffff8300b3f0 r aldebaran_clk_map +ffffffff8300b4b0 r aldebaran_table_map +ffffffff8300b530 r smu13_thermal_policy +ffffffff8300b588 r aldebaran_i2c_algo +ffffffff8300b598 r aldebaran_i2c_control_quirks +ffffffff8300b5b0 r aldebaran_throttler_map +ffffffff8300b5d0 r aldebaran_message_map +ffffffff8300c050 r aldebaran_feature_mask_map +ffffffff8300d000 R pmfw_decoded_link_speed +ffffffff8300d020 R pmfw_decoded_link_width +ffffffff8300d040 r smu_v13_0_irq_funcs +ffffffff8300e000 r smu_v13_0_0_ppt_funcs +ffffffff8300e3f0 r smu13_thermal_policy +ffffffff8300e448 r smu_v13_0_0_i2c_algo +ffffffff8300e458 r smu_v13_0_0_i2c_control_quirks +ffffffff8300e470 r smu_v13_0_0_throttler_map +ffffffff8300f000 r smu_v13_0_4_ppt_funcs +ffffffff83010000 r smu_v13_0_5_ppt_funcs +ffffffff83011000 r smu_v13_0_6_ppt_funcs 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+ffffffff8301d028 R fxp_cardbus_devices +ffffffff8301e000 R rl_cardbus_devices +ffffffff8301e028 R rl_cardbus_ca +ffffffff8301f000 R re_cardbus_ca +ffffffff8301f028 R re_cardbus_devices +ffffffff83020000 R ath_cardbus_ca +ffffffff83021000 R athn_cardbus_ca +ffffffff83021030 r athn_cardbus_devices +ffffffff83022000 R atw_cardbus_ca +ffffffff83022028 R atw_cardbus_devices +ffffffff83023000 R rtw_cardbus_ca +ffffffff83023028 R rtw_cardbus_devices +ffffffff83024000 R ral_cardbus_ca +ffffffff83024030 r ral_cardbus_devices +ffffffff83025000 R acx_cardbus_ca +ffffffff83025028 r acx_cardbus_devices +ffffffff83026000 R pgt_cardbus_ca +ffffffff83026028 R pgt_cardbus_devices +ffffffff83027000 R ehci_cardbus_ca +ffffffff83028000 R ohci_cardbus_ca +ffffffff83029000 R uhci_cardbus_ca +ffffffff8302a000 R malo_cardbus_ca +ffffffff8302a028 r malo_cardbus_devices +ffffffff8302b000 R bwi_cardbus_ca +ffffffff8302b030 r bwi_cardbus_devices +ffffffff8302c000 R pcmcia_ca +ffffffff8302d000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff8302e000 r pcmcia_cis_quirks +ffffffff8302f000 R ep_pcmcia_ca +ffffffff83030000 R ne_pcmcia_ca +ffffffff83030030 R ne2000devs +ffffffff83032000 R aic_pcmcia_ca +ffffffff83033000 R com_pcmcia_ca +ffffffff83034000 R wdc_pcmcia_ca +ffffffff83035000 R sm_pcmcia_ca +ffffffff83036000 R xe_pcmcia_ca +ffffffff83037000 R wi_pcmcia_ca +ffffffff83037030 r wi_pcmcia_products +ffffffff83038000 R malo_pcmcia_ca +ffffffff83039000 R an_pcmcia_ca +ffffffff8303a000 R pcib_ca +ffffffff8303b000 R amdpcib_ca +ffffffff8303b028 R amdpcib_devices +ffffffff8303c000 R tcpcib_ca +ffffffff8303c028 R tcpcib_devices +ffffffff8303d000 R aapic_ca +ffffffff8303e000 R hme_pci_ca +ffffffff8303e028 r hme_promhdr +ffffffff8303e02a r hme_promdat +ffffffff8303f000 R isa_ca +ffffffff83040000 R isadma_ca +ffffffff83041000 R fdc_ca +ffffffff83042000 R fd_ca +ffffffff83043000 R com_isa_ca +ffffffff83044000 R pckbc_isa_ca +ffffffff83045000 R vga_isa_ca +ffffffff83046000 R wdc_isa_ca +ffffffff83047000 R mpu_midi_hw_if +ffffffff83048000 R mpu_isa_ca +ffffffff83049000 R pcppi_ca +ffffffff8304a000 R spkr_ca +ffffffff8304a030 r pitchtab +ffffffff8304b000 R lpt_isa_ca +ffffffff8304c000 R wbsio_ca +ffffffff8304d000 R schsio_ca +ffffffff8304e000 R lm_isa_ca +ffffffff8304e028 R lm_wbsio_ca +ffffffff8304f000 R it_sensors +ffffffff8304f110 R it_vrfact +ffffffff8304f140 R it_fan_regs +ffffffff8304f160 R it_fan_ext_regs +ffffffff8304f178 R it_ca +ffffffff83050000 R abitkv_sensors +ffffffff83050200 R abitaa_sensors +ffffffff83050480 R abitav_sensors +ffffffff83050700 R abitas_sensors +ffffffff83050980 R abitax_sensors +ffffffff83050bc0 R abitm4_sensors +ffffffff83050e80 R abitan_sensors +ffffffff83051120 R abital_sensors +ffffffff830513a0 R abitaw_sensors +ffffffff83051700 R abitni_sensors +ffffffff830519a0 R abitat_sensors +ffffffff83051cc0 R abitan2_sensors +ffffffff83051f60 R abitab_sensors +ffffffff83052220 R abitan3_sensors +ffffffff83052500 R abitaw2_sensors +ffffffff83052860 R abitat2_sensors +ffffffff83052b60 R abitab2_sensors +ffffffff83052ea0 R abitin_sensors +ffffffff830531e0 R uguru_ca +ffffffff83054000 R aps_ca +ffffffff83055000 R wsdisplay_emul_ca +ffffffff83055030 r charClass +ffffffff83056000 r usl_syncops +ffffffff83057000 R wsevent_filtops +ffffffff83058000 R wskbd_ca +ffffffff83059000 r latin1_to_upper +ffffffff8305a000 R wsmouse_ca +ffffffff8305b000 R cyrillic_to_koi8 +ffffffff8305b060 R unicode_to_latin2 +ffffffff8305b0e0 R unicode_to_latin7 +ffffffff8305c000 R wsemul_vt100_ops +ffffffff8305d000 r decspcgr2uni +ffffffff8305d100 r dectech2uni +ffffffff8305d200 r nrctable +ffffffff8305e000 r vt100_fkeys +ffffffff8305e0c0 r vt100_pfkeys +ffffffff8305e0e0 r vt100_numpad +ffffffff8305f000 R pckbd_ca +ffffffff8305f028 R pckbd_accessops +ffffffff8305f040 R pckbd_consops +ffffffff8305f060 R pckbd_keymapdata +ffffffff8305f070 R pckbd_xtbl2 +ffffffff8305f100 R pckbd_xtbl2_ext +ffffffff83060000 r pckbd_keydesc_us +ffffffff83060250 r pckbd_keydesc_de +ffffffff830602f0 r pckbd_keydesc_de_nodead +ffffffff83060310 r pckbd_keydesc_fr +ffffffff830603d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff83060510 r pckbd_keydesc_dk +ffffffff830605a0 r pckbd_keydesc_dk_nodead +ffffffff830605b0 r pckbd_keydesc_it +ffffffff83060640 r pckbd_keydesc_uk +ffffffff830606e0 r pckbd_keydesc_jp +ffffffff83060750 r pckbd_keydesc_sv +ffffffff83060780 r pckbd_keydesc_sv_nodead +ffffffff83060790 r pckbd_keydesc_no +ffffffff830607c0 r pckbd_keydesc_no_nodead +ffffffff830607d0 r pckbd_keydesc_us_declk +ffffffff83060860 r pckbd_keydesc_us_dvorak +ffffffff83060900 r pckbd_keydesc_us_colemak +ffffffff83060948 r pckbd_keydesc_swapctrlcaps +ffffffff83060960 r pckbd_keydesc_iopener +ffffffff830609b0 r pckbd_keydesc_es +ffffffff83060a50 r pckbd_keydesc_be +ffffffff83060b10 r pckbd_keydesc_ru +ffffffff83060c80 r pckbd_keydesc_ua +ffffffff83060e10 r pckbd_keydesc_sg +ffffffff83060ec0 r pckbd_keydesc_sg_nodead +ffffffff83060ee0 r pckbd_keydesc_sf +ffffffff83060f00 r pckbd_keydesc_pt +ffffffff83060f90 r pckbd_keydesc_lt +ffffffff83061070 r pckbd_keydesc_la +ffffffff83061100 r pckbd_keydesc_br +ffffffff83061180 r pckbd_keydesc_tr +ffffffff83061230 r pckbd_keydesc_tr_nodead +ffffffff83061250 r pckbd_keydesc_pl +ffffffff830612b0 r pckbd_keydesc_hu +ffffffff830613c0 r pckbd_keydesc_si +ffffffff830614d0 r pckbd_keydesc_cf +ffffffff830615a0 r pckbd_keydesc_cf_nodead +ffffffff830615c0 r pckbd_keydesc_lv +ffffffff83061640 r pckbd_keydesc_nl +ffffffff83061720 r pckbd_keydesc_nl_nodead +ffffffff83061740 r pckbd_keydesc_is +ffffffff830617cc r pckbd_keydesc_is_nodead +ffffffff830617e0 r pckbd_keydesc_ee +ffffffff83061890 r pckbd_keydesc_ee_nodead +ffffffff830618b0 R pckbd_keydesctab +ffffffff83062000 R pms_ca +ffffffff83062028 R pms_accessops +ffffffff83062040 R pms_sec_accessops +ffffffff83062060 R pms_protocols +ffffffff830621e0 r alps_models +ffffffff83063000 R skgpio_led_offset +ffffffff83063008 R skgpio_ca +ffffffff83064000 R hidkbd_trtab +ffffffff83064100 r apple_fn_trans +ffffffff83064120 r apple_tb_trans +ffffffff83064140 r apple_mba_trans +ffffffff83065000 r hidcc_attach_wskbd.accessops +ffffffff83065020 r hidcc_keysyms +ffffffff83066000 R usb_ca +ffffffff83067000 R usb_known_products +ffffffff83073060 R usb_known_vendors +ffffffff83075890 R usbd_error_strs +ffffffff83076000 R usb_quirks +ffffffff830763e4 R usb_dev_quirks +ffffffff830763ec R usbd_no_quirk +ffffffff83077000 R uhub_ca +ffffffff83077028 R uhub_uhub_ca +ffffffff83078000 R uaudio_ca +ffffffff83078028 R uaudio_hw_if +ffffffff830780e0 R uaudio_rates +ffffffff83078120 r uaudio_clkname.names +ffffffff83078140 r uaudio_feature_addent.features +ffffffff83079000 R uvideo_ca +ffffffff83079028 R uvideo_hw_if +ffffffff83079100 R uvideo_devs +ffffffff8307a000 r utvfu_select_norm.pal +ffffffff8307a040 r utvfu_select_norm.ntsc +ffffffff8307a080 r utvfu_setup_capture.setup +ffffffff8307a180 r utvfu_audio_start_chip.setup +ffffffff8307a1c8 r utvfu_audio_stop_chip.setup +ffffffff8307a1d8 R utvfu_ca +ffffffff8307a200 R utvfu_vid_hw_if +ffffffff8307a2d0 R utvfu_au_hw_if +ffffffff8307b000 R udl_ca +ffffffff8307b030 r udl_devs +ffffffff8307b0b0 r udl_modes +ffffffff8307c000 R umidi_hw_if +ffffffff8307c030 R umidi_ca +ffffffff8307c060 r umidi_evlen +ffffffff8307c080 r packet_length +ffffffff8307d000 r quirk_name +ffffffff8307e000 R ucom_ca +ffffffff8307f000 R ugen_ca +ffffffff8307f028 R ugenread_intr_filtops +ffffffff8307f058 R ugenread_isoc_filtops +ffffffff83080000 R uhidev_ca +ffffffff83080030 r uhid_graphire_report_descr +ffffffff830800b0 r uhid_graphire3_4x5_report_descr +ffffffff83080160 r uhid_xb360gp_report_descr +ffffffff83080210 r uhid_xbonegp_report_descr +ffffffff83081000 R uhid_ca +ffffffff83081028 R uhidread_filtops +ffffffff83082000 R fido_ca +ffffffff83083000 R ujoy_ca +ffffffff83084000 r ukbd_keydesc_us +ffffffff830842a0 r ukbd_keydesc_de +ffffffff83084350 r ukbd_keydesc_de_nodead +ffffffff83084370 r ukbd_keydesc_fr +ffffffff83084430 r ukbd_keydesc_fr_apple +ffffffff83084570 r ukbd_keydesc_fr_dvorak_bepo +ffffffff830846b0 r ukbd_keydesc_dk +ffffffff83084750 r ukbd_keydesc_dk_nodead +ffffffff83084760 r ukbd_keydesc_it +ffffffff83084800 r ukbd_keydesc_uk +ffffffff830848b0 r ukbd_keydesc_jp +ffffffff83084920 r ukbd_keydesc_sv +ffffffff83084950 r ukbd_keydesc_sv_nodead +ffffffff83084960 r ukbd_keydesc_no +ffffffff83084990 r ukbd_keydesc_no_nodead +ffffffff830849a0 r ukbd_keydesc_us_dvorak +ffffffff83084a40 r ukbd_keydesc_us_colemak +ffffffff83084a88 r ukbd_keydesc_swapctrlcaps +ffffffff83084aa0 r ukbd_keydesc_iopener +ffffffff83084af0 r ukbd_keydesc_es +ffffffff83084b90 r ukbd_keydesc_be +ffffffff83084c50 r ukbd_keydesc_ru +ffffffff83084dc0 r ukbd_keydesc_ua +ffffffff83084f60 r ukbd_keydesc_sg +ffffffff83085020 r ukbd_keydesc_sg_nodead +ffffffff83085040 r ukbd_keydesc_sf +ffffffff83085060 r ukbd_keydesc_pt +ffffffff830850f0 r ukbd_keydesc_pt_apple +ffffffff83085110 r ukbd_keydesc_lt +ffffffff830851f0 r ukbd_keydesc_la +ffffffff83085290 r ukbd_keydesc_br +ffffffff83085320 r ukbd_keydesc_tr +ffffffff830853e0 r ukbd_keydesc_tr_nodead +ffffffff83085400 r ukbd_keydesc_pl +ffffffff83085460 r ukbd_keydesc_hu +ffffffff83085570 r ukbd_keydesc_si +ffffffff83085690 r ukbd_keydesc_cf +ffffffff83085770 r ukbd_keydesc_cf_nodead +ffffffff83085790 r ukbd_keydesc_lv +ffffffff83085810 r ukbd_keydesc_nl +ffffffff830858f0 r ukbd_keydesc_nl_nodead +ffffffff83085910 r ukbd_keydesc_is +ffffffff830859a4 r ukbd_keydesc_is_nodead +ffffffff830859b0 r ukbd_keydesc_ee +ffffffff83085a60 r ukbd_keydesc_ee_nodead +ffffffff83085a80 R ukbd_keydesctab +ffffffff83086000 R ukbd_countrylayout +ffffffff83086090 R ukbd_consops +ffffffff830860b0 R ukbd_accessops +ffffffff830860c8 R ukbd_ca +ffffffff830860f0 R ukbd_never_console +ffffffff83087000 R ums_accessops +ffffffff83087018 R ums_ca +ffffffff83088000 R umt_accessops +ffffffff83088018 R umt_ca +ffffffff83089000 R uts_devs +ffffffff83089010 R uts_accessops +ffffffff83089028 R uts_ca +ffffffff8308a000 R ubcmtp_accessops +ffffffff8308a018 R ubcmtp_ca +ffffffff8308a040 r ubcmtp_devices +ffffffff8308b000 R ucycom_methods +ffffffff8308b040 R ucycom_devs +ffffffff8308b050 R ucycom_ca +ffffffff8308c000 R uslhcom_methods +ffffffff8308c040 R uslhcom_ca +ffffffff8308c068 r uslhcom_devs +ffffffff8308d000 R ulpt_ca +ffffffff8308e000 R umass_ca +ffffffff8308e028 R umass_bbb_methods +ffffffff8308e040 R umass_cbi_methods +ffffffff8308f000 R umass_quirks +ffffffff83090000 R umass_scsi_switch +ffffffff83091000 R uthum_devs +ffffffff83091008 R uthum_ca +ffffffff83091030 r uthum_sensor_type_s +ffffffff83092000 R ugold_devs +ffffffff83092018 R ugold_ca +ffffffff83093000 R utrh_devs +ffffffff83093008 R utrh_ca +ffffffff83094000 R uoakrh_devs +ffffffff83094008 R uoakrh_ca +ffffffff83094030 R uoakrh_methods +ffffffff83095000 R uoaklux_devs +ffffffff83095008 R uoaklux_ca +ffffffff83095030 R uoaklux_methods +ffffffff83096000 R uoakv_devs +ffffffff83096008 R uoakv_ca +ffffffff83096030 R uoakv_methods +ffffffff83097000 R uonerng_ca +ffffffff83098000 R urng_ca +ffffffff83098030 r urng_devs +ffffffff83099000 R udcf_ca +ffffffff83099028 r udcf_devs +ffffffff8309a000 R umbg_ca +ffffffff8309b000 R uvisor_methods +ffffffff8309b040 R uvisor_ca +ffffffff8309b070 r uvisor_devs +ffffffff8309c000 R udsbr_hw_if +ffffffff8309c028 R udsbr_ca +ffffffff8309d000 R utwitch_devs +ffffffff8309d008 R utwitch_ca +ffffffff8309e000 R aue_devs +ffffffff8309e1b0 R aue_ca +ffffffff8309f000 R axe_devs +ffffffff8309f0d0 R axe_ca +ffffffff830a0000 R axen_devs +ffffffff830a0020 R axen_ca +ffffffff830a1000 R smsc_ca +ffffffff830a1030 r smsc_devs +ffffffff830a2000 R cue_ca +ffffffff830a3000 R kue_devs +ffffffff830a3088 R kue_ca +ffffffff830a4000 R cdce_devs +ffffffff830a4048 R cdce_ca +ffffffff830a5000 R urndis_ca +ffffffff830a5030 R urndis_class +ffffffff830a6000 R mos_devs +ffffffff830a6018 R mos_ca +ffffffff830a7000 R mue_devs +ffffffff830a7020 R mue_ca +ffffffff830a8000 R udav_ca +ffffffff830a8030 r udav_devs +ffffffff830a9000 R upl_ca +ffffffff830aa000 R ugl_ca +ffffffff830ab000 R url_ca +ffffffff830ab030 r url_devs +ffffffff830ac000 R ure_devs +ffffffff830ac0e8 R ure_ca +ffffffff830ad000 R uaq_devs +ffffffff830ad018 R uaq_ca +ffffffff830ae000 R umodem_methods +ffffffff830ae040 R umodem_ca +ffffffff830af000 R uftdi_methods +ffffffff830af040 R uftdi_ca +ffffffff830af070 r uftdi_devs +ffffffff830b0000 R uplcom_methods +ffffffff830b0040 R uplcom_ca +ffffffff830b0070 r uplcom_devs +ffffffff830b1000 R umct_methods +ffffffff830b1040 R umct_ca +ffffffff830b1070 r umct_devs +ffffffff830b2000 R uvscom_methods +ffffffff830b2040 R uvscom_ca +ffffffff830b2070 r uvscom_devs +ffffffff830b3000 R ubsa_methods +ffffffff830b3040 R ubsa_devs +ffffffff830b3060 R ubsa_ca +ffffffff830b4000 R ukspan_ca +ffffffff830b4028 r ukspan_devs +ffffffff830b4030 r ukspan_methods +ffffffff830b5000 R uslcom_methods +ffffffff830b5040 R uslcom_ca +ffffffff830b5070 r uslcom_devs +ffffffff830b6000 R uark_methods +ffffffff830b6040 R uark_ca +ffffffff830b6068 r uark_devs +ffffffff830b7000 R moscom_methods +ffffffff830b7040 R moscom_ca +ffffffff830b7068 r moscom_devs +ffffffff830b8000 R umcs_methods +ffffffff830b8040 R umcs_devs +ffffffff830b8050 R umcs_ca +ffffffff830b9000 R uscom_methods +ffffffff830b9040 R uscom_ca +ffffffff830b9068 r uscom_devs +ffffffff830ba000 R ucrcom_methods +ffffffff830ba040 R ucrcom_ca +ffffffff830bb000 R uxrcom_methods +ffffffff830bb040 R uxrcom_ca +ffffffff830bb068 r uxrcom_devs +ffffffff830bc000 R uipaq_methods +ffffffff830bc040 R uipaq_ca +ffffffff830bc070 r uipaq_devs +ffffffff830bd000 R umsm_methods +ffffffff830bd040 R umsm_ca +ffffffff830bd070 r umsm_devs +ffffffff830be000 R uchcom_methods +ffffffff830be040 R uchcom_ca +ffffffff830be070 r uchcom_devs +ffffffff830be090 r dividers +ffffffff830bf000 R uticom_methods +ffffffff830bf040 R uticom_ca +ffffffff830bf070 r uticom_devs +ffffffff830c0000 R wi_usb_devs +ffffffff830c00f0 R wi_usb_ca +ffffffff830c1000 R atu_ca +ffffffff830c2000 R ural_ca +ffffffff830c2030 r ural_devs +ffffffff830c20a0 r ural_rf2522_r2 +ffffffff830c20e0 r ural_rf2524_r2 +ffffffff830c2120 r ural_rf2525_hi_r2 +ffffffff830c2160 r ural_rf2525_r2 +ffffffff830c21a0 r ural_rf2525e_r2 +ffffffff830c21e0 r ural_rf2526_hi_r2 +ffffffff830c2220 r ural_rf2526_r2 +ffffffff830c2260 r ural_def_bbp +ffffffff830c22a0 r ural_def_mac +ffffffff830c3000 R rum_ca +ffffffff830c3030 r rum_devs +ffffffff830c3110 r rum_rf5225 +ffffffff830c3460 r rum_rf5226 +ffffffff830c37b0 r rum_def_bbp +ffffffff830c37f0 r rum_def_mac +ffffffff830c4000 R run_ca +ffffffff830c4030 r run_devs +ffffffff830c4430 r rt2860_rf2850 +ffffffff830c4860 r rt2860_rates +ffffffff830c4920 r rt5592_freqs_40mhz +ffffffff830c4a60 r rt5592_freqs_20mhz +ffffffff830c4ba0 r rt5592_2ghz_def_rf +ffffffff830c4be0 r rt5592_chan_5ghz +ffffffff830c4e30 r rt5592_def_bbp +ffffffff830c4e70 r rt5592_bbp_r196 +ffffffff830c4ed0 r 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+ffffffff8345cd50 D dt_static_smr_thread +ffffffff8345cdc0 D dt_static_refcnt_none +ffffffff8345ce30 D dt_static_refcnt_ethmulti +ffffffff8345cea0 D dt_static_refcnt_ifaddr +ffffffff8345cf10 D dt_static_refcnt_ifmaddr +ffffffff8345cf80 D dt_static_refcnt_inpcb +ffffffff8345cff0 D dt_static_refcnt_rtentry +ffffffff8345d060 D dt_static_refcnt_syncache +ffffffff8345d0d0 D dt_static_refcnt_tdb +ffffffff8345e000 D db_next_free_breakpoint +ffffffff8345e008 D db_breakpoints_inserted +ffffffff8345f000 D db_ed_style +ffffffff83460000 D db_examine_format +ffffffff83460078 D db_print_format +ffffffff83461000 D db_history_size +ffffffff83461008 D db_history_curr +ffffffff83461010 D db_history_last +ffffffff83462000 D db_tab_stop_width +ffffffff83462004 D db_max_line +ffffffff83462008 D db_max_width +ffffffff8346200c D db_radix +ffffffff83463000 D db_lastsym +ffffffff83463008 D db_maxoff +ffffffff83464000 D db_vars +ffffffff83464090 D db_evars +ffffffff83465000 D db_watchpoints_inserted +ffffffff83465008 D db_next_free_watchpoint +ffffffff83466000 D db_log +ffffffff83467000 D audio_cd +ffffffff83467020 D audio_lock +ffffffff83468000 D midi_cd +ffffffff83469000 D rnd_cold +ffffffff83469004 D rnd_slowextract +ffffffff83469008 D rnd_timeout +ffffffff83469050 D rndlock +ffffffff83469060 D rndreinit_timeout +ffffffff834690a8 D rnd_task +ffffffff8346a000 D video_cd +ffffffff8346b000 d rrip_table_analyze +ffffffff8346b0e0 d rrip_table_getname +ffffffff8346b1e0 d rrip_table_getsymname +ffffffff8346b280 d rrip_table_extref +ffffffff8346c000 D nexecs +ffffffff8346d000 D elf_note_names +ffffffff8346e000 D ncpus +ffffffff8346e004 D ncpusfound +ffffffff8346f000 D acct_lock +ffffffff8346f010 D acctsuspend +ffffffff8346f014 D acctresume +ffffffff8346f018 D acctrate +ffffffff83470000 D bufqs_mtx +ffffffff83471000 D ticks +ffffffff83472000 D fhdlk +ffffffff83473000 D kqueue_klist_lock +ffffffff83473010 D kqueue_ps_list_lock +ffffffff83473020 D kq_timeoutmax +ffffffff83474000 D stackgap_random +ffffffff83475000 D deadproc_mutex +ffffffff83476000 D nprocesses +ffffffff83476004 D nthreads +ffffffff83476008 D fork_tfmrate +ffffffff83477000 D kthread_q +ffffffff83478000 D nkmempages +ffffffff83478008 D malloc_mtx +ffffffff83478020 D memname +ffffffff834784b0 D sysctl_kmemlock +ffffffff834784c0 D malloc_errintvl +ffffffff83479000 D maxdmap +ffffffff83479008 D maxsmap +ffffffff83479010 D rlimit_lock +ffffffff8347a000 D sched_cost_priority +ffffffff8347a004 D sched_cost_runnable +ffffffff8347a008 D sched_cost_resident +ffffffff8347b000 D intrmap_lock +ffffffff8347c000 D nosuidcoredump +ffffffff8347c008 D sigio_lock +ffffffff8347d000 D smr_lock +ffffffff8347d010 D smr_logintvl +ffffffff8347e000 D startuphook_list +ffffffff8347f000 D sysctl_lock +ffffffff8347f010 D sysctl_disklock +ffffffff8347f020 d openbsd +ffffffff8347f024 d arg_max +ffffffff8347f028 d posix_version +ffffffff8347f02c d ngroups_max +ffffffff8347f030 d int_one +ffffffff8347f034 d maxpartitions +ffffffff8347f038 d raw_part +ffffffff8347f03c D allowpowerdown +ffffffff8347f040 D hw_power +ffffffff8347f044 d byte_order +ffffffff83480000 d thrsleep_queue +ffffffff83480010 d thrsleep_lock +ffffffff83481000 D tc_lock +ffffffff83481010 D windup_mtx +ffffffff83481020 d dummy_timecounter +ffffffff83481070 D timecounter +ffffffff83481078 d timehands +ffffffff83481080 d th0 +ffffffff83481118 d th1 +ffffffff83482000 D itimer_mtx +ffffffff83482010 D ratecheck_mtx +ffffffff83482020 D ppsratecheck_mtx +ffffffff83482030 D resettodr_to +ffffffff83482078 D resettodr_task +ffffffff83483000 D timeout_mutex +ffffffff83484000 D wdog_auto +ffffffff83485000 D taskq_sys +ffffffff83485050 D taskq_sys_mp +ffffffff83486000 d update_loadavg.to +ffffffff83486048 D ccpu +ffffffff83486050 d schedcpu.to +ffffffff83486098 D perflevel +ffffffff8348609c D perfpolicy +ffffffff834860a0 D setperf_to +ffffffff83487000 D autoconf_attdet_mtx +ffffffff83487010 D msgs +ffffffff83488000 d evcount_list +ffffffff83488010 d evcount_percpu_init_list +ffffffff83489000 D syslogf_rwlock +ffffffff83489010 D log_mtx +ffffffff83489020 D log_kq_mtx +ffffffff83489030 D logstash_in +ffffffff83489038 D logstash_out +ffffffff83489040 D logstash_rwlock +ffffffff8348a000 D pool_head +ffffffff8348a010 D pool_lock +ffffffff8348a020 D pool_debug +ffffffff8348a028 D pool_allocator_single +ffffffff8348a040 D pool_allocator_multi +ffffffff8348a058 D pool_allocator_multi_ni +ffffffff8348a070 D pool_gc_tick +ffffffff8348a0b8 D pool_gc_task +ffffffff8348b000 D kprintf_mutex +ffffffff8348b010 D db_panic +ffffffff8348b014 D splassert_ctl +ffffffff8348b018 D v_putc +ffffffff8348b020 D printf_flags +ffffffff8348c000 D userconf_base +ffffffff8348c004 D userconf_maxdev +ffffffff8348c008 D userconf_totdev +ffffffff8348c00c D userconf_maxlocnames +ffffffff8348c010 D userconf_cnt +ffffffff8348c014 D userconf_lines +ffffffff8348c018 D userconf_histsz +ffffffff8348c020 D userconf_cmds +ffffffff8348d000 D ftlock +ffffffff8348e000 d ppollcollect.poll_errintvl +ffffffff8348f000 D ttydefchars +ffffffff8348f014 D ttclos +ffffffff8348f01b D ttopen +ffffffff8348f022 D ttybg +ffffffff8348f028 D ttyin +ffffffff8348f02e D ttyout +ffffffff8348f038 D ttylist_lock +ffffffff83490000 D linesw +ffffffff83490280 D nlinesw +ffffffff83491000 D pt_softc_lock +ffffffff83492000 d mbstat_boot_boot_cpumem +ffffffff834920c0 D mbstat +ffffffff834920d0 D mclsizes +ffffffff834920f0 D m_extref_mtx +ffffffff83492100 D m_pool_allocator +ffffffff83492120 D m_types +ffffffff83493000 D somaxconn +ffffffff83493004 D sominconn +ffffffff83493008 D sosplice_lock +ffffffff83494000 D sb_max +ffffffff83495000 D unp_df_lock +ffffffff83495010 D unp_gc_lock +ffffffff83495020 D unp_rights_mtx +ffffffff83495030 D unp_ino_mtx +ffffffff83495040 D unp_gc_task +ffffffff83495070 D unpst_sendspace +ffffffff83495074 D unpst_recvspace +ffffffff83495078 D unpsq_sendspace +ffffffff8349507c D unpsq_recvspace +ffffffff83495080 D unpdg_sendspace +ffffffff83495084 D unpdg_recvspace +ffffffff83496000 D doingcache +ffffffff83497000 D maxvfsconf +ffffffff83497010 d vfsconflist +ffffffff83498000 D lockf_lock +ffffffff83498010 D maxlocksperuid +ffffffff83499000 D iftovt_tab +ffffffff83499040 D vttoif_tab +ffffffff83499064 D suid_clear +ffffffff83499068 D vnode_mtx +ffffffff83499078 D vfs_stall_lock +ffffffff83499090 D vtypes +ffffffff834990e0 D vtags +ffffffff8349a000 D syncer_maxdelay +ffffffff8349a004 D syncdelay +ffffffff8349b000 D dosdirtemplate +ffffffff8349c000 D ntfs_hashlock +ffffffff8349d000 D ntfs_toupper_lock +ffffffff8349e000 D art_table_gc_mtx +ffffffff8349e010 D art_table_gc_task +ffffffff8349e040 D art_node_gc_mtx +ffffffff8349e050 D art_node_gc_task +ffffffff8349f000 D bpf_bufsize +ffffffff8349f004 D bpf_maxbufsize +ffffffff834a0000 D ifg_head +ffffffff834a0010 D if_cloners_lock +ffffffff834a0020 D if_hooks_mtx +ffffffff834a0030 D if_input_task_locked +ffffffff834a0060 D netlock +ffffffff834a0070 D ifnetlist +ffffffff834a1000 D ifiq_maxlen_drop +ffffffff834a1004 D ifiq_maxlen_return +ffffffff834a2000 D etherbroadcastaddr +ffffffff834a2006 D ether_ipmulticast_min +ffffffff834a200c D ether_ipmulticast_max +ffffffff834a2012 D ether_ip6multicast_min +ffffffff834a2018 D ether_ip6multicast_max +ffffffff834a3000 D etherip_cloner +ffffffff834a3030 D etherip_list +ffffffff834a4000 D loop_cloner +ffffffff834a5000 D ifmedia_mtx +ffffffff834a6000 D ppp_compressors +ffffffff834a6020 D ppp_cloner +ffffffff834a7000 D ppp_pkt_init +ffffffff834a8000 D ppp_bsd_compress +ffffffff834a9000 D ppp_deflate +ffffffff834a9070 D ppp_deflate_draft +ffffffff834aa000 D tun_cloner +ffffffff834aa030 D tap_cloner +ffffffff834ab000 D bridgeintrq +ffffffff834ab038 D bridge_cloner +ffffffff834ac000 d veb_cloner +ffffffff834ac030 d vport_cloner +ffffffff834ad000 D vlan_tagh_lk +ffffffff834ad010 D vlan_cloner +ffffffff834ad040 D svlan_cloner +ffffffff834ae000 D pipex_list_mtx +ffffffff834ae010 D pipex_prune +ffffffff834ae018 D pipexoutq +ffffffff834ae050 d SHAPad2 +ffffffff834af000 D rtmap_gc +ffffffff834af018 D rt_rc +ffffffff834b0000 D rt_labels +ffffffff834b0010 D rtlabel_mtx +ffffffff834b1000 D enc_cloner +ffffffff834b2000 D gre_cloner +ffffffff834b2030 D gre_list +ffffffff834b2040 D mgre_cloner +ffffffff834b2070 D egre_cloner +ffffffff834b20a0 D nvgre_cloner +ffffffff834b20d0 D eoip_cloner +ffffffff834b3000 D trunk_cloner +ffffffff834b4000 d aggr_cloner +ffffffff834b5000 d tpmr_cloner +ffffffff834b6000 D mpe_cloner +ffffffff834b7000 D mpw_cloner +ffffffff834b8000 D mpip_cloner +ffffffff834b9000 d bpe_cloner +ffffffff834b9030 d bpe_lock +ffffffff834ba000 D vether_cloner +ffffffff834bb000 d rport_cloner +ffffffff834bb030 d rport_interfaces_lock +ffffffff834bc000 D pair_cloner +ffffffff834bd000 d vxlan_cloner +ffffffff834bd030 d vxlan_lock +ffffffff834bd040 d vxlan_teps +ffffffff834be000 D underload_interval +ffffffff834be010 D wg_cloner +ffffffff834bf000 d stoeplitz_keyseed +ffffffff834c0000 D ieee80211_cache_size +ffffffff834c1000 D arpt_prune +ffffffff834c1004 D arpt_keep +ffffffff834c1008 D arpt_down +ffffffff834c1010 D arpinq +ffffffff834c1048 D arp_mtx +ffffffff834c1058 D arp_maxtries +ffffffff834c2000 D ipport_firstauto +ffffffff834c2004 D ipport_lastauto +ffffffff834c2008 D ipport_hifirstauto +ffffffff834c200c D ipport_hilastauto +ffffffff834c3000 D divert_sendspace +ffffffff834c3004 D divert_recvspace +ffffffff834c3008 D divbhashsize +ffffffff834c4000 D icmptstamprepl +ffffffff834c4004 D icmperrppslim +ffffffff834c4008 D icmp_redirtimeout +ffffffff834c5000 D ip_sendredirects +ffffffff834c5004 D ip_defttl +ffffffff834c5008 D ip_mtudisc +ffffffff834c500c D ip_mtudisc_timeout +ffffffff834c5010 D ipq_mutex +ffffffff834c5020 D ip_maxqueue +ffffffff834c5028 D ipintrq +ffffffff834c5060 d ipsend_task +ffffffff834c5090 d ipsendraw_task +ffffffff834c6000 D ip_mrtproto +ffffffff834c6004 d sin +ffffffff834c7000 D rip_sendspace +ffffffff834c7008 D rip_recvspace +ffffffff834c8000 D tcp_debug_mtx +ffffffff834c9000 D tcprexmtthresh +ffffffff834c9004 D tcptv_keep_init +ffffffff834c9008 D tcp_rst_ppslim +ffffffff834c900c D tcp_ackdrop_ppslim +ffffffff834c9010 D tcp_syn_hash_size +ffffffff834c9014 D tcp_syn_cache_limit +ffffffff834c9018 D tcp_syn_bucket_limit +ffffffff834c901c D tcp_syn_use_limit +ffffffff834c9020 D syn_cache_mtx +ffffffff834ca000 D tcp_outflags +ffffffff834cb000 D tcp_timer_mtx +ffffffff834cb010 D tcp_mssdflt +ffffffff834cb014 D tcp_rttdflt +ffffffff834cb018 D tcp_do_rfc1323 +ffffffff834cb01c D tcp_do_sack +ffffffff834cb020 D tcp_do_rfc3390 +ffffffff834cb024 D tcp_do_tso +ffffffff834cb028 D tcp_reass_limit +ffffffff834cb02c D tcp_sackhole_limit +ffffffff834cc000 D tcp_backoff +ffffffff834cc034 D tcp_totbackoff +ffffffff834cd000 D tcp_sendspace +ffffffff834cd004 D tcp_recvspace +ffffffff834cd008 D tcp_autorcvbuf_inc +ffffffff834ce000 D udpcksum +ffffffff834ce004 D udp_sendspace +ffffffff834ce008 D udp_recvspace +ffffffff834cf000 D ipsec_flows_mtx +ffffffff834cf010 D ipsec_ids_idle +ffffffff834cf014 D ipsec_ids_next_flow +ffffffff834cf018 D ipsec_policy_head +ffffffff834cf028 D ipsp_ids_gc_timeout +ffffffff834cf070 D tdb_sadb_mtx +ffffffff834cf080 d tdb_hashmask +ffffffff834d0000 D ipo_tdb_mtx +ffffffff834d0010 D ipsec_acquire_mtx +ffffffff834d0020 D ipsec_acquire_head +ffffffff834d1000 D ipsec_keep_invalid +ffffffff834d1004 D ipsec_require_pfs +ffffffff834d1008 D ipsec_soft_timeout +ffffffff834d100c D ipsec_exp_timeout +ffffffff834d1010 D ipsec_soft_first_use +ffffffff834d1014 D ipsec_exp_first_use +ffffffff834d1018 D ipsec_expire_acquire +ffffffff834d101c D esp_enable +ffffffff834d1020 D ah_enable +ffffffff834d2000 D udpencap_enable +ffffffff834d2004 D udpencap_port +ffffffff834d3000 D carp_vh_rc +ffffffff834d3020 D carp_sc_rc +ffffffff834d3040 D carp_opts +ffffffff834d3058 D carp_cloner +ffffffff834d3088 d carp_send_na.mcast ffffffff834d4000 d PADDING -ffffffff834d5000 d weak_keys -ffffffff834d6000 D swcr_id -ffffffff834d7000 D window_inflate -ffffffff834d7004 D window_deflate -ffffffff834d8000 D ghash_update -ffffffff834d9000 D mpls_defttl -ffffffff834d9004 D mpls_mapttl_ip -ffffffff834da000 D nfskevq_lock -ffffffff834db000 D desirednfsrvcache -ffffffff834dc000 D nfs_niothreads -ffffffff834dd000 D fragtbl -ffffffff834de000 D ffs_vtbl -ffffffff834df000 D dirchk -ffffffff834e0000 D desireddquot -ffffffff834e1000 D amap_list_lock -ffffffff834e2000 d uao_list_lock -ffffffff834e3000 D udv_lock -ffffffff834e4000 d uvmexp_countersboot_boot_cpumem -ffffffff834e40c0 D uvmexp_counters -ffffffff834e40c8 D vm_min_kernel_address -ffffffff834e5000 D no_constraint -ffffffff834e6000 d uvm_kmapent_warn_rate -ffffffff834e7000 D maxslp -ffffffff834e8000 D uvmpagerops -ffffffff834e9000 D uvm_swap_data_lock -ffffffff834e9010 D swap_syscall_lock -ffffffff834e9020 D oommtx -ffffffff834ea000 D uvm_doswapencrypt -ffffffff834eb000 D gif_list -ffffffff834eb010 D gif_cloner -ffffffff834ec000 d sec_cloner -ffffffff834ec030 d sec_tdb_gc_mtx -ffffffff834ec040 d sec_tdb_gc_task -ffffffff834ed000 D divert6_sendspace -ffffffff834ed004 D divert6_recvspace -ffffffff834ed008 D divb6hashsize -ffffffff834ee000 d in6_get_hw_ifid.allone -ffffffff834ef000 D ip6_sendredirects -ffffffff834ef004 D ip6_defhlim -ffffffff834ef008 D ip6_defmcasthlim -ffffffff834ef00c D ip6_maxfragpackets -ffffffff834ef010 D ip6_maxfrags -ffffffff834ef014 D ip6_log_interval -ffffffff834ef018 D ip6_hdrnestlimit -ffffffff834ef01c D ip6_dad_count -ffffffff834ef020 D ip6_auto_flowlabel -ffffffff834ef024 D ip6_use_deprecated -ffffffff834ef028 D ip6_neighborgcthresh -ffffffff834ef02c D ip6_maxdynroutes -ffffffff834ef030 D rip6_sendspace -ffffffff834ef038 D rip6_recvspace -ffffffff834ef040 D icmp6_redirtimeout -ffffffff834ef044 D icmp6errppslim -ffffffff834ef048 D ip6_mtudisc_timeout -ffffffff834f0000 D frag6_mutex -ffffffff834f1000 d icmp6_mtudisc_hiwat -ffffffff834f1004 d icmp6_mtudisc_lowat -ffffffff834f2000 d randomtab_20 -ffffffff834f3000 D ip6intrq -ffffffff834f3038 d ip6send_task -ffffffff834f4000 D nd6_timer_next -ffffffff834f4008 D nd6_expire_next -ffffffff834f4010 D nd6_delay -ffffffff834f4014 D nd6_umaxtries -ffffffff834f4018 D nd6_mmaxtries -ffffffff834f401c D nd6_gctimer -ffffffff834f4020 D nd6_maxndopt -ffffffff834f4028 D nd6_mtx -ffffffff834f4038 D nd6_list -ffffffff834f5000 d dadq -ffffffff834f6000 D pfkeyv2_mtx -ffffffff834f6010 d pfkeyv2_seq -ffffffff834f7000 D sadb_exts_allowed_in -ffffffff834f7090 D sadb_exts_required_in -ffffffff834f8000 D cold -ffffffff834f9000 D bdevsw -ffffffff834f9460 D nblkdev -ffffffff834f9470 D cdevsw -ffffffff834fb450 D nchrdev -ffffffff834fb454 D mem_no -ffffffff834fb458 D swapdev -ffffffff834fb460 D constab -ffffffff834fc000 D machine -ffffffff834fc008 D cpu_idle_cycle_fcn -ffffffff834fc010 D lid_action -ffffffff834fc014 D pwr_action -ffffffff834fc018 D isa_constraint -ffffffff834fc028 D dma_constraint -ffffffff834fc040 D uvm_md_constraints -ffffffff834fc058 D delay_func -ffffffff834fc060 D initclock_func -ffffffff834fc068 D startclock_func -ffffffff834fc070 D bootinfo_size -ffffffff834fc074 D waittime -ffffffff834fc078 D dumpmag -ffffffff834fd000 d identifycpu.prevci -ffffffff834fe000 D tsc_rdtsc -ffffffff834fe008 D tsc_timecounter -ffffffff834fe058 D tsc_is_synchronized -ffffffff834ff000 D local_apic -ffffffff834ff020 D lapic_id -ffffffff834ff080 D lapic_tpr -ffffffff834ff0a0 d lapic_ppr -ffffffff834ff100 d lapic_isr -ffffffff83500000 D warn_once -ffffffff83501000 d errata -ffffffff83502000 D cpu_ucode_mtx -ffffffff83503000 D mem_owner_bios -ffffffff83503008 D mrops -ffffffff83503028 D mtrrmask -ffffffff83503030 D mtrrtomrt -ffffffff83504000 D pg_frame -ffffffff83504008 D pg_lgframe -ffffffff83504010 D pmap_pg_wc -ffffffff83504018 D pmaps_lock -ffffffff83504028 d pmap_maxkvaddr -ffffffff83505000 D kv_physwait -ffffffff83506000 D fpu_save_len -ffffffff83507000 D i8259_pic -ffffffff83508000 D softintr_pic -ffffffff83509000 D ipifunc -ffffffff8350a000 D setperf_mp_mutex -ffffffff8350b000 D db_Grp6 -ffffffff8350b040 D db_Grp7 -ffffffff8350b100 D db_Grp8 -ffffffff8350b140 D db_Grp9 -ffffffff8350b200 D db_GrpA -ffffffff8350b240 D db_GrpB -ffffffff8350b280 D db_GrpC -ffffffff8350b2c0 D db_inst_0f0x -ffffffff8350b440 D db_inst_0f2x -ffffffff8350b5c0 D db_inst_0f3x -ffffffff8350b740 D db_inst_0f8x -ffffffff8350b8c0 D db_inst_0f9x -ffffffff8350ba40 D db_inst_0fax -ffffffff8350bbc0 D db_inst_0fbx -ffffffff8350bd40 D db_inst_0fcx -ffffffff8350bec0 D db_inst_0f -ffffffff8350bf40 D db_Esc92 -ffffffff8350bf80 D db_Esc94 -ffffffff8350bfc0 D db_Esc95 -ffffffff8350c000 D db_Esc96 -ffffffff8350c040 D db_Esc97 -ffffffff8350c080 D db_Esca5 -ffffffff8350c0c0 D db_Escb4 -ffffffff8350c100 D db_Esce3 -ffffffff8350c140 D db_Escf4 -ffffffff8350c180 D db_Esc8 -ffffffff8350c240 D db_Esc9 -ffffffff8350c300 D db_Esca -ffffffff8350c3c0 D db_Escb -ffffffff8350c480 D db_Escc -ffffffff8350c540 D db_Escd -ffffffff8350c600 D db_Esce -ffffffff8350c6c0 D db_Escf -ffffffff8350c780 D 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tsc_ingress_barrier -ffffffff838d90d0 B tsc_egress_barrier -ffffffff838d9100 B tsc_ap_status -ffffffff838d9180 B tsc_ap_name -ffffffff838da000 b vc3_sc -ffffffff838da010 b viac3_rnd.buffer -ffffffff838da058 B viac3_rnd_tmo -ffffffff838da0a0 B viac3_rnd_present -ffffffff838db000 B aesni_sc -ffffffff838db008 B aesnipl -ffffffff838db1b0 B aesni_ops -ffffffff838dc000 b amd64_errata.printed -ffffffff838dd000 B cpu_ucode_size -ffffffff838dd008 B cpu_ucode_data -ffffffff838dd010 B cpu_ucode_intel_applied -ffffffff838de000 b ap_open_count -ffffffff838de008 B zeropage -ffffffff838de010 B mem_range_softc -ffffffff838df000 B mtrrdef -ffffffff838df008 B mtrrcap -ffffffff838e0000 B nkptp -ffffffff838e0020 B pg_nx -ffffffff838e0028 B pg_g_kern -ffffffff838e0030 B pg_crypt -ffffffff838e0038 B pmap_initialized -ffffffff838e0040 B kernel_pmap_store -ffffffff838e0118 B cr3_reuse_pcid -ffffffff838e0120 b cr3_pcid_temp -ffffffff838e0128 B virtual_avail -ffffffff838e0130 B pg_xo -ffffffff838e0140 B protection_codes -ffffffff838e0180 B pmap_use_pcid -ffffffff838e0184 b cr3_pcid_proc -ffffffff838e0188 B cr3_pcid_proc_intel -ffffffff838e0190 B pmaps -ffffffff838e0198 B pmap_pmap_pool -ffffffff838e0340 B pmap_pv_pool -ffffffff838e04e8 B pmap_pdp_pool -ffffffff838e1000 B fpu_mxcsr_mask -ffffffff838e1008 B xsave_mask -ffffffff838e2000 B x86_soft_intrs -ffffffff838e3000 B i8259_imen -ffffffff838e4000 B prev_cache -ffffffff838e5000 B intr_shared_edge -ffffffff838e5004 B intr_suspended -ffffffff838e5008 B intr_nowake -ffffffff838e5010 B fake_softclock_intrhand -ffffffff838e5080 B fake_softnet_intrhand -ffffffff838e50f0 B fake_softtty_intrhand -ffffffff838e5160 B fake_timer_intrhand -ffffffff838e51d0 B fake_ipi_intrhand -ffffffff838e5240 B fake_xen_intrhand -ffffffff838e52b0 B fake_hyperv_intrhand -ffffffff838e6000 B atdevbase -ffffffff838e6010 b ioport_ex_storage -ffffffff838e62e0 B ioport_ex -ffffffff838e62f0 b iomem_ex_storage -ffffffff838e65c0 B iomem_ex -ffffffff838e65c8 b ioport_malloc_safe -ffffffff838e7000 B mp_perflevel -ffffffff838e7008 B ul_setperf -ffffffff838e8000 B cn_tab -ffffffff838e9000 B ddb_mp_mutex -ffffffff838e9010 B ddb_state -ffffffff838e9018 B ddb_regs -ffffffff838e90c8 B db_switch_cpu -ffffffff838e90d0 B db_switch_to_cpu -ffffffff838e90d8 B ddb_active_cpu -ffffffff838ea000 B rtclock_tval -ffffffff838ea008 B i8254_ticked -ffffffff838ea00c B i8254_offset -ffffffff838ea010 B i8254_lastcount -ffffffff838ea018 b rtcstart.rtcdrain_timeout -ffffffff838ea060 B rtc_update_century -ffffffff838ea068 B rtc_todr -ffffffff838eb000 B k8pnow_current_state -ffffffff838ec000 B bus_clock -ffffffff838ec008 b est_fqlist -ffffffff838ed000 B k1x_current_state -ffffffff838ee000 B rotatedfonts -ffffffff838ee008 B rasops_framebuffers -ffffffff838ef000 b stamp_attr -ffffffff838ef010 b stamp +ffffffff834d5000 d PADDING +ffffffff834d6000 d weak_keys +ffffffff834d7000 D swcr_id +ffffffff834d8000 D window_inflate +ffffffff834d8004 D window_deflate +ffffffff834d9000 D ghash_update +ffffffff834da000 D mpls_defttl +ffffffff834da004 D mpls_mapttl_ip +ffffffff834db000 D nfskevq_lock +ffffffff834dc000 D desirednfsrvcache +ffffffff834dd000 D nfs_niothreads +ffffffff834de000 D fragtbl +ffffffff834df000 D ffs_vtbl +ffffffff834e0000 D dirchk +ffffffff834e1000 D desireddquot +ffffffff834e2000 D amap_list_lock +ffffffff834e3000 d uao_list_lock +ffffffff834e4000 D udv_lock +ffffffff834e5000 d uvmexp_countersboot_boot_cpumem +ffffffff834e50c0 D uvmexp_counters +ffffffff834e50c8 D vm_min_kernel_address +ffffffff834e6000 D no_constraint +ffffffff834e7000 d uvm_kmapent_warn_rate +ffffffff834e8000 D maxslp +ffffffff834e9000 D uvmpagerops +ffffffff834ea000 D uvm_swap_data_lock +ffffffff834ea010 D swap_syscall_lock +ffffffff834ea020 D oommtx +ffffffff834eb000 D uvm_doswapencrypt +ffffffff834ec000 D gif_list +ffffffff834ec010 D gif_cloner +ffffffff834ed000 d sec_cloner +ffffffff834ed030 d sec_tdb_gc_mtx +ffffffff834ed040 d sec_tdb_gc_task +ffffffff834ee000 D divert6_sendspace +ffffffff834ee004 D divert6_recvspace +ffffffff834ee008 D divb6hashsize +ffffffff834ef000 d in6_get_hw_ifid.allone +ffffffff834f0000 D ip6_sendredirects +ffffffff834f0004 D ip6_defhlim +ffffffff834f0008 D ip6_defmcasthlim +ffffffff834f000c D ip6_maxfragpackets +ffffffff834f0010 D ip6_maxfrags +ffffffff834f0014 D ip6_log_interval +ffffffff834f0018 D ip6_hdrnestlimit +ffffffff834f001c D ip6_dad_count +ffffffff834f0020 D ip6_auto_flowlabel +ffffffff834f0024 D ip6_use_deprecated +ffffffff834f0028 D ip6_neighborgcthresh +ffffffff834f002c D ip6_maxdynroutes +ffffffff834f0030 D rip6_sendspace +ffffffff834f0038 D rip6_recvspace +ffffffff834f0040 D icmp6_redirtimeout +ffffffff834f0044 D icmp6errppslim +ffffffff834f0048 D ip6_mtudisc_timeout +ffffffff834f1000 D frag6_mutex +ffffffff834f2000 d icmp6_mtudisc_hiwat +ffffffff834f2004 d icmp6_mtudisc_lowat +ffffffff834f3000 d randomtab_20 +ffffffff834f4000 D ip6intrq +ffffffff834f4038 d ip6send_task +ffffffff834f5000 D nd6_timer_next +ffffffff834f5008 D nd6_expire_next +ffffffff834f5010 D nd6_delay +ffffffff834f5014 D nd6_umaxtries +ffffffff834f5018 D nd6_mmaxtries +ffffffff834f501c D nd6_gctimer +ffffffff834f5020 D nd6_maxndopt +ffffffff834f5028 D nd6_mtx +ffffffff834f5038 D nd6_list +ffffffff834f6000 d dadq +ffffffff834f7000 D pfkeyv2_mtx +ffffffff834f7010 d pfkeyv2_seq +ffffffff834f8000 D sadb_exts_allowed_in +ffffffff834f8090 D sadb_exts_required_in +ffffffff834f9000 D cold +ffffffff834fa000 D bdevsw +ffffffff834fa460 D nblkdev +ffffffff834fa470 D cdevsw +ffffffff834fc450 D nchrdev +ffffffff834fc454 D mem_no +ffffffff834fc458 D swapdev +ffffffff834fc460 D constab +ffffffff834fd000 D machine +ffffffff834fd008 D cpu_idle_cycle_fcn +ffffffff834fd010 D lid_action +ffffffff834fd014 D pwr_action +ffffffff834fd018 D isa_constraint +ffffffff834fd028 D dma_constraint +ffffffff834fd040 D uvm_md_constraints +ffffffff834fd058 D delay_func +ffffffff834fd060 D initclock_func +ffffffff834fd068 D startclock_func +ffffffff834fd070 D bootinfo_size +ffffffff834fd074 D waittime +ffffffff834fd078 D dumpmag +ffffffff834fe000 d identifycpu.prevci +ffffffff834ff000 D tsc_rdtsc +ffffffff834ff008 D tsc_timecounter +ffffffff834ff058 D tsc_is_synchronized +ffffffff83500000 D local_apic +ffffffff83500020 D lapic_id +ffffffff83500080 D lapic_tpr +ffffffff835000a0 d lapic_ppr +ffffffff83500100 d lapic_isr +ffffffff83501000 D warn_once +ffffffff83502000 d errata +ffffffff83503000 D cpu_ucode_mtx +ffffffff83504000 D mem_owner_bios +ffffffff83504008 D mrops +ffffffff83504028 D mtrrmask +ffffffff83504030 D mtrrtomrt +ffffffff83505000 D pg_frame +ffffffff83505008 D pg_lgframe +ffffffff83505010 D pmap_pg_wc +ffffffff83505018 D pmaps_lock +ffffffff83505028 d pmap_maxkvaddr +ffffffff83506000 D kv_physwait +ffffffff83507000 D fpu_save_len +ffffffff83508000 D i8259_pic +ffffffff83509000 D softintr_pic +ffffffff8350a000 D ipifunc +ffffffff8350b000 D setperf_mp_mutex +ffffffff8350c000 D db_Grp6 +ffffffff8350c040 D db_Grp7 +ffffffff8350c100 D db_Grp8 +ffffffff8350c140 D db_Grp9 +ffffffff8350c200 D db_GrpA +ffffffff8350c240 D db_GrpB +ffffffff8350c280 D db_GrpC +ffffffff8350c2c0 D db_inst_0f0x +ffffffff8350c440 D db_inst_0f2x +ffffffff8350c5c0 D db_inst_0f3x +ffffffff8350c740 D db_inst_0f8x +ffffffff8350c8c0 D db_inst_0f9x +ffffffff8350ca40 D db_inst_0fax +ffffffff8350cbc0 D db_inst_0fbx +ffffffff8350cd40 D db_inst_0fcx +ffffffff8350cec0 D db_inst_0f +ffffffff8350cf40 D db_Esc92 +ffffffff8350cf80 D db_Esc94 +ffffffff8350cfc0 D db_Esc95 +ffffffff8350d000 D db_Esc96 +ffffffff8350d040 D db_Esc97 +ffffffff8350d080 D db_Esca5 +ffffffff8350d0c0 D db_Escb4 +ffffffff8350d100 D db_Esce3 +ffffffff8350d140 D db_Escf4 +ffffffff8350d180 D db_Esc8 +ffffffff8350d240 D db_Esc9 +ffffffff8350d300 D db_Esca +ffffffff8350d3c0 D db_Escb +ffffffff8350d480 D db_Escc +ffffffff8350d540 D db_Escd +ffffffff8350d600 D db_Esce +ffffffff8350d6c0 D db_Escf +ffffffff8350d780 D db_Esc_inst +ffffffff8350d7c0 D db_Grp1 +ffffffff8350d800 D db_Grp2 +ffffffff8350d840 D db_Grp3 +ffffffff8350d900 D db_Grp4 +ffffffff8350d9c0 D db_Grp5 +ffffffff8350da80 D db_inst_table +ffffffff8350f280 D db_bad_inst +ffffffff8350f2a0 D db_index_reg_16 +ffffffff8350f2e0 D db_reg +ffffffff8350f4e0 D db_seg_reg +ffffffff8350f520 D db_lengths +ffffffff83510000 D db_regs +ffffffff835101e0 D db_eregs +ffffffff835101f0 D db_reg_args +ffffffff83511000 D timer_mutex +ffffffff83511010 d i8254_timecounter +ffffffff83512000 D spleen8x16 +ffffffff83512058 D spleen12x24 +ffffffff835120b0 D spleen16x32 +ffffffff83512108 D spleen32x64 +ffffffff83512160 d builtin_fonts +ffffffff835121e0 d wsfont_add.cookiegen +ffffffff835121f0 d spleen8x16_data +ffffffff83512ff0 d spleen12x24_data +ffffffff835159f0 d spleen16x32_data +ffffffff835191f0 d spleen32x64_data +ffffffff83528000 D nsphy_cd +ffffffff83529000 D nsphyter_cd +ffffffff8352a000 D gentbi_cd +ffffffff8352b000 D qsphy_cd +ffffffff8352c000 D inphy_cd +ffffffff8352d000 D iophy_cd +ffffffff8352e000 D eephy_cd +ffffffff8352f000 D exphy_cd +ffffffff83530000 D rlphy_cd +ffffffff83531000 D lxtphy_cd +ffffffff83532000 D luphy_cd +ffffffff83533000 D mtdphy_cd +ffffffff83534000 D icsphy_cd +ffffffff83535000 D sqphy_cd +ffffffff83536000 D tqphy_cd +ffffffff83537000 D ukphy_cd +ffffffff83538000 D dcphy_cd +ffffffff83539000 D bmtphy_cd +ffffffff8353a000 D brgphy_cd +ffffffff8353b000 D xmphy_cd +ffffffff8353c000 D amphy_cd +ffffffff8353d000 D acphy_cd +ffffffff8353e000 D nsgphy_cd +ffffffff8353f000 D urlphy_cd +ffffffff83540000 D rgephy_cd +ffffffff83541000 D ciphy_cd +ffffffff83542000 D ipgphy_cd +ffffffff83543000 D etphy_cd +ffffffff83544000 D jmphy_cd +ffffffff83545000 D atphy_cd +ffffffff83546000 D scsi_autoconf +ffffffff83546008 D scsibus_cd +ffffffff83547000 D cd_cd +ffffffff83548000 D ch_cd +ffffffff83548020 D chquirks +ffffffff83549000 D sd_cd +ffffffff8354a000 D st_cd +ffffffff8354b000 D uk_cd +ffffffff8354c000 D safte_cd +ffffffff8354d000 D ses_cd +ffffffff8354e000 D sym_cd +ffffffff8354e020 D sym_devices +ffffffff8354e070 D asym_devices +ffffffff8354f000 D rdac_cd +ffffffff8354f020 D rdac_devices +ffffffff83550000 D emc_cd +ffffffff83550020 D emc_devices +ffffffff83551000 D hds_cd +ffffffff83551020 D hds_devices +ffffffff83552000 D atapiscsi_cd +ffffffff83553000 D wd_cd +ffffffff83553020 d wddumpmulti +ffffffff83554000 D mainbus_cd +ffffffff83554020 D mba_iba +ffffffff83555000 D bios_cd +ffffffff83555020 D smbios_uninfo +ffffffff83556000 D mpbios_cd +ffffffff83556020 d mp_conf +ffffffff83556070 d extint_bus +ffffffff835560a0 d smi_bus +ffffffff835560d0 d nmi_bus +ffffffff83557000 D need_retpoline +ffffffff83558000 D cpu_info_full_primary +ffffffff8355b000 D cpu_info_list +ffffffff8355b008 D mp_cpu_funcs +ffffffff8355b020 D cpu_cd +ffffffff8355b040 D cpu_info +ffffffff8355c000 D local_pic +ffffffff8355c098 D lapic_readreg +ffffffff8355c0a0 D lapic_writereg +ffffffff8355c0a8 D x86_ipi +ffffffff8355d000 D ioapic_cold +ffffffff8355d008 D ioapic_cd +ffffffff8355e000 D efifb_std_descr +ffffffff8355e030 D efifb_descrs +ffffffff8355e038 D efifb_accessops +ffffffff8355e098 D efifb_cd +ffffffff8355f000 D pvbus_cd +ffffffff8355f020 D pvbus_types +ffffffff8355f0e0 D pvbus_dma_tag +ffffffff83560000 D pvclock_cd +ffffffff83560020 D pvclock_timecounter +ffffffff83561000 D vmt_tclo_rpc +ffffffff835610d0 D vmt_cd +ffffffff83562000 D xen_cd +ffffffff83562020 D xen_bus_dma_tag +ffffffff83563000 D xnf_cd +ffffffff83564000 D xbf_cd +ffffffff83565000 D hv_msg_dispatch +ffffffff83565110 D hv_timecounter +ffffffff83565160 D hyperv_cd +ffffffff83566000 d hv_ic_devs +ffffffff83567000 D hvn_cd +ffffffff83568000 D hvs_cd +ffffffff83569000 D virtio_cd +ffffffff8356a000 D vio_cd +ffffffff8356b000 D vioblk_cd +ffffffff8356c000 D viomb_cd +ffffffff8356d000 D viornd_cd +ffffffff8356e000 D vioscsi_cd +ffffffff8356f000 D vmmci_cd +ffffffff83570000 D pci_cd +ffffffff83571000 D arc_fw_hdr +ffffffff83571008 D arc_cd +ffffffff83572000 D jmb_cd +ffffffff83573000 D mfii_cd +ffffffff83574000 D ips_cd +ffffffff83575000 D eap_cd +ffffffff83576000 D auacer_cd +ffffffff83577000 D auich_cd +ffffffff83578000 D azalia_cd +ffffffff83579000 D envy_cd +ffffffff83579020 D envy_matchids +ffffffff83579030 D envy_rates +ffffffff835790b0 D ak4524_dac +ffffffff835790d8 D ak4524_adc +ffffffff83579100 D ak4358_dac +ffffffff83579128 D ak5365_adc +ffffffff83579150 D unkenvy_codec +ffffffff83579180 D envy_cards +ffffffff835793f0 D envy_cards_ht +ffffffff83579600 d julia_eeprom +ffffffff8357a000 D emu_cd +ffffffff8357b000 D auixp_cd +ffffffff8357c000 D clcs_cd +ffffffff8357d000 D yds_cd +ffffffff8357e000 D auvia_cd +ffffffff8357f000 D qle_cd +ffffffff83580000 D mpii_cd +ffffffff83581000 D aq_cd +ffffffff83582000 D de_cd +ffffffff83583000 D pcn_cd +ffffffff83584000 D wdc_sii3114_vtbl +ffffffff83584038 D wdc_pdc203xx_vtbl +ffffffff83584070 D wdc_svwsata_vtbl +ffffffff835840a8 D pciide_cd +ffffffff835840d0 d sis_hostbr_type +ffffffff83585000 D ppb_cd +ffffffff83586000 D vr_cd +ffffffff83586020 D vr_devices +ffffffff83587000 D txp_cd +ffffffff83588000 D bt848_card_signature +ffffffff83589000 D bktr_cd +ffffffff8358a000 D em_cd +ffffffff8358b000 D ixgb_cd +ffffffff8358c000 D ix_cd +ffffffff8358c020 D ixgbe_smart_speed +ffffffff8358c024 D ixgbe_enable_msix +ffffffff8358d000 D ixl_cd +ffffffff8358d020 d ixl_sff_lock +ffffffff8358e000 D xge_cd +ffffffff8358f000 D thtc_cd +ffffffff8358f020 D tht_cd +ffffffff8358f040 D tht_txt_desc +ffffffff8358f068 D tht_rxf_desc +ffffffff8358f090 D tht_rxd_desc +ffffffff8358f0b8 D tht_txf_desc +ffffffff83590000 D myx_cd +ffffffff83591000 D oce_cd +ffffffff83592000 D dc_devs +ffffffff83593000 D cas_cd +ffffffff83594000 D sis_cd +ffffffff83595000 D se_cd +ffffffff83596000 D mbg_cd +ffffffff83597000 D cbb_cd +ffffffff83597020 D yc_chipsets +ffffffff835971b0 d pccbb_funcs +ffffffff835971e0 d pccbb_pcmcia_funcs +ffffffff83598000 D skc_cd +ffffffff83598020 D sk_cd +ffffffff83599000 D mskc_cd +ffffffff83599020 D msk_cd +ffffffff8359a000 D puc_cd +ffffffff8359b000 D puc_ndevs +ffffffff8359c000 D iwi_cd +ffffffff8359d000 D wpi_cd +ffffffff8359e000 D iwn_cd +ffffffff8359f000 D iwm_cd +ffffffff835a0000 D iwx_cd +ffffffff835a1000 d .compoundliteral +ffffffff835a1040 d .compoundliteral.4 +ffffffff835a1080 d .compoundliteral.5 +ffffffff835a10b0 d .compoundliteral.6 +ffffffff835a10f0 d .compoundliteral.7 +ffffffff835a1130 d .compoundliteral.8 +ffffffff835a2000 D cmpci_cd +ffffffff835a3000 D iha_cd +ffffffff835a4000 D pcscp_cd +ffffffff835a4020 D pcscp_glue +ffffffff835a5000 D bge_cd +ffffffff835a6000 D bnx_firmwares +ffffffff835a6160 D bnx_rv2ps +ffffffff835a61c0 D bnx_cd +ffffffff835a61e0 d flash_5709 +ffffffff835a6210 d flash_table +ffffffff835a7000 D vge_cd +ffffffff835a8000 D stge_cd +ffffffff835a9000 D nfe_cd +ffffffff835aa000 D et_cd +ffffffff835ab000 D jme_cd +ffffffff835ac000 D age_cd +ffffffff835ad000 D alc_dma_burst +ffffffff835ad020 D alc_cd +ffffffff835ae000 D ale_cd +ffffffff835af000 D amdpm_cd +ffffffff835af020 d amdpm_timecounter +ffffffff835b0000 D bce_cd +ffffffff835b1000 D rtwn_cd +ffffffff835b2000 d ral_rt2560_opns +ffffffff835b2028 d ral_rt2661_opns +ffffffff835b2050 d ral_rt2860_opns +ffffffff835b3000 D piixpm_cd +ffffffff835b4000 D vic_cd +ffffffff835b5000 D vmx_cd +ffffffff835b6000 D vmwpvs_cd +ffffffff835b7000 D lii_cd +ffffffff835b8000 D ichiic_cd +ffffffff835b9000 D viapm_cd +ffffffff835b9020 d viapm_timecounter +ffffffff835ba000 D amdiic_cd +ffffffff835bb000 D nviic_cd +ffffffff835bc000 D kate_cd +ffffffff835bd000 D km_cd +ffffffff835be000 D cpu_model_offsets +ffffffff835be070 D ksmn_cd +ffffffff835bf000 D itherm_cd +ffffffff835c0000 D pchtemp_cd +ffffffff835c1000 D xspd_cd +ffffffff835c2000 D bwfm_pci_buscore_ops +ffffffff835c2030 D bwfm_pci_bus_ops +ffffffff835c2058 D bwfm_pci_msgbuf_ops +ffffffff835c3000 D bnxt_cd +ffffffff835c4000 D mcx_cd +ffffffff835c5000 D iavf_cd +ffffffff835c6000 D rge_cd +ffffffff835c7000 D igc_cd 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+ffffffff835d8030 D inteldrm_scrlist +ffffffff835d8038 D inteldrm_screenlist +ffffffff835d8048 D inteldrm_accessops +ffffffff835d80a8 D inteldrm_cd +ffffffff835d9000 d capture_mutex +ffffffff835da000 d mitigations +ffffffff835db000 D i915_modparams +ffffffff835dc000 d schedule_lock +ffffffff835dd000 d unbind_fence_ops +ffffffff835de000 D intel_graphics_stolen_res +ffffffff835df000 D btc_valid_sclk +ffffffff835e0000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff835e0020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff835e1000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff835e1008 d r600_cs_packet_parse_vline.vline_status +ffffffff835e2000 d r100_asic +ffffffff835e22e0 d r200_asic +ffffffff835e25c0 d r300_asic_pcie +ffffffff835e28a0 d r300_asic +ffffffff835e2b80 d r420_asic +ffffffff835e2e60 d rs400_asic +ffffffff835e3140 d rs600_asic +ffffffff835e3420 d rs690_asic +ffffffff835e3700 d rv515_asic +ffffffff835e39e0 d r520_asic +ffffffff835e3cc0 d r600_asic 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D radeon_lockup_timeout +ffffffff835e7024 D radeon_dpm +ffffffff835e7028 D radeon_aspm +ffffffff835e702c D radeon_runtime_pm +ffffffff835e7030 D radeon_vm_size +ffffffff835e7034 D radeon_vm_block_size +ffffffff835e7038 D radeon_use_pflipirq +ffffffff835e703c D radeon_bapm +ffffffff835e7040 D radeon_backlight +ffffffff835e7044 D radeon_auxch +ffffffff835e7048 D radeon_uvd +ffffffff835e704c D radeon_vce +ffffffff835e7050 D radeon_si_support +ffffffff835e7054 D radeon_cik_support +ffffffff835e7058 D radeondrm_cd +ffffffff835e7078 D radeondrm_stdscreen +ffffffff835e70a8 D radeondrm_scrlist +ffffffff835e70b0 D radeondrm_screenlist +ffffffff835e70c0 D radeondrm_accessops +ffffffff835e8000 D radeon_bbops +ffffffff835e9000 d radeon_bo_driver +ffffffff835ea000 d verde_pg_init +ffffffff835eb000 d cac_weights_pitcairn +ffffffff835eb4d0 d cac_weights_oland +ffffffff835ec000 d aldebaran_mode2_handler +ffffffff835ed000 d amdgpu_vbios_version_attrs +ffffffff835ee000 D amdgpu_asic_name +ffffffff835ef000 D amdgpu_vram_limit +ffffffff835ef004 D amdgpu_gart_size +ffffffff835ef008 D amdgpu_gtt_size +ffffffff835ef00c D amdgpu_moverate +ffffffff835ef010 D amdgpu_audio +ffffffff835ef014 D amdgpu_pcie_gen2 +ffffffff835ef018 D amdgpu_msi +ffffffff835ef01c D amdgpu_dpm +ffffffff835ef020 D amdgpu_fw_load_type +ffffffff835ef024 D amdgpu_aspm +ffffffff835ef028 D amdgpu_runtime_pm +ffffffff835ef02c D amdgpu_ip_block_mask +ffffffff835ef030 D amdgpu_bapm +ffffffff835ef034 D amdgpu_vm_size +ffffffff835ef038 D amdgpu_vm_fragment_size +ffffffff835ef03c D amdgpu_vm_block_size +ffffffff835ef040 D amdgpu_vm_update_mode +ffffffff835ef044 D amdgpu_dc +ffffffff835ef048 D amdgpu_sched_jobs +ffffffff835ef04c D amdgpu_sched_hw_submission +ffffffff835ef050 D amdgpu_cg_mask +ffffffff835ef058 D amdgpu_pg_mask +ffffffff835ef05c D amdgpu_sdma_phase_quantum +ffffffff835ef060 D amdgpu_pp_feature_mask +ffffffff835ef064 D amdgpu_lbpw +ffffffff835ef068 D amdgpu_compute_multipipe +ffffffff835ef06c D amdgpu_gpu_recovery +ffffffff835ef070 D amdgpu_smu_pptable_id +ffffffff835ef074 D amdgpu_dc_feature_mask +ffffffff835ef078 D amdgpu_async_gfx_ring +ffffffff835ef07c D amdgpu_mcbp +ffffffff835ef080 D amdgpu_discovery +ffffffff835ef084 D amdgpu_noretry +ffffffff835ef088 D amdgpu_force_asic_type +ffffffff835ef08c D amdgpu_tmz +ffffffff835ef090 D amdgpu_reset_method +ffffffff835ef094 D amdgpu_num_kcq +ffffffff835ef098 D amdgpu_use_xgmi_p2p +ffffffff835ef09c D amdgpu_sg_display +ffffffff835ef0a0 D amdgpu_user_partt_mode +ffffffff835ef0a8 D mgpu_info +ffffffff835ef558 D amdgpu_ras_enable +ffffffff835ef55c D amdgpu_ras_mask +ffffffff835ef560 D amdgpu_bad_page_threshold +ffffffff835ef564 D amdgpu_backlight +ffffffff835ef568 D amdgpu_cd +ffffffff835ef588 D amdgpu_stdscreen +ffffffff835ef5b8 D amdgpu_scrlist +ffffffff835ef5c0 D amdgpu_screenlist +ffffffff835ef5d0 D amdgpu_accessops +ffffffff835f0000 d amdgpu_gtt_mgr_attributes +ffffffff835f1000 D amdgpu_bbops +ffffffff835f2000 D soc15_ih_clientid_name +ffffffff835f3000 D ras_error_string +ffffffff835f3030 D ras_block_string +ffffffff835f30c0 D ras_mca_block_string +ffffffff835f4000 d amdgpu_bo_driver +ffffffff835f5000 d amdgpu_vram_mgr_attributes +ffffffff835f6000 d xgmi_mutex +ffffffff835f6010 D xgmi_ras_hw_ops +ffffffff835f6050 D xgmi_ras +ffffffff835f7000 D aqua_vanjaram_xcp_funcs +ffffffff835f8000 D gfx_v11_0_3_ras +ffffffff835f9000 d gfx_v9_0_ras +ffffffff835fa000 D gfx_v9_4_ras +ffffffff835fb000 D gfx_v9_4_2_ras_ops +ffffffff835fb040 D gfx_v9_4_2_ras +ffffffff835fc000 D gfx_v9_4_3_xcp_funcs +ffffffff835fc020 D gfx_v9_4_3_ras_ops +ffffffff835fc060 D gfx_v9_4_3_ras +ffffffff835fd000 D gfxhub_v1_2_xcp_funcs +ffffffff835fe000 D hdp_v4_0_ras_hw_ops +ffffffff835fe040 D hdp_v4_0_ras +ffffffff835ff000 d jpeg_v2_6_ras +ffffffff83600000 d jpeg_v4_0_ras +ffffffff83601000 d jpeg_v4_0_3_ras +ffffffff83602000 D mca_v3_0_mp0_ras +ffffffff83602058 D mca_v3_0_mp1_ras +ffffffff836020b0 D mca_v3_0_mpio_ras +ffffffff83603000 D mmhub_v1_0_ras_hw_ops +ffffffff83603040 D mmhub_v1_0_ras +ffffffff83604000 D mmhub_v1_7_ras_hw_ops +ffffffff83604040 D mmhub_v1_7_ras +ffffffff83605000 D mmhub_v1_8_ras +ffffffff83606000 D mmhub_v9_4_ras +ffffffff83607000 D nbio_v4_3_ras +ffffffff83608000 D nbio_v7_4_ras +ffffffff83609000 D nbio_v7_9_ras +ffffffff8360a000 d sriov_sc_video_codecs_encode +ffffffff8360a010 d sriov_sc_video_codecs_decode_vcn1 +ffffffff8360a020 d sriov_sc_video_codecs_decode_vcn0 +ffffffff8360a030 d sriov_sc_video_codecs_encode_array +ffffffff8360a060 d sriov_sc_video_codecs_decode_array_vcn1 +ffffffff8360a0f0 d sriov_sc_video_codecs_decode_array_vcn0 +ffffffff8360b000 d sdma_v4_0_ras +ffffffff8360c000 D sdma_v4_4_ras +ffffffff8360d000 D sdma_v4_4_2_xcp_funcs +ffffffff8360d020 d sdma_v4_4_2_ras +ffffffff8360e000 d sdma_v6_0_3_ras +ffffffff8360f000 d sienna_cichlid_mode2_handler +ffffffff83610000 d smu_v13_0_10_mode2_handler +ffffffff83611000 d sriov_vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff83611010 d sriov_vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff83611020 d sriov_vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff83611030 d sriov_vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff83611040 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff83611070 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff83611100 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff83611140 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff83612000 D umc_v6_1_ras +ffffffff83613000 D umc_v6_7_ras +ffffffff83614000 D umc_v8_10_ras +ffffffff83615000 D umc_v8_7_ras +ffffffff83616000 d vcn_v2_6_ras +ffffffff83617000 d vcn_v4_0_unified_ring_vm_funcs +ffffffff83617140 d vcn_v4_0_ras +ffffffff83618000 d vcn_v4_0_3_ras +ffffffff83619000 d amdgpu_dm_mode_config_helperfuncs +ffffffff83619010 d dm_atomic_state_funcs +ffffffff8361a000 d construct_integrated_info.result +ffffffff8361a004 d bios_parser_get_firmware_info.result +ffffffff8361b000 d dce_funcs +ffffffff8361c000 d dce110_funcs +ffffffff8361d000 d dce112_funcs +ffffffff8361e000 d dce120_funcs +ffffffff8361f000 d rv1_clk_funcs +ffffffff8361f090 d rv1_clk_internal_funcs +ffffffff83620000 d rv2_clk_internal_funcs +ffffffff83621000 d dcn2_funcs +ffffffff83622000 d dcn201_funcs +ffffffff83623000 d dcn21_funcs +ffffffff83623090 d rn_bw_params +ffffffff83624000 D dcn3_fpga_funcs +ffffffff83624090 d dcn3_funcs +ffffffff83625000 d vg_funcs +ffffffff83625090 d dummy_clocks +ffffffff836251c0 d vg_bw_params +ffffffff83626000 d dcn31_funcs +ffffffff83626090 d dcn31_bw_params +ffffffff83627000 d dcn314_funcs +ffffffff83627090 d dcn314_bw_params +ffffffff83628000 d dcn315_funcs +ffffffff83628090 d dcn315_bw_params +ffffffff83629000 d dcn316_funcs +ffffffff83629090 d dcn316_bw_params +ffffffff8362a000 d dcn32_funcs +ffffffff8362b000 d dcn10_dpp_cap +ffffffff8362c000 d dcn20_dpp_funcs +ffffffff8362c110 d dcn20_dpp_cap +ffffffff8362d000 d dcn20_hubp_funcs +ffffffff8362e000 d dcn20_opp_funcs +ffffffff8362f000 d dcn20_tg_funcs +ffffffff83630000 d dcn201_dpp_funcs +ffffffff83630110 d dcn201_dpp_cap +ffffffff83631000 d dcn201_hubp_funcs +ffffffff83632000 d dcn201_opp_funcs +ffffffff83633000 d dcn201_tg_funcs +ffffffff83634000 d dcn201_res_pool_funcs +ffffffff836340f8 d dcn201_ip +ffffffff836342b0 d dcn201_soc +ffffffff83636000 d dcn21_hubp_funcs +ffffffff83637000 d dcn30_afmt_funcs +ffffffff83638000 d dcn30_dpp_funcs +ffffffff83638110 d dcn30_dpp_cap +ffffffff83639000 d dcn30_hubp_funcs +ffffffff8363a000 d dcn30_tg_funcs +ffffffff8363b000 d dcn30_vpg_funcs +ffffffff8363c000 d dcn30_tg_funcs +ffffffff8363d000 d res_cap_dcn301 +ffffffff8363d040 d dcn301_res_pool_funcs +ffffffff8363e000 d dcn302_res_pool_funcs +ffffffff8363f000 d dcn303_res_pool_funcs +ffffffff83640000 d dcn31_afmt_funcs +ffffffff83641000 d dcn31_apg_funcs +ffffffff83642000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff83643000 d dcn31_hubp_funcs +ffffffff83644000 d dcn31_tg_funcs +ffffffff83645000 d dcn31_res_pool_funcs +ffffffff83646000 d dcn31_vpg_funcs +ffffffff83647000 d dcn314_tg_funcs +ffffffff83648000 d dcn314_res_pool_funcs +ffffffff83649000 d dcn315_res_pool_funcs +ffffffff8364a000 d dcn316_res_pool_funcs +ffffffff8364b000 d dcn32_dpp_funcs +ffffffff8364b110 d dcn32_dpp_cap +ffffffff8364c000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff8364d000 d dcn32_hubp_funcs +ffffffff8364e000 d dcn32_tg_funcs +ffffffff8364f000 d dcn32_res_pool_funcs +ffffffff83650000 d dcn321_res_pool_funcs +ffffffff83651000 D dcn1_0_ip +ffffffff836511b8 D dcn1_0_soc +ffffffff83653000 D dcn2_0_ip +ffffffff836531b8 D dcn2_0_nv14_ip +ffffffff83653370 D dcn2_0_soc +ffffffff836546a8 D dcn2_0_nv14_soc +ffffffff836559e0 D dcn2_0_nv12_soc +ffffffff83656d18 D dcn2_1_ip +ffffffff83656ed0 D dcn2_1_soc +ffffffff83658208 D ddr4_wm_table_gs +ffffffff836582c8 D lpddr4_wm_table_gs +ffffffff83658388 D lpddr4_wm_table_with_disabled_ppt +ffffffff83658448 D ddr4_wm_table_rn +ffffffff83658508 D ddr4_1R_wm_table_rn +ffffffff836585c8 D lpddr4_wm_table_rn +ffffffff83659000 D dcn3_0_ip +ffffffff836591b8 D dcn3_0_soc +ffffffff8365b000 D dcn3_01_ip +ffffffff8365b1b8 D dcn3_01_soc +ffffffff8365c4f0 D ddr4_wm_table +ffffffff8365c5b0 D lpddr5_wm_table +ffffffff8365d000 D dcn3_02_ip +ffffffff8365d1b8 D dcn3_02_soc +ffffffff8365f000 D dcn3_03_ip +ffffffff8365f1b8 D dcn3_03_soc +ffffffff83661000 D dcn3_1_ip +ffffffff836611b8 D dcn3_15_ip +ffffffff83661370 D dcn3_16_ip +ffffffff83661528 d dcn3_15_soc +ffffffff83662860 d dcn3_1_soc +ffffffff83663b98 d dcn3_16_soc +ffffffff83665000 D dcn3_14_ip +ffffffff836651b8 d dcn3_14_soc +ffffffff83667000 D dcn3_2_ip +ffffffff836671b8 D dcn3_2_soc +ffffffff83669000 D dcn3_21_ip +ffffffff836691b8 D dcn3_21_soc +ffffffff8366b000 d dsc_policy_max_target_bpp_limit +ffffffff8366c000 D DIDTEDCConfig_P12 +ffffffff8366c070 d smu7_profiling +ffffffff8366d000 d cyan_skillfish_table_map +ffffffff8366d080 d cyan_skillfish_message_map +ffffffff8366e000 d navi10_table_map +ffffffff8366e080 d navi10_pwr_src_map +ffffffff8366e090 d navi10_workload_map +ffffffff8366e0e0 d navi10_message_map +ffffffff8366eb60 d navi10_clk_map +ffffffff8366ec20 d navi10_feature_mask_map +ffffffff8366f000 d sienna_cichlid_table_map +ffffffff8366f080 d sienna_cichlid_pwr_src_map +ffffffff8366f090 d sienna_cichlid_workload_map +ffffffff8366f0e0 d sienna_cichlid_message_map +ffffffff8366fb60 d sienna_cichlid_clk_map +ffffffff8366fc20 d sienna_cichlid_feature_mask_map +ffffffff83670000 d vangogh_message_map +ffffffff83670a80 d vangogh_table_map +ffffffff83670b00 d vangogh_workload_map +ffffffff83670b50 d vangogh_feature_mask_map +ffffffff83671000 d renoir_table_map +ffffffff83671080 d renoir_workload_map +ffffffff836710d0 d renoir_message_map +ffffffff83671b50 d renoir_clk_map +ffffffff83672000 d smu_v13_0_0_message_map +ffffffff83672a80 d smu_v13_0_0_feature_mask_map +ffffffff83672e50 d smu_v13_0_0_table_map +ffffffff83672ed0 d smu_v13_0_0_pwr_src_map +ffffffff83672ee0 d smu_v13_0_0_workload_map +ffffffff83672f30 d smu_v13_0_0_clk_map +ffffffff83673000 d smu_v13_0_4_table_map +ffffffff83673080 d smu_v13_0_4_message_map +ffffffff83673b00 d smu_v13_0_4_feature_mask_map +ffffffff83674000 d smu_v13_0_5_table_map +ffffffff83674080 d smu_v13_0_5_message_map +ffffffff83674b00 d smu_v13_0_5_feature_mask_map +ffffffff83675000 d smu_v13_0_7_message_map +ffffffff83675a80 d smu_v13_0_7_feature_mask_map +ffffffff83675e50 d smu_v13_0_7_table_map +ffffffff83675ed0 d smu_v13_0_7_pwr_src_map +ffffffff83675ee0 d smu_v13_0_7_workload_map +ffffffff83675f30 d smu_v13_0_7_clk_map +ffffffff83676000 d yellow_carp_table_map +ffffffff83676080 d yellow_carp_message_map +ffffffff83676b00 d yellow_carp_feature_mask_map +ffffffff83677000 D pci_conf_lock +ffffffff83677010 D pci_bus_dma_tag +ffffffff83677088 D msi_pic +ffffffff83677120 D msix_pic +ffffffff83678000 D pchb_cd +ffffffff83679000 D amas_cd +ffffffff8367a000 D cardslot_cd +ffffffff8367b000 D cardbus_cd +ffffffff8367c000 d csdevs +ffffffff8367d000 d ral_rt2560_opns +ffffffff8367d028 d ral_rt2661_opns +ffffffff8367d050 d ral_rt2860_opns +ffffffff8367e000 D pcmcia_cd +ffffffff8367f000 D pcmcia_3cxem556_func0 +ffffffff8367f0b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff8367f158 D pcmcia_megahertz_xjem1144_func0 +ffffffff8367f210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff8367f2b0 d pcmcia_3cxem556_func1 +ffffffff8367f368 d pcmcia_3cxem556_func1_cfe0 +ffffffff8367f408 d pcmcia_megahertz_xjem1144_func1 +ffffffff8367f4c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff8367f560 d pcmcia_sierra_a555_func1 +ffffffff8367f618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff8367f6b8 d pcmcia_sveclancard_func0 +ffffffff8367f770 d pcmcia_sveclancard_func0_cfe0 +ffffffff83680000 D ep_pcmcia_prod +ffffffff83681000 D aic_pcmcia_prod +ffffffff83682000 D com_pcmcia_prod +ffffffff83683000 D wdc_pcmcia_pr +ffffffff83684000 D sm_pcmcia_prod +ffffffff83685000 D xe_cd +ffffffff83686000 D pcib_cd +ffffffff83687000 D amdpcib_cd +ffffffff83688000 D tcpcib_cd +ffffffff83689000 D aapic_cd +ffffffff8368a000 D hme_cd +ffffffff8368b000 D isa_cd +ffffffff8368c000 D isadma_cd +ffffffff8368d000 D fdc_cd +ffffffff8368e000 D fd_types +ffffffff8368e1f8 D fd_cd +ffffffff8368f000 D mpu_cd +ffffffff83690000 D pcppi_cd +ffffffff83691000 D spkr_cd +ffffffff83692000 D wbsio_cd +ffffffff83693000 D schsio_cd +ffffffff83694000 D it_cd +ffffffff83695000 D uguru_cd +ffffffff83696000 D aps_cd +ffffffff83697000 D isa_bus_dma_tag +ffffffff83698000 D wsdisplay_cd +ffffffff83698020 D wsdisplay_cons +ffffffff83698058 D wsdisplay_defaultscreens +ffffffff83699000 D wskbd_cd +ffffffff83699020 D wskbd_default_bell_data +ffffffff83699030 D wskbd_default_keyrepeat_data +ffffffff83699040 D wskbd_srcops +ffffffff8369a000 d compose_tab +ffffffff8369b000 D wsmouse_cd +ffffffff8369b020 D wsmouse_srcops +ffffffff8369c000 D wsmux_srcops +ffffffff8369c030 D wsmux_tree_lock +ffffffff8369d000 D vt100_output +ffffffff8369e000 D pckbd_cd +ffffffff8369f000 D pms_cd +ffffffff8369f020 d synaptics_params +ffffffff8369f030 d alps_params +ffffffff836a0000 D skgpio_cd +ffffffff836a1000 D pctr_conf_lock +ffffffff836a2000 D ukbd_keymapdata +ffffffff836a3000 D usbrev_str +ffffffff836a3030 D usb_cd +ffffffff836a4000 d usbd_ratecheck.errinterval +ffffffff836a5000 D uhub_cd +ffffffff836a6000 D uaudio_cd +ffffffff836a7000 D uvideo_ctrls +ffffffff836a72d8 D uvideo_cd +ffffffff836a8000 D utvfu_norm_params +ffffffff836a8030 D utvfu_cd +ffffffff836a9000 D udl_reg_vals_640x480_60 +ffffffff836a9020 D udl_reg_vals_640x480_67 +ffffffff836a9040 D udl_reg_vals_640x480_72 +ffffffff836a9060 D udl_reg_vals_640x480_75 +ffffffff836a9080 D udl_reg_vals_800x480_61 +ffffffff836a90a0 D udl_reg_vals_800x600_56 +ffffffff836a90c0 D udl_reg_vals_800x600_60 +ffffffff836a90e0 D udl_reg_vals_800x600_72 +ffffffff836a9100 D udl_reg_vals_800x600_74 +ffffffff836a9120 D udl_reg_vals_800x600_75 +ffffffff836a9140 D udl_reg_vals_1024x768_60 +ffffffff836a9160 D udl_reg_vals_1024x768_70 +ffffffff836a9180 D udl_reg_vals_1024x768_75 +ffffffff836a91a0 D udl_reg_vals_1280x800_60 +ffffffff836a91c0 D udl_reg_vals_1280x960_60 +ffffffff836a91e0 D udl_reg_vals_1280x1024_60 +ffffffff836a9200 D udl_reg_vals_1280x1024_75 +ffffffff836a9220 D udl_reg_vals_1366x768_60 +ffffffff836a9240 D udl_reg_vals_1440x900_60 +ffffffff836a9260 D udl_reg_vals_1440x900_59 +ffffffff836a9280 D udl_reg_vals_1440x900_75 +ffffffff836a92a0 D udl_reg_vals_1680x1050_60 +ffffffff836a92c0 D udl_reg_vals_1600x1200_60 +ffffffff836a92e0 D udl_reg_vals_1920x1080_60 +ffffffff836a9300 D udl_null_key_1 +ffffffff836a9310 D udl_decomp_table +ffffffff836aa510 D udl_cd +ffffffff836aa530 D udl_stdscreen +ffffffff836aa560 D udl_scrlist +ffffffff836aa568 D udl_screenlist +ffffffff836aa578 D udl_accessops +ffffffff836ab000 D umidi_cd +ffffffff836ac000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff836ac020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff836ac040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff836ac060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff836ac080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff836ac0a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff836ac0c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff836ac0e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff836ac100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff836ac120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff836ac140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff836ac160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff836ac180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff836ac1a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff836ac1c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff836ac1e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff836ac200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff836ac220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff836ac240 D umidi_quirklist +ffffffff836ac4a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff836ac4c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff836ac4d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff836ac4f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff836ac500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff836ac520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff836ac530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff836ac550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff836ac560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff836ac580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff836ac590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff836ac5b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff836ac5c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff836ac5e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff836ac5f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff836ac610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff836ac620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff836ac640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff836ac650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff836ac670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff836ac680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff836ac6a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff836ac6b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff836ac6d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff836ac6e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff836ac700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff836ac710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff836ac730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff836ac740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff836ac760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff836ac770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff836ac790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff836ac7a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff836ac7c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff836ac7d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff836ac7f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff836ad000 D ucom_cd +ffffffff836ad020 D sysctl_ucomlock +ffffffff836ae000 D ugen_cd +ffffffff836af000 D uhidev_cd +ffffffff836af020 d uhidev_use_rdesc.reportbuf +ffffffff836b0000 D uhid_cd +ffffffff836b1000 D fido_cd +ffffffff836b2000 D ujoy_cd +ffffffff836b3000 D ukbd_cd +ffffffff836b4000 D ums_cd +ffffffff836b4020 d ums_fix_elecom_descriptor.match +ffffffff836b5000 D umt_cd +ffffffff836b6000 D def_scale +ffffffff836b6020 D uts_cd +ffffffff836b7000 D ubcmtp_cd +ffffffff836b7020 d ubcmtp_wsmousecfg +ffffffff836b8000 D ucycom_cd +ffffffff836b9000 D uslhcom_cd +ffffffff836ba000 D ulpt_fwdevs +ffffffff836ba060 D ulpt_cd +ffffffff836ba080 D ulptusein +ffffffff836bb000 D umass_cd +ffffffff836bb020 d umass_bbb_transfer.dCBWtag +ffffffff836bc000 D uthum_cd +ffffffff836bd000 D ugold_cd +ffffffff836bd020 d cmd_init +ffffffff836bd028 d cmd_type +ffffffff836bd030 d cmd_data +ffffffff836be000 D utrh_cd +ffffffff836bf000 D uoakrh_cd +ffffffff836c0000 D uoaklux_cd +ffffffff836c1000 D uoakv_cd +ffffffff836c2000 D uonerng_cd +ffffffff836c3000 D urng_cd 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acpipci_cd +ffffffff8374f020 D acpipci_hids +ffffffff8374f040 d acpipci_osc.uuid +ffffffff83750000 D efi_cd +ffffffff83751000 D vmm_cd +ffffffff83752000 D vmm_hv_signature +ffffffff83753000 D sdmmc_cd +ffffffff83754000 D bwfm_sdio_bus_ops +ffffffff83754028 D bwfm_sdio_buscore_ops +ffffffff83755000 D onewire_cd +ffffffff83756000 D owid_cd +ffffffff83757000 D owsbm_cd +ffffffff83758000 D owtemp_cd +ffffffff83759000 D owctr_cd +ffffffff8375a000 D hz +ffffffff8375a004 D tick +ffffffff8375a008 D tick_nsec +ffffffff8375a00c D initialvnodes +ffffffff8375a010 D maxprocess +ffffffff8375a014 D maxthread +ffffffff8375a018 D maxfiles +ffffffff8375a020 D nmbclust +ffffffff8375a028 D bufcachepercent +ffffffff8375a02c D fscale +ffffffff8375a030 D shminfo +ffffffff8375a044 D seminfo +ffffffff8375b000 D extraloc +ffffffff8375b100 D rextraloc +ffffffff8375b110 D locnames +ffffffff8375b1f0 D locnamp +ffffffff8375b410 D pv_size +ffffffff8375b420 D pv +ffffffff8375b650 d loc +ffffffff8375bae0 D cfdata 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B pf_fragqueue +ffffffff837836b0 B pf_frag_mtx +ffffffff837836c0 B pf_frnode_tree +ffffffff83784000 B pf_anchors +ffffffff83784008 B pf_main_anchor +ffffffff83784510 B pf_anchor_pl +ffffffff83785000 B pf_ioctl_trans +ffffffff83785008 B pf_default_rule +ffffffff83785548 B pf_tag_pl +ffffffff837856f0 B pf_default_rule_new +ffffffff83785c30 B pf_anchor_stack +ffffffff83785c38 B pf_trans_set +ffffffff83785c60 B pf_tcount +ffffffff83787000 B pfr_ktable_pl +ffffffff837871b0 B pfr_kentry_pl +ffffffff837876a8 B pfr_kcounters_pl +ffffffff83787850 B pfr_ffaddr +ffffffff83787860 B pfr_nulltable +ffffffff83787c88 B pfr_ktables +ffffffff83787c90 B pfr_ktable_cnt +ffffffff83787c94 B pfr_mask +ffffffff83788000 B pf_osfp_list +ffffffff83788008 B pf_osfp_entry_pl +ffffffff837881b0 B pf_osfp_pl +ffffffff83789000 B pfi_all +ffffffff83789008 B pfi_addr_pl +ffffffff837891b0 B pfi_buffer_max +ffffffff837891b8 B pfi_buffer +ffffffff837891c0 B pfi_ifs +ffffffff837891c8 B pfi_buffer_cnt +ffffffff8378a000 b pf_syncookie_status +ffffffff8378b000 B hfsc_class_pl +ffffffff8378b1a8 B hfsc_internal_sc_pl +ffffffff8378c000 B pflog_ifs +ffffffff8378d000 b pfsynccounters +ffffffff8378d008 b pfsyncif +ffffffff8378d010 b pfsync_deferrals_pool +ffffffff8378e000 B pflowif_list +ffffffff8378e008 B pflow_counters +ffffffff8378f000 B bios +ffffffff83790000 b opened +ffffffff83790004 b evqueue_head +ffffffff83790008 b evqueue_tail +ffffffff8379000c b evqueue_count +ffffffff83790010 b hotplug_klist +ffffffff83790030 b evqueue +ffffffff83791000 B pppoe_softc_list +ffffffff83792000 B dt_tracing +ffffffff83792008 B dtdev_list +ffffffff83792010 B dt_probe_list +ffffffff83792020 B dt_nprobes +ffffffff83792024 B allowdt +ffffffff83792028 b dt_dev_register_probe.probe_nb +ffffffff83793000 B dtpp_profile +ffffffff83793008 B dtpp_interval +ffffffff83794000 B dtps_entry +ffffffff83794008 B dtps_return +ffffffff83795000 B dtps_index_refcnt +ffffffff83796000 B db_break_table +ffffffff83796c80 B db_free_breakpoints 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