--- 7.6/2024-11-01T07:17:09Z/2024-10-06T00:00:00Z/nm-bsd-ot14.txt	Fri Nov  1 22:49:59 2024
+++ 7.6/2024-11-01T07:17:09Z/2024-10-07T00:00:00Z/nm-bsd-ot14.txt	Sat Nov  2 01:24:57 2024
@@ -2,14 +2,14 @@
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 0001418f A acpi_pdirpa
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-02835000 C __kernel_cptext_phys
-02836000 C __kernel_rodata_phys
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-03144000 C __kernel_randomdata_phys
-033fe000 R __kernel_data_phys
-0375c000 D __kernel_kudata_phys
-0375d000 C __kernel_bss_phys
+02833000 T __kernel_kutext_phys
+02836000 C __kernel_cptext_phys
+02837000 C __kernel_rodata_phys
+03143000 R __kernel_kutext_page_phys
+03145000 C __kernel_randomdata_phys
+033ff000 R __kernel_data_phys
+0375d000 D __kernel_kudata_phys
+0375e000 C __kernel_bss_phys
 03c00000 B __kernel_phys_end
 80000000 A __kernel_virt_to_phys
 ffffffff80000000 A __kernel_base
@@ -13840,25 +13840,25 @@ ffffffff81725890 T mp_cpu_start
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-ffffffff81727790 T cpu_suspend_primary
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+ffffffff817264e0 T cpu_fix_msrs
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+ffffffff817276d0 T cpu_suspend_cycle
+ffffffff81727700 T cpu_suspend_primary
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 ffffffff81728050 T lapic_hwunmask
 ffffffff817280a0 T lapic_setup
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-ffffffff819d8560 T bnxt_write_rx_doorbell
-ffffffff819d85e0 T bnxt_hwrm_ring_grp_alloc
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-ffffffff8209c000 t sdma_v3_0_early_init
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-ffffffff820a7100 t sdma_v4_0_process_illegal_inst_irq
-ffffffff820a7220 t sdma_v4_0_set_ecc_irq_state
-ffffffff820a73d0 t sdma_v4_0_process_vm_hole_irq
-ffffffff820a7420 t sdma_v4_0_print_iv_entry
-ffffffff820a7570 t sdma_v4_0_process_doorbell_invalid_irq
-ffffffff820a75c0 t sdma_v4_0_process_pool_timeout_irq
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-ffffffff820ac140 t sdma_v4_4_2_ring_emit_vm_flush
-ffffffff820ac160 t sdma_v4_4_2_ring_emit_hdp_flush
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-ffffffff820ad000 t sdma_v4_4_2_page_ring_set_wptr
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-ffffffff820ad8f0 t sdma_v4_4_2_process_vm_hole_irq
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-ffffffff820b1000 t sdma_v5_0_early_init
-ffffffff820b1130 t sdma_v5_0_sw_init
-ffffffff820b1350 t sdma_v5_0_sw_fini
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-ffffffff820b28c0 t sdma_v5_0_hw_fini
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-ffffffff820b2d80 t sdma_v5_0_set_powergating_state
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-ffffffff820b2e60 t sdma_v5_0_ring_get_rptr
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-ffffffff820b4180 t sdma_v5_0_ring_test_ring
-ffffffff820b45b0 t sdma_v5_0_ring_test_ib
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-ffffffff820b4bb0 t sdma_v5_0_ring_init_cond_exec
-ffffffff820b4e00 t sdma_v5_0_ring_patch_cond_exec
-ffffffff820b4ec0 t sdma_v5_0_ring_emit_wreg
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-ffffffff820b5920 t sdma_v5_0_vm_write_pte
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-ffffffff820bbb90 t sdma_v5_2_ring_begin_use
-ffffffff820bbbb0 t sdma_v5_2_ring_end_use
-ffffffff820bbbd0 t sdma_v5_2_ring_emit_wreg
-ffffffff820bbd30 t sdma_v5_2_ring_emit_reg_wait
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-ffffffff820bc220 t sdma_v5_2_ring_emit_mem_sync
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-ffffffff820bc830 t sdma_v5_2_set_trap_irq_state
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-ffffffff820bca60 t sdma_v5_2_process_illegal_inst_irq
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-ffffffff820bcfd0 t sdma_v5_2_enable
-ffffffff820be000 t sdma_v6_0_early_init
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-ffffffff820be510 t sdma_v6_0_resume
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-ffffffff820bf1e0 t sdma_v6_0_ring_emit_ib
-ffffffff820bf4e0 t sdma_v6_0_ring_emit_fence
-ffffffff820bf990 t sdma_v6_0_ring_emit_pipeline_sync
-ffffffff820bfc40 t sdma_v6_0_ring_emit_vm_flush
-ffffffff820bfee0 t sdma_v6_0_ring_emit_hdp_flush
-ffffffff820c01b0 t sdma_v6_0_ring_test_ring
-ffffffff820c05e0 t sdma_v6_0_ring_test_ib
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-ffffffff820c0e30 t sdma_v6_0_ring_patch_cond_exec
-ffffffff820c0ef0 t sdma_v6_0_ring_emit_wreg
-ffffffff820c1050 t sdma_v6_0_ring_emit_reg_wait
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-ffffffff820c1d20 t sdma_v6_0_process_illegal_inst_irq
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-ffffffff820c4000 T sienna_cichlid_reset_init
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-ffffffff820c4430 t sienna_cichlid_mode2_restore_hwcontext
-ffffffff820c47a0 t sienna_cichlid_mode2_reset
-ffffffff820c5000 T smu_v11_0_i2c_control_init
-ffffffff820c50e0 T smu_v11_0_i2c_control_fini
-ffffffff820c5120 t smu_v11_0_i2c_xfer
-ffffffff820c6490 t smu_v11_0_i2c_func
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-ffffffff820c6620 t smu_v11_0_i2c_abort
-ffffffff820c6740 t lock_bus
-ffffffff820c67f0 t trylock_bus
-ffffffff820c6850 t unlock_bus
-ffffffff820c7000 T smu_v13_0_10_reset_init
-ffffffff820c70e0 t smu_v13_0_10_async_reset
-ffffffff820c7140 t smu_v13_0_10_get_reset_handler
-ffffffff820c71f0 T smu_v13_0_10_reset_fini
-ffffffff820c7250 t smu_v13_0_10_mode2_prepare_hwcontext
-ffffffff820c73a0 t smu_v13_0_10_mode2_perform_reset
-ffffffff820c7430 t smu_v13_0_10_mode2_restore_hwcontext
-ffffffff820c7820 t smu_v13_0_10_mode2_reset
-ffffffff820c8000 t smuio_v11_0_get_rom_index_offset
-ffffffff820c8040 t smuio_v11_0_get_rom_data_offset
-ffffffff820c8080 t smuio_v11_0_update_rom_clock_gating
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+ffffffff8204f870 t jpeg_v4_0_3_process_interrupt
+ffffffff8204fb20 t jpeg_v4_0_3_query_ras_error_count
+ffffffff8204fc40 t jpeg_v4_0_3_reset_ras_error_count
+ffffffff8204fd50 t jpeg_v4_0_3_disable_clock_gating
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+ffffffff82086080 t nbio_v7_7_get_pcie_index_offset
+ffffffff820860c0 t nbio_v7_7_get_pcie_data_offset
+ffffffff82086100 t nbio_v7_7_get_pcie_port_index_offset
+ffffffff82086130 t nbio_v7_7_get_pcie_port_data_offset
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+ffffffff82086210 t nbio_v7_7_mc_access_enable
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+ffffffff82086550 t nbio_v7_7_enable_doorbell_selfring_aperture
+ffffffff820866d0 t nbio_v7_7_ih_doorbell_range
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+ffffffff82086950 t nbio_v7_7_update_medium_grain_light_sleep
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+ffffffff82088000 t nbio_v7_9_get_hdp_flush_req_offset
+ffffffff82088040 t nbio_v7_9_get_hdp_flush_done_offset
+ffffffff82088080 t nbio_v7_9_get_pcie_index_offset
+ffffffff820880c0 t nbio_v7_9_get_pcie_data_offset
+ffffffff82088100 t nbio_v7_9_get_pcie_index_hi_offset
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+ffffffff82088b50 t nbio_v7_9_ih_doorbell_range
+ffffffff82088c70 t nbio_v7_9_enable_doorbell_interrupt
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+ffffffff82088dc0 t nbio_v7_9_update_medium_grain_light_sleep
+ffffffff82088df0 t nbio_v7_9_get_clockgating_state
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+ffffffff82089440 t nbio_v7_9_get_compute_partition_mode
+ffffffff820894e0 t nbio_v7_9_get_memory_partition_mode
+ffffffff820895e0 t nbio_v7_9_get_pcie_replay_count
+ffffffff82089640 t nbio_v7_9_get_pcie_usage
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+ffffffff82089830 t nbio_v7_9_handle_ras_controller_intr_no_bifring
+ffffffff82089980 t nbio_v7_9_handle_ras_err_event_athub_intr_no_bifring
+ffffffff82089ac0 t nbio_v7_9_init_ras_controller_interrupt
+ffffffff82089b00 t nbio_v7_9_init_ras_err_event_athub_interrupt
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+ffffffff82089ba0 t nbio_v7_9_set_ras_err_event_athub_irq_state
+ffffffff82089bd0 t nbio_v7_9_process_err_event_athub_irq
+ffffffff8208a000 T nv_grbm_select
+ffffffff8208a0a0 T nv_set_virt_ops
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+ffffffff8208a5f0 t nv_common_sw_fini
+ffffffff8208a620 t nv_common_hw_init
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+ffffffff8208b380 t nv_query_video_codecs
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+ffffffff8208c030 t psp_v10_0_init_microcode
+ffffffff8208c120 t psp_v10_0_ring_create
+ffffffff8208c510 t psp_v10_0_ring_stop
+ffffffff8208c7c0 t psp_v10_0_ring_destroy
+ffffffff8208c850 t psp_v10_0_mode1_reset
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+ffffffff8208c900 t psp_v10_0_ring_set_wptr
+ffffffff8208d000 T psp_v11_0_set_psp_funcs
+ffffffff8208d030 t psp_v11_0_init_microcode
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+ffffffff8208d200 t psp_v11_0_bootloader_load_spl
+ffffffff8208d220 t psp_v11_0_bootloader_load_sysdrv
+ffffffff8208d240 t psp_v11_0_bootloader_load_sos
+ffffffff8208d690 t psp_v11_0_ring_create
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+ffffffff8208e1f0 t psp_v11_0_ring_destroy
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+ffffffff8208e3b0 t psp_v11_0_memory_training
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+ffffffff8208eaf0 t psp_v11_0_load_usbc_pd_fw
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+ffffffff8208ee60 t psp_v11_0_bootloader_load_component
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+ffffffff8208f270 t psp_v11_0_memory_training_send_msg
+ffffffff82090000 T psp_v11_0_8_set_psp_funcs
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+ffffffff82090eb0 t psp_v11_0_8_ring_set_wptr
+ffffffff82091000 T psp_v12_0_set_psp_funcs
+ffffffff82091030 t psp_v12_0_init_microcode
+ffffffff82091100 t psp_v12_0_bootloader_load_sysdrv
+ffffffff82091520 t psp_v12_0_bootloader_load_sos
+ffffffff82091990 t psp_v12_0_ring_create
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+ffffffff820929e0 t psp_v12_0_mode1_reset
+ffffffff82092b10 t psp_v12_0_ring_get_wptr
+ffffffff82092b80 t psp_v12_0_ring_set_wptr
+ffffffff82093000 T psp_v13_0_set_psp_funcs
+ffffffff82093030 t psp_v13_0_init_microcode
+ffffffff82093160 t psp_v13_0_wait_for_bootloader_steady_state
+ffffffff82093290 t psp_v13_0_bootloader_load_kdb
+ffffffff820932b0 t psp_v13_0_bootloader_load_spl
+ffffffff820932d0 t psp_v13_0_bootloader_load_sysdrv
+ffffffff820932f0 t psp_v13_0_bootloader_load_soc_drv
+ffffffff82093310 t psp_v13_0_bootloader_load_intf_drv
+ffffffff82093330 t psp_v13_0_bootloader_load_dbg_drv
+ffffffff82093350 t psp_v13_0_bootloader_load_ras_drv
+ffffffff82093370 t psp_v13_0_bootloader_load_sos
+ffffffff82093830 t psp_v13_0_ring_create
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+ffffffff82094b90 t psp_v13_0_ring_set_wptr
+ffffffff82094ca0 t psp_v13_0_load_usbc_pd_fw
+ffffffff82094ed0 t psp_v13_0_read_usbc_pd_fw
+ffffffff82095010 t psp_v13_0_update_spirom
+ffffffff82095230 t psp_v13_0_vbflash_status
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+ffffffff82095830 t psp_v13_0_exec_spi_cmd
+ffffffff82096000 T psp_v13_0_4_set_psp_funcs
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+ffffffff82096170 t psp_v13_0_4_bootloader_load_intf_drv
+ffffffff82096190 t psp_v13_0_4_bootloader_load_dbg_drv
+ffffffff820961b0 t psp_v13_0_4_bootloader_load_sos
+ffffffff82096620 t psp_v13_0_4_ring_create
+ffffffff82096eb0 t psp_v13_0_4_ring_stop
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+ffffffff820974c0 t psp_v13_0_4_ring_set_wptr
+ffffffff820975e0 t psp_v13_0_4_bootloader_load_component
+ffffffff820977f0 t psp_v13_0_4_wait_for_bootloader
+ffffffff82098000 T psp_v3_1_set_psp_funcs
+ffffffff82098030 t psp_v3_1_init_microcode
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+ffffffff82098510 t psp_v3_1_bootloader_load_sos
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+ffffffff82099840 t psp_v3_1_ring_stop
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+ffffffff82099bb0 t psp_v3_1_smu_reload_quirk
+ffffffff82099c00 t psp_v3_1_mode1_reset
+ffffffff82099d30 t psp_v3_1_ring_get_wptr
+ffffffff82099d80 t psp_v3_1_ring_set_wptr
+ffffffff8209a000 t sdma_v2_4_early_init
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+ffffffff8209ab50 t sdma_v2_4_is_idle
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+ffffffff8209ac50 t sdma_v2_4_soft_reset
+ffffffff8209ae00 t sdma_v2_4_set_clockgating_state
+ffffffff8209ae30 t sdma_v2_4_set_powergating_state
+ffffffff8209ae60 t sdma_v2_4_ring_get_rptr
+ffffffff8209aea0 t sdma_v2_4_ring_get_wptr
+ffffffff8209af00 t sdma_v2_4_ring_set_wptr
+ffffffff8209af40 t sdma_v2_4_ring_emit_ib
+ffffffff8209b220 t sdma_v2_4_ring_emit_fence
+ffffffff8209b670 t sdma_v2_4_ring_emit_pipeline_sync
+ffffffff8209b920 t sdma_v2_4_ring_emit_vm_flush
+ffffffff8209bbd0 t sdma_v2_4_ring_emit_hdp_flush
+ffffffff8209be80 t sdma_v2_4_ring_test_ring
+ffffffff8209c1b0 t sdma_v2_4_ring_test_ib
+ffffffff8209c3c0 t sdma_v2_4_ring_insert_nop
+ffffffff8209c500 t sdma_v2_4_ring_pad_ib
+ffffffff8209c630 t sdma_v2_4_ring_emit_wreg
+ffffffff8209c790 t sdma_v2_4_emit_copy_buffer
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+ffffffff8209c8e0 t sdma_v2_4_vm_copy_pte
+ffffffff8209c9a0 t sdma_v2_4_vm_write_pte
+ffffffff8209ca70 t sdma_v2_4_vm_set_pte_pde
+ffffffff8209cb70 t sdma_v2_4_set_trap_irq_state
+ffffffff8209cc60 t sdma_v2_4_process_trap_irq
+ffffffff8209cd00 t sdma_v2_4_process_illegal_inst_irq
+ffffffff8209cd80 t sdma_v2_4_enable
+ffffffff8209d000 t sdma_v3_0_early_init
+ffffffff8209d100 t sdma_v3_0_sw_init
+ffffffff8209d530 t sdma_v3_0_sw_fini
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+ffffffff8209d770 t sdma_v3_0_hw_fini
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+ffffffff8209d940 t sdma_v3_0_check_soft_reset
+ffffffff8209d9a0 t sdma_v3_0_pre_soft_reset
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+ffffffff8209db00 t sdma_v3_0_post_soft_reset
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+ffffffff8209de30 t sdma_v3_0_get_clockgating_state
+ffffffff8209ded0 t sdma_v3_0_ring_get_rptr
+ffffffff8209df10 t sdma_v3_0_ring_get_wptr
+ffffffff8209df90 t sdma_v3_0_ring_set_wptr
+ffffffff8209e040 t sdma_v3_0_ring_emit_ib
+ffffffff8209e320 t sdma_v3_0_ring_emit_fence
+ffffffff8209e770 t sdma_v3_0_ring_emit_pipeline_sync
+ffffffff8209ea20 t sdma_v3_0_ring_emit_vm_flush
+ffffffff8209ecd0 t sdma_v3_0_ring_emit_hdp_flush
+ffffffff8209ef80 t sdma_v3_0_ring_test_ring
+ffffffff8209f2b0 t sdma_v3_0_ring_test_ib
+ffffffff8209f4c0 t sdma_v3_0_ring_insert_nop
+ffffffff8209f600 t sdma_v3_0_ring_pad_ib
+ffffffff8209f730 t sdma_v3_0_ring_emit_wreg
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+ffffffff8209fe00 t sdma_v3_0_process_illegal_inst_irq
+ffffffff8209fe80 t sdma_v3_0_ctx_switch_enable
+ffffffff820a0050 t sdma_v3_0_enable
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+ffffffff820a1000 t sdma_v4_0_early_init
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+ffffffff820a51c0 t sdma_v4_0_soft_reset
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+ffffffff820a5800 t sdma_v4_0_get_clockgating_state
+ffffffff820a58b0 t sdma_v4_0_query_ras_error_count
+ffffffff820a5aa0 t sdma_v4_0_reset_ras_error_count
+ffffffff820a5c20 t sdma_v4_0_ring_get_rptr
+ffffffff820a5c80 t sdma_v4_0_ring_get_wptr
+ffffffff820a5e90 t sdma_v4_0_ring_set_wptr
+ffffffff820a6140 t sdma_v4_0_ring_emit_ib
+ffffffff820a6420 t sdma_v4_0_ring_emit_fence
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+ffffffff820a68f0 t sdma_v4_0_ring_emit_vm_flush
+ffffffff820a6910 t sdma_v4_0_ring_emit_hdp_flush
+ffffffff820a69d0 t sdma_v4_0_ring_test_ring
+ffffffff820a6d00 t sdma_v4_0_ring_test_ib
+ffffffff820a6f10 t sdma_v4_0_ring_insert_nop
+ffffffff820a7050 t sdma_v4_0_ring_pad_ib
+ffffffff820a7180 t sdma_v4_0_ring_emit_wreg
+ffffffff820a72e0 t sdma_v4_0_ring_emit_reg_wait
+ffffffff820a7330 t sdma_v4_0_wait_reg_mem
+ffffffff820a7680 t sdma_v4_0_page_ring_get_wptr
+ffffffff820a7840 t sdma_v4_0_page_ring_set_wptr
+ffffffff820a7a10 t sdma_v4_0_emit_copy_buffer
+ffffffff820a7ad0 t sdma_v4_0_emit_fill_buffer
+ffffffff820a7b60 t sdma_v4_0_vm_copy_pte
+ffffffff820a7c20 t sdma_v4_0_vm_write_pte
+ffffffff820a7cf0 t sdma_v4_0_vm_set_pte_pde
+ffffffff820a7df0 t sdma_v4_0_set_trap_irq_state
+ffffffff820a7fa0 t sdma_v4_0_process_trap_irq
+ffffffff820a8100 t sdma_v4_0_process_illegal_inst_irq
+ffffffff820a8220 t sdma_v4_0_set_ecc_irq_state
+ffffffff820a83d0 t sdma_v4_0_process_vm_hole_irq
+ffffffff820a8420 t sdma_v4_0_print_iv_entry
+ffffffff820a8570 t sdma_v4_0_process_doorbell_invalid_irq
+ffffffff820a85c0 t sdma_v4_0_process_pool_timeout_irq
+ffffffff820a8610 t sdma_v4_0_process_srbm_write_irq
+ffffffff820a8660 t sdma_v4_0_process_ras_data_cb
+ffffffff820a86e0 t sdma_v4_0_ctx_switch_enable
+ffffffff820a8e00 t sdma_v4_0_enable
+ffffffff820a93f0 t sdma_v4_0_gfx_enable
+ffffffff820aa000 t sdma_v4_4_query_ras_error_count
+ffffffff820aa2b0 t sdma_v4_4_reset_ras_error_count
+ffffffff820ab000 t sdma_v4_4_2_early_init
+ffffffff820ab2b0 t sdma_v4_4_2_late_init
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+ffffffff820aba40 t sdma_v4_4_2_hw_fini
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+ffffffff820abe60 t sdma_v4_4_2_soft_reset
+ffffffff820abe90 t sdma_v4_4_2_set_clockgating_state
+ffffffff820ac350 t sdma_v4_4_2_set_powergating_state
+ffffffff820ac380 t sdma_v4_4_2_get_clockgating_state
+ffffffff820ac480 t sdma_v4_4_2_xcp_suspend
+ffffffff820ac570 t sdma_v4_4_2_xcp_resume
+ffffffff820ac5b0 t sdma_v4_4_2_ring_get_rptr
+ffffffff820ac630 t sdma_v4_4_2_ring_get_wptr
+ffffffff820ac790 t sdma_v4_4_2_ring_set_wptr
+ffffffff820ac990 t sdma_v4_4_2_ring_emit_ib
+ffffffff820acc70 t sdma_v4_4_2_ring_emit_fence
+ffffffff820ad0e0 t sdma_v4_4_2_ring_emit_pipeline_sync
+ffffffff820ad140 t sdma_v4_4_2_ring_emit_vm_flush
+ffffffff820ad160 t sdma_v4_4_2_ring_emit_hdp_flush
+ffffffff820ad230 t sdma_v4_4_2_ring_test_ring
+ffffffff820ad560 t sdma_v4_4_2_ring_test_ib
+ffffffff820ad770 t sdma_v4_4_2_ring_insert_nop
+ffffffff820ad8b0 t sdma_v4_4_2_ring_pad_ib
+ffffffff820ad9e0 t sdma_v4_4_2_ring_emit_wreg
+ffffffff820adb40 t sdma_v4_4_2_ring_emit_reg_wait
+ffffffff820adb90 t sdma_v4_4_2_wait_reg_mem
+ffffffff820adee0 t sdma_v4_4_2_page_ring_get_wptr
+ffffffff820ae000 t sdma_v4_4_2_page_ring_set_wptr
+ffffffff820ae130 t sdma_v4_4_2_emit_copy_buffer
+ffffffff820ae1f0 t sdma_v4_4_2_emit_fill_buffer
+ffffffff820ae280 t sdma_v4_4_2_vm_copy_pte
+ffffffff820ae340 t sdma_v4_4_2_vm_write_pte
+ffffffff820ae410 t sdma_v4_4_2_vm_set_pte_pde
+ffffffff820ae510 t sdma_v4_4_2_set_trap_irq_state
+ffffffff820ae610 t sdma_v4_4_2_process_trap_irq
+ffffffff820ae740 t sdma_v4_4_2_process_illegal_inst_irq
+ffffffff820ae7e0 t sdma_v4_4_2_set_ecc_irq_state
+ffffffff820ae8f0 t sdma_v4_4_2_process_vm_hole_irq
+ffffffff820ae9e0 t sdma_v4_4_2_process_doorbell_invalid_irq
+ffffffff820aead0 t sdma_v4_4_2_process_pool_timeout_irq
+ffffffff820aebc0 t sdma_v4_4_2_process_srbm_write_irq
+ffffffff820aecb0 t sdma_v4_4_2_query_ras_error_count
+ffffffff820aee30 t sdma_v4_4_2_reset_ras_error_count
+ffffffff820aefa0 t sdma_v4_4_2_inst_init_golden_registers
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+ffffffff820b0cf0 t sdma_v4_4_2_inst_enable
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+ffffffff820b3b30 t sdma_v5_0_soft_reset
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+ffffffff820b3d80 t sdma_v5_0_set_powergating_state
+ffffffff820b3db0 t sdma_v5_0_get_clockgating_state
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+ffffffff820b3ec0 t sdma_v5_0_ring_get_wptr
+ffffffff820b4080 t sdma_v5_0_ring_set_wptr
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+ffffffff820b4e90 t sdma_v5_0_ring_emit_vm_flush
+ffffffff820b4eb0 t sdma_v5_0_ring_emit_hdp_flush
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+ffffffff820b5a80 t sdma_v5_0_ring_pad_ib
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+ffffffff820b5e00 t sdma_v5_0_ring_patch_cond_exec
+ffffffff820b5ec0 t sdma_v5_0_ring_emit_wreg
+ffffffff820b6020 t sdma_v5_0_ring_emit_reg_wait
+ffffffff820b62c0 t sdma_v5_0_ring_emit_reg_write_reg_wait
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+ffffffff820b64e0 t sdma_v5_0_ring_emit_mem_sync
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+ffffffff820b6920 t sdma_v5_0_vm_write_pte
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+ffffffff820b6b90 t sdma_v5_0_process_trap_irq
+ffffffff820b6cd0 t sdma_v5_0_process_illegal_inst_irq
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+ffffffff820b6df0 t sdma_v5_0_ctx_switch_enable
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+ffffffff820ba8c0 t sdma_v5_2_set_clockgating_state
+ffffffff820bac60 t sdma_v5_2_set_powergating_state
+ffffffff820bac90 t sdma_v5_2_get_clockgating_state
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+ffffffff820bada0 t sdma_v5_2_ring_get_wptr
+ffffffff820baef0 t sdma_v5_2_ring_set_wptr
+ffffffff820bb0d0 t sdma_v5_2_ring_emit_ib
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+ffffffff820bbb30 t sdma_v5_2_ring_emit_vm_flush
+ffffffff820bbb50 t sdma_v5_2_ring_emit_hdp_flush
+ffffffff820bbe50 t sdma_v5_2_ring_test_ring
+ffffffff820bc280 t sdma_v5_2_ring_test_ib
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+ffffffff820bc750 t sdma_v5_2_ring_pad_ib
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+ffffffff820bcad0 t sdma_v5_2_ring_patch_cond_exec
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+ffffffff820bcfd0 t sdma_v5_2_ring_emit_reg_write_reg_wait
+ffffffff820bd060 t sdma_v5_2_ring_preempt_ib
+ffffffff820bd220 t sdma_v5_2_ring_emit_mem_sync
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+ffffffff820bd660 t sdma_v5_2_vm_write_pte
+ffffffff820bd730 t sdma_v5_2_vm_set_pte_pde
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+ffffffff820bda60 t sdma_v5_2_process_illegal_inst_irq
+ffffffff820bda90 t sdma_v5_2_mqd_init
+ffffffff820bdb80 t sdma_v5_2_ctx_switch_enable
+ffffffff820bdfd0 t sdma_v5_2_enable
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+ffffffff820bf6a0 t sdma_v6_0_check_soft_reset
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+ffffffff820bfcf0 t sdma_v6_0_set_powergating_state
+ffffffff820bfd20 t sdma_v6_0_get_clockgating_state
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+ffffffff820bfdb0 t sdma_v6_0_ring_get_wptr
+ffffffff820bfe30 t sdma_v6_0_ring_set_wptr
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+ffffffff820c0c40 t sdma_v6_0_ring_emit_vm_flush
+ffffffff820c0ee0 t sdma_v6_0_ring_emit_hdp_flush
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+ffffffff820c15e0 t sdma_v6_0_ring_test_ib
+ffffffff820c1970 t sdma_v6_0_ring_insert_nop
+ffffffff820c1ab0 t sdma_v6_0_ring_pad_ib
+ffffffff820c1be0 t sdma_v6_0_ring_init_cond_exec
+ffffffff820c1e30 t sdma_v6_0_ring_patch_cond_exec
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+ffffffff820c22f0 t sdma_v6_0_ring_emit_reg_write_reg_wait
+ffffffff820c2380 t sdma_v6_0_ring_preempt_ib
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+ffffffff820c2740 t sdma_v6_0_emit_copy_buffer
+ffffffff820c2800 t sdma_v6_0_emit_fill_buffer
+ffffffff820c2890 t sdma_v6_0_vm_copy_pte
+ffffffff820c2950 t sdma_v6_0_vm_write_pte
+ffffffff820c2a20 t sdma_v6_0_vm_set_pte_pde
+ffffffff820c2b20 t sdma_v6_0_set_trap_irq_state
+ffffffff820c2bc0 t sdma_v6_0_process_trap_irq
+ffffffff820c2d20 t sdma_v6_0_process_illegal_inst_irq
+ffffffff820c2d50 t sdma_v6_0_mqd_init
+ffffffff820c2e80 t sdma_v6_0_start
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+ffffffff820c3380 t sdma_v6_0_gfx_resume
+ffffffff820c45c0 t sdma_v6_0_gfx_stop
+ffffffff820c5000 T sienna_cichlid_reset_init
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+ffffffff820c5140 t sienna_cichlid_get_reset_handler
+ffffffff820c51d0 T sienna_cichlid_reset_fini
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+ffffffff820c5430 t sienna_cichlid_mode2_restore_hwcontext
+ffffffff820c57a0 t sienna_cichlid_mode2_reset
+ffffffff820c6000 T smu_v11_0_i2c_control_init
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+ffffffff820c74c0 t smu_v11_0_i2c_enable
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+ffffffff820c7740 t lock_bus
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+ffffffff820c80e0 t smu_v13_0_10_async_reset
+ffffffff820c8140 t smu_v13_0_10_get_reset_handler
+ffffffff820c81f0 T smu_v13_0_10_reset_fini
+ffffffff820c8250 t smu_v13_0_10_mode2_prepare_hwcontext
+ffffffff820c83a0 t smu_v13_0_10_mode2_perform_reset
+ffffffff820c8430 t smu_v13_0_10_mode2_restore_hwcontext
+ffffffff820c8820 t smu_v13_0_10_mode2_reset
+ffffffff820c9000 t smuio_v11_0_get_rom_index_offset
+ffffffff820c9040 t smuio_v11_0_get_rom_data_offset
+ffffffff820c9080 t smuio_v11_0_update_rom_clock_gating
+ffffffff820c91d0 t smuio_v11_0_get_clock_gating_state
+ffffffff820ca000 t smuio_v11_0_6_get_rom_index_offset
+ffffffff820ca040 t smuio_v11_0_6_get_rom_data_offset
+ffffffff820ca080 t smuio_v11_0_6_update_rom_clock_gating
+ffffffff820ca1e0 t smuio_v11_0_6_get_clock_gating_state
+ffffffff820cb000 t smuio_v13_0_get_rom_index_offset
+ffffffff820cb040 t smuio_v13_0_get_rom_data_offset
+ffffffff820cb080 t smuio_v13_0_update_rom_clock_gating
+ffffffff820cb1e0 t smuio_v13_0_get_clock_gating_state
+ffffffff820cb290 t smuio_v13_0_get_die_id
+ffffffff820cb320 t smuio_v13_0_get_socket_id
+ffffffff820cb3c0 t smuio_v13_0_is_host_gpu_xgmi_supported
+ffffffff820cc000 t smuio_v13_0_3_get_die_id
+ffffffff820cc0a0 t smuio_v13_0_3_get_socket_id
+ffffffff820cc140 t smuio_v13_0_3_get_pkg_type
+ffffffff820cd000 t smuio_v13_0_6_get_rom_index_offset
+ffffffff820cd040 t smuio_v13_0_6_get_rom_data_offset
+ffffffff820ce000 t smuio_v9_0_get_rom_index_offset
+ffffffff820ce040 t smuio_v9_0_get_rom_data_offset
+ffffffff820ce080 t smuio_v9_0_update_rom_clock_gating
+ffffffff820ce1e0 t smuio_v9_0_get_clock_gating_state
+ffffffff820cf000 T soc15_grbm_select
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+ffffffff820cf2b0 T soc15_set_virt_ops
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+ffffffff820cf750 t soc15_common_late_init
+ffffffff820cf7c0 t soc15_common_sw_init
+ffffffff820cf820 t soc15_common_sw_fini
+ffffffff820cf880 t soc15_common_hw_init
+ffffffff820cf9d0 t soc15_common_hw_fini
+ffffffff820cfad0 t soc15_common_suspend
+ffffffff820cfb10 t soc15_common_resume
+ffffffff820cfc00 t soc15_common_is_idle
+ffffffff820cfc30 t soc15_common_wait_for_idle
+ffffffff820cfc60 t soc15_common_soft_reset
+ffffffff820cfc90 t soc15_common_set_clockgating_state
+ffffffff820d0040 t soc15_common_set_powergating_state
+ffffffff820d0070 t soc15_common_get_clockgating_state
+ffffffff820d01b0 t soc15_uvd_ctx_rreg
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+ffffffff820d0320 t soc15_didt_rreg
+ffffffff820d03e0 t soc15_didt_wreg
+ffffffff820d0480 t soc15_gc_cac_rreg
+ffffffff820d05d0 t soc15_gc_cac_wreg
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+ffffffff820d0860 t soc15_se_cac_wreg
+ffffffff820d09a0 t soc15_read_disabled_bios
+ffffffff820d09d0 t soc15_read_register
+ffffffff820d0ae0 t soc15_asic_reset
+ffffffff820d0cb0 t soc15_asic_reset_method
+ffffffff820d0e80 t soc15_get_xclk
+ffffffff820d0ef0 t soc15_set_uvd_clocks
+ffffffff820d0f20 t soc15_set_vce_clocks
+ffffffff820d0f50 t soc15_get_config_memsize
+ffffffff820d0f70 t soc15_need_full_reset
+ffffffff820d0fa0 t soc15_get_pcie_usage
+ffffffff820d1110 t soc15_need_reset_on_init
+ffffffff820d11d0 t soc15_get_pcie_replay_count
+ffffffff820d1250 t soc15_supports_baco
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+ffffffff820d12d0 t soc15_query_video_codecs
+ffffffff820d13c0 t vega20_get_pcie_usage
+ffffffff820d2000 T soc21_grbm_select
+ffffffff820d2090 t soc21_common_early_init
+ffffffff820d2210 t soc21_common_late_init
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+ffffffff820d2360 t soc21_common_sw_fini
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+ffffffff820d2470 t soc21_common_hw_fini
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+ffffffff820d25d0 t soc21_common_resume
+ffffffff820d27e0 t soc21_common_is_idle
+ffffffff820d2810 t soc21_common_wait_for_idle
+ffffffff820d2840 t soc21_common_soft_reset
+ffffffff820d2870 t soc21_common_set_clockgating_state
+ffffffff820d2930 t soc21_common_set_powergating_state
+ffffffff820d29a0 t soc21_common_get_clockgating_state
+ffffffff820d29f0 t soc21_didt_rreg
+ffffffff820d2ab0 t soc21_didt_wreg
+ffffffff820d2b50 t soc21_read_disabled_bios
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+ffffffff820d2c80 t soc21_asic_reset
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+ffffffff820d2e80 t soc21_set_uvd_clocks
+ffffffff820d2eb0 t soc21_set_vce_clocks
+ffffffff820d2ee0 t soc21_get_config_memsize
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+ffffffff820d2f30 t soc21_init_doorbell_index
+ffffffff820d3050 t soc21_need_reset_on_init
+ffffffff820d3100 t soc21_pre_asic_init
+ffffffff820d3130 t soc21_update_umd_stable_pstate
+ffffffff820d31b0 t soc21_query_video_codecs
+ffffffff820d4000 t tonga_ih_early_init
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+ffffffff820d48e0 t tonga_ih_post_soft_reset
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+ffffffff820d4960 t tonga_ih_set_powergating_state
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+ffffffff820d4b40 t tonga_ih_set_rptr
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+ffffffff820d7000 T umc_v6_7_convert_error_address
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+ffffffff820d73e0 t umc_v6_7_query_ras_error_address
+ffffffff820d7400 t umc_v6_7_query_ras_poison_mode
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+ffffffff820d7480 t umc_v6_7_ecc_info_query_ras_error_address
+ffffffff820d74a0 t umc_v6_7_query_ecc_error_count
+ffffffff820d77a0 t umc_v6_7_reset_error_count_per_channel
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+ffffffff820d7a10 t umc_v6_7_ecc_info_querry_ecc_error_count
+ffffffff820d7c20 t umc_v6_7_ecc_info_query_error_address
+ffffffff820d8000 t umc_v8_10_query_ras_error_count
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+ffffffff820d80b0 t umc_v8_10_ecc_info_query_ras_error_count
+ffffffff820d80d0 t umc_v8_10_ecc_info_query_ras_error_address
+ffffffff820d80f0 t umc_v8_10_set_eeprom_table_version
+ffffffff820d8120 t umc_v8_10_query_ecc_error_count
+ffffffff820d8200 t umc_v8_10_clear_error_count_per_channel
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+ffffffff820d86b0 t umc_v8_10_ecc_info_query_ecc_error_count
+ffffffff820d87a0 t umc_v8_10_ecc_info_query_error_address
+ffffffff820d9000 t umc_v8_7_query_ras_error_count
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+ffffffff820d96d0 t umc_v8_7_ecc_info_query_ras_error_count
+ffffffff820d9800 t umc_v8_7_ecc_info_query_ras_error_address
+ffffffff820da000 t uvd_v5_0_early_init
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+ffffffff820da950 t uvd_v5_0_resume
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+ffffffff820dad80 t uvd_v5_0_set_powergating_state
+ffffffff820dadd0 t uvd_v5_0_get_clockgating_state
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+ffffffff820de340 t uvd_v6_0_set_powergating_state
+ffffffff820de3c0 t uvd_v6_0_get_clockgating_state
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+ffffffff820de8e0 t uvd_v6_0_ring_emit_fence
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+ffffffff820df340 t uvd_v6_0_ring_emit_vm_flush
+ffffffff820df6e0 t uvd_v6_0_ring_emit_hdp_flush
+ffffffff820df710 t uvd_v6_0_ring_test_ring
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+ffffffff820dfa40 t uvd_v6_0_ring_emit_wreg
+ffffffff820dfcf0 t uvd_v6_0_enc_ring_get_rptr
+ffffffff820dfd50 t uvd_v6_0_enc_ring_get_wptr
+ffffffff820dfdb0 t uvd_v6_0_enc_ring_set_wptr
+ffffffff820dfdf0 t uvd_v6_0_enc_ring_emit_ib
+ffffffff820e0060 t uvd_v6_0_enc_ring_emit_fence
+ffffffff820e02c0 t uvd_v6_0_enc_ring_emit_pipeline_sync
+ffffffff820e0490 t uvd_v6_0_enc_ring_emit_vm_flush
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+ffffffff82194f60 t enable_crtc_v1
+ffffffff82195010 t external_encoder_control_v3
+ffffffff82195040 t enable_disp_power_gating_v2_1
+ffffffff821951c0 t enable_disp_power_gating_fallback
+ffffffff82195220 t set_dce_clock_v2_1
+ffffffff82195360 t get_smu_clock_info_v3_1
+ffffffff821953d0 t enable_lvtma_control
+ffffffff82196000 T dal_bios_parser_init_cmd_tbl_helper
+ffffffff821960c0 T dal_cmd_table_helper_controller_id_to_atom
+ffffffff821961e0 T dal_cmd_table_helper_transmitter_bp_to_atom
+ffffffff82196270 T dal_cmd_table_helper_encoder_mode_bp_to_atom
+ffffffff82196300 T dal_cmd_table_helper_assign_control_parameter
+ffffffff821963e0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src
+ffffffff821964c0 T dal_cmd_table_helper_encoder_id_to_atom
+ffffffff82197000 T dal_bios_parser_init_cmd_tbl_helper2
+ffffffff821970d0 T dal_cmd_table_helper_controller_id_to_atom2
+ffffffff821971e0 T dal_cmd_table_helper_transmitter_bp_to_atom2
+ffffffff82197270 T dal_cmd_table_helper_encoder_mode_bp_to_atom2
+ffffffff82197300 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2
+ffffffff821973e0 T dal_cmd_table_helper_encoder_id_to_atom2
+ffffffff82198000 T dal_cmd_tbl_helper_dce110_get_table
 ffffffff82198030 t encoder_action_to_atom
 ffffffff821980b0 t engine_bp_to_atom
 ffffffff82198100 t clock_source_id_to_atom
-ffffffff821981d0 t clock_source_id_to_atom_phy_clk_src_id
-ffffffff82198220 t signal_type_to_atom_dig_mode
-ffffffff82198280 t hpd_sel_to_atom
-ffffffff821982c0 t dig_encoder_sel_to_atom
-ffffffff821982f0 t phy_id_to_atom
-ffffffff82198330 t disp_power_gating_action_to_atom
-ffffffff821983a0 t dc_clock_type_to_atom
-ffffffff82198420 t transmitter_color_depth_to_atom
-ffffffff82199000 T dal_cmd_tbl_helper_dce112_get_table
+ffffffff821981a0 t clock_source_id_to_atom_phy_clk_src_id
+ffffffff821981f0 t signal_type_to_atom_dig_mode
+ffffffff82198250 t hpd_sel_to_atom
+ffffffff82198290 t dig_encoder_sel_to_atom
+ffffffff821982c0 t phy_id_to_atom
+ffffffff82198300 t disp_power_gating_action_to_atom
+ffffffff82199000 T dal_cmd_tbl_helper_dce112_get_table2
 ffffffff82199030 t encoder_action_to_atom
 ffffffff821990b0 t engine_bp_to_atom
 ffffffff82199100 t clock_source_id_to_atom
@@ -31850,7 +31839,7 @@ ffffffff821992f0 t phy_id_to_atom
 ffffffff82199330 t disp_power_gating_action_to_atom
 ffffffff821993a0 t dc_clock_type_to_atom
 ffffffff82199420 t transmitter_color_depth_to_atom
-ffffffff8219a000 T dal_cmd_tbl_helper_dce80_get_table
+ffffffff8219a000 T dal_cmd_tbl_helper_dce112_get_table
 ffffffff8219a030 t encoder_action_to_atom
 ffffffff8219a0b0 t engine_bp_to_atom
 ffffffff8219a100 t clock_source_id_to_atom
@@ -31858,26443 +31847,26452 @@ ffffffff8219a1d0 t clock_source_id_to_atom_phy_clk_src
 ffffffff8219a220 t signal_type_to_atom_dig_mode
 ffffffff8219a280 t hpd_sel_to_atom
 ffffffff8219a2c0 t dig_encoder_sel_to_atom
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-ffffffff8219a350 t disp_power_gating_action_to_atom
-ffffffff8219b000 T clk_mgr_helper_get_active_display_cnt
-ffffffff8219b0e0 T clk_mgr_helper_get_active_plane_cnt
-ffffffff8219b190 T clk_mgr_exit_optimized_pwr_state
-ffffffff8219b2b0 T clk_mgr_optimize_pwr_state
-ffffffff8219b3b0 T dc_clk_mgr_create
-ffffffff8219bb90 T dc_destroy_clk_mgr
-ffffffff8219c000 T dentist_get_divider_from_did
-ffffffff8219c070 T dce_adjust_dp_ref_freq_for_ss
-ffffffff8219c190 T dce_get_dp_ref_freq_khz
-ffffffff8219c2e0 T dce12_get_dp_ref_freq_khz
-ffffffff8219c300 T dce_get_max_pixel_clock_for_all_paths
-ffffffff8219c510 T dce_get_required_clocks_state
-ffffffff8219c5c0 T dce_set_clock
-ffffffff8219c730 T dce_clock_read_ss_info
-ffffffff8219c870 T dce_clk_mgr_construct
-ffffffff8219ca70 t dce_update_clocks
-ffffffff8219d000 T dce110_get_min_vblank_time_us
-ffffffff8219d090 T dce110_fill_display_configs
-ffffffff8219d310 T dce11_pplib_apply_display_requirements
-ffffffff8219d620 T dce110_clk_mgr_construct
-ffffffff8219d6d0 t dce11_update_clocks
-ffffffff8219e000 T dce112_set_clock
-ffffffff8219e1a0 T dce112_set_dispclk
-ffffffff8219e2d0 T dce112_set_dprefclk
-ffffffff8219e350 T dce112_clk_mgr_construct
-ffffffff8219e410 t dce112_update_clocks
-ffffffff8219f000 T dce120_clk_mgr_construct
-ffffffff8219f0a0 T dce121_clk_mgr_construct
-ffffffff8219f1e0 t dce12_update_clocks
-ffffffff821a0000 T rv1_clk_mgr_construct
-ffffffff821a00c0 t rv1_update_clocks
-ffffffff821a0600 t rv1_init_clocks
-ffffffff821a0690 t rv1_enable_pme_wa
-ffffffff821a1000 T rv1_vbios_smu_set_dispclk
-ffffffff821a10f0 t rv1_vbios_smu_send_msg_with_param
-ffffffff821a1230 T rv1_vbios_smu_set_dprefclk
-ffffffff821a2000 T rv2_clk_mgr_construct
-ffffffff821a3000 T dentist_get_did_from_divider
-ffffffff821a3080 T dcn20_update_clocks_update_dpp_dto
-ffffffff821a3160 T dcn20_update_clocks_update_dentist
-ffffffff821a36f0 T dcn2_update_clocks
-ffffffff821a3ce0 T dcn2_read_clocks_from_hw_dentist
-ffffffff821a3dd0 T dcn2_update_clocks_fpga
-ffffffff821a3f00 T dcn2_init_clocks
-ffffffff821a3fa0 T dcn2_get_clock
-ffffffff821a4010 T dcn20_clk_mgr_construct
-ffffffff821a4160 t dcn2_enable_pme_wa
-ffffffff821a41b0 t dcn2_are_clock_states_equal
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-ffffffff821a5370 t dcn201_init_clocks
-ffffffff821a6000 T rn_clk_mgr_construct
-ffffffff821a6970 t rn_update_clocks
-ffffffff821a6f70 t rn_set_low_power_state
-ffffffff821a7160 t rn_init_clocks
-ffffffff821a7200 t rn_enable_pme_wa
-ffffffff821a7210 t rn_are_clock_states_equal
-ffffffff821a7260 t rn_notify_wm_ranges
-ffffffff821a75f0 t rn_notify_link_rate_change
-ffffffff821a8000 T rn_vbios_smu_get_smu_version
-ffffffff821a8020 t rn_vbios_smu_send_msg_with_param
-ffffffff821a8200 T rn_vbios_smu_set_dispclk
-ffffffff821a8330 T rn_vbios_smu_set_dprefclk
-ffffffff821a83a0 T rn_vbios_smu_set_hard_min_dcfclk
-ffffffff821a8420 T rn_vbios_smu_set_min_deep_sleep_dcfclk
-ffffffff821a84a0 T rn_vbios_smu_set_phyclk
-ffffffff821a84e0 T rn_vbios_smu_set_dppclk
-ffffffff821a85a0 T rn_vbios_smu_set_dcn_low_power_state
-ffffffff821a85c0 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn
-ffffffff821a85e0 T rn_vbios_smu_enable_pme_wa
-ffffffff821a8600 T rn_vbios_smu_is_periodic_retraining_disabled
-ffffffff821a9000 T dcn3_init_clocks
-ffffffff821a9470 t dcn3_init_clocks_fpga
-ffffffff821a9480 T dcn3_clk_mgr_construct
-ffffffff821a9600 T dcn3_clk_mgr_destroy
-ffffffff821a9670 t dcn3_update_clocks
-ffffffff821a9ad0 t dcn3_enable_pme_wa
-ffffffff821a9b10 t dcn3_are_clock_states_equal
-ffffffff821a9b70 t dcn3_notify_wm_ranges
-ffffffff821a9e20 t dcn30_notify_link_rate_change
-ffffffff821a9f40 t dcn3_set_hard_min_memclk
-ffffffff821a9fe0 t dcn3_set_hard_max_memclk
-ffffffff821aa040 t dcn3_set_max_memclk
-ffffffff821aa080 t dcn3_set_min_memclk
-ffffffff821aa0c0 t dcn3_get_memclk_states_from_smu
-ffffffff821aa220 t dcn3_is_smu_present
-ffffffff821ab000 T dcn30_smu_test_message
-ffffffff821ab070 t dcn30_smu_send_msg_with_param
-ffffffff821ab220 T dcn30_smu_get_smu_version
-ffffffff821ab240 T dcn30_smu_check_driver_if_version
-ffffffff821ab2a0 T dcn30_smu_check_msg_header_version
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-ffffffff821ab320 T dcn30_smu_set_dram_addr_low
-ffffffff821ab340 T dcn30_smu_transfer_wm_table_smu_2_dram
-ffffffff821ab360 T dcn30_smu_transfer_wm_table_dram_2_smu
-ffffffff821ab380 T dcn30_smu_set_hard_min_by_freq
-ffffffff821ab3e0 T dcn30_smu_set_hard_max_by_freq
-ffffffff821ab440 T dcn30_smu_get_dpm_freq_by_index
-ffffffff821ab4a0 T dcn30_smu_get_dc_mode_max_dpm_freq
-ffffffff821ab500 T dcn30_smu_set_min_deep_sleep_dcef_clk
-ffffffff821ab520 T dcn30_smu_set_num_of_displays
-ffffffff821ab540 T dcn30_smu_set_display_refresh_from_mall
-ffffffff821ab570 T dcn30_smu_set_external_client_df_cstate_allow
-ffffffff821ab590 T dcn30_smu_set_pme_workaround
-ffffffff821ac000 T dcn301_smu_get_smu_version
-ffffffff821ac080 t dcn301_smu_send_msg_with_param
-ffffffff821ac250 T dcn301_smu_set_dispclk
-ffffffff821ac300 T dcn301_smu_set_dprefclk
-ffffffff821ac3c0 T dcn301_smu_set_hard_min_dcfclk
-ffffffff821ac470 T dcn301_smu_set_min_deep_sleep_dcfclk
-ffffffff821ac520 T dcn301_smu_set_dppclk
-ffffffff821ac5d0 T dcn301_smu_set_display_idle_optimization
-ffffffff821ac630 T dcn301_smu_enable_phy_refclk_pwrdwn
-ffffffff821ac690 T dcn301_smu_enable_pme_wa
-ffffffff821ac6b0 T dcn301_smu_set_dram_addr_high
-ffffffff821ac710 T dcn301_smu_set_dram_addr_low
-ffffffff821ac770 T dcn301_smu_transfer_dpm_table_smu_2_dram
-ffffffff821ac790 T dcn301_smu_transfer_wm_table_dram_2_smu
-ffffffff821ad000 T vg_clk_mgr_construct
-ffffffff821ad930 T vg_clk_mgr_destroy
-ffffffff821ad980 t vg_update_clocks
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-ffffffff821addb0 t vg_are_clock_states_equal
-ffffffff821ade00 t vg_notify_wm_ranges
-ffffffff821af000 T dcn31_update_clocks
-ffffffff821af6a0 T dcn31_init_clocks
-ffffffff821af750 T dcn31_are_clock_states_equal
-ffffffff821af7b0 T dcn31_get_dtb_ref_freq_khz
-ffffffff821af7e0 T dcn31_clk_mgr_construct
-ffffffff821aff50 T dcn31_clk_mgr_destroy
-ffffffff821affa0 t dcn31_set_low_power_state
-ffffffff821b01c0 t dcn31_enable_pme_wa
-ffffffff821b01d0 t dcn31_notify_wm_ranges
-ffffffff821b0570 t find_clk_for_voltage
-ffffffff821b1000 T dcn31_smu_get_smu_version
-ffffffff821b1020 t dcn31_smu_send_msg_with_param
-ffffffff821b1290 T dcn31_smu_set_dispclk
-ffffffff821b1310 T dcn31_smu_set_dprefclk
-ffffffff821b1390 T dcn31_smu_set_hard_min_dcfclk
-ffffffff821b1420 T dcn31_smu_set_min_deep_sleep_dcfclk
-ffffffff821b14b0 T dcn31_smu_set_dppclk
-ffffffff821b1530 T dcn31_smu_set_display_idle_optimization
-ffffffff821b1580 T dcn31_smu_enable_phy_refclk_pwrdwn
-ffffffff821b15d0 T dcn31_smu_enable_pme_wa
-ffffffff821b1610 T dcn31_smu_set_dram_addr_high
-ffffffff821b1650 T dcn31_smu_set_dram_addr_low
-ffffffff821b1690 T dcn31_smu_transfer_dpm_table_smu_2_dram
-ffffffff821b16d0 T dcn31_smu_transfer_wm_table_dram_2_smu
-ffffffff821b1710 T dcn31_smu_set_zstate_support
-ffffffff821b1780 T dcn31_smu_set_dtbclk
-ffffffff821b2000 T dcn314_update_clocks
-ffffffff821b26d0 T dcn314_are_clock_states_equal
-ffffffff821b2730 T dcn314_clk_mgr_construct
-ffffffff821b34f0 T dcn314_clk_mgr_destroy
-ffffffff821b3540 t dcn314_enable_pme_wa
-ffffffff821b3550 t dcn314_notify_wm_ranges
-ffffffff821b4000 T dcn314_smu_get_smu_version
-ffffffff821b4020 t dcn314_smu_send_msg_with_param
-ffffffff821b42b0 T dcn314_smu_set_dispclk
-ffffffff821b4330 T dcn314_smu_set_dprefclk
-ffffffff821b43b0 T dcn314_smu_set_hard_min_dcfclk
-ffffffff821b4440 T dcn314_smu_set_min_deep_sleep_dcfclk
-ffffffff821b44d0 T dcn314_smu_set_dppclk
-ffffffff821b4550 T dcn314_smu_set_display_idle_optimization
-ffffffff821b45a0 T dcn314_smu_enable_phy_refclk_pwrdwn
-ffffffff821b45f0 T dcn314_smu_enable_pme_wa
-ffffffff821b4630 T dcn314_smu_set_dram_addr_high
-ffffffff821b4670 T dcn314_smu_set_dram_addr_low
-ffffffff821b46b0 T dcn314_smu_transfer_dpm_table_smu_2_dram
-ffffffff821b46f0 T dcn314_smu_transfer_wm_table_dram_2_smu
-ffffffff821b4730 T dcn314_smu_set_zstate_support
-ffffffff821b4780 T dcn314_smu_set_dtbclk
-ffffffff821b5000 T dcn315_clk_mgr_construct
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-ffffffff821b58e0 t dcn315_update_clocks
-ffffffff821b5ef0 t dcn315_enable_pme_wa
-ffffffff821b5f00 t dcn315_notify_wm_ranges
-ffffffff821b62a0 t dcn315_disable_otg_wa
-ffffffff821b7000 T dcn315_smu_get_smu_version
-ffffffff821b7020 t dcn315_smu_send_msg_with_param
-ffffffff821b73d0 T dcn315_smu_set_dispclk
-ffffffff821b7450 T dcn315_smu_set_hard_min_dcfclk
-ffffffff821b74e0 T dcn315_smu_set_min_deep_sleep_dcfclk
-ffffffff821b7570 T dcn315_smu_set_dppclk
-ffffffff821b75f0 T dcn315_smu_set_display_idle_optimization
-ffffffff821b7640 T dcn315_smu_enable_phy_refclk_pwrdwn
-ffffffff821b7690 T dcn315_smu_enable_pme_wa
-ffffffff821b76d0 T dcn315_smu_set_dram_addr_high
-ffffffff821b7710 T dcn315_smu_set_dram_addr_low
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-ffffffff821b7790 T dcn315_smu_transfer_wm_table_dram_2_smu
-ffffffff821b77d0 T dcn315_smu_get_dpref_clk
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-ffffffff821b7890 T dcn315_smu_set_dtbclk
-ffffffff821b8000 T dcn316_clk_mgr_construct
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-ffffffff821b8db0 t dcn316_notify_wm_ranges
-ffffffff821b9150 t find_clk_for_voltage
-ffffffff821ba000 T dcn316_smu_get_smu_version
-ffffffff821ba020 t dcn316_smu_send_msg_with_param
-ffffffff821ba200 T dcn316_smu_set_dispclk
-ffffffff821ba280 T dcn316_smu_set_hard_min_dcfclk
-ffffffff821ba310 T dcn316_smu_set_min_deep_sleep_dcfclk
-ffffffff821ba3a0 T dcn316_smu_set_dppclk
-ffffffff821ba420 T dcn316_smu_set_display_idle_optimization
-ffffffff821ba470 T dcn316_smu_enable_phy_refclk_pwrdwn
-ffffffff821ba4c0 T dcn316_smu_set_dram_addr_high
-ffffffff821ba500 T dcn316_smu_set_dram_addr_low
-ffffffff821ba540 T dcn316_smu_transfer_dpm_table_smu_2_dram
-ffffffff821ba580 T dcn316_smu_transfer_wm_table_dram_2_smu
-ffffffff821ba5c0 T dcn316_smu_enable_pme_wa
-ffffffff821ba600 T dcn316_smu_set_dtbclk
-ffffffff821ba640 T dcn316_smu_get_dpref_clk
-ffffffff821ba6a0 T dcn316_smu_get_smu_fclk
-ffffffff821bb000 T dcn32_init_clocks
-ffffffff821bb620 T dcn32_update_clocks_update_dpp_dto
-ffffffff821bb760 T dcn32_clk_mgr_construct
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-ffffffff821bbd50 t dcn32_update_clocks
-ffffffff821bc6b0 t dcn32_enable_pme_wa
-ffffffff821bc6f0 t dcn32_are_clock_states_equal
-ffffffff821bc760 t dcn32_notify_wm_ranges
-ffffffff821bc8f0 t dcn32_set_hard_min_memclk
-ffffffff821bc980 t dcn32_set_hard_max_memclk
-ffffffff821bc9d0 t dcn32_set_max_memclk
-ffffffff821bca10 t dcn32_set_min_memclk
-ffffffff821bca50 t dcn32_get_memclk_states_from_smu
-ffffffff821bcce0 t dcn32_is_smu_present
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-ffffffff821bcdb0 t dcn32_update_clocks_update_dentist
-ffffffff821be000 T dcn32_smu_send_fclk_pstate_message
-ffffffff821be020 t dcn32_smu_send_msg_with_param
-ffffffff821be1a0 T dcn32_smu_send_cab_for_uclk_message
-ffffffff821be1d0 T dcn32_smu_transfer_wm_table_dram_2_smu
-ffffffff821be1f0 T dcn32_smu_set_pme_workaround
-ffffffff821be210 T dcn32_smu_set_hard_min_by_freq
-ffffffff821be270 T dcn32_smu_wait_for_dmub_ack_mclk
-ffffffff821bf000 T dc_stream_adjust_vmin_vmax
-ffffffff821bf170 T dc_stream_get_last_used_drr_vtotal
-ffffffff821bf2e0 T dc_stream_get_crtc_position
-ffffffff821bf540 T dc_stream_configure_crc
-ffffffff821bf6c0 T dc_stream_get_crc
-ffffffff821bf7b0 T dc_stream_set_dyn_expansion
-ffffffff821bfa40 T dc_stream_set_dither_option
-ffffffff821bfbe0 T dc_stream_set_gamut_remap
-ffffffff821bfd90 T dc_stream_program_csc_matrix
-ffffffff821bfff0 T dc_stream_set_static_screen_params
-ffffffff821c0180 T dc_create
-ffffffff821c07d0 t dc_construct_ctx
-ffffffff821c0970 t dc_destruct
-ffffffff821c0cd0 T dc_hardware_init
-ffffffff821c0da0 T dc_init_callbacks
-ffffffff821c0df0 T dc_deinit_callbacks
-ffffffff821c0e40 T dc_destroy
-ffffffff821c0eb0 T dc_validate_boot_timing
-ffffffff821c12c0 T dc_enable_stereo
-ffffffff821c13d0 T dc_trigger_sync
-ffffffff821c1a30 T dc_z10_restore
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-ffffffff821c1ab0 T dc_commit_streams
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-ffffffff821c3e50 T dc_release_state
-ffffffff821c3ec0 T dc_acquire_release_mpc_3dlut
-ffffffff821c3f90 T dc_post_update_surfaces_to_stream
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-ffffffff821c4600 T dc_retain_state
-ffffffff821c4630 T dc_set_generic_gpio_for_stereo
-ffffffff821c4790 T dc_check_update_surfaces_for_stream
-ffffffff821c51a0 T dc_dmub_update_dirty_rect
-ffffffff821c53b0 T dc_update_planes_and_stream
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-ffffffff821c6800 t commit_planes_for_stream
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-ffffffff821c8640 t copy_surface_update_to_plane
-ffffffff821c8a60 t copy_stream_update_to_stream
-ffffffff821c9160 T dc_get_current_stream_count
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-ffffffff821c91f0 T dc_interrupt_to_irq_source
-ffffffff821c9210 T dc_interrupt_set
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-ffffffff821c9280 T dc_power_down_on_boot
-ffffffff821c92d0 T dc_set_power_state
-ffffffff821c9500 T dc_resume
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-ffffffff821c95d0 T get_clock_requirements_for_state
-ffffffff821c9650 T dc_set_clock
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-ffffffff821c96d0 T dc_set_psr_allow_active
-ffffffff821c97e0 T dc_allow_idle_optimizations
-ffffffff821c9890 T dc_unlock_memory_clock_frequency
-ffffffff821c9910 T dc_lock_memory_clock_frequency
-ffffffff821c99b0 T dc_enable_dcmode_clk_limit
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-ffffffff821c9db0 T dc_is_plane_eligible_for_idle_optimizations
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-ffffffff821c9e60 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down
-ffffffff821c9ea0 T dc_is_dmub_outbox_supported
-ffffffff821c9f10 T dc_enable_dmub_notifications
-ffffffff821c9f80 T dc_enable_dmub_outbox
-ffffffff821c9fd0 T dc_process_dmub_aux_transfer_async
-ffffffff821ca160 T get_link_index_from_dpia_port_index
-ffffffff821ca220 T dc_process_dmub_set_config_async
-ffffffff821ca300 T dc_process_dmub_set_mst_slots
-ffffffff821ca3f0 T dc_process_dmub_dpia_hpd_int_enable
-ffffffff821ca4c0 T dc_print_dmub_diagnostic_data
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-ffffffff821ca500 T dc_notify_vsync_int_state
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-ffffffff82458710 T Calculate256BBlockSizes
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-ffffffff824811b0 T to_dal_irq_source_dce110
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+ffffffff8219b220 t signal_type_to_atom_dig_mode
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+ffffffff8219c000 T clk_mgr_helper_get_active_display_cnt
+ffffffff8219c0e0 T clk_mgr_helper_get_active_plane_cnt
+ffffffff8219c190 T clk_mgr_exit_optimized_pwr_state
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+ffffffff8219c3b0 T dc_clk_mgr_create
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+ffffffff8219d000 T dentist_get_divider_from_did
+ffffffff8219d070 T dce_adjust_dp_ref_freq_for_ss
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+ffffffff8219d2e0 T dce12_get_dp_ref_freq_khz
+ffffffff8219d300 T dce_get_max_pixel_clock_for_all_paths
+ffffffff8219d510 T dce_get_required_clocks_state
+ffffffff8219d5c0 T dce_set_clock
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+ffffffff8219e000 T dce110_get_min_vblank_time_us
+ffffffff8219e090 T dce110_fill_display_configs
+ffffffff8219e310 T dce11_pplib_apply_display_requirements
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+ffffffff8219f000 T dce112_set_clock
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+ffffffff821a3000 T rv2_clk_mgr_construct
+ffffffff821a4000 T dentist_get_did_from_divider
+ffffffff821a4080 T dcn20_update_clocks_update_dpp_dto
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+ffffffff821a7000 T rn_clk_mgr_construct
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+ffffffff821a9000 T rn_vbios_smu_get_smu_version
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+ffffffff821a9330 T rn_vbios_smu_set_dprefclk
+ffffffff821a93a0 T rn_vbios_smu_set_hard_min_dcfclk
+ffffffff821a9420 T rn_vbios_smu_set_min_deep_sleep_dcfclk
+ffffffff821a94a0 T rn_vbios_smu_set_phyclk
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+ffffffff821a95a0 T rn_vbios_smu_set_dcn_low_power_state
+ffffffff821a95c0 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn
+ffffffff821a95e0 T rn_vbios_smu_enable_pme_wa
+ffffffff821a9600 T rn_vbios_smu_is_periodic_retraining_disabled
+ffffffff821aa000 T dcn3_init_clocks
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+ffffffff821ac2a0 T dcn30_smu_check_msg_header_version
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+ffffffff821ac520 T dcn30_smu_set_num_of_displays
+ffffffff821ac540 T dcn30_smu_set_display_refresh_from_mall
+ffffffff821ac570 T dcn30_smu_set_external_client_df_cstate_allow
+ffffffff821ac590 T dcn30_smu_set_pme_workaround
+ffffffff821ad000 T dcn301_smu_get_smu_version
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+ffffffff821b24b0 T dcn31_smu_set_dppclk
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+ffffffff8244a000 T dcn321_update_bw_bounding_box_fpu
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+ffffffff824507e0 T get_stutter_efficiency_z8
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+ffffffff82450a80 T get_wm_dram_clock_change
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+ffffffff82450d20 T get_stutter_efficiency
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+ffffffff82451110 T get_urgent_latency
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+ffffffff82451500 T get_dram_clock_change_latency
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+ffffffff82451e30 T get_cstate_max_cap_mode
+ffffffff82451f90 T get_comp_buffer_size_kbytes
+ffffffff824520e0 T get_pixel_chunk_size_in_kbyte
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+ffffffff82452380 T get_meta_chunk_size_in_kbyte
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+ffffffff82452620 T get_min_meta_chunk_size_in_byte
+ffffffff82452770 T get_fclk_watermark
+ffffffff824528c0 T get_usr_retraining_watermark
+ffffffff82452a10 T get_comp_buffer_reserved_space_kbytes
+ffffffff82452b60 T get_comp_buffer_reserved_space_64bytes
+ffffffff82452cb0 T get_comp_buffer_reserved_space_zs
+ffffffff82452e00 T get_unbounded_request_enabled
+ffffffff82452f60 T get_dsc_delay
+ffffffff824530c0 T get_dppclk_calculated
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+ffffffff82453380 T get_min_ttu_vblank
+ffffffff824534e0 T get_min_ttu_vblank_in_us
+ffffffff82453640 T get_vratio_prefetch_l
+ffffffff824537a0 T get_vratio_prefetch_c
+ffffffff82453900 T get_dst_x_after_scaler
+ffffffff82453a60 T get_dst_y_after_scaler
+ffffffff82453bc0 T get_dst_y_per_vm_vblank
+ffffffff82453d20 T get_dst_y_per_row_vblank
+ffffffff82453e80 T get_dst_y_prefetch
+ffffffff82453fe0 T get_dst_y_per_vm_flip
+ffffffff82454140 T get_dst_y_per_row_flip
+ffffffff824542a0 T get_refcyc_per_vm_group_vblank
+ffffffff82454400 T get_refcyc_per_vm_group_flip
+ffffffff82454560 T get_refcyc_per_vm_req_vblank
+ffffffff824546c0 T get_refcyc_per_vm_req_flip
+ffffffff82454820 T get_refcyc_per_vm_group_vblank_in_us
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+ffffffff82454ae0 T get_refcyc_per_vm_req_vblank_in_us
+ffffffff82454c40 T get_refcyc_per_vm_req_flip_in_us
+ffffffff82454da0 T get_refcyc_per_vm_dmdata_in_us
+ffffffff82454f00 T get_dmdata_dl_delta_in_us
+ffffffff82455060 T get_refcyc_per_line_delivery_l_in_us
+ffffffff824551c0 T get_refcyc_per_line_delivery_c_in_us
+ffffffff82455320 T get_refcyc_per_line_delivery_pre_l_in_us
+ffffffff82455480 T get_refcyc_per_line_delivery_pre_c_in_us
+ffffffff824555e0 T get_refcyc_per_req_delivery_l_in_us
+ffffffff82455740 T get_refcyc_per_req_delivery_c_in_us
+ffffffff824558a0 T get_refcyc_per_req_delivery_pre_l_in_us
+ffffffff82455a00 T get_refcyc_per_req_delivery_pre_c_in_us
+ffffffff82455b60 T get_refcyc_per_cursor_req_delivery_in_us
+ffffffff82455cc0 T get_refcyc_per_cursor_req_delivery_pre_in_us
+ffffffff82455e20 T get_refcyc_per_meta_chunk_nom_l_in_us
+ffffffff82455f80 T get_refcyc_per_meta_chunk_nom_c_in_us
+ffffffff824560e0 T get_refcyc_per_meta_chunk_vblank_l_in_us
+ffffffff82456240 T get_refcyc_per_meta_chunk_vblank_c_in_us
+ffffffff824563a0 T get_refcyc_per_meta_chunk_flip_l_in_us
+ffffffff82456500 T get_refcyc_per_meta_chunk_flip_c_in_us
+ffffffff82456660 T get_vstartup
+ffffffff824567c0 T get_vupdate_offset
+ffffffff82456920 T get_vupdate_width
+ffffffff82456a80 T get_vready_offset
+ffffffff82456be0 T get_vready_at_or_after_vsync
+ffffffff82456d50 T get_min_dst_y_next_start
+ffffffff82456eb0 T get_dst_y_per_pte_row_nom_l
+ffffffff82457010 T get_dst_y_per_pte_row_nom_c
+ffffffff82457170 T get_dst_y_per_meta_row_nom_l
+ffffffff824572d0 T get_dst_y_per_meta_row_nom_c
+ffffffff82457430 T get_refcyc_per_pte_group_nom_l_in_us
+ffffffff82457590 T get_refcyc_per_pte_group_nom_c_in_us
+ffffffff824576f0 T get_refcyc_per_pte_group_vblank_l_in_us
+ffffffff82457850 T get_refcyc_per_pte_group_vblank_c_in_us
+ffffffff824579b0 T get_refcyc_per_pte_group_flip_l_in_us
+ffffffff82457b10 T get_refcyc_per_pte_group_flip_c_in_us
+ffffffff82457c70 T get_vstartup_calculated
+ffffffff82457dd0 T get_dpte_row_height_linear_c
+ffffffff82457f30 T get_swath_height_l
+ffffffff82458090 T get_swath_height_c
+ffffffff824581f0 T get_det_stored_buffer_size_l_bytes
+ffffffff82458350 T get_det_stored_buffer_size_c_bytes
+ffffffff824584b0 T get_dpte_group_size_in_bytes
+ffffffff82458610 T get_vm_group_size_in_bytes
+ffffffff82458770 T get_dpte_row_height_linear_l
+ffffffff824588d0 T get_pte_buffer_mode
+ffffffff82458a40 T get_subviewport_lines_needed_in_mall
+ffffffff82458ba0 T get_surface_size_in_mall
+ffffffff82458d00 T get_total_immediate_flip_bytes
+ffffffff82458e50 T get_total_immediate_flip_bw
+ffffffff82459060 T get_total_prefetch_bw
+ffffffff82459270 T get_total_surface_size_in_mall_bytes
+ffffffff82459450 T get_det_buffer_size_kbytes
+ffffffff824595b0 T get_is_phantom_pipe
+ffffffff82459710 T Calculate256BBlockSizes
+ffffffff82459800 T CalculateMinAndMaxPrefetchMode
+ffffffff82459880 T ModeSupportAndSystemConfiguration
+ffffffff82459be0 T CalculateWriteBackDISPCLK
+ffffffff8245b000 T print__rq_params_st
+ffffffff8245b030 T print__data_rq_sizing_params_st
+ffffffff8245b060 T print__data_rq_dlg_params_st
+ffffffff8245b090 T print__data_rq_misc_params_st
+ffffffff8245b0c0 T print__rq_dlg_params_st
+ffffffff8245b0f0 T print__dlg_sys_params_st
+ffffffff8245b120 T print__data_rq_regs_st
+ffffffff8245b150 T print__rq_regs_st
+ffffffff8245b180 T print__dlg_regs_st
+ffffffff8245b1b0 T print__ttu_regs_st
+ffffffff8245c000 T dml1_extract_rq_regs
+ffffffff8245c340 T dml1_rq_dlg_get_rq_params
+ffffffff8245c520 t get_surf_rq_param
+ffffffff8245d120 T dml1_rq_dlg_get_dlg_params
+ffffffff82460000 T _do_calc_rc_params
+ffffffff82460fd0 t get_qp_set
+ffffffff82462000 T dc_bandwidth_in_kbps_from_timing
+ffffffff824622e0 T dc_dsc_stream_bandwidth_in_kbps
+ffffffff82462470 T dc_dsc_parse_dsc_dpcd
+ffffffff82462730 t dsc_throughput_from_dpcd
+ffffffff824628f0 T dc_dsc_compute_bandwidth_range
+ffffffff82462b20 t intersect_dsc_caps
+ffffffff82462cf0 t setup_dsc_config
+ffffffff824634f0 T dc_dsc_compute_config
+ffffffff82463600 T dc_dsc_stream_bandwidth_overhead_in_kbps
+ffffffff82463790 T dc_dsc_get_policy_for_timing
+ffffffff82463830 T dc_dsc_policy_set_max_target_bpp_limit
+ffffffff82463860 T dc_dsc_policy_set_enable_dsc_when_not_needed
+ffffffff82463890 T dc_dsc_policy_set_disable_dsc_stream_overhead
+ffffffff824638c0 T dc_set_disable_128b_132b_stream_overhead
+ffffffff824638f0 T dc_dsc_get_default_config_option
+ffffffff82463940 t fit_num_slices_up
+ffffffff824639f0 t decide_dsc_target_bpp_x16
+ffffffff82464000 T calc_rc_params
+ffffffff82465000 T dscc_compute_dsc_parameters
+ffffffff82466000 T dal_hw_factory_dce110_init
+ffffffff82466060 t define_hpd_registers
+ffffffff824660b0 t define_ddc_registers
+ffffffff82467000 T dal_hw_translate_dce110_init
+ffffffff82467030 t offset_to_id
+ffffffff824673a0 t id_to_offset
+ffffffff82468000 T dal_hw_factory_dce120_init
+ffffffff82468060 t define_hpd_registers
+ffffffff824680b0 t define_ddc_registers
+ffffffff82469000 T dal_hw_translate_dce120_init
+ffffffff82469030 t offset_to_id
+ffffffff824693b0 t id_to_offset
+ffffffff8246a000 T dal_hw_factory_dce80_init
+ffffffff8246a060 t define_hpd_registers
+ffffffff8246a0b0 t define_ddc_registers
+ffffffff8246b000 T dal_hw_translate_dce80_init
+ffffffff8246b030 t offset_to_id
+ffffffff8246b7d0 t id_to_offset
+ffffffff8246c000 T dal_hw_factory_dcn10_init
+ffffffff8246c060 t define_hpd_registers
+ffffffff8246c0b0 t define_ddc_registers
+ffffffff8246c150 t define_generic_registers
+ffffffff8246d000 T dal_hw_translate_dcn10_init
+ffffffff8246d030 t offset_to_id
+ffffffff8246d3a0 t id_to_offset
+ffffffff8246e000 T dal_hw_factory_dcn20_init
+ffffffff8246e060 t define_hpd_registers
+ffffffff8246e0b0 t define_ddc_registers
+ffffffff8246e160 t define_generic_registers
+ffffffff8246f000 T dal_hw_translate_dcn20_init
+ffffffff8246f030 t offset_to_id
+ffffffff8246f2c0 t id_to_offset
+ffffffff82470000 T dal_hw_factory_dcn21_init
+ffffffff82470060 t define_hpd_registers
+ffffffff824700b0 t define_ddc_registers
+ffffffff82470160 t define_generic_registers
+ffffffff82471000 T dal_hw_translate_dcn21_init
+ffffffff82471030 t offset_to_id
+ffffffff824712b0 t id_to_offset
+ffffffff82472000 T dal_hw_factory_dcn30_init
+ffffffff82472060 t define_hpd_registers
+ffffffff824720b0 t define_ddc_registers
+ffffffff82472160 t define_generic_registers
+ffffffff82473000 T dal_hw_translate_dcn30_init
+ffffffff82473030 t offset_to_id
+ffffffff824732d0 t id_to_offset
+ffffffff82474000 T dal_hw_factory_dcn315_init
+ffffffff82474060 t define_hpd_registers
+ffffffff824740b0 t define_ddc_registers
+ffffffff82474160 t define_generic_registers
+ffffffff82475000 T dal_hw_translate_dcn315_init
+ffffffff82475030 t offset_to_id
+ffffffff824752b0 t id_to_offset
+ffffffff82476000 T dal_hw_factory_dcn32_init
+ffffffff82476060 t define_hpd_registers
+ffffffff824760b0 t define_ddc_registers
+ffffffff82476160 t define_generic_registers
+ffffffff82477000 T dal_hw_translate_dcn32_init
+ffffffff82477030 t offset_to_id
+ffffffff82477290 t id_to_offset
+ffffffff82478000 T dal_gpio_open
+ffffffff824780c0 T dal_gpio_open_ex
+ffffffff82478180 T dal_gpio_get_value
+ffffffff82478210 T dal_gpio_set_value
+ffffffff824782a0 T dal_gpio_get_mode
+ffffffff824782d0 T dal_gpio_lock_pin
+ffffffff824782f0 T dal_gpio_unlock_pin
+ffffffff82478310 T dal_gpio_change_mode
+ffffffff824783a0 T dal_gpio_get_id
+ffffffff824783d0 T dal_gpio_get_enum
+ffffffff82478400 T dal_gpio_set_config
+ffffffff82478490 T dal_gpio_get_pin_info
+ffffffff824784f0 T dal_gpio_get_sync_source
+ffffffff82478580 T dal_gpio_get_output_state
+ffffffff824785b0 T dal_gpio_get_ddc
+ffffffff824785e0 T dal_gpio_get_hpd
+ffffffff82478610 T dal_gpio_get_generic
+ffffffff82478640 T dal_gpio_close
+ffffffff824786a0 T dal_gpio_create
+ffffffff82478850 T dal_gpio_destroy
+ffffffff82479000 T dal_gpio_service_create
+ffffffff82479280 T dal_gpio_service_create_irq
+ffffffff82479350 T dal_gpio_create_irq
+ffffffff824793e0 T dal_gpio_service_create_generic_mux
+ffffffff82479490 T dal_gpio_destroy_generic_mux
+ffffffff82479530 T dal_gpio_get_generic_pin_info
+ffffffff824795a0 T dal_gpio_service_destroy
+ffffffff82479720 T dal_mux_setup_config
+ffffffff82479790 T dal_gpio_service_lock
+ffffffff82479820 T dal_gpio_service_unlock
+ffffffff824798b0 T dal_gpio_service_open
+ffffffff82479b60 T dal_gpio_service_close
+ffffffff82479c10 T dal_irq_get_source
+ffffffff82479c90 T dal_irq_get_rx_source
+ffffffff82479cf0 T dal_irq_setup_hpd_filter
+ffffffff82479d50 T dal_gpio_destroy_irq
+ffffffff82479df0 T dal_gpio_create_ddc
+ffffffff82479fa0 T dal_gpio_destroy_ddc
+ffffffff8247a0a0 T dal_ddc_close
+ffffffff8247a0f0 T dal_ddc_open
+ffffffff8247a280 T dal_ddc_change_mode
+ffffffff8247a350 T dal_ddc_get_line
+ffffffff8247a370 T dal_ddc_set_config
+ffffffff8247b000 T dal_hw_ddc_init
+ffffffff8247b120 T dal_hw_ddc_get_pin
+ffffffff8247b130 t dal_hw_ddc_destroy
+ffffffff8247b1a0 t set_config
+ffffffff8247c000 T dal_hw_factory_init
+ffffffff8247d000 T dal_hw_generic_init
+ffffffff8247d120 T dal_hw_generic_get_pin
+ffffffff8247d130 t dal_hw_generic_destroy
+ffffffff8247d1a0 t set_config
+ffffffff8247e000 T dal_hw_gpio_open
+ffffffff8247e0d0 T dal_hw_gpio_config_mode
+ffffffff8247e1c0 T dal_hw_gpio_get_value
+ffffffff8247e230 T dal_hw_gpio_set_value
+ffffffff8247e2c0 T dal_hw_gpio_change_mode
+ffffffff8247e2d0 T dal_hw_gpio_close
+ffffffff8247e3a0 T dal_hw_gpio_construct
+ffffffff8247e400 T dal_hw_gpio_destruct
+ffffffff8247f000 T dal_hw_hpd_init
+ffffffff8247f120 T dal_hw_hpd_get_pin
+ffffffff8247f130 t dal_hw_hpd_destroy
+ffffffff8247f1a0 t get_value
+ffffffff8247f240 t set_config
+ffffffff82480000 T dal_hw_translate_init
+ffffffff82481000 T dc_process_hdcp_msg
+ffffffff82481190 t hdmi_14_process_transaction
+ffffffff82481350 t dp_11_process_transaction
+ffffffff82482000 T dal_irq_service_dummy_set
+ffffffff82482060 T dal_irq_service_dummy_ack
+ffffffff824820c0 T dce110_vblank_set
+ffffffff824821b0 T to_dal_irq_source_dce110
+ffffffff82482330 T dal_irq_service_dce110_create
+ffffffff824823c0 t hpd_ack
+ffffffff82483000 T dal_irq_service_dce120_create
 ffffffff82483090 t hpd_ack
-ffffffff82484000 T dal_irq_service_dcn10_create
+ffffffff82484000 T dal_irq_service_dce80_create
 ffffffff82484090 t hpd_ack
-ffffffff82484160 t to_dal_irq_source_dcn10
-ffffffff82485000 T dal_irq_service_dcn20_create
+ffffffff82485000 T dal_irq_service_dcn10_create
 ffffffff82485090 t hpd_ack
-ffffffff82485160 t to_dal_irq_source_dcn20
-ffffffff82486000 T dal_irq_service_dcn201_create
+ffffffff82485160 t to_dal_irq_source_dcn10
+ffffffff82486000 T dal_irq_service_dcn20_create
 ffffffff82486090 t hpd_ack
-ffffffff82486160 t to_dal_irq_source_dcn201
-ffffffff82487000 T dal_irq_service_dcn21_create
+ffffffff82486160 t to_dal_irq_source_dcn20
+ffffffff82487000 T dal_irq_service_dcn201_create
 ffffffff82487090 t hpd_ack
-ffffffff82487160 t to_dal_irq_source_dcn21
-ffffffff82488000 T dal_irq_service_dcn30_create
+ffffffff82487160 t to_dal_irq_source_dcn201
+ffffffff82488000 T dal_irq_service_dcn21_create
 ffffffff82488090 t hpd_ack
-ffffffff82488160 t to_dal_irq_source_dcn30
-ffffffff82489000 T dal_irq_service_dcn302_create
+ffffffff82488160 t to_dal_irq_source_dcn21
+ffffffff82489000 T dal_irq_service_dcn30_create
 ffffffff82489090 t hpd_ack
-ffffffff82489160 t to_dal_irq_source_dcn302
-ffffffff8248a000 T dal_irq_service_dcn303_create
+ffffffff82489160 t to_dal_irq_source_dcn30
+ffffffff8248a000 T dal_irq_service_dcn302_create
 ffffffff8248a090 t hpd_ack
-ffffffff8248a160 t to_dal_irq_source_dcn303
-ffffffff8248b000 T dal_irq_service_dcn31_create
+ffffffff8248a160 t to_dal_irq_source_dcn302
+ffffffff8248b000 T dal_irq_service_dcn303_create
 ffffffff8248b090 t hpd_ack
-ffffffff8248b160 t to_dal_irq_source_dcn31
-ffffffff8248c000 T dal_irq_service_dcn314_create
+ffffffff8248b160 t to_dal_irq_source_dcn303
+ffffffff8248c000 T dal_irq_service_dcn31_create
 ffffffff8248c090 t hpd_ack
-ffffffff8248c160 t to_dal_irq_source_dcn314
-ffffffff8248d000 T dal_irq_service_dcn315_create
+ffffffff8248c160 t to_dal_irq_source_dcn31
+ffffffff8248d000 T dal_irq_service_dcn314_create
 ffffffff8248d090 t hpd_ack
-ffffffff8248d160 t to_dal_irq_source_dcn315
-ffffffff8248e000 T dal_irq_service_dcn32_create
+ffffffff8248d160 t to_dal_irq_source_dcn314
+ffffffff8248e000 T dal_irq_service_dcn315_create
 ffffffff8248e090 t hpd_ack
-ffffffff8248e160 t to_dal_irq_source_dcn32
-ffffffff8248f000 T dal_irq_service_construct
-ffffffff8248f070 T dal_irq_service_destroy
-ffffffff8248f100 T dal_irq_service_set_generic
-ffffffff8248f180 T dal_irq_service_set
-ffffffff8248f360 T dal_irq_service_ack
-ffffffff8248f500 T dal_irq_service_ack_generic
-ffffffff8248f580 T dal_irq_service_to_irq_source
-ffffffff82490000 T dp_handle_automated_test
-ffffffff82490910 T dp_set_test_pattern
-ffffffff82491110 t set_crtc_test_pattern
-ffffffff824915f0 T dp_set_preferred_link_settings
-ffffffff82491750 t dp_retrain_link_dp_test
-ffffffff82491890 T dp_set_preferred_training_settings
-ffffffff82492000 T dp_trace_init
-ffffffff824920a0 T dp_trace_reset
-ffffffff82492130 T dp_trace_is_initialized
-ffffffff82492160 T dp_trace_detect_lt_init
-ffffffff824921b0 T dp_trace_commit_lt_init
-ffffffff82492200 T dp_trace_link_loss_increment
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-ffffffff8263d0c0 T pckbd_cnattach
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-ffffffff8263e600 T pms_ioctl_mouse
-ffffffff8263e740 T pms_sync_mouse
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-ffffffff8263e860 T pms_enable_synaptics
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-ffffffff8263fdf0 T pms_enable_elantech_v1
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-ffffffff82640390 T pms_enable_elantech_v2
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-ffffffff82641a60 T pms_get_devid
-ffffffff82641b00 T pms_get_status
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-ffffffff82641ff0 T pms_reset_timo
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-ffffffff82642140 T pms_change_state
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-ffffffff82642700 T synaptics_set_mode
-ffffffff82642820 T synaptics_query
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-ffffffff82642f80 T synaptics_knock
-ffffffff82643220 T alps_sec_proc
-ffffffff82643350 T alps_get_hwinfo
-ffffffff82643810 T elantech_set_absolute_mode_v1
-ffffffff82643bf0 T elantech_set_absolute_mode_v2
-ffffffff826442c0 T elantech_ps2_cmd
-ffffffff82644360 T elantech_set_absolute_mode_v3
-ffffffff82644940 T elantech_set_absolute_mode_v4
-ffffffff82644be0 T elantech_get_hwinfo_v1
-ffffffff82644e20 T elantech_get_hwinfo_v2
-ffffffff826451a0 T elantech_get_hwinfo_v3
-ffffffff826453e0 T elantech_get_hwinfo_v4
-ffffffff826456a0 T elantech_knock
-ffffffff82646000 T wscnprobe
-ffffffff826460a0 T wscninit
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-ffffffff82646200 T wscn_input_init
-ffffffff82646280 T wscnputc
-ffffffff82646290 T wscngetc
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-ffffffff82647000 T skgpio_match
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-ffffffff826473c0 T skgpio_gpio_read
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-ffffffff826474a0 T skgpio_gpio_ctl
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-ffffffff82647590 T skgpio_led_write
-ffffffff826475c0 T skgpio_led_ctl
-ffffffff82648000 T pctrattach
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-ffffffff826483c0 T pctr_reload
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-ffffffff82649000 T nvramattach
-ffffffff826490c0 T nvram_csum_valid
-ffffffff82649170 T nvramopen
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-ffffffff826491f0 T nvramread
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-ffffffff8264a000 T hid_start_parse
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-ffffffff8264a0c0 T hid_get_item
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-ffffffff8264adf0 T hid_locate
-ffffffff8264af80 T hid_get_data_sub
-ffffffff8264b0a0 T hid_get_data
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-ffffffff8264b2c0 T hid_is_collection
-ffffffff8264b3f0 T hid_get_collection_data
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-ffffffff8264c000 T hidkbd_attach
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-ffffffff8264c740 T hidkbd_apple_munge
-ffffffff8264c930 T hidkbd_apple_tb_munge
-ffffffff8264ca20 T hidkbd_apple_iso_munge
-ffffffff8264cb10 T hidkbd_apple_mba_munge
-ffffffff8264cc70 T hidkbd_apple_iso_mba_munge
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-ffffffff8264d3d0 T hidkbd_enable
-ffffffff8264d410 T hidkbd_set_leds
-ffffffff8264d4f0 T hidkbd_ioctl
-ffffffff8264d5a0 T hidkbd_bell
-ffffffff8264d5f0 T hidkbd_cngetc
-ffffffff8264d690 T hidkbd_hookup_bell
-ffffffff8264e000 T hidms_stylus_hid_parse
-ffffffff8264e330 T hidms_pad_buttons_hid_parse
-ffffffff8264e410 T hidms_wacom_setup
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-ffffffff82650000 T hidmt_get_resolution
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-ffffffff82650870 T hidmt_set_input_mode
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-ffffffff82652000 T hidcc_match
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-ffffffff826522f0 T hidcc_parse
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-ffffffff82652c40 T hidcc_intr_slice
-ffffffff82652d40 T hidcc_setbits
-ffffffff82652ed0 T hidcc_rawinput
-ffffffff82652f80 T hidcc_input
-ffffffff82652ff0 T hidcc_bits_to_int
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-ffffffff82653260 T hidcc_bit_to_sym
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-ffffffff826532d0 T hidcc_set_leds
-ffffffff82653300 T hidcc_ioctl
-ffffffff82653370 T hidcc_is_array
-ffffffff826533c0 T hidcc_parse_array
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-ffffffff82653610 T hidcc_add_key
-ffffffff826536f0 T hidcc_bits_to_volume
-ffffffff82654000 T usb_match
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-ffffffff82654480 T usb_activate
-ffffffff826545d0 T usb_create_task_threads
-ffffffff82654680 T usb_explore
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-ffffffff82654900 T usb_needs_explore
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-ffffffff82654a50 T usb_wait_task
-ffffffff82654b00 T usb_abort_task_thread
-ffffffff82654c40 T usb_task_thread
-ffffffff82654db0 T usb_add_task
-ffffffff82654e90 T usb_rem_task
-ffffffff82654f50 T usb_rem_wait_task
-ffffffff82655080 T usbctlprint
-ffffffff826550d0 T usbopen
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-ffffffff82655170 T usb_fill_udc_task
-ffffffff82655220 T usb_fill_udf_task
-ffffffff826552a0 T usbioctl
-ffffffff826559a0 T usb_needs_reattach
-ffffffff826559f0 T usb_schedsoftintr
-ffffffff82655ad0 T usb_tap
-ffffffff82656000 T usbd_is_dying
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-ffffffff826560e0 T usbd_ref_wait
-ffffffff82656170 T usbd_get_devcnt
-ffffffff826561a0 T usbd_claim_iface
-ffffffff826561e0 T usbd_iface_claimed
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-ffffffff82656300 T usbd_open_pipe_ival
-ffffffff826563f0 T usbd_open_pipe_intr
-ffffffff82656680 T usbd_alloc_xfer
-ffffffff82656700 T usbd_setup_xfer
-ffffffff82656770 T usbd_transfer
-ffffffff82656a80 T usbd_free_xfer
-ffffffff82656b00 T usbd_close_pipe
-ffffffff82656c90 T usbd_abort_pipe
-ffffffff82656d20 T usb_transfer_complete
-ffffffff82656fe0 T usbd_dopoll
-ffffffff82657000 T usbd_alloc_buffer
-ffffffff82657090 T usbd_free_buffer
-ffffffff826570d0 T usbd_setup_default_xfer
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-ffffffff82657280 T usbd_get_xfer_status
-ffffffff826572e0 T usbd_get_config_descriptor
-ffffffff82657330 T usbd_get_interface_descriptor
-ffffffff82657380 T usbd_get_device_descriptor
-ffffffff826573b0 T usbd_interface2endpoint_descriptor
-ffffffff82657400 T usbd_clear_endpoint_stall
-ffffffff826574a0 T usbd_clear_endpoint_toggle
-ffffffff826574e0 T usbd_do_request
-ffffffff82657500 T usbd_clear_endpoint_stall_async
-ffffffff826575e0 T usbd_request_async
-ffffffff82657700 T usbd_device2interface_handle
-ffffffff82657790 T usbd_set_interface
-ffffffff82657890 T usbd_get_no_alts
-ffffffff82657900 T usbd_get_interface_altindex
-ffffffff82657930 T usbd_start_next
-ffffffff82657a00 T usb_insert_transfer
-ffffffff82657ad0 T usbd_do_request_flags
-ffffffff82657d90 T usbd_request_async_cb
-ffffffff82657e10 T usbd_get_quirks
-ffffffff82657e60 T usbd_set_polling
-ffffffff82657ec0 T usbd_get_endpoint_descriptor
-ffffffff82657f20 T usbd_ratecheck
-ffffffff82657f40 T usbd_match_device
-ffffffff82657fb0 T usbd_desc_iter_init
-ffffffff82658020 T usbd_desc_iter_next
-ffffffff826580a0 T usbd_str
-ffffffff82659000 T usbd_get_desc
-ffffffff82659070 T usbd_get_device_status
-ffffffff826590d0 T usbd_get_hub_descriptor
-ffffffff82659140 T usbd_get_hub_ss_descriptor
-ffffffff826591b0 T usbd_get_port_status
-ffffffff82659210 T usbd_set_hub_depth
-ffffffff82659270 T usbd_clear_port_feature
-ffffffff826592d0 T usbd_clear_endpoint_feature
-ffffffff82659330 T usbd_set_port_feature
-ffffffff82659390 T usbd_set_idle
-ffffffff826593f0 T usbd_get_report_descriptor
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-ffffffff827e3000 T toshiba_match
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-ffffffff827ec9a0 T chvgpio_opreg_handler
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-ffffffff827f2ad0 T ccpmic_read_1
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-ffffffff827f3000 T com_acpi_match
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-ffffffff827f3440 T com_acpi_is_designware
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-ffffffff827faf20 T tpm_release_locality_tis
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-ffffffff827fc000 T acpihve_match
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-ffffffff827fd000 T acpisbs_match
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-ffffffff827fd4e0 T acpisbs_setup_sensors
-ffffffff827fd610 T acpisbs_refresh_sensors
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-ffffffff827fd8c0 T acpi_smbus_read
-ffffffff827fe000 T surface_match
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-ffffffff827ff000 T ipmi_acpi_match
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-ffffffff827ff2b0 T ipmi_acpi_parse_crs
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-ffffffff82800670 T amdgpio_write_pin
-ffffffff828006f0 T amdgpio_intr_establish
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-ffffffff82800a40 T amdgpio_save_pin
-ffffffff82800ab0 T amdgpio_restore_pin
-ffffffff82800b20 T amdgpio_pin_intr
-ffffffff82801000 T acpihid_match
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-ffffffff82801400 T acpihid_eval
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-ffffffff82802000 t iosf_acpi_match
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-ffffffff82802170 t iosf_acpi_mbi_mdr_rd
-ffffffff828021f0 t iosf_acpi_mbi_mdr_wr
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-ffffffff82803110 T intelpmc_activate
-ffffffff82803320 T intelpmc_parse_lpit
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-ffffffff828040b0 T acpi_probe
-ffffffff828042a0 T acpi_map
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-ffffffff82804400 T acpi_bus_space_map
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-ffffffff82804440 T acpi_intr_establish
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-ffffffff82804830 T acpi_attach_machdep
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-ffffffff82804f20 T acpi_iommu_device_map
-ffffffff82805000 T hibernate_resume_machdep
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-ffffffff82805060 T hibernate_activate_resume_pt_machdep
-ffffffff828050a0 T hibernate_switch_stack_machdep
-ffffffff828050e0 T hibernate_flush
-ffffffff82805110 T acpi_savecpu
-ffffffff82806000 T sleep_showstate
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-ffffffff828063d0 T suspend_finish
-ffffffff82807000 T acpiopen
-ffffffff828070d0 T acpiclose
-ffffffff82807170 T acpiioctl
-ffffffff82807300 T request_sleep
-ffffffff82807390 T acpi_filtdetach
-ffffffff828073f0 T acpi_filtread
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-ffffffff82809000 T efiopen
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-ffffffff82809760 T efiioc_var_set
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-ffffffff8280a520 T efi_enter
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-ffffffff8280a660 T efi_fault
-ffffffff8280b000 T vmm_probe
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-ffffffff8280b1b0 T vmm_activate
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-ffffffff8280c010 T vm_resetcpu
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-ffffffff8280c2b0 T pledge_ioctl_vmm
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-ffffffff8280d7a0 T vmmioctl_machdep
-ffffffff8280d880 T vm_intr_pending
-ffffffff8280d940 T pledge_ioctl_vmm_machdep
-ffffffff8280d980 T vm_rwvmparams
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-ffffffff8280dc10 T vm_rwregs
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-ffffffff8280e770 T vcpu_readregs_svm
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-ffffffff8280f0f0 T vmx_pmap_find_pte_ept
-ffffffff8280f1c0 T start_vmm_on_cpu
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-ffffffff8280fcf0 T vmx_setmsrbr
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-ffffffff8280fe50 T vmx_setmsrbrw
-ffffffff8280ff60 T svm_set_clean
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-ffffffff82810a70 T vcpu_vmx_check_cap
-ffffffff82810b70 T vcpu_vmx_compute_ctrl
-ffffffff82810d50 T vcpu_init_vmx
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-ffffffff82811380 T vcpu_deinit_vmx
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-ffffffff82811840 T vcpu_deinit_svm
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-ffffffff82812810 T vcpu_run_svm
-ffffffff82812ee0 T vmm_fpurestore
-ffffffff82812fb0 T vmm_fpusave
-ffffffff82813040 T vmm_translate_gva
-ffffffff82813370 T vmm_update_pvclock
-ffffffff82813480 T vmx_get_exit_info
-ffffffff82813500 T vmx_handle_exit
-ffffffff82813970 T vmx_instruction_error_decode
-ffffffff82813b40 T vmm_get_guest_cpu_cpl
-ffffffff82813c60 T vmx_handle_intr
-ffffffff82813d00 T svm_handle_hlt
-ffffffff82813d50 T vmx_handle_hlt
-ffffffff82813e20 T svm_handle_exit
-ffffffff828141a0 T svm_handle_np_fault
-ffffffff82814340 T vmm_handle_cpuid
-ffffffff82814a20 T svm_handle_msr
-ffffffff82814d10 T svm_handle_xsetbv
-ffffffff82814dd0 T svm_handle_inout
-ffffffff82814ee0 T vmm_inject_ud
-ffffffff82814f20 T vmm_inject_db
-ffffffff82814f60 T vmx_handle_np_fault
-ffffffff828150e0 T vmx_handle_inout
-ffffffff82815280 T vmx_handle_cr
-ffffffff828154c0 T vmx_handle_rdmsr
-ffffffff828155c0 T vmx_handle_wrmsr
-ffffffff82815870 T vmx_handle_xsetbv
-ffffffff82815970 T vmm_inject_gp
-ffffffff828159b0 T vmm_get_guest_memtype
-ffffffff82815a30 T vmx_get_exit_qualification
-ffffffff82815aa0 T vmx_get_guest_faulttype
-ffffffff82815b50 T svm_get_guest_faulttype
-ffffffff82815b80 T svm_fault_page
-ffffffff82815c10 T vmx_fault_page
-ffffffff82815d90 T vmm_get_guest_cpu_mode
-ffffffff82815ea0 T vmx_load_pdptes
-ffffffff828161c0 T vmx_handle_cr0_write
-ffffffff82816420 T vmx_handle_cr4_write
-ffffffff828164e0 T vmm_handle_xsetbv
-ffffffff82816590 T vmx_handle_misc_enable_msr
-ffffffff828165f0 T vmm_pat_is_valid
-ffffffff828166d0 t vmm_handle_cpuid_0xd
-ffffffff828167d0 T vmm_gpa_is_valid
-ffffffff82816840 T vmx_exit_reason_decode
-ffffffff82816880 T svm_exit_reason_decode
-ffffffff82817690 T vcpu_state_decode
-ffffffff82818000 T vmm_dispatch_intr
-ffffffff82818030 T vmxon
-ffffffff82818060 T vmxoff
-ffffffff82818090 T vmclear
-ffffffff828180c0 T vmptrld
-ffffffff828180f0 T vmptrst
-ffffffff82818120 T vmwrite
-ffffffff82818150 T vmread
-ffffffff82818180 T invvpid
-ffffffff8281819b t invvpid_fail
-ffffffff828181a2 t invvpid_ret
-ffffffff828181c0 T invept
-ffffffff828181db t invept_fail
-ffffffff828181e2 t invept_ret
-ffffffff82818200 T vmx_enter_guest
-ffffffff8281822b t skip_init
-ffffffff82818298 t no_l1df_msr
-ffffffff8281829b t l1df_tlb_loop
-ffffffff828182b4 t l1df_tlb_done
-ffffffff828182bc t l1df_load_cache
-ffffffff828182d3 t done_flush
-ffffffff82818366 t do_resume
-ffffffff828183eb t fail_launch_or_resume
-ffffffff8281842d t fail_launch_unknown
-ffffffff8281843a t fail_launch_invalid_vmcs
-ffffffff82818447 t fail_launch_valid_vmcs
-ffffffff82818464 t vmx_exit_handler_asm
-ffffffff82818529 t restore_host
-ffffffff82818550 T svm_enter_guest
-ffffffff828186d2 t restore_host_svm
-ffffffff82819000 T sdmmc_match
-ffffffff82819060 T sdmmc_attach
-ffffffff82819400 T sdmmc_detach
-ffffffff828194c0 T sdmmc_activate
-ffffffff82819580 T sdmmc_discover_task
-ffffffff82819670 T sdmmc_create_thread
-ffffffff828196e0 T sdmmc_holds_root_device
-ffffffff82819740 T sdmmc_task_thread
-ffffffff828199c0 T sdmmc_needs_discover
-ffffffff82819a90 T sdmmc_del_task
-ffffffff82819b50 T sdmmc_card_detach
-ffffffff82819c60 T sdmmc_add_task
-ffffffff82819cf0 T sdmmc_card_attach
-ffffffff82819e60 T sdmmc_enable
-ffffffff82819ff0 T sdmmc_scan
-ffffffff8281a090 T sdmmc_init
-ffffffff8281a1c0 T sdmmc_disable
-ffffffff8281a350 T sdmmc_function_free
-ffffffff8281a370 T sdmmc_delay
-ffffffff8281a3c0 T sdmmc_select_card
-ffffffff8281a600 T sdmmc_set_bus_power
-ffffffff8281a7c0 T sdmmc_function_alloc
-ffffffff8281a860 T sdmmc_app_command
-ffffffff8281aa20 T sdmmc_mmc_command
-ffffffff8281aab0 T sdmmc_go_idle_state
-ffffffff8281abe0 T sdmmc_send_if_cond
-ffffffff8281ad50 T sdmmc_set_relative_addr
-ffffffff8281b000 T sdmmc_cisptr
-ffffffff8281b0d0 T sdmmc_read_cis
-ffffffff8281b4b0 T sdmmc_print_cis
-ffffffff8281b6a0 T sdmmc_check_cis_quirks
-ffffffff8281c000 T sdmmc_io_enable
-ffffffff8281c2f0 T sdmmc_io_reset
-ffffffff8281c450 T sdmmc_io_send_op_cond
-ffffffff8281c5e0 T sdmmc_io_scan
-ffffffff8281c760 T sdmmc_io_init
-ffffffff8281c8d0 T sdmmc_io_set_highspeed
-ffffffff8281cbd0 T sdmmc_io_set_bus_width
-ffffffff8281cec0 T sdmmc_io_function_ready
-ffffffff8281d070 T sdmmc_io_read_1
-ffffffff8281d1f0 T sdmmc_io_function_enable
-ffffffff8281d690 T sdmmc_io_write_1
-ffffffff8281d830 T sdmmc_io_function_disable
-ffffffff8281db10 T sdmmc_io_attach
-ffffffff8281dc00 T sdmmc_print
-ffffffff8281dec0 T sdmmc_submatch
-ffffffff8281df50 T sdmmc_io_detach
-ffffffff8281e010 T sdmmc_io_rw_direct
-ffffffff8281e1e0 T sdmmc_io_rw_extended_subr
-ffffffff8281e390 T sdmmc_io_rw_extended
-ffffffff8281e7d0 T sdmmc_io_read_2
-ffffffff8281e940 T sdmmc_io_write_2
-ffffffff8281eac0 T sdmmc_io_read_4
-ffffffff8281ec30 T sdmmc_io_write_4
-ffffffff8281edb0 T sdmmc_io_read_multi_1
-ffffffff8281eeb0 T sdmmc_io_write_multi_1
-ffffffff8281efb0 T sdmmc_io_read_region_1
-ffffffff8281f0b0 T sdmmc_io_write_region_1
-ffffffff8281f1b0 T sdmmc_io_xchg
-ffffffff8281f370 T sdmmc_intr_enable
-ffffffff8281f650 T sdmmc_intr_disable
-ffffffff8281f930 T sdmmc_intr_establish
-ffffffff8281fa50 T sdmmc_intr_disestablish
-ffffffff8281fb50 T sdmmc_card_intr
-ffffffff8281fba0 T sdmmc_intr_task
-ffffffff8281fc60 T sdmmc_io_set_blocklen
-ffffffff82820000 T sdmmc_mem_enable
-ffffffff828204d0 T sdmmc_mem_send_op_cond
-ffffffff828206b0 T sdmmc_mem_signal_voltage
-ffffffff828207b0 T sdmmc_mem_scan
-ffffffff82820b00 T sdmmc_decode_csd
-ffffffff82820f50 T sdmmc_decode_cid
-ffffffff82821400 T sdmmc_mem_send_scr
-ffffffff82821560 T sdmmc_mem_decode_scr
-ffffffff828215c0 T sdmmc_mem_send_cxd_data
-ffffffff82821740 T sdmmc_mem_set_bus_width
-ffffffff82821870 T sdmmc_mem_sd_switch
-ffffffff82821b30 T sdmmc_be512_to_bitfield512
-ffffffff82821be0 T sdmmc_mem_mmc_switch
-ffffffff82821cd0 T sdmmc_mem_init
-ffffffff82821e60 T sdmmc_mem_set_blocklen
-ffffffff82821f70 T sdmmc_mem_sd_init
-ffffffff828223e0 T sdmmc_mem_mmc_init
-ffffffff82822b60 T sdmmc_mem_select_transfer_mode
-ffffffff82822be0 T sdmmc_mem_execute_tuning
-ffffffff82822c70 T sdmmc_mem_read_block_subr
-ffffffff82823000 T sdmmc_mem_single_read_block
-ffffffff828230d0 T sdmmc_mem_read_block
-ffffffff828232e0 T sdmmc_mem_write_block_subr
-ffffffff82823660 T sdmmc_mem_single_write_block
-ffffffff82823730 T sdmmc_mem_write_block
-ffffffff82823940 T sdmmc_mem_hibernate_write
-ffffffff82824000 T sdmmc_scsi_cmd
-ffffffff82824200 T sdmmc_minphys
-ffffffff82824280 T sdmmc_scsi_attach
-ffffffff828244c0 T sdmmc_alloc_ccbs
-ffffffff82824620 T sdmmc_free_ccbs
-ffffffff82824680 T sdmmc_scsi_detach
-ffffffff82824840 T sdmmc_stimeout
-ffffffff828248e0 T sdmmc_ccb_alloc
-ffffffff828249a0 T sdmmc_ccb_free
-ffffffff82824aa0 T sdmmc_inquiry
-ffffffff82824d30 T sdmmc_start_xs
-ffffffff82824e50 T sdmmc_complete_xs
-ffffffff82824f40 T sdmmc_done_xs
-ffffffff82824f90 T sdmmc_scsi_hibernate_io
-ffffffff82826000 T bwfm_sdio_preinit
-ffffffff828265a0 T bwfm_sdio_txcheck
-ffffffff828265e0 T bwfm_sdio_txdata
-ffffffff82826660 T bwfm_sdio_txctl
-ffffffff828267f0 T bwfm_sdio_buscore_read
-ffffffff82826800 T bwfm_sdio_buscore_write
-ffffffff82826820 T bwfm_sdio_buscore_prepare
-ffffffff828269a0 T bwfm_sdio_buscore_activate
-ffffffff82826a30 T bwfm_sdio_match
-ffffffff82826ae0 T bwfm_sdio_attach
-ffffffff82826e80 T bwfm_sdio_detach
-ffffffff82826f00 T bwfm_sdio_task
-ffffffff828270c0 T bwfm_sdio_write_1
-ffffffff828270f0 T bwfm_sdio_read_1
-ffffffff82827120 T bwfm_sdio_write_4
-ffffffff828271f0 T bwfm_sdio_read_4
-ffffffff828272b0 T bwfm_sdio_load_microcode
-ffffffff828275a0 T bwfm_sdio_clkctl
-ffffffff828276d0 T bwfm_sdio_dev_write
-ffffffff82827720 T bwfm_sdio_intr
-ffffffff82827770 T bwfm_sdio_ram_read_write
-ffffffff828279f0 T bwfm_sdio_htclk
-ffffffff82827cb0 T bwfm_sdio_readshared
-ffffffff82827da0 T bwfm_sdio_dev_read
-ffffffff82827de0 T bwfm_sdio_rx_frames
-ffffffff82828210 T bwfm_sdio_tx_frames
-ffffffff82828330 T bwfm_sdio_backplane
-ffffffff82828400 T bwfm_sdio_buf_read
-ffffffff82828500 T bwfm_sdio_buf_write
-ffffffff828285d0 T bwfm_sdio_frame_read_write
-ffffffff82828780 T bwfm_sdio_newbuf
-ffffffff82828810 T bwfm_sdio_tx_ok
-ffffffff82828870 T bwfm_sdio_tx_ctrlframe
-ffffffff82828980 T bwfm_sdio_tx_dataframe
-ffffffff82828af0 T bwfm_sdio_rx_glom
-ffffffff82829000 T onewire_match
-ffffffff82829060 T onewire_attach
-ffffffff82829120 T onewire_detach
-ffffffff82829190 T onewire_activate
-ffffffff828291b0 T onewire_scan
-ffffffff82829400 T onewire_createthread
-ffffffff82829470 T onewire_print
-ffffffff82829560 T onewirebus_print
-ffffffff828295b0 T onewire_lock
-ffffffff828295d0 T onewire_unlock
-ffffffff828295f0 T onewire_reset
-ffffffff82829610 T onewire_bit
-ffffffff82829630 T onewire_read_byte
-ffffffff828297c0 T onewire_write_byte
-ffffffff828298d0 T onewire_read_block
-ffffffff82829970 T onewire_write_block
-ffffffff82829a10 T onewire_triplet
-ffffffff82829b20 T onewire_matchrom
-ffffffff82829d10 T onewire_search
-ffffffff8282a180 T onewire_thread
-ffffffff8282b000 T onewire_crc
-ffffffff8282b0b0 T onewire_crc16
-ffffffff8282b170 T onewire_famname
-ffffffff8282b1b0 T onewire_matchbyfam
-ffffffff8282c000 T owid_match
-ffffffff8282c030 T owid_attach
-ffffffff8282c120 T owid_detach
-ffffffff8282c170 T owid_activate
-ffffffff8282d000 T owsbm_match
-ffffffff8282d030 T owsbm_attach
-ffffffff8282d240 T owsbm_detach
-ffffffff8282d2d0 T owsbm_activate
-ffffffff8282d300 T owsbm_update
-ffffffff8282e000 T owtemp_match
-ffffffff8282e030 T owtemp_attach
-ffffffff8282e160 T owtemp_detach
-ffffffff8282e1f0 T owtemp_activate
-ffffffff8282e220 T owtemp_update
-ffffffff8282f000 T owctr_match
-ffffffff8282f030 T owctr_attach
-ffffffff8282f1c0 T owctr_detach
-ffffffff8282f250 T owctr_activate
-ffffffff8282f280 T owctr_update
-ffffffff8282f2c0 T owctr_update_counter
-ffffffff82830000 A __text_page_start
-ffffffff82830000 T Xsyscall_meltdown
-ffffffff8283000c T Xsyscall
-ffffffff82830299 t Xsyscall_trampback
-ffffffff828302b0 T intr_user_exit
-ffffffff828302f2 t intr_user_exit_post_ast
-ffffffff8283044b t Xiretq_trampback
-ffffffff82830457 T doreti_iret
-ffffffff82831000 T alltraps
-ffffffff82831138 T recall_trap
-ffffffff82831150 T alltraps_kern
-ffffffff82831153 T alltraps_kern_meltdown
-ffffffff82832000 ? Xtrap00
-ffffffff82832000 A __kutext_start
-ffffffff82832000 A __text_page_end
-ffffffff82832010 ? Xtrap01
-ffffffff82832020 ? Xtrap02
-ffffffff82832028 c calltrap_specstk
-ffffffff828320f0 ? calltrap_specstk_tramp
-ffffffff82832110 ? Xtrap03
-ffffffff82832120 ? Xtrap04
-ffffffff82832130 ? Xtrap05
-ffffffff82832140 ? Xtrap06
-ffffffff82832150 ? Xtrap07
-ffffffff82832160 ? Xtrap08
-ffffffff82832170 ? Xtrap09
-ffffffff82832180 ? Xtrap0a
-ffffffff82832190 ? Xtrap0b
-ffffffff828321a0 ? Xtrap0c
-ffffffff828321b0 ? Xtrap0d
-ffffffff82832240 ? Xtrap0e
-ffffffff82832250 ? Xintrspurious
-ffffffff82832250 ? Xtrap0f
-ffffffff82832260 ? Xtrap10
-ffffffff82832270 ? Xtrap11
-ffffffff82832280 ? Xtrap12
-ffffffff82832290 ? Xtrap13
-ffffffff828322a0 ? Xtrap14
-ffffffff828322b0 ? Xtrap15
-ffffffff828322c0 ? Xtrap16
-ffffffff828322c0 ? Xtrap17
-ffffffff828322c0 ? Xtrap18
-ffffffff828322c0 ? Xtrap19
-ffffffff828322c0 ? Xtrap1a
-ffffffff828322c0 ? Xtrap1b
-ffffffff828322c0 ? Xtrap1c
-ffffffff828322c0 ? Xtrap1d
-ffffffff828322c0 ? Xtrap1e
-ffffffff828322c0 ? Xtrap1f
-ffffffff828322d0 ? x2apic_eoi
-ffffffff828322f0 ? Xintr_lapic_ipi
-ffffffff82832330 ? Xipi_invltlb
-ffffffff82832360 ? Xipi_invept
-ffffffff828323a0 ? Xipi_invlpg
-ffffffff828323d0 ? Xipi_invlrange
-ffffffff82832410 ? Xipi_invltlb_pcid
-ffffffff82832450 ? Xipi_invlpg_pcid
-ffffffff828324a0 ? Xipi_invlrange_pcid
-ffffffff82832510 ? Xintr_lapic_ltimer
-ffffffff82832550 ? Xintr_xen_upcall
-ffffffff82832590 ? Xintr_hyperv_upcall
-ffffffff828325d0 ? Xintr_legacy0
-ffffffff82832610 ? Xintr_legacy1
-ffffffff82832650 ? Xintr_legacy2
-ffffffff82832690 ? Xintr_legacy3
-ffffffff828326d0 ? Xintr_legacy4
-ffffffff82832710 ? Xintr_legacy5
-ffffffff82832750 ? Xintr_legacy6
-ffffffff82832790 ? Xintr_legacy7
-ffffffff828327d0 ? Xintr_legacy8
-ffffffff82832810 ? Xintr_legacy9
-ffffffff82832850 ? Xintr_legacy10
-ffffffff82832890 ? Xintr_legacy11
-ffffffff828328d0 ? Xintr_legacy12
-ffffffff82832910 ? Xintr_legacy13
-ffffffff82832950 ? Xintr_legacy14
-ffffffff82832990 ? Xintr_legacy15
-ffffffff828329d0 ? Xintr_ioapic_edge0
-ffffffff82832a10 ? Xintr_ioapic_edge1
-ffffffff82832a50 ? Xintr_ioapic_edge2
-ffffffff82832a90 ? Xintr_ioapic_edge3
-ffffffff82832ad0 ? Xintr_ioapic_edge4
-ffffffff82832b10 ? Xintr_ioapic_edge5
-ffffffff82832b50 ? Xintr_ioapic_edge6
-ffffffff82832b90 ? Xintr_ioapic_edge7
-ffffffff82832bd0 ? Xintr_ioapic_edge8
-ffffffff82832c10 ? Xintr_ioapic_edge9
-ffffffff82832c50 ? Xintr_ioapic_edge10
-ffffffff82832c90 ? Xintr_ioapic_edge11
-ffffffff82832cd0 ? Xintr_ioapic_edge12
-ffffffff82832d10 ? Xintr_ioapic_edge13
-ffffffff82832d50 ? Xintr_ioapic_edge14
-ffffffff82832d90 ? Xintr_ioapic_edge15
-ffffffff82832dd0 ? Xintr_ioapic_edge16
-ffffffff82832e10 ? Xintr_ioapic_edge17
-ffffffff82832e50 ? Xintr_ioapic_edge18
-ffffffff82832e90 ? Xintr_ioapic_edge19
-ffffffff82832ed0 ? Xintr_ioapic_edge20
-ffffffff82832f10 ? Xintr_ioapic_edge21
-ffffffff82832f50 ? Xintr_ioapic_edge22
-ffffffff82832f90 ? Xintr_ioapic_edge23
-ffffffff82832fd0 ? Xintr_ioapic_edge24
-ffffffff82833010 ? Xintr_ioapic_edge25
-ffffffff82833050 ? Xintr_ioapic_edge26
-ffffffff82833090 ? Xintr_ioapic_edge27
-ffffffff828330d0 ? Xintr_ioapic_edge28
-ffffffff82833110 ? Xintr_ioapic_edge29
-ffffffff82833150 ? Xintr_ioapic_edge30
-ffffffff82833190 ? Xintr_ioapic_edge31
-ffffffff828331d0 ? Xintr_ioapic_edge32
-ffffffff82833210 ? Xintr_ioapic_edge33
-ffffffff82833250 ? Xintr_ioapic_edge34
-ffffffff82833290 ? Xintr_ioapic_edge35
-ffffffff828332d0 ? Xintr_ioapic_edge36
-ffffffff82833310 ? Xintr_ioapic_edge37
-ffffffff82833350 ? Xintr_ioapic_edge38
-ffffffff82833390 ? Xintr_ioapic_edge39
-ffffffff828333d0 ? Xintr_ioapic_edge40
-ffffffff82833410 ? Xintr_ioapic_edge41
-ffffffff82833450 ? Xintr_ioapic_edge42
-ffffffff82833490 ? Xintr_ioapic_edge43
-ffffffff828334d0 ? Xintr_ioapic_edge44
-ffffffff82833510 ? Xintr_ioapic_edge45
-ffffffff82833550 ? Xintr_ioapic_edge46
-ffffffff82833590 ? Xintr_ioapic_edge47
-ffffffff828335d0 ? Xintr_ioapic_edge48
-ffffffff82833610 ? Xintr_ioapic_edge49
-ffffffff82833650 ? Xintr_ioapic_edge50
-ffffffff82833690 ? Xintr_ioapic_edge51
-ffffffff828336d0 ? Xintr_ioapic_edge52
-ffffffff82833710 ? Xintr_ioapic_edge53
-ffffffff82833750 ? Xintr_ioapic_edge54
-ffffffff82833790 ? Xintr_ioapic_edge55
-ffffffff828337d0 ? Xintr_ioapic_edge56
-ffffffff82833810 ? Xintr_ioapic_edge57
-ffffffff82833850 ? Xintr_ioapic_edge58
-ffffffff82833890 ? Xintr_ioapic_edge59
-ffffffff828338d0 ? Xintr_ioapic_edge60
-ffffffff82833910 ? Xintr_ioapic_edge61
-ffffffff82833950 ? Xintr_ioapic_edge62
-ffffffff82833990 ? Xintr_ioapic_edge63
-ffffffff828339d0 ? Xintr_ioapic_level0
-ffffffff82833a10 ? Xintr_ioapic_level1
-ffffffff82833a50 ? Xintr_ioapic_level2
-ffffffff82833a90 ? Xintr_ioapic_level3
-ffffffff82833ad0 ? Xintr_ioapic_level4
-ffffffff82833b10 ? Xintr_ioapic_level5
-ffffffff82833b50 ? Xintr_ioapic_level6
-ffffffff82833b90 ? Xintr_ioapic_level7
-ffffffff82833bd0 ? Xintr_ioapic_level8
-ffffffff82833c10 ? Xintr_ioapic_level9
-ffffffff82833c50 ? Xintr_ioapic_level10
-ffffffff82833c90 ? Xintr_ioapic_level11
-ffffffff82833cd0 ? Xintr_ioapic_level12
-ffffffff82833d10 ? Xintr_ioapic_level13
-ffffffff82833d50 ? Xintr_ioapic_level14
-ffffffff82833d90 ? Xintr_ioapic_level15
-ffffffff82833dd0 ? Xintr_ioapic_level16
-ffffffff82833e10 ? Xintr_ioapic_level17
-ffffffff82833e50 ? Xintr_ioapic_level18
-ffffffff82833e90 ? Xintr_ioapic_level19
-ffffffff82833ed0 ? Xintr_ioapic_level20
-ffffffff82833f10 ? Xintr_ioapic_level21
-ffffffff82833f50 ? Xintr_ioapic_level22
-ffffffff82833f90 ? Xintr_ioapic_level23
-ffffffff82833fd0 ? Xintr_ioapic_level24
-ffffffff82834010 ? Xintr_ioapic_level25
-ffffffff82834050 ? Xintr_ioapic_level26
-ffffffff82834090 ? Xintr_ioapic_level27
-ffffffff828340d0 ? Xintr_ioapic_level28
-ffffffff82834110 ? Xintr_ioapic_level29
-ffffffff82834150 ? Xintr_ioapic_level30
-ffffffff82834190 ? Xintr_ioapic_level31
-ffffffff828341d0 ? Xintr_ioapic_level32
-ffffffff82834210 ? Xintr_ioapic_level33
-ffffffff82834250 ? Xintr_ioapic_level34
-ffffffff82834290 ? Xintr_ioapic_level35
-ffffffff828342d0 ? Xintr_ioapic_level36
-ffffffff82834310 ? Xintr_ioapic_level37
-ffffffff82834350 ? Xintr_ioapic_level38
-ffffffff82834390 ? Xintr_ioapic_level39
-ffffffff828343d0 ? Xintr_ioapic_level40
-ffffffff82834410 ? Xintr_ioapic_level41
-ffffffff82834450 ? Xintr_ioapic_level42
-ffffffff82834490 ? Xintr_ioapic_level43
-ffffffff828344d0 ? Xintr_ioapic_level44
-ffffffff82834510 ? Xintr_ioapic_level45
-ffffffff82834550 ? Xintr_ioapic_level46
-ffffffff82834590 ? Xintr_ioapic_level47
-ffffffff828345d0 ? Xintr_ioapic_level48
-ffffffff82834610 ? Xintr_ioapic_level49
-ffffffff82834650 ? Xintr_ioapic_level50
-ffffffff82834690 ? Xintr_ioapic_level51
-ffffffff828346d0 ? Xintr_ioapic_level52
-ffffffff82834710 ? Xintr_ioapic_level53
-ffffffff82834750 ? Xintr_ioapic_level54
-ffffffff82834790 ? Xintr_ioapic_level55
-ffffffff828347d0 ? Xintr_ioapic_level56
-ffffffff82834810 ? Xintr_ioapic_level57
-ffffffff82834850 ? Xintr_ioapic_level58
-ffffffff82834890 ? Xintr_ioapic_level59
-ffffffff828348d0 ? Xintr_ioapic_level60
-ffffffff82834910 ? Xintr_ioapic_level61
-ffffffff82834950 ? Xintr_ioapic_level62
-ffffffff82834990 ? Xintr_ioapic_level63
-ffffffff82835000 ? codepatch_fill_nop
-ffffffff82835000 A __cptext_start
-ffffffff82835000 A __kutext_end
-ffffffff828350b0 ? codepatch_maprw
-ffffffff828351c0 ? codepatch_unmaprw
-ffffffff82835230 ? codepatch_nop
-ffffffff828353b0 ? codepatch_replace
-ffffffff82835580 ? codepatch_call
-ffffffff828355a0 ? codepatch_control_flow
-ffffffff828357c0 ? codepatch_jmp
-ffffffff82836000 A __cptext_end
-ffffffff82836000 A __rodata_start
-ffffffff82836000 C _etext
-ffffffff82836000 C etext
-ffffffff82837000 r seeprom_read
-ffffffff82837004 r icl_mg_pll_find_divisors.div1_vals
-ffffffff82837034 r athn_ac2qid
-ffffffff82837034 r athn_ac2qid
-ffffffff82837034 r athn_ac2qid
-ffffffff82837040 r rtwn_get_rssi.cckoff
-ffffffff82837068 r rsu_ac2qid
-ffffffff82837078 r pckbc_portcmd
-ffffffff8283707c r tht_fifo_write_pad.pad
-ffffffff82837084 r rsu_get_rssi.cckoff
-ffffffff828370a4 r adlp_n_revids
-ffffffff828370e8 r apple_iso_trans
-ffffffff828370f0 r wihap_check_tx.txratetable
-ffffffff828370f4 r dmamode
-ffffffff82837118 r gen9_edram_size_mb.sets
-ffffffff8283712c r dg2_g12_revid_step_tbl
-ffffffff82838000 r isomappings
-ffffffff82838080 r unimappings
-ffffffff82838230 r replacements
-ffffffff8283babc r apollo_pio_rec
-ffffffff82889960 r apollo_udma33_tim
-ffffffff8289f04b r pp_r600_decoded_lanes
-ffffffff828d6315 r cmd680_setup_channel.udma_tbl
-ffffffff828de8c2 r apollo_udma100_tim
-ffffffff828de8c8 r cmd0646_9_tim_udma
-ffffffff828ed1e1 r substchar
-ffffffff829449e3 r apollo_udma133_tim
-ffffffff829449ea r apollo_udma66_tim
-ffffffff82944a14 r cy_pio_rec
-ffffffff8294a300 R drm_ca
-ffffffff8294a328 R drm_filtops
-ffffffff8294a358 R drmread_filtops
-ffffffff8294b000 r vga_emulops
-ffffffff8294b048 R vga_stdscreen
-ffffffff8294b078 R vga_stdscreen_mono
-ffffffff8294b0a8 R vga_stdscreen_bf
-ffffffff8294b0d8 R vga_40lscreen
-ffffffff8294b108 R vga_40lscreen_mono
-ffffffff8294b138 R vga_40lscreen_bf
-ffffffff8294b168 R vga_50lscreen
-ffffffff8294b198 R vga_50lscreen_mono
-ffffffff8294b1c8 R vga_50lscreen_bf
-ffffffff8294b1f8 R vga_screenlist
-ffffffff8294b208 R vga_screenlist_mono
-ffffffff8294b218 R vga_accessops
-ffffffff8294b278 r i945_wm_info
-ffffffff8294b2b8 r bgansitopc
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-ffffffff829d0000 R atw_txthresh_tab_lo
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-ffffffff829dc5c0 r bwi_phy_rotor_11g_rev1
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-ffffffff829def00 R qmi_wlanfw_cap_resp_msg_v01_ei
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-ffffffff829df3e0 R qmi_wlanfw_m3_info_req_msg_v01_ei
-ffffffff829df440 R qmi_wlanfw_m3_info_resp_msg_v01_ei
-ffffffff829df480 R qmi_wlanfw_wlan_ini_req_msg_v01_ei
-ffffffff829df4e0 R qmi_wlanfw_wlan_ini_resp_msg_v01_ei
-ffffffff829df520 R qmi_wlanfw_ce_tgt_pipe_cfg_s_v01_ei
-ffffffff829df5e0 R qmi_wlanfw_ce_svc_pipe_cfg_s_v01_ei
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-ffffffff829df700 R qmi_wlanfw_wlan_mode_req_msg_v01_ei
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-ffffffff829df7c0 R qmi_wlanfw_wlan_cfg_req_msg_v01_ei
-ffffffff829df9a0 R qmi_wlanfw_wlan_cfg_resp_msg_v01_ei
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-ffffffff829e30c0 R uhci_device_intr_methods
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-ffffffff829e3174 R uhci_endpd
-ffffffff829e317b R uhci_hubd_piix
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-ffffffff829e4080 R ohci_root_intr_methods
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-ffffffff829e40e0 R ohci_device_intr_methods
-ffffffff829e4110 R ohci_device_bulk_methods
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-ffffffff829e6090 R xhci_device_ctrl_methods
-ffffffff829e60c0 R xhci_device_intr_methods
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-ffffffff829e617b R xhci_endpcd
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-ffffffff829ed000 R mpath_ca
-ffffffff829ed028 R mpath_switch
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-ffffffff829ee028 R sr_switch
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-ffffffff829f1058 R kstat_id_tree_RBT_TYPE
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-ffffffff829f4110 R fusefsread_filtops
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-ffffffff829fc180 R db_show_cmds
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-ffffffff829ff000 R midi_ca
-ffffffff829ff028 R midiwrite_filtops
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-ffffffff82a02028 R video_filtops
-ffffffff82a03000 R cd9660_vfsops
-ffffffff82a04000 R cd9660_vops
-ffffffff82a04110 R cd9660_specvops
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-ffffffff82a05000 R udf_vfsops
-ffffffff82a06000 R udf_vops
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-ffffffff82a13000 R pledge_syscalls
-ffffffff82a13a60 r pledgenames
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-ffffffff82a14000 r unvname_rbt_RBT_INFO
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-ffffffff82a1b010 r gpt_get_fstype.gpt_uuid_msdos
-ffffffff82a1b020 r gpt_get_fstype.gpt_uuid_chromerootfs
-ffffffff82a1b030 r gpt_get_fstype.gpt_uuid_linux
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-ffffffff82a1c018 R hiballoc_addr_RBT_TYPE
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-ffffffff82a1e018 R phtree_RBT_TYPE
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-ffffffff82a1f030 R pipe_wfiltops
-ffffffff82a1f060 R pipe_efiltops
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-ffffffff82a20000 R socketops
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-ffffffff82a26000 R unixdomain
-ffffffff82a26050 R unixsw
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-ffffffff82a27030 R sowrite_filtops
-ffffffff82a27060 R soexcept_filtops
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-ffffffff82a28160 R unpsqctl_vars
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-ffffffff82a2d000 R vnops
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-ffffffff82a31000 R regyear
-ffffffff82a31020 R leapyear
-ffffffff82a31040 r dos2unix
-ffffffff82a31140 r u2l
-ffffffff82a31240 r unix2dos
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-ffffffff82a33170 R msdosfsvnode_filtops
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-ffffffff82a47090 r nvgre_mcast_tree_RBT_INFO
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-ffffffff82a470c8 R eoip_tree_RBT_TYPE
-ffffffff82a470d0 r nvgre_etherbridge_ops
-ffffffff82a48000 r trunk_protos
-ffffffff82a49000 R ethermulticastaddr_slowprotocols
-ffffffff82a49006 R lacp_info_tlv_template
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+ffffffff8282a400 T onewire_createthread
+ffffffff8282a470 T onewire_print
+ffffffff8282a560 T onewirebus_print
+ffffffff8282a5b0 T onewire_lock
+ffffffff8282a5d0 T onewire_unlock
+ffffffff8282a5f0 T onewire_reset
+ffffffff8282a610 T onewire_bit
+ffffffff8282a630 T onewire_read_byte
+ffffffff8282a7c0 T onewire_write_byte
+ffffffff8282a8d0 T onewire_read_block
+ffffffff8282a970 T onewire_write_block
+ffffffff8282aa10 T onewire_triplet
+ffffffff8282ab20 T onewire_matchrom
+ffffffff8282ad10 T onewire_search
+ffffffff8282b180 T onewire_thread
+ffffffff8282c000 T onewire_crc
+ffffffff8282c0b0 T onewire_crc16
+ffffffff8282c170 T onewire_famname
+ffffffff8282c1b0 T onewire_matchbyfam
+ffffffff8282d000 T owid_match
+ffffffff8282d030 T owid_attach
+ffffffff8282d120 T owid_detach
+ffffffff8282d170 T owid_activate
+ffffffff8282e000 T owsbm_match
+ffffffff8282e030 T owsbm_attach
+ffffffff8282e240 T owsbm_detach
+ffffffff8282e2d0 T owsbm_activate
+ffffffff8282e300 T owsbm_update
+ffffffff8282f000 T owtemp_match
+ffffffff8282f030 T owtemp_attach
+ffffffff8282f160 T owtemp_detach
+ffffffff8282f1f0 T owtemp_activate
+ffffffff8282f220 T owtemp_update
+ffffffff82830000 T owctr_match
+ffffffff82830030 T owctr_attach
+ffffffff828301c0 T owctr_detach
+ffffffff82830250 T owctr_activate
+ffffffff82830280 T owctr_update
+ffffffff828302c0 T owctr_update_counter
+ffffffff82831000 A __text_page_start
+ffffffff82831000 T Xsyscall_meltdown
+ffffffff8283100c T Xsyscall
+ffffffff82831299 t Xsyscall_trampback
+ffffffff828312b0 T intr_user_exit
+ffffffff828312f2 t intr_user_exit_post_ast
+ffffffff8283144b t Xiretq_trampback
+ffffffff82831457 T doreti_iret
+ffffffff82832000 T alltraps
+ffffffff82832138 T recall_trap
+ffffffff82832150 T alltraps_kern
+ffffffff82832153 T alltraps_kern_meltdown
+ffffffff82833000 ? Xtrap00
+ffffffff82833000 A __kutext_start
+ffffffff82833000 A __text_page_end
+ffffffff82833010 ? Xtrap01
+ffffffff82833020 ? Xtrap02
+ffffffff82833028 c calltrap_specstk
+ffffffff828330f0 ? calltrap_specstk_tramp
+ffffffff82833110 ? Xtrap03
+ffffffff82833120 ? Xtrap04
+ffffffff82833130 ? Xtrap05
+ffffffff82833140 ? Xtrap06
+ffffffff82833150 ? Xtrap07
+ffffffff82833160 ? Xtrap08
+ffffffff82833170 ? Xtrap09
+ffffffff82833180 ? Xtrap0a
+ffffffff82833190 ? Xtrap0b
+ffffffff828331a0 ? Xtrap0c
+ffffffff828331b0 ? Xtrap0d
+ffffffff82833240 ? Xtrap0e
+ffffffff82833250 ? Xintrspurious
+ffffffff82833250 ? Xtrap0f
+ffffffff82833260 ? Xtrap10
+ffffffff82833270 ? Xtrap11
+ffffffff82833280 ? Xtrap12
+ffffffff82833290 ? Xtrap13
+ffffffff828332a0 ? Xtrap14
+ffffffff828332b0 ? Xtrap15
+ffffffff828332c0 ? Xtrap16
+ffffffff828332c0 ? Xtrap17
+ffffffff828332c0 ? Xtrap18
+ffffffff828332c0 ? Xtrap19
+ffffffff828332c0 ? Xtrap1a
+ffffffff828332c0 ? Xtrap1b
+ffffffff828332c0 ? Xtrap1c
+ffffffff828332c0 ? Xtrap1d
+ffffffff828332c0 ? Xtrap1e
+ffffffff828332c0 ? Xtrap1f
+ffffffff828332d0 ? x2apic_eoi
+ffffffff828332f0 ? Xintr_lapic_ipi
+ffffffff82833330 ? Xipi_invltlb
+ffffffff82833360 ? Xipi_invept
+ffffffff828333a0 ? Xipi_invlpg
+ffffffff828333d0 ? Xipi_invlrange
+ffffffff82833410 ? Xipi_invltlb_pcid
+ffffffff82833450 ? Xipi_invlpg_pcid
+ffffffff828334a0 ? Xipi_invlrange_pcid
+ffffffff82833510 ? Xintr_lapic_ltimer
+ffffffff82833550 ? Xintr_xen_upcall
+ffffffff82833590 ? Xintr_hyperv_upcall
+ffffffff828335d0 ? Xintr_legacy0
+ffffffff82833610 ? Xintr_legacy1
+ffffffff82833650 ? Xintr_legacy2
+ffffffff82833690 ? Xintr_legacy3
+ffffffff828336d0 ? Xintr_legacy4
+ffffffff82833710 ? Xintr_legacy5
+ffffffff82833750 ? Xintr_legacy6
+ffffffff82833790 ? Xintr_legacy7
+ffffffff828337d0 ? Xintr_legacy8
+ffffffff82833810 ? Xintr_legacy9
+ffffffff82833850 ? Xintr_legacy10
+ffffffff82833890 ? Xintr_legacy11
+ffffffff828338d0 ? Xintr_legacy12
+ffffffff82833910 ? Xintr_legacy13
+ffffffff82833950 ? Xintr_legacy14
+ffffffff82833990 ? Xintr_legacy15
+ffffffff828339d0 ? Xintr_ioapic_edge0
+ffffffff82833a10 ? Xintr_ioapic_edge1
+ffffffff82833a50 ? Xintr_ioapic_edge2
+ffffffff82833a90 ? Xintr_ioapic_edge3
+ffffffff82833ad0 ? Xintr_ioapic_edge4
+ffffffff82833b10 ? Xintr_ioapic_edge5
+ffffffff82833b50 ? Xintr_ioapic_edge6
+ffffffff82833b90 ? Xintr_ioapic_edge7
+ffffffff82833bd0 ? Xintr_ioapic_edge8
+ffffffff82833c10 ? Xintr_ioapic_edge9
+ffffffff82833c50 ? Xintr_ioapic_edge10
+ffffffff82833c90 ? Xintr_ioapic_edge11
+ffffffff82833cd0 ? Xintr_ioapic_edge12
+ffffffff82833d10 ? Xintr_ioapic_edge13
+ffffffff82833d50 ? Xintr_ioapic_edge14
+ffffffff82833d90 ? Xintr_ioapic_edge15
+ffffffff82833dd0 ? Xintr_ioapic_edge16
+ffffffff82833e10 ? Xintr_ioapic_edge17
+ffffffff82833e50 ? Xintr_ioapic_edge18
+ffffffff82833e90 ? Xintr_ioapic_edge19
+ffffffff82833ed0 ? Xintr_ioapic_edge20
+ffffffff82833f10 ? Xintr_ioapic_edge21
+ffffffff82833f50 ? Xintr_ioapic_edge22
+ffffffff82833f90 ? Xintr_ioapic_edge23
+ffffffff82833fd0 ? Xintr_ioapic_edge24
+ffffffff82834010 ? Xintr_ioapic_edge25
+ffffffff82834050 ? Xintr_ioapic_edge26
+ffffffff82834090 ? Xintr_ioapic_edge27
+ffffffff828340d0 ? Xintr_ioapic_edge28
+ffffffff82834110 ? Xintr_ioapic_edge29
+ffffffff82834150 ? Xintr_ioapic_edge30
+ffffffff82834190 ? Xintr_ioapic_edge31
+ffffffff828341d0 ? Xintr_ioapic_edge32
+ffffffff82834210 ? Xintr_ioapic_edge33
+ffffffff82834250 ? Xintr_ioapic_edge34
+ffffffff82834290 ? Xintr_ioapic_edge35
+ffffffff828342d0 ? Xintr_ioapic_edge36
+ffffffff82834310 ? Xintr_ioapic_edge37
+ffffffff82834350 ? Xintr_ioapic_edge38
+ffffffff82834390 ? Xintr_ioapic_edge39
+ffffffff828343d0 ? Xintr_ioapic_edge40
+ffffffff82834410 ? Xintr_ioapic_edge41
+ffffffff82834450 ? Xintr_ioapic_edge42
+ffffffff82834490 ? Xintr_ioapic_edge43
+ffffffff828344d0 ? Xintr_ioapic_edge44
+ffffffff82834510 ? Xintr_ioapic_edge45
+ffffffff82834550 ? Xintr_ioapic_edge46
+ffffffff82834590 ? Xintr_ioapic_edge47
+ffffffff828345d0 ? Xintr_ioapic_edge48
+ffffffff82834610 ? Xintr_ioapic_edge49
+ffffffff82834650 ? Xintr_ioapic_edge50
+ffffffff82834690 ? Xintr_ioapic_edge51
+ffffffff828346d0 ? Xintr_ioapic_edge52
+ffffffff82834710 ? Xintr_ioapic_edge53
+ffffffff82834750 ? Xintr_ioapic_edge54
+ffffffff82834790 ? Xintr_ioapic_edge55
+ffffffff828347d0 ? Xintr_ioapic_edge56
+ffffffff82834810 ? Xintr_ioapic_edge57
+ffffffff82834850 ? Xintr_ioapic_edge58
+ffffffff82834890 ? Xintr_ioapic_edge59
+ffffffff828348d0 ? Xintr_ioapic_edge60
+ffffffff82834910 ? Xintr_ioapic_edge61
+ffffffff82834950 ? Xintr_ioapic_edge62
+ffffffff82834990 ? Xintr_ioapic_edge63
+ffffffff828349d0 ? Xintr_ioapic_level0
+ffffffff82834a10 ? Xintr_ioapic_level1
+ffffffff82834a50 ? Xintr_ioapic_level2
+ffffffff82834a90 ? Xintr_ioapic_level3
+ffffffff82834ad0 ? Xintr_ioapic_level4
+ffffffff82834b10 ? Xintr_ioapic_level5
+ffffffff82834b50 ? Xintr_ioapic_level6
+ffffffff82834b90 ? Xintr_ioapic_level7
+ffffffff82834bd0 ? Xintr_ioapic_level8
+ffffffff82834c10 ? Xintr_ioapic_level9
+ffffffff82834c50 ? Xintr_ioapic_level10
+ffffffff82834c90 ? Xintr_ioapic_level11
+ffffffff82834cd0 ? Xintr_ioapic_level12
+ffffffff82834d10 ? Xintr_ioapic_level13
+ffffffff82834d50 ? Xintr_ioapic_level14
+ffffffff82834d90 ? Xintr_ioapic_level15
+ffffffff82834dd0 ? Xintr_ioapic_level16
+ffffffff82834e10 ? Xintr_ioapic_level17
+ffffffff82834e50 ? Xintr_ioapic_level18
+ffffffff82834e90 ? Xintr_ioapic_level19
+ffffffff82834ed0 ? Xintr_ioapic_level20
+ffffffff82834f10 ? Xintr_ioapic_level21
+ffffffff82834f50 ? Xintr_ioapic_level22
+ffffffff82834f90 ? Xintr_ioapic_level23
+ffffffff82834fd0 ? Xintr_ioapic_level24
+ffffffff82835010 ? Xintr_ioapic_level25
+ffffffff82835050 ? Xintr_ioapic_level26
+ffffffff82835090 ? Xintr_ioapic_level27
+ffffffff828350d0 ? Xintr_ioapic_level28
+ffffffff82835110 ? Xintr_ioapic_level29
+ffffffff82835150 ? Xintr_ioapic_level30
+ffffffff82835190 ? Xintr_ioapic_level31
+ffffffff828351d0 ? Xintr_ioapic_level32
+ffffffff82835210 ? Xintr_ioapic_level33
+ffffffff82835250 ? Xintr_ioapic_level34
+ffffffff82835290 ? Xintr_ioapic_level35
+ffffffff828352d0 ? Xintr_ioapic_level36
+ffffffff82835310 ? Xintr_ioapic_level37
+ffffffff82835350 ? Xintr_ioapic_level38
+ffffffff82835390 ? Xintr_ioapic_level39
+ffffffff828353d0 ? Xintr_ioapic_level40
+ffffffff82835410 ? Xintr_ioapic_level41
+ffffffff82835450 ? Xintr_ioapic_level42
+ffffffff82835490 ? Xintr_ioapic_level43
+ffffffff828354d0 ? Xintr_ioapic_level44
+ffffffff82835510 ? Xintr_ioapic_level45
+ffffffff82835550 ? Xintr_ioapic_level46
+ffffffff82835590 ? Xintr_ioapic_level47
+ffffffff828355d0 ? Xintr_ioapic_level48
+ffffffff82835610 ? Xintr_ioapic_level49
+ffffffff82835650 ? Xintr_ioapic_level50
+ffffffff82835690 ? Xintr_ioapic_level51
+ffffffff828356d0 ? Xintr_ioapic_level52
+ffffffff82835710 ? Xintr_ioapic_level53
+ffffffff82835750 ? Xintr_ioapic_level54
+ffffffff82835790 ? Xintr_ioapic_level55
+ffffffff828357d0 ? Xintr_ioapic_level56
+ffffffff82835810 ? Xintr_ioapic_level57
+ffffffff82835850 ? Xintr_ioapic_level58
+ffffffff82835890 ? Xintr_ioapic_level59
+ffffffff828358d0 ? Xintr_ioapic_level60
+ffffffff82835910 ? Xintr_ioapic_level61
+ffffffff82835950 ? Xintr_ioapic_level62
+ffffffff82835990 ? Xintr_ioapic_level63
+ffffffff82836000 ? codepatch_fill_nop
+ffffffff82836000 A __cptext_start
+ffffffff82836000 A __kutext_end
+ffffffff828360b0 ? codepatch_maprw
+ffffffff828361c0 ? codepatch_unmaprw
+ffffffff82836230 ? codepatch_nop
+ffffffff828363b0 ? codepatch_replace
+ffffffff82836580 ? codepatch_call
+ffffffff828365a0 ? codepatch_control_flow
+ffffffff828367c0 ? codepatch_jmp
+ffffffff82837000 A __cptext_end
+ffffffff82837000 A __rodata_start
+ffffffff82837000 C _etext
+ffffffff82837000 C etext
+ffffffff82838000 r seeprom_read
+ffffffff82838004 r icl_mg_pll_find_divisors.div1_vals
+ffffffff82838034 r athn_ac2qid
+ffffffff82838034 r athn_ac2qid
+ffffffff82838034 r athn_ac2qid
+ffffffff82838040 r rtwn_get_rssi.cckoff
+ffffffff82838068 r rsu_ac2qid
+ffffffff82838078 r pckbc_portcmd
+ffffffff8283807c r tht_fifo_write_pad.pad
+ffffffff82838084 r rsu_get_rssi.cckoff
+ffffffff828380a4 r adlp_n_revids
+ffffffff828380e8 r apple_iso_trans
+ffffffff828380f0 r wihap_check_tx.txratetable
+ffffffff828380f4 r dmamode
+ffffffff82838118 r gen9_edram_size_mb.sets
+ffffffff8283812c r dg2_g12_revid_step_tbl
+ffffffff82839000 r isomappings
+ffffffff82839080 r unimappings
+ffffffff82839230 r replacements
+ffffffff8283cabc r apollo_pio_rec
+ffffffff8288a960 r apollo_udma33_tim
+ffffffff828a004b r pp_r600_decoded_lanes
+ffffffff828d7315 r cmd680_setup_channel.udma_tbl
+ffffffff828df8c2 r apollo_udma100_tim
+ffffffff828df8c8 r cmd0646_9_tim_udma
+ffffffff828ee1e1 r substchar
+ffffffff829459dc r apollo_udma133_tim
+ffffffff829459e3 r apollo_udma66_tim
+ffffffff82945a0d r cy_pio_rec
+ffffffff8294b2f8 R drm_ca
+ffffffff8294b320 R drm_filtops
+ffffffff8294b350 R drmread_filtops
+ffffffff8294c000 r vga_emulops
+ffffffff8294c048 R vga_stdscreen
+ffffffff8294c078 R vga_stdscreen_mono
+ffffffff8294c0a8 R vga_stdscreen_bf
+ffffffff8294c0d8 R vga_40lscreen
+ffffffff8294c108 R vga_40lscreen_mono
+ffffffff8294c138 R vga_40lscreen_bf
+ffffffff8294c168 R vga_50lscreen
+ffffffff8294c198 R vga_50lscreen_mono
+ffffffff8294c1c8 R vga_50lscreen_bf
+ffffffff8294c1f8 R vga_screenlist
+ffffffff8294c208 R vga_screenlist_mono
+ffffffff8294c218 R vga_accessops
+ffffffff8294c278 r i945_wm_info
+ffffffff8294c2b8 r bgansitopc
+ffffffff8294c2c0 r pctoansi
+ffffffff8294c300 r sdma_offsets
+ffffffff8294c300 r sdma_offsets
+ffffffff8294c338 r iha_rate_tbl
+ffffffff8294c370 r i830_a_wm_info
+ffffffff8294c3a8 r gen9_edram_size_mb.ways
+ffffffff8294c408 r aggr_periodic_times
+ffffffff8294c508 r michael_final.pad
+ffffffff8294c530 r rt_copysa.maskarray
+ffffffff8294c538 r i915_wm_info
+ffffffff8294c540 r amdgpu_ih_clientid_jpeg
+ffffffff8294c540 r amdgpu_ih_clientid_uvds
+ffffffff8294c540 r amdgpu_ih_clientid_vcns
+ffffffff8294c540 r amdgpu_ih_clientid_vcns
+ffffffff8294c540 r amdgpu_ih_clientid_vcns
+ffffffff8294c570 r jsl_ehl_revids
+ffffffff8294c580 r vga_setfontset.cmaptabb
+ffffffff8294c5f0 r i830_bc_wm_info
+ffffffff8294c658 r hsw_activate_psr2.map
+ffffffff8294c660 r tgl_revids
+ffffffff8294c698 r __drm_universal_plane_init.default_modifiers
+ffffffff8294c6a8 r iwn_tid2fifo
+ffffffff8294c6c0 r vga_setfontset.cmaptaba
+ffffffff8294c6c8 r crtc_offsets
+ffffffff8294c6c8 r crtc_offsets
+ffffffff8294c6c8 r crtc_offsets
+ffffffff8294c770 r rtwn_r88e_get_rssi.cckoff
+ffffffff8294d000 R edid_vendors
+ffffffff8294d2c0 R edid_nvendors
+ffffffff8294d2d0 R edid_products
+ffffffff8294d330 R edid_nproducts
+ffffffff8294d340 r _edid_modes
+ffffffff8294e000 R videomode_list
+ffffffff8294f080 R videomode_count
+ffffffff82950000 r ahc_hard_errors
+ffffffff82950080 r critical_sections
+ffffffff829500b0 r patches
+ffffffff82950d50 r seqprog
+ffffffff82952000 r ahc_switch
+ffffffff82953000 r termstat_strings
+ffffffff82953020 r critical_sections
+ffffffff82953060 r seqprog
+ffffffff82953d50 r patches
+ffffffff82955000 r ahd_switch
+ffffffff82956000 R aic_switch
+ffffffff82957000 R adw_switch
+ffffffff82958000 R gdt_switch
+ffffffff82959000 R twe_switch
+ffffffff8295a000 R ciss_switch
+ffffffff8295a030 R ciss_level
+ffffffff8295a050 R ciss_stat
+ffffffff8295b000 R ami_switch
+ffffffff8295b028 R ami_raw_switch
+ffffffff8295c000 R mfi_switch
+ffffffff8295c028 R mfi_pd_switch
+ffffffff8295c050 r mfi_iop_xscale
+ffffffff8295c080 r mfi_iop_ppc
+ffffffff8295c0b0 r mfi_iop_gen2
+ffffffff8295c0e0 r mfi_iop_skinny
+ffffffff8295c110 r mfi_bbu_indicators
+ffffffff8295d000 R qlw_switch
+ffffffff8295e000 R isp_2100_risc_code
+ffffffff82970bf0 R isp_2200_risc_code
+ffffffff82983990 R isp_2300_risc_code
+ffffffff8299d408 R qla_switch
+ffffffff8299d430 r qla_regs_2100
+ffffffff8299d460 r qla_regs_2200
+ffffffff8299d490 r qla_regs_23XX
+ffffffff8299e000 R ahci_atascsi_methods
+ffffffff8299f000 R nvme_switch
+ffffffff8299f028 r nvme_ops
+ffffffff829a0000 R mpi_switch
+ffffffff829a0060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs
+ffffffff829a0090 r chv_oa_mux_regs
+ffffffff829a00b0 r fiji_clock_stretcher_lookup_table
+ffffffff829a00b0 r tonga_clock_stretcher_lookup_table
+ffffffff829a00d0 r iosf_pci_devices
+ffffffff829a00f0 r link_speed
+ffffffff829a00f0 r link_speed
+ffffffff829a0130 r drm_fb_xfrm.default_dst_pitch
+ffffffff829a0130 r non_supported_protection
+ffffffff829a0140 r tgl_uy_revids
+ffffffff829a02b0 r bwi_phy_noise_11g_rev1
+ffffffff829a0320 r cardslot_process_event.antonym_ev
+ffffffff829a03b0 r gen11_oa_mux_regs
+ffffffff829a0450 r dpia_to_preferred_enc_id_table
+ffffffff829a04c0 r ddr2_cycle_tenths
+ffffffff829a0530 r rtw_intr_rx.ratetbl
+ffffffff829a05b0 r abm_config
+ffffffff829a0630 r getbootinfo.ports
+ffffffff829a0680 r reg_offsets
+ffffffff829a0690 r bwi_rf_lo_measure_11g.rf_lo_adjust
+ffffffff829a06a0 r glk_revids
+ffffffff829a06b0 r init_non_clock_fields.look_up
+ffffffff829a06c0 r uftdi_8u232am_getrate.roundoff
+ffffffff829a0720 r zyd_rx_data.rates
+ffffffff829a0740 r ieee80211_ra_valid_tx_mcs.max_mcs
+ffffffff829a0770 r intel_engine_init_tlb_invalidation.gen8_regs
+ffffffff829a07a0 r bwi_phy_noise_11g
+ffffffff829a07b0 r hpt366_pio
+ffffffff829a0810 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs
+ffffffff829a0830 r ether_crc32_be_update.rev
+ffffffff829a0830 r rtw_grf5101_mac_crypt.caesar
+ffffffff829a0880 r snb_b_fdi_train_param
+ffffffff829a0960 r intel_hpll_vco.elk_vco
+ffffffff829a0980 r icl_revids
+ffffffff829a09e0 r pin_offsets
+ffffffff829a0a00 r amdgpu_ih_srcid_jpeg
+ffffffff829a0a40 r firmware_list
+ffffffff829a0aa0 r atom_arg_shift
+ffffffff829a0aa0 r atom_arg_shift
+ffffffff829a0ae0 r pf_syncookie_wstab
+ffffffff829a0b00 r ieee80211_media_init.mopts
+ffffffff829a0b60 r add_entropy_words.twist_table
+ffffffff829a0c00 r urtw_8225v2_txpwr_cck
+ffffffff829a0c20 r bwfm_pci_prio2fifo
+ffffffff829a0c20 r ieee80211_up_to_ac.up_to_ac
+ffffffff829a0ce0 r paritytab
+ffffffff829a0ce0 r x86emu_parity_tab
+ffffffff829a0d00 r legacy_connector_convert
+ffffffff829a0d40 r gen7_oa_mux_regs
+ffffffff829a0d60 r hsw_oa_mux_regs
+ffffffff829a0d80 r notetab
+ffffffff829a0da0 r urtw_8225v2_txpwr_cck_ch14
+ffffffff829a0dc0 r bwi_rf_calibval.rf_calibvals
+ffffffff829a0e60 r pf_syncookie_msstab
+ffffffff829a0ec0 r xgmi3x16_pcs_err_status_reg_aldebaran
+ffffffff829a0f20 r uath_wme_init.uath_wme_11g
+ffffffff829a0f60 r gen7_oa_b_counters
+ffffffff829a1160 r rtwn_iq_calib_run.reg_adda
+ffffffff829a1180 r nfs_backoff
+ffffffff829a11c0 r atom_def_dst
+ffffffff829a11c0 r atom_def_dst
+ffffffff829a1200 r sha256_initial_hash_value
+ffffffff829a1260 r otus_edca_def
+ffffffff829a1280 r intel_hpll_vco.blb_vco
+ffffffff829a1360 r epic_pci_subsys_info
+ffffffff829a1380 r kbl_revids
+ffffffff829a13a0 r atom_arg_mask
+ffffffff829a13a0 r atom_arg_mask
+ffffffff829a1400 r butmap
+ffffffff829a1440 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS
+ffffffff829a1480 r comsoft.lsrmap
+ffffffff829a14c0 r xgmi3x16_pcs_err_noncorrectable_mask_reg_aldebaran
+ffffffff829a14e0 r tulip_mii_phy_readspecific.table
+ffffffff829a1580 r intel_hpll_vco.pnv_vco
+ffffffff829a15e0 r dmapageport
+ffffffff829a16c0 r intel_hpll_vco.ctg_vco
+ffffffff829a1780 r drm_calculate_luminance_range.pre_computed_values
+ffffffff829a2000 R sili_atascsi_methods
+ffffffff829a3000 R ncr53c9x_switch
+ffffffff829a4000 r scf_period
+ffffffff829a5000 R siop_script
+ffffffff829a55a0 R lun_switch
+ffffffff829a55d0 R tag_switch
+ffffffff829a5660 R load_dsa
+ffffffff829a56c4 R siop_led_on
+ffffffff829a56cc R siop_led_off
+ffffffff829a56d8 R siop_switch
+ffffffff829a6000 R ep_vortex_media
+ffffffff829a6100 R ep_default_to_media
+ffffffff829a7000 R wi_card_ident
+ffffffff829a9000 R ucode_table
+ffffffff829aa000 r re_revisions
+ffffffff829aa290 r re_kstats_tpl
+ffffffff829ac000 R smc91cxx_media
+ffffffff829ac010 R smc91cxx_mii_bitbang_ops
+ffffffff829ad000 R dl10019_mii_bitbang_ops
+ffffffff829ad028 R dl10022_mii_bitbang_ops
+ffffffff829ae000 R ax88190_mii_bitbang_ops
+ffffffff829b0000 R ac97_on_off
+ffffffff829b0304 R ac97_mic_select
+ffffffff829b0608 R ac97_mono_select
+ffffffff829b090c R ac97_source
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+ffffffff829dd00c R bwi_default_led_act
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+ffffffff829dd5c0 r bwi_phy_rotor_11g_rev1
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+ffffffff829dd6e0 r bwi_phy_noise_scale_11g_rev7
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+ffffffff829dda60 r _bwi_rf_lo_update_11g.rf_lo_measure_order
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+ffffffff829ddac0 r bwi_bbpid_map
+ffffffff829ddaf0 r bwi_regwin_count
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+ffffffff829de000 R ipq8074_ops
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+ffffffff829de0e0 R qca6390_ops
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+ffffffff829de2f8 R ath11k_hw_ring_mask_qca6390
+ffffffff829de350 R ath11k_hw_ring_mask_qcn9074
+ffffffff829de3a8 R ath11k_hw_ring_mask_wcn6750
+ffffffff829de400 R ath11k_target_ce_config_wlan_ipq8074
+ffffffff829de510 R ath11k_target_service_to_ce_map_wlan_ipq8074
+ffffffff829de620 R ath11k_target_service_to_ce_map_wlan_ipq6018
+ffffffff829de710 R ath11k_target_ce_config_wlan_qca6390
+ffffffff829de7f0 R ath11k_target_service_to_ce_map_wlan_qca6390
+ffffffff829de8b0 R ath11k_target_ce_config_wlan_qcn9074
+ffffffff829de990 R ath11k_target_service_to_ce_map_wlan_qcn9074
+ffffffff829dea70 R qwx_host_ce_config_ipq8074
+ffffffff829ded10 R qwx_host_ce_config_qca6390
+ffffffff829dee30 R qwx_host_ce_config_qcn9074
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+ffffffff829defc4 R qca6390_regs
+ffffffff829df098 R qcn9074_regs
+ffffffff829df16c R wcn6855_regs
+ffffffff829df240 R wcn6750_regs
+ffffffff829df320 R qmi_response_type_v01_ei
+ffffffff829df380 R qmi_wlanfw_ind_register_req_msg_v01_ei
+ffffffff829df6a0 R qmi_wlanfw_ind_register_resp_msg_v01_ei
+ffffffff829df720 R qmi_wlanfw_host_cap_req_msg_v01_ei
+ffffffff829dfaa0 R qmi_wlanfw_host_cap_resp_msg_v01_ei
+ffffffff829dfae0 R qmi_wlanfw_mem_cfg_s_v01_ei
+ffffffff829dfb60 R qmi_wlanfw_mem_seg_s_v01_ei
+ffffffff829dfc00 R qmi_wlanfw_request_mem_ind_msg_v01_ei
+ffffffff829dfc60 R qmi_wlanfw_mem_seg_resp_s_v01_ei
+ffffffff829dfd00 R qmi_wlanfw_respond_mem_req_msg_v01_ei
+ffffffff829dfd60 R qmi_wlanfw_respond_mem_resp_msg_v01_ei
+ffffffff829dfda0 R qmi_wlanfw_cap_req_msg_v01_ei
+ffffffff829dfdc0 R qmi_wlanfw_rf_chip_info_s_v01_ei
+ffffffff829dfe20 R qmi_wlanfw_rf_board_info_s_v01_ei
+ffffffff829dfe60 R qmi_wlanfw_soc_info_s_v01_ei
+ffffffff829dfea0 R qmi_wlanfw_fw_version_info_s_v01_ei
+ffffffff829dff00 R qmi_wlanfw_cap_resp_msg_v01_ei
+ffffffff829e01c0 R qmi_wlanfw_bdf_download_req_msg_v01_ei
+ffffffff829e03a0 R qmi_wlanfw_bdf_download_resp_msg_v01_ei
+ffffffff829e03e0 R qmi_wlanfw_m3_info_req_msg_v01_ei
+ffffffff829e0440 R qmi_wlanfw_m3_info_resp_msg_v01_ei
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-ffffffff82bcc028 R mpii_switch
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-ffffffff82bce220 R aq2_fw_ops
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-ffffffff82bcf490 r tulip_chipdescs
-ffffffff82bd0000 R ep_pci_ca
-ffffffff82bd0030 R ep_pci_devices
-ffffffff82bd1000 R pcn_ca
-ffffffff82bd1028 R pcn_devices
-ffffffff82bd1030 r pcn_79c970_rcvfw
-ffffffff82bd1050 r pcn_79c970_xmtsp
-ffffffff82bd1070 r pcn_79c970_xmtfw
-ffffffff82bd1090 r pcn_79c971_rcvfw
-ffffffff82bd10b0 r pcn_79c971_xmtsp_sram
-ffffffff82bd10d0 r pcn_79c971_xmtsp
-ffffffff82bd10f0 r pcn_79c971_xmtfw
-ffffffff82bd1110 r pcn_variants
-ffffffff82bd2000 R siop_products
-ffffffff82bd3000 R siop_pci_ca
-ffffffff82bd4000 R rdcide_setup
-ffffffff82bd4005 R rdcide_hold
-ffffffff82bd400a R rdcide_udmatim
-ffffffff82bd4010 R rdcide_udmaclk
-ffffffff82bd4028 R default_product_desc
-ffffffff82bd4040 R pciide_intel_products
-ffffffff82bd4630 R pciide_amd_products
-ffffffff82bd4690 R pciide_cmd_products
-ffffffff82bd4730 R pciide_via_products
-ffffffff82bd4810 R pciide_cypress_products
-ffffffff82bd4820 R pciide_sis_products
-ffffffff82bd4870 R pciide_natsemi_products
-ffffffff82bd4890 R pciide_acer_products
-ffffffff82bd48a0 R pciide_triones_products
-ffffffff82bd48f0 R pciide_promise_products
-ffffffff82bd4ac0 R pciide_acard_products
-ffffffff82bd4b10 R pciide_serverworks_products
-ffffffff82bd4bb0 R pciide_nvidia_products
-ffffffff82bd4e80 R pciide_ite_products
-ffffffff82bd4ea0 R pciide_ati_products
-ffffffff82bd4f20 R pciide_jmicron_products
-ffffffff82bd4f70 R pciide_phison_products
-ffffffff82bd4f80 R pciide_rdc_products
-ffffffff82bd4f90 R pciide_vendors
-ffffffff82bd5140 R pciide_pci_ca
-ffffffff82bd5168 R pciide_jmb_ca
-ffffffff82bd5190 r piix_isp_dma
-ffffffff82bd5193 r piix_rtc_dma
-ffffffff82bd5196 r apollo_pio_set
-ffffffff82bd519b r cmd0643_9_data_tim_pio
-ffffffff82bd51a0 r cmd0643_9_data_tim_dma
-ffffffff82bd51a3 r cmd680_channel_map.init_val
-ffffffff82bd51b1 r cmd680_setup_channel.udma2_tbl
-ffffffff82bd51b8 r cmd680_setup_channel.dma_tbl
-ffffffff82bd51be r cmd680_setup_channel.pio_tbl
-ffffffff82bd51d0 r satalink_ba5_regmap
-ffffffff82bd5690 r sii3114_chansetup.channel_names
-ffffffff82bd56b0 r cy_pio_pulse
-ffffffff82bd56c0 r sis_udma133new_tim
-ffffffff82bd56e0 r sis_pio133new_tim
-ffffffff82bd56f4 r sis_dma133new_tim
-ffffffff82bd5700 r sis_udma66_tim
-ffffffff82bd5706 r sis_udma100new_tim
-ffffffff82bd570c r sis_udma133old_tim
-ffffffff82bd5713 r sis_pio_act
-ffffffff82bd5718 r sis_pio_rec
-ffffffff82bd571d r natsemi_pio_pulse
-ffffffff82bd5722 r natsemi_pio_recover
-ffffffff82bd5727 r natsemi_dma_pulse
-ffffffff82bd572a r natsemi_dma_recover
-ffffffff82bd5730 r scx200_udma33
-ffffffff82bd573c r scx200_dma33
-ffffffff82bd5750 r scx200_pio33
-ffffffff82bd5778 r acer_udma
-ffffffff82bd577e r acer_pio
-ffffffff82bd5790 r hpt370_pio
-ffffffff82bd57a4 r hpt370_dma
-ffffffff82bd57b0 r hpt370_udma
-ffffffff82bd57d0 r hpt372_pio
-ffffffff82bd57e4 r hpt372_dma
-ffffffff82bd57f0 r hpt372_udma
-ffffffff82bd580c r hpt366_dma
-ffffffff82bd5820 r hpt366_udma
-ffffffff82bd5840 r hpt374_pio
-ffffffff82bd5854 r hpt374_dma
-ffffffff82bd5860 r hpt374_udma
-ffffffff82bd587c r pdc2xx_pa
-ffffffff82bd5881 r pdc2xx_pb
-ffffffff82bd5886 r pdc2xx_dma_mb
-ffffffff82bd5889 r pdc2xx_dma_mc
-ffffffff82bd588c r pdc2xx_udma_mc
-ffffffff82bd5892 r acard_act_udma
-ffffffff82bd5899 r acard_rec_udma
-ffffffff82bd58a0 r acard_udma_conf
-ffffffff82bd58a7 r acard_act_dma
-ffffffff82bd58aa r acard_rec_dma
-ffffffff82bd58ad r acard_act_pio
-ffffffff82bd58b2 r acard_rec_pio
-ffffffff82bd58b7 r nforce_udma
-ffffffff82bd58be r nforce_pio
-ffffffff82bd58c3 r ixp_mdma_timings
-ffffffff82bd58c6 r ixp_pio_timings
-ffffffff82bd6000 R ppb_ca
-ffffffff82bd7000 R cy_pci_ca
-ffffffff82bd7030 R cy_pci_devices
-ffffffff82bd8000 R rl_pci_ca
-ffffffff82bd8030 R rl_pci_devices
-ffffffff82bd9000 R re_pci_devices
-ffffffff82bd9030 R re_pci_ca
-ffffffff82bda000 R vr_ca
-ffffffff82bdb000 R txp_ca
-ffffffff82bdb030 R txp_devices
-ffffffff82bdc000 r cards
-ffffffff82bdd000 r format_params
-ffffffff82bdd1a0 r pixfmt_table
-ffffffff82bdd320 r meteor_pixfmt_table
-ffffffff82bde000 R bktr_ca
-ffffffff82bde028 R bktr_hw_if
-ffffffff82bdf000 r tuners
-ffffffff82bdf170 r freqTable
-ffffffff82bdf260 r nabcst
-ffffffff82bdf2a0 r irccable
-ffffffff82bdf310 r hrccable
-ffffffff82bdf380 r weurope
-ffffffff82bdf420 r jpnbcst
-ffffffff82bdf460 r jpncable
-ffffffff82bdf4c0 r xussr
-ffffffff82bdf530 r australia
-ffffffff82bdf590 r france
-ffffffff82be0000 R xl_pci_ca
-ffffffff82be0030 R xl_pci_devices
-ffffffff82be1000 R fxp_pci_ca
-ffffffff82be1030 R fxp_pci_devices
-ffffffff82be2000 R em_devices
-ffffffff82be2308 R em_ca
-ffffffff82be2330 r em_counters
-ffffffff82be3000 r em_igp_cable_length_table
-ffffffff82be3100 r em_igp_2_cable_length_table
-ffffffff82be4000 R ixgb_devices
-ffffffff82be4010 R ixgb_ca
-ffffffff82be5000 R ixgbe_devices
-ffffffff82be50b8 R ix_ca
-ffffffff82be50e0 r ix_counters
-ffffffff82be53e0 r ix_rxq_kstats_tpl
-ffffffff82be5458 r ix_txq_kstats_tpl
-ffffffff82be6000 r ixgbe_mvals_base
-ffffffff82be6060 r ixgbe_mvals_X540
-ffffffff82be60c0 r ixgbe_mvals_X550
-ffffffff82be6120 r ixgbe_mvals_X550EM_x
-ffffffff82be6180 r ixgbe_mvals_X550EM_a
-ffffffff82be9000 R ixl_ca
-ffffffff82be9030 R ixl_port_counters
-ffffffff82be92c0 R ixl_vsi_counters
-ffffffff82be9380 r ixl_devices
-ffffffff82be94c0 r ixl_710
-ffffffff82be94e8 r ixl_722
-ffffffff82be9510 r ixl_pf_aq_regs
-ffffffff82be9578 r ixl_710_decrepit
-ffffffff82be95a0 r ixl_phy_type_map
-ffffffff82be9770 r ixl_speed_type_map
-ffffffff82be97b0 r ixl_hmc_pack_rxq
-ffffffff82be9830 r ixl_hmc_pack_txq
-ffffffff82be98a0 r ixl_sfp_ops
-ffffffff82be98b8 r ixl_qsfp_ops
-ffffffff82bea000 r dwqe_pci_devices
-ffffffff82bea018 R dwqe_pci_ca
-ffffffff82beb000 R xge_ca
-ffffffff82beb028 R xge_devices
-ffffffff82beb030 r xge_fix_mac
-ffffffff82beb110 r xge_xena_dtx_cfg
-ffffffff82beb170 r xge_herc_dtx_cfg
-ffffffff82bec000 R thtc_ca
-ffffffff82bec028 R tht_ca
-ffffffff82bec050 r thtc_devices
-ffffffff82bec068 r tht_link_state.interval
-ffffffff82bed000 R myx_ca
-ffffffff82bed028 R myx_devices
-ffffffff82bee000 R oce_ca
-ffffffff82bee030 R oce_devices
-ffffffff82bef000 R dc_pci_ca
-ffffffff82bf0000 R epic_pci_ca
-ffffffff82bf0028 R epic_pci_devices
-ffffffff82bf1000 R ti_pci_ca
-ffffffff82bf1030 R ti_devices
-ffffffff82bf2000 R ne_pci_ca
-ffffffff82bf2030 R ne_pci_prod
-ffffffff82bf3000 R gem_pci_ca
-ffffffff82bf3030 R gem_pci_devices
-ffffffff82bf3050 r gem_promhdr
-ffffffff82bf3052 r gem_promdat
-ffffffff82bf305a r gem_promdat2
-ffffffff82bf4000 R cas_ca
-ffffffff82bf4028 R cas_pci_devices
-ffffffff82bf4030 r cas_promhdr
-ffffffff82bf4032 r cas_promdat_sun
-ffffffff82bf403a r cas_promdat_ns
-ffffffff82bf4042 r cas_promdat2
-ffffffff82bf5000 R sf_pci_ca
-ffffffff82bf5028 R sf_pci_products
-ffffffff82bf6000 R sis_ca
-ffffffff82bf6028 R sis_devices
-ffffffff82bf7000 R se_devices
-ffffffff82bf7008 R se_ca
-ffffffff82bf8000 R mbg_ca
-ffffffff82bf8030 R mbg_devices
-ffffffff82bf9000 R uhci_pci_ca
-ffffffff82bfa000 R ohci_pci_ca
-ffffffff82bfb000 R ehci_pci_ca
-ffffffff82bfc000 R xhci_pci_ca
-ffffffff82bfd000 R cbb_pci_ca
-ffffffff82bfd028 r pccbb_pcmcia_do_io_map.pcic_iowidth
-ffffffff82bfe000 R skc_devices
-ffffffff82bfe030 R skc_ca
-ffffffff82bfe058 R sk_ca
-ffffffff82bff000 R mskc_devices
-ffffffff82bff0a8 R mskc_ca
-ffffffff82bff0d0 R msk_ca
-ffffffff82bff100 r msk_mib
-ffffffff82c00000 R puc_pci_ca
-ffffffff82c01000 R puc_devs
-ffffffff82c06000 R com_puc_ca
-ffffffff82c06030 r puc_port_types
-ffffffff82c07000 R lpt_puc_ca
-ffffffff82c08000 R wi_pci_ca
-ffffffff82c08030 r wi_pci_products
-ffffffff82c09000 R an_pci_ca
-ffffffff82c09030 R an_pci_devices
-ffffffff82c0a000 R iwi_devices
-ffffffff82c0a010 R iwi_ca
-ffffffff82c0b000 R wpi_ca
-ffffffff82c0b028 r wpi_devices
-ffffffff82c0b030 r wpi_rates
-ffffffff82c0b050 r wpi_rf_gain_5ghz
-ffffffff82c0b0a0 r wpi_dsp_gain_5ghz
-ffffffff82c0b0f0 r wpi_rf_gain_2ghz
-ffffffff82c0b140 r wpi_dsp_gain_2ghz
-ffffffff82c0b190 r wpi_pmgt
-ffffffff82c0b310 r wpi_bands
-ffffffff82c0c000 R iwn_mcs2ridx
-ffffffff82c0c020 R iwn_ca
-ffffffff82c0c050 r iwn_devices
-ffffffff82c0c0e8 r iwn4965_sensitivity_limits
-ffffffff82c0c124 r iwn5000_sensitivity_limits
-ffffffff82c0c160 r iwn5150_sensitivity_limits
-ffffffff82c0c19c r iwn1000_sensitivity_limits
-ffffffff82c0c1d8 r iwn6000_sensitivity_limits
-ffffffff82c0c214 r iwn2000_sensitivity_limits
-ffffffff82c0c250 r iwn_fw_errmsg
-ffffffff82c0c340 r iwn4965_set_txpower.tdiv
-ffffffff82c0c360 r iwn4965_rf_gain_5ghz
-ffffffff82c0c3d0 r iwn4965_dsp_gain_5ghz
-ffffffff82c0c440 r iwn4965_dsp_gain_2ghz
-ffffffff82c0c4b0 r iwn_pmgt
-ffffffff82c0c6f0 r iwn4965_post_alive.qid2fifo
-ffffffff82c0c700 r iwn_bands
-ffffffff82c0c770 r iwn_rates
-ffffffff82c0c820 r iwn4965_rf_gain_2ghz
-ffffffff82c0d000 R iwm_nvm_channels
-ffffffff82c0d030 R iwm_nvm_channels_8000
-ffffffff82c0d070 R iwm_rates
-ffffffff82c0d0d0 R iwm_ht_mcs2ridx
-ffffffff82c0d110 R iwm_tid_to_ac
-ffffffff82c0d118 R iwm_ac_to_tx_fifo
-ffffffff82c0d120 R iwm_nvm_to_read
-ffffffff82c0d144 r iwm_set_hw_address_8000.reserved_mac
-ffffffff82c0d180 r iwm_sf_full_timeout
-ffffffff82c0d1b0 r iwm_sf_full_timeout_def
-ffffffff82c0d1e0 r advanced_lookup
-ffffffff82c0d320 r iwm_devices
-ffffffff82c0d360 R iwm_ca
-ffffffff82c0e000 R iwx_9560_quz_a0_jf_b0_cfg
-ffffffff82c0e020 R iwx_9560_qu_c0_jf_b0_cfg
-ffffffff82c0e040 R iwx_qu_b0_hr1_b0
-ffffffff82c0e060 R iwx_qu_b0_hr_b0
-ffffffff82c0e080 R iwx_ax201_cfg_qu_hr
-ffffffff82c0e0a0 R iwx_qu_c0_hr1_b0
-ffffffff82c0e0c0 R iwx_qu_c0_hr_b0
-ffffffff82c0e0e0 R iwx_ax201_cfg_qu_c0_hr_b0
-ffffffff82c0e100 R iwx_quz_a0_hr1_b0
-ffffffff82c0e120 R iwx_ax201_cfg_quz_hr
-ffffffff82c0e140 R iwx_cfg_so_a0_hr_b0
-ffffffff82c0e160 R iwx_cfg_quz_a0_hr_b0
-ffffffff82c0e180 R iwx_2ax_cfg_so_gf_a0
-ffffffff82c0e1a0 R iwx_2ax_cfg_so_gf_a0_long
-ffffffff82c0e1c0 R iwx_2ax_cfg_so_gf4_a0
-ffffffff82c0e1e0 R iwx_2ax_cfg_so_gf4_a0_long
-ffffffff82c0e200 R iwx_2ax_cfg_ty_gf_a0
-ffffffff82c0e220 R iwx_2ax_cfg_so_jf_b0
-ffffffff82c0e240 R iwx_nvm_channels_8000
-ffffffff82c0e280 R iwx_rates
-ffffffff82c0e2e0 R iwx_mcs2ridx
-ffffffff82c0e320 R iwx_tid_to_ac
-ffffffff82c0e328 R iwx_ac_to_tx_fifo
-ffffffff82c0e330 r iwx_nvm_channels_uhb
-ffffffff82c0e39e r iwx_is_valid_mac_addr.reserved_mac
-ffffffff82c0e3b0 r iwx_sf_full_timeout
-ffffffff82c0e3e0 r iwx_sf_full_timeout_def
-ffffffff82c0e410 r advanced_lookup
-ffffffff82c0e550 r iwx_devices
-ffffffff82c0e590 r iwx_dev_info_table
-ffffffff82c0ee18 R iwx_ca
-ffffffff82c0f000 R qwx_pci_ca
-ffffffff82c0f028 r qwx_pci_devices
-ffffffff82c0f030 R qwx_msi_config_one_msi
-ffffffff82c0f050 R qwx_msi_config
-ffffffff82c0f0c8 r qwx_pci_ops_qca6390
-ffffffff82c0f0f8 r qwx_pci_ops_qcn9074
-ffffffff82c10000 R cmpci_ca
-ffffffff82c10028 R cmpci_hw_if
-ffffffff82c100e0 r cmpci_rate_table
-ffffffff82c10120 R cmpci_devices
-ffffffff82c10130 r cmpci_query_devinfo.mixer_port_names
-ffffffff82c10160 r cmpci_query_devinfo.mixer_classes
-ffffffff82c11000 R iha_pci_ca
-ffffffff82c11028 R iha_switch
-ffffffff82c12000 R pcscp_ca
-ffffffff82c13000 R bge_ca
-ffffffff82c13030 R bge_devices
-ffffffff82c131b0 r bge_revisions
-ffffffff82c13610 r bge_majorrevs
-ffffffff82c13790 r bge_kstat_tpl
-ffffffff82c14000 R bnx_devices
-ffffffff82c14020 R bnx_ca
-ffffffff82c15000 R vge_ca
-ffffffff82c15028 R vge_devices
-ffffffff82c16000 R stge_ca
-ffffffff82c16028 R stge_mii_bitbang_ops
-ffffffff82c16050 R stge_devices
-ffffffff82c17000 R nfe_ca
-ffffffff82c17030 R nfe_devices
-ffffffff82c18000 R et_devices
-ffffffff82c18008 R et_ca
-ffffffff82c19000 R jme_devices
-ffffffff82c19008 R jme_ca
-ffffffff82c1a000 R age_devices
-ffffffff82c1a008 R age_ca
-ffffffff82c1b000 R alc_devices
-ffffffff82c1b038 R alc_ca
-ffffffff82c1c000 R ale_devices
-ffffffff82c1c008 R ale_ca
-ffffffff82c1d000 R amdpm_ca
-ffffffff82c1d030 R amdpm_ids
-ffffffff82c1e000 R bce_ca
-ffffffff82c1e028 R bce_devices
-ffffffff82c1f000 R ath_pci_ca
-ffffffff82c20000 R athn_pci_ca
-ffffffff82c20030 r athn_pci_devices
-ffffffff82c21000 R atw_pci_ca
-ffffffff82c21028 R atw_pci_devices
-ffffffff82c22000 R rtw_pci_ca
-ffffffff82c22030 R rtw_pci_products
-ffffffff82c23000 R rtwn_pci_ca
-ffffffff82c23030 r rtwn_pci_devices
-ffffffff82c23040 r rtl8188eu_mac
-ffffffff82c231b0 r rtl8192cu_mac
-ffffffff82c23310 r rtl8192ce_mac
-ffffffff82c23458 r rtl8188eu_bb_prog
-ffffffff82c23480 r rtl8723a_bb_prog
-ffffffff82c234a8 r rtl8192ce_bb_prog_1t
-ffffffff82c234d0 r rtl8192ce_bb_prog_2t
-ffffffff82c23500 r rtl8188eu_bb_regs
-ffffffff82c23680 r rtl8188eu_bb_vals
-ffffffff82c23980 r rtl8188eu_agc_vals
-ffffffff82c23b80 r rtl8723a_bb_regs
-ffffffff82c23d00 r rtl8723a_bb_vals
-ffffffff82c23ff0 r rtl8192ce_agc_vals
-ffffffff82c24270 r rtl8192ce_bb_regs
-ffffffff82c243f0 r rtl8192ce_bb_vals_1t
-ffffffff82c246e0 r rtl8192ce_bb_vals_2t
-ffffffff82c25000 R ral_pci_ca
-ffffffff82c25030 R ral_pci_devices
-ffffffff82c26000 R acx_pci_ca
-ffffffff82c26028 R acx_pci_devices
-ffffffff82c27000 R pgt_pci_ca
-ffffffff82c27028 R pgt_pci_devices
-ffffffff82c28000 R malo_pci_ca
-ffffffff82c28028 R malo_pci_devices
-ffffffff82c29000 R bwi_pci_ca
-ffffffff82c29030 R bwi_pci_devices
-ffffffff82c2a000 R piixpm_ca
-ffffffff82c2a030 R piixpm_ids
-ffffffff82c2b000 R vic_ca
-ffffffff82c2b028 R vic_devices
-ffffffff82c2c000 R vmx_devices
-ffffffff82c2c008 R vmx_ca
-ffffffff82c2c030 r vmx_tx_kstat_tpl
-ffffffff82c2c0d0 r vmx_kstat_rate
-ffffffff82c2c0e0 r vmx_rx_kstat_tpl
-ffffffff82c2d000 R vmwpvs_ca
-ffffffff82c2d028 R vmwpvs_switch
-ffffffff82c2e000 R lii_ca
-ffffffff82c2e028 R lii_devices
-ffffffff82c2f000 R ichiic_ca
-ffffffff82c2f030 R ichiic_ids
-ffffffff82c30000 R viapm_ca
-ffffffff82c30030 R viapm_ids
-ffffffff82c30070 r val_to_temp
-ffffffff82c30870 r val_to_uV.mult
-ffffffff82c31000 R amdiic_ca
-ffffffff82c31028 R amdiic_ids
-ffffffff82c32000 R nviic_ca
-ffffffff82c32030 R nviic_ids
-ffffffff82c33000 R sdhc_pci_ca
-ffffffff82c34000 R kate_ca
-ffffffff82c34030 r kate_proc
-ffffffff82c35000 R km_ca
-ffffffff82c35030 r km_devices
-ffffffff82c36000 R ksmn_ca
-ffffffff82c36030 r ksmn_devices
-ffffffff82c37000 R iosf_pci_ca
-ffffffff82c38000 R itherm_devices
-ffffffff82c38008 R itherm_ca
-ffffffff82c39000 R pchtemp_ca
-ffffffff82c39030 R pchtemp_devices
-ffffffff82c3a000 R rtsx_pci_ca
-ffffffff82c3b000 R xspd_ca
-ffffffff82c3b028 R xspd_devices
-ffffffff82c3c000 R virtio_pci_ca
-ffffffff82c3c028 R virtio_pci_ops
-ffffffff82c3d000 R dwiic_pci_ca
-ffffffff82c3d030 R dwiic_pci_ids
-ffffffff82c3e000 R bwfm_pci_ca
-ffffffff82c3e030 r bwfm_pci_devices
-ffffffff82c3f000 R ccp_pci_ca
-ffffffff82c3f030 r ccp_pci_devices
-ffffffff82c40000 R bnxt_devices
-ffffffff82c40040 R bnxt_ca
-ffffffff82c41000 R mcx_ca
-ffffffff82c41030 r mcx_devices
-ffffffff82c41060 r mcx_rss_config
-ffffffff82c410d0 r mcx_eth_cap_map
-ffffffff82c412d0 r mcx_ext_eth_cap_map
-ffffffff82c413d0 r mcx_kstat_ppcnt_ieee8023
-ffffffff82c413e8 r mcx_kstat_ppcnt_rfc2863
-ffffffff82c41400 r mcx_kstat_ppcnt_rfc2819
-ffffffff82c41418 r mcx_kstat_ppcnt_rfc3635
-ffffffff82c41430 r mcx_ppcnt_ieee8023_tpl
-ffffffff82c415b0 r mcx_ppcnt_rfc2863_tpl
-ffffffff82c416c0 r mcx_ppcnt_rfc2819_tpl
-ffffffff82c41870 r mcx_ppcnt_rfc3635_tpl
-ffffffff82c419b0 r mcx_kstat_mtmp_tpl
-ffffffff82c41a50 r mcx_kstat_mtmp_rate
-ffffffff82c41a60 r mcx_queue_kstat_tpl
-ffffffff82c42000 R iavf_ca
-ffffffff82c42030 r iavf_devices
-ffffffff82c42040 r iavf_aq_regs
-ffffffff82c420b0 r iavf_link_speeds
-ffffffff82c43000 R rge_ca
-ffffffff82c43028 R rge_devices
-ffffffff82c43040 r rge_phy_config_mac_cfg2_8126.mac_cfg2_a438_value
-ffffffff82c43070 r rge_phy_config_mac_cfg2_8126.mac_cfg2_b87e_value
-ffffffff82c430c0 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value
-ffffffff82c430e0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value
-ffffffff82c43140 r rtl8125_mac_cfg3_mcu
-ffffffff82c439e0 r rtl8125_mac_cfg5_mcu
-ffffffff82c44a00 r rtl8126_mac_cfg2_mcu
-ffffffff82c4ba20 r rtl8125_mac_bps
-ffffffff82c4be20 r rtl8125b_mac_bps
-ffffffff82c4c048 r rge_kstats_tpl
-ffffffff82c4d000 R igc_devices
-ffffffff82c4d040 R igc_ca
-ffffffff82c4d070 r igc_counters
-ffffffff82c4e000 R ngbe_devices
-ffffffff82c4e008 R ngbe_ca
-ffffffff82c4f000 R com_pci_ca
-ffffffff82c4f030 R com_pci_ids
-ffffffff82c50000 R ufshci_pci_ca
-ffffffff82c51000 r agp_attach.agp_max
-ffffffff82c51048 R agp_ca
-ffffffff82c52000 R intagp_ca
-ffffffff82c53000 r drm_plane_create_rotation_property.props
-ffffffff82c54000 r drm_bridge_priv_state_funcs
-ffffffff82c56000 r color_encoding_name
-ffffffff82c56020 r color_range_name
-ffffffff82c57000 r drm_subpixel_enum_list
-ffffffff82c57060 r drm_dpms_enum_list
-ffffffff82c570a0 r drm_dvi_i_select_enum_list
-ffffffff82c570d0 r drm_dvi_i_subconnector_enum_list
-ffffffff82c57100 r drm_tv_mode_enum_list
-ffffffff82c57170 r drm_tv_select_enum_list
-ffffffff82c571c0 r drm_tv_subconnector_enum_list
-ffffffff82c57210 r drm_dp_subconnector_enum_list
-ffffffff82c57280 r colorspace_names
-ffffffff82c57300 r drm_link_status_enum_list
-ffffffff82c57320 r drm_scaling_mode_enum_list
-ffffffff82c57360 r drm_aspect_ratio_enum_list
-ffffffff82c57390 r drm_content_type_enum_list
-ffffffff82c573e0 r drm_panel_orientation_enum_list
-ffffffff82c57420 r privacy_screen_enum
-ffffffff82c58000 r drm_crtc_fence_ops
-ffffffff82c59000 r drm_dmt_modes
-ffffffff82c5b940 r edid_cea_modes_1
-ffffffff82c5f4d0 r edid_cea_modes_193
-ffffffff82c60180 r edid_quirk_list
-ffffffff82c60360 r drm_mode_do_interlace_quirk.cea_interlaced
-ffffffff82c603a0 r edid_4k_modes
-ffffffff82c60600 r edid_est_modes
-ffffffff82c60e00 r est3_modes
-ffffffff82c60f60 r stereo_mandatory_modes
-ffffffff82c60fe0 r extra_modes
-ffffffff82c62000 r drm_encoder_enum_list
-ffffffff82c64000 r drm_fbdev_dma_helper_funcs
-ffffffff82c64010 r drm_fbdev_dma_client_funcs
-ffffffff82c64030 r drm_fbdev_dma_fb_ops
-ffffffff82c65000 r drm_fbdev_generic_helper_funcs
-ffffffff82c65010 r drm_fbdev_generic_client_funcs
-ffffffff82c65030 r drm_fbdev_generic_fb_ops
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-ffffffff82c67004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize
-ffffffff82c67008 r drm_fb_xrgb8888_to_xrgb1555.dst_pixsize
-ffffffff82c6700c r drm_fb_xrgb8888_to_argb1555.dst_pixsize
-ffffffff82c67010 r drm_fb_xrgb8888_to_rgba5551.dst_pixsize
-ffffffff82c67014 r drm_fb_xrgb8888_to_rgb888.dst_pixsize
-ffffffff82c67018 r drm_fb_xrgb8888_to_argb8888.dst_pixsize
-ffffffff82c6701c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize
-ffffffff82c67020 r drm_fb_xrgb8888_to_argb2101010.dst_pixsize
-ffffffff82c67024 r drm_fb_xrgb8888_to_gray8.dst_pixsize
-ffffffff82c67028 r drm_fb_xrgb8888_to_xbgr8888.dst_pixsize
-ffffffff82c6702c r drm_fb_xrgb8888_to_abgr8888.dst_pixsize
-ffffffff82c68000 r __drm_format_info.formats
-ffffffff82c69000 R drm_pgops
-ffffffff82c6a000 r drm_gem_dma_default_funcs
-ffffffff82c6b000 R drm_gem_fb_funcs
-ffffffff82c6c000 r drm_ioctls
-ffffffff82c6e000 r dma_fence_stub_ops
-ffffffff82c6e040 R dma_fence_array_ops
-ffffffff82c6e080 R dma_fence_chain_ops
-ffffffff82c6e0c0 R dmabufops
-ffffffff82c6e0f8 R syncfileops
-ffffffff82c6f000 r drm_plane_type_enum_list
-ffffffff82c70000 r tv_modes_parameters
-ffffffff82c700c0 r drm_mode_status_names
-ffffffff82c70200 r drm_named_modes
-ffffffff82c71000 r primary_plane_funcs
-ffffffff82c71068 r safe_modeset_formats
-ffffffff82c72000 r orientation_data
-ffffffff82c76080 r lcd800x1280_rightside_up
-ffffffff82c76098 r lcd720x1280_rightside_up
-ffffffff82c760b0 r lcd800x1280_leftside_up
-ffffffff82c760c8 r lcd1080x1920_leftside_up
-ffffffff82c760e0 r lcd1600x2560_rightside_up
-ffffffff82c760f8 r lcd1200x1920_rightside_up
-ffffffff82c76110 r gpd_micropc
-ffffffff82c76128 r gpd_pocket
-ffffffff82c76140 r gpd_pocket2
-ffffffff82c76158 r gpd_win
-ffffffff82c76170 r gpd_win2
-ffffffff82c76188 r lcd1080x1920_rightside_up
-ffffffff82c761a0 r itworks_tw891
-ffffffff82c761b8 r lcd1600x2560_leftside_up
-ffffffff82c761d0 r onegx1_pro
-ffffffff82c761e8 r lcd1280x1920_rightside_up
-ffffffff82c76200 r gpd_onemix2s
-ffffffff82c76218 r .compoundliteral
-ffffffff82c76228 r .compoundliteral.5
-ffffffff82c76250 r .compoundliteral.9
-ffffffff82c76270 r .compoundliteral.17
-ffffffff82c762b0 r .compoundliteral.21
-ffffffff82c762d0 r .compoundliteral.23
-ffffffff82c762e0 r .compoundliteral.25
-ffffffff82c762f0 r .compoundliteral.29
-ffffffff82c77000 r drm_gem_prime_dmabuf_ops
-ffffffff82c79000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id
-ffffffff82c7a000 r drm_dp_phy_name.phy_names
-ffffffff82c7a048 r drm_dp_i2c_algo
-ffffffff82c7a058 r drm_dp_i2c_lock_ops
-ffffffff82c7a070 r dp_aux_bl_ops
-ffffffff82c7a090 r dpcd_quirk_list
-ffffffff82c7a320 r drm_dp_psr_setup_time.psr_setup_time_us
-ffffffff82c7b000 R drm_dp_mst_topology_state_funcs
-ffffffff82c7b020 r drm_dp_mst_req_type_str.req_type_str
-ffffffff82c7b1f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str
-ffffffff82c7b220 r drm_dp_mst_nak_reason_str.nak_reason_str
-ffffffff82c7b278 r drm_dp_mst_i2c_algo
-ffffffff82c7c000 r rc_parameters_1_2_444
-ffffffff82c7c5f0 r rc_parameters_pre_scr
-ffffffff82c7c920 r rc_parameters_1_2_422
-ffffffff82c7cdf0 r rc_parameters_1_2_420
-ffffffff82c7e000 r hdmi_colorimetry_val
-ffffffff82c7f018 R ttm_bo_vm_ops
-ffffffff82c80000 r ttm_range_manager_func
-ffffffff82c81018 r ttm_kmap_iter_io_ops
-ffffffff82c81030 r ttm_kmap_iter_linear_io_ops
-ffffffff82c82000 r ttm_sys_manager_func
-ffffffff82c83000 r ttm_kmap_iter_tt_ops
-ffffffff82c84000 r drm_sched_fence_ops_scheduled
-ffffffff82c84040 r drm_sched_fence_ops_finished
-ffffffff82c85000 R ch7017_ops
-ffffffff82c86000 R ch7xxx_ops
-ffffffff82c86060 r ch7xxx_ids
-ffffffff82c87000 R ivch_ops
-ffffffff82c87060 r backup_addresses
-ffffffff82c88000 R ns2501_ops
-ffffffff82c88060 r mode_agnostic_values
-ffffffff82c880e0 r ns2501_modes
-ffffffff82c89000 R sil164_ops
-ffffffff82c8a000 R tfp410_ops
-ffffffff82c8b000 r chv_dpll
-ffffffff82c8b050 r vlv_dpll
-ffffffff82c8b0a0 r g4x_dpll
-ffffffff82c8b0f0 r pch_dpll
-ffffffff82c8b138 r intel_dp_enc_funcs
-ffffffff82c8c000 r intel_hdmi_enc_funcs
-ffffffff82c8d000 r vlv_primary_formats
-ffffffff82c8d030 r ivb_primary_formats
-ffffffff82c8d050 r i965_primary_formats
-ffffffff82c8d070 r i8xx_primary_formats
-ffffffff82c8d080 r i965_plane_funcs
-ffffffff82c8d0e8 r i8xx_plane_funcs
-ffffffff82c8e000 r ilk_wm_funcs
-ffffffff82c8e040 r vlv_wm_funcs
-ffffffff82c8e080 r g4x_wm_funcs
-ffffffff82c8e0c0 r nop_funcs
-ffffffff82c8e100 r pnv_wm_funcs
-ffffffff82c8e140 r i965_wm_funcs
-ffffffff82c8e180 r i9xx_wm_funcs
-ffffffff82c8e1c0 r i845_wm_funcs
-ffffffff82c8e200 r cxsr_latency_table
-ffffffff82c8f000 r gen11_dsi_encoder_funcs
-ffffffff82c8f020 r gen11_dsi_connector_funcs
-ffffffff82c8f098 r gen11_dsi_connector_helper_funcs
-ffffffff82c8f0f8 r gen11_dsi_host_ops
-ffffffff82c90000 r intel_plane_helper_funcs
-ffffffff82c91000 r g4x_audio_funcs
-ffffffff82c91018 r ibx_audio_funcs
-ffffffff82c91030 r hsw_audio_funcs
-ffffffff82c91050 r hdmi_audio_clock
-ffffffff82c910c0 r hdmi_aud_ncts_36bpp
-ffffffff82c911a0 r hdmi_aud_ncts_30bpp
-ffffffff82c91280 r hdmi_aud_ncts_24bpp
-ffffffff82c92000 r intel_backlight_device_ops
-ffffffff82c92018 r bxt_pwm_funcs
-ffffffff82c92048 r cnp_pwm_funcs
-ffffffff82c92078 r lpt_pwm_funcs
-ffffffff82c920a8 r spt_pwm_funcs
-ffffffff82c920d8 r pch_pwm_funcs
-ffffffff82c92108 r ext_pwm_funcs
-ffffffff82c92138 r vlv_pwm_funcs
-ffffffff82c92168 r i965_pwm_funcs
-ffffffff82c92198 r i9xx_pwm_funcs
-ffffffff82c921c8 r pwm_bl_funcs
-ffffffff82c93000 r bdb_blocks
-ffffffff82c93160 r adlp_aux_ch_map
-ffffffff82c93169 r adls_aux_ch_map
-ffffffff82c93170 r rkl_aux_ch_map
-ffffffff82c93175 r direct_aux_ch_map
-ffffffff82c9317e r translate_iboost.mapping
-ffffffff82c93181 r adlp_ddc_pin_map
-ffffffff82c9318e r adls_ddc_pin_map
-ffffffff82c9319b r rkl_pch_tgp_ddc_pin_map
-ffffffff82c931a6 r gen9bc_tgp_ddc_pin_map
-ffffffff82c931b1 r icp_ddc_pin_map
-ffffffff82c931c0 r cnp_ddc_pin_map
-ffffffff82c94000 r mtl_sa_info
-ffffffff82c94006 r adlp_sa_info
-ffffffff82c9400c r adls_sa_info
-ffffffff82c94012 r rkl_sa_info
-ffffffff82c94018 r tgl_sa_info
-ffffffff82c94020 r intel_bw_funcs
-ffffffff82c95000 r intel_cdclk_funcs
-ffffffff82c95010 r mtl_cdclk_funcs
-ffffffff82c95030 r mtl_cdclk_table
-ffffffff82c95088 r tgl_cdclk_funcs
-ffffffff82c950b0 r dg2_cdclk_table
-ffffffff82c95160 r adlp_a_step_cdclk_table
-ffffffff82c951e0 r rplu_cdclk_table
-ffffffff82c952c8 r rplu_cdclk_funcs
-ffffffff82c952f0 r adlp_cdclk_table
-ffffffff82c953b0 r rkl_cdclk_table
-ffffffff82c954a0 r icl_cdclk_table
-ffffffff82c95588 r ehl_cdclk_funcs
-ffffffff82c955a8 r icl_cdclk_funcs
-ffffffff82c955c8 r bxt_cdclk_funcs
-ffffffff82c955f0 r glk_cdclk_table
-ffffffff82c95620 r bxt_cdclk_table
-ffffffff82c95668 r skl_cdclk_funcs
-ffffffff82c95688 r bdw_cdclk_funcs
-ffffffff82c956a8 r hsw_cdclk_funcs
-ffffffff82c956c8 r chv_cdclk_funcs
-ffffffff82c956e8 r vlv_cdclk_funcs
-ffffffff82c95708 r fixed_400mhz_cdclk_funcs
-ffffffff82c95728 r ilk_cdclk_funcs
-ffffffff82c95748 r gm45_cdclk_funcs
-ffffffff82c95768 r g33_cdclk_funcs
-ffffffff82c95788 r i965gm_cdclk_funcs
-ffffffff82c957a8 r pnv_cdclk_funcs
-ffffffff82c957c8 r i945gm_cdclk_funcs
-ffffffff82c957e8 r i915gm_cdclk_funcs
-ffffffff82c95808 r i915g_cdclk_funcs
-ffffffff82c95828 r i865g_cdclk_funcs
-ffffffff82c95848 r i85x_cdclk_funcs
-ffffffff82c95868 r i845g_cdclk_funcs
-ffffffff82c95888 r i830_cdclk_funcs
-ffffffff82c958a8 r g33_get_cdclk.div_3200
-ffffffff82c958ae r g33_get_cdclk.div_4000
-ffffffff82c958b4 r g33_get_cdclk.div_4800
-ffffffff82c958ba r g33_get_cdclk.div_5333
-ffffffff82c958c0 r i965gm_get_cdclk.div_3200
-ffffffff82c958c3 r i965gm_get_cdclk.div_4000
-ffffffff82c958c6 r i965gm_get_cdclk.div_5333
-ffffffff82c96000 r chv_color_funcs
-ffffffff82c96040 r vlv_color_funcs
-ffffffff82c96080 r i965_color_funcs
-ffffffff82c960c0 r i9xx_color_funcs
-ffffffff82c96100 r tgl_color_funcs
-ffffffff82c96140 r icl_color_funcs
-ffffffff82c96180 r glk_color_funcs
-ffffffff82c961c0 r skl_color_funcs
-ffffffff82c96200 r bdw_color_funcs
-ffffffff82c96240 r hsw_color_funcs
-ffffffff82c96280 r ivb_color_funcs
-ffffffff82c962c0 r ilk_color_funcs
-ffffffff82c96300 r chv_cgm_csc_matrix_identity
-ffffffff82c9631e r ilk_csc_matrix_rgb_to_ycbcr
-ffffffff82c9633c r ilk_csc_matrix_limited_range
-ffffffff82c9635a r ilk_csc_matrix_identity
-ffffffff82c97000 r icl_procmon_values
-ffffffff82c98000 r force_audio_names
-ffffffff82c98040 r broadcast_rgb_names
-ffffffff82c99000 r intel_crt_connector_funcs
-ffffffff82c99078 r intel_crt_enc_funcs
-ffffffff82c990a0 r intel_spurious_crt_detect
-ffffffff82c994a8 r intel_crt_connector_helper_funcs
-ffffffff82c9a000 r g4x_crtc_funcs
-ffffffff82c9a0c0 r i965_crtc_funcs
-ffffffff82c9a180 r i915gm_crtc_funcs
-ffffffff82c9a240 r i915_crtc_funcs
-ffffffff82c9a300 r i8xx_crtc_funcs
-ffffffff82c9a3c0 r bdw_crtc_funcs
-ffffffff82c9a480 r ilk_crtc_funcs
-ffffffff82c9b000 r output_format_str
-ffffffff82c9b020 r output_type_str
-ffffffff82c9c000 r intel_cursor_plane_funcs
-ffffffff82c9c068 r intel_cursor_formats
-ffffffff82c9d000 r mtl_c10_hdmi_tables
-ffffffff82c9d170 r mtl_c10_hdmi_25_2
-ffffffff82c9d18c r mtl_c10_hdmi_27_0
-ffffffff82c9d1a8 r mtl_c10_hdmi_27027
-ffffffff82c9d1c4 r mtl_c10_hdmi_28320
-ffffffff82c9d1e0 r mtl_c10_hdmi_30240
-ffffffff82c9d1fc r mtl_c10_hdmi_31500
-ffffffff82c9d218 r mtl_c10_hdmi_36000
-ffffffff82c9d234 r mtl_c10_hdmi_40000
-ffffffff82c9d250 r mtl_c10_hdmi_49500
-ffffffff82c9d26c r mtl_c10_hdmi_50000
-ffffffff82c9d288 r mtl_c10_hdmi_57284
-ffffffff82c9d2a4 r mtl_c10_hdmi_58000
-ffffffff82c9d2c0 r mtl_c10_hdmi_65000
-ffffffff82c9d2dc r mtl_c10_hdmi_71000
-ffffffff82c9d2f8 r mtl_c10_hdmi_74176
-ffffffff82c9d314 r mtl_c10_hdmi_74_25
-ffffffff82c9d330 r mtl_c10_hdmi_75000
-ffffffff82c9d34c r mtl_c10_hdmi_78750
-ffffffff82c9d368 r mtl_c10_hdmi_85500
-ffffffff82c9d384 r mtl_c10_hdmi_88750
-ffffffff82c9d3a0 r mtl_c10_hdmi_106500
-ffffffff82c9d3bc r mtl_c10_hdmi_108000
-ffffffff82c9d3d8 r mtl_c10_hdmi_115500
-ffffffff82c9d3f4 r mtl_c10_hdmi_119000
-ffffffff82c9d410 r mtl_c10_hdmi_135000
-ffffffff82c9d42c r mtl_c10_hdmi_138500
-ffffffff82c9d448 r mtl_c10_hdmi_147160
-ffffffff82c9d464 r mtl_c10_hdmi_148352
-ffffffff82c9d480 r mtl_c10_hdmi_148_5
-ffffffff82c9d49c r mtl_c10_hdmi_154000
-ffffffff82c9d4b8 r mtl_c10_hdmi_162000
-ffffffff82c9d4d4 r mtl_c10_hdmi_167000
-ffffffff82c9d4f0 r mtl_c10_hdmi_197802
-ffffffff82c9d50c r mtl_c10_hdmi_198000
-ffffffff82c9d528 r mtl_c10_hdmi_209800
-ffffffff82c9d544 r mtl_c10_hdmi_241500
-ffffffff82c9d560 r mtl_c10_hdmi_262750
-ffffffff82c9d57c r mtl_c10_hdmi_268500
-ffffffff82c9d598 r mtl_c10_hdmi_296703
-ffffffff82c9d5b4 r mtl_c10_hdmi_297000
-ffffffff82c9d5d0 r mtl_c10_hdmi_319750
-ffffffff82c9d5ec r mtl_c10_hdmi_497750
-ffffffff82c9d608 r mtl_c10_hdmi_592000
-ffffffff82c9d624 r mtl_c10_hdmi_593407
-ffffffff82c9d640 r mtl_c10_hdmi_594
-ffffffff82c9d660 r mtl_c20_hdmi_tables
-ffffffff82c9d6b8 r mtl_c20_hdmi_25_175
-ffffffff82c9d6e4 r mtl_c20_hdmi_27_0
-ffffffff82c9d710 r mtl_c20_hdmi_74_25
-ffffffff82c9d73c r mtl_c20_hdmi_148_5
-ffffffff82c9d768 r mtl_c20_hdmi_594
-ffffffff82c9d794 r mtl_c20_hdmi_300
-ffffffff82c9d7c0 r mtl_c20_hdmi_600
-ffffffff82c9d7ec r mtl_c20_hdmi_800
-ffffffff82c9d818 r mtl_c20_hdmi_1000
-ffffffff82c9d844 r mtl_c20_hdmi_1200
-ffffffff82c9d870 r mtl_c10_edp_tables
-ffffffff82c9d8c0 r mtl_c10_dp_tables
-ffffffff82c9d8e8 r mtl_c10_dp_rbr
-ffffffff82c9d904 r mtl_c10_edp_r216
-ffffffff82c9d920 r mtl_c10_edp_r243
-ffffffff82c9d93c r mtl_c10_dp_hbr1
-ffffffff82c9d958 r mtl_c10_edp_r324
-ffffffff82c9d974 r mtl_c10_edp_r432
-ffffffff82c9d990 r mtl_c10_dp_hbr2
-ffffffff82c9d9ac r mtl_c10_edp_r675
-ffffffff82c9d9c8 r mtl_c10_dp_hbr3
-ffffffff82c9d9f0 r mtl_c20_dp_tables
-ffffffff82c9da30 r mtl_c20_dp_rbr
-ffffffff82c9da5c r mtl_c20_dp_hbr1
-ffffffff82c9da88 r mtl_c20_dp_hbr2
-ffffffff82c9dab4 r mtl_c20_dp_hbr3
-ffffffff82c9dae0 r mtl_c20_dp_uhbr13_5
-ffffffff82c9db0c r mtl_c20_dp_uhbr10
-ffffffff82c9db38 r mtl_c20_dp_uhbr20
-ffffffff82c9e000 r intel_ddi_funcs
-ffffffff82c9e020 r index_to_dp_signal_levels
-ffffffff82c9e030 r gen9_chicken_trans_reg_by_port.trans
-ffffffff82c9f000 r tgl_combo_phy_trans_edp_hbr2_hobl
-ffffffff82c9f010 r _tgl_combo_phy_trans_edp_hbr2_hobl
-ffffffff82c9f080 r mtl_c20_trans_uhbr
-ffffffff82c9f090 r mtl_c20_trans_hdmi
-ffffffff82c9f0a0 r mtl_c20_trans_dp14
-ffffffff82c9f0b0 r mtl_c10_trans_dp14
-ffffffff82c9f0c0 r _mtl_c20_trans_uhbr
-ffffffff82c9f180 r _mtl_c20_trans_hdmi
-ffffffff82c9f1c0 r _mtl_c20_trans_dp14
-ffffffff82c9f240 r _mtl_c10_trans_dp14
-ffffffff82c9f2b8 r dg2_snps_trans_uhbr
-ffffffff82c9f2c8 r dg2_snps_trans
-ffffffff82c9f2e0 r _dg2_snps_trans_uhbr
-ffffffff82c9f3a0 r _dg2_snps_trans
-ffffffff82c9f418 r icl_combo_phy_trans_hdmi
-ffffffff82c9f430 r _icl_combo_phy_trans_hdmi
-ffffffff82c9f488 r adlp_combo_phy_trans_edp_hbr3
-ffffffff82c9f498 r adlp_combo_phy_trans_edp_up_to_hbr2
-ffffffff82c9f4b0 r _adlp_combo_phy_trans_dp_hbr2_edp_hbr3
-ffffffff82c9f530 r _adlp_combo_phy_trans_edp_hbr2
-ffffffff82c9f5a8 r adlp_combo_phy_trans_dp_hbr2_hbr3
-ffffffff82c9f5b8 r adlp_combo_phy_trans_dp_hbr
-ffffffff82c9f5d0 r _adlp_combo_phy_trans_dp_hbr2_hbr3
-ffffffff82c9f650 r _adlp_combo_phy_trans_dp_hbr
-ffffffff82c9f6c8 r tgl_dkl_phy_trans_hdmi
-ffffffff82c9f6e0 r _tgl_dkl_phy_trans_hdmi
-ffffffff82c9f758 r adlp_dkl_phy_trans_dp_hbr2_hbr3
-ffffffff82c9f768 r adlp_dkl_phy_trans_dp_hbr
-ffffffff82c9f780 r _adlp_dkl_phy_trans_dp_hbr2_hbr3
-ffffffff82c9f800 r _adlp_dkl_phy_trans_dp_hbr
-ffffffff82c9f878 r adls_combo_phy_trans_edp_hbr3
-ffffffff82c9f888 r adls_combo_phy_trans_edp_hbr2
-ffffffff82c9f8a0 r _adls_combo_phy_trans_edp_hbr3
-ffffffff82c9f920 r _adls_combo_phy_trans_edp_hbr2
-ffffffff82c9f998 r adls_combo_phy_trans_dp_hbr2_hbr3
-ffffffff82c9f9a8 r tgl_combo_phy_trans_dp_hbr
-ffffffff82c9f9c0 r _adls_combo_phy_trans_dp_hbr2_hbr3
-ffffffff82c9fa40 r _tgl_combo_phy_trans_dp_hbr
-ffffffff82c9fab8 r icl_combo_phy_trans_dp_hbr2_edp_hbr3
-ffffffff82c9fac8 r icl_combo_phy_trans_edp_hbr2
-ffffffff82c9fae0 r _icl_combo_phy_trans_dp_hbr2_edp_hbr3
-ffffffff82c9fb60 r _icl_combo_phy_trans_edp_hbr2
-ffffffff82c9fbd8 r rkl_combo_phy_trans_dp_hbr2_hbr3
-ffffffff82c9fbe8 r rkl_combo_phy_trans_dp_hbr
-ffffffff82c9fc00 r _rkl_combo_phy_trans_dp_hbr2_hbr3
-ffffffff82c9fc80 r _rkl_combo_phy_trans_dp_hbr
-ffffffff82c9fcf8 r dg1_combo_phy_trans_dp_hbr2_hbr3
-ffffffff82c9fd08 r dg1_combo_phy_trans_dp_rbr_hbr
-ffffffff82c9fd20 r _dg1_combo_phy_trans_dp_hbr2_hbr3
-ffffffff82c9fda0 r _dg1_combo_phy_trans_dp_rbr_hbr
-ffffffff82c9fe18 r tgl_uy_combo_phy_trans_dp_hbr2
-ffffffff82c9fe28 r tgl_combo_phy_trans_dp_hbr2
-ffffffff82c9fe40 r _tgl_uy_combo_phy_trans_dp_hbr2
-ffffffff82c9fec0 r _tgl_combo_phy_trans_dp_hbr2
-ffffffff82c9ff38 r tgl_dkl_phy_trans_dp_hbr2
-ffffffff82c9ff48 r tgl_dkl_phy_trans_dp_hbr
-ffffffff82c9ff60 r _tgl_dkl_phy_trans_dp_hbr2
-ffffffff82c9ffe0 r _tgl_dkl_phy_trans_dp_hbr
-ffffffff82ca0058 r jsl_combo_phy_trans_edp_hbr2
-ffffffff82ca0068 r jsl_combo_phy_trans_edp_hbr
-ffffffff82ca0080 r _jsl_combo_phy_trans_edp_hbr2
-ffffffff82ca0100 r _jsl_combo_phy_trans_edp_hbr
-ffffffff82ca0178 r ehl_combo_phy_trans_dp
-ffffffff82ca0188 r ehl_combo_phy_trans_edp_hbr2
-ffffffff82ca01a0 r _ehl_combo_phy_trans_edp_hbr2
-ffffffff82ca0220 r _ehl_combo_phy_trans_dp
-ffffffff82ca0298 r icl_mg_phy_trans_hdmi
-ffffffff82ca02b0 r _icl_mg_phy_trans_hdmi
-ffffffff82ca0328 r icl_mg_phy_trans_hbr2_hbr3
-ffffffff82ca0338 r icl_mg_phy_trans_rbr_hbr
-ffffffff82ca0350 r _icl_mg_phy_trans_hbr2_hbr3
-ffffffff82ca03d0 r _icl_mg_phy_trans_rbr_hbr
-ffffffff82ca0448 r bxt_trans_hdmi
-ffffffff82ca0458 r bxt_trans_edp
-ffffffff82ca0468 r bxt_trans_dp
-ffffffff82ca0480 r _bxt_trans_hdmi
-ffffffff82ca0500 r _bxt_trans_edp
-ffffffff82ca0580 r _bxt_trans_dp
-ffffffff82ca05f8 r skl_y_trans_hdmi
-ffffffff82ca0608 r skl_y_trans_edp
-ffffffff82ca0618 r kbl_y_trans_dp
-ffffffff82ca0630 r _skl_y_trans_hdmi
-ffffffff82ca06c0 r _skl_y_trans_edp
-ffffffff82ca0740 r _kbl_y_trans_dp
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-ffffffff82cb2450 r icl_dp_combo_pll_24MHz_values
-ffffffff82cb2550 r icl_dp_combo_pll_19_2MHz_values
-ffffffff82cb2650 r tgl_tbt_pll_19_2MHz_values
-ffffffff82cb266c r tgl_tbt_pll_24MHz_values
-ffffffff82cb2688 r icl_tbt_pll_19_2MHz_values
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-ffffffff82cb2ce4 r skl_ddi_calculate_wrpll.odd_dividers
-ffffffff82cb2cf0 r skl_ddi_calculate_wrpll.dividers
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-ffffffff82cb2dd8 r hsw_ddi_spll_funcs
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-ffffffff82cba330 r gmbus_pins_bxt
-ffffffff82cba370 r gmbus_pins_skl
-ffffffff82cba3e0 r gmbus_pins_bdw
-ffffffff82cba450 r gmbus_pins
-ffffffff82cbc000 r gsc_hdcp_ops
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-ffffffff82cbd0d8 r intel_hdmi_hdcp_shim
-ffffffff82cbd190 r hdcp2_msg_timeout
-ffffffff82cbe000 r i915_hpd_funcs
-ffffffff82cbe010 r icp_hpd_funcs
-ffffffff82cbe020 r dg1_hpd_funcs
-ffffffff82cbe030 r xelpdp_hpd_funcs
-ffffffff82cbe040 r gen11_hpd_funcs
-ffffffff82cbe050 r bxt_hpd_funcs
-ffffffff82cbe060 r spt_hpd_funcs
-ffffffff82cbe070 r ilk_hpd_funcs
-ffffffff82cbe080 r hpd_status_g4x
-ffffffff82cbe0c0 r hpd_status_i915
-ffffffff82cbe100 r hpd_xelpdp
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-ffffffff82cbe180 r hpd_sde_dg1
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-ffffffff82cbe200 r hpd_icp
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-ffffffff82cbe280 r hpd_cpt
-ffffffff82cbe2c0 r hpd_ibx
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-ffffffff82cbe340 r hpd_bdw
-ffffffff82cbe380 r hpd_ivb
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-ffffffff82cbe400 r hpd_mask_i915
-ffffffff82cbf000 r load_detect_mode
-ffffffff82cc1000 r intel_no_lvds
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-ffffffff82cc34c0 r intel_lvds_enc_funcs
-ffffffff82cc34e0 r intel_lvds_connector_helper_funcs
-ffffffff82cc3540 r intel_dual_link_lvds
-ffffffff82cc4000 r power_state_map
-ffffffff82cc4030 r intel_no_opregion_vbt
-ffffffff82cc42e0 r intel_use_opregion_panel_type
-ffffffff82cc5000 r y_static_hcoeffs
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-ffffffff82cc6000 r intel_pmdemand_funcs
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-ffffffff82cc9000 r rc_range_minqp420_8bpc
-ffffffff82cc9100 r rc_range_minqp444_8bpc
-ffffffff82cc9330 r rc_range_minqp420_10bpc
-ffffffff82cc9490 r rc_range_minqp444_10bpc
-ffffffff82cc9770 r rc_range_minqp420_12bpc
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-ffffffff82cc9cd0 r rc_range_maxqp420_8bpc
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-ffffffff82ccb000 r intel_quirks
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-ffffffff82ccc468 r intel_sdvo_connector_funcs
-ffffffff82ccc4e0 r intel_sdvo_connector_helper_funcs
-ffffffff82ccc540 r sdvo_tv_modes
-ffffffff82ccce30 r tv_format_names
-ffffffff82ccd000 r dg2_hdmi_tables
-ffffffff82ccd170 r dg2_edp_tables
-ffffffff82ccd1c0 r dg2_dp_100_tables
-ffffffff82ccd1f8 r dg2_dp_rbr_100
-ffffffff82ccd21c r dg2_edp_r216
-ffffffff82ccd240 r dg2_edp_r243
-ffffffff82ccd264 r dg2_dp_hbr1_100
-ffffffff82ccd288 r dg2_edp_r324
-ffffffff82ccd2ac r dg2_edp_r432
-ffffffff82ccd2d0 r dg2_dp_hbr2_100
-ffffffff82ccd2f4 r dg2_dp_hbr3_100
-ffffffff82ccd318 r dg2_dp_uhbr10_100
-ffffffff82ccd33c r dg2_dp_uhbr13_100
-ffffffff82ccd360 r dg2_hdmi_25_175
-ffffffff82ccd384 r dg2_hdmi_27_0
-ffffffff82ccd3a8 r dg2_hdmi_74_25
-ffffffff82ccd3cc r dg2_hdmi_148_5
-ffffffff82ccd3f0 r dg2_hdmi_297
-ffffffff82ccd414 r dg2_hdmi_594
-ffffffff82ccd438 r dg2_hdmi_25200
-ffffffff82ccd45c r dg2_hdmi_27027
-ffffffff82ccd480 r dg2_hdmi_28320
-ffffffff82ccd4a4 r dg2_hdmi_30240
-ffffffff82ccd4c8 r dg2_hdmi_31500
-ffffffff82ccd4ec r dg2_hdmi_36000
-ffffffff82ccd510 r dg2_hdmi_40000
-ffffffff82ccd534 r dg2_hdmi_49500
-ffffffff82ccd558 r dg2_hdmi_50000
-ffffffff82ccd57c r dg2_hdmi_57284
-ffffffff82ccd5a0 r dg2_hdmi_58000
-ffffffff82ccd5c4 r dg2_hdmi_65000
-ffffffff82ccd5e8 r dg2_hdmi_71000
-ffffffff82ccd60c r dg2_hdmi_74176
-ffffffff82ccd630 r dg2_hdmi_75000
-ffffffff82ccd654 r dg2_hdmi_78750
-ffffffff82ccd678 r dg2_hdmi_85500
-ffffffff82ccd69c r dg2_hdmi_88750
-ffffffff82ccd6c0 r dg2_hdmi_106500
-ffffffff82ccd6e4 r dg2_hdmi_108000
-ffffffff82ccd708 r dg2_hdmi_115500
-ffffffff82ccd72c r dg2_hdmi_119000
-ffffffff82ccd750 r dg2_hdmi_135000
-ffffffff82ccd774 r dg2_hdmi_138500
-ffffffff82ccd798 r dg2_hdmi_147160
-ffffffff82ccd7bc r dg2_hdmi_148352
-ffffffff82ccd7e0 r dg2_hdmi_154000
-ffffffff82ccd804 r dg2_hdmi_162000
-ffffffff82ccd828 r dg2_hdmi_209800
-ffffffff82ccd84c r dg2_hdmi_241500
-ffffffff82ccd870 r dg2_hdmi_262750
-ffffffff82ccd894 r dg2_hdmi_267300
-ffffffff82ccd8b8 r dg2_hdmi_268500
-ffffffff82ccd8dc r dg2_hdmi_296703
-ffffffff82ccd900 r dg2_hdmi_319890
-ffffffff82ccd924 r dg2_hdmi_497750
-ffffffff82ccd948 r dg2_hdmi_592000
-ffffffff82ccd96c r dg2_hdmi_593407
-ffffffff82cce000 r chv_pipe_b_sprite_formats
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-ffffffff82ccf000 r xelpdp_tc_phy_ops
-ffffffff82ccf040 r adlp_tc_phy_ops
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-ffffffff82ccf100 r tc_port_mode_name.names
-ffffffff82cd0000 r intel_tv_connector_funcs
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+ffffffff82b0e360 R pci_subclass_memory
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+ffffffff82b0e6c0 R pci_subclass_input
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+ffffffff82b0e880 R pci_subclass_serialbus
+ffffffff82b0e990 R pci_subclass_wireless
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+ffffffff82b0eaa0 R pci_subclass_satcom
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+ffffffff82b38080 r adw_38C0800_Default_EEPROM
+ffffffff82b38100 r adw_38C1600_Default_EEPROM
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+ffffffff82b3a3b0 R adw_asc38C0800_mcode
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+ffffffff82b3b8a0 R adw_asc38C1600_mcode
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+ffffffff82b42000 R nvme_pci_ca
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+ffffffff82b470e0 R eap1371_hw_if
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+ffffffff82b471d0 R eap_devices
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+ffffffff82b4d390 r emuxki_rate_to_pitch.logSlopeTable
+ffffffff82b4e000 R auixp_pci_devices
+ffffffff82b4e010 R auixp_ca
+ffffffff82b4e038 R auixp_hw_if
+ffffffff82b4f000 R clcs_ca
+ffffffff82b4f028 R cs4280_hw_if
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+ffffffff82b52000 R gdt_pci_ca
+ffffffff82b53000 R ciss_pci_ca
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+ffffffff82bcd000 R mpii_ca
+ffffffff82bcd028 R mpii_switch
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+ffffffff82bcf1f8 R aq_fw2x_ops
+ffffffff82bcf220 R aq2_fw_ops
+ffffffff82bcf248 R aq_ca
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+ffffffff82bd0258 r tulip_2114x_isv_boardsw
+ffffffff82bd0280 r tulip_21140_smc9332_boardsw
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+ffffffff82bd02d0 r tulip_21140_cogent_em100_boardsw
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+ffffffff82bd5005 R rdcide_hold
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+ffffffff82bd5010 R rdcide_udmaclk
+ffffffff82bd5028 R default_product_desc
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+ffffffff82bd5630 R pciide_amd_products
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+ffffffff82bd5730 R pciide_via_products
+ffffffff82bd5810 R pciide_cypress_products
+ffffffff82bd5820 R pciide_sis_products
+ffffffff82bd5870 R pciide_natsemi_products
+ffffffff82bd5890 R pciide_acer_products
+ffffffff82bd58a0 R pciide_triones_products
+ffffffff82bd58f0 R pciide_promise_products
+ffffffff82bd5ac0 R pciide_acard_products
+ffffffff82bd5b10 R pciide_serverworks_products
+ffffffff82bd5bb0 R pciide_nvidia_products
+ffffffff82bd5e80 R pciide_ite_products
+ffffffff82bd5ea0 R pciide_ati_products
+ffffffff82bd5f20 R pciide_jmicron_products
+ffffffff82bd5f70 R pciide_phison_products
+ffffffff82bd5f80 R pciide_rdc_products
+ffffffff82bd5f90 R pciide_vendors
+ffffffff82bd6140 R pciide_pci_ca
+ffffffff82bd6168 R pciide_jmb_ca
+ffffffff82bd6190 r piix_isp_dma
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+ffffffff82bd7000 R ppb_ca
+ffffffff82bd8000 R cy_pci_ca
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+ffffffff82bd9000 R rl_pci_ca
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+ffffffff82bda000 R re_pci_devices
+ffffffff82bda030 R re_pci_ca
+ffffffff82bdb000 R vr_ca
+ffffffff82bdc000 R txp_ca
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+ffffffff82bde320 r meteor_pixfmt_table
+ffffffff82bdf000 R bktr_ca
+ffffffff82bdf028 R bktr_hw_if
+ffffffff82be0000 r tuners
+ffffffff82be0170 r freqTable
+ffffffff82be0260 r nabcst
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+ffffffff82be0420 r jpnbcst
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+ffffffff82be0590 r france
+ffffffff82be1000 R xl_pci_ca
+ffffffff82be1030 R xl_pci_devices
+ffffffff82be2000 R fxp_pci_ca
+ffffffff82be2030 R fxp_pci_devices
+ffffffff82be3000 R em_devices
+ffffffff82be3308 R em_ca
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+ffffffff82be4000 r em_igp_cable_length_table
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+ffffffff82be5000 R ixgb_devices
+ffffffff82be5010 R ixgb_ca
+ffffffff82be6000 R ixgbe_devices
+ffffffff82be60b8 R ix_ca
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+ffffffff82be63e0 r ix_rxq_kstats_tpl
+ffffffff82be6458 r ix_txq_kstats_tpl
+ffffffff82be7000 r ixgbe_mvals_base
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+ffffffff82be70c0 r ixgbe_mvals_X550
+ffffffff82be7120 r ixgbe_mvals_X550EM_x
+ffffffff82be7180 r ixgbe_mvals_X550EM_a
+ffffffff82bea000 R ixl_ca
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+ffffffff82bea2c0 R ixl_vsi_counters
+ffffffff82bea380 r ixl_devices
+ffffffff82bea4c0 r ixl_710
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+ffffffff82bea8a0 r ixl_sfp_ops
+ffffffff82bea8b8 r ixl_qsfp_ops
+ffffffff82beb000 r dwqe_pci_devices
+ffffffff82beb018 R dwqe_pci_ca
+ffffffff82bec000 R xge_ca
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+ffffffff82bec030 r xge_fix_mac
+ffffffff82bec110 r xge_xena_dtx_cfg
+ffffffff82bec170 r xge_herc_dtx_cfg
+ffffffff82bed000 R thtc_ca
+ffffffff82bed028 R tht_ca
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+ffffffff82bed068 r tht_link_state.interval
+ffffffff82bee000 R myx_ca
+ffffffff82bee028 R myx_devices
+ffffffff82bef000 R oce_ca
+ffffffff82bef030 R oce_devices
+ffffffff82bf0000 R dc_pci_ca
+ffffffff82bf1000 R epic_pci_ca
+ffffffff82bf1028 R epic_pci_devices
+ffffffff82bf2000 R ti_pci_ca
+ffffffff82bf2030 R ti_devices
+ffffffff82bf3000 R ne_pci_ca
+ffffffff82bf3030 R ne_pci_prod
+ffffffff82bf4000 R gem_pci_ca
+ffffffff82bf4030 R gem_pci_devices
+ffffffff82bf4050 r gem_promhdr
+ffffffff82bf4052 r gem_promdat
+ffffffff82bf405a r gem_promdat2
+ffffffff82bf5000 R cas_ca
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+ffffffff82bf5030 r cas_promhdr
+ffffffff82bf5032 r cas_promdat_sun
+ffffffff82bf503a r cas_promdat_ns
+ffffffff82bf5042 r cas_promdat2
+ffffffff82bf6000 R sf_pci_ca
+ffffffff82bf6028 R sf_pci_products
+ffffffff82bf7000 R sis_ca
+ffffffff82bf7028 R sis_devices
+ffffffff82bf8000 R se_devices
+ffffffff82bf8008 R se_ca
+ffffffff82bf9000 R mbg_ca
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+ffffffff82bfa000 R uhci_pci_ca
+ffffffff82bfb000 R ohci_pci_ca
+ffffffff82bfc000 R ehci_pci_ca
+ffffffff82bfd000 R xhci_pci_ca
+ffffffff82bfe000 R cbb_pci_ca
+ffffffff82bfe028 r pccbb_pcmcia_do_io_map.pcic_iowidth
+ffffffff82bff000 R skc_devices
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+ffffffff82bff058 R sk_ca
+ffffffff82c00000 R mskc_devices
+ffffffff82c000a8 R mskc_ca
+ffffffff82c000d0 R msk_ca
+ffffffff82c00100 r msk_mib
+ffffffff82c01000 R puc_pci_ca
+ffffffff82c02000 R puc_devs
+ffffffff82c07000 R com_puc_ca
+ffffffff82c07030 r puc_port_types
+ffffffff82c08000 R lpt_puc_ca
+ffffffff82c09000 R wi_pci_ca
+ffffffff82c09030 r wi_pci_products
+ffffffff82c0a000 R an_pci_ca
+ffffffff82c0a030 R an_pci_devices
+ffffffff82c0b000 R iwi_devices
+ffffffff82c0b010 R iwi_ca
+ffffffff82c0c000 R wpi_ca
+ffffffff82c0c028 r wpi_devices
+ffffffff82c0c030 r wpi_rates
+ffffffff82c0c050 r wpi_rf_gain_5ghz
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+ffffffff82c0c310 r wpi_bands
+ffffffff82c0d000 R iwn_mcs2ridx
+ffffffff82c0d020 R iwn_ca
+ffffffff82c0d050 r iwn_devices
+ffffffff82c0d0e8 r iwn4965_sensitivity_limits
+ffffffff82c0d124 r iwn5000_sensitivity_limits
+ffffffff82c0d160 r iwn5150_sensitivity_limits
+ffffffff82c0d19c r iwn1000_sensitivity_limits
+ffffffff82c0d1d8 r iwn6000_sensitivity_limits
+ffffffff82c0d214 r iwn2000_sensitivity_limits
+ffffffff82c0d250 r iwn_fw_errmsg
+ffffffff82c0d340 r iwn4965_set_txpower.tdiv
+ffffffff82c0d360 r iwn4965_rf_gain_5ghz
+ffffffff82c0d3d0 r iwn4965_dsp_gain_5ghz
+ffffffff82c0d440 r iwn4965_dsp_gain_2ghz
+ffffffff82c0d4b0 r iwn_pmgt
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+ffffffff82c0d700 r iwn_bands
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+ffffffff82c0d820 r iwn4965_rf_gain_2ghz
+ffffffff82c0e000 R iwm_nvm_channels
+ffffffff82c0e030 R iwm_nvm_channels_8000
+ffffffff82c0e070 R iwm_rates
+ffffffff82c0e0d0 R iwm_ht_mcs2ridx
+ffffffff82c0e110 R iwm_tid_to_ac
+ffffffff82c0e118 R iwm_ac_to_tx_fifo
+ffffffff82c0e120 R iwm_nvm_to_read
+ffffffff82c0e144 r iwm_set_hw_address_8000.reserved_mac
+ffffffff82c0e180 r iwm_sf_full_timeout
+ffffffff82c0e1b0 r iwm_sf_full_timeout_def
+ffffffff82c0e1e0 r advanced_lookup
+ffffffff82c0e320 r iwm_devices
+ffffffff82c0e360 R iwm_ca
+ffffffff82c0f000 R iwx_9560_quz_a0_jf_b0_cfg
+ffffffff82c0f020 R iwx_9560_qu_c0_jf_b0_cfg
+ffffffff82c0f040 R iwx_qu_b0_hr1_b0
+ffffffff82c0f060 R iwx_qu_b0_hr_b0
+ffffffff82c0f080 R iwx_ax201_cfg_qu_hr
+ffffffff82c0f0a0 R iwx_qu_c0_hr1_b0
+ffffffff82c0f0c0 R iwx_qu_c0_hr_b0
+ffffffff82c0f0e0 R iwx_ax201_cfg_qu_c0_hr_b0
+ffffffff82c0f100 R iwx_quz_a0_hr1_b0
+ffffffff82c0f120 R iwx_ax201_cfg_quz_hr
+ffffffff82c0f140 R iwx_cfg_so_a0_hr_b0
+ffffffff82c0f160 R iwx_cfg_quz_a0_hr_b0
+ffffffff82c0f180 R iwx_2ax_cfg_so_gf_a0
+ffffffff82c0f1a0 R iwx_2ax_cfg_so_gf_a0_long
+ffffffff82c0f1c0 R iwx_2ax_cfg_so_gf4_a0
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+ffffffff82c0f200 R iwx_2ax_cfg_ty_gf_a0
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+ffffffff82d79020 r pre_emph_names
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+ffffffff82d7c000 r amdgpu_benchmark.common_modes
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+ffffffff82d80000 R amdgpu_ctx_num_entities
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+ffffffff82d810f0 r amdgpu_device_ip_reinit_late_sriov.ip_order
+ffffffff82d82000 r hw_id_map
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+ffffffff82d83270 r dcc_formats
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+ffffffff82d833e0 r amdgpu_audio_enum_list
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+ffffffff82d852f8 R amdgpu_ca
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+ffffffff82d89018 r amdgpu_gtt_mgr_func
+ffffffff82d8a000 r amdgpu_atombios_i2c_algo
+ffffffff82d8b000 R node_id_to_phys_map
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+ffffffff82d8e000 r amdgpu_vram_names
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+ffffffff82d900a8 R psp_v3_1_ip_block
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+ffffffff82d900d8 R psp_v11_0_ip_block
+ffffffff82d900f0 R psp_v11_0_8_ip_block
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 ffffffff82da0000 r crtc_offsets
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-ffffffff82da00c8 R dce_v11_0_ip_block
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 ffffffff82da0150 r hpd_offsets
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 ffffffff82da0320 r interrupt_status_offsets
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 ffffffff82da04c0 r vga_control_regs
 ffffffff82da04e0 r dig_offsets
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-ffffffff82dab3c0 r golden_settings_gc_rlc_spm_10_1_nv14
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-ffffffff82db9160 r gfx_v11_0_ring_funcs_kiq
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-ffffffff82dbe0e8 R gfx_v9_0_ip_block
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-ffffffff82dca100 r gfx_v9_4_3_ring_funcs_kiq
-ffffffff82dca240 r gfx_v9_4_3_ring_funcs_compute
-ffffffff82dca380 r gfx_v9_4_3_eop_irq_funcs
-ffffffff82dca390 r gfx_v9_4_3_priv_reg_irq_funcs
-ffffffff82dca3a0 r gfx_v9_4_3_priv_inst_irq_funcs
-ffffffff82dca3b0 r gfx_v9_4_3_rlc_funcs
-ffffffff82dca418 r gfx_v9_4_3_gfx_funcs
-ffffffff82dca480 r gfx_v9_4_3_ce_reg_list
-ffffffff82dca810 r gfx_v9_4_3_ras_mem_list_array
-ffffffff82dca970 r gfx_v9_4_3_ue_reg_list
-ffffffff82dcad30 r gfx_v9_4_3_ras_cp_mem_list
-ffffffff82dcad80 r gfx_v9_4_3_ras_gcea_mem_list
-ffffffff82dcaec0 r gfx_v9_4_3_ras_gc_cane_mem_list
-ffffffff82dcaed0 r gfx_v9_4_3_ras_gcutcl2_mem_list
-ffffffff82dcaee0 r gfx_v9_4_3_ras_gds_mem_list
-ffffffff82dcaef0 r gfx_v9_4_3_ras_lds_mem_list
-ffffffff82dcb110 r gfx_v9_4_3_ras_rlc_mem_list
-ffffffff82dcb190 r gfx_v9_4_3_ras_sp_mem_list
-ffffffff82dcb1a0 r gfx_v9_4_3_ras_spi_mem_list
-ffffffff82dcb1e0 r gfx_v9_4_3_ras_sqc_mem_list
-ffffffff82dcb350 r gfx_v9_4_3_ras_sq_mem_list
-ffffffff82dcb390 r gfx_v9_4_3_ras_ta_mem_list
-ffffffff82dcb3e0 r gfx_v9_4_3_ras_tcc_mem_list
-ffffffff82dcb3f0 r gfx_v9_4_3_ras_tca_mem_list
-ffffffff82dcb400 r gfx_v9_4_3_ras_tci_mem_list
-ffffffff82dcb410 r gfx_v9_4_3_ras_tcp_mem_list
-ffffffff82dcb5a0 r gfx_v9_4_3_ras_td_mem_list
-ffffffff82dcb5d0 r gfx_v9_4_3_ras_tcx_mem_list
-ffffffff82dcbb50 r gfx_v9_4_3_ras_atc_l2_mem_list
-ffffffff82dcbb60 r gfx_v9_4_3_ras_utcl2_mem_list
-ffffffff82dcbb70 r gfx_v9_4_3_ras_vml2_mem_list
-ffffffff82dcbb80 r gfx_v9_4_3_ras_vml2_walker_mem_list
-ffffffff82dcc000 R gfxhub_v1_0_funcs
-ffffffff82dcd000 R gfxhub_v1_2_funcs
-ffffffff82dce000 R gfxhub_v2_0_funcs
-ffffffff82dce060 r gfxhub_v2_0_vmhub_funcs
-ffffffff82dce070 r gfxhub_client_ids
-ffffffff82dcf000 R gfxhub_v2_1_funcs
-ffffffff82dcf060 r gfxhub_v2_1_vmhub_funcs
+ffffffff82da0500 r pin_offsets
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+ffffffff82da0570 r tonga_mgcg_cgcg_init
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+ffffffff82da1000 r crtc_offsets
+ffffffff82da1020 r dce_v11_0_ip_funcs
+ffffffff82da10c8 R dce_v11_0_ip_block
+ffffffff82da10e0 R dce_v11_2_ip_block
+ffffffff82da10f8 r dce_v11_0_display_funcs
+ffffffff82da1150 r hpd_offsets
+ffffffff82da1168 r dce_v11_0_encoder_funcs
+ffffffff82da1188 r dce_v11_0_dac_helper_funcs
+ffffffff82da11f0 r dce_v11_0_dig_helper_funcs
+ffffffff82da1258 r dce_v11_0_ext_helper_funcs
+ffffffff82da12c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type
+ffffffff82da12f0 r dce_v11_0_crtc_irq_funcs
+ffffffff82da1300 r dce_v11_0_pageflip_irq_funcs
+ffffffff82da1310 r dce_v11_0_hpd_irq_funcs
+ffffffff82da1320 r interrupt_status_offsets
+ffffffff82da1380 r dce_v11_0_crtc_funcs
+ffffffff82da1440 r dce_v11_0_crtc_helper_funcs
+ffffffff82da14c0 r vga_control_regs
+ffffffff82da14e0 r dig_offsets
+ffffffff82da1510 r cz_mgcg_cgcg_init
+ffffffff82da1530 r cz_golden_settings_a11
+ffffffff82da1550 r stoney_golden_settings_a11
+ffffffff82da1570 r polaris11_golden_settings_a11
+ffffffff82da15b0 r polaris10_golden_settings_a11
+ffffffff82da2000 R df_v1_7_funcs
+ffffffff82da2070 r df_v1_7_channel_number
+ffffffff82da3000 R df_v3_6_funcs
+ffffffff82da3070 r df_v3_6_channel_number
+ffffffff82da4000 R df_v4_3_funcs
+ffffffff82da5000 r GC_BASE
+ffffffff82da50a8 r HDP_BASE
+ffffffff82da5150 r MMHUB_BASE
+ffffffff82da51f8 r ATHUB_BASE
+ffffffff82da52a0 r NBIO_BASE
+ffffffff82da5348 r MP0_BASE
+ffffffff82da53f0 r MP1_BASE
+ffffffff82da5498 r VCN0_BASE
+ffffffff82da5540 r DF_BASE
+ffffffff82da55e8 r DCN_BASE
+ffffffff82da5690 r OSSSYS_BASE
+ffffffff82da5738 r SMUIO_BASE
+ffffffff82da57e0 r THM_BASE
+ffffffff82da6000 r gfx_v10_0_ip_funcs
+ffffffff82da60a8 R gfx_v10_0_ip_block
+ffffffff82da60c0 r gfx_v10_0_gfx_funcs
+ffffffff82da6120 r golden_settings_gc_rlc_spm_10_0_nv10
+ffffffff82dac3c0 r golden_settings_gc_rlc_spm_10_1_nv14
+ffffffff82dafde0 r golden_settings_gc_rlc_spm_10_1_2_nv12
+ffffffff82db6080 r gfx_v10_0_kiq_pm4_funcs
+ffffffff82db60c0 r gfx_v10_0_ring_funcs_kiq
+ffffffff82db6200 r gfx_v10_0_ring_funcs_gfx
+ffffffff82db6340 r gfx_v10_0_ring_funcs_compute
+ffffffff82db6480 r gfx_v10_0_eop_irq_funcs
+ffffffff82db6490 r gfx_v10_0_kiq_irq_funcs
+ffffffff82db64a0 r gfx_v10_0_priv_reg_irq_funcs
+ffffffff82db64b0 r gfx_v10_0_priv_inst_irq_funcs
+ffffffff82db64c0 r gfx_v10_0_rlc_funcs
+ffffffff82db6528 r gfx_v10_0_rlc_funcs_sriov
+ffffffff82db6590 r gfx10_cs_data
+ffffffff82db65b0 r gfx10_SECT_CONTEXT_defs
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+ffffffff82db69a0 r gfx10_SECT_CONTEXT_def_3
+ffffffff82db69b0 r gfx10_SECT_CONTEXT_def_4
+ffffffff82db6c28 r gfx10_SECT_CONTEXT_def_5
+ffffffff82db6c30 r gfx10_SECT_CONTEXT_def_6
+ffffffff82db6c40 r gfx10_SECT_CONTEXT_def_2
+ffffffff82db7080 r gfx10_SECT_CONTEXT_def_7
+ffffffff82db7190 r gfx10_SECT_CONTEXT_def_8
+ffffffff82db74c0 r golden_settings_gc_10_1
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+ffffffff82db7880 r golden_settings_gc_10_1_1
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+ffffffff82db7c10 r golden_settings_gc_10_1_nv14
+ffffffff82db8000 r golden_settings_gc_10_1_2_nv12
+ffffffff82db8000 r golden_settings_gc_10_3
+ffffffff82db8408 r golden_settings_gc_10_3_sienna_cichlid
+ffffffff82db8410 r golden_settings_gc_10_3_2
+ffffffff82db8800 r golden_settings_gc_10_3_vangogh
+ffffffff82db8a60 r golden_settings_gc_10_3_3
+ffffffff82db8c40 r golden_settings_gc_10_3_4
+ffffffff82db8fa0 r golden_settings_gc_10_3_5
+ffffffff82db92a0 r golden_settings_gc_10_0_cyan_skillfish
+ffffffff82db95d0 r golden_settings_gc_10_3_6
+ffffffff82db97e0 r golden_settings_gc_10_3_7
+ffffffff82dba000 r gfx_v11_0_ip_funcs
+ffffffff82dba0a8 R gfx_v11_0_ip_block
+ffffffff82dba0c0 r gfx_v11_0_gfx_funcs
+ffffffff82dba120 r gfx_v11_0_kiq_pm4_funcs
+ffffffff82dba160 r gfx_v11_0_ring_funcs_kiq
+ffffffff82dba2a0 r gfx_v11_0_ring_funcs_gfx
+ffffffff82dba3e0 r gfx_v11_0_ring_funcs_compute
+ffffffff82dba520 r gfx_v11_0_eop_irq_funcs
+ffffffff82dba530 r gfx_v11_0_priv_reg_irq_funcs
+ffffffff82dba540 r gfx_v11_0_priv_inst_irq_funcs
+ffffffff82dba550 r gfx_v11_0_rlc_gc_fed_irq_funcs
+ffffffff82dba560 r gfx_v11_0_rlc_funcs
+ffffffff82dba5d0 r gfx11_cs_data
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+ffffffff82dba670 r gfx11_SECT_CONTEXT_def_1
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+ffffffff82dba9e8 r gfx11_SECT_CONTEXT_def_6
+ffffffff82dba9f0 r gfx11_SECT_CONTEXT_def_2
+ffffffff82dbae30 r gfx11_SECT_CONTEXT_def_4
+ffffffff82dbb0b0 r gfx11_SECT_CONTEXT_def_7
+ffffffff82dbb520 r golden_settings_gc_11_0_1
+ffffffff82dbb600 r golden_settings_gc_11_0
+ffffffff82dbc000 r gfx_v8_0_ip_funcs
+ffffffff82dbc0a8 R gfx_v8_0_ip_block
+ffffffff82dbc0c0 R gfx_v8_1_ip_block
+ffffffff82dbc0d8 r gfx_v8_0_gfx_funcs
+ffffffff82dbc138 r gfx_v8_0_ring_funcs_kiq
+ffffffff82dbc278 r gfx_v8_0_ring_funcs_gfx
+ffffffff82dbc3b8 r gfx_v8_0_ring_funcs_compute
+ffffffff82dbc500 r amdgpu_gds_reg_offset
+ffffffff82dbc600 r gfx_v8_0_eop_irq_funcs
+ffffffff82dbc610 r gfx_v8_0_priv_reg_irq_funcs
+ffffffff82dbc620 r gfx_v8_0_priv_inst_irq_funcs
+ffffffff82dbc630 r gfx_v8_0_cp_ecc_error_irq_funcs
+ffffffff82dbc640 r gfx_v8_0_sq_irq_funcs
+ffffffff82dbc650 r sq_edc_source_names
+ffffffff82dbc688 r iceland_rlc_funcs
+ffffffff82dbc6f0 r vi_cs_data
+ffffffff82dbc710 r vi_SECT_CONTEXT_defs
+ffffffff82dbc790 r vi_SECT_CONTEXT_def_1
+ffffffff82dbcae0 r vi_SECT_CONTEXT_def_3
+ffffffff82dbcb00 r vi_SECT_CONTEXT_def_4
+ffffffff82dbcd74 r vi_SECT_CONTEXT_def_5
+ffffffff82dbcd7c r vi_SECT_CONTEXT_def_6
+ffffffff82dbcd80 r vi_SECT_CONTEXT_def_2
+ffffffff82dbd1d0 r vi_SECT_CONTEXT_def_7
+ffffffff82dbd580 r vgpr_init_compute_shader
+ffffffff82dbd690 r vgpr_init_regs
+ffffffff82dbd720 r sgpr1_init_regs
+ffffffff82dbd7b0 r sgpr2_init_regs
+ffffffff82dbd840 r sec_ded_counter_registers
+ffffffff82dbd8b0 r iceland_mgcg_cgcg_init
+ffffffff82dbdbb0 r golden_settings_iceland_a11
+ffffffff82dbdc70 r iceland_golden_common_all
+ffffffff82dbdcd0 r fiji_mgcg_cgcg_init
+ffffffff82dbde80 r golden_settings_fiji_a10
+ffffffff82dbdf10 r fiji_golden_common_all
+ffffffff82dbdf90 r tonga_mgcg_cgcg_init
+ffffffff82dbe320 r golden_settings_tonga_a11
+ffffffff82dbe3e0 r tonga_golden_common_all
+ffffffff82dbe440 r golden_settings_vegam_a11
+ffffffff82dbe510 r vegam_golden_common_all
+ffffffff82dbe560 r golden_settings_polaris11_a11
+ffffffff82dbe630 r polaris11_golden_common_all
+ffffffff82dbe680 r golden_settings_polaris10_a11
+ffffffff82dbe750 r polaris10_golden_common_all
+ffffffff82dbe7b0 r cz_mgcg_cgcg_init
+ffffffff82dbeb40 r cz_golden_settings_a11
+ffffffff82dbebd0 r cz_golden_common_all
+ffffffff82dbec30 r stoney_mgcg_cgcg_init
+ffffffff82dbec70 r stoney_golden_settings_a11
+ffffffff82dbecf0 r stoney_golden_common_all
+ffffffff82dbf000 R gfx_v9_0_ras_ops
+ffffffff82dbf040 r gfx_v9_0_ip_funcs
+ffffffff82dbf0e8 R gfx_v9_0_ip_block
+ffffffff82dbf100 r ras_gfx_subblocks
+ffffffff82dbfb80 r gfx_v9_0_edc_counter_regs
+ffffffff82dbff20 r gfx_v9_0_ras_fields
+ffffffff82dc1000 r gfx_v9_0_gfx_funcs
+ffffffff82dc1060 r gfx_v9_0_kiq_pm4_funcs
+ffffffff82dc10a0 r gfx_v9_0_ring_funcs_kiq
+ffffffff82dc11e0 r gfx_v9_0_ring_funcs_gfx
+ffffffff82dc1320 r gfx_v9_0_sw_ring_funcs_gfx
+ffffffff82dc1460 r gfx_v9_0_ring_funcs_compute
+ffffffff82dc15a0 r gfx_v9_0_eop_irq_funcs
+ffffffff82dc15b0 r gfx_v9_0_priv_reg_irq_funcs
+ffffffff82dc15c0 r gfx_v9_0_priv_inst_irq_funcs
+ffffffff82dc15d0 r gfx_v9_0_cp_ecc_error_irq_funcs
+ffffffff82dc15e0 r gfx_v9_0_rlc_funcs
+ffffffff82dc1650 r gfx9_cs_data
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+ffffffff82dc1a60 r gfx9_SECT_CONTEXT_def_4
+ffffffff82dc1cd4 r gfx9_SECT_CONTEXT_def_5
+ffffffff82dc1cdc r gfx9_SECT_CONTEXT_def_6
+ffffffff82dc1ce0 r gfx9_SECT_CONTEXT_def_7
+ffffffff82dc1df0 r gfx9_SECT_CONTEXT_def_2
+ffffffff82dc2260 r gfx9_SECT_CONTEXT_def_8
+ffffffff82dc24d0 r vgpr_init_compute_shader_arcturus
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+ffffffff82dc33a0 r golden_settings_gc_9_0
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+ffffffff82dc3730 r golden_settings_gc_9_2_1
+ffffffff82dc38b0 r golden_settings_gc_9_2_1_vg12
+ffffffff82dc39f0 r golden_settings_gc_9_0_vg20
+ffffffff82dc3b00 r golden_settings_gc_9_4_1_arct
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+ffffffff82dc4020 r golden_settings_gc_9_1_rv1
+ffffffff82dc40d0 r golden_settings_gc_9_1_rn
+ffffffff82dc41f0 r golden_settings_gc_9_x_common
+ffffffff82dc5000 R gfx_v9_4_ras_ops
+ffffffff82dc5040 r gfx_v9_4_edc_counter_regs
+ffffffff82dc5420 r gfx_v9_4_ras_fields
+ffffffff82dc7000 R vgpr_init_regs_aldebaran
+ffffffff82dc71b0 R sgpr112_init_regs_aldebaran
+ffffffff82dc7360 R sgpr96_init_regs_aldebaran
+ffffffff82dc7510 R sgpr64_init_regs_aldebaran
+ffffffff82dc76c0 r golden_settings_gc_9_4_2_alde
+ffffffff82dc7720 r golden_settings_gc_9_4_2_alde_die_0
+ffffffff82dc77b0 r golden_settings_gc_9_4_2_alde_die_1
+ffffffff82dc7840 r sgpr112_init_compute_shader_aldebaran
+ffffffff82dc7a60 r sgpr96_init_compute_shader_aldebaran
+ffffffff82dc7c50 r sgpr64_init_compute_shader_aldebaran
+ffffffff82dc7dc0 r vgpr_init_compute_shader_aldebaran
+ffffffff82dc86a0 r gfx_v9_4_2_edc_counter_regs
+ffffffff82dc8a20 r gfx_v9_4_2_ras_fields
+ffffffff82dca3c0 r gfx_v9_4_2_utc_blocks
+ffffffff82dcb000 r gfx_v9_4_3_ip_funcs
+ffffffff82dcb0a8 R gfx_v9_4_3_ip_block
+ffffffff82dcb0c0 r gfx_v9_4_3_kiq_pm4_funcs
+ffffffff82dcb100 r gfx_v9_4_3_ring_funcs_kiq
+ffffffff82dcb240 r gfx_v9_4_3_ring_funcs_compute
+ffffffff82dcb380 r gfx_v9_4_3_eop_irq_funcs
+ffffffff82dcb390 r gfx_v9_4_3_priv_reg_irq_funcs
+ffffffff82dcb3a0 r gfx_v9_4_3_priv_inst_irq_funcs
+ffffffff82dcb3b0 r gfx_v9_4_3_rlc_funcs
+ffffffff82dcb418 r gfx_v9_4_3_gfx_funcs
+ffffffff82dcb480 r gfx_v9_4_3_ce_reg_list
+ffffffff82dcb810 r gfx_v9_4_3_ras_mem_list_array
+ffffffff82dcb970 r gfx_v9_4_3_ue_reg_list
+ffffffff82dcbd30 r gfx_v9_4_3_ras_cp_mem_list
+ffffffff82dcbd80 r gfx_v9_4_3_ras_gcea_mem_list
+ffffffff82dcbec0 r gfx_v9_4_3_ras_gc_cane_mem_list
+ffffffff82dcbed0 r gfx_v9_4_3_ras_gcutcl2_mem_list
+ffffffff82dcbee0 r gfx_v9_4_3_ras_gds_mem_list
+ffffffff82dcbef0 r gfx_v9_4_3_ras_lds_mem_list
+ffffffff82dcc110 r gfx_v9_4_3_ras_rlc_mem_list
+ffffffff82dcc190 r gfx_v9_4_3_ras_sp_mem_list
+ffffffff82dcc1a0 r gfx_v9_4_3_ras_spi_mem_list
+ffffffff82dcc1e0 r gfx_v9_4_3_ras_sqc_mem_list
+ffffffff82dcc350 r gfx_v9_4_3_ras_sq_mem_list
+ffffffff82dcc390 r gfx_v9_4_3_ras_ta_mem_list
+ffffffff82dcc3e0 r gfx_v9_4_3_ras_tcc_mem_list
+ffffffff82dcc3f0 r gfx_v9_4_3_ras_tca_mem_list
+ffffffff82dcc400 r gfx_v9_4_3_ras_tci_mem_list
+ffffffff82dcc410 r gfx_v9_4_3_ras_tcp_mem_list
+ffffffff82dcc5a0 r gfx_v9_4_3_ras_td_mem_list
+ffffffff82dcc5d0 r gfx_v9_4_3_ras_tcx_mem_list
+ffffffff82dccb50 r gfx_v9_4_3_ras_atc_l2_mem_list
+ffffffff82dccb60 r gfx_v9_4_3_ras_utcl2_mem_list
+ffffffff82dccb70 r gfx_v9_4_3_ras_vml2_mem_list
+ffffffff82dccb80 r gfx_v9_4_3_ras_vml2_walker_mem_list
+ffffffff82dcd000 R gfxhub_v1_0_funcs
+ffffffff82dce000 R gfxhub_v1_2_funcs
+ffffffff82dcf000 R gfxhub_v2_0_funcs
+ffffffff82dcf060 r gfxhub_v2_0_vmhub_funcs
 ffffffff82dcf070 r gfxhub_client_ids
-ffffffff82dd0000 R gfxhub_v3_0_funcs
-ffffffff82dd0060 r gfxhub_v3_0_vmhub_funcs
+ffffffff82dd0000 R gfxhub_v2_1_funcs
+ffffffff82dd0060 r gfxhub_v2_1_vmhub_funcs
 ffffffff82dd0070 r gfxhub_client_ids
-ffffffff82dd1000 R gfxhub_v3_0_3_funcs
-ffffffff82dd1060 r gfxhub_v3_0_3_vmhub_funcs
+ffffffff82dd1000 R gfxhub_v3_0_funcs
+ffffffff82dd1060 r gfxhub_v3_0_vmhub_funcs
 ffffffff82dd1070 r gfxhub_client_ids
-ffffffff82dd2000 R gmc_v10_0_ip_funcs
-ffffffff82dd20a8 R gmc_v10_0_ip_block
-ffffffff82dd20c0 r gmc_v10_0_gmc_funcs
-ffffffff82dd2118 r gmc_v10_0_irq_funcs
-ffffffff82dd2128 r gmc_v10_0_ecc_funcs
-ffffffff82dd3000 R gmc_v11_0_ip_funcs
-ffffffff82dd30a8 R gmc_v11_0_ip_block
-ffffffff82dd30c0 r gmc_v11_0_gmc_funcs
-ffffffff82dd3118 r gmc_v11_0_irq_funcs
-ffffffff82dd3128 r gmc_v11_0_ecc_funcs
-ffffffff82dd4000 r gmc_v7_0_ip_funcs
-ffffffff82dd40a8 R gmc_v7_0_ip_block
-ffffffff82dd40c0 R gmc_v7_4_ip_block
-ffffffff82dd40d8 r gmc_v7_0_gmc_funcs
-ffffffff82dd4130 r gmc_v7_0_irq_funcs
-ffffffff82dd4140 r iceland_mgcg_cgcg_init
-ffffffff82dd4150 r golden_settings_iceland_a11
-ffffffff82dd4180 r mc_cg_registers
-ffffffff82dd41b0 r mc_cg_en
-ffffffff82dd41e0 r mc_cg_ls_en
-ffffffff82dd5000 r gmc_v8_0_ip_funcs
-ffffffff82dd50a8 R gmc_v8_0_ip_block
-ffffffff82dd50c0 R gmc_v8_1_ip_block
-ffffffff82dd50d8 R gmc_v8_5_ip_block
-ffffffff82dd50f0 r gmc_v8_0_gmc_funcs
-ffffffff82dd5148 r gmc_v8_0_irq_funcs
-ffffffff82dd5158 r fiji_mgcg_cgcg_init
-ffffffff82dd5170 r golden_settings_fiji_a10
-ffffffff82dd51a0 r tonga_mgcg_cgcg_init
-ffffffff82dd51b0 r golden_settings_tonga_a11
-ffffffff82dd5210 r golden_settings_polaris11_a11
-ffffffff82dd5240 r golden_settings_polaris10_a11
-ffffffff82dd527c r cz_mgcg_cgcg_init
-ffffffff82dd5290 r stoney_mgcg_cgcg_init
-ffffffff82dd52b0 r golden_settings_stoney_common
-ffffffff82dd6000 R gmc_v9_0_ip_funcs
-ffffffff82dd60a8 R gmc_v9_0_ip_block
-ffffffff82dd60c0 r gmc_v9_0_gmc_funcs
-ffffffff82dd6118 r gmc_v9_0_irq_funcs
-ffffffff82dd6128 r gmc_v9_0_ecc_funcs
-ffffffff82dd6140 r gfxhub_client_ids
-ffffffff82dd61b0 r mmhub_client_ids_vega10
-ffffffff82dd64a0 r mmhub_client_ids_vega12
-ffffffff82dd67a0 r mmhub_client_ids_vega20
-ffffffff82dd6a90 r mmhub_client_ids_arcturus
-ffffffff82dd82a0 r mmhub_client_ids_raven
-ffffffff82dd8460 r mmhub_client_ids_renoir
-ffffffff82dd8650 r mmhub_client_ids_aldebaran
-ffffffff82dd9e60 r ecc_umc_mcumc_ctrl_addrs
-ffffffff82dd9ee0 r ecc_umc_mcumc_ctrl_mask_addrs
-ffffffff82dd9f60 r golden_settings_mmhub_1_0_0
-ffffffff82dd9f90 r golden_settings_athub_1_0_0
-ffffffff82dda000 R hdp_v4_0_funcs
-ffffffff82ddb000 R hdp_v5_0_funcs
-ffffffff82ddc000 R hdp_v5_2_funcs
-ffffffff82ddd000 R hdp_v6_0_funcs
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+ffffffff82e1f180 r soc21_allowed_read_registers
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+ffffffff82e1f310 r vcn_4_0_0_video_codecs_decode_vcn1
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+ffffffff82e27000 r uvd_v6_0_ip_funcs
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+ffffffff82e270d8 R uvd_v6_3_ip_block
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+ffffffff82e280a8 R uvd_v7_0_ip_block
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+ffffffff82e28200 r uvd_v7_0_enc_ring_vm_funcs
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+ffffffff82e2a200 r vce_v4_0_irq_funcs
+ffffffff82e2b000 r vcn_v1_0_ip_funcs
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 ffffffff82e4807c r disp_clk_shift
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 ffffffff82e4d060 r clk_mgr_mask
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 ffffffff82e4f000 r lpddr5_wm_table
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-ffffffff82e6f120 r dvmm_Hw_Setting_2DTiling
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-ffffffff82f49000 R dcn10_soc_defaults
-ffffffff82f4908c R dcn10_ip_defaults
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+ffffffff82f4a08c R dcn10_ip_defaults
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-ffffffff82fa7000 R dmub_srv_dcn21_regs
-ffffffff82fa8000 R dmub_srv_dcn30_regs
-ffffffff82fa9000 R dmub_srv_dcn301_regs
-ffffffff82faa000 R dmub_srv_dcn302_regs
-ffffffff82fab000 R dmub_srv_dcn303_regs
-ffffffff82fac000 R dmub_srv_dcn31_regs
-ffffffff82fad000 R dmub_srv_dcn314_regs
-ffffffff82fae000 R dmub_srv_dcn315_regs
-ffffffff82faf000 R dmub_srv_dcn316_regs
-ffffffff82fb0000 R dmub_srv_dcn32_regs
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-ffffffff82fb8000 r pp_ip_funcs
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-ffffffff8304d030 r charClass
-ffffffff8304e000 r usl_syncops
-ffffffff8304f000 R wsevent_filtops
-ffffffff83050000 R wskbd_ca
-ffffffff83051000 r latin1_to_upper
-ffffffff83052000 R wsmouse_ca
-ffffffff83053000 R cyrillic_to_koi8
-ffffffff83053060 R unicode_to_latin2
-ffffffff830530e0 R unicode_to_latin7
-ffffffff83054000 R wsemul_vt100_ops
-ffffffff83055000 r decspcgr2uni
-ffffffff83055100 r dectech2uni
-ffffffff83055200 r nrctable
-ffffffff83056000 r vt100_fkeys
-ffffffff830560c0 r vt100_pfkeys
-ffffffff830560e0 r vt100_numpad
-ffffffff83057000 R pckbd_ca
-ffffffff83057028 R pckbd_accessops
-ffffffff83057040 R pckbd_consops
-ffffffff83057060 R pckbd_keymapdata
-ffffffff83057070 R pckbd_xtbl2
-ffffffff83057100 R pckbd_xtbl2_ext
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-ffffffff83058310 r pckbd_keydesc_fr
-ffffffff830583d0 r pckbd_keydesc_fr_dvorak_bepo
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-ffffffff83058900 r pckbd_keydesc_us_colemak
-ffffffff83058948 r pckbd_keydesc_swapctrlcaps
-ffffffff83058960 r pckbd_keydesc_iopener
-ffffffff830589b0 r pckbd_keydesc_es
-ffffffff83058a50 r pckbd_keydesc_be
-ffffffff83058b10 r pckbd_keydesc_ru
-ffffffff83058c80 r pckbd_keydesc_ua
-ffffffff83058e10 r pckbd_keydesc_sg
-ffffffff83058ec0 r pckbd_keydesc_sg_nodead
-ffffffff83058ee0 r pckbd_keydesc_sf
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-ffffffff83059250 r pckbd_keydesc_pl
-ffffffff830592b0 r pckbd_keydesc_hu
-ffffffff830593c0 r pckbd_keydesc_si
-ffffffff830594d0 r pckbd_keydesc_cf
-ffffffff830595a0 r pckbd_keydesc_cf_nodead
-ffffffff830595c0 r pckbd_keydesc_lv
-ffffffff83059640 r pckbd_keydesc_nl
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-ffffffff83059740 r pckbd_keydesc_is
-ffffffff830597cc r pckbd_keydesc_is_nodead
-ffffffff830597e0 r pckbd_keydesc_ee
-ffffffff83059890 r pckbd_keydesc_ee_nodead
-ffffffff830598b0 R pckbd_keydesctab
-ffffffff8305a000 R pms_ca
-ffffffff8305a028 R pms_accessops
-ffffffff8305a040 R pms_sec_accessops
-ffffffff8305a060 R pms_protocols
-ffffffff8305a1e0 r alps_models
-ffffffff8305b000 R skgpio_led_offset
-ffffffff8305b008 R skgpio_ca
-ffffffff8305c000 R hidkbd_trtab
-ffffffff8305c100 r apple_fn_trans
-ffffffff8305c120 r apple_tb_trans
-ffffffff8305c140 r apple_mba_trans
-ffffffff8305d000 r hidcc_attach_wskbd.accessops
-ffffffff8305d020 r hidcc_keysyms
-ffffffff8305e000 R usb_ca
-ffffffff8305f000 R usb_known_products
-ffffffff8306b050 R usb_known_vendors
-ffffffff8306d880 R usbd_error_strs
-ffffffff8306e000 R usb_quirks
-ffffffff8306e3d8 R usb_dev_quirks
-ffffffff8306e3e0 R usbd_no_quirk
-ffffffff8306f000 R uhub_ca
-ffffffff8306f028 R uhub_uhub_ca
-ffffffff83070000 R uaudio_ca
-ffffffff83070028 R uaudio_hw_if
-ffffffff830700e0 R uaudio_rates
-ffffffff83070120 r uaudio_clkname.names
-ffffffff83070140 r uaudio_feature_addent.features
-ffffffff83071000 R uvideo_ca
-ffffffff83071028 R uvideo_hw_if
-ffffffff83071100 R uvideo_devs
-ffffffff83072000 r utvfu_select_norm.pal
-ffffffff83072040 r utvfu_select_norm.ntsc
-ffffffff83072080 r utvfu_setup_capture.setup
-ffffffff83072180 r utvfu_audio_start_chip.setup
-ffffffff830721c8 r utvfu_audio_stop_chip.setup
-ffffffff830721d8 R utvfu_ca
-ffffffff83072200 R utvfu_vid_hw_if
-ffffffff830722d0 R utvfu_au_hw_if
-ffffffff83073000 R udl_ca
-ffffffff83073030 r udl_devs
-ffffffff830730b0 r udl_modes
-ffffffff83074000 R umidi_hw_if
-ffffffff83074030 R umidi_ca
-ffffffff83074060 r umidi_evlen
-ffffffff83074080 r packet_length
-ffffffff83075000 r quirk_name
-ffffffff83076000 R ucom_ca
-ffffffff83077000 R ugen_ca
-ffffffff83077028 R ugenread_intr_filtops
-ffffffff83077058 R ugenread_isoc_filtops
-ffffffff83078000 R uhidev_ca
-ffffffff83078030 r uhid_graphire_report_descr
-ffffffff830780b0 r uhid_graphire3_4x5_report_descr
-ffffffff83078160 r uhid_xb360gp_report_descr
-ffffffff83078210 r uhid_xbonegp_report_descr
-ffffffff83079000 R uhid_ca
-ffffffff83079028 R uhidread_filtops
-ffffffff8307a000 R fido_ca
-ffffffff8307b000 R ujoy_ca
-ffffffff8307c000 r ukbd_keydesc_us
-ffffffff8307c2a0 r ukbd_keydesc_de
-ffffffff8307c350 r ukbd_keydesc_de_nodead
-ffffffff8307c370 r ukbd_keydesc_fr
-ffffffff8307c430 r ukbd_keydesc_fr_apple
-ffffffff8307c570 r ukbd_keydesc_fr_dvorak_bepo
-ffffffff8307c6b0 r ukbd_keydesc_dk
-ffffffff8307c750 r ukbd_keydesc_dk_nodead
-ffffffff8307c760 r ukbd_keydesc_it
-ffffffff8307c800 r ukbd_keydesc_uk
-ffffffff8307c8b0 r ukbd_keydesc_jp
-ffffffff8307c920 r ukbd_keydesc_sv
-ffffffff8307c950 r ukbd_keydesc_sv_nodead
-ffffffff8307c960 r ukbd_keydesc_no
-ffffffff8307c990 r ukbd_keydesc_no_nodead
-ffffffff8307c9a0 r ukbd_keydesc_us_dvorak
-ffffffff8307ca40 r ukbd_keydesc_us_colemak
-ffffffff8307ca88 r ukbd_keydesc_swapctrlcaps
-ffffffff8307caa0 r ukbd_keydesc_iopener
-ffffffff8307caf0 r ukbd_keydesc_es
-ffffffff8307cb90 r ukbd_keydesc_be
-ffffffff8307cc50 r ukbd_keydesc_ru
-ffffffff8307cdc0 r ukbd_keydesc_ua
-ffffffff8307cf60 r ukbd_keydesc_sg
-ffffffff8307d020 r ukbd_keydesc_sg_nodead
-ffffffff8307d040 r ukbd_keydesc_sf
-ffffffff8307d060 r ukbd_keydesc_pt
-ffffffff8307d0f0 r ukbd_keydesc_pt_apple
-ffffffff8307d110 r ukbd_keydesc_lt
-ffffffff8307d1f0 r ukbd_keydesc_la
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-ffffffff8307d320 r ukbd_keydesc_tr
-ffffffff8307d3e0 r ukbd_keydesc_tr_nodead
-ffffffff8307d400 r ukbd_keydesc_pl
-ffffffff8307d460 r ukbd_keydesc_hu
-ffffffff8307d570 r ukbd_keydesc_si
-ffffffff8307d690 r ukbd_keydesc_cf
-ffffffff8307d770 r ukbd_keydesc_cf_nodead
-ffffffff8307d790 r ukbd_keydesc_lv
-ffffffff8307d810 r ukbd_keydesc_nl
-ffffffff8307d8f0 r ukbd_keydesc_nl_nodead
-ffffffff8307d910 r ukbd_keydesc_is
-ffffffff8307d9a4 r ukbd_keydesc_is_nodead
-ffffffff8307d9b0 r ukbd_keydesc_ee
-ffffffff8307da60 r ukbd_keydesc_ee_nodead
-ffffffff8307da80 R ukbd_keydesctab
-ffffffff8307e000 R ukbd_countrylayout
-ffffffff8307e090 R ukbd_consops
-ffffffff8307e0b0 R ukbd_accessops
-ffffffff8307e0c8 R ukbd_ca
-ffffffff8307e0f0 R ukbd_never_console
-ffffffff8307f000 R ums_accessops
-ffffffff8307f018 R ums_ca
-ffffffff83080000 R umt_accessops
-ffffffff83080018 R umt_ca
-ffffffff83081000 R uts_devs
-ffffffff83081010 R uts_accessops
-ffffffff83081028 R uts_ca
-ffffffff83082000 R ubcmtp_accessops
-ffffffff83082018 R ubcmtp_ca
-ffffffff83082040 r ubcmtp_devices
-ffffffff83083000 R ucycom_methods
-ffffffff83083040 R ucycom_devs
-ffffffff83083050 R ucycom_ca
-ffffffff83084000 R uslhcom_methods
-ffffffff83084040 R uslhcom_ca
-ffffffff83084068 r uslhcom_devs
-ffffffff83085000 R ulpt_ca
-ffffffff83086000 R umass_ca
-ffffffff83086028 R umass_bbb_methods
-ffffffff83086040 R umass_cbi_methods
-ffffffff83087000 R umass_quirks
-ffffffff83088000 R umass_scsi_switch
-ffffffff83089000 R uthum_devs
-ffffffff83089008 R uthum_ca
-ffffffff83089030 r uthum_sensor_type_s
-ffffffff8308a000 R ugold_devs
-ffffffff8308a018 R ugold_ca
-ffffffff8308b000 R utrh_devs
-ffffffff8308b008 R utrh_ca
-ffffffff8308c000 R uoakrh_devs
-ffffffff8308c008 R uoakrh_ca
-ffffffff8308c030 R uoakrh_methods
-ffffffff8308d000 R uoaklux_devs
-ffffffff8308d008 R uoaklux_ca
-ffffffff8308d030 R uoaklux_methods
-ffffffff8308e000 R uoakv_devs
-ffffffff8308e008 R uoakv_ca
-ffffffff8308e030 R uoakv_methods
-ffffffff8308f000 R uonerng_ca
-ffffffff83090000 R urng_ca
-ffffffff83090030 r urng_devs
-ffffffff83091000 R udcf_ca
-ffffffff83091028 r udcf_devs
-ffffffff83092000 R umbg_ca
-ffffffff83093000 R uvisor_methods
-ffffffff83093040 R uvisor_ca
-ffffffff83093070 r uvisor_devs
-ffffffff83094000 R udsbr_hw_if
-ffffffff83094028 R udsbr_ca
-ffffffff83095000 R utwitch_devs
-ffffffff83095008 R utwitch_ca
-ffffffff83096000 R aue_devs
-ffffffff830961b0 R aue_ca
-ffffffff83097000 R axe_devs
-ffffffff830970d0 R axe_ca
-ffffffff83098000 R axen_devs
-ffffffff83098020 R axen_ca
-ffffffff83099000 R smsc_ca
-ffffffff83099030 r smsc_devs
-ffffffff8309a000 R cue_ca
-ffffffff8309b000 R kue_devs
-ffffffff8309b088 R kue_ca
-ffffffff8309c000 R cdce_devs
-ffffffff8309c048 R cdce_ca
-ffffffff8309d000 R urndis_ca
-ffffffff8309d030 R urndis_class
-ffffffff8309e000 R mos_devs
-ffffffff8309e018 R mos_ca
-ffffffff8309f000 R mue_devs
-ffffffff8309f020 R mue_ca
-ffffffff830a0000 R udav_ca
-ffffffff830a0030 r udav_devs
-ffffffff830a1000 R upl_ca
-ffffffff830a2000 R ugl_ca
-ffffffff830a3000 R url_ca
-ffffffff830a3030 r url_devs
-ffffffff830a4000 R ure_devs
-ffffffff830a40e8 R ure_ca
-ffffffff830a5000 R uaq_devs
-ffffffff830a5018 R uaq_ca
-ffffffff830a6000 R umodem_methods
-ffffffff830a6040 R umodem_ca
-ffffffff830a7000 R uftdi_methods
-ffffffff830a7040 R uftdi_ca
-ffffffff830a7070 r uftdi_devs
-ffffffff830a8000 R uplcom_methods
-ffffffff830a8040 R uplcom_ca
-ffffffff830a8070 r uplcom_devs
-ffffffff830a9000 R umct_methods
-ffffffff830a9040 R umct_ca
-ffffffff830a9070 r umct_devs
-ffffffff830aa000 R uvscom_methods
-ffffffff830aa040 R uvscom_ca
-ffffffff830aa070 r uvscom_devs
-ffffffff830ab000 R ubsa_methods
-ffffffff830ab040 R ubsa_devs
-ffffffff830ab060 R ubsa_ca
-ffffffff830ac000 R ukspan_ca
-ffffffff830ac028 r ukspan_devs
-ffffffff830ac030 r ukspan_methods
-ffffffff830ad000 R uslcom_methods
-ffffffff830ad040 R uslcom_ca
-ffffffff830ad070 r uslcom_devs
-ffffffff830ae000 R uark_methods
-ffffffff830ae040 R uark_ca
-ffffffff830ae068 r uark_devs
-ffffffff830af000 R moscom_methods
-ffffffff830af040 R moscom_ca
-ffffffff830af068 r moscom_devs
-ffffffff830b0000 R umcs_methods
-ffffffff830b0040 R umcs_devs
-ffffffff830b0050 R umcs_ca
-ffffffff830b1000 R uscom_methods
-ffffffff830b1040 R uscom_ca
-ffffffff830b1068 r uscom_devs
-ffffffff830b2000 R ucrcom_methods
-ffffffff830b2040 R ucrcom_ca
-ffffffff830b3000 R uxrcom_methods
-ffffffff830b3040 R uxrcom_ca
-ffffffff830b3068 r uxrcom_devs
-ffffffff830b4000 R uipaq_methods
-ffffffff830b4040 R uipaq_ca
-ffffffff830b4070 r uipaq_devs
-ffffffff830b5000 R umsm_methods
-ffffffff830b5040 R umsm_ca
-ffffffff830b5070 r umsm_devs
-ffffffff830b6000 R uchcom_methods
-ffffffff830b6040 R uchcom_ca
-ffffffff830b6070 r uchcom_devs
-ffffffff830b6090 r dividers
-ffffffff830b7000 R uticom_methods
-ffffffff830b7040 R uticom_ca
-ffffffff830b7070 r uticom_devs
-ffffffff830b8000 R wi_usb_devs
-ffffffff830b80f0 R wi_usb_ca
-ffffffff830b9000 R atu_ca
-ffffffff830ba000 R ural_ca
-ffffffff830ba030 r ural_devs
-ffffffff830ba0a0 r ural_rf2522_r2
-ffffffff830ba0e0 r ural_rf2524_r2
-ffffffff830ba120 r ural_rf2525_hi_r2
-ffffffff830ba160 r ural_rf2525_r2
-ffffffff830ba1a0 r ural_rf2525e_r2
-ffffffff830ba1e0 r ural_rf2526_hi_r2
-ffffffff830ba220 r ural_rf2526_r2
-ffffffff830ba260 r ural_def_bbp
-ffffffff830ba2a0 r ural_def_mac
-ffffffff830bb000 R rum_ca
-ffffffff830bb030 r rum_devs
-ffffffff830bb110 r rum_rf5225
-ffffffff830bb460 r rum_rf5226
-ffffffff830bb7b0 r rum_def_bbp
-ffffffff830bb7f0 r rum_def_mac
-ffffffff830bc000 R run_ca
-ffffffff830bc030 r run_devs
-ffffffff830bc430 r rt2860_rf2850
-ffffffff830bc860 r rt2860_rates
-ffffffff830bc920 r rt5592_freqs_40mhz
-ffffffff830bca60 r rt5592_freqs_20mhz
-ffffffff830bcba0 r rt5592_2ghz_def_rf
-ffffffff830bcbe0 r rt5592_chan_5ghz
-ffffffff830bce30 r rt5592_def_bbp
-ffffffff830bce70 r rt5592_bbp_r196
-ffffffff830bced0 r rt5390_def_bbp
-ffffffff830bcf00 r rt3572_def_rf
-ffffffff830bcf40 r rt3070_def_rf
-ffffffff830bcf70 r rt3593_def_rf
-ffffffff830bcfb0 r rt5592_def_rf
-ffffffff830bcfe0 r rt5392_def_rf
-ffffffff830bd060 r rt5390_def_rf
-ffffffff830bd0e0 r rt2870_def_mac
-ffffffff830be000 R mtw_ca
-ffffffff830be030 r mtw_devs
-ffffffff830be070 r rt2860_rates
-ffffffff830be130 r mt7601_rf_chan
-ffffffff830be1a0 r mt7601_def_bbp
-ffffffff830be2d0 r mt7601_rf_bank0
-ffffffff830be330 r mt7601_rf_bank4
-ffffffff830be3b0 r mt7601_rf_bank5
-ffffffff830be430 r mt7601_def_mac
-ffffffff830bf000 R zyd_ca
-ffffffff830bf030 r zyd_devs
-ffffffff830bf1b0 r zyd_rfmd_init.phyini
-ffffffff830bf2e0 r zyd_rfmd_init.rfini
-ffffffff830bf330 r zyd_rfmd_set_channel.rfprog
-ffffffff830bf3a0 r zyd_al2230_init.phyini
-ffffffff830bf480 r zyd_al2230_init.rfini
-ffffffff830bf4e0 r zyd_al2230_init_b.phyini
-ffffffff830bf5d0 r zyd_al2230_init_b.rfini
-ffffffff830bf620 r zyd_al2230_set_channel.rfprog
-ffffffff830bf6d0 r zyd_al7230B_init.phyini_1
-ffffffff830bf7b0 r zyd_al7230B_init.rfini_1
-ffffffff830bf7f0 r zyd_al7230B_set_channel.rfprog
-ffffffff830bf860 r zyd_al7230B_set_channel.rfsc
-ffffffff830bf890 r zyd_al2210_init.phyini
-ffffffff830bf8f0 r zyd_al2210_init.rfini
-ffffffff830bf920 r zyd_al2210_set_channel.rfprog
-ffffffff830bf960 r zyd_gct_init.phyini
-ffffffff830bf9b0 r zyd_gct_init.rfini
-ffffffff830bfa50 r zyd_gct_set_channel.rfprog
-ffffffff830bfa90 r zyd_maxim_set_channel.phyini
-ffffffff830bfba0 r zyd_maxim_set_channel.rfini
-ffffffff830bfbe0 r zyd_maxim_set_channel.rfprog
-ffffffff830bfc50 r zyd_maxim2_set_channel.phyini
-ffffffff830bfd70 r zyd_maxim2_set_channel.rfini
-ffffffff830bfdb0 r zyd_maxim2_set_channel.rfprog
-ffffffff830bfe20 r zyd_rf_name.zyd_rfs
-ffffffff830bfea0 r zyd_def_phyB
-ffffffff830c00d0 r zyd_def_phy
-ffffffff830c1000 R upgt_ca
-ffffffff830c1028 r upgt_devs_1
-ffffffff830c1030 r upgt_devs_2
-ffffffff830c2000 R urtw_ca
-ffffffff830c2030 r urtw_devs
-ffffffff830c2090 r urtw_ratetable
-ffffffff830c20f0 r urtw_8225_gain
-ffffffff830c2110 r urtw_8225_txpwr_cck_ch14
-ffffffff830c2140 r urtw_8225_txpwr_cck
-ffffffff830c2170 r urtw_8225_tx_gain_cck_ofdm
-ffffffff830c2176 r urtw_8225_txpwr_ofdm
-ffffffff830c2180 r urtw_8225_rf_part1
-ffffffff830c2200 r urtw_8225_rxgain
-ffffffff830c22c0 r urtw_8225_agc
-ffffffff830c2340 r urtw_8225_rf_part2
-ffffffff830c2470 r urtw_8225_rf_part3
-ffffffff830c2550 r urtw_8225_channel
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-ffffffff830c25a0 r urtw_8225v2_gain_bg
-ffffffff830c25c0 r urtw_8225v2_tx_gain_cck_ofdm
-ffffffff830c25f0 r urtw_8225v2_rf_part1
-ffffffff830c2670 r urtw_8225v2_rxgain
-ffffffff830c2730 r urtw_8225v2_rf_part2
-ffffffff830c2870 r urtw_8225v2_rf_part3
-ffffffff830c2970 r urtw_8187b_regtbl
-ffffffff830c2a90 r urtw_8225v2_b_rf
-ffffffff830c2b20 r urtw_8225v2_agc
-ffffffff830c2ba0 r urtw_8225v2_ofdm
-ffffffff830c3000 R urtwn_ca
-ffffffff830c3030 r urtwn_devs
-ffffffff830c3350 r rtl8188eu_mac
-ffffffff830c34c0 r rtl8188ftv_mac
-ffffffff830c3660 r rtl8192eu_mac
-ffffffff830c3800 r rtl8192cu_mac
-ffffffff830c3958 r rtl8188eu_bb_prog
-ffffffff830c3980 r rtl8188ftv_bb_prog
-ffffffff830c39a8 r rtl8192eu_bb_prog
-ffffffff830c39d0 r rtl8188ce_bb_prog
-ffffffff830c39f8 r rtl8188ru_bb_prog
-ffffffff830c3a20 r rtl8188cu_bb_prog
-ffffffff830c3a48 r rtl8192ce_bb_prog
-ffffffff830c3a70 r rtl8192cu_bb_prog
-ffffffff830c3aa0 r rtl8188eu_bb_regs
-ffffffff830c3c20 r rtl8188eu_bb_vals
-ffffffff830c3f20 r rtl8188eu_agc_vals
-ffffffff830c4120 r rtl8188ftv_bb_regs
-ffffffff830c42c0 r rtl8188ftv_bb_vals
-ffffffff830c4600 r rtl8188ftv_agc_vals
-ffffffff830c4700 r rtl8192e_bb_regs
-ffffffff830c48a0 r rtl8192e_bb_vals
-ffffffff830c4be0 r rtl8192eu_agc_vals
-ffffffff830c4de0 r rtl8192ce_bb_regs
-ffffffff830c4f60 r rtl8188ce_bb_vals
-ffffffff830c5250 r rtl8188ce_agc_vals
-ffffffff830c54d0 r rtl8188ru_bb_regs
-ffffffff830c5650 r rtl8188ru_bb_vals
-ffffffff830c5950 r rtl8188ru_agc_vals
-ffffffff830c5bd0 r rtl8188cu_bb_vals
-ffffffff830c5ec0 r rtl8192ce_bb_vals
-ffffffff830c61b0 r rtl8192ce_agc_vals
-ffffffff830c6430 r rtl8192cu_bb_vals
-ffffffff830c7000 R rsu_ca
-ffffffff830c7030 r rsu_devs
-ffffffff830c70c8 r rsu_devs_noht
-ffffffff830c70d0 r rsu_qid2idx_4ep
-ffffffff830c70da r rsu_qid2idx_6ep
-ffffffff830c70e4 r rsu_qid2idx_11ep
-ffffffff830c70ee r r92s_epaddr
-ffffffff830c8000 R otus_ca
-ffffffff830c8030 r otus_devs
-ffffffff830c8090 r ar_chans
-ffffffff830c80c0 r otus_rates
-ffffffff830c80e0 r ar5416_phy_regs
-ffffffff830c8380 r ar5416_phy_vals_2ghz_20mhz
-ffffffff830c88b0 r ar5416_phy_vals_5ghz_20mhz
-ffffffff830c8de0 r ar5416_banks_vals_5ghz
-ffffffff830c8ef0 r ar5416_banks_vals_2ghz
-ffffffff830c9000 r ar5416_banks_regs
-ffffffff830ca000 R umb_regstates
-ffffffff830ca080 R umb_dataclasses
-ffffffff830ca190 R umb_simstate
-ffffffff830ca210 R umb_messages
-ffffffff830ca2b0 R umb_status
-ffffffff830ca570 R umb_cids
-ffffffff830ca6e0 R umb_pktstate
-ffffffff830ca740 R umb_actstate
-ffffffff830ca7a0 R umb_error
-ffffffff830ca830 R umb_pintype
-ffffffff830ca960 R umb_istate
-ffffffff830ca9f0 R umb_ca
-ffffffff830caa20 R umb_quirks
-ffffffff830cb000 R uath_ca
-ffffffff830cb030 r uath_devs
-ffffffff830cc000 R athn_usb_ca
-ffffffff830cc030 r athn_usb_devs
-ffffffff830cd000 R uow_ca
-ffffffff830cd028 r uow_devs
-ffffffff830ce000 R uberry_devices
-ffffffff830ce008 R uberry_ca
-ffffffff830cf000 R upd_ca
-ffffffff830d0000 R uwacom_devs
-ffffffff830d0010 R uwacom_ca
-ffffffff830d0038 R uwacom_accessops
-ffffffff830d1000 R bwfm_usb_ca
-ffffffff830d1030 r bwfm_usbdevs
-ffffffff830d2000 R umstc_ca
-ffffffff830d2028 r umstc_devs
-ffffffff830d3000 R uhidpp_ca
-ffffffff830d3028 r uhidpp_devs
-ffffffff830d4000 R ucc_ca
-ffffffff830d5000 R iic_ca
-ffffffff830d6000 r probes
-ffffffff830d7000 R lmtemp_ca
-ffffffff830d8000 R lmn_ca
-ffffffff830d9000 R lmenv_ca
-ffffffff830da000 R maxtmp_ca
-ffffffff830db000 R adc_ca
-ffffffff830dc000 R admtemp_ca
-ffffffff830dd000 R admlc_ca
-ffffffff830de000 R admtm_ca
-ffffffff830df000 R admtmp_ca
-ffffffff830e0000 R admtt_ca
-ffffffff830e1000 R maxds_ca
-ffffffff830e2000 R adt_ca
-ffffffff830e3000 R lm_i2c_ca
-ffffffff830e4000 R admcts_ca
-ffffffff830e5000 R wbng_ca
-ffffffff830e6000 R nvt_ca
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+ffffffff8305c008 R skgpio_ca
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+ffffffff830732d0 R utvfu_au_hw_if
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+ffffffff830c3000 R urtw_ca
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-ffffffff835ee010 D xgmi_ras_hw_ops
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-ffffffff83609040 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn1
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-ffffffff8364b370 D dcn2_0_soc
-ffffffff8364c6a8 D dcn2_0_nv14_soc
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-ffffffff836571b8 D dcn3_03_soc
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-ffffffff8366f000 D pci_conf_lock
-ffffffff8366f010 D pci_bus_dma_tag
-ffffffff8366f088 D msi_pic
-ffffffff8366f120 D msix_pic
-ffffffff83670000 D pchb_cd
-ffffffff83671000 D amas_cd
-ffffffff83672000 D cardslot_cd
-ffffffff83673000 D cardbus_cd
-ffffffff83674000 d csdevs
-ffffffff83675000 d ral_rt2560_opns
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-ffffffff83675050 d ral_rt2860_opns
-ffffffff83676000 D pcmcia_cd
-ffffffff83677000 D pcmcia_3cxem556_func0
-ffffffff836770b8 D pcmcia_3cxem556_func0_cfe0
-ffffffff83677158 D pcmcia_megahertz_xjem1144_func0
-ffffffff83677210 D pcmcia_megahertz_xjem1144_func0_cfe0
-ffffffff836772b0 d pcmcia_3cxem556_func1
-ffffffff83677368 d pcmcia_3cxem556_func1_cfe0
-ffffffff83677408 d pcmcia_megahertz_xjem1144_func1
-ffffffff836774c0 d pcmcia_megahertz_xjem1144_func1_cfe0
-ffffffff83677560 d pcmcia_sierra_a555_func1
-ffffffff83677618 d pcmcia_sierra_a555_func1_cfe0
-ffffffff836776b8 d pcmcia_sveclancard_func0
-ffffffff83677770 d pcmcia_sveclancard_func0_cfe0
-ffffffff83678000 D ep_pcmcia_prod
-ffffffff83679000 D aic_pcmcia_prod
-ffffffff8367a000 D com_pcmcia_prod
-ffffffff8367b000 D wdc_pcmcia_pr
-ffffffff8367c000 D sm_pcmcia_prod
-ffffffff8367d000 D xe_cd
-ffffffff8367e000 D pcib_cd
-ffffffff8367f000 D amdpcib_cd
-ffffffff83680000 D tcpcib_cd
-ffffffff83681000 D aapic_cd
-ffffffff83682000 D hme_cd
-ffffffff83683000 D isa_cd
-ffffffff83684000 D isadma_cd
-ffffffff83685000 D fdc_cd
-ffffffff83686000 D fd_types
-ffffffff836861f8 D fd_cd
-ffffffff83687000 D mpu_cd
-ffffffff83688000 D pcppi_cd
-ffffffff83689000 D spkr_cd
-ffffffff8368a000 D wbsio_cd
-ffffffff8368b000 D schsio_cd
-ffffffff8368c000 D it_cd
-ffffffff8368d000 D uguru_cd
-ffffffff8368e000 D aps_cd
-ffffffff8368f000 D isa_bus_dma_tag
-ffffffff83690000 D wsdisplay_cd
-ffffffff83690020 D wsdisplay_cons
-ffffffff83690058 D wsdisplay_defaultscreens
-ffffffff83691000 D wskbd_cd
-ffffffff83691020 D wskbd_default_bell_data
-ffffffff83691030 D wskbd_default_keyrepeat_data
-ffffffff83691040 D wskbd_srcops
-ffffffff83692000 d compose_tab
-ffffffff83693000 D wsmouse_cd
-ffffffff83693020 D wsmouse_srcops
-ffffffff83694000 D wsmux_srcops
-ffffffff83694030 D wsmux_tree_lock
-ffffffff83695000 D vt100_output
-ffffffff83696000 D pckbd_cd
-ffffffff83697000 D pms_cd
-ffffffff83697020 d synaptics_params
-ffffffff83697030 d alps_params
-ffffffff83698000 D skgpio_cd
-ffffffff83699000 D pctr_conf_lock
-ffffffff8369a000 D ukbd_keymapdata
-ffffffff8369b000 D usbrev_str
-ffffffff8369b030 D usb_cd
-ffffffff8369c000 d usbd_ratecheck.errinterval
-ffffffff8369d000 D uhub_cd
-ffffffff8369e000 D uaudio_cd
-ffffffff8369f000 D uvideo_ctrls
-ffffffff8369f2d8 D uvideo_cd
-ffffffff836a0000 D utvfu_norm_params
-ffffffff836a0030 D utvfu_cd
-ffffffff836a1000 D udl_reg_vals_640x480_60
-ffffffff836a1020 D udl_reg_vals_640x480_67
-ffffffff836a1040 D udl_reg_vals_640x480_72
-ffffffff836a1060 D udl_reg_vals_640x480_75
-ffffffff836a1080 D udl_reg_vals_800x480_61
-ffffffff836a10a0 D udl_reg_vals_800x600_56
-ffffffff836a10c0 D udl_reg_vals_800x600_60
-ffffffff836a10e0 D udl_reg_vals_800x600_72
-ffffffff836a1100 D udl_reg_vals_800x600_74
-ffffffff836a1120 D udl_reg_vals_800x600_75
-ffffffff836a1140 D udl_reg_vals_1024x768_60
-ffffffff836a1160 D udl_reg_vals_1024x768_70
-ffffffff836a1180 D udl_reg_vals_1024x768_75
-ffffffff836a11a0 D udl_reg_vals_1280x800_60
-ffffffff836a11c0 D udl_reg_vals_1280x960_60
-ffffffff836a11e0 D udl_reg_vals_1280x1024_60
-ffffffff836a1200 D udl_reg_vals_1280x1024_75
-ffffffff836a1220 D udl_reg_vals_1366x768_60
-ffffffff836a1240 D udl_reg_vals_1440x900_60
-ffffffff836a1260 D udl_reg_vals_1440x900_59
-ffffffff836a1280 D udl_reg_vals_1440x900_75
-ffffffff836a12a0 D udl_reg_vals_1680x1050_60
-ffffffff836a12c0 D udl_reg_vals_1600x1200_60
-ffffffff836a12e0 D udl_reg_vals_1920x1080_60
-ffffffff836a1300 D udl_null_key_1
-ffffffff836a1310 D udl_decomp_table
-ffffffff836a2510 D udl_cd
-ffffffff836a2530 D udl_stdscreen
-ffffffff836a2560 D udl_scrlist
-ffffffff836a2568 D udl_screenlist
-ffffffff836a2578 D udl_accessops
-ffffffff836a3000 D umidi_cd
-ffffffff836a4000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE
-ffffffff836a4020 d umq_ROLAND_ROLAND_UM1_2
-ffffffff836a4040 d umq_ROLAND_ROLAND_SC8850_2
-ffffffff836a4060 d umq_ROLAND_ROLAND_SD90_2
-ffffffff836a4080 d umq_ROLAND_ROLAND_UM880N_0
-ffffffff836a40a0 d umq_ROLAND_ROLAND_UA100_2
-ffffffff836a40c0 d umq_ROLAND_ROLAND_UM4_2
-ffffffff836a40e0 d umq_ROLAND_ROLAND_U8_2
-ffffffff836a4100 d umq_ROLAND_ROLAND_UM2_2
-ffffffff836a4120 d umq_ROLAND_ROLAND_SC8820_2
-ffffffff836a4140 d umq_ROLAND_ROLAND_PC300_2
-ffffffff836a4160 d umq_ROLAND_ROLAND_SK500_2
-ffffffff836a4180 d umq_ROLAND_ROLAND_SCD70_2
-ffffffff836a41a0 d umq_ROLAND_ROLAND_UM550_0
-ffffffff836a41c0 d umq_ROLAND_ROLAND_SD20_0
-ffffffff836a41e0 d umq_ROLAND_ROLAND_SD80_0
-ffffffff836a4200 d umq_ROLAND_ROLAND_UA700_3
-ffffffff836a4220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE
-ffffffff836a4240 D umidi_quirklist
-ffffffff836a44a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc
-ffffffff836a44c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints
-ffffffff836a44d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc
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-ffffffff836a4500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc
-ffffffff836a4520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints
-ffffffff836a4530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc
-ffffffff836a4550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints
-ffffffff836a4560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc
-ffffffff836a4580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints
-ffffffff836a4590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc
-ffffffff836a45b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints
-ffffffff836a45c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc
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-ffffffff836a45f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc
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-ffffffff836a4620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc
-ffffffff836a4640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints
-ffffffff836a4650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc
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-ffffffff836a4680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc
-ffffffff836a46a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints
-ffffffff836a46b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc
-ffffffff836a46d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints
-ffffffff836a46e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc
-ffffffff836a4700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints
-ffffffff836a4710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc
-ffffffff836a4730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints
-ffffffff836a4740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc
-ffffffff836a4760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints
-ffffffff836a4770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc
-ffffffff836a4790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints
-ffffffff836a47a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc
-ffffffff836a47c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints
-ffffffff836a47d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc
-ffffffff836a47f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints
-ffffffff836a5000 D ucom_cd
-ffffffff836a5020 D sysctl_ucomlock
-ffffffff836a6000 D ugen_cd
-ffffffff836a7000 D uhidev_cd
-ffffffff836a7020 d uhidev_use_rdesc.reportbuf
-ffffffff836a8000 D uhid_cd
-ffffffff836a9000 D fido_cd
-ffffffff836aa000 D ujoy_cd
-ffffffff836ab000 D ukbd_cd
-ffffffff836ac000 D ums_cd
-ffffffff836ac020 d ums_fix_elecom_descriptor.match
-ffffffff836ad000 D umt_cd
-ffffffff836ae000 D def_scale
-ffffffff836ae020 D uts_cd
-ffffffff836af000 D ubcmtp_cd
-ffffffff836af020 d ubcmtp_wsmousecfg
-ffffffff836b0000 D ucycom_cd
-ffffffff836b1000 D uslhcom_cd
-ffffffff836b2000 D ulpt_fwdevs
-ffffffff836b2060 D ulpt_cd
-ffffffff836b2080 D ulptusein
-ffffffff836b3000 D umass_cd
-ffffffff836b3020 d umass_bbb_transfer.dCBWtag
-ffffffff836b4000 D uthum_cd
-ffffffff836b5000 D ugold_cd
-ffffffff836b5020 d cmd_init
-ffffffff836b5028 d cmd_type
-ffffffff836b5030 d cmd_data
-ffffffff836b6000 D utrh_cd
-ffffffff836b7000 D uoakrh_cd
-ffffffff836b8000 D uoaklux_cd
-ffffffff836b9000 D uoakv_cd
-ffffffff836ba000 D uonerng_cd
-ffffffff836bb000 D urng_cd
-ffffffff836bc000 D udcf_cd
-ffffffff836bd000 D umbg_cd
-ffffffff836be000 D uvisor_cd
-ffffffff836bf000 D udsbr_cd
-ffffffff836c0000 D utwitch_cd
-ffffffff836c1000 D aue_cd
-ffffffff836c2000 D axe_cd
-ffffffff836c3000 D axen_cd
-ffffffff836c4000 D smsc_cd
-ffffffff836c5000 D cue_devs
-ffffffff836c5010 D cue_cd
-ffffffff836c6000 D kue_cd
-ffffffff836c7000 D cdce_cd
-ffffffff836c8000 D urndis_cd
-ffffffff836c9000 D mos_cd
-ffffffff836ca000 D mue_cd
-ffffffff836cb000 D udav_cd
-ffffffff836cc000 D upl_devs
-ffffffff836cc008 D upl_cd
-ffffffff836cd000 D ugl_devs
-ffffffff836cd008 D ugl_cd
-ffffffff836ce000 D url_cd
-ffffffff836cf000 D ure_cd
-ffffffff836d0000 D uaq_cd
-ffffffff836d1000 D umodem_cd
-ffffffff836d2000 D uftdi_cd
-ffffffff836d3000 D uplcom_cd
-ffffffff836d4000 D umct_cd
-ffffffff836d5000 D uvscom_cd
-ffffffff836d6000 D ubsa_cd
-ffffffff836d7000 D ukspan_cd
-ffffffff836d8000 D uslcom_cd
-ffffffff836d9000 D uark_cd
-ffffffff836da000 D moscom_cd
-ffffffff836db000 D umcs_cd
-ffffffff836dc000 D uscom_cd
-ffffffff836dd000 D ucrcom_cd
-ffffffff836de000 D uxrcom_cd
-ffffffff836df000 D uipaq_cd
-ffffffff836e0000 D umsm_cd
-ffffffff836e1000 D uchcom_cd
-ffffffff836e2000 D uticom_cd
-ffffffff836e3000 D wi_func_usb
-ffffffff836e3060 D wi_usb_cd
-ffffffff836e4000 D atu_cd
-ffffffff836e4020 D atu_devs
-ffffffff836e4270 D atu_radfirm
-ffffffff836e5000 D ural_cd
-ffffffff836e6000 D rum_cd
-ffffffff836e7000 D run_cd
-ffffffff836e7020 D rt3070_freqs
-ffffffff836e8000 D mtw_cd
-ffffffff836e9000 D zyd_cd
-ffffffff836ea000 D upgt_cd
-ffffffff836eb000 D urtw_cd
-ffffffff836ec000 D urtwn_cd
-ffffffff836ed000 D rsu_cd
-ffffffff836ee000 D otus_cd
-ffffffff836ee020 d AR_PLCP_HDR_INTR
-ffffffff836ef000 D umb_xfer_tout
-ffffffff836ef010 D umb_uuid_basic_connect
-ffffffff836ef020 D umb_uuid_context_internet
-ffffffff836ef030 D umb_uuid_qmi_mbim
-ffffffff836ef040 D umb_cd
-ffffffff836ef060 D umb_delay
-ffffffff836ef070 D umb_qmi_alloc_cid
-ffffffff836ef080 D umb_qmi_fcc_auth
-ffffffff836f0000 D uath_cd
-ffffffff836f1000 D uow_cd
-ffffffff836f2000 D uberry_cd
-ffffffff836f3000 D upd_cd
-ffffffff836f3020 d upd_usage_roots
-ffffffff836f30a0 d upd_usage_batdep
-ffffffff836f4000 D uwacom_cd
-ffffffff836f4020 d uwacom_attach.wacom_report_buf
-ffffffff836f5000 D bwfm_usb_bus_ops
-ffffffff836f6000 D umstc_cd
-ffffffff836f7000 D uhidpp_cd
-ffffffff836f8000 D ucc_cd
-ffffffff836f9000 D iic_cd
-ffffffff836fa000 D probe_addrs_sensor
-ffffffff836fa008 D probe_addrs_eeprom
-ffffffff836fb000 D lmtemp_cd
-ffffffff836fc000 D lmn_worklist
-ffffffff836fc240 D lmn_cd
-ffffffff836fd000 D lmenv_cd
-ffffffff836fe000 D maxtmp_cd
-ffffffff836ff000 D adc_cd
-ffffffff83700000 D admtemp_cd
-ffffffff83701000 D admlc_cd
-ffffffff83702000 D admtm_cd
-ffffffff83703000 D admtmp_cd
-ffffffff83704000 D admtt_cd
-ffffffff83705000 D maxds_cd
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+ffffffff8376602c B comconsattached
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+ffffffff8376f000 B ehcixfer
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+ffffffff83772000 B mpath
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+ffffffff83773030 B softraid0
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