--- 7.6/2024-10-08T08:53:57Z/2024-10-07T00:00:00Z/nm-bsd-ot14.txt Thu Oct 10 02:15:55 2024 +++ 7.6/2024-10-08T08:53:57Z/2024-10-08T00:00:00Z/nm-bsd-ot14.txt Thu Oct 10 05:12:50 2024 @@ -25901,11 +25901,11 @@ ffffffff81dbea40 T evergreen_dma_cs_parse ffffffff81dbfc40 T evergreen_ib_parse ffffffff81dc0110 T evergreen_dma_ib_parse ffffffff81dc02f0 t evergreen_cs_track_check -ffffffff81dc1460 t evergreen_cs_handle_reg -ffffffff81dc33e0 t evergreen_surface_value_conv_check -ffffffff81dc36d0 t evergreen_surface_check -ffffffff81dc3b80 t evergreen_cs_track_validate_htile -ffffffff81dc3e40 t evergreen_vm_reg_valid +ffffffff81dc1470 t evergreen_cs_handle_reg +ffffffff81dc33f0 t evergreen_surface_value_conv_check +ffffffff81dc36e0 t evergreen_surface_check +ffffffff81dc3b90 t evergreen_cs_track_validate_htile +ffffffff81dc3e50 t evergreen_vm_reg_valid ffffffff81dc5000 T evergreen_dma_fence_ring_emit ffffffff81dc52f0 T evergreen_dma_ring_ib_execute ffffffff81dc5680 T evergreen_copy_dma @@ -27666,8 +27666,8 @@ ffffffff81edeb60 T amdgpu_atombios_encoder_dig_detect ffffffff81edec90 T amdgpu_atombios_encoder_setup_ext_encoder_ddc ffffffff81edecf0 T amdgpu_atombios_encoder_set_bios_scratch_regs ffffffff81edf330 T amdgpu_atombios_encoder_get_lcd_info -ffffffff81edf6c0 T amdgpu_atombios_encoder_get_dig_info -ffffffff81edf730 t amdgpu_atombios_encoder_update_backlight_status +ffffffff81edf6d0 T amdgpu_atombios_encoder_get_dig_info +ffffffff81edf740 t amdgpu_atombios_encoder_update_backlight_status ffffffff81ee0000 T amdgpu_atombios_i2c_xfer ffffffff81ee0400 T amdgpu_atombios_i2c_func ffffffff81ee0430 T amdgpu_atombios_i2c_channel_trans @@ -31400,72 +31400,72 @@ ffffffff8215a570 t dm_sw_init ffffffff8215ab90 t dm_sw_fini ffffffff8215ac60 t amdgpu_dm_early_fini ffffffff8215acc0 t dm_hw_init -ffffffff8215ccb0 t dm_hw_fini -ffffffff8215cd20 t dm_suspend -ffffffff8215d160 t dm_resume -ffffffff8215dbc0 t dm_is_idle -ffffffff8215dbf0 t dm_wait_for_idle -ffffffff8215dc20 t dm_check_soft_reset -ffffffff8215dc50 t dm_soft_reset -ffffffff8215dc80 t dm_set_clockgating_state -ffffffff8215dcb0 t dm_set_powergating_state -ffffffff8215dce0 t dm_bandwidth_update -ffffffff8215dd10 t dm_vblank_get_counter -ffffffff8215dd90 t dm_crtc_get_scanoutpos -ffffffff8215de80 t amdgpu_dm_dmub_reg_read -ffffffff8215df30 t amdgpu_dm_dmub_reg_write -ffffffff8215df60 t dm_dmub_hw_init -ffffffff8215e3c0 t dmub_aux_setconfig_callback -ffffffff8215e470 t amdgpu_dm_fini -ffffffff8215e6c0 t emulated_link_detect -ffffffff8215e7d0 t amdgpu_dm_atomic_check -ffffffff8215f6c0 t dm_update_plane_state -ffffffff8215fd70 t dm_update_crtc_state -ffffffff82160860 t dm_check_crtc_cursor -ffffffff82160be0 t is_scaling_state_different -ffffffff82160c80 t do_aquire_global_lock -ffffffff82160f50 t dm_update_mst_vcpi_slots_for_dsc -ffffffff82161160 t dm_atomic_destroy_state -ffffffff821611a0 t dm_check_cursor_fb -ffffffff82161350 t fill_dc_plane_attributes -ffffffff82161600 t fill_dc_plane_info_and_addr -ffffffff82161950 t fill_hdr_info_packet -ffffffff82161ac0 t is_timing_unchanged_for_freesync -ffffffff82161bf0 t get_highest_refresh_rate_mode -ffffffff82161d50 t update_stream_scaling_settings -ffffffff82161ea0 t amdgpu_dm_atomic_commit_tail -ffffffff82165060 t amdgpu_dm_backlight_set_level -ffffffff82165260 t dm_atomic_duplicate_state -ffffffff82165320 t amdgpu_dm_audio_component_bind -ffffffff82165390 t amdgpu_dm_audio_component_unbind -ffffffff821653f0 t amdgpu_dm_audio_component_get_eld -ffffffff82165550 t dm_dmub_outbox1_low_irq -ffffffff82165890 t dm_handle_hpd_work -ffffffff82165920 t amdgpu_dm_encoder_destroy -ffffffff82165960 t amdgpu_dm_i2c_xfer -ffffffff82165ac0 t amdgpu_dm_i2c_func -ffffffff82165af0 t amdgpu_dm_connector_detect -ffffffff82165bb0 t amdgpu_dm_connector_funcs_force -ffffffff82165ca0 t amdgpu_dm_connector_late_register -ffffffff82165e20 t amdgpu_dm_connector_unregister -ffffffff82165e40 t amdgpu_dm_connector_destroy -ffffffff82165f50 t amdgpu_dm_backlight_update_status -ffffffff82165fe0 t amdgpu_dm_backlight_get_brightness -ffffffff821661e0 t get_modes -ffffffff821661f0 t amdgpu_dm_connector_atomic_check -ffffffff82166350 t amdgpu_dm_connector_get_modes -ffffffff821669d0 t dm_crtc_high_irq -ffffffff82166b90 t dm_vupdate_high_irq -ffffffff82166d40 t dm_pflip_high_irq -ffffffff82166f90 t register_hpd_handlers -ffffffff821670b0 t dmub_hpd_callback -ffffffff82167270 t handle_hpd_irq -ffffffff82167280 t handle_hpd_rx_irq -ffffffff82167630 t handle_hpd_irq_helper -ffffffff821677f0 t schedule_hpd_rx_offload_work -ffffffff821678c0 t dm_handle_hpd_rx_offload_work -ffffffff82167ca0 t dm_gpureset_toggle_interrupts -ffffffff82167ee0 t s3_handle_mst +ffffffff8215ccf0 t dm_hw_fini +ffffffff8215cd60 t dm_suspend +ffffffff8215d1a0 t dm_resume +ffffffff8215dc00 t dm_is_idle +ffffffff8215dc30 t dm_wait_for_idle +ffffffff8215dc60 t dm_check_soft_reset +ffffffff8215dc90 t dm_soft_reset +ffffffff8215dcc0 t dm_set_clockgating_state +ffffffff8215dcf0 t dm_set_powergating_state +ffffffff8215dd20 t dm_bandwidth_update +ffffffff8215dd50 t dm_vblank_get_counter +ffffffff8215ddd0 t dm_crtc_get_scanoutpos +ffffffff8215dec0 t amdgpu_dm_dmub_reg_read +ffffffff8215df70 t amdgpu_dm_dmub_reg_write +ffffffff8215dfa0 t dm_dmub_hw_init +ffffffff8215e400 t dmub_aux_setconfig_callback +ffffffff8215e4b0 t amdgpu_dm_fini +ffffffff8215e700 t emulated_link_detect +ffffffff8215e810 t amdgpu_dm_atomic_check +ffffffff8215f700 t dm_update_plane_state +ffffffff8215fdb0 t dm_update_crtc_state +ffffffff821608a0 t dm_check_crtc_cursor +ffffffff82160c20 t is_scaling_state_different +ffffffff82160cc0 t do_aquire_global_lock +ffffffff82160f90 t dm_update_mst_vcpi_slots_for_dsc +ffffffff821611a0 t dm_atomic_destroy_state +ffffffff821611e0 t dm_check_cursor_fb +ffffffff82161390 t fill_dc_plane_attributes +ffffffff82161640 t fill_dc_plane_info_and_addr +ffffffff82161990 t fill_hdr_info_packet +ffffffff82161b00 t is_timing_unchanged_for_freesync +ffffffff82161c30 t get_highest_refresh_rate_mode +ffffffff82161d90 t update_stream_scaling_settings +ffffffff82161ee0 t amdgpu_dm_atomic_commit_tail +ffffffff821650a0 t amdgpu_dm_backlight_set_level +ffffffff821652f0 t dm_atomic_duplicate_state +ffffffff821653b0 t amdgpu_dm_audio_component_bind +ffffffff82165420 t amdgpu_dm_audio_component_unbind +ffffffff82165480 t amdgpu_dm_audio_component_get_eld +ffffffff821655e0 t dm_dmub_outbox1_low_irq +ffffffff82165920 t dm_handle_hpd_work +ffffffff821659b0 t amdgpu_dm_encoder_destroy +ffffffff821659f0 t amdgpu_dm_i2c_xfer +ffffffff82165b50 t amdgpu_dm_i2c_func +ffffffff82165b80 t amdgpu_dm_connector_detect +ffffffff82165c40 t amdgpu_dm_connector_funcs_force +ffffffff82165d30 t amdgpu_dm_connector_late_register +ffffffff82165eb0 t amdgpu_dm_connector_unregister +ffffffff82165ed0 t amdgpu_dm_connector_destroy +ffffffff82165fe0 t amdgpu_dm_backlight_update_status +ffffffff82166070 t amdgpu_dm_backlight_get_brightness +ffffffff821662a0 t get_modes +ffffffff821662b0 t amdgpu_dm_connector_atomic_check +ffffffff82166410 t amdgpu_dm_connector_get_modes +ffffffff82166a90 t dm_crtc_high_irq +ffffffff82166c50 t dm_vupdate_high_irq +ffffffff82166e00 t dm_pflip_high_irq +ffffffff82167050 t register_hpd_handlers +ffffffff82167170 t dmub_hpd_callback +ffffffff82167330 t handle_hpd_irq +ffffffff82167340 t handle_hpd_rx_irq +ffffffff821676f0 t handle_hpd_irq_helper +ffffffff821678b0 t schedule_hpd_rx_offload_work +ffffffff82167980 t dm_handle_hpd_rx_offload_work +ffffffff82167d60 t dm_gpureset_toggle_interrupts +ffffffff82167fa0 t s3_handle_mst ffffffff82169000 T amdgpu_dm_init_color_mod ffffffff82169010 T amdgpu_dm_verify_lut_sizes ffffffff821690f0 T amdgpu_dm_update_crtc_color_mgmt @@ -31571,13 +31571,13 @@ ffffffff82172a30 t is_dsc_need_re_compute ffffffff82172c00 t compute_mst_dsc_configs_for_link ffffffff821732c0 T pre_validate_dsc ffffffff821738e0 T dm_dp_mst_is_port_support_mode -ffffffff82173b80 t amdgpu_dm_encoder_destroy -ffffffff82173b90 t dm_dp_add_mst_connector -ffffffff82173dc0 t dm_handle_mst_down_rep_msg_ready -ffffffff82173de0 t amdgpu_dm_mst_connector_late_register -ffffffff82173e30 t amdgpu_dm_mst_connector_early_unregister -ffffffff82173f20 t dm_dp_mst_connector_destroy -ffffffff82173fc0 t dm_dp_mst_get_modes +ffffffff82173ba0 t amdgpu_dm_encoder_destroy +ffffffff82173bb0 t dm_dp_add_mst_connector +ffffffff82173de0 t dm_handle_mst_down_rep_msg_ready +ffffffff82173e00 t amdgpu_dm_mst_connector_late_register +ffffffff82173e50 t amdgpu_dm_mst_connector_early_unregister +ffffffff82173f40 t dm_dp_mst_connector_destroy +ffffffff82173fe0 t dm_dp_mst_get_modes ffffffff82174570 t dm_dp_mst_detect ffffffff82174780 t dm_mst_atomic_best_encoder ffffffff821747e0 t dm_dp_mst_atomic_check @@ -33708,22 +33708,22 @@ ffffffff822ca790 T hubp3_construct ffffffff822cb000 T dcn30_set_blend_lut ffffffff822cb070 T dcn30_set_input_transfer_func ffffffff822cb1f0 T dcn30_set_output_transfer_func -ffffffff822cb580 T dcn30_update_writeback -ffffffff822cb620 t dcn30_set_writeback -ffffffff822cb800 T dcn30_mmhubbub_warmup -ffffffff822cba70 T dcn30_enable_writeback -ffffffff822cbb30 T dcn30_disable_writeback -ffffffff822cbc30 T dcn30_program_all_writeback_pipes_in_tree -ffffffff822cbf70 T dcn30_init_hw -ffffffff822cc7c0 T dcn30_set_avmute -ffffffff822cc900 T dcn30_update_info_frame -ffffffff822cca00 T dcn30_program_dmdata_engine -ffffffff822ccaa0 T dcn30_apply_idle_power_optimizations -ffffffff822ccfe0 T dcn30_does_plane_fit_in_mall -ffffffff822cd090 T dcn30_hardware_release -ffffffff822cd190 T dcn30_set_disp_pattern_generator -ffffffff822cd210 T dcn30_prepare_bandwidth -ffffffff822cd310 T dcn30_set_static_screen_control +ffffffff822cb5a0 T dcn30_update_writeback +ffffffff822cb640 t dcn30_set_writeback +ffffffff822cb820 T dcn30_mmhubbub_warmup +ffffffff822cba90 T dcn30_enable_writeback +ffffffff822cbb50 T dcn30_disable_writeback +ffffffff822cbc50 T dcn30_program_all_writeback_pipes_in_tree +ffffffff822cbf90 T dcn30_init_hw +ffffffff822cc7e0 T dcn30_set_avmute +ffffffff822cc920 T dcn30_update_info_frame +ffffffff822cca20 T dcn30_program_dmdata_engine +ffffffff822ccac0 T dcn30_apply_idle_power_optimizations +ffffffff822cd000 T dcn30_does_plane_fit_in_mall +ffffffff822cd0b0 T dcn30_hardware_release +ffffffff822cd1b0 T dcn30_set_disp_pattern_generator +ffffffff822cd230 T dcn30_prepare_bandwidth +ffffffff822cd330 T dcn30_set_static_screen_control ffffffff822ce000 T dcn30_hw_sequencer_construct ffffffff822cf000 T dcn30_mmhubbub_construct ffffffff822cf050 t mmhubbub3_warmup_mcif @@ -35312,17 +35312,17 @@ ffffffff824d60a0 T mod_color_set_table_init_state ffffffff824d7000 T mod_freesync_create ffffffff824d7070 T mod_freesync_destroy ffffffff824d70b0 T mod_freesync_calc_v_total_from_refresh -ffffffff824d7140 T mod_freesync_get_vmin_vmax -ffffffff824d7180 T mod_freesync_get_v_position -ffffffff824d7210 T mod_freesync_build_vrr_infopacket -ffffffff824d7910 T mod_freesync_build_vrr_params -ffffffff824d7cd0 T mod_freesync_calc_nominal_field_rate -ffffffff824d7d30 T mod_freesync_handle_preflip -ffffffff824d8160 T mod_freesync_handle_v_update -ffffffff824d8620 T mod_freesync_get_settings -ffffffff824d8690 T mod_freesync_calc_field_rate_from_timing -ffffffff824d86e0 T mod_freesync_get_freesync_enabled -ffffffff824d8710 T mod_freesync_is_valid_range +ffffffff824d7150 T mod_freesync_get_vmin_vmax +ffffffff824d7190 T mod_freesync_get_v_position +ffffffff824d7220 T mod_freesync_build_vrr_infopacket +ffffffff824d7920 T mod_freesync_build_vrr_params +ffffffff824d7cf0 T mod_freesync_calc_nominal_field_rate +ffffffff824d7d50 T mod_freesync_handle_preflip +ffffffff824d8180 T mod_freesync_handle_v_update +ffffffff824d8650 T mod_freesync_get_settings +ffffffff824d86c0 T mod_freesync_calc_field_rate_from_timing +ffffffff824d8710 T mod_freesync_get_freesync_enabled +ffffffff824d8740 T mod_freesync_is_valid_range ffffffff824d9000 T mod_hdcp_get_memory_size ffffffff824d9030 T mod_hdcp_setup ffffffff824d90b0 t reset_connection @@ -39018,31 +39018,31 @@ ffffffff826b1980 T axe_encap ffffffff826b1b30 T axe_init ffffffff826b3000 T axen_match ffffffff826b3080 T axen_attach -ffffffff826b35d0 T axen_detach -ffffffff826b3770 T axen_lock_mii -ffffffff826b3790 T axen_unlock_mii -ffffffff826b37f0 T axen_cmd -ffffffff826b38c0 T axen_miibus_readreg -ffffffff826b3a20 T axen_miibus_writereg -ffffffff826b3b50 T axen_miibus_statchg -ffffffff826b3ce0 T axen_ifmedia_upd -ffffffff826b3d80 T axen_ifmedia_sts -ffffffff826b3df0 T axen_iff -ffffffff826b4040 T axen_reset -ffffffff826b40c0 T axen_ax88179_init -ffffffff826b49a0 T axen_tick_task -ffffffff826b4a70 T axen_stop -ffffffff826b4cc0 T axen_ioctl -ffffffff826b4e50 T axen_start -ffffffff826b4f50 T axen_watchdog -ffffffff826b5030 T axen_tick -ffffffff826b50a0 T axen_newbuf -ffffffff826b5140 T axen_rx_list_init -ffffffff826b5200 T axen_tx_list_init -ffffffff826b52c0 T axen_rxeof -ffffffff826b5660 T axen_txeof -ffffffff826b57c0 T axen_encap -ffffffff826b5950 T axen_init +ffffffff826b35c0 T axen_detach +ffffffff826b3760 T axen_lock_mii +ffffffff826b3780 T axen_unlock_mii +ffffffff826b37e0 T axen_cmd +ffffffff826b38b0 T axen_miibus_readreg +ffffffff826b3a10 T axen_miibus_writereg +ffffffff826b3b40 T axen_miibus_statchg +ffffffff826b3cd0 T axen_ifmedia_upd +ffffffff826b3d70 T axen_ifmedia_sts +ffffffff826b3de0 T axen_iff +ffffffff826b4030 T axen_reset +ffffffff826b40b0 T axen_ax88179_init +ffffffff826b4990 T axen_tick_task +ffffffff826b4a60 T axen_stop +ffffffff826b4cb0 T axen_ioctl +ffffffff826b4e40 T axen_start +ffffffff826b4f40 T axen_watchdog +ffffffff826b5020 T axen_tick +ffffffff826b5090 T axen_newbuf +ffffffff826b5130 T axen_rx_list_init +ffffffff826b51f0 T axen_tx_list_init +ffffffff826b52b0 T axen_rxeof +ffffffff826b5650 T axen_txeof +ffffffff826b57b0 T axen_encap +ffffffff826b5940 T axen_init ffffffff826b6000 T smsc_match ffffffff826b6080 T smsc_attach ffffffff826b64f0 T smsc_detach @@ -42208,18 +42208,18 @@ ffffffff82839000 r isomappings ffffffff82839080 r unimappings ffffffff82839230 r replacements ffffffff8283cabc r apollo_pio_rec -ffffffff8288a960 r apollo_udma33_tim -ffffffff828a004b r pp_r600_decoded_lanes -ffffffff828d7315 r cmd680_setup_channel.udma_tbl -ffffffff828df8c2 r apollo_udma100_tim -ffffffff828df8c8 r cmd0646_9_tim_udma -ffffffff828ee1e1 r substchar -ffffffff829459dc r apollo_udma133_tim -ffffffff829459e3 r apollo_udma66_tim -ffffffff82945a0d r cy_pio_rec -ffffffff8294b2f8 R drm_ca -ffffffff8294b320 R drm_filtops -ffffffff8294b350 R drmread_filtops +ffffffff8288aaed r apollo_udma33_tim +ffffffff828a01dd r pp_r600_decoded_lanes +ffffffff828d740e r cmd680_setup_channel.udma_tbl +ffffffff828df9bb r apollo_udma100_tim +ffffffff828df9c1 r cmd0646_9_tim_udma +ffffffff828ee2da r substchar +ffffffff82945b28 r apollo_udma133_tim +ffffffff82945b2f r apollo_udma66_tim +ffffffff82945b59 r cy_pio_rec +ffffffff8294b368 R drm_ca +ffffffff8294b390 R drm_filtops +ffffffff8294b3c0 R drmread_filtops ffffffff8294c000 r vga_emulops ffffffff8294c048 R vga_stdscreen ffffffff8294c078 R vga_stdscreen_mono @@ -49220,11 +49220,11 @@ ffffffff8305e000 r hidcc_attach_wskbd.accessops ffffffff8305e020 r hidcc_keysyms ffffffff8305f000 R usb_ca ffffffff83060000 R usb_known_products -ffffffff8306c050 R usb_known_vendors -ffffffff8306e880 R usbd_error_strs +ffffffff8306c060 R usb_known_vendors +ffffffff8306e890 R usbd_error_strs ffffffff8306f000 R usb_quirks -ffffffff8306f3d8 R usb_dev_quirks -ffffffff8306f3e0 R usbd_no_quirk +ffffffff8306f3e4 R usb_dev_quirks +ffffffff8306f3ec R usbd_no_quirk ffffffff83070000 R uhub_ca ffffffff83070028 R uhub_uhub_ca ffffffff83071000 R uaudio_ca @@ -57618,15 +57618,15 @@ ffffffff83a2400c b dpp3_deferred_update.__warned.7 ffffffff83a24010 b dpp3_deferred_update.__warned.8 ffffffff83a25000 b dcn30_disable_writeback.__warned ffffffff83a25004 b dcn30_program_all_writeback_pipes_in_tree.__warned -ffffffff83a25008 b dcn30_program_all_writeback_pipes_in_tree.__warned.8 -ffffffff83a2500c b dcn30_program_all_writeback_pipes_in_tree.__warned.10 -ffffffff83a25010 b dcn30_program_all_writeback_pipes_in_tree.__warned.12 +ffffffff83a25008 b dcn30_program_all_writeback_pipes_in_tree.__warned.9 +ffffffff83a2500c b dcn30_program_all_writeback_pipes_in_tree.__warned.11 +ffffffff83a25010 b dcn30_program_all_writeback_pipes_in_tree.__warned.13 ffffffff83a25014 b dcn30_update_info_frame.__warned ffffffff83a25018 b dcn30_apply_idle_power_optimizations.__warned ffffffff83a2501c b dcn30_set_writeback.__warned -ffffffff83a25020 b dcn30_set_writeback.__warned.17 -ffffffff83a25024 b dcn30_set_writeback.__warned.19 -ffffffff83a25028 b dcn30_set_writeback.__warned.21 +ffffffff83a25020 b dcn30_set_writeback.__warned.18 +ffffffff83a25024 b dcn30_set_writeback.__warned.20 +ffffffff83a25028 b dcn30_set_writeback.__warned.22 ffffffff83a26000 b optc3_set_odm_combine.__warned ffffffff83a27000 b dcn30_acquire_post_bldn_3dlut.__warned ffffffff83a27004 b dcn30_internal_validate_bw.__warned