--- 7.5/2024-10-06T16:10:21Z/2024-10-04T00:00:00Z/nm-bsd-ot14.txt Mon Oct 7 13:47:31 2024 +++ 7.5/2024-10-06T16:10:21Z/2024-10-05T00:00:00Z/nm-bsd-ot14.txt Mon Oct 7 16:22:48 2024 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001418f A acpi_pdirpa 01000000 A __kernel_phys_base -02831000 T __kernel_kutext_phys -02834000 C __kernel_cptext_phys -02835000 C __kernel_rodata_phys -03141000 R __kernel_kutext_page_phys -03143000 C __kernel_randomdata_phys -033fd000 R __kernel_data_phys -0375b000 D __kernel_kudata_phys -0375c000 C __kernel_bss_phys +02832000 T __kernel_kutext_phys +02835000 C __kernel_cptext_phys +02836000 C __kernel_rodata_phys +03142000 R __kernel_kutext_page_phys +03144000 C __kernel_randomdata_phys +033fe000 R __kernel_data_phys +0375c000 D __kernel_kudata_phys +0375d000 C __kernel_bss_phys 03c00000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -18,13 +18,13 @@ ffffffff81000000 A kernel_text ffffffff81001000 T start ffffffff8100105d t bi_size_ok ffffffff81001133 t cont -ffffffff810012f8 t map_syms -ffffffff81001334 t map_tables -ffffffff81001483 t store_pte -ffffffff81001549 t write_efer -ffffffff8100155d t compat -ffffffff8100156c t longmode -ffffffff81001578 t longmode_hi +ffffffff810012f1 t map_syms +ffffffff8100132d t map_tables +ffffffff8100147c t store_pte +ffffffff81001542 t write_efer +ffffffff81001556 t compat +ffffffff81001565 t longmode +ffffffff81001571 t longmode_hi ffffffff81003000 T endboot ffffffff81003000 T read_seeprom ffffffff81004000 T pcdisplay_cursor_reset @@ -4376,24 +4376,24 @@ ffffffff81233430 T psp_sev_intr ffffffff812334d0 T psp_get_pstatus ffffffff81233570 T psp_init ffffffff81233610 t ccp_docmd -ffffffff812339d0 T psp_df_flush -ffffffff81233a40 T psp_decommission -ffffffff81233ab0 T psp_get_gstatus -ffffffff81233b50 T psp_launch_start -ffffffff81233c00 T psp_launch_update_data -ffffffff81233d80 T psp_launch_measure -ffffffff81233e80 T psp_launch_finish -ffffffff81233ef0 T psp_attestation -ffffffff81233ff0 T psp_activate -ffffffff81234060 T psp_deactivate -ffffffff812340d0 T psp_guest_shutdown -ffffffff812341a0 T psp_snp_get_pstatus -ffffffff81234250 T pspopen -ffffffff812342c0 T pspclose -ffffffff81234330 T pspioctl -ffffffff812349f0 T pledge_ioctl_psp -ffffffff81234ab0 T pspprint -ffffffff81234ae0 T pspsubmatch +ffffffff812337a0 T psp_df_flush +ffffffff81233810 T psp_decommission +ffffffff81233880 T psp_get_gstatus +ffffffff81233920 T psp_launch_start +ffffffff812339d0 T psp_launch_update_data +ffffffff81233b50 T psp_launch_measure +ffffffff81233c50 T psp_launch_finish +ffffffff81233cc0 T psp_attestation +ffffffff81233dc0 T psp_activate +ffffffff81233e30 T psp_deactivate +ffffffff81233ea0 T psp_guest_shutdown +ffffffff81233f70 T psp_snp_get_pstatus +ffffffff81234020 T pspopen +ffffffff81234090 T pspclose +ffffffff81234100 T pspioctl +ffffffff812347c0 T pledge_ioctl_psp +ffffffff81234880 T pspprint +ffffffff812348b0 T pspsubmatch ffffffff81235000 T sdhc_host_reset ffffffff812352c0 T sdhc_host_ocr ffffffff812352f0 T sdhc_host_maxblklen @@ -16045,63 +16045,63 @@ ffffffff8185faf0 T ixgbe_free_receive_structures ffffffff8185fbc0 T ixgbe_free_pci_resources ffffffff8185fcb0 T ixgbe_stop ffffffff81860040 T ixgbe_init -ffffffff81860e70 T ixgbe_start -ffffffff81861080 T ixgbe_encap -ffffffff81861500 T ixgbe_ioctl -ffffffff818618e0 T ixgbe_rxrinfo -ffffffff81861a50 T ixgbe_get_sffpage -ffffffff81861c20 T ixgbe_disable_intr -ffffffff81861d10 T ixgbe_iff -ffffffff81861ea0 T ixgbe_enable_intr -ffffffff81861fc0 T ixgbe_enable_queues -ffffffff818620d0 T ixgbe_watchdog -ffffffff81862310 T ixgbe_setup_transmit_structures -ffffffff818623f0 T ixgbe_initialize_transmit_units -ffffffff81862730 T ixgbe_setup_receive_structures -ffffffff81862870 T ixgbe_initialize_receive_units -ffffffff81862df0 T ixgbe_config_gpie -ffffffff81862ed0 T ixgbe_setup_vlan_hw_support -ffffffff81863070 T ixgbe_configure_ivars -ffffffff81863250 T ixgbe_set_ivar -ffffffff81863410 T ixgbe_config_link -ffffffff81863600 T ixgbe_config_delay_values -ffffffff81863720 t ix_kstats_tick -ffffffff81863820 T ixgbe_enable_queue -ffffffff818638f0 T ixgbe_disable_queue -ffffffff818639c0 T ixgbe_link_intr -ffffffff818639d0 T ixgbe_intr -ffffffff81863f70 T ixgbe_queue_intr -ffffffff818640f0 T ixgbe_rxeof -ffffffff818644e0 T ixgbe_txeof -ffffffff818646a0 T ixgbe_rxrefill -ffffffff81864760 T ixgbe_legacy_intr -ffffffff81864940 T ixgbe_update_link_status -ffffffff81864aa0 T ixgbe_handle_mod -ffffffff81864bf0 T ixgbe_handle_msf -ffffffff81864ce0 T ixgbe_handle_phy -ffffffff81864d70 T ixgbe_media_status -ffffffff81864f80 T ixgbe_media_change -ffffffff81865030 T ixgbe_mc_array_itr -ffffffff81865070 T ixgbe_setup_msix -ffffffff81865110 T ixgbe_add_media_types -ffffffff81865410 T ixgbe_dma_malloc -ffffffff81865660 T ixgbe_dma_free -ffffffff81865740 T ixgbe_allocate_transmit_buffers -ffffffff81865880 T ixgbe_setup_transmit_ring -ffffffff81865a10 T ixgbe_free_transmit_buffers -ffffffff81865b60 T ixgbe_get_buf -ffffffff81865cd0 T ixgbe_allocate_receive_buffers -ffffffff81865e30 T ixgbe_setup_receive_ring -ffffffff81865f50 T ixgbe_rxfill -ffffffff818660c0 T ixgbe_initialize_rss_mapping -ffffffff818663b0 T ixgbe_map_queue_statistics -ffffffff818664e0 T ixgbe_free_receive_buffers -ffffffff81866630 T ixgbe_rx_offload -ffffffff81866810 T ixgbe_read_pci_cfg -ffffffff81866870 T ixgbe_write_pci_cfg -ffffffff818668f0 t ix_kstats_read -ffffffff81866ae0 t ix_rxq_kstats_read -ffffffff81866c80 t ix_txq_kstats_read +ffffffff81860e60 T ixgbe_start +ffffffff81861070 T ixgbe_encap +ffffffff818614f0 T ixgbe_ioctl +ffffffff818618d0 T ixgbe_rxrinfo +ffffffff81861a40 T ixgbe_get_sffpage +ffffffff81861c10 T ixgbe_disable_intr +ffffffff81861d00 T ixgbe_iff +ffffffff81861e90 T ixgbe_enable_intr +ffffffff81861fb0 T ixgbe_enable_queues +ffffffff818620c0 T ixgbe_watchdog +ffffffff81862320 T ixgbe_setup_transmit_structures +ffffffff81862400 T ixgbe_initialize_transmit_units +ffffffff81862750 T ixgbe_setup_receive_structures +ffffffff81862890 T ixgbe_initialize_receive_units +ffffffff81862e40 T ixgbe_config_gpie +ffffffff81862f20 T ixgbe_setup_vlan_hw_support +ffffffff818630c0 T ixgbe_configure_ivars +ffffffff818632a0 T ixgbe_set_ivar +ffffffff81863460 T ixgbe_config_link +ffffffff81863650 T ixgbe_config_delay_values +ffffffff81863770 t ix_kstats_tick +ffffffff81863870 T ixgbe_enable_queue +ffffffff81863940 T ixgbe_disable_queue +ffffffff81863a10 T ixgbe_link_intr +ffffffff81863a20 T ixgbe_intr +ffffffff81863fc0 T ixgbe_queue_intr +ffffffff81864130 T ixgbe_rxeof +ffffffff81864520 T ixgbe_txeof +ffffffff818646e0 T ixgbe_rxrefill +ffffffff81864790 T ixgbe_legacy_intr +ffffffff81864960 T ixgbe_update_link_status +ffffffff81864ac0 T ixgbe_handle_mod +ffffffff81864c10 T ixgbe_handle_msf +ffffffff81864d00 T ixgbe_handle_phy +ffffffff81864d90 T ixgbe_media_status +ffffffff81864fa0 T ixgbe_media_change +ffffffff81865050 T ixgbe_mc_array_itr +ffffffff81865090 T ixgbe_setup_msix +ffffffff81865130 T ixgbe_add_media_types +ffffffff81865430 T ixgbe_dma_malloc +ffffffff81865680 T ixgbe_dma_free +ffffffff81865760 T ixgbe_allocate_transmit_buffers +ffffffff818658a0 T ixgbe_setup_transmit_ring +ffffffff81865a30 T ixgbe_free_transmit_buffers +ffffffff81865b80 T ixgbe_get_buf +ffffffff81865cf0 T ixgbe_allocate_receive_buffers +ffffffff81865e50 T ixgbe_setup_receive_ring +ffffffff81865f70 T ixgbe_rxfill +ffffffff818660e0 T ixgbe_initialize_rss_mapping +ffffffff818663d0 T ixgbe_map_queue_statistics +ffffffff81866500 T ixgbe_free_receive_buffers +ffffffff81866650 T ixgbe_rx_offload +ffffffff81866830 T ixgbe_read_pci_cfg +ffffffff81866890 T ixgbe_write_pci_cfg +ffffffff81866910 t ix_kstats_read +ffffffff81866b00 t ix_rxq_kstats_read +ffffffff81866ca0 t ix_txq_kstats_read ffffffff81867000 T ixgbe_init_ops_generic ffffffff81867270 T ixgbe_init_eeprom_params_generic ffffffff81867330 T ixgbe_read_eerd_generic @@ -17791,32 +17791,32 @@ ffffffff819444b0 T iwx_activate ffffffff81945000 T qwx_pci_match ffffffff81945030 T qwx_pci_attach ffffffff81945d30 T qwx_pci_detach -ffffffff81945fa0 T qwx_pci_init_qmi_ce_config -ffffffff81945fc0 T qwx_pcic_init_msi_config -ffffffff81946070 T qwx_pci_alloc_msi -ffffffff81946170 T qwx_pcic_map_service_to_pipe -ffffffff81946270 T qwx_pcic_get_user_msi_vector -ffffffff81946360 T qwx_pcic_read32 -ffffffff81946460 T qwx_pcic_write32 -ffffffff81946570 T qwx_pci_start -ffffffff81946690 T qwx_pci_stop -ffffffff81946710 T qwx_pci_power_up -ffffffff81946870 T qwx_pci_power_down -ffffffff81946b10 T qwx_mhi_submit_xfer -ffffffff81946db0 T qwx_pcic_ext_irq_enable -ffffffff81946de0 T qwx_pcic_ext_irq_disable -ffffffff81946e10 T qwx_pci_intr -ffffffff81947180 T qwx_pci_intr_mhi_ctrl -ffffffff819471d0 T qwx_pci_intr_mhi_data -ffffffff81947220 T qwx_pci_read_hw_version -ffffffff819472a0 T qwx_pci_alloc_event_rings -ffffffff81947520 T qwx_pci_init_cmd_ring -ffffffff819475b0 T qwx_mhi_register -ffffffff819475e0 T qwx_pcic_config_irq -ffffffff81947890 T qwx_pci_attach_hook -ffffffff819478e0 T qwx_pci_free_cmd_ring -ffffffff81947960 T qwx_pci_free_event_rings -ffffffff81947a60 T qwx_pci_free_xfer_rings +ffffffff81946000 T qwx_pci_init_qmi_ce_config +ffffffff81946020 T qwx_pcic_init_msi_config +ffffffff819460d0 T qwx_pci_alloc_msi +ffffffff819461d0 T qwx_pcic_map_service_to_pipe +ffffffff819462d0 T qwx_pcic_get_user_msi_vector +ffffffff819463c0 T qwx_pcic_read32 +ffffffff819464c0 T qwx_pcic_write32 +ffffffff819465d0 T qwx_pci_start +ffffffff819466f0 T qwx_pci_stop +ffffffff81946770 T qwx_pci_power_up +ffffffff819468d0 T qwx_pci_power_down +ffffffff81946b70 T qwx_mhi_submit_xfer +ffffffff81946e20 T qwx_pcic_ext_irq_enable +ffffffff81946e50 T qwx_pcic_ext_irq_disable +ffffffff81946e80 T qwx_pci_intr +ffffffff819471f0 T qwx_pci_intr_mhi_ctrl +ffffffff81947240 T qwx_pci_intr_mhi_data +ffffffff81947290 T qwx_pci_read_hw_version +ffffffff81947310 T qwx_pci_alloc_event_rings +ffffffff81947590 T qwx_pci_init_cmd_ring +ffffffff81947620 T qwx_mhi_register +ffffffff81947650 T qwx_pcic_config_irq +ffffffff81947900 T qwx_pci_attach_hook +ffffffff81947950 T qwx_pci_free_cmd_ring +ffffffff819479d0 T qwx_pci_free_event_rings +ffffffff81947ad0 T qwx_pci_free_xfer_rings ffffffff81947b50 T qwx_pci_alloc_xfer_ring ffffffff81947ea0 T qwx_pci_alloc_xfer_rings_qca6390 ffffffff81947fd0 T qwx_pci_alloc_xfer_rings_qcn9074 @@ -17861,35 +17861,35 @@ ffffffff8194a9b0 T qwx_mhi_stop ffffffff8194a9d0 T qwx_mhi_unregister ffffffff8194aa00 T qwx_mhi_ring_doorbell ffffffff8194aa70 T qwx_mhi_init_xfer_rings -ffffffff8194abe0 T qwx_mhi_init_event_rings -ffffffff8194ad30 T qwx_mhi_init_cmd_ring -ffffffff8194adb0 T qwx_mhi_init_dev_ctxt -ffffffff8194af80 T qwx_pci_cmd_ring_get_elem -ffffffff8194afe0 T qwx_mhi_cmd_ring_submit -ffffffff8194b130 T qwx_mhi_send_cmd -ffffffff8194b210 T qwx_pci_xfer_ring_get_elem -ffffffff8194b260 T qwx_pci_xfer_ring_get_data -ffffffff8194b2b0 T qwx_mhi_start_channel -ffffffff8194b5c0 T qwx_mhi_start_channels -ffffffff8194b6f0 T qwx_rddm_prepare -ffffffff8194b9c0 T qwx_mhi_fw_load_handler -ffffffff8194bc30 T qwx_mhi_await_device_reset -ffffffff8194bd00 T qwx_mhi_fw_load_bhi -ffffffff8194bfa0 T qwx_mhi_fw_load_bhie -ffffffff8194c370 T qwx_mhi_await_device_ready -ffffffff8194c510 T qwx_mhi_ready_state_transition -ffffffff8194c710 T qwx_mhi_init_mmio -ffffffff8194ca90 T qwx_mhi_set_state -ffffffff8194cb10 T qwx_mhi_mission_mode_state_transition -ffffffff8194cc90 T qwx_mhi_low_power_mode_state_transition -ffffffff8194cd00 T qwx_pci_event_ring_get_elem -ffffffff8194cd50 T qwx_mhi_state_change -ffffffff8194d100 T qwx_pci_intr_ctrl_event_mhi -ffffffff8194d140 T qwx_pci_intr_ctrl_event_ee -ffffffff8194d180 T qwx_pci_intr_ctrl_event_cmd_complete -ffffffff8194d2d0 T qwx_pci_intr_ctrl_event +ffffffff8194ab70 T qwx_mhi_init_event_rings +ffffffff8194acc0 T qwx_mhi_init_cmd_ring +ffffffff8194ad40 T qwx_mhi_init_dev_ctxt +ffffffff8194af10 T qwx_pci_cmd_ring_get_elem +ffffffff8194af70 T qwx_mhi_cmd_ring_submit +ffffffff8194b0c0 T qwx_mhi_send_cmd +ffffffff8194b1a0 T qwx_pci_xfer_ring_get_elem +ffffffff8194b1f0 T qwx_pci_xfer_ring_get_data +ffffffff8194b240 T qwx_mhi_start_channel +ffffffff8194b550 T qwx_mhi_start_channels +ffffffff8194b680 T qwx_rddm_prepare +ffffffff8194b950 T qwx_mhi_fw_load_handler +ffffffff8194bbc0 T qwx_mhi_await_device_reset +ffffffff8194bc90 T qwx_mhi_fw_load_bhi +ffffffff8194bf30 T qwx_mhi_fw_load_bhie +ffffffff8194c300 T qwx_mhi_await_device_ready +ffffffff8194c4a0 T qwx_mhi_ready_state_transition +ffffffff8194c6a0 T qwx_mhi_init_mmio +ffffffff8194ca00 T qwx_mhi_set_state +ffffffff8194ca80 T qwx_mhi_mission_mode_state_transition +ffffffff8194cc00 T qwx_mhi_low_power_mode_state_transition +ffffffff8194cc70 T qwx_pci_event_ring_get_elem +ffffffff8194ccc0 T qwx_mhi_state_change +ffffffff8194d070 T qwx_pci_intr_ctrl_event_mhi +ffffffff8194d0b0 T qwx_pci_intr_ctrl_event_ee +ffffffff8194d0f0 T qwx_pci_intr_ctrl_event_cmd_complete +ffffffff8194d210 T qwx_pci_intr_ctrl_event ffffffff8194d580 T qwx_pci_intr_data_event_tx -ffffffff8194d940 T qwx_pci_intr_data_event +ffffffff8194d920 T qwx_pci_intr_data_event ffffffff8194e000 T cmpci_match ffffffff8194e030 T cmpci_attach ffffffff8194e610 T cmpci_activate @@ -18857,12988 +18857,12976 @@ ffffffff819dee20 T bnxt_hwrm_err_map ffffffff819dee60 T _bnxt_hwrm_set_async_event_bit ffffffff819df000 t mcx_match ffffffff819df030 t mcx_attach -ffffffff819dff50 T mcx_rx_fill -ffffffff819e01f0 T mcx_load_mbuf -ffffffff819e02c0 t mcx_dmamem_alloc -ffffffff819e0450 t mcx_init_wait -ffffffff819e04f0 t mcx_enable_hca -ffffffff819e0710 t mcx_issi -ffffffff819e0b20 t mcx_pages -ffffffff819e1620 t mcx_hca_max_caps -ffffffff819e1c50 t mcx_hca_set_caps -ffffffff819e21e0 t mcx_init_hca -ffffffff819e23f0 t mcx_set_driver_version -ffffffff819e27f0 t mcx_iff -ffffffff819e2ce0 t mcx_alloc_uar -ffffffff819e2f20 t mcx_alloc_pd -ffffffff819e3150 t mcx_alloc_tdomain -ffffffff819e3380 t mcx_admin_intr -ffffffff819e3570 t mcx_create_eq -ffffffff819e3bf0 t mcx_query_nic_vport_context -ffffffff819e4040 t mcx_query_special_contexts -ffffffff819e4270 t mcx_set_port_mtu -ffffffff819e43a0 t mcx_ioctl -ffffffff819e6b70 t mcx_start -ffffffff819e7100 t mcx_watchdog -ffffffff819e7130 t mcx_media_change -ffffffff819e74a0 t mcx_media_status -ffffffff819e7660 t mcx_media_add_types -ffffffff819e77f0 t mcx_refill -ffffffff819e7860 t mcx_cq_intr -ffffffff819e7ee0 t mcx_calibrate -ffffffff819e80c0 t mcx_port_change -ffffffff819e82d0 t mcx_kstat_attach -ffffffff819e8740 t mcx_teardown_hca -ffffffff819e8970 t mcx_dmamem_free -ffffffff819e8a00 t mcx_set_issi -ffffffff819e8bf0 t mcx_set_flow_table_entry_mac -ffffffff819e9140 t mcx_delete_flow_table_entry -ffffffff819e9650 t mcx_access_hca_reg -ffffffff819e9b20 t mcx_cmdq_exec -ffffffff819e9de0 t mcx_down -ffffffff819eb040 t mcx_create_flow_table -ffffffff819eb490 t mcx_create_flow_group -ffffffff819eb9e0 t mcx_set_flow_table_root -ffffffff819ebde0 t mcx_create_rqt -ffffffff819ec2d0 t mcx_create_tir_direct -ffffffff819ec680 t mcx_create_tir_indirect -ffffffff819eca60 t mcx_set_flow_table_entry_proto -ffffffff819ecfb0 t mcx_ready_sq -ffffffff819ed3c0 t mcx_ready_rq -ffffffff819ed7d0 t mcx_calibrate_first -ffffffff819ed900 t mcx_create_rq -ffffffff819edf10 t mcx_destroy_sq -ffffffff819ee250 t mcx_destroy_cq -ffffffff819ee590 t mcx_destroy_flow_table -ffffffff819ee980 t mcx_kstat_attach_ppcnt -ffffffff819eead0 t mcx_kstat_ppcnt_read -ffffffff819eec00 t mcx_kstat_mtmp_read -ffffffff819eeda0 t mcx_kstat_queue_read -ffffffff819eff80 t mcx_timecounter_read -ffffffff819f0000 t iavf_match -ffffffff819f0030 t iavf_attach -ffffffff819f0ad0 t iavf_reset -ffffffff819f0e50 t iavf_dmamem_alloc -ffffffff819f0fe0 t iavf_arq_fill -ffffffff819f12e0 t iavf_arq_timeout -ffffffff819f1310 t iavf_init_admin_queue -ffffffff819f1520 t iavf_get_version -ffffffff819f1790 t iavf_get_vf_resources -ffffffff819f19c0 t iavf_config_irq_map -ffffffff819f1c00 t iavf_intr -ffffffff819f2380 t iavf_ioctl -ffffffff819f2a00 t iavf_start -ffffffff819f2db0 t iavf_watchdog -ffffffff819f2de0 t iavf_media_change -ffffffff819f2e10 t iavf_media_status -ffffffff819f2ea0 t iavf_dmamem_free -ffffffff819f2f30 t iavf_arq_unfill -ffffffff819f3050 t iavf_down -ffffffff819f34c0 t iavf_up -ffffffff819f40a0 t iavf_queue_select -ffffffff819f4320 t iavf_txr_free -ffffffff819f4460 t iavf_rxr_free -ffffffff819f45a0 t iavf_rxfill -ffffffff819f4900 t iavf_rxrefill -ffffffff819f4920 t iavf_process_arq -ffffffff819f4e00 t iavf_add_del_addr -ffffffff819f6000 T rge_match -ffffffff819f6030 T rge_attach -ffffffff819f6610 T rge_activate -ffffffff819f6750 T rge_intr -ffffffff819f6ad0 T rge_config_imtype -ffffffff819f6b40 T rge_chipinit -ffffffff819f6cb0 T rge_get_macaddr -ffffffff819f6ef0 T rge_allocmem -ffffffff819f7390 T rge_ioctl -ffffffff819f7580 T rge_start -ffffffff819f7b30 T rge_watchdog -ffffffff819f7b80 T rge_wol -ffffffff819f7e40 T rge_tick -ffffffff819f7ee0 T rge_txstart -ffffffff819f7f10 T rge_ifmedia_upd -ffffffff819f8760 T rge_ifmedia_sts -ffffffff819f8870 T rge_add_media_types -ffffffff819f89d0 T rge_kstat_attach -ffffffff819f8d20 T rge_wol_power -ffffffff819f8e30 T rge_rxeof -ffffffff819f9340 T rge_txeof -ffffffff819f9600 T rge_init -ffffffff819fb4e0 T rge_setup_intr -ffffffff819fb690 T rge_stop -ffffffff819fba20 T rge_iff -ffffffff819fbbb0 T rge_set_macaddr -ffffffff819fbcb0 T rge_rx_list_init -ffffffff819fbda0 T rge_tx_list_init -ffffffff819fbe90 T rge_phy_config -ffffffff819fd170 T rge_disable_aspm_clkreq -ffffffff819fd2d0 T rge_read_csi -ffffffff819fd3b0 T rge_write_csi -ffffffff819fd4a0 T rge_write_mac_ocp -ffffffff819fd4f0 T rge_read_mac_ocp -ffffffff819fd580 T rge_hw_reset -ffffffff819fd6c0 T rge_write_phy_ocp -ffffffff819fd7a0 T rge_read_phy_ocp -ffffffff819fd870 T rge_read_phy -ffffffff819fd960 T rge_write_phy -ffffffff819fda60 T rge_get_link_status -ffffffff819fdac0 T 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psp_v12_0_mode1_reset -ffffffff82090b10 t psp_v12_0_ring_get_wptr -ffffffff82090b80 t psp_v12_0_ring_set_wptr -ffffffff82091000 T psp_v13_0_set_psp_funcs -ffffffff82091030 t psp_v13_0_init_microcode -ffffffff82091160 t psp_v13_0_wait_for_bootloader_steady_state -ffffffff82091290 t psp_v13_0_bootloader_load_kdb -ffffffff820912b0 t psp_v13_0_bootloader_load_spl -ffffffff820912d0 t psp_v13_0_bootloader_load_sysdrv -ffffffff820912f0 t psp_v13_0_bootloader_load_soc_drv -ffffffff82091310 t psp_v13_0_bootloader_load_intf_drv -ffffffff82091330 t psp_v13_0_bootloader_load_dbg_drv -ffffffff82091350 t psp_v13_0_bootloader_load_ras_drv -ffffffff82091370 t psp_v13_0_bootloader_load_sos -ffffffff82091830 t psp_v13_0_ring_create -ffffffff820920b0 t psp_v13_0_ring_stop -ffffffff820925b0 t psp_v13_0_ring_destroy -ffffffff82092640 t psp_v13_0_memory_training -ffffffff82092b20 t psp_v13_0_ring_get_wptr -ffffffff82092b90 t psp_v13_0_ring_set_wptr -ffffffff82092ca0 t psp_v13_0_load_usbc_pd_fw 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-ffffffff820954c0 t psp_v13_0_4_ring_set_wptr -ffffffff820955e0 t psp_v13_0_4_bootloader_load_component -ffffffff820957f0 t psp_v13_0_4_wait_for_bootloader -ffffffff82096000 T psp_v3_1_set_psp_funcs -ffffffff82096030 t psp_v3_1_init_microcode -ffffffff820960f0 t psp_v3_1_bootloader_load_sysdrv -ffffffff82096510 t psp_v3_1_bootloader_load_sos -ffffffff82096980 t psp_v3_1_ring_create -ffffffff82097840 t psp_v3_1_ring_stop -ffffffff82097b20 t psp_v3_1_ring_destroy -ffffffff82097bb0 t psp_v3_1_smu_reload_quirk -ffffffff82097c00 t psp_v3_1_mode1_reset -ffffffff82097d30 t psp_v3_1_ring_get_wptr -ffffffff82097d80 t psp_v3_1_ring_set_wptr -ffffffff82098000 t sdma_v2_4_early_init -ffffffff820980f0 t sdma_v2_4_sw_init -ffffffff82098520 t sdma_v2_4_sw_fini -ffffffff820985f0 t sdma_v2_4_hw_init -ffffffff82098aa0 t sdma_v2_4_hw_fini -ffffffff82098af0 t sdma_v2_4_suspend -ffffffff82098b40 t sdma_v2_4_resume -ffffffff82098b50 t sdma_v2_4_is_idle -ffffffff82098ba0 t sdma_v2_4_wait_for_idle -ffffffff82098c50 t sdma_v2_4_soft_reset -ffffffff82098e00 t sdma_v2_4_set_clockgating_state -ffffffff82098e30 t sdma_v2_4_set_powergating_state -ffffffff82098e60 t sdma_v2_4_ring_get_rptr -ffffffff82098ea0 t sdma_v2_4_ring_get_wptr -ffffffff82098f00 t sdma_v2_4_ring_set_wptr -ffffffff82098f40 t sdma_v2_4_ring_emit_ib -ffffffff82099220 t sdma_v2_4_ring_emit_fence -ffffffff82099670 t sdma_v2_4_ring_emit_pipeline_sync -ffffffff82099920 t sdma_v2_4_ring_emit_vm_flush -ffffffff82099bd0 t sdma_v2_4_ring_emit_hdp_flush -ffffffff82099e80 t sdma_v2_4_ring_test_ring -ffffffff8209a1b0 t sdma_v2_4_ring_test_ib -ffffffff8209a3c0 t sdma_v2_4_ring_insert_nop -ffffffff8209a500 t sdma_v2_4_ring_pad_ib -ffffffff8209a630 t sdma_v2_4_ring_emit_wreg -ffffffff8209a790 t sdma_v2_4_emit_copy_buffer -ffffffff8209a850 t sdma_v2_4_emit_fill_buffer -ffffffff8209a8e0 t sdma_v2_4_vm_copy_pte -ffffffff8209a9a0 t sdma_v2_4_vm_write_pte -ffffffff8209aa70 t sdma_v2_4_vm_set_pte_pde -ffffffff8209ab70 t sdma_v2_4_set_trap_irq_state -ffffffff8209ac60 t sdma_v2_4_process_trap_irq -ffffffff8209ad00 t sdma_v2_4_process_illegal_inst_irq -ffffffff8209ad80 t sdma_v2_4_enable -ffffffff8209b000 t sdma_v3_0_early_init -ffffffff8209b100 t sdma_v3_0_sw_init -ffffffff8209b530 t sdma_v3_0_sw_fini -ffffffff8209b600 t sdma_v3_0_hw_init -ffffffff8209b770 t sdma_v3_0_hw_fini -ffffffff8209b7d0 t sdma_v3_0_suspend -ffffffff8209b830 t sdma_v3_0_resume -ffffffff8209b840 t sdma_v3_0_is_idle -ffffffff8209b890 t sdma_v3_0_wait_for_idle -ffffffff8209b940 t sdma_v3_0_check_soft_reset -ffffffff8209b9a0 t sdma_v3_0_pre_soft_reset -ffffffff8209ba00 t sdma_v3_0_soft_reset -ffffffff8209bb00 t sdma_v3_0_post_soft_reset -ffffffff8209bb50 t sdma_v3_0_set_clockgating_state -ffffffff8209be00 t sdma_v3_0_set_powergating_state -ffffffff8209be30 t sdma_v3_0_get_clockgating_state -ffffffff8209bed0 t sdma_v3_0_ring_get_rptr -ffffffff8209bf10 t sdma_v3_0_ring_get_wptr -ffffffff8209bf90 t sdma_v3_0_ring_set_wptr -ffffffff8209c040 t sdma_v3_0_ring_emit_ib -ffffffff8209c320 t sdma_v3_0_ring_emit_fence -ffffffff8209c770 t sdma_v3_0_ring_emit_pipeline_sync -ffffffff8209ca20 t sdma_v3_0_ring_emit_vm_flush -ffffffff8209ccd0 t sdma_v3_0_ring_emit_hdp_flush -ffffffff8209cf80 t sdma_v3_0_ring_test_ring -ffffffff8209d2b0 t sdma_v3_0_ring_test_ib -ffffffff8209d4c0 t sdma_v3_0_ring_insert_nop -ffffffff8209d600 t sdma_v3_0_ring_pad_ib -ffffffff8209d730 t sdma_v3_0_ring_emit_wreg -ffffffff8209d890 t sdma_v3_0_emit_copy_buffer -ffffffff8209d950 t sdma_v3_0_emit_fill_buffer -ffffffff8209d9e0 t sdma_v3_0_vm_copy_pte -ffffffff8209daa0 t sdma_v3_0_vm_write_pte -ffffffff8209db70 t sdma_v3_0_vm_set_pte_pde -ffffffff8209dc70 t sdma_v3_0_set_trap_irq_state -ffffffff8209dd60 t sdma_v3_0_process_trap_irq -ffffffff8209de00 t sdma_v3_0_process_illegal_inst_irq -ffffffff8209de80 t sdma_v3_0_ctx_switch_enable -ffffffff8209e050 t sdma_v3_0_enable -ffffffff8209e200 t sdma_v3_0_gfx_resume -ffffffff8209f000 t sdma_v4_0_early_init -ffffffff8209f2f0 t sdma_v4_0_late_init -ffffffff8209f5b0 t sdma_v4_0_sw_init -ffffffff8209fa60 t sdma_v4_0_sw_fini -ffffffff8209fb30 t sdma_v4_0_hw_init -ffffffff820a2cf0 t sdma_v4_0_hw_fini -ffffffff820a2df0 t sdma_v4_0_suspend -ffffffff820a2e50 t sdma_v4_0_resume -ffffffff820a2ee0 t sdma_v4_0_is_idle -ffffffff820a3010 t sdma_v4_0_wait_for_idle -ffffffff820a31c0 t sdma_v4_0_soft_reset -ffffffff820a31f0 t sdma_v4_0_set_clockgating_state -ffffffff820a3720 t sdma_v4_0_set_powergating_state -ffffffff820a3800 t sdma_v4_0_get_clockgating_state -ffffffff820a38b0 t sdma_v4_0_query_ras_error_count -ffffffff820a3aa0 t sdma_v4_0_reset_ras_error_count -ffffffff820a3c20 t sdma_v4_0_ring_get_rptr -ffffffff820a3c80 t sdma_v4_0_ring_get_wptr -ffffffff820a3e90 t sdma_v4_0_ring_set_wptr -ffffffff820a4140 t sdma_v4_0_ring_emit_ib -ffffffff820a4420 t sdma_v4_0_ring_emit_fence -ffffffff820a4890 t sdma_v4_0_ring_emit_pipeline_sync -ffffffff820a48f0 t sdma_v4_0_ring_emit_vm_flush -ffffffff820a4910 t sdma_v4_0_ring_emit_hdp_flush -ffffffff820a49d0 t sdma_v4_0_ring_test_ring -ffffffff820a4d00 t sdma_v4_0_ring_test_ib -ffffffff820a4f10 t sdma_v4_0_ring_insert_nop -ffffffff820a5050 t sdma_v4_0_ring_pad_ib -ffffffff820a5180 t sdma_v4_0_ring_emit_wreg -ffffffff820a52e0 t sdma_v4_0_ring_emit_reg_wait -ffffffff820a5330 t sdma_v4_0_wait_reg_mem -ffffffff820a5680 t sdma_v4_0_page_ring_get_wptr -ffffffff820a5840 t sdma_v4_0_page_ring_set_wptr -ffffffff820a5a10 t sdma_v4_0_emit_copy_buffer -ffffffff820a5ad0 t sdma_v4_0_emit_fill_buffer -ffffffff820a5b60 t sdma_v4_0_vm_copy_pte -ffffffff820a5c20 t sdma_v4_0_vm_write_pte -ffffffff820a5cf0 t sdma_v4_0_vm_set_pte_pde -ffffffff820a5df0 t sdma_v4_0_set_trap_irq_state -ffffffff820a5fa0 t sdma_v4_0_process_trap_irq -ffffffff820a6100 t sdma_v4_0_process_illegal_inst_irq -ffffffff820a6220 t sdma_v4_0_set_ecc_irq_state -ffffffff820a63d0 t sdma_v4_0_process_vm_hole_irq -ffffffff820a6420 t sdma_v4_0_print_iv_entry -ffffffff820a6570 t sdma_v4_0_process_doorbell_invalid_irq -ffffffff820a65c0 t sdma_v4_0_process_pool_timeout_irq -ffffffff820a6610 t sdma_v4_0_process_srbm_write_irq -ffffffff820a6660 t sdma_v4_0_process_ras_data_cb -ffffffff820a66e0 t sdma_v4_0_ctx_switch_enable -ffffffff820a6e00 t sdma_v4_0_enable -ffffffff820a73f0 t sdma_v4_0_gfx_enable -ffffffff820a8000 t sdma_v4_4_query_ras_error_count -ffffffff820a82b0 t sdma_v4_4_reset_ras_error_count -ffffffff820a9000 t sdma_v4_4_2_early_init -ffffffff820a92b0 t sdma_v4_4_2_late_init -ffffffff820a9340 t sdma_v4_4_2_sw_init -ffffffff820a9920 t sdma_v4_4_2_sw_fini -ffffffff820a99f0 t sdma_v4_4_2_hw_init -ffffffff820a9a40 t sdma_v4_4_2_hw_fini -ffffffff820a9b20 t sdma_v4_4_2_suspend -ffffffff820a9c30 t sdma_v4_4_2_resume -ffffffff820a9c80 t sdma_v4_4_2_is_idle -ffffffff820a9d30 t sdma_v4_4_2_wait_for_idle -ffffffff820a9e60 t sdma_v4_4_2_soft_reset -ffffffff820a9e90 t sdma_v4_4_2_set_clockgating_state -ffffffff820aa350 t sdma_v4_4_2_set_powergating_state -ffffffff820aa380 t sdma_v4_4_2_get_clockgating_state -ffffffff820aa480 t sdma_v4_4_2_xcp_suspend -ffffffff820aa570 t sdma_v4_4_2_xcp_resume -ffffffff820aa5b0 t sdma_v4_4_2_ring_get_rptr -ffffffff820aa630 t sdma_v4_4_2_ring_get_wptr -ffffffff820aa790 t sdma_v4_4_2_ring_set_wptr -ffffffff820aa990 t sdma_v4_4_2_ring_emit_ib -ffffffff820aac70 t sdma_v4_4_2_ring_emit_fence -ffffffff820ab0e0 t sdma_v4_4_2_ring_emit_pipeline_sync -ffffffff820ab140 t sdma_v4_4_2_ring_emit_vm_flush -ffffffff820ab160 t sdma_v4_4_2_ring_emit_hdp_flush -ffffffff820ab230 t sdma_v4_4_2_ring_test_ring -ffffffff820ab560 t sdma_v4_4_2_ring_test_ib -ffffffff820ab770 t sdma_v4_4_2_ring_insert_nop -ffffffff820ab8b0 t sdma_v4_4_2_ring_pad_ib -ffffffff820ab9e0 t sdma_v4_4_2_ring_emit_wreg -ffffffff820abb40 t sdma_v4_4_2_ring_emit_reg_wait -ffffffff820abb90 t sdma_v4_4_2_wait_reg_mem -ffffffff820abee0 t sdma_v4_4_2_page_ring_get_wptr -ffffffff820ac000 t sdma_v4_4_2_page_ring_set_wptr -ffffffff820ac130 t sdma_v4_4_2_emit_copy_buffer -ffffffff820ac1f0 t sdma_v4_4_2_emit_fill_buffer -ffffffff820ac280 t sdma_v4_4_2_vm_copy_pte -ffffffff820ac340 t sdma_v4_4_2_vm_write_pte -ffffffff820ac410 t sdma_v4_4_2_vm_set_pte_pde -ffffffff820ac510 t sdma_v4_4_2_set_trap_irq_state -ffffffff820ac610 t sdma_v4_4_2_process_trap_irq -ffffffff820ac740 t sdma_v4_4_2_process_illegal_inst_irq -ffffffff820ac7e0 t sdma_v4_4_2_set_ecc_irq_state -ffffffff820ac8f0 t sdma_v4_4_2_process_vm_hole_irq -ffffffff820ac9e0 t sdma_v4_4_2_process_doorbell_invalid_irq -ffffffff820acad0 t sdma_v4_4_2_process_pool_timeout_irq -ffffffff820acbc0 t sdma_v4_4_2_process_srbm_write_irq -ffffffff820accb0 t sdma_v4_4_2_query_ras_error_count -ffffffff820ace30 t sdma_v4_4_2_reset_ras_error_count -ffffffff820acfa0 t sdma_v4_4_2_inst_init_golden_registers -ffffffff820ad170 t sdma_v4_4_2_inst_start -ffffffff820ae9a0 t sdma_v4_4_2_inst_ctx_switch_enable -ffffffff820aecf0 t sdma_v4_4_2_inst_enable -ffffffff820b0000 t sdma_v5_0_early_init -ffffffff820b0130 t sdma_v5_0_sw_init -ffffffff820b0350 t sdma_v5_0_sw_fini -ffffffff820b03f0 t sdma_v5_0_hw_init -ffffffff820b18c0 t sdma_v5_0_hw_fini -ffffffff820b1930 t sdma_v5_0_suspend -ffffffff820b19a0 t sdma_v5_0_resume -ffffffff820b19b0 t sdma_v5_0_is_idle -ffffffff820b1a50 t sdma_v5_0_wait_for_idle -ffffffff820b1b30 t sdma_v5_0_soft_reset -ffffffff820b1b60 t sdma_v5_0_set_clockgating_state -ffffffff820b1d80 t sdma_v5_0_set_powergating_state -ffffffff820b1db0 t sdma_v5_0_get_clockgating_state -ffffffff820b1e60 t sdma_v5_0_ring_get_rptr -ffffffff820b1ec0 t sdma_v5_0_ring_get_wptr -ffffffff820b2080 t sdma_v5_0_ring_set_wptr -ffffffff820b2430 t sdma_v5_0_ring_emit_ib -ffffffff820b2730 t sdma_v5_0_ring_emit_fence -ffffffff820b2be0 t sdma_v5_0_ring_emit_pipeline_sync -ffffffff820b2e90 t sdma_v5_0_ring_emit_vm_flush -ffffffff820b2eb0 t sdma_v5_0_ring_emit_hdp_flush -ffffffff820b3180 t sdma_v5_0_ring_test_ring -ffffffff820b35b0 t sdma_v5_0_ring_test_ib -ffffffff820b3940 t sdma_v5_0_ring_insert_nop -ffffffff820b3a80 t sdma_v5_0_ring_pad_ib -ffffffff820b3bb0 t sdma_v5_0_ring_init_cond_exec -ffffffff820b3e00 t sdma_v5_0_ring_patch_cond_exec -ffffffff820b3ec0 t sdma_v5_0_ring_emit_wreg -ffffffff820b4020 t sdma_v5_0_ring_emit_reg_wait -ffffffff820b42c0 t sdma_v5_0_ring_emit_reg_write_reg_wait -ffffffff820b4350 t sdma_v5_0_ring_preempt_ib -ffffffff820b44e0 t sdma_v5_0_ring_emit_mem_sync -ffffffff820b4710 t sdma_v5_0_emit_copy_buffer -ffffffff820b47d0 t sdma_v5_0_emit_fill_buffer -ffffffff820b4860 t sdma_v5_0_vm_copy_pte -ffffffff820b4920 t sdma_v5_0_vm_write_pte -ffffffff820b49f0 t sdma_v5_0_vm_set_pte_pde -ffffffff820b4af0 t sdma_v5_0_set_trap_irq_state -ffffffff820b4b90 t sdma_v5_0_process_trap_irq -ffffffff820b4cd0 t sdma_v5_0_process_illegal_inst_irq -ffffffff820b4d00 t sdma_v5_0_mqd_init -ffffffff820b4df0 t sdma_v5_0_ctx_switch_enable -ffffffff820b5170 t sdma_v5_0_enable -ffffffff820b6000 t sdma_v5_2_early_init -ffffffff820b6130 t sdma_v5_2_sw_init -ffffffff820b63f0 t sdma_v5_2_sw_fini -ffffffff820b6490 t sdma_v5_2_hw_init -ffffffff820b82c0 t sdma_v5_2_hw_fini -ffffffff820b8330 t sdma_v5_2_suspend -ffffffff820b83a0 t sdma_v5_2_resume -ffffffff820b83b0 t sdma_v5_2_is_idle -ffffffff820b8470 t sdma_v5_2_wait_for_idle -ffffffff820b85a0 t sdma_v5_2_soft_reset -ffffffff820b88c0 t sdma_v5_2_set_clockgating_state -ffffffff820b8c60 t sdma_v5_2_set_powergating_state -ffffffff820b8c90 t sdma_v5_2_get_clockgating_state -ffffffff820b8d40 t sdma_v5_2_ring_get_rptr -ffffffff820b8da0 t sdma_v5_2_ring_get_wptr -ffffffff820b8ef0 t sdma_v5_2_ring_set_wptr -ffffffff820b90d0 t sdma_v5_2_ring_emit_ib -ffffffff820b93d0 t sdma_v5_2_ring_emit_fence -ffffffff820b9880 t sdma_v5_2_ring_emit_pipeline_sync -ffffffff820b9b30 t sdma_v5_2_ring_emit_vm_flush -ffffffff820b9b50 t sdma_v5_2_ring_emit_hdp_flush -ffffffff820b9e50 t sdma_v5_2_ring_test_ring -ffffffff820ba280 t sdma_v5_2_ring_test_ib -ffffffff820ba610 t sdma_v5_2_ring_insert_nop -ffffffff820ba750 t sdma_v5_2_ring_pad_ib -ffffffff820ba880 t sdma_v5_2_ring_init_cond_exec -ffffffff820baad0 t sdma_v5_2_ring_patch_cond_exec -ffffffff820bab90 t sdma_v5_2_ring_begin_use -ffffffff820babb0 t sdma_v5_2_ring_end_use -ffffffff820babd0 t sdma_v5_2_ring_emit_wreg -ffffffff820bad30 t sdma_v5_2_ring_emit_reg_wait -ffffffff820bafd0 t sdma_v5_2_ring_emit_reg_write_reg_wait -ffffffff820bb060 t sdma_v5_2_ring_preempt_ib -ffffffff820bb220 t sdma_v5_2_ring_emit_mem_sync -ffffffff820bb450 t sdma_v5_2_emit_copy_buffer -ffffffff820bb510 t sdma_v5_2_emit_fill_buffer -ffffffff820bb5a0 t sdma_v5_2_vm_copy_pte -ffffffff820bb660 t sdma_v5_2_vm_write_pte -ffffffff820bb730 t sdma_v5_2_vm_set_pte_pde -ffffffff820bb830 t sdma_v5_2_set_trap_irq_state -ffffffff820bb8f0 t sdma_v5_2_process_trap_irq -ffffffff820bba60 t sdma_v5_2_process_illegal_inst_irq -ffffffff820bba90 t sdma_v5_2_mqd_init -ffffffff820bbb80 t sdma_v5_2_ctx_switch_enable -ffffffff820bbfd0 t sdma_v5_2_enable -ffffffff820bd000 t sdma_v6_0_early_init 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sdma_v6_0_ring_test_ib -ffffffff820bf970 t sdma_v6_0_ring_insert_nop -ffffffff820bfab0 t sdma_v6_0_ring_pad_ib -ffffffff820bfbe0 t sdma_v6_0_ring_init_cond_exec -ffffffff820bfe30 t sdma_v6_0_ring_patch_cond_exec -ffffffff820bfef0 t sdma_v6_0_ring_emit_wreg -ffffffff820c0050 t sdma_v6_0_ring_emit_reg_wait -ffffffff820c02f0 t sdma_v6_0_ring_emit_reg_write_reg_wait -ffffffff820c0380 t sdma_v6_0_ring_preempt_ib -ffffffff820c0510 t sdma_v6_0_ring_emit_mem_sync -ffffffff820c0740 t sdma_v6_0_emit_copy_buffer -ffffffff820c0800 t sdma_v6_0_emit_fill_buffer -ffffffff820c0890 t sdma_v6_0_vm_copy_pte -ffffffff820c0950 t sdma_v6_0_vm_write_pte -ffffffff820c0a20 t sdma_v6_0_vm_set_pte_pde -ffffffff820c0b20 t sdma_v6_0_set_trap_irq_state -ffffffff820c0bc0 t sdma_v6_0_process_trap_irq -ffffffff820c0d20 t sdma_v6_0_process_illegal_inst_irq -ffffffff820c0d50 t sdma_v6_0_mqd_init -ffffffff820c0e80 t sdma_v6_0_start -ffffffff820c11e0 t sdma_v6_0_enable -ffffffff820c1380 t sdma_v6_0_gfx_resume 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drm_atomic_get_old_private_obj_state +ffffffff81a34090 T drm_atomic_get_new_private_obj_state +ffffffff81a340f0 T drm_atomic_get_old_connector_for_encoder +ffffffff81a34160 T drm_atomic_get_new_connector_for_encoder +ffffffff81a341d0 T drm_atomic_get_old_crtc_for_encoder +ffffffff81a34270 T drm_atomic_get_new_crtc_for_encoder +ffffffff81a34310 T drm_atomic_get_connector_state +ffffffff81a34590 T drm_atomic_get_bridge_state +ffffffff81a345a0 T drm_atomic_get_old_bridge_state +ffffffff81a34600 T drm_atomic_get_new_bridge_state +ffffffff81a34660 T drm_atomic_add_encoder_bridges +ffffffff81a34740 T drm_atomic_add_affected_connectors +ffffffff81a348a0 T drm_atomic_add_affected_planes +ffffffff81a349d0 T drm_atomic_check_only +ffffffff81a35560 T drm_atomic_commit +ffffffff81a35640 T drm_atomic_print_new_state +ffffffff81a35850 T drm_atomic_nonblocking_commit +ffffffff81a35900 T __drm_atomic_helper_disable_plane +ffffffff81a35990 T __drm_atomic_helper_set_config +ffffffff81a35d90 t drm_atomic_plane_print_state +ffffffff81a36020 t drm_atomic_crtc_print_state +ffffffff81a362f0 t drm_atomic_connector_print_state +ffffffff81a36450 T drm_state_dump +ffffffff81a37000 T drm_atomic_helper_check_modeset +ffffffff81a37e00 t handle_conflicting_encoders +ffffffff81a38170 t mode_fixup +ffffffff81a384f0 T drm_atomic_helper_check_wb_encoder_state +ffffffff81a38560 T drm_atomic_helper_check_plane_state +ffffffff81a38980 T drm_atomic_helper_check_crtc_primary_plane +ffffffff81a38a30 T drm_atomic_helper_check_planes +ffffffff81a38d10 T drm_atomic_helper_check +ffffffff81a38de0 T drm_atomic_helper_async_check +ffffffff81a390e0 T drm_atomic_helper_update_legacy_modeset_state +ffffffff81a39350 T drm_atomic_helper_calc_timestamping_constants +ffffffff81a393f0 T drm_atomic_helper_commit_modeset_disables +ffffffff81a39ae0 T drm_atomic_helper_commit_modeset_enables +ffffffff81a39e00 T drm_atomic_helper_wait_for_fences +ffffffff81a3a010 T drm_atomic_helper_wait_for_vblanks +ffffffff81a3a3c0 T drm_atomic_helper_wait_for_flip_done +ffffffff81a3a5b0 T drm_atomic_helper_commit_tail +ffffffff81a3a780 T drm_atomic_helper_commit_planes +ffffffff81a3ab30 T drm_atomic_helper_fake_vblank +ffffffff81a3ac30 T drm_atomic_helper_commit_hw_done +ffffffff81a3ae50 T drm_atomic_helper_cleanup_planes +ffffffff81a3af00 T drm_atomic_helper_commit_tail_rpm +ffffffff81a3b0d0 t try_wait_for_completion +ffffffff81a3b140 T drm_atomic_helper_async_commit +ffffffff81a3b410 T drm_atomic_helper_commit +ffffffff81a3b710 T drm_atomic_helper_prepare_planes +ffffffff81a3b9e0 T drm_atomic_helper_unprepare_planes +ffffffff81a3baf0 T drm_atomic_helper_setup_commit +ffffffff81a3c2e0 t commit_work +ffffffff81a3c300 T drm_atomic_helper_swap_state +ffffffff81a3c9c0 t commit_tail +ffffffff81a3cc10 t release_crtc_commit +ffffffff81a3cc50 t crtc_or_fake_commit +ffffffff81a3cd80 T drm_atomic_helper_wait_for_dependencies +ffffffff81a3cfc0 T drm_atomic_helper_commit_cleanup_done +ffffffff81a3d2b0 T drm_atomic_helper_commit_planes_on_crtc +ffffffff81a3d560 T drm_atomic_helper_disable_planes_on_crtc +ffffffff81a3d6d0 T drm_atomic_helper_update_plane +ffffffff81a3d830 T drm_atomic_helper_disable_plane +ffffffff81a3d930 T drm_atomic_helper_set_config +ffffffff81a3da10 T drm_atomic_helper_disable_all +ffffffff81a3dc00 T drm_atomic_helper_shutdown +ffffffff81a3dd80 T drm_atomic_helper_duplicate_state +ffffffff81a3df10 T drm_atomic_helper_suspend +ffffffff81a3e0b0 T drm_atomic_helper_commit_duplicated_state +ffffffff81a3e200 T drm_atomic_helper_resume +ffffffff81a3e370 T drm_atomic_helper_page_flip +ffffffff81a3e450 t page_flip_common +ffffffff81a3e580 T drm_atomic_helper_page_flip_target +ffffffff81a3e6c0 T drm_atomic_helper_bridge_propagate_bus_fmt +ffffffff81a3e740 t set_best_encoder +ffffffff81a3f000 T __drm_atomic_helper_crtc_state_reset +ffffffff81a3f030 T __drm_atomic_helper_crtc_reset +ffffffff81a3f0a0 T drm_atomic_helper_crtc_reset +ffffffff81a3f150 T __drm_atomic_helper_crtc_duplicate_state +ffffffff81a3f230 T drm_atomic_helper_crtc_duplicate_state +ffffffff81a3f2f0 T __drm_atomic_helper_crtc_destroy_state +ffffffff81a3f3e0 T drm_atomic_helper_crtc_destroy_state +ffffffff81a3f420 T __drm_atomic_helper_plane_state_reset +ffffffff81a3f500 T __drm_atomic_helper_plane_reset +ffffffff81a3f560 T drm_atomic_helper_plane_reset +ffffffff81a3f670 T __drm_atomic_helper_plane_destroy_state +ffffffff81a3f6e0 T __drm_atomic_helper_plane_duplicate_state +ffffffff81a3f760 T drm_atomic_helper_plane_duplicate_state +ffffffff81a3f860 T drm_atomic_helper_plane_destroy_state +ffffffff81a3f8e0 T __drm_atomic_helper_connector_state_reset +ffffffff81a3f910 T __drm_atomic_helper_connector_reset +ffffffff81a3f950 T drm_atomic_helper_connector_reset +ffffffff81a3fa40 T __drm_atomic_helper_connector_destroy_state +ffffffff81a3faa0 T drm_atomic_helper_connector_tv_margins_reset +ffffffff81a3fb00 T drm_atomic_helper_connector_tv_reset +ffffffff81a3fd50 T drm_atomic_helper_connector_tv_check +ffffffff81a3fe30 T __drm_atomic_helper_connector_duplicate_state +ffffffff81a3fed0 T drm_atomic_helper_connector_duplicate_state +ffffffff81a3ffe0 T drm_atomic_helper_connector_destroy_state +ffffffff81a40050 T __drm_atomic_helper_private_obj_duplicate_state +ffffffff81a40090 T __drm_atomic_helper_bridge_duplicate_state +ffffffff81a400d0 T drm_atomic_helper_bridge_duplicate_state +ffffffff81a40190 T drm_atomic_helper_bridge_destroy_state +ffffffff81a401b0 T __drm_atomic_helper_bridge_reset +ffffffff81a40200 T drm_atomic_helper_bridge_reset +ffffffff81a41000 T drm_atomic_set_mode_for_crtc +ffffffff81a41250 T drm_atomic_set_mode_prop_for_crtc +ffffffff81a41530 T drm_atomic_set_crtc_for_plane +ffffffff81a416d0 T drm_atomic_set_fb_for_plane +ffffffff81a417c0 T drm_atomic_set_crtc_for_connector +ffffffff81a41950 T drm_atomic_get_property +ffffffff81a420f0 T drm_atomic_connector_commit_dpms +ffffffff81a42250 T drm_atomic_set_property +ffffffff81a42e50 T drm_mode_atomic_ioctl +ffffffff81a433d0 t prepare_signaling +ffffffff81a438f0 t complete_signaling +ffffffff81a43af0 t drm_atomic_replace_property_blob_from_id +ffffffff81a43c90 t drm_atomic_set_writeback_fb_for_connector +ffffffff81a43d00 t set_out_fence_for_connector +ffffffff81a44000 T drm_is_current_master +ffffffff81a44070 T drm_getmagic +ffffffff81a44160 T drm_authmagic +ffffffff81a44250 T drm_master_create +ffffffff81a44310 T drm_setmaster_ioctl +ffffffff81a443f0 t drm_new_set_master +ffffffff81a445e0 T drm_dropmaster_ioctl +ffffffff81a446f0 t drm_drop_master +ffffffff81a447d0 T drm_master_open +ffffffff81a448b0 T drm_master_get +ffffffff81a448e0 T drm_master_release +ffffffff81a449e0 T drm_master_put +ffffffff81a44aa0 T drm_file_get_master +ffffffff81a44b10 T drm_master_internal_acquire +ffffffff81a44b80 T drm_master_internal_release +ffffffff81a45000 T drm_plane_create_alpha_property +ffffffff81a450b0 T drm_plane_create_rotation_property +ffffffff81a45200 T drm_rotation_simplify +ffffffff81a45280 T drm_plane_create_zpos_property +ffffffff81a45350 T drm_plane_create_zpos_immutable_property +ffffffff81a45410 T drm_atomic_normalize_zpos +ffffffff81a45760 T drm_plane_create_blend_mode_property +ffffffff81a45940 t drm_atomic_state_zpos_cmp +ffffffff81a46000 T drm_bridge_add +ffffffff81a46080 T devm_drm_bridge_add +ffffffff81a46150 T drm_bridge_remove +ffffffff81a461c0 T drm_bridge_attach +ffffffff81a463a0 T drm_bridge_detach +ffffffff81a46490 T drm_bridge_chain_mode_fixup +ffffffff81a46540 T drm_bridge_chain_mode_valid +ffffffff81a465f0 T drm_bridge_chain_mode_set +ffffffff81a46690 T drm_atomic_bridge_chain_disable +ffffffff81a467a0 T drm_atomic_bridge_chain_post_disable +ffffffff81a469e0 T drm_atomic_bridge_chain_pre_enable +ffffffff81a46c50 T drm_atomic_bridge_chain_enable +ffffffff81a46d80 T drm_atomic_bridge_chain_check +ffffffff81a47180 T drm_bridge_detect +ffffffff81a471e0 T drm_bridge_get_modes +ffffffff81a47240 T drm_bridge_edid_read +ffffffff81a47310 T drm_bridge_get_edid +ffffffff81a47370 T drm_bridge_hpd_enable +ffffffff81a47450 T drm_bridge_hpd_disable +ffffffff81a474f0 T drm_bridge_hpd_notify +ffffffff81a47550 t drm_bridge_atomic_duplicate_priv_state +ffffffff81a47570 t drm_bridge_atomic_destroy_priv_state +ffffffff81a47590 t select_bus_fmt_recursive +ffffffff81a48000 T drm_buddy_init +ffffffff81a484c0 T drm_buddy_fini +ffffffff81a485d0 T drm_get_buddy +ffffffff81a48610 T drm_buddy_free_block +ffffffff81a48660 t __drm_buddy_free +ffffffff81a487c0 T drm_buddy_free_list +ffffffff81a488a0 T drm_buddy_block_trim +ffffffff81a48b00 t __alloc_range +ffffffff81a48e00 T drm_buddy_alloc_blocks +ffffffff81a494e0 t __drm_buddy_alloc_range +ffffffff81a49580 T drm_buddy_block_print +ffffffff81a495c0 T drm_buddy_print +ffffffff81a49740 T drm_buddy_module_exit +ffffffff81a49760 T drm_buddy_module_init +ffffffff81a497d0 t split_block +ffffffff81a4a000 T drm_clflush_pages +ffffffff81a4a0e0 T drm_clflush_sg +ffffffff81a4a200 T drm_clflush_virt_range +ffffffff81a4a2a0 T drm_need_swiotlb +ffffffff81a4a2d0 T drm_memcpy_from_wc +ffffffff81a4a820 T drm_memcpy_init_early +ffffffff81a4b000 T drm_client_init +ffffffff81a4b150 T drm_client_register +ffffffff81a4b210 T drm_client_release +ffffffff81a4b2e0 T drm_client_dev_unregister +ffffffff81a4b400 T drm_client_dev_hotplug +ffffffff81a4b540 T drm_client_dev_restore +ffffffff81a4b640 T drm_client_buffer_vmap +ffffffff81a4b6c0 T drm_client_buffer_vunmap +ffffffff81a4b6e0 T drm_client_framebuffer_create +ffffffff81a4ba20 T drm_client_framebuffer_delete +ffffffff81a4bb20 T drm_client_framebuffer_flush +ffffffff81a4c000 T drm_client_modeset_create +ffffffff81a4c150 T drm_client_modeset_free +ffffffff81a4c280 T drm_client_modeset_probe +ffffffff81a4dcb0 t drm_client_pick_crtcs +ffffffff81a4dfd0 T drm_client_rotation +ffffffff81a4e180 T drm_client_modeset_check +ffffffff81a4e230 t drm_client_modeset_commit_atomic +ffffffff81a4e4a0 T drm_client_modeset_commit_locked +ffffffff81a4e690 T drm_client_modeset_commit +ffffffff81a4e720 T drm_client_modeset_dpms +ffffffff81a4e9e0 t drm_connector_pick_cmdline_mode +ffffffff81a4f000 T drm_color_ctm_s31_32_to_qm_n +ffffffff81a4f0d0 T drm_crtc_enable_color_mgmt +ffffffff81a4f1c0 T drm_mode_crtc_set_gamma_size +ffffffff81a4f2f0 T drm_mode_gamma_set_ioctl +ffffffff81a4f8b0 T drm_mode_gamma_get_ioctl +ffffffff81a4fa20 T drm_get_color_encoding_name +ffffffff81a4faa0 T drm_get_color_range_name +ffffffff81a4fb20 T drm_plane_create_color_properties +ffffffff81a4fdb0 T drm_color_lut_check +ffffffff81a50000 T drm_connector_ida_init +ffffffff81a501c0 T drm_connector_ida_destroy +ffffffff81a50380 T drm_get_connector_type_name +ffffffff81a503c0 T drm_connector_free_work_fn +ffffffff81a504a0 T drm_connector_init +ffffffff81a50530 t __drm_connector_init +ffffffff81a50930 T drm_connector_init_with_ddc +ffffffff81a509c0 T drmm_connector_init +ffffffff81a50a90 t drm_connector_cleanup_action +ffffffff81a50ab0 T drm_connector_attach_edid_property +ffffffff81a50ad0 T drm_connector_attach_encoder +ffffffff81a50b60 T drm_connector_has_possible_encoder +ffffffff81a50ba0 T drm_connector_cleanup +ffffffff81a50f90 T drm_connector_unregister +ffffffff81a51040 T drm_mode_put_tile_group +ffffffff81a510f0 T drm_connector_register +ffffffff81a51220 T drm_connector_unregister_all +ffffffff81a51400 T drm_connector_list_iter_begin +ffffffff81a51440 T drm_connector_list_iter_next +ffffffff81a51560 T drm_connector_list_iter_end +ffffffff81a51640 T drm_connector_register_all +ffffffff81a51800 T drm_get_connector_status_name +ffffffff81a51850 T drm_get_connector_force_name +ffffffff81a51890 T drm_get_subpixel_order_name +ffffffff81a518d0 T drm_get_dpms_name +ffffffff81a51910 T drm_display_info_set_bus_formats +ffffffff81a51a00 T drm_get_dvi_i_select_name +ffffffff81a51a60 T drm_get_dvi_i_subconnector_name +ffffffff81a51ac0 T drm_get_tv_mode_name +ffffffff81a51b00 T drm_get_tv_mode_from_name +ffffffff81a51d20 T drm_get_tv_select_name +ffffffff81a51d80 T drm_get_tv_subconnector_name +ffffffff81a51de0 T drm_get_dp_subconnector_name +ffffffff81a51e70 T drm_get_colorspace_name +ffffffff81a51eb0 T drm_connector_create_standard_properties +ffffffff81a52070 T drm_mode_create_dvi_i_properties +ffffffff81a52120 T drm_connector_attach_dp_subconnector_property +ffffffff81a52190 T drm_connector_attach_content_type_property +ffffffff81a52230 T drm_mode_create_content_type_property +ffffffff81a522c0 T drm_connector_attach_tv_margin_properties +ffffffff81a52340 T drm_mode_create_tv_margin_properties +ffffffff81a52480 T drm_mode_create_tv_properties_legacy +ffffffff81a52730 T drm_mode_create_tv_properties +ffffffff81a52920 T drm_mode_create_scaling_mode_property +ffffffff81a52990 T drm_connector_attach_vrr_capable_property +ffffffff81a52a30 T drm_connector_attach_scaling_mode_property +ffffffff81a52c50 T drm_mode_create_aspect_ratio_property +ffffffff81a52ce0 T drm_mode_create_hdmi_colorspace_property +ffffffff81a52d00 t drm_mode_create_colorspace_property +ffffffff81a52e50 T drm_mode_create_dp_colorspace_property +ffffffff81a52e80 T drm_mode_create_suggested_offset_properties +ffffffff81a52f60 T drm_connector_set_path_property +ffffffff81a52fc0 T drm_connector_set_tile_property +ffffffff81a53130 T drm_connector_set_link_status_property +ffffffff81a53190 T drm_connector_attach_max_bpc_property +ffffffff81a53260 T drm_connector_attach_hdr_output_metadata_property +ffffffff81a532b0 T drm_connector_attach_colorspace_property +ffffffff81a53300 T drm_connector_atomic_hdr_metadata_equal +ffffffff81a53380 T drm_connector_set_vrr_capable_property +ffffffff81a533d0 T drm_connector_set_panel_orientation +ffffffff81a534a0 T drm_connector_set_panel_orientation_with_quirk +ffffffff81a535a0 T drm_connector_set_orientation_from_panel +ffffffff81a536a0 T drm_connector_create_privacy_screen_properties +ffffffff81a53750 T drm_connector_attach_privacy_screen_properties +ffffffff81a537d0 T drm_connector_attach_privacy_screen_provider +ffffffff81a53900 t drm_connector_privacy_screen_notifier +ffffffff81a539d0 T drm_connector_update_privacy_screen +ffffffff81a53a40 T drm_connector_set_obj_prop +ffffffff81a53b50 T drm_connector_property_set_ioctl +ffffffff81a53bb0 T drm_mode_getconnector +ffffffff81a54130 T drm_connector_find_by_fwnode +ffffffff81a541f0 T drm_connector_oob_hotplug_event +ffffffff81a542f0 T drm_mode_get_tile_group +ffffffff81a54400 T drm_mode_create_tile_group +ffffffff81a544f0 t drm_connector_free +ffffffff81a54540 t kasprintf +ffffffff81a55000 T drm_crtc_from_index +ffffffff81a55060 T drm_crtc_force_disable +ffffffff81a551b0 T drm_mode_set_config_internal +ffffffff81a55230 T drm_crtc_register_all +ffffffff81a552c0 T drm_crtc_unregister_all +ffffffff81a55340 T drm_crtc_create_fence +ffffffff81a553d0 T drm_crtc_init_with_planes +ffffffff81a554b0 t __drm_crtc_init_with_planes +ffffffff81a55940 T drmm_crtc_init_with_planes +ffffffff81a55a60 T __drmm_crtc_alloc_with_planes +ffffffff81a55c00 T drm_crtc_cleanup +ffffffff81a55d40 T drm_mode_getcrtc +ffffffff81a55f20 t __drm_mode_set_config_internal +ffffffff81a560e0 T drm_crtc_check_viewport +ffffffff81a561a0 T drm_mode_setcrtc +ffffffff81a56a40 T drm_mode_crtc_set_obj_prop +ffffffff81a56ad0 T drm_crtc_create_scaling_filter_property +ffffffff81a56b50 t drm_crtc_fence_get_driver_name +ffffffff81a56bd0 t drm_crtc_fence_get_timeline_name +ffffffff81a56c40 t kasprintf +ffffffff81a56d20 t drmm_crtc_init_with_planes_cleanup +ffffffff81a57000 T drm_helper_encoder_in_use +ffffffff81a571b0 T drm_helper_crtc_in_use +ffffffff81a572e0 T drm_helper_disable_unused_functions +ffffffff81a57380 t __drm_helper_disable_unused_functions +ffffffff81a574c0 T drm_crtc_helper_set_mode +ffffffff81a57a40 T drm_crtc_helper_atomic_check +ffffffff81a57a90 T drm_connector_get_single_encoder +ffffffff81a57b70 T drm_crtc_helper_set_config +ffffffff81a589a0 T drm_helper_connector_dpms +ffffffff81a58d00 T drm_helper_resume_force_mode +ffffffff81a59090 T drm_helper_force_disable_all +ffffffff81a5a000 T drm_atomic_helper_check_plane_damage +ffffffff81a5a0b0 T drm_atomic_helper_dirtyfb +ffffffff81a5a3f0 T drm_atomic_helper_damage_iter_init +ffffffff81a5a550 T drm_atomic_helper_damage_iter_next +ffffffff81a5a5f0 T drm_atomic_helper_damage_merged +ffffffff81a5b000 T displayid_iter_edid_begin +ffffffff81a5b050 T __displayid_iter_next +ffffffff81a5b320 T displayid_iter_end +ffffffff81a5b370 T displayid_version +ffffffff81a5b3a0 T displayid_primary_use +ffffffff81a5c000 T drm_mode_create_dumb +ffffffff81a5c0e0 T drm_mode_create_dumb_ioctl +ffffffff81a5c1c0 T drm_mode_mmap_dumb_ioctl +ffffffff81a5c230 T drm_mode_destroy_dumb +ffffffff81a5c280 T drm_mode_destroy_dumb_ioctl +ffffffff81a5d000 T drm_edid_header_is_valid +ffffffff81a5d080 T drm_edid_are_equal +ffffffff81a5d100 T drm_edid_block_valid +ffffffff81a5d370 t edid_block_check +ffffffff81a5d4b0 t edid_block_status_print +ffffffff81a5d5a0 T drm_edid_is_valid +ffffffff81a5d620 T drm_edid_valid +ffffffff81a5d760 t drm_edid_block_count +ffffffff81a5d8a0 T drm_edid_override_show +ffffffff81a5d900 T drm_edid_override_set +ffffffff81a5db10 T drm_edid_alloc +ffffffff81a5dbf0 T drm_edid_free +ffffffff81a5dc50 T drm_edid_override_reset +ffffffff81a5dd30 T drm_edid_override_connector_update +ffffffff81a5de30 t drm_edid_override_get +ffffffff81a5df50 T drm_edid_connector_update +ffffffff81a5e430 T drm_edid_connector_add_modes +ffffffff81a5e590 T drm_do_get_edid +ffffffff81a5e5b0 t _drm_do_get_edid +ffffffff81a5eab0 T drm_edid_raw +ffffffff81a5eb40 T drm_edid_dup +ffffffff81a5ec30 T drm_probe_ddc +ffffffff81a5ed40 t drm_do_probe_ddc_edid +ffffffff81a5eea0 T drm_get_edid +ffffffff81a5f030 T drm_connector_update_edid_property +ffffffff81a5f0a0 T drm_edid_read_custom +ffffffff81a5f1c0 T drm_edid_read_ddc +ffffffff81a5f300 T drm_edid_read +ffffffff81a5f390 T drm_edid_get_panel_id +ffffffff81a5f560 t edid_block_read +ffffffff81a5f840 T drm_get_edid_switcheroo +ffffffff81a5f890 T drm_edid_read_switcheroo +ffffffff81a5f8e0 T drm_edid_duplicate +ffffffff81a5f970 T drm_mode_find_dmt +ffffffff81a5faa0 T drm_mode_fixup_1366x768 +ffffffff81a5faf0 T drm_find_edid_extension +ffffffff81a5fba0 T drm_match_cea_mode +ffffffff81a5fe40 T drm_display_mode_from_cea_vic +ffffffff81a5feb0 T drm_edid_get_monitor_name +ffffffff81a5ff70 t get_monitor_name +ffffffff81a603e0 T drm_edid_to_sad +ffffffff81a60610 T drm_edid_to_speaker_allocation +ffffffff81a607f0 T drm_av_sync_delay +ffffffff81a608a0 T drm_detect_hdmi_monitor +ffffffff81a609e0 T drm_detect_monitor_audio +ffffffff81a60b90 T drm_default_rgb_quant_range +ffffffff81a60be0 t update_display_info +ffffffff81a62590 t _drm_edid_connector_add_modes +ffffffff81a63d50 T drm_add_edid_modes +ffffffff81a63e70 T drm_add_modes_noedid +ffffffff81a63f80 T drm_set_preferred_mode +ffffffff81a63fe0 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff81a642d0 T drm_hdmi_avi_infoframe_quant_range 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drm_mode_getencoder +ffffffff81a69910 t kasprintf +ffffffff81a699f0 t drmm_encoder_alloc_release +ffffffff81a6a000 T drm_i2c_encoder_dpms +ffffffff81a6a020 T drm_i2c_encoder_mode_fixup +ffffffff81a6a060 T drm_i2c_encoder_prepare +ffffffff81a6a080 T drm_i2c_encoder_commit +ffffffff81a6a0a0 T drm_i2c_encoder_mode_set +ffffffff81a6a0c0 T drm_i2c_encoder_detect +ffffffff81a6a0e0 T drm_i2c_encoder_save +ffffffff81a6a100 T drm_i2c_encoder_restore +ffffffff81a6b000 T drm_exec_init +ffffffff81a6b080 T drm_exec_fini +ffffffff81a6b110 t drm_exec_unlock_all +ffffffff81a6b2b0 T drm_exec_cleanup +ffffffff81a6b350 T drm_exec_lock_obj +ffffffff81a6b660 t drm_exec_obj_locked +ffffffff81a6b750 t dma_resv_unlock +ffffffff81a6b800 T drm_exec_unlock_obj +ffffffff81a6b9b0 T drm_exec_prepare_obj +ffffffff81a6ba50 T drm_exec_prepare_array +ffffffff81a6bb20 t dma_resv_lock_slow_interruptible +ffffffff81a6bc80 t dma_resv_lock_slow +ffffffff81a6bd70 t __ww_mutex_lock +ffffffff81a6c000 T drm_fb_helper_debug_enter +ffffffff81a6c110 T drm_fb_helper_debug_leave +ffffffff81a6c2b0 T drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81a6c370 t __drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81a6c440 T drm_fb_helper_blank +ffffffff81a6c570 T drm_fb_helper_prepare +ffffffff81a6c690 t drm_fb_helper_resume_worker +ffffffff81a6c6c0 t drm_fb_helper_damage_work +ffffffff81a6c850 T drm_fb_helper_unprepare +ffffffff81a6c880 T drm_fb_helper_init +ffffffff81a6c900 T drm_fb_helper_alloc_info +ffffffff81a6c970 T drm_fb_helper_release_info +ffffffff81a6c9c0 T drm_fb_helper_unregister_info +ffffffff81a6c9f0 T drm_fb_helper_fini +ffffffff81a6cb00 T drm_fb_helper_set_suspend +ffffffff81a6cb30 T drm_fb_helper_set_suspend_unlocked +ffffffff81a6cb60 T drm_fb_helper_set_par +ffffffff81a6cc40 T drm_fb_helper_pan_display +ffffffff81a6cd30 T drm_fb_helper_fill_info +ffffffff81a6ce00 T drm_fb_helper_initial_config +ffffffff81a6ce40 t __drm_fb_helper_initial_config_and_unlock +ffffffff81a6d540 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drm_fb_swab16_line +ffffffff81a74510 t drm_fb_xfrm +ffffffff81a74850 T drm_fb_xrgb8888_to_rgb332 +ffffffff81a748b0 t drm_fb_xrgb8888_to_rgb332_line +ffffffff81a749b0 T drm_fb_xrgb8888_to_rgb565 +ffffffff81a74a40 t drm_fb_xrgb8888_to_rgb565_swab_line +ffffffff81a74b60 t drm_fb_xrgb8888_to_rgb565_line +ffffffff81a74c70 T drm_fb_xrgb8888_to_xrgb1555 +ffffffff81a74cd0 t drm_fb_xrgb8888_to_xrgb1555_line +ffffffff81a74de0 T drm_fb_xrgb8888_to_argb1555 +ffffffff81a74e40 t drm_fb_xrgb8888_to_argb1555_line +ffffffff81a74f60 T drm_fb_xrgb8888_to_rgba5551 +ffffffff81a74fc0 t drm_fb_xrgb8888_to_rgba5551_line +ffffffff81a750d0 T drm_fb_xrgb8888_to_rgb888 +ffffffff81a75130 t drm_fb_xrgb8888_to_rgb888_line +ffffffff81a751c0 T drm_fb_xrgb8888_to_argb8888 +ffffffff81a75220 t drm_fb_xrgb8888_to_argb8888_line +ffffffff81a752f0 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff81a75350 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff81a753d0 T drm_fb_xrgb8888_to_argb2101010 +ffffffff81a75430 t drm_fb_xrgb8888_to_argb2101010_line +ffffffff81a754c0 T drm_fb_xrgb8888_to_gray8 +ffffffff81a75520 t drm_fb_xrgb8888_to_gray8_line +ffffffff81a75590 T drm_fb_blit +ffffffff81a75c90 T drm_fb_xrgb8888_to_mono +ffffffff81a76030 T drm_fb_build_fourcc_list +ffffffff81a76340 t drm_fb_xrgb8888_to_xbgr8888_line +ffffffff81a76420 t drm_fb_xrgb8888_to_abgr8888_line +ffffffff81a77000 T drm_mode_legacy_fb_format +ffffffff81a770f0 T drm_driver_legacy_fb_format +ffffffff81a771f0 T __drm_format_info +ffffffff81a77270 T drm_format_info +ffffffff81a77320 T drm_get_format_info +ffffffff81a77410 T drm_format_info_block_width +ffffffff81a77460 T drm_format_info_block_height +ffffffff81a774b0 T drm_format_info_bpp +ffffffff81a77530 T drm_format_info_min_pitch +ffffffff81a78000 T drm_framebuffer_check_src_coords +ffffffff81a78130 T drm_mode_addfb +ffffffff81a78380 T drm_mode_addfb2 +ffffffff81a784a0 T drm_mode_addfb_ioctl +ffffffff81a784c0 T drm_internal_framebuffer_create +ffffffff81a78b00 T drm_mode_addfb2_ioctl +ffffffff81a78c20 T drm_mode_rmfb +ffffffff81a78e60 T drm_framebuffer_lookup +ffffffff81a78eb0 t drm_mode_rmfb_work_fn +ffffffff81a78f80 T drm_mode_rmfb_ioctl +ffffffff81a78fa0 T drm_mode_getfb +ffffffff81a79120 T drm_mode_getfb2_ioctl +ffffffff81a79510 T drm_mode_dirtyfb_ioctl +ffffffff81a796d0 T drm_fb_release +ffffffff81a79800 T drm_framebuffer_free +ffffffff81a79840 T drm_framebuffer_init +ffffffff81a799d0 T drm_framebuffer_unregister_private +ffffffff81a79a10 T drm_framebuffer_cleanup +ffffffff81a79a80 T drm_framebuffer_remove +ffffffff81a7a000 T drm_framebuffer_plane_width +ffffffff81a7a050 T drm_framebuffer_plane_height +ffffffff81a7a0a0 T drm_framebuffer_print_info +ffffffff81a7b000 T drm_ref +ffffffff81a7b030 T drm_unref +ffffffff81a7b0b0 T drm_fault +ffffffff81a7b2d0 T drm_flush +ffffffff81a7b300 T udv_attach_drm +ffffffff81a7b560 T drm_gem_init +ffffffff81a7b640 t drm_gem_init_release +ffffffff81a7b660 T drm_gem_object_init +ffffffff81a7b810 T drm_gem_private_object_init +ffffffff81a7b950 T drm_gem_private_object_fini +ffffffff81a7b9b0 T drm_gem_handle_delete +ffffffff81a7baf0 t drm_gem_object_release_handle +ffffffff81a7bb90 T drm_gem_dumb_map_offset +ffffffff81a7bcf0 T drm_gem_object_lookup +ffffffff81a7bd80 T drm_gem_create_mmap_offset +ffffffff81a7bdb0 T drm_gem_handle_create_tail +ffffffff81a7bfa0 t drm_gem_object_handle_put_unlocked +ffffffff81a7c110 T drm_gem_handle_create +ffffffff81a7c160 T drm_gem_free_mmap_offset +ffffffff81a7c190 T drm_gem_create_mmap_offset_size +ffffffff81a7c1c0 T drm_gem_get_pages +ffffffff81a7c220 T drm_gem_put_pages +ffffffff81a7c250 T drm_gem_objects_lookup +ffffffff81a7c400 T drm_gem_dma_resv_wait +ffffffff81a7c570 T drm_gem_close_ioctl +ffffffff81a7c5c0 T drm_gem_flink_ioctl +ffffffff81a7c780 T drm_gem_open_ioctl +ffffffff81a7c8e0 T drm_gem_open +ffffffff81a7c920 T drm_gem_release +ffffffff81a7c960 T drm_gem_object_release +ffffffff81a7cad0 T drm_gem_lru_remove +ffffffff81a7cbc0 T drm_gem_object_free +ffffffff81a7cc10 T drm_gem_mmap_obj +ffffffff81a7cd20 T drm_gem_mmap +ffffffff81a7cfe0 T drm_gem_print_info +ffffffff81a7d130 T drm_gem_pin +ffffffff81a7d170 T drm_gem_unpin +ffffffff81a7d1b0 T drm_gem_vmap +ffffffff81a7d220 T drm_gem_vunmap +ffffffff81a7d290 T drm_gem_vmap_unlocked +ffffffff81a7d4d0 T drm_gem_vunmap_unlocked +ffffffff81a7d6d0 T drm_gem_lock_reservations +ffffffff81a7db40 T drm_gem_unlock_reservations +ffffffff81a7dc70 T drm_gem_lru_init +ffffffff81a7dcb0 T drm_gem_lru_move_tail_locked +ffffffff81a7ddb0 T drm_gem_lru_move_tail +ffffffff81a7dea0 T drm_gem_lru_scan +ffffffff81a7e310 T drm_gem_evict +ffffffff81a7f000 T drm_gem_plane_helper_prepare_fb +ffffffff81a80000 T drm_gem_dma_create +ffffffff81a80260 T drm_gem_dma_free_object +ffffffff81a80340 T drm_gem_dma_dumb_create_internal +ffffffff81a804b0 T drm_gem_dma_dumb_create +ffffffff81a804f0 T drm_gem_dma_fault +ffffffff81a806c0 T drm_gem_dma_get_sg_table +ffffffff81a806f0 T drm_gem_dma_prime_import_sg_table +ffffffff81a80720 T drm_gem_dma_vmap +ffffffff81a81000 T drm_gem_fb_destroy +ffffffff81a810d0 T drm_gem_fb_create_handle +ffffffff81a810f0 T drm_gem_fb_create +ffffffff81a81270 T drm_gem_fb_get_obj +ffffffff81a82000 T drm_ht_create +ffffffff81a82090 T drm_ht_verbose_list +ffffffff81a82150 T drm_ht_insert_item +ffffffff81a821b0 T drm_ht_just_insert_please +ffffffff81a82290 T drm_ht_find_item +ffffffff81a822f0 T drm_ht_remove_key +ffffffff81a82350 T drm_ht_remove_item +ffffffff81a823b0 T drm_ht_remove +ffffffff81a83000 T drm_getunique +ffffffff81a830c0 T drm_getclient +ffffffff81a83140 T drm_noop +ffffffff81a831a0 T drm_invalid_op +ffffffff81a831d0 T drm_version +ffffffff81a83440 T pledge_ioctl_drm +ffffffff81a83520 T drm_ioctl_kernel +ffffffff81a83580 T drm_ioctl +ffffffff81a835e0 T drm_ioctl_flags +ffffffff81a83630 T drm_do_ioctl +ffffffff81a83a00 T drmioctl +ffffffff81a83b90 t drm_getstats +ffffffff81a83be0 t drm_setversion +ffffffff81a83d70 t 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dma_fence_array_first +ffffffff81a8b870 T dma_fence_array_next +ffffffff81a8b8c0 t dma_fence_array_get_driver_name +ffffffff81a8b8f0 t dma_fence_array_get_timeline_name +ffffffff81a8b920 t dma_fence_array_enable_signaling +ffffffff81a8ba30 t dma_fence_array_signaled +ffffffff81a8ba80 t dma_fence_array_release +ffffffff81a8bb50 T dma_fence_chain_find_seqno +ffffffff81a8bc80 T dma_fence_chain_walk +ffffffff81a8bee0 T dma_fence_chain_init +ffffffff81a8bff0 t dma_fence_chain_get_driver_name +ffffffff81a8c020 t dma_fence_chain_get_timeline_name +ffffffff81a8c050 t dma_fence_chain_enable_signaling +ffffffff81a8c240 t dma_fence_chain_signaled +ffffffff81a8c340 t dma_fence_chain_release +ffffffff81a8c4a0 T dma_fence_is_container +ffffffff81a8c4f0 T dmabuf_read +ffffffff81a8c520 T dmabuf_write +ffffffff81a8c550 T dmabuf_ioctl +ffffffff81a8c580 T dmabuf_kqfilter +ffffffff81a8c5b0 T dmabuf_stat +ffffffff81a8c670 T dmabuf_close +ffffffff81a8c700 T dmabuf_seek +ffffffff81a8c7a0 T dma_buf_export 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syncfile_write +ffffffff81a8da90 T syncfile_ioctl +ffffffff81a8dac0 T syncfile_kqfilter +ffffffff81a8daf0 T syncfile_stat +ffffffff81a8dba0 T syncfile_close +ffffffff81a8dc50 T syncfile_seek +ffffffff81a8dce0 T fd_install +ffffffff81a8ddd0 T fput +ffffffff81a8de30 T get_unused_fd_flags +ffffffff81a8df70 T put_unused_fd +ffffffff81a8e010 T sync_file_get_fence +ffffffff81a8e0d0 T sync_file_create +ffffffff81a8e180 T drm_firmware_drivers_only +ffffffff81a8e1b0 T memremap +ffffffff81a8e210 T memunmap +ffffffff81a8e230 T dma_tag_lookup +ffffffff81a8e2a0 T dma_alloc_coherent +ffffffff81a8e3a0 T dma_free_coherent +ffffffff81a8e4d0 T dma_get_sgtable +ffffffff81a8e5c0 T dma_map_resource +ffffffff81a8e700 T component_add +ffffffff81a8e780 T component_add_typed +ffffffff81a8e800 T component_bind_all +ffffffff81a8e8a0 T component_master_add_with_match +ffffffff81a8e9a0 t dma_fence_stub_get_name +ffffffff81a8e9d0 t dma_fence_array_cb_func +ffffffff81a8ea50 t dma_fence_chain_cb +ffffffff81a8eb20 t dma_fence_chain_timo +ffffffff81a8f000 T drmm_kzalloc +ffffffff81a8f120 T drmm_kcalloc +ffffffff81a8f260 T drmm_kstrdup +ffffffff81a8f3e0 T drmm_kfree +ffffffff81a8f4f0 T drmm_add_action +ffffffff81a8f5d0 T drmm_add_action_or_reset +ffffffff81a8f6c0 T drm_managed_release +ffffffff81a8f790 T drmm_add_final_kfree +ffffffff81a90000 T mipi_dsi_attach +ffffffff81a90070 T mipi_dsi_detach +ffffffff81a90110 T devm_mipi_dsi_attach +ffffffff81a901a0 T mipi_dsi_packet_format_is_short +ffffffff81a901e0 T mipi_dsi_packet_format_is_long +ffffffff81a90220 T mipi_dsi_create_packet +ffffffff81a90330 T mipi_dsi_shutdown_peripheral +ffffffff81a903e0 T mipi_dsi_turn_on_peripheral +ffffffff81a90490 T mipi_dsi_set_maximum_return_packet_size +ffffffff81a90540 T mipi_dsi_compression_mode +ffffffff81a905f0 T mipi_dsi_picture_parameter_set +ffffffff81a906a0 T mipi_dsi_generic_write +ffffffff81a90760 T mipi_dsi_generic_read +ffffffff81a90820 T mipi_dsi_dcs_write_buffer +ffffffff81a908e0 T mipi_dsi_dcs_write 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drm_mode_match +ffffffff81a99a10 T drm_mode_equal +ffffffff81a99a30 T drm_mode_equal_no_clocks +ffffffff81a99a50 T drm_mode_equal_no_clocks_no_stereo +ffffffff81a99b10 T drm_mode_validate_driver +ffffffff81a99c00 T drm_mode_validate_size +ffffffff81a99c50 T drm_mode_validate_ycbcr420 +ffffffff81a99cc0 T drm_mode_is_420_only +ffffffff81a99d20 T drm_get_mode_status_name +ffffffff81a99da0 T drm_mode_prune_invalid +ffffffff81a9a070 T drm_mode_sort +ffffffff81a9a0a0 t drm_mode_compare +ffffffff81a9a240 T drm_connector_list_update +ffffffff81a9a430 T drm_mode_parse_command_line_for_connector +ffffffff81a9a460 T drm_mode_create_from_cmdline_mode +ffffffff81a9a680 T drm_mode_convert_to_umode +ffffffff81a9a820 T drm_mode_convert_umode +ffffffff81a9aa50 T drm_mode_is_420_also +ffffffff81a9aab0 T drm_mode_is_420 +ffffffff81a9b000 T drm_helper_move_panel_connectors_to_head +ffffffff81a9b100 T drm_helper_mode_fill_fb_struct +ffffffff81a9b1d0 T drm_crtc_init +ffffffff81a9b2c0 T drm_mode_config_helper_suspend +ffffffff81a9b380 T drm_mode_config_helper_resume +ffffffff81a9c000 T drm_modeset_lock_all +ffffffff81a9c2f0 T drm_modeset_acquire_init +ffffffff81a9c380 T drm_modeset_lock_all_ctx +ffffffff81a9c480 T drm_modeset_backoff +ffffffff81a9c560 T drm_modeset_acquire_fini +ffffffff81a9c590 T drm_warn_on_modeset_not_all_locked +ffffffff81a9c710 T drm_modeset_unlock_all +ffffffff81a9c810 T drm_modeset_drop_locks +ffffffff81a9c8a0 T drm_modeset_unlock +ffffffff81a9c980 t modeset_lock +ffffffff81a9cd20 T drm_modeset_lock_init +ffffffff81a9cd90 T drm_modeset_lock +ffffffff81a9ced0 T drm_modeset_lock_single_interruptible +ffffffff81a9d020 t __ww_mutex_lock +ffffffff81a9e000 T drm_mtrr_add +ffffffff81a9e080 T drm_mtrr_del +ffffffff81a9f000 T drm_panel_init +ffffffff81a9f090 T drm_panel_add +ffffffff81a9f0f0 T drm_panel_remove +ffffffff81a9f150 T drm_panel_prepare +ffffffff81a9f280 T drm_panel_unprepare +ffffffff81a9f3c0 T drm_panel_enable +ffffffff81a9f4d0 T drm_panel_disable +ffffffff81a9f5d0 T drm_panel_get_modes +ffffffff81a9f630 T drm_is_panel_follower +ffffffff81a9f680 T drm_panel_add_follower +ffffffff81a9f6e0 T drm_panel_remove_follower +ffffffff81a9f700 T devm_drm_panel_add_follower +ffffffff81a9f760 T drm_panel_of_backlight +ffffffff81aa0000 T drm_get_panel_orientation_quirk +ffffffff81aa1000 T drm_pci_set_busid +ffffffff81aa10b0 t kasprintf +ffffffff81aa2000 T drm_universal_plane_init +ffffffff81aa2100 t __drm_universal_plane_init +ffffffff81aa26b0 T __drmm_universal_plane_alloc +ffffffff81aa2820 t drmm_universal_plane_alloc_release +ffffffff81aa2870 T __drm_universal_plane_alloc +ffffffff81aa29d0 T drm_plane_register_all +ffffffff81aa2ae0 T drm_plane_unregister_all +ffffffff81aa2b60 T drm_plane_cleanup +ffffffff81aa2ce0 T drm_plane_from_index +ffffffff81aa2d40 T drm_plane_force_disable +ffffffff81aa2e80 T drm_mode_plane_set_obj_prop +ffffffff81aa2f10 T drm_mode_getplane_res +ffffffff81aa3050 T drm_mode_getplane +ffffffff81aa31d0 T drm_plane_check_pixel_format +ffffffff81aa3290 T drm_any_plane_has_format +ffffffff81aa33b0 T drm_mode_setplane +ffffffff81aa3720 T drm_mode_cursor_ioctl +ffffffff81aa3790 t drm_mode_cursor_common +ffffffff81aa3d60 T drm_mode_cursor2_ioctl +ffffffff81aa3d80 T drm_mode_page_flip_ioctl +ffffffff81aa43c0 T drm_plane_enable_fb_damage_clips +ffffffff81aa43e0 T drm_plane_get_damage_clips_count +ffffffff81aa4420 T __drm_plane_get_damage_clips +ffffffff81aa4460 T drm_plane_get_damage_clips +ffffffff81aa4500 T drm_create_scaling_filter_prop +ffffffff81aa4680 T drm_plane_create_scaling_filter_property +ffffffff81aa4700 t kvasprintf +ffffffff81aa47c0 t kasprintf +ffffffff81aa48a0 t create_in_format_blob +ffffffff81aa4ab0 t __setplane_atomic +ffffffff81aa4c60 t __setplane_internal +ffffffff81aa4ea0 t __setplane_check +ffffffff81aa6000 T drm_plane_helper_update_primary +ffffffff81aa6520 t get_connectors_for_crtc +ffffffff81aa6660 T drm_plane_helper_disable_primary +ffffffff81aa6720 T drm_plane_helper_destroy +ffffffff81aa6760 T drm_plane_helper_atomic_check +ffffffff81aa7000 T drm_prime_remove_buf_handle +ffffffff81aa70d0 T drm_prime_init_file_private +ffffffff81aa7130 T drm_prime_destroy_file_private +ffffffff81aa7190 T drm_gem_dmabuf_export +ffffffff81aa7210 T drm_gem_dmabuf_release +ffffffff81aa7250 T drm_gem_prime_fd_to_handle +ffffffff81aa74e0 T drm_gem_prime_import +ffffffff81aa7550 t drm_prime_add_buf_handle +ffffffff81aa76b0 T drm_prime_fd_to_handle_ioctl +ffffffff81aa76e0 T drm_gem_prime_handle_to_fd +ffffffff81aa7990 T drm_prime_handle_to_fd_ioctl +ffffffff81aa7a00 T drm_gem_map_attach +ffffffff81aa7a50 T drm_gem_map_detach +ffffffff81aa7a70 T drm_gem_dmabuf_vmap +ffffffff81aa7a90 T drm_gem_dmabuf_vunmap +ffffffff81aa7ab0 T drm_gem_prime_mmap +ffffffff81aa7b10 T drm_prime_pages_to_sg +ffffffff81aa7b70 T drm_prime_get_contiguous_size +ffffffff81aa7bc0 T drm_gem_prime_export +ffffffff81aa7c60 T drm_gem_prime_import_dev +ffffffff81aa7cd0 T drm_prime_sg_to_page_array +ffffffff81aa7d30 T drm_prime_sg_to_dma_addr_array +ffffffff81aa7d90 T drm_prime_gem_destroy +ffffffff81aa8000 T __drm_puts_coredump +ffffffff81aa8100 T __drm_printfn_coredump +ffffffff81aa8320 T __drm_puts_seq_file +ffffffff81aa8350 T __drm_printfn_seq_file +ffffffff81aa8380 T __drm_printfn_info +ffffffff81aa83b0 T __drm_printfn_debug +ffffffff81aa83e0 T __drm_printfn_err +ffffffff81aa8420 T drm_puts +ffffffff81aa8450 T drm_printf +ffffffff81aa84e0 T drm_print_bits +ffffffff81aa8740 T drm_dev_printk +ffffffff81aa87e0 T __drm_dev_dbg +ffffffff81aa8880 T ___drm_dbg +ffffffff81aa8920 T __drm_err +ffffffff81aa89c0 T drm_print_regset32 +ffffffff81aa9000 T drm_crtc_mode_valid +ffffffff81aa9050 T drm_encoder_mode_valid +ffffffff81aa9090 T drm_connector_mode_valid +ffffffff81aa9110 T drm_kms_helper_poll_enable +ffffffff81aa92d0 T drm_kms_helper_poll_reschedule +ffffffff81aa9330 T drm_helper_probe_detect +ffffffff81aa9570 T drm_helper_probe_single_connector_modes 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drm_property_destroy +ffffffff81aac5d0 T drm_property_create_bitmask +ffffffff81aac710 T drm_property_create_range +ffffffff81aac780 T drm_property_create_signed_range +ffffffff81aac7f0 T drm_property_create_object +ffffffff81aac8a0 T drm_property_create_bool +ffffffff81aac910 T drm_mode_getproperty_ioctl +ffffffff81aacb90 T drm_property_create_blob +ffffffff81aacd00 t drm_property_free_blob +ffffffff81aacd90 T drm_property_blob_put +ffffffff81aacdd0 T drm_property_destroy_user_blobs +ffffffff81aace60 T drm_property_blob_get +ffffffff81aaceb0 T drm_property_lookup_blob +ffffffff81aaced0 T drm_property_replace_global_blob +ffffffff81aad050 T drm_property_replace_blob +ffffffff81aad0c0 T drm_mode_getblob_ioctl +ffffffff81aad1a0 T drm_mode_createblob_ioctl +ffffffff81aad2d0 T drm_mode_destroyblob_ioctl +ffffffff81aad410 T drm_property_change_valid_get +ffffffff81aad680 T drm_property_change_valid_put +ffffffff81aae000 T drm_rect_intersect +ffffffff81aae080 T drm_rect_clip_scaled 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drm_syncobj_find_fence +ffffffff81ab28e0 t drm_syncobj_fence_add_wait +ffffffff81ab29e0 T drm_syncobj_free +ffffffff81ab2a90 T drm_syncobj_create +ffffffff81ab2cb0 T drm_syncobj_get_handle +ffffffff81ab2e10 T drm_syncobj_get_fd +ffffffff81ab2e70 T drm_syncobj_open +ffffffff81ab2eb0 T drm_syncobj_release +ffffffff81ab2ef0 t drm_syncobj_release_handle +ffffffff81ab2fd0 T drm_syncobj_create_ioctl +ffffffff81ab3140 T drm_syncobj_destroy_ioctl +ffffffff81ab32b0 T drm_syncobj_handle_to_fd_ioctl +ffffffff81ab3520 T drm_syncobj_fd_to_handle_ioctl +ffffffff81ab3740 T drm_syncobj_transfer_ioctl +ffffffff81ab3c20 T drm_timeout_abs_to_jiffies +ffffffff81ab3d00 T drm_syncobj_wait_ioctl +ffffffff81ab3ea0 t drm_syncobj_array_find +ffffffff81ab4140 t drm_syncobj_array_free +ffffffff81ab4250 T drm_syncobj_timeline_wait_ioctl +ffffffff81ab43f0 T drm_syncobj_eventfd_ioctl +ffffffff81ab4420 T drm_syncobj_reset_ioctl +ffffffff81ab4520 T drm_syncobj_signal_ioctl +ffffffff81ab46d0 T drm_syncobj_timeline_signal_ioctl +ffffffff81ab4980 T drm_syncobj_query_ioctl +ffffffff81ab4c00 t drm_syncobj_array_wait_timeout +ffffffff81ab5120 t syncobj_wait_fence_func +ffffffff81ab5140 t syncobj_eventfd_entry_fence_func +ffffffff81ab6000 T drm_vblank_count +ffffffff81ab6090 T drm_crtc_accurate_vblank_count +ffffffff81ab61d0 t drm_update_vblank_count +ffffffff81ab6670 T drm_vblank_disable_and_save +ffffffff81ab67e0 T drm_vblank_init +ffffffff81ab6990 t vblank_disable_fn +ffffffff81ab6a30 t drm_vblank_init_release +ffffffff81ab6ac0 T drm_dev_has_vblank +ffffffff81ab6af0 T drm_crtc_vblank_waitqueue +ffffffff81ab6b40 T drm_calc_timestamping_constants +ffffffff81ab6d80 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff81ab7330 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff81ab7350 T drm_crtc_vblank_count +ffffffff81ab73e0 T drm_crtc_vblank_count_and_time +ffffffff81ab74b0 t drm_vblank_count_and_time +ffffffff81ab7570 T drm_crtc_next_vblank_start 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drm_crtc_get_sequence_ioctl +ffffffff81aba9b0 T drm_crtc_queue_sequence_ioctl +ffffffff81abacd0 t __get_vblank_counter +ffffffff81abb000 T drm_handle_vblank_works +ffffffff81abb1c0 T drm_vblank_cancel_pending_works +ffffffff81abb320 T drm_vblank_work_schedule +ffffffff81abb600 T drm_vblank_work_cancel_sync +ffffffff81abb7a0 T drm_vblank_work_flush +ffffffff81abb920 T drm_vblank_work_init +ffffffff81abb9a0 T drm_vblank_worker_init +ffffffff81abc000 T drm_vma_offset_manager_init +ffffffff81abc050 T drm_vma_offset_manager_destroy +ffffffff81abc070 T drm_vma_offset_lookup_locked +ffffffff81abc100 T drm_vma_offset_add +ffffffff81abc1b0 T drm_vma_offset_remove +ffffffff81abc210 T drm_vma_node_allow +ffffffff81abc230 t vma_node_allow +ffffffff81abc380 T drm_vma_node_allow_once +ffffffff81abc3a0 T drm_vma_node_revoke +ffffffff81abc440 T drm_vma_node_is_allowed +ffffffff81abd000 T hdmi_avi_infoframe_init +ffffffff81abd070 T hdmi_avi_infoframe_check +ffffffff81abd0c0 T hdmi_avi_infoframe_pack_only +ffffffff81abd2d0 T hdmi_avi_infoframe_pack +ffffffff81abd330 T hdmi_spd_infoframe_init +ffffffff81abd410 T hdmi_spd_infoframe_check +ffffffff81abd460 T hdmi_spd_infoframe_pack_only +ffffffff81abd5a0 T hdmi_spd_infoframe_pack +ffffffff81abd710 T hdmi_audio_infoframe_init +ffffffff81abd760 T hdmi_audio_infoframe_check +ffffffff81abd7b0 T hdmi_audio_infoframe_pack_only +ffffffff81abd910 T hdmi_audio_infoframe_pack +ffffffff81abd960 T hdmi_audio_infoframe_pack_for_dp +ffffffff81abda50 T hdmi_vendor_infoframe_init +ffffffff81abdab0 T hdmi_vendor_infoframe_check +ffffffff81abdb50 T hdmi_vendor_infoframe_pack_only +ffffffff81abdd10 T hdmi_vendor_infoframe_pack +ffffffff81abddb0 T hdmi_drm_infoframe_init +ffffffff81abde10 T hdmi_drm_infoframe_check +ffffffff81abde60 T hdmi_drm_infoframe_pack_only +ffffffff81abe060 T hdmi_drm_infoframe_pack +ffffffff81abe0b0 T hdmi_infoframe_check +ffffffff81abe210 T hdmi_infoframe_pack_only +ffffffff81abe440 T hdmi_infoframe_pack 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drm_dp_get_adjust_request_pre_emphasis +ffffffff81ac6180 T drm_dp_get_adjust_tx_ffe_preset +ffffffff81ac61c0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff81ac6240 T drm_dp_128b132b_lane_symbol_locked +ffffffff81ac62b0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff81ac62e0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff81ac6310 T drm_dp_128b132b_link_training_failed +ffffffff81ac6340 T drm_dp_read_clock_recovery_delay +ffffffff81ac6450 T drm_dp_read_channel_eq_delay +ffffffff81ac6560 T drm_dp_128b132b_read_aux_rd_interval +ffffffff81ac6630 T drm_dp_link_train_clock_recovery_delay +ffffffff81ac66c0 t __8b10b_clock_recovery_delay_us +ffffffff81ac6740 T drm_dp_link_train_channel_eq_delay +ffffffff81ac67b0 T drm_dp_phy_name +ffffffff81ac67f0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff81ac6810 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff81ac6880 T drm_dp_link_rate_to_bw_code +ffffffff81ac68f0 T drm_dp_bw_code_to_link_rate +ffffffff81ac6950 T drm_dp_dpcd_probe +ffffffff81ac6ac0 t drm_dp_dpcd_access +ffffffff81ac6c30 T drm_dp_dpcd_set_powered +ffffffff81ac6ca0 T drm_dp_dpcd_read +ffffffff81ac6e00 T drm_dp_dpcd_write +ffffffff81ac6f30 T drm_dp_dpcd_read_link_status +ffffffff81ac6f50 T drm_dp_dpcd_read_phy_link_status +ffffffff81ac7060 T drm_dp_downstream_is_type +ffffffff81ac70b0 T drm_dp_downstream_is_tmds +ffffffff81ac7120 T drm_dp_send_real_edid_checksum +ffffffff81ac73c0 T drm_dp_read_dpcd_caps +ffffffff81ac7580 T drm_dp_read_downstream_info +ffffffff81ac7690 T drm_dp_downstream_max_dotclock +ffffffff81ac76e0 T drm_dp_downstream_max_tmds_clock +ffffffff81ac7780 T drm_dp_downstream_min_tmds_clock +ffffffff81ac7800 T drm_dp_downstream_max_bpc +ffffffff81ac78a0 T drm_dp_downstream_420_passthrough +ffffffff81ac7900 T drm_dp_downstream_444_to_420_conversion +ffffffff81ac7960 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff81ac79c0 T drm_dp_downstream_mode +ffffffff81ac7a50 T drm_dp_downstream_id +ffffffff81ac7a70 T drm_dp_downstream_debug +ffffffff81ac7b30 T drm_dp_subconnector_type +ffffffff81ac7ba0 T drm_dp_set_subconnector_property +ffffffff81ac7c10 T drm_dp_read_sink_count_cap +ffffffff81ac7c60 T drm_dp_read_sink_count +ffffffff81ac7cd0 T drm_dp_remote_aux_init +ffffffff81ac7d00 t drm_dp_aux_crc_work +ffffffff81ac7ea0 T drm_dp_aux_init +ffffffff81ac7f70 T drm_dp_aux_register +ffffffff81ac80c0 T drm_dp_aux_unregister +ffffffff81ac80f0 T drm_dp_psr_setup_time +ffffffff81ac8140 T drm_dp_start_crc +ffffffff81ac8200 T drm_dp_stop_crc +ffffffff81ac82b0 T drm_dp_read_desc +ffffffff81ac84b0 T drm_dp_dsc_sink_max_slice_count +ffffffff81ac8540 T drm_dp_dsc_sink_line_buf_depth +ffffffff81ac8580 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff81ac85f0 T drm_dp_read_lttpr_common_caps +ffffffff81ac86c0 T drm_dp_read_lttpr_phy_caps +ffffffff81ac8790 T drm_dp_lttpr_count +ffffffff81ac8830 T drm_dp_lttpr_max_link_rate +ffffffff81ac8890 T drm_dp_lttpr_max_lane_count +ffffffff81ac88c0 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff81ac88f0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff81ac8920 T drm_dp_get_phy_test_pattern +ffffffff81ac8a70 T drm_dp_set_phy_test_pattern +ffffffff81ac8b40 T drm_dp_vsc_sdp_log +ffffffff81ac8ea0 T drm_dp_get_pcon_max_frl_bw +ffffffff81ac8ef0 T drm_dp_pcon_frl_prepare +ffffffff81ac8f50 T drm_dp_pcon_is_frl_ready +ffffffff81ac8fb0 T drm_dp_pcon_frl_configure_1 +ffffffff81ac90c0 T drm_dp_pcon_frl_configure_2 +ffffffff81ac9130 T drm_dp_pcon_reset_frl_config +ffffffff81ac9190 T drm_dp_pcon_frl_enable +ffffffff81ac9260 T drm_dp_pcon_hdmi_link_active +ffffffff81ac92c0 T drm_dp_pcon_hdmi_link_mode +ffffffff81ac9340 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff81ac9450 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff81ac9480 T drm_dp_pcon_dsc_max_slices +ffffffff81ac9510 T drm_dp_pcon_dsc_max_slice_width +ffffffff81ac9540 T drm_dp_pcon_dsc_bpp_incr +ffffffff81ac9580 T drm_dp_pcon_pps_default +ffffffff81ac9610 T drm_dp_pcon_pps_override_buf +ffffffff81ac96d0 T drm_dp_pcon_pps_override_param +ffffffff81ac97e0 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff81ac9890 T drm_edp_backlight_set_level +ffffffff81ac9980 T drm_edp_backlight_enable +ffffffff81ac9bd0 t drm_edp_backlight_set_enable +ffffffff81ac9d30 T drm_edp_backlight_disable +ffffffff81ac9d80 T drm_edp_backlight_init +ffffffff81aca340 T drm_panel_dp_aux_backlight +ffffffff81aca500 t __128b132b_channel_eq_delay_us +ffffffff81aca580 t __8b10b_channel_eq_delay_us +ffffffff81aca600 t drm_dp_aux_get_crc +ffffffff81aca700 t drm_dp_i2c_xfer +ffffffff81aca9a0 t drm_dp_i2c_functionality +ffffffff81aca9d0 t drm_dp_i2c_do_msg +ffffffff81acae00 t lock_bus +ffffffff81acae20 t trylock_bus +ffffffff81acae80 t unlock_bus +ffffffff81acaea0 t dp_aux_backlight_update_status +ffffffff81acb000 T drm_dp_encode_sideband_req +ffffffff81acb470 T drm_dp_decode_sideband_req +ffffffff81acb9e0 T drm_dp_dump_sideband_msg_req_body +ffffffff81acbde0 T drm_dp_mst_get_port_malloc +ffffffff81acbe30 T drm_dp_mst_put_port_malloc +ffffffff81acbf40 t kref_put +ffffffff81acbf80 T drm_atomic_get_mst_payload_state +ffffffff81acbfd0 T drm_dp_mst_dpcd_read +ffffffff81acc2f0 T drm_dp_mst_dpcd_write +ffffffff81acc350 t drm_dp_send_dpcd_write +ffffffff81acc5f0 T drm_dp_mst_connector_late_register +ffffffff81acc680 T drm_dp_mst_connector_early_unregister +ffffffff81acc6c0 T drm_dp_send_power_updown_phy +ffffffff81acc980 t drm_dp_mst_topology_put_port +ffffffff81accac0 t drm_dp_mst_wait_tx_reply +ffffffff81accea0 T drm_dp_send_query_stream_enc_status +ffffffff81acd1d0 T drm_dp_add_payload_part1 +ffffffff81acd3c0 T drm_dp_remove_payload +ffffffff81acd590 T drm_dp_add_payload_part2 +ffffffff81acd7a0 T drm_dp_get_vc_payload_bw +ffffffff81acd840 T drm_dp_read_mst_cap +ffffffff81acd8a0 T drm_dp_mst_topology_mgr_set_mst +ffffffff81acdbb0 t drm_dp_dpcd_write_payload +ffffffff81acdd80 t drm_dp_mst_topology_put_mstb +ffffffff81acdea0 T drm_dp_mst_topology_mgr_suspend +ffffffff81acdfb0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff81ace020 T drm_dp_mst_topology_mgr_resume +ffffffff81ace2d0 T drm_dp_mst_hpd_irq_handle_event +ffffffff81acf3d0 T drm_dp_mst_hpd_irq_send_new_request +ffffffff81acf470 T drm_dp_mst_detect_port +ffffffff81acf610 T drm_dp_mst_edid_read +ffffffff81acf740 T drm_dp_mst_get_edid +ffffffff81acf7d0 T drm_dp_atomic_find_time_slots +ffffffff81acfac0 T drm_atomic_get_mst_topology_state +ffffffff81acfad0 T drm_dp_atomic_release_time_slots +ffffffff81acfd20 T drm_dp_mst_atomic_setup_commit +ffffffff81acfeb0 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff81ad0030 T drm_dp_mst_root_conn_atomic_check +ffffffff81ad0160 T drm_dp_mst_update_slots +ffffffff81ad01c0 T drm_dp_check_act_status +ffffffff81ad03b0 T drm_dp_calc_pbn_mode +ffffffff81ad0410 T drm_dp_mst_dump_topology +ffffffff81ad0740 t drm_dp_mst_dump_mstb +ffffffff81ad07b0 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff81ad0920 T drm_dp_mst_dsc_aux_for_port +ffffffff81ad0bb0 T drm_dp_mst_atomic_enable_dsc +ffffffff81ad0d60 T drm_dp_mst_atomic_check +ffffffff81ad1090 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff81ad1350 t drm_dp_mst_duplicate_state +ffffffff81ad1550 t drm_dp_mst_destroy_state +ffffffff81ad1630 T drm_atomic_get_old_mst_topology_state +ffffffff81ad1640 T drm_atomic_get_new_mst_topology_state +ffffffff81ad1650 T drm_dp_mst_topology_mgr_init +ffffffff81ad1930 t drm_dp_mst_link_probe_work +ffffffff81ad1c40 t drm_dp_tx_work +ffffffff81ad1c90 t drm_dp_delayed_destroy_work +ffffffff81ad2240 t drm_dp_mst_up_req_work +ffffffff81ad2880 T drm_dp_mst_topology_mgr_destroy +ffffffff81ad2930 t drm_dp_mst_is_virtual_dpcd +ffffffff81ad2a30 t drm_dp_free_mst_branch_device +ffffffff81ad2a70 t drm_dp_mst_topology_get_port_validated_locked +ffffffff81ad2b00 t drm_dp_mst_dump_sideband_msg_tx +ffffffff81ad2d50 t process_single_down_tx_qlock +ffffffff81ad2ee0 t process_single_tx_qlock +ffffffff81ad33e0 t drm_dp_msg_data_crc4 +ffffffff81ad3510 t drm_dp_payload_send_msg +ffffffff81ad39f0 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff81ad3a80 t drm_dp_get_one_sb_msg +ffffffff81ad4240 t drm_dp_get_mst_branch_device +ffffffff81ad43c0 t drm_dp_check_and_send_link_address +ffffffff81ad44a0 t drm_dp_send_link_address +ffffffff81ad52c0 t drm_dp_send_enum_path_resources +ffffffff81ad5560 t drm_dp_port_set_pdt +ffffffff81ad5890 t drm_dp_mst_port_add_connector +ffffffff81ad5ac0 t drm_dp_mst_i2c_xfer +ffffffff81ad6290 t drm_dp_mst_i2c_functionality +ffffffff81ad62c0 t get_mst_branch_device_by_guid_helper +ffffffff81ad7000 T drm_dsc_dp_pps_header_init +ffffffff81ad7030 T drm_dsc_dp_rc_buffer_size +ffffffff81ad7090 T drm_dsc_pps_payload_pack +ffffffff81ad7350 T drm_dsc_set_const_params +ffffffff81ad73a0 T drm_dsc_set_rc_buf_thresh +ffffffff81ad7410 T drm_dsc_setup_rc_params +ffffffff81ad75e0 T drm_dsc_compute_rc_parameters +ffffffff81ad78e0 T drm_dsc_get_bpp_int +ffffffff81ad7970 T drm_dsc_initial_scale_value +ffffffff81ad79b0 T drm_dsc_flatness_det_thresh +ffffffff81ad8000 T drm_connector_attach_content_protection_property +ffffffff81ad8030 T drm_hdcp_check_ksvs_revoked +ffffffff81ad8090 T drm_hdcp_update_content_protection +ffffffff81ad9000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff81ad9120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff81ad9180 T drm_hdmi_avi_infoframe_bars +ffffffff81ad91d0 T drm_hdmi_avi_infoframe_content_type +ffffffff81ada000 T drm_scdc_read +ffffffff81ada0a0 T drm_scdc_write +ffffffff81ada1a0 T drm_scdc_get_scrambling_status +ffffffff81ada280 T drm_scdc_set_scrambling +ffffffff81ada440 T drm_scdc_set_high_tmds_clock_ratio +ffffffff81adb000 T drm_gem_ttm_mmap +ffffffff81adb080 T drm_gem_ttm_vmap +ffffffff81adb090 T drm_gem_ttm_vunmap +ffffffff81adc000 T ttm_agp_bind +ffffffff81adc060 T ttm_agp_unbind +ffffffff81adc080 T ttm_agp_is_bound +ffffffff81adc0d0 T ttm_agp_destroy +ffffffff81adc0f0 T ttm_agp_tt_create +ffffffff81add000 T ttm_bo_move_to_lru_tail +ffffffff81add040 T ttm_bo_set_bulk_move +ffffffff81add120 T ttm_bo_put +ffffffff81add750 T ttm_bo_eviction_valuable +ffffffff81add7a0 T ttm_mem_evict_first +ffffffff81addfe0 t ttm_bo_evict_swapout_allowable +ffffffff81ade220 t dma_resv_unlock +ffffffff81ade2d0 t ttm_bo_cleanup_refs +ffffffff81ade6e0 t ttm_bo_unreserve +ffffffff81ade7e0 T ttm_bo_pin +ffffffff81ade890 T ttm_bo_unpin +ffffffff81ade9c0 T ttm_bo_mem_space +ffffffff81adec40 t ttm_bo_add_move_fence +ffffffff81aded40 T ttm_bo_validate +ffffffff81adef20 T ttm_bo_init_reserved +ffffffff81adf160 T ttm_bo_init_validate +ffffffff81adf210 T ttm_bo_unmap_virtual +ffffffff81adf370 T ttm_bo_wait_ctx +ffffffff81adf410 T ttm_bo_swapout +ffffffff81adf740 t ttm_bo_handle_move_mem +ffffffff81adf910 T ttm_bo_tt_destroy +ffffffff81adf990 t ttm_bo_delayed_delete +ffffffff81ae0000 T ttm_mem_io_reserve +ffffffff81ae0060 T ttm_mem_io_free +ffffffff81ae00e0 T ttm_move_memcpy +ffffffff81ae02e0 T ttm_bo_move_memcpy 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ttm_eu_reserve_buffers +ffffffff81ae4680 T ttm_eu_fence_buffer_objects +ffffffff81ae4820 t __ww_mutex_lock +ffffffff81ae5000 T ttm_prot_from_caching +ffffffff81ae6000 T ttm_pool_alloc +ffffffff81ae6b50 t ttm_pool_free_range +ffffffff81ae6ed0 T ttm_pool_free +ffffffff81ae6f40 t ttm_pool_shrink +ffffffff81ae71a0 T ttm_pool_init +ffffffff81ae7480 T ttm_pool_fini +ffffffff81ae76d0 t ttm_pool_type_fini +ffffffff81ae7970 T ttm_pool_mgr_init +ffffffff81ae7cd0 t ttm_pool_shrinker_count +ffffffff81ae7d30 t ttm_pool_shrinker_scan +ffffffff81ae7d90 T ttm_pool_mgr_fini +ffffffff81ae8000 T ttm_range_man_init_nocheck +ffffffff81ae81b0 T ttm_range_man_fini_nocheck +ffffffff81ae8380 t ttm_range_man_alloc +ffffffff81ae8510 t ttm_range_man_free +ffffffff81ae8590 t ttm_range_man_intersects +ffffffff81ae85f0 t ttm_range_man_compatible +ffffffff81ae8650 t ttm_range_man_debug +ffffffff81ae9000 T ttm_lru_bulk_move_init +ffffffff81ae9020 T ttm_lru_bulk_move_tail +ffffffff81ae91e0 T ttm_resource_add_bulk_move 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drm_sched_init +ffffffff81af14f0 t drm_sched_job_timedout +ffffffff81af1670 t drm_sched_main +ffffffff81af1bb0 T drm_sched_fini +ffffffff81af1e10 T drm_sched_increase_karma +ffffffff81af1f60 t __delayed_work_tick +ffffffff81af1f80 t drm_sched_get_cleanup_job +ffffffff81af2100 t drm_sched_select_entity +ffffffff81af3000 t ch7017_init +ffffffff81af3160 t ch7017_dpms +ffffffff81af3470 t ch7017_mode_valid +ffffffff81af34b0 t ch7017_mode_set +ffffffff81af37e0 t ch7017_detect +ffffffff81af3810 t ch7017_get_hw_state +ffffffff81af38a0 t ch7017_destroy +ffffffff81af3900 t ch7017_dump_regs +ffffffff81af4000 t ch7xxx_init +ffffffff81af42d0 t ch7xxx_dpms +ffffffff81af43b0 t ch7xxx_mode_valid +ffffffff81af43f0 t ch7xxx_mode_set +ffffffff81af49d0 t ch7xxx_detect +ffffffff81af4c50 t ch7xxx_get_hw_state +ffffffff81af4d30 t ch7xxx_destroy +ffffffff81af4d90 t ch7xxx_dump_regs +ffffffff81af5000 t ivch_init +ffffffff81af53f0 t ivch_dpms +ffffffff81af5710 t ivch_mode_valid +ffffffff81af5750 t ivch_mode_set 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intel_hdmi_get_hw_state +ffffffff81b00880 t intel_hdmi_get_config +ffffffff81b00a50 t chv_hdmi_pre_pll_enable +ffffffff81b00a90 t chv_hdmi_pre_enable +ffffffff81b00c20 t vlv_enable_hdmi +ffffffff81b00ca0 t chv_hdmi_post_disable +ffffffff81b00d10 t chv_hdmi_post_pll_disable +ffffffff81b00d30 t vlv_hdmi_pre_pll_enable +ffffffff81b00d70 t vlv_hdmi_pre_enable +ffffffff81b00ef0 t vlv_hdmi_post_disable +ffffffff81b00f10 t intel_hdmi_pre_enable +ffffffff81b00f90 t cpt_enable_hdmi +ffffffff81b011f0 t ibx_enable_hdmi +ffffffff81b01460 t g4x_enable_hdmi +ffffffff81b01590 t intel_disable_hdmi +ffffffff81b01810 t intel_hdmi_prepare +ffffffff81b02000 T hsw_ips_disable +ffffffff81b02170 T hsw_ips_pre_update +ffffffff81b02210 T hsw_ips_post_update +ffffffff81b02440 T hsw_crtc_supports_ips +ffffffff81b024a0 T hsw_crtc_state_ips_capable +ffffffff81b02540 T hsw_ips_compute_config +ffffffff81b02680 T hsw_ips_get_config +ffffffff81b02720 T hsw_ips_crtc_debugfs_add +ffffffff81b03000 T i9xx_check_plane_surface +ffffffff81b03310 T i965_plane_max_stride +ffffffff81b03380 T intel_primary_plane_create +ffffffff81b03850 t i9xx_plane_min_cdclk +ffffffff81b038c0 t i9xx_plane_max_stride +ffffffff81b03930 t hsw_primary_max_stride +ffffffff81b03990 t ilk_primary_max_stride +ffffffff81b03a00 t i830_plane_update_arm +ffffffff81b03a50 t i9xx_plane_update_noarm +ffffffff81b03b80 t i9xx_plane_update_arm +ffffffff81b03f30 t i9xx_plane_disable_arm +ffffffff81b04040 t i9xx_plane_get_hw_state +ffffffff81b04140 t i9xx_plane_check +ffffffff81b04280 t vlv_primary_async_flip +ffffffff81b04310 t vlv_primary_enable_flip_done +ffffffff81b04380 t vlv_primary_disable_flip_done +ffffffff81b043f0 t g4x_primary_async_flip +ffffffff81b04520 t bdw_primary_enable_flip_done +ffffffff81b04590 t bdw_primary_disable_flip_done +ffffffff81b04600 t ivb_primary_enable_flip_done +ffffffff81b04670 t ivb_primary_disable_flip_done +ffffffff81b046e0 t ilk_primary_enable_flip_done +ffffffff81b04750 t ilk_primary_disable_flip_done +ffffffff81b047c0 T i9xx_get_initial_plane_config +ffffffff81b04c20 T i9xx_fixup_initial_plane_config +ffffffff81b04ce0 t i965_plane_format_mod_supported +ffffffff81b04de0 t i8xx_plane_format_mod_supported +ffffffff81b04e90 t i9xx_plane_ctl +ffffffff81b06000 T intel_set_memory_cxsr +ffffffff81b060b0 t _intel_set_memory_cxsr +ffffffff81b063c0 T ilk_disable_lp_wm +ffffffff81b064c0 T ilk_wm_sanitize +ffffffff81b06800 T i9xx_wm_init +ffffffff81b06e90 t intel_get_cxsr_latency +ffffffff81b06f50 t ilk_compute_pipe_wm +ffffffff81b07300 t ilk_compute_intermediate_wm +ffffffff81b07540 t ilk_initial_watermarks +ffffffff81b075d0 t ilk_optimize_watermarks +ffffffff81b076a0 t ilk_wm_get_hw_state +ffffffff81b07b20 t ilk_compute_wm_level +ffffffff81b08030 t ilk_validate_wm_level +ffffffff81b08180 t ilk_compute_wm_maximums +ffffffff81b083b0 t ilk_program_watermarks +ffffffff81b091e0 t ilk_wm_merge +ffffffff81b094a0 t vlv_compute_pipe_wm +ffffffff81b09e90 t vlv_compute_intermediate_wm +ffffffff81b0a1e0 t vlv_initial_watermarks +ffffffff81b0a270 t vlv_atomic_update_fifo +ffffffff81b0a580 t vlv_optimize_watermarks +ffffffff81b0a650 t vlv_wm_get_hw_state_and_sanitize +ffffffff81b0b530 t _vlv_compute_pipe_wm +ffffffff81b0b850 t vlv_invalidate_wms +ffffffff81b0b9c0 t vlv_program_watermarks +ffffffff81b0c200 t chv_set_memory_dvfs +ffffffff81b0c410 t g4x_compute_pipe_wm +ffffffff81b0cd40 t g4x_compute_intermediate_wm +ffffffff81b0d1c0 t g4x_initial_watermarks +ffffffff81b0d280 t g4x_optimize_watermarks +ffffffff81b0d380 t g4x_wm_get_hw_state_and_sanitize +ffffffff81b0dd70 t _g4x_compute_pipe_wm +ffffffff81b0e030 t g4x_program_watermarks +ffffffff81b0e400 t pnv_update_wm +ffffffff81b0eb80 t i965_update_wm +ffffffff81b0efc0 t i9xx_update_wm +ffffffff81b0f810 t i845_update_wm +ffffffff81b10000 T icl_dsi_frame_update +ffffffff81b100c0 T icl_dsi_init +ffffffff81b10ac0 t gen11_dsi_pre_pll_enable +ffffffff81b10f60 t gen11_dsi_pre_enable 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intel_digital_connector_atomic_check +ffffffff81b17240 T intel_digital_connector_duplicate_state +ffffffff81b172d0 T intel_connector_needs_modeset +ffffffff81b17340 T intel_any_crtc_needs_modeset +ffffffff81b173d0 T intel_atomic_get_digital_connector_state +ffffffff81b173e0 T intel_crtc_duplicate_state +ffffffff81b17530 T intel_crtc_free_hw_state +ffffffff81b175b0 T intel_crtc_destroy_state +ffffffff81b17690 T intel_atomic_state_alloc +ffffffff81b17730 T intel_atomic_state_free +ffffffff81b17780 T intel_atomic_state_clear +ffffffff81b177e0 T intel_atomic_get_crtc_state +ffffffff81b18000 T intel_plane_alloc +ffffffff81b180e0 T intel_plane_free +ffffffff81b18120 T intel_plane_destroy_state +ffffffff81b181f0 T intel_plane_duplicate_state +ffffffff81b182c0 T intel_adjusted_rate +ffffffff81b18340 T intel_plane_pixel_rate +ffffffff81b183d0 T intel_plane_data_rate +ffffffff81b18490 T intel_plane_calc_min_cdclk +ffffffff81b18610 T intel_plane_copy_uapi_to_hw_state +ffffffff81b18780 T intel_plane_copy_hw_state +ffffffff81b18870 T intel_plane_set_invisible +ffffffff81b18970 T intel_plane_atomic_check_with_state +ffffffff81b19610 T intel_plane_atomic_check +ffffffff81b19790 T intel_plane_update_noarm +ffffffff81b197d0 T intel_plane_update_arm +ffffffff81b19810 T intel_plane_disable_arm +ffffffff81b19830 T intel_crtc_planes_update_noarm +ffffffff81b19960 T intel_crtc_planes_update_arm +ffffffff81b19d90 T intel_atomic_plane_check_clipping +ffffffff81b1a050 T intel_plane_check_src_coordinates +ffffffff81b1a220 T intel_plane_helper_add +ffffffff81b1a260 t intel_prepare_plane_fb +ffffffff81b1a540 t intel_cleanup_plane_fb +ffffffff81b1b000 T intel_audio_sdp_split_update +ffffffff81b1b0e0 T intel_audio_compute_config +ffffffff81b1b1a0 T intel_audio_codec_enable +ffffffff81b1b3b0 T intel_audio_codec_disable +ffffffff81b1b630 T intel_audio_codec_get_config +ffffffff81b1b680 T intel_audio_hooks_init +ffffffff81b1b700 T intel_audio_cdclk_change_pre +ffffffff81b1b7a0 T intel_audio_cdclk_change_post +ffffffff81b1b890 T intel_audio_init +ffffffff81b1b8a0 T intel_audio_register +ffffffff81b1b8d0 T intel_audio_deinit +ffffffff81b1b920 t g4x_audio_codec_enable +ffffffff81b1bb30 t g4x_audio_codec_disable +ffffffff81b1bbd0 t g4x_audio_codec_get_config +ffffffff81b1bd10 t ibx_audio_codec_enable +ffffffff81b1bf10 t ibx_audio_codec_disable +ffffffff81b1c120 t intel_acomp_get_config +ffffffff81b1c1a0 t audio_config_hdmi_pixel_clock +ffffffff81b1c390 t hsw_audio_codec_enable +ffffffff81b1cb20 t hsw_audio_codec_disable +ffffffff81b1d000 T intel_backlight_invert_pwm_level +ffffffff81b1d0c0 T intel_backlight_set_pwm_level +ffffffff81b1d130 T intel_backlight_level_to_pwm +ffffffff81b1d350 T intel_backlight_level_from_pwm +ffffffff81b1d510 T intel_backlight_set_acpi +ffffffff81b1d750 T intel_backlight_disable +ffffffff81b1d840 T intel_backlight_enable +ffffffff81b1d900 t __intel_backlight_enable +ffffffff81b1da50 T intel_backlight_device_register +ffffffff81b1dd70 t kasprintf +ffffffff81b1de50 T intel_backlight_device_unregister +ffffffff81b1deb0 T intel_backlight_update +ffffffff81b1df50 T intel_backlight_setup +ffffffff81b1e140 T intel_backlight_destroy +ffffffff81b1e170 T intel_backlight_init_funcs +ffffffff81b1e2f0 t intel_backlight_device_update_status +ffffffff81b1e550 t intel_backlight_device_get_brightness +ffffffff81b1e720 t bxt_setup_backlight +ffffffff81b1e9b0 t bxt_get_backlight +ffffffff81b1e9f0 t bxt_set_backlight +ffffffff81b1ea30 t bxt_disable_backlight +ffffffff81b1eb90 t bxt_enable_backlight +ffffffff81b1ee70 t bxt_hz_to_pwm +ffffffff81b1eeb0 t cnp_setup_backlight +ffffffff81b1f1b0 t cnp_disable_backlight +ffffffff81b1f290 t cnp_enable_backlight +ffffffff81b1f480 t cnp_hz_to_pwm +ffffffff81b1f4c0 t lpt_setup_backlight +ffffffff81b1f8a0 t lpt_get_backlight +ffffffff81b1f900 t lpt_set_backlight +ffffffff81b1f980 t lpt_disable_backlight +ffffffff81b1fad0 t lpt_enable_backlight +ffffffff81b1fd20 t lpt_hz_to_pwm +ffffffff81b1fd90 t pch_get_backlight +ffffffff81b1fdf0 t spt_hz_to_pwm +ffffffff81b1fe40 t pch_setup_backlight +ffffffff81b20090 t pch_set_backlight +ffffffff81b20110 t pch_disable_backlight +ffffffff81b20230 t pch_enable_backlight +ffffffff81b204f0 t pch_hz_to_pwm +ffffffff81b20530 t ext_pwm_setup_backlight +ffffffff81b205f0 t ext_pwm_get_backlight +ffffffff81b20640 t ext_pwm_set_backlight +ffffffff81b20660 t ext_pwm_disable_backlight +ffffffff81b20680 t ext_pwm_enable_backlight +ffffffff81b206b0 t vlv_setup_backlight +ffffffff81b20940 t vlv_get_backlight +ffffffff81b209f0 t vlv_set_backlight +ffffffff81b20a80 t vlv_disable_backlight +ffffffff81b20b60 t vlv_enable_backlight +ffffffff81b20d40 t vlv_hz_to_pwm +ffffffff81b20df0 t i965_setup_backlight +ffffffff81b21060 t i9xx_get_backlight +ffffffff81b21110 t i9xx_set_backlight +ffffffff81b21270 t i965_disable_backlight +ffffffff81b21340 t i965_enable_backlight +ffffffff81b21530 t i965_hz_to_pwm +ffffffff81b21590 t i9xx_setup_backlight +ffffffff81b21910 t i9xx_disable_backlight +ffffffff81b21980 t i9xx_enable_backlight +ffffffff81b21b60 t i9xx_hz_to_pwm +ffffffff81b21bc0 t intel_pwm_setup_backlight +ffffffff81b21ce0 t intel_pwm_get_backlight +ffffffff81b21dc0 t intel_pwm_set_backlight +ffffffff81b21e80 t intel_pwm_disable_backlight +ffffffff81b21f40 t intel_pwm_enable_backlight +ffffffff81b23000 T intel_bios_encoder_port +ffffffff81b23080 t dvo_port_to_port +ffffffff81b23260 T intel_bios_dp_max_link_rate +ffffffff81b232e0 T intel_bios_dp_max_lane_count +ffffffff81b23330 T intel_bios_encoder_supports_dvi +ffffffff81b23360 T intel_bios_encoder_supports_hdmi +ffffffff81b233a0 T intel_bios_encoder_supports_dp +ffffffff81b233d0 T intel_bios_encoder_supports_edp +ffffffff81b23410 T intel_bios_encoder_supports_dsi +ffffffff81b23440 T intel_bios_encoder_is_lspcon +ffffffff81b23490 T intel_bios_hdmi_level_shift +ffffffff81b234f0 T intel_bios_hdmi_max_tmds_clock +ffffffff81b23580 T intel_bios_is_valid_vbt +ffffffff81b23680 T intel_bios_init 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intel_bios_encoder_data_lookup +ffffffff81b28820 T intel_bios_for_each_encoder +ffffffff81b288a0 t opregion_get_panel_type +ffffffff81b288c0 t vbt_get_panel_type +ffffffff81b289d0 t pnpid_get_panel_type +ffffffff81b28bd0 t fallback_get_panel_type +ffffffff81b28c00 t fill_detail_timing_data +ffffffff81b29000 T icl_pcode_restrict_qgv_points +ffffffff81b29130 T intel_bw_init_hw +ffffffff81b292a0 t tgl_get_bw_info +ffffffff81b298c0 t icl_get_bw_info +ffffffff81b29cb0 T intel_bw_crtc_update +ffffffff81b29da0 t intel_bw_crtc_data_rate +ffffffff81b29ec0 T intel_atomic_get_old_bw_state +ffffffff81b29ee0 T intel_atomic_get_new_bw_state +ffffffff81b29f00 T intel_atomic_get_bw_state +ffffffff81b29f20 T intel_bw_min_cdclk +ffffffff81b2a1a0 T intel_bw_calc_min_cdclk +ffffffff81b2a5b0 T intel_bw_atomic_check +ffffffff81b2b0e0 T intel_bw_init +ffffffff81b2b160 t icl_get_qgv_points +ffffffff81b2b740 t skl_plane_calc_dbuf_bw +ffffffff81b2b890 t intel_bw_duplicate_state +ffffffff81b2b910 t intel_bw_destroy_state +ffffffff81b2c000 T intel_cdclk_get_cdclk +ffffffff81b2c020 T intel_cdclk_init_hw +ffffffff81b2c850 T intel_cdclk_uninit_hw +ffffffff81b2c970 T intel_cdclk_needs_modeset +ffffffff81b2c9b0 T intel_cdclk_dump_config +ffffffff81b2ca30 T intel_set_cdclk_pre_plane_update +ffffffff81b2cda0 t intel_set_cdclk +ffffffff81b2d1c0 T intel_set_cdclk_post_plane_update +ffffffff81b2d480 T intel_crtc_compute_min_cdclk +ffffffff81b2d830 T intel_atomic_get_cdclk_state +ffffffff81b2d850 T intel_cdclk_atomic_check +ffffffff81b2d970 T intel_cdclk_init +ffffffff81b2d9f0 T intel_modeset_calc_cdclk +ffffffff81b2e0c0 t intel_cdclk_can_crawl +ffffffff81b2e150 T intel_update_max_cdclk +ffffffff81b2e4d0 T intel_update_cdclk +ffffffff81b2e570 T intel_read_rawclk +ffffffff81b2e720 t i9xx_hrawclk +ffffffff81b2e7e0 T intel_cdclk_debugfs_register +ffffffff81b2e810 T intel_init_cdclk_hooks +ffffffff81b2ec40 t bxt_set_cdclk +ffffffff81b2f300 t _bxt_set_cdclk +ffffffff81b2fb70 t skl_set_cdclk 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i9xx_color_commit_arm +ffffffff81b34dd0 t chv_load_luts +ffffffff81b351e0 t chv_read_luts +ffffffff81b35460 t chv_lut_equal +ffffffff81b35790 t chv_read_csc +ffffffff81b358b0 t intel_color_add_affected_planes +ffffffff81b35a30 t _check_luts +ffffffff81b35bb0 t i965_load_luts +ffffffff81b35f20 t i965_read_luts +ffffffff81b36300 t vlv_color_check +ffffffff81b367d0 t vlv_load_luts +ffffffff81b36980 t i965_lut_equal +ffffffff81b36b60 t vlv_read_csc +ffffffff81b36d40 t i9xx_color_check +ffffffff81b36ff0 t i9xx_load_luts +ffffffff81b37460 t i9xx_read_luts +ffffffff81b37810 t i9xx_lut_equal +ffffffff81b37a30 t icl_color_check +ffffffff81b37e50 t icl_color_commit_noarm +ffffffff81b38110 t icl_color_commit_arm +ffffffff81b38200 t icl_load_luts +ffffffff81b38ab0 t icl_read_luts +ffffffff81b38e00 t icl_lut_equal +ffffffff81b39180 t icl_read_csc +ffffffff81b39440 t ilk_csc_convert_ctm +ffffffff81b39860 t ilk_update_pipe_csc +ffffffff81b39ab0 t glk_load_degamma_lut +ffffffff81b39d70 t ivb_load_lut_ext_max +ffffffff81b39eb0 t glk_load_lut_ext2_max +ffffffff81b39ff0 t bdw_load_lut_10 +ffffffff81b3a250 t glk_read_degamma_lut +ffffffff81b3a3d0 t bdw_read_lut_10 +ffffffff81b3a560 t ilk_read_pipe_csc +ffffffff81b3a790 t icl_color_post_update +ffffffff81b3a7c0 t glk_color_check +ffffffff81b3ad20 t skl_color_commit_noarm +ffffffff81b3ad70 t skl_color_commit_arm +ffffffff81b3aea0 t glk_load_luts +ffffffff81b3b060 t glk_read_luts +ffffffff81b3b200 t glk_lut_equal +ffffffff81b3b530 t skl_read_csc +ffffffff81b3b580 t ilk_csc_limited_range +ffffffff81b3b620 t ilk_assign_csc +ffffffff81b3b920 t ivb_color_check +ffffffff81b3c000 t bdw_load_luts +ffffffff81b3c200 t bdw_read_luts +ffffffff81b3c420 t ivb_lut_equal +ffffffff81b3c7f0 t ilk_assign_luts +ffffffff81b3ca50 t ilk_color_commit_noarm +ffffffff81b3caa0 t hsw_color_commit_arm +ffffffff81b3cb60 t ilk_read_csc +ffffffff81b3cbb0 t ivb_load_luts +ffffffff81b3cdb0 t ivb_read_luts +ffffffff81b3d2a0 t ivb_load_lut_10 +ffffffff81b3d4b0 t ilk_color_commit_arm +ffffffff81b3d540 t ilk_color_check +ffffffff81b3d7c0 t ilk_load_luts +ffffffff81b3da50 t ilk_read_luts +ffffffff81b3dcd0 t ilk_lut_equal +ffffffff81b3f000 T intel_combo_phy_power_up_lanes +ffffffff81b3f140 T intel_combo_phy_init +ffffffff81b3f6b0 T intel_combo_phy_uninit +ffffffff81b3f8a0 t icl_combo_phy_verify_state +ffffffff81b40000 T intel_connector_init +ffffffff81b40090 T intel_connector_alloc +ffffffff81b40140 T intel_connector_free +ffffffff81b40190 T intel_connector_destroy +ffffffff81b40210 T intel_connector_register +ffffffff81b40220 T intel_connector_unregister +ffffffff81b40230 T intel_connector_attach_encoder +ffffffff81b40250 T intel_connector_get_hw_state +ffffffff81b402b0 T intel_connector_get_pipe +ffffffff81b40380 T intel_connector_update_modes +ffffffff81b403b0 T intel_ddc_get_modes +ffffffff81b40440 T intel_attach_force_audio_property +ffffffff81b404e0 T intel_attach_broadcast_rgb_property +ffffffff81b40590 T intel_attach_aspect_ratio_property +ffffffff81b40600 T intel_attach_hdmi_colorspace_property +ffffffff81b40660 T intel_attach_dp_colorspace_property +ffffffff81b406c0 T intel_attach_scaling_mode_property +ffffffff81b41000 T intel_crt_port_enabled +ffffffff81b41090 T intel_crt_reset +ffffffff81b41190 T intel_crt_init +ffffffff81b41650 t hsw_crt_get_config +ffffffff81b41710 t hsw_crt_compute_config +ffffffff81b41820 t hsw_pre_pll_enable_crt +ffffffff81b41890 t hsw_pre_enable_crt +ffffffff81b41940 t hsw_enable_crt +ffffffff81b41b30 t hsw_disable_crt +ffffffff81b41ba0 t hsw_post_disable_crt +ffffffff81b41d90 t pch_crt_compute_config +ffffffff81b41de0 t pch_disable_crt +ffffffff81b41e10 t pch_post_disable_crt +ffffffff81b41f00 t intel_crt_compute_config +ffffffff81b41f50 t intel_disable_crt +ffffffff81b42040 t intel_crt_get_config +ffffffff81b420e0 t intel_crt_get_hw_state +ffffffff81b421b0 t intel_enable_crt +ffffffff81b422a0 t intel_spurious_crt_detect_dmi_callback +ffffffff81b42300 t intel_crt_get_modes +ffffffff81b42450 t intel_crt_detect +ffffffff81b42740 t intel_crt_mode_valid +ffffffff81b42860 t intel_crt_get_edid +ffffffff81b42940 t intel_crt_detect_hotplug +ffffffff81b42e50 t intel_crt_detect_ddc +ffffffff81b42f50 t intel_crt_load_detect +ffffffff81b44000 T intel_first_crtc +ffffffff81b44020 T intel_crtc_for_pipe +ffffffff81b44080 T intel_crtc_wait_for_next_vblank +ffffffff81b44090 T intel_wait_for_vblank_if_active +ffffffff81b44100 T intel_crtc_get_vblank_counter +ffffffff81b44190 T intel_crtc_max_vblank_count +ffffffff81b44220 T intel_crtc_vblank_on +ffffffff81b442c0 t assert_vblank_disabled +ffffffff81b443b0 T intel_crtc_vblank_off +ffffffff81b443e0 T intel_crtc_state_alloc +ffffffff81b444a0 T intel_crtc_state_reset +ffffffff81b44540 T intel_crtc_init +ffffffff81b44940 T intel_wait_for_vblank_workers +ffffffff81b44a00 T intel_usecs_to_scanlines +ffffffff81b44a50 T intel_pipe_update_start +ffffffff81b44f20 T intel_pipe_update_end +ffffffff81b452a0 t intel_crtc_destroy +ffffffff81b452e0 t intel_crtc_late_register +ffffffff81b45310 t intel_crtc_vblank_work +ffffffff81b46000 T intel_output_format_name +ffffffff81b46040 T intel_crtc_state_dump +ffffffff81b47620 t ilk_dump_csc +ffffffff81b48000 T intel_cursor_plane_create +ffffffff81b48240 t i845_cursor_max_stride +ffffffff81b48270 t i845_cursor_update_arm +ffffffff81b484d0 t i845_cursor_disable_arm +ffffffff81b484f0 t i845_cursor_get_hw_state +ffffffff81b485b0 t i845_check_cursor +ffffffff81b48770 t i9xx_cursor_max_stride +ffffffff81b487b0 t i9xx_cursor_update_arm +ffffffff81b48b70 t i9xx_cursor_disable_arm +ffffffff81b48b90 t i9xx_cursor_get_hw_state +ffffffff81b48ca0 t i9xx_check_cursor +ffffffff81b48f50 t intel_check_cursor +ffffffff81b491a0 t intel_legacy_cursor_update +ffffffff81b49600 t intel_cursor_format_mod_supported +ffffffff81b4a000 T intel_is_c10phy +ffffffff81b4a040 T intel_cx0_phy_set_signal_levels +ffffffff81b4a6f0 t intel_cx0_rmw +ffffffff81b4a800 T intel_c10pll_readout_hw_state +ffffffff81b4a9f0 T intel_c10pll_dump_hw_state +ffffffff81b4acc0 T intel_cx0_phy_check_hdmi_link_rate +ffffffff81b4ae50 T intel_cx0pll_calc_state +ffffffff81b4b2a0 T intel_c20pll_readout_hw_state +ffffffff81b4b8f0 t intel_c20_sram_read +ffffffff81b4ba30 T intel_c20pll_dump_hw_state +ffffffff81b4bea0 T intel_c10pll_calc_port_clock +ffffffff81b4bf80 T intel_c20pll_calc_port_clock +ffffffff81b4c080 T intel_mtl_tbt_calc_port_clock +ffffffff81b4c1f0 T intel_mtl_pll_enable +ffffffff81b4dde0 T intel_mtl_pll_disable +ffffffff81b4e300 T intel_mtl_port_pll_type +ffffffff81b4e390 T intel_c10pll_state_verify +ffffffff81b4e6d0 t __intel_cx0_read +ffffffff81b4eb20 t __intel_cx0_write +ffffffff81b4eef0 t intel_cx0_bus_reset +ffffffff81b4f040 t intel_cx0_wait_for_ack +ffffffff81b4f1f0 t intel_cx0_powerdown_change_sequence +ffffffff81b4f4a0 t intel_c20_sram_write +ffffffff81b50000 T hsw_prepare_dp_ddi_buffers +ffffffff81b501d0 T intel_wait_ddi_buf_idle +ffffffff81b50420 T intel_ddi_set_dp_msa +ffffffff81b50610 T intel_ddi_enable_transcoder_func +ffffffff81b50700 t intel_ddi_transcoder_func_reg_val_get +ffffffff81b509c0 T intel_ddi_disable_transcoder_func +ffffffff81b50be0 T intel_ddi_toggle_hdcp_bits +ffffffff81b50d40 T intel_ddi_connector_get_hw_state +ffffffff81b50eb0 T intel_ddi_get_hw_state +ffffffff81b50f30 t intel_ddi_get_encoder_pipes +ffffffff81b513f0 T intel_ddi_enable_transcoder_clock +ffffffff81b514c0 T intel_ddi_disable_transcoder_clock +ffffffff81b51530 T intel_ddi_level +ffffffff81b51750 T icl_ddi_combo_get_pll +ffffffff81b517e0 T hsw_ddi_enable_clock +ffffffff81b518a0 T hsw_ddi_disable_clock +ffffffff81b518e0 T hsw_ddi_is_clock_enabled +ffffffff81b51950 T intel_ddi_enable_clock +ffffffff81b51990 T intel_ddi_disable_clock +ffffffff81b519d0 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff81b51be0 T dp_tp_ctl_reg +ffffffff81b51c60 T dp_tp_status_reg +ffffffff81b51ce0 T intel_ddi_update_pipe +ffffffff81b51d80 T intel_ddi_update_active_dpll +ffffffff81b51ea0 T intel_ddi_compute_min_voltage_level +ffffffff81b51f20 T intel_ddi_get_clock +ffffffff81b52040 T intel_ddi_port_pll_type +ffffffff81b52080 T hsw_ddi_get_config +ffffffff81b52190 t intel_ddi_get_config +ffffffff81b52c00 T intel_ddi_init +ffffffff81b53ad0 t intel_ddi_hotplug +ffffffff81b53fb0 t intel_ddi_compute_output_type +ffffffff81b54030 t intel_ddi_compute_config +ffffffff81b541b0 t intel_ddi_compute_config_late +ffffffff81b544a0 t intel_enable_ddi +ffffffff81b54f30 t intel_ddi_pre_pll_enable +ffffffff81b55170 t intel_ddi_pre_enable +ffffffff81b563e0 t intel_disable_ddi +ffffffff81b565e0 t intel_ddi_post_pll_disable +ffffffff81b566e0 t intel_ddi_post_disable +ffffffff81b56c40 t intel_ddi_sync_state +ffffffff81b56d10 t intel_ddi_initial_fastset_check +ffffffff81b56df0 t intel_ddi_encoder_suspend +ffffffff81b56e00 t intel_ddi_encoder_shutdown +ffffffff81b56e30 t intel_ddi_get_power_domains +ffffffff81b56fe0 t mtl_ddi_get_config +ffffffff81b57110 t dg2_ddi_get_config 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icl_ddi_tc_is_clock_enabled +ffffffff81b58840 t icl_ddi_tc_get_config +ffffffff81b58ab0 t bxt_ddi_get_config +ffffffff81b58b40 t skl_ddi_enable_clock +ffffffff81b58c60 t skl_ddi_disable_clock +ffffffff81b58d00 t skl_ddi_is_clock_enabled +ffffffff81b58d80 t skl_ddi_get_config +ffffffff81b58e30 t icl_combo_phy_set_signal_levels +ffffffff81b59b10 t tgl_dkl_phy_set_signal_levels +ffffffff81b59eb0 t icl_mg_phy_set_signal_levels +ffffffff81b5a940 t hsw_set_signal_levels +ffffffff81b5ad20 t intel_ddi_max_lanes +ffffffff81b5ae10 t need_aux_ch +ffffffff81b5ae90 t intel_ddi_tc_encoder_suspend_complete +ffffffff81b5aed0 t intel_ddi_tc_encoder_shutdown_complete +ffffffff81b5af10 t lpt_digital_port_connected +ffffffff81b5af80 t bdw_digital_port_connected +ffffffff81b5aff0 t hsw_digital_port_connected +ffffffff81b5b060 t intel_ddi_init_dp_connector +ffffffff81b5b150 t intel_ddi_init_hdmi_connector +ffffffff81b5b1c0 t intel_ddi_encoder_reset +ffffffff81b5b2b0 t intel_ddi_encoder_destroy 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intel_phy_is_combo +ffffffff81b61980 T intel_phy_is_tc +ffffffff81b619f0 T intel_phy_is_snps +ffffffff81b61a40 T intel_port_to_phy +ffffffff81b61af0 T intel_port_to_tc +ffffffff81b61c00 T intel_aux_power_domain +ffffffff81b61c50 T intel_modeset_get_crtc_power_domains +ffffffff81b61e90 T intel_modeset_put_crtc_power_domains +ffffffff81b61ec0 T intel_encoder_destroy +ffffffff81b61f00 T intel_encoder_get_config +ffffffff81b61f40 t intel_crtc_readout_derived_state +ffffffff81b623b0 T intel_link_compute_m_n +ffffffff81b624e0 T intel_panel_sanitize_ssc +ffffffff81b625d0 T intel_zero_m_n +ffffffff81b62610 T intel_set_m_n +ffffffff81b626f0 T intel_cpu_transcoder_has_m2_n2 +ffffffff81b62750 T intel_cpu_transcoder_set_m1_n1 +ffffffff81b62940 T intel_cpu_transcoder_set_m2_n2 +ffffffff81b62ab0 T i9xx_set_pipeconf +ffffffff81b62c70 T ilk_set_pipeconf +ffffffff81b62e50 T bdw_get_pipe_misc_bpp +ffffffff81b62f30 T ilk_get_lanes_required +ffffffff81b62f90 T intel_get_m_n +ffffffff81b630c0 T intel_cpu_transcoder_get_m1_n1 +ffffffff81b63290 T intel_cpu_transcoder_get_m2_n2 +ffffffff81b63420 T intel_crtc_get_pipe_config +ffffffff81b634a0 T i9xx_crtc_clock_get +ffffffff81b63770 T intel_dotclock_calculate +ffffffff81b637d0 T intel_crtc_dotclock +ffffffff81b638a0 T intel_encoder_current_mode +ffffffff81b63aa0 T intel_fuzzy_clock_check +ffffffff81b63af0 T intel_pipe_config_compare +ffffffff81b67560 t pipe_config_mismatch +ffffffff81b67660 t pipe_config_infoframe_mismatch +ffffffff81b67850 T intel_modeset_all_pipes +ffffffff81b67a80 T intel_atomic_add_affected_planes +ffffffff81b67b60 T intel_calc_active_pipes +ffffffff81b67bf0 T intel_atomic_check +ffffffff81b69f30 t copy_bigjoiner_crtc_state_nomodeset +ffffffff81b6a060 t intel_atomic_check_planes +ffffffff81b6ab50 t intel_modeset_checks +ffffffff81b6ace0 t intel_atomic_check_crtcs +ffffffff81b6b170 t intel_async_flip_check_hw +ffffffff81b6b660 T intel_crtc_arm_fifo_underrun +ffffffff81b6b700 T intel_atomic_helper_free_state_worker +ffffffff81b6b780 T intel_atomic_commit +ffffffff81b6bb80 t intel_atomic_commit_ready +ffffffff81b6bc10 t intel_atomic_commit_work +ffffffff81b6bc30 t intel_atomic_commit_tail +ffffffff81b6d0b0 T intel_plane_destroy +ffffffff81b6d0f0 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81b6d170 T assert_port_valid +ffffffff81b6d1f0 T intel_setup_outputs +ffffffff81b6dc70 T intel_mode_valid +ffffffff81b6ddf0 T intel_cpu_transcoder_mode_valid +ffffffff81b6deb0 T intel_mode_valid_max_plane_size +ffffffff81b6df30 T intel_init_display_hooks +ffffffff81b6dfb0 T intel_initial_commit +ffffffff81b6e1c0 T i830_enable_pipe +ffffffff81b6e940 T i830_disable_pipe +ffffffff81b6ecd0 T intel_hpd_poll_fini +ffffffff81b6ee10 T intel_scanout_needs_vtd_wa +ffffffff81b6ee50 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81b6eff0 t intel_atomic_cleanup_work +ffffffff81b6f120 t intel_pre_plane_update +ffffffff81b6f730 t hsw_get_pipe_config +ffffffff81b70520 t hsw_crtc_enable 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i915gm_enable_vblank +ffffffff81b7ce60 T i965_enable_vblank +ffffffff81b7cef0 T ilk_enable_vblank +ffffffff81b7cfc0 T bdw_enable_vblank +ffffffff81b7d1d0 T i8xx_disable_vblank +ffffffff81b7d240 T i915gm_disable_vblank +ffffffff81b7d320 T i965_disable_vblank +ffffffff81b7d390 T ilk_disable_vblank +ffffffff81b7d4b0 T bdw_disable_vblank +ffffffff81b7d680 T vlv_display_irq_reset +ffffffff81b7d7a0 T vlv_display_irq_postinstall +ffffffff81b7d910 T gen8_display_irq_reset +ffffffff81b7dae0 T gen11_display_irq_reset +ffffffff81b7de10 T gen8_irq_power_well_post_enable +ffffffff81b7dfb0 T gen8_irq_power_well_pre_disable +ffffffff81b7e100 T valleyview_enable_display_irqs +ffffffff81b7e260 T valleyview_disable_display_irqs +ffffffff81b7e3b0 T ilk_de_irq_postinstall +ffffffff81b7e4d0 T gen8_de_irq_postinstall +ffffffff81b7e9b0 T gen11_de_irq_postinstall +ffffffff81b7ea30 T dg1_de_irq_postinstall +ffffffff81b7eab0 T intel_display_irq_init +ffffffff81b7f000 T intel_display_power_domain_str +ffffffff81b7f070 T __intel_display_power_is_enabled +ffffffff81b7f150 T intel_display_power_is_enabled +ffffffff81b7f290 T intel_display_power_set_target_dc_state +ffffffff81b7f3e0 T intel_display_power_get +ffffffff81b7f480 t __intel_display_power_get_domain +ffffffff81b7f690 T intel_display_power_get_if_enabled +ffffffff81b7f810 T __intel_display_power_put_async +ffffffff81b7fa40 t __intel_display_power_put_domain +ffffffff81b7fbe0 T intel_display_power_flush_work +ffffffff81b7fd30 t release_async_put_domains +ffffffff81b7fe40 T intel_display_power_put_unchecked +ffffffff81b7feb0 T intel_display_power_get_in_set +ffffffff81b7ffb0 T intel_display_power_get_in_set_if_enabled +ffffffff81b80070 T intel_display_power_put_mask_in_set +ffffffff81b80160 T intel_power_domains_init +ffffffff81b803e0 t intel_display_power_put_async_work +ffffffff81b806b0 T intel_power_domains_cleanup +ffffffff81b806d0 T gen9_dbuf_slices_update +ffffffff81b80930 T intel_power_domains_init_hw +ffffffff81b80fa0 t icl_display_core_init +ffffffff81b818b0 t bxt_display_core_init +ffffffff81b81a60 t vlv_cmnlane_wa +ffffffff81b81b70 t assert_ved_power_gated +ffffffff81b81c40 t hsw_assert_cdclk +ffffffff81b81d80 t intel_pch_reset_handshake +ffffffff81b81e30 T intel_power_domains_driver_remove +ffffffff81b81f50 T intel_power_domains_sanitize_state +ffffffff81b82070 T intel_power_domains_enable +ffffffff81b820e0 T intel_power_domains_disable +ffffffff81b821c0 T intel_power_domains_suspend +ffffffff81b82420 t icl_display_core_uninit +ffffffff81b82580 t bxt_display_core_uninit +ffffffff81b82680 T intel_power_domains_resume +ffffffff81b82780 T intel_display_power_suspend_late +ffffffff81b82880 t hsw_enable_pc8 +ffffffff81b837b0 T intel_display_power_resume_early +ffffffff81b838c0 t hsw_disable_pc8 +ffffffff81b83dd0 T intel_display_power_suspend +ffffffff81b83e60 T intel_display_power_resume +ffffffff81b83f80 T intel_display_power_debug +ffffffff81b84080 T intel_display_power_ddi_io_domain +ffffffff81b84180 T intel_display_power_ddi_lanes_domain +ffffffff81b84280 T intel_display_power_aux_io_domain +ffffffff81b84390 T intel_display_power_legacy_aux_domain +ffffffff81b844a0 T intel_display_power_tbt_aux_domain +ffffffff81b845b0 t __delayed_work_tick +ffffffff81b85000 T intel_display_power_map_init +ffffffff81b85180 t __set_power_wells +ffffffff81b85580 T intel_display_power_map_cleanup +ffffffff81b86000 T lookup_power_well +ffffffff81b860c0 T intel_power_well_enable +ffffffff81b86160 T intel_power_well_name +ffffffff81b861a0 T intel_power_well_disable +ffffffff81b86210 T intel_power_well_sync_hw +ffffffff81b86290 T intel_power_well_get +ffffffff81b86340 T intel_power_well_put +ffffffff81b86440 T intel_power_well_is_enabled +ffffffff81b86460 T intel_power_well_is_enabled_cached +ffffffff81b86490 T intel_display_power_well_is_enabled +ffffffff81b86550 T intel_power_well_is_always_on +ffffffff81b86590 T intel_power_well_domains +ffffffff81b865c0 T intel_power_well_refcount +ffffffff81b865f0 T gen9_sanitize_dc_state +ffffffff81b866d0 T gen9_set_dc_state +ffffffff81b86aa0 T gen9_enable_dc5 +ffffffff81b86d60 T skl_enable_dc6 +ffffffff81b86ef0 T bxt_enable_dc9 +ffffffff81b870f0 T bxt_disable_dc9 +ffffffff81b87210 T gen9_disable_dc_states +ffffffff81b87650 T chv_phy_powergate_ch +ffffffff81b87780 t assert_chv_phy_status +ffffffff81b87b70 T chv_phy_powergate_lanes +ffffffff81b87e30 t i9xx_power_well_sync_hw_noop +ffffffff81b87e60 t i9xx_always_on_power_well_noop +ffffffff81b87e90 t i9xx_always_on_power_well_enabled +ffffffff81b87ec0 t chv_pipe_power_well_sync_hw +ffffffff81b87ef0 t chv_pipe_power_well_enable +ffffffff81b87f30 t chv_pipe_power_well_disable +ffffffff81b87fc0 t chv_pipe_power_well_enabled +ffffffff81b880e0 t chv_dpio_cmn_power_well_enable +ffffffff81b88360 t chv_dpio_cmn_power_well_disable +ffffffff81b884c0 t vlv_power_well_enabled +ffffffff81b88600 t i830_pipes_power_well_sync_hw +ffffffff81b88710 t i830_pipes_power_well_enable +ffffffff81b887e0 t i830_pipes_power_well_disable +ffffffff81b88820 t i830_pipes_power_well_enabled +ffffffff81b888d0 t hsw_power_well_sync_hw +ffffffff81b889e0 t hsw_power_well_enable +ffffffff81b88ca0 t hsw_power_well_disable +ffffffff81b88d70 t hsw_power_well_enabled +ffffffff81b88e70 t gen9_dc_off_power_well_enable +ffffffff81b88e80 t gen9_dc_off_power_well_disable +ffffffff81b88f30 t gen9_dc_off_power_well_enabled +ffffffff81b88fd0 t bxt_dpio_cmn_power_well_enable +ffffffff81b89000 t bxt_dpio_cmn_power_well_disable +ffffffff81b89030 t bxt_dpio_cmn_power_well_enabled +ffffffff81b89060 t vlv_display_power_well_enable +ffffffff81b890a0 t vlv_display_power_well_disable +ffffffff81b89140 t vlv_dpio_cmn_power_well_enable +ffffffff81b891e0 t vlv_dpio_cmn_power_well_disable +ffffffff81b89310 t vlv_power_well_enable +ffffffff81b89330 t vlv_power_well_disable +ffffffff81b89350 t icl_aux_power_well_enable +ffffffff81b89b20 t icl_aux_power_well_disable +ffffffff81b89df0 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81b89e10 t tgl_tc_cold_off_power_well_enable +ffffffff81b89e30 t tgl_tc_cold_off_power_well_disable +ffffffff81b89e50 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81b89e80 t xelpdp_aux_power_well_enable +ffffffff81b89f60 t xelpdp_aux_power_well_disable +ffffffff81b8a040 t xelpdp_aux_power_well_enabled +ffffffff81b8a100 t chv_set_pipe_power_well +ffffffff81b8a360 t vlv_display_power_well_init +ffffffff81b8a780 t vlv_set_power_well +ffffffff81b8aa00 t hsw_wait_for_power_well_enable +ffffffff81b8ab60 t hsw_wait_for_power_well_disable +ffffffff81b8ae80 t tgl_tc_cold_request +ffffffff81b8c000 T intel_display_reset_prepare +ffffffff81b8c240 T intel_display_reset_finish +ffffffff81b8d000 T intel_display_rps_boost_after_vblank +ffffffff81b8d140 t do_rps_boost +ffffffff81b8d200 T intel_display_rps_mark_interactive +ffffffff81b8e000 T intel_dkl_phy_init +ffffffff81b8e020 T intel_dkl_phy_read +ffffffff81b8e170 T intel_dkl_phy_write +ffffffff81b8e2a0 T intel_dkl_phy_rmw +ffffffff81b8e400 T intel_dkl_phy_posting_read +ffffffff81b8f000 T intel_dmc_has_payload +ffffffff81b8f050 T intel_dmc_enable_pipe +ffffffff81b8f180 T intel_dmc_disable_pipe +ffffffff81b8f2b0 T intel_dmc_load_program +ffffffff81b8fbb0 t pipedmc_clock_gating_wa +ffffffff81b8fe00 T intel_dmc_disable_program +ffffffff81b90060 T assert_dmc_loaded +ffffffff81b90220 T intel_dmc_init +ffffffff81b90510 t dmc_load_work_fn +ffffffff81b90ef0 T intel_dmc_suspend +ffffffff81b90f80 T intel_dmc_resume +ffffffff81b91030 T intel_dmc_fini +ffffffff81b911c0 T intel_dmc_print_error_state +ffffffff81b912d0 T intel_dmc_debugfs_register +ffffffff81b92000 T intel_dp_is_edp +ffffffff81b92030 T intel_dp_is_uhbr +ffffffff81b92070 T intel_dp_max_lane_count +ffffffff81b920e0 T intel_dp_link_required +ffffffff81b92120 T intel_dp_max_data_rate +ffffffff81b92180 T intel_dp_can_bigjoiner +ffffffff81b921f0 T intel_dp_get_link_train_fallback_values +ffffffff81b925f0 T intel_dp_mode_to_fec_clock +ffffffff81b92640 T intel_dp_dsc_nearest_valid_bpp +ffffffff81b92750 T intel_dp_dsc_get_output_bpp +ffffffff81b92880 T intel_dp_dsc_get_slice_count +ffffffff81b92a30 T intel_dp_min_bpp +ffffffff81b92a70 T intel_dp_need_bigjoiner +ffffffff81b92ae0 T intel_dp_source_supports_tps3 +ffffffff81b92b30 T intel_dp_source_supports_tps4 +ffffffff81b92b70 T intel_dp_max_link_rate +ffffffff81b92c30 T intel_dp_rate_select +ffffffff81b92cd0 T intel_dp_compute_rate +ffffffff81b92db0 T intel_dp_has_hdmi_sink +ffffffff81b92df0 T intel_dp_adjust_compliance_config +ffffffff81b92f40 T intel_dp_dsc_compute_bpp +ffffffff81b93000 T intel_dp_dsc_compute_config +ffffffff81b93760 T intel_dp_limited_color_range +ffffffff81b937d0 T intel_dp_compute_psr_vsc_sdp +ffffffff81b93850 T intel_dp_needs_vsc_sdp +ffffffff81b938a0 t intel_dp_compute_vsc_colorimetry +ffffffff81b93a20 T intel_dp_compute_config +ffffffff81b93ef0 t intel_dp_compute_output_format +ffffffff81b94150 t intel_dp_audio_compute_config +ffffffff81b94240 t intel_dp_drrs_compute_config +ffffffff81b94430 t intel_dp_compute_vsc_sdp +ffffffff81b944e0 t intel_dp_compute_hdr_metadata_infoframe_sdp +ffffffff81b94590 T intel_dp_set_link_params +ffffffff81b945d0 T intel_edp_backlight_on +ffffffff81b94680 T intel_edp_backlight_off +ffffffff81b94730 T intel_dp_sink_set_decompression_state +ffffffff81b947e0 T intel_dp_wait_source_oui +ffffffff81b948e0 T intel_dp_set_power +ffffffff81b94b60 T intel_dp_sync_state +ffffffff81b94bf0 t intel_dp_get_dpcd +ffffffff81b94d90 t intel_dp_reset_max_link_params +ffffffff81b94eb0 T intel_dp_initial_fastset_check +ffffffff81b95000 T intel_dp_check_frl_training +ffffffff81b95690 T intel_dp_pcon_dsc_configure +ffffffff81b958c0 T intel_dp_configure_protocol_converter +ffffffff81b95ab0 T intel_dp_get_colorimetry_status +ffffffff81b95b20 T intel_edp_fixup_vbt_bpp +ffffffff81b95bb0 T intel_write_dp_vsc_sdp +ffffffff81b95d60 T intel_dp_set_infoframes +ffffffff81b95ea0 t intel_write_dp_sdp +ffffffff81b961a0 T intel_read_dp_sdp +ffffffff81b964f0 T intel_dp_get_active_pipes +ffffffff81b96750 T intel_dp_retrain_link +ffffffff81b96ac0 t intel_dp_needs_link_retrain +ffffffff81b96c70 T intel_dp_phy_test +ffffffff81b97440 T intel_digital_port_connected +ffffffff81b97510 T intel_dp_encoder_flush_work +ffffffff81b97590 T intel_dp_encoder_suspend +ffffffff81b975d0 T intel_dp_encoder_shutdown +ffffffff81b97610 T intel_dp_hpd_pulse +ffffffff81b97da0 T intel_dp_is_port_edp +ffffffff81b97e30 T intel_dp_init_connector +ffffffff81b99260 t intel_dp_modeset_retry_work_fn +ffffffff81b99320 t intel_dp_set_common_rates +ffffffff81b994c0 T intel_dp_mst_suspend +ffffffff81b99570 T intel_dp_mst_resume +ffffffff81b99640 t intel_dp_output_format +ffffffff81b99780 t intel_dp_compute_link_config +ffffffff81b99fe0 t intel_dp_tmds_clock_valid +ffffffff81b9a080 t intel_dp_set_sink_rates +ffffffff81b9a2e0 t intel_dp_check_device_service_irq +ffffffff81b9a990 t intel_dp_force +ffffffff81b9aaf0 t intel_dp_connector_register +ffffffff81b9abf0 t intel_dp_connector_unregister +ffffffff81b9ac50 t intel_dp_oob_hotplug_event +ffffffff81b9ace0 t intel_dp_set_edid +ffffffff81b9b190 t intel_dp_get_modes +ffffffff81b9b2a0 t intel_dp_detect +ffffffff81b9bc70 t intel_dp_mode_valid +ffffffff81b9c070 t intel_dp_connector_atomic_check +ffffffff81b9c480 t intel_dp_get_dsc_sink_cap +ffffffff81b9c610 t intel_dp_mode_min_output_bpp +ffffffff81b9c680 t intel_dp_mode_valid_downstream +ffffffff81b9c870 t icl_max_source_rate +ffffffff81b9d000 T intel_dp_aux_pack +ffffffff81b9d070 T intel_dp_aux_fini +ffffffff81b9d090 T intel_dp_aux_init +ffffffff81b9d2b0 t xelpdp_aux_ctl_reg +ffffffff81b9d390 t xelpdp_aux_data_reg +ffffffff81b9d470 t tgl_aux_ctl_reg +ffffffff81b9d500 t tgl_aux_data_reg +ffffffff81b9d5a0 t skl_aux_ctl_reg +ffffffff81b9d630 t skl_aux_data_reg +ffffffff81b9d6d0 t ilk_aux_ctl_reg +ffffffff81b9d750 t ilk_aux_data_reg +ffffffff81b9d7e0 t g4x_aux_ctl_reg +ffffffff81b9d870 t g4x_aux_data_reg +ffffffff81b9d910 t skl_get_aux_clock_divider +ffffffff81b9d940 t hsw_get_aux_clock_divider +ffffffff81b9d9d0 t ilk_get_aux_clock_divider +ffffffff81b9da30 t g4x_get_aux_clock_divider +ffffffff81b9da80 t skl_get_aux_send_ctl +ffffffff81b9db00 t g4x_get_aux_send_ctl +ffffffff81b9db60 t kasprintf +ffffffff81b9dc40 t intel_dp_aux_transfer +ffffffff81b9df00 T intel_dp_aux_ch +ffffffff81b9e080 T intel_dp_aux_irq_handler +ffffffff81b9e120 t intel_dp_aux_xfer +ffffffff81b9f000 T intel_dp_aux_init_backlight_funcs +ffffffff81b9f290 t intel_dp_aux_hdr_setup_backlight +ffffffff81b9f430 t intel_dp_aux_hdr_get_backlight +ffffffff81b9f5e0 t intel_dp_aux_hdr_set_backlight +ffffffff81b9f6f0 t intel_dp_aux_hdr_disable_backlight +ffffffff81b9f780 t intel_dp_aux_hdr_enable_backlight +ffffffff81b9fa10 t intel_dp_aux_vesa_setup_backlight +ffffffff81b9fca0 t intel_dp_aux_vesa_get_backlight +ffffffff81b9fcd0 t intel_dp_aux_vesa_set_backlight +ffffffff81b9fd70 t intel_dp_aux_vesa_disable_backlight +ffffffff81b9fe30 t intel_dp_aux_vesa_enable_backlight +ffffffff81ba0000 T intel_dp_hdcp_init +ffffffff81ba00c0 t intel_dp_hdcp_write_an_aksv +ffffffff81ba01d0 t intel_dp_hdcp_read_bksv +ffffffff81ba0270 t intel_dp_hdcp_read_bstatus +ffffffff81ba0310 t intel_dp_hdcp_repeater_present +ffffffff81ba03d0 t intel_dp_hdcp_read_ri_prime +ffffffff81ba0470 t intel_dp_hdcp_read_ksv_ready +ffffffff81ba0520 t intel_dp_hdcp_read_ksv_fifo +ffffffff81ba0620 t intel_dp_hdcp_read_v_prime_part +ffffffff81ba06d0 t intel_dp_hdcp_toggle_signalling +ffffffff81ba0700 t intel_dp_mst_hdcp_stream_encryption +ffffffff81ba0910 t intel_dp_hdcp_check_link +ffffffff81ba09a0 t intel_dp_hdcp_capable +ffffffff81ba0a60 t intel_dp_hdcp2_capable +ffffffff81ba0af0 t intel_dp_hdcp2_write_msg +ffffffff81ba0cb0 t intel_dp_hdcp2_read_msg +ffffffff81ba1400 t intel_dp_hdcp2_config_stream_type +ffffffff81ba1460 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81ba1700 t intel_dp_mst_hdcp2_check_link +ffffffff81ba17d0 t intel_dp_hdcp2_check_link +ffffffff81ba2000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81ba2100 t intel_dp_init_lttpr +ffffffff81ba2450 T intel_dp_get_adjust_train +ffffffff81ba2cc0 T intel_dp_program_link_training_pattern +ffffffff81ba2df0 T intel_dp_set_signal_levels +ffffffff81ba31c0 T intel_dp_dump_link_status +ffffffff81ba32c0 T intel_dp_stop_link_train +ffffffff81ba35e0 T intel_dp_start_link_train +ffffffff81ba58c0 T intel_dp_128b132b_sdp_crc16 +ffffffff81ba59b0 t intel_dp_link_train_phy +ffffffff81ba8000 T intel_dp_mst_encoder_active_links +ffffffff81ba8030 T intel_dp_mst_encoder_init +ffffffff81ba82a0 T intel_dp_mst_source_support +ffffffff81ba82e0 T intel_dp_mst_encoder_cleanup +ffffffff81ba8340 T intel_dp_mst_is_master_trans +ffffffff81ba8380 T intel_dp_mst_is_slave_trans +ffffffff81ba83c0 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81ba8490 t intel_dp_add_mst_connector +ffffffff81ba8750 t intel_dp_mst_poll_hpd_irq +ffffffff81ba8770 t intel_dp_mst_get_hw_state +ffffffff81ba87e0 t intel_dp_mst_connector_late_register +ffffffff81ba8870 t intel_dp_mst_connector_early_unregister +ffffffff81ba88b0 t intel_dp_mst_get_modes +ffffffff81ba8960 t intel_dp_mst_detect +ffffffff81ba8a70 t intel_dp_mst_mode_valid_ctx +ffffffff81ba8d10 t intel_mst_atomic_best_encoder +ffffffff81ba8d70 t intel_dp_mst_atomic_check +ffffffff81ba8f60 t intel_dp_mst_compute_config +ffffffff81ba9590 t intel_dp_mst_compute_config_late +ffffffff81ba96a0 t intel_mst_disable_dp +ffffffff81ba97c0 t intel_mst_post_disable_dp +ffffffff81ba9af0 t intel_mst_post_pll_disable_dp +ffffffff81ba9b50 t intel_mst_pre_pll_enable_dp +ffffffff81ba9b90 t intel_mst_pre_enable_dp +ffffffff81ba9e00 t intel_mst_enable_dp +ffffffff81baa250 t intel_dp_mst_enc_get_hw_state +ffffffff81baa290 t intel_dp_mst_enc_get_config +ffffffff81baa2b0 t intel_dp_mst_initial_fastset_check +ffffffff81baa2d0 t intel_dp_mst_encoder_destroy +ffffffff81baa310 t intel_dp_mst_find_vcpi_slots_for_bpp +ffffffff81bab000 T bxt_port_to_phy_channel +ffffffff81bab120 T bxt_ddi_phy_set_signal_levels +ffffffff81bab570 T bxt_ddi_phy_is_enabled +ffffffff81bab6c0 T bxt_ddi_phy_uninit +ffffffff81bab7c0 T bxt_ddi_phy_init +ffffffff81baba20 t _bxt_ddi_phy_init +ffffffff81bac020 T bxt_ddi_phy_verify_state +ffffffff81bac370 t __phy_reg_verify_state +ffffffff81bac490 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81bac500 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81bac7b0 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81bac9c0 T vlv_dig_port_to_channel +ffffffff81baca30 T vlv_dig_port_to_phy +ffffffff81bacaa0 T vlv_pipe_to_channel +ffffffff81bacb00 T chv_set_phy_signal_level +ffffffff81bacef0 T chv_data_lane_soft_reset +ffffffff81bad0f0 T chv_phy_pre_pll_enable +ffffffff81bad400 T chv_phy_pre_encoder_enable +ffffffff81bad6c0 T chv_phy_release_cl2_override +ffffffff81bad750 T chv_phy_post_pll_disable +ffffffff81bad830 T vlv_set_phy_signal_level +ffffffff81bad9e0 T vlv_phy_pre_pll_enable +ffffffff81badb20 T vlv_phy_pre_encoder_enable +ffffffff81badc50 T vlv_phy_reset_lanes +ffffffff81bae000 T pnv_calc_dpll_params +ffffffff81bae0c0 T i9xx_calc_dpll_params +ffffffff81bae190 T vlv_calc_dpll_params +ffffffff81bae250 T chv_calc_dpll_params +ffffffff81bae330 T bxt_find_best_dpll +ffffffff81bae350 t chv_find_best_dpll +ffffffff81bae6a0 T i9xx_dpll_compute_fp +ffffffff81bae6e0 T vlv_compute_dpll +ffffffff81bae760 T chv_compute_dpll +ffffffff81bae7e0 T intel_dpll_crtc_compute_clock +ffffffff81bae8f0 T intel_dpll_crtc_get_shared_dpll +ffffffff81baea70 T intel_dpll_init_clock_hook +ffffffff81baeb80 T i9xx_enable_pll +ffffffff81baf010 T vlv_enable_pll +ffffffff81baf640 T chv_enable_pll +ffffffff81bafd40 T vlv_force_pll_on +ffffffff81bafec0 T vlv_disable_pll +ffffffff81baffb0 T chv_disable_pll +ffffffff81bb0130 T i9xx_disable_pll +ffffffff81bb0260 T vlv_force_pll_off +ffffffff81bb0380 T assert_pll_enabled +ffffffff81bb0490 T assert_pll_disabled +ffffffff81bb05a0 t intel_pll_is_valid +ffffffff81bb0660 t mtl_crtc_compute_clock +ffffffff81bb0760 t dg2_crtc_compute_clock +ffffffff81bb0800 t hsw_crtc_compute_clock +ffffffff81bb08e0 t hsw_crtc_get_shared_dpll +ffffffff81bb0990 t ilk_crtc_compute_clock +ffffffff81bb0ce0 t ilk_crtc_get_shared_dpll +ffffffff81bb0d30 t g4x_find_best_dpll +ffffffff81bb1090 t chv_crtc_compute_clock +ffffffff81bb11b0 t vlv_crtc_compute_clock +ffffffff81bb1660 t g4x_crtc_compute_clock +ffffffff81bb17f0 t i9xx_compute_dpll +ffffffff81bb1a90 t pnv_crtc_compute_clock +ffffffff81bb1ea0 t i9xx_crtc_compute_clock +ffffffff81bb1fe0 t i9xx_find_best_dpll +ffffffff81bb2320 t i8xx_crtc_compute_clock +ffffffff81bb3000 T intel_get_shared_dpll_by_id +ffffffff81bb3040 T assert_shared_dpll +ffffffff81bb3200 T intel_dpll_get_hw_state +ffffffff81bb3230 T icl_tc_port_to_pll_id +ffffffff81bb3260 T intel_enable_shared_dpll +ffffffff81bb3610 T intel_disable_shared_dpll +ffffffff81bb38f0 T intel_unreference_shared_dpll_crtc +ffffffff81bb3a00 T intel_shared_dpll_swap_state +ffffffff81bb3b00 T icl_set_active_port_dpll +ffffffff81bb3b40 T intel_shared_dpll_init +ffffffff81bb3d60 T intel_compute_shared_dplls +ffffffff81bb3df0 T intel_reserve_shared_dplls +ffffffff81bb3e80 T intel_release_shared_dplls +ffffffff81bb3ec0 T intel_update_active_dpll +ffffffff81bb3f20 T intel_dpll_get_freq +ffffffff81bb3fb0 T intel_dpll_update_ref_clks +ffffffff81bb4000 T intel_dpll_readout_hw_state +ffffffff81bb4260 T intel_dpll_sanitize_state +ffffffff81bb4360 T intel_dpll_dump_hw_state +ffffffff81bb43f0 T intel_shared_dpll_state_verify +ffffffff81bb45e0 t verify_single_dpll_state +ffffffff81bb4c10 T intel_shared_dpll_verify_disabled +ffffffff81bb4ca0 t icl_compute_dplls +ffffffff81bb5940 t icl_get_dplls +ffffffff81bb5ca0 t icl_put_dplls +ffffffff81bb5d60 t icl_update_active_dpll +ffffffff81bb5e20 t icl_update_dpll_ref_clks +ffffffff81bb5e60 t icl_dump_hw_state +ffffffff81bb5f30 t combo_pll_enable +ffffffff81bb6190 t combo_pll_disable +ffffffff81bb6270 t combo_pll_get_hw_state +ffffffff81bb62f0 t icl_ddi_combo_pll_get_freq +ffffffff81bb64d0 t icl_dpll_write +ffffffff81bb6740 t adlp_cmtg_clock_gating_wa +ffffffff81bb68e0 t icl_pll_disable +ffffffff81bb6ab0 t icl_pll_get_hw_state +ffffffff81bb6e00 t tbt_pll_enable +ffffffff81bb7000 t tbt_pll_disable +ffffffff81bb7020 t tbt_pll_get_hw_state +ffffffff81bb7040 t icl_ddi_tbt_pll_get_freq +ffffffff81bb70b0 t mg_pll_enable +ffffffff81bb7820 t mg_pll_disable +ffffffff81bb7860 t dkl_pll_get_hw_state +ffffffff81bb7ad0 t icl_ddi_mg_pll_get_freq +ffffffff81bb7bb0 t icl_calc_dpll_state +ffffffff81bb7cf0 t intel_find_shared_dpll +ffffffff81bb8060 t intel_reference_shared_dpll +ffffffff81bb82b0 t intel_unreference_shared_dpll +ffffffff81bb84f0 t mg_pll_get_hw_state +ffffffff81bb87b0 t bxt_compute_dpll +ffffffff81bb8ae0 t bxt_get_dpll +ffffffff81bb8bc0 t intel_put_dpll +ffffffff81bb8c20 t bxt_update_dpll_ref_clks +ffffffff81bb8c60 t bxt_dump_hw_state +ffffffff81bb8d20 t bxt_ddi_pll_enable +ffffffff81bb9880 t bxt_ddi_pll_disable +ffffffff81bb9ae0 t bxt_ddi_pll_get_hw_state +ffffffff81bb9fb0 t bxt_ddi_pll_get_freq +ffffffff81bba050 t bxt_ddi_set_dpll_hw_state +ffffffff81bba250 t skl_compute_dpll +ffffffff81bba9b0 t skl_get_dpll +ffffffff81bbaa70 t skl_update_dpll_ref_clks +ffffffff81bbaab0 t skl_dump_hw_state +ffffffff81bbab20 t skl_ddi_dpll0_enable +ffffffff81bbabf0 t skl_ddi_dpll0_disable +ffffffff81bbac20 t skl_ddi_dpll0_get_hw_state +ffffffff81bbad50 t skl_ddi_pll_get_freq +ffffffff81bbade0 t skl_ddi_wrpll_get_freq +ffffffff81bbaf40 t skl_ddi_pll_enable +ffffffff81bbb1c0 t skl_ddi_pll_disable +ffffffff81bbb260 t skl_ddi_pll_get_hw_state +ffffffff81bbb3b0 t hsw_compute_dpll +ffffffff81bbbbe0 t hsw_get_dpll +ffffffff81bbbd40 t hsw_update_dpll_ref_clks +ffffffff81bbbdc0 t hsw_dump_hw_state +ffffffff81bbbdf0 t hsw_ddi_wrpll_enable +ffffffff81bbbe80 t hsw_ddi_wrpll_disable +ffffffff81bbbf80 t hsw_ddi_wrpll_get_hw_state +ffffffff81bbc040 t hsw_ddi_wrpll_get_freq +ffffffff81bbc130 t hsw_ddi_spll_enable +ffffffff81bbc1b0 t hsw_ddi_spll_disable +ffffffff81bbc290 t hsw_ddi_spll_get_hw_state +ffffffff81bbc330 t hsw_ddi_spll_get_freq +ffffffff81bbc3d0 t hsw_ddi_lcpll_enable +ffffffff81bbc400 t hsw_ddi_lcpll_disable +ffffffff81bbc430 t hsw_ddi_lcpll_get_hw_state +ffffffff81bbc460 t hsw_ddi_lcpll_get_freq +ffffffff81bbc4e0 t ibx_compute_dpll +ffffffff81bbc510 t ibx_get_dpll +ffffffff81bbc630 t ibx_dump_hw_state +ffffffff81bbc6a0 t ibx_pch_dpll_enable +ffffffff81bbc8a0 t ibx_pch_dpll_disable +ffffffff81bbc930 t ibx_pch_dpll_get_hw_state +ffffffff81bbd000 T intel_dpt_pin +ffffffff81bbd220 T intel_dpt_unpin +ffffffff81bbd2a0 T intel_dpt_resume +ffffffff81bbd390 T intel_dpt_suspend +ffffffff81bbd480 T intel_dpt_create +ffffffff81bbd920 t dpt_insert_page +ffffffff81bbd990 t dpt_clear_range +ffffffff81bbd9c0 t dpt_insert_entries +ffffffff81bbdab0 t dpt_cleanup +ffffffff81bbdb00 t dpt_bind_vma +ffffffff81bbdba0 t dpt_unbind_vma +ffffffff81bbdbd0 T intel_dpt_destroy +ffffffff81bbdc20 T intel_dpt_configure +ffffffff81bbddf0 t __ww_mutex_lock +ffffffff81bbe000 T intel_drrs_type_str +ffffffff81bbe040 T intel_drrs_is_active +ffffffff81bbe070 T intel_drrs_activate +ffffffff81bbe270 T intel_drrs_deactivate +ffffffff81bbe470 T intel_drrs_invalidate +ffffffff81bbe490 t intel_drrs_frontbuffer_update +ffffffff81bbe720 T intel_drrs_flush +ffffffff81bbe740 T intel_drrs_crtc_init +ffffffff81bbe800 t intel_drrs_downclock_work +ffffffff81bbe950 T intel_drrs_crtc_debugfs_add +ffffffff81bbe980 T intel_drrs_connector_debugfs_add +ffffffff81bbe990 t __delayed_work_tick +ffffffff81bbf000 T intel_dsb_reg_write +ffffffff81bbf140 T intel_dsb_finish +ffffffff81bbf1c0 T intel_dsb_commit +ffffffff81bbf390 T intel_dsb_wait +ffffffff81bbf5b0 T intel_dsb_prepare +ffffffff81bbf780 T intel_dsb_cleanup +ffffffff81bc0000 T intel_dsi_wait_panel_power_cycle +ffffffff81bc00f0 T intel_dsi_shutdown +ffffffff81bc01e0 T intel_dsi_bitrate +ffffffff81bc0270 T intel_dsi_tlpx_ns +ffffffff81bc02c0 T intel_dsi_get_modes +ffffffff81bc02d0 T intel_dsi_mode_valid +ffffffff81bc03a0 T intel_dsi_host_init +ffffffff81bc0460 T intel_dsi_get_panel_orientation +ffffffff81bc1000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81bc10a0 t dcs_setup_backlight +ffffffff81bc1130 t dcs_get_backlight +ffffffff81bc1230 t dcs_set_backlight +ffffffff81bc1330 t dcs_disable_backlight +ffffffff81bc1700 t dcs_enable_backlight +ffffffff81bc2000 T intel_dsi_vbt_exec_sequence +ffffffff81bc2020 T intel_dsi_log_params +ffffffff81bc2460 T intel_dsi_vbt_init +ffffffff81bc2970 T intel_dsi_vbt_gpio_init +ffffffff81bc2990 T intel_dsi_vbt_gpio_cleanup +ffffffff81bc3000 T intel_dvo_init +ffffffff81bc3730 t intel_disable_dvo +ffffffff81bc37f0 t intel_enable_dvo +ffffffff81bc38f0 t intel_dvo_get_hw_state +ffffffff81bc3970 t intel_dvo_get_config +ffffffff81bc3a20 t intel_dvo_compute_config +ffffffff81bc3ac0 t intel_dvo_pre_enable +ffffffff81bc3bd0 t intel_dvo_connector_get_hw_state +ffffffff81bc3c60 t intel_dvo_enc_destroy +ffffffff81bc3ca0 t intel_dvo_detect +ffffffff81bc3dc0 t intel_dvo_get_modes +ffffffff81bc3e40 t intel_dvo_mode_valid +ffffffff81bc4000 T intel_fb_get_format_info +ffffffff81bc42b0 T intel_fb_is_tiled_modifier +ffffffff81bc4300 t lookup_modifier +ffffffff81bc4540 T intel_fb_is_ccs_modifier +ffffffff81bc4590 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81bc45e0 T intel_fb_is_mc_ccs_modifier +ffffffff81bc4630 T intel_fb_plane_get_modifiers +ffffffff81bc4830 T intel_fb_plane_supports_modifier +ffffffff81bc48b0 T intel_format_info_is_yuv_semiplanar +ffffffff81bc4930 T intel_fb_is_ccs_aux_plane +ffffffff81bc49f0 T intel_fb_rc_ccs_cc_plane +ffffffff81bc4ae0 T is_surface_linear +ffffffff81bc4c70 T main_to_ccs_plane +ffffffff81bc4d20 T skl_ccs_to_main_plane +ffffffff81bc4e80 T skl_main_to_aux_plane +ffffffff81bc4fc0 T intel_tile_size +ffffffff81bc5000 T intel_tile_width_bytes +ffffffff81bc5470 T intel_tile_height +ffffffff81bc54e0 T intel_tile_row_size +ffffffff81bc5570 T intel_fb_align_height +ffffffff81bc55f0 T intel_fb_modifier_uses_dpt +ffffffff81bc5630 T intel_fb_uses_dpt +ffffffff81bc5690 T intel_cursor_alignment +ffffffff81bc56f0 T intel_surf_alignment +ffffffff81bc59c0 T intel_fb_plane_get_subsampling +ffffffff81bc5b40 T intel_plane_adjust_aligned_offset +ffffffff81bc5bc0 t intel_adjust_aligned_offset +ffffffff81bc5d90 T intel_plane_compute_aligned_offset +ffffffff81bc5ea0 t intel_compute_aligned_offset +ffffffff81bc6090 T intel_fb_needs_pot_stride_remap +ffffffff81bc6100 T intel_fb_supports_90_270_rotation +ffffffff81bc6160 T intel_fill_fb_info +ffffffff81bc6d90 t calc_plane_remap_info +ffffffff81bc77b0 T intel_fb_fill_view +ffffffff81bc7820 T intel_plane_compute_gtt +ffffffff81bc7d60 t intel_plane_check_stride +ffffffff81bc7ee0 T intel_framebuffer_init +ffffffff81bc8880 t gen12_ccs_aux_stride +ffffffff81bc8900 T intel_user_framebuffer_create +ffffffff81bc8aa0 T intel_framebuffer_create +ffffffff81bc8b50 t intel_adjust_tile_offset +ffffffff81bc8c90 t intel_user_framebuffer_destroy +ffffffff81bc8d10 t intel_user_framebuffer_create_handle +ffffffff81bc8d40 t intel_user_framebuffer_dirty +ffffffff81bc9000 T intel_pin_and_fence_fb_obj +ffffffff81bc93c0 t i915_gem_object_lock +ffffffff81bc9610 T intel_unpin_fb_vma +ffffffff81bc9680 T intel_plane_pin_fb +ffffffff81bc9ab0 T intel_plane_unpin_fb +ffffffff81bca000 T intel_fbc_cleanup +ffffffff81bca240 T intel_fbc_pre_update +ffffffff81bca900 T intel_fbc_post_update +ffffffff81bcaac0 T intel_fbc_invalidate +ffffffff81bcac70 T intel_fbc_flush +ffffffff81bcaf60 T intel_fbc_atomic_check +ffffffff81bcb550 T intel_fbc_disable +ffffffff81bcb620 t __intel_fbc_disable +ffffffff81bcb780 T intel_fbc_update +ffffffff81bcbf00 T intel_fbc_reset_underrun +ffffffff81bcc090 T intel_fbc_handle_fifo_underrun_irq +ffffffff81bcc150 T intel_fbc_add_plane +ffffffff81bcc180 T intel_fbc_init +ffffffff81bcc440 T intel_fbc_sanitize +ffffffff81bcc520 T intel_fbc_crtc_debugfs_add +ffffffff81bcc550 T intel_fbc_debugfs_register +ffffffff81bcc580 t intel_fbc_is_ok +ffffffff81bcc700 t intel_fbc_update_state +ffffffff81bccaa0 t intel_fbc_underrun_work_fn +ffffffff81bccb90 t ivb_fbc_activate +ffffffff81bcce00 t ilk_fbc_deactivate +ffffffff81bccec0 t ilk_fbc_is_active +ffffffff81bccf30 t ivb_fbc_is_compressing +ffffffff81bccfa0 t snb_fbc_nuke +ffffffff81bcd020 t ilk_fbc_program_cfb +ffffffff81bcd080 t ivb_fbc_set_false_color +ffffffff81bcd100 t snb_fbc_activate +ffffffff81bcd1a0 t ilk_fbc_is_compressing +ffffffff81bcd210 t ilk_fbc_activate +ffffffff81bcd350 t i965_fbc_nuke +ffffffff81bcd3f0 t g4x_fbc_activate +ffffffff81bcd510 t g4x_fbc_deactivate +ffffffff81bcd5b0 t g4x_fbc_is_active +ffffffff81bcd610 t g4x_fbc_is_compressing +ffffffff81bcd670 t g4x_fbc_program_cfb +ffffffff81bcd6c0 t i8xx_fbc_activate +ffffffff81bcd850 t i8xx_fbc_deactivate +ffffffff81bcd950 t i8xx_fbc_is_active +ffffffff81bcd9b0 t i8xx_fbc_is_compressing +ffffffff81bcda10 t i8xx_fbc_program_cfb +ffffffff81bcdab0 t i8xx_fbc_nuke +ffffffff81bce000 T intel_fbdev_init +ffffffff81bce590 t intel_fbdev_suspend_worker +ffffffff81bce5c0 T intel_fbdev_initial_config_async +ffffffff81bce630 T intel_fbdev_unregister +ffffffff81bce670 T intel_fbdev_set_suspend +ffffffff81bce6a0 T intel_fbdev_fini +ffffffff81bce750 T intel_fbdev_output_poll_changed +ffffffff81bce800 T intel_fbdev_restore_mode +ffffffff81bce890 T intel_fbdev_framebuffer +ffffffff81bce8d0 t intelfb_create +ffffffff81bcf320 t intelfb_dirty +ffffffff81bcf390 t intel_fbdev_set_par +ffffffff81bd0000 T assert_fdi_tx_enabled +ffffffff81bd0020 t assert_fdi_tx +ffffffff81bd0170 T assert_fdi_tx_disabled +ffffffff81bd0190 T assert_fdi_rx_enabled +ffffffff81bd0280 T assert_fdi_rx_disabled +ffffffff81bd0370 T assert_fdi_tx_pll_enabled +ffffffff81bd0470 T assert_fdi_rx_pll_enabled +ffffffff81bd0570 T assert_fdi_rx_pll_disabled +ffffffff81bd0670 T intel_fdi_link_train +ffffffff81bd0690 T intel_fdi_pll_freq_update +ffffffff81bd0740 T intel_fdi_link_freq +ffffffff81bd0790 T ilk_fdi_compute_config +ffffffff81bd0b20 T intel_fdi_normal_train +ffffffff81bd0ce0 T hsw_fdi_link_train +ffffffff81bd1300 T hsw_fdi_disable +ffffffff81bd14d0 T ilk_fdi_pll_enable +ffffffff81bd1730 T ilk_fdi_pll_disable +ffffffff81bd18b0 T ilk_fdi_disable +ffffffff81bd1b80 T intel_fdi_init_hook +ffffffff81bd1be0 t ilk_fdi_link_train +ffffffff81bd23f0 t gen6_fdi_link_train +ffffffff81bd2e60 t ivb_manual_fdi_link_train +ffffffff81bd3920 t cpt_set_fdi_bc_bifurcation +ffffffff81bd4000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81bd4480 T intel_set_pch_fifo_underrun_reporting +ffffffff81bd4720 T intel_cpu_fifo_underrun_irq_handler +ffffffff81bd4940 T intel_pch_fifo_underrun_irq_handler +ffffffff81bd49d0 T intel_check_cpu_fifo_underruns +ffffffff81bd4c20 T intel_check_pch_fifo_underruns +ffffffff81bd4d80 T intel_init_fifo_underrun_reporting +ffffffff81bd5000 T intel_frontbuffer_flip_prepare +ffffffff81bd5060 T intel_frontbuffer_flip_complete +ffffffff81bd5180 T intel_frontbuffer_flip +ffffffff81bd5290 T __intel_fb_invalidate +ffffffff81bd5350 T __intel_fb_flush +ffffffff81bd5480 T intel_frontbuffer_get +ffffffff81bd5600 t frontbuffer_active +ffffffff81bd5630 t frontbuffer_retire +ffffffff81bd5670 T intel_frontbuffer_put +ffffffff81bd57c0 T intel_frontbuffer_track +ffffffff81bd6000 T intel_atomic_global_obj_init +ffffffff81bd6070 T intel_atomic_global_obj_cleanup +ffffffff81bd6170 T intel_atomic_get_global_obj_state +ffffffff81bd63f0 T intel_atomic_get_old_global_obj_state +ffffffff81bd6450 T intel_atomic_get_new_global_obj_state +ffffffff81bd64b0 T intel_atomic_swap_global_state +ffffffff81bd6600 T intel_atomic_clear_global_state +ffffffff81bd6730 T intel_atomic_lock_global_state +ffffffff81bd67c0 T intel_atomic_serialize_global_state +ffffffff81bd6850 T intel_atomic_global_state_is_serialized +ffffffff81bd7000 T intel_gmbus_is_valid_pin +ffffffff81bd7100 T intel_gmbus_reset +ffffffff81bd7170 T intel_bb_set_bits +ffffffff81bd72d0 T intel_bb_set_dir +ffffffff81bd7300 T intel_bb_read_bits +ffffffff81bd74d0 T intel_acquire_bus +ffffffff81bd7730 T intel_release_bus +ffffffff81bd7910 T intel_send_start +ffffffff81bd7930 T intel_send_stop +ffffffff81bd7950 T intel_initiate_xfer +ffffffff81bd7970 T intel_read_byte +ffffffff81bd7990 T intel_write_byte +ffffffff81bd79b0 T intel_gmbus_output_aksv +ffffffff81bd7ab0 t do_gmbus_xfer +ffffffff81bd8140 T intel_gmbus_setup +ffffffff81bd84f0 T intel_gmbus_teardown +ffffffff81bd8580 T intel_gmbus_get_adapter +ffffffff81bd8600 T intel_gmbus_force_bit +ffffffff81bd86b0 T intel_gmbus_is_forced_bit +ffffffff81bd86e0 T intel_gmbus_irq_handler +ffffffff81bd8780 t gmbus_xfer_read +ffffffff81bd8a80 t gmbus_xfer_write +ffffffff81bd8cd0 t gmbus_wait +ffffffff81bd9130 t gmbus_wait_idle +ffffffff81bd9300 t gmbus_xfer +ffffffff81bd9400 t gmbus_func +ffffffff81bd9450 t gmbus_lock_bus +ffffffff81bd9470 t gmbus_trylock_bus +ffffffff81bd94d0 t gmbus_unlock_bus +ffffffff81bda000 T intel_hdcp_capable +ffffffff81bda0b0 t intel_hdcp_read_valid_bksv +ffffffff81bda350 T intel_hdcp2_capable +ffffffff81bda4b0 T is_hdcp_supported +ffffffff81bda500 T intel_hdcp_component_init +ffffffff81bda510 T intel_hdcp_init +ffffffff81bda6c0 t intel_hdcp_check_work +ffffffff81bdd680 t intel_hdcp_prop_work +ffffffff81bdd720 T intel_hdcp_enable +ffffffff81bdd780 T intel_hdcp_disable +ffffffff81bdd900 t intel_hdcp_update_value +ffffffff81bddaf0 t _intel_hdcp2_disable +ffffffff81bddf60 t _intel_hdcp_disable +ffffffff81bde2c0 T intel_hdcp_update_pipe +ffffffff81bde470 T intel_hdcp_component_fini +ffffffff81bde520 T intel_hdcp_cleanup +ffffffff81bde670 T intel_hdcp_atomic_check +ffffffff81bde700 T intel_hdcp_handle_cp_irq +ffffffff81bde820 t __delayed_work_tick +ffffffff81bde840 t hdcp2_authenticate_repeater_topology +ffffffff81bdeb50 t transcoder_name +ffffffff81bdeb90 t intel_hdcp_get_repeater_ctl +ffffffff81bdec70 t ktime_get_raw +ffffffff81bdecf0 t wait_remaining_ms_from_jiffies +ffffffff81bded80 t intel_hdcp_auth_downstream +ffffffff81be0270 t intel_write_sha_text +ffffffff81be1000 T intel_hdcp_gsc_cs_required +ffffffff81be1040 T intel_hdcp_gsc_init +ffffffff81be1590 T intel_hdcp_gsc_fini +ffffffff81be1600 T intel_hdcp_gsc_msg_send +ffffffff81be19b0 t gsc_hdcp_initiate_session +ffffffff81be1a10 t gsc_hdcp_verify_receiver_cert_prepare_km +ffffffff81be1a70 t gsc_hdcp_verify_hprime +ffffffff81be1ad0 t gsc_hdcp_store_pairing_info +ffffffff81be1b30 t gsc_hdcp_initiate_locality_check +ffffffff81be1b90 t gsc_hdcp_verify_lprime +ffffffff81be1bf0 t gsc_hdcp_get_session_key +ffffffff81be1c50 t gsc_hdcp_repeater_check_flow_prepare_ack +ffffffff81be1cb0 t gsc_hdcp_verify_mprime +ffffffff81be1d10 t gsc_hdcp_enable_authentication +ffffffff81be1d70 t gsc_hdcp_close_session +ffffffff81be2000 T intel_hdmi_to_i915 +ffffffff81be2040 T hsw_write_infoframe +ffffffff81be24c0 t hsw_dip_data_reg +ffffffff81be2680 T hsw_read_infoframe +ffffffff81be2750 T intel_hdmi_infoframe_enable +ffffffff81be27f0 T intel_hdmi_infoframes_enabled +ffffffff81be2910 T intel_read_infoframe +ffffffff81be2ac0 T intel_hdmi_read_gcp_infoframe +ffffffff81be2ba0 T intel_dp_dual_mode_set_tmds_output +ffffffff81be2c70 T intel_hdmi_tmds_clock +ffffffff81be2cc0 T intel_hdmi_bpc_possible +ffffffff81be2df0 T intel_hdmi_limited_color_range +ffffffff81be2e60 T intel_hdmi_compute_has_hdmi_sink +ffffffff81be2ed0 T intel_hdmi_compute_config +ffffffff81be3520 t intel_hdmi_compute_output_format +ffffffff81be36a0 t intel_hdmi_compute_hdmi_infoframe +ffffffff81be3780 t intel_hdmi_compute_drm_infoframe +ffffffff81be3890 T intel_hdmi_encoder_shutdown +ffffffff81be3970 T intel_hdmi_handle_sink_scrambling +ffffffff81be3a70 T intel_infoframe_init +ffffffff81be3c10 t vlv_write_infoframe +ffffffff81be3f90 t vlv_read_infoframe +ffffffff81be4130 t vlv_set_infoframes +ffffffff81be44b0 t vlv_infoframes_enabled +ffffffff81be4550 t g4x_write_infoframe +ffffffff81be4840 t g4x_read_infoframe +ffffffff81be4990 t g4x_set_infoframes +ffffffff81be4c50 t g4x_infoframes_enabled +ffffffff81be4cd0 t hsw_set_infoframes +ffffffff81be4fb0 t hsw_infoframes_enabled +ffffffff81be5040 t ibx_write_infoframe +ffffffff81be5380 t ibx_read_infoframe +ffffffff81be5500 t ibx_set_infoframes +ffffffff81be5880 t ibx_infoframes_enabled +ffffffff81be5910 t cpt_write_infoframe +ffffffff81be5c50 t cpt_read_infoframe +ffffffff81be5dd0 t cpt_set_infoframes +ffffffff81be60f0 t cpt_infoframes_enabled +ffffffff81be6170 T intel_hdmi_init_connector +ffffffff81be6a00 T intel_hdmi_dsc_get_slice_height +ffffffff81be6a60 T intel_hdmi_dsc_get_num_slices +ffffffff81be6be0 T intel_hdmi_dsc_get_bpp +ffffffff81be6cc0 t intel_hdmi_compute_clock +ffffffff81be6f40 t hdmi_port_clock_valid +ffffffff81be71a0 t intel_write_infoframe +ffffffff81be7390 t intel_hdmi_detect +ffffffff81be7580 t intel_hdmi_force +ffffffff81be7630 t intel_hdmi_connector_register +ffffffff81be7640 t intel_hdmi_connector_unregister +ffffffff81be7650 t intel_hdmi_set_edid +ffffffff81be7990 t intel_hdmi_get_modes +ffffffff81be79a0 t intel_hdmi_mode_valid +ffffffff81be7b80 t intel_hdmi_connector_atomic_check +ffffffff81be7bb0 t intel_hdmi_mode_clock_valid +ffffffff81be7d70 t intel_hdmi_hdcp_write_an_aksv +ffffffff81be7ef0 t intel_hdmi_hdcp_read_bksv +ffffffff81be7fd0 t intel_hdmi_hdcp_read_bstatus +ffffffff81be80b0 t intel_hdmi_hdcp_repeater_present +ffffffff81be81a0 t intel_hdmi_hdcp_read_ri_prime +ffffffff81be8280 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81be8370 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81be8450 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81be8550 t intel_hdmi_hdcp_toggle_signalling +ffffffff81be8810 t intel_hdmi_hdcp_check_link +ffffffff81be8bb0 t intel_hdmi_hdcp2_capable +ffffffff81be8c80 t intel_hdmi_hdcp2_write_msg +ffffffff81be8da0 t intel_hdmi_hdcp2_read_msg +ffffffff81be9210 t intel_hdmi_hdcp2_check_link +ffffffff81bea000 T intel_hpd_pin_default +ffffffff81bea030 T intel_encoder_hotplug +ffffffff81bea190 T intel_hpd_trigger_irq +ffffffff81bea210 T intel_hpd_irq_handler +ffffffff81bea670 T intel_hpd_init +ffffffff81bea790 T intel_hpd_poll_enable +ffffffff81bea820 T intel_hpd_poll_disable +ffffffff81bea880 T intel_hpd_init_early +ffffffff81bea9d0 t i915_hotplug_work_func +ffffffff81beae80 t i915_digport_work_func +ffffffff81beb030 t i915_hpd_poll_init_work +ffffffff81beb180 t intel_hpd_irq_storm_reenable_work +ffffffff81beb4f0 T intel_hpd_cancel_work +ffffffff81beb630 T intel_hpd_disable +ffffffff81beb6d0 T intel_hpd_enable +ffffffff81beb750 T intel_hpd_debugfs_register +ffffffff81beb780 t __delayed_work_tick +ffffffff81bec000 T i915_hotplug_interrupt_update_locked +ffffffff81bec0c0 T i915_hotplug_interrupt_update +ffffffff81bec1b0 T i9xx_hpd_irq_ack +ffffffff81bec310 T i9xx_hpd_irq_handler +ffffffff81bec4d0 T ibx_hpd_irq_handler +ffffffff81bec6a0 T xelpdp_pica_irq_handler +ffffffff81bec9c0 T icp_irq_handler +ffffffff81becca0 T spt_irq_handler +ffffffff81becf70 T ilk_hpd_irq_handler +ffffffff81bed0b0 T bxt_hpd_irq_handler +ffffffff81bed230 T gen11_hpd_irq_handler +ffffffff81bed4d0 T intel_hpd_enable_detection +ffffffff81bed510 T intel_hpd_irq_setup +ffffffff81bed560 T intel_hotplug_irq_init +ffffffff81bed7f0 t i915_hpd_irq_setup +ffffffff81bed910 t i915_hpd_enable_detection +ffffffff81bed9c0 t icp_hpd_irq_setup +ffffffff81bedbd0 t icp_hpd_enable_detection +ffffffff81bedce0 t dg1_hpd_irq_setup +ffffffff81bedd50 t dg1_hpd_enable_detection +ffffffff81bedec0 t xelpdp_hpd_irq_setup +ffffffff81bee340 t xelpdp_hpd_enable_detection +ffffffff81bee510 t gen11_hpd_irq_setup +ffffffff81bee7a0 t gen11_hpd_enable_detection +ffffffff81bee9e0 t bxt_hpd_irq_setup +ffffffff81beeb90 t bxt_hpd_enable_detection +ffffffff81beeca0 t spt_hpd_irq_setup +ffffffff81beeee0 t spt_hpd_enable_detection +ffffffff81bef020 t ilk_hpd_irq_setup +ffffffff81bef2b0 t ilk_hpd_enable_detection +ffffffff81bf0000 T intel_hti_init +ffffffff81bf0070 T intel_hti_uses_phy +ffffffff81bf0110 T intel_hti_dpll_mask +ffffffff81bf1000 T intel_load_detect_get_pipe +ffffffff81bf1430 t intel_modeset_disable_planes +ffffffff81bf1510 T intel_load_detect_release_pipe +ffffffff81bf2000 T intel_lpe_audio_irq_handler +ffffffff81bf2020 T intel_lpe_audio_init +ffffffff81bf2050 T intel_lpe_audio_teardown +ffffffff81bf2070 T intel_lpe_audio_notify +ffffffff81bf3000 T lspcon_detect_hdr_capability +ffffffff81bf30c0 T lspcon_write_infoframe +ffffffff81bf3950 T lspcon_read_infoframe +ffffffff81bf3990 T lspcon_set_infoframes +ffffffff81bf3c20 T lspcon_infoframes_enabled +ffffffff81bf3e30 T lspcon_wait_pcon_mode +ffffffff81bf3e50 t lspcon_wait_mode +ffffffff81bf4180 T lspcon_init +ffffffff81bf4660 T intel_lspcon_infoframes_enabled +ffffffff81bf4690 T lspcon_resume +ffffffff81bf49a0 t lspcon_change_mode +ffffffff81bf5000 T intel_lvds_port_enabled +ffffffff81bf5090 T intel_get_lvds_encoder +ffffffff81bf50f0 T intel_is_dual_link_lvds +ffffffff81bf5150 T intel_lvds_init +ffffffff81bf5950 t intel_enable_lvds +ffffffff81bf5ad0 t intel_pre_enable_lvds +ffffffff81bf5df0 t intel_lvds_compute_config +ffffffff81bf5f70 t pch_disable_lvds +ffffffff81bf5f90 t pch_post_disable_lvds +ffffffff81bf5fb0 t gmch_disable_lvds +ffffffff81bf5ff0 t intel_lvds_get_hw_state +ffffffff81bf60c0 t intel_lvds_get_config +ffffffff81bf61e0 t intel_lvds_shutdown +ffffffff81bf6290 t compute_is_dual_link_lvds +ffffffff81bf6380 t intel_no_lvds_dmi_callback +ffffffff81bf63d0 t intel_disable_lvds +ffffffff81bf6520 t intel_lvds_get_modes +ffffffff81bf6580 t intel_lvds_mode_valid +ffffffff81bf6630 t intel_dual_link_lvds_callback +ffffffff81bf7000 T _intel_modeset_lock_begin +ffffffff81bf7070 T _intel_modeset_lock_loop +ffffffff81bf70b0 T _intel_modeset_lock_end +ffffffff81bf8000 T intel_modeset_setup_hw_state +ffffffff81bf96b0 t intel_crtc_disable_noatomic +ffffffff81bf9d80 t intel_crtc_disable_noatomic_begin +ffffffff81bfb000 T intel_modeset_verify_crtc +ffffffff81bfb630 t verify_connector_state +ffffffff81bfbb10 T intel_modeset_verify_disabled +ffffffff81bfc000 T intel_opregion_notify_encoder +ffffffff81bfc190 t swsci +ffffffff81bfc530 T intel_opregion_notify_adapter +ffffffff81bfc590 T intel_opregion_asle_intr +ffffffff81bfc5e0 T intel_opregion_setup +ffffffff81bfcf90 t asle_work +ffffffff81bfd490 T intel_opregion_get_panel_type +ffffffff81bfd5a0 T intel_opregion_get_edid +ffffffff81bfd690 T intel_opregion_headless_sku +ffffffff81bfd6e0 T intel_opregion_register +ffffffff81bfd780 T intel_opregion_resume +ffffffff81bfd820 T intel_opregion_suspend +ffffffff81bfd8e0 T intel_opregion_unregister +ffffffff81bfd9c0 T intel_opregion_cleanup +ffffffff81bfdad0 t intel_no_opregion_vbt_callback +ffffffff81bfdb30 t intel_use_opregion_panel_type_callback +ffffffff81bfe000 T intel_overlay_reset +ffffffff81bfe050 T intel_overlay_switch_off +ffffffff81bfe2a0 t intel_overlay_release_old_vid +ffffffff81bfe4a0 T intel_overlay_put_image_ioctl +ffffffff81bfe850 t update_pfit_vscale_ratio +ffffffff81bfe930 t check_overlay_dst +ffffffff81bfea10 t check_overlay_src +ffffffff81bfec60 t intel_overlay_do_put_image +ffffffff81bff920 T intel_overlay_attrs_ioctl +ffffffff81bffcc0 t check_gamma +ffffffff81bffeb0 T intel_overlay_setup +ffffffff81c00160 t intel_overlay_last_flip_retire +ffffffff81c001a0 T intel_overlay_cleanup +ffffffff81c00260 T intel_overlay_capture_error_state +ffffffff81c00370 T intel_overlay_print_error_state +ffffffff81c008b0 t intel_overlay_release_old_vid_tail +ffffffff81c00980 t intel_overlay_off_tail +ffffffff81c00b70 t intel_overlay_flip_prepare +ffffffff81c01000 T intel_panel_use_ssc +ffffffff81c01060 T intel_panel_preferred_fixed_mode +ffffffff81c010b0 T intel_panel_fixed_mode +ffffffff81c01230 T intel_panel_downclock_mode +ffffffff81c01330 T intel_panel_highest_mode +ffffffff81c01390 T intel_panel_get_modes +ffffffff81c01440 T intel_panel_drrs_type +ffffffff81c01470 T intel_panel_compute_config +ffffffff81c01630 T intel_panel_add_edid_fixed_modes +ffffffff81c01b90 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81c01c00 t intel_panel_add_fixed_mode +ffffffff81c01d90 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81c01e00 T intel_panel_add_encoder_fixed_mode +ffffffff81c01e40 T intel_panel_fitting +ffffffff81c024b0 T intel_panel_detect +ffffffff81c02550 T intel_panel_mode_valid +ffffffff81c02600 T intel_panel_init_alloc +ffffffff81c02650 T intel_panel_init +ffffffff81c02790 T intel_panel_fini +ffffffff81c03000 T intel_has_pch_trancoder +ffffffff81c03060 T intel_crtc_pch_transcoder +ffffffff81c030a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81c030f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81c03140 T ilk_pch_pre_enable +ffffffff81c03170 T ilk_pch_enable +ffffffff81c03820 t ilk_pch_transcoder_set_timings +ffffffff81c03af0 T ilk_pch_disable +ffffffff81c03b10 T ilk_pch_post_disable +ffffffff81c03fc0 T ilk_pch_get_config +ffffffff81c041d0 T lpt_pch_enable +ffffffff81c044a0 T lpt_pch_disable +ffffffff81c045e0 T lpt_pch_get_config +ffffffff81c046d0 T intel_pch_sanitize +ffffffff81c04a10 t assert_pch_dp_disabled +ffffffff81c04bc0 t assert_pch_hdmi_disabled +ffffffff81c05000 T lpt_disable_iclkip +ffffffff81c050a0 T lpt_iclkip +ffffffff81c05130 T lpt_program_iclkip +ffffffff81c05450 T lpt_get_iclkip +ffffffff81c05590 T lpt_disable_clkout_dp +ffffffff81c05690 T intel_init_pch_refclk +ffffffff81c07000 T intel_initial_plane_config +ffffffff81c08000 T intel_pmdemand_init +ffffffff81c08150 T intel_pmdemand_init_early +ffffffff81c081e0 T intel_pmdemand_update_phys_mask +ffffffff81c08290 T intel_pmdemand_update_port_clock +ffffffff81c082d0 T intel_pmdemand_atomic_check +ffffffff81c08710 t intel_pmdemand_update_max_ddiclk +ffffffff81c087e0 t intel_pmdemand_update_active_non_tc_phys +ffffffff81c08a10 T intel_pmdemand_init_pmdemand_params +ffffffff81c08c10 T intel_pmdemand_program_dbuf +ffffffff81c08de0 t intel_pmdemand_wait +ffffffff81c09020 T intel_pmdemand_pre_plane_update +ffffffff81c09140 t intel_pmdemand_program_params +ffffffff81c095f0 T intel_pmdemand_post_plane_update +ffffffff81c09700 t intel_pmdemand_duplicate_state +ffffffff81c09790 t intel_pmdemand_destroy_state +ffffffff81c0a000 T intel_pps_lock +ffffffff81c0a070 T intel_pps_unlock +ffffffff81c0a0e0 T intel_pps_reset_all +ffffffff81c0a240 T intel_pps_check_power_unlocked +ffffffff81c0a590 t pps_name +ffffffff81c0a640 T intel_pps_wait_power_cycle +ffffffff81c0a710 t wait_panel_power_cycle +ffffffff81c0a920 T intel_pps_vdd_on_unlocked +ffffffff81c0af80 T intel_pps_vdd_on +ffffffff81c0b160 T intel_pps_vdd_off_sync +ffffffff81c0b270 t intel_pps_vdd_off_sync_unlocked +ffffffff81c0b730 T intel_pps_vdd_off_unlocked +ffffffff81c0b920 T intel_pps_on_unlocked +ffffffff81c0be70 T intel_pps_on +ffffffff81c0bf40 T intel_pps_off_unlocked +ffffffff81c0c3b0 T intel_pps_off +ffffffff81c0c480 T intel_pps_backlight_on +ffffffff81c0c6d0 T intel_pps_backlight_off +ffffffff81c0c940 T intel_pps_backlight_power +ffffffff81c0cb70 T vlv_pps_init +ffffffff81c0cd70 t vlv_detach_power_sequencer +ffffffff81c0cf70 t vlv_steal_power_sequencer +ffffffff81c0d0b0 t pps_init_delays +ffffffff81c0d590 t pps_init_registers +ffffffff81c0d9a0 T intel_pps_have_panel_power_or_vdd +ffffffff81c0db40 T intel_pps_encoder_reset +ffffffff81c0dd30 t vlv_initial_power_sequencer_setup +ffffffff81c0e0a0 t pps_vdd_init +ffffffff81c0e280 T intel_pps_init +ffffffff81c0e780 t edp_panel_vdd_work +ffffffff81c0e840 T intel_pps_init_late +ffffffff81c0eac0 T intel_pps_unlock_regs_wa +ffffffff81c0ebe0 T intel_pps_setup +ffffffff81c0ec50 T assert_pps_unlocked +ffffffff81c0ef20 t intel_pps_get_registers +ffffffff81c0f830 t wait_panel_status +ffffffff81c0fcd0 t intel_pps_readout_hw_state +ffffffff81c0fec0 t __delayed_work_tick +ffffffff81c10000 T intel_psr_irq_handler +ffffffff81c10710 t transcoder_name +ffffffff81c10750 T intel_psr_init_dpcd +ffffffff81c10a40 T intel_psr_compute_config +ffffffff81c10c40 t intel_psr2_config_valid +ffffffff81c11120 T intel_psr_get_config +ffffffff81c112e0 T intel_psr_disable +ffffffff81c11420 t intel_psr_disable_locked +ffffffff81c11810 T intel_psr_pause +ffffffff81c11a30 t intel_psr_exit +ffffffff81c11d10 T intel_psr_resume +ffffffff81c11db0 t intel_psr_activate +ffffffff81c12550 T intel_psr2_disable_plane_sel_fetch_arm +ffffffff81c125c0 T intel_psr2_program_plane_sel_fetch_arm +ffffffff81c12660 T intel_psr2_program_plane_sel_fetch_noarm +ffffffff81c127d0 T intel_psr2_program_trans_man_trk_ctl +ffffffff81c128c0 T intel_psr2_sel_fetch_update +ffffffff81c13070 T intel_psr_pre_plane_update +ffffffff81c13250 t wm_optimization_wa +ffffffff81c13410 T intel_psr_post_plane_update +ffffffff81c14190 T intel_psr_wait_for_idle_locked +ffffffff81c14380 T intel_psr_debug_set +ffffffff81c14750 T intel_psr_invalidate +ffffffff81c149b0 T intel_psr_flush +ffffffff81c14e50 T intel_psr_init +ffffffff81c14fa0 t intel_psr_work +ffffffff81c151a0 t tgl_dc3co_disable_work +ffffffff81c15200 T intel_psr_short_pulse +ffffffff81c15670 T intel_psr_enabled +ffffffff81c15700 T intel_psr_lock +ffffffff81c157c0 T intel_psr_unlock +ffffffff81c15880 T intel_psr_debugfs_register +ffffffff81c158b0 T intel_psr_connector_debugfs_add +ffffffff81c158e0 t _compute_psr2_sdp_prior_scanline_indication +ffffffff81c159a0 t _compute_psr2_wake_times +ffffffff81c15aa0 t intel_psr2_sel_fetch_config_valid +ffffffff81c15b30 t psr2_granularity_check +ffffffff81c15c20 t tgl_psr2_disable_dc3co +ffffffff81c15d40 t __delayed_work_tick +ffffffff81c16000 T intel_lookup_range_min_qp +ffffffff81c16120 T intel_lookup_range_max_qp +ffffffff81c17000 T intel_init_quirks +ffffffff81c17110 T intel_has_quirk +ffffffff81c17150 t quirk_ssc_force_disable +ffffffff81c17180 t quirk_invert_brightness +ffffffff81c171b0 t quirk_backlight_present +ffffffff81c171e0 t quirk_increase_t12_delay +ffffffff81c17210 t quirk_increase_ddi_disabled_time +ffffffff81c17240 t intel_dmi_reverse_brightness +ffffffff81c17290 t intel_dmi_no_pps_backlight +ffffffff81c18000 T intel_sdvo_port_enabled +ffffffff81c180b0 T intel_sdvo_init +ffffffff81c192f0 t intel_sdvo_compute_config +ffffffff81c19720 t pch_disable_sdvo +ffffffff81c19750 t pch_post_disable_sdvo +ffffffff81c19760 t intel_disable_sdvo +ffffffff81c19940 t intel_sdvo_pre_enable +ffffffff81c1a430 t intel_enable_sdvo +ffffffff81c1a650 t intel_sdvo_get_hw_state +ffffffff81c1a750 t intel_sdvo_get_config +ffffffff81c1ac30 t intel_sdvo_set_target_input +ffffffff81c1acb0 t intel_sdvo_get_input_pixel_clock_range +ffffffff81c1ad60 t intel_sdvo_ddc_proxy_xfer +ffffffff81c1ae10 t intel_sdvo_ddc_proxy_func +ffffffff81c1ae40 t __intel_sdvo_write_cmd +ffffffff81c1b350 t proxy_lock_bus +ffffffff81c1b380 t proxy_trylock_bus +ffffffff81c1b3b0 t proxy_unlock_bus +ffffffff81c1b3e0 t intel_sdvo_enc_destroy +ffffffff81c1b3f0 t intel_sdvo_set_output_timings_from_mode +ffffffff81c1b520 t intel_sdvo_get_preferred_input_mode +ffffffff81c1b910 t intel_sdvo_get_dtd_from_mode +ffffffff81c1ba90 t intel_sdvo_read_response +ffffffff81c1c000 t intel_sdvo_get_value +ffffffff81c1c080 t intel_sdvo_write_sdvox +ffffffff81c1c2f0 t intel_sdvo_write_infoframe +ffffffff81c1c4f0 t intel_sdvo_read_infoframe +ffffffff81c1c770 t intel_sdvo_hotplug +ffffffff81c1c7c0 t intel_sdvo_connector_get_hw_state +ffffffff81c1c860 t intel_sdvo_detect +ffffffff81c1cbc0 t intel_sdvo_connector_register +ffffffff81c1cbd0 t intel_sdvo_connector_unregister +ffffffff81c1cbe0 t intel_sdvo_connector_duplicate_state +ffffffff81c1cc70 t intel_sdvo_connector_atomic_set_property +ffffffff81c1ce40 t intel_sdvo_connector_atomic_get_property +ffffffff81c1d060 t intel_sdvo_get_analog_edid +ffffffff81c1d0a0 t intel_sdvo_connector_matches_edid +ffffffff81c1d140 t intel_sdvo_get_modes +ffffffff81c1d470 t intel_sdvo_mode_valid +ffffffff81c1d5a0 t intel_sdvo_atomic_check +ffffffff81c1d660 t intel_sdvo_create_enhance_property +ffffffff81c1f000 T intel_snps_phy_wait_for_calibration +ffffffff81c1f0e0 T intel_snps_phy_update_psr_power_state +ffffffff81c1f1b0 T intel_snps_phy_set_signal_levels +ffffffff81c1f460 T intel_mpllb_calc_state +ffffffff81c1f610 T intel_snps_phy_check_hdmi_link_rate +ffffffff81c1f6b0 T intel_mpllb_enable +ffffffff81c1f950 T intel_mpllb_disable +ffffffff81c1fb00 T intel_mpllb_calc_port_clock +ffffffff81c1fbd0 T intel_mpllb_readout_hw_state +ffffffff81c1fd90 T intel_mpllb_state_verify +ffffffff81c21000 T vlv_plane_min_cdclk +ffffffff81c210f0 T ivb_plane_min_cdclk +ffffffff81c211b0 T hsw_plane_min_cdclk +ffffffff81c21250 T chv_plane_check_rotation +ffffffff81c212d0 T intel_sprite_plane_create +ffffffff81c21670 t vlv_sprite_update_noarm +ffffffff81c21770 t vlv_sprite_update_arm +ffffffff81c21e10 t vlv_sprite_disable_arm +ffffffff81c21ea0 t vlv_sprite_get_hw_state +ffffffff81c21f90 t vlv_sprite_check +ffffffff81c22090 t ivb_sprite_update_noarm +ffffffff81c22200 t ivb_sprite_update_arm +ffffffff81c225e0 t ivb_sprite_disable_arm +ffffffff81c22690 t ivb_sprite_get_hw_state +ffffffff81c22760 t g4x_sprite_check +ffffffff81c22a40 t hsw_sprite_max_stride +ffffffff81c22aa0 t g4x_sprite_max_stride +ffffffff81c22b10 t ivb_sprite_min_cdclk +ffffffff81c22c50 t g4x_sprite_update_noarm +ffffffff81c22db0 t g4x_sprite_update_arm +ffffffff81c23200 t g4x_sprite_disable_arm +ffffffff81c232b0 t g4x_sprite_get_hw_state +ffffffff81c23380 t g4x_sprite_min_cdclk +ffffffff81c23460 t vlv_sprite_ctl +ffffffff81c23660 t vlv_sprite_format_mod_supported +ffffffff81c237a0 t ivb_sprite_ctl +ffffffff81c239e0 t g4x_sprite_ctl +ffffffff81c23bb0 t snb_sprite_format_mod_supported +ffffffff81c23ca0 t g4x_sprite_format_mod_supported +ffffffff81c24000 T intel_sprite_set_colorkey_ioctl +ffffffff81c25000 T intel_tc_port_in_tbt_alt_mode +ffffffff81c25090 T intel_tc_port_in_dp_alt_mode +ffffffff81c25120 T intel_tc_port_in_legacy_mode +ffffffff81c251b0 T intel_tc_cold_requires_aux_pw +ffffffff81c25230 T intel_tc_port_get_lane_mask +ffffffff81c25380 T intel_tc_port_get_pin_assignment_mask +ffffffff81c254d0 T intel_tc_port_fia_max_lane_count +ffffffff81c25720 T intel_tc_port_set_fia_lane_count +ffffffff81c25910 T intel_tc_port_init_mode +ffffffff81c25b80 t intel_tc_port_update_mode +ffffffff81c25fb0 T intel_tc_port_sanitize_mode +ffffffff81c26340 T intel_tc_port_connected_locked +ffffffff81c264b0 T intel_tc_port_ref_held +ffffffff81c26510 T intel_tc_port_connected +ffffffff81c265a0 T intel_tc_port_link_needs_reset +ffffffff81c26670 T intel_tc_port_link_reset +ffffffff81c267b0 T intel_tc_port_link_cancel_reset_work +ffffffff81c26880 T intel_tc_port_lock +ffffffff81c268a0 t __intel_tc_port_lock +ffffffff81c26a20 T intel_tc_port_suspend +ffffffff81c26a90 T intel_tc_port_unlock +ffffffff81c26b10 T intel_tc_port_get_link +ffffffff81c26bb0 T intel_tc_port_put_link +ffffffff81c26c70 T intel_tc_port_init +ffffffff81c26f30 t kasprintf +ffffffff81c27010 t intel_tc_port_disconnect_phy_work +ffffffff81c27070 t intel_tc_port_link_reset_work +ffffffff81c27430 T intel_tc_port_cleanup +ffffffff81c27510 t intel_tc_port_needs_reset +ffffffff81c27630 t tgl_tc_phy_cold_off_domain +ffffffff81c27660 t xelpdp_tc_phy_hpd_live_status +ffffffff81c277a0 t adlp_tc_phy_is_ready +ffffffff81c278c0 t xelpdp_tc_phy_is_owned +ffffffff81c279b0 t xelpdp_tc_phy_get_hw_state +ffffffff81c27b80 t xelpdp_tc_phy_connect +ffffffff81c27e60 t xelpdp_tc_phy_disconnect +ffffffff81c27fe0 t adlp_tc_phy_init +ffffffff81c28050 t tc_phy_get_current_mode +ffffffff81c283b0 t tc_phy_wait_for_ready +ffffffff81c28550 t xelpdp_tc_phy_enable_tcss_power +ffffffff81c28800 t tc_phy_verify_legacy_or_dp_alt_mode +ffffffff81c28a10 t xelpdp_tc_phy_wait_for_tcss_power +ffffffff81c28c60 t adlp_tc_phy_cold_off_domain +ffffffff81c28cc0 t adlp_tc_phy_hpd_live_status +ffffffff81c28de0 t adlp_tc_phy_is_owned +ffffffff81c28ec0 t adlp_tc_phy_get_hw_state +ffffffff81c28f80 t adlp_tc_phy_connect +ffffffff81c29320 t adlp_tc_phy_disconnect +ffffffff81c294c0 t icl_tc_phy_hpd_live_status +ffffffff81c29660 t icl_tc_phy_is_ready +ffffffff81c29780 t icl_tc_phy_is_owned +ffffffff81c298a0 t icl_tc_phy_get_hw_state +ffffffff81c29960 t icl_tc_phy_connect +ffffffff81c29b20 t icl_tc_phy_disconnect +ffffffff81c29bb0 t tgl_tc_phy_init +ffffffff81c29d20 t icl_tc_phy_take_ownership +ffffffff81c29eb0 t icl_tc_phy_cold_off_domain +ffffffff81c29f10 t icl_tc_phy_init +ffffffff81c29f70 t __delayed_work_tick +ffffffff81c2a000 T intel_tv_init +ffffffff81c2a490 t intel_tv_compute_config +ffffffff81c2a990 t intel_tv_get_config +ffffffff81c2aeb0 t intel_tv_pre_enable +ffffffff81c2b8f0 t intel_enable_tv +ffffffff81c2b970 t intel_disable_tv +ffffffff81c2b9e0 t intel_tv_get_hw_state +ffffffff81c2ba50 t intel_tv_connector_duplicate_state +ffffffff81c2bae0 t intel_tv_mode_to_mode +ffffffff81c2bc30 t intel_tv_get_modes +ffffffff81c2bfb0 t intel_tv_detect +ffffffff81c2c520 t intel_tv_mode_valid +ffffffff81c2c5e0 t intel_tv_atomic_check +ffffffff81c2d000 T i915_get_vblank_counter +ffffffff81c2d220 T g4x_get_vblank_counter +ffffffff81c2d2b0 T intel_crtc_get_vblank_timestamp +ffffffff81c2d2d0 t i915_get_crtc_scanoutpos +ffffffff81c2d720 T intel_get_crtc_scanline +ffffffff81c2d7a0 t __intel_get_crtc_scanline +ffffffff81c2da00 T intel_wait_for_pipe_scanline_stopped +ffffffff81c2da10 t wait_for_pipe_scanline_moving +ffffffff81c2dcd0 T intel_wait_for_pipe_scanline_moving +ffffffff81c2dcf0 T intel_crtc_update_active_timings +ffffffff81c2e000 T intel_dsc_source_support +ffffffff81c2e050 T intel_dsc_compute_params +ffffffff81c2e680 T intel_dsc_power_domain +ffffffff81c2e730 T intel_dsc_get_num_vdsc_instances +ffffffff81c2e780 T intel_dsc_dsi_pps_write +ffffffff81c2eac0 T intel_dsc_dp_pps_write +ffffffff81c2ebc0 T intel_uncompressed_joiner_enable +ffffffff81c2ecf0 T intel_dsc_enable +ffffffff81c30a10 T intel_dsc_disable +ffffffff81c30ba0 T intel_dsc_get_config +ffffffff81c31000 T intel_vga_disable +ffffffff81c31150 T intel_vga_redisable_power_on +ffffffff81c31200 T intel_vga_redisable +ffffffff81c312e0 T intel_vga_reset_io_mem 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intel_print_wm_latency +ffffffff81c33410 T intel_wm_init +ffffffff81c33430 T intel_wm_debugfs_register +ffffffff81c34000 T skl_update_scaler_crtc +ffffffff81c340c0 t skl_update_scaler +ffffffff81c34430 T skl_update_scaler_plane +ffffffff81c34850 T intel_atomic_setup_scalers +ffffffff81c34e30 T skl_pfit_enable +ffffffff81c35330 T skl_program_plane_scaler +ffffffff81c35a80 T skl_detach_scalers +ffffffff81c35be0 T skl_scaler_disable +ffffffff81c35d10 T skl_scaler_get_config +ffffffff81c36000 T skl_format_to_fourcc +ffffffff81c36180 T icl_is_nv12_y_plane +ffffffff81c361f0 T icl_hdr_plane_mask +ffffffff81c36220 T icl_is_hdr_plane +ffffffff81c36260 T skl_calc_main_surface_offset +ffffffff81c364e0 T skl_universal_plane_create +ffffffff81c36d70 t icl_plane_min_width +ffffffff81c36f00 t icl_hdr_plane_max_width +ffffffff81c36f60 t icl_sdr_plane_max_width +ffffffff81c36f90 t icl_plane_max_height +ffffffff81c36fc0 t icl_plane_min_cdclk +ffffffff81c37010 t glk_plane_max_width +ffffffff81c370d0 t skl_plane_max_height +ffffffff81c37100 t glk_plane_min_cdclk +ffffffff81c37170 t skl_plane_max_width +ffffffff81c37250 t skl_plane_min_cdclk +ffffffff81c372c0 t skl_plane_max_stride +ffffffff81c37360 t icl_plane_update_noarm +ffffffff81c37c40 t icl_plane_update_arm +ffffffff81c37df0 t icl_plane_disable_arm +ffffffff81c37f10 t skl_plane_update_noarm +ffffffff81c380c0 t skl_plane_update_arm +ffffffff81c383f0 t skl_plane_disable_arm +ffffffff81c384b0 t skl_plane_get_hw_state +ffffffff81c385a0 t skl_plane_check +ffffffff81c39390 t skl_plane_async_flip +ffffffff81c394c0 t skl_plane_enable_flip_done +ffffffff81c39540 t skl_plane_disable_flip_done +ffffffff81c395c0 T skl_get_initial_plane_config +ffffffff81c39e00 T skl_fixup_initial_plane_config +ffffffff81c39eb0 t skl_plane_aux_dist +ffffffff81c39fe0 t skl_surf_address +ffffffff81c3a110 t skl_plane_check_nv12_rotation +ffffffff81c3a1c0 t pxp_is_borked +ffffffff81c3a220 t skl_plane_ctl +ffffffff81c3a910 t glk_plane_color_ctl +ffffffff81c3aa60 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skl_watermark_debugfs_register +ffffffff81c3efd0 t skl_sagv_disable +ffffffff81c3f110 t skl_compute_wm +ffffffff81c425e0 t skl_wm_get_hw_state_and_sanitize +ffffffff81c42e40 t skl_build_plane_wm_single +ffffffff81c431f0 t skl_compute_wm_params +ffffffff81c43600 t skl_compute_plane_wm +ffffffff81c43a50 t skl_compute_dbuf_slices +ffffffff81c43f50 t skl_ddb_entry_for_slices +ffffffff81c440a0 t intel_dbuf_duplicate_state +ffffffff81c44140 t intel_dbuf_destroy_state +ffffffff81c45000 T pixel_format_from_register_bits +ffffffff81c45070 T vlv_dsi_wait_for_fifo_empty +ffffffff81c45130 T vlv_dsi_init +ffffffff81c45ab0 t intel_dsi_compute_config +ffffffff81c45c30 t intel_dsi_pre_enable +ffffffff81c47c20 t bxt_dsi_enable +ffffffff81c47c40 t intel_dsi_disable +ffffffff81c47fb0 t intel_dsi_post_disable +ffffffff81c48e50 t intel_dsi_get_hw_state +ffffffff81c49160 t intel_dsi_get_config +ffffffff81c499d0 t intel_dsi_encoder_destroy +ffffffff81c49a00 t intel_dsi_prepare +ffffffff81c4a820 t dpi_send_cmd +ffffffff81c4a9d0 t intel_dsi_host_attach +ffffffff81c4aa00 t intel_dsi_host_detach +ffffffff81c4aa30 t intel_dsi_host_transfer +ffffffff81c4aee0 t vlv_dsi_mode_valid +ffffffff81c4b000 T vlv_dsi_pll_compute +ffffffff81c4b3d0 t vlv_dsi_pclk +ffffffff81c4b580 T vlv_dsi_pll_enable +ffffffff81c4b830 T vlv_dsi_pll_disable +ffffffff81c4b8d0 T bxt_dsi_pll_is_enabled +ffffffff81c4b9b0 T bxt_dsi_pll_disable +ffffffff81c4bae0 T vlv_dsi_get_pclk +ffffffff81c4bbb0 T bxt_dsi_get_pclk +ffffffff81c4bc80 T vlv_dsi_reset_clocks +ffffffff81c4bd20 T bxt_dsi_pll_compute +ffffffff81c4bed0 T bxt_dsi_pll_enable +ffffffff81c4c290 T bxt_dsi_reset_clocks +ffffffff81c4c3e0 T assert_dsi_pll_enabled +ffffffff81c4c400 t assert_dsi_pll +ffffffff81c4c530 T assert_dsi_pll_disabled +ffffffff81c4d000 T i915_gem_busy_ioctl +ffffffff81c4e000 T i915_gem_clflush_object +ffffffff81c4e280 t clflush_work +ffffffff81c4e2f0 t clflush_release +ffffffff81c4f000 T i915_lut_handle_alloc +ffffffff81c4f020 T i915_lut_handle_free +ffffffff81c4f040 T i915_gem_context_release +ffffffff81c4f070 T i915_gem_init__contexts +ffffffff81c4f0d0 T i915_gem_context_open +ffffffff81c4f290 t i915_gem_create_context +ffffffff81c4fbb0 t proto_context_close +ffffffff81c4fc70 t gem_context_register +ffffffff81c4fe60 T i915_gem_context_close +ffffffff81c50010 t context_close +ffffffff81c50810 T i915_gem_vm_create_ioctl +ffffffff81c50960 t xa_alloc +ffffffff81c50a00 T i915_gem_vm_destroy_ioctl +ffffffff81c50ae0 T i915_gem_user_to_context_sseu +ffffffff81c50d40 T i915_gem_context_lookup +ffffffff81c50ed0 T i915_gem_context_create_ioctl +ffffffff81c51180 t proto_context_register +ffffffff81c51340 T i915_gem_context_destroy_ioctl +ffffffff81c514b0 T i915_gem_context_getparam_ioctl +ffffffff81c51940 T i915_gem_context_setparam_ioctl +ffffffff81c51e90 t set_proto_ctx_param +ffffffff81c52680 T i915_gem_context_reset_stats_ioctl +ffffffff81c527a0 T i915_gem_engines_iter_next +ffffffff81c527f0 T i915_gem_context_module_exit +ffffffff81c52810 T i915_gem_context_module_init +ffffffff81c52870 t i915_gem_context_release_work +ffffffff81c52960 t intel_context_set_gem +ffffffff81c52a90 t engines_notify +ffffffff81c52c20 t intel_context_unpin +ffffffff81c52cb0 t kill_engines +ffffffff81c52e80 t create_setparam +ffffffff81c52f00 t invalid_ext +ffffffff81c52f30 t lookup_user_engine +ffffffff81c52ff0 t set_proto_ctx_engines_balance +ffffffff81c53320 t set_proto_ctx_engines_bond +ffffffff81c53730 t set_proto_ctx_engines_parallel_submit +ffffffff81c54000 T __i915_gem_object_create_user +ffffffff81c54020 t __i915_gem_object_create_user_ext +ffffffff81c54500 T i915_gem_dumb_create +ffffffff81c54690 T i915_gem_create_ioctl +ffffffff81c54780 T i915_gem_create_ext_ioctl +ffffffff81c549a0 t ext_set_placements +ffffffff81c54e00 t ext_set_protected +ffffffff81c54e90 t ext_set_pat +ffffffff81c55000 T i915_gem_prime_export +ffffffff81c550a0 T i915_gem_prime_import +ffffffff81c56000 T i915_gem_cpu_write_needs_clflush +ffffffff81c56070 T i915_gem_object_flush_if_display +ffffffff81c562b0 t i915_gem_object_unlock +ffffffff81c56390 T i915_gem_object_flush_if_display_locked +ffffffff81c56410 T i915_gem_object_set_to_wc_domain +ffffffff81c56520 t flush_write_domain +ffffffff81c566a0 T i915_gem_object_set_to_gtt_domain +ffffffff81c56810 T i915_gem_object_set_cache_level +ffffffff81c568d0 T i915_gem_get_caching_ioctl +ffffffff81c569d0 T i915_gem_set_caching_ioctl +ffffffff81c56c50 t i915_gem_object_lock_interruptible +ffffffff81c56d90 T i915_gem_object_pin_to_display_plane +ffffffff81c57010 T i915_gem_object_set_to_cpu_domain +ffffffff81c57110 T i915_gem_set_domain_ioctl +ffffffff81c57370 T i915_gem_object_prepare_read +ffffffff81c574f0 T i915_gem_object_prepare_write +ffffffff81c58000 T i915_gem_execbuffer2_ioctl +ffffffff81c58d10 t eb_select_context +ffffffff81c58d90 t eb_select_engine +ffffffff81c59280 t eb_lookup_vmas +ffffffff81c59a50 t eb_release_vmas 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i915_gem_object_alloc +ffffffff81c621a0 T i915_gem_object_free +ffffffff81c621c0 T i915_gem_object_init +ffffffff81c62300 T __i915_gem_object_fini +ffffffff81c62320 T i915_gem_object_set_cache_coherency +ffffffff81c62440 T i915_gem_object_set_pat_index +ffffffff81c624f0 T i915_gem_object_can_bypass_llc +ffffffff81c62550 T __i915_gem_free_object_rcu +ffffffff81c625d0 T __i915_gem_object_pages_fini +ffffffff81c629a0 T __i915_gem_free_object +ffffffff81c62a60 T i915_gem_flush_free_objects +ffffffff81c62ab0 t __i915_gem_free_objects +ffffffff81c62bd0 T __i915_gem_object_flush_frontbuffer +ffffffff81c62c80 T __i915_gem_object_invalidate_frontbuffer +ffffffff81c62d30 T i915_gem_object_read_from_page +ffffffff81c62ec0 T i915_gem_object_has_struct_page +ffffffff81c62ef0 T i915_gem_object_has_iomem +ffffffff81c62f30 T i915_gem_object_evictable +ffffffff81c62ff0 T i915_gem_object_migratable +ffffffff81c63030 T i915_gem_object_can_migrate +ffffffff81c631b0 T i915_gem_object_migrate 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i915_gem_object_init_memory_region +ffffffff81c68080 T i915_gem_object_release_memory_region +ffffffff81c680e0 T i915_gem_object_create_region +ffffffff81c68100 t __i915_gem_object_create_region +ffffffff81c68290 T i915_gem_object_create_region_at +ffffffff81c68340 T i915_gem_process_region +ffffffff81c69000 T shmem_sg_free_table +ffffffff81c69100 T shmem_sg_alloc_table +ffffffff81c69280 T __shmem_writeback +ffffffff81c692a0 T __i915_gem_object_release_shmem +ffffffff81c69370 T i915_gem_object_put_pages_shmem +ffffffff81c694b0 t shmem_get_pages +ffffffff81c69650 t shmem_put_pages +ffffffff81c69690 t shmem_truncate +ffffffff81c69750 t shmem_shrink +ffffffff81c697c0 t shmem_pread +ffffffff81c69840 t shmem_pwrite +ffffffff81c69c10 t shmem_release +ffffffff81c69c60 T i915_gem_object_create_shmem +ffffffff81c69c80 T i915_gem_object_create_shmem_from_data +ffffffff81c69e10 T i915_gem_shmem_setup +ffffffff81c69e80 T i915_gem_object_is_shmem +ffffffff81c69ec0 t init_shmem +ffffffff81c69f20 t release_shmem +ffffffff81c69f70 t shmem_object_init +ffffffff81c6b000 T i915_gem_shrink +ffffffff81c6b7d0 T i915_gem_shrink_all +ffffffff81c6b870 T i915_gem_driver_register__shrinker +ffffffff81c6b930 t i915_gem_shrinker_scan +ffffffff81c6b9b0 t i915_gem_shrinker_count +ffffffff81c6ba30 T i915_gem_driver_unregister__shrinker +ffffffff81c6ba50 T i915_gem_shrinker_taints_mutex +ffffffff81c6ba80 T i915_gem_object_make_unshrinkable +ffffffff81c6bb80 T __i915_gem_object_make_shrinkable +ffffffff81c6bc80 T __i915_gem_object_make_purgeable +ffffffff81c6bd80 T i915_gem_object_make_shrinkable +ffffffff81c6be80 T i915_gem_object_make_purgeable +ffffffff81c6c000 T i915_gem_stolen_insert_node_in_range +ffffffff81c6c0f0 T i915_gem_stolen_insert_node +ffffffff81c6c1b0 T i915_gem_stolen_remove_node +ffffffff81c6c200 T i915_gem_object_create_stolen +ffffffff81c6c220 T i915_gem_stolen_lmem_setup +ffffffff81c6c620 T i915_gem_stolen_smem_setup +ffffffff81c6c6d0 T i915_gem_object_is_stolen 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intel_guc_slpc_get_max_freq +ffffffff81cf9420 t slpc_query_task_state +ffffffff81cf9520 T intel_guc_slpc_set_ignore_eff_freq +ffffffff81cf9790 T intel_guc_slpc_set_min_freq +ffffffff81cf9910 T intel_guc_slpc_get_min_freq +ffffffff81cf99d0 T intel_guc_slpc_set_media_ratio_mode +ffffffff81cf9b10 T intel_guc_pm_intrmsk_enable +ffffffff81cf9b70 T intel_guc_slpc_override_gucrc_mode +ffffffff81cf9d00 T intel_guc_slpc_unset_gucrc_mode +ffffffff81cf9e10 T intel_guc_slpc_enable +ffffffff81cfa4d0 T intel_guc_slpc_set_boost_freq +ffffffff81cfa580 t slpc_force_min_freq +ffffffff81cfa6c0 T intel_guc_slpc_dec_waiters +ffffffff81cfa710 T intel_guc_slpc_print_info +ffffffff81cfa8e0 T intel_guc_slpc_fini +ffffffff81cfb000 T intel_guc_wait_for_pending_msg +ffffffff81cfb190 T intel_guc_wait_for_idle +ffffffff81cfb1e0 T intel_guc_busyness_park +ffffffff81cfb300 T intel_guc_busyness_unpark +ffffffff81cfb3c0 t guc_update_pm_timestamp +ffffffff81cfb5b0 T intel_guc_submission_reset_prepare +ffffffff81cfbe40 t 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huc_delayed_load_timer_callback +ffffffff81d08000 T intel_huc_debugfs_register +ffffffff81d09000 T intel_huc_fw_auth_via_gsccs +ffffffff81d094c0 T intel_huc_fw_get_binary_info +ffffffff81d097d0 T intel_huc_fw_load_and_auth_via_gsc +ffffffff81d09890 T intel_huc_fw_upload +ffffffff81d0a000 T intel_uc_init_early +ffffffff81d0a190 T intel_uc_init_late +ffffffff81d0a1d0 T intel_uc_driver_late_release +ffffffff81d0a200 T intel_uc_init_mmio +ffffffff81d0a220 T intel_uc_driver_remove +ffffffff81d0a2c0 T intel_uc_reset_prepare +ffffffff81d0a340 t __uc_sanitize +ffffffff81d0a4a0 T intel_uc_reset +ffffffff81d0a4f0 T intel_uc_reset_finish +ffffffff81d0a540 T intel_uc_cancel_requests +ffffffff81d0a590 T intel_uc_runtime_suspend +ffffffff81d0a740 T intel_uc_suspend +ffffffff81d0a810 T intel_uc_resume +ffffffff81d0a8c0 T intel_uc_runtime_resume +ffffffff81d0a9b0 t guc_enable_communication +ffffffff81d0ab70 t __uc_fini +ffffffff81d0abc0 t __uc_check_hw +ffffffff81d0ac80 t __uc_fetch_firmwares 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i915_active_get +ffffffff81d118f0 T i915_active_put +ffffffff81d11960 T i915_active_create +ffffffff81d11a70 t auto_active +ffffffff81d11aa0 t auto_retire +ffffffff81d11b10 T i915_active_module_exit +ffffffff81d11b30 T i915_active_module_init +ffffffff81d11ba0 t __active_retire +ffffffff81d11de0 t barrier_wake +ffffffff81d12000 T intel_engine_init_cmd_parser +ffffffff81d12730 t gen7_render_get_cmd_length_mask +ffffffff81d127c0 t gen7_bsd_get_cmd_length_mask +ffffffff81d12870 t gen7_blt_get_cmd_length_mask +ffffffff81d128f0 t gen9_blt_get_cmd_length_mask +ffffffff81d12970 T intel_engine_cleanup_cmd_parser +ffffffff81d12a40 T intel_engine_cmd_parser +ffffffff81d13700 T i915_cmd_parser_get_version +ffffffff81d14000 T i915_fence_context_timeout +ffffffff81d15000 T i915_deps_init +ffffffff81d15070 T i915_deps_fini +ffffffff81d15100 T i915_deps_sync +ffffffff81d151c0 T i915_deps_add_dependency +ffffffff81d15490 T i915_deps_add_resv +ffffffff81d16000 T i915_print_iommu_status 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i915_gem_evict_vm +ffffffff81d20000 T i915_gem_gtt_prepare_pages +ffffffff81d20030 T i915_gem_gtt_finish_pages +ffffffff81d20090 T i915_gem_gtt_reserve +ffffffff81d20150 T i915_gem_gtt_insert +ffffffff81d21000 T i915_gem_ww_ctx_init +ffffffff81d21060 T i915_gem_ww_unlock_single +ffffffff81d211c0 T i915_gem_ww_ctx_fini +ffffffff81d21240 t i915_gem_ww_ctx_unlock_all +ffffffff81d213c0 T i915_gem_ww_ctx_backoff +ffffffff81d22000 T i915_getparam_ioctl +ffffffff81d23000 T intel_gpu_error_find_batch +ffffffff81d23070 T i915_error_printf +ffffffff81d23140 T intel_gpu_error_print_vma +ffffffff81d23170 T i915_gpu_coredump_copy_to_buffer +ffffffff81d231d0 T __i915_gpu_coredump_free +ffffffff81d233d0 T intel_engine_coredump_alloc +ffffffff81d23da0 T intel_engine_coredump_add_request +ffffffff81d240c0 T intel_engine_coredump_add_vma +ffffffff81d24240 T i915_gpu_coredump_alloc +ffffffff81d24500 T intel_gt_coredump_alloc +ffffffff81d24f30 T i915_vma_capture_prepare +ffffffff81d24fb0 T i915_vma_capture_finish +ffffffff81d25020 T i915_gpu_coredump +ffffffff81d251a0 T i915_error_state_store +ffffffff81d25360 T i915_capture_error_state +ffffffff81d25400 T i915_first_error_state +ffffffff81d25480 T i915_reset_error_state +ffffffff81d25530 T i915_disable_error_state +ffffffff81d25590 t capture_vma +ffffffff81d26000 T i915_reg_read_ioctl +ffffffff81d27000 T gen3_irq_reset +ffffffff81d27110 T gen3_assert_iir_is_zero +ffffffff81d27240 T gen3_irq_init +ffffffff81d273b0 T intel_irq_init +ffffffff81d27450 t ivb_parity_work +ffffffff81d278d0 T intel_irq_fini +ffffffff81d27920 T intel_irq_install +ffffffff81d27a40 t intel_irq_reset +ffffffff81d286c0 t intel_irq_postinstall +ffffffff81d28de0 T intel_irq_uninstall +ffffffff81d28e60 T intel_runtime_pm_disable_interrupts +ffffffff81d28ea0 T intel_synchronize_irq +ffffffff81d28ec0 T intel_runtime_pm_enable_interrupts +ffffffff81d28f00 T intel_irqs_enabled +ffffffff81d28f30 T intel_synchronize_hardirq +ffffffff81d28f50 t kasprintf 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atombios_get_encoder_mode +ffffffff81d76cd0 T atombios_dig_encoder_setup2 +ffffffff81d77160 T atombios_dig_encoder_setup +ffffffff81d77180 T atombios_dig_transmitter_setup2 +ffffffff81d77bf0 T atombios_set_edp_panel_power +ffffffff81d77d30 T radeon_atom_release_dig_encoder +ffffffff81d77d70 T radeon_atom_pick_dig_encoder +ffffffff81d77fd0 T radeon_atom_encoder_init +ffffffff81d780b0 t atombios_external_encoder_setup +ffffffff81d78370 T radeon_atom_ext_encoder_setup_ddc +ffffffff81d783d0 T radeon_enc_destroy +ffffffff81d784b0 T radeon_add_atom_encoder +ffffffff81d78960 t radeon_atombios_set_dig_info +ffffffff81d789d0 t radeon_atombios_set_dac_info +ffffffff81d78a50 t radeon_atom_backlight_update_status +ffffffff81d78ac0 t radeon_atom_encoder_dpms +ffffffff81d78da0 t radeon_atom_mode_fixup +ffffffff81d78f10 t radeon_atom_encoder_prepare +ffffffff81d794a0 t radeon_atom_encoder_commit +ffffffff81d794e0 t radeon_atom_encoder_mode_set +ffffffff81d79ad0 t radeon_atom_dig_detect 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btc_reset_to_default +ffffffff81d7c690 T btc_read_arb_registers +ffffffff81d7c730 T btc_dpm_vblank_too_short +ffffffff81d7c7b0 T btc_dpm_pre_set_power_state +ffffffff81d7da00 T btc_dpm_set_power_state +ffffffff81d7dde0 t btc_set_power_state_conditionally_enable_ulv +ffffffff81d7df60 T btc_dpm_post_set_power_state +ffffffff81d7e0a0 t btc_update_current_ps +ffffffff81d7e1b0 T btc_dpm_enable +ffffffff81d7f2a0 t btc_cg_clock_gating_enable +ffffffff81d7f3e0 t btc_mg_clock_gating_enable +ffffffff81d7f520 t btc_ls_clock_gating_enable +ffffffff81d7f660 t btc_init_stutter_mode +ffffffff81d7f6e0 T btc_dpm_disable +ffffffff81d7fa50 T btc_dpm_setup_asic +ffffffff81d7fb70 T btc_dpm_init +ffffffff81d7ffe0 T btc_dpm_fini +ffffffff81d800b0 T btc_dpm_debugfs_print_current_performance_level +ffffffff81d80110 T btc_dpm_get_current_sclk +ffffffff81d801a0 T btc_dpm_get_current_mclk +ffffffff81d80230 T btc_dpm_get_sclk +ffffffff81d802a0 T btc_dpm_get_mclk +ffffffff81d81000 T ci_dpm_powergate_uvd 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ci_patch_dependency_tables_with_leakage +ffffffff81d8b1a0 t ci_set_private_data_variables_based_on_pptable +ffffffff81d8b2b0 T ci_dpm_debugfs_print_current_performance_level +ffffffff81d8b410 T ci_dpm_print_power_state +ffffffff81d8b4f0 T ci_dpm_get_current_sclk +ffffffff81d8b5d0 T ci_dpm_get_current_mclk +ffffffff81d8b6b0 T ci_dpm_get_sclk +ffffffff81d8b700 T ci_dpm_get_mclk +ffffffff81d8b750 t ci_set_valid_flag +ffffffff81d8b7f0 t ci_populate_all_graphic_levels +ffffffff81d8bdb0 t ci_populate_all_memory_levels +ffffffff81d8c6d0 t ci_populate_smc_vce_level +ffffffff81d8c7f0 t ci_populate_smc_acp_level +ffffffff81d8c8f0 t ci_populate_smc_samu_level +ffffffff81d8c9f0 t ci_do_program_memory_timing_parameters +ffffffff81d8cc20 t ci_populate_smc_uvd_level +ffffffff81d8cd80 t ci_populate_smc_initial_state +ffffffff81d8ce20 t ci_populate_bapm_parameters_in_dpm_table +ffffffff81d8cfa0 t ci_populate_smc_voltage_table +ffffffff81d8d0c0 t ci_min_max_v_gnbl_pm_lid_from_bapm_vddc +ffffffff81d8d320 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cik_fence_compute_ring_emit +ffffffff81d90260 T cik_semaphore_ring_emit +ffffffff81d90450 T cik_copy_cpdma +ffffffff81d90940 T cik_ring_ib_execute +ffffffff81d90f50 T cik_ib_test +ffffffff81d912e0 T cik_gfx_get_rptr +ffffffff81d91340 T cik_gfx_get_wptr +ffffffff81d91380 T cik_gfx_set_wptr +ffffffff81d913c0 T cik_compute_get_rptr +ffffffff81d914b0 T cik_compute_get_wptr +ffffffff81d915a0 T cik_compute_set_wptr +ffffffff81d91620 T cik_gpu_check_soft_reset +ffffffff81d917a0 T cik_asic_reset +ffffffff81d91cf0 t cik_gpu_pci_config_reset +ffffffff81d92560 T cik_gfx_is_lockup +ffffffff81d925e0 T cik_pcie_gart_tlb_flush +ffffffff81d92630 T cik_ib_parse +ffffffff81d92660 T cik_vm_init +ffffffff81d926c0 T cik_vm_fini +ffffffff81d926f0 T cik_vm_flush +ffffffff81d934f0 T cik_enter_rlc_safe_mode +ffffffff81d93600 T cik_exit_rlc_safe_mode +ffffffff81d93640 T cik_update_cg +ffffffff81d93b90 t cik_enable_mgcg +ffffffff81d940c0 t cik_enable_cgcg +ffffffff81d94450 T cik_init_cp_pg_table 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cypress_dpm_enable +ffffffff81da9960 t cypress_force_mc_use_s1 +ffffffff81da9c30 t cypress_gfx_clock_gating_enable +ffffffff81daa010 t cypress_mg_clock_gating_enable +ffffffff81daa2f0 T cypress_dpm_disable +ffffffff81daa580 T cypress_dpm_set_power_state +ffffffff81daa880 T cypress_dpm_display_configuration_changed +ffffffff81daa960 T cypress_dpm_init +ffffffff81daac30 T cypress_dpm_fini +ffffffff81daacd0 T cypress_dpm_vblank_too_short +ffffffff81daad50 t cypress_wait_for_mc_sequencer +ffffffff81dab000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81dab080 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81dab100 T dce3_2_afmt_write_sad_regs +ffffffff81dab200 T dce3_2_audio_set_dto +ffffffff81dab340 T dce3_2_hdmi_update_acr +ffffffff81dab710 T dce3_2_set_audio_packet +ffffffff81dab8d0 T dce3_2_set_mute +ffffffff81dac000 T dce6_endpoint_rreg +ffffffff81dac100 T dce6_endpoint_wreg +ffffffff81dac210 T dce6_audio_get_pin +ffffffff81dac3a0 T dce6_afmt_select_pin +ffffffff81dac430 T dce6_afmt_write_latency_fields +ffffffff81dac4f0 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81dac5d0 T dce6_afmt_dp_write_speaker_allocation +ffffffff81dac6b0 T dce6_afmt_write_sad_regs +ffffffff81dac800 T dce6_audio_enable +ffffffff81dac850 T dce6_hdmi_audio_set_dto +ffffffff81dac8c0 T dce6_dp_audio_set_dto +ffffffff81dad000 T eg_cg_rreg +ffffffff81dad090 T eg_cg_wreg +ffffffff81dad100 T eg_pif_phy0_rreg +ffffffff81dad190 T eg_pif_phy0_wreg +ffffffff81dad200 T eg_pif_phy1_rreg +ffffffff81dad290 T eg_pif_phy1_wreg +ffffffff81dad300 T evergreen_get_allowed_info_register +ffffffff81dad390 T evergreen_tiling_fields +ffffffff81dad430 T sumo_set_uvd_clocks +ffffffff81dad520 t sumo_set_uvd_clock +ffffffff81dad780 T evergreen_set_uvd_clocks +ffffffff81dade40 T evergreen_fix_pci_max_read_req_size +ffffffff81dae040 T dce4_program_fmt +ffffffff81dae170 T dce4_wait_for_vblank +ffffffff81dae430 T evergreen_page_flip +ffffffff81dae5e0 T evergreen_page_flip_pending +ffffffff81dae660 T evergreen_get_temp +ffffffff81dae730 T sumo_get_temp +ffffffff81dae780 T sumo_pm_init_profile +ffffffff81dae8d0 T btc_pm_init_profile +ffffffff81dae9f0 T evergreen_pm_misc +ffffffff81daebb0 T evergreen_pm_prepare +ffffffff81daecd0 T evergreen_pm_finish +ffffffff81daedf0 T evergreen_hpd_sense +ffffffff81daee70 T evergreen_hpd_set_polarity +ffffffff81daefc0 T evergreen_hpd_init +ffffffff81daf0a0 T evergreen_hpd_fini +ffffffff81daf150 T evergreen_get_number_of_dram_channels +ffffffff81daf1a0 T evergreen_bandwidth_update +ffffffff81daf380 t evergreen_line_buffer_adjust +ffffffff81daf5a0 t evergreen_program_watermarks +ffffffff81db00a0 T evergreen_mc_wait_for_idle +ffffffff81db0140 T evergreen_pcie_gart_tlb_flush +ffffffff81db0220 T evergreen_mc_stop +ffffffff81db0e80 T evergreen_mc_resume +ffffffff81db1650 T evergreen_mc_program +ffffffff81db1a70 T evergreen_ring_ib_execute +ffffffff81db1f70 T evergreen_mc_init +ffffffff81db20d0 T evergreen_print_gpu_status_regs +ffffffff81db2120 T evergreen_is_display_hung +ffffffff81db2350 T evergreen_gpu_check_soft_reset +ffffffff81db24c0 T evergreen_gpu_pci_config_reset +ffffffff81db2690 T evergreen_asic_reset +ffffffff81db2a80 T evergreen_gfx_is_lockup +ffffffff81db2b00 T sumo_rlc_fini +ffffffff81db2d40 t radeon_bo_reserve +ffffffff81db2ee0 t radeon_bo_unreserve +ffffffff81db2ff0 T sumo_rlc_init +ffffffff81db38e0 T evergreen_rlc_resume +ffffffff81db3c50 T evergreen_get_vblank_counter +ffffffff81db3cc0 T evergreen_disable_interrupt_state +ffffffff81db3fc0 T evergreen_irq_set +ffffffff81db4660 T evergreen_irq_suspend +ffffffff81db46d0 T evergreen_irq_process +ffffffff81db5370 t evergreen_irq_ack +ffffffff81db5aa0 T evergreen_resume +ffffffff81db5bb0 t evergreen_init_golden_registers +ffffffff81db5e20 t evergreen_startup +ffffffff81db7870 T evergreen_suspend +ffffffff81db7a80 T evergreen_init +ffffffff81db7fc0 t evergreen_pcie_gart_fini +ffffffff81db80f0 T evergreen_fini +ffffffff81db8390 T evergreen_pcie_gen2_enable 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dce4_afmt_write_latency_fields +ffffffff81dc5340 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81dc53c0 T dce4_afmt_dp_write_speaker_allocation +ffffffff81dc5440 T evergreen_hdmi_write_sad_regs +ffffffff81dc5540 T evergreen_set_avi_packet +ffffffff81dc5700 T dce4_hdmi_audio_set_dto +ffffffff81dc57e0 T dce4_dp_audio_set_dto +ffffffff81dc58e0 T dce4_set_vbi_packet +ffffffff81dc5950 T dce4_hdmi_set_color_depth +ffffffff81dc5ac0 T dce4_set_audio_packet +ffffffff81dc5d10 T dce4_set_mute +ffffffff81dc5e20 T evergreen_hdmi_enable +ffffffff81dc61b0 T evergreen_dp_enable +ffffffff81dc7000 T kv_dpm_enable_bapm +ffffffff81dc7070 T kv_dpm_enable +ffffffff81dc8060 t kv_populate_vce_table +ffffffff81dc8300 t kv_populate_samu_table +ffffffff81dc8580 t kv_populate_acp_table +ffffffff81dc8730 t kv_start_am +ffffffff81dc8770 t kv_enable_auto_thermal_throttling +ffffffff81dc87b0 t kv_enable_dpm_voltage_scaling +ffffffff81dc87f0 t kv_set_dpm_interval +ffffffff81dc8830 t kv_start_dpm +ffffffff81dc8880 t kv_enable_didt +ffffffff81dc8b80 T kv_dpm_late_enable +ffffffff81dc8dd0 T kv_dpm_powergate_uvd +ffffffff81dc8f90 T kv_dpm_disable +ffffffff81dc9390 T kv_dpm_force_performance_level +ffffffff81dc9540 t kv_force_dpm_lowest +ffffffff81dc9620 T kv_dpm_pre_set_power_state +ffffffff81dc9ba0 T kv_dpm_set_power_state +ffffffff81dca490 t kv_set_valid_clock_range +ffffffff81dca630 t kv_calculate_ds_divider +ffffffff81dca7d0 t kv_calculate_nbps_level_settings +ffffffff81dca950 t kv_update_vce_dpm +ffffffff81dcab70 T kv_dpm_post_set_power_state +ffffffff81dcac10 T kv_dpm_setup_asic +ffffffff81dcac80 T kv_dpm_init +ffffffff81dcb580 T kv_dpm_debugfs_print_current_performance_level +ffffffff81dcb5f0 T kv_dpm_get_current_sclk +ffffffff81dcb660 T kv_dpm_get_current_mclk +ffffffff81dcb690 T kv_dpm_print_power_state +ffffffff81dcb760 T kv_dpm_fini +ffffffff81dcb810 T kv_dpm_display_configuration_changed +ffffffff81dcb840 T kv_dpm_get_sclk +ffffffff81dcb890 T kv_dpm_get_mclk +ffffffff81dcc000 T kv_notify_message_to_smu +ffffffff81dcc0c0 T kv_dpm_get_enable_mask +ffffffff81dcc1b0 T kv_send_msg_to_smc_with_parameter +ffffffff81dcc280 T kv_read_smc_sram_dword +ffffffff81dcc310 T kv_smc_dpm_enable +ffffffff81dcc450 T kv_smc_bapm_enable +ffffffff81dcc590 T kv_copy_bytes_to_smc +ffffffff81dcd000 T tn_smc_rreg +ffffffff81dcd090 T tn_smc_wreg +ffffffff81dcd100 T ni_mc_load_microcode +ffffffff81dcd2f0 T ni_init_microcode +ffffffff81dcd8c0 t request_firmware +ffffffff81dcd970 t release_firmware +ffffffff81dcd9b0 T cayman_get_allowed_info_register +ffffffff81dcda40 T tn_get_temp +ffffffff81dcdae0 T cayman_pcie_gart_tlb_flush +ffffffff81dcdb30 T cayman_cp_int_cntl_setup +ffffffff81dcdb80 T cayman_fence_ring_emit +ffffffff81dcdf70 T cayman_ring_ib_execute +ffffffff81dce440 T cayman_gfx_get_rptr +ffffffff81dce4d0 T cayman_gfx_get_wptr +ffffffff81dce540 T cayman_gfx_set_wptr +ffffffff81dce5c0 T cayman_gpu_check_soft_reset +ffffffff81dce760 T cayman_asic_reset +ffffffff81dceaf0 T cayman_gfx_is_lockup +ffffffff81dceb70 T cayman_resume +ffffffff81dcec30 t ni_init_golden_registers +ffffffff81dced20 t cayman_startup +ffffffff81dd02e0 T cayman_suspend +ffffffff81dd0520 T cayman_init +ffffffff81dd09b0 t cayman_uvd_init +ffffffff81dd0a70 t cayman_vce_init +ffffffff81dd0b50 t cayman_cp_fini +ffffffff81dd0be0 t cayman_pcie_gart_fini +ffffffff81dd0d30 T cayman_fini +ffffffff81dd1070 T cayman_vm_init +ffffffff81dd10d0 T cayman_vm_fini +ffffffff81dd1100 T cayman_vm_decode_fault +ffffffff81dd11a0 T cayman_vm_flush +ffffffff81dd1680 T tn_set_vce_clocks +ffffffff81dd1980 t cayman_uvd_start +ffffffff81dd1a60 t cayman_vce_start +ffffffff81dd1bb0 t cayman_cp_load_microcode +ffffffff81dd1d40 t cayman_cp_resume +ffffffff81dd2df0 t cayman_uvd_resume +ffffffff81dd2ed0 t cayman_vce_resume +ffffffff81dd3000 T cayman_dma_get_rptr +ffffffff81dd3070 T cayman_dma_get_wptr +ffffffff81dd30c0 T cayman_dma_set_wptr +ffffffff81dd3110 T cayman_dma_ring_ib_execute +ffffffff81dd34e0 T cayman_dma_stop +ffffffff81dd3590 T cayman_dma_resume +ffffffff81dd3800 T cayman_dma_fini +ffffffff81dd38c0 T cayman_dma_is_lockup +ffffffff81dd3950 T cayman_dma_vm_copy_pages +ffffffff81dd3a50 T cayman_dma_vm_write_pages +ffffffff81dd3bc0 T cayman_dma_vm_set_pages +ffffffff81dd3d30 T cayman_dma_vm_pad_ib +ffffffff81dd3d80 T cayman_dma_vm_flush +ffffffff81dd5000 T ni_get_pi +ffffffff81dd5030 T ni_get_ps +ffffffff81dd5060 T ni_dpm_vblank_too_short +ffffffff81dd50e0 T ni_dpm_force_performance_level +ffffffff81dd5250 T ni_copy_and_switch_arb_sets +ffffffff81dd5520 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81dd55a0 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81dd5620 T ni_dpm_setup_asic +ffffffff81dd5880 T ni_update_current_ps +ffffffff81dd5950 T ni_update_requested_ps +ffffffff81dd5a20 T ni_dpm_enable +ffffffff81dd6a20 t ni_init_smc_table +ffffffff81dd7450 t ni_init_smc_spll_table +ffffffff81dd75e0 t ni_init_arb_table_index +ffffffff81dd7690 t ni_populate_mc_reg_table +ffffffff81dd7bd0 t ni_initialize_smc_cac_tables +ffffffff81dd8ea0 t ni_initialize_hardware_cac_manager +ffffffff81dd94d0 t ni_populate_smc_tdp_limits +ffffffff81dd96b0 t ni_program_response_times +ffffffff81dd9800 T ni_dpm_disable +ffffffff81dd9c60 t ni_enable_power_containment +ffffffff81dd9d40 t ni_enable_smc_cac +ffffffff81dd9ea0 T ni_dpm_pre_set_power_state +ffffffff81dda510 T ni_dpm_set_power_state +ffffffff81dda890 t ni_upload_sw_state +ffffffff81ddb550 t ni_upload_mc_reg_table +ffffffff81ddb7d0 t ni_power_control_set_level +ffffffff81ddb8d0 T ni_dpm_post_set_power_state +ffffffff81ddb9c0 T ni_dpm_init +ffffffff81ddc420 T ni_dpm_fini +ffffffff81ddc4f0 T ni_dpm_print_power_state +ffffffff81ddc5f0 T ni_dpm_debugfs_print_current_performance_level +ffffffff81ddc630 T ni_dpm_get_current_sclk +ffffffff81ddc6a0 T ni_dpm_get_current_mclk +ffffffff81ddc710 T ni_dpm_get_sclk +ffffffff81ddc780 T ni_dpm_get_mclk +ffffffff81ddc7e0 t ni_do_program_memory_timing_parameters +ffffffff81ddc940 t ni_calculate_sclk_params +ffffffff81ddcb90 t ni_calculate_power_boost_limit +ffffffff81ddcd30 t ni_populate_mclk_value +ffffffff81dde000 T r100_wait_for_vblank +ffffffff81dde190 T r100_page_flip +ffffffff81dde4a0 T r100_page_flip_pending +ffffffff81dde570 T r100_pm_get_dynpm_state +ffffffff81dde790 T r100_pm_init_profile +ffffffff81dde870 T r100_pm_misc +ffffffff81dded10 T r100_pm_prepare +ffffffff81ddedc0 T r100_pm_finish +ffffffff81ddee70 T r100_gui_idle +ffffffff81ddeeb0 T r100_hpd_sense +ffffffff81ddef10 T r100_hpd_set_polarity +ffffffff81ddefd0 T r100_hpd_init +ffffffff81ddf080 T r100_hpd_fini +ffffffff81ddf0f0 T r100_pci_gart_tlb_flush +ffffffff81ddf120 T r100_pci_gart_init +ffffffff81ddf200 T r100_pci_gart_get_page_entry +ffffffff81ddf230 T r100_pci_gart_set_page +ffffffff81ddf270 T r100_pci_gart_enable +ffffffff81ddf360 T r100_pci_gart_disable +ffffffff81ddf3e0 T r100_pci_gart_fini +ffffffff81ddf460 T r100_irq_set +ffffffff81ddf540 T r100_irq_disable +ffffffff81ddf5c0 T r100_irq_process +ffffffff81ddf8f0 T r100_get_vblank_counter +ffffffff81ddf940 T r100_fence_ring_emit +ffffffff81ddfe10 T r100_semaphore_ring_emit +ffffffff81ddfe40 T r100_copy_blit +ffffffff81de0570 T r100_ring_start +ffffffff81de0670 T r100_gfx_get_rptr +ffffffff81de06d0 T r100_gfx_get_wptr +ffffffff81de0710 T r100_gfx_set_wptr +ffffffff81de0750 T r100_cp_init +ffffffff81de0d40 T r100_debugfs_cp_init +ffffffff81de0d70 T r100_cp_fini +ffffffff81de0e40 T r100_cp_disable +ffffffff81de0fa0 T r100_gui_wait_for_idle +ffffffff81de1090 T r100_reloc_pitch_offset +ffffffff81de1200 T r100_packet3_load_vbpntr +ffffffff81de14f0 T r100_cs_parse_packet0 +ffffffff81de1600 T r100_cs_packet_parse_vline +ffffffff81de1830 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81de18b0 T r100_cs_parse +ffffffff81de2ba0 T r100_cs_track_clear +ffffffff81de2f30 T r100_cs_track_check +ffffffff81de37f0 T r100_mc_wait_for_idle +ffffffff81de3890 T r100_gpu_is_lockup +ffffffff81de3900 T r100_enable_bm +ffffffff81de3950 T r100_bm_disable +ffffffff81de3a10 T r100_asic_reset +ffffffff81de3da0 T r100_mc_stop +ffffffff81de3f60 T r100_mc_resume +ffffffff81de4020 T r100_set_common_regs +ffffffff81de41d0 T r100_vram_init_sizes +ffffffff81de43e0 T r100_vga_set_state +ffffffff81de4440 T r100_pll_errata_after_index +ffffffff81de4480 T r100_pll_rreg +ffffffff81de45f0 T r100_pll_wreg +ffffffff81de4740 T r100_debugfs_rbbm_init +ffffffff81de4770 T r100_debugfs_mc_info_init +ffffffff81de47a0 T r100_set_surface_reg +ffffffff81de49f0 T r100_clear_surface_reg +ffffffff81de4ab0 T r100_bandwidth_update +ffffffff81de5520 T r100_ring_test +ffffffff81de5850 T r100_ring_ib_execute +ffffffff81de5ad0 T r100_ib_test +ffffffff81de5e90 T r100_vga_render_disable +ffffffff81de5ef0 T r100_resume +ffffffff81de6130 t r100_startup +ffffffff81de66f0 T r100_suspend +ffffffff81de67f0 T r100_fini +ffffffff81de6960 T r100_restore_sanity +ffffffff81de6a00 T r100_init +ffffffff81de6f40 t r100_set_safe_registers +ffffffff81de6fc0 T r100_mm_rreg_slow +ffffffff81de7050 T r100_mm_wreg_slow +ffffffff81de70c0 T r100_io_rreg +ffffffff81de7170 T r100_io_wreg +ffffffff81de71f0 t r100_get_vtx_size +ffffffff81de72e0 t r100_cs_track_texture_print +ffffffff81de8000 T r200_copy_dma +ffffffff81de84e0 T r200_packet0_check +ffffffff81de9340 t r200_get_vtx_size_0 +ffffffff81de9500 t r200_get_vtx_size_1 +ffffffff81de9590 T r200_set_safe_registers +ffffffff81dea000 T rv370_pcie_rreg +ffffffff81dea090 T rv370_pcie_wreg +ffffffff81dea100 T rv370_pcie_gart_tlb_flush +ffffffff81dea390 T rv370_pcie_gart_get_page_entry +ffffffff81dea3f0 T rv370_pcie_gart_set_page +ffffffff81dea430 T rv370_pcie_gart_init +ffffffff81dea510 T rv370_pcie_gart_enable +ffffffff81dea950 T rv370_pcie_gart_disable +ffffffff81deab40 T rv370_pcie_gart_fini +ffffffff81deab80 T r300_fence_ring_emit +ffffffff81deb190 T r300_ring_start +ffffffff81debc30 T r300_mc_wait_for_idle +ffffffff81debcd0 T r300_asic_reset +ffffffff81debf30 T r300_mc_init +ffffffff81dec000 T rv370_set_pcie_lanes +ffffffff81dec220 T rv370_get_pcie_lanes +ffffffff81dec2e0 T r300_cs_parse +ffffffff81dec6b0 t r300_packet0_check +ffffffff81ded610 T r300_set_reg_safe +ffffffff81ded650 T r300_mc_program +ffffffff81ded800 T r300_clock_startup +ffffffff81ded890 T r300_resume +ffffffff81dedab0 t r300_startup +ffffffff81dedea0 T r300_suspend +ffffffff81dedf50 T r300_fini +ffffffff81dee0b0 T r300_init +ffffffff81def000 T r420_pm_init_profile +ffffffff81def0f0 T r420_pipes_init +ffffffff81def2f0 T r420_mc_rreg +ffffffff81def380 T r420_mc_wreg +ffffffff81def400 T r420_resume +ffffffff81def620 t r420_startup +ffffffff81def8b0 T r420_suspend +ffffffff81defaa0 T r420_fini +ffffffff81defbf0 T r420_init +ffffffff81deff50 T r420_debugfs_pipes_info_init +ffffffff81deff80 t r420_cp_errata_init +ffffffff81df1000 T r520_mc_wait_for_idle +ffffffff81df10b0 T r520_resume +ffffffff81df11e0 t r520_startup +ffffffff81df16b0 T r520_init +ffffffff81df2000 T r600_rcu_rreg +ffffffff81df20a0 T r600_rcu_wreg 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r600_set_bios_scratch_engine_hung +ffffffff81df43c0 T r600_gpu_check_soft_reset +ffffffff81df4790 T r600_asic_reset +ffffffff81df4bc0 t r600_gpu_pci_config_reset +ffffffff81df4e20 T r600_gfx_is_lockup +ffffffff81df4ea0 T r6xx_remap_render_backend +ffffffff81df5070 T r600_count_pipe_bits +ffffffff81df50e0 T r600_pciep_rreg +ffffffff81df5170 T r600_pciep_wreg +ffffffff81df51e0 T r600_cp_stop +ffffffff81df5260 T r600_init_microcode +ffffffff81df5810 t request_firmware +ffffffff81df58c0 t release_firmware +ffffffff81df5900 T r600_gfx_get_rptr +ffffffff81df5960 T r600_gfx_get_wptr +ffffffff81df59a0 T r600_gfx_set_wptr +ffffffff81df59e0 T r600_cp_start +ffffffff81df5db0 T r600_cp_resume +ffffffff81df61d0 T r600_ring_init +ffffffff81df6290 T r600_cp_fini +ffffffff81df6320 T r600_scratch_init +ffffffff81df6390 T r600_ring_test +ffffffff81df66b0 T r600_fence_ring_emit +ffffffff81df7020 T r600_semaphore_ring_emit +ffffffff81df7240 T r600_copy_cpdma +ffffffff81df78b0 T r600_set_surface_reg +ffffffff81df78e0 T r600_clear_surface_reg +ffffffff81df7910 T r600_vga_set_state +ffffffff81df7970 T r600_resume +ffffffff81df7a20 t r600_startup +ffffffff81df9930 T r600_suspend +ffffffff81df9af0 T r600_irq_suspend +ffffffff81df9bd0 t r600_pcie_gart_disable +ffffffff81df9dd0 T r600_init +ffffffff81dfa6f0 T r600_ih_ring_init +ffffffff81dfa760 T r600_irq_fini +ffffffff81dfa8e0 t r600_pcie_gart_fini +ffffffff81dfa920 T r600_fini +ffffffff81dfab70 T r600_ring_ib_execute +ffffffff81dfb060 T r600_ib_test +ffffffff81dfb370 T r600_ih_ring_alloc +ffffffff81dfb4c0 T r600_ih_ring_fini +ffffffff81dfb570 T r600_rlc_stop +ffffffff81dfb780 T r600_disable_interrupts +ffffffff81dfb830 T r600_irq_init +ffffffff81dfbcd0 t r600_disable_interrupt_state +ffffffff81dfbfd0 T r600_irq_disable +ffffffff81dfc0a0 T r600_irq_set +ffffffff81dfc8a0 t r600_irq_ack +ffffffff81dfcdd0 T r600_irq_process +ffffffff81dfdb40 T r600_mmio_hdp_flush +ffffffff81dfdbc0 T r600_set_pcie_lanes +ffffffff81dfdd00 T r600_get_pcie_lanes +ffffffff81dfddf0 T r600_get_gpu_clock_counter +ffffffff81dfdea0 t r600_cp_load_microcode +ffffffff81dfe200 t r600_uvd_resume +ffffffff81dff000 T r600_fmt_is_valid_color +ffffffff81dff040 T r600_fmt_is_valid_texture +ffffffff81dff090 T r600_fmt_get_blocksize +ffffffff81dff0d0 T r600_fmt_get_nblocksx +ffffffff81dff120 T r600_fmt_get_nblocksy +ffffffff81dff180 T r600_cs_common_vline_parse +ffffffff81dff470 T r600_mip_minify +ffffffff81dff4d0 T r600_cs_parse +ffffffff81e01540 T r600_dma_cs_next_reloc +ffffffff81e015d0 T r600_dma_cs_parse +ffffffff81e01cb0 t r600_cs_track_check +ffffffff81e02e90 t r600_cs_check_reg +ffffffff81e03e70 t r600_is_safe_reg +ffffffff81e03f20 t r600_texture_size +ffffffff81e05000 T r600_dma_get_rptr +ffffffff81e05060 T r600_dma_get_wptr +ffffffff81e050a0 T r600_dma_set_wptr +ffffffff81e050e0 T r600_dma_stop +ffffffff81e05170 T r600_dma_resume +ffffffff81e05390 T r600_dma_fini +ffffffff81e05410 T r600_dma_is_lockup +ffffffff81e05490 T r600_dma_ring_test +ffffffff81e05750 T r600_dma_fence_ring_emit +ffffffff81e05960 T r600_dma_semaphore_ring_emit +ffffffff81e05aa0 T r600_dma_ib_test +ffffffff81e05d10 T r600_dma_ring_ib_execute +ffffffff81e060a0 T r600_copy_dma +ffffffff81e07000 T r600_dpm_print_class_info +ffffffff81e07340 T r600_dpm_print_cap_info +ffffffff81e073e0 T r600_dpm_print_ps_status +ffffffff81e074a0 T r600_dpm_get_vblank_time +ffffffff81e07560 T r600_dpm_get_vrefresh +ffffffff81e075f0 T r600_calculate_u_and_p +ffffffff81e07670 T r600_calculate_at +ffffffff81e07720 T r600_gfx_clockgating_enable +ffffffff81e07830 T r600_dynamicpm_enable +ffffffff81e07880 T r600_enable_thermal_protection +ffffffff81e078e0 T r600_enable_acpi_pm +ffffffff81e07930 T r600_enable_dynamic_pcie_gen2 +ffffffff81e07980 T r600_dynamicpm_enabled +ffffffff81e079c0 T r600_enable_sclk_control +ffffffff81e07a20 T r600_enable_mclk_control +ffffffff81e07a80 T r600_enable_spll_bypass +ffffffff81e07ad0 T r600_wait_for_spll_change +ffffffff81e07b60 T r600_set_bsp +ffffffff81e07ba0 T r600_set_at +ffffffff81e07c00 T r600_set_tc +ffffffff81e07c60 T r600_select_td +ffffffff81e07d10 T r600_set_vrc +ffffffff81e07d50 T r600_set_tpu +ffffffff81e07db0 T r600_set_tpc +ffffffff81e07e10 T r600_set_sstu +ffffffff81e07e70 T r600_set_sst +ffffffff81e07ec0 T r600_set_git +ffffffff81e07f10 T r600_set_fctu +ffffffff81e07f70 T r600_set_fct +ffffffff81e07fc0 T r600_set_ctxcgtt3d_rphc +ffffffff81e08020 T r600_set_ctxcgtt3d_rsdc +ffffffff81e08080 T r600_set_vddc3d_oorsu +ffffffff81e080e0 T r600_set_vddc3d_oorphc +ffffffff81e08140 T r600_set_vddc3d_oorsdc +ffffffff81e081a0 T r600_set_mpll_lock_time +ffffffff81e081f0 T r600_set_mpll_reset_time +ffffffff81e08240 T r600_engine_clock_entry_enable +ffffffff81e08340 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81e08440 T r600_engine_clock_entry_enable_post_divider +ffffffff81e08540 T r600_engine_clock_entry_set_post_divider +ffffffff81e08610 T r600_engine_clock_entry_set_reference_divider +ffffffff81e086e0 T r600_engine_clock_entry_set_feedback_divider +ffffffff81e087b0 T r600_engine_clock_entry_set_step_time +ffffffff81e08880 T r600_vid_rt_set_ssu +ffffffff81e088e0 T r600_vid_rt_set_vru +ffffffff81e08940 T r600_vid_rt_set_vrt +ffffffff81e089a0 T r600_voltage_control_enable_pins +ffffffff81e089f0 T r600_voltage_control_program_voltages +ffffffff81e08a80 T r600_voltage_control_deactivate_static_control +ffffffff81e08b10 T r600_power_level_enable +ffffffff81e08b80 T r600_power_level_set_voltage_index +ffffffff81e08bf0 T r600_power_level_set_mem_clock_index +ffffffff81e08c50 T r600_power_level_set_eng_clock_index +ffffffff81e08cc0 T r600_power_level_set_watermark_id +ffffffff81e08d30 T r600_power_level_set_pcie_gen2 +ffffffff81e08d90 T r600_power_level_get_current_index +ffffffff81e08dd0 T r600_power_level_get_target_index +ffffffff81e08e10 T r600_power_level_set_enter_index +ffffffff81e08e70 T r600_wait_for_power_level_unequal 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r600_hdmi_audio_workaround +ffffffff81e0bfa0 T r600_hdmi_audio_set_dto +ffffffff81e0c060 T r600_set_vbi_packet +ffffffff81e0c120 T r600_set_audio_packet +ffffffff81e0c460 T r600_set_mute +ffffffff81e0c570 T r600_hdmi_enable +ffffffff81e0d000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81e0d040 T radeon_acpi_pcie_notify_device_ready +ffffffff81e0d170 T radeon_acpi_pcie_performance_request +ffffffff81e0d570 T radeon_acpi_init +ffffffff81e0dde0 t radeon_acpi_event +ffffffff81e0e160 T radeon_acpi_fini +ffffffff81e0f000 T radeon_agp_head_init +ffffffff81e0f050 T radeon_agp_init +ffffffff81e0f0b0 T radeon_agp_resume +ffffffff81e0f150 T radeon_agp_fini +ffffffff81e0f1a0 T radeon_agp_suspend +ffffffff81e10000 T radeon_agp_disable +ffffffff81e10130 T radeon_asic_init +ffffffff81e10900 t radeon_invalid_rreg +ffffffff81e10940 t radeon_invalid_wreg +ffffffff81e10990 t radeon_invalid_get_allowed_info_register +ffffffff81e11000 T radeon_atombios_i2c_init +ffffffff81e113b0 T radeon_atombios_lookup_gpio +ffffffff81e114c0 T radeon_get_atom_connector_info_from_object_table +ffffffff81e11e70 t radeon_lookup_i2c_gpio +ffffffff81e12160 t radeon_atom_apply_quirks +ffffffff81e12590 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81e12af0 T radeon_atom_get_clock_info +ffffffff81e12ef0 T radeon_atombios_sideport_present +ffffffff81e12fb0 T radeon_atombios_get_tmds_info +ffffffff81e13100 T radeon_atombios_get_ppll_ss_info +ffffffff81e13230 T radeon_atombios_get_asic_ss_info +ffffffff81e13510 t radeon_atombios_get_igp_ss_overrides +ffffffff81e13630 T radeon_atombios_get_lvds_info +ffffffff81e139d0 T radeon_atombios_get_primary_dac_info +ffffffff81e13aa0 T radeon_atom_get_tv_timings +ffffffff81e13cf0 T radeon_atombios_get_tv_info +ffffffff81e13db0 T radeon_atombios_get_tv_dac_info +ffffffff81e13ed0 T radeon_atombios_get_default_voltages +ffffffff81e13f90 T radeon_atombios_get_power_modes +ffffffff81e150f0 T radeon_atom_get_clock_dividers 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+ffffffff81e16420 T radeon_atom_get_min_voltage +ffffffff81e16580 T radeon_atom_get_voltage_step +ffffffff81e166a0 T radeon_atom_round_to_true_voltage +ffffffff81e16820 T radeon_atom_get_voltage_table +ffffffff81e16ac0 T radeon_atom_get_memory_info +ffffffff81e16c80 T radeon_atom_get_mclk_range_table +ffffffff81e16ed0 T radeon_atom_init_mc_reg_table +ffffffff81e17160 T radeon_atom_initialize_bios_scratch_regs +ffffffff81e17230 T radeon_save_bios_scratch_regs +ffffffff81e17310 T radeon_restore_bios_scratch_regs +ffffffff81e173f0 T radeon_atom_output_lock +ffffffff81e17480 T radeon_atombios_connected_scratch_regs +ffffffff81e17ce0 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81e17e30 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81e18060 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81e18240 t radeon_atombios_add_pplib_thermal_controller +ffffffff81e186c0 t radeon_atombios_parse_pplib_clock_info +ffffffff81e18a80 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81e19000 T radeon_audio_init +ffffffff81e19200 t radeon_audio_enable +ffffffff81e19360 T radeon_audio_endpoint_rreg +ffffffff81e193a0 T radeon_audio_endpoint_wreg +ffffffff81e193e0 T radeon_audio_get_pin +ffffffff81e19430 T radeon_audio_detect +ffffffff81e195d0 T radeon_audio_fini +ffffffff81e19660 T radeon_audio_mode_set +ffffffff81e196b0 T radeon_audio_dpms +ffffffff81e19700 T radeon_audio_decode_dfs_div +ffffffff81e19760 T radeon_audio_component_init +ffffffff81e197d0 T radeon_audio_component_fini +ffffffff81e19820 t radeon_audio_hdmi_mode_set +ffffffff81e19f80 t radeon_audio_write_speaker_allocation +ffffffff81e1a060 t radeon_audio_write_sad_regs +ffffffff81e1a160 t radeon_audio_set_avi_packet +ffffffff81e1a2c0 t radeon_audio_dp_mode_set +ffffffff81e1a470 t radeon_audio_rreg +ffffffff81e1a4c0 t radeon_audio_wreg +ffffffff81e1b000 T radeon_benchmark +ffffffff81e1bc80 t radeon_benchmark_move +ffffffff81e1bff0 t radeon_bo_reserve +ffffffff81e1c190 t radeon_bo_unreserve +ffffffff81e1c2a0 t radeon_benchmark_do_move +ffffffff81e1d000 T radeon_get_bios +ffffffff81e1e0b0 t igp_read_bios_from_vram +ffffffff81e1e200 t radeon_read_bios +ffffffff81e1f000 T radeon_legacy_get_engine_clock +ffffffff81e1f0f0 T radeon_legacy_get_memory_clock +ffffffff81e1f1e0 T radeon_get_clock_info +ffffffff81e1f7f0 T radeon_legacy_set_engine_clock +ffffffff81e1fc30 T radeon_legacy_set_clock_gating +ffffffff81e22000 T radeon_combios_check_hardcoded_edid +ffffffff81e22120 t combios_get_table_offset +ffffffff81e22710 T radeon_bios_get_hardcoded_edid +ffffffff81e227b0 T radeon_combios_i2c_init +ffffffff81e22ea0 t combios_setup_i2c_bus +ffffffff81e23190 t radeon_combios_get_i2c_info_from_table +ffffffff81e233e0 T radeon_combios_get_clock_info +ffffffff81e235d0 T radeon_combios_sideport_present +ffffffff81e23650 T radeon_combios_get_primary_dac_info +ffffffff81e237a0 T radeon_combios_get_tv_info +ffffffff81e238b0 T radeon_combios_get_tv_dac_info +ffffffff81e23b70 T radeon_combios_get_lvds_info +ffffffff81e24220 T radeon_legacy_get_tmds_info_from_table +ffffffff81e242f0 T radeon_legacy_get_tmds_info_from_combios +ffffffff81e24520 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81e24760 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81e24ad0 T radeon_get_legacy_connector_info_from_table +ffffffff81e27060 T radeon_get_legacy_connector_info_from_bios +ffffffff81e27da0 T radeon_combios_get_power_modes +ffffffff81e284b0 T radeon_external_tmds_setup +ffffffff81e285a0 T radeon_combios_external_tmds_setup +ffffffff81e28b60 T radeon_combios_asic_init +ffffffff81e29100 t combios_parse_mmio_table +ffffffff81e29340 t combios_parse_pll_table +ffffffff81e296a0 T radeon_combios_initialize_bios_scratch_regs +ffffffff81e29730 T radeon_combios_output_lock +ffffffff81e29790 T radeon_combios_connected_scratch_regs +ffffffff81e29b80 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81e29c60 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81e2a000 T radeon_connector_hotplug +ffffffff81e2a140 T radeon_get_monitor_bpc +ffffffff81e2a610 T radeon_connector_edid +ffffffff81e2a6d0 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81e2a750 T radeon_connector_is_dp12_capable +ffffffff81e2a7f0 T radeon_add_atom_connector +ffffffff81e2b940 T radeon_add_legacy_connector +ffffffff81e2bed0 t radeon_dp_detect +ffffffff81e2c320 t radeon_dvi_force +ffffffff81e2c370 t radeon_connector_set_property +ffffffff81e2cc60 t radeon_connector_unregister +ffffffff81e2ccd0 t radeon_connector_destroy +ffffffff81e2cd60 t radeon_best_single_encoder +ffffffff81e2cdd0 t radeon_connector_get_edid +ffffffff81e2cf40 t radeon_dp_get_modes +ffffffff81e2d2d0 t radeon_dp_mode_valid +ffffffff81e2d4d0 t radeon_dvi_encoder +ffffffff81e2d590 t radeon_fixup_lvds_native_mode +ffffffff81e2d700 t radeon_add_common_modes +ffffffff81e2d800 t radeon_fp_native_mode +ffffffff81e2d8f0 t radeon_lvds_set_property +ffffffff81e2d9f0 t radeon_vga_detect +ffffffff81e2dce0 t radeon_connector_analog_encoder_conflict_solve +ffffffff81e2df30 t radeon_vga_get_modes +ffffffff81e2e020 t radeon_vga_mode_valid +ffffffff81e2e080 t radeon_dvi_detect +ffffffff81e2e7a0 t radeon_dvi_mode_valid +ffffffff81e2e940 t radeon_tv_detect +ffffffff81e2ebc0 t radeon_tv_get_modes +ffffffff81e2ecb0 t radeon_tv_mode_valid +ffffffff81e2ed00 t radeon_lvds_detect +ffffffff81e2eec0 t radeon_lvds_get_modes +ffffffff81e2f050 t radeon_lvds_mode_valid +ffffffff81e30000 T radeon_cs_parser_init +ffffffff81e304e0 T radeon_cs_ioctl +ffffffff81e30dd0 t radeon_cs_parser_fini +ffffffff81e30fb0 t radeon_cs_ib_vm_chunk +ffffffff81e31390 T radeon_cs_packet_parse +ffffffff81e31550 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81e315b0 T radeon_cs_dump_packet +ffffffff81e31630 T radeon_cs_packet_next_reloc +ffffffff81e31840 t cmp_size_smaller_first +ffffffff81e32000 T radeon_crtc_cursor_move +ffffffff81e32080 t radeon_lock_cursor +ffffffff81e32270 t radeon_cursor_move_locked +ffffffff81e32810 T radeon_crtc_cursor_set2 +ffffffff81e32b30 t radeon_hide_cursor +ffffffff81e32c00 t radeon_bo_reserve +ffffffff81e32da0 t radeon_bo_unreserve +ffffffff81e32eb0 t radeon_show_cursor +ffffffff81e33130 T radeon_cursor_reset +ffffffff81e34000 T radeon_is_px +ffffffff81e34040 T radeon_program_register_sequence +ffffffff81e34190 T radeon_pci_config_reset +ffffffff81e341c0 T radeon_surface_init +ffffffff81e343d0 T radeon_scratch_init +ffffffff81e34450 T radeon_scratch_get +ffffffff81e344d0 T radeon_scratch_free +ffffffff81e34530 T radeon_doorbell_get +ffffffff81e345e0 T radeon_doorbell_free +ffffffff81e34630 T radeon_wb_disable +ffffffff81e34660 T radeon_wb_fini +ffffffff81e34720 t radeon_bo_reserve +ffffffff81e348c0 t radeon_bo_unreserve +ffffffff81e349d0 T radeon_wb_init +ffffffff81e34d60 T radeon_vram_location +ffffffff81e34ea0 T radeon_gtt_location +ffffffff81e34fe0 T radeon_device_is_virtual +ffffffff81e35010 T radeon_card_posted +ffffffff81e35250 T radeon_update_bandwidth_info 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radeon_fbdev_robj_is_fb +ffffffff81e41250 T radeondrm_burner +ffffffff81e412e0 T radeondrm_burner_cb +ffffffff81e41310 t radeon_fbdev_fb_helper_fb_probe +ffffffff81e41980 t radeon_bo_reserve +ffffffff81e41b20 t radeon_bo_unreserve +ffffffff81e41c30 t radeon_fbdev_client_unregister +ffffffff81e41ca0 t radeon_fbdev_client_restore +ffffffff81e41cf0 t radeon_fbdev_client_hotplug +ffffffff81e42000 T radeon_fence_emit +ffffffff81e42140 T radeon_fence_process +ffffffff81e42220 t radeon_fence_activity +ffffffff81e424b0 T radeon_fence_signaled +ffffffff81e42530 t radeon_fence_seq_signaled +ffffffff81e42650 T radeon_fence_wait_timeout +ffffffff81e42790 t radeon_fence_wait_seq_timeout +ffffffff81e42c70 T radeon_fence_wait +ffffffff81e42dc0 T radeon_fence_wait_any +ffffffff81e42f10 T radeon_fence_wait_next +ffffffff81e42fe0 T radeon_fence_wait_empty +ffffffff81e43100 T radeon_fence_ref +ffffffff81e43150 T radeon_fence_unref +ffffffff81e43190 T radeon_fence_count_emitted +ffffffff81e432b0 T radeon_fence_need_sync +ffffffff81e43310 T radeon_fence_note_sync +ffffffff81e434e0 T radeon_fence_driver_start_ring +ffffffff81e436f0 T radeon_fence_driver_init +ffffffff81e43840 T radeon_debugfs_fence_init +ffffffff81e43870 T radeon_fence_driver_fini +ffffffff81e43af0 T radeon_fence_driver_force_completion +ffffffff81e43c00 t radeon_fence_get_driver_name +ffffffff81e43c30 t radeon_fence_get_timeline_name +ffffffff81e43cd0 t radeon_fence_enable_signaling +ffffffff81e43f40 t radeon_fence_is_signaled +ffffffff81e440c0 t radeon_fence_default_wait +ffffffff81e44260 t radeon_fence_any_seq_signaled +ffffffff81e443e0 t radeon_fence_check_lockup +ffffffff81e44690 t __delayed_work_tick +ffffffff81e446b0 t radeon_fence_check_signaled +ffffffff81e44760 t radeon_fence_wait_cb +ffffffff81e45000 T radeon_gart_table_ram_alloc +ffffffff81e450d0 T radeon_gart_table_ram_free +ffffffff81e45140 T radeon_gart_table_vram_alloc +ffffffff81e451c0 T radeon_gart_table_vram_pin +ffffffff81e45350 t radeon_bo_reserve +ffffffff81e454f0 t radeon_bo_unreserve +ffffffff81e45600 T radeon_gart_table_vram_unpin +ffffffff81e456a0 T radeon_gart_table_vram_free +ffffffff81e456e0 T radeon_gart_unbind +ffffffff81e45810 T radeon_gart_bind +ffffffff81e45980 T radeon_gart_init +ffffffff81e45ac0 T radeon_gart_fini +ffffffff81e46000 T radeon_gem_fault +ffffffff81e461d0 T radeon_gem_vm_reference +ffffffff81e46200 T radeon_gem_vm_detach +ffffffff81e46210 T radeon_gem_object_create +ffffffff81e46420 T radeon_gem_init +ffffffff81e46460 T radeon_gem_fini +ffffffff81e46470 t radeon_gem_object_free +ffffffff81e464c0 t radeon_gem_object_open +ffffffff81e46580 t radeon_gem_object_close +ffffffff81e46680 t radeon_gem_object_mmap +ffffffff81e46730 T radeon_gem_info_ioctl +ffffffff81e467a0 T radeon_gem_create_ioctl +ffffffff81e468f0 T radeon_gem_userptr_ioctl +ffffffff81e46920 T radeon_gem_set_domain_ioctl +ffffffff81e46ad0 T radeon_mode_dumb_mmap +ffffffff81e46ba0 T radeon_gem_mmap_ioctl +ffffffff81e46c70 T radeon_gem_busy_ioctl +ffffffff81e46d40 T radeon_gem_wait_idle_ioctl +ffffffff81e46e70 T radeon_gem_set_tiling_ioctl +ffffffff81e46f40 T radeon_gem_get_tiling_ioctl +ffffffff81e47040 t radeon_bo_reserve +ffffffff81e47280 t radeon_bo_unreserve +ffffffff81e47390 T radeon_gem_va_ioctl +ffffffff81e47690 t radeon_gem_va_update_vm +ffffffff81e47820 T radeon_gem_op_ioctl +ffffffff81e47930 T radeon_align_pitch +ffffffff81e479c0 T radeon_mode_dumb_create +ffffffff81e47b20 T radeon_gem_debugfs_init +ffffffff81e48000 T radeon_ddc_probe +ffffffff81e480d0 T radeon_router_select_ddc_port +ffffffff81e48370 T radeon_bb_set_bits +ffffffff81e48500 T radeon_bb_set_dir +ffffffff81e48530 T radeon_bb_read_bits +ffffffff81e48620 T radeon_acquire_bus +ffffffff81e48b20 T radeon_release_bus +ffffffff81e48cc0 T radeon_send_start +ffffffff81e48ce0 T radeon_send_stop +ffffffff81e48d00 T radeon_initiate_xfer +ffffffff81e48d20 T radeon_read_byte +ffffffff81e48d40 T radeon_write_byte +ffffffff81e48d60 T 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rv6xx_dpm_get_sclk +ffffffff81e85f10 T rv6xx_dpm_get_mclk +ffffffff81e85f50 T rv6xx_dpm_force_performance_level +ffffffff81e86130 t rv6xx_generate_steps +ffffffff81e86470 t rv6xx_output_stepping +ffffffff81e865b0 t rv6xx_program_mclk_stepping_entry +ffffffff81e86860 t rv6xx_program_engine_spread_spectrum +ffffffff81e86ba0 t rv6xx_step_sw_voltage +ffffffff81e87000 T rv730_populate_sclk_value +ffffffff81e87250 T rv730_populate_mclk_value +ffffffff81e874a0 T rv730_read_clock_registers +ffffffff81e875d0 T rv730_populate_smc_acpi_state +ffffffff81e877d0 T rv730_populate_smc_initial_state +ffffffff81e879d0 T rv730_program_memory_timing_parameters +ffffffff81e87bf0 T rv730_start_dpm +ffffffff81e87c80 T rv730_stop_dpm +ffffffff81e87d50 T rv730_program_dcodt +ffffffff81e87e20 T rv730_get_odt_values +ffffffff81e88000 T rv740_get_decoded_reference_divider +ffffffff81e880b0 T rv740_get_dll_speed +ffffffff81e882c0 T rv740_populate_sclk_value +ffffffff81e884e0 T rv740_populate_mclk_value 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rv770_enable_auto_throttle_source +ffffffff81e90530 T rv770_dpm_enable +ffffffff81e916e0 T rv770_dpm_late_enable +ffffffff81e91830 T rv770_dpm_disable +ffffffff81e91bd0 T rv770_dpm_set_power_state +ffffffff81e92340 t rv770_program_dcodt_after_state_switch +ffffffff81e923c0 T rv770_dpm_setup_asic +ffffffff81e92790 T rv770_dpm_display_configuration_changed +ffffffff81e92810 T rv7xx_parse_power_table +ffffffff81e92dc0 T rv770_get_engine_memory_ss +ffffffff81e92e60 T rv770_dpm_init +ffffffff81e930f0 T rv770_dpm_print_power_state +ffffffff81e93260 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81e93290 T rv770_dpm_get_current_sclk +ffffffff81e93300 T rv770_dpm_get_current_mclk +ffffffff81e93370 T rv770_dpm_fini +ffffffff81e93410 T rv770_dpm_get_sclk +ffffffff81e93460 T rv770_dpm_get_mclk +ffffffff81e934b0 T rv770_dpm_vblank_too_short +ffffffff81e93520 t rv770_convert_power_level_to_smc +ffffffff81e94000 T rv770_copy_bytes_to_smc +ffffffff81e94210 T rv770_start_smc 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si_get_ddr3_mclk_frequency_ratio +ffffffff81ea61f0 T si_get_mclk_frequency_ratio +ffffffff81ea6270 T si_trim_voltage_table_to_fit_state_table +ffffffff81ea6380 T si_dpm_setup_asic +ffffffff81ea6560 T si_fan_ctrl_get_fan_speed_percent +ffffffff81ea65f0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81ea66b0 T si_fan_ctrl_set_mode +ffffffff81ea6910 T si_fan_ctrl_get_mode +ffffffff81ea6960 T si_dpm_enable +ffffffff81ea7ee0 t si_init_smc_table +ffffffff81ea9190 t si_init_smc_spll_table +ffffffff81ea9330 t si_init_arb_table_index +ffffffff81ea93c0 t si_populate_mc_reg_table +ffffffff81ea9af0 t si_initialize_smc_cac_tables +ffffffff81eab770 t si_initialize_hardware_cac_manager +ffffffff81eab840 t si_initialize_smc_dte_tables +ffffffff81eabb60 t si_populate_smc_tdp_limits +ffffffff81eabd90 t si_populate_smc_tdp_limits_2 +ffffffff81eabe80 t si_program_response_times +ffffffff81eabfd0 t si_program_ds_registers +ffffffff81eac070 t si_dpm_start_smc +ffffffff81eac0b0 t si_enable_auto_throttle_source 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si_dpm_debugfs_print_current_performance_level +ffffffff81eb1550 T si_dpm_get_current_sclk +ffffffff81eb15d0 T si_dpm_get_current_mclk +ffffffff81eb1650 t si_do_program_memory_timing_parameters +ffffffff81eb1800 t si_populate_mvdd_value +ffffffff81eb1890 t si_convert_power_level_to_smc +ffffffff81eb2190 t si_calculate_sclk_params +ffffffff81eb23d0 t si_program_cac_config_registers +ffffffff81eb3000 T si_copy_bytes_to_smc +ffffffff81eb3260 T si_start_smc +ffffffff81eb32a0 T si_reset_smc +ffffffff81eb32f0 T si_program_jump_on_start +ffffffff81eb3320 T si_stop_smc_clock +ffffffff81eb3360 T si_start_smc_clock +ffffffff81eb33a0 T si_is_smc_running +ffffffff81eb3410 T si_send_msg_to_smc +ffffffff81eb3500 T si_wait_for_smc_inactive +ffffffff81eb35c0 T si_load_smc_ucode +ffffffff81eb3780 T si_read_smc_sram_dword +ffffffff81eb3870 T si_write_smc_sram_dword +ffffffff81eb4000 T sumo_get_pi +ffffffff81eb4030 T sumo_gfx_clockgating_initialize +ffffffff81eb4130 T sumo_program_vc +ffffffff81eb4170 T sumo_clear_vc +ffffffff81eb41b0 T sumo_program_sstp +ffffffff81eb4240 T sumo_take_smu_control +ffffffff81eb4270 T sumo_get_sleep_divider_from_id +ffffffff81eb42a0 T sumo_get_sleep_divider_id_from_clock +ffffffff81eb4350 T sumo_dpm_enable +ffffffff81eb4a40 T sumo_dpm_late_enable +ffffffff81eb5110 T sumo_dpm_disable +ffffffff81eb5480 T sumo_dpm_pre_set_power_state +ffffffff81eb5970 T sumo_dpm_set_power_state +ffffffff81eb64d0 T sumo_dpm_post_set_power_state +ffffffff81eb6570 T sumo_dpm_setup_asic +ffffffff81eb6690 T sumo_dpm_display_configuration_changed +ffffffff81eb66c0 T sumo_convert_vid2_to_vid7 +ffffffff81eb6710 T sumo_construct_sclk_voltage_mapping_table +ffffffff81eb67d0 T sumo_construct_vid_mapping_table +ffffffff81eb6960 T sumo_dpm_init +ffffffff81eb7260 T sumo_dpm_print_power_state +ffffffff81eb7390 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81eb73c0 T sumo_dpm_get_current_sclk +ffffffff81eb7430 T sumo_dpm_get_current_mclk +ffffffff81eb7460 T sumo_dpm_get_current_vddc +ffffffff81eb7530 T sumo_dpm_fini +ffffffff81eb75d0 T sumo_dpm_get_sclk +ffffffff81eb7620 T sumo_dpm_get_mclk +ffffffff81eb7650 T sumo_dpm_force_performance_level +ffffffff81eb7ad0 t sumo_power_level_enable +ffffffff81eb7d20 t sumo_program_power_level +ffffffff81eb9000 T sumo_initialize_m3_arb +ffffffff81eb93c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81eb9470 t sumo_send_msg_to_smu +ffffffff81eb9640 T sumo_smu_pg_init +ffffffff81eb9660 T sumo_enable_boost_timer +ffffffff81eb97e0 T sumo_set_tdp_limit +ffffffff81eb9860 T sumo_boost_state_enable +ffffffff81eb98b0 T sumo_get_running_fw_version +ffffffff81eba000 T trinity_dpm_enable_bapm +ffffffff81eba090 T trinity_dpm_enable +ffffffff81eba690 T trinity_dpm_late_enable +ffffffff81ebacc0 T trinity_dpm_disable +ffffffff81ebb160 T trinity_dpm_force_performance_level +ffffffff81ebb230 T trinity_dpm_pre_set_power_state +ffffffff81ebb810 T trinity_dpm_set_power_state +ffffffff81ebbe60 T trinity_dpm_post_set_power_state +ffffffff81ebbf00 T trinity_dpm_setup_asic +ffffffff81ebbf80 T trinity_dpm_display_configuration_changed +ffffffff81ebc010 T trinity_dpm_init +ffffffff81ebc970 T trinity_dpm_print_power_state +ffffffff81ebcac0 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81ebcb50 T trinity_dpm_get_current_sclk +ffffffff81ebcbb0 T trinity_dpm_get_current_mclk +ffffffff81ebcbe0 T trinity_dpm_fini +ffffffff81ebcca0 T trinity_dpm_get_sclk +ffffffff81ebccf0 T trinity_dpm_get_mclk +ffffffff81ebcd20 t trinity_program_power_level +ffffffff81ebe000 T trinity_dpm_bapm_enable +ffffffff81ebe170 T trinity_dpm_config +ffffffff81ebe270 T trinity_dpm_force_state +ffffffff81ebe370 T trinity_dpm_n_levels_disabled +ffffffff81ebe470 T trinity_uvd_dpm_config +ffffffff81ebe550 T trinity_dpm_no_forced_level +ffffffff81ebe630 T trinity_dce_enable_voltage_adjustment +ffffffff81ebe7a0 T trinity_gfx_dynamic_mgpg_config +ffffffff81ebe880 T trinity_acquire_mutex +ffffffff81ebe920 T trinity_release_mutex +ffffffff81ebf000 T uvd_v1_0_get_rptr +ffffffff81ebf040 T uvd_v1_0_get_wptr +ffffffff81ebf080 T uvd_v1_0_set_wptr +ffffffff81ebf0c0 T uvd_v1_0_fence_emit +ffffffff81ebf500 T uvd_v1_0_resume +ffffffff81ebf660 T uvd_v1_0_init +ffffffff81ebfc60 T uvd_v1_0_start +ffffffff81ec0600 T uvd_v1_0_fini +ffffffff81ec07b0 T uvd_v1_0_stop +ffffffff81ec0950 T uvd_v1_0_ring_test +ffffffff81ec0b50 T uvd_v1_0_semaphore_emit +ffffffff81ec0b80 T uvd_v1_0_ib_execute +ffffffff81ec0d30 T uvd_v1_0_ib_test +ffffffff81ec1000 T uvd_v2_2_fence_emit +ffffffff81ec14d0 T uvd_v2_2_semaphore_emit +ffffffff81ec1700 T uvd_v2_2_resume +ffffffff81ec2000 T uvd_v3_1_semaphore_emit +ffffffff81ec3000 T uvd_v4_2_resume +ffffffff81ec4000 T vce_v1_0_get_rptr +ffffffff81ec4090 T vce_v1_0_get_wptr +ffffffff81ec4120 T vce_v1_0_set_wptr +ffffffff81ec41b0 T vce_v1_0_enable_mgcg +ffffffff81ec44b0 T vce_v1_0_load_fw +ffffffff81ec4680 T vce_v1_0_bo_size +ffffffff81ec46f0 T vce_v1_0_resume +ffffffff81ec5220 T vce_v1_0_start +ffffffff81ec5b40 T vce_v1_0_init +ffffffff81ec6000 T vce_v2_0_enable_mgcg +ffffffff81ec6070 t vce_v2_0_set_dyn_cg +ffffffff81ec6280 T vce_v2_0_bo_size +ffffffff81ec62f0 T vce_v2_0_resume +ffffffff81ec7000 T aldebaran_reset_init +ffffffff81ec70e0 t aldebaran_async_reset +ffffffff81ec7140 t aldebaran_get_reset_handler +ffffffff81ec71e0 T aldebaran_reset_fini +ffffffff81ec7240 t aldebaran_mode2_prepare_hwcontext +ffffffff81ec7380 t aldebaran_mode2_perform_reset +ffffffff81ec7590 t aldebaran_mode2_restore_hwcontext +ffffffff81ec7c20 t aldebaran_mode2_reset +ffffffff81ec8000 T aldebaran_reg_base_init +ffffffff81ec9000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81ec9040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81ec9070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81ec9190 T amdgpu_acpi_pcie_performance_request +ffffffff81ec9580 T amdgpu_acpi_power_shift_control +ffffffff81ec96f0 T amdgpu_acpi_smart_shift_update +ffffffff81ec97a0 T amdgpu_acpi_get_tmr_info +ffffffff81ec9830 T amdgpu_acpi_get_mem_info +ffffffff81ec98f0 T amdgpu_acpi_init +ffffffff81ec99b0 t amdgpu_acpi_event +ffffffff81ec9d30 T amdgpu_acpi_get_backlight_caps +ffffffff81ec9d80 T amdgpu_acpi_fini +ffffffff81ec9da0 T amdgpu_acpi_should_gpu_reset +ffffffff81ec9e00 T amdgpu_acpi_is_s3_active +ffffffff81ec9e40 T amdgpu_acpi_detect +ffffffff81eca900 T amdgpu_acpi_release +ffffffff81ecaaa0 T amdgpu_acpi_is_s0ix_active +ffffffff81ecaaf0 T amdgpu_choose_low_power_state +ffffffff81ecb000 T amdgpu_afmt_acr +ffffffff81ecc000 T amdgpu_amdkfd_init +ffffffff81ecc040 T amdgpu_amdkfd_fini +ffffffff81ecc070 T amdgpu_amdkfd_device_probe +ffffffff81ecc0a0 T amdgpu_amdkfd_device_init +ffffffff81ecc260 t amdgpu_amdkfd_reset_work +ffffffff81ecc2f0 T amdgpu_amdkfd_device_fini_sw +ffffffff81ecc340 T amdgpu_amdkfd_interrupt +ffffffff81ecc370 T amdgpu_amdkfd_suspend +ffffffff81ecc3a0 T amdgpu_amdkfd_resume +ffffffff81ecc3d0 T amdgpu_amdkfd_pre_reset +ffffffff81ecc400 T amdgpu_amdkfd_post_reset +ffffffff81ecc430 T amdgpu_amdkfd_gpu_reset +ffffffff81ecc4a0 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81ecc7c0 t amdgpu_bo_reserve +ffffffff81ecc950 t amdgpu_bo_unreserve +ffffffff81ecca60 T amdgpu_amdkfd_free_gtt_mem +ffffffff81eccb00 T amdgpu_amdkfd_alloc_gws +ffffffff81eccc00 T amdgpu_amdkfd_free_gws +ffffffff81eccc50 T amdgpu_amdkfd_get_fw_version +ffffffff81eccd00 T amdgpu_amdkfd_get_local_mem_info +ffffffff81ecceb0 T amdgpu_amdkfd_xcp_memory_size +ffffffff81eccf50 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81eccf90 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81ecd000 T amdgpu_amdkfd_get_cu_info +ffffffff81ecd120 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81ecd270 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81ecd2f0 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81ecd390 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81ecd510 T amdgpu_amdkfd_submit_ib +ffffffff81ecd6b0 T amdgpu_amdkfd_set_compute_idle +ffffffff81ecd700 T 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gfx_v10_0_ring_emit_cntxcntl +ffffffff81fa1380 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81fa1490 t gfx_v10_0_ring_soft_recovery +ffffffff81fa1500 t gfx_v10_0_ring_preempt_ib +ffffffff81fa16b0 t gfx_v10_0_emit_mem_sync +ffffffff81fa1a20 t gfx_v10_0_write_data_to_reg +ffffffff81fa1c50 t gfx_v10_0_set_eop_interrupt_state +ffffffff81fa1d50 t gfx_v10_0_eop_irq +ffffffff81fa1f30 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81fa20f0 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81fa22d0 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81fa2640 t gfx_v10_0_kiq_irq +ffffffff81fa26d0 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81fa2820 t gfx_v10_0_priv_reg_irq +ffffffff81fa2890 t gfx_v10_0_handle_priv_fault +ffffffff81fa2a00 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81fa2b50 t gfx_v10_0_priv_inst_irq +ffffffff81fa2bc0 t gfx_v10_0_is_rlc_enabled +ffffffff81fa2c60 t gfx_v10_0_set_safe_mode +ffffffff81fa2f60 t gfx_v10_0_unset_safe_mode +ffffffff81fa3010 t gfx_v10_0_rlc_init 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gfx_v10_0_get_rb_active_bitmap +ffffffff81fa99d0 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81fa9af0 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81fa9c00 t gfx_v10_0_cp_gfx_enable +ffffffff81fa9ea0 t gfx_v10_0_cp_compute_enable +ffffffff81faa060 t amdgpu_bo_reserve +ffffffff81faa200 t gfx_v10_0_kiq_init_register +ffffffff81fab2f0 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81fab3f0 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81fab720 t gfx_v10_0_cp_gfx_start +ffffffff81fac210 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81fac5a0 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81facda0 t gfx_v10_0_update_3d_clock_gating +ffffffff81fad1d0 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81fad600 t gfx_v10_cntl_pg +ffffffff81fae000 t gfx_v11_0_early_init +ffffffff81fae870 t gfx_v11_0_late_init +ffffffff81fae8e0 t gfx_v11_0_sw_init +ffffffff81faeee0 t gfx_v11_0_sw_fini +ffffffff81faf190 t gfx_v11_0_hw_init +ffffffff81fb3d20 t gfx_v11_0_hw_fini +ffffffff81fb3e80 t gfx_v11_0_suspend +ffffffff81fb3ec0 t gfx_v11_0_resume +ffffffff81fb3ed0 t gfx_v11_0_is_idle +ffffffff81fb3f70 t gfx_v11_0_wait_for_idle +ffffffff81fb4080 t gfx_v11_0_check_soft_reset +ffffffff81fb41c0 t gfx_v11_0_soft_reset +ffffffff81fb5090 t gfx_v11_0_post_soft_reset +ffffffff81fb50a0 t gfx_v11_0_set_clockgating_state +ffffffff81fb5e00 t gfx_v11_0_set_powergating_state +ffffffff81fb5eb0 t gfx_v11_0_get_clockgating_state +ffffffff81fb60a0 t gfx_v11_0_get_gpu_clock_counter +ffffffff81fb6490 t gfx_v11_0_select_se_sh +ffffffff81fb6530 t gfx_v11_0_read_wave_data +ffffffff81fb6800 t gfx_v11_0_read_wave_vgprs +ffffffff81fb6830 t gfx_v11_0_read_wave_sgprs +ffffffff81fb68b0 t gfx_v11_0_select_me_pipe_q +ffffffff81fb68d0 t gfx_v11_0_update_perf_clk +ffffffff81fb6a10 t gfx_v11_0_get_gfx_shadow_info +ffffffff81fb6a80 t wave_read_ind +ffffffff81fb6b80 t wave_read_regs +ffffffff81fb6d00 t gfx11_kiq_set_resources +ffffffff81fb7060 t gfx11_kiq_map_queues +ffffffff81fb7440 t gfx11_kiq_unmap_queues +ffffffff81fb7880 t gfx11_kiq_query_status +ffffffff81fb7ba0 t gfx11_kiq_invalidate_tlbs +ffffffff81fb7cd0 t gfx_v11_0_ring_get_rptr_compute +ffffffff81fb7d00 t gfx_v11_0_ring_get_wptr_compute +ffffffff81fb7d70 t gfx_v11_0_ring_set_wptr_compute +ffffffff81fb7ed0 t gfx_v11_0_ring_emit_ib_compute +ffffffff81fb8250 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81fb86d0 t gfx_v11_0_ring_test_ring +ffffffff81fb89a0 t gfx_v11_0_ring_test_ib +ffffffff81fb8ca0 t gfx_v11_0_ring_emit_rreg +ffffffff81fb8f60 t gfx_v11_0_ring_emit_wreg +ffffffff81fb91c0 t gfx_v11_0_ring_emit_reg_wait +ffffffff81fb9220 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81fb9290 t gfx_v11_0_wait_reg_mem +ffffffff81fb95f0 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81fb9620 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81fb9740 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81fb9980 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81fba080 t gfx_v11_0_ring_emit_fence +ffffffff81fba490 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81fba500 t gfx_v11_0_ring_emit_vm_flush +ffffffff81fba6f0 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81fba7e0 t gfx_v11_0_ring_emit_gds_switch +ffffffff81fba8e0 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81fbab30 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81fbabf0 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81fbad70 t gfx_v11_0_ring_emit_gfx_shadow +ffffffff81fbb180 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81fbb290 t gfx_v11_0_ring_soft_recovery +ffffffff81fbb300 t gfx_v11_0_ring_preempt_ib +ffffffff81fbb4b0 t gfx_v11_0_emit_mem_sync +ffffffff81fbb820 t gfx_v11_0_write_data_to_reg +ffffffff81fbba50 t gfx_v11_0_set_eop_interrupt_state +ffffffff81fbbaf0 t gfx_v11_0_eop_irq +ffffffff81fbbcd0 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81fbbe90 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81fbc040 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81fbc190 t gfx_v11_0_priv_reg_irq +ffffffff81fbc200 t gfx_v11_0_handle_priv_fault +ffffffff81fbc370 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81fbc4c0 t gfx_v11_0_priv_inst_irq +ffffffff81fbc530 t gfx_v11_0_rlc_gc_fed_irq +ffffffff81fbc580 t gfx_v11_0_is_rlc_enabled +ffffffff81fbc620 t gfx_v11_0_set_safe_mode +ffffffff81fbc7a0 t gfx_v11_0_unset_safe_mode +ffffffff81fbc810 t gfx_v11_0_rlc_init +ffffffff81fbc890 t gfx_v11_0_get_csb_size +ffffffff81fbc8c0 t gfx_v11_0_get_csb_buffer +ffffffff81fbca30 t gfx_v11_0_rlc_resume +ffffffff81fbd8e0 t gfx_v11_0_rlc_stop +ffffffff81fbd9c0 t gfx_v11_0_rlc_reset +ffffffff81fbdbb0 t gfx_v11_0_rlc_start +ffffffff81fbdda0 t gfx_v11_0_update_spm_vmid +ffffffff81fbdec0 t gfx_v11_0_init_csb +ffffffff81fbe080 t gfx_v11_0_gfx_mqd_init +ffffffff81fbe4b0 t gfx_v11_0_compute_mqd_init +ffffffff81fbea50 t gfx_v11_0_mec_init +ffffffff81fbebe0 t gfx_v11_0_compute_ring_init +ffffffff81fbed40 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff81fbef40 t gfx_v11_0_gpu_early_init +ffffffff81fbf010 t amdgpu_bo_unreserve +ffffffff81fbf120 t gfx_v11_0_disable_gpa_mode +ffffffff81fbf2e0 t gfx_v11_0_cp_resume +ffffffff81fc3a40 t gfx_v11_0_config_me_cache +ffffffff81fc3e60 t gfx_v11_0_config_pfp_cache +ffffffff81fc4280 t gfx_v11_0_config_mec_cache +ffffffff81fc46a0 t gfx_v11_0_get_sa_active_bitmap +ffffffff81fc47d0 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81fc48e0 t gfx_v11_0_cp_compute_enable +ffffffff81fc4ae0 t gfx_v11_0_cp_gfx_enable +ffffffff81fc4d10 t amdgpu_bo_reserve +ffffffff81fc4eb0 t gfx_v11_0_kiq_init_register +ffffffff81fc5fb0 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81fc60a0 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81fc62b0 t gfx_v11_0_cp_gfx_start +ffffffff81fc6c00 t gfx_v11_cntl_pg +ffffffff81fc7000 t gfx_v11_0_3_rlc_gc_fed_irq +ffffffff81fc7240 t gfx_v11_0_3_poison_consumption_handler +ffffffff81fc8000 t gfx_v8_0_early_init +ffffffff81fc8310 t gfx_v8_0_late_init +ffffffff81fc8ad0 t gfx_v8_0_sw_init +ffffffff81fc8f30 t gfx_v8_0_sw_fini +ffffffff81fc9140 t gfx_v8_0_hw_init +ffffffff81fcb720 t gfx_v8_0_hw_fini +ffffffff81fcbcb0 t gfx_v8_0_suspend +ffffffff81fcbcf0 t gfx_v8_0_resume +ffffffff81fcbd00 t gfx_v8_0_is_idle +ffffffff81fcbd80 t gfx_v8_0_wait_for_idle +ffffffff81fcbe50 t gfx_v8_0_check_soft_reset +ffffffff81fcbf50 t gfx_v8_0_pre_soft_reset +ffffffff81fcc110 t gfx_v8_0_soft_reset +ffffffff81fcc360 t gfx_v8_0_post_soft_reset +ffffffff81fcc550 t gfx_v8_0_set_clockgating_state +ffffffff81fcc830 t gfx_v8_0_set_powergating_state +ffffffff81fccce0 t gfx_v8_0_get_clockgating_state +ffffffff81fccdf0 t gfx_v8_0_get_gpu_clock_counter +ffffffff81fcceb0 t gfx_v8_0_select_se_sh +ffffffff81fccf10 t gfx_v8_0_read_wave_data +ffffffff81fcd510 t gfx_v8_0_read_wave_sgprs +ffffffff81fcd5e0 t gfx_v8_0_select_me_pipe_q +ffffffff81fcd600 t gfx_v8_0_ring_get_rptr +ffffffff81fcd630 t gfx_v8_0_ring_get_wptr_compute +ffffffff81fcd660 t gfx_v8_0_ring_set_wptr_compute +ffffffff81fcd6a0 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81fcdb10 t gfx_v8_0_ring_test_ring +ffffffff81fcdd50 t gfx_v8_0_ring_emit_rreg +ffffffff81fce010 t gfx_v8_0_ring_emit_wreg +ffffffff81fce270 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81fce2d0 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81fce350 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81fce910 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81fcee60 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81fcf180 t gfx_v8_0_ring_emit_vm_flush +ffffffff81fcf580 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81fcf8d0 t gfx_v8_0_ring_emit_gds_switch +ffffffff81fd0130 t gfx_v8_0_ring_test_ib +ffffffff81fd0320 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81fd0570 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81fd0620 t gfx_v8_ring_emit_sb +ffffffff81fd0710 t gfx_v8_ring_emit_cntxcntl +ffffffff81fd0d10 t gfx_v8_0_ring_soft_recovery +ffffffff81fd0d40 t gfx_v8_0_emit_mem_sync +ffffffff81fd0f60 t gfx_v8_0_ring_emit_ib_compute +ffffffff81fd12a0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81fd15d0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81fd18c0 t gfx_v8_0_emit_wave_limit +ffffffff81fd1a90 t gfx_v8_0_set_eop_interrupt_state +ffffffff81fd1d10 t gfx_v8_0_eop_irq +ffffffff81fd1e40 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81fd1ed0 t gfx_v8_0_priv_reg_irq +ffffffff81fd1ff0 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81fd2080 t gfx_v8_0_priv_inst_irq +ffffffff81fd21a0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81fd24e0 t gfx_v8_0_cp_ecc_error_irq +ffffffff81fd2530 t gfx_v8_0_set_sq_int_state +ffffffff81fd25c0 t gfx_v8_0_sq_irq +ffffffff81fd2640 t gfx_v8_0_parse_sq_irq +ffffffff81fd28c0 t gfx_v8_0_is_rlc_enabled +ffffffff81fd2910 t gfx_v8_0_set_safe_mode +ffffffff81fd2a40 t gfx_v8_0_unset_safe_mode +ffffffff81fd2b00 t gfx_v8_0_rlc_init +ffffffff81fd2bc0 t gfx_v8_0_get_csb_size +ffffffff81fd2bf0 t gfx_v8_0_get_csb_buffer +ffffffff81fd2d60 t gfx_v8_0_cp_jump_table_num +ffffffff81fd2da0 t gfx_v8_0_rlc_resume +ffffffff81fd3250 t gfx_v8_0_rlc_stop +ffffffff81fd32e0 t gfx_v8_0_rlc_reset +ffffffff81fd3390 t gfx_v8_0_rlc_start +ffffffff81fd3430 t gfx_v8_0_update_spm_vmid +ffffffff81fd34c0 t gfx_v8_0_init_save_restore_list +ffffffff81fd39a0 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81fd3c10 t gfx_v8_0_sq_irq_work_func +ffffffff81fd3c30 t gfx_v8_0_init_microcode +ffffffff81fd45c0 t gfx_v8_0_mec_init +ffffffff81fd46f0 t gfx_v8_0_compute_ring_init +ffffffff81fd4840 t gfx_v8_0_gpu_early_init +ffffffff81fd4d10 t amdgpu_bo_unreserve +ffffffff81fd4e20 t gfx_v8_0_kiq_resume +ffffffff81fd5170 t gfx_v8_0_cp_gfx_resume +ffffffff81fd5db0 t gfx_v8_0_kcq_resume +ffffffff81fd68c0 t amdgpu_bo_reserve +ffffffff81fd6a60 t gfx_v8_0_mqd_commit +ffffffff81fd6cd0 t gfx_v8_0_mqd_init +ffffffff81fd71e0 t gfx_v8_0_deactivate_hqd +ffffffff81fd72e0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81fd76f0 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81fd8000 t gfx_v9_0_ras_error_inject +ffffffff81fd81e0 t gfx_v9_0_query_ras_error_count +ffffffff81fd8f10 t gfx_v9_0_reset_ras_error_count +ffffffff81fd9ab0 T gfx_v9_0_select_se_sh +ffffffff81fd9b50 t gfx_v9_0_early_init +ffffffff81fda790 t gfx_v9_0_late_init +ffffffff81fdb770 t gfx_v9_0_sw_init +ffffffff81fdbf50 t gfx_v9_0_sw_fini +ffffffff81fdc1b0 t gfx_v9_0_hw_init +ffffffff81fdf720 t gfx_v9_0_hw_fini +ffffffff81fdffe0 t gfx_v9_0_suspend +ffffffff81fe0020 t gfx_v9_0_resume +ffffffff81fe0030 t gfx_v9_0_is_idle +ffffffff81fe00d0 t gfx_v9_0_wait_for_idle +ffffffff81fe01d0 t gfx_v9_0_soft_reset +ffffffff81fe05e0 t gfx_v9_0_set_clockgating_state +ffffffff81fe06e0 t gfx_v9_0_set_powergating_state +ffffffff81fe0b40 t gfx_v9_0_get_clockgating_state +ffffffff81fe0c80 t gfx_v9_0_get_gpu_clock_counter +ffffffff81fe1560 t gfx_v9_0_read_wave_data +ffffffff81fe1830 t gfx_v9_0_read_wave_vgprs +ffffffff81fe18a0 t gfx_v9_0_read_wave_sgprs +ffffffff81fe18d0 t gfx_v9_0_select_me_pipe_q +ffffffff81fe18f0 t wave_read_ind +ffffffff81fe1a00 t wave_read_regs +ffffffff81fe1b70 t gfx_v9_0_kiq_set_resources +ffffffff81fe1ed0 t gfx_v9_0_kiq_map_queues +ffffffff81fe2250 t gfx_v9_0_kiq_unmap_queues +ffffffff81fe25c0 t gfx_v9_0_kiq_query_status +ffffffff81fe28e0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81fe2a10 t gfx_v9_0_ring_get_rptr_compute +ffffffff81fe2a40 t gfx_v9_0_ring_get_wptr_compute +ffffffff81fe2ab0 t gfx_v9_0_ring_set_wptr_compute +ffffffff81fe2b10 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81fe2f90 t gfx_v9_0_ring_test_ring +ffffffff81fe3200 t gfx_v9_0_ring_emit_rreg +ffffffff81fe34c0 t gfx_v9_0_ring_emit_wreg +ffffffff81fe3720 t gfx_v9_0_ring_emit_reg_wait +ffffffff81fe3780 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81fe3820 t gfx_v9_0_wait_reg_mem +ffffffff81fe3b80 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81fe3bb0 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81fe3cd0 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81fe3e10 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81fe4500 t gfx_v9_0_ring_emit_fence +ffffffff81fe4900 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81fe4970 t gfx_v9_0_ring_emit_vm_flush +ffffffff81fe4a90 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81fe4b80 t gfx_v9_0_ring_emit_gds_switch +ffffffff81fe4c80 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81fe4ed0 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81fe4f90 t gfx_v9_ring_emit_sb +ffffffff81fe5080 t gfx_v9_ring_emit_cntxcntl +ffffffff81fe55c0 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81fe56d0 t gfx_v9_0_ring_soft_recovery +ffffffff81fe5740 t gfx_v9_0_ring_preempt_ib +ffffffff81fe5970 t gfx_v9_0_emit_mem_sync +ffffffff81fe5c60 t gfx_v9_0_write_data_to_reg +ffffffff81fe5e90 t gfx_v9_0_ring_test_ib +ffffffff81fe6080 t gfx_v9_0_ring_patch_cntl +ffffffff81fe60c0 t gfx_v9_0_ring_patch_ce_meta +ffffffff81fe61d0 t gfx_v9_0_ring_patch_de_meta +ffffffff81fe62a0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81fe6600 t gfx_v9_0_emit_wave_limit +ffffffff81fe6800 t gfx_v9_0_set_eop_interrupt_state +ffffffff81fe6a00 t gfx_v9_0_eop_irq +ffffffff81fe6b70 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81fe6d50 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81fe6ea0 t gfx_v9_0_priv_reg_irq +ffffffff81fe6fc0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81fe7110 t gfx_v9_0_priv_inst_irq +ffffffff81fe7230 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81fe7c20 t gfx_v9_0_is_rlc_enabled +ffffffff81fe7cc0 t gfx_v9_0_set_safe_mode +ffffffff81fe7e40 t gfx_v9_0_unset_safe_mode +ffffffff81fe7eb0 t gfx_v9_0_rlc_init +ffffffff81fe7f30 t gfx_v9_0_get_csb_size +ffffffff81fe7f60 t gfx_v9_0_get_csb_buffer +ffffffff81fe80a0 t gfx_v9_0_cp_jump_table_num +ffffffff81fe80f0 t gfx_v9_0_rlc_resume +ffffffff81fe9b20 t gfx_v9_0_rlc_stop +ffffffff81fe9f40 t gfx_v9_0_rlc_reset +ffffffff81fea120 t gfx_v9_0_rlc_start +ffffffff81fea2a0 t gfx_v9_0_update_spm_vmid +ffffffff81fea2f0 t gfx_v9_0_is_rlcg_access_range +ffffffff81fea340 t gfx_v9_0_init_csb +ffffffff81fea500 t gfx_v9_0_enable_lbpw +ffffffff81fea610 t gfx_v9_0_update_spm_vmid_internal +ffffffff81fea740 t gfx_v9_0_init_always_on_cu_mask +ffffffff81feaa00 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81feab10 t gfx_v9_0_mec_init +ffffffff81fead70 t gfx_v9_0_compute_ring_init +ffffffff81feaed0 t gfx_v9_0_gpu_early_init +ffffffff81feb330 t amdgpu_bo_unreserve +ffffffff81feb440 t gfx_v9_0_cp_gfx_enable +ffffffff81feb540 t amdgpu_bo_reserve +ffffffff81feb6e0 t gfx_v9_0_kiq_init_register +ffffffff81fec550 t gfx_v9_0_mqd_init +ffffffff81fecb20 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81fed0d0 t gfx_v9_0_update_3d_clock_gating +ffffffff81fed530 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81fee000 t gfx_v9_4_query_ras_error_count +ffffffff81feeef0 t gfx_v9_4_query_ras_error_status +ffffffff81fef0f0 t gfx_v9_4_reset_ras_error_count +ffffffff81ff0000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81ff0890 T gfx_v9_4_2_init_golden_registers +ffffffff81ff0930 T gfx_v9_4_2_debug_trap_config_init +ffffffff81ff0a50 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81ff0c70 t gfx_v9_4_2_query_ras_error_count +ffffffff81ff0d40 t gfx_v9_4_2_query_ras_error_status +ffffffff81ff16e0 t gfx_v9_4_2_reset_ras_error_count +ffffffff81ff1750 t gfx_v9_4_2_reset_ras_error_status +ffffffff81ff1cb0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81ff1f10 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81ff1fb0 t gfx_v9_4_2_run_shader +ffffffff81ff23e0 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81ff2ac0 t gfx_v9_4_2_query_sram_edc_count +ffffffff81ff2e30 t gfx_v9_4_2_query_utc_edc_count +ffffffff81ff3020 t wave_read_ind +ffffffff81ff4000 t gfx_v9_4_3_xcp_suspend +ffffffff81ff40b0 t gfx_v9_4_3_xcp_resume +ffffffff81ff4250 t gfx_v9_4_3_query_ras_error_count +ffffffff81ff4270 t gfx_v9_4_3_query_ras_error_status +ffffffff81ff4290 t gfx_v9_4_3_reset_ras_error_count +ffffffff81ff42b0 t gfx_v9_4_3_reset_ras_error_status +ffffffff81ff42d0 t gfx_v9_4_3_enable_watchdog_timer +ffffffff81ff42f0 t gfx_v9_4_3_early_init +ffffffff81ff4a60 t gfx_v9_4_3_late_init +ffffffff81ff4af0 t gfx_v9_4_3_sw_init +ffffffff81ff4fe0 t gfx_v9_4_3_sw_fini +ffffffff81ff5210 t gfx_v9_4_3_hw_init +ffffffff81ff6090 t gfx_v9_4_3_hw_fini +ffffffff81ff6170 t gfx_v9_4_3_suspend +ffffffff81ff6250 t gfx_v9_4_3_resume +ffffffff81ff6260 t gfx_v9_4_3_is_idle +ffffffff81ff6450 t gfx_v9_4_3_wait_for_idle +ffffffff81ff64f0 t gfx_v9_4_3_soft_reset +ffffffff81ff6d30 t gfx_v9_4_3_set_clockgating_state +ffffffff81ff6ef0 t gfx_v9_4_3_set_powergating_state +ffffffff81ff6f20 t gfx_v9_4_3_get_clockgating_state +ffffffff81ff70d0 t gfx_v9_4_3_kiq_set_resources +ffffffff81ff7430 t gfx_v9_4_3_kiq_map_queues +ffffffff81ff77d0 t gfx_v9_4_3_kiq_unmap_queues +ffffffff81ff7b90 t gfx_v9_4_3_kiq_query_status +ffffffff81ff7eb0 t gfx_v9_4_3_kiq_invalidate_tlbs +ffffffff81ff7fe0 t gfx_v9_4_3_ring_get_rptr_compute +ffffffff81ff8020 t gfx_v9_4_3_ring_get_wptr_compute +ffffffff81ff8090 t gfx_v9_4_3_ring_set_wptr_compute +ffffffff81ff80f0 t gfx_v9_4_3_ring_emit_fence_kiq +ffffffff81ff8590 t gfx_v9_4_3_ring_test_ring +ffffffff81ff8830 t gfx_v9_4_3_ring_emit_rreg +ffffffff81ff8af0 t gfx_v9_4_3_ring_emit_wreg +ffffffff81ff8d50 t gfx_v9_4_3_ring_emit_reg_wait +ffffffff81ff8db0 t gfx_v9_4_3_ring_emit_reg_write_reg_wait +ffffffff81ff8dd0 t gfx_v9_4_3_wait_reg_mem +ffffffff81ff9130 t gfx_v9_4_3_ring_emit_ib_compute +ffffffff81ff9490 t gfx_v9_4_3_ring_emit_fence +ffffffff81ff9880 t gfx_v9_4_3_ring_emit_pipeline_sync +ffffffff81ff98f0 t gfx_v9_4_3_ring_emit_vm_flush +ffffffff81ff9910 t gfx_v9_4_3_ring_emit_hdp_flush +ffffffff81ff9a00 t gfx_v9_4_3_ring_emit_gds_switch +ffffffff81ff9be0 t gfx_v9_4_3_ring_test_ib +ffffffff81ff9dd0 t gfx_v9_4_3_emit_mem_sync +ffffffff81ffa0c0 t gfx_v9_4_3_emit_wave_limit +ffffffff81ffa2d0 t gfx_v9_4_3_write_data_to_reg +ffffffff81ffa500 t gfx_v9_4_3_set_eop_interrupt_state +ffffffff81ffa680 t gfx_v9_4_3_eop_irq +ffffffff81ffa830 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state +ffffffff81ffa9b0 t gfx_v9_4_3_ih_to_xcc_inst +ffffffff81ffaa90 t gfx_v9_4_3_set_priv_reg_fault_state +ffffffff81ffaef0 t gfx_v9_4_3_priv_reg_irq +ffffffff81ffaf60 t gfx_v9_4_3_fault +ffffffff81ffb0e0 t gfx_v9_4_3_set_priv_inst_fault_state +ffffffff81ffb540 t gfx_v9_4_3_priv_inst_irq +ffffffff81ffb5b0 t gfx_v9_4_3_is_rlc_enabled +ffffffff81ffb700 t gfx_v9_4_3_xcc_set_safe_mode +ffffffff81ffba10 t gfx_v9_4_3_xcc_unset_safe_mode +ffffffff81ffbb50 t gfx_v9_4_3_rlc_init +ffffffff81ffbbb0 t gfx_v9_4_3_rlc_resume +ffffffff81ffbc70 t gfx_v9_4_3_rlc_stop +ffffffff81ffbd20 t gfx_v9_4_3_rlc_reset +ffffffff81ffc4a0 t gfx_v9_4_3_rlc_start +ffffffff81ffc550 t gfx_v9_4_3_update_spm_vmid +ffffffff81ffc7b0 t gfx_v9_4_3_is_rlcg_access_range +ffffffff81ffc880 t gfx_v9_4_3_xcc_rlc_resume +ffffffff81ffd240 t gfx_v9_4_3_xcc_rlc_stop +ffffffff81ffdaa0 t gfx_v9_4_3_xcc_rlc_start +ffffffff81ffdeb0 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt +ffffffff81ffe110 t gfx_v9_4_3_xcc_select_se_sh +ffffffff81ffe340 t gfx_v9_4_3_mec_init +ffffffff81ffe6b0 t gfx_v9_4_3_gpu_early_init +ffffffff81ffe900 t amdgpu_bo_unreserve +ffffffff81ffea10 t gfx_v9_4_3_get_gpu_clock_counter +ffffffff81ffede0 t gfx_v9_4_3_read_wave_data +ffffffff81fff140 t gfx_v9_4_3_read_wave_vgprs +ffffffff81fff160 t gfx_v9_4_3_read_wave_sgprs +ffffffff81fff1c0 t gfx_v9_4_3_select_me_pipe_q +ffffffff81fff240 t gfx_v9_4_3_switch_compute_partition +ffffffff81fff5f0 t wave_read_ind +ffffffff81fff830 t wave_read_regs +ffffffff81fffb10 t gfx_v9_4_3_xcc_constants_init +ffffffff82000e80 t gfx_v9_4_3_xcc_cp_resume +ffffffff82002120 t gfx_v9_4_3_xcc_cp_compute_enable +ffffffff82002300 t amdgpu_bo_reserve +ffffffff820024a0 t gfx_v9_4_3_xcc_kiq_init_register +ffffffff82004540 t gfx_v9_4_3_xcc_mqd_init +ffffffff820050e0 t gfx_v9_4_3_xcc_fini +ffffffff82005760 t gfx_v9_4_3_xcc_q_fini_register +ffffffff820062c0 t gfx_v9_4_3_xcc_update_sram_fgcg +ffffffff82006570 t gfx_v9_4_3_xcc_update_repeater_fgcg +ffffffff82006820 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating +ffffffff82007510 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating +ffffffff82007ea0 t gfx_v9_4_3_inst_query_ras_err_count +ffffffff82008150 t gfx_v9_4_3_inst_query_ras_err_status +ffffffff82009140 t gfx_v9_4_3_inst_reset_ras_err_count +ffffffff82009330 t gfx_v9_4_3_inst_reset_ras_err_status +ffffffff82009bd0 t gfx_v9_4_3_inst_enable_watchdog_timer +ffffffff8200a000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff8200a0a0 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff8200a1f0 t gfxhub_v1_0_gart_enable +ffffffff8200b9c0 t gfxhub_v1_0_gart_disable +ffffffff8200bcb0 t gfxhub_v1_0_set_fault_enable_default +ffffffff8200bdb0 t gfxhub_v1_0_init +ffffffff8200c000 T gfxhub_v1_1_get_xgmi_info +ffffffff8200d000 t gfxhub_v1_2_get_mc_fb_offset +ffffffff8200d150 t gfxhub_v1_2_setup_vm_pt_regs +ffffffff8200d1c0 t gfxhub_v1_2_gart_enable +ffffffff8200d250 t gfxhub_v1_2_gart_disable +ffffffff8200d2b0 t gfxhub_v1_2_set_fault_enable_default +ffffffff8200d320 t gfxhub_v1_2_init +ffffffff8200d680 t gfxhub_v1_2_get_xgmi_info +ffffffff8200d930 t gfxhub_v1_2_xcp_suspend +ffffffff8200d980 t gfxhub_v1_2_xcp_resume +ffffffff8200da00 t gfxhub_v1_2_xcc_setup_vm_pt_regs +ffffffff8200dd60 t gfxhub_v1_2_xcc_gart_enable +ffffffff820119d0 t gfxhub_v1_2_xcc_gart_disable +ffffffff82012130 t gfxhub_v1_2_xcc_set_fault_enable_default +ffffffff82013000 t gfxhub_v2_0_get_fb_location +ffffffff820130a0 t gfxhub_v2_0_get_mc_fb_offset +ffffffff82013140 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff82013290 t gfxhub_v2_0_gart_enable +ffffffff82014730 t gfxhub_v2_0_gart_disable +ffffffff820149a0 t gfxhub_v2_0_set_fault_enable_default +ffffffff82014aa0 t gfxhub_v2_0_init +ffffffff82014b70 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff82014d90 t gfxhub_v2_0_get_invalidate_req +ffffffff82015000 t gfxhub_v2_1_get_fb_location +ffffffff820150a0 t gfxhub_v2_1_get_mc_fb_offset +ffffffff82015140 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff82015290 t gfxhub_v2_1_gart_enable +ffffffff82016830 t gfxhub_v2_1_gart_disable +ffffffff82016aa0 t gfxhub_v2_1_set_fault_enable_default +ffffffff82016bc0 t gfxhub_v2_1_init +ffffffff82016c90 t gfxhub_v2_1_get_xgmi_info +ffffffff82016df0 t gfxhub_v2_1_utcl2_harvest +ffffffff82016fe0 t gfxhub_v2_1_save_regs +ffffffff82017b30 t gfxhub_v2_1_restore_regs +ffffffff82018900 t gfxhub_v2_1_halt +ffffffff82018d50 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff82018f70 t gfxhub_v2_1_get_invalidate_req +ffffffff82019000 t gfxhub_v3_0_get_fb_location +ffffffff820190a0 t gfxhub_v3_0_get_mc_fb_offset +ffffffff82019140 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff82019290 t gfxhub_v3_0_gart_enable +ffffffff8201a830 t gfxhub_v3_0_gart_disable +ffffffff8201ab10 t gfxhub_v3_0_set_fault_enable_default +ffffffff8201ad00 t gfxhub_v3_0_init +ffffffff8201add0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff8201aff0 t gfxhub_v3_0_get_invalidate_req +ffffffff8201c000 t gfxhub_v3_0_3_get_fb_location +ffffffff8201c0a0 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff8201c140 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff8201c290 t gfxhub_v3_0_3_gart_enable +ffffffff8201d6f0 t gfxhub_v3_0_3_gart_disable +ffffffff8201d9f0 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff8201db10 t gfxhub_v3_0_3_init +ffffffff8201dbe0 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff8201de00 t gfxhub_v3_0_3_get_invalidate_req +ffffffff8201e000 t gmc_v10_0_early_init +ffffffff8201e170 t gmc_v10_0_late_init +ffffffff8201e1f0 t gmc_v10_0_sw_init +ffffffff8201e690 t gmc_v10_0_sw_fini +ffffffff8201e710 t gmc_v10_0_hw_init +ffffffff8201e990 t gmc_v10_0_hw_fini +ffffffff8201ea80 t gmc_v10_0_suspend +ffffffff8201eac0 t gmc_v10_0_resume +ffffffff8201eb20 t gmc_v10_0_is_idle +ffffffff8201eb50 t gmc_v10_0_wait_for_idle +ffffffff8201eb80 t gmc_v10_0_soft_reset +ffffffff8201ebb0 t gmc_v10_0_set_clockgating_state +ffffffff8201ec70 t gmc_v10_0_set_powergating_state +ffffffff8201eca0 t gmc_v10_0_get_clockgating_state +ffffffff8201ed50 t gmc_v10_0_flush_gpu_tlb +ffffffff8201f060 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff8201f380 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff8201f560 t gmc_v10_0_emit_pasid_mapping +ffffffff8201f5e0 t gmc_v10_0_map_mtype +ffffffff8201f630 t gmc_v10_0_get_vm_pde +ffffffff8201f730 t gmc_v10_0_get_vm_pte +ffffffff8201f810 t gmc_v10_0_get_vbios_fb_size +ffffffff8201f9a0 t gmc_v10_0_flush_vm_hub +ffffffff8201fe40 t gmc_v10_0_vm_fault_interrupt_state +ffffffff8201fef0 t gmc_v10_0_process_interrupt +ffffffff82020220 t gmc_v10_0_ecc_interrupt_state +ffffffff82020250 t gmc_v10_0_gart_init +ffffffff82021000 t gmc_v11_0_early_init +ffffffff820211f0 t gmc_v11_0_late_init +ffffffff82021270 t gmc_v11_0_sw_init +ffffffff82021630 t gmc_v11_0_sw_fini +ffffffff820216b0 t gmc_v11_0_hw_init +ffffffff82021860 t gmc_v11_0_hw_fini +ffffffff82021920 t gmc_v11_0_suspend +ffffffff820219e0 t gmc_v11_0_resume +ffffffff82021a40 t gmc_v11_0_is_idle +ffffffff82021a70 t gmc_v11_0_wait_for_idle +ffffffff82021aa0 t gmc_v11_0_soft_reset +ffffffff82021ad0 t gmc_v11_0_set_clockgating_state +ffffffff82021b50 t gmc_v11_0_set_powergating_state +ffffffff82021b80 t gmc_v11_0_get_clockgating_state +ffffffff82021bc0 t gmc_v11_0_flush_gpu_tlb +ffffffff820220f0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff820223c0 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff820225a0 t gmc_v11_0_emit_pasid_mapping +ffffffff82022620 t gmc_v11_0_map_mtype +ffffffff82022670 t gmc_v11_0_get_vm_pde +ffffffff82022770 t gmc_v11_0_get_vm_pte +ffffffff82022850 t gmc_v11_0_get_vbios_fb_size +ffffffff820229e0 t gmc_v11_0_vm_fault_interrupt_state +ffffffff82022a90 t gmc_v11_0_process_interrupt +ffffffff82022cf0 t gmc_v11_0_ecc_interrupt_state +ffffffff82022d20 t gmc_v11_0_gart_init +ffffffff82023000 t gmc_v7_0_early_init +ffffffff820230a0 t gmc_v7_0_late_init +ffffffff820230f0 t gmc_v7_0_sw_init +ffffffff82023610 t gmc_v7_0_sw_fini +ffffffff820236c0 t gmc_v7_0_hw_init +ffffffff82024350 t gmc_v7_0_hw_fini +ffffffff82024460 t gmc_v7_0_suspend +ffffffff820244a0 t gmc_v7_0_resume +ffffffff82024500 t gmc_v7_0_is_idle +ffffffff82024550 t gmc_v7_0_wait_for_idle +ffffffff82024600 t gmc_v7_0_soft_reset +ffffffff82024910 t gmc_v7_0_set_clockgating_state +ffffffff82024bb0 t gmc_v7_0_set_powergating_state +ffffffff82024be0 t gmc_v7_0_flush_gpu_tlb +ffffffff82024c10 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff82024cf0 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff82024da0 t gmc_v7_0_emit_pasid_mapping +ffffffff82024dd0 t gmc_v7_0_set_prt +ffffffff82024ff0 t gmc_v7_0_get_vm_pde +ffffffff82025050 t gmc_v7_0_get_vm_pte +ffffffff82025090 t gmc_v7_0_get_vbios_fb_size +ffffffff82025110 t gmc_v7_0_vm_fault_interrupt_state +ffffffff82025210 t gmc_v7_0_process_interrupt +ffffffff82025520 t gmc_v7_0_gart_init +ffffffff82026000 t gmc_v8_0_early_init +ffffffff820260a0 t gmc_v8_0_late_init +ffffffff820260f0 t gmc_v8_0_sw_init +ffffffff820267b0 t gmc_v8_0_sw_fini +ffffffff82026860 t gmc_v8_0_hw_init +ffffffff82027890 t gmc_v8_0_hw_fini +ffffffff820279a0 t gmc_v8_0_suspend +ffffffff820279e0 t gmc_v8_0_resume +ffffffff82027a40 t gmc_v8_0_is_idle +ffffffff82027a90 t gmc_v8_0_wait_for_idle +ffffffff82027b40 t gmc_v8_0_check_soft_reset +ffffffff82027bc0 t gmc_v8_0_pre_soft_reset +ffffffff82027d70 t gmc_v8_0_soft_reset +ffffffff82027e70 t gmc_v8_0_post_soft_reset +ffffffff82027f00 t gmc_v8_0_set_clockgating_state +ffffffff82028730 t gmc_v8_0_set_powergating_state +ffffffff82028760 t gmc_v8_0_get_clockgating_state +ffffffff820287d0 t gmc_v8_0_flush_gpu_tlb +ffffffff82028800 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff820288e0 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff82028990 t gmc_v8_0_emit_pasid_mapping +ffffffff820289c0 t gmc_v8_0_set_prt +ffffffff82028be0 t gmc_v8_0_get_vm_pde +ffffffff82028c40 t gmc_v8_0_get_vm_pte +ffffffff82028c90 t gmc_v8_0_get_vbios_fb_size +ffffffff82028d10 t gmc_v8_0_vm_fault_interrupt_state +ffffffff82028e10 t gmc_v8_0_process_interrupt +ffffffff82029230 t gmc_v8_0_gart_init +ffffffff8202a000 T gmc_v9_0_restore_registers +ffffffff8202a170 t gmc_v9_0_early_init +ffffffff8202a540 t gmc_v9_0_late_init +ffffffff8202a670 t gmc_v9_0_sw_init +ffffffff8202aee0 t gmc_v9_0_sw_fini +ffffffff8202afe0 t gmc_v9_0_hw_init +ffffffff8202b560 t gmc_v9_0_hw_fini +ffffffff8202b660 t gmc_v9_0_suspend +ffffffff8202b6a0 t gmc_v9_0_resume +ffffffff8202b700 t gmc_v9_0_is_idle +ffffffff8202b730 t gmc_v9_0_wait_for_idle +ffffffff8202b760 t gmc_v9_0_soft_reset +ffffffff8202b790 t gmc_v9_0_set_clockgating_state +ffffffff8202b800 t gmc_v9_0_set_powergating_state +ffffffff8202b830 t gmc_v9_0_get_clockgating_state +ffffffff8202b870 t gmc_v9_0_flush_gpu_tlb +ffffffff8202bfa0 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff8202c3e0 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff8202c610 t gmc_v9_0_emit_pasid_mapping +ffffffff8202c690 t gmc_v9_0_map_mtype +ffffffff8202c6d0 t gmc_v9_0_get_vm_pde +ffffffff8202c7e0 t gmc_v9_0_get_vm_pte +ffffffff8202cb20 t gmc_v9_0_override_vm_pte_flags +ffffffff8202cbe0 t gmc_v9_0_get_vbios_fb_size +ffffffff8202cd90 t gmc_v9_0_query_memory_partition +ffffffff8202cdf0 t gmc_v9_0_vm_fault_interrupt_state +ffffffff8202d2d0 t gmc_v9_0_process_interrupt +ffffffff8202dba0 t gmc_v9_0_ecc_interrupt_state +ffffffff8202dd50 t gmc_v9_0_init_mem_ranges +ffffffff8202e1c0 t gmc_v9_0_gart_init +ffffffff8202e330 t gmc_v9_0_save_registers +ffffffff8202f000 t hdp_v4_0_query_ras_error_count +ffffffff8202f0d0 t hdp_v4_0_reset_ras_error_count +ffffffff8202f200 t hdp_v4_0_flush_hdp +ffffffff8202f250 t hdp_v4_0_invalidate_hdp +ffffffff8202f330 t hdp_v4_0_update_clock_gating +ffffffff8202f440 t hdp_v4_0_get_clockgating_state +ffffffff8202f4a0 t hdp_v4_0_init_registers +ffffffff82030000 t hdp_v5_0_flush_hdp +ffffffff82030050 t hdp_v5_0_invalidate_hdp +ffffffff820300f0 t hdp_v5_0_update_clock_gating +ffffffff82030530 t hdp_v5_0_get_clockgating_state +ffffffff82030670 t hdp_v5_0_init_registers +ffffffff82031000 t hdp_v5_2_flush_hdp +ffffffff82031050 t hdp_v5_2_update_clock_gating +ffffffff820314a0 t hdp_v5_2_get_clockgating_state +ffffffff82032000 t hdp_v6_0_flush_hdp +ffffffff82032050 t hdp_v6_0_update_clock_gating +ffffffff820323b0 t hdp_v6_0_get_clockgating_state +ffffffff82033000 t iceland_ih_early_init +ffffffff82033050 t iceland_ih_sw_init +ffffffff820330c0 t iceland_ih_sw_fini +ffffffff82033120 t iceland_ih_hw_init +ffffffff82033410 t iceland_ih_hw_fini +ffffffff82033520 t iceland_ih_suspend +ffffffff82033630 t iceland_ih_resume +ffffffff82033670 t iceland_ih_is_idle +ffffffff820336c0 t iceland_ih_wait_for_idle +ffffffff82033770 t iceland_ih_soft_reset +ffffffff82033890 t iceland_ih_set_clockgating_state +ffffffff820338c0 t iceland_ih_set_powergating_state +ffffffff820338f0 t iceland_ih_get_wptr +ffffffff82033a20 t iceland_ih_decode_iv +ffffffff82033aa0 t iceland_ih_set_rptr +ffffffff82034000 t ih_v6_0_early_init +ffffffff82034050 t ih_v6_0_sw_init +ffffffff820341d0 t ih_v6_0_sw_fini +ffffffff82034210 t ih_v6_0_hw_init +ffffffff820348a0 t ih_v6_0_hw_fini +ffffffff82034910 t ih_v6_0_suspend +ffffffff82034980 t ih_v6_0_resume +ffffffff82034990 t ih_v6_0_is_idle +ffffffff820349c0 t ih_v6_0_wait_for_idle +ffffffff820349f0 t ih_v6_0_soft_reset +ffffffff82034a20 t ih_v6_0_set_clockgating_state +ffffffff82034b60 t ih_v6_0_set_powergating_state +ffffffff82034d00 t ih_v6_0_get_clockgating_state +ffffffff82034da0 t ih_v6_0_get_wptr +ffffffff82034ee0 t ih_v6_0_set_rptr +ffffffff82034fc0 t ih_v6_0_self_irq +ffffffff82035030 t ih_v6_0_toggle_interrupts +ffffffff82035290 t force_update_wptr_for_self_int +ffffffff82036000 t ih_v6_1_early_init +ffffffff82036050 t ih_v6_1_sw_init +ffffffff820361d0 t ih_v6_1_sw_fini +ffffffff82036210 t ih_v6_1_hw_init +ffffffff820368a0 t ih_v6_1_hw_fini +ffffffff82036910 t ih_v6_1_suspend +ffffffff82036980 t ih_v6_1_resume +ffffffff82036990 t ih_v6_1_is_idle +ffffffff820369c0 t ih_v6_1_wait_for_idle +ffffffff820369f0 t ih_v6_1_soft_reset +ffffffff82036a20 t ih_v6_1_set_clockgating_state +ffffffff82036b60 t ih_v6_1_set_powergating_state +ffffffff82036d00 t ih_v6_1_get_clockgating_state +ffffffff82036da0 t ih_v6_1_get_wptr +ffffffff82036ee0 t ih_v6_1_set_rptr +ffffffff82036fc0 t ih_v6_1_self_irq +ffffffff82037030 t ih_v6_1_toggle_interrupts +ffffffff82037250 t force_update_wptr_for_self_int +ffffffff82038000 t imu_v11_0_init_microcode +ffffffff820381b0 t imu_v11_0_load_microcode +ffffffff82038580 t imu_v11_0_setup +ffffffff82038860 t imu_v11_0_start +ffffffff82038980 t imu_v11_0_program_rlc_ram +ffffffff82038b60 t imu_v11_0_wait_for_reset_status +ffffffff82038ce0 t program_imu_rlc_ram +ffffffff8203a000 T imu_v11_0_3_program_rlc_ram +ffffffff8203b000 T jpeg_v1_0_early_init +ffffffff8203b080 T jpeg_v1_0_sw_init +ffffffff8203b190 T jpeg_v1_0_sw_fini +ffffffff8203b1b0 T jpeg_v1_0_start +ffffffff8203bcf0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff8203bd80 t jpeg_v1_0_decode_ring_get_wptr +ffffffff8203be10 t jpeg_v1_0_decode_ring_set_wptr +ffffffff8203be80 t jpeg_v1_dec_ring_parse_cs +ffffffff8203bff0 t jpeg_v1_0_decode_ring_emit_ib +ffffffff8203ca10 t jpeg_v1_0_decode_ring_emit_fence +ffffffff8203d460 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff8203d4d0 t jpeg_v1_0_decode_ring_nop +ffffffff8203d630 t jpeg_v1_0_decode_ring_insert_start +ffffffff8203d810 t jpeg_v1_0_decode_ring_insert_end +ffffffff8203d9f0 t jpeg_v1_0_ring_begin_use +ffffffff8203db20 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff8203ddb0 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff8203e210 t jpeg_v1_0_set_interrupt_state +ffffffff8203e240 t jpeg_v1_0_process_interrupt +ffffffff8203f000 T jpeg_v2_0_dec_ring_insert_start +ffffffff8203f1c0 T jpeg_v2_0_dec_ring_insert_end +ffffffff8203f380 T jpeg_v2_0_dec_ring_emit_fence +ffffffff8203faf0 T jpeg_v2_0_dec_ring_emit_ib +ffffffff82040380 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff82040780 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff820407f0 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff82040a50 T jpeg_v2_0_dec_ring_nop +ffffffff82040bb0 t jpeg_v2_0_early_init +ffffffff82040c40 t jpeg_v2_0_sw_init +ffffffff82040d90 t jpeg_v2_0_sw_fini +ffffffff82040df0 t jpeg_v2_0_hw_init +ffffffff82040e80 t jpeg_v2_0_hw_fini +ffffffff82040f70 t jpeg_v2_0_suspend +ffffffff82040fa0 t jpeg_v2_0_resume +ffffffff82041050 t jpeg_v2_0_is_idle +ffffffff820410f0 t jpeg_v2_0_wait_for_idle +ffffffff82041130 t jpeg_v2_0_set_clockgating_state +ffffffff820411f0 t jpeg_v2_0_set_powergating_state +ffffffff82041a60 t jpeg_v2_0_dec_ring_get_rptr +ffffffff82041af0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff82041ba0 t jpeg_v2_0_dec_ring_set_wptr +ffffffff82041c40 t jpeg_v2_0_set_interrupt_state +ffffffff82041c70 t jpeg_v2_0_process_interrupt +ffffffff82041d10 t jpeg_v2_0_enable_clock_gating +ffffffff82041ee0 t jpeg_v2_0_disable_clock_gating +ffffffff82043000 t jpeg_v2_6_query_ras_poison_status +ffffffff82043160 t jpeg_v2_5_early_init +ffffffff82043380 t jpeg_v2_5_sw_init +ffffffff82043660 t jpeg_v2_5_sw_fini +ffffffff820436c0 t jpeg_v2_5_hw_init +ffffffff820437c0 t jpeg_v2_5_hw_fini +ffffffff82043980 t jpeg_v2_5_suspend +ffffffff820439b0 t jpeg_v2_5_resume +ffffffff82043ad0 t jpeg_v2_5_is_idle +ffffffff82043be0 t jpeg_v2_5_wait_for_idle +ffffffff82043ca0 t jpeg_v2_5_set_clockgating_state +ffffffff82043d60 t jpeg_v2_5_set_powergating_state +ffffffff820445c0 t jpeg_v2_5_dec_ring_get_rptr +ffffffff82044660 t jpeg_v2_5_dec_ring_get_wptr +ffffffff82044710 t jpeg_v2_5_dec_ring_set_wptr +ffffffff820447c0 t jpeg_v2_6_dec_ring_insert_start +ffffffff820449a0 t jpeg_v2_6_dec_ring_insert_end +ffffffff82044b80 t jpeg_v2_5_set_interrupt_state +ffffffff82044bb0 t jpeg_v2_5_process_interrupt +ffffffff82044c90 t jpeg_v2_6_set_ras_interrupt_state +ffffffff82044cc0 t jpeg_v2_5_enable_clock_gating +ffffffff82044da0 t jpeg_v2_5_disable_clock_gating +ffffffff82046000 t jpeg_v3_0_early_init +ffffffff82046120 t jpeg_v3_0_sw_init +ffffffff82046270 t jpeg_v3_0_sw_fini +ffffffff820462d0 t jpeg_v3_0_hw_init +ffffffff82046360 t jpeg_v3_0_hw_fini +ffffffff82046450 t jpeg_v3_0_suspend +ffffffff82046480 t jpeg_v3_0_resume +ffffffff82046530 t jpeg_v3_0_is_idle +ffffffff820465d0 t jpeg_v3_0_wait_for_idle +ffffffff82046610 t jpeg_v3_0_set_clockgating_state +ffffffff820466d0 t jpeg_v3_0_set_powergating_state +ffffffff82047020 t jpeg_v3_0_dec_ring_get_rptr +ffffffff820470b0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff82047160 t jpeg_v3_0_dec_ring_set_wptr +ffffffff82047200 t jpeg_v3_0_set_interrupt_state +ffffffff82047230 t jpeg_v3_0_process_interrupt +ffffffff820472d0 t jpeg_v3_0_enable_clock_gating +ffffffff820473b0 t jpeg_v3_0_disable_clock_gating +ffffffff82048000 t jpeg_v4_0_query_ras_poison_status +ffffffff82048160 t jpeg_v4_0_early_init +ffffffff82048240 t jpeg_v4_0_sw_init +ffffffff82048410 t jpeg_v4_0_sw_fini +ffffffff82048470 t jpeg_v4_0_hw_init +ffffffff82048b60 t jpeg_v4_0_hw_fini +ffffffff82048c60 t jpeg_v4_0_suspend +ffffffff82048c90 t jpeg_v4_0_resume +ffffffff82048cf0 t jpeg_v4_0_is_idle +ffffffff82048d90 t jpeg_v4_0_wait_for_idle +ffffffff82048dd0 t jpeg_v4_0_set_clockgating_state +ffffffff82048ea0 t jpeg_v4_0_set_powergating_state +ffffffff82049760 t jpeg_v4_0_dec_ring_get_rptr +ffffffff820497f0 t jpeg_v4_0_dec_ring_get_wptr +ffffffff820498a0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff82049940 t jpeg_v4_0_set_interrupt_state +ffffffff82049970 t jpeg_v4_0_process_interrupt +ffffffff82049a20 t jpeg_v4_0_set_ras_interrupt_state +ffffffff82049a50 t jpeg_v4_0_enable_clock_gating +ffffffff82049c30 t jpeg_v4_0_disable_clock_gating +ffffffff8204a000 T jpeg_v4_0_3_dec_ring_parse_cs +ffffffff8204a180 t jpeg_v4_0_3_early_init +ffffffff8204a300 t jpeg_v4_0_3_sw_init +ffffffff8204a680 t jpeg_v4_0_3_sw_fini +ffffffff8204a6e0 t jpeg_v4_0_3_hw_init +ffffffff8204b220 t jpeg_v4_0_3_hw_fini +ffffffff8204b2d0 t jpeg_v4_0_3_suspend +ffffffff8204b370 t jpeg_v4_0_3_resume +ffffffff8204b3d0 t jpeg_v4_0_3_is_idle +ffffffff8204b5e0 t jpeg_v4_0_3_wait_for_idle +ffffffff8204b750 t jpeg_v4_0_3_set_clockgating_state +ffffffff8204b7f0 t jpeg_v4_0_3_set_powergating_state +ffffffff8204c5d0 t jpeg_v4_0_3_dec_ring_get_rptr +ffffffff8204c770 t jpeg_v4_0_3_dec_ring_get_wptr +ffffffff8204c930 t jpeg_v4_0_3_dec_ring_set_wptr +ffffffff8204cae0 t jpeg_v4_0_3_dec_ring_emit_ib +ffffffff8204d440 t jpeg_v4_0_3_dec_ring_emit_fence +ffffffff8204dc90 t jpeg_v4_0_3_dec_ring_emit_vm_flush +ffffffff8204dd00 t jpeg_v4_0_3_dec_ring_nop +ffffffff8204de60 t jpeg_v4_0_3_dec_ring_insert_start +ffffffff8204e020 t jpeg_v4_0_3_dec_ring_insert_end +ffffffff8204e1e0 t jpeg_v4_0_3_dec_ring_emit_wreg +ffffffff8204e440 t jpeg_v4_0_3_dec_ring_emit_reg_wait +ffffffff8204e840 t jpeg_v4_0_3_set_interrupt_state +ffffffff8204e870 t jpeg_v4_0_3_process_interrupt +ffffffff8204eb20 t jpeg_v4_0_3_query_ras_error_count +ffffffff8204ec40 t jpeg_v4_0_3_reset_ras_error_count +ffffffff8204ed50 t jpeg_v4_0_3_disable_clock_gating +ffffffff8204f000 t lsdma_v6_0_copy_mem +ffffffff8204f3e0 t lsdma_v6_0_fill_mem +ffffffff8204f740 t lsdma_v6_0_update_memory_power_gating +ffffffff82050000 t mca_v3_0_ras_block_match +ffffffff82050050 t mca_v3_0_mp0_query_ras_error_count +ffffffff82050070 t mca_v3_0_mp1_query_ras_error_count +ffffffff82050090 t mca_v3_0_mpio_query_ras_error_count +ffffffff82051000 t mes_v10_0_early_init +ffffffff82051070 t mes_v10_0_late_init +ffffffff820510c0 t mes_v10_1_sw_init +ffffffff82051630 t mes_v10_1_sw_fini +ffffffff820517c0 t mes_v10_1_hw_init +ffffffff820521b0 t mes_v10_1_hw_fini +ffffffff820522c0 t mes_v10_1_suspend +ffffffff82052400 t mes_v10_1_resume +ffffffff82052460 t mes_v10_1_kiq_hw_init +ffffffff820528f0 t mes_v10_1_add_hw_queue +ffffffff82052a80 t mes_v10_1_remove_hw_queue +ffffffff82052b20 t mes_v10_1_unmap_legacy_queue +ffffffff82052c20 t mes_v10_1_suspend_gang +ffffffff82052c50 t mes_v10_1_resume_gang +ffffffff82052c80 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff82052ed0 t mes_v10_1_load_microcode +ffffffff820537f0 t mes_v10_1_enable +ffffffff82053d00 t mes_v10_1_queue_init +ffffffff82053fe0 t amdgpu_bo_unreserve +ffffffff820540f0 t mes_v10_1_ring_get_rptr +ffffffff82054120 t mes_v10_1_ring_get_wptr +ffffffff82054190 t mes_v10_1_ring_set_wptr +ffffffff82055000 t mes_v11_0_early_init +ffffffff82055070 t mes_v11_0_late_init +ffffffff820550e0 t mes_v11_0_sw_init +ffffffff82055650 t mes_v11_0_sw_fini +ffffffff820558a0 t mes_v11_0_hw_init +ffffffff820561b0 t mes_v11_0_hw_fini +ffffffff820561e0 t mes_v11_0_suspend +ffffffff820561f0 t mes_v11_0_resume +ffffffff82056250 t mes_v11_0_kiq_hw_init +ffffffff820564a0 t mes_v11_0_kiq_hw_fini +ffffffff82056600 t mes_v11_0_add_hw_queue +ffffffff82056810 t mes_v11_0_remove_hw_queue +ffffffff820568b0 t mes_v11_0_unmap_legacy_queue +ffffffff820569d0 t mes_v11_0_suspend_gang +ffffffff82056a00 t mes_v11_0_resume_gang +ffffffff82056a30 t mes_v11_0_misc_op +ffffffff82056bf0 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff82056e50 t mes_v11_0_load_microcode +ffffffff820576f0 t mes_v11_0_enable +ffffffff82057ca0 t mes_v11_0_queue_init +ffffffff82058920 t amdgpu_bo_unreserve +ffffffff82058a30 t mes_v11_0_mqd_init +ffffffff82058c50 t mes_v11_0_kiq_dequeue +ffffffff82059140 t mes_v11_0_ring_get_rptr +ffffffff82059170 t mes_v11_0_ring_get_wptr +ffffffff820591e0 t mes_v11_0_ring_set_wptr +ffffffff8205a000 t mmhub_v1_0_query_ras_error_count +ffffffff8205a160 t mmhub_v1_0_reset_ras_error_count +ffffffff8205a230 t mmhub_v1_0_get_fb_location +ffffffff8205a360 t mmhub_v1_0_init +ffffffff8205a410 t mmhub_v1_0_gart_enable +ffffffff8205b9c0 t mmhub_v1_0_set_fault_enable_default +ffffffff8205bae0 t mmhub_v1_0_gart_disable +ffffffff8205bdb0 t mmhub_v1_0_set_clockgating +ffffffff8205c2a0 t mmhub_v1_0_get_clockgating +ffffffff8205c3e0 t mmhub_v1_0_setup_vm_pt_regs +ffffffff8205c530 t mmhub_v1_0_update_power_gating +ffffffff8205d000 t mmhub_v1_7_query_ras_error_count +ffffffff8205d160 t mmhub_v1_7_query_ras_error_status +ffffffff8205d270 t mmhub_v1_7_reset_ras_error_count +ffffffff8205d320 t mmhub_v1_7_reset_ras_error_status +ffffffff8205d440 t mmhub_v1_7_get_fb_location +ffffffff8205d570 t mmhub_v1_7_init +ffffffff8205d610 t mmhub_v1_7_gart_enable +ffffffff8205edf0 t mmhub_v1_7_set_fault_enable_default +ffffffff8205ef10 t mmhub_v1_7_gart_disable +ffffffff8205f1e0 t mmhub_v1_7_set_clockgating +ffffffff8205f5c0 t mmhub_v1_7_get_clockgating +ffffffff8205f700 t mmhub_v1_7_setup_vm_pt_regs +ffffffff82060000 t mmhub_v1_8_get_fb_location +ffffffff82060130 t mmhub_v1_8_init +ffffffff820602b0 t mmhub_v1_8_gart_enable +ffffffff820621d0 t mmhub_v1_8_set_fault_enable_default +ffffffff820623c0 t mmhub_v1_8_gart_disable +ffffffff82062760 t mmhub_v1_8_set_clockgating +ffffffff82062790 t mmhub_v1_8_get_clockgating +ffffffff820627c0 t mmhub_v1_8_setup_vm_pt_regs +ffffffff820629f0 t mmhub_v1_8_query_ras_error_count +ffffffff82062b80 t mmhub_v1_8_query_ras_error_status +ffffffff82062e80 t mmhub_v1_8_reset_ras_error_count +ffffffff82062fc0 t mmhub_v1_8_reset_ras_error_status +ffffffff82064000 t mmhub_v2_0_init +ffffffff820640d0 t mmhub_v2_0_gart_enable +ffffffff820654f0 t mmhub_v2_0_set_fault_enable_default +ffffffff82065610 t mmhub_v2_0_gart_disable +ffffffff820658e0 t mmhub_v2_0_set_clockgating +ffffffff82065c70 t mmhub_v2_0_get_clockgating +ffffffff82065e30 t mmhub_v2_0_setup_vm_pt_regs +ffffffff82065f90 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff82066230 t mmhub_v2_0_get_invalidate_req +ffffffff82067000 t mmhub_v2_3_init +ffffffff820670e0 t mmhub_v2_3_gart_enable +ffffffff82068760 t mmhub_v2_3_set_fault_enable_default +ffffffff82068860 t mmhub_v2_3_gart_disable +ffffffff82068b40 t mmhub_v2_3_set_clockgating +ffffffff82069050 t mmhub_v2_3_get_clockgating +ffffffff82069270 t mmhub_v2_3_setup_vm_pt_regs +ffffffff820693c0 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff82069610 t mmhub_v2_3_get_invalidate_req +ffffffff8206a000 t mmhub_v3_0_get_fb_location +ffffffff8206a0a0 t mmhub_v3_0_get_mc_fb_offset +ffffffff8206a140 t mmhub_v3_0_init +ffffffff8206a220 t mmhub_v3_0_gart_enable +ffffffff8206b690 t mmhub_v3_0_set_fault_enable_default +ffffffff8206b7b0 t mmhub_v3_0_gart_disable +ffffffff8206ba80 t mmhub_v3_0_set_clockgating +ffffffff8206bc70 t mmhub_v3_0_get_clockgating +ffffffff8206bd30 t mmhub_v3_0_setup_vm_pt_regs +ffffffff8206be80 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff8206c0d0 t mmhub_v3_0_get_invalidate_req +ffffffff8206d000 t mmhub_v3_0_1_get_fb_location +ffffffff8206d0a0 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff8206d140 t mmhub_v3_0_1_init +ffffffff8206d210 t mmhub_v3_0_1_gart_enable +ffffffff8206e7a0 t mmhub_v3_0_1_set_fault_enable_default +ffffffff8206e8a0 t mmhub_v3_0_1_gart_disable +ffffffff8206eb80 t mmhub_v3_0_1_set_clockgating +ffffffff8206ed70 t mmhub_v3_0_1_get_clockgating +ffffffff8206ee30 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff8206ef80 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff8206f1d0 t mmhub_v3_0_1_get_invalidate_req +ffffffff82070000 t mmhub_v3_0_2_get_fb_location +ffffffff820700a0 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff82070140 t mmhub_v3_0_2_init +ffffffff82070210 t mmhub_v3_0_2_gart_enable +ffffffff82071660 t mmhub_v3_0_2_set_fault_enable_default +ffffffff82071780 t mmhub_v3_0_2_gart_disable +ffffffff82071a50 t mmhub_v3_0_2_set_clockgating +ffffffff82071a80 t mmhub_v3_0_2_get_clockgating +ffffffff82071ab0 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff82071c00 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff82071e30 t mmhub_v3_0_2_get_invalidate_req +ffffffff82072000 t mmhub_v9_4_query_ras_error_count +ffffffff82072160 t mmhub_v9_4_query_ras_error_status +ffffffff82072270 t mmhub_v9_4_reset_ras_error_count +ffffffff82072340 t mmhub_v9_4_get_fb_location +ffffffff82072470 t mmhub_v9_4_init +ffffffff820725c0 t mmhub_v9_4_gart_enable +ffffffff82073c60 t mmhub_v9_4_set_fault_enable_default +ffffffff82073e70 t mmhub_v9_4_gart_disable +ffffffff82074210 t mmhub_v9_4_set_clockgating +ffffffff82074750 t mmhub_v9_4_get_clockgating +ffffffff82074890 t mmhub_v9_4_setup_vm_pt_regs +ffffffff820748e0 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff82075000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff82075050 T xgpu_ai_mailbox_add_irq_id +ffffffff82075100 T xgpu_ai_mailbox_get_irq +ffffffff820751d0 t xgpu_ai_mailbox_flr_work +ffffffff82075470 T xgpu_ai_mailbox_put_irq +ffffffff820754b0 t xgpu_ai_request_full_gpu_access +ffffffff820754d0 t xgpu_ai_release_full_gpu_access +ffffffff820754f0 t xgpu_ai_request_init_data +ffffffff82075560 t xgpu_ai_request_reset +ffffffff82075630 t xgpu_ai_mailbox_trans_msg +ffffffff820758f0 t xgpu_ai_ras_poison_handler +ffffffff82075920 t xgpu_ai_set_mailbox_ack_irq +ffffffff820759c0 t xgpu_ai_mailbox_ack_irq +ffffffff82075a20 t xgpu_ai_set_mailbox_rcv_irq +ffffffff82075ac0 t xgpu_ai_mailbox_rcv_irq +ffffffff82075bd0 t xgpu_ai_send_access_requests +ffffffff82075cf0 t xgpu_ai_poll_msg +ffffffff82076000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff82076050 T xgpu_nv_mailbox_add_irq_id +ffffffff82076100 T xgpu_nv_mailbox_get_irq +ffffffff820761d0 t xgpu_nv_mailbox_flr_work +ffffffff82076490 T xgpu_nv_mailbox_put_irq +ffffffff820764d0 t xgpu_nv_request_full_gpu_access +ffffffff820764f0 t xgpu_nv_release_full_gpu_access +ffffffff82076510 t xgpu_nv_request_init_data +ffffffff82076530 t xgpu_nv_request_reset +ffffffff82076690 t xgpu_nv_mailbox_trans_msg +ffffffff820768c0 t xgpu_nv_ras_poison_handler +ffffffff820768e0 t xgpu_nv_set_mailbox_ack_irq +ffffffff82076970 t xgpu_nv_mailbox_ack_irq +ffffffff820769d0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff82076a60 t xgpu_nv_mailbox_rcv_irq +ffffffff82076b30 t xgpu_nv_send_access_requests +ffffffff82077000 T xgpu_vi_init_golden_registers +ffffffff820770f0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff82077140 T xgpu_vi_mailbox_add_irq_id +ffffffff820771f0 T xgpu_vi_mailbox_get_irq +ffffffff820772c0 t xgpu_vi_mailbox_flr_work +ffffffff82077460 T xgpu_vi_mailbox_put_irq +ffffffff820774a0 t xgpu_vi_request_full_gpu_access +ffffffff820774c0 t xgpu_vi_release_full_gpu_access +ffffffff820774e0 t xgpu_vi_request_reset +ffffffff82077500 t xgpu_vi_wait_reset_cmpl +ffffffff82077640 t xgpu_vi_set_mailbox_ack_irq +ffffffff820776d0 t xgpu_vi_mailbox_ack_irq +ffffffff82077730 t xgpu_vi_set_mailbox_rcv_irq +ffffffff820777c0 t xgpu_vi_mailbox_rcv_irq +ffffffff82077890 t xgpu_vi_mailbox_rcv_msg +ffffffff820779f0 t xgpu_vi_send_access_requests +ffffffff82078000 t navi10_ih_early_init +ffffffff82078060 t navi10_ih_sw_init +ffffffff820781f0 t navi10_ih_sw_fini +ffffffff82078230 t navi10_ih_hw_init +ffffffff82078710 t navi10_ih_hw_fini +ffffffff82078780 t navi10_ih_suspend +ffffffff820787f0 t navi10_ih_resume +ffffffff82078800 t navi10_ih_is_idle +ffffffff82078830 t navi10_ih_wait_for_idle +ffffffff82078860 t navi10_ih_soft_reset +ffffffff82078890 t navi10_ih_set_clockgating_state +ffffffff820789d0 t navi10_ih_set_powergating_state +ffffffff82078a00 t navi10_ih_get_clockgating_state +ffffffff82078aa0 t navi10_ih_get_wptr +ffffffff82078c00 t navi10_ih_set_rptr +ffffffff82078cf0 t navi10_ih_self_irq +ffffffff82078d70 t navi10_ih_toggle_interrupts +ffffffff82078f00 t force_update_wptr_for_self_int +ffffffff8207a000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff8207a040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff8207a080 t nbio_v2_3_get_pcie_index_offset +ffffffff8207a0c0 t nbio_v2_3_get_pcie_data_offset +ffffffff8207a100 t nbio_v2_3_get_rev_id +ffffffff8207a160 t nbio_v2_3_mc_access_enable +ffffffff8207a210 t nbio_v2_3_get_memsize +ffffffff8207a280 t nbio_v2_3_sdma_doorbell_range +ffffffff8207a330 t nbio_v2_3_vcn_doorbell_range +ffffffff8207a3c0 t nbio_v2_3_enable_doorbell_aperture +ffffffff8207a4d0 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff8207a650 t nbio_v2_3_ih_doorbell_range +ffffffff8207a780 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff8207a830 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff8207a8e0 t nbio_v2_3_get_clockgating_state +ffffffff8207a970 t nbio_v2_3_ih_control +ffffffff8207aae0 t nbio_v2_3_init_registers +ffffffff8207ab80 t nbio_v2_3_remap_hdp_registers +ffffffff8207aca0 t nbio_v2_3_enable_aspm +ffffffff8207ad40 t nbio_v2_3_program_aspm +ffffffff8207b4c0 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff8207b560 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff8207b5e0 t nbio_v2_3_clear_doorbell_interrupt +ffffffff8207c000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff8207c040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff8207c080 t nbio_v4_3_get_pcie_index_offset +ffffffff8207c0b0 t nbio_v4_3_get_pcie_data_offset +ffffffff8207c0f0 t nbio_v4_3_get_rev_id +ffffffff8207c190 t nbio_v4_3_mc_access_enable +ffffffff8207c240 t nbio_v4_3_get_memsize +ffffffff8207c2b0 t nbio_v4_3_sdma_doorbell_range +ffffffff8207c430 t nbio_v4_3_vcn_doorbell_range +ffffffff8207c5f0 t nbio_v4_3_gc_doorbell_init +ffffffff8207c700 t nbio_v4_3_enable_doorbell_aperture +ffffffff8207c810 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff8207c990 t nbio_v4_3_ih_doorbell_range +ffffffff8207cac0 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff8207cc10 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff8207cd50 t nbio_v4_3_get_clockgating_state +ffffffff8207ce90 t nbio_v4_3_ih_control +ffffffff8207d000 t nbio_v4_3_init_registers +ffffffff8207d140 t nbio_v4_3_remap_hdp_registers +ffffffff8207d260 t nbio_v4_3_program_aspm +ffffffff8207e090 t nbio_v4_3_get_rom_offset +ffffffff8207e130 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff8207e160 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff8207e190 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff8207e1c0 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff8207e1f0 t nbio_v4_3_handle_ras_err_event_athub_intr_no_bifring +ffffffff8207e330 t nbio_v4_3_init_ras_err_event_athub_interrupt +ffffffff8207e370 t nbio_v4_3_set_ras_err_event_athub_irq_state +ffffffff8207e490 t nbio_v4_3_process_err_event_athub_irq +ffffffff8207f000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff8207f040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff8207f080 t nbio_v6_1_get_pcie_index_offset +ffffffff8207f0c0 t nbio_v6_1_get_pcie_data_offset +ffffffff8207f100 t nbio_v6_1_get_rev_id +ffffffff8207f1a0 t nbio_v6_1_mc_access_enable +ffffffff8207f250 t nbio_v6_1_get_memsize +ffffffff8207f2c0 t nbio_v6_1_sdma_doorbell_range +ffffffff8207f360 t nbio_v6_1_enable_doorbell_aperture +ffffffff8207f470 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff8207f5f0 t nbio_v6_1_ih_doorbell_range +ffffffff8207f720 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff8207f7d0 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff8207f880 t nbio_v6_1_get_clockgating_state +ffffffff8207f910 t nbio_v6_1_ih_control +ffffffff8207fa80 t nbio_v6_1_init_registers +ffffffff8207fb60 t nbio_v6_1_remap_hdp_registers +ffffffff8207fc80 t nbio_v6_1_program_aspm +ffffffff82081000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff82081040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff82081080 t nbio_v7_0_get_pcie_index_offset +ffffffff820810c0 t nbio_v7_0_get_pcie_data_offset +ffffffff82081100 t nbio_v7_0_get_rev_id +ffffffff820811a0 t nbio_v7_0_mc_access_enable +ffffffff82081250 t nbio_v7_0_get_memsize +ffffffff820812c0 t nbio_v7_0_sdma_doorbell_range +ffffffff82081360 t nbio_v7_0_vcn_doorbell_range +ffffffff820813e0 t nbio_v7_0_enable_doorbell_aperture +ffffffff820814f0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff82081520 t nbio_v7_0_ih_doorbell_range +ffffffff82081650 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff82081790 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff82081840 t nbio_v7_0_get_clockgating_state +ffffffff820818d0 t nbio_v7_0_ih_control +ffffffff82081a40 t nbio_v7_0_init_registers +ffffffff82081a90 t nbio_v7_0_remap_hdp_registers +ffffffff82081bb0 t nbio_7_0_read_syshub_ind_mmr +ffffffff82081c90 t nbio_7_0_write_syshub_ind_mmr +ffffffff82082000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff82082040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff82082080 t nbio_v7_2_get_pcie_index_offset +ffffffff820820c0 t nbio_v7_2_get_pcie_data_offset +ffffffff82082100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff82082130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff82082170 t nbio_v7_2_get_rev_id +ffffffff82082260 t nbio_v7_2_mc_access_enable +ffffffff820823a0 t nbio_v7_2_get_memsize +ffffffff82082410 t nbio_v7_2_sdma_doorbell_range +ffffffff820824b0 t nbio_v7_2_vcn_doorbell_range +ffffffff82082540 t nbio_v7_2_enable_doorbell_aperture +ffffffff82082630 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff820827b0 t nbio_v7_2_ih_doorbell_range +ffffffff82082840 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff82082900 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff82082ab0 t nbio_v7_2_get_clockgating_state +ffffffff82082b50 t nbio_v7_2_ih_control +ffffffff82082cc0 t nbio_v7_2_init_registers +ffffffff82082ea0 t nbio_v7_2_remap_hdp_registers +ffffffff82083000 t nbio_v7_4_query_ras_error_count +ffffffff820831d0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff82083480 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff82083650 t nbio_v7_4_init_ras_controller_interrupt +ffffffff82083690 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff820836d0 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff82083710 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff82083750 t nbio_v7_4_get_pcie_index_offset +ffffffff82083790 t nbio_v7_4_get_pcie_data_offset +ffffffff820837d0 t nbio_v7_4_get_rev_id +ffffffff820838b0 t nbio_v7_4_mc_access_enable +ffffffff82083960 t nbio_v7_4_get_memsize +ffffffff820839d0 t nbio_v7_4_sdma_doorbell_range +ffffffff82083aa0 t nbio_v7_4_vcn_doorbell_range +ffffffff82083b50 t nbio_v7_4_enable_doorbell_aperture +ffffffff82083c60 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff82083de0 t nbio_v7_4_ih_doorbell_range +ffffffff82083f10 t nbio_v7_4_enable_doorbell_interrupt +ffffffff82084070 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff820840a0 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff82084150 t nbio_v7_4_get_clockgating_state +ffffffff820841e0 t nbio_v7_4_ih_control +ffffffff82084350 t nbio_v7_4_init_registers +ffffffff82084450 t nbio_v7_4_remap_hdp_registers +ffffffff82084570 t nbio_v7_4_program_aspm +ffffffff82084a20 t nbio_v7_4_set_ras_controller_irq_state +ffffffff82084bd0 t nbio_v7_4_process_ras_controller_irq +ffffffff82084c00 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff82084db0 t nbio_v7_4_process_err_event_athub_irq +ffffffff82085000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff82085040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff82085080 t nbio_v7_7_get_pcie_index_offset +ffffffff820850c0 t nbio_v7_7_get_pcie_data_offset +ffffffff82085100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff82085130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff82085170 t nbio_v7_7_get_rev_id +ffffffff82085210 t nbio_v7_7_mc_access_enable +ffffffff820852c0 t nbio_v7_7_get_memsize +ffffffff82085330 t nbio_v7_7_sdma_doorbell_range +ffffffff820853d0 t nbio_v7_7_vcn_doorbell_range +ffffffff82085460 t nbio_v7_7_enable_doorbell_aperture +ffffffff82085550 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff820856d0 t nbio_v7_7_ih_doorbell_range +ffffffff82085800 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff82085950 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff82085b80 t nbio_v7_7_get_clockgating_state +ffffffff82085cc0 t nbio_v7_7_ih_control +ffffffff82085e30 t nbio_v7_7_init_registers +ffffffff82085f50 t nbio_v7_7_remap_hdp_registers +ffffffff82087000 t nbio_v7_9_get_hdp_flush_req_offset +ffffffff82087040 t nbio_v7_9_get_hdp_flush_done_offset +ffffffff82087080 t nbio_v7_9_get_pcie_index_offset +ffffffff820870c0 t nbio_v7_9_get_pcie_data_offset +ffffffff82087100 t nbio_v7_9_get_pcie_index_hi_offset +ffffffff82087140 t nbio_v7_9_get_rev_id +ffffffff820871e0 t nbio_v7_9_mc_access_enable +ffffffff82087290 t nbio_v7_9_get_memsize +ffffffff82087300 t nbio_v7_9_sdma_doorbell_range +ffffffff82087680 t nbio_v7_9_vcn_doorbell_range +ffffffff82087840 t nbio_v7_9_enable_doorbell_aperture +ffffffff820879d0 t nbio_v7_9_enable_doorbell_selfring_aperture +ffffffff82087b50 t nbio_v7_9_ih_doorbell_range +ffffffff82087c70 t nbio_v7_9_enable_doorbell_interrupt +ffffffff82087d90 t nbio_v7_9_update_medium_grain_clock_gating +ffffffff82087dc0 t nbio_v7_9_update_medium_grain_light_sleep +ffffffff82087df0 t nbio_v7_9_get_clockgating_state +ffffffff82087e20 t nbio_v7_9_ih_control +ffffffff82087f90 t nbio_v7_9_init_registers +ffffffff82088320 t nbio_v7_9_remap_hdp_registers +ffffffff82088440 t nbio_v7_9_get_compute_partition_mode +ffffffff820884e0 t nbio_v7_9_get_memory_partition_mode +ffffffff820885e0 t nbio_v7_9_get_pcie_replay_count +ffffffff82088640 t nbio_v7_9_get_pcie_usage +ffffffff82088800 t nbio_v7_9_query_ras_error_count +ffffffff82088830 t nbio_v7_9_handle_ras_controller_intr_no_bifring +ffffffff82088980 t nbio_v7_9_handle_ras_err_event_athub_intr_no_bifring +ffffffff82088ac0 t nbio_v7_9_init_ras_controller_interrupt +ffffffff82088b00 t nbio_v7_9_init_ras_err_event_athub_interrupt +ffffffff82088b40 t nbio_v7_9_set_ras_controller_irq_state +ffffffff82088b70 t nbio_v7_9_process_ras_controller_irq +ffffffff82088ba0 t nbio_v7_9_set_ras_err_event_athub_irq_state +ffffffff82088bd0 t nbio_v7_9_process_err_event_athub_irq +ffffffff82089000 T nv_grbm_select +ffffffff820890a0 T nv_set_virt_ops +ffffffff820890e0 t nv_common_early_init +ffffffff820894e0 t nv_common_late_init +ffffffff820895a0 t nv_common_sw_init +ffffffff820895f0 t nv_common_sw_fini +ffffffff82089620 t nv_common_hw_init +ffffffff82089750 t nv_common_hw_fini +ffffffff820897c0 t nv_common_suspend +ffffffff82089830 t nv_common_resume +ffffffff82089870 t nv_common_is_idle +ffffffff820898a0 t nv_common_wait_for_idle +ffffffff820898d0 t nv_common_soft_reset +ffffffff82089900 t nv_common_set_clockgating_state +ffffffff820899f0 t nv_common_set_powergating_state +ffffffff82089a20 t nv_common_get_clockgating_state +ffffffff82089aa0 t nv_didt_rreg +ffffffff82089b60 t nv_didt_wreg +ffffffff82089c00 t nv_read_disabled_bios +ffffffff82089c30 t nv_read_register +ffffffff82089d30 t nv_asic_reset +ffffffff82089ec0 t nv_asic_reset_method +ffffffff82089fc0 t nv_get_xclk +ffffffff82089ff0 t nv_set_uvd_clocks +ffffffff8208a020 t nv_set_vce_clocks +ffffffff8208a050 t nv_get_config_memsize +ffffffff8208a070 t nv_need_full_reset +ffffffff8208a0a0 t nv_init_doorbell_index +ffffffff8208a1d0 t nv_need_reset_on_init +ffffffff8208a280 t nv_pre_asic_init +ffffffff8208a2b0 t nv_update_umd_stable_pstate +ffffffff8208a380 t nv_query_video_codecs +ffffffff8208b000 T psp_v10_0_set_psp_funcs +ffffffff8208b030 t psp_v10_0_init_microcode +ffffffff8208b120 t psp_v10_0_ring_create +ffffffff8208b510 t psp_v10_0_ring_stop +ffffffff8208b7c0 t psp_v10_0_ring_destroy +ffffffff8208b850 t psp_v10_0_mode1_reset +ffffffff8208b8a0 t psp_v10_0_ring_get_wptr +ffffffff8208b900 t psp_v10_0_ring_set_wptr +ffffffff8208c000 T psp_v11_0_set_psp_funcs +ffffffff8208c030 t psp_v11_0_init_microcode +ffffffff8208c1e0 t psp_v11_0_bootloader_load_kdb +ffffffff8208c200 t psp_v11_0_bootloader_load_spl +ffffffff8208c220 t psp_v11_0_bootloader_load_sysdrv +ffffffff8208c240 t psp_v11_0_bootloader_load_sos +ffffffff8208c690 t psp_v11_0_ring_create +ffffffff8208cf10 t psp_v11_0_ring_stop +ffffffff8208d1f0 t psp_v11_0_ring_destroy +ffffffff8208d280 t psp_v11_0_mode1_reset +ffffffff8208d3b0 t psp_v11_0_memory_training +ffffffff8208d940 t psp_v11_0_ring_get_wptr +ffffffff8208d990 t psp_v11_0_ring_set_wptr +ffffffff8208daf0 t psp_v11_0_load_usbc_pd_fw +ffffffff8208dd20 t psp_v11_0_read_usbc_pd_fw +ffffffff8208de60 t psp_v11_0_bootloader_load_component +ffffffff8208e050 t psp_v11_0_wait_for_bootloader +ffffffff8208e270 t psp_v11_0_memory_training_send_msg +ffffffff8208f000 T psp_v11_0_8_set_psp_funcs +ffffffff8208f030 t psp_v11_0_8_ring_create +ffffffff8208f8b0 t psp_v11_0_8_ring_stop +ffffffff8208fdb0 t psp_v11_0_8_ring_destroy +ffffffff8208fe40 t psp_v11_0_8_ring_get_wptr +ffffffff8208feb0 t psp_v11_0_8_ring_set_wptr +ffffffff82090000 T psp_v12_0_set_psp_funcs +ffffffff82090030 t psp_v12_0_init_microcode +ffffffff82090100 t psp_v12_0_bootloader_load_sysdrv +ffffffff82090520 t psp_v12_0_bootloader_load_sos +ffffffff82090990 t psp_v12_0_ring_create +ffffffff82091670 t psp_v12_0_ring_stop +ffffffff82091950 t psp_v12_0_ring_destroy +ffffffff820919e0 t psp_v12_0_mode1_reset +ffffffff82091b10 t psp_v12_0_ring_get_wptr +ffffffff82091b80 t psp_v12_0_ring_set_wptr +ffffffff82092000 T psp_v13_0_set_psp_funcs +ffffffff82092030 t psp_v13_0_init_microcode +ffffffff82092160 t psp_v13_0_wait_for_bootloader_steady_state +ffffffff82092290 t psp_v13_0_bootloader_load_kdb +ffffffff820922b0 t psp_v13_0_bootloader_load_spl +ffffffff820922d0 t psp_v13_0_bootloader_load_sysdrv +ffffffff820922f0 t psp_v13_0_bootloader_load_soc_drv +ffffffff82092310 t psp_v13_0_bootloader_load_intf_drv +ffffffff82092330 t psp_v13_0_bootloader_load_dbg_drv +ffffffff82092350 t psp_v13_0_bootloader_load_ras_drv +ffffffff82092370 t psp_v13_0_bootloader_load_sos +ffffffff82092830 t psp_v13_0_ring_create +ffffffff820930b0 t psp_v13_0_ring_stop +ffffffff820935b0 t psp_v13_0_ring_destroy +ffffffff82093640 t psp_v13_0_memory_training +ffffffff82093b20 t psp_v13_0_ring_get_wptr +ffffffff82093b90 t psp_v13_0_ring_set_wptr +ffffffff82093ca0 t psp_v13_0_load_usbc_pd_fw +ffffffff82093ed0 t psp_v13_0_read_usbc_pd_fw +ffffffff82094010 t psp_v13_0_update_spirom +ffffffff82094230 t psp_v13_0_vbflash_status +ffffffff82094290 t psp_v13_0_fatal_error_recovery_quirk +ffffffff820943f0 t psp_v13_0_bootloader_load_component +ffffffff820946b0 t psp_v13_0_memory_training_send_msg +ffffffff82094830 t psp_v13_0_exec_spi_cmd +ffffffff82095000 T psp_v13_0_4_set_psp_funcs +ffffffff82095030 t psp_v13_0_4_init_microcode +ffffffff820950f0 t psp_v13_0_4_bootloader_load_kdb +ffffffff82095110 t psp_v13_0_4_bootloader_load_spl +ffffffff82095130 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff82095150 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff82095170 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff82095190 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff820951b0 t psp_v13_0_4_bootloader_load_sos +ffffffff82095620 t psp_v13_0_4_ring_create +ffffffff82095eb0 t psp_v13_0_4_ring_stop +ffffffff820963c0 t psp_v13_0_4_ring_destroy +ffffffff82096450 t psp_v13_0_4_ring_get_wptr +ffffffff820964c0 t psp_v13_0_4_ring_set_wptr +ffffffff820965e0 t psp_v13_0_4_bootloader_load_component +ffffffff820967f0 t psp_v13_0_4_wait_for_bootloader +ffffffff82097000 T psp_v3_1_set_psp_funcs +ffffffff82097030 t psp_v3_1_init_microcode +ffffffff820970f0 t psp_v3_1_bootloader_load_sysdrv +ffffffff82097510 t psp_v3_1_bootloader_load_sos +ffffffff82097980 t psp_v3_1_ring_create +ffffffff82098840 t psp_v3_1_ring_stop +ffffffff82098b20 t psp_v3_1_ring_destroy +ffffffff82098bb0 t psp_v3_1_smu_reload_quirk +ffffffff82098c00 t psp_v3_1_mode1_reset +ffffffff82098d30 t psp_v3_1_ring_get_wptr +ffffffff82098d80 t psp_v3_1_ring_set_wptr +ffffffff82099000 t sdma_v2_4_early_init +ffffffff820990f0 t sdma_v2_4_sw_init +ffffffff82099520 t sdma_v2_4_sw_fini +ffffffff820995f0 t sdma_v2_4_hw_init +ffffffff82099aa0 t sdma_v2_4_hw_fini +ffffffff82099af0 t sdma_v2_4_suspend +ffffffff82099b40 t sdma_v2_4_resume +ffffffff82099b50 t sdma_v2_4_is_idle +ffffffff82099ba0 t sdma_v2_4_wait_for_idle +ffffffff82099c50 t sdma_v2_4_soft_reset +ffffffff82099e00 t sdma_v2_4_set_clockgating_state +ffffffff82099e30 t sdma_v2_4_set_powergating_state +ffffffff82099e60 t sdma_v2_4_ring_get_rptr +ffffffff82099ea0 t sdma_v2_4_ring_get_wptr +ffffffff82099f00 t sdma_v2_4_ring_set_wptr +ffffffff82099f40 t sdma_v2_4_ring_emit_ib +ffffffff8209a220 t sdma_v2_4_ring_emit_fence +ffffffff8209a670 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff8209a920 t sdma_v2_4_ring_emit_vm_flush +ffffffff8209abd0 t sdma_v2_4_ring_emit_hdp_flush +ffffffff8209ae80 t sdma_v2_4_ring_test_ring +ffffffff8209b1b0 t sdma_v2_4_ring_test_ib +ffffffff8209b3c0 t sdma_v2_4_ring_insert_nop +ffffffff8209b500 t sdma_v2_4_ring_pad_ib +ffffffff8209b630 t sdma_v2_4_ring_emit_wreg +ffffffff8209b790 t sdma_v2_4_emit_copy_buffer +ffffffff8209b850 t sdma_v2_4_emit_fill_buffer +ffffffff8209b8e0 t sdma_v2_4_vm_copy_pte +ffffffff8209b9a0 t sdma_v2_4_vm_write_pte +ffffffff8209ba70 t sdma_v2_4_vm_set_pte_pde +ffffffff8209bb70 t sdma_v2_4_set_trap_irq_state +ffffffff8209bc60 t sdma_v2_4_process_trap_irq +ffffffff8209bd00 t sdma_v2_4_process_illegal_inst_irq +ffffffff8209bd80 t sdma_v2_4_enable +ffffffff8209c000 t sdma_v3_0_early_init +ffffffff8209c100 t sdma_v3_0_sw_init +ffffffff8209c530 t sdma_v3_0_sw_fini +ffffffff8209c600 t sdma_v3_0_hw_init +ffffffff8209c770 t sdma_v3_0_hw_fini +ffffffff8209c7d0 t sdma_v3_0_suspend +ffffffff8209c830 t sdma_v3_0_resume +ffffffff8209c840 t sdma_v3_0_is_idle +ffffffff8209c890 t sdma_v3_0_wait_for_idle +ffffffff8209c940 t sdma_v3_0_check_soft_reset +ffffffff8209c9a0 t sdma_v3_0_pre_soft_reset +ffffffff8209ca00 t sdma_v3_0_soft_reset +ffffffff8209cb00 t sdma_v3_0_post_soft_reset +ffffffff8209cb50 t sdma_v3_0_set_clockgating_state +ffffffff8209ce00 t sdma_v3_0_set_powergating_state +ffffffff8209ce30 t sdma_v3_0_get_clockgating_state +ffffffff8209ced0 t sdma_v3_0_ring_get_rptr +ffffffff8209cf10 t sdma_v3_0_ring_get_wptr +ffffffff8209cf90 t sdma_v3_0_ring_set_wptr +ffffffff8209d040 t sdma_v3_0_ring_emit_ib +ffffffff8209d320 t sdma_v3_0_ring_emit_fence +ffffffff8209d770 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff8209da20 t sdma_v3_0_ring_emit_vm_flush +ffffffff8209dcd0 t sdma_v3_0_ring_emit_hdp_flush +ffffffff8209df80 t sdma_v3_0_ring_test_ring +ffffffff8209e2b0 t sdma_v3_0_ring_test_ib +ffffffff8209e4c0 t sdma_v3_0_ring_insert_nop +ffffffff8209e600 t sdma_v3_0_ring_pad_ib +ffffffff8209e730 t sdma_v3_0_ring_emit_wreg +ffffffff8209e890 t sdma_v3_0_emit_copy_buffer +ffffffff8209e950 t sdma_v3_0_emit_fill_buffer +ffffffff8209e9e0 t sdma_v3_0_vm_copy_pte +ffffffff8209eaa0 t sdma_v3_0_vm_write_pte +ffffffff8209eb70 t sdma_v3_0_vm_set_pte_pde +ffffffff8209ec70 t sdma_v3_0_set_trap_irq_state +ffffffff8209ed60 t sdma_v3_0_process_trap_irq +ffffffff8209ee00 t sdma_v3_0_process_illegal_inst_irq +ffffffff8209ee80 t sdma_v3_0_ctx_switch_enable +ffffffff8209f050 t sdma_v3_0_enable +ffffffff8209f200 t sdma_v3_0_gfx_resume +ffffffff820a0000 t sdma_v4_0_early_init +ffffffff820a02f0 t sdma_v4_0_late_init +ffffffff820a05b0 t sdma_v4_0_sw_init +ffffffff820a0a60 t sdma_v4_0_sw_fini +ffffffff820a0b30 t sdma_v4_0_hw_init +ffffffff820a3cf0 t sdma_v4_0_hw_fini +ffffffff820a3df0 t sdma_v4_0_suspend +ffffffff820a3e50 t sdma_v4_0_resume +ffffffff820a3ee0 t sdma_v4_0_is_idle +ffffffff820a4010 t sdma_v4_0_wait_for_idle +ffffffff820a41c0 t sdma_v4_0_soft_reset +ffffffff820a41f0 t sdma_v4_0_set_clockgating_state +ffffffff820a4720 t sdma_v4_0_set_powergating_state +ffffffff820a4800 t sdma_v4_0_get_clockgating_state +ffffffff820a48b0 t sdma_v4_0_query_ras_error_count +ffffffff820a4aa0 t sdma_v4_0_reset_ras_error_count +ffffffff820a4c20 t sdma_v4_0_ring_get_rptr +ffffffff820a4c80 t sdma_v4_0_ring_get_wptr +ffffffff820a4e90 t sdma_v4_0_ring_set_wptr +ffffffff820a5140 t sdma_v4_0_ring_emit_ib +ffffffff820a5420 t sdma_v4_0_ring_emit_fence +ffffffff820a5890 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff820a58f0 t sdma_v4_0_ring_emit_vm_flush +ffffffff820a5910 t sdma_v4_0_ring_emit_hdp_flush +ffffffff820a59d0 t sdma_v4_0_ring_test_ring +ffffffff820a5d00 t sdma_v4_0_ring_test_ib +ffffffff820a5f10 t sdma_v4_0_ring_insert_nop +ffffffff820a6050 t sdma_v4_0_ring_pad_ib +ffffffff820a6180 t sdma_v4_0_ring_emit_wreg +ffffffff820a62e0 t sdma_v4_0_ring_emit_reg_wait +ffffffff820a6330 t sdma_v4_0_wait_reg_mem +ffffffff820a6680 t sdma_v4_0_page_ring_get_wptr +ffffffff820a6840 t sdma_v4_0_page_ring_set_wptr +ffffffff820a6a10 t sdma_v4_0_emit_copy_buffer +ffffffff820a6ad0 t sdma_v4_0_emit_fill_buffer +ffffffff820a6b60 t sdma_v4_0_vm_copy_pte +ffffffff820a6c20 t sdma_v4_0_vm_write_pte +ffffffff820a6cf0 t sdma_v4_0_vm_set_pte_pde +ffffffff820a6df0 t sdma_v4_0_set_trap_irq_state +ffffffff820a6fa0 t sdma_v4_0_process_trap_irq +ffffffff820a7100 t sdma_v4_0_process_illegal_inst_irq +ffffffff820a7220 t sdma_v4_0_set_ecc_irq_state +ffffffff820a73d0 t sdma_v4_0_process_vm_hole_irq +ffffffff820a7420 t sdma_v4_0_print_iv_entry +ffffffff820a7570 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff820a75c0 t sdma_v4_0_process_pool_timeout_irq +ffffffff820a7610 t sdma_v4_0_process_srbm_write_irq +ffffffff820a7660 t sdma_v4_0_process_ras_data_cb +ffffffff820a76e0 t sdma_v4_0_ctx_switch_enable +ffffffff820a7e00 t sdma_v4_0_enable +ffffffff820a83f0 t sdma_v4_0_gfx_enable +ffffffff820a9000 t sdma_v4_4_query_ras_error_count +ffffffff820a92b0 t sdma_v4_4_reset_ras_error_count +ffffffff820aa000 t sdma_v4_4_2_early_init +ffffffff820aa2b0 t sdma_v4_4_2_late_init +ffffffff820aa340 t sdma_v4_4_2_sw_init +ffffffff820aa920 t sdma_v4_4_2_sw_fini +ffffffff820aa9f0 t sdma_v4_4_2_hw_init +ffffffff820aaa40 t sdma_v4_4_2_hw_fini +ffffffff820aab20 t sdma_v4_4_2_suspend +ffffffff820aac30 t sdma_v4_4_2_resume +ffffffff820aac80 t sdma_v4_4_2_is_idle +ffffffff820aad30 t sdma_v4_4_2_wait_for_idle +ffffffff820aae60 t sdma_v4_4_2_soft_reset +ffffffff820aae90 t sdma_v4_4_2_set_clockgating_state +ffffffff820ab350 t sdma_v4_4_2_set_powergating_state +ffffffff820ab380 t sdma_v4_4_2_get_clockgating_state +ffffffff820ab480 t sdma_v4_4_2_xcp_suspend +ffffffff820ab570 t sdma_v4_4_2_xcp_resume +ffffffff820ab5b0 t sdma_v4_4_2_ring_get_rptr +ffffffff820ab630 t sdma_v4_4_2_ring_get_wptr +ffffffff820ab790 t sdma_v4_4_2_ring_set_wptr +ffffffff820ab990 t sdma_v4_4_2_ring_emit_ib +ffffffff820abc70 t sdma_v4_4_2_ring_emit_fence +ffffffff820ac0e0 t sdma_v4_4_2_ring_emit_pipeline_sync +ffffffff820ac140 t sdma_v4_4_2_ring_emit_vm_flush +ffffffff820ac160 t sdma_v4_4_2_ring_emit_hdp_flush +ffffffff820ac230 t sdma_v4_4_2_ring_test_ring +ffffffff820ac560 t sdma_v4_4_2_ring_test_ib +ffffffff820ac770 t sdma_v4_4_2_ring_insert_nop +ffffffff820ac8b0 t sdma_v4_4_2_ring_pad_ib +ffffffff820ac9e0 t sdma_v4_4_2_ring_emit_wreg +ffffffff820acb40 t sdma_v4_4_2_ring_emit_reg_wait +ffffffff820acb90 t sdma_v4_4_2_wait_reg_mem +ffffffff820acee0 t sdma_v4_4_2_page_ring_get_wptr +ffffffff820ad000 t sdma_v4_4_2_page_ring_set_wptr +ffffffff820ad130 t sdma_v4_4_2_emit_copy_buffer +ffffffff820ad1f0 t sdma_v4_4_2_emit_fill_buffer +ffffffff820ad280 t sdma_v4_4_2_vm_copy_pte +ffffffff820ad340 t sdma_v4_4_2_vm_write_pte +ffffffff820ad410 t sdma_v4_4_2_vm_set_pte_pde +ffffffff820ad510 t sdma_v4_4_2_set_trap_irq_state +ffffffff820ad610 t sdma_v4_4_2_process_trap_irq +ffffffff820ad740 t sdma_v4_4_2_process_illegal_inst_irq +ffffffff820ad7e0 t sdma_v4_4_2_set_ecc_irq_state +ffffffff820ad8f0 t sdma_v4_4_2_process_vm_hole_irq +ffffffff820ad9e0 t sdma_v4_4_2_process_doorbell_invalid_irq +ffffffff820adad0 t sdma_v4_4_2_process_pool_timeout_irq +ffffffff820adbc0 t sdma_v4_4_2_process_srbm_write_irq +ffffffff820adcb0 t sdma_v4_4_2_query_ras_error_count +ffffffff820ade30 t sdma_v4_4_2_reset_ras_error_count +ffffffff820adfa0 t sdma_v4_4_2_inst_init_golden_registers +ffffffff820ae170 t sdma_v4_4_2_inst_start +ffffffff820af9a0 t sdma_v4_4_2_inst_ctx_switch_enable +ffffffff820afcf0 t sdma_v4_4_2_inst_enable +ffffffff820b1000 t sdma_v5_0_early_init +ffffffff820b1130 t sdma_v5_0_sw_init +ffffffff820b1350 t sdma_v5_0_sw_fini +ffffffff820b13f0 t sdma_v5_0_hw_init +ffffffff820b28c0 t sdma_v5_0_hw_fini +ffffffff820b2930 t sdma_v5_0_suspend +ffffffff820b29a0 t sdma_v5_0_resume +ffffffff820b29b0 t sdma_v5_0_is_idle +ffffffff820b2a50 t sdma_v5_0_wait_for_idle +ffffffff820b2b30 t sdma_v5_0_soft_reset +ffffffff820b2b60 t sdma_v5_0_set_clockgating_state +ffffffff820b2d80 t sdma_v5_0_set_powergating_state +ffffffff820b2db0 t sdma_v5_0_get_clockgating_state +ffffffff820b2e60 t sdma_v5_0_ring_get_rptr +ffffffff820b2ec0 t sdma_v5_0_ring_get_wptr +ffffffff820b3080 t sdma_v5_0_ring_set_wptr +ffffffff820b3430 t sdma_v5_0_ring_emit_ib +ffffffff820b3730 t sdma_v5_0_ring_emit_fence +ffffffff820b3be0 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff820b3e90 t sdma_v5_0_ring_emit_vm_flush +ffffffff820b3eb0 t sdma_v5_0_ring_emit_hdp_flush +ffffffff820b4180 t sdma_v5_0_ring_test_ring +ffffffff820b45b0 t sdma_v5_0_ring_test_ib +ffffffff820b4940 t sdma_v5_0_ring_insert_nop +ffffffff820b4a80 t sdma_v5_0_ring_pad_ib +ffffffff820b4bb0 t sdma_v5_0_ring_init_cond_exec +ffffffff820b4e00 t sdma_v5_0_ring_patch_cond_exec +ffffffff820b4ec0 t sdma_v5_0_ring_emit_wreg +ffffffff820b5020 t sdma_v5_0_ring_emit_reg_wait +ffffffff820b52c0 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff820b5350 t sdma_v5_0_ring_preempt_ib +ffffffff820b54e0 t sdma_v5_0_ring_emit_mem_sync +ffffffff820b5710 t sdma_v5_0_emit_copy_buffer +ffffffff820b57d0 t sdma_v5_0_emit_fill_buffer +ffffffff820b5860 t sdma_v5_0_vm_copy_pte +ffffffff820b5920 t sdma_v5_0_vm_write_pte +ffffffff820b59f0 t sdma_v5_0_vm_set_pte_pde +ffffffff820b5af0 t sdma_v5_0_set_trap_irq_state +ffffffff820b5b90 t sdma_v5_0_process_trap_irq +ffffffff820b5cd0 t sdma_v5_0_process_illegal_inst_irq +ffffffff820b5d00 t sdma_v5_0_mqd_init +ffffffff820b5df0 t sdma_v5_0_ctx_switch_enable +ffffffff820b6170 t sdma_v5_0_enable +ffffffff820b7000 t sdma_v5_2_early_init +ffffffff820b7130 t sdma_v5_2_sw_init +ffffffff820b73f0 t sdma_v5_2_sw_fini +ffffffff820b7490 t sdma_v5_2_hw_init +ffffffff820b92c0 t sdma_v5_2_hw_fini +ffffffff820b9330 t sdma_v5_2_suspend +ffffffff820b93a0 t sdma_v5_2_resume +ffffffff820b93b0 t sdma_v5_2_is_idle +ffffffff820b9470 t sdma_v5_2_wait_for_idle +ffffffff820b95a0 t sdma_v5_2_soft_reset +ffffffff820b98c0 t sdma_v5_2_set_clockgating_state +ffffffff820b9c60 t sdma_v5_2_set_powergating_state +ffffffff820b9c90 t sdma_v5_2_get_clockgating_state +ffffffff820b9d40 t sdma_v5_2_ring_get_rptr +ffffffff820b9da0 t sdma_v5_2_ring_get_wptr +ffffffff820b9ef0 t sdma_v5_2_ring_set_wptr +ffffffff820ba0d0 t sdma_v5_2_ring_emit_ib +ffffffff820ba3d0 t sdma_v5_2_ring_emit_fence +ffffffff820ba880 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff820bab30 t sdma_v5_2_ring_emit_vm_flush +ffffffff820bab50 t sdma_v5_2_ring_emit_hdp_flush +ffffffff820bae50 t sdma_v5_2_ring_test_ring +ffffffff820bb280 t sdma_v5_2_ring_test_ib +ffffffff820bb610 t sdma_v5_2_ring_insert_nop +ffffffff820bb750 t sdma_v5_2_ring_pad_ib +ffffffff820bb880 t sdma_v5_2_ring_init_cond_exec +ffffffff820bbad0 t sdma_v5_2_ring_patch_cond_exec +ffffffff820bbb90 t sdma_v5_2_ring_begin_use +ffffffff820bbbb0 t sdma_v5_2_ring_end_use +ffffffff820bbbd0 t sdma_v5_2_ring_emit_wreg +ffffffff820bbd30 t sdma_v5_2_ring_emit_reg_wait +ffffffff820bbfd0 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff820bc060 t sdma_v5_2_ring_preempt_ib +ffffffff820bc220 t sdma_v5_2_ring_emit_mem_sync +ffffffff820bc450 t sdma_v5_2_emit_copy_buffer +ffffffff820bc510 t sdma_v5_2_emit_fill_buffer +ffffffff820bc5a0 t sdma_v5_2_vm_copy_pte +ffffffff820bc660 t sdma_v5_2_vm_write_pte +ffffffff820bc730 t sdma_v5_2_vm_set_pte_pde +ffffffff820bc830 t sdma_v5_2_set_trap_irq_state +ffffffff820bc8f0 t sdma_v5_2_process_trap_irq +ffffffff820bca60 t sdma_v5_2_process_illegal_inst_irq +ffffffff820bca90 t sdma_v5_2_mqd_init +ffffffff820bcb80 t sdma_v5_2_ctx_switch_enable +ffffffff820bcfd0 t sdma_v5_2_enable +ffffffff820be000 t sdma_v6_0_early_init +ffffffff820be120 t sdma_v6_0_sw_init +ffffffff820be330 t sdma_v6_0_sw_fini +ffffffff820be3d0 t sdma_v6_0_hw_init +ffffffff820be3e0 t sdma_v6_0_hw_fini +ffffffff820be4d0 t sdma_v6_0_suspend +ffffffff820be510 t sdma_v6_0_resume +ffffffff820be520 t sdma_v6_0_is_idle +ffffffff820be5c0 t sdma_v6_0_wait_for_idle +ffffffff820be6a0 t sdma_v6_0_check_soft_reset +ffffffff820be770 t sdma_v6_0_soft_reset +ffffffff820becc0 t sdma_v6_0_set_clockgating_state +ffffffff820becf0 t sdma_v6_0_set_powergating_state +ffffffff820bed20 t sdma_v6_0_get_clockgating_state +ffffffff820bed50 t sdma_v6_0_ring_get_rptr +ffffffff820bedb0 t sdma_v6_0_ring_get_wptr +ffffffff820bee30 t sdma_v6_0_ring_set_wptr +ffffffff820bf1e0 t sdma_v6_0_ring_emit_ib +ffffffff820bf4e0 t sdma_v6_0_ring_emit_fence +ffffffff820bf990 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff820bfc40 t sdma_v6_0_ring_emit_vm_flush +ffffffff820bfee0 t sdma_v6_0_ring_emit_hdp_flush +ffffffff820c01b0 t sdma_v6_0_ring_test_ring +ffffffff820c05e0 t sdma_v6_0_ring_test_ib +ffffffff820c0970 t sdma_v6_0_ring_insert_nop +ffffffff820c0ab0 t sdma_v6_0_ring_pad_ib +ffffffff820c0be0 t sdma_v6_0_ring_init_cond_exec +ffffffff820c0e30 t sdma_v6_0_ring_patch_cond_exec +ffffffff820c0ef0 t sdma_v6_0_ring_emit_wreg +ffffffff820c1050 t sdma_v6_0_ring_emit_reg_wait +ffffffff820c12f0 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff820c1380 t sdma_v6_0_ring_preempt_ib +ffffffff820c1510 t sdma_v6_0_ring_emit_mem_sync +ffffffff820c1740 t sdma_v6_0_emit_copy_buffer +ffffffff820c1800 t sdma_v6_0_emit_fill_buffer +ffffffff820c1890 t sdma_v6_0_vm_copy_pte +ffffffff820c1950 t sdma_v6_0_vm_write_pte +ffffffff820c1a20 t sdma_v6_0_vm_set_pte_pde +ffffffff820c1b20 t sdma_v6_0_set_trap_irq_state +ffffffff820c1bc0 t sdma_v6_0_process_trap_irq +ffffffff820c1d20 t sdma_v6_0_process_illegal_inst_irq +ffffffff820c1d50 t sdma_v6_0_mqd_init +ffffffff820c1e80 t sdma_v6_0_start +ffffffff820c21e0 t sdma_v6_0_enable +ffffffff820c2380 t sdma_v6_0_gfx_resume +ffffffff820c35c0 t sdma_v6_0_gfx_stop +ffffffff820c4000 T sienna_cichlid_reset_init +ffffffff820c40e0 t sienna_cichlid_async_reset +ffffffff820c4140 t sienna_cichlid_get_reset_handler +ffffffff820c41d0 T sienna_cichlid_reset_fini +ffffffff820c4230 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff820c43a0 t sienna_cichlid_mode2_perform_reset +ffffffff820c4430 t sienna_cichlid_mode2_restore_hwcontext +ffffffff820c47a0 t sienna_cichlid_mode2_reset +ffffffff820c5000 T smu_v11_0_i2c_control_init +ffffffff820c50e0 T smu_v11_0_i2c_control_fini +ffffffff820c5120 t smu_v11_0_i2c_xfer +ffffffff820c6490 t smu_v11_0_i2c_func +ffffffff820c64c0 t smu_v11_0_i2c_enable +ffffffff820c6620 t smu_v11_0_i2c_abort +ffffffff820c6740 t lock_bus +ffffffff820c67f0 t trylock_bus +ffffffff820c6850 t unlock_bus +ffffffff820c7000 T smu_v13_0_10_reset_init +ffffffff820c70e0 t smu_v13_0_10_async_reset +ffffffff820c7140 t smu_v13_0_10_get_reset_handler +ffffffff820c71f0 T smu_v13_0_10_reset_fini +ffffffff820c7250 t smu_v13_0_10_mode2_prepare_hwcontext +ffffffff820c73a0 t smu_v13_0_10_mode2_perform_reset +ffffffff820c7430 t smu_v13_0_10_mode2_restore_hwcontext +ffffffff820c7820 t smu_v13_0_10_mode2_reset +ffffffff820c8000 t smuio_v11_0_get_rom_index_offset +ffffffff820c8040 t smuio_v11_0_get_rom_data_offset +ffffffff820c8080 t smuio_v11_0_update_rom_clock_gating +ffffffff820c81d0 t smuio_v11_0_get_clock_gating_state +ffffffff820c9000 t smuio_v11_0_6_get_rom_index_offset +ffffffff820c9040 t smuio_v11_0_6_get_rom_data_offset +ffffffff820c9080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff820c91e0 t smuio_v11_0_6_get_clock_gating_state +ffffffff820ca000 t smuio_v13_0_get_rom_index_offset +ffffffff820ca040 t smuio_v13_0_get_rom_data_offset +ffffffff820ca080 t smuio_v13_0_update_rom_clock_gating +ffffffff820ca1e0 t smuio_v13_0_get_clock_gating_state +ffffffff820ca290 t smuio_v13_0_get_die_id +ffffffff820ca320 t smuio_v13_0_get_socket_id +ffffffff820ca3c0 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff820cb000 t smuio_v13_0_3_get_die_id +ffffffff820cb0a0 t smuio_v13_0_3_get_socket_id +ffffffff820cb140 t smuio_v13_0_3_get_pkg_type +ffffffff820cc000 t smuio_v13_0_6_get_rom_index_offset +ffffffff820cc040 t smuio_v13_0_6_get_rom_data_offset +ffffffff820cd000 t smuio_v9_0_get_rom_index_offset +ffffffff820cd040 t smuio_v9_0_get_rom_data_offset +ffffffff820cd080 t smuio_v9_0_update_rom_clock_gating +ffffffff820cd1e0 t smuio_v9_0_get_clock_gating_state +ffffffff820ce000 T soc15_grbm_select +ffffffff820ce090 T soc15_program_register_sequence +ffffffff820ce2b0 T soc15_set_virt_ops +ffffffff820ce320 t soc15_common_early_init +ffffffff820ce750 t soc15_common_late_init +ffffffff820ce7c0 t soc15_common_sw_init +ffffffff820ce820 t soc15_common_sw_fini +ffffffff820ce880 t soc15_common_hw_init +ffffffff820ce9d0 t soc15_common_hw_fini +ffffffff820cead0 t soc15_common_suspend +ffffffff820ceb10 t soc15_common_resume +ffffffff820cec00 t soc15_common_is_idle +ffffffff820cec30 t soc15_common_wait_for_idle +ffffffff820cec60 t soc15_common_soft_reset +ffffffff820cec90 t soc15_common_set_clockgating_state +ffffffff820cf040 t soc15_common_set_powergating_state +ffffffff820cf070 t soc15_common_get_clockgating_state +ffffffff820cf1b0 t soc15_uvd_ctx_rreg +ffffffff820cf280 t soc15_uvd_ctx_wreg +ffffffff820cf320 t soc15_didt_rreg +ffffffff820cf3e0 t soc15_didt_wreg +ffffffff820cf480 t soc15_gc_cac_rreg +ffffffff820cf5d0 t soc15_gc_cac_wreg +ffffffff820cf710 t soc15_se_cac_rreg +ffffffff820cf860 t soc15_se_cac_wreg +ffffffff820cf9a0 t soc15_read_disabled_bios +ffffffff820cf9d0 t soc15_read_register +ffffffff820cfae0 t soc15_asic_reset +ffffffff820cfcb0 t soc15_asic_reset_method +ffffffff820cfe80 t soc15_get_xclk +ffffffff820cfef0 t soc15_set_uvd_clocks +ffffffff820cff20 t soc15_set_vce_clocks +ffffffff820cff50 t soc15_get_config_memsize +ffffffff820cff70 t soc15_need_full_reset +ffffffff820cffa0 t soc15_get_pcie_usage +ffffffff820d0110 t soc15_need_reset_on_init +ffffffff820d01d0 t soc15_get_pcie_replay_count +ffffffff820d0250 t soc15_supports_baco +ffffffff820d02c0 t soc15_pre_asic_init +ffffffff820d02d0 t soc15_query_video_codecs +ffffffff820d03c0 t vega20_get_pcie_usage +ffffffff820d1000 T soc21_grbm_select +ffffffff820d1090 t soc21_common_early_init +ffffffff820d1210 t soc21_common_late_init +ffffffff820d1310 t soc21_common_sw_init +ffffffff820d1360 t soc21_common_sw_fini +ffffffff820d1390 t soc21_common_hw_init +ffffffff820d1470 t soc21_common_hw_fini +ffffffff820d1520 t soc21_common_suspend +ffffffff820d15d0 t soc21_common_resume +ffffffff820d17e0 t soc21_common_is_idle +ffffffff820d1810 t soc21_common_wait_for_idle +ffffffff820d1840 t soc21_common_soft_reset +ffffffff820d1870 t soc21_common_set_clockgating_state +ffffffff820d1930 t soc21_common_set_powergating_state +ffffffff820d19a0 t soc21_common_get_clockgating_state +ffffffff820d19f0 t soc21_didt_rreg +ffffffff820d1ab0 t soc21_didt_wreg +ffffffff820d1b50 t soc21_read_disabled_bios +ffffffff820d1b80 t soc21_read_register +ffffffff820d1c80 t soc21_asic_reset +ffffffff820d1d70 t soc21_asic_reset_method +ffffffff820d1e50 t soc21_get_xclk +ffffffff820d1e80 t soc21_set_uvd_clocks +ffffffff820d1eb0 t soc21_set_vce_clocks +ffffffff820d1ee0 t soc21_get_config_memsize +ffffffff820d1f00 t soc21_need_full_reset +ffffffff820d1f30 t soc21_init_doorbell_index +ffffffff820d2050 t soc21_need_reset_on_init +ffffffff820d2100 t soc21_pre_asic_init +ffffffff820d2130 t soc21_update_umd_stable_pstate +ffffffff820d21b0 t soc21_query_video_codecs +ffffffff820d3000 t tonga_ih_early_init +ffffffff820d3050 t tonga_ih_sw_init +ffffffff820d30e0 t tonga_ih_sw_fini +ffffffff820d3140 t tonga_ih_hw_init +ffffffff820d33c0 t tonga_ih_hw_fini +ffffffff820d3490 t tonga_ih_suspend +ffffffff820d3560 t tonga_ih_resume +ffffffff820d35a0 t tonga_ih_is_idle +ffffffff820d35f0 t tonga_ih_wait_for_idle +ffffffff820d36a0 t tonga_ih_check_soft_reset +ffffffff820d3700 t tonga_ih_pre_soft_reset +ffffffff820d37e0 t tonga_ih_soft_reset +ffffffff820d38e0 t tonga_ih_post_soft_reset +ffffffff820d3930 t tonga_ih_set_clockgating_state +ffffffff820d3960 t tonga_ih_set_powergating_state +ffffffff820d3990 t tonga_ih_get_wptr +ffffffff820d3ac0 t tonga_ih_decode_iv +ffffffff820d3b40 t tonga_ih_set_rptr +ffffffff820d4000 t umc_v6_0_init_registers +ffffffff820d5000 t umc_v6_1_query_ras_error_count +ffffffff820d55c0 t umc_v6_1_query_ras_error_address +ffffffff820d58f0 t umc_v6_1_err_cnt_init +ffffffff820d6000 T umc_v6_7_convert_error_address +ffffffff820d63a0 t umc_v6_7_query_ras_error_count +ffffffff820d63e0 t umc_v6_7_query_ras_error_address +ffffffff820d6400 t umc_v6_7_query_ras_poison_mode +ffffffff820d6460 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff820d6480 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff820d64a0 t umc_v6_7_query_ecc_error_count +ffffffff820d67a0 t umc_v6_7_reset_error_count_per_channel +ffffffff820d68e0 t umc_v6_7_query_error_address +ffffffff820d6a10 t umc_v6_7_ecc_info_querry_ecc_error_count +ffffffff820d6c20 t umc_v6_7_ecc_info_query_error_address +ffffffff820d7000 t umc_v8_10_query_ras_error_count +ffffffff820d7040 t umc_v8_10_query_ras_error_address +ffffffff820d7060 t umc_v8_10_err_cnt_init +ffffffff820d7080 t umc_v8_10_query_ras_poison_mode +ffffffff820d70b0 t umc_v8_10_ecc_info_query_ras_error_count +ffffffff820d70d0 t umc_v8_10_ecc_info_query_ras_error_address +ffffffff820d70f0 t umc_v8_10_set_eeprom_table_version +ffffffff820d7120 t umc_v8_10_query_ecc_error_count +ffffffff820d7200 t umc_v8_10_clear_error_count_per_channel +ffffffff820d7270 t umc_v8_10_query_error_address +ffffffff820d73b0 t umc_v8_10_convert_error_address +ffffffff820d75e0 t umc_v8_10_err_cnt_init_per_channel +ffffffff820d76b0 t umc_v8_10_ecc_info_query_ecc_error_count +ffffffff820d77a0 t umc_v8_10_ecc_info_query_error_address +ffffffff820d8000 t umc_v8_7_query_ras_error_count +ffffffff820d8370 t umc_v8_7_query_ras_error_address +ffffffff820d8540 t umc_v8_7_err_cnt_init +ffffffff820d86d0 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff820d8800 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff820d9000 t uvd_v5_0_early_init +ffffffff820d9050 t uvd_v5_0_sw_init +ffffffff820d9170 t uvd_v5_0_sw_fini +ffffffff820d91d0 t uvd_v5_0_hw_init +ffffffff820d9780 t uvd_v5_0_hw_fini +ffffffff820d9810 t uvd_v5_0_suspend +ffffffff820d9950 t uvd_v5_0_resume +ffffffff820d99b0 t uvd_v5_0_is_idle +ffffffff820d9a00 t uvd_v5_0_wait_for_idle +ffffffff820d9a90 t uvd_v5_0_soft_reset +ffffffff820d9b80 t uvd_v5_0_set_clockgating_state +ffffffff820d9d80 t uvd_v5_0_set_powergating_state +ffffffff820d9dd0 t uvd_v5_0_get_clockgating_state +ffffffff820d9e70 t uvd_v5_0_ring_get_rptr +ffffffff820d9ec0 t uvd_v5_0_ring_get_wptr +ffffffff820d9f10 t uvd_v5_0_ring_set_wptr +ffffffff820d9f40 t uvd_v5_0_ring_emit_ib +ffffffff820da1e0 t uvd_v5_0_ring_emit_fence +ffffffff820da800 t uvd_v5_0_ring_test_ring +ffffffff820da9d0 t uvd_v5_0_ring_insert_nop +ffffffff820dab30 t uvd_v5_0_set_interrupt_state +ffffffff820dab60 t uvd_v5_0_process_interrupt +ffffffff820dabd0 t uvd_v5_0_stop +ffffffff820dad50 t uvd_v5_0_start +ffffffff820dc000 t uvd_v6_0_early_init +ffffffff820dc190 t uvd_v6_0_sw_init +ffffffff820dc450 t uvd_v6_0_sw_fini +ffffffff820dc520 t uvd_v6_0_hw_init +ffffffff820dcb90 t uvd_v6_0_hw_fini +ffffffff820dcc20 t uvd_v6_0_suspend +ffffffff820dcd60 t uvd_v6_0_resume +ffffffff820dcdc0 t uvd_v6_0_is_idle +ffffffff820dce10 t uvd_v6_0_wait_for_idle +ffffffff820dcea0 t uvd_v6_0_check_soft_reset +ffffffff820dcf30 t uvd_v6_0_pre_soft_reset +ffffffff820dcf80 t uvd_v6_0_soft_reset +ffffffff820dd080 t uvd_v6_0_post_soft_reset +ffffffff820dd150 t uvd_v6_0_set_clockgating_state +ffffffff820dd340 t uvd_v6_0_set_powergating_state +ffffffff820dd3c0 t uvd_v6_0_get_clockgating_state +ffffffff820dd470 t uvd_v6_0_ring_get_rptr +ffffffff820dd4c0 t uvd_v6_0_ring_get_wptr +ffffffff820dd510 t uvd_v6_0_ring_set_wptr +ffffffff820dd540 t uvd_v6_0_ring_emit_ib +ffffffff820dd8e0 t uvd_v6_0_ring_emit_fence +ffffffff820ddf00 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff820de340 t uvd_v6_0_ring_emit_vm_flush +ffffffff820de6e0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff820de710 t uvd_v6_0_ring_test_ring +ffffffff820de8e0 t uvd_v6_0_ring_insert_nop +ffffffff820dea40 t uvd_v6_0_ring_emit_wreg +ffffffff820decf0 t uvd_v6_0_enc_ring_get_rptr +ffffffff820ded50 t uvd_v6_0_enc_ring_get_wptr +ffffffff820dedb0 t uvd_v6_0_enc_ring_set_wptr +ffffffff820dedf0 t uvd_v6_0_enc_ring_emit_ib +ffffffff820df060 t uvd_v6_0_enc_ring_emit_fence +ffffffff820df2c0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff820df490 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff820df6c0 t uvd_v6_0_enc_ring_test_ring +ffffffff820df830 t uvd_v6_0_enc_ring_test_ib +ffffffff820dfd90 t uvd_v6_0_enc_ring_insert_end +ffffffff820dfe20 t uvd_v6_0_set_interrupt_state +ffffffff820dfe50 t uvd_v6_0_process_interrupt +ffffffff820dff50 t uvd_v6_0_stop +ffffffff820e00d0 t uvd_v6_0_start +ffffffff820e1000 t uvd_v7_0_early_init +ffffffff820e1290 t uvd_v7_0_sw_init +ffffffff820e1720 t uvd_v7_0_sw_fini +ffffffff820e1830 t uvd_v7_0_hw_init +ffffffff820e4d00 t uvd_v7_0_hw_fini +ffffffff820e50b0 t uvd_v7_0_suspend +ffffffff820e5190 t uvd_v7_0_resume +ffffffff820e51f0 t uvd_v7_0_set_clockgating_state +ffffffff820e5220 t uvd_v7_0_ring_get_rptr +ffffffff820e52c0 t uvd_v7_0_ring_get_wptr +ffffffff820e5360 t uvd_v7_0_ring_set_wptr +ffffffff820e53e0 t uvd_v7_0_ring_patch_cs_in_place +ffffffff820e5450 t uvd_v7_0_ring_emit_ib +ffffffff820e5840 t uvd_v7_0_ring_emit_fence +ffffffff820e5f00 t uvd_v7_0_ring_emit_vm_flush +ffffffff820e5f70 t uvd_v7_0_ring_emit_hdp_flush +ffffffff820e5fa0 t uvd_v7_0_ring_test_ring +ffffffff820e6270 t uvd_v7_0_ring_insert_nop +ffffffff820e6410 t uvd_v7_0_ring_emit_wreg +ffffffff820e6700 t uvd_v7_0_ring_emit_reg_wait +ffffffff820e6ae0 t uvd_v7_0_enc_ring_get_rptr +ffffffff820e6be0 t uvd_v7_0_enc_ring_get_wptr +ffffffff820e6cf0 t uvd_v7_0_enc_ring_set_wptr +ffffffff820e6df0 t uvd_v7_0_enc_ring_emit_ib +ffffffff820e7060 t uvd_v7_0_enc_ring_emit_fence +ffffffff820e72c0 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff820e7330 t uvd_v7_0_enc_ring_test_ring +ffffffff820e74b0 t uvd_v7_0_enc_ring_test_ib +ffffffff820e7a10 t uvd_v7_0_enc_ring_insert_end +ffffffff820e7aa0 t uvd_v7_0_enc_ring_emit_wreg +ffffffff820e7c00 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff820e7dd0 t uvd_v7_0_set_interrupt_state +ffffffff820e7e00 t uvd_v7_0_process_interrupt +ffffffff820e8000 t vce_v3_0_early_init +ffffffff820e81a0 t vce_v3_0_sw_init +ffffffff820e8340 t vce_v3_0_sw_fini +ffffffff820e83a0 t vce_v3_0_hw_init +ffffffff820e84a0 t vce_v3_0_hw_fini +ffffffff820e85a0 t vce_v3_0_suspend +ffffffff820e86b0 t vce_v3_0_resume +ffffffff820e87d0 t vce_v3_0_is_idle +ffffffff820e8840 t vce_v3_0_wait_for_idle +ffffffff820e8900 t vce_v3_0_check_soft_reset +ffffffff820e8a30 t vce_v3_0_pre_soft_reset +ffffffff820e8b00 t vce_v3_0_soft_reset +ffffffff820e8c00 t vce_v3_0_post_soft_reset +ffffffff820e8cd0 t vce_v3_0_set_clockgating_state +ffffffff820e90b0 t vce_v3_0_set_powergating_state +ffffffff820e9c00 t vce_v3_0_get_clockgating_state +ffffffff820e9cf0 t vce_v3_0_ring_get_rptr +ffffffff820e9de0 t vce_v3_0_ring_get_wptr +ffffffff820e9ed0 t vce_v3_0_ring_set_wptr +ffffffff820e9fa0 t vce_v3_0_ring_emit_ib +ffffffff820ea210 t vce_v3_0_emit_pipeline_sync +ffffffff820ea3e0 t vce_v3_0_emit_vm_flush +ffffffff820ea680 t vce_v3_0_set_interrupt_state +ffffffff820ea700 t vce_v3_0_process_interrupt +ffffffff820ea7e0 t vce_v3_0_stop +ffffffff820eb000 t vce_v4_0_early_init +ffffffff820eb0c0 t vce_v4_0_sw_init +ffffffff820eb3d0 t vce_v4_0_sw_fini +ffffffff820eb470 t vce_v4_0_hw_init +ffffffff820ebcc0 t vce_v4_0_hw_fini +ffffffff820ebe30 t vce_v4_0_suspend +ffffffff820ebfa0 t vce_v4_0_resume +ffffffff820ec070 t vce_v4_0_set_clockgating_state +ffffffff820ec0a0 t vce_v4_0_set_powergating_state +ffffffff820ec1b0 t vce_v4_0_ring_get_rptr +ffffffff820ec220 t vce_v4_0_ring_get_wptr +ffffffff820ec2b0 t vce_v4_0_ring_set_wptr +ffffffff820ec340 t vce_v4_0_ring_emit_ib +ffffffff820ec5b0 t vce_v4_0_ring_emit_fence +ffffffff820ec810 t vce_v4_0_emit_vm_flush +ffffffff820ec880 t vce_v4_0_ring_insert_end +ffffffff820ec910 t vce_v4_0_emit_wreg +ffffffff820eca70 t vce_v4_0_emit_reg_wait +ffffffff820ecc40 t vce_v4_0_set_interrupt_state +ffffffff820eccd0 t vce_v4_0_process_interrupt +ffffffff820ecd80 t vce_v4_0_start +ffffffff820ee000 T vcn_dec_sw_ring_emit_fence +ffffffff820ee260 T vcn_dec_sw_ring_insert_end +ffffffff820ee2f0 T vcn_dec_sw_ring_emit_ib +ffffffff820ee560 T vcn_dec_sw_ring_emit_reg_wait +ffffffff820ee730 T vcn_dec_sw_ring_emit_vm_flush +ffffffff820ee7a0 T vcn_dec_sw_ring_emit_wreg +ffffffff820ef000 T vcn_v1_0_set_pg_for_begin_use +ffffffff820ef160 T vcn_v1_0_ring_end_use +ffffffff820ef1d0 t vcn_v1_0_early_init +ffffffff820ef340 t vcn_v1_0_sw_init +ffffffff820ef640 t vcn_v1_0_sw_fini +ffffffff820ef6b0 t vcn_v1_0_hw_init +ffffffff820ef7b0 t vcn_v1_0_hw_fini +ffffffff820ef8d0 t vcn_v1_0_suspend +ffffffff820ef960 t vcn_v1_0_resume +ffffffff820efa80 t vcn_v1_0_is_idle +ffffffff820efb20 t vcn_v1_0_wait_for_idle +ffffffff820efb60 t vcn_v1_0_set_clockgating_state +ffffffff820efc30 t vcn_v1_0_set_powergating_state +ffffffff820f02a0 t vcn_v1_0_dec_ring_get_rptr +ffffffff820f0330 t vcn_v1_0_dec_ring_get_wptr +ffffffff820f03c0 t vcn_v1_0_dec_ring_set_wptr +ffffffff820f04e0 t vcn_v1_0_ring_patch_cs_in_place +ffffffff820f06d0 t vcn_v1_0_dec_ring_emit_ib +ffffffff820f0aa0 t vcn_v1_0_dec_ring_emit_fence +ffffffff820f1130 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff820f11a0 t vcn_v1_0_dec_ring_insert_nop +ffffffff820f1340 t vcn_v1_0_dec_ring_insert_start +ffffffff820f1530 t vcn_v1_0_dec_ring_insert_end +ffffffff820f1640 t vcn_v1_0_ring_begin_use +ffffffff820f1700 t vcn_v1_0_dec_ring_emit_wreg +ffffffff820f19e0 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff820f1da0 t vcn_v1_0_enc_ring_get_rptr +ffffffff820f1e80 t vcn_v1_0_enc_ring_get_wptr +ffffffff820f1f60 t vcn_v1_0_enc_ring_set_wptr +ffffffff820f2020 t vcn_v1_0_enc_ring_emit_ib +ffffffff820f2290 t vcn_v1_0_enc_ring_emit_fence +ffffffff820f24f0 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff820f2560 t vcn_v1_0_enc_ring_insert_end +ffffffff820f25f0 t vcn_v1_0_enc_ring_emit_wreg +ffffffff820f2750 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff820f2920 t vcn_v1_0_set_interrupt_state +ffffffff820f2950 t vcn_v1_0_process_interrupt +ffffffff820f2a10 t vcn_v1_0_idle_work_handler +ffffffff820f2bc0 t vcn_v1_0_pause_dpg_mode +ffffffff820f3c90 t vcn_v1_0_enable_clock_gating +ffffffff820f4130 t vcn_v1_0_disable_clock_gating +ffffffff820f4790 t vcn_1_0_enable_static_power_gating +ffffffff820f4960 t vcn_v1_0_start_dpg_mode +ffffffff820f9190 t vcn_v1_0_start_spg_mode +ffffffff820fb9f0 t vcn_v1_0_clock_gating_dpg_mode +ffffffff820fd000 T vcn_v2_0_dec_ring_insert_start +ffffffff820fd1d0 T vcn_v2_0_dec_ring_insert_end +ffffffff820fd2d0 T vcn_v2_0_dec_ring_insert_nop +ffffffff820fd450 T vcn_v2_0_dec_ring_emit_fence +ffffffff820fda80 T vcn_v2_0_dec_ring_emit_ib +ffffffff820fde20 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff820fe1b0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff820fe220 T vcn_v2_0_dec_ring_emit_wreg +ffffffff820fe4d0 T vcn_v2_0_enc_ring_emit_fence +ffffffff820fe730 T vcn_v2_0_enc_ring_insert_end +ffffffff820fe7c0 T vcn_v2_0_enc_ring_emit_ib +ffffffff820fea30 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff820fec00 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff820fec70 T vcn_v2_0_enc_ring_emit_wreg +ffffffff820fedd0 T vcn_v2_0_dec_ring_test_ring +ffffffff820ff0b0 t vcn_v2_0_early_init +ffffffff820ff220 t vcn_v2_0_sw_init +ffffffff820ff5c0 t vcn_v2_0_sw_fini +ffffffff820ff670 t vcn_v2_0_hw_init +ffffffff821000b0 t vcn_v2_0_hw_fini +ffffffff821001d0 t vcn_v2_0_suspend +ffffffff82100200 t vcn_v2_0_resume +ffffffff82100260 t vcn_v2_0_is_idle +ffffffff82100300 t vcn_v2_0_wait_for_idle +ffffffff82100340 t vcn_v2_0_set_clockgating_state +ffffffff821003f0 t vcn_v2_0_set_powergating_state +ffffffff82100ab0 t vcn_v2_0_dec_ring_get_rptr +ffffffff82100b40 t vcn_v2_0_dec_ring_get_wptr +ffffffff82100bf0 t vcn_v2_0_dec_ring_set_wptr +ffffffff82100d30 t vcn_v2_0_enc_ring_get_rptr +ffffffff82100e10 t vcn_v2_0_enc_ring_get_wptr +ffffffff82100f10 t vcn_v2_0_enc_ring_set_wptr +ffffffff82101000 t vcn_v2_0_set_interrupt_state +ffffffff82101030 t vcn_v2_0_process_interrupt +ffffffff821010f0 t vcn_v2_0_pause_dpg_mode +ffffffff821019c0 t vcn_v2_0_enable_clock_gating +ffffffff82101c80 t vcn_v2_0_disable_clock_gating +ffffffff82102110 t vcn_v2_0_start +ffffffff821070e0 t vcn_v2_0_enable_static_power_gating +ffffffff82107260 t vcn_v2_0_clock_gating_dpg_mode +ffffffff82108140 t vcn_v2_0_mc_resume_dpg_mode +ffffffff8210d000 t vcn_v2_6_query_poison_status +ffffffff8210d0e0 t vcn_v2_5_early_init +ffffffff8210d3e0 t vcn_v2_5_sw_init +ffffffff8210d930 t vcn_v2_5_sw_fini +ffffffff8210da20 t vcn_v2_5_hw_init +ffffffff8210e530 t vcn_v2_5_hw_fini +ffffffff8210e6e0 t vcn_v2_5_suspend +ffffffff8210e710 t vcn_v2_5_resume +ffffffff8210e770 t vcn_v2_5_is_idle +ffffffff8210e870 t vcn_v2_5_wait_for_idle +ffffffff8210e920 t vcn_v2_5_set_clockgating_state +ffffffff8210e9b0 t vcn_v2_5_set_powergating_state +ffffffff821111b0 t vcn_v2_5_dec_ring_get_rptr +ffffffff82111250 t vcn_v2_5_dec_ring_get_wptr +ffffffff82111310 t vcn_v2_5_dec_ring_set_wptr +ffffffff821113c0 t vcn_v2_5_enc_ring_get_rptr +ffffffff821114c0 t vcn_v2_5_enc_ring_get_wptr +ffffffff821115d0 t vcn_v2_5_enc_ring_set_wptr +ffffffff821116e0 t vcn_v2_5_set_interrupt_state +ffffffff82111710 t vcn_v2_5_process_interrupt +ffffffff82111830 t vcn_v2_6_set_ras_interrupt_state +ffffffff82111860 t vcn_v2_5_pause_dpg_mode +ffffffff821120a0 t vcn_v2_5_enable_clock_gating +ffffffff82112400 t vcn_v2_5_disable_clock_gating +ffffffff82112970 t vcn_v2_5_start_dpg_mode +ffffffff82116910 t vcn_v2_5_clock_gating_dpg_mode +ffffffff82117820 t vcn_v2_5_mc_resume_dpg_mode +ffffffff8211d000 t vcn_v3_0_early_init +ffffffff8211d230 t vcn_v3_0_sw_init +ffffffff8211d750 t vcn_v3_0_sw_fini +ffffffff8211d850 t vcn_v3_0_hw_init +ffffffff8211e470 t vcn_v3_0_hw_fini +ffffffff8211e590 t vcn_v3_0_suspend +ffffffff8211e5c0 t vcn_v3_0_resume +ffffffff8211e620 t vcn_v3_0_is_idle +ffffffff8211e720 t vcn_v3_0_wait_for_idle +ffffffff8211e7d0 t vcn_v3_0_set_clockgating_state +ffffffff8211e8f0 t vcn_v3_0_set_powergating_state +ffffffff821214e0 t vcn_v3_0_dec_ring_get_rptr +ffffffff82121580 t vcn_v3_0_dec_ring_get_wptr +ffffffff82121640 t vcn_v3_0_dec_ring_set_wptr +ffffffff821217b0 t vcn_v3_0_ring_patch_cs_in_place +ffffffff82121b30 t vcn_v3_0_enc_ring_get_rptr +ffffffff82121c30 t vcn_v3_0_enc_ring_get_wptr +ffffffff82121d40 t vcn_v3_0_enc_ring_set_wptr +ffffffff82121e50 t vcn_v3_0_set_interrupt_state +ffffffff82121e80 t vcn_v3_0_process_interrupt +ffffffff82121fa0 t vcn_v3_0_pause_dpg_mode +ffffffff821228c0 t vcn_v3_0_enable_clock_gating +ffffffff82122b90 t vcn_v3_0_disable_clock_gating +ffffffff82123150 t vcn_v3_0_start_dpg_mode +ffffffff82126960 t vcn_v3_0_clock_gating_dpg_mode +ffffffff821278a0 t vcn_v3_0_mc_resume_dpg_mode +ffffffff8212d000 t vcn_v4_0_query_ras_poison_status +ffffffff8212d0e0 t vcn_v4_0_early_init +ffffffff8212d2b0 t vcn_v4_0_sw_init +ffffffff8212d5b0 t vcn_v4_0_sw_fini +ffffffff8212d6b0 t vcn_v4_0_hw_init +ffffffff8212e1a0 t vcn_v4_0_hw_fini +ffffffff8212e310 t vcn_v4_0_suspend +ffffffff8212e340 t vcn_v4_0_resume +ffffffff8212e3a0 t vcn_v4_0_is_idle +ffffffff8212e4b0 t vcn_v4_0_wait_for_idle +ffffffff8212e570 t vcn_v4_0_set_clockgating_state +ffffffff8212e6a0 t vcn_v4_0_set_powergating_state +ffffffff8212f010 t vcn_v4_0_unified_ring_get_rptr +ffffffff8212f0f0 t vcn_v4_0_unified_ring_get_wptr +ffffffff8212f1f0 t vcn_v4_0_unified_ring_set_wptr +ffffffff8212f2f0 t vcn_v4_0_ring_patch_cs_in_place +ffffffff8212f6e0 t vcn_v4_0_limit_sched +ffffffff8212f750 t vcn_v4_0_set_interrupt_state +ffffffff8212f780 t vcn_v4_0_process_interrupt +ffffffff8212f850 t vcn_v4_0_set_ras_interrupt_state +ffffffff8212f880 t vcn_v4_0_pause_dpg_mode +ffffffff8212fb40 t vcn_v4_0_enable_clock_gating +ffffffff8212fe70 t vcn_v4_0_disable_clock_gating +ffffffff821303b0 t vcn_v4_0_start +ffffffff82135940 t vcn_v4_0_disable_clock_gating_dpg_mode +ffffffff82136880 t vcn_v4_0_mc_resume_dpg_mode +ffffffff8213c000 t vcn_v4_0_3_early_init +ffffffff8213c110 t vcn_v4_0_3_sw_init +ffffffff8213c410 t vcn_v4_0_3_sw_fini +ffffffff8213c4e0 t vcn_v4_0_3_hw_init +ffffffff8213d2f0 t vcn_v4_0_3_hw_fini +ffffffff8213d390 t vcn_v4_0_3_suspend +ffffffff8213d410 t vcn_v4_0_3_resume +ffffffff8213d470 t vcn_v4_0_3_is_idle +ffffffff8213d610 t vcn_v4_0_3_wait_for_idle +ffffffff8213d730 t vcn_v4_0_3_set_clockgating_state +ffffffff8213d900 t vcn_v4_0_3_set_powergating_state +ffffffff8213e0d0 t vcn_v4_0_3_unified_ring_get_rptr +ffffffff8213e270 t vcn_v4_0_3_unified_ring_get_wptr +ffffffff8213e430 t vcn_v4_0_3_unified_ring_set_wptr +ffffffff8213e600 t vcn_v4_0_3_set_interrupt_state +ffffffff8213e630 t vcn_v4_0_3_process_interrupt +ffffffff8213e770 t vcn_v4_0_3_query_ras_error_count +ffffffff8213e890 t vcn_v4_0_3_reset_ras_error_count +ffffffff8213e9a0 t vcn_v4_0_3_pause_dpg_mode +ffffffff8213e9d0 t vcn_v4_0_3_enable_clock_gating +ffffffff8213ed30 t vcn_v4_0_3_disable_clock_gating +ffffffff8213f2a0 t vcn_v4_0_3_start +ffffffff82144360 t vcn_v4_0_3_disable_clock_gating_dpg_mode +ffffffff82145270 t vcn_v4_0_3_mc_resume_dpg_mode +ffffffff8214b000 t vega10_ih_early_init +ffffffff8214b050 t vega10_ih_sw_init +ffffffff8214b330 t vega10_ih_sw_fini +ffffffff8214b370 t vega10_ih_hw_init +ffffffff8214b780 t vega10_ih_hw_fini +ffffffff8214b7e0 t vega10_ih_suspend +ffffffff8214b840 t vega10_ih_resume +ffffffff8214b850 t vega10_ih_is_idle +ffffffff8214b880 t vega10_ih_wait_for_idle +ffffffff8214b8b0 t vega10_ih_soft_reset +ffffffff8214b8e0 t vega10_ih_set_clockgating_state +ffffffff8214ba40 t vega10_ih_set_powergating_state +ffffffff8214ba70 t vega10_ih_get_wptr +ffffffff8214bbd0 t vega10_ih_set_rptr +ffffffff8214bcc0 t vega10_ih_self_irq +ffffffff8214bd40 t vega10_ih_toggle_interrupts +ffffffff8214c000 T vega10_reg_base_init +ffffffff8214c150 T vega10_doorbell_index_init +ffffffff8214d000 t vega20_ih_early_init +ffffffff8214d050 t vega20_ih_sw_init +ffffffff8214d360 t vega20_ih_sw_fini +ffffffff8214d3a0 t vega20_ih_hw_init +ffffffff8214da80 t vega20_ih_hw_fini +ffffffff8214dae0 t vega20_ih_suspend +ffffffff8214db40 t vega20_ih_resume +ffffffff8214db50 t vega20_ih_is_idle +ffffffff8214db80 t vega20_ih_wait_for_idle +ffffffff8214dbb0 t vega20_ih_soft_reset +ffffffff8214dbe0 t vega20_ih_set_clockgating_state +ffffffff8214dd20 t vega20_ih_set_powergating_state +ffffffff8214dd50 t vega20_ih_get_wptr +ffffffff8214deb0 t vega20_ih_set_rptr +ffffffff8214dfa0 t vega20_ih_self_irq +ffffffff8214e020 t vega20_ih_toggle_interrupts +ffffffff8214f000 T vega20_reg_base_init +ffffffff8214f160 T vega20_doorbell_index_init +ffffffff82150000 T vi_srbm_select +ffffffff82150050 T vi_set_virt_ops +ffffffff82150090 T vi_set_ip_blocks +ffffffff82150640 T legacy_doorbell_index_init +ffffffff821506f0 t vi_common_early_init +ffffffff821509f0 t vi_common_late_init +ffffffff82150a40 t vi_common_sw_init +ffffffff82150a90 t vi_common_sw_fini +ffffffff82150ac0 t vi_common_hw_init +ffffffff821512a0 t vi_common_hw_fini +ffffffff82151320 t vi_common_suspend +ffffffff821513a0 t vi_common_resume +ffffffff821513e0 t vi_common_is_idle +ffffffff82151410 t vi_common_wait_for_idle +ffffffff82151440 t vi_common_soft_reset +ffffffff82151470 t vi_common_set_clockgating_state +ffffffff82151a70 t vi_common_set_powergating_state +ffffffff82151aa0 t vi_common_get_clockgating_state +ffffffff82151b90 t cz_smc_rreg +ffffffff82151c30 t cz_smc_wreg +ffffffff82151cb0 t vi_smc_rreg +ffffffff82151d60 t vi_smc_wreg +ffffffff82151df0 t vi_pcie_rreg +ffffffff82151eb0 t vi_pcie_wreg +ffffffff82151f70 t vi_uvd_ctx_rreg +ffffffff82152020 t vi_uvd_ctx_wreg +ffffffff821520b0 t vi_didt_rreg +ffffffff82152150 t vi_didt_wreg +ffffffff821521d0 t vi_gc_cac_rreg +ffffffff82152270 t vi_gc_cac_wreg +ffffffff821522f0 t vi_read_disabled_bios +ffffffff82152530 t vi_read_bios_from_rom +ffffffff82152660 t vi_read_register +ffffffff82152940 t vi_asic_reset +ffffffff82152ae0 t vi_asic_reset_method +ffffffff82152ba0 t vi_get_xclk +ffffffff82152c60 t vi_set_uvd_clocks +ffffffff82152d20 t vi_set_vce_clocks +ffffffff821530a0 t vi_get_config_memsize +ffffffff821530c0 t vi_flush_hdp +ffffffff82153140 t vi_invalidate_hdp +ffffffff821531c0 t vi_need_full_reset +ffffffff82153210 t vi_get_pcie_usage +ffffffff82153370 t vi_need_reset_on_init +ffffffff82153410 t vi_get_pcie_replay_count +ffffffff82153490 t vi_asic_supports_baco +ffffffff821534e0 t vi_pre_asic_init +ffffffff82153510 t vi_query_video_codecs +ffffffff821535b0 t vi_set_uvd_clock +ffffffff82154000 T amdgpu_xcp_drm_dev_alloc +ffffffff82154060 T amdgpu_xcp_drv_release +ffffffff82155000 T amdgpu_dm_find_first_crtc_matching_connector +ffffffff82155070 T amdgpu_dm_update_connector_after_detect +ffffffff82155680 T amdgpu_dm_update_freesync_caps +ffffffff82155c40 T dm_atomic_get_state +ffffffff82155cb0 T amdgpu_dm_connector_atomic_set_property +ffffffff82155d70 T amdgpu_dm_connector_atomic_get_property +ffffffff82155e10 T amdgpu_dm_connector_funcs_reset +ffffffff82155f10 T amdgpu_dm_connector_atomic_duplicate_state +ffffffff82156020 T create_validate_stream_for_sink +ffffffff82157950 T amdgpu_dm_connector_mode_valid +ffffffff82157b50 T convert_dc_color_depth_into_bpc +ffffffff82157b90 t dm_encoder_helper_disable +ffffffff82157bc0 t dm_encoder_helper_atomic_check +ffffffff82157dd0 T amdgpu_dm_connector_init_helper +ffffffff821581c0 T amdgpu_dm_get_encoder_crtc_mask +ffffffff82158210 T dm_restore_drm_connector_state +ffffffff821583a0 t parse_hdmi_amd_vsdb +ffffffff82158750 T amdgpu_dm_trigger_timing_sync +ffffffff82158930 T dm_write_reg_func +ffffffff82158950 T dm_read_reg_func +ffffffff82158a00 T amdgpu_dm_process_dmub_aux_transfer_sync +ffffffff82158c70 T amdgpu_dm_process_dmub_set_config_sync +ffffffff82158e10 T check_seamless_boot_capability +ffffffff82158e60 T dm_execute_dmub_cmd +ffffffff82158e80 T dm_execute_dmub_cmd_list +ffffffff82158ea0 t dm_early_init +ffffffff82159270 t dm_late_init +ffffffff82159570 t dm_sw_init +ffffffff82159b90 t dm_sw_fini +ffffffff82159c60 t amdgpu_dm_early_fini +ffffffff82159cc0 t dm_hw_init +ffffffff8215bcb0 t dm_hw_fini +ffffffff8215bd20 t dm_suspend +ffffffff8215c160 t dm_resume +ffffffff8215cbc0 t dm_is_idle +ffffffff8215cbf0 t dm_wait_for_idle +ffffffff8215cc20 t dm_check_soft_reset +ffffffff8215cc50 t dm_soft_reset +ffffffff8215cc80 t dm_set_clockgating_state +ffffffff8215ccb0 t dm_set_powergating_state +ffffffff8215cce0 t dm_bandwidth_update +ffffffff8215cd10 t dm_vblank_get_counter +ffffffff8215cd90 t dm_crtc_get_scanoutpos +ffffffff8215ce80 t amdgpu_dm_dmub_reg_read +ffffffff8215cf30 t amdgpu_dm_dmub_reg_write +ffffffff8215cf60 t dm_dmub_hw_init +ffffffff8215d3c0 t dmub_aux_setconfig_callback +ffffffff8215d470 t amdgpu_dm_fini +ffffffff8215d6c0 t emulated_link_detect +ffffffff8215d7d0 t amdgpu_dm_atomic_check +ffffffff8215e6c0 t dm_update_plane_state +ffffffff8215ed70 t dm_update_crtc_state +ffffffff8215f860 t dm_check_crtc_cursor +ffffffff8215fbe0 t is_scaling_state_different +ffffffff8215fc80 t do_aquire_global_lock +ffffffff8215ff50 t dm_update_mst_vcpi_slots_for_dsc +ffffffff82160160 t dm_atomic_destroy_state +ffffffff821601a0 t dm_check_cursor_fb +ffffffff82160350 t fill_dc_plane_attributes +ffffffff82160600 t fill_dc_plane_info_and_addr +ffffffff82160950 t fill_hdr_info_packet +ffffffff82160ac0 t is_timing_unchanged_for_freesync +ffffffff82160bf0 t get_highest_refresh_rate_mode +ffffffff82160d50 t update_stream_scaling_settings +ffffffff82160ea0 t amdgpu_dm_atomic_commit_tail +ffffffff82164060 t amdgpu_dm_backlight_set_level +ffffffff82164260 t dm_atomic_duplicate_state +ffffffff82164320 t amdgpu_dm_audio_component_bind +ffffffff82164390 t amdgpu_dm_audio_component_unbind +ffffffff821643f0 t amdgpu_dm_audio_component_get_eld +ffffffff82164550 t dm_dmub_outbox1_low_irq +ffffffff82164890 t dm_handle_hpd_work +ffffffff82164920 t amdgpu_dm_encoder_destroy +ffffffff82164960 t amdgpu_dm_i2c_xfer +ffffffff82164ac0 t amdgpu_dm_i2c_func +ffffffff82164af0 t amdgpu_dm_connector_detect +ffffffff82164bb0 t amdgpu_dm_connector_funcs_force +ffffffff82164ca0 t amdgpu_dm_connector_late_register +ffffffff82164e20 t amdgpu_dm_connector_unregister +ffffffff82164e40 t amdgpu_dm_connector_destroy +ffffffff82164f50 t amdgpu_dm_backlight_update_status +ffffffff82164fe0 t amdgpu_dm_backlight_get_brightness +ffffffff821651e0 t get_modes +ffffffff821651f0 t amdgpu_dm_connector_atomic_check +ffffffff82165350 t amdgpu_dm_connector_get_modes +ffffffff821659d0 t dm_crtc_high_irq +ffffffff82165b90 t dm_vupdate_high_irq +ffffffff82165d40 t dm_pflip_high_irq +ffffffff82165f90 t register_hpd_handlers +ffffffff821660b0 t dmub_hpd_callback +ffffffff82166270 t handle_hpd_irq +ffffffff82166280 t handle_hpd_rx_irq +ffffffff82166630 t handle_hpd_irq_helper +ffffffff821667f0 t schedule_hpd_rx_offload_work +ffffffff821668c0 t dm_handle_hpd_rx_offload_work +ffffffff82166ca0 t dm_gpureset_toggle_interrupts +ffffffff82166ee0 t s3_handle_mst +ffffffff82168000 T amdgpu_dm_init_color_mod +ffffffff82168010 T amdgpu_dm_verify_lut_sizes +ffffffff821680f0 T amdgpu_dm_update_crtc_color_mgmt +ffffffff821687e0 T amdgpu_dm_update_plane_color_mgmt +ffffffff82169000 T amdgpu_dm_crtc_handle_vblank +ffffffff82169090 T amdgpu_dm_crtc_modeset_required +ffffffff821690d0 T amdgpu_dm_crtc_vrr_active_irq +ffffffff82169110 T amdgpu_dm_crtc_set_vupdate_irq +ffffffff821691d0 T amdgpu_dm_crtc_vrr_active +ffffffff82169210 T amdgpu_dm_crtc_enable_vblank +ffffffff82169230 t dm_set_vblank +ffffffff821694f0 T amdgpu_dm_crtc_disable_vblank +ffffffff82169510 T amdgpu_dm_crtc_init +ffffffff82169730 t vblank_control_worker +ffffffff82169880 t dm_crtc_reset_state +ffffffff82169930 t amdgpu_dm_crtc_destroy +ffffffff82169970 t dm_crtc_duplicate_state +ffffffff82169b40 t dm_crtc_destroy_state +ffffffff82169b90 t dm_crtc_helper_mode_fixup +ffffffff82169bc0 t dm_crtc_helper_disable +ffffffff82169bf0 t dm_crtc_helper_atomic_check +ffffffff8216a000 T hdcp_update_display +ffffffff8216a2d0 t process_output +ffffffff8216a430 T hdcp_reset_display +ffffffff8216a5c0 T hdcp_handle_cpirq +ffffffff8216a5f0 T hdcp_destroy +ffffffff8216a720 T hdcp_create_workqueue +ffffffff8216ab90 t event_cpirq +ffffffff8216ac00 t event_property_update +ffffffff8216ae70 t event_callback +ffffffff8216af20 t event_watchdog_timer +ffffffff8216afd0 t event_property_validate +ffffffff8216b180 t lp_write_i2c +ffffffff8216b210 t lp_read_i2c +ffffffff8216b2c0 t lp_write_dpcd +ffffffff8216b2f0 t lp_read_dpcd +ffffffff8216b320 t update_config +ffffffff8216b6d0 t enable_assr +ffffffff8216b820 t __delayed_work_tick +ffffffff8216c000 T dm_helpers_parse_edid_caps +ffffffff8216c290 T dm_helpers_dp_update_branch_info +ffffffff8216c2c0 T dm_helpers_dp_mst_write_payload_allocation_table +ffffffff8216c6d0 T dm_helpers_dp_mst_poll_pending_down_reply +ffffffff8216c700 T dm_helpers_dp_mst_clear_payload_allocation_table +ffffffff8216c730 T dm_helpers_dp_mst_poll_for_allocation_change_trigger +ffffffff8216c7b0 T dm_helpers_dp_mst_send_payload_allocation +ffffffff8216c890 T dm_dtn_log_begin +ffffffff8216c8e0 T dm_dtn_log_append_v +ffffffff8216ca60 T dm_dtn_log_end +ffffffff8216cab0 T dm_helpers_dp_mst_start_top_mgr +ffffffff8216cb90 T dm_helpers_dp_mst_stop_top_mgr +ffffffff8216cc40 T dm_helpers_dp_read_dpcd +ffffffff8216cce0 T dm_helpers_dp_write_dpcd +ffffffff8216cd70 T dm_helpers_submit_i2c +ffffffff8216cec0 T dm_helpers_dp_write_dsc_enable +ffffffff8216d600 T dm_helpers_is_dp_sink_present +ffffffff8216d6b0 T dm_helpers_read_local_edid +ffffffff8216d960 T dm_helper_dmub_aux_transfer_sync +ffffffff8216d9b0 T dm_helpers_dmub_set_config_sync +ffffffff8216d9d0 T dm_set_dcn_clocks +ffffffff8216da00 T dm_helpers_smu_timeout +ffffffff8216da30 T dm_helpers_init_panel_settings +ffffffff8216daa0 T dm_helpers_override_panel_settings +ffffffff8216dae0 T dm_helpers_allocate_gpu_mem +ffffffff8216dbf0 T dm_helpers_free_gpu_mem +ffffffff8216dc90 T dm_helpers_dmub_outbox_interrupt_control +ffffffff8216dd30 T dm_helpers_mst_enable_stream_features +ffffffff8216de60 T dm_helpers_dp_handle_test_pattern_request +ffffffff8216e1b0 T dm_set_phyd32clk +ffffffff8216e1e0 T dm_helpers_enable_periodic_detection +ffffffff8216e210 T dm_helpers_dp_mst_update_branch_bandwidth +ffffffff8216e240 T dm_get_adaptive_sync_support_type +ffffffff8216e2b0 t execute_synaptics_rc_command +ffffffff8216f000 T amdgpu_dm_irq_register_interrupt +ffffffff8216f1d0 t dm_irq_work_func +ffffffff8216f1f0 T amdgpu_dm_irq_unregister_interrupt +ffffffff8216f3b0 T amdgpu_dm_irq_init +ffffffff8216f4b0 T amdgpu_dm_irq_fini +ffffffff8216f680 T amdgpu_dm_irq_suspend +ffffffff8216f7d0 T amdgpu_dm_irq_resume_early +ffffffff8216f9a0 T amdgpu_dm_irq_resume_late +ffffffff8216fb70 T amdgpu_dm_set_irq_funcs +ffffffff8216fc30 T amdgpu_dm_outbox_init +ffffffff8216fc60 T amdgpu_dm_hpd_init +ffffffff8216fd30 T amdgpu_dm_hpd_fini +ffffffff8216fe00 t amdgpu_dm_set_crtc_irq_state +ffffffff8216fe90 t amdgpu_dm_irq_handler +ffffffff821700f0 t amdgpu_dm_set_vline0_irq_state +ffffffff82170180 t amdgpu_dm_set_dmub_outbox_irq_state +ffffffff821701e0 t amdgpu_dm_set_vupdate_irq_state +ffffffff82170270 t amdgpu_dm_set_dmub_trace_irq_state +ffffffff821702d0 t amdgpu_dm_set_pflip_irq_state +ffffffff82170360 t amdgpu_dm_set_hpd_irq_state +ffffffff82171000 T needs_dsc_aux_workaround +ffffffff82171050 T dm_dp_create_fake_mst_encoders +ffffffff82171110 T dm_handle_mst_sideband_msg_ready_event +ffffffff821713b0 T amdgpu_dm_initialize_dp_connector +ffffffff821714d0 t kasprintf +ffffffff821715b0 t dm_dp_aux_transfer +ffffffff82171700 T dm_mst_get_pbn_divider +ffffffff82171770 T compute_mst_dsc_configs_for_state +ffffffff82171a30 t is_dsc_need_re_compute +ffffffff82171c00 t compute_mst_dsc_configs_for_link +ffffffff821722c0 T pre_validate_dsc +ffffffff821728e0 T dm_dp_mst_is_port_support_mode +ffffffff82172b80 t amdgpu_dm_encoder_destroy +ffffffff82172b90 t dm_dp_add_mst_connector +ffffffff82172dc0 t dm_handle_mst_down_rep_msg_ready +ffffffff82172de0 t amdgpu_dm_mst_connector_late_register +ffffffff82172e30 t amdgpu_dm_mst_connector_early_unregister +ffffffff82172f20 t dm_dp_mst_connector_destroy +ffffffff82172fc0 t dm_dp_mst_get_modes +ffffffff82173570 t dm_dp_mst_detect +ffffffff82173780 t dm_mst_atomic_best_encoder +ffffffff821737e0 t dm_dp_mst_atomic_check +ffffffff82173810 t set_dsc_configs_from_fairness_vars +ffffffff82173b00 t increase_dsc_bpp +ffffffff821740a0 t try_disable_dsc +ffffffff82175000 T amdgpu_dm_plane_get_format_info +ffffffff82175020 T amdgpu_dm_plane_fill_blending_from_plane_state +ffffffff82175120 T amdgpu_dm_plane_fill_plane_buffer_attributes +ffffffff821756a0 T amdgpu_dm_plane_helper_check_state +ffffffff821758c0 T amdgpu_dm_plane_fill_dc_scaling_info +ffffffff82175b20 T amdgpu_dm_plane_handle_cursor_update +ffffffff82175df0 T amdgpu_dm_plane_init +ffffffff82176da0 T is_video_format +ffffffff82176df0 t dm_drm_plane_reset +ffffffff82176e90 t dm_drm_plane_duplicate_state +ffffffff82176f30 t dm_drm_plane_destroy_state +ffffffff82176f70 t dm_plane_format_mod_supported +ffffffff821770a0 t dm_plane_helper_prepare_fb +ffffffff82177420 t dm_plane_helper_cleanup_fb +ffffffff821774d0 t dm_plane_atomic_check +ffffffff821775c0 t dm_plane_atomic_async_check +ffffffff82177600 t dm_plane_atomic_async_update +ffffffff821776b0 t amdgpu_bo_reserve +ffffffff821778f0 t amdgpu_bo_unreserve +ffffffff82178000 T dm_pp_apply_display_requirements +ffffffff821781f0 T dm_pp_get_clock_levels_by_type +ffffffff821785b0 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff821787a0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff82178990 T dm_pp_notify_wm_clock_changes +ffffffff821789f0 T dm_pp_apply_power_level_change_request +ffffffff82178a20 T dm_pp_apply_clock_for_voltage_request +ffffffff82178ad0 T dm_pp_get_static_clocks +ffffffff82178ba0 T dm_pp_get_funcs +ffffffff82178cb0 t pp_rv_set_wm_ranges +ffffffff82178e40 t pp_rv_set_pme_wa_enable +ffffffff82178e60 t pp_rv_set_active_display_count +ffffffff82178e80 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff82178ea0 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff82178ec0 t pp_rv_set_hard_min_fclk_by_freq +ffffffff82178ee0 t pp_nv_set_display_count +ffffffff82178f40 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff82178fb0 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff82179010 t pp_nv_set_voltage_by_freq +ffffffff821790b0 t pp_nv_set_wm_ranges +ffffffff82179100 t pp_nv_set_hard_min_uclk_by_freq +ffffffff82179170 t pp_nv_get_maximum_sustainable_clocks +ffffffff821791d0 t pp_nv_get_uclk_dpm_states +ffffffff82179230 t pp_nv_set_pstate_handshake_support +ffffffff82179290 t pp_rn_set_wm_ranges +ffffffff821792e0 t pp_rn_get_dpm_clock_table +ffffffff8217a000 T amdgpu_dm_set_psr_caps +ffffffff8217a160 T amdgpu_dm_link_setup_psr +ffffffff8217a320 T amdgpu_dm_psr_enable +ffffffff8217a430 T amdgpu_dm_psr_disable +ffffffff8217a4c0 T amdgpu_dm_psr_disable_all +ffffffff8217b000 T amdgpu_dm_setup_replay +ffffffff8217b100 T amdgpu_dm_replay_enable +ffffffff8217b2b0 T amdgpu_dm_replay_disable +ffffffff8217c000 T dm_get_elapse_time_in_ns +ffffffff8217c030 T dm_perf_trace_timestamp +ffffffff8217d000 T dc_assert_fp_enabled +ffffffff8217d080 T dc_fpu_begin +ffffffff8217d0d0 T dc_fpu_end +ffffffff8217e000 T dal_vector_construct +ffffffff8217e0e0 T dal_vector_presized_create +ffffffff8217e3a0 T dal_vector_create +ffffffff8217e4e0 T dal_vector_destruct +ffffffff8217e540 T dal_vector_destroy +ffffffff8217e5d0 T dal_vector_get_count +ffffffff8217e600 T dal_vector_at_index +ffffffff8217e640 T dal_vector_remove_at_index +ffffffff8217e6e0 T dal_vector_set_at_index +ffffffff8217e740 T dal_vector_insert_at +ffffffff8217e870 T dal_vector_reserve +ffffffff8217e930 T dal_vector_append +ffffffff8217ea60 T dal_vector_clone +ffffffff8217eb20 T dal_vector_capacity +ffffffff8217eb50 T dal_vector_clear +ffffffff8217f000 T fixed_point_to_int_frac +ffffffff8217f220 T convert_float_matrix +ffffffff8217f2f0 T reduce_fraction +ffffffff82180000 T is_rgb_cspace +ffffffff82180090 T is_lower_pipe_tree_visible +ffffffff82180100 T is_upper_pipe_tree_visible +ffffffff82180170 T is_pipe_tree_visible +ffffffff82180200 T build_prescale_params +ffffffff82181000 T dc_fixpt_from_fraction +ffffffff821811e0 T dc_fixpt_mul +ffffffff821813a0 T dc_fixpt_sqr +ffffffff82181520 T dc_fixpt_recip +ffffffff82181590 T dc_fixpt_sinc +ffffffff821817d0 T dc_fixpt_sin +ffffffff82181800 T dc_fixpt_cos +ffffffff82181920 T dc_fixpt_exp +ffffffff82181c40 t fixed31_32_exp_from_taylor_series +ffffffff82182110 T dc_fixpt_log +ffffffff82182350 T dc_fixpt_u4d19 +ffffffff82182390 T dc_fixpt_u3d19 +ffffffff821823d0 T dc_fixpt_u2d19 +ffffffff82182410 T dc_fixpt_u0d19 +ffffffff82182440 T dc_fixpt_clamp_u0d14 +ffffffff82182490 T dc_fixpt_clamp_u0d10 +ffffffff821824e0 T dc_fixpt_s4d19 +ffffffff82183000 T bios_parser_create +ffffffff82184380 t bios_parser_get_connectors_number +ffffffff821843e0 t bios_parser_get_connector_id +ffffffff82184490 t bios_parser_get_src_obj +ffffffff821845c0 t bios_parser_get_i2c_info +ffffffff82184800 t bios_parser_get_hpd_info +ffffffff821848f0 t bios_parser_get_device_tag +ffffffff82184b10 t bios_parser_get_spread_spectrum_info +ffffffff82184d30 t bios_parser_get_ss_entry_number +ffffffff82184fa0 t bios_parser_get_embedded_panel_info +ffffffff82185530 t bios_parser_get_gpio_pin_info +ffffffff82185650 t bios_parser_get_encoder_cap_info +ffffffff82185760 t bios_parser_set_scratch_critical_state +ffffffff82185770 t bios_parser_is_device_id_supported +ffffffff82185830 t bios_parser_encoder_control +ffffffff82185870 t bios_parser_transmitter_control +ffffffff821858b0 t bios_parser_enable_crtc +ffffffff82185900 t bios_parser_adjust_pixel_clock +ffffffff82185940 t bios_parser_set_pixel_clock +ffffffff82185980 t bios_parser_set_dce_clock +ffffffff821859c0 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff82185a10 t bios_parser_program_crtc_timing +ffffffff82185a50 t bios_parser_program_display_engine_pll +ffffffff82185a90 t bios_parser_enable_disp_power_gating +ffffffff82185ad0 t bios_parser_destroy +ffffffff82185bb0 t bios_get_board_layout_info +ffffffff82185e50 t get_bios_object +ffffffff82186050 t get_ss_info_from_ss_info_table +ffffffff82186240 t get_ss_info_v3_1 +ffffffff821863d0 t get_ss_entry_number_from_ss_info_tbl +ffffffff82187000 T firmware_parser_create +ffffffff82189000 t bios_parser_get_connectors_number +ffffffff82189170 t bios_parser_get_connector_id +ffffffff821891d0 t bios_parser_get_src_obj +ffffffff821894b0 t bios_parser_get_i2c_info +ffffffff82189780 t bios_parser_get_hpd_info +ffffffff82189920 t bios_parser_get_device_tag +ffffffff82189c10 t bios_parser_get_spread_spectrum_info +ffffffff8218a0c0 t bios_parser_get_ss_entry_number +ffffffff8218a0f0 t bios_parser_get_embedded_panel_info +ffffffff8218a300 t bios_parser_get_gpio_pin_info +ffffffff8218a420 t bios_parser_get_encoder_cap_info +ffffffff8218a590 t bios_parser_is_accelerated_mode +ffffffff8218a5a0 t bios_parser_set_scratch_critical_state +ffffffff8218a5b0 t bios_parser_is_device_id_supported +ffffffff8218a620 t bios_parser_encoder_control +ffffffff8218a660 t bios_parser_transmitter_control +ffffffff8218a6a0 t bios_parser_enable_crtc +ffffffff8218a6f0 t bios_parser_set_pixel_clock +ffffffff8218a730 t bios_parser_set_dce_clock +ffffffff8218a770 t bios_parser_program_crtc_timing +ffffffff8218a7b0 t bios_parser_enable_disp_power_gating +ffffffff8218a7f0 t firmware_parser_destroy +ffffffff8218a8d0 t bios_get_board_layout_info +ffffffff8218adc0 t bios_parser_pack_data_tables +ffffffff8218adf0 t bios_get_atom_dc_golden_table +ffffffff8218af50 t bios_parser_enable_lvtma_control +ffffffff8218afa0 t bios_parser_get_soc_bb_info +ffffffff8218b0b0 t bios_parser_get_disp_connector_caps_info +ffffffff8218b230 t bios_parser_get_lttpr_caps +ffffffff8218b3a0 t bios_parser_get_lttpr_interop +ffffffff8218b500 t bios_parser_get_connector_speed_cap_info +ffffffff8218b650 t get_bios_object +ffffffff8218b7c0 t get_bios_object_from_path_v3 +ffffffff8218c000 T object_id_from_bios_object_id +ffffffff8218d000 T bios_get_image +ffffffff8218d050 T bios_is_accelerated_mode +ffffffff8218d0b0 T bios_set_scratch_acc_mode_change +ffffffff8218d0f0 T bios_set_scratch_critical_state +ffffffff8218d130 T bios_get_vga_enabled_displays +ffffffff8218e000 T dal_bios_parser_create +ffffffff8218e070 T dal_bios_parser_destroy +ffffffff8218f000 T dal_bios_parser_init_cmd_tbl +ffffffff8218f910 t encoder_control_digx_v3 +ffffffff8218fa30 t encoder_control_digx_v4 +ffffffff8218fb50 t encoder_control_digx_v5 +ffffffff8218fcb0 t encoder_control_dig1_v1 +ffffffff8218fd50 t encoder_control_dig2_v1 +ffffffff8218fdf0 t encoder_control_dig_v1 +ffffffff8218fe50 t transmitter_control_v2 +ffffffff82190000 t transmitter_control_v3 +ffffffff821901d0 t transmitter_control_v4 +ffffffff82190390 t transmitter_control_v1_5 +ffffffff82190530 t transmitter_control_v1_6 +ffffffff821906b0 t set_pixel_clock_v3 +ffffffff82190850 t set_pixel_clock_v5 +ffffffff82190a20 t set_pixel_clock_v6 +ffffffff82190bf0 t set_pixel_clock_v7 +ffffffff82190e00 t enable_spread_spectrum_on_ppll_v1 +ffffffff82190f20 t enable_spread_spectrum_on_ppll_v2 +ffffffff82191060 t enable_spread_spectrum_on_ppll_v3 +ffffffff82191180 t adjust_display_pll_v2 +ffffffff821912f0 t adjust_display_pll_v3 +ffffffff82191490 t dac1_encoder_control_v1 +ffffffff82191510 t dac2_encoder_control_v1 +ffffffff82191590 t dac1_output_control_v1 +ffffffff82191600 t dac2_output_control_v1 +ffffffff82191670 t set_crtc_using_dtd_timing_v3 +ffffffff821917e0 t set_crtc_timing_v1 +ffffffff82191980 t enable_crtc_v1 +ffffffff82191a30 t enable_crtc_mem_req_v1 +ffffffff82191ae0 t program_clock_v5 +ffffffff82191c00 t program_clock_v6 +ffffffff82191d30 t external_encoder_control_v3 +ffffffff82191f00 t enable_disp_power_gating_v2_1 +ffffffff82191fe0 t set_dce_clock_v2_1 +ffffffff82193000 T dal_firmware_parser_init_cmd_tbl +ffffffff82193460 t encoder_control_digx_v1_5 +ffffffff82193650 t encoder_control_fallback +ffffffff821936b0 t transmitter_control_v1_6 +ffffffff82193880 t transmitter_control_v1_7 +ffffffff82193aa0 t transmitter_control_fallback +ffffffff82193b00 t set_pixel_clock_v7 +ffffffff82193d90 t set_pixel_clock_fallback +ffffffff82193df0 t set_crtc_using_dtd_timing_v3 +ffffffff82193f60 t enable_crtc_v1 +ffffffff82194010 t external_encoder_control_v3 +ffffffff82194040 t enable_disp_power_gating_v2_1 +ffffffff821941c0 t enable_disp_power_gating_fallback +ffffffff82194220 t set_dce_clock_v2_1 +ffffffff82194360 t get_smu_clock_info_v3_1 +ffffffff821943d0 t enable_lvtma_control +ffffffff82195000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff821950c0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff821951e0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff82195270 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff82195300 T dal_cmd_table_helper_assign_control_parameter +ffffffff821953e0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff821954c0 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff82196000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff821960d0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff821961e0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff82196270 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff82196300 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff821963e0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff82197000 T dal_cmd_tbl_helper_dce110_get_table ffffffff82197030 t encoder_action_to_atom ffffffff821970b0 t engine_bp_to_atom ffffffff82197100 t clock_source_id_to_atom -ffffffff821971d0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff82197220 t signal_type_to_atom_dig_mode -ffffffff82197280 t hpd_sel_to_atom -ffffffff821972c0 t dig_encoder_sel_to_atom -ffffffff821972f0 t phy_id_to_atom -ffffffff82197330 t disp_power_gating_action_to_atom -ffffffff821973a0 t dc_clock_type_to_atom -ffffffff82197420 t transmitter_color_depth_to_atom -ffffffff82198000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff821971a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff821971f0 t signal_type_to_atom_dig_mode +ffffffff82197250 t hpd_sel_to_atom +ffffffff82197290 t dig_encoder_sel_to_atom +ffffffff821972c0 t phy_id_to_atom +ffffffff82197300 t disp_power_gating_action_to_atom +ffffffff82198000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff82198030 t encoder_action_to_atom ffffffff821980b0 t engine_bp_to_atom ffffffff82198100 t clock_source_id_to_atom @@ -31850,7 +31838,7 @@ ffffffff821982f0 t phy_id_to_atom ffffffff82198330 t disp_power_gating_action_to_atom ffffffff821983a0 t dc_clock_type_to_atom ffffffff82198420 t transmitter_color_depth_to_atom -ffffffff82199000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff82199000 T dal_cmd_tbl_helper_dce112_get_table ffffffff82199030 t encoder_action_to_atom ffffffff821990b0 t engine_bp_to_atom ffffffff82199100 t clock_source_id_to_atom @@ -31858,26443 +31846,26455 @@ ffffffff821991d0 t clock_source_id_to_atom_phy_clk_src ffffffff82199220 t signal_type_to_atom_dig_mode ffffffff82199280 t hpd_sel_to_atom ffffffff821992c0 t dig_encoder_sel_to_atom -ffffffff82199310 t phy_id_to_atom -ffffffff82199350 t disp_power_gating_action_to_atom -ffffffff8219a000 T clk_mgr_helper_get_active_display_cnt -ffffffff8219a0e0 T clk_mgr_helper_get_active_plane_cnt -ffffffff8219a190 T clk_mgr_exit_optimized_pwr_state -ffffffff8219a2b0 T clk_mgr_optimize_pwr_state -ffffffff8219a3b0 T dc_clk_mgr_create -ffffffff8219ab90 T dc_destroy_clk_mgr -ffffffff8219b000 T dentist_get_divider_from_did -ffffffff8219b070 T dce_adjust_dp_ref_freq_for_ss -ffffffff8219b190 T dce_get_dp_ref_freq_khz -ffffffff8219b2e0 T dce12_get_dp_ref_freq_khz -ffffffff8219b300 T dce_get_max_pixel_clock_for_all_paths -ffffffff8219b510 T dce_get_required_clocks_state -ffffffff8219b5c0 T dce_set_clock -ffffffff8219b730 T dce_clock_read_ss_info -ffffffff8219b870 T dce_clk_mgr_construct -ffffffff8219ba70 t dce_update_clocks -ffffffff8219c000 T dce110_get_min_vblank_time_us -ffffffff8219c090 T dce110_fill_display_configs -ffffffff8219c310 T dce11_pplib_apply_display_requirements -ffffffff8219c620 T dce110_clk_mgr_construct -ffffffff8219c6d0 t dce11_update_clocks -ffffffff8219d000 T dce112_set_clock -ffffffff8219d1a0 T dce112_set_dispclk -ffffffff8219d2d0 T dce112_set_dprefclk -ffffffff8219d350 T dce112_clk_mgr_construct -ffffffff8219d410 t dce112_update_clocks -ffffffff8219e000 T dce120_clk_mgr_construct -ffffffff8219e0a0 T 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dal_hw_factory_dce80_init -ffffffff82468060 t define_hpd_registers -ffffffff824680b0 t define_ddc_registers -ffffffff82469000 T dal_hw_translate_dce80_init -ffffffff82469030 t offset_to_id -ffffffff824697d0 t id_to_offset -ffffffff8246a000 T dal_hw_factory_dcn10_init -ffffffff8246a060 t define_hpd_registers -ffffffff8246a0b0 t define_ddc_registers -ffffffff8246a150 t define_generic_registers -ffffffff8246b000 T dal_hw_translate_dcn10_init -ffffffff8246b030 t offset_to_id -ffffffff8246b3a0 t id_to_offset -ffffffff8246c000 T dal_hw_factory_dcn20_init -ffffffff8246c060 t define_hpd_registers -ffffffff8246c0b0 t define_ddc_registers -ffffffff8246c160 t define_generic_registers -ffffffff8246d000 T dal_hw_translate_dcn20_init -ffffffff8246d030 t offset_to_id -ffffffff8246d2c0 t id_to_offset -ffffffff8246e000 T dal_hw_factory_dcn21_init -ffffffff8246e060 t define_hpd_registers -ffffffff8246e0b0 t define_ddc_registers -ffffffff8246e160 t define_generic_registers -ffffffff8246f000 T dal_hw_translate_dcn21_init -ffffffff8246f030 t offset_to_id -ffffffff8246f2b0 t id_to_offset -ffffffff82470000 T dal_hw_factory_dcn30_init -ffffffff82470060 t define_hpd_registers -ffffffff824700b0 t define_ddc_registers -ffffffff82470160 t define_generic_registers -ffffffff82471000 T dal_hw_translate_dcn30_init -ffffffff82471030 t offset_to_id -ffffffff824712d0 t id_to_offset -ffffffff82472000 T dal_hw_factory_dcn315_init -ffffffff82472060 t define_hpd_registers -ffffffff824720b0 t define_ddc_registers -ffffffff82472160 t define_generic_registers -ffffffff82473000 T dal_hw_translate_dcn315_init -ffffffff82473030 t offset_to_id -ffffffff824732b0 t id_to_offset -ffffffff82474000 T dal_hw_factory_dcn32_init -ffffffff82474060 t define_hpd_registers -ffffffff824740b0 t define_ddc_registers -ffffffff82474160 t define_generic_registers -ffffffff82475000 T dal_hw_translate_dcn32_init -ffffffff82475030 t offset_to_id -ffffffff82475290 t id_to_offset -ffffffff82476000 T dal_gpio_open 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dal_gpio_get_generic_pin_info -ffffffff824775a0 T dal_gpio_service_destroy -ffffffff82477720 T dal_mux_setup_config -ffffffff82477790 T dal_gpio_service_lock -ffffffff82477820 T dal_gpio_service_unlock -ffffffff824778b0 T dal_gpio_service_open -ffffffff82477b60 T dal_gpio_service_close -ffffffff82477c10 T dal_irq_get_source -ffffffff82477c90 T dal_irq_get_rx_source -ffffffff82477cf0 T dal_irq_setup_hpd_filter -ffffffff82477d50 T dal_gpio_destroy_irq -ffffffff82477df0 T dal_gpio_create_ddc -ffffffff82477fa0 T dal_gpio_destroy_ddc -ffffffff824780a0 T dal_ddc_close -ffffffff824780f0 T dal_ddc_open -ffffffff82478280 T dal_ddc_change_mode -ffffffff82478350 T dal_ddc_get_line -ffffffff82478370 T dal_ddc_set_config -ffffffff82479000 T dal_hw_ddc_init -ffffffff82479120 T dal_hw_ddc_get_pin -ffffffff82479130 t dal_hw_ddc_destroy -ffffffff824791a0 t set_config -ffffffff8247a000 T dal_hw_factory_init -ffffffff8247b000 T dal_hw_generic_init -ffffffff8247b120 T dal_hw_generic_get_pin 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hpd_ack -ffffffff82481000 T dal_irq_service_dce120_create -ffffffff82481090 t hpd_ack -ffffffff82482000 T dal_irq_service_dce80_create +ffffffff821992f0 t phy_id_to_atom +ffffffff82199330 t disp_power_gating_action_to_atom +ffffffff821993a0 t dc_clock_type_to_atom +ffffffff82199420 t transmitter_color_depth_to_atom +ffffffff8219a000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff8219a030 t encoder_action_to_atom +ffffffff8219a0b0 t engine_bp_to_atom +ffffffff8219a100 t clock_source_id_to_atom +ffffffff8219a1d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff8219a220 t signal_type_to_atom_dig_mode +ffffffff8219a280 t hpd_sel_to_atom +ffffffff8219a2c0 t dig_encoder_sel_to_atom +ffffffff8219a310 t phy_id_to_atom +ffffffff8219a350 t disp_power_gating_action_to_atom +ffffffff8219b000 T clk_mgr_helper_get_active_display_cnt +ffffffff8219b0e0 T clk_mgr_helper_get_active_plane_cnt +ffffffff8219b190 T clk_mgr_exit_optimized_pwr_state +ffffffff8219b2b0 T clk_mgr_optimize_pwr_state +ffffffff8219b3b0 T dc_clk_mgr_create +ffffffff8219bb90 T dc_destroy_clk_mgr +ffffffff8219c000 T dentist_get_divider_from_did +ffffffff8219c070 T dce_adjust_dp_ref_freq_for_ss +ffffffff8219c190 T dce_get_dp_ref_freq_khz +ffffffff8219c2e0 T dce12_get_dp_ref_freq_khz +ffffffff8219c300 T dce_get_max_pixel_clock_for_all_paths +ffffffff8219c510 T dce_get_required_clocks_state +ffffffff8219c5c0 T dce_set_clock +ffffffff8219c730 T dce_clock_read_ss_info +ffffffff8219c870 T dce_clk_mgr_construct +ffffffff8219ca70 t dce_update_clocks +ffffffff8219d000 T dce110_get_min_vblank_time_us +ffffffff8219d090 T dce110_fill_display_configs +ffffffff8219d310 T dce11_pplib_apply_display_requirements +ffffffff8219d620 T dce110_clk_mgr_construct +ffffffff8219d6d0 t dce11_update_clocks +ffffffff8219e000 T dce112_set_clock +ffffffff8219e1a0 T dce112_set_dispclk +ffffffff8219e2d0 T dce112_set_dprefclk +ffffffff8219e350 T dce112_clk_mgr_construct +ffffffff8219e410 t dce112_update_clocks +ffffffff8219f000 T dce120_clk_mgr_construct +ffffffff8219f0a0 T dce121_clk_mgr_construct +ffffffff8219f1e0 t dce12_update_clocks +ffffffff821a0000 T rv1_clk_mgr_construct +ffffffff821a00c0 t rv1_update_clocks +ffffffff821a0600 t rv1_init_clocks +ffffffff821a0690 t rv1_enable_pme_wa +ffffffff821a1000 T rv1_vbios_smu_set_dispclk +ffffffff821a10f0 t rv1_vbios_smu_send_msg_with_param +ffffffff821a1230 T rv1_vbios_smu_set_dprefclk +ffffffff821a2000 T rv2_clk_mgr_construct +ffffffff821a3000 T dentist_get_did_from_divider +ffffffff821a3080 T dcn20_update_clocks_update_dpp_dto +ffffffff821a3160 T dcn20_update_clocks_update_dentist +ffffffff821a36f0 T dcn2_update_clocks +ffffffff821a3ce0 T dcn2_read_clocks_from_hw_dentist +ffffffff821a3dd0 T dcn2_update_clocks_fpga +ffffffff821a3f00 T dcn2_init_clocks +ffffffff821a3fa0 T dcn2_get_clock +ffffffff821a4010 T dcn20_clk_mgr_construct +ffffffff821a4160 t dcn2_enable_pme_wa +ffffffff821a41b0 t dcn2_are_clock_states_equal +ffffffff821a4220 t dcn2_notify_link_rate_change +ffffffff821a5000 T dcn201_clk_mgr_construct +ffffffff821a5130 t dcn201_update_clocks +ffffffff821a5370 t dcn201_init_clocks +ffffffff821a6000 T rn_clk_mgr_construct +ffffffff821a6970 t rn_update_clocks +ffffffff821a6f70 t rn_set_low_power_state +ffffffff821a7160 t rn_init_clocks +ffffffff821a7200 t rn_enable_pme_wa +ffffffff821a7210 t rn_are_clock_states_equal +ffffffff821a7260 t rn_notify_wm_ranges +ffffffff821a75f0 t rn_notify_link_rate_change +ffffffff821a8000 T rn_vbios_smu_get_smu_version +ffffffff821a8020 t rn_vbios_smu_send_msg_with_param +ffffffff821a8200 T rn_vbios_smu_set_dispclk +ffffffff821a8330 T rn_vbios_smu_set_dprefclk +ffffffff821a83a0 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff821a8420 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff821a84a0 T rn_vbios_smu_set_phyclk +ffffffff821a84e0 T rn_vbios_smu_set_dppclk +ffffffff821a85a0 T rn_vbios_smu_set_dcn_low_power_state +ffffffff821a85c0 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff821a85e0 T rn_vbios_smu_enable_pme_wa +ffffffff821a8600 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff821a9000 T dcn3_init_clocks +ffffffff821a9470 t dcn3_init_clocks_fpga +ffffffff821a9480 T dcn3_clk_mgr_construct +ffffffff821a9600 T dcn3_clk_mgr_destroy +ffffffff821a9670 t dcn3_update_clocks +ffffffff821a9ad0 t dcn3_enable_pme_wa +ffffffff821a9b10 t dcn3_are_clock_states_equal +ffffffff821a9b70 t dcn3_notify_wm_ranges +ffffffff821a9e20 t dcn30_notify_link_rate_change +ffffffff821a9f40 t dcn3_set_hard_min_memclk +ffffffff821a9fe0 t dcn3_set_hard_max_memclk +ffffffff821aa040 t dcn3_set_max_memclk +ffffffff821aa080 t dcn3_set_min_memclk +ffffffff821aa0c0 t dcn3_get_memclk_states_from_smu +ffffffff821aa220 t dcn3_is_smu_present +ffffffff821ab000 T dcn30_smu_test_message +ffffffff821ab070 t dcn30_smu_send_msg_with_param +ffffffff821ab220 T dcn30_smu_get_smu_version +ffffffff821ab240 T dcn30_smu_check_driver_if_version +ffffffff821ab2a0 T dcn30_smu_check_msg_header_version +ffffffff821ab300 T dcn30_smu_set_dram_addr_high +ffffffff821ab320 T dcn30_smu_set_dram_addr_low +ffffffff821ab340 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff821ab360 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff821ab380 T dcn30_smu_set_hard_min_by_freq +ffffffff821ab3e0 T dcn30_smu_set_hard_max_by_freq +ffffffff821ab440 T dcn30_smu_get_dpm_freq_by_index +ffffffff821ab4a0 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff821ab500 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff821ab520 T dcn30_smu_set_num_of_displays +ffffffff821ab540 T dcn30_smu_set_display_refresh_from_mall +ffffffff821ab570 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff821ab590 T dcn30_smu_set_pme_workaround +ffffffff821ac000 T dcn301_smu_get_smu_version +ffffffff821ac080 t dcn301_smu_send_msg_with_param +ffffffff821ac250 T dcn301_smu_set_dispclk +ffffffff821ac300 T dcn301_smu_set_dprefclk +ffffffff821ac3c0 T dcn301_smu_set_hard_min_dcfclk +ffffffff821ac470 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff821ac520 T dcn301_smu_set_dppclk +ffffffff821ac5d0 T dcn301_smu_set_display_idle_optimization +ffffffff821ac630 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff821ac690 T dcn301_smu_enable_pme_wa +ffffffff821ac6b0 T dcn301_smu_set_dram_addr_high +ffffffff821ac710 T dcn301_smu_set_dram_addr_low +ffffffff821ac770 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff821ac790 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff821ad000 T vg_clk_mgr_construct +ffffffff821ad930 T vg_clk_mgr_destroy +ffffffff821ad980 t vg_update_clocks +ffffffff821add00 t vg_init_clocks +ffffffff821adda0 t vg_enable_pme_wa +ffffffff821addb0 t vg_are_clock_states_equal +ffffffff821ade00 t vg_notify_wm_ranges +ffffffff821af000 T dcn31_update_clocks +ffffffff821af6a0 T dcn31_init_clocks +ffffffff821af750 T dcn31_are_clock_states_equal +ffffffff821af7b0 T dcn31_get_dtb_ref_freq_khz +ffffffff821af7e0 T dcn31_clk_mgr_construct +ffffffff821aff50 T dcn31_clk_mgr_destroy +ffffffff821affa0 t dcn31_set_low_power_state +ffffffff821b01c0 t dcn31_enable_pme_wa +ffffffff821b01d0 t dcn31_notify_wm_ranges +ffffffff821b0570 t find_clk_for_voltage +ffffffff821b1000 T dcn31_smu_get_smu_version +ffffffff821b1020 t dcn31_smu_send_msg_with_param +ffffffff821b1290 T dcn31_smu_set_dispclk +ffffffff821b1310 T dcn31_smu_set_dprefclk +ffffffff821b1390 T dcn31_smu_set_hard_min_dcfclk +ffffffff821b1420 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff821b14b0 T dcn31_smu_set_dppclk +ffffffff821b1530 T dcn31_smu_set_display_idle_optimization +ffffffff821b1580 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff821b15d0 T dcn31_smu_enable_pme_wa +ffffffff821b1610 T dcn31_smu_set_dram_addr_high +ffffffff821b1650 T dcn31_smu_set_dram_addr_low +ffffffff821b1690 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff821b16d0 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff821b1710 T dcn31_smu_set_zstate_support +ffffffff821b1780 T dcn31_smu_set_dtbclk +ffffffff821b2000 T dcn314_update_clocks +ffffffff821b26d0 T dcn314_are_clock_states_equal +ffffffff821b2730 T dcn314_clk_mgr_construct +ffffffff821b34f0 T dcn314_clk_mgr_destroy +ffffffff821b3540 t dcn314_enable_pme_wa +ffffffff821b3550 t dcn314_notify_wm_ranges +ffffffff821b4000 T dcn314_smu_get_smu_version +ffffffff821b4020 t dcn314_smu_send_msg_with_param +ffffffff821b42b0 T dcn314_smu_set_dispclk +ffffffff821b4330 T dcn314_smu_set_dprefclk +ffffffff821b43b0 T dcn314_smu_set_hard_min_dcfclk +ffffffff821b4440 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff821b44d0 T dcn314_smu_set_dppclk +ffffffff821b4550 T dcn314_smu_set_display_idle_optimization +ffffffff821b45a0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff821b45f0 T dcn314_smu_enable_pme_wa +ffffffff821b4630 T dcn314_smu_set_dram_addr_high +ffffffff821b4670 T dcn314_smu_set_dram_addr_low +ffffffff821b46b0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff821b46f0 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff821b4730 T dcn314_smu_set_zstate_support +ffffffff821b4780 T dcn314_smu_set_dtbclk +ffffffff821b5000 T dcn315_clk_mgr_construct +ffffffff821b5890 T dcn315_clk_mgr_destroy +ffffffff821b58e0 t dcn315_update_clocks +ffffffff821b5ef0 t dcn315_enable_pme_wa +ffffffff821b5f00 t dcn315_notify_wm_ranges +ffffffff821b62a0 t dcn315_disable_otg_wa +ffffffff821b7000 T dcn315_smu_get_smu_version +ffffffff821b7020 t dcn315_smu_send_msg_with_param +ffffffff821b73d0 T dcn315_smu_set_dispclk +ffffffff821b7450 T dcn315_smu_set_hard_min_dcfclk +ffffffff821b74e0 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff821b7570 T dcn315_smu_set_dppclk +ffffffff821b75f0 T dcn315_smu_set_display_idle_optimization +ffffffff821b7640 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff821b7690 T dcn315_smu_enable_pme_wa +ffffffff821b76d0 T dcn315_smu_set_dram_addr_high +ffffffff821b7710 T dcn315_smu_set_dram_addr_low +ffffffff821b7750 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff821b7790 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff821b77d0 T dcn315_smu_get_dpref_clk +ffffffff821b7830 T dcn315_smu_get_dtbclk +ffffffff821b7890 T dcn315_smu_set_dtbclk +ffffffff821b8000 T dcn316_clk_mgr_construct +ffffffff821b86e0 T dcn316_clk_mgr_destroy +ffffffff821b8730 t dcn316_update_clocks +ffffffff821b8da0 t dcn316_enable_pme_wa +ffffffff821b8db0 t dcn316_notify_wm_ranges +ffffffff821b9150 t find_clk_for_voltage +ffffffff821ba000 T dcn316_smu_get_smu_version +ffffffff821ba020 t dcn316_smu_send_msg_with_param +ffffffff821ba200 T dcn316_smu_set_dispclk +ffffffff821ba280 T dcn316_smu_set_hard_min_dcfclk +ffffffff821ba310 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff821ba3a0 T dcn316_smu_set_dppclk +ffffffff821ba420 T dcn316_smu_set_display_idle_optimization +ffffffff821ba470 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff821ba4c0 T dcn316_smu_set_dram_addr_high +ffffffff821ba500 T dcn316_smu_set_dram_addr_low +ffffffff821ba540 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff821ba580 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff821ba5c0 T dcn316_smu_enable_pme_wa +ffffffff821ba600 T dcn316_smu_set_dtbclk +ffffffff821ba640 T dcn316_smu_get_dpref_clk +ffffffff821ba6a0 T dcn316_smu_get_smu_fclk +ffffffff821bb000 T dcn32_init_clocks +ffffffff821bb620 T dcn32_update_clocks_update_dpp_dto +ffffffff821bb760 T dcn32_clk_mgr_construct +ffffffff821bba40 t dcn32_dump_clk_registers +ffffffff821bbce0 T dcn32_clk_mgr_destroy +ffffffff821bbd50 t dcn32_update_clocks +ffffffff821bc6b0 t dcn32_enable_pme_wa +ffffffff821bc6f0 t dcn32_are_clock_states_equal +ffffffff821bc760 t dcn32_notify_wm_ranges +ffffffff821bc8f0 t dcn32_set_hard_min_memclk +ffffffff821bc980 t dcn32_set_hard_max_memclk +ffffffff821bc9d0 t dcn32_set_max_memclk +ffffffff821bca10 t dcn32_set_min_memclk +ffffffff821bca50 t dcn32_get_memclk_states_from_smu +ffffffff821bcce0 t dcn32_is_smu_present +ffffffff821bcd10 t dcn32_get_dispclk_from_dentist +ffffffff821bcdb0 t dcn32_update_clocks_update_dentist +ffffffff821be000 T dcn32_smu_send_fclk_pstate_message +ffffffff821be020 t dcn32_smu_send_msg_with_param +ffffffff821be1a0 T dcn32_smu_send_cab_for_uclk_message +ffffffff821be1d0 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff821be1f0 T dcn32_smu_set_pme_workaround +ffffffff821be210 T dcn32_smu_set_hard_min_by_freq +ffffffff821be270 T dcn32_smu_wait_for_dmub_ack_mclk +ffffffff821bf000 T dc_stream_adjust_vmin_vmax +ffffffff821bf170 T dc_stream_get_last_used_drr_vtotal +ffffffff821bf2e0 T dc_stream_get_crtc_position +ffffffff821bf540 T dc_stream_configure_crc +ffffffff821bf6c0 T dc_stream_get_crc +ffffffff821bf7b0 T dc_stream_set_dyn_expansion +ffffffff821bfa40 T dc_stream_set_dither_option +ffffffff821bfbe0 T dc_stream_set_gamut_remap +ffffffff821bfd90 T dc_stream_program_csc_matrix +ffffffff821bfff0 T dc_stream_set_static_screen_params +ffffffff821c0180 T dc_create +ffffffff821c07d0 t dc_construct_ctx +ffffffff821c0970 t dc_destruct +ffffffff821c0cd0 T dc_hardware_init +ffffffff821c0da0 T dc_init_callbacks +ffffffff821c0df0 T dc_deinit_callbacks +ffffffff821c0e40 T dc_destroy +ffffffff821c0eb0 T dc_validate_boot_timing +ffffffff821c12c0 T dc_enable_stereo +ffffffff821c13d0 T dc_trigger_sync +ffffffff821c1a30 T dc_z10_restore +ffffffff821c1a70 T dc_z10_save_init +ffffffff821c1ab0 T dc_commit_streams +ffffffff821c2000 t commit_minimal_transition_state +ffffffff821c2480 T dc_create_state +ffffffff821c2520 t dc_commit_state_no_check +ffffffff821c3e50 T dc_release_state +ffffffff821c3ec0 T dc_acquire_release_mpc_3dlut +ffffffff821c3f90 T dc_post_update_surfaces_to_stream +ffffffff821c4410 T dc_copy_state +ffffffff821c4600 T dc_retain_state +ffffffff821c4630 T dc_set_generic_gpio_for_stereo +ffffffff821c4790 T dc_check_update_surfaces_for_stream +ffffffff821c51a0 T dc_dmub_update_dirty_rect +ffffffff821c53b0 T dc_update_planes_and_stream +ffffffff821c6050 t fast_update_only +ffffffff821c63b0 t commit_planes_for_stream_fast +ffffffff821c6800 t commit_planes_for_stream +ffffffff821c7f60 T dc_commit_updates_for_stream +ffffffff821c8640 t copy_surface_update_to_plane +ffffffff821c8a60 t copy_stream_update_to_stream +ffffffff821c9160 T dc_get_current_stream_count +ffffffff821c91a0 T dc_get_stream_at_index +ffffffff821c91f0 T dc_interrupt_to_irq_source +ffffffff821c9210 T dc_interrupt_set +ffffffff821c9260 T dc_interrupt_ack +ffffffff821c9280 T dc_power_down_on_boot +ffffffff821c92d0 T dc_set_power_state +ffffffff821c9500 T dc_resume +ffffffff821c9580 T dc_is_dmcu_initialized +ffffffff821c95d0 T get_clock_requirements_for_state +ffffffff821c9650 T dc_set_clock +ffffffff821c9690 T dc_get_clock +ffffffff821c96d0 T dc_set_psr_allow_active +ffffffff821c97e0 T dc_allow_idle_optimizations +ffffffff821c9890 T dc_unlock_memory_clock_frequency +ffffffff821c9910 T dc_lock_memory_clock_frequency +ffffffff821c99b0 T dc_enable_dcmode_clk_limit +ffffffff821c9b80 t blank_and_force_memclk +ffffffff821c9db0 T dc_is_plane_eligible_for_idle_optimizations +ffffffff821c9e10 T dc_hardware_release +ffffffff821c9e60 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff821c9ea0 T dc_is_dmub_outbox_supported +ffffffff821c9f10 T dc_enable_dmub_notifications +ffffffff821c9f80 T dc_enable_dmub_outbox +ffffffff821c9fd0 T dc_process_dmub_aux_transfer_async +ffffffff821ca160 T get_link_index_from_dpia_port_index +ffffffff821ca220 T dc_process_dmub_set_config_async +ffffffff821ca300 T dc_process_dmub_set_mst_slots +ffffffff821ca3f0 T dc_process_dmub_dpia_hpd_int_enable +ffffffff821ca4c0 T dc_print_dmub_diagnostic_data +ffffffff821ca4e0 T dc_disable_accelerated_mode +ffffffff821ca500 T dc_notify_vsync_int_state +ffffffff821ca730 T dc_abm_save_restore +ffffffff821ca920 T dc_query_current_properties +ffffffff821ca990 T dc_set_edp_power +ffffffff821caa00 t create_links +ffffffff821caeb0 t create_link_encoders +ffffffff821cafa0 t dc_update_viusal_confirm_color +ffffffff821cc000 T pre_surface_trace +ffffffff821cc030 T update_surface_trace +ffffffff821cc060 T post_surface_trace +ffffffff821cc090 T context_timing_trace +ffffffff821cc260 T context_clock_trace +ffffffff821cc290 T dc_status_to_str +ffffffff821cd000 T find_color_matrix +ffffffff821cd0b0 T color_space_to_black_color +ffffffff821cd120 T hwss_wait_for_blank_complete +ffffffff821cd1d0 T get_mpctree_visual_confirm_color +ffffffff821cd230 T get_surface_visual_confirm_color +ffffffff821cd2e0 T get_hdr_visual_confirm_color +ffffffff821cd3a0 T get_subvp_visual_confirm_color +ffffffff821cd4a0 T hwss_build_fast_sequence +ffffffff821cdb60 T hwss_execute_sequence +ffffffff821cdfc0 T hwss_setup_dpp +ffffffff821ce060 T hwss_program_bias_and_scale +ffffffff821ce0e0 T hwss_program_manual_trigger +ffffffff821ce130 T hwss_power_on_mpc_mem_pwr +ffffffff821ce180 T hwss_set_output_csc +ffffffff821ce1d0 T hwss_set_ocsc_default +ffffffff821ce220 T hwss_send_dmcub_cmd +ffffffff821ce240 T get_mclk_switch_visual_confirm_color +ffffffff821ce3a0 T get_surface_tile_visual_confirm_color +ffffffff821cf000 T link_enc_cfg_init +ffffffff821cf1f0 T link_enc_cfg_copy +ffffffff821cf220 T link_enc_cfg_link_encs_assign +ffffffff821d06c0 T link_enc_cfg_validate +ffffffff821d0e70 T link_enc_cfg_link_enc_unassign +ffffffff821d1000 T link_enc_cfg_is_transmitter_mappable +ffffffff821d1120 T link_enc_cfg_get_stream_using_link_enc +ffffffff821d1220 T link_enc_cfg_get_link_using_link_enc +ffffffff821d1330 T link_enc_cfg_get_link_enc_used_by_link +ffffffff821d14b0 T link_enc_cfg_get_next_avail_link_enc +ffffffff821d1620 T link_enc_cfg_get_link_enc_used_by_stream +ffffffff821d1640 T link_enc_cfg_get_link_enc +ffffffff821d16d0 T link_enc_cfg_get_link_enc_used_by_stream_current +ffffffff821d1850 T link_enc_cfg_is_link_enc_avail +ffffffff821d1a50 T link_enc_cfg_set_transient_mode +ffffffff821d2000 T dc_get_link_at_index +ffffffff821d2030 T dc_get_edp_links +ffffffff821d20b0 T dc_get_edp_link_panel_inst +ffffffff821d2170 T dc_link_detect +ffffffff821d21a0 T dc_link_detect_connection_type +ffffffff821d21d0 T dc_link_get_status +ffffffff821d2200 T dc_link_is_hdcp14 +ffffffff821d2230 T dc_link_is_hdcp22 +ffffffff821d2260 T dc_link_clear_dprx_states +ffffffff821d2290 T dc_link_reset_cur_dp_mst_topology +ffffffff821d22c0 T dc_link_bandwidth_kbps +ffffffff821d22f0 T dc_get_cur_link_res_map +ffffffff821d2310 T dc_restore_link_res_map +ffffffff821d2330 T dc_link_update_dsc_config +ffffffff821d2360 T dc_is_oem_i2c_device_present +ffffffff821d23b0 T dc_submit_i2c +ffffffff821d23e0 T dc_submit_i2c_oem +ffffffff821d2430 T dc_link_dp_handle_automated_test +ffffffff821d2460 T dc_link_dp_set_test_pattern +ffffffff821d2490 T dc_link_set_drive_settings +ffffffff821d2530 T dc_link_set_preferred_link_settings +ffffffff821d2550 T dc_link_set_preferred_training_settings +ffffffff821d2580 T dc_dp_trace_is_initialized +ffffffff821d25b0 T dc_dp_trace_set_is_logged_flag +ffffffff821d25e0 T dc_dp_trace_is_logged +ffffffff821d2610 T dc_dp_trace_get_lt_end_timestamp +ffffffff821d2640 T dc_dp_trace_get_lt_counts +ffffffff821d2670 T dc_dp_trace_get_link_loss_count +ffffffff821d26a0 T dc_link_add_remote_sink +ffffffff821d26d0 T dc_link_remove_remote_sink +ffffffff821d2700 T dc_link_aux_transfer_raw +ffffffff821d2730 T dc_link_bw_kbps_from_raw_frl_link_rate_data +ffffffff821d2750 T dc_link_decide_edp_link_settings +ffffffff821d2780 T dc_link_dp_get_max_link_enc_cap +ffffffff821d27b0 T dc_link_dp_mst_decide_link_encoding_format +ffffffff821d27e0 T dc_link_get_link_cap +ffffffff821d2810 T dc_link_get_highest_encoding_format +ffffffff821d28e0 T dc_link_is_dp_sink_present +ffffffff821d2910 T dc_link_is_fec_supported +ffffffff821d2940 T dc_link_overwrite_extended_receiver_cap +ffffffff821d2970 T dc_link_should_enable_fec +ffffffff821d29a0 T dc_link_dp_dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff821d29d0 T dc_link_handle_usb4_bw_alloc_response +ffffffff821d2a00 T dc_link_check_link_loss_status +ffffffff821d2a30 T dc_link_dp_allow_hpd_rx_irq +ffffffff821d2a60 T dc_link_dp_handle_link_loss +ffffffff821d2a90 T dc_link_dp_read_hpd_rx_irq_data +ffffffff821d2ac0 T dc_link_handle_hpd_rx_irq +ffffffff821d2af0 T dc_link_dp_receiver_power_ctrl +ffffffff821d2b20 T dc_link_decide_lttpr_mode +ffffffff821d2b50 T dc_link_edp_panel_backlight_power_on +ffffffff821d2b80 T dc_link_get_backlight_level +ffffffff821d2bb0 T dc_link_get_backlight_level_nits +ffffffff821d2be0 T dc_link_set_backlight_level +ffffffff821d2c10 T dc_link_set_backlight_level_nits +ffffffff821d2c40 T dc_link_get_target_backlight_pwm +ffffffff821d2c70 T dc_link_get_psr_state +ffffffff821d2ca0 T dc_link_set_psr_allow_active +ffffffff821d2cd0 T dc_link_setup_psr +ffffffff821d2d00 T dc_link_get_replay_state +ffffffff821d2d30 T dc_link_wait_for_t12 +ffffffff821d2d60 T dc_link_get_hpd_state +ffffffff821d2d90 T dc_link_enable_hpd +ffffffff821d2dc0 T dc_link_disable_hpd +ffffffff821d2df0 T dc_link_enable_hpd_filter +ffffffff821d2e20 T dc_link_dp_dpia_validate +ffffffff821d3000 T resource_parse_asic_id +ffffffff821d3250 T dc_create_resource_pool +ffffffff821d3620 T dc_destroy_resource_pool +ffffffff821d3690 T resource_construct +ffffffff821d3c70 T resource_unreference_clock_source +ffffffff821d3cf0 T resource_reference_clock_source +ffffffff821d3d70 T resource_get_clock_source_reference +ffffffff821d3df0 T resource_are_vblanks_synchronizable +ffffffff821d4010 T resource_are_streams_timing_synchronizable +ffffffff821d4100 T resource_find_used_clk_src_for_sharing +ffffffff821d4240 T resource_get_num_mpc_splits +ffffffff821d42d0 T resource_get_num_odm_splits +ffffffff821d43a0 T resource_get_otg_master +ffffffff821d4450 T resource_build_scaling_params +ffffffff821d52e0 t calculate_odm_slice_in_timing_active +ffffffff821d5470 T resource_build_scaling_params_for_context +ffffffff821d55f0 T resource_find_free_secondary_pipe_legacy +ffffffff821d5690 T resource_find_free_pipe_used_in_cur_mpc_blending_tree +ffffffff821d5700 T resource_is_pipe_type +ffffffff821d5780 T recource_find_free_pipe_not_used_in_cur_res_ctx +ffffffff821d5800 T resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine +ffffffff821d5920 T resource_is_for_mpcc_combine +ffffffff821d59b0 T resource_find_any_free_pipe +ffffffff821d5a20 T resource_get_otg_master_for_stream +ffffffff821d5b50 T resource_get_opp_head +ffffffff821d5bf0 T dc_add_plane_to_context +ffffffff821d5ef0 T dc_remove_plane_from_context +ffffffff821d60f0 T dc_rem_all_planes_for_stream +ffffffff821d62b0 T dc_add_all_planes_for_stream +ffffffff821d6430 T dc_is_timing_changed +ffffffff821d64a0 T dc_is_stream_unchanged +ffffffff821d6590 T dc_is_stream_scaling_unchanged +ffffffff821d6640 T update_audio_usage +ffffffff821d66b0 T dc_add_stream_to_ctx +ffffffff821d67a0 T dc_remove_stream_from_ctx +ffffffff821d6bf0 T resource_map_pool_resources +ffffffff821d76e0 t acquire_first_split_pipe +ffffffff821d7860 t add_hpo_dp_link_enc_to_ctx +ffffffff821d7930 t find_first_free_audio +ffffffff821d79f0 T dc_resource_state_copy_construct_current +ffffffff821d7a10 T dc_resource_state_copy_construct +ffffffff821d7be0 T dc_resource_state_construct +ffffffff821d7c00 T dc_resource_is_dsc_encoding_supported +ffffffff821d7c50 T dc_validate_with_context +ffffffff821d8910 t planes_changed_for_existing_stream +ffffffff821d8aa0 T dc_validate_global_state +ffffffff821d8e60 T dc_resource_state_destruct +ffffffff821d8f40 T dc_resource_find_first_free_pll +ffffffff821d8fb0 T resource_build_info_frame +ffffffff821d96e0 T resource_map_clock_resources +ffffffff821d9890 T pipe_need_reprogram +ffffffff821d9a10 T resource_build_bit_depth_reduction_params +ffffffff821d9c40 T dc_validate_stream +ffffffff821d9e50 T dc_validate_plane +ffffffff821d9ee0 T resource_pixel_format_to_bpp +ffffffff821d9f60 T get_audio_check +ffffffff821da080 T get_temp_dp_link_res +ffffffff821da190 T reset_syncd_pipes_from_disabled_pipes +ffffffff821da2e0 T check_syncd_pipes_for_disabled_master_pipe +ffffffff821da440 T reset_sync_context_for_pipe +ffffffff821da4f0 T resource_transmitter_to_phy_idx +ffffffff821da550 T get_link_hwss +ffffffff821da610 T is_h_timing_divisible_by_2 +ffffffff821da670 T dc_resource_acquire_secondary_pipe_for_mpc_odm +ffffffff821da8a0 T update_dp_encoder_resources_for_test_harness +ffffffff821dab60 t calculate_plane_rec_in_timing_active +ffffffff821dae80 t calculate_init_and_vp +ffffffff821dc000 T dc_sink_retain +ffffffff821dc030 T dc_sink_release +ffffffff821dc0b0 T dc_sink_create +ffffffff821dd000 T dc_stat_get_dmub_notification +ffffffff821dd0d0 T dc_stat_get_dmub_dataout +ffffffff821de000 T update_stream_signal +ffffffff821de080 T dc_stream_retain +ffffffff821de0b0 T dc_stream_release +ffffffff821de150 T dc_create_stream_for_sink +ffffffff821de4b0 T dc_copy_stream +ffffffff821de590 T dc_stream_get_status_from_state +ffffffff821de5f0 T dc_stream_get_status +ffffffff821de660 T dc_optimize_timing_for_fsft +ffffffff821de6b0 T dc_stream_set_cursor_attributes +ffffffff821de8f0 t program_cursor_attributes +ffffffff821dea80 T dc_stream_set_cursor_position +ffffffff821debe0 t program_cursor_position +ffffffff821ded40 T dc_stream_add_writeback +ffffffff821def60 T dc_stream_remove_writeback +ffffffff821df0a0 T dc_stream_warmup_writeback +ffffffff821df0e0 T dc_stream_get_vblank_counter +ffffffff821df1b0 T dc_stream_send_dp_sdp +ffffffff821df4c0 T dc_stream_get_scanoutpos +ffffffff821df5a0 T dc_stream_dmdata_status_done +ffffffff821df660 T dc_stream_set_dynamic_metadata +ffffffff821df7d0 T dc_stream_add_dsc_to_resource +ffffffff821df820 T dc_stream_get_pipe_ctx +ffffffff821df8d0 T dc_stream_log +ffffffff821e0000 T enable_surface_flip_reporting +ffffffff821e0030 T dc_create_plane_state +ffffffff821e0200 T dc_plane_get_status +ffffffff821e0390 T dc_plane_state_retain +ffffffff821e03c0 T dc_plane_state_release +ffffffff821e0510 T dc_gamma_retain +ffffffff821e0540 T dc_gamma_release +ffffffff821e05a0 T dc_create_gamma +ffffffff821e0600 T dc_transfer_func_retain +ffffffff821e0630 T dc_transfer_func_release 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enc3_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff822bb040 T enc3_stream_encoder_update_dp_info_packets +ffffffff822bb350 T enc3_audio_mute_control +ffffffff822bb3d0 T enc3_se_dp_audio_setup +ffffffff822bb460 T enc3_se_dp_audio_enable +ffffffff822bb580 T enc3_se_hdmi_audio_setup +ffffffff822bb910 T dcn30_dio_stream_encoder_construct +ffffffff822bb980 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff822bc010 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff822bc260 t enc3_read_state +ffffffff822bc420 t enc3_dp_set_dsc_config +ffffffff822bc500 t enc3_dp_set_odm_combine +ffffffff822bd000 T dpp30_read_state +ffffffff822bd050 T dpp3_program_post_csc +ffffffff822bd250 T dpp3_set_pre_degam +ffffffff822bd310 T dpp3_cnv_setup +ffffffff822bdc80 T dpp3_set_cursor_attributes +ffffffff822bde00 T dpp3_get_optimal_number_of_taps +ffffffff822be920 T dpp3_construct +ffffffff822be980 t dpp3_deferred_update +ffffffff822bedb0 t dpp3_program_blnd_lut +ffffffff822bf8b0 t dpp3_program_shaper +ffffffff822c1b30 t dpp3_program_3dlut +ffffffff822c23b0 t dpp3_set3dlut_ram12 +ffffffff822c3000 T dpp3_program_cm_dealpha +ffffffff822c30a0 T dpp3_program_cm_bias +ffffffff822c31a0 T dpp3_program_gamcor_lut +ffffffff822c3c90 t dpp3_power_on_gamcor_lut +ffffffff822c3de0 T dpp3_set_hdr_multiplier +ffffffff822c3e30 T dpp3_cm_set_gamut_remap +ffffffff822c5000 T dwb3_config_fc +ffffffff822c51f0 T dwb3_set_stereo +ffffffff822c52d0 T dwb3_enable +ffffffff822c5450 T dwb3_set_denorm +ffffffff822c5590 T dwb3_disable +ffffffff822c5660 T dwb3_update +ffffffff822c57d0 T dwb3_is_enabled +ffffffff822c5880 T dwb3_set_new_content +ffffffff822c58c0 T dcn30_dwbc_construct +ffffffff822c5910 T dwb3_set_host_read_rate_control +ffffffff822c5990 t dwb3_get_caps +ffffffff822c6000 T dwb3_ogam_set_input_transfer_func +ffffffff822c6aa0 T dwb3_set_gamut_remap +ffffffff822c6d90 T dwb3_program_hdr_mult +ffffffff822c7000 T hubbub3_init_dchub_sys_ctx +ffffffff822c7200 T hubbub3_program_watermarks +ffffffff822c7340 T hubbub3_dcc_support_swizzle +ffffffff822c7400 T hubbub3_get_dcc_compression_cap +ffffffff822c7600 T hubbub3_force_wm_propagate_to_pipes +ffffffff822c76c0 T hubbub3_force_pstate_change_control +ffffffff822c7740 T hubbub3_init_watermarks +ffffffff822c7b70 T hubbub3_construct +ffffffff822c8000 T hubp3_set_vm_system_aperture_settings +ffffffff822c8150 T hubp3_program_surface_flip_and_addr +ffffffff822c8c40 T hubp3_dcc_control +ffffffff822c8d10 T hubp3_dcc_control_sienna_cichlid +ffffffff822c8e30 T hubp3_dmdata_set_attributes +ffffffff822c9070 T hubp3_program_surface_config +ffffffff822c93b0 T hubp3_read_state +ffffffff822c96b0 T hubp3_setup +ffffffff822c9760 T hubp3_init +ffffffff822c9790 T hubp3_construct +ffffffff822ca000 T dcn30_set_blend_lut +ffffffff822ca070 T dcn30_set_input_transfer_func +ffffffff822ca1f0 T dcn30_set_output_transfer_func +ffffffff822ca580 T dcn30_update_writeback +ffffffff822ca620 t dcn30_set_writeback +ffffffff822ca800 T dcn30_mmhubbub_warmup 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+ffffffff822d5680 T optc3_program_blank_color +ffffffff822d57d0 T optc3_set_drr_trigger_window +ffffffff822d5870 T optc3_set_vtotal_change_limit +ffffffff822d58f0 T optc3_set_dsc_config +ffffffff822d5950 T optc3_set_odm_bypass +ffffffff822d5af0 T optc3_set_odm_combine +ffffffff822d5e70 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff822d5ef0 T optc3_set_vtotal_min_max +ffffffff822d5f30 T optc3_tg_init +ffffffff822d5fa0 T dcn30_timing_generator_init +ffffffff822d7000 T dcn30_add_stream_to_ctx +ffffffff822d7020 T dcn30_populate_dml_pipes_from_context +ffffffff822d7120 T dcn30_populate_dml_writeback_from_context +ffffffff822d7190 T dcn30_calc_max_scaled_time +ffffffff822d71f0 T dcn30_set_mcif_arb_params +ffffffff822d7370 T dcn30_acquire_post_bldn_3dlut +ffffffff822d7500 T dcn30_release_post_bldn_3dlut +ffffffff822d75b0 T dcn30_internal_validate_bw +ffffffff822d83e0 t dcn30_split_stream_for_mpc_or_odm +ffffffff822d8730 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff822d8820 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff822d88c0 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff822d8970 T dcn30_update_soc_for_wm_a +ffffffff822d89d0 T dcn30_calculate_wm_and_dlg +ffffffff822d8a50 T dcn30_validate_bandwidth +ffffffff822d8f00 T dcn30_update_bw_bounding_box +ffffffff822d95f0 T dcn30_create_resource_pool +ffffffff822daef0 t dcn30_resource_destruct +ffffffff822db550 t dcn30_destroy_resource_pool +ffffffff822db5c0 t dcn30_panel_cntl_create +ffffffff822db650 t dcn30_link_encoder_create +ffffffff822db710 t dcn30_get_panel_config_defaults +ffffffff822db790 t read_dce_straps +ffffffff822db7c0 t dcn30_create_audio +ffffffff822db7f0 t dcn30_stream_encoder_create +ffffffff822db9b0 t dcn30_hwseq_create +ffffffff822dc000 T vpg3_update_generic_info_packet +ffffffff822dca10 T vpg3_construct +ffffffff822dd000 T dccg301_create +ffffffff822de000 T dcn301_link_encoder_construct +ffffffff822df000 T hubbub301_construct +ffffffff822e0000 T dcn301_hw_sequencer_construct +ffffffff822e1000 T optc301_set_drr +ffffffff822e1260 T optc301_setup_manual_trigger +ffffffff822e1390 T dcn301_timing_generator_init +ffffffff822e2000 T dcn301_panel_cntl_construct +ffffffff822e2050 t dcn301_panel_cntl_destroy +ffffffff822e20a0 t dcn301_panel_cntl_hw_init +ffffffff822e2320 t dcn301_is_panel_backlight_on +ffffffff822e2390 t dcn301_is_panel_powered_on +ffffffff822e2450 t dcn301_store_backlight_level +ffffffff822e2510 t dcn301_get_16_bit_backlight_from_pwm +ffffffff822e3000 T dcn301_create_resource_pool +ffffffff822e48a0 t dcn301_destruct +ffffffff822e4ec0 t dcn301_destroy_resource_pool +ffffffff822e4f30 t dcn301_panel_cntl_create +ffffffff822e4fc0 t dcn301_link_encoder_create +ffffffff822e5080 t dcn301_calculate_wm_and_dlg +ffffffff822e5100 t read_dce_straps +ffffffff822e5130 t dcn301_create_audio +ffffffff822e5160 t dcn301_stream_encoder_create +ffffffff822e5320 t dcn301_hwseq_create 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dcn303_create_resource_pool +ffffffff822ee570 t dcn303_resource_destruct +ffffffff822eeb70 t dcn303_destroy_resource_pool +ffffffff822eebe0 t dcn303_panel_cntl_create +ffffffff822eec70 t dcn303_link_encoder_create +ffffffff822eed30 t dcn303_get_panel_config_defaults +ffffffff822eedb0 t read_dce_straps +ffffffff822eede0 t dcn303_create_audio +ffffffff822eee10 t dcn303_stream_encoder_create +ffffffff822eefd0 t dcn303_hwseq_create +ffffffff822f0000 T afmt31_powerdown +ffffffff822f0090 T afmt31_poweron +ffffffff822f0120 T afmt31_construct +ffffffff822f1000 T apg31_construct +ffffffff822f1050 t apg31_se_audio_setup +ffffffff822f1170 t apg31_enable +ffffffff822f12a0 t apg31_disable +ffffffff822f2000 T dccg31_update_dpp_dto +ffffffff822f2180 T dccg31_set_dpstreamclk +ffffffff822f2320 t dccg31_disable_dpstreamclk +ffffffff822f2480 T dccg31_enable_symclk32_se +ffffffff822f27b0 T dccg31_disable_symclk32_se +ffffffff822f2ab0 T dccg31_enable_symclk32_le +ffffffff822f2bd0 T dccg31_disable_symclk32_le +ffffffff822f2cc0 T dccg31_set_symclk32_le_root_clock_gating +ffffffff822f2de0 T dccg31_disable_dscclk +ffffffff822f3050 T dccg31_enable_dscclk +ffffffff822f32f0 T dccg31_set_physymclk +ffffffff822f3860 T dccg31_set_dtbclk_dto +ffffffff822f3b50 T dccg31_set_audio_dtbclk_dto +ffffffff822f3c80 T dccg31_get_dccg_ref_freq +ffffffff822f3cb0 T dccg31_set_dispclk_change_mode +ffffffff822f3d00 T dccg31_init +ffffffff822f43a0 T dccg31_otg_add_pixel +ffffffff822f43e0 T dccg31_otg_drop_pixel +ffffffff822f4420 T dccg31_create +ffffffff822f5000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff822f53c0 T dcn31_link_encoder_construct +ffffffff822f55b0 T dcn31_link_encoder_construct_minimal +ffffffff822f5630 T dcn31_link_encoder_enable_dp_output +ffffffff822f58b0 T dcn31_link_encoder_enable_dp_mst_output +ffffffff822f5b30 T dcn31_link_encoder_disable_output +ffffffff822f5de0 T dcn31_link_encoder_is_in_alt_mode +ffffffff822f5f40 T dcn31_link_encoder_get_max_link_cap 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dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff822f9fd0 t dcn31_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num +ffffffff822fa0a0 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff822fa2f0 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff822fa4a0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff822fa790 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff822fa8a0 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff822fa960 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff822faa50 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff822fac40 t dcn31_hpo_dp_stream_enc_read_state +ffffffff822fae00 t dcn31_set_hblank_min_symbol_width +ffffffff822fb000 T hubbub31_init_dchub_sys_ctx +ffffffff822fb220 T hubbub31_init +ffffffff822fb2d0 T hubbub31_construct +ffffffff822fb370 t hubbub31_get_dcc_compression_cap +ffffffff822fb570 t hubbub31_get_dchub_ref_freq +ffffffff822fb650 t hubbub31_program_watermarks +ffffffff822fd1b0 t hubbub31_verify_allow_pstate_change_high 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optc31_disable_crtc +ffffffff82302780 t optc31_set_odm_combine +ffffffff82303000 T dcn31_panel_cntl_construct +ffffffff82303040 t dcn31_panel_cntl_destroy +ffffffff82303090 t dcn31_panel_cntl_hw_init +ffffffff82303190 t dcn31_is_panel_backlight_on +ffffffff82303240 t dcn31_is_panel_powered_on +ffffffff82303300 t dcn31_store_backlight_level +ffffffff823033d0 t dcn31_get_16_bit_backlight_from_pwm +ffffffff82304000 T dcn31x_populate_dml_pipes_from_context +ffffffff82304190 T dcn31_populate_dml_pipes_from_context +ffffffff82304610 T dcn31_calculate_wm_and_dlg +ffffffff82304690 T dcn31_populate_dml_writeback_from_context +ffffffff82304700 T dcn31_set_mcif_arb_params +ffffffff82304770 T dcn31_validate_bandwidth +ffffffff82304bd0 T dcn31_create_resource_pool +ffffffff82306220 t dcn31_resource_destruct +ffffffff823069a0 t dcn31_destroy_resource_pool +ffffffff82306a10 t dcn31_panel_cntl_create +ffffffff82306a80 t dcn31_link_encoder_create +ffffffff82306b40 t dcn31_link_enc_create_minimal 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dcn315_create_resource_pool +ffffffff82314540 t dcn315_resource_destruct +ffffffff82314ca0 t dcn315_destroy_resource_pool +ffffffff82314d10 t dcn31_panel_cntl_create +ffffffff82314d80 t dcn31_link_encoder_create +ffffffff82314e40 t dcn31_link_enc_create_minimal +ffffffff82314f00 t dcn315_populate_dml_pipes_from_context +ffffffff82315670 t dcn315_get_panel_config_defaults +ffffffff823156b0 t read_dce_straps +ffffffff823156e0 t dcn31_create_audio +ffffffff82315710 t dcn315_stream_encoder_create +ffffffff823158d0 t dcn31_hpo_dp_stream_encoder_create +ffffffff82315ae0 t dcn31_hpo_dp_link_encoder_create +ffffffff82315b80 t dcn31_hwseq_create +ffffffff82316000 T dcn316_create_resource_pool +ffffffff82317550 t dcn316_resource_destruct +ffffffff82317cb0 t dcn316_destroy_resource_pool +ffffffff82317d20 t dcn31_panel_cntl_create +ffffffff82317d90 t dcn31_link_encoder_create +ffffffff82317e50 t dcn31_link_enc_create_minimal +ffffffff82317f10 t dcn316_populate_dml_pipes_from_context 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enc32_stream_encoder_dp_unblank +ffffffff8231b5b0 T enc32_enable_fifo +ffffffff8231b670 t enc32_reset_fifo +ffffffff8231b790 T dcn32_dio_stream_encoder_construct +ffffffff8231b800 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff8231bdf0 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff8231bf90 t enc32_read_state +ffffffff8231c120 t enc32_dp_set_dsc_config +ffffffff8231c170 t enc32_dp_set_odm_combine +ffffffff8231c1b0 t enc32_set_dig_input_mode +ffffffff8231d000 T dpp32_construct +ffffffff8231d060 t dscl32_calc_lb_num_partitions +ffffffff8231e000 T hpo_dp_link_encoder32_construct +ffffffff8231e060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff8231f000 T hubbub32_set_request_limit +ffffffff8231f140 T dcn32_program_det_size +ffffffff8231f310 T hubbub32_program_urgent_watermarks +ffffffff8231fb10 T hubbub32_program_stutter_watermarks +ffffffff8231ffa0 T hubbub32_program_pstate_watermarks +ffffffff82320470 T hubbub32_program_usr_watermarks +ffffffff823206f0 T hubbub32_force_usr_retraining_allow +ffffffff82320780 T hubbub32_force_wm_propagate_to_pipes +ffffffff82320830 T hubbub32_init +ffffffff82320990 T hubbub32_construct +ffffffff82320a10 t hubbub32_wm_read_state +ffffffff82320f10 t hubbub32_program_watermarks +ffffffff82321060 t hubbub32_init_watermarks +ffffffff823215e0 t dcn32_program_compbuf_size +ffffffff823218b0 t dcn32_init_crb +ffffffff82322000 T hubp32_update_force_pstate_disallow +ffffffff82322090 T hubp32_update_force_cursor_pstate_disallow +ffffffff82322120 T hubp32_update_mall_sel +ffffffff823221c0 T hubp32_prepare_subvp_buffering +ffffffff82322260 T hubp32_phantom_hubp_post_enable +ffffffff82322390 T hubp32_cursor_set_attributes +ffffffff82322690 T hubp32_init +ffffffff823226c0 T hubp32_construct +ffffffff82323000 T dcn32_dsc_pg_control +ffffffff82323370 T dcn32_enable_power_gating_plane +ffffffff82323630 T dcn32_hubp_pg_control +ffffffff823238e0 T dcn32_apply_idle_power_optimizations +ffffffff82323bf0 T dcn32_commit_subvp_config +ffffffff82323ca0 T dcn32_subvp_pipe_control_lock +ffffffff82323e80 T dcn32_subvp_pipe_control_lock_fast +ffffffff82323f00 T dcn32_set_mpc_shaper_3dlut +ffffffff82324030 T dcn32_set_mcm_luts +ffffffff823241f0 T dcn32_set_input_transfer_func +ffffffff82324350 T dcn32_set_output_transfer_func +ffffffff823245d0 T dcn32_update_force_pstate +ffffffff82324820 T dcn32_update_mall_sel +ffffffff82324a30 T dcn32_program_mall_pipe_config +ffffffff82324b20 T dcn32_init_hw +ffffffff82325520 T dcn32_update_odm +ffffffff82325bc0 T dcn32_calculate_dccg_k1_k2_values +ffffffff82325e20 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff82325ed0 T dcn32_set_pixels_per_cycle +ffffffff82326030 T dcn32_resync_fifo_dccg_dio +ffffffff82326200 T dcn32_unblank_stream +ffffffff82326450 T dcn32_disable_link_output +ffffffff82326840 T dcn32_update_phantom_vp_position +ffffffff82326950 T dcn32_apply_update_flags_for_phantom +ffffffff823269e0 T dcn32_dsc_pg_status +ffffffff82326ac0 T dcn32_update_dsc_pg +ffffffff82326bd0 T dcn32_enable_phantom_streams +ffffffff82326d30 T dcn32_init_blank +ffffffff82326fc0 T dcn32_blank_phantom +ffffffff82327170 T dcn32_is_pipe_topology_transition_seamless +ffffffff82328000 T dcn32_hw_sequencer_init_functions +ffffffff82329000 T dcn32_mmhubbub_construct +ffffffff82329050 t mmhubbub32_warmup_mcif +ffffffff823292a0 t mmhubbub32_config_mcif_buf +ffffffff82329800 t mmhubbub32_config_mcif_arb +ffffffff8232a000 T mpc32_mpc_init +ffffffff8232a210 T mpc32_power_on_blnd_lut +ffffffff8232a3b0 T mpc32_configure_post1dlut +ffffffff8232a4c0 T mpc32_program_post1dluta_settings +ffffffff8232a6e0 T mpc32_program_post1dlutb_settings +ffffffff8232a900 T mpc32_program_post1dlut_pwl +ffffffff8232ad90 T mpc32_program_post1dlut +ffffffff8232b100 T mpc32_configure_shaper_lut +ffffffff8232b230 T mpc32_program_shaper_luta_settings +ffffffff8232c190 T mpc32_program_shaper_lutb_settings +ffffffff8232d0f0 T mpc32_program_shaper_lut +ffffffff8232d2b0 T mpc32_power_on_shaper_3dlut +ffffffff8232d510 T mpc32_program_shaper +ffffffff8232d8a0 T mpc32_select_3dlut_ram +ffffffff8232d950 T mpc32_select_3dlut_ram_mask +ffffffff8232da30 T mpc32_set3dlut_ram12 +ffffffff8232dc40 T mpc32_set3dlut_ram10 +ffffffff8232dd20 T mpc32_program_3dlut +ffffffff8232e7e0 T dcn32_mpc_construct +ffffffff8232f000 T optc32_set_h_timing_div_manual_mode +ffffffff8232f040 T dcn32_timing_generator_init +ffffffff8232f0b0 t optc32_enable_crtc +ffffffff8232f1e0 t optc32_disable_crtc +ffffffff8232f3c0 t optc32_phantom_crtc_post_enable +ffffffff8232f490 t optc32_disable_phantom_otg +ffffffff8232f590 t optc32_set_drr +ffffffff8232f770 t optc32_set_odm_bypass +ffffffff8232f900 t optc32_set_odm_combine +ffffffff82330000 T dcn32_panel_cntl_create +ffffffff82330070 T dcn32_acquire_post_bldn_3dlut +ffffffff82330170 T dcn32_release_post_bldn_3dlut +ffffffff82330220 T dcn32_retain_phantom_pipes +ffffffff82330330 T dcn32_remove_phantom_pipes +ffffffff823304d0 T dcn32_add_phantom_pipes +ffffffff82330950 T dcn32_validate_bandwidth +ffffffff82330ec0 T dcn32_populate_dml_pipes_from_context +ffffffff82331350 T dcn32_calculate_wm_and_dlg +ffffffff823313d0 T dcn32_create_resource_pool +ffffffff823314a0 t dcn32_resource_construct +ffffffff8233cca0 T dcn32_acquire_free_pipe_as_secondary_dpp_pipe +ffffffff8233cfc0 T dcn32_calc_num_avail_chans_for_mall +ffffffff8233d030 t dcn32_mpc_create +ffffffff82341690 t dcn32_dwbc_create +ffffffff823420c0 t dcn32_mmhubbub_create +ffffffff823425a0 t dcn32_resource_destruct +ffffffff82342d30 t dcn32_destroy_resource_pool +ffffffff82342da0 t dcn32_link_encoder_create +ffffffff82343e80 t dcn32_update_bw_bounding_box +ffffffff82343ee0 t read_dce_straps +ffffffff82343f10 t dcn32_create_audio +ffffffff82344290 t dcn32_stream_encoder_create +ffffffff82346110 t dcn32_hpo_dp_stream_encoder_create +ffffffff82346f40 t dcn32_hpo_dp_link_encoder_create +ffffffff823473b0 t dcn32_hwseq_create +ffffffff823478a0 t dcn32_vpg_create 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dcn_find_dcfclk_suits_all +ffffffff82380380 T dcn_bw_update_from_pplib_fclks +ffffffff82380500 T dcn_bw_update_from_pplib_dcfclks +ffffffff823805d0 T dcn_get_soc_clks +ffffffff82380650 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff82381000 T dcn10_resource_construct_fp +ffffffff82382000 T dcn20_populate_dml_writeback_from_context +ffffffff82382190 T dcn20_fpu_set_wb_arb_params +ffffffff82382390 T dcn20_calculate_dlg_params +ffffffff82382c20 T dcn20_populate_dml_pipes_from_context +ffffffff82383ba0 T dcn20_calculate_wm +ffffffff823844a0 T dcn20_update_bounding_box +ffffffff82384730 T dcn20_cap_soc_clocks +ffffffff82384aa0 T dcn20_patch_bounding_box +ffffffff82384c90 T dcn20_validate_bandwidth_fp +ffffffff82384e60 t dcn20_validate_bandwidth_internal +ffffffff823852e0 T dcn20_fpu_set_wm_ranges +ffffffff82385390 T dcn20_fpu_adjust_dppclk +ffffffff82385430 T dcn21_populate_dml_pipes_from_context +ffffffff82385550 T dcn21_validate_bandwidth_fp +ffffffff82386090 T dcn21_update_bw_bounding_box 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CalculatePrefetchSourceLines +ffffffff823a5840 t CalculateWriteBackDelay +ffffffff823a5b80 t CalculateDelayAfterScaler +ffffffff823a5f10 t CalculatePrefetchSchedule +ffffffff823a6d30 t CalculateFlipSchedule +ffffffff823a7140 t adjust_ReturnBW +ffffffff823a8000 T dml20_rq_dlg_get_rq_reg +ffffffff823a84e0 t dml20_rq_dlg_get_rq_params +ffffffff823a86b0 T dml20_rq_dlg_get_dlg_reg +ffffffff823aa980 t get_surf_rq_param +ffffffff823ab210 t calculate_ttu_cursor +ffffffff823ac000 T dml20v2_rq_dlg_get_rq_reg +ffffffff823ac4e0 t dml20v2_rq_dlg_get_rq_params +ffffffff823ac6b0 T dml20v2_rq_dlg_get_dlg_reg +ffffffff823ae990 t get_surf_rq_param +ffffffff823af220 t calculate_ttu_cursor +ffffffff823b0000 T dml21_recalculate +ffffffff823b0770 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff823b6290 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff823bcb30 t TruncToValidBPP +ffffffff823bd0d0 t CalculateDCFCLKDeepSleep +ffffffff823bd440 t CalculateVMAndRowBytes +ffffffff823bdcf0 t CalculatePrefetchSourceLines +ffffffff823bdee0 t CalculateWriteBackDelay +ffffffff823be220 t CalculatePrefetchSchedulePerPlane +ffffffff823bea80 t CalculateUrgentBurstFactor +ffffffff823beec0 t CalculateFlipSchedule +ffffffff823bf400 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff823c0440 t CalculatePrefetchSchedule +ffffffff823c2000 T dml21_rq_dlg_get_rq_reg +ffffffff823c24e0 t dml_rq_dlg_get_rq_params +ffffffff823c26b0 T dml21_rq_dlg_get_dlg_reg +ffffffff823c4e10 t get_surf_rq_param +ffffffff823c5780 t calculate_ttu_cursor +ffffffff823c6000 T optc3_fpu_set_vrr_m_const +ffffffff823c6540 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff823c6860 T dcn30_fpu_set_mcif_arb_params +ffffffff823c6a20 T dcn30_fpu_update_soc_for_wm_a +ffffffff823c6af0 T dcn30_fpu_calculate_wm_and_dlg +ffffffff823c7690 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff823c78b0 T dcn30_fpu_update_dram_channel_width_bytes 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CalculateFlipSchedule +ffffffff823dce90 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff823ddc40 t CalculateSwathWidth +ffffffff823df000 T dml30_rq_dlg_get_rq_reg +ffffffff823df4f0 t dml_rq_dlg_get_rq_params +ffffffff823df790 T dml30_rq_dlg_get_dlg_reg +ffffffff823e22f0 t get_surf_rq_param +ffffffff823e2cb0 t calculate_ttu_cursor +ffffffff823e3000 T dcn301_update_bw_bounding_box +ffffffff823e3300 T dcn301_fpu_set_wm_ranges +ffffffff823e33b0 T dcn301_fpu_init_soc_bounding_box +ffffffff823e3460 T dcn301_calculate_wm_and_dlg_fp +ffffffff823e37d0 t calculate_wm_set_for_vlevel +ffffffff823e4000 T dcn302_fpu_update_bw_bounding_box +ffffffff823e49e0 T dcn302_fpu_init_soc_bounding_box +ffffffff823e5000 T dcn303_fpu_update_bw_bounding_box +ffffffff823e5a40 T dcn303_fpu_init_soc_bounding_box +ffffffff823e6000 T dcn31_zero_pipe_dcc_fraction +ffffffff823e6070 T dcn31_update_soc_for_wm_a +ffffffff823e6130 T dcn315_update_soc_for_wm_a +ffffffff823e6210 T dcn31_calculate_wm_and_dlg_fp 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CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff823fbec0 t CalculateSwathWidth +ffffffff823fc430 t CalculatePrefetchSchedule +ffffffff823fd950 t CalculateVupdateAndDynamicMetadataParameters +ffffffff823fe000 T dml31_rq_dlg_get_rq_reg +ffffffff823fe4f0 t dml_rq_dlg_get_rq_params +ffffffff823fe790 T dml31_rq_dlg_get_dlg_reg +ffffffff82401680 t get_surf_rq_param +ffffffff82403000 T dcn314_update_bw_bounding_box_fpu +ffffffff82403410 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff82404000 T dml314_recalculate +ffffffff824042a0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8240b4c0 T dml314_CalculateWriteBackDISPCLK +ffffffff8240b650 t dml_max3 +ffffffff8240b6c0 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff82413df0 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff82414060 t CalculateSwathAndDETConfiguration +ffffffff824146d0 t TruncToValidBPP +ffffffff82414930 t CalculateDCFCLKDeepSleep +ffffffff82414c80 t CalculateVMAndRowBytes +ffffffff82415320 t CalculatePrefetchSourceLines +ffffffff82415510 t CalculateUrgentBurstFactor +ffffffff824157c0 t CalculateMaxVStartup +ffffffff82415930 t UseMinimumDCFCLK +ffffffff82416950 t CalculatePrefetchSchedulePerPlane +ffffffff824170d0 t CalculateFlipSchedule +ffffffff824176c0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82418340 t CalculateSwathWidth +ffffffff824188b0 t CalculatePrefetchSchedule +ffffffff82419dd0 t CalculateVupdateAndDynamicMetadataParameters +ffffffff8241b000 T dml314_rq_dlg_get_rq_reg +ffffffff8241b4f0 t dml_rq_dlg_get_rq_params +ffffffff8241b790 T dml314_rq_dlg_get_dlg_reg +ffffffff8241e670 t get_surf_rq_param +ffffffff82420000 T dcn32_build_wm_range_table_fpu +ffffffff824203a0 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff82420570 T dcn32_internal_validate_bw +ffffffff824225f0 T dcn32_helper_populate_phantom_dlg_params +ffffffff824227b0 T dcn32_predict_pipe_split +ffffffff82422a00 T dcn32_set_phantom_stream_timing +ffffffff82422d30 T dcn32_determine_max_vratio_prefetch +ffffffff82422e10 t dcn32_split_stream_for_mpc_or_odm +ffffffff82423200 T dcn32_calculate_wm_and_dlg_fpu +ffffffff82424b20 T dcn32_patch_dpm_table +ffffffff82424d30 T dcn32_update_bw_bounding_box_fpu +ffffffff82427480 T dcn32_zero_pipe_dcc_fraction +ffffffff824274f0 T dcn32_allow_subvp_with_active_margin +ffffffff824275c0 T dcn32_allow_subvp_high_refresh_rate +ffffffff824277e0 T dcn32_assign_fpo_vactive_candidate +ffffffff824278a0 T dcn32_find_vactive_pipe +ffffffff82427a10 T dcn32_set_clock_limits +ffffffff82427a60 T dcn32_override_min_req_memclk +ffffffff82427b30 t subvp_drr_schedulable +ffffffff82427df0 t get_optimal_ntuple +ffffffff82429000 T dml32_recalculate +ffffffff8242d510 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff82436000 T dml32_dscceComputeDelay +ffffffff82436150 T dml32_dscComputeDelay +ffffffff82436190 T IsVertical +ffffffff824361c0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff82436540 t dml_max3 +ffffffff824365b0 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff824368e0 T dml32_CalculateSwathAndDETConfiguration +ffffffff82437140 T dml32_CalculateSwathWidth +ffffffff82437ab0 T dml32_UnboundedRequest +ffffffff82437b20 T dml32_CalculateDETBufferSize +ffffffff824381a0 T dml32_CalculateODMMode +ffffffff82438970 T dml32_CalculateRequiredDispclk +ffffffff82438b40 T dml32_RoundToDFSGranularity +ffffffff82438bd0 T dml32_CalculateOutputLink +ffffffff824396d0 T dml32_TruncToValidBPP +ffffffff82439a10 T dml32_CalculateDPPCLK +ffffffff82439bc0 T dml32_RequiredDTBCLK +ffffffff82439e60 t dml_max4 +ffffffff82439ef0 T dml32_DSCDelayRequirement +ffffffff8243a400 T dml32_CalculateSurfaceSizeInMall +ffffffff8243b110 T dml32_CalculateVMRowAndSwath +ffffffff8243bf50 T dml32_CalculateVMAndRowBytes +ffffffff8243ccb0 T dml32_CalculatePrefetchSourceLines +ffffffff8243cf20 T dml32_CalculateMALLUseForStaticScreen +ffffffff8243d060 T dml32_CalculateRowBandwidth +ffffffff8243d1c0 T dml32_CalculateUrgentLatency +ffffffff8243d280 T dml32_CalculateUrgentBurstFactor +ffffffff8243d540 T dml32_CalculateDCFCLKDeepSleep +ffffffff8243d8b0 T dml32_CalculateWriteBackDelay +ffffffff8243da30 T dml32_UseMinimumDCFCLK +ffffffff8243eb10 T dml32_CalculateExtraLatencyBytes +ffffffff8243ece0 T dml32_CalculateTWait +ffffffff8243ede0 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff8243f060 T dml32_get_return_bw_mbps +ffffffff8243f240 T dml32_get_return_bw_mbps_vm_only +ffffffff8243f330 T dml32_CalculateExtraLatency +ffffffff8243f560 T dml32_CalculatePrefetchSchedule +ffffffff82440d30 T dml32_CalculateFlipSchedule +ffffffff82441300 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff824424c0 T dml32_CalculateWriteBackDISPCLK +ffffffff824426b0 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff82442700 T dml32_CalculatePixelDeliveryTimes +ffffffff82442b90 T dml32_CalculateMetaAndPTETimes +ffffffff82443300 T dml32_CalculateVMGroupAndRequestTimes +ffffffff82443870 T dml32_CalculateDCCConfiguration +ffffffff82443ed0 T dml32_CalculateStutterEfficiency +ffffffff82444e90 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff82444f90 T dml32_CalculateVActiveBandwithSupport +ffffffff82445100 T dml32_CalculatePrefetchBandwithSupport +ffffffff82445430 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff82445590 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff82445820 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff82446000 T dml32_rq_dlg_get_rq_reg +ffffffff82446750 T dml32_rq_dlg_get_dlg_reg +ffffffff82449000 T dcn321_update_bw_bounding_box_fpu +ffffffff8244b860 t get_optimal_ntuple +ffffffff8244c000 T dml_init_instance +ffffffff8244c320 T dml_get_status_message +ffffffff8244c360 T dml_log_pipe_params +ffffffff8244c390 T dml_log_mode_support_params +ffffffff8244d000 T dml_get_voltage_level +ffffffff8244d2c0 t fetch_socbb_params +ffffffff8244d7b0 t fetch_ip_params +ffffffff8244dc50 t fetch_pipe_params +ffffffff8244ece0 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff8244ed60 T get_clk_dcf_deepsleep +ffffffff8244eeb0 T get_wm_urgent +ffffffff8244f000 T get_wm_memory_trip +ffffffff8244f150 T get_wm_writeback_urgent +ffffffff8244f2a0 T get_wm_stutter_exit +ffffffff8244f3f0 T get_wm_stutter_enter_exit +ffffffff8244f540 T get_wm_z8_stutter_exit +ffffffff8244f690 T get_wm_z8_stutter_enter_exit +ffffffff8244f7e0 T get_stutter_efficiency_z8 +ffffffff8244f930 T get_stutter_num_bursts_z8 +ffffffff8244fa80 T get_wm_dram_clock_change +ffffffff8244fbd0 T get_wm_writeback_dram_clock_change +ffffffff8244fd20 T get_stutter_efficiency +ffffffff8244fe70 T get_stutter_efficiency_no_vblank +ffffffff8244ffc0 T get_stutter_period +ffffffff82450110 T get_urgent_latency +ffffffff82450260 T get_urgent_extra_latency +ffffffff824503b0 T get_nonurgent_latency +ffffffff82450500 T get_dram_clock_change_latency +ffffffff82450650 T get_dispclk_calculated +ffffffff824507a0 T get_total_data_read_bw +ffffffff824508f0 T get_return_bw +ffffffff82450a40 T get_tcalc +ffffffff82450b90 T get_fraction_of_urgent_bandwidth +ffffffff82450ce0 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff82450e30 T get_cstate_max_cap_mode +ffffffff82450f90 T get_comp_buffer_size_kbytes +ffffffff824510e0 T get_pixel_chunk_size_in_kbyte +ffffffff82451230 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff82451380 T get_meta_chunk_size_in_kbyte +ffffffff824514d0 T get_min_pixel_chunk_size_in_byte +ffffffff82451620 T get_min_meta_chunk_size_in_byte +ffffffff82451770 T get_fclk_watermark +ffffffff824518c0 T get_usr_retraining_watermark +ffffffff82451a10 T get_comp_buffer_reserved_space_kbytes +ffffffff82451b60 T get_comp_buffer_reserved_space_64bytes +ffffffff82451cb0 T get_comp_buffer_reserved_space_zs +ffffffff82451e00 T get_unbounded_request_enabled +ffffffff82451f60 T get_dsc_delay +ffffffff824520c0 T get_dppclk_calculated +ffffffff82452220 T get_dscclk_calculated +ffffffff82452380 T get_min_ttu_vblank +ffffffff824524e0 T get_min_ttu_vblank_in_us +ffffffff82452640 T get_vratio_prefetch_l +ffffffff824527a0 T get_vratio_prefetch_c +ffffffff82452900 T get_dst_x_after_scaler +ffffffff82452a60 T get_dst_y_after_scaler +ffffffff82452bc0 T get_dst_y_per_vm_vblank +ffffffff82452d20 T get_dst_y_per_row_vblank +ffffffff82452e80 T get_dst_y_prefetch +ffffffff82452fe0 T get_dst_y_per_vm_flip +ffffffff82453140 T get_dst_y_per_row_flip +ffffffff824532a0 T get_refcyc_per_vm_group_vblank +ffffffff82453400 T get_refcyc_per_vm_group_flip +ffffffff82453560 T get_refcyc_per_vm_req_vblank +ffffffff824536c0 T get_refcyc_per_vm_req_flip +ffffffff82453820 T get_refcyc_per_vm_group_vblank_in_us +ffffffff82453980 T get_refcyc_per_vm_group_flip_in_us +ffffffff82453ae0 T get_refcyc_per_vm_req_vblank_in_us +ffffffff82453c40 T get_refcyc_per_vm_req_flip_in_us +ffffffff82453da0 T get_refcyc_per_vm_dmdata_in_us +ffffffff82453f00 T get_dmdata_dl_delta_in_us +ffffffff82454060 T get_refcyc_per_line_delivery_l_in_us +ffffffff824541c0 T get_refcyc_per_line_delivery_c_in_us +ffffffff82454320 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff82454480 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff824545e0 T get_refcyc_per_req_delivery_l_in_us +ffffffff82454740 T get_refcyc_per_req_delivery_c_in_us +ffffffff824548a0 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff82454a00 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff82454b60 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff82454cc0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff82454e20 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff82454f80 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff824550e0 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff82455240 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff824553a0 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff82455500 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff82455660 T get_vstartup +ffffffff824557c0 T get_vupdate_offset +ffffffff82455920 T get_vupdate_width +ffffffff82455a80 T get_vready_offset +ffffffff82455be0 T get_vready_at_or_after_vsync +ffffffff82455d50 T get_min_dst_y_next_start +ffffffff82455eb0 T get_dst_y_per_pte_row_nom_l +ffffffff82456010 T get_dst_y_per_pte_row_nom_c +ffffffff82456170 T get_dst_y_per_meta_row_nom_l +ffffffff824562d0 T get_dst_y_per_meta_row_nom_c +ffffffff82456430 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff82456590 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff824566f0 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff82456850 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff824569b0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff82456b10 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff82456c70 T get_vstartup_calculated +ffffffff82456dd0 T get_dpte_row_height_linear_c +ffffffff82456f30 T get_swath_height_l +ffffffff82457090 T get_swath_height_c +ffffffff824571f0 T get_det_stored_buffer_size_l_bytes +ffffffff82457350 T get_det_stored_buffer_size_c_bytes +ffffffff824574b0 T get_dpte_group_size_in_bytes +ffffffff82457610 T get_vm_group_size_in_bytes +ffffffff82457770 T get_dpte_row_height_linear_l +ffffffff824578d0 T get_pte_buffer_mode +ffffffff82457a40 T get_subviewport_lines_needed_in_mall +ffffffff82457ba0 T get_surface_size_in_mall +ffffffff82457d00 T get_total_immediate_flip_bytes +ffffffff82457e50 T get_total_immediate_flip_bw +ffffffff82458060 T get_total_prefetch_bw +ffffffff82458270 T get_total_surface_size_in_mall_bytes +ffffffff82458450 T get_det_buffer_size_kbytes +ffffffff824585b0 T get_is_phantom_pipe +ffffffff82458710 T Calculate256BBlockSizes +ffffffff82458800 T CalculateMinAndMaxPrefetchMode +ffffffff82458880 T ModeSupportAndSystemConfiguration +ffffffff82458be0 T CalculateWriteBackDISPCLK +ffffffff8245a000 T print__rq_params_st +ffffffff8245a030 T print__data_rq_sizing_params_st +ffffffff8245a060 T print__data_rq_dlg_params_st +ffffffff8245a090 T print__data_rq_misc_params_st +ffffffff8245a0c0 T print__rq_dlg_params_st +ffffffff8245a0f0 T print__dlg_sys_params_st +ffffffff8245a120 T print__data_rq_regs_st +ffffffff8245a150 T print__rq_regs_st +ffffffff8245a180 T print__dlg_regs_st +ffffffff8245a1b0 T print__ttu_regs_st +ffffffff8245b000 T dml1_extract_rq_regs +ffffffff8245b340 T dml1_rq_dlg_get_rq_params +ffffffff8245b520 t get_surf_rq_param +ffffffff8245c120 T dml1_rq_dlg_get_dlg_params +ffffffff8245f000 T _do_calc_rc_params +ffffffff8245ffd0 t get_qp_set +ffffffff82461000 T dc_bandwidth_in_kbps_from_timing +ffffffff824612e0 T dc_dsc_stream_bandwidth_in_kbps +ffffffff82461470 T dc_dsc_parse_dsc_dpcd +ffffffff82461730 t dsc_throughput_from_dpcd +ffffffff824618f0 T dc_dsc_compute_bandwidth_range +ffffffff82461b20 t intersect_dsc_caps +ffffffff82461cf0 t setup_dsc_config +ffffffff824624f0 T dc_dsc_compute_config +ffffffff82462600 T dc_dsc_stream_bandwidth_overhead_in_kbps +ffffffff82462790 T dc_dsc_get_policy_for_timing +ffffffff82462830 T dc_dsc_policy_set_max_target_bpp_limit +ffffffff82462860 T dc_dsc_policy_set_enable_dsc_when_not_needed +ffffffff82462890 T dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff824628c0 T dc_set_disable_128b_132b_stream_overhead +ffffffff824628f0 T dc_dsc_get_default_config_option +ffffffff82462940 t fit_num_slices_up +ffffffff824629f0 t decide_dsc_target_bpp_x16 +ffffffff82463000 T calc_rc_params +ffffffff82464000 T dscc_compute_dsc_parameters +ffffffff82465000 T dal_hw_factory_dce110_init +ffffffff82465060 t define_hpd_registers +ffffffff824650b0 t define_ddc_registers +ffffffff82466000 T dal_hw_translate_dce110_init +ffffffff82466030 t offset_to_id +ffffffff824663a0 t id_to_offset +ffffffff82467000 T dal_hw_factory_dce120_init +ffffffff82467060 t define_hpd_registers +ffffffff824670b0 t define_ddc_registers +ffffffff82468000 T dal_hw_translate_dce120_init +ffffffff82468030 t offset_to_id +ffffffff824683b0 t id_to_offset +ffffffff82469000 T dal_hw_factory_dce80_init +ffffffff82469060 t define_hpd_registers +ffffffff824690b0 t define_ddc_registers +ffffffff8246a000 T dal_hw_translate_dce80_init +ffffffff8246a030 t offset_to_id +ffffffff8246a7d0 t id_to_offset +ffffffff8246b000 T dal_hw_factory_dcn10_init +ffffffff8246b060 t define_hpd_registers +ffffffff8246b0b0 t define_ddc_registers +ffffffff8246b150 t define_generic_registers +ffffffff8246c000 T dal_hw_translate_dcn10_init +ffffffff8246c030 t offset_to_id +ffffffff8246c3a0 t id_to_offset +ffffffff8246d000 T dal_hw_factory_dcn20_init +ffffffff8246d060 t define_hpd_registers +ffffffff8246d0b0 t define_ddc_registers +ffffffff8246d160 t define_generic_registers +ffffffff8246e000 T dal_hw_translate_dcn20_init +ffffffff8246e030 t offset_to_id +ffffffff8246e2c0 t id_to_offset +ffffffff8246f000 T dal_hw_factory_dcn21_init +ffffffff8246f060 t define_hpd_registers +ffffffff8246f0b0 t define_ddc_registers +ffffffff8246f160 t define_generic_registers +ffffffff82470000 T dal_hw_translate_dcn21_init +ffffffff82470030 t offset_to_id +ffffffff824702b0 t id_to_offset +ffffffff82471000 T dal_hw_factory_dcn30_init +ffffffff82471060 t define_hpd_registers +ffffffff824710b0 t define_ddc_registers +ffffffff82471160 t define_generic_registers +ffffffff82472000 T dal_hw_translate_dcn30_init +ffffffff82472030 t offset_to_id +ffffffff824722d0 t id_to_offset +ffffffff82473000 T dal_hw_factory_dcn315_init +ffffffff82473060 t define_hpd_registers +ffffffff824730b0 t define_ddc_registers +ffffffff82473160 t define_generic_registers +ffffffff82474000 T dal_hw_translate_dcn315_init +ffffffff82474030 t offset_to_id +ffffffff824742b0 t id_to_offset +ffffffff82475000 T dal_hw_factory_dcn32_init +ffffffff82475060 t define_hpd_registers +ffffffff824750b0 t define_ddc_registers +ffffffff82475160 t define_generic_registers +ffffffff82476000 T dal_hw_translate_dcn32_init +ffffffff82476030 t offset_to_id +ffffffff82476290 t id_to_offset +ffffffff82477000 T dal_gpio_open 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dal_gpio_get_generic_pin_info +ffffffff824785a0 T dal_gpio_service_destroy +ffffffff82478720 T dal_mux_setup_config +ffffffff82478790 T dal_gpio_service_lock +ffffffff82478820 T dal_gpio_service_unlock +ffffffff824788b0 T dal_gpio_service_open +ffffffff82478b60 T dal_gpio_service_close +ffffffff82478c10 T dal_irq_get_source +ffffffff82478c90 T dal_irq_get_rx_source +ffffffff82478cf0 T dal_irq_setup_hpd_filter +ffffffff82478d50 T dal_gpio_destroy_irq +ffffffff82478df0 T dal_gpio_create_ddc +ffffffff82478fa0 T dal_gpio_destroy_ddc +ffffffff824790a0 T dal_ddc_close +ffffffff824790f0 T dal_ddc_open +ffffffff82479280 T dal_ddc_change_mode +ffffffff82479350 T dal_ddc_get_line +ffffffff82479370 T dal_ddc_set_config +ffffffff8247a000 T dal_hw_ddc_init +ffffffff8247a120 T dal_hw_ddc_get_pin +ffffffff8247a130 t dal_hw_ddc_destroy +ffffffff8247a1a0 t set_config +ffffffff8247b000 T dal_hw_factory_init +ffffffff8247c000 T dal_hw_generic_init +ffffffff8247c120 T dal_hw_generic_get_pin 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vmx_setmsrbw -ffffffff8280ee50 T vmx_setmsrbrw -ffffffff8280ef60 T svm_set_clean -ffffffff8280efb0 T svm_set_dirty -ffffffff8280f000 T vcpu_reset_regs_vmx -ffffffff8280fa70 T vcpu_vmx_check_cap -ffffffff8280fb70 T vcpu_vmx_compute_ctrl -ffffffff8280fd50 T vcpu_init_vmx -ffffffff82810260 T vmm_alloc_vpid -ffffffff82810380 T vcpu_deinit_vmx -ffffffff828104b0 T vcpu_reset_regs -ffffffff82810530 T vcpu_init_svm -ffffffff82810840 T vcpu_deinit_svm -ffffffff828109b0 T vcpu_init -ffffffff82810a80 T vmm_free_vpid -ffffffff82810af0 T vcpu_deinit -ffffffff82810b30 T vm_run -ffffffff82810d30 T vcpu_run_vmx -ffffffff82811810 T vcpu_run_svm -ffffffff82811ee0 T vmm_fpurestore -ffffffff82811fb0 T vmm_fpusave -ffffffff82812040 T vmm_translate_gva -ffffffff82812370 T vmm_update_pvclock -ffffffff82812480 T vmx_get_exit_info -ffffffff82812500 T vmx_handle_exit -ffffffff82812970 T vmx_instruction_error_decode -ffffffff82812b40 T vmm_get_guest_cpu_cpl -ffffffff82812c60 T vmx_handle_intr -ffffffff82812d00 T svm_handle_hlt -ffffffff82812d50 T vmx_handle_hlt -ffffffff82812e20 T svm_handle_exit -ffffffff828131a0 T svm_handle_np_fault -ffffffff82813340 T vmm_handle_cpuid -ffffffff82813a20 T svm_handle_msr -ffffffff82813d10 T svm_handle_xsetbv -ffffffff82813dd0 T svm_handle_inout -ffffffff82813ee0 T vmm_inject_ud -ffffffff82813f20 T vmm_inject_db -ffffffff82813f60 T vmx_handle_np_fault -ffffffff828140e0 T vmx_handle_inout -ffffffff82814280 T vmx_handle_cr -ffffffff828144c0 T vmx_handle_rdmsr -ffffffff828145c0 T vmx_handle_wrmsr -ffffffff82814870 T vmx_handle_xsetbv -ffffffff82814970 T vmm_inject_gp -ffffffff828149b0 T vmm_get_guest_memtype -ffffffff82814a30 T vmx_get_exit_qualification -ffffffff82814aa0 T vmx_get_guest_faulttype -ffffffff82814b50 T svm_get_guest_faulttype -ffffffff82814b80 T svm_fault_page -ffffffff82814c10 T vmx_fault_page -ffffffff82814d90 T vmm_get_guest_cpu_mode -ffffffff82814ea0 T vmx_load_pdptes -ffffffff828151c0 T vmx_handle_cr0_write -ffffffff82815420 T vmx_handle_cr4_write -ffffffff828154e0 T vmm_handle_xsetbv -ffffffff82815590 T vmx_handle_misc_enable_msr -ffffffff828155f0 T vmm_pat_is_valid -ffffffff828156d0 t vmm_handle_cpuid_0xd -ffffffff828157d0 T vmm_gpa_is_valid -ffffffff82815840 T vmx_exit_reason_decode -ffffffff82815880 T svm_exit_reason_decode -ffffffff82816690 T vcpu_state_decode -ffffffff82817000 T vmm_dispatch_intr -ffffffff82817030 T vmxon -ffffffff82817060 T vmxoff -ffffffff82817090 T vmclear -ffffffff828170c0 T vmptrld -ffffffff828170f0 T vmptrst -ffffffff82817120 T vmwrite -ffffffff82817150 T vmread -ffffffff82817180 T invvpid -ffffffff8281719b t invvpid_fail -ffffffff828171a2 t invvpid_ret -ffffffff828171c0 T invept -ffffffff828171db t invept_fail -ffffffff828171e2 t invept_ret -ffffffff82817200 T vmx_enter_guest -ffffffff8281722b t skip_init -ffffffff82817298 t no_l1df_msr -ffffffff8281729b t l1df_tlb_loop -ffffffff828172b4 t l1df_tlb_done -ffffffff828172bc t l1df_load_cache -ffffffff828172d3 t done_flush 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sdmmc_io_attach -ffffffff8281cc00 T sdmmc_print -ffffffff8281cec0 T sdmmc_submatch -ffffffff8281cf50 T sdmmc_io_detach -ffffffff8281d010 T sdmmc_io_rw_direct -ffffffff8281d1e0 T sdmmc_io_rw_extended_subr -ffffffff8281d390 T sdmmc_io_rw_extended -ffffffff8281d7d0 T sdmmc_io_read_2 -ffffffff8281d940 T sdmmc_io_write_2 -ffffffff8281dac0 T sdmmc_io_read_4 -ffffffff8281dc30 T sdmmc_io_write_4 -ffffffff8281ddb0 T sdmmc_io_read_multi_1 -ffffffff8281deb0 T sdmmc_io_write_multi_1 -ffffffff8281dfb0 T sdmmc_io_read_region_1 -ffffffff8281e0b0 T sdmmc_io_write_region_1 -ffffffff8281e1b0 T sdmmc_io_xchg -ffffffff8281e370 T sdmmc_intr_enable -ffffffff8281e650 T sdmmc_intr_disable -ffffffff8281e930 T sdmmc_intr_establish -ffffffff8281ea50 T sdmmc_intr_disestablish -ffffffff8281eb50 T sdmmc_card_intr -ffffffff8281eba0 T sdmmc_intr_task -ffffffff8281ec60 T sdmmc_io_set_blocklen -ffffffff8281f000 T sdmmc_mem_enable -ffffffff8281f4d0 T sdmmc_mem_send_op_cond -ffffffff8281f6b0 T sdmmc_mem_signal_voltage -ffffffff8281f7b0 T sdmmc_mem_scan -ffffffff8281fb00 T sdmmc_decode_csd -ffffffff8281ff50 T sdmmc_decode_cid -ffffffff82820400 T sdmmc_mem_send_scr -ffffffff82820560 T sdmmc_mem_decode_scr -ffffffff828205c0 T sdmmc_mem_send_cxd_data -ffffffff82820740 T sdmmc_mem_set_bus_width -ffffffff82820870 T sdmmc_mem_sd_switch -ffffffff82820b30 T sdmmc_be512_to_bitfield512 -ffffffff82820be0 T sdmmc_mem_mmc_switch -ffffffff82820cd0 T sdmmc_mem_init -ffffffff82820e60 T sdmmc_mem_set_blocklen -ffffffff82820f70 T sdmmc_mem_sd_init -ffffffff828213e0 T sdmmc_mem_mmc_init -ffffffff82821b60 T sdmmc_mem_select_transfer_mode -ffffffff82821be0 T sdmmc_mem_execute_tuning -ffffffff82821c70 T sdmmc_mem_read_block_subr -ffffffff82822000 T sdmmc_mem_single_read_block -ffffffff828220d0 T sdmmc_mem_read_block -ffffffff828222e0 T sdmmc_mem_write_block_subr -ffffffff82822660 T sdmmc_mem_single_write_block -ffffffff82822730 T sdmmc_mem_write_block -ffffffff82822940 T sdmmc_mem_hibernate_write -ffffffff82823000 T sdmmc_scsi_cmd -ffffffff82823200 T sdmmc_minphys -ffffffff82823280 T sdmmc_scsi_attach -ffffffff828234c0 T sdmmc_alloc_ccbs -ffffffff82823620 T sdmmc_free_ccbs -ffffffff82823680 T sdmmc_scsi_detach -ffffffff82823840 T sdmmc_stimeout -ffffffff828238e0 T sdmmc_ccb_alloc -ffffffff828239a0 T sdmmc_ccb_free -ffffffff82823aa0 T sdmmc_inquiry -ffffffff82823d30 T sdmmc_start_xs -ffffffff82823e50 T sdmmc_complete_xs -ffffffff82823f40 T sdmmc_done_xs -ffffffff82823f90 T sdmmc_scsi_hibernate_io -ffffffff82825000 T bwfm_sdio_preinit -ffffffff828255a0 T bwfm_sdio_txcheck -ffffffff828255e0 T bwfm_sdio_txdata -ffffffff82825660 T bwfm_sdio_txctl -ffffffff828257f0 T bwfm_sdio_buscore_read -ffffffff82825800 T bwfm_sdio_buscore_write -ffffffff82825820 T bwfm_sdio_buscore_prepare -ffffffff828259a0 T bwfm_sdio_buscore_activate -ffffffff82825a30 T bwfm_sdio_match -ffffffff82825ae0 T bwfm_sdio_attach -ffffffff82825e80 T bwfm_sdio_detach -ffffffff82825f00 T bwfm_sdio_task -ffffffff828260c0 T bwfm_sdio_write_1 -ffffffff828260f0 T bwfm_sdio_read_1 -ffffffff82826120 T bwfm_sdio_write_4 -ffffffff828261f0 T bwfm_sdio_read_4 -ffffffff828262b0 T bwfm_sdio_load_microcode -ffffffff828265a0 T bwfm_sdio_clkctl -ffffffff828266d0 T bwfm_sdio_dev_write -ffffffff82826720 T bwfm_sdio_intr -ffffffff82826770 T bwfm_sdio_ram_read_write -ffffffff828269f0 T bwfm_sdio_htclk -ffffffff82826cb0 T bwfm_sdio_readshared -ffffffff82826da0 T bwfm_sdio_dev_read -ffffffff82826de0 T bwfm_sdio_rx_frames -ffffffff82827210 T bwfm_sdio_tx_frames -ffffffff82827330 T bwfm_sdio_backplane -ffffffff82827400 T bwfm_sdio_buf_read -ffffffff82827500 T bwfm_sdio_buf_write -ffffffff828275d0 T bwfm_sdio_frame_read_write -ffffffff82827780 T bwfm_sdio_newbuf -ffffffff82827810 T bwfm_sdio_tx_ok -ffffffff82827870 T bwfm_sdio_tx_ctrlframe -ffffffff82827980 T bwfm_sdio_tx_dataframe -ffffffff82827af0 T bwfm_sdio_rx_glom -ffffffff82828000 T onewire_match -ffffffff82828060 T onewire_attach -ffffffff82828120 T onewire_detach -ffffffff82828190 T onewire_activate -ffffffff828281b0 T onewire_scan -ffffffff82828400 T onewire_createthread -ffffffff82828470 T onewire_print -ffffffff82828560 T onewirebus_print -ffffffff828285b0 T onewire_lock -ffffffff828285d0 T onewire_unlock -ffffffff828285f0 T onewire_reset -ffffffff82828610 T onewire_bit -ffffffff82828630 T onewire_read_byte -ffffffff828287c0 T onewire_write_byte -ffffffff828288d0 T onewire_read_block -ffffffff82828970 T onewire_write_block -ffffffff82828a10 T onewire_triplet -ffffffff82828b20 T onewire_matchrom -ffffffff82828d10 T onewire_search -ffffffff82829180 T onewire_thread -ffffffff8282a000 T onewire_crc -ffffffff8282a0b0 T onewire_crc16 -ffffffff8282a170 T onewire_famname -ffffffff8282a1b0 T onewire_matchbyfam -ffffffff8282b000 T owid_match -ffffffff8282b030 T owid_attach -ffffffff8282b120 T owid_detach -ffffffff8282b170 T owid_activate -ffffffff8282c000 T owsbm_match -ffffffff8282c030 T owsbm_attach -ffffffff8282c240 T owsbm_detach -ffffffff8282c2d0 T owsbm_activate -ffffffff8282c300 T owsbm_update -ffffffff8282d000 T owtemp_match -ffffffff8282d030 T owtemp_attach -ffffffff8282d160 T owtemp_detach -ffffffff8282d1f0 T owtemp_activate -ffffffff8282d220 T owtemp_update -ffffffff8282e000 T owctr_match -ffffffff8282e030 T owctr_attach -ffffffff8282e1c0 T owctr_detach -ffffffff8282e250 T owctr_activate -ffffffff8282e280 T owctr_update -ffffffff8282e2c0 T owctr_update_counter -ffffffff8282f000 A __text_page_start -ffffffff8282f000 T Xsyscall_meltdown -ffffffff8282f00c T Xsyscall -ffffffff8282f299 t Xsyscall_trampback -ffffffff8282f2b0 T intr_user_exit -ffffffff8282f2f2 t intr_user_exit_post_ast -ffffffff8282f44b t Xiretq_trampback -ffffffff8282f457 T doreti_iret -ffffffff82830000 T alltraps -ffffffff82830138 T recall_trap -ffffffff82830150 T alltraps_kern -ffffffff82830153 T alltraps_kern_meltdown -ffffffff82831000 ? Xtrap00 -ffffffff82831000 A __kutext_start -ffffffff82831000 A __text_page_end -ffffffff82831010 ? Xtrap01 -ffffffff82831020 ? Xtrap02 -ffffffff82831028 c calltrap_specstk -ffffffff828310f0 ? calltrap_specstk_tramp -ffffffff82831110 ? Xtrap03 -ffffffff82831120 ? Xtrap04 -ffffffff82831130 ? Xtrap05 -ffffffff82831140 ? Xtrap06 -ffffffff82831150 ? Xtrap07 -ffffffff82831160 ? Xtrap08 -ffffffff82831170 ? Xtrap09 -ffffffff82831180 ? Xtrap0a -ffffffff82831190 ? Xtrap0b -ffffffff828311a0 ? Xtrap0c -ffffffff828311b0 ? Xtrap0d -ffffffff82831240 ? Xtrap0e -ffffffff82831250 ? Xintrspurious -ffffffff82831250 ? Xtrap0f -ffffffff82831260 ? Xtrap10 -ffffffff82831270 ? Xtrap11 -ffffffff82831280 ? Xtrap12 -ffffffff82831290 ? Xtrap13 -ffffffff828312a0 ? Xtrap14 -ffffffff828312b0 ? Xtrap15 -ffffffff828312c0 ? Xtrap16 -ffffffff828312c0 ? Xtrap17 -ffffffff828312c0 ? Xtrap18 -ffffffff828312c0 ? Xtrap19 -ffffffff828312c0 ? Xtrap1a -ffffffff828312c0 ? Xtrap1b -ffffffff828312c0 ? Xtrap1c -ffffffff828312c0 ? Xtrap1d -ffffffff828312c0 ? Xtrap1e -ffffffff828312c0 ? Xtrap1f -ffffffff828312d0 ? x2apic_eoi -ffffffff828312f0 ? Xintr_lapic_ipi -ffffffff82831330 ? Xipi_invltlb -ffffffff82831360 ? Xipi_invept -ffffffff828313a0 ? Xipi_invlpg -ffffffff828313d0 ? Xipi_invlrange -ffffffff82831410 ? Xipi_invltlb_pcid -ffffffff82831450 ? Xipi_invlpg_pcid -ffffffff828314a0 ? Xipi_invlrange_pcid -ffffffff82831510 ? Xintr_lapic_ltimer -ffffffff82831550 ? Xintr_xen_upcall -ffffffff82831590 ? Xintr_hyperv_upcall -ffffffff828315d0 ? Xintr_legacy0 -ffffffff82831610 ? Xintr_legacy1 -ffffffff82831650 ? Xintr_legacy2 -ffffffff82831690 ? Xintr_legacy3 -ffffffff828316d0 ? Xintr_legacy4 -ffffffff82831710 ? Xintr_legacy5 -ffffffff82831750 ? Xintr_legacy6 -ffffffff82831790 ? Xintr_legacy7 -ffffffff828317d0 ? Xintr_legacy8 -ffffffff82831810 ? Xintr_legacy9 -ffffffff82831850 ? Xintr_legacy10 -ffffffff82831890 ? Xintr_legacy11 -ffffffff828318d0 ? Xintr_legacy12 -ffffffff82831910 ? Xintr_legacy13 -ffffffff82831950 ? Xintr_legacy14 -ffffffff82831990 ? Xintr_legacy15 -ffffffff828319d0 ? Xintr_ioapic_edge0 -ffffffff82831a10 ? Xintr_ioapic_edge1 -ffffffff82831a50 ? Xintr_ioapic_edge2 -ffffffff82831a90 ? Xintr_ioapic_edge3 -ffffffff82831ad0 ? Xintr_ioapic_edge4 -ffffffff82831b10 ? Xintr_ioapic_edge5 -ffffffff82831b50 ? Xintr_ioapic_edge6 -ffffffff82831b90 ? Xintr_ioapic_edge7 -ffffffff82831bd0 ? Xintr_ioapic_edge8 -ffffffff82831c10 ? Xintr_ioapic_edge9 -ffffffff82831c50 ? Xintr_ioapic_edge10 -ffffffff82831c90 ? Xintr_ioapic_edge11 -ffffffff82831cd0 ? Xintr_ioapic_edge12 -ffffffff82831d10 ? Xintr_ioapic_edge13 -ffffffff82831d50 ? Xintr_ioapic_edge14 -ffffffff82831d90 ? Xintr_ioapic_edge15 -ffffffff82831dd0 ? Xintr_ioapic_edge16 -ffffffff82831e10 ? Xintr_ioapic_edge17 -ffffffff82831e50 ? Xintr_ioapic_edge18 -ffffffff82831e90 ? Xintr_ioapic_edge19 -ffffffff82831ed0 ? Xintr_ioapic_edge20 -ffffffff82831f10 ? Xintr_ioapic_edge21 -ffffffff82831f50 ? Xintr_ioapic_edge22 -ffffffff82831f90 ? Xintr_ioapic_edge23 -ffffffff82831fd0 ? Xintr_ioapic_edge24 -ffffffff82832010 ? Xintr_ioapic_edge25 -ffffffff82832050 ? Xintr_ioapic_edge26 -ffffffff82832090 ? Xintr_ioapic_edge27 -ffffffff828320d0 ? Xintr_ioapic_edge28 -ffffffff82832110 ? Xintr_ioapic_edge29 -ffffffff82832150 ? Xintr_ioapic_edge30 -ffffffff82832190 ? Xintr_ioapic_edge31 -ffffffff828321d0 ? Xintr_ioapic_edge32 -ffffffff82832210 ? Xintr_ioapic_edge33 -ffffffff82832250 ? Xintr_ioapic_edge34 -ffffffff82832290 ? Xintr_ioapic_edge35 -ffffffff828322d0 ? Xintr_ioapic_edge36 -ffffffff82832310 ? Xintr_ioapic_edge37 -ffffffff82832350 ? Xintr_ioapic_edge38 -ffffffff82832390 ? Xintr_ioapic_edge39 -ffffffff828323d0 ? Xintr_ioapic_edge40 -ffffffff82832410 ? Xintr_ioapic_edge41 -ffffffff82832450 ? Xintr_ioapic_edge42 -ffffffff82832490 ? Xintr_ioapic_edge43 -ffffffff828324d0 ? Xintr_ioapic_edge44 -ffffffff82832510 ? Xintr_ioapic_edge45 -ffffffff82832550 ? Xintr_ioapic_edge46 -ffffffff82832590 ? Xintr_ioapic_edge47 -ffffffff828325d0 ? Xintr_ioapic_edge48 -ffffffff82832610 ? Xintr_ioapic_edge49 -ffffffff82832650 ? Xintr_ioapic_edge50 -ffffffff82832690 ? Xintr_ioapic_edge51 -ffffffff828326d0 ? Xintr_ioapic_edge52 -ffffffff82832710 ? Xintr_ioapic_edge53 -ffffffff82832750 ? Xintr_ioapic_edge54 -ffffffff82832790 ? Xintr_ioapic_edge55 -ffffffff828327d0 ? Xintr_ioapic_edge56 -ffffffff82832810 ? Xintr_ioapic_edge57 -ffffffff82832850 ? Xintr_ioapic_edge58 -ffffffff82832890 ? Xintr_ioapic_edge59 -ffffffff828328d0 ? Xintr_ioapic_edge60 -ffffffff82832910 ? Xintr_ioapic_edge61 -ffffffff82832950 ? Xintr_ioapic_edge62 -ffffffff82832990 ? Xintr_ioapic_edge63 -ffffffff828329d0 ? Xintr_ioapic_level0 -ffffffff82832a10 ? Xintr_ioapic_level1 -ffffffff82832a50 ? Xintr_ioapic_level2 -ffffffff82832a90 ? Xintr_ioapic_level3 -ffffffff82832ad0 ? Xintr_ioapic_level4 -ffffffff82832b10 ? Xintr_ioapic_level5 -ffffffff82832b50 ? Xintr_ioapic_level6 -ffffffff82832b90 ? Xintr_ioapic_level7 -ffffffff82832bd0 ? Xintr_ioapic_level8 -ffffffff82832c10 ? Xintr_ioapic_level9 -ffffffff82832c50 ? Xintr_ioapic_level10 -ffffffff82832c90 ? Xintr_ioapic_level11 -ffffffff82832cd0 ? Xintr_ioapic_level12 -ffffffff82832d10 ? Xintr_ioapic_level13 -ffffffff82832d50 ? Xintr_ioapic_level14 -ffffffff82832d90 ? Xintr_ioapic_level15 -ffffffff82832dd0 ? Xintr_ioapic_level16 -ffffffff82832e10 ? Xintr_ioapic_level17 -ffffffff82832e50 ? Xintr_ioapic_level18 -ffffffff82832e90 ? Xintr_ioapic_level19 -ffffffff82832ed0 ? Xintr_ioapic_level20 -ffffffff82832f10 ? Xintr_ioapic_level21 -ffffffff82832f50 ? Xintr_ioapic_level22 -ffffffff82832f90 ? Xintr_ioapic_level23 -ffffffff82832fd0 ? Xintr_ioapic_level24 -ffffffff82833010 ? Xintr_ioapic_level25 -ffffffff82833050 ? Xintr_ioapic_level26 -ffffffff82833090 ? Xintr_ioapic_level27 -ffffffff828330d0 ? Xintr_ioapic_level28 -ffffffff82833110 ? Xintr_ioapic_level29 -ffffffff82833150 ? Xintr_ioapic_level30 -ffffffff82833190 ? Xintr_ioapic_level31 -ffffffff828331d0 ? Xintr_ioapic_level32 -ffffffff82833210 ? Xintr_ioapic_level33 -ffffffff82833250 ? Xintr_ioapic_level34 -ffffffff82833290 ? Xintr_ioapic_level35 -ffffffff828332d0 ? Xintr_ioapic_level36 -ffffffff82833310 ? Xintr_ioapic_level37 -ffffffff82833350 ? Xintr_ioapic_level38 -ffffffff82833390 ? Xintr_ioapic_level39 -ffffffff828333d0 ? Xintr_ioapic_level40 -ffffffff82833410 ? Xintr_ioapic_level41 -ffffffff82833450 ? Xintr_ioapic_level42 -ffffffff82833490 ? Xintr_ioapic_level43 -ffffffff828334d0 ? Xintr_ioapic_level44 -ffffffff82833510 ? Xintr_ioapic_level45 -ffffffff82833550 ? Xintr_ioapic_level46 -ffffffff82833590 ? Xintr_ioapic_level47 -ffffffff828335d0 ? Xintr_ioapic_level48 -ffffffff82833610 ? Xintr_ioapic_level49 -ffffffff82833650 ? Xintr_ioapic_level50 -ffffffff82833690 ? Xintr_ioapic_level51 -ffffffff828336d0 ? Xintr_ioapic_level52 -ffffffff82833710 ? Xintr_ioapic_level53 -ffffffff82833750 ? Xintr_ioapic_level54 -ffffffff82833790 ? Xintr_ioapic_level55 -ffffffff828337d0 ? Xintr_ioapic_level56 -ffffffff82833810 ? Xintr_ioapic_level57 -ffffffff82833850 ? Xintr_ioapic_level58 -ffffffff82833890 ? Xintr_ioapic_level59 -ffffffff828338d0 ? Xintr_ioapic_level60 -ffffffff82833910 ? Xintr_ioapic_level61 -ffffffff82833950 ? Xintr_ioapic_level62 -ffffffff82833990 ? Xintr_ioapic_level63 -ffffffff82834000 ? codepatch_fill_nop -ffffffff82834000 A __cptext_start -ffffffff82834000 A __kutext_end -ffffffff828340b0 ? codepatch_maprw -ffffffff828341c0 ? codepatch_unmaprw -ffffffff82834230 ? codepatch_nop -ffffffff828343b0 ? codepatch_replace -ffffffff82834580 ? codepatch_call -ffffffff828345a0 ? codepatch_control_flow -ffffffff828347c0 ? codepatch_jmp -ffffffff82835000 A __cptext_end -ffffffff82835000 A __rodata_start -ffffffff82835000 C _etext -ffffffff82835000 C etext -ffffffff82836000 r seeprom_read -ffffffff82836004 r icl_mg_pll_find_divisors.div1_vals -ffffffff82836034 r athn_ac2qid -ffffffff82836034 r athn_ac2qid -ffffffff82836034 r athn_ac2qid -ffffffff82836040 r rtwn_get_rssi.cckoff -ffffffff82836068 r rsu_ac2qid -ffffffff82836078 r pckbc_portcmd -ffffffff8283607c r tht_fifo_write_pad.pad -ffffffff82836084 r rsu_get_rssi.cckoff -ffffffff828360a4 r adlp_n_revids -ffffffff828360e8 r apple_iso_trans -ffffffff828360f0 r wihap_check_tx.txratetable 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vga_50lscreen_mono -ffffffff8294a1c8 R vga_50lscreen_bf -ffffffff8294a1f8 R vga_screenlist -ffffffff8294a208 R vga_screenlist_mono -ffffffff8294a218 R vga_accessops -ffffffff8294a278 r i945_wm_info -ffffffff8294a2b8 r bgansitopc -ffffffff8294a2c0 r pctoansi -ffffffff8294a300 r sdma_offsets -ffffffff8294a300 r sdma_offsets -ffffffff8294a338 r iha_rate_tbl -ffffffff8294a370 r i830_a_wm_info -ffffffff8294a3a8 r gen9_edram_size_mb.ways -ffffffff8294a408 r aggr_periodic_times -ffffffff8294a508 r michael_final.pad -ffffffff8294a530 r rt_copysa.maskarray -ffffffff8294a538 r i915_wm_info -ffffffff8294a540 r amdgpu_ih_clientid_jpeg -ffffffff8294a540 r amdgpu_ih_clientid_uvds -ffffffff8294a540 r amdgpu_ih_clientid_vcns -ffffffff8294a540 r amdgpu_ih_clientid_vcns -ffffffff8294a540 r amdgpu_ih_clientid_vcns -ffffffff8294a570 r jsl_ehl_revids -ffffffff8294a580 r vga_setfontset.cmaptabb -ffffffff8294a5f0 r i830_bc_wm_info -ffffffff8294a658 r hsw_activate_psr2.map -ffffffff8294a660 r tgl_revids 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ciss_switch -ffffffff82958030 R ciss_level -ffffffff82958050 R ciss_stat -ffffffff82959000 R ami_switch -ffffffff82959028 R ami_raw_switch -ffffffff8295a000 R mfi_switch -ffffffff8295a028 R mfi_pd_switch -ffffffff8295a050 r mfi_iop_xscale -ffffffff8295a080 r mfi_iop_ppc -ffffffff8295a0b0 r mfi_iop_gen2 -ffffffff8295a0e0 r mfi_iop_skinny -ffffffff8295a110 r mfi_bbu_indicators -ffffffff8295b000 R qlw_switch -ffffffff8295c000 R isp_2100_risc_code -ffffffff8296ebf0 R isp_2200_risc_code -ffffffff82981990 R isp_2300_risc_code -ffffffff8299b408 R qla_switch -ffffffff8299b430 r qla_regs_2100 -ffffffff8299b460 r qla_regs_2200 -ffffffff8299b490 r qla_regs_23XX -ffffffff8299c000 R ahci_atascsi_methods -ffffffff8299d000 R nvme_switch -ffffffff8299d028 r nvme_ops -ffffffff8299e000 R mpi_switch -ffffffff8299e060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs -ffffffff8299e090 r chv_oa_mux_regs -ffffffff8299e0b0 r fiji_clock_stretcher_lookup_table -ffffffff8299e0b0 r tonga_clock_stretcher_lookup_table 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hpt366_pio -ffffffff8299e810 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs -ffffffff8299e830 r ether_crc32_be_update.rev -ffffffff8299e830 r rtw_grf5101_mac_crypt.caesar -ffffffff8299e880 r snb_b_fdi_train_param -ffffffff8299e960 r intel_hpll_vco.elk_vco -ffffffff8299e980 r icl_revids -ffffffff8299e9e0 r pin_offsets -ffffffff8299ea00 r amdgpu_ih_srcid_jpeg -ffffffff8299ea40 r firmware_list -ffffffff8299eaa0 r atom_arg_shift -ffffffff8299eaa0 r atom_arg_shift -ffffffff8299eae0 r pf_syncookie_wstab -ffffffff8299eb00 r ieee80211_media_init.mopts -ffffffff8299eb60 r add_entropy_words.twist_table -ffffffff8299ec00 r urtw_8225v2_txpwr_cck -ffffffff8299ec20 r bwfm_pci_prio2fifo -ffffffff8299ec20 r ieee80211_up_to_ac.up_to_ac -ffffffff8299ece0 r paritytab -ffffffff8299ece0 r x86emu_parity_tab -ffffffff8299ed00 r legacy_connector_convert -ffffffff8299ed40 r gen7_oa_mux_regs -ffffffff8299ed60 r hsw_oa_mux_regs -ffffffff8299ed80 r notetab -ffffffff8299eda0 r urtw_8225v2_txpwr_cck_ch14 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dp_trace_set_edp_power_timestamp +ffffffff824926f0 T dp_trace_get_edp_poweron_timestamp +ffffffff82492720 T dp_trace_get_edp_poweroff_timestamp +ffffffff82492750 T dp_trace_source_sequence +ffffffff82493000 T dp_fpga_hpo_enable_link_and_stream +ffffffff82494000 T set_dio_throttled_vcp_size +ffffffff82494020 T setup_dio_stream_encoder +ffffffff82494130 T reset_dio_stream_encoder +ffffffff82494220 T setup_dio_stream_attribute +ffffffff824943e0 T enable_dio_dp_link_output +ffffffff82494480 T disable_dio_link_output +ffffffff824944f0 T set_dio_dp_link_test_pattern +ffffffff82494560 T set_dio_dp_lane_settings +ffffffff824945a0 T update_dio_stream_allocation_table +ffffffff82494620 T setup_dio_audio_output +ffffffff82494690 T enable_dio_audio_packet +ffffffff82494760 T disable_dio_audio_packet +ffffffff82494850 T can_use_dio_link_hwss +ffffffff82494890 T get_dio_link_hwss +ffffffff82495000 T dp_dio_fixed_vs_pe_retimer_lane_cfg_to_hw_cfg +ffffffff82495040 T dp_dio_fixed_vs_pe_retimer_exit_manual_automation +ffffffff824952e0 T enable_dio_fixed_vs_pe_retimer_program_4lane_output +ffffffff82495440 T requires_fixed_vs_pe_retimer_dio_link_hwss +ffffffff82495480 T get_dio_fixed_vs_pe_retimer_link_hwss +ffffffff824954b0 t enable_dio_fixed_vs_pe_retimer_dp_link_output +ffffffff82495650 t set_dio_fixed_vs_pe_retimer_dp_link_test_pattern +ffffffff82496000 T can_use_dpia_link_hwss +ffffffff82496050 T get_dpia_link_hwss +ffffffff82496080 t update_dpia_stream_allocation_table +ffffffff82497000 T set_hpo_dp_throttled_vcp_size +ffffffff82497030 T set_hpo_dp_hblank_min_symbol_width +ffffffff82497160 T setup_hpo_dp_stream_encoder +ffffffff824971b0 T reset_hpo_dp_stream_encoder +ffffffff824971d0 T setup_hpo_dp_stream_attribute +ffffffff82497250 T enable_hpo_dp_link_output +ffffffff824972d0 T disable_hpo_dp_link_output +ffffffff82497380 T update_hpo_dp_stream_allocation_table +ffffffff824973a0 T setup_hpo_dp_audio_output +ffffffff824973e0 T enable_hpo_dp_audio_packet +ffffffff82497400 T disable_hpo_dp_audio_packet +ffffffff82497450 T can_use_hpo_dp_link_hwss +ffffffff82497480 T get_hpo_dp_link_hwss +ffffffff824974b0 t set_hpo_dp_link_test_pattern +ffffffff82497510 t set_hpo_dp_lane_settings +ffffffff82498000 T requires_fixed_vs_pe_retimer_hpo_link_hwss +ffffffff82498040 T get_hpo_fixed_vs_pe_retimer_dp_link_hwss +ffffffff82498070 t enable_hpo_fixed_vs_pe_retimer_dp_link_output +ffffffff824980d0 t set_hpo_fixed_vs_pe_retimer_dp_link_test_pattern +ffffffff824987d0 t set_hpo_fixed_vs_pe_retimer_dp_lane_settings +ffffffff82498860 t dp_hpo_fixed_vs_pe_retimer_set_tx_ffe +ffffffff82499000 T link_reset_cur_dp_mst_topology +ffffffff82499060 T link_detect_connection_type +ffffffff824991b0 T link_detect +ffffffff8249ae30 T link_clear_dprx_states +ffffffff8249ae60 T link_is_hdcp14 +ffffffff8249aec0 T link_is_hdcp22 +ffffffff8249af30 T link_get_status +ffffffff8249af60 T link_add_remote_sink +ffffffff8249b140 T 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edp_is_ilr_optimization_enabled +ffffffff824bc560 T get_max_link_rate_from_ilr_table +ffffffff824bc640 T edp_is_ilr_optimization_required +ffffffff824bc820 T edp_panel_backlight_power_on +ffffffff824bc8e0 T edp_set_panel_power +ffffffff824bca10 T edp_wait_for_t12 +ffffffff824bca70 T edp_add_delay_for_T9 +ffffffff824bcac0 T edp_receiver_ready_T9 +ffffffff824bcba0 T edp_receiver_ready_T7 +ffffffff824bcd70 T edp_power_alpm_dpcd_enable +ffffffff824bcde0 T edp_set_backlight_level +ffffffff824bcf60 T edp_set_psr_allow_active +ffffffff824bd180 T edp_get_psr_state +ffffffff824bd260 T edp_setup_psr +ffffffff824bd680 T edp_get_psr_residency +ffffffff824bd730 T edp_set_sink_vtotal_in_psr_active +ffffffff824bd7c0 T edp_set_replay_allow_active +ffffffff824bd900 T edp_get_replay_state +ffffffff824bd9c0 T edp_setup_replay +ffffffff824bdbd0 T edp_set_coasting_vtotal +ffffffff824bdc90 T edp_replay_residency +ffffffff824bdd60 T edp_get_backlight_level +ffffffff824bded0 T edp_get_target_backlight_pwm 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amdgpu_dpm_get_entrycount_gfxoff +ffffffff824ee010 T amdgpu_dpm_get_status_gfxoff +ffffffff824ee0b0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff824ee110 T amdgpu_dpm_gfx_state_change +ffffffff824ee180 T amdgpu_dpm_get_ecc_info +ffffffff824ee220 T amdgpu_dpm_get_vce_clock_state +ffffffff824ee2d0 T amdgpu_dpm_get_current_power_state +ffffffff824ee350 T amdgpu_dpm_set_power_state +ffffffff824ee500 T amdgpu_dpm_dispatch_task +ffffffff824ee5c0 T amdgpu_dpm_get_performance_level +ffffffff824ee660 T amdgpu_dpm_force_performance_level +ffffffff824ee890 T amdgpu_dpm_get_pp_num_states +ffffffff824ee940 T amdgpu_dpm_get_pp_table +ffffffff824ee9f0 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff824eeab0 T amdgpu_dpm_odn_edit_dpm_table +ffffffff824eeb70 T amdgpu_dpm_print_clock_levels +ffffffff824eec20 T amdgpu_dpm_emit_clock_levels +ffffffff824eece0 T amdgpu_dpm_set_ppfeature_status +ffffffff824eed90 T amdgpu_dpm_get_ppfeature_status +ffffffff824eee40 T amdgpu_dpm_force_clock_level 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atomctrl_get_voltage_evv_on_sclk +ffffffff825023f0 T atomctrl_get_voltage_evv +ffffffff825024b0 T atomctrl_get_mpll_reference_clock +ffffffff82502530 T atomctrl_is_asic_internal_ss_supported +ffffffff82502590 T atomctrl_get_memory_clock_spread_spectrum +ffffffff825026a0 T atomctrl_get_engine_clock_spread_spectrum +ffffffff825027b0 T atomctrl_read_efuse +ffffffff82502860 T atomctrl_set_ac_timing_ai +ffffffff825028d0 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff82502950 T atomctrl_get_smc_sclk_range_table +ffffffff82502a10 T atomctrl_get_vddc_shared_railinfo +ffffffff82502a90 T atomctrl_get_avfs_information +ffffffff82502c20 T atomctrl_get_svi2_info +ffffffff82502d00 T atomctrl_get_leakage_id_from_efuse +ffffffff82502d70 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff82502f10 T atomctrl_get_voltage_range +ffffffff82502fe0 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff82503070 T atomctrl_get_edc_leakage_table +ffffffff82504000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff825040e0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff825042c0 T pp_atomfwctrl_get_pp_assign_pin +ffffffff825043c0 T pp_atomfwctrl_enter_self_refresh +ffffffff825043f0 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff825044a0 T pp_atomfwctrl_get_avfs_information +ffffffff825047e0 T pp_atomfwctrl_get_gpio_information +ffffffff82504890 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff82504920 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff82504d10 T pp_atomfwctrl_get_smc_dpm_information +ffffffff82505000 T encode_pcie_lane_width +ffffffff82505030 T decode_pcie_lane_width +ffffffff82506000 t pp_tables_v1_0_initialize +ffffffff82507590 t pp_tables_v1_0_uninitialize +ffffffff825077b0 T get_number_of_powerplay_table_entries_v1_0 +ffffffff82507870 T get_powerplay_table_entry_v1_0 +ffffffff82508000 T pp_tables_get_response_times +ffffffff825080f0 T pp_tables_get_num_of_entries +ffffffff825081c0 T pp_tables_get_entry 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phm_trim_voltage_table_to_fit_state_table +ffffffff82522dd0 T phm_reset_single_dpm_table +ffffffff82522e30 T phm_setup_pcie_table_entry +ffffffff82522e70 T phm_get_dpm_level_enable_mask_value +ffffffff82522f50 T phm_get_voltage_index +ffffffff82522fd0 T phm_get_voltage_id +ffffffff82523050 T phm_find_closest_vddci +ffffffff825230c0 T phm_find_boot_level +ffffffff82523130 T phm_get_sclk_for_voltage_evv +ffffffff825231f0 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff82523310 T phm_get_lowest_enabled_level +ffffffff82523350 T phm_apply_dal_min_voltage_request +ffffffff82523420 T phm_get_voltage_evv_on_sclk +ffffffff825234e0 T phm_irq_process +ffffffff825236b0 T smu9_register_irq_handlers +ffffffff82523780 T smu_atom_get_data_table +ffffffff825237f0 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff82523900 T smu_set_watermarks_for_clocks_ranges +ffffffff82524000 T tonga_baco_set_state +ffffffff82525000 T vega10_baco_set_state +ffffffff82526000 T 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vega10_initialize_power_tune_defaults +ffffffff82532240 T vega10_set_power_limit +ffffffff825322a0 T vega10_enable_power_containment +ffffffff825323e0 T vega10_disable_power_containment +ffffffff825324d0 T vega10_power_control_set_level +ffffffff82532540 t vega10_didt_set_mask +ffffffff82533000 t vega10_pp_tables_initialize +ffffffff825347a0 t vega10_pp_tables_uninitialize +ffffffff825349c0 T vega10_get_number_of_powerplay_table_entries +ffffffff82534a80 T vega10_get_powerplay_table_entry +ffffffff82534c20 T vega10_baco_set_cap +ffffffff82535000 T vega10_fan_ctrl_get_fan_speed_info +ffffffff82535080 T vega10_fan_ctrl_get_fan_speed_pwm +ffffffff825351d0 T vega10_fan_ctrl_get_fan_speed_rpm +ffffffff825352f0 T vega10_fan_ctrl_set_static_mode +ffffffff82535610 T vega10_fan_ctrl_set_default_mode +ffffffff82535880 T vega10_fan_ctrl_start_smc_fan_control +ffffffff82535960 T vega10_fan_ctrl_stop_smc_fan_control +ffffffff82535a40 T vega10_fan_ctrl_set_fan_speed_pwm +ffffffff82535cb0 T vega10_fan_ctrl_reset_fan_speed_to_default +ffffffff82535d90 T vega10_fan_ctrl_set_fan_speed_rpm +ffffffff82535fb0 T vega10_thermal_get_temperature +ffffffff82536050 T vega10_thermal_disable_alert +ffffffff82536170 T vega10_thermal_stop_thermal_controller +ffffffff825361d0 T vega10_enable_mgpu_fan_boost +ffffffff82536310 T vega10_start_thermal_controller +ffffffff82536970 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff82537000 T vega12_baco_set_state +ffffffff82538000 T vega12_enable_disable_vce_dpm +ffffffff825380a0 T vega12_hwmgr_init +ffffffff825380e0 t vega12_hwmgr_backend_init +ffffffff82538960 t vega12_hwmgr_backend_fini +ffffffff825389c0 t vega12_setup_asic_task +ffffffff82538a00 t vega12_apply_clocks_adjust_rules +ffffffff82538dc0 t vega12_dpm_force_dpm_level +ffffffff82539280 t vega12_enable_dpm_tasks +ffffffff82539f00 t vega12_disable_dpm_tasks +ffffffff8253a020 t vega12_patch_boot_state +ffffffff8253a050 t vega12_power_gate_vce +ffffffff8253a100 t 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vega20_get_enabled_smc_features +ffffffff825704c0 T vega20_set_pptable_driver_address +ffffffff82570570 t vega20_smu_init +ffffffff825709c0 t vega20_smu_fini +ffffffff82570b10 t vega20_start_smu +ffffffff82570c10 t vega20_get_argument +ffffffff82570c70 t vega20_send_msg_to_smc +ffffffff82570f10 t vega20_send_msg_to_smc_with_parameter +ffffffff82571220 t vega20_is_dpm_running +ffffffff825712d0 t vega20_smc_table_manager +ffffffff82572000 t vegam_smu_init +ffffffff825720b0 t vegam_start_smu +ffffffff825725a0 t vegam_update_smc_table +ffffffff82572830 t vegam_process_firmware_header +ffffffff825729b0 t vegam_update_sclk_threshold +ffffffff82572aa0 t vegam_thermal_setup_fan_table +ffffffff82572b00 t vegam_thermal_avfs_enable +ffffffff82572b90 t vegam_init_smc_table +ffffffff82573970 t vegam_populate_all_graphic_levels +ffffffff82574080 t vegam_populate_all_memory_levels +ffffffff825743c0 t vegam_get_offsetof +ffffffff82574450 t vegam_get_mac_definition +ffffffff825744b0 t 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T smu_send_hbm_bad_channel_flag +ffffffff825785b0 t smu_set_fan_control_mode +ffffffff82578670 t smu_get_fan_control_mode +ffffffff825786f0 t smu_set_fan_speed_pwm +ffffffff825787b0 t smu_get_fan_speed_pwm +ffffffff82578810 t smu_force_ppclk_levels +ffffffff825788e0 t smu_print_ppclk_levels +ffffffff82578950 t smu_emit_ppclk_levels +ffffffff825789c0 t smu_force_performance_level +ffffffff82578c90 t smu_read_sensor +ffffffff82578ef0 t smu_get_apu_thermal_limit +ffffffff82578f40 t smu_set_apu_thermal_limit +ffffffff82578f90 t smu_get_performance_level +ffffffff82579000 t smu_get_current_power_state +ffffffff82579060 t smu_get_fan_speed_rpm +ffffffff825790c0 t smu_set_fan_speed_rpm +ffffffff82579180 t smu_get_power_num_states +ffffffff82579200 t smu_sys_get_pp_table +ffffffff82579270 t smu_sys_set_pp_table +ffffffff825794b0 t smu_switch_power_profile +ffffffff825795e0 t smu_handle_dpm_task +ffffffff82579600 t smu_load_microcode +ffffffff82579700 t smu_dpm_set_power_gate +ffffffff82579ac0 t smu_set_power_limit +ffffffff82579c00 t smu_get_power_profile_mode +ffffffff82579c60 t smu_set_power_profile_mode +ffffffff82579cc0 t smu_od_edit_dpm_table +ffffffff82579d20 t smu_set_mp1_state +ffffffff82579d80 t smu_gfx_state_change_set +ffffffff82579dc0 t smu_get_sclk +ffffffff82579e40 t smu_get_mclk +ffffffff82579ec0 t smu_display_configuration_change +ffffffff82579f50 t smu_get_clock_by_type_with_latency +ffffffff8257a010 t smu_display_clock_voltage_request +ffffffff8257a070 t smu_enable_mgpu_fan_boost +ffffffff8257a0d0 t smu_set_display_count +ffffffff8257a140 t smu_set_deep_sleep_dcefclk +ffffffff8257a1b0 t smu_get_baco_capability +ffffffff8257a220 t smu_baco_set_state +ffffffff8257a320 t smu_sys_get_pp_feature_mask +ffffffff8257a3a0 t smu_sys_set_pp_feature_mask +ffffffff8257a410 t smu_mode2_reset +ffffffff8257a4d0 t smu_enable_gfx_features +ffffffff8257a590 t smu_set_df_cstate +ffffffff8257a660 t smu_set_xgmi_pstate +ffffffff8257a720 t smu_sys_get_gpu_metrics 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arcturus_get_unique_id +ffffffff8257ef00 t arcturus_init_smc_tables +ffffffff8257f090 t arcturus_setup_pptable +ffffffff8257f1f0 t arcturus_set_fan_speed_pwm +ffffffff8257f3d0 t arcturus_set_fan_speed_rpm +ffffffff8257f520 t arcturus_log_thermal_throttling_event +ffffffff8257f970 t arcturus_get_gpu_metrics +ffffffff8257fbc0 t arcturus_get_fan_parameters +ffffffff8257fc00 t arcturus_get_current_clk_freq_by_table +ffffffff8257fd70 t arcturus_get_smu_metrics_data +ffffffff8257fff0 t arcturus_upload_dpm_level +ffffffff82580110 t arcturus_i2c_xfer +ffffffff825803d0 t arcturus_i2c_func +ffffffff82580400 t arcturus_set_fan_static_mode +ffffffff82581000 T cyan_skillfish_set_ppt_funcs +ffffffff82581030 t cyan_skillfish_print_clk_levels +ffffffff82581170 t cyan_skillfish_od_edit_dpm_table +ffffffff825814b0 t cyan_skillfish_read_sensor +ffffffff825816e0 t cyan_skillfish_is_dpm_running +ffffffff82581790 t cyan_skillfish_init_smc_tables +ffffffff82581880 t cyan_skillfish_get_enabled_mask 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navi10_notify_smc_display_config +ffffffff825843e0 t navi10_is_dpm_running +ffffffff82584430 t navi10_get_fan_speed_rpm +ffffffff825844e0 t navi10_set_watermarks_table +ffffffff82584690 t navi10_get_thermal_temperature_range +ffffffff82584780 t navi10_get_uclk_dpm_states +ffffffff82584890 t navi10_set_default_od_settings +ffffffff82584b20 t navi10_display_disable_memory_clock_switch +ffffffff82584bb0 t navi10_get_power_limit +ffffffff82584ce0 t navi10_update_pcie_parameters +ffffffff82584e60 t navi10_i2c_control_init +ffffffff82584fb0 t navi10_i2c_control_fini +ffffffff82584ff0 t navi10_init_smc_tables +ffffffff82585260 t navi10_setup_pptable +ffffffff825854d0 t navi10_baco_enter +ffffffff82585520 t navi10_baco_exit +ffffffff82585680 t navi1x_get_gpu_metrics +ffffffff825860f0 t navi10_enable_mgpu_fan_boost +ffffffff82586170 t navi10_get_fan_parameters +ffffffff825861b0 t navi10_post_smu_init +ffffffff825864b0 t navi10_get_default_config_table_settings +ffffffff82586500 t navi10_set_config_table +ffffffff825865c0 t navi1x_get_smu_metrics_data +ffffffff82586c90 t navi10_od_setting_check_range +ffffffff82586d50 t navi10_i2c_xfer +ffffffff82587010 t navi10_i2c_func +ffffffff82587040 t navi10_umc_hybrid_cdr_workaround +ffffffff82588000 T sienna_cichlid_set_ppt_funcs +ffffffff82588050 t sienna_cichlid_run_btc +ffffffff825880e0 t sienna_cichlid_get_allowed_feature_mask +ffffffff82588380 t sienna_cichlid_set_default_dpm_table +ffffffff82588a10 t sienna_cichlid_populate_umd_state_clk +ffffffff82588ad0 t sienna_cichlid_print_clk_levels +ffffffff82588cf0 t sienna_cichlid_force_clk_levels +ffffffff82588e60 t sienna_cichlid_od_edit_dpm_table +ffffffff82589460 t sienna_cichlid_restore_user_od_settings +ffffffff825894f0 t sienna_cichlid_get_power_profile_mode +ffffffff825897d0 t sienna_cichlid_set_power_profile_mode +ffffffff82589ad0 t sienna_cichlid_dpm_set_vcn_enable +ffffffff82589ba0 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff82589c30 t sienna_cichlid_read_sensor +ffffffff8258a4f0 t sienna_cichlid_pre_display_config_changed +ffffffff8258a520 t sienna_cichlid_display_config_changed +ffffffff8258a580 t sienna_cichlid_notify_smc_display_config +ffffffff8258a750 t sienna_cichlid_is_dpm_running +ffffffff8258a7b0 t sienna_cichlid_get_fan_speed_rpm +ffffffff8258a8d0 t sienna_cichlid_set_watermarks_table +ffffffff8258aa70 t sienna_cichlid_get_thermal_temperature_range +ffffffff8258ab50 t sienna_cichlid_get_uclk_dpm_states +ffffffff8258ac60 t sienna_cichlid_set_default_od_settings +ffffffff8258ae30 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff8258aec0 t sienna_cichlid_dump_pptable +ffffffff8258aef0 t sienna_cichlid_get_power_limit +ffffffff8258afc0 t sienna_cichlid_update_pcie_parameters +ffffffff8258b0f0 t sienna_cichlid_i2c_control_init +ffffffff8258b240 t sienna_cichlid_i2c_control_fini +ffffffff8258b280 t sienna_cichlid_get_unique_id +ffffffff8258b400 t sienna_cichlid_init_smc_tables +ffffffff8258b770 t sienna_cichlid_set_mp1_state +ffffffff8258b7b0 t sienna_cichlid_setup_pptable +ffffffff8258bc40 t sienna_cichlid_system_features_control +ffffffff8258bce0 t sienna_cichlid_baco_enter +ffffffff8258bd30 t sienna_cichlid_baco_exit +ffffffff8258be90 t sienna_cichlid_is_mode1_reset_supported +ffffffff8258bf20 t sienna_cichlid_is_mode2_reset_supported +ffffffff8258bf50 t sienna_cichlid_mode2_reset +ffffffff8258c0f0 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff8258c110 t sienna_cichlid_get_gpu_metrics +ffffffff8258c6e0 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff8258c730 t sienna_cichlid_get_fan_parameters +ffffffff8258c770 t sienna_cichlid_gpo_control +ffffffff8258c840 t sienna_cichlid_get_ecc_info +ffffffff8258c940 t sienna_cichlid_stb_get_data_direct +ffffffff8258ca00 t sienna_cichlid_get_default_config_table_settings +ffffffff8258ca70 t sienna_cichlid_set_config_table +ffffffff8258cb40 t sienna_cichlid_get_throttler_status_locked +ffffffff8258cca0 t sienna_cichlid_get_smartshift_power_percentage +ffffffff8258cdd0 t sienna_cichlid_i2c_xfer +ffffffff8258d090 t sienna_cichlid_i2c_func +ffffffff8258e000 T smu_v11_0_init_microcode +ffffffff8258e170 T smu_v11_0_fini_microcode +ffffffff8258e1d0 T smu_v11_0_load_microcode +ffffffff8258e330 T smu_v11_0_check_fw_status +ffffffff8258e390 T smu_v11_0_check_fw_version +ffffffff8258e530 T smu_v11_0_setup_pptable +ffffffff8258e650 T smu_v11_0_init_smc_tables +ffffffff8258e7e0 T smu_v11_0_fini_smc_tables +ffffffff8258eaa0 T smu_v11_0_init_power +ffffffff8258eb40 T smu_v11_0_fini_power +ffffffff8258ebb0 T smu_v11_0_get_vbios_bootup_values +ffffffff8258ef60 T smu_v11_0_notify_memory_pool_location +ffffffff8258f080 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff8258f110 T smu_v11_0_set_driver_table_location +ffffffff8258f190 T smu_v11_0_set_tool_table_location +ffffffff8258f210 T smu_v11_0_init_display_count +ffffffff8258f270 T smu_v11_0_set_allowed_mask +ffffffff8258f350 T smu_v11_0_system_features_control +ffffffff8258f370 T smu_v11_0_notify_display_change +ffffffff8258f3e0 T smu_v11_0_init_max_sustainable_clocks +ffffffff8258f6b0 t smu_v11_0_get_max_sustainable_clock +ffffffff8258f820 T smu_v11_0_get_current_power_limit +ffffffff8258f920 T smu_v11_0_set_power_limit +ffffffff8258fa90 T smu_v11_0_interrupt_work +ffffffff8258fb20 T smu_v11_0_enable_thermal_alert +ffffffff8258fbd0 T smu_v11_0_disable_thermal_alert +ffffffff8258fbf0 T smu_v11_0_get_gfx_vdd +ffffffff8258fcb0 T smu_v11_0_display_clock_voltage_request +ffffffff8258fe20 T smu_v11_0_set_hard_freq_limited_range +ffffffff8258ff20 T smu_v11_0_gfx_off_control +ffffffff8258ffa0 T smu_v11_0_get_fan_control_mode +ffffffff82590000 T smu_v11_0_set_fan_speed_pwm +ffffffff825901e0 t smu_v11_0_set_fan_static_mode +ffffffff825903e0 T smu_v11_0_set_fan_speed_rpm +ffffffff82590530 T smu_v11_0_get_fan_speed_pwm +ffffffff82590690 T smu_v11_0_get_fan_speed_rpm +ffffffff825907a0 T smu_v11_0_set_fan_control_mode +ffffffff82590990 T smu_v11_0_set_xgmi_pstate +ffffffff825909b0 T smu_v11_0_register_irq_handler +ffffffff82590a80 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff82590b10 T smu_v11_0_set_azalia_d3_pme +ffffffff82590b30 T smu_v11_0_baco_set_armd3_sequence +ffffffff82590b50 T smu_v11_0_baco_is_support +ffffffff82590bf0 T smu_v11_0_baco_get_state +ffffffff82590c20 T smu_v11_0_baco_set_state +ffffffff82590f40 T smu_v11_0_baco_enter +ffffffff82591090 T smu_v11_0_baco_exit +ffffffff82591210 T smu_v11_0_mode1_reset +ffffffff82591290 T smu_v11_0_handle_passthrough_sbr +ffffffff825912b0 T smu_v11_0_get_dpm_ultimate_freq +ffffffff82591410 T smu_v11_0_set_soft_freq_limited_range +ffffffff82591500 T smu_v11_0_set_performance_level +ffffffff825918f0 T smu_v11_0_set_power_source +ffffffff82591960 T smu_v11_0_get_dpm_freq_by_index +ffffffff82591a20 T smu_v11_0_get_dpm_level_count +ffffffff82591ad0 T smu_v11_0_set_single_dpm_table +ffffffff82591db0 T smu_v11_0_get_dpm_level_range +ffffffff82591f70 T smu_v11_0_get_current_pcie_link_width_level +ffffffff82591fd0 T smu_v11_0_get_current_pcie_link_width +ffffffff82592040 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff825920a0 T smu_v11_0_get_current_pcie_link_speed +ffffffff82592100 T smu_v11_0_gfx_ulv_control +ffffffff82592180 T smu_v11_0_deep_sleep_control +ffffffff82592390 T smu_v11_0_restore_user_od_settings +ffffffff82592420 T smu_v11_0_set_smu_mailbox_registers +ffffffff82592490 t smu_v11_0_set_irq_state +ffffffff82592ae0 t smu_v11_0_irq_process +ffffffff82593000 T vangogh_set_ppt_funcs +ffffffff82593040 t vangogh_set_default_dpm_tables +ffffffff82593070 t vangogh_common_print_clk_levels +ffffffff82593530 t vangogh_force_clk_levels +ffffffff825937b0 t vangogh_od_edit_dpm_table +ffffffff82593d70 t vangogh_get_power_profile_mode +ffffffff82593ed0 t vangogh_set_power_profile_mode +ffffffff82594020 t vangogh_dpm_set_vcn_enable +ffffffff82594080 t vangogh_dpm_set_jpeg_enable +ffffffff825940e0 t vangogh_read_sensor +ffffffff825947f0 t vangogh_get_apu_thermal_limit +ffffffff82594810 t vangogh_set_apu_thermal_limit +ffffffff82594830 t vangogh_is_dpm_running +ffffffff825948a0 t vangogh_set_watermarks_table +ffffffff82594a30 t vangogh_set_performance_level +ffffffff82595400 t vangogh_get_power_limit +ffffffff82595580 t vangogh_get_ppt_limit +ffffffff825955f0 t vangogh_get_dpm_clock_table +ffffffff82595760 t vangogh_init_smc_tables +ffffffff825959e0 t vangogh_system_features_control +ffffffff82595a30 t vangogh_set_power_limit +ffffffff82595bc0 t vangogh_get_gfxoff_status +ffffffff82595c50 t vangogh_get_gfxoff_entrycount +ffffffff82595cd0 t vangogh_set_gfxoff_residency +ffffffff82595d50 t vangogh_get_gfxoff_residency +ffffffff82595d90 t vangogh_mode2_reset +ffffffff82595f50 t vangogh_common_get_gpu_metrics +ffffffff82596770 t vangogh_post_smu_init +ffffffff82596930 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff825969a0 t vangogh_force_dpm_limit_value +ffffffff82596b20 t vangogh_get_dpm_ultimate_freq +ffffffff82596e50 t vangogh_set_soft_freq_limited_range +ffffffff82597010 t vangogh_get_gpu_metrics_v2_3 +ffffffff82598000 T renoir_set_ppt_funcs +ffffffff825980a0 t renoir_get_current_power_state +ffffffff82598120 t renoir_print_clk_levels +ffffffff82598570 t renoir_force_clk_levels +ffffffff825987d0 t renoir_od_edit_dpm_table +ffffffff82598b10 t renoir_get_power_profile_mode +ffffffff82598c20 t renoir_set_power_profile_mode +ffffffff82598d70 t renoir_dpm_set_vcn_enable +ffffffff82598e10 t renoir_dpm_set_jpeg_enable +ffffffff82598ea0 t renoir_read_sensor +ffffffff825992b0 t renoir_is_dpm_running +ffffffff825992f0 t renoir_set_watermarks_table +ffffffff825994b0 t renoir_set_performance_level +ffffffff82599af0 t renoir_get_dpm_clock_table +ffffffff82599e40 t renoir_init_smc_tables +ffffffff82599fe0 t renoir_get_enabled_mask +ffffffff8259a020 t renoir_get_dpm_ultimate_freq +ffffffff8259a2f0 t renoir_get_gpu_metrics +ffffffff8259a530 t renoir_gfx_state_change_set +ffffffff8259a560 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff8259a610 t renoir_force_dpm_limit_value +ffffffff8259b000 T smu_v12_0_check_fw_status +ffffffff8259b060 T smu_v12_0_check_fw_version +ffffffff8259b0e0 T smu_v12_0_powergate_sdma +ffffffff8259b130 T smu_v12_0_set_gfx_cgpg +ffffffff8259b190 T smu_v12_0_get_gfxoff_status +ffffffff8259b220 T smu_v12_0_gfx_off_control +ffffffff8259b350 T smu_v12_0_fini_smc_tables +ffffffff8259b420 T smu_v12_0_set_default_dpm_tables +ffffffff8259b450 T smu_v12_0_mode2_reset +ffffffff8259b470 T smu_v12_0_set_soft_freq_limited_range +ffffffff8259b5f0 T smu_v12_0_set_driver_table_location +ffffffff8259b670 T smu_v12_0_get_vbios_bootup_values +ffffffff8259c000 T aldebaran_set_ppt_funcs +ffffffff8259c050 t aldebaran_get_allowed_feature_mask +ffffffff8259c0b0 t aldebaran_set_default_dpm_table +ffffffff8259c2f0 t aldebaran_populate_umd_state_clk +ffffffff8259c3f0 t aldebaran_print_clk_levels +ffffffff8259c5f0 t aldebaran_force_clk_levels +ffffffff8259c800 t aldebaran_usr_edit_dpm_table +ffffffff8259ca40 t aldebaran_read_sensor +ffffffff8259ccc0 t aldebaran_is_dpm_running +ffffffff8259cd20 t aldebaran_get_thermal_temperature_range +ffffffff8259cdf0 t aldebaran_set_performance_level +ffffffff8259cea0 t aldebaran_get_power_limit +ffffffff8259d060 t aldebaran_set_df_cstate +ffffffff8259d0f0 t aldebaran_allow_xgmi_power_down +ffffffff8259d1a0 t aldebaran_i2c_control_init +ffffffff8259d270 t aldebaran_i2c_control_fini +ffffffff8259d2b0 t aldebaran_get_unique_id +ffffffff8259d3a0 t aldebaran_init_smc_tables +ffffffff8259d590 t aldebaran_set_mp1_state +ffffffff8259d5d0 t aldebaran_setup_pptable +ffffffff8259d6c0 t aldebaran_system_features_control +ffffffff8259d850 t aldebaran_set_power_limit +ffffffff8259d8e0 t aldebaran_is_baco_supported +ffffffff8259d910 t aldebaran_is_mode1_reset_supported +ffffffff8259d940 t aldebaran_is_mode2_reset_supported +ffffffff8259d970 t aldebaran_mode1_reset +ffffffff8259da70 t aldebaran_mode2_reset +ffffffff8259deb0 t aldebaran_set_soft_freq_limited_range +ffffffff8259e0f0 t aldebaran_log_thermal_throttling_event +ffffffff8259e450 t aldebaran_get_gpu_metrics +ffffffff8259e720 t aldebaran_smu_handle_passthrough_sbr +ffffffff8259e740 t aldebaran_smu_send_hbm_bad_page_num +ffffffff8259e7d0 t aldebaran_get_ecc_info +ffffffff8259e940 t aldebaran_send_hbm_bad_channel_flag +ffffffff8259ea30 t aldebaran_get_current_clk_freq_by_table +ffffffff8259eba0 t aldebaran_get_smu_metrics_data +ffffffff8259ee20 t aldebaran_upload_dpm_level +ffffffff8259ef40 t aldebaran_i2c_xfer +ffffffff8259f200 t aldebaran_i2c_func +ffffffff825a0000 T smu_v13_0_init_microcode +ffffffff825a0150 T smu_v13_0_fini_microcode +ffffffff825a01b0 T smu_v13_0_load_microcode +ffffffff825a01e0 T smu_v13_0_init_pptable_microcode +ffffffff825a0390 T smu_v13_0_get_pptable_from_firmware +ffffffff825a04c0 T smu_v13_0_check_fw_status +ffffffff825a0540 T smu_v13_0_check_fw_version +ffffffff825a05d0 T smu_v13_0_setup_pptable +ffffffff825a0770 T smu_v13_0_init_smc_tables +ffffffff825a0940 T smu_v13_0_fini_smc_tables +ffffffff825a0be0 T smu_v13_0_init_power +ffffffff825a0c70 T smu_v13_0_fini_power +ffffffff825a0d00 T smu_v13_0_get_vbios_bootup_values +ffffffff825a0fd0 T smu_v13_0_notify_memory_pool_location +ffffffff825a10a0 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff825a1130 T smu_v13_0_set_driver_table_location +ffffffff825a11b0 T smu_v13_0_set_tool_table_location +ffffffff825a1230 T smu_v13_0_init_display_count +ffffffff825a1270 T smu_v13_0_set_allowed_mask +ffffffff825a1350 T smu_v13_0_gfx_off_control +ffffffff825a13d0 T smu_v13_0_system_features_control +ffffffff825a13f0 T smu_v13_0_notify_display_change +ffffffff825a1460 T smu_v13_0_init_max_sustainable_clocks +ffffffff825a1730 t smu_v13_0_get_max_sustainable_clock +ffffffff825a18a0 T smu_v13_0_get_current_power_limit +ffffffff825a19a0 T smu_v13_0_set_power_limit +ffffffff825a1ae0 T smu_v13_0_enable_thermal_alert +ffffffff825a1b80 T smu_v13_0_disable_thermal_alert +ffffffff825a1bc0 T smu_v13_0_get_gfx_vdd +ffffffff825a1c80 T smu_v13_0_display_clock_voltage_request +ffffffff825a1df0 T smu_v13_0_set_hard_freq_limited_range +ffffffff825a1ef0 T smu_v13_0_get_fan_control_mode +ffffffff825a1f40 T smu_v13_0_set_fan_speed_pwm +ffffffff825a21b0 t smu_v13_0_set_fan_static_mode +ffffffff825a23b0 T smu_v13_0_set_fan_control_mode +ffffffff825a2550 T smu_v13_0_set_fan_speed_rpm +ffffffff825a2740 T smu_v13_0_set_xgmi_pstate +ffffffff825a2760 T smu_v13_0_register_irq_handler +ffffffff825a2840 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff825a28d0 T smu_v13_0_set_azalia_d3_pme +ffffffff825a28f0 T smu_v13_0_wait_for_event +ffffffff825a2940 T smu_v13_0_get_dpm_ultimate_freq +ffffffff825a2ab0 T smu_v13_0_set_soft_freq_limited_range +ffffffff825a2ba0 T smu_v13_0_set_performance_level +ffffffff825a3400 T smu_v13_0_set_power_source +ffffffff825a3470 T smu_v13_0_get_dpm_freq_by_index +ffffffff825a3530 T smu_v13_0_set_single_dpm_table +ffffffff825a38b0 T smu_v13_0_get_current_pcie_link_width_level +ffffffff825a3910 T smu_v13_0_get_current_pcie_link_width +ffffffff825a3980 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff825a39e0 T smu_v13_0_get_current_pcie_link_speed +ffffffff825a3a50 T smu_v13_0_set_vcn_enable +ffffffff825a3b10 T smu_v13_0_set_jpeg_enable +ffffffff825a3b30 T smu_v13_0_run_btc +ffffffff825a3bc0 T smu_v13_0_gpo_control +ffffffff825a3c60 T smu_v13_0_deep_sleep_control +ffffffff825a3f60 T smu_v13_0_gfx_ulv_control +ffffffff825a3fe0 T smu_v13_0_baco_set_armd3_sequence +ffffffff825a4050 T smu_v13_0_baco_is_support +ffffffff825a40f0 T smu_v13_0_baco_get_state +ffffffff825a4120 T smu_v13_0_baco_set_state +ffffffff825a4220 T smu_v13_0_baco_enter +ffffffff825a43b0 T smu_v13_0_baco_exit +ffffffff825a4460 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff825a44a0 T smu_v13_0_od_edit_dpm_table +ffffffff825a47b0 T smu_v13_0_set_default_dpm_tables +ffffffff825a47e0 T smu_v13_0_set_smu_mailbox_registers +ffffffff825a4850 T smu_v13_0_mode1_reset +ffffffff825a48d0 T smu_v13_0_update_pcie_parameters +ffffffff825a4b50 t smu_v13_0_set_irq_state +ffffffff825a51a0 t smu_v13_0_irq_process +ffffffff825a6000 T smu_v13_0_0_set_ppt_funcs +ffffffff825a60f0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff825a6240 t smu_v13_0_0_set_default_dpm_table +ffffffff825a66c0 t smu_v13_0_0_populate_umd_state_clk +ffffffff825a6800 t smu_v13_0_0_print_clk_levels +ffffffff825a6950 t smu_v13_0_0_force_clk_levels +ffffffff825a6ae0 t smu_v13_0_0_od_edit_dpm_table +ffffffff825a7020 t smu_v13_0_0_restore_user_od_settings +ffffffff825a7100 t smu_v13_0_0_get_power_profile_mode +ffffffff825a7220 t smu_v13_0_0_set_power_profile_mode +ffffffff825a74b0 t smu_v13_0_0_read_sensor +ffffffff825a7730 t smu_v13_0_0_is_dpm_running +ffffffff825a7780 t smu_v13_0_0_get_fan_speed_pwm +ffffffff825a7870 t smu_v13_0_0_get_fan_speed_rpm +ffffffff825a78e0 t smu_v13_0_0_get_thermal_temperature_range +ffffffff825a79e0 t smu_v13_0_0_set_default_od_settings +ffffffff825a7b40 t smu_v13_0_0_dump_pptable +ffffffff825a7b70 t smu_v13_0_0_get_power_limit +ffffffff825a7c60 t smu_v13_0_0_set_df_cstate +ffffffff825a7c80 t smu_v13_0_0_i2c_control_init +ffffffff825a7dd0 t smu_v13_0_0_i2c_control_fini +ffffffff825a7e10 t smu_v13_0_0_get_unique_id +ffffffff825a7ec0 t smu_v13_0_0_init_smc_tables +ffffffff825a8130 t smu_v13_0_0_set_mp1_state +ffffffff825a8170 t smu_v13_0_0_setup_pptable +ffffffff825a82f0 t smu_v13_0_0_system_features_control +ffffffff825a8300 t smu_v13_0_0_baco_enter +ffffffff825a8370 t smu_v13_0_0_baco_exit +ffffffff825a83e0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff825a8440 t smu_v13_0_0_mode1_reset +ffffffff825a85a0 t smu_v13_0_0_mode2_reset +ffffffff825a85f0 t smu_v13_0_0_enable_gfx_features +ffffffff825a8650 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff825a8780 t smu_v13_0_0_get_gpu_metrics +ffffffff825a8be0 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff825a8c30 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff825a8cc0 t smu_v13_0_0_get_ecc_info +ffffffff825a8de0 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff825a8e70 t smu_v13_0_0_i2c_xfer +ffffffff825a9130 t smu_v13_0_0_i2c_func +ffffffff825aa000 T smu_v13_0_4_set_ppt_funcs +ffffffff825aa0c0 t smu_v13_0_4_print_clk_levels +ffffffff825aa140 t smu_v13_0_4_force_clk_levels +ffffffff825aa420 t smu_v13_0_4_read_sensor +ffffffff825aa760 t smu_v13_0_4_is_dpm_running +ffffffff825aa7c0 t smu_v13_0_4_set_watermarks_table +ffffffff825aa950 t smu_v13_0_4_set_performance_level +ffffffff825ab660 t smu_v13_0_4_init_smc_tables +ffffffff825ab800 t smu_v13_0_4_fini_smc_tables +ffffffff825ab8d0 t smu_v13_0_4_system_features_control +ffffffff825ab960 t smu_v13_0_4_mode2_reset +ffffffff825ab980 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff825abdb0 t smu_v13_0_4_get_gpu_metrics +ffffffff825abf90 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff825abff0 t smu_v13_0_4_get_current_clk_freq +ffffffff825ad000 T smu_v13_0_5_set_ppt_funcs +ffffffff825ad0a0 t smu_v13_0_5_set_default_dpm_tables +ffffffff825ad0d0 t smu_v13_0_5_print_clk_levels +ffffffff825ad170 t smu_v13_0_5_force_clk_levels +ffffffff825ad300 t smu_v13_0_5_od_edit_dpm_table +ffffffff825ad610 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff825ad630 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff825ad650 t smu_v13_0_5_read_sensor +ffffffff825ad8d0 t smu_v13_0_5_is_dpm_running +ffffffff825ad930 t smu_v13_0_5_set_watermarks_table +ffffffff825adac0 t smu_v13_0_5_set_performance_level +ffffffff825ae140 t smu_v13_0_5_init_smc_tables +ffffffff825ae2e0 t smu_v13_0_5_fini_smc_tables +ffffffff825ae3b0 t smu_v13_0_5_system_features_control +ffffffff825ae400 t smu_v13_0_5_mode2_reset +ffffffff825ae490 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff825ae8d0 t smu_v13_0_5_get_gpu_metrics +ffffffff825aea30 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff825af000 T smu_v13_0_6_set_ppt_funcs +ffffffff825af050 t smu_v13_0_6_get_allowed_feature_mask +ffffffff825af0b0 t smu_v13_0_6_set_default_dpm_table +ffffffff825af600 t smu_v13_0_6_populate_umd_state_clk +ffffffff825af700 t smu_v13_0_6_print_clk_levels +ffffffff825afad0 t smu_v13_0_6_force_clk_levels +ffffffff825afce0 t smu_v13_0_6_usr_edit_dpm_table +ffffffff825aff20 t smu_v13_0_6_read_sensor +ffffffff825b0530 t smu_v13_0_6_is_dpm_running +ffffffff825b05c0 t smu_v13_0_6_get_thermal_temperature_range +ffffffff825b0740 t smu_v13_0_6_set_performance_level +ffffffff825b0870 t smu_v13_0_6_get_power_limit +ffffffff825b0950 t smu_v13_0_6_set_df_cstate +ffffffff825b0970 t smu_v13_0_6_allow_xgmi_power_down +ffffffff825b0990 t smu_v13_0_6_i2c_control_init +ffffffff825b0ae0 t smu_v13_0_6_i2c_control_fini +ffffffff825b0b20 t smu_v13_0_6_get_unique_id +ffffffff825b0ba0 t smu_v13_0_6_init_smc_tables +ffffffff825b0d60 t smu_v13_0_6_check_fw_status +ffffffff825b0dc0 t smu_v13_0_6_setup_pptable +ffffffff825b0df0 t smu_v13_0_6_system_features_control +ffffffff825b0e90 t smu_v13_0_6_get_enabled_mask +ffffffff825b0f10 t smu_v13_0_6_set_power_limit +ffffffff825b0f30 t smu_v13_0_6_register_irq_handler +ffffffff825b0f90 t smu_v13_0_6_is_baco_supported +ffffffff825b0fc0 t smu_v13_0_6_is_mode1_reset_supported +ffffffff825b0ff0 t smu_v13_0_6_is_mode2_reset_supported +ffffffff825b1020 t smu_v13_0_6_mode1_reset +ffffffff825b10e0 t smu_v13_0_6_mode2_reset +ffffffff825b14a0 t smu_v13_0_6_get_dpm_ultimate_freq +ffffffff825b16e0 t smu_v13_0_6_set_soft_freq_limited_range +ffffffff825b1960 t smu_v13_0_6_log_thermal_throttling_event +ffffffff825b1ca0 t smu_v13_0_6_get_gpu_metrics +ffffffff825b2050 t smu_v13_0_6_smu_send_hbm_bad_page_num +ffffffff825b20e0 t smu_v13_0_6_get_smu_metrics_data +ffffffff825b23a0 t smu_v13_0_6_upload_dpm_level +ffffffff825b24d0 t smu_v13_0_6_i2c_xfer +ffffffff825b2800 t smu_v13_0_6_i2c_func +ffffffff825b2830 t smu_v13_0_6_set_irq_state +ffffffff825b2b10 t smu_v13_0_6_irq_process +ffffffff825b3000 T smu_v13_0_7_set_ppt_funcs +ffffffff825b3060 t smu_v13_0_7_get_allowed_feature_mask +ffffffff825b31e0 t smu_v13_0_7_set_default_dpm_table +ffffffff825b3660 t smu_v13_0_7_populate_umd_state_clk +ffffffff825b37a0 t smu_v13_0_7_print_clk_levels +ffffffff825b38f0 t smu_v13_0_7_force_clk_levels +ffffffff825b3a80 t smu_v13_0_7_od_edit_dpm_table +ffffffff825b3fc0 t smu_v13_0_7_restore_user_od_settings +ffffffff825b40a0 t smu_v13_0_7_get_power_profile_mode +ffffffff825b4200 t smu_v13_0_7_set_power_profile_mode +ffffffff825b4470 t smu_v13_0_7_read_sensor +ffffffff825b46e0 t smu_v13_0_7_is_dpm_running +ffffffff825b4730 t smu_v13_0_7_get_fan_speed_pwm +ffffffff825b4820 t smu_v13_0_7_get_fan_speed_rpm +ffffffff825b4890 t smu_v13_0_7_get_thermal_temperature_range +ffffffff825b4990 t smu_v13_0_7_set_default_od_settings +ffffffff825b4af0 t smu_v13_0_7_dump_pptable +ffffffff825b4b20 t smu_v13_0_7_get_power_limit +ffffffff825b4c10 t smu_v13_0_7_set_df_cstate +ffffffff825b4c30 t smu_v13_0_7_init_smc_tables +ffffffff825b4e50 t smu_v13_0_7_check_fw_status +ffffffff825b4eb0 t smu_v13_0_7_set_mp1_state +ffffffff825b4ef0 t smu_v13_0_7_setup_pptable +ffffffff825b5060 t smu_v13_0_7_baco_enter +ffffffff825b50d0 t smu_v13_0_7_baco_exit +ffffffff825b5140 t smu_v13_0_7_is_mode1_reset_supported +ffffffff825b5180 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff825b52b0 t smu_v13_0_7_get_gpu_metrics +ffffffff825b5700 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff825b6000 T yellow_carp_set_ppt_funcs +ffffffff825b6050 t yellow_carp_set_default_dpm_tables +ffffffff825b6080 t yellow_carp_print_clk_levels +ffffffff825b6100 t yellow_carp_force_clk_levels +ffffffff825b63e0 t yellow_carp_od_edit_dpm_table +ffffffff825b66f0 t yellow_carp_dpm_set_vcn_enable +ffffffff825b6710 t yellow_carp_dpm_set_jpeg_enable +ffffffff825b6730 t yellow_carp_read_sensor +ffffffff825b6b00 t yellow_carp_is_dpm_running +ffffffff825b6b60 t yellow_carp_set_watermarks_table +ffffffff825b6cf0 t yellow_carp_set_performance_level +ffffffff825b78f0 t yellow_carp_init_smc_tables +ffffffff825b7a90 t yellow_carp_fini_smc_tables +ffffffff825b7b60 t yellow_carp_system_features_control +ffffffff825b7bb0 t yellow_carp_get_gfxoff_status +ffffffff825b7c40 t yellow_carp_mode2_reset +ffffffff825b7cd0 t yellow_carp_get_dpm_ultimate_freq +ffffffff825b8120 t yellow_carp_get_gpu_metrics +ffffffff825b82f0 t yellow_carp_post_smu_init +ffffffff825b8380 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff825b83e0 t yellow_carp_get_current_clk_freq +ffffffff825b84f0 t yellow_carp_get_dpm_profile_freq +ffffffff825b9000 T smu_cmn_send_msg_without_waiting +ffffffff825b91b0 T smu_cmn_wait_for_response +ffffffff825b9300 T smu_cmn_send_smc_msg_with_param +ffffffff825b9690 T smu_cmn_to_asic_specific_index +ffffffff825b97c0 t __smu_cmn_reg_print_error +ffffffff825b9a20 T smu_cmn_send_smc_msg +ffffffff825b9a40 T smu_cmn_send_debug_smc_msg +ffffffff825b9ae0 T smu_cmn_send_debug_smc_msg_with_param +ffffffff825b9b80 T smu_cmn_feature_is_supported +ffffffff825b9c30 T smu_cmn_feature_is_enabled +ffffffff825b9d30 T smu_cmn_clk_dpm_is_enabled +ffffffff825b9e40 T smu_cmn_get_enabled_mask +ffffffff825b9f40 T smu_cmn_get_indep_throttler_status +ffffffff825b9ff0 T smu_cmn_feature_update_enable_state +ffffffff825ba0b0 T smu_cmn_feature_set_enabled +ffffffff825ba190 T smu_cmn_get_pp_feature_mask +ffffffff825ba340 T smu_cmn_set_pp_feature_mask +ffffffff825ba470 T smu_cmn_disable_all_features_with_exception +ffffffff825ba530 T smu_cmn_get_smc_version +ffffffff825ba620 T smu_cmn_update_table +ffffffff825ba7b0 T smu_cmn_write_watermarks_table +ffffffff825ba890 T smu_cmn_write_pptable +ffffffff825ba970 T smu_cmn_get_metrics_table +ffffffff825baae0 T smu_cmn_get_combo_pptable +ffffffff825babd0 T smu_cmn_init_soft_gpu_metrics +ffffffff825bacd0 T smu_cmn_set_mp1_state +ffffffff825bad80 T smu_cmn_is_audio_func_enabled +ffffffff825bb000 T pci_mcfg_init +ffffffff825bb050 T pci_lookup_segment +ffffffff825bb0b0 T pci_attach_hook +ffffffff825bb0e0 T pci_bus_maxdevs +ffffffff825bb110 T pci_make_tag +ffffffff825bb190 T pci_decompose_tag +ffffffff825bb1f0 T pci_conf_size +ffffffff825bb250 T pci_mcfg_map_bus +ffffffff825bb2e0 T pci_conf_read +ffffffff825bb450 T pci_conf_write +ffffffff825bb5a0 T pci_msix_table_map +ffffffff825bb6f0 T pci_msix_table_unmap +ffffffff825bb7a0 T msi_hwmask +ffffffff825bb880 T msi_hwunmask +ffffffff825bb960 T msi_addroute +ffffffff825bbaa0 T msi_delroute +ffffffff825bbb30 T msi_allocidtvec +ffffffff825bbca0 T pci_intr_enable_msivec +ffffffff825bbda0 T pci_intr_map_msi +ffffffff825bbe60 T pci_intr_map_msivec +ffffffff825bbf20 T msix_hwmask +ffffffff825bc0c0 T msix_hwunmask +ffffffff825bc220 T msix_addroute +ffffffff825bc470 T msix_delroute +ffffffff825bc600 T pci_intr_map_msix +ffffffff825bc6e0 T pci_intr_map +ffffffff825bc940 T pci_intr_string +ffffffff825bca20 T pci_intr_establish +ffffffff825bca70 T pci_intr_establish_cpu +ffffffff825bcbf0 T pci_intr_disestablish +ffffffff825bcc10 T pci_init_extents +ffffffff825bce30 T pci_probe_device_hook +ffffffff825bce70 T pci_dev_postattach +ffffffff825bce80 T pci_min_powerstate +ffffffff825bce90 T pci_set_powerstate_md +ffffffff825bd000 T pciide_machdep_compat_intr_establish +ffffffff825bd070 T pciide_machdep_compat_intr_disestablish +ffffffff825be000 T vga_post_init +ffffffff825be390 t vm86_emu_inb +ffffffff825be3e0 t vm86_emu_inw +ffffffff825be420 t vm86_emu_inl +ffffffff825be460 t vm86_emu_outb +ffffffff825be4b0 t vm86_emu_outw +ffffffff825be4f0 t vm86_emu_outl +ffffffff825be530 T vga_post_call +ffffffff825be5b0 T vga_post_free +ffffffff825be640 T ddb_vgapost +ffffffff825bf000 T pchbmatch +ffffffff825bf040 T pchbattach +ffffffff825bf570 T pchbactivate +ffffffff825bf5f0 T pchb_amd64ht_attach +ffffffff825bf750 T pchb_rnd +ffffffff825bf7e0 T pchb_print +ffffffff825c0000 T amas_match +ffffffff825c0060 T amas_attach +ffffffff825c00c0 T amas_intl_nodes +ffffffff825c0160 T amas_get_pagerange +ffffffff825c1000 T agp_flush_cache +ffffffff825c2000 T cardslotmatch +ffffffff825c2050 T cardslotattach +ffffffff825c2320 T cardslot_event +ffffffff825c2380 T cardslot_cb_print +ffffffff825c23e0 T cardslot_16_print +ffffffff825c2430 T cardslot_16_submatch +ffffffff825c2480 T cardslot_event_throw +ffffffff825c2540 T cardslot_process_event +ffffffff825c3000 T cardbusmatch +ffffffff825c3060 T cardbusattach +ffffffff825c3150 T cardbus_read_tuples +ffffffff825c35e0 T parse_tuple +ffffffff825c3860 T cardbus_attach_card +ffffffff825c4170 T enable_function +ffffffff825c4220 T decode_tuples +ffffffff825c4300 T cardbusprint +ffffffff825c4420 T cardbussubmatch +ffffffff825c4480 T disable_function +ffffffff825c44e0 T cardbus_detach_card +ffffffff825c45d0 T cardbus_intr_establish +ffffffff825c4600 T cardbus_intr_disestablish +ffffffff825c4620 T cardbus_function_enable +ffffffff825c4720 T cardbus_function_disable +ffffffff825c4780 T cardbus_matchbyid +ffffffff825c47f0 T decode_tuple +ffffffff825c5000 T cardbus_mapreg_map +ffffffff825c51d0 T cardbus_mapreg_unmap +ffffffff825c6000 T cardbus_read_exrom +ffffffff825c7000 T rbus_space_alloc +ffffffff825c7070 T rbus_space_alloc_subregion +ffffffff825c7270 T rbus_space_free +ffffffff825c7310 T rbus_new_body +ffffffff825c73b0 T rbus_new_root_delegate +ffffffff825c7490 T rbus_new_root_share +ffffffff825c8000 T com_cardbus_match +ffffffff825c8080 T com_cardbus_attach +ffffffff825c8250 T com_cardbus_detach +ffffffff825c8300 T com_cardbus_find_csdev +ffffffff825c8480 T com_cardbus_gofigure +ffffffff825c8980 T com_cardbus_enable +ffffffff825c8a80 T com_cardbus_disable +ffffffff825c8ad0 T com_cardbus_setup +ffffffff825c9000 T xl_cardbus_match +ffffffff825c9080 T xl_cardbus_attach +ffffffff825c9480 T xl_cardbus_detach +ffffffff825c9550 T xl_cardbus_lookup +ffffffff825c9600 T xl_cardbus_intr_ack +ffffffff825ca000 T dc_cardbus_match +ffffffff825ca030 T dc_cardbus_attach +ffffffff825ca450 T dc_cardbus_detach +ffffffff825ca500 T dc_cardbus_setup +ffffffff825cb000 T fxp_cardbus_match +ffffffff825cb030 T fxp_cardbus_attach +ffffffff825cb290 T fxp_cardbus_detach +ffffffff825cb340 T fxp_cardbus_setup +ffffffff825cc000 t rl_cardbus_match +ffffffff825cc030 t rl_cardbus_attach +ffffffff825cc220 t rl_cardbus_detach +ffffffff825cc2e0 T rl_cardbus_setup +ffffffff825cd000 T re_cardbus_probe +ffffffff825cd030 T re_cardbus_attach +ffffffff825cd280 T re_cardbus_detach +ffffffff825cd320 T re_cardbus_setup +ffffffff825ce000 T ath_cardbus_match +ffffffff825ce060 T ath_cardbus_attach +ffffffff825ce1c0 T ath_cardbus_detach +ffffffff825ce2a0 T ath_cardbus_enable +ffffffff825ce3a0 T ath_cardbus_disable +ffffffff825ce400 T ath_cardbus_power +ffffffff825ce440 T ath_cardbus_setup +ffffffff825cf000 T athn_cardbus_match +ffffffff825cf030 T athn_cardbus_attach +ffffffff825cf1a0 T athn_cardbus_detach +ffffffff825cf250 T athn_cardbus_enable +ffffffff825cf350 T athn_cardbus_disable +ffffffff825cf3b0 T athn_cardbus_power +ffffffff825cf3f0 T athn_cardbus_read +ffffffff825cf420 T athn_cardbus_write +ffffffff825cf450 T athn_cardbus_write_barrier +ffffffff825cf480 T athn_cardbus_setup +ffffffff825d0000 T atw_cardbus_match +ffffffff825d0030 T atw_cardbus_attach +ffffffff825d0260 T atw_cardbus_detach +ffffffff825d0330 T atw_cardbus_enable +ffffffff825d0430 T atw_cardbus_disable +ffffffff825d0490 T atw_cardbus_power +ffffffff825d04d0 T atw_cardbus_setup +ffffffff825d1000 T rtw_cardbus_match +ffffffff825d1030 T rtw_cardbus_attach +ffffffff825d12e0 T rtw_cardbus_detach +ffffffff825d1430 T rtw_cardbus_intr_ack +ffffffff825d1450 T rtw_cardbus_funcregen +ffffffff825d14d0 T rtw_cardbus_enable +ffffffff825d1690 T rtw_cardbus_disable +ffffffff825d17b0 T rtw_cardbus_power +ffffffff825d17f0 T rtw_cardbus_setup +ffffffff825d2000 T ral_cardbus_match +ffffffff825d2030 T ral_cardbus_attach +ffffffff825d2280 T ral_cardbus_detach +ffffffff825d2350 T ral_cardbus_activate +ffffffff825d23f0 T ral_cardbus_enable +ffffffff825d25a0 T ral_cardbus_disable +ffffffff825d2600 T ral_cardbus_setup +ffffffff825d26c0 T ral_cardbus_wakeup +ffffffff825d3000 T acx_cardbus_match +ffffffff825d3030 T acx_cardbus_attach +ffffffff825d32b0 T acx_cardbus_detach +ffffffff825d3400 T acx_cardbus_enable +ffffffff825d3510 T acx_cardbus_disable +ffffffff825d3570 T acx_cardbus_power +ffffffff825d35b0 T acx_cardbus_setup +ffffffff825d4000 T pgt_cardbus_match +ffffffff825d4030 T pgt_cardbus_attach +ffffffff825d4290 T pgt_cardbus_detach +ffffffff825d4350 T pgt_cardbus_enable +ffffffff825d4500 T pgt_cardbus_disable +ffffffff825d4560 T pgt_cardbus_power +ffffffff825d45c0 T pgt_cardbus_setup +ffffffff825d5000 T ehci_cardbus_match +ffffffff825d5040 T ehci_cardbus_attach +ffffffff825d5360 T ehci_cardbus_detach +ffffffff825d6000 T ohci_cardbus_match +ffffffff825d6040 T ohci_cardbus_attach +ffffffff825d6360 T ohci_cardbus_detach +ffffffff825d7000 T uhci_cardbus_match +ffffffff825d7040 T uhci_cardbus_attach +ffffffff825d73d0 T uhci_cardbus_detach +ffffffff825d8000 T malo_cardbus_match +ffffffff825d8030 T malo_cardbus_attach +ffffffff825d82f0 T malo_cardbus_detach +ffffffff825d83e0 T malo_cardbus_enable +ffffffff825d85b0 T malo_cardbus_disable +ffffffff825d8610 T malo_cardbus_setup +ffffffff825d9000 T bwi_cardbus_match +ffffffff825d9030 T bwi_cardbus_attach +ffffffff825d9310 T bwi_cardbus_detach +ffffffff825d93d0 T bwi_cardbus_enable +ffffffff825d9580 T bwi_cardbus_disable +ffffffff825d95e0 T bwi_cardbus_setup +ffffffff825d96a0 T bwi_cardbus_conf_read +ffffffff825d96d0 T bwi_cardbus_conf_write +ffffffff825da000 T rbus_pccbb_parent_mem +ffffffff825da060 T rbus_pccbb_parent_io +ffffffff825da0d0 T pccbb_attach_hook +ffffffff825db000 T pcmcia_match +ffffffff825db060 T pcmcia_attach +ffffffff825db0f0 T pcmcia_activate +ffffffff825db1c0 T pcmcia_ccr_read +ffffffff825db220 T pcmcia_ccr_write +ffffffff825db290 T pcmcia_card_attach +ffffffff825db4c0 T pcmcia_print +ffffffff825db790 T pcmcia_submatch +ffffffff825db7e0 T pcmcia_card_detach +ffffffff825db8a0 T pcmcia_card_deactivate +ffffffff825db910 T pcmcia_card_gettype +ffffffff825db970 T pcmcia_function_init +ffffffff825db9d0 T pcmcia_function_enable +ffffffff825dbe50 T pcmcia_function_disable +ffffffff825dbf80 T pcmcia_io_map +ffffffff825dc1f0 T pcmcia_intr_establish +ffffffff825dc4b0 T pcmcia_card_intr +ffffffff825dc5f0 T pcmcia_intr_disestablish +ffffffff825dc840 T pcmcia_intr_string +ffffffff825dd000 T pcmcia_cis_read_1 +ffffffff825dd120 T pcmcia_read_cis +ffffffff825dd220 T pcmcia_scan_cis +ffffffff825df270 T pcmcia_parse_cis_tuple +ffffffff825e0690 T pcmcia_print_cis +ffffffff825e1000 T pcmcia_check_cis_quirks +ffffffff825e2000 T ep_pcmcia_match +ffffffff825e2110 T ep_pcmcia_attach +ffffffff825e25b0 T ep_pcmcia_detach +ffffffff825e2660 T ep_pcmcia_activate +ffffffff825e2760 T ep_pcmcia_lookup +ffffffff825e2870 T ep_pcmcia_enable1 +ffffffff825e2930 T ep_pcmcia_get_enaddr +ffffffff825e3000 T ne_pcmcia_match +ffffffff825e3150 T ne_pcmcia_attach +ffffffff825e3850 T ne_pcmcia_detach +ffffffff825e3930 T ne_pcmcia_activate +ffffffff825e3a50 T ne_pcmcia_get_enaddr +ffffffff825e3c80 T ne_pcmcia_dl10019_get_enaddr +ffffffff825e3f40 T ne_pcmcia_ax88190_set_iobase +ffffffff825e5000 T aic_pcmcia_match +ffffffff825e50b0 T aic_pcmcia_attach +ffffffff825e5300 T aic_pcmcia_detach +ffffffff825e6000 T com_pcmcia_match +ffffffff825e6270 T com_pcmcia_attach +ffffffff825e65c0 T com_pcmcia_detach +ffffffff825e6670 T com_pcmcia_activate +ffffffff825e6750 T com_pcmcia_enable1 +ffffffff825e6810 T com_pcmcia_enable +ffffffff825e6930 T com_pcmcia_disable +ffffffff825e6970 T com_pcmcia_disable1 +ffffffff825e7000 t wdc_pcmcia_match +ffffffff825e70f0 t wdc_pcmcia_attach +ffffffff825e7630 T wdc_pcmcia_detach +ffffffff825e7750 T wdc_pcmcia_activate +ffffffff825e7890 T wdc_pcmcia_disk_device_interface_callback +ffffffff825e7940 T wdc_pcmcia_disk_device_interface +ffffffff825e79b0 T wdc_pcmcia_lookup +ffffffff825e8000 T sm_pcmcia_match +ffffffff825e8100 T sm_pcmcia_attach +ffffffff825e8370 T sm_pcmcia_detach +ffffffff825e8430 T sm_pcmcia_activate +ffffffff825e84d0 T sm_pcmcia_funce_enaddr +ffffffff825e84f0 T sm_pcmcia_ascii_enaddr +ffffffff825e8600 T sm_pcmcia_lannid_ciscallback +ffffffff825e8760 T sm_pcmcia_enable +ffffffff825e8810 T sm_pcmcia_disable +ffffffff825e9000 T xe_pcmcia_match +ffffffff825e9050 T xe_pcmcia_attach +ffffffff825e9730 T xe_pcmcia_detach +ffffffff825e9830 T xe_pcmcia_activate +ffffffff825e9bc0 T xe_pcmcia_interpret_manfid +ffffffff825e9c80 T xe_pcmcia_funce_enaddr +ffffffff825e9ca0 T xe_ioctl +ffffffff825ea090 T xe_start +ffffffff825ea3a0 T xe_watchdog +ffffffff825ea3f0 T xe_intr +ffffffff825ea830 T xe_full_reset +ffffffff825eaf80 T xe_mdi_read +ffffffff825ebbd0 T xe_mdi_write +ffffffff825ec780 T xe_statchg +ffffffff825ec7b0 T xe_mediachange +ffffffff825ec850 T xe_mediastatus +ffffffff825ec8c0 T xe_init +ffffffff825ec930 T xe_stop +ffffffff825ecaa0 T xe_reset +ffffffff825ecc80 T xe_pcmcia_lan_nid_ciscallback +ffffffff825ece30 T xe_pcmcia_manfid_ciscallback +ffffffff825ecf60 T xe_get +ffffffff825ed270 T xe_set_address +ffffffff825ed590 T xe_cycle_power +ffffffff825ee000 T wi_pcmcia_match +ffffffff825ee140 T wi_pcmcia_attach +ffffffff825ee480 T wi_pcmcia_detach +ffffffff825ee560 T wi_pcmcia_activate +ffffffff825ee680 T wi_pcmcia_wakeup +ffffffff825ef000 T malo_pcmcia_match +ffffffff825ef050 T malo_pcmcia_attach +ffffffff825ef280 T malo_pcmcia_detach +ffffffff825ef320 T malo_pcmcia_activate +ffffffff825ef610 T cmalo_intr +ffffffff825ef8d0 T cmalo_attach +ffffffff825eff00 T cmalo_detach +ffffffff825f0000 T cmalo_stop +ffffffff825f0180 T malo_pcmcia_wakeup +ffffffff825f0240 T cmalo_init +ffffffff825f0610 T cmalo_intr_mask +ffffffff825f06b0 T cmalo_fw_alloc +ffffffff825f07a0 T cmalo_fw_load_helper +ffffffff825f0a60 T cmalo_fw_load_main +ffffffff825f0fd0 T cmalo_cmd_get_hwspec +ffffffff825f1160 T cmalo_ioctl +ffffffff825f1610 T cmalo_start +ffffffff825f16b0 T cmalo_watchdog +ffffffff825f16e0 T cmalo_newstate +ffffffff825f1a10 T cmalo_media_change +ffffffff825f1a80 T cmalo_cmd_set_scan +ffffffff825f1c70 T cmalo_fw_free +ffffffff825f1d00 T cmalo_cmd_set_macctrl +ffffffff825f1ea0 T cmalo_cmd_set_txpower +ffffffff825f2030 T cmalo_cmd_set_antenna +ffffffff825f21d0 T cmalo_cmd_set_radio +ffffffff825f2370 T cmalo_cmd_set_channel +ffffffff825f2500 T cmalo_cmd_set_rate +ffffffff825f2750 T cmalo_cmd_set_snmp +ffffffff825f2910 T cmalo_cmd_set_macaddr +ffffffff825f2ac0 T cmalo_wep +ffffffff825f2b70 T cmalo_cmd_set_reset +ffffffff825f2cb0 T cmalo_select_network +ffffffff825f2e00 T cmalo_cmd_set_auth +ffffffff825f2ee0 T cmalo_cmd_set_assoc +ffffffff825f32c0 T cmalo_reflect_network +ffffffff825f33d0 T cmalo_tx_done +ffffffff825f3490 T cmalo_rx +ffffffff825f36e0 T cmalo_cmd_response +ffffffff825f3970 T cmalo_event +ffffffff825f39f0 T cmalo_tx +ffffffff825f3c40 T cmalo_cmd_set_wep +ffffffff825f3ef0 T cmalo_rate2bitmap +ffffffff825f3f30 T cmalo_hexdump +ffffffff825f3f60 T cmalo_cmd_request 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aapic_match +ffffffff825f9040 T aapic_attach +ffffffff825fa000 T hme_config +ffffffff825fa5a0 T hme_stop +ffffffff825fa840 T hme_start +ffffffff825fabd0 T hme_ioctl +ffffffff825fadc0 T hme_watchdog +ffffffff825fae30 t hme_mii_readreg +ffffffff825fb000 t hme_mii_writereg +ffffffff825fb1d0 t hme_mii_statchg +ffffffff825fb270 T hme_mediachange +ffffffff825fb390 T hme_mediastatus +ffffffff825fb410 T hme_mifinit +ffffffff825fb4f0 T hme_tick +ffffffff825fb680 T hme_unconfig +ffffffff825fb7b0 T hme_fill_rx_ring +ffffffff825fb960 T hme_reset +ffffffff825fb9b0 T hme_init +ffffffff825fc000 T hme_meminit +ffffffff825fc160 T hme_iff +ffffffff825fc340 T hme_tint +ffffffff825fc4b0 T hme_rint +ffffffff825fc6b0 T hme_eint +ffffffff825fc760 T hme_intr +ffffffff825fc880 T hme_newbuf +ffffffff825fd000 T hmematch_pci +ffffffff825fd040 T hmeattach_pci +ffffffff825fd390 T hmedetach_pci +ffffffff825fd430 T hme_pci_enaddr +ffffffff825fe000 T isamatch +ffffffff825fe060 T isaattach +ffffffff825fe1d0 T isascan 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fdcresult +ffffffff82601840 T fdcstart +ffffffff82601870 T fdcstatus +ffffffff82602000 T fdprobe +ffffffff826021d0 T fdattach +ffffffff82602340 T fdactivate +ffffffff82602400 T fdgetdisklabel +ffffffff82602540 T fdstrategy +ffffffff826027c0 T fd_motor_on +ffffffff82602830 T fd_motor_off +ffffffff82602920 T fdtimeout +ffffffff826029b0 T fd_nvtotype +ffffffff82602a30 T fdstart +ffffffff82602af0 T fdfinish +ffffffff82602c50 T fdread +ffffffff82602c80 T fdwrite +ffffffff82602cb0 T fd_set_motor +ffffffff82602d70 T fdintr +ffffffff82603cc0 T fdopen +ffffffff82603f30 T fdclose +ffffffff82603fc0 T fdsize +ffffffff82603ff0 T fddump +ffffffff82604020 T fdretry +ffffffff826041e0 T fdioctl +ffffffff82604720 T fdformat +ffffffff82605000 T com_isa_probe +ffffffff826050e0 T com_isa_attach +ffffffff82606000 T pckbc_isa_match +ffffffff82606230 T pckbc_isa_attach +ffffffff82606430 T pckbc_isa_activate +ffffffff82607000 T vga_isa_match +ffffffff82607100 T vga_isa_attach +ffffffff82607150 T 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wsdisplay_burner_setup +ffffffff8261b2b0 T wsdisplay_switch +ffffffff8261b500 T wsmoused +ffffffff8261b620 T wsdisplaymmap +ffffffff8261b6a0 T wsdisplaykqfilter +ffffffff8261b700 T mouse_remove +ffffffff8261b7d0 T wsdisplaystop +ffffffff8261b850 T wsdisplay_emulbell +ffffffff8261b8a0 T wsdisplay_emulinput +ffffffff8261b940 T wsdisplay_kbdinput +ffffffff8261ba60 T wsdisplay_rawkbdinput +ffffffff8261bb00 T wsdisplay_switch3 +ffffffff8261bd10 T wsdisplay_switch1 +ffffffff8261bea0 T wsdisplay_switch2 +ffffffff8261c090 T wsdisplay_reset +ffffffff8261c100 T wsscreen_attach_sync +ffffffff8261c180 T wsscreen_detach_sync +ffffffff8261c1c0 T wsscreen_lookup_sync +ffffffff8261c210 T wsdisplay_maxscreenidx +ffffffff8261c240 T wsdisplay_screenstate +ffffffff8261c290 T wsdisplay_getactivescreen +ffffffff8261c2d0 T wsscreen_switchwait +ffffffff8261c410 T wsdisplay_kbdholdscreen +ffffffff8261c480 T wsdisplay_set_console_kbd +ffffffff8261c4f0 T wsdisplay_set_cons_kbd +ffffffff8261c530 T wsdisplay_unset_cons_kbd +ffffffff8261c580 T wsdisplay_enter_ddb +ffffffff8261c610 T wsdisplay_suspend +ffffffff8261c690 T wsdisplay_suspend_device +ffffffff8261c8f0 T wsdisplay_resume +ffffffff8261c9f0 T wsdisplay_resume_device +ffffffff8261cab0 T wsscrollback +ffffffff8261cb30 T wsdisplay_get_param +ffffffff8261cc80 T wsdisplay_set_param +ffffffff8261cd90 T wsdisplay_brightness_step +ffffffff8261cf40 T wsdisplay_brightness_zero +ffffffff8261d070 T wsdisplay_brightness_cycle +ffffffff8261d0f0 T motion_event +ffffffff8261d1b0 T button_event +ffffffff8261d370 T ctrl_event +ffffffff8261d590 T mouse_moverel +ffffffff8261d6f0 T mouse_zaxis +ffffffff8261d780 T mouse_copy_end +ffffffff8261d7f0 T mouse_copy_selection +ffffffff8261d940 T mouse_copy_start +ffffffff8261dad0 T mouse_copy_word +ffffffff8261def0 T mouse_copy_line +ffffffff8261e070 T mouse_paste +ffffffff8261e120 T mouse_copy_extend_after +ffffffff8261e240 T mouse_copy_extend +ffffffff8261e2e0 T inverse_char +ffffffff8261e400 T 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acpihpet_w +ffffffff827ccc20 T acpihpet_delay +ffffffff827ccd00 T acpihpet_gettime +ffffffff827cd000 T acpiec_match +ffffffff827cd0a0 T acpiec_attach +ffffffff827cd430 T acpiec_wait +ffffffff827cd510 T acpiec_status +ffffffff827cd530 T acpiec_write_data +ffffffff827cd5f0 T acpiec_write_cmd +ffffffff827cd6b0 T acpiec_read_data +ffffffff827cd770 T acpiec_sci_event +ffffffff827cd920 T acpiec_read_1 +ffffffff827cdb40 T acpiec_write_1 +ffffffff827cdd70 T acpiec_burst_enable +ffffffff827cdf00 T acpiec_burst_disable +ffffffff827ce000 T acpiec_read +ffffffff827ce0c0 T acpiec_write +ffffffff827ce180 T acpiec_getcrs +ffffffff827ce3a0 T acpiec_reg +ffffffff827ce480 T acpiec_get_events +ffffffff827ce550 T acpiec_gpehandler +ffffffff827ce690 T acpiec_parse_resources +ffffffff827cf000 T acpitz_match +ffffffff827cf080 T acpitz_attach +ffffffff827cf750 T acpitz_activate +ffffffff827cf7a0 T acpitz_init_perf +ffffffff827cf800 T acpitz_setperf +ffffffff827cf860 T acpitz_init +ffffffff827cfac0 T acpitz_getreading +ffffffff827cfb30 T acpitz_gettempreading +ffffffff827cfcb0 T acpitz_notify +ffffffff827cfd20 T acpitz_setfan +ffffffff827d0080 T acpitz_refresh +ffffffff827d1000 T acpimadt_match +ffffffff827d1070 T acpimadt_attach +ffffffff827d18c0 T acpimadt_validate +ffffffff827d19f0 T acpimadt_cfg_intr +ffffffff827d1a90 T acpimadt_print +ffffffff827d2000 T acpimcfg_match +ffffffff827d2070 T acpimcfg_attach +ffffffff827d3000 T acpiprt_match +ffffffff827d3070 T acpiprt_attach +ffffffff827d31d0 T acpiprt_getpcibus +ffffffff827d3210 T acpiprt_prt_add +ffffffff827d3740 T acpiprt_getirq +ffffffff827d3850 T acpiprt_chooseirq +ffffffff827d3a10 T acpiprt_route_interrupt +ffffffff827d4000 T acpidmar_match +ffffffff827d4090 T acpidmar_attach +ffffffff827d4160 T acpidmar_activate +ffffffff827d4410 T dmar_bdf +ffffffff827d4490 T domain_map_check +ffffffff827d4640 T acpidmar_pci_attach +ffffffff827d4720 T dmar_ptmap +ffffffff827d47a0 T domain_map_pthru +ffffffff827d4830 T domain_map_page_intel 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acpidmar_init +ffffffff827d8700 T acpiivhd_intr +ffffffff827d8800 T ivhd_poll_events +ffffffff827d88e0 T ivhd_intr_map +ffffffff827d89a0 T _dumppte +ffffffff827d8af0 T ivhd_showpage +ffffffff827d8c50 T ivhd_show_event +ffffffff827d95e0 T ivhd_showdte +ffffffff827d96d0 T ivhd_showcmd +ffffffff827d97a0 T _ivhd_issue_command +ffffffff827d98a0 T ivhd_issue_command +ffffffff827d9c20 T ivhd_invalidate_iommu_all +ffffffff827d9d30 T ivhd_invalidate_interrupt_table +ffffffff827d9e50 T ivhd_showreg +ffffffff827d9fe0 T ivhd_checkerr +ffffffff827da280 T ivhd_iommu_init +ffffffff827da840 T acpiivrs_ivhd +ffffffff827da8c0 T acpiivrs_init +ffffffff827daa10 T acpidmar_msi_hwmask +ffffffff827daab0 T acpidmar_msi_hwunmask +ffffffff827dab40 T acpidmar_msi_addroute +ffffffff827dac20 T acpidmar_msi_delroute +ffffffff827dac40 T iommu_showfault +ffffffff827dae10 T iommu_showpte +ffffffff827db000 T acpidock_match +ffffffff827db070 T acpidock_attach +ffffffff827db410 T acpidock_status +ffffffff827db4a0 T acpidock_docklock +ffffffff827db590 T acpidock_dockctl +ffffffff827db680 T acpidock_foundejd +ffffffff827db750 T acpidock_notify +ffffffff827dbcc0 T acpidock_eject +ffffffff827dbdc0 T acpidock_walkchildren +ffffffff827dc000 T abl_match +ffffffff827dc030 T abl_attach +ffffffff827dc280 T abl_get_brightness +ffffffff827dc320 T abl_get_param +ffffffff827dc380 T abl_set_param +ffffffff827dc450 T abl_set_brightness +ffffffff827dd000 T asmc_match +ffffffff827dd050 T asmc_attach +ffffffff827dd700 T asmc_activate +ffffffff827dd790 T asmc_try +ffffffff827ddc20 T asmc_get_backlight +ffffffff827ddca0 T asmc_set_backlight +ffffffff827ddd30 T asmc_backlight +ffffffff827dddd0 T asmc_init +ffffffff827de030 T asmc_update +ffffffff827de1e0 T asmc_detach +ffffffff827de450 t asmc_temp +ffffffff827de600 t asmc_fan +ffffffff827de810 t asmc_light +ffffffff827df000 T acpiasus_match +ffffffff827df030 T acpiasus_attach +ffffffff827df180 T acpiasus_activate +ffffffff827df330 T acpiasus_init +ffffffff827df430 T acpiasus_notify +ffffffff827e0000 T thinkpad_match +ffffffff827e00c0 T thinkpad_attach +ffffffff827e0540 T thinkpad_activate +ffffffff827e06e0 T thinkpad_sensor_attach +ffffffff827e0890 T thinkpad_get_temp +ffffffff827e0940 T thinkpad_sensor_refresh +ffffffff827e0ae0 T thinkpad_get_volume_mute +ffffffff827e0b50 T thinkpad_attach_deferred +ffffffff827e0b70 T thinkpad_enable_events +ffffffff827e0d70 T thinkpad_get_kbd_backlight +ffffffff827e0e00 T thinkpad_set_kbd_backlight +ffffffff827e0ee0 T thinkpad_get_param +ffffffff827e0f40 T thinkpad_set_param +ffffffff827e1000 T thinkpad_battery_setchargestart +ffffffff827e1150 T thinkpad_battery_setchargestop +ffffffff827e12c0 T thinkpad_battery_setchargemode +ffffffff827e18e0 T thinkpad_hotkey +ffffffff827e1fa0 T thinkpad_brightness_up +ffffffff827e2170 T thinkpad_brightness_down +ffffffff827e2330 T thinkpad_toggle_bluetooth +ffffffff827e2460 T thinkpad_volume_mute +ffffffff827e2520 T thinkpad_volume_down +ffffffff827e25e0 T thinkpad_volume_up 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T glkgpio_read_pin +ffffffff827ed560 T glkgpio_write_pin +ffffffff827ed5e0 T glkgpio_intr_establish +ffffffff827ed720 T glkgpio_intr_enable +ffffffff827ed7b0 T glkgpio_intr_disable +ffffffff827ee000 T pchgpio_match +ffffffff827ee060 T pchgpio_attach +ffffffff827ee660 T pchgpio_activate +ffffffff827ee710 T pchgpio_intr +ffffffff827ee960 T pchgpio_read_pin +ffffffff827eea50 T pchgpio_write_pin +ffffffff827eeb70 T pchgpio_intr_establish +ffffffff827eedc0 T pchgpio_intr_enable +ffffffff827eef00 T pchgpio_intr_disable +ffffffff827ef040 T pchgpio_save +ffffffff827ef0b0 T pchgpio_restore +ffffffff827ef120 T pchgpio_find_group +ffffffff827ef1a0 T pchgpio_intr_handle +ffffffff827ef2a0 T pchgpio_save_pin +ffffffff827ef480 T pchgpio_restore_pin +ffffffff827f0000 T tipmic_match +ffffffff827f0060 T tipmic_attach +ffffffff827f02c0 T tipmic_write_1 +ffffffff827f03a0 T tipmic_intr +ffffffff827f0550 T tipmic_get_lpat +ffffffff827f0690 T tipmic_read_pin +ffffffff827f06c0 T tipmic_write_pin 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+ffffffff827f45f0 T sdhc_acpi_explore +ffffffff827f4620 T sdhc_acpi_card_detect_nonremovable +ffffffff827f4650 T sdhc_acpi_do_explore +ffffffff827f5000 T dwiic_acpi_match +ffffffff827f5050 T dwiic_acpi_attach +ffffffff827f54f0 T dwiic_acpi_parse_crs +ffffffff827f5650 T dwiic_acpi_power +ffffffff827f5780 T dwiic_acpi_get_params +ffffffff827f5900 T dwiic_i2c_intr_establish +ffffffff827f5990 T dwiic_i2c_intr_disestablish +ffffffff827f59b0 T dwiic_i2c_intr_string +ffffffff827f5a40 T dwiic_acpi_acquire_bus +ffffffff827f5aa0 T dwiic_acpi_release_bus +ffffffff827f5ae0 T dwiic_acpi_bus_scan +ffffffff827f5b20 T dwiic_acpi_found_hid +ffffffff827f5f10 T dwiic_matchhids +ffffffff827f5fa0 T dwiic_acpi_found_ihidev +ffffffff827f6280 T dwiic_acpi_found_iatp +ffffffff827f6400 T dwiic_acpi_found_ietp +ffffffff827f7000 T acpicbkbd_match +ffffffff827f7030 T acpicbkbd_attach +ffffffff827f70e0 T acpicbkbd_activate +ffffffff827f7140 T acpicbkbd_get_backlight +ffffffff827f71c0 T acpicbkbd_set_backlight +ffffffff827f7270 T acpicbkbd_write_backlight +ffffffff827f8000 T acpials_match +ffffffff827f8090 T acpials_attach +ffffffff827f8280 T acpials_read +ffffffff827f8310 T acpials_addtask +ffffffff827f8350 T acpials_notify +ffffffff827f83e0 T acpials_update +ffffffff827f9000 T tpm_match +ffffffff827f9050 T tpm_attach +ffffffff827f93a0 T tpm_activate +ffffffff827f93f0 T tpm2_start_method +ffffffff827f9480 T tpm_probe +ffffffff827f9570 T tpm_init_tis +ffffffff827f9840 T tpm_init_crb +ffffffff827f9c30 T tpm_suspend +ffffffff827f9d60 T tpm_resume +ffffffff827f9d90 T tpm_write_tis +ffffffff827fa1e0 T tpm_read_tis +ffffffff827fa3f0 T tpm_write_crb +ffffffff827fa8c0 T tpm_read_crb +ffffffff827fac60 T tpm_request_locality_tis +ffffffff827fad80 T tpm_request_locality_crb +ffffffff827faec0 T tpm_release_locality_crb +ffffffff827faf20 T tpm_release_locality_tis +ffffffff827faf90 T tpm_getburst +ffffffff827fb050 T tpm_status +ffffffff827fb070 T tpm_waitfor +ffffffff827fb160 T tpm_waitfor_status +ffffffff827fc000 T acpihve_match +ffffffff827fc0d0 T acpihve_attach +ffffffff827fd000 T acpisbs_match +ffffffff827fd030 T acpisbs_attach +ffffffff827fd320 T acpisbs_activate +ffffffff827fd410 T acpisbs_read +ffffffff827fd4e0 T acpisbs_setup_sensors +ffffffff827fd610 T acpisbs_refresh_sensors +ffffffff827fd760 T acpisbs_notify +ffffffff827fd8c0 T acpi_smbus_read +ffffffff827fe000 T surface_match +ffffffff827fe060 T surface_attach +ffffffff827fe0c0 T surface_hotkey +ffffffff827ff000 T ipmi_acpi_match +ffffffff827ff030 T ipmi_acpi_attach +ffffffff827ff2b0 T ipmi_acpi_parse_crs +ffffffff82800000 T amdgpio_match +ffffffff82800060 T amdgpio_attach +ffffffff82800330 T amdgpio_activate +ffffffff82800430 T amdgpio_intr +ffffffff82800610 T amdgpio_read_pin +ffffffff82800670 T amdgpio_write_pin +ffffffff828006f0 T amdgpio_intr_establish +ffffffff828007f0 T amdgpio_intr_enable +ffffffff82800880 T amdgpio_intr_disable +ffffffff82800910 T amdgpio_save +ffffffff828009a0 T amdgpio_restore +ffffffff82800a40 T amdgpio_save_pin +ffffffff82800ab0 T amdgpio_restore_pin +ffffffff82800b20 T amdgpio_pin_intr +ffffffff82801000 T acpihid_match +ffffffff82801030 T acpihid_attach +ffffffff82801270 T acpihid_init_dsm +ffffffff82801400 T acpihid_eval +ffffffff82801650 T acpihid_notify +ffffffff828016c0 T acpihid_button_array_enable +ffffffff82802000 t iosf_acpi_match +ffffffff82802050 t iosf_acpi_attach +ffffffff82802170 t iosf_acpi_mbi_mdr_rd +ffffffff828021f0 t iosf_acpi_mbi_mdr_wr +ffffffff82803000 T intelpmc_match +ffffffff82803030 T intelpmc_attach +ffffffff82803110 T intelpmc_activate +ffffffff82803320 T intelpmc_parse_lpit +ffffffff82803490 T intelpmc_suspend +ffffffff82803840 T intelpmc_resume +ffffffff82803bf0 T intelpmc_dsm +ffffffff82804000 T acpi_match +ffffffff82804070 T acpi_attach +ffffffff828040b0 T acpi_probe +ffffffff828042a0 T acpi_map +ffffffff828043b0 T acpi_unmap +ffffffff82804400 T acpi_bus_space_map +ffffffff82804420 T acpi_bus_space_unmap +ffffffff82804440 T acpi_intr_establish +ffffffff828045a0 T acpi_intr_disestablish +ffffffff828045b0 T acpi_scan +ffffffff82804780 T acpi_acquire_glk +ffffffff828047e0 T acpi_release_glk +ffffffff82804830 T acpi_attach_machdep +ffffffff82804a10 T acpi_sleep_cpu +ffffffff82804bd0 T acpi_resume_cpu +ffffffff82804d20 T sleep_mp +ffffffff82804e20 T resume_mp +ffffffff82804f20 T acpi_iommu_device_map +ffffffff82805000 T hibernate_resume_machdep +ffffffff82805050 T hibernate_drop_to_real_mode +ffffffff82805060 T hibernate_activate_resume_pt_machdep +ffffffff828050a0 T hibernate_switch_stack_machdep +ffffffff828050e0 T hibernate_flush +ffffffff82805110 T acpi_savecpu +ffffffff82806000 T sleep_showstate +ffffffff82806110 T sleep_setstate +ffffffff82806170 T gosleep +ffffffff82806340 T sleep_resume +ffffffff828063d0 T suspend_finish +ffffffff82807000 T acpiopen +ffffffff828070d0 T acpiclose +ffffffff82807170 T acpiioctl +ffffffff82807300 T request_sleep +ffffffff82807390 T acpi_filtdetach +ffffffff828073f0 T acpi_filtread +ffffffff82807430 T acpikqfilter +ffffffff82808000 T acpipci_match +ffffffff82808030 T acpipci_attach +ffffffff82808370 T acpipci_osc +ffffffff828084e0 T acpipci_parse_resources +ffffffff82808610 T acpipci_attach_bus +ffffffff82808820 T acpipci_print +ffffffff828088a0 T acpipci_attach_busses +ffffffff82809000 T efiopen +ffffffff82809040 T eficlose +ffffffff82809070 T efiioctl +ffffffff82809110 T efiioc_get_table +ffffffff82809280 T efiioc_var_get +ffffffff82809530 T efiioc_var_next +ffffffff82809760 T efiioc_var_set +ffffffff82809a10 T efi_adapt_error +ffffffff8280a000 T efi_match +ffffffff8280a070 T efi_attach +ffffffff8280a390 T efi_map_runtime +ffffffff8280a520 T efi_enter +ffffffff8280a5d0 T efi_leave +ffffffff8280a660 T efi_fault +ffffffff8280b000 T vmm_probe +ffffffff8280b060 T vmm_attach +ffffffff8280b1b0 T vmm_activate +ffffffff8280b340 T vmmopen +ffffffff8280b390 T vmmclose +ffffffff8280b3c0 T vm_find +ffffffff8280b500 T vmmioctl +ffffffff8280b840 T vm_create +ffffffff8280bbb0 T vm_get_info +ffffffff8280be60 T vm_terminate +ffffffff8280c010 T vm_resetcpu +ffffffff8280c140 T vm_share_mem +ffffffff8280c2b0 T pledge_ioctl_vmm +ffffffff8280c3a0 T vm_find_vcpu +ffffffff8280c400 T vm_create_check_mem_ranges +ffffffff8280c5c0 T vm_teardown +ffffffff8280c740 T vcpu_must_stop +ffffffff8280d000 T vmm_enabled +ffffffff8280d080 T vmm_attach_machdep +ffffffff8280d260 T vmm_quiesce_vmx +ffffffff8280d470 T vmm_activate_machdep +ffffffff8280d510 T vmm_stop +ffffffff8280d680 T vmm_start +ffffffff8280d7a0 T vmmioctl_machdep +ffffffff8280d880 T vm_intr_pending +ffffffff8280d940 T pledge_ioctl_vmm_machdep +ffffffff8280d980 T vm_rwvmparams +ffffffff8280db30 T vmm_init_pvclock +ffffffff8280dc10 T vm_rwregs +ffffffff8280dd50 T vcpu_readregs_vmx +ffffffff8280e230 T vcpu_writeregs_vmx +ffffffff8280e770 T vcpu_readregs_svm +ffffffff8280ec20 T vcpu_writeregs_svm +ffffffff8280f0f0 T vmx_pmap_find_pte_ept +ffffffff8280f1c0 T start_vmm_on_cpu +ffffffff8280f300 T stop_vmm_on_cpu +ffffffff8280f3a0 T vmclear_on_cpu +ffffffff8280f420 T vm_impl_init +ffffffff8280f5b0 T vm_impl_deinit +ffffffff8280f5e0 T vcpu_reload_vmcs_vmx +ffffffff8280f760 T vcpu_reset_regs_svm +ffffffff8280fa30 T svm_setmsrbrw +ffffffff8280fb40 T svm_setmsrbr +ffffffff8280fc10 T svm_setmsrbw +ffffffff8280fcf0 T vmx_setmsrbr +ffffffff8280fda0 T vmx_setmsrbw +ffffffff8280fe50 T vmx_setmsrbrw +ffffffff8280ff60 T svm_set_clean +ffffffff8280ffb0 T svm_set_dirty +ffffffff82810000 T vcpu_reset_regs_vmx +ffffffff82810a70 T vcpu_vmx_check_cap +ffffffff82810b70 T vcpu_vmx_compute_ctrl +ffffffff82810d50 T vcpu_init_vmx +ffffffff82811260 T vmm_alloc_vpid +ffffffff82811380 T vcpu_deinit_vmx +ffffffff828114b0 T vcpu_reset_regs +ffffffff82811530 T vcpu_init_svm +ffffffff82811840 T vcpu_deinit_svm +ffffffff828119b0 T vcpu_init +ffffffff82811a80 T vmm_free_vpid +ffffffff82811af0 T vcpu_deinit +ffffffff82811b30 T vm_run +ffffffff82811d30 T vcpu_run_vmx +ffffffff82812810 T vcpu_run_svm +ffffffff82812ee0 T vmm_fpurestore +ffffffff82812fb0 T vmm_fpusave +ffffffff82813040 T vmm_translate_gva +ffffffff82813370 T vmm_update_pvclock +ffffffff82813480 T vmx_get_exit_info +ffffffff82813500 T vmx_handle_exit +ffffffff82813970 T vmx_instruction_error_decode +ffffffff82813b40 T vmm_get_guest_cpu_cpl +ffffffff82813c60 T vmx_handle_intr +ffffffff82813d00 T svm_handle_hlt +ffffffff82813d50 T vmx_handle_hlt +ffffffff82813e20 T svm_handle_exit +ffffffff828141a0 T svm_handle_np_fault +ffffffff82814340 T vmm_handle_cpuid +ffffffff82814a20 T svm_handle_msr +ffffffff82814d10 T svm_handle_xsetbv +ffffffff82814dd0 T svm_handle_inout +ffffffff82814ee0 T vmm_inject_ud +ffffffff82814f20 T vmm_inject_db +ffffffff82814f60 T vmx_handle_np_fault +ffffffff828150e0 T vmx_handle_inout +ffffffff82815280 T vmx_handle_cr +ffffffff828154c0 T vmx_handle_rdmsr +ffffffff828155c0 T vmx_handle_wrmsr +ffffffff82815870 T vmx_handle_xsetbv +ffffffff82815970 T vmm_inject_gp +ffffffff828159b0 T vmm_get_guest_memtype +ffffffff82815a30 T vmx_get_exit_qualification +ffffffff82815aa0 T vmx_get_guest_faulttype +ffffffff82815b50 T svm_get_guest_faulttype +ffffffff82815b80 T svm_fault_page +ffffffff82815c10 T vmx_fault_page +ffffffff82815d90 T vmm_get_guest_cpu_mode +ffffffff82815ea0 T vmx_load_pdptes +ffffffff828161c0 T vmx_handle_cr0_write +ffffffff82816420 T vmx_handle_cr4_write +ffffffff828164e0 T vmm_handle_xsetbv +ffffffff82816590 T vmx_handle_misc_enable_msr +ffffffff828165f0 T vmm_pat_is_valid +ffffffff828166d0 t vmm_handle_cpuid_0xd +ffffffff828167d0 T vmm_gpa_is_valid +ffffffff82816840 T vmx_exit_reason_decode +ffffffff82816880 T svm_exit_reason_decode +ffffffff82817690 T vcpu_state_decode +ffffffff82818000 T vmm_dispatch_intr +ffffffff82818030 T vmxon +ffffffff82818060 T vmxoff +ffffffff82818090 T vmclear +ffffffff828180c0 T vmptrld +ffffffff828180f0 T vmptrst +ffffffff82818120 T vmwrite +ffffffff82818150 T vmread +ffffffff82818180 T invvpid +ffffffff8281819b t invvpid_fail +ffffffff828181a2 t invvpid_ret +ffffffff828181c0 T invept +ffffffff828181db t invept_fail +ffffffff828181e2 t invept_ret +ffffffff82818200 T vmx_enter_guest +ffffffff8281822b t skip_init +ffffffff82818298 t no_l1df_msr +ffffffff8281829b t l1df_tlb_loop +ffffffff828182b4 t l1df_tlb_done +ffffffff828182bc t l1df_load_cache +ffffffff828182d3 t done_flush +ffffffff82818366 t do_resume +ffffffff828183eb t fail_launch_or_resume +ffffffff8281842d t fail_launch_unknown +ffffffff8281843a t fail_launch_invalid_vmcs +ffffffff82818447 t fail_launch_valid_vmcs +ffffffff82818464 t vmx_exit_handler_asm +ffffffff82818529 t restore_host +ffffffff82818550 T svm_enter_guest +ffffffff828186d2 t restore_host_svm +ffffffff82819000 T sdmmc_match +ffffffff82819060 T sdmmc_attach +ffffffff82819400 T sdmmc_detach +ffffffff828194c0 T sdmmc_activate +ffffffff82819580 T sdmmc_discover_task +ffffffff82819670 T sdmmc_create_thread +ffffffff828196e0 T sdmmc_holds_root_device +ffffffff82819740 T sdmmc_task_thread +ffffffff828199c0 T sdmmc_needs_discover +ffffffff82819a90 T sdmmc_del_task +ffffffff82819b50 T sdmmc_card_detach +ffffffff82819c60 T sdmmc_add_task +ffffffff82819cf0 T sdmmc_card_attach +ffffffff82819e60 T sdmmc_enable +ffffffff82819ff0 T sdmmc_scan +ffffffff8281a090 T sdmmc_init +ffffffff8281a1c0 T sdmmc_disable +ffffffff8281a350 T sdmmc_function_free +ffffffff8281a370 T sdmmc_delay +ffffffff8281a3c0 T sdmmc_select_card +ffffffff8281a600 T sdmmc_set_bus_power +ffffffff8281a7c0 T sdmmc_function_alloc +ffffffff8281a860 T sdmmc_app_command +ffffffff8281aa20 T sdmmc_mmc_command +ffffffff8281aab0 T sdmmc_go_idle_state +ffffffff8281abe0 T sdmmc_send_if_cond +ffffffff8281ad50 T sdmmc_set_relative_addr +ffffffff8281b000 T sdmmc_cisptr +ffffffff8281b0d0 T sdmmc_read_cis +ffffffff8281b4b0 T sdmmc_print_cis +ffffffff8281b6a0 T sdmmc_check_cis_quirks +ffffffff8281c000 T sdmmc_io_enable +ffffffff8281c2f0 T sdmmc_io_reset +ffffffff8281c450 T sdmmc_io_send_op_cond +ffffffff8281c5e0 T sdmmc_io_scan +ffffffff8281c760 T sdmmc_io_init +ffffffff8281c8d0 T sdmmc_io_set_highspeed +ffffffff8281cbd0 T sdmmc_io_set_bus_width +ffffffff8281cec0 T sdmmc_io_function_ready +ffffffff8281d070 T sdmmc_io_read_1 +ffffffff8281d1f0 T sdmmc_io_function_enable +ffffffff8281d690 T sdmmc_io_write_1 +ffffffff8281d830 T sdmmc_io_function_disable +ffffffff8281db10 T sdmmc_io_attach +ffffffff8281dc00 T sdmmc_print +ffffffff8281dec0 T sdmmc_submatch +ffffffff8281df50 T sdmmc_io_detach +ffffffff8281e010 T sdmmc_io_rw_direct +ffffffff8281e1e0 T sdmmc_io_rw_extended_subr +ffffffff8281e390 T sdmmc_io_rw_extended +ffffffff8281e7d0 T sdmmc_io_read_2 +ffffffff8281e940 T sdmmc_io_write_2 +ffffffff8281eac0 T sdmmc_io_read_4 +ffffffff8281ec30 T sdmmc_io_write_4 +ffffffff8281edb0 T sdmmc_io_read_multi_1 +ffffffff8281eeb0 T sdmmc_io_write_multi_1 +ffffffff8281efb0 T sdmmc_io_read_region_1 +ffffffff8281f0b0 T sdmmc_io_write_region_1 +ffffffff8281f1b0 T sdmmc_io_xchg +ffffffff8281f370 T sdmmc_intr_enable +ffffffff8281f650 T sdmmc_intr_disable +ffffffff8281f930 T sdmmc_intr_establish +ffffffff8281fa50 T sdmmc_intr_disestablish +ffffffff8281fb50 T sdmmc_card_intr +ffffffff8281fba0 T sdmmc_intr_task +ffffffff8281fc60 T sdmmc_io_set_blocklen +ffffffff82820000 T sdmmc_mem_enable +ffffffff828204d0 T sdmmc_mem_send_op_cond +ffffffff828206b0 T sdmmc_mem_signal_voltage +ffffffff828207b0 T sdmmc_mem_scan +ffffffff82820b00 T sdmmc_decode_csd +ffffffff82820f50 T sdmmc_decode_cid +ffffffff82821400 T sdmmc_mem_send_scr +ffffffff82821560 T sdmmc_mem_decode_scr +ffffffff828215c0 T sdmmc_mem_send_cxd_data +ffffffff82821740 T sdmmc_mem_set_bus_width +ffffffff82821870 T sdmmc_mem_sd_switch +ffffffff82821b30 T sdmmc_be512_to_bitfield512 +ffffffff82821be0 T sdmmc_mem_mmc_switch +ffffffff82821cd0 T sdmmc_mem_init +ffffffff82821e60 T sdmmc_mem_set_blocklen +ffffffff82821f70 T sdmmc_mem_sd_init +ffffffff828223e0 T sdmmc_mem_mmc_init +ffffffff82822b60 T sdmmc_mem_select_transfer_mode +ffffffff82822be0 T sdmmc_mem_execute_tuning +ffffffff82822c70 T sdmmc_mem_read_block_subr +ffffffff82823000 T sdmmc_mem_single_read_block +ffffffff828230d0 T sdmmc_mem_read_block +ffffffff828232e0 T sdmmc_mem_write_block_subr +ffffffff82823660 T sdmmc_mem_single_write_block +ffffffff82823730 T sdmmc_mem_write_block +ffffffff82823940 T sdmmc_mem_hibernate_write +ffffffff82824000 T sdmmc_scsi_cmd +ffffffff82824200 T sdmmc_minphys +ffffffff82824280 T sdmmc_scsi_attach +ffffffff828244c0 T sdmmc_alloc_ccbs +ffffffff82824620 T sdmmc_free_ccbs +ffffffff82824680 T sdmmc_scsi_detach +ffffffff82824840 T sdmmc_stimeout +ffffffff828248e0 T sdmmc_ccb_alloc +ffffffff828249a0 T sdmmc_ccb_free +ffffffff82824aa0 T sdmmc_inquiry +ffffffff82824d30 T sdmmc_start_xs +ffffffff82824e50 T sdmmc_complete_xs +ffffffff82824f40 T sdmmc_done_xs +ffffffff82824f90 T sdmmc_scsi_hibernate_io +ffffffff82826000 T bwfm_sdio_preinit +ffffffff828265a0 T bwfm_sdio_txcheck +ffffffff828265e0 T bwfm_sdio_txdata +ffffffff82826660 T bwfm_sdio_txctl +ffffffff828267f0 T bwfm_sdio_buscore_read +ffffffff82826800 T bwfm_sdio_buscore_write +ffffffff82826820 T bwfm_sdio_buscore_prepare +ffffffff828269a0 T bwfm_sdio_buscore_activate +ffffffff82826a30 T bwfm_sdio_match +ffffffff82826ae0 T bwfm_sdio_attach +ffffffff82826e80 T bwfm_sdio_detach +ffffffff82826f00 T bwfm_sdio_task +ffffffff828270c0 T bwfm_sdio_write_1 +ffffffff828270f0 T bwfm_sdio_read_1 +ffffffff82827120 T bwfm_sdio_write_4 +ffffffff828271f0 T bwfm_sdio_read_4 +ffffffff828272b0 T bwfm_sdio_load_microcode +ffffffff828275a0 T bwfm_sdio_clkctl +ffffffff828276d0 T bwfm_sdio_dev_write +ffffffff82827720 T bwfm_sdio_intr +ffffffff82827770 T bwfm_sdio_ram_read_write +ffffffff828279f0 T bwfm_sdio_htclk +ffffffff82827cb0 T bwfm_sdio_readshared +ffffffff82827da0 T bwfm_sdio_dev_read +ffffffff82827de0 T bwfm_sdio_rx_frames +ffffffff82828210 T bwfm_sdio_tx_frames +ffffffff82828330 T bwfm_sdio_backplane +ffffffff82828400 T bwfm_sdio_buf_read +ffffffff82828500 T bwfm_sdio_buf_write +ffffffff828285d0 T bwfm_sdio_frame_read_write +ffffffff82828780 T bwfm_sdio_newbuf +ffffffff82828810 T bwfm_sdio_tx_ok +ffffffff82828870 T bwfm_sdio_tx_ctrlframe +ffffffff82828980 T bwfm_sdio_tx_dataframe +ffffffff82828af0 T bwfm_sdio_rx_glom +ffffffff82829000 T onewire_match +ffffffff82829060 T onewire_attach +ffffffff82829120 T onewire_detach +ffffffff82829190 T onewire_activate +ffffffff828291b0 T onewire_scan +ffffffff82829400 T onewire_createthread +ffffffff82829470 T onewire_print +ffffffff82829560 T onewirebus_print +ffffffff828295b0 T onewire_lock +ffffffff828295d0 T onewire_unlock +ffffffff828295f0 T onewire_reset +ffffffff82829610 T onewire_bit +ffffffff82829630 T onewire_read_byte +ffffffff828297c0 T onewire_write_byte +ffffffff828298d0 T onewire_read_block +ffffffff82829970 T onewire_write_block +ffffffff82829a10 T onewire_triplet +ffffffff82829b20 T onewire_matchrom +ffffffff82829d10 T onewire_search +ffffffff8282a180 T onewire_thread +ffffffff8282b000 T onewire_crc +ffffffff8282b0b0 T onewire_crc16 +ffffffff8282b170 T onewire_famname +ffffffff8282b1b0 T onewire_matchbyfam +ffffffff8282c000 T owid_match +ffffffff8282c030 T owid_attach +ffffffff8282c120 T owid_detach +ffffffff8282c170 T owid_activate +ffffffff8282d000 T owsbm_match +ffffffff8282d030 T owsbm_attach +ffffffff8282d240 T owsbm_detach +ffffffff8282d2d0 T owsbm_activate +ffffffff8282d300 T owsbm_update +ffffffff8282e000 T owtemp_match +ffffffff8282e030 T owtemp_attach +ffffffff8282e160 T owtemp_detach +ffffffff8282e1f0 T owtemp_activate +ffffffff8282e220 T owtemp_update +ffffffff8282f000 T owctr_match +ffffffff8282f030 T owctr_attach +ffffffff8282f1c0 T owctr_detach +ffffffff8282f250 T owctr_activate +ffffffff8282f280 T owctr_update +ffffffff8282f2c0 T owctr_update_counter +ffffffff82830000 A __text_page_start +ffffffff82830000 T Xsyscall_meltdown +ffffffff8283000c T Xsyscall +ffffffff82830299 t Xsyscall_trampback +ffffffff828302b0 T intr_user_exit +ffffffff828302f2 t intr_user_exit_post_ast +ffffffff8283044b t Xiretq_trampback +ffffffff82830457 T doreti_iret +ffffffff82831000 T alltraps +ffffffff82831138 T recall_trap +ffffffff82831150 T alltraps_kern +ffffffff82831153 T alltraps_kern_meltdown +ffffffff82832000 ? Xtrap00 +ffffffff82832000 A __kutext_start +ffffffff82832000 A __text_page_end +ffffffff82832010 ? Xtrap01 +ffffffff82832020 ? Xtrap02 +ffffffff82832028 c calltrap_specstk +ffffffff828320f0 ? calltrap_specstk_tramp +ffffffff82832110 ? Xtrap03 +ffffffff82832120 ? Xtrap04 +ffffffff82832130 ? Xtrap05 +ffffffff82832140 ? Xtrap06 +ffffffff82832150 ? Xtrap07 +ffffffff82832160 ? Xtrap08 +ffffffff82832170 ? Xtrap09 +ffffffff82832180 ? Xtrap0a +ffffffff82832190 ? Xtrap0b +ffffffff828321a0 ? Xtrap0c +ffffffff828321b0 ? Xtrap0d +ffffffff82832240 ? Xtrap0e +ffffffff82832250 ? Xintrspurious +ffffffff82832250 ? Xtrap0f +ffffffff82832260 ? Xtrap10 +ffffffff82832270 ? Xtrap11 +ffffffff82832280 ? Xtrap12 +ffffffff82832290 ? Xtrap13 +ffffffff828322a0 ? Xtrap14 +ffffffff828322b0 ? Xtrap15 +ffffffff828322c0 ? Xtrap16 +ffffffff828322c0 ? Xtrap17 +ffffffff828322c0 ? Xtrap18 +ffffffff828322c0 ? Xtrap19 +ffffffff828322c0 ? Xtrap1a +ffffffff828322c0 ? Xtrap1b +ffffffff828322c0 ? Xtrap1c +ffffffff828322c0 ? Xtrap1d +ffffffff828322c0 ? Xtrap1e +ffffffff828322c0 ? Xtrap1f +ffffffff828322d0 ? x2apic_eoi +ffffffff828322f0 ? Xintr_lapic_ipi +ffffffff82832330 ? Xipi_invltlb +ffffffff82832360 ? Xipi_invept +ffffffff828323a0 ? Xipi_invlpg +ffffffff828323d0 ? Xipi_invlrange +ffffffff82832410 ? Xipi_invltlb_pcid +ffffffff82832450 ? Xipi_invlpg_pcid +ffffffff828324a0 ? Xipi_invlrange_pcid +ffffffff82832510 ? Xintr_lapic_ltimer +ffffffff82832550 ? Xintr_xen_upcall +ffffffff82832590 ? Xintr_hyperv_upcall +ffffffff828325d0 ? Xintr_legacy0 +ffffffff82832610 ? Xintr_legacy1 +ffffffff82832650 ? Xintr_legacy2 +ffffffff82832690 ? Xintr_legacy3 +ffffffff828326d0 ? Xintr_legacy4 +ffffffff82832710 ? Xintr_legacy5 +ffffffff82832750 ? Xintr_legacy6 +ffffffff82832790 ? Xintr_legacy7 +ffffffff828327d0 ? Xintr_legacy8 +ffffffff82832810 ? Xintr_legacy9 +ffffffff82832850 ? Xintr_legacy10 +ffffffff82832890 ? Xintr_legacy11 +ffffffff828328d0 ? Xintr_legacy12 +ffffffff82832910 ? Xintr_legacy13 +ffffffff82832950 ? Xintr_legacy14 +ffffffff82832990 ? Xintr_legacy15 +ffffffff828329d0 ? Xintr_ioapic_edge0 +ffffffff82832a10 ? Xintr_ioapic_edge1 +ffffffff82832a50 ? Xintr_ioapic_edge2 +ffffffff82832a90 ? Xintr_ioapic_edge3 +ffffffff82832ad0 ? Xintr_ioapic_edge4 +ffffffff82832b10 ? Xintr_ioapic_edge5 +ffffffff82832b50 ? Xintr_ioapic_edge6 +ffffffff82832b90 ? Xintr_ioapic_edge7 +ffffffff82832bd0 ? Xintr_ioapic_edge8 +ffffffff82832c10 ? Xintr_ioapic_edge9 +ffffffff82832c50 ? Xintr_ioapic_edge10 +ffffffff82832c90 ? Xintr_ioapic_edge11 +ffffffff82832cd0 ? Xintr_ioapic_edge12 +ffffffff82832d10 ? Xintr_ioapic_edge13 +ffffffff82832d50 ? Xintr_ioapic_edge14 +ffffffff82832d90 ? Xintr_ioapic_edge15 +ffffffff82832dd0 ? Xintr_ioapic_edge16 +ffffffff82832e10 ? Xintr_ioapic_edge17 +ffffffff82832e50 ? Xintr_ioapic_edge18 +ffffffff82832e90 ? Xintr_ioapic_edge19 +ffffffff82832ed0 ? Xintr_ioapic_edge20 +ffffffff82832f10 ? Xintr_ioapic_edge21 +ffffffff82832f50 ? Xintr_ioapic_edge22 +ffffffff82832f90 ? Xintr_ioapic_edge23 +ffffffff82832fd0 ? Xintr_ioapic_edge24 +ffffffff82833010 ? Xintr_ioapic_edge25 +ffffffff82833050 ? Xintr_ioapic_edge26 +ffffffff82833090 ? Xintr_ioapic_edge27 +ffffffff828330d0 ? Xintr_ioapic_edge28 +ffffffff82833110 ? Xintr_ioapic_edge29 +ffffffff82833150 ? Xintr_ioapic_edge30 +ffffffff82833190 ? Xintr_ioapic_edge31 +ffffffff828331d0 ? Xintr_ioapic_edge32 +ffffffff82833210 ? Xintr_ioapic_edge33 +ffffffff82833250 ? Xintr_ioapic_edge34 +ffffffff82833290 ? Xintr_ioapic_edge35 +ffffffff828332d0 ? Xintr_ioapic_edge36 +ffffffff82833310 ? Xintr_ioapic_edge37 +ffffffff82833350 ? Xintr_ioapic_edge38 +ffffffff82833390 ? Xintr_ioapic_edge39 +ffffffff828333d0 ? Xintr_ioapic_edge40 +ffffffff82833410 ? Xintr_ioapic_edge41 +ffffffff82833450 ? Xintr_ioapic_edge42 +ffffffff82833490 ? Xintr_ioapic_edge43 +ffffffff828334d0 ? Xintr_ioapic_edge44 +ffffffff82833510 ? Xintr_ioapic_edge45 +ffffffff82833550 ? Xintr_ioapic_edge46 +ffffffff82833590 ? Xintr_ioapic_edge47 +ffffffff828335d0 ? Xintr_ioapic_edge48 +ffffffff82833610 ? Xintr_ioapic_edge49 +ffffffff82833650 ? Xintr_ioapic_edge50 +ffffffff82833690 ? Xintr_ioapic_edge51 +ffffffff828336d0 ? Xintr_ioapic_edge52 +ffffffff82833710 ? Xintr_ioapic_edge53 +ffffffff82833750 ? Xintr_ioapic_edge54 +ffffffff82833790 ? Xintr_ioapic_edge55 +ffffffff828337d0 ? Xintr_ioapic_edge56 +ffffffff82833810 ? Xintr_ioapic_edge57 +ffffffff82833850 ? Xintr_ioapic_edge58 +ffffffff82833890 ? Xintr_ioapic_edge59 +ffffffff828338d0 ? Xintr_ioapic_edge60 +ffffffff82833910 ? Xintr_ioapic_edge61 +ffffffff82833950 ? Xintr_ioapic_edge62 +ffffffff82833990 ? Xintr_ioapic_edge63 +ffffffff828339d0 ? Xintr_ioapic_level0 +ffffffff82833a10 ? Xintr_ioapic_level1 +ffffffff82833a50 ? Xintr_ioapic_level2 +ffffffff82833a90 ? Xintr_ioapic_level3 +ffffffff82833ad0 ? Xintr_ioapic_level4 +ffffffff82833b10 ? Xintr_ioapic_level5 +ffffffff82833b50 ? Xintr_ioapic_level6 +ffffffff82833b90 ? Xintr_ioapic_level7 +ffffffff82833bd0 ? Xintr_ioapic_level8 +ffffffff82833c10 ? Xintr_ioapic_level9 +ffffffff82833c50 ? Xintr_ioapic_level10 +ffffffff82833c90 ? Xintr_ioapic_level11 +ffffffff82833cd0 ? Xintr_ioapic_level12 +ffffffff82833d10 ? Xintr_ioapic_level13 +ffffffff82833d50 ? Xintr_ioapic_level14 +ffffffff82833d90 ? Xintr_ioapic_level15 +ffffffff82833dd0 ? Xintr_ioapic_level16 +ffffffff82833e10 ? Xintr_ioapic_level17 +ffffffff82833e50 ? Xintr_ioapic_level18 +ffffffff82833e90 ? Xintr_ioapic_level19 +ffffffff82833ed0 ? Xintr_ioapic_level20 +ffffffff82833f10 ? Xintr_ioapic_level21 +ffffffff82833f50 ? Xintr_ioapic_level22 +ffffffff82833f90 ? Xintr_ioapic_level23 +ffffffff82833fd0 ? Xintr_ioapic_level24 +ffffffff82834010 ? Xintr_ioapic_level25 +ffffffff82834050 ? Xintr_ioapic_level26 +ffffffff82834090 ? Xintr_ioapic_level27 +ffffffff828340d0 ? Xintr_ioapic_level28 +ffffffff82834110 ? Xintr_ioapic_level29 +ffffffff82834150 ? Xintr_ioapic_level30 +ffffffff82834190 ? Xintr_ioapic_level31 +ffffffff828341d0 ? Xintr_ioapic_level32 +ffffffff82834210 ? Xintr_ioapic_level33 +ffffffff82834250 ? Xintr_ioapic_level34 +ffffffff82834290 ? Xintr_ioapic_level35 +ffffffff828342d0 ? Xintr_ioapic_level36 +ffffffff82834310 ? Xintr_ioapic_level37 +ffffffff82834350 ? Xintr_ioapic_level38 +ffffffff82834390 ? Xintr_ioapic_level39 +ffffffff828343d0 ? Xintr_ioapic_level40 +ffffffff82834410 ? Xintr_ioapic_level41 +ffffffff82834450 ? Xintr_ioapic_level42 +ffffffff82834490 ? Xintr_ioapic_level43 +ffffffff828344d0 ? Xintr_ioapic_level44 +ffffffff82834510 ? Xintr_ioapic_level45 +ffffffff82834550 ? Xintr_ioapic_level46 +ffffffff82834590 ? Xintr_ioapic_level47 +ffffffff828345d0 ? Xintr_ioapic_level48 +ffffffff82834610 ? Xintr_ioapic_level49 +ffffffff82834650 ? Xintr_ioapic_level50 +ffffffff82834690 ? Xintr_ioapic_level51 +ffffffff828346d0 ? Xintr_ioapic_level52 +ffffffff82834710 ? Xintr_ioapic_level53 +ffffffff82834750 ? Xintr_ioapic_level54 +ffffffff82834790 ? Xintr_ioapic_level55 +ffffffff828347d0 ? Xintr_ioapic_level56 +ffffffff82834810 ? Xintr_ioapic_level57 +ffffffff82834850 ? Xintr_ioapic_level58 +ffffffff82834890 ? Xintr_ioapic_level59 +ffffffff828348d0 ? Xintr_ioapic_level60 +ffffffff82834910 ? Xintr_ioapic_level61 +ffffffff82834950 ? Xintr_ioapic_level62 +ffffffff82834990 ? Xintr_ioapic_level63 +ffffffff82835000 ? codepatch_fill_nop +ffffffff82835000 A __cptext_start +ffffffff82835000 A __kutext_end +ffffffff828350b0 ? codepatch_maprw +ffffffff828351c0 ? codepatch_unmaprw +ffffffff82835230 ? codepatch_nop +ffffffff828353b0 ? codepatch_replace +ffffffff82835580 ? codepatch_call +ffffffff828355a0 ? codepatch_control_flow +ffffffff828357c0 ? codepatch_jmp +ffffffff82836000 A __cptext_end +ffffffff82836000 A __rodata_start +ffffffff82836000 C _etext +ffffffff82836000 C etext +ffffffff82837000 r seeprom_read +ffffffff82837004 r icl_mg_pll_find_divisors.div1_vals +ffffffff82837034 r athn_ac2qid +ffffffff82837034 r athn_ac2qid +ffffffff82837034 r athn_ac2qid +ffffffff82837040 r rtwn_get_rssi.cckoff +ffffffff82837068 r rsu_ac2qid +ffffffff82837078 r pckbc_portcmd +ffffffff8283707c r tht_fifo_write_pad.pad +ffffffff82837084 r rsu_get_rssi.cckoff +ffffffff828370a4 r adlp_n_revids +ffffffff828370e8 r apple_iso_trans +ffffffff828370f0 r wihap_check_tx.txratetable +ffffffff828370f4 r dmamode +ffffffff82837118 r gen9_edram_size_mb.sets +ffffffff8283712c r dg2_g12_revid_step_tbl +ffffffff82838000 r isomappings +ffffffff82838080 r unimappings +ffffffff82838230 r replacements +ffffffff8283babc r apollo_pio_rec +ffffffff82889960 r apollo_udma33_tim +ffffffff8289f04b r pp_r600_decoded_lanes +ffffffff828d6315 r cmd680_setup_channel.udma_tbl +ffffffff828de8c2 r apollo_udma100_tim +ffffffff828de8c8 r cmd0646_9_tim_udma +ffffffff828ed1e1 r substchar +ffffffff829449e3 r apollo_udma133_tim +ffffffff829449ea r apollo_udma66_tim +ffffffff82944a14 r cy_pio_rec +ffffffff8294a300 R drm_ca +ffffffff8294a328 R drm_filtops +ffffffff8294a358 R drmread_filtops +ffffffff8294b000 r vga_emulops +ffffffff8294b048 R vga_stdscreen +ffffffff8294b078 R vga_stdscreen_mono +ffffffff8294b0a8 R vga_stdscreen_bf +ffffffff8294b0d8 R vga_40lscreen +ffffffff8294b108 R vga_40lscreen_mono +ffffffff8294b138 R vga_40lscreen_bf +ffffffff8294b168 R vga_50lscreen +ffffffff8294b198 R vga_50lscreen_mono +ffffffff8294b1c8 R vga_50lscreen_bf +ffffffff8294b1f8 R vga_screenlist +ffffffff8294b208 R vga_screenlist_mono +ffffffff8294b218 R vga_accessops +ffffffff8294b278 r i945_wm_info +ffffffff8294b2b8 r bgansitopc +ffffffff8294b2c0 r pctoansi +ffffffff8294b300 r sdma_offsets +ffffffff8294b300 r sdma_offsets +ffffffff8294b338 r iha_rate_tbl +ffffffff8294b370 r i830_a_wm_info +ffffffff8294b3a8 r gen9_edram_size_mb.ways +ffffffff8294b408 r aggr_periodic_times +ffffffff8294b508 r michael_final.pad +ffffffff8294b530 r rt_copysa.maskarray +ffffffff8294b538 r i915_wm_info +ffffffff8294b540 r amdgpu_ih_clientid_jpeg +ffffffff8294b540 r amdgpu_ih_clientid_uvds +ffffffff8294b540 r amdgpu_ih_clientid_vcns +ffffffff8294b540 r amdgpu_ih_clientid_vcns +ffffffff8294b540 r amdgpu_ih_clientid_vcns +ffffffff8294b570 r jsl_ehl_revids +ffffffff8294b580 r vga_setfontset.cmaptabb +ffffffff8294b5f0 r i830_bc_wm_info +ffffffff8294b658 r hsw_activate_psr2.map +ffffffff8294b660 r tgl_revids +ffffffff8294b698 r __drm_universal_plane_init.default_modifiers +ffffffff8294b6a8 r iwn_tid2fifo +ffffffff8294b6c0 r vga_setfontset.cmaptaba +ffffffff8294b6c8 r crtc_offsets +ffffffff8294b6c8 r crtc_offsets +ffffffff8294b6c8 r crtc_offsets +ffffffff8294b770 r rtwn_r88e_get_rssi.cckoff +ffffffff8294c000 R edid_vendors +ffffffff8294c2c0 R edid_nvendors +ffffffff8294c2d0 R edid_products +ffffffff8294c330 R edid_nproducts +ffffffff8294c340 r _edid_modes +ffffffff8294d000 R videomode_list +ffffffff8294e080 R videomode_count +ffffffff8294f000 r ahc_hard_errors +ffffffff8294f080 r critical_sections +ffffffff8294f0b0 r patches +ffffffff8294fd50 r seqprog +ffffffff82951000 r ahc_switch +ffffffff82952000 r termstat_strings +ffffffff82952020 r critical_sections +ffffffff82952060 r seqprog +ffffffff82952d50 r patches +ffffffff82954000 r ahd_switch +ffffffff82955000 R aic_switch +ffffffff82956000 R adw_switch +ffffffff82957000 R gdt_switch +ffffffff82958000 R twe_switch +ffffffff82959000 R ciss_switch +ffffffff82959030 R ciss_level +ffffffff82959050 R ciss_stat +ffffffff8295a000 R ami_switch +ffffffff8295a028 R ami_raw_switch +ffffffff8295b000 R mfi_switch +ffffffff8295b028 R mfi_pd_switch +ffffffff8295b050 r mfi_iop_xscale +ffffffff8295b080 r mfi_iop_ppc +ffffffff8295b0b0 r mfi_iop_gen2 +ffffffff8295b0e0 r mfi_iop_skinny +ffffffff8295b110 r mfi_bbu_indicators +ffffffff8295c000 R qlw_switch +ffffffff8295d000 R isp_2100_risc_code +ffffffff8296fbf0 R isp_2200_risc_code +ffffffff82982990 R isp_2300_risc_code +ffffffff8299c408 R qla_switch +ffffffff8299c430 r qla_regs_2100 +ffffffff8299c460 r qla_regs_2200 +ffffffff8299c490 r qla_regs_23XX +ffffffff8299d000 R ahci_atascsi_methods +ffffffff8299e000 R nvme_switch +ffffffff8299e028 r nvme_ops +ffffffff8299f000 R mpi_switch +ffffffff8299f060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff8299f090 r chv_oa_mux_regs +ffffffff8299f0b0 r fiji_clock_stretcher_lookup_table +ffffffff8299f0b0 r tonga_clock_stretcher_lookup_table +ffffffff8299f0d0 r iosf_pci_devices +ffffffff8299f0f0 r link_speed +ffffffff8299f0f0 r link_speed +ffffffff8299f130 r drm_fb_xfrm.default_dst_pitch +ffffffff8299f130 r non_supported_protection +ffffffff8299f140 r tgl_uy_revids +ffffffff8299f2b0 r bwi_phy_noise_11g_rev1 +ffffffff8299f320 r cardslot_process_event.antonym_ev +ffffffff8299f3b0 r gen11_oa_mux_regs +ffffffff8299f450 r dpia_to_preferred_enc_id_table +ffffffff8299f4c0 r ddr2_cycle_tenths +ffffffff8299f530 r rtw_intr_rx.ratetbl +ffffffff8299f5b0 r abm_config +ffffffff8299f630 r getbootinfo.ports +ffffffff8299f680 r reg_offsets +ffffffff8299f690 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff8299f6a0 r glk_revids +ffffffff8299f6b0 r init_non_clock_fields.look_up +ffffffff8299f6c0 r uftdi_8u232am_getrate.roundoff +ffffffff8299f720 r zyd_rx_data.rates +ffffffff8299f740 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff8299f770 r intel_engine_init_tlb_invalidation.gen8_regs +ffffffff8299f7a0 r bwi_phy_noise_11g +ffffffff8299f7b0 r hpt366_pio +ffffffff8299f810 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff8299f830 r ether_crc32_be_update.rev +ffffffff8299f830 r rtw_grf5101_mac_crypt.caesar +ffffffff8299f880 r snb_b_fdi_train_param +ffffffff8299f960 r intel_hpll_vco.elk_vco +ffffffff8299f980 r icl_revids +ffffffff8299f9e0 r pin_offsets +ffffffff8299fa00 r amdgpu_ih_srcid_jpeg +ffffffff8299fa40 r firmware_list +ffffffff8299faa0 r atom_arg_shift +ffffffff8299faa0 r atom_arg_shift +ffffffff8299fae0 r pf_syncookie_wstab +ffffffff8299fb00 r ieee80211_media_init.mopts +ffffffff8299fb60 r add_entropy_words.twist_table +ffffffff8299fc00 r urtw_8225v2_txpwr_cck +ffffffff8299fc20 r bwfm_pci_prio2fifo +ffffffff8299fc20 r ieee80211_up_to_ac.up_to_ac +ffffffff8299fce0 r paritytab +ffffffff8299fce0 r x86emu_parity_tab +ffffffff8299fd00 r legacy_connector_convert +ffffffff8299fd40 r gen7_oa_mux_regs +ffffffff8299fd60 r hsw_oa_mux_regs +ffffffff8299fd80 r notetab +ffffffff8299fda0 r urtw_8225v2_txpwr_cck_ch14 +ffffffff8299fdc0 r bwi_rf_calibval.rf_calibvals +ffffffff8299fe60 r pf_syncookie_msstab +ffffffff8299fec0 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff8299ff20 r uath_wme_init.uath_wme_11g +ffffffff8299ff60 r gen7_oa_b_counters +ffffffff829a0160 r rtwn_iq_calib_run.reg_adda +ffffffff829a0180 r nfs_backoff +ffffffff829a01c0 r atom_def_dst +ffffffff829a01c0 r atom_def_dst +ffffffff829a0200 r sha256_initial_hash_value +ffffffff829a0260 r otus_edca_def +ffffffff829a0280 r intel_hpll_vco.blb_vco +ffffffff829a0360 r epic_pci_subsys_info +ffffffff829a0380 r kbl_revids +ffffffff829a03a0 r atom_arg_mask +ffffffff829a03a0 r atom_arg_mask +ffffffff829a0400 r butmap +ffffffff829a0440 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff829a0480 r comsoft.lsrmap +ffffffff829a04c0 r xgmi3x16_pcs_err_noncorrectable_mask_reg_aldebaran +ffffffff829a04e0 r tulip_mii_phy_readspecific.table +ffffffff829a0580 r intel_hpll_vco.pnv_vco +ffffffff829a05e0 r dmapageport +ffffffff829a06c0 r intel_hpll_vco.ctg_vco +ffffffff829a0780 r drm_calculate_luminance_range.pre_computed_values +ffffffff829a1000 R sili_atascsi_methods +ffffffff829a2000 R ncr53c9x_switch +ffffffff829a3000 r scf_period +ffffffff829a4000 R siop_script +ffffffff829a45a0 R lun_switch +ffffffff829a45d0 R tag_switch +ffffffff829a4660 R load_dsa +ffffffff829a46c4 R siop_led_on +ffffffff829a46cc R siop_led_off +ffffffff829a46d8 R siop_switch +ffffffff829a5000 R ep_vortex_media +ffffffff829a5100 R ep_default_to_media +ffffffff829a6000 R wi_card_ident +ffffffff829a8000 R ucode_table +ffffffff829a9000 r re_revisions +ffffffff829a9290 r re_kstats_tpl +ffffffff829ab000 R smc91cxx_media +ffffffff829ab010 R smc91cxx_mii_bitbang_ops +ffffffff829ac000 R dl10019_mii_bitbang_ops +ffffffff829ac028 R dl10022_mii_bitbang_ops +ffffffff829ad000 R ax88190_mii_bitbang_ops +ffffffff829af000 R ac97_on_off +ffffffff829af304 R ac97_mic_select +ffffffff829af608 R ac97_mono_select +ffffffff829af90c R ac97_source +ffffffff829afc10 R ac97_volume_stereo +ffffffff829afc2c R ac97_volume_mono +ffffffff829afc50 R source_info +ffffffff829b0450 R ac97_ad +ffffffff829b0560 R ac97_ak +ffffffff829b05f0 R ac97_av +ffffffff829b0730 R ac97_rl +ffffffff829b0780 R ac97_cm +ffffffff829b0800 R ac97_cr +ffffffff829b0820 R ac97_cs +ffffffff829b0900 R ac97_cx +ffffffff829b0960 R ac97_dt +ffffffff829b0980 R ac97_em +ffffffff829b09b0 R ac97_es +ffffffff829b09d0 R ac97_is +ffffffff829b09f0 R ac97_ic +ffffffff829b0a70 R ac97_it +ffffffff829b0aa0 R ac97_ns +ffffffff829b0b60 R ac97_ps +ffffffff829b0b90 R ac97_sl +ffffffff829b0bb0 R ac97_st +ffffffff829b0d00 R ac97_vi +ffffffff829b0d30 R ac97_tt +ffffffff829b0db0 R ac97_ti +ffffffff829b0dd0 R ac97_wb +ffffffff829b0df0 R ac97_wo +ffffffff829b0e80 R ac97_ym +ffffffff829b0ed0 R ac97_vendors +ffffffff829b11d0 R ac97enhancement +ffffffff829b12d0 R ac97feature +ffffffff829b2000 R lm_chips +ffffffff829b2020 R lm78_sensors +ffffffff829b21a0 R w83627hf_sensors +ffffffff829b23a0 R w83627ehf_sensors +ffffffff829b25c0 R w83627dhg_sensors +ffffffff829b27c0 R nct6776f_sensors +ffffffff829b2a00 R nct6779d_sensors +ffffffff829b2d60 R w83637hf_sensors +ffffffff829b2f20 R w83697hf_sensors +ffffffff829b30c0 R w83781d_sensors +ffffffff829b3280 R w83782d_sensors +ffffffff829b3480 R w83783s_sensors +ffffffff829b3600 R w83791d_sensors +ffffffff829b3860 R w83792d_sensors +ffffffff829b3ae0 R as99127f_sensors +ffffffff829b4000 r ar5k_known_products +ffffffff829b4110 r ar5111_gain_opt +ffffffff829b41e0 r ar5112_gain_opt +ffffffff829b42b0 r ar5k_5ghz_channels +ffffffff829b4a00 r ar5k_2ghz_channels +ffffffff829b4f10 r ar5111_rf +ffffffff829b5350 r ar5112a_rf +ffffffff829b5890 r ar5112_rf +ffffffff829b5da0 r ar5413_rf +ffffffff829b61b0 r ar2413_rf +ffffffff829b64d0 r ar2425_rf +ffffffff829b6830 r ar5111_rfg +ffffffff829b6b30 r ar5112_rfg +ffffffff829b6e30 r ar5413_rfg +ffffffff829b7130 r ar2413_rfg +ffffffff829b7430 r ar5k_rt_11a +ffffffff829b7552 r ar5k_rt_11b +ffffffff829b7674 r ar5k_rt_11g +ffffffff829b7796 r ar5k_rt_xr +ffffffff829b8000 r ar5210_ini +ffffffff829b9000 r ar5211_mode +ffffffff829b92c0 r ar5211_ini +ffffffff829b9ad0 r ar5211_rf +ffffffff829ba000 r ar5212_pcie +ffffffff829ba080 r ar5212_mode +ffffffff829ba310 r ar5212_ini +ffffffff829bac80 r ar5212_ar5111_mode +ffffffff829baf20 r ar5212_ar5112_mode +ffffffff829bb1b0 r ar5413_mode +ffffffff829bbb10 r ar2413_mode +ffffffff829bc430 r ar2425_mode +ffffffff829bcd90 r ar5111_bbgain +ffffffff829bd090 r ar5112_bbgain +ffffffff829be000 r athn_5ghz_chans +ffffffff829be020 r athn_rates +ffffffff829bf000 r athn_rates +ffffffff829c0000 r ar9160_ini +ffffffff829c0068 r ar5416_ini +ffffffff829c00d0 r ar5416_serdes +ffffffff829c00e8 r ar9160_1_1_addac +ffffffff829c00f8 r ar9160_1_0_addac +ffffffff829c0108 r ar5416_2_2_addac +ffffffff829c0118 r ar5416_2_1_addac +ffffffff829c0128 r ar5416_set_power_calib.chainoffset +ffffffff829c0140 r ar9160_bank6tpc_vals +ffffffff829c01c0 r ar5416_bank6tpc_vals +ffffffff829c0240 r ar5416_bb_rfgain_vals_2g +ffffffff829c0340 r ar5416_bb_rfgain_vals_5g +ffffffff829c0440 r ar5416_bank6_vals +ffffffff829c04c0 r ar9160_regs +ffffffff829c0540 r ar9160_vals_5g20 +ffffffff829c0640 r ar9160_vals_5g40 +ffffffff829c0740 r ar9160_vals_2g40 +ffffffff829c0840 r ar9160_vals_2g20 +ffffffff829c0940 r ar9160_cm_regs +ffffffff829c0c30 r ar9160_cm_vals +ffffffff829c1210 r ar5416_regs +ffffffff829c1290 r ar5416_vals_5g20 +ffffffff829c1390 r ar5416_vals_5g40 +ffffffff829c1490 r ar5416_vals_2g40 +ffffffff829c1590 r ar5416_vals_2g20 +ffffffff829c1690 r ar5416_cm_regs +ffffffff829c1980 r ar5416_cm_vals +ffffffff829c1f60 r ar5416_serdes_regs +ffffffff829c1f90 r ar5416_serdes_vals +ffffffff829c1fc0 r ar9160_1_1_addac_vals +ffffffff829c2040 r ar9160_1_0_addac_vals +ffffffff829c20c0 r ar5416_2_2_addac_vals +ffffffff829c2150 r ar5416_2_1_addac_vals +ffffffff829c3000 r ar9280_2_0_ini +ffffffff829c3068 r ar9280_2_0_serdes +ffffffff829c3080 r ar9280_2_0_rx_gain_23db_backoff +ffffffff829c30a0 r ar9280_2_0_rx_gain_13db_backoff +ffffffff829c30c0 r ar9280_2_0_rx_gain +ffffffff829c30e0 r ar9280_2_0_tx_gain_high_power +ffffffff829c3100 r ar9280_2_0_tx_gain +ffffffff829c3120 r ar9280_init_from_rom.chainoffset +ffffffff829c3130 r ar9280_2_0_regs +ffffffff829c3190 r ar9280_2_0_vals_5g20 +ffffffff829c3250 r ar9280_2_0_vals_5g40 +ffffffff829c3310 r ar9280_2_0_vals_2g40 +ffffffff829c33d0 r ar9280_2_0_vals_2g20 +ffffffff829c3490 r ar9280_2_0_cm_regs +ffffffff829c3740 r ar9280_2_0_cm_vals +ffffffff829c3c90 r ar9280_2_0_fast_clock_regs +ffffffff829c3cb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff829c3cf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff829c3d30 r ar9280_2_0_serdes_regs +ffffffff829c3d60 r ar9280_2_0_serdes_vals +ffffffff829c3d90 r ar9280_2_0_rx_gain_regs +ffffffff829c3ea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff829c40b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff829c42c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff829c44d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff829c46e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff829c48f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff829c4b00 r ar9280_2_0_tx_gain_regs +ffffffff829c4b40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff829c4bc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff829c4c40 r ar9280_2_0_tx_gain_vals_5g +ffffffff829c4cc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff829c5000 r ar9271_ini +ffffffff829c5068 r ar9285_1_2_ini +ffffffff829c50d0 r ar9280_2_0_serdes +ffffffff829c50e8 r ar9271_tx_gain_high_power +ffffffff829c5108 r ar9271_tx_gain +ffffffff829c5128 r ar9285_2_0_tx_gain_high_power +ffffffff829c5148 r ar9285_2_0_tx_gain +ffffffff829c5168 r ar9285_1_2_tx_gain_high_power +ffffffff829c5188 r ar9285_1_2_tx_gain +ffffffff829c51b0 r ar9271_regs +ffffffff829c5410 r ar9271_vals_2g40 +ffffffff829c58d0 r ar9271_vals_2g20 +ffffffff829c5d90 r ar9271_cm_regs +ffffffff829c6020 r ar9271_cm_vals +ffffffff829c6540 r ar9285_1_2_regs +ffffffff829c67a0 r ar9285_1_2_vals_2g40 +ffffffff829c6c60 r ar9285_1_2_vals_2g20 +ffffffff829c7120 r ar9285_1_2_cm_regs +ffffffff829c73a0 r ar9285_1_2_cm_vals +ffffffff829c7890 r ar9280_2_0_serdes_regs +ffffffff829c78c0 r ar9280_2_0_serdes_vals +ffffffff829c78f0 r ar9271_tx_gain_regs +ffffffff829c7940 r ar9271_tx_gain_high_power_vals_2g +ffffffff829c79d0 r ar9271_tx_gain_vals_2g +ffffffff829c7a60 r ar9285_1_2_tx_gain_regs +ffffffff829c7ab0 r ar9285_2_0_tx_gain_high_power_vals_2g +ffffffff829c7b50 r ar9285_2_0_tx_gain_vals_2g +ffffffff829c7bf0 r ar9285_1_2_tx_gain_high_power_vals_2g +ffffffff829c7c90 r ar9285_1_2_tx_gain_vals_2g +ffffffff829c8000 r ar9287_1_1_ini +ffffffff829c8068 r ar9280_2_0_serdes +ffffffff829c8080 r ar9287_1_1_rx_gain +ffffffff829c80a0 r ar9287_1_1_tx_gain +ffffffff829c80c0 r ar9287_1_1_regs +ffffffff829c8120 r ar9287_1_1_vals_2g40 +ffffffff829c81d0 r ar9287_1_1_vals_2g20 +ffffffff829c8280 r ar9287_1_1_cm_regs +ffffffff829c8560 r ar9287_1_1_cm_vals +ffffffff829c8b20 r ar9280_2_0_serdes_regs +ffffffff829c8b50 r ar9280_2_0_serdes_vals +ffffffff829c8b80 r ar9287_1_1_rx_gain_regs +ffffffff829c8d90 r ar9287_1_1_rx_gain_vals_2g +ffffffff829c91a0 r ar9287_1_1_tx_gain_regs +ffffffff829c9200 r ar9287_1_1_tx_gain_vals_2g +ffffffff829ca000 r athn_rates +ffffffff829cb000 r ar9485_1_1_ini +ffffffff829cb068 r ar9485_1_1_serdes +ffffffff829cb080 r ar9380_2_2_ini +ffffffff829cb0e8 r ar9380_2_2_serdes +ffffffff829cb100 r ar9380_2_2_rx_gain_wo_xlna +ffffffff829cb120 r ar9380_2_2_rx_gain +ffffffff829cb140 r ar9485_1_1_rx_gain +ffffffff829cb160 r ar9380_2_2_tx_gain_high_ob_db +ffffffff829cb180 r ar9380_2_2_tx_gain_low_ob_db +ffffffff829cb1a0 r ar9380_2_2_tx_gain_high_power +ffffffff829cb1c0 r ar9380_2_2_tx_gain +ffffffff829cb1e0 r ar9485_1_1_tx_gain +ffffffff829cb200 r ar9485_1_1_regs +ffffffff829cb270 r ar9485_1_1_vals_2g40 +ffffffff829cb350 r ar9485_1_1_vals_2g20 +ffffffff829cb430 r ar9485_1_1_cm_regs +ffffffff829cb720 r ar9485_1_1_cm_vals +ffffffff829cbd00 r ar9485_1_1_serdes_regs +ffffffff829cbd0c r ar9485_1_1_serdes_vals +ffffffff829cbd20 r ar9380_2_2_regs +ffffffff829cbdb0 r ar9380_2_2_vals_5g20 +ffffffff829cbed0 r ar9380_2_2_vals_5g40 +ffffffff829cbff0 r ar9380_2_2_vals_2g40 +ffffffff829cc110 r ar9380_2_2_vals_2g20 +ffffffff829cc230 r ar9380_2_2_cm_regs +ffffffff829cc5d0 r ar9380_2_2_cm_vals +ffffffff829ccd00 r ar9380_2_2_fast_clock_regs +ffffffff829ccd20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff829ccd50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff829ccd74 r ar9380_2_2_serdes_regs +ffffffff829ccd80 r ar9380_2_2_serdes_vals +ffffffff829ccd90 r ar9380_2_2_rx_gain_regs +ffffffff829ccf90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff829cd390 r ar9380_2_2_rx_gain_vals +ffffffff829cd790 r ar9485_1_1_rx_gain_regs +ffffffff829cd890 r ar9485_1_1_rx_gain_vals +ffffffff829cda90 r ar9380_2_2_tx_gain_regs +ffffffff829cdb60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff829cdd00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff829cdea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff829ce040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff829ce1e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff829ce380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff829ce520 r ar9380_2_2_tx_gain_vals_5g +ffffffff829ce6c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff829ce860 r ar9485_1_1_tx_gain_regs +ffffffff829ce8f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff829cea10 r ar9380_def_rom +ffffffff829cee50 r ar9380_def_rom_h112 +ffffffff829cf290 r ar9380_def_rom_h116 +ffffffff829cf6d0 r ar9380_def_rom_x112 +ffffffff829cfb10 r ar9380_def_rom_x113 +ffffffff829d0000 R atw_txthresh_tab_lo +ffffffff829d0050 R atw_txthresh_tab_hi +ffffffff829d00a0 r atw_attach.empty_macaddr +ffffffff829d00b0 r atw_attach.type_strings +ffffffff829d00d0 r atw_rfmd2958_ifn +ffffffff829d0110 r atw_rfmd2958_rf1r +ffffffff829d0150 r atw_rxintr.rate_tbl +ffffffff829d1000 r rtw_identify_sta.empty_macaddr +ffffffff829d2000 r rtwn_set_key.etherzeroaddr +ffffffff829d2010 r rtl8188eu_rf_prog +ffffffff829d2030 r rtl8188ftv_rf_prog +ffffffff829d2050 r rtl8192e_rf_prog +ffffffff829d2080 r rtl8188ce_rf_prog +ffffffff829d20a0 r rtl8188ru_rf_prog +ffffffff829d20c0 r rtl8188cu_rf_prog +ffffffff829d20e0 r rtl8192ce_rf_prog +ffffffff829d2110 r rtl8188ru_txagc +ffffffff829d2170 r rtl8188eu_rf_regs +ffffffff829d2230 r rtl8188eu_rf_vals +ffffffff829d23b0 r rtl8188ftv_rf_regs +ffffffff829d2490 r rtl8188ftv_rf_vals +ffffffff829d2640 r rtl8192e_rf_regs +ffffffff829d2710 r rtl8192e_rf_vals +ffffffff829d28b0 r rtl8192e_rf2_regs +ffffffff829d2950 r rtl8192e_rf2_vals +ffffffff829d2a90 r rtl8192ce_rf1_regs +ffffffff829d2bb0 r rtl8188ce_rf_vals +ffffffff829d2df0 r rtl8188ru_rf_vals +ffffffff829d3030 r rtl8188cu_rf_vals +ffffffff829d3270 r rtl8192ce_rf1_vals +ffffffff829d34b0 r rtl8192ce_rf2_regs +ffffffff829d3500 r rtl8192ce_rf2_vals +ffffffff829d35a0 r rtl8192cu_txagc +ffffffff829d4000 r rt2560_rf2522_r2 +ffffffff829d4040 r rt2560_rf2524_r2 +ffffffff829d4080 r rt2560_rf2525_hi_r2 +ffffffff829d40c0 r rt2560_rf2525_r2 +ffffffff829d4100 r rt2560_rf2525e_r2 +ffffffff829d4140 r rt2560_rf2526_hi_r2 +ffffffff829d4180 r rt2560_rf2526_r2 +ffffffff829d41c0 r rt2560_def_bbp +ffffffff829d4200 r rt2560_def_mac +ffffffff829d5000 r rt2661_rf5225_1 +ffffffff829d5300 r rt2661_rf5225_2 +ffffffff829d5600 r rt2661_def_bbp +ffffffff829d5640 r rt2661_def_mac +ffffffff829d6000 r rt2860_rf2850 +ffffffff829d6430 r rt2860_rates +ffffffff829d64f0 r rt3572_def_rf +ffffffff829d6530 r rt3090_def_rf +ffffffff829d6560 r rt5392_def_rf +ffffffff829d65e0 r rt3290_def_rf +ffffffff829d6640 r rt5390_def_rf +ffffffff829d66c0 r rt5390_def_bbp +ffffffff829d66f0 r rt2860_def_mac +ffffffff829d8000 r acx111_reg +ffffffff829d8040 r acx111_rate_map +ffffffff829d9000 r acx100_reg +ffffffff829d9040 r acx100_txpower_rfmd +ffffffff829d9060 r gen8_rcs_offsets +ffffffff829d9090 r acx100_txpower_maxim +ffffffff829d90b0 r mtl_rcs_offsets +ffffffff829d90f0 r digits +ffffffff829d90f0 r pppdumpb.digits +ffffffff829d90f0 r pppdumpm.digits +ffffffff829d9140 r hangpic +ffffffff829d9180 r gen11_rcs_offsets +ffffffff829d91b0 r xehp_rcs_offsets +ffffffff829d91e0 r dg2_rcs_offsets +ffffffff829d9220 r dg2_xcs_offsets +ffffffff829d9250 r gen12_xcs_offsets +ffffffff829da000 r trinity_override_mgpg_sequences +ffffffff829da3c0 r voltage_swing_to_pre_emphasis +ffffffff829da3d0 r sgpr_init_compute_shader +ffffffff829da4a0 r intel_hpll_vco.cl_vco +ffffffff829da4c0 r vgpr_init_compute_shader +ffffffff829db000 r malo_cmd_string.cmds +ffffffff829db0b0 r malo_cmd_string_result.results +ffffffff829dc000 R bwi_vendor_led_act +ffffffff829dc00c R bwi_default_led_act +ffffffff829dc010 R bwi_led_duration +ffffffff829dc380 r bwi_sup_bphy +ffffffff829dc3c0 r bwi_phy_freq_11g_rev1 +ffffffff829dc5c0 r bwi_phy_rotor_11g_rev1 +ffffffff829dc6a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff829dc6e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff829dc720 r bwi_phy_noise_scale_11g +ffffffff829dc760 r bwi_phy_sigma_sq_11g_rev2 +ffffffff829dc7d0 r bwi_phy_sigma_sq_11g_rev7 +ffffffff829dc840 r bwi_phy_delay_11g_rev1 +ffffffff829dc920 r bwi_rf_get_gains.save_phy_regs +ffffffff829dc940 r bwi_rf_lo_find.map +ffffffff829dc960 r bwi_txpower_map_11b +ffffffff829dc9a0 r bwi_txpower_map_11g +ffffffff829dc9e0 r _bwi_rf_lo_update_11g.rf_atten_list +ffffffff829dca20 r _bwi_rf_lo_update_11g.rf_atten_init_list +ffffffff829dca60 r _bwi_rf_lo_update_11g.rf_lo_measure_order +ffffffff829dcaa0 r bwi_rf_set_nrssi_ofs_11g.save_phy_comm_regs +ffffffff829dcac0 r bwi_bbpid_map +ffffffff829dcaf0 r bwi_regwin_count +ffffffff829dcb40 r bwi_clkfreq +ffffffff829dcb58 r bwi_zero_addr +ffffffff829dd000 R ipq8074_ops +ffffffff829dd070 R ipq6018_ops +ffffffff829dd0e0 R qca6390_ops +ffffffff829dd150 R qcn9074_ops +ffffffff829dd1c0 R wcn6855_ops +ffffffff829dd230 R wcn6750_ops +ffffffff829dd2a0 R ath11k_hw_ring_mask_ipq8074 +ffffffff829dd2f8 R ath11k_hw_ring_mask_qca6390 +ffffffff829dd350 R ath11k_hw_ring_mask_qcn9074 +ffffffff829dd3a8 R ath11k_hw_ring_mask_wcn6750 +ffffffff829dd400 R ath11k_target_ce_config_wlan_ipq8074 +ffffffff829dd510 R ath11k_target_service_to_ce_map_wlan_ipq8074 +ffffffff829dd620 R ath11k_target_service_to_ce_map_wlan_ipq6018 +ffffffff829dd710 R ath11k_target_ce_config_wlan_qca6390 +ffffffff829dd7f0 R ath11k_target_service_to_ce_map_wlan_qca6390 +ffffffff829dd8b0 R ath11k_target_ce_config_wlan_qcn9074 +ffffffff829dd990 R ath11k_target_service_to_ce_map_wlan_qcn9074 +ffffffff829dda70 R qwx_host_ce_config_ipq8074 +ffffffff829ddd10 R qwx_host_ce_config_qca6390 +ffffffff829dde30 R qwx_host_ce_config_qcn9074 +ffffffff829ddef0 R ipq8074_regs +ffffffff829ddfc4 R qca6390_regs +ffffffff829de098 R qcn9074_regs +ffffffff829de16c R wcn6855_regs +ffffffff829de240 R wcn6750_regs +ffffffff829de320 R qmi_response_type_v01_ei +ffffffff829de380 R qmi_wlanfw_ind_register_req_msg_v01_ei +ffffffff829de6a0 R qmi_wlanfw_ind_register_resp_msg_v01_ei +ffffffff829de720 R qmi_wlanfw_host_cap_req_msg_v01_ei +ffffffff829deaa0 R qmi_wlanfw_host_cap_resp_msg_v01_ei +ffffffff829deae0 R qmi_wlanfw_mem_cfg_s_v01_ei +ffffffff829deb60 R qmi_wlanfw_mem_seg_s_v01_ei +ffffffff829dec00 R qmi_wlanfw_request_mem_ind_msg_v01_ei +ffffffff829dec60 R qmi_wlanfw_mem_seg_resp_s_v01_ei +ffffffff829ded00 R qmi_wlanfw_respond_mem_req_msg_v01_ei +ffffffff829ded60 R qmi_wlanfw_respond_mem_resp_msg_v01_ei +ffffffff829deda0 R qmi_wlanfw_cap_req_msg_v01_ei +ffffffff829dedc0 R qmi_wlanfw_rf_chip_info_s_v01_ei +ffffffff829dee20 R qmi_wlanfw_rf_board_info_s_v01_ei +ffffffff829dee60 R qmi_wlanfw_soc_info_s_v01_ei +ffffffff829deea0 R qmi_wlanfw_fw_version_info_s_v01_ei +ffffffff829def00 R qmi_wlanfw_cap_resp_msg_v01_ei +ffffffff829df1c0 R qmi_wlanfw_bdf_download_req_msg_v01_ei +ffffffff829df3a0 R qmi_wlanfw_bdf_download_resp_msg_v01_ei +ffffffff829df3e0 R qmi_wlanfw_m3_info_req_msg_v01_ei +ffffffff829df440 R qmi_wlanfw_m3_info_resp_msg_v01_ei +ffffffff829df480 R qmi_wlanfw_wlan_ini_req_msg_v01_ei +ffffffff829df4e0 R qmi_wlanfw_wlan_ini_resp_msg_v01_ei +ffffffff829df520 R qmi_wlanfw_ce_tgt_pipe_cfg_s_v01_ei +ffffffff829df5e0 R qmi_wlanfw_ce_svc_pipe_cfg_s_v01_ei +ffffffff829df660 R qmi_wlanfw_shadow_reg_cfg_s_v01_ei +ffffffff829df6c0 R qmi_wlanfw_shadow_reg_v2_cfg_s_v01_ei +ffffffff829df700 R qmi_wlanfw_wlan_mode_req_msg_v01_ei +ffffffff829df780 R qmi_wlanfw_wlan_mode_resp_msg_v01_ei +ffffffff829df7c0 R qmi_wlanfw_wlan_cfg_req_msg_v01_ei +ffffffff829df9a0 R qmi_wlanfw_wlan_cfg_resp_msg_v01_ei +ffffffff829df9e0 r wmi_tlv_policies +ffffffff829e1740 r qwx_hw_mode_pri_map +ffffffff829e1770 r ath11k_hw_params +ffffffff829e1cf0 r hw_srng_config_templ +ffffffff829e1fa8 r ath11k_hw_hal_params_ipq8074 +ffffffff829e1fb8 r ath11k_hw_hal_params_qca6390 +ffffffff829e1fc8 r ath11k_hw_hal_params_wcn6750 +ffffffff829e1fd8 r ath11k_hw_tcl2wbm_rbm_map_ipq8074 +ffffffff829e1fe1 r ath11k_hw_tcl2wbm_rbm_map_wcn6750 +ffffffff829e3000 R uhci_bus_methods +ffffffff829e3030 R uhci_root_ctrl_methods +ffffffff829e3060 R uhci_root_intr_methods +ffffffff829e3090 R uhci_device_ctrl_methods +ffffffff829e30c0 R uhci_device_intr_methods +ffffffff829e30f0 R uhci_device_bulk_methods +ffffffff829e3120 R uhci_device_isoc_methods +ffffffff829e3150 R uhci_devd +ffffffff829e3162 R uhci_confd +ffffffff829e316b R uhci_ifcd +ffffffff829e3174 R uhci_endpd +ffffffff829e317b R uhci_hubd_piix +ffffffff829e4000 R revbits +ffffffff829e4020 R ohci_bus_methods +ffffffff829e4050 R ohci_root_ctrl_methods +ffffffff829e4080 R ohci_root_intr_methods +ffffffff829e40b0 R ohci_device_ctrl_methods +ffffffff829e40e0 R ohci_device_intr_methods +ffffffff829e4110 R ohci_device_bulk_methods +ffffffff829e4140 R ohci_device_isoc_methods +ffffffff829e4170 R ohci_devd +ffffffff829e4182 R ohci_confd +ffffffff829e418b R ohci_ifcd +ffffffff829e4194 R ohci_endpd +ffffffff829e419b R ohci_hubd +ffffffff829e5000 R ehci_bus_methods +ffffffff829e5030 R ehci_root_ctrl_methods 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vscsi_ca +ffffffff829ec028 R vscsi_switch +ffffffff829ec050 R vscsi_filtops +ffffffff829ed000 R mpath_ca +ffffffff829ed028 R mpath_switch +ffffffff829ee000 R softraid_ca +ffffffff829ee028 R sr_switch +ffffffff829ef000 r spdmem_basic_types +ffffffff829ef0a0 r spdmem_parity_types +ffffffff829ef0e0 r spdmem_ddr4_decode.ddr4_chipsize +ffffffff829f0000 R ufshci_switch +ffffffff829f1000 R kstat_rlock_ops +ffffffff829f1010 R kstat_wlock_ops +ffffffff829f1020 R kstat_mutex_ops +ffffffff829f1030 R kstat_cpu_ops +ffffffff829f1040 r kstat_id_tree_RBT_INFO +ffffffff829f1058 R kstat_id_tree_RBT_TYPE +ffffffff829f1060 r kstat_pv_tree_RBT_INFO +ffffffff829f1078 R kstat_pv_tree_RBT_TYPE +ffffffff829f1080 r kstat_nm_tree_RBT_INFO +ffffffff829f1098 R kstat_nm_tree_RBT_TYPE +ffffffff829f2000 r fuse_rd_filtops +ffffffff829f3000 R fusefs_vfsops +ffffffff829f3070 R fusefs_vars +ffffffff829f4000 R fusefs_vops +ffffffff829f4110 R fusefsread_filtops +ffffffff829f4140 R fusefswrite_filtops +ffffffff829f4170 R fusefsvnode_filtops +ffffffff829f5000 r pf_state_tree_RBT_INFO +ffffffff829f5018 R pf_state_tree_RBT_TYPE +ffffffff829f5020 r pf_state_tree_id_RBT_INFO +ffffffff829f5038 R pf_state_tree_id_RBT_TYPE +ffffffff829f5040 r pf_translate_af.zero +ffffffff829f6000 R hfsc_ops +ffffffff829f6038 R ifq_hfsc_ops +ffffffff829f6040 R hfsc_pf_ops +ffffffff829f6088 R pfq_hfsc_ops +ffffffff829f7000 r fqcodel_ops +ffffffff829f7038 R ifq_fqcodel_ops +ffffffff829f7040 r fqcodel_pf_ops +ffffffff829f7088 R pfq_fqcodel_ops +ffffffff829f7090 r codel_intervals +ffffffff829f8000 r pfsync_bulk_req_state_names +ffffffff829f8030 r pfsync_bulk_req_event_names +ffffffff829f8060 r pfsync_qs +ffffffff829f80d8 r pfsync_kstat_tpl +ffffffff829f82e0 r pfsync_acts +ffffffff829f9000 r bio_mappings_RBT_INFO +ffffffff829f9018 R bio_mappings_RBT_TYPE +ffffffff829fa000 R hotplugread_filtops +ffffffff829fb000 R dtps_static +ffffffff829fc000 R db_show_all_cmds +ffffffff829fc180 R db_show_cmds +ffffffff829fc4c0 R db_boot_cmds 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fifo_vops +ffffffff82a30110 R fiforead_filtops +ffffffff82a30140 R fifowrite_filtops +ffffffff82a30170 R fifoexcept_filtops +ffffffff82a31000 R regyear +ffffffff82a31020 R leapyear +ffffffff82a31040 r dos2unix +ffffffff82a31140 r u2l +ffffffff82a31240 r unix2dos +ffffffff82a32008 R msdosfs_vfsops +ffffffff82a33000 R msdosfs_vops +ffffffff82a33110 R msdosfsread_filtops +ffffffff82a33140 R msdosfswrite_filtops +ffffffff82a33170 R msdosfsvnode_filtops +ffffffff82a34000 r _utf_count +ffffffff82a35000 R ntfs_vfsops +ffffffff82a36000 R ntfs_vops +ffffffff82a37000 R bpfread_filtops +ffffffff82a37030 R bpf_mbuf_ops +ffffffff82a38000 r bpf_mem_ops +ffffffff82a39000 R priq_ops +ffffffff82a39038 R ifq_priq_ops +ffffffff82a39040 r ifq_kstat_tpl +ffffffff82a39180 r ifiq_kstat_tpl +ffffffff82a3a000 r ether_crc32_le_update.crctab +ffffffff82a3a040 r ether_crc32_be_update.crctab +ffffffff82a3b000 r lcp +ffffffff82a3b078 r ipcp +ffffffff82a3b0f0 r ipv6cp +ffffffff82a3b168 r chap +ffffffff82a3b1e0 r pap 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eoip_tree_RBT_INFO +ffffffff82a470c8 R eoip_tree_RBT_TYPE +ffffffff82a470d0 r nvgre_etherbridge_ops +ffffffff82a48000 r trunk_protos +ffffffff82a49000 R ethermulticastaddr_slowprotocols +ffffffff82a49006 R lacp_info_tlv_template +ffffffff82a4900e R marker_info_tlv_template +ffffffff82a49012 R marker_response_tlv_template +ffffffff82a49020 R lacp_timer_funcs +ffffffff82a4a000 r lacp_rxm_state_names +ffffffff82a4a040 r lacp_rxm_event_names +ffffffff82a4a090 r aggr_port_selected_names +ffffffff82a4a0b0 r lacp_mux_state_names +ffffffff82a4a0e0 r lacp_mux_event_names +ffffffff82a4a128 r lacp_address_slow +ffffffff82a4b000 r tpmr_pf_ipv4 +ffffffff82a4b018 r tpmr_pf_ipv6 +ffffffff82a4c000 r bpe_tree_RBT_INFO +ffffffff82a4c018 R bpe_tree_RBT_TYPE +ffffffff82a4c020 r bpe_etherbridge_ops +ffffffff82a4d000 R pppx_rd_filtops +ffffffff82a4d030 R pppx_wr_filtops +ffffffff82a4d060 r pppx_ifs_RBT_INFO +ffffffff82a4d078 R pppx_ifs_RBT_TYPE +ffffffff82a4d080 r pppac_rd_filtops +ffffffff82a4d0b0 r pppac_wr_filtops +ffffffff82a4e000 r vxlan_peers_RBT_INFO +ffffffff82a4e018 R vxlan_peers_RBT_TYPE +ffffffff82a4e020 r vxlan_etherbridge_ops +ffffffff82a4f000 R stoeplitz_cache +ffffffff82a50000 R ieee80211_std_rateset_11a +ffffffff82a50010 R ieee80211_std_rateset_11b +ffffffff82a50020 R ieee80211_std_rateset_11g +ffffffff82a50030 R ieee80211_std_ratesets_11n +ffffffff82a503b0 R ieee80211_std_ratesets_11ac +ffffffff82a506b0 r ieee80211_setbasicrates.basic +ffffffff82a50710 r ieee80211_setmode.chanflags +ffffffff82a50730 r ieee80211_rate2media.rates +ffffffff82a508c0 r ieee80211_media2rate.ieeerates +ffffffff82a51000 r Sbox +ffffffff82a53000 r ieee80211_ioctl.empty_macaddr +ffffffff82a54000 r ieee80211_find_rxnode.zero +ffffffff82a54008 r ieee80211_tree_RBT_INFO +ffffffff82a54020 R ieee80211_tree_RBT_TYPE +ffffffff82a54028 r ieee80211_ess_tree_RBT_INFO +ffffffff82a54040 R ieee80211_ess_tree_RBT_TYPE +ffffffff82a54048 r ieee80211_do_slow_print.merge_print_intvl +ffffffff82a55020 R ieee80211_edca_table +ffffffff82a550e0 R ieee80211_qap_edca_table +ffffffff82a56000 R ieee80211_mgt_subtype_name +ffffffff82a56080 R ieee80211_state_name +ffffffff82a560b0 R ieee80211_phymode_name +ffffffff82a57000 r ieee80211_r_ctry +ffffffff82a57ae0 r ieee80211_r_names +ffffffff82a57f80 r ieee80211_r_map +ffffffff82a59000 R zeroin46_addr +ffffffff82a59010 R zeroin_addr +ffffffff82a5a000 R inetdomain +ffffffff82a5a050 R inetsw +ffffffff82a5b000 R divertctl_vars +ffffffff82a5b030 R divert_usrreqs +ffffffff82a5c000 R icmpctl_vars +ffffffff82a5d000 R ipctl_vars_unlocked +ffffffff82a5d050 R ipctl_vars +ffffffff82a5d140 R inetctlerrmap +ffffffff82a5e000 R rip_usrreqs +ffffffff82a5f000 R tcp_timer_funcs +ffffffff82a60000 R tcp_usrreqs +ffffffff82a60090 R tcp6_usrreqs +ffffffff82a60120 R tcpctl_vars +ffffffff82a61000 R udp_usrreqs +ffffffff82a61090 R udp6_usrreqs +ffffffff82a61120 R udpctl_vars +ffffffff82a62000 R gre_usrreqs +ffffffff82a63000 r ipsec_ids_tree_RBT_INFO +ffffffff82a63018 R ipsec_ids_tree_RBT_TYPE +ffffffff82a63020 r ipsec_ids_flows_RBT_INFO +ffffffff82a63038 R ipsec_ids_flows_RBT_TYPE +ffffffff82a63040 R xformsw +ffffffff82a63158 R xformswNXFORMSW +ffffffff82a64000 R espctl_vars +ffffffff82a64050 R ahctl_vars +ffffffff82a64070 R ipcompctl_vars +ffffffff82a64090 R ipsecctl_vars +ffffffff82a65000 R ipseczeroes +ffffffff82a66000 r carp_set_state.carp_states +ffffffff82a67000 r Rcon +ffffffff82a68000 r Te2 +ffffffff82a68400 r Te3 +ffffffff82a68800 r Te0 +ffffffff82a68c00 r Te1 +ffffffff82a69000 r rcon +ffffffff82a69030 r Td0 +ffffffff82a69430 r Td1 +ffffffff82a69830 r Td2 +ffffffff82a69c30 r Td3 +ffffffff82a6a030 r Td4 +ffffffff82a6c000 r K256 +ffffffff82a6c100 r sha512_initial_hash_value +ffffffff82a6c140 r K512 +ffffffff82a6c3c0 r sha384_initial_hash_value +ffffffff82a6d000 r Blowfish_initstate.initstate +ffffffff82a6f000 r cast_sbox1 +ffffffff82a6f400 r cast_sbox2 +ffffffff82a6f800 r cast_sbox3 +ffffffff82a6fc00 r cast_sbox4 +ffffffff82a70000 r cast_sbox5 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+ffffffff82a744c0 R auth_hash_gmac_aes_256 +ffffffff82a74508 R auth_hash_chacha20_poly1305 +ffffffff82a74550 R comp_algo_deflate +ffffffff82a75000 r IV +ffffffff82a76000 r idgen32_ftable +ffffffff82a77000 r Chacha20_Poly1305_Update.zeroes +ffffffff82a77010 r pad0 +ffffffff82a78000 r null_point +ffffffff82a78020 r base_point +ffffffff82a79000 R mplsdomain +ffffffff82a7a000 R mplsctl_vars +ffffffff82a7b000 r nfsread_filtops +ffffffff82a7b030 r nfswrite_filtops +ffffffff82a7b060 r nfsvnode_filtops +ffffffff82a7c000 r nfs_nodetree_RBT_INFO +ffffffff82a7c018 R nfs_nodetree_RBT_TYPE +ffffffff82a7d000 r nfs_ptimers +ffffffff82a7e000 R nfsv2_type +ffffffff82a7e030 R nfsv3_type +ffffffff82a7e060 R nv2tov_type +ffffffff82a7e080 R nv3tov_type +ffffffff82a7e0a0 R nfsv3_procid +ffffffff82a7e100 R nfsv2_procid +ffffffff82a7e160 r nfsrv_v3errmap +ffffffff82a7e210 r nfsrv_v2errmap +ffffffff82a7e256 r nfsv3err_null +ffffffff82a7e25a r nfsv3err_getattr +ffffffff82a7e270 r nfsv3err_setattr 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R kv_page +ffffffff82a90048 R kp_dirty +ffffffff82a90070 R kp_dma +ffffffff82a90098 R kp_dma_contig +ffffffff82a900c0 R kp_dma_zero +ffffffff82a900e8 R kp_zero +ffffffff82a90110 R kp_pageable +ffffffff82a90138 R kp_none +ffffffff82a90160 R kd_waitok +ffffffff82a90178 R kd_nowait +ffffffff82a90190 R kd_trylock +ffffffff82a91000 R vmmapbsy +ffffffff82a91010 r page_flagbits +ffffffff82a910a8 r uvm_map_addr_RBT_INFO +ffffffff82a910c0 R uvm_map_addr_RBT_TYPE +ffffffff82a92000 R pmap_pager +ffffffff82a92048 R bufcache_pager +ffffffff82a93000 r uvm_objtree_RBT_INFO +ffffffff82a93018 R uvm_objtree_RBT_TYPE +ffffffff82a94000 r uvm_pmr_addr_RBT_INFO +ffffffff82a94018 R uvm_pmr_addr_RBT_TYPE +ffffffff82a94020 r uvm_pmr_size_RBT_INFO +ffffffff82a94038 R uvm_pmr_size_RBT_TYPE +ffffffff82a94040 r uvm_pmemrange_addr_RBT_INFO +ffffffff82a94058 R uvm_pmemrange_addr_RBT_TYPE +ffffffff82a95000 R uvm_vnodeops +ffffffff82a95048 r uvn_flush.interval +ffffffff82a96000 R zeroin6_addr +ffffffff82a97000 R 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normal_pdes +ffffffff82ab2000 R trap_type +ffffffff82ab20b0 R trap_types +ffffffff82ab3000 r x86fpflags_to_siginfo.x86fp_siginfo_table +ffffffff82ab4000 R x86_soft_intr_to_ssir +ffffffff82ab6000 R Xexceptions +ffffffff82ab6100 r spl_lowered +ffffffff82ab612d R i8259_stubs +ffffffff82ab62ad R ioapic_edge_stubs +ffffffff82ab68ad R ioapic_level_stubs +ffffffff82ab7000 R _stac +ffffffff82ab7003 R _clac +ffffffff82ab8000 R x86_bus_space_io_ops +ffffffff82ab8130 R x86_bus_space_mem_ops +ffffffff82ab9000 ? cpu_spinup_trampoline +ffffffff82ab90b6 R cpu_spinup_trampoline_end +ffffffff82ab90b6 R mp_tramp_data_start +ffffffff82ab90fc R mp_tramp_data_end +ffffffff82abb000 R db_acpi_cmds +ffffffff82abb0a0 R db_machine_command_table +ffffffff82abc000 r i8254_delay.delaytab +ffffffff82abd000 R rasops_cmap +ffffffff82abe000 r reverse +ffffffff82abe100 r ibm437_level1 +ffffffff82abe230 r ibm437_level2_0 +ffffffff82abe248 r ibm437_level2_1 +ffffffff82abe260 r ibm437_level2_3 +ffffffff82abe278 r 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R hds_ca +ffffffff82aed028 R hds_mpath_ops +ffffffff82aee000 R atapiscsi_ca +ffffffff82aee028 r atapiscsi_switch +ffffffff82aef000 R wd_ca +ffffffff82af0000 R atascsi_switch +ffffffff82af1000 R mainbus_ca +ffffffff82af2000 R bios_ca +ffffffff82af3000 R mpbios_ca +ffffffff82af3030 r loc_where +ffffffff82af4000 R mpbios_icu_table +ffffffff82af5000 R cpu_ca +ffffffff82af6000 R lapic_timer_intrclock +ffffffff82af7000 R ioapic_ca +ffffffff82af8000 R efifb_ca +ffffffff82af8028 R efifb_screen_list +ffffffff82af9000 R pvbus_ca +ffffffff82afa000 R pvclock_ca +ffffffff82afb000 R vmt_ca +ffffffff82afc000 R xen_ca +ffffffff82afd000 R xs_errors +ffffffff82afe000 R xnf_ca +ffffffff82aff000 R xbf_ca +ffffffff82aff028 R xbf_switch +ffffffff82b00000 R hyperv_ca +ffffffff82b00028 R hv_guid_network +ffffffff82b00038 R hv_guid_ide +ffffffff82b00048 R hv_guid_scsi +ffffffff82b00058 R hv_guid_shutdown +ffffffff82b00068 R hv_guid_timesync +ffffffff82b00078 R hv_guid_heartbeat +ffffffff82b00088 R hv_guid_kvp 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pci_subclass_input +ffffffff82b0d770 R pci_subclass_dock +ffffffff82b0d7c0 R pci_subclass_processor +ffffffff82b0d880 R pci_subclass_serialbus +ffffffff82b0d990 R pci_subclass_wireless +ffffffff82b0da70 R pci_subclass_i2o +ffffffff82b0daa0 R pci_subclass_satcom +ffffffff82b0db20 R pci_subclass_crypto +ffffffff82b0db80 R pci_subclass_dasp +ffffffff82b0dc10 R pci_class +ffffffff82b0de20 r pci_known_vendors +ffffffff82b0f410 r pci_known_products +ffffffff82b33000 R vga_pci_ca +ffffffff82b33030 r vga_devs +ffffffff82b34000 R ahc_pci_ident_table +ffffffff82b345d0 R ahc_pci_ca +ffffffff82b35000 R ahd_pci_ident_table +ffffffff82b35198 R ahd_num_pci_devs +ffffffff82b351a0 R ahd_pci_ca +ffffffff82b351d0 r pci_bus_modes +ffffffff82b35210 r pci_status_strings +ffffffff82b35250 r pci_status_source +ffffffff82b35290 r split_status_strings +ffffffff82b36000 R adw_pci_ca +ffffffff82b36028 R adw_pci_devices +ffffffff82b37000 r adw_3550_Default_EEPROM +ffffffff82b37080 r adw_38C0800_Default_EEPROM +ffffffff82b37100 r adw_38C1600_Default_EEPROM +ffffffff82b38000 R adw_asc3550_mcode +ffffffff82b393a0 R adw_asc3550_mcode_data +ffffffff82b393b0 R adw_asc38C0800_mcode +ffffffff82b3a888 R adw_asc38C0800_mcode_data +ffffffff82b3a8a0 R adw_asc38C1600_mcode +ffffffff82b3c160 R adw_asc38C1600_mcode_data +ffffffff82b3d000 R twe_pci_ca +ffffffff82b3d028 R twe_pci_devices +ffffffff82b3e000 R arc_ca +ffffffff82b3e028 R arc_switch +ffffffff82b3e050 r arc_devices +ffffffff82b3e190 r arc_intel +ffffffff82b3e198 r arc_marvell +ffffffff82b3e1a0 r arc_lsi +ffffffff82b3e1a8 r arc_marvell2 +ffffffff82b3f000 R jmb_ca +ffffffff82b3f030 r jmb_devices +ffffffff82b40000 R ahci_pci_ca +ffffffff82b40028 R ahci_jmb_ca +ffffffff82b40050 r ahci_devices +ffffffff82b41000 R nvme_pci_ca +ffffffff82b42000 R ami_pci_ca +ffffffff82b42030 r ami_pci_subsys +ffffffff82b42270 r ami_pci_vendors +ffffffff82b43000 R mfi_pci_ca +ffffffff82b43030 r mfi_pci_devices +ffffffff82b44000 R mfii_ca +ffffffff82b44028 R mfii_switch +ffffffff82b44050 R mfii_pd_switch +ffffffff82b44078 R mfii_iop_thunderbolt +ffffffff82b44088 R mfii_iop_25 +ffffffff82b44098 R mfii_iop_35 +ffffffff82b440b0 R mfii_devices +ffffffff82b44180 r mfi_bbu_indicators +ffffffff82b45000 R ips_ca +ffffffff82b45028 r ips_ids +ffffffff82b45040 r ips_chips +ffffffff82b45090 r ips_names +ffffffff82b45128 r ips_switch +ffffffff82b45150 r ips_pt_switch +ffffffff82b46000 R eap_ca +ffffffff82b46028 R eap1370_hw_if +ffffffff82b460e0 R eap1371_hw_if +ffffffff82b46198 R eap_midi_hw_if +ffffffff82b461d0 R eap_devices +ffffffff82b47000 R auacer_pci_devices +ffffffff82b47008 R auacer_ca +ffffffff82b47030 R auacer_hw_if +ffffffff82b48000 R auich_ca +ffffffff82b48028 R auich_hw_if +ffffffff82b480e0 r auich_devices +ffffffff82b49000 R azalia_ca +ffffffff82b49028 R azalia_hw_if +ffffffff82b490e0 R azalia_pci_devices +ffffffff82b49120 r pin_devices +ffffffff82b491a0 r line_colors +ffffffff82b49220 r wtypes +ffffffff82b4a000 r azalia_codec_init_dolby_atmos.atmos_init +ffffffff82b4a050 r azalia_codec_init_dolby_atmos.atmos_v23_v25 +ffffffff82b4b000 R envy_ca +ffffffff82b4b028 R envy_hw_if +ffffffff82b4b0e0 R envy_midi_hw_if +ffffffff82b4c000 R emuxki_devices +ffffffff82b4c010 R emu_ca +ffffffff82b4c038 R emuxki_hw_if +ffffffff82b4c0f0 r emuxki_recbuf_sz +ffffffff82b4c170 r emuxki_recsrc_szreg +ffffffff82b4c17c r emuxki_recsrc_bufaddrreg +ffffffff82b4c190 r emuxki_rate_to_pitch.logMagTable +ffffffff82b4c390 r emuxki_rate_to_pitch.logSlopeTable +ffffffff82b4d000 R auixp_pci_devices +ffffffff82b4d010 R auixp_ca +ffffffff82b4d038 R auixp_hw_if +ffffffff82b4e000 R clcs_ca +ffffffff82b4e028 R cs4280_hw_if +ffffffff82b4e0e0 R cs4280_devices +ffffffff82b4f000 R yds_ca +ffffffff82b4f028 r yds_hw_if +ffffffff82b4f0e0 r yds_chip_capability_list +ffffffff82b4f120 r yds_get_lpfk.lpfkt +ffffffff82b4f160 r yds_get_lpfq.lpfqt +ffffffff82b50000 R auvia_ca +ffffffff82b50028 R auvia_hw_if +ffffffff82b500e0 R auvia_devices +ffffffff82b500f0 r auvia_set_params_sub.slottab +ffffffff82b51000 R gdt_pci_ca +ffffffff82b52000 R ciss_pci_ca +ffffffff82b52030 R ciss_pci_devices +ffffffff82b53000 R qlw_pci_ca +ffffffff82b53030 r qlw_devices +ffffffff82b53050 r isp_1040_risc_code +ffffffff82b589f0 r isp_1080_risc_code +ffffffff82b60470 r isp_12160_risc_code +ffffffff82b68000 R qla_pci_ca +ffffffff82b68030 r qla_devices +ffffffff82b69000 R qle_ca +ffffffff82b69028 R qle_switch +ffffffff82b69050 r qle_devices +ffffffff82b69070 r isp_2400_risc_code +ffffffff82b98a50 r isp_2500_risc_code +ffffffff82bcb000 R mpi_pci_ca +ffffffff82bcb030 r mpi_devices +ffffffff82bcc000 R mpii_ca +ffffffff82bcc028 R mpii_switch +ffffffff82bcc050 r mpii_devices +ffffffff82bcd000 R sili_pci_ca +ffffffff82bcd030 r sili_devices +ffffffff82bce000 R aq_devices +ffffffff82bce060 R aq_products +ffffffff82bce1d0 R aq_fw1x_ops +ffffffff82bce1f8 R aq_fw2x_ops +ffffffff82bce220 R aq2_fw_ops +ffffffff82bce248 R aq_ca +ffffffff82bcf000 R de_ca +ffffffff82bcf030 r tulip_srom_conninfo +ffffffff82bcf120 r tulip_mii_phy_attrlist +ffffffff82bcf1e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff82bcf208 r tulip_21040_10baset_only_boardsw +ffffffff82bcf230 r tulip_21040_boardsw +ffffffff82bcf258 r tulip_2114x_isv_boardsw +ffffffff82bcf280 r tulip_21140_smc9332_boardsw +ffffffff82bcf2a8 r tulip_21040_auibnc_only_boardsw +ffffffff82bcf2d0 r tulip_21140_cogent_em100_boardsw +ffffffff82bcf2f8 r tulip_21140_accton_boardsw +ffffffff82bcf320 r tulip_21140_eb_boardsw +ffffffff82bcf348 r tulip_21041_boardsw +ffffffff82bcf370 r tulip_read_macaddr.testpat +ffffffff82bcf380 r tulip_vendors +ffffffff82bcf430 r tulip_media_to_ifmedia +ffffffff82bcf490 r tulip_chipdescs +ffffffff82bd0000 R ep_pci_ca +ffffffff82bd0030 R ep_pci_devices +ffffffff82bd1000 R pcn_ca +ffffffff82bd1028 R pcn_devices +ffffffff82bd1030 r pcn_79c970_rcvfw +ffffffff82bd1050 r pcn_79c970_xmtsp +ffffffff82bd1070 r pcn_79c970_xmtfw +ffffffff82bd1090 r pcn_79c971_rcvfw +ffffffff82bd10b0 r pcn_79c971_xmtsp_sram +ffffffff82bd10d0 r pcn_79c971_xmtsp +ffffffff82bd10f0 r pcn_79c971_xmtfw +ffffffff82bd1110 r pcn_variants +ffffffff82bd2000 R siop_products +ffffffff82bd3000 R siop_pci_ca +ffffffff82bd4000 R rdcide_setup +ffffffff82bd4005 R rdcide_hold +ffffffff82bd400a R rdcide_udmatim +ffffffff82bd4010 R rdcide_udmaclk +ffffffff82bd4028 R default_product_desc +ffffffff82bd4040 R pciide_intel_products +ffffffff82bd4630 R pciide_amd_products +ffffffff82bd4690 R pciide_cmd_products +ffffffff82bd4730 R pciide_via_products +ffffffff82bd4810 R pciide_cypress_products +ffffffff82bd4820 R pciide_sis_products +ffffffff82bd4870 R pciide_natsemi_products +ffffffff82bd4890 R pciide_acer_products +ffffffff82bd48a0 R pciide_triones_products +ffffffff82bd48f0 R pciide_promise_products +ffffffff82bd4ac0 R pciide_acard_products +ffffffff82bd4b10 R pciide_serverworks_products +ffffffff82bd4bb0 R pciide_nvidia_products +ffffffff82bd4e80 R pciide_ite_products +ffffffff82bd4ea0 R pciide_ati_products +ffffffff82bd4f20 R pciide_jmicron_products +ffffffff82bd4f70 R pciide_phison_products +ffffffff82bd4f80 R pciide_rdc_products +ffffffff82bd4f90 R pciide_vendors +ffffffff82bd5140 R pciide_pci_ca +ffffffff82bd5168 R pciide_jmb_ca +ffffffff82bd5190 r piix_isp_dma +ffffffff82bd5193 r piix_rtc_dma +ffffffff82bd5196 r apollo_pio_set +ffffffff82bd519b r cmd0643_9_data_tim_pio +ffffffff82bd51a0 r cmd0643_9_data_tim_dma +ffffffff82bd51a3 r cmd680_channel_map.init_val +ffffffff82bd51b1 r cmd680_setup_channel.udma2_tbl +ffffffff82bd51b8 r cmd680_setup_channel.dma_tbl +ffffffff82bd51be r cmd680_setup_channel.pio_tbl +ffffffff82bd51d0 r satalink_ba5_regmap +ffffffff82bd5690 r sii3114_chansetup.channel_names +ffffffff82bd56b0 r cy_pio_pulse +ffffffff82bd56c0 r sis_udma133new_tim +ffffffff82bd56e0 r sis_pio133new_tim +ffffffff82bd56f4 r sis_dma133new_tim +ffffffff82bd5700 r sis_udma66_tim +ffffffff82bd5706 r sis_udma100new_tim +ffffffff82bd570c r sis_udma133old_tim +ffffffff82bd5713 r sis_pio_act +ffffffff82bd5718 r sis_pio_rec +ffffffff82bd571d r natsemi_pio_pulse +ffffffff82bd5722 r natsemi_pio_recover +ffffffff82bd5727 r natsemi_dma_pulse +ffffffff82bd572a r natsemi_dma_recover +ffffffff82bd5730 r scx200_udma33 +ffffffff82bd573c r scx200_dma33 +ffffffff82bd5750 r scx200_pio33 +ffffffff82bd5778 r acer_udma +ffffffff82bd577e r acer_pio +ffffffff82bd5790 r hpt370_pio +ffffffff82bd57a4 r hpt370_dma +ffffffff82bd57b0 r hpt370_udma +ffffffff82bd57d0 r hpt372_pio +ffffffff82bd57e4 r hpt372_dma +ffffffff82bd57f0 r hpt372_udma +ffffffff82bd580c r hpt366_dma +ffffffff82bd5820 r hpt366_udma +ffffffff82bd5840 r hpt374_pio +ffffffff82bd5854 r hpt374_dma +ffffffff82bd5860 r hpt374_udma +ffffffff82bd587c r pdc2xx_pa +ffffffff82bd5881 r pdc2xx_pb +ffffffff82bd5886 r pdc2xx_dma_mb +ffffffff82bd5889 r pdc2xx_dma_mc +ffffffff82bd588c r pdc2xx_udma_mc +ffffffff82bd5892 r acard_act_udma +ffffffff82bd5899 r acard_rec_udma +ffffffff82bd58a0 r acard_udma_conf +ffffffff82bd58a7 r acard_act_dma +ffffffff82bd58aa r acard_rec_dma +ffffffff82bd58ad r acard_act_pio +ffffffff82bd58b2 r acard_rec_pio +ffffffff82bd58b7 r nforce_udma +ffffffff82bd58be r nforce_pio +ffffffff82bd58c3 r ixp_mdma_timings +ffffffff82bd58c6 r ixp_pio_timings +ffffffff82bd6000 R ppb_ca +ffffffff82bd7000 R cy_pci_ca +ffffffff82bd7030 R cy_pci_devices +ffffffff82bd8000 R rl_pci_ca +ffffffff82bd8030 R rl_pci_devices +ffffffff82bd9000 R re_pci_devices +ffffffff82bd9030 R re_pci_ca +ffffffff82bda000 R vr_ca +ffffffff82bdb000 R txp_ca +ffffffff82bdb030 R txp_devices +ffffffff82bdc000 r cards +ffffffff82bdd000 r format_params +ffffffff82bdd1a0 r pixfmt_table +ffffffff82bdd320 r meteor_pixfmt_table +ffffffff82bde000 R bktr_ca +ffffffff82bde028 R bktr_hw_if +ffffffff82bdf000 r tuners +ffffffff82bdf170 r freqTable +ffffffff82bdf260 r nabcst +ffffffff82bdf2a0 r irccable +ffffffff82bdf310 r hrccable +ffffffff82bdf380 r weurope +ffffffff82bdf420 r jpnbcst +ffffffff82bdf460 r jpncable +ffffffff82bdf4c0 r xussr +ffffffff82bdf530 r australia +ffffffff82bdf590 r france +ffffffff82be0000 R xl_pci_ca +ffffffff82be0030 R xl_pci_devices +ffffffff82be1000 R fxp_pci_ca +ffffffff82be1030 R fxp_pci_devices +ffffffff82be2000 R em_devices +ffffffff82be2308 R em_ca +ffffffff82be2330 r em_counters +ffffffff82be3000 r em_igp_cable_length_table +ffffffff82be3100 r em_igp_2_cable_length_table +ffffffff82be4000 R ixgb_devices +ffffffff82be4010 R ixgb_ca +ffffffff82be5000 R ixgbe_devices +ffffffff82be50b8 R ix_ca +ffffffff82be50e0 r ix_counters +ffffffff82be53e0 r ix_rxq_kstats_tpl +ffffffff82be5458 r ix_txq_kstats_tpl +ffffffff82be6000 r ixgbe_mvals_base +ffffffff82be6060 r ixgbe_mvals_X540 +ffffffff82be60c0 r ixgbe_mvals_X550 +ffffffff82be6120 r ixgbe_mvals_X550EM_x +ffffffff82be6180 r ixgbe_mvals_X550EM_a +ffffffff82be9000 R ixl_ca +ffffffff82be9030 R ixl_port_counters +ffffffff82be92c0 R ixl_vsi_counters +ffffffff82be9380 r ixl_devices +ffffffff82be94c0 r ixl_710 +ffffffff82be94e8 r ixl_722 +ffffffff82be9510 r ixl_pf_aq_regs +ffffffff82be9578 r ixl_710_decrepit +ffffffff82be95a0 r ixl_phy_type_map +ffffffff82be9770 r ixl_speed_type_map +ffffffff82be97b0 r ixl_hmc_pack_rxq +ffffffff82be9830 r ixl_hmc_pack_txq +ffffffff82be98a0 r ixl_sfp_ops +ffffffff82be98b8 r ixl_qsfp_ops +ffffffff82bea000 r dwqe_pci_devices +ffffffff82bea018 R dwqe_pci_ca +ffffffff82beb000 R xge_ca +ffffffff82beb028 R xge_devices +ffffffff82beb030 r xge_fix_mac +ffffffff82beb110 r xge_xena_dtx_cfg +ffffffff82beb170 r xge_herc_dtx_cfg +ffffffff82bec000 R thtc_ca +ffffffff82bec028 R tht_ca +ffffffff82bec050 r thtc_devices +ffffffff82bec068 r tht_link_state.interval +ffffffff82bed000 R myx_ca +ffffffff82bed028 R myx_devices +ffffffff82bee000 R oce_ca +ffffffff82bee030 R oce_devices +ffffffff82bef000 R dc_pci_ca +ffffffff82bf0000 R epic_pci_ca +ffffffff82bf0028 R epic_pci_devices +ffffffff82bf1000 R ti_pci_ca +ffffffff82bf1030 R ti_devices +ffffffff82bf2000 R ne_pci_ca +ffffffff82bf2030 R ne_pci_prod +ffffffff82bf3000 R gem_pci_ca +ffffffff82bf3030 R gem_pci_devices +ffffffff82bf3050 r gem_promhdr +ffffffff82bf3052 r gem_promdat +ffffffff82bf305a r gem_promdat2 +ffffffff82bf4000 R cas_ca +ffffffff82bf4028 R cas_pci_devices +ffffffff82bf4030 r cas_promhdr +ffffffff82bf4032 r cas_promdat_sun +ffffffff82bf403a r cas_promdat_ns +ffffffff82bf4042 r cas_promdat2 +ffffffff82bf5000 R sf_pci_ca +ffffffff82bf5028 R sf_pci_products +ffffffff82bf6000 R sis_ca +ffffffff82bf6028 R sis_devices +ffffffff82bf7000 R se_devices +ffffffff82bf7008 R se_ca +ffffffff82bf8000 R mbg_ca +ffffffff82bf8030 R mbg_devices +ffffffff82bf9000 R uhci_pci_ca +ffffffff82bfa000 R ohci_pci_ca +ffffffff82bfb000 R ehci_pci_ca +ffffffff82bfc000 R xhci_pci_ca +ffffffff82bfd000 R cbb_pci_ca +ffffffff82bfd028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff82bfe000 R skc_devices +ffffffff82bfe030 R skc_ca +ffffffff82bfe058 R sk_ca +ffffffff82bff000 R mskc_devices +ffffffff82bff0a8 R mskc_ca +ffffffff82bff0d0 R msk_ca +ffffffff82bff100 r msk_mib +ffffffff82c00000 R puc_pci_ca +ffffffff82c01000 R puc_devs +ffffffff82c06000 R com_puc_ca +ffffffff82c06030 r puc_port_types +ffffffff82c07000 R lpt_puc_ca +ffffffff82c08000 R wi_pci_ca +ffffffff82c08030 r wi_pci_products +ffffffff82c09000 R an_pci_ca +ffffffff82c09030 R an_pci_devices +ffffffff82c0a000 R iwi_devices +ffffffff82c0a010 R iwi_ca +ffffffff82c0b000 R wpi_ca +ffffffff82c0b028 r wpi_devices +ffffffff82c0b030 r wpi_rates +ffffffff82c0b050 r wpi_rf_gain_5ghz +ffffffff82c0b0a0 r wpi_dsp_gain_5ghz +ffffffff82c0b0f0 r wpi_rf_gain_2ghz +ffffffff82c0b140 r wpi_dsp_gain_2ghz +ffffffff82c0b190 r wpi_pmgt +ffffffff82c0b310 r wpi_bands +ffffffff82c0c000 R iwn_mcs2ridx +ffffffff82c0c020 R iwn_ca +ffffffff82c0c050 r iwn_devices +ffffffff82c0c0e8 r iwn4965_sensitivity_limits +ffffffff82c0c124 r iwn5000_sensitivity_limits +ffffffff82c0c160 r iwn5150_sensitivity_limits +ffffffff82c0c19c r iwn1000_sensitivity_limits +ffffffff82c0c1d8 r iwn6000_sensitivity_limits +ffffffff82c0c214 r iwn2000_sensitivity_limits +ffffffff82c0c250 r iwn_fw_errmsg +ffffffff82c0c340 r iwn4965_set_txpower.tdiv +ffffffff82c0c360 r iwn4965_rf_gain_5ghz +ffffffff82c0c3d0 r iwn4965_dsp_gain_5ghz +ffffffff82c0c440 r iwn4965_dsp_gain_2ghz +ffffffff82c0c4b0 r iwn_pmgt +ffffffff82c0c6f0 r iwn4965_post_alive.qid2fifo +ffffffff82c0c700 r iwn_bands +ffffffff82c0c770 r iwn_rates +ffffffff82c0c820 r iwn4965_rf_gain_2ghz +ffffffff82c0d000 R iwm_nvm_channels +ffffffff82c0d030 R iwm_nvm_channels_8000 +ffffffff82c0d070 R iwm_rates +ffffffff82c0d0d0 R iwm_ht_mcs2ridx +ffffffff82c0d110 R iwm_tid_to_ac +ffffffff82c0d118 R iwm_ac_to_tx_fifo +ffffffff82c0d120 R iwm_nvm_to_read +ffffffff82c0d144 r iwm_set_hw_address_8000.reserved_mac +ffffffff82c0d180 r iwm_sf_full_timeout +ffffffff82c0d1b0 r iwm_sf_full_timeout_def +ffffffff82c0d1e0 r advanced_lookup +ffffffff82c0d320 r iwm_devices +ffffffff82c0d360 R iwm_ca +ffffffff82c0e000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff82c0e020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff82c0e040 R iwx_qu_b0_hr1_b0 +ffffffff82c0e060 R iwx_qu_b0_hr_b0 +ffffffff82c0e080 R iwx_ax201_cfg_qu_hr +ffffffff82c0e0a0 R iwx_qu_c0_hr1_b0 +ffffffff82c0e0c0 R iwx_qu_c0_hr_b0 +ffffffff82c0e0e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff82c0e100 R iwx_quz_a0_hr1_b0 +ffffffff82c0e120 R iwx_ax201_cfg_quz_hr +ffffffff82c0e140 R iwx_cfg_so_a0_hr_b0 +ffffffff82c0e160 R iwx_cfg_quz_a0_hr_b0 +ffffffff82c0e180 R iwx_2ax_cfg_so_gf_a0 +ffffffff82c0e1a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff82c0e1c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff82c0e1e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff82c0e200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff82c0e220 R iwx_2ax_cfg_so_jf_b0 +ffffffff82c0e240 R iwx_nvm_channels_8000 +ffffffff82c0e280 R iwx_rates +ffffffff82c0e2e0 R iwx_mcs2ridx +ffffffff82c0e320 R iwx_tid_to_ac +ffffffff82c0e328 R iwx_ac_to_tx_fifo +ffffffff82c0e330 r iwx_nvm_channels_uhb +ffffffff82c0e39e r iwx_is_valid_mac_addr.reserved_mac +ffffffff82c0e3b0 r iwx_sf_full_timeout +ffffffff82c0e3e0 r iwx_sf_full_timeout_def +ffffffff82c0e410 r advanced_lookup +ffffffff82c0e550 r iwx_devices +ffffffff82c0e590 r iwx_dev_info_table +ffffffff82c0ee18 R iwx_ca +ffffffff82c0f000 R qwx_pci_ca +ffffffff82c0f028 r qwx_pci_devices +ffffffff82c0f030 R qwx_msi_config_one_msi +ffffffff82c0f050 R qwx_msi_config +ffffffff82c0f0c8 r qwx_pci_ops_qca6390 +ffffffff82c0f0f8 r qwx_pci_ops_qcn9074 +ffffffff82c10000 R cmpci_ca +ffffffff82c10028 R cmpci_hw_if +ffffffff82c100e0 r cmpci_rate_table +ffffffff82c10120 R cmpci_devices +ffffffff82c10130 r cmpci_query_devinfo.mixer_port_names +ffffffff82c10160 r cmpci_query_devinfo.mixer_classes +ffffffff82c11000 R iha_pci_ca +ffffffff82c11028 R iha_switch +ffffffff82c12000 R pcscp_ca +ffffffff82c13000 R bge_ca +ffffffff82c13030 R bge_devices +ffffffff82c131b0 r bge_revisions +ffffffff82c13610 r bge_majorrevs +ffffffff82c13790 r bge_kstat_tpl +ffffffff82c14000 R bnx_devices +ffffffff82c14020 R bnx_ca +ffffffff82c15000 R vge_ca +ffffffff82c15028 R vge_devices +ffffffff82c16000 R stge_ca +ffffffff82c16028 R stge_mii_bitbang_ops +ffffffff82c16050 R stge_devices +ffffffff82c17000 R nfe_ca +ffffffff82c17030 R nfe_devices +ffffffff82c18000 R et_devices +ffffffff82c18008 R et_ca +ffffffff82c19000 R jme_devices +ffffffff82c19008 R jme_ca +ffffffff82c1a000 R age_devices +ffffffff82c1a008 R age_ca +ffffffff82c1b000 R alc_devices +ffffffff82c1b038 R alc_ca +ffffffff82c1c000 R ale_devices +ffffffff82c1c008 R ale_ca +ffffffff82c1d000 R amdpm_ca +ffffffff82c1d030 R amdpm_ids +ffffffff82c1e000 R bce_ca +ffffffff82c1e028 R bce_devices +ffffffff82c1f000 R ath_pci_ca +ffffffff82c20000 R athn_pci_ca +ffffffff82c20030 r athn_pci_devices +ffffffff82c21000 R atw_pci_ca +ffffffff82c21028 R atw_pci_devices +ffffffff82c22000 R rtw_pci_ca +ffffffff82c22030 R rtw_pci_products +ffffffff82c23000 R rtwn_pci_ca +ffffffff82c23030 r rtwn_pci_devices +ffffffff82c23040 r rtl8188eu_mac +ffffffff82c231b0 r rtl8192cu_mac +ffffffff82c23310 r rtl8192ce_mac +ffffffff82c23458 r rtl8188eu_bb_prog +ffffffff82c23480 r rtl8723a_bb_prog +ffffffff82c234a8 r rtl8192ce_bb_prog_1t +ffffffff82c234d0 r rtl8192ce_bb_prog_2t +ffffffff82c23500 r rtl8188eu_bb_regs +ffffffff82c23680 r rtl8188eu_bb_vals +ffffffff82c23980 r rtl8188eu_agc_vals +ffffffff82c23b80 r rtl8723a_bb_regs +ffffffff82c23d00 r rtl8723a_bb_vals +ffffffff82c23ff0 r rtl8192ce_agc_vals +ffffffff82c24270 r rtl8192ce_bb_regs +ffffffff82c243f0 r rtl8192ce_bb_vals_1t +ffffffff82c246e0 r rtl8192ce_bb_vals_2t +ffffffff82c25000 R ral_pci_ca +ffffffff82c25030 R ral_pci_devices +ffffffff82c26000 R acx_pci_ca +ffffffff82c26028 R acx_pci_devices +ffffffff82c27000 R pgt_pci_ca +ffffffff82c27028 R pgt_pci_devices +ffffffff82c28000 R malo_pci_ca +ffffffff82c28028 R malo_pci_devices +ffffffff82c29000 R bwi_pci_ca +ffffffff82c29030 R bwi_pci_devices +ffffffff82c2a000 R piixpm_ca +ffffffff82c2a030 R piixpm_ids +ffffffff82c2b000 R vic_ca +ffffffff82c2b028 R vic_devices +ffffffff82c2c000 R vmx_devices +ffffffff82c2c008 R vmx_ca +ffffffff82c2c030 r vmx_tx_kstat_tpl +ffffffff82c2c0d0 r vmx_kstat_rate +ffffffff82c2c0e0 r vmx_rx_kstat_tpl +ffffffff82c2d000 R vmwpvs_ca +ffffffff82c2d028 R vmwpvs_switch +ffffffff82c2e000 R lii_ca +ffffffff82c2e028 R lii_devices +ffffffff82c2f000 R ichiic_ca +ffffffff82c2f030 R ichiic_ids +ffffffff82c30000 R viapm_ca +ffffffff82c30030 R viapm_ids +ffffffff82c30070 r val_to_temp +ffffffff82c30870 r val_to_uV.mult +ffffffff82c31000 R amdiic_ca +ffffffff82c31028 R amdiic_ids +ffffffff82c32000 R nviic_ca +ffffffff82c32030 R nviic_ids +ffffffff82c33000 R sdhc_pci_ca +ffffffff82c34000 R kate_ca +ffffffff82c34030 r kate_proc +ffffffff82c35000 R km_ca +ffffffff82c35030 r km_devices +ffffffff82c36000 R ksmn_ca +ffffffff82c36030 r ksmn_devices +ffffffff82c37000 R iosf_pci_ca +ffffffff82c38000 R itherm_devices +ffffffff82c38008 R itherm_ca +ffffffff82c39000 R pchtemp_ca +ffffffff82c39030 R pchtemp_devices +ffffffff82c3a000 R rtsx_pci_ca +ffffffff82c3b000 R xspd_ca +ffffffff82c3b028 R xspd_devices +ffffffff82c3c000 R virtio_pci_ca +ffffffff82c3c028 R virtio_pci_ops +ffffffff82c3d000 R dwiic_pci_ca +ffffffff82c3d030 R dwiic_pci_ids +ffffffff82c3e000 R bwfm_pci_ca +ffffffff82c3e030 r bwfm_pci_devices +ffffffff82c3f000 R ccp_pci_ca +ffffffff82c3f030 r ccp_pci_devices +ffffffff82c40000 R bnxt_devices +ffffffff82c40040 R bnxt_ca +ffffffff82c41000 R mcx_ca +ffffffff82c41030 r mcx_devices +ffffffff82c41060 r mcx_rss_config +ffffffff82c410d0 r mcx_eth_cap_map +ffffffff82c412d0 r mcx_ext_eth_cap_map +ffffffff82c413d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff82c413e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82c41400 r mcx_kstat_ppcnt_rfc2819 +ffffffff82c41418 r mcx_kstat_ppcnt_rfc3635 +ffffffff82c41430 r mcx_ppcnt_ieee8023_tpl +ffffffff82c415b0 r mcx_ppcnt_rfc2863_tpl +ffffffff82c416c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82c41870 r mcx_ppcnt_rfc3635_tpl +ffffffff82c419b0 r mcx_kstat_mtmp_tpl +ffffffff82c41a50 r mcx_kstat_mtmp_rate +ffffffff82c41a60 r mcx_queue_kstat_tpl +ffffffff82c42000 R iavf_ca +ffffffff82c42030 r iavf_devices +ffffffff82c42040 r iavf_aq_regs +ffffffff82c420b0 r iavf_link_speeds +ffffffff82c43000 R rge_ca +ffffffff82c43028 R rge_devices +ffffffff82c43040 r rge_phy_config_mac_cfg2_8126.mac_cfg2_a438_value +ffffffff82c43070 r rge_phy_config_mac_cfg2_8126.mac_cfg2_b87e_value +ffffffff82c430c0 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff82c430e0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff82c43140 r rtl8125_mac_cfg3_mcu +ffffffff82c439e0 r rtl8125_mac_cfg5_mcu +ffffffff82c44a00 r rtl8126_mac_cfg2_mcu +ffffffff82c4ba20 r rtl8125_mac_bps +ffffffff82c4be20 r rtl8125b_mac_bps +ffffffff82c4c048 r rge_kstats_tpl +ffffffff82c4d000 R igc_devices +ffffffff82c4d040 R igc_ca +ffffffff82c4d070 r igc_counters +ffffffff82c4e000 R ngbe_devices +ffffffff82c4e008 R ngbe_ca +ffffffff82c4f000 R com_pci_ca +ffffffff82c4f030 R com_pci_ids +ffffffff82c50000 R ufshci_pci_ca +ffffffff82c51000 r agp_attach.agp_max +ffffffff82c51048 R agp_ca +ffffffff82c52000 R intagp_ca +ffffffff82c53000 r drm_plane_create_rotation_property.props +ffffffff82c54000 r drm_bridge_priv_state_funcs +ffffffff82c56000 r color_encoding_name +ffffffff82c56020 r color_range_name +ffffffff82c57000 r drm_subpixel_enum_list +ffffffff82c57060 r drm_dpms_enum_list +ffffffff82c570a0 r drm_dvi_i_select_enum_list +ffffffff82c570d0 r drm_dvi_i_subconnector_enum_list +ffffffff82c57100 r drm_tv_mode_enum_list +ffffffff82c57170 r drm_tv_select_enum_list +ffffffff82c571c0 r drm_tv_subconnector_enum_list +ffffffff82c57210 r drm_dp_subconnector_enum_list +ffffffff82c57280 r colorspace_names +ffffffff82c57300 r drm_link_status_enum_list +ffffffff82c57320 r drm_scaling_mode_enum_list +ffffffff82c57360 r drm_aspect_ratio_enum_list +ffffffff82c57390 r drm_content_type_enum_list +ffffffff82c573e0 r drm_panel_orientation_enum_list +ffffffff82c57420 r privacy_screen_enum +ffffffff82c58000 r drm_crtc_fence_ops +ffffffff82c59000 r drm_dmt_modes +ffffffff82c5b940 r edid_cea_modes_1 +ffffffff82c5f4d0 r edid_cea_modes_193 +ffffffff82c60180 r edid_quirk_list +ffffffff82c60360 r drm_mode_do_interlace_quirk.cea_interlaced +ffffffff82c603a0 r edid_4k_modes +ffffffff82c60600 r edid_est_modes +ffffffff82c60e00 r est3_modes +ffffffff82c60f60 r stereo_mandatory_modes +ffffffff82c60fe0 r extra_modes +ffffffff82c62000 r drm_encoder_enum_list +ffffffff82c64000 r drm_fbdev_dma_helper_funcs +ffffffff82c64010 r drm_fbdev_dma_client_funcs +ffffffff82c64030 r drm_fbdev_dma_fb_ops +ffffffff82c65000 r drm_fbdev_generic_helper_funcs +ffffffff82c65010 r drm_fbdev_generic_client_funcs +ffffffff82c65030 r drm_fbdev_generic_fb_ops +ffffffff82c67000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82c67004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82c67008 r drm_fb_xrgb8888_to_xrgb1555.dst_pixsize +ffffffff82c6700c r drm_fb_xrgb8888_to_argb1555.dst_pixsize +ffffffff82c67010 r drm_fb_xrgb8888_to_rgba5551.dst_pixsize +ffffffff82c67014 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff82c67018 r drm_fb_xrgb8888_to_argb8888.dst_pixsize +ffffffff82c6701c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82c67020 r drm_fb_xrgb8888_to_argb2101010.dst_pixsize +ffffffff82c67024 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82c67028 r drm_fb_xrgb8888_to_xbgr8888.dst_pixsize +ffffffff82c6702c r drm_fb_xrgb8888_to_abgr8888.dst_pixsize +ffffffff82c68000 r __drm_format_info.formats +ffffffff82c69000 R drm_pgops +ffffffff82c6a000 r drm_gem_dma_default_funcs +ffffffff82c6b000 R drm_gem_fb_funcs +ffffffff82c6c000 r drm_ioctls +ffffffff82c6e000 r dma_fence_stub_ops +ffffffff82c6e040 R dma_fence_array_ops +ffffffff82c6e080 R dma_fence_chain_ops +ffffffff82c6e0c0 R dmabufops +ffffffff82c6e0f8 R syncfileops +ffffffff82c6f000 r drm_plane_type_enum_list +ffffffff82c70000 r tv_modes_parameters +ffffffff82c700c0 r drm_mode_status_names +ffffffff82c70200 r drm_named_modes +ffffffff82c71000 r primary_plane_funcs +ffffffff82c71068 r safe_modeset_formats +ffffffff82c72000 r orientation_data +ffffffff82c76080 r lcd800x1280_rightside_up +ffffffff82c76098 r lcd720x1280_rightside_up +ffffffff82c760b0 r lcd800x1280_leftside_up +ffffffff82c760c8 r lcd1080x1920_leftside_up +ffffffff82c760e0 r lcd1600x2560_rightside_up +ffffffff82c760f8 r lcd1200x1920_rightside_up +ffffffff82c76110 r gpd_micropc +ffffffff82c76128 r gpd_pocket +ffffffff82c76140 r gpd_pocket2 +ffffffff82c76158 r gpd_win +ffffffff82c76170 r gpd_win2 +ffffffff82c76188 r lcd1080x1920_rightside_up +ffffffff82c761a0 r itworks_tw891 +ffffffff82c761b8 r lcd1600x2560_leftside_up +ffffffff82c761d0 r onegx1_pro +ffffffff82c761e8 r lcd1280x1920_rightside_up +ffffffff82c76200 r gpd_onemix2s +ffffffff82c76218 r .compoundliteral +ffffffff82c76228 r .compoundliteral.5 +ffffffff82c76250 r .compoundliteral.9 +ffffffff82c76270 r .compoundliteral.17 +ffffffff82c762b0 r .compoundliteral.21 +ffffffff82c762d0 r .compoundliteral.23 +ffffffff82c762e0 r .compoundliteral.25 +ffffffff82c762f0 r .compoundliteral.29 +ffffffff82c77000 r drm_gem_prime_dmabuf_ops +ffffffff82c79000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82c7a000 r drm_dp_phy_name.phy_names +ffffffff82c7a048 r drm_dp_i2c_algo +ffffffff82c7a058 r drm_dp_i2c_lock_ops +ffffffff82c7a070 r dp_aux_bl_ops +ffffffff82c7a090 r dpcd_quirk_list +ffffffff82c7a320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82c7b000 R drm_dp_mst_topology_state_funcs +ffffffff82c7b020 r drm_dp_mst_req_type_str.req_type_str +ffffffff82c7b1f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82c7b220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82c7b278 r drm_dp_mst_i2c_algo +ffffffff82c7c000 r rc_parameters_1_2_444 +ffffffff82c7c5f0 r rc_parameters_pre_scr +ffffffff82c7c920 r rc_parameters_1_2_422 +ffffffff82c7cdf0 r rc_parameters_1_2_420 +ffffffff82c7e000 r hdmi_colorimetry_val +ffffffff82c7f018 R ttm_bo_vm_ops +ffffffff82c80000 r ttm_range_manager_func +ffffffff82c81018 r ttm_kmap_iter_io_ops +ffffffff82c81030 r ttm_kmap_iter_linear_io_ops +ffffffff82c82000 r ttm_sys_manager_func +ffffffff82c83000 r ttm_kmap_iter_tt_ops +ffffffff82c84000 r drm_sched_fence_ops_scheduled +ffffffff82c84040 r drm_sched_fence_ops_finished +ffffffff82c85000 R ch7017_ops +ffffffff82c86000 R ch7xxx_ops +ffffffff82c86060 r ch7xxx_ids +ffffffff82c87000 R ivch_ops +ffffffff82c87060 r backup_addresses +ffffffff82c88000 R ns2501_ops +ffffffff82c88060 r mode_agnostic_values +ffffffff82c880e0 r ns2501_modes +ffffffff82c89000 R sil164_ops +ffffffff82c8a000 R tfp410_ops +ffffffff82c8b000 r chv_dpll +ffffffff82c8b050 r vlv_dpll +ffffffff82c8b0a0 r g4x_dpll +ffffffff82c8b0f0 r pch_dpll +ffffffff82c8b138 r intel_dp_enc_funcs +ffffffff82c8c000 r intel_hdmi_enc_funcs +ffffffff82c8d000 r vlv_primary_formats +ffffffff82c8d030 r ivb_primary_formats +ffffffff82c8d050 r i965_primary_formats +ffffffff82c8d070 r i8xx_primary_formats +ffffffff82c8d080 r i965_plane_funcs +ffffffff82c8d0e8 r i8xx_plane_funcs +ffffffff82c8e000 r ilk_wm_funcs +ffffffff82c8e040 r vlv_wm_funcs +ffffffff82c8e080 r g4x_wm_funcs +ffffffff82c8e0c0 r nop_funcs +ffffffff82c8e100 r pnv_wm_funcs +ffffffff82c8e140 r i965_wm_funcs +ffffffff82c8e180 r i9xx_wm_funcs +ffffffff82c8e1c0 r i845_wm_funcs +ffffffff82c8e200 r cxsr_latency_table +ffffffff82c8f000 r gen11_dsi_encoder_funcs +ffffffff82c8f020 r gen11_dsi_connector_funcs +ffffffff82c8f098 r gen11_dsi_connector_helper_funcs +ffffffff82c8f0f8 r gen11_dsi_host_ops +ffffffff82c90000 r intel_plane_helper_funcs +ffffffff82c91000 r g4x_audio_funcs +ffffffff82c91018 r ibx_audio_funcs +ffffffff82c91030 r hsw_audio_funcs +ffffffff82c91050 r hdmi_audio_clock +ffffffff82c910c0 r hdmi_aud_ncts_36bpp +ffffffff82c911a0 r hdmi_aud_ncts_30bpp +ffffffff82c91280 r hdmi_aud_ncts_24bpp +ffffffff82c92000 r intel_backlight_device_ops +ffffffff82c92018 r bxt_pwm_funcs +ffffffff82c92048 r cnp_pwm_funcs +ffffffff82c92078 r lpt_pwm_funcs +ffffffff82c920a8 r spt_pwm_funcs +ffffffff82c920d8 r pch_pwm_funcs +ffffffff82c92108 r ext_pwm_funcs +ffffffff82c92138 r vlv_pwm_funcs +ffffffff82c92168 r i965_pwm_funcs +ffffffff82c92198 r i9xx_pwm_funcs +ffffffff82c921c8 r pwm_bl_funcs +ffffffff82c93000 r bdb_blocks +ffffffff82c93160 r adlp_aux_ch_map +ffffffff82c93169 r adls_aux_ch_map +ffffffff82c93170 r rkl_aux_ch_map +ffffffff82c93175 r direct_aux_ch_map +ffffffff82c9317e r translate_iboost.mapping +ffffffff82c93181 r adlp_ddc_pin_map +ffffffff82c9318e r adls_ddc_pin_map +ffffffff82c9319b r rkl_pch_tgp_ddc_pin_map +ffffffff82c931a6 r gen9bc_tgp_ddc_pin_map +ffffffff82c931b1 r icp_ddc_pin_map +ffffffff82c931c0 r cnp_ddc_pin_map +ffffffff82c94000 r mtl_sa_info +ffffffff82c94006 r adlp_sa_info +ffffffff82c9400c r adls_sa_info +ffffffff82c94012 r rkl_sa_info +ffffffff82c94018 r tgl_sa_info +ffffffff82c94020 r intel_bw_funcs +ffffffff82c95000 r intel_cdclk_funcs +ffffffff82c95010 r mtl_cdclk_funcs +ffffffff82c95030 r mtl_cdclk_table +ffffffff82c95088 r tgl_cdclk_funcs +ffffffff82c950b0 r dg2_cdclk_table +ffffffff82c95160 r adlp_a_step_cdclk_table +ffffffff82c951e0 r rplu_cdclk_table +ffffffff82c952c8 r rplu_cdclk_funcs +ffffffff82c952f0 r adlp_cdclk_table +ffffffff82c953b0 r rkl_cdclk_table +ffffffff82c954a0 r icl_cdclk_table +ffffffff82c95588 r ehl_cdclk_funcs +ffffffff82c955a8 r icl_cdclk_funcs +ffffffff82c955c8 r bxt_cdclk_funcs +ffffffff82c955f0 r glk_cdclk_table +ffffffff82c95620 r bxt_cdclk_table +ffffffff82c95668 r skl_cdclk_funcs +ffffffff82c95688 r bdw_cdclk_funcs +ffffffff82c956a8 r hsw_cdclk_funcs +ffffffff82c956c8 r chv_cdclk_funcs +ffffffff82c956e8 r vlv_cdclk_funcs +ffffffff82c95708 r fixed_400mhz_cdclk_funcs +ffffffff82c95728 r ilk_cdclk_funcs +ffffffff82c95748 r gm45_cdclk_funcs +ffffffff82c95768 r g33_cdclk_funcs +ffffffff82c95788 r i965gm_cdclk_funcs +ffffffff82c957a8 r pnv_cdclk_funcs +ffffffff82c957c8 r i945gm_cdclk_funcs +ffffffff82c957e8 r i915gm_cdclk_funcs +ffffffff82c95808 r i915g_cdclk_funcs +ffffffff82c95828 r i865g_cdclk_funcs +ffffffff82c95848 r i85x_cdclk_funcs +ffffffff82c95868 r i845g_cdclk_funcs +ffffffff82c95888 r i830_cdclk_funcs +ffffffff82c958a8 r g33_get_cdclk.div_3200 +ffffffff82c958ae r g33_get_cdclk.div_4000 +ffffffff82c958b4 r g33_get_cdclk.div_4800 +ffffffff82c958ba r g33_get_cdclk.div_5333 +ffffffff82c958c0 r i965gm_get_cdclk.div_3200 +ffffffff82c958c3 r i965gm_get_cdclk.div_4000 +ffffffff82c958c6 r i965gm_get_cdclk.div_5333 +ffffffff82c96000 r chv_color_funcs +ffffffff82c96040 r vlv_color_funcs +ffffffff82c96080 r i965_color_funcs +ffffffff82c960c0 r i9xx_color_funcs +ffffffff82c96100 r tgl_color_funcs +ffffffff82c96140 r icl_color_funcs +ffffffff82c96180 r glk_color_funcs +ffffffff82c961c0 r skl_color_funcs +ffffffff82c96200 r bdw_color_funcs +ffffffff82c96240 r hsw_color_funcs +ffffffff82c96280 r ivb_color_funcs +ffffffff82c962c0 r ilk_color_funcs +ffffffff82c96300 r chv_cgm_csc_matrix_identity +ffffffff82c9631e r ilk_csc_matrix_rgb_to_ycbcr +ffffffff82c9633c r ilk_csc_matrix_limited_range +ffffffff82c9635a r ilk_csc_matrix_identity +ffffffff82c97000 r icl_procmon_values +ffffffff82c98000 r force_audio_names +ffffffff82c98040 r broadcast_rgb_names +ffffffff82c99000 r intel_crt_connector_funcs +ffffffff82c99078 r intel_crt_enc_funcs +ffffffff82c990a0 r intel_spurious_crt_detect +ffffffff82c994a8 r intel_crt_connector_helper_funcs +ffffffff82c9a000 r g4x_crtc_funcs +ffffffff82c9a0c0 r i965_crtc_funcs +ffffffff82c9a180 r i915gm_crtc_funcs +ffffffff82c9a240 r i915_crtc_funcs +ffffffff82c9a300 r i8xx_crtc_funcs +ffffffff82c9a3c0 r bdw_crtc_funcs +ffffffff82c9a480 r ilk_crtc_funcs +ffffffff82c9b000 r output_format_str +ffffffff82c9b020 r output_type_str +ffffffff82c9c000 r intel_cursor_plane_funcs +ffffffff82c9c068 r intel_cursor_formats +ffffffff82c9d000 r mtl_c10_hdmi_tables +ffffffff82c9d170 r mtl_c10_hdmi_25_2 +ffffffff82c9d18c r mtl_c10_hdmi_27_0 +ffffffff82c9d1a8 r mtl_c10_hdmi_27027 +ffffffff82c9d1c4 r mtl_c10_hdmi_28320 +ffffffff82c9d1e0 r mtl_c10_hdmi_30240 +ffffffff82c9d1fc r mtl_c10_hdmi_31500 +ffffffff82c9d218 r mtl_c10_hdmi_36000 +ffffffff82c9d234 r mtl_c10_hdmi_40000 +ffffffff82c9d250 r mtl_c10_hdmi_49500 +ffffffff82c9d26c r mtl_c10_hdmi_50000 +ffffffff82c9d288 r mtl_c10_hdmi_57284 +ffffffff82c9d2a4 r mtl_c10_hdmi_58000 +ffffffff82c9d2c0 r mtl_c10_hdmi_65000 +ffffffff82c9d2dc r mtl_c10_hdmi_71000 +ffffffff82c9d2f8 r mtl_c10_hdmi_74176 +ffffffff82c9d314 r mtl_c10_hdmi_74_25 +ffffffff82c9d330 r mtl_c10_hdmi_75000 +ffffffff82c9d34c r mtl_c10_hdmi_78750 +ffffffff82c9d368 r mtl_c10_hdmi_85500 +ffffffff82c9d384 r mtl_c10_hdmi_88750 +ffffffff82c9d3a0 r mtl_c10_hdmi_106500 +ffffffff82c9d3bc r mtl_c10_hdmi_108000 +ffffffff82c9d3d8 r mtl_c10_hdmi_115500 +ffffffff82c9d3f4 r mtl_c10_hdmi_119000 +ffffffff82c9d410 r mtl_c10_hdmi_135000 +ffffffff82c9d42c r mtl_c10_hdmi_138500 +ffffffff82c9d448 r mtl_c10_hdmi_147160 +ffffffff82c9d464 r mtl_c10_hdmi_148352 +ffffffff82c9d480 r mtl_c10_hdmi_148_5 +ffffffff82c9d49c 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mtl_info +ffffffff82d09000 r oa_formats +ffffffff82d090f0 r gen8_update_reg_state_unlocked.flex_regs +ffffffff82d09110 r gen8_oa_mux_regs +ffffffff82d09130 r xehp_oa_b_counters +ffffffff82d09150 r gen12_oa_b_counters +ffffffff82d09190 r mtl_oam_b_counters +ffffffff82d091c0 r mtl_oa_mux_regs +ffffffff82d091f0 r gen12_oa_mux_regs +ffffffff82d0a000 r i915_query_funcs +ffffffff82d0b000 R i915_fence_ops +ffffffff82d0c000 r rsgt_ops +ffffffff82d0d000 r fence_ops +ffffffff82d0e000 r i915_ttm_buddy_manager_func +ffffffff82d0f000 r bind_ops +ffffffff82d10000 r nop_clock_gating_funcs +ffffffff82d10008 r pvc_clock_gating_funcs +ffffffff82d10010 r dg2_clock_gating_funcs +ffffffff82d10018 r xehpsdv_clock_gating_funcs +ffffffff82d10020 r adlp_clock_gating_funcs +ffffffff82d10028 r gen12lp_clock_gating_funcs +ffffffff82d10030 r icl_clock_gating_funcs +ffffffff82d10038 r cfl_clock_gating_funcs +ffffffff82d10040 r skl_clock_gating_funcs +ffffffff82d10048 r kbl_clock_gating_funcs +ffffffff82d10050 r bxt_clock_gating_funcs +ffffffff82d10058 r glk_clock_gating_funcs +ffffffff82d10060 r bdw_clock_gating_funcs +ffffffff82d10068 r chv_clock_gating_funcs +ffffffff82d10070 r hsw_clock_gating_funcs +ffffffff82d10078 r ivb_clock_gating_funcs +ffffffff82d10080 r vlv_clock_gating_funcs +ffffffff82d10088 r gen6_clock_gating_funcs +ffffffff82d10090 r ilk_clock_gating_funcs +ffffffff82d10098 r g4x_clock_gating_funcs +ffffffff82d100a0 r i965gm_clock_gating_funcs +ffffffff82d100a8 r i965g_clock_gating_funcs +ffffffff82d100b0 r gen3_clock_gating_funcs +ffffffff82d100b8 r i85x_clock_gating_funcs +ffffffff82d100c0 r i830_clock_gating_funcs +ffffffff82d11000 r platform_names +ffffffff82d11140 r subplatform_ult_ids +ffffffff82d111a4 r no_display +ffffffff82d12000 r intel_region_map +ffffffff82d14000 r dg2_g10_revid_step_tbl +ffffffff82d14030 r dg2_g11_revid_step_tbl +ffffffff82d14050 r xehpsdv_revids +ffffffff82d14080 r adlp_rplp_revids +ffffffff82d140a0 r adlp_revids +ffffffff82d140e0 r adls_rpls_revids +ffffffff82d14120 r adls_revids +ffffffff82d14160 r rkl_revids +ffffffff82d14180 r bxt_revids +ffffffff82d141c0 r skl_revids +ffffffff82d141f0 r pvc_bd_subids +ffffffff82d14210 r pvc_ct_subids +ffffffff82d16000 r forcewake_domain_names +ffffffff82d16080 r __mtl_fw_ranges +ffffffff82d16200 r mtl_shadowed_regs +ffffffff82d16280 r __pvc_fw_ranges +ffffffff82d16430 r pvc_shadowed_regs +ffffffff82d16550 r __dg2_fw_ranges +ffffffff82d16820 r dg2_shadowed_regs +ffffffff82d16940 r __xehp_fw_ranges +ffffffff82d16c10 r gen12_shadowed_regs +ffffffff82d16d30 r __gen12_fw_ranges +ffffffff82d16f40 r __gen11_fw_ranges +ffffffff82d170f0 r gen11_shadowed_regs +ffffffff82d171b0 r __gen9_fw_ranges +ffffffff82d17330 r gen8_shadowed_regs +ffffffff82d17360 r __chv_fw_ranges +ffffffff82d17420 r __gen6_fw_ranges +ffffffff82d17430 r __vlv_fw_ranges +ffffffff82d17488 r uncore_get_fallback +ffffffff82d17490 r uncore_get_normal +ffffffff82d17498 r uncore_get_thread_status +ffffffff82d174a0 r __xelpmp_fw_ranges +ffffffff82d175d0 r xelpmp_shadowed_regs +ffffffff82d18000 r i915_pxp_tee_component_ops +ffffffff82d19000 r intel_dram_type_str.str +ffffffff82d1a000 r atom_op_names +ffffffff82d1a3e0 r opcode_table +ffffffff82d1ab90 r atom_dst_to_src +ffffffff82d1ac10 r atom_io_names +ffffffff82d1ac40 r atom_table_names +ffffffff82d1ae90 r atom_iio_len +ffffffff82d1b000 r atombios_helper_funcs +ffffffff82d1b080 r vga_control_regs +ffffffff82d1c000 r voltage_names +ffffffff82d1c020 r pre_emph_names +ffffffff82d1d000 r radeon_atom_backlight_ops +ffffffff82d1d018 r radeon_atom_enc_funcs +ffffffff82d1d038 r radeon_atom_dig_helper_funcs +ffffffff82d1d0a0 r radeon_atom_dac_helper_funcs +ffffffff82d1d108 r radeon_atom_ext_helper_funcs +ffffffff82d1e000 r caicos_cgcg_cgls_default +ffffffff82d1e240 r barts_mgcg_default +ffffffff82d1e900 r turks_mgcg_default +ffffffff82d1ed80 r caicos_mgcg_default +ffffffff82d1f110 r turks_sysls_default +ffffffff82d1f1d0 r caicos_sysls_default +ffffffff82d1f280 r caicos_cgcg_cgls_enable +ffffffff82d1f4d0 r caicos_cgcg_cgls_disable +ffffffff82d1f730 r barts_mgcg_enable +ffffffff82d1f7b0 r turks_mgcg_enable +ffffffff82d1f830 r caicos_mgcg_enable +ffffffff82d1f8b0 r caicos_mgcg_disable +ffffffff82d1f930 r turks_sysls_enable +ffffffff82d1f9f0 r caicos_sysls_enable +ffffffff82d1faa0 r turks_sysls_disable +ffffffff82d1fb60 r caicos_sysls_disable +ffffffff82d20000 r didt_config_ci +ffffffff82d205b4 r defaults_bonaire_xt +ffffffff82d20600 r defaults_saturn_xt +ffffffff82d2064c r defaults_hawaii_xt +ffffffff82d20698 r defaults_hawaii_pro +ffffffff82d21000 r ci_program_jump_on_start.data +ffffffff82d22000 r bonaire_io_mc_regs +ffffffff82d22120 r hawaii_io_mc_regs +ffffffff82d221d0 r mc_cg_registers +ffffffff82d22200 r bonaire_mgcg_cgcg_init +ffffffff82d225e0 r bonaire_golden_registers +ffffffff82d227d0 r bonaire_golden_common_registers +ffffffff82d22800 r bonaire_golden_spm_registers +ffffffff82d22810 r kalindi_mgcg_cgcg_init +ffffffff82d22ab0 r kalindi_golden_registers +ffffffff82d22c20 r kalindi_golden_common_registers +ffffffff82d22c50 r kalindi_golden_spm_registers +ffffffff82d22c60 r godavari_golden_registers +ffffffff82d22de0 r spectre_mgcg_cgcg_init +ffffffff82d23200 r spectre_golden_registers +ffffffff82d23330 r spectre_golden_common_registers +ffffffff82d23360 r spectre_golden_spm_registers +ffffffff82d23370 r hawaii_mgcg_cgcg_init +ffffffff82d23880 r hawaii_golden_registers +ffffffff82d23a30 r hawaii_golden_common_registers +ffffffff82d23a6c r hawaii_golden_spm_registers +ffffffff82d23a80 r spectre_rlc_save_restore_register_list +ffffffff82d24170 r kalindi_rlc_save_restore_register_list +ffffffff82d24680 r ci_cs_data +ffffffff82d246a0 r ci_SECT_CONTEXT_defs +ffffffff82d24720 r ci_SECT_CONTEXT_def_1 +ffffffff82d24a70 r ci_SECT_CONTEXT_def_3 +ffffffff82d24a90 r ci_SECT_CONTEXT_def_4 +ffffffff82d24d04 r ci_SECT_CONTEXT_def_5 +ffffffff82d24d0c r ci_SECT_CONTEXT_def_6 +ffffffff82d24d10 r ci_SECT_CONTEXT_def_2 +ffffffff82d25160 r ci_SECT_CONTEXT_def_7 +ffffffff82d25510 r cik_default_state +ffffffff82d27000 r dce3_2_afmt_write_sad_regs.eld_reg_to_type +ffffffff82d28000 r dce6_afmt_write_sad_regs.eld_reg_to_type +ffffffff82d29000 r ni_tx_offsets +ffffffff82d29020 r evergreen_dp_offsets +ffffffff82d29040 r evergreen_disp_int_status +ffffffff82d29060 r evergreen_golden_registers +ffffffff82d29260 r evergreen_golden_registers2 +ffffffff82d29310 r cypress_mgcg_init +ffffffff82d29a10 r juniper_mgcg_init +ffffffff82d29e80 r redwood_mgcg_init +ffffffff82d2a1b0 r cedar_golden_registers +ffffffff82d2a390 r cedar_mgcg_init +ffffffff82d2a5f0 r wrestler_golden_registers +ffffffff82d2a840 r supersumo_golden_registers +ffffffff82d2aba0 r sumo_golden_registers +ffffffff82d2abe0 r barts_golden_registers +ffffffff82d2ae00 r turks_golden_registers +ffffffff82d2b040 r caicos_golden_registers +ffffffff82d2b280 r sumo_rlc_save_restore_register_list +ffffffff82d2b3d0 r evergreen_cs_data +ffffffff82d2b410 r SECT_CONTEXT_defs +ffffffff82d2b490 r SECT_CLEAR_defs +ffffffff82d2b4b0 r SECT_CTRLCONST_defs +ffffffff82d2b4d0 r SECT_CONTEXT_def_2 +ffffffff82d2b4f0 r SECT_CONTEXT_def_4 +ffffffff82d2b680 r SECT_CONTEXT_def_5 +ffffffff82d2b6a0 r SECT_CONTEXT_def_6 +ffffffff82d2b780 r SECT_CONTEXT_def_1 +ffffffff82d2bf20 r SECT_CONTEXT_def_3 +ffffffff82d2c000 r SECT_CONTEXT_def_7 +ffffffff82d2c488 r SECT_CLEAR_def_1 +ffffffff82d2c494 r SECT_CTRLCONST_def_1 +ffffffff82d2c4a0 r evergreen_default_state +ffffffff82d2d000 r cayman_reg_safe_bm +ffffffff82d2f000 r evergreen_reg_safe_bm +ffffffff82d32000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82d33000 r didt_config_kv +ffffffff82d34000 r barts_io_mc_regs +ffffffff82d340f0 r turks_io_mc_regs +ffffffff82d341e0 r caicos_io_mc_regs +ffffffff82d342d0 r cayman_io_mc_regs +ffffffff82d343c0 r cayman_golden_registers +ffffffff82d34580 r cayman_golden_registers2 +ffffffff82d345d0 r dvst_golden_registers +ffffffff82d34860 r dvst_golden_registers2 +ffffffff82d34890 r scrapper_golden_registers +ffffffff82d34d70 r tn_rlc_save_restore_register_list +ffffffff82d34f60 r cayman_cs_data +ffffffff82d34fa0 r SECT_CONTEXT_defs +ffffffff82d35020 r SECT_CLEAR_defs +ffffffff82d35040 r SECT_CTRLCONST_defs +ffffffff82d35060 r SECT_CONTEXT_def_2 +ffffffff82d35080 r SECT_CONTEXT_def_4 +ffffffff82d35210 r SECT_CONTEXT_def_5 +ffffffff82d35230 r SECT_CONTEXT_def_1 +ffffffff82d359d0 r SECT_CONTEXT_def_3 +ffffffff82d35ab0 r SECT_CONTEXT_def_6 +ffffffff82d35b90 r SECT_CONTEXT_def_7 +ffffffff82d36018 r SECT_CLEAR_def_1 +ffffffff82d36024 r SECT_CTRLCONST_def_1 +ffffffff82d36030 r cayman_default_state +ffffffff82d37000 r cac_weights_cayman_xt +ffffffff82d37128 r cac_weights_cayman_pro +ffffffff82d37250 r cac_weights_cayman_le +ffffffff82d37380 r cayman_cgcg_cgls_default +ffffffff82d375c0 r cayman_mgcg_default +ffffffff82d37f20 r cayman_sysls_default +ffffffff82d37ff0 r cayman_cgcg_cgls_enable +ffffffff82d38240 r cayman_cgcg_cgls_disable +ffffffff82d384a0 r cayman_mgcg_enable +ffffffff82d38520 r cayman_mgcg_disable +ffffffff82d385a0 r cayman_sysls_enable +ffffffff82d38670 r cayman_sysls_disable +ffffffff82d39000 r rn50_reg_safe_bm +ffffffff82d391a0 r r100_reg_safe_bm +ffffffff82d3a000 r r200_reg_safe_bm +ffffffff82d3b000 r r300_reg_safe_bm +ffffffff82d3c000 r r420_reg_safe_bm +ffffffff82d3e000 r color_formats_table +ffffffff82d3e480 r r600_reg_safe_bm +ffffffff82d41000 R r600_utc +ffffffff82d41040 R r600_dtc +ffffffff82d41080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82d43000 r r100_gfx_ring +ffffffff82d43070 r r300_gfx_ring +ffffffff82d430e0 r rv515_gfx_ring +ffffffff82d43150 r r600_gfx_ring +ffffffff82d431c0 r r600_dma_ring +ffffffff82d43230 r rv6xx_uvd_ring +ffffffff82d432a0 r rv770_uvd_ring +ffffffff82d43310 r evergreen_gfx_ring +ffffffff82d43380 r evergreen_dma_ring +ffffffff82d433f0 r cayman_gfx_ring +ffffffff82d43460 r cayman_dma_ring +ffffffff82d434d0 r cayman_uvd_ring +ffffffff82d43540 r trinity_vce_ring +ffffffff82d435b0 r si_gfx_ring +ffffffff82d43620 r si_dma_ring +ffffffff82d43690 r ci_gfx_ring +ffffffff82d43700 r ci_cp_ring +ffffffff82d43770 r ci_dma_ring +ffffffff82d437e0 r ci_vce_ring +ffffffff82d44000 r object_connector_convert +ffffffff82d44060 r supported_devices_connector_convert +ffffffff82d440a0 r supported_devices_connector_object_id_convert +ffffffff82d440c0 r thermal_controller_names +ffffffff82d44100 r pp_lib_thermal_controller_names +ffffffff82d45000 r pin_offsets +ffffffff82d45020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff82d47000 r thermal_controller_names +ffffffff82d47020 r default_primarydac_adj +ffffffff82d47120 r default_tvdac_adj +ffffffff82d47220 r default_tmds_pll +ffffffff82d48000 r radeon_dp_connector_funcs +ffffffff82d48078 r radeon_dp_connector_helper_funcs +ffffffff82d480d8 r radeon_lvds_bridge_connector_funcs +ffffffff82d48150 r radeon_vga_connector_funcs +ffffffff82d481c8 r radeon_vga_connector_helper_funcs +ffffffff82d48228 r radeon_dvi_connector_funcs +ffffffff82d482a0 r radeon_dvi_connector_helper_funcs +ffffffff82d48300 r radeon_edp_connector_funcs +ffffffff82d48378 r radeon_tv_connector_funcs +ffffffff82d483f0 r radeon_tv_connector_helper_funcs +ffffffff82d48450 r radeon_lvds_connector_funcs +ffffffff82d484c8 r radeon_lvds_connector_helper_funcs +ffffffff82d49000 r radeon_family_name +ffffffff82d493f0 r radeon_px_quirk_list +ffffffff82d4a000 r radeon_fb_funcs +ffffffff82d4a018 r radeon_mode_funcs +ffffffff82d4a060 r radeon_tmds_pll_enum_list +ffffffff82d4a080 r radeon_tv_std_enum_list +ffffffff82d4a100 r radeon_underscan_enum_list +ffffffff82d4a130 r radeon_audio_enum_list +ffffffff82d4a160 r radeon_dither_enum_list +ffffffff82d4a180 r radeon_output_csc_enum_list +ffffffff82d4a1c0 r radeon_crtc_funcs +ffffffff82d4a280 r hpd_names +ffffffff82d4a2b0 r encoder_names +ffffffff82d4a3e0 r radeon_afmt_init.eg_offsets +ffffffff82d4b000 r aux_offset +ffffffff82d4c000 R radeondrm_ca +ffffffff82d4c030 r pciidlist +ffffffff82d501d0 r kms_driver +ffffffff82d502c0 r radeon_ioctls_kms +ffffffff82d51000 r radeon_fbdev_fb_helper_funcs +ffffffff82d51010 r radeon_fbdev_client_funcs +ffffffff82d51030 r radeon_fbdev_fb_ops +ffffffff82d52000 R radeon_fence_ops +ffffffff82d54000 R radeon_gem_object_funcs +ffffffff82d54070 r radeon_gem_vm_ops +ffffffff82d55000 r radeon_i2c_algo +ffffffff82d55010 r radeon_atom_i2c_algo +ffffffff82d56000 r legacy_helper_funcs +ffffffff82d57000 r radeon_backlight_ops +ffffffff82d57018 r radeon_legacy_lvds_enc_funcs +ffffffff82d57038 r radeon_legacy_lvds_helper_funcs +ffffffff82d570a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82d570c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82d57128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82d57148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82d571b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82d571d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82d57238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82d57258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82d58000 r SLOPE_value +ffffffff82d58030 r YCOEF_EN_value +ffffffff82d58060 r YCOEF_value +ffffffff82d58090 r available_tv_modes +ffffffff82d58110 r hor_timing_NTSC +ffffffff82d58150 r vert_timing_NTSC +ffffffff82d58190 r hor_timing_PAL +ffffffff82d581d0 r vert_timing_PAL +ffffffff82d5a000 r radeon_pm_state_type_name +ffffffff82d5b000 r radeon_evict_flags.placements +ffffffff82d5e000 r rs600_reg_safe_bm +ffffffff82d60000 r rv515_reg_safe_bm +ffffffff82d61000 r dll_speed_table +ffffffff82d62000 r r7xx_golden_registers +ffffffff82d62090 r r7xx_golden_dyn_gpr_registers +ffffffff82d62100 r rv770ce_golden_registers +ffffffff82d62160 r rv770_golden_registers +ffffffff82d621b0 r rv770_mgcg_init +ffffffff82d628f0 r rv730_golden_registers +ffffffff82d62950 r rv730_mgcg_init +ffffffff82d62ee0 r rv710_golden_registers +ffffffff82d62f30 r rv710_mgcg_init +ffffffff82d631d0 r rv740_golden_registers +ffffffff82d63360 r rv740_mgcg_init +ffffffff82d65000 r rv730_smc_int_vectors +ffffffff82d65040 r rv710_smc_int_vectors +ffffffff82d65080 r rv740_smc_int_vectors +ffffffff82d650c0 r cypress_smc_int_vectors +ffffffff82d65100 r caicos_smc_int_vectors +ffffffff82d65140 r cayman_smc_int_vectors +ffffffff82d66000 r tahiti_io_mc_regs +ffffffff82d66120 r pitcairn_io_mc_regs +ffffffff82d66240 r verde_io_mc_regs +ffffffff82d66360 r oland_io_mc_regs +ffffffff82d66480 r hainan_io_mc_regs +ffffffff82d665a0 r crtc_offsets +ffffffff82d665c0 r si_disp_int_status +ffffffff82d665e0 r tahiti_golden_registers +ffffffff82d66760 r tahiti_golden_rlc_registers +ffffffff82d667b0 r tahiti_mgcg_cgcg_init +ffffffff82d66d98 r tahiti_golden_registers2 +ffffffff82d66db0 r pitcairn_golden_registers +ffffffff82d66f00 r pitcairn_golden_rlc_registers +ffffffff82d66f40 r pitcairn_mgcg_cgcg_init +ffffffff82d673b0 r verde_golden_registers +ffffffff82d67620 r verde_golden_rlc_registers +ffffffff82d67660 r verde_mgcg_cgcg_init +ffffffff82d67ae0 r oland_golden_registers +ffffffff82d67c30 r oland_golden_rlc_registers +ffffffff82d67c70 r oland_mgcg_cgcg_init +ffffffff82d68000 r hainan_golden_registers +ffffffff82d6812c r hainan_golden_registers2 +ffffffff82d68140 r hainan_mgcg_cgcg_init +ffffffff82d684b0 r verde_rlc_save_restore_register_list +ffffffff82d68820 r si_cs_data +ffffffff82d68840 r si_SECT_CONTEXT_defs +ffffffff82d688c0 r si_SECT_CONTEXT_def_1 +ffffffff82d68c10 r si_SECT_CONTEXT_def_3 +ffffffff82d68c30 r si_SECT_CONTEXT_def_4 +ffffffff82d68ea4 r si_SECT_CONTEXT_def_5 +ffffffff82d68ea8 r si_SECT_CONTEXT_def_6 +ffffffff82d68eb0 r si_SECT_CONTEXT_def_2 +ffffffff82d692f0 r si_SECT_CONTEXT_def_7 +ffffffff82d696a0 r mc_cg_registers +ffffffff82d696d0 r si_default_state +ffffffff82d6a000 r cac_weights_tahiti +ffffffff82d6a4d0 r lcac_tahiti +ffffffff82d6aba0 r cac_override_tahiti +ffffffff82d6abb4 r powertune_data_tahiti +ffffffff82d6abf0 r dte_data_tahiti +ffffffff82d6acc0 r dte_data_new_zealand +ffffffff82d6ad90 r dte_data_malta +ffffffff82d6ae60 r lcac_pitcairn +ffffffff82d6b530 r cac_override_pitcairn +ffffffff82d6b544 r powertune_data_pitcairn +ffffffff82d6b580 r lcac_cape_verde +ffffffff82d6b9d0 r cac_override_cape_verde +ffffffff82d6b9e4 r powertune_data_cape_verde +ffffffff82d6ba20 r cac_weights_cape_verde_pro +ffffffff82d6bef0 r cac_weights_heathrow +ffffffff82d6c3c0 r cac_weights_chelsea_xt +ffffffff82d6c890 r cac_weights_chelsea_pro +ffffffff82d6cd60 r cac_weights_cape_verde +ffffffff82d6d230 r cac_weights_mars_pro +ffffffff82d6d700 r lcac_mars_pro +ffffffff82d6da60 r cac_override_oland +ffffffff82d6da74 r powertune_data_mars_pro +ffffffff82d6dab0 r cac_weights_mars_xt +ffffffff82d6df80 r cac_weights_oland_pro +ffffffff82d6e450 r cac_weights_oland_xt +ffffffff82d6e920 r lcac_oland +ffffffff82d6ec7c r powertune_data_oland +ffffffff82d6ecc0 r cac_weights_hainan +ffffffff82d6f184 r powertune_data_hainan +ffffffff82d6f1c0 r dte_data_aruba_pro +ffffffff82d6f290 r dte_data_tahiti_pro +ffffffff82d6f360 r dte_data_curacao_pro +ffffffff82d6f430 r dte_data_neptune_xt +ffffffff82d6f500 r dte_data_sun_xt +ffffffff82d6f5d0 r dte_data_venus_xtx +ffffffff82d6f6a0 r dte_data_venus_xt +ffffffff82d6f770 r dte_data_venus_pro +ffffffff82d6f840 r dte_data_mars_pro +ffffffff82d70000 r si_program_jump_on_start.data +ffffffff82d71000 r sumo_dtc +ffffffff82d72000 r trinity_mgcg_shls_default +ffffffff82d72380 r trinity_sysls_enable +ffffffff82d72450 r trinity_sysls_disable +ffffffff82d74000 r GC_BASE +ffffffff82d740a8 r HDP_BASE +ffffffff82d74150 r MMHUB_BASE +ffffffff82d741f8 r ATHUB_BASE +ffffffff82d742a0 r NBIO_BASE +ffffffff82d74348 r MP0_BASE +ffffffff82d743f0 r MP1_BASE +ffffffff82d74498 r DF_BASE +ffffffff82d74540 r OSSSYS_BASE +ffffffff82d745e8 r SDMA0_BASE +ffffffff82d74690 r SDMA1_BASE +ffffffff82d74738 r SDMA2_BASE +ffffffff82d747e0 r SDMA3_BASE +ffffffff82d74888 r SDMA4_BASE +ffffffff82d74930 r SMUIO_BASE +ffffffff82d749d8 r THM_BASE +ffffffff82d74a80 r UMC_BASE +ffffffff82d74b28 r VCN_BASE +ffffffff82d75000 r amdgpu_afmt_predefined_acr +ffffffff82d76000 r atom_op_names +ffffffff82d763e0 r opcode_table +ffffffff82d76bd0 r atom_dst_to_src +ffffffff82d76c50 r atom_io_names +ffffffff82d76c80 r atom_table_names +ffffffff82d76ed0 r atom_iio_len +ffffffff82d77000 r object_connector_convert +ffffffff82d77058 R amdgpu_vbios_version_attr_group +ffffffff82d78000 r voltage_names +ffffffff82d78020 r pre_emph_names +ffffffff82d79000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82d7b000 r amdgpu_benchmark.common_modes +ffffffff82d7c000 r amdgpu_cgs_ops +ffffffff82d7d000 r amdgpu_connector_dp_funcs +ffffffff82d7d078 r amdgpu_connector_dp_helper_funcs +ffffffff82d7d0d8 r amdgpu_connector_edp_funcs +ffffffff82d7d150 r amdgpu_connector_vga_funcs +ffffffff82d7d1c8 r amdgpu_connector_vga_helper_funcs +ffffffff82d7d228 r amdgpu_connector_dvi_funcs +ffffffff82d7d2a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82d7d300 r amdgpu_connector_lvds_funcs +ffffffff82d7d378 r amdgpu_connector_lvds_helper_funcs +ffffffff82d7d3e0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82d7f000 R amdgpu_ctx_num_entities +ffffffff82d80000 r amdgpu_kms_driver +ffffffff82d800f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82d81000 r hw_id_map +ffffffff82d81090 r hw_id_names +ffffffff82d82000 r hpd_names +ffffffff82d82030 r encoder_names +ffffffff82d82180 r dcc_retile_formats +ffffffff82d82270 r dcc_formats +ffffffff82d82360 R amdgpu_mode_funcs +ffffffff82d823b0 r amdgpu_underscan_enum_list +ffffffff82d823e0 r amdgpu_audio_enum_list +ffffffff82d82410 r amdgpu_dither_enum_list +ffffffff82d82430 r amdgpu_fb_funcs_atomic +ffffffff82d82448 r amdgpu_fb_funcs +ffffffff82d83000 R amdgpu_dmabuf_ops +ffffffff82d84000 R amdgpu_ioctls_kms +ffffffff82d84210 R amdgpu_partition_driver +ffffffff82d842f8 R amdgpu_ca +ffffffff82d84320 r pciidlist +ffffffff82d851f0 r amdgpu_unsupported_pciidlist +ffffffff82d85770 r amdgpu_kms_driver +ffffffff82d86000 r amdgpu_job_fence_ops +ffffffff82d86040 r amdgpu_fence_ops +ffffffff82d87000 r amdgpu_gem_object_funcs +ffffffff82d87070 r amdgpu_gem_vm_ops +ffffffff82d88000 R amdgpu_gtt_mgr_attr_group +ffffffff82d88018 r amdgpu_gtt_mgr_func +ffffffff82d89000 r amdgpu_atombios_i2c_algo +ffffffff82d8a000 R node_id_to_phys_map +ffffffff82d8b000 R amdgpu_sched_ops +ffffffff82d8d000 r amdgpu_vram_names +ffffffff82d8e000 r amdgpu_preempt_mgr_func +ffffffff82d8f000 R psp_ip_funcs +ffffffff82d8f0a8 R psp_v3_1_ip_block +ffffffff82d8f0c0 R psp_v10_0_ip_block +ffffffff82d8f0d8 R psp_v11_0_ip_block +ffffffff82d8f0f0 R psp_v11_0_8_ip_block +ffffffff82d8f108 R psp_v12_0_ip_block +ffffffff82d8f120 R psp_v13_0_ip_block +ffffffff82d8f138 R psp_v13_0_4_ip_block +ffffffff82d91000 r sw_ring_info +ffffffff82d92000 r amdgpu_evict_flags.placements +ffffffff82d96000 R amdgpu_vkms_ip_block +ffffffff82d97000 R amdgpu_vm_cpu_funcs +ffffffff82d99000 R amdgpu_vm_sdma_funcs +ffffffff82d9a000 R amdgpu_vram_mgr_attr_group +ffffffff82d9a018 r amdgpu_vram_mgr_func +ffffffff82d9a040 r amdgpu_dummy_vram_mgr_func +ffffffff82d9b000 r xgmi_pcs_err_status_reg_arct +ffffffff82d9b020 r xgmi3x16_pcs_ras_fields +ffffffff82d9b1f0 r xgmi_pcs_ras_fields +ffffffff82d9b310 r wafl_pcs_ras_fields +ffffffff82d9c000 r GC_BASE +ffffffff82d9c0c0 r HDP_BASE +ffffffff82d9c180 r MMHUB_BASE +ffffffff82d9c240 r ATHUB_BASE +ffffffff82d9c300 r NBIF0_BASE +ffffffff82d9c3c0 r MP0_BASE +ffffffff82d9c480 r MP1_BASE +ffffffff82d9c540 r UVD_BASE +ffffffff82d9c600 r DF_BASE +ffffffff82d9c6c0 r OSSSYS_BASE +ffffffff82d9c780 r SDMA0_BASE +ffffffff82d9c840 r SDMA1_BASE +ffffffff82d9c900 r SDMA2_BASE +ffffffff82d9c9c0 r SDMA3_BASE +ffffffff82d9ca80 r SDMA4_BASE +ffffffff82d9cb40 r SDMA5_BASE +ffffffff82d9cc00 r SDMA6_BASE +ffffffff82d9ccc0 r SDMA7_BASE +ffffffff82d9cd80 r SMUIO_BASE +ffffffff82d9ce40 r THM_BASE +ffffffff82d9cf00 r UMC_BASE +ffffffff82d9cfc0 r RSMU_BASE +ffffffff82d9e000 r cz_ih_ip_funcs +ffffffff82d9e0a8 R cz_ih_ip_block +ffffffff82d9e0c0 r cz_ih_funcs ffffffff82d9f000 r crtc_offsets -ffffffff82d9f020 r dce_v11_0_ip_funcs -ffffffff82d9f0c8 R dce_v11_0_ip_block -ffffffff82d9f0e0 R dce_v11_2_ip_block -ffffffff82d9f0f8 r dce_v11_0_display_funcs +ffffffff82d9f020 r dce_v10_0_ip_funcs +ffffffff82d9f0c8 R dce_v10_0_ip_block +ffffffff82d9f0e0 R dce_v10_1_ip_block +ffffffff82d9f0f8 r dce_v10_0_display_funcs ffffffff82d9f150 r hpd_offsets -ffffffff82d9f168 r dce_v11_0_encoder_funcs -ffffffff82d9f188 r dce_v11_0_dac_helper_funcs -ffffffff82d9f1f0 r dce_v11_0_dig_helper_funcs -ffffffff82d9f258 r dce_v11_0_ext_helper_funcs -ffffffff82d9f2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82d9f2f0 r dce_v11_0_crtc_irq_funcs -ffffffff82d9f300 r dce_v11_0_pageflip_irq_funcs -ffffffff82d9f310 r dce_v11_0_hpd_irq_funcs +ffffffff82d9f168 r dce_v10_0_encoder_funcs +ffffffff82d9f188 r dce_v10_0_dac_helper_funcs +ffffffff82d9f1f0 r dce_v10_0_dig_helper_funcs +ffffffff82d9f258 r dce_v10_0_ext_helper_funcs +ffffffff82d9f2c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82d9f2f0 r dce_v10_0_crtc_irq_funcs +ffffffff82d9f300 r dce_v10_0_pageflip_irq_funcs +ffffffff82d9f310 r dce_v10_0_hpd_irq_funcs ffffffff82d9f320 r interrupt_status_offsets -ffffffff82d9f380 r dce_v11_0_crtc_funcs -ffffffff82d9f440 r dce_v11_0_crtc_helper_funcs +ffffffff82d9f380 r dce_v10_0_crtc_funcs +ffffffff82d9f440 r dce_v10_0_crtc_helper_funcs ffffffff82d9f4c0 r vga_control_regs ffffffff82d9f4e0 r dig_offsets -ffffffff82d9f510 r cz_mgcg_cgcg_init -ffffffff82d9f530 r cz_golden_settings_a11 -ffffffff82d9f550 r stoney_golden_settings_a11 -ffffffff82d9f570 r polaris11_golden_settings_a11 -ffffffff82d9f5b0 r polaris10_golden_settings_a11 -ffffffff82da0000 R df_v1_7_funcs -ffffffff82da0070 r df_v1_7_channel_number -ffffffff82da1000 R df_v3_6_funcs -ffffffff82da1070 r df_v3_6_channel_number -ffffffff82da2000 R df_v4_3_funcs -ffffffff82da3000 r GC_BASE -ffffffff82da30a8 r HDP_BASE -ffffffff82da3150 r MMHUB_BASE -ffffffff82da31f8 r ATHUB_BASE -ffffffff82da32a0 r NBIO_BASE -ffffffff82da3348 r MP0_BASE -ffffffff82da33f0 r MP1_BASE -ffffffff82da3498 r VCN0_BASE -ffffffff82da3540 r DF_BASE -ffffffff82da35e8 r DCN_BASE -ffffffff82da3690 r OSSSYS_BASE -ffffffff82da3738 r SMUIO_BASE -ffffffff82da37e0 r THM_BASE -ffffffff82da4000 r gfx_v10_0_ip_funcs -ffffffff82da40a8 R gfx_v10_0_ip_block -ffffffff82da40c0 r gfx_v10_0_gfx_funcs -ffffffff82da4120 r golden_settings_gc_rlc_spm_10_0_nv10 -ffffffff82daa3c0 r golden_settings_gc_rlc_spm_10_1_nv14 -ffffffff82dadde0 r golden_settings_gc_rlc_spm_10_1_2_nv12 -ffffffff82db4080 r gfx_v10_0_kiq_pm4_funcs -ffffffff82db40c0 r gfx_v10_0_ring_funcs_kiq -ffffffff82db4200 r gfx_v10_0_ring_funcs_gfx -ffffffff82db4340 r gfx_v10_0_ring_funcs_compute -ffffffff82db4480 r gfx_v10_0_eop_irq_funcs -ffffffff82db4490 r gfx_v10_0_kiq_irq_funcs -ffffffff82db44a0 r gfx_v10_0_priv_reg_irq_funcs -ffffffff82db44b0 r gfx_v10_0_priv_inst_irq_funcs -ffffffff82db44c0 r gfx_v10_0_rlc_funcs -ffffffff82db4528 r gfx_v10_0_rlc_funcs_sriov -ffffffff82db4590 r gfx10_cs_data -ffffffff82db45b0 r gfx10_SECT_CONTEXT_defs -ffffffff82db4640 r gfx10_SECT_CONTEXT_def_1 -ffffffff82db49a0 r gfx10_SECT_CONTEXT_def_3 -ffffffff82db49b0 r gfx10_SECT_CONTEXT_def_4 -ffffffff82db4c28 r gfx10_SECT_CONTEXT_def_5 -ffffffff82db4c30 r gfx10_SECT_CONTEXT_def_6 -ffffffff82db4c40 r gfx10_SECT_CONTEXT_def_2 -ffffffff82db5080 r gfx10_SECT_CONTEXT_def_7 -ffffffff82db5190 r gfx10_SECT_CONTEXT_def_8 -ffffffff82db54c0 r golden_settings_gc_10_1 -ffffffff82db5880 r golden_settings_gc_10_0_nv10 -ffffffff82db5880 r golden_settings_gc_10_1_1 -ffffffff82db5c10 r golden_settings_gc_10_1_2 -ffffffff82db5c10 r golden_settings_gc_10_1_nv14 -ffffffff82db6000 r golden_settings_gc_10_1_2_nv12 -ffffffff82db6000 r golden_settings_gc_10_3 -ffffffff82db6408 r golden_settings_gc_10_3_sienna_cichlid -ffffffff82db6410 r golden_settings_gc_10_3_2 -ffffffff82db6800 r golden_settings_gc_10_3_vangogh -ffffffff82db6a60 r golden_settings_gc_10_3_3 -ffffffff82db6c40 r golden_settings_gc_10_3_4 -ffffffff82db6fa0 r golden_settings_gc_10_3_5 -ffffffff82db72a0 r golden_settings_gc_10_0_cyan_skillfish -ffffffff82db75d0 r golden_settings_gc_10_3_6 -ffffffff82db77e0 r golden_settings_gc_10_3_7 -ffffffff82db8000 r gfx_v11_0_ip_funcs -ffffffff82db80a8 R gfx_v11_0_ip_block -ffffffff82db80c0 r gfx_v11_0_gfx_funcs -ffffffff82db8120 r gfx_v11_0_kiq_pm4_funcs -ffffffff82db8160 r gfx_v11_0_ring_funcs_kiq -ffffffff82db82a0 r gfx_v11_0_ring_funcs_gfx -ffffffff82db83e0 r gfx_v11_0_ring_funcs_compute -ffffffff82db8520 r gfx_v11_0_eop_irq_funcs -ffffffff82db8530 r gfx_v11_0_priv_reg_irq_funcs -ffffffff82db8540 r gfx_v11_0_priv_inst_irq_funcs -ffffffff82db8550 r gfx_v11_0_rlc_gc_fed_irq_funcs -ffffffff82db8560 r gfx_v11_0_rlc_funcs -ffffffff82db85d0 r gfx11_cs_data -ffffffff82db85f0 r gfx11_SECT_CONTEXT_defs -ffffffff82db8670 r gfx11_SECT_CONTEXT_def_1 -ffffffff82db89d0 r gfx11_SECT_CONTEXT_def_3 -ffffffff82db89e0 r gfx11_SECT_CONTEXT_def_5 -ffffffff82db89e8 r gfx11_SECT_CONTEXT_def_6 -ffffffff82db89f0 r gfx11_SECT_CONTEXT_def_2 -ffffffff82db8e30 r gfx11_SECT_CONTEXT_def_4 -ffffffff82db90b0 r gfx11_SECT_CONTEXT_def_7 -ffffffff82db9520 r golden_settings_gc_11_0_1 -ffffffff82db9600 r golden_settings_gc_11_0 -ffffffff82dba000 r gfx_v8_0_ip_funcs -ffffffff82dba0a8 R gfx_v8_0_ip_block -ffffffff82dba0c0 R gfx_v8_1_ip_block -ffffffff82dba0d8 r gfx_v8_0_gfx_funcs -ffffffff82dba138 r gfx_v8_0_ring_funcs_kiq -ffffffff82dba278 r gfx_v8_0_ring_funcs_gfx -ffffffff82dba3b8 r gfx_v8_0_ring_funcs_compute -ffffffff82dba500 r amdgpu_gds_reg_offset -ffffffff82dba600 r gfx_v8_0_eop_irq_funcs -ffffffff82dba610 r gfx_v8_0_priv_reg_irq_funcs -ffffffff82dba620 r gfx_v8_0_priv_inst_irq_funcs -ffffffff82dba630 r gfx_v8_0_cp_ecc_error_irq_funcs -ffffffff82dba640 r gfx_v8_0_sq_irq_funcs -ffffffff82dba650 r sq_edc_source_names -ffffffff82dba688 r iceland_rlc_funcs -ffffffff82dba6f0 r vi_cs_data -ffffffff82dba710 r vi_SECT_CONTEXT_defs -ffffffff82dba790 r vi_SECT_CONTEXT_def_1 -ffffffff82dbaae0 r vi_SECT_CONTEXT_def_3 -ffffffff82dbab00 r vi_SECT_CONTEXT_def_4 -ffffffff82dbad74 r vi_SECT_CONTEXT_def_5 -ffffffff82dbad7c r vi_SECT_CONTEXT_def_6 -ffffffff82dbad80 r vi_SECT_CONTEXT_def_2 -ffffffff82dbb1d0 r vi_SECT_CONTEXT_def_7 -ffffffff82dbb580 r vgpr_init_compute_shader -ffffffff82dbb690 r vgpr_init_regs -ffffffff82dbb720 r sgpr1_init_regs -ffffffff82dbb7b0 r sgpr2_init_regs -ffffffff82dbb840 r sec_ded_counter_registers -ffffffff82dbb8b0 r iceland_mgcg_cgcg_init -ffffffff82dbbbb0 r golden_settings_iceland_a11 -ffffffff82dbbc70 r iceland_golden_common_all -ffffffff82dbbcd0 r fiji_mgcg_cgcg_init -ffffffff82dbbe80 r golden_settings_fiji_a10 -ffffffff82dbbf10 r fiji_golden_common_all -ffffffff82dbbf90 r tonga_mgcg_cgcg_init -ffffffff82dbc320 r golden_settings_tonga_a11 -ffffffff82dbc3e0 r tonga_golden_common_all -ffffffff82dbc440 r golden_settings_vegam_a11 -ffffffff82dbc510 r vegam_golden_common_all -ffffffff82dbc560 r golden_settings_polaris11_a11 -ffffffff82dbc630 r polaris11_golden_common_all -ffffffff82dbc680 r golden_settings_polaris10_a11 -ffffffff82dbc750 r polaris10_golden_common_all -ffffffff82dbc7b0 r cz_mgcg_cgcg_init -ffffffff82dbcb40 r cz_golden_settings_a11 -ffffffff82dbcbd0 r cz_golden_common_all -ffffffff82dbcc30 r stoney_mgcg_cgcg_init -ffffffff82dbcc70 r stoney_golden_settings_a11 -ffffffff82dbccf0 r stoney_golden_common_all -ffffffff82dbd000 R gfx_v9_0_ras_ops -ffffffff82dbd040 r gfx_v9_0_ip_funcs -ffffffff82dbd0e8 R gfx_v9_0_ip_block -ffffffff82dbd100 r ras_gfx_subblocks -ffffffff82dbdb80 r gfx_v9_0_edc_counter_regs -ffffffff82dbdf20 r gfx_v9_0_ras_fields -ffffffff82dbf000 r gfx_v9_0_gfx_funcs -ffffffff82dbf060 r gfx_v9_0_kiq_pm4_funcs -ffffffff82dbf0a0 r gfx_v9_0_ring_funcs_kiq -ffffffff82dbf1e0 r gfx_v9_0_ring_funcs_gfx -ffffffff82dbf320 r gfx_v9_0_sw_ring_funcs_gfx -ffffffff82dbf460 r gfx_v9_0_ring_funcs_compute -ffffffff82dbf5a0 r gfx_v9_0_eop_irq_funcs -ffffffff82dbf5b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82dbf5c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82dbf5d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82dbf5e0 r gfx_v9_0_rlc_funcs -ffffffff82dbf650 r gfx9_cs_data -ffffffff82dbf670 r gfx9_SECT_CONTEXT_defs -ffffffff82dbf700 r gfx9_SECT_CONTEXT_def_1 -ffffffff82dbfa50 r gfx9_SECT_CONTEXT_def_3 -ffffffff82dbfa60 r gfx9_SECT_CONTEXT_def_4 -ffffffff82dbfcd4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82dbfcdc r gfx9_SECT_CONTEXT_def_6 -ffffffff82dbfce0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82dbfdf0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82dc0260 r gfx9_SECT_CONTEXT_def_8 -ffffffff82dc04d0 r vgpr_init_compute_shader_arcturus -ffffffff82dc0d60 r vgpr_init_regs_arcturus -ffffffff82dc0ef0 r vgpr_init_regs -ffffffff82dc1080 r sgpr1_init_regs -ffffffff82dc1210 r sgpr2_init_regs -ffffffff82dc13a0 r golden_settings_gc_9_0 -ffffffff82dc1580 r golden_settings_gc_9_0_vg10 -ffffffff82dc1730 r golden_settings_gc_9_2_1 -ffffffff82dc18b0 r golden_settings_gc_9_2_1_vg12 -ffffffff82dc19f0 r golden_settings_gc_9_0_vg20 -ffffffff82dc1b00 r golden_settings_gc_9_4_1_arct -ffffffff82dc1c10 r golden_settings_gc_9_1 -ffffffff82dc1e50 r golden_settings_gc_9_1_rv2 -ffffffff82dc2020 r golden_settings_gc_9_1_rv1 -ffffffff82dc20d0 r golden_settings_gc_9_1_rn -ffffffff82dc21f0 r golden_settings_gc_9_x_common -ffffffff82dc3000 R gfx_v9_4_ras_ops -ffffffff82dc3040 r gfx_v9_4_edc_counter_regs -ffffffff82dc3420 r gfx_v9_4_ras_fields -ffffffff82dc5000 R vgpr_init_regs_aldebaran -ffffffff82dc51b0 R sgpr112_init_regs_aldebaran -ffffffff82dc5360 R sgpr96_init_regs_aldebaran -ffffffff82dc5510 R sgpr64_init_regs_aldebaran -ffffffff82dc56c0 r golden_settings_gc_9_4_2_alde -ffffffff82dc5720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82dc57b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82dc5840 r sgpr112_init_compute_shader_aldebaran -ffffffff82dc5a60 r sgpr96_init_compute_shader_aldebaran -ffffffff82dc5c50 r sgpr64_init_compute_shader_aldebaran -ffffffff82dc5dc0 r vgpr_init_compute_shader_aldebaran -ffffffff82dc66a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82dc6a20 r gfx_v9_4_2_ras_fields -ffffffff82dc83c0 r gfx_v9_4_2_utc_blocks -ffffffff82dc9000 r gfx_v9_4_3_ip_funcs -ffffffff82dc90a8 R gfx_v9_4_3_ip_block -ffffffff82dc90c0 r gfx_v9_4_3_kiq_pm4_funcs -ffffffff82dc9100 r gfx_v9_4_3_ring_funcs_kiq -ffffffff82dc9240 r gfx_v9_4_3_ring_funcs_compute -ffffffff82dc9380 r gfx_v9_4_3_eop_irq_funcs -ffffffff82dc9390 r gfx_v9_4_3_priv_reg_irq_funcs -ffffffff82dc93a0 r gfx_v9_4_3_priv_inst_irq_funcs -ffffffff82dc93b0 r gfx_v9_4_3_rlc_funcs -ffffffff82dc9418 r gfx_v9_4_3_gfx_funcs -ffffffff82dc9480 r gfx_v9_4_3_ce_reg_list -ffffffff82dc9810 r gfx_v9_4_3_ras_mem_list_array -ffffffff82dc9970 r gfx_v9_4_3_ue_reg_list -ffffffff82dc9d30 r gfx_v9_4_3_ras_cp_mem_list -ffffffff82dc9d80 r gfx_v9_4_3_ras_gcea_mem_list -ffffffff82dc9ec0 r gfx_v9_4_3_ras_gc_cane_mem_list -ffffffff82dc9ed0 r gfx_v9_4_3_ras_gcutcl2_mem_list -ffffffff82dc9ee0 r gfx_v9_4_3_ras_gds_mem_list -ffffffff82dc9ef0 r gfx_v9_4_3_ras_lds_mem_list -ffffffff82dca110 r gfx_v9_4_3_ras_rlc_mem_list -ffffffff82dca190 r gfx_v9_4_3_ras_sp_mem_list -ffffffff82dca1a0 r gfx_v9_4_3_ras_spi_mem_list -ffffffff82dca1e0 r gfx_v9_4_3_ras_sqc_mem_list -ffffffff82dca350 r gfx_v9_4_3_ras_sq_mem_list -ffffffff82dca390 r gfx_v9_4_3_ras_ta_mem_list -ffffffff82dca3e0 r gfx_v9_4_3_ras_tcc_mem_list -ffffffff82dca3f0 r gfx_v9_4_3_ras_tca_mem_list -ffffffff82dca400 r gfx_v9_4_3_ras_tci_mem_list -ffffffff82dca410 r gfx_v9_4_3_ras_tcp_mem_list -ffffffff82dca5a0 r gfx_v9_4_3_ras_td_mem_list -ffffffff82dca5d0 r gfx_v9_4_3_ras_tcx_mem_list -ffffffff82dcab50 r gfx_v9_4_3_ras_atc_l2_mem_list -ffffffff82dcab60 r gfx_v9_4_3_ras_utcl2_mem_list -ffffffff82dcab70 r gfx_v9_4_3_ras_vml2_mem_list -ffffffff82dcab80 r gfx_v9_4_3_ras_vml2_walker_mem_list -ffffffff82dcb000 R gfxhub_v1_0_funcs -ffffffff82dcc000 R gfxhub_v1_2_funcs -ffffffff82dcd000 R gfxhub_v2_0_funcs -ffffffff82dcd060 r gfxhub_v2_0_vmhub_funcs -ffffffff82dcd070 r gfxhub_client_ids -ffffffff82dce000 R gfxhub_v2_1_funcs -ffffffff82dce060 r gfxhub_v2_1_vmhub_funcs +ffffffff82d9f500 r pin_offsets +ffffffff82d9f520 r fiji_mgcg_cgcg_init +ffffffff82d9f540 r golden_settings_fiji_a10 +ffffffff82d9f570 r tonga_mgcg_cgcg_init +ffffffff82d9f590 r golden_settings_tonga_a11 +ffffffff82da0000 r crtc_offsets +ffffffff82da0020 r dce_v11_0_ip_funcs +ffffffff82da00c8 R dce_v11_0_ip_block +ffffffff82da00e0 R dce_v11_2_ip_block +ffffffff82da00f8 r dce_v11_0_display_funcs +ffffffff82da0150 r hpd_offsets +ffffffff82da0168 r dce_v11_0_encoder_funcs +ffffffff82da0188 r dce_v11_0_dac_helper_funcs +ffffffff82da01f0 r dce_v11_0_dig_helper_funcs +ffffffff82da0258 r dce_v11_0_ext_helper_funcs +ffffffff82da02c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82da02f0 r dce_v11_0_crtc_irq_funcs +ffffffff82da0300 r dce_v11_0_pageflip_irq_funcs +ffffffff82da0310 r dce_v11_0_hpd_irq_funcs +ffffffff82da0320 r interrupt_status_offsets +ffffffff82da0380 r dce_v11_0_crtc_funcs +ffffffff82da0440 r dce_v11_0_crtc_helper_funcs +ffffffff82da04c0 r vga_control_regs +ffffffff82da04e0 r dig_offsets +ffffffff82da0510 r cz_mgcg_cgcg_init +ffffffff82da0530 r cz_golden_settings_a11 +ffffffff82da0550 r stoney_golden_settings_a11 +ffffffff82da0570 r polaris11_golden_settings_a11 +ffffffff82da05b0 r polaris10_golden_settings_a11 +ffffffff82da1000 R df_v1_7_funcs +ffffffff82da1070 r df_v1_7_channel_number +ffffffff82da2000 R df_v3_6_funcs +ffffffff82da2070 r df_v3_6_channel_number +ffffffff82da3000 R df_v4_3_funcs +ffffffff82da4000 r GC_BASE +ffffffff82da40a8 r HDP_BASE +ffffffff82da4150 r MMHUB_BASE +ffffffff82da41f8 r ATHUB_BASE +ffffffff82da42a0 r NBIO_BASE +ffffffff82da4348 r MP0_BASE +ffffffff82da43f0 r MP1_BASE +ffffffff82da4498 r VCN0_BASE +ffffffff82da4540 r DF_BASE +ffffffff82da45e8 r DCN_BASE +ffffffff82da4690 r OSSSYS_BASE +ffffffff82da4738 r SMUIO_BASE +ffffffff82da47e0 r THM_BASE +ffffffff82da5000 r gfx_v10_0_ip_funcs +ffffffff82da50a8 R gfx_v10_0_ip_block +ffffffff82da50c0 r gfx_v10_0_gfx_funcs +ffffffff82da5120 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82dab3c0 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82daede0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82db5080 r gfx_v10_0_kiq_pm4_funcs +ffffffff82db50c0 r gfx_v10_0_ring_funcs_kiq +ffffffff82db5200 r gfx_v10_0_ring_funcs_gfx +ffffffff82db5340 r gfx_v10_0_ring_funcs_compute +ffffffff82db5480 r gfx_v10_0_eop_irq_funcs +ffffffff82db5490 r gfx_v10_0_kiq_irq_funcs +ffffffff82db54a0 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82db54b0 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82db54c0 r gfx_v10_0_rlc_funcs +ffffffff82db5528 r gfx_v10_0_rlc_funcs_sriov +ffffffff82db5590 r gfx10_cs_data +ffffffff82db55b0 r gfx10_SECT_CONTEXT_defs +ffffffff82db5640 r gfx10_SECT_CONTEXT_def_1 +ffffffff82db59a0 r gfx10_SECT_CONTEXT_def_3 +ffffffff82db59b0 r gfx10_SECT_CONTEXT_def_4 +ffffffff82db5c28 r gfx10_SECT_CONTEXT_def_5 +ffffffff82db5c30 r gfx10_SECT_CONTEXT_def_6 +ffffffff82db5c40 r gfx10_SECT_CONTEXT_def_2 +ffffffff82db6080 r gfx10_SECT_CONTEXT_def_7 +ffffffff82db6190 r gfx10_SECT_CONTEXT_def_8 +ffffffff82db64c0 r golden_settings_gc_10_1 +ffffffff82db6880 r golden_settings_gc_10_0_nv10 +ffffffff82db6880 r golden_settings_gc_10_1_1 +ffffffff82db6c10 r golden_settings_gc_10_1_2 +ffffffff82db6c10 r golden_settings_gc_10_1_nv14 +ffffffff82db7000 r golden_settings_gc_10_1_2_nv12 +ffffffff82db7000 r golden_settings_gc_10_3 +ffffffff82db7408 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82db7410 r golden_settings_gc_10_3_2 +ffffffff82db7800 r golden_settings_gc_10_3_vangogh +ffffffff82db7a60 r golden_settings_gc_10_3_3 +ffffffff82db7c40 r golden_settings_gc_10_3_4 +ffffffff82db7fa0 r golden_settings_gc_10_3_5 +ffffffff82db82a0 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82db85d0 r golden_settings_gc_10_3_6 +ffffffff82db87e0 r golden_settings_gc_10_3_7 +ffffffff82db9000 r gfx_v11_0_ip_funcs +ffffffff82db90a8 R gfx_v11_0_ip_block +ffffffff82db90c0 r gfx_v11_0_gfx_funcs +ffffffff82db9120 r gfx_v11_0_kiq_pm4_funcs +ffffffff82db9160 r gfx_v11_0_ring_funcs_kiq +ffffffff82db92a0 r gfx_v11_0_ring_funcs_gfx +ffffffff82db93e0 r gfx_v11_0_ring_funcs_compute +ffffffff82db9520 r gfx_v11_0_eop_irq_funcs +ffffffff82db9530 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82db9540 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82db9550 r gfx_v11_0_rlc_gc_fed_irq_funcs +ffffffff82db9560 r gfx_v11_0_rlc_funcs +ffffffff82db95d0 r gfx11_cs_data +ffffffff82db95f0 r gfx11_SECT_CONTEXT_defs +ffffffff82db9670 r gfx11_SECT_CONTEXT_def_1 +ffffffff82db99d0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82db99e0 r gfx11_SECT_CONTEXT_def_5 +ffffffff82db99e8 r gfx11_SECT_CONTEXT_def_6 +ffffffff82db99f0 r gfx11_SECT_CONTEXT_def_2 +ffffffff82db9e30 r gfx11_SECT_CONTEXT_def_4 +ffffffff82dba0b0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82dba520 r golden_settings_gc_11_0_1 +ffffffff82dba600 r golden_settings_gc_11_0 +ffffffff82dbb000 r gfx_v8_0_ip_funcs +ffffffff82dbb0a8 R gfx_v8_0_ip_block +ffffffff82dbb0c0 R gfx_v8_1_ip_block +ffffffff82dbb0d8 r gfx_v8_0_gfx_funcs +ffffffff82dbb138 r gfx_v8_0_ring_funcs_kiq +ffffffff82dbb278 r gfx_v8_0_ring_funcs_gfx +ffffffff82dbb3b8 r gfx_v8_0_ring_funcs_compute +ffffffff82dbb500 r amdgpu_gds_reg_offset +ffffffff82dbb600 r gfx_v8_0_eop_irq_funcs +ffffffff82dbb610 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82dbb620 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82dbb630 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82dbb640 r gfx_v8_0_sq_irq_funcs +ffffffff82dbb650 r sq_edc_source_names +ffffffff82dbb688 r iceland_rlc_funcs +ffffffff82dbb6f0 r vi_cs_data +ffffffff82dbb710 r vi_SECT_CONTEXT_defs +ffffffff82dbb790 r vi_SECT_CONTEXT_def_1 +ffffffff82dbbae0 r vi_SECT_CONTEXT_def_3 +ffffffff82dbbb00 r vi_SECT_CONTEXT_def_4 +ffffffff82dbbd74 r vi_SECT_CONTEXT_def_5 +ffffffff82dbbd7c r vi_SECT_CONTEXT_def_6 +ffffffff82dbbd80 r vi_SECT_CONTEXT_def_2 +ffffffff82dbc1d0 r vi_SECT_CONTEXT_def_7 +ffffffff82dbc580 r vgpr_init_compute_shader +ffffffff82dbc690 r vgpr_init_regs +ffffffff82dbc720 r sgpr1_init_regs +ffffffff82dbc7b0 r sgpr2_init_regs +ffffffff82dbc840 r sec_ded_counter_registers +ffffffff82dbc8b0 r iceland_mgcg_cgcg_init +ffffffff82dbcbb0 r golden_settings_iceland_a11 +ffffffff82dbcc70 r iceland_golden_common_all +ffffffff82dbccd0 r fiji_mgcg_cgcg_init +ffffffff82dbce80 r golden_settings_fiji_a10 +ffffffff82dbcf10 r fiji_golden_common_all +ffffffff82dbcf90 r tonga_mgcg_cgcg_init +ffffffff82dbd320 r golden_settings_tonga_a11 +ffffffff82dbd3e0 r tonga_golden_common_all +ffffffff82dbd440 r golden_settings_vegam_a11 +ffffffff82dbd510 r vegam_golden_common_all +ffffffff82dbd560 r golden_settings_polaris11_a11 +ffffffff82dbd630 r polaris11_golden_common_all +ffffffff82dbd680 r golden_settings_polaris10_a11 +ffffffff82dbd750 r polaris10_golden_common_all +ffffffff82dbd7b0 r cz_mgcg_cgcg_init +ffffffff82dbdb40 r cz_golden_settings_a11 +ffffffff82dbdbd0 r cz_golden_common_all +ffffffff82dbdc30 r stoney_mgcg_cgcg_init +ffffffff82dbdc70 r stoney_golden_settings_a11 +ffffffff82dbdcf0 r stoney_golden_common_all +ffffffff82dbe000 R gfx_v9_0_ras_ops +ffffffff82dbe040 r gfx_v9_0_ip_funcs +ffffffff82dbe0e8 R gfx_v9_0_ip_block +ffffffff82dbe100 r ras_gfx_subblocks +ffffffff82dbeb80 r gfx_v9_0_edc_counter_regs +ffffffff82dbef20 r gfx_v9_0_ras_fields +ffffffff82dc0000 r gfx_v9_0_gfx_funcs +ffffffff82dc0060 r gfx_v9_0_kiq_pm4_funcs +ffffffff82dc00a0 r gfx_v9_0_ring_funcs_kiq +ffffffff82dc01e0 r gfx_v9_0_ring_funcs_gfx +ffffffff82dc0320 r gfx_v9_0_sw_ring_funcs_gfx +ffffffff82dc0460 r gfx_v9_0_ring_funcs_compute +ffffffff82dc05a0 r gfx_v9_0_eop_irq_funcs +ffffffff82dc05b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82dc05c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82dc05d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82dc05e0 r gfx_v9_0_rlc_funcs +ffffffff82dc0650 r gfx9_cs_data +ffffffff82dc0670 r gfx9_SECT_CONTEXT_defs +ffffffff82dc0700 r gfx9_SECT_CONTEXT_def_1 +ffffffff82dc0a50 r gfx9_SECT_CONTEXT_def_3 +ffffffff82dc0a60 r gfx9_SECT_CONTEXT_def_4 +ffffffff82dc0cd4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82dc0cdc r gfx9_SECT_CONTEXT_def_6 +ffffffff82dc0ce0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82dc0df0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82dc1260 r gfx9_SECT_CONTEXT_def_8 +ffffffff82dc14d0 r vgpr_init_compute_shader_arcturus +ffffffff82dc1d60 r vgpr_init_regs_arcturus +ffffffff82dc1ef0 r vgpr_init_regs +ffffffff82dc2080 r sgpr1_init_regs +ffffffff82dc2210 r sgpr2_init_regs +ffffffff82dc23a0 r golden_settings_gc_9_0 +ffffffff82dc2580 r golden_settings_gc_9_0_vg10 +ffffffff82dc2730 r golden_settings_gc_9_2_1 +ffffffff82dc28b0 r golden_settings_gc_9_2_1_vg12 +ffffffff82dc29f0 r golden_settings_gc_9_0_vg20 +ffffffff82dc2b00 r golden_settings_gc_9_4_1_arct +ffffffff82dc2c10 r golden_settings_gc_9_1 +ffffffff82dc2e50 r golden_settings_gc_9_1_rv2 +ffffffff82dc3020 r golden_settings_gc_9_1_rv1 +ffffffff82dc30d0 r golden_settings_gc_9_1_rn +ffffffff82dc31f0 r golden_settings_gc_9_x_common +ffffffff82dc4000 R gfx_v9_4_ras_ops +ffffffff82dc4040 r gfx_v9_4_edc_counter_regs +ffffffff82dc4420 r gfx_v9_4_ras_fields +ffffffff82dc6000 R vgpr_init_regs_aldebaran +ffffffff82dc61b0 R sgpr112_init_regs_aldebaran +ffffffff82dc6360 R sgpr96_init_regs_aldebaran +ffffffff82dc6510 R sgpr64_init_regs_aldebaran +ffffffff82dc66c0 r golden_settings_gc_9_4_2_alde +ffffffff82dc6720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82dc67b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82dc6840 r sgpr112_init_compute_shader_aldebaran +ffffffff82dc6a60 r sgpr96_init_compute_shader_aldebaran +ffffffff82dc6c50 r sgpr64_init_compute_shader_aldebaran +ffffffff82dc6dc0 r vgpr_init_compute_shader_aldebaran +ffffffff82dc76a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82dc7a20 r gfx_v9_4_2_ras_fields +ffffffff82dc93c0 r gfx_v9_4_2_utc_blocks +ffffffff82dca000 r gfx_v9_4_3_ip_funcs +ffffffff82dca0a8 R gfx_v9_4_3_ip_block +ffffffff82dca0c0 r gfx_v9_4_3_kiq_pm4_funcs +ffffffff82dca100 r gfx_v9_4_3_ring_funcs_kiq +ffffffff82dca240 r gfx_v9_4_3_ring_funcs_compute +ffffffff82dca380 r gfx_v9_4_3_eop_irq_funcs +ffffffff82dca390 r gfx_v9_4_3_priv_reg_irq_funcs +ffffffff82dca3a0 r gfx_v9_4_3_priv_inst_irq_funcs +ffffffff82dca3b0 r gfx_v9_4_3_rlc_funcs +ffffffff82dca418 r gfx_v9_4_3_gfx_funcs +ffffffff82dca480 r gfx_v9_4_3_ce_reg_list +ffffffff82dca810 r gfx_v9_4_3_ras_mem_list_array +ffffffff82dca970 r gfx_v9_4_3_ue_reg_list +ffffffff82dcad30 r gfx_v9_4_3_ras_cp_mem_list +ffffffff82dcad80 r gfx_v9_4_3_ras_gcea_mem_list +ffffffff82dcaec0 r gfx_v9_4_3_ras_gc_cane_mem_list +ffffffff82dcaed0 r gfx_v9_4_3_ras_gcutcl2_mem_list +ffffffff82dcaee0 r gfx_v9_4_3_ras_gds_mem_list +ffffffff82dcaef0 r gfx_v9_4_3_ras_lds_mem_list +ffffffff82dcb110 r gfx_v9_4_3_ras_rlc_mem_list +ffffffff82dcb190 r gfx_v9_4_3_ras_sp_mem_list +ffffffff82dcb1a0 r gfx_v9_4_3_ras_spi_mem_list +ffffffff82dcb1e0 r gfx_v9_4_3_ras_sqc_mem_list +ffffffff82dcb350 r gfx_v9_4_3_ras_sq_mem_list +ffffffff82dcb390 r gfx_v9_4_3_ras_ta_mem_list +ffffffff82dcb3e0 r gfx_v9_4_3_ras_tcc_mem_list +ffffffff82dcb3f0 r gfx_v9_4_3_ras_tca_mem_list +ffffffff82dcb400 r gfx_v9_4_3_ras_tci_mem_list +ffffffff82dcb410 r gfx_v9_4_3_ras_tcp_mem_list +ffffffff82dcb5a0 r gfx_v9_4_3_ras_td_mem_list +ffffffff82dcb5d0 r gfx_v9_4_3_ras_tcx_mem_list +ffffffff82dcbb50 r gfx_v9_4_3_ras_atc_l2_mem_list +ffffffff82dcbb60 r gfx_v9_4_3_ras_utcl2_mem_list +ffffffff82dcbb70 r gfx_v9_4_3_ras_vml2_mem_list +ffffffff82dcbb80 r gfx_v9_4_3_ras_vml2_walker_mem_list +ffffffff82dcc000 R gfxhub_v1_0_funcs +ffffffff82dcd000 R gfxhub_v1_2_funcs +ffffffff82dce000 R gfxhub_v2_0_funcs +ffffffff82dce060 r gfxhub_v2_0_vmhub_funcs ffffffff82dce070 r gfxhub_client_ids -ffffffff82dcf000 R gfxhub_v3_0_funcs -ffffffff82dcf060 r gfxhub_v3_0_vmhub_funcs +ffffffff82dcf000 R gfxhub_v2_1_funcs +ffffffff82dcf060 r gfxhub_v2_1_vmhub_funcs ffffffff82dcf070 r gfxhub_client_ids -ffffffff82dd0000 R gfxhub_v3_0_3_funcs -ffffffff82dd0060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82dd0000 R gfxhub_v3_0_funcs +ffffffff82dd0060 r gfxhub_v3_0_vmhub_funcs ffffffff82dd0070 r gfxhub_client_ids -ffffffff82dd1000 R gmc_v10_0_ip_funcs -ffffffff82dd10a8 R gmc_v10_0_ip_block -ffffffff82dd10c0 r gmc_v10_0_gmc_funcs -ffffffff82dd1118 r gmc_v10_0_irq_funcs -ffffffff82dd1128 r gmc_v10_0_ecc_funcs -ffffffff82dd2000 R gmc_v11_0_ip_funcs -ffffffff82dd20a8 R gmc_v11_0_ip_block -ffffffff82dd20c0 r gmc_v11_0_gmc_funcs -ffffffff82dd2118 r gmc_v11_0_irq_funcs -ffffffff82dd2128 r gmc_v11_0_ecc_funcs -ffffffff82dd3000 r gmc_v7_0_ip_funcs -ffffffff82dd30a8 R gmc_v7_0_ip_block -ffffffff82dd30c0 R gmc_v7_4_ip_block -ffffffff82dd30d8 r gmc_v7_0_gmc_funcs -ffffffff82dd3130 r gmc_v7_0_irq_funcs -ffffffff82dd3140 r iceland_mgcg_cgcg_init -ffffffff82dd3150 r golden_settings_iceland_a11 -ffffffff82dd3180 r mc_cg_registers -ffffffff82dd31b0 r mc_cg_en -ffffffff82dd31e0 r mc_cg_ls_en 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psp_v13_0_funcs +ffffffff82e0b000 r psp_v13_0_4_funcs +ffffffff82e0c000 r psp_v3_1_funcs +ffffffff82e0d000 r sdma_v2_4_ip_funcs +ffffffff82e0d0a8 R sdma_v2_4_ip_block +ffffffff82e0d0c0 r sdma_v2_4_ring_funcs +ffffffff82e0d200 r sdma_v2_4_buffer_funcs +ffffffff82e0d220 r sdma_v2_4_vm_pte_funcs +ffffffff82e0d240 r sdma_v2_4_trap_irq_funcs +ffffffff82e0d250 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82e0d260 r iceland_mgcg_cgcg_init +ffffffff82e0d280 r golden_settings_iceland_a11 +ffffffff82e0e000 r sdma_v3_0_ip_funcs +ffffffff82e0e0a8 R sdma_v3_0_ip_block +ffffffff82e0e0c0 R sdma_v3_1_ip_block +ffffffff82e0e0d8 r sdma_v3_0_ring_funcs +ffffffff82e0e218 r sdma_v3_0_buffer_funcs +ffffffff82e0e238 r sdma_v3_0_vm_pte_funcs +ffffffff82e0e258 r sdma_v3_0_trap_irq_funcs +ffffffff82e0e268 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82e0e280 r fiji_mgcg_cgcg_init +ffffffff82e0e2a0 r golden_settings_fiji_a10 +ffffffff82e0e300 r tonga_mgcg_cgcg_init +ffffffff82e0e320 r golden_settings_tonga_a11 +ffffffff82e0e3a0 r golden_settings_polaris11_a11 +ffffffff82e0e420 r golden_settings_polaris10_a11 +ffffffff82e0e4a0 r cz_mgcg_cgcg_init +ffffffff82e0e4c0 r cz_golden_settings_a11 +ffffffff82e0e550 r stoney_mgcg_cgcg_init +ffffffff82e0e560 r stoney_golden_settings_a11 +ffffffff82e0f000 R sdma_v4_0_ip_funcs +ffffffff82e0f0a8 R sdma_v4_0_ras_hw_ops +ffffffff82e0f0e8 R sdma_v4_0_ip_block +ffffffff82e0f100 r sdma_v4_0_ring_funcs +ffffffff82e0f240 r sdma_v4_0_page_ring_funcs +ffffffff82e0f380 r sdma_v4_0_buffer_funcs +ffffffff82e0f3a0 r sdma_v4_0_vm_pte_funcs +ffffffff82e0f3c0 r sdma_v4_0_trap_irq_funcs +ffffffff82e0f3d0 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82e0f3e0 r sdma_v4_0_ecc_irq_funcs +ffffffff82e0f3f0 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82e0f400 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82e0f410 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82e0f420 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82e0f430 r golden_settings_sdma_4 +ffffffff82e0f690 r golden_settings_sdma_vg10 +ffffffff82e0f740 r golden_settings_sdma_vg12 +ffffffff82e0f7f0 r golden_settings_sdma0_4_2_init +ffffffff82e0f810 r golden_settings_sdma0_4_2 +ffffffff82e0faa0 r golden_settings_sdma1_4_2 +ffffffff82e0fd30 r golden_settings_sdma_arct +ffffffff82e10030 r golden_settings_sdma_aldebaran +ffffffff82e101a0 r golden_settings_sdma_4_1 +ffffffff82e102b0 r golden_settings_sdma_rv2 +ffffffff82e102e0 r golden_settings_sdma_rv1 +ffffffff82e10310 r golden_settings_sdma_4_3 +ffffffff82e10400 r sdma_v4_0_ras_fields +ffffffff82e11000 R sdma_v4_4_ras_hw_ops +ffffffff82e11040 r sdma_v4_4_ras_fields +ffffffff82e12000 R sdma_v4_4_2_ip_funcs +ffffffff82e120a8 R sdma_v4_4_2_ip_block +ffffffff82e120c0 r sdma_v4_4_2_ring_funcs +ffffffff82e12200 r sdma_v4_4_2_page_ring_funcs +ffffffff82e12340 r sdma_v4_4_2_buffer_funcs +ffffffff82e12360 r sdma_v4_4_2_vm_pte_funcs +ffffffff82e12380 r sdma_v4_4_2_trap_irq_funcs +ffffffff82e12390 r sdma_v4_4_2_illegal_inst_irq_funcs +ffffffff82e123a0 r sdma_v4_4_2_ecc_irq_funcs +ffffffff82e123b0 r sdma_v4_4_2_vm_hole_irq_funcs +ffffffff82e123c0 r sdma_v4_4_2_doorbell_invalid_irq_funcs +ffffffff82e123d0 r sdma_v4_4_2_pool_timeout_irq_funcs +ffffffff82e123e0 r sdma_v4_4_2_srbm_write_irq_funcs +ffffffff82e123f0 r sdma_v4_4_2_ras_hw_ops +ffffffff82e12430 r sdma_v4_2_2_ue_reg_list +ffffffff82e12460 r sdma_v4_4_2_ras_memory_list +ffffffff82e13000 R sdma_v5_0_ip_funcs +ffffffff82e130a8 R sdma_v5_0_ip_block +ffffffff82e130c0 r sdma_v5_0_ring_funcs +ffffffff82e13200 r sdma_v5_0_buffer_funcs +ffffffff82e13220 r sdma_v5_0_vm_pte_funcs +ffffffff82e13240 r sdma_v5_0_trap_irq_funcs +ffffffff82e13250 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82e13260 r golden_settings_sdma_5 +ffffffff82e134a0 r golden_settings_sdma_nv10 +ffffffff82e134d0 r golden_settings_sdma_nv14 +ffffffff82e13500 r golden_settings_sdma_5_sriov +ffffffff82e136e0 r golden_settings_sdma_nv12 +ffffffff82e13770 r golden_settings_sdma_cyan_skillfish +ffffffff82e14000 R sdma_v5_2_ip_funcs +ffffffff82e140a8 R sdma_v5_2_ip_block +ffffffff82e140c0 r sdma_v5_2_ring_funcs +ffffffff82e14200 r sdma_v5_2_buffer_funcs +ffffffff82e14220 r sdma_v5_2_vm_pte_funcs +ffffffff82e14240 r sdma_v5_2_trap_irq_funcs +ffffffff82e14250 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82e15000 R sdma_v6_0_ip_funcs +ffffffff82e150a8 R sdma_v6_0_ip_block +ffffffff82e150c0 r sdma_v6_0_ring_funcs +ffffffff82e15200 r sdma_v6_0_buffer_funcs +ffffffff82e15220 r sdma_v6_0_vm_pte_funcs +ffffffff82e15240 r sdma_v6_0_trap_irq_funcs +ffffffff82e15250 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82e16000 r smu_v11_0_i2c_algo +ffffffff82e16010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82e16028 r smu_v11_0_i2c_control_quirks +ffffffff82e17000 R smuio_v11_0_funcs +ffffffff82e18000 R smuio_v11_0_6_funcs +ffffffff82e19000 R smuio_v13_0_funcs +ffffffff82e1a000 R smuio_v13_0_3_funcs +ffffffff82e1b000 R smuio_v13_0_6_funcs +ffffffff82e1c000 R smuio_v9_0_funcs +ffffffff82e1d000 r soc15_common_ip_funcs +ffffffff82e1d0a8 R vega10_common_ip_block +ffffffff82e1d0c0 r soc15_asic_funcs +ffffffff82e1d180 r vega20_asic_funcs +ffffffff82e1d240 r aqua_vanjaram_asic_funcs +ffffffff82e1d300 r soc15_allowed_read_registers +ffffffff82e1d490 r vega_video_codecs_encode +ffffffff82e1d4a0 r vega_video_codecs_decode +ffffffff82e1d4b0 r rv_video_codecs_decode +ffffffff82e1d4c0 r rn_video_codecs_decode +ffffffff82e1d4d0 r vcn_4_0_3_video_codecs_encode +ffffffff82e1d4e0 r vcn_4_0_3_video_codecs_decode +ffffffff82e1d4f0 r vega_video_codecs_encode_array +ffffffff82e1d520 r vega_video_codecs_decode_array +ffffffff82e1d5a0 r rv_video_codecs_decode_array +ffffffff82e1d630 r rn_video_codecs_decode_array +ffffffff82e1d6c0 r vcn_4_0_3_video_codecs_decode_array +ffffffff82e1e000 r soc21_common_ip_funcs +ffffffff82e1e0a8 R soc21_common_ip_block +ffffffff82e1e0c0 r soc21_asic_funcs +ffffffff82e1e180 r soc21_allowed_read_registers +ffffffff82e1e300 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82e1e310 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82e1e320 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82e1e330 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82e1e340 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82e1e370 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82e1e3c0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82e1e400 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82e1f000 r tonga_ih_ip_funcs +ffffffff82e1f0a8 R tonga_ih_ip_block +ffffffff82e1f0c0 r tonga_ih_funcs +ffffffff82e20000 R umc_v6_0_funcs +ffffffff82e21000 R umc_v6_1_channel_idx_tbl +ffffffff82e21080 R umc_v6_1_ras_hw_ops +ffffffff82e22000 R umc_v6_7_channel_idx_tbl_second +ffffffff82e22080 R umc_v6_7_channel_idx_tbl_first +ffffffff82e22100 R umc_v6_7_ras_hw_ops +ffffffff82e23000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82e23040 R umc_v8_10_channel_idx_tbl_ext0 +ffffffff82e23080 R umc_v8_10_channel_idx_tbl +ffffffff82e230e0 R umc_v8_10_ras_hw_ops +ffffffff82e24000 R umc_v8_7_channel_idx_tbl +ffffffff82e24040 R umc_v8_7_ras_hw_ops +ffffffff82e25000 r uvd_v5_0_ip_funcs +ffffffff82e250a8 R uvd_v5_0_ip_block +ffffffff82e250c0 r uvd_v5_0_ring_funcs +ffffffff82e25200 r uvd_v5_0_irq_funcs +ffffffff82e26000 r uvd_v6_0_ip_funcs +ffffffff82e260a8 R uvd_v6_0_ip_block +ffffffff82e260c0 R uvd_v6_2_ip_block +ffffffff82e260d8 R uvd_v6_3_ip_block +ffffffff82e260f0 r uvd_v6_0_ring_vm_funcs +ffffffff82e26230 r uvd_v6_0_ring_phys_funcs +ffffffff82e26370 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82e264b0 r uvd_v6_0_irq_funcs +ffffffff82e27000 R uvd_v7_0_ip_funcs +ffffffff82e270a8 R uvd_v7_0_ip_block +ffffffff82e270c0 r uvd_v7_0_ring_vm_funcs +ffffffff82e27200 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82e27340 r uvd_v7_0_irq_funcs +ffffffff82e28000 r vce_v3_0_ip_funcs +ffffffff82e280a8 R vce_v3_0_ip_block +ffffffff82e280c0 R vce_v3_1_ip_block +ffffffff82e280d8 R vce_v3_4_ip_block +ffffffff82e280f0 r vce_v3_0_ring_vm_funcs +ffffffff82e28230 r vce_v3_0_ring_phys_funcs +ffffffff82e28370 r vce_v3_0_irq_funcs +ffffffff82e29000 R vce_v4_0_ip_funcs +ffffffff82e290a8 R vce_v4_0_ip_block +ffffffff82e290c0 r vce_v4_0_ring_vm_funcs +ffffffff82e29200 r vce_v4_0_irq_funcs +ffffffff82e2a000 r vcn_v1_0_ip_funcs +ffffffff82e2a0a8 R vcn_v1_0_ip_block +ffffffff82e2a0c0 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82e2a200 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82e2a340 r vcn_v1_0_irq_funcs +ffffffff82e2b000 r vcn_v2_0_ip_funcs +ffffffff82e2b0a8 R vcn_v2_0_ip_block +ffffffff82e2b0c0 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82e2b200 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82e2b340 r vcn_v2_0_irq_funcs +ffffffff82e2c000 r vcn_v2_5_ip_funcs +ffffffff82e2c0a8 R vcn_v2_5_ip_block +ffffffff82e2c0c0 r vcn_v2_6_ip_funcs +ffffffff82e2c168 R vcn_v2_6_ip_block +ffffffff82e2c180 R vcn_v2_6_ras_hw_ops +ffffffff82e2c1c0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82e2c300 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82e2c440 r vcn_v2_5_irq_funcs +ffffffff82e2c450 r vcn_v2_6_ras_irq_funcs +ffffffff82e2d000 r vcn_v3_0_ip_funcs +ffffffff82e2d0a8 R vcn_v3_0_ip_block +ffffffff82e2d0c0 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82e2d200 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82e2d340 r vcn_v3_0_irq_funcs +ffffffff82e2e000 r vcn_v4_0_ip_funcs +ffffffff82e2e0a8 R vcn_v4_0_ip_block +ffffffff82e2e0c0 R vcn_v4_0_ras_hw_ops +ffffffff82e2e100 r vcn_v4_0_irq_funcs +ffffffff82e2e110 r vcn_v4_0_ras_irq_funcs +ffffffff82e2f000 r vcn_v4_0_3_ip_funcs +ffffffff82e2f0a8 R vcn_v4_0_3_ip_block +ffffffff82e2f0c0 r vcn_v4_0_3_unified_ring_vm_funcs +ffffffff82e2f200 r vcn_v4_0_3_irq_funcs +ffffffff82e2f210 r vcn_v4_0_3_ras_hw_ops +ffffffff82e2f250 r vcn_v4_0_3_ue_reg_list +ffffffff82e30000 R vega10_ih_ip_funcs +ffffffff82e300a8 R vega10_ih_ip_block +ffffffff82e300c0 r vega10_ih_funcs +ffffffff82e300e0 r vega10_ih_self_irq_funcs +ffffffff82e31000 r GC_BASE +ffffffff82e31064 r HDP_BASE +ffffffff82e310c8 r MMHUB_BASE +ffffffff82e3112c r ATHUB_BASE +ffffffff82e31190 r NBIO_BASE +ffffffff82e311f4 r MP0_BASE +ffffffff82e31258 r MP1_BASE +ffffffff82e312bc r VCE_BASE +ffffffff82e31320 r VCN_BASE +ffffffff82e31384 r DF_BASE +ffffffff82e313e8 r DCE_BASE +ffffffff82e3144c r OSSSYS_BASE +ffffffff82e314b0 r SDMA0_BASE +ffffffff82e31514 r SDMA1_BASE +ffffffff82e31578 r SMUIO_BASE +ffffffff82e315dc r PWR_BASE +ffffffff82e31640 r NBIF_BASE +ffffffff82e316a4 r THM_BASE +ffffffff82e31708 r CLK_BASE +ffffffff82e32000 R vega20_ih_ip_funcs +ffffffff82e320a8 R vega20_ih_ip_block +ffffffff82e320c0 r vega20_ih_funcs +ffffffff82e320e0 r vega20_ih_self_irq_funcs +ffffffff82e33000 r GC_BASE +ffffffff82e33090 r HDP_BASE +ffffffff82e33120 r MMHUB_BASE +ffffffff82e331b0 r ATHUB_BASE +ffffffff82e33240 r NBIO_BASE +ffffffff82e332d0 r MP0_BASE +ffffffff82e33360 r MP1_BASE +ffffffff82e333f0 r UVD_BASE +ffffffff82e33480 r VCE_BASE +ffffffff82e33510 r DF_BASE +ffffffff82e335a0 r DCE_BASE +ffffffff82e33630 r OSSSYS_BASE +ffffffff82e336c0 r SDMA0_BASE +ffffffff82e33750 r SDMA1_BASE +ffffffff82e337e0 r SMUIO_BASE +ffffffff82e33870 r THM_BASE +ffffffff82e33900 r CLK_BASE +ffffffff82e33990 r UMC_BASE +ffffffff82e33a20 r RSMU_BASE +ffffffff82e34000 r vi_common_ip_block +ffffffff82e34018 r vi_common_ip_funcs +ffffffff82e340c0 r vi_asic_funcs +ffffffff82e34180 r vi_allowed_read_registers +ffffffff82e343e0 r topaz_video_codecs_encode +ffffffff82e343f0 r topaz_video_codecs_decode +ffffffff82e34400 r tonga_video_codecs_encode +ffffffff82e34410 r tonga_video_codecs_decode +ffffffff82e34420 r polaris_video_codecs_encode +ffffffff82e34430 r cz_video_codecs_decode +ffffffff82e34440 r tonga_video_codecs_encode_array +ffffffff82e34460 r tonga_video_codecs_decode_array +ffffffff82e344b0 r polaris_video_codecs_encode_array +ffffffff82e344e0 r cz_video_codecs_decode_array +ffffffff82e34560 r iceland_mgcg_cgcg_init +ffffffff82e345a0 r fiji_mgcg_cgcg_init +ffffffff82e34600 r tonga_mgcg_cgcg_init +ffffffff82e34660 r cz_mgcg_cgcg_init +ffffffff82e346a0 r stoney_mgcg_cgcg_init +ffffffff82e35000 r amdgpu_dm_funcs +ffffffff82e350a8 R dm_ip_block +ffffffff82e350c0 R amdgpu_dm_encoder_helper_funcs +ffffffff82e35128 r dm_display_funcs +ffffffff82e35180 r hpd_disconnect_quirk_table +ffffffff82e35ef0 r amdgpu_dm_mode_funcs +ffffffff82e35f38 r amdgpu_dm_audio_component_bind_ops +ffffffff82e35f48 r amdgpu_dm_audio_component_ops +ffffffff82e35f80 r amdgpu_dm_encoder_funcs +ffffffff82e35fa0 r amdgpu_dm_connector_funcs +ffffffff82e36018 r amdgpu_dm_connector_helper_funcs +ffffffff82e36078 r amdgpu_dm_i2c_algo +ffffffff82e36088 r amdgpu_dm_backlight_ops +ffffffff82e36260 r add_fs_modes.common_rates +ffffffff82e37000 r amdgpu_dm_crtc_funcs +ffffffff82e370c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82e38000 r dm_dtn_log_begin.msg +ffffffff82e3800d r dm_dtn_log_end.msg +ffffffff82e38018 r SYNAPTICS_DEVICE_ID +ffffffff82e39000 r dm_crtc_irq_funcs +ffffffff82e39010 r dm_vline0_irq_funcs +ffffffff82e39020 r dm_dmub_outbox_irq_funcs +ffffffff82e39030 r dm_vupdate_irq_funcs +ffffffff82e39040 r dm_dmub_trace_irq_funcs +ffffffff82e39050 r dm_pageflip_irq_funcs +ffffffff82e39060 r dm_hpd_irq_funcs +ffffffff82e3a000 r amdgpu_dm_encoder_funcs +ffffffff82e3a020 r dm_mst_cbs +ffffffff82e3a030 r dm_dp_mst_connector_funcs +ffffffff82e3a0a8 r dm_dp_mst_connector_helper_funcs +ffffffff82e3b000 r dm_plane_funcs +ffffffff82e3b068 r dm_plane_helper_funcs ffffffff82e3d000 r vbios_funcs -ffffffff82e42000 r command_table_helper_funcs +ffffffff82e3e000 r vbios_funcs ffffffff82e43000 r command_table_helper_funcs ffffffff82e44000 r command_table_helper_funcs ffffffff82e45000 r command_table_helper_funcs -ffffffff82e46000 r dce80_max_clks_by_state -ffffffff82e46028 r disp_clk_regs -ffffffff82e4607c r disp_clk_shift -ffffffff82e46088 r disp_clk_mask -ffffffff82e47000 r dce110_max_clks_by_state +ffffffff82e46000 r command_table_helper_funcs +ffffffff82e47000 r dce80_max_clks_by_state ffffffff82e47028 r disp_clk_regs ffffffff82e4707c r disp_clk_shift ffffffff82e47088 r disp_clk_mask -ffffffff82e48000 r dce112_max_clks_by_state +ffffffff82e48000 r dce110_max_clks_by_state ffffffff82e48028 r disp_clk_regs ffffffff82e4807c r disp_clk_shift ffffffff82e48088 r disp_clk_mask -ffffffff82e49000 r dce120_max_clks_by_state -ffffffff82e4a000 r clk_mgr_regs -ffffffff82e4a054 r clk_mgr_shift -ffffffff82e4a060 r clk_mgr_mask +ffffffff82e49000 r dce112_max_clks_by_state +ffffffff82e49028 r disp_clk_regs +ffffffff82e4907c r disp_clk_shift +ffffffff82e49088 r disp_clk_mask +ffffffff82e4a000 r dce120_max_clks_by_state ffffffff82e4b000 r clk_mgr_regs ffffffff82e4b054 r clk_mgr_shift ffffffff82e4b060 r clk_mgr_mask ffffffff82e4c000 r clk_mgr_regs ffffffff82e4c054 r clk_mgr_shift ffffffff82e4c060 r clk_mgr_mask -ffffffff82e4d000 r lpddr5_wm_table -ffffffff82e4d0c0 r ddr5_wm_table +ffffffff82e4d000 r clk_mgr_regs +ffffffff82e4d054 r clk_mgr_shift +ffffffff82e4d060 r clk_mgr_mask ffffffff82e4e000 r lpddr5_wm_table ffffffff82e4e0c0 r ddr5_wm_table -ffffffff82e4f000 r ddr5_wm_table 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r input_csc_matrix -ffffffff82e70000 r funcs -ffffffff82e71000 r bios_regs -ffffffff82e71008 r dce110_res_pool_funcs -ffffffff82e71100 r debug_defaults -ffffffff82e712b0 r clk_src_regs -ffffffff82e713ac r dmcu_regs -ffffffff82e71408 r dmcu_shift -ffffffff82e7141c r dmcu_mask -ffffffff82e71468 r abm_regs -ffffffff82e714d0 r abm_shift -ffffffff82e714f4 r abm_mask -ffffffff82e71580 r dce110_tg_offsets -ffffffff82e715c8 r res_create_funcs -ffffffff82e715f8 r plane_cap -ffffffff82e71624 r underlay_plane_cap -ffffffff82e71650 r stoney_resource_cap -ffffffff82e7168c r carrizo_resource_cap -ffffffff82e716d0 r panel_cntl_regs -ffffffff82e716f0 r panel_cntl_shift -ffffffff82e71700 r panel_cntl_mask -ffffffff82e71740 r link_enc_regs -ffffffff82e71b00 r link_enc_aux_regs -ffffffff82e71b50 r link_enc_hpd_regs -ffffffff82e71b68 r link_enc_feature -ffffffff82e71b78 r cs_shift -ffffffff82e71b84 r cs_mask -ffffffff82e71bb0 r mi_regs -ffffffff82e71d3c r mi_shifts -ffffffff82e71d84 r mi_masks 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r mpc_shift +ffffffff82f271e4 r mpc_mask +ffffffff82f27550 r dsc_regs +ffffffff82f2779c r dsc_shift +ffffffff82f27854 r dsc_mask +ffffffff82f27b30 r dwbc30_regs +ffffffff82f27d0c r dwbc30_shift +ffffffff82f27e40 r dwbc30_mask +ffffffff82f28310 r mcif_wb30_regs +ffffffff82f2840c r mcif_wb30_shift +ffffffff82f284b8 r mcif_wb30_mask +ffffffff82f28770 r aux_engine_regs +ffffffff82f28838 r aux_mask +ffffffff82f28898 r aux_shift +ffffffff82f288b0 r i2c_hw_regs +ffffffff82f289c8 r i2c_shifts +ffffffff82f289f4 r i2c_masks +ffffffff82f28aa0 r audio_regs +ffffffff82f28bd4 r audio_shift +ffffffff82f28bec r audio_mask +ffffffff82f28c30 r stream_enc_regs +ffffffff82f292d4 r se_shift +ffffffff82f293b0 r se_mask +ffffffff82f29720 r vpg_regs +ffffffff82f29810 r vpg_shift +ffffffff82f29838 r vpg_mask +ffffffff82f298e0 r afmt_regs +ffffffff82f299b8 r afmt_shift +ffffffff82f299cc r afmt_mask +ffffffff82f29a20 r hpo_dp_stream_enc_regs +ffffffff82f29c50 r hpo_dp_se_shift +ffffffff82f29c78 r hpo_dp_se_mask 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hubbub_reg +ffffffff82f2c7e4 r hubbub_shift +ffffffff82f2c874 r hubbub_mask +ffffffff82f2cab0 r vmid_regs +ffffffff82f2cc70 r vmid_shifts +ffffffff82f2cc78 r vmid_masks +ffffffff82f2cca0 r hubp_regs +ffffffff82f2d4d0 r hubp_shift +ffffffff82f2d5cc r hubp_mask +ffffffff82f2d9c0 r dpp_regs +ffffffff82f2eed0 r tf_shift +ffffffff82f2f1a4 r tf_mask +ffffffff82f2fcf0 r opp_regs +ffffffff82f2fe50 r opp_shift +ffffffff82f2fe88 r opp_mask +ffffffff82f2ff60 r optc_regs +ffffffff82f30500 r optc_shift +ffffffff82f305d4 r optc_mask +ffffffff82f3091c r mpc_regs +ffffffff82f32108 r mpc_shift +ffffffff82f321e4 r mpc_mask +ffffffff82f32550 r dsc_regs +ffffffff82f3279c r dsc_shift +ffffffff82f32854 r dsc_mask +ffffffff82f32b30 r dwbc30_regs +ffffffff82f32d0c r dwbc30_shift +ffffffff82f32e40 r dwbc30_mask +ffffffff82f33310 r mcif_wb30_regs +ffffffff82f3340c r mcif_wb30_shift +ffffffff82f334b8 r mcif_wb30_mask +ffffffff82f33770 r aux_engine_regs +ffffffff82f33838 r aux_mask +ffffffff82f33898 r aux_shift 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hubbub32_funcs +ffffffff82f3a000 r dcn32_funcs +ffffffff82f3a2e8 r dcn32_private_funcs +ffffffff82f3b000 r dcn32_mmhubbub_funcs +ffffffff82f3c000 r dcn32_mpc_funcs +ffffffff82f3d000 r res_cap_dcn32 +ffffffff82f3d03c r dccg_shift +ffffffff82f3d0dc r dccg_mask +ffffffff82f3d350 r abm_shift +ffffffff82f3d374 r abm_mask +ffffffff82f3d400 r res_create_funcs +ffffffff82f3d430 r plane_cap +ffffffff82f3d45c r le_shift +ffffffff82f3d54c r le_mask +ffffffff82f3d904 r link_enc_feature +ffffffff82f3d918 r debug_defaults_drv +ffffffff82f3dac0 r cs_shift +ffffffff82f3dacc r cs_mask +ffffffff82f3daf4 r hubbub_shift +ffffffff82f3db84 r hubbub_mask +ffffffff82f3ddbc r vmid_shifts +ffffffff82f3ddc4 r vmid_masks +ffffffff82f3dde4 r hubp_shift +ffffffff82f3dee0 r hubp_mask +ffffffff82f3e2d0 r tf_shift +ffffffff82f3e5a4 r tf_mask +ffffffff82f3f0e8 r opp_shift +ffffffff82f3f120 r opp_mask +ffffffff82f3f1f4 r optc_shift +ffffffff82f3f2c8 r optc_mask +ffffffff82f3f610 r mpc_shift +ffffffff82f3f6ec r mpc_mask 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+ffffffff82f43374 r abm_mask +ffffffff82f43400 r res_create_funcs +ffffffff82f43430 r plane_cap +ffffffff82f4345c r le_shift +ffffffff82f4354c r le_mask +ffffffff82f43904 r link_enc_feature +ffffffff82f43918 r debug_defaults_drv +ffffffff82f43ac0 r cs_shift +ffffffff82f43acc r cs_mask +ffffffff82f43af4 r hubbub_shift +ffffffff82f43b84 r hubbub_mask +ffffffff82f43dbc r vmid_shifts +ffffffff82f43dc4 r vmid_masks +ffffffff82f43de4 r hubp_shift +ffffffff82f43ee0 r hubp_mask +ffffffff82f442d0 r tf_shift +ffffffff82f445a4 r tf_mask +ffffffff82f450e8 r opp_shift +ffffffff82f45120 r opp_mask +ffffffff82f451f4 r optc_shift +ffffffff82f452c8 r optc_mask +ffffffff82f45610 r mpc_shift +ffffffff82f456ec r mpc_mask +ffffffff82f45a58 r dsc_shift +ffffffff82f45b10 r dsc_mask +ffffffff82f45de8 r dwbc30_shift +ffffffff82f45f1c r dwbc30_mask +ffffffff82f463e4 r mcif_wb30_shift +ffffffff82f46490 r mcif_wb30_mask +ffffffff82f4673c r aux_mask +ffffffff82f4679c r aux_shift +ffffffff82f467b4 r i2c_shifts +ffffffff82f467e0 r i2c_masks +ffffffff82f46884 r audio_shift +ffffffff82f4689c r audio_mask +ffffffff82f468d8 r se_shift +ffffffff82f469b4 r se_mask +ffffffff82f46d20 r vpg_shift +ffffffff82f46d48 r vpg_mask +ffffffff82f46ddc r afmt_shift +ffffffff82f46df0 r afmt_mask +ffffffff82f46e34 r hpo_dp_se_shift +ffffffff82f46e5c r hpo_dp_se_mask +ffffffff82f46efc r apg_shift +ffffffff82f46f04 r apg_mask +ffffffff82f46f1c r hpo_dp_le_shift +ffffffff82f46f38 r hpo_dp_le_mask +ffffffff82f46f9c r hwseq_shift +ffffffff82f4701c r hwseq_mask +ffffffff82f49000 R dcn10_soc_defaults +ffffffff82f4908c R dcn10_ip_defaults +ffffffff82f55000 r dml20_funcs +ffffffff82f55030 r dml20v2_funcs +ffffffff82f55060 r dml21_funcs +ffffffff82f55090 r dml30_funcs +ffffffff82f550c0 r dml31_funcs +ffffffff82f550f0 r dml314_funcs +ffffffff82f55120 r dml32_funcs +ffffffff82f58000 r qp_table_444_8bpc_max +ffffffff82f58940 r qp_table_444_8bpc_min +ffffffff82f59280 r qp_table_444_10bpc_max +ffffffff82f59ec0 r qp_table_444_10bpc_min +ffffffff82f5ab00 r qp_table_444_12bpc_max +ffffffff82f5ba40 r qp_table_444_12bpc_min +ffffffff82f5c980 r qp_table_422_8bpc_max +ffffffff82f5cec0 r qp_table_422_8bpc_min +ffffffff82f5d400 r qp_table_422_10bpc_max +ffffffff82f5db40 r qp_table_422_10bpc_min +ffffffff82f5e280 r qp_table_422_12bpc_max +ffffffff82f5ebc0 r qp_table_422_12bpc_min +ffffffff82f5f500 r qp_table_420_8bpc_max +ffffffff82f5f940 r qp_table_420_8bpc_min +ffffffff82f5fd80 r qp_table_420_10bpc_max +ffffffff82f60340 r qp_table_420_10bpc_min +ffffffff82f60900 r qp_table_420_12bpc_max +ffffffff82f61040 r qp_table_420_12bpc_min ffffffff82f63000 r funcs +ffffffff82f63050 r hpd_regs +ffffffff82f631a0 r hpd_shift +ffffffff82f631b0 r hpd_mask +ffffffff82f631c0 r ddc_data_regs +ffffffff82f633a0 r ddc_clk_regs +ffffffff82f63580 r ddc_shift +ffffffff82f635a8 r ddc_mask ffffffff82f64000 r funcs -ffffffff82f64050 r hpd_regs -ffffffff82f641a0 r hpd_shift -ffffffff82f641b0 r hpd_mask -ffffffff82f641c0 r ddc_data_regs -ffffffff82f643a0 r ddc_clk_regs -ffffffff82f64580 r ddc_shift -ffffffff82f645a8 r ddc_mask ffffffff82f65000 r funcs +ffffffff82f65050 r hpd_regs +ffffffff82f651a0 r hpd_shift +ffffffff82f651b0 r hpd_mask +ffffffff82f651c0 r ddc_data_regs +ffffffff82f653a0 r ddc_clk_regs +ffffffff82f65580 r ddc_shift +ffffffff82f655a8 r ddc_mask ffffffff82f66000 r funcs -ffffffff82f66050 r hpd_regs -ffffffff82f661a0 r hpd_shift -ffffffff82f661b0 r hpd_mask -ffffffff82f661c0 r ddc_data_regs -ffffffff82f663a0 r ddc_clk_regs -ffffffff82f66580 r ddc_shift -ffffffff82f665a8 r ddc_mask ffffffff82f67000 r funcs +ffffffff82f67050 r hpd_regs +ffffffff82f671a0 r hpd_shift +ffffffff82f671b0 r hpd_mask +ffffffff82f671c0 r ddc_data_regs +ffffffff82f673a0 r ddc_clk_regs +ffffffff82f67580 r ddc_shift +ffffffff82f675a8 r ddc_mask ffffffff82f68000 r funcs -ffffffff82f68050 r hpd_regs -ffffffff82f681a0 r hpd_shift -ffffffff82f681b0 r hpd_mask -ffffffff82f681c0 r ddc_data_regs -ffffffff82f683a0 r ddc_clk_regs -ffffffff82f68580 r ddc_shift -ffffffff82f685a8 r ddc_mask -ffffffff82f685d0 r generic_regs -ffffffff82f68640 r generic_shift -ffffffff82f68650 r generic_mask ffffffff82f69000 r funcs +ffffffff82f69050 r hpd_regs +ffffffff82f691a0 r hpd_shift +ffffffff82f691b0 r hpd_mask +ffffffff82f691c0 r ddc_data_regs +ffffffff82f693a0 r ddc_clk_regs +ffffffff82f69580 r ddc_shift +ffffffff82f695a8 r ddc_mask +ffffffff82f695d0 r generic_regs +ffffffff82f69640 r generic_shift +ffffffff82f69650 r generic_mask ffffffff82f6a000 r funcs -ffffffff82f6a050 r hpd_regs -ffffffff82f6a1a0 r hpd_shift -ffffffff82f6a1b0 r hpd_mask -ffffffff82f6a1c0 r ddc_data_regs_dcn -ffffffff82f6a370 r ddc_clk_regs_dcn -ffffffff82f6a520 r ddc_shift -ffffffff82f6a640 r ddc_mask -ffffffff82f6a760 r generic_regs -ffffffff82f6a7d0 r generic_shift -ffffffff82f6a7e0 r generic_mask ffffffff82f6b000 r funcs +ffffffff82f6b050 r hpd_regs +ffffffff82f6b1a0 r hpd_shift +ffffffff82f6b1b0 r hpd_mask +ffffffff82f6b1c0 r ddc_data_regs_dcn +ffffffff82f6b370 r ddc_clk_regs_dcn +ffffffff82f6b520 r ddc_shift +ffffffff82f6b640 r ddc_mask +ffffffff82f6b760 r generic_regs +ffffffff82f6b7d0 r generic_shift +ffffffff82f6b7e0 r generic_mask ffffffff82f6c000 r funcs -ffffffff82f6c050 r hpd_regs -ffffffff82f6c168 r hpd_shift -ffffffff82f6c178 r hpd_mask -ffffffff82f6c190 r ddc_data_regs_dcn -ffffffff82f6c2c0 r ddc_clk_regs_dcn -ffffffff82f6c3f0 r ddc_shift -ffffffff82f6c4e0 r ddc_mask -ffffffff82f6c5d0 r generic_regs -ffffffff82f6c604 r generic_shift -ffffffff82f6c60c r generic_mask ffffffff82f6d000 r funcs +ffffffff82f6d050 r hpd_regs +ffffffff82f6d168 r hpd_shift +ffffffff82f6d178 r hpd_mask +ffffffff82f6d190 r ddc_data_regs_dcn +ffffffff82f6d2c0 r ddc_clk_regs_dcn +ffffffff82f6d3f0 r ddc_shift +ffffffff82f6d4e0 r ddc_mask +ffffffff82f6d5d0 r generic_regs +ffffffff82f6d604 r generic_shift +ffffffff82f6d60c r generic_mask ffffffff82f6e000 r funcs -ffffffff82f6e050 r hpd_regs -ffffffff82f6e1a0 r hpd_shift -ffffffff82f6e1b0 r hpd_mask -ffffffff82f6e1c0 r ddc_data_regs_dcn -ffffffff82f6e370 r ddc_clk_regs_dcn -ffffffff82f6e520 r ddc_shift -ffffffff82f6e640 r ddc_mask -ffffffff82f6e760 r generic_regs -ffffffff82f6e7d0 r generic_shift -ffffffff82f6e7e0 r generic_mask ffffffff82f6f000 r funcs +ffffffff82f6f050 r hpd_regs +ffffffff82f6f1a0 r hpd_shift +ffffffff82f6f1b0 r hpd_mask +ffffffff82f6f1c0 r ddc_data_regs_dcn +ffffffff82f6f370 r ddc_clk_regs_dcn +ffffffff82f6f520 r ddc_shift +ffffffff82f6f640 r ddc_mask +ffffffff82f6f760 r generic_regs +ffffffff82f6f7d0 r generic_shift +ffffffff82f6f7e0 r generic_mask ffffffff82f70000 r funcs -ffffffff82f70050 r hpd_regs -ffffffff82f70168 r hpd_shift -ffffffff82f70178 r hpd_mask -ffffffff82f70190 r ddc_data_regs_dcn -ffffffff82f70300 r ddc_clk_regs_dcn -ffffffff82f70470 r ddc_shift -ffffffff82f70560 r ddc_mask -ffffffff82f70650 r generic_regs -ffffffff82f706c0 r generic_shift -ffffffff82f706d0 r generic_mask ffffffff82f71000 r funcs +ffffffff82f71050 r hpd_regs +ffffffff82f71168 r hpd_shift +ffffffff82f71178 r hpd_mask +ffffffff82f71190 r ddc_data_regs_dcn +ffffffff82f71300 r ddc_clk_regs_dcn +ffffffff82f71470 r ddc_shift +ffffffff82f71560 r ddc_mask +ffffffff82f71650 r generic_regs +ffffffff82f716c0 r generic_shift +ffffffff82f716d0 r generic_mask ffffffff82f72000 r funcs -ffffffff82f72050 r hpd_regs -ffffffff82f72168 r hpd_shift -ffffffff82f72178 r hpd_mask -ffffffff82f72190 r ddc_data_regs_dcn -ffffffff82f72340 r ddc_clk_regs_dcn -ffffffff82f724f0 r ddc_shift -ffffffff82f72610 r ddc_mask -ffffffff82f72730 r generic_regs -ffffffff82f727a0 r generic_shift -ffffffff82f727b0 r generic_mask ffffffff82f73000 r funcs +ffffffff82f73050 r hpd_regs +ffffffff82f73168 r hpd_shift +ffffffff82f73178 r hpd_mask +ffffffff82f73190 r ddc_data_regs_dcn +ffffffff82f73340 r ddc_clk_regs_dcn +ffffffff82f734f0 r ddc_shift +ffffffff82f73610 r ddc_mask +ffffffff82f73730 r generic_regs +ffffffff82f737a0 r generic_shift +ffffffff82f737b0 r generic_mask ffffffff82f74000 r funcs ffffffff82f75000 r funcs ffffffff82f76000 r funcs -ffffffff82f77000 r hdmi_14_protection -ffffffff82f77010 r dp_11_protection -ffffffff82f77020 r hdcp_i2c_offsets -ffffffff82f77050 r hdcp_dpcd_addrs -ffffffff82f78000 r irq_service_funcs_dce110 -ffffffff82f78008 r dummy_irq_info_funcs -ffffffff82f78018 r hpd_irq_info_funcs -ffffffff82f78028 r hpd_rx_irq_info_funcs -ffffffff82f78038 r pflip_irq_info_funcs -ffffffff82f78048 r vupdate_irq_info_funcs -ffffffff82f78058 r vblank_irq_info_funcs -ffffffff82f78070 r irq_source_info_dce110 -ffffffff82f7a000 r irq_service_funcs_dce120 -ffffffff82f7a008 r dummy_irq_info_funcs -ffffffff82f7a018 r hpd_irq_info_funcs -ffffffff82f7a028 r hpd_rx_irq_info_funcs -ffffffff82f7a038 r pflip_irq_info_funcs -ffffffff82f7a048 r vupdate_irq_info_funcs -ffffffff82f7a058 r vblank_irq_info_funcs -ffffffff82f7a070 r irq_source_info_dce120 -ffffffff82f7c000 r irq_service_funcs_dce80 -ffffffff82f7c008 r dummy_irq_info_funcs -ffffffff82f7c018 r hpd_irq_info_funcs -ffffffff82f7c028 r hpd_rx_irq_info_funcs -ffffffff82f7c038 r pflip_irq_info_funcs -ffffffff82f7c048 r vupdate_irq_info_funcs -ffffffff82f7c058 r vblank_irq_info_funcs -ffffffff82f7c070 r irq_source_info_dce80 -ffffffff82f7e000 r irq_service_funcs_dcn10 -ffffffff82f7e008 r dummy_irq_info_funcs -ffffffff82f7e018 r hpd_irq_info_funcs -ffffffff82f7e028 r hpd_rx_irq_info_funcs -ffffffff82f7e038 r pflip_irq_info_funcs -ffffffff82f7e048 r vupdate_no_lock_irq_info_funcs -ffffffff82f7e058 r vblank_irq_info_funcs -ffffffff82f7e068 r vline0_irq_info_funcs -ffffffff82f7e080 r irq_source_info_dcn10 -ffffffff82f80000 r irq_service_funcs_dcn20 -ffffffff82f80008 r dummy_irq_info_funcs -ffffffff82f80018 r hpd_irq_info_funcs -ffffffff82f80028 r hpd_rx_irq_info_funcs -ffffffff82f80038 r pflip_irq_info_funcs -ffffffff82f80048 r vupdate_no_lock_irq_info_funcs -ffffffff82f80058 r vblank_irq_info_funcs -ffffffff82f80068 r vline0_irq_info_funcs -ffffffff82f80080 r irq_source_info_dcn20 -ffffffff82f82000 r irq_service_funcs_dcn201 -ffffffff82f82008 r dummy_irq_info_funcs -ffffffff82f82018 r hpd_irq_info_funcs -ffffffff82f82028 r hpd_rx_irq_info_funcs -ffffffff82f82038 r pflip_irq_info_funcs -ffffffff82f82048 r vupdate_no_lock_irq_info_funcs -ffffffff82f82058 r vblank_irq_info_funcs -ffffffff82f82068 r vline0_irq_info_funcs -ffffffff82f82080 r irq_source_info_dcn201 -ffffffff82f84000 r irq_source_info_dcn21 -ffffffff82f85290 r irq_service_funcs_dcn21 -ffffffff82f85298 r dummy_irq_info_funcs -ffffffff82f852a8 r hpd_irq_info_funcs -ffffffff82f852b8 r hpd_rx_irq_info_funcs -ffffffff82f852c8 r pflip_irq_info_funcs -ffffffff82f852d8 r vupdate_no_lock_irq_info_funcs -ffffffff82f852e8 r vblank_irq_info_funcs -ffffffff82f852f8 r vline0_irq_info_funcs -ffffffff82f85308 r dmub_outbox_irq_info_funcs -ffffffff82f86000 r irq_source_info_dcn30 -ffffffff82f87290 r irq_service_funcs_dcn30 -ffffffff82f87298 r dummy_irq_info_funcs -ffffffff82f872a8 r hpd_irq_info_funcs -ffffffff82f872b8 r hpd_rx_irq_info_funcs -ffffffff82f872c8 r pflip_irq_info_funcs -ffffffff82f872d8 r vupdate_no_lock_irq_info_funcs -ffffffff82f872e8 r vblank_irq_info_funcs -ffffffff82f872f8 r vline0_irq_info_funcs -ffffffff82f87308 r dmub_trace_irq_info_funcs -ffffffff82f88000 r irq_source_info_dcn302 -ffffffff82f89290 r irq_service_funcs_dcn302 -ffffffff82f89298 r dummy_irq_info_funcs -ffffffff82f892a8 r hpd_irq_info_funcs -ffffffff82f892b8 r hpd_rx_irq_info_funcs -ffffffff82f892c8 r pflip_irq_info_funcs -ffffffff82f892d8 r vupdate_no_lock_irq_info_funcs -ffffffff82f892e8 r vblank_irq_info_funcs -ffffffff82f892f8 r vline0_irq_info_funcs -ffffffff82f89308 r dmub_trace_irq_info_funcs -ffffffff82f8a000 r irq_service_funcs_dcn303 -ffffffff82f8a008 r dummy_irq_info_funcs -ffffffff82f8a018 r hpd_irq_info_funcs -ffffffff82f8a028 r hpd_rx_irq_info_funcs -ffffffff82f8a038 r pflip_irq_info_funcs -ffffffff82f8a048 r vupdate_no_lock_irq_info_funcs -ffffffff82f8a058 r vblank_irq_info_funcs -ffffffff82f8a068 r vline0_irq_info_funcs -ffffffff82f8a080 r irq_source_info_dcn303 -ffffffff82f8c000 r irq_source_info_dcn31 -ffffffff82f8d290 r irq_service_funcs_dcn31 -ffffffff82f8d298 r dummy_irq_info_funcs -ffffffff82f8d2a8 r hpd_irq_info_funcs -ffffffff82f8d2b8 r hpd_rx_irq_info_funcs -ffffffff82f8d2c8 r pflip_irq_info_funcs -ffffffff82f8d2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82f8d2e8 r vblank_irq_info_funcs -ffffffff82f8d2f8 r vline0_irq_info_funcs -ffffffff82f8d308 r outbox_irq_info_funcs -ffffffff82f8e000 r irq_source_info_dcn314 -ffffffff82f8f290 r irq_service_funcs_dcn314 -ffffffff82f8f298 r dummy_irq_info_funcs -ffffffff82f8f2a8 r hpd_irq_info_funcs -ffffffff82f8f2b8 r hpd_rx_irq_info_funcs -ffffffff82f8f2c8 r pflip_irq_info_funcs -ffffffff82f8f2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82f8f2e8 r vblank_irq_info_funcs -ffffffff82f8f2f8 r vline0_irq_info_funcs -ffffffff82f8f308 r outbox_irq_info_funcs -ffffffff82f90000 r irq_source_info_dcn315 -ffffffff82f91290 r irq_service_funcs_dcn315 -ffffffff82f91298 r dummy_irq_info_funcs -ffffffff82f912a8 r hpd_irq_info_funcs -ffffffff82f912b8 r hpd_rx_irq_info_funcs -ffffffff82f912c8 r pflip_irq_info_funcs -ffffffff82f912d8 r vupdate_no_lock_irq_info_funcs -ffffffff82f912e8 r vblank_irq_info_funcs -ffffffff82f912f8 r vline0_irq_info_funcs -ffffffff82f91308 r outbox_irq_info_funcs -ffffffff82f92000 r irq_source_info_dcn32 -ffffffff82f93290 r irq_service_funcs_dcn32 -ffffffff82f93298 r dummy_irq_info_funcs -ffffffff82f932a8 r hpd_irq_info_funcs -ffffffff82f932b8 r hpd_rx_irq_info_funcs -ffffffff82f932c8 r pflip_irq_info_funcs -ffffffff82f932d8 r vupdate_no_lock_irq_info_funcs -ffffffff82f932e8 r vblank_irq_info_funcs -ffffffff82f932f8 r vline0_irq_info_funcs -ffffffff82f93308 r outbox_irq_info_funcs -ffffffff82f95000 r dio_link_hwss -ffffffff82f96000 r dio_fixed_vs_pe_retimer_link_hwss -ffffffff82f97000 r dpia_link_hwss -ffffffff82f98000 r hpo_dp_link_hwss -ffffffff82f99000 r hpo_fixed_vs_pe_retimer_dp_link_hwss -ffffffff82f9a000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82f9b000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82f9b006 r DP_DVI_CONVERTER_ID_4 -ffffffff82f9b00d r DP_DVI_CONVERTER_ID_5 -ffffffff82f9c000 r dp_lt_fallbacks -ffffffff82fa0000 r mandatory_dpcd_partitions -ffffffff82fa1000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82fa1007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82fa2000 r virtual_lnk_enc_funcs -ffffffff82fa3000 r virtual_link_hwss -ffffffff82fa4000 r virtual_str_enc_funcs -ffffffff82fa5000 R dmub_srv_dcn20_regs -ffffffff82fa6000 R dmub_srv_dcn21_regs -ffffffff82fa7000 R dmub_srv_dcn30_regs -ffffffff82fa8000 R dmub_srv_dcn301_regs -ffffffff82fa9000 R dmub_srv_dcn302_regs -ffffffff82faa000 R dmub_srv_dcn303_regs -ffffffff82fab000 R dmub_srv_dcn31_regs -ffffffff82fac000 R dmub_srv_dcn314_regs -ffffffff82fad000 R dmub_srv_dcn315_regs -ffffffff82fae000 R dmub_srv_dcn316_regs -ffffffff82faf000 R dmub_srv_dcn32_regs -ffffffff82fb0000 r numerator01 -ffffffff82fb0020 r numerator02 -ffffffff82fb0040 r numerator04 -ffffffff82fb0060 r numerator05 -ffffffff82fb4000 r abm_settings -ffffffff82fb4020 r abm_settings_config0 -ffffffff82fb4060 r abm_settings_config1 -ffffffff82fb40a0 r abm_settings_config2 -ffffffff82fb40d8 r min_reduction_table_v_2_2 -ffffffff82fb40e5 r max_reduction_table_v_2_2 -ffffffff82fb40f2 r min_reduction_table -ffffffff82fb40ff r max_reduction_table -ffffffff82fb4110 r custom_backlight_curve0 -ffffffff82fb5000 R amdgpu_pp_profile_name -ffffffff82fb6000 r pp_lib_thermal_controller_names -ffffffff82fb7000 r pp_ip_funcs -ffffffff82fb70a8 R pp_smu_ip_block -ffffffff82fb70c0 r pp_dpm_funcs -ffffffff82fb8000 r gpio_tbl -ffffffff82fb80f0 r enable_fb_req_rej_tbl -ffffffff82fb8140 r use_bclk_tbl -ffffffff82fb8310 r turn_off_plls_tbl -ffffffff82fb8640 r enter_baco_tbl -ffffffff82fb8730 r exit_baco_tbl -ffffffff82fb8850 r clean_baco_tbl +ffffffff82f77000 r funcs +ffffffff82f78000 r hdmi_14_protection +ffffffff82f78010 r dp_11_protection +ffffffff82f78020 r hdcp_i2c_offsets +ffffffff82f78050 r hdcp_dpcd_addrs +ffffffff82f79000 r irq_service_funcs_dce110 +ffffffff82f79008 r dummy_irq_info_funcs +ffffffff82f79018 r hpd_irq_info_funcs +ffffffff82f79028 r hpd_rx_irq_info_funcs +ffffffff82f79038 r pflip_irq_info_funcs +ffffffff82f79048 r vupdate_irq_info_funcs +ffffffff82f79058 r vblank_irq_info_funcs +ffffffff82f79070 r irq_source_info_dce110 +ffffffff82f7b000 r irq_service_funcs_dce120 +ffffffff82f7b008 r dummy_irq_info_funcs +ffffffff82f7b018 r hpd_irq_info_funcs +ffffffff82f7b028 r hpd_rx_irq_info_funcs +ffffffff82f7b038 r pflip_irq_info_funcs +ffffffff82f7b048 r vupdate_irq_info_funcs +ffffffff82f7b058 r vblank_irq_info_funcs +ffffffff82f7b070 r irq_source_info_dce120 +ffffffff82f7d000 r irq_service_funcs_dce80 +ffffffff82f7d008 r dummy_irq_info_funcs +ffffffff82f7d018 r hpd_irq_info_funcs +ffffffff82f7d028 r hpd_rx_irq_info_funcs +ffffffff82f7d038 r pflip_irq_info_funcs +ffffffff82f7d048 r vupdate_irq_info_funcs +ffffffff82f7d058 r vblank_irq_info_funcs +ffffffff82f7d070 r irq_source_info_dce80 +ffffffff82f7f000 r irq_service_funcs_dcn10 +ffffffff82f7f008 r dummy_irq_info_funcs +ffffffff82f7f018 r hpd_irq_info_funcs +ffffffff82f7f028 r hpd_rx_irq_info_funcs +ffffffff82f7f038 r pflip_irq_info_funcs +ffffffff82f7f048 r vupdate_no_lock_irq_info_funcs +ffffffff82f7f058 r vblank_irq_info_funcs +ffffffff82f7f068 r vline0_irq_info_funcs +ffffffff82f7f080 r irq_source_info_dcn10 +ffffffff82f81000 r irq_service_funcs_dcn20 +ffffffff82f81008 r dummy_irq_info_funcs +ffffffff82f81018 r hpd_irq_info_funcs +ffffffff82f81028 r hpd_rx_irq_info_funcs +ffffffff82f81038 r pflip_irq_info_funcs +ffffffff82f81048 r vupdate_no_lock_irq_info_funcs +ffffffff82f81058 r vblank_irq_info_funcs +ffffffff82f81068 r vline0_irq_info_funcs +ffffffff82f81080 r irq_source_info_dcn20 +ffffffff82f83000 r irq_service_funcs_dcn201 +ffffffff82f83008 r dummy_irq_info_funcs +ffffffff82f83018 r hpd_irq_info_funcs +ffffffff82f83028 r hpd_rx_irq_info_funcs +ffffffff82f83038 r pflip_irq_info_funcs +ffffffff82f83048 r vupdate_no_lock_irq_info_funcs +ffffffff82f83058 r vblank_irq_info_funcs +ffffffff82f83068 r vline0_irq_info_funcs +ffffffff82f83080 r irq_source_info_dcn201 +ffffffff82f85000 r irq_source_info_dcn21 +ffffffff82f86290 r irq_service_funcs_dcn21 +ffffffff82f86298 r dummy_irq_info_funcs +ffffffff82f862a8 r hpd_irq_info_funcs +ffffffff82f862b8 r hpd_rx_irq_info_funcs +ffffffff82f862c8 r pflip_irq_info_funcs +ffffffff82f862d8 r vupdate_no_lock_irq_info_funcs +ffffffff82f862e8 r vblank_irq_info_funcs +ffffffff82f862f8 r vline0_irq_info_funcs +ffffffff82f86308 r dmub_outbox_irq_info_funcs +ffffffff82f87000 r irq_source_info_dcn30 +ffffffff82f88290 r irq_service_funcs_dcn30 +ffffffff82f88298 r dummy_irq_info_funcs +ffffffff82f882a8 r hpd_irq_info_funcs +ffffffff82f882b8 r hpd_rx_irq_info_funcs +ffffffff82f882c8 r pflip_irq_info_funcs +ffffffff82f882d8 r vupdate_no_lock_irq_info_funcs +ffffffff82f882e8 r vblank_irq_info_funcs +ffffffff82f882f8 r vline0_irq_info_funcs +ffffffff82f88308 r dmub_trace_irq_info_funcs +ffffffff82f89000 r irq_source_info_dcn302 +ffffffff82f8a290 r irq_service_funcs_dcn302 +ffffffff82f8a298 r dummy_irq_info_funcs +ffffffff82f8a2a8 r hpd_irq_info_funcs +ffffffff82f8a2b8 r hpd_rx_irq_info_funcs +ffffffff82f8a2c8 r pflip_irq_info_funcs +ffffffff82f8a2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82f8a2e8 r vblank_irq_info_funcs +ffffffff82f8a2f8 r vline0_irq_info_funcs +ffffffff82f8a308 r dmub_trace_irq_info_funcs +ffffffff82f8b000 r irq_service_funcs_dcn303 +ffffffff82f8b008 r dummy_irq_info_funcs +ffffffff82f8b018 r hpd_irq_info_funcs +ffffffff82f8b028 r hpd_rx_irq_info_funcs +ffffffff82f8b038 r pflip_irq_info_funcs +ffffffff82f8b048 r vupdate_no_lock_irq_info_funcs +ffffffff82f8b058 r vblank_irq_info_funcs +ffffffff82f8b068 r vline0_irq_info_funcs +ffffffff82f8b080 r irq_source_info_dcn303 +ffffffff82f8d000 r irq_source_info_dcn31 +ffffffff82f8e290 r irq_service_funcs_dcn31 +ffffffff82f8e298 r dummy_irq_info_funcs +ffffffff82f8e2a8 r hpd_irq_info_funcs +ffffffff82f8e2b8 r hpd_rx_irq_info_funcs +ffffffff82f8e2c8 r pflip_irq_info_funcs +ffffffff82f8e2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82f8e2e8 r vblank_irq_info_funcs +ffffffff82f8e2f8 r vline0_irq_info_funcs +ffffffff82f8e308 r outbox_irq_info_funcs +ffffffff82f8f000 r irq_source_info_dcn314 +ffffffff82f90290 r irq_service_funcs_dcn314 +ffffffff82f90298 r dummy_irq_info_funcs +ffffffff82f902a8 r hpd_irq_info_funcs +ffffffff82f902b8 r hpd_rx_irq_info_funcs +ffffffff82f902c8 r pflip_irq_info_funcs +ffffffff82f902d8 r vupdate_no_lock_irq_info_funcs +ffffffff82f902e8 r vblank_irq_info_funcs +ffffffff82f902f8 r vline0_irq_info_funcs +ffffffff82f90308 r outbox_irq_info_funcs +ffffffff82f91000 r irq_source_info_dcn315 +ffffffff82f92290 r irq_service_funcs_dcn315 +ffffffff82f92298 r dummy_irq_info_funcs +ffffffff82f922a8 r hpd_irq_info_funcs +ffffffff82f922b8 r hpd_rx_irq_info_funcs +ffffffff82f922c8 r pflip_irq_info_funcs +ffffffff82f922d8 r vupdate_no_lock_irq_info_funcs +ffffffff82f922e8 r vblank_irq_info_funcs +ffffffff82f922f8 r vline0_irq_info_funcs +ffffffff82f92308 r outbox_irq_info_funcs +ffffffff82f93000 r irq_source_info_dcn32 +ffffffff82f94290 r irq_service_funcs_dcn32 +ffffffff82f94298 r dummy_irq_info_funcs +ffffffff82f942a8 r hpd_irq_info_funcs +ffffffff82f942b8 r hpd_rx_irq_info_funcs +ffffffff82f942c8 r pflip_irq_info_funcs +ffffffff82f942d8 r vupdate_no_lock_irq_info_funcs +ffffffff82f942e8 r vblank_irq_info_funcs +ffffffff82f942f8 r vline0_irq_info_funcs +ffffffff82f94308 r outbox_irq_info_funcs +ffffffff82f96000 r dio_link_hwss +ffffffff82f97000 r dio_fixed_vs_pe_retimer_link_hwss +ffffffff82f98000 r dpia_link_hwss +ffffffff82f99000 r hpo_dp_link_hwss +ffffffff82f9a000 r hpo_fixed_vs_pe_retimer_dp_link_hwss +ffffffff82f9b000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82f9c000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82f9c006 r DP_DVI_CONVERTER_ID_4 +ffffffff82f9c00d r DP_DVI_CONVERTER_ID_5 +ffffffff82f9d000 r dp_lt_fallbacks +ffffffff82fa1000 r mandatory_dpcd_partitions +ffffffff82fa2000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82fa2007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82fa3000 r virtual_lnk_enc_funcs +ffffffff82fa4000 r virtual_link_hwss +ffffffff82fa5000 r virtual_str_enc_funcs +ffffffff82fa6000 R dmub_srv_dcn20_regs +ffffffff82fa7000 R dmub_srv_dcn21_regs +ffffffff82fa8000 R dmub_srv_dcn30_regs +ffffffff82fa9000 R dmub_srv_dcn301_regs +ffffffff82faa000 R dmub_srv_dcn302_regs +ffffffff82fab000 R dmub_srv_dcn303_regs +ffffffff82fac000 R dmub_srv_dcn31_regs +ffffffff82fad000 R dmub_srv_dcn314_regs +ffffffff82fae000 R dmub_srv_dcn315_regs +ffffffff82faf000 R dmub_srv_dcn316_regs +ffffffff82fb0000 R dmub_srv_dcn32_regs +ffffffff82fb1000 r numerator01 +ffffffff82fb1020 r numerator02 +ffffffff82fb1040 r numerator04 +ffffffff82fb1060 r numerator05 +ffffffff82fb5000 r abm_settings +ffffffff82fb5020 r abm_settings_config0 +ffffffff82fb5060 r abm_settings_config1 +ffffffff82fb50a0 r abm_settings_config2 +ffffffff82fb50d8 r min_reduction_table_v_2_2 +ffffffff82fb50e5 r max_reduction_table_v_2_2 +ffffffff82fb50f2 r min_reduction_table +ffffffff82fb50ff r max_reduction_table +ffffffff82fb5110 r custom_backlight_curve0 +ffffffff82fb6000 R amdgpu_pp_profile_name +ffffffff82fb7000 r pp_lib_thermal_controller_names +ffffffff82fb8000 r pp_ip_funcs +ffffffff82fb80a8 R pp_smu_ip_block +ffffffff82fb80c0 r pp_dpm_funcs ffffffff82fb9000 r gpio_tbl ffffffff82fb90f0 r enable_fb_req_rej_tbl ffffffff82fb9140 r use_bclk_tbl -ffffffff82fb92e0 r turn_off_plls_tbl -ffffffff82fb9370 r clk_req_b_tbl -ffffffff82fb9490 r enter_baco_tbl -ffffffff82fb95b0 r exit_baco_tbl -ffffffff82fb96d0 r clean_baco_tbl +ffffffff82fb9310 r turn_off_plls_tbl +ffffffff82fb9640 r enter_baco_tbl +ffffffff82fb9730 r exit_baco_tbl +ffffffff82fb9850 r clean_baco_tbl ffffffff82fba000 r gpio_tbl ffffffff82fba0f0 r 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db_maxoff -ffffffff8345b000 D db_vars -ffffffff8345b090 D db_evars -ffffffff8345c000 D db_watchpoints_inserted -ffffffff8345c008 D db_next_free_watchpoint -ffffffff8345d000 D db_log -ffffffff8345e000 D audio_cd -ffffffff8345e020 D audio_lock -ffffffff8345f000 D midi_cd -ffffffff83460000 D rnd_cold -ffffffff83460004 D rnd_slowextract -ffffffff83460008 D rnd_timeout -ffffffff83460050 D rndlock -ffffffff83460060 D rndreinit_timeout -ffffffff834600a8 D rnd_task -ffffffff83461000 D video_cd -ffffffff83462000 d rrip_table_analyze -ffffffff834620e0 d rrip_table_getname -ffffffff834621e0 d rrip_table_getsymname -ffffffff83462280 d rrip_table_extref -ffffffff83463000 D nexecs -ffffffff83464000 D elf_note_names -ffffffff83465000 D ncpus -ffffffff83465004 D ncpusfound -ffffffff83466000 D acct_lock -ffffffff83466010 D acctsuspend -ffffffff83466014 D acctresume -ffffffff83466018 D acctrate -ffffffff83467000 D bufqs_mtx -ffffffff83468000 D ticks -ffffffff83469000 D fhdlk -ffffffff8346a000 D kqueue_klist_lock -ffffffff8346a010 D kqueue_ps_list_lock -ffffffff8346a020 D kq_timeoutmax -ffffffff8346b000 D stackgap_random -ffffffff8346c000 D deadproc_mutex -ffffffff8346d000 D nprocesses -ffffffff8346d004 D nthreads -ffffffff8346d008 D fork_tfmrate -ffffffff8346e000 D kthread_q -ffffffff8346f000 D nkmempages -ffffffff8346f008 D malloc_mtx -ffffffff8346f020 D memname -ffffffff8346f4b0 D sysctl_kmemlock -ffffffff8346f4c0 D malloc_errintvl -ffffffff83470000 D maxdmap -ffffffff83470008 D maxsmap -ffffffff83470010 D rlimit_lock -ffffffff83471000 D sched_cost_load -ffffffff83471004 D sched_cost_priority -ffffffff83471008 D sched_cost_runnable -ffffffff8347100c D sched_cost_resident -ffffffff83472000 D intrmap_lock -ffffffff83473000 D nosuidcoredump -ffffffff83473008 D sigio_lock -ffffffff83474000 D smr_lock -ffffffff83474010 D smr_logintvl -ffffffff83475000 D startuphook_list -ffffffff83476000 D sysctl_lock -ffffffff83476010 D sysctl_disklock -ffffffff83476020 d openbsd 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perfpolicy -ffffffff8347d0a0 D setperf_to -ffffffff8347e000 D autoconf_attdet_mtx -ffffffff8347e010 D msgs -ffffffff8347f000 d evcount_list -ffffffff8347f010 d evcount_percpu_init_list -ffffffff83480000 D syslogf_rwlock -ffffffff83480010 D log_mtx -ffffffff83480020 D log_kq_mtx -ffffffff83480030 D logstash_in -ffffffff83480038 D logstash_out -ffffffff83480040 D logstash_rwlock -ffffffff83481000 D pool_head -ffffffff83481010 D pool_lock -ffffffff83481020 D pool_debug -ffffffff83481028 D pool_allocator_single -ffffffff83481040 D pool_allocator_multi -ffffffff83481058 D pool_allocator_multi_ni -ffffffff83481070 D pool_gc_tick -ffffffff834810b8 D pool_gc_task -ffffffff83482000 D kprintf_mutex -ffffffff83482010 D db_panic -ffffffff83482014 D splassert_ctl -ffffffff83482018 D v_putc -ffffffff83482020 D printf_flags -ffffffff83483000 D userconf_base -ffffffff83483004 D userconf_maxdev -ffffffff83483008 D userconf_totdev -ffffffff8348300c D userconf_maxlocnames -ffffffff83483010 D userconf_cnt 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if_cloners_lock -ffffffff83497020 D if_hooks_mtx -ffffffff83497030 D if_input_task_locked -ffffffff83497060 D netlock -ffffffff83497070 D ifnetlist -ffffffff83498000 D ifiq_maxlen_drop -ffffffff83498004 D ifiq_maxlen_return -ffffffff83499000 D etherbroadcastaddr -ffffffff83499006 D ether_ipmulticast_min -ffffffff8349900c D ether_ipmulticast_max -ffffffff83499012 D ether_ip6multicast_min -ffffffff83499018 D ether_ip6multicast_max -ffffffff8349a000 D etherip_cloner -ffffffff8349a030 D etherip_list -ffffffff8349b000 D loop_cloner -ffffffff8349c000 D ifmedia_mtx -ffffffff8349d000 D ppp_compressors -ffffffff8349d020 D ppp_cloner -ffffffff8349e000 D ppp_pkt_init -ffffffff8349f000 D ppp_bsd_compress -ffffffff834a0000 D ppp_deflate -ffffffff834a0070 D ppp_deflate_draft -ffffffff834a1000 D tun_cloner -ffffffff834a1030 D tap_cloner -ffffffff834a2000 D bridgeintrq -ffffffff834a2038 D bridge_cloner -ffffffff834a3000 d veb_cloner -ffffffff834a3030 d vport_cloner -ffffffff834a4000 D vlan_tagh_lk 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d vxlan_teps -ffffffff834b5000 D underload_interval -ffffffff834b5010 D wg_cloner -ffffffff834b6000 d stoeplitz_keyseed -ffffffff834b7000 D ieee80211_cache_size -ffffffff834b8000 D arpt_prune -ffffffff834b8004 D arpt_keep -ffffffff834b8008 D arpt_down -ffffffff834b8010 D arpinq -ffffffff834b8048 D arp_mtx -ffffffff834b8058 D arp_maxtries -ffffffff834b9000 D ipport_firstauto -ffffffff834b9004 D ipport_lastauto -ffffffff834b9008 D ipport_hifirstauto -ffffffff834b900c D ipport_hilastauto -ffffffff834ba000 D divert_sendspace -ffffffff834ba004 D divert_recvspace -ffffffff834ba008 D divbhashsize -ffffffff834bb000 D icmptstamprepl -ffffffff834bb004 D icmperrppslim -ffffffff834bb008 D icmp_redirtimeout -ffffffff834bc000 D ip_sendredirects -ffffffff834bc004 D ip_defttl -ffffffff834bc008 D ip_mtudisc -ffffffff834bc00c D ip_mtudisc_timeout -ffffffff834bc010 D ipq_mutex -ffffffff834bc020 D ip_maxqueue -ffffffff834bc028 D ipintrq -ffffffff834bc060 d ipsend_task -ffffffff834bc090 d ipsendraw_task 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tcp_autorcvbuf_inc -ffffffff834c5000 D udpcksum -ffffffff834c5004 D udp_sendspace -ffffffff834c5008 D udp_recvspace -ffffffff834c6000 D ipsec_flows_mtx -ffffffff834c6010 D ipsec_ids_idle -ffffffff834c6014 D ipsec_ids_next_flow -ffffffff834c6018 D ipsec_policy_head -ffffffff834c6028 D ipsp_ids_gc_timeout -ffffffff834c6070 D tdb_sadb_mtx -ffffffff834c6080 d tdb_hashmask -ffffffff834c7000 D ipo_tdb_mtx -ffffffff834c7010 D ipsec_acquire_mtx -ffffffff834c7020 D ipsec_acquire_head -ffffffff834c8000 D ipsec_keep_invalid -ffffffff834c8004 D ipsec_require_pfs -ffffffff834c8008 D ipsec_soft_timeout -ffffffff834c800c D ipsec_exp_timeout -ffffffff834c8010 D ipsec_soft_first_use -ffffffff834c8014 D ipsec_exp_first_use -ffffffff834c8018 D ipsec_expire_acquire -ffffffff834c801c D esp_enable -ffffffff834c8020 D ah_enable -ffffffff834c9000 D udpencap_enable -ffffffff834c9004 D udpencap_port -ffffffff834ca000 D carp_vh_rc -ffffffff834ca020 D carp_sc_rc -ffffffff834ca040 D carp_opts -ffffffff834ca058 D carp_cloner -ffffffff834ca088 d carp_send_na.mcast -ffffffff834cb000 d PADDING +ffffffff82fba140 r use_bclk_tbl +ffffffff82fba2e0 r turn_off_plls_tbl +ffffffff82fba370 r clk_req_b_tbl +ffffffff82fba490 r enter_baco_tbl +ffffffff82fba5b0 r exit_baco_tbl +ffffffff82fba6d0 r clean_baco_tbl +ffffffff82fbb000 r gpio_tbl +ffffffff82fbb0f0 r enable_fb_req_rej_tbl +ffffffff82fbb140 r use_bclk_tbl_vg +ffffffff82fbb200 r turn_off_plls_tbl_vg +ffffffff82fbb350 r use_bclk_tbl +ffffffff82fbb440 r turn_off_plls_tbl +ffffffff82fbb5f0 r clk_req_b_tbl +ffffffff82fbb710 r enter_baco_tbl +ffffffff82fbb830 r exit_baco_tbl +ffffffff82fbb950 r clean_baco_tbl +ffffffff82fbc000 r vega10_fuses_default +ffffffff82fcb000 r pp_r600_encode_lanes +ffffffff82fcc000 R pptable_v1_0_funcs +ffffffff82fcd000 R pptable_funcs +ffffffff82fcd020 r soft_dummy_pp_table +ffffffff82fce000 r smu10_hwmgr_funcs +ffffffff82fcf000 r smu7_hwmgr_funcs +ffffffff82fcf2f8 r smu7_irq_funcs +ffffffff82fcf310 r SMU7ThermalPolicy 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fiji_clock_stretcher_ddt_table +ffffffff82fe4000 R iceland_smu_funcs +ffffffff82fe40e0 r defaults_icelandxt +ffffffff82fe412c r defaults_icelandpro +ffffffff82fe4178 r defaults_iceland +ffffffff82fe5000 R polaris10_smu_funcs +ffffffff82fe50e0 r avfs_graphics_level_polaris10 +ffffffff82fe52a0 r avfs_memory_level_polaris10 +ffffffff82fe52c0 r polaris10_power_tune_data_set_array +ffffffff82fe5310 r Range_Table +ffffffff82fe6000 R smu10_smu_funcs +ffffffff82fe7000 r smu7_program_jump_on_start.data +ffffffff82fe7010 r pwr_virus_table_pre +ffffffff82fe7680 r pwr_virus_table_post +ffffffff82fe7f80 r pwr_virus_section1 +ffffffff82fe8610 r pwr_virus_section2 +ffffffff82fe8660 r pwr_virus_section3 +ffffffff82fefab0 r pwr_virus_section4 +ffffffff82fefe80 r pwr_virus_section5 +ffffffff82ff0490 r pwr_virus_section6 +ffffffff82ff2000 R smu8_smu_funcs +ffffffff82ff3000 R tonga_smu_funcs +ffffffff82ff30e0 r tonga_power_tune_data_set_array +ffffffff82ff312c r tonga_clock_stretch_amount_conversion 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navi10_ppt_funcs +ffffffff82ffc3f0 r smu11_thermal_policy +ffffffff82ffc448 r navi10_i2c_algo +ffffffff82ffc458 r navi10_i2c_control_quirks +ffffffff82ffc470 r navi1x_throttler_map +ffffffff82ffc490 r NoDbiPrbs7 +ffffffff82ffd490 r DbiPrbs7 +ffffffff82fff000 r sienna_cichlid_ppt_funcs +ffffffff82fff3f0 r smu11_thermal_policy +ffffffff82fff448 r sienna_cichlid_i2c_algo +ffffffff82fff458 r sienna_cichlid_i2c_control_quirks +ffffffff82fff470 r sienna_cichlid_throttler_map +ffffffff83000000 r smu_v11_0_irq_funcs +ffffffff83000010 r link_width +ffffffff83001000 r vangogh_ppt_funcs +ffffffff830013e8 r vangogh_throttler_map +ffffffff83002000 r renoir_ppt_funcs +ffffffff830023e8 r renoir_throttler_map +ffffffff83003000 r aldebaran_ppt_funcs +ffffffff830033f0 r aldebaran_clk_map +ffffffff830034b0 r aldebaran_table_map +ffffffff83003530 r smu13_thermal_policy +ffffffff83003588 r aldebaran_i2c_algo +ffffffff83003598 r aldebaran_i2c_control_quirks +ffffffff830035b0 r aldebaran_throttler_map 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smu13_thermal_policy +ffffffff8300b450 r smu_v13_0_7_throttler_map +ffffffff8300c000 r yellow_carp_ppt_funcs +ffffffff8300d000 R link_speed +ffffffff8300d020 r __smu_message_names +ffffffff8300e000 R pchb_ca +ffffffff8300f000 R amas_ca +ffffffff8300f028 R amas_devices +ffffffff8300f040 r amas_feature +ffffffff83010000 R cardslot_ca +ffffffff83011000 R cardbus_ca +ffffffff83012000 R com_cardbus_ca +ffffffff83013000 R xl_cardbus_ca +ffffffff83013030 R xl_cardbus_products +ffffffff83014000 R dc_cardbus_ca +ffffffff83014030 R dc_cardbus_devices +ffffffff83015000 R fxp_cardbus_ca +ffffffff83015028 R fxp_cardbus_devices +ffffffff83016000 R rl_cardbus_devices +ffffffff83016028 R rl_cardbus_ca +ffffffff83017000 R re_cardbus_ca +ffffffff83017028 R re_cardbus_devices +ffffffff83018000 R ath_cardbus_ca +ffffffff83019000 R athn_cardbus_ca +ffffffff83019030 r athn_cardbus_devices +ffffffff8301a000 R atw_cardbus_ca +ffffffff8301a028 R atw_cardbus_devices +ffffffff8301b000 R rtw_cardbus_ca +ffffffff8301b028 R rtw_cardbus_devices +ffffffff8301c000 R ral_cardbus_ca +ffffffff8301c030 r ral_cardbus_devices +ffffffff8301d000 R acx_cardbus_ca +ffffffff8301d028 r acx_cardbus_devices +ffffffff8301e000 R pgt_cardbus_ca +ffffffff8301e028 R pgt_cardbus_devices +ffffffff8301f000 R ehci_cardbus_ca +ffffffff83020000 R ohci_cardbus_ca +ffffffff83021000 R uhci_cardbus_ca +ffffffff83022000 R malo_cardbus_ca +ffffffff83022028 r malo_cardbus_devices +ffffffff83023000 R bwi_cardbus_ca +ffffffff83023030 r bwi_cardbus_devices +ffffffff83024000 R pcmcia_ca +ffffffff83025000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff83026000 r pcmcia_cis_quirks +ffffffff83027000 R ep_pcmcia_ca +ffffffff83028000 R ne_pcmcia_ca +ffffffff83028030 R ne2000devs +ffffffff8302a000 R aic_pcmcia_ca +ffffffff8302b000 R com_pcmcia_ca +ffffffff8302c000 R wdc_pcmcia_ca +ffffffff8302d000 R sm_pcmcia_ca +ffffffff8302e000 R xe_pcmcia_ca +ffffffff8302f000 R wi_pcmcia_ca +ffffffff8302f030 r wi_pcmcia_products +ffffffff83030000 R malo_pcmcia_ca +ffffffff83031000 R an_pcmcia_ca +ffffffff83032000 R pcib_ca +ffffffff83033000 R amdpcib_ca +ffffffff83033028 R amdpcib_devices +ffffffff83034000 R tcpcib_ca +ffffffff83034028 R tcpcib_devices +ffffffff83035000 R aapic_ca +ffffffff83036000 R hme_pci_ca +ffffffff83036028 r hme_promhdr +ffffffff8303602a r hme_promdat +ffffffff83037000 R isa_ca +ffffffff83038000 R isadma_ca +ffffffff83039000 R fdc_ca +ffffffff8303a000 R fd_ca +ffffffff8303b000 R com_isa_ca +ffffffff8303c000 R pckbc_isa_ca +ffffffff8303d000 R vga_isa_ca +ffffffff8303e000 R wdc_isa_ca +ffffffff8303f000 R mpu_midi_hw_if +ffffffff83040000 R mpu_isa_ca +ffffffff83041000 R pcppi_ca +ffffffff83042000 R spkr_ca +ffffffff83042030 r pitchtab +ffffffff83043000 R lpt_isa_ca +ffffffff83044000 R wbsio_ca +ffffffff83045000 R schsio_ca +ffffffff83046000 R lm_isa_ca +ffffffff83046028 R lm_wbsio_ca +ffffffff83047000 R it_sensors +ffffffff83047110 R it_vrfact +ffffffff83047140 R it_fan_regs +ffffffff83047160 R it_fan_ext_regs +ffffffff83047178 R it_ca +ffffffff83048000 R abitkv_sensors +ffffffff83048200 R abitaa_sensors +ffffffff83048480 R abitav_sensors +ffffffff83048700 R abitas_sensors +ffffffff83048980 R abitax_sensors +ffffffff83048bc0 R abitm4_sensors +ffffffff83048e80 R abitan_sensors +ffffffff83049120 R abital_sensors +ffffffff830493a0 R abitaw_sensors +ffffffff83049700 R abitni_sensors +ffffffff830499a0 R abitat_sensors +ffffffff83049cc0 R abitan2_sensors +ffffffff83049f60 R abitab_sensors +ffffffff8304a220 R abitan3_sensors +ffffffff8304a500 R abitaw2_sensors +ffffffff8304a860 R abitat2_sensors +ffffffff8304ab60 R abitab2_sensors +ffffffff8304aea0 R abitin_sensors +ffffffff8304b1e0 R uguru_ca +ffffffff8304c000 R aps_ca +ffffffff8304d000 R wsdisplay_emul_ca +ffffffff8304d030 r charClass +ffffffff8304e000 r usl_syncops +ffffffff8304f000 R wsevent_filtops +ffffffff83050000 R wskbd_ca +ffffffff83051000 r latin1_to_upper +ffffffff83052000 R wsmouse_ca +ffffffff83053000 R cyrillic_to_koi8 +ffffffff83053060 R unicode_to_latin2 +ffffffff830530e0 R unicode_to_latin7 +ffffffff83054000 R wsemul_vt100_ops +ffffffff83055000 r decspcgr2uni +ffffffff83055100 r dectech2uni +ffffffff83055200 r nrctable +ffffffff83056000 r vt100_fkeys +ffffffff830560c0 r vt100_pfkeys +ffffffff830560e0 r vt100_numpad +ffffffff83057000 R pckbd_ca +ffffffff83057028 R pckbd_accessops +ffffffff83057040 R pckbd_consops +ffffffff83057060 R pckbd_keymapdata +ffffffff83057070 R pckbd_xtbl2 +ffffffff83057100 R pckbd_xtbl2_ext +ffffffff83058000 r pckbd_keydesc_us +ffffffff83058250 r pckbd_keydesc_de +ffffffff830582f0 r pckbd_keydesc_de_nodead +ffffffff83058310 r pckbd_keydesc_fr +ffffffff830583d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff83058510 r pckbd_keydesc_dk +ffffffff830585a0 r pckbd_keydesc_dk_nodead +ffffffff830585b0 r pckbd_keydesc_it +ffffffff83058640 r pckbd_keydesc_uk +ffffffff830586e0 r pckbd_keydesc_jp +ffffffff83058750 r pckbd_keydesc_sv +ffffffff83058780 r pckbd_keydesc_sv_nodead +ffffffff83058790 r pckbd_keydesc_no +ffffffff830587c0 r pckbd_keydesc_no_nodead +ffffffff830587d0 r pckbd_keydesc_us_declk +ffffffff83058860 r pckbd_keydesc_us_dvorak +ffffffff83058900 r pckbd_keydesc_us_colemak +ffffffff83058948 r pckbd_keydesc_swapctrlcaps +ffffffff83058960 r pckbd_keydesc_iopener +ffffffff830589b0 r pckbd_keydesc_es +ffffffff83058a50 r pckbd_keydesc_be +ffffffff83058b10 r pckbd_keydesc_ru +ffffffff83058c80 r pckbd_keydesc_ua +ffffffff83058e10 r pckbd_keydesc_sg +ffffffff83058ec0 r pckbd_keydesc_sg_nodead +ffffffff83058ee0 r pckbd_keydesc_sf +ffffffff83058f00 r pckbd_keydesc_pt +ffffffff83058f90 r pckbd_keydesc_lt +ffffffff83059070 r pckbd_keydesc_la +ffffffff83059100 r pckbd_keydesc_br +ffffffff83059180 r pckbd_keydesc_tr +ffffffff83059230 r pckbd_keydesc_tr_nodead +ffffffff83059250 r pckbd_keydesc_pl +ffffffff830592b0 r pckbd_keydesc_hu +ffffffff830593c0 r pckbd_keydesc_si +ffffffff830594d0 r pckbd_keydesc_cf +ffffffff830595a0 r pckbd_keydesc_cf_nodead +ffffffff830595c0 r pckbd_keydesc_lv +ffffffff83059640 r pckbd_keydesc_nl +ffffffff83059720 r pckbd_keydesc_nl_nodead +ffffffff83059740 r pckbd_keydesc_is +ffffffff830597cc r pckbd_keydesc_is_nodead +ffffffff830597e0 r pckbd_keydesc_ee +ffffffff83059890 r pckbd_keydesc_ee_nodead +ffffffff830598b0 R pckbd_keydesctab +ffffffff8305a000 R pms_ca +ffffffff8305a028 R pms_accessops +ffffffff8305a040 R pms_sec_accessops +ffffffff8305a060 R pms_protocols +ffffffff8305a1e0 r alps_models +ffffffff8305b000 R skgpio_led_offset +ffffffff8305b008 R skgpio_ca +ffffffff8305c000 R hidkbd_trtab +ffffffff8305c100 r apple_fn_trans +ffffffff8305c120 r apple_tb_trans +ffffffff8305c140 r apple_mba_trans +ffffffff8305d000 r hidcc_attach_wskbd.accessops +ffffffff8305d020 r hidcc_keysyms +ffffffff8305e000 R usb_ca +ffffffff8305f000 R usb_known_products +ffffffff8306b050 R usb_known_vendors +ffffffff8306d880 R usbd_error_strs +ffffffff8306e000 R usb_quirks +ffffffff8306e3d8 R usb_dev_quirks +ffffffff8306e3e0 R usbd_no_quirk +ffffffff8306f000 R uhub_ca +ffffffff8306f028 R uhub_uhub_ca +ffffffff83070000 R uaudio_ca +ffffffff83070028 R uaudio_hw_if +ffffffff830700e0 R uaudio_rates +ffffffff83070120 r uaudio_clkname.names +ffffffff83070140 r uaudio_feature_addent.features +ffffffff83071000 R uvideo_ca +ffffffff83071028 R uvideo_hw_if +ffffffff83071100 R uvideo_devs +ffffffff83072000 r utvfu_select_norm.pal +ffffffff83072040 r utvfu_select_norm.ntsc +ffffffff83072080 r utvfu_setup_capture.setup +ffffffff83072180 r utvfu_audio_start_chip.setup +ffffffff830721c8 r utvfu_audio_stop_chip.setup +ffffffff830721d8 R utvfu_ca +ffffffff83072200 R utvfu_vid_hw_if +ffffffff830722d0 R utvfu_au_hw_if +ffffffff83073000 R udl_ca +ffffffff83073030 r udl_devs +ffffffff830730b0 r udl_modes +ffffffff83074000 R umidi_hw_if +ffffffff83074030 R umidi_ca +ffffffff83074060 r umidi_evlen +ffffffff83074080 r packet_length +ffffffff83075000 r quirk_name +ffffffff83076000 R ucom_ca +ffffffff83077000 R ugen_ca +ffffffff83077028 R ugenread_intr_filtops +ffffffff83077058 R ugenread_isoc_filtops +ffffffff83078000 R uhidev_ca +ffffffff83078030 r uhid_graphire_report_descr +ffffffff830780b0 r uhid_graphire3_4x5_report_descr +ffffffff83078160 r uhid_xb360gp_report_descr +ffffffff83078210 r uhid_xbonegp_report_descr +ffffffff83079000 R uhid_ca +ffffffff83079028 R uhidread_filtops +ffffffff8307a000 R fido_ca +ffffffff8307b000 R ujoy_ca +ffffffff8307c000 r ukbd_keydesc_us +ffffffff8307c2a0 r ukbd_keydesc_de +ffffffff8307c350 r ukbd_keydesc_de_nodead +ffffffff8307c370 r ukbd_keydesc_fr +ffffffff8307c430 r ukbd_keydesc_fr_apple +ffffffff8307c570 r ukbd_keydesc_fr_dvorak_bepo +ffffffff8307c6b0 r ukbd_keydesc_dk +ffffffff8307c750 r ukbd_keydesc_dk_nodead +ffffffff8307c760 r ukbd_keydesc_it +ffffffff8307c800 r ukbd_keydesc_uk +ffffffff8307c8b0 r ukbd_keydesc_jp +ffffffff8307c920 r ukbd_keydesc_sv +ffffffff8307c950 r ukbd_keydesc_sv_nodead +ffffffff8307c960 r ukbd_keydesc_no +ffffffff8307c990 r ukbd_keydesc_no_nodead +ffffffff8307c9a0 r ukbd_keydesc_us_dvorak +ffffffff8307ca40 r ukbd_keydesc_us_colemak +ffffffff8307ca88 r ukbd_keydesc_swapctrlcaps +ffffffff8307caa0 r ukbd_keydesc_iopener +ffffffff8307caf0 r ukbd_keydesc_es +ffffffff8307cb90 r ukbd_keydesc_be +ffffffff8307cc50 r ukbd_keydesc_ru +ffffffff8307cdc0 r ukbd_keydesc_ua +ffffffff8307cf60 r ukbd_keydesc_sg +ffffffff8307d020 r ukbd_keydesc_sg_nodead +ffffffff8307d040 r ukbd_keydesc_sf +ffffffff8307d060 r ukbd_keydesc_pt +ffffffff8307d0f0 r ukbd_keydesc_pt_apple +ffffffff8307d110 r ukbd_keydesc_lt +ffffffff8307d1f0 r ukbd_keydesc_la +ffffffff8307d290 r ukbd_keydesc_br +ffffffff8307d320 r ukbd_keydesc_tr +ffffffff8307d3e0 r ukbd_keydesc_tr_nodead +ffffffff8307d400 r ukbd_keydesc_pl +ffffffff8307d460 r ukbd_keydesc_hu +ffffffff8307d570 r ukbd_keydesc_si +ffffffff8307d690 r ukbd_keydesc_cf +ffffffff8307d770 r ukbd_keydesc_cf_nodead +ffffffff8307d790 r ukbd_keydesc_lv +ffffffff8307d810 r ukbd_keydesc_nl +ffffffff8307d8f0 r ukbd_keydesc_nl_nodead +ffffffff8307d910 r ukbd_keydesc_is +ffffffff8307d9a4 r ukbd_keydesc_is_nodead +ffffffff8307d9b0 r ukbd_keydesc_ee +ffffffff8307da60 r ukbd_keydesc_ee_nodead +ffffffff8307da80 R ukbd_keydesctab +ffffffff8307e000 R ukbd_countrylayout +ffffffff8307e090 R ukbd_consops +ffffffff8307e0b0 R ukbd_accessops +ffffffff8307e0c8 R ukbd_ca +ffffffff8307e0f0 R ukbd_never_console +ffffffff8307f000 R ums_accessops +ffffffff8307f018 R ums_ca +ffffffff83080000 R umt_accessops +ffffffff83080018 R umt_ca +ffffffff83081000 R uts_devs +ffffffff83081010 R uts_accessops +ffffffff83081028 R uts_ca +ffffffff83082000 R ubcmtp_accessops +ffffffff83082018 R ubcmtp_ca +ffffffff83082040 r ubcmtp_devices +ffffffff83083000 R ucycom_methods +ffffffff83083040 R ucycom_devs +ffffffff83083050 R ucycom_ca +ffffffff83084000 R uslhcom_methods +ffffffff83084040 R uslhcom_ca +ffffffff83084068 r uslhcom_devs +ffffffff83085000 R ulpt_ca +ffffffff83086000 R umass_ca +ffffffff83086028 R umass_bbb_methods +ffffffff83086040 R umass_cbi_methods +ffffffff83087000 R umass_quirks +ffffffff83088000 R umass_scsi_switch +ffffffff83089000 R uthum_devs +ffffffff83089008 R uthum_ca +ffffffff83089030 r uthum_sensor_type_s +ffffffff8308a000 R ugold_devs +ffffffff8308a018 R ugold_ca +ffffffff8308b000 R utrh_devs +ffffffff8308b008 R utrh_ca +ffffffff8308c000 R uoakrh_devs +ffffffff8308c008 R uoakrh_ca +ffffffff8308c030 R uoakrh_methods +ffffffff8308d000 R uoaklux_devs +ffffffff8308d008 R uoaklux_ca +ffffffff8308d030 R uoaklux_methods +ffffffff8308e000 R uoakv_devs +ffffffff8308e008 R uoakv_ca +ffffffff8308e030 R uoakv_methods +ffffffff8308f000 R uonerng_ca +ffffffff83090000 R urng_ca +ffffffff83090030 r urng_devs +ffffffff83091000 R udcf_ca +ffffffff83091028 r udcf_devs +ffffffff83092000 R umbg_ca +ffffffff83093000 R uvisor_methods +ffffffff83093040 R uvisor_ca +ffffffff83093070 r uvisor_devs +ffffffff83094000 R udsbr_hw_if +ffffffff83094028 R udsbr_ca +ffffffff83095000 R utwitch_devs +ffffffff83095008 R utwitch_ca +ffffffff83096000 R aue_devs +ffffffff830961b0 R aue_ca +ffffffff83097000 R axe_devs +ffffffff830970d0 R axe_ca +ffffffff83098000 R axen_devs +ffffffff83098020 R axen_ca +ffffffff83099000 R smsc_ca +ffffffff83099030 r smsc_devs +ffffffff8309a000 R cue_ca +ffffffff8309b000 R kue_devs +ffffffff8309b088 R kue_ca +ffffffff8309c000 R cdce_devs +ffffffff8309c048 R cdce_ca +ffffffff8309d000 R urndis_ca +ffffffff8309d030 R urndis_class +ffffffff8309e000 R mos_devs +ffffffff8309e018 R mos_ca +ffffffff8309f000 R mue_devs +ffffffff8309f020 R mue_ca +ffffffff830a0000 R udav_ca +ffffffff830a0030 r udav_devs +ffffffff830a1000 R upl_ca +ffffffff830a2000 R ugl_ca +ffffffff830a3000 R url_ca +ffffffff830a3030 r url_devs +ffffffff830a4000 R ure_devs +ffffffff830a40e8 R ure_ca +ffffffff830a5000 R uaq_devs +ffffffff830a5018 R uaq_ca +ffffffff830a6000 R umodem_methods +ffffffff830a6040 R umodem_ca +ffffffff830a7000 R uftdi_methods +ffffffff830a7040 R uftdi_ca +ffffffff830a7070 r uftdi_devs +ffffffff830a8000 R uplcom_methods +ffffffff830a8040 R uplcom_ca +ffffffff830a8070 r uplcom_devs +ffffffff830a9000 R umct_methods +ffffffff830a9040 R umct_ca +ffffffff830a9070 r umct_devs +ffffffff830aa000 R uvscom_methods +ffffffff830aa040 R uvscom_ca +ffffffff830aa070 r uvscom_devs +ffffffff830ab000 R ubsa_methods +ffffffff830ab040 R ubsa_devs +ffffffff830ab060 R ubsa_ca +ffffffff830ac000 R ukspan_ca +ffffffff830ac028 r ukspan_devs +ffffffff830ac030 r ukspan_methods +ffffffff830ad000 R uslcom_methods +ffffffff830ad040 R uslcom_ca +ffffffff830ad070 r uslcom_devs +ffffffff830ae000 R uark_methods +ffffffff830ae040 R uark_ca +ffffffff830ae068 r uark_devs +ffffffff830af000 R moscom_methods +ffffffff830af040 R moscom_ca +ffffffff830af068 r moscom_devs +ffffffff830b0000 R umcs_methods +ffffffff830b0040 R umcs_devs +ffffffff830b0050 R umcs_ca +ffffffff830b1000 R uscom_methods +ffffffff830b1040 R uscom_ca +ffffffff830b1068 r uscom_devs +ffffffff830b2000 R ucrcom_methods +ffffffff830b2040 R ucrcom_ca +ffffffff830b3000 R uxrcom_methods +ffffffff830b3040 R uxrcom_ca +ffffffff830b3068 r uxrcom_devs +ffffffff830b4000 R uipaq_methods +ffffffff830b4040 R uipaq_ca +ffffffff830b4070 r uipaq_devs +ffffffff830b5000 R umsm_methods +ffffffff830b5040 R umsm_ca +ffffffff830b5070 r umsm_devs +ffffffff830b6000 R uchcom_methods +ffffffff830b6040 R uchcom_ca +ffffffff830b6070 r uchcom_devs +ffffffff830b6090 r dividers +ffffffff830b7000 R uticom_methods +ffffffff830b7040 R uticom_ca +ffffffff830b7070 r uticom_devs +ffffffff830b8000 R wi_usb_devs +ffffffff830b80f0 R wi_usb_ca +ffffffff830b9000 R atu_ca +ffffffff830ba000 R ural_ca +ffffffff830ba030 r ural_devs +ffffffff830ba0a0 r ural_rf2522_r2 +ffffffff830ba0e0 r ural_rf2524_r2 +ffffffff830ba120 r ural_rf2525_hi_r2 +ffffffff830ba160 r ural_rf2525_r2 +ffffffff830ba1a0 r ural_rf2525e_r2 +ffffffff830ba1e0 r ural_rf2526_hi_r2 +ffffffff830ba220 r ural_rf2526_r2 +ffffffff830ba260 r ural_def_bbp +ffffffff830ba2a0 r ural_def_mac +ffffffff830bb000 R rum_ca +ffffffff830bb030 r rum_devs +ffffffff830bb110 r rum_rf5225 +ffffffff830bb460 r rum_rf5226 +ffffffff830bb7b0 r rum_def_bbp +ffffffff830bb7f0 r rum_def_mac +ffffffff830bc000 R run_ca +ffffffff830bc030 r run_devs +ffffffff830bc430 r rt2860_rf2850 +ffffffff830bc860 r rt2860_rates +ffffffff830bc920 r rt5592_freqs_40mhz +ffffffff830bca60 r rt5592_freqs_20mhz +ffffffff830bcba0 r rt5592_2ghz_def_rf +ffffffff830bcbe0 r rt5592_chan_5ghz +ffffffff830bce30 r rt5592_def_bbp +ffffffff830bce70 r rt5592_bbp_r196 +ffffffff830bced0 r rt5390_def_bbp +ffffffff830bcf00 r rt3572_def_rf +ffffffff830bcf40 r rt3070_def_rf +ffffffff830bcf70 r rt3593_def_rf +ffffffff830bcfb0 r rt5592_def_rf +ffffffff830bcfe0 r rt5392_def_rf +ffffffff830bd060 r rt5390_def_rf +ffffffff830bd0e0 r rt2870_def_mac +ffffffff830be000 R mtw_ca +ffffffff830be030 r mtw_devs +ffffffff830be070 r rt2860_rates +ffffffff830be130 r mt7601_rf_chan +ffffffff830be1a0 r mt7601_def_bbp +ffffffff830be2d0 r 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dt_static_refcnt_tdb +ffffffff83456000 D db_next_free_breakpoint +ffffffff83456008 D db_breakpoints_inserted +ffffffff83457000 D db_ed_style +ffffffff83458000 D db_examine_format +ffffffff83458078 D db_print_format +ffffffff83459000 D db_history_size +ffffffff83459008 D db_history_curr +ffffffff83459010 D db_history_last +ffffffff8345a000 D db_tab_stop_width +ffffffff8345a004 D db_max_line +ffffffff8345a008 D db_max_width +ffffffff8345a00c D db_radix +ffffffff8345b000 D db_lastsym +ffffffff8345b008 D db_maxoff +ffffffff8345c000 D db_vars +ffffffff8345c090 D db_evars +ffffffff8345d000 D db_watchpoints_inserted +ffffffff8345d008 D db_next_free_watchpoint +ffffffff8345e000 D db_log +ffffffff8345f000 D audio_cd +ffffffff8345f020 D audio_lock +ffffffff83460000 D midi_cd +ffffffff83461000 D rnd_cold +ffffffff83461004 D rnd_slowextract +ffffffff83461008 D rnd_timeout +ffffffff83461050 D rndlock +ffffffff83461060 D rndreinit_timeout +ffffffff834610a8 D rnd_task +ffffffff83462000 D video_cd +ffffffff83463000 d rrip_table_analyze +ffffffff834630e0 d rrip_table_getname +ffffffff834631e0 d rrip_table_getsymname +ffffffff83463280 d rrip_table_extref +ffffffff83464000 D nexecs +ffffffff83465000 D elf_note_names +ffffffff83466000 D ncpus +ffffffff83466004 D ncpusfound +ffffffff83467000 D acct_lock +ffffffff83467010 D acctsuspend +ffffffff83467014 D acctresume +ffffffff83467018 D acctrate +ffffffff83468000 D bufqs_mtx +ffffffff83469000 D ticks +ffffffff8346a000 D fhdlk +ffffffff8346b000 D kqueue_klist_lock +ffffffff8346b010 D kqueue_ps_list_lock +ffffffff8346b020 D kq_timeoutmax +ffffffff8346c000 D stackgap_random +ffffffff8346d000 D deadproc_mutex +ffffffff8346e000 D nprocesses +ffffffff8346e004 D nthreads +ffffffff8346e008 D fork_tfmrate +ffffffff8346f000 D kthread_q +ffffffff83470000 D nkmempages +ffffffff83470008 D malloc_mtx +ffffffff83470020 D memname +ffffffff834704b0 D sysctl_kmemlock +ffffffff834704c0 D malloc_errintvl +ffffffff83471000 D maxdmap +ffffffff83471008 D maxsmap +ffffffff83471010 D rlimit_lock +ffffffff83472000 D sched_cost_load +ffffffff83472004 D sched_cost_priority +ffffffff83472008 D sched_cost_runnable +ffffffff8347200c D sched_cost_resident +ffffffff83473000 D intrmap_lock +ffffffff83474000 D nosuidcoredump +ffffffff83474008 D sigio_lock +ffffffff83475000 D smr_lock +ffffffff83475010 D smr_logintvl +ffffffff83476000 D startuphook_list +ffffffff83477000 D sysctl_lock +ffffffff83477010 D sysctl_disklock +ffffffff83477020 d openbsd +ffffffff83477024 d arg_max +ffffffff83477028 d posix_version +ffffffff8347702c d ngroups_max +ffffffff83477030 d int_one +ffffffff83477034 d maxpartitions +ffffffff83477038 d raw_part +ffffffff8347703c D allowpowerdown +ffffffff83477040 D hw_power +ffffffff83477044 d byte_order +ffffffff83478000 d thrsleep_queue +ffffffff83478010 d thrsleep_lock +ffffffff83479000 D tc_lock +ffffffff83479010 D windup_mtx +ffffffff83479020 d dummy_timecounter +ffffffff83479070 D timecounter +ffffffff83479078 d timehands +ffffffff83479080 d th0 +ffffffff83479118 d th1 +ffffffff8347a000 D itimer_mtx +ffffffff8347a010 D ratecheck_mtx +ffffffff8347a020 D ppsratecheck_mtx +ffffffff8347a030 D resettodr_to +ffffffff8347a078 D resettodr_task +ffffffff8347b000 D timeout_mutex +ffffffff8347c000 D wdog_auto +ffffffff8347d000 D taskq_sys +ffffffff8347d050 D taskq_sys_mp +ffffffff8347e000 d update_loadavg.to +ffffffff8347e048 D ccpu +ffffffff8347e050 d schedcpu.to +ffffffff8347e098 D perflevel +ffffffff8347e09c D perfpolicy +ffffffff8347e0a0 D setperf_to +ffffffff8347f000 D autoconf_attdet_mtx +ffffffff8347f010 D msgs +ffffffff83480000 d evcount_list +ffffffff83480010 d evcount_percpu_init_list +ffffffff83481000 D syslogf_rwlock +ffffffff83481010 D log_mtx +ffffffff83481020 D log_kq_mtx +ffffffff83481030 D logstash_in +ffffffff83481038 D logstash_out +ffffffff83481040 D logstash_rwlock +ffffffff83482000 D pool_head +ffffffff83482010 D pool_lock +ffffffff83482020 D pool_debug +ffffffff83482028 D pool_allocator_single +ffffffff83482040 D pool_allocator_multi +ffffffff83482058 D pool_allocator_multi_ni +ffffffff83482070 D pool_gc_tick +ffffffff834820b8 D pool_gc_task +ffffffff83483000 D kprintf_mutex +ffffffff83483010 D db_panic +ffffffff83483014 D splassert_ctl +ffffffff83483018 D v_putc +ffffffff83483020 D printf_flags +ffffffff83484000 D userconf_base +ffffffff83484004 D userconf_maxdev +ffffffff83484008 D userconf_totdev +ffffffff8348400c D userconf_maxlocnames +ffffffff83484010 D userconf_cnt +ffffffff83484014 D userconf_lines +ffffffff83484018 D userconf_histsz +ffffffff83484020 D userconf_cmds +ffffffff83485000 D ftlock +ffffffff83486000 d ppollcollect.poll_errintvl +ffffffff83487000 D ttydefchars +ffffffff83487014 D ttclos +ffffffff8348701b D ttopen +ffffffff83487022 D ttybg +ffffffff83487028 D ttyin +ffffffff8348702e D ttyout +ffffffff83487038 D ttylist_lock +ffffffff83488000 D linesw +ffffffff83488280 D nlinesw +ffffffff83489000 D pt_softc_lock +ffffffff8348a000 d mbstat_boot_boot_cpumem +ffffffff8348a0c0 D mbstat +ffffffff8348a0d0 D mclsizes +ffffffff8348a0f0 D m_extref_mtx +ffffffff8348a100 D m_pool_allocator +ffffffff8348a120 D m_types +ffffffff8348b000 D somaxconn +ffffffff8348b004 D sominconn +ffffffff8348b008 D sosplice_lock +ffffffff8348c000 D sb_max +ffffffff8348d000 D unp_df_lock +ffffffff8348d010 D unp_gc_lock +ffffffff8348d020 D unp_rights_mtx +ffffffff8348d030 D unp_ino_mtx +ffffffff8348d040 D unp_gc_task +ffffffff8348d070 D unpst_sendspace +ffffffff8348d074 D unpst_recvspace +ffffffff8348d078 D unpsq_sendspace +ffffffff8348d07c D unpsq_recvspace +ffffffff8348d080 D unpdg_sendspace +ffffffff8348d084 D unpdg_recvspace +ffffffff8348e000 D doingcache +ffffffff8348f000 D maxvfsconf +ffffffff8348f010 d vfsconflist +ffffffff83490000 D lockf_lock +ffffffff83490010 D maxlocksperuid +ffffffff83491000 D iftovt_tab +ffffffff83491040 D vttoif_tab +ffffffff83491064 D suid_clear +ffffffff83491068 D vnode_mtx +ffffffff83491078 D vfs_stall_lock +ffffffff83491090 D vtypes +ffffffff834910e0 D vtags +ffffffff83492000 D syncer_maxdelay +ffffffff83492004 D syncdelay +ffffffff83493000 D dosdirtemplate +ffffffff83494000 D ntfs_hashlock +ffffffff83495000 D ntfs_toupper_lock +ffffffff83496000 D art_table_gc_mtx +ffffffff83496010 D art_table_gc_task +ffffffff83496040 D art_node_gc_mtx +ffffffff83496050 D art_node_gc_task +ffffffff83497000 D bpf_bufsize +ffffffff83497004 D bpf_maxbufsize +ffffffff83498000 D ifg_head +ffffffff83498010 D if_cloners_lock +ffffffff83498020 D if_hooks_mtx +ffffffff83498030 D if_input_task_locked +ffffffff83498060 D netlock +ffffffff83498070 D ifnetlist +ffffffff83499000 D ifiq_maxlen_drop +ffffffff83499004 D ifiq_maxlen_return +ffffffff8349a000 D etherbroadcastaddr +ffffffff8349a006 D ether_ipmulticast_min +ffffffff8349a00c D ether_ipmulticast_max +ffffffff8349a012 D ether_ip6multicast_min +ffffffff8349a018 D ether_ip6multicast_max +ffffffff8349b000 D etherip_cloner +ffffffff8349b030 D etherip_list +ffffffff8349c000 D loop_cloner +ffffffff8349d000 D ifmedia_mtx +ffffffff8349e000 D ppp_compressors +ffffffff8349e020 D ppp_cloner +ffffffff8349f000 D ppp_pkt_init +ffffffff834a0000 D ppp_bsd_compress +ffffffff834a1000 D ppp_deflate +ffffffff834a1070 D ppp_deflate_draft +ffffffff834a2000 D tun_cloner +ffffffff834a2030 D tap_cloner +ffffffff834a3000 D bridgeintrq +ffffffff834a3038 D bridge_cloner +ffffffff834a4000 d veb_cloner +ffffffff834a4030 d vport_cloner +ffffffff834a5000 D vlan_tagh_lk +ffffffff834a5010 D vlan_cloner +ffffffff834a5040 D svlan_cloner +ffffffff834a6000 D pipex_list_mtx +ffffffff834a6010 D pipex_prune +ffffffff834a6018 D pipexoutq +ffffffff834a6050 d SHAPad2 +ffffffff834a7000 D rtmap_gc +ffffffff834a7018 D rt_rc +ffffffff834a8000 D rt_labels +ffffffff834a8010 D rtlabel_mtx +ffffffff834a9000 D enc_cloner +ffffffff834aa000 D gre_cloner +ffffffff834aa030 D gre_list +ffffffff834aa040 D mgre_cloner +ffffffff834aa070 D egre_cloner +ffffffff834aa0a0 D nvgre_cloner +ffffffff834aa0d0 D eoip_cloner +ffffffff834ab000 D trunk_cloner +ffffffff834ac000 d aggr_cloner +ffffffff834ad000 d tpmr_cloner +ffffffff834ae000 D mpe_cloner +ffffffff834af000 D mpw_cloner +ffffffff834b0000 D mpip_cloner +ffffffff834b1000 d bpe_cloner +ffffffff834b1030 d bpe_lock +ffffffff834b2000 D vether_cloner +ffffffff834b3000 d rport_cloner +ffffffff834b3030 d rport_interfaces_lock +ffffffff834b4000 D pair_cloner +ffffffff834b5000 d vxlan_cloner +ffffffff834b5030 d vxlan_lock +ffffffff834b5040 d vxlan_teps +ffffffff834b6000 D underload_interval +ffffffff834b6010 D wg_cloner +ffffffff834b7000 d stoeplitz_keyseed +ffffffff834b8000 D ieee80211_cache_size +ffffffff834b9000 D arpt_prune +ffffffff834b9004 D arpt_keep +ffffffff834b9008 D arpt_down +ffffffff834b9010 D arpinq +ffffffff834b9048 D arp_mtx +ffffffff834b9058 D arp_maxtries +ffffffff834ba000 D ipport_firstauto +ffffffff834ba004 D ipport_lastauto +ffffffff834ba008 D ipport_hifirstauto +ffffffff834ba00c D ipport_hilastauto +ffffffff834bb000 D divert_sendspace +ffffffff834bb004 D divert_recvspace +ffffffff834bb008 D divbhashsize +ffffffff834bc000 D icmptstamprepl +ffffffff834bc004 D icmperrppslim +ffffffff834bc008 D icmp_redirtimeout +ffffffff834bd000 D ip_sendredirects +ffffffff834bd004 D ip_defttl +ffffffff834bd008 D ip_mtudisc +ffffffff834bd00c D ip_mtudisc_timeout +ffffffff834bd010 D ipq_mutex +ffffffff834bd020 D ip_maxqueue +ffffffff834bd028 D ipintrq +ffffffff834bd060 d ipsend_task +ffffffff834bd090 d ipsendraw_task +ffffffff834be000 D ip_mrtproto +ffffffff834be004 d sin +ffffffff834bf000 D rip_sendspace +ffffffff834bf008 D rip_recvspace +ffffffff834c0000 D tcp_debug_mtx +ffffffff834c1000 D tcprexmtthresh +ffffffff834c1004 D tcptv_keep_init +ffffffff834c1008 D tcp_rst_ppslim +ffffffff834c100c D tcp_ackdrop_ppslim +ffffffff834c1010 D tcp_syn_hash_size +ffffffff834c1014 D tcp_syn_cache_limit +ffffffff834c1018 D tcp_syn_bucket_limit +ffffffff834c101c D tcp_syn_use_limit +ffffffff834c1020 D syn_cache_mtx +ffffffff834c2000 D tcp_outflags +ffffffff834c3000 D tcp_timer_mtx +ffffffff834c3010 D tcp_mssdflt +ffffffff834c3014 D tcp_rttdflt +ffffffff834c3018 D tcp_do_rfc1323 +ffffffff834c301c D tcp_do_sack +ffffffff834c3020 D tcp_do_rfc3390 +ffffffff834c3024 D tcp_do_tso +ffffffff834c3028 D tcp_reass_limit +ffffffff834c302c D tcp_sackhole_limit +ffffffff834c4000 D tcp_backoff +ffffffff834c4034 D tcp_totbackoff +ffffffff834c5000 D tcp_sendspace +ffffffff834c5004 D tcp_recvspace +ffffffff834c5008 D tcp_autorcvbuf_inc +ffffffff834c6000 D udpcksum +ffffffff834c6004 D udp_sendspace +ffffffff834c6008 D udp_recvspace +ffffffff834c7000 D ipsec_flows_mtx +ffffffff834c7010 D ipsec_ids_idle +ffffffff834c7014 D ipsec_ids_next_flow +ffffffff834c7018 D ipsec_policy_head +ffffffff834c7028 D ipsp_ids_gc_timeout +ffffffff834c7070 D tdb_sadb_mtx +ffffffff834c7080 d tdb_hashmask +ffffffff834c8000 D ipo_tdb_mtx +ffffffff834c8010 D ipsec_acquire_mtx +ffffffff834c8020 D ipsec_acquire_head +ffffffff834c9000 D ipsec_keep_invalid +ffffffff834c9004 D ipsec_require_pfs +ffffffff834c9008 D ipsec_soft_timeout +ffffffff834c900c D ipsec_exp_timeout +ffffffff834c9010 D ipsec_soft_first_use +ffffffff834c9014 D ipsec_exp_first_use +ffffffff834c9018 D ipsec_expire_acquire +ffffffff834c901c D esp_enable +ffffffff834c9020 D ah_enable +ffffffff834ca000 D udpencap_enable +ffffffff834ca004 D udpencap_port +ffffffff834cb000 D carp_vh_rc +ffffffff834cb020 D carp_sc_rc +ffffffff834cb040 D carp_opts +ffffffff834cb058 D carp_cloner +ffffffff834cb088 d carp_send_na.mcast ffffffff834cc000 d PADDING -ffffffff834cd000 d weak_keys -ffffffff834ce000 D swcr_id -ffffffff834cf000 D window_inflate -ffffffff834cf004 D window_deflate -ffffffff834d0000 D ghash_update -ffffffff834d1000 D mpls_defttl -ffffffff834d1004 D mpls_mapttl_ip -ffffffff834d2000 D nfskevq_lock -ffffffff834d3000 D desirednfsrvcache -ffffffff834d4000 D nfs_niothreads -ffffffff834d5000 D fragtbl -ffffffff834d6000 D ffs_vtbl -ffffffff834d7000 D dirchk -ffffffff834d8000 D desireddquot -ffffffff834d9000 D amap_list_lock -ffffffff834da000 d uao_list_lock -ffffffff834db000 D udv_lock -ffffffff834dc000 d uvmexp_countersboot_boot_cpumem -ffffffff834dc0c0 D uvmexp_counters -ffffffff834dc0c8 D vm_min_kernel_address -ffffffff834dd000 D no_constraint -ffffffff834de000 d uvm_kmapent_warn_rate -ffffffff834df000 D maxslp -ffffffff834e0000 D uvmpagerops -ffffffff834e1000 D uvm_swap_data_lock -ffffffff834e1010 D swap_syscall_lock -ffffffff834e1020 D oommtx -ffffffff834e2000 D uvm_doswapencrypt -ffffffff834e3000 D gif_list -ffffffff834e3010 D gif_cloner -ffffffff834e4000 d sec_cloner -ffffffff834e4030 d sec_tdb_gc_mtx -ffffffff834e4040 d sec_tdb_gc_task -ffffffff834e5000 D divert6_sendspace -ffffffff834e5004 D divert6_recvspace -ffffffff834e5008 D divb6hashsize -ffffffff834e6000 d in6_get_hw_ifid.allone -ffffffff834e7000 D ip6_sendredirects -ffffffff834e7004 D ip6_defhlim -ffffffff834e7008 D ip6_defmcasthlim -ffffffff834e700c D ip6_maxfragpackets -ffffffff834e7010 D ip6_maxfrags -ffffffff834e7014 D ip6_log_interval -ffffffff834e7018 D ip6_hdrnestlimit -ffffffff834e701c D ip6_dad_count -ffffffff834e7020 D ip6_auto_flowlabel -ffffffff834e7024 D ip6_use_deprecated -ffffffff834e7028 D ip6_neighborgcthresh -ffffffff834e702c D ip6_maxdynroutes -ffffffff834e7030 D rip6_sendspace -ffffffff834e7038 D rip6_recvspace -ffffffff834e7040 D icmp6_redirtimeout -ffffffff834e7044 D icmp6errppslim -ffffffff834e7048 D ip6_mtudisc_timeout -ffffffff834e8000 D frag6_mutex -ffffffff834e9000 d icmp6_mtudisc_hiwat -ffffffff834e9004 d icmp6_mtudisc_lowat -ffffffff834ea000 d randomtab_20 -ffffffff834eb000 D ip6intrq -ffffffff834eb038 d ip6send_task -ffffffff834ec000 D nd6_timer_next -ffffffff834ec008 D nd6_expire_next -ffffffff834ec010 D nd6_delay -ffffffff834ec014 D nd6_umaxtries -ffffffff834ec018 D nd6_mmaxtries -ffffffff834ec01c D nd6_gctimer -ffffffff834ec020 D nd6_maxndopt -ffffffff834ec028 D nd6_mtx -ffffffff834ec038 D nd6_list -ffffffff834ed000 d dadq -ffffffff834ee000 D pfkeyv2_mtx -ffffffff834ee010 d pfkeyv2_seq -ffffffff834ef000 D sadb_exts_allowed_in -ffffffff834ef090 D sadb_exts_required_in -ffffffff834f0000 D cold -ffffffff834f1000 D bdevsw -ffffffff834f1460 D nblkdev -ffffffff834f1470 D cdevsw -ffffffff834f3450 D nchrdev -ffffffff834f3454 D mem_no -ffffffff834f3458 D swapdev -ffffffff834f3460 D constab -ffffffff834f4000 D machine -ffffffff834f4008 D cpu_idle_cycle_fcn -ffffffff834f4010 D lid_action -ffffffff834f4014 D pwr_action -ffffffff834f4018 D isa_constraint -ffffffff834f4028 D dma_constraint -ffffffff834f4040 D uvm_md_constraints -ffffffff834f4058 D delay_func -ffffffff834f4060 D initclock_func -ffffffff834f4068 D startclock_func -ffffffff834f4070 D bootinfo_size -ffffffff834f4074 D waittime -ffffffff834f4078 D dumpmag -ffffffff834f5000 d identifycpu.prevci -ffffffff834f6000 D tsc_rdtsc -ffffffff834f6008 D tsc_timecounter -ffffffff834f6058 D tsc_is_synchronized -ffffffff834f7000 D local_apic -ffffffff834f7020 D lapic_id -ffffffff834f7080 D lapic_tpr -ffffffff834f70a0 d lapic_ppr -ffffffff834f7100 d lapic_isr -ffffffff834f8000 D warn_once -ffffffff834f9000 d errata -ffffffff834fa000 D cpu_ucode_mtx -ffffffff834fb000 D mem_owner_bios -ffffffff834fb008 D mrops -ffffffff834fb028 D mtrrmask -ffffffff834fb030 D mtrrtomrt -ffffffff834fc000 D pg_frame -ffffffff834fc008 D pg_lgframe -ffffffff834fc010 D pmap_pg_wc -ffffffff834fc018 D pmaps_lock -ffffffff834fc028 d pmap_maxkvaddr -ffffffff834fd000 D kv_physwait -ffffffff834fe000 D fpu_save_len -ffffffff834ff000 D i8259_pic -ffffffff83500000 D softintr_pic -ffffffff83501000 D ipifunc -ffffffff83502000 D setperf_mp_mutex -ffffffff83503000 D db_Grp6 -ffffffff83503040 D db_Grp7 -ffffffff83503100 D db_Grp8 -ffffffff83503140 D db_Grp9 -ffffffff83503200 D db_GrpA -ffffffff83503240 D db_GrpB -ffffffff83503280 D db_GrpC -ffffffff835032c0 D db_inst_0f0x -ffffffff83503440 D db_inst_0f2x -ffffffff835035c0 D db_inst_0f3x -ffffffff83503740 D db_inst_0f8x -ffffffff835038c0 D db_inst_0f9x -ffffffff83503a40 D db_inst_0fax -ffffffff83503bc0 D db_inst_0fbx -ffffffff83503d40 D db_inst_0fcx -ffffffff83503ec0 D db_inst_0f -ffffffff83503f40 D db_Esc92 -ffffffff83503f80 D db_Esc94 -ffffffff83503fc0 D db_Esc95 -ffffffff83504000 D db_Esc96 -ffffffff83504040 D db_Esc97 -ffffffff83504080 D db_Esca5 -ffffffff835040c0 D db_Escb4 -ffffffff83504100 D db_Esce3 -ffffffff83504140 D db_Escf4 -ffffffff83504180 D db_Esc8 -ffffffff83504240 D db_Esc9 -ffffffff83504300 D db_Esca -ffffffff835043c0 D db_Escb -ffffffff83504480 D db_Escc -ffffffff83504540 D db_Escd -ffffffff83504600 D db_Esce -ffffffff835046c0 D db_Escf -ffffffff83504780 D db_Esc_inst -ffffffff835047c0 D db_Grp1 -ffffffff83504800 D db_Grp2 -ffffffff83504840 D db_Grp3 -ffffffff83504900 D db_Grp4 -ffffffff835049c0 D db_Grp5 -ffffffff83504a80 D db_inst_table -ffffffff83506280 D db_bad_inst -ffffffff835062a0 D db_index_reg_16 -ffffffff835062e0 D db_reg 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aesni_sc -ffffffff838d3008 B aesnipl -ffffffff838d31b0 B aesni_ops -ffffffff838d4000 b amd64_errata.printed -ffffffff838d5000 B cpu_ucode_size -ffffffff838d5008 B cpu_ucode_data -ffffffff838d5010 B cpu_ucode_intel_applied -ffffffff838d6000 b ap_open_count -ffffffff838d6008 B zeropage -ffffffff838d6010 B mem_range_softc -ffffffff838d7000 B mtrrdef -ffffffff838d7008 B mtrrcap -ffffffff838d8000 B nkptp -ffffffff838d8020 B pg_nx -ffffffff838d8028 B pg_g_kern -ffffffff838d8030 B pg_crypt -ffffffff838d8038 B pmap_initialized -ffffffff838d8040 B kernel_pmap_store -ffffffff838d8118 B cr3_reuse_pcid -ffffffff838d8120 b cr3_pcid_temp -ffffffff838d8128 B virtual_avail -ffffffff838d8130 B pg_xo -ffffffff838d8140 B protection_codes -ffffffff838d8180 B pmap_use_pcid -ffffffff838d8184 b cr3_pcid_proc -ffffffff838d8188 B cr3_pcid_proc_intel -ffffffff838d8190 B pmaps -ffffffff838d8198 B pmap_pmap_pool -ffffffff838d8340 B pmap_pv_pool -ffffffff838d84e8 B pmap_pdp_pool -ffffffff838d9000 B fpu_mxcsr_mask -ffffffff838d9008 B xsave_mask -ffffffff838da000 B x86_soft_intrs -ffffffff838db000 B i8259_imen -ffffffff838dc000 B prev_cache -ffffffff838dd000 B intr_shared_edge -ffffffff838dd004 B intr_suspended -ffffffff838dd008 B intr_nowake -ffffffff838dd010 B fake_softclock_intrhand -ffffffff838dd080 B fake_softnet_intrhand -ffffffff838dd0f0 B fake_softtty_intrhand -ffffffff838dd160 B fake_timer_intrhand -ffffffff838dd1d0 B fake_ipi_intrhand -ffffffff838dd240 B fake_xen_intrhand -ffffffff838dd2b0 B fake_hyperv_intrhand -ffffffff838de000 B atdevbase -ffffffff838de010 b ioport_ex_storage -ffffffff838de2e0 B ioport_ex -ffffffff838de2f0 b iomem_ex_storage -ffffffff838de5c0 B iomem_ex -ffffffff838de5c8 b ioport_malloc_safe -ffffffff838df000 B mp_perflevel -ffffffff838df008 B ul_setperf -ffffffff838e0000 B cn_tab -ffffffff838e1000 B ddb_mp_mutex -ffffffff838e1010 B ddb_state -ffffffff838e1018 B ddb_regs -ffffffff838e10c8 B db_switch_cpu -ffffffff838e10d0 B db_switch_to_cpu -ffffffff838e10d8 B ddb_active_cpu -ffffffff838e2000 B rtclock_tval -ffffffff838e2008 B i8254_ticked -ffffffff838e200c B i8254_offset -ffffffff838e2010 B i8254_lastcount -ffffffff838e2018 b rtcstart.rtcdrain_timeout -ffffffff838e2060 B rtc_update_century -ffffffff838e2068 B rtc_todr -ffffffff838e3000 B k8pnow_current_state -ffffffff838e4000 B bus_clock -ffffffff838e4008 b est_fqlist -ffffffff838e5000 B k1x_current_state -ffffffff838e6000 B rotatedfonts -ffffffff838e6008 B rasops_framebuffers -ffffffff838e7000 b stamp_attr -ffffffff838e7010 b stamp +ffffffff834cd000 d PADDING +ffffffff834ce000 d weak_keys +ffffffff834cf000 D swcr_id +ffffffff834d0000 D window_inflate +ffffffff834d0004 D window_deflate +ffffffff834d1000 D ghash_update +ffffffff834d2000 D mpls_defttl +ffffffff834d2004 D mpls_mapttl_ip +ffffffff834d3000 D nfskevq_lock +ffffffff834d4000 D desirednfsrvcache +ffffffff834d5000 D nfs_niothreads +ffffffff834d6000 D fragtbl +ffffffff834d7000 D ffs_vtbl +ffffffff834d8000 D dirchk +ffffffff834d9000 D desireddquot +ffffffff834da000 D amap_list_lock +ffffffff834db000 d uao_list_lock +ffffffff834dc000 D udv_lock +ffffffff834dd000 d uvmexp_countersboot_boot_cpumem +ffffffff834dd0c0 D uvmexp_counters +ffffffff834dd0c8 D vm_min_kernel_address +ffffffff834de000 D no_constraint +ffffffff834df000 d uvm_kmapent_warn_rate +ffffffff834e0000 D maxslp +ffffffff834e1000 D uvmpagerops +ffffffff834e2000 D uvm_swap_data_lock +ffffffff834e2010 D swap_syscall_lock +ffffffff834e2020 D oommtx +ffffffff834e3000 D uvm_doswapencrypt +ffffffff834e4000 D gif_list +ffffffff834e4010 D gif_cloner +ffffffff834e5000 d sec_cloner +ffffffff834e5030 d sec_tdb_gc_mtx +ffffffff834e5040 d sec_tdb_gc_task +ffffffff834e6000 D divert6_sendspace +ffffffff834e6004 D divert6_recvspace +ffffffff834e6008 D divb6hashsize +ffffffff834e7000 d in6_get_hw_ifid.allone +ffffffff834e8000 D ip6_sendredirects +ffffffff834e8004 D ip6_defhlim +ffffffff834e8008 D ip6_defmcasthlim +ffffffff834e800c D ip6_maxfragpackets +ffffffff834e8010 D ip6_maxfrags +ffffffff834e8014 D ip6_log_interval +ffffffff834e8018 D ip6_hdrnestlimit +ffffffff834e801c D ip6_dad_count +ffffffff834e8020 D ip6_auto_flowlabel +ffffffff834e8024 D ip6_use_deprecated +ffffffff834e8028 D ip6_neighborgcthresh +ffffffff834e802c D ip6_maxdynroutes +ffffffff834e8030 D rip6_sendspace +ffffffff834e8038 D rip6_recvspace +ffffffff834e8040 D icmp6_redirtimeout +ffffffff834e8044 D icmp6errppslim +ffffffff834e8048 D ip6_mtudisc_timeout +ffffffff834e9000 D frag6_mutex +ffffffff834ea000 d icmp6_mtudisc_hiwat +ffffffff834ea004 d icmp6_mtudisc_lowat +ffffffff834eb000 d randomtab_20 +ffffffff834ec000 D ip6intrq +ffffffff834ec038 d ip6send_task +ffffffff834ed000 D nd6_timer_next +ffffffff834ed008 D nd6_expire_next +ffffffff834ed010 D nd6_delay +ffffffff834ed014 D nd6_umaxtries +ffffffff834ed018 D nd6_mmaxtries +ffffffff834ed01c D nd6_gctimer +ffffffff834ed020 D nd6_maxndopt +ffffffff834ed028 D nd6_mtx +ffffffff834ed038 D nd6_list +ffffffff834ee000 d dadq +ffffffff834ef000 D pfkeyv2_mtx +ffffffff834ef010 d pfkeyv2_seq +ffffffff834f0000 D sadb_exts_allowed_in +ffffffff834f0090 D sadb_exts_required_in +ffffffff834f1000 D cold +ffffffff834f2000 D bdevsw +ffffffff834f2460 D nblkdev +ffffffff834f2470 D cdevsw +ffffffff834f4450 D nchrdev +ffffffff834f4454 D mem_no +ffffffff834f4458 D swapdev +ffffffff834f4460 D constab +ffffffff834f5000 D machine +ffffffff834f5008 D cpu_idle_cycle_fcn +ffffffff834f5010 D lid_action +ffffffff834f5014 D pwr_action +ffffffff834f5018 D isa_constraint +ffffffff834f5028 D dma_constraint +ffffffff834f5040 D uvm_md_constraints +ffffffff834f5058 D delay_func +ffffffff834f5060 D initclock_func +ffffffff834f5068 D startclock_func +ffffffff834f5070 D bootinfo_size +ffffffff834f5074 D waittime +ffffffff834f5078 D dumpmag +ffffffff834f6000 d identifycpu.prevci +ffffffff834f7000 D tsc_rdtsc +ffffffff834f7008 D tsc_timecounter +ffffffff834f7058 D tsc_is_synchronized +ffffffff834f8000 D local_apic +ffffffff834f8020 D lapic_id +ffffffff834f8080 D lapic_tpr +ffffffff834f80a0 d lapic_ppr +ffffffff834f8100 d lapic_isr +ffffffff834f9000 D warn_once +ffffffff834fa000 d errata +ffffffff834fb000 D cpu_ucode_mtx +ffffffff834fc000 D mem_owner_bios +ffffffff834fc008 D mrops +ffffffff834fc028 D mtrrmask +ffffffff834fc030 D mtrrtomrt +ffffffff834fd000 D pg_frame +ffffffff834fd008 D pg_lgframe +ffffffff834fd010 D pmap_pg_wc +ffffffff834fd018 D pmaps_lock +ffffffff834fd028 d pmap_maxkvaddr +ffffffff834fe000 D kv_physwait +ffffffff834ff000 D fpu_save_len +ffffffff83500000 D i8259_pic +ffffffff83501000 D softintr_pic +ffffffff83502000 D ipifunc +ffffffff83503000 D setperf_mp_mutex +ffffffff83504000 D db_Grp6 +ffffffff83504040 D db_Grp7 +ffffffff83504100 D db_Grp8 +ffffffff83504140 D db_Grp9 +ffffffff83504200 D db_GrpA +ffffffff83504240 D db_GrpB +ffffffff83504280 D db_GrpC +ffffffff835042c0 D db_inst_0f0x +ffffffff83504440 D db_inst_0f2x +ffffffff835045c0 D db_inst_0f3x +ffffffff83504740 D db_inst_0f8x +ffffffff835048c0 D db_inst_0f9x +ffffffff83504a40 D db_inst_0fax +ffffffff83504bc0 D db_inst_0fbx +ffffffff83504d40 D db_inst_0fcx +ffffffff83504ec0 D db_inst_0f +ffffffff83504f40 D db_Esc92 +ffffffff83504f80 D db_Esc94 +ffffffff83504fc0 D db_Esc95 +ffffffff83505000 D db_Esc96 +ffffffff83505040 D db_Esc97 +ffffffff83505080 D db_Esca5 +ffffffff835050c0 D db_Escb4 +ffffffff83505100 D db_Esce3 +ffffffff83505140 D db_Escf4 +ffffffff83505180 D db_Esc8 +ffffffff83505240 D db_Esc9 +ffffffff83505300 D db_Esca +ffffffff835053c0 D db_Escb +ffffffff83505480 D db_Escc +ffffffff83505540 D db_Escd +ffffffff83505600 D db_Esce +ffffffff835056c0 D db_Escf +ffffffff83505780 D db_Esc_inst +ffffffff835057c0 D db_Grp1 +ffffffff83505800 D db_Grp2 +ffffffff83505840 D db_Grp3 +ffffffff83505900 D db_Grp4 +ffffffff835059c0 D db_Grp5 +ffffffff83505a80 D db_inst_table +ffffffff83507280 D db_bad_inst +ffffffff835072a0 D db_index_reg_16 +ffffffff835072e0 D db_reg +ffffffff835074e0 D db_seg_reg +ffffffff83507520 D db_lengths +ffffffff83508000 D db_regs +ffffffff835081e0 D db_eregs +ffffffff835081f0 D db_reg_args +ffffffff83509000 D timer_mutex +ffffffff83509010 d i8254_timecounter +ffffffff8350a000 D spleen8x16 +ffffffff8350a058 D spleen12x24 +ffffffff8350a0b0 D spleen16x32 +ffffffff8350a108 D spleen32x64 +ffffffff8350a160 d builtin_fonts +ffffffff8350a1e0 d wsfont_add.cookiegen +ffffffff8350a1f0 d spleen8x16_data +ffffffff8350aff0 d spleen12x24_data +ffffffff8350d9f0 d spleen16x32_data +ffffffff835111f0 d spleen32x64_data +ffffffff83520000 D nsphy_cd +ffffffff83521000 D nsphyter_cd +ffffffff83522000 D gentbi_cd +ffffffff83523000 D qsphy_cd +ffffffff83524000 D inphy_cd +ffffffff83525000 D iophy_cd +ffffffff83526000 D eephy_cd +ffffffff83527000 D exphy_cd +ffffffff83528000 D rlphy_cd +ffffffff83529000 D lxtphy_cd +ffffffff8352a000 D luphy_cd +ffffffff8352b000 D mtdphy_cd +ffffffff8352c000 D icsphy_cd +ffffffff8352d000 D sqphy_cd +ffffffff8352e000 D tqphy_cd +ffffffff8352f000 D ukphy_cd +ffffffff83530000 D dcphy_cd +ffffffff83531000 D bmtphy_cd +ffffffff83532000 D brgphy_cd +ffffffff83533000 D xmphy_cd +ffffffff83534000 D amphy_cd +ffffffff83535000 D acphy_cd +ffffffff83536000 D nsgphy_cd +ffffffff83537000 D urlphy_cd +ffffffff83538000 D rgephy_cd +ffffffff83539000 D ciphy_cd +ffffffff8353a000 D ipgphy_cd +ffffffff8353b000 D etphy_cd +ffffffff8353c000 D jmphy_cd +ffffffff8353d000 D atphy_cd +ffffffff8353e000 D scsi_autoconf +ffffffff8353e008 D scsibus_cd +ffffffff8353f000 D cd_cd +ffffffff83540000 D ch_cd +ffffffff83540020 D chquirks +ffffffff83541000 D sd_cd +ffffffff83542000 D st_cd +ffffffff83543000 D uk_cd +ffffffff83544000 D safte_cd +ffffffff83545000 D ses_cd +ffffffff83546000 D sym_cd +ffffffff83546020 D sym_devices +ffffffff83546070 D asym_devices +ffffffff83547000 D rdac_cd +ffffffff83547020 D rdac_devices +ffffffff83548000 D emc_cd +ffffffff83548020 D emc_devices +ffffffff83549000 D hds_cd +ffffffff83549020 D hds_devices +ffffffff8354a000 D atapiscsi_cd +ffffffff8354b000 D wd_cd +ffffffff8354b020 d wddumpmulti +ffffffff8354c000 D mainbus_cd +ffffffff8354c020 D mba_iba +ffffffff8354d000 D bios_cd +ffffffff8354d020 D smbios_uninfo +ffffffff8354e000 D mpbios_cd +ffffffff8354e020 d mp_conf +ffffffff8354e070 d extint_bus +ffffffff8354e0a0 d smi_bus +ffffffff8354e0d0 d nmi_bus +ffffffff8354f000 D need_retpoline +ffffffff83550000 D cpu_info_full_primary +ffffffff83553000 D cpu_info_list +ffffffff83553008 D mp_cpu_funcs +ffffffff83553020 D cpu_cd +ffffffff83553040 D cpu_info +ffffffff83554000 D local_pic +ffffffff83554098 D lapic_readreg +ffffffff835540a0 D lapic_writereg +ffffffff835540a8 D x86_ipi +ffffffff83555000 D ioapic_cold +ffffffff83555008 D ioapic_cd +ffffffff83556000 D efifb_std_descr +ffffffff83556030 D efifb_descrs +ffffffff83556038 D efifb_accessops +ffffffff83556098 D efifb_cd +ffffffff83557000 D pvbus_cd +ffffffff83557020 D pvbus_types +ffffffff835570e0 D pvbus_dma_tag +ffffffff83558000 D pvclock_cd +ffffffff83558020 D pvclock_timecounter +ffffffff83559000 D vmt_tclo_rpc +ffffffff835590d0 D vmt_cd +ffffffff8355a000 D xen_cd +ffffffff8355a020 D xen_bus_dma_tag +ffffffff8355b000 D xnf_cd +ffffffff8355c000 D xbf_cd +ffffffff8355d000 D hv_msg_dispatch +ffffffff8355d110 D hv_timecounter +ffffffff8355d160 D hyperv_cd +ffffffff8355e000 d hv_ic_devs +ffffffff8355f000 D hvn_cd +ffffffff83560000 D hvs_cd +ffffffff83561000 D virtio_cd +ffffffff83562000 D vio_cd +ffffffff83563000 D vioblk_cd +ffffffff83564000 D viomb_cd +ffffffff83565000 D viornd_cd +ffffffff83566000 D vioscsi_cd +ffffffff83567000 D vmmci_cd +ffffffff83568000 D pci_cd +ffffffff83569000 D arc_fw_hdr +ffffffff83569008 D arc_cd +ffffffff8356a000 D jmb_cd +ffffffff8356b000 D mfii_cd +ffffffff8356c000 D ips_cd +ffffffff8356d000 D eap_cd +ffffffff8356e000 D auacer_cd +ffffffff8356f000 D auich_cd +ffffffff83570000 D azalia_cd +ffffffff83571000 D envy_cd +ffffffff83571020 D envy_matchids +ffffffff83571030 D envy_rates +ffffffff835710b0 D ak4524_dac +ffffffff835710d8 D ak4524_adc +ffffffff83571100 D ak4358_dac +ffffffff83571128 D ak5365_adc +ffffffff83571150 D unkenvy_codec +ffffffff83571180 D envy_cards +ffffffff835713f0 D envy_cards_ht +ffffffff83571600 d julia_eeprom +ffffffff83572000 D emu_cd +ffffffff83573000 D auixp_cd +ffffffff83574000 D clcs_cd +ffffffff83575000 D yds_cd +ffffffff83576000 D auvia_cd +ffffffff83577000 D qle_cd +ffffffff83578000 D mpii_cd +ffffffff83579000 D aq_cd +ffffffff8357a000 D de_cd +ffffffff8357b000 D pcn_cd +ffffffff8357c000 D wdc_sii3114_vtbl +ffffffff8357c038 D wdc_pdc203xx_vtbl +ffffffff8357c070 D wdc_svwsata_vtbl +ffffffff8357c0a8 D pciide_cd +ffffffff8357c0d0 d sis_hostbr_type +ffffffff8357d000 D ppb_cd +ffffffff8357e000 D vr_cd +ffffffff8357e020 D vr_devices +ffffffff8357f000 D txp_cd +ffffffff83580000 D bt848_card_signature +ffffffff83581000 D bktr_cd +ffffffff83582000 D em_cd +ffffffff83583000 D ixgb_cd +ffffffff83584000 D ix_cd +ffffffff83584020 D ixgbe_smart_speed +ffffffff83584024 D ixgbe_enable_msix +ffffffff83585000 D ixl_cd +ffffffff83585020 d ixl_sff_lock +ffffffff83586000 D xge_cd +ffffffff83587000 D thtc_cd +ffffffff83587020 D tht_cd +ffffffff83587040 D tht_txt_desc +ffffffff83587068 D tht_rxf_desc +ffffffff83587090 D tht_rxd_desc +ffffffff835870b8 D tht_txf_desc +ffffffff83588000 D myx_cd +ffffffff83589000 D oce_cd +ffffffff8358a000 D dc_devs +ffffffff8358b000 D cas_cd +ffffffff8358c000 D sis_cd +ffffffff8358d000 D se_cd +ffffffff8358e000 D mbg_cd +ffffffff8358f000 D cbb_cd +ffffffff8358f020 D yc_chipsets +ffffffff8358f1b0 d pccbb_funcs +ffffffff8358f1e0 d pccbb_pcmcia_funcs +ffffffff83590000 D skc_cd +ffffffff83590020 D sk_cd +ffffffff83591000 D mskc_cd +ffffffff83591020 D msk_cd +ffffffff83592000 D puc_cd +ffffffff83593000 D puc_ndevs +ffffffff83594000 D iwi_cd +ffffffff83595000 D wpi_cd +ffffffff83596000 D iwn_cd +ffffffff83597000 D iwm_cd +ffffffff83598000 D iwx_cd +ffffffff83599000 d .compoundliteral +ffffffff83599040 d .compoundliteral.4 +ffffffff83599080 d .compoundliteral.5 +ffffffff835990b0 d .compoundliteral.6 +ffffffff835990f0 d .compoundliteral.7 +ffffffff83599130 d .compoundliteral.8 +ffffffff8359a000 D cmpci_cd +ffffffff8359b000 D iha_cd +ffffffff8359c000 D pcscp_cd +ffffffff8359c020 D pcscp_glue +ffffffff8359d000 D bge_cd +ffffffff8359e000 D bnx_firmwares +ffffffff8359e160 D bnx_rv2ps +ffffffff8359e1c0 D bnx_cd +ffffffff8359e1e0 d flash_5709 +ffffffff8359e210 d flash_table +ffffffff8359f000 D vge_cd +ffffffff835a0000 D stge_cd +ffffffff835a1000 D nfe_cd +ffffffff835a2000 D et_cd +ffffffff835a3000 D jme_cd +ffffffff835a4000 D age_cd +ffffffff835a5000 D alc_dma_burst +ffffffff835a5020 D alc_cd +ffffffff835a6000 D ale_cd +ffffffff835a7000 D amdpm_cd +ffffffff835a7020 d amdpm_timecounter +ffffffff835a8000 D bce_cd +ffffffff835a9000 D rtwn_cd +ffffffff835aa000 d ral_rt2560_opns +ffffffff835aa028 d ral_rt2661_opns +ffffffff835aa050 d ral_rt2860_opns +ffffffff835ab000 D piixpm_cd +ffffffff835ac000 D vic_cd +ffffffff835ad000 D vmx_cd +ffffffff835ae000 D vmwpvs_cd +ffffffff835af000 D lii_cd +ffffffff835b0000 D ichiic_cd +ffffffff835b1000 D viapm_cd +ffffffff835b1020 d viapm_timecounter +ffffffff835b2000 D amdiic_cd +ffffffff835b3000 D nviic_cd +ffffffff835b4000 D kate_cd +ffffffff835b5000 D km_cd +ffffffff835b6000 D cpu_model_offsets +ffffffff835b6070 D ksmn_cd +ffffffff835b7000 D itherm_cd +ffffffff835b8000 D pchtemp_cd +ffffffff835b9000 D xspd_cd +ffffffff835ba000 D bwfm_pci_buscore_ops +ffffffff835ba030 D bwfm_pci_bus_ops +ffffffff835ba058 D bwfm_pci_msgbuf_ops +ffffffff835bb000 D bnxt_cd +ffffffff835bc000 D mcx_cd +ffffffff835bd000 D iavf_cd +ffffffff835be000 D rge_cd +ffffffff835bf000 D igc_cd +ffffffff835c0000 D ngbe_cd +ffffffff835c1000 D agp_cd +ffffffff835c2000 D intagp_cd +ffffffff835c2020 D agp_i810_methods +ffffffff835c3000 D reservation_ww_class +ffffffff835c4000 d bridge_lock +ffffffff835c4010 d bridge_list +ffffffff835c5000 d drm_connector_enum_list +ffffffff835c51f8 d connector_list_lock +ffffffff835c5208 d connector_list +ffffffff835c6000 d kernel_fb_helper_list +ffffffff835c6010 d kernel_fb_helper_lock +ffffffff835c7000 D drm_global_mutex +ffffffff835c8000 D i2c_bit_algo +ffffffff835c8010 d drm_fence_context_count +ffffffff835c8018 d dma_fence_stub_mtx +ffffffff835c8028 D wait_bit_mtx +ffffffff835c8038 D shrinkers +ffffffff835c9000 d crtc_ww_class +ffffffff835ca000 d panel_lock +ffffffff835ca010 d panel_list +ffffffff835cb000 d ttm_global_mutex +ffffffff835cc000 D drm_sched_policy +ffffffff835cd000 D intel_bbops +ffffffff835ce000 d i915_sys_placement +ffffffff835ce020 d i915_ttm_bo_driver +ffffffff835cf000 d mchdev_lock +ffffffff835d0000 D inteldrm_stdscreen +ffffffff835d0030 D inteldrm_scrlist +ffffffff835d0038 D inteldrm_screenlist +ffffffff835d0048 D inteldrm_accessops +ffffffff835d00a8 D inteldrm_cd +ffffffff835d1000 d capture_mutex +ffffffff835d2000 d mitigations +ffffffff835d3000 D i915_modparams +ffffffff835d4000 d schedule_lock +ffffffff835d5000 d unbind_fence_ops +ffffffff835d6000 D intel_graphics_stolen_res +ffffffff835d7000 D btc_valid_sclk +ffffffff835d8000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff835d8020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff835d9000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff835d9008 d r600_cs_packet_parse_vline.vline_status +ffffffff835da000 d r100_asic +ffffffff835da2e0 d r200_asic +ffffffff835da5c0 d r300_asic_pcie +ffffffff835da8a0 d r300_asic +ffffffff835dab80 d r420_asic +ffffffff835dae60 d rs400_asic +ffffffff835db140 d rs600_asic +ffffffff835db420 d rs690_asic +ffffffff835db700 d rv515_asic +ffffffff835db9e0 d r520_asic +ffffffff835dbcc0 d r600_asic +ffffffff835dbfa0 d rv6xx_asic +ffffffff835dc280 d rs780_asic +ffffffff835dc560 d rv770_asic +ffffffff835dc840 d evergreen_asic +ffffffff835dcb20 d sumo_asic +ffffffff835dce00 d btc_asic +ffffffff835dd0e0 d cayman_asic +ffffffff835dd3c0 d trinity_asic +ffffffff835dd6a0 d si_asic +ffffffff835dd980 d ci_asic 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radeon_backlight +ffffffff835df044 D radeon_auxch +ffffffff835df048 D radeon_uvd +ffffffff835df04c D radeon_vce +ffffffff835df050 D radeon_si_support +ffffffff835df054 D radeon_cik_support +ffffffff835df058 D radeondrm_cd +ffffffff835df078 D radeondrm_stdscreen +ffffffff835df0a8 D radeondrm_scrlist +ffffffff835df0b0 D radeondrm_screenlist +ffffffff835df0c0 D radeondrm_accessops +ffffffff835e0000 D radeon_bbops +ffffffff835e1000 d radeon_bo_driver +ffffffff835e2000 d verde_pg_init +ffffffff835e3000 d cac_weights_pitcairn +ffffffff835e34d0 d cac_weights_oland +ffffffff835e4000 d aldebaran_mode2_handler +ffffffff835e5000 d amdgpu_vbios_version_attrs +ffffffff835e6000 D amdgpu_asic_name +ffffffff835e7000 D amdgpu_vram_limit +ffffffff835e7004 D amdgpu_gart_size +ffffffff835e7008 D amdgpu_gtt_size +ffffffff835e700c D amdgpu_moverate +ffffffff835e7010 D amdgpu_audio +ffffffff835e7014 D amdgpu_pcie_gen2 +ffffffff835e7018 D amdgpu_msi +ffffffff835e701c D amdgpu_dpm +ffffffff835e7020 D amdgpu_fw_load_type +ffffffff835e7024 D amdgpu_aspm +ffffffff835e7028 D amdgpu_runtime_pm +ffffffff835e702c D amdgpu_ip_block_mask +ffffffff835e7030 D amdgpu_bapm +ffffffff835e7034 D amdgpu_vm_size +ffffffff835e7038 D amdgpu_vm_fragment_size +ffffffff835e703c D amdgpu_vm_block_size +ffffffff835e7040 D amdgpu_vm_update_mode +ffffffff835e7044 D amdgpu_dc +ffffffff835e7048 D amdgpu_sched_jobs +ffffffff835e704c D amdgpu_sched_hw_submission +ffffffff835e7050 D amdgpu_cg_mask +ffffffff835e7058 D amdgpu_pg_mask +ffffffff835e705c D amdgpu_sdma_phase_quantum +ffffffff835e7060 D amdgpu_pp_feature_mask +ffffffff835e7064 D amdgpu_lbpw +ffffffff835e7068 D amdgpu_compute_multipipe +ffffffff835e706c D amdgpu_gpu_recovery +ffffffff835e7070 D amdgpu_smu_pptable_id +ffffffff835e7074 D amdgpu_dc_feature_mask +ffffffff835e7078 D amdgpu_async_gfx_ring +ffffffff835e707c D amdgpu_mcbp +ffffffff835e7080 D amdgpu_discovery +ffffffff835e7084 D amdgpu_noretry +ffffffff835e7088 D amdgpu_force_asic_type +ffffffff835e708c D amdgpu_tmz +ffffffff835e7090 D amdgpu_reset_method +ffffffff835e7094 D amdgpu_num_kcq +ffffffff835e7098 D amdgpu_use_xgmi_p2p +ffffffff835e709c D amdgpu_sg_display +ffffffff835e70a0 D amdgpu_user_partt_mode +ffffffff835e70a8 D mgpu_info +ffffffff835e7558 D amdgpu_ras_enable +ffffffff835e755c D amdgpu_ras_mask +ffffffff835e7560 D amdgpu_bad_page_threshold +ffffffff835e7564 D amdgpu_backlight +ffffffff835e7568 D amdgpu_cd +ffffffff835e7588 D amdgpu_stdscreen +ffffffff835e75b8 D amdgpu_scrlist +ffffffff835e75c0 D amdgpu_screenlist +ffffffff835e75d0 D amdgpu_accessops +ffffffff835e8000 d amdgpu_gtt_mgr_attributes +ffffffff835e9000 D amdgpu_bbops +ffffffff835ea000 D soc15_ih_clientid_name +ffffffff835eb000 D ras_error_string +ffffffff835eb030 D ras_block_string +ffffffff835eb0c0 D ras_mca_block_string +ffffffff835ec000 d amdgpu_bo_driver +ffffffff835ed000 d amdgpu_vram_mgr_attributes +ffffffff835ee000 d xgmi_mutex +ffffffff835ee010 D xgmi_ras_hw_ops +ffffffff835ee050 D xgmi_ras +ffffffff835ef000 D aqua_vanjaram_xcp_funcs +ffffffff835f0000 D gfx_v11_0_3_ras +ffffffff835f1000 d gfx_v9_0_ras +ffffffff835f2000 D gfx_v9_4_ras +ffffffff835f3000 D gfx_v9_4_2_ras_ops +ffffffff835f3040 D gfx_v9_4_2_ras +ffffffff835f4000 D gfx_v9_4_3_xcp_funcs +ffffffff835f4020 D gfx_v9_4_3_ras_ops +ffffffff835f4060 D gfx_v9_4_3_ras +ffffffff835f5000 D gfxhub_v1_2_xcp_funcs +ffffffff835f6000 D hdp_v4_0_ras_hw_ops +ffffffff835f6040 D hdp_v4_0_ras +ffffffff835f7000 d jpeg_v2_6_ras +ffffffff835f8000 d jpeg_v4_0_ras +ffffffff835f9000 d jpeg_v4_0_3_ras +ffffffff835fa000 D mca_v3_0_mp0_ras +ffffffff835fa058 D mca_v3_0_mp1_ras +ffffffff835fa0b0 D mca_v3_0_mpio_ras +ffffffff835fb000 D mmhub_v1_0_ras_hw_ops +ffffffff835fb040 D mmhub_v1_0_ras +ffffffff835fc000 D mmhub_v1_7_ras_hw_ops +ffffffff835fc040 D mmhub_v1_7_ras +ffffffff835fd000 D mmhub_v1_8_ras +ffffffff835fe000 D mmhub_v9_4_ras +ffffffff835ff000 D nbio_v4_3_ras +ffffffff83600000 D nbio_v7_4_ras +ffffffff83601000 D nbio_v7_9_ras +ffffffff83602000 d sriov_sc_video_codecs_encode +ffffffff83602010 d sriov_sc_video_codecs_decode_vcn1 +ffffffff83602020 d sriov_sc_video_codecs_decode_vcn0 +ffffffff83602030 d sriov_sc_video_codecs_encode_array +ffffffff83602060 d sriov_sc_video_codecs_decode_array_vcn1 +ffffffff836020f0 d sriov_sc_video_codecs_decode_array_vcn0 +ffffffff83603000 d sdma_v4_0_ras +ffffffff83604000 D sdma_v4_4_ras +ffffffff83605000 D sdma_v4_4_2_xcp_funcs +ffffffff83605020 d sdma_v4_4_2_ras +ffffffff83606000 d sdma_v6_0_3_ras +ffffffff83607000 d sienna_cichlid_mode2_handler +ffffffff83608000 d smu_v13_0_10_mode2_handler +ffffffff83609000 d sriov_vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff83609010 d sriov_vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff83609020 d sriov_vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff83609030 d sriov_vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff83609040 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff83609070 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff83609100 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff83609140 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff8360a000 D umc_v6_1_ras +ffffffff8360b000 D umc_v6_7_ras +ffffffff8360c000 D umc_v8_10_ras +ffffffff8360d000 D umc_v8_7_ras +ffffffff8360e000 d vcn_v2_6_ras +ffffffff8360f000 d vcn_v4_0_unified_ring_vm_funcs +ffffffff8360f140 d vcn_v4_0_ras +ffffffff83610000 d vcn_v4_0_3_ras +ffffffff83611000 d amdgpu_dm_mode_config_helperfuncs +ffffffff83611010 d dm_atomic_state_funcs +ffffffff83612000 d construct_integrated_info.result +ffffffff83612004 d bios_parser_get_firmware_info.result +ffffffff83613000 d dce_funcs +ffffffff83614000 d dce110_funcs +ffffffff83615000 d dce112_funcs +ffffffff83616000 d dce120_funcs +ffffffff83617000 d rv1_clk_funcs +ffffffff83617090 d rv1_clk_internal_funcs +ffffffff83618000 d rv2_clk_internal_funcs +ffffffff83619000 d dcn2_funcs +ffffffff8361a000 d dcn201_funcs +ffffffff8361b000 d dcn21_funcs +ffffffff8361b090 d rn_bw_params +ffffffff8361c000 D dcn3_fpga_funcs +ffffffff8361c090 d dcn3_funcs +ffffffff8361d000 d vg_funcs +ffffffff8361d090 d dummy_clocks +ffffffff8361d1c0 d vg_bw_params +ffffffff8361e000 d dcn31_funcs +ffffffff8361e090 d dcn31_bw_params +ffffffff8361f000 d dcn314_funcs +ffffffff8361f090 d dcn314_bw_params +ffffffff83620000 d dcn315_funcs +ffffffff83620090 d dcn315_bw_params +ffffffff83621000 d dcn316_funcs +ffffffff83621090 d dcn316_bw_params +ffffffff83622000 d dcn32_funcs +ffffffff83623000 d dcn10_dpp_cap +ffffffff83624000 d dcn20_dpp_funcs +ffffffff83624110 d dcn20_dpp_cap +ffffffff83625000 d dcn20_hubp_funcs +ffffffff83626000 d dcn20_opp_funcs +ffffffff83627000 d dcn20_tg_funcs +ffffffff83628000 d dcn201_dpp_funcs +ffffffff83628110 d dcn201_dpp_cap +ffffffff83629000 d dcn201_hubp_funcs +ffffffff8362a000 d dcn201_opp_funcs +ffffffff8362b000 d dcn201_tg_funcs +ffffffff8362c000 d dcn201_res_pool_funcs +ffffffff8362c0f8 d dcn201_ip +ffffffff8362c2b0 d dcn201_soc +ffffffff8362e000 d dcn21_hubp_funcs +ffffffff8362f000 d dcn30_afmt_funcs +ffffffff83630000 d dcn30_dpp_funcs +ffffffff83630110 d dcn30_dpp_cap +ffffffff83631000 d dcn30_hubp_funcs +ffffffff83632000 d dcn30_tg_funcs +ffffffff83633000 d dcn30_vpg_funcs +ffffffff83634000 d dcn30_tg_funcs +ffffffff83635000 d res_cap_dcn301 +ffffffff83635040 d dcn301_res_pool_funcs +ffffffff83636000 d dcn302_res_pool_funcs +ffffffff83637000 d dcn303_res_pool_funcs +ffffffff83638000 d dcn31_afmt_funcs +ffffffff83639000 d dcn31_apg_funcs +ffffffff8363a000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff8363b000 d dcn31_hubp_funcs +ffffffff8363c000 d dcn31_tg_funcs +ffffffff8363d000 d dcn31_res_pool_funcs +ffffffff8363e000 d dcn31_vpg_funcs +ffffffff8363f000 d dcn314_tg_funcs +ffffffff83640000 d dcn314_res_pool_funcs +ffffffff83641000 d dcn315_res_pool_funcs +ffffffff83642000 d dcn316_res_pool_funcs +ffffffff83643000 d dcn32_dpp_funcs +ffffffff83643110 d dcn32_dpp_cap +ffffffff83644000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff83645000 d dcn32_hubp_funcs +ffffffff83646000 d dcn32_tg_funcs +ffffffff83647000 d dcn32_res_pool_funcs +ffffffff83648000 d dcn321_res_pool_funcs +ffffffff83649000 D dcn1_0_ip +ffffffff836491b8 D dcn1_0_soc +ffffffff8364b000 D dcn2_0_ip +ffffffff8364b1b8 D dcn2_0_nv14_ip +ffffffff8364b370 D dcn2_0_soc +ffffffff8364c6a8 D dcn2_0_nv14_soc +ffffffff8364d9e0 D dcn2_0_nv12_soc +ffffffff8364ed18 D dcn2_1_ip +ffffffff8364eed0 D dcn2_1_soc +ffffffff83650208 D ddr4_wm_table_gs +ffffffff836502c8 D lpddr4_wm_table_gs +ffffffff83650388 D lpddr4_wm_table_with_disabled_ppt +ffffffff83650448 D ddr4_wm_table_rn +ffffffff83650508 D ddr4_1R_wm_table_rn +ffffffff836505c8 D lpddr4_wm_table_rn +ffffffff83651000 D dcn3_0_ip +ffffffff836511b8 D dcn3_0_soc +ffffffff83653000 D dcn3_01_ip +ffffffff836531b8 D dcn3_01_soc +ffffffff836544f0 D ddr4_wm_table +ffffffff836545b0 D lpddr5_wm_table +ffffffff83655000 D dcn3_02_ip +ffffffff836551b8 D dcn3_02_soc +ffffffff83657000 D dcn3_03_ip +ffffffff836571b8 D dcn3_03_soc +ffffffff83659000 D dcn3_1_ip +ffffffff836591b8 D dcn3_15_ip +ffffffff83659370 D dcn3_16_ip +ffffffff83659528 d dcn3_15_soc +ffffffff8365a860 d dcn3_1_soc +ffffffff8365bb98 d dcn3_16_soc +ffffffff8365d000 D dcn3_14_ip +ffffffff8365d1b8 d dcn3_14_soc +ffffffff8365f000 D dcn3_2_ip +ffffffff8365f1b8 D dcn3_2_soc +ffffffff83661000 D dcn3_21_ip +ffffffff836611b8 D dcn3_21_soc +ffffffff83663000 d dsc_policy_max_target_bpp_limit +ffffffff83664000 D DIDTEDCConfig_P12 +ffffffff83664070 d smu7_profiling +ffffffff83665000 d cyan_skillfish_table_map +ffffffff83665080 d cyan_skillfish_message_map +ffffffff83666000 d navi10_table_map +ffffffff83666080 d navi10_pwr_src_map +ffffffff83666090 d navi10_workload_map +ffffffff836660e0 d navi10_message_map +ffffffff83666b60 d navi10_clk_map +ffffffff83666c20 d navi10_feature_mask_map +ffffffff83667000 d sienna_cichlid_table_map +ffffffff83667080 d sienna_cichlid_pwr_src_map +ffffffff83667090 d sienna_cichlid_workload_map +ffffffff836670e0 d sienna_cichlid_message_map +ffffffff83667b60 d sienna_cichlid_clk_map +ffffffff83667c20 d sienna_cichlid_feature_mask_map +ffffffff83668000 d vangogh_message_map +ffffffff83668a80 d vangogh_table_map +ffffffff83668b00 d vangogh_workload_map +ffffffff83668b50 d vangogh_feature_mask_map +ffffffff83669000 d renoir_table_map +ffffffff83669080 d renoir_workload_map +ffffffff836690d0 d renoir_message_map +ffffffff83669b50 d renoir_clk_map +ffffffff8366a000 d smu_v13_0_0_message_map +ffffffff8366aa80 d smu_v13_0_0_feature_mask_map +ffffffff8366ae50 d smu_v13_0_0_table_map +ffffffff8366aed0 d smu_v13_0_0_pwr_src_map +ffffffff8366aee0 d smu_v13_0_0_workload_map +ffffffff8366af30 d smu_v13_0_0_clk_map +ffffffff8366b000 d smu_v13_0_4_table_map +ffffffff8366b080 d smu_v13_0_4_message_map +ffffffff8366bb00 d smu_v13_0_4_feature_mask_map +ffffffff8366c000 d smu_v13_0_5_table_map +ffffffff8366c080 d smu_v13_0_5_message_map +ffffffff8366cb00 d smu_v13_0_5_feature_mask_map +ffffffff8366d000 d smu_v13_0_7_message_map +ffffffff8366da80 d smu_v13_0_7_feature_mask_map +ffffffff8366de50 d smu_v13_0_7_table_map +ffffffff8366ded0 d smu_v13_0_7_pwr_src_map +ffffffff8366dee0 d smu_v13_0_7_workload_map +ffffffff8366df30 d smu_v13_0_7_clk_map +ffffffff8366e000 d yellow_carp_table_map +ffffffff8366e080 d yellow_carp_message_map +ffffffff8366eb00 d yellow_carp_feature_mask_map +ffffffff8366f000 D pci_conf_lock +ffffffff8366f010 D pci_bus_dma_tag +ffffffff8366f088 D msi_pic +ffffffff8366f120 D msix_pic +ffffffff83670000 D pchb_cd +ffffffff83671000 D amas_cd +ffffffff83672000 D cardslot_cd +ffffffff83673000 D cardbus_cd +ffffffff83674000 d csdevs +ffffffff83675000 d ral_rt2560_opns +ffffffff83675028 d ral_rt2661_opns +ffffffff83675050 d ral_rt2860_opns +ffffffff83676000 D pcmcia_cd +ffffffff83677000 D pcmcia_3cxem556_func0 +ffffffff836770b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff83677158 D pcmcia_megahertz_xjem1144_func0 +ffffffff83677210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff836772b0 d pcmcia_3cxem556_func1 +ffffffff83677368 d pcmcia_3cxem556_func1_cfe0 +ffffffff83677408 d pcmcia_megahertz_xjem1144_func1 +ffffffff836774c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff83677560 d pcmcia_sierra_a555_func1 +ffffffff83677618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff836776b8 d pcmcia_sveclancard_func0 +ffffffff83677770 d pcmcia_sveclancard_func0_cfe0 +ffffffff83678000 D ep_pcmcia_prod +ffffffff83679000 D aic_pcmcia_prod +ffffffff8367a000 D com_pcmcia_prod +ffffffff8367b000 D wdc_pcmcia_pr +ffffffff8367c000 D sm_pcmcia_prod +ffffffff8367d000 D xe_cd +ffffffff8367e000 D pcib_cd +ffffffff8367f000 D amdpcib_cd +ffffffff83680000 D tcpcib_cd +ffffffff83681000 D aapic_cd +ffffffff83682000 D hme_cd +ffffffff83683000 D isa_cd +ffffffff83684000 D isadma_cd +ffffffff83685000 D fdc_cd +ffffffff83686000 D fd_types +ffffffff836861f8 D fd_cd +ffffffff83687000 D mpu_cd +ffffffff83688000 D pcppi_cd +ffffffff83689000 D spkr_cd +ffffffff8368a000 D wbsio_cd +ffffffff8368b000 D schsio_cd +ffffffff8368c000 D it_cd +ffffffff8368d000 D uguru_cd +ffffffff8368e000 D aps_cd +ffffffff8368f000 D isa_bus_dma_tag +ffffffff83690000 D wsdisplay_cd +ffffffff83690020 D wsdisplay_cons +ffffffff83690058 D wsdisplay_defaultscreens +ffffffff83691000 D wskbd_cd +ffffffff83691020 D wskbd_default_bell_data +ffffffff83691030 D wskbd_default_keyrepeat_data +ffffffff83691040 D wskbd_srcops +ffffffff83692000 d compose_tab +ffffffff83693000 D wsmouse_cd +ffffffff83693020 D wsmouse_srcops +ffffffff83694000 D wsmux_srcops +ffffffff83694030 D wsmux_tree_lock +ffffffff83695000 D vt100_output +ffffffff83696000 D pckbd_cd +ffffffff83697000 D pms_cd +ffffffff83697020 d synaptics_params +ffffffff83697030 d alps_params +ffffffff83698000 D skgpio_cd +ffffffff83699000 D pctr_conf_lock +ffffffff8369a000 D ukbd_keymapdata +ffffffff8369b000 D usbrev_str +ffffffff8369b030 D usb_cd +ffffffff8369c000 d usbd_ratecheck.errinterval +ffffffff8369d000 D uhub_cd +ffffffff8369e000 D uaudio_cd +ffffffff8369f000 D uvideo_ctrls +ffffffff8369f2d8 D uvideo_cd +ffffffff836a0000 D utvfu_norm_params +ffffffff836a0030 D utvfu_cd +ffffffff836a1000 D udl_reg_vals_640x480_60 +ffffffff836a1020 D udl_reg_vals_640x480_67 +ffffffff836a1040 D udl_reg_vals_640x480_72 +ffffffff836a1060 D udl_reg_vals_640x480_75 +ffffffff836a1080 D udl_reg_vals_800x480_61 +ffffffff836a10a0 D udl_reg_vals_800x600_56 +ffffffff836a10c0 D udl_reg_vals_800x600_60 +ffffffff836a10e0 D udl_reg_vals_800x600_72 +ffffffff836a1100 D udl_reg_vals_800x600_74 +ffffffff836a1120 D udl_reg_vals_800x600_75 +ffffffff836a1140 D udl_reg_vals_1024x768_60 +ffffffff836a1160 D udl_reg_vals_1024x768_70 +ffffffff836a1180 D udl_reg_vals_1024x768_75 +ffffffff836a11a0 D udl_reg_vals_1280x800_60 +ffffffff836a11c0 D udl_reg_vals_1280x960_60 +ffffffff836a11e0 D udl_reg_vals_1280x1024_60 +ffffffff836a1200 D udl_reg_vals_1280x1024_75 +ffffffff836a1220 D udl_reg_vals_1366x768_60 +ffffffff836a1240 D udl_reg_vals_1440x900_60 +ffffffff836a1260 D udl_reg_vals_1440x900_59 +ffffffff836a1280 D udl_reg_vals_1440x900_75 +ffffffff836a12a0 D udl_reg_vals_1680x1050_60 +ffffffff836a12c0 D udl_reg_vals_1600x1200_60 +ffffffff836a12e0 D udl_reg_vals_1920x1080_60 +ffffffff836a1300 D udl_null_key_1 +ffffffff836a1310 D udl_decomp_table +ffffffff836a2510 D udl_cd +ffffffff836a2530 D udl_stdscreen +ffffffff836a2560 D udl_scrlist +ffffffff836a2568 D udl_screenlist +ffffffff836a2578 D udl_accessops +ffffffff836a3000 D umidi_cd +ffffffff836a4000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff836a4020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff836a4040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff836a4060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff836a4080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff836a40a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff836a40c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff836a40e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff836a4100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff836a4120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff836a4140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff836a4160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff836a4180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff836a41a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff836a41c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff836a41e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff836a4200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff836a4220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff836a4240 D umidi_quirklist +ffffffff836a44a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff836a44c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff836a44d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff836a44f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff836a4500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff836a4520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff836a4530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff836a4550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff836a4560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff836a4580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints 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atu_cd +ffffffff836e4020 D atu_devs +ffffffff836e4270 D atu_radfirm +ffffffff836e5000 D ural_cd +ffffffff836e6000 D rum_cd +ffffffff836e7000 D run_cd +ffffffff836e7020 D rt3070_freqs +ffffffff836e8000 D mtw_cd +ffffffff836e9000 D zyd_cd +ffffffff836ea000 D upgt_cd +ffffffff836eb000 D urtw_cd +ffffffff836ec000 D urtwn_cd +ffffffff836ed000 D rsu_cd +ffffffff836ee000 D otus_cd +ffffffff836ee020 d AR_PLCP_HDR_INTR +ffffffff836ef000 D umb_xfer_tout +ffffffff836ef010 D umb_uuid_basic_connect +ffffffff836ef020 D umb_uuid_context_internet +ffffffff836ef030 D umb_uuid_qmi_mbim +ffffffff836ef040 D umb_cd +ffffffff836ef060 D umb_delay +ffffffff836ef070 D umb_qmi_alloc_cid +ffffffff836ef080 D umb_qmi_fcc_auth +ffffffff836f0000 D uath_cd +ffffffff836f1000 D uow_cd +ffffffff836f2000 D uberry_cd +ffffffff836f3000 D upd_cd +ffffffff836f3020 d upd_usage_roots +ffffffff836f30a0 d upd_usage_batdep +ffffffff836f4000 D uwacom_cd +ffffffff836f4020 d uwacom_attach.wacom_report_buf +ffffffff836f5000 D bwfm_usb_bus_ops +ffffffff836f6000 D umstc_cd +ffffffff836f7000 D uhidpp_cd +ffffffff836f8000 D ucc_cd +ffffffff836f9000 D iic_cd +ffffffff836fa000 D probe_addrs_sensor +ffffffff836fa008 D probe_addrs_eeprom +ffffffff836fb000 D lmtemp_cd +ffffffff836fc000 D lmn_worklist +ffffffff836fc240 D lmn_cd +ffffffff836fd000 D lmenv_cd +ffffffff836fe000 D maxtmp_cd +ffffffff836ff000 D adc_cd +ffffffff83700000 D admtemp_cd +ffffffff83701000 D admlc_cd +ffffffff83702000 D admtm_cd +ffffffff83703000 D admtmp_cd +ffffffff83704000 D admtt_cd +ffffffff83705000 D maxds_cd +ffffffff83706000 D adt_chips +ffffffff83706160 D worklist +ffffffff837061a0 D adt_cd +ffffffff83707000 D admcts_cd +ffffffff83708000 D wbng_cd +ffffffff83709000 D nvt_cd +ffffffff8370a000 D adl_worklist +ffffffff8370a138 D adl_cd +ffffffff8370b000 D andl_cd +ffffffff8370c000 D sdtemp_cd +ffffffff8370d000 D lisa_cd +ffffffff8370e000 D ihidev_cd +ffffffff8370f000 D ikbd_cd +ffffffff83710000 D ims_cd +ffffffff83711000 D imt_cd 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dwiic_acpi_found_ihidev.i2c_hid_guid +ffffffff8373c000 D acpicbkbd_cd +ffffffff8373c020 D acpicbkbd_hids +ffffffff8373d000 D acpials_cd +ffffffff8373d020 D acpials_hids +ffffffff8373e000 D tpm_cd +ffffffff8373e020 D tpm_hids +ffffffff8373f000 D acpihve_cd +ffffffff83740000 D acpisbs_cd +ffffffff83740020 D acpisbs_hids +ffffffff83741000 D acpisurface_cd +ffffffff83741020 D acpisurface_hids +ffffffff83742000 D ipmi_acpi_hids +ffffffff83743000 D amdgpio_cd +ffffffff83743020 D amdgpio_hids +ffffffff83744000 D acpihid_cd +ffffffff83744020 D acpihid_hids +ffffffff83744030 d acpihid_guid +ffffffff83745000 d iosf_hids +ffffffff83746000 D intelpmc_cd +ffffffff83746020 D intelpmc_hids +ffffffff83746030 d intelpmc_dsm.lps0_dsm_guid +ffffffff83747000 D acpipci_cd +ffffffff83747020 D acpipci_hids +ffffffff83747040 d acpipci_osc.uuid +ffffffff83748000 D efi_cd +ffffffff83749000 D vmm_cd +ffffffff8374a000 D vmm_hv_signature +ffffffff8374b000 D sdmmc_cd +ffffffff8374c000 D bwfm_sdio_bus_ops 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ecb_pool_initialized +ffffffff83763050 b ecb_pool +ffffffff837631f8 B sdebug +ffffffff83764000 B epic_copy_small +ffffffff83765000 B comconsaddr +ffffffff83765008 B comconsiot +ffffffff83765010 B comconsioh +ffffffff83765018 B comconsfreq +ffffffff8376501c B comcons_reg_width +ffffffff83765020 B commajor +ffffffff83765024 B comconsunit +ffffffff83765028 B comcons_reg_shift +ffffffff8376502c B comconsattached +ffffffff83766000 B pckbc_console +ffffffff83766004 B pckbc_console_attached +ffffffff83766008 B pckbc_consdata +ffffffff837660e0 b pckbc_cons_slotdata +ffffffff83767000 b cy_poll.counter +ffffffff83768000 B atw_xindiv2 +ffffffff83769000 B rtw_rfprog_fallback +ffffffff83769004 B rtw_do_chip_reset +ffffffff8376a000 b malo_cmd_string.cmd_buf +ffffffff8376b000 b iosf_mbi +ffffffff8376c000 B uhcixfer +ffffffff8376d000 B ohcixfer +ffffffff8376d008 b ohci_intr.ohci_intr_tv +ffffffff8376e000 B ehcixfer +ffffffff8376f000 B xhcixfer +ffffffff83770000 B ipmi_enabled +ffffffff83770008 B ipmi_sensor_list +ffffffff83771000 B mpath +ffffffff83772000 B sr_bootuuid +ffffffff83772010 B sr_bootkey +ffffffff83772030 B softraid0 +ffffffff83772038 B sr_hotplug_callbacks +ffffffff83773000 B gf_pow +ffffffff83773300 B gf_map +ffffffff83773b00 B gf_log +ffffffff83774000 b ksym_syms +ffffffff83774008 b ksym_syms_size +ffffffff83775000 B kstat_version +ffffffff83775008 B kstat_id_tree +ffffffff83775010 B kstat_pv_tree +ffffffff83775018 B kstat_nm_tree +ffffffff83775020 b kstat_init.initialized +ffffffff83775028 B kstat_pool +ffffffff83776000 B stat_fbufs_in +ffffffff83776004 B stat_fbufs_wait +ffffffff83776008 B stat_opened_fusedev +ffffffff83776010 B fuse_d_list +ffffffff83777000 B fusefs_fbuf_pool +ffffffff83778000 B pf_state_pl +ffffffff837781a8 B pf_src_tree_pl +ffffffff83778350 B pf_pktdelay_pl +ffffffff837784f8 B pf_status +ffffffff83778700 B tree_id +ffffffff83778708 B tree_src_tracking +ffffffff83778710 B pf_sn_item_pl +ffffffff837788b8 B pf_statetbl +ffffffff837788c0 B pf_state_item_pl +ffffffff83778a68 B pf_state_key_pl +ffffffff83778c10 B pf_purge_states_limit +ffffffff83778c18 B pf_rule_item_pl +ffffffff83778dc0 b pf_purge_expired_states.cur +ffffffff83778dc8 B pf_tcp_secret_init +ffffffff83778dd0 B pf_tcp_secret +ffffffff83778de0 B pf_tcp_secret_ctx +ffffffff83778eb0 B pf_tcp_iss_off +ffffffff83778ec0 B pf_queues +ffffffff83778ee0 B pf_queues_active +ffffffff83778ee8 B pf_queues_inactive +ffffffff83778ef0 B pf_rule_pl +ffffffff83779098 B pf_queue_pl +ffffffff8377a000 B pf_frent_pl +ffffffff8377a1a8 B pf_frnode_pl +ffffffff8377a350 B pf_frag_pl +ffffffff8377a4f8 B pf_state_scrub_pl +ffffffff8377a6a0 B pf_fragqueue +ffffffff8377a6b0 B pf_frag_mtx +ffffffff8377a6c0 B pf_frnode_tree +ffffffff8377b000 B pf_anchors +ffffffff8377b008 B pf_main_anchor +ffffffff8377b510 B pf_anchor_pl +ffffffff8377c000 B pf_ioctl_trans +ffffffff8377c008 B pf_default_rule +ffffffff8377c548 B pf_tag_pl +ffffffff8377c6f0 B pf_default_rule_new +ffffffff8377cc30 B pf_anchor_stack +ffffffff8377cc38 B pf_trans_set +ffffffff8377cc60 B pf_tcount +ffffffff8377e000 B pfr_ktable_pl +ffffffff8377e1b0 B pfr_kentry_pl +ffffffff8377e6a8 B pfr_kcounters_pl +ffffffff8377e850 B pfr_ffaddr +ffffffff8377e860 B pfr_nulltable +ffffffff8377ec88 B pfr_ktables +ffffffff8377ec90 B pfr_ktable_cnt +ffffffff8377ec94 B pfr_mask +ffffffff8377f000 B pf_osfp_list +ffffffff8377f008 B pf_osfp_entry_pl +ffffffff8377f1b0 B pf_osfp_pl +ffffffff83780000 B pfi_all +ffffffff83780008 B pfi_addr_pl +ffffffff837801b0 B pfi_buffer_max +ffffffff837801b8 B pfi_buffer +ffffffff837801c0 B pfi_ifs +ffffffff837801c8 B pfi_buffer_cnt +ffffffff83781000 b pf_syncookie_status +ffffffff83782000 B hfsc_class_pl +ffffffff837821a8 B hfsc_internal_sc_pl +ffffffff83783000 B pflog_ifs +ffffffff83784000 b pfsynccounters +ffffffff83784008 b pfsyncif +ffffffff83784010 b pfsync_deferrals_pool +ffffffff83785000 B pflowif_list +ffffffff83785008 B pflow_counters +ffffffff83786000 B bios +ffffffff83787000 b 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cardsloteventpool +ffffffff83a89000 B rbus_null +ffffffff83a8a000 B pcmcia_verbose +ffffffff83a8b000 B isa_mem_head +ffffffff83a8b008 B isa_dev +ffffffff83a8b010 B isadma_dmam +ffffffff83a8c000 b spkr_attached +ffffffff83a8c008 b ppicookie +ffffffff83a8c010 b spkr_active +ffffffff83a8c018 b spkr_inbuf +ffffffff83a8c020 b octave +ffffffff83a8c024 b whole +ffffffff83a8c028 b fill +ffffffff83a8c02c b value +ffffffff83a8c030 b octtrack +ffffffff83a8c034 b octprefix +ffffffff83a8d000 B it_softc_list +ffffffff83a8e000 B aps_timeout +ffffffff83a8f000 B intrtype +ffffffff83a8f040 B intrhand +ffffffff83a8f0c0 B isa_dma_stats_loads +ffffffff83a8f0c8 B isa_dma_stats_bounces +ffffffff83a8f0d0 B isa_dma_stats_nbouncebufs +ffffffff83a8f0e0 B intrlevel +ffffffff83a90000 B wsdisplay_console_conf +ffffffff83a90028 B wsdisplay_console_initted +ffffffff83a90030 B wsdisplay_console_device +ffffffff83a90038 B wsdisplay_clearonclose +ffffffff83a9003c B wsdisplay_cons_pollmode +ffffffff83a90040 B wsdisplay_cons_kbd_pollc +ffffffff83a90048 B ws_get_param +ffffffff83a90050 B ws_set_param +ffffffff83a91000 b wskbd_console_data +ffffffff83a91040 b wskbd_console_initted +ffffffff83a91048 b wskbd_console_device +ffffffff83a91050 B wskbd_get_backlight +ffffffff83a91058 B wskbd_set_backlight +ffffffff83a91060 b wskbd_cngetc.num +ffffffff83a91064 b wskbd_cngetc.pos +ffffffff83a92000 b compose_tab_inorder +ffffffff83a93000 B nwsmux +ffffffff83a93008 B wsmuxdevs +ffffffff83a94000 B wsemul_vt100_console_emuldata +ffffffff83a95000 B pckbd_consdata +ffffffff83a95038 B pckbd_bell_fn +ffffffff83a95040 B pckbd_bell_fn_arg +ffffffff83a96000 b wscninit.initted +ffffffff83a97000 B pctr_isamd +ffffffff83a97004 B pctr_isintel +ffffffff83a97008 B pctr_intel_cap +ffffffff83a97010 B pctr_fn +ffffffff83a98000 b nvram_initialized +ffffffff83a99000 B hidkbd_is_console +ffffffff83a99008 B hidkbd_bell_fn +ffffffff83a99010 B hidkbd_bell_fn_arg +ffffffff83a9a000 B usb_task_thread_proc +ffffffff83a9a008 B usb_abort_task_thread_proc +ffffffff83a9a010 b usb_nbuses +ffffffff83a9a018 B usbpalock +ffffffff83a9a028 B usb_abort_tasks +ffffffff83a9a038 B usb_explore_tasks +ffffffff83a9a048 B usb_generic_tasks +ffffffff83a9a058 b usb_run_abort_tasks +ffffffff83a9a05c b usb_run_tasks +ffffffff83a9a060 B explore_pending +ffffffff83a9b000 B usb_blk_freelist +ffffffff83a9b008 B usb_blk_nfree +ffffffff83a9b010 B usb_frag_freelist +ffffffff83a9c000 b usbd_errstr.buffer +ffffffff83a9c008 b usb_delay_ms.usb_delay_wchan +ffffffff83a9c010 b usbd_probe_and_attach.cookie +ffffffff83a9d000 b ucom_change +ffffffff83a9d008 b sysctl_ucominit.ucoms +ffffffff83a9d010 b sysctl_ucominit.ucomslen +ffffffff83a9e000 b t_wait +ffffffff83a9e004 b t_trust +ffffffff83a9f000 B umb_session_id +ffffffff83a9f010 b umb_val2descr.sval +ffffffff83aa0000 b probe_ic +ffffffff83aa0008 b probe_addr +ffffffff83aa0010 b probe_val +ffffffff83aa0110 B skip_fc +ffffffff83aa0118 B ignore_addrs +ffffffff83aa0120 b iic_dump.iicvalcnt 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efi_set_variable +ffffffff83af1000 B efi_jmpbuf +ffffffff83af2000 B vm_pool +ffffffff83af21a8 B vcpu_pool +ffffffff83af2350 B vmm_softc +ffffffff83af3000 B l1tf_flush_region +ffffffff83af4000 B sdmmc_verbose +ffffffff83af5000 B utc_offset +ffffffff83af5008 B bufpages +ffffffff83af5010 B utsname +ffffffff83af6000 B mountroot +ffffffff83af7000 B __kernel_bss_end ffffffff83c00000 B _end ffffffff83c00000 B end