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T ieee80211_media2mcs -ffffffff814a03d0 T ieee80211_media2rate -ffffffff814a0420 T ieee80211_mcs2media -ffffffff814a04b0 T ieee80211_watchdog -ffffffff814a05f0 T ieee80211_min_basic_rate -ffffffff814a06f0 T ieee80211_max_basic_rate -ffffffff814a07d0 T ieee80211_next_mode -ffffffff814a08d0 T ieee80211_chan2mode -ffffffff814a0960 T ieee80211_rate2plcp -ffffffff814a0a70 T ieee80211_plcp2rate -ffffffff814a1000 T ieee80211_amrr_node_init -ffffffff814a1040 T ieee80211_amrr_choose -ffffffff814a2000 T ieee80211_crypto_attach -ffffffff814a2090 T ieee80211_set_key -ffffffff814a2150 T ieee80211_delete_key -ffffffff814a21f0 T ieee80211_crypto_detach -ffffffff814a22e0 T ieee80211_crypto_clear_groupkeys -ffffffff814a2450 T ieee80211_cipher_keylen -ffffffff814a24b0 T ieee80211_get_txkey -ffffffff814a2530 T ieee80211_get_rxkey -ffffffff814a2610 T ieee80211_encrypt -ffffffff814a26a0 T ieee80211_decrypt -ffffffff814a2820 T ieee80211_prf -ffffffff814a2980 T ieee80211_kdf -ffffffff814a2b10 T ieee80211_derive_ptk -ffffffff814a2ca0 T ieee80211_derive_pmkid -ffffffff814a2e10 T ieee80211_eapol_key_mic -ffffffff814a2fa0 T ieee80211_eapol_key_check_mic -ffffffff814a3030 T ieee80211_eapol_key_encrypt -ffffffff814a3210 T ieee80211_eapol_key_decrypt -ffffffff814a3350 T ieee80211_pmksa_add -ffffffff814a34c0 T ieee80211_pmksa_find -ffffffff814a4000 T ieee80211_bip_set_key -ffffffff814a4090 T ieee80211_bip_delete_key -ffffffff814a4110 T ieee80211_bip_encap -ffffffff814a4360 T ieee80211_bip_decap -ffffffff814a5000 T ieee80211_ccmp_set_key -ffffffff814a5090 T ieee80211_ccmp_delete_key -ffffffff814a5110 T ieee80211_ccmp_encrypt -ffffffff814a5680 t ieee80211_ccmp_phase1 -ffffffff814a5a20 T ieee80211_ccmp_get_pn -ffffffff814a5b40 T ieee80211_ccmp_decrypt -ffffffff814a7000 T ieee80211_tkip_set_key -ffffffff814a70a0 T ieee80211_tkip_delete_key -ffffffff814a7120 T ieee80211_tkip_mic -ffffffff814a72e0 T ieee80211_tkip_encrypt -ffffffff814a7800 t Phase1 -ffffffff814a7990 t Phase2 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ieee80211_ess_adjust_rssi -ffffffff814b4130 T ieee80211_ess_calculate_score -ffffffff814b42a0 T ieee80211_ess_is_better -ffffffff814b4420 T ieee80211_match_ess -ffffffff814b4520 T ieee80211_switch_ess -ffffffff814b4820 T ieee80211_set_ess -ffffffff814b4b40 T ieee80211_deselect_ess -ffffffff814b4bb0 T ieee80211_node_attach -ffffffff814b4dc0 T ieee80211_node_alloc -ffffffff814b4de0 T ieee80211_node_free -ffffffff814b4eb0 T ieee80211_node_copy -ffffffff814b50c0 T ieee80211_node_getrssi -ffffffff814b50f0 T ieee80211_node_checkrssi -ffffffff814b5180 T ieee80211_set_tim -ffffffff814b51f0 T ieee80211_alloc_node_helper -ffffffff814b5270 T ieee80211_node_lateattach -ffffffff814b5350 T ieee80211_node_detach -ffffffff814b5510 T ieee80211_free_allnodes -ffffffff814b5680 T ieee80211_reset_scan -ffffffff814b5710 T ieee80211_node_raise_inact -ffffffff814b5750 T ieee80211_begin_scan -ffffffff814b5950 T ieee80211_node_cleanup -ffffffff814b5a30 T ieee80211_iterate_nodes -ffffffff814b5ae0 T ieee80211_next_scan -ffffffff814b5c30 T ieee80211_end_scan -ffffffff814b6220 T ieee80211_create_ibss -ffffffff814b6760 T ieee80211_match_bss -ffffffff814b6c10 T ieee80211_node_free_unref_cb -ffffffff814b6c90 T ieee80211_node_tx_stopped -ffffffff814b6db0 T ieee80211_node_switch_bss -ffffffff814b70f0 T ieee80211_node_tx_flushed -ffffffff814b7280 T ieee80211_find_node -ffffffff814b7350 T ieee80211_node_join_bss -ffffffff814b7580 T ieee80211_choose_rsnparams -ffffffff814b76c0 T ieee80211_node_choose_bss -ffffffff814b78e0 T ieee80211_free_node -ffffffff814b7a10 T ieee80211_node_cmp -ffffffff814b7a30 T ieee80211_clean_inactive_nodes -ffffffff814b7b10 T ieee80211_get_rate -ffffffff814b7b70 T ieee80211_ba_del -ffffffff814b7c90 T ieee80211_node_set_timeouts -ffffffff814b7dc0 T ieee80211_node_addba_request_ac_be_to -ffffffff814b7de0 T ieee80211_node_addba_request_ac_bk_to -ffffffff814b7e10 T ieee80211_node_addba_request_ac_vi_to -ffffffff814b7e40 T ieee80211_node_addba_request_ac_vo_to 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ieee80211_node_addba_request -ffffffff814b93a0 T ieee80211_iserp_sta -ffffffff814b9560 T ieee80211_needs_auth -ffffffff814b9590 T ieee80211_node_join_ht -ffffffff814b95e0 T ieee80211_node_join_rsn -ffffffff814b9700 T ieee80211_count_longslotsta -ffffffff814b9750 T ieee80211_count_nonerpsta -ffffffff814b97b0 T ieee80211_count_pssta -ffffffff814b9800 T ieee80211_count_rekeysta -ffffffff814b9850 T ieee80211_node_join_11g -ffffffff814b9a50 T ieee80211_node_join -ffffffff814b9d80 T ieee80211_node_leave_ht -ffffffff814b9ec0 T ieee80211_node_leave_vht -ffffffff814b9f10 T ieee80211_node_leave_rsn -ffffffff814ba080 T ieee80211_node_leave_11g -ffffffff814ba2c0 T ieee80211_node_leave_pwrsave -ffffffff814ba4e0 T ieee80211_ibss_merge -ffffffff814ba890 T ieee80211_notify_dtim -ffffffff814ba990 T ieee80211_ess_cmp -ffffffff814ba9b0 t ieee80211_tree_RBT_COMPARE -ffffffff814ba9d0 t ieee80211_ess_tree_RBT_COMPARE -ffffffff814bb000 T ieee80211_output -ffffffff814bb100 T ieee80211_action_name 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ieee80211_add_htcaps -ffffffff814bcbf0 T ieee80211_add_htop -ffffffff814bccd0 T ieee80211_add_vhtcaps -ffffffff814bcd80 T ieee80211_add_tie -ffffffff814bcdd0 T ieee80211_getmgmt -ffffffff814bcea0 T ieee80211_get_probe_req -ffffffff814bd2e0 T ieee80211_get_probe_resp -ffffffff814bd900 T ieee80211_get_auth -ffffffff814bd9a0 T ieee80211_get_deauth -ffffffff814bda30 T ieee80211_get_assoc_req -ffffffff814bdf70 T ieee80211_get_assoc_resp -ffffffff814be3a0 T ieee80211_get_disassoc -ffffffff814be430 T ieee80211_get_addba_req -ffffffff814be540 T ieee80211_output_ba_move_window -ffffffff814be640 T ieee80211_output_ba_move_window_to_first_unacked -ffffffff814be810 T ieee80211_output_ba_record_ack -ffffffff814be940 T ieee80211_get_addba_resp -ffffffff814bea50 T ieee80211_get_delba -ffffffff814beaf0 T ieee80211_get_sa_query -ffffffff814beb90 T ieee80211_get_action -ffffffff814bee50 T ieee80211_send_mgmt -ffffffff814bf280 T ieee80211_get_rts -ffffffff814bf320 T ieee80211_get_cts_to_self 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ieee80211_send_4way_msg2 -ffffffff814c4600 T ieee80211_send_4way_msg4 -ffffffff814c4800 T ieee80211_send_group_msg2 -ffffffff814c4a00 T ieee80211_send_eapol_key_req -ffffffff814c5000 T ieee80211_proto_attach -ffffffff814c50c0 T ieee80211_newstate -ffffffff814c5f40 T ieee80211_proto_detach -ffffffff814c5f80 T ieee80211_print_essid -ffffffff814c6120 T ieee80211_fix_rate -ffffffff814c6420 T ieee80211_reset_erp -ffffffff814c6550 T ieee80211_set_shortslottime -ffffffff814c65b0 T ieee80211_keyrun -ffffffff814c6730 T ieee80211_setkeys -ffffffff814c69c0 t ieee80211_node_gtk_rekey -ffffffff814c6a30 T ieee80211_setkeysdone -ffffffff814c6b40 T ieee80211_gtk_rekey_timeout -ffffffff814c6bb0 T ieee80211_sa_query_timeout -ffffffff814c6c90 T ieee80211_sa_query_request -ffffffff814c6d20 T ieee80211_ht_negotiate -ffffffff814c6ef0 T ieee80211_vht_negotiate -ffffffff814c7110 T ieee80211_tx_ba_timeout -ffffffff814c7240 T ieee80211_delba_request -ffffffff814c73d0 T ieee80211_rx_ba_timeout -ffffffff814c7470 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etherip_up +ffffffff81420050 T etherip_set_tunnel +ffffffff814201d0 T etherip_get_tunnel +ffffffff81420310 T etherip_del_tunnel +ffffffff81420340 T ip_etherip_input +ffffffff814203b0 T etherip_input +ffffffff81420690 T etherip_find +ffffffff814207b0 T ip6_etherip_input +ffffffff81420840 T etherip_sysctl_etheripstat +ffffffff81420930 T etherip_sysctl +ffffffff81421000 T spppattach +ffffffff81421030 T sppp_input +ffffffff81421440 T sppp_cp_send +ffffffff81421770 T sppp_cp_input +ffffffff81422410 T sppp_pap_input +ffffffff81422b00 T sppp_chap_input +ffffffff81423680 T sppp_output +ffffffff814239b0 T sppp_attach +ffffffff81423cd0 T sppp_keepalive +ffffffff81423f10 T sppp_rtrequest +ffffffff814240d0 T sppp_pap_my_TO +ffffffff814241e0 T sppp_lcp_init +ffffffff81424280 T sppp_ipcp_init +ffffffff81424300 T sppp_ipv6cp_init +ffffffff81424350 T sppp_pap_init +ffffffff81424390 T sppp_chap_init +ffffffff814243d0 T sppp_detach +ffffffff814245f0 T sppp_ipcp_destroy +ffffffff81424640 T sppp_ipv6cp_destroy +ffffffff81424670 T sppp_flush +ffffffff814246b0 T sppp_isempty +ffffffff81424730 T sppp_dequeue +ffffffff814247e0 T sppp_ncp_check +ffffffff81424820 T sppp_ioctl +ffffffff81424ad0 T sppp_get_params +ffffffff81424d60 T sppp_set_params +ffffffff81425170 T sppp_proto_name +ffffffff81425230 T sppp_cp_type_name +ffffffff814252b0 T sppp_print_bytes +ffffffff81425340 T sppp_state_name +ffffffff81425380 T sppp_cp_change_state +ffffffff814254c0 T sppp_up_event +ffffffff814255c0 T sppp_down_event +ffffffff814256f0 T sppp_open_event +ffffffff81425810 T sppp_close_event +ffffffff814259e0 T sppp_increasing_timeout +ffffffff81425a30 T sppp_to_event +ffffffff81425c20 T sppp_lcp_up +ffffffff81425e30 T sppp_lcp_down +ffffffff81425f30 T sppp_lcp_open +ffffffff81425f80 T sppp_lcp_close +ffffffff81425fa0 T sppp_lcp_TO +ffffffff81425fc0 T sppp_lcp_RCR +ffffffff81426880 T sppp_lcp_opt_name +ffffffff81426910 T sppp_lcp_RCN_rej +ffffffff81426b20 T sppp_lcp_RCN_nak +ffffffff81426e00 T sppp_lcp_tlu +ffffffff81427160 T sppp_set_phase +ffffffff81427210 T sppp_lcp_check_and_close +ffffffff81427260 T sppp_lcp_tld +ffffffff814273f0 T sppp_lcp_tls +ffffffff814274b0 T sppp_lcp_tlf +ffffffff81427570 T sppp_lcp_scr +ffffffff814276d0 T sppp_set_ip_addrs +ffffffff81427a10 T sppp_clear_ip_addrs +ffffffff81427cd0 T sppp_ipcp_up +ffffffff81427cf0 T sppp_ipcp_down +ffffffff81427d10 T sppp_ipcp_open +ffffffff81427d30 T sppp_ipcp_close +ffffffff81427d50 T sppp_ipcp_TO +ffffffff81427d70 T sppp_ipcp_RCR +ffffffff81428410 T sppp_ipcp_opt_name +ffffffff814284c0 T sppp_get_ip_addrs +ffffffff81428550 T sppp_dotted_quad +ffffffff814285d0 T sppp_ipcp_RCN_rej +ffffffff814287b0 T sppp_ipcp_RCN_nak +ffffffff81428ae0 T sppp_ipcp_tlu +ffffffff81428b30 T sppp_ipcp_tld +ffffffff81428b60 T sppp_ipcp_tls +ffffffff81428c50 T sppp_ipcp_tlf +ffffffff81428ce0 T sppp_ipcp_scr +ffffffff81428e20 T sppp_update_ip6_addr +ffffffff81428f60 T sppp_ipv6cp_up +ffffffff81428f80 T sppp_ipv6cp_down +ffffffff81428fa0 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sppp_pap_TO +ffffffff8142b6f0 T sppp_pap_tlu +ffffffff8142b950 T sppp_pap_tld +ffffffff8142b9d0 T sppp_pap_scr +ffffffff8142bab0 T sppp_update_gw_walker +ffffffff8142bb20 T sppp_update_gw +ffffffff8142bba0 T sppp_update_dns +ffffffff8142bd20 T sppp_phase_name +ffffffff8142bd60 T sppp_null +ffffffff8142c000 T loop_clone_create +ffffffff8142c1a0 T loop_clone_destroy +ffffffff8142c300 T loopattach +ffffffff8142c330 T lo_bpf_mtap +ffffffff8142c360 T lortrequest +ffffffff8142c3a0 T loioctl +ffffffff8142c460 T loinput +ffffffff8142c500 T looutput +ffffffff8142d000 T ifmedia_init +ffffffff8142d060 T ifmedia_add +ffffffff8142d110 T ifmedia_list_add +ffffffff8142d240 T ifmedia_set +ffffffff8142d560 T ifmedia_get +ffffffff8142d660 T ifmedia_ioctl +ffffffff8142db40 T ifmedia_match +ffffffff8142dc80 T ifmedia_delete_instance +ffffffff8142ddd0 T ifmedia_baudrate +ffffffff8142e000 T ppp_clone_create +ffffffff8142e1f0 T ppp_clone_destroy +ffffffff8142e2e0 T pppattach +ffffffff8142e300 t pppsioctl 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filt_tunmodify +ffffffff81437190 T filt_tunprocess +ffffffff81437250 T filt_tunwdetach +ffffffff81437270 T filt_tunwrite +ffffffff81437320 T tun_clone_create +ffffffff81437340 T tun_clone_destroy +ffffffff81437560 T tap_clone_create +ffffffff81437580 T tunattach +ffffffff814375b0 T tun_create +ffffffff81437970 T tun_name_lookup +ffffffff81437a20 T tun_insert +ffffffff81437b30 T tun_ioctl +ffffffff81437c40 T tun_enqueue +ffffffff81437cf0 T tun_start +ffffffff81437dc0 T tun_input +ffffffff81437e90 T tun_output +ffffffff81437f40 T tunopen +ffffffff81437f60 T tun_dev_open +ffffffff81438200 T tapopen +ffffffff81438220 T tun_link_state +ffffffff81438270 T tunclose +ffffffff81438290 T tun_dev_close +ffffffff81438430 T tapclose +ffffffff81438450 T tun_init +ffffffff814385a0 T tun_wakeup +ffffffff81438630 T tunioctl +ffffffff81438650 T tun_dev_ioctl +ffffffff814389b0 T tapioctl +ffffffff814389d0 T tunread +ffffffff814389f0 T tun_dev_read +ffffffff81438b80 T tapread +ffffffff81438ba0 T tunwrite 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rtm_80211info +ffffffff814657a0 T rtm_proposal +ffffffff81465860 T sysctl_dumpentry +ffffffff81465bf0 T sysctl_iflist +ffffffff81465eb0 T sysctl_ifnames +ffffffff81465fc0 T sysctl_source +ffffffff81466070 T sysctl_rtable +ffffffff814664f0 T sysctl_rtable_rtstat +ffffffff81467000 T sl_compress_init +ffffffff814671c0 T sl_compress_setup +ffffffff81467300 T sl_compress_tcp +ffffffff814678c0 T sl_uncompress_tcp +ffffffff814679a0 T sl_uncompress_tcp_core +ffffffff81468000 T enc_clone_create +ffffffff814682c0 T enc_clone_destroy +ffffffff814683d0 T encattach +ffffffff81468400 T enc_output +ffffffff81468450 T enc_ioctl +ffffffff814684f0 T enc_setif +ffffffff814686b0 T enc_unsetif +ffffffff814687d0 T enc_getif +ffffffff814688b0 T enc_getifa +ffffffff81469000 t gre_clone_create +ffffffff81469230 t gre_clone_destroy +ffffffff81469310 t mgre_clone_create +ffffffff814694a0 t mgre_clone_destroy +ffffffff814695b0 t egre_clone_create +ffffffff81469750 t egre_clone_destroy +ffffffff81469880 t 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aggr_p_dtor +ffffffff8147e290 t aggr_ntt_transmit +ffffffff8147e4e0 t aggr_port_kstat_read +ffffffff8147f000 T tpmrattach +ffffffff8147f020 t tpmr_clone_create +ffffffff8147f1a0 t tpmr_clone_destroy +ffffffff8147f2f0 t tpmr_ioctl +ffffffff8147fab0 t tpmr_output +ffffffff8147fb00 t tpmr_enqueue +ffffffff8147fb50 t tpmr_start +ffffffff8147fb60 t tpmr_up +ffffffff8147fbe0 t tpmr_down +ffffffff8147fc60 t tpmr_p_linkch +ffffffff8147fd60 t tpmr_p_detach +ffffffff8147fdf0 t tpmr_input +ffffffff81480120 t tpmr_p_take +ffffffff81480150 t tpmr_p_rele +ffffffff814801c0 t tpmr_p_ioctl +ffffffff814802f0 t tpmr_p_output +ffffffff81480400 t tpmr_p_dtor +ffffffff81480580 t tpmr_pf +ffffffff81481000 T mpe_clone_create +ffffffff814811c0 T mpe_clone_destroy +ffffffff814812f0 T mpeattach +ffffffff81481310 T mpe_ioctl +ffffffff81481660 T mpe_output +ffffffff81481910 T mpe_start +ffffffff81481ae0 T mpe_input +ffffffff81481cd0 T mpe_set_label +ffffffff81482000 T mpw_clone_create +ffffffff814821b0 T mpw_clone_destroy +ffffffff81482310 T mpwattach +ffffffff81482330 T mpw_ioctl +ffffffff81482c40 T mpw_output +ffffffff81482e90 T mpw_start +ffffffff81483210 T mpw_set_route +ffffffff814832e0 t mpw_set_neighbor +ffffffff814834a0 t mpw_set_label +ffffffff81484000 T mpip_clone_create +ffffffff81484200 T mpip_clone_destroy +ffffffff81484350 T mpipattach +ffffffff81484370 T mpip_ioctl +ffffffff81484aa0 T mpip_output +ffffffff81484ec0 T mpip_start +ffffffff81485250 t mpip_set_route +ffffffff81486000 T bpeattach +ffffffff81486020 T bpe_input +ffffffff81486200 t bpe_tree_RBT_COMPARE +ffffffff81486250 t bpe_clone_create +ffffffff81486470 t bpe_clone_destroy +ffffffff81486540 t bpe_link_hook +ffffffff814865e0 t bpe_detach_hook +ffffffff81486640 t bpe_ioctl +ffffffff81486d50 t bpe_start +ffffffff81486fe0 t bpe_eb_port_eq +ffffffff81487040 t bpe_eb_port_take +ffffffff814870a0 t bpe_eb_port_rele +ffffffff814870c0 t bpe_eb_port_ifname +ffffffff814870e0 t bpe_eb_port_sa +ffffffff81487130 t bpe_down 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pppacclose +ffffffff8148d8c0 t pppx_ifs_RBT_COMPARE +ffffffff8148d8e0 t filt_pppac_rdetach +ffffffff8148d900 t filt_pppac_read +ffffffff8148d9c0 t filt_pppac_modify +ffffffff8148da70 t filt_pppac_process +ffffffff8148db30 t filt_pppac_wdetach +ffffffff8148db50 t filt_pppac_write +ffffffff8148e000 T vxlanattach +ffffffff8148e020 t vxlan_clone_create +ffffffff8148e270 t vxlan_clone_destroy +ffffffff8148e360 t vxlan_detach_hook +ffffffff8148e3c0 t vxlan_send +ffffffff8148e7b0 t vxlan_ioctl +ffffffff8148f650 t vxlan_output +ffffffff8148f700 t vxlan_enqueue +ffffffff8148f780 t vxlan_start +ffffffff8148f7a0 t vxlan_eb_port_eq +ffffffff8148f7f0 t vxlan_eb_port_take +ffffffff8148f850 t vxlan_eb_port_rele +ffffffff8148f870 t vxlan_eb_port_ifname +ffffffff8148f890 t vxlan_eb_port_sa +ffffffff8148f910 t vxlan_down +ffffffff8148fbd0 t vxlan_delmulti +ffffffff8148fc50 t vxlan_tep_del_addr +ffffffff8148fe00 t vxlan_encap_ipv4 +ffffffff8148feb0 t vxlan_send_ipv4 +ffffffff8148ffb0 t vxlan_encap_ipv6 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wg_aip_add +ffffffff81493440 T wg_aip_lookup +ffffffff814934b0 T wg_socket_open +ffffffff81493750 T wg_input +ffffffff81493b70 T wg_socket_close +ffffffff81493be0 T wg_bind +ffffffff81493da0 T wg_unbind +ffffffff81493e40 T wg_send +ffffffff81494010 T wg_send_buf +ffffffff81494180 T wg_tag_get +ffffffff81494280 T wg_timers_run_new_handshake +ffffffff814943c0 T wg_timers_run_send_keepalive +ffffffff81494440 T wg_timers_run_retry_handshake +ffffffff81494660 T wg_timers_run_persistent_keepalive +ffffffff814946b0 T wg_timers_run_zero_key_material +ffffffff81494710 T wg_timers_enable +ffffffff81494790 T wg_timers_set_persistent_keepalive +ffffffff814947f0 T wg_timers_get_persistent_keepalive +ffffffff81494830 T wg_timers_get_last_handshake +ffffffff81494890 T wg_timers_expired_handshake_last_sent +ffffffff81494930 T wg_timers_check_handshake_last_sent +ffffffff81494a30 T wg_timers_event_data_sent +ffffffff81494aa0 T wg_timers_event_data_received +ffffffff81494b00 T wg_timers_event_any_authenticated_packet_sent +ffffffff81494b20 T wg_timers_event_any_authenticated_packet_received +ffffffff81494b40 T wg_timers_event_any_authenticated_packet_traversal +ffffffff81494b90 T wg_timers_event_handshake_initiated +ffffffff81494c00 T wg_timers_event_handshake_responded +ffffffff81494c50 T wg_timers_event_handshake_complete +ffffffff81494d20 T wg_timers_event_session_derived +ffffffff81494d70 T wg_timers_event_want_initiation +ffffffff81494e50 T wg_timers_run_send_initiation +ffffffff81494f10 T wg_timers_event_reset_handshake_last_sent +ffffffff81494f50 T wg_peer_send_buf +ffffffff814950d0 T wg_send_response +ffffffff81495250 T wg_send_cookie +ffffffff81495320 T wg_queue_out +ffffffff814955c0 T wg_handshake +ffffffff81495da0 T wg_index_get +ffffffff81495e50 T wg_handshake_worker +ffffffff81495ed0 T wg_encap +ffffffff81496200 T wg_decap +ffffffff81496680 T wg_encap_worker +ffffffff81496740 T wg_ring_dequeue +ffffffff814967c0 T wg_decap_worker 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T ieee80211_media2mcs +ffffffff814a23d0 T ieee80211_media2rate +ffffffff814a2420 T ieee80211_mcs2media +ffffffff814a24b0 T ieee80211_watchdog +ffffffff814a25f0 T ieee80211_min_basic_rate +ffffffff814a26f0 T ieee80211_max_basic_rate +ffffffff814a27d0 T ieee80211_next_mode +ffffffff814a28d0 T ieee80211_chan2mode +ffffffff814a2960 T ieee80211_rate2plcp +ffffffff814a2a70 T ieee80211_plcp2rate +ffffffff814a3000 T ieee80211_amrr_node_init +ffffffff814a3040 T ieee80211_amrr_choose +ffffffff814a4000 T ieee80211_crypto_attach +ffffffff814a4090 T ieee80211_set_key +ffffffff814a4150 T ieee80211_delete_key +ffffffff814a41f0 T ieee80211_crypto_detach +ffffffff814a42e0 T ieee80211_crypto_clear_groupkeys +ffffffff814a4450 T ieee80211_cipher_keylen +ffffffff814a44b0 T ieee80211_get_txkey +ffffffff814a4530 T ieee80211_get_rxkey +ffffffff814a4610 T ieee80211_encrypt +ffffffff814a46a0 T ieee80211_decrypt +ffffffff814a4820 T ieee80211_prf +ffffffff814a4980 T ieee80211_kdf +ffffffff814a4b10 T ieee80211_derive_ptk +ffffffff814a4ca0 T ieee80211_derive_pmkid +ffffffff814a4e10 T ieee80211_eapol_key_mic +ffffffff814a4fa0 T ieee80211_eapol_key_check_mic +ffffffff814a5030 T ieee80211_eapol_key_encrypt +ffffffff814a5210 T ieee80211_eapol_key_decrypt +ffffffff814a5350 T ieee80211_pmksa_add +ffffffff814a54c0 T ieee80211_pmksa_find +ffffffff814a6000 T ieee80211_bip_set_key +ffffffff814a6090 T ieee80211_bip_delete_key +ffffffff814a6110 T ieee80211_bip_encap +ffffffff814a6360 T ieee80211_bip_decap +ffffffff814a7000 T ieee80211_ccmp_set_key +ffffffff814a7090 T ieee80211_ccmp_delete_key +ffffffff814a7110 T ieee80211_ccmp_encrypt +ffffffff814a7680 t ieee80211_ccmp_phase1 +ffffffff814a7a20 T ieee80211_ccmp_get_pn +ffffffff814a7b40 T ieee80211_ccmp_decrypt +ffffffff814a9000 T ieee80211_tkip_set_key +ffffffff814a90a0 T ieee80211_tkip_delete_key +ffffffff814a9120 T ieee80211_tkip_mic +ffffffff814a92e0 T ieee80211_tkip_encrypt +ffffffff814a9800 t Phase1 +ffffffff814a9990 t Phase2 +ffffffff814a9bd0 T ieee80211_tkip_get_tsc +ffffffff814a9ce0 T ieee80211_tkip_decrypt +ffffffff814aa2b0 T ieee80211_michael_mic_failure +ffffffff814aa490 T ieee80211_michael_mic_failure_timeout +ffffffff814aa4c0 t ieee80211_tkip_deauth +ffffffff814ab000 T ieee80211_wep_set_key +ffffffff814ab070 T ieee80211_wep_delete_key +ffffffff814ab0f0 T ieee80211_wep_encrypt +ffffffff814ab560 T ieee80211_wep_decrypt +ffffffff814ac000 T ieee80211_get_hdrlen +ffffffff814ac090 T ieee80211_input_hwdecrypt +ffffffff814ac290 T ieee80211_inputm +ffffffff814ace80 T ieee80211_input_ba +ffffffff814ad190 T ieee80211_amsdu_decap +ffffffff814ad4b0 T ieee80211_decap +ffffffff814ad660 T ieee80211_recv_pspoll +ffffffff814ad7a0 T ieee80211_recv_bar +ffffffff814ad890 T ieee80211_input +ffffffff814ad910 T ieee80211_ba_move_window +ffffffff814ada70 T ieee80211_input_ba_seq +ffffffff814adc10 T ieee80211_input_ba_flush +ffffffff814add40 T ieee80211_input_ba_gap_skip +ffffffff814adde0 T ieee80211_input_ba_gap_timeout +ffffffff814adf20 T ieee80211_enqueue_data +ffffffff814ae120 T ieee80211_amsdu_decap_validate +ffffffff814ae1f0 T ieee80211_parse_edca_params_body +ffffffff814ae360 T ieee80211_parse_edca_params +ffffffff814ae3c0 T ieee80211_parse_wmm_params +ffffffff814ae420 T ieee80211_parse_rsn_cipher +ffffffff814ae4e0 T ieee80211_parse_rsn_akm +ffffffff814ae5a0 T ieee80211_parse_rsn_body +ffffffff814ae860 T ieee80211_parse_rsn +ffffffff814ae8b0 T ieee80211_parse_wpa +ffffffff814ae910 T ieee80211_save_ie +ffffffff814ae9e0 T ieee80211_recv_probe_resp +ffffffff814af7e0 T ieee80211_recv_probe_req +ffffffff814afad0 T ieee80211_recv_auth +ffffffff814afb70 T ieee80211_recv_assoc_req +ffffffff814b0580 T ieee80211_recv_assoc_resp +ffffffff814b0b90 T ieee80211_recv_deauth +ffffffff814b0d10 T ieee80211_recv_disassoc +ffffffff814b0e30 T ieee80211_recv_addba_req +ffffffff814b1220 T ieee80211_addba_req_refuse +ffffffff814b12c0 T ieee80211_addba_req_accept +ffffffff814b1350 T ieee80211_recv_addba_resp +ffffffff814b14b0 T ieee80211_addba_resp_refuse +ffffffff814b14f0 T ieee80211_addba_resp_accept +ffffffff814b1570 T ieee80211_recv_delba +ffffffff814b1720 T ieee80211_recv_sa_query_req +ffffffff814b1790 T ieee80211_recv_sa_query_resp +ffffffff814b1810 T ieee80211_recv_action +ffffffff814b1950 T ieee80211_recv_mgmt +ffffffff814b1aa0 T ieee80211_bar_tid +ffffffff814b2000 T ieee80211_node2req +ffffffff814b23c0 T ieee80211_req2node +ffffffff814b24f0 T ieee80211_disable_wep +ffffffff814b2620 T ieee80211_disable_rsn +ffffffff814b2690 T ieee80211_ioctl +ffffffff814b3d60 t ieee80211_ioctl_setnwkeys +ffffffff814b3f70 t ieee80211_ioctl_setwpaparms +ffffffff814b5000 T ieee80211_inact_timeout +ffffffff814b50d0 T ieee80211_node_cache_timeout +ffffffff814b5110 T ieee80211_clean_nodes +ffffffff814b5470 T ieee80211_print_ess +ffffffff814b56c0 T ieee80211_print_ess_list +ffffffff814b5750 T ieee80211_get_ess +ffffffff814b57f0 T ieee80211_del_ess +ffffffff814b5960 T ieee80211_add_ess +ffffffff814b60c0 T ieee80211_ess_adjust_rssi +ffffffff814b6130 T ieee80211_ess_calculate_score +ffffffff814b62a0 T ieee80211_ess_is_better +ffffffff814b6420 T ieee80211_match_ess +ffffffff814b6520 T ieee80211_switch_ess +ffffffff814b6820 T ieee80211_set_ess +ffffffff814b6b40 T ieee80211_deselect_ess +ffffffff814b6bb0 T ieee80211_node_attach +ffffffff814b6dc0 T ieee80211_node_alloc +ffffffff814b6de0 T ieee80211_node_free +ffffffff814b6eb0 T ieee80211_node_copy +ffffffff814b70c0 T ieee80211_node_getrssi +ffffffff814b70f0 T ieee80211_node_checkrssi +ffffffff814b7180 T ieee80211_set_tim +ffffffff814b71f0 T ieee80211_alloc_node_helper +ffffffff814b7270 T ieee80211_node_lateattach +ffffffff814b7350 T ieee80211_node_detach +ffffffff814b7510 T ieee80211_free_allnodes +ffffffff814b7680 T ieee80211_reset_scan +ffffffff814b7710 T ieee80211_node_raise_inact +ffffffff814b7750 T ieee80211_begin_scan +ffffffff814b7950 T ieee80211_node_cleanup +ffffffff814b7a30 T ieee80211_iterate_nodes +ffffffff814b7ae0 T ieee80211_next_scan +ffffffff814b7c30 T ieee80211_end_scan +ffffffff814b8220 T ieee80211_create_ibss +ffffffff814b8760 T ieee80211_match_bss +ffffffff814b8c10 T ieee80211_node_free_unref_cb +ffffffff814b8c90 T ieee80211_node_tx_stopped +ffffffff814b8db0 T ieee80211_node_switch_bss +ffffffff814b90f0 T ieee80211_node_tx_flushed +ffffffff814b9280 T ieee80211_find_node +ffffffff814b9350 T ieee80211_node_join_bss +ffffffff814b9580 T ieee80211_choose_rsnparams +ffffffff814b96c0 T ieee80211_node_choose_bss +ffffffff814b98e0 T ieee80211_free_node +ffffffff814b9a10 T ieee80211_node_cmp +ffffffff814b9a30 T ieee80211_clean_inactive_nodes +ffffffff814b9b10 T ieee80211_get_rate +ffffffff814b9b70 T ieee80211_ba_del +ffffffff814b9c90 T ieee80211_node_set_timeouts +ffffffff814b9dc0 T ieee80211_node_addba_request_ac_be_to +ffffffff814b9de0 T ieee80211_node_addba_request_ac_bk_to +ffffffff814b9e10 T ieee80211_node_addba_request_ac_vi_to +ffffffff814b9e40 T ieee80211_node_addba_request_ac_vo_to +ffffffff814b9e70 T ieee80211_setup_node +ffffffff814ba050 T ieee80211_alloc_node +ffffffff814ba110 T ieee80211_dup_bss +ffffffff814ba200 T ieee80211_find_txnode +ffffffff814ba460 T ieee80211_find_rxnode +ffffffff814ba7f0 T ieee80211_node_tx_ba_clear +ffffffff814ba870 T ieee80211_release_node +ffffffff814ba920 T ieee80211_clean_cached +ffffffff814ba9e0 T ieee80211_node_leave +ffffffff814bac60 T ieee80211_setup_htcaps +ffffffff814bad10 T ieee80211_clear_htcaps +ffffffff814bad90 T ieee80211_40mhz_valid_secondary_above +ffffffff814bae20 T ieee80211_40mhz_valid_secondary_below +ffffffff814baea0 T ieee80211_40mhz_center_freq_valid +ffffffff814baf00 T ieee80211_setup_htop +ffffffff814baff0 T ieee80211_setup_vhtcaps +ffffffff814bb070 T ieee80211_80mhz_center_freq_valid +ffffffff814bb0e0 T ieee80211_setup_vhtop +ffffffff814bb1e0 T ieee80211_clear_vhtcaps +ffffffff814bb230 T ieee80211_setup_rates +ffffffff814bb310 T ieee80211_node_trigger_addba_req +ffffffff814bb370 T ieee80211_node_addba_request +ffffffff814bb3a0 T ieee80211_iserp_sta +ffffffff814bb560 T ieee80211_needs_auth +ffffffff814bb590 T ieee80211_node_join_ht +ffffffff814bb5e0 T ieee80211_node_join_rsn +ffffffff814bb700 T ieee80211_count_longslotsta +ffffffff814bb750 T ieee80211_count_nonerpsta +ffffffff814bb7b0 T ieee80211_count_pssta +ffffffff814bb800 T ieee80211_count_rekeysta +ffffffff814bb850 T ieee80211_node_join_11g +ffffffff814bba50 T ieee80211_node_join +ffffffff814bbd80 T ieee80211_node_leave_ht +ffffffff814bbec0 T ieee80211_node_leave_vht +ffffffff814bbf10 T ieee80211_node_leave_rsn +ffffffff814bc080 T ieee80211_node_leave_11g +ffffffff814bc2c0 T ieee80211_node_leave_pwrsave +ffffffff814bc4e0 T ieee80211_ibss_merge +ffffffff814bc890 T ieee80211_notify_dtim +ffffffff814bc990 T ieee80211_ess_cmp +ffffffff814bc9b0 t ieee80211_tree_RBT_COMPARE +ffffffff814bc9d0 t ieee80211_ess_tree_RBT_COMPARE +ffffffff814bd000 T ieee80211_output +ffffffff814bd100 T ieee80211_action_name +ffffffff814bd150 T ieee80211_mgmt_output +ffffffff814bd400 T ieee80211_pwrsave +ffffffff814bd550 T ieee80211_up_to_ac +ffffffff814bd610 T ieee80211_classify +ffffffff814bd720 T ieee80211_can_use_ampdu +ffffffff814bd780 T ieee80211_tx_compressed_bar +ffffffff814bd8e0 T ieee80211_get_compressed_bar +ffffffff814bd9d0 T ieee80211_encap +ffffffff814bdec0 T ieee80211_add_capinfo +ffffffff814bdf50 T ieee80211_add_ssid +ffffffff814bdfc0 T ieee80211_add_rates +ffffffff814be040 T ieee80211_add_ds_params +ffffffff814be0a0 T ieee80211_add_tim +ffffffff814be1f0 T ieee80211_add_ibss_params +ffffffff814be220 T ieee80211_add_edca_params +ffffffff814be3b0 T ieee80211_add_erp +ffffffff814be460 T ieee80211_add_qos_capability +ffffffff814be4a0 T ieee80211_add_wme_info +ffffffff814be4e0 T ieee80211_add_wme_param +ffffffff814be680 T ieee80211_add_rsn_body +ffffffff814be9a0 T ieee80211_add_rsn +ffffffff814bea10 T ieee80211_add_wpa +ffffffff814bea80 T ieee80211_add_xrates +ffffffff814beb10 T ieee80211_add_htcaps +ffffffff814bebf0 T ieee80211_add_htop +ffffffff814becd0 T ieee80211_add_vhtcaps +ffffffff814bed80 T ieee80211_add_tie +ffffffff814bedd0 T ieee80211_getmgmt +ffffffff814beea0 T ieee80211_get_probe_req +ffffffff814bf2e0 T ieee80211_get_probe_resp +ffffffff814bf900 T ieee80211_get_auth +ffffffff814bf9a0 T ieee80211_get_deauth +ffffffff814bfa30 T ieee80211_get_assoc_req +ffffffff814bff70 T ieee80211_get_assoc_resp +ffffffff814c03a0 T ieee80211_get_disassoc +ffffffff814c0430 T ieee80211_get_addba_req +ffffffff814c0540 T ieee80211_output_ba_move_window +ffffffff814c0640 T ieee80211_output_ba_move_window_to_first_unacked +ffffffff814c0810 T ieee80211_output_ba_record_ack +ffffffff814c0940 T ieee80211_get_addba_resp +ffffffff814c0a50 T ieee80211_get_delba +ffffffff814c0af0 T ieee80211_get_sa_query +ffffffff814c0b90 T ieee80211_get_action +ffffffff814c0e50 T ieee80211_send_mgmt +ffffffff814c1280 T ieee80211_get_rts +ffffffff814c1320 T ieee80211_get_cts_to_self +ffffffff814c13b0 T ieee80211_beacon_alloc +ffffffff814c2000 T ieee80211_eapol_key_input +ffffffff814c2270 T ieee80211_recv_eapol_key_req +ffffffff814c23d0 T ieee80211_recv_4way_msg3 +ffffffff814c2e50 T ieee80211_recv_4way_msg2or4 +ffffffff814c2fb0 T ieee80211_recv_4way_msg1 +ffffffff814c32c0 T ieee80211_recv_wpa_group_msg1 +ffffffff814c3620 T ieee80211_recv_rsn_group_msg1 +ffffffff814c3bb0 T ieee80211_recv_group_msg2 +ffffffff814c3d30 T ieee80211_recv_4way_msg2 +ffffffff814c3f70 T ieee80211_must_update_group_key +ffffffff814c3fe0 T ieee80211_recv_4way_msg4 +ffffffff814c5000 T ieee80211_send_eapol_key +ffffffff814c5210 T ieee80211_eapol_timeout +ffffffff814c52a0 T ieee80211_send_4way_msg1 +ffffffff814c55b0 T ieee80211_send_4way_msg3 +ffffffff814c5b70 T ieee80211_send_group_msg1 +ffffffff814c60f0 T ieee80211_add_gtk_kde +ffffffff814c61b0 T ieee80211_add_pmkid_kde +ffffffff814c6200 T ieee80211_add_igtk_kde +ffffffff814c62d0 T ieee80211_get_eapol_key +ffffffff814c63a0 T ieee80211_send_4way_msg2 +ffffffff814c6600 T ieee80211_send_4way_msg4 +ffffffff814c6800 T ieee80211_send_group_msg2 +ffffffff814c6a00 T ieee80211_send_eapol_key_req +ffffffff814c7000 T ieee80211_proto_attach +ffffffff814c70c0 T ieee80211_newstate +ffffffff814c7f40 T ieee80211_proto_detach +ffffffff814c7f80 T ieee80211_print_essid +ffffffff814c8120 T ieee80211_fix_rate +ffffffff814c8420 T ieee80211_reset_erp +ffffffff814c8550 T ieee80211_set_shortslottime +ffffffff814c85b0 T ieee80211_keyrun +ffffffff814c8730 T ieee80211_setkeys +ffffffff814c89c0 t ieee80211_node_gtk_rekey +ffffffff814c8a30 T ieee80211_setkeysdone +ffffffff814c8b40 T ieee80211_gtk_rekey_timeout +ffffffff814c8bb0 T ieee80211_sa_query_timeout +ffffffff814c8c90 T ieee80211_sa_query_request +ffffffff814c8d20 T ieee80211_ht_negotiate +ffffffff814c8ef0 T ieee80211_vht_negotiate +ffffffff814c9110 T ieee80211_tx_ba_timeout +ffffffff814c9240 T ieee80211_delba_request +ffffffff814c93d0 T ieee80211_rx_ba_timeout +ffffffff814c9470 T ieee80211_addba_request +ffffffff814c9670 T ieee80211_auth_open_confirm +ffffffff814c9740 T ieee80211_try_another_bss +ffffffff814c9880 T ieee80211_auth_open +ffffffff814c9bd0 T ieee80211_set_beacon_miss_threshold +ffffffff814c9c60 T ieee80211_stop_ampdu_tx +ffffffff814c9d80 T ieee80211_check_wpa_supplicant_failure +ffffffff814c9e00 T ieee80211_set_link_state +ffffffff814c9e90 T ieee80211_rtm_80211info_task +ffffffff814ca000 T ieee80211_ra_get_ht_rateset +ffffffff814ca090 T ieee80211_ra_use_ht_sgi +ffffffff814ca110 T ieee80211_ra_get_txrate +ffffffff814ca1b0 T ieee80211_ra_next_lower_intra_rate +ffffffff814ca340 T ieee80211_ra_next_intra_rate +ffffffff814ca4c0 T ieee80211_ra_next_rateset +ffffffff814ca6d0 T ieee80211_ra_best_mcs_in_rateset +ffffffff814ca750 T ieee80211_ra_probe_next_rateset +ffffffff814caa20 T ieee80211_ra_next_mcs +ffffffff814caa70 T ieee80211_ra_probe_clear +ffffffff814caab0 T ieee80211_ra_probe_done +ffffffff814caaf0 T ieee80211_ra_intra_mode_ra_finished +ffffffff814caea0 T ieee80211_ra_trigger_next_rateset +ffffffff814caf20 T ieee80211_ra_inter_mode_ra_finished +ffffffff814caf50 T ieee80211_ra_best_rate +ffffffff814caff0 T ieee80211_ra_probe_next_rate +ffffffff814cb0a0 T ieee80211_ra_valid_tx_mcs +ffffffff814cb120 T ieee80211_ra_valid_rates +ffffffff814cb1f0 T ieee80211_ra_probe_valid +ffffffff814cb240 T ieee80211_ra_add_stats_ht +ffffffff814cb4d0 T ieee80211_ra_choose +ffffffff814cb950 T ieee80211_ra_node_init +ffffffff814cc000 T ieee80211_ra_vht_get_rateset +ffffffff814cc0b0 T ieee80211_ra_vht_use_sgi +ffffffff814cc1a0 T ieee80211_ra_vht_get_txrate +ffffffff814cc250 T ieee80211_ra_vht_next_lower_intra_rate +ffffffff814cc290 T ieee80211_ra_vht_get_max_mcs +ffffffff814cc320 T ieee80211_ra_vht_next_intra_rate +ffffffff814cc410 T ieee80211_ra_vht_next_rateset +ffffffff814cc610 T ieee80211_ra_vht_best_mcs_in_rateset +ffffffff814cc6b0 T ieee80211_ra_vht_probe_next_rateset +ffffffff814cca50 T ieee80211_ra_vht_next_mcs +ffffffff814ccae0 T ieee80211_ra_vht_probe_clear +ffffffff814ccb10 T ieee80211_ra_vht_probe_done +ffffffff814ccb60 T ieee80211_ra_vht_intra_mode_ra_finished +ffffffff814cd020 T ieee80211_ra_vht_trigger_next_rateset +ffffffff814cd0a0 T ieee80211_ra_vht_inter_mode_ra_finished +ffffffff814cd0d0 T ieee80211_ra_vht_best_rate +ffffffff814cd440 T ieee80211_ra_vht_probe_next_rate +ffffffff814cd500 T ieee80211_ra_vht_init_valid_rates +ffffffff814cd710 T ieee80211_ra_vht_probe_valid +ffffffff814cd760 T ieee80211_ra_vht_add_stats +ffffffff814cdbb0 T ieee80211_ra_vht_choose +ffffffff814ce0c0 T ieee80211_ra_vht_node_init +ffffffff814cf000 T ieee80211_rssadapt_choose +ffffffff814cf0e0 T ieee80211_rssadapt_updatestats +ffffffff814cf170 T ieee80211_rssadapt_input +ffffffff814cf1b0 T ieee80211_rssadapt_lower_rate +ffffffff814cf230 T ieee80211_rssadapt_raise_rate +ffffffff814d0000 T bsearch +ffffffff814d00c0 T ieee80211_regdomain_compare_cn +ffffffff814d00e0 T ieee80211_regdomain_compare_rn +ffffffff814d0100 T ieee80211_name2countrycode +ffffffff814d01b0 T ieee80211_name2regdomain +ffffffff814d0260 T ieee80211_countrycode2name +ffffffff814d02f0 T ieee80211_regdomain2name +ffffffff814d0370 T ieee80211_regdomain2flag +ffffffff814d0430 T ieee80211_countrycode2regdomain +ffffffff814d1000 T arptimer +ffffffff814d1090 T arptfree +ffffffff814d11a0 T arpinit +ffffffff814d1230 T arp_rtrequest +ffffffff814d1700 T arprequest +ffffffff814d1850 T arpinvalidate +ffffffff814d18c0 T arpreply +ffffffff814d19c0 T arpresolve +ffffffff814d1f00 T arppullup +ffffffff814d1fc0 T arpinput +ffffffff814d2020 T arpintr +ffffffff814d2100 T in_arpinput +ffffffff814d2600 T arplookup +ffffffff814d2700 T arpcache +ffffffff814d2b40 T arpproxy +ffffffff814d2c50 T revarpinput +ffffffff814d2cb0 T in_revarpinput +ffffffff814d2d80 T revarprequest +ffffffff814d2ed0 T revarpwhoarewe +ffffffff814d30e0 T revarpwhoami +ffffffff814d4000 T igmp_init +ffffffff814d40a0 T rti_fill +ffffffff814d4170 T rti_find +ffffffff814d4270 T rti_delete +ffffffff814d4300 T igmp_input +ffffffff814d4410 T igmp_input_if +ffffffff814d4c10 T igmp_joingroup +ffffffff814d4d60 T igmp_sendpkt +ffffffff814d4f00 T igmp_leavegroup +ffffffff814d4f80 T igmp_fasttimo +ffffffff814d5030 T igmp_checktimer +ffffffff814d5130 T igmp_slowtimo +ffffffff814d51a0 T igmp_sysctl +ffffffff814d52c0 T igmp_sysctl_igmpstat +ffffffff814d6000 T in_canforward +ffffffff814d6060 T in_socktrim +ffffffff814d60c0 T in_mask2len +ffffffff814d61b0 T in_len2mask +ffffffff814d6270 T in_nam2sin +ffffffff814d62d0 T in_sa2sin +ffffffff814d6310 T in_control +ffffffff814d6350 T in_ioctl +ffffffff814d66f0 T in_ioctl_get +ffffffff814d6870 T in_ioctl_set_ifaddr +ffffffff814d6ab0 T in_ioctl_change_ifaddr +ffffffff814d6f00 T in_scrubhost +ffffffff814d6f30 T in_addhost +ffffffff814d6f60 T in_ifscrub +ffffffff814d7010 T in_ifinit +ffffffff814d7300 T in_purgeaddr +ffffffff814d7440 T in_remove_prefix +ffffffff814d74c0 T in_insert_prefix +ffffffff814d7550 T in_addmulti +ffffffff814d7740 T in_delmulti +ffffffff814d78d0 T in_broadcast +ffffffff814d7970 T in_hasmulti +ffffffff814d7a20 T in_ifdetach +ffffffff814d7ac0 T in_prefixlen2mask +ffffffff814d8000 T in_init +ffffffff814d8060 T in_pcbhash +ffffffff814d81b0 T in_pcblhash +ffffffff814d8270 T in_pcbinit +ffffffff814d8350 T in_baddynamic +ffffffff814d83c0 T in_rootonly +ffffffff814d8440 T in_pcballoc +ffffffff814d85f0 T in_pcbresize +ffffffff814d87f0 T in_pcbhash_insert +ffffffff814d89e0 T in_pcbbind_locked +ffffffff814d8d20 T in_pcbaddrisavail_lock +ffffffff814d8fa0 T in_pcbpickport +ffffffff814d9200 T in_pcbrehash +ffffffff814d9270 T in_pcbbind +ffffffff814d9310 T in_pcblookup_local_lock +ffffffff814d9710 T in_pcbunref +ffffffff814d9800 T in_pcbaddrisavail +ffffffff814d9820 T in_pcbconnect +ffffffff814d9a80 T in_pcbselsrc +ffffffff814d9ca0 T in_pcblookup_lock +ffffffff814d9ea0 T in_pcbdisconnect +ffffffff814d9f20 T in_pcbdetach +ffffffff814da0b0 T in_pcbref +ffffffff814da100 T in_setsockaddr +ffffffff814da170 T in_setpeeraddr +ffffffff814da1e0 T in_sockaddr +ffffffff814da260 T in_peeraddr +ffffffff814da2e0 T in_pcbnotifyall +ffffffff814da4a0 T in_losing +ffffffff814da540 T in_rtchange +ffffffff814da590 T in_pcbrtentry +ffffffff814da600 T in_pcbhash_lookup +ffffffff814da7a0 T in_pcblookup +ffffffff814da7f0 T in_pcblookup_listen +ffffffff814daa70 T in_pcbset_rtableid +ffffffff814dab70 T in_pcbset_laddr +ffffffff814dacc0 T in_pcbunset_faddr +ffffffff814dada0 T in_pcbunset_laddr +ffffffff814db000 T inet_nat64_mask +ffffffff814db060 T inet_nat64 +ffffffff814db200 T inet_nat64_inet +ffffffff814db2c0 T inet_nat64_inet6 +ffffffff814db3a0 T inet_nat46 +ffffffff814db450 T inet_nat46_inet +ffffffff814db4b0 T inet_nat46_inet6 +ffffffff814dc000 T inet_ntop +ffffffff814dc0e0 t inet_ntop6 +ffffffff814dc670 T sockaddr_ntop +ffffffff814dd000 T divert_attach +ffffffff814dd0a0 T divert_detach +ffffffff814dd100 T divert_bind +ffffffff814dd150 T divert_shutdown +ffffffff814dd1b0 T divert_send +ffffffff814dd200 T divert_init +ffffffff814dd270 T divert_output +ffffffff814dd510 T divert_packet +ffffffff814dd810 T divert_sysctl_divstat +ffffffff814dd8d0 T divert_sysctl +ffffffff814de000 T icmp_init +ffffffff814de090 T icmp_mtudisc_timeout +ffffffff814de1b0 T icmp_do_error +ffffffff814de520 T icmp_ratelimit +ffffffff814de580 T icmp_error +ffffffff814de620 T icmp_reflect +ffffffff814de9b0 T icmp_send +ffffffff814deaa0 T icmp_input +ffffffff814deb60 T icmp_input_if +ffffffff814df4d0 T iptime +ffffffff814df570 T icmp_sysctl +ffffffff814df770 T icmp_sysctl_icmpstat +ffffffff814df880 T icmp_mtudisc_clone +ffffffff814dfa70 T icmp_mtudisc +ffffffff814dfc60 T icmp_do_exthdr +ffffffff814e0000 T ip_randomid +ffffffff814e1000 T ip_init +ffffffff814e12f0 T ip_ours +ffffffff814e1440 T ip_fragcheck +ffffffff814e17b0 T ip_deliver +ffffffff814e1b80 T ipintr +ffffffff814e1cd0 T ipv4_input +ffffffff814e1d50 T ip_input_if +ffffffff814e2280 T ipv4_check +ffffffff814e2590 T ip_dooptions +ffffffff814e2c50 T in_ouraddr +ffffffff814e2f20 T ip_forward +ffffffff814e33d0 T ip_flush +ffffffff814e34f0 T ip_reass +ffffffff814e3b40 T ip_freef +ffffffff814e3c60 t carp_strict_addr_chk +ffffffff814e3ce0 T ip_slowtimo +ffffffff814e3d70 T save_rte +ffffffff814e3e60 T ip_srcroute +ffffffff814e3fe0 T ip_stripoptions +ffffffff814e4080 T ip_sysctl +ffffffff814e4510 T ip_sysctl_ipstat +ffffffff814e4790 T ip_savecontrol +ffffffff814e4a10 T ip_send_do_dispatch +ffffffff814e4b40 T ip_send +ffffffff814e4b90 T ip_send_raw +ffffffff814e4be0 t ip_send_dispatch +ffffffff814e4c00 t ip_sendraw_dispatch +ffffffff814e5000 T mfc_find +ffffffff814e50e0 T ip_mrouter_set +ffffffff814e5260 T ip_mrouter_init +ffffffff814e52e0 T ip_mrouter_done +ffffffff814e5560 T add_vif +ffffffff814e57a0 T del_vif +ffffffff814e5920 T add_mfc +ffffffff814e5af0 T del_mfc +ffffffff814e5cd0 T set_api_config +ffffffff814e5d70 T ip_mrouter_get +ffffffff814e5e20 T get_version +ffffffff814e5e60 T get_api_support +ffffffff814e5eb0 T get_api_config +ffffffff814e5f00 T mrt_ioctl +ffffffff814e6070 T get_vif_cnt +ffffffff814e6100 T get_sg_cnt +ffffffff814e6250 T if_lookupbyvif +ffffffff814e62b0 T mrt_sysctl_vif +ffffffff814e6430 T mrt_rtwalk_mfcsysctl +ffffffff814e6580 T mrt_sysctl_mfc +ffffffff814e66f0 T mrouter_rtwalk_delete +ffffffff814e6730 T mrt_mcast_del +ffffffff814e67f0 T vif_delete +ffffffff814e68c0 T mfc_expire_route +ffffffff814e69d0 T mfc_add_route +ffffffff814e6ba0 T rt_mcast_add +ffffffff814e6d00 T update_mfc_params +ffffffff814e7060 T mfc_add +ffffffff814e7170 T socket_send +ffffffff814e7250 T ip_mforward +ffffffff814e7520 T ip_mdq +ffffffff814e8000 T ip_output +ffffffff814e8ad0 T ip_insertoptions +ffffffff814e8c90 T ip_output_ipsec_lookup +ffffffff814e8e30 T in_proto_cksum_out +ffffffff814e9110 T ip_mloopback +ffffffff814e9210 T ip_output_ipsec_send +ffffffff814e95d0 T ip_fragment +ffffffff814e9a80 T ip_output_ipsec_pmtu_update +ffffffff814e9ba0 T ip_optcopy +ffffffff814e9ce0 T in_hdr_cksum_out +ffffffff814e9dc0 T ip_ctloutput +ffffffff814ea670 T ip_pcbopts +ffffffff814ea8d0 T ip_setmoptions +ffffffff814eaef0 T ip_getmoptions +ffffffff814eb060 T ip_multicast_if +ffffffff814eb160 T ip_freemoptions +ffffffff814eb200 T in_ifcap_cksum +ffffffff814eb260 T in_delayed_cksum +ffffffff814ec000 T rip_attach +ffffffff814ec120 T rip_detach +ffffffff814ec1b0 T rip_bind +ffffffff814ec2c0 T rip_connect +ffffffff814ec380 T rip_disconnect +ffffffff814ec420 T rip_shutdown +ffffffff814ec480 T rip_send +ffffffff814ec590 T rip_init +ffffffff814ec5b0 T rip_input +ffffffff814eca40 T rip_output +ffffffff814ecc60 T rip_chkhdr +ffffffff814ecd70 T rip_ctloutput +ffffffff814ed000 T tcp_trace +ffffffff814ee000 T tcp_reass +ffffffff814ee3e0 t tcpstat_pkt +ffffffff814ee440 T tcp_flush_queue +ffffffff814ee600 T tcp_input +ffffffff814f1cf0 T syn_cache_reset +ffffffff814f1ea0 T syn_cache_get +ffffffff814f26f0 T syn_cache_add +ffffffff814f2ec0 T tcp_del_sackholes +ffffffff814f2f90 T tcp_dooptions +ffffffff814f34e0 T tcp_xmit_timer +ffffffff814f3630 t sb_notify +ffffffff814f36c0 t sbspace +ffffffff814f3770 T tcp_clean_sackreport +ffffffff814f37f0 T tcp_mss +ffffffff814f3a90 T tcp_sack_partialack +ffffffff814f3b50 T tcp_newreno_partialack +ffffffff814f3c50 T tcp_seq_subtract +ffffffff814f3c80 T tcp_pulloutofband +ffffffff814f3d50 T tcp_update_sack_list +ffffffff814f4210 T tcp_sack_option +ffffffff814f4750 T tcp_hdrsz +ffffffff814f47c0 T tcp_mss_update +ffffffff814f4920 T tcp_mss_adv +ffffffff814f49f0 T syn_cache_rm +ffffffff814f4b90 T syn_cache_put +ffffffff814f4c20 T syn_cache_init +ffffffff814f4d50 T syn_cache_insert +ffffffff814f5390 T syn_cache_timer +ffffffff814f5610 T syn_cache_respond +ffffffff814f5cc0 T syn_cache_cleanup +ffffffff814f5e30 T syn_cache_lookup +ffffffff814f60c0 T syn_cache_unreach +ffffffff814f7000 T tcp_sack_output +ffffffff814f7080 T tcp_sack_adjust +ffffffff814f7100 T tcp_output +ffffffff814f8f10 T tcp_setpersist +ffffffff814f9000 T tcp_chopper +ffffffff814f95c0 T tcp_if_output_tso +ffffffff814fa000 T tcp_init +ffffffff814fa220 T tcp6_mtudisc_callback +ffffffff814fa290 T tcp_template +ffffffff814fa410 T tcp_respond +ffffffff814fa930 T tcp_newtcpcb +ffffffff814faba0 T tcp_drop +ffffffff814faca0 T tcp_close +ffffffff814fae20 T tcp_freeq +ffffffff814faee0 T tcp_rscale +ffffffff814fafb0 T tcp_notify +ffffffff814fb070 T tcp6_ctlinput +ffffffff814fb2f0 T tcp_ctlinput +ffffffff814fb630 T tcp_mtudisc +ffffffff814fb760 T tcp_mtudisc_increase +ffffffff814fb7e0 T tcp_set_iss_tsm +ffffffff814fb9a0 T tcp_signature_tdb_attach +ffffffff814fb9d0 T tcp_signature_tdb_init +ffffffff814fba80 T tcp_signature_tdb_zeroize +ffffffff814fbb10 T tcp_signature_tdb_input +ffffffff814fbb70 T tcp_signature_tdb_output +ffffffff814fbbc0 T tcp_signature_apply +ffffffff814fbc10 T tcp_signature +ffffffff814fc000 T tcp_timer_rexmt +ffffffff814fc590 T tcp_timer_persist +ffffffff814fc790 T tcp_timer_keep +ffffffff814fca10 T tcp_timer_2msl +ffffffff814fcba0 T tcp_timer_reaper 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ahd_aic790X_setup -ffffffff8176e000 T adw_pci_match -ffffffff8176e030 T adw_pci_attach -ffffffff8176f000 T AdwInitFromEEPROM -ffffffff8176f680 T AdwGetEEPROMConfig -ffffffff8176f930 T AdwReadEEPWord -ffffffff8176fa00 T AdwSetEEPROMConfig -ffffffff8176fda0 T AdwInitDriver -ffffffff81770bb0 T AdwRamSelfTest -ffffffff81770de0 T AdwLoadMCode -ffffffff817712b0 T AdwASC3550Cabling -ffffffff81771450 T AdwASC38C0800Cabling -ffffffff817715f0 T AdwASC38C1600Cabling -ffffffff81771750 T AdwResetCCB -ffffffff81771800 T AdwSleepMilliSecond -ffffffff81771820 T AdwWaitEEPCmd -ffffffff817718a0 T AdwExeScsiQueue -ffffffff81771a20 T AdwResetChip -ffffffff81771a90 T AdwSendIdleCmd -ffffffff81771cd0 T AdwDelayMicroSecond -ffffffff81771cf0 T AdwResetSCSIBus -ffffffff81772130 T AdwISR -ffffffff817723a0 T AdwInquiryHandling -ffffffff81773000 T AdwInitCarriers -ffffffff81774000 T twe_pci_match -ffffffff81774030 T twe_pci_attach -ffffffff81775000 T arc_match -ffffffff817750a0 T arc_attach -ffffffff81775340 T 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vmxnet3_intr_intx -ffffffff819adc90 T vmxnet3_intr_queue -ffffffff819add30 T vmxnet3_dma_init -ffffffff819ae170 T vmxnet3_ioctl -ffffffff819ae450 T vmxnet3_start -ffffffff819ae870 T vmxnet3_watchdog -ffffffff819ae8e0 T vmxnet3_media_change -ffffffff819ae910 T vmxnet3_media_status -ffffffff819aea30 T vmxnet3_link_state -ffffffff819aeb10 T vmxnet3_dma_allocmem -ffffffff819aecb0 T vmxnet3_alloc_txring -ffffffff819aee90 T vmxnet3_alloc_rxring -ffffffff819af220 t vmx_dmamem_alloc -ffffffff819af3b0 T vmxnet3_rxfill_tick -ffffffff819af430 T vmxnet3_txinit -ffffffff819af540 T vmxnet3_rxfill -ffffffff819af8a0 T vmxnet3_rxinit -ffffffff819afa90 T vmxnet3_txstop -ffffffff819afbb0 T vmxnet3_rxstop -ffffffff819afd60 T vmxnet3_enable_all_intrs -ffffffff819afe40 T vmxnet3_disable_all_intrs -ffffffff819aff20 T vmxnet3_evintr -ffffffff819b0120 T vmxnet3_rxintr -ffffffff819b05c0 T vmxnet3_txintr -ffffffff819b07b0 T vmxnet3_init -ffffffff819b0c20 T vmxnet3_rx_offload -ffffffff819b0df0 T vmxnet3_iff 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lii_eeprom_present -ffffffff819b5bc0 T lii_eeprom_read -ffffffff819b5bf0 T lii_spi_read -ffffffff819b5f90 T lii_read_macaddr -ffffffff819b6120 T lii_intr -ffffffff819b6250 T lii_alloc_rings -ffffffff819b64b0 T lii_tick -ffffffff819b6520 T lii_mii_readreg -ffffffff819b6880 T lii_mii_writereg -ffffffff819b6be0 T lii_mii_statchg -ffffffff819b6c60 T lii_media_change -ffffffff819b6cb0 T lii_media_status -ffffffff819b6d20 T lii_ioctl -ffffffff819b6f00 T lii_start -ffffffff819b7100 T lii_watchdog -ffffffff819b7150 T lii_stop -ffffffff819b71e0 T lii_init -ffffffff819b7830 T lii_iff -ffffffff819b79a0 T lii_tx_put -ffffffff819b7ad0 T lii_free_tx_space -ffffffff819b7b10 T lii_rxintr -ffffffff819b7cf0 T lii_txintr -ffffffff819b8000 T ichiic_match -ffffffff819b8030 T ichiic_attach -ffffffff819b8280 T ichiic_intr -ffffffff819b83c0 T ichiic_i2c_acquire_bus -ffffffff819b8420 T ichiic_i2c_release_bus -ffffffff819b8470 T ichiic_i2c_exec -ffffffff819b9000 T viapm_match -ffffffff819b9030 T viapm_attach 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bwfm_pci_buscore_write -ffffffff819ca0f0 T bwfm_pci_buscore_prepare -ffffffff819ca120 T bwfm_pci_buscore_reset -ffffffff819ca390 T bwfm_pci_buscore_activate -ffffffff819ca3c0 T bwfm_pci_preinit -ffffffff819cb410 T bwfm_pci_stop -ffffffff819cb4b0 T bwfm_pci_txcheck -ffffffff819cb570 T bwfm_pci_txdata -ffffffff819cb910 T bwfm_pci_msgbuf_query_dcmd -ffffffff819cbdd0 T bwfm_pci_msgbuf_set_dcmd -ffffffff819cbe20 T bwfm_pci_match -ffffffff819cbe50 T bwfm_pci_attach -ffffffff819cc170 T bwfm_pci_detach -ffffffff819cc1d0 T bwfm_pci_activate -ffffffff819cc3f0 T bwfm_pci_intr -ffffffff819cc6b0 T bwfm_pci_select_core -ffffffff819cc7a0 T bwfm_pci_load_microcode -ffffffff819ccd00 T bwfm_pci_dmamem_alloc -ffffffff819ccee0 T bwfm_pci_setup_ring -ffffffff819cd120 T bwfm_pci_intr_enable -ffffffff819cd170 T bwfm_pci_hostready -ffffffff819cd1e0 T bwfm_pci_fill_rx_rings -ffffffff819cd240 T bwfm_pci_dmamem_free -ffffffff819cd2d0 T bwfm_pci_cleanup -ffffffff819cdb60 T bwfm_pci_send_mb_data -ffffffff819cdcb0 T bwfm_pci_intmask -ffffffff819cdcf0 T bwfm_pci_pktid_avail -ffffffff819cdd70 T bwfm_pci_pktid_new -ffffffff819cdef0 T bwfm_pci_pktid_free -ffffffff819cdfb0 T bwfm_pci_fill_rx_buf_ring -ffffffff819ce340 T bwfm_pci_fill_rx_ioctl_ring -ffffffff819ce700 T bwfm_pci_ring_write_reserve -ffffffff819ce800 T bwfm_pci_ring_write_cancel -ffffffff819ce840 T bwfm_pci_ring_write_commit -ffffffff819ce930 T bwfm_pci_ring_write_rptr -ffffffff819ce9b0 T bwfm_pci_ring_write_wptr -ffffffff819cea30 T bwfm_pci_setup_flowring -ffffffff819ceba0 T bwfm_pci_ring_bell -ffffffff819cebe0 T bwfm_pci_ring_update_rptr -ffffffff819cec90 T bwfm_pci_ring_update_wptr -ffffffff819ced40 T bwfm_pci_ring_write_reserve_multi -ffffffff819cee60 T bwfm_pci_ring_read_avail -ffffffff819cef70 T bwfm_pci_ring_read_commit -ffffffff819cf000 T bwfm_pci_ring_rx -ffffffff819cf230 T bwfm_pci_msg_rx -ffffffff819cf8d0 T bwfm_pci_flowring_delete_cb -ffffffff819cf9a0 T bwfm_pci_msgbuf_rxioctl -ffffffff819cfaa0 T bwfm_pci_intr_status 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nv_init_doorbell_index -ffffffff820861d0 t nv_need_reset_on_init -ffffffff82086280 t nv_pre_asic_init -ffffffff820862b0 t nv_update_umd_stable_pstate -ffffffff82086380 t nv_query_video_codecs -ffffffff82087000 T psp_v10_0_set_psp_funcs -ffffffff82087030 t psp_v10_0_init_microcode -ffffffff82087120 t psp_v10_0_ring_create -ffffffff82087510 t psp_v10_0_ring_stop -ffffffff820877c0 t psp_v10_0_ring_destroy -ffffffff82087850 t psp_v10_0_mode1_reset -ffffffff820878a0 t psp_v10_0_ring_get_wptr -ffffffff82087900 t psp_v10_0_ring_set_wptr -ffffffff82088000 T psp_v11_0_set_psp_funcs -ffffffff82088030 t psp_v11_0_init_microcode -ffffffff820881e0 t psp_v11_0_bootloader_load_kdb -ffffffff82088200 t psp_v11_0_bootloader_load_spl -ffffffff82088220 t psp_v11_0_bootloader_load_sysdrv -ffffffff82088240 t psp_v11_0_bootloader_load_sos -ffffffff82088690 t psp_v11_0_ring_create -ffffffff82088f10 t psp_v11_0_ring_stop -ffffffff820891f0 t psp_v11_0_ring_destroy -ffffffff82089280 t psp_v11_0_mode1_reset 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psp_v12_0_mode1_reset -ffffffff8208db10 t psp_v12_0_ring_get_wptr -ffffffff8208db80 t psp_v12_0_ring_set_wptr -ffffffff8208e000 T psp_v13_0_set_psp_funcs -ffffffff8208e030 t psp_v13_0_init_microcode -ffffffff8208e160 t psp_v13_0_wait_for_bootloader_steady_state -ffffffff8208e290 t psp_v13_0_bootloader_load_kdb -ffffffff8208e2b0 t psp_v13_0_bootloader_load_spl -ffffffff8208e2d0 t psp_v13_0_bootloader_load_sysdrv -ffffffff8208e2f0 t psp_v13_0_bootloader_load_soc_drv -ffffffff8208e310 t psp_v13_0_bootloader_load_intf_drv -ffffffff8208e330 t psp_v13_0_bootloader_load_dbg_drv -ffffffff8208e350 t psp_v13_0_bootloader_load_ras_drv -ffffffff8208e370 t psp_v13_0_bootloader_load_sos -ffffffff8208e830 t psp_v13_0_ring_create -ffffffff8208f0b0 t psp_v13_0_ring_stop -ffffffff8208f5b0 t psp_v13_0_ring_destroy -ffffffff8208f640 t psp_v13_0_memory_training -ffffffff8208fb20 t psp_v13_0_ring_get_wptr -ffffffff8208fb90 t psp_v13_0_ring_set_wptr -ffffffff8208fca0 t psp_v13_0_load_usbc_pd_fw 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sdma_v2_4_set_trap_irq_state -ffffffff82097c60 t sdma_v2_4_process_trap_irq -ffffffff82097d00 t sdma_v2_4_process_illegal_inst_irq -ffffffff82097d80 t sdma_v2_4_enable -ffffffff82098000 t sdma_v3_0_early_init -ffffffff82098100 t sdma_v3_0_sw_init -ffffffff82098530 t sdma_v3_0_sw_fini -ffffffff82098600 t sdma_v3_0_hw_init -ffffffff82098770 t sdma_v3_0_hw_fini -ffffffff820987d0 t sdma_v3_0_suspend -ffffffff82098830 t sdma_v3_0_resume -ffffffff82098840 t sdma_v3_0_is_idle -ffffffff82098890 t sdma_v3_0_wait_for_idle -ffffffff82098940 t sdma_v3_0_check_soft_reset -ffffffff820989a0 t sdma_v3_0_pre_soft_reset -ffffffff82098a00 t sdma_v3_0_soft_reset -ffffffff82098b00 t sdma_v3_0_post_soft_reset -ffffffff82098b50 t sdma_v3_0_set_clockgating_state -ffffffff82098e00 t sdma_v3_0_set_powergating_state -ffffffff82098e30 t sdma_v3_0_get_clockgating_state -ffffffff82098ed0 t sdma_v3_0_ring_get_rptr -ffffffff82098f10 t sdma_v3_0_ring_get_wptr -ffffffff82098f90 t sdma_v3_0_ring_set_wptr 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sdma_v4_0_early_init -ffffffff8209c2f0 t sdma_v4_0_late_init -ffffffff8209c5b0 t sdma_v4_0_sw_init -ffffffff8209ca60 t sdma_v4_0_sw_fini -ffffffff8209cb30 t sdma_v4_0_hw_init -ffffffff8209fcf0 t sdma_v4_0_hw_fini -ffffffff8209fdf0 t sdma_v4_0_suspend -ffffffff8209fe50 t sdma_v4_0_resume -ffffffff8209fee0 t sdma_v4_0_is_idle -ffffffff820a0010 t sdma_v4_0_wait_for_idle -ffffffff820a01c0 t sdma_v4_0_soft_reset -ffffffff820a01f0 t sdma_v4_0_set_clockgating_state -ffffffff820a0720 t sdma_v4_0_set_powergating_state -ffffffff820a0800 t sdma_v4_0_get_clockgating_state -ffffffff820a08b0 t sdma_v4_0_query_ras_error_count -ffffffff820a0aa0 t sdma_v4_0_reset_ras_error_count -ffffffff820a0c20 t sdma_v4_0_ring_get_rptr -ffffffff820a0c80 t sdma_v4_0_ring_get_wptr -ffffffff820a0e90 t sdma_v4_0_ring_set_wptr -ffffffff820a1140 t sdma_v4_0_ring_emit_ib -ffffffff820a1420 t sdma_v4_0_ring_emit_fence -ffffffff820a1890 t sdma_v4_0_ring_emit_pipeline_sync -ffffffff820a18f0 t sdma_v4_0_ring_emit_vm_flush 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sdma_v4_0_process_doorbell_invalid_irq -ffffffff820a35c0 t sdma_v4_0_process_pool_timeout_irq -ffffffff820a3610 t sdma_v4_0_process_srbm_write_irq -ffffffff820a3660 t sdma_v4_0_process_ras_data_cb -ffffffff820a36e0 t sdma_v4_0_ctx_switch_enable -ffffffff820a3e00 t sdma_v4_0_enable -ffffffff820a43f0 t sdma_v4_0_gfx_enable -ffffffff820a5000 t sdma_v4_4_query_ras_error_count -ffffffff820a52b0 t sdma_v4_4_reset_ras_error_count -ffffffff820a6000 t sdma_v4_4_2_early_init -ffffffff820a62b0 t sdma_v4_4_2_late_init -ffffffff820a6340 t sdma_v4_4_2_sw_init -ffffffff820a6920 t sdma_v4_4_2_sw_fini -ffffffff820a69f0 t sdma_v4_4_2_hw_init -ffffffff820a6a40 t sdma_v4_4_2_hw_fini -ffffffff820a6b20 t sdma_v4_4_2_suspend -ffffffff820a6c30 t sdma_v4_4_2_resume -ffffffff820a6c80 t sdma_v4_4_2_is_idle -ffffffff820a6d30 t sdma_v4_4_2_wait_for_idle -ffffffff820a6e60 t sdma_v4_4_2_soft_reset -ffffffff820a6e90 t sdma_v4_4_2_set_clockgating_state -ffffffff820a7350 t sdma_v4_4_2_set_powergating_state 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sdma_v4_4_2_emit_copy_buffer -ffffffff820a91f0 t sdma_v4_4_2_emit_fill_buffer -ffffffff820a9280 t sdma_v4_4_2_vm_copy_pte -ffffffff820a9340 t sdma_v4_4_2_vm_write_pte -ffffffff820a9410 t sdma_v4_4_2_vm_set_pte_pde -ffffffff820a9510 t sdma_v4_4_2_set_trap_irq_state -ffffffff820a9610 t sdma_v4_4_2_process_trap_irq -ffffffff820a9740 t sdma_v4_4_2_process_illegal_inst_irq -ffffffff820a97e0 t sdma_v4_4_2_set_ecc_irq_state -ffffffff820a98f0 t sdma_v4_4_2_process_vm_hole_irq -ffffffff820a99e0 t sdma_v4_4_2_process_doorbell_invalid_irq -ffffffff820a9ad0 t sdma_v4_4_2_process_pool_timeout_irq -ffffffff820a9bc0 t sdma_v4_4_2_process_srbm_write_irq -ffffffff820a9cb0 t sdma_v4_4_2_query_ras_error_count -ffffffff820a9e30 t sdma_v4_4_2_reset_ras_error_count -ffffffff820a9fa0 t sdma_v4_4_2_inst_init_golden_registers -ffffffff820aa170 t sdma_v4_4_2_inst_start -ffffffff820ab9a0 t sdma_v4_4_2_inst_ctx_switch_enable -ffffffff820abcf0 t sdma_v4_4_2_inst_enable -ffffffff820ad000 t sdma_v5_0_early_init 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sdma_v5_0_ring_insert_nop -ffffffff820b0a80 t sdma_v5_0_ring_pad_ib -ffffffff820b0bb0 t sdma_v5_0_ring_init_cond_exec -ffffffff820b0e00 t sdma_v5_0_ring_patch_cond_exec -ffffffff820b0ec0 t sdma_v5_0_ring_emit_wreg -ffffffff820b1020 t sdma_v5_0_ring_emit_reg_wait -ffffffff820b12c0 t sdma_v5_0_ring_emit_reg_write_reg_wait -ffffffff820b1350 t sdma_v5_0_ring_preempt_ib -ffffffff820b14e0 t sdma_v5_0_ring_emit_mem_sync -ffffffff820b1710 t sdma_v5_0_emit_copy_buffer -ffffffff820b17d0 t sdma_v5_0_emit_fill_buffer -ffffffff820b1860 t sdma_v5_0_vm_copy_pte -ffffffff820b1920 t sdma_v5_0_vm_write_pte -ffffffff820b19f0 t sdma_v5_0_vm_set_pte_pde -ffffffff820b1af0 t sdma_v5_0_set_trap_irq_state -ffffffff820b1b90 t sdma_v5_0_process_trap_irq -ffffffff820b1cd0 t sdma_v5_0_process_illegal_inst_irq -ffffffff820b1d00 t sdma_v5_0_mqd_init -ffffffff820b1df0 t sdma_v5_0_ctx_switch_enable -ffffffff820b2170 t sdma_v5_0_enable -ffffffff820b3000 t sdma_v5_2_early_init -ffffffff820b3130 t sdma_v5_2_sw_init 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sdma_v5_2_ring_pad_ib -ffffffff820b7880 t sdma_v5_2_ring_init_cond_exec -ffffffff820b7ad0 t sdma_v5_2_ring_patch_cond_exec -ffffffff820b7b90 t sdma_v5_2_ring_begin_use -ffffffff820b7bb0 t sdma_v5_2_ring_end_use -ffffffff820b7bd0 t sdma_v5_2_ring_emit_wreg -ffffffff820b7d30 t sdma_v5_2_ring_emit_reg_wait -ffffffff820b7fd0 t sdma_v5_2_ring_emit_reg_write_reg_wait -ffffffff820b8060 t sdma_v5_2_ring_preempt_ib -ffffffff820b8220 t sdma_v5_2_ring_emit_mem_sync -ffffffff820b8450 t sdma_v5_2_emit_copy_buffer -ffffffff820b8510 t sdma_v5_2_emit_fill_buffer -ffffffff820b85a0 t sdma_v5_2_vm_copy_pte -ffffffff820b8660 t sdma_v5_2_vm_write_pte -ffffffff820b8730 t sdma_v5_2_vm_set_pte_pde -ffffffff820b8830 t sdma_v5_2_set_trap_irq_state -ffffffff820b88f0 t sdma_v5_2_process_trap_irq -ffffffff820b8a60 t sdma_v5_2_process_illegal_inst_irq -ffffffff820b8a90 t sdma_v5_2_mqd_init -ffffffff820b8b80 t sdma_v5_2_ctx_switch_enable -ffffffff820b8fd0 t sdma_v5_2_enable -ffffffff820ba000 t sdma_v6_0_early_init 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sdma_v6_0_ring_test_ib -ffffffff820bc970 t sdma_v6_0_ring_insert_nop -ffffffff820bcab0 t sdma_v6_0_ring_pad_ib -ffffffff820bcbe0 t sdma_v6_0_ring_init_cond_exec -ffffffff820bce30 t sdma_v6_0_ring_patch_cond_exec -ffffffff820bcef0 t sdma_v6_0_ring_emit_wreg -ffffffff820bd050 t sdma_v6_0_ring_emit_reg_wait -ffffffff820bd2f0 t sdma_v6_0_ring_emit_reg_write_reg_wait -ffffffff820bd380 t sdma_v6_0_ring_preempt_ib -ffffffff820bd510 t sdma_v6_0_ring_emit_mem_sync -ffffffff820bd740 t sdma_v6_0_emit_copy_buffer -ffffffff820bd800 t sdma_v6_0_emit_fill_buffer -ffffffff820bd890 t sdma_v6_0_vm_copy_pte -ffffffff820bd950 t sdma_v6_0_vm_write_pte -ffffffff820bda20 t sdma_v6_0_vm_set_pte_pde -ffffffff820bdb20 t sdma_v6_0_set_trap_irq_state -ffffffff820bdbc0 t sdma_v6_0_process_trap_irq -ffffffff820bdd20 t sdma_v6_0_process_illegal_inst_irq -ffffffff820bdd50 t sdma_v6_0_mqd_init -ffffffff820bde80 t sdma_v6_0_start -ffffffff820be1e0 t sdma_v6_0_enable -ffffffff820be380 t sdma_v6_0_gfx_resume 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smu_v13_0_10_mode2_prepare_hwcontext -ffffffff820c33a0 t smu_v13_0_10_mode2_perform_reset -ffffffff820c3430 t smu_v13_0_10_mode2_restore_hwcontext -ffffffff820c3820 t smu_v13_0_10_mode2_reset -ffffffff820c4000 t smuio_v11_0_get_rom_index_offset -ffffffff820c4040 t smuio_v11_0_get_rom_data_offset -ffffffff820c4080 t smuio_v11_0_update_rom_clock_gating -ffffffff820c41d0 t smuio_v11_0_get_clock_gating_state -ffffffff820c5000 t smuio_v11_0_6_get_rom_index_offset -ffffffff820c5040 t smuio_v11_0_6_get_rom_data_offset -ffffffff820c5080 t smuio_v11_0_6_update_rom_clock_gating -ffffffff820c51e0 t smuio_v11_0_6_get_clock_gating_state -ffffffff820c6000 t smuio_v13_0_get_rom_index_offset -ffffffff820c6040 t smuio_v13_0_get_rom_data_offset -ffffffff820c6080 t smuio_v13_0_update_rom_clock_gating -ffffffff820c61e0 t smuio_v13_0_get_clock_gating_state -ffffffff820c6290 t smuio_v13_0_get_die_id -ffffffff820c6320 t smuio_v13_0_get_socket_id -ffffffff820c63c0 t smuio_v13_0_is_host_gpu_xgmi_supported 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soc15_common_wait_for_idle -ffffffff820cac60 t soc15_common_soft_reset -ffffffff820cac90 t soc15_common_set_clockgating_state -ffffffff820cb040 t soc15_common_set_powergating_state -ffffffff820cb070 t soc15_common_get_clockgating_state -ffffffff820cb1b0 t soc15_uvd_ctx_rreg -ffffffff820cb280 t soc15_uvd_ctx_wreg -ffffffff820cb320 t soc15_didt_rreg -ffffffff820cb3e0 t soc15_didt_wreg -ffffffff820cb480 t soc15_gc_cac_rreg -ffffffff820cb5d0 t soc15_gc_cac_wreg -ffffffff820cb710 t soc15_se_cac_rreg -ffffffff820cb860 t soc15_se_cac_wreg -ffffffff820cb9a0 t soc15_read_disabled_bios -ffffffff820cb9d0 t soc15_read_register -ffffffff820cbae0 t soc15_asic_reset -ffffffff820cbcb0 t soc15_asic_reset_method -ffffffff820cbe80 t soc15_get_xclk -ffffffff820cbef0 t soc15_set_uvd_clocks -ffffffff820cbf20 t soc15_set_vce_clocks -ffffffff820cbf50 t soc15_get_config_memsize -ffffffff820cbf70 t soc15_need_full_reset -ffffffff820cbfa0 t soc15_get_pcie_usage -ffffffff820cc110 t soc15_need_reset_on_init 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t uvd_v5_0_set_interrupt_state -ffffffff820d6b60 t uvd_v5_0_process_interrupt -ffffffff820d6bd0 t uvd_v5_0_stop -ffffffff820d6d50 t uvd_v5_0_start -ffffffff820d8000 t uvd_v6_0_early_init -ffffffff820d8190 t uvd_v6_0_sw_init -ffffffff820d8450 t uvd_v6_0_sw_fini -ffffffff820d8520 t uvd_v6_0_hw_init -ffffffff820d8b90 t uvd_v6_0_hw_fini -ffffffff820d8c20 t uvd_v6_0_suspend -ffffffff820d8d60 t uvd_v6_0_resume -ffffffff820d8dc0 t uvd_v6_0_is_idle -ffffffff820d8e10 t uvd_v6_0_wait_for_idle -ffffffff820d8ea0 t uvd_v6_0_check_soft_reset -ffffffff820d8f30 t uvd_v6_0_pre_soft_reset -ffffffff820d8f80 t uvd_v6_0_soft_reset -ffffffff820d9080 t uvd_v6_0_post_soft_reset -ffffffff820d9150 t uvd_v6_0_set_clockgating_state -ffffffff820d9340 t uvd_v6_0_set_powergating_state -ffffffff820d93c0 t uvd_v6_0_get_clockgating_state -ffffffff820d9470 t uvd_v6_0_ring_get_rptr -ffffffff820d94c0 t uvd_v6_0_ring_get_wptr -ffffffff820d9510 t uvd_v6_0_ring_set_wptr -ffffffff820d9540 t uvd_v6_0_ring_emit_ib -ffffffff820d98e0 t uvd_v6_0_ring_emit_fence -ffffffff820d9f00 t uvd_v6_0_ring_emit_pipeline_sync -ffffffff820da340 t uvd_v6_0_ring_emit_vm_flush -ffffffff820da6e0 t uvd_v6_0_ring_emit_hdp_flush -ffffffff820da710 t uvd_v6_0_ring_test_ring -ffffffff820da8e0 t uvd_v6_0_ring_insert_nop -ffffffff820daa40 t uvd_v6_0_ring_emit_wreg -ffffffff820dacf0 t uvd_v6_0_enc_ring_get_rptr -ffffffff820dad50 t uvd_v6_0_enc_ring_get_wptr -ffffffff820dadb0 t uvd_v6_0_enc_ring_set_wptr -ffffffff820dadf0 t uvd_v6_0_enc_ring_emit_ib -ffffffff820db060 t uvd_v6_0_enc_ring_emit_fence -ffffffff820db2c0 t uvd_v6_0_enc_ring_emit_pipeline_sync -ffffffff820db490 t uvd_v6_0_enc_ring_emit_vm_flush -ffffffff820db6c0 t uvd_v6_0_enc_ring_test_ring -ffffffff820db830 t uvd_v6_0_enc_ring_test_ib -ffffffff820dbd90 t uvd_v6_0_enc_ring_insert_end -ffffffff820dbe20 t uvd_v6_0_set_interrupt_state -ffffffff820dbe50 t uvd_v6_0_process_interrupt -ffffffff820dbf50 t uvd_v6_0_stop -ffffffff820dc0d0 t uvd_v6_0_start -ffffffff820dd000 t uvd_v7_0_early_init -ffffffff820dd290 t uvd_v7_0_sw_init -ffffffff820dd720 t uvd_v7_0_sw_fini -ffffffff820dd830 t uvd_v7_0_hw_init -ffffffff820e0d00 t uvd_v7_0_hw_fini -ffffffff820e10b0 t uvd_v7_0_suspend -ffffffff820e1190 t uvd_v7_0_resume -ffffffff820e11f0 t uvd_v7_0_set_clockgating_state -ffffffff820e1220 t uvd_v7_0_ring_get_rptr -ffffffff820e12c0 t uvd_v7_0_ring_get_wptr -ffffffff820e1360 t uvd_v7_0_ring_set_wptr -ffffffff820e13e0 t uvd_v7_0_ring_patch_cs_in_place -ffffffff820e1450 t uvd_v7_0_ring_emit_ib -ffffffff820e1840 t uvd_v7_0_ring_emit_fence -ffffffff820e1f00 t uvd_v7_0_ring_emit_vm_flush -ffffffff820e1f70 t uvd_v7_0_ring_emit_hdp_flush -ffffffff820e1fa0 t uvd_v7_0_ring_test_ring -ffffffff820e2270 t uvd_v7_0_ring_insert_nop -ffffffff820e2410 t uvd_v7_0_ring_emit_wreg -ffffffff820e2700 t uvd_v7_0_ring_emit_reg_wait -ffffffff820e2ae0 t uvd_v7_0_enc_ring_get_rptr -ffffffff820e2be0 t uvd_v7_0_enc_ring_get_wptr -ffffffff820e2cf0 t uvd_v7_0_enc_ring_set_wptr -ffffffff820e2df0 t uvd_v7_0_enc_ring_emit_ib -ffffffff820e3060 t uvd_v7_0_enc_ring_emit_fence -ffffffff820e32c0 t uvd_v7_0_enc_ring_emit_vm_flush -ffffffff820e3330 t uvd_v7_0_enc_ring_test_ring -ffffffff820e34b0 t uvd_v7_0_enc_ring_test_ib -ffffffff820e3a10 t uvd_v7_0_enc_ring_insert_end -ffffffff820e3aa0 t uvd_v7_0_enc_ring_emit_wreg -ffffffff820e3c00 t uvd_v7_0_enc_ring_emit_reg_wait -ffffffff820e3dd0 t uvd_v7_0_set_interrupt_state -ffffffff820e3e00 t uvd_v7_0_process_interrupt -ffffffff820e4000 t vce_v3_0_early_init -ffffffff820e41a0 t vce_v3_0_sw_init -ffffffff820e4340 t vce_v3_0_sw_fini -ffffffff820e43a0 t vce_v3_0_hw_init -ffffffff820e44a0 t vce_v3_0_hw_fini -ffffffff820e45a0 t vce_v3_0_suspend -ffffffff820e46b0 t vce_v3_0_resume -ffffffff820e47d0 t vce_v3_0_is_idle -ffffffff820e4840 t vce_v3_0_wait_for_idle -ffffffff820e4900 t vce_v3_0_check_soft_reset -ffffffff820e4a30 t vce_v3_0_pre_soft_reset -ffffffff820e4b00 t vce_v3_0_soft_reset -ffffffff820e4c00 t vce_v3_0_post_soft_reset -ffffffff820e4cd0 t vce_v3_0_set_clockgating_state -ffffffff820e50b0 t vce_v3_0_set_powergating_state -ffffffff820e5c00 t vce_v3_0_get_clockgating_state -ffffffff820e5cf0 t vce_v3_0_ring_get_rptr -ffffffff820e5de0 t vce_v3_0_ring_get_wptr -ffffffff820e5ed0 t vce_v3_0_ring_set_wptr -ffffffff820e5fa0 t vce_v3_0_ring_emit_ib -ffffffff820e6210 t vce_v3_0_emit_pipeline_sync -ffffffff820e63e0 t vce_v3_0_emit_vm_flush -ffffffff820e6680 t vce_v3_0_set_interrupt_state -ffffffff820e6700 t vce_v3_0_process_interrupt -ffffffff820e67e0 t vce_v3_0_stop -ffffffff820e7000 t vce_v4_0_early_init -ffffffff820e70c0 t vce_v4_0_sw_init -ffffffff820e73d0 t vce_v4_0_sw_fini -ffffffff820e7470 t vce_v4_0_hw_init -ffffffff820e7cc0 t vce_v4_0_hw_fini -ffffffff820e7e30 t vce_v4_0_suspend -ffffffff820e7fa0 t vce_v4_0_resume -ffffffff820e8070 t vce_v4_0_set_clockgating_state -ffffffff820e80a0 t vce_v4_0_set_powergating_state -ffffffff820e81b0 t vce_v4_0_ring_get_rptr -ffffffff820e8220 t vce_v4_0_ring_get_wptr -ffffffff820e82b0 t vce_v4_0_ring_set_wptr -ffffffff820e8340 t vce_v4_0_ring_emit_ib -ffffffff820e85b0 t vce_v4_0_ring_emit_fence -ffffffff820e8810 t vce_v4_0_emit_vm_flush -ffffffff820e8880 t vce_v4_0_ring_insert_end -ffffffff820e8910 t vce_v4_0_emit_wreg -ffffffff820e8a70 t vce_v4_0_emit_reg_wait -ffffffff820e8c40 t vce_v4_0_set_interrupt_state -ffffffff820e8cd0 t vce_v4_0_process_interrupt -ffffffff820e8d80 t vce_v4_0_start -ffffffff820ea000 T vcn_dec_sw_ring_emit_fence -ffffffff820ea260 T vcn_dec_sw_ring_insert_end -ffffffff820ea2f0 T vcn_dec_sw_ring_emit_ib -ffffffff820ea560 T vcn_dec_sw_ring_emit_reg_wait -ffffffff820ea730 T vcn_dec_sw_ring_emit_vm_flush -ffffffff820ea7a0 T vcn_dec_sw_ring_emit_wreg -ffffffff820eb000 T vcn_v1_0_set_pg_for_begin_use -ffffffff820eb160 T vcn_v1_0_ring_end_use -ffffffff820eb1d0 t vcn_v1_0_early_init -ffffffff820eb340 t vcn_v1_0_sw_init -ffffffff820eb640 t vcn_v1_0_sw_fini -ffffffff820eb6b0 t vcn_v1_0_hw_init -ffffffff820eb7b0 t vcn_v1_0_hw_fini -ffffffff820eb8d0 t vcn_v1_0_suspend -ffffffff820eb960 t vcn_v1_0_resume -ffffffff820eba80 t vcn_v1_0_is_idle -ffffffff820ebb20 t vcn_v1_0_wait_for_idle -ffffffff820ebb60 t vcn_v1_0_set_clockgating_state -ffffffff820ebc30 t vcn_v1_0_set_powergating_state -ffffffff820ec2a0 t vcn_v1_0_dec_ring_get_rptr -ffffffff820ec330 t vcn_v1_0_dec_ring_get_wptr -ffffffff820ec3c0 t vcn_v1_0_dec_ring_set_wptr -ffffffff820ec4e0 t vcn_v1_0_ring_patch_cs_in_place -ffffffff820ec6d0 t vcn_v1_0_dec_ring_emit_ib -ffffffff820ecaa0 t vcn_v1_0_dec_ring_emit_fence -ffffffff820ed130 t vcn_v1_0_dec_ring_emit_vm_flush -ffffffff820ed1a0 t vcn_v1_0_dec_ring_insert_nop -ffffffff820ed340 t vcn_v1_0_dec_ring_insert_start -ffffffff820ed530 t vcn_v1_0_dec_ring_insert_end -ffffffff820ed640 t vcn_v1_0_ring_begin_use -ffffffff820ed700 t vcn_v1_0_dec_ring_emit_wreg -ffffffff820ed9e0 t vcn_v1_0_dec_ring_emit_reg_wait -ffffffff820edda0 t vcn_v1_0_enc_ring_get_rptr -ffffffff820ede80 t vcn_v1_0_enc_ring_get_wptr -ffffffff820edf60 t vcn_v1_0_enc_ring_set_wptr -ffffffff820ee020 t vcn_v1_0_enc_ring_emit_ib -ffffffff820ee290 t vcn_v1_0_enc_ring_emit_fence -ffffffff820ee4f0 t vcn_v1_0_enc_ring_emit_vm_flush -ffffffff820ee560 t vcn_v1_0_enc_ring_insert_end -ffffffff820ee5f0 t vcn_v1_0_enc_ring_emit_wreg -ffffffff820ee750 t vcn_v1_0_enc_ring_emit_reg_wait -ffffffff820ee920 t vcn_v1_0_set_interrupt_state -ffffffff820ee950 t vcn_v1_0_process_interrupt -ffffffff820eea10 t vcn_v1_0_idle_work_handler -ffffffff820eebc0 t vcn_v1_0_pause_dpg_mode -ffffffff820efc90 t vcn_v1_0_enable_clock_gating -ffffffff820f0130 t vcn_v1_0_disable_clock_gating -ffffffff820f0790 t vcn_1_0_enable_static_power_gating -ffffffff820f0960 t vcn_v1_0_start_dpg_mode -ffffffff820f5190 t vcn_v1_0_start_spg_mode -ffffffff820f79f0 t vcn_v1_0_clock_gating_dpg_mode -ffffffff820f9000 T vcn_v2_0_dec_ring_insert_start -ffffffff820f91d0 T vcn_v2_0_dec_ring_insert_end -ffffffff820f92d0 T vcn_v2_0_dec_ring_insert_nop -ffffffff820f9450 T vcn_v2_0_dec_ring_emit_fence -ffffffff820f9a80 T vcn_v2_0_dec_ring_emit_ib -ffffffff820f9e20 T vcn_v2_0_dec_ring_emit_reg_wait -ffffffff820fa1b0 T vcn_v2_0_dec_ring_emit_vm_flush -ffffffff820fa220 T vcn_v2_0_dec_ring_emit_wreg -ffffffff820fa4d0 T vcn_v2_0_enc_ring_emit_fence -ffffffff820fa730 T vcn_v2_0_enc_ring_insert_end -ffffffff820fa7c0 T vcn_v2_0_enc_ring_emit_ib -ffffffff820faa30 T vcn_v2_0_enc_ring_emit_reg_wait -ffffffff820fac00 T vcn_v2_0_enc_ring_emit_vm_flush -ffffffff820fac70 T vcn_v2_0_enc_ring_emit_wreg -ffffffff820fadd0 T vcn_v2_0_dec_ring_test_ring -ffffffff820fb0b0 t vcn_v2_0_early_init -ffffffff820fb220 t vcn_v2_0_sw_init -ffffffff820fb5c0 t vcn_v2_0_sw_fini -ffffffff820fb670 t vcn_v2_0_hw_init -ffffffff820fc0b0 t vcn_v2_0_hw_fini -ffffffff820fc1d0 t vcn_v2_0_suspend -ffffffff820fc200 t vcn_v2_0_resume -ffffffff820fc260 t vcn_v2_0_is_idle -ffffffff820fc300 t vcn_v2_0_wait_for_idle -ffffffff820fc340 t vcn_v2_0_set_clockgating_state -ffffffff820fc3f0 t vcn_v2_0_set_powergating_state -ffffffff820fcab0 t vcn_v2_0_dec_ring_get_rptr -ffffffff820fcb40 t vcn_v2_0_dec_ring_get_wptr -ffffffff820fcbf0 t vcn_v2_0_dec_ring_set_wptr -ffffffff820fcd30 t vcn_v2_0_enc_ring_get_rptr -ffffffff820fce10 t vcn_v2_0_enc_ring_get_wptr -ffffffff820fcf10 t vcn_v2_0_enc_ring_set_wptr -ffffffff820fd000 t vcn_v2_0_set_interrupt_state -ffffffff820fd030 t vcn_v2_0_process_interrupt -ffffffff820fd0f0 t vcn_v2_0_pause_dpg_mode -ffffffff820fd9c0 t vcn_v2_0_enable_clock_gating -ffffffff820fdc80 t vcn_v2_0_disable_clock_gating -ffffffff820fe110 t vcn_v2_0_start -ffffffff821030e0 t vcn_v2_0_enable_static_power_gating -ffffffff82103260 t vcn_v2_0_clock_gating_dpg_mode -ffffffff82104140 t vcn_v2_0_mc_resume_dpg_mode -ffffffff82109000 t vcn_v2_6_query_poison_status -ffffffff821090e0 t vcn_v2_5_early_init -ffffffff821093e0 t vcn_v2_5_sw_init -ffffffff82109930 t vcn_v2_5_sw_fini -ffffffff82109a20 t vcn_v2_5_hw_init -ffffffff8210a530 t vcn_v2_5_hw_fini -ffffffff8210a6e0 t vcn_v2_5_suspend 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vcn_v3_0_sw_init -ffffffff82119750 t vcn_v3_0_sw_fini -ffffffff82119850 t vcn_v3_0_hw_init -ffffffff8211a470 t vcn_v3_0_hw_fini -ffffffff8211a590 t vcn_v3_0_suspend -ffffffff8211a5c0 t vcn_v3_0_resume -ffffffff8211a620 t vcn_v3_0_is_idle -ffffffff8211a720 t vcn_v3_0_wait_for_idle -ffffffff8211a7d0 t vcn_v3_0_set_clockgating_state -ffffffff8211a8f0 t vcn_v3_0_set_powergating_state -ffffffff8211d4e0 t vcn_v3_0_dec_ring_get_rptr -ffffffff8211d580 t vcn_v3_0_dec_ring_get_wptr -ffffffff8211d640 t vcn_v3_0_dec_ring_set_wptr -ffffffff8211d7b0 t vcn_v3_0_ring_patch_cs_in_place -ffffffff8211db30 t vcn_v3_0_enc_ring_get_rptr -ffffffff8211dc30 t vcn_v3_0_enc_ring_get_wptr -ffffffff8211dd40 t vcn_v3_0_enc_ring_set_wptr -ffffffff8211de50 t vcn_v3_0_set_interrupt_state -ffffffff8211de80 t vcn_v3_0_process_interrupt -ffffffff8211dfa0 t vcn_v3_0_pause_dpg_mode -ffffffff8211e8c0 t vcn_v3_0_enable_clock_gating -ffffffff8211eb90 t vcn_v3_0_disable_clock_gating -ffffffff8211f150 t vcn_v3_0_start_dpg_mode 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vcn_v4_0_3_process_interrupt -ffffffff8213a770 t vcn_v4_0_3_query_ras_error_count -ffffffff8213a890 t vcn_v4_0_3_reset_ras_error_count -ffffffff8213a9a0 t vcn_v4_0_3_pause_dpg_mode -ffffffff8213a9d0 t vcn_v4_0_3_enable_clock_gating -ffffffff8213ad30 t vcn_v4_0_3_disable_clock_gating -ffffffff8213b2a0 t vcn_v4_0_3_start -ffffffff82140360 t vcn_v4_0_3_disable_clock_gating_dpg_mode -ffffffff82141270 t vcn_v4_0_3_mc_resume_dpg_mode -ffffffff82147000 t vega10_ih_early_init -ffffffff82147050 t vega10_ih_sw_init -ffffffff82147330 t vega10_ih_sw_fini -ffffffff82147370 t vega10_ih_hw_init -ffffffff82147780 t vega10_ih_hw_fini -ffffffff821477e0 t vega10_ih_suspend -ffffffff82147840 t vega10_ih_resume -ffffffff82147850 t vega10_ih_is_idle -ffffffff82147880 t vega10_ih_wait_for_idle -ffffffff821478b0 t vega10_ih_soft_reset -ffffffff821478e0 t vega10_ih_set_clockgating_state -ffffffff82147a40 t vega10_ih_set_powergating_state -ffffffff82147a70 t vega10_ih_get_wptr -ffffffff82147bd0 t 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encoder_control_digx_v5 -ffffffff8218bcb0 t encoder_control_dig1_v1 -ffffffff8218bd50 t encoder_control_dig2_v1 -ffffffff8218bdf0 t encoder_control_dig_v1 -ffffffff8218be50 t transmitter_control_v2 -ffffffff8218c000 t transmitter_control_v3 -ffffffff8218c1d0 t transmitter_control_v4 -ffffffff8218c390 t transmitter_control_v1_5 -ffffffff8218c530 t transmitter_control_v1_6 -ffffffff8218c6b0 t set_pixel_clock_v3 -ffffffff8218c850 t set_pixel_clock_v5 -ffffffff8218ca20 t set_pixel_clock_v6 -ffffffff8218cbf0 t set_pixel_clock_v7 -ffffffff8218ce00 t enable_spread_spectrum_on_ppll_v1 -ffffffff8218cf20 t enable_spread_spectrum_on_ppll_v2 -ffffffff8218d060 t enable_spread_spectrum_on_ppll_v3 -ffffffff8218d180 t adjust_display_pll_v2 -ffffffff8218d2f0 t adjust_display_pll_v3 -ffffffff8218d490 t dac1_encoder_control_v1 -ffffffff8218d510 t dac2_encoder_control_v1 -ffffffff8218d590 t dac1_output_control_v1 -ffffffff8218d600 t dac2_output_control_v1 -ffffffff8218d670 t set_crtc_using_dtd_timing_v3 -ffffffff8218d7e0 t set_crtc_timing_v1 -ffffffff8218d980 t enable_crtc_v1 -ffffffff8218da30 t enable_crtc_mem_req_v1 -ffffffff8218dae0 t program_clock_v5 -ffffffff8218dc00 t program_clock_v6 -ffffffff8218dd30 t external_encoder_control_v3 -ffffffff8218df00 t enable_disp_power_gating_v2_1 -ffffffff8218dfe0 t set_dce_clock_v2_1 -ffffffff8218f000 T dal_firmware_parser_init_cmd_tbl -ffffffff8218f460 t encoder_control_digx_v1_5 -ffffffff8218f650 t encoder_control_fallback -ffffffff8218f6b0 t transmitter_control_v1_6 -ffffffff8218f880 t transmitter_control_v1_7 -ffffffff8218faa0 t transmitter_control_fallback -ffffffff8218fb00 t set_pixel_clock_v7 -ffffffff8218fd90 t set_pixel_clock_fallback -ffffffff8218fdf0 t set_crtc_using_dtd_timing_v3 -ffffffff8218ff60 t enable_crtc_v1 -ffffffff82190010 t external_encoder_control_v3 -ffffffff82190040 t enable_disp_power_gating_v2_1 -ffffffff821901c0 t enable_disp_power_gating_fallback -ffffffff82190220 t set_dce_clock_v2_1 -ffffffff82190360 t get_smu_clock_info_v3_1 -ffffffff821903d0 t enable_lvtma_control -ffffffff82191000 T dal_bios_parser_init_cmd_tbl_helper -ffffffff821910c0 T dal_cmd_table_helper_controller_id_to_atom -ffffffff821911e0 T dal_cmd_table_helper_transmitter_bp_to_atom -ffffffff82191270 T dal_cmd_table_helper_encoder_mode_bp_to_atom -ffffffff82191300 T dal_cmd_table_helper_assign_control_parameter -ffffffff821913e0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src -ffffffff821914c0 T dal_cmd_table_helper_encoder_id_to_atom -ffffffff82192000 T dal_bios_parser_init_cmd_tbl_helper2 -ffffffff821920d0 T dal_cmd_table_helper_controller_id_to_atom2 -ffffffff821921e0 T dal_cmd_table_helper_transmitter_bp_to_atom2 -ffffffff82192270 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 -ffffffff82192300 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 -ffffffff821923e0 T dal_cmd_table_helper_encoder_id_to_atom2 -ffffffff82193000 T dal_cmd_tbl_helper_dce110_get_table -ffffffff82193030 t encoder_action_to_atom -ffffffff821930b0 t engine_bp_to_atom -ffffffff82193100 t clock_source_id_to_atom -ffffffff821931a0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff821931f0 t signal_type_to_atom_dig_mode -ffffffff82193250 t hpd_sel_to_atom -ffffffff82193290 t dig_encoder_sel_to_atom -ffffffff821932c0 t phy_id_to_atom -ffffffff82193300 t disp_power_gating_action_to_atom -ffffffff82194000 T dal_cmd_tbl_helper_dce112_get_table2 +ffffffff81754880 T vio_alloc_dmamem +ffffffff81754a30 T vio_free_dmamem +ffffffff81754ad0 T vio_alloc_mem +ffffffff81755010 T vio_get_lladdr +ffffffff81755130 T vio_put_lladdr +ffffffff81755220 T vio_rx_intr +ffffffff817552e0 T vio_tx_intr +ffffffff81755350 T vio_ctrleof +ffffffff81755420 T vio_start +ffffffff81755930 T vio_ioctl +ffffffff81755b20 T vio_media_change +ffffffff81755b50 T vio_media_status +ffffffff81755c20 T vio_config_change +ffffffff81755d10 T vio_txtick +ffffffff81755d60 T vio_rxtick +ffffffff81755df0 T vio_link_state +ffffffff81755e90 T vio_init +ffffffff81756020 T vio_stop +ffffffff817563c0 T vio_populate_rx_mbufs +ffffffff817566f0 T vio_iff +ffffffff817568e0 T vio_ctrl_guest_offloads +ffffffff81756d20 T vio_rxeof +ffffffff81756fe0 T vio_ctrl_wakeup +ffffffff81757000 T vio_tx_drain +ffffffff81757120 T vio_rx_drain +ffffffff81757230 T vio_tx_offload +ffffffff81757400 T vio_txeof +ffffffff81757650 T vio_encap +ffffffff81757730 T vio_add_rx_mbuf +ffffffff81757820 T vio_free_rx_mbuf +ffffffff817578b0 T vio_rx_offload +ffffffff81757a60 T vio_ctrl_rx +ffffffff81757ea0 T vio_wait_ctrl +ffffffff81757f90 T vio_wait_ctrl_done +ffffffff81758090 T vio_set_rx_filter +ffffffff81759000 T vioblk_match +ffffffff81759030 T vioblk_attach +ffffffff81759370 T vioblk_scsi_cmd +ffffffff81759b10 T vioblk_vq_done +ffffffff81759ca0 T vioblk_req_get +ffffffff81759d20 T vioblk_req_put +ffffffff81759d80 T vioblk_alloc_reqs +ffffffff8175a300 T vioblk_vq_done1 +ffffffff8175a460 T vioblk_reset +ffffffff8175a530 T vioblk_scsi_done +ffffffff8175a550 T vioblk_scsi_inq +ffffffff8175a6b0 T vioblk_scsi_capacity +ffffffff8175a760 T vioblk_scsi_capacity16 +ffffffff8175b000 T viomb_match +ffffffff8175b030 T viomb_attach +ffffffff8175b4e0 T viomb_config_change +ffffffff8175b540 T viomb_inflate_intr +ffffffff8175b700 T viomb_deflate_intr +ffffffff8175b880 T viomb_read_config +ffffffff8175b910 T viomb_worker +ffffffff8175b9f0 T viomb_inflate +ffffffff8175bc00 T viomb_deflate +ffffffff8175be50 T viomb_vq_dequeue +ffffffff8175c000 T viornd_match +ffffffff8175c030 T viornd_attach +ffffffff8175c300 T viornd_vq_done +ffffffff8175c450 T viornd_tick +ffffffff8175d000 T vioscsi_match +ffffffff8175d030 T vioscsi_attach +ffffffff8175d370 T vioscsi_scsi_cmd +ffffffff8175d700 T vioscsi_vq_done +ffffffff8175d830 T vioscsi_req_get +ffffffff8175d8c0 T vioscsi_req_put +ffffffff8175d920 T vioscsi_alloc_reqs +ffffffff8175ddd0 T vioscsi_req_done +ffffffff8175e000 T vmmci_match +ffffffff8175e040 T vmmci_attach +ffffffff8175e170 T vmmci_activate +ffffffff8175e1f0 T vmmci_config_change +ffffffff8175e330 T vmmci_tick_hook +ffffffff8175e450 T vmmci_tick +ffffffff8175f000 T pcimatch +ffffffff8175f090 T pciattach +ffffffff8175f200 T pcidetach +ffffffff8175f210 T pciactivate +ffffffff8175f2e0 T pci_enumerate_bus +ffffffff8175f4e0 T pci_reserve_resources +ffffffff8175fbf0 T pci_primary_vga +ffffffff8175fc90 T pci_detach_devices +ffffffff8175fd90 T pci_suspend +ffffffff81760020 T pci_resume +ffffffff817602f0 T pci_powerdown +ffffffff81760420 T pci_get_capability +ffffffff81760550 T pci_suspend_msix +ffffffff817606f0 T pci_get_powerstate +ffffffff81760780 T pci_set_powerstate +ffffffff81760920 T pci_resume_msix +ffffffff81760ad0 T pciprint +ffffffff81760bf0 T pcisubmatch +ffffffff81760c50 T pci_probe_device +ffffffff81761230 T pci_get_ht_capability +ffffffff81761330 T pci_alloc_msix_table +ffffffff817613c0 T pci_free_msix_table +ffffffff81761440 T pci_get_ext_capability +ffffffff81761540 T pci_requester_id +ffffffff817615a0 T pci_find_device +ffffffff81761640 T pci_vpd_read +ffffffff817617e0 T pci_vpd_write +ffffffff817619a0 T pci_matchbyid +ffffffff81761a10 T pci_disable_legacy_vga +ffffffff81761a80 T pciopen +ffffffff81761af0 T pciclose +ffffffff81761b30 T pciioctl +ffffffff81762490 T pci_disable_vga +ffffffff817624e0 T pci_unroute_vga +ffffffff81762590 T pci_route_vga +ffffffff81762640 T pci_enable_vga +ffffffff81762690 T pci_intr_msix_count +ffffffff81763000 T obsd_pci_io_find +ffffffff817631d0 T obsd_pci_mem_find +ffffffff817634b0 T pci_mapreg_type +ffffffff81763540 T pci_mapreg_probe +ffffffff817636a0 T pci_mapreg_info +ffffffff81763700 T pci_mapreg_assign +ffffffff81763930 T pci_mapreg_map +ffffffff81764000 T pci_lookup_quirkdata +ffffffff81765000 T pci_findvendor +ffffffff81765060 T pci_findproduct +ffffffff817650d0 T pci_devinfo +ffffffff81766000 T vga_pci_match +ffffffff817660c0 T vga_pci_attach +ffffffff81766250 T vga_pci_activate +ffffffff81766320 T vga_save_state +ffffffff81766920 T vga_restore_state +ffffffff81766ff0 T vga_pci_mmap +ffffffff81767020 T vga_pci_cnattach +ffffffff81767040 T vga_pci_ioctl +ffffffff81768000 T cy82c693_init +ffffffff817680d0 T cy82c693_read +ffffffff81768140 T cy82c693_write +ffffffff81769000 t ahc_aic785X_setup +ffffffff81769080 t ahc_aic7860_setup +ffffffff81769100 t ahc_apa1480_setup +ffffffff81769180 t ahc_aic7870_setup +ffffffff817691e0 t ahc_aha394X_setup +ffffffff81769280 t ahc_aha398X_setup +ffffffff81769330 t ahc_aha494X_setup +ffffffff817693d0 t ahc_aic7880_setup +ffffffff81769460 t ahc_aha394XU_setup +ffffffff81769520 t ahc_aha398XU_setup +ffffffff817695f0 t ahc_aha2940Pro_setup +ffffffff81769680 t ahc_aic7890_setup +ffffffff817696f0 t ahc_aic7892_setup +ffffffff81769750 t ahc_aha29160C_setup +ffffffff817697c0 t ahc_aic7895_setup +ffffffff817698a0 t ahc_aic7896_setup +ffffffff81769910 t ahc_aic7899_setup +ffffffff81769980 t ahc_raid_setup +ffffffff817699d0 T ahc_pci_probe +ffffffff81769aa0 T ahc_pci_attach +ffffffff8176a7e0 T ahc_find_pci_device +ffffffff8176a8c0 T ahc_pci_intr +ffffffff8176ab90 t ahc_pci_chip_init +ffffffff8176ada0 t ahc_probe_ext_scbram +ffffffff8176b1e0 t ahc_scbram_config +ffffffff8176c000 T ahd_aic7901_setup +ffffffff8176c020 T ahd_aic7901A_setup +ffffffff8176c040 T ahd_aic7902_setup +ffffffff8176c070 T ahd_pci_probe +ffffffff8176c0e0 T ahd_pci_attach +ffffffff8176c6d0 T ahd_activate +ffffffff8176c730 T ahd_find_pci_device +ffffffff8176c9f0 T ahd_pci_test_register_access +ffffffff8176cd80 T ahd_pci_intr +ffffffff8176d040 T ahd_check_extport +ffffffff8176d410 T ahd_configure_termination +ffffffff8176d680 T ahd_pci_split_intr +ffffffff8176df90 T ahd_aic790X_setup +ffffffff8176f000 T adw_pci_match +ffffffff8176f030 T adw_pci_attach +ffffffff81770000 T AdwInitFromEEPROM +ffffffff81770680 T AdwGetEEPROMConfig +ffffffff81770930 T AdwReadEEPWord +ffffffff81770a00 T AdwSetEEPROMConfig +ffffffff81770da0 T AdwInitDriver +ffffffff81771bb0 T AdwRamSelfTest +ffffffff81771de0 T AdwLoadMCode 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ahci_storx_attach +ffffffff8177d6f0 T ahci_map_regs +ffffffff8177d7b0 T ahci_map_intr +ffffffff8177d850 T ahci_unmap_regs +ffffffff8177d8b0 T ahci_unmap_intr +ffffffff8177e000 T nvme_pci_match +ffffffff8177e070 T nvme_pci_attach +ffffffff8177e2c0 T nvme_pci_detach +ffffffff8177e2f0 T nvme_pci_activate +ffffffff8177f000 T ami_pci_match +ffffffff8177f100 T ami_pci_attach +ffffffff8177f890 T ami_pci_find_device +ffffffff81780000 T mfi_pci_match +ffffffff81780080 T mfi_pci_attach +ffffffff81780380 T mfi_pci_find_device +ffffffff81781000 T mfii_match +ffffffff81781090 T mfii_attach +ffffffff81781c00 T mfii_detach +ffffffff81781fc0 T mfii_activate +ffffffff81782080 T mfii_scsi_cmd +ffffffff817823c0 T mfii_scsi_ioctl +ffffffff81782420 T mfii_pd_scsi_cmd +ffffffff817826f0 T mfii_pd_scsi_probe +ffffffff817828c0 T mfii_find_iop +ffffffff817829d0 T mfii_get_ccb +ffffffff81782a70 T mfii_put_ccb +ffffffff81782ae0 T mfii_aen +ffffffff81782c90 T mfii_abort_task +ffffffff81782f20 T mfii_write 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+ffffffff817d3300 T qle_clear_port_lists +ffffffff817d3480 T qle_update_topology +ffffffff817d3560 T qle_update_fabric +ffffffff817d3690 T qle_ct_pass_through +ffffffff817d39c0 T qle_sge +ffffffff817d3a00 T qle_next_fabric_port +ffffffff817d3ba0 T qle_fabric_plogx +ffffffff817d3e70 T qle_fabric_plogi +ffffffff817d4010 T qle_fabric_plogo +ffffffff817d4060 T qle_dump_stuff +ffffffff817d4090 T qle_dump_iocb_segs +ffffffff817d40c0 T qle_load_fwchunk +ffffffff817d4350 T qle_verify_firmware +ffffffff817d4470 T qle_read_ram_word +ffffffff817d44e0 T qle_put_ccb +ffffffff817d4550 T qle_get_ccb +ffffffff817d5000 T mpi_pci_match +ffffffff817d5030 T mpi_pci_attach +ffffffff817d5400 T mpi_pci_detach +ffffffff817d6000 T mpii_match +ffffffff817d6030 T mpii_attach +ffffffff817d69b0 T mpii_detach +ffffffff817d6a40 T mpii_scsi_cmd +ffffffff817d6d60 T mpii_scsi_probe +ffffffff817d6f90 T mpii_scsi_ioctl +ffffffff817d7010 T mpii_write +ffffffff817d7070 T mpii_iocfacts +ffffffff817d7350 T mpii_init +ffffffff817d76a0 T mpii_alloc_ccbs +ffffffff817d7bb0 T mpii_alloc_replies +ffffffff817d7c80 T mpii_alloc_queues +ffffffff817d7e30 T mpii_iocinit +ffffffff817d7fc0 T mpii_wait_eq +ffffffff817d80e0 T mpii_read +ffffffff817d81a0 T mpii_push_replies +ffffffff817d82f0 T mpii_init_queues +ffffffff817d8370 T mpii_board_info +ffffffff817d85a0 T mpii_portfacts +ffffffff817d86f0 T mpii_target_map +ffffffff817d87f0 T mpii_cfg_coalescing +ffffffff817d88d0 T mpii_eventnotify +ffffffff817d8ad0 T mpii_portenable +ffffffff817d8be0 T mpii_intr +ffffffff817d9070 T mpii_ioctl +ffffffff817d9190 T mpii_create_sensors +ffffffff817d9360 T mpii_dmamem_free +ffffffff817d9410 T mpii_get_ccb +ffffffff817d94c0 T mpii_reply +ffffffff817d95a0 T mpii_event_process +ffffffff817d98b0 T mpii_load_xs_sas3 +ffffffff817d9a70 T mpii_load_xs +ffffffff817d9c70 T mpii_req_cfg_header +ffffffff817d9e40 T mpii_req_cfg_page +ffffffff817da0c0 T mpii_wait_ne +ffffffff817da1e0 T mpii_reset_soft +ffffffff817da460 T mpii_reset_hard +ffffffff817da7d0 T mpii_handshake_send +ffffffff817dac80 T mpii_handshake_recv_dword +ffffffff817dafa0 T mpii_handshake_recv +ffffffff817db250 T mpii_empty_done +ffffffff817db280 T mpii_push_reply +ffffffff817db300 T mpii_poll +ffffffff817db520 T mpii_eventack +ffffffff817db740 T mpii_eventack_done +ffffffff817db7c0 T mpii_start +ffffffff817db890 T mpii_event_sas +ffffffff817dbd00 T mpii_eventnotify_done +ffffffff817dbd40 T mpii_event_raid +ffffffff817dc0a0 T mpii_find_dev +ffffffff817dc100 T mpii_insert_dev +ffffffff817dc180 T mpii_remove_dev +ffffffff817dc200 T mpii_event_discovery +ffffffff817dc260 T mpii_sas_remove_device +ffffffff817dc430 T mpii_event_done +ffffffff817dc510 T mpii_wait +ffffffff817dc6d0 T mpii_dmamem_alloc +ffffffff817dc890 T mpii_scsi_cmd_tmo_handler +ffffffff817dca10 T mpii_put_ccb +ffffffff817dcad0 T mpii_poll_done +ffffffff817dcb00 T mpii_wait_done +ffffffff817dcb60 T mpii_scsi_cmd_done +ffffffff817dce10 T mpii_scsi_cmd_tmo +ffffffff817dcf30 T mpii_scsi_cmd_tmo_done +ffffffff817dcf50 T mpii_ioctl_cache +ffffffff817dd1e0 T mpii_ioctl_inq +ffffffff817dd2a0 T mpii_ioctl_vol +ffffffff817dd580 T mpii_ioctl_disk +ffffffff817dd7a0 T mpii_find_vol +ffffffff817dd7f0 T mpii_bio_hs +ffffffff817dda20 T mpii_bio_disk +ffffffff817ddcc0 T mpii_bio_volstate +ffffffff817dde80 T mpii_refresh_sensors +ffffffff817de000 T sili_pci_match +ffffffff817de0a0 T sili_pci_attach +ffffffff817de420 T sili_pci_detach +ffffffff817de4f0 T sili_pci_activate +ffffffff817de530 T sili_lookup +ffffffff817df000 T aq_fw1x_reset +ffffffff817df060 T aq1_get_mac_addr +ffffffff817df160 T aq_fw1x_set_mode +ffffffff817df190 T aq_fw1x_get_mode +ffffffff817df1c0 T aq_fw1x_get_stats +ffffffff817df1f0 T aq_fw2x_reset +ffffffff817df290 T aq_fw2x_set_mode +ffffffff817df470 T aq_fw2x_get_mode +ffffffff817df630 T aq_fw2x_get_stats +ffffffff817df660 T aq2_fw_reset +ffffffff817df850 T aq2_get_mac_addr +ffffffff817df900 T aq2_fw_set_mode +ffffffff817dfb70 T aq2_fw_get_mode +ffffffff817dfc50 T aq2_fw_get_stats +ffffffff817dfc80 T aq_match +ffffffff817dfcb0 T aq_attach +ffffffff817e0bd0 T aq_activate +ffffffff817e0c00 T aq_lookup +ffffffff817e0c80 T aq_intr +ffffffff817e0e40 T aq_intr_link +ffffffff817e0f60 T aq1_fw_reboot +ffffffff817e1230 T aq2_fw_reboot +ffffffff817e1750 T aq_hw_reset +ffffffff817e1900 T aq_init_rss +ffffffff817e1d10 T aq_hw_init +ffffffff817e20c0 T aq_ifmedia_change +ffffffff817e21b0 T aq_ifmedia_status +ffffffff817e22c0 T aq_ioctl +ffffffff817e2550 T aq_start +ffffffff817e28e0 T aq_watchdog +ffffffff817e2910 T aq_set_linkmode +ffffffff817e2940 T aq_refill +ffffffff817e29c0 T aq_intr_queue +ffffffff817e2ac0 T aq_enable_intr +ffffffff817e2bf0 T aq1_fw_read_version +ffffffff817e2ca0 T aq1_mac_soft_reset +ffffffff817e2cd0 T aq1_fw_version_init +ffffffff817e2e90 T aq1_hw_init_ucp +ffffffff817e3040 T aq1_mac_soft_reset_rbl +ffffffff817e3370 T aq1_global_software_reset +ffffffff817e34c0 T aq1_mac_soft_reset_flb +ffffffff817e3980 T aq2_interface_buffer_read +ffffffff817e3af0 T aq1_fw_downld_dwords +ffffffff817e3eb0 T aq_hw_l3_filter_set +ffffffff817e4150 T aq_hw_init_tx_path +ffffffff817e4450 T aq_hw_init_rx_path +ffffffff817e4e50 T aq_set_mac_addr +ffffffff817e50c0 T aq_hw_qos_set +ffffffff817e5950 T aq2_filter_art_set +ffffffff817e5b60 T aq_get_linkmode +ffffffff817e5bd0 T aq_txring_reset +ffffffff817e6020 T aq_rxring_reset +ffffffff817e6630 T aq_rx_fill +ffffffff817e6890 T aq_rxeof +ffffffff817e6c60 T aq_txeof +ffffffff817e6e70 T aq_update_link_status +ffffffff817e6f20 T aq_free_slots +ffffffff817e6fd0 T aq_queue_up +ffffffff817e74c0 T aq_dmamem_alloc +ffffffff817e7640 T aq_dmamem_free +ffffffff817e76c0 T aq_queue_down +ffffffff817e7a40 T aq_invalidate_rx_desc_cache +ffffffff817e7ad0 T aq_up +ffffffff817e7fc0 T aq_down +ffffffff817e8160 T aq_rxrinfo +ffffffff817e8270 T aq_iff +ffffffff817e9000 T tulip_probe +ffffffff817e9060 T tulip_attach +ffffffff817e9cd0 T tulip_timeout_callback +ffffffff817e9d40 T tulip_timeout +ffffffff817e9db0 T tulip_txprobe +ffffffff817e9f30 T tulip_txput +ffffffff817ea540 T tulip_media_set +ffffffff817eac00 T tulip_reset +ffffffff817eb050 T tulip_mii_autonegotiate +ffffffff817eb3b0 T tulip_mii_readreg +ffffffff817eb5f0 T tulip_mii_writereg +ffffffff817eb840 T tulip_linkup +ffffffff817eb920 T tulip_init +ffffffff817ebad0 T tulip_media_print +ffffffff817ebb20 T tulip_media_link_monitor +ffffffff817ebd90 T tulip_mii_map_abilities +ffffffff817ebe20 T tulip_media_poll +ffffffff817ec370 T tulip_mii_phy_readspecific +ffffffff817ec570 T tulip_media_select +ffffffff817ec6b0 T tulip_21040_mediainfo_init +ffffffff817ec7b0 T tulip_21040_media_probe +ffffffff817ec8a0 T tulip_21040_10baset_only_media_probe +ffffffff817ec960 T tulip_21040_10baset_only_media_select +ffffffff817ec9c0 T tulip_21040_auibnc_only_media_probe +ffffffff817eca60 T tulip_21040_auibnc_only_media_select +ffffffff817ecab0 T tulip_21041_mediainfo_init +ffffffff817ecb70 T tulip_21041_media_probe +ffffffff817ecc50 T tulip_21041_media_poll +ffffffff817ecfc0 T tulip_mii_get_phyaddr +ffffffff817ed090 T tulip_2114x_media_preset +ffffffff817ed2c0 T tulip_null_media_poll +ffffffff817ed2f0 T tulip_21140_mediainit +ffffffff817ed340 T tulip_21140_evalboard_media_probe +ffffffff817ed570 T tulip_21140_accton_media_probe +ffffffff817ed7d0 T tulip_21140_smc9332_media_probe +ffffffff817eda50 T tulip_21140_cogent_em100_media_probe +ffffffff817edbf0 T tulip_21140_znyx_zx34x_media_probe +ffffffff817ede90 T tulip_2114x_media_probe +ffffffff817edec0 T tulip_delay_300ns +ffffffff817ee020 T tulip_srom_idle +ffffffff817eed40 T tulip_srom_read +ffffffff817eff90 T tulip_mii_writebits +ffffffff817f06a0 T tulip_mii_turnaround +ffffffff817f1120 T tulip_mii_readbits +ffffffff817f1630 T tulip_identify_dec_nic +ffffffff817f1710 T tulip_identify_znyx_nic +ffffffff817f1a10 T tulip_identify_smc_nic +ffffffff817f1c00 T tulip_identify_cogent_nic +ffffffff817f1d10 T tulip_identify_accton_nic +ffffffff817f1e70 T tulip_identify_asante_nic +ffffffff817f2180 T tulip_identify_compex_nic +ffffffff817f22f0 T tulip_srom_decode +ffffffff817f2fb0 T tulip_read_macaddr +ffffffff817f3a10 T tulip_ifmedia_add +ffffffff817f3b20 T tulip_ifmedia_change +ffffffff817f3d10 T tulip_ifmedia_status +ffffffff817f3d80 T tulip_alloc_rxmap +ffffffff817f3dc0 T tulip_free_rxmap +ffffffff817f3e00 T tulip_alloc_txmap +ffffffff817f3e40 T tulip_free_txmap +ffffffff817f3e80 T tulip_addr_filter +ffffffff817f41e0 T tulip_rx_intr +ffffffff817f48a0 T tulip_txput_setup +ffffffff817f4b80 T tulip_tx_intr +ffffffff817f4fe0 T tulip_print_abnormal_interrupt +ffffffff817f5010 T tulip_intr_handler +ffffffff817f5400 T tulip_ifstart +ffffffff817f54e0 T tulip_intr_shared +ffffffff817f5560 T tulip_intr_normal +ffffffff817f55b0 T tulip_ifioctl +ffffffff817f56d0 T tulip_ifwatchdog +ffffffff817f57f0 T tulip_busdma_allocmem +ffffffff817f59b0 T tulip_busdma_init +ffffffff817f5c00 T tulip_initcsrs +ffffffff817f5d00 T tulip_initring +ffffffff817f6000 T ep_pci_match +ffffffff817f6030 T ep_pci_attach +ffffffff817f7000 T pcn_match +ffffffff817f7070 T pcn_attach +ffffffff817f7960 T pcn_tick +ffffffff817f79d0 T pcn_reset +ffffffff817f7a60 T pcn_intr +ffffffff817f7d30 T pcn_ioctl +ffffffff817f7ed0 T pcn_start +ffffffff817f8390 T pcn_watchdog +ffffffff817f8410 T pcn_txintr +ffffffff817f8930 T pcn_init +ffffffff817f93e0 T pcn_stop +ffffffff817f9590 T pcn_rxintr +ffffffff817f9b30 T pcn_spnd +ffffffff817f9c60 T pcn_add_rxbuf +ffffffff817f9e90 T pcn_rxdrain +ffffffff817f9f40 T pcn_set_filter +ffffffff817fa0b0 T pcn_79c970_mediainit +ffffffff817fa1e0 T pcn_79c970_mediachange +ffffffff817fa3d0 T pcn_79c970_mediastatus +ffffffff817fa410 T pcn_79c971_mediainit +ffffffff817fa4f0 T pcn_mii_readreg +ffffffff817fa5d0 T pcn_mii_writereg +ffffffff817fa680 T pcn_mii_statchg +ffffffff817fa6f0 T pcn_79c971_mediachange +ffffffff817fa740 T pcn_79c971_mediastatus +ffffffff817fb000 T siop_lookup_product +ffffffff817fb0a0 T siop_pci_attach_common +ffffffff817fb5b0 T siop_pci_reset +ffffffff817fc000 T siop_pci_match +ffffffff817fc050 T siop_pci_attach +ffffffff817fd000 T sii3114_read_reg +ffffffff817fd060 T sii3114_write_reg +ffffffff817fd0d0 T pdc203xx_read_reg +ffffffff817fd130 T pdc203xx_write_reg +ffffffff817fd1a0 T svwsata_read_reg +ffffffff817fd210 T svwsata_write_reg +ffffffff817fd260 T svwsata_lba48_write_reg +ffffffff817fd2b0 T pciide_pci_read +ffffffff817fd300 T pciide_pci_write +ffffffff817fd380 T default_chip_map +ffffffff817fdac0 T artisea_chip_map +ffffffff817fddb0 T piix_chip_map +ffffffff817fe470 T piixsata_chip_map +ffffffff817fea80 T sch_chip_map +ffffffff817fee40 T amd756_chip_map +ffffffff817ff310 T ixp_chip_map +ffffffff817ff720 T cmd_chip_map +ffffffff817ff8a0 T cmd0643_9_chip_map +ffffffff817ffc10 T cmd680_chip_map +ffffffff817ffe50 T sii3112_chip_map +ffffffff818002a0 T sii3114_chip_map +ffffffff818008f0 T apollo_chip_map +ffffffff81801070 T sata_chip_map +ffffffff818012b0 T cy693_chip_map +ffffffff81801710 T sis_chip_map +ffffffff81801fe0 T natsemi_chip_map +ffffffff81802540 T ns_scx200_chip_map +ffffffff81802980 T acer_chip_map +ffffffff81803150 T hpt_chip_map +ffffffff81803720 T pdc202xx_chip_map +ffffffff81804200 T pdcsata_chip_map +ffffffff81804ae0 T acard_chip_map +ffffffff81804db0 T serverworks_chip_map +ffffffff81805180 T svwsata_chip_map +ffffffff818055e0 T nforce_chip_map +ffffffff81805af0 T ite_chip_map +ffffffff81805e20 T jmicron_chip_map +ffffffff818062c0 T phison_chip_map +ffffffff81806690 T rdc_chip_map +ffffffff81806bb0 T pciide_match +ffffffff81806c60 T pciide_attach +ffffffff81806d40 T pciide_detach +ffffffff81806db0 T pciide_activate +ffffffff81807610 T pciide_lookup_product +ffffffff818078c0 T pciide_dmacmd_read +ffffffff818078f0 T pciide_dmacmd_write +ffffffff81807920 T pciide_dmactl_read +ffffffff81807950 T pciide_dmactl_write +ffffffff81807980 T pciide_dmatbl_write +ffffffff818079b0 T pciide_mapregs_compat +ffffffff81807b70 T pciide_unmapregs_compat +ffffffff81807c10 T pciide_mapregs_native +ffffffff81807fb0 T pciide_unmapregs_native +ffffffff81808060 T pciide_mapreg_dma +ffffffff81808220 T pciide_dma_init +ffffffff81808520 T pciide_dma_start +ffffffff818085b0 T pciide_dma_finish +ffffffff818087c0 T pciide_unmapreg_dma +ffffffff818087f0 T pciide_intr_flag +ffffffff81808ab0 T pciide_compat_intr +ffffffff81808b30 T pciide_pci_intr +ffffffff81808c10 T pciide_channel_dma_setup +ffffffff81808cf0 T pciide_dma_table_setup +ffffffff81808f80 T pciide_irqack +ffffffff81808fe0 T pciide_chansetup +ffffffff818090d0 T pciide_chanfree +ffffffff81809120 T pciide_mapchan +ffffffff818091c0 T pciide_unmap_chan +ffffffff818092c0 T pciide_chan_candisable +ffffffff81809340 T pciide_map_compat_intr +ffffffff81809400 T pciide_unmap_compat_intr +ffffffff81809460 T pciide_print_channels +ffffffff81809530 T pciide_print_modes +ffffffff81809540 T default_chip_unmap +ffffffff81809640 T sata_setup_channel +ffffffff81809770 T piix_timing_debug +ffffffff818097a0 T piix_setup_channel +ffffffff81809cb0 T piix3_4_setup_channel +ffffffff8180a500 T piix_setup_idetim_timings +ffffffff8180a570 T piix_setup_idetim_drvs +ffffffff8180a680 T piix_setup_sidetim_timings +ffffffff8180a6f0 T amd756_setup_channel +ffffffff8180aaf0 T apollo_setup_channel +ffffffff8180ae90 T cmd_channel_map +ffffffff8180b230 T cmd_pci_intr +ffffffff8180b360 T cmd646_9_irqack +ffffffff8180b490 T cmd0643_9_setup_channel +ffffffff8180b930 T cmd680_setup_channel +ffffffff8180bef0 T cmd680_channel_map +ffffffff8180c240 T sii_fixup_cacheline +ffffffff8180c5d0 T sii3112_setup_channel +ffffffff8180c7d0 T sii3112_drv_probe +ffffffff8180cbc0 T sii3114_mapreg_dma +ffffffff8180ced0 T sii3114_chansetup +ffffffff8180cfa0 T sii3114_mapchan +ffffffff8180d2f0 T sii3114_dmacmd_read +ffffffff8180d330 T sii3114_dmacmd_write +ffffffff8180d370 T sii3114_dmactl_read +ffffffff8180d3b0 T sii3114_dmactl_write +ffffffff8180d3f0 T sii3114_dmatbl_write +ffffffff8180d430 T cy693_setup_channel +ffffffff8180d670 T sis_hostbr_match +ffffffff8180d740 T sis_south_match +ffffffff8180d780 T sis_setup_channel +ffffffff8180db00 T sis96x_setup_channel +ffffffff8180dde0 T natsemi_irqack +ffffffff8180de90 T natsemi_setup_channel +ffffffff8180e2f0 T natsemi_pci_intr +ffffffff8180e400 T ns_scx200_setup_channel +ffffffff8180e730 T acer_dma_init +ffffffff8180e770 T acer_setup_channel +ffffffff8180ebe0 T acer_pci_intr +ffffffff8180ece0 T hpt_setup_channel +ffffffff8180f070 T hpt_pci_intr +ffffffff8180f1a0 T pdc268_config_read +ffffffff8180f210 T pdc20268_setup_channel +ffffffff8180f400 T pdc202xx_setup_channel +ffffffff8180f880 T pdc20262_dma_start +ffffffff8180fa00 T pdc20262_dma_finish +ffffffff8180faf0 T pdc20265_pci_intr +ffffffff8180fcd0 T pdc202xx_pci_intr +ffffffff8180fe00 T pdc203xx_pci_intr +ffffffff8180ff10 T pdc205xx_pci_intr +ffffffff81810080 T pdc203xx_irqack +ffffffff81810130 T pdc203xx_setup_channel +ffffffff81810250 T pdc205xx_do_reset +ffffffff81810320 T pdc205xx_drv_probe +ffffffff81810620 T pdc203xx_dma_start +ffffffff818106f0 T pdc203xx_dma_finish +ffffffff81810800 T serverworks_setup_channel +ffffffff81810c60 T serverworks_pci_intr +ffffffff81810d90 T svwsata_mapreg_dma +ffffffff81810e40 T svwsata_drv_probe +ffffffff818111b0 T svwsata_mapchan +ffffffff818112b0 T svwsata_dmacmd_read +ffffffff818112e0 T svwsata_dmacmd_write +ffffffff81811310 T svwsata_dmactl_read +ffffffff81811340 T svwsata_dmactl_write +ffffffff81811370 T svwsata_dmatbl_write +ffffffff818113a0 T acard_setup_channel +ffffffff81811820 T nforce_setup_channel +ffffffff81811ba0 T nforce_pci_intr +ffffffff81811cb0 T ite_setup_channel +ffffffff81812050 T ixp_setup_channel +ffffffff81812450 T jmicron_setup_channel +ffffffff818126c0 T phison_setup_channel +ffffffff818128e0 T sch_setup_channel +ffffffff81812af0 T rdc_setup_channel +ffffffff81812f60 t ba5_read_4_ind +ffffffff81813010 t ba5_write_4_ind +ffffffff81814000 T ppbmatch +ffffffff81814050 T ppbattach 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em_free_transmit_structures +ffffffff8183b900 T em_free_receive_structures +ffffffff8183bb50 T em_legacy_irq_quirk_spt +ffffffff8183bc40 T em_rxrefill +ffffffff8183bc90 T em_allocate_msix +ffffffff8183bf00 T em_allocate_legacy +ffffffff8183c060 T em_dma_free +ffffffff8183c0f0 T em_disable_aspm +ffffffff8183c1d0 T em_dma_malloc +ffffffff8183c390 T em_allocate_transmit_structures +ffffffff8183c4a0 T em_get_buf +ffffffff8183c620 T em_allocate_receive_structures +ffffffff8183c830 T em_rxfill +ffffffff8183c990 T em_tbi_adjust_stats +ffffffff8183cb60 T em_receive_checksum +ffffffff8183cbd0 T em_write_pci_cfg +ffffffff8183cc50 T em_read_pci_cfg +ffffffff8183ccd0 T em_read_pcie_cap_reg +ffffffff8183cd00 T em_flush_tx_ring +ffffffff8183ce90 T em_flush_rx_ring +ffffffff8183d0b0 T em_queue_intr_msix +ffffffff8183d180 T em_link_intr_msix +ffffffff8183d2f0 T em_enable_queue_intr_msix +ffffffff8183e000 T em_set_mac_type +ffffffff8183ea20 T em_set_sfp_media_type_82575 +ffffffff8183ee10 T em_translate_82542_register +ffffffff8183f040 T em_read_sfp_data_byte +ffffffff8183f150 T em_set_media_type +ffffffff8183f3f0 T em_reset_hw +ffffffff81840260 T em_disable_pciex_master +ffffffff81840350 T em_check_phy_reset_block +ffffffff81840420 T em_gate_hw_phy_config_ich8lan +ffffffff818404d0 t em_get_software_flag +ffffffff818406a0 T em_hv_phy_workarounds_ich8lan +ffffffff81840b50 T em_lv_phy_workarounds_ich8lan +ffffffff81840c90 t em_phy_init_script +ffffffff81840fb0 T em_read_eeprom +ffffffff81841720 T em_set_eee_i350 +ffffffff81841870 T em_init_hw +ffffffff818437a0 T em_phy_reset +ffffffff81843a20 T em_clear_vfta_i350 +ffffffff81843c60 T em_read_phy_reg +ffffffff81843e50 T em_setup_link +ffffffff818466d0 T em_enable_tx_pkt_filtering +ffffffff81846b70 T em_clear_hw_cntrs +ffffffff81847740 T em_write_phy_reg +ffffffff81847900 T em_power_up_serdes_link_82575 +ffffffff81847a20 T em_copper_link_autoneg +ffffffff81847b80 T em_phy_setup_autoneg +ffffffff81847d00 T em_copper_link_postconfig +ffffffff81847e00 T em_config_collision_dist +ffffffff81847ea0 t em_config_mac_to_phy +ffffffff81848040 t em_config_fc_after_link_up +ffffffff818482e0 t em_config_dsp_after_link_change +ffffffff81848e10 T em_force_mac_fc +ffffffff81848ee0 T em_check_for_link +ffffffff818496b0 T em_get_pcs_speed_and_duplex_82575 +ffffffff81849770 T em_k1_gig_workaround_hv +ffffffff818498d0 T em_link_stall_workaround_hv +ffffffff818499d0 T em_k1_workaround_lv +ffffffff81849aa0 T em_k1_workaround_lpt_lp +ffffffff81849e00 t em_check_downshift +ffffffff81849ec0 T em_set_eee_pchlan +ffffffff81849f70 t em_polarity_reversal_workaround +ffffffff8184a250 T em_get_speed_and_duplex +ffffffff8184a800 T em_access_phy_wakeup_reg_bm +ffffffff8184a9c0 t em_write_phy_reg_ex +ffffffff8184ac90 t em_read_phy_reg_ex +ffffffff8184b260 T em_access_phy_debug_regs_hv +ffffffff8184b340 T em_access_phy_reg_hv +ffffffff8184b4d0 t em_swfw_sync_acquire +ffffffff8184b6c0 t em_swfw_sync_release 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T gcu_miibus_writereg +ffffffff81852390 T gcu_miibus_statchg +ffffffff81853000 T ixgb_probe +ffffffff81853030 T ixgb_attach +ffffffff81853560 T ixgb_local_timer +ffffffff81853630 T ixgb_identify_hardware +ffffffff81853750 T ixgb_allocate_pci_resources +ffffffff81853920 T ixgb_dma_malloc +ffffffff81853b80 T ixgb_hardware_init +ffffffff81853c60 T ixgb_setup_interface +ffffffff81853dd0 T ixgb_update_stats_counters +ffffffff818548e0 T ixgb_update_link_status +ffffffff81854960 T ixgb_dma_free +ffffffff81854a40 T ixgb_free_pci_resources +ffffffff81854ad0 T ixgb_start +ffffffff81854d80 T ixgb_encap +ffffffff81854fa0 T ixgb_ioctl +ffffffff818552c0 T ixgb_init +ffffffff818558d0 T ixgb_set_promisc +ffffffff81855950 T ixgb_stop +ffffffff81855a00 T ixgb_disable_intr +ffffffff81855a30 T ixgb_set_multi +ffffffff81855b60 T ixgb_enable_intr +ffffffff81855bb0 T ixgb_watchdog +ffffffff81855c60 T ixgb_enable_hw_vlans +ffffffff81855cc0 T ixgb_setup_transmit_structures +ffffffff81855e70 T ixgb_initialize_transmit_unit +ffffffff81856020 T ixgb_setup_receive_structures +ffffffff818560b0 T ixgb_initialize_receive_unit +ffffffff818563c0 T ixgb_intr +ffffffff81856600 T ixgb_rxeof +ffffffff81856aa0 T ixgb_txeof +ffffffff81856cb0 T ixgb_media_status +ffffffff81856da0 T ixgb_media_change +ffffffff81856df0 T ixgb_free_transmit_structures +ffffffff81856f50 T ixgb_free_receive_structures +ffffffff818570b0 T ixgb_allocate_transmit_structures +ffffffff81857140 T ixgb_transmit_checksum_setup +ffffffff81857240 T ixgb_get_buf +ffffffff81857420 T ixgb_allocate_receive_structures +ffffffff818575e0 T ixgb_receive_checksum +ffffffff81857640 T ixgb_write_pci_cfg +ffffffff81858000 T ixgb_validate_eeprom_checksum +ffffffff81858080 T ixgb_read_eeprom +ffffffff818583b0 T ixgb_update_eeprom_checksum +ffffffff81858420 T ixgb_write_eeprom +ffffffff81858aa0 t ixgb_shift_out_bits +ffffffff81858c10 T ixgb_get_eeprom_data +ffffffff81858cc0 T ixgb_get_eeprom_word +ffffffff81858da0 T ixgb_get_ee_mac_addr +ffffffff81858ea0 T ixgb_get_ee_pba_number +ffffffff81858f60 T ixgb_get_ee_device_id +ffffffff8185a000 T ixgb_mac_reset +ffffffff8185a270 T ixgb_adapter_stop +ffffffff8185a400 T ixgb_init_hw +ffffffff8185a790 T ixgb_init_rx_addrs +ffffffff8185a8f0 T mac_addr_valid +ffffffff8185a950 T ixgb_clear_vfta +ffffffff8185a9d0 T ixgb_clear_hw_cntrs +ffffffff8185b2c0 T ixgb_setup_fc +ffffffff8185b480 T ixgb_check_for_link +ffffffff8185b700 T ixgb_rar_set +ffffffff8185b780 T ixgb_mc_addr_list_update +ffffffff8185ba60 T ixgb_write_vfta +ffffffff8185ba90 T ixgb_read_phy_reg +ffffffff8185c110 T ixgb_write_phy_reg +ffffffff8185c790 T ixgb_check_for_bad_link +ffffffff8185c860 T ixgb_led_on +ffffffff8185c8c0 T ixgb_led_off +ffffffff8185d000 T ixgbe_probe +ffffffff8185d030 T ixgbe_attach +ffffffff8185d6a0 T ixgbe_detach +ffffffff8185d910 T ixgbe_activate +ffffffff8185da40 T ixgbe_identify_hardware +ffffffff8185db20 T ixgbe_allocate_pci_resources +ffffffff8185dca0 T ixgbe_allocate_queues +ffffffff8185e280 T ixgbe_allocate_msix +ffffffff8185e510 T ixgbe_allocate_legacy +ffffffff8185e670 T ixgbe_setup_interface +ffffffff8185ea60 T ixgbe_free_transmit_structures +ffffffff8185eaf0 T ixgbe_free_receive_structures +ffffffff8185ebc0 T ixgbe_free_pci_resources +ffffffff8185ecb0 T ixgbe_stop +ffffffff8185f040 T ixgbe_init +ffffffff8185fe70 T ixgbe_start +ffffffff81860080 T ixgbe_encap +ffffffff81860500 T ixgbe_ioctl +ffffffff818608e0 T ixgbe_rxrinfo +ffffffff81860a50 T ixgbe_get_sffpage +ffffffff81860c20 T ixgbe_disable_intr +ffffffff81860d10 T ixgbe_iff +ffffffff81860ea0 T ixgbe_enable_intr +ffffffff81860fc0 T ixgbe_enable_queues +ffffffff818610d0 T ixgbe_watchdog +ffffffff81861310 T ixgbe_setup_transmit_structures +ffffffff818613f0 T ixgbe_initialize_transmit_units +ffffffff81861730 T ixgbe_setup_receive_structures +ffffffff81861870 T ixgbe_initialize_receive_units +ffffffff81861df0 T ixgbe_config_gpie +ffffffff81861ed0 T ixgbe_setup_vlan_hw_support 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ixgbe_enable_mc_generic +ffffffff818693f0 T ixgbe_disable_mc_generic +ffffffff81869450 T ixgbe_enable_rx_generic +ffffffff81869540 T ixgbe_disable_rx_generic +ffffffff81869650 T ixgbe_fc_enable_generic +ffffffff81869b00 T ixgbe_setup_fc_generic +ffffffff81869e10 T ixgbe_fc_autoneg +ffffffff8186a140 T ixgbe_device_supports_autoneg_fc +ffffffff8186a240 T ixgbe_start_hw_gen2 +ffffffff8186a460 T ixgbe_identify_phy +ffffffff8186a4c0 T ixgbe_set_pci_config_data_generic +ffffffff8186a530 T ixgbe_disable_rx +ffffffff8186a570 T ixgbe_disable_pcie_master +ffffffff8186a6f0 T ixgbe_read_eerd_buffer_generic +ffffffff8186a850 T ixgbe_poll_eerd_eewr_done +ffffffff8186a900 T ixgbe_write_eewr_buffer_generic +ffffffff8186aaa0 T ixgbe_write_eewr_generic +ffffffff8186aaf0 T ixgbe_acquire_eeprom +ffffffff8186acd0 T ixgbe_get_eeprom_semaphore +ffffffff8186af60 T ixgbe_release_eeprom_semaphore +ffffffff8186afe0 T ixgbe_ready_eeprom +ffffffff8186b1b0 T ixgbe_shift_out_eeprom_bits +ffffffff8186b3e0 T ixgbe_shift_in_eeprom_bits +ffffffff8186b580 T ixgbe_standby_eeprom +ffffffff8186b6a0 T ixgbe_raise_eeprom_clk +ffffffff8186b720 T ixgbe_lower_eeprom_clk +ffffffff8186b7a0 T ixgbe_release_eeprom +ffffffff8186b8b0 T ixgbe_validate_mac_addr +ffffffff8186b910 T ixgbe_init_uta_tables +ffffffff8186b950 T ixgbe_add_uc_addr +ffffffff8186b9d0 T ixgbe_mta_vector +ffffffff8186ba90 T ixgbe_set_mta +ffffffff8186bb60 T ixgbe_negotiate_fc +ffffffff8186bc10 T ixgbe_fc_autoneg_fiber +ffffffff8186bd50 T ixgbe_fc_autoneg_backplane +ffffffff8186bef0 T ixgbe_fc_autoneg_copper +ffffffff8186c030 T ixgbe_disable_sec_rx_path_generic +ffffffff8186c110 T ixgbe_enable_sec_rx_path_generic +ffffffff8186c1c0 T ixgbe_enable_rx +ffffffff8186c200 T ixgbe_get_pcie_msix_count_generic +ffffffff8186c290 T ixgbe_insert_mac_addr_generic +ffffffff8186c4e0 T ixgbe_set_vmdq +ffffffff8186c520 T ixgbe_set_rar +ffffffff8186c570 T ixgbe_clear_vmdq +ffffffff8186c5b0 T ixgbe_clear_vmdq_generic +ffffffff8186c790 T ixgbe_set_vmdq_generic +ffffffff8186c860 T ixgbe_init_uta_tables_generic +ffffffff8186c8e0 T ixgbe_find_vlvf_slot +ffffffff8186c9a0 T ixgbe_set_vfta_generic +ffffffff8186cac0 T ixgbe_set_vlvf_generic +ffffffff8186cd90 T ixgbe_clear_vfta_generic +ffffffff8186cec0 T ixgbe_need_crosstalk_fix +ffffffff8186cf20 T ixgbe_check_mac_link_generic +ffffffff8186d140 T ixgbe_get_device_caps_generic +ffffffff8186d190 T ixgbe_calculate_checksum +ffffffff8186d250 T ixgbe_hic_unlocked +ffffffff8186d460 T ixgbe_host_interface_command +ffffffff8186d660 T ixgbe_clear_tx_pending +ffffffff8186d890 T ixgbe_mng_present +ffffffff8186d900 T ixgbe_mng_enabled +ffffffff8186d9d0 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff8186de10 T ixgbe_flap_tx_laser +ffffffff8186de50 T ixgbe_check_link +ffffffff8186dea0 T ixgbe_set_soft_rate_select_speed +ffffffff8186dfc0 T ixgbe_init_shared_code +ffffffff8186e0b0 T ixgbe_set_mac_type +ffffffff8186e250 T ixgbe_init_hw +ffffffff8186e290 T ixgbe_get_media_type +ffffffff8186e2d0 T ixgbe_read_mbx +ffffffff8186e330 T ixgbe_write_mbx +ffffffff8186e380 T ixgbe_check_for_msg +ffffffff8186e3c0 T ixgbe_check_for_ack +ffffffff8186e400 T ixgbe_check_for_rst +ffffffff8186e440 T ixgbe_poll_for_msg +ffffffff8186e510 T ixgbe_poll_for_ack +ffffffff8186e5e0 T ixgbe_read_posted_mbx +ffffffff8186e6d0 T ixgbe_write_posted_mbx +ffffffff8186e7c0 T ixgbe_init_mbx_ops_generic +ffffffff8186e800 T ixgbe_read_v2p_mailbox +ffffffff8186e870 T ixgbe_check_for_bit_pf +ffffffff8186e910 T ixgbe_check_for_msg_pf +ffffffff8186e9d0 T ixgbe_check_for_ack_pf +ffffffff8186ea80 T ixgbe_check_for_rst_pf +ffffffff8186eb90 T ixgbe_obtain_mbx_lock_pf +ffffffff8186ec30 T ixgbe_write_mbx_pf +ffffffff8186ee40 T ixgbe_read_mbx_pf +ffffffff8186ef80 T ixgbe_init_mbx_params_pf +ffffffff81870000 T ixgbe_set_pcie_completion_timeout +ffffffff818700b0 T ixgbe_init_ops_82598 +ffffffff81870210 T ixgbe_init_phy_ops_82598 +ffffffff81870330 T ixgbe_start_hw_82598 +ffffffff81870510 T ixgbe_reset_hw_82598 +ffffffff81870900 T ixgbe_get_media_type_82598 +ffffffff818709c0 T ixgbe_get_supported_physical_layer_82598 +ffffffff81870bb0 T ixgbe_read_analog_reg8_82598 +ffffffff81870c90 T ixgbe_write_analog_reg8_82598 +ffffffff81870d30 T ixgbe_set_lan_id_multi_port_pcie_82598 +ffffffff81870df0 T ixgbe_enable_rx_dma_82598 +ffffffff81870e50 T ixgbe_set_vmdq_82598 +ffffffff81870f10 T ixgbe_clear_vmdq_82598 +ffffffff81870fd0 T ixgbe_set_vfta_82598 +ffffffff81871120 T ixgbe_clear_vfta_82598 +ffffffff81871300 T ixgbe_fc_enable_82598 +ffffffff818717f0 T ixgbe_read_i2c_eeprom_82598 +ffffffff81871810 T ixgbe_check_mac_link_82598 +ffffffff81871b00 T ixgbe_setup_mac_link_82598 +ffffffff81871d00 T ixgbe_get_link_capabilities_82598 +ffffffff81871dd0 T ixgbe_setup_copper_link_82598 +ffffffff81871f20 T ixgbe_start_mac_link_82598 +ffffffff81872070 T ixgbe_validate_link_ready +ffffffff81872130 T ixgbe_read_i2c_phy_82598 +ffffffff81873000 T ixgbe_init_mac_link_ops_82599 +ffffffff818731d0 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff818732c0 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff81873360 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff818734f0 T ixgbe_setup_mac_link_82599 +ffffffff818737c0 T ixgbe_set_hard_rate_select_speed +ffffffff81873890 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff81873970 T ixgbe_setup_mac_link_smartspeed +ffffffff81873de0 T ixgbe_init_phy_ops_82599 +ffffffff81873f70 T ixgbe_read_i2c_byte_82599 +ffffffff81874130 T ixgbe_write_i2c_byte_82599 +ffffffff818742f0 T ixgbe_setup_copper_link_82599 +ffffffff81874360 T ixgbe_setup_sfp_modules_82599 +ffffffff81874590 T prot_autoc_read_82599 +ffffffff818746f0 T prot_autoc_write_82599 +ffffffff818748b0 T ixgbe_reset_pipeline_82599 +ffffffff81874ce0 T ixgbe_init_ops_82599 +ffffffff81874ef0 T ixgbe_identify_phy_82599 +ffffffff81874fa0 T ixgbe_reset_hw_82599 +ffffffff818753e0 T ixgbe_get_media_type_82599 +ffffffff81875510 T ixgbe_get_supported_physical_layer_82599 +ffffffff81875700 T ixgbe_enable_rx_dma_82599 +ffffffff81875790 T ixgbe_read_analog_reg8_82599 +ffffffff81875870 T ixgbe_write_analog_reg8_82599 +ffffffff81875910 T ixgbe_start_hw_82599 +ffffffff81875a40 T ixgbe_get_link_capabilities_82599 +ffffffff81875b90 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff81875c60 T ixgbe_read_eeprom_82599 +ffffffff81875c90 T ixgbe_start_mac_link_82599 +ffffffff81875ed0 T ixgbe_verify_fw_version_82599 +ffffffff81876000 T ixgbe_init_ops_X540 +ffffffff81876230 T ixgbe_init_eeprom_params_X540 +ffffffff818762c0 T ixgbe_read_eerd_X540 +ffffffff81876370 T ixgbe_write_eewr_X540 +ffffffff81876420 T ixgbe_update_eeprom_checksum_X540 +ffffffff81876520 T ixgbe_validate_eeprom_checksum_X540 +ffffffff81876640 T ixgbe_calc_eeprom_checksum_X540 +ffffffff81876810 T ixgbe_reset_hw_X540 +ffffffff81876a80 T ixgbe_get_media_type_X540 +ffffffff81876ab0 T ixgbe_get_supported_physical_layer_X540 +ffffffff81876b30 T ixgbe_start_hw_X540 +ffffffff81876b90 T ixgbe_acquire_swfw_sync_X540 +ffffffff818770d0 T ixgbe_release_swfw_sync_X540 +ffffffff81877250 T ixgbe_init_swfw_sync_X540 +ffffffff81877370 T ixgbe_setup_mac_link_X540 +ffffffff81877390 T ixgbe_blink_led_start_X540 +ffffffff818774d0 T ixgbe_blink_led_stop_X540 +ffffffff81877600 T ixgbe_get_link_capabilities_X540 +ffffffff81877650 T ixgbe_update_flash_X540 +ffffffff81877890 T ixgbe_poll_flash_update_done_X540 +ffffffff81877940 T ixgbe_get_swfw_sync_semaphore +ffffffff81877b10 T ixgbe_release_swfw_sync_semaphore +ffffffff81878000 T ixgbe_init_ops_X550 +ffffffff81878110 T ixgbe_dmac_config_X550 +ffffffff81878210 T ixgbe_dmac_config_tcs_X550 +ffffffff81878390 T ixgbe_dmac_update_tcs_X550 +ffffffff81878470 T ixgbe_set_source_address_pruning_X550 +ffffffff81878580 T ixgbe_init_eeprom_params_X550 +ffffffff81878610 T ixgbe_calc_eeprom_checksum_X550 +ffffffff81878630 T ixgbe_read_ee_hostif_X550 +ffffffff81878720 T ixgbe_write_ee_hostif_X550 +ffffffff818787f0 T ixgbe_update_eeprom_checksum_X550 +ffffffff818789f0 T ixgbe_validate_eeprom_checksum_X550 +ffffffff81878b80 T ixgbe_disable_rx_x550 +ffffffff81878cd0 T ixgbe_led_on_t_X550em +ffffffff81878da0 T ixgbe_led_off_t_X550em +ffffffff81878e70 T ixgbe_read_cs4227 +ffffffff81878ea0 T ixgbe_write_cs4227 +ffffffff81878ed0 T ixgbe_read_pe +ffffffff81878f20 T ixgbe_write_pe +ffffffff81878f80 T ixgbe_reset_cs4227 +ffffffff81879290 T ixgbe_check_cs4227 +ffffffff818794c0 T ixgbe_setup_mux_ctl +ffffffff81879560 T ixgbe_identify_phy_x550em +ffffffff818797a0 T ixgbe_read_mng_if_sel_x550em +ffffffff81879820 T ixgbe_fw_phy_activity +ffffffff81879950 T ixgbe_get_phy_id_fw +ffffffff81879ad0 T ixgbe_identify_phy_fw +ffffffff81879b20 T ixgbe_shutdown_fw_phy +ffffffff81879c00 T ixgbe_read_phy_reg_x550em +ffffffff81879c30 T ixgbe_write_phy_reg_x550em +ffffffff81879c60 T ixgbe_init_ops_X550EM +ffffffff81879f00 T ixgbe_get_bus_info_X550em +ffffffff81879f50 T ixgbe_get_media_type_X550em +ffffffff8187a020 T ixgbe_setup_sfp_modules_X550em +ffffffff8187a1b0 T ixgbe_get_link_capabilities_X550em +ffffffff8187a280 T ixgbe_reset_hw_X550em +ffffffff8187a7d0 T ixgbe_get_supported_physical_layer_X550em +ffffffff8187a980 T ixgbe_setup_fc_X550em +ffffffff8187aaf0 T ixgbe_init_phy_ops_X550em +ffffffff8187b010 T ixgbe_setup_fw_link +ffffffff8187b1d0 T ixgbe_fc_autoneg_fw +ffffffff8187b200 T ixgbe_setup_eee_fw +ffffffff8187b260 T ixgbe_init_ops_X550EM_a +ffffffff8187b3a0 T ixgbe_read_iosf_sb_reg_x550 +ffffffff8187b560 T ixgbe_write_iosf_sb_reg_x550 +ffffffff8187b720 T ixgbe_read_iosf_sb_reg_x550a +ffffffff8187b7c0 T ixgbe_write_iosf_sb_reg_x550a +ffffffff8187b850 T ixgbe_acquire_swfw_sync_X550a +ffffffff8187b9a0 T ixgbe_release_swfw_sync_X550a +ffffffff8187ba40 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff8187ba80 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff8187bc10 T ixgbe_setup_fc_backplane_x550em_a +ffffffff8187be40 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff8187bfd0 T ixgbe_init_ops_X550EM_x +ffffffff8187c0a0 T ixgbe_acquire_swfw_sync_X550em +ffffffff8187c170 T ixgbe_release_swfw_sync_X550em +ffffffff8187c210 T ixgbe_iosf_wait +ffffffff8187c2d0 T ixgbe_get_phy_token +ffffffff8187c360 T ixgbe_put_phy_token +ffffffff8187c3e0 T ixgbe_supported_sfp_modules_X550em +ffffffff8187c460 T ixgbe_identify_sfp_module_X550em +ffffffff8187c4e0 T ixgbe_init_mac_link_ops_X550em +ffffffff8187c630 T ixgbe_restart_an_internal_phy_x550em +ffffffff8187c760 T ixgbe_setup_sgmii +ffffffff8187c970 T ixgbe_setup_sgmii_fw +ffffffff8187cbb0 T ixgbe_setup_mac_link_sfp_x550a +ffffffff8187cdf0 T ixgbe_setup_mac_link_sfp_x550em +ffffffff8187ceb0 T ixgbe_setup_mac_link_t_X550em +ffffffff8187cf70 T ixgbe_check_link_t_X550em +ffffffff8187d070 T ixgbe_get_lasi_ext_t_x550em +ffffffff8187d230 T ixgbe_enable_lasi_ext_t_x550em +ffffffff8187d420 T ixgbe_setup_kr_speed_x550em +ffffffff8187d680 T ixgbe_reset_phy_fw +ffffffff8187d820 T ixgbe_check_overtemp_fw +ffffffff8187d9a0 T ixgbe_read_phy_reg_x550a +ffffffff8187da60 T ixgbe_write_phy_reg_x550a +ffffffff8187db30 T ixgbe_setup_kr_x550em +ffffffff8187dba0 T ixgbe_setup_internal_phy_t_x550em +ffffffff8187dd30 T ixgbe_enter_lplu_t_x550em +ffffffff8187e000 T ixgbe_handle_lasi_ext_t_x550em +ffffffff8187e080 T ixgbe_reset_phy_t_X550em +ffffffff8187e0e0 T ixgbe_set_mdio_speed +ffffffff8187e1c0 T ixgbe_init_ext_t_x550em +ffffffff8187e290 T ixgbe_setup_sfi_x550a +ffffffff8187e480 T ixgbe_setup_ixfi_x550em_x +ffffffff8187e6b0 T ixgbe_setup_ixfi_x550em +ffffffff8187e8d0 T ixgbe_ext_phy_t_x550em_get_link +ffffffff8187e970 T ixgbe_setup_phy_loopback_x550em +ffffffff8187eba0 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff8187ed60 T ixgbe_write_ee_hostif_data_X550 +ffffffff8187edd0 T ixgbe_checksum_ptr_x550 +ffffffff8187ef60 T ixgbe_calc_checksum_X550 +ffffffff8187f100 T ixgbe_update_flash_X550 +ffffffff8187f160 T ixgbe_get_lcd_t_x550em +ffffffff8187f220 T ixgbe_set_mux +ffffffff81880000 T ixgbe_read_i2c_combined_generic_int +ffffffff81880330 T ixgbe_i2c_start +ffffffff818804e0 t ixgbe_out_i2c_byte_ack +ffffffff81880530 T ixgbe_clock_in_i2c_byte +ffffffff81880670 T ixgbe_clock_out_i2c_bit +ffffffff818807c0 T ixgbe_i2c_stop +ffffffff818809a0 T ixgbe_i2c_bus_clear +ffffffff81880b00 T ixgbe_read_i2c_combined_generic +ffffffff81880b20 T ixgbe_read_i2c_combined_generic_unlocked +ffffffff81880b40 T ixgbe_write_i2c_combined_generic_int +ffffffff81880d80 T ixgbe_write_i2c_combined_generic +ffffffff81880da0 T ixgbe_write_i2c_combined_generic_unlocked +ffffffff81880dc0 T ixgbe_init_phy_ops_generic +ffffffff81880ef0 T ixgbe_identify_phy_generic +ffffffff81880fd0 T ixgbe_reset_phy_generic +ffffffff81881220 T ixgbe_read_phy_reg_generic +ffffffff818812e0 T ixgbe_write_phy_reg_generic +ffffffff818813a0 T ixgbe_read_phy_reg_mdi +ffffffff81881550 T ixgbe_write_phy_reg_mdi +ffffffff818816f0 T ixgbe_setup_phy_link_generic +ffffffff81881a00 T ixgbe_setup_phy_link_speed_generic +ffffffff81881a60 T ixgbe_get_phy_firmware_version_generic +ffffffff81881a90 T ixgbe_read_i2c_byte_generic +ffffffff81881ab0 T ixgbe_write_i2c_byte_generic +ffffffff81881ad0 T ixgbe_read_i2c_eeprom_generic +ffffffff81881b00 T ixgbe_write_i2c_eeprom_generic +ffffffff81881b20 T ixgbe_identify_module_generic +ffffffff81881ba0 T ixgbe_read_i2c_byte_generic_unlocked +ffffffff81881bc0 T ixgbe_write_i2c_byte_generic_unlocked +ffffffff81881be0 T ixgbe_tn_check_overtemp +ffffffff81881c60 t ixgbe_probe_phy +ffffffff81881e90 T ixgbe_check_reset_blocked +ffffffff81881ef0 T ixgbe_validate_phy_addr +ffffffff81881f60 T ixgbe_get_phy_id +ffffffff81882020 T ixgbe_get_phy_type_from_id +ffffffff818820e0 T ixgbe_get_copper_link_capabilities_generic +ffffffff818821d0 T ixgbe_get_copper_speeds_supported +ffffffff81882290 T ixgbe_check_phy_link_tnx +ffffffff81882600 T ixgbe_setup_phy_link_tnx +ffffffff81882900 T ixgbe_get_phy_firmware_version_tnx +ffffffff81882930 T ixgbe_reset_phy_nl +ffffffff81882c40 T ixgbe_get_sfp_init_sequence_offsets +ffffffff81882e90 T ixgbe_is_sfp +ffffffff81882ee0 T ixgbe_identify_sfp_module_generic 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ixl_722_set_rss_lut +ffffffff818871b0 t ixl_dmamem_alloc +ffffffff81887340 t ixl_arq +ffffffff81887640 t ixl_arq_fill +ffffffff81887900 t ixl_pxe_clear +ffffffff818879c0 t ixl_get_mac +ffffffff81887bf0 t ixl_hmc +ffffffff81888360 t ixl_lldp_shut +ffffffff81888400 t ixl_phy_mask_ints +ffffffff818884d0 t ixl_restart_an +ffffffff818885a0 t ixl_get_switch_config +ffffffff818887e0 t ixl_get_phy_types +ffffffff81888a30 t ixl_get_link_status +ffffffff81888b20 t ixl_get_vsi +ffffffff81888ca0 t ixl_set_vsi +ffffffff81888e30 t ixl_intr0 +ffffffff818890d0 t ixl_intr_vector +ffffffff81889190 t ixl_ioctl +ffffffff8188b1d0 t ixl_start +ffffffff8188b7d0 t ixl_watchdog +ffffffff8188b800 t ixl_media_change +ffffffff8188b830 t ixl_media_status +ffffffff8188b8c0 t ixl_media_add +ffffffff8188b960 t ixl_link_state_update +ffffffff8188bae0 t ixl_remove_macvlan +ffffffff8188bbe0 t ixl_add_macvlan +ffffffff8188bcd0 t ixl_kstat_attach +ffffffff8188bda0 t ixl_dmamem_free +ffffffff8188be30 t ixl_hmc_free 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iwm_fill_sf_command +ffffffff81920860 T iwm_send_soc_conf +ffffffff819209b0 T iwm_send_update_mcc_cmd +ffffffff81920b70 T iwm_send_temp_report_ths_cmd +ffffffff81920c50 T iwm_tt_tx_backoff +ffffffff81920cf0 T iwm_fill_paging_mem +ffffffff819210a0 T iwm_alloc_fw_paging_mem +ffffffff819214d0 T iwm_init_hw +ffffffff81921cd0 T iwm_preinit +ffffffff81921ed0 T iwm_start +ffffffff819220c0 T iwm_watchdog +ffffffff81922290 T iwm_nic_error +ffffffff81922900 T iwm_dump_driver_status +ffffffff819229c0 T iwm_ioctl +ffffffff81922b60 T iwm_nic_umac_error +ffffffff81923100 T iwm_desc_lookup +ffffffff81923290 T iwm_rx_pkt_valid +ffffffff819232e0 T iwm_rx_pkt +ffffffff81924230 T iwm_notif_intr +ffffffff819243c0 T iwm_intr +ffffffff81924880 T iwm_intr_msix +ffffffff81924b90 T iwm_match +ffffffff81924bc0 T iwm_attach_hook +ffffffff81924c00 T iwm_attach +ffffffff81925ba0 T iwm_radiotap_attach +ffffffff81925c40 T iwm_init_task +ffffffff81925d30 T iwm_resume +ffffffff81925eb0 T iwm_wakeup +ffffffff81925f80 T iwm_activate +ffffffff81927000 T iwx_lookup_cmd_ver +ffffffff81927070 T iwx_lookup_notif_ver +ffffffff819270e0 T iwx_is_mimo_ht_plcp +ffffffff81927120 T iwx_store_cscheme +ffffffff81927170 T iwx_ctxt_info_alloc_dma +ffffffff81927220 T iwx_dma_contig_alloc +ffffffff81927470 T iwx_ctxt_info_free_paging +ffffffff81927600 T iwx_dma_contig_free +ffffffff819276f0 T iwx_get_num_sections +ffffffff81927770 T iwx_init_fw_sec +ffffffff81927c00 T iwx_fw_version_str +ffffffff81927c40 T iwx_alloc_fw_monitor_block +ffffffff81927cf0 T iwx_alloc_fw_monitor +ffffffff81927dc0 T iwx_apply_debug_destination +ffffffff81928390 T iwx_nic_lock +ffffffff81928510 T iwx_write_prph +ffffffff819285c0 T iwx_set_bits_prph +ffffffff819285e0 T iwx_clear_bits_prph +ffffffff81928600 T iwx_read_prph +ffffffff819286a0 T iwx_nic_unlock +ffffffff81928760 T iwx_set_ltr +ffffffff819288c0 T iwx_ctxt_info_init +ffffffff81928c20 T iwx_ctxt_info_free_fw_img +ffffffff81928dd0 T iwx_ctxt_info_gen3_init +ffffffff81929520 T iwx_write_umac_prph +ffffffff819295d0 T iwx_firmware_store_section +ffffffff81929670 T iwx_set_default_calib +ffffffff819296c0 T iwx_fw_info_free +ffffffff81929770 T iwx_read_firmware +ffffffff8192a2e0 T iwx_prph_addr_mask +ffffffff8192a320 T iwx_read_prph_unlocked +ffffffff8192a3a0 T iwx_nic_assert_locked +ffffffff8192a400 T iwx_write_prph_unlocked +ffffffff8192a490 T iwx_write_prph64 +ffffffff8192a5d0 T iwx_read_umac_prph_unlocked +ffffffff8192a660 T iwx_read_umac_prph +ffffffff8192a710 T iwx_write_umac_prph_unlocked +ffffffff8192a7a0 T iwx_read_mem +ffffffff8192a900 T iwx_write_mem +ffffffff8192aa70 T iwx_write_mem32 +ffffffff8192aba0 T iwx_poll_bit +ffffffff8192ac90 T iwx_set_bits_mask_prph +ffffffff8192aec0 T iwx_alloc_rx_ring +ffffffff8192b0d0 T iwx_rx_addbuf +ffffffff8192b320 T iwx_free_rx_ring +ffffffff8192b690 T iwx_disable_rx_dma +ffffffff8192b920 T iwx_reset_rx_ring +ffffffff8192b9c0 T iwx_alloc_tx_ring +ffffffff8192bc00 T iwx_free_tx_ring +ffffffff8192bf60 T iwx_reset_tx_ring +ffffffff8192c200 T iwx_enable_rfkill_int +ffffffff8192c300 T iwx_check_rfkill +ffffffff8192c390 T iwx_enable_interrupts +ffffffff8192c450 T iwx_enable_fwload_interrupt +ffffffff8192c540 T iwx_restore_interrupts +ffffffff8192c570 T iwx_disable_interrupts +ffffffff8192c640 T iwx_ict_reset +ffffffff8192c850 T iwx_set_hw_ready +ffffffff8192cab0 T iwx_prepare_card_hw +ffffffff8192cc30 T iwx_force_power_gating +ffffffff8192cd00 T iwx_apm_config +ffffffff8192ce00 T iwx_apm_init +ffffffff8192d0f0 T iwx_apm_stop +ffffffff8192d5d0 T iwx_init_msix_hw +ffffffff8192d690 T iwx_conf_msix_hw +ffffffff8192dd60 T iwx_clear_persistence_bit +ffffffff8192df20 T iwx_start_hw +ffffffff8192e400 T iwx_stop_device +ffffffff8192eaf0 T iwx_nic_config +ffffffff8192eb80 T iwx_nic_rx_init +ffffffff8192ebe0 T iwx_nic_init +ffffffff8192ed30 T iwx_enable_txq +ffffffff8192f050 T iwx_send_cmd +ffffffff8192f6a0 T iwx_free_resp +ffffffff8192f720 T iwx_disable_txq +ffffffff8192f990 T iwx_post_alive +ffffffff8192fa30 T iwx_schedule_session_protection +ffffffff8192fb10 T iwx_send_cmd_pdu +ffffffff8192fba0 T iwx_unprotect_session +ffffffff8192fc80 T iwx_fw_valid_tx_ant +ffffffff8192fcc0 T iwx_fw_valid_rx_ant +ffffffff8192fd10 T iwx_init_channel_map +ffffffff8192ff20 T iwx_mimo_enabled +ffffffff8192ff60 T iwx_setup_ht_rates +ffffffff81930010 T iwx_setup_vht_rates +ffffffff819300a0 T iwx_init_reorder_buffer +ffffffff81930100 T iwx_clear_reorder_buffer +ffffffff819301d0 T iwx_rx_ba_session_expired +ffffffff81930300 T iwx_rx_bar_frame_release +ffffffff819303b0 T iwx_release_frames +ffffffff819305c0 T iwx_reorder_timer_expired +ffffffff819307b0 T iwx_find_rxba_data +ffffffff81930840 T iwx_sta_rx_agg_baid_cfg_cmd +ffffffff81930a90 T iwx_send_cmd_pdu_status +ffffffff81930b20 T iwx_sta_rx_agg_sta_cmd +ffffffff81930d80 T iwx_sta_rx_agg +ffffffff819310a0 T iwx_mac_ctxt_task +ffffffff81931260 T iwx_mac_ctxt_cmd +ffffffff81931480 T iwx_phy_ctxt_task +ffffffff81931650 T iwx_phy_ctxt_update +ffffffff81931ae0 T iwx_updatechan +ffffffff81931bc0 T iwx_add_task +ffffffff81931c50 T iwx_updateprot +ffffffff81931d30 T iwx_updateslot +ffffffff81931e10 T iwx_updateedca +ffffffff81931ef0 T iwx_updatedtim +ffffffff81931fd0 T iwx_sta_tx_agg_start +ffffffff81932200 T iwx_ba_task +ffffffff81932380 T iwx_ampdu_rx_start +ffffffff81932480 T iwx_ampdu_rx_stop +ffffffff81932580 T iwx_ampdu_tx_start +ffffffff81932630 T iwx_set_mac_addr_from_csr +ffffffff81932890 T iwx_flip_hw_address +ffffffff819328e0 T iwx_is_valid_mac_addr +ffffffff81932990 T iwx_nvm_get +ffffffff81932cb0 T iwx_load_firmware +ffffffff81932ee0 T iwx_start_fw +ffffffff81933120 T iwx_pnvm_handle_section +ffffffff81933470 T iwx_ctxt_info_gen3_set_pnvm +ffffffff819334c0 T iwx_pnvm_parse +ffffffff819335b0 T iwx_load_pnvm +ffffffff819339e0 T iwx_send_tx_ant_cfg +ffffffff81933a80 T iwx_send_phy_cfg_cmd +ffffffff81933b30 T iwx_send_dqa_cmd +ffffffff81933bd0 T iwx_load_ucode_wait_alive +ffffffff81933cc0 T iwx_run_init_mvm_ucode +ffffffff81933f70 T iwx_config_ltr +ffffffff81934030 T iwx_update_rx_desc +ffffffff819340d0 T iwx_rxmq_get_signal_strength +ffffffff81934120 T iwx_rx_rx_phy_cmd +ffffffff81934190 T iwx_get_noise +ffffffff81934200 T iwx_ccmp_decap +ffffffff81934360 T iwx_rx_hwdecrypt +ffffffff81934470 T iwx_rx_frame +ffffffff81934750 T iwx_detect_duplicate +ffffffff81934870 T iwx_is_sn_less +ffffffff819348d0 T iwx_oldsn_workaround +ffffffff819349a0 T iwx_rx_reorder +ffffffff81934f70 T iwx_rx_mpdu_mq +ffffffff819352f0 T iwx_clear_tx_desc +ffffffff81935490 T iwx_txd_done +ffffffff81935580 T iwx_txq_advance +ffffffff819358d0 T iwx_tx_update_byte_tbl +ffffffff81935970 T iwx_rx_tx_cmd +ffffffff81935af0 T iwx_clear_oactive +ffffffff81935b70 T iwx_rx_compressed_ba +ffffffff81935d00 T iwx_rx_bmiss +ffffffff81935e10 T iwx_binding_cmd +ffffffff81935fa0 T iwx_get_vht_ctrl_pos +ffffffff81936010 T iwx_phy_ctxt_cmd_uhb_v3_v4 +ffffffff81936280 T iwx_phy_ctxt_cmd_v3_v4 +ffffffff819364f0 T iwx_phy_ctxt_cmd +ffffffff81936610 T iwx_send_cmd_status +ffffffff81936740 T iwx_cmd_done +ffffffff81936850 T iwx_fw_rateidx_ofdm +ffffffff819368b0 T iwx_fw_rateidx_cck +ffffffff81936910 T iwx_tx_fill_cmd +ffffffff81936bb0 T iwx_rval2ridx +ffffffff81936c40 T iwx_tx +ffffffff81937440 T iwx_flush_sta_tids +ffffffff81937610 T iwx_drain_sta +ffffffff819377c0 T iwx_flush_sta +ffffffff81937ab0 T iwx_beacon_filter_send_cmd +ffffffff81937b40 T iwx_update_beacon_abort +ffffffff81937c50 T iwx_power_build_cmd +ffffffff81937ce0 T iwx_power_mac_update_mode +ffffffff81937f10 T iwx_power_update_device +ffffffff81937fc0 T iwx_enable_beacon_filter +ffffffff819380e0 T iwx_disable_beacon_filter +ffffffff819381e0 T iwx_add_sta_cmd +ffffffff819384f0 T iwx_rm_sta_cmd +ffffffff819385c0 T iwx_rm_sta +ffffffff81938a80 T iwx_disable_mgmt_queue +ffffffff81938b80 T iwx_umac_scan_fill_channels +ffffffff81938ca0 T iwx_fill_probe_req +ffffffff81938f10 T iwx_config_umac_scan_reduced +ffffffff81939080 T iwx_scan_umac_flags_v2 +ffffffff819390c0 T iwx_scan_umac_dwell_v10 +ffffffff81939130 T iwx_scan_umac_fill_general_p_v10 +ffffffff819391c0 T iwx_scan_umac_fill_ch_p_v6 +ffffffff819392f0 T iwx_umac_scan_v14 +ffffffff81939610 T iwx_mcc_update +ffffffff819396b0 T iwx_ridx2rate +ffffffff81939720 T iwx_ack_rates +ffffffff819399e0 T iwx_mac_ctxt_cmd_common +ffffffff81939d00 T iwx_mac_ctxt_cmd_fill_sta +ffffffff81939d90 T iwx_clear_statistics +ffffffff81939e70 T iwx_del_task +ffffffff81939ed0 T iwx_scan +ffffffff8193a0b0 T iwx_scan_abort +ffffffff8193a160 T iwx_bgscan +ffffffff8193a200 T iwx_bgscan_done +ffffffff8193a2d0 T iwx_bgscan_done_task +ffffffff8193a680 T iwx_umac_scan_abort +ffffffff8193a720 T iwx_enable_mgmt_queue +ffffffff8193a7b0 T iwx_rs_rval2idx +ffffffff8193a820 T iwx_rs_ht_rates +ffffffff8193a8f0 T iwx_rs_vht_rates +ffffffff8193a9b0 T iwx_rs_init_v3 +ffffffff8193adc0 T iwx_rs_init_v4 +ffffffff8193b1f0 T iwx_rs_init +ffffffff8193b250 T iwx_rs_update +ffffffff8193b4f0 T iwx_phy_send_rlc +ffffffff8193b5e0 T iwx_auth +ffffffff8193b9b0 T iwx_deauth +ffffffff8193bc90 T iwx_run +ffffffff8193c1a0 T iwx_sf_config +ffffffff8193c3c0 T iwx_allow_mcast +ffffffff8193c4e0 T iwx_run_stop +ffffffff8193c810 T iwx_node_alloc +ffffffff8193c830 T iwx_set_key +ffffffff8193c990 T iwx_add_sta_key +ffffffff8193cc30 T iwx_setkey_task +ffffffff8193cd40 T iwx_delete_key +ffffffff8193cee0 T iwx_media_change +ffffffff8193cf60 T iwx_stop +ffffffff8193d4a0 T iwx_init +ffffffff8193d7c0 T iwx_newstate_task +ffffffff8193d950 T iwx_newstate +ffffffff8193db70 T iwx_endscan +ffffffff8193dbc0 T iwx_fill_sf_command +ffffffff8193dc90 T iwx_send_bt_init_conf +ffffffff8193dd30 T iwx_send_soc_conf +ffffffff8193de80 T iwx_send_update_mcc_cmd +ffffffff8193e020 T iwx_send_temp_report_ths_cmd +ffffffff8193e100 T iwx_init_hw +ffffffff8193e7b0 T iwx_preinit +ffffffff8193e9f0 T iwx_start +ffffffff8193ebe0 T iwx_watchdog +ffffffff8193ee00 T iwx_nic_error +ffffffff8193f470 T iwx_dump_driver_status +ffffffff8193f710 T iwx_ioctl +ffffffff8193f8b0 T iwx_nic_umac_error +ffffffff8193fe50 T iwx_desc_lookup +ffffffff8193ffe0 T iwx_rx_pkt_valid +ffffffff81940030 T iwx_rx_pkt +ffffffff819411d0 T iwx_notif_intr +ffffffff81941350 T iwx_intr +ffffffff81941870 T iwx_intr_msix +ffffffff81941bd0 T iwx_match +ffffffff81941c00 T iwx_attach_hook +ffffffff81941c40 T iwx_find_device_cfg +ffffffff81941df0 T iwx_attach +ffffffff81943080 T iwx_radiotap_attach +ffffffff81943120 T iwx_init_task +ffffffff81943210 T iwx_resume +ffffffff81943390 T iwx_wakeup +ffffffff819434b0 T iwx_activate +ffffffff81944000 T qwx_pci_match +ffffffff81944030 T qwx_pci_attach +ffffffff81944d30 T qwx_pci_detach +ffffffff81944fa0 T qwx_pci_init_qmi_ce_config +ffffffff81944fc0 T qwx_pcic_init_msi_config +ffffffff81945070 T qwx_pci_alloc_msi +ffffffff81945170 T qwx_pcic_map_service_to_pipe +ffffffff81945270 T qwx_pcic_get_user_msi_vector +ffffffff81945360 T qwx_pcic_read32 +ffffffff81945460 T qwx_pcic_write32 +ffffffff81945570 T qwx_pci_start +ffffffff81945690 T qwx_pci_stop +ffffffff81945710 T qwx_pci_power_up +ffffffff81945870 T qwx_pci_power_down +ffffffff81945b10 T qwx_mhi_submit_xfer +ffffffff81945db0 T qwx_pcic_ext_irq_enable +ffffffff81945de0 T qwx_pcic_ext_irq_disable +ffffffff81945e10 T qwx_pci_intr +ffffffff81946180 T qwx_pci_intr_mhi_ctrl +ffffffff819461d0 T qwx_pci_intr_mhi_data +ffffffff81946220 T qwx_pci_read_hw_version +ffffffff819462a0 T qwx_pci_alloc_event_rings +ffffffff81946520 T qwx_pci_init_cmd_ring +ffffffff819465b0 T qwx_mhi_register +ffffffff819465e0 T qwx_pcic_config_irq +ffffffff81946890 T qwx_pci_attach_hook +ffffffff819468e0 T qwx_pci_free_cmd_ring +ffffffff81946960 T qwx_pci_free_event_rings +ffffffff81946a60 T qwx_pci_free_xfer_rings +ffffffff81946b50 T qwx_pci_alloc_xfer_ring +ffffffff81946ea0 T qwx_pci_alloc_xfer_rings_qca6390 +ffffffff81946fd0 T qwx_pci_alloc_xfer_rings_qcn9074 +ffffffff81947100 T qwx_pci_alloc_event_ring +ffffffff819471f0 T qwx_pci_read +ffffffff81947220 T qwx_pci_write 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+ffffffff81948c60 T qwx_pci_clear_all_intrs +ffffffff81948d60 T qwx_pci_set_wlaon_pwr_ctrl +ffffffff81948f20 T qwx_pci_force_wake +ffffffff81949010 T qwx_pci_sw_reset +ffffffff81949200 T qwx_mhi_clear_vector +ffffffff819492b0 T qwx_mhi_reset_device +ffffffff81949440 T qwx_pci_msi_config +ffffffff819494b0 T qwx_pci_msi_enable +ffffffff81949510 T qwx_pci_msi_disable +ffffffff81949570 T qwx_pci_aspm_disable +ffffffff81949610 T qwx_mhi_start +ffffffff819499b0 T qwx_mhi_stop +ffffffff819499d0 T qwx_mhi_unregister +ffffffff81949a00 T qwx_mhi_ring_doorbell +ffffffff81949a70 T qwx_mhi_init_xfer_rings +ffffffff81949be0 T qwx_mhi_init_event_rings +ffffffff81949d30 T qwx_mhi_init_cmd_ring +ffffffff81949db0 T qwx_mhi_init_dev_ctxt +ffffffff81949f80 T qwx_pci_cmd_ring_get_elem +ffffffff81949fe0 T qwx_mhi_cmd_ring_submit +ffffffff8194a130 T qwx_mhi_send_cmd +ffffffff8194a210 T qwx_pci_xfer_ring_get_elem +ffffffff8194a260 T qwx_pci_xfer_ring_get_data +ffffffff8194a2b0 T qwx_mhi_start_channel +ffffffff8194a5c0 T qwx_mhi_start_channels +ffffffff8194a6f0 T qwx_rddm_prepare +ffffffff8194a9c0 T qwx_mhi_fw_load_handler +ffffffff8194ac30 T qwx_mhi_await_device_reset +ffffffff8194ad00 T qwx_mhi_fw_load_bhi +ffffffff8194afa0 T qwx_mhi_fw_load_bhie +ffffffff8194b370 T qwx_mhi_await_device_ready +ffffffff8194b510 T qwx_mhi_ready_state_transition +ffffffff8194b710 T qwx_mhi_init_mmio +ffffffff8194ba90 T qwx_mhi_set_state +ffffffff8194bb10 T qwx_mhi_mission_mode_state_transition +ffffffff8194bc90 T qwx_mhi_low_power_mode_state_transition +ffffffff8194bd00 T qwx_pci_event_ring_get_elem +ffffffff8194bd50 T qwx_mhi_state_change +ffffffff8194c100 T qwx_pci_intr_ctrl_event_mhi +ffffffff8194c140 T qwx_pci_intr_ctrl_event_ee +ffffffff8194c180 T qwx_pci_intr_ctrl_event_cmd_complete +ffffffff8194c2d0 T qwx_pci_intr_ctrl_event +ffffffff8194c580 T qwx_pci_intr_data_event_tx +ffffffff8194c940 T qwx_pci_intr_data_event +ffffffff8194d000 T cmpci_match +ffffffff8194d030 T cmpci_attach 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bge_stats_update_regs +ffffffff8195fd50 T bge_stats_update +ffffffff8195fea0 T bge_compact_dma_runt +ffffffff819600e0 T bge_cksum_pad +ffffffff819601e0 T bge_encap +ffffffff81960570 T bge_rxrinfo +ffffffff819606f0 T bge_stop_block +ffffffff819607e0 T bge_kstat_read +ffffffff81961000 T bnx_probe +ffffffff81961030 T bnx_attach +ffffffff819614a0 T nswaph +ffffffff819614f0 T bnx_read_firmware +ffffffff819620e0 T bnx_read_rv2p +ffffffff81962220 T bnx_reg_rd_ind +ffffffff81962280 T bnx_intr +ffffffff81962550 T bnx_attachhook +ffffffff81962a00 T bnx_release_resources +ffffffff81962a80 T bnx_reset +ffffffff819630d0 T bnx_chipinit +ffffffff819633d0 T bnx_nvram_test +ffffffff81963560 T bnx_get_mac_addr +ffffffff819636a0 T bnx_get_media +ffffffff81963860 T bnx_dma_alloc +ffffffff81964310 T bnx_ioctl +ffffffff81964570 T bnx_start +ffffffff81964740 T bnx_watchdog +ffffffff819647e0 T bnx_miibus_read_reg +ffffffff81964ac0 T bnx_miibus_write_reg +ffffffff81964d60 T bnx_miibus_statchg +ffffffff81964f70 T bnx_init_media +ffffffff81965020 T bnx_ifmedia_upd +ffffffff819650b0 T bnx_ifmedia_sts +ffffffff81965130 T bnx_tick +ffffffff81965270 T bnx_rxrefill +ffffffff819652d0 T bnx_mgmt_init +ffffffff81965420 T bnx_reg_wr_ind +ffffffff81965480 T bnx_ctx_wr +ffffffff819656e0 T bnx_acquire_nvram_lock +ffffffff819657b0 T bnx_release_nvram_lock +ffffffff81965880 T bnx_enable_nvram_access +ffffffff819658e0 T bnx_disable_nvram_access +ffffffff81965940 T bnx_nvram_read_dword +ffffffff81965af0 T bnx_init_nvram +ffffffff81966320 T bnx_nvram_read +ffffffff819666d0 T bnx_dma_free +ffffffff81966d40 T bnx_fw_sync +ffffffff81966f60 T bnx_load_rv2p_fw +ffffffff81967090 T bnx_load_cpu_fw +ffffffff81967660 T bnx_init_cpus +ffffffff81968070 T bnx_init_context +ffffffff81968960 T bnx_set_mac_addr +ffffffff819689e0 T bnx_stop +ffffffff81968d70 T bnx_disable_intr +ffffffff81968dd0 T bnx_free_rx_chain +ffffffff81968ec0 T bnx_free_tx_chain +ffffffff81968ff0 T bnx_blockinit +ffffffff819696e0 T bnx_get_buf +ffffffff819698d0 T bnx_init_tx_context +ffffffff819699a0 T bnx_init_tx_chain +ffffffff81969b00 T bnx_init_rx_context +ffffffff81969be0 T bnx_fill_rx_chain +ffffffff81969d40 T bnx_init_rx_chain +ffffffff81969e70 T bnx_phy_intr +ffffffff81969f20 T bnx_rx_intr +ffffffff8196a2e0 T bnx_tx_intr +ffffffff8196a460 T bnx_enable_intr +ffffffff8196a530 T bnx_init +ffffffff8196aa30 T bnx_iff +ffffffff8196aef0 T bnx_tx_encap +ffffffff8196b150 T bnx_stats_update +ffffffff8196c000 T vge_probe +ffffffff8196c030 T vge_attach +ffffffff8196c510 T vge_detach +ffffffff8196c610 T vge_read_eeprom +ffffffff8196c740 T vge_miipoll_stop +ffffffff8196c820 T vge_miipoll_start +ffffffff8196c9b0 T vge_miibus_readreg +ffffffff8196cc10 T vge_miibus_writereg +ffffffff8196ce60 T vge_cam_clear +ffffffff8196d2c0 T vge_cam_set +ffffffff8196d770 T vge_iff +ffffffff8196d950 T vge_reset +ffffffff8196db50 T vge_allocmem +ffffffff8196e030 T vge_freemem +ffffffff8196e1d0 T vge_intr +ffffffff8196e420 T vge_ioctl +ffffffff8196e5b0 T vge_start +ffffffff8196e800 T vge_watchdog +ffffffff8196e8a0 T vge_miibus_statchg +ffffffff8196eb40 T vge_ifmedia_upd +ffffffff8196eb60 T vge_ifmedia_sts +ffffffff8196ebd0 T vge_tick +ffffffff8196ecd0 T vge_stop +ffffffff8196ef40 T vge_newbuf +ffffffff8196f190 T vge_tx_list_init +ffffffff8196f250 T vge_rx_list_init +ffffffff8196f370 T vge_rxeof +ffffffff8196f820 T vge_txeof +ffffffff8196f9c0 T vge_init +ffffffff81970370 T vge_encap +ffffffff81971000 T stge_match +ffffffff81971030 T stge_attach +ffffffff81971930 T stge_mii_bitbang_read +ffffffff81971980 T stge_mii_bitbang_write +ffffffff819719b0 T stge_tick +ffffffff81971b50 T stge_intr +ffffffff81971ef0 T stge_reset +ffffffff81972000 T stge_read_eeprom +ffffffff81972170 T stge_mii_readreg +ffffffff81972190 T stge_mii_writereg +ffffffff819721b0 T stge_mii_statchg +ffffffff81972200 T stge_mediachange +ffffffff81972250 T stge_mediastatus +ffffffff819722c0 T stge_ioctl +ffffffff81972450 T stge_start +ffffffff819727c0 T stge_watchdog +ffffffff81972870 T stge_txintr +ffffffff819729e0 T stge_init +ffffffff81973380 T stge_stop +ffffffff81973630 T stge_iff +ffffffff81973770 T stge_rxintr +ffffffff81973ce0 T stge_stats_update +ffffffff81973e40 T stge_add_rxbuf +ffffffff81974090 T stge_rxdrain +ffffffff81975000 T nfe_match +ffffffff81975030 T nfe_attach +ffffffff819757f0 T nfe_activate +ffffffff81975870 T nfe_stop +ffffffff81975a30 T nfe_init +ffffffff81976120 T nfe_intr +ffffffff81976230 T nfe_get_macaddr +ffffffff81976330 T nfe_alloc_tx_ring +ffffffff81976580 T nfe_alloc_rx_ring +ffffffff81976950 T nfe_free_tx_ring +ffffffff81976b00 T nfe_ioctl +ffffffff81976c90 T nfe_start +ffffffff81976ec0 T nfe_watchdog +ffffffff81976f30 T nfe_wol +ffffffff81976fb0 T nfe_miibus_readreg +ffffffff81977170 T nfe_miibus_writereg +ffffffff81977310 T nfe_miibus_statchg +ffffffff819774b0 T nfe_ifmedia_upd +ffffffff81977510 T nfe_ifmedia_sts +ffffffff81977580 T nfe_tick +ffffffff819775f0 T nfe_rxeof +ffffffff81977a30 T nfe_txeof +ffffffff81977d00 T nfe_iff +ffffffff81978020 T nfe_txdesc32_sync +ffffffff81978060 T nfe_txdesc64_sync +ffffffff819780a0 T nfe_txdesc32_rsync +ffffffff81978140 T nfe_txdesc64_rsync +ffffffff819781e0 T nfe_rxdesc32_sync +ffffffff81978220 T nfe_rxdesc64_sync +ffffffff81978260 T nfe_encap +ffffffff81978530 T nfe_set_macaddr +ffffffff819785a0 T nfe_reset_tx_ring +ffffffff81978700 T nfe_reset_rx_ring +ffffffff819787e0 T nfe_free_rx_ring +ffffffff81979000 T et_match +ffffffff81979030 T et_attach +ffffffff819795e0 T et_detach +ffffffff81979720 T et_intr +ffffffff81979850 T et_bus_config +ffffffff81979900 T et_get_eaddr +ffffffff81979990 T et_reset +ffffffff81979a50 T et_disable_intrs +ffffffff81979a80 T et_dma_alloc +ffffffff81979cb0 T et_ioctl +ffffffff81979e70 T et_start +ffffffff8197a060 T et_watchdog +ffffffff8197a0b0 T et_chip_attach +ffffffff8197a1e0 T et_miibus_readreg +ffffffff8197a370 T et_miibus_writereg +ffffffff8197a4c0 T et_miibus_statchg +ffffffff8197a5d0 T et_ifmedia_upd +ffffffff8197a660 T et_ifmedia_sts +ffffffff8197a6d0 T et_tick +ffffffff8197a740 T et_txtick +ffffffff8197a790 T et_stop +ffffffff8197aa50 T et_dma_free +ffffffff8197ac90 T et_stop_rxdma +ffffffff8197ad60 T et_stop_txdma +ffffffff8197adc0 T et_free_tx_ring +ffffffff8197ae90 T et_free_rx_ring +ffffffff8197b010 T et_enable_intrs +ffffffff8197b040 T et_dma_mem_create +ffffffff8197b230 T et_dma_mbuf_create +ffffffff8197b620 T et_dma_mem_destroy +ffffffff8197b6a0 T et_dma_mbuf_destroy +ffffffff8197b820 T et_rxeof +ffffffff8197bc10 T et_txeof +ffffffff8197be60 T et_init +ffffffff8197c150 T et_init_tx_ring +ffffffff8197c220 T et_init_rx_ring +ffffffff8197c3b0 T et_chip_init +ffffffff8197c750 T et_enable_txrx +ffffffff8197c8c0 T et_start_rxdma +ffffffff8197c9b0 T et_start_txdma +ffffffff8197ca10 T et_setmulti +ffffffff8197cc80 T et_encap +ffffffff8197d0d0 T et_init_mac +ffffffff8197d280 T et_init_rxmac +ffffffff8197d5d0 T et_init_txmac +ffffffff8197d660 T et_init_rxdma +ffffffff8197daa0 T et_init_txdma +ffffffff8197dc10 T et_newbuf_cluster +ffffffff8197dc30 T et_newbuf +ffffffff8197deb0 T et_newbuf_hdr +ffffffff8197e000 T jme_match +ffffffff8197e030 T jme_attach +ffffffff8197e6d0 T jme_miibus_readreg +ffffffff8197e810 T jme_miibus_writereg +ffffffff8197e940 T jme_miibus_statchg +ffffffff8197ef70 T jme_stop_rx +ffffffff8197f080 T jme_stop_tx +ffffffff8197f180 T jme_rxeof +ffffffff8197f2c0 T jme_txeof +ffffffff8197f520 T jme_init_tx_ring +ffffffff8197f5e0 T jme_init_ssb +ffffffff8197f640 T jme_mac_config +ffffffff8197fb20 T jme_mediastatus +ffffffff8197fb90 T jme_mediachange +ffffffff8197fbf0 T jme_eeprom_read_byte +ffffffff8197fd90 T jme_eeprom_macaddr +ffffffff8197ff20 T jme_reg_macaddr +ffffffff8197ffd0 T jme_map_intr_vector +ffffffff81980090 T jme_intr +ffffffff81980270 T jme_reset +ffffffff819802f0 T jme_dma_alloc +ffffffff819809b0 T jme_ioctl +ffffffff81980b40 T jme_start +ffffffff81980cb0 T jme_watchdog +ffffffff81980d70 T jme_tick +ffffffff81980df0 T jme_detach +ffffffff81980f00 T jme_stop +ffffffff819812c0 T jme_dma_free +ffffffff81981430 T jme_encap +ffffffff819816f0 T jme_init +ffffffff81981fe0 T jme_iff +ffffffff81982160 T jme_discard_rxbufs +ffffffff819821e0 T jme_rxpkt +ffffffff81982580 T jme_newbuf +ffffffff81982730 T jme_init_rx_ring +ffffffff81982860 T jme_set_vlan +ffffffff81983000 T age_match +ffffffff81983030 T age_attach +ffffffff819835e0 T age_intr +ffffffff81983800 T age_phy_reset +ffffffff81984250 T age_reset +ffffffff819843c0 T age_dma_alloc +ffffffff81984c40 T age_get_macaddr +ffffffff81984e50 T age_ioctl +ffffffff81984fe0 T age_start +ffffffff81985180 T age_watchdog +ffffffff81985230 T age_miibus_readreg +ffffffff81985350 T age_miibus_writereg +ffffffff81985470 T age_miibus_statchg +ffffffff81985680 T age_mediachange +ffffffff819856e0 T age_mediastatus +ffffffff81985750 T age_tick +ffffffff819857d0 T age_dma_free +ffffffff81985ad0 T age_detach +ffffffff81985be0 T age_stop +ffffffff81985fc0 T age_stop_rxmac +ffffffff81986110 T age_stop_txmac +ffffffff81986260 T age_mac_config +ffffffff81986310 T age_rxintr +ffffffff81986510 T age_txintr +ffffffff81986700 T age_init +ffffffff819872e0 T age_stats_update +ffffffff81987610 T age_encap +ffffffff819878a0 T age_iff +ffffffff81987a20 T age_rxeof +ffffffff81987dd0 T age_newbuf +ffffffff81987fb0 T age_init_rx_ring +ffffffff819880a0 T age_init_rr_ring +ffffffff81988130 T age_init_tx_ring +ffffffff819881f0 T age_init_cmb_block +ffffffff81988240 T age_init_smb_block +ffffffff819882a0 T age_rxvlan +ffffffff81989000 T alc_match +ffffffff81989030 T alc_attach +ffffffff81989a00 T alc_detach +ffffffff81989b30 T alc_activate +ffffffff81989ba0 T alc_miibus_readreg +ffffffff81989d90 T alc_mii_readreg_816x +ffffffff81989eb0 T alc_mii_readreg_813x +ffffffff81989fe0 T alc_miibus_writereg +ffffffff8198a1d0 T alc_mii_writereg_816x +ffffffff8198a300 T alc_mii_writereg_813x +ffffffff8198a410 T alc_miibus_statchg +ffffffff8198a830 T alc_stop_mac +ffffffff8198a940 T alc_start_queue +ffffffff8198aa10 T alc_mac_config +ffffffff8198aaf0 T alc_aspm +ffffffff8198abc0 T alc_dsp_fixup +ffffffff8198b2b0 T alc_miidbg_readreg +ffffffff8198b300 T alc_miidbg_writereg +ffffffff8198b350 T alc_miiext_readreg +ffffffff8198b4a0 T alc_miiext_writereg +ffffffff8198b600 T alc_mediastatus +ffffffff8198b680 T alc_mediachange +ffffffff8198b6e0 T alc_get_macaddr +ffffffff8198b700 T alc_get_macaddr_816x +ffffffff8198ba10 T alc_get_macaddr_813x +ffffffff8198bfc0 T alc_get_macaddr_par +ffffffff8198c080 T alc_disable_l0s_l1 +ffffffff8198c110 T alc_phy_reset +ffffffff8198c130 T alc_phy_reset_816x +ffffffff8198cbe0 T alc_phy_reset_813x +ffffffff8198d0f0 T alc_phy_down +ffffffff8198d230 T alc_aspm_816x +ffffffff8198d2f0 T alc_aspm_813x +ffffffff8198d4f0 T alc_init_pcie +ffffffff8198d8f0 T alc_config_msi +ffffffff8198d9d0 T alc_intr +ffffffff8198dc00 T alc_reset +ffffffff8198e080 T alc_dma_alloc +ffffffff8198e900 T alc_ioctl +ffffffff8198ea90 T alc_start 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+ffffffff81997550 T amdpm_i2c_release_bus +ffffffff819975a0 T amdpm_i2c_exec +ffffffff81997980 T amdpm_get_timecount +ffffffff819979b0 T amdpm_intr +ffffffff81998000 T bce_probe +ffffffff81998030 T bce_attach +ffffffff81998a40 T bce_activate +ffffffff81998ac0 T bce_intr +ffffffff81998e40 T bce_reset +ffffffff81999580 T bce_ioctl +ffffffff81999720 T bce_start +ffffffff819999a0 T bce_watchdog +ffffffff81999a00 T bce_mii_read +ffffffff81999b70 T bce_mii_write +ffffffff81999cd0 T bce_statchg +ffffffff8199a150 T bce_mediachange +ffffffff8199a1a0 T bce_mediastatus +ffffffff8199a210 T bce_tick +ffffffff8199a280 T bce_stop +ffffffff8199a3f0 T bce_init +ffffffff8199a910 T bce_iff +ffffffff8199aa30 T bce_rxintr +ffffffff8199ac00 T bce_txintr +ffffffff8199ad00 T bce_add_rxbuf +ffffffff8199adc0 T bce_add_mac +ffffffff8199b000 T ath_pci_match +ffffffff8199b070 T ath_pci_attach +ffffffff8199b2f0 T ath_pci_detach +ffffffff8199c000 T athn_pci_match +ffffffff8199c030 T athn_pci_attach +ffffffff8199c340 T athn_pci_detach +ffffffff8199c3c0 T athn_pci_activate +ffffffff8199c4a0 T athn_pci_read +ffffffff8199c4d0 T athn_pci_write +ffffffff8199c500 T athn_pci_write_barrier +ffffffff8199c530 T athn_pci_disable_aspm +ffffffff8199c5a0 T athn_pci_wakeup +ffffffff8199d000 T atw_pci_match +ffffffff8199d030 T atw_pci_attach +ffffffff8199d300 T atw_pci_detach +ffffffff8199d390 t atw_pci_enable +ffffffff8199d440 t atw_pci_disable +ffffffff8199e000 T rtw_pci_match +ffffffff8199e030 T rtw_pci_attach +ffffffff8199e2a0 T rtw_pci_detach +ffffffff8199e330 T rtw_pci_enable +ffffffff8199e3e0 T rtw_pci_disable +ffffffff8199f000 T rtwn_pci_match +ffffffff8199f030 T rtwn_pci_attach +ffffffff8199f700 T rtwn_pci_detach +ffffffff8199f880 T rtwn_pci_activate +ffffffff8199f8a0 T rtwn_calib_to +ffffffff8199f920 T rtwn_scan_to +ffffffff8199f940 T rtwn_intr +ffffffff8199fc80 T rtwn_alloc_rx_list +ffffffff819a0000 T rtwn_alloc_tx_list +ffffffff819a0290 T rtwn_free_rx_list +ffffffff819a0420 T rtwn_pci_write_1 +ffffffff819a0450 T rtwn_pci_write_2 +ffffffff819a0480 T rtwn_pci_write_4 +ffffffff819a04b0 T rtwn_pci_read_1 +ffffffff819a04e0 T rtwn_pci_read_2 +ffffffff819a0510 T rtwn_pci_read_4 +ffffffff819a0540 T rtwn_tx +ffffffff819a0b50 T rtwn_power_on +ffffffff819a0b80 T rtwn_dma_init +ffffffff819a0ff0 T rtwn_pci_load_firmware +ffffffff819a10a0 T rtwn_fw_loadpage +ffffffff819a1200 T rtwn_mac_init +ffffffff819a1350 T rtwn_bb_init +ffffffff819a1920 T rtwn_alloc_buffers +ffffffff819a1950 T rtwn_pci_init +ffffffff819a1a50 T rtwn_pci_stop +ffffffff819a1c10 T rtwn_is_oactive +ffffffff819a1c50 T rtwn_next_calib +ffffffff819a1c70 T rtwn_cancel_calib +ffffffff819a1cb0 T rtwn_pci_next_scan +ffffffff819a1cd0 T rtwn_cancel_scan +ffffffff819a1d10 T rtwn_wait_async +ffffffff819a1d40 T rtwn_free_tx_list +ffffffff819a1ee0 T rtwn_setup_rx_desc +ffffffff819a1f50 T rtwn_reset_rx_list +ffffffff819a1ff0 T rtwn_reset_tx_list +ffffffff819a2170 T rtwn_rx_frame +ffffffff819a2650 T rtwn_tx_done +ffffffff819a2820 T rtwn_poll_c2h_events +ffffffff819a2a10 T rtwn_pci_92c_stop +ffffffff819a2c70 T rtwn_pci_88e_stop +ffffffff819a3190 T rtwn_pci_23a_stop +ffffffff819a3660 T rtwn_88e_intr +ffffffff819a3a20 T rtwn_llt_write +ffffffff819a3b00 T rtwn_llt_init +ffffffff819a3e20 T rtwn_92c_power_on +ffffffff819a43e0 T rtwn_88e_power_on +ffffffff819a4920 T rtwn_23a_power_on +ffffffff819a4ef0 T rtwn_tx_report +ffffffff819a5000 T ral_pci_match +ffffffff819a5030 T ral_pci_attach +ffffffff819a5260 T ral_pci_detach +ffffffff819a5310 T ral_pci_activate +ffffffff819a53b0 T ral_pci_wakeup +ffffffff819a6000 T acx_pci_match +ffffffff819a6030 T acx_pci_attach +ffffffff819a62c0 T acx_pci_detach +ffffffff819a7000 T pgt_pci_match +ffffffff819a7030 T pgt_pci_attach +ffffffff819a7260 T pgt_pci_detach +ffffffff819a8000 T malo_pci_match +ffffffff819a8030 T malo_pci_attach +ffffffff819a8230 T malo_pci_detach +ffffffff819a8290 T malo_pci_activate +ffffffff819a8300 T malo_pci_wakeup +ffffffff819a9000 T bwi_pci_match +ffffffff819a9070 T bwi_pci_attach +ffffffff819a9300 T bwi_pci_detach +ffffffff819a9360 T bwi_pci_activate +ffffffff819a93e0 T bwi_reset_bcm4331 +ffffffff819a9540 T bwi_pci_conf_write +ffffffff819a9570 T bwi_pci_conf_read +ffffffff819a95a0 T bwi_pci_wakeup +ffffffff819aa000 T piixpm_match +ffffffff819aa030 T piixpm_attach +ffffffff819aa5a0 T piixpm_intr +ffffffff819aa6e0 T piixpm_i2c_acquire_bus +ffffffff819aa7e0 T piixpm_i2c_release_bus +ffffffff819aa8d0 T piixpm_i2c_exec +ffffffff819ab000 T vic_match +ffffffff819ab0b0 T vic_attach +ffffffff819ab520 T vic_intr +ffffffff819ab5c0 T vic_query +ffffffff819ab8a0 T vic_alloc_data +ffffffff819abbf0 T vic_tick +ffffffff819abc70 T vic_ioctl +ffffffff819abee0 T vic_start +ffffffff819ac290 T vic_watchdog +ffffffff819ac2c0 T vic_media_change +ffffffff819ac2f0 T vic_media_status +ffffffff819ac3b0 T vic_read +ffffffff819ac3d0 T vic_read_cmd +ffffffff819ac430 T vic_getlladdr +ffffffff819ac4f0 T vic_alloc_dmamem +ffffffff819ac690 T vic_rx_fill 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vmxnet3_alloc_txring +ffffffff819afe90 T vmxnet3_alloc_rxring +ffffffff819b0220 t vmx_dmamem_alloc +ffffffff819b03b0 T vmxnet3_rxfill_tick +ffffffff819b0430 T vmxnet3_txinit +ffffffff819b0540 T vmxnet3_rxfill +ffffffff819b08a0 T vmxnet3_rxinit +ffffffff819b0a90 T vmxnet3_txstop +ffffffff819b0bb0 T vmxnet3_rxstop +ffffffff819b0d60 T vmxnet3_enable_all_intrs +ffffffff819b0e40 T vmxnet3_disable_all_intrs +ffffffff819b0f20 T vmxnet3_evintr +ffffffff819b1120 T vmxnet3_rxintr +ffffffff819b15c0 T vmxnet3_txintr +ffffffff819b17b0 T vmxnet3_init +ffffffff819b1c20 T vmxnet3_rx_offload +ffffffff819b1df0 T vmxnet3_iff +ffffffff819b1f40 T vmxnet3_stop +ffffffff819b2260 T vmxnet3_reset +ffffffff819b22a0 T vmxnet3_tx_offload +ffffffff819b2440 t vmx_kstat_create +ffffffff819b26a0 t vmx_kstat_read +ffffffff819b3000 T vmwpvs_match +ffffffff819b3040 T vmwpvs_attach +ffffffff819b3bc0 T vmwpvs_scsi_cmd +ffffffff819b40a0 T vmwpvs_intx +ffffffff819b4130 T vmwpvs_msg_task +ffffffff819b4410 T vmwpvs_intr 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lii_media_status +ffffffff819b7d20 T lii_ioctl +ffffffff819b7f00 T lii_start +ffffffff819b8100 T lii_watchdog +ffffffff819b8150 T lii_stop +ffffffff819b81e0 T lii_init +ffffffff819b8830 T lii_iff +ffffffff819b89a0 T lii_tx_put +ffffffff819b8ad0 T lii_free_tx_space +ffffffff819b8b10 T lii_rxintr +ffffffff819b8cf0 T lii_txintr +ffffffff819b9000 T ichiic_match +ffffffff819b9030 T ichiic_attach +ffffffff819b9280 T ichiic_intr +ffffffff819b93c0 T ichiic_i2c_acquire_bus +ffffffff819b9420 T ichiic_i2c_release_bus +ffffffff819b9470 T ichiic_i2c_exec +ffffffff819ba000 T viapm_match +ffffffff819ba030 T viapm_attach +ffffffff819ba800 T viapm_intr +ffffffff819ba940 T viapm_i2c_acquire_bus +ffffffff819ba9a0 T viapm_i2c_release_bus +ffffffff819ba9f0 T viapm_i2c_exec +ffffffff819bad90 T viapm_refresh_sensor_data +ffffffff819bb100 T viapm_refresh +ffffffff819bb130 T val_to_uK +ffffffff819bb1d0 T val_to_rpm +ffffffff819bb210 T val_to_uV +ffffffff819bb2b0 T viapm_get_timecount +ffffffff819bc000 T amdiic_match +ffffffff819bc030 T amdiic_attach +ffffffff819bc260 T amdiic_intr +ffffffff819bc350 T amdiic_i2c_acquire_bus +ffffffff819bc3b0 T amdiic_i2c_release_bus +ffffffff819bc400 T amdiic_i2c_exec +ffffffff819bc6b0 T amdiic_read +ffffffff819bc860 T amdiic_wait +ffffffff819bc920 T amdiic_write +ffffffff819bd000 T nviic_match +ffffffff819bd030 T nviic_attach +ffffffff819bd2d0 T nviic_i2c_acquire_bus +ffffffff819bd320 T nviic_i2c_release_bus +ffffffff819bd370 T nviic_i2c_exec +ffffffff819bd640 T nviic_write +ffffffff819bd6a0 T nviic_read +ffffffff819be000 T sdhc_pci_match +ffffffff819be060 T sdhc_pci_attach +ffffffff819be430 T sdhc_pci_activate +ffffffff819be490 T sdhc_takecontroller +ffffffff819be550 T sdhc_ricohfix +ffffffff819be720 T sdhc_pci_conf_write +ffffffff819bf000 T kate_match +ffffffff819bf180 T kate_attach +ffffffff819bf510 T kate_refresh +ffffffff819c0000 T km_match +ffffffff819c0050 T km_attach +ffffffff819c0110 T km_refresh +ffffffff819c1000 T ksmn_match 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virtio_pci_read_device_config_1 +ffffffff819c77d0 T virtio_pci_read_device_config_2 +ffffffff819c7800 T virtio_pci_read_device_config_4 +ffffffff819c7830 T virtio_pci_read_device_config_8 +ffffffff819c78c0 T virtio_pci_write_device_config_1 +ffffffff819c78f0 T virtio_pci_write_device_config_2 +ffffffff819c7920 T virtio_pci_write_device_config_4 +ffffffff819c7950 T virtio_pci_write_device_config_8 +ffffffff819c79c0 T virtio_pci_read_queue_size +ffffffff819c7a40 T virtio_pci_setup_queue +ffffffff819c7d70 T virtio_pci_setup_intrs +ffffffff819c7eb0 T virtio_pci_get_status +ffffffff819c7f20 T virtio_pci_set_status +ffffffff819c8090 T virtio_pci_negotiate_features +ffffffff819c81f0 T virtio_pci_poll_intr +ffffffff819c8270 T virtio_pci_set_msix_queue_vector +ffffffff819c82f0 T virtio_pci_set_msix_config_vector +ffffffff819c8330 T virtio_pci_find_cap +ffffffff819c8500 T virtio_pci_attach_10 +ffffffff819c89d0 T virtio_pci_attach_09 +ffffffff819c8b40 T virtio_pci_adjust_config_region +ffffffff819c8bf0 T virtio_pci_setup_msix +ffffffff819c8e00 T virtio_pci_legacy_intr +ffffffff819c8ed0 T virtio_pci_legacy_intr_mpsafe +ffffffff819c8f80 T virtio_pci_free_irqs +ffffffff819c9140 T virtio_pci_negotiate_features_10 +ffffffff819c93e0 T virtio_pci_msix_establish +ffffffff819c9560 T virtio_pci_config_intr +ffffffff819c95a0 T virtio_pci_shared_queue_intr +ffffffff819c95b0 T virtio_pci_queue_intr +ffffffff819ca000 T dwiic_pci_match +ffffffff819ca030 T dwiic_pci_attach +ffffffff819ca410 T dwiic_pci_activate +ffffffff819ca490 T dwiic_pci_bus_scan +ffffffff819cb000 T bwfm_pci_buscore_read +ffffffff819cb070 T bwfm_pci_buscore_write +ffffffff819cb0f0 T bwfm_pci_buscore_prepare +ffffffff819cb120 T bwfm_pci_buscore_reset +ffffffff819cb390 T bwfm_pci_buscore_activate +ffffffff819cb3c0 T bwfm_pci_preinit +ffffffff819cc410 T bwfm_pci_stop +ffffffff819cc4b0 T bwfm_pci_txcheck +ffffffff819cc570 T bwfm_pci_txdata +ffffffff819cc910 T bwfm_pci_msgbuf_query_dcmd +ffffffff819ccdd0 T bwfm_pci_msgbuf_set_dcmd +ffffffff819cce20 T bwfm_pci_match +ffffffff819cce50 T bwfm_pci_attach +ffffffff819cd170 T bwfm_pci_detach +ffffffff819cd1d0 T bwfm_pci_activate +ffffffff819cd3f0 T bwfm_pci_intr +ffffffff819cd6b0 T bwfm_pci_select_core +ffffffff819cd7a0 T bwfm_pci_load_microcode +ffffffff819cdd00 T bwfm_pci_dmamem_alloc +ffffffff819cdee0 T bwfm_pci_setup_ring +ffffffff819ce120 T bwfm_pci_intr_enable +ffffffff819ce170 T bwfm_pci_hostready +ffffffff819ce1e0 T bwfm_pci_fill_rx_rings +ffffffff819ce240 T bwfm_pci_dmamem_free +ffffffff819ce2d0 T bwfm_pci_cleanup +ffffffff819ceb60 T bwfm_pci_send_mb_data +ffffffff819cecb0 T bwfm_pci_intmask +ffffffff819cecf0 T bwfm_pci_pktid_avail +ffffffff819ced70 T bwfm_pci_pktid_new +ffffffff819ceef0 T bwfm_pci_pktid_free +ffffffff819cefb0 T bwfm_pci_fill_rx_buf_ring +ffffffff819cf340 T bwfm_pci_fill_rx_ioctl_ring +ffffffff819cf700 T bwfm_pci_ring_write_reserve +ffffffff819cf800 T bwfm_pci_ring_write_cancel +ffffffff819cf840 T bwfm_pci_ring_write_commit +ffffffff819cf930 T bwfm_pci_ring_write_rptr +ffffffff819cf9b0 T bwfm_pci_ring_write_wptr +ffffffff819cfa30 T bwfm_pci_setup_flowring +ffffffff819cfba0 T bwfm_pci_ring_bell +ffffffff819cfbe0 T bwfm_pci_ring_update_rptr +ffffffff819cfc90 T bwfm_pci_ring_update_wptr +ffffffff819cfd40 T bwfm_pci_ring_write_reserve_multi +ffffffff819cfe60 T bwfm_pci_ring_read_avail +ffffffff819cff70 T bwfm_pci_ring_read_commit +ffffffff819d0000 T bwfm_pci_ring_rx +ffffffff819d0230 T bwfm_pci_msg_rx +ffffffff819d08d0 T bwfm_pci_flowring_delete_cb +ffffffff819d09a0 T bwfm_pci_msgbuf_rxioctl +ffffffff819d0aa0 T bwfm_pci_intr_status +ffffffff819d0ae0 T bwfm_pci_intr_ack +ffffffff819d0b20 T bwfm_pci_flowring_lookup +ffffffff819d0cb0 T bwfm_pci_flowring_create +ffffffff819d0df0 T bwfm_pci_flowring_create_cb +ffffffff819d1170 T bwfm_pci_flowring_delete +ffffffff819d1490 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff819d16e0 T bwfm_pci_handle_mb_data +ffffffff819d17d0 T bwfm_pci_intr_disable +ffffffff819d2000 T ccp_pci_match +ffffffff819d2030 T ccp_pci_attach +ffffffff819d21d0 T ccp_pci_intr_map +ffffffff819d2330 T ccp_pci_psp_attach +ffffffff819d3000 T bnxt_match +ffffffff819d3030 T bnxt_attach +ffffffff819d3e30 T bnxt_dmamem_alloc +ffffffff819d3ff0 T bnxt_dmamem_free +ffffffff819d40a0 T bnxt_hwrm_ver_get +ffffffff819d4210 T bnxt_hwrm_nvm_get_dev_info +ffffffff819d4370 T bnxt_hwrm_func_drv_rgtr +ffffffff819d44a0 T bnxt_hwrm_func_rgtr_async_events +ffffffff819d45e0 T bnxt_hwrm_func_qcaps +ffffffff819d46e0 T bnxt_admin_intr +ffffffff819d48f0 T bnxt_intr +ffffffff819d4de0 T bnxt_hwrm_func_qcfg +ffffffff819d4eb0 T bnxt_hwrm_queue_qportcfg +ffffffff819d4fa0 T bnxt_hwrm_func_reset +ffffffff819d5060 T bnxt_mark_cpr_invalid +ffffffff819d50c0 T bnxt_hwrm_ring_alloc +ffffffff819d5280 T bnxt_cfg_async_cr +ffffffff819d53a0 T bnxt_write_cp_doorbell +ffffffff819d53e0 T bnxt_set_cp_ring_aggint +ffffffff819d54d0 T bnxt_ioctl +ffffffff819d56b0 T bnxt_start +ffffffff819d5c80 T bnxt_watchdog +ffffffff819d5cb0 T bnxt_media_change +ffffffff819d5e20 T bnxt_media_status +ffffffff819d5e40 T bnxt_refill +ffffffff819d5eb0 T bnxt_media_autonegotiate +ffffffff819d5fb0 T bnxt_hwrm_port_phy_qcfg +ffffffff819d6490 T bnxt_free_slots +ffffffff819d6540 T bnxt_hwrm_cmd_hdr_init +ffffffff819d6590 T hwrm_send_message +ffffffff819d6620 T bnxt_queue_up +ffffffff819d73c0 T bnxt_hwrm_stat_ctx_alloc +ffffffff819d74e0 T bnxt_write_tx_doorbell +ffffffff819d7560 T bnxt_write_rx_doorbell +ffffffff819d75e0 T bnxt_hwrm_ring_grp_alloc +ffffffff819d7700 T bnxt_rx_fill +ffffffff819d7830 T bnxt_hwrm_ring_grp_free +ffffffff819d7940 T bnxt_hwrm_ring_free +ffffffff819d7a50 T bnxt_hwrm_stat_ctx_free +ffffffff819d7b60 T bnxt_queue_down +ffffffff819d83f0 T bnxt_up +ffffffff819d8ac0 T bnxt_hwrm_vnic_ctx_alloc +ffffffff819d8bb0 T bnxt_hwrm_vnic_alloc +ffffffff819d8cc0 T bnxt_hwrm_vnic_cfg +ffffffff819d8e20 T bnxt_hwrm_vnic_cfg_placement +ffffffff819d8f10 T bnxt_hwrm_set_filter +ffffffff819d90b0 T bnxt_hwrm_vnic_rss_cfg +ffffffff819d91a0 T bnxt_iff +ffffffff819d9320 T bnxt_hwrm_vnic_free +ffffffff819d9430 T bnxt_hwrm_vnic_ctx_free +ffffffff819d9540 T bnxt_down +ffffffff819d99f0 T bnxt_hwrm_free_filter +ffffffff819d9af0 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff819d9be0 T bnxt_rxrinfo +ffffffff819d9d50 T bnxt_get_sffpage +ffffffff819da0d0 T bnxt_load_mbuf +ffffffff819da1a0 T bnxt_handle_async_event +ffffffff819da1f0 T bnxt_cpr_next_cmpl +ffffffff819da260 T bnxt_cpr_commit +ffffffff819da290 T bnxt_cpr_rollback +ffffffff819da2c0 T bnxt_write_cp_doorbell_index +ffffffff819da340 T bnxt_rx +ffffffff819da610 T bnxt_txeof +ffffffff819da750 T bnxt_get_media_type +ffffffff819dacb0 T bnxt_add_media_type +ffffffff819dae70 T _hwrm_send_message +ffffffff819ddc20 T bnxt_rx_fill_slots +ffffffff819dde20 T bnxt_hwrm_err_map +ffffffff819dde60 T _bnxt_hwrm_set_async_event_bit +ffffffff819de000 t mcx_match +ffffffff819de030 t mcx_attach +ffffffff819def50 T mcx_rx_fill +ffffffff819df1f0 T mcx_load_mbuf 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mcx_kstat_mtmp_read +ffffffff819edda0 t mcx_kstat_queue_read +ffffffff819eef80 t mcx_timecounter_read +ffffffff819ef000 t iavf_match +ffffffff819ef030 t iavf_attach +ffffffff819efad0 t iavf_reset +ffffffff819efe50 t iavf_dmamem_alloc +ffffffff819effe0 t iavf_arq_fill +ffffffff819f02e0 t iavf_arq_timeout +ffffffff819f0310 t iavf_init_admin_queue +ffffffff819f0520 t iavf_get_version +ffffffff819f0790 t iavf_get_vf_resources +ffffffff819f09c0 t iavf_config_irq_map +ffffffff819f0c00 t iavf_intr +ffffffff819f1380 t iavf_ioctl +ffffffff819f1a00 t iavf_start +ffffffff819f1db0 t iavf_watchdog +ffffffff819f1de0 t iavf_media_change +ffffffff819f1e10 t iavf_media_status +ffffffff819f1ea0 t iavf_dmamem_free +ffffffff819f1f30 t iavf_arq_unfill +ffffffff819f2050 t iavf_down +ffffffff819f24c0 t iavf_up +ffffffff819f30a0 t iavf_queue_select +ffffffff819f3320 t iavf_txr_free +ffffffff819f3460 t iavf_rxr_free +ffffffff819f35a0 t iavf_rxfill +ffffffff819f3900 t iavf_rxrefill +ffffffff819f3920 t iavf_process_arq +ffffffff819f3e00 t iavf_add_del_addr +ffffffff819f5000 T rge_match +ffffffff819f5030 T rge_attach +ffffffff819f5610 T rge_activate +ffffffff819f5750 T rge_intr +ffffffff819f5ad0 T rge_config_imtype +ffffffff819f5b40 T rge_chipinit +ffffffff819f5cb0 T rge_get_macaddr +ffffffff819f5ef0 T rge_allocmem +ffffffff819f6390 T rge_ioctl +ffffffff819f6580 T rge_start +ffffffff819f6b30 T rge_watchdog +ffffffff819f6b80 T rge_wol +ffffffff819f6e40 T rge_tick +ffffffff819f6ee0 T rge_txstart +ffffffff819f6f10 T rge_ifmedia_upd +ffffffff819f7760 T rge_ifmedia_sts +ffffffff819f7870 T rge_add_media_types +ffffffff819f79d0 T rge_kstat_attach +ffffffff819f7d20 T rge_wol_power +ffffffff819f7e30 T rge_rxeof +ffffffff819f8340 T rge_txeof +ffffffff819f8600 T rge_init +ffffffff819fa4e0 T rge_setup_intr +ffffffff819fa690 T rge_stop +ffffffff819faa20 T rge_iff +ffffffff819fabb0 T rge_set_macaddr +ffffffff819facb0 T rge_rx_list_init +ffffffff819fada0 T rge_tx_list_init +ffffffff819fae90 T rge_phy_config +ffffffff819fc170 T rge_disable_aspm_clkreq +ffffffff819fc2d0 T rge_read_csi +ffffffff819fc3b0 T rge_write_csi +ffffffff819fc4a0 T rge_write_mac_ocp +ffffffff819fc4f0 T rge_read_mac_ocp +ffffffff819fc580 T rge_hw_reset +ffffffff819fc6c0 T rge_write_phy_ocp +ffffffff819fc7a0 T rge_read_phy_ocp +ffffffff819fc870 T rge_read_phy +ffffffff819fc960 T rge_write_phy +ffffffff819fca60 T rge_get_link_status +ffffffff819fcac0 T rge_newbuf +ffffffff819fcd00 T rge_fill_rx_ring +ffffffff819fcd90 T rge_reset +ffffffff819fd0a0 T rge_exit_oob +ffffffff819fdb40 T rge_set_phy_power +ffffffff819fde30 T rge_hw_init +ffffffff819fe7c0 T rge_ephy_config +ffffffff819fe810 T rge_ephy_config_mac_cfg3 +ffffffff819feb80 T rge_ephy_config_mac_cfg5 +ffffffff819fecb0 T rge_write_ephy +ffffffff819fefd0 T rge_read_ephy +ffffffff819ff310 T rge_phy_config_mac_cfg2_8126 +ffffffff81a06cb0 T rge_phy_config_mac_cfg3 +ffffffff81a08e80 T rge_phy_config_mac_cfg5 +ffffffff81a09c50 T rge_phy_config_mcu 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igc_free_transmit_structures +ffffffff81a0ddd0 T igc_free_receive_structures +ffffffff81a0de90 T igc_setup_msix +ffffffff81a0df40 T igc_dma_malloc +ffffffff81a0e0d0 T igc_rxrefill +ffffffff81a0e1b0 T igc_dma_free +ffffffff81a0e290 T igc_init_dmac +ffffffff81a0e5b0 T igc_intr_queue +ffffffff81a0e6f0 T igc_intr_link +ffffffff81a0e7d0 T igc_ioctl +ffffffff81a0eb40 T igc_start +ffffffff81a0ef70 T igc_watchdog +ffffffff81a0efa0 T igc_media_change +ffffffff81a0f0c0 T igc_media_status +ffffffff81a0f210 T igc_init +ffffffff81a0f780 T igc_setup_transmit_structures +ffffffff81a0f860 T igc_initialize_transmit_unit +ffffffff81a0fac0 T igc_setup_receive_structures +ffffffff81a0fc80 T igc_initialize_receive_unit +ffffffff81a10100 T igc_iff +ffffffff81a10270 T igc_configure_queues +ffffffff81a104b0 T igc_rxfill +ffffffff81a10620 T igc_enable_intr +ffffffff81a10710 T igc_tx_ctx_setup +ffffffff81a10910 T igc_txeof +ffffffff81a10b10 T igc_disable_intr +ffffffff81a10bd0 T igc_rxrinfo +ffffffff81a10d30 T igc_get_buf +ffffffff81a10ea0 T igc_rxeof +ffffffff81a11290 T igc_rx_checksum +ffffffff81a112e0 T igc_set_queues +ffffffff81a113c0 T igc_enable_queue +ffffffff81a113f0 T igc_allocate_transmit_buffers +ffffffff81a11520 T igc_setup_transmit_ring +ffffffff81a11690 T igc_free_transmit_buffers +ffffffff81a117e0 T igc_allocate_receive_buffers +ffffffff81a11930 T igc_setup_receive_ring +ffffffff81a11a10 T igc_initialize_rss_mapping +ffffffff81a11ca0 T igc_free_receive_buffers +ffffffff81a11de0 t igc_kstat_tick +ffffffff81a11e40 t igc_kstat_read +ffffffff81a11ea0 t igc_stat_read +ffffffff81a13000 T igc_init_mac_params +ffffffff81a13040 T igc_init_nvm_params +ffffffff81a13080 T igc_init_phy_params +ffffffff81a130c0 T igc_set_mac_type +ffffffff81a13160 T igc_setup_init_funcs +ffffffff81a132f0 T igc_update_mc_addr_list +ffffffff81a13330 T igc_check_for_link +ffffffff81a13370 T igc_reset_hw +ffffffff81a133b0 T igc_init_hw +ffffffff81a133f0 T igc_get_speed_and_duplex +ffffffff81a13430 T igc_rar_set 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igc_setup_link_generic +ffffffff81a17df0 T igc_set_fc_watermarks_generic +ffffffff81a17eb0 T igc_force_mac_fc_generic +ffffffff81a17f70 T igc_config_fc_after_link_up_generic +ffffffff81a18130 T igc_get_speed_and_duplex_copper_generic +ffffffff81a181e0 T igc_put_hw_semaphore_generic +ffffffff81a18240 T igc_get_auto_rd_done_generic +ffffffff81a18550 T igc_disable_pcie_master_generic +ffffffff81a19000 T igc_init_nvm_ops_generic +ffffffff81a19080 T igc_null_read_nvm +ffffffff81a190b0 T igc_null_nvm_generic +ffffffff81a190e0 T igc_reload_nvm_generic +ffffffff81a19180 T igc_null_write_nvm +ffffffff81a191b0 T igc_poll_eerd_eewr_done +ffffffff81a19260 T igc_read_nvm_eerd +ffffffff81a193c0 T igc_read_mac_addr_generic +ffffffff81a194b0 T igc_validate_nvm_checksum_generic +ffffffff81a1a000 T igc_init_phy_ops_generic +ffffffff81a1a0f0 T igc_null_set_page +ffffffff81a1a120 T igc_null_read_reg +ffffffff81a1a150 T igc_null_phy_generic +ffffffff81a1a180 T igc_null_lplu_state +ffffffff81a1a1b0 T igc_null_write_reg +ffffffff81a1a1e0 T igc_check_reset_block_generic +ffffffff81a1a240 T igc_get_phy_id +ffffffff81a1a310 T igc_read_phy_reg_mdic +ffffffff81a1a440 T igc_write_phy_reg_mdic +ffffffff81a1a570 T igc_phy_setup_autoneg +ffffffff81a1a7b0 T igc_copper_link_autoneg +ffffffff81a1a920 T igc_wait_autoneg +ffffffff81a1aa00 T igc_setup_copper_link_generic +ffffffff81a1ab50 T igc_phy_has_link_generic +ffffffff81a1ac80 T igc_check_downshift_generic +ffffffff81a1acb0 T igc_phy_hw_reset_generic +ffffffff81a1aec0 T igc_power_up_phy_copper +ffffffff81a1af60 T igc_power_down_phy_copper +ffffffff81a1b010 T igc_write_phy_reg_gpy +ffffffff81a1b260 T igc_write_xmdio_reg +ffffffff81a1b380 T igc_read_phy_reg_gpy +ffffffff81a1b5d0 T igc_read_xmdio_reg +ffffffff81a1b6f0 T __igc_access_xmdio_reg +ffffffff81a1c000 T ngbe_match +ffffffff81a1c030 T ngbe_attach +ffffffff81a1c670 T ngbe_detach +ffffffff81a1c940 T ngbe_allocate_pci_resources +ffffffff81a1ca70 T ngbe_allocate_queues +ffffffff81a1d030 T ngbe_allocate_isb +ffffffff81a1d0d0 T ngbe_init_shared_code +ffffffff81a1d3b0 T ngbe_check_flash_load +ffffffff81a1d720 T ngbe_allocate_msix +ffffffff81a1d9b0 T ngbe_setup_interface +ffffffff81a1dc20 T ngbe_free_isb +ffffffff81a1dd30 T ngbe_free_transmit_structures +ffffffff81a1ddb0 T ngbe_free_receive_structures +ffffffff81a1de70 T ngbe_free_pci_resources +ffffffff81a1df00 T ngbe_stop +ffffffff81a1e570 T ngbe_release_hw_control +ffffffff81a1e600 T ngbe_init +ffffffff81a1ec20 T ngbe_setup_isb +ffffffff81a1ec90 T ngbe_configure_pb +ffffffff81a1ed80 T ngbe_iff +ffffffff81a1efb0 T ngbe_setup_vlan_hw_support +ffffffff81a1f080 T ngbe_setup_transmit_structures +ffffffff81a1f160 T ngbe_initialize_transmit_unit +ffffffff81a1f570 T ngbe_setup_receive_structures +ffffffff81a1f690 T ngbe_initialize_receive_unit +ffffffff81a1fc20 T ngbe_get_hw_control +ffffffff81a1fca0 T ngbe_setup_gpie +ffffffff81a1fcd0 T ngbe_configure_ivars +ffffffff81a1ff40 T ngbe_non_sfp_link_config +ffffffff81a20000 T ngbe_enable_intr +ffffffff81a201e0 t NGBE_WRITE_REG_MASK +ffffffff81a20290 T ngbe_ioctl +ffffffff81a20540 T ngbe_rxrinfo +ffffffff81a206b0 T ngbe_disable_intr +ffffffff81a20790 T ngbe_media_change +ffffffff81a20830 T ngbe_media_status +ffffffff81a20940 T ngbe_update_link_status +ffffffff81a20bd0 T ngbe_rxfill +ffffffff81a20d40 T ngbe_get_buf +ffffffff81a20ea0 T ngbe_start +ffffffff81a210b0 T ngbe_encap +ffffffff81a212f0 T ngbe_disable_pcie_master +ffffffff81a213e0 T ngbe_reset +ffffffff81a21450 T ngbe_set_rx_drop_en +ffffffff81a21590 T ngbe_watchdog +ffffffff81a21660 T ngbe_setup_msix +ffffffff81a21710 T ngbe_intr_queue +ffffffff81a21830 T ngbe_intr_link +ffffffff81a21930 T ngbe_dma_malloc +ffffffff81a21ac0 T ngbe_dma_free +ffffffff81a21ba0 T ngbe_rxrefill +ffffffff81a21c50 T ngbe_free_receive_buffers +ffffffff81a21d90 T ngbe_free_transmit_buffers +ffffffff81a21ee0 T ngbe_allocate_receive_buffers +ffffffff81a22030 T ngbe_allocate_transmit_buffers +ffffffff81a22160 T ngbe_setup_receive_ring +ffffffff81a22280 T ngbe_setup_transmit_ring +ffffffff81a223f0 T ngbe_addr_list_itr +ffffffff81a22430 T ngbe_setup_psrtype +ffffffff81a22460 T ngbe_initialize_rss_mapping +ffffffff81a226f0 T ngbe_handle_phy_event +ffffffff81a227a0 T ngbe_enable_queue +ffffffff81a22800 T ngbe_rxeof +ffffffff81a22bb0 T ngbe_txeof +ffffffff81a22d70 T ngbe_init_eeprom_params +ffffffff81a22df0 T ngbe_init_hw +ffffffff81a22e60 T ngbe_init_ops +ffffffff81a23070 T ngbe_phy_reset +ffffffff81a23230 T ngbe_phy_read_reg +ffffffff81a232e0 T ngbe_phy_write_reg +ffffffff81a23390 T ngbe_phy_setup_link +ffffffff81a23660 T ngbe_phy_led_ctrl +ffffffff81a23770 T ngbe_phy_check_overtemp +ffffffff81a237d0 T ngbe_phy_identify +ffffffff81a23810 T ngbe_phy_init +ffffffff81a23aa0 T ngbe_phy_check_event +ffffffff81a23b00 T ngbe_phy_get_advertised_pause +ffffffff81a23b70 T ngbe_phy_get_lp_advertised_pause +ffffffff81a23c40 T ngbe_phy_set_pause_advertisement +ffffffff81a23cd0 T ngbe_phy_setup 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ngbe_phy_led_oem_chk +ffffffff81a26220 T ngbe_set_fw_drv_ver +ffffffff81a26370 T ngbe_init_thermal_sensor_thresh +ffffffff81a26450 T ngbe_validate_mac_addr +ffffffff81a264b0 T ngbe_fc_autoneg +ffffffff81a26650 T ngbe_fc_autoneg_copper +ffffffff81a26770 T ngbe_negotiate_fc +ffffffff81a26820 T ngbe_fmgr_cmd_op +ffffffff81a26920 T ngbe_flash_read_dword +ffffffff81a26a30 T ngbe_calculate_checksum +ffffffff81a26af0 T ngbe_check_internal_phy_id +ffffffff81a26c70 T ngbe_gphy_wait_mdio_access_on +ffffffff81a26d00 T ngbe_check_mng_access +ffffffff81a26d60 T ngbe_mng_present +ffffffff81a26dc0 T ngbe_check_reset_blocked +ffffffff81a26e50 T ngbe_set_ivar +ffffffff81a26f50 T ngbe_pbthresh_setup +ffffffff81a27020 T ngbe_disable_queue +ffffffff81a27080 T ngbe_host_interface_command +ffffffff81a274f0 T ngbe_tx_ctx_setup +ffffffff81a27580 T ngbe_read_pci_cfg_word +ffffffff81a275e0 T ngbe_set_pci_config_data +ffffffff81a27670 T ngbe_get_copper_link_capabilities +ffffffff81a276c0 T ngbe_get_eeprom_semaphore +ffffffff81a27860 T ngbe_release_eeprom_semaphore +ffffffff81a27930 T ngbe_gphy_dis_eee +ffffffff81a27a90 T ngbe_gphy_efuse_calibration +ffffffff81a27f30 T ngbe_hpbthresh +ffffffff81a27fd0 T ngbe_lpbthresh +ffffffff81a28010 T ngbe_mta_vector +ffffffff81a28060 T ngbe_setup_copper_link +ffffffff81a280b0 T ngbe_reset_misc +ffffffff81a284a0 T ngbe_set_mta +ffffffff81a28510 T ngbe_rx_checksum +ffffffff81a29000 T com_pci_match +ffffffff81a29030 T com_pci_attach +ffffffff81a293a0 T com_pci_detach +ffffffff81a29450 T com_pci_activate +ffffffff81a29560 T com_pci_intr_designware +ffffffff81a2a000 T ufshci_pci_match +ffffffff81a2a040 T ufshci_pci_attach +ffffffff81a2a1d0 T ufshci_pci_detach +ffffffff81a2a200 T ufshci_pci_activate +ffffffff81a2b000 T agpdev_print +ffffffff81a2b050 T agpbus_probe +ffffffff81a2b0c0 T agpvga_match +ffffffff81a2b130 T agp_attach_bus +ffffffff81a2b1c0 T agp_probe +ffffffff81a2b1f0 T agp_attach +ffffffff81a2b310 T agp_alloc_gatt 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drm_atomic_get_old_bridge_state +ffffffff81a32600 T drm_atomic_get_new_bridge_state +ffffffff81a32660 T drm_atomic_add_encoder_bridges +ffffffff81a32740 T drm_atomic_add_affected_connectors +ffffffff81a328a0 T drm_atomic_add_affected_planes +ffffffff81a329d0 T drm_atomic_check_only +ffffffff81a33560 T drm_atomic_commit +ffffffff81a33640 T drm_atomic_print_new_state +ffffffff81a33850 T drm_atomic_nonblocking_commit +ffffffff81a33900 T __drm_atomic_helper_disable_plane +ffffffff81a33990 T __drm_atomic_helper_set_config +ffffffff81a33d90 t drm_atomic_plane_print_state +ffffffff81a34020 t drm_atomic_crtc_print_state +ffffffff81a342f0 t drm_atomic_connector_print_state +ffffffff81a34450 T drm_state_dump +ffffffff81a35000 T drm_atomic_helper_check_modeset +ffffffff81a35e00 t handle_conflicting_encoders +ffffffff81a36170 t mode_fixup +ffffffff81a364f0 T drm_atomic_helper_check_wb_encoder_state +ffffffff81a36560 T drm_atomic_helper_check_plane_state +ffffffff81a36980 T drm_atomic_helper_check_crtc_primary_plane +ffffffff81a36a30 T drm_atomic_helper_check_planes +ffffffff81a36d10 T drm_atomic_helper_check +ffffffff81a36de0 T drm_atomic_helper_async_check +ffffffff81a370e0 T drm_atomic_helper_update_legacy_modeset_state +ffffffff81a37350 T drm_atomic_helper_calc_timestamping_constants +ffffffff81a373f0 T drm_atomic_helper_commit_modeset_disables +ffffffff81a37ae0 T drm_atomic_helper_commit_modeset_enables +ffffffff81a37e00 T drm_atomic_helper_wait_for_fences +ffffffff81a38010 T drm_atomic_helper_wait_for_vblanks +ffffffff81a383c0 T drm_atomic_helper_wait_for_flip_done +ffffffff81a385b0 T drm_atomic_helper_commit_tail +ffffffff81a38780 T drm_atomic_helper_commit_planes +ffffffff81a38b30 T drm_atomic_helper_fake_vblank +ffffffff81a38c30 T drm_atomic_helper_commit_hw_done +ffffffff81a38e50 T drm_atomic_helper_cleanup_planes +ffffffff81a38f00 T drm_atomic_helper_commit_tail_rpm +ffffffff81a390d0 t try_wait_for_completion +ffffffff81a39140 T drm_atomic_helper_async_commit +ffffffff81a39410 T drm_atomic_helper_commit +ffffffff81a39710 T drm_atomic_helper_prepare_planes +ffffffff81a399e0 T drm_atomic_helper_unprepare_planes +ffffffff81a39af0 T drm_atomic_helper_setup_commit +ffffffff81a3a2e0 t commit_work +ffffffff81a3a300 T drm_atomic_helper_swap_state +ffffffff81a3a9c0 t commit_tail +ffffffff81a3ac10 t release_crtc_commit +ffffffff81a3ac50 t crtc_or_fake_commit +ffffffff81a3ad80 T drm_atomic_helper_wait_for_dependencies +ffffffff81a3afc0 T drm_atomic_helper_commit_cleanup_done +ffffffff81a3b2b0 T drm_atomic_helper_commit_planes_on_crtc +ffffffff81a3b560 T drm_atomic_helper_disable_planes_on_crtc +ffffffff81a3b6d0 T drm_atomic_helper_update_plane +ffffffff81a3b830 T drm_atomic_helper_disable_plane +ffffffff81a3b930 T drm_atomic_helper_set_config +ffffffff81a3ba10 T drm_atomic_helper_disable_all +ffffffff81a3bc00 T drm_atomic_helper_shutdown +ffffffff81a3bd80 T drm_atomic_helper_duplicate_state +ffffffff81a3bf10 T drm_atomic_helper_suspend +ffffffff81a3c0b0 T drm_atomic_helper_commit_duplicated_state +ffffffff81a3c200 T drm_atomic_helper_resume +ffffffff81a3c370 T drm_atomic_helper_page_flip +ffffffff81a3c450 t page_flip_common +ffffffff81a3c580 T drm_atomic_helper_page_flip_target +ffffffff81a3c6c0 T drm_atomic_helper_bridge_propagate_bus_fmt +ffffffff81a3c740 t set_best_encoder +ffffffff81a3d000 T __drm_atomic_helper_crtc_state_reset +ffffffff81a3d030 T __drm_atomic_helper_crtc_reset +ffffffff81a3d0a0 T drm_atomic_helper_crtc_reset +ffffffff81a3d150 T __drm_atomic_helper_crtc_duplicate_state +ffffffff81a3d230 T drm_atomic_helper_crtc_duplicate_state +ffffffff81a3d2f0 T __drm_atomic_helper_crtc_destroy_state +ffffffff81a3d3e0 T drm_atomic_helper_crtc_destroy_state +ffffffff81a3d420 T __drm_atomic_helper_plane_state_reset +ffffffff81a3d500 T __drm_atomic_helper_plane_reset +ffffffff81a3d560 T drm_atomic_helper_plane_reset +ffffffff81a3d670 T __drm_atomic_helper_plane_destroy_state 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drm_atomic_helper_bridge_destroy_state +ffffffff81a3e1b0 T __drm_atomic_helper_bridge_reset +ffffffff81a3e200 T drm_atomic_helper_bridge_reset +ffffffff81a3f000 T drm_atomic_set_mode_for_crtc +ffffffff81a3f250 T drm_atomic_set_mode_prop_for_crtc +ffffffff81a3f530 T drm_atomic_set_crtc_for_plane +ffffffff81a3f6d0 T drm_atomic_set_fb_for_plane +ffffffff81a3f7c0 T drm_atomic_set_crtc_for_connector +ffffffff81a3f950 T drm_atomic_get_property +ffffffff81a400f0 T drm_atomic_connector_commit_dpms +ffffffff81a40250 T drm_atomic_set_property +ffffffff81a40e50 T drm_mode_atomic_ioctl +ffffffff81a413d0 t prepare_signaling +ffffffff81a418f0 t complete_signaling +ffffffff81a41af0 t drm_atomic_replace_property_blob_from_id +ffffffff81a41c90 t drm_atomic_set_writeback_fb_for_connector +ffffffff81a41d00 t set_out_fence_for_connector +ffffffff81a42000 T drm_is_current_master +ffffffff81a42070 T drm_getmagic +ffffffff81a42160 T drm_authmagic +ffffffff81a42250 T drm_master_create +ffffffff81a42310 T drm_setmaster_ioctl +ffffffff81a423f0 t drm_new_set_master +ffffffff81a425e0 T drm_dropmaster_ioctl +ffffffff81a426f0 t drm_drop_master +ffffffff81a427d0 T drm_master_open +ffffffff81a428b0 T drm_master_get +ffffffff81a428e0 T drm_master_release +ffffffff81a429e0 T drm_master_put +ffffffff81a42aa0 T drm_file_get_master +ffffffff81a42b10 T drm_master_internal_acquire +ffffffff81a42b80 T drm_master_internal_release +ffffffff81a43000 T drm_plane_create_alpha_property +ffffffff81a430b0 T drm_plane_create_rotation_property +ffffffff81a43200 T drm_rotation_simplify +ffffffff81a43280 T drm_plane_create_zpos_property +ffffffff81a43350 T drm_plane_create_zpos_immutable_property +ffffffff81a43410 T drm_atomic_normalize_zpos +ffffffff81a43760 T drm_plane_create_blend_mode_property +ffffffff81a43940 t drm_atomic_state_zpos_cmp +ffffffff81a44000 T drm_bridge_add +ffffffff81a44080 T devm_drm_bridge_add +ffffffff81a44150 T drm_bridge_remove +ffffffff81a441c0 T drm_bridge_attach +ffffffff81a443a0 T drm_bridge_detach +ffffffff81a44490 T drm_bridge_chain_mode_fixup +ffffffff81a44540 T drm_bridge_chain_mode_valid +ffffffff81a445f0 T drm_bridge_chain_mode_set +ffffffff81a44690 T drm_atomic_bridge_chain_disable +ffffffff81a447a0 T drm_atomic_bridge_chain_post_disable +ffffffff81a449e0 T drm_atomic_bridge_chain_pre_enable +ffffffff81a44c50 T drm_atomic_bridge_chain_enable +ffffffff81a44d80 T drm_atomic_bridge_chain_check +ffffffff81a45180 T drm_bridge_detect +ffffffff81a451e0 T drm_bridge_get_modes +ffffffff81a45240 T drm_bridge_edid_read +ffffffff81a45310 T drm_bridge_get_edid +ffffffff81a45370 T drm_bridge_hpd_enable +ffffffff81a45450 T drm_bridge_hpd_disable +ffffffff81a454f0 T drm_bridge_hpd_notify +ffffffff81a45550 t drm_bridge_atomic_duplicate_priv_state +ffffffff81a45570 t drm_bridge_atomic_destroy_priv_state +ffffffff81a45590 t select_bus_fmt_recursive +ffffffff81a46000 T drm_buddy_init +ffffffff81a464c0 T drm_buddy_fini +ffffffff81a465d0 T drm_get_buddy +ffffffff81a46610 T drm_buddy_free_block +ffffffff81a46660 t __drm_buddy_free +ffffffff81a467c0 T drm_buddy_free_list +ffffffff81a468a0 T drm_buddy_block_trim +ffffffff81a46b00 t __alloc_range +ffffffff81a46e00 T drm_buddy_alloc_blocks +ffffffff81a474e0 t __drm_buddy_alloc_range +ffffffff81a47580 T drm_buddy_block_print +ffffffff81a475c0 T drm_buddy_print +ffffffff81a47740 T drm_buddy_module_exit +ffffffff81a47760 T drm_buddy_module_init +ffffffff81a477d0 t split_block +ffffffff81a48000 T drm_clflush_pages +ffffffff81a480e0 T drm_clflush_sg +ffffffff81a48200 T drm_clflush_virt_range +ffffffff81a482a0 T drm_need_swiotlb +ffffffff81a482d0 T drm_memcpy_from_wc +ffffffff81a48820 T drm_memcpy_init_early +ffffffff81a49000 T drm_client_init +ffffffff81a49150 T drm_client_register +ffffffff81a49210 T drm_client_release +ffffffff81a492e0 T drm_client_dev_unregister +ffffffff81a49400 T drm_client_dev_hotplug +ffffffff81a49540 T drm_client_dev_restore +ffffffff81a49640 T drm_client_buffer_vmap +ffffffff81a496c0 T drm_client_buffer_vunmap +ffffffff81a496e0 T drm_client_framebuffer_create +ffffffff81a49a20 T drm_client_framebuffer_delete +ffffffff81a49b20 T drm_client_framebuffer_flush +ffffffff81a4a000 T drm_client_modeset_create +ffffffff81a4a150 T drm_client_modeset_free +ffffffff81a4a280 T drm_client_modeset_probe +ffffffff81a4bcb0 t drm_client_pick_crtcs +ffffffff81a4bfd0 T drm_client_rotation +ffffffff81a4c180 T drm_client_modeset_check +ffffffff81a4c230 t drm_client_modeset_commit_atomic +ffffffff81a4c4a0 T drm_client_modeset_commit_locked +ffffffff81a4c690 T drm_client_modeset_commit +ffffffff81a4c720 T drm_client_modeset_dpms +ffffffff81a4c9e0 t drm_connector_pick_cmdline_mode +ffffffff81a4d000 T drm_color_ctm_s31_32_to_qm_n +ffffffff81a4d0d0 T drm_crtc_enable_color_mgmt +ffffffff81a4d1c0 T drm_mode_crtc_set_gamma_size +ffffffff81a4d2f0 T drm_mode_gamma_set_ioctl +ffffffff81a4d8b0 T drm_mode_gamma_get_ioctl +ffffffff81a4da20 T drm_get_color_encoding_name +ffffffff81a4daa0 T drm_get_color_range_name +ffffffff81a4db20 T drm_plane_create_color_properties +ffffffff81a4ddb0 T drm_color_lut_check +ffffffff81a4e000 T drm_connector_ida_init +ffffffff81a4e1c0 T drm_connector_ida_destroy +ffffffff81a4e380 T drm_get_connector_type_name +ffffffff81a4e3c0 T drm_connector_free_work_fn +ffffffff81a4e4a0 T drm_connector_init +ffffffff81a4e530 t __drm_connector_init +ffffffff81a4e930 T drm_connector_init_with_ddc +ffffffff81a4e9c0 T drmm_connector_init +ffffffff81a4ea90 t drm_connector_cleanup_action +ffffffff81a4eab0 T drm_connector_attach_edid_property +ffffffff81a4ead0 T drm_connector_attach_encoder +ffffffff81a4eb60 T drm_connector_has_possible_encoder +ffffffff81a4eba0 T drm_connector_cleanup +ffffffff81a4ef90 T drm_connector_unregister +ffffffff81a4f040 T drm_mode_put_tile_group +ffffffff81a4f0f0 T drm_connector_register +ffffffff81a4f220 T drm_connector_unregister_all +ffffffff81a4f400 T drm_connector_list_iter_begin +ffffffff81a4f440 T drm_connector_list_iter_next +ffffffff81a4f560 T drm_connector_list_iter_end +ffffffff81a4f640 T drm_connector_register_all +ffffffff81a4f800 T drm_get_connector_status_name +ffffffff81a4f850 T drm_get_connector_force_name +ffffffff81a4f890 T drm_get_subpixel_order_name +ffffffff81a4f8d0 T drm_get_dpms_name +ffffffff81a4f910 T drm_display_info_set_bus_formats +ffffffff81a4fa00 T drm_get_dvi_i_select_name +ffffffff81a4fa60 T drm_get_dvi_i_subconnector_name +ffffffff81a4fac0 T drm_get_tv_mode_name +ffffffff81a4fb00 T drm_get_tv_mode_from_name +ffffffff81a4fd20 T drm_get_tv_select_name +ffffffff81a4fd80 T drm_get_tv_subconnector_name +ffffffff81a4fde0 T drm_get_dp_subconnector_name +ffffffff81a4fe70 T drm_get_colorspace_name +ffffffff81a4feb0 T drm_connector_create_standard_properties +ffffffff81a50070 T drm_mode_create_dvi_i_properties +ffffffff81a50120 T drm_connector_attach_dp_subconnector_property +ffffffff81a50190 T drm_connector_attach_content_type_property +ffffffff81a50230 T drm_mode_create_content_type_property +ffffffff81a502c0 T drm_connector_attach_tv_margin_properties +ffffffff81a50340 T drm_mode_create_tv_margin_properties +ffffffff81a50480 T drm_mode_create_tv_properties_legacy +ffffffff81a50730 T drm_mode_create_tv_properties +ffffffff81a50920 T drm_mode_create_scaling_mode_property +ffffffff81a50990 T drm_connector_attach_vrr_capable_property +ffffffff81a50a30 T drm_connector_attach_scaling_mode_property +ffffffff81a50c50 T drm_mode_create_aspect_ratio_property +ffffffff81a50ce0 T drm_mode_create_hdmi_colorspace_property +ffffffff81a50d00 t drm_mode_create_colorspace_property +ffffffff81a50e50 T drm_mode_create_dp_colorspace_property +ffffffff81a50e80 T drm_mode_create_suggested_offset_properties +ffffffff81a50f60 T drm_connector_set_path_property +ffffffff81a50fc0 T drm_connector_set_tile_property +ffffffff81a51130 T drm_connector_set_link_status_property +ffffffff81a51190 T drm_connector_attach_max_bpc_property +ffffffff81a51260 T drm_connector_attach_hdr_output_metadata_property +ffffffff81a512b0 T drm_connector_attach_colorspace_property +ffffffff81a51300 T drm_connector_atomic_hdr_metadata_equal +ffffffff81a51380 T drm_connector_set_vrr_capable_property +ffffffff81a513d0 T drm_connector_set_panel_orientation +ffffffff81a514a0 T drm_connector_set_panel_orientation_with_quirk +ffffffff81a515a0 T drm_connector_set_orientation_from_panel +ffffffff81a516a0 T drm_connector_create_privacy_screen_properties +ffffffff81a51750 T drm_connector_attach_privacy_screen_properties +ffffffff81a517d0 T drm_connector_attach_privacy_screen_provider +ffffffff81a51900 t drm_connector_privacy_screen_notifier +ffffffff81a519d0 T drm_connector_update_privacy_screen +ffffffff81a51a40 T drm_connector_set_obj_prop +ffffffff81a51b50 T drm_connector_property_set_ioctl +ffffffff81a51bb0 T drm_mode_getconnector +ffffffff81a52130 T drm_connector_find_by_fwnode +ffffffff81a521f0 T drm_connector_oob_hotplug_event +ffffffff81a522f0 T drm_mode_get_tile_group +ffffffff81a52400 T drm_mode_create_tile_group +ffffffff81a524f0 t drm_connector_free +ffffffff81a52540 t kasprintf +ffffffff81a53000 T drm_crtc_from_index +ffffffff81a53060 T drm_crtc_force_disable +ffffffff81a531b0 T drm_mode_set_config_internal +ffffffff81a53230 T drm_crtc_register_all +ffffffff81a532c0 T drm_crtc_unregister_all +ffffffff81a53340 T drm_crtc_create_fence +ffffffff81a533d0 T drm_crtc_init_with_planes +ffffffff81a534b0 t __drm_crtc_init_with_planes +ffffffff81a53940 T drmm_crtc_init_with_planes +ffffffff81a53a60 T __drmm_crtc_alloc_with_planes +ffffffff81a53c00 T drm_crtc_cleanup +ffffffff81a53d40 T drm_mode_getcrtc +ffffffff81a53f20 t __drm_mode_set_config_internal +ffffffff81a540e0 T drm_crtc_check_viewport +ffffffff81a541a0 T drm_mode_setcrtc +ffffffff81a54a40 T drm_mode_crtc_set_obj_prop +ffffffff81a54ad0 T drm_crtc_create_scaling_filter_property +ffffffff81a54b50 t drm_crtc_fence_get_driver_name +ffffffff81a54bd0 t drm_crtc_fence_get_timeline_name +ffffffff81a54c40 t kasprintf +ffffffff81a54d20 t drmm_crtc_init_with_planes_cleanup +ffffffff81a55000 T drm_helper_encoder_in_use +ffffffff81a551b0 T drm_helper_crtc_in_use +ffffffff81a552e0 T drm_helper_disable_unused_functions +ffffffff81a55380 t __drm_helper_disable_unused_functions +ffffffff81a554c0 T drm_crtc_helper_set_mode +ffffffff81a55a40 T drm_crtc_helper_atomic_check +ffffffff81a55a90 T drm_connector_get_single_encoder +ffffffff81a55b70 T drm_crtc_helper_set_config +ffffffff81a569a0 T drm_helper_connector_dpms +ffffffff81a56d00 T drm_helper_resume_force_mode +ffffffff81a57090 T drm_helper_force_disable_all +ffffffff81a58000 T drm_atomic_helper_check_plane_damage +ffffffff81a580b0 T drm_atomic_helper_dirtyfb +ffffffff81a583f0 T drm_atomic_helper_damage_iter_init +ffffffff81a58550 T drm_atomic_helper_damage_iter_next +ffffffff81a585f0 T drm_atomic_helper_damage_merged +ffffffff81a59000 T displayid_iter_edid_begin +ffffffff81a59050 T __displayid_iter_next +ffffffff81a59320 T displayid_iter_end +ffffffff81a59370 T displayid_version +ffffffff81a593a0 T displayid_primary_use +ffffffff81a5a000 T drm_mode_create_dumb +ffffffff81a5a0e0 T drm_mode_create_dumb_ioctl +ffffffff81a5a1c0 T drm_mode_mmap_dumb_ioctl +ffffffff81a5a230 T drm_mode_destroy_dumb +ffffffff81a5a280 T drm_mode_destroy_dumb_ioctl +ffffffff81a5b000 T drm_edid_header_is_valid +ffffffff81a5b080 T drm_edid_are_equal +ffffffff81a5b100 T drm_edid_block_valid +ffffffff81a5b370 t edid_block_check +ffffffff81a5b4b0 t edid_block_status_print +ffffffff81a5b5a0 T drm_edid_is_valid +ffffffff81a5b620 T drm_edid_valid +ffffffff81a5b760 t drm_edid_block_count +ffffffff81a5b8a0 T drm_edid_override_show +ffffffff81a5b900 T drm_edid_override_set +ffffffff81a5bb10 T drm_edid_alloc +ffffffff81a5bbf0 T drm_edid_free +ffffffff81a5bc50 T drm_edid_override_reset +ffffffff81a5bd30 T drm_edid_override_connector_update +ffffffff81a5be30 t drm_edid_override_get +ffffffff81a5bf50 T drm_edid_connector_update +ffffffff81a5c430 T drm_edid_connector_add_modes +ffffffff81a5c590 T drm_do_get_edid +ffffffff81a5c5b0 t _drm_do_get_edid +ffffffff81a5cab0 T drm_edid_raw +ffffffff81a5cb40 T drm_edid_dup +ffffffff81a5cc30 T drm_probe_ddc +ffffffff81a5cd40 t drm_do_probe_ddc_edid +ffffffff81a5cea0 T drm_get_edid +ffffffff81a5d030 T drm_connector_update_edid_property +ffffffff81a5d0a0 T drm_edid_read_custom +ffffffff81a5d1c0 T drm_edid_read_ddc +ffffffff81a5d300 T drm_edid_read +ffffffff81a5d390 T drm_edid_get_panel_id +ffffffff81a5d560 t edid_block_read +ffffffff81a5d840 T drm_get_edid_switcheroo +ffffffff81a5d890 T drm_edid_read_switcheroo +ffffffff81a5d8e0 T drm_edid_duplicate +ffffffff81a5d970 T drm_mode_find_dmt +ffffffff81a5daa0 T drm_mode_fixup_1366x768 +ffffffff81a5daf0 T drm_find_edid_extension +ffffffff81a5dba0 T drm_match_cea_mode +ffffffff81a5de40 T drm_display_mode_from_cea_vic +ffffffff81a5deb0 T drm_edid_get_monitor_name +ffffffff81a5df70 t get_monitor_name +ffffffff81a5e3e0 T drm_edid_to_sad +ffffffff81a5e610 T drm_edid_to_speaker_allocation +ffffffff81a5e7f0 T drm_av_sync_delay +ffffffff81a5e8a0 T drm_detect_hdmi_monitor +ffffffff81a5e9e0 T drm_detect_monitor_audio +ffffffff81a5eb90 T drm_default_rgb_quant_range +ffffffff81a5ebe0 t update_display_info +ffffffff81a60590 t _drm_edid_connector_add_modes +ffffffff81a61d50 T drm_add_edid_modes +ffffffff81a61e70 T drm_add_modes_noedid +ffffffff81a61f80 T drm_set_preferred_mode +ffffffff81a61fe0 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff81a622d0 T drm_hdmi_avi_infoframe_quant_range +ffffffff81a62370 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff81a62450 t connector_bad_edid +ffffffff81a62640 t edid_filter_invalid_blocks +ffffffff81a62800 t drm_for_each_detailed_block +ffffffff81a629f0 t __cea_db_iter_next +ffffffff81a62c10 t get_monitor_range +ffffffff81a62cb0 t do_detailed_mode +ffffffff81a63750 t do_cvt_mode +ffffffff81a639e0 t drm_mode_std +ffffffff81a64430 t do_standard_modes +ffffffff81a645e0 t drm_monitor_supports_rb +ffffffff81a649f0 t drm_gtf2_mode +ffffffff81a657f0 t drm_gtf2_hbreak +ffffffff81a65b60 t do_established_modes +ffffffff81a65d80 t drm_match_hdmi_mode +ffffffff81a65f10 t do_inferred_modes +ffffffff81a66680 t mode_in_range +ffffffff81a67000 T drm_encoder_register_all +ffffffff81a67090 T drm_encoder_unregister_all +ffffffff81a67110 T drm_encoder_init +ffffffff81a671e0 t __drm_encoder_init +ffffffff81a673e0 T drm_encoder_cleanup +ffffffff81a67520 T __drmm_encoder_alloc +ffffffff81a67660 T drmm_encoder_init +ffffffff81a67750 T drm_mode_getencoder +ffffffff81a67910 t kasprintf +ffffffff81a679f0 t drmm_encoder_alloc_release +ffffffff81a68000 T drm_i2c_encoder_dpms +ffffffff81a68020 T drm_i2c_encoder_mode_fixup +ffffffff81a68060 T drm_i2c_encoder_prepare +ffffffff81a68080 T drm_i2c_encoder_commit +ffffffff81a680a0 T drm_i2c_encoder_mode_set +ffffffff81a680c0 T drm_i2c_encoder_detect +ffffffff81a680e0 T drm_i2c_encoder_save +ffffffff81a68100 T drm_i2c_encoder_restore +ffffffff81a69000 T drm_exec_init +ffffffff81a69080 T drm_exec_fini +ffffffff81a69110 t drm_exec_unlock_all +ffffffff81a692b0 T drm_exec_cleanup +ffffffff81a69350 T drm_exec_lock_obj +ffffffff81a69660 t drm_exec_obj_locked +ffffffff81a69750 t dma_resv_unlock +ffffffff81a69800 T drm_exec_unlock_obj +ffffffff81a699b0 T drm_exec_prepare_obj +ffffffff81a69a50 T drm_exec_prepare_array +ffffffff81a69b20 t dma_resv_lock_slow_interruptible +ffffffff81a69c80 t dma_resv_lock_slow +ffffffff81a69d70 t __ww_mutex_lock +ffffffff81a6a000 T drm_fb_helper_debug_enter +ffffffff81a6a110 T drm_fb_helper_debug_leave +ffffffff81a6a2b0 T drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81a6a370 t __drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81a6a440 T drm_fb_helper_blank +ffffffff81a6a570 T drm_fb_helper_prepare +ffffffff81a6a690 t drm_fb_helper_resume_worker +ffffffff81a6a6c0 t drm_fb_helper_damage_work +ffffffff81a6a850 T drm_fb_helper_unprepare +ffffffff81a6a880 T drm_fb_helper_init +ffffffff81a6a900 T drm_fb_helper_alloc_info +ffffffff81a6a970 T drm_fb_helper_release_info +ffffffff81a6a9c0 T drm_fb_helper_unregister_info +ffffffff81a6a9f0 T drm_fb_helper_fini +ffffffff81a6ab00 T drm_fb_helper_set_suspend +ffffffff81a6ab30 T drm_fb_helper_set_suspend_unlocked +ffffffff81a6ab60 T drm_fb_helper_set_par +ffffffff81a6ac40 T drm_fb_helper_pan_display +ffffffff81a6ad30 T drm_fb_helper_fill_info +ffffffff81a6ae00 T drm_fb_helper_initial_config +ffffffff81a6ae40 t __drm_fb_helper_initial_config_and_unlock +ffffffff81a6b540 T drm_fb_helper_hotplug_event +ffffffff81a6b6c0 t drm_setup_crtcs_fb +ffffffff81a6b840 T drm_fb_helper_lastclose +ffffffff81a6b910 T drm_fb_helper_output_poll_changed +ffffffff81a6c000 T drm_fb_dma_get_gem_obj +ffffffff81a6d000 T drm_fbdev_dma_setup +ffffffff81a6d1d0 t drm_fbdev_dma_helper_fb_probe +ffffffff81a6d480 t drm_fbdev_dma_client_unregister +ffffffff81a6d4e0 t drm_fbdev_dma_client_restore +ffffffff81a6d530 t drm_fbdev_dma_client_hotplug +ffffffff81a6e000 T drm_fbdev_generic_setup +ffffffff81a6e1d0 t drm_fbdev_generic_helper_fb_probe +ffffffff81a6e370 t drm_fbdev_generic_helper_fb_dirty +ffffffff81a6e670 t drm_fbdev_generic_client_unregister +ffffffff81a6e6d0 t drm_fbdev_generic_client_restore +ffffffff81a6e720 t drm_fbdev_generic_client_hotplug +ffffffff81a6f000 T drm_dev_needs_global_mutex +ffffffff81a6f060 T drm_file_alloc +ffffffff81a6f350 T drm_file_free +ffffffff81a6f5e0 T drm_lastclose +ffffffff81a6f660 T drm_release +ffffffff81a6f6c0 T drm_file_update_pid +ffffffff81a6f710 T drm_release_noglobal +ffffffff81a6f770 T drm_read +ffffffff81a6f7d0 T drm_event_reserve_init_locked +ffffffff81a6f850 T drm_event_reserve_init +ffffffff81a6f920 T drm_event_cancel_free +ffffffff81a6f9b0 T drm_send_event_timestamp_locked +ffffffff81a6f9c0 t drm_send_event_helper +ffffffff81a6fbe0 T drm_send_event_locked +ffffffff81a6fc00 T drm_send_event +ffffffff81a6fc60 T drm_print_memory_stats +ffffffff81a6ff00 T drm_show_memory_stats +ffffffff81a70180 T drm_show_fdinfo +ffffffff81a701a0 T mock_drm_getfile +ffffffff81a71000 T drm_flip_work_allocate_task +ffffffff81a71060 T drm_flip_work_queue_task +ffffffff81a710c0 T drm_flip_work_queue +ffffffff81a71180 T drm_flip_work_commit +ffffffff81a71210 T drm_flip_work_init +ffffffff81a71280 t flip_worker +ffffffff81a713a0 T drm_flip_work_cleanup +ffffffff81a72000 T drm_fb_clip_offset +ffffffff81a72040 T drm_fb_memcpy +ffffffff81a72330 T drm_fb_swab +ffffffff81a72450 t drm_fb_swab32_line +ffffffff81a724b0 t drm_fb_swab16_line +ffffffff81a72510 t drm_fb_xfrm +ffffffff81a72850 T drm_fb_xrgb8888_to_rgb332 +ffffffff81a728b0 t drm_fb_xrgb8888_to_rgb332_line +ffffffff81a729b0 T drm_fb_xrgb8888_to_rgb565 +ffffffff81a72a40 t drm_fb_xrgb8888_to_rgb565_swab_line +ffffffff81a72b60 t drm_fb_xrgb8888_to_rgb565_line +ffffffff81a72c70 T drm_fb_xrgb8888_to_xrgb1555 +ffffffff81a72cd0 t drm_fb_xrgb8888_to_xrgb1555_line +ffffffff81a72de0 T drm_fb_xrgb8888_to_argb1555 +ffffffff81a72e40 t drm_fb_xrgb8888_to_argb1555_line +ffffffff81a72f60 T drm_fb_xrgb8888_to_rgba5551 +ffffffff81a72fc0 t drm_fb_xrgb8888_to_rgba5551_line +ffffffff81a730d0 T drm_fb_xrgb8888_to_rgb888 +ffffffff81a73130 t drm_fb_xrgb8888_to_rgb888_line +ffffffff81a731c0 T drm_fb_xrgb8888_to_argb8888 +ffffffff81a73220 t drm_fb_xrgb8888_to_argb8888_line +ffffffff81a732f0 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff81a73350 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff81a733d0 T drm_fb_xrgb8888_to_argb2101010 +ffffffff81a73430 t drm_fb_xrgb8888_to_argb2101010_line +ffffffff81a734c0 T drm_fb_xrgb8888_to_gray8 +ffffffff81a73520 t drm_fb_xrgb8888_to_gray8_line +ffffffff81a73590 T drm_fb_blit +ffffffff81a73c90 T drm_fb_xrgb8888_to_mono +ffffffff81a74030 T drm_fb_build_fourcc_list +ffffffff81a74340 t drm_fb_xrgb8888_to_xbgr8888_line +ffffffff81a74420 t drm_fb_xrgb8888_to_abgr8888_line +ffffffff81a75000 T drm_mode_legacy_fb_format +ffffffff81a750f0 T drm_driver_legacy_fb_format +ffffffff81a751f0 T __drm_format_info +ffffffff81a75270 T drm_format_info +ffffffff81a75320 T drm_get_format_info +ffffffff81a75410 T drm_format_info_block_width +ffffffff81a75460 T drm_format_info_block_height +ffffffff81a754b0 T drm_format_info_bpp +ffffffff81a75530 T drm_format_info_min_pitch +ffffffff81a76000 T drm_framebuffer_check_src_coords +ffffffff81a76130 T drm_mode_addfb +ffffffff81a76380 T drm_mode_addfb2 +ffffffff81a764a0 T drm_mode_addfb_ioctl +ffffffff81a764c0 T drm_internal_framebuffer_create +ffffffff81a76b00 T drm_mode_addfb2_ioctl +ffffffff81a76c20 T drm_mode_rmfb +ffffffff81a76e60 T drm_framebuffer_lookup +ffffffff81a76eb0 t drm_mode_rmfb_work_fn +ffffffff81a76f80 T drm_mode_rmfb_ioctl +ffffffff81a76fa0 T drm_mode_getfb +ffffffff81a77120 T drm_mode_getfb2_ioctl +ffffffff81a77510 T drm_mode_dirtyfb_ioctl +ffffffff81a776d0 T drm_fb_release +ffffffff81a77800 T drm_framebuffer_free +ffffffff81a77840 T drm_framebuffer_init +ffffffff81a779d0 T drm_framebuffer_unregister_private +ffffffff81a77a10 T drm_framebuffer_cleanup +ffffffff81a77a80 T drm_framebuffer_remove +ffffffff81a78000 T drm_framebuffer_plane_width +ffffffff81a78050 T drm_framebuffer_plane_height +ffffffff81a780a0 T drm_framebuffer_print_info +ffffffff81a79000 T drm_ref +ffffffff81a79030 T drm_unref +ffffffff81a790b0 T drm_fault +ffffffff81a792d0 T drm_flush +ffffffff81a79300 T udv_attach_drm +ffffffff81a79560 T drm_gem_init +ffffffff81a79640 t drm_gem_init_release +ffffffff81a79660 T drm_gem_object_init +ffffffff81a79810 T drm_gem_private_object_init +ffffffff81a79950 T drm_gem_private_object_fini +ffffffff81a799b0 T drm_gem_handle_delete +ffffffff81a79af0 t drm_gem_object_release_handle +ffffffff81a79b90 T drm_gem_dumb_map_offset +ffffffff81a79cf0 T drm_gem_object_lookup +ffffffff81a79d80 T drm_gem_create_mmap_offset +ffffffff81a79db0 T drm_gem_handle_create_tail +ffffffff81a79fa0 t drm_gem_object_handle_put_unlocked +ffffffff81a7a110 T drm_gem_handle_create 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prepare_to_wait +ffffffff81a83640 T finish_wait +ffffffff81a83700 T flush_workqueue +ffffffff81a83740 T flush_work +ffffffff81a83790 T flush_delayed_work +ffffffff81a83830 T kthread_func +ffffffff81a83880 T kthread_run +ffffffff81a83970 T kthread_create_worker +ffffffff81a83a50 T kthread_destroy_worker +ffffffff81a83a90 T kthread_init_work +ffffffff81a83ab0 T kthread_queue_work +ffffffff81a83b00 T kthread_cancel_work_sync +ffffffff81a83b50 T kthread_flush_work +ffffffff81a83b90 T kthread_flush_worker +ffffffff81a83bd0 T kthread_lookup +ffffffff81a83c50 T kthread_should_park +ffffffff81a83ce0 T kthread_parkme +ffffffff81a83dc0 T kthread_park +ffffffff81a83ec0 T kthread_unpark +ffffffff81a83f30 T kthread_should_stop +ffffffff81a83fc0 T kthread_stop +ffffffff81a84120 T dmi_match +ffffffff81a841f0 T dmi_first_match +ffffffff81a84310 T dmi_get_system_info +ffffffff81a84380 T dmi_check_system +ffffffff81a844b0 T alloc_pages +ffffffff81a84590 T __free_pages +ffffffff81a84700 T __pagevec_release +ffffffff81a847b0 T kmap +ffffffff81a847f0 T kunmap_va +ffffffff81a84810 T kmap_atomic_prot +ffffffff81a848a0 T kunmap_atomic +ffffffff81a84920 T vmap +ffffffff81a84a10 T vmap_pfn +ffffffff81a84b10 T vunmap +ffffffff81a84b70 T is_vmalloc_addr +ffffffff81a84bb0 T print_hex_dump +ffffffff81a84c90 T memchr_inv +ffffffff81a84d00 T panic_cmp +ffffffff81a84d30 T linux_root_RB_INSERT_COLOR +ffffffff81a84f30 T linux_root_RB_REMOVE_COLOR +ffffffff81a85260 T linux_root_RB_REMOVE +ffffffff81a853b0 T linux_root_RB_INSERT +ffffffff81a85440 T linux_root_RB_FIND +ffffffff81a854a0 T linux_root_RB_NFIND +ffffffff81a85500 T linux_root_RB_NEXT +ffffffff81a85570 T linux_root_RB_PREV +ffffffff81a855e0 T linux_root_RB_MINMAX +ffffffff81a85630 T idr_init +ffffffff81a85660 T idr_destroy +ffffffff81a857c0 T idr_tree_SPLAY_REMOVE +ffffffff81a85860 T idr_preload +ffffffff81a85900 T idr_alloc +ffffffff81a85ab0 T idr_tree_SPLAY_INSERT +ffffffff81a85b60 T idr_replace +ffffffff81a85bf0 T idr_remove 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sg_copy_from_buffer +ffffffff81a86fc0 T i2c_master_xfer +ffffffff81a87110 T __i2c_transfer +ffffffff81a871d0 T i2c_transfer +ffffffff81a872b0 T i2c_bb_master_xfer +ffffffff81a87390 T i2c_bb_functionality +ffffffff81a873c0 T i2c_bit_add_bus +ffffffff81a87400 T vga_disable_bridge +ffffffff81a874d0 T vga_get_uninterruptible +ffffffff81a87520 T vga_put +ffffffff81a875b0 T acpi_get_table +ffffffff81a87690 T acpi_put_table +ffffffff81a876c0 T acpi_get_handle +ffffffff81a87720 T acpi_get_name +ffffffff81a877e0 T acpi_evaluate_object +ffffffff81a87a80 T drm_linux_acpi_notify +ffffffff81a87b00 T register_acpi_notifier +ffffffff81a87b40 T unregister_acpi_notifier +ffffffff81a87bd0 T acpi_format_exception +ffffffff81a87c20 T acpi_target_system_state +ffffffff81a87c60 T backlight_do_update_status +ffffffff81a87c80 T backlight_device_register +ffffffff81a87d40 T backlight_device_unregister +ffffffff81a87da0 T backlight_schedule_update_status +ffffffff81a87dc0 T backlight_enable +ffffffff81a87e00 T backlight_disable +ffffffff81a87e40 T backlight_device_get_by_name +ffffffff81a87ec0 T dev_set_drvdata +ffffffff81a87f60 T dev_get_drvdata +ffffffff81a87fc0 T drm_sysfs_hotplug_event +ffffffff81a87fe0 T drm_sysfs_connector_hotplug_event +ffffffff81a88000 T drm_sysfs_connector_status_event +ffffffff81a88020 T drm_sysfs_connector_property_event +ffffffff81a88040 T dma_fence_get +ffffffff81a88080 T dma_fence_get_rcu +ffffffff81a880c0 T dma_fence_get_rcu_safe +ffffffff81a88100 T dma_fence_release +ffffffff81a88130 T dma_fence_put +ffffffff81a881a0 T dma_fence_signal_timestamp_locked +ffffffff81a88260 T dma_fence_signal +ffffffff81a883b0 T dma_fence_signal_locked +ffffffff81a884e0 T dma_fence_signal_timestamp +ffffffff81a885e0 T dma_fence_is_signaled +ffffffff81a88660 T dma_fence_is_signaled_locked +ffffffff81a887b0 T dma_fence_timestamp +ffffffff81a88860 T dma_fence_wait_timeout +ffffffff81a888c0 T dma_fence_default_wait +ffffffff81a88ac0 T dma_fence_wait +ffffffff81a88b30 T dma_fence_enable_sw_signaling +ffffffff81a88ca0 T dma_fence_init +ffffffff81a88d00 T dma_fence_add_callback +ffffffff81a88e50 T dma_fence_remove_callback +ffffffff81a88ee0 T dma_fence_context_alloc +ffffffff81a88f20 t dma_fence_default_wait_cb +ffffffff81a88f70 T dma_fence_wait_any_timeout +ffffffff81a892d0 T dma_fence_set_deadline +ffffffff81a89380 T dma_fence_get_stub +ffffffff81a89530 T dma_fence_allocate_private_stub +ffffffff81a89660 T dma_fence_array_create +ffffffff81a89790 t irq_dma_fence_array_work +ffffffff81a89830 T dma_fence_array_first +ffffffff81a89880 T dma_fence_array_next +ffffffff81a898d0 t dma_fence_array_get_driver_name +ffffffff81a89900 t dma_fence_array_get_timeline_name +ffffffff81a89930 t dma_fence_array_enable_signaling +ffffffff81a89a40 t dma_fence_array_signaled +ffffffff81a89a90 t dma_fence_array_release +ffffffff81a89b60 T dma_fence_chain_find_seqno +ffffffff81a89c90 T dma_fence_chain_walk +ffffffff81a89ef0 T dma_fence_chain_init +ffffffff81a8a000 t dma_fence_chain_get_driver_name +ffffffff81a8a030 t dma_fence_chain_get_timeline_name +ffffffff81a8a060 t dma_fence_chain_enable_signaling +ffffffff81a8a250 t dma_fence_chain_signaled +ffffffff81a8a350 t dma_fence_chain_release +ffffffff81a8a4b0 T dma_fence_is_container +ffffffff81a8a500 T dmabuf_read +ffffffff81a8a530 T dmabuf_write +ffffffff81a8a560 T dmabuf_ioctl +ffffffff81a8a590 T dmabuf_kqfilter +ffffffff81a8a5c0 T dmabuf_stat +ffffffff81a8a680 T dmabuf_close +ffffffff81a8a710 T dmabuf_seek +ffffffff81a8a7b0 T dma_buf_export +ffffffff81a8a870 T dma_buf_get +ffffffff81a8a910 T dma_buf_put +ffffffff81a8a9c0 T dma_buf_fd +ffffffff81a8ab10 T get_dma_buf +ffffffff81a8ab60 T pcie_get_speed_cap +ffffffff81a8ad50 T printk +ffffffff81a8ae00 T pcie_get_width_cap +ffffffff81a8af20 T pcie_aspm_enabled +ffffffff81a8afc0 T wait_on_bit +ffffffff81a8b0a0 T wait_on_bit_timeout +ffffffff81a8b170 T wake_up_bit +ffffffff81a8b1c0 T clear_and_wake_up_bit +ffffffff81a8b230 T bit_waitqueue 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mipi_dsi_packet_format_is_short +ffffffff81a8e1e0 T mipi_dsi_packet_format_is_long +ffffffff81a8e220 T mipi_dsi_create_packet +ffffffff81a8e330 T mipi_dsi_shutdown_peripheral +ffffffff81a8e3e0 T mipi_dsi_turn_on_peripheral +ffffffff81a8e490 T mipi_dsi_set_maximum_return_packet_size +ffffffff81a8e540 T mipi_dsi_compression_mode +ffffffff81a8e5f0 T mipi_dsi_picture_parameter_set +ffffffff81a8e6a0 T mipi_dsi_generic_write +ffffffff81a8e760 T mipi_dsi_generic_read +ffffffff81a8e820 T mipi_dsi_dcs_write_buffer +ffffffff81a8e8e0 T mipi_dsi_dcs_write +ffffffff81a8ea40 T mipi_dsi_dcs_read +ffffffff81a8eae0 T mipi_dsi_dcs_nop +ffffffff81a8eb90 T mipi_dsi_dcs_soft_reset +ffffffff81a8ec40 T mipi_dsi_dcs_get_power_mode +ffffffff81a8ed00 T mipi_dsi_dcs_get_pixel_format +ffffffff81a8edc0 T mipi_dsi_dcs_enter_sleep_mode +ffffffff81a8ee70 T mipi_dsi_dcs_exit_sleep_mode +ffffffff81a8ef20 T mipi_dsi_dcs_set_display_off +ffffffff81a8efd0 T mipi_dsi_dcs_set_display_on +ffffffff81a8f080 T mipi_dsi_dcs_set_column_address +ffffffff81a8f140 T mipi_dsi_dcs_set_page_address +ffffffff81a8f200 T mipi_dsi_dcs_set_tear_off +ffffffff81a8f2b0 T mipi_dsi_dcs_set_tear_on +ffffffff81a8f370 T mipi_dsi_dcs_set_pixel_format +ffffffff81a90000 T __drm_mm_interval_first +ffffffff81a900c0 T drm_mm_reserve_node +ffffffff81a90360 t add_hole +ffffffff81a904d0 T drm_mm_insert_node_in_range +ffffffff81a90af0 T drm_mm_remove_node +ffffffff81a90c50 T drm_mm_replace_node +ffffffff81a90e30 T drm_mm_scan_init_with_range +ffffffff81a90ec0 T drm_mm_scan_add_block +ffffffff81a91040 T drm_mm_scan_remove_block +ffffffff81a910c0 T drm_mm_scan_color_evict +ffffffff81a911b0 T drm_mm_init +ffffffff81a91260 T drm_mm_takedown +ffffffff81a912a0 T drm_mm_print +ffffffff81a92000 T drm_modeset_register_all +ffffffff81a920d0 T drm_modeset_unregister_all +ffffffff81a92120 T drm_mode_getresources +ffffffff81a92420 T drm_mode_config_reset +ffffffff81a925c0 T drmm_mode_config_init +ffffffff81a92d80 T drm_mode_config_cleanup +ffffffff81a93150 t drm_mode_config_init_release +ffffffff81a93160 T drm_mode_config_validate +ffffffff81a94000 T __drm_mode_object_add +ffffffff81a94120 T drm_mode_object_add +ffffffff81a94210 T drm_mode_object_register +ffffffff81a94270 T drm_mode_object_unregister +ffffffff81a94330 T drm_mode_object_lease_required +ffffffff81a94380 T __drm_mode_object_find +ffffffff81a94450 T drm_mode_object_find +ffffffff81a94520 T drm_mode_object_put +ffffffff81a945b0 T drm_mode_object_get +ffffffff81a94620 T drm_object_attach_property +ffffffff81a94730 T drm_object_property_set_value +ffffffff81a94810 T drm_object_property_get_value +ffffffff81a948a0 t __drm_object_property_get_value +ffffffff81a94980 T drm_object_property_get_default_value +ffffffff81a94a50 T drm_mode_object_get_properties +ffffffff81a94bb0 T drm_mode_obj_get_properties_ioctl +ffffffff81a94e60 T drm_mode_obj_find_prop_id +ffffffff81a94ec0 T drm_mode_obj_set_property_ioctl +ffffffff81a96000 T drm_mode_debug_printmodeline +ffffffff81a96140 T drm_mode_vrefresh +ffffffff81a961e0 T drm_mode_create +ffffffff81a96200 T drm_mode_destroy +ffffffff81a96240 T drm_mode_probed_add +ffffffff81a962f0 T drm_analog_tv_mode +ffffffff81a96c50 T drm_cvt_mode +ffffffff81a970e0 T drm_mode_set_name +ffffffff81a97130 T drm_gtf_mode_complex +ffffffff81a97440 T drm_gtf_mode +ffffffff81a974a0 T drm_mode_get_hv_timing +ffffffff81a974f0 T drm_mode_init +ffffffff81a975c0 T drm_mode_set_crtcinfo +ffffffff81a97780 T drm_mode_copy +ffffffff81a977e0 T drm_mode_duplicate +ffffffff81a97870 T drm_mode_match +ffffffff81a97a10 T drm_mode_equal +ffffffff81a97a30 T drm_mode_equal_no_clocks +ffffffff81a97a50 T drm_mode_equal_no_clocks_no_stereo +ffffffff81a97b10 T drm_mode_validate_driver +ffffffff81a97c00 T drm_mode_validate_size +ffffffff81a97c50 T drm_mode_validate_ycbcr420 +ffffffff81a97cc0 T drm_mode_is_420_only +ffffffff81a97d20 T drm_get_mode_status_name +ffffffff81a97da0 T drm_mode_prune_invalid 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drm_modeset_drop_locks +ffffffff81a9a8a0 T drm_modeset_unlock +ffffffff81a9a980 t modeset_lock +ffffffff81a9ad20 T drm_modeset_lock_init +ffffffff81a9ad90 T drm_modeset_lock +ffffffff81a9aed0 T drm_modeset_lock_single_interruptible +ffffffff81a9b020 t __ww_mutex_lock +ffffffff81a9c000 T drm_mtrr_add +ffffffff81a9c080 T drm_mtrr_del +ffffffff81a9d000 T drm_panel_init +ffffffff81a9d090 T drm_panel_add +ffffffff81a9d0f0 T drm_panel_remove +ffffffff81a9d150 T drm_panel_prepare +ffffffff81a9d280 T drm_panel_unprepare +ffffffff81a9d3c0 T drm_panel_enable +ffffffff81a9d4d0 T drm_panel_disable +ffffffff81a9d5d0 T drm_panel_get_modes +ffffffff81a9d630 T drm_is_panel_follower +ffffffff81a9d680 T drm_panel_add_follower +ffffffff81a9d6e0 T drm_panel_remove_follower +ffffffff81a9d700 T devm_drm_panel_add_follower +ffffffff81a9d760 T drm_panel_of_backlight +ffffffff81a9e000 T drm_get_panel_orientation_quirk +ffffffff81a9f000 T drm_pci_set_busid +ffffffff81a9f0b0 t kasprintf +ffffffff81aa0000 T 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drm_prime_add_buf_handle +ffffffff81aa56b0 T drm_prime_fd_to_handle_ioctl +ffffffff81aa56e0 T drm_gem_prime_handle_to_fd +ffffffff81aa5990 T drm_prime_handle_to_fd_ioctl +ffffffff81aa5a00 T drm_gem_map_attach +ffffffff81aa5a50 T drm_gem_map_detach +ffffffff81aa5a70 T drm_gem_dmabuf_vmap +ffffffff81aa5a90 T drm_gem_dmabuf_vunmap +ffffffff81aa5ab0 T drm_gem_prime_mmap +ffffffff81aa5b10 T drm_prime_pages_to_sg +ffffffff81aa5b70 T drm_prime_get_contiguous_size +ffffffff81aa5bc0 T drm_gem_prime_export +ffffffff81aa5c60 T drm_gem_prime_import_dev +ffffffff81aa5cd0 T drm_prime_sg_to_page_array +ffffffff81aa5d30 T drm_prime_sg_to_dma_addr_array +ffffffff81aa5d90 T drm_prime_gem_destroy +ffffffff81aa6000 T __drm_puts_coredump +ffffffff81aa6100 T __drm_printfn_coredump +ffffffff81aa6320 T __drm_puts_seq_file +ffffffff81aa6350 T __drm_printfn_seq_file +ffffffff81aa6380 T __drm_printfn_info +ffffffff81aa63b0 T __drm_printfn_debug +ffffffff81aa63e0 T __drm_printfn_err +ffffffff81aa6420 T drm_puts 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drm_connector_helper_hpd_irq_event +ffffffff81aa8770 t check_connector_changed +ffffffff81aa8970 T drm_helper_hpd_irq_event +ffffffff81aa8b20 T drm_crtc_helper_mode_valid_fixed +ffffffff81aa8b70 T drm_connector_helper_get_modes_from_ddc +ffffffff81aa8c20 T drm_connector_helper_get_modes_fixed +ffffffff81aa8db0 T drm_connector_helper_get_modes +ffffffff81aa8e40 T drm_connector_helper_tv_get_modes +ffffffff81aa90b0 t __delayed_work_tick +ffffffff81aaa000 T drm_property_create +ffffffff81aaa220 T drm_property_create_enum +ffffffff81aaa2e0 T drm_property_add_enum +ffffffff81aaa510 T drm_property_destroy +ffffffff81aaa5d0 T drm_property_create_bitmask +ffffffff81aaa710 T drm_property_create_range +ffffffff81aaa780 T drm_property_create_signed_range +ffffffff81aaa7f0 T drm_property_create_object +ffffffff81aaa8a0 T drm_property_create_bool +ffffffff81aaa910 T drm_mode_getproperty_ioctl +ffffffff81aaab90 T drm_property_create_blob +ffffffff81aaad00 t drm_property_free_blob +ffffffff81aaad90 T drm_property_blob_put +ffffffff81aaadd0 T drm_property_destroy_user_blobs +ffffffff81aaae60 T drm_property_blob_get +ffffffff81aaaeb0 T drm_property_lookup_blob +ffffffff81aaaed0 T drm_property_replace_global_blob +ffffffff81aab050 T drm_property_replace_blob +ffffffff81aab0c0 T drm_mode_getblob_ioctl +ffffffff81aab1a0 T drm_mode_createblob_ioctl +ffffffff81aab2d0 T drm_mode_destroyblob_ioctl +ffffffff81aab410 T drm_property_change_valid_get +ffffffff81aab680 T drm_property_change_valid_put +ffffffff81aac000 T drm_rect_intersect +ffffffff81aac080 T drm_rect_clip_scaled +ffffffff81aac2f0 T drm_rect_calc_hscale +ffffffff81aac3d0 T drm_rect_calc_vscale +ffffffff81aac4b0 T drm_rect_debug_print +ffffffff81aac5e0 T drm_rect_rotate +ffffffff81aac6a0 T drm_rect_rotate_inv +ffffffff81aad000 T drm_self_refresh_helper_update_avg_times +ffffffff81aad170 T drm_self_refresh_helper_alter_state +ffffffff81aad320 T drm_self_refresh_helper_init +ffffffff81aad4f0 t drm_self_refresh_helper_entry_work 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drm_syncobj_destroy_ioctl +ffffffff81ab12b0 T drm_syncobj_handle_to_fd_ioctl +ffffffff81ab1520 T drm_syncobj_fd_to_handle_ioctl +ffffffff81ab1740 T drm_syncobj_transfer_ioctl +ffffffff81ab1c20 T drm_timeout_abs_to_jiffies +ffffffff81ab1d00 T drm_syncobj_wait_ioctl +ffffffff81ab1ea0 t drm_syncobj_array_find +ffffffff81ab2140 t drm_syncobj_array_free +ffffffff81ab2250 T drm_syncobj_timeline_wait_ioctl +ffffffff81ab23f0 T drm_syncobj_eventfd_ioctl +ffffffff81ab2420 T drm_syncobj_reset_ioctl +ffffffff81ab2520 T drm_syncobj_signal_ioctl +ffffffff81ab26d0 T drm_syncobj_timeline_signal_ioctl +ffffffff81ab2980 T drm_syncobj_query_ioctl +ffffffff81ab2c00 t drm_syncobj_array_wait_timeout +ffffffff81ab3120 t syncobj_wait_fence_func +ffffffff81ab3140 t syncobj_eventfd_entry_fence_func +ffffffff81ab4000 T drm_vblank_count +ffffffff81ab4090 T drm_crtc_accurate_vblank_count +ffffffff81ab41d0 t drm_update_vblank_count +ffffffff81ab4670 T drm_vblank_disable_and_save +ffffffff81ab47e0 T drm_vblank_init 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drm_vma_offset_manager_init +ffffffff81aba050 T drm_vma_offset_manager_destroy +ffffffff81aba070 T drm_vma_offset_lookup_locked +ffffffff81aba100 T drm_vma_offset_add +ffffffff81aba1b0 T drm_vma_offset_remove +ffffffff81aba210 T drm_vma_node_allow +ffffffff81aba230 t vma_node_allow +ffffffff81aba380 T drm_vma_node_allow_once +ffffffff81aba3a0 T drm_vma_node_revoke +ffffffff81aba440 T drm_vma_node_is_allowed +ffffffff81abb000 T hdmi_avi_infoframe_init +ffffffff81abb070 T hdmi_avi_infoframe_check +ffffffff81abb0c0 T hdmi_avi_infoframe_pack_only +ffffffff81abb2d0 T hdmi_avi_infoframe_pack +ffffffff81abb330 T hdmi_spd_infoframe_init +ffffffff81abb410 T hdmi_spd_infoframe_check +ffffffff81abb460 T hdmi_spd_infoframe_pack_only +ffffffff81abb5a0 T hdmi_spd_infoframe_pack +ffffffff81abb710 T hdmi_audio_infoframe_init +ffffffff81abb760 T hdmi_audio_infoframe_check +ffffffff81abb7b0 T hdmi_audio_infoframe_pack_only +ffffffff81abb910 T hdmi_audio_infoframe_pack +ffffffff81abb960 T hdmi_audio_infoframe_pack_for_dp +ffffffff81abba50 T hdmi_vendor_infoframe_init +ffffffff81abbab0 T hdmi_vendor_infoframe_check +ffffffff81abbb50 T hdmi_vendor_infoframe_pack_only +ffffffff81abbd10 T hdmi_vendor_infoframe_pack +ffffffff81abbdb0 T hdmi_drm_infoframe_init +ffffffff81abbe10 T hdmi_drm_infoframe_check +ffffffff81abbe60 T hdmi_drm_infoframe_pack_only +ffffffff81abc060 T hdmi_drm_infoframe_pack +ffffffff81abc0b0 T hdmi_infoframe_check +ffffffff81abc210 T hdmi_infoframe_pack_only +ffffffff81abc440 T hdmi_infoframe_pack +ffffffff81abc5c0 T hdmi_infoframe_log +ffffffff81abd6e0 T hdmi_drm_infoframe_unpack_only +ffffffff81abd7c0 T hdmi_infoframe_unpack +ffffffff81abe000 T list_sort +ffffffff81abf000 T radix_tree_lookup +ffffffff81abf0b0 T radix_tree_iter_find +ffffffff81abf180 T radix_tree_delete +ffffffff81abf330 T radix_tree_iter_delete +ffffffff81abf350 T radix_tree_insert +ffffffff81ac0000 T sort +ffffffff81ac0040 t qsort +ffffffff81ac2000 T drm_dp_dual_mode_read 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drm_dp_read_channel_eq_delay +ffffffff81ac4560 T drm_dp_128b132b_read_aux_rd_interval +ffffffff81ac4630 T drm_dp_link_train_clock_recovery_delay +ffffffff81ac46c0 t __8b10b_clock_recovery_delay_us +ffffffff81ac4740 T drm_dp_link_train_channel_eq_delay +ffffffff81ac47b0 T drm_dp_phy_name +ffffffff81ac47f0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff81ac4810 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff81ac4880 T drm_dp_link_rate_to_bw_code +ffffffff81ac48f0 T drm_dp_bw_code_to_link_rate +ffffffff81ac4950 T drm_dp_dpcd_probe +ffffffff81ac4ac0 t drm_dp_dpcd_access +ffffffff81ac4c30 T drm_dp_dpcd_set_powered +ffffffff81ac4ca0 T drm_dp_dpcd_read +ffffffff81ac4e00 T drm_dp_dpcd_write +ffffffff81ac4f30 T drm_dp_dpcd_read_link_status +ffffffff81ac4f50 T drm_dp_dpcd_read_phy_link_status +ffffffff81ac5060 T drm_dp_downstream_is_type +ffffffff81ac50b0 T drm_dp_downstream_is_tmds +ffffffff81ac5120 T drm_dp_send_real_edid_checksum +ffffffff81ac53c0 T drm_dp_read_dpcd_caps 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drm_dp_atomic_release_time_slots +ffffffff81acdd20 T drm_dp_mst_atomic_setup_commit +ffffffff81acdeb0 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff81ace030 T drm_dp_mst_root_conn_atomic_check +ffffffff81ace160 T drm_dp_mst_update_slots +ffffffff81ace1c0 T drm_dp_check_act_status +ffffffff81ace3b0 T drm_dp_calc_pbn_mode +ffffffff81ace410 T drm_dp_mst_dump_topology +ffffffff81ace740 t drm_dp_mst_dump_mstb +ffffffff81ace7b0 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff81ace920 T drm_dp_mst_dsc_aux_for_port +ffffffff81acebb0 T drm_dp_mst_atomic_enable_dsc +ffffffff81aced60 T drm_dp_mst_atomic_check +ffffffff81acf090 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff81acf350 t drm_dp_mst_duplicate_state +ffffffff81acf550 t drm_dp_mst_destroy_state +ffffffff81acf630 T drm_atomic_get_old_mst_topology_state +ffffffff81acf640 T drm_atomic_get_new_mst_topology_state +ffffffff81acf650 T drm_dp_mst_topology_mgr_init +ffffffff81acf930 t drm_dp_mst_link_probe_work +ffffffff81acfc40 t drm_dp_tx_work +ffffffff81acfc90 t drm_dp_delayed_destroy_work +ffffffff81ad0240 t drm_dp_mst_up_req_work +ffffffff81ad0880 T drm_dp_mst_topology_mgr_destroy +ffffffff81ad0930 t drm_dp_mst_is_virtual_dpcd +ffffffff81ad0a30 t drm_dp_free_mst_branch_device +ffffffff81ad0a70 t drm_dp_mst_topology_get_port_validated_locked +ffffffff81ad0b00 t drm_dp_mst_dump_sideband_msg_tx +ffffffff81ad0d50 t process_single_down_tx_qlock +ffffffff81ad0ee0 t process_single_tx_qlock +ffffffff81ad13e0 t drm_dp_msg_data_crc4 +ffffffff81ad1510 t drm_dp_payload_send_msg +ffffffff81ad19f0 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff81ad1a80 t drm_dp_get_one_sb_msg +ffffffff81ad2240 t drm_dp_get_mst_branch_device +ffffffff81ad23c0 t drm_dp_check_and_send_link_address +ffffffff81ad24a0 t drm_dp_send_link_address +ffffffff81ad32c0 t drm_dp_send_enum_path_resources +ffffffff81ad3560 t drm_dp_port_set_pdt +ffffffff81ad3890 t drm_dp_mst_port_add_connector +ffffffff81ad3ac0 t drm_dp_mst_i2c_xfer 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ttm_pool_shrinker_scan +ffffffff81ae5d90 T ttm_pool_mgr_fini +ffffffff81ae6000 T ttm_range_man_init_nocheck +ffffffff81ae61b0 T ttm_range_man_fini_nocheck +ffffffff81ae6380 t ttm_range_man_alloc +ffffffff81ae6510 t ttm_range_man_free +ffffffff81ae6590 t ttm_range_man_intersects +ffffffff81ae65f0 t ttm_range_man_compatible +ffffffff81ae6650 t ttm_range_man_debug +ffffffff81ae7000 T ttm_lru_bulk_move_init +ffffffff81ae7020 T ttm_lru_bulk_move_tail +ffffffff81ae71e0 T ttm_resource_add_bulk_move +ffffffff81ae72b0 T ttm_resource_del_bulk_move +ffffffff81ae73f0 T ttm_resource_move_to_lru_tail +ffffffff81ae7560 T ttm_resource_init +ffffffff81ae7660 T ttm_resource_fini +ffffffff81ae76d0 T ttm_resource_alloc +ffffffff81ae7840 T ttm_resource_free +ffffffff81ae7a30 T ttm_resource_intersects +ffffffff81ae7a90 T ttm_resource_compatible +ffffffff81ae7af0 T ttm_resource_compat +ffffffff81ae7c90 T ttm_resource_set_bo +ffffffff81ae7cf0 T ttm_resource_manager_init +ffffffff81ae7da0 T ttm_resource_manager_evict_all +ffffffff81ae8030 T ttm_resource_manager_usage +ffffffff81ae80a0 T ttm_resource_manager_debug +ffffffff81ae81c0 T ttm_resource_manager_first +ffffffff81ae8250 T ttm_resource_manager_next +ffffffff81ae8370 T ttm_kmap_iter_iomap_init +ffffffff81ae83d0 T ttm_kmap_iter_linear_io_init +ffffffff81ae85f0 T ttm_kmap_iter_linear_io_fini +ffffffff81ae8640 T ttm_resource_manager_create_debugfs +ffffffff81ae8670 t ttm_kmap_iter_iomap_map_local +ffffffff81ae8760 t ttm_kmap_iter_iomap_unmap_local +ffffffff81ae8790 t ttm_kmap_iter_linear_io_map_local +ffffffff81ae9000 T ttm_sys_man_init +ffffffff81ae9140 t ttm_sys_man_alloc +ffffffff81ae91d0 t ttm_sys_man_free +ffffffff81aea000 T ttm_tt_create +ffffffff81aea120 T ttm_tt_destroy +ffffffff81aea140 T ttm_tt_init +ffffffff81aea240 T ttm_tt_fini +ffffffff81aea370 T ttm_sg_tt_init +ffffffff81aea600 T ttm_tt_swapin +ffffffff81aea740 T ttm_tt_swapout +ffffffff81aea7a0 T ttm_tt_populate +ffffffff81aea950 T ttm_tt_unpopulate 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i9xx_plane_check +ffffffff81b02280 t vlv_primary_async_flip +ffffffff81b02310 t vlv_primary_enable_flip_done +ffffffff81b02380 t vlv_primary_disable_flip_done +ffffffff81b023f0 t g4x_primary_async_flip +ffffffff81b02520 t bdw_primary_enable_flip_done +ffffffff81b02590 t bdw_primary_disable_flip_done +ffffffff81b02600 t ivb_primary_enable_flip_done +ffffffff81b02670 t ivb_primary_disable_flip_done +ffffffff81b026e0 t ilk_primary_enable_flip_done +ffffffff81b02750 t ilk_primary_disable_flip_done +ffffffff81b027c0 T i9xx_get_initial_plane_config +ffffffff81b02c20 T i9xx_fixup_initial_plane_config +ffffffff81b02ce0 t i965_plane_format_mod_supported +ffffffff81b02de0 t i8xx_plane_format_mod_supported +ffffffff81b02e90 t i9xx_plane_ctl +ffffffff81b04000 T intel_set_memory_cxsr +ffffffff81b040b0 t _intel_set_memory_cxsr +ffffffff81b043c0 T ilk_disable_lp_wm +ffffffff81b044c0 T ilk_wm_sanitize +ffffffff81b04800 T i9xx_wm_init +ffffffff81b04e90 t intel_get_cxsr_latency +ffffffff81b04f50 t ilk_compute_pipe_wm +ffffffff81b05300 t ilk_compute_intermediate_wm +ffffffff81b05540 t ilk_initial_watermarks +ffffffff81b055d0 t ilk_optimize_watermarks +ffffffff81b056a0 t ilk_wm_get_hw_state +ffffffff81b05b20 t ilk_compute_wm_level +ffffffff81b06030 t ilk_validate_wm_level +ffffffff81b06180 t ilk_compute_wm_maximums +ffffffff81b063b0 t ilk_program_watermarks +ffffffff81b071e0 t ilk_wm_merge +ffffffff81b074a0 t vlv_compute_pipe_wm +ffffffff81b07e90 t vlv_compute_intermediate_wm +ffffffff81b081e0 t vlv_initial_watermarks +ffffffff81b08270 t vlv_atomic_update_fifo +ffffffff81b08580 t vlv_optimize_watermarks +ffffffff81b08650 t vlv_wm_get_hw_state_and_sanitize +ffffffff81b09530 t _vlv_compute_pipe_wm +ffffffff81b09850 t vlv_invalidate_wms +ffffffff81b099c0 t vlv_program_watermarks +ffffffff81b0a200 t chv_set_memory_dvfs +ffffffff81b0a410 t g4x_compute_pipe_wm +ffffffff81b0ad40 t g4x_compute_intermediate_wm +ffffffff81b0b1c0 t g4x_initial_watermarks +ffffffff81b0b280 t g4x_optimize_watermarks +ffffffff81b0b380 t g4x_wm_get_hw_state_and_sanitize +ffffffff81b0bd70 t _g4x_compute_pipe_wm +ffffffff81b0c030 t g4x_program_watermarks +ffffffff81b0c400 t pnv_update_wm +ffffffff81b0cb80 t i965_update_wm +ffffffff81b0cfc0 t i9xx_update_wm +ffffffff81b0d810 t i845_update_wm +ffffffff81b0e000 T icl_dsi_frame_update +ffffffff81b0e0c0 T icl_dsi_init +ffffffff81b0eac0 t gen11_dsi_pre_pll_enable +ffffffff81b0ef60 t gen11_dsi_pre_enable +ffffffff81b121b0 t gen11_dsi_enable +ffffffff81b124c0 t gen11_dsi_disable +ffffffff81b12500 t gen11_dsi_post_disable +ffffffff81b13380 t gen11_dsi_get_config +ffffffff81b135d0 t gen11_dsi_sync_state +ffffffff81b13690 t gen11_dsi_compute_config +ffffffff81b13a50 t gen11_dsi_get_hw_state +ffffffff81b13c20 t gen11_dsi_initial_fastset_check +ffffffff81b13ca0 t gen11_dsi_get_power_domains +ffffffff81b13d90 t gen11_dsi_gate_clocks +ffffffff81b13e60 t gen11_dsi_is_clock_enabled +ffffffff81b13f30 t gen11_dsi_encoder_destroy +ffffffff81b13f40 t wait_for_cmds_dispatched_to_panel +ffffffff81b14430 t wait_for_header_credits +ffffffff81b145f0 t wait_for_payload_credits +ffffffff81b147b0 t gen11_dsi_mode_valid +ffffffff81b14830 t gen11_dsi_host_attach +ffffffff81b14860 t gen11_dsi_host_detach +ffffffff81b14890 t gen11_dsi_host_transfer +ffffffff81b15000 T intel_digital_connector_atomic_get_property +ffffffff81b150a0 T intel_digital_connector_atomic_set_property +ffffffff81b15130 T intel_digital_connector_atomic_check +ffffffff81b15240 T intel_digital_connector_duplicate_state +ffffffff81b152d0 T intel_connector_needs_modeset +ffffffff81b15340 T intel_any_crtc_needs_modeset +ffffffff81b153d0 T intel_atomic_get_digital_connector_state +ffffffff81b153e0 T intel_crtc_duplicate_state +ffffffff81b15530 T intel_crtc_free_hw_state +ffffffff81b155b0 T intel_crtc_destroy_state +ffffffff81b15690 T intel_atomic_state_alloc +ffffffff81b15730 T intel_atomic_state_free +ffffffff81b15780 T intel_atomic_state_clear +ffffffff81b157e0 T intel_atomic_get_crtc_state +ffffffff81b16000 T intel_plane_alloc +ffffffff81b160e0 T intel_plane_free +ffffffff81b16120 T intel_plane_destroy_state +ffffffff81b161f0 T intel_plane_duplicate_state +ffffffff81b162c0 T intel_adjusted_rate +ffffffff81b16340 T intel_plane_pixel_rate +ffffffff81b163d0 T intel_plane_data_rate +ffffffff81b16490 T intel_plane_calc_min_cdclk +ffffffff81b16610 T intel_plane_copy_uapi_to_hw_state +ffffffff81b16780 T intel_plane_copy_hw_state +ffffffff81b16870 T intel_plane_set_invisible +ffffffff81b16970 T intel_plane_atomic_check_with_state +ffffffff81b17610 T intel_plane_atomic_check +ffffffff81b17790 T intel_plane_update_noarm +ffffffff81b177d0 T intel_plane_update_arm +ffffffff81b17810 T intel_plane_disable_arm +ffffffff81b17830 T intel_crtc_planes_update_noarm +ffffffff81b17960 T intel_crtc_planes_update_arm +ffffffff81b17d90 T intel_atomic_plane_check_clipping +ffffffff81b18050 T intel_plane_check_src_coordinates +ffffffff81b18220 T intel_plane_helper_add +ffffffff81b18260 t intel_prepare_plane_fb +ffffffff81b18540 t intel_cleanup_plane_fb +ffffffff81b19000 T intel_audio_sdp_split_update +ffffffff81b190e0 T intel_audio_compute_config +ffffffff81b191a0 T intel_audio_codec_enable +ffffffff81b193b0 T intel_audio_codec_disable +ffffffff81b19630 T intel_audio_codec_get_config +ffffffff81b19680 T intel_audio_hooks_init +ffffffff81b19700 T intel_audio_cdclk_change_pre +ffffffff81b197a0 T intel_audio_cdclk_change_post +ffffffff81b19890 T intel_audio_init +ffffffff81b198a0 T intel_audio_register +ffffffff81b198d0 T intel_audio_deinit +ffffffff81b19920 t g4x_audio_codec_enable +ffffffff81b19b30 t g4x_audio_codec_disable +ffffffff81b19bd0 t g4x_audio_codec_get_config +ffffffff81b19d10 t ibx_audio_codec_enable +ffffffff81b19f10 t ibx_audio_codec_disable +ffffffff81b1a120 t intel_acomp_get_config +ffffffff81b1a1a0 t audio_config_hdmi_pixel_clock +ffffffff81b1a390 t hsw_audio_codec_enable +ffffffff81b1ab20 t hsw_audio_codec_disable +ffffffff81b1b000 T intel_backlight_invert_pwm_level +ffffffff81b1b0c0 T intel_backlight_set_pwm_level +ffffffff81b1b130 T intel_backlight_level_to_pwm +ffffffff81b1b350 T intel_backlight_level_from_pwm +ffffffff81b1b510 T intel_backlight_set_acpi +ffffffff81b1b750 T intel_backlight_disable +ffffffff81b1b840 T intel_backlight_enable +ffffffff81b1b900 t __intel_backlight_enable +ffffffff81b1ba50 T intel_backlight_device_register +ffffffff81b1bd70 t kasprintf +ffffffff81b1be50 T intel_backlight_device_unregister +ffffffff81b1beb0 T intel_backlight_update +ffffffff81b1bf50 T intel_backlight_setup +ffffffff81b1c140 T intel_backlight_destroy +ffffffff81b1c170 T intel_backlight_init_funcs +ffffffff81b1c2f0 t intel_backlight_device_update_status +ffffffff81b1c550 t intel_backlight_device_get_brightness +ffffffff81b1c720 t bxt_setup_backlight +ffffffff81b1c9b0 t bxt_get_backlight +ffffffff81b1c9f0 t bxt_set_backlight +ffffffff81b1ca30 t bxt_disable_backlight +ffffffff81b1cb90 t bxt_enable_backlight +ffffffff81b1ce70 t bxt_hz_to_pwm +ffffffff81b1ceb0 t cnp_setup_backlight +ffffffff81b1d1b0 t cnp_disable_backlight +ffffffff81b1d290 t cnp_enable_backlight +ffffffff81b1d480 t cnp_hz_to_pwm +ffffffff81b1d4c0 t lpt_setup_backlight +ffffffff81b1d8a0 t lpt_get_backlight +ffffffff81b1d900 t lpt_set_backlight +ffffffff81b1d980 t lpt_disable_backlight +ffffffff81b1dad0 t lpt_enable_backlight +ffffffff81b1dd20 t lpt_hz_to_pwm +ffffffff81b1dd90 t pch_get_backlight +ffffffff81b1ddf0 t spt_hz_to_pwm +ffffffff81b1de40 t pch_setup_backlight +ffffffff81b1e090 t pch_set_backlight +ffffffff81b1e110 t pch_disable_backlight +ffffffff81b1e230 t pch_enable_backlight +ffffffff81b1e4f0 t pch_hz_to_pwm +ffffffff81b1e530 t ext_pwm_setup_backlight +ffffffff81b1e5f0 t ext_pwm_get_backlight +ffffffff81b1e640 t ext_pwm_set_backlight +ffffffff81b1e660 t ext_pwm_disable_backlight +ffffffff81b1e680 t ext_pwm_enable_backlight +ffffffff81b1e6b0 t vlv_setup_backlight +ffffffff81b1e940 t vlv_get_backlight +ffffffff81b1e9f0 t vlv_set_backlight +ffffffff81b1ea80 t vlv_disable_backlight +ffffffff81b1eb60 t vlv_enable_backlight +ffffffff81b1ed40 t vlv_hz_to_pwm +ffffffff81b1edf0 t i965_setup_backlight +ffffffff81b1f060 t i9xx_get_backlight +ffffffff81b1f110 t i9xx_set_backlight +ffffffff81b1f270 t i965_disable_backlight +ffffffff81b1f340 t i965_enable_backlight +ffffffff81b1f530 t i965_hz_to_pwm +ffffffff81b1f590 t i9xx_setup_backlight +ffffffff81b1f910 t i9xx_disable_backlight +ffffffff81b1f980 t i9xx_enable_backlight +ffffffff81b1fb60 t i9xx_hz_to_pwm +ffffffff81b1fbc0 t intel_pwm_setup_backlight +ffffffff81b1fce0 t intel_pwm_get_backlight +ffffffff81b1fdc0 t intel_pwm_set_backlight +ffffffff81b1fe80 t intel_pwm_disable_backlight +ffffffff81b1ff40 t intel_pwm_enable_backlight +ffffffff81b21000 T intel_bios_encoder_port +ffffffff81b21080 t dvo_port_to_port +ffffffff81b21260 T intel_bios_dp_max_link_rate +ffffffff81b212e0 T intel_bios_dp_max_lane_count +ffffffff81b21330 T intel_bios_encoder_supports_dvi +ffffffff81b21360 T intel_bios_encoder_supports_hdmi +ffffffff81b213a0 T intel_bios_encoder_supports_dp +ffffffff81b213d0 T intel_bios_encoder_supports_edp +ffffffff81b21410 T intel_bios_encoder_supports_dsi +ffffffff81b21440 T intel_bios_encoder_is_lspcon +ffffffff81b21490 T intel_bios_hdmi_level_shift +ffffffff81b214f0 T intel_bios_hdmi_max_tmds_clock +ffffffff81b21580 T intel_bios_is_valid_vbt +ffffffff81b21680 T intel_bios_init +ffffffff81b23750 T intel_bios_init_panel_early +ffffffff81b23770 t intel_bios_init_panel +ffffffff81b25a40 T intel_bios_init_panel_late +ffffffff81b25a60 T intel_bios_driver_remove +ffffffff81b25b70 T intel_bios_fini_panel +ffffffff81b25c80 T intel_bios_is_tv_present +ffffffff81b25d00 T intel_bios_is_lvds_present +ffffffff81b25db0 T intel_bios_is_port_present +ffffffff81b25e90 T intel_bios_encoder_supports_dp_dual_mode +ffffffff81b25f00 T intel_bios_is_dsi_present +ffffffff81b25fd0 T intel_bios_get_dsc_params +ffffffff81b26200 T intel_bios_dp_aux_ch +ffffffff81b26300 T intel_bios_dp_has_shared_aux_ch +ffffffff81b26390 T intel_bios_dp_boost_level +ffffffff81b26420 T intel_bios_hdmi_boost_level +ffffffff81b264c0 T intel_bios_hdmi_ddc_pin +ffffffff81b26630 T intel_bios_encoder_supports_typec_usb +ffffffff81b26680 T intel_bios_encoder_supports_tbt +ffffffff81b266d0 T intel_bios_encoder_lane_reversal +ffffffff81b26710 T intel_bios_encoder_hpd_invert +ffffffff81b26750 T intel_bios_encoder_data_lookup +ffffffff81b26820 T intel_bios_for_each_encoder +ffffffff81b268a0 t opregion_get_panel_type +ffffffff81b268c0 t vbt_get_panel_type +ffffffff81b269d0 t pnpid_get_panel_type +ffffffff81b26bd0 t fallback_get_panel_type +ffffffff81b26c00 t fill_detail_timing_data +ffffffff81b27000 T icl_pcode_restrict_qgv_points +ffffffff81b27130 T intel_bw_init_hw +ffffffff81b272a0 t tgl_get_bw_info +ffffffff81b278c0 t icl_get_bw_info +ffffffff81b27cb0 T intel_bw_crtc_update +ffffffff81b27da0 t intel_bw_crtc_data_rate +ffffffff81b27ec0 T intel_atomic_get_old_bw_state +ffffffff81b27ee0 T intel_atomic_get_new_bw_state +ffffffff81b27f00 T intel_atomic_get_bw_state +ffffffff81b27f20 T intel_bw_min_cdclk +ffffffff81b281a0 T intel_bw_calc_min_cdclk +ffffffff81b285b0 T intel_bw_atomic_check +ffffffff81b290e0 T intel_bw_init +ffffffff81b29160 t icl_get_qgv_points +ffffffff81b29740 t skl_plane_calc_dbuf_bw +ffffffff81b29890 t intel_bw_duplicate_state +ffffffff81b29910 t intel_bw_destroy_state +ffffffff81b2a000 T intel_cdclk_get_cdclk +ffffffff81b2a020 T intel_cdclk_init_hw +ffffffff81b2a850 T intel_cdclk_uninit_hw +ffffffff81b2a970 T intel_cdclk_needs_modeset +ffffffff81b2a9b0 T intel_cdclk_dump_config +ffffffff81b2aa30 T intel_set_cdclk_pre_plane_update +ffffffff81b2ada0 t intel_set_cdclk +ffffffff81b2b1c0 T intel_set_cdclk_post_plane_update +ffffffff81b2b480 T intel_crtc_compute_min_cdclk +ffffffff81b2b830 T intel_atomic_get_cdclk_state +ffffffff81b2b850 T intel_cdclk_atomic_check +ffffffff81b2b970 T intel_cdclk_init +ffffffff81b2b9f0 T intel_modeset_calc_cdclk +ffffffff81b2c0c0 t intel_cdclk_can_crawl +ffffffff81b2c150 T intel_update_max_cdclk +ffffffff81b2c4d0 T intel_update_cdclk +ffffffff81b2c570 T intel_read_rawclk +ffffffff81b2c720 t i9xx_hrawclk +ffffffff81b2c7e0 T intel_cdclk_debugfs_register +ffffffff81b2c810 T intel_init_cdclk_hooks +ffffffff81b2cc40 t bxt_set_cdclk +ffffffff81b2d300 t _bxt_set_cdclk +ffffffff81b2db70 t skl_set_cdclk +ffffffff81b2e230 t intel_cdclk_duplicate_state +ffffffff81b2e2c0 t intel_cdclk_destroy_state +ffffffff81b2e2e0 t bxt_get_cdclk +ffffffff81b2e550 t bxt_modeset_calc_cdclk +ffffffff81b2e9e0 t tgl_calc_voltage_level +ffffffff81b2ea30 t intel_compute_min_cdclk +ffffffff81b2ec70 t rplu_calc_voltage_level +ffffffff81b2ecc0 t ehl_calc_voltage_level +ffffffff81b2ed10 t icl_calc_voltage_level +ffffffff81b2ed60 t bxt_calc_voltage_level +ffffffff81b2edb0 t skl_get_cdclk +ffffffff81b2efe0 t skl_modeset_calc_cdclk +ffffffff81b2f1f0 t bdw_get_cdclk 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intel_color_post_update +ffffffff81b32100 T intel_color_prepare_commit +ffffffff81b32130 T intel_color_cleanup_commit +ffffffff81b32190 T intel_color_check +ffffffff81b321b0 T intel_color_get_config +ffffffff81b32230 T intel_color_lut_equal +ffffffff81b32290 T intel_color_assert_luts +ffffffff81b32590 T intel_color_crtc_init +ffffffff81b32610 T intel_color_init +ffffffff81b32750 T intel_color_init_hooks +ffffffff81b32880 t chv_color_check +ffffffff81b32dc0 t i9xx_color_commit_arm +ffffffff81b32dd0 t chv_load_luts +ffffffff81b331e0 t chv_read_luts +ffffffff81b33460 t chv_lut_equal +ffffffff81b33790 t chv_read_csc +ffffffff81b338b0 t intel_color_add_affected_planes +ffffffff81b33a30 t _check_luts +ffffffff81b33bb0 t i965_load_luts +ffffffff81b33f20 t i965_read_luts +ffffffff81b34300 t vlv_color_check +ffffffff81b347d0 t vlv_load_luts +ffffffff81b34980 t i965_lut_equal +ffffffff81b34b60 t vlv_read_csc +ffffffff81b34d40 t i9xx_color_check +ffffffff81b34ff0 t i9xx_load_luts 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ilk_csc_limited_range +ffffffff81b39620 t ilk_assign_csc +ffffffff81b39920 t ivb_color_check +ffffffff81b3a000 t bdw_load_luts +ffffffff81b3a200 t bdw_read_luts +ffffffff81b3a420 t ivb_lut_equal +ffffffff81b3a7f0 t ilk_assign_luts +ffffffff81b3aa50 t ilk_color_commit_noarm +ffffffff81b3aaa0 t hsw_color_commit_arm +ffffffff81b3ab60 t ilk_read_csc +ffffffff81b3abb0 t ivb_load_luts +ffffffff81b3adb0 t ivb_read_luts +ffffffff81b3b2a0 t ivb_load_lut_10 +ffffffff81b3b4b0 t ilk_color_commit_arm +ffffffff81b3b540 t ilk_color_check +ffffffff81b3b7c0 t ilk_load_luts +ffffffff81b3ba50 t ilk_read_luts +ffffffff81b3bcd0 t ilk_lut_equal +ffffffff81b3d000 T intel_combo_phy_power_up_lanes +ffffffff81b3d140 T intel_combo_phy_init +ffffffff81b3d6b0 T intel_combo_phy_uninit +ffffffff81b3d8a0 t icl_combo_phy_verify_state +ffffffff81b3e000 T intel_connector_init +ffffffff81b3e090 T intel_connector_alloc +ffffffff81b3e140 T intel_connector_free +ffffffff81b3e190 T intel_connector_destroy +ffffffff81b3e210 T intel_connector_register +ffffffff81b3e220 T intel_connector_unregister +ffffffff81b3e230 T intel_connector_attach_encoder +ffffffff81b3e250 T intel_connector_get_hw_state +ffffffff81b3e2b0 T intel_connector_get_pipe +ffffffff81b3e380 T intel_connector_update_modes +ffffffff81b3e3b0 T intel_ddc_get_modes +ffffffff81b3e440 T intel_attach_force_audio_property +ffffffff81b3e4e0 T intel_attach_broadcast_rgb_property +ffffffff81b3e590 T intel_attach_aspect_ratio_property +ffffffff81b3e600 T intel_attach_hdmi_colorspace_property +ffffffff81b3e660 T intel_attach_dp_colorspace_property +ffffffff81b3e6c0 T intel_attach_scaling_mode_property +ffffffff81b3f000 T intel_crt_port_enabled +ffffffff81b3f090 T intel_crt_reset +ffffffff81b3f190 T intel_crt_init +ffffffff81b3f650 t hsw_crt_get_config +ffffffff81b3f710 t hsw_crt_compute_config +ffffffff81b3f820 t hsw_pre_pll_enable_crt +ffffffff81b3f890 t hsw_pre_enable_crt +ffffffff81b3f940 t hsw_enable_crt +ffffffff81b3fb30 t hsw_disable_crt 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intel_mtl_port_pll_type +ffffffff81b4c390 T intel_c10pll_state_verify +ffffffff81b4c6d0 t __intel_cx0_read +ffffffff81b4cb20 t __intel_cx0_write +ffffffff81b4cef0 t intel_cx0_bus_reset +ffffffff81b4d040 t intel_cx0_wait_for_ack +ffffffff81b4d1f0 t intel_cx0_powerdown_change_sequence +ffffffff81b4d4a0 t intel_c20_sram_write +ffffffff81b4e000 T hsw_prepare_dp_ddi_buffers +ffffffff81b4e1d0 T intel_wait_ddi_buf_idle +ffffffff81b4e420 T intel_ddi_set_dp_msa +ffffffff81b4e610 T intel_ddi_enable_transcoder_func +ffffffff81b4e700 t intel_ddi_transcoder_func_reg_val_get +ffffffff81b4e9c0 T intel_ddi_disable_transcoder_func +ffffffff81b4ebe0 T intel_ddi_toggle_hdcp_bits +ffffffff81b4ed40 T intel_ddi_connector_get_hw_state +ffffffff81b4eeb0 T intel_ddi_get_hw_state +ffffffff81b4ef30 t intel_ddi_get_encoder_pipes +ffffffff81b4f3f0 T intel_ddi_enable_transcoder_clock +ffffffff81b4f4c0 T intel_ddi_disable_transcoder_clock +ffffffff81b4f530 T intel_ddi_level +ffffffff81b4f750 T icl_ddi_combo_get_pll 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intel_ddi_tc_encoder_suspend_complete +ffffffff81b58ed0 t intel_ddi_tc_encoder_shutdown_complete +ffffffff81b58f10 t lpt_digital_port_connected +ffffffff81b58f80 t bdw_digital_port_connected +ffffffff81b58ff0 t hsw_digital_port_connected +ffffffff81b59060 t intel_ddi_init_dp_connector +ffffffff81b59150 t intel_ddi_init_hdmi_connector +ffffffff81b591c0 t intel_ddi_encoder_reset +ffffffff81b592b0 t intel_ddi_encoder_destroy +ffffffff81b593a0 t intel_ddi_encoder_late_register +ffffffff81b59400 t mtl_ddi_enable_d2d +ffffffff81b59600 t intel_wait_ddi_buf_active +ffffffff81b59980 t intel_ddi_main_link_aux_domain +ffffffff81b59a80 t icl_program_mg_dp_mode +ffffffff81b59db0 t intel_ddi_init_dp_buf_reg +ffffffff81b59fd0 t intel_disable_ddi_buf +ffffffff81b5a1b0 t mtl_disable_ddi_buf +ffffffff81b5a650 t intel_ddi_disable_fec_state +ffffffff81b5a7b0 t mtl_ddi_prepare_link_retrain +ffffffff81b5ab50 t intel_ddi_prepare_link_retrain +ffffffff81b5b0e0 t intel_ddi_set_link_train +ffffffff81b5b240 t intel_ddi_set_idle_link_train +ffffffff81b5b430 t intel_ddi_dp_voltage_max +ffffffff81b5b4f0 t intel_ddi_dp_preemph_max +ffffffff81b5c000 T is_hobl_buf_trans +ffffffff81b5c040 T intel_ddi_buf_trans_init +ffffffff81b5c330 t mtl_get_cx0_buf_trans +ffffffff81b5c430 t dg2_get_snps_buf_trans +ffffffff81b5c4b0 t adlp_get_combo_buf_trans +ffffffff81b5c5d0 t adlp_get_dkl_buf_trans +ffffffff81b5c630 t adls_get_combo_buf_trans +ffffffff81b5c750 t rkl_get_combo_buf_trans +ffffffff81b5c870 t dg1_get_combo_buf_trans +ffffffff81b5c990 t tgl_get_combo_buf_trans +ffffffff81b5cad0 t tgl_get_dkl_buf_trans +ffffffff81b5cb30 t jsl_get_combo_buf_trans +ffffffff81b5cbd0 t ehl_get_combo_buf_trans +ffffffff81b5cc70 t icl_get_combo_buf_trans +ffffffff81b5cd20 t icl_get_mg_buf_trans +ffffffff81b5cd80 t bxt_get_buf_trans +ffffffff81b5ce00 t kbl_y_get_buf_trans +ffffffff81b5cea0 t kbl_u_get_buf_trans +ffffffff81b5cf40 t kbl_get_buf_trans +ffffffff81b5cfe0 t skl_y_get_buf_trans +ffffffff81b5d080 t skl_u_get_buf_trans +ffffffff81b5d120 t skl_get_buf_trans +ffffffff81b5d1c0 t bdw_get_buf_trans +ffffffff81b5d250 t hsw_get_buf_trans +ffffffff81b5e000 T vlv_get_hpll_vco +ffffffff81b5e050 T vlv_get_cck_clock +ffffffff81b5e100 T vlv_get_cck_clock_hpll +ffffffff81b5e220 T intel_update_czclk +ffffffff81b5e2b0 T is_trans_port_sync_master +ffffffff81b5e2e0 T is_trans_port_sync_mode +ffffffff81b5e320 T intel_crtc_bigjoiner_slave_pipes +ffffffff81b5e380 T intel_crtc_is_bigjoiner_slave +ffffffff81b5e3e0 T intel_crtc_is_bigjoiner_master +ffffffff81b5e440 T intel_master_crtc +ffffffff81b5e4e0 T assert_transcoder +ffffffff81b5e6e0 t transcoder_name +ffffffff81b5e720 T vlv_wait_port_ready +ffffffff81b5e880 T intel_enable_transcoder +ffffffff81b5eb60 t assert_planes_disabled +ffffffff81b5ecb0 T intel_disable_transcoder +ffffffff81b5ef10 T intel_rotation_info_size +ffffffff81b5ef60 T intel_remapped_info_size +ffffffff81b5f090 T intel_plane_uses_fence +ffffffff81b5f0e0 T intel_fb_xy_to_linear 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intel_zero_m_n +ffffffff81b60610 T intel_set_m_n +ffffffff81b606f0 T intel_cpu_transcoder_has_m2_n2 +ffffffff81b60750 T intel_cpu_transcoder_set_m1_n1 +ffffffff81b60940 T intel_cpu_transcoder_set_m2_n2 +ffffffff81b60ab0 T i9xx_set_pipeconf +ffffffff81b60c70 T ilk_set_pipeconf +ffffffff81b60e50 T bdw_get_pipe_misc_bpp +ffffffff81b60f30 T ilk_get_lanes_required +ffffffff81b60f90 T intel_get_m_n +ffffffff81b610c0 T intel_cpu_transcoder_get_m1_n1 +ffffffff81b61290 T intel_cpu_transcoder_get_m2_n2 +ffffffff81b61420 T intel_crtc_get_pipe_config +ffffffff81b614a0 T i9xx_crtc_clock_get +ffffffff81b61770 T intel_dotclock_calculate +ffffffff81b617d0 T intel_crtc_dotclock +ffffffff81b618a0 T intel_encoder_current_mode +ffffffff81b61aa0 T intel_fuzzy_clock_check +ffffffff81b61af0 T intel_pipe_config_compare +ffffffff81b65560 t pipe_config_mismatch +ffffffff81b65660 t pipe_config_infoframe_mismatch +ffffffff81b65850 T intel_modeset_all_pipes +ffffffff81b65a80 T intel_atomic_add_affected_planes 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i9xx_get_pipe_config +ffffffff81b724a0 t valleyview_crtc_enable +ffffffff81b729c0 t i9xx_crtc_disable +ffffffff81b72de0 t i9xx_pfit_enable +ffffffff81b72f80 t i9xx_crtc_enable +ffffffff81b74000 T intel_display_device_probe +ffffffff81b74290 T intel_display_device_info_runtime_init +ffffffff81b74920 T intel_display_device_info_print +ffffffff81b75000 T intel_display_driver_probe_defer +ffffffff81b75030 T intel_display_driver_init_hw +ffffffff81b75100 T intel_display_driver_early_probe +ffffffff81b751c0 T intel_display_driver_probe_noirq +ffffffff81b75540 T intel_display_driver_probe_nogem +ffffffff81b75910 T intel_display_driver_probe +ffffffff81b759f0 T intel_display_driver_register +ffffffff81b75a80 T intel_display_driver_remove +ffffffff81b75b50 T intel_display_driver_remove_noirq +ffffffff81b75c50 T intel_display_driver_remove_nogem +ffffffff81b75ca0 T intel_display_driver_unregister +ffffffff81b75d40 T intel_display_driver_suspend +ffffffff81b75e00 T __intel_display_driver_resume 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gen8_irq_power_well_pre_disable +ffffffff81b7c100 T valleyview_enable_display_irqs +ffffffff81b7c260 T valleyview_disable_display_irqs +ffffffff81b7c3b0 T ilk_de_irq_postinstall +ffffffff81b7c4d0 T gen8_de_irq_postinstall +ffffffff81b7c9b0 T gen11_de_irq_postinstall +ffffffff81b7ca30 T dg1_de_irq_postinstall +ffffffff81b7cab0 T intel_display_irq_init +ffffffff81b7d000 T intel_display_power_domain_str +ffffffff81b7d070 T __intel_display_power_is_enabled +ffffffff81b7d150 T intel_display_power_is_enabled +ffffffff81b7d290 T intel_display_power_set_target_dc_state +ffffffff81b7d3e0 T intel_display_power_get +ffffffff81b7d480 t __intel_display_power_get_domain +ffffffff81b7d690 T intel_display_power_get_if_enabled +ffffffff81b7d810 T __intel_display_power_put_async +ffffffff81b7da40 t __intel_display_power_put_domain +ffffffff81b7dbe0 T intel_display_power_flush_work +ffffffff81b7dd30 t release_async_put_domains +ffffffff81b7de40 T intel_display_power_put_unchecked +ffffffff81b7deb0 T intel_display_power_get_in_set +ffffffff81b7dfb0 T intel_display_power_get_in_set_if_enabled +ffffffff81b7e070 T intel_display_power_put_mask_in_set +ffffffff81b7e160 T intel_power_domains_init +ffffffff81b7e3e0 t intel_display_power_put_async_work +ffffffff81b7e6b0 T intel_power_domains_cleanup +ffffffff81b7e6d0 T gen9_dbuf_slices_update +ffffffff81b7e930 T intel_power_domains_init_hw +ffffffff81b7efa0 t icl_display_core_init +ffffffff81b7f8b0 t bxt_display_core_init +ffffffff81b7fa60 t vlv_cmnlane_wa +ffffffff81b7fb70 t assert_ved_power_gated +ffffffff81b7fc40 t hsw_assert_cdclk +ffffffff81b7fd80 t intel_pch_reset_handshake +ffffffff81b7fe30 T intel_power_domains_driver_remove +ffffffff81b7ff50 T intel_power_domains_sanitize_state +ffffffff81b80070 T intel_power_domains_enable +ffffffff81b800e0 T intel_power_domains_disable +ffffffff81b801c0 T intel_power_domains_suspend +ffffffff81b80420 t icl_display_core_uninit +ffffffff81b80580 t bxt_display_core_uninit +ffffffff81b80680 T intel_power_domains_resume +ffffffff81b80780 T intel_display_power_suspend_late +ffffffff81b80880 t hsw_enable_pc8 +ffffffff81b817b0 T intel_display_power_resume_early +ffffffff81b818c0 t hsw_disable_pc8 +ffffffff81b81dd0 T intel_display_power_suspend +ffffffff81b81e60 T intel_display_power_resume +ffffffff81b81f80 T intel_display_power_debug +ffffffff81b82080 T intel_display_power_ddi_io_domain +ffffffff81b82180 T intel_display_power_ddi_lanes_domain +ffffffff81b82280 T intel_display_power_aux_io_domain +ffffffff81b82390 T intel_display_power_legacy_aux_domain +ffffffff81b824a0 T intel_display_power_tbt_aux_domain +ffffffff81b825b0 t __delayed_work_tick +ffffffff81b83000 T intel_display_power_map_init +ffffffff81b83180 t __set_power_wells +ffffffff81b83580 T intel_display_power_map_cleanup +ffffffff81b84000 T lookup_power_well +ffffffff81b840c0 T intel_power_well_enable +ffffffff81b84160 T intel_power_well_name +ffffffff81b841a0 T intel_power_well_disable +ffffffff81b84210 T intel_power_well_sync_hw +ffffffff81b84290 T intel_power_well_get +ffffffff81b84340 T intel_power_well_put +ffffffff81b84440 T intel_power_well_is_enabled +ffffffff81b84460 T intel_power_well_is_enabled_cached +ffffffff81b84490 T intel_display_power_well_is_enabled +ffffffff81b84550 T intel_power_well_is_always_on +ffffffff81b84590 T intel_power_well_domains +ffffffff81b845c0 T intel_power_well_refcount +ffffffff81b845f0 T gen9_sanitize_dc_state +ffffffff81b846d0 T gen9_set_dc_state +ffffffff81b84aa0 T gen9_enable_dc5 +ffffffff81b84d60 T skl_enable_dc6 +ffffffff81b84ef0 T bxt_enable_dc9 +ffffffff81b850f0 T bxt_disable_dc9 +ffffffff81b85210 T gen9_disable_dc_states +ffffffff81b85650 T chv_phy_powergate_ch +ffffffff81b85780 t assert_chv_phy_status +ffffffff81b85b70 T chv_phy_powergate_lanes +ffffffff81b85e30 t i9xx_power_well_sync_hw_noop +ffffffff81b85e60 t i9xx_always_on_power_well_noop +ffffffff81b85e90 t i9xx_always_on_power_well_enabled +ffffffff81b85ec0 t chv_pipe_power_well_sync_hw +ffffffff81b85ef0 t chv_pipe_power_well_enable +ffffffff81b85f30 t chv_pipe_power_well_disable +ffffffff81b85fc0 t chv_pipe_power_well_enabled +ffffffff81b860e0 t chv_dpio_cmn_power_well_enable +ffffffff81b86360 t chv_dpio_cmn_power_well_disable +ffffffff81b864c0 t vlv_power_well_enabled +ffffffff81b86600 t i830_pipes_power_well_sync_hw +ffffffff81b86710 t i830_pipes_power_well_enable +ffffffff81b867e0 t i830_pipes_power_well_disable +ffffffff81b86820 t i830_pipes_power_well_enabled +ffffffff81b868d0 t hsw_power_well_sync_hw +ffffffff81b869e0 t hsw_power_well_enable +ffffffff81b86ca0 t hsw_power_well_disable +ffffffff81b86d70 t hsw_power_well_enabled +ffffffff81b86e70 t gen9_dc_off_power_well_enable +ffffffff81b86e80 t gen9_dc_off_power_well_disable +ffffffff81b86f30 t gen9_dc_off_power_well_enabled +ffffffff81b86fd0 t bxt_dpio_cmn_power_well_enable +ffffffff81b87000 t bxt_dpio_cmn_power_well_disable +ffffffff81b87030 t bxt_dpio_cmn_power_well_enabled +ffffffff81b87060 t vlv_display_power_well_enable +ffffffff81b870a0 t vlv_display_power_well_disable +ffffffff81b87140 t vlv_dpio_cmn_power_well_enable +ffffffff81b871e0 t vlv_dpio_cmn_power_well_disable +ffffffff81b87310 t vlv_power_well_enable +ffffffff81b87330 t vlv_power_well_disable +ffffffff81b87350 t icl_aux_power_well_enable +ffffffff81b87b20 t icl_aux_power_well_disable +ffffffff81b87df0 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81b87e10 t tgl_tc_cold_off_power_well_enable +ffffffff81b87e30 t tgl_tc_cold_off_power_well_disable +ffffffff81b87e50 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81b87e80 t xelpdp_aux_power_well_enable +ffffffff81b87f60 t xelpdp_aux_power_well_disable +ffffffff81b88040 t xelpdp_aux_power_well_enabled +ffffffff81b88100 t chv_set_pipe_power_well +ffffffff81b88360 t vlv_display_power_well_init +ffffffff81b88780 t vlv_set_power_well +ffffffff81b88a00 t hsw_wait_for_power_well_enable +ffffffff81b88b60 t hsw_wait_for_power_well_disable +ffffffff81b88e80 t tgl_tc_cold_request +ffffffff81b8a000 T intel_display_reset_prepare +ffffffff81b8a240 T intel_display_reset_finish +ffffffff81b8b000 T intel_display_rps_boost_after_vblank +ffffffff81b8b140 t do_rps_boost +ffffffff81b8b200 T intel_display_rps_mark_interactive +ffffffff81b8c000 T intel_dkl_phy_init +ffffffff81b8c020 T intel_dkl_phy_read +ffffffff81b8c170 T intel_dkl_phy_write +ffffffff81b8c2a0 T intel_dkl_phy_rmw +ffffffff81b8c400 T intel_dkl_phy_posting_read +ffffffff81b8d000 T intel_dmc_has_payload +ffffffff81b8d050 T intel_dmc_enable_pipe +ffffffff81b8d180 T intel_dmc_disable_pipe +ffffffff81b8d2b0 T intel_dmc_load_program +ffffffff81b8dbb0 t pipedmc_clock_gating_wa +ffffffff81b8de00 T intel_dmc_disable_program +ffffffff81b8e060 T assert_dmc_loaded +ffffffff81b8e220 T intel_dmc_init +ffffffff81b8e510 t dmc_load_work_fn +ffffffff81b8eef0 T intel_dmc_suspend +ffffffff81b8ef80 T intel_dmc_resume +ffffffff81b8f030 T intel_dmc_fini +ffffffff81b8f1c0 T intel_dmc_print_error_state +ffffffff81b8f2d0 T intel_dmc_debugfs_register +ffffffff81b90000 T intel_dp_is_edp +ffffffff81b90030 T intel_dp_is_uhbr +ffffffff81b90070 T intel_dp_max_lane_count +ffffffff81b900e0 T intel_dp_link_required +ffffffff81b90120 T intel_dp_max_data_rate +ffffffff81b90180 T intel_dp_can_bigjoiner +ffffffff81b901f0 T intel_dp_get_link_train_fallback_values +ffffffff81b905f0 T intel_dp_mode_to_fec_clock +ffffffff81b90640 T intel_dp_dsc_nearest_valid_bpp +ffffffff81b90750 T intel_dp_dsc_get_output_bpp +ffffffff81b90880 T intel_dp_dsc_get_slice_count +ffffffff81b90a30 T intel_dp_min_bpp +ffffffff81b90a70 T intel_dp_need_bigjoiner +ffffffff81b90ae0 T intel_dp_source_supports_tps3 +ffffffff81b90b30 T intel_dp_source_supports_tps4 +ffffffff81b90b70 T intel_dp_max_link_rate +ffffffff81b90c30 T intel_dp_rate_select +ffffffff81b90cd0 T intel_dp_compute_rate +ffffffff81b90db0 T intel_dp_has_hdmi_sink +ffffffff81b90df0 T intel_dp_adjust_compliance_config +ffffffff81b90f40 T intel_dp_dsc_compute_bpp +ffffffff81b91000 T intel_dp_dsc_compute_config +ffffffff81b91760 T intel_dp_limited_color_range +ffffffff81b917d0 T intel_dp_compute_psr_vsc_sdp +ffffffff81b91850 T intel_dp_needs_vsc_sdp +ffffffff81b918a0 t intel_dp_compute_vsc_colorimetry +ffffffff81b91a20 T intel_dp_compute_config +ffffffff81b91ef0 t intel_dp_compute_output_format +ffffffff81b92150 t intel_dp_audio_compute_config +ffffffff81b92240 t intel_dp_drrs_compute_config +ffffffff81b92430 t intel_dp_compute_vsc_sdp +ffffffff81b924e0 t intel_dp_compute_hdr_metadata_infoframe_sdp +ffffffff81b92590 T intel_dp_set_link_params +ffffffff81b925d0 T intel_edp_backlight_on +ffffffff81b92680 T intel_edp_backlight_off +ffffffff81b92730 T intel_dp_sink_set_decompression_state +ffffffff81b927e0 T intel_dp_wait_source_oui +ffffffff81b928e0 T intel_dp_set_power +ffffffff81b92b60 T intel_dp_sync_state +ffffffff81b92bf0 t intel_dp_get_dpcd +ffffffff81b92d90 t intel_dp_reset_max_link_params +ffffffff81b92eb0 T intel_dp_initial_fastset_check +ffffffff81b93000 T intel_dp_check_frl_training +ffffffff81b93690 T intel_dp_pcon_dsc_configure +ffffffff81b938c0 T intel_dp_configure_protocol_converter +ffffffff81b93ab0 T intel_dp_get_colorimetry_status +ffffffff81b93b20 T intel_edp_fixup_vbt_bpp +ffffffff81b93bb0 T intel_write_dp_vsc_sdp +ffffffff81b93d60 T intel_dp_set_infoframes +ffffffff81b93ea0 t intel_write_dp_sdp +ffffffff81b941a0 T intel_read_dp_sdp +ffffffff81b944f0 T intel_dp_get_active_pipes +ffffffff81b94750 T intel_dp_retrain_link +ffffffff81b94ac0 t intel_dp_needs_link_retrain +ffffffff81b94c70 T intel_dp_phy_test +ffffffff81b95440 T intel_digital_port_connected +ffffffff81b95510 T intel_dp_encoder_flush_work +ffffffff81b95590 T intel_dp_encoder_suspend +ffffffff81b955d0 T intel_dp_encoder_shutdown +ffffffff81b95610 T intel_dp_hpd_pulse +ffffffff81b95da0 T intel_dp_is_port_edp +ffffffff81b95e30 T intel_dp_init_connector +ffffffff81b97260 t intel_dp_modeset_retry_work_fn +ffffffff81b97320 t intel_dp_set_common_rates +ffffffff81b974c0 T intel_dp_mst_suspend +ffffffff81b97570 T intel_dp_mst_resume +ffffffff81b97640 t intel_dp_output_format +ffffffff81b97780 t intel_dp_compute_link_config +ffffffff81b97fe0 t intel_dp_tmds_clock_valid +ffffffff81b98080 t intel_dp_set_sink_rates +ffffffff81b982e0 t intel_dp_check_device_service_irq +ffffffff81b98990 t intel_dp_force +ffffffff81b98af0 t intel_dp_connector_register +ffffffff81b98bf0 t intel_dp_connector_unregister +ffffffff81b98c50 t intel_dp_oob_hotplug_event +ffffffff81b98ce0 t intel_dp_set_edid +ffffffff81b99190 t intel_dp_get_modes +ffffffff81b992a0 t intel_dp_detect +ffffffff81b99c70 t intel_dp_mode_valid +ffffffff81b9a070 t intel_dp_connector_atomic_check +ffffffff81b9a480 t intel_dp_get_dsc_sink_cap +ffffffff81b9a610 t intel_dp_mode_min_output_bpp +ffffffff81b9a680 t intel_dp_mode_valid_downstream +ffffffff81b9a870 t icl_max_source_rate +ffffffff81b9b000 T intel_dp_aux_pack +ffffffff81b9b070 T intel_dp_aux_fini +ffffffff81b9b090 T intel_dp_aux_init +ffffffff81b9b2b0 t xelpdp_aux_ctl_reg +ffffffff81b9b390 t xelpdp_aux_data_reg +ffffffff81b9b470 t tgl_aux_ctl_reg +ffffffff81b9b500 t tgl_aux_data_reg +ffffffff81b9b5a0 t skl_aux_ctl_reg +ffffffff81b9b630 t skl_aux_data_reg +ffffffff81b9b6d0 t ilk_aux_ctl_reg +ffffffff81b9b750 t ilk_aux_data_reg +ffffffff81b9b7e0 t g4x_aux_ctl_reg +ffffffff81b9b870 t g4x_aux_data_reg +ffffffff81b9b910 t skl_get_aux_clock_divider +ffffffff81b9b940 t hsw_get_aux_clock_divider +ffffffff81b9b9d0 t ilk_get_aux_clock_divider +ffffffff81b9ba30 t g4x_get_aux_clock_divider +ffffffff81b9ba80 t skl_get_aux_send_ctl +ffffffff81b9bb00 t g4x_get_aux_send_ctl +ffffffff81b9bb60 t kasprintf +ffffffff81b9bc40 t intel_dp_aux_transfer +ffffffff81b9bf00 T intel_dp_aux_ch +ffffffff81b9c080 T intel_dp_aux_irq_handler +ffffffff81b9c120 t intel_dp_aux_xfer +ffffffff81b9d000 T intel_dp_aux_init_backlight_funcs +ffffffff81b9d290 t intel_dp_aux_hdr_setup_backlight +ffffffff81b9d430 t intel_dp_aux_hdr_get_backlight +ffffffff81b9d5e0 t intel_dp_aux_hdr_set_backlight +ffffffff81b9d6f0 t intel_dp_aux_hdr_disable_backlight +ffffffff81b9d780 t intel_dp_aux_hdr_enable_backlight +ffffffff81b9da10 t intel_dp_aux_vesa_setup_backlight +ffffffff81b9dca0 t intel_dp_aux_vesa_get_backlight +ffffffff81b9dcd0 t intel_dp_aux_vesa_set_backlight +ffffffff81b9dd70 t intel_dp_aux_vesa_disable_backlight +ffffffff81b9de30 t intel_dp_aux_vesa_enable_backlight +ffffffff81b9e000 T intel_dp_hdcp_init +ffffffff81b9e0c0 t intel_dp_hdcp_write_an_aksv +ffffffff81b9e1d0 t intel_dp_hdcp_read_bksv +ffffffff81b9e270 t intel_dp_hdcp_read_bstatus +ffffffff81b9e310 t intel_dp_hdcp_repeater_present +ffffffff81b9e3d0 t intel_dp_hdcp_read_ri_prime +ffffffff81b9e470 t intel_dp_hdcp_read_ksv_ready +ffffffff81b9e520 t intel_dp_hdcp_read_ksv_fifo +ffffffff81b9e620 t intel_dp_hdcp_read_v_prime_part +ffffffff81b9e6d0 t intel_dp_hdcp_toggle_signalling +ffffffff81b9e700 t intel_dp_mst_hdcp_stream_encryption +ffffffff81b9e910 t intel_dp_hdcp_check_link +ffffffff81b9e9a0 t intel_dp_hdcp_capable +ffffffff81b9ea60 t intel_dp_hdcp2_capable +ffffffff81b9eaf0 t intel_dp_hdcp2_write_msg +ffffffff81b9ecb0 t intel_dp_hdcp2_read_msg +ffffffff81b9f400 t intel_dp_hdcp2_config_stream_type +ffffffff81b9f460 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81b9f700 t intel_dp_mst_hdcp2_check_link +ffffffff81b9f7d0 t intel_dp_hdcp2_check_link +ffffffff81ba0000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81ba0100 t intel_dp_init_lttpr +ffffffff81ba0450 T intel_dp_get_adjust_train +ffffffff81ba0cc0 T intel_dp_program_link_training_pattern +ffffffff81ba0df0 T intel_dp_set_signal_levels +ffffffff81ba11c0 T intel_dp_dump_link_status +ffffffff81ba12c0 T intel_dp_stop_link_train +ffffffff81ba15e0 T intel_dp_start_link_train +ffffffff81ba38c0 T intel_dp_128b132b_sdp_crc16 +ffffffff81ba39b0 t intel_dp_link_train_phy +ffffffff81ba6000 T intel_dp_mst_encoder_active_links +ffffffff81ba6030 T intel_dp_mst_encoder_init +ffffffff81ba62a0 T intel_dp_mst_source_support +ffffffff81ba62e0 T intel_dp_mst_encoder_cleanup +ffffffff81ba6340 T intel_dp_mst_is_master_trans +ffffffff81ba6380 T intel_dp_mst_is_slave_trans +ffffffff81ba63c0 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81ba6490 t intel_dp_add_mst_connector +ffffffff81ba6750 t intel_dp_mst_poll_hpd_irq +ffffffff81ba6770 t intel_dp_mst_get_hw_state +ffffffff81ba67e0 t intel_dp_mst_connector_late_register +ffffffff81ba6870 t intel_dp_mst_connector_early_unregister +ffffffff81ba68b0 t intel_dp_mst_get_modes +ffffffff81ba6960 t intel_dp_mst_detect +ffffffff81ba6a70 t intel_dp_mst_mode_valid_ctx +ffffffff81ba6d10 t intel_mst_atomic_best_encoder +ffffffff81ba6d70 t intel_dp_mst_atomic_check +ffffffff81ba6f60 t intel_dp_mst_compute_config +ffffffff81ba7590 t intel_dp_mst_compute_config_late +ffffffff81ba76a0 t intel_mst_disable_dp +ffffffff81ba77c0 t intel_mst_post_disable_dp +ffffffff81ba7af0 t intel_mst_post_pll_disable_dp +ffffffff81ba7b50 t intel_mst_pre_pll_enable_dp +ffffffff81ba7b90 t intel_mst_pre_enable_dp +ffffffff81ba7e00 t intel_mst_enable_dp +ffffffff81ba8250 t intel_dp_mst_enc_get_hw_state +ffffffff81ba8290 t intel_dp_mst_enc_get_config +ffffffff81ba82b0 t intel_dp_mst_initial_fastset_check +ffffffff81ba82d0 t intel_dp_mst_encoder_destroy +ffffffff81ba8310 t intel_dp_mst_find_vcpi_slots_for_bpp +ffffffff81ba9000 T bxt_port_to_phy_channel +ffffffff81ba9120 T bxt_ddi_phy_set_signal_levels +ffffffff81ba9570 T bxt_ddi_phy_is_enabled +ffffffff81ba96c0 T bxt_ddi_phy_uninit +ffffffff81ba97c0 T bxt_ddi_phy_init +ffffffff81ba9a20 t _bxt_ddi_phy_init +ffffffff81baa020 T bxt_ddi_phy_verify_state +ffffffff81baa370 t __phy_reg_verify_state +ffffffff81baa490 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81baa500 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81baa7b0 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81baa9c0 T vlv_dig_port_to_channel +ffffffff81baaa30 T vlv_dig_port_to_phy +ffffffff81baaaa0 T vlv_pipe_to_channel +ffffffff81baab00 T chv_set_phy_signal_level +ffffffff81baaef0 T chv_data_lane_soft_reset +ffffffff81bab0f0 T chv_phy_pre_pll_enable +ffffffff81bab400 T chv_phy_pre_encoder_enable +ffffffff81bab6c0 T chv_phy_release_cl2_override +ffffffff81bab750 T chv_phy_post_pll_disable +ffffffff81bab830 T vlv_set_phy_signal_level +ffffffff81bab9e0 T vlv_phy_pre_pll_enable +ffffffff81babb20 T vlv_phy_pre_encoder_enable +ffffffff81babc50 T vlv_phy_reset_lanes +ffffffff81bac000 T pnv_calc_dpll_params +ffffffff81bac0c0 T i9xx_calc_dpll_params +ffffffff81bac190 T vlv_calc_dpll_params +ffffffff81bac250 T chv_calc_dpll_params +ffffffff81bac330 T bxt_find_best_dpll +ffffffff81bac350 t chv_find_best_dpll +ffffffff81bac6a0 T i9xx_dpll_compute_fp +ffffffff81bac6e0 T vlv_compute_dpll +ffffffff81bac760 T chv_compute_dpll +ffffffff81bac7e0 T intel_dpll_crtc_compute_clock +ffffffff81bac8f0 T intel_dpll_crtc_get_shared_dpll +ffffffff81baca70 T intel_dpll_init_clock_hook +ffffffff81bacb80 T i9xx_enable_pll +ffffffff81bad010 T vlv_enable_pll +ffffffff81bad640 T chv_enable_pll +ffffffff81badd40 T vlv_force_pll_on +ffffffff81badec0 T vlv_disable_pll +ffffffff81badfb0 T chv_disable_pll +ffffffff81bae130 T i9xx_disable_pll +ffffffff81bae260 T vlv_force_pll_off +ffffffff81bae380 T assert_pll_enabled +ffffffff81bae490 T assert_pll_disabled +ffffffff81bae5a0 t intel_pll_is_valid +ffffffff81bae660 t mtl_crtc_compute_clock +ffffffff81bae760 t dg2_crtc_compute_clock +ffffffff81bae800 t hsw_crtc_compute_clock +ffffffff81bae8e0 t hsw_crtc_get_shared_dpll +ffffffff81bae990 t ilk_crtc_compute_clock +ffffffff81baece0 t ilk_crtc_get_shared_dpll +ffffffff81baed30 t g4x_find_best_dpll +ffffffff81baf090 t chv_crtc_compute_clock +ffffffff81baf1b0 t vlv_crtc_compute_clock +ffffffff81baf660 t g4x_crtc_compute_clock +ffffffff81baf7f0 t i9xx_compute_dpll +ffffffff81bafa90 t pnv_crtc_compute_clock +ffffffff81bafea0 t i9xx_crtc_compute_clock +ffffffff81baffe0 t i9xx_find_best_dpll +ffffffff81bb0320 t i8xx_crtc_compute_clock +ffffffff81bb1000 T intel_get_shared_dpll_by_id +ffffffff81bb1040 T assert_shared_dpll +ffffffff81bb1200 T intel_dpll_get_hw_state +ffffffff81bb1230 T icl_tc_port_to_pll_id +ffffffff81bb1260 T intel_enable_shared_dpll +ffffffff81bb1610 T intel_disable_shared_dpll +ffffffff81bb18f0 T intel_unreference_shared_dpll_crtc +ffffffff81bb1a00 T intel_shared_dpll_swap_state +ffffffff81bb1b00 T icl_set_active_port_dpll +ffffffff81bb1b40 T intel_shared_dpll_init +ffffffff81bb1d60 T intel_compute_shared_dplls +ffffffff81bb1df0 T intel_reserve_shared_dplls +ffffffff81bb1e80 T intel_release_shared_dplls +ffffffff81bb1ec0 T intel_update_active_dpll +ffffffff81bb1f20 T intel_dpll_get_freq +ffffffff81bb1fb0 T intel_dpll_update_ref_clks +ffffffff81bb2000 T intel_dpll_readout_hw_state +ffffffff81bb2260 T intel_dpll_sanitize_state +ffffffff81bb2360 T intel_dpll_dump_hw_state +ffffffff81bb23f0 T intel_shared_dpll_state_verify +ffffffff81bb25e0 t verify_single_dpll_state +ffffffff81bb2c10 T intel_shared_dpll_verify_disabled +ffffffff81bb2ca0 t icl_compute_dplls +ffffffff81bb3940 t icl_get_dplls +ffffffff81bb3ca0 t icl_put_dplls +ffffffff81bb3d60 t icl_update_active_dpll +ffffffff81bb3e20 t icl_update_dpll_ref_clks +ffffffff81bb3e60 t icl_dump_hw_state +ffffffff81bb3f30 t combo_pll_enable +ffffffff81bb4190 t combo_pll_disable +ffffffff81bb4270 t combo_pll_get_hw_state +ffffffff81bb42f0 t icl_ddi_combo_pll_get_freq +ffffffff81bb44d0 t icl_dpll_write +ffffffff81bb4740 t adlp_cmtg_clock_gating_wa +ffffffff81bb48e0 t icl_pll_disable +ffffffff81bb4ab0 t icl_pll_get_hw_state +ffffffff81bb4e00 t tbt_pll_enable +ffffffff81bb5000 t tbt_pll_disable +ffffffff81bb5020 t tbt_pll_get_hw_state +ffffffff81bb5040 t icl_ddi_tbt_pll_get_freq +ffffffff81bb50b0 t mg_pll_enable +ffffffff81bb5820 t mg_pll_disable +ffffffff81bb5860 t dkl_pll_get_hw_state +ffffffff81bb5ad0 t icl_ddi_mg_pll_get_freq +ffffffff81bb5bb0 t icl_calc_dpll_state +ffffffff81bb5cf0 t intel_find_shared_dpll +ffffffff81bb6060 t intel_reference_shared_dpll +ffffffff81bb62b0 t intel_unreference_shared_dpll +ffffffff81bb64f0 t mg_pll_get_hw_state +ffffffff81bb67b0 t bxt_compute_dpll +ffffffff81bb6ae0 t bxt_get_dpll +ffffffff81bb6bc0 t intel_put_dpll +ffffffff81bb6c20 t bxt_update_dpll_ref_clks +ffffffff81bb6c60 t bxt_dump_hw_state +ffffffff81bb6d20 t bxt_ddi_pll_enable +ffffffff81bb7880 t bxt_ddi_pll_disable +ffffffff81bb7ae0 t bxt_ddi_pll_get_hw_state +ffffffff81bb7fb0 t bxt_ddi_pll_get_freq +ffffffff81bb8050 t bxt_ddi_set_dpll_hw_state +ffffffff81bb8250 t skl_compute_dpll +ffffffff81bb89b0 t skl_get_dpll +ffffffff81bb8a70 t skl_update_dpll_ref_clks +ffffffff81bb8ab0 t skl_dump_hw_state +ffffffff81bb8b20 t skl_ddi_dpll0_enable +ffffffff81bb8bf0 t skl_ddi_dpll0_disable +ffffffff81bb8c20 t skl_ddi_dpll0_get_hw_state +ffffffff81bb8d50 t skl_ddi_pll_get_freq +ffffffff81bb8de0 t skl_ddi_wrpll_get_freq +ffffffff81bb8f40 t skl_ddi_pll_enable +ffffffff81bb91c0 t skl_ddi_pll_disable +ffffffff81bb9260 t skl_ddi_pll_get_hw_state +ffffffff81bb93b0 t hsw_compute_dpll +ffffffff81bb9be0 t hsw_get_dpll +ffffffff81bb9d40 t hsw_update_dpll_ref_clks +ffffffff81bb9dc0 t hsw_dump_hw_state +ffffffff81bb9df0 t hsw_ddi_wrpll_enable +ffffffff81bb9e80 t hsw_ddi_wrpll_disable +ffffffff81bb9f80 t hsw_ddi_wrpll_get_hw_state +ffffffff81bba040 t hsw_ddi_wrpll_get_freq +ffffffff81bba130 t hsw_ddi_spll_enable +ffffffff81bba1b0 t hsw_ddi_spll_disable +ffffffff81bba290 t hsw_ddi_spll_get_hw_state +ffffffff81bba330 t hsw_ddi_spll_get_freq +ffffffff81bba3d0 t hsw_ddi_lcpll_enable +ffffffff81bba400 t hsw_ddi_lcpll_disable +ffffffff81bba430 t hsw_ddi_lcpll_get_hw_state +ffffffff81bba460 t hsw_ddi_lcpll_get_freq +ffffffff81bba4e0 t ibx_compute_dpll +ffffffff81bba510 t ibx_get_dpll +ffffffff81bba630 t ibx_dump_hw_state +ffffffff81bba6a0 t ibx_pch_dpll_enable +ffffffff81bba8a0 t ibx_pch_dpll_disable +ffffffff81bba930 t ibx_pch_dpll_get_hw_state +ffffffff81bbb000 T intel_dpt_pin +ffffffff81bbb220 T intel_dpt_unpin +ffffffff81bbb2a0 T intel_dpt_resume +ffffffff81bbb390 T intel_dpt_suspend +ffffffff81bbb480 T intel_dpt_create +ffffffff81bbb920 t dpt_insert_page +ffffffff81bbb990 t dpt_clear_range +ffffffff81bbb9c0 t dpt_insert_entries +ffffffff81bbbab0 t dpt_cleanup +ffffffff81bbbb00 t dpt_bind_vma +ffffffff81bbbba0 t dpt_unbind_vma +ffffffff81bbbbd0 T intel_dpt_destroy +ffffffff81bbbc20 T intel_dpt_configure +ffffffff81bbbdf0 t __ww_mutex_lock +ffffffff81bbc000 T intel_drrs_type_str +ffffffff81bbc040 T intel_drrs_is_active +ffffffff81bbc070 T intel_drrs_activate +ffffffff81bbc270 T intel_drrs_deactivate +ffffffff81bbc470 T intel_drrs_invalidate +ffffffff81bbc490 t intel_drrs_frontbuffer_update +ffffffff81bbc720 T intel_drrs_flush +ffffffff81bbc740 T intel_drrs_crtc_init +ffffffff81bbc800 t intel_drrs_downclock_work +ffffffff81bbc950 T intel_drrs_crtc_debugfs_add +ffffffff81bbc980 T intel_drrs_connector_debugfs_add +ffffffff81bbc990 t __delayed_work_tick +ffffffff81bbd000 T intel_dsb_reg_write +ffffffff81bbd140 T intel_dsb_finish +ffffffff81bbd1c0 T intel_dsb_commit +ffffffff81bbd390 T intel_dsb_wait +ffffffff81bbd5b0 T intel_dsb_prepare +ffffffff81bbd780 T intel_dsb_cleanup +ffffffff81bbe000 T intel_dsi_wait_panel_power_cycle +ffffffff81bbe0f0 T intel_dsi_shutdown +ffffffff81bbe1e0 T intel_dsi_bitrate +ffffffff81bbe270 T intel_dsi_tlpx_ns +ffffffff81bbe2c0 T intel_dsi_get_modes +ffffffff81bbe2d0 T intel_dsi_mode_valid +ffffffff81bbe3a0 T intel_dsi_host_init +ffffffff81bbe460 T intel_dsi_get_panel_orientation +ffffffff81bbf000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81bbf0a0 t dcs_setup_backlight +ffffffff81bbf130 t dcs_get_backlight +ffffffff81bbf230 t dcs_set_backlight +ffffffff81bbf330 t dcs_disable_backlight +ffffffff81bbf700 t dcs_enable_backlight +ffffffff81bc0000 T intel_dsi_vbt_exec_sequence +ffffffff81bc0020 T intel_dsi_log_params +ffffffff81bc0460 T intel_dsi_vbt_init +ffffffff81bc0970 T intel_dsi_vbt_gpio_init +ffffffff81bc0990 T intel_dsi_vbt_gpio_cleanup +ffffffff81bc1000 T intel_dvo_init +ffffffff81bc1730 t intel_disable_dvo +ffffffff81bc17f0 t intel_enable_dvo +ffffffff81bc18f0 t intel_dvo_get_hw_state +ffffffff81bc1970 t intel_dvo_get_config +ffffffff81bc1a20 t intel_dvo_compute_config +ffffffff81bc1ac0 t intel_dvo_pre_enable +ffffffff81bc1bd0 t intel_dvo_connector_get_hw_state +ffffffff81bc1c60 t intel_dvo_enc_destroy +ffffffff81bc1ca0 t intel_dvo_detect +ffffffff81bc1dc0 t intel_dvo_get_modes +ffffffff81bc1e40 t intel_dvo_mode_valid +ffffffff81bc2000 T intel_fb_get_format_info +ffffffff81bc22b0 T intel_fb_is_tiled_modifier +ffffffff81bc2300 t lookup_modifier +ffffffff81bc2540 T intel_fb_is_ccs_modifier +ffffffff81bc2590 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81bc25e0 T intel_fb_is_mc_ccs_modifier +ffffffff81bc2630 T intel_fb_plane_get_modifiers +ffffffff81bc2830 T intel_fb_plane_supports_modifier +ffffffff81bc28b0 T intel_format_info_is_yuv_semiplanar +ffffffff81bc2930 T intel_fb_is_ccs_aux_plane +ffffffff81bc29f0 T intel_fb_rc_ccs_cc_plane +ffffffff81bc2ae0 T is_surface_linear +ffffffff81bc2c70 T main_to_ccs_plane +ffffffff81bc2d20 T skl_ccs_to_main_plane +ffffffff81bc2e80 T skl_main_to_aux_plane +ffffffff81bc2fc0 T intel_tile_size +ffffffff81bc3000 T intel_tile_width_bytes +ffffffff81bc3470 T intel_tile_height +ffffffff81bc34e0 T intel_tile_row_size +ffffffff81bc3570 T intel_fb_align_height +ffffffff81bc35f0 T intel_fb_modifier_uses_dpt +ffffffff81bc3630 T intel_fb_uses_dpt +ffffffff81bc3690 T intel_cursor_alignment +ffffffff81bc36f0 T intel_surf_alignment +ffffffff81bc39c0 T intel_fb_plane_get_subsampling +ffffffff81bc3b40 T intel_plane_adjust_aligned_offset +ffffffff81bc3bc0 t intel_adjust_aligned_offset +ffffffff81bc3d90 T intel_plane_compute_aligned_offset +ffffffff81bc3ea0 t intel_compute_aligned_offset +ffffffff81bc4090 T intel_fb_needs_pot_stride_remap +ffffffff81bc4100 T intel_fb_supports_90_270_rotation +ffffffff81bc4160 T intel_fill_fb_info +ffffffff81bc4d90 t calc_plane_remap_info +ffffffff81bc57b0 T intel_fb_fill_view +ffffffff81bc5820 T intel_plane_compute_gtt +ffffffff81bc5d60 t intel_plane_check_stride +ffffffff81bc5ee0 T intel_framebuffer_init +ffffffff81bc6880 t gen12_ccs_aux_stride +ffffffff81bc6900 T intel_user_framebuffer_create +ffffffff81bc6aa0 T intel_framebuffer_create +ffffffff81bc6b50 t intel_adjust_tile_offset +ffffffff81bc6c90 t intel_user_framebuffer_destroy +ffffffff81bc6d10 t intel_user_framebuffer_create_handle +ffffffff81bc6d40 t intel_user_framebuffer_dirty +ffffffff81bc7000 T intel_pin_and_fence_fb_obj +ffffffff81bc73c0 t i915_gem_object_lock +ffffffff81bc7610 T intel_unpin_fb_vma +ffffffff81bc7680 T intel_plane_pin_fb +ffffffff81bc7ab0 T intel_plane_unpin_fb +ffffffff81bc8000 T intel_fbc_cleanup +ffffffff81bc8240 T intel_fbc_pre_update +ffffffff81bc8900 T intel_fbc_post_update +ffffffff81bc8ac0 T intel_fbc_invalidate +ffffffff81bc8c70 T intel_fbc_flush +ffffffff81bc8f60 T intel_fbc_atomic_check +ffffffff81bc9550 T intel_fbc_disable +ffffffff81bc9620 t __intel_fbc_disable +ffffffff81bc9780 T intel_fbc_update +ffffffff81bc9f00 T intel_fbc_reset_underrun +ffffffff81bca090 T intel_fbc_handle_fifo_underrun_irq +ffffffff81bca150 T intel_fbc_add_plane +ffffffff81bca180 T intel_fbc_init +ffffffff81bca440 T intel_fbc_sanitize +ffffffff81bca520 T intel_fbc_crtc_debugfs_add +ffffffff81bca550 T intel_fbc_debugfs_register +ffffffff81bca580 t intel_fbc_is_ok +ffffffff81bca700 t intel_fbc_update_state +ffffffff81bcaaa0 t intel_fbc_underrun_work_fn +ffffffff81bcab90 t ivb_fbc_activate +ffffffff81bcae00 t ilk_fbc_deactivate +ffffffff81bcaec0 t ilk_fbc_is_active +ffffffff81bcaf30 t ivb_fbc_is_compressing +ffffffff81bcafa0 t snb_fbc_nuke +ffffffff81bcb020 t ilk_fbc_program_cfb +ffffffff81bcb080 t ivb_fbc_set_false_color +ffffffff81bcb100 t snb_fbc_activate +ffffffff81bcb1a0 t ilk_fbc_is_compressing +ffffffff81bcb210 t ilk_fbc_activate +ffffffff81bcb350 t i965_fbc_nuke +ffffffff81bcb3f0 t g4x_fbc_activate +ffffffff81bcb510 t g4x_fbc_deactivate +ffffffff81bcb5b0 t g4x_fbc_is_active +ffffffff81bcb610 t g4x_fbc_is_compressing +ffffffff81bcb670 t g4x_fbc_program_cfb +ffffffff81bcb6c0 t i8xx_fbc_activate +ffffffff81bcb850 t i8xx_fbc_deactivate +ffffffff81bcb950 t i8xx_fbc_is_active +ffffffff81bcb9b0 t i8xx_fbc_is_compressing +ffffffff81bcba10 t i8xx_fbc_program_cfb +ffffffff81bcbab0 t i8xx_fbc_nuke +ffffffff81bcc000 T intel_fbdev_init +ffffffff81bcc590 t intel_fbdev_suspend_worker +ffffffff81bcc5c0 T intel_fbdev_initial_config_async +ffffffff81bcc630 T intel_fbdev_unregister +ffffffff81bcc670 T intel_fbdev_set_suspend +ffffffff81bcc6a0 T intel_fbdev_fini +ffffffff81bcc750 T intel_fbdev_output_poll_changed +ffffffff81bcc800 T intel_fbdev_restore_mode +ffffffff81bcc890 T intel_fbdev_framebuffer +ffffffff81bcc8d0 t intelfb_create +ffffffff81bcd320 t intelfb_dirty +ffffffff81bcd390 t intel_fbdev_set_par +ffffffff81bce000 T assert_fdi_tx_enabled +ffffffff81bce020 t assert_fdi_tx +ffffffff81bce170 T assert_fdi_tx_disabled +ffffffff81bce190 T assert_fdi_rx_enabled +ffffffff81bce280 T assert_fdi_rx_disabled +ffffffff81bce370 T assert_fdi_tx_pll_enabled +ffffffff81bce470 T assert_fdi_rx_pll_enabled +ffffffff81bce570 T assert_fdi_rx_pll_disabled +ffffffff81bce670 T intel_fdi_link_train +ffffffff81bce690 T intel_fdi_pll_freq_update +ffffffff81bce740 T intel_fdi_link_freq +ffffffff81bce790 T ilk_fdi_compute_config +ffffffff81bceb20 T intel_fdi_normal_train +ffffffff81bcece0 T hsw_fdi_link_train +ffffffff81bcf300 T hsw_fdi_disable +ffffffff81bcf4d0 T ilk_fdi_pll_enable +ffffffff81bcf730 T ilk_fdi_pll_disable +ffffffff81bcf8b0 T ilk_fdi_disable +ffffffff81bcfb80 T intel_fdi_init_hook +ffffffff81bcfbe0 t ilk_fdi_link_train +ffffffff81bd03f0 t gen6_fdi_link_train +ffffffff81bd0e60 t ivb_manual_fdi_link_train +ffffffff81bd1920 t cpt_set_fdi_bc_bifurcation +ffffffff81bd2000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81bd2480 T intel_set_pch_fifo_underrun_reporting +ffffffff81bd2720 T intel_cpu_fifo_underrun_irq_handler +ffffffff81bd2940 T intel_pch_fifo_underrun_irq_handler +ffffffff81bd29d0 T intel_check_cpu_fifo_underruns +ffffffff81bd2c20 T intel_check_pch_fifo_underruns +ffffffff81bd2d80 T intel_init_fifo_underrun_reporting +ffffffff81bd3000 T intel_frontbuffer_flip_prepare +ffffffff81bd3060 T intel_frontbuffer_flip_complete +ffffffff81bd3180 T intel_frontbuffer_flip +ffffffff81bd3290 T __intel_fb_invalidate +ffffffff81bd3350 T __intel_fb_flush +ffffffff81bd3480 T intel_frontbuffer_get +ffffffff81bd3600 t frontbuffer_active +ffffffff81bd3630 t frontbuffer_retire +ffffffff81bd3670 T intel_frontbuffer_put +ffffffff81bd37c0 T intel_frontbuffer_track +ffffffff81bd4000 T intel_atomic_global_obj_init +ffffffff81bd4070 T intel_atomic_global_obj_cleanup +ffffffff81bd4170 T intel_atomic_get_global_obj_state +ffffffff81bd43f0 T intel_atomic_get_old_global_obj_state +ffffffff81bd4450 T intel_atomic_get_new_global_obj_state +ffffffff81bd44b0 T intel_atomic_swap_global_state +ffffffff81bd4600 T intel_atomic_clear_global_state +ffffffff81bd4730 T intel_atomic_lock_global_state +ffffffff81bd47c0 T intel_atomic_serialize_global_state +ffffffff81bd4850 T intel_atomic_global_state_is_serialized +ffffffff81bd5000 T intel_gmbus_is_valid_pin +ffffffff81bd5100 T intel_gmbus_reset +ffffffff81bd5170 T intel_bb_set_bits +ffffffff81bd52d0 T intel_bb_set_dir +ffffffff81bd5300 T intel_bb_read_bits +ffffffff81bd54d0 T intel_acquire_bus +ffffffff81bd5730 T intel_release_bus +ffffffff81bd5910 T intel_send_start +ffffffff81bd5930 T intel_send_stop +ffffffff81bd5950 T intel_initiate_xfer +ffffffff81bd5970 T intel_read_byte +ffffffff81bd5990 T intel_write_byte +ffffffff81bd59b0 T intel_gmbus_output_aksv +ffffffff81bd5ab0 t do_gmbus_xfer +ffffffff81bd6140 T intel_gmbus_setup +ffffffff81bd64f0 T intel_gmbus_teardown +ffffffff81bd6580 T intel_gmbus_get_adapter +ffffffff81bd6600 T intel_gmbus_force_bit +ffffffff81bd66b0 T intel_gmbus_is_forced_bit +ffffffff81bd66e0 T intel_gmbus_irq_handler +ffffffff81bd6780 t gmbus_xfer_read +ffffffff81bd6a80 t gmbus_xfer_write +ffffffff81bd6cd0 t gmbus_wait +ffffffff81bd7130 t gmbus_wait_idle +ffffffff81bd7300 t gmbus_xfer +ffffffff81bd7400 t gmbus_func +ffffffff81bd7450 t gmbus_lock_bus +ffffffff81bd7470 t gmbus_trylock_bus +ffffffff81bd74d0 t gmbus_unlock_bus +ffffffff81bd8000 T intel_hdcp_capable +ffffffff81bd80b0 t intel_hdcp_read_valid_bksv +ffffffff81bd8350 T intel_hdcp2_capable +ffffffff81bd84b0 T is_hdcp_supported +ffffffff81bd8500 T intel_hdcp_component_init +ffffffff81bd8560 T intel_hdcp_init +ffffffff81bd8730 t intel_hdcp_check_work +ffffffff81bdb6f0 t intel_hdcp_prop_work +ffffffff81bdb790 T intel_hdcp_enable +ffffffff81bdb7f0 T intel_hdcp_disable +ffffffff81bdb970 t intel_hdcp_update_value +ffffffff81bdbb60 t _intel_hdcp2_disable +ffffffff81bdbfd0 t _intel_hdcp_disable +ffffffff81bdc330 T intel_hdcp_update_pipe +ffffffff81bdc4e0 T intel_hdcp_component_fini +ffffffff81bdc590 T intel_hdcp_cleanup +ffffffff81bdc6e0 T intel_hdcp_atomic_check +ffffffff81bdc770 T intel_hdcp_handle_cp_irq +ffffffff81bdc890 t __delayed_work_tick +ffffffff81bdc8b0 t hdcp2_authenticate_repeater_topology +ffffffff81bdcbc0 t transcoder_name +ffffffff81bdcc00 t intel_hdcp_get_repeater_ctl +ffffffff81bdcce0 t ktime_get_raw +ffffffff81bdcd60 t wait_remaining_ms_from_jiffies +ffffffff81bdcdf0 t intel_hdcp_auth_downstream +ffffffff81bde2e0 t intel_write_sha_text +ffffffff81bdf000 T intel_hdcp_gsc_cs_required +ffffffff81bdf040 T intel_hdcp_gsc_init +ffffffff81bdf590 T intel_hdcp_gsc_fini +ffffffff81bdf600 T intel_hdcp_gsc_msg_send +ffffffff81bdf9b0 t gsc_hdcp_initiate_session +ffffffff81bdfa10 t gsc_hdcp_verify_receiver_cert_prepare_km +ffffffff81bdfa70 t gsc_hdcp_verify_hprime +ffffffff81bdfad0 t gsc_hdcp_store_pairing_info +ffffffff81bdfb30 t gsc_hdcp_initiate_locality_check +ffffffff81bdfb90 t gsc_hdcp_verify_lprime +ffffffff81bdfbf0 t gsc_hdcp_get_session_key +ffffffff81bdfc50 t gsc_hdcp_repeater_check_flow_prepare_ack +ffffffff81bdfcb0 t gsc_hdcp_verify_mprime +ffffffff81bdfd10 t gsc_hdcp_enable_authentication +ffffffff81bdfd70 t gsc_hdcp_close_session +ffffffff81be0000 T intel_hdmi_to_i915 +ffffffff81be0040 T hsw_write_infoframe +ffffffff81be04c0 t hsw_dip_data_reg +ffffffff81be0680 T hsw_read_infoframe +ffffffff81be0750 T intel_hdmi_infoframe_enable +ffffffff81be07f0 T intel_hdmi_infoframes_enabled +ffffffff81be0910 T intel_read_infoframe +ffffffff81be0ac0 T intel_hdmi_read_gcp_infoframe +ffffffff81be0ba0 T intel_dp_dual_mode_set_tmds_output +ffffffff81be0c70 T intel_hdmi_tmds_clock +ffffffff81be0cc0 T intel_hdmi_bpc_possible +ffffffff81be0df0 T intel_hdmi_limited_color_range +ffffffff81be0e60 T intel_hdmi_compute_has_hdmi_sink +ffffffff81be0ed0 T intel_hdmi_compute_config +ffffffff81be1520 t intel_hdmi_compute_output_format +ffffffff81be16a0 t intel_hdmi_compute_hdmi_infoframe +ffffffff81be1780 t intel_hdmi_compute_drm_infoframe +ffffffff81be1890 T intel_hdmi_encoder_shutdown +ffffffff81be1970 T intel_hdmi_handle_sink_scrambling +ffffffff81be1a70 T intel_infoframe_init +ffffffff81be1c10 t vlv_write_infoframe +ffffffff81be1f90 t vlv_read_infoframe +ffffffff81be2130 t vlv_set_infoframes +ffffffff81be24b0 t vlv_infoframes_enabled +ffffffff81be2550 t g4x_write_infoframe +ffffffff81be2840 t g4x_read_infoframe +ffffffff81be2990 t g4x_set_infoframes +ffffffff81be2c50 t g4x_infoframes_enabled +ffffffff81be2cd0 t hsw_set_infoframes +ffffffff81be2fb0 t hsw_infoframes_enabled +ffffffff81be3040 t ibx_write_infoframe +ffffffff81be3380 t ibx_read_infoframe +ffffffff81be3500 t ibx_set_infoframes +ffffffff81be3880 t ibx_infoframes_enabled +ffffffff81be3910 t cpt_write_infoframe +ffffffff81be3c50 t cpt_read_infoframe +ffffffff81be3dd0 t cpt_set_infoframes +ffffffff81be40f0 t cpt_infoframes_enabled +ffffffff81be4170 T intel_hdmi_init_connector +ffffffff81be4a00 T intel_hdmi_dsc_get_slice_height +ffffffff81be4a60 T intel_hdmi_dsc_get_num_slices +ffffffff81be4be0 T intel_hdmi_dsc_get_bpp +ffffffff81be4cc0 t intel_hdmi_compute_clock +ffffffff81be4f40 t hdmi_port_clock_valid +ffffffff81be51a0 t intel_write_infoframe +ffffffff81be5390 t intel_hdmi_detect +ffffffff81be5580 t intel_hdmi_force +ffffffff81be5630 t intel_hdmi_connector_register +ffffffff81be5640 t intel_hdmi_connector_unregister +ffffffff81be5650 t intel_hdmi_set_edid +ffffffff81be5990 t intel_hdmi_get_modes +ffffffff81be59a0 t intel_hdmi_mode_valid +ffffffff81be5b80 t intel_hdmi_connector_atomic_check +ffffffff81be5bb0 t intel_hdmi_mode_clock_valid +ffffffff81be5d70 t intel_hdmi_hdcp_write_an_aksv +ffffffff81be5ef0 t intel_hdmi_hdcp_read_bksv +ffffffff81be5fd0 t intel_hdmi_hdcp_read_bstatus +ffffffff81be60b0 t intel_hdmi_hdcp_repeater_present +ffffffff81be61a0 t intel_hdmi_hdcp_read_ri_prime +ffffffff81be6280 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81be6370 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81be6450 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81be6550 t intel_hdmi_hdcp_toggle_signalling +ffffffff81be6810 t intel_hdmi_hdcp_check_link +ffffffff81be6bb0 t intel_hdmi_hdcp2_capable +ffffffff81be6c80 t intel_hdmi_hdcp2_write_msg +ffffffff81be6da0 t intel_hdmi_hdcp2_read_msg +ffffffff81be7210 t intel_hdmi_hdcp2_check_link +ffffffff81be8000 T intel_hpd_pin_default +ffffffff81be8030 T intel_encoder_hotplug +ffffffff81be8190 T intel_hpd_trigger_irq +ffffffff81be8210 T intel_hpd_irq_handler +ffffffff81be8670 T intel_hpd_init +ffffffff81be8790 T intel_hpd_poll_enable +ffffffff81be8820 T intel_hpd_poll_disable +ffffffff81be8880 T intel_hpd_init_early +ffffffff81be89d0 t i915_hotplug_work_func +ffffffff81be8e80 t i915_digport_work_func +ffffffff81be9030 t i915_hpd_poll_init_work +ffffffff81be9180 t intel_hpd_irq_storm_reenable_work +ffffffff81be94f0 T intel_hpd_cancel_work +ffffffff81be9630 T intel_hpd_disable +ffffffff81be96d0 T intel_hpd_enable +ffffffff81be9750 T intel_hpd_debugfs_register +ffffffff81be9780 t __delayed_work_tick +ffffffff81bea000 T i915_hotplug_interrupt_update_locked +ffffffff81bea0c0 T i915_hotplug_interrupt_update +ffffffff81bea1b0 T i9xx_hpd_irq_ack +ffffffff81bea310 T i9xx_hpd_irq_handler +ffffffff81bea4d0 T ibx_hpd_irq_handler +ffffffff81bea6a0 T xelpdp_pica_irq_handler +ffffffff81bea9c0 T icp_irq_handler +ffffffff81beaca0 T spt_irq_handler +ffffffff81beaf70 T ilk_hpd_irq_handler +ffffffff81beb0b0 T bxt_hpd_irq_handler +ffffffff81beb230 T gen11_hpd_irq_handler +ffffffff81beb4d0 T intel_hpd_enable_detection +ffffffff81beb510 T intel_hpd_irq_setup +ffffffff81beb560 T intel_hotplug_irq_init +ffffffff81beb7f0 t i915_hpd_irq_setup +ffffffff81beb910 t i915_hpd_enable_detection +ffffffff81beb9c0 t icp_hpd_irq_setup +ffffffff81bebbd0 t icp_hpd_enable_detection +ffffffff81bebce0 t dg1_hpd_irq_setup +ffffffff81bebd50 t dg1_hpd_enable_detection +ffffffff81bebec0 t xelpdp_hpd_irq_setup +ffffffff81bec340 t xelpdp_hpd_enable_detection +ffffffff81bec510 t gen11_hpd_irq_setup +ffffffff81bec7a0 t gen11_hpd_enable_detection +ffffffff81bec9e0 t bxt_hpd_irq_setup +ffffffff81becb90 t bxt_hpd_enable_detection +ffffffff81becca0 t spt_hpd_irq_setup +ffffffff81becee0 t spt_hpd_enable_detection +ffffffff81bed020 t ilk_hpd_irq_setup +ffffffff81bed2b0 t ilk_hpd_enable_detection +ffffffff81bee000 T intel_hti_init +ffffffff81bee070 T intel_hti_uses_phy +ffffffff81bee110 T intel_hti_dpll_mask +ffffffff81bef000 T intel_load_detect_get_pipe +ffffffff81bef430 t intel_modeset_disable_planes +ffffffff81bef510 T intel_load_detect_release_pipe +ffffffff81bf0000 T intel_lpe_audio_irq_handler +ffffffff81bf0020 T intel_lpe_audio_init +ffffffff81bf0050 T intel_lpe_audio_teardown +ffffffff81bf0070 T intel_lpe_audio_notify +ffffffff81bf1000 T lspcon_detect_hdr_capability +ffffffff81bf10c0 T lspcon_write_infoframe +ffffffff81bf1950 T lspcon_read_infoframe +ffffffff81bf1990 T lspcon_set_infoframes +ffffffff81bf1c20 T lspcon_infoframes_enabled +ffffffff81bf1e30 T lspcon_wait_pcon_mode +ffffffff81bf1e50 t lspcon_wait_mode +ffffffff81bf2180 T lspcon_init +ffffffff81bf2660 T intel_lspcon_infoframes_enabled +ffffffff81bf2690 T lspcon_resume +ffffffff81bf29a0 t lspcon_change_mode +ffffffff81bf3000 T intel_lvds_port_enabled +ffffffff81bf3090 T intel_get_lvds_encoder +ffffffff81bf30f0 T intel_is_dual_link_lvds +ffffffff81bf3150 T intel_lvds_init +ffffffff81bf3950 t intel_enable_lvds +ffffffff81bf3ad0 t intel_pre_enable_lvds +ffffffff81bf3df0 t intel_lvds_compute_config +ffffffff81bf3f70 t pch_disable_lvds +ffffffff81bf3f90 t pch_post_disable_lvds +ffffffff81bf3fb0 t gmch_disable_lvds +ffffffff81bf3ff0 t intel_lvds_get_hw_state +ffffffff81bf40c0 t intel_lvds_get_config +ffffffff81bf41e0 t intel_lvds_shutdown +ffffffff81bf4290 t compute_is_dual_link_lvds +ffffffff81bf4380 t intel_no_lvds_dmi_callback +ffffffff81bf43d0 t intel_disable_lvds +ffffffff81bf4520 t intel_lvds_get_modes +ffffffff81bf4580 t intel_lvds_mode_valid +ffffffff81bf4630 t intel_dual_link_lvds_callback +ffffffff81bf5000 T _intel_modeset_lock_begin +ffffffff81bf5070 T _intel_modeset_lock_loop +ffffffff81bf50b0 T _intel_modeset_lock_end +ffffffff81bf6000 T intel_modeset_setup_hw_state +ffffffff81bf76b0 t intel_crtc_disable_noatomic +ffffffff81bf7d80 t intel_crtc_disable_noatomic_begin +ffffffff81bf9000 T intel_modeset_verify_crtc +ffffffff81bf9630 t verify_connector_state +ffffffff81bf9b10 T intel_modeset_verify_disabled +ffffffff81bfa000 T intel_opregion_notify_encoder +ffffffff81bfa190 t swsci +ffffffff81bfa530 T intel_opregion_notify_adapter +ffffffff81bfa590 T intel_opregion_asle_intr +ffffffff81bfa5e0 T intel_opregion_setup +ffffffff81bfaf90 t asle_work +ffffffff81bfb490 T intel_opregion_get_panel_type +ffffffff81bfb5a0 T intel_opregion_get_edid +ffffffff81bfb690 T intel_opregion_headless_sku +ffffffff81bfb6e0 T intel_opregion_register +ffffffff81bfb780 T intel_opregion_resume +ffffffff81bfb820 T intel_opregion_suspend +ffffffff81bfb8e0 T intel_opregion_unregister +ffffffff81bfb9c0 T intel_opregion_cleanup +ffffffff81bfbad0 t intel_no_opregion_vbt_callback +ffffffff81bfbb30 t intel_use_opregion_panel_type_callback +ffffffff81bfc000 T intel_overlay_reset +ffffffff81bfc050 T intel_overlay_switch_off +ffffffff81bfc2a0 t intel_overlay_release_old_vid +ffffffff81bfc4a0 T intel_overlay_put_image_ioctl +ffffffff81bfc850 t update_pfit_vscale_ratio +ffffffff81bfc930 t check_overlay_dst +ffffffff81bfca10 t check_overlay_src +ffffffff81bfcc60 t intel_overlay_do_put_image +ffffffff81bfd920 T intel_overlay_attrs_ioctl +ffffffff81bfdcc0 t check_gamma +ffffffff81bfdeb0 T intel_overlay_setup +ffffffff81bfe160 t intel_overlay_last_flip_retire +ffffffff81bfe1a0 T intel_overlay_cleanup +ffffffff81bfe260 T intel_overlay_capture_error_state +ffffffff81bfe370 T intel_overlay_print_error_state +ffffffff81bfe8b0 t intel_overlay_release_old_vid_tail +ffffffff81bfe980 t intel_overlay_off_tail +ffffffff81bfeb70 t intel_overlay_flip_prepare +ffffffff81bff000 T intel_panel_use_ssc +ffffffff81bff060 T intel_panel_preferred_fixed_mode +ffffffff81bff0b0 T intel_panel_fixed_mode +ffffffff81bff230 T intel_panel_downclock_mode +ffffffff81bff330 T intel_panel_highest_mode +ffffffff81bff390 T intel_panel_get_modes +ffffffff81bff440 T intel_panel_drrs_type +ffffffff81bff470 T intel_panel_compute_config +ffffffff81bff630 T intel_panel_add_edid_fixed_modes +ffffffff81bffb90 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81bffc00 t intel_panel_add_fixed_mode +ffffffff81bffd90 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81bffe00 T intel_panel_add_encoder_fixed_mode +ffffffff81bffe40 T intel_panel_fitting +ffffffff81c004b0 T intel_panel_detect +ffffffff81c00550 T intel_panel_mode_valid +ffffffff81c00600 T intel_panel_init_alloc +ffffffff81c00650 T intel_panel_init +ffffffff81c00790 T intel_panel_fini +ffffffff81c01000 T intel_has_pch_trancoder +ffffffff81c01060 T intel_crtc_pch_transcoder +ffffffff81c010a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81c010f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81c01140 T ilk_pch_pre_enable +ffffffff81c01170 T ilk_pch_enable +ffffffff81c01820 t ilk_pch_transcoder_set_timings +ffffffff81c01af0 T ilk_pch_disable +ffffffff81c01b10 T ilk_pch_post_disable +ffffffff81c01fc0 T ilk_pch_get_config +ffffffff81c021d0 T lpt_pch_enable +ffffffff81c024a0 T lpt_pch_disable +ffffffff81c025e0 T lpt_pch_get_config +ffffffff81c026d0 T intel_pch_sanitize +ffffffff81c02a10 t assert_pch_dp_disabled +ffffffff81c02bc0 t assert_pch_hdmi_disabled +ffffffff81c03000 T lpt_disable_iclkip +ffffffff81c030a0 T lpt_iclkip +ffffffff81c03130 T lpt_program_iclkip +ffffffff81c03450 T lpt_get_iclkip +ffffffff81c03590 T lpt_disable_clkout_dp +ffffffff81c03690 T intel_init_pch_refclk +ffffffff81c05000 T intel_initial_plane_config +ffffffff81c06000 T intel_pmdemand_init +ffffffff81c06150 T intel_pmdemand_init_early +ffffffff81c061e0 T intel_pmdemand_update_phys_mask +ffffffff81c06290 T intel_pmdemand_update_port_clock +ffffffff81c062d0 T intel_pmdemand_atomic_check +ffffffff81c06710 t intel_pmdemand_update_max_ddiclk +ffffffff81c067e0 t intel_pmdemand_update_active_non_tc_phys +ffffffff81c06a10 T intel_pmdemand_init_pmdemand_params +ffffffff81c06c10 T intel_pmdemand_program_dbuf +ffffffff81c06de0 t intel_pmdemand_wait +ffffffff81c07020 T intel_pmdemand_pre_plane_update +ffffffff81c07140 t intel_pmdemand_program_params +ffffffff81c075f0 T intel_pmdemand_post_plane_update +ffffffff81c07700 t intel_pmdemand_duplicate_state +ffffffff81c07790 t intel_pmdemand_destroy_state +ffffffff81c08000 T intel_pps_lock +ffffffff81c08070 T intel_pps_unlock +ffffffff81c080e0 T intel_pps_reset_all +ffffffff81c08240 T intel_pps_check_power_unlocked +ffffffff81c08590 t pps_name +ffffffff81c08640 T intel_pps_wait_power_cycle +ffffffff81c08710 t wait_panel_power_cycle +ffffffff81c08920 T intel_pps_vdd_on_unlocked +ffffffff81c08f80 T intel_pps_vdd_on +ffffffff81c09160 T intel_pps_vdd_off_sync +ffffffff81c09270 t intel_pps_vdd_off_sync_unlocked +ffffffff81c09730 T intel_pps_vdd_off_unlocked +ffffffff81c09920 T intel_pps_on_unlocked +ffffffff81c09e70 T intel_pps_on +ffffffff81c09f40 T intel_pps_off_unlocked +ffffffff81c0a3b0 T intel_pps_off +ffffffff81c0a480 T intel_pps_backlight_on +ffffffff81c0a6d0 T intel_pps_backlight_off +ffffffff81c0a940 T intel_pps_backlight_power +ffffffff81c0ab70 T vlv_pps_init +ffffffff81c0ad70 t vlv_detach_power_sequencer +ffffffff81c0af70 t vlv_steal_power_sequencer +ffffffff81c0b0b0 t pps_init_delays +ffffffff81c0b590 t pps_init_registers +ffffffff81c0b9a0 T intel_pps_have_panel_power_or_vdd +ffffffff81c0bb40 T intel_pps_encoder_reset +ffffffff81c0bd30 t vlv_initial_power_sequencer_setup +ffffffff81c0c0a0 t pps_vdd_init +ffffffff81c0c280 T intel_pps_init +ffffffff81c0c780 t edp_panel_vdd_work +ffffffff81c0c840 T intel_pps_init_late +ffffffff81c0cac0 T intel_pps_unlock_regs_wa +ffffffff81c0cbe0 T intel_pps_setup +ffffffff81c0cc50 T assert_pps_unlocked +ffffffff81c0cf20 t intel_pps_get_registers +ffffffff81c0d830 t wait_panel_status +ffffffff81c0dcd0 t intel_pps_readout_hw_state +ffffffff81c0dec0 t __delayed_work_tick +ffffffff81c0e000 T intel_psr_irq_handler +ffffffff81c0e710 t transcoder_name +ffffffff81c0e750 T intel_psr_init_dpcd +ffffffff81c0ea40 T intel_psr_compute_config +ffffffff81c0ec40 t intel_psr2_config_valid +ffffffff81c0f120 T intel_psr_get_config +ffffffff81c0f2e0 T intel_psr_disable +ffffffff81c0f420 t intel_psr_disable_locked +ffffffff81c0f810 T intel_psr_pause +ffffffff81c0fa30 t intel_psr_exit +ffffffff81c0fd10 T intel_psr_resume +ffffffff81c0fdb0 t intel_psr_activate +ffffffff81c10550 T intel_psr2_disable_plane_sel_fetch_arm +ffffffff81c105c0 T intel_psr2_program_plane_sel_fetch_arm +ffffffff81c10660 T intel_psr2_program_plane_sel_fetch_noarm +ffffffff81c107d0 T intel_psr2_program_trans_man_trk_ctl +ffffffff81c108c0 T intel_psr2_sel_fetch_update +ffffffff81c11070 T intel_psr_pre_plane_update +ffffffff81c11250 t wm_optimization_wa +ffffffff81c11410 T intel_psr_post_plane_update +ffffffff81c12190 T intel_psr_wait_for_idle_locked +ffffffff81c12380 T intel_psr_debug_set +ffffffff81c12750 T intel_psr_invalidate +ffffffff81c129b0 T intel_psr_flush +ffffffff81c12e50 T intel_psr_init +ffffffff81c12fa0 t intel_psr_work +ffffffff81c131a0 t tgl_dc3co_disable_work +ffffffff81c13200 T intel_psr_short_pulse +ffffffff81c13670 T intel_psr_enabled +ffffffff81c13700 T intel_psr_lock +ffffffff81c137c0 T intel_psr_unlock +ffffffff81c13880 T intel_psr_debugfs_register +ffffffff81c138b0 T intel_psr_connector_debugfs_add +ffffffff81c138e0 t _compute_psr2_sdp_prior_scanline_indication +ffffffff81c139a0 t _compute_psr2_wake_times +ffffffff81c13aa0 t intel_psr2_sel_fetch_config_valid +ffffffff81c13b30 t psr2_granularity_check +ffffffff81c13c20 t tgl_psr2_disable_dc3co +ffffffff81c13d40 t __delayed_work_tick +ffffffff81c14000 T intel_lookup_range_min_qp +ffffffff81c14120 T intel_lookup_range_max_qp +ffffffff81c15000 T intel_init_quirks +ffffffff81c15110 T intel_has_quirk +ffffffff81c15150 t quirk_ssc_force_disable +ffffffff81c15180 t quirk_invert_brightness +ffffffff81c151b0 t quirk_backlight_present +ffffffff81c151e0 t quirk_increase_t12_delay +ffffffff81c15210 t quirk_increase_ddi_disabled_time +ffffffff81c15240 t intel_dmi_reverse_brightness +ffffffff81c15290 t intel_dmi_no_pps_backlight +ffffffff81c16000 T intel_sdvo_port_enabled +ffffffff81c160b0 T intel_sdvo_init +ffffffff81c172f0 t intel_sdvo_compute_config +ffffffff81c17720 t pch_disable_sdvo +ffffffff81c17750 t pch_post_disable_sdvo +ffffffff81c17760 t intel_disable_sdvo +ffffffff81c17940 t intel_sdvo_pre_enable +ffffffff81c18430 t intel_enable_sdvo +ffffffff81c18650 t intel_sdvo_get_hw_state +ffffffff81c18750 t intel_sdvo_get_config +ffffffff81c18c30 t intel_sdvo_set_target_input +ffffffff81c18cb0 t intel_sdvo_get_input_pixel_clock_range +ffffffff81c18d60 t intel_sdvo_ddc_proxy_xfer +ffffffff81c18e10 t intel_sdvo_ddc_proxy_func +ffffffff81c18e40 t __intel_sdvo_write_cmd +ffffffff81c19350 t proxy_lock_bus +ffffffff81c19380 t proxy_trylock_bus +ffffffff81c193b0 t proxy_unlock_bus +ffffffff81c193e0 t intel_sdvo_enc_destroy +ffffffff81c193f0 t intel_sdvo_set_output_timings_from_mode +ffffffff81c19520 t intel_sdvo_get_preferred_input_mode +ffffffff81c19910 t intel_sdvo_get_dtd_from_mode +ffffffff81c19a90 t intel_sdvo_read_response +ffffffff81c1a000 t intel_sdvo_get_value +ffffffff81c1a080 t intel_sdvo_write_sdvox +ffffffff81c1a2f0 t intel_sdvo_write_infoframe +ffffffff81c1a4f0 t intel_sdvo_read_infoframe +ffffffff81c1a770 t intel_sdvo_hotplug +ffffffff81c1a7c0 t intel_sdvo_connector_get_hw_state +ffffffff81c1a860 t intel_sdvo_detect +ffffffff81c1abc0 t intel_sdvo_connector_register +ffffffff81c1abd0 t intel_sdvo_connector_unregister +ffffffff81c1abe0 t intel_sdvo_connector_duplicate_state +ffffffff81c1ac70 t intel_sdvo_connector_atomic_set_property +ffffffff81c1ae40 t intel_sdvo_connector_atomic_get_property +ffffffff81c1b060 t intel_sdvo_get_analog_edid +ffffffff81c1b0a0 t intel_sdvo_connector_matches_edid +ffffffff81c1b140 t intel_sdvo_get_modes +ffffffff81c1b470 t intel_sdvo_mode_valid +ffffffff81c1b5a0 t intel_sdvo_atomic_check +ffffffff81c1b660 t intel_sdvo_create_enhance_property +ffffffff81c1d000 T intel_snps_phy_wait_for_calibration +ffffffff81c1d0e0 T intel_snps_phy_update_psr_power_state +ffffffff81c1d1b0 T intel_snps_phy_set_signal_levels +ffffffff81c1d460 T intel_mpllb_calc_state +ffffffff81c1d610 T intel_snps_phy_check_hdmi_link_rate +ffffffff81c1d6b0 T intel_mpllb_enable +ffffffff81c1d950 T intel_mpllb_disable +ffffffff81c1db00 T intel_mpllb_calc_port_clock +ffffffff81c1dbd0 T intel_mpllb_readout_hw_state +ffffffff81c1dd90 T intel_mpllb_state_verify +ffffffff81c1f000 T vlv_plane_min_cdclk +ffffffff81c1f0f0 T ivb_plane_min_cdclk +ffffffff81c1f1b0 T hsw_plane_min_cdclk +ffffffff81c1f250 T chv_plane_check_rotation +ffffffff81c1f2d0 T intel_sprite_plane_create +ffffffff81c1f670 t vlv_sprite_update_noarm +ffffffff81c1f770 t vlv_sprite_update_arm +ffffffff81c1fe10 t vlv_sprite_disable_arm +ffffffff81c1fea0 t vlv_sprite_get_hw_state +ffffffff81c1ff90 t vlv_sprite_check +ffffffff81c20090 t ivb_sprite_update_noarm +ffffffff81c20200 t ivb_sprite_update_arm +ffffffff81c205e0 t ivb_sprite_disable_arm +ffffffff81c20690 t ivb_sprite_get_hw_state +ffffffff81c20760 t g4x_sprite_check +ffffffff81c20a40 t hsw_sprite_max_stride +ffffffff81c20aa0 t g4x_sprite_max_stride +ffffffff81c20b10 t ivb_sprite_min_cdclk +ffffffff81c20c50 t g4x_sprite_update_noarm +ffffffff81c20db0 t g4x_sprite_update_arm +ffffffff81c21200 t g4x_sprite_disable_arm +ffffffff81c212b0 t g4x_sprite_get_hw_state +ffffffff81c21380 t g4x_sprite_min_cdclk +ffffffff81c21460 t vlv_sprite_ctl +ffffffff81c21660 t vlv_sprite_format_mod_supported +ffffffff81c217a0 t ivb_sprite_ctl +ffffffff81c219e0 t g4x_sprite_ctl +ffffffff81c21bb0 t snb_sprite_format_mod_supported +ffffffff81c21ca0 t g4x_sprite_format_mod_supported +ffffffff81c22000 T intel_sprite_set_colorkey_ioctl +ffffffff81c23000 T intel_tc_port_in_tbt_alt_mode +ffffffff81c23090 T intel_tc_port_in_dp_alt_mode +ffffffff81c23120 T intel_tc_port_in_legacy_mode +ffffffff81c231b0 T intel_tc_cold_requires_aux_pw +ffffffff81c23230 T intel_tc_port_get_lane_mask +ffffffff81c23380 T intel_tc_port_get_pin_assignment_mask +ffffffff81c234d0 T intel_tc_port_fia_max_lane_count +ffffffff81c23720 T intel_tc_port_set_fia_lane_count +ffffffff81c23910 T intel_tc_port_init_mode +ffffffff81c23b80 t intel_tc_port_update_mode +ffffffff81c23fb0 T intel_tc_port_sanitize_mode +ffffffff81c24340 T intel_tc_port_connected_locked +ffffffff81c244b0 T intel_tc_port_ref_held +ffffffff81c24510 T intel_tc_port_connected +ffffffff81c245a0 T intel_tc_port_link_needs_reset +ffffffff81c24670 T intel_tc_port_link_reset +ffffffff81c247b0 T intel_tc_port_link_cancel_reset_work +ffffffff81c24880 T intel_tc_port_lock +ffffffff81c248a0 t __intel_tc_port_lock +ffffffff81c24a20 T intel_tc_port_suspend +ffffffff81c24a90 T intel_tc_port_unlock +ffffffff81c24b10 T intel_tc_port_get_link +ffffffff81c24bb0 T intel_tc_port_put_link +ffffffff81c24c70 T intel_tc_port_init +ffffffff81c24f30 t kasprintf +ffffffff81c25010 t intel_tc_port_disconnect_phy_work +ffffffff81c25070 t intel_tc_port_link_reset_work +ffffffff81c25430 T intel_tc_port_cleanup +ffffffff81c25510 t intel_tc_port_needs_reset +ffffffff81c25630 t tgl_tc_phy_cold_off_domain +ffffffff81c25660 t xelpdp_tc_phy_hpd_live_status +ffffffff81c257a0 t adlp_tc_phy_is_ready +ffffffff81c258c0 t xelpdp_tc_phy_is_owned +ffffffff81c259b0 t xelpdp_tc_phy_get_hw_state +ffffffff81c25b80 t xelpdp_tc_phy_connect +ffffffff81c25e60 t xelpdp_tc_phy_disconnect +ffffffff81c25fe0 t adlp_tc_phy_init +ffffffff81c26050 t tc_phy_get_current_mode +ffffffff81c263b0 t tc_phy_wait_for_ready +ffffffff81c26550 t xelpdp_tc_phy_enable_tcss_power +ffffffff81c26800 t tc_phy_verify_legacy_or_dp_alt_mode +ffffffff81c26a10 t xelpdp_tc_phy_wait_for_tcss_power +ffffffff81c26c60 t adlp_tc_phy_cold_off_domain +ffffffff81c26cc0 t adlp_tc_phy_hpd_live_status +ffffffff81c26de0 t adlp_tc_phy_is_owned +ffffffff81c26ec0 t adlp_tc_phy_get_hw_state +ffffffff81c26f80 t adlp_tc_phy_connect +ffffffff81c27320 t adlp_tc_phy_disconnect +ffffffff81c274c0 t icl_tc_phy_hpd_live_status +ffffffff81c27660 t icl_tc_phy_is_ready +ffffffff81c27780 t icl_tc_phy_is_owned +ffffffff81c278a0 t icl_tc_phy_get_hw_state +ffffffff81c27960 t icl_tc_phy_connect +ffffffff81c27b20 t icl_tc_phy_disconnect +ffffffff81c27bb0 t tgl_tc_phy_init +ffffffff81c27d20 t icl_tc_phy_take_ownership +ffffffff81c27eb0 t icl_tc_phy_cold_off_domain +ffffffff81c27f10 t icl_tc_phy_init +ffffffff81c27f70 t __delayed_work_tick +ffffffff81c28000 T intel_tv_init +ffffffff81c28490 t intel_tv_compute_config +ffffffff81c28990 t intel_tv_get_config +ffffffff81c28eb0 t intel_tv_pre_enable +ffffffff81c298f0 t intel_enable_tv +ffffffff81c29970 t intel_disable_tv +ffffffff81c299e0 t intel_tv_get_hw_state +ffffffff81c29a50 t intel_tv_connector_duplicate_state +ffffffff81c29ae0 t intel_tv_mode_to_mode +ffffffff81c29c30 t intel_tv_get_modes +ffffffff81c29fb0 t intel_tv_detect +ffffffff81c2a520 t intel_tv_mode_valid +ffffffff81c2a5e0 t intel_tv_atomic_check +ffffffff81c2b000 T i915_get_vblank_counter +ffffffff81c2b220 T g4x_get_vblank_counter +ffffffff81c2b2b0 T intel_crtc_get_vblank_timestamp +ffffffff81c2b2d0 t i915_get_crtc_scanoutpos +ffffffff81c2b720 T intel_get_crtc_scanline +ffffffff81c2b7a0 t __intel_get_crtc_scanline +ffffffff81c2ba00 T intel_wait_for_pipe_scanline_stopped +ffffffff81c2ba10 t wait_for_pipe_scanline_moving +ffffffff81c2bcd0 T intel_wait_for_pipe_scanline_moving +ffffffff81c2bcf0 T intel_crtc_update_active_timings +ffffffff81c2c000 T intel_dsc_source_support +ffffffff81c2c050 T intel_dsc_compute_params +ffffffff81c2c680 T intel_dsc_power_domain +ffffffff81c2c730 T intel_dsc_get_num_vdsc_instances +ffffffff81c2c780 T intel_dsc_dsi_pps_write +ffffffff81c2cac0 T intel_dsc_dp_pps_write +ffffffff81c2cbc0 T intel_uncompressed_joiner_enable +ffffffff81c2ccf0 T intel_dsc_enable +ffffffff81c2ea10 T intel_dsc_disable +ffffffff81c2eba0 T intel_dsc_get_config +ffffffff81c2f000 T intel_vga_disable +ffffffff81c2f150 T intel_vga_redisable_power_on +ffffffff81c2f200 T intel_vga_redisable +ffffffff81c2f2e0 T intel_vga_reset_io_mem +ffffffff81c2f340 T intel_vga_register +ffffffff81c2f370 T intel_vga_unregister +ffffffff81c30000 T intel_vrr_is_capable +ffffffff81c30080 T intel_vrr_check_modeset +ffffffff81c30110 T intel_vrr_vmin_vblank_start +ffffffff81c30170 T intel_vrr_vmax_vblank_start +ffffffff81c301d0 T intel_vrr_compute_config +ffffffff81c30360 T intel_vrr_set_transcoder_timings +ffffffff81c30560 T intel_vrr_send_push +ffffffff81c305e0 T intel_vrr_is_push_sent +ffffffff81c30670 T intel_vrr_enable +ffffffff81c307a0 T intel_vrr_disable +ffffffff81c308f0 T intel_vrr_get_config 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gen9_blt_get_cmd_length_mask +ffffffff81d10970 T intel_engine_cleanup_cmd_parser +ffffffff81d10a40 T intel_engine_cmd_parser +ffffffff81d11700 T i915_cmd_parser_get_version +ffffffff81d12000 T i915_fence_context_timeout +ffffffff81d13000 T i915_deps_init +ffffffff81d13070 T i915_deps_fini +ffffffff81d13100 T i915_deps_sync +ffffffff81d131c0 T i915_deps_add_dependency +ffffffff81d13490 T i915_deps_add_resv +ffffffff81d14000 T i915_print_iommu_status +ffffffff81d14050 T i915_driver_probe +ffffffff81d14c60 t i915_driver_register +ffffffff81d14db0 T inteldrm_init_backlight +ffffffff81d14e40 t i915_welcome_messages +ffffffff81d15000 T i915_driver_remove +ffffffff81d15190 T i915_driver_shutdown +ffffffff81d153c0 T i915_driver_resume_switcheroo +ffffffff81d15430 t i915_drm_resume_early +ffffffff81d15550 t i915_drm_resume +ffffffff81d15850 T intagpsubmatch +ffffffff81d158a0 T intagp_print +ffffffff81d158f0 T inteldrm_wsioctl +ffffffff81d15b00 T inteldrm_wsmmap +ffffffff81d15b30 T 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gen6_init_clock_gating +ffffffff81d4c7a0 t ilk_init_clock_gating +ffffffff81d4c9f0 t g4x_init_clock_gating +ffffffff81d4cad0 t i965gm_init_clock_gating +ffffffff81d4cbd0 t i965g_init_clock_gating +ffffffff81d4cc60 t gen3_init_clock_gating +ffffffff81d4cd90 t i85x_init_clock_gating +ffffffff81d4ce40 t i830_init_clock_gating +ffffffff81d4d000 T intel_platform_name +ffffffff81d4d0a0 T intel_device_info_print +ffffffff81d4dc30 T intel_device_info_runtime_init_early +ffffffff81d4e360 T intel_device_info_runtime_init +ffffffff81d4e440 T intel_device_info_driver_create +ffffffff81d4e560 T intel_driver_caps_print +ffffffff81d4f000 T intel_memory_region_lookup +ffffffff81d4f0e0 T intel_memory_region_by_type +ffffffff81d4f1a0 T intel_memory_region_reserve +ffffffff81d4f1c0 T intel_memory_region_debug +ffffffff81d4f230 T intel_memory_region_create +ffffffff81d4f400 T intel_memory_region_set_name +ffffffff81d4f490 T intel_memory_region_avail +ffffffff81d4f510 T intel_memory_region_destroy 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radeon_process_i2c_ch +ffffffff81d79390 T radeon_atom_hw_i2c_func +ffffffff81d7a000 T btc_get_max_clock_from_voltage_dependency_table +ffffffff81d7a0d0 T btc_apply_voltage_dependency_rules +ffffffff81d7a140 T btc_skip_blacklist_clocks +ffffffff81d7a230 T btc_adjust_clock_combinations +ffffffff81d7a360 T btc_apply_voltage_delta_rules +ffffffff81d7a490 T btc_program_mgcg_hw_sequence +ffffffff81d7a5a0 T btc_dpm_enabled +ffffffff81d7a5b0 T btc_notify_uvd_to_smc +ffffffff81d7a640 T btc_reset_to_default +ffffffff81d7a690 T btc_read_arb_registers +ffffffff81d7a730 T btc_dpm_vblank_too_short +ffffffff81d7a7b0 T btc_dpm_pre_set_power_state +ffffffff81d7ba00 T btc_dpm_set_power_state +ffffffff81d7bde0 t btc_set_power_state_conditionally_enable_ulv +ffffffff81d7bf60 T btc_dpm_post_set_power_state +ffffffff81d7c0a0 t btc_update_current_ps +ffffffff81d7c1b0 T btc_dpm_enable +ffffffff81d7d2a0 t btc_cg_clock_gating_enable +ffffffff81d7d3e0 t btc_mg_clock_gating_enable +ffffffff81d7d520 t btc_ls_clock_gating_enable +ffffffff81d7d660 t btc_init_stutter_mode +ffffffff81d7d6e0 T btc_dpm_disable +ffffffff81d7da50 T btc_dpm_setup_asic +ffffffff81d7db70 T btc_dpm_init +ffffffff81d7dfe0 T btc_dpm_fini +ffffffff81d7e0b0 T btc_dpm_debugfs_print_current_performance_level +ffffffff81d7e110 T btc_dpm_get_current_sclk +ffffffff81d7e1a0 T btc_dpm_get_current_mclk +ffffffff81d7e230 T btc_dpm_get_sclk +ffffffff81d7e2a0 T btc_dpm_get_mclk +ffffffff81d7f000 T ci_dpm_powergate_uvd +ffffffff81d7f3f0 T ci_dpm_vblank_too_short +ffffffff81d7f490 T ci_fan_ctrl_get_fan_speed_percent +ffffffff81d7f550 T ci_fan_ctrl_set_fan_speed_percent +ffffffff81d7f640 T ci_fan_ctrl_set_mode +ffffffff81d7f810 t ci_fan_ctrl_set_static_mode +ffffffff81d7f900 t ci_thermal_start_smc_fan_control +ffffffff81d7fb60 T ci_fan_ctrl_get_mode +ffffffff81d7fbc0 T ci_dpm_force_performance_level +ffffffff81d80540 t ci_upload_dpm_level_enable_mask +ffffffff81d808b0 T ci_dpm_pre_set_power_state +ffffffff81d80bb0 T ci_dpm_post_set_power_state +ffffffff81d80c80 T ci_dpm_setup_asic +ffffffff81d80ed0 T ci_dpm_enable +ffffffff81d82980 t ci_init_smc_table +ffffffff81d83900 t ci_init_arb_table_index +ffffffff81d83990 t ci_populate_initial_mc_reg_table +ffffffff81d83c90 t ci_populate_pm_base +ffffffff81d84020 t ci_dpm_start_smc +ffffffff81d840d0 t ci_enable_vr_hot_gpio_interrupt +ffffffff81d84190 t ci_notify_smc_display_change +ffffffff81d84270 t ci_enable_sclk_control +ffffffff81d842b0 t ci_enable_ulv +ffffffff81d84430 t ci_enable_ds_master_switch +ffffffff81d84650 t ci_start_dpm +ffffffff81d848a0 t ci_enable_didt +ffffffff81d84ba0 t ci_enable_smc_cac +ffffffff81d84d50 t ci_enable_power_containment +ffffffff81d85230 t ci_power_control_set_level +ffffffff81d85360 t ci_enable_auto_throttle_source +ffffffff81d85450 t ci_enable_thermal_based_sclk_dpm +ffffffff81d855d0 t ci_thermal_start_thermal_controller +ffffffff81d85930 T ci_dpm_late_enable +ffffffff81d859f0 T ci_dpm_disable +ffffffff81d86290 T ci_dpm_set_power_state +ffffffff81d86fe0 t ci_update_sclk_t +ffffffff81d87060 t ci_update_and_upload_mc_reg_table +ffffffff81d872e0 t ci_unfreeze_sclk_mclk_dpm +ffffffff81d874c0 t ci_notify_link_speed_change_after_state_change +ffffffff81d87600 T ci_dpm_display_configuration_changed +ffffffff81d877f0 T ci_dpm_fini +ffffffff81d878c0 T ci_dpm_init +ffffffff81d88860 t ci_initialize_powertune_defaults +ffffffff81d88950 t ci_get_leakage_voltages +ffffffff81d88b30 t ci_patch_dependency_tables_with_leakage +ffffffff81d891a0 t ci_set_private_data_variables_based_on_pptable +ffffffff81d892b0 T ci_dpm_debugfs_print_current_performance_level +ffffffff81d89410 T ci_dpm_print_power_state +ffffffff81d894f0 T ci_dpm_get_current_sclk +ffffffff81d895d0 T ci_dpm_get_current_mclk +ffffffff81d896b0 T ci_dpm_get_sclk +ffffffff81d89700 T ci_dpm_get_mclk +ffffffff81d89750 t ci_set_valid_flag +ffffffff81d897f0 t ci_populate_all_graphic_levels +ffffffff81d89db0 t ci_populate_all_memory_levels +ffffffff81d8a6d0 t ci_populate_smc_vce_level +ffffffff81d8a7f0 t ci_populate_smc_acp_level +ffffffff81d8a8f0 t ci_populate_smc_samu_level +ffffffff81d8a9f0 t ci_do_program_memory_timing_parameters +ffffffff81d8ac20 t ci_populate_smc_uvd_level +ffffffff81d8ad80 t ci_populate_smc_initial_state +ffffffff81d8ae20 t ci_populate_bapm_parameters_in_dpm_table +ffffffff81d8afa0 t ci_populate_smc_voltage_table +ffffffff81d8b0c0 t ci_min_max_v_gnbl_pm_lid_from_bapm_vddc +ffffffff81d8b320 t ci_enable_sclk_mclk_dpm +ffffffff81d8b710 t ci_thermal_enable_alert +ffffffff81d8b910 t ci_enable_vce_dpm +ffffffff81d8c000 T ci_copy_bytes_to_smc +ffffffff81d8c260 T ci_start_smc +ffffffff81d8c2a0 T ci_reset_smc +ffffffff81d8c2e0 T ci_program_jump_on_start +ffffffff81d8c310 T ci_stop_smc_clock +ffffffff81d8c350 T ci_start_smc_clock +ffffffff81d8c390 T ci_is_smc_running +ffffffff81d8c410 T ci_load_smc_ucode +ffffffff81d8c5d0 T ci_read_smc_sram_dword +ffffffff81d8c6c0 T ci_write_smc_sram_dword +ffffffff81d8d000 T cik_get_allowed_info_register +ffffffff81d8d0a0 T cik_didt_rreg +ffffffff81d8d150 T cik_didt_wreg +ffffffff81d8d1e0 T ci_get_temp +ffffffff81d8d230 T kv_get_temp +ffffffff81d8d290 T cik_pciep_rreg +ffffffff81d8d320 T cik_pciep_wreg +ffffffff81d8d390 T cik_get_xclk +ffffffff81d8d410 T cik_mm_rdoorbell +ffffffff81d8d480 T cik_mm_wdoorbell +ffffffff81d8d4d0 T ci_mc_load_microcode +ffffffff81d8d840 T cik_ring_test +ffffffff81d8db60 T cik_fence_gfx_ring_emit +ffffffff81d8dfb0 T cik_fence_compute_ring_emit +ffffffff81d8e260 T cik_semaphore_ring_emit +ffffffff81d8e450 T cik_copy_cpdma +ffffffff81d8e940 T cik_ring_ib_execute +ffffffff81d8ef50 T cik_ib_test +ffffffff81d8f2e0 T cik_gfx_get_rptr +ffffffff81d8f340 T cik_gfx_get_wptr +ffffffff81d8f380 T cik_gfx_set_wptr +ffffffff81d8f3c0 T cik_compute_get_rptr +ffffffff81d8f4b0 T cik_compute_get_wptr +ffffffff81d8f5a0 T cik_compute_set_wptr +ffffffff81d8f620 T cik_gpu_check_soft_reset +ffffffff81d8f7a0 T cik_asic_reset +ffffffff81d8fcf0 t cik_gpu_pci_config_reset +ffffffff81d90560 T cik_gfx_is_lockup +ffffffff81d905e0 T cik_pcie_gart_tlb_flush +ffffffff81d90630 T cik_ib_parse +ffffffff81d90660 T cik_vm_init +ffffffff81d906c0 T cik_vm_fini +ffffffff81d906f0 T cik_vm_flush +ffffffff81d914f0 T cik_enter_rlc_safe_mode +ffffffff81d91600 T cik_exit_rlc_safe_mode +ffffffff81d91640 T cik_update_cg +ffffffff81d91b90 t cik_enable_mgcg +ffffffff81d920c0 t cik_enable_cgcg +ffffffff81d92450 T cik_init_cp_pg_table +ffffffff81d926e0 T cik_get_csb_size +ffffffff81d92770 T cik_get_csb_buffer +ffffffff81d92900 T cik_irq_set +ffffffff81d93780 t cik_disable_interrupt_state +ffffffff81d93c90 T cik_irq_process +ffffffff81d956e0 t cik_irq_ack +ffffffff81d960c0 T cik_resume +ffffffff81d96180 t cik_init_golden_registers +ffffffff81d963b0 t cik_startup +ffffffff81d995d0 T cik_suspend +ffffffff81d99a80 T cik_init +ffffffff81d9a100 t cik_init_microcode +ffffffff81d9b140 t cik_uvd_init +ffffffff81d9b200 t cik_vce_init +ffffffff81d9b2e0 t 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cypress_program_memory_timing_parameters +ffffffff81da5ac0 T cypress_populate_smc_initial_state +ffffffff81da5eb0 T cypress_populate_smc_acpi_state +ffffffff81da6260 T cypress_construct_voltage_tables +ffffffff81da6420 T cypress_populate_smc_voltage_tables +ffffffff81da6560 T cypress_get_mvdd_configuration +ffffffff81da6650 T cypress_populate_mc_reg_table +ffffffff81da69e0 T cypress_get_table_locations +ffffffff81da6af0 T cypress_enable_display_gap +ffffffff81da6b50 T cypress_dpm_setup_asic +ffffffff81da6cb0 T cypress_dpm_enable +ffffffff81da7960 t cypress_force_mc_use_s1 +ffffffff81da7c30 t cypress_gfx_clock_gating_enable +ffffffff81da8010 t cypress_mg_clock_gating_enable +ffffffff81da82f0 T cypress_dpm_disable +ffffffff81da8580 T cypress_dpm_set_power_state +ffffffff81da8880 T cypress_dpm_display_configuration_changed +ffffffff81da8960 T cypress_dpm_init +ffffffff81da8c30 T cypress_dpm_fini +ffffffff81da8cd0 T cypress_dpm_vblank_too_short +ffffffff81da8d50 t cypress_wait_for_mc_sequencer +ffffffff81da9000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81da9080 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81da9100 T dce3_2_afmt_write_sad_regs +ffffffff81da9200 T dce3_2_audio_set_dto +ffffffff81da9340 T dce3_2_hdmi_update_acr +ffffffff81da9710 T dce3_2_set_audio_packet +ffffffff81da98d0 T dce3_2_set_mute +ffffffff81daa000 T dce6_endpoint_rreg +ffffffff81daa100 T dce6_endpoint_wreg +ffffffff81daa210 T dce6_audio_get_pin +ffffffff81daa3a0 T dce6_afmt_select_pin +ffffffff81daa430 T dce6_afmt_write_latency_fields +ffffffff81daa4f0 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81daa5d0 T dce6_afmt_dp_write_speaker_allocation +ffffffff81daa6b0 T dce6_afmt_write_sad_regs +ffffffff81daa800 T dce6_audio_enable +ffffffff81daa850 T dce6_hdmi_audio_set_dto +ffffffff81daa8c0 T dce6_dp_audio_set_dto +ffffffff81dab000 T eg_cg_rreg +ffffffff81dab090 T eg_cg_wreg +ffffffff81dab100 T eg_pif_phy0_rreg +ffffffff81dab190 T eg_pif_phy0_wreg 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evergreen_get_number_of_dram_channels +ffffffff81dad1a0 T evergreen_bandwidth_update +ffffffff81dad380 t evergreen_line_buffer_adjust +ffffffff81dad5a0 t evergreen_program_watermarks +ffffffff81dae0a0 T evergreen_mc_wait_for_idle +ffffffff81dae140 T evergreen_pcie_gart_tlb_flush +ffffffff81dae220 T evergreen_mc_stop +ffffffff81daee80 T evergreen_mc_resume +ffffffff81daf650 T evergreen_mc_program +ffffffff81dafa70 T evergreen_ring_ib_execute +ffffffff81daff70 T evergreen_mc_init +ffffffff81db00d0 T evergreen_print_gpu_status_regs +ffffffff81db0120 T evergreen_is_display_hung +ffffffff81db0350 T evergreen_gpu_check_soft_reset +ffffffff81db04c0 T evergreen_gpu_pci_config_reset +ffffffff81db0690 T evergreen_asic_reset +ffffffff81db0a80 T evergreen_gfx_is_lockup +ffffffff81db0b00 T sumo_rlc_fini +ffffffff81db0d40 t radeon_bo_reserve +ffffffff81db0ee0 t radeon_bo_unreserve +ffffffff81db0ff0 T sumo_rlc_init +ffffffff81db18e0 T evergreen_rlc_resume +ffffffff81db1c50 T evergreen_get_vblank_counter +ffffffff81db1cc0 T evergreen_disable_interrupt_state +ffffffff81db1fc0 T evergreen_irq_set +ffffffff81db2660 T evergreen_irq_suspend +ffffffff81db26d0 T evergreen_irq_process +ffffffff81db3370 t evergreen_irq_ack +ffffffff81db3aa0 T evergreen_resume +ffffffff81db3bb0 t evergreen_init_golden_registers +ffffffff81db3e20 t evergreen_startup +ffffffff81db5870 T evergreen_suspend +ffffffff81db5a80 T evergreen_init +ffffffff81db5fc0 t evergreen_pcie_gart_fini +ffffffff81db60f0 T evergreen_fini +ffffffff81db6390 T evergreen_pcie_gen2_enable +ffffffff81db6620 T evergreen_program_aspm +ffffffff81db6e10 t evergreen_latency_watermark +ffffffff81db7010 t evergreen_uvd_start +ffffffff81db70f0 t evergreen_cp_load_microcode +ffffffff81db7250 t evergreen_cp_resume +ffffffff81db8070 t evergreen_uvd_resume +ffffffff81db9000 T evergreen_cs_parse +ffffffff81dbba40 T evergreen_dma_cs_parse +ffffffff81dbcc40 T evergreen_ib_parse +ffffffff81dbd110 T evergreen_dma_ib_parse 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+ffffffff81dc3ac0 T dce4_set_audio_packet +ffffffff81dc3d10 T dce4_set_mute +ffffffff81dc3e20 T evergreen_hdmi_enable +ffffffff81dc41b0 T evergreen_dp_enable +ffffffff81dc5000 T kv_dpm_enable_bapm +ffffffff81dc5070 T kv_dpm_enable +ffffffff81dc6060 t kv_populate_vce_table +ffffffff81dc6300 t kv_populate_samu_table +ffffffff81dc6580 t kv_populate_acp_table +ffffffff81dc6730 t kv_start_am +ffffffff81dc6770 t kv_enable_auto_thermal_throttling +ffffffff81dc67b0 t kv_enable_dpm_voltage_scaling +ffffffff81dc67f0 t kv_set_dpm_interval +ffffffff81dc6830 t kv_start_dpm +ffffffff81dc6880 t kv_enable_didt +ffffffff81dc6b80 T kv_dpm_late_enable +ffffffff81dc6dd0 T kv_dpm_powergate_uvd +ffffffff81dc6f90 T kv_dpm_disable +ffffffff81dc7390 T kv_dpm_force_performance_level +ffffffff81dc7540 t kv_force_dpm_lowest +ffffffff81dc7620 T kv_dpm_pre_set_power_state +ffffffff81dc7ba0 T kv_dpm_set_power_state +ffffffff81dc8490 t kv_set_valid_clock_range +ffffffff81dc8630 t kv_calculate_ds_divider +ffffffff81dc87d0 t kv_calculate_nbps_level_settings +ffffffff81dc8950 t kv_update_vce_dpm +ffffffff81dc8b70 T kv_dpm_post_set_power_state +ffffffff81dc8c10 T kv_dpm_setup_asic +ffffffff81dc8c80 T kv_dpm_init +ffffffff81dc9580 T kv_dpm_debugfs_print_current_performance_level +ffffffff81dc95f0 T kv_dpm_get_current_sclk +ffffffff81dc9660 T kv_dpm_get_current_mclk +ffffffff81dc9690 T kv_dpm_print_power_state +ffffffff81dc9760 T kv_dpm_fini +ffffffff81dc9810 T kv_dpm_display_configuration_changed +ffffffff81dc9840 T kv_dpm_get_sclk +ffffffff81dc9890 T kv_dpm_get_mclk +ffffffff81dca000 T kv_notify_message_to_smu +ffffffff81dca0c0 T kv_dpm_get_enable_mask +ffffffff81dca1b0 T kv_send_msg_to_smc_with_parameter +ffffffff81dca280 T kv_read_smc_sram_dword +ffffffff81dca310 T kv_smc_dpm_enable +ffffffff81dca450 T kv_smc_bapm_enable +ffffffff81dca590 T kv_copy_bytes_to_smc +ffffffff81dcb000 T tn_smc_rreg +ffffffff81dcb090 T tn_smc_wreg +ffffffff81dcb100 T ni_mc_load_microcode +ffffffff81dcb2f0 T ni_init_microcode +ffffffff81dcb8c0 t request_firmware +ffffffff81dcb970 t release_firmware +ffffffff81dcb9b0 T cayman_get_allowed_info_register +ffffffff81dcba40 T tn_get_temp +ffffffff81dcbae0 T cayman_pcie_gart_tlb_flush +ffffffff81dcbb30 T cayman_cp_int_cntl_setup +ffffffff81dcbb80 T cayman_fence_ring_emit +ffffffff81dcbf70 T cayman_ring_ib_execute +ffffffff81dcc440 T cayman_gfx_get_rptr +ffffffff81dcc4d0 T cayman_gfx_get_wptr +ffffffff81dcc540 T cayman_gfx_set_wptr +ffffffff81dcc5c0 T cayman_gpu_check_soft_reset +ffffffff81dcc760 T cayman_asic_reset +ffffffff81dccaf0 T cayman_gfx_is_lockup +ffffffff81dccb70 T cayman_resume +ffffffff81dccc30 t ni_init_golden_registers +ffffffff81dccd20 t cayman_startup +ffffffff81dce2e0 T cayman_suspend +ffffffff81dce520 T cayman_init +ffffffff81dce9b0 t cayman_uvd_init +ffffffff81dcea70 t cayman_vce_init +ffffffff81dceb50 t cayman_cp_fini +ffffffff81dcebe0 t cayman_pcie_gart_fini +ffffffff81dced30 T cayman_fini +ffffffff81dcf070 T cayman_vm_init +ffffffff81dcf0d0 T cayman_vm_fini +ffffffff81dcf100 T cayman_vm_decode_fault +ffffffff81dcf1a0 T cayman_vm_flush +ffffffff81dcf680 T tn_set_vce_clocks +ffffffff81dcf980 t cayman_uvd_start +ffffffff81dcfa60 t cayman_vce_start +ffffffff81dcfbb0 t cayman_cp_load_microcode +ffffffff81dcfd40 t cayman_cp_resume +ffffffff81dd0df0 t cayman_uvd_resume +ffffffff81dd0ed0 t cayman_vce_resume +ffffffff81dd1000 T cayman_dma_get_rptr +ffffffff81dd1070 T cayman_dma_get_wptr +ffffffff81dd10c0 T cayman_dma_set_wptr +ffffffff81dd1110 T cayman_dma_ring_ib_execute +ffffffff81dd14e0 T cayman_dma_stop +ffffffff81dd1590 T cayman_dma_resume +ffffffff81dd1800 T cayman_dma_fini +ffffffff81dd18c0 T cayman_dma_is_lockup +ffffffff81dd1950 T cayman_dma_vm_copy_pages +ffffffff81dd1a50 T cayman_dma_vm_write_pages +ffffffff81dd1bc0 T cayman_dma_vm_set_pages +ffffffff81dd1d30 T cayman_dma_vm_pad_ib +ffffffff81dd1d80 T cayman_dma_vm_flush +ffffffff81dd3000 T ni_get_pi +ffffffff81dd3030 T ni_get_ps +ffffffff81dd3060 T ni_dpm_vblank_too_short +ffffffff81dd30e0 T ni_dpm_force_performance_level +ffffffff81dd3250 T ni_copy_and_switch_arb_sets +ffffffff81dd3520 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81dd35a0 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81dd3620 T ni_dpm_setup_asic +ffffffff81dd3880 T ni_update_current_ps +ffffffff81dd3950 T ni_update_requested_ps +ffffffff81dd3a20 T ni_dpm_enable +ffffffff81dd4a20 t ni_init_smc_table +ffffffff81dd5450 t ni_init_smc_spll_table +ffffffff81dd55e0 t ni_init_arb_table_index +ffffffff81dd5690 t ni_populate_mc_reg_table +ffffffff81dd5bd0 t ni_initialize_smc_cac_tables +ffffffff81dd6ea0 t ni_initialize_hardware_cac_manager +ffffffff81dd74d0 t ni_populate_smc_tdp_limits +ffffffff81dd76b0 t ni_program_response_times +ffffffff81dd7800 T ni_dpm_disable +ffffffff81dd7c60 t ni_enable_power_containment +ffffffff81dd7d40 t ni_enable_smc_cac +ffffffff81dd7ea0 T ni_dpm_pre_set_power_state +ffffffff81dd8510 T ni_dpm_set_power_state +ffffffff81dd8890 t ni_upload_sw_state +ffffffff81dd9550 t ni_upload_mc_reg_table +ffffffff81dd97d0 t ni_power_control_set_level +ffffffff81dd98d0 T ni_dpm_post_set_power_state +ffffffff81dd99c0 T ni_dpm_init +ffffffff81dda420 T ni_dpm_fini +ffffffff81dda4f0 T ni_dpm_print_power_state +ffffffff81dda5f0 T ni_dpm_debugfs_print_current_performance_level +ffffffff81dda630 T ni_dpm_get_current_sclk +ffffffff81dda6a0 T ni_dpm_get_current_mclk +ffffffff81dda710 T ni_dpm_get_sclk +ffffffff81dda780 T ni_dpm_get_mclk +ffffffff81dda7e0 t ni_do_program_memory_timing_parameters +ffffffff81dda940 t ni_calculate_sclk_params +ffffffff81ddab90 t ni_calculate_power_boost_limit +ffffffff81ddad30 t ni_populate_mclk_value +ffffffff81ddc000 T r100_wait_for_vblank +ffffffff81ddc190 T r100_page_flip +ffffffff81ddc4a0 T r100_page_flip_pending +ffffffff81ddc570 T r100_pm_get_dynpm_state +ffffffff81ddc790 T r100_pm_init_profile +ffffffff81ddc870 T r100_pm_misc +ffffffff81ddcd10 T r100_pm_prepare +ffffffff81ddcdc0 T r100_pm_finish +ffffffff81ddce70 T r100_gui_idle +ffffffff81ddceb0 T r100_hpd_sense +ffffffff81ddcf10 T r100_hpd_set_polarity +ffffffff81ddcfd0 T r100_hpd_init +ffffffff81ddd080 T r100_hpd_fini +ffffffff81ddd0f0 T r100_pci_gart_tlb_flush +ffffffff81ddd120 T r100_pci_gart_init +ffffffff81ddd200 T r100_pci_gart_get_page_entry +ffffffff81ddd230 T r100_pci_gart_set_page +ffffffff81ddd270 T r100_pci_gart_enable +ffffffff81ddd360 T r100_pci_gart_disable +ffffffff81ddd3e0 T r100_pci_gart_fini +ffffffff81ddd460 T r100_irq_set +ffffffff81ddd540 T r100_irq_disable +ffffffff81ddd5c0 T r100_irq_process +ffffffff81ddd8f0 T r100_get_vblank_counter +ffffffff81ddd940 T r100_fence_ring_emit +ffffffff81ddde10 T r100_semaphore_ring_emit +ffffffff81ddde40 T r100_copy_blit +ffffffff81dde570 T r100_ring_start +ffffffff81dde670 T r100_gfx_get_rptr +ffffffff81dde6d0 T r100_gfx_get_wptr +ffffffff81dde710 T r100_gfx_set_wptr +ffffffff81dde750 T r100_cp_init +ffffffff81dded40 T r100_debugfs_cp_init +ffffffff81dded70 T r100_cp_fini +ffffffff81ddee40 T r100_cp_disable +ffffffff81ddefa0 T r100_gui_wait_for_idle +ffffffff81ddf090 T r100_reloc_pitch_offset +ffffffff81ddf200 T r100_packet3_load_vbpntr +ffffffff81ddf4f0 T r100_cs_parse_packet0 +ffffffff81ddf600 T r100_cs_packet_parse_vline +ffffffff81ddf830 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81ddf8b0 T r100_cs_parse +ffffffff81de0ba0 T r100_cs_track_clear +ffffffff81de0f30 T r100_cs_track_check +ffffffff81de17f0 T r100_mc_wait_for_idle +ffffffff81de1890 T r100_gpu_is_lockup +ffffffff81de1900 T r100_enable_bm +ffffffff81de1950 T r100_bm_disable +ffffffff81de1a10 T r100_asic_reset +ffffffff81de1da0 T r100_mc_stop +ffffffff81de1f60 T r100_mc_resume +ffffffff81de2020 T r100_set_common_regs +ffffffff81de21d0 T r100_vram_init_sizes +ffffffff81de23e0 T r100_vga_set_state +ffffffff81de2440 T r100_pll_errata_after_index +ffffffff81de2480 T r100_pll_rreg +ffffffff81de25f0 T r100_pll_wreg +ffffffff81de2740 T r100_debugfs_rbbm_init +ffffffff81de2770 T r100_debugfs_mc_info_init +ffffffff81de27a0 T r100_set_surface_reg +ffffffff81de29f0 T r100_clear_surface_reg +ffffffff81de2ab0 T r100_bandwidth_update +ffffffff81de3520 T r100_ring_test +ffffffff81de3850 T r100_ring_ib_execute +ffffffff81de3ad0 T r100_ib_test +ffffffff81de3e90 T r100_vga_render_disable +ffffffff81de3ef0 T r100_resume +ffffffff81de4130 t r100_startup +ffffffff81de46f0 T r100_suspend +ffffffff81de47f0 T r100_fini +ffffffff81de4960 T r100_restore_sanity +ffffffff81de4a00 T r100_init +ffffffff81de4f40 t r100_set_safe_registers +ffffffff81de4fc0 T r100_mm_rreg_slow +ffffffff81de5050 T r100_mm_wreg_slow +ffffffff81de50c0 T r100_io_rreg +ffffffff81de5170 T r100_io_wreg +ffffffff81de51f0 t r100_get_vtx_size +ffffffff81de52e0 t r100_cs_track_texture_print +ffffffff81de6000 T r200_copy_dma +ffffffff81de64e0 T r200_packet0_check +ffffffff81de7340 t r200_get_vtx_size_0 +ffffffff81de7500 t r200_get_vtx_size_1 +ffffffff81de7590 T r200_set_safe_registers +ffffffff81de8000 T rv370_pcie_rreg +ffffffff81de8090 T rv370_pcie_wreg +ffffffff81de8100 T rv370_pcie_gart_tlb_flush +ffffffff81de8390 T rv370_pcie_gart_get_page_entry +ffffffff81de83f0 T rv370_pcie_gart_set_page +ffffffff81de8430 T rv370_pcie_gart_init +ffffffff81de8510 T rv370_pcie_gart_enable +ffffffff81de8950 T rv370_pcie_gart_disable +ffffffff81de8b40 T rv370_pcie_gart_fini +ffffffff81de8b80 T r300_fence_ring_emit +ffffffff81de9190 T r300_ring_start +ffffffff81de9c30 T r300_mc_wait_for_idle +ffffffff81de9cd0 T r300_asic_reset +ffffffff81de9f30 T r300_mc_init +ffffffff81dea000 T rv370_set_pcie_lanes +ffffffff81dea220 T rv370_get_pcie_lanes +ffffffff81dea2e0 T r300_cs_parse +ffffffff81dea6b0 t r300_packet0_check +ffffffff81deb610 T r300_set_reg_safe +ffffffff81deb650 T r300_mc_program +ffffffff81deb800 T r300_clock_startup +ffffffff81deb890 T r300_resume +ffffffff81debab0 t r300_startup +ffffffff81debea0 T r300_suspend +ffffffff81debf50 T r300_fini +ffffffff81dec0b0 T r300_init +ffffffff81ded000 T r420_pm_init_profile +ffffffff81ded0f0 T r420_pipes_init +ffffffff81ded2f0 T r420_mc_rreg +ffffffff81ded380 T r420_mc_wreg +ffffffff81ded400 T r420_resume +ffffffff81ded620 t r420_startup +ffffffff81ded8b0 T r420_suspend +ffffffff81dedaa0 T r420_fini +ffffffff81dedbf0 T r420_init +ffffffff81dedf50 T r420_debugfs_pipes_info_init +ffffffff81dedf80 t r420_cp_errata_init +ffffffff81def000 T r520_mc_wait_for_idle +ffffffff81def0b0 T r520_resume +ffffffff81def1e0 t r520_startup +ffffffff81def6b0 T r520_init +ffffffff81df0000 T r600_rcu_rreg +ffffffff81df00a0 T r600_rcu_wreg +ffffffff81df0120 T r600_uvd_ctx_rreg +ffffffff81df01c0 T r600_uvd_ctx_wreg +ffffffff81df0240 T r600_get_allowed_info_register +ffffffff81df02c0 T r600_get_xclk +ffffffff81df02f0 T r600_set_uvd_clocks +ffffffff81df0980 T dce3_program_fmt +ffffffff81df0ab0 T rv6xx_get_temp +ffffffff81df0b00 T r600_pm_get_dynpm_state +ffffffff81df0f10 T rs780_pm_init_profile +ffffffff81df1020 T r600_pm_init_profile +ffffffff81df12e0 T r600_pm_misc +ffffffff81df13d0 T r600_gui_idle +ffffffff81df1410 T r600_hpd_sense +ffffffff81df1530 T r600_hpd_set_polarity +ffffffff81df17b0 T r600_hpd_init +ffffffff81df1990 T r600_hpd_fini +ffffffff81df1b40 T r600_pcie_gart_tlb_flush +ffffffff81df1c80 T r600_pcie_gart_init +ffffffff81df1d30 T r600_mc_wait_for_idle +ffffffff81df1dd0 T rs780_mc_rreg +ffffffff81df1e80 T rs780_mc_wreg +ffffffff81df1f10 T r600_vram_scratch_init +ffffffff81df2030 t radeon_bo_reserve +ffffffff81df21d0 t radeon_bo_unreserve +ffffffff81df22e0 T r600_vram_scratch_fini +ffffffff81df2370 T r600_set_bios_scratch_engine_hung +ffffffff81df23c0 T r600_gpu_check_soft_reset +ffffffff81df2790 T r600_asic_reset +ffffffff81df2bc0 t r600_gpu_pci_config_reset +ffffffff81df2e20 T r600_gfx_is_lockup +ffffffff81df2ea0 T r6xx_remap_render_backend +ffffffff81df3070 T r600_count_pipe_bits +ffffffff81df30e0 T r600_pciep_rreg +ffffffff81df3170 T r600_pciep_wreg +ffffffff81df31e0 T r600_cp_stop +ffffffff81df3260 T r600_init_microcode +ffffffff81df3810 t request_firmware +ffffffff81df38c0 t release_firmware +ffffffff81df3900 T r600_gfx_get_rptr +ffffffff81df3960 T r600_gfx_get_wptr +ffffffff81df39a0 T r600_gfx_set_wptr +ffffffff81df39e0 T r600_cp_start +ffffffff81df3db0 T r600_cp_resume +ffffffff81df41d0 T r600_ring_init +ffffffff81df4290 T r600_cp_fini +ffffffff81df4320 T r600_scratch_init +ffffffff81df4390 T r600_ring_test +ffffffff81df46b0 T r600_fence_ring_emit +ffffffff81df5020 T r600_semaphore_ring_emit +ffffffff81df5240 T r600_copy_cpdma +ffffffff81df58b0 T r600_set_surface_reg +ffffffff81df58e0 T r600_clear_surface_reg +ffffffff81df5910 T r600_vga_set_state +ffffffff81df5970 T r600_resume +ffffffff81df5a20 t r600_startup +ffffffff81df7930 T r600_suspend +ffffffff81df7af0 T r600_irq_suspend +ffffffff81df7bd0 t r600_pcie_gart_disable +ffffffff81df7dd0 T r600_init +ffffffff81df86f0 T r600_ih_ring_init +ffffffff81df8760 T r600_irq_fini +ffffffff81df88e0 t r600_pcie_gart_fini +ffffffff81df8920 T r600_fini +ffffffff81df8b70 T r600_ring_ib_execute +ffffffff81df9060 T r600_ib_test +ffffffff81df9370 T r600_ih_ring_alloc +ffffffff81df94c0 T r600_ih_ring_fini +ffffffff81df9570 T r600_rlc_stop +ffffffff81df9780 T r600_disable_interrupts +ffffffff81df9830 T r600_irq_init +ffffffff81df9cd0 t r600_disable_interrupt_state +ffffffff81df9fd0 T r600_irq_disable +ffffffff81dfa0a0 T r600_irq_set +ffffffff81dfa8a0 t r600_irq_ack +ffffffff81dfadd0 T r600_irq_process +ffffffff81dfbb40 T r600_mmio_hdp_flush +ffffffff81dfbbc0 T r600_set_pcie_lanes +ffffffff81dfbd00 T r600_get_pcie_lanes +ffffffff81dfbdf0 T r600_get_gpu_clock_counter +ffffffff81dfbea0 t r600_cp_load_microcode +ffffffff81dfc200 t r600_uvd_resume +ffffffff81dfd000 T r600_fmt_is_valid_color +ffffffff81dfd040 T r600_fmt_is_valid_texture +ffffffff81dfd090 T r600_fmt_get_blocksize +ffffffff81dfd0d0 T r600_fmt_get_nblocksx +ffffffff81dfd120 T r600_fmt_get_nblocksy +ffffffff81dfd180 T r600_cs_common_vline_parse +ffffffff81dfd470 T r600_mip_minify +ffffffff81dfd4d0 T r600_cs_parse +ffffffff81dff540 T r600_dma_cs_next_reloc +ffffffff81dff5d0 T r600_dma_cs_parse +ffffffff81dffcb0 t r600_cs_track_check +ffffffff81e00e90 t r600_cs_check_reg +ffffffff81e01e70 t r600_is_safe_reg +ffffffff81e01f20 t r600_texture_size +ffffffff81e03000 T r600_dma_get_rptr +ffffffff81e03060 T r600_dma_get_wptr +ffffffff81e030a0 T r600_dma_set_wptr +ffffffff81e030e0 T r600_dma_stop +ffffffff81e03170 T r600_dma_resume +ffffffff81e03390 T r600_dma_fini +ffffffff81e03410 T r600_dma_is_lockup +ffffffff81e03490 T r600_dma_ring_test +ffffffff81e03750 T r600_dma_fence_ring_emit +ffffffff81e03960 T r600_dma_semaphore_ring_emit +ffffffff81e03aa0 T r600_dma_ib_test +ffffffff81e03d10 T r600_dma_ring_ib_execute +ffffffff81e040a0 T r600_copy_dma +ffffffff81e05000 T r600_dpm_print_class_info +ffffffff81e05340 T r600_dpm_print_cap_info +ffffffff81e053e0 T r600_dpm_print_ps_status +ffffffff81e054a0 T r600_dpm_get_vblank_time +ffffffff81e05560 T r600_dpm_get_vrefresh +ffffffff81e055f0 T r600_calculate_u_and_p +ffffffff81e05670 T r600_calculate_at +ffffffff81e05720 T r600_gfx_clockgating_enable +ffffffff81e05830 T r600_dynamicpm_enable +ffffffff81e05880 T r600_enable_thermal_protection +ffffffff81e058e0 T r600_enable_acpi_pm +ffffffff81e05930 T r600_enable_dynamic_pcie_gen2 +ffffffff81e05980 T r600_dynamicpm_enabled +ffffffff81e059c0 T r600_enable_sclk_control +ffffffff81e05a20 T r600_enable_mclk_control +ffffffff81e05a80 T r600_enable_spll_bypass +ffffffff81e05ad0 T r600_wait_for_spll_change +ffffffff81e05b60 T r600_set_bsp +ffffffff81e05ba0 T r600_set_at +ffffffff81e05c00 T r600_set_tc +ffffffff81e05c60 T r600_select_td +ffffffff81e05d10 T r600_set_vrc +ffffffff81e05d50 T r600_set_tpu +ffffffff81e05db0 T r600_set_tpc +ffffffff81e05e10 T r600_set_sstu +ffffffff81e05e70 T r600_set_sst +ffffffff81e05ec0 T r600_set_git +ffffffff81e05f10 T r600_set_fctu +ffffffff81e05f70 T r600_set_fct +ffffffff81e05fc0 T r600_set_ctxcgtt3d_rphc +ffffffff81e06020 T r600_set_ctxcgtt3d_rsdc +ffffffff81e06080 T r600_set_vddc3d_oorsu +ffffffff81e060e0 T r600_set_vddc3d_oorphc +ffffffff81e06140 T r600_set_vddc3d_oorsdc +ffffffff81e061a0 T r600_set_mpll_lock_time +ffffffff81e061f0 T r600_set_mpll_reset_time +ffffffff81e06240 T r600_engine_clock_entry_enable +ffffffff81e06340 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81e06440 T r600_engine_clock_entry_enable_post_divider +ffffffff81e06540 T r600_engine_clock_entry_set_post_divider +ffffffff81e06610 T r600_engine_clock_entry_set_reference_divider +ffffffff81e066e0 T r600_engine_clock_entry_set_feedback_divider +ffffffff81e067b0 T r600_engine_clock_entry_set_step_time +ffffffff81e06880 T r600_vid_rt_set_ssu +ffffffff81e068e0 T r600_vid_rt_set_vru +ffffffff81e06940 T r600_vid_rt_set_vrt +ffffffff81e069a0 T r600_voltage_control_enable_pins +ffffffff81e069f0 T r600_voltage_control_program_voltages +ffffffff81e06a80 T r600_voltage_control_deactivate_static_control +ffffffff81e06b10 T r600_power_level_enable +ffffffff81e06b80 T r600_power_level_set_voltage_index +ffffffff81e06bf0 T r600_power_level_set_mem_clock_index +ffffffff81e06c50 T r600_power_level_set_eng_clock_index +ffffffff81e06cc0 T r600_power_level_set_watermark_id +ffffffff81e06d30 T r600_power_level_set_pcie_gen2 +ffffffff81e06d90 T r600_power_level_get_current_index +ffffffff81e06dd0 T r600_power_level_get_target_index +ffffffff81e06e10 T r600_power_level_set_enter_index +ffffffff81e06e70 T r600_wait_for_power_level_unequal +ffffffff81e06f70 T r600_wait_for_power_level +ffffffff81e07070 T r600_start_dpm +ffffffff81e07360 T r600_stop_dpm +ffffffff81e073b0 T r600_dpm_pre_set_power_state +ffffffff81e073e0 T r600_dpm_post_set_power_state +ffffffff81e07410 T r600_is_uvd_state +ffffffff81e07450 T r600_is_internal_thermal_sensor +ffffffff81e07490 T r600_dpm_late_enable +ffffffff81e075a0 T r600_get_platform_caps +ffffffff81e07640 T r600_parse_extended_power_table +ffffffff81e08490 T r600_free_extended_power_table +ffffffff81e085f0 T r600_get_pcie_gen_support +ffffffff81e08640 T r600_get_pcie_lane_support +ffffffff81e086a0 T r600_encode_pci_lane_width +ffffffff81e09000 T r600_audio_update_hdmi +ffffffff81e09180 t r600_audio_status +ffffffff81e092a0 T r600_hdmi_buffer_status_changed +ffffffff81e09350 T r600_hdmi_update_audio_settings +ffffffff81e097c0 T r600_audio_enable +ffffffff81e09840 T r600_audio_get_pin +ffffffff81e09870 T r600_hdmi_update_acr +ffffffff81e09c90 T r600_set_avi_packet +ffffffff81e09ed0 T r600_hdmi_audio_workaround +ffffffff81e09fa0 T r600_hdmi_audio_set_dto +ffffffff81e0a060 T r600_set_vbi_packet +ffffffff81e0a120 T r600_set_audio_packet +ffffffff81e0a460 T r600_set_mute +ffffffff81e0a570 T r600_hdmi_enable +ffffffff81e0b000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81e0b040 T radeon_acpi_pcie_notify_device_ready +ffffffff81e0b170 T radeon_acpi_pcie_performance_request +ffffffff81e0b570 T radeon_acpi_init +ffffffff81e0bde0 t radeon_acpi_event +ffffffff81e0c160 T radeon_acpi_fini +ffffffff81e0d000 T radeon_agp_head_init +ffffffff81e0d050 T radeon_agp_init +ffffffff81e0d0b0 T radeon_agp_resume +ffffffff81e0d150 T radeon_agp_fini +ffffffff81e0d1a0 T radeon_agp_suspend +ffffffff81e0e000 T radeon_agp_disable +ffffffff81e0e130 T radeon_asic_init +ffffffff81e0e900 t radeon_invalid_rreg +ffffffff81e0e940 t radeon_invalid_wreg +ffffffff81e0e990 t radeon_invalid_get_allowed_info_register +ffffffff81e0f000 T radeon_atombios_i2c_init +ffffffff81e0f3b0 T radeon_atombios_lookup_gpio +ffffffff81e0f4c0 T radeon_get_atom_connector_info_from_object_table +ffffffff81e0fe70 t radeon_lookup_i2c_gpio +ffffffff81e10160 t radeon_atom_apply_quirks +ffffffff81e10590 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81e10af0 T radeon_atom_get_clock_info +ffffffff81e10ef0 T radeon_atombios_sideport_present +ffffffff81e10fb0 T radeon_atombios_get_tmds_info +ffffffff81e11100 T radeon_atombios_get_ppll_ss_info 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radeon_atom_set_voltage +ffffffff81e13940 T radeon_atom_get_max_vddc +ffffffff81e13a30 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81e13b20 T radeon_atom_get_leakage_id_from_vbios +ffffffff81e13bf0 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81e13e10 T radeon_atom_get_voltage_evv +ffffffff81e13ed0 T radeon_atom_get_voltage_gpio_settings +ffffffff81e13ff0 T radeon_atom_is_voltage_gpio +ffffffff81e141a0 T radeon_atom_get_svi2_info +ffffffff81e14290 T radeon_atom_get_max_voltage +ffffffff81e14420 T radeon_atom_get_min_voltage +ffffffff81e14580 T radeon_atom_get_voltage_step +ffffffff81e146a0 T radeon_atom_round_to_true_voltage +ffffffff81e14820 T radeon_atom_get_voltage_table +ffffffff81e14ac0 T radeon_atom_get_memory_info +ffffffff81e14c80 T radeon_atom_get_mclk_range_table +ffffffff81e14ed0 T radeon_atom_init_mc_reg_table +ffffffff81e15160 T radeon_atom_initialize_bios_scratch_regs +ffffffff81e15230 T radeon_save_bios_scratch_regs +ffffffff81e15310 T radeon_restore_bios_scratch_regs +ffffffff81e153f0 T radeon_atom_output_lock +ffffffff81e15480 T radeon_atombios_connected_scratch_regs +ffffffff81e15ce0 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81e15e30 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81e16060 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81e16240 t radeon_atombios_add_pplib_thermal_controller +ffffffff81e166c0 t radeon_atombios_parse_pplib_clock_info +ffffffff81e16a80 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81e17000 T radeon_audio_init +ffffffff81e17200 t radeon_audio_enable +ffffffff81e17360 T radeon_audio_endpoint_rreg +ffffffff81e173a0 T radeon_audio_endpoint_wreg +ffffffff81e173e0 T radeon_audio_get_pin +ffffffff81e17430 T radeon_audio_detect +ffffffff81e175d0 T radeon_audio_fini +ffffffff81e17660 T radeon_audio_mode_set +ffffffff81e176b0 T radeon_audio_dpms +ffffffff81e17700 T radeon_audio_decode_dfs_div +ffffffff81e17760 T radeon_audio_component_init +ffffffff81e177d0 T radeon_audio_component_fini +ffffffff81e17820 t radeon_audio_hdmi_mode_set +ffffffff81e17f80 t radeon_audio_write_speaker_allocation +ffffffff81e18060 t radeon_audio_write_sad_regs +ffffffff81e18160 t radeon_audio_set_avi_packet +ffffffff81e182c0 t radeon_audio_dp_mode_set +ffffffff81e18470 t radeon_audio_rreg +ffffffff81e184c0 t radeon_audio_wreg +ffffffff81e19000 T radeon_benchmark +ffffffff81e19c80 t radeon_benchmark_move +ffffffff81e19ff0 t radeon_bo_reserve +ffffffff81e1a190 t radeon_bo_unreserve +ffffffff81e1a2a0 t radeon_benchmark_do_move +ffffffff81e1b000 T radeon_get_bios +ffffffff81e1c0b0 t igp_read_bios_from_vram +ffffffff81e1c200 t radeon_read_bios +ffffffff81e1d000 T radeon_legacy_get_engine_clock +ffffffff81e1d0f0 T radeon_legacy_get_memory_clock +ffffffff81e1d1e0 T radeon_get_clock_info +ffffffff81e1d7f0 T radeon_legacy_set_engine_clock +ffffffff81e1dc30 T radeon_legacy_set_clock_gating +ffffffff81e20000 T radeon_combios_check_hardcoded_edid +ffffffff81e20120 t combios_get_table_offset +ffffffff81e20710 T radeon_bios_get_hardcoded_edid +ffffffff81e207b0 T radeon_combios_i2c_init +ffffffff81e20ea0 t combios_setup_i2c_bus +ffffffff81e21190 t radeon_combios_get_i2c_info_from_table +ffffffff81e213e0 T radeon_combios_get_clock_info +ffffffff81e215d0 T radeon_combios_sideport_present +ffffffff81e21650 T radeon_combios_get_primary_dac_info +ffffffff81e217a0 T radeon_combios_get_tv_info +ffffffff81e218b0 T radeon_combios_get_tv_dac_info +ffffffff81e21b70 T radeon_combios_get_lvds_info +ffffffff81e22220 T radeon_legacy_get_tmds_info_from_table +ffffffff81e222f0 T radeon_legacy_get_tmds_info_from_combios +ffffffff81e22520 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81e22760 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81e22ad0 T radeon_get_legacy_connector_info_from_table +ffffffff81e25060 T radeon_get_legacy_connector_info_from_bios +ffffffff81e25da0 T radeon_combios_get_power_modes +ffffffff81e264b0 T radeon_external_tmds_setup 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radeon_scratch_free +ffffffff81e32530 T radeon_doorbell_get +ffffffff81e325e0 T radeon_doorbell_free +ffffffff81e32630 T radeon_wb_disable +ffffffff81e32660 T radeon_wb_fini +ffffffff81e32720 t radeon_bo_reserve +ffffffff81e328c0 t radeon_bo_unreserve +ffffffff81e329d0 T radeon_wb_init +ffffffff81e32d60 T radeon_vram_location +ffffffff81e32ea0 T radeon_gtt_location +ffffffff81e32fe0 T radeon_device_is_virtual +ffffffff81e33010 T radeon_card_posted +ffffffff81e33250 T radeon_update_bandwidth_info +ffffffff81e332d0 T radeon_boot_test_post_card +ffffffff81e333c0 T radeon_dummy_page_init +ffffffff81e33490 T radeon_dummy_page_fini +ffffffff81e33500 T radeon_atombios_init +ffffffff81e336e0 t cail_reg_read +ffffffff81e33740 t cail_reg_write +ffffffff81e337a0 t cail_ioreg_read +ffffffff81e337c0 t cail_ioreg_write +ffffffff81e337e0 t cail_mc_read +ffffffff81e33810 t cail_mc_write +ffffffff81e33840 t cail_pll_read +ffffffff81e33870 t cail_pll_write +ffffffff81e338a0 T radeon_atombios_fini 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radeon_encoder_set_active_device +ffffffff81e3e450 T radeon_get_connector_for_encoder +ffffffff81e3e4c0 T radeon_get_connector_for_encoder_init +ffffffff81e3e530 T radeon_get_external_encoder +ffffffff81e3e5c0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81e3e660 T radeon_panel_mode_fixup +ffffffff81e3e830 T radeon_dig_monitor_is_duallink +ffffffff81e3e960 T radeon_encoder_is_digital +ffffffff81e3f000 T radeon_fbdev_setup +ffffffff81e3f180 T radeon_fbdev_set_suspend +ffffffff81e3f1d0 T radeon_fbdev_robj_is_fb +ffffffff81e3f250 T radeondrm_burner +ffffffff81e3f2e0 T radeondrm_burner_cb +ffffffff81e3f310 t radeon_fbdev_fb_helper_fb_probe +ffffffff81e3f980 t radeon_bo_reserve +ffffffff81e3fb20 t radeon_bo_unreserve +ffffffff81e3fc30 t radeon_fbdev_client_unregister +ffffffff81e3fca0 t radeon_fbdev_client_restore +ffffffff81e3fcf0 t radeon_fbdev_client_hotplug +ffffffff81e40000 T radeon_fence_emit +ffffffff81e40140 T radeon_fence_process +ffffffff81e40220 t radeon_fence_activity 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T radeon_ib_get +ffffffff81e49120 T radeon_ib_free +ffffffff81e49170 T radeon_ib_schedule +ffffffff81e49470 T radeon_ib_pool_init +ffffffff81e49520 T radeon_ib_pool_fini +ffffffff81e495a0 T radeon_ib_ring_tests +ffffffff81e4a000 T radeon_driver_irq_handler_kms +ffffffff81e4a050 T radeon_msi_ok +ffffffff81e4a150 T radeon_irq_kms_init +ffffffff81e4a440 t radeon_hotplug_work_func +ffffffff81e4a510 t radeon_dp_work_func +ffffffff81e4a590 T radeon_irq_kms_fini +ffffffff81e4a740 T radeon_irq_kms_sw_irq_get +ffffffff81e4a7f0 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81e4a830 T radeon_irq_kms_sw_irq_put +ffffffff81e4a8d0 T radeon_irq_kms_pflip_irq_get +ffffffff81e4a990 T radeon_irq_kms_pflip_irq_put +ffffffff81e4aa40 T radeon_irq_kms_enable_afmt +ffffffff81e4aae0 T radeon_irq_kms_disable_afmt +ffffffff81e4ab80 T radeon_irq_kms_enable_hpd +ffffffff81e4ac80 T radeon_irq_kms_disable_hpd +ffffffff81e4ad70 T radeon_irq_kms_set_irq_n_enabled +ffffffff81e4af00 t __delayed_work_tick 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radeon_sync_free +ffffffff81e60000 T radeon_test_moves +ffffffff81e60080 t radeon_do_test_moves +ffffffff81e607e0 T radeon_test_ring_sync +ffffffff81e60b90 t radeon_test_create_and_emit_fence +ffffffff81e60d60 T radeon_test_syncing +ffffffff81e610c0 t radeon_test_ring_sync2 +ffffffff81e61530 t radeon_bo_reserve +ffffffff81e616d0 t radeon_bo_unreserve +ffffffff81e62000 T radeon_get_rdev +ffffffff81e62030 T radeon_ttm_tt_set_userptr +ffffffff81e62090 T radeon_ttm_tt_is_bound +ffffffff81e620e0 T radeon_ttm_tt_has_userptr +ffffffff81e62130 T radeon_ttm_tt_is_readonly +ffffffff81e62180 T radeon_ttm_init +ffffffff81e62410 T radeon_ttm_set_active_vram_size +ffffffff81e62450 t radeon_bo_reserve +ffffffff81e625f0 t radeon_bo_unreserve +ffffffff81e62700 T radeon_ttm_fini +ffffffff81e62810 t radeon_ttm_tt_create +ffffffff81e62900 t radeon_ttm_tt_populate +ffffffff81e629c0 t radeon_ttm_tt_unpopulate +ffffffff81e62ad0 t radeon_ttm_tt_destroy +ffffffff81e62b20 t radeon_evict_flags +ffffffff81e62c80 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rv730_populate_smc_acpi_state +ffffffff81e857d0 T rv730_populate_smc_initial_state +ffffffff81e859d0 T rv730_program_memory_timing_parameters +ffffffff81e85bf0 T rv730_start_dpm +ffffffff81e85c80 T rv730_stop_dpm +ffffffff81e85d50 T rv730_program_dcodt +ffffffff81e85e20 T rv730_get_odt_values +ffffffff81e86000 T rv740_get_decoded_reference_divider +ffffffff81e860b0 T rv740_get_dll_speed +ffffffff81e862c0 T rv740_populate_sclk_value +ffffffff81e864e0 T rv740_populate_mclk_value +ffffffff81e868c0 T rv740_read_clock_registers +ffffffff81e86a00 T rv740_populate_smc_acpi_state +ffffffff81e86c70 T rv740_enable_mclk_spread_spectrum +ffffffff81e86cc0 T rv740_get_mclk_frequency_ratio +ffffffff81e87000 T rv770_set_uvd_clocks +ffffffff81e876a0 T rv770_get_xclk +ffffffff81e87700 T rv770_page_flip +ffffffff81e87a60 T rv770_page_flip_pending +ffffffff81e87ae0 T rv770_get_temp +ffffffff81e87b40 T rv770_pm_misc +ffffffff81e87c30 T r700_cp_stop +ffffffff81e87cb0 T r700_cp_fini +ffffffff81e87d40 T rv770_set_clk_bypass_mode +ffffffff81e87e60 T r700_vram_gtt_location +ffffffff81e88010 T rv770_resume +ffffffff81e880d0 t rv770_init_golden_registers +ffffffff81e882d0 t rv770_startup +ffffffff81e8a0d0 T rv770_suspend +ffffffff81e8a330 T rv770_init +ffffffff81e8a860 t rv770_pcie_gart_fini +ffffffff81e8a9f0 T rv770_fini +ffffffff81e8ad40 t rv770_uvd_start +ffffffff81e8ae20 t rv770_cp_load_microcode +ffffffff81e8b170 t rv770_uvd_resume +ffffffff81e8c000 T rv770_copy_dma +ffffffff81e8d000 T rv770_get_ps +ffffffff81e8d030 T rv770_get_pi +ffffffff81e8d060 T evergreen_get_pi +ffffffff81e8d090 T rv770_restore_cgcg +ffffffff81e8d110 T rv770_stop_dpm +ffffffff81e8d1e0 T rv770_dpm_enabled +ffffffff81e8d220 T rv770_enable_thermal_protection +ffffffff81e8d280 T rv770_enable_acpi_pm +ffffffff81e8d2d0 T rv770_get_seq_value +ffffffff81e8d310 T rv770_write_smc_soft_register +ffffffff81e8d340 T rv770_populate_smc_t +ffffffff81e8d4e0 T rv770_populate_smc_sp +ffffffff81e8d540 T rv770_map_clkf_to_ibias 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rv770_restrict_performance_levels_before_switch +ffffffff81e8deb0 T rv770_dpm_force_performance_level +ffffffff81e8df90 T r7xx_start_smc +ffffffff81e8dfc0 T r7xx_stop_smc +ffffffff81e8dff0 T rv770_read_voltage_smio_registers +ffffffff81e8e030 T rv770_reset_smio_status +ffffffff81e8e0f0 T rv770_get_memory_type +ffffffff81e8e140 T rv770_get_pcie_gen2_status +ffffffff81e8e1c0 T rv770_get_max_vddc +ffffffff81e8e230 T rv770_program_response_times +ffffffff81e8e3b0 T rv770_enable_auto_throttle_source +ffffffff81e8e530 T rv770_dpm_enable +ffffffff81e8f6e0 T rv770_dpm_late_enable +ffffffff81e8f830 T rv770_dpm_disable +ffffffff81e8fbd0 T rv770_dpm_set_power_state +ffffffff81e90340 t rv770_program_dcodt_after_state_switch +ffffffff81e903c0 T rv770_dpm_setup_asic +ffffffff81e90790 T rv770_dpm_display_configuration_changed +ffffffff81e90810 T rv7xx_parse_power_table +ffffffff81e90dc0 T rv770_get_engine_memory_ss +ffffffff81e90e60 T rv770_dpm_init +ffffffff81e910f0 T rv770_dpm_print_power_state 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si_suspend +ffffffff81e9bdc0 t si_fini_cg +ffffffff81e9be80 T si_init +ffffffff81e9d5b0 t si_cp_fini +ffffffff81e9d6e0 t si_irq_fini +ffffffff81e9d7d0 t si_pcie_gart_fini +ffffffff81e9d8e0 T si_fini +ffffffff81e9dbc0 T si_get_gpu_clock_counter +ffffffff81e9dc90 T si_set_uvd_clocks +ffffffff81e9e320 T si_set_vce_clocks +ffffffff81e9eac0 t si_vce_send_vcepll_ctlreq +ffffffff81e9ee00 t dce6_latency_watermark +ffffffff81e9f040 t si_rlc_stop +ffffffff81e9f220 t si_vm_reg_valid +ffffffff81e9f390 t si_vm_packet3_cp_dma_check +ffffffff81e9f530 t si_uvd_start +ffffffff81e9f610 t si_vce_start +ffffffff81e9f760 t si_irq_init +ffffffff81ea0290 t si_cp_load_microcode +ffffffff81ea0690 t si_cp_resume +ffffffff81ea16c0 t si_uvd_resume +ffffffff81ea17a0 t si_vce_resume +ffffffff81ea18b0 t pcie_capability_set_word +ffffffff81ea19e0 t pcie_capability_read_word +ffffffff81ea1a90 t pcie_capability_clear_and_set_word +ffffffff81ea1bd0 t pcie_capability_write_word +ffffffff81ea1ca0 t si_update_cg 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si_populate_mc_reg_table +ffffffff81ea7af0 t si_initialize_smc_cac_tables +ffffffff81ea9770 t si_initialize_hardware_cac_manager +ffffffff81ea9840 t si_initialize_smc_dte_tables +ffffffff81ea9b60 t si_populate_smc_tdp_limits +ffffffff81ea9d90 t si_populate_smc_tdp_limits_2 +ffffffff81ea9e80 t si_program_response_times +ffffffff81ea9fd0 t si_program_ds_registers +ffffffff81eaa070 t si_dpm_start_smc +ffffffff81eaa0b0 t si_enable_auto_throttle_source +ffffffff81eaa260 t si_thermal_start_thermal_controller +ffffffff81eaa770 T si_dpm_late_enable +ffffffff81eaa8d0 T si_dpm_disable +ffffffff81eaace0 t si_enable_power_containment +ffffffff81eaadd0 t si_enable_smc_cac +ffffffff81eaaf70 T si_dpm_pre_set_power_state +ffffffff81eabb60 T si_dpm_set_power_state +ffffffff81eac1e0 t si_halt_smc +ffffffff81eac250 t si_upload_sw_state +ffffffff81eacc60 t si_upload_smc_data +ffffffff81eacdb0 t si_upload_ulv_state +ffffffff81eacf10 t si_upload_mc_reg_table +ffffffff81ead180 t si_set_pcie_lane_width_in_smc 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si_stop_smc_clock +ffffffff81eb1360 T si_start_smc_clock +ffffffff81eb13a0 T si_is_smc_running +ffffffff81eb1410 T si_send_msg_to_smc +ffffffff81eb1500 T si_wait_for_smc_inactive +ffffffff81eb15c0 T si_load_smc_ucode +ffffffff81eb1780 T si_read_smc_sram_dword +ffffffff81eb1870 T si_write_smc_sram_dword +ffffffff81eb2000 T sumo_get_pi +ffffffff81eb2030 T sumo_gfx_clockgating_initialize +ffffffff81eb2130 T sumo_program_vc +ffffffff81eb2170 T sumo_clear_vc +ffffffff81eb21b0 T sumo_program_sstp +ffffffff81eb2240 T sumo_take_smu_control +ffffffff81eb2270 T sumo_get_sleep_divider_from_id +ffffffff81eb22a0 T sumo_get_sleep_divider_id_from_clock +ffffffff81eb2350 T sumo_dpm_enable +ffffffff81eb2a40 T sumo_dpm_late_enable +ffffffff81eb3110 T sumo_dpm_disable +ffffffff81eb3480 T sumo_dpm_pre_set_power_state +ffffffff81eb3970 T sumo_dpm_set_power_state +ffffffff81eb44d0 T sumo_dpm_post_set_power_state +ffffffff81eb4570 T sumo_dpm_setup_asic +ffffffff81eb4690 T sumo_dpm_display_configuration_changed +ffffffff81eb46c0 T sumo_convert_vid2_to_vid7 +ffffffff81eb4710 T sumo_construct_sclk_voltage_mapping_table +ffffffff81eb47d0 T sumo_construct_vid_mapping_table +ffffffff81eb4960 T sumo_dpm_init +ffffffff81eb5260 T sumo_dpm_print_power_state +ffffffff81eb5390 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81eb53c0 T sumo_dpm_get_current_sclk +ffffffff81eb5430 T sumo_dpm_get_current_mclk +ffffffff81eb5460 T sumo_dpm_get_current_vddc +ffffffff81eb5530 T sumo_dpm_fini +ffffffff81eb55d0 T sumo_dpm_get_sclk +ffffffff81eb5620 T sumo_dpm_get_mclk +ffffffff81eb5650 T sumo_dpm_force_performance_level +ffffffff81eb5ad0 t sumo_power_level_enable +ffffffff81eb5d20 t sumo_program_power_level +ffffffff81eb7000 T sumo_initialize_m3_arb +ffffffff81eb73c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81eb7470 t sumo_send_msg_to_smu +ffffffff81eb7640 T sumo_smu_pg_init +ffffffff81eb7660 T sumo_enable_boost_timer +ffffffff81eb77e0 T sumo_set_tdp_limit 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aldebaran_mode2_reset +ffffffff81ec6000 T aldebaran_reg_base_init +ffffffff81ec7000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81ec7040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81ec7070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81ec7190 T amdgpu_acpi_pcie_performance_request +ffffffff81ec7580 T amdgpu_acpi_power_shift_control +ffffffff81ec76f0 T amdgpu_acpi_smart_shift_update +ffffffff81ec77a0 T amdgpu_acpi_get_tmr_info +ffffffff81ec7830 T amdgpu_acpi_get_mem_info +ffffffff81ec78f0 T amdgpu_acpi_init +ffffffff81ec79b0 t amdgpu_acpi_event +ffffffff81ec7d30 T amdgpu_acpi_get_backlight_caps +ffffffff81ec7d80 T amdgpu_acpi_fini +ffffffff81ec7da0 T amdgpu_acpi_should_gpu_reset +ffffffff81ec7e00 T amdgpu_acpi_is_s3_active +ffffffff81ec7e40 T amdgpu_acpi_detect +ffffffff81ec8900 T amdgpu_acpi_release +ffffffff81ec8aa0 T amdgpu_acpi_is_s0ix_active +ffffffff81ec8af0 T amdgpu_choose_low_power_state +ffffffff81ec9000 T amdgpu_afmt_acr +ffffffff81eca000 T amdgpu_amdkfd_init +ffffffff81eca040 T amdgpu_amdkfd_fini +ffffffff81eca070 T amdgpu_amdkfd_device_probe +ffffffff81eca0a0 T amdgpu_amdkfd_device_init +ffffffff81eca260 t amdgpu_amdkfd_reset_work +ffffffff81eca2f0 T amdgpu_amdkfd_device_fini_sw +ffffffff81eca340 T amdgpu_amdkfd_interrupt +ffffffff81eca370 T amdgpu_amdkfd_suspend +ffffffff81eca3a0 T amdgpu_amdkfd_resume +ffffffff81eca3d0 T amdgpu_amdkfd_pre_reset +ffffffff81eca400 T amdgpu_amdkfd_post_reset +ffffffff81eca430 T amdgpu_amdkfd_gpu_reset +ffffffff81eca4a0 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81eca7c0 t amdgpu_bo_reserve +ffffffff81eca950 t amdgpu_bo_unreserve +ffffffff81ecaa60 T amdgpu_amdkfd_free_gtt_mem +ffffffff81ecab00 T amdgpu_amdkfd_alloc_gws +ffffffff81ecac00 T amdgpu_amdkfd_free_gws +ffffffff81ecac50 T amdgpu_amdkfd_get_fw_version +ffffffff81ecad00 T amdgpu_amdkfd_get_local_mem_info +ffffffff81ecaeb0 T amdgpu_amdkfd_xcp_memory_size +ffffffff81ecaf50 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81ecaf90 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81ecb000 T amdgpu_amdkfd_get_cu_info +ffffffff81ecb120 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81ecb270 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81ecb2f0 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81ecb390 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81ecb510 T amdgpu_amdkfd_submit_ib +ffffffff81ecb6b0 T amdgpu_amdkfd_set_compute_idle +ffffffff81ecb700 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81ecb740 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81ecb880 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81ecb8c0 T amdgpu_amdkfd_have_atomics_support +ffffffff81ecb8f0 T amdgpu_amdkfd_debug_mem_fence +ffffffff81ecb910 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81ecb920 T amdgpu_amdkfd_send_close_event_drain_irq +ffffffff81ecb940 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81ecb990 T amdgpu_amdkfd_check_and_lock_kfd +ffffffff81ecb9c0 T amdgpu_amdkfd_unlock_kfd +ffffffff81ecb9f0 T amdgpu_amdkfd_unmap_hiq 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atom_op_repeat +ffffffff81ecef30 t atom_op_clear +ffffffff81ecf060 t atom_op_nop +ffffffff81ecf090 t atom_op_eot +ffffffff81ecf0c0 t atom_op_mask +ffffffff81ecf3e0 t atom_op_postcard +ffffffff81ecf4a0 t atom_op_beep +ffffffff81ecf4c0 t atom_op_savereg +ffffffff81ecf4f0 t atom_op_restorereg +ffffffff81ecf520 t atom_op_setdatablock +ffffffff81ecf690 t atom_op_xor +ffffffff81ecf8b0 t atom_op_shl +ffffffff81ecfb20 t atom_op_shr +ffffffff81ecfd90 t atom_op_debug +ffffffff81ecfe50 t atom_op_processds +ffffffff81ecff30 t atom_op_mul32 +ffffffff81ed00d0 t atom_op_div32 +ffffffff81ed02a0 t atom_put_dst +ffffffff81ed07f0 t atom_get_src_int +ffffffff81ed0ed0 t atom_iio_execute +ffffffff81ed2000 T amdgpu_atombios_lookup_i2c_gpio +ffffffff81ed2270 T amdgpu_atombios_i2c_init +ffffffff81ed2550 T amdgpu_atombios_lookup_gpio +ffffffff81ed2660 T amdgpu_atombios_has_dce_engine_info +ffffffff81ed26f0 T amdgpu_atombios_get_connector_info_from_object_table +ffffffff81ed2fa0 T amdgpu_atombios_get_clock_info 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amdgpu_xgmi_remove_device +ffffffff81f76670 T amdgpu_xgmi_get_relative_phy_addr +ffffffff81f766b0 t amdgpu_ras_error_inject_xgmi +ffffffff81f76860 t amdgpu_xgmi_query_ras_error_count +ffffffff81f76fd0 t amdgpu_xgmi_reset_ras_error_count +ffffffff81f773e0 t amdgpu_xgmi_ras_late_init +ffffffff81f77470 T amdgpu_xgmi_ras_sw_init +ffffffff81f78000 T aqua_vanjaram_doorbell_index_init +ffffffff81f78120 T aqua_vanjaram_ip_map_init +ffffffff81f782d0 t aqua_vanjaram_logical_to_dev_inst +ffffffff81f78330 t aqua_vanjaram_logical_to_dev_mask +ffffffff81f783f0 T aqua_vanjaram_encode_ext_smn_addressing +ffffffff81f78430 t aqua_vanjaram_switch_partition_mode +ffffffff81f78880 t aqua_vanjaram_query_partition_mode +ffffffff81f788d0 t aqua_vanjaram_get_xcp_ip_details +ffffffff81f78a80 t aqua_vanjaram_get_xcp_mem_id +ffffffff81f78ba0 t aqua_vanjaram_select_scheds +ffffffff81f78d40 t aqua_vanjaram_update_partition_sched_list +ffffffff81f792b0 T aqua_vanjaram_init_soc_config +ffffffff81f7a000 T arct_reg_base_init +ffffffff81f7b000 T athub_v1_0_set_clockgating +ffffffff81f7b250 T athub_v1_0_get_clockgating +ffffffff81f7c000 T athub_v2_0_set_clockgating +ffffffff81f7c210 T athub_v2_0_get_clockgating +ffffffff81f7d000 T athub_v2_1_set_clockgating +ffffffff81f7d220 T athub_v2_1_get_clockgating +ffffffff81f7e000 T athub_v3_0_set_clockgating +ffffffff81f7e0e0 T athub_v3_0_get_clockgating +ffffffff81f7e140 t athub_v3_0_get_cg_cntl +ffffffff81f7e1e0 t athub_v3_0_set_cg_cntl +ffffffff81f7f000 t cz_ih_early_init +ffffffff81f7f050 t cz_ih_sw_init +ffffffff81f7f0c0 t cz_ih_sw_fini +ffffffff81f7f120 t cz_ih_hw_init +ffffffff81f7f410 t cz_ih_hw_fini +ffffffff81f7f520 t cz_ih_suspend +ffffffff81f7f630 t cz_ih_resume +ffffffff81f7f670 t cz_ih_is_idle +ffffffff81f7f6c0 t cz_ih_wait_for_idle +ffffffff81f7f770 t cz_ih_soft_reset +ffffffff81f7f890 t cz_ih_set_clockgating_state +ffffffff81f7f8c0 t cz_ih_set_powergating_state +ffffffff81f7f8f0 t cz_ih_get_wptr +ffffffff81f7fa20 t cz_ih_decode_iv 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t dce_v10_0_crtc_get_scanoutpos +ffffffff81f820d0 t dce_v10_0_encoder_add +ffffffff81f82360 t dce_v10_0_latency_watermark +ffffffff81f82590 t dce_v10_0_encoder_destroy +ffffffff81f82600 t dce_v10_0_encoder_prepare +ffffffff81f82840 t dce_v10_0_encoder_commit +ffffffff81f82880 t dce_v10_0_encoder_mode_set +ffffffff81f83b40 t dce_v10_0_encoder_disable +ffffffff81f83c70 t dce_v10_0_ext_dpms +ffffffff81f83ca0 t dce_v10_0_ext_prepare +ffffffff81f83cd0 t dce_v10_0_ext_commit +ffffffff81f83d00 t dce_v10_0_ext_mode_set +ffffffff81f83d30 t dce_v10_0_ext_disable +ffffffff81f83d60 t dce_v10_0_set_crtc_irq_state +ffffffff81f83e60 t dce_v10_0_crtc_irq +ffffffff81f84100 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81f841e0 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81f842c0 t dce_v10_0_set_pageflip_irq_state +ffffffff81f84380 t dce_v10_0_pageflip_irq +ffffffff81f84530 t dce_v10_0_set_hpd_irq_state +ffffffff81f84620 t dce_v10_0_hpd_irq +ffffffff81f84770 t dce_v10_0_afmt_init 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dce_v10_0_is_display_hung +ffffffff81f87000 T dce_v11_0_disable_dce +ffffffff81f871c0 t dce_v11_0_early_init +ffffffff81f872f0 t dce_v11_0_sw_init +ffffffff81f876c0 t dce_v11_0_sw_fini +ffffffff81f87820 t dce_v11_0_hw_init +ffffffff81f87cd0 t dce_v11_0_hw_fini +ffffffff81f87ec0 t dce_v11_0_suspend +ffffffff81f87f40 t dce_v11_0_resume +ffffffff81f87fd0 t dce_v11_0_is_idle +ffffffff81f88000 t dce_v11_0_wait_for_idle +ffffffff81f88030 t dce_v11_0_soft_reset +ffffffff81f88290 t dce_v11_0_set_clockgating_state +ffffffff81f882c0 t dce_v11_0_set_powergating_state +ffffffff81f882f0 t dce_v11_0_audio_endpt_rreg +ffffffff81f883b0 t dce_v11_0_audio_endpt_wreg +ffffffff81f88440 t dce_v11_0_bandwidth_update +ffffffff81f88f90 t dce_v11_0_vblank_get_counter +ffffffff81f88fe0 t dce_v11_0_hpd_sense +ffffffff81f89040 t dce_v11_0_hpd_set_polarity +ffffffff81f89120 t dce_v11_0_hpd_get_gpio_reg +ffffffff81f89150 t dce_v11_0_page_flip +ffffffff81f89280 t dce_v11_0_crtc_get_scanoutpos +ffffffff81f89330 t dce_v11_0_encoder_add +ffffffff81f895c0 t dce_v11_0_latency_watermark +ffffffff81f897f0 t dce_v11_0_encoder_destroy +ffffffff81f89860 t dce_v11_0_encoder_prepare +ffffffff81f89aa0 t dce_v11_0_encoder_commit +ffffffff81f89ae0 t dce_v11_0_encoder_mode_set +ffffffff81f8ada0 t dce_v11_0_encoder_disable +ffffffff81f8aed0 t dce_v11_0_ext_dpms +ffffffff81f8af00 t dce_v11_0_ext_prepare +ffffffff81f8af30 t dce_v11_0_ext_commit +ffffffff81f8af60 t dce_v11_0_ext_mode_set +ffffffff81f8af90 t dce_v11_0_ext_disable +ffffffff81f8afc0 t dce_v11_0_set_crtc_irq_state +ffffffff81f8b0c0 t dce_v11_0_crtc_irq +ffffffff81f8b340 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81f8b420 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81f8b500 t dce_v11_0_set_pageflip_irq_state +ffffffff81f8b5c0 t dce_v11_0_pageflip_irq +ffffffff81f8b770 t dce_v11_0_set_hpd_irq_state +ffffffff81f8b860 t dce_v11_0_hpd_irq +ffffffff81f8b9b0 t dce_v11_0_afmt_init +ffffffff81f8bae0 t dce_v11_0_audio_init +ffffffff81f8bbf0 t INIT_DELAYED_WORK +ffffffff81f8bc40 t dce_v11_0_crtc_cursor_set2 +ffffffff81f8bfa0 t dce_v11_0_crtc_cursor_move +ffffffff81f8c0a0 t dce_v11_0_crtc_gamma_set +ffffffff81f8c0f0 t dce_v11_0_crtc_destroy +ffffffff81f8c130 t amdgpu_bo_reserve +ffffffff81f8c370 t amdgpu_bo_unreserve +ffffffff81f8c480 t dce_v11_0_lock_cursor +ffffffff81f8c4f0 t dce_v11_0_cursor_move_locked +ffffffff81f8c660 t dce_v11_0_show_cursor +ffffffff81f8c710 t dce_v11_0_crtc_load_lut +ffffffff81f8cb60 t dce_v11_0_crtc_dpms +ffffffff81f8cdd0 t dce_v11_0_crtc_prepare +ffffffff81f8ce20 t dce_v11_0_crtc_commit +ffffffff81f8ce60 t dce_v11_0_crtc_mode_fixup +ffffffff81f8d150 t dce_v11_0_crtc_mode_set +ffffffff81f8d430 t dce_v11_0_crtc_set_base +ffffffff81f8d450 t dce_v11_0_crtc_set_base_atomic +ffffffff81f8d470 t dce_v11_0_crtc_disable +ffffffff81f8d650 t dce_v11_0_crtc_do_set_base +ffffffff81f8de80 t __delayed_work_tick +ffffffff81f8e000 t df_v1_7_sw_init +ffffffff81f8e040 t df_v1_7_sw_fini +ffffffff81f8e070 t df_v1_7_enable_broadcast_mode +ffffffff81f8e1a0 t df_v1_7_get_fb_channel_number +ffffffff81f8e240 t df_v1_7_get_hbm_channel_number +ffffffff81f8e2a0 t df_v1_7_update_medium_grain_clock_gating +ffffffff81f8e450 t df_v1_7_get_clockgating_state +ffffffff81f8e4f0 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81f8f000 t df_v3_6_sw_init +ffffffff81f8f160 t df_v3_6_sw_fini +ffffffff81f8f190 t df_v3_6_enable_broadcast_mode +ffffffff81f8f2c0 t df_v3_6_get_fb_channel_number +ffffffff81f8f3c0 t df_v3_6_get_hbm_channel_number +ffffffff81f8f420 t df_v3_6_update_medium_grain_clock_gating +ffffffff81f8f5f0 t df_v3_6_get_clockgating_state +ffffffff81f8f690 t df_v3_6_pmc_start +ffffffff81f8fa20 t df_v3_6_pmc_stop +ffffffff81f8fd60 t df_v3_6_pmc_get_count +ffffffff81f8ff40 t df_v3_6_get_fica +ffffffff81f90090 t df_v3_6_set_fica +ffffffff81f901c0 t df_v3_6_query_ras_poison_mode +ffffffff81f91000 t df_v4_3_query_ras_poison_mode +ffffffff81f92000 T dimgrey_cavefish_reg_base_init +ffffffff81f93000 T emu_soc_asic_init +ffffffff81f94000 t gfx_v10_0_early_init +ffffffff81f94920 t gfx_v10_0_late_init +ffffffff81f94990 t gfx_v10_0_sw_init +ffffffff81f94f50 t gfx_v10_0_sw_fini +ffffffff81f95210 t gfx_v10_0_hw_init +ffffffff81f983f0 t gfx_v10_0_hw_fini +ffffffff81f98500 t gfx_v10_0_suspend +ffffffff81f98540 t gfx_v10_0_resume +ffffffff81f98550 t gfx_v10_0_is_idle +ffffffff81f985f0 t gfx_v10_0_wait_for_idle +ffffffff81f98700 t gfx_v10_0_soft_reset +ffffffff81f98ae0 t gfx_v10_0_set_clockgating_state +ffffffff81f98e60 t gfx_v10_0_set_powergating_state +ffffffff81f98f30 t gfx_v10_0_get_clockgating_state +ffffffff81f99080 t gfx_v10_0_get_gpu_clock_counter +ffffffff81f99600 t gfx_v10_0_select_se_sh +ffffffff81f996a0 t gfx_v10_0_read_wave_data +ffffffff81f99990 t gfx_v10_0_read_wave_vgprs +ffffffff81f999c0 t gfx_v10_0_read_wave_sgprs +ffffffff81f99a40 t gfx_v10_0_select_me_pipe_q +ffffffff81f99a60 t gfx_v10_0_init_spm_golden_registers +ffffffff81f99ad0 t gfx_v10_0_update_perfmon_mgcg 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gfx_v10_0_ring_set_wptr_gfx +ffffffff81f9caf0 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81f9d1e0 t gfx_v10_0_ring_emit_fence +ffffffff81f9d600 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81f9d670 t gfx_v10_0_ring_emit_vm_flush +ffffffff81f9d860 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81f9d950 t gfx_v10_0_ring_emit_gds_switch +ffffffff81f9da50 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81f9dca0 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81f9dd60 t gfx_v10_0_ring_emit_sb +ffffffff81f9de50 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81f9e380 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81f9e490 t gfx_v10_0_ring_soft_recovery +ffffffff81f9e500 t gfx_v10_0_ring_preempt_ib +ffffffff81f9e6b0 t gfx_v10_0_emit_mem_sync +ffffffff81f9ea20 t gfx_v10_0_write_data_to_reg +ffffffff81f9ec50 t gfx_v10_0_set_eop_interrupt_state +ffffffff81f9ed50 t gfx_v10_0_eop_irq +ffffffff81f9ef30 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81f9f0f0 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81f9f2d0 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81f9f640 t gfx_v10_0_kiq_irq +ffffffff81f9f6d0 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81f9f820 t gfx_v10_0_priv_reg_irq +ffffffff81f9f890 t gfx_v10_0_handle_priv_fault +ffffffff81f9fa00 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81f9fb50 t gfx_v10_0_priv_inst_irq +ffffffff81f9fbc0 t gfx_v10_0_is_rlc_enabled +ffffffff81f9fc60 t gfx_v10_0_set_safe_mode +ffffffff81f9ff60 t gfx_v10_0_unset_safe_mode +ffffffff81fa0010 t gfx_v10_0_rlc_init +ffffffff81fa0030 t gfx_v10_0_get_csb_size +ffffffff81fa0060 t gfx_v10_0_get_csb_buffer +ffffffff81fa01d0 t gfx_v10_0_rlc_resume +ffffffff81fa0d90 t gfx_v10_0_rlc_stop +ffffffff81fa0e70 t gfx_v10_0_rlc_reset +ffffffff81fa1060 t gfx_v10_0_rlc_start +ffffffff81fa1250 t gfx_v10_0_update_spm_vmid +ffffffff81fa12a0 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81fa1ce0 t gfx_v10_0_init_csb +ffffffff81fa2000 t gfx_v10_0_update_spm_vmid_internal +ffffffff81fa20f0 t gfx_v10_0_rlc_backdoor_autoload_config_mec_cache +ffffffff81fa2410 t gfx_v10_0_is_rlcg_access_range +ffffffff81fa2440 t gfx_v10_0_gfx_mqd_init +ffffffff81fa2880 t gfx_v10_0_compute_mqd_init +ffffffff81fa2d90 t gfx_v10_0_mec_init +ffffffff81fa3020 t gfx_v10_0_compute_ring_init +ffffffff81fa3180 t gfx_v10_0_rlc_backdoor_autoload_buffer_init +ffffffff81fa3420 t gfx_v10_0_gpu_early_init +ffffffff81fa3690 t amdgpu_bo_unreserve +ffffffff81fa37a0 t gfx_v10_0_cp_resume +ffffffff81fa6760 t gfx_v10_3_get_disabled_sa +ffffffff81fa6890 t gfx_v10_0_get_rb_active_bitmap +ffffffff81fa69d0 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81fa6af0 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81fa6c00 t gfx_v10_0_cp_gfx_enable +ffffffff81fa6ea0 t gfx_v10_0_cp_compute_enable +ffffffff81fa7060 t amdgpu_bo_reserve +ffffffff81fa7200 t gfx_v10_0_kiq_init_register +ffffffff81fa82f0 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81fa83f0 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81fa8720 t gfx_v10_0_cp_gfx_start +ffffffff81fa9210 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81fa95a0 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81fa9da0 t gfx_v10_0_update_3d_clock_gating +ffffffff81faa1d0 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81faa600 t gfx_v10_cntl_pg +ffffffff81fab000 t gfx_v11_0_early_init +ffffffff81fab870 t gfx_v11_0_late_init +ffffffff81fab8e0 t gfx_v11_0_sw_init +ffffffff81fabee0 t gfx_v11_0_sw_fini +ffffffff81fac190 t gfx_v11_0_hw_init +ffffffff81fb0d30 t gfx_v11_0_hw_fini +ffffffff81fb0e90 t gfx_v11_0_suspend +ffffffff81fb0ed0 t gfx_v11_0_resume +ffffffff81fb0ee0 t gfx_v11_0_is_idle +ffffffff81fb0f80 t gfx_v11_0_wait_for_idle +ffffffff81fb1090 t gfx_v11_0_check_soft_reset +ffffffff81fb11d0 t gfx_v11_0_soft_reset +ffffffff81fb20a0 t gfx_v11_0_post_soft_reset +ffffffff81fb20b0 t gfx_v11_0_set_clockgating_state +ffffffff81fb2e10 t gfx_v11_0_set_powergating_state +ffffffff81fb2ec0 t gfx_v11_0_get_clockgating_state +ffffffff81fb30b0 t gfx_v11_0_get_gpu_clock_counter +ffffffff81fb34a0 t gfx_v11_0_select_se_sh +ffffffff81fb3540 t gfx_v11_0_read_wave_data +ffffffff81fb3810 t gfx_v11_0_read_wave_vgprs +ffffffff81fb3840 t gfx_v11_0_read_wave_sgprs +ffffffff81fb38c0 t gfx_v11_0_select_me_pipe_q +ffffffff81fb38e0 t gfx_v11_0_update_perf_clk +ffffffff81fb3a20 t gfx_v11_0_get_gfx_shadow_info +ffffffff81fb3a90 t wave_read_ind +ffffffff81fb3b90 t wave_read_regs +ffffffff81fb3d10 t gfx11_kiq_set_resources +ffffffff81fb4070 t gfx11_kiq_map_queues +ffffffff81fb4450 t gfx11_kiq_unmap_queues +ffffffff81fb4890 t gfx11_kiq_query_status +ffffffff81fb4bb0 t gfx11_kiq_invalidate_tlbs +ffffffff81fb4ce0 t gfx_v11_0_ring_get_rptr_compute +ffffffff81fb4d10 t gfx_v11_0_ring_get_wptr_compute +ffffffff81fb4d80 t gfx_v11_0_ring_set_wptr_compute +ffffffff81fb4ee0 t gfx_v11_0_ring_emit_ib_compute +ffffffff81fb5260 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81fb56e0 t gfx_v11_0_ring_test_ring +ffffffff81fb59b0 t gfx_v11_0_ring_test_ib +ffffffff81fb5cb0 t gfx_v11_0_ring_emit_rreg +ffffffff81fb5f70 t gfx_v11_0_ring_emit_wreg +ffffffff81fb61d0 t gfx_v11_0_ring_emit_reg_wait +ffffffff81fb6230 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81fb62a0 t gfx_v11_0_wait_reg_mem +ffffffff81fb6600 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81fb6630 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81fb6750 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81fb6990 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81fb7090 t gfx_v11_0_ring_emit_fence +ffffffff81fb74a0 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81fb7510 t gfx_v11_0_ring_emit_vm_flush +ffffffff81fb7700 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81fb77f0 t gfx_v11_0_ring_emit_gds_switch +ffffffff81fb78f0 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81fb7b40 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81fb7c00 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81fb7d80 t gfx_v11_0_ring_emit_gfx_shadow +ffffffff81fb8190 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81fb82a0 t gfx_v11_0_ring_soft_recovery +ffffffff81fb8310 t gfx_v11_0_ring_preempt_ib +ffffffff81fb84c0 t gfx_v11_0_emit_mem_sync +ffffffff81fb8830 t gfx_v11_0_write_data_to_reg +ffffffff81fb8a60 t gfx_v11_0_set_eop_interrupt_state +ffffffff81fb8b00 t gfx_v11_0_eop_irq +ffffffff81fb8ce0 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81fb8ea0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81fb9050 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81fb91a0 t gfx_v11_0_priv_reg_irq +ffffffff81fb9210 t gfx_v11_0_handle_priv_fault +ffffffff81fb9380 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81fb94d0 t gfx_v11_0_priv_inst_irq +ffffffff81fb9540 t gfx_v11_0_rlc_gc_fed_irq +ffffffff81fb9590 t gfx_v11_0_is_rlc_enabled +ffffffff81fb9630 t gfx_v11_0_set_safe_mode +ffffffff81fb97b0 t gfx_v11_0_unset_safe_mode +ffffffff81fb9820 t gfx_v11_0_rlc_init +ffffffff81fb98a0 t gfx_v11_0_get_csb_size +ffffffff81fb98d0 t gfx_v11_0_get_csb_buffer +ffffffff81fb9a40 t gfx_v11_0_rlc_resume +ffffffff81fba8f0 t gfx_v11_0_rlc_stop +ffffffff81fba9d0 t gfx_v11_0_rlc_reset +ffffffff81fbabc0 t gfx_v11_0_rlc_start +ffffffff81fbadb0 t gfx_v11_0_update_spm_vmid +ffffffff81fbaed0 t gfx_v11_0_init_csb +ffffffff81fbb090 t gfx_v11_0_gfx_mqd_init +ffffffff81fbb4c0 t gfx_v11_0_compute_mqd_init +ffffffff81fbba60 t gfx_v11_0_mec_init +ffffffff81fbbbf0 t gfx_v11_0_compute_ring_init +ffffffff81fbbd50 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff81fbbf50 t gfx_v11_0_gpu_early_init +ffffffff81fbc020 t amdgpu_bo_unreserve +ffffffff81fbc130 t gfx_v11_0_disable_gpa_mode +ffffffff81fbc2f0 t gfx_v11_0_cp_resume +ffffffff81fc0a50 t gfx_v11_0_config_me_cache +ffffffff81fc0e70 t gfx_v11_0_config_pfp_cache +ffffffff81fc1290 t gfx_v11_0_config_mec_cache +ffffffff81fc16b0 t gfx_v11_0_get_sa_active_bitmap +ffffffff81fc17e0 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81fc18f0 t gfx_v11_0_cp_compute_enable +ffffffff81fc1af0 t gfx_v11_0_cp_gfx_enable +ffffffff81fc1d20 t amdgpu_bo_reserve +ffffffff81fc1ec0 t gfx_v11_0_kiq_init_register +ffffffff81fc2fc0 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81fc30b0 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81fc32c0 t gfx_v11_0_cp_gfx_start +ffffffff81fc3c10 t gfx_v11_cntl_pg +ffffffff81fc4000 t gfx_v11_0_3_rlc_gc_fed_irq +ffffffff81fc4240 t gfx_v11_0_3_poison_consumption_handler +ffffffff81fc5000 t gfx_v8_0_early_init +ffffffff81fc5310 t gfx_v8_0_late_init +ffffffff81fc5ad0 t gfx_v8_0_sw_init +ffffffff81fc5f30 t gfx_v8_0_sw_fini +ffffffff81fc6140 t gfx_v8_0_hw_init +ffffffff81fc8720 t gfx_v8_0_hw_fini +ffffffff81fc8cb0 t gfx_v8_0_suspend +ffffffff81fc8cf0 t gfx_v8_0_resume +ffffffff81fc8d00 t gfx_v8_0_is_idle +ffffffff81fc8d80 t gfx_v8_0_wait_for_idle +ffffffff81fc8e50 t gfx_v8_0_check_soft_reset +ffffffff81fc8f50 t gfx_v8_0_pre_soft_reset +ffffffff81fc9110 t gfx_v8_0_soft_reset +ffffffff81fc9360 t gfx_v8_0_post_soft_reset +ffffffff81fc9550 t gfx_v8_0_set_clockgating_state +ffffffff81fc9830 t gfx_v8_0_set_powergating_state +ffffffff81fc9ce0 t gfx_v8_0_get_clockgating_state +ffffffff81fc9df0 t gfx_v8_0_get_gpu_clock_counter +ffffffff81fc9eb0 t gfx_v8_0_select_se_sh +ffffffff81fc9f10 t gfx_v8_0_read_wave_data +ffffffff81fca510 t gfx_v8_0_read_wave_sgprs +ffffffff81fca5e0 t gfx_v8_0_select_me_pipe_q +ffffffff81fca600 t gfx_v8_0_ring_get_rptr +ffffffff81fca630 t gfx_v8_0_ring_get_wptr_compute +ffffffff81fca660 t gfx_v8_0_ring_set_wptr_compute +ffffffff81fca6a0 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81fcab10 t gfx_v8_0_ring_test_ring +ffffffff81fcad50 t gfx_v8_0_ring_emit_rreg +ffffffff81fcb010 t gfx_v8_0_ring_emit_wreg +ffffffff81fcb270 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81fcb2d0 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81fcb350 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81fcb910 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81fcbe60 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81fcc180 t gfx_v8_0_ring_emit_vm_flush +ffffffff81fcc580 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81fcc8d0 t gfx_v8_0_ring_emit_gds_switch +ffffffff81fcd130 t gfx_v8_0_ring_test_ib +ffffffff81fcd320 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81fcd570 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81fcd620 t gfx_v8_ring_emit_sb +ffffffff81fcd710 t gfx_v8_ring_emit_cntxcntl +ffffffff81fcdd10 t gfx_v8_0_ring_soft_recovery +ffffffff81fcdd40 t gfx_v8_0_emit_mem_sync +ffffffff81fcdf60 t gfx_v8_0_ring_emit_ib_compute +ffffffff81fce2a0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81fce5d0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81fce8c0 t gfx_v8_0_emit_wave_limit +ffffffff81fcea90 t gfx_v8_0_set_eop_interrupt_state +ffffffff81fced10 t gfx_v8_0_eop_irq +ffffffff81fcee40 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81fceed0 t gfx_v8_0_priv_reg_irq +ffffffff81fceff0 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81fcf080 t gfx_v8_0_priv_inst_irq +ffffffff81fcf1a0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81fcf4e0 t gfx_v8_0_cp_ecc_error_irq +ffffffff81fcf530 t gfx_v8_0_set_sq_int_state +ffffffff81fcf5c0 t gfx_v8_0_sq_irq +ffffffff81fcf640 t gfx_v8_0_parse_sq_irq +ffffffff81fcf8c0 t gfx_v8_0_is_rlc_enabled +ffffffff81fcf910 t gfx_v8_0_set_safe_mode +ffffffff81fcfa40 t gfx_v8_0_unset_safe_mode +ffffffff81fcfb00 t gfx_v8_0_rlc_init +ffffffff81fcfbc0 t gfx_v8_0_get_csb_size +ffffffff81fcfbf0 t gfx_v8_0_get_csb_buffer +ffffffff81fcfd60 t gfx_v8_0_cp_jump_table_num +ffffffff81fcfda0 t gfx_v8_0_rlc_resume +ffffffff81fd0250 t gfx_v8_0_rlc_stop +ffffffff81fd02e0 t gfx_v8_0_rlc_reset +ffffffff81fd0390 t gfx_v8_0_rlc_start +ffffffff81fd0430 t gfx_v8_0_update_spm_vmid +ffffffff81fd04c0 t gfx_v8_0_init_save_restore_list +ffffffff81fd09a0 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81fd0c10 t gfx_v8_0_sq_irq_work_func +ffffffff81fd0c30 t gfx_v8_0_init_microcode +ffffffff81fd15c0 t gfx_v8_0_mec_init +ffffffff81fd16f0 t gfx_v8_0_compute_ring_init +ffffffff81fd1840 t gfx_v8_0_gpu_early_init +ffffffff81fd1d10 t amdgpu_bo_unreserve +ffffffff81fd1e20 t gfx_v8_0_kiq_resume +ffffffff81fd2170 t gfx_v8_0_cp_gfx_resume +ffffffff81fd2db0 t gfx_v8_0_kcq_resume +ffffffff81fd38c0 t amdgpu_bo_reserve +ffffffff81fd3a60 t gfx_v8_0_mqd_commit +ffffffff81fd3cd0 t gfx_v8_0_mqd_init +ffffffff81fd41e0 t gfx_v8_0_deactivate_hqd +ffffffff81fd42e0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81fd46f0 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81fd5000 t gfx_v9_0_ras_error_inject +ffffffff81fd51e0 t gfx_v9_0_query_ras_error_count +ffffffff81fd5f10 t gfx_v9_0_reset_ras_error_count +ffffffff81fd6ab0 T gfx_v9_0_select_se_sh +ffffffff81fd6b50 t gfx_v9_0_early_init +ffffffff81fd7790 t gfx_v9_0_late_init +ffffffff81fd8770 t gfx_v9_0_sw_init +ffffffff81fd8f50 t gfx_v9_0_sw_fini +ffffffff81fd91b0 t gfx_v9_0_hw_init +ffffffff81fdc720 t gfx_v9_0_hw_fini +ffffffff81fdcfe0 t gfx_v9_0_suspend +ffffffff81fdd020 t gfx_v9_0_resume +ffffffff81fdd030 t gfx_v9_0_is_idle +ffffffff81fdd0d0 t gfx_v9_0_wait_for_idle +ffffffff81fdd1d0 t gfx_v9_0_soft_reset +ffffffff81fdd5e0 t gfx_v9_0_set_clockgating_state +ffffffff81fdd6e0 t gfx_v9_0_set_powergating_state +ffffffff81fddb40 t gfx_v9_0_get_clockgating_state +ffffffff81fddc80 t gfx_v9_0_get_gpu_clock_counter +ffffffff81fde560 t gfx_v9_0_read_wave_data +ffffffff81fde830 t gfx_v9_0_read_wave_vgprs +ffffffff81fde8a0 t gfx_v9_0_read_wave_sgprs +ffffffff81fde8d0 t gfx_v9_0_select_me_pipe_q +ffffffff81fde8f0 t wave_read_ind +ffffffff81fdea00 t wave_read_regs +ffffffff81fdeb70 t gfx_v9_0_kiq_set_resources +ffffffff81fdeed0 t gfx_v9_0_kiq_map_queues +ffffffff81fdf250 t gfx_v9_0_kiq_unmap_queues +ffffffff81fdf5c0 t gfx_v9_0_kiq_query_status +ffffffff81fdf8e0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81fdfa10 t gfx_v9_0_ring_get_rptr_compute +ffffffff81fdfa40 t gfx_v9_0_ring_get_wptr_compute +ffffffff81fdfab0 t gfx_v9_0_ring_set_wptr_compute +ffffffff81fdfb10 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81fdff90 t gfx_v9_0_ring_test_ring +ffffffff81fe0200 t gfx_v9_0_ring_emit_rreg +ffffffff81fe04c0 t gfx_v9_0_ring_emit_wreg +ffffffff81fe0720 t gfx_v9_0_ring_emit_reg_wait +ffffffff81fe0780 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81fe0820 t gfx_v9_0_wait_reg_mem +ffffffff81fe0b80 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81fe0bb0 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81fe0cd0 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81fe0e10 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81fe1500 t gfx_v9_0_ring_emit_fence +ffffffff81fe1900 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81fe1970 t gfx_v9_0_ring_emit_vm_flush +ffffffff81fe1a90 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81fe1b80 t gfx_v9_0_ring_emit_gds_switch +ffffffff81fe1c80 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81fe1ed0 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81fe1f90 t gfx_v9_ring_emit_sb +ffffffff81fe2080 t gfx_v9_ring_emit_cntxcntl +ffffffff81fe25c0 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81fe26d0 t gfx_v9_0_ring_soft_recovery +ffffffff81fe2740 t gfx_v9_0_ring_preempt_ib +ffffffff81fe2970 t gfx_v9_0_emit_mem_sync +ffffffff81fe2c60 t gfx_v9_0_write_data_to_reg +ffffffff81fe2e90 t gfx_v9_0_ring_test_ib +ffffffff81fe3080 t gfx_v9_0_ring_patch_cntl +ffffffff81fe30c0 t gfx_v9_0_ring_patch_ce_meta +ffffffff81fe31d0 t gfx_v9_0_ring_patch_de_meta +ffffffff81fe32a0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81fe3600 t gfx_v9_0_emit_wave_limit +ffffffff81fe3800 t gfx_v9_0_set_eop_interrupt_state +ffffffff81fe3a00 t gfx_v9_0_eop_irq +ffffffff81fe3b70 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81fe3d50 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81fe3ea0 t gfx_v9_0_priv_reg_irq +ffffffff81fe3fc0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81fe4110 t gfx_v9_0_priv_inst_irq +ffffffff81fe4230 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81fe4c20 t gfx_v9_0_is_rlc_enabled +ffffffff81fe4cc0 t gfx_v9_0_set_safe_mode +ffffffff81fe4e40 t gfx_v9_0_unset_safe_mode +ffffffff81fe4eb0 t gfx_v9_0_rlc_init +ffffffff81fe4f30 t gfx_v9_0_get_csb_size +ffffffff81fe4f60 t gfx_v9_0_get_csb_buffer +ffffffff81fe50a0 t gfx_v9_0_cp_jump_table_num +ffffffff81fe50f0 t gfx_v9_0_rlc_resume +ffffffff81fe6b20 t gfx_v9_0_rlc_stop +ffffffff81fe6f40 t gfx_v9_0_rlc_reset +ffffffff81fe7120 t gfx_v9_0_rlc_start +ffffffff81fe72a0 t gfx_v9_0_update_spm_vmid +ffffffff81fe72f0 t gfx_v9_0_is_rlcg_access_range +ffffffff81fe7340 t gfx_v9_0_init_csb +ffffffff81fe7500 t gfx_v9_0_enable_lbpw +ffffffff81fe7610 t gfx_v9_0_update_spm_vmid_internal +ffffffff81fe7740 t gfx_v9_0_init_always_on_cu_mask +ffffffff81fe7a00 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81fe7b10 t gfx_v9_0_mec_init +ffffffff81fe7d70 t gfx_v9_0_compute_ring_init +ffffffff81fe7ed0 t gfx_v9_0_gpu_early_init +ffffffff81fe8330 t amdgpu_bo_unreserve +ffffffff81fe8440 t gfx_v9_0_cp_gfx_enable +ffffffff81fe8540 t amdgpu_bo_reserve +ffffffff81fe86e0 t gfx_v9_0_kiq_init_register +ffffffff81fe9550 t gfx_v9_0_mqd_init +ffffffff81fe9b20 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81fea0d0 t gfx_v9_0_update_3d_clock_gating +ffffffff81fea530 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81feb000 t gfx_v9_4_query_ras_error_count +ffffffff81febef0 t gfx_v9_4_query_ras_error_status +ffffffff81fec0f0 t gfx_v9_4_reset_ras_error_count +ffffffff81fed000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81fed890 T gfx_v9_4_2_init_golden_registers +ffffffff81fed930 T gfx_v9_4_2_debug_trap_config_init +ffffffff81feda50 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81fedc70 t gfx_v9_4_2_query_ras_error_count +ffffffff81fedd40 t gfx_v9_4_2_query_ras_error_status +ffffffff81fee6e0 t gfx_v9_4_2_reset_ras_error_count +ffffffff81fee750 t gfx_v9_4_2_reset_ras_error_status +ffffffff81feecb0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81feef10 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81feefb0 t gfx_v9_4_2_run_shader +ffffffff81fef3e0 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81fefac0 t gfx_v9_4_2_query_sram_edc_count +ffffffff81fefe30 t gfx_v9_4_2_query_utc_edc_count +ffffffff81ff0020 t wave_read_ind +ffffffff81ff1000 t gfx_v9_4_3_xcp_suspend +ffffffff81ff10b0 t gfx_v9_4_3_xcp_resume +ffffffff81ff1250 t gfx_v9_4_3_query_ras_error_count +ffffffff81ff1270 t gfx_v9_4_3_query_ras_error_status +ffffffff81ff1290 t gfx_v9_4_3_reset_ras_error_count +ffffffff81ff12b0 t gfx_v9_4_3_reset_ras_error_status +ffffffff81ff12d0 t gfx_v9_4_3_enable_watchdog_timer +ffffffff81ff12f0 t gfx_v9_4_3_early_init +ffffffff81ff1a60 t gfx_v9_4_3_late_init +ffffffff81ff1af0 t gfx_v9_4_3_sw_init +ffffffff81ff1fe0 t gfx_v9_4_3_sw_fini +ffffffff81ff2210 t gfx_v9_4_3_hw_init +ffffffff81ff3090 t gfx_v9_4_3_hw_fini +ffffffff81ff3170 t gfx_v9_4_3_suspend +ffffffff81ff3250 t gfx_v9_4_3_resume +ffffffff81ff3260 t gfx_v9_4_3_is_idle +ffffffff81ff3450 t gfx_v9_4_3_wait_for_idle +ffffffff81ff34f0 t gfx_v9_4_3_soft_reset +ffffffff81ff3d30 t gfx_v9_4_3_set_clockgating_state +ffffffff81ff3ef0 t gfx_v9_4_3_set_powergating_state +ffffffff81ff3f20 t gfx_v9_4_3_get_clockgating_state +ffffffff81ff40d0 t gfx_v9_4_3_kiq_set_resources +ffffffff81ff4430 t gfx_v9_4_3_kiq_map_queues +ffffffff81ff47d0 t gfx_v9_4_3_kiq_unmap_queues +ffffffff81ff4b90 t gfx_v9_4_3_kiq_query_status +ffffffff81ff4eb0 t gfx_v9_4_3_kiq_invalidate_tlbs +ffffffff81ff4fe0 t gfx_v9_4_3_ring_get_rptr_compute +ffffffff81ff5020 t gfx_v9_4_3_ring_get_wptr_compute +ffffffff81ff5090 t gfx_v9_4_3_ring_set_wptr_compute +ffffffff81ff50f0 t gfx_v9_4_3_ring_emit_fence_kiq +ffffffff81ff5590 t gfx_v9_4_3_ring_test_ring +ffffffff81ff5830 t gfx_v9_4_3_ring_emit_rreg +ffffffff81ff5af0 t gfx_v9_4_3_ring_emit_wreg +ffffffff81ff5d50 t gfx_v9_4_3_ring_emit_reg_wait +ffffffff81ff5db0 t gfx_v9_4_3_ring_emit_reg_write_reg_wait +ffffffff81ff5dd0 t gfx_v9_4_3_wait_reg_mem +ffffffff81ff6130 t gfx_v9_4_3_ring_emit_ib_compute +ffffffff81ff6490 t gfx_v9_4_3_ring_emit_fence +ffffffff81ff6880 t gfx_v9_4_3_ring_emit_pipeline_sync +ffffffff81ff68f0 t gfx_v9_4_3_ring_emit_vm_flush +ffffffff81ff6910 t gfx_v9_4_3_ring_emit_hdp_flush +ffffffff81ff6a00 t gfx_v9_4_3_ring_emit_gds_switch +ffffffff81ff6be0 t gfx_v9_4_3_ring_test_ib +ffffffff81ff6dd0 t gfx_v9_4_3_emit_mem_sync +ffffffff81ff70c0 t gfx_v9_4_3_emit_wave_limit +ffffffff81ff72d0 t gfx_v9_4_3_write_data_to_reg +ffffffff81ff7500 t gfx_v9_4_3_set_eop_interrupt_state +ffffffff81ff7680 t gfx_v9_4_3_eop_irq +ffffffff81ff7830 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state +ffffffff81ff79b0 t gfx_v9_4_3_ih_to_xcc_inst +ffffffff81ff7a90 t gfx_v9_4_3_set_priv_reg_fault_state +ffffffff81ff7ef0 t gfx_v9_4_3_priv_reg_irq +ffffffff81ff7f60 t gfx_v9_4_3_fault +ffffffff81ff80e0 t gfx_v9_4_3_set_priv_inst_fault_state +ffffffff81ff8540 t gfx_v9_4_3_priv_inst_irq +ffffffff81ff85b0 t gfx_v9_4_3_is_rlc_enabled +ffffffff81ff8700 t gfx_v9_4_3_xcc_set_safe_mode +ffffffff81ff8a10 t gfx_v9_4_3_xcc_unset_safe_mode +ffffffff81ff8b50 t gfx_v9_4_3_rlc_init +ffffffff81ff8bb0 t gfx_v9_4_3_rlc_resume +ffffffff81ff8c70 t gfx_v9_4_3_rlc_stop +ffffffff81ff8d20 t gfx_v9_4_3_rlc_reset +ffffffff81ff94a0 t gfx_v9_4_3_rlc_start +ffffffff81ff9550 t gfx_v9_4_3_update_spm_vmid +ffffffff81ff97b0 t gfx_v9_4_3_is_rlcg_access_range +ffffffff81ff9880 t gfx_v9_4_3_xcc_rlc_resume +ffffffff81ffa240 t gfx_v9_4_3_xcc_rlc_stop +ffffffff81ffaaa0 t gfx_v9_4_3_xcc_rlc_start +ffffffff81ffaeb0 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt +ffffffff81ffb110 t gfx_v9_4_3_xcc_select_se_sh +ffffffff81ffb340 t gfx_v9_4_3_mec_init +ffffffff81ffb6b0 t gfx_v9_4_3_gpu_early_init +ffffffff81ffb900 t amdgpu_bo_unreserve +ffffffff81ffba10 t gfx_v9_4_3_get_gpu_clock_counter +ffffffff81ffbde0 t gfx_v9_4_3_read_wave_data +ffffffff81ffc140 t gfx_v9_4_3_read_wave_vgprs +ffffffff81ffc160 t gfx_v9_4_3_read_wave_sgprs +ffffffff81ffc1c0 t gfx_v9_4_3_select_me_pipe_q +ffffffff81ffc240 t gfx_v9_4_3_switch_compute_partition +ffffffff81ffc5f0 t wave_read_ind +ffffffff81ffc830 t wave_read_regs +ffffffff81ffcb10 t gfx_v9_4_3_xcc_constants_init +ffffffff81ffde80 t gfx_v9_4_3_xcc_cp_resume +ffffffff81fff120 t gfx_v9_4_3_xcc_cp_compute_enable +ffffffff81fff300 t amdgpu_bo_reserve +ffffffff81fff4a0 t gfx_v9_4_3_xcc_kiq_init_register +ffffffff82001540 t gfx_v9_4_3_xcc_mqd_init +ffffffff820020e0 t gfx_v9_4_3_xcc_fini +ffffffff82002760 t gfx_v9_4_3_xcc_q_fini_register +ffffffff820032c0 t gfx_v9_4_3_xcc_update_sram_fgcg +ffffffff82003570 t gfx_v9_4_3_xcc_update_repeater_fgcg +ffffffff82003820 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating +ffffffff82004510 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating +ffffffff82004ea0 t gfx_v9_4_3_inst_query_ras_err_count +ffffffff82005150 t gfx_v9_4_3_inst_query_ras_err_status +ffffffff82006140 t gfx_v9_4_3_inst_reset_ras_err_count +ffffffff82006330 t gfx_v9_4_3_inst_reset_ras_err_status +ffffffff82006bd0 t gfx_v9_4_3_inst_enable_watchdog_timer +ffffffff82007000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff820070a0 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff820071f0 t gfxhub_v1_0_gart_enable +ffffffff820089c0 t gfxhub_v1_0_gart_disable +ffffffff82008cb0 t gfxhub_v1_0_set_fault_enable_default +ffffffff82008db0 t gfxhub_v1_0_init +ffffffff82009000 T gfxhub_v1_1_get_xgmi_info +ffffffff8200a000 t gfxhub_v1_2_get_mc_fb_offset +ffffffff8200a150 t gfxhub_v1_2_setup_vm_pt_regs +ffffffff8200a1c0 t gfxhub_v1_2_gart_enable +ffffffff8200a250 t gfxhub_v1_2_gart_disable +ffffffff8200a2b0 t gfxhub_v1_2_set_fault_enable_default +ffffffff8200a320 t gfxhub_v1_2_init +ffffffff8200a680 t gfxhub_v1_2_get_xgmi_info +ffffffff8200a930 t gfxhub_v1_2_xcp_suspend +ffffffff8200a980 t gfxhub_v1_2_xcp_resume +ffffffff8200aa00 t gfxhub_v1_2_xcc_setup_vm_pt_regs +ffffffff8200ad60 t gfxhub_v1_2_xcc_gart_enable +ffffffff8200e9d0 t gfxhub_v1_2_xcc_gart_disable +ffffffff8200f130 t gfxhub_v1_2_xcc_set_fault_enable_default +ffffffff82010000 t gfxhub_v2_0_get_fb_location +ffffffff820100a0 t gfxhub_v2_0_get_mc_fb_offset +ffffffff82010140 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff82010290 t gfxhub_v2_0_gart_enable +ffffffff82011730 t gfxhub_v2_0_gart_disable +ffffffff820119a0 t gfxhub_v2_0_set_fault_enable_default +ffffffff82011aa0 t gfxhub_v2_0_init +ffffffff82011b70 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff82011d90 t gfxhub_v2_0_get_invalidate_req +ffffffff82012000 t gfxhub_v2_1_get_fb_location +ffffffff820120a0 t gfxhub_v2_1_get_mc_fb_offset +ffffffff82012140 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff82012290 t gfxhub_v2_1_gart_enable +ffffffff82013830 t gfxhub_v2_1_gart_disable +ffffffff82013aa0 t gfxhub_v2_1_set_fault_enable_default +ffffffff82013bc0 t gfxhub_v2_1_init +ffffffff82013c90 t gfxhub_v2_1_get_xgmi_info +ffffffff82013df0 t gfxhub_v2_1_utcl2_harvest +ffffffff82013fe0 t gfxhub_v2_1_save_regs +ffffffff82014b30 t gfxhub_v2_1_restore_regs +ffffffff82015900 t gfxhub_v2_1_halt +ffffffff82015d50 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff82015f70 t gfxhub_v2_1_get_invalidate_req +ffffffff82016000 t gfxhub_v3_0_get_fb_location +ffffffff820160a0 t gfxhub_v3_0_get_mc_fb_offset +ffffffff82016140 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff82016290 t gfxhub_v3_0_gart_enable +ffffffff82017830 t gfxhub_v3_0_gart_disable +ffffffff82017b10 t gfxhub_v3_0_set_fault_enable_default +ffffffff82017d00 t gfxhub_v3_0_init +ffffffff82017dd0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff82017ff0 t gfxhub_v3_0_get_invalidate_req +ffffffff82019000 t gfxhub_v3_0_3_get_fb_location +ffffffff820190a0 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff82019140 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff82019290 t gfxhub_v3_0_3_gart_enable +ffffffff8201a6f0 t gfxhub_v3_0_3_gart_disable +ffffffff8201a9f0 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff8201ab10 t gfxhub_v3_0_3_init +ffffffff8201abe0 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff8201ae00 t gfxhub_v3_0_3_get_invalidate_req +ffffffff8201b000 t gmc_v10_0_early_init +ffffffff8201b170 t gmc_v10_0_late_init +ffffffff8201b1f0 t gmc_v10_0_sw_init +ffffffff8201b690 t gmc_v10_0_sw_fini +ffffffff8201b710 t gmc_v10_0_hw_init +ffffffff8201b990 t gmc_v10_0_hw_fini +ffffffff8201ba80 t gmc_v10_0_suspend +ffffffff8201bac0 t gmc_v10_0_resume +ffffffff8201bb20 t gmc_v10_0_is_idle +ffffffff8201bb50 t gmc_v10_0_wait_for_idle +ffffffff8201bb80 t gmc_v10_0_soft_reset +ffffffff8201bbb0 t gmc_v10_0_set_clockgating_state +ffffffff8201bc70 t gmc_v10_0_set_powergating_state +ffffffff8201bca0 t gmc_v10_0_get_clockgating_state +ffffffff8201bd50 t gmc_v10_0_flush_gpu_tlb +ffffffff8201c060 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff8201c380 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff8201c560 t gmc_v10_0_emit_pasid_mapping +ffffffff8201c5e0 t gmc_v10_0_map_mtype +ffffffff8201c630 t gmc_v10_0_get_vm_pde +ffffffff8201c730 t gmc_v10_0_get_vm_pte +ffffffff8201c810 t gmc_v10_0_get_vbios_fb_size +ffffffff8201c9a0 t gmc_v10_0_flush_vm_hub +ffffffff8201ce40 t gmc_v10_0_vm_fault_interrupt_state +ffffffff8201cef0 t gmc_v10_0_process_interrupt +ffffffff8201d220 t gmc_v10_0_ecc_interrupt_state +ffffffff8201d250 t gmc_v10_0_gart_init +ffffffff8201e000 t gmc_v11_0_early_init +ffffffff8201e1f0 t gmc_v11_0_late_init +ffffffff8201e270 t gmc_v11_0_sw_init +ffffffff8201e630 t gmc_v11_0_sw_fini +ffffffff8201e6b0 t gmc_v11_0_hw_init +ffffffff8201e860 t gmc_v11_0_hw_fini +ffffffff8201e920 t gmc_v11_0_suspend +ffffffff8201e9e0 t gmc_v11_0_resume +ffffffff8201ea40 t gmc_v11_0_is_idle +ffffffff8201ea70 t gmc_v11_0_wait_for_idle +ffffffff8201eaa0 t gmc_v11_0_soft_reset +ffffffff8201ead0 t gmc_v11_0_set_clockgating_state +ffffffff8201eb50 t gmc_v11_0_set_powergating_state +ffffffff8201eb80 t gmc_v11_0_get_clockgating_state +ffffffff8201ebc0 t gmc_v11_0_flush_gpu_tlb +ffffffff8201f0f0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff8201f3c0 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff8201f5a0 t gmc_v11_0_emit_pasid_mapping +ffffffff8201f620 t gmc_v11_0_map_mtype +ffffffff8201f670 t gmc_v11_0_get_vm_pde +ffffffff8201f770 t gmc_v11_0_get_vm_pte +ffffffff8201f850 t gmc_v11_0_get_vbios_fb_size +ffffffff8201f9e0 t gmc_v11_0_vm_fault_interrupt_state +ffffffff8201fa90 t gmc_v11_0_process_interrupt +ffffffff8201fcf0 t gmc_v11_0_ecc_interrupt_state +ffffffff8201fd20 t gmc_v11_0_gart_init +ffffffff82020000 t gmc_v7_0_early_init +ffffffff820200a0 t gmc_v7_0_late_init +ffffffff820200f0 t gmc_v7_0_sw_init +ffffffff82020610 t gmc_v7_0_sw_fini +ffffffff820206c0 t gmc_v7_0_hw_init +ffffffff82021350 t gmc_v7_0_hw_fini +ffffffff82021460 t gmc_v7_0_suspend +ffffffff820214a0 t gmc_v7_0_resume +ffffffff82021500 t gmc_v7_0_is_idle +ffffffff82021550 t gmc_v7_0_wait_for_idle +ffffffff82021600 t gmc_v7_0_soft_reset +ffffffff82021910 t gmc_v7_0_set_clockgating_state +ffffffff82021bb0 t gmc_v7_0_set_powergating_state +ffffffff82021be0 t gmc_v7_0_flush_gpu_tlb +ffffffff82021c10 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff82021cf0 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff82021da0 t gmc_v7_0_emit_pasid_mapping +ffffffff82021dd0 t gmc_v7_0_set_prt +ffffffff82021ff0 t gmc_v7_0_get_vm_pde +ffffffff82022050 t gmc_v7_0_get_vm_pte +ffffffff82022090 t gmc_v7_0_get_vbios_fb_size +ffffffff82022110 t gmc_v7_0_vm_fault_interrupt_state +ffffffff82022210 t gmc_v7_0_process_interrupt +ffffffff82022520 t gmc_v7_0_gart_init +ffffffff82023000 t gmc_v8_0_early_init +ffffffff820230a0 t gmc_v8_0_late_init +ffffffff820230f0 t gmc_v8_0_sw_init +ffffffff820237b0 t gmc_v8_0_sw_fini +ffffffff82023860 t gmc_v8_0_hw_init +ffffffff82024890 t gmc_v8_0_hw_fini +ffffffff820249a0 t gmc_v8_0_suspend +ffffffff820249e0 t gmc_v8_0_resume +ffffffff82024a40 t gmc_v8_0_is_idle +ffffffff82024a90 t gmc_v8_0_wait_for_idle +ffffffff82024b40 t gmc_v8_0_check_soft_reset +ffffffff82024bc0 t gmc_v8_0_pre_soft_reset +ffffffff82024d70 t gmc_v8_0_soft_reset +ffffffff82024e70 t gmc_v8_0_post_soft_reset +ffffffff82024f00 t gmc_v8_0_set_clockgating_state +ffffffff82025730 t gmc_v8_0_set_powergating_state +ffffffff82025760 t gmc_v8_0_get_clockgating_state +ffffffff820257d0 t gmc_v8_0_flush_gpu_tlb +ffffffff82025800 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff820258e0 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff82025990 t gmc_v8_0_emit_pasid_mapping +ffffffff820259c0 t gmc_v8_0_set_prt +ffffffff82025be0 t gmc_v8_0_get_vm_pde +ffffffff82025c40 t gmc_v8_0_get_vm_pte +ffffffff82025c90 t gmc_v8_0_get_vbios_fb_size +ffffffff82025d10 t gmc_v8_0_vm_fault_interrupt_state +ffffffff82025e10 t gmc_v8_0_process_interrupt +ffffffff82026230 t gmc_v8_0_gart_init +ffffffff82027000 T gmc_v9_0_restore_registers +ffffffff82027170 t gmc_v9_0_early_init +ffffffff82027540 t gmc_v9_0_late_init +ffffffff82027670 t gmc_v9_0_sw_init +ffffffff82027ee0 t gmc_v9_0_sw_fini +ffffffff82027fe0 t gmc_v9_0_hw_init +ffffffff82028560 t gmc_v9_0_hw_fini +ffffffff82028660 t gmc_v9_0_suspend +ffffffff820286a0 t gmc_v9_0_resume +ffffffff82028700 t gmc_v9_0_is_idle +ffffffff82028730 t gmc_v9_0_wait_for_idle +ffffffff82028760 t gmc_v9_0_soft_reset +ffffffff82028790 t gmc_v9_0_set_clockgating_state +ffffffff82028800 t gmc_v9_0_set_powergating_state +ffffffff82028830 t gmc_v9_0_get_clockgating_state +ffffffff82028870 t gmc_v9_0_flush_gpu_tlb +ffffffff82028fa0 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff820293e0 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff82029610 t gmc_v9_0_emit_pasid_mapping +ffffffff82029690 t gmc_v9_0_map_mtype +ffffffff820296d0 t gmc_v9_0_get_vm_pde +ffffffff820297e0 t gmc_v9_0_get_vm_pte +ffffffff82029b20 t gmc_v9_0_override_vm_pte_flags +ffffffff82029be0 t gmc_v9_0_get_vbios_fb_size +ffffffff82029d90 t gmc_v9_0_query_memory_partition +ffffffff82029df0 t gmc_v9_0_vm_fault_interrupt_state +ffffffff8202a2d0 t gmc_v9_0_process_interrupt +ffffffff8202aba0 t gmc_v9_0_ecc_interrupt_state +ffffffff8202ad50 t gmc_v9_0_init_mem_ranges +ffffffff8202b1c0 t gmc_v9_0_gart_init +ffffffff8202b330 t gmc_v9_0_save_registers +ffffffff8202c000 t hdp_v4_0_query_ras_error_count +ffffffff8202c0d0 t hdp_v4_0_reset_ras_error_count +ffffffff8202c200 t hdp_v4_0_flush_hdp +ffffffff8202c250 t hdp_v4_0_invalidate_hdp +ffffffff8202c330 t hdp_v4_0_update_clock_gating +ffffffff8202c440 t hdp_v4_0_get_clockgating_state +ffffffff8202c4a0 t hdp_v4_0_init_registers +ffffffff8202d000 t hdp_v5_0_flush_hdp +ffffffff8202d050 t hdp_v5_0_invalidate_hdp +ffffffff8202d0f0 t hdp_v5_0_update_clock_gating +ffffffff8202d530 t hdp_v5_0_get_clockgating_state +ffffffff8202d670 t hdp_v5_0_init_registers +ffffffff8202e000 t hdp_v5_2_flush_hdp +ffffffff8202e050 t hdp_v5_2_update_clock_gating +ffffffff8202e4a0 t hdp_v5_2_get_clockgating_state +ffffffff8202f000 t hdp_v6_0_flush_hdp +ffffffff8202f050 t hdp_v6_0_update_clock_gating +ffffffff8202f3b0 t hdp_v6_0_get_clockgating_state +ffffffff82030000 t iceland_ih_early_init +ffffffff82030050 t iceland_ih_sw_init +ffffffff820300c0 t iceland_ih_sw_fini +ffffffff82030120 t iceland_ih_hw_init +ffffffff82030410 t iceland_ih_hw_fini +ffffffff82030520 t iceland_ih_suspend +ffffffff82030630 t iceland_ih_resume +ffffffff82030670 t iceland_ih_is_idle +ffffffff820306c0 t iceland_ih_wait_for_idle +ffffffff82030770 t iceland_ih_soft_reset +ffffffff82030890 t iceland_ih_set_clockgating_state +ffffffff820308c0 t iceland_ih_set_powergating_state +ffffffff820308f0 t iceland_ih_get_wptr +ffffffff82030a20 t iceland_ih_decode_iv +ffffffff82030aa0 t iceland_ih_set_rptr +ffffffff82031000 t ih_v6_0_early_init +ffffffff82031050 t ih_v6_0_sw_init +ffffffff820311d0 t ih_v6_0_sw_fini +ffffffff82031210 t ih_v6_0_hw_init +ffffffff820318a0 t ih_v6_0_hw_fini +ffffffff82031910 t ih_v6_0_suspend +ffffffff82031980 t ih_v6_0_resume +ffffffff82031990 t ih_v6_0_is_idle +ffffffff820319c0 t ih_v6_0_wait_for_idle +ffffffff820319f0 t ih_v6_0_soft_reset +ffffffff82031a20 t ih_v6_0_set_clockgating_state +ffffffff82031b60 t ih_v6_0_set_powergating_state +ffffffff82031d00 t ih_v6_0_get_clockgating_state +ffffffff82031da0 t ih_v6_0_get_wptr +ffffffff82031ee0 t ih_v6_0_set_rptr +ffffffff82031fc0 t ih_v6_0_self_irq +ffffffff82032030 t ih_v6_0_toggle_interrupts +ffffffff82032250 t force_update_wptr_for_self_int +ffffffff82033000 t ih_v6_1_early_init +ffffffff82033050 t ih_v6_1_sw_init +ffffffff820331d0 t ih_v6_1_sw_fini +ffffffff82033210 t ih_v6_1_hw_init +ffffffff820338a0 t ih_v6_1_hw_fini +ffffffff82033910 t ih_v6_1_suspend +ffffffff82033980 t ih_v6_1_resume +ffffffff82033990 t ih_v6_1_is_idle +ffffffff820339c0 t ih_v6_1_wait_for_idle +ffffffff820339f0 t ih_v6_1_soft_reset +ffffffff82033a20 t ih_v6_1_set_clockgating_state +ffffffff82033b60 t ih_v6_1_set_powergating_state +ffffffff82033d00 t ih_v6_1_get_clockgating_state +ffffffff82033da0 t ih_v6_1_get_wptr +ffffffff82033ee0 t ih_v6_1_set_rptr +ffffffff82033fc0 t ih_v6_1_self_irq +ffffffff82034030 t ih_v6_1_toggle_interrupts +ffffffff82034250 t force_update_wptr_for_self_int +ffffffff82035000 t imu_v11_0_init_microcode +ffffffff820351b0 t imu_v11_0_load_microcode +ffffffff82035580 t imu_v11_0_setup +ffffffff82035860 t imu_v11_0_start +ffffffff82035980 t imu_v11_0_program_rlc_ram +ffffffff82035b60 t imu_v11_0_wait_for_reset_status +ffffffff82035ce0 t program_imu_rlc_ram +ffffffff82037000 T imu_v11_0_3_program_rlc_ram +ffffffff82038000 T jpeg_v1_0_early_init +ffffffff82038080 T jpeg_v1_0_sw_init +ffffffff82038190 T jpeg_v1_0_sw_fini +ffffffff820381b0 T jpeg_v1_0_start +ffffffff82038cf0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff82038d80 t jpeg_v1_0_decode_ring_get_wptr +ffffffff82038e10 t jpeg_v1_0_decode_ring_set_wptr +ffffffff82038e80 t jpeg_v1_0_decode_ring_emit_ib +ffffffff82039860 t jpeg_v1_0_decode_ring_emit_fence +ffffffff8203a2b0 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff8203a320 t jpeg_v1_0_decode_ring_nop +ffffffff8203a480 t jpeg_v1_0_decode_ring_insert_start +ffffffff8203a660 t jpeg_v1_0_decode_ring_insert_end +ffffffff8203a840 t jpeg_v1_0_ring_begin_use +ffffffff8203a970 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff8203ac00 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff8203b060 t jpeg_v1_0_set_interrupt_state +ffffffff8203b090 t jpeg_v1_0_process_interrupt +ffffffff8203c000 T jpeg_v2_0_dec_ring_insert_start +ffffffff8203c1c0 T jpeg_v2_0_dec_ring_insert_end +ffffffff8203c380 T jpeg_v2_0_dec_ring_emit_fence +ffffffff8203caf0 T jpeg_v2_0_dec_ring_emit_ib +ffffffff8203d380 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff8203d780 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff8203d7f0 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff8203da50 T jpeg_v2_0_dec_ring_nop +ffffffff8203dbb0 t jpeg_v2_0_early_init +ffffffff8203dc40 t jpeg_v2_0_sw_init +ffffffff8203dd90 t jpeg_v2_0_sw_fini +ffffffff8203ddf0 t jpeg_v2_0_hw_init +ffffffff8203de80 t jpeg_v2_0_hw_fini +ffffffff8203df70 t jpeg_v2_0_suspend +ffffffff8203dfa0 t jpeg_v2_0_resume +ffffffff8203e050 t jpeg_v2_0_is_idle +ffffffff8203e0f0 t jpeg_v2_0_wait_for_idle +ffffffff8203e130 t jpeg_v2_0_set_clockgating_state +ffffffff8203e1f0 t jpeg_v2_0_set_powergating_state +ffffffff8203ea60 t jpeg_v2_0_dec_ring_get_rptr +ffffffff8203eaf0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff8203eba0 t jpeg_v2_0_dec_ring_set_wptr +ffffffff8203ec40 t jpeg_v2_0_set_interrupt_state +ffffffff8203ec70 t jpeg_v2_0_process_interrupt +ffffffff8203ed10 t jpeg_v2_0_enable_clock_gating +ffffffff8203eee0 t jpeg_v2_0_disable_clock_gating +ffffffff82040000 t jpeg_v2_6_query_ras_poison_status +ffffffff82040160 t jpeg_v2_5_early_init +ffffffff82040380 t jpeg_v2_5_sw_init +ffffffff82040660 t jpeg_v2_5_sw_fini +ffffffff820406c0 t jpeg_v2_5_hw_init +ffffffff820407c0 t jpeg_v2_5_hw_fini +ffffffff82040980 t jpeg_v2_5_suspend +ffffffff820409b0 t jpeg_v2_5_resume +ffffffff82040ad0 t jpeg_v2_5_is_idle +ffffffff82040be0 t jpeg_v2_5_wait_for_idle +ffffffff82040ca0 t jpeg_v2_5_set_clockgating_state +ffffffff82040d60 t jpeg_v2_5_set_powergating_state +ffffffff820415c0 t jpeg_v2_5_dec_ring_get_rptr +ffffffff82041660 t jpeg_v2_5_dec_ring_get_wptr +ffffffff82041710 t jpeg_v2_5_dec_ring_set_wptr +ffffffff820417c0 t jpeg_v2_6_dec_ring_insert_start +ffffffff820419a0 t jpeg_v2_6_dec_ring_insert_end +ffffffff82041b80 t jpeg_v2_5_set_interrupt_state +ffffffff82041bb0 t jpeg_v2_5_process_interrupt +ffffffff82041c90 t jpeg_v2_6_set_ras_interrupt_state +ffffffff82041cc0 t jpeg_v2_5_enable_clock_gating +ffffffff82041da0 t jpeg_v2_5_disable_clock_gating +ffffffff82043000 t jpeg_v3_0_early_init +ffffffff82043120 t jpeg_v3_0_sw_init +ffffffff82043270 t jpeg_v3_0_sw_fini +ffffffff820432d0 t jpeg_v3_0_hw_init +ffffffff82043360 t jpeg_v3_0_hw_fini +ffffffff82043450 t jpeg_v3_0_suspend +ffffffff82043480 t jpeg_v3_0_resume +ffffffff82043530 t jpeg_v3_0_is_idle +ffffffff820435d0 t jpeg_v3_0_wait_for_idle +ffffffff82043610 t jpeg_v3_0_set_clockgating_state +ffffffff820436d0 t jpeg_v3_0_set_powergating_state +ffffffff82044020 t jpeg_v3_0_dec_ring_get_rptr +ffffffff820440b0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff82044160 t jpeg_v3_0_dec_ring_set_wptr +ffffffff82044200 t jpeg_v3_0_set_interrupt_state +ffffffff82044230 t jpeg_v3_0_process_interrupt +ffffffff820442d0 t jpeg_v3_0_enable_clock_gating +ffffffff820443b0 t jpeg_v3_0_disable_clock_gating +ffffffff82045000 t jpeg_v4_0_query_ras_poison_status +ffffffff82045160 t jpeg_v4_0_early_init +ffffffff82045240 t jpeg_v4_0_sw_init +ffffffff82045410 t jpeg_v4_0_sw_fini +ffffffff82045470 t jpeg_v4_0_hw_init +ffffffff82045b60 t jpeg_v4_0_hw_fini +ffffffff82045c60 t jpeg_v4_0_suspend +ffffffff82045c90 t jpeg_v4_0_resume +ffffffff82045cf0 t jpeg_v4_0_is_idle +ffffffff82045d90 t jpeg_v4_0_wait_for_idle +ffffffff82045dd0 t jpeg_v4_0_set_clockgating_state +ffffffff82045ea0 t jpeg_v4_0_set_powergating_state +ffffffff82046760 t jpeg_v4_0_dec_ring_get_rptr +ffffffff820467f0 t jpeg_v4_0_dec_ring_get_wptr +ffffffff820468a0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff82046940 t jpeg_v4_0_set_interrupt_state +ffffffff82046970 t jpeg_v4_0_process_interrupt +ffffffff82046a20 t jpeg_v4_0_set_ras_interrupt_state +ffffffff82046a50 t jpeg_v4_0_enable_clock_gating +ffffffff82046c30 t jpeg_v4_0_disable_clock_gating +ffffffff82047000 T jpeg_v4_0_3_dec_ring_parse_cs +ffffffff82047180 t jpeg_v4_0_3_early_init +ffffffff82047300 t jpeg_v4_0_3_sw_init +ffffffff82047680 t jpeg_v4_0_3_sw_fini +ffffffff820476e0 t jpeg_v4_0_3_hw_init +ffffffff82048220 t jpeg_v4_0_3_hw_fini +ffffffff820482d0 t jpeg_v4_0_3_suspend +ffffffff82048370 t jpeg_v4_0_3_resume +ffffffff820483d0 t jpeg_v4_0_3_is_idle +ffffffff820485e0 t jpeg_v4_0_3_wait_for_idle +ffffffff82048750 t jpeg_v4_0_3_set_clockgating_state +ffffffff820487f0 t jpeg_v4_0_3_set_powergating_state +ffffffff820495d0 t jpeg_v4_0_3_dec_ring_get_rptr +ffffffff82049770 t jpeg_v4_0_3_dec_ring_get_wptr +ffffffff82049930 t jpeg_v4_0_3_dec_ring_set_wptr +ffffffff82049ae0 t jpeg_v4_0_3_dec_ring_emit_ib +ffffffff8204a440 t jpeg_v4_0_3_dec_ring_emit_fence +ffffffff8204ac90 t jpeg_v4_0_3_dec_ring_emit_vm_flush +ffffffff8204ad00 t jpeg_v4_0_3_dec_ring_nop +ffffffff8204ae60 t jpeg_v4_0_3_dec_ring_insert_start +ffffffff8204b020 t jpeg_v4_0_3_dec_ring_insert_end +ffffffff8204b1e0 t jpeg_v4_0_3_dec_ring_emit_wreg +ffffffff8204b440 t jpeg_v4_0_3_dec_ring_emit_reg_wait +ffffffff8204b840 t jpeg_v4_0_3_set_interrupt_state +ffffffff8204b870 t jpeg_v4_0_3_process_interrupt +ffffffff8204bb20 t jpeg_v4_0_3_query_ras_error_count +ffffffff8204bc40 t jpeg_v4_0_3_reset_ras_error_count +ffffffff8204bd50 t jpeg_v4_0_3_disable_clock_gating +ffffffff8204c000 t lsdma_v6_0_copy_mem +ffffffff8204c3e0 t lsdma_v6_0_fill_mem +ffffffff8204c740 t lsdma_v6_0_update_memory_power_gating +ffffffff8204d000 t mca_v3_0_ras_block_match +ffffffff8204d050 t mca_v3_0_mp0_query_ras_error_count +ffffffff8204d070 t mca_v3_0_mp1_query_ras_error_count +ffffffff8204d090 t mca_v3_0_mpio_query_ras_error_count +ffffffff8204e000 t mes_v10_0_early_init +ffffffff8204e070 t mes_v10_0_late_init +ffffffff8204e0c0 t mes_v10_1_sw_init +ffffffff8204e630 t mes_v10_1_sw_fini +ffffffff8204e7c0 t mes_v10_1_hw_init +ffffffff8204f1b0 t mes_v10_1_hw_fini +ffffffff8204f2c0 t mes_v10_1_suspend +ffffffff8204f400 t mes_v10_1_resume +ffffffff8204f460 t mes_v10_1_kiq_hw_init +ffffffff8204f8f0 t mes_v10_1_add_hw_queue +ffffffff8204fa80 t mes_v10_1_remove_hw_queue +ffffffff8204fb20 t mes_v10_1_unmap_legacy_queue +ffffffff8204fc20 t mes_v10_1_suspend_gang +ffffffff8204fc50 t mes_v10_1_resume_gang +ffffffff8204fc80 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff8204fed0 t mes_v10_1_load_microcode +ffffffff820507f0 t mes_v10_1_enable +ffffffff82050d00 t mes_v10_1_queue_init +ffffffff82050fe0 t amdgpu_bo_unreserve +ffffffff820510f0 t mes_v10_1_ring_get_rptr +ffffffff82051120 t mes_v10_1_ring_get_wptr +ffffffff82051190 t mes_v10_1_ring_set_wptr +ffffffff82052000 t mes_v11_0_early_init +ffffffff82052070 t mes_v11_0_late_init +ffffffff820520e0 t mes_v11_0_sw_init +ffffffff82052650 t mes_v11_0_sw_fini +ffffffff820528a0 t mes_v11_0_hw_init +ffffffff820531b0 t mes_v11_0_hw_fini +ffffffff820531e0 t mes_v11_0_suspend +ffffffff820531f0 t mes_v11_0_resume +ffffffff82053250 t mes_v11_0_kiq_hw_init +ffffffff820534a0 t mes_v11_0_kiq_hw_fini +ffffffff82053600 t mes_v11_0_add_hw_queue +ffffffff82053810 t mes_v11_0_remove_hw_queue +ffffffff820538b0 t mes_v11_0_unmap_legacy_queue +ffffffff820539d0 t mes_v11_0_suspend_gang +ffffffff82053a00 t mes_v11_0_resume_gang +ffffffff82053a30 t mes_v11_0_misc_op +ffffffff82053bf0 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff82053e50 t mes_v11_0_load_microcode +ffffffff820546f0 t mes_v11_0_enable +ffffffff82054ca0 t mes_v11_0_queue_init +ffffffff82055920 t amdgpu_bo_unreserve +ffffffff82055a30 t mes_v11_0_mqd_init +ffffffff82055c50 t mes_v11_0_kiq_dequeue +ffffffff82056140 t mes_v11_0_ring_get_rptr +ffffffff82056170 t mes_v11_0_ring_get_wptr +ffffffff820561e0 t mes_v11_0_ring_set_wptr +ffffffff82057000 t mmhub_v1_0_query_ras_error_count +ffffffff82057160 t mmhub_v1_0_reset_ras_error_count +ffffffff82057230 t mmhub_v1_0_get_fb_location +ffffffff82057360 t mmhub_v1_0_init +ffffffff82057410 t mmhub_v1_0_gart_enable +ffffffff820589c0 t mmhub_v1_0_set_fault_enable_default +ffffffff82058ae0 t mmhub_v1_0_gart_disable +ffffffff82058db0 t mmhub_v1_0_set_clockgating +ffffffff820592a0 t mmhub_v1_0_get_clockgating +ffffffff820593e0 t mmhub_v1_0_setup_vm_pt_regs +ffffffff82059530 t mmhub_v1_0_update_power_gating +ffffffff8205a000 t mmhub_v1_7_query_ras_error_count +ffffffff8205a160 t mmhub_v1_7_query_ras_error_status +ffffffff8205a270 t mmhub_v1_7_reset_ras_error_count +ffffffff8205a320 t mmhub_v1_7_reset_ras_error_status +ffffffff8205a440 t mmhub_v1_7_get_fb_location +ffffffff8205a570 t mmhub_v1_7_init +ffffffff8205a610 t mmhub_v1_7_gart_enable +ffffffff8205bdf0 t mmhub_v1_7_set_fault_enable_default +ffffffff8205bf10 t mmhub_v1_7_gart_disable +ffffffff8205c1e0 t mmhub_v1_7_set_clockgating +ffffffff8205c5c0 t mmhub_v1_7_get_clockgating +ffffffff8205c700 t mmhub_v1_7_setup_vm_pt_regs +ffffffff8205d000 t mmhub_v1_8_get_fb_location +ffffffff8205d130 t mmhub_v1_8_init +ffffffff8205d2b0 t mmhub_v1_8_gart_enable +ffffffff8205f1d0 t mmhub_v1_8_set_fault_enable_default +ffffffff8205f3c0 t mmhub_v1_8_gart_disable +ffffffff8205f760 t mmhub_v1_8_set_clockgating +ffffffff8205f790 t mmhub_v1_8_get_clockgating +ffffffff8205f7c0 t mmhub_v1_8_setup_vm_pt_regs +ffffffff8205f9f0 t mmhub_v1_8_query_ras_error_count +ffffffff8205fb80 t mmhub_v1_8_query_ras_error_status +ffffffff8205fe80 t mmhub_v1_8_reset_ras_error_count +ffffffff8205ffc0 t mmhub_v1_8_reset_ras_error_status +ffffffff82061000 t mmhub_v2_0_init +ffffffff820610d0 t mmhub_v2_0_gart_enable +ffffffff820624f0 t mmhub_v2_0_set_fault_enable_default +ffffffff82062610 t mmhub_v2_0_gart_disable +ffffffff820628e0 t mmhub_v2_0_set_clockgating +ffffffff82062c70 t mmhub_v2_0_get_clockgating +ffffffff82062e30 t mmhub_v2_0_setup_vm_pt_regs +ffffffff82062f90 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff82063230 t mmhub_v2_0_get_invalidate_req +ffffffff82064000 t mmhub_v2_3_init +ffffffff820640e0 t mmhub_v2_3_gart_enable +ffffffff82065760 t mmhub_v2_3_set_fault_enable_default +ffffffff82065860 t mmhub_v2_3_gart_disable +ffffffff82065b40 t mmhub_v2_3_set_clockgating +ffffffff82066050 t mmhub_v2_3_get_clockgating +ffffffff82066270 t mmhub_v2_3_setup_vm_pt_regs +ffffffff820663c0 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff82066610 t mmhub_v2_3_get_invalidate_req +ffffffff82067000 t mmhub_v3_0_get_fb_location +ffffffff820670a0 t mmhub_v3_0_get_mc_fb_offset +ffffffff82067140 t mmhub_v3_0_init +ffffffff82067220 t mmhub_v3_0_gart_enable +ffffffff82068690 t mmhub_v3_0_set_fault_enable_default +ffffffff820687b0 t mmhub_v3_0_gart_disable +ffffffff82068a80 t mmhub_v3_0_set_clockgating +ffffffff82068c70 t mmhub_v3_0_get_clockgating +ffffffff82068d30 t mmhub_v3_0_setup_vm_pt_regs +ffffffff82068e80 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff820690d0 t mmhub_v3_0_get_invalidate_req +ffffffff8206a000 t mmhub_v3_0_1_get_fb_location +ffffffff8206a0a0 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff8206a140 t mmhub_v3_0_1_init +ffffffff8206a210 t mmhub_v3_0_1_gart_enable +ffffffff8206b7a0 t mmhub_v3_0_1_set_fault_enable_default +ffffffff8206b8a0 t mmhub_v3_0_1_gart_disable +ffffffff8206bb80 t mmhub_v3_0_1_set_clockgating +ffffffff8206bd70 t mmhub_v3_0_1_get_clockgating +ffffffff8206be30 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff8206bf80 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff8206c1d0 t mmhub_v3_0_1_get_invalidate_req +ffffffff8206d000 t mmhub_v3_0_2_get_fb_location +ffffffff8206d0a0 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff8206d140 t mmhub_v3_0_2_init +ffffffff8206d210 t mmhub_v3_0_2_gart_enable +ffffffff8206e660 t mmhub_v3_0_2_set_fault_enable_default +ffffffff8206e780 t mmhub_v3_0_2_gart_disable +ffffffff8206ea50 t mmhub_v3_0_2_set_clockgating +ffffffff8206ea80 t mmhub_v3_0_2_get_clockgating +ffffffff8206eab0 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff8206ec00 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff8206ee30 t mmhub_v3_0_2_get_invalidate_req +ffffffff8206f000 t mmhub_v9_4_query_ras_error_count +ffffffff8206f160 t mmhub_v9_4_query_ras_error_status +ffffffff8206f270 t mmhub_v9_4_reset_ras_error_count +ffffffff8206f340 t mmhub_v9_4_get_fb_location +ffffffff8206f470 t mmhub_v9_4_init +ffffffff8206f5c0 t mmhub_v9_4_gart_enable +ffffffff82070c60 t mmhub_v9_4_set_fault_enable_default +ffffffff82070e70 t mmhub_v9_4_gart_disable +ffffffff82071210 t mmhub_v9_4_set_clockgating +ffffffff82071750 t mmhub_v9_4_get_clockgating +ffffffff82071890 t mmhub_v9_4_setup_vm_pt_regs +ffffffff820718e0 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff82072000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff82072050 T xgpu_ai_mailbox_add_irq_id +ffffffff82072100 T xgpu_ai_mailbox_get_irq +ffffffff820721d0 t xgpu_ai_mailbox_flr_work +ffffffff82072470 T xgpu_ai_mailbox_put_irq +ffffffff820724b0 t xgpu_ai_request_full_gpu_access +ffffffff820724d0 t xgpu_ai_release_full_gpu_access +ffffffff820724f0 t xgpu_ai_request_init_data +ffffffff82072560 t xgpu_ai_request_reset +ffffffff82072630 t xgpu_ai_mailbox_trans_msg +ffffffff820728f0 t xgpu_ai_ras_poison_handler +ffffffff82072920 t xgpu_ai_set_mailbox_ack_irq +ffffffff820729c0 t xgpu_ai_mailbox_ack_irq +ffffffff82072a20 t xgpu_ai_set_mailbox_rcv_irq +ffffffff82072ac0 t xgpu_ai_mailbox_rcv_irq +ffffffff82072bd0 t xgpu_ai_send_access_requests +ffffffff82072cf0 t xgpu_ai_poll_msg +ffffffff82073000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff82073050 T xgpu_nv_mailbox_add_irq_id +ffffffff82073100 T xgpu_nv_mailbox_get_irq +ffffffff820731d0 t xgpu_nv_mailbox_flr_work +ffffffff82073490 T xgpu_nv_mailbox_put_irq +ffffffff820734d0 t xgpu_nv_request_full_gpu_access +ffffffff820734f0 t xgpu_nv_release_full_gpu_access +ffffffff82073510 t xgpu_nv_request_init_data +ffffffff82073530 t xgpu_nv_request_reset +ffffffff82073690 t xgpu_nv_mailbox_trans_msg +ffffffff820738c0 t xgpu_nv_ras_poison_handler +ffffffff820738e0 t xgpu_nv_set_mailbox_ack_irq +ffffffff82073970 t xgpu_nv_mailbox_ack_irq +ffffffff820739d0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff82073a60 t xgpu_nv_mailbox_rcv_irq +ffffffff82073b30 t xgpu_nv_send_access_requests +ffffffff82074000 T xgpu_vi_init_golden_registers +ffffffff820740f0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff82074140 T xgpu_vi_mailbox_add_irq_id +ffffffff820741f0 T xgpu_vi_mailbox_get_irq +ffffffff820742c0 t xgpu_vi_mailbox_flr_work +ffffffff82074460 T xgpu_vi_mailbox_put_irq +ffffffff820744a0 t xgpu_vi_request_full_gpu_access +ffffffff820744c0 t xgpu_vi_release_full_gpu_access +ffffffff820744e0 t xgpu_vi_request_reset +ffffffff82074500 t xgpu_vi_wait_reset_cmpl +ffffffff82074640 t xgpu_vi_set_mailbox_ack_irq +ffffffff820746d0 t xgpu_vi_mailbox_ack_irq +ffffffff82074730 t xgpu_vi_set_mailbox_rcv_irq +ffffffff820747c0 t xgpu_vi_mailbox_rcv_irq +ffffffff82074890 t xgpu_vi_mailbox_rcv_msg +ffffffff820749f0 t xgpu_vi_send_access_requests +ffffffff82075000 t navi10_ih_early_init +ffffffff82075060 t navi10_ih_sw_init +ffffffff820751f0 t navi10_ih_sw_fini +ffffffff82075230 t navi10_ih_hw_init +ffffffff82075710 t navi10_ih_hw_fini +ffffffff82075780 t navi10_ih_suspend +ffffffff820757f0 t navi10_ih_resume +ffffffff82075800 t navi10_ih_is_idle +ffffffff82075830 t navi10_ih_wait_for_idle +ffffffff82075860 t navi10_ih_soft_reset +ffffffff82075890 t navi10_ih_set_clockgating_state +ffffffff820759d0 t navi10_ih_set_powergating_state +ffffffff82075a00 t navi10_ih_get_clockgating_state +ffffffff82075aa0 t navi10_ih_get_wptr +ffffffff82075c00 t navi10_ih_set_rptr +ffffffff82075cf0 t navi10_ih_self_irq +ffffffff82075d70 t navi10_ih_toggle_interrupts +ffffffff82075f00 t force_update_wptr_for_self_int +ffffffff82077000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff82077040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff82077080 t nbio_v2_3_get_pcie_index_offset +ffffffff820770c0 t nbio_v2_3_get_pcie_data_offset +ffffffff82077100 t nbio_v2_3_get_rev_id +ffffffff82077160 t nbio_v2_3_mc_access_enable +ffffffff82077210 t nbio_v2_3_get_memsize +ffffffff82077280 t nbio_v2_3_sdma_doorbell_range +ffffffff82077330 t nbio_v2_3_vcn_doorbell_range +ffffffff820773c0 t nbio_v2_3_enable_doorbell_aperture +ffffffff820774d0 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff82077650 t nbio_v2_3_ih_doorbell_range +ffffffff82077780 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff82077830 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff820778e0 t nbio_v2_3_get_clockgating_state +ffffffff82077970 t nbio_v2_3_ih_control +ffffffff82077ae0 t nbio_v2_3_init_registers +ffffffff82077b80 t nbio_v2_3_remap_hdp_registers +ffffffff82077ca0 t nbio_v2_3_enable_aspm +ffffffff82077d40 t nbio_v2_3_program_aspm +ffffffff820784c0 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff82078560 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff820785e0 t nbio_v2_3_clear_doorbell_interrupt +ffffffff82079000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff82079040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff82079080 t nbio_v4_3_get_pcie_index_offset +ffffffff820790b0 t nbio_v4_3_get_pcie_data_offset +ffffffff820790f0 t nbio_v4_3_get_rev_id +ffffffff82079190 t nbio_v4_3_mc_access_enable +ffffffff82079240 t nbio_v4_3_get_memsize +ffffffff820792b0 t nbio_v4_3_sdma_doorbell_range +ffffffff82079430 t nbio_v4_3_vcn_doorbell_range +ffffffff820795f0 t nbio_v4_3_gc_doorbell_init +ffffffff82079700 t nbio_v4_3_enable_doorbell_aperture +ffffffff82079810 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff82079990 t nbio_v4_3_ih_doorbell_range +ffffffff82079ac0 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff82079c10 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff82079d50 t nbio_v4_3_get_clockgating_state +ffffffff82079e90 t nbio_v4_3_ih_control +ffffffff8207a000 t nbio_v4_3_init_registers +ffffffff8207a140 t nbio_v4_3_remap_hdp_registers +ffffffff8207a260 t nbio_v4_3_program_aspm +ffffffff8207b090 t nbio_v4_3_get_rom_offset +ffffffff8207b130 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff8207b160 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff8207b190 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff8207b1c0 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff8207b1f0 t nbio_v4_3_handle_ras_err_event_athub_intr_no_bifring +ffffffff8207b330 t nbio_v4_3_init_ras_err_event_athub_interrupt +ffffffff8207b370 t nbio_v4_3_set_ras_err_event_athub_irq_state +ffffffff8207b490 t nbio_v4_3_process_err_event_athub_irq +ffffffff8207c000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff8207c040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff8207c080 t nbio_v6_1_get_pcie_index_offset +ffffffff8207c0c0 t nbio_v6_1_get_pcie_data_offset +ffffffff8207c100 t nbio_v6_1_get_rev_id +ffffffff8207c1a0 t nbio_v6_1_mc_access_enable +ffffffff8207c250 t nbio_v6_1_get_memsize +ffffffff8207c2c0 t nbio_v6_1_sdma_doorbell_range +ffffffff8207c360 t nbio_v6_1_enable_doorbell_aperture +ffffffff8207c470 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff8207c5f0 t nbio_v6_1_ih_doorbell_range +ffffffff8207c720 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff8207c7d0 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff8207c880 t nbio_v6_1_get_clockgating_state +ffffffff8207c910 t nbio_v6_1_ih_control +ffffffff8207ca80 t nbio_v6_1_init_registers +ffffffff8207cb60 t nbio_v6_1_remap_hdp_registers +ffffffff8207cc80 t nbio_v6_1_program_aspm +ffffffff8207e000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff8207e040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff8207e080 t nbio_v7_0_get_pcie_index_offset +ffffffff8207e0c0 t nbio_v7_0_get_pcie_data_offset +ffffffff8207e100 t nbio_v7_0_get_rev_id +ffffffff8207e1a0 t nbio_v7_0_mc_access_enable +ffffffff8207e250 t nbio_v7_0_get_memsize +ffffffff8207e2c0 t nbio_v7_0_sdma_doorbell_range +ffffffff8207e360 t nbio_v7_0_vcn_doorbell_range +ffffffff8207e3e0 t nbio_v7_0_enable_doorbell_aperture +ffffffff8207e4f0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff8207e520 t nbio_v7_0_ih_doorbell_range +ffffffff8207e650 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff8207e790 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff8207e840 t nbio_v7_0_get_clockgating_state +ffffffff8207e8d0 t nbio_v7_0_ih_control +ffffffff8207ea40 t nbio_v7_0_init_registers +ffffffff8207ea90 t nbio_v7_0_remap_hdp_registers +ffffffff8207ebb0 t nbio_7_0_read_syshub_ind_mmr +ffffffff8207ec90 t nbio_7_0_write_syshub_ind_mmr +ffffffff8207f000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff8207f040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff8207f080 t nbio_v7_2_get_pcie_index_offset +ffffffff8207f0c0 t nbio_v7_2_get_pcie_data_offset +ffffffff8207f100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff8207f130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff8207f170 t nbio_v7_2_get_rev_id +ffffffff8207f260 t nbio_v7_2_mc_access_enable +ffffffff8207f3a0 t nbio_v7_2_get_memsize +ffffffff8207f410 t nbio_v7_2_sdma_doorbell_range +ffffffff8207f4b0 t nbio_v7_2_vcn_doorbell_range +ffffffff8207f540 t nbio_v7_2_enable_doorbell_aperture +ffffffff8207f630 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff8207f7b0 t nbio_v7_2_ih_doorbell_range +ffffffff8207f840 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff8207f900 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff8207fab0 t nbio_v7_2_get_clockgating_state +ffffffff8207fb50 t nbio_v7_2_ih_control +ffffffff8207fcc0 t nbio_v7_2_init_registers +ffffffff8207fea0 t nbio_v7_2_remap_hdp_registers +ffffffff82080000 t nbio_v7_4_query_ras_error_count +ffffffff820801d0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff82080480 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff82080650 t nbio_v7_4_init_ras_controller_interrupt +ffffffff82080690 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff820806d0 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff82080710 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff82080750 t nbio_v7_4_get_pcie_index_offset +ffffffff82080790 t nbio_v7_4_get_pcie_data_offset +ffffffff820807d0 t nbio_v7_4_get_rev_id +ffffffff820808b0 t nbio_v7_4_mc_access_enable +ffffffff82080960 t nbio_v7_4_get_memsize +ffffffff820809d0 t nbio_v7_4_sdma_doorbell_range +ffffffff82080aa0 t nbio_v7_4_vcn_doorbell_range +ffffffff82080b50 t nbio_v7_4_enable_doorbell_aperture +ffffffff82080c60 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff82080de0 t nbio_v7_4_ih_doorbell_range +ffffffff82080f10 t nbio_v7_4_enable_doorbell_interrupt +ffffffff82081070 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff820810a0 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff82081150 t nbio_v7_4_get_clockgating_state +ffffffff820811e0 t nbio_v7_4_ih_control +ffffffff82081350 t nbio_v7_4_init_registers +ffffffff82081450 t nbio_v7_4_remap_hdp_registers +ffffffff82081570 t nbio_v7_4_program_aspm +ffffffff82081a20 t nbio_v7_4_set_ras_controller_irq_state +ffffffff82081bd0 t nbio_v7_4_process_ras_controller_irq +ffffffff82081c00 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff82081db0 t nbio_v7_4_process_err_event_athub_irq +ffffffff82082000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff82082040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff82082080 t nbio_v7_7_get_pcie_index_offset +ffffffff820820c0 t nbio_v7_7_get_pcie_data_offset +ffffffff82082100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff82082130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff82082170 t nbio_v7_7_get_rev_id +ffffffff82082210 t nbio_v7_7_mc_access_enable +ffffffff820822c0 t nbio_v7_7_get_memsize +ffffffff82082330 t nbio_v7_7_sdma_doorbell_range +ffffffff820823d0 t nbio_v7_7_vcn_doorbell_range +ffffffff82082460 t nbio_v7_7_enable_doorbell_aperture +ffffffff82082550 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff820826d0 t nbio_v7_7_ih_doorbell_range +ffffffff82082800 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff82082950 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff82082b80 t nbio_v7_7_get_clockgating_state +ffffffff82082cc0 t nbio_v7_7_ih_control +ffffffff82082e30 t nbio_v7_7_init_registers +ffffffff82082f50 t nbio_v7_7_remap_hdp_registers +ffffffff82084000 t nbio_v7_9_get_hdp_flush_req_offset +ffffffff82084040 t nbio_v7_9_get_hdp_flush_done_offset +ffffffff82084080 t nbio_v7_9_get_pcie_index_offset +ffffffff820840c0 t nbio_v7_9_get_pcie_data_offset +ffffffff82084100 t nbio_v7_9_get_pcie_index_hi_offset +ffffffff82084140 t nbio_v7_9_get_rev_id +ffffffff820841e0 t nbio_v7_9_mc_access_enable +ffffffff82084290 t nbio_v7_9_get_memsize +ffffffff82084300 t nbio_v7_9_sdma_doorbell_range +ffffffff82084680 t nbio_v7_9_vcn_doorbell_range +ffffffff82084840 t nbio_v7_9_enable_doorbell_aperture +ffffffff820849d0 t nbio_v7_9_enable_doorbell_selfring_aperture +ffffffff82084b50 t nbio_v7_9_ih_doorbell_range +ffffffff82084c70 t nbio_v7_9_enable_doorbell_interrupt +ffffffff82084d90 t nbio_v7_9_update_medium_grain_clock_gating +ffffffff82084dc0 t nbio_v7_9_update_medium_grain_light_sleep +ffffffff82084df0 t nbio_v7_9_get_clockgating_state +ffffffff82084e20 t nbio_v7_9_ih_control +ffffffff82084f90 t nbio_v7_9_init_registers +ffffffff82085320 t nbio_v7_9_remap_hdp_registers +ffffffff82085440 t nbio_v7_9_get_compute_partition_mode +ffffffff820854e0 t nbio_v7_9_get_memory_partition_mode +ffffffff820855e0 t nbio_v7_9_get_pcie_replay_count +ffffffff82085640 t nbio_v7_9_get_pcie_usage +ffffffff82085800 t nbio_v7_9_query_ras_error_count +ffffffff82085830 t nbio_v7_9_handle_ras_controller_intr_no_bifring +ffffffff82085980 t nbio_v7_9_handle_ras_err_event_athub_intr_no_bifring +ffffffff82085ac0 t nbio_v7_9_init_ras_controller_interrupt +ffffffff82085b00 t nbio_v7_9_init_ras_err_event_athub_interrupt +ffffffff82085b40 t nbio_v7_9_set_ras_controller_irq_state +ffffffff82085b70 t nbio_v7_9_process_ras_controller_irq +ffffffff82085ba0 t nbio_v7_9_set_ras_err_event_athub_irq_state +ffffffff82085bd0 t nbio_v7_9_process_err_event_athub_irq +ffffffff82086000 T nv_grbm_select +ffffffff820860a0 T nv_set_virt_ops +ffffffff820860e0 t nv_common_early_init +ffffffff820864e0 t nv_common_late_init +ffffffff820865a0 t nv_common_sw_init +ffffffff820865f0 t nv_common_sw_fini +ffffffff82086620 t nv_common_hw_init +ffffffff82086750 t nv_common_hw_fini +ffffffff820867c0 t nv_common_suspend +ffffffff82086830 t nv_common_resume +ffffffff82086870 t nv_common_is_idle +ffffffff820868a0 t nv_common_wait_for_idle +ffffffff820868d0 t nv_common_soft_reset +ffffffff82086900 t nv_common_set_clockgating_state +ffffffff820869f0 t nv_common_set_powergating_state +ffffffff82086a20 t nv_common_get_clockgating_state +ffffffff82086aa0 t nv_didt_rreg +ffffffff82086b60 t nv_didt_wreg +ffffffff82086c00 t nv_read_disabled_bios +ffffffff82086c30 t nv_read_register +ffffffff82086d30 t nv_asic_reset +ffffffff82086ec0 t nv_asic_reset_method +ffffffff82086fc0 t nv_get_xclk +ffffffff82086ff0 t nv_set_uvd_clocks +ffffffff82087020 t nv_set_vce_clocks +ffffffff82087050 t nv_get_config_memsize +ffffffff82087070 t nv_need_full_reset +ffffffff820870a0 t nv_init_doorbell_index +ffffffff820871d0 t nv_need_reset_on_init +ffffffff82087280 t nv_pre_asic_init +ffffffff820872b0 t nv_update_umd_stable_pstate +ffffffff82087380 t nv_query_video_codecs +ffffffff82088000 T psp_v10_0_set_psp_funcs +ffffffff82088030 t psp_v10_0_init_microcode +ffffffff82088120 t psp_v10_0_ring_create +ffffffff82088510 t psp_v10_0_ring_stop +ffffffff820887c0 t psp_v10_0_ring_destroy +ffffffff82088850 t psp_v10_0_mode1_reset +ffffffff820888a0 t psp_v10_0_ring_get_wptr +ffffffff82088900 t psp_v10_0_ring_set_wptr +ffffffff82089000 T psp_v11_0_set_psp_funcs +ffffffff82089030 t psp_v11_0_init_microcode +ffffffff820891e0 t psp_v11_0_bootloader_load_kdb +ffffffff82089200 t psp_v11_0_bootloader_load_spl +ffffffff82089220 t psp_v11_0_bootloader_load_sysdrv +ffffffff82089240 t psp_v11_0_bootloader_load_sos +ffffffff82089690 t psp_v11_0_ring_create +ffffffff82089f10 t psp_v11_0_ring_stop +ffffffff8208a1f0 t psp_v11_0_ring_destroy +ffffffff8208a280 t psp_v11_0_mode1_reset +ffffffff8208a3b0 t psp_v11_0_memory_training +ffffffff8208a940 t psp_v11_0_ring_get_wptr +ffffffff8208a990 t psp_v11_0_ring_set_wptr +ffffffff8208aaf0 t psp_v11_0_load_usbc_pd_fw +ffffffff8208ad20 t psp_v11_0_read_usbc_pd_fw +ffffffff8208ae60 t psp_v11_0_bootloader_load_component +ffffffff8208b050 t psp_v11_0_wait_for_bootloader +ffffffff8208b270 t psp_v11_0_memory_training_send_msg +ffffffff8208c000 T psp_v11_0_8_set_psp_funcs +ffffffff8208c030 t psp_v11_0_8_ring_create +ffffffff8208c8b0 t psp_v11_0_8_ring_stop +ffffffff8208cdb0 t psp_v11_0_8_ring_destroy +ffffffff8208ce40 t psp_v11_0_8_ring_get_wptr +ffffffff8208ceb0 t psp_v11_0_8_ring_set_wptr +ffffffff8208d000 T psp_v12_0_set_psp_funcs +ffffffff8208d030 t psp_v12_0_init_microcode +ffffffff8208d100 t psp_v12_0_bootloader_load_sysdrv +ffffffff8208d520 t psp_v12_0_bootloader_load_sos +ffffffff8208d990 t psp_v12_0_ring_create +ffffffff8208e670 t psp_v12_0_ring_stop +ffffffff8208e950 t psp_v12_0_ring_destroy +ffffffff8208e9e0 t psp_v12_0_mode1_reset +ffffffff8208eb10 t psp_v12_0_ring_get_wptr +ffffffff8208eb80 t psp_v12_0_ring_set_wptr +ffffffff8208f000 T psp_v13_0_set_psp_funcs +ffffffff8208f030 t psp_v13_0_init_microcode +ffffffff8208f160 t psp_v13_0_wait_for_bootloader_steady_state +ffffffff8208f290 t psp_v13_0_bootloader_load_kdb +ffffffff8208f2b0 t psp_v13_0_bootloader_load_spl +ffffffff8208f2d0 t psp_v13_0_bootloader_load_sysdrv +ffffffff8208f2f0 t psp_v13_0_bootloader_load_soc_drv +ffffffff8208f310 t psp_v13_0_bootloader_load_intf_drv +ffffffff8208f330 t psp_v13_0_bootloader_load_dbg_drv +ffffffff8208f350 t psp_v13_0_bootloader_load_ras_drv +ffffffff8208f370 t psp_v13_0_bootloader_load_sos +ffffffff8208f830 t psp_v13_0_ring_create +ffffffff820900b0 t psp_v13_0_ring_stop +ffffffff820905b0 t psp_v13_0_ring_destroy +ffffffff82090640 t psp_v13_0_memory_training +ffffffff82090b20 t psp_v13_0_ring_get_wptr +ffffffff82090b90 t psp_v13_0_ring_set_wptr +ffffffff82090ca0 t psp_v13_0_load_usbc_pd_fw +ffffffff82090ed0 t psp_v13_0_read_usbc_pd_fw +ffffffff82091010 t psp_v13_0_update_spirom +ffffffff82091230 t psp_v13_0_vbflash_status +ffffffff82091290 t psp_v13_0_fatal_error_recovery_quirk +ffffffff820913f0 t psp_v13_0_bootloader_load_component +ffffffff820916b0 t psp_v13_0_memory_training_send_msg +ffffffff82091830 t psp_v13_0_exec_spi_cmd +ffffffff82092000 T psp_v13_0_4_set_psp_funcs +ffffffff82092030 t psp_v13_0_4_init_microcode +ffffffff820920f0 t psp_v13_0_4_bootloader_load_kdb +ffffffff82092110 t psp_v13_0_4_bootloader_load_spl +ffffffff82092130 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff82092150 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff82092170 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff82092190 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff820921b0 t psp_v13_0_4_bootloader_load_sos +ffffffff82092620 t psp_v13_0_4_ring_create +ffffffff82092eb0 t psp_v13_0_4_ring_stop +ffffffff820933c0 t psp_v13_0_4_ring_destroy +ffffffff82093450 t psp_v13_0_4_ring_get_wptr +ffffffff820934c0 t psp_v13_0_4_ring_set_wptr +ffffffff820935e0 t psp_v13_0_4_bootloader_load_component +ffffffff820937f0 t psp_v13_0_4_wait_for_bootloader +ffffffff82094000 T psp_v3_1_set_psp_funcs +ffffffff82094030 t psp_v3_1_init_microcode +ffffffff820940f0 t psp_v3_1_bootloader_load_sysdrv +ffffffff82094510 t psp_v3_1_bootloader_load_sos +ffffffff82094980 t psp_v3_1_ring_create +ffffffff82095840 t psp_v3_1_ring_stop +ffffffff82095b20 t psp_v3_1_ring_destroy +ffffffff82095bb0 t psp_v3_1_smu_reload_quirk +ffffffff82095c00 t psp_v3_1_mode1_reset +ffffffff82095d30 t psp_v3_1_ring_get_wptr +ffffffff82095d80 t psp_v3_1_ring_set_wptr +ffffffff82096000 t sdma_v2_4_early_init +ffffffff820960f0 t sdma_v2_4_sw_init +ffffffff82096520 t sdma_v2_4_sw_fini +ffffffff820965f0 t sdma_v2_4_hw_init +ffffffff82096aa0 t sdma_v2_4_hw_fini +ffffffff82096af0 t sdma_v2_4_suspend +ffffffff82096b40 t sdma_v2_4_resume +ffffffff82096b50 t sdma_v2_4_is_idle +ffffffff82096ba0 t sdma_v2_4_wait_for_idle +ffffffff82096c50 t sdma_v2_4_soft_reset +ffffffff82096e00 t sdma_v2_4_set_clockgating_state +ffffffff82096e30 t sdma_v2_4_set_powergating_state +ffffffff82096e60 t sdma_v2_4_ring_get_rptr +ffffffff82096ea0 t sdma_v2_4_ring_get_wptr +ffffffff82096f00 t sdma_v2_4_ring_set_wptr +ffffffff82096f40 t sdma_v2_4_ring_emit_ib +ffffffff82097220 t sdma_v2_4_ring_emit_fence +ffffffff82097670 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff82097920 t sdma_v2_4_ring_emit_vm_flush +ffffffff82097bd0 t sdma_v2_4_ring_emit_hdp_flush +ffffffff82097e80 t sdma_v2_4_ring_test_ring +ffffffff820981b0 t sdma_v2_4_ring_test_ib +ffffffff820983c0 t sdma_v2_4_ring_insert_nop +ffffffff82098500 t sdma_v2_4_ring_pad_ib +ffffffff82098630 t sdma_v2_4_ring_emit_wreg +ffffffff82098790 t sdma_v2_4_emit_copy_buffer +ffffffff82098850 t sdma_v2_4_emit_fill_buffer +ffffffff820988e0 t sdma_v2_4_vm_copy_pte +ffffffff820989a0 t sdma_v2_4_vm_write_pte +ffffffff82098a70 t sdma_v2_4_vm_set_pte_pde +ffffffff82098b70 t sdma_v2_4_set_trap_irq_state +ffffffff82098c60 t sdma_v2_4_process_trap_irq +ffffffff82098d00 t sdma_v2_4_process_illegal_inst_irq +ffffffff82098d80 t sdma_v2_4_enable +ffffffff82099000 t sdma_v3_0_early_init +ffffffff82099100 t sdma_v3_0_sw_init +ffffffff82099530 t sdma_v3_0_sw_fini +ffffffff82099600 t sdma_v3_0_hw_init +ffffffff82099770 t sdma_v3_0_hw_fini +ffffffff820997d0 t sdma_v3_0_suspend +ffffffff82099830 t sdma_v3_0_resume +ffffffff82099840 t sdma_v3_0_is_idle +ffffffff82099890 t sdma_v3_0_wait_for_idle +ffffffff82099940 t sdma_v3_0_check_soft_reset +ffffffff820999a0 t sdma_v3_0_pre_soft_reset +ffffffff82099a00 t sdma_v3_0_soft_reset +ffffffff82099b00 t sdma_v3_0_post_soft_reset +ffffffff82099b50 t sdma_v3_0_set_clockgating_state +ffffffff82099e00 t sdma_v3_0_set_powergating_state +ffffffff82099e30 t sdma_v3_0_get_clockgating_state +ffffffff82099ed0 t sdma_v3_0_ring_get_rptr +ffffffff82099f10 t sdma_v3_0_ring_get_wptr +ffffffff82099f90 t sdma_v3_0_ring_set_wptr +ffffffff8209a040 t sdma_v3_0_ring_emit_ib +ffffffff8209a320 t sdma_v3_0_ring_emit_fence +ffffffff8209a770 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff8209aa20 t sdma_v3_0_ring_emit_vm_flush +ffffffff8209acd0 t sdma_v3_0_ring_emit_hdp_flush +ffffffff8209af80 t sdma_v3_0_ring_test_ring +ffffffff8209b2b0 t sdma_v3_0_ring_test_ib +ffffffff8209b4c0 t sdma_v3_0_ring_insert_nop +ffffffff8209b600 t sdma_v3_0_ring_pad_ib +ffffffff8209b730 t sdma_v3_0_ring_emit_wreg +ffffffff8209b890 t sdma_v3_0_emit_copy_buffer +ffffffff8209b950 t sdma_v3_0_emit_fill_buffer +ffffffff8209b9e0 t sdma_v3_0_vm_copy_pte +ffffffff8209baa0 t sdma_v3_0_vm_write_pte +ffffffff8209bb70 t sdma_v3_0_vm_set_pte_pde +ffffffff8209bc70 t sdma_v3_0_set_trap_irq_state +ffffffff8209bd60 t sdma_v3_0_process_trap_irq +ffffffff8209be00 t sdma_v3_0_process_illegal_inst_irq +ffffffff8209be80 t sdma_v3_0_ctx_switch_enable +ffffffff8209c050 t sdma_v3_0_enable +ffffffff8209c200 t sdma_v3_0_gfx_resume +ffffffff8209d000 t sdma_v4_0_early_init +ffffffff8209d2f0 t sdma_v4_0_late_init +ffffffff8209d5b0 t sdma_v4_0_sw_init +ffffffff8209da60 t sdma_v4_0_sw_fini +ffffffff8209db30 t sdma_v4_0_hw_init +ffffffff820a0cf0 t sdma_v4_0_hw_fini +ffffffff820a0df0 t sdma_v4_0_suspend +ffffffff820a0e50 t sdma_v4_0_resume +ffffffff820a0ee0 t sdma_v4_0_is_idle +ffffffff820a1010 t sdma_v4_0_wait_for_idle +ffffffff820a11c0 t sdma_v4_0_soft_reset +ffffffff820a11f0 t sdma_v4_0_set_clockgating_state +ffffffff820a1720 t sdma_v4_0_set_powergating_state +ffffffff820a1800 t sdma_v4_0_get_clockgating_state +ffffffff820a18b0 t sdma_v4_0_query_ras_error_count +ffffffff820a1aa0 t sdma_v4_0_reset_ras_error_count +ffffffff820a1c20 t sdma_v4_0_ring_get_rptr +ffffffff820a1c80 t sdma_v4_0_ring_get_wptr +ffffffff820a1e90 t sdma_v4_0_ring_set_wptr +ffffffff820a2140 t sdma_v4_0_ring_emit_ib +ffffffff820a2420 t sdma_v4_0_ring_emit_fence +ffffffff820a2890 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff820a28f0 t sdma_v4_0_ring_emit_vm_flush +ffffffff820a2910 t sdma_v4_0_ring_emit_hdp_flush +ffffffff820a29d0 t sdma_v4_0_ring_test_ring +ffffffff820a2d00 t sdma_v4_0_ring_test_ib +ffffffff820a2f10 t sdma_v4_0_ring_insert_nop +ffffffff820a3050 t sdma_v4_0_ring_pad_ib +ffffffff820a3180 t sdma_v4_0_ring_emit_wreg +ffffffff820a32e0 t sdma_v4_0_ring_emit_reg_wait +ffffffff820a3330 t sdma_v4_0_wait_reg_mem +ffffffff820a3680 t sdma_v4_0_page_ring_get_wptr +ffffffff820a3840 t sdma_v4_0_page_ring_set_wptr +ffffffff820a3a10 t sdma_v4_0_emit_copy_buffer +ffffffff820a3ad0 t sdma_v4_0_emit_fill_buffer +ffffffff820a3b60 t sdma_v4_0_vm_copy_pte +ffffffff820a3c20 t sdma_v4_0_vm_write_pte +ffffffff820a3cf0 t sdma_v4_0_vm_set_pte_pde +ffffffff820a3df0 t sdma_v4_0_set_trap_irq_state +ffffffff820a3fa0 t sdma_v4_0_process_trap_irq +ffffffff820a4100 t sdma_v4_0_process_illegal_inst_irq +ffffffff820a4220 t sdma_v4_0_set_ecc_irq_state +ffffffff820a43d0 t sdma_v4_0_process_vm_hole_irq +ffffffff820a4420 t sdma_v4_0_print_iv_entry +ffffffff820a4570 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff820a45c0 t sdma_v4_0_process_pool_timeout_irq +ffffffff820a4610 t sdma_v4_0_process_srbm_write_irq +ffffffff820a4660 t sdma_v4_0_process_ras_data_cb +ffffffff820a46e0 t sdma_v4_0_ctx_switch_enable +ffffffff820a4e00 t sdma_v4_0_enable +ffffffff820a53f0 t sdma_v4_0_gfx_enable +ffffffff820a6000 t sdma_v4_4_query_ras_error_count +ffffffff820a62b0 t sdma_v4_4_reset_ras_error_count +ffffffff820a7000 t sdma_v4_4_2_early_init +ffffffff820a72b0 t sdma_v4_4_2_late_init +ffffffff820a7340 t sdma_v4_4_2_sw_init +ffffffff820a7920 t sdma_v4_4_2_sw_fini +ffffffff820a79f0 t sdma_v4_4_2_hw_init +ffffffff820a7a40 t sdma_v4_4_2_hw_fini +ffffffff820a7b20 t sdma_v4_4_2_suspend +ffffffff820a7c30 t sdma_v4_4_2_resume +ffffffff820a7c80 t sdma_v4_4_2_is_idle +ffffffff820a7d30 t sdma_v4_4_2_wait_for_idle +ffffffff820a7e60 t sdma_v4_4_2_soft_reset +ffffffff820a7e90 t sdma_v4_4_2_set_clockgating_state +ffffffff820a8350 t sdma_v4_4_2_set_powergating_state +ffffffff820a8380 t sdma_v4_4_2_get_clockgating_state +ffffffff820a8480 t sdma_v4_4_2_xcp_suspend +ffffffff820a8570 t sdma_v4_4_2_xcp_resume +ffffffff820a85b0 t sdma_v4_4_2_ring_get_rptr +ffffffff820a8630 t sdma_v4_4_2_ring_get_wptr +ffffffff820a8790 t sdma_v4_4_2_ring_set_wptr +ffffffff820a8990 t sdma_v4_4_2_ring_emit_ib +ffffffff820a8c70 t sdma_v4_4_2_ring_emit_fence +ffffffff820a90e0 t sdma_v4_4_2_ring_emit_pipeline_sync +ffffffff820a9140 t sdma_v4_4_2_ring_emit_vm_flush +ffffffff820a9160 t sdma_v4_4_2_ring_emit_hdp_flush +ffffffff820a9230 t sdma_v4_4_2_ring_test_ring +ffffffff820a9560 t sdma_v4_4_2_ring_test_ib +ffffffff820a9770 t sdma_v4_4_2_ring_insert_nop +ffffffff820a98b0 t sdma_v4_4_2_ring_pad_ib +ffffffff820a99e0 t sdma_v4_4_2_ring_emit_wreg +ffffffff820a9b40 t sdma_v4_4_2_ring_emit_reg_wait +ffffffff820a9b90 t sdma_v4_4_2_wait_reg_mem +ffffffff820a9ee0 t sdma_v4_4_2_page_ring_get_wptr +ffffffff820aa000 t sdma_v4_4_2_page_ring_set_wptr +ffffffff820aa130 t sdma_v4_4_2_emit_copy_buffer +ffffffff820aa1f0 t sdma_v4_4_2_emit_fill_buffer +ffffffff820aa280 t sdma_v4_4_2_vm_copy_pte +ffffffff820aa340 t sdma_v4_4_2_vm_write_pte +ffffffff820aa410 t sdma_v4_4_2_vm_set_pte_pde +ffffffff820aa510 t sdma_v4_4_2_set_trap_irq_state +ffffffff820aa610 t sdma_v4_4_2_process_trap_irq +ffffffff820aa740 t sdma_v4_4_2_process_illegal_inst_irq +ffffffff820aa7e0 t sdma_v4_4_2_set_ecc_irq_state +ffffffff820aa8f0 t sdma_v4_4_2_process_vm_hole_irq +ffffffff820aa9e0 t sdma_v4_4_2_process_doorbell_invalid_irq +ffffffff820aaad0 t sdma_v4_4_2_process_pool_timeout_irq +ffffffff820aabc0 t sdma_v4_4_2_process_srbm_write_irq +ffffffff820aacb0 t sdma_v4_4_2_query_ras_error_count +ffffffff820aae30 t sdma_v4_4_2_reset_ras_error_count +ffffffff820aafa0 t sdma_v4_4_2_inst_init_golden_registers +ffffffff820ab170 t sdma_v4_4_2_inst_start +ffffffff820ac9a0 t sdma_v4_4_2_inst_ctx_switch_enable +ffffffff820accf0 t sdma_v4_4_2_inst_enable +ffffffff820ae000 t sdma_v5_0_early_init +ffffffff820ae130 t sdma_v5_0_sw_init +ffffffff820ae350 t sdma_v5_0_sw_fini +ffffffff820ae3f0 t sdma_v5_0_hw_init +ffffffff820af8c0 t sdma_v5_0_hw_fini +ffffffff820af930 t sdma_v5_0_suspend +ffffffff820af9a0 t sdma_v5_0_resume +ffffffff820af9b0 t sdma_v5_0_is_idle +ffffffff820afa50 t sdma_v5_0_wait_for_idle +ffffffff820afb30 t sdma_v5_0_soft_reset +ffffffff820afb60 t sdma_v5_0_set_clockgating_state +ffffffff820afd80 t sdma_v5_0_set_powergating_state +ffffffff820afdb0 t sdma_v5_0_get_clockgating_state +ffffffff820afe60 t sdma_v5_0_ring_get_rptr +ffffffff820afec0 t sdma_v5_0_ring_get_wptr +ffffffff820b0080 t sdma_v5_0_ring_set_wptr +ffffffff820b0430 t sdma_v5_0_ring_emit_ib +ffffffff820b0730 t sdma_v5_0_ring_emit_fence +ffffffff820b0be0 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff820b0e90 t sdma_v5_0_ring_emit_vm_flush +ffffffff820b0eb0 t sdma_v5_0_ring_emit_hdp_flush +ffffffff820b1180 t sdma_v5_0_ring_test_ring +ffffffff820b15b0 t sdma_v5_0_ring_test_ib +ffffffff820b1940 t sdma_v5_0_ring_insert_nop +ffffffff820b1a80 t sdma_v5_0_ring_pad_ib +ffffffff820b1bb0 t sdma_v5_0_ring_init_cond_exec +ffffffff820b1e00 t sdma_v5_0_ring_patch_cond_exec +ffffffff820b1ec0 t sdma_v5_0_ring_emit_wreg +ffffffff820b2020 t sdma_v5_0_ring_emit_reg_wait +ffffffff820b22c0 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff820b2350 t sdma_v5_0_ring_preempt_ib +ffffffff820b24e0 t sdma_v5_0_ring_emit_mem_sync +ffffffff820b2710 t sdma_v5_0_emit_copy_buffer +ffffffff820b27d0 t sdma_v5_0_emit_fill_buffer +ffffffff820b2860 t sdma_v5_0_vm_copy_pte +ffffffff820b2920 t sdma_v5_0_vm_write_pte +ffffffff820b29f0 t sdma_v5_0_vm_set_pte_pde +ffffffff820b2af0 t sdma_v5_0_set_trap_irq_state +ffffffff820b2b90 t sdma_v5_0_process_trap_irq +ffffffff820b2cd0 t sdma_v5_0_process_illegal_inst_irq +ffffffff820b2d00 t sdma_v5_0_mqd_init +ffffffff820b2df0 t sdma_v5_0_ctx_switch_enable +ffffffff820b3170 t sdma_v5_0_enable +ffffffff820b4000 t sdma_v5_2_early_init +ffffffff820b4130 t sdma_v5_2_sw_init +ffffffff820b43f0 t sdma_v5_2_sw_fini +ffffffff820b4490 t sdma_v5_2_hw_init +ffffffff820b62c0 t sdma_v5_2_hw_fini +ffffffff820b6330 t sdma_v5_2_suspend +ffffffff820b63a0 t sdma_v5_2_resume +ffffffff820b63b0 t sdma_v5_2_is_idle +ffffffff820b6470 t sdma_v5_2_wait_for_idle +ffffffff820b65a0 t sdma_v5_2_soft_reset +ffffffff820b68c0 t sdma_v5_2_set_clockgating_state +ffffffff820b6c60 t sdma_v5_2_set_powergating_state +ffffffff820b6c90 t sdma_v5_2_get_clockgating_state +ffffffff820b6d40 t sdma_v5_2_ring_get_rptr +ffffffff820b6da0 t sdma_v5_2_ring_get_wptr +ffffffff820b6ef0 t sdma_v5_2_ring_set_wptr +ffffffff820b70d0 t sdma_v5_2_ring_emit_ib +ffffffff820b73d0 t sdma_v5_2_ring_emit_fence +ffffffff820b7880 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff820b7b30 t sdma_v5_2_ring_emit_vm_flush +ffffffff820b7b50 t sdma_v5_2_ring_emit_hdp_flush +ffffffff820b7e50 t sdma_v5_2_ring_test_ring +ffffffff820b8280 t sdma_v5_2_ring_test_ib +ffffffff820b8610 t sdma_v5_2_ring_insert_nop +ffffffff820b8750 t sdma_v5_2_ring_pad_ib +ffffffff820b8880 t sdma_v5_2_ring_init_cond_exec +ffffffff820b8ad0 t sdma_v5_2_ring_patch_cond_exec +ffffffff820b8b90 t sdma_v5_2_ring_begin_use +ffffffff820b8bb0 t sdma_v5_2_ring_end_use +ffffffff820b8bd0 t sdma_v5_2_ring_emit_wreg +ffffffff820b8d30 t sdma_v5_2_ring_emit_reg_wait +ffffffff820b8fd0 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff820b9060 t sdma_v5_2_ring_preempt_ib +ffffffff820b9220 t sdma_v5_2_ring_emit_mem_sync +ffffffff820b9450 t sdma_v5_2_emit_copy_buffer +ffffffff820b9510 t sdma_v5_2_emit_fill_buffer +ffffffff820b95a0 t sdma_v5_2_vm_copy_pte +ffffffff820b9660 t sdma_v5_2_vm_write_pte +ffffffff820b9730 t sdma_v5_2_vm_set_pte_pde +ffffffff820b9830 t sdma_v5_2_set_trap_irq_state +ffffffff820b98f0 t sdma_v5_2_process_trap_irq +ffffffff820b9a60 t sdma_v5_2_process_illegal_inst_irq +ffffffff820b9a90 t sdma_v5_2_mqd_init +ffffffff820b9b80 t sdma_v5_2_ctx_switch_enable +ffffffff820b9fd0 t sdma_v5_2_enable +ffffffff820bb000 t sdma_v6_0_early_init +ffffffff820bb120 t sdma_v6_0_sw_init +ffffffff820bb330 t sdma_v6_0_sw_fini +ffffffff820bb3d0 t sdma_v6_0_hw_init +ffffffff820bb3e0 t sdma_v6_0_hw_fini +ffffffff820bb4d0 t sdma_v6_0_suspend +ffffffff820bb510 t sdma_v6_0_resume +ffffffff820bb520 t sdma_v6_0_is_idle +ffffffff820bb5c0 t sdma_v6_0_wait_for_idle +ffffffff820bb6a0 t sdma_v6_0_check_soft_reset +ffffffff820bb770 t sdma_v6_0_soft_reset +ffffffff820bbcc0 t sdma_v6_0_set_clockgating_state +ffffffff820bbcf0 t sdma_v6_0_set_powergating_state +ffffffff820bbd20 t sdma_v6_0_get_clockgating_state +ffffffff820bbd50 t sdma_v6_0_ring_get_rptr +ffffffff820bbdb0 t sdma_v6_0_ring_get_wptr +ffffffff820bbe30 t sdma_v6_0_ring_set_wptr +ffffffff820bc1e0 t sdma_v6_0_ring_emit_ib +ffffffff820bc4e0 t sdma_v6_0_ring_emit_fence +ffffffff820bc990 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff820bcc40 t sdma_v6_0_ring_emit_vm_flush +ffffffff820bcee0 t sdma_v6_0_ring_emit_hdp_flush +ffffffff820bd1b0 t sdma_v6_0_ring_test_ring +ffffffff820bd5e0 t sdma_v6_0_ring_test_ib +ffffffff820bd970 t sdma_v6_0_ring_insert_nop +ffffffff820bdab0 t sdma_v6_0_ring_pad_ib +ffffffff820bdbe0 t sdma_v6_0_ring_init_cond_exec +ffffffff820bde30 t sdma_v6_0_ring_patch_cond_exec +ffffffff820bdef0 t sdma_v6_0_ring_emit_wreg +ffffffff820be050 t sdma_v6_0_ring_emit_reg_wait +ffffffff820be2f0 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff820be380 t sdma_v6_0_ring_preempt_ib +ffffffff820be510 t sdma_v6_0_ring_emit_mem_sync +ffffffff820be740 t sdma_v6_0_emit_copy_buffer +ffffffff820be800 t sdma_v6_0_emit_fill_buffer +ffffffff820be890 t sdma_v6_0_vm_copy_pte +ffffffff820be950 t sdma_v6_0_vm_write_pte +ffffffff820bea20 t sdma_v6_0_vm_set_pte_pde +ffffffff820beb20 t sdma_v6_0_set_trap_irq_state +ffffffff820bebc0 t sdma_v6_0_process_trap_irq +ffffffff820bed20 t sdma_v6_0_process_illegal_inst_irq +ffffffff820bed50 t sdma_v6_0_mqd_init +ffffffff820bee80 t sdma_v6_0_start +ffffffff820bf1e0 t sdma_v6_0_enable +ffffffff820bf380 t sdma_v6_0_gfx_resume +ffffffff820c05c0 t sdma_v6_0_gfx_stop +ffffffff820c1000 T sienna_cichlid_reset_init +ffffffff820c10e0 t sienna_cichlid_async_reset +ffffffff820c1140 t sienna_cichlid_get_reset_handler +ffffffff820c11d0 T sienna_cichlid_reset_fini +ffffffff820c1230 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff820c13a0 t sienna_cichlid_mode2_perform_reset +ffffffff820c1430 t sienna_cichlid_mode2_restore_hwcontext +ffffffff820c17a0 t sienna_cichlid_mode2_reset +ffffffff820c2000 T smu_v11_0_i2c_control_init +ffffffff820c20e0 T smu_v11_0_i2c_control_fini +ffffffff820c2120 t smu_v11_0_i2c_xfer +ffffffff820c3490 t smu_v11_0_i2c_func +ffffffff820c34c0 t smu_v11_0_i2c_enable +ffffffff820c3620 t smu_v11_0_i2c_abort +ffffffff820c3740 t lock_bus +ffffffff820c37f0 t trylock_bus +ffffffff820c3850 t unlock_bus +ffffffff820c4000 T smu_v13_0_10_reset_init +ffffffff820c40e0 t smu_v13_0_10_async_reset +ffffffff820c4140 t smu_v13_0_10_get_reset_handler +ffffffff820c41f0 T smu_v13_0_10_reset_fini +ffffffff820c4250 t smu_v13_0_10_mode2_prepare_hwcontext +ffffffff820c43a0 t smu_v13_0_10_mode2_perform_reset +ffffffff820c4430 t smu_v13_0_10_mode2_restore_hwcontext +ffffffff820c4820 t smu_v13_0_10_mode2_reset +ffffffff820c5000 t smuio_v11_0_get_rom_index_offset +ffffffff820c5040 t smuio_v11_0_get_rom_data_offset +ffffffff820c5080 t smuio_v11_0_update_rom_clock_gating +ffffffff820c51d0 t smuio_v11_0_get_clock_gating_state +ffffffff820c6000 t smuio_v11_0_6_get_rom_index_offset +ffffffff820c6040 t smuio_v11_0_6_get_rom_data_offset +ffffffff820c6080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff820c61e0 t smuio_v11_0_6_get_clock_gating_state +ffffffff820c7000 t smuio_v13_0_get_rom_index_offset +ffffffff820c7040 t smuio_v13_0_get_rom_data_offset +ffffffff820c7080 t smuio_v13_0_update_rom_clock_gating +ffffffff820c71e0 t smuio_v13_0_get_clock_gating_state +ffffffff820c7290 t smuio_v13_0_get_die_id +ffffffff820c7320 t smuio_v13_0_get_socket_id +ffffffff820c73c0 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff820c8000 t smuio_v13_0_3_get_die_id +ffffffff820c80a0 t smuio_v13_0_3_get_socket_id +ffffffff820c8140 t smuio_v13_0_3_get_pkg_type +ffffffff820c9000 t smuio_v13_0_6_get_rom_index_offset +ffffffff820c9040 t smuio_v13_0_6_get_rom_data_offset +ffffffff820ca000 t smuio_v9_0_get_rom_index_offset +ffffffff820ca040 t smuio_v9_0_get_rom_data_offset +ffffffff820ca080 t smuio_v9_0_update_rom_clock_gating +ffffffff820ca1e0 t smuio_v9_0_get_clock_gating_state +ffffffff820cb000 T soc15_grbm_select +ffffffff820cb090 T soc15_program_register_sequence +ffffffff820cb2b0 T soc15_set_virt_ops +ffffffff820cb320 t soc15_common_early_init +ffffffff820cb750 t soc15_common_late_init +ffffffff820cb7c0 t soc15_common_sw_init +ffffffff820cb820 t soc15_common_sw_fini +ffffffff820cb880 t soc15_common_hw_init +ffffffff820cb9d0 t soc15_common_hw_fini +ffffffff820cbad0 t soc15_common_suspend +ffffffff820cbb10 t soc15_common_resume +ffffffff820cbc00 t soc15_common_is_idle +ffffffff820cbc30 t soc15_common_wait_for_idle +ffffffff820cbc60 t soc15_common_soft_reset +ffffffff820cbc90 t soc15_common_set_clockgating_state +ffffffff820cc040 t soc15_common_set_powergating_state +ffffffff820cc070 t soc15_common_get_clockgating_state +ffffffff820cc1b0 t soc15_uvd_ctx_rreg +ffffffff820cc280 t soc15_uvd_ctx_wreg +ffffffff820cc320 t soc15_didt_rreg +ffffffff820cc3e0 t soc15_didt_wreg +ffffffff820cc480 t soc15_gc_cac_rreg +ffffffff820cc5d0 t soc15_gc_cac_wreg +ffffffff820cc710 t soc15_se_cac_rreg +ffffffff820cc860 t soc15_se_cac_wreg +ffffffff820cc9a0 t soc15_read_disabled_bios +ffffffff820cc9d0 t soc15_read_register +ffffffff820ccae0 t soc15_asic_reset +ffffffff820cccb0 t soc15_asic_reset_method +ffffffff820cce80 t soc15_get_xclk +ffffffff820ccef0 t soc15_set_uvd_clocks +ffffffff820ccf20 t soc15_set_vce_clocks +ffffffff820ccf50 t soc15_get_config_memsize +ffffffff820ccf70 t soc15_need_full_reset +ffffffff820ccfa0 t soc15_get_pcie_usage +ffffffff820cd110 t soc15_need_reset_on_init +ffffffff820cd1d0 t soc15_get_pcie_replay_count +ffffffff820cd250 t soc15_supports_baco +ffffffff820cd2c0 t soc15_pre_asic_init +ffffffff820cd2d0 t soc15_query_video_codecs +ffffffff820cd3c0 t vega20_get_pcie_usage +ffffffff820ce000 T soc21_grbm_select +ffffffff820ce090 t soc21_common_early_init +ffffffff820ce210 t soc21_common_late_init +ffffffff820ce310 t soc21_common_sw_init +ffffffff820ce360 t soc21_common_sw_fini +ffffffff820ce390 t soc21_common_hw_init +ffffffff820ce470 t soc21_common_hw_fini +ffffffff820ce520 t soc21_common_suspend +ffffffff820ce5d0 t soc21_common_resume +ffffffff820ce7e0 t soc21_common_is_idle +ffffffff820ce810 t soc21_common_wait_for_idle +ffffffff820ce840 t soc21_common_soft_reset +ffffffff820ce870 t soc21_common_set_clockgating_state +ffffffff820ce930 t soc21_common_set_powergating_state +ffffffff820ce9a0 t soc21_common_get_clockgating_state +ffffffff820ce9f0 t soc21_didt_rreg +ffffffff820ceab0 t soc21_didt_wreg +ffffffff820ceb50 t soc21_read_disabled_bios +ffffffff820ceb80 t soc21_read_register +ffffffff820cec80 t soc21_asic_reset +ffffffff820ced70 t soc21_asic_reset_method +ffffffff820cee50 t soc21_get_xclk +ffffffff820cee80 t soc21_set_uvd_clocks +ffffffff820ceeb0 t soc21_set_vce_clocks +ffffffff820ceee0 t soc21_get_config_memsize +ffffffff820cef00 t soc21_need_full_reset +ffffffff820cef30 t soc21_init_doorbell_index +ffffffff820cf050 t soc21_need_reset_on_init +ffffffff820cf100 t soc21_pre_asic_init +ffffffff820cf130 t soc21_update_umd_stable_pstate +ffffffff820cf1b0 t soc21_query_video_codecs +ffffffff820d0000 t tonga_ih_early_init +ffffffff820d0050 t tonga_ih_sw_init +ffffffff820d00e0 t tonga_ih_sw_fini +ffffffff820d0140 t tonga_ih_hw_init +ffffffff820d03c0 t tonga_ih_hw_fini +ffffffff820d0490 t tonga_ih_suspend +ffffffff820d0560 t tonga_ih_resume +ffffffff820d05a0 t tonga_ih_is_idle +ffffffff820d05f0 t tonga_ih_wait_for_idle +ffffffff820d06a0 t tonga_ih_check_soft_reset +ffffffff820d0700 t tonga_ih_pre_soft_reset +ffffffff820d07e0 t tonga_ih_soft_reset +ffffffff820d08e0 t tonga_ih_post_soft_reset +ffffffff820d0930 t tonga_ih_set_clockgating_state +ffffffff820d0960 t tonga_ih_set_powergating_state +ffffffff820d0990 t tonga_ih_get_wptr +ffffffff820d0ac0 t tonga_ih_decode_iv +ffffffff820d0b40 t tonga_ih_set_rptr +ffffffff820d1000 t umc_v6_0_init_registers +ffffffff820d2000 t umc_v6_1_query_ras_error_count +ffffffff820d25c0 t umc_v6_1_query_ras_error_address +ffffffff820d28f0 t umc_v6_1_err_cnt_init +ffffffff820d3000 T umc_v6_7_convert_error_address +ffffffff820d33a0 t umc_v6_7_query_ras_error_count +ffffffff820d33e0 t umc_v6_7_query_ras_error_address +ffffffff820d3400 t umc_v6_7_query_ras_poison_mode +ffffffff820d3460 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff820d3480 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff820d34a0 t umc_v6_7_query_ecc_error_count +ffffffff820d37a0 t umc_v6_7_reset_error_count_per_channel +ffffffff820d38e0 t umc_v6_7_query_error_address +ffffffff820d3a10 t umc_v6_7_ecc_info_querry_ecc_error_count +ffffffff820d3c20 t umc_v6_7_ecc_info_query_error_address +ffffffff820d4000 t umc_v8_10_query_ras_error_count +ffffffff820d4040 t umc_v8_10_query_ras_error_address +ffffffff820d4060 t umc_v8_10_err_cnt_init +ffffffff820d4080 t umc_v8_10_query_ras_poison_mode +ffffffff820d40b0 t umc_v8_10_ecc_info_query_ras_error_count +ffffffff820d40d0 t umc_v8_10_ecc_info_query_ras_error_address +ffffffff820d40f0 t umc_v8_10_set_eeprom_table_version +ffffffff820d4120 t umc_v8_10_query_ecc_error_count +ffffffff820d4200 t umc_v8_10_clear_error_count_per_channel +ffffffff820d4270 t umc_v8_10_query_error_address +ffffffff820d43b0 t umc_v8_10_convert_error_address +ffffffff820d45e0 t umc_v8_10_err_cnt_init_per_channel +ffffffff820d46b0 t umc_v8_10_ecc_info_query_ecc_error_count +ffffffff820d47a0 t umc_v8_10_ecc_info_query_error_address +ffffffff820d5000 t umc_v8_7_query_ras_error_count +ffffffff820d5370 t umc_v8_7_query_ras_error_address +ffffffff820d5540 t umc_v8_7_err_cnt_init +ffffffff820d56d0 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff820d5800 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff820d6000 t uvd_v5_0_early_init +ffffffff820d6050 t uvd_v5_0_sw_init +ffffffff820d6170 t uvd_v5_0_sw_fini +ffffffff820d61d0 t uvd_v5_0_hw_init +ffffffff820d6780 t uvd_v5_0_hw_fini +ffffffff820d6810 t uvd_v5_0_suspend +ffffffff820d6950 t uvd_v5_0_resume +ffffffff820d69b0 t uvd_v5_0_is_idle +ffffffff820d6a00 t uvd_v5_0_wait_for_idle +ffffffff820d6a90 t uvd_v5_0_soft_reset +ffffffff820d6b80 t uvd_v5_0_set_clockgating_state +ffffffff820d6d80 t uvd_v5_0_set_powergating_state +ffffffff820d6dd0 t uvd_v5_0_get_clockgating_state +ffffffff820d6e70 t uvd_v5_0_ring_get_rptr +ffffffff820d6ec0 t uvd_v5_0_ring_get_wptr +ffffffff820d6f10 t uvd_v5_0_ring_set_wptr +ffffffff820d6f40 t uvd_v5_0_ring_emit_ib +ffffffff820d71e0 t uvd_v5_0_ring_emit_fence +ffffffff820d7800 t uvd_v5_0_ring_test_ring +ffffffff820d79d0 t uvd_v5_0_ring_insert_nop +ffffffff820d7b30 t uvd_v5_0_set_interrupt_state +ffffffff820d7b60 t uvd_v5_0_process_interrupt +ffffffff820d7bd0 t uvd_v5_0_stop +ffffffff820d7d50 t uvd_v5_0_start +ffffffff820d9000 t uvd_v6_0_early_init +ffffffff820d9190 t uvd_v6_0_sw_init +ffffffff820d9450 t uvd_v6_0_sw_fini +ffffffff820d9520 t uvd_v6_0_hw_init +ffffffff820d9b90 t uvd_v6_0_hw_fini +ffffffff820d9c20 t uvd_v6_0_suspend +ffffffff820d9d60 t uvd_v6_0_resume +ffffffff820d9dc0 t uvd_v6_0_is_idle +ffffffff820d9e10 t uvd_v6_0_wait_for_idle +ffffffff820d9ea0 t uvd_v6_0_check_soft_reset +ffffffff820d9f30 t uvd_v6_0_pre_soft_reset +ffffffff820d9f80 t uvd_v6_0_soft_reset +ffffffff820da080 t uvd_v6_0_post_soft_reset +ffffffff820da150 t uvd_v6_0_set_clockgating_state +ffffffff820da340 t uvd_v6_0_set_powergating_state +ffffffff820da3c0 t uvd_v6_0_get_clockgating_state +ffffffff820da470 t uvd_v6_0_ring_get_rptr +ffffffff820da4c0 t uvd_v6_0_ring_get_wptr +ffffffff820da510 t uvd_v6_0_ring_set_wptr +ffffffff820da540 t uvd_v6_0_ring_emit_ib +ffffffff820da8e0 t uvd_v6_0_ring_emit_fence +ffffffff820daf00 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff820db340 t uvd_v6_0_ring_emit_vm_flush +ffffffff820db6e0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff820db710 t uvd_v6_0_ring_test_ring +ffffffff820db8e0 t uvd_v6_0_ring_insert_nop +ffffffff820dba40 t uvd_v6_0_ring_emit_wreg +ffffffff820dbcf0 t uvd_v6_0_enc_ring_get_rptr +ffffffff820dbd50 t uvd_v6_0_enc_ring_get_wptr +ffffffff820dbdb0 t uvd_v6_0_enc_ring_set_wptr +ffffffff820dbdf0 t uvd_v6_0_enc_ring_emit_ib +ffffffff820dc060 t uvd_v6_0_enc_ring_emit_fence +ffffffff820dc2c0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff820dc490 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff820dc6c0 t uvd_v6_0_enc_ring_test_ring +ffffffff820dc830 t uvd_v6_0_enc_ring_test_ib +ffffffff820dcd90 t uvd_v6_0_enc_ring_insert_end +ffffffff820dce20 t uvd_v6_0_set_interrupt_state +ffffffff820dce50 t uvd_v6_0_process_interrupt +ffffffff820dcf50 t uvd_v6_0_stop +ffffffff820dd0d0 t uvd_v6_0_start +ffffffff820de000 t uvd_v7_0_early_init +ffffffff820de290 t uvd_v7_0_sw_init +ffffffff820de720 t uvd_v7_0_sw_fini +ffffffff820de830 t uvd_v7_0_hw_init +ffffffff820e1d00 t uvd_v7_0_hw_fini +ffffffff820e20b0 t uvd_v7_0_suspend +ffffffff820e2190 t uvd_v7_0_resume +ffffffff820e21f0 t uvd_v7_0_set_clockgating_state +ffffffff820e2220 t uvd_v7_0_ring_get_rptr +ffffffff820e22c0 t uvd_v7_0_ring_get_wptr +ffffffff820e2360 t uvd_v7_0_ring_set_wptr +ffffffff820e23e0 t uvd_v7_0_ring_patch_cs_in_place +ffffffff820e2450 t uvd_v7_0_ring_emit_ib +ffffffff820e2840 t uvd_v7_0_ring_emit_fence +ffffffff820e2f00 t uvd_v7_0_ring_emit_vm_flush +ffffffff820e2f70 t uvd_v7_0_ring_emit_hdp_flush +ffffffff820e2fa0 t uvd_v7_0_ring_test_ring +ffffffff820e3270 t uvd_v7_0_ring_insert_nop +ffffffff820e3410 t uvd_v7_0_ring_emit_wreg +ffffffff820e3700 t uvd_v7_0_ring_emit_reg_wait +ffffffff820e3ae0 t uvd_v7_0_enc_ring_get_rptr +ffffffff820e3be0 t uvd_v7_0_enc_ring_get_wptr +ffffffff820e3cf0 t uvd_v7_0_enc_ring_set_wptr +ffffffff820e3df0 t uvd_v7_0_enc_ring_emit_ib +ffffffff820e4060 t uvd_v7_0_enc_ring_emit_fence +ffffffff820e42c0 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff820e4330 t uvd_v7_0_enc_ring_test_ring +ffffffff820e44b0 t uvd_v7_0_enc_ring_test_ib +ffffffff820e4a10 t uvd_v7_0_enc_ring_insert_end +ffffffff820e4aa0 t uvd_v7_0_enc_ring_emit_wreg +ffffffff820e4c00 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff820e4dd0 t uvd_v7_0_set_interrupt_state +ffffffff820e4e00 t uvd_v7_0_process_interrupt +ffffffff820e5000 t vce_v3_0_early_init +ffffffff820e51a0 t vce_v3_0_sw_init +ffffffff820e5340 t vce_v3_0_sw_fini +ffffffff820e53a0 t vce_v3_0_hw_init +ffffffff820e54a0 t vce_v3_0_hw_fini +ffffffff820e55a0 t vce_v3_0_suspend +ffffffff820e56b0 t vce_v3_0_resume +ffffffff820e57d0 t vce_v3_0_is_idle +ffffffff820e5840 t vce_v3_0_wait_for_idle +ffffffff820e5900 t vce_v3_0_check_soft_reset +ffffffff820e5a30 t vce_v3_0_pre_soft_reset +ffffffff820e5b00 t vce_v3_0_soft_reset +ffffffff820e5c00 t vce_v3_0_post_soft_reset +ffffffff820e5cd0 t vce_v3_0_set_clockgating_state +ffffffff820e60b0 t vce_v3_0_set_powergating_state +ffffffff820e6c00 t vce_v3_0_get_clockgating_state +ffffffff820e6cf0 t vce_v3_0_ring_get_rptr +ffffffff820e6de0 t vce_v3_0_ring_get_wptr +ffffffff820e6ed0 t vce_v3_0_ring_set_wptr +ffffffff820e6fa0 t vce_v3_0_ring_emit_ib +ffffffff820e7210 t vce_v3_0_emit_pipeline_sync +ffffffff820e73e0 t vce_v3_0_emit_vm_flush +ffffffff820e7680 t vce_v3_0_set_interrupt_state +ffffffff820e7700 t vce_v3_0_process_interrupt +ffffffff820e77e0 t vce_v3_0_stop +ffffffff820e8000 t vce_v4_0_early_init +ffffffff820e80c0 t vce_v4_0_sw_init +ffffffff820e83d0 t vce_v4_0_sw_fini +ffffffff820e8470 t vce_v4_0_hw_init +ffffffff820e8cc0 t vce_v4_0_hw_fini +ffffffff820e8e30 t vce_v4_0_suspend +ffffffff820e8fa0 t vce_v4_0_resume +ffffffff820e9070 t vce_v4_0_set_clockgating_state +ffffffff820e90a0 t vce_v4_0_set_powergating_state +ffffffff820e91b0 t vce_v4_0_ring_get_rptr +ffffffff820e9220 t vce_v4_0_ring_get_wptr +ffffffff820e92b0 t vce_v4_0_ring_set_wptr +ffffffff820e9340 t vce_v4_0_ring_emit_ib +ffffffff820e95b0 t vce_v4_0_ring_emit_fence +ffffffff820e9810 t vce_v4_0_emit_vm_flush +ffffffff820e9880 t vce_v4_0_ring_insert_end +ffffffff820e9910 t vce_v4_0_emit_wreg +ffffffff820e9a70 t vce_v4_0_emit_reg_wait +ffffffff820e9c40 t vce_v4_0_set_interrupt_state +ffffffff820e9cd0 t vce_v4_0_process_interrupt +ffffffff820e9d80 t vce_v4_0_start +ffffffff820eb000 T vcn_dec_sw_ring_emit_fence +ffffffff820eb260 T vcn_dec_sw_ring_insert_end +ffffffff820eb2f0 T vcn_dec_sw_ring_emit_ib +ffffffff820eb560 T vcn_dec_sw_ring_emit_reg_wait +ffffffff820eb730 T vcn_dec_sw_ring_emit_vm_flush +ffffffff820eb7a0 T vcn_dec_sw_ring_emit_wreg +ffffffff820ec000 T vcn_v1_0_set_pg_for_begin_use +ffffffff820ec160 T vcn_v1_0_ring_end_use +ffffffff820ec1d0 t vcn_v1_0_early_init +ffffffff820ec340 t vcn_v1_0_sw_init +ffffffff820ec640 t vcn_v1_0_sw_fini +ffffffff820ec6b0 t vcn_v1_0_hw_init +ffffffff820ec7b0 t vcn_v1_0_hw_fini +ffffffff820ec8d0 t vcn_v1_0_suspend +ffffffff820ec960 t vcn_v1_0_resume +ffffffff820eca80 t vcn_v1_0_is_idle +ffffffff820ecb20 t vcn_v1_0_wait_for_idle +ffffffff820ecb60 t vcn_v1_0_set_clockgating_state +ffffffff820ecc30 t vcn_v1_0_set_powergating_state +ffffffff820ed2a0 t vcn_v1_0_dec_ring_get_rptr +ffffffff820ed330 t vcn_v1_0_dec_ring_get_wptr +ffffffff820ed3c0 t vcn_v1_0_dec_ring_set_wptr +ffffffff820ed4e0 t vcn_v1_0_ring_patch_cs_in_place +ffffffff820ed6d0 t vcn_v1_0_dec_ring_emit_ib +ffffffff820edaa0 t vcn_v1_0_dec_ring_emit_fence +ffffffff820ee130 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff820ee1a0 t vcn_v1_0_dec_ring_insert_nop +ffffffff820ee340 t vcn_v1_0_dec_ring_insert_start +ffffffff820ee530 t vcn_v1_0_dec_ring_insert_end +ffffffff820ee640 t vcn_v1_0_ring_begin_use +ffffffff820ee700 t vcn_v1_0_dec_ring_emit_wreg +ffffffff820ee9e0 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff820eeda0 t vcn_v1_0_enc_ring_get_rptr +ffffffff820eee80 t vcn_v1_0_enc_ring_get_wptr +ffffffff820eef60 t vcn_v1_0_enc_ring_set_wptr +ffffffff820ef020 t vcn_v1_0_enc_ring_emit_ib +ffffffff820ef290 t vcn_v1_0_enc_ring_emit_fence +ffffffff820ef4f0 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff820ef560 t vcn_v1_0_enc_ring_insert_end +ffffffff820ef5f0 t vcn_v1_0_enc_ring_emit_wreg +ffffffff820ef750 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff820ef920 t vcn_v1_0_set_interrupt_state +ffffffff820ef950 t vcn_v1_0_process_interrupt +ffffffff820efa10 t vcn_v1_0_idle_work_handler +ffffffff820efbc0 t vcn_v1_0_pause_dpg_mode +ffffffff820f0c90 t vcn_v1_0_enable_clock_gating +ffffffff820f1130 t vcn_v1_0_disable_clock_gating +ffffffff820f1790 t vcn_1_0_enable_static_power_gating +ffffffff820f1960 t vcn_v1_0_start_dpg_mode +ffffffff820f6190 t vcn_v1_0_start_spg_mode +ffffffff820f89f0 t vcn_v1_0_clock_gating_dpg_mode +ffffffff820fa000 T vcn_v2_0_dec_ring_insert_start +ffffffff820fa1d0 T vcn_v2_0_dec_ring_insert_end +ffffffff820fa2d0 T vcn_v2_0_dec_ring_insert_nop +ffffffff820fa450 T vcn_v2_0_dec_ring_emit_fence +ffffffff820faa80 T vcn_v2_0_dec_ring_emit_ib +ffffffff820fae20 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff820fb1b0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff820fb220 T vcn_v2_0_dec_ring_emit_wreg +ffffffff820fb4d0 T vcn_v2_0_enc_ring_emit_fence +ffffffff820fb730 T vcn_v2_0_enc_ring_insert_end +ffffffff820fb7c0 T vcn_v2_0_enc_ring_emit_ib +ffffffff820fba30 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff820fbc00 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff820fbc70 T vcn_v2_0_enc_ring_emit_wreg +ffffffff820fbdd0 T vcn_v2_0_dec_ring_test_ring +ffffffff820fc0b0 t vcn_v2_0_early_init +ffffffff820fc220 t vcn_v2_0_sw_init +ffffffff820fc5c0 t vcn_v2_0_sw_fini +ffffffff820fc670 t vcn_v2_0_hw_init +ffffffff820fd0b0 t vcn_v2_0_hw_fini +ffffffff820fd1d0 t vcn_v2_0_suspend +ffffffff820fd200 t vcn_v2_0_resume +ffffffff820fd260 t vcn_v2_0_is_idle +ffffffff820fd300 t vcn_v2_0_wait_for_idle +ffffffff820fd340 t vcn_v2_0_set_clockgating_state +ffffffff820fd3f0 t vcn_v2_0_set_powergating_state +ffffffff820fdab0 t vcn_v2_0_dec_ring_get_rptr +ffffffff820fdb40 t vcn_v2_0_dec_ring_get_wptr +ffffffff820fdbf0 t vcn_v2_0_dec_ring_set_wptr +ffffffff820fdd30 t vcn_v2_0_enc_ring_get_rptr +ffffffff820fde10 t vcn_v2_0_enc_ring_get_wptr +ffffffff820fdf10 t vcn_v2_0_enc_ring_set_wptr +ffffffff820fe000 t vcn_v2_0_set_interrupt_state +ffffffff820fe030 t vcn_v2_0_process_interrupt +ffffffff820fe0f0 t vcn_v2_0_pause_dpg_mode +ffffffff820fe9c0 t vcn_v2_0_enable_clock_gating +ffffffff820fec80 t vcn_v2_0_disable_clock_gating +ffffffff820ff110 t vcn_v2_0_start +ffffffff821040e0 t vcn_v2_0_enable_static_power_gating +ffffffff82104260 t vcn_v2_0_clock_gating_dpg_mode +ffffffff82105140 t vcn_v2_0_mc_resume_dpg_mode +ffffffff8210a000 t vcn_v2_6_query_poison_status +ffffffff8210a0e0 t vcn_v2_5_early_init +ffffffff8210a3e0 t vcn_v2_5_sw_init +ffffffff8210a930 t vcn_v2_5_sw_fini +ffffffff8210aa20 t vcn_v2_5_hw_init +ffffffff8210b530 t vcn_v2_5_hw_fini +ffffffff8210b6e0 t vcn_v2_5_suspend +ffffffff8210b710 t vcn_v2_5_resume +ffffffff8210b770 t vcn_v2_5_is_idle +ffffffff8210b870 t vcn_v2_5_wait_for_idle +ffffffff8210b920 t vcn_v2_5_set_clockgating_state +ffffffff8210b9b0 t vcn_v2_5_set_powergating_state +ffffffff8210e1b0 t vcn_v2_5_dec_ring_get_rptr +ffffffff8210e250 t vcn_v2_5_dec_ring_get_wptr +ffffffff8210e310 t vcn_v2_5_dec_ring_set_wptr +ffffffff8210e3c0 t vcn_v2_5_enc_ring_get_rptr +ffffffff8210e4c0 t vcn_v2_5_enc_ring_get_wptr +ffffffff8210e5d0 t vcn_v2_5_enc_ring_set_wptr +ffffffff8210e6e0 t vcn_v2_5_set_interrupt_state +ffffffff8210e710 t vcn_v2_5_process_interrupt +ffffffff8210e830 t vcn_v2_6_set_ras_interrupt_state +ffffffff8210e860 t vcn_v2_5_pause_dpg_mode +ffffffff8210f0a0 t vcn_v2_5_enable_clock_gating +ffffffff8210f400 t vcn_v2_5_disable_clock_gating +ffffffff8210f970 t vcn_v2_5_start_dpg_mode +ffffffff82113910 t vcn_v2_5_clock_gating_dpg_mode +ffffffff82114820 t vcn_v2_5_mc_resume_dpg_mode +ffffffff8211a000 t vcn_v3_0_early_init +ffffffff8211a230 t vcn_v3_0_sw_init +ffffffff8211a750 t vcn_v3_0_sw_fini +ffffffff8211a850 t vcn_v3_0_hw_init +ffffffff8211b470 t vcn_v3_0_hw_fini +ffffffff8211b590 t vcn_v3_0_suspend +ffffffff8211b5c0 t vcn_v3_0_resume +ffffffff8211b620 t vcn_v3_0_is_idle +ffffffff8211b720 t vcn_v3_0_wait_for_idle +ffffffff8211b7d0 t vcn_v3_0_set_clockgating_state +ffffffff8211b8f0 t vcn_v3_0_set_powergating_state +ffffffff8211e4e0 t vcn_v3_0_dec_ring_get_rptr +ffffffff8211e580 t vcn_v3_0_dec_ring_get_wptr +ffffffff8211e640 t vcn_v3_0_dec_ring_set_wptr +ffffffff8211e7b0 t vcn_v3_0_ring_patch_cs_in_place +ffffffff8211eb30 t vcn_v3_0_enc_ring_get_rptr +ffffffff8211ec30 t vcn_v3_0_enc_ring_get_wptr +ffffffff8211ed40 t vcn_v3_0_enc_ring_set_wptr +ffffffff8211ee50 t vcn_v3_0_set_interrupt_state +ffffffff8211ee80 t vcn_v3_0_process_interrupt +ffffffff8211efa0 t vcn_v3_0_pause_dpg_mode +ffffffff8211f8c0 t vcn_v3_0_enable_clock_gating +ffffffff8211fb90 t vcn_v3_0_disable_clock_gating +ffffffff82120150 t vcn_v3_0_start_dpg_mode +ffffffff82123960 t vcn_v3_0_clock_gating_dpg_mode +ffffffff821248a0 t vcn_v3_0_mc_resume_dpg_mode +ffffffff8212a000 t vcn_v4_0_query_ras_poison_status +ffffffff8212a0e0 t vcn_v4_0_early_init +ffffffff8212a2b0 t vcn_v4_0_sw_init +ffffffff8212a5b0 t vcn_v4_0_sw_fini +ffffffff8212a6b0 t vcn_v4_0_hw_init +ffffffff8212b1a0 t vcn_v4_0_hw_fini +ffffffff8212b310 t vcn_v4_0_suspend +ffffffff8212b340 t vcn_v4_0_resume +ffffffff8212b3a0 t vcn_v4_0_is_idle +ffffffff8212b4b0 t vcn_v4_0_wait_for_idle +ffffffff8212b570 t vcn_v4_0_set_clockgating_state +ffffffff8212b6a0 t vcn_v4_0_set_powergating_state +ffffffff8212c010 t vcn_v4_0_unified_ring_get_rptr +ffffffff8212c0f0 t vcn_v4_0_unified_ring_get_wptr +ffffffff8212c1f0 t vcn_v4_0_unified_ring_set_wptr +ffffffff8212c2f0 t vcn_v4_0_ring_patch_cs_in_place +ffffffff8212c6e0 t vcn_v4_0_limit_sched +ffffffff8212c750 t vcn_v4_0_set_interrupt_state +ffffffff8212c780 t vcn_v4_0_process_interrupt +ffffffff8212c850 t vcn_v4_0_set_ras_interrupt_state +ffffffff8212c880 t vcn_v4_0_pause_dpg_mode +ffffffff8212cb40 t vcn_v4_0_enable_clock_gating +ffffffff8212ce70 t vcn_v4_0_disable_clock_gating +ffffffff8212d3b0 t vcn_v4_0_start +ffffffff82132940 t vcn_v4_0_disable_clock_gating_dpg_mode +ffffffff82133880 t vcn_v4_0_mc_resume_dpg_mode +ffffffff82139000 t vcn_v4_0_3_early_init +ffffffff82139110 t vcn_v4_0_3_sw_init +ffffffff82139410 t vcn_v4_0_3_sw_fini +ffffffff821394e0 t vcn_v4_0_3_hw_init +ffffffff8213a2f0 t vcn_v4_0_3_hw_fini +ffffffff8213a390 t vcn_v4_0_3_suspend +ffffffff8213a410 t vcn_v4_0_3_resume +ffffffff8213a470 t vcn_v4_0_3_is_idle +ffffffff8213a610 t vcn_v4_0_3_wait_for_idle +ffffffff8213a730 t vcn_v4_0_3_set_clockgating_state +ffffffff8213a900 t vcn_v4_0_3_set_powergating_state +ffffffff8213b0d0 t vcn_v4_0_3_unified_ring_get_rptr +ffffffff8213b270 t vcn_v4_0_3_unified_ring_get_wptr +ffffffff8213b430 t vcn_v4_0_3_unified_ring_set_wptr +ffffffff8213b600 t vcn_v4_0_3_set_interrupt_state +ffffffff8213b630 t vcn_v4_0_3_process_interrupt +ffffffff8213b770 t vcn_v4_0_3_query_ras_error_count +ffffffff8213b890 t vcn_v4_0_3_reset_ras_error_count +ffffffff8213b9a0 t vcn_v4_0_3_pause_dpg_mode +ffffffff8213b9d0 t vcn_v4_0_3_enable_clock_gating +ffffffff8213bd30 t vcn_v4_0_3_disable_clock_gating +ffffffff8213c2a0 t vcn_v4_0_3_start +ffffffff82141360 t vcn_v4_0_3_disable_clock_gating_dpg_mode +ffffffff82142270 t vcn_v4_0_3_mc_resume_dpg_mode +ffffffff82148000 t vega10_ih_early_init +ffffffff82148050 t vega10_ih_sw_init +ffffffff82148330 t vega10_ih_sw_fini +ffffffff82148370 t vega10_ih_hw_init +ffffffff82148780 t vega10_ih_hw_fini +ffffffff821487e0 t vega10_ih_suspend +ffffffff82148840 t vega10_ih_resume +ffffffff82148850 t vega10_ih_is_idle +ffffffff82148880 t vega10_ih_wait_for_idle +ffffffff821488b0 t vega10_ih_soft_reset +ffffffff821488e0 t vega10_ih_set_clockgating_state +ffffffff82148a40 t vega10_ih_set_powergating_state +ffffffff82148a70 t vega10_ih_get_wptr +ffffffff82148bd0 t vega10_ih_set_rptr +ffffffff82148cc0 t vega10_ih_self_irq +ffffffff82148d40 t vega10_ih_toggle_interrupts +ffffffff82149000 T vega10_reg_base_init +ffffffff82149150 T vega10_doorbell_index_init +ffffffff8214a000 t vega20_ih_early_init +ffffffff8214a050 t vega20_ih_sw_init +ffffffff8214a360 t vega20_ih_sw_fini +ffffffff8214a3a0 t vega20_ih_hw_init +ffffffff8214aa80 t vega20_ih_hw_fini +ffffffff8214aae0 t vega20_ih_suspend +ffffffff8214ab40 t vega20_ih_resume +ffffffff8214ab50 t vega20_ih_is_idle +ffffffff8214ab80 t vega20_ih_wait_for_idle +ffffffff8214abb0 t vega20_ih_soft_reset +ffffffff8214abe0 t vega20_ih_set_clockgating_state +ffffffff8214ad20 t vega20_ih_set_powergating_state +ffffffff8214ad50 t vega20_ih_get_wptr +ffffffff8214aeb0 t vega20_ih_set_rptr +ffffffff8214afa0 t vega20_ih_self_irq +ffffffff8214b020 t vega20_ih_toggle_interrupts +ffffffff8214c000 T vega20_reg_base_init +ffffffff8214c160 T vega20_doorbell_index_init +ffffffff8214d000 T vi_srbm_select +ffffffff8214d050 T vi_set_virt_ops +ffffffff8214d090 T vi_set_ip_blocks +ffffffff8214d640 T legacy_doorbell_index_init +ffffffff8214d6f0 t vi_common_early_init +ffffffff8214d9f0 t vi_common_late_init +ffffffff8214da40 t vi_common_sw_init +ffffffff8214da90 t vi_common_sw_fini +ffffffff8214dac0 t vi_common_hw_init +ffffffff8214e2a0 t vi_common_hw_fini +ffffffff8214e320 t vi_common_suspend +ffffffff8214e3a0 t vi_common_resume +ffffffff8214e3e0 t vi_common_is_idle +ffffffff8214e410 t vi_common_wait_for_idle +ffffffff8214e440 t vi_common_soft_reset +ffffffff8214e470 t vi_common_set_clockgating_state +ffffffff8214ea70 t vi_common_set_powergating_state +ffffffff8214eaa0 t vi_common_get_clockgating_state +ffffffff8214eb90 t cz_smc_rreg +ffffffff8214ec30 t cz_smc_wreg +ffffffff8214ecb0 t vi_smc_rreg +ffffffff8214ed60 t vi_smc_wreg +ffffffff8214edf0 t vi_pcie_rreg +ffffffff8214eeb0 t vi_pcie_wreg +ffffffff8214ef70 t vi_uvd_ctx_rreg +ffffffff8214f020 t vi_uvd_ctx_wreg +ffffffff8214f0b0 t vi_didt_rreg +ffffffff8214f150 t vi_didt_wreg +ffffffff8214f1d0 t vi_gc_cac_rreg +ffffffff8214f270 t vi_gc_cac_wreg +ffffffff8214f2f0 t vi_read_disabled_bios +ffffffff8214f530 t vi_read_bios_from_rom +ffffffff8214f660 t vi_read_register +ffffffff8214f940 t vi_asic_reset +ffffffff8214fae0 t vi_asic_reset_method +ffffffff8214fba0 t vi_get_xclk +ffffffff8214fc60 t vi_set_uvd_clocks +ffffffff8214fd20 t vi_set_vce_clocks +ffffffff821500a0 t vi_get_config_memsize +ffffffff821500c0 t vi_flush_hdp +ffffffff82150140 t vi_invalidate_hdp +ffffffff821501c0 t vi_need_full_reset +ffffffff82150210 t vi_get_pcie_usage +ffffffff82150370 t vi_need_reset_on_init +ffffffff82150410 t vi_get_pcie_replay_count +ffffffff82150490 t vi_asic_supports_baco +ffffffff821504e0 t vi_pre_asic_init +ffffffff82150510 t vi_query_video_codecs +ffffffff821505b0 t vi_set_uvd_clock +ffffffff82151000 T amdgpu_xcp_drm_dev_alloc +ffffffff82151060 T amdgpu_xcp_drv_release +ffffffff82152000 T amdgpu_dm_find_first_crtc_matching_connector +ffffffff82152070 T amdgpu_dm_update_connector_after_detect +ffffffff82152680 T amdgpu_dm_update_freesync_caps +ffffffff82152c40 T dm_atomic_get_state +ffffffff82152cb0 T amdgpu_dm_connector_atomic_set_property +ffffffff82152d70 T amdgpu_dm_connector_atomic_get_property +ffffffff82152e10 T amdgpu_dm_connector_funcs_reset +ffffffff82152f10 T amdgpu_dm_connector_atomic_duplicate_state +ffffffff82153020 T create_validate_stream_for_sink +ffffffff82154950 T amdgpu_dm_connector_mode_valid +ffffffff82154b50 T convert_dc_color_depth_into_bpc +ffffffff82154b90 t dm_encoder_helper_disable +ffffffff82154bc0 t dm_encoder_helper_atomic_check +ffffffff82154dd0 T amdgpu_dm_connector_init_helper +ffffffff821551c0 T amdgpu_dm_get_encoder_crtc_mask +ffffffff82155210 T dm_restore_drm_connector_state +ffffffff821553a0 t parse_hdmi_amd_vsdb +ffffffff82155750 T amdgpu_dm_trigger_timing_sync +ffffffff82155930 T dm_write_reg_func +ffffffff82155950 T dm_read_reg_func +ffffffff82155a00 T amdgpu_dm_process_dmub_aux_transfer_sync +ffffffff82155c70 T amdgpu_dm_process_dmub_set_config_sync +ffffffff82155e10 T check_seamless_boot_capability +ffffffff82155e60 T dm_execute_dmub_cmd +ffffffff82155e80 T dm_execute_dmub_cmd_list +ffffffff82155ea0 t dm_early_init +ffffffff82156270 t dm_late_init +ffffffff82156570 t dm_sw_init +ffffffff82156b90 t dm_sw_fini +ffffffff82156c60 t amdgpu_dm_early_fini +ffffffff82156cc0 t dm_hw_init +ffffffff82158c90 t dm_hw_fini +ffffffff82158d00 t dm_suspend +ffffffff82159140 t dm_resume +ffffffff82159ba0 t dm_is_idle +ffffffff82159bd0 t dm_wait_for_idle +ffffffff82159c00 t dm_check_soft_reset +ffffffff82159c30 t dm_soft_reset +ffffffff82159c60 t dm_set_clockgating_state +ffffffff82159c90 t dm_set_powergating_state +ffffffff82159cc0 t dm_bandwidth_update +ffffffff82159cf0 t dm_vblank_get_counter +ffffffff82159d70 t dm_crtc_get_scanoutpos +ffffffff82159e60 t amdgpu_dm_dmub_reg_read +ffffffff82159f10 t amdgpu_dm_dmub_reg_write +ffffffff82159f40 t dm_dmub_hw_init +ffffffff8215a3a0 t dmub_aux_setconfig_callback +ffffffff8215a450 t amdgpu_dm_fini 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amdgpu_dm_audio_component_get_eld +ffffffff821614f0 t dm_dmub_outbox1_low_irq +ffffffff82161830 t dm_handle_hpd_work +ffffffff821618c0 t amdgpu_dm_encoder_destroy +ffffffff82161900 t amdgpu_dm_i2c_xfer +ffffffff82161a60 t amdgpu_dm_i2c_func +ffffffff82161a90 t amdgpu_dm_connector_detect +ffffffff82161b50 t amdgpu_dm_connector_funcs_force +ffffffff82161c40 t amdgpu_dm_connector_late_register +ffffffff82161dc0 t amdgpu_dm_connector_unregister +ffffffff82161de0 t amdgpu_dm_connector_destroy +ffffffff82161ef0 t amdgpu_dm_backlight_update_status +ffffffff82161f80 t amdgpu_dm_backlight_get_brightness +ffffffff82162180 t get_modes +ffffffff82162190 t amdgpu_dm_connector_atomic_check +ffffffff821622f0 t amdgpu_dm_connector_get_modes +ffffffff82162970 t dm_crtc_high_irq +ffffffff82162b30 t dm_vupdate_high_irq +ffffffff82162ce0 t dm_pflip_high_irq +ffffffff82162f30 t register_hpd_handlers +ffffffff82163050 t dmub_hpd_callback +ffffffff82163210 t handle_hpd_irq +ffffffff82163220 t handle_hpd_rx_irq +ffffffff821635d0 t handle_hpd_irq_helper +ffffffff82163790 t schedule_hpd_rx_offload_work +ffffffff82163860 t dm_handle_hpd_rx_offload_work +ffffffff82163c40 t dm_gpureset_toggle_interrupts +ffffffff82163e80 t s3_handle_mst +ffffffff82165000 T amdgpu_dm_init_color_mod +ffffffff82165010 T amdgpu_dm_verify_lut_sizes +ffffffff821650f0 T amdgpu_dm_update_crtc_color_mgmt +ffffffff821657e0 T amdgpu_dm_update_plane_color_mgmt +ffffffff82166000 T amdgpu_dm_crtc_handle_vblank +ffffffff82166090 T amdgpu_dm_crtc_modeset_required +ffffffff821660d0 T amdgpu_dm_crtc_vrr_active_irq +ffffffff82166110 T amdgpu_dm_crtc_set_vupdate_irq +ffffffff821661d0 T amdgpu_dm_crtc_vrr_active +ffffffff82166210 T amdgpu_dm_crtc_enable_vblank +ffffffff82166230 t dm_set_vblank +ffffffff821664f0 T amdgpu_dm_crtc_disable_vblank +ffffffff82166510 T amdgpu_dm_crtc_init +ffffffff82166730 t vblank_control_worker +ffffffff82166880 t dm_crtc_reset_state +ffffffff82166930 t amdgpu_dm_crtc_destroy +ffffffff82166970 t dm_crtc_duplicate_state +ffffffff82166b40 t dm_crtc_destroy_state +ffffffff82166b90 t dm_crtc_helper_mode_fixup +ffffffff82166bc0 t dm_crtc_helper_disable +ffffffff82166bf0 t dm_crtc_helper_atomic_check +ffffffff82167000 T hdcp_update_display +ffffffff821672d0 t process_output +ffffffff82167430 T hdcp_reset_display +ffffffff821675c0 T hdcp_handle_cpirq +ffffffff821675f0 T hdcp_destroy +ffffffff82167720 T hdcp_create_workqueue +ffffffff82167b90 t event_cpirq +ffffffff82167c00 t event_property_update +ffffffff82167e70 t event_callback +ffffffff82167f20 t event_watchdog_timer +ffffffff82167fd0 t event_property_validate +ffffffff82168180 t lp_write_i2c +ffffffff82168210 t lp_read_i2c +ffffffff821682c0 t lp_write_dpcd +ffffffff821682f0 t lp_read_dpcd +ffffffff82168320 t update_config +ffffffff821686d0 t enable_assr +ffffffff82168820 t __delayed_work_tick +ffffffff82169000 T dm_helpers_parse_edid_caps +ffffffff82169290 T dm_helpers_dp_update_branch_info +ffffffff821692c0 T dm_helpers_dp_mst_write_payload_allocation_table +ffffffff821696d0 T dm_helpers_dp_mst_poll_pending_down_reply +ffffffff82169700 T dm_helpers_dp_mst_clear_payload_allocation_table +ffffffff82169730 T dm_helpers_dp_mst_poll_for_allocation_change_trigger +ffffffff821697b0 T dm_helpers_dp_mst_send_payload_allocation +ffffffff82169890 T dm_dtn_log_begin +ffffffff821698e0 T dm_dtn_log_append_v +ffffffff82169a60 T dm_dtn_log_end +ffffffff82169ab0 T dm_helpers_dp_mst_start_top_mgr +ffffffff82169b90 T dm_helpers_dp_mst_stop_top_mgr +ffffffff82169c40 T dm_helpers_dp_read_dpcd +ffffffff82169ce0 T dm_helpers_dp_write_dpcd +ffffffff82169d70 T dm_helpers_submit_i2c +ffffffff82169ec0 T dm_helpers_dp_write_dsc_enable +ffffffff8216a600 T dm_helpers_is_dp_sink_present +ffffffff8216a6b0 T dm_helpers_read_local_edid +ffffffff8216a960 T dm_helper_dmub_aux_transfer_sync +ffffffff8216a9b0 T dm_helpers_dmub_set_config_sync +ffffffff8216a9d0 T dm_set_dcn_clocks +ffffffff8216aa00 T dm_helpers_smu_timeout +ffffffff8216aa30 T dm_helpers_init_panel_settings +ffffffff8216aaa0 T dm_helpers_override_panel_settings +ffffffff8216aae0 T dm_helpers_allocate_gpu_mem +ffffffff8216abf0 T dm_helpers_free_gpu_mem +ffffffff8216ac90 T dm_helpers_dmub_outbox_interrupt_control +ffffffff8216ad30 T dm_helpers_mst_enable_stream_features +ffffffff8216ae60 T dm_helpers_dp_handle_test_pattern_request +ffffffff8216b1b0 T dm_set_phyd32clk +ffffffff8216b1e0 T dm_helpers_enable_periodic_detection +ffffffff8216b210 T dm_helpers_dp_mst_update_branch_bandwidth +ffffffff8216b240 T dm_get_adaptive_sync_support_type +ffffffff8216b2b0 t execute_synaptics_rc_command +ffffffff8216c000 T amdgpu_dm_irq_register_interrupt +ffffffff8216c1d0 t dm_irq_work_func +ffffffff8216c1f0 T amdgpu_dm_irq_unregister_interrupt +ffffffff8216c3b0 T amdgpu_dm_irq_init +ffffffff8216c4b0 T amdgpu_dm_irq_fini +ffffffff8216c680 T amdgpu_dm_irq_suspend +ffffffff8216c7d0 T amdgpu_dm_irq_resume_early +ffffffff8216c9a0 T amdgpu_dm_irq_resume_late +ffffffff8216cb70 T amdgpu_dm_set_irq_funcs +ffffffff8216cc30 T amdgpu_dm_outbox_init +ffffffff8216cc60 T amdgpu_dm_hpd_init +ffffffff8216cd30 T amdgpu_dm_hpd_fini +ffffffff8216ce00 t amdgpu_dm_set_crtc_irq_state +ffffffff8216ce90 t amdgpu_dm_irq_handler +ffffffff8216d0f0 t amdgpu_dm_set_vline0_irq_state +ffffffff8216d180 t amdgpu_dm_set_dmub_outbox_irq_state +ffffffff8216d1e0 t amdgpu_dm_set_vupdate_irq_state +ffffffff8216d270 t amdgpu_dm_set_dmub_trace_irq_state +ffffffff8216d2d0 t amdgpu_dm_set_pflip_irq_state +ffffffff8216d360 t amdgpu_dm_set_hpd_irq_state +ffffffff8216e000 T needs_dsc_aux_workaround +ffffffff8216e050 T dm_dp_create_fake_mst_encoders +ffffffff8216e110 T dm_handle_mst_sideband_msg_ready_event +ffffffff8216e3b0 T amdgpu_dm_initialize_dp_connector +ffffffff8216e4d0 t kasprintf +ffffffff8216e5b0 t dm_dp_aux_transfer +ffffffff8216e700 T dm_mst_get_pbn_divider +ffffffff8216e770 T compute_mst_dsc_configs_for_state +ffffffff8216ea30 t is_dsc_need_re_compute +ffffffff8216ec00 t compute_mst_dsc_configs_for_link +ffffffff8216f2c0 T pre_validate_dsc +ffffffff8216f8e0 T dm_dp_mst_is_port_support_mode +ffffffff8216fb80 t amdgpu_dm_encoder_destroy +ffffffff8216fb90 t dm_dp_add_mst_connector +ffffffff8216fdc0 t dm_handle_mst_down_rep_msg_ready +ffffffff8216fde0 t amdgpu_dm_mst_connector_late_register +ffffffff8216fe30 t amdgpu_dm_mst_connector_early_unregister +ffffffff8216ff20 t dm_dp_mst_connector_destroy +ffffffff8216ffc0 t dm_dp_mst_get_modes +ffffffff82170570 t dm_dp_mst_detect +ffffffff82170780 t dm_mst_atomic_best_encoder +ffffffff821707e0 t dm_dp_mst_atomic_check +ffffffff82170810 t set_dsc_configs_from_fairness_vars +ffffffff82170b00 t increase_dsc_bpp +ffffffff821710a0 t try_disable_dsc +ffffffff82172000 T amdgpu_dm_plane_get_format_info +ffffffff82172020 T amdgpu_dm_plane_fill_blending_from_plane_state +ffffffff82172120 T amdgpu_dm_plane_fill_plane_buffer_attributes +ffffffff821726a0 T amdgpu_dm_plane_helper_check_state +ffffffff821728c0 T amdgpu_dm_plane_fill_dc_scaling_info +ffffffff82172b20 T amdgpu_dm_plane_handle_cursor_update +ffffffff82172df0 T amdgpu_dm_plane_init +ffffffff82173da0 T is_video_format +ffffffff82173df0 t dm_drm_plane_reset +ffffffff82173e90 t dm_drm_plane_duplicate_state +ffffffff82173f30 t dm_drm_plane_destroy_state +ffffffff82173f70 t dm_plane_format_mod_supported +ffffffff821740a0 t dm_plane_helper_prepare_fb +ffffffff821743e0 t dm_plane_helper_cleanup_fb +ffffffff82174490 t dm_plane_atomic_check +ffffffff82174580 t dm_plane_atomic_async_check +ffffffff821745c0 t dm_plane_atomic_async_update +ffffffff82174670 t amdgpu_bo_reserve +ffffffff821748b0 t amdgpu_bo_unreserve +ffffffff82175000 T dm_pp_apply_display_requirements +ffffffff821751f0 T dm_pp_get_clock_levels_by_type +ffffffff821755b0 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff821757a0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff82175990 T dm_pp_notify_wm_clock_changes +ffffffff821759f0 T dm_pp_apply_power_level_change_request +ffffffff82175a20 T dm_pp_apply_clock_for_voltage_request +ffffffff82175ad0 T dm_pp_get_static_clocks +ffffffff82175ba0 T dm_pp_get_funcs +ffffffff82175cb0 t pp_rv_set_wm_ranges +ffffffff82175e40 t pp_rv_set_pme_wa_enable +ffffffff82175e60 t pp_rv_set_active_display_count +ffffffff82175e80 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff82175ea0 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff82175ec0 t pp_rv_set_hard_min_fclk_by_freq +ffffffff82175ee0 t pp_nv_set_display_count +ffffffff82175f40 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff82175fb0 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff82176010 t pp_nv_set_voltage_by_freq +ffffffff821760b0 t pp_nv_set_wm_ranges +ffffffff82176100 t pp_nv_set_hard_min_uclk_by_freq +ffffffff82176170 t pp_nv_get_maximum_sustainable_clocks +ffffffff821761d0 t pp_nv_get_uclk_dpm_states +ffffffff82176230 t pp_nv_set_pstate_handshake_support +ffffffff82176290 t pp_rn_set_wm_ranges +ffffffff821762e0 t pp_rn_get_dpm_clock_table +ffffffff82177000 T amdgpu_dm_set_psr_caps +ffffffff82177160 T amdgpu_dm_link_setup_psr +ffffffff82177320 T amdgpu_dm_psr_enable +ffffffff82177430 T amdgpu_dm_psr_disable +ffffffff821774c0 T amdgpu_dm_psr_disable_all +ffffffff82178000 T amdgpu_dm_setup_replay +ffffffff82178100 T amdgpu_dm_replay_enable +ffffffff821782b0 T amdgpu_dm_replay_disable +ffffffff82179000 T dm_get_elapse_time_in_ns +ffffffff82179030 T dm_perf_trace_timestamp +ffffffff8217a000 T dc_assert_fp_enabled +ffffffff8217a080 T dc_fpu_begin +ffffffff8217a0d0 T dc_fpu_end +ffffffff8217b000 T dal_vector_construct +ffffffff8217b0e0 T dal_vector_presized_create +ffffffff8217b3a0 T dal_vector_create +ffffffff8217b4e0 T dal_vector_destruct +ffffffff8217b540 T dal_vector_destroy +ffffffff8217b5d0 T dal_vector_get_count +ffffffff8217b600 T dal_vector_at_index +ffffffff8217b640 T dal_vector_remove_at_index +ffffffff8217b6e0 T dal_vector_set_at_index +ffffffff8217b740 T dal_vector_insert_at +ffffffff8217b870 T dal_vector_reserve +ffffffff8217b930 T dal_vector_append +ffffffff8217ba60 T dal_vector_clone +ffffffff8217bb20 T dal_vector_capacity +ffffffff8217bb50 T dal_vector_clear +ffffffff8217c000 T fixed_point_to_int_frac +ffffffff8217c220 T convert_float_matrix +ffffffff8217c2f0 T reduce_fraction +ffffffff8217d000 T is_rgb_cspace +ffffffff8217d090 T is_lower_pipe_tree_visible +ffffffff8217d100 T is_upper_pipe_tree_visible +ffffffff8217d170 T is_pipe_tree_visible +ffffffff8217d200 T build_prescale_params +ffffffff8217e000 T dc_fixpt_from_fraction +ffffffff8217e1e0 T dc_fixpt_mul +ffffffff8217e3a0 T dc_fixpt_sqr +ffffffff8217e520 T dc_fixpt_recip +ffffffff8217e590 T dc_fixpt_sinc +ffffffff8217e7d0 T dc_fixpt_sin +ffffffff8217e800 T dc_fixpt_cos +ffffffff8217e920 T dc_fixpt_exp +ffffffff8217ec40 t fixed31_32_exp_from_taylor_series +ffffffff8217f110 T dc_fixpt_log +ffffffff8217f350 T dc_fixpt_u4d19 +ffffffff8217f390 T dc_fixpt_u3d19 +ffffffff8217f3d0 T dc_fixpt_u2d19 +ffffffff8217f410 T dc_fixpt_u0d19 +ffffffff8217f440 T dc_fixpt_clamp_u0d14 +ffffffff8217f490 T dc_fixpt_clamp_u0d10 +ffffffff8217f4e0 T dc_fixpt_s4d19 +ffffffff82180000 T bios_parser_create +ffffffff82181380 t bios_parser_get_connectors_number +ffffffff821813e0 t bios_parser_get_connector_id +ffffffff82181490 t bios_parser_get_src_obj +ffffffff821815c0 t bios_parser_get_i2c_info +ffffffff82181800 t bios_parser_get_hpd_info +ffffffff821818f0 t bios_parser_get_device_tag +ffffffff82181b10 t bios_parser_get_spread_spectrum_info +ffffffff82181d20 t bios_parser_get_ss_entry_number +ffffffff82181f80 t bios_parser_get_embedded_panel_info +ffffffff82182510 t bios_parser_get_gpio_pin_info +ffffffff82182630 t bios_parser_get_encoder_cap_info +ffffffff82182740 t bios_parser_set_scratch_critical_state +ffffffff82182750 t bios_parser_is_device_id_supported +ffffffff82182810 t bios_parser_encoder_control +ffffffff82182850 t bios_parser_transmitter_control +ffffffff82182890 t bios_parser_enable_crtc +ffffffff821828e0 t bios_parser_adjust_pixel_clock +ffffffff82182920 t bios_parser_set_pixel_clock +ffffffff82182960 t bios_parser_set_dce_clock +ffffffff821829a0 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff821829f0 t bios_parser_program_crtc_timing +ffffffff82182a30 t bios_parser_program_display_engine_pll +ffffffff82182a70 t bios_parser_enable_disp_power_gating +ffffffff82182ab0 t bios_parser_destroy +ffffffff82182b90 t bios_get_board_layout_info +ffffffff82182e30 t get_bios_object +ffffffff82183030 t get_ss_info_from_ss_info_table +ffffffff82183230 t get_ss_info_v3_1 +ffffffff821833a0 t get_ss_entry_number_from_ss_info_tbl +ffffffff82184000 T firmware_parser_create +ffffffff82186000 t bios_parser_get_connectors_number +ffffffff82186170 t bios_parser_get_connector_id +ffffffff821861d0 t bios_parser_get_src_obj +ffffffff821864b0 t bios_parser_get_i2c_info +ffffffff82186780 t bios_parser_get_hpd_info +ffffffff82186920 t bios_parser_get_device_tag +ffffffff82186c10 t bios_parser_get_spread_spectrum_info +ffffffff821870c0 t bios_parser_get_ss_entry_number +ffffffff821870f0 t bios_parser_get_embedded_panel_info +ffffffff82187300 t bios_parser_get_gpio_pin_info +ffffffff82187420 t bios_parser_get_encoder_cap_info +ffffffff82187590 t bios_parser_is_accelerated_mode +ffffffff821875a0 t bios_parser_set_scratch_critical_state +ffffffff821875b0 t bios_parser_is_device_id_supported +ffffffff82187620 t bios_parser_encoder_control +ffffffff82187660 t bios_parser_transmitter_control +ffffffff821876a0 t bios_parser_enable_crtc +ffffffff821876f0 t bios_parser_set_pixel_clock +ffffffff82187730 t bios_parser_set_dce_clock +ffffffff82187770 t bios_parser_program_crtc_timing +ffffffff821877b0 t bios_parser_enable_disp_power_gating +ffffffff821877f0 t firmware_parser_destroy +ffffffff821878d0 t bios_get_board_layout_info +ffffffff82187dc0 t bios_parser_pack_data_tables +ffffffff82187df0 t bios_get_atom_dc_golden_table +ffffffff82187f50 t bios_parser_enable_lvtma_control +ffffffff82187fa0 t bios_parser_get_soc_bb_info +ffffffff821880b0 t bios_parser_get_disp_connector_caps_info +ffffffff82188230 t bios_parser_get_lttpr_caps +ffffffff821883a0 t bios_parser_get_lttpr_interop +ffffffff82188500 t bios_parser_get_connector_speed_cap_info +ffffffff82188650 t get_bios_object +ffffffff821887c0 t get_bios_object_from_path_v3 +ffffffff82189000 T object_id_from_bios_object_id +ffffffff8218a000 T bios_get_image +ffffffff8218a050 T bios_is_accelerated_mode +ffffffff8218a0b0 T bios_set_scratch_acc_mode_change +ffffffff8218a0f0 T bios_set_scratch_critical_state +ffffffff8218a130 T bios_get_vga_enabled_displays +ffffffff8218b000 T dal_bios_parser_create +ffffffff8218b070 T dal_bios_parser_destroy +ffffffff8218c000 T dal_bios_parser_init_cmd_tbl +ffffffff8218c910 t encoder_control_digx_v3 +ffffffff8218ca30 t encoder_control_digx_v4 +ffffffff8218cb50 t encoder_control_digx_v5 +ffffffff8218ccb0 t encoder_control_dig1_v1 +ffffffff8218cd50 t encoder_control_dig2_v1 +ffffffff8218cdf0 t encoder_control_dig_v1 +ffffffff8218ce50 t transmitter_control_v2 +ffffffff8218d000 t transmitter_control_v3 +ffffffff8218d1d0 t transmitter_control_v4 +ffffffff8218d390 t transmitter_control_v1_5 +ffffffff8218d530 t transmitter_control_v1_6 +ffffffff8218d6b0 t set_pixel_clock_v3 +ffffffff8218d850 t set_pixel_clock_v5 +ffffffff8218da20 t set_pixel_clock_v6 +ffffffff8218dbf0 t set_pixel_clock_v7 +ffffffff8218de00 t enable_spread_spectrum_on_ppll_v1 +ffffffff8218df20 t enable_spread_spectrum_on_ppll_v2 +ffffffff8218e060 t enable_spread_spectrum_on_ppll_v3 +ffffffff8218e180 t adjust_display_pll_v2 +ffffffff8218e2f0 t adjust_display_pll_v3 +ffffffff8218e490 t dac1_encoder_control_v1 +ffffffff8218e510 t dac2_encoder_control_v1 +ffffffff8218e590 t dac1_output_control_v1 +ffffffff8218e600 t dac2_output_control_v1 +ffffffff8218e670 t set_crtc_using_dtd_timing_v3 +ffffffff8218e7e0 t set_crtc_timing_v1 +ffffffff8218e980 t enable_crtc_v1 +ffffffff8218ea30 t enable_crtc_mem_req_v1 +ffffffff8218eae0 t program_clock_v5 +ffffffff8218ec00 t program_clock_v6 +ffffffff8218ed30 t external_encoder_control_v3 +ffffffff8218ef00 t enable_disp_power_gating_v2_1 +ffffffff8218efe0 t set_dce_clock_v2_1 +ffffffff82190000 T dal_firmware_parser_init_cmd_tbl +ffffffff82190460 t encoder_control_digx_v1_5 +ffffffff82190650 t encoder_control_fallback +ffffffff821906b0 t transmitter_control_v1_6 +ffffffff82190880 t transmitter_control_v1_7 +ffffffff82190aa0 t transmitter_control_fallback +ffffffff82190b00 t set_pixel_clock_v7 +ffffffff82190d90 t set_pixel_clock_fallback +ffffffff82190df0 t set_crtc_using_dtd_timing_v3 +ffffffff82190f60 t enable_crtc_v1 +ffffffff82191010 t external_encoder_control_v3 +ffffffff82191040 t enable_disp_power_gating_v2_1 +ffffffff821911c0 t enable_disp_power_gating_fallback +ffffffff82191220 t set_dce_clock_v2_1 +ffffffff82191360 t get_smu_clock_info_v3_1 +ffffffff821913d0 t enable_lvtma_control +ffffffff82192000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff821920c0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff821921e0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff82192270 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff82192300 T dal_cmd_table_helper_assign_control_parameter +ffffffff821923e0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff821924c0 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff82193000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff821930d0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff821931e0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff82193270 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff82193300 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff821933e0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff82194000 T dal_cmd_tbl_helper_dce110_get_table ffffffff82194030 t encoder_action_to_atom ffffffff821940b0 t engine_bp_to_atom ffffffff82194100 t clock_source_id_to_atom -ffffffff821941d0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff82194220 t signal_type_to_atom_dig_mode -ffffffff82194280 t hpd_sel_to_atom -ffffffff821942c0 t dig_encoder_sel_to_atom -ffffffff821942f0 t phy_id_to_atom -ffffffff82194330 t disp_power_gating_action_to_atom -ffffffff821943a0 t dc_clock_type_to_atom -ffffffff82194420 t transmitter_color_depth_to_atom -ffffffff82195000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff821941a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff821941f0 t signal_type_to_atom_dig_mode +ffffffff82194250 t hpd_sel_to_atom +ffffffff82194290 t dig_encoder_sel_to_atom +ffffffff821942c0 t phy_id_to_atom +ffffffff82194300 t disp_power_gating_action_to_atom +ffffffff82195000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff82195030 t encoder_action_to_atom ffffffff821950b0 t engine_bp_to_atom ffffffff82195100 t clock_source_id_to_atom @@ -31837,7 +31828,7 @@ ffffffff821952f0 t phy_id_to_atom ffffffff82195330 t disp_power_gating_action_to_atom ffffffff821953a0 t dc_clock_type_to_atom ffffffff82195420 t transmitter_color_depth_to_atom -ffffffff82196000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff82196000 T dal_cmd_tbl_helper_dce112_get_table ffffffff82196030 t encoder_action_to_atom ffffffff821960b0 t engine_bp_to_atom ffffffff82196100 t clock_source_id_to_atom @@ -31845,16702 +31836,16706 @@ ffffffff821961d0 t clock_source_id_to_atom_phy_clk_src ffffffff82196220 t signal_type_to_atom_dig_mode ffffffff82196280 t hpd_sel_to_atom ffffffff821962c0 t dig_encoder_sel_to_atom -ffffffff82196310 t phy_id_to_atom -ffffffff82196350 t disp_power_gating_action_to_atom -ffffffff82197000 T clk_mgr_helper_get_active_display_cnt -ffffffff821970e0 T clk_mgr_helper_get_active_plane_cnt -ffffffff82197190 T clk_mgr_exit_optimized_pwr_state -ffffffff821972b0 T clk_mgr_optimize_pwr_state -ffffffff821973b0 T dc_clk_mgr_create -ffffffff82197b90 T dc_destroy_clk_mgr -ffffffff82198000 T dentist_get_divider_from_did -ffffffff82198070 T dce_adjust_dp_ref_freq_for_ss -ffffffff82198190 T dce_get_dp_ref_freq_khz -ffffffff821982e0 T dce12_get_dp_ref_freq_khz -ffffffff82198300 T dce_get_max_pixel_clock_for_all_paths -ffffffff82198510 T dce_get_required_clocks_state -ffffffff821985c0 T dce_set_clock -ffffffff82198730 T dce_clock_read_ss_info -ffffffff82198870 T dce_clk_mgr_construct -ffffffff82198a70 t dce_update_clocks -ffffffff82199000 T dce110_get_min_vblank_time_us -ffffffff82199090 T dce110_fill_display_configs -ffffffff82199310 T dce11_pplib_apply_display_requirements -ffffffff82199620 T dce110_clk_mgr_construct -ffffffff821996d0 t dce11_update_clocks -ffffffff8219a000 T dce112_set_clock -ffffffff8219a1a0 T dce112_set_dispclk -ffffffff8219a2d0 T dce112_set_dprefclk -ffffffff8219a350 T dce112_clk_mgr_construct -ffffffff8219a410 t dce112_update_clocks -ffffffff8219b000 T dce120_clk_mgr_construct -ffffffff8219b0a0 T dce121_clk_mgr_construct -ffffffff8219b1e0 t dce12_update_clocks -ffffffff8219c000 T rv1_clk_mgr_construct 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dc_dsc_policy_set_disable_dsc_stream_overhead -ffffffff8245e8c0 T dc_set_disable_128b_132b_stream_overhead -ffffffff8245e8f0 T dc_dsc_get_default_config_option -ffffffff8245e940 t fit_num_slices_up -ffffffff8245e9f0 t decide_dsc_target_bpp_x16 -ffffffff8245f000 T calc_rc_params -ffffffff82460000 T dscc_compute_dsc_parameters -ffffffff82461000 T dal_hw_factory_dce110_init -ffffffff82461060 t define_hpd_registers -ffffffff824610b0 t define_ddc_registers -ffffffff82462000 T dal_hw_translate_dce110_init -ffffffff82462030 t offset_to_id -ffffffff824623a0 t id_to_offset -ffffffff82463000 T dal_hw_factory_dce120_init -ffffffff82463060 t define_hpd_registers -ffffffff824630b0 t define_ddc_registers -ffffffff82464000 T dal_hw_translate_dce120_init -ffffffff82464030 t offset_to_id -ffffffff824643b0 t id_to_offset -ffffffff82465000 T dal_hw_factory_dce80_init -ffffffff82465060 t define_hpd_registers -ffffffff824650b0 t define_ddc_registers -ffffffff82466000 T dal_hw_translate_dce80_init -ffffffff82466030 t offset_to_id -ffffffff824667d0 t id_to_offset -ffffffff82467000 T dal_hw_factory_dcn10_init -ffffffff82467060 t define_hpd_registers -ffffffff824670b0 t define_ddc_registers -ffffffff82467150 t define_generic_registers -ffffffff82468000 T dal_hw_translate_dcn10_init -ffffffff82468030 t offset_to_id -ffffffff824683a0 t id_to_offset -ffffffff82469000 T dal_hw_factory_dcn20_init -ffffffff82469060 t define_hpd_registers -ffffffff824690b0 t define_ddc_registers -ffffffff82469160 t define_generic_registers -ffffffff8246a000 T dal_hw_translate_dcn20_init -ffffffff8246a030 t offset_to_id -ffffffff8246a2c0 t id_to_offset -ffffffff8246b000 T dal_hw_factory_dcn21_init -ffffffff8246b060 t define_hpd_registers -ffffffff8246b0b0 t define_ddc_registers -ffffffff8246b160 t define_generic_registers -ffffffff8246c000 T dal_hw_translate_dcn21_init -ffffffff8246c030 t offset_to_id -ffffffff8246c2b0 t id_to_offset -ffffffff8246d000 T dal_hw_factory_dcn30_init -ffffffff8246d060 t define_hpd_registers -ffffffff8246d0b0 t define_ddc_registers -ffffffff8246d160 t define_generic_registers -ffffffff8246e000 T dal_hw_translate_dcn30_init -ffffffff8246e030 t offset_to_id -ffffffff8246e2d0 t id_to_offset -ffffffff8246f000 T dal_hw_factory_dcn315_init -ffffffff8246f060 t define_hpd_registers -ffffffff8246f0b0 t define_ddc_registers -ffffffff8246f160 t define_generic_registers -ffffffff82470000 T dal_hw_translate_dcn315_init -ffffffff82470030 t offset_to_id -ffffffff824702b0 t id_to_offset -ffffffff82471000 T dal_hw_factory_dcn32_init -ffffffff82471060 t define_hpd_registers -ffffffff824710b0 t define_ddc_registers -ffffffff82471160 t define_generic_registers -ffffffff82472000 T dal_hw_translate_dcn32_init -ffffffff82472030 t offset_to_id -ffffffff82472290 t id_to_offset -ffffffff82473000 T dal_gpio_open -ffffffff824730c0 T dal_gpio_open_ex -ffffffff82473180 T dal_gpio_get_value -ffffffff82473210 T dal_gpio_set_value -ffffffff824732a0 T dal_gpio_get_mode -ffffffff824732d0 T dal_gpio_lock_pin -ffffffff824732f0 T dal_gpio_unlock_pin -ffffffff82473310 T dal_gpio_change_mode -ffffffff824733a0 T dal_gpio_get_id -ffffffff824733d0 T dal_gpio_get_enum -ffffffff82473400 T dal_gpio_set_config -ffffffff82473490 T dal_gpio_get_pin_info -ffffffff824734f0 T dal_gpio_get_sync_source -ffffffff82473580 T dal_gpio_get_output_state -ffffffff824735b0 T dal_gpio_get_ddc -ffffffff824735e0 T dal_gpio_get_hpd -ffffffff82473610 T dal_gpio_get_generic -ffffffff82473640 T dal_gpio_close -ffffffff824736a0 T dal_gpio_create -ffffffff82473850 T dal_gpio_destroy -ffffffff82474000 T dal_gpio_service_create -ffffffff82474280 T dal_gpio_service_create_irq -ffffffff82474350 T dal_gpio_create_irq -ffffffff824743e0 T dal_gpio_service_create_generic_mux -ffffffff82474490 T dal_gpio_destroy_generic_mux -ffffffff82474530 T dal_gpio_get_generic_pin_info -ffffffff824745a0 T dal_gpio_service_destroy -ffffffff82474720 T dal_mux_setup_config -ffffffff82474790 T dal_gpio_service_lock -ffffffff82474810 T dal_gpio_service_unlock -ffffffff82474890 T dal_gpio_service_open -ffffffff82474b20 T dal_gpio_service_close -ffffffff82474bc0 T dal_irq_get_source -ffffffff82474c40 T dal_irq_get_rx_source -ffffffff82474ca0 T dal_irq_setup_hpd_filter -ffffffff82474d00 T dal_gpio_destroy_irq -ffffffff82474da0 T dal_gpio_create_ddc -ffffffff82474f50 T dal_gpio_destroy_ddc -ffffffff82475050 T dal_ddc_close -ffffffff824750a0 T dal_ddc_open -ffffffff82475230 T dal_ddc_change_mode -ffffffff82475300 T dal_ddc_get_line -ffffffff82475320 T dal_ddc_set_config -ffffffff82476000 T dal_hw_ddc_init -ffffffff82476120 T dal_hw_ddc_get_pin -ffffffff82476130 t dal_hw_ddc_destroy -ffffffff824761a0 t set_config -ffffffff82477000 T dal_hw_factory_init -ffffffff82478000 T dal_hw_generic_init -ffffffff82478120 T dal_hw_generic_get_pin -ffffffff82478130 t dal_hw_generic_destroy -ffffffff824781a0 t set_config -ffffffff82479000 T dal_hw_gpio_open -ffffffff824790d0 T dal_hw_gpio_config_mode -ffffffff824791c0 T dal_hw_gpio_get_value -ffffffff82479230 T dal_hw_gpio_set_value -ffffffff824792c0 T dal_hw_gpio_change_mode -ffffffff824792d0 T dal_hw_gpio_close -ffffffff824793a0 T dal_hw_gpio_construct -ffffffff82479400 T dal_hw_gpio_destruct -ffffffff8247a000 T dal_hw_hpd_init -ffffffff8247a120 T dal_hw_hpd_get_pin -ffffffff8247a130 t dal_hw_hpd_destroy -ffffffff8247a1a0 t get_value -ffffffff8247a240 t set_config -ffffffff8247b000 T dal_hw_translate_init -ffffffff8247c000 T dc_process_hdcp_msg -ffffffff8247c190 t hdmi_14_process_transaction -ffffffff8247c310 t dp_11_process_transaction -ffffffff8247d000 T dal_irq_service_dummy_set -ffffffff8247d060 T dal_irq_service_dummy_ack -ffffffff8247d0c0 T dce110_vblank_set -ffffffff8247d1b0 T to_dal_irq_source_dce110 -ffffffff8247d330 T dal_irq_service_dce110_create -ffffffff8247d3c0 t hpd_ack -ffffffff8247e000 T dal_irq_service_dce120_create -ffffffff8247e090 t hpd_ack -ffffffff8247f000 T dal_irq_service_dce80_create +ffffffff821962f0 t phy_id_to_atom +ffffffff82196330 t disp_power_gating_action_to_atom +ffffffff821963a0 t dc_clock_type_to_atom +ffffffff82196420 t transmitter_color_depth_to_atom +ffffffff82197000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff82197030 t encoder_action_to_atom +ffffffff821970b0 t engine_bp_to_atom +ffffffff82197100 t clock_source_id_to_atom +ffffffff821971d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff82197220 t signal_type_to_atom_dig_mode +ffffffff82197280 t hpd_sel_to_atom +ffffffff821972c0 t dig_encoder_sel_to_atom +ffffffff82197310 t phy_id_to_atom +ffffffff82197350 t disp_power_gating_action_to_atom +ffffffff82198000 T clk_mgr_helper_get_active_display_cnt +ffffffff821980e0 T clk_mgr_helper_get_active_plane_cnt +ffffffff82198190 T clk_mgr_exit_optimized_pwr_state +ffffffff821982b0 T clk_mgr_optimize_pwr_state +ffffffff821983b0 T dc_clk_mgr_create +ffffffff82198b90 T dc_destroy_clk_mgr +ffffffff82199000 T dentist_get_divider_from_did +ffffffff82199070 T dce_adjust_dp_ref_freq_for_ss +ffffffff82199190 T dce_get_dp_ref_freq_khz +ffffffff821992e0 T dce12_get_dp_ref_freq_khz +ffffffff82199300 T dce_get_max_pixel_clock_for_all_paths +ffffffff82199510 T dce_get_required_clocks_state +ffffffff821995c0 T dce_set_clock +ffffffff82199730 T dce_clock_read_ss_info +ffffffff82199870 T dce_clk_mgr_construct +ffffffff82199a70 t dce_update_clocks +ffffffff8219a000 T dce110_get_min_vblank_time_us +ffffffff8219a090 T dce110_fill_display_configs +ffffffff8219a310 T dce11_pplib_apply_display_requirements +ffffffff8219a620 T dce110_clk_mgr_construct +ffffffff8219a6d0 t dce11_update_clocks +ffffffff8219b000 T dce112_set_clock +ffffffff8219b1a0 T dce112_set_dispclk +ffffffff8219b2d0 T dce112_set_dprefclk +ffffffff8219b350 T dce112_clk_mgr_construct +ffffffff8219b410 t dce112_update_clocks +ffffffff8219c000 T dce120_clk_mgr_construct +ffffffff8219c0a0 T dce121_clk_mgr_construct +ffffffff8219c1e0 t dce12_update_clocks +ffffffff8219d000 T rv1_clk_mgr_construct +ffffffff8219d0c0 t rv1_update_clocks +ffffffff8219d600 t rv1_init_clocks +ffffffff8219d690 t rv1_enable_pme_wa +ffffffff8219e000 T rv1_vbios_smu_set_dispclk +ffffffff8219e0f0 t rv1_vbios_smu_send_msg_with_param +ffffffff8219e230 T rv1_vbios_smu_set_dprefclk +ffffffff8219f000 T rv2_clk_mgr_construct +ffffffff821a0000 T dentist_get_did_from_divider +ffffffff821a0080 T dcn20_update_clocks_update_dpp_dto +ffffffff821a0160 T dcn20_update_clocks_update_dentist +ffffffff821a06f0 T dcn2_update_clocks +ffffffff821a0ce0 T dcn2_read_clocks_from_hw_dentist +ffffffff821a0dd0 T dcn2_update_clocks_fpga +ffffffff821a0f00 T dcn2_init_clocks +ffffffff821a0fa0 T dcn2_get_clock +ffffffff821a1010 T dcn20_clk_mgr_construct +ffffffff821a1160 t dcn2_enable_pme_wa +ffffffff821a11b0 t dcn2_are_clock_states_equal +ffffffff821a1220 t dcn2_notify_link_rate_change +ffffffff821a2000 T dcn201_clk_mgr_construct +ffffffff821a2130 t dcn201_update_clocks +ffffffff821a2370 t dcn201_init_clocks +ffffffff821a3000 T rn_clk_mgr_construct +ffffffff821a3970 t rn_update_clocks +ffffffff821a3f70 t rn_set_low_power_state +ffffffff821a4160 t rn_init_clocks +ffffffff821a4200 t rn_enable_pme_wa +ffffffff821a4210 t rn_are_clock_states_equal +ffffffff821a4260 t rn_notify_wm_ranges +ffffffff821a4600 t rn_notify_link_rate_change +ffffffff821a5000 T rn_vbios_smu_get_smu_version +ffffffff821a5020 t rn_vbios_smu_send_msg_with_param +ffffffff821a5200 T rn_vbios_smu_set_dispclk +ffffffff821a5330 T rn_vbios_smu_set_dprefclk +ffffffff821a53a0 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff821a5420 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff821a54a0 T rn_vbios_smu_set_phyclk +ffffffff821a54e0 T rn_vbios_smu_set_dppclk +ffffffff821a55a0 T rn_vbios_smu_set_dcn_low_power_state +ffffffff821a55c0 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff821a55e0 T rn_vbios_smu_enable_pme_wa +ffffffff821a5600 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff821a6000 T dcn3_init_clocks +ffffffff821a6470 t dcn3_init_clocks_fpga +ffffffff821a6480 T dcn3_clk_mgr_construct +ffffffff821a6600 T dcn3_clk_mgr_destroy +ffffffff821a6670 t dcn3_update_clocks +ffffffff821a6ad0 t dcn3_enable_pme_wa +ffffffff821a6b10 t dcn3_are_clock_states_equal +ffffffff821a6b70 t dcn3_notify_wm_ranges +ffffffff821a6e20 t dcn30_notify_link_rate_change +ffffffff821a6f40 t dcn3_set_hard_min_memclk +ffffffff821a6fe0 t dcn3_set_hard_max_memclk +ffffffff821a7040 t dcn3_set_max_memclk +ffffffff821a7080 t dcn3_set_min_memclk +ffffffff821a70c0 t dcn3_get_memclk_states_from_smu +ffffffff821a7220 t dcn3_is_smu_present +ffffffff821a8000 T dcn30_smu_test_message +ffffffff821a8070 t dcn30_smu_send_msg_with_param +ffffffff821a8220 T dcn30_smu_get_smu_version +ffffffff821a8240 T dcn30_smu_check_driver_if_version +ffffffff821a82a0 T dcn30_smu_check_msg_header_version +ffffffff821a8300 T dcn30_smu_set_dram_addr_high +ffffffff821a8320 T dcn30_smu_set_dram_addr_low +ffffffff821a8340 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff821a8360 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff821a8380 T dcn30_smu_set_hard_min_by_freq +ffffffff821a83e0 T dcn30_smu_set_hard_max_by_freq +ffffffff821a8440 T dcn30_smu_get_dpm_freq_by_index +ffffffff821a84a0 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff821a8500 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff821a8520 T dcn30_smu_set_num_of_displays +ffffffff821a8540 T dcn30_smu_set_display_refresh_from_mall +ffffffff821a8570 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff821a8590 T dcn30_smu_set_pme_workaround +ffffffff821a9000 T dcn301_smu_get_smu_version +ffffffff821a9080 t dcn301_smu_send_msg_with_param +ffffffff821a9250 T dcn301_smu_set_dispclk +ffffffff821a9300 T dcn301_smu_set_dprefclk +ffffffff821a93c0 T dcn301_smu_set_hard_min_dcfclk +ffffffff821a9470 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff821a9520 T dcn301_smu_set_dppclk +ffffffff821a95d0 T dcn301_smu_set_display_idle_optimization +ffffffff821a9630 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff821a9690 T dcn301_smu_enable_pme_wa +ffffffff821a96b0 T dcn301_smu_set_dram_addr_high +ffffffff821a9710 T dcn301_smu_set_dram_addr_low +ffffffff821a9770 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff821a9790 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff821aa000 T vg_clk_mgr_construct +ffffffff821aa930 T vg_clk_mgr_destroy +ffffffff821aa980 t vg_update_clocks +ffffffff821aad00 t vg_init_clocks +ffffffff821aada0 t vg_enable_pme_wa +ffffffff821aadb0 t vg_are_clock_states_equal +ffffffff821aae00 t vg_notify_wm_ranges +ffffffff821ac000 T dcn31_update_clocks +ffffffff821ac6a0 T dcn31_init_clocks +ffffffff821ac750 T dcn31_are_clock_states_equal +ffffffff821ac7b0 T dcn31_get_dtb_ref_freq_khz +ffffffff821ac7e0 T dcn31_clk_mgr_construct +ffffffff821acf50 T dcn31_clk_mgr_destroy +ffffffff821acfa0 t dcn31_set_low_power_state +ffffffff821ad1c0 t dcn31_enable_pme_wa +ffffffff821ad1d0 t dcn31_notify_wm_ranges +ffffffff821ad570 t find_clk_for_voltage +ffffffff821ae000 T dcn31_smu_get_smu_version +ffffffff821ae020 t dcn31_smu_send_msg_with_param +ffffffff821ae290 T dcn31_smu_set_dispclk +ffffffff821ae310 T dcn31_smu_set_dprefclk +ffffffff821ae390 T dcn31_smu_set_hard_min_dcfclk +ffffffff821ae420 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff821ae4b0 T dcn31_smu_set_dppclk +ffffffff821ae530 T dcn31_smu_set_display_idle_optimization +ffffffff821ae580 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff821ae5d0 T dcn31_smu_enable_pme_wa +ffffffff821ae610 T dcn31_smu_set_dram_addr_high +ffffffff821ae650 T dcn31_smu_set_dram_addr_low +ffffffff821ae690 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff821ae6d0 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff821ae710 T dcn31_smu_set_zstate_support +ffffffff821ae780 T dcn31_smu_set_dtbclk +ffffffff821af000 T dcn314_update_clocks +ffffffff821af6d0 T dcn314_are_clock_states_equal +ffffffff821af730 T dcn314_clk_mgr_construct +ffffffff821b04f0 T dcn314_clk_mgr_destroy +ffffffff821b0540 t dcn314_enable_pme_wa +ffffffff821b0550 t dcn314_notify_wm_ranges +ffffffff821b1000 T dcn314_smu_get_smu_version +ffffffff821b1020 t dcn314_smu_send_msg_with_param +ffffffff821b12b0 T dcn314_smu_set_dispclk +ffffffff821b1330 T dcn314_smu_set_dprefclk +ffffffff821b13b0 T dcn314_smu_set_hard_min_dcfclk +ffffffff821b1440 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff821b14d0 T dcn314_smu_set_dppclk +ffffffff821b1550 T dcn314_smu_set_display_idle_optimization +ffffffff821b15a0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff821b15f0 T dcn314_smu_enable_pme_wa +ffffffff821b1630 T dcn314_smu_set_dram_addr_high +ffffffff821b1670 T dcn314_smu_set_dram_addr_low +ffffffff821b16b0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff821b16f0 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff821b1730 T dcn314_smu_set_zstate_support +ffffffff821b1780 T dcn314_smu_set_dtbclk +ffffffff821b2000 T dcn315_clk_mgr_construct +ffffffff821b2890 T dcn315_clk_mgr_destroy +ffffffff821b28e0 t dcn315_update_clocks +ffffffff821b2ef0 t dcn315_enable_pme_wa +ffffffff821b2f00 t dcn315_notify_wm_ranges +ffffffff821b32a0 t dcn315_disable_otg_wa +ffffffff821b4000 T dcn315_smu_get_smu_version +ffffffff821b4020 t dcn315_smu_send_msg_with_param +ffffffff821b43d0 T dcn315_smu_set_dispclk +ffffffff821b4450 T dcn315_smu_set_hard_min_dcfclk +ffffffff821b44e0 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff821b4570 T dcn315_smu_set_dppclk +ffffffff821b45f0 T dcn315_smu_set_display_idle_optimization +ffffffff821b4640 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff821b4690 T dcn315_smu_enable_pme_wa +ffffffff821b46d0 T dcn315_smu_set_dram_addr_high +ffffffff821b4710 T dcn315_smu_set_dram_addr_low +ffffffff821b4750 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff821b4790 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff821b47d0 T dcn315_smu_get_dpref_clk +ffffffff821b4830 T dcn315_smu_get_dtbclk +ffffffff821b4890 T dcn315_smu_set_dtbclk +ffffffff821b5000 T dcn316_clk_mgr_construct +ffffffff821b56e0 T dcn316_clk_mgr_destroy +ffffffff821b5730 t dcn316_update_clocks +ffffffff821b5da0 t dcn316_enable_pme_wa +ffffffff821b5db0 t dcn316_notify_wm_ranges +ffffffff821b6150 t find_clk_for_voltage +ffffffff821b7000 T dcn316_smu_get_smu_version +ffffffff821b7020 t dcn316_smu_send_msg_with_param +ffffffff821b7200 T dcn316_smu_set_dispclk +ffffffff821b7280 T dcn316_smu_set_hard_min_dcfclk +ffffffff821b7310 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff821b73a0 T dcn316_smu_set_dppclk +ffffffff821b7420 T dcn316_smu_set_display_idle_optimization +ffffffff821b7470 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff821b74c0 T dcn316_smu_set_dram_addr_high +ffffffff821b7500 T dcn316_smu_set_dram_addr_low +ffffffff821b7540 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff821b7580 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff821b75c0 T dcn316_smu_enable_pme_wa +ffffffff821b7600 T dcn316_smu_set_dtbclk +ffffffff821b7640 T dcn316_smu_get_dpref_clk +ffffffff821b76a0 T dcn316_smu_get_smu_fclk +ffffffff821b8000 T dcn32_init_clocks +ffffffff821b8620 T dcn32_update_clocks_update_dpp_dto +ffffffff821b8760 T dcn32_clk_mgr_construct +ffffffff821b8a40 t dcn32_dump_clk_registers +ffffffff821b8ce0 T dcn32_clk_mgr_destroy +ffffffff821b8d50 t dcn32_update_clocks +ffffffff821b96b0 t dcn32_enable_pme_wa +ffffffff821b96f0 t dcn32_are_clock_states_equal +ffffffff821b9760 t dcn32_notify_wm_ranges +ffffffff821b98f0 t dcn32_set_hard_min_memclk +ffffffff821b9980 t dcn32_set_hard_max_memclk +ffffffff821b99d0 t dcn32_set_max_memclk +ffffffff821b9a10 t dcn32_set_min_memclk +ffffffff821b9a50 t dcn32_get_memclk_states_from_smu +ffffffff821b9ce0 t dcn32_is_smu_present +ffffffff821b9d10 t dcn32_get_dispclk_from_dentist +ffffffff821b9db0 t dcn32_update_clocks_update_dentist +ffffffff821bb000 T dcn32_smu_send_fclk_pstate_message +ffffffff821bb020 t dcn32_smu_send_msg_with_param +ffffffff821bb1a0 T dcn32_smu_send_cab_for_uclk_message +ffffffff821bb1d0 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff821bb1f0 T dcn32_smu_set_pme_workaround +ffffffff821bb210 T dcn32_smu_set_hard_min_by_freq +ffffffff821bb270 T dcn32_smu_wait_for_dmub_ack_mclk +ffffffff821bc000 T dc_stream_adjust_vmin_vmax +ffffffff821bc170 T dc_stream_get_last_used_drr_vtotal +ffffffff821bc2e0 T dc_stream_get_crtc_position +ffffffff821bc540 T dc_stream_configure_crc +ffffffff821bc6c0 T dc_stream_get_crc +ffffffff821bc7b0 T dc_stream_set_dyn_expansion +ffffffff821bca40 T dc_stream_set_dither_option +ffffffff821bcbe0 T dc_stream_set_gamut_remap +ffffffff821bcd90 T dc_stream_program_csc_matrix +ffffffff821bcff0 T dc_stream_set_static_screen_params +ffffffff821bd180 T dc_create +ffffffff821bd7c0 t dc_construct_ctx +ffffffff821bd960 t dc_destruct +ffffffff821bdcc0 T dc_hardware_init +ffffffff821bdd90 T dc_init_callbacks +ffffffff821bdde0 T dc_deinit_callbacks +ffffffff821bde30 T dc_destroy +ffffffff821bdea0 T dc_validate_boot_timing +ffffffff821be2b0 T dc_enable_stereo +ffffffff821be3c0 T dc_trigger_sync +ffffffff821bea20 T dc_z10_restore +ffffffff821bea60 T dc_z10_save_init +ffffffff821beaa0 T dc_commit_streams +ffffffff821beff0 t commit_minimal_transition_state +ffffffff821bf470 T dc_create_state +ffffffff821bf510 t dc_commit_state_no_check +ffffffff821c0e40 T dc_release_state +ffffffff821c0eb0 T dc_acquire_release_mpc_3dlut +ffffffff821c0f80 T dc_post_update_surfaces_to_stream +ffffffff821c1400 T dc_copy_state +ffffffff821c15f0 T dc_retain_state +ffffffff821c1620 T dc_set_generic_gpio_for_stereo +ffffffff821c1780 T dc_check_update_surfaces_for_stream +ffffffff821c2190 T dc_dmub_update_dirty_rect +ffffffff821c23a0 T dc_update_planes_and_stream +ffffffff821c3040 t fast_update_only +ffffffff821c33a0 t commit_planes_for_stream_fast +ffffffff821c37f0 t commit_planes_for_stream +ffffffff821c4f50 T dc_commit_updates_for_stream +ffffffff821c5630 t copy_surface_update_to_plane +ffffffff821c5a50 t copy_stream_update_to_stream +ffffffff821c6150 T dc_get_current_stream_count +ffffffff821c6190 T dc_get_stream_at_index +ffffffff821c61e0 T dc_interrupt_to_irq_source +ffffffff821c6200 T dc_interrupt_set +ffffffff821c6250 T dc_interrupt_ack +ffffffff821c6270 T dc_power_down_on_boot +ffffffff821c62c0 T dc_set_power_state +ffffffff821c64f0 T dc_resume +ffffffff821c6570 T dc_is_dmcu_initialized +ffffffff821c65c0 T get_clock_requirements_for_state +ffffffff821c6640 T dc_set_clock +ffffffff821c6680 T dc_get_clock +ffffffff821c66c0 T dc_set_psr_allow_active +ffffffff821c67d0 T dc_allow_idle_optimizations +ffffffff821c6880 T dc_unlock_memory_clock_frequency +ffffffff821c6900 T dc_lock_memory_clock_frequency +ffffffff821c69a0 T dc_enable_dcmode_clk_limit +ffffffff821c6b70 t blank_and_force_memclk +ffffffff821c6da0 T dc_is_plane_eligible_for_idle_optimizations +ffffffff821c6e00 T dc_hardware_release +ffffffff821c6e50 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff821c6e90 T dc_is_dmub_outbox_supported +ffffffff821c6f00 T dc_enable_dmub_notifications +ffffffff821c6f70 T dc_enable_dmub_outbox +ffffffff821c6fc0 T dc_process_dmub_aux_transfer_async +ffffffff821c7150 T get_link_index_from_dpia_port_index +ffffffff821c7210 T dc_process_dmub_set_config_async +ffffffff821c72f0 T dc_process_dmub_set_mst_slots +ffffffff821c73e0 T dc_process_dmub_dpia_hpd_int_enable +ffffffff821c74b0 T dc_print_dmub_diagnostic_data +ffffffff821c74d0 T dc_disable_accelerated_mode +ffffffff821c74f0 T dc_notify_vsync_int_state +ffffffff821c7720 T dc_abm_save_restore +ffffffff821c7910 T dc_query_current_properties +ffffffff821c7980 T dc_set_edp_power +ffffffff821c79f0 t create_links +ffffffff821c7ea0 t create_link_encoders +ffffffff821c7f90 t dc_update_viusal_confirm_color +ffffffff821c9000 T pre_surface_trace +ffffffff821c9030 T update_surface_trace +ffffffff821c9060 T post_surface_trace +ffffffff821c9090 T context_timing_trace +ffffffff821c9260 T context_clock_trace +ffffffff821c9290 T dc_status_to_str +ffffffff821ca000 T find_color_matrix +ffffffff821ca0b0 T color_space_to_black_color +ffffffff821ca120 T hwss_wait_for_blank_complete +ffffffff821ca1d0 T get_mpctree_visual_confirm_color +ffffffff821ca230 T get_surface_visual_confirm_color +ffffffff821ca2e0 T get_hdr_visual_confirm_color +ffffffff821ca3a0 T get_subvp_visual_confirm_color +ffffffff821ca4a0 T hwss_build_fast_sequence +ffffffff821cab60 T hwss_execute_sequence +ffffffff821cafc0 T hwss_setup_dpp +ffffffff821cb060 T hwss_program_bias_and_scale +ffffffff821cb0e0 T hwss_program_manual_trigger +ffffffff821cb130 T hwss_power_on_mpc_mem_pwr +ffffffff821cb180 T hwss_set_output_csc +ffffffff821cb1d0 T hwss_set_ocsc_default +ffffffff821cb220 T hwss_send_dmcub_cmd +ffffffff821cb240 T get_mclk_switch_visual_confirm_color +ffffffff821cb3a0 T get_surface_tile_visual_confirm_color +ffffffff821cc000 T link_enc_cfg_init +ffffffff821cc1f0 T link_enc_cfg_copy +ffffffff821cc220 T link_enc_cfg_link_encs_assign +ffffffff821cd6c0 T link_enc_cfg_validate +ffffffff821cde70 T link_enc_cfg_link_enc_unassign +ffffffff821ce000 T link_enc_cfg_is_transmitter_mappable +ffffffff821ce120 T link_enc_cfg_get_stream_using_link_enc +ffffffff821ce220 T link_enc_cfg_get_link_using_link_enc +ffffffff821ce330 T link_enc_cfg_get_link_enc_used_by_link +ffffffff821ce4b0 T link_enc_cfg_get_next_avail_link_enc +ffffffff821ce620 T link_enc_cfg_get_link_enc_used_by_stream +ffffffff821ce640 T link_enc_cfg_get_link_enc +ffffffff821ce6d0 T link_enc_cfg_get_link_enc_used_by_stream_current +ffffffff821ce850 T link_enc_cfg_is_link_enc_avail +ffffffff821cea50 T link_enc_cfg_set_transient_mode +ffffffff821cf000 T dc_get_link_at_index +ffffffff821cf030 T dc_get_edp_links +ffffffff821cf0b0 T dc_get_edp_link_panel_inst +ffffffff821cf170 T dc_link_detect +ffffffff821cf1a0 T dc_link_detect_connection_type +ffffffff821cf1d0 T dc_link_get_status +ffffffff821cf200 T dc_link_is_hdcp14 +ffffffff821cf230 T dc_link_is_hdcp22 +ffffffff821cf260 T dc_link_clear_dprx_states +ffffffff821cf290 T dc_link_reset_cur_dp_mst_topology +ffffffff821cf2c0 T dc_link_bandwidth_kbps +ffffffff821cf2f0 T dc_get_cur_link_res_map +ffffffff821cf310 T dc_restore_link_res_map +ffffffff821cf330 T dc_link_update_dsc_config +ffffffff821cf360 T dc_is_oem_i2c_device_present +ffffffff821cf3b0 T dc_submit_i2c +ffffffff821cf3e0 T dc_submit_i2c_oem +ffffffff821cf430 T dc_link_dp_handle_automated_test +ffffffff821cf460 T dc_link_dp_set_test_pattern +ffffffff821cf490 T dc_link_set_drive_settings +ffffffff821cf530 T dc_link_set_preferred_link_settings +ffffffff821cf550 T dc_link_set_preferred_training_settings +ffffffff821cf580 T dc_dp_trace_is_initialized +ffffffff821cf5b0 T dc_dp_trace_set_is_logged_flag +ffffffff821cf5e0 T dc_dp_trace_is_logged +ffffffff821cf610 T dc_dp_trace_get_lt_end_timestamp +ffffffff821cf640 T dc_dp_trace_get_lt_counts +ffffffff821cf670 T dc_dp_trace_get_link_loss_count +ffffffff821cf6a0 T dc_link_add_remote_sink +ffffffff821cf6d0 T dc_link_remove_remote_sink +ffffffff821cf700 T dc_link_aux_transfer_raw +ffffffff821cf730 T dc_link_bw_kbps_from_raw_frl_link_rate_data +ffffffff821cf750 T dc_link_decide_edp_link_settings +ffffffff821cf780 T dc_link_dp_get_max_link_enc_cap +ffffffff821cf7b0 T dc_link_dp_mst_decide_link_encoding_format +ffffffff821cf7e0 T dc_link_get_link_cap +ffffffff821cf810 T dc_link_get_highest_encoding_format +ffffffff821cf8e0 T dc_link_is_dp_sink_present +ffffffff821cf910 T dc_link_is_fec_supported +ffffffff821cf940 T dc_link_overwrite_extended_receiver_cap +ffffffff821cf970 T dc_link_should_enable_fec +ffffffff821cf9a0 T dc_link_dp_dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff821cf9d0 T dc_link_handle_usb4_bw_alloc_response +ffffffff821cfa00 T dc_link_check_link_loss_status +ffffffff821cfa30 T dc_link_dp_allow_hpd_rx_irq +ffffffff821cfa60 T dc_link_dp_handle_link_loss +ffffffff821cfa90 T dc_link_dp_read_hpd_rx_irq_data +ffffffff821cfac0 T dc_link_handle_hpd_rx_irq +ffffffff821cfaf0 T dc_link_dp_receiver_power_ctrl +ffffffff821cfb20 T dc_link_decide_lttpr_mode +ffffffff821cfb50 T dc_link_edp_panel_backlight_power_on +ffffffff821cfb80 T dc_link_get_backlight_level +ffffffff821cfbb0 T dc_link_get_backlight_level_nits +ffffffff821cfbe0 T dc_link_set_backlight_level +ffffffff821cfc10 T dc_link_set_backlight_level_nits +ffffffff821cfc40 T dc_link_get_target_backlight_pwm +ffffffff821cfc70 T dc_link_get_psr_state +ffffffff821cfca0 T dc_link_set_psr_allow_active +ffffffff821cfcd0 T dc_link_setup_psr +ffffffff821cfd00 T dc_link_get_replay_state +ffffffff821cfd30 T dc_link_wait_for_t12 +ffffffff821cfd60 T dc_link_get_hpd_state +ffffffff821cfd90 T dc_link_enable_hpd +ffffffff821cfdc0 T dc_link_disable_hpd +ffffffff821cfdf0 T dc_link_enable_hpd_filter +ffffffff821cfe20 T dc_link_dp_dpia_validate +ffffffff821d0000 T resource_parse_asic_id +ffffffff821d0250 T dc_create_resource_pool +ffffffff821d0620 T dc_destroy_resource_pool +ffffffff821d0690 T resource_construct +ffffffff821d0c70 T resource_unreference_clock_source +ffffffff821d0cf0 T resource_reference_clock_source +ffffffff821d0d70 T resource_get_clock_source_reference +ffffffff821d0df0 T resource_are_vblanks_synchronizable +ffffffff821d1010 T resource_are_streams_timing_synchronizable +ffffffff821d1100 T resource_find_used_clk_src_for_sharing +ffffffff821d1240 T resource_get_num_mpc_splits +ffffffff821d12d0 T resource_get_num_odm_splits +ffffffff821d13a0 T resource_get_otg_master +ffffffff821d1450 T resource_build_scaling_params +ffffffff821d22e0 t calculate_odm_slice_in_timing_active +ffffffff821d2470 T resource_build_scaling_params_for_context +ffffffff821d25f0 T resource_find_free_secondary_pipe_legacy +ffffffff821d2690 T resource_find_free_pipe_used_in_cur_mpc_blending_tree +ffffffff821d2700 T resource_is_pipe_type +ffffffff821d2780 T recource_find_free_pipe_not_used_in_cur_res_ctx +ffffffff821d2800 T resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine +ffffffff821d2920 T resource_is_for_mpcc_combine +ffffffff821d29b0 T resource_find_any_free_pipe +ffffffff821d2a20 T resource_get_otg_master_for_stream +ffffffff821d2b50 T resource_get_opp_head +ffffffff821d2bf0 T dc_add_plane_to_context +ffffffff821d2ef0 T dc_remove_plane_from_context +ffffffff821d30f0 T dc_rem_all_planes_for_stream +ffffffff821d32b0 T dc_add_all_planes_for_stream +ffffffff821d3430 T dc_is_timing_changed +ffffffff821d34a0 T dc_is_stream_unchanged +ffffffff821d3590 T dc_is_stream_scaling_unchanged +ffffffff821d3640 T update_audio_usage +ffffffff821d36b0 T dc_add_stream_to_ctx +ffffffff821d37a0 T dc_remove_stream_from_ctx +ffffffff821d3bf0 T resource_map_pool_resources +ffffffff821d46e0 t acquire_first_split_pipe +ffffffff821d4860 t add_hpo_dp_link_enc_to_ctx +ffffffff821d4930 t find_first_free_audio +ffffffff821d49f0 T dc_resource_state_copy_construct_current +ffffffff821d4a10 T dc_resource_state_copy_construct +ffffffff821d4be0 T dc_resource_state_construct +ffffffff821d4c00 T dc_resource_is_dsc_encoding_supported +ffffffff821d4c50 T dc_validate_with_context +ffffffff821d5910 t planes_changed_for_existing_stream +ffffffff821d5aa0 T dc_validate_global_state +ffffffff821d5e60 T dc_resource_state_destruct +ffffffff821d5f40 T dc_resource_find_first_free_pll +ffffffff821d5fb0 T resource_build_info_frame +ffffffff821d66e0 T resource_map_clock_resources +ffffffff821d6890 T pipe_need_reprogram +ffffffff821d6a10 T resource_build_bit_depth_reduction_params +ffffffff821d6c40 T dc_validate_stream +ffffffff821d6e30 T dc_validate_plane +ffffffff821d6ec0 T resource_pixel_format_to_bpp +ffffffff821d6f40 T get_audio_check +ffffffff821d7060 T get_temp_dp_link_res +ffffffff821d7170 T reset_syncd_pipes_from_disabled_pipes +ffffffff821d72c0 T check_syncd_pipes_for_disabled_master_pipe +ffffffff821d7420 T reset_sync_context_for_pipe +ffffffff821d74d0 T resource_transmitter_to_phy_idx +ffffffff821d7530 T get_link_hwss +ffffffff821d75f0 T is_h_timing_divisible_by_2 +ffffffff821d7650 T dc_resource_acquire_secondary_pipe_for_mpc_odm +ffffffff821d7880 T update_dp_encoder_resources_for_test_harness +ffffffff821d7b40 t calculate_plane_rec_in_timing_active +ffffffff821d7e60 t calculate_init_and_vp +ffffffff821d9000 T dc_sink_retain +ffffffff821d9030 T dc_sink_release +ffffffff821d90b0 T dc_sink_create +ffffffff821da000 T dc_stat_get_dmub_notification +ffffffff821da0d0 T dc_stat_get_dmub_dataout +ffffffff821db000 T update_stream_signal +ffffffff821db080 T dc_stream_retain +ffffffff821db0b0 T dc_stream_release +ffffffff821db150 T dc_create_stream_for_sink +ffffffff821db4b0 T dc_copy_stream +ffffffff821db590 T dc_stream_get_status_from_state +ffffffff821db5f0 T dc_stream_get_status +ffffffff821db660 T dc_optimize_timing_for_fsft +ffffffff821db6b0 T dc_stream_set_cursor_attributes +ffffffff821db8f0 t program_cursor_attributes +ffffffff821dba80 T dc_stream_set_cursor_position +ffffffff821dbbe0 t program_cursor_position +ffffffff821dbd40 T dc_stream_add_writeback +ffffffff821dbf60 T dc_stream_remove_writeback +ffffffff821dc0a0 T dc_stream_warmup_writeback +ffffffff821dc0e0 T dc_stream_get_vblank_counter +ffffffff821dc1b0 T dc_stream_send_dp_sdp +ffffffff821dc4c0 T dc_stream_get_scanoutpos +ffffffff821dc5a0 T dc_stream_dmdata_status_done +ffffffff821dc660 T dc_stream_set_dynamic_metadata +ffffffff821dc7d0 T dc_stream_add_dsc_to_resource +ffffffff821dc820 T dc_stream_get_pipe_ctx +ffffffff821dc8d0 T dc_stream_log +ffffffff821dd000 T enable_surface_flip_reporting +ffffffff821dd030 T dc_create_plane_state +ffffffff821dd200 T dc_plane_get_status +ffffffff821dd390 T dc_plane_state_retain +ffffffff821dd3c0 T dc_plane_state_release +ffffffff821dd510 T dc_gamma_retain +ffffffff821dd540 T dc_gamma_release +ffffffff821dd5a0 T dc_create_gamma +ffffffff821dd600 T dc_transfer_func_retain +ffffffff821dd630 T dc_transfer_func_release +ffffffff821dd680 T dc_create_transfer_func +ffffffff821dd6e0 T dc_create_3dlut_func +ffffffff821dd740 T dc_3dlut_func_release +ffffffff821dd790 T dc_3dlut_func_retain +ffffffff821de000 T vm_helper_mark_vmid_used +ffffffff821de030 T dc_setup_system_context +ffffffff821de0d0 T dc_setup_vm_context +ffffffff821de100 T dc_get_vmid_use_vector +ffffffff821de160 T vm_helper_init +ffffffff821df000 T dc_dmub_srv_create +ffffffff821df0a0 T dc_dmub_srv_destroy +ffffffff821df100 T dc_dmub_srv_wait_idle +ffffffff821df180 T dc_dmub_srv_log_diagnostic_data +ffffffff821df7f0 T dc_dmub_srv_clear_inbox0_ack +ffffffff821df860 T dc_dmub_srv_wait_for_inbox0_ack +ffffffff821df8d0 T dc_dmub_srv_send_inbox0_cmd +ffffffff821df940 T dc_dmub_srv_cmd_run +ffffffff821df960 T dc_dmub_srv_cmd_run_list +ffffffff821dfb40 T dc_dmub_srv_optimized_init_done +ffffffff821dfbd0 T dc_dmub_srv_notify_stream_mask +ffffffff821dfc30 T dc_dmub_srv_is_restore_required +ffffffff821dfcc0 T dc_dmub_srv_get_dmub_outbox0_msg +ffffffff821dfcf0 T dc_dmub_trace_event_control +ffffffff821dfd10 T dc_dmub_srv_drr_update_cmd +ffffffff821dfdb0 T dc_dmub_srv_set_drr_manual_trigger_cmd +ffffffff821dfe50 T dc_dmub_srv_p_state_delegate +ffffffff821e0200 T dc_dmub_srv_query_caps_cmd +ffffffff821e02c0 T dc_dmub_srv_get_visual_confirm_color_cmd +ffffffff821e03b0 T dc_dmub_setup_subvp_dmub_command +ffffffff821e0e30 T dc_dmub_srv_get_diagnostic_data +ffffffff821e0e70 T dc_send_update_cursor_info_to_dmu +ffffffff821e11e0 T dc_dmub_check_min_version +ffffffff821e1220 T dc_dmub_srv_enable_dpia_trace +ffffffff821e2000 T dc_edid_parser_send_cea +ffffffff821e20b0 T dc_edid_parser_recv_cea_ack +ffffffff821e2140 T dc_edid_parser_recv_amd_vsdb +ffffffff821e3000 T generic_reg_update_ex +ffffffff821e3370 t set_reg_field_values +ffffffff821e3530 T generic_reg_set_ex +ffffffff821e3750 T generic_reg_get +ffffffff821e37c0 T generic_reg_get2 +ffffffff821e3850 T generic_reg_get3 +ffffffff821e38f0 T generic_reg_get4 +ffffffff821e39a0 T generic_reg_get5 +ffffffff821e3a70 T generic_reg_get6 +ffffffff821e3b50 T generic_reg_get7 +ffffffff821e3c50 T generic_reg_get8 +ffffffff821e3d70 T generic_reg_wait +ffffffff821e3ff0 T generic_write_indirect_reg +ffffffff821e4050 T generic_read_indirect_reg +ffffffff821e4110 T generic_indirect_reg_get +ffffffff821e42d0 T generic_indirect_reg_update_ex +ffffffff821e4500 T generic_indirect_reg_update_ex_sync +ffffffff821e4700 T generic_indirect_reg_get_sync +ffffffff821e4830 T reg_sequence_start_gather +ffffffff821e48d0 T reg_sequence_start_execute +ffffffff821e4a80 T reg_sequence_wait_done +ffffffff821e4ae0 T dce_version_to_string +ffffffff821e5000 T dce_abm_create +ffffffff821e50c0 T dce_abm_destroy +ffffffff821e5110 t dce_abm_init +ffffffff821e5400 t dce_abm_set_level +ffffffff821e5510 t dce_abm_immediate_disable +ffffffff821e5560 t dce_abm_set_pipe +ffffffff821e56e0 t dce_abm_set_backlight_level_pwm +ffffffff821e5930 t dce_abm_get_current_backlight +ffffffff821e5960 t dce_abm_get_target_backlight +ffffffff821e6000 T dce_aud_az_enable +ffffffff821e6190 T dce_aud_az_disable +ffffffff821e63d0 T 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hubbub1_is_allow_self_refresh_enabled +ffffffff822424d0 T hubbub1_verify_allow_pstate_change_high +ffffffff822426d0 T hubbub1_wm_change_req_wa +ffffffff82242780 T hubbub1_program_urgent_watermarks +ffffffff82242ba0 T hubbub1_program_stutter_watermarks +ffffffff82243050 T hubbub1_program_pstate_watermarks +ffffffff822432c0 T hubbub1_program_watermarks +ffffffff82243420 T hubbub1_update_dchub +ffffffff82243690 T hubbub1_toggle_watermark_change_req +ffffffff82243740 T hubbub1_soft_reset +ffffffff82243780 T hubbub1_construct +ffffffff822437e0 t hubbub1_get_dcc_compression_cap +ffffffff82243a20 t hubbub1_dcc_support_swizzle +ffffffff82243ab0 t hubbub1_dcc_support_pixel_format +ffffffff82244000 T hubp1_set_blank +ffffffff82244130 T hubp1_clear_underflow +ffffffff82244180 T hubp1_vready_workaround +ffffffff82244220 T hubp1_program_tiling +ffffffff822444c0 T hubp1_program_size +ffffffff82244660 T hubp1_program_rotation +ffffffff822447e0 T hubp1_program_pixel_format +ffffffff82244dc0 T hubp1_program_surface_flip_and_addr +ffffffff82245700 T hubp1_dcc_control +ffffffff822457d0 T hubp1_program_surface_config +ffffffff82245900 T hubp1_program_requestor +ffffffff82245cf0 T hubp1_program_deadline +ffffffff822464b0 T hubp1_is_flip_pending +ffffffff822465e0 T min_set_viewport +ffffffff82246920 T hubp1_read_state_common +ffffffff822477d0 T hubp1_read_state +ffffffff82247ac0 T hubp1_get_cursor_pitch +ffffffff82247b70 T hubp1_cursor_set_attributes +ffffffff82247e50 T hubp1_cursor_set_position +ffffffff822481f0 T hubp1_clk_cntl +ffffffff82248240 T hubp1_vtg_sel +ffffffff82248280 T hubp1_in_blank +ffffffff822482f0 T hubp1_soft_reset +ffffffff82248330 T hubp1_set_flip_int +ffffffff82248380 T hubp1_init +ffffffff822483b0 T dcn10_hubp_construct +ffffffff82248420 t hubp1_setup +ffffffff822484f0 t hubp1_setup_interdependent +ffffffff822488c0 t hubp1_set_vm_system_aperture_settings +ffffffff82248b10 t hubp1_set_vm_context0_settings +ffffffff82248e40 t hubp1_set_hubp_blank_en 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dcn10_update_plane_addr +ffffffff8224ec00 T dcn10_set_input_transfer_func +ffffffff8224eda0 T dcn10_set_output_transfer_func +ffffffff8224ee80 T dcn10_pipe_control_lock +ffffffff8224ef50 T dcn10_cursor_lock +ffffffff8224f140 T dcn10_enable_vblanks_synchronization +ffffffff8224f9b0 T dcn10_enable_timing_synchronization +ffffffff8224fe40 T dcn10_enable_per_frame_crtc_position_reset +ffffffff82250070 T dcn10_program_gamut_remap +ffffffff82250270 T dcn10_program_output_csc +ffffffff822503c0 T dcn10_update_visual_confirm_color +ffffffff82250440 T dcn10_update_mpcc +ffffffff82250740 T dcn10_blank_pixel_data +ffffffff822508c0 T dcn10_set_hdr_multiplier +ffffffff82250960 T dcn10_program_pipe +ffffffff822516a0 T dcn10_wait_for_pending_cleared +ffffffff822517c0 T dcn10_post_unlock_program_front_end +ffffffff82251a80 T dcn10_prepare_bandwidth +ffffffff82251c50 T dcn10_optimize_bandwidth +ffffffff82251e20 T dcn10_set_drr +ffffffff82251f20 T dcn10_get_position +ffffffff82251fb0 T dcn10_set_static_screen_control +ffffffff82252060 T dcn10_setup_stereo +ffffffff822521d0 T dcn10_wait_for_mpcc_disconnect +ffffffff822523a0 T dcn10_dummy_display_power_gating +ffffffff822523d0 T dcn10_update_pending_status +ffffffff82252530 T dcn10_update_dchub +ffffffff82252560 T dcn10_set_cursor_position +ffffffff82252ab0 T dcn10_set_cursor_attribute +ffffffff82252b10 T dcn10_set_cursor_sdr_white_level +ffffffff82252be0 T dcn10_get_vupdate_offset_from_vsync +ffffffff82252c70 T dcn10_calc_vupdate_position +ffffffff82252d10 T dcn10_setup_periodic_interrupt +ffffffff82252e30 T dcn10_setup_vupdate_interrupt +ffffffff82252f00 T dcn10_unblank_stream +ffffffff82253020 T dcn10_send_immediate_sdp_message +ffffffff82253080 T dcn10_set_clock +ffffffff82253190 T dcn10_get_clock +ffffffff822531f0 T dcn10_get_dcc_en_bits +ffffffff82254000 T snprintf_count +ffffffff82254090 T dcn10_clear_status_bits +ffffffff82254260 T dcn10_get_hw_state +ffffffff82256000 T dcn10_hw_sequencer_construct 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mpc1_assert_mpcc_idle_before_connect +ffffffff8225b7e0 T mpc1_insert_plane +ffffffff8225be00 T mpc1_remove_mpcc +ffffffff8225c210 T mpc1_mpc_init +ffffffff8225c580 T mpc1_mpc_init_single_inst +ffffffff8225c790 T mpc1_init_mpcc_list_from_hw +ffffffff8225cab0 T mpc1_read_mpcc_state +ffffffff8225cc70 T mpc1_cursor_lock +ffffffff8225ccf0 T mpc1_get_mpc_out_mux +ffffffff8225cd80 T dcn10_mpc_construct +ffffffff8225cf00 t mpc1_update_blending +ffffffff8225e000 T opp1_program_bit_depth_reduction +ffffffff8225e440 T opp1_set_dyn_expansion +ffffffff8225e5c0 T opp1_program_fmt +ffffffff8225e8e0 T opp1_program_stereo +ffffffff8225e9e0 T opp1_pipe_clock_control +ffffffff8225ea20 T opp1_destroy +ffffffff8225ea70 T dcn10_opp_construct +ffffffff8225f000 T optc1_program_global_sync +ffffffff8225f170 T optc1_setup_vertical_interrupt0 +ffffffff8225f200 T optc1_setup_vertical_interrupt1 +ffffffff8225f270 T optc1_setup_vertical_interrupt2 +ffffffff8225f2e0 T optc1_program_timing +ffffffff8225fa30 T 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dcn20_set_mcif_arb_params +ffffffff82291a70 T dcn20_validate_dsc +ffffffff82291c30 T dcn20_find_secondary_pipe +ffffffff82291e20 T dcn20_merge_pipes_for_validate +ffffffff822920a0 T dcn20_validate_apply_pipe_split_flags +ffffffff822929a0 T dcn20_fast_validate_bw +ffffffff82292fb0 T dcn20_validate_bandwidth +ffffffff82293050 T dcn20_acquire_free_pipe_for_layer +ffffffff82293190 T dcn20_get_dcc_compression_cap +ffffffff822931c0 T dcn20_patch_unknown_plane_state +ffffffff82293220 T dcn20_dwbc_create +ffffffff82293360 T dcn20_mmhubbub_create +ffffffff822934f0 T dcn20_create_resource_pool +ffffffff82295010 t dcn20_resource_destruct +ffffffff82295560 t dcn20_destroy_resource_pool +ffffffff822955d0 t dcn20_panel_cntl_create +ffffffff82295660 t read_dce_straps +ffffffff82295690 t dcn20_create_audio +ffffffff82296000 T enc2_set_dynamic_metadata +ffffffff822962a0 T enc2_stream_encoder_dp_unblank +ffffffff82296660 T enc2_stream_encoder_dp_set_stream_attribute +ffffffff822966c0 T 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enc3_stream_encoder_update_dp_info_packets +ffffffff822b8350 T enc3_audio_mute_control +ffffffff822b83d0 T enc3_se_dp_audio_setup +ffffffff822b8460 T enc3_se_dp_audio_enable +ffffffff822b8580 T enc3_se_hdmi_audio_setup +ffffffff822b8910 T dcn30_dio_stream_encoder_construct +ffffffff822b8980 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff822b9010 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff822b9260 t enc3_read_state +ffffffff822b9420 t enc3_dp_set_dsc_config +ffffffff822b9500 t enc3_dp_set_odm_combine +ffffffff822ba000 T dpp30_read_state +ffffffff822ba050 T dpp3_program_post_csc +ffffffff822ba250 T dpp3_set_pre_degam +ffffffff822ba310 T dpp3_cnv_setup +ffffffff822bac80 T dpp3_set_cursor_attributes +ffffffff822bae00 T dpp3_get_optimal_number_of_taps +ffffffff822bb920 T dpp3_construct +ffffffff822bb980 t dpp3_deferred_update +ffffffff822bbdb0 t dpp3_program_blnd_lut +ffffffff822bc8b0 t dpp3_program_shaper +ffffffff822beb30 t dpp3_program_3dlut +ffffffff822bf3b0 t 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hubbub3_get_dcc_compression_cap +ffffffff822c4600 T hubbub3_force_wm_propagate_to_pipes +ffffffff822c46c0 T hubbub3_force_pstate_change_control +ffffffff822c4740 T hubbub3_init_watermarks +ffffffff822c4b70 T hubbub3_construct +ffffffff822c5000 T hubp3_set_vm_system_aperture_settings +ffffffff822c5150 T hubp3_program_surface_flip_and_addr +ffffffff822c5c40 T hubp3_dcc_control +ffffffff822c5d10 T hubp3_dcc_control_sienna_cichlid +ffffffff822c5e30 T hubp3_dmdata_set_attributes +ffffffff822c6070 T hubp3_program_surface_config +ffffffff822c63b0 T hubp3_read_state +ffffffff822c66b0 T hubp3_setup +ffffffff822c6760 T hubp3_init +ffffffff822c6790 T hubp3_construct +ffffffff822c7000 T dcn30_set_blend_lut +ffffffff822c7070 T dcn30_set_input_transfer_func +ffffffff822c71f0 T dcn30_set_output_transfer_func +ffffffff822c7580 T dcn30_update_writeback +ffffffff822c7620 t dcn30_set_writeback +ffffffff822c7800 T dcn30_mmhubbub_warmup +ffffffff822c7a70 T dcn30_enable_writeback +ffffffff822c7b30 T dcn30_disable_writeback +ffffffff822c7c30 T dcn30_program_all_writeback_pipes_in_tree +ffffffff822c7f70 T dcn30_init_hw +ffffffff822c87c0 T dcn30_set_avmute +ffffffff822c8900 T dcn30_update_info_frame +ffffffff822c8a00 T dcn30_program_dmdata_engine +ffffffff822c8aa0 T dcn30_apply_idle_power_optimizations +ffffffff822c8fe0 T dcn30_does_plane_fit_in_mall +ffffffff822c9090 T dcn30_hardware_release +ffffffff822c9190 T dcn30_set_disp_pattern_generator +ffffffff822c9210 T dcn30_prepare_bandwidth +ffffffff822c9310 T dcn30_set_static_screen_control +ffffffff822ca000 T dcn30_hw_sequencer_construct +ffffffff822cb000 T dcn30_mmhubbub_construct +ffffffff822cb050 t mmhubbub3_warmup_mcif +ffffffff822cb2a0 t mmhubbub3_config_mcif_buf +ffffffff822cb800 t mmhubbub3_config_mcif_arb +ffffffff822cc000 T mpc3_is_dwb_idle +ffffffff822cc080 T mpc3_set_dwb_mux +ffffffff822cc100 T mpc3_disable_dwb_mux +ffffffff822cc180 T mpc3_set_out_rate_control +ffffffff822cc2b0 T mpc3_get_ogam_current +ffffffff822cc360 T mpc3_power_on_ogam_lut +ffffffff822cc440 T mpc3_set_output_gamma +ffffffff822cd140 T mpc3_set_denorm +ffffffff822cd1b0 T mpc3_set_denorm_clamp +ffffffff822cd320 T mpc3_program_shaper +ffffffff822cf6d0 t mpc3_power_on_shaper_3dlut +ffffffff822cfa90 T mpc3_init_mpcc +ffffffff822cfb10 T mpc3_set_gamut_remap +ffffffff822cfda0 T mpc3_program_3dlut +ffffffff822d05e0 t mpc3_set3dlut_ram12 +ffffffff822d07d0 T mpc3_set_output_csc +ffffffff822d0950 T mpc3_set_ocsc_default +ffffffff822d0af0 T mpc3_set_rmu_mux +ffffffff822d0b90 T mpc3_get_rmu_mux_status +ffffffff822d0c40 T mpcc3_acquire_rmu +ffffffff822d0db0 T dcn30_mpc_construct +ffffffff822d0e80 t mpcc3_release_rmu +ffffffff822d0ff0 t mpc3_set_mpc_mem_lp_mode +ffffffff822d2000 T optc3_triplebuffer_lock +ffffffff822d2140 T optc3_lock_doublebuffer_enable +ffffffff822d2410 T optc3_lock_doublebuffer_disable +ffffffff822d2550 T optc3_lock +ffffffff822d2640 T optc3_set_out_mux +ffffffff822d2680 T optc3_program_blank_color +ffffffff822d27d0 T optc3_set_drr_trigger_window +ffffffff822d2870 T optc3_set_vtotal_change_limit +ffffffff822d28f0 T optc3_set_dsc_config +ffffffff822d2950 T optc3_set_odm_bypass +ffffffff822d2af0 T optc3_set_odm_combine +ffffffff822d2e70 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff822d2ef0 T optc3_set_vtotal_min_max +ffffffff822d2f30 T optc3_tg_init +ffffffff822d2fa0 T dcn30_timing_generator_init +ffffffff822d4000 T dcn30_add_stream_to_ctx +ffffffff822d4020 T dcn30_populate_dml_pipes_from_context +ffffffff822d4120 T dcn30_populate_dml_writeback_from_context +ffffffff822d4190 T dcn30_calc_max_scaled_time +ffffffff822d41f0 T dcn30_set_mcif_arb_params +ffffffff822d4370 T dcn30_acquire_post_bldn_3dlut +ffffffff822d4500 T dcn30_release_post_bldn_3dlut +ffffffff822d45b0 T dcn30_internal_validate_bw +ffffffff822d53e0 t dcn30_split_stream_for_mpc_or_odm +ffffffff822d5730 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff822d5820 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff822d58c0 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff822d5970 T dcn30_update_soc_for_wm_a +ffffffff822d59d0 T dcn30_calculate_wm_and_dlg +ffffffff822d5a50 T dcn30_validate_bandwidth +ffffffff822d5f00 T dcn30_update_bw_bounding_box +ffffffff822d65f0 T dcn30_create_resource_pool +ffffffff822d7ef0 t dcn30_resource_destruct +ffffffff822d8550 t dcn30_destroy_resource_pool +ffffffff822d85c0 t dcn30_panel_cntl_create +ffffffff822d8650 t dcn30_link_encoder_create +ffffffff822d8710 t dcn30_get_panel_config_defaults +ffffffff822d8790 t read_dce_straps +ffffffff822d87c0 t dcn30_create_audio +ffffffff822d87f0 t dcn30_stream_encoder_create +ffffffff822d89b0 t dcn30_hwseq_create +ffffffff822d9000 T vpg3_update_generic_info_packet +ffffffff822d9a10 T vpg3_construct +ffffffff822da000 T dccg301_create +ffffffff822db000 T dcn301_link_encoder_construct +ffffffff822dc000 T hubbub301_construct +ffffffff822dd000 T dcn301_hw_sequencer_construct +ffffffff822de000 T optc301_set_drr +ffffffff822de260 T optc301_setup_manual_trigger +ffffffff822de390 T dcn301_timing_generator_init +ffffffff822df000 T dcn301_panel_cntl_construct +ffffffff822df050 t dcn301_panel_cntl_destroy +ffffffff822df0a0 t dcn301_panel_cntl_hw_init +ffffffff822df320 t dcn301_is_panel_backlight_on +ffffffff822df390 t dcn301_is_panel_powered_on +ffffffff822df450 t dcn301_store_backlight_level +ffffffff822df510 t dcn301_get_16_bit_backlight_from_pwm +ffffffff822e0000 T dcn301_create_resource_pool +ffffffff822e18a0 t dcn301_destruct +ffffffff822e1ec0 t dcn301_destroy_resource_pool +ffffffff822e1f30 t dcn301_panel_cntl_create +ffffffff822e1fc0 t dcn301_link_encoder_create +ffffffff822e2080 t dcn301_calculate_wm_and_dlg +ffffffff822e2100 t read_dce_straps +ffffffff822e2130 t dcn301_create_audio +ffffffff822e2160 t dcn301_stream_encoder_create +ffffffff822e2320 t dcn301_hwseq_create +ffffffff822e3000 T dcn302_dpp_pg_control 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dcn303_resource_destruct +ffffffff822ebb70 t dcn303_destroy_resource_pool +ffffffff822ebbe0 t dcn303_panel_cntl_create +ffffffff822ebc70 t dcn303_link_encoder_create +ffffffff822ebd30 t dcn303_get_panel_config_defaults +ffffffff822ebdb0 t read_dce_straps +ffffffff822ebde0 t dcn303_create_audio +ffffffff822ebe10 t dcn303_stream_encoder_create +ffffffff822ebfd0 t dcn303_hwseq_create +ffffffff822ed000 T afmt31_powerdown +ffffffff822ed090 T afmt31_poweron +ffffffff822ed120 T afmt31_construct +ffffffff822ee000 T apg31_construct +ffffffff822ee050 t apg31_se_audio_setup +ffffffff822ee170 t apg31_enable +ffffffff822ee2a0 t apg31_disable +ffffffff822ef000 T dccg31_update_dpp_dto +ffffffff822ef180 T dccg31_set_dpstreamclk +ffffffff822ef320 t dccg31_disable_dpstreamclk +ffffffff822ef480 T dccg31_enable_symclk32_se +ffffffff822ef7b0 T dccg31_disable_symclk32_se +ffffffff822efab0 T dccg31_enable_symclk32_le +ffffffff822efbd0 T dccg31_disable_symclk32_le +ffffffff822efcc0 T dccg31_set_symclk32_le_root_clock_gating +ffffffff822efde0 T dccg31_disable_dscclk +ffffffff822f0050 T dccg31_enable_dscclk +ffffffff822f02f0 T dccg31_set_physymclk +ffffffff822f0860 T dccg31_set_dtbclk_dto +ffffffff822f0b50 T dccg31_set_audio_dtbclk_dto +ffffffff822f0c80 T dccg31_get_dccg_ref_freq +ffffffff822f0cb0 T dccg31_set_dispclk_change_mode +ffffffff822f0d00 T dccg31_init +ffffffff822f13a0 T dccg31_otg_add_pixel +ffffffff822f13e0 T dccg31_otg_drop_pixel +ffffffff822f1420 T dccg31_create +ffffffff822f2000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff822f23c0 T dcn31_link_encoder_construct +ffffffff822f25b0 T dcn31_link_encoder_construct_minimal +ffffffff822f2630 T dcn31_link_encoder_enable_dp_output +ffffffff822f28b0 T dcn31_link_encoder_enable_dp_mst_output +ffffffff822f2b30 T dcn31_link_encoder_disable_output +ffffffff822f2de0 T dcn31_link_encoder_is_in_alt_mode +ffffffff822f2f40 T dcn31_link_encoder_get_max_link_cap +ffffffff822f30d0 t enc31_hw_init +ffffffff822f4000 T dcn31_hpo_dp_link_enc_enable +ffffffff822f4180 T dcn31_hpo_dp_link_enc_disable +ffffffff822f4200 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff822f4be0 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff822f4e90 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff822f5170 T dcn31_hpo_dp_link_enc_read_state +ffffffff822f5480 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff822f5590 T dcn31_hpo_dp_link_enc_disable_output +ffffffff822f56f0 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff822f57f0 T hpo_dp_link_encoder31_construct +ffffffff822f5850 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff822f6000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff822f6070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff822f61e0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff822f6500 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff822f6630 t dcn31_hpo_dp_stream_enc_disable +ffffffff822f66b0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff822f6fd0 t dcn31_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num +ffffffff822f70a0 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff822f72f0 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff822f74a0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff822f7790 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff822f78a0 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff822f7960 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff822f7a50 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff822f7c40 t dcn31_hpo_dp_stream_enc_read_state +ffffffff822f7e00 t dcn31_set_hblank_min_symbol_width +ffffffff822f8000 T hubbub31_init_dchub_sys_ctx +ffffffff822f8220 T hubbub31_init +ffffffff822f82d0 T hubbub31_construct +ffffffff822f8370 t hubbub31_get_dcc_compression_cap +ffffffff822f8570 t hubbub31_get_dchub_ref_freq +ffffffff822f8650 t hubbub31_program_watermarks +ffffffff822fa1b0 t hubbub31_verify_allow_pstate_change_high +ffffffff822fa3a0 t dcn31_program_det_size +ffffffff822fa5c0 t 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dcn32_subvp_pipe_control_lock_fast +ffffffff82320f00 T dcn32_set_mpc_shaper_3dlut +ffffffff82321030 T dcn32_set_mcm_luts +ffffffff823211f0 T dcn32_set_input_transfer_func +ffffffff82321350 T dcn32_set_output_transfer_func +ffffffff823215d0 T dcn32_update_force_pstate +ffffffff82321820 T dcn32_update_mall_sel +ffffffff82321a30 T dcn32_program_mall_pipe_config +ffffffff82321b20 T dcn32_init_hw +ffffffff82322520 T dcn32_update_odm +ffffffff82322bc0 T dcn32_calculate_dccg_k1_k2_values +ffffffff82322e20 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff82322ed0 T dcn32_set_pixels_per_cycle +ffffffff82323030 T dcn32_resync_fifo_dccg_dio +ffffffff82323200 T dcn32_unblank_stream +ffffffff82323450 T dcn32_disable_link_output +ffffffff82323840 T dcn32_update_phantom_vp_position +ffffffff82323950 T dcn32_apply_update_flags_for_phantom +ffffffff823239e0 T dcn32_dsc_pg_status +ffffffff82323ac0 T dcn32_update_dsc_pg +ffffffff82323bd0 T dcn32_enable_phantom_streams +ffffffff82323d30 T dcn32_init_blank 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dcn321_resource_construct +ffffffff82353840 t dcn321_mpc_create +ffffffff82357ea0 t dcn321_dwbc_create +ffffffff823588d0 t dcn321_mmhubbub_create +ffffffff82358db0 t dcn321_resource_destruct +ffffffff82359540 t dcn321_destroy_resource_pool +ffffffff823595b0 t dcn321_link_encoder_create +ffffffff8235a690 t dcn321_update_bw_bounding_box +ffffffff8235a6f0 t read_dce_straps +ffffffff8235a720 t dcn321_create_audio +ffffffff8235aaa0 t dcn321_stream_encoder_create +ffffffff8235c920 t dcn321_hpo_dp_stream_encoder_create +ffffffff8235d750 t dcn321_hpo_dp_link_encoder_create +ffffffff8235dbc0 t dcn321_hwseq_create +ffffffff8235e0b0 t dcn321_vpg_create +ffffffff8235f000 T bw_int_to_fixed_nonconst +ffffffff8235f0a0 T bw_frc_to_fixed +ffffffff8235f290 T bw_floor2 +ffffffff8235f350 T bw_ceil2 +ffffffff8235f3d0 T bw_mul +ffffffff82360000 T convert_to_custom_float_format +ffffffff82361000 T bw_calcs_init +ffffffff82361f30 T bw_calcs +ffffffff82363e40 t calculate_bandwidth +ffffffff8236d000 T scaler_settings_calculation +ffffffff8236d370 T mode_support_and_system_configuration +ffffffff82373680 T display_pipe_configuration +ffffffff82374000 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff82379000 T dcn_bw_mod +ffffffff82379060 T dcn_bw_min2 +ffffffff823790a0 T dcn_bw_max +ffffffff823790d0 T dcn_bw_max2 +ffffffff82379110 T dcn_bw_floor2 +ffffffff823791c0 T dcn_bw_floor +ffffffff823791f0 T dcn_bw_ceil +ffffffff82379230 T dcn_bw_ceil2 +ffffffff823792e0 T dcn_bw_max3 +ffffffff82379360 T dcn_bw_max5 +ffffffff823794a0 T dcn_bw_pow +ffffffff82379540 T dcn_bw_fabs +ffffffff82379580 T dcn_bw_log +ffffffff8237a000 T swizzle_mode_to_macro_tile_size +ffffffff8237a0a0 T dcn_validate_bandwidth +ffffffff8237c440 T dcn_bw_sync_calcs_and_dml +ffffffff8237c690 t dcn_bw_calc_rq_dlg_ttu +ffffffff8237cec0 T dcn_find_dcfclk_suits_all +ffffffff8237d380 T dcn_bw_update_from_pplib_fclks +ffffffff8237d510 T dcn_bw_update_from_pplib_dcfclks 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dcn30_fpu_update_bw_bounding_box +ffffffff823c4cd0 T dcn3_fpu_build_wm_range_table +ffffffff823c4fb0 T patch_dcn30_soc_bounding_box +ffffffff823c6000 T dml30_recalculate +ffffffff823c6610 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff823cd470 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff823cd6e0 T dml30_CalculateWriteBackDISPCLK +ffffffff823cd870 t dml_max3 +ffffffff823cd8e0 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff823d57a0 t CalculateSwathAndDETConfiguration +ffffffff823d5ec0 t TruncToValidBPP +ffffffff823d6130 t CalculateVMAndRowBytes +ffffffff823d6800 t CalculatePrefetchSourceLines +ffffffff823d69f0 t CalculateUrgentBurstFactor +ffffffff823d6ca0 t CalculateDCFCLKDeepSleep +ffffffff823d6ff0 t UseMinimumDCFCLK +ffffffff823d8390 t CalculatePrefetchSchedule +ffffffff823d9940 t CalculateFlipSchedule +ffffffff823d9e90 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff823dac40 t CalculateSwathWidth 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dcn316_update_bw_bounding_box +ffffffff823e43a0 T dcn_get_max_non_odm_pix_rate_100hz +ffffffff823e4400 T dcn_get_approx_det_segs_required_for_pstate +ffffffff823e5000 T dml31_recalculate +ffffffff823e5300 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff823ec640 T dml31_CalculateWriteBackDISPCLK +ffffffff823ec7d0 t dml_max3 +ffffffff823ec840 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff823f4d20 t CalculateSwathAndDETConfiguration +ffffffff823f53c0 t TruncToValidBPP +ffffffff823f5620 t CalculateDCFCLKDeepSleep +ffffffff823f5970 t CalculateVMAndRowBytes +ffffffff823f6010 t CalculatePrefetchSourceLines +ffffffff823f6200 t CalculateUrgentBurstFactor +ffffffff823f64b0 t UseMinimumDCFCLK +ffffffff823f74d0 t CalculatePrefetchSchedulePerPlane +ffffffff823f7c50 t CalculateFlipSchedule +ffffffff823f8240 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff823f8ec0 t CalculateSwathWidth +ffffffff823f9430 t CalculatePrefetchSchedule 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CalculateMaxVStartup +ffffffff82412930 t UseMinimumDCFCLK +ffffffff82413950 t CalculatePrefetchSchedulePerPlane +ffffffff824140d0 t CalculateFlipSchedule +ffffffff824146c0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82415340 t CalculateSwathWidth +ffffffff824158b0 t CalculatePrefetchSchedule +ffffffff82416dd0 t CalculateVupdateAndDynamicMetadataParameters +ffffffff82418000 T dml314_rq_dlg_get_rq_reg +ffffffff824184f0 t dml_rq_dlg_get_rq_params +ffffffff82418790 T dml314_rq_dlg_get_dlg_reg +ffffffff8241b670 t get_surf_rq_param +ffffffff8241d000 T dcn32_build_wm_range_table_fpu +ffffffff8241d3a0 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff8241d570 T dcn32_internal_validate_bw +ffffffff8241f5f0 T dcn32_helper_populate_phantom_dlg_params +ffffffff8241f7b0 T dcn32_predict_pipe_split +ffffffff8241fa00 T dcn32_set_phantom_stream_timing +ffffffff8241fd30 T dcn32_determine_max_vratio_prefetch +ffffffff8241fe10 t dcn32_split_stream_for_mpc_or_odm +ffffffff82420200 T dcn32_calculate_wm_and_dlg_fpu +ffffffff82421b20 T dcn32_patch_dpm_table +ffffffff82421d30 T dcn32_update_bw_bounding_box_fpu +ffffffff82424450 T dcn32_zero_pipe_dcc_fraction +ffffffff824244c0 T dcn32_allow_subvp_with_active_margin +ffffffff82424590 T dcn32_allow_subvp_high_refresh_rate +ffffffff824247b0 T dcn32_assign_fpo_vactive_candidate +ffffffff82424870 T dcn32_find_vactive_pipe +ffffffff824249e0 T dcn32_set_clock_limits +ffffffff82424a30 T dcn32_override_min_req_memclk +ffffffff82424b00 t subvp_drr_schedulable +ffffffff82424dc0 t get_optimal_ntuple +ffffffff82426000 T dml32_recalculate +ffffffff8242a510 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff82433000 T dml32_dscceComputeDelay +ffffffff82433150 T dml32_dscComputeDelay +ffffffff82433190 T IsVertical +ffffffff824331c0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff82433540 t dml_max3 +ffffffff824335b0 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff824338e0 T dml32_CalculateSwathAndDETConfiguration +ffffffff82434140 T dml32_CalculateSwathWidth +ffffffff82434ab0 T dml32_UnboundedRequest +ffffffff82434b20 T dml32_CalculateDETBufferSize +ffffffff824351a0 T dml32_CalculateODMMode +ffffffff82435970 T dml32_CalculateRequiredDispclk +ffffffff82435b40 T dml32_RoundToDFSGranularity +ffffffff82435bd0 T dml32_CalculateOutputLink +ffffffff824366d0 T dml32_TruncToValidBPP +ffffffff82436a10 T dml32_CalculateDPPCLK +ffffffff82436bc0 T dml32_RequiredDTBCLK +ffffffff82436e60 t dml_max4 +ffffffff82436ef0 T dml32_DSCDelayRequirement +ffffffff82437400 T dml32_CalculateSurfaceSizeInMall +ffffffff82438110 T dml32_CalculateVMRowAndSwath +ffffffff82438f50 T dml32_CalculateVMAndRowBytes +ffffffff82439cb0 T dml32_CalculatePrefetchSourceLines +ffffffff82439f20 T dml32_CalculateMALLUseForStaticScreen +ffffffff8243a060 T dml32_CalculateRowBandwidth +ffffffff8243a1c0 T dml32_CalculateUrgentLatency +ffffffff8243a280 T dml32_CalculateUrgentBurstFactor +ffffffff8243a540 T dml32_CalculateDCFCLKDeepSleep +ffffffff8243a8b0 T dml32_CalculateWriteBackDelay +ffffffff8243aa30 T dml32_UseMinimumDCFCLK +ffffffff8243bb10 T dml32_CalculateExtraLatencyBytes +ffffffff8243bce0 T dml32_CalculateTWait +ffffffff8243bde0 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff8243c060 T dml32_get_return_bw_mbps +ffffffff8243c240 T dml32_get_return_bw_mbps_vm_only +ffffffff8243c330 T dml32_CalculateExtraLatency +ffffffff8243c560 T dml32_CalculatePrefetchSchedule +ffffffff8243dd30 T dml32_CalculateFlipSchedule +ffffffff8243e300 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff8243f4c0 T dml32_CalculateWriteBackDISPCLK +ffffffff8243f6b0 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff8243f700 T dml32_CalculatePixelDeliveryTimes +ffffffff8243fb90 T dml32_CalculateMetaAndPTETimes +ffffffff82440300 T dml32_CalculateVMGroupAndRequestTimes +ffffffff82440870 T dml32_CalculateDCCConfiguration +ffffffff82440ed0 T dml32_CalculateStutterEfficiency +ffffffff82441e90 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff82441f90 T dml32_CalculateVActiveBandwithSupport +ffffffff82442100 T dml32_CalculatePrefetchBandwithSupport +ffffffff82442430 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff82442590 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff82442820 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff82443000 T dml32_rq_dlg_get_rq_reg +ffffffff82443750 T dml32_rq_dlg_get_dlg_reg +ffffffff82446000 T dcn321_update_bw_bounding_box_fpu +ffffffff82448820 t get_optimal_ntuple +ffffffff82449000 T dml_init_instance +ffffffff82449320 T dml_get_status_message +ffffffff82449360 T dml_log_pipe_params +ffffffff82449390 T dml_log_mode_support_params +ffffffff8244a000 T dml_get_voltage_level +ffffffff8244a2c0 t fetch_socbb_params +ffffffff8244a7b0 t fetch_ip_params +ffffffff8244ac50 t fetch_pipe_params +ffffffff8244bce0 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff8244bd60 T get_clk_dcf_deepsleep +ffffffff8244beb0 T get_wm_urgent +ffffffff8244c000 T get_wm_memory_trip +ffffffff8244c150 T get_wm_writeback_urgent +ffffffff8244c2a0 T get_wm_stutter_exit +ffffffff8244c3f0 T get_wm_stutter_enter_exit +ffffffff8244c540 T get_wm_z8_stutter_exit +ffffffff8244c690 T get_wm_z8_stutter_enter_exit +ffffffff8244c7e0 T get_stutter_efficiency_z8 +ffffffff8244c930 T get_stutter_num_bursts_z8 +ffffffff8244ca80 T get_wm_dram_clock_change +ffffffff8244cbd0 T get_wm_writeback_dram_clock_change +ffffffff8244cd20 T get_stutter_efficiency +ffffffff8244ce70 T get_stutter_efficiency_no_vblank +ffffffff8244cfc0 T get_stutter_period +ffffffff8244d110 T get_urgent_latency +ffffffff8244d260 T get_urgent_extra_latency +ffffffff8244d3b0 T get_nonurgent_latency +ffffffff8244d500 T get_dram_clock_change_latency +ffffffff8244d650 T get_dispclk_calculated +ffffffff8244d7a0 T get_total_data_read_bw +ffffffff8244d8f0 T get_return_bw +ffffffff8244da40 T get_tcalc +ffffffff8244db90 T get_fraction_of_urgent_bandwidth +ffffffff8244dce0 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff8244de30 T get_cstate_max_cap_mode +ffffffff8244df90 T get_comp_buffer_size_kbytes +ffffffff8244e0e0 T get_pixel_chunk_size_in_kbyte +ffffffff8244e230 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff8244e380 T get_meta_chunk_size_in_kbyte +ffffffff8244e4d0 T get_min_pixel_chunk_size_in_byte +ffffffff8244e620 T get_min_meta_chunk_size_in_byte +ffffffff8244e770 T get_fclk_watermark +ffffffff8244e8c0 T get_usr_retraining_watermark +ffffffff8244ea10 T get_comp_buffer_reserved_space_kbytes +ffffffff8244eb60 T get_comp_buffer_reserved_space_64bytes +ffffffff8244ecb0 T get_comp_buffer_reserved_space_zs +ffffffff8244ee00 T get_unbounded_request_enabled +ffffffff8244ef60 T get_dsc_delay +ffffffff8244f0c0 T get_dppclk_calculated +ffffffff8244f220 T get_dscclk_calculated +ffffffff8244f380 T get_min_ttu_vblank +ffffffff8244f4e0 T get_min_ttu_vblank_in_us +ffffffff8244f640 T get_vratio_prefetch_l +ffffffff8244f7a0 T get_vratio_prefetch_c +ffffffff8244f900 T get_dst_x_after_scaler +ffffffff8244fa60 T get_dst_y_after_scaler +ffffffff8244fbc0 T get_dst_y_per_vm_vblank +ffffffff8244fd20 T get_dst_y_per_row_vblank +ffffffff8244fe80 T get_dst_y_prefetch +ffffffff8244ffe0 T get_dst_y_per_vm_flip +ffffffff82450140 T get_dst_y_per_row_flip +ffffffff824502a0 T get_refcyc_per_vm_group_vblank +ffffffff82450400 T get_refcyc_per_vm_group_flip +ffffffff82450560 T get_refcyc_per_vm_req_vblank +ffffffff824506c0 T get_refcyc_per_vm_req_flip +ffffffff82450820 T get_refcyc_per_vm_group_vblank_in_us +ffffffff82450980 T get_refcyc_per_vm_group_flip_in_us +ffffffff82450ae0 T get_refcyc_per_vm_req_vblank_in_us +ffffffff82450c40 T get_refcyc_per_vm_req_flip_in_us +ffffffff82450da0 T get_refcyc_per_vm_dmdata_in_us +ffffffff82450f00 T get_dmdata_dl_delta_in_us +ffffffff82451060 T get_refcyc_per_line_delivery_l_in_us +ffffffff824511c0 T get_refcyc_per_line_delivery_c_in_us +ffffffff82451320 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff82451480 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff824515e0 T get_refcyc_per_req_delivery_l_in_us +ffffffff82451740 T get_refcyc_per_req_delivery_c_in_us +ffffffff824518a0 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff82451a00 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff82451b60 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff82451cc0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff82451e20 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff82451f80 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff824520e0 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff82452240 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff824523a0 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff82452500 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff82452660 T get_vstartup +ffffffff824527c0 T get_vupdate_offset +ffffffff82452920 T get_vupdate_width +ffffffff82452a80 T get_vready_offset +ffffffff82452be0 T get_vready_at_or_after_vsync +ffffffff82452d50 T get_min_dst_y_next_start +ffffffff82452eb0 T get_dst_y_per_pte_row_nom_l +ffffffff82453010 T get_dst_y_per_pte_row_nom_c +ffffffff82453170 T get_dst_y_per_meta_row_nom_l +ffffffff824532d0 T get_dst_y_per_meta_row_nom_c +ffffffff82453430 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff82453590 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff824536f0 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff82453850 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff824539b0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff82453b10 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff82453c70 T get_vstartup_calculated +ffffffff82453dd0 T get_dpte_row_height_linear_c +ffffffff82453f30 T get_swath_height_l +ffffffff82454090 T get_swath_height_c +ffffffff824541f0 T get_det_stored_buffer_size_l_bytes +ffffffff82454350 T get_det_stored_buffer_size_c_bytes +ffffffff824544b0 T get_dpte_group_size_in_bytes +ffffffff82454610 T get_vm_group_size_in_bytes +ffffffff82454770 T get_dpte_row_height_linear_l +ffffffff824548d0 T get_pte_buffer_mode +ffffffff82454a40 T get_subviewport_lines_needed_in_mall +ffffffff82454ba0 T get_surface_size_in_mall +ffffffff82454d00 T get_total_immediate_flip_bytes +ffffffff82454e50 T get_total_immediate_flip_bw +ffffffff82455060 T get_total_prefetch_bw +ffffffff82455270 T get_total_surface_size_in_mall_bytes +ffffffff82455450 T get_det_buffer_size_kbytes +ffffffff824555b0 T get_is_phantom_pipe +ffffffff82455710 T Calculate256BBlockSizes +ffffffff82455800 T CalculateMinAndMaxPrefetchMode +ffffffff82455880 T ModeSupportAndSystemConfiguration +ffffffff82455bc0 T CalculateWriteBackDISPCLK +ffffffff82457000 T print__rq_params_st +ffffffff82457030 T print__data_rq_sizing_params_st +ffffffff82457060 T print__data_rq_dlg_params_st +ffffffff82457090 T print__data_rq_misc_params_st +ffffffff824570c0 T print__rq_dlg_params_st +ffffffff824570f0 T print__dlg_sys_params_st +ffffffff82457120 T print__data_rq_regs_st +ffffffff82457150 T print__rq_regs_st +ffffffff82457180 T print__dlg_regs_st +ffffffff824571b0 T print__ttu_regs_st +ffffffff82458000 T dml1_extract_rq_regs +ffffffff82458340 T dml1_rq_dlg_get_rq_params +ffffffff82458520 t get_surf_rq_param +ffffffff82459120 T dml1_rq_dlg_get_dlg_params +ffffffff8245c000 T _do_calc_rc_params +ffffffff8245cfd0 t get_qp_set +ffffffff8245e000 T dc_bandwidth_in_kbps_from_timing +ffffffff8245e2e0 T dc_dsc_stream_bandwidth_in_kbps +ffffffff8245e470 T dc_dsc_parse_dsc_dpcd +ffffffff8245e730 t dsc_throughput_from_dpcd +ffffffff8245e8f0 T dc_dsc_compute_bandwidth_range +ffffffff8245eb20 t intersect_dsc_caps +ffffffff8245ecf0 t setup_dsc_config +ffffffff8245f4f0 T dc_dsc_compute_config +ffffffff8245f600 T dc_dsc_stream_bandwidth_overhead_in_kbps +ffffffff8245f790 T dc_dsc_get_policy_for_timing +ffffffff8245f830 T dc_dsc_policy_set_max_target_bpp_limit +ffffffff8245f860 T dc_dsc_policy_set_enable_dsc_when_not_needed +ffffffff8245f890 T dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff8245f8c0 T dc_set_disable_128b_132b_stream_overhead +ffffffff8245f8f0 T dc_dsc_get_default_config_option +ffffffff8245f940 t fit_num_slices_up +ffffffff8245f9f0 t decide_dsc_target_bpp_x16 +ffffffff82460000 T calc_rc_params +ffffffff82461000 T dscc_compute_dsc_parameters +ffffffff82462000 T dal_hw_factory_dce110_init +ffffffff82462060 t define_hpd_registers +ffffffff824620b0 t define_ddc_registers +ffffffff82463000 T dal_hw_translate_dce110_init +ffffffff82463030 t offset_to_id +ffffffff824633a0 t id_to_offset +ffffffff82464000 T dal_hw_factory_dce120_init +ffffffff82464060 t define_hpd_registers +ffffffff824640b0 t define_ddc_registers +ffffffff82465000 T dal_hw_translate_dce120_init +ffffffff82465030 t offset_to_id +ffffffff824653b0 t id_to_offset +ffffffff82466000 T dal_hw_factory_dce80_init +ffffffff82466060 t define_hpd_registers +ffffffff824660b0 t define_ddc_registers +ffffffff82467000 T dal_hw_translate_dce80_init +ffffffff82467030 t offset_to_id +ffffffff824677d0 t id_to_offset +ffffffff82468000 T dal_hw_factory_dcn10_init +ffffffff82468060 t define_hpd_registers +ffffffff824680b0 t define_ddc_registers +ffffffff82468150 t define_generic_registers +ffffffff82469000 T dal_hw_translate_dcn10_init +ffffffff82469030 t offset_to_id +ffffffff824693a0 t id_to_offset +ffffffff8246a000 T dal_hw_factory_dcn20_init +ffffffff8246a060 t define_hpd_registers +ffffffff8246a0b0 t define_ddc_registers +ffffffff8246a160 t define_generic_registers +ffffffff8246b000 T dal_hw_translate_dcn20_init +ffffffff8246b030 t offset_to_id +ffffffff8246b2c0 t id_to_offset +ffffffff8246c000 T dal_hw_factory_dcn21_init +ffffffff8246c060 t define_hpd_registers +ffffffff8246c0b0 t define_ddc_registers +ffffffff8246c160 t define_generic_registers +ffffffff8246d000 T dal_hw_translate_dcn21_init +ffffffff8246d030 t offset_to_id +ffffffff8246d2b0 t id_to_offset +ffffffff8246e000 T dal_hw_factory_dcn30_init +ffffffff8246e060 t define_hpd_registers +ffffffff8246e0b0 t define_ddc_registers +ffffffff8246e160 t define_generic_registers +ffffffff8246f000 T dal_hw_translate_dcn30_init +ffffffff8246f030 t offset_to_id +ffffffff8246f2d0 t id_to_offset +ffffffff82470000 T dal_hw_factory_dcn315_init +ffffffff82470060 t define_hpd_registers +ffffffff824700b0 t define_ddc_registers +ffffffff82470160 t define_generic_registers +ffffffff82471000 T dal_hw_translate_dcn315_init +ffffffff82471030 t offset_to_id +ffffffff824712b0 t id_to_offset +ffffffff82472000 T dal_hw_factory_dcn32_init +ffffffff82472060 t define_hpd_registers +ffffffff824720b0 t define_ddc_registers +ffffffff82472160 t define_generic_registers +ffffffff82473000 T dal_hw_translate_dcn32_init +ffffffff82473030 t offset_to_id +ffffffff82473290 t id_to_offset +ffffffff82474000 T dal_gpio_open +ffffffff824740c0 T dal_gpio_open_ex +ffffffff82474180 T dal_gpio_get_value +ffffffff82474210 T dal_gpio_set_value +ffffffff824742a0 T dal_gpio_get_mode +ffffffff824742d0 T dal_gpio_lock_pin +ffffffff824742f0 T dal_gpio_unlock_pin +ffffffff82474310 T dal_gpio_change_mode +ffffffff824743a0 T dal_gpio_get_id +ffffffff824743d0 T dal_gpio_get_enum +ffffffff82474400 T dal_gpio_set_config +ffffffff82474490 T dal_gpio_get_pin_info +ffffffff824744f0 T dal_gpio_get_sync_source +ffffffff82474580 T dal_gpio_get_output_state +ffffffff824745b0 T dal_gpio_get_ddc +ffffffff824745e0 T dal_gpio_get_hpd +ffffffff82474610 T dal_gpio_get_generic +ffffffff82474640 T dal_gpio_close +ffffffff824746a0 T dal_gpio_create +ffffffff82474850 T dal_gpio_destroy +ffffffff82475000 T dal_gpio_service_create +ffffffff82475280 T dal_gpio_service_create_irq +ffffffff82475350 T dal_gpio_create_irq +ffffffff824753e0 T dal_gpio_service_create_generic_mux +ffffffff82475490 T dal_gpio_destroy_generic_mux +ffffffff82475530 T dal_gpio_get_generic_pin_info +ffffffff824755a0 T dal_gpio_service_destroy +ffffffff82475720 T dal_mux_setup_config +ffffffff82475790 T dal_gpio_service_lock +ffffffff82475810 T dal_gpio_service_unlock +ffffffff82475890 T dal_gpio_service_open +ffffffff82475b20 T dal_gpio_service_close +ffffffff82475bc0 T dal_irq_get_source +ffffffff82475c40 T dal_irq_get_rx_source +ffffffff82475ca0 T dal_irq_setup_hpd_filter +ffffffff82475d00 T dal_gpio_destroy_irq +ffffffff82475da0 T dal_gpio_create_ddc +ffffffff82475f50 T dal_gpio_destroy_ddc +ffffffff82476050 T dal_ddc_close +ffffffff824760a0 T dal_ddc_open +ffffffff82476230 T dal_ddc_change_mode +ffffffff82476300 T dal_ddc_get_line +ffffffff82476320 T dal_ddc_set_config +ffffffff82477000 T dal_hw_ddc_init +ffffffff82477120 T dal_hw_ddc_get_pin +ffffffff82477130 t dal_hw_ddc_destroy +ffffffff824771a0 t set_config +ffffffff82478000 T dal_hw_factory_init +ffffffff82479000 T dal_hw_generic_init +ffffffff82479120 T dal_hw_generic_get_pin +ffffffff82479130 t dal_hw_generic_destroy +ffffffff824791a0 t set_config +ffffffff8247a000 T dal_hw_gpio_open +ffffffff8247a0d0 T dal_hw_gpio_config_mode +ffffffff8247a1c0 T dal_hw_gpio_get_value +ffffffff8247a230 T dal_hw_gpio_set_value +ffffffff8247a2c0 T dal_hw_gpio_change_mode +ffffffff8247a2d0 T dal_hw_gpio_close +ffffffff8247a3a0 T dal_hw_gpio_construct +ffffffff8247a400 T dal_hw_gpio_destruct +ffffffff8247b000 T dal_hw_hpd_init +ffffffff8247b120 T dal_hw_hpd_get_pin +ffffffff8247b130 t dal_hw_hpd_destroy +ffffffff8247b1a0 t get_value +ffffffff8247b240 t set_config +ffffffff8247c000 T dal_hw_translate_init +ffffffff8247d000 T dc_process_hdcp_msg +ffffffff8247d190 t hdmi_14_process_transaction +ffffffff8247d310 t dp_11_process_transaction +ffffffff8247e000 T dal_irq_service_dummy_set +ffffffff8247e060 T dal_irq_service_dummy_ack +ffffffff8247e0c0 T dce110_vblank_set +ffffffff8247e1b0 T to_dal_irq_source_dce110 +ffffffff8247e330 T dal_irq_service_dce110_create +ffffffff8247e3c0 t hpd_ack +ffffffff8247f000 T dal_irq_service_dce120_create ffffffff8247f090 t hpd_ack -ffffffff82480000 T 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svm_handle_hlt -ffffffff82810380 T vmx_handle_hlt -ffffffff82810450 T svm_handle_exit -ffffffff828107d0 T svm_handle_np_fault -ffffffff82810970 T vmm_handle_cpuid -ffffffff82811040 T svm_handle_msr -ffffffff82811330 T svm_handle_xsetbv -ffffffff828113f0 T svm_handle_inout -ffffffff82811500 T vmm_inject_ud -ffffffff82811540 T vmm_inject_db -ffffffff82811580 T vmx_handle_np_fault -ffffffff82811700 T vmx_handle_inout -ffffffff828118a0 T vmx_handle_cr -ffffffff82811ae0 T vmx_handle_rdmsr -ffffffff82811be0 T vmx_handle_wrmsr -ffffffff82811e90 T vmx_handle_xsetbv -ffffffff82811f90 T vmm_inject_gp -ffffffff82811fd0 T vmx_get_exit_qualification -ffffffff82812040 T vmx_get_guest_faulttype -ffffffff828120f0 T svm_get_guest_faulttype -ffffffff82812120 T svm_fault_page -ffffffff828121b0 T vmx_fault_page -ffffffff82812330 T vmm_get_guest_cpu_mode -ffffffff82812440 T vmx_load_pdptes -ffffffff82812760 T vmx_handle_cr0_write -ffffffff828129c0 T vmx_handle_cr4_write -ffffffff82812a80 T vmm_handle_xsetbv -ffffffff82812b30 T vmx_handle_misc_enable_msr -ffffffff82812b90 T vmm_pat_is_valid -ffffffff82812c70 t vmm_handle_cpuid_0xd -ffffffff82812d70 T vmm_gpa_is_valid -ffffffff82812de0 T vmx_exit_reason_decode -ffffffff82812e20 T svm_exit_reason_decode -ffffffff82813c30 T vcpu_state_decode -ffffffff82814000 T vmm_dispatch_intr -ffffffff82814030 T vmxon -ffffffff82814060 T vmxoff -ffffffff82814090 T vmclear -ffffffff828140c0 T vmptrld -ffffffff828140f0 T vmptrst -ffffffff82814120 T vmwrite -ffffffff82814150 T vmread -ffffffff82814180 T invvpid -ffffffff8281419b t invvpid_fail -ffffffff828141a2 t invvpid_ret -ffffffff828141c0 T invept -ffffffff828141db t invept_fail -ffffffff828141e2 t invept_ret -ffffffff82814200 T vmx_enter_guest -ffffffff8281422b t skip_init -ffffffff82814298 t no_l1df_msr -ffffffff8281429b t l1df_tlb_loop -ffffffff828142b4 t l1df_tlb_done -ffffffff828142bc t l1df_load_cache -ffffffff828142d3 t done_flush -ffffffff82814366 t do_resume -ffffffff828143eb t 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sdmmc_select_card -ffffffff82816600 T sdmmc_set_bus_power -ffffffff828167c0 T sdmmc_function_alloc -ffffffff82816860 T sdmmc_app_command -ffffffff82816a20 T sdmmc_mmc_command -ffffffff82816ab0 T sdmmc_go_idle_state -ffffffff82816be0 T sdmmc_send_if_cond -ffffffff82816d50 T sdmmc_set_relative_addr -ffffffff82817000 T sdmmc_cisptr -ffffffff828170d0 T sdmmc_read_cis -ffffffff828174b0 T sdmmc_print_cis -ffffffff828176a0 T sdmmc_check_cis_quirks -ffffffff82818000 T sdmmc_io_enable -ffffffff828182f0 T sdmmc_io_reset -ffffffff82818450 T sdmmc_io_send_op_cond -ffffffff828185e0 T sdmmc_io_scan -ffffffff82818760 T sdmmc_io_init -ffffffff828188d0 T sdmmc_io_set_highspeed -ffffffff82818bd0 T sdmmc_io_set_bus_width -ffffffff82818ec0 T sdmmc_io_function_ready -ffffffff82819070 T sdmmc_io_read_1 -ffffffff828191f0 T sdmmc_io_function_enable -ffffffff82819690 T sdmmc_io_write_1 -ffffffff82819830 T sdmmc_io_function_disable -ffffffff82819b10 T sdmmc_io_attach -ffffffff82819c00 T sdmmc_print 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-ffffffff8281cb00 T sdmmc_decode_csd -ffffffff8281cf50 T sdmmc_decode_cid -ffffffff8281d400 T sdmmc_mem_send_scr -ffffffff8281d560 T sdmmc_mem_decode_scr -ffffffff8281d5c0 T sdmmc_mem_send_cxd_data -ffffffff8281d740 T sdmmc_mem_set_bus_width -ffffffff8281d870 T sdmmc_mem_sd_switch -ffffffff8281db30 T sdmmc_be512_to_bitfield512 -ffffffff8281dbe0 T sdmmc_mem_mmc_switch -ffffffff8281dcd0 T sdmmc_mem_init -ffffffff8281de60 T sdmmc_mem_set_blocklen -ffffffff8281df70 T sdmmc_mem_sd_init -ffffffff8281e3e0 T sdmmc_mem_mmc_init -ffffffff8281eb60 T sdmmc_mem_select_transfer_mode -ffffffff8281ebe0 T sdmmc_mem_execute_tuning -ffffffff8281ec70 T sdmmc_mem_read_block_subr -ffffffff8281f000 T sdmmc_mem_single_read_block -ffffffff8281f0d0 T sdmmc_mem_read_block -ffffffff8281f2e0 T sdmmc_mem_write_block_subr -ffffffff8281f660 T sdmmc_mem_single_write_block -ffffffff8281f730 T sdmmc_mem_write_block -ffffffff8281f940 T sdmmc_mem_hibernate_write -ffffffff82820000 T sdmmc_scsi_cmd -ffffffff82820200 T sdmmc_minphys -ffffffff82820280 T sdmmc_scsi_attach -ffffffff828204c0 T sdmmc_alloc_ccbs -ffffffff82820620 T sdmmc_free_ccbs -ffffffff82820680 T sdmmc_scsi_detach -ffffffff82820840 T sdmmc_stimeout -ffffffff828208e0 T sdmmc_ccb_alloc -ffffffff828209a0 T sdmmc_ccb_free -ffffffff82820aa0 T sdmmc_inquiry -ffffffff82820d30 T sdmmc_start_xs -ffffffff82820e50 T sdmmc_complete_xs -ffffffff82820f40 T sdmmc_done_xs -ffffffff82820f90 T sdmmc_scsi_hibernate_io -ffffffff82822000 T bwfm_sdio_preinit -ffffffff828225a0 T bwfm_sdio_txcheck -ffffffff828225e0 T bwfm_sdio_txdata -ffffffff82822660 T bwfm_sdio_txctl -ffffffff828227f0 T bwfm_sdio_buscore_read -ffffffff82822800 T bwfm_sdio_buscore_write -ffffffff82822820 T bwfm_sdio_buscore_prepare -ffffffff828229a0 T bwfm_sdio_buscore_activate -ffffffff82822a30 T bwfm_sdio_match -ffffffff82822ae0 T bwfm_sdio_attach -ffffffff82822e80 T bwfm_sdio_detach -ffffffff82822f00 T bwfm_sdio_task -ffffffff828230c0 T bwfm_sdio_write_1 -ffffffff828230f0 T bwfm_sdio_read_1 -ffffffff82823120 T bwfm_sdio_write_4 -ffffffff828231f0 T bwfm_sdio_read_4 -ffffffff828232b0 T bwfm_sdio_load_microcode -ffffffff828235a0 T bwfm_sdio_clkctl -ffffffff828236d0 T bwfm_sdio_dev_write -ffffffff82823720 T bwfm_sdio_intr -ffffffff82823770 T bwfm_sdio_ram_read_write -ffffffff828239f0 T bwfm_sdio_htclk -ffffffff82823cb0 T bwfm_sdio_readshared -ffffffff82823da0 T bwfm_sdio_dev_read -ffffffff82823de0 T bwfm_sdio_rx_frames -ffffffff82824210 T bwfm_sdio_tx_frames -ffffffff82824330 T bwfm_sdio_backplane -ffffffff82824400 T bwfm_sdio_buf_read -ffffffff82824500 T bwfm_sdio_buf_write -ffffffff828245d0 T bwfm_sdio_frame_read_write -ffffffff82824780 T bwfm_sdio_newbuf -ffffffff82824810 T bwfm_sdio_tx_ok -ffffffff82824870 T bwfm_sdio_tx_ctrlframe -ffffffff82824980 T bwfm_sdio_tx_dataframe -ffffffff82824af0 T bwfm_sdio_rx_glom -ffffffff82825000 T onewire_match -ffffffff82825060 T onewire_attach -ffffffff82825120 T onewire_detach -ffffffff82825190 T onewire_activate -ffffffff828251b0 T onewire_scan -ffffffff82825400 T onewire_createthread -ffffffff82825470 T onewire_print -ffffffff82825560 T onewirebus_print -ffffffff828255b0 T onewire_lock -ffffffff828255d0 T onewire_unlock -ffffffff828255f0 T onewire_reset -ffffffff82825610 T onewire_bit -ffffffff82825630 T onewire_read_byte -ffffffff828257c0 T onewire_write_byte -ffffffff828258d0 T onewire_read_block -ffffffff82825970 T onewire_write_block -ffffffff82825a10 T onewire_triplet -ffffffff82825b20 T onewire_matchrom -ffffffff82825d10 T onewire_search -ffffffff82826180 T onewire_thread -ffffffff82827000 T onewire_crc -ffffffff828270b0 T onewire_crc16 -ffffffff82827170 T onewire_famname -ffffffff828271b0 T onewire_matchbyfam -ffffffff82828000 T owid_match -ffffffff82828030 T owid_attach -ffffffff82828120 T owid_detach -ffffffff82828170 T owid_activate -ffffffff82829000 T owsbm_match -ffffffff82829030 T owsbm_attach -ffffffff82829240 T owsbm_detach -ffffffff828292d0 T owsbm_activate -ffffffff82829300 T owsbm_update -ffffffff8282a000 T owtemp_match -ffffffff8282a030 T owtemp_attach -ffffffff8282a160 T owtemp_detach -ffffffff8282a1f0 T owtemp_activate -ffffffff8282a220 T owtemp_update -ffffffff8282b000 T owctr_match -ffffffff8282b030 T owctr_attach -ffffffff8282b1c0 T owctr_detach -ffffffff8282b250 T owctr_activate -ffffffff8282b280 T owctr_update -ffffffff8282b2c0 T owctr_update_counter -ffffffff8282c000 A __text_page_start -ffffffff8282c000 T Xsyscall_meltdown -ffffffff8282c00c T Xsyscall -ffffffff8282c299 t Xsyscall_trampback -ffffffff8282c2b0 T intr_user_exit -ffffffff8282c2f2 t intr_user_exit_post_ast -ffffffff8282c44b t Xiretq_trampback -ffffffff8282c457 T doreti_iret -ffffffff8282d000 T alltraps -ffffffff8282d138 T recall_trap -ffffffff8282d150 T alltraps_kern -ffffffff8282d153 T alltraps_kern_meltdown -ffffffff8282e000 ? Xtrap00 -ffffffff8282e000 A __kutext_start -ffffffff8282e000 A __text_page_end -ffffffff8282e010 ? Xtrap01 -ffffffff8282e020 ? Xtrap02 -ffffffff8282e028 c calltrap_specstk -ffffffff8282e0f0 ? calltrap_specstk_tramp -ffffffff8282e110 ? Xtrap03 -ffffffff8282e120 ? Xtrap04 -ffffffff8282e130 ? Xtrap05 -ffffffff8282e140 ? Xtrap06 -ffffffff8282e150 ? Xtrap07 -ffffffff8282e160 ? Xtrap08 -ffffffff8282e170 ? Xtrap09 -ffffffff8282e180 ? Xtrap0a -ffffffff8282e190 ? Xtrap0b -ffffffff8282e1a0 ? Xtrap0c -ffffffff8282e1b0 ? Xtrap0d -ffffffff8282e240 ? Xtrap0e -ffffffff8282e250 ? Xintrspurious -ffffffff8282e250 ? Xtrap0f -ffffffff8282e260 ? Xtrap10 -ffffffff8282e270 ? Xtrap11 -ffffffff8282e280 ? Xtrap12 -ffffffff8282e290 ? Xtrap13 -ffffffff8282e2a0 ? Xtrap14 -ffffffff8282e2b0 ? Xtrap15 -ffffffff8282e2c0 ? Xtrap16 -ffffffff8282e2c0 ? Xtrap17 -ffffffff8282e2c0 ? Xtrap18 -ffffffff8282e2c0 ? Xtrap19 -ffffffff8282e2c0 ? Xtrap1a -ffffffff8282e2c0 ? Xtrap1b -ffffffff8282e2c0 ? Xtrap1c -ffffffff8282e2c0 ? Xtrap1d -ffffffff8282e2c0 ? Xtrap1e -ffffffff8282e2c0 ? Xtrap1f -ffffffff8282e2d0 ? x2apic_eoi -ffffffff8282e2f0 ? Xintr_lapic_ipi -ffffffff8282e330 ? Xipi_invltlb -ffffffff8282e360 ? Xipi_invlpg -ffffffff8282e390 ? Xipi_invlrange -ffffffff8282e3d0 ? Xipi_invltlb_pcid -ffffffff8282e410 ? Xipi_invlpg_pcid -ffffffff8282e460 ? Xipi_invlrange_pcid -ffffffff8282e4d0 ? Xintr_lapic_ltimer -ffffffff8282e510 ? Xintr_xen_upcall -ffffffff8282e550 ? Xintr_hyperv_upcall -ffffffff8282e590 ? Xintr_legacy0 -ffffffff8282e5d0 ? Xintr_legacy1 -ffffffff8282e610 ? Xintr_legacy2 -ffffffff8282e650 ? Xintr_legacy3 -ffffffff8282e690 ? Xintr_legacy4 -ffffffff8282e6d0 ? Xintr_legacy5 -ffffffff8282e710 ? Xintr_legacy6 -ffffffff8282e750 ? Xintr_legacy7 -ffffffff8282e790 ? Xintr_legacy8 -ffffffff8282e7d0 ? Xintr_legacy9 -ffffffff8282e810 ? Xintr_legacy10 -ffffffff8282e850 ? Xintr_legacy11 -ffffffff8282e890 ? Xintr_legacy12 -ffffffff8282e8d0 ? Xintr_legacy13 -ffffffff8282e910 ? Xintr_legacy14 -ffffffff8282e950 ? Xintr_legacy15 -ffffffff8282e990 ? Xintr_ioapic_edge0 -ffffffff8282e9d0 ? Xintr_ioapic_edge1 -ffffffff8282ea10 ? Xintr_ioapic_edge2 -ffffffff8282ea50 ? Xintr_ioapic_edge3 -ffffffff8282ea90 ? Xintr_ioapic_edge4 -ffffffff8282ead0 ? Xintr_ioapic_edge5 -ffffffff8282eb10 ? Xintr_ioapic_edge6 -ffffffff8282eb50 ? Xintr_ioapic_edge7 -ffffffff8282eb90 ? Xintr_ioapic_edge8 -ffffffff8282ebd0 ? Xintr_ioapic_edge9 -ffffffff8282ec10 ? Xintr_ioapic_edge10 -ffffffff8282ec50 ? Xintr_ioapic_edge11 -ffffffff8282ec90 ? Xintr_ioapic_edge12 -ffffffff8282ecd0 ? Xintr_ioapic_edge13 -ffffffff8282ed10 ? Xintr_ioapic_edge14 -ffffffff8282ed50 ? Xintr_ioapic_edge15 -ffffffff8282ed90 ? Xintr_ioapic_edge16 -ffffffff8282edd0 ? Xintr_ioapic_edge17 -ffffffff8282ee10 ? Xintr_ioapic_edge18 -ffffffff8282ee50 ? Xintr_ioapic_edge19 -ffffffff8282ee90 ? Xintr_ioapic_edge20 -ffffffff8282eed0 ? Xintr_ioapic_edge21 -ffffffff8282ef10 ? Xintr_ioapic_edge22 -ffffffff8282ef50 ? Xintr_ioapic_edge23 -ffffffff8282ef90 ? Xintr_ioapic_edge24 -ffffffff8282efd0 ? Xintr_ioapic_edge25 -ffffffff8282f010 ? Xintr_ioapic_edge26 -ffffffff8282f050 ? Xintr_ioapic_edge27 -ffffffff8282f090 ? Xintr_ioapic_edge28 -ffffffff8282f0d0 ? Xintr_ioapic_edge29 -ffffffff8282f110 ? Xintr_ioapic_edge30 -ffffffff8282f150 ? Xintr_ioapic_edge31 -ffffffff8282f190 ? Xintr_ioapic_edge32 -ffffffff8282f1d0 ? Xintr_ioapic_edge33 -ffffffff8282f210 ? Xintr_ioapic_edge34 -ffffffff8282f250 ? Xintr_ioapic_edge35 -ffffffff8282f290 ? Xintr_ioapic_edge36 -ffffffff8282f2d0 ? Xintr_ioapic_edge37 -ffffffff8282f310 ? Xintr_ioapic_edge38 -ffffffff8282f350 ? Xintr_ioapic_edge39 -ffffffff8282f390 ? Xintr_ioapic_edge40 -ffffffff8282f3d0 ? Xintr_ioapic_edge41 -ffffffff8282f410 ? Xintr_ioapic_edge42 -ffffffff8282f450 ? Xintr_ioapic_edge43 -ffffffff8282f490 ? Xintr_ioapic_edge44 -ffffffff8282f4d0 ? Xintr_ioapic_edge45 -ffffffff8282f510 ? Xintr_ioapic_edge46 -ffffffff8282f550 ? Xintr_ioapic_edge47 -ffffffff8282f590 ? Xintr_ioapic_edge48 -ffffffff8282f5d0 ? Xintr_ioapic_edge49 -ffffffff8282f610 ? Xintr_ioapic_edge50 -ffffffff8282f650 ? Xintr_ioapic_edge51 -ffffffff8282f690 ? Xintr_ioapic_edge52 -ffffffff8282f6d0 ? Xintr_ioapic_edge53 -ffffffff8282f710 ? Xintr_ioapic_edge54 -ffffffff8282f750 ? Xintr_ioapic_edge55 -ffffffff8282f790 ? Xintr_ioapic_edge56 -ffffffff8282f7d0 ? Xintr_ioapic_edge57 -ffffffff8282f810 ? Xintr_ioapic_edge58 -ffffffff8282f850 ? Xintr_ioapic_edge59 -ffffffff8282f890 ? Xintr_ioapic_edge60 -ffffffff8282f8d0 ? Xintr_ioapic_edge61 -ffffffff8282f910 ? Xintr_ioapic_edge62 -ffffffff8282f950 ? Xintr_ioapic_edge63 -ffffffff8282f990 ? Xintr_ioapic_level0 -ffffffff8282f9d0 ? Xintr_ioapic_level1 -ffffffff8282fa10 ? Xintr_ioapic_level2 -ffffffff8282fa50 ? Xintr_ioapic_level3 -ffffffff8282fa90 ? Xintr_ioapic_level4 -ffffffff8282fad0 ? Xintr_ioapic_level5 -ffffffff8282fb10 ? Xintr_ioapic_level6 -ffffffff8282fb50 ? Xintr_ioapic_level7 -ffffffff8282fb90 ? Xintr_ioapic_level8 -ffffffff8282fbd0 ? Xintr_ioapic_level9 -ffffffff8282fc10 ? Xintr_ioapic_level10 -ffffffff8282fc50 ? Xintr_ioapic_level11 -ffffffff8282fc90 ? Xintr_ioapic_level12 -ffffffff8282fcd0 ? Xintr_ioapic_level13 -ffffffff8282fd10 ? Xintr_ioapic_level14 -ffffffff8282fd50 ? Xintr_ioapic_level15 -ffffffff8282fd90 ? Xintr_ioapic_level16 -ffffffff8282fdd0 ? Xintr_ioapic_level17 -ffffffff8282fe10 ? Xintr_ioapic_level18 -ffffffff8282fe50 ? Xintr_ioapic_level19 -ffffffff8282fe90 ? Xintr_ioapic_level20 -ffffffff8282fed0 ? Xintr_ioapic_level21 -ffffffff8282ff10 ? Xintr_ioapic_level22 -ffffffff8282ff50 ? Xintr_ioapic_level23 -ffffffff8282ff90 ? Xintr_ioapic_level24 -ffffffff8282ffd0 ? Xintr_ioapic_level25 -ffffffff82830010 ? Xintr_ioapic_level26 -ffffffff82830050 ? Xintr_ioapic_level27 -ffffffff82830090 ? Xintr_ioapic_level28 -ffffffff828300d0 ? Xintr_ioapic_level29 -ffffffff82830110 ? Xintr_ioapic_level30 -ffffffff82830150 ? Xintr_ioapic_level31 -ffffffff82830190 ? Xintr_ioapic_level32 -ffffffff828301d0 ? Xintr_ioapic_level33 -ffffffff82830210 ? Xintr_ioapic_level34 -ffffffff82830250 ? Xintr_ioapic_level35 -ffffffff82830290 ? Xintr_ioapic_level36 -ffffffff828302d0 ? Xintr_ioapic_level37 -ffffffff82830310 ? Xintr_ioapic_level38 -ffffffff82830350 ? Xintr_ioapic_level39 -ffffffff82830390 ? Xintr_ioapic_level40 -ffffffff828303d0 ? Xintr_ioapic_level41 -ffffffff82830410 ? Xintr_ioapic_level42 -ffffffff82830450 ? Xintr_ioapic_level43 -ffffffff82830490 ? Xintr_ioapic_level44 -ffffffff828304d0 ? Xintr_ioapic_level45 -ffffffff82830510 ? Xintr_ioapic_level46 -ffffffff82830550 ? Xintr_ioapic_level47 -ffffffff82830590 ? Xintr_ioapic_level48 -ffffffff828305d0 ? Xintr_ioapic_level49 -ffffffff82830610 ? Xintr_ioapic_level50 -ffffffff82830650 ? Xintr_ioapic_level51 -ffffffff82830690 ? Xintr_ioapic_level52 -ffffffff828306d0 ? Xintr_ioapic_level53 -ffffffff82830710 ? Xintr_ioapic_level54 -ffffffff82830750 ? Xintr_ioapic_level55 -ffffffff82830790 ? Xintr_ioapic_level56 -ffffffff828307d0 ? Xintr_ioapic_level57 -ffffffff82830810 ? Xintr_ioapic_level58 -ffffffff82830850 ? Xintr_ioapic_level59 -ffffffff82830890 ? Xintr_ioapic_level60 -ffffffff828308d0 ? Xintr_ioapic_level61 -ffffffff82830910 ? Xintr_ioapic_level62 -ffffffff82830950 ? Xintr_ioapic_level63 -ffffffff82831000 ? codepatch_fill_nop -ffffffff82831000 A __cptext_start -ffffffff82831000 A __kutext_end -ffffffff828310b0 ? codepatch_maprw -ffffffff828311c0 ? codepatch_unmaprw -ffffffff82831230 ? codepatch_nop -ffffffff828313b0 ? codepatch_replace -ffffffff82831580 ? codepatch_call -ffffffff828315a0 ? codepatch_control_flow -ffffffff828317c0 ? codepatch_jmp -ffffffff82832000 A __cptext_end -ffffffff82832000 A __rodata_start -ffffffff82832000 C _etext -ffffffff82832000 C etext -ffffffff82833000 r seeprom_read -ffffffff82833004 r icl_mg_pll_find_divisors.div1_vals -ffffffff82833034 r athn_ac2qid -ffffffff82833034 r athn_ac2qid -ffffffff82833034 r athn_ac2qid -ffffffff82833040 r rtwn_get_rssi.cckoff -ffffffff82833068 r rsu_ac2qid -ffffffff82833078 r pckbc_portcmd -ffffffff8283307c r tht_fifo_write_pad.pad -ffffffff82833084 r rsu_get_rssi.cckoff -ffffffff828330a4 r adlp_n_revids -ffffffff828330e8 r apple_iso_trans -ffffffff828330f0 r wihap_check_tx.txratetable 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vga_50lscreen_mono -ffffffff829471c8 R vga_50lscreen_bf -ffffffff829471f8 R vga_screenlist -ffffffff82947208 R vga_screenlist_mono -ffffffff82947218 R vga_accessops -ffffffff82947278 r i945_wm_info -ffffffff829472b8 r bgansitopc -ffffffff829472c0 r pctoansi -ffffffff82947300 r sdma_offsets -ffffffff82947300 r sdma_offsets -ffffffff82947338 r iha_rate_tbl -ffffffff82947370 r i830_a_wm_info -ffffffff829473a8 r gen9_edram_size_mb.ways -ffffffff82947408 r aggr_periodic_times -ffffffff82947508 r michael_final.pad -ffffffff82947530 r rt_copysa.maskarray -ffffffff82947538 r i915_wm_info -ffffffff82947540 r amdgpu_ih_clientid_jpeg -ffffffff82947540 r amdgpu_ih_clientid_uvds -ffffffff82947540 r amdgpu_ih_clientid_vcns -ffffffff82947540 r amdgpu_ih_clientid_vcns -ffffffff82947540 r amdgpu_ih_clientid_vcns -ffffffff82947570 r jsl_ehl_revids -ffffffff82947580 r vga_setfontset.cmaptabb -ffffffff829475f0 r i830_bc_wm_info -ffffffff82947658 r hsw_activate_psr2.map -ffffffff82947660 r tgl_revids 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ciss_switch -ffffffff82955030 R ciss_level -ffffffff82955050 R ciss_stat -ffffffff82956000 R ami_switch -ffffffff82956028 R ami_raw_switch -ffffffff82957000 R mfi_switch -ffffffff82957028 R mfi_pd_switch -ffffffff82957050 r mfi_iop_xscale -ffffffff82957080 r mfi_iop_ppc -ffffffff829570b0 r mfi_iop_gen2 -ffffffff829570e0 r mfi_iop_skinny -ffffffff82957110 r mfi_bbu_indicators -ffffffff82958000 R qlw_switch -ffffffff82959000 R isp_2100_risc_code -ffffffff8296bbf0 R isp_2200_risc_code -ffffffff8297e990 R isp_2300_risc_code -ffffffff82998408 R qla_switch -ffffffff82998430 r qla_regs_2100 -ffffffff82998460 r qla_regs_2200 -ffffffff82998490 r qla_regs_23XX -ffffffff82999000 R ahci_atascsi_methods -ffffffff8299a000 R nvme_switch -ffffffff8299a028 r nvme_ops -ffffffff8299b000 R mpi_switch -ffffffff8299b060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs -ffffffff8299b090 r chv_oa_mux_regs -ffffffff8299b0b0 r fiji_clock_stretcher_lookup_table -ffffffff8299b0b0 r tonga_clock_stretcher_lookup_table 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hpt366_pio -ffffffff8299b810 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs -ffffffff8299b830 r ether_crc32_be_update.rev -ffffffff8299b830 r rtw_grf5101_mac_crypt.caesar -ffffffff8299b880 r snb_b_fdi_train_param -ffffffff8299b950 r intel_hpll_vco.elk_vco -ffffffff8299b970 r icl_revids -ffffffff8299b9d0 r pin_offsets -ffffffff8299b9f0 r amdgpu_ih_srcid_jpeg -ffffffff8299ba30 r firmware_list -ffffffff8299ba90 r atom_arg_shift -ffffffff8299ba90 r atom_arg_shift -ffffffff8299bad0 r pf_syncookie_wstab -ffffffff8299baf0 r ieee80211_media_init.mopts -ffffffff8299bb50 r add_entropy_words.twist_table -ffffffff8299bbf0 r urtw_8225v2_txpwr_cck -ffffffff8299bc10 r bwfm_pci_prio2fifo -ffffffff8299bc10 r ieee80211_up_to_ac.up_to_ac -ffffffff8299bcd0 r paritytab -ffffffff8299bcd0 r x86emu_parity_tab -ffffffff8299bcf0 r legacy_connector_convert -ffffffff8299bd30 r gen7_oa_mux_regs -ffffffff8299bd50 r hsw_oa_mux_regs -ffffffff8299bd70 r notetab -ffffffff8299bd90 r urtw_8225v2_txpwr_cck_ch14 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w83627dhg_sensors -ffffffff829ae7c0 R nct6776f_sensors -ffffffff829aea00 R nct6779d_sensors -ffffffff829aed60 R w83637hf_sensors -ffffffff829aef20 R w83697hf_sensors -ffffffff829af0c0 R w83781d_sensors -ffffffff829af280 R w83782d_sensors -ffffffff829af480 R w83783s_sensors -ffffffff829af600 R w83791d_sensors -ffffffff829af860 R w83792d_sensors -ffffffff829afae0 R as99127f_sensors -ffffffff829b0000 r ar5k_known_products -ffffffff829b0110 r ar5111_gain_opt -ffffffff829b01e0 r ar5112_gain_opt -ffffffff829b02b0 r ar5k_5ghz_channels -ffffffff829b0a00 r ar5k_2ghz_channels -ffffffff829b0f10 r ar5111_rf -ffffffff829b1350 r ar5112a_rf -ffffffff829b1890 r ar5112_rf -ffffffff829b1da0 r ar5413_rf -ffffffff829b21b0 r ar2413_rf -ffffffff829b24d0 r ar2425_rf -ffffffff829b2830 r ar5111_rfg -ffffffff829b2b30 r ar5112_rfg -ffffffff829b2e30 r ar5413_rfg -ffffffff829b3130 r ar2413_rfg -ffffffff829b3430 r ar5k_rt_11a -ffffffff829b3552 r ar5k_rt_11b -ffffffff829b3674 r ar5k_rt_11g -ffffffff829b3796 r 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dce_v10_0_display_funcs -ffffffff82d99150 r hpd_offsets -ffffffff82d99168 r dce_v10_0_encoder_funcs -ffffffff82d99188 r dce_v10_0_dac_helper_funcs -ffffffff82d991f0 r dce_v10_0_dig_helper_funcs -ffffffff82d99258 r dce_v10_0_ext_helper_funcs -ffffffff82d992c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82d992f0 r dce_v10_0_crtc_irq_funcs -ffffffff82d99300 r dce_v10_0_pageflip_irq_funcs -ffffffff82d99310 r dce_v10_0_hpd_irq_funcs -ffffffff82d99320 r interrupt_status_offsets -ffffffff82d99380 r dce_v10_0_crtc_funcs -ffffffff82d99440 r dce_v10_0_crtc_helper_funcs -ffffffff82d994c0 r vga_control_regs -ffffffff82d994e0 r dig_offsets -ffffffff82d99500 r pin_offsets -ffffffff82d99520 r fiji_mgcg_cgcg_init -ffffffff82d99540 r golden_settings_fiji_a10 -ffffffff82d99570 r tonga_mgcg_cgcg_init -ffffffff82d99590 r golden_settings_tonga_a11 -ffffffff82d9a000 r crtc_offsets -ffffffff82d9a020 r dce_v11_0_ip_funcs -ffffffff82d9a0c8 R dce_v11_0_ip_block -ffffffff82d9a0e0 R dce_v11_2_ip_block -ffffffff82d9a0f8 r dce_v11_0_display_funcs -ffffffff82d9a150 r hpd_offsets -ffffffff82d9a168 r dce_v11_0_encoder_funcs -ffffffff82d9a188 r dce_v11_0_dac_helper_funcs -ffffffff82d9a1f0 r dce_v11_0_dig_helper_funcs -ffffffff82d9a258 r dce_v11_0_ext_helper_funcs -ffffffff82d9a2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82d9a2f0 r dce_v11_0_crtc_irq_funcs -ffffffff82d9a300 r dce_v11_0_pageflip_irq_funcs -ffffffff82d9a310 r dce_v11_0_hpd_irq_funcs -ffffffff82d9a320 r interrupt_status_offsets -ffffffff82d9a380 r dce_v11_0_crtc_funcs -ffffffff82d9a440 r dce_v11_0_crtc_helper_funcs -ffffffff82d9a4c0 r vga_control_regs -ffffffff82d9a4e0 r dig_offsets -ffffffff82d9a510 r cz_mgcg_cgcg_init -ffffffff82d9a530 r cz_golden_settings_a11 -ffffffff82d9a550 r stoney_golden_settings_a11 -ffffffff82d9a570 r polaris11_golden_settings_a11 -ffffffff82d9a5b0 r polaris10_golden_settings_a11 -ffffffff82d9b000 R df_v1_7_funcs -ffffffff82d9b070 r df_v1_7_channel_number -ffffffff82d9c000 R df_v3_6_funcs -ffffffff82d9c070 r df_v3_6_channel_number -ffffffff82d9d000 R df_v4_3_funcs -ffffffff82d9e000 r GC_BASE -ffffffff82d9e0a8 r HDP_BASE -ffffffff82d9e150 r MMHUB_BASE -ffffffff82d9e1f8 r ATHUB_BASE -ffffffff82d9e2a0 r NBIO_BASE -ffffffff82d9e348 r MP0_BASE -ffffffff82d9e3f0 r MP1_BASE -ffffffff82d9e498 r VCN0_BASE -ffffffff82d9e540 r DF_BASE -ffffffff82d9e5e8 r DCN_BASE -ffffffff82d9e690 r OSSSYS_BASE -ffffffff82d9e738 r SMUIO_BASE -ffffffff82d9e7e0 r THM_BASE -ffffffff82d9f000 r gfx_v10_0_ip_funcs -ffffffff82d9f0a8 R gfx_v10_0_ip_block -ffffffff82d9f0c0 r gfx_v10_0_gfx_funcs -ffffffff82d9f120 r golden_settings_gc_rlc_spm_10_0_nv10 -ffffffff82da53c0 r golden_settings_gc_rlc_spm_10_1_nv14 -ffffffff82da8de0 r golden_settings_gc_rlc_spm_10_1_2_nv12 -ffffffff82daf080 r gfx_v10_0_kiq_pm4_funcs -ffffffff82daf0c0 r gfx_v10_0_ring_funcs_kiq -ffffffff82daf200 r gfx_v10_0_ring_funcs_gfx -ffffffff82daf340 r gfx_v10_0_ring_funcs_compute -ffffffff82daf480 r gfx_v10_0_eop_irq_funcs -ffffffff82daf490 r gfx_v10_0_kiq_irq_funcs -ffffffff82daf4a0 r gfx_v10_0_priv_reg_irq_funcs -ffffffff82daf4b0 r gfx_v10_0_priv_inst_irq_funcs -ffffffff82daf4c0 r gfx_v10_0_rlc_funcs -ffffffff82daf528 r gfx_v10_0_rlc_funcs_sriov -ffffffff82daf590 r gfx10_cs_data -ffffffff82daf5b0 r gfx10_SECT_CONTEXT_defs -ffffffff82daf640 r gfx10_SECT_CONTEXT_def_1 -ffffffff82daf9a0 r gfx10_SECT_CONTEXT_def_3 -ffffffff82daf9b0 r gfx10_SECT_CONTEXT_def_4 -ffffffff82dafc28 r gfx10_SECT_CONTEXT_def_5 -ffffffff82dafc30 r gfx10_SECT_CONTEXT_def_6 -ffffffff82dafc40 r gfx10_SECT_CONTEXT_def_2 -ffffffff82db0080 r gfx10_SECT_CONTEXT_def_7 -ffffffff82db0190 r gfx10_SECT_CONTEXT_def_8 -ffffffff82db04c0 r golden_settings_gc_10_1 -ffffffff82db0880 r golden_settings_gc_10_0_nv10 -ffffffff82db0880 r golden_settings_gc_10_1_1 -ffffffff82db0c10 r golden_settings_gc_10_1_2 -ffffffff82db0c10 r golden_settings_gc_10_1_nv14 -ffffffff82db1000 r golden_settings_gc_10_1_2_nv12 -ffffffff82db1000 r golden_settings_gc_10_3 -ffffffff82db1408 r golden_settings_gc_10_3_sienna_cichlid -ffffffff82db1410 r golden_settings_gc_10_3_2 -ffffffff82db1800 r golden_settings_gc_10_3_vangogh -ffffffff82db1a60 r golden_settings_gc_10_3_3 -ffffffff82db1c40 r golden_settings_gc_10_3_4 -ffffffff82db1fa0 r golden_settings_gc_10_3_5 -ffffffff82db22a0 r golden_settings_gc_10_0_cyan_skillfish -ffffffff82db25d0 r golden_settings_gc_10_3_6 -ffffffff82db27e0 r golden_settings_gc_10_3_7 -ffffffff82db3000 r gfx_v11_0_ip_funcs -ffffffff82db30a8 R gfx_v11_0_ip_block -ffffffff82db30c0 r gfx_v11_0_gfx_funcs -ffffffff82db3120 r gfx_v11_0_kiq_pm4_funcs -ffffffff82db3160 r gfx_v11_0_ring_funcs_kiq -ffffffff82db32a0 r gfx_v11_0_ring_funcs_gfx -ffffffff82db33e0 r gfx_v11_0_ring_funcs_compute -ffffffff82db3520 r gfx_v11_0_eop_irq_funcs -ffffffff82db3530 r gfx_v11_0_priv_reg_irq_funcs -ffffffff82db3540 r gfx_v11_0_priv_inst_irq_funcs -ffffffff82db3550 r gfx_v11_0_rlc_gc_fed_irq_funcs -ffffffff82db3560 r gfx_v11_0_rlc_funcs -ffffffff82db35d0 r gfx11_cs_data -ffffffff82db35f0 r gfx11_SECT_CONTEXT_defs -ffffffff82db3670 r gfx11_SECT_CONTEXT_def_1 -ffffffff82db39d0 r gfx11_SECT_CONTEXT_def_3 -ffffffff82db39e0 r gfx11_SECT_CONTEXT_def_5 -ffffffff82db39e8 r gfx11_SECT_CONTEXT_def_6 -ffffffff82db39f0 r gfx11_SECT_CONTEXT_def_2 -ffffffff82db3e30 r gfx11_SECT_CONTEXT_def_4 -ffffffff82db40b0 r gfx11_SECT_CONTEXT_def_7 -ffffffff82db4520 r golden_settings_gc_11_0_1 -ffffffff82db4600 r golden_settings_gc_11_0 -ffffffff82db5000 r gfx_v8_0_ip_funcs -ffffffff82db50a8 R gfx_v8_0_ip_block -ffffffff82db50c0 R gfx_v8_1_ip_block -ffffffff82db50d8 r gfx_v8_0_gfx_funcs -ffffffff82db5138 r gfx_v8_0_ring_funcs_kiq -ffffffff82db5278 r gfx_v8_0_ring_funcs_gfx -ffffffff82db53b8 r gfx_v8_0_ring_funcs_compute -ffffffff82db5500 r amdgpu_gds_reg_offset -ffffffff82db5600 r gfx_v8_0_eop_irq_funcs -ffffffff82db5610 r gfx_v8_0_priv_reg_irq_funcs -ffffffff82db5620 r gfx_v8_0_priv_inst_irq_funcs -ffffffff82db5630 r gfx_v8_0_cp_ecc_error_irq_funcs -ffffffff82db5640 r gfx_v8_0_sq_irq_funcs -ffffffff82db5650 r sq_edc_source_names -ffffffff82db5688 r iceland_rlc_funcs -ffffffff82db56f0 r vi_cs_data -ffffffff82db5710 r vi_SECT_CONTEXT_defs -ffffffff82db5790 r vi_SECT_CONTEXT_def_1 -ffffffff82db5ae0 r vi_SECT_CONTEXT_def_3 -ffffffff82db5b00 r vi_SECT_CONTEXT_def_4 -ffffffff82db5d74 r vi_SECT_CONTEXT_def_5 -ffffffff82db5d7c r vi_SECT_CONTEXT_def_6 -ffffffff82db5d80 r vi_SECT_CONTEXT_def_2 -ffffffff82db61d0 r vi_SECT_CONTEXT_def_7 -ffffffff82db6580 r vgpr_init_compute_shader -ffffffff82db6690 r vgpr_init_regs -ffffffff82db6720 r sgpr1_init_regs -ffffffff82db67b0 r sgpr2_init_regs -ffffffff82db6840 r sec_ded_counter_registers -ffffffff82db68b0 r iceland_mgcg_cgcg_init -ffffffff82db6bb0 r golden_settings_iceland_a11 -ffffffff82db6c70 r iceland_golden_common_all -ffffffff82db6cd0 r fiji_mgcg_cgcg_init -ffffffff82db6e80 r golden_settings_fiji_a10 -ffffffff82db6f10 r fiji_golden_common_all -ffffffff82db6f90 r tonga_mgcg_cgcg_init -ffffffff82db7320 r golden_settings_tonga_a11 -ffffffff82db73e0 r tonga_golden_common_all -ffffffff82db7440 r golden_settings_vegam_a11 -ffffffff82db7510 r vegam_golden_common_all -ffffffff82db7560 r golden_settings_polaris11_a11 -ffffffff82db7630 r polaris11_golden_common_all -ffffffff82db7680 r golden_settings_polaris10_a11 -ffffffff82db7750 r polaris10_golden_common_all -ffffffff82db77b0 r cz_mgcg_cgcg_init -ffffffff82db7b40 r cz_golden_settings_a11 -ffffffff82db7bd0 r cz_golden_common_all -ffffffff82db7c30 r stoney_mgcg_cgcg_init -ffffffff82db7c70 r stoney_golden_settings_a11 -ffffffff82db7cf0 r stoney_golden_common_all -ffffffff82db8000 R gfx_v9_0_ras_ops -ffffffff82db8040 r gfx_v9_0_ip_funcs -ffffffff82db80e8 R gfx_v9_0_ip_block -ffffffff82db8100 r ras_gfx_subblocks -ffffffff82db8b80 r gfx_v9_0_edc_counter_regs -ffffffff82db8f20 r gfx_v9_0_ras_fields -ffffffff82dba000 r gfx_v9_0_gfx_funcs -ffffffff82dba060 r gfx_v9_0_kiq_pm4_funcs -ffffffff82dba0a0 r gfx_v9_0_ring_funcs_kiq -ffffffff82dba1e0 r gfx_v9_0_ring_funcs_gfx -ffffffff82dba320 r gfx_v9_0_sw_ring_funcs_gfx -ffffffff82dba460 r gfx_v9_0_ring_funcs_compute -ffffffff82dba5a0 r gfx_v9_0_eop_irq_funcs -ffffffff82dba5b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82dba5c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82dba5d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82dba5e0 r gfx_v9_0_rlc_funcs -ffffffff82dba650 r gfx9_cs_data -ffffffff82dba670 r gfx9_SECT_CONTEXT_defs -ffffffff82dba700 r gfx9_SECT_CONTEXT_def_1 -ffffffff82dbaa50 r gfx9_SECT_CONTEXT_def_3 -ffffffff82dbaa60 r gfx9_SECT_CONTEXT_def_4 -ffffffff82dbacd4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82dbacdc r gfx9_SECT_CONTEXT_def_6 -ffffffff82dbace0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82dbadf0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82dbb260 r gfx9_SECT_CONTEXT_def_8 -ffffffff82dbb4d0 r vgpr_init_compute_shader_arcturus -ffffffff82dbbd60 r vgpr_init_regs_arcturus -ffffffff82dbbef0 r vgpr_init_regs -ffffffff82dbc080 r sgpr1_init_regs -ffffffff82dbc210 r sgpr2_init_regs -ffffffff82dbc3a0 r golden_settings_gc_9_0 -ffffffff82dbc580 r golden_settings_gc_9_0_vg10 -ffffffff82dbc730 r golden_settings_gc_9_2_1 -ffffffff82dbc8b0 r golden_settings_gc_9_2_1_vg12 -ffffffff82dbc9f0 r golden_settings_gc_9_0_vg20 -ffffffff82dbcb00 r golden_settings_gc_9_4_1_arct -ffffffff82dbcc10 r golden_settings_gc_9_1 -ffffffff82dbce50 r golden_settings_gc_9_1_rv2 -ffffffff82dbd020 r golden_settings_gc_9_1_rv1 -ffffffff82dbd0d0 r golden_settings_gc_9_1_rn -ffffffff82dbd1f0 r golden_settings_gc_9_x_common -ffffffff82dbe000 R gfx_v9_4_ras_ops -ffffffff82dbe040 r gfx_v9_4_edc_counter_regs -ffffffff82dbe420 r gfx_v9_4_ras_fields -ffffffff82dc0000 R vgpr_init_regs_aldebaran -ffffffff82dc01b0 R sgpr112_init_regs_aldebaran -ffffffff82dc0360 R sgpr96_init_regs_aldebaran -ffffffff82dc0510 R sgpr64_init_regs_aldebaran -ffffffff82dc06c0 r golden_settings_gc_9_4_2_alde -ffffffff82dc0720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82dc07b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82dc0840 r sgpr112_init_compute_shader_aldebaran -ffffffff82dc0a60 r sgpr96_init_compute_shader_aldebaran -ffffffff82dc0c50 r sgpr64_init_compute_shader_aldebaran -ffffffff82dc0dc0 r vgpr_init_compute_shader_aldebaran -ffffffff82dc16a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82dc1a20 r gfx_v9_4_2_ras_fields -ffffffff82dc33c0 r gfx_v9_4_2_utc_blocks -ffffffff82dc4000 r gfx_v9_4_3_ip_funcs -ffffffff82dc40a8 R gfx_v9_4_3_ip_block -ffffffff82dc40c0 r gfx_v9_4_3_kiq_pm4_funcs -ffffffff82dc4100 r gfx_v9_4_3_ring_funcs_kiq -ffffffff82dc4240 r gfx_v9_4_3_ring_funcs_compute -ffffffff82dc4380 r gfx_v9_4_3_eop_irq_funcs -ffffffff82dc4390 r gfx_v9_4_3_priv_reg_irq_funcs -ffffffff82dc43a0 r gfx_v9_4_3_priv_inst_irq_funcs -ffffffff82dc43b0 r gfx_v9_4_3_rlc_funcs -ffffffff82dc4418 r gfx_v9_4_3_gfx_funcs -ffffffff82dc4480 r gfx_v9_4_3_ce_reg_list -ffffffff82dc4810 r gfx_v9_4_3_ras_mem_list_array -ffffffff82dc4970 r gfx_v9_4_3_ue_reg_list -ffffffff82dc4d30 r gfx_v9_4_3_ras_cp_mem_list -ffffffff82dc4d80 r gfx_v9_4_3_ras_gcea_mem_list -ffffffff82dc4ec0 r gfx_v9_4_3_ras_gc_cane_mem_list -ffffffff82dc4ed0 r gfx_v9_4_3_ras_gcutcl2_mem_list -ffffffff82dc4ee0 r gfx_v9_4_3_ras_gds_mem_list -ffffffff82dc4ef0 r gfx_v9_4_3_ras_lds_mem_list -ffffffff82dc5110 r gfx_v9_4_3_ras_rlc_mem_list -ffffffff82dc5190 r gfx_v9_4_3_ras_sp_mem_list -ffffffff82dc51a0 r gfx_v9_4_3_ras_spi_mem_list -ffffffff82dc51e0 r gfx_v9_4_3_ras_sqc_mem_list -ffffffff82dc5350 r gfx_v9_4_3_ras_sq_mem_list -ffffffff82dc5390 r gfx_v9_4_3_ras_ta_mem_list -ffffffff82dc53e0 r gfx_v9_4_3_ras_tcc_mem_list -ffffffff82dc53f0 r gfx_v9_4_3_ras_tca_mem_list -ffffffff82dc5400 r gfx_v9_4_3_ras_tci_mem_list -ffffffff82dc5410 r gfx_v9_4_3_ras_tcp_mem_list -ffffffff82dc55a0 r gfx_v9_4_3_ras_td_mem_list -ffffffff82dc55d0 r gfx_v9_4_3_ras_tcx_mem_list -ffffffff82dc5b50 r gfx_v9_4_3_ras_atc_l2_mem_list -ffffffff82dc5b60 r gfx_v9_4_3_ras_utcl2_mem_list -ffffffff82dc5b70 r gfx_v9_4_3_ras_vml2_mem_list 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dp_set_test_pattern +ffffffff8248e110 t set_crtc_test_pattern +ffffffff8248e5f0 T dp_set_preferred_link_settings +ffffffff8248e750 t dp_retrain_link_dp_test +ffffffff8248e890 T dp_set_preferred_training_settings +ffffffff8248f000 T dp_trace_init +ffffffff8248f0a0 T dp_trace_reset +ffffffff8248f130 T dp_trace_is_initialized +ffffffff8248f160 T dp_trace_detect_lt_init +ffffffff8248f1b0 T dp_trace_commit_lt_init +ffffffff8248f200 T dp_trace_link_loss_increment +ffffffff8248f230 T dp_trace_lt_fail_count_update +ffffffff8248f270 T dp_trace_lt_total_count_increment +ffffffff8248f2b0 T dp_trace_set_is_logged_flag +ffffffff8248f2f0 T dp_trace_is_logged +ffffffff8248f330 T dp_trace_lt_result_update +ffffffff8248f370 T dp_trace_set_lt_start_timestamp +ffffffff8248f460 T dp_trace_set_lt_end_timestamp +ffffffff8248f550 T dp_trace_get_lt_end_timestamp +ffffffff8248f590 T dp_trace_get_lt_counts +ffffffff8248f5d0 T dp_trace_get_link_loss_count +ffffffff8248f600 T dp_trace_set_edp_power_timestamp +ffffffff8248f6f0 T dp_trace_get_edp_poweron_timestamp +ffffffff8248f720 T dp_trace_get_edp_poweroff_timestamp +ffffffff8248f750 T dp_trace_source_sequence +ffffffff82490000 T dp_fpga_hpo_enable_link_and_stream +ffffffff82491000 T set_dio_throttled_vcp_size +ffffffff82491020 T setup_dio_stream_encoder +ffffffff82491130 T reset_dio_stream_encoder +ffffffff82491220 T setup_dio_stream_attribute +ffffffff824913e0 T enable_dio_dp_link_output +ffffffff82491480 T disable_dio_link_output +ffffffff824914f0 T set_dio_dp_link_test_pattern +ffffffff82491560 T set_dio_dp_lane_settings +ffffffff824915a0 T update_dio_stream_allocation_table +ffffffff82491620 T setup_dio_audio_output +ffffffff82491690 T enable_dio_audio_packet +ffffffff82491760 T disable_dio_audio_packet +ffffffff82491850 T can_use_dio_link_hwss +ffffffff82491890 T get_dio_link_hwss +ffffffff82492000 T dp_dio_fixed_vs_pe_retimer_lane_cfg_to_hw_cfg +ffffffff82492040 T dp_dio_fixed_vs_pe_retimer_exit_manual_automation +ffffffff824922e0 T enable_dio_fixed_vs_pe_retimer_program_4lane_output +ffffffff82492440 T requires_fixed_vs_pe_retimer_dio_link_hwss +ffffffff82492480 T get_dio_fixed_vs_pe_retimer_link_hwss +ffffffff824924b0 t enable_dio_fixed_vs_pe_retimer_dp_link_output +ffffffff82492650 t set_dio_fixed_vs_pe_retimer_dp_link_test_pattern +ffffffff82493000 T can_use_dpia_link_hwss +ffffffff82493050 T get_dpia_link_hwss +ffffffff82493080 t update_dpia_stream_allocation_table +ffffffff82494000 T set_hpo_dp_throttled_vcp_size +ffffffff82494030 T set_hpo_dp_hblank_min_symbol_width +ffffffff82494160 T setup_hpo_dp_stream_encoder +ffffffff824941b0 T reset_hpo_dp_stream_encoder +ffffffff824941d0 T setup_hpo_dp_stream_attribute +ffffffff82494250 T enable_hpo_dp_link_output +ffffffff824942d0 T disable_hpo_dp_link_output +ffffffff82494380 T update_hpo_dp_stream_allocation_table +ffffffff824943a0 T setup_hpo_dp_audio_output +ffffffff824943e0 T enable_hpo_dp_audio_packet +ffffffff82494400 T disable_hpo_dp_audio_packet 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link_blank_all_dp_displays +ffffffff824990f0 T link_blank_dp_stream +ffffffff82499230 T link_blank_all_edp_displays +ffffffff82499300 T link_set_all_streams_dpms_off_for_link +ffffffff82499420 T link_get_master_pipes_with_dpms_on +ffffffff82499610 T link_resume +ffffffff82499650 T link_set_dsc_on_stream +ffffffff82499b90 T link_set_dsc_pps_packet +ffffffff82499f50 T link_set_dsc_enable +ffffffff8249a000 T link_update_dsc_config +ffffffff8249a080 T link_calculate_sst_avg_time_slots_per_mtp +ffffffff8249a120 T link_reduce_mst_payload +ffffffff8249a5f0 t update_mst_stream_alloc_table +ffffffff8249a880 T link_increase_mst_payload +ffffffff8249ad40 T link_set_dpms_off +ffffffff8249baa0 t update_psp_stream_config +ffffffff8249bce0 t update_sst_payload +ffffffff8249c490 t get_ext_hdmi_settings +ffffffff8249c6e0 t write_i2c_retimer_setting +ffffffff8249cdc0 t write_i2c_default_retimer_setting +ffffffff8249d350 t write_i2c_redriver_setting +ffffffff8249d480 t disable_link +ffffffff8249d620 T link_set_dpms_on +ffffffff8249e200 t enable_stream_features +ffffffff8249e2c0 t allocate_usb4_bandwidth +ffffffff8249e300 t allocate_mst_payload +ffffffff8249e830 t log_vcp_x_y +ffffffff8249e9e0 t write_i2c +ffffffff8249ea80 t enable_link_dp +ffffffff8249f000 T link_create_link_service +ffffffff8249f480 T link_destroy_link_service +ffffffff8249f4d0 T link_create +ffffffff824a06d0 T link_destroy +ffffffff824a1000 T link_get_cur_link_res +ffffffff824a1150 T link_get_cur_res_map +ffffffff824a1240 T link_restore_res_map +ffffffff824a2000 T dp_link_bandwidth_kbps +ffffffff824a20b0 T link_validate_mode_timing +ffffffff824a26d0 t get_tmds_output_pixel_clock_100hz +ffffffff824a2740 T link_validate_dpia_bandwidth +ffffffff824a3000 T link_create_ddc_service +ffffffff824a31b0 T link_destroy_ddc_service +ffffffff824a3260 T set_ddc_transaction_type +ffffffff824a3290 T link_is_in_aux_transaction_mode +ffffffff824a32d0 T set_dongle_type +ffffffff824a3300 T link_get_aux_defer_delay +ffffffff824a3440 T link_query_ddc_data +ffffffff824a3840 T link_aux_transfer_raw +ffffffff824a3870 T link_get_fixed_vs_pe_retimer_write_address +ffffffff824a3900 T link_get_fixed_vs_pe_retimer_read_address +ffffffff824a3990 T link_configure_fixed_vs_pe_retimer +ffffffff824a3a70 T link_aux_transfer_with_retries_no_mutex +ffffffff824a3a80 T link_query_fixed_vs_pe_retimer +ffffffff824a3b60 T try_to_configure_aux_timeout +ffffffff824a3c50 T get_ddc_pin +ffffffff824a3c80 T write_scdc_data +ffffffff824a3d80 T read_scdc_data +ffffffff824a4000 T is_dp_active_dongle +ffffffff824a4040 T is_dp_branch_device +ffffffff824a4070 T dp_parse_lttpr_repeater_count +ffffffff824a40f0 T link_bw_kbps_from_raw_frl_link_rate_data +ffffffff824a4130 T dp_is_fec_supported +ffffffff824a41f0 T dp_should_enable_fec +ffffffff824a4320 T dp_is_128b_132b_signal +ffffffff824a4400 T dp_is_lttpr_present +ffffffff824a4470 T decide_fallback_link_setting +ffffffff824a4740 T link_dp_get_encoding_format +ffffffff824a4790 t reduce_link_rate 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link_dp_dpia_set_dptx_usb4_bw_alloc_support +ffffffff824aa350 T link_dp_dpia_allocate_usb4_bandwidth_for_stream +ffffffff824aa640 T dpia_handle_bw_alloc_response +ffffffff824aa930 T dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff824aac70 T dpia_validate_usb4_bw +ffffffff824ab070 t get_lowest_dpia_index +ffffffff824ab240 T link_dp_dpia_get_dp_overhead_in_dp_tunneling +ffffffff824ac000 T dp_parse_link_loss_status +ffffffff824ac160 T dp_handle_link_loss +ffffffff824ac2a0 T dp_read_hpd_rx_irq_data +ffffffff824ac3e0 T dp_should_allow_hpd_rx_irq +ffffffff824ac430 T dp_handle_hpd_rx_irq +ffffffff824ad000 T dpcd_write_rx_power_ctrl +ffffffff824ad060 T dp_enable_link_phy +ffffffff824ad100 T dp_disable_link_phy +ffffffff824ad1e0 T dp_set_hw_lane_settings +ffffffff824ad2e0 T dp_set_drive_settings +ffffffff824ad3e0 T dp_set_fec_ready +ffffffff824ad5c0 T dp_set_fec_enable +ffffffff824ae000 T dp_log_training_result +ffffffff824ae190 T dp_initialize_scrambling_data_symbols +ffffffff824ae230 T dp_training_pattern_to_dpcd_training_pattern +ffffffff824ae2c0 T dp_get_nibble_at_index +ffffffff824ae310 T dp_wait_for_training_aux_rd_interval +ffffffff824ae330 T dp_hw_to_dpcd_lane_settings +ffffffff824ae420 T get_dpcd_link_rate +ffffffff824ae4a0 T dp_translate_training_aux_read_interval +ffffffff824ae4e0 T dp_get_cr_failure +ffffffff824ae550 T is_repeater +ffffffff824ae590 T dp_is_max_vs_reached +ffffffff824ae620 T dp_is_cr_done +ffffffff824ae6f0 T dp_is_ch_eq_done +ffffffff824ae7a0 T dp_is_symbol_locked +ffffffff824ae850 T dp_is_interlane_aligned +ffffffff824ae880 T dp_check_link_loss_status +ffffffff824ae940 T dp_get_lane_status_and_lane_adjust +ffffffff824aea90 T dp_get_lttpr_mode_override +ffffffff824aeb60 T override_training_settings +ffffffff824aee30 T decide_cr_training_pattern +ffffffff824aee80 T decide_eq_training_pattern +ffffffff824aef70 T dp_decide_lttpr_mode +ffffffff824af020 T dp_decide_lane_settings +ffffffff824af3f0 T dp_decide_training_settings +ffffffff824af490 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edp_is_ilr_optimization_required +ffffffff824b9820 T edp_panel_backlight_power_on +ffffffff824b98e0 T edp_set_panel_power +ffffffff824b9a10 T edp_wait_for_t12 +ffffffff824b9a70 T edp_add_delay_for_T9 +ffffffff824b9ac0 T edp_receiver_ready_T9 +ffffffff824b9ba0 T edp_receiver_ready_T7 +ffffffff824b9d70 T edp_power_alpm_dpcd_enable +ffffffff824b9de0 T edp_set_backlight_level +ffffffff824b9f60 T edp_set_psr_allow_active +ffffffff824ba180 T edp_get_psr_state +ffffffff824ba260 T edp_setup_psr +ffffffff824ba680 T edp_get_psr_residency +ffffffff824ba730 T edp_set_sink_vtotal_in_psr_active +ffffffff824ba7c0 T edp_set_replay_allow_active +ffffffff824ba900 T edp_get_replay_state +ffffffff824ba9c0 T edp_setup_replay +ffffffff824babd0 T edp_set_coasting_vtotal +ffffffff824bac90 T edp_replay_residency +ffffffff824bad60 T edp_get_backlight_level +ffffffff824baed0 T edp_get_target_backlight_pwm +ffffffff824bb000 T link_get_hpd_state +ffffffff824bb090 T link_enable_hpd +ffffffff824bb0e0 T link_disable_hpd +ffffffff824bb130 T link_enable_hpd_filter +ffffffff824bb2e0 T program_hpd_filter +ffffffff824bb4e0 T link_get_hpd_gpio +ffffffff824bb5f0 T query_hpd_status +ffffffff824bb760 T get_hpd_line +ffffffff824bc000 T virtual_link_encoder_construct +ffffffff824bc060 t virtual_link_encoder_validate_output_with_stream +ffffffff824bc090 t virtual_link_encoder_hw_init +ffffffff824bc0c0 t virtual_link_encoder_setup +ffffffff824bc0f0 t virtual_link_encoder_enable_tmds_output +ffffffff824bc120 t virtual_link_encoder_enable_dp_output +ffffffff824bc150 t virtual_link_encoder_enable_dp_mst_output +ffffffff824bc180 t virtual_link_encoder_disable_output +ffffffff824bc1b0 t virtual_link_encoder_dp_set_lane_settings +ffffffff824bc1e0 t virtual_link_encoder_dp_set_phy_pattern +ffffffff824bc210 t virtual_link_encoder_update_mst_stream_allocation_table +ffffffff824bc240 t virtual_link_encoder_connect_dig_be_to_fe +ffffffff824bc270 t virtual_link_encoder_destroy +ffffffff824bc2c0 t virtual_link_encoder_get_max_link_cap +ffffffff824bd000 T virtual_setup_stream_encoder +ffffffff824bd030 T virtual_setup_stream_attribute +ffffffff824bd060 T virtual_reset_stream_encoder +ffffffff824bd090 T get_virtual_link_hwss +ffffffff824bd0c0 t virtual_disable_link_output +ffffffff824be000 T virtual_stream_encoder_construct +ffffffff824be050 T virtual_stream_encoder_create +ffffffff824be120 t virtual_stream_encoder_dp_set_stream_attribute +ffffffff824be150 t virtual_stream_encoder_hdmi_set_stream_attribute +ffffffff824be180 t virtual_stream_encoder_dvi_set_stream_attribute +ffffffff824be1b0 t virtual_stream_encoder_set_throttled_vcp_size +ffffffff824be1e0 t virtual_stream_encoder_update_hdmi_info_packets +ffffffff824be210 t virtual_stream_encoder_stop_hdmi_info_packets +ffffffff824be240 t virtual_stream_encoder_update_dp_info_packets +ffffffff824be270 t virtual_stream_encoder_stop_dp_info_packets +ffffffff824be2a0 t virtual_stream_encoder_dp_blank +ffffffff824be2d0 t virtual_stream_encoder_dp_unblank +ffffffff824be300 t virtual_audio_mute_control +ffffffff824be330 t virtual_setup_stereo_sync +ffffffff824be360 t virtual_stream_encoder_set_avmute +ffffffff824be390 t virtual_dig_connect_to_otg +ffffffff824be3c0 t virtual_stream_encoder_reset_hdmi_stream_attribute +ffffffff824be3f0 t virtual_stream_encoder_set_dsc_pps_info_packet +ffffffff824be420 t virtual_enc_dp_set_odm_combine +ffffffff824bf000 T dmub_dcn20_use_cached_inbox +ffffffff824bf040 T dmub_dcn20_reset +ffffffff824bf290 T dmub_dcn20_reset_release +ffffffff824bf380 T dmub_dcn20_backdoor_load +ffffffff824bf6b0 T dmub_dcn20_setup_windows +ffffffff824bfd30 T dmub_dcn20_setup_mailbox +ffffffff824bfda0 T dmub_dcn20_get_inbox1_wptr +ffffffff824bfdd0 T dmub_dcn20_get_inbox1_rptr +ffffffff824bfe00 T dmub_dcn20_set_inbox1_wptr +ffffffff824bfe30 T dmub_dcn20_setup_out_mailbox +ffffffff824bfea0 T dmub_dcn20_get_outbox1_wptr +ffffffff824bfed0 T dmub_dcn20_set_outbox1_rptr +ffffffff824bff00 T dmub_dcn20_setup_outbox0 +ffffffff824bff60 T dmub_dcn20_get_outbox0_wptr +ffffffff824bff90 T dmub_dcn20_set_outbox0_rptr +ffffffff824bffc0 T dmub_dcn20_is_hw_init +ffffffff824c0020 T dmub_dcn20_is_supported +ffffffff824c0090 T dmub_dcn20_set_gpint +ffffffff824c00c0 T dmub_dcn20_is_gpint_acked +ffffffff824c0130 T dmub_dcn20_get_gpint_response +ffffffff824c0160 T dmub_dcn20_get_fw_boot_status +ffffffff824c0190 T dmub_dcn20_enable_dmub_boot_options +ffffffff824c01c0 T dmub_dcn20_skip_dmub_panel_power_sequence +ffffffff824c0220 T dmub_dcn20_get_current_time +ffffffff824c0250 T dmub_dcn20_get_diagnostic_data +ffffffff824c1000 T dmub_dcn30_backdoor_load +ffffffff824c12e0 T dmub_dcn30_setup_windows +ffffffff824c2000 T dmub_dcn31_reset +ffffffff824c2320 T dmub_dcn31_reset_release +ffffffff824c2410 T dmub_dcn31_backdoor_load +ffffffff824c26f0 T dmub_dcn31_setup_windows +ffffffff824c2ae0 T dmub_dcn31_setup_mailbox +ffffffff824c2b40 T dmub_dcn31_get_inbox1_wptr +ffffffff824c2b70 T dmub_dcn31_get_inbox1_rptr +ffffffff824c2ba0 T dmub_dcn31_set_inbox1_wptr +ffffffff824c2bd0 T dmub_dcn31_setup_out_mailbox +ffffffff824c2c30 T dmub_dcn31_get_outbox1_wptr +ffffffff824c2c60 T dmub_dcn31_set_outbox1_rptr +ffffffff824c2c90 T dmub_dcn31_is_hw_init +ffffffff824c2d30 T dmub_dcn31_is_supported +ffffffff824c2da0 T dmub_dcn31_is_psrsu_supported +ffffffff824c2dd0 T dmub_dcn31_set_gpint +ffffffff824c2e00 T dmub_dcn31_is_gpint_acked +ffffffff824c2e70 T dmub_dcn31_get_gpint_response +ffffffff824c2ea0 T dmub_dcn31_get_gpint_dataout +ffffffff824c3000 T dmub_dcn31_get_fw_boot_status +ffffffff824c3030 T dmub_dcn31_get_fw_boot_option +ffffffff824c3060 T dmub_dcn31_enable_dmub_boot_options +ffffffff824c30e0 T dmub_dcn31_skip_dmub_panel_power_sequence +ffffffff824c3140 T dmub_dcn31_setup_outbox0 +ffffffff824c31a0 T dmub_dcn31_get_outbox0_wptr +ffffffff824c31d0 T dmub_dcn31_set_outbox0_rptr +ffffffff824c3200 T dmub_dcn31_get_current_time +ffffffff824c3230 T dmub_dcn31_get_diagnostic_data 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amdgpu_dpm_read_sensor +ffffffff824ea0c0 T amdgpu_dpm_get_apu_thermal_limit +ffffffff824ea170 T amdgpu_dpm_set_apu_thermal_limit +ffffffff824ea220 T amdgpu_dpm_compute_clocks +ffffffff824ea330 T amdgpu_dpm_enable_uvd +ffffffff824ea560 T amdgpu_dpm_enable_vce +ffffffff824ea790 T amdgpu_dpm_enable_jpeg +ffffffff824ea8b0 T amdgpu_pm_load_smu_firmware +ffffffff824ea980 T amdgpu_dpm_handle_passthrough_sbr +ffffffff824eaa20 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff824eaac0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff824eab60 T amdgpu_dpm_get_dpm_freq_range +ffffffff824eac20 T amdgpu_dpm_set_soft_freq_range +ffffffff824eace0 T amdgpu_dpm_write_watermarks_table +ffffffff824ead80 T amdgpu_dpm_wait_for_event +ffffffff824eae30 T amdgpu_dpm_set_residency_gfxoff +ffffffff824eaed0 T amdgpu_dpm_get_residency_gfxoff +ffffffff824eaf70 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff824eb010 T amdgpu_dpm_get_status_gfxoff +ffffffff824eb0b0 T amdgpu_dpm_get_thermal_throttling_counter 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amdgpu_dpm_set_mclk_od +ffffffff824ec3d0 T amdgpu_dpm_get_power_profile_mode +ffffffff824ec480 T amdgpu_dpm_set_power_profile_mode +ffffffff824ec530 T amdgpu_dpm_get_gpu_metrics +ffffffff824ec5e0 T amdgpu_dpm_get_fan_control_mode +ffffffff824ec690 T amdgpu_dpm_set_fan_speed_pwm +ffffffff824ec740 T amdgpu_dpm_get_fan_speed_pwm +ffffffff824ec7f0 T amdgpu_dpm_get_fan_speed_rpm +ffffffff824ec8a0 T amdgpu_dpm_set_fan_speed_rpm +ffffffff824ec950 T amdgpu_dpm_set_fan_control_mode +ffffffff824eca00 T amdgpu_dpm_get_power_limit +ffffffff824ecac0 T amdgpu_dpm_set_power_limit +ffffffff824ecb70 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff824ecc10 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff824eccc0 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff824ecd80 T amdgpu_dpm_is_overdrive_supported +ffffffff824ece00 T amdgpu_dpm_set_pp_table +ffffffff824ecec0 T amdgpu_dpm_get_num_cpu_cores +ffffffff824ecf20 T amdgpu_dpm_stb_debug_fs_init +ffffffff824ecf70 T amdgpu_dpm_display_configuration_change +ffffffff824ed020 T amdgpu_dpm_get_clock_by_type +ffffffff824ed0d0 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff824ed180 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff824ed230 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff824ed2e0 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff824ed390 T amdgpu_dpm_display_clock_voltage_request +ffffffff824ed440 T amdgpu_dpm_get_current_clocks +ffffffff824ed4f0 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff824ed590 T amdgpu_dpm_set_active_display_count +ffffffff824ed640 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff824ed6f0 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff824ed7a0 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff824ed850 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff824ed900 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff824ed9b0 T amdgpu_dpm_get_uclk_dpm_states +ffffffff824eda70 T amdgpu_dpm_get_dpm_clock_table +ffffffff824ee000 T amdgpu_dpm_get_active_displays +ffffffff824ee0a0 T amdgpu_dpm_get_vblank_time +ffffffff824ee150 T amdgpu_dpm_get_vrefresh +ffffffff824ef000 T amdgpu_pm_sysfs_init +ffffffff824ef030 T amdgpu_pm_sysfs_fini +ffffffff824ef060 T amdgpu_debugfs_pm_init +ffffffff824f0000 T amdgpu_dpm_print_class_info +ffffffff824f0340 T amdgpu_dpm_print_cap_info +ffffffff824f03e0 T amdgpu_dpm_print_ps_status +ffffffff824f04a0 T amdgpu_pm_print_power_states +ffffffff824f0540 T amdgpu_get_platform_caps +ffffffff824f05e0 T amdgpu_parse_extended_power_table +ffffffff824f1420 t amdgpu_parse_clk_voltage_dep_table +ffffffff824f14e0 T amdgpu_free_extended_power_table +ffffffff824f1660 T amdgpu_add_thermal_controller +ffffffff824f1b30 T amdgpu_get_vce_clock_state +ffffffff824f1b70 T amdgpu_legacy_dpm_compute_clocks +ffffffff824f2050 T amdgpu_dpm_thermal_work_handler +ffffffff824f3000 t pp_early_init +ffffffff824f3120 t pp_late_init +ffffffff824f3250 t pp_sw_init +ffffffff824f32f0 t pp_sw_fini +ffffffff824f3350 t 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phm_pre_display_configuration_changed +ffffffff824f9480 T phm_display_configuration_changed +ffffffff824f94f0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff824f9560 T phm_stop_thermal_controller +ffffffff824f95c0 T phm_register_irq_handlers +ffffffff824f9610 T phm_start_thermal_controller +ffffffff824f9760 T phm_check_smc_update_required_for_display_configuration +ffffffff824f97c0 T phm_check_states_equal +ffffffff824f9810 T phm_store_dal_configuration_data +ffffffff824f9970 T phm_get_dal_power_level +ffffffff824f99d0 T phm_set_cpu_power_state +ffffffff824f9a20 T phm_get_performance_level +ffffffff824f9a80 T phm_get_clock_info +ffffffff824f9c10 T phm_get_current_shallow_sleep_clocks +ffffffff824f9c60 T phm_get_clock_by_type +ffffffff824f9cb0 T phm_get_clock_by_type_with_latency +ffffffff824f9d00 T phm_get_clock_by_type_with_voltage +ffffffff824f9d50 T phm_set_watermarks_for_clocks_ranges +ffffffff824f9da0 T phm_display_clock_voltage_request +ffffffff824f9df0 T phm_get_max_high_clocks +ffffffff824f9e40 T phm_disable_smc_firmware_ctf +ffffffff824f9ea0 T phm_set_active_display_count +ffffffff824fa000 T hwmgr_early_init +ffffffff824fa4a0 t polaris_set_asic_special_caps +ffffffff824fa520 T hwmgr_sw_init +ffffffff824fa5a0 T hwmgr_sw_fini +ffffffff824fa600 T hwmgr_hw_init +ffffffff824fa800 T hwmgr_hw_fini +ffffffff824fa8f0 T hwmgr_suspend +ffffffff824fa990 T hwmgr_resume +ffffffff824faa50 T hwmgr_handle_task +ffffffff824fb000 T polaris_baco_set_state +ffffffff824fc000 T pp_override_get_default_fuse_value +ffffffff824fd000 T psm_init_power_state_table +ffffffff824fd330 T psm_fini_power_state_table +ffffffff824fd410 T psm_set_boot_states +ffffffff824fd4c0 T psm_set_performance_states +ffffffff824fd570 T psm_set_user_performance_state +ffffffff824fd600 T psm_adjust_power_state_dynamic +ffffffff824fe000 T atomctrl_initialize_mc_reg_table +ffffffff824fe220 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff824fe440 T atomctrl_set_engine_dram_timings_rv770 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atomctrl_get_memory_clock_spread_spectrum +ffffffff824ff720 T atomctrl_get_engine_clock_spread_spectrum +ffffffff824ff830 T atomctrl_read_efuse +ffffffff824ff8e0 T atomctrl_set_ac_timing_ai +ffffffff824ff950 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff824ff9d0 T atomctrl_get_smc_sclk_range_table +ffffffff824ffa90 T atomctrl_get_vddc_shared_railinfo +ffffffff824ffb10 T atomctrl_get_avfs_information +ffffffff824ffca0 T atomctrl_get_svi2_info +ffffffff824ffd80 T atomctrl_get_leakage_id_from_efuse +ffffffff824ffdf0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff824fff90 T atomctrl_get_voltage_range +ffffffff82500060 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff825000f0 T atomctrl_get_edc_leakage_table +ffffffff82501000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff825010e0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff825012c0 T pp_atomfwctrl_get_pp_assign_pin +ffffffff825013c0 T pp_atomfwctrl_enter_self_refresh +ffffffff825013f0 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff825014a0 T pp_atomfwctrl_get_avfs_information +ffffffff825017e0 T pp_atomfwctrl_get_gpio_information +ffffffff82501890 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff82501920 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff82501d10 T pp_atomfwctrl_get_smc_dpm_information +ffffffff82502000 T encode_pcie_lane_width +ffffffff82502030 T decode_pcie_lane_width +ffffffff82503000 t pp_tables_v1_0_initialize +ffffffff82504590 t pp_tables_v1_0_uninitialize +ffffffff825047b0 T get_number_of_powerplay_table_entries_v1_0 +ffffffff82504870 T get_powerplay_table_entry_v1_0 +ffffffff82505000 T pp_tables_get_response_times +ffffffff825050f0 T pp_tables_get_num_of_entries +ffffffff825051c0 T pp_tables_get_entry +ffffffff82505520 t init_non_clock_fields +ffffffff82505660 t pp_tables_initialize +ffffffff825068a0 t pp_tables_uninitialize +ffffffff82506b30 t get_number_of_vce_state_table_entries +ffffffff82506c20 t get_vce_state_table_entry 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smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff82519a90 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff82519cc0 T smu7_thermal_get_temperature +ffffffff82519d20 T smu7_thermal_disable_alert +ffffffff82519de0 T smu7_thermal_stop_thermal_controller +ffffffff82519fa0 T smu7_start_thermal_controller +ffffffff8251a3f0 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff8251b000 T smu8_init_function_pointers +ffffffff8251b040 t smu8_hwmgr_backend_init +ffffffff8251b550 t smu8_hwmgr_backend_fini +ffffffff8251b5e0 t smu8_setup_asic_task +ffffffff8251bb90 t smu8_get_power_state_size +ffffffff8251bbc0 t smu8_apply_state_adjust_rules +ffffffff8251bd40 t smu8_dpm_force_dpm_level +ffffffff8251c030 t smu8_enable_dpm_tasks +ffffffff8251c1e0 t smu8_disable_dpm_tasks +ffffffff8251c2e0 t smu8_dpm_patch_boot_state +ffffffff8251c340 t smu8_dpm_get_pp_table_entry +ffffffff8251c3a0 t smu8_dpm_get_num_of_pp_table_entries +ffffffff8251c400 t smu8_dpm_powerdown_uvd +ffffffff8251c450 t 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phm_find_closest_vddci +ffffffff825200c0 T phm_find_boot_level +ffffffff82520130 T phm_get_sclk_for_voltage_evv +ffffffff825201f0 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff82520310 T phm_get_lowest_enabled_level +ffffffff82520350 T phm_apply_dal_min_voltage_request +ffffffff82520420 T phm_get_voltage_evv_on_sclk +ffffffff825204e0 T phm_irq_process +ffffffff825206b0 T smu9_register_irq_handlers +ffffffff82520780 T smu_atom_get_data_table +ffffffff825207f0 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff82520900 T smu_set_watermarks_for_clocks_ranges +ffffffff82521000 T tonga_baco_set_state +ffffffff82522000 T vega10_baco_set_state +ffffffff82523000 T vega10_enable_disable_vce_dpm +ffffffff825230a0 T vega10_hwmgr_init +ffffffff82523100 t vega10_hwmgr_backend_init +ffffffff82523f70 t vega10_hwmgr_backend_fini +ffffffff82524000 t vega10_setup_asic_task +ffffffff82524150 t vega10_get_power_state_size +ffffffff82524180 t vega10_apply_state_adjust_rules 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t vegam_populate_bapm_parameters_in_dpm_table +ffffffff82571d60 t vegam_populate_clock_stretcher_data_table +ffffffff82571fb0 t vegam_populate_avfs_parameters +ffffffff82572320 t vegam_populate_vr_config +ffffffff82572460 t vegam_populate_pm_fuses +ffffffff825726e0 t vegam_get_dependency_volt_by_clk +ffffffff825728d0 t vegam_calculate_sclk_params +ffffffff82573000 T smu_set_residency_gfxoff +ffffffff82573050 T smu_get_residency_gfxoff +ffffffff825730a0 T smu_get_entrycount_gfxoff +ffffffff825730f0 T smu_get_status_gfxoff +ffffffff82573150 T smu_set_soft_freq_range +ffffffff82573190 T smu_get_dpm_freq_range +ffffffff825731e0 T smu_set_gfx_power_up_by_imu +ffffffff82573290 T is_support_sw_smu +ffffffff825732e0 T is_support_cclk_dpm +ffffffff82573350 T smu_allow_xgmi_power_down +ffffffff82573420 T smu_write_watermarks_table +ffffffff82573490 T smu_set_ac_dc +ffffffff825735b0 t smu_early_init +ffffffff82573900 t smu_late_init +ffffffff82573d10 t smu_sw_init +ffffffff82574490 t smu_sw_fini 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t smu_get_mclk +ffffffff82576f40 t smu_display_configuration_change +ffffffff82576fd0 t smu_get_clock_by_type_with_latency +ffffffff82577090 t smu_display_clock_voltage_request +ffffffff825770f0 t smu_enable_mgpu_fan_boost +ffffffff82577150 t smu_set_display_count +ffffffff825771c0 t smu_set_deep_sleep_dcefclk +ffffffff82577230 t smu_get_baco_capability +ffffffff825772a0 t smu_baco_set_state +ffffffff825773a0 t smu_sys_get_pp_feature_mask +ffffffff82577420 t smu_sys_set_pp_feature_mask +ffffffff82577490 t smu_mode2_reset +ffffffff82577550 t smu_enable_gfx_features +ffffffff82577610 t smu_set_df_cstate +ffffffff825776e0 t smu_set_xgmi_pstate +ffffffff825777a0 t smu_sys_get_gpu_metrics +ffffffff82577800 t smu_set_watermarks_for_clock_ranges +ffffffff82577880 t smu_display_disable_memory_clock_switch +ffffffff825778e0 t smu_get_max_sustainable_clocks_by_dc +ffffffff82577940 t smu_get_uclk_dpm_states +ffffffff825779a0 t smu_get_dpm_clock_table +ffffffff82577a00 t smu_get_prv_buffer_details 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arcturus_set_power_profile_mode +ffffffff8257b060 t arcturus_dpm_set_vcn_enable +ffffffff8257b150 t arcturus_read_sensor +ffffffff8257b380 t arcturus_is_dpm_running +ffffffff8257b3d0 t arcturus_get_fan_speed_pwm +ffffffff8257b530 t arcturus_get_fan_speed_rpm +ffffffff8257b650 t arcturus_get_thermal_temperature_range +ffffffff8257b740 t arcturus_set_performance_level +ffffffff8257b880 t arcturus_dump_pptable +ffffffff8257b8b0 t arcturus_get_power_limit +ffffffff8257b9d0 t arcturus_set_df_cstate +ffffffff8257bb10 t arcturus_allow_xgmi_power_down +ffffffff8257bc30 t arcturus_i2c_control_init +ffffffff8257bd80 t arcturus_i2c_control_fini +ffffffff8257bdc0 t arcturus_get_unique_id +ffffffff8257bf00 t arcturus_init_smc_tables +ffffffff8257c090 t arcturus_setup_pptable +ffffffff8257c1f0 t arcturus_set_fan_speed_pwm +ffffffff8257c3d0 t arcturus_set_fan_speed_rpm +ffffffff8257c520 t arcturus_log_thermal_throttling_event +ffffffff8257c970 t arcturus_get_gpu_metrics +ffffffff8257cbc0 t arcturus_get_fan_parameters +ffffffff8257cc00 t arcturus_get_current_clk_freq_by_table +ffffffff8257cd70 t arcturus_get_smu_metrics_data +ffffffff8257cff0 t arcturus_upload_dpm_level +ffffffff8257d110 t arcturus_i2c_xfer +ffffffff8257d3d0 t arcturus_i2c_func +ffffffff8257d400 t arcturus_set_fan_static_mode +ffffffff8257e000 T cyan_skillfish_set_ppt_funcs +ffffffff8257e030 t cyan_skillfish_print_clk_levels +ffffffff8257e170 t cyan_skillfish_od_edit_dpm_table +ffffffff8257e4b0 t cyan_skillfish_read_sensor +ffffffff8257e6e0 t cyan_skillfish_is_dpm_running +ffffffff8257e790 t cyan_skillfish_init_smc_tables +ffffffff8257e880 t cyan_skillfish_get_enabled_mask +ffffffff8257e8c0 t cyan_skillfish_get_dpm_ultimate_freq +ffffffff8257e990 t cyan_skillfish_get_gpu_metrics +ffffffff8257ec40 t cyan_skillfish_get_smu_metrics_data +ffffffff8257f000 T navi10_set_ppt_funcs +ffffffff8257f050 t navi10_run_btc +ffffffff8257f0e0 t navi10_get_allowed_feature_mask +ffffffff8257f3d0 t navi10_set_default_dpm_table +ffffffff8257f8f0 t navi10_populate_umd_state_clk +ffffffff8257fab0 t navi10_print_clk_levels +ffffffff8257fc90 t navi10_emit_clk_levels +ffffffff8257ff00 t navi10_force_clk_levels +ffffffff82580060 t navi10_od_edit_dpm_table +ffffffff825806a0 t navi10_get_clock_by_type_with_latency +ffffffff825807b0 t navi10_get_power_profile_mode +ffffffff82580a90 t navi10_set_power_profile_mode +ffffffff82580d90 t navi10_dpm_set_vcn_enable +ffffffff82580e30 t navi10_dpm_set_jpeg_enable +ffffffff82580ec0 t navi10_read_sensor +ffffffff82581070 t navi10_pre_display_config_changed +ffffffff82581130 t navi10_display_config_changed +ffffffff825811d0 t navi10_notify_smc_display_config +ffffffff825813a0 t navi10_is_dpm_running +ffffffff825813f0 t navi10_get_fan_speed_rpm +ffffffff825814a0 t navi10_set_watermarks_table +ffffffff82581650 t navi10_get_thermal_temperature_range +ffffffff82581740 t navi10_get_uclk_dpm_states +ffffffff82581850 t navi10_set_default_od_settings +ffffffff82581ae0 t navi10_display_disable_memory_clock_switch +ffffffff82581b70 t navi10_get_power_limit +ffffffff82581ca0 t navi10_update_pcie_parameters +ffffffff82581e20 t navi10_i2c_control_init +ffffffff82581f70 t navi10_i2c_control_fini +ffffffff82581fb0 t navi10_init_smc_tables +ffffffff82582220 t navi10_setup_pptable +ffffffff82582490 t navi10_baco_enter +ffffffff825824e0 t navi10_baco_exit +ffffffff82582640 t navi1x_get_gpu_metrics +ffffffff825830b0 t navi10_enable_mgpu_fan_boost +ffffffff82583130 t navi10_get_fan_parameters +ffffffff82583170 t navi10_post_smu_init +ffffffff82583470 t navi10_get_default_config_table_settings +ffffffff825834c0 t navi10_set_config_table +ffffffff82583580 t navi1x_get_smu_metrics_data +ffffffff82583c50 t navi10_od_setting_check_range +ffffffff82583d10 t navi10_i2c_xfer +ffffffff82583fd0 t navi10_i2c_func +ffffffff82584000 t navi10_umc_hybrid_cdr_workaround +ffffffff82585000 T sienna_cichlid_set_ppt_funcs +ffffffff82585050 t sienna_cichlid_run_btc +ffffffff825850e0 t sienna_cichlid_get_allowed_feature_mask +ffffffff82585380 t sienna_cichlid_set_default_dpm_table +ffffffff82585a10 t sienna_cichlid_populate_umd_state_clk +ffffffff82585ad0 t sienna_cichlid_print_clk_levels +ffffffff82585cf0 t sienna_cichlid_force_clk_levels +ffffffff82585e60 t sienna_cichlid_od_edit_dpm_table +ffffffff82586460 t sienna_cichlid_restore_user_od_settings +ffffffff825864f0 t sienna_cichlid_get_power_profile_mode +ffffffff825867d0 t sienna_cichlid_set_power_profile_mode +ffffffff82586ad0 t sienna_cichlid_dpm_set_vcn_enable +ffffffff82586ba0 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff82586c30 t sienna_cichlid_read_sensor +ffffffff825874f0 t sienna_cichlid_pre_display_config_changed +ffffffff82587520 t sienna_cichlid_display_config_changed +ffffffff82587580 t sienna_cichlid_notify_smc_display_config +ffffffff82587750 t sienna_cichlid_is_dpm_running +ffffffff825877b0 t sienna_cichlid_get_fan_speed_rpm +ffffffff825878d0 t sienna_cichlid_set_watermarks_table +ffffffff82587a70 t sienna_cichlid_get_thermal_temperature_range +ffffffff82587b50 t sienna_cichlid_get_uclk_dpm_states +ffffffff82587c60 t sienna_cichlid_set_default_od_settings +ffffffff82587e30 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff82587ec0 t sienna_cichlid_dump_pptable +ffffffff82587ef0 t sienna_cichlid_get_power_limit +ffffffff82587fc0 t sienna_cichlid_update_pcie_parameters +ffffffff825880f0 t sienna_cichlid_i2c_control_init +ffffffff82588240 t sienna_cichlid_i2c_control_fini +ffffffff82588280 t sienna_cichlid_get_unique_id +ffffffff82588400 t sienna_cichlid_init_smc_tables +ffffffff82588770 t sienna_cichlid_set_mp1_state +ffffffff825887b0 t sienna_cichlid_setup_pptable +ffffffff82588c40 t sienna_cichlid_system_features_control +ffffffff82588ce0 t sienna_cichlid_baco_enter +ffffffff82588d30 t sienna_cichlid_baco_exit +ffffffff82588e90 t sienna_cichlid_is_mode1_reset_supported +ffffffff82588f20 t sienna_cichlid_is_mode2_reset_supported +ffffffff82588f50 t sienna_cichlid_mode2_reset +ffffffff825890f0 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff82589110 t sienna_cichlid_get_gpu_metrics +ffffffff825896e0 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff82589730 t sienna_cichlid_get_fan_parameters +ffffffff82589770 t sienna_cichlid_gpo_control +ffffffff82589840 t sienna_cichlid_get_ecc_info +ffffffff82589940 t sienna_cichlid_stb_get_data_direct +ffffffff82589a00 t sienna_cichlid_get_default_config_table_settings +ffffffff82589a70 t sienna_cichlid_set_config_table +ffffffff82589b40 t sienna_cichlid_get_throttler_status_locked +ffffffff82589ca0 t sienna_cichlid_get_smartshift_power_percentage +ffffffff82589dd0 t sienna_cichlid_i2c_xfer +ffffffff8258a090 t sienna_cichlid_i2c_func +ffffffff8258b000 T smu_v11_0_init_microcode +ffffffff8258b170 T smu_v11_0_fini_microcode +ffffffff8258b1d0 T smu_v11_0_load_microcode +ffffffff8258b330 T smu_v11_0_check_fw_status +ffffffff8258b390 T smu_v11_0_check_fw_version +ffffffff8258b530 T smu_v11_0_setup_pptable +ffffffff8258b650 T smu_v11_0_init_smc_tables +ffffffff8258b7e0 T smu_v11_0_fini_smc_tables +ffffffff8258baa0 T smu_v11_0_init_power +ffffffff8258bb40 T smu_v11_0_fini_power +ffffffff8258bbb0 T smu_v11_0_get_vbios_bootup_values +ffffffff8258bf60 T smu_v11_0_notify_memory_pool_location +ffffffff8258c080 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff8258c110 T smu_v11_0_set_driver_table_location +ffffffff8258c190 T smu_v11_0_set_tool_table_location +ffffffff8258c210 T smu_v11_0_init_display_count +ffffffff8258c270 T smu_v11_0_set_allowed_mask +ffffffff8258c350 T smu_v11_0_system_features_control +ffffffff8258c370 T smu_v11_0_notify_display_change +ffffffff8258c3e0 T smu_v11_0_init_max_sustainable_clocks +ffffffff8258c6b0 t smu_v11_0_get_max_sustainable_clock +ffffffff8258c820 T smu_v11_0_get_current_power_limit +ffffffff8258c920 T smu_v11_0_set_power_limit +ffffffff8258ca90 T smu_v11_0_interrupt_work +ffffffff8258cb20 T smu_v11_0_enable_thermal_alert +ffffffff8258cbd0 T smu_v11_0_disable_thermal_alert +ffffffff8258cbf0 T smu_v11_0_get_gfx_vdd +ffffffff8258ccb0 T smu_v11_0_display_clock_voltage_request +ffffffff8258ce20 T smu_v11_0_set_hard_freq_limited_range +ffffffff8258cf20 T smu_v11_0_gfx_off_control +ffffffff8258cfa0 T smu_v11_0_get_fan_control_mode +ffffffff8258d000 T smu_v11_0_set_fan_speed_pwm +ffffffff8258d1e0 t smu_v11_0_set_fan_static_mode +ffffffff8258d3e0 T smu_v11_0_set_fan_speed_rpm +ffffffff8258d530 T smu_v11_0_get_fan_speed_pwm +ffffffff8258d690 T smu_v11_0_get_fan_speed_rpm +ffffffff8258d7a0 T smu_v11_0_set_fan_control_mode +ffffffff8258d990 T smu_v11_0_set_xgmi_pstate +ffffffff8258d9b0 T smu_v11_0_register_irq_handler +ffffffff8258da80 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff8258db10 T smu_v11_0_set_azalia_d3_pme +ffffffff8258db30 T smu_v11_0_baco_set_armd3_sequence +ffffffff8258db50 T smu_v11_0_baco_is_support +ffffffff8258dbf0 T smu_v11_0_baco_get_state +ffffffff8258dc20 T smu_v11_0_baco_set_state +ffffffff8258df40 T smu_v11_0_baco_enter +ffffffff8258e090 T smu_v11_0_baco_exit +ffffffff8258e210 T smu_v11_0_mode1_reset +ffffffff8258e290 T smu_v11_0_handle_passthrough_sbr +ffffffff8258e2b0 T smu_v11_0_get_dpm_ultimate_freq +ffffffff8258e410 T smu_v11_0_set_soft_freq_limited_range +ffffffff8258e500 T smu_v11_0_set_performance_level +ffffffff8258e8f0 T smu_v11_0_set_power_source +ffffffff8258e960 T smu_v11_0_get_dpm_freq_by_index +ffffffff8258ea20 T smu_v11_0_get_dpm_level_count +ffffffff8258ead0 T smu_v11_0_set_single_dpm_table +ffffffff8258edb0 T smu_v11_0_get_dpm_level_range +ffffffff8258ef70 T smu_v11_0_get_current_pcie_link_width_level +ffffffff8258efd0 T smu_v11_0_get_current_pcie_link_width +ffffffff8258f040 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff8258f0a0 T smu_v11_0_get_current_pcie_link_speed +ffffffff8258f100 T smu_v11_0_gfx_ulv_control +ffffffff8258f180 T smu_v11_0_deep_sleep_control +ffffffff8258f390 T smu_v11_0_restore_user_od_settings +ffffffff8258f420 T smu_v11_0_set_smu_mailbox_registers +ffffffff8258f490 t smu_v11_0_set_irq_state +ffffffff8258fae0 t smu_v11_0_irq_process +ffffffff82590000 T vangogh_set_ppt_funcs +ffffffff82590040 t vangogh_set_default_dpm_tables +ffffffff82590070 t vangogh_common_print_clk_levels +ffffffff82590530 t vangogh_force_clk_levels +ffffffff825907b0 t vangogh_od_edit_dpm_table +ffffffff82590d70 t vangogh_get_power_profile_mode +ffffffff82590ed0 t vangogh_set_power_profile_mode +ffffffff82591020 t vangogh_dpm_set_vcn_enable +ffffffff82591080 t vangogh_dpm_set_jpeg_enable +ffffffff825910e0 t vangogh_read_sensor +ffffffff825917f0 t vangogh_get_apu_thermal_limit +ffffffff82591810 t vangogh_set_apu_thermal_limit +ffffffff82591830 t vangogh_is_dpm_running +ffffffff825918a0 t vangogh_set_watermarks_table +ffffffff82591a30 t vangogh_set_performance_level +ffffffff825923f0 t vangogh_get_power_limit +ffffffff82592570 t vangogh_get_ppt_limit +ffffffff825925e0 t vangogh_get_dpm_clock_table +ffffffff82592750 t vangogh_init_smc_tables +ffffffff825929d0 t vangogh_system_features_control +ffffffff82592a20 t vangogh_set_power_limit +ffffffff82592bb0 t vangogh_get_gfxoff_status +ffffffff82592c40 t vangogh_get_gfxoff_entrycount +ffffffff82592cc0 t vangogh_set_gfxoff_residency +ffffffff82592d40 t vangogh_get_gfxoff_residency +ffffffff82592d80 t vangogh_mode2_reset +ffffffff82592f40 t vangogh_common_get_gpu_metrics +ffffffff82593760 t vangogh_post_smu_init +ffffffff82593920 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff82593990 t vangogh_force_dpm_limit_value +ffffffff82593b10 t vangogh_get_dpm_ultimate_freq +ffffffff82593ed0 t vangogh_set_soft_freq_limited_range +ffffffff82594090 t vangogh_get_gpu_metrics_v2_3 +ffffffff82595000 T renoir_set_ppt_funcs +ffffffff825950a0 t renoir_get_current_power_state +ffffffff82595120 t renoir_print_clk_levels +ffffffff82595570 t renoir_force_clk_levels +ffffffff825957d0 t renoir_od_edit_dpm_table +ffffffff82595b10 t renoir_get_power_profile_mode +ffffffff82595c20 t renoir_set_power_profile_mode +ffffffff82595d70 t renoir_dpm_set_vcn_enable +ffffffff82595e10 t renoir_dpm_set_jpeg_enable +ffffffff82595ea0 t renoir_read_sensor +ffffffff825962b0 t renoir_is_dpm_running +ffffffff825962f0 t renoir_set_watermarks_table +ffffffff825964b0 t renoir_set_performance_level +ffffffff82596af0 t renoir_get_dpm_clock_table +ffffffff82596e40 t renoir_init_smc_tables +ffffffff82596fe0 t renoir_get_enabled_mask +ffffffff82597020 t renoir_get_dpm_ultimate_freq +ffffffff825972f0 t renoir_get_gpu_metrics +ffffffff82597530 t renoir_gfx_state_change_set +ffffffff82597560 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff82597610 t renoir_force_dpm_limit_value +ffffffff82598000 T smu_v12_0_check_fw_status +ffffffff82598060 T smu_v12_0_check_fw_version +ffffffff825980e0 T smu_v12_0_powergate_sdma +ffffffff82598130 T smu_v12_0_set_gfx_cgpg +ffffffff82598190 T smu_v12_0_get_gfxoff_status +ffffffff82598220 T smu_v12_0_gfx_off_control +ffffffff82598350 T smu_v12_0_fini_smc_tables +ffffffff82598420 T smu_v12_0_set_default_dpm_tables +ffffffff82598450 T smu_v12_0_mode2_reset +ffffffff82598470 T smu_v12_0_set_soft_freq_limited_range +ffffffff825985f0 T smu_v12_0_set_driver_table_location +ffffffff82598670 T smu_v12_0_get_vbios_bootup_values +ffffffff82599000 T aldebaran_set_ppt_funcs +ffffffff82599050 t aldebaran_get_allowed_feature_mask +ffffffff825990b0 t aldebaran_set_default_dpm_table +ffffffff825992f0 t aldebaran_populate_umd_state_clk +ffffffff825993f0 t aldebaran_print_clk_levels +ffffffff825995f0 t aldebaran_force_clk_levels +ffffffff82599800 t aldebaran_usr_edit_dpm_table +ffffffff82599a40 t aldebaran_read_sensor +ffffffff82599cc0 t aldebaran_is_dpm_running +ffffffff82599d20 t aldebaran_get_thermal_temperature_range +ffffffff82599df0 t aldebaran_set_performance_level +ffffffff82599ea0 t aldebaran_get_power_limit +ffffffff8259a060 t aldebaran_set_df_cstate +ffffffff8259a0f0 t aldebaran_allow_xgmi_power_down +ffffffff8259a1a0 t aldebaran_i2c_control_init +ffffffff8259a270 t aldebaran_i2c_control_fini +ffffffff8259a2b0 t aldebaran_get_unique_id +ffffffff8259a3a0 t aldebaran_init_smc_tables +ffffffff8259a590 t aldebaran_set_mp1_state +ffffffff8259a5d0 t aldebaran_setup_pptable +ffffffff8259a6c0 t aldebaran_system_features_control +ffffffff8259a850 t aldebaran_set_power_limit +ffffffff8259a8e0 t aldebaran_is_baco_supported +ffffffff8259a910 t aldebaran_is_mode1_reset_supported +ffffffff8259a940 t aldebaran_is_mode2_reset_supported +ffffffff8259a970 t aldebaran_mode1_reset +ffffffff8259aa70 t aldebaran_mode2_reset +ffffffff8259aeb0 t aldebaran_set_soft_freq_limited_range +ffffffff8259b0f0 t aldebaran_log_thermal_throttling_event +ffffffff8259b450 t aldebaran_get_gpu_metrics +ffffffff8259b720 t aldebaran_smu_handle_passthrough_sbr +ffffffff8259b740 t aldebaran_smu_send_hbm_bad_page_num +ffffffff8259b7d0 t aldebaran_get_ecc_info +ffffffff8259b940 t aldebaran_send_hbm_bad_channel_flag +ffffffff8259ba30 t aldebaran_get_current_clk_freq_by_table +ffffffff8259bba0 t aldebaran_get_smu_metrics_data +ffffffff8259be20 t aldebaran_upload_dpm_level +ffffffff8259bf40 t aldebaran_i2c_xfer +ffffffff8259c200 t aldebaran_i2c_func +ffffffff8259d000 T smu_v13_0_init_microcode +ffffffff8259d150 T smu_v13_0_fini_microcode +ffffffff8259d1b0 T smu_v13_0_load_microcode +ffffffff8259d1e0 T smu_v13_0_init_pptable_microcode +ffffffff8259d390 T smu_v13_0_get_pptable_from_firmware +ffffffff8259d4c0 T smu_v13_0_check_fw_status +ffffffff8259d540 T smu_v13_0_check_fw_version +ffffffff8259d5d0 T smu_v13_0_setup_pptable +ffffffff8259d770 T smu_v13_0_init_smc_tables +ffffffff8259d940 T smu_v13_0_fini_smc_tables +ffffffff8259dbe0 T smu_v13_0_init_power +ffffffff8259dc70 T smu_v13_0_fini_power +ffffffff8259dd00 T smu_v13_0_get_vbios_bootup_values +ffffffff8259dfd0 T smu_v13_0_notify_memory_pool_location +ffffffff8259e0a0 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff8259e130 T smu_v13_0_set_driver_table_location +ffffffff8259e1b0 T smu_v13_0_set_tool_table_location +ffffffff8259e230 T smu_v13_0_init_display_count +ffffffff8259e270 T smu_v13_0_set_allowed_mask +ffffffff8259e350 T smu_v13_0_gfx_off_control +ffffffff8259e3d0 T smu_v13_0_system_features_control +ffffffff8259e3f0 T smu_v13_0_notify_display_change +ffffffff8259e460 T smu_v13_0_init_max_sustainable_clocks +ffffffff8259e730 t smu_v13_0_get_max_sustainable_clock +ffffffff8259e8a0 T smu_v13_0_get_current_power_limit +ffffffff8259e9a0 T smu_v13_0_set_power_limit +ffffffff8259eae0 T smu_v13_0_enable_thermal_alert +ffffffff8259eb80 T smu_v13_0_disable_thermal_alert +ffffffff8259ebc0 T smu_v13_0_get_gfx_vdd +ffffffff8259ec80 T smu_v13_0_display_clock_voltage_request +ffffffff8259edf0 T smu_v13_0_set_hard_freq_limited_range +ffffffff8259eef0 T smu_v13_0_get_fan_control_mode +ffffffff8259ef40 T smu_v13_0_set_fan_speed_pwm +ffffffff8259f1b0 t smu_v13_0_set_fan_static_mode +ffffffff8259f3b0 T smu_v13_0_set_fan_control_mode +ffffffff8259f550 T smu_v13_0_set_fan_speed_rpm +ffffffff8259f740 T smu_v13_0_set_xgmi_pstate +ffffffff8259f760 T smu_v13_0_register_irq_handler +ffffffff8259f840 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff8259f8d0 T smu_v13_0_set_azalia_d3_pme +ffffffff8259f8f0 T smu_v13_0_wait_for_event +ffffffff8259f940 T smu_v13_0_get_dpm_ultimate_freq +ffffffff8259fab0 T smu_v13_0_set_soft_freq_limited_range +ffffffff8259fba0 T smu_v13_0_set_performance_level +ffffffff825a0400 T smu_v13_0_set_power_source +ffffffff825a0470 T smu_v13_0_get_dpm_freq_by_index +ffffffff825a0530 T smu_v13_0_set_single_dpm_table +ffffffff825a08b0 T smu_v13_0_get_current_pcie_link_width_level +ffffffff825a0910 T smu_v13_0_get_current_pcie_link_width +ffffffff825a0980 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff825a09e0 T smu_v13_0_get_current_pcie_link_speed +ffffffff825a0a50 T smu_v13_0_set_vcn_enable +ffffffff825a0b10 T smu_v13_0_set_jpeg_enable +ffffffff825a0b30 T smu_v13_0_run_btc +ffffffff825a0bc0 T smu_v13_0_gpo_control +ffffffff825a0c60 T smu_v13_0_deep_sleep_control +ffffffff825a0f60 T smu_v13_0_gfx_ulv_control +ffffffff825a0fe0 T smu_v13_0_baco_set_armd3_sequence +ffffffff825a1050 T smu_v13_0_baco_is_support +ffffffff825a10f0 T smu_v13_0_baco_get_state +ffffffff825a1120 T smu_v13_0_baco_set_state +ffffffff825a1220 T smu_v13_0_baco_enter +ffffffff825a13b0 T smu_v13_0_baco_exit +ffffffff825a1460 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff825a14a0 T smu_v13_0_od_edit_dpm_table +ffffffff825a17b0 T smu_v13_0_set_default_dpm_tables +ffffffff825a17e0 T smu_v13_0_set_smu_mailbox_registers +ffffffff825a1850 T smu_v13_0_mode1_reset +ffffffff825a18d0 T smu_v13_0_update_pcie_parameters +ffffffff825a1b50 t smu_v13_0_set_irq_state +ffffffff825a21a0 t smu_v13_0_irq_process +ffffffff825a3000 T smu_v13_0_0_set_ppt_funcs +ffffffff825a30f0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff825a3240 t smu_v13_0_0_set_default_dpm_table +ffffffff825a36c0 t smu_v13_0_0_populate_umd_state_clk +ffffffff825a3800 t smu_v13_0_0_print_clk_levels +ffffffff825a3950 t smu_v13_0_0_force_clk_levels +ffffffff825a3ae0 t smu_v13_0_0_od_edit_dpm_table +ffffffff825a4020 t smu_v13_0_0_restore_user_od_settings +ffffffff825a4100 t smu_v13_0_0_get_power_profile_mode +ffffffff825a4220 t smu_v13_0_0_set_power_profile_mode +ffffffff825a44b0 t smu_v13_0_0_read_sensor +ffffffff825a4730 t smu_v13_0_0_is_dpm_running +ffffffff825a4780 t smu_v13_0_0_get_fan_speed_pwm +ffffffff825a4870 t smu_v13_0_0_get_fan_speed_rpm +ffffffff825a48e0 t smu_v13_0_0_get_thermal_temperature_range +ffffffff825a49e0 t smu_v13_0_0_set_default_od_settings +ffffffff825a4b40 t smu_v13_0_0_dump_pptable +ffffffff825a4b70 t smu_v13_0_0_get_power_limit +ffffffff825a4c60 t smu_v13_0_0_set_df_cstate +ffffffff825a4c80 t smu_v13_0_0_i2c_control_init +ffffffff825a4dd0 t smu_v13_0_0_i2c_control_fini +ffffffff825a4e10 t smu_v13_0_0_get_unique_id +ffffffff825a4ec0 t smu_v13_0_0_init_smc_tables +ffffffff825a5130 t smu_v13_0_0_set_mp1_state +ffffffff825a5170 t smu_v13_0_0_setup_pptable +ffffffff825a52f0 t smu_v13_0_0_system_features_control +ffffffff825a5300 t smu_v13_0_0_baco_enter +ffffffff825a5370 t smu_v13_0_0_baco_exit +ffffffff825a53e0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff825a5440 t smu_v13_0_0_mode1_reset +ffffffff825a55a0 t smu_v13_0_0_mode2_reset +ffffffff825a55f0 t smu_v13_0_0_enable_gfx_features +ffffffff825a5650 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff825a5780 t smu_v13_0_0_get_gpu_metrics +ffffffff825a5be0 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff825a5c30 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff825a5cc0 t smu_v13_0_0_get_ecc_info +ffffffff825a5de0 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff825a5e70 t smu_v13_0_0_i2c_xfer +ffffffff825a6130 t smu_v13_0_0_i2c_func +ffffffff825a7000 T smu_v13_0_4_set_ppt_funcs +ffffffff825a70c0 t smu_v13_0_4_print_clk_levels +ffffffff825a7140 t smu_v13_0_4_force_clk_levels +ffffffff825a7420 t smu_v13_0_4_read_sensor +ffffffff825a7760 t smu_v13_0_4_is_dpm_running +ffffffff825a77c0 t smu_v13_0_4_set_watermarks_table +ffffffff825a7950 t smu_v13_0_4_set_performance_level +ffffffff825a8660 t smu_v13_0_4_init_smc_tables +ffffffff825a8800 t smu_v13_0_4_fini_smc_tables +ffffffff825a88d0 t smu_v13_0_4_system_features_control +ffffffff825a8960 t smu_v13_0_4_mode2_reset +ffffffff825a8980 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff825a8db0 t smu_v13_0_4_get_gpu_metrics +ffffffff825a8f90 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff825a8ff0 t smu_v13_0_4_get_current_clk_freq +ffffffff825aa000 T smu_v13_0_5_set_ppt_funcs +ffffffff825aa0a0 t smu_v13_0_5_set_default_dpm_tables +ffffffff825aa0d0 t smu_v13_0_5_print_clk_levels +ffffffff825aa170 t smu_v13_0_5_force_clk_levels +ffffffff825aa300 t smu_v13_0_5_od_edit_dpm_table +ffffffff825aa610 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff825aa630 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff825aa650 t smu_v13_0_5_read_sensor +ffffffff825aa8d0 t smu_v13_0_5_is_dpm_running +ffffffff825aa930 t smu_v13_0_5_set_watermarks_table +ffffffff825aaac0 t smu_v13_0_5_set_performance_level +ffffffff825ab140 t smu_v13_0_5_init_smc_tables +ffffffff825ab2e0 t smu_v13_0_5_fini_smc_tables +ffffffff825ab3b0 t smu_v13_0_5_system_features_control +ffffffff825ab400 t smu_v13_0_5_mode2_reset +ffffffff825ab490 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff825ab8d0 t smu_v13_0_5_get_gpu_metrics +ffffffff825aba30 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff825ac000 T smu_v13_0_6_set_ppt_funcs +ffffffff825ac050 t smu_v13_0_6_get_allowed_feature_mask +ffffffff825ac0b0 t smu_v13_0_6_set_default_dpm_table +ffffffff825ac600 t smu_v13_0_6_populate_umd_state_clk +ffffffff825ac700 t smu_v13_0_6_print_clk_levels +ffffffff825acad0 t smu_v13_0_6_force_clk_levels +ffffffff825acce0 t smu_v13_0_6_usr_edit_dpm_table +ffffffff825acf20 t smu_v13_0_6_read_sensor +ffffffff825ad530 t smu_v13_0_6_is_dpm_running +ffffffff825ad5c0 t smu_v13_0_6_get_thermal_temperature_range +ffffffff825ad740 t smu_v13_0_6_set_performance_level +ffffffff825ad870 t smu_v13_0_6_get_power_limit +ffffffff825ad950 t smu_v13_0_6_set_df_cstate +ffffffff825ad970 t smu_v13_0_6_allow_xgmi_power_down +ffffffff825ad990 t smu_v13_0_6_i2c_control_init +ffffffff825adae0 t smu_v13_0_6_i2c_control_fini +ffffffff825adb20 t smu_v13_0_6_get_unique_id +ffffffff825adba0 t smu_v13_0_6_init_smc_tables +ffffffff825add60 t smu_v13_0_6_check_fw_status +ffffffff825addc0 t smu_v13_0_6_setup_pptable +ffffffff825addf0 t smu_v13_0_6_system_features_control +ffffffff825ade90 t smu_v13_0_6_get_enabled_mask +ffffffff825adf10 t smu_v13_0_6_set_power_limit +ffffffff825adf30 t smu_v13_0_6_register_irq_handler +ffffffff825adf90 t smu_v13_0_6_is_baco_supported +ffffffff825adfc0 t smu_v13_0_6_is_mode1_reset_supported +ffffffff825adff0 t smu_v13_0_6_is_mode2_reset_supported +ffffffff825ae020 t smu_v13_0_6_mode1_reset +ffffffff825ae0e0 t smu_v13_0_6_mode2_reset +ffffffff825ae4a0 t smu_v13_0_6_get_dpm_ultimate_freq +ffffffff825ae6e0 t smu_v13_0_6_set_soft_freq_limited_range +ffffffff825ae960 t smu_v13_0_6_log_thermal_throttling_event +ffffffff825aeca0 t smu_v13_0_6_get_gpu_metrics +ffffffff825af050 t smu_v13_0_6_smu_send_hbm_bad_page_num +ffffffff825af0e0 t smu_v13_0_6_get_smu_metrics_data +ffffffff825af3a0 t smu_v13_0_6_upload_dpm_level +ffffffff825af4d0 t smu_v13_0_6_i2c_xfer +ffffffff825af800 t smu_v13_0_6_i2c_func +ffffffff825af830 t smu_v13_0_6_set_irq_state +ffffffff825afb10 t smu_v13_0_6_irq_process +ffffffff825b0000 T smu_v13_0_7_set_ppt_funcs +ffffffff825b0060 t smu_v13_0_7_get_allowed_feature_mask +ffffffff825b01e0 t smu_v13_0_7_set_default_dpm_table +ffffffff825b0660 t smu_v13_0_7_populate_umd_state_clk +ffffffff825b07a0 t smu_v13_0_7_print_clk_levels +ffffffff825b08f0 t smu_v13_0_7_force_clk_levels +ffffffff825b0a80 t smu_v13_0_7_od_edit_dpm_table +ffffffff825b0fc0 t smu_v13_0_7_restore_user_od_settings +ffffffff825b10a0 t smu_v13_0_7_get_power_profile_mode +ffffffff825b1200 t smu_v13_0_7_set_power_profile_mode +ffffffff825b1470 t smu_v13_0_7_read_sensor +ffffffff825b16e0 t smu_v13_0_7_is_dpm_running +ffffffff825b1730 t smu_v13_0_7_get_fan_speed_pwm +ffffffff825b1820 t smu_v13_0_7_get_fan_speed_rpm +ffffffff825b1890 t smu_v13_0_7_get_thermal_temperature_range +ffffffff825b1990 t smu_v13_0_7_set_default_od_settings +ffffffff825b1af0 t smu_v13_0_7_dump_pptable +ffffffff825b1b20 t smu_v13_0_7_get_power_limit +ffffffff825b1c10 t smu_v13_0_7_set_df_cstate +ffffffff825b1c30 t smu_v13_0_7_init_smc_tables +ffffffff825b1e50 t smu_v13_0_7_check_fw_status +ffffffff825b1eb0 t smu_v13_0_7_set_mp1_state +ffffffff825b1ef0 t smu_v13_0_7_setup_pptable +ffffffff825b2060 t smu_v13_0_7_baco_enter +ffffffff825b20d0 t smu_v13_0_7_baco_exit +ffffffff825b2140 t smu_v13_0_7_is_mode1_reset_supported +ffffffff825b2180 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff825b22b0 t smu_v13_0_7_get_gpu_metrics +ffffffff825b2700 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff825b3000 T yellow_carp_set_ppt_funcs +ffffffff825b3050 t yellow_carp_set_default_dpm_tables +ffffffff825b3080 t yellow_carp_print_clk_levels +ffffffff825b3100 t yellow_carp_force_clk_levels +ffffffff825b33e0 t yellow_carp_od_edit_dpm_table +ffffffff825b36f0 t yellow_carp_dpm_set_vcn_enable +ffffffff825b3710 t yellow_carp_dpm_set_jpeg_enable +ffffffff825b3730 t yellow_carp_read_sensor +ffffffff825b3b00 t yellow_carp_is_dpm_running +ffffffff825b3b60 t yellow_carp_set_watermarks_table +ffffffff825b3cf0 t yellow_carp_set_performance_level +ffffffff825b48f0 t yellow_carp_init_smc_tables +ffffffff825b4a90 t yellow_carp_fini_smc_tables +ffffffff825b4b60 t yellow_carp_system_features_control +ffffffff825b4bb0 t yellow_carp_get_gfxoff_status +ffffffff825b4c40 t yellow_carp_mode2_reset +ffffffff825b4cd0 t yellow_carp_get_dpm_ultimate_freq +ffffffff825b5120 t yellow_carp_get_gpu_metrics +ffffffff825b52f0 t yellow_carp_post_smu_init +ffffffff825b5380 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff825b53e0 t yellow_carp_get_current_clk_freq +ffffffff825b54f0 t yellow_carp_get_dpm_profile_freq +ffffffff825b6000 T smu_cmn_send_msg_without_waiting +ffffffff825b61b0 T smu_cmn_wait_for_response +ffffffff825b6300 T smu_cmn_send_smc_msg_with_param +ffffffff825b6690 T smu_cmn_to_asic_specific_index +ffffffff825b67c0 t __smu_cmn_reg_print_error +ffffffff825b6a20 T smu_cmn_send_smc_msg +ffffffff825b6a40 T smu_cmn_send_debug_smc_msg +ffffffff825b6ae0 T smu_cmn_send_debug_smc_msg_with_param +ffffffff825b6b80 T smu_cmn_feature_is_supported +ffffffff825b6c30 T smu_cmn_feature_is_enabled +ffffffff825b6d30 T smu_cmn_clk_dpm_is_enabled +ffffffff825b6e40 T smu_cmn_get_enabled_mask +ffffffff825b6f40 T smu_cmn_get_indep_throttler_status +ffffffff825b6ff0 T smu_cmn_feature_update_enable_state +ffffffff825b70b0 T smu_cmn_feature_set_enabled +ffffffff825b7190 T smu_cmn_get_pp_feature_mask +ffffffff825b7340 T smu_cmn_set_pp_feature_mask +ffffffff825b7470 T smu_cmn_disable_all_features_with_exception +ffffffff825b7530 T smu_cmn_get_smc_version +ffffffff825b7620 T smu_cmn_update_table +ffffffff825b77b0 T smu_cmn_write_watermarks_table +ffffffff825b7890 T smu_cmn_write_pptable +ffffffff825b7970 T smu_cmn_get_metrics_table +ffffffff825b7ae0 T smu_cmn_get_combo_pptable +ffffffff825b7bd0 T smu_cmn_init_soft_gpu_metrics +ffffffff825b7cd0 T smu_cmn_set_mp1_state +ffffffff825b7d80 T smu_cmn_is_audio_func_enabled +ffffffff825b8000 T pci_mcfg_init +ffffffff825b8050 T pci_lookup_segment +ffffffff825b80b0 T pci_attach_hook +ffffffff825b80e0 T pci_bus_maxdevs +ffffffff825b8110 T pci_make_tag +ffffffff825b8190 T pci_decompose_tag +ffffffff825b81f0 T pci_conf_size +ffffffff825b8250 T pci_mcfg_map_bus +ffffffff825b82e0 T pci_conf_read +ffffffff825b8450 T pci_conf_write +ffffffff825b85a0 T pci_msix_table_map +ffffffff825b86f0 T pci_msix_table_unmap +ffffffff825b87a0 T msi_hwmask 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vm86_emu_inb +ffffffff825bb3e0 t vm86_emu_inw +ffffffff825bb420 t vm86_emu_inl +ffffffff825bb460 t vm86_emu_outb +ffffffff825bb4b0 t vm86_emu_outw +ffffffff825bb4f0 t vm86_emu_outl +ffffffff825bb530 T vga_post_call +ffffffff825bb5b0 T vga_post_free +ffffffff825bb640 T ddb_vgapost +ffffffff825bc000 T pchbmatch +ffffffff825bc040 T pchbattach +ffffffff825bc570 T pchbactivate +ffffffff825bc5f0 T pchb_amd64ht_attach +ffffffff825bc750 T pchb_rnd +ffffffff825bc7e0 T pchb_print +ffffffff825bd000 T amas_match +ffffffff825bd060 T amas_attach +ffffffff825bd0c0 T amas_intl_nodes +ffffffff825bd160 T amas_get_pagerange +ffffffff825be000 T agp_flush_cache +ffffffff825bf000 T cardslotmatch +ffffffff825bf050 T cardslotattach +ffffffff825bf320 T cardslot_event +ffffffff825bf380 T cardslot_cb_print +ffffffff825bf3e0 T cardslot_16_print +ffffffff825bf430 T cardslot_16_submatch +ffffffff825bf480 T cardslot_event_throw +ffffffff825bf540 T cardslot_process_event +ffffffff825c0000 T cardbusmatch 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com_cardbus_match +ffffffff825c5080 T com_cardbus_attach +ffffffff825c5250 T com_cardbus_detach +ffffffff825c5300 T com_cardbus_find_csdev +ffffffff825c5480 T com_cardbus_gofigure +ffffffff825c5980 T com_cardbus_enable +ffffffff825c5a80 T com_cardbus_disable +ffffffff825c5ad0 T com_cardbus_setup +ffffffff825c6000 T xl_cardbus_match +ffffffff825c6080 T xl_cardbus_attach +ffffffff825c6480 T xl_cardbus_detach +ffffffff825c6550 T xl_cardbus_lookup +ffffffff825c6600 T xl_cardbus_intr_ack +ffffffff825c7000 T dc_cardbus_match +ffffffff825c7030 T dc_cardbus_attach +ffffffff825c7450 T dc_cardbus_detach +ffffffff825c7500 T dc_cardbus_setup +ffffffff825c8000 T fxp_cardbus_match +ffffffff825c8030 T fxp_cardbus_attach +ffffffff825c8290 T fxp_cardbus_detach +ffffffff825c8340 T fxp_cardbus_setup +ffffffff825c9000 t rl_cardbus_match +ffffffff825c9030 t rl_cardbus_attach +ffffffff825c9220 t rl_cardbus_detach +ffffffff825c92e0 T rl_cardbus_setup +ffffffff825ca000 T re_cardbus_probe +ffffffff825ca030 T re_cardbus_attach +ffffffff825ca280 T re_cardbus_detach +ffffffff825ca320 T re_cardbus_setup +ffffffff825cb000 T ath_cardbus_match +ffffffff825cb060 T ath_cardbus_attach +ffffffff825cb1c0 T ath_cardbus_detach +ffffffff825cb2a0 T ath_cardbus_enable +ffffffff825cb3a0 T ath_cardbus_disable +ffffffff825cb400 T ath_cardbus_power +ffffffff825cb440 T ath_cardbus_setup +ffffffff825cc000 T athn_cardbus_match +ffffffff825cc030 T athn_cardbus_attach +ffffffff825cc1a0 T athn_cardbus_detach +ffffffff825cc250 T athn_cardbus_enable +ffffffff825cc350 T athn_cardbus_disable +ffffffff825cc3b0 T athn_cardbus_power +ffffffff825cc3f0 T athn_cardbus_read +ffffffff825cc420 T athn_cardbus_write +ffffffff825cc450 T athn_cardbus_write_barrier +ffffffff825cc480 T athn_cardbus_setup +ffffffff825cd000 T atw_cardbus_match +ffffffff825cd030 T atw_cardbus_attach +ffffffff825cd260 T atw_cardbus_detach +ffffffff825cd330 T atw_cardbus_enable +ffffffff825cd430 T atw_cardbus_disable +ffffffff825cd490 T atw_cardbus_power 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pgt_cardbus_match +ffffffff825d1030 T pgt_cardbus_attach +ffffffff825d1290 T pgt_cardbus_detach +ffffffff825d1350 T pgt_cardbus_enable +ffffffff825d1500 T pgt_cardbus_disable +ffffffff825d1560 T pgt_cardbus_power +ffffffff825d15c0 T pgt_cardbus_setup +ffffffff825d2000 T ehci_cardbus_match +ffffffff825d2040 T ehci_cardbus_attach +ffffffff825d2360 T ehci_cardbus_detach +ffffffff825d3000 T ohci_cardbus_match +ffffffff825d3040 T ohci_cardbus_attach +ffffffff825d3360 T ohci_cardbus_detach +ffffffff825d4000 T uhci_cardbus_match +ffffffff825d4040 T uhci_cardbus_attach +ffffffff825d43d0 T uhci_cardbus_detach +ffffffff825d5000 T malo_cardbus_match +ffffffff825d5030 T malo_cardbus_attach +ffffffff825d52f0 T malo_cardbus_detach +ffffffff825d53e0 T malo_cardbus_enable +ffffffff825d55b0 T malo_cardbus_disable +ffffffff825d5610 T malo_cardbus_setup +ffffffff825d6000 T bwi_cardbus_match +ffffffff825d6030 T bwi_cardbus_attach +ffffffff825d6310 T bwi_cardbus_detach +ffffffff825d63d0 T bwi_cardbus_enable +ffffffff825d6580 T bwi_cardbus_disable +ffffffff825d65e0 T bwi_cardbus_setup +ffffffff825d66a0 T bwi_cardbus_conf_read +ffffffff825d66d0 T bwi_cardbus_conf_write +ffffffff825d7000 T rbus_pccbb_parent_mem +ffffffff825d7060 T rbus_pccbb_parent_io +ffffffff825d70d0 T pccbb_attach_hook +ffffffff825d8000 T pcmcia_match +ffffffff825d8060 T pcmcia_attach +ffffffff825d80f0 T pcmcia_activate +ffffffff825d81c0 T pcmcia_ccr_read +ffffffff825d8220 T pcmcia_ccr_write +ffffffff825d8290 T pcmcia_card_attach +ffffffff825d84c0 T pcmcia_print +ffffffff825d8790 T pcmcia_submatch +ffffffff825d87e0 T pcmcia_card_detach +ffffffff825d88a0 T pcmcia_card_deactivate +ffffffff825d8910 T pcmcia_card_gettype +ffffffff825d8970 T pcmcia_function_init +ffffffff825d89d0 T pcmcia_function_enable +ffffffff825d8e50 T pcmcia_function_disable +ffffffff825d8f80 T pcmcia_io_map +ffffffff825d91f0 T pcmcia_intr_establish +ffffffff825d94b0 T pcmcia_card_intr +ffffffff825d95f0 T pcmcia_intr_disestablish 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com_pcmcia_attach +ffffffff825e35c0 T com_pcmcia_detach +ffffffff825e3670 T com_pcmcia_activate +ffffffff825e3750 T com_pcmcia_enable1 +ffffffff825e3810 T com_pcmcia_enable +ffffffff825e3930 T com_pcmcia_disable +ffffffff825e3970 T com_pcmcia_disable1 +ffffffff825e4000 t wdc_pcmcia_match +ffffffff825e40f0 t wdc_pcmcia_attach +ffffffff825e4630 T wdc_pcmcia_detach +ffffffff825e4750 T wdc_pcmcia_activate +ffffffff825e4890 T wdc_pcmcia_disk_device_interface_callback +ffffffff825e4940 T wdc_pcmcia_disk_device_interface +ffffffff825e49b0 T wdc_pcmcia_lookup +ffffffff825e5000 T sm_pcmcia_match +ffffffff825e5100 T sm_pcmcia_attach +ffffffff825e5370 T sm_pcmcia_detach +ffffffff825e5430 T sm_pcmcia_activate +ffffffff825e54d0 T sm_pcmcia_funce_enaddr +ffffffff825e54f0 T sm_pcmcia_ascii_enaddr +ffffffff825e5600 T sm_pcmcia_lannid_ciscallback +ffffffff825e5760 T sm_pcmcia_enable +ffffffff825e5810 T sm_pcmcia_disable +ffffffff825e6000 T xe_pcmcia_match +ffffffff825e6050 T xe_pcmcia_attach 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cmalo_cmd_set_rate +ffffffff825ef750 T cmalo_cmd_set_snmp +ffffffff825ef910 T cmalo_cmd_set_macaddr +ffffffff825efac0 T cmalo_wep +ffffffff825efb70 T cmalo_cmd_set_reset +ffffffff825efcb0 T cmalo_select_network +ffffffff825efe00 T cmalo_cmd_set_auth +ffffffff825efee0 T cmalo_cmd_set_assoc +ffffffff825f02c0 T cmalo_reflect_network +ffffffff825f03d0 T cmalo_tx_done +ffffffff825f0490 T cmalo_rx +ffffffff825f06e0 T cmalo_cmd_response +ffffffff825f0970 T cmalo_event +ffffffff825f09f0 T cmalo_tx +ffffffff825f0c40 T cmalo_cmd_set_wep +ffffffff825f0ef0 T cmalo_rate2bitmap +ffffffff825f0f30 T cmalo_hexdump +ffffffff825f0f60 T cmalo_cmd_request +ffffffff825f1100 T cmalo_cmd_rsp_hwspec +ffffffff825f1170 T cmalo_cmd_rsp_scan +ffffffff825f13a0 T cmalo_parse_elements +ffffffff825f14a0 T cmalo_cmd_rsp_assoc +ffffffff825f14e0 T cmalo_cmd_set_80211d +ffffffff825f1600 T cmalo_cmd_set_bgscan_config +ffffffff825f17a0 T cmalo_cmd_set_bgscan_query +ffffffff825f2000 T an_pcmcia_match +ffffffff825f2060 T an_pcmcia_attach +ffffffff825f22a0 T an_pcmcia_detach +ffffffff825f2350 T an_pcmcia_activate +ffffffff825f3000 T pcibmatch +ffffffff825f30c0 T pcibattach +ffffffff825f3100 T pcib_callback +ffffffff825f3180 T pcib_print +ffffffff825f4000 T amdpcib_match +ffffffff825f4060 T amdpcib_attach +ffffffff825f41c0 T amdpcib_get_timecount +ffffffff825f5000 T tcpcib_match +ffffffff825f5060 T tcpcib_attach +ffffffff825f53c0 T tcpcib_activate +ffffffff825f5710 T tcpcib_wdt_init +ffffffff825f5890 T tcpcib_wdt_start +ffffffff825f58c0 T tcpcib_wdt_stop +ffffffff825f5960 T tcpcib_hpet_get_timecount +ffffffff825f5990 T tcpcib_wdt_cb +ffffffff825f6000 T aapic_match +ffffffff825f6040 T aapic_attach +ffffffff825f7000 T hme_config +ffffffff825f75a0 T hme_stop +ffffffff825f7840 T hme_start +ffffffff825f7bd0 T hme_ioctl +ffffffff825f7dc0 T hme_watchdog +ffffffff825f7e30 t hme_mii_readreg +ffffffff825f8000 t hme_mii_writereg +ffffffff825f81d0 t hme_mii_statchg +ffffffff825f8270 T hme_mediachange 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fd_nvtotype +ffffffff825ffa30 T fdstart +ffffffff825ffaf0 T fdfinish +ffffffff825ffc50 T fdread +ffffffff825ffc80 T fdwrite +ffffffff825ffcb0 T fd_set_motor +ffffffff825ffd70 T fdintr +ffffffff82600cc0 T fdopen +ffffffff82600f30 T fdclose +ffffffff82600fc0 T fdsize +ffffffff82600ff0 T fddump +ffffffff82601020 T fdretry +ffffffff826011e0 T fdioctl +ffffffff82601720 T fdformat +ffffffff82602000 T com_isa_probe +ffffffff826020e0 T com_isa_attach +ffffffff82603000 T pckbc_isa_match +ffffffff82603230 T pckbc_isa_attach +ffffffff82603430 T pckbc_isa_activate +ffffffff82604000 T vga_isa_match +ffffffff82604100 T vga_isa_attach +ffffffff82604150 T vga_isa_cnattach +ffffffff82605000 T wdc_isa_probe +ffffffff82605150 T wdc_isa_attach +ffffffff826053c0 t wdc_isa_dma_init +ffffffff82605440 t wdc_isa_dma_start +ffffffff82605470 t wdc_isa_dma_finish +ffffffff82606000 T mpu_open +ffffffff826061b0 T mpu_close +ffffffff826062f0 T mpu_output +ffffffff82606430 T mpu_getinfo +ffffffff82606470 T mpu_find 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schsio_hwm_init +ffffffff8260ca00 T schsio_hwm_update +ffffffff8260d080 T schsio_hwm_read +ffffffff8260d0d0 T schsio_wdt_cb +ffffffff8260e000 T lm_isa_match +ffffffff8260e220 T lm_isa_attach +ffffffff8260e430 T lm_wbsio_match +ffffffff8260e670 T lm_isa_writereg +ffffffff8260e6e0 T lm_isa_readreg +ffffffff8260e740 T lm_isa_remove_alias +ffffffff8260f000 T it_match +ffffffff8260f380 T it_enter +ffffffff8260f420 T it_readreg +ffffffff8260f470 T it_writereg +ffffffff8260f4d0 T it_exit +ffffffff8260f520 T it_attach +ffffffff8260fd60 T it_wdog_cb +ffffffff82610080 T it_ec_refresh +ffffffff82610780 T it_ec_writereg +ffffffff826107e0 T it_ec_readreg +ffffffff82610830 T it_activate +ffffffff82611000 T uguru_refresh_temp +ffffffff826110f0 T uguru_refresh_volt +ffffffff826111a0 T uguru_refresh_fan +ffffffff82611280 T uguru_match +ffffffff82611460 T uguru_attach +ffffffff82611b00 T uguru_read_multi +ffffffff82611c10 T uguru_ac5_read +ffffffff82611ef0 T uguru_read_sensor +ffffffff826122a0 T uguru_ac5_read_sensor +ffffffff82612340 T uguru_refresh +ffffffff826123d0 T uguru_write_multi +ffffffff82613000 T aps_match +ffffffff82613130 T aps_attach +ffffffff826134b0 T aps_activate +ffffffff82613570 T aps_do_io +ffffffff82613790 T aps_init +ffffffff82613900 T aps_refresh +ffffffff82613930 T aps_read_data +ffffffff82613a20 T aps_refresh_sensor_data +ffffffff82614000 T _isa_bus_dmamap_create +ffffffff82614180 T _isa_bus_dmamap_destroy +ffffffff82614250 T _isa_bus_dmamap_load +ffffffff82614520 T _isa_bus_dmamap_load_mbuf +ffffffff82614540 T _isa_bus_dmamap_load_uio +ffffffff82614560 T _isa_bus_dmamap_load_raw +ffffffff82614580 T _isa_bus_dmamap_unload +ffffffff82614650 T _isa_bus_dmamap_sync +ffffffff82614760 T _isa_bus_dmamem_alloc +ffffffff82614820 T isa_intr_alloc +ffffffff82614910 T isa_intr_check +ffffffff82614980 T isa_intr_establish +ffffffff82614a70 T isa_intr_disestablish +ffffffff82614a90 T isa_attach_hook +ffffffff82614b00 T _isa_dma_alloc_bouncebuf +ffffffff82614c00 T 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iommu_set_rtaddr +ffffffff827d2ac0 T iommu_write_8 +ffffffff827d2af0 T iommu_write_4 +ffffffff827d2b20 T iommu_read_4 +ffffffff827d2b40 T iommu_alloc_hwdte +ffffffff827d2cb0 T iommu_issue_qi +ffffffff827d2ce0 T iommu_flush_tlb_qi +ffffffff827d2d10 T iommu_flush_ctx_qi +ffffffff827d2d40 T ivhd_invalidate_domain +ffffffff827d2db0 T iommu_read_8 +ffffffff827d2dd0 T iommu_flush_ctx +ffffffff827d2f00 T iommu_enable_qi +ffffffff827d3050 T iommu_showcfg +ffffffff827d32b0 T iommu_init +ffffffff827d3680 T acpidmar_intr_establish +ffffffff827d37a0 T acpidmar_intr +ffffffff827d3970 T acpidmar_match_devscope +ffffffff827d3ad0 T domain_create +ffffffff827d3d50 t dmar_dmamap_create +ffffffff827d3d70 t dmar_dmamap_destroy +ffffffff827d3d80 t dmar_dmamap_load +ffffffff827d3df0 t dmar_dmamap_load_mbuf +ffffffff827d3e60 t dmar_dmamap_load_uio +ffffffff827d3ed0 t dmar_dmamap_load_raw +ffffffff827d3f40 t dmar_dmamap_unload +ffffffff827d3f80 t dmar_dmamap_sync +ffffffff827d3fa0 t dmar_dmamem_alloc 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ivhd_invalidate_iommu_all +ffffffff827d6d30 T ivhd_invalidate_interrupt_table +ffffffff827d6e50 T ivhd_showreg +ffffffff827d6fe0 T ivhd_checkerr +ffffffff827d7280 T ivhd_iommu_init +ffffffff827d7840 T acpiivrs_ivhd +ffffffff827d78c0 T acpiivrs_init +ffffffff827d7a10 T acpidmar_msi_hwmask +ffffffff827d7ab0 T acpidmar_msi_hwunmask +ffffffff827d7b40 T acpidmar_msi_addroute +ffffffff827d7c20 T acpidmar_msi_delroute +ffffffff827d7c40 T iommu_showfault +ffffffff827d7e10 T iommu_showpte +ffffffff827d8000 T acpidock_match +ffffffff827d8070 T acpidock_attach +ffffffff827d8410 T acpidock_status +ffffffff827d84a0 T acpidock_docklock +ffffffff827d8590 T acpidock_dockctl +ffffffff827d8680 T acpidock_foundejd +ffffffff827d8750 T acpidock_notify +ffffffff827d8cc0 T acpidock_eject +ffffffff827d8dc0 T acpidock_walkchildren +ffffffff827d9000 T abl_match +ffffffff827d9030 T abl_attach +ffffffff827d9280 T abl_get_brightness +ffffffff827d9320 T abl_get_param +ffffffff827d9380 T abl_set_param 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thinkpad_enable_events +ffffffff827ddd70 T thinkpad_get_kbd_backlight +ffffffff827dde00 T thinkpad_set_kbd_backlight +ffffffff827ddee0 T thinkpad_get_param +ffffffff827ddf40 T thinkpad_set_param +ffffffff827de000 T thinkpad_battery_setchargestart +ffffffff827de150 T thinkpad_battery_setchargestop +ffffffff827de2c0 T thinkpad_battery_setchargemode +ffffffff827de8e0 T thinkpad_hotkey +ffffffff827defa0 T thinkpad_brightness_up +ffffffff827df170 T thinkpad_brightness_down +ffffffff827df330 T thinkpad_toggle_bluetooth +ffffffff827df460 T thinkpad_volume_mute +ffffffff827df520 T thinkpad_volume_down +ffffffff827df5e0 T thinkpad_volume_up +ffffffff827df6a0 T thinkpad_get_thinklight +ffffffff827df6f0 T thinkpad_adaptive_change +ffffffff827df820 T thinkpad_get_brightness +ffffffff827df860 T thinkpad_toggle_wan +ffffffff827df990 T thinkpad_cmos +ffffffff827dfa50 T thinkpad_set_brightness +ffffffff827dfb50 T thinkpad_set_thinklight +ffffffff827dfc10 T thinkpad_battery_inhibit_charge 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acpisony_find_offset +ffffffff827e28e0 T acpisony_set_hotkey +ffffffff827e2b00 T acpisony_brightness_down +ffffffff827e2c40 T acpisony_get_brightness +ffffffff827e2ce0 T acpisony_set_brightness +ffffffff827e3000 T acpivideo_match +ffffffff827e3070 T acpivideo_attach +ffffffff827e31f0 T acpivideo_getpcibus +ffffffff827e3230 T acpivideo_notify +ffffffff827e32a0 T acpivideo_set_policy +ffffffff827e3380 T acpi_foundvout +ffffffff827e3460 T acpivideo_print +ffffffff827e4000 T acpivout_match +ffffffff827e4070 T acpivout_attach +ffffffff827e4200 T acpivout_notify +ffffffff827e42e0 T acpivout_get_bcl +ffffffff827e4440 T acpivout_get_brightness +ffffffff827e4500 T acpivout_get_param +ffffffff827e45a0 T acpivout_set_param +ffffffff827e4710 T acpivout_select_brightness +ffffffff827e47e0 T acpivout_find_brightness +ffffffff827e4870 T acpivout_set_brightness +ffffffff827e5000 T acpipwrres_match +ffffffff827e5070 T acpipwrres_attach +ffffffff827e5310 T acpipwrres_foundcons +ffffffff827e54d0 T acpipwrres_ref_incr +ffffffff827e5580 T acpipwrres_hascons +ffffffff827e55d0 T acpipwrres_ref_decr +ffffffff827e5670 T acpipwrres_addcons +ffffffff827e6000 T aibs_match +ffffffff827e6030 T aibs_attach +ffffffff827e6190 T aibs_probe +ffffffff827e6320 T aibs_attach_new +ffffffff827e6450 T aibs_attach_sif +ffffffff827e6630 T aibs_notify +ffffffff827e66a0 T aibs_add_sensor +ffffffff827e6940 T aibs_getpack +ffffffff827e69d0 T aibs_refresh +ffffffff827e6a40 T aibs_refresh_r +ffffffff827e6b90 T aibs_getvalue +ffffffff827e6cf0 T aibs_find_cb +ffffffff827e7000 T aplgpio_match +ffffffff827e7060 T aplgpio_attach +ffffffff827e7390 T aplgpio_intr +ffffffff827e7500 T aplgpio_read_pin +ffffffff827e7560 T aplgpio_write_pin +ffffffff827e75e0 T aplgpio_intr_establish +ffffffff827e7720 T aplgpio_intr_enable +ffffffff827e77b0 T aplgpio_intr_disable +ffffffff827e8000 T bytgpio_match +ffffffff827e8060 T bytgpio_attach +ffffffff827e83a0 T bytgpio_intr +ffffffff827e84f0 T bytgpio_read_pin +ffffffff827e8560 T bytgpio_write_pin +ffffffff827e85f0 T bytgpio_intr_establish +ffffffff827e8670 T bytgpio_intr_enable +ffffffff827e8760 T bytgpio_intr_disable +ffffffff827e9000 T chvgpio_match +ffffffff827e9060 T chvgpio_attach +ffffffff827e9380 T chvgpio_intr +ffffffff827e9470 T chvgpio_read_pin +ffffffff827e9520 T chvgpio_write_pin +ffffffff827e95f0 T chvgpio_intr_establish +ffffffff827e97e0 T chvgpio_intr_enable +ffffffff827e98c0 T chvgpio_intr_disable +ffffffff827e99a0 T chvgpio_opreg_handler +ffffffff827e9a40 T chvgpio_check_pin +ffffffff827ea000 T glkgpio_match +ffffffff827ea060 T glkgpio_attach +ffffffff827ea390 T glkgpio_intr +ffffffff827ea500 T glkgpio_read_pin +ffffffff827ea560 T glkgpio_write_pin +ffffffff827ea5e0 T glkgpio_intr_establish +ffffffff827ea720 T glkgpio_intr_enable +ffffffff827ea7b0 T glkgpio_intr_disable +ffffffff827eb000 T pchgpio_match +ffffffff827eb060 T pchgpio_attach +ffffffff827eb660 T pchgpio_activate +ffffffff827eb710 T pchgpio_intr +ffffffff827eb960 T pchgpio_read_pin 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ccpmic_thermal_opreg_handler +ffffffff827ef890 T ccpmic_power_opreg_handler +ffffffff827efad0 T ccpmic_read_1 +ffffffff827efbc0 T ccpmic_write_1 +ffffffff827efca0 T ccpmic_raw_to_temp +ffffffff827f0000 T com_acpi_match +ffffffff827f0150 T com_acpi_attach +ffffffff827f0440 T com_acpi_is_designware +ffffffff827f04c0 T com_acpi_intr_designware +ffffffff827f0500 T com_acpi_is_console +ffffffff827f1000 T sdhc_acpi_match +ffffffff827f1060 T sdhc_acpi_attach +ffffffff827f1400 T sdhc_acpi_parse_resources +ffffffff827f14b0 T sdhc_acpi_card_detect_gpio +ffffffff827f1510 T sdhc_acpi_card_detect_intr +ffffffff827f1560 T sdhc_acpi_power_on +ffffffff827f15f0 T sdhc_acpi_explore +ffffffff827f1620 T sdhc_acpi_card_detect_nonremovable +ffffffff827f1650 T sdhc_acpi_do_explore +ffffffff827f2000 T dwiic_acpi_match +ffffffff827f2050 T dwiic_acpi_attach +ffffffff827f24f0 T dwiic_acpi_parse_crs +ffffffff827f2650 T dwiic_acpi_power +ffffffff827f2780 T dwiic_acpi_get_params +ffffffff827f2900 T dwiic_i2c_intr_establish +ffffffff827f2990 T dwiic_i2c_intr_disestablish +ffffffff827f29b0 T dwiic_i2c_intr_string +ffffffff827f2a40 T dwiic_acpi_acquire_bus +ffffffff827f2aa0 T dwiic_acpi_release_bus +ffffffff827f2ae0 T dwiic_acpi_bus_scan +ffffffff827f2b20 T dwiic_acpi_found_hid +ffffffff827f2f10 T dwiic_matchhids +ffffffff827f2fa0 T dwiic_acpi_found_ihidev +ffffffff827f3280 T dwiic_acpi_found_iatp +ffffffff827f3400 T dwiic_acpi_found_ietp +ffffffff827f4000 T acpicbkbd_match +ffffffff827f4030 T acpicbkbd_attach +ffffffff827f40e0 T acpicbkbd_activate +ffffffff827f4140 T acpicbkbd_get_backlight +ffffffff827f41c0 T acpicbkbd_set_backlight +ffffffff827f4270 T acpicbkbd_write_backlight +ffffffff827f5000 T acpials_match +ffffffff827f5090 T acpials_attach +ffffffff827f5280 T acpials_read +ffffffff827f5310 T acpials_addtask +ffffffff827f5350 T acpials_notify +ffffffff827f53e0 T acpials_update +ffffffff827f6000 T tpm_match +ffffffff827f6050 T tpm_attach +ffffffff827f63a0 T tpm_activate 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acpi_smbus_read +ffffffff827fb000 T surface_match +ffffffff827fb060 T surface_attach +ffffffff827fb0c0 T surface_hotkey +ffffffff827fc000 T ipmi_acpi_match +ffffffff827fc030 T ipmi_acpi_attach +ffffffff827fc2b0 T ipmi_acpi_parse_crs +ffffffff827fd000 T amdgpio_match +ffffffff827fd060 T amdgpio_attach +ffffffff827fd330 T amdgpio_activate +ffffffff827fd430 T amdgpio_intr +ffffffff827fd610 T amdgpio_read_pin +ffffffff827fd670 T amdgpio_write_pin +ffffffff827fd6f0 T amdgpio_intr_establish +ffffffff827fd7f0 T amdgpio_intr_enable +ffffffff827fd880 T amdgpio_intr_disable +ffffffff827fd910 T amdgpio_save +ffffffff827fd9a0 T amdgpio_restore +ffffffff827fda40 T amdgpio_save_pin +ffffffff827fdab0 T amdgpio_restore_pin +ffffffff827fdb20 T amdgpio_pin_intr +ffffffff827fe000 T acpihid_match +ffffffff827fe030 T acpihid_attach +ffffffff827fe270 T acpihid_init_dsm +ffffffff827fe400 T acpihid_eval +ffffffff827fe650 T acpihid_notify +ffffffff827fe6c0 T acpihid_button_array_enable +ffffffff827ff000 t iosf_acpi_match +ffffffff827ff050 t iosf_acpi_attach +ffffffff827ff170 t iosf_acpi_mbi_mdr_rd +ffffffff827ff1f0 t iosf_acpi_mbi_mdr_wr +ffffffff82800000 T intelpmc_match +ffffffff82800030 T intelpmc_attach +ffffffff82800110 T intelpmc_activate +ffffffff82800320 T intelpmc_parse_lpit +ffffffff82800490 T intelpmc_suspend +ffffffff82800840 T intelpmc_resume +ffffffff82800bf0 T intelpmc_dsm +ffffffff82801000 T acpi_match +ffffffff82801070 T acpi_attach +ffffffff828010b0 T acpi_probe +ffffffff828012a0 T acpi_map +ffffffff828013b0 T acpi_unmap +ffffffff82801400 T acpi_bus_space_map +ffffffff82801420 T acpi_bus_space_unmap +ffffffff82801440 T acpi_intr_establish +ffffffff828015a0 T acpi_intr_disestablish +ffffffff828015b0 T acpi_scan +ffffffff82801780 T acpi_acquire_glk +ffffffff828017e0 T acpi_release_glk +ffffffff82801830 T acpi_attach_machdep +ffffffff82801a10 T acpi_sleep_cpu +ffffffff82801bd0 T acpi_resume_cpu +ffffffff82801d20 T sleep_mp +ffffffff82801e20 T resume_mp +ffffffff82801f20 T acpi_iommu_device_map +ffffffff82802000 T hibernate_resume_machdep +ffffffff82802050 T hibernate_drop_to_real_mode +ffffffff82802060 T hibernate_activate_resume_pt_machdep +ffffffff828020a0 T hibernate_switch_stack_machdep +ffffffff828020e0 T hibernate_flush +ffffffff82802110 T acpi_savecpu +ffffffff82803000 T sleep_showstate +ffffffff82803120 T sleep_setstate +ffffffff82803180 T gosleep +ffffffff82803350 T sleep_resume +ffffffff828033e0 T suspend_finish +ffffffff82804000 T acpiopen +ffffffff828040d0 T acpiclose +ffffffff82804170 T acpiioctl +ffffffff82804300 T request_sleep +ffffffff82804390 T acpi_filtdetach +ffffffff828043f0 T acpi_filtread +ffffffff82804430 T acpikqfilter +ffffffff82805000 T acpipci_match +ffffffff82805030 T acpipci_attach +ffffffff82805370 T acpipci_osc +ffffffff828054e0 T acpipci_parse_resources +ffffffff82805610 T acpipci_attach_bus +ffffffff82805820 T acpipci_print +ffffffff828058a0 T acpipci_attach_busses +ffffffff82806000 T efiopen +ffffffff82806040 T eficlose +ffffffff82806070 T efiioctl +ffffffff82806110 T efiioc_get_table +ffffffff82806280 T efiioc_var_get +ffffffff82806530 T efiioc_var_next +ffffffff82806760 T efiioc_var_set +ffffffff82806a10 T efi_adapt_error +ffffffff82807000 T efi_match +ffffffff82807070 T efi_attach +ffffffff82807390 T efi_map_runtime +ffffffff82807520 T efi_enter +ffffffff828075d0 T efi_leave +ffffffff82807660 T efi_fault +ffffffff82808000 T vmm_probe +ffffffff82808060 T vmm_attach +ffffffff828081b0 T vmm_activate +ffffffff82808340 T vmmopen +ffffffff82808390 T vmmclose +ffffffff828083c0 T vm_find +ffffffff82808500 T vmmioctl +ffffffff82808840 T vm_create +ffffffff82808bb0 T vm_get_info +ffffffff82808e60 T vm_terminate +ffffffff82809010 T vm_resetcpu +ffffffff82809140 T vm_share_mem +ffffffff828092b0 T pledge_ioctl_vmm +ffffffff828093a0 T vm_find_vcpu +ffffffff82809400 T vm_create_check_mem_ranges +ffffffff828095c0 T vm_teardown +ffffffff82809740 T vcpu_must_stop +ffffffff8280a000 T vmm_enabled +ffffffff8280a080 T vmm_attach_machdep +ffffffff8280a260 T vmm_quiesce_vmx +ffffffff8280a470 T vmm_activate_machdep +ffffffff8280a510 T vmm_stop +ffffffff8280a680 T vmm_start +ffffffff8280a7a0 T vmmioctl_machdep +ffffffff8280a890 T vm_intr_pending +ffffffff8280a950 T vm_mprotect_ept +ffffffff8280ac10 T pledge_ioctl_vmm_machdep +ffffffff8280ac60 T vm_rwvmparams +ffffffff8280ae10 T vmm_init_pvclock +ffffffff8280aef0 T vm_rwregs +ffffffff8280b030 T vcpu_readregs_vmx +ffffffff8280b510 T vcpu_writeregs_vmx +ffffffff8280ba50 T vcpu_readregs_svm +ffffffff8280bf00 T vcpu_writeregs_svm +ffffffff8280c3d0 T vmm_get_guest_memtype +ffffffff8280c450 T vmx_mprotect_ept +ffffffff8280c710 T vmx_pmap_find_pte_ept +ffffffff8280c7e0 T start_vmm_on_cpu +ffffffff8280c920 T stop_vmm_on_cpu +ffffffff8280c9c0 T vmclear_on_cpu +ffffffff8280ca40 T vm_impl_init +ffffffff8280cbd0 T vm_impl_deinit +ffffffff8280cc00 T vcpu_reload_vmcs_vmx +ffffffff8280cd80 T vcpu_reset_regs_svm +ffffffff8280d050 T svm_setmsrbrw +ffffffff8280d160 T svm_setmsrbr +ffffffff8280d230 T svm_setmsrbw +ffffffff8280d310 T vmx_setmsrbr +ffffffff8280d3c0 T vmx_setmsrbw +ffffffff8280d470 T vmx_setmsrbrw +ffffffff8280d580 T svm_set_clean +ffffffff8280d5d0 T svm_set_dirty +ffffffff8280d620 T vcpu_reset_regs_vmx +ffffffff8280e090 T vcpu_vmx_check_cap +ffffffff8280e190 T vcpu_vmx_compute_ctrl +ffffffff8280e370 T vcpu_init_vmx +ffffffff8280e8a0 T vmm_alloc_vpid +ffffffff8280e9c0 T vcpu_deinit_vmx +ffffffff8280eaf0 T vcpu_reset_regs +ffffffff8280eb70 T vcpu_init_svm +ffffffff8280ee80 T vcpu_deinit_svm +ffffffff8280eff0 T vcpu_init +ffffffff8280f0c0 T vmm_free_vpid +ffffffff8280f130 T vcpu_deinit +ffffffff8280f170 T vm_run +ffffffff8280f370 T vcpu_run_vmx +ffffffff8280fe40 T vcpu_run_svm +ffffffff82810510 T vmm_fpurestore +ffffffff828105e0 T vmm_fpusave +ffffffff82810670 T vmm_translate_gva +ffffffff828109a0 T vmm_update_pvclock +ffffffff82810ab0 T vmx_get_exit_info +ffffffff82810b30 T vmx_handle_exit +ffffffff82810fa0 T vmx_instruction_error_decode +ffffffff82811170 T vmm_get_guest_cpu_cpl +ffffffff82811290 T vmx_handle_intr +ffffffff82811330 T svm_handle_hlt +ffffffff82811380 T vmx_handle_hlt +ffffffff82811450 T svm_handle_exit +ffffffff828117d0 T svm_handle_np_fault +ffffffff82811970 T vmm_handle_cpuid +ffffffff82812050 T svm_handle_msr +ffffffff82812340 T svm_handle_xsetbv +ffffffff82812400 T svm_handle_inout +ffffffff82812510 T vmm_inject_ud +ffffffff82812550 T vmm_inject_db +ffffffff82812590 T vmx_handle_np_fault +ffffffff82812710 T vmx_handle_inout +ffffffff828128b0 T vmx_handle_cr +ffffffff82812af0 T vmx_handle_rdmsr +ffffffff82812bf0 T vmx_handle_wrmsr +ffffffff82812ea0 T vmx_handle_xsetbv +ffffffff82812fa0 T vmm_inject_gp +ffffffff82812fe0 T vmx_get_exit_qualification +ffffffff82813050 T vmx_get_guest_faulttype +ffffffff82813100 T svm_get_guest_faulttype +ffffffff82813130 T svm_fault_page +ffffffff828131c0 T vmx_fault_page +ffffffff82813340 T vmm_get_guest_cpu_mode +ffffffff82813450 T vmx_load_pdptes +ffffffff82813770 T vmx_handle_cr0_write +ffffffff828139d0 T vmx_handle_cr4_write +ffffffff82813a90 T vmm_handle_xsetbv +ffffffff82813b40 T vmx_handle_misc_enable_msr +ffffffff82813ba0 T vmm_pat_is_valid +ffffffff82813c80 t vmm_handle_cpuid_0xd +ffffffff82813d80 T vmm_gpa_is_valid +ffffffff82813df0 T vmx_exit_reason_decode +ffffffff82813e30 T svm_exit_reason_decode +ffffffff82814c40 T vcpu_state_decode +ffffffff82815000 T vmm_dispatch_intr +ffffffff82815030 T vmxon +ffffffff82815060 T vmxoff +ffffffff82815090 T vmclear +ffffffff828150c0 T vmptrld +ffffffff828150f0 T vmptrst +ffffffff82815120 T vmwrite +ffffffff82815150 T vmread +ffffffff82815180 T invvpid +ffffffff8281519b t invvpid_fail +ffffffff828151a2 t invvpid_ret +ffffffff828151c0 T invept +ffffffff828151db t invept_fail +ffffffff828151e2 t invept_ret +ffffffff82815200 T vmx_enter_guest +ffffffff8281522b t skip_init +ffffffff82815298 t no_l1df_msr +ffffffff8281529b t l1df_tlb_loop +ffffffff828152b4 t l1df_tlb_done +ffffffff828152bc t l1df_load_cache +ffffffff828152d3 t done_flush +ffffffff82815366 t do_resume +ffffffff828153eb t fail_launch_or_resume +ffffffff8281542d t fail_launch_unknown +ffffffff8281543a t fail_launch_invalid_vmcs +ffffffff82815447 t fail_launch_valid_vmcs +ffffffff82815464 t vmx_exit_handler_asm +ffffffff82815529 t restore_host +ffffffff82815550 T svm_enter_guest +ffffffff828156d2 t restore_host_svm +ffffffff82816000 T sdmmc_match +ffffffff82816060 T sdmmc_attach +ffffffff82816400 T sdmmc_detach +ffffffff828164c0 T sdmmc_activate +ffffffff82816580 T sdmmc_discover_task +ffffffff82816670 T sdmmc_create_thread +ffffffff828166e0 T sdmmc_holds_root_device +ffffffff82816740 T sdmmc_task_thread +ffffffff828169c0 T sdmmc_needs_discover +ffffffff82816a90 T sdmmc_del_task +ffffffff82816b50 T sdmmc_card_detach +ffffffff82816c60 T sdmmc_add_task +ffffffff82816cf0 T sdmmc_card_attach +ffffffff82816e60 T sdmmc_enable +ffffffff82816ff0 T sdmmc_scan +ffffffff82817090 T sdmmc_init +ffffffff828171c0 T sdmmc_disable +ffffffff82817350 T sdmmc_function_free +ffffffff82817370 T sdmmc_delay +ffffffff828173c0 T sdmmc_select_card +ffffffff82817600 T sdmmc_set_bus_power +ffffffff828177c0 T sdmmc_function_alloc +ffffffff82817860 T sdmmc_app_command +ffffffff82817a20 T sdmmc_mmc_command +ffffffff82817ab0 T sdmmc_go_idle_state +ffffffff82817be0 T sdmmc_send_if_cond +ffffffff82817d50 T sdmmc_set_relative_addr +ffffffff82818000 T sdmmc_cisptr +ffffffff828180d0 T sdmmc_read_cis +ffffffff828184b0 T sdmmc_print_cis +ffffffff828186a0 T sdmmc_check_cis_quirks +ffffffff82819000 T sdmmc_io_enable +ffffffff828192f0 T sdmmc_io_reset +ffffffff82819450 T sdmmc_io_send_op_cond +ffffffff828195e0 T sdmmc_io_scan +ffffffff82819760 T sdmmc_io_init +ffffffff828198d0 T sdmmc_io_set_highspeed +ffffffff82819bd0 T sdmmc_io_set_bus_width +ffffffff82819ec0 T sdmmc_io_function_ready +ffffffff8281a070 T sdmmc_io_read_1 +ffffffff8281a1f0 T sdmmc_io_function_enable +ffffffff8281a690 T sdmmc_io_write_1 +ffffffff8281a830 T sdmmc_io_function_disable +ffffffff8281ab10 T sdmmc_io_attach +ffffffff8281ac00 T sdmmc_print +ffffffff8281aec0 T sdmmc_submatch +ffffffff8281af50 T sdmmc_io_detach +ffffffff8281b010 T sdmmc_io_rw_direct +ffffffff8281b1e0 T sdmmc_io_rw_extended_subr +ffffffff8281b390 T sdmmc_io_rw_extended +ffffffff8281b7d0 T sdmmc_io_read_2 +ffffffff8281b940 T sdmmc_io_write_2 +ffffffff8281bac0 T sdmmc_io_read_4 +ffffffff8281bc30 T sdmmc_io_write_4 +ffffffff8281bdb0 T sdmmc_io_read_multi_1 +ffffffff8281beb0 T sdmmc_io_write_multi_1 +ffffffff8281bfb0 T sdmmc_io_read_region_1 +ffffffff8281c0b0 T sdmmc_io_write_region_1 +ffffffff8281c1b0 T sdmmc_io_xchg +ffffffff8281c370 T sdmmc_intr_enable +ffffffff8281c650 T sdmmc_intr_disable +ffffffff8281c930 T sdmmc_intr_establish +ffffffff8281ca50 T sdmmc_intr_disestablish +ffffffff8281cb50 T sdmmc_card_intr +ffffffff8281cba0 T sdmmc_intr_task +ffffffff8281cc60 T sdmmc_io_set_blocklen +ffffffff8281d000 T sdmmc_mem_enable +ffffffff8281d4d0 T sdmmc_mem_send_op_cond +ffffffff8281d6b0 T sdmmc_mem_signal_voltage +ffffffff8281d7b0 T sdmmc_mem_scan +ffffffff8281db00 T sdmmc_decode_csd +ffffffff8281df50 T sdmmc_decode_cid +ffffffff8281e400 T sdmmc_mem_send_scr +ffffffff8281e560 T sdmmc_mem_decode_scr +ffffffff8281e5c0 T sdmmc_mem_send_cxd_data +ffffffff8281e740 T sdmmc_mem_set_bus_width +ffffffff8281e870 T sdmmc_mem_sd_switch +ffffffff8281eb30 T sdmmc_be512_to_bitfield512 +ffffffff8281ebe0 T sdmmc_mem_mmc_switch +ffffffff8281ecd0 T sdmmc_mem_init +ffffffff8281ee60 T sdmmc_mem_set_blocklen +ffffffff8281ef70 T sdmmc_mem_sd_init +ffffffff8281f3e0 T sdmmc_mem_mmc_init +ffffffff8281fb60 T sdmmc_mem_select_transfer_mode +ffffffff8281fbe0 T sdmmc_mem_execute_tuning +ffffffff8281fc70 T sdmmc_mem_read_block_subr +ffffffff82820000 T sdmmc_mem_single_read_block +ffffffff828200d0 T sdmmc_mem_read_block +ffffffff828202e0 T sdmmc_mem_write_block_subr +ffffffff82820660 T sdmmc_mem_single_write_block +ffffffff82820730 T sdmmc_mem_write_block +ffffffff82820940 T sdmmc_mem_hibernate_write +ffffffff82821000 T sdmmc_scsi_cmd +ffffffff82821200 T sdmmc_minphys +ffffffff82821280 T sdmmc_scsi_attach +ffffffff828214c0 T sdmmc_alloc_ccbs +ffffffff82821620 T sdmmc_free_ccbs +ffffffff82821680 T sdmmc_scsi_detach +ffffffff82821840 T sdmmc_stimeout +ffffffff828218e0 T sdmmc_ccb_alloc +ffffffff828219a0 T sdmmc_ccb_free +ffffffff82821aa0 T sdmmc_inquiry +ffffffff82821d30 T sdmmc_start_xs +ffffffff82821e50 T sdmmc_complete_xs +ffffffff82821f40 T sdmmc_done_xs +ffffffff82821f90 T sdmmc_scsi_hibernate_io +ffffffff82823000 T bwfm_sdio_preinit +ffffffff828235a0 T bwfm_sdio_txcheck +ffffffff828235e0 T bwfm_sdio_txdata +ffffffff82823660 T bwfm_sdio_txctl +ffffffff828237f0 T bwfm_sdio_buscore_read +ffffffff82823800 T bwfm_sdio_buscore_write +ffffffff82823820 T bwfm_sdio_buscore_prepare +ffffffff828239a0 T bwfm_sdio_buscore_activate +ffffffff82823a30 T bwfm_sdio_match +ffffffff82823ae0 T bwfm_sdio_attach +ffffffff82823e80 T bwfm_sdio_detach +ffffffff82823f00 T bwfm_sdio_task +ffffffff828240c0 T bwfm_sdio_write_1 +ffffffff828240f0 T bwfm_sdio_read_1 +ffffffff82824120 T bwfm_sdio_write_4 +ffffffff828241f0 T bwfm_sdio_read_4 +ffffffff828242b0 T bwfm_sdio_load_microcode +ffffffff828245a0 T bwfm_sdio_clkctl +ffffffff828246d0 T bwfm_sdio_dev_write +ffffffff82824720 T bwfm_sdio_intr +ffffffff82824770 T bwfm_sdio_ram_read_write +ffffffff828249f0 T bwfm_sdio_htclk +ffffffff82824cb0 T bwfm_sdio_readshared +ffffffff82824da0 T bwfm_sdio_dev_read +ffffffff82824de0 T bwfm_sdio_rx_frames +ffffffff82825210 T bwfm_sdio_tx_frames +ffffffff82825330 T bwfm_sdio_backplane +ffffffff82825400 T bwfm_sdio_buf_read +ffffffff82825500 T bwfm_sdio_buf_write +ffffffff828255d0 T bwfm_sdio_frame_read_write +ffffffff82825780 T bwfm_sdio_newbuf +ffffffff82825810 T bwfm_sdio_tx_ok +ffffffff82825870 T bwfm_sdio_tx_ctrlframe +ffffffff82825980 T bwfm_sdio_tx_dataframe +ffffffff82825af0 T bwfm_sdio_rx_glom +ffffffff82826000 T onewire_match +ffffffff82826060 T onewire_attach +ffffffff82826120 T onewire_detach +ffffffff82826190 T onewire_activate +ffffffff828261b0 T onewire_scan +ffffffff82826400 T onewire_createthread +ffffffff82826470 T onewire_print +ffffffff82826560 T onewirebus_print +ffffffff828265b0 T onewire_lock +ffffffff828265d0 T onewire_unlock +ffffffff828265f0 T onewire_reset +ffffffff82826610 T onewire_bit +ffffffff82826630 T onewire_read_byte +ffffffff828267c0 T onewire_write_byte +ffffffff828268d0 T onewire_read_block +ffffffff82826970 T onewire_write_block +ffffffff82826a10 T onewire_triplet +ffffffff82826b20 T onewire_matchrom +ffffffff82826d10 T onewire_search +ffffffff82827180 T onewire_thread +ffffffff82828000 T onewire_crc +ffffffff828280b0 T onewire_crc16 +ffffffff82828170 T onewire_famname +ffffffff828281b0 T onewire_matchbyfam +ffffffff82829000 T owid_match +ffffffff82829030 T owid_attach +ffffffff82829120 T owid_detach +ffffffff82829170 T owid_activate +ffffffff8282a000 T owsbm_match +ffffffff8282a030 T owsbm_attach +ffffffff8282a240 T owsbm_detach +ffffffff8282a2d0 T owsbm_activate +ffffffff8282a300 T owsbm_update +ffffffff8282b000 T owtemp_match +ffffffff8282b030 T owtemp_attach +ffffffff8282b160 T owtemp_detach +ffffffff8282b1f0 T owtemp_activate +ffffffff8282b220 T owtemp_update +ffffffff8282c000 T owctr_match +ffffffff8282c030 T owctr_attach +ffffffff8282c1c0 T owctr_detach +ffffffff8282c250 T owctr_activate +ffffffff8282c280 T owctr_update +ffffffff8282c2c0 T owctr_update_counter +ffffffff8282d000 A __text_page_start +ffffffff8282d000 T Xsyscall_meltdown +ffffffff8282d00c T Xsyscall +ffffffff8282d299 t Xsyscall_trampback +ffffffff8282d2b0 T intr_user_exit +ffffffff8282d2f2 t intr_user_exit_post_ast +ffffffff8282d44b t Xiretq_trampback +ffffffff8282d457 T doreti_iret +ffffffff8282e000 T alltraps +ffffffff8282e138 T recall_trap +ffffffff8282e150 T alltraps_kern +ffffffff8282e153 T alltraps_kern_meltdown +ffffffff8282f000 ? Xtrap00 +ffffffff8282f000 A __kutext_start +ffffffff8282f000 A __text_page_end +ffffffff8282f010 ? Xtrap01 +ffffffff8282f020 ? Xtrap02 +ffffffff8282f028 c calltrap_specstk +ffffffff8282f0f0 ? calltrap_specstk_tramp +ffffffff8282f110 ? Xtrap03 +ffffffff8282f120 ? Xtrap04 +ffffffff8282f130 ? Xtrap05 +ffffffff8282f140 ? Xtrap06 +ffffffff8282f150 ? Xtrap07 +ffffffff8282f160 ? Xtrap08 +ffffffff8282f170 ? Xtrap09 +ffffffff8282f180 ? Xtrap0a +ffffffff8282f190 ? Xtrap0b +ffffffff8282f1a0 ? Xtrap0c +ffffffff8282f1b0 ? Xtrap0d +ffffffff8282f240 ? Xtrap0e +ffffffff8282f250 ? Xintrspurious +ffffffff8282f250 ? Xtrap0f +ffffffff8282f260 ? Xtrap10 +ffffffff8282f270 ? Xtrap11 +ffffffff8282f280 ? Xtrap12 +ffffffff8282f290 ? Xtrap13 +ffffffff8282f2a0 ? Xtrap14 +ffffffff8282f2b0 ? Xtrap15 +ffffffff8282f2c0 ? Xtrap16 +ffffffff8282f2c0 ? Xtrap17 +ffffffff8282f2c0 ? Xtrap18 +ffffffff8282f2c0 ? Xtrap19 +ffffffff8282f2c0 ? Xtrap1a +ffffffff8282f2c0 ? Xtrap1b +ffffffff8282f2c0 ? Xtrap1c +ffffffff8282f2c0 ? Xtrap1d +ffffffff8282f2c0 ? Xtrap1e +ffffffff8282f2c0 ? Xtrap1f +ffffffff8282f2d0 ? x2apic_eoi +ffffffff8282f2f0 ? Xintr_lapic_ipi +ffffffff8282f330 ? Xipi_invltlb +ffffffff8282f360 ? Xipi_invlpg +ffffffff8282f390 ? Xipi_invlrange +ffffffff8282f3d0 ? Xipi_invltlb_pcid +ffffffff8282f410 ? Xipi_invlpg_pcid +ffffffff8282f460 ? Xipi_invlrange_pcid +ffffffff8282f4d0 ? Xintr_lapic_ltimer +ffffffff8282f510 ? Xintr_xen_upcall +ffffffff8282f550 ? Xintr_hyperv_upcall +ffffffff8282f590 ? Xintr_legacy0 +ffffffff8282f5d0 ? Xintr_legacy1 +ffffffff8282f610 ? Xintr_legacy2 +ffffffff8282f650 ? Xintr_legacy3 +ffffffff8282f690 ? Xintr_legacy4 +ffffffff8282f6d0 ? Xintr_legacy5 +ffffffff8282f710 ? Xintr_legacy6 +ffffffff8282f750 ? Xintr_legacy7 +ffffffff8282f790 ? Xintr_legacy8 +ffffffff8282f7d0 ? Xintr_legacy9 +ffffffff8282f810 ? Xintr_legacy10 +ffffffff8282f850 ? Xintr_legacy11 +ffffffff8282f890 ? Xintr_legacy12 +ffffffff8282f8d0 ? Xintr_legacy13 +ffffffff8282f910 ? Xintr_legacy14 +ffffffff8282f950 ? Xintr_legacy15 +ffffffff8282f990 ? Xintr_ioapic_edge0 +ffffffff8282f9d0 ? Xintr_ioapic_edge1 +ffffffff8282fa10 ? Xintr_ioapic_edge2 +ffffffff8282fa50 ? Xintr_ioapic_edge3 +ffffffff8282fa90 ? Xintr_ioapic_edge4 +ffffffff8282fad0 ? Xintr_ioapic_edge5 +ffffffff8282fb10 ? Xintr_ioapic_edge6 +ffffffff8282fb50 ? Xintr_ioapic_edge7 +ffffffff8282fb90 ? Xintr_ioapic_edge8 +ffffffff8282fbd0 ? Xintr_ioapic_edge9 +ffffffff8282fc10 ? Xintr_ioapic_edge10 +ffffffff8282fc50 ? Xintr_ioapic_edge11 +ffffffff8282fc90 ? Xintr_ioapic_edge12 +ffffffff8282fcd0 ? Xintr_ioapic_edge13 +ffffffff8282fd10 ? Xintr_ioapic_edge14 +ffffffff8282fd50 ? Xintr_ioapic_edge15 +ffffffff8282fd90 ? Xintr_ioapic_edge16 +ffffffff8282fdd0 ? Xintr_ioapic_edge17 +ffffffff8282fe10 ? Xintr_ioapic_edge18 +ffffffff8282fe50 ? Xintr_ioapic_edge19 +ffffffff8282fe90 ? Xintr_ioapic_edge20 +ffffffff8282fed0 ? Xintr_ioapic_edge21 +ffffffff8282ff10 ? Xintr_ioapic_edge22 +ffffffff8282ff50 ? Xintr_ioapic_edge23 +ffffffff8282ff90 ? Xintr_ioapic_edge24 +ffffffff8282ffd0 ? Xintr_ioapic_edge25 +ffffffff82830010 ? Xintr_ioapic_edge26 +ffffffff82830050 ? Xintr_ioapic_edge27 +ffffffff82830090 ? Xintr_ioapic_edge28 +ffffffff828300d0 ? Xintr_ioapic_edge29 +ffffffff82830110 ? Xintr_ioapic_edge30 +ffffffff82830150 ? Xintr_ioapic_edge31 +ffffffff82830190 ? Xintr_ioapic_edge32 +ffffffff828301d0 ? Xintr_ioapic_edge33 +ffffffff82830210 ? Xintr_ioapic_edge34 +ffffffff82830250 ? Xintr_ioapic_edge35 +ffffffff82830290 ? Xintr_ioapic_edge36 +ffffffff828302d0 ? Xintr_ioapic_edge37 +ffffffff82830310 ? Xintr_ioapic_edge38 +ffffffff82830350 ? Xintr_ioapic_edge39 +ffffffff82830390 ? Xintr_ioapic_edge40 +ffffffff828303d0 ? Xintr_ioapic_edge41 +ffffffff82830410 ? Xintr_ioapic_edge42 +ffffffff82830450 ? Xintr_ioapic_edge43 +ffffffff82830490 ? Xintr_ioapic_edge44 +ffffffff828304d0 ? Xintr_ioapic_edge45 +ffffffff82830510 ? Xintr_ioapic_edge46 +ffffffff82830550 ? Xintr_ioapic_edge47 +ffffffff82830590 ? Xintr_ioapic_edge48 +ffffffff828305d0 ? Xintr_ioapic_edge49 +ffffffff82830610 ? Xintr_ioapic_edge50 +ffffffff82830650 ? Xintr_ioapic_edge51 +ffffffff82830690 ? Xintr_ioapic_edge52 +ffffffff828306d0 ? Xintr_ioapic_edge53 +ffffffff82830710 ? Xintr_ioapic_edge54 +ffffffff82830750 ? Xintr_ioapic_edge55 +ffffffff82830790 ? Xintr_ioapic_edge56 +ffffffff828307d0 ? Xintr_ioapic_edge57 +ffffffff82830810 ? Xintr_ioapic_edge58 +ffffffff82830850 ? Xintr_ioapic_edge59 +ffffffff82830890 ? Xintr_ioapic_edge60 +ffffffff828308d0 ? Xintr_ioapic_edge61 +ffffffff82830910 ? Xintr_ioapic_edge62 +ffffffff82830950 ? Xintr_ioapic_edge63 +ffffffff82830990 ? Xintr_ioapic_level0 +ffffffff828309d0 ? Xintr_ioapic_level1 +ffffffff82830a10 ? Xintr_ioapic_level2 +ffffffff82830a50 ? Xintr_ioapic_level3 +ffffffff82830a90 ? Xintr_ioapic_level4 +ffffffff82830ad0 ? Xintr_ioapic_level5 +ffffffff82830b10 ? Xintr_ioapic_level6 +ffffffff82830b50 ? Xintr_ioapic_level7 +ffffffff82830b90 ? Xintr_ioapic_level8 +ffffffff82830bd0 ? Xintr_ioapic_level9 +ffffffff82830c10 ? Xintr_ioapic_level10 +ffffffff82830c50 ? Xintr_ioapic_level11 +ffffffff82830c90 ? Xintr_ioapic_level12 +ffffffff82830cd0 ? Xintr_ioapic_level13 +ffffffff82830d10 ? Xintr_ioapic_level14 +ffffffff82830d50 ? Xintr_ioapic_level15 +ffffffff82830d90 ? Xintr_ioapic_level16 +ffffffff82830dd0 ? Xintr_ioapic_level17 +ffffffff82830e10 ? Xintr_ioapic_level18 +ffffffff82830e50 ? Xintr_ioapic_level19 +ffffffff82830e90 ? Xintr_ioapic_level20 +ffffffff82830ed0 ? Xintr_ioapic_level21 +ffffffff82830f10 ? Xintr_ioapic_level22 +ffffffff82830f50 ? Xintr_ioapic_level23 +ffffffff82830f90 ? Xintr_ioapic_level24 +ffffffff82830fd0 ? Xintr_ioapic_level25 +ffffffff82831010 ? Xintr_ioapic_level26 +ffffffff82831050 ? Xintr_ioapic_level27 +ffffffff82831090 ? Xintr_ioapic_level28 +ffffffff828310d0 ? Xintr_ioapic_level29 +ffffffff82831110 ? Xintr_ioapic_level30 +ffffffff82831150 ? Xintr_ioapic_level31 +ffffffff82831190 ? Xintr_ioapic_level32 +ffffffff828311d0 ? Xintr_ioapic_level33 +ffffffff82831210 ? Xintr_ioapic_level34 +ffffffff82831250 ? Xintr_ioapic_level35 +ffffffff82831290 ? Xintr_ioapic_level36 +ffffffff828312d0 ? Xintr_ioapic_level37 +ffffffff82831310 ? Xintr_ioapic_level38 +ffffffff82831350 ? Xintr_ioapic_level39 +ffffffff82831390 ? Xintr_ioapic_level40 +ffffffff828313d0 ? Xintr_ioapic_level41 +ffffffff82831410 ? Xintr_ioapic_level42 +ffffffff82831450 ? Xintr_ioapic_level43 +ffffffff82831490 ? Xintr_ioapic_level44 +ffffffff828314d0 ? Xintr_ioapic_level45 +ffffffff82831510 ? Xintr_ioapic_level46 +ffffffff82831550 ? Xintr_ioapic_level47 +ffffffff82831590 ? Xintr_ioapic_level48 +ffffffff828315d0 ? Xintr_ioapic_level49 +ffffffff82831610 ? Xintr_ioapic_level50 +ffffffff82831650 ? Xintr_ioapic_level51 +ffffffff82831690 ? Xintr_ioapic_level52 +ffffffff828316d0 ? Xintr_ioapic_level53 +ffffffff82831710 ? Xintr_ioapic_level54 +ffffffff82831750 ? Xintr_ioapic_level55 +ffffffff82831790 ? Xintr_ioapic_level56 +ffffffff828317d0 ? Xintr_ioapic_level57 +ffffffff82831810 ? Xintr_ioapic_level58 +ffffffff82831850 ? Xintr_ioapic_level59 +ffffffff82831890 ? Xintr_ioapic_level60 +ffffffff828318d0 ? Xintr_ioapic_level61 +ffffffff82831910 ? Xintr_ioapic_level62 +ffffffff82831950 ? Xintr_ioapic_level63 +ffffffff82832000 ? codepatch_fill_nop +ffffffff82832000 A __cptext_start +ffffffff82832000 A __kutext_end +ffffffff828320b0 ? codepatch_maprw +ffffffff828321c0 ? codepatch_unmaprw +ffffffff82832230 ? codepatch_nop +ffffffff828323b0 ? codepatch_replace +ffffffff82832580 ? codepatch_call +ffffffff828325a0 ? codepatch_control_flow +ffffffff828327c0 ? codepatch_jmp +ffffffff82833000 A __cptext_end +ffffffff82833000 A __rodata_start +ffffffff82833000 C _etext +ffffffff82833000 C etext +ffffffff82834000 r seeprom_read +ffffffff82834004 r icl_mg_pll_find_divisors.div1_vals +ffffffff82834034 r athn_ac2qid +ffffffff82834034 r athn_ac2qid +ffffffff82834034 r athn_ac2qid +ffffffff82834040 r rtwn_get_rssi.cckoff +ffffffff82834068 r rsu_ac2qid +ffffffff82834078 r pckbc_portcmd +ffffffff8283407c r tht_fifo_write_pad.pad +ffffffff82834084 r rsu_get_rssi.cckoff +ffffffff828340a4 r adlp_n_revids +ffffffff828340e8 r apple_iso_trans +ffffffff828340f0 r wihap_check_tx.txratetable +ffffffff828340f4 r dmamode +ffffffff82834118 r gen9_edram_size_mb.sets +ffffffff8283412c r dg2_g12_revid_step_tbl +ffffffff82835000 r isomappings +ffffffff82835080 r unimappings +ffffffff82835230 r replacements +ffffffff82838abc r apollo_pio_rec +ffffffff82886932 r apollo_udma33_tim +ffffffff8289c014 r pp_r600_decoded_lanes +ffffffff828d310f r cmd680_setup_channel.udma_tbl +ffffffff828db697 r apollo_udma100_tim +ffffffff828db69d r cmd0646_9_tim_udma +ffffffff828e9f99 r substchar +ffffffff82941750 r apollo_udma133_tim +ffffffff82941757 r apollo_udma66_tim +ffffffff82941781 r cy_pio_rec +ffffffff82947070 R drm_ca +ffffffff82947098 R drm_filtops +ffffffff829470c8 R drmread_filtops +ffffffff82948000 r vga_emulops +ffffffff82948048 R vga_stdscreen +ffffffff82948078 R vga_stdscreen_mono +ffffffff829480a8 R vga_stdscreen_bf +ffffffff829480d8 R vga_40lscreen +ffffffff82948108 R vga_40lscreen_mono +ffffffff82948138 R vga_40lscreen_bf +ffffffff82948168 R vga_50lscreen +ffffffff82948198 R vga_50lscreen_mono +ffffffff829481c8 R vga_50lscreen_bf +ffffffff829481f8 R vga_screenlist +ffffffff82948208 R vga_screenlist_mono +ffffffff82948218 R vga_accessops +ffffffff82948278 r i945_wm_info +ffffffff829482b8 r bgansitopc +ffffffff829482c0 r pctoansi +ffffffff82948300 r sdma_offsets +ffffffff82948300 r sdma_offsets +ffffffff82948338 r iha_rate_tbl +ffffffff82948370 r i830_a_wm_info +ffffffff829483a8 r gen9_edram_size_mb.ways +ffffffff82948408 r aggr_periodic_times +ffffffff82948508 r michael_final.pad +ffffffff82948530 r rt_copysa.maskarray +ffffffff82948538 r i915_wm_info +ffffffff82948540 r amdgpu_ih_clientid_jpeg +ffffffff82948540 r amdgpu_ih_clientid_uvds +ffffffff82948540 r amdgpu_ih_clientid_vcns +ffffffff82948540 r amdgpu_ih_clientid_vcns +ffffffff82948540 r amdgpu_ih_clientid_vcns +ffffffff82948570 r jsl_ehl_revids +ffffffff82948580 r vga_setfontset.cmaptabb +ffffffff829485f0 r i830_bc_wm_info +ffffffff82948658 r hsw_activate_psr2.map +ffffffff82948660 r tgl_revids +ffffffff82948698 r __drm_universal_plane_init.default_modifiers +ffffffff829486a8 r iwn_tid2fifo +ffffffff829486c0 r vga_setfontset.cmaptaba +ffffffff829486c8 r crtc_offsets +ffffffff829486c8 r crtc_offsets +ffffffff829486c8 r crtc_offsets +ffffffff82948770 r rtwn_r88e_get_rssi.cckoff +ffffffff82949000 R edid_vendors +ffffffff829492c0 R edid_nvendors +ffffffff829492d0 R edid_products +ffffffff82949330 R edid_nproducts +ffffffff82949340 r _edid_modes +ffffffff8294a000 R videomode_list +ffffffff8294b080 R videomode_count +ffffffff8294c000 r ahc_hard_errors +ffffffff8294c080 r critical_sections +ffffffff8294c0b0 r patches +ffffffff8294cd50 r seqprog +ffffffff8294e000 r ahc_switch +ffffffff8294f000 r termstat_strings +ffffffff8294f020 r critical_sections +ffffffff8294f060 r seqprog +ffffffff8294fd50 r patches +ffffffff82951000 r ahd_switch +ffffffff82952000 R aic_switch +ffffffff82953000 R adw_switch +ffffffff82954000 R gdt_switch +ffffffff82955000 R twe_switch +ffffffff82956000 R ciss_switch +ffffffff82956030 R ciss_level +ffffffff82956050 R ciss_stat +ffffffff82957000 R ami_switch +ffffffff82957028 R ami_raw_switch +ffffffff82958000 R mfi_switch +ffffffff82958028 R mfi_pd_switch +ffffffff82958050 r mfi_iop_xscale +ffffffff82958080 r mfi_iop_ppc +ffffffff829580b0 r mfi_iop_gen2 +ffffffff829580e0 r mfi_iop_skinny +ffffffff82958110 r mfi_bbu_indicators +ffffffff82959000 R qlw_switch +ffffffff8295a000 R isp_2100_risc_code +ffffffff8296cbf0 R isp_2200_risc_code +ffffffff8297f990 R isp_2300_risc_code +ffffffff82999408 R qla_switch +ffffffff82999430 r qla_regs_2100 +ffffffff82999460 r qla_regs_2200 +ffffffff82999490 r qla_regs_23XX +ffffffff8299a000 R ahci_atascsi_methods +ffffffff8299b000 R nvme_switch +ffffffff8299b028 r nvme_ops +ffffffff8299c000 R mpi_switch +ffffffff8299c060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff8299c090 r chv_oa_mux_regs +ffffffff8299c0b0 r fiji_clock_stretcher_lookup_table +ffffffff8299c0b0 r tonga_clock_stretcher_lookup_table +ffffffff8299c0d0 r iosf_pci_devices +ffffffff8299c0f0 r link_speed +ffffffff8299c0f0 r link_speed +ffffffff8299c130 r drm_fb_xfrm.default_dst_pitch +ffffffff8299c130 r non_supported_protection +ffffffff8299c140 r tgl_uy_revids +ffffffff8299c2b0 r bwi_phy_noise_11g_rev1 +ffffffff8299c320 r cardslot_process_event.antonym_ev +ffffffff8299c3b0 r gen11_oa_mux_regs +ffffffff8299c450 r dpia_to_preferred_enc_id_table +ffffffff8299c4c0 r ddr2_cycle_tenths +ffffffff8299c530 r rtw_intr_rx.ratetbl +ffffffff8299c5b0 r abm_config +ffffffff8299c630 r getbootinfo.ports +ffffffff8299c680 r reg_offsets +ffffffff8299c690 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff8299c6a0 r glk_revids +ffffffff8299c6b0 r init_non_clock_fields.look_up +ffffffff8299c6c0 r uftdi_8u232am_getrate.roundoff +ffffffff8299c720 r zyd_rx_data.rates +ffffffff8299c740 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff8299c770 r intel_engine_init_tlb_invalidation.gen8_regs +ffffffff8299c7a0 r bwi_phy_noise_11g +ffffffff8299c7b0 r hpt366_pio +ffffffff8299c810 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff8299c830 r ether_crc32_be_update.rev +ffffffff8299c830 r rtw_grf5101_mac_crypt.caesar +ffffffff8299c880 r snb_b_fdi_train_param +ffffffff8299c950 r intel_hpll_vco.elk_vco +ffffffff8299c970 r icl_revids +ffffffff8299c9d0 r pin_offsets +ffffffff8299c9f0 r amdgpu_ih_srcid_jpeg +ffffffff8299ca30 r firmware_list +ffffffff8299ca90 r atom_arg_shift +ffffffff8299ca90 r atom_arg_shift +ffffffff8299cad0 r pf_syncookie_wstab +ffffffff8299caf0 r ieee80211_media_init.mopts +ffffffff8299cb50 r add_entropy_words.twist_table +ffffffff8299cbf0 r urtw_8225v2_txpwr_cck +ffffffff8299cc10 r bwfm_pci_prio2fifo +ffffffff8299cc10 r ieee80211_up_to_ac.up_to_ac +ffffffff8299ccd0 r paritytab +ffffffff8299ccd0 r x86emu_parity_tab +ffffffff8299ccf0 r legacy_connector_convert +ffffffff8299cd30 r gen7_oa_mux_regs +ffffffff8299cd50 r hsw_oa_mux_regs +ffffffff8299cd70 r notetab +ffffffff8299cd90 r urtw_8225v2_txpwr_cck_ch14 +ffffffff8299cdb0 r bwi_rf_calibval.rf_calibvals +ffffffff8299ce50 r pf_syncookie_msstab +ffffffff8299ceb0 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff8299cf10 r uath_wme_init.uath_wme_11g +ffffffff8299cf50 r gen7_oa_b_counters +ffffffff8299d150 r rtwn_iq_calib_run.reg_adda +ffffffff8299d170 r nfs_backoff +ffffffff8299d1b0 r atom_def_dst +ffffffff8299d1b0 r atom_def_dst +ffffffff8299d1f0 r sha256_initial_hash_value +ffffffff8299d250 r otus_edca_def +ffffffff8299d270 r intel_hpll_vco.blb_vco +ffffffff8299d350 r epic_pci_subsys_info +ffffffff8299d370 r kbl_revids +ffffffff8299d390 r atom_arg_mask +ffffffff8299d390 r atom_arg_mask +ffffffff8299d3f0 r butmap +ffffffff8299d430 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff8299d470 r comsoft.lsrmap +ffffffff8299d4b0 r xgmi3x16_pcs_err_noncorrectable_mask_reg_aldebaran +ffffffff8299d4d0 r tulip_mii_phy_readspecific.table +ffffffff8299d570 r intel_hpll_vco.pnv_vco +ffffffff8299d5d0 r dmapageport +ffffffff8299d690 r intel_hpll_vco.ctg_vco +ffffffff8299d750 r drm_calculate_luminance_range.pre_computed_values +ffffffff8299e000 R sili_atascsi_methods +ffffffff8299f000 R ncr53c9x_switch +ffffffff829a0000 r scf_period +ffffffff829a1000 R siop_script +ffffffff829a15a0 R lun_switch +ffffffff829a15d0 R tag_switch +ffffffff829a1660 R load_dsa +ffffffff829a16c4 R siop_led_on +ffffffff829a16cc R siop_led_off +ffffffff829a16d8 R siop_switch +ffffffff829a2000 R ep_vortex_media +ffffffff829a2100 R ep_default_to_media +ffffffff829a3000 R wi_card_ident +ffffffff829a5000 R ucode_table +ffffffff829a6000 r re_revisions +ffffffff829a6290 r re_kstats_tpl +ffffffff829a8000 R smc91cxx_media +ffffffff829a8010 R smc91cxx_mii_bitbang_ops +ffffffff829a9000 R dl10019_mii_bitbang_ops +ffffffff829a9028 R dl10022_mii_bitbang_ops +ffffffff829aa000 R ax88190_mii_bitbang_ops +ffffffff829ac000 R ac97_on_off +ffffffff829ac304 R ac97_mic_select +ffffffff829ac608 R ac97_mono_select +ffffffff829ac90c R ac97_source +ffffffff829acc10 R ac97_volume_stereo +ffffffff829acc2c R ac97_volume_mono +ffffffff829acc50 R source_info +ffffffff829ad450 R ac97_ad +ffffffff829ad560 R ac97_ak +ffffffff829ad5f0 R ac97_av +ffffffff829ad730 R ac97_rl +ffffffff829ad780 R ac97_cm +ffffffff829ad800 R ac97_cr +ffffffff829ad820 R ac97_cs +ffffffff829ad900 R ac97_cx +ffffffff829ad960 R ac97_dt +ffffffff829ad980 R ac97_em +ffffffff829ad9b0 R ac97_es +ffffffff829ad9d0 R ac97_is +ffffffff829ad9f0 R ac97_ic +ffffffff829ada70 R ac97_it +ffffffff829adaa0 R ac97_ns +ffffffff829adb60 R ac97_ps +ffffffff829adb90 R ac97_sl +ffffffff829adbb0 R ac97_st +ffffffff829add00 R ac97_vi +ffffffff829add30 R ac97_tt +ffffffff829addb0 R ac97_ti +ffffffff829addd0 R ac97_wb +ffffffff829addf0 R ac97_wo +ffffffff829ade80 R ac97_ym +ffffffff829aded0 R ac97_vendors +ffffffff829ae1d0 R ac97enhancement +ffffffff829ae2d0 R ac97feature +ffffffff829af000 R lm_chips +ffffffff829af020 R lm78_sensors +ffffffff829af1a0 R w83627hf_sensors +ffffffff829af3a0 R w83627ehf_sensors +ffffffff829af5c0 R w83627dhg_sensors +ffffffff829af7c0 R nct6776f_sensors +ffffffff829afa00 R nct6779d_sensors +ffffffff829afd60 R w83637hf_sensors +ffffffff829aff20 R w83697hf_sensors +ffffffff829b00c0 R w83781d_sensors +ffffffff829b0280 R w83782d_sensors +ffffffff829b0480 R w83783s_sensors +ffffffff829b0600 R w83791d_sensors +ffffffff829b0860 R w83792d_sensors +ffffffff829b0ae0 R as99127f_sensors +ffffffff829b1000 r ar5k_known_products +ffffffff829b1110 r ar5111_gain_opt +ffffffff829b11e0 r ar5112_gain_opt +ffffffff829b12b0 r ar5k_5ghz_channels +ffffffff829b1a00 r ar5k_2ghz_channels +ffffffff829b1f10 r ar5111_rf +ffffffff829b2350 r ar5112a_rf +ffffffff829b2890 r ar5112_rf +ffffffff829b2da0 r ar5413_rf +ffffffff829b31b0 r ar2413_rf +ffffffff829b34d0 r ar2425_rf +ffffffff829b3830 r ar5111_rfg +ffffffff829b3b30 r ar5112_rfg +ffffffff829b3e30 r ar5413_rfg +ffffffff829b4130 r ar2413_rfg +ffffffff829b4430 r ar5k_rt_11a +ffffffff829b4552 r ar5k_rt_11b +ffffffff829b4674 r ar5k_rt_11g +ffffffff829b4796 r ar5k_rt_xr +ffffffff829b5000 r ar5210_ini +ffffffff829b6000 r ar5211_mode +ffffffff829b62c0 r ar5211_ini +ffffffff829b6ad0 r ar5211_rf +ffffffff829b7000 r ar5212_pcie +ffffffff829b7080 r ar5212_mode +ffffffff829b7310 r ar5212_ini +ffffffff829b7c80 r ar5212_ar5111_mode +ffffffff829b7f20 r ar5212_ar5112_mode +ffffffff829b81b0 r ar5413_mode +ffffffff829b8b10 r ar2413_mode +ffffffff829b9430 r ar2425_mode +ffffffff829b9d90 r ar5111_bbgain +ffffffff829ba090 r ar5112_bbgain +ffffffff829bb000 r athn_5ghz_chans +ffffffff829bb020 r athn_rates +ffffffff829bc000 r athn_rates +ffffffff829bd000 r ar9160_ini +ffffffff829bd068 r ar5416_ini +ffffffff829bd0d0 r ar5416_serdes +ffffffff829bd0e8 r ar9160_1_1_addac +ffffffff829bd0f8 r ar9160_1_0_addac +ffffffff829bd108 r ar5416_2_2_addac +ffffffff829bd118 r ar5416_2_1_addac +ffffffff829bd128 r ar5416_set_power_calib.chainoffset +ffffffff829bd140 r ar9160_bank6tpc_vals +ffffffff829bd1c0 r ar5416_bank6tpc_vals +ffffffff829bd240 r ar5416_bb_rfgain_vals_2g +ffffffff829bd340 r ar5416_bb_rfgain_vals_5g +ffffffff829bd440 r ar5416_bank6_vals +ffffffff829bd4c0 r ar9160_regs +ffffffff829bd540 r ar9160_vals_5g20 +ffffffff829bd640 r ar9160_vals_5g40 +ffffffff829bd740 r ar9160_vals_2g40 +ffffffff829bd840 r ar9160_vals_2g20 +ffffffff829bd940 r ar9160_cm_regs +ffffffff829bdc30 r ar9160_cm_vals +ffffffff829be210 r ar5416_regs +ffffffff829be290 r ar5416_vals_5g20 +ffffffff829be390 r ar5416_vals_5g40 +ffffffff829be490 r ar5416_vals_2g40 +ffffffff829be590 r ar5416_vals_2g20 +ffffffff829be690 r ar5416_cm_regs +ffffffff829be980 r ar5416_cm_vals +ffffffff829bef60 r ar5416_serdes_regs +ffffffff829bef90 r ar5416_serdes_vals +ffffffff829befc0 r ar9160_1_1_addac_vals +ffffffff829bf040 r ar9160_1_0_addac_vals +ffffffff829bf0c0 r ar5416_2_2_addac_vals +ffffffff829bf150 r ar5416_2_1_addac_vals +ffffffff829c0000 r ar9280_2_0_ini +ffffffff829c0068 r ar9280_2_0_serdes +ffffffff829c0080 r ar9280_2_0_rx_gain_23db_backoff +ffffffff829c00a0 r ar9280_2_0_rx_gain_13db_backoff +ffffffff829c00c0 r ar9280_2_0_rx_gain +ffffffff829c00e0 r ar9280_2_0_tx_gain_high_power +ffffffff829c0100 r ar9280_2_0_tx_gain +ffffffff829c0120 r ar9280_init_from_rom.chainoffset +ffffffff829c0130 r ar9280_2_0_regs +ffffffff829c0190 r ar9280_2_0_vals_5g20 +ffffffff829c0250 r ar9280_2_0_vals_5g40 +ffffffff829c0310 r ar9280_2_0_vals_2g40 +ffffffff829c03d0 r ar9280_2_0_vals_2g20 +ffffffff829c0490 r ar9280_2_0_cm_regs +ffffffff829c0740 r ar9280_2_0_cm_vals +ffffffff829c0c90 r ar9280_2_0_fast_clock_regs +ffffffff829c0cb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff829c0cf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff829c0d30 r ar9280_2_0_serdes_regs +ffffffff829c0d60 r ar9280_2_0_serdes_vals +ffffffff829c0d90 r ar9280_2_0_rx_gain_regs +ffffffff829c0ea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff829c10b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff829c12c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff829c14d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff829c16e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff829c18f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff829c1b00 r ar9280_2_0_tx_gain_regs +ffffffff829c1b40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff829c1bc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff829c1c40 r ar9280_2_0_tx_gain_vals_5g +ffffffff829c1cc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff829c2000 r ar9271_ini +ffffffff829c2068 r ar9285_1_2_ini +ffffffff829c20d0 r ar9280_2_0_serdes +ffffffff829c20e8 r ar9271_tx_gain_high_power +ffffffff829c2108 r ar9271_tx_gain +ffffffff829c2128 r ar9285_2_0_tx_gain_high_power +ffffffff829c2148 r ar9285_2_0_tx_gain +ffffffff829c2168 r ar9285_1_2_tx_gain_high_power +ffffffff829c2188 r ar9285_1_2_tx_gain +ffffffff829c21b0 r ar9271_regs +ffffffff829c2410 r ar9271_vals_2g40 +ffffffff829c28d0 r ar9271_vals_2g20 +ffffffff829c2d90 r ar9271_cm_regs +ffffffff829c3020 r ar9271_cm_vals +ffffffff829c3540 r ar9285_1_2_regs +ffffffff829c37a0 r ar9285_1_2_vals_2g40 +ffffffff829c3c60 r ar9285_1_2_vals_2g20 +ffffffff829c4120 r ar9285_1_2_cm_regs +ffffffff829c43a0 r ar9285_1_2_cm_vals +ffffffff829c4890 r ar9280_2_0_serdes_regs +ffffffff829c48c0 r ar9280_2_0_serdes_vals +ffffffff829c48f0 r ar9271_tx_gain_regs +ffffffff829c4940 r ar9271_tx_gain_high_power_vals_2g +ffffffff829c49d0 r ar9271_tx_gain_vals_2g +ffffffff829c4a60 r ar9285_1_2_tx_gain_regs +ffffffff829c4ab0 r ar9285_2_0_tx_gain_high_power_vals_2g +ffffffff829c4b50 r ar9285_2_0_tx_gain_vals_2g +ffffffff829c4bf0 r ar9285_1_2_tx_gain_high_power_vals_2g +ffffffff829c4c90 r ar9285_1_2_tx_gain_vals_2g +ffffffff829c5000 r ar9287_1_1_ini +ffffffff829c5068 r ar9280_2_0_serdes +ffffffff829c5080 r ar9287_1_1_rx_gain +ffffffff829c50a0 r ar9287_1_1_tx_gain +ffffffff829c50c0 r ar9287_1_1_regs +ffffffff829c5120 r ar9287_1_1_vals_2g40 +ffffffff829c51d0 r ar9287_1_1_vals_2g20 +ffffffff829c5280 r ar9287_1_1_cm_regs +ffffffff829c5560 r ar9287_1_1_cm_vals +ffffffff829c5b20 r ar9280_2_0_serdes_regs +ffffffff829c5b50 r ar9280_2_0_serdes_vals +ffffffff829c5b80 r ar9287_1_1_rx_gain_regs +ffffffff829c5d90 r ar9287_1_1_rx_gain_vals_2g +ffffffff829c61a0 r ar9287_1_1_tx_gain_regs +ffffffff829c6200 r ar9287_1_1_tx_gain_vals_2g +ffffffff829c7000 r athn_rates +ffffffff829c8000 r ar9485_1_1_ini +ffffffff829c8068 r ar9485_1_1_serdes +ffffffff829c8080 r ar9380_2_2_ini +ffffffff829c80e8 r ar9380_2_2_serdes +ffffffff829c8100 r ar9380_2_2_rx_gain_wo_xlna +ffffffff829c8120 r ar9380_2_2_rx_gain +ffffffff829c8140 r ar9485_1_1_rx_gain +ffffffff829c8160 r ar9380_2_2_tx_gain_high_ob_db +ffffffff829c8180 r ar9380_2_2_tx_gain_low_ob_db +ffffffff829c81a0 r ar9380_2_2_tx_gain_high_power +ffffffff829c81c0 r ar9380_2_2_tx_gain +ffffffff829c81e0 r ar9485_1_1_tx_gain +ffffffff829c8200 r ar9485_1_1_regs +ffffffff829c8270 r ar9485_1_1_vals_2g40 +ffffffff829c8350 r ar9485_1_1_vals_2g20 +ffffffff829c8430 r ar9485_1_1_cm_regs +ffffffff829c8720 r ar9485_1_1_cm_vals +ffffffff829c8d00 r ar9485_1_1_serdes_regs +ffffffff829c8d0c r ar9485_1_1_serdes_vals +ffffffff829c8d20 r ar9380_2_2_regs +ffffffff829c8db0 r ar9380_2_2_vals_5g20 +ffffffff829c8ed0 r ar9380_2_2_vals_5g40 +ffffffff829c8ff0 r ar9380_2_2_vals_2g40 +ffffffff829c9110 r ar9380_2_2_vals_2g20 +ffffffff829c9230 r ar9380_2_2_cm_regs +ffffffff829c95d0 r ar9380_2_2_cm_vals +ffffffff829c9d00 r ar9380_2_2_fast_clock_regs +ffffffff829c9d20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff829c9d50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff829c9d74 r ar9380_2_2_serdes_regs +ffffffff829c9d80 r ar9380_2_2_serdes_vals +ffffffff829c9d90 r ar9380_2_2_rx_gain_regs +ffffffff829c9f90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff829ca390 r ar9380_2_2_rx_gain_vals +ffffffff829ca790 r ar9485_1_1_rx_gain_regs +ffffffff829ca890 r ar9485_1_1_rx_gain_vals +ffffffff829caa90 r ar9380_2_2_tx_gain_regs +ffffffff829cab60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff829cad00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff829caea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff829cb040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff829cb1e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff829cb380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff829cb520 r ar9380_2_2_tx_gain_vals_5g +ffffffff829cb6c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff829cb860 r ar9485_1_1_tx_gain_regs +ffffffff829cb8f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff829cba10 r ar9380_def_rom +ffffffff829cbe50 r ar9380_def_rom_h112 +ffffffff829cc290 r ar9380_def_rom_h116 +ffffffff829cc6d0 r ar9380_def_rom_x112 +ffffffff829ccb10 r ar9380_def_rom_x113 +ffffffff829cd000 R atw_txthresh_tab_lo +ffffffff829cd050 R atw_txthresh_tab_hi +ffffffff829cd0a0 r atw_attach.empty_macaddr +ffffffff829cd0b0 r atw_attach.type_strings +ffffffff829cd0d0 r atw_rfmd2958_ifn +ffffffff829cd110 r atw_rfmd2958_rf1r +ffffffff829cd150 r atw_rxintr.rate_tbl +ffffffff829ce000 r rtw_identify_sta.empty_macaddr +ffffffff829cf000 r rtwn_set_key.etherzeroaddr +ffffffff829cf010 r rtl8188eu_rf_prog +ffffffff829cf030 r rtl8188ftv_rf_prog +ffffffff829cf050 r rtl8192e_rf_prog +ffffffff829cf080 r rtl8188ce_rf_prog +ffffffff829cf0a0 r rtl8188ru_rf_prog +ffffffff829cf0c0 r rtl8188cu_rf_prog +ffffffff829cf0e0 r rtl8192ce_rf_prog +ffffffff829cf110 r rtl8188ru_txagc +ffffffff829cf170 r rtl8188eu_rf_regs +ffffffff829cf230 r rtl8188eu_rf_vals +ffffffff829cf3b0 r rtl8188ftv_rf_regs +ffffffff829cf490 r rtl8188ftv_rf_vals +ffffffff829cf640 r rtl8192e_rf_regs +ffffffff829cf710 r rtl8192e_rf_vals +ffffffff829cf8b0 r rtl8192e_rf2_regs +ffffffff829cf950 r rtl8192e_rf2_vals +ffffffff829cfa90 r rtl8192ce_rf1_regs +ffffffff829cfbb0 r rtl8188ce_rf_vals +ffffffff829cfdf0 r rtl8188ru_rf_vals +ffffffff829d0030 r rtl8188cu_rf_vals +ffffffff829d0270 r rtl8192ce_rf1_vals +ffffffff829d04b0 r rtl8192ce_rf2_regs +ffffffff829d0500 r rtl8192ce_rf2_vals +ffffffff829d05a0 r rtl8192cu_txagc +ffffffff829d1000 r rt2560_rf2522_r2 +ffffffff829d1040 r rt2560_rf2524_r2 +ffffffff829d1080 r rt2560_rf2525_hi_r2 +ffffffff829d10c0 r rt2560_rf2525_r2 +ffffffff829d1100 r rt2560_rf2525e_r2 +ffffffff829d1140 r rt2560_rf2526_hi_r2 +ffffffff829d1180 r rt2560_rf2526_r2 +ffffffff829d11c0 r rt2560_def_bbp +ffffffff829d1200 r rt2560_def_mac +ffffffff829d2000 r rt2661_rf5225_1 +ffffffff829d2300 r rt2661_rf5225_2 +ffffffff829d2600 r rt2661_def_bbp +ffffffff829d2640 r rt2661_def_mac +ffffffff829d3000 r rt2860_rf2850 +ffffffff829d3430 r rt2860_rates +ffffffff829d34f0 r rt3572_def_rf +ffffffff829d3530 r rt3090_def_rf +ffffffff829d3560 r rt5392_def_rf +ffffffff829d35e0 r rt3290_def_rf +ffffffff829d3640 r rt5390_def_rf +ffffffff829d36c0 r rt5390_def_bbp +ffffffff829d36f0 r rt2860_def_mac +ffffffff829d5000 r acx111_reg +ffffffff829d5040 r acx111_rate_map +ffffffff829d6000 r acx100_reg +ffffffff829d6040 r acx100_txpower_rfmd +ffffffff829d6060 r gen8_rcs_offsets +ffffffff829d6090 r acx100_txpower_maxim +ffffffff829d60b0 r mtl_rcs_offsets +ffffffff829d60f0 r digits +ffffffff829d60f0 r pppdumpb.digits +ffffffff829d60f0 r pppdumpm.digits +ffffffff829d6140 r hangpic +ffffffff829d6180 r gen11_rcs_offsets +ffffffff829d61b0 r xehp_rcs_offsets +ffffffff829d61e0 r dg2_rcs_offsets +ffffffff829d6220 r dg2_xcs_offsets +ffffffff829d6250 r gen12_xcs_offsets +ffffffff829d7000 r trinity_override_mgpg_sequences +ffffffff829d73c0 r voltage_swing_to_pre_emphasis +ffffffff829d73d0 r sgpr_init_compute_shader +ffffffff829d74a0 r intel_hpll_vco.cl_vco +ffffffff829d74c0 r vgpr_init_compute_shader +ffffffff829d8000 r malo_cmd_string.cmds +ffffffff829d80b0 r malo_cmd_string_result.results +ffffffff829d9000 R bwi_vendor_led_act +ffffffff829d900c R bwi_default_led_act +ffffffff829d9010 R bwi_led_duration +ffffffff829d9380 r bwi_sup_bphy +ffffffff829d93c0 r bwi_phy_freq_11g_rev1 +ffffffff829d95c0 r bwi_phy_rotor_11g_rev1 +ffffffff829d96a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff829d96e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff829d9720 r bwi_phy_noise_scale_11g +ffffffff829d9760 r bwi_phy_sigma_sq_11g_rev2 +ffffffff829d97d0 r bwi_phy_sigma_sq_11g_rev7 +ffffffff829d9840 r bwi_phy_delay_11g_rev1 +ffffffff829d9920 r bwi_rf_get_gains.save_phy_regs +ffffffff829d9940 r bwi_rf_lo_find.map +ffffffff829d9960 r bwi_txpower_map_11b +ffffffff829d99a0 r bwi_txpower_map_11g +ffffffff829d99e0 r _bwi_rf_lo_update_11g.rf_atten_list +ffffffff829d9a20 r _bwi_rf_lo_update_11g.rf_atten_init_list +ffffffff829d9a60 r _bwi_rf_lo_update_11g.rf_lo_measure_order +ffffffff829d9aa0 r bwi_rf_set_nrssi_ofs_11g.save_phy_comm_regs +ffffffff829d9ac0 r bwi_bbpid_map +ffffffff829d9af0 r bwi_regwin_count +ffffffff829d9b40 r bwi_clkfreq +ffffffff829d9b58 r bwi_zero_addr +ffffffff829da000 R ipq8074_ops +ffffffff829da070 R ipq6018_ops +ffffffff829da0e0 R qca6390_ops +ffffffff829da150 R qcn9074_ops +ffffffff829da1c0 R wcn6855_ops +ffffffff829da230 R wcn6750_ops +ffffffff829da2a0 R ath11k_hw_ring_mask_ipq8074 +ffffffff829da2f8 R ath11k_hw_ring_mask_qca6390 +ffffffff829da350 R ath11k_hw_ring_mask_qcn9074 +ffffffff829da3a8 R ath11k_hw_ring_mask_wcn6750 +ffffffff829da400 R ath11k_target_ce_config_wlan_ipq8074 +ffffffff829da510 R ath11k_target_service_to_ce_map_wlan_ipq8074 +ffffffff829da620 R ath11k_target_service_to_ce_map_wlan_ipq6018 +ffffffff829da710 R ath11k_target_ce_config_wlan_qca6390 +ffffffff829da7f0 R ath11k_target_service_to_ce_map_wlan_qca6390 +ffffffff829da8b0 R ath11k_target_ce_config_wlan_qcn9074 +ffffffff829da990 R ath11k_target_service_to_ce_map_wlan_qcn9074 +ffffffff829daa70 R qwx_host_ce_config_ipq8074 +ffffffff829dad10 R qwx_host_ce_config_qca6390 +ffffffff829dae30 R qwx_host_ce_config_qcn9074 +ffffffff829daef0 R ipq8074_regs +ffffffff829dafc4 R qca6390_regs +ffffffff829db098 R qcn9074_regs +ffffffff829db16c R wcn6855_regs +ffffffff829db240 R wcn6750_regs +ffffffff829db320 R qmi_response_type_v01_ei +ffffffff829db380 R qmi_wlanfw_ind_register_req_msg_v01_ei +ffffffff829db6a0 R qmi_wlanfw_ind_register_resp_msg_v01_ei +ffffffff829db720 R qmi_wlanfw_host_cap_req_msg_v01_ei +ffffffff829dbaa0 R qmi_wlanfw_host_cap_resp_msg_v01_ei +ffffffff829dbae0 R qmi_wlanfw_mem_cfg_s_v01_ei +ffffffff829dbb60 R qmi_wlanfw_mem_seg_s_v01_ei +ffffffff829dbc00 R qmi_wlanfw_request_mem_ind_msg_v01_ei +ffffffff829dbc60 R qmi_wlanfw_mem_seg_resp_s_v01_ei +ffffffff829dbd00 R qmi_wlanfw_respond_mem_req_msg_v01_ei +ffffffff829dbd60 R qmi_wlanfw_respond_mem_resp_msg_v01_ei +ffffffff829dbda0 R qmi_wlanfw_cap_req_msg_v01_ei +ffffffff829dbdc0 R qmi_wlanfw_rf_chip_info_s_v01_ei +ffffffff829dbe20 R qmi_wlanfw_rf_board_info_s_v01_ei +ffffffff829dbe60 R qmi_wlanfw_soc_info_s_v01_ei +ffffffff829dbea0 R qmi_wlanfw_fw_version_info_s_v01_ei +ffffffff829dbf00 R qmi_wlanfw_cap_resp_msg_v01_ei +ffffffff829dc1c0 R qmi_wlanfw_bdf_download_req_msg_v01_ei +ffffffff829dc3a0 R qmi_wlanfw_bdf_download_resp_msg_v01_ei +ffffffff829dc3e0 R qmi_wlanfw_m3_info_req_msg_v01_ei +ffffffff829dc440 R qmi_wlanfw_m3_info_resp_msg_v01_ei +ffffffff829dc480 R qmi_wlanfw_wlan_ini_req_msg_v01_ei +ffffffff829dc4e0 R qmi_wlanfw_wlan_ini_resp_msg_v01_ei +ffffffff829dc520 R qmi_wlanfw_ce_tgt_pipe_cfg_s_v01_ei +ffffffff829dc5e0 R qmi_wlanfw_ce_svc_pipe_cfg_s_v01_ei +ffffffff829dc660 R qmi_wlanfw_shadow_reg_cfg_s_v01_ei +ffffffff829dc6c0 R qmi_wlanfw_shadow_reg_v2_cfg_s_v01_ei +ffffffff829dc700 R qmi_wlanfw_wlan_mode_req_msg_v01_ei +ffffffff829dc780 R qmi_wlanfw_wlan_mode_resp_msg_v01_ei +ffffffff829dc7c0 R qmi_wlanfw_wlan_cfg_req_msg_v01_ei +ffffffff829dc9a0 R qmi_wlanfw_wlan_cfg_resp_msg_v01_ei +ffffffff829dc9e0 r wmi_tlv_policies +ffffffff829de740 r qwx_hw_mode_pri_map +ffffffff829de770 r ath11k_hw_params +ffffffff829decf0 r hw_srng_config_templ +ffffffff829defa8 r ath11k_hw_hal_params_ipq8074 +ffffffff829defb8 r ath11k_hw_hal_params_qca6390 +ffffffff829defc8 r ath11k_hw_hal_params_wcn6750 +ffffffff829defd8 r ath11k_hw_tcl2wbm_rbm_map_ipq8074 +ffffffff829defe1 r ath11k_hw_tcl2wbm_rbm_map_wcn6750 +ffffffff829e0000 R uhci_bus_methods +ffffffff829e0030 R uhci_root_ctrl_methods +ffffffff829e0060 R uhci_root_intr_methods +ffffffff829e0090 R uhci_device_ctrl_methods +ffffffff829e00c0 R uhci_device_intr_methods +ffffffff829e00f0 R uhci_device_bulk_methods +ffffffff829e0120 R uhci_device_isoc_methods +ffffffff829e0150 R uhci_devd +ffffffff829e0162 R uhci_confd +ffffffff829e016b R uhci_ifcd +ffffffff829e0174 R uhci_endpd +ffffffff829e017b R uhci_hubd_piix +ffffffff829e1000 R revbits +ffffffff829e1020 R ohci_bus_methods +ffffffff829e1050 R ohci_root_ctrl_methods +ffffffff829e1080 R ohci_root_intr_methods +ffffffff829e10b0 R ohci_device_ctrl_methods +ffffffff829e10e0 R ohci_device_intr_methods +ffffffff829e1110 R ohci_device_bulk_methods +ffffffff829e1140 R ohci_device_isoc_methods +ffffffff829e1170 R ohci_devd +ffffffff829e1182 R ohci_confd +ffffffff829e118b R ohci_ifcd +ffffffff829e1194 R ohci_endpd +ffffffff829e119b R ohci_hubd +ffffffff829e2000 R ehci_bus_methods +ffffffff829e2030 R ehci_root_ctrl_methods +ffffffff829e2060 R ehci_root_intr_methods +ffffffff829e2090 R ehci_device_ctrl_methods +ffffffff829e20c0 R ehci_device_intr_methods +ffffffff829e20f0 R ehci_device_bulk_methods +ffffffff829e2120 R ehci_device_isoc_methods +ffffffff829e2150 R ehci_devd +ffffffff829e2162 R ehci_odevd +ffffffff829e216c R ehci_confd +ffffffff829e2175 R ehci_ifcd +ffffffff829e217e R ehci_endpd +ffffffff829e2185 R ehci_hubd +ffffffff829e3000 R xhci_bus_methods +ffffffff829e3030 R xhci_root_ctrl_methods +ffffffff829e3060 R xhci_root_intr_methods +ffffffff829e3090 R xhci_device_ctrl_methods +ffffffff829e30c0 R xhci_device_intr_methods +ffffffff829e30f0 R xhci_device_bulk_methods +ffffffff829e3120 R xhci_device_isoc_methods +ffffffff829e3150 R xhci_devd +ffffffff829e3162 R xhci_confd +ffffffff829e316b R xhci_ifcd +ffffffff829e3174 R xhci_endpd +ffffffff829e317b R xhci_endpcd +ffffffff829e3181 R xhci_hubd +ffffffff829e4000 R psp_ca +ffffffff829e7000 R radio_ca +ffffffff829e8000 R ipmi_ca +ffffffff829e9000 R vscsi_ca +ffffffff829e9028 R vscsi_switch +ffffffff829e9050 R vscsi_filtops +ffffffff829ea000 R mpath_ca +ffffffff829ea028 R mpath_switch +ffffffff829eb000 R softraid_ca +ffffffff829eb028 R sr_switch +ffffffff829ec000 r spdmem_basic_types +ffffffff829ec0a0 r spdmem_parity_types +ffffffff829ec0e0 r spdmem_ddr4_decode.ddr4_chipsize +ffffffff829ed000 R ufshci_switch +ffffffff829ee000 R kstat_rlock_ops +ffffffff829ee010 R kstat_wlock_ops +ffffffff829ee020 R kstat_mutex_ops +ffffffff829ee030 R kstat_cpu_ops +ffffffff829ee040 r kstat_id_tree_RBT_INFO +ffffffff829ee058 R kstat_id_tree_RBT_TYPE +ffffffff829ee060 r kstat_pv_tree_RBT_INFO +ffffffff829ee078 R kstat_pv_tree_RBT_TYPE +ffffffff829ee080 r kstat_nm_tree_RBT_INFO +ffffffff829ee098 R kstat_nm_tree_RBT_TYPE +ffffffff829ef000 r fuse_rd_filtops +ffffffff829f0000 R fusefs_vfsops +ffffffff829f0070 R fusefs_vars +ffffffff829f1000 R fusefs_vops +ffffffff829f1110 R fusefsread_filtops +ffffffff829f1140 R fusefswrite_filtops +ffffffff829f1170 R fusefsvnode_filtops +ffffffff829f2000 r pf_state_tree_RBT_INFO +ffffffff829f2018 R pf_state_tree_RBT_TYPE +ffffffff829f2020 r pf_state_tree_id_RBT_INFO +ffffffff829f2038 R pf_state_tree_id_RBT_TYPE +ffffffff829f2040 r pf_translate_af.zero +ffffffff829f3000 R hfsc_ops +ffffffff829f3038 R ifq_hfsc_ops +ffffffff829f3040 R hfsc_pf_ops +ffffffff829f3088 R pfq_hfsc_ops +ffffffff829f4000 r fqcodel_ops +ffffffff829f4038 R ifq_fqcodel_ops +ffffffff829f4040 r fqcodel_pf_ops +ffffffff829f4088 R pfq_fqcodel_ops +ffffffff829f4090 r codel_intervals +ffffffff829f5000 r pfsync_bulk_req_state_names +ffffffff829f5030 r pfsync_bulk_req_event_names +ffffffff829f5060 r pfsync_qs +ffffffff829f50d8 r pfsync_kstat_tpl +ffffffff829f52e0 r pfsync_acts +ffffffff829f6000 r bio_mappings_RBT_INFO +ffffffff829f6018 R bio_mappings_RBT_TYPE +ffffffff829f7000 R hotplugread_filtops +ffffffff829f8000 R dtps_static +ffffffff829f9000 R db_show_all_cmds +ffffffff829f9180 R db_show_cmds +ffffffff829f94c0 R db_boot_cmds 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fifo_vops +ffffffff82a2d110 R fiforead_filtops +ffffffff82a2d140 R fifowrite_filtops +ffffffff82a2d170 R fifoexcept_filtops +ffffffff82a2e000 R regyear +ffffffff82a2e020 R leapyear +ffffffff82a2e040 r dos2unix +ffffffff82a2e140 r u2l +ffffffff82a2e240 r unix2dos +ffffffff82a2f008 R msdosfs_vfsops +ffffffff82a30000 R msdosfs_vops +ffffffff82a30110 R msdosfsread_filtops +ffffffff82a30140 R msdosfswrite_filtops +ffffffff82a30170 R msdosfsvnode_filtops +ffffffff82a31000 r _utf_count +ffffffff82a32000 R ntfs_vfsops +ffffffff82a33000 R ntfs_vops +ffffffff82a34000 R bpfread_filtops +ffffffff82a34030 R bpf_mbuf_ops +ffffffff82a35000 r bpf_mem_ops +ffffffff82a36000 R priq_ops +ffffffff82a36038 R ifq_priq_ops +ffffffff82a36040 r ifq_kstat_tpl +ffffffff82a36180 r ifiq_kstat_tpl +ffffffff82a37000 r ether_crc32_le_update.crctab +ffffffff82a37040 r ether_crc32_be_update.crctab +ffffffff82a38000 r lcp +ffffffff82a38078 r ipcp +ffffffff82a380f0 r ipv6cp +ffffffff82a38168 r chap +ffffffff82a381e0 r pap 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eoip_tree_RBT_INFO +ffffffff82a440c8 R eoip_tree_RBT_TYPE +ffffffff82a440d0 r nvgre_etherbridge_ops +ffffffff82a45000 r trunk_protos +ffffffff82a46000 R ethermulticastaddr_slowprotocols +ffffffff82a46006 R lacp_info_tlv_template +ffffffff82a4600e R marker_info_tlv_template +ffffffff82a46012 R marker_response_tlv_template +ffffffff82a46020 R lacp_timer_funcs +ffffffff82a47000 r lacp_rxm_state_names +ffffffff82a47040 r lacp_rxm_event_names +ffffffff82a47090 r aggr_port_selected_names +ffffffff82a470b0 r lacp_mux_state_names +ffffffff82a470e0 r lacp_mux_event_names +ffffffff82a47128 r lacp_address_slow +ffffffff82a48000 r tpmr_pf_ipv4 +ffffffff82a48018 r tpmr_pf_ipv6 +ffffffff82a49000 r bpe_tree_RBT_INFO +ffffffff82a49018 R bpe_tree_RBT_TYPE +ffffffff82a49020 r bpe_etherbridge_ops +ffffffff82a4a000 R pppx_rd_filtops +ffffffff82a4a030 R pppx_wr_filtops +ffffffff82a4a060 r pppx_ifs_RBT_INFO +ffffffff82a4a078 R pppx_ifs_RBT_TYPE +ffffffff82a4a080 r pppac_rd_filtops +ffffffff82a4a0b0 r pppac_wr_filtops +ffffffff82a4b000 r vxlan_peers_RBT_INFO +ffffffff82a4b018 R vxlan_peers_RBT_TYPE +ffffffff82a4b020 r vxlan_etherbridge_ops +ffffffff82a4c000 R stoeplitz_cache +ffffffff82a4d000 R ieee80211_std_rateset_11a +ffffffff82a4d010 R ieee80211_std_rateset_11b +ffffffff82a4d020 R ieee80211_std_rateset_11g +ffffffff82a4d030 R ieee80211_std_ratesets_11n +ffffffff82a4d3b0 R ieee80211_std_ratesets_11ac +ffffffff82a4d6b0 r ieee80211_setbasicrates.basic +ffffffff82a4d710 r ieee80211_setmode.chanflags +ffffffff82a4d730 r ieee80211_rate2media.rates +ffffffff82a4d8c0 r ieee80211_media2rate.ieeerates +ffffffff82a4e000 r Sbox +ffffffff82a50000 r ieee80211_ioctl.empty_macaddr +ffffffff82a51000 r ieee80211_find_rxnode.zero +ffffffff82a51008 r ieee80211_tree_RBT_INFO +ffffffff82a51020 R ieee80211_tree_RBT_TYPE +ffffffff82a51028 r ieee80211_ess_tree_RBT_INFO +ffffffff82a51040 R ieee80211_ess_tree_RBT_TYPE +ffffffff82a51048 r ieee80211_do_slow_print.merge_print_intvl +ffffffff82a52020 R ieee80211_edca_table +ffffffff82a520e0 R ieee80211_qap_edca_table +ffffffff82a53000 R ieee80211_mgt_subtype_name +ffffffff82a53080 R ieee80211_state_name +ffffffff82a530b0 R ieee80211_phymode_name +ffffffff82a54000 r ieee80211_r_ctry +ffffffff82a54ae0 r ieee80211_r_names +ffffffff82a54f80 r ieee80211_r_map +ffffffff82a56000 R zeroin46_addr +ffffffff82a56010 R zeroin_addr +ffffffff82a57000 R inetdomain +ffffffff82a57050 R inetsw +ffffffff82a58000 R divertctl_vars +ffffffff82a58030 R divert_usrreqs +ffffffff82a59000 R icmpctl_vars +ffffffff82a5a000 R ipctl_vars_unlocked +ffffffff82a5a050 R ipctl_vars +ffffffff82a5a140 R inetctlerrmap +ffffffff82a5b000 R rip_usrreqs +ffffffff82a5c000 R tcp_timer_funcs +ffffffff82a5d000 R tcp_usrreqs +ffffffff82a5d090 R tcp6_usrreqs +ffffffff82a5d120 R tcpctl_vars +ffffffff82a5e000 R udp_usrreqs +ffffffff82a5e090 R udp6_usrreqs +ffffffff82a5e120 R udpctl_vars +ffffffff82a5f000 R gre_usrreqs +ffffffff82a60000 r ipsec_ids_tree_RBT_INFO +ffffffff82a60018 R ipsec_ids_tree_RBT_TYPE +ffffffff82a60020 r ipsec_ids_flows_RBT_INFO +ffffffff82a60038 R ipsec_ids_flows_RBT_TYPE +ffffffff82a60040 R xformsw +ffffffff82a60158 R xformswNXFORMSW +ffffffff82a61000 R espctl_vars +ffffffff82a61050 R ahctl_vars +ffffffff82a61070 R ipcompctl_vars +ffffffff82a61090 R ipsecctl_vars +ffffffff82a62000 R ipseczeroes +ffffffff82a63000 r carp_set_state.carp_states +ffffffff82a64000 r Rcon +ffffffff82a65000 r Te2 +ffffffff82a65400 r Te3 +ffffffff82a65800 r Te0 +ffffffff82a65c00 r Te1 +ffffffff82a66000 r rcon +ffffffff82a66030 r Td0 +ffffffff82a66430 r Td1 +ffffffff82a66830 r Td2 +ffffffff82a66c30 r Td3 +ffffffff82a67030 r Td4 +ffffffff82a69000 r K256 +ffffffff82a69100 r sha512_initial_hash_value +ffffffff82a69140 r K512 +ffffffff82a693c0 r sha384_initial_hash_value +ffffffff82a6a000 r Blowfish_initstate.initstate +ffffffff82a6c000 r cast_sbox1 +ffffffff82a6c400 r cast_sbox2 +ffffffff82a6c800 r cast_sbox3 +ffffffff82a6cc00 r cast_sbox4 +ffffffff82a6d000 r cast_sbox5 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R kv_page +ffffffff82a8d048 R kp_dirty +ffffffff82a8d070 R kp_dma +ffffffff82a8d098 R kp_dma_contig +ffffffff82a8d0c0 R kp_dma_zero +ffffffff82a8d0e8 R kp_zero +ffffffff82a8d110 R kp_pageable +ffffffff82a8d138 R kp_none +ffffffff82a8d160 R kd_waitok +ffffffff82a8d178 R kd_nowait +ffffffff82a8d190 R kd_trylock +ffffffff82a8e000 R vmmapbsy +ffffffff82a8e010 r page_flagbits +ffffffff82a8e0a8 r uvm_map_addr_RBT_INFO +ffffffff82a8e0c0 R uvm_map_addr_RBT_TYPE +ffffffff82a8f000 R pmap_pager +ffffffff82a8f048 R bufcache_pager +ffffffff82a90000 r uvm_objtree_RBT_INFO +ffffffff82a90018 R uvm_objtree_RBT_TYPE +ffffffff82a91000 r uvm_pmr_addr_RBT_INFO +ffffffff82a91018 R uvm_pmr_addr_RBT_TYPE +ffffffff82a91020 r uvm_pmr_size_RBT_INFO +ffffffff82a91038 R uvm_pmr_size_RBT_TYPE +ffffffff82a91040 r uvm_pmemrange_addr_RBT_INFO +ffffffff82a91058 R uvm_pmemrange_addr_RBT_TYPE +ffffffff82a92000 R uvm_vnodeops +ffffffff82a92048 r uvn_flush.interval +ffffffff82a93000 R zeroin6_addr +ffffffff82a94000 R in6addr_any +ffffffff82a94010 R in6addr_loopback +ffffffff82a94020 R in6addr_intfacelocal_allnodes +ffffffff82a94030 R in6addr_linklocal_allnodes +ffffffff82a94040 R in6addr_linklocal_allrouters +ffffffff82a94050 R in6mask0 +ffffffff82a94060 R in6mask32 +ffffffff82a94070 R in6mask64 +ffffffff82a94080 R in6mask96 +ffffffff82a94090 R in6mask128 +ffffffff82a940a0 R sa6_any +ffffffff82a95000 R divert6ctl_vars +ffffffff82a95030 R divert6_usrreqs +ffffffff82a96000 R inet6domain +ffffffff82a96050 R inet6sw +ffffffff82a97000 R icmpv6ctl_vars +ffffffff82a98000 R inet6ctlerrmap +ffffffff82a98020 R ipv6ctl_vars_unlocked +ffffffff82a98050 R ipv6ctl_vars +ffffffff82a99000 R rip6_usrreqs +ffffffff82a9a000 R pfkey_addr +ffffffff82a9a010 R pfkeyv2_usrreqs +ffffffff82a9a0a0 R pfkeydomain +ffffffff82a9a0f0 R pfkeysw +ffffffff82a9a150 r ealgs +ffffffff82a9a180 r aalgs +ffffffff82a9a1b0 r calgs +ffffffff82a9b000 R sadb_exts_allowed_out +ffffffff82a9b090 R sadb_exts_required_out +ffffffff82a9d000 r opc82_byte_operation +ffffffff82a9d040 r opc83_long_operation +ffffffff82a9d080 r opc83_word_operation +ffffffff82a9d0c0 r opcD0_byte_operation +ffffffff82a9d100 r opcD1_long_operation +ffffffff82a9d140 r opcD1_word_operation +ffffffff82a9e000 r crc_table +ffffffff82a9e400 r crc_braid_table +ffffffff82aa0400 r x2n_table +ffffffff82aa1000 r inflateBack.order +ffffffff82aa1030 r fixedtables.lenfix +ffffffff82aa1830 r fixedtables.distfix +ffffffff82aa2000 r inflate.order +ffffffff82aa2030 r fixedtables.lenfix +ffffffff82aa2830 r fixedtables.distfix +ffffffff82aa3000 r inflate_table.lbase +ffffffff82aa3040 r inflate_table.lext +ffffffff82aa3080 r inflate_table.dbase +ffffffff82aa30c0 r inflate_table.dext +ffffffff82aa4000 r configuration_table +ffffffff82aa5000 R z_errmsg +ffffffff82aa6000 R _dist_code +ffffffff82aa6200 R _length_code +ffffffff82aa6300 r static_l_desc +ffffffff82aa6320 r static_d_desc +ffffffff82aa6340 r static_bl_desc +ffffffff82aa6360 r static_ltree +ffffffff82aa67e0 r static_dtree +ffffffff82aa6860 r extra_lbits +ffffffff82aa68e0 r extra_dbits +ffffffff82aa6960 r extra_blbits +ffffffff82aa69b0 r bl_order +ffffffff82aa69d0 r base_length +ffffffff82aa6a50 r base_dist +ffffffff82aa7000 R nam2blk +ffffffff82aa8000 R chrtoblktbl +ffffffff82aa80c0 R nchrtoblktbl +ffffffff82aa9000 R cpuctl_vars +ffffffff82aab000 R sigcode +ffffffff82aab014 R sigcodecall +ffffffff82aab016 R sigcoderet +ffffffff82aab038 R esigcode +ffffffff82aab038 R sigfill +ffffffff82aab039 R sigfillsiz +ffffffff82aab039 r esigfill +ffffffff82aab03d r bogus_proc_pmap +ffffffff82aab070 r spl_lowered +ffffffff82aab0a6 r intr_spl_lowered +ffffffff82aab113 R _xrstor +ffffffff82aab117 R _xrstors +ffffffff82aab11b R _xsave +ffffffff82aab11f R _xsaves +ffffffff82aab123 R _xsaveopt +ffffffff82aab127 R _pcid_set_reuse +ffffffff82aab133 R _jmprax +ffffffff82aab136 R _jmprax_len +ffffffff82aab138 R _jmpr11 +ffffffff82aab13c R _jmpr11_len +ffffffff82aab13e R _jmpr13 +ffffffff82aab142 R _jmpr13_len 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nsgphy_funcs +ffffffff82ad3040 r nsgphys +ffffffff82ad4000 R urlphy_ca +ffffffff82ad4028 R urlphy_funcs +ffffffff82ad5000 R rgephy_ca +ffffffff82ad5028 R rgephy_funcs +ffffffff82ad5040 r rgephys +ffffffff82ad6000 R ciphy_ca +ffffffff82ad6028 R ciphy_funcs +ffffffff82ad6040 r ciphys +ffffffff82ad7000 R ipgphy_ca +ffffffff82ad7028 R ipgphy_funcs +ffffffff82ad7040 r ipgphys +ffffffff82ad8000 R etphy_funcs +ffffffff82ad8018 R etphy_ca +ffffffff82ad8040 r etphys +ffffffff82ad8060 r etphy_dspcode +ffffffff82ad9000 R jmphy_funcs +ffffffff82ad9018 R jmphy_ca +ffffffff82ad9040 r jmphys +ffffffff82ada000 R atphy_funcs +ffffffff82ada018 R atphy_ca +ffffffff82ada040 r atphys +ffffffff82adb000 r sense_keys +ffffffff82adb080 r adesc +ffffffff82ade000 R scsi_readsafe_cmd +ffffffff82adf000 R scsibus_ca +ffffffff82adf030 R scsi_quirk_patterns +ffffffff82ae0000 R cd_ca +ffffffff82ae0030 R cd_patterns +ffffffff82ae1000 R ch_ca +ffffffff82ae1030 R ch_patterns +ffffffff82ae2000 R sd_ca +ffffffff82ae2030 R sd_patterns +ffffffff82ae3000 R st_quirk_patterns +ffffffff82ae3210 R st_ca +ffffffff82ae3240 R st_patterns +ffffffff82ae4000 R uk_ca +ffffffff82ae5000 R safte_ca +ffffffff82ae6000 R ses_ca +ffffffff82ae7000 R sym_ca +ffffffff82ae7028 R sym_mpath_sym_ops +ffffffff82ae7048 R sym_mpath_asym_ops +ffffffff82ae8000 R rdac_ca +ffffffff82ae8028 R rdac_mpath_ops +ffffffff82ae9000 R emc_ca +ffffffff82ae9028 R emc_mpath_ops +ffffffff82aea000 R hds_ca +ffffffff82aea028 R hds_mpath_ops +ffffffff82aeb000 R atapiscsi_ca +ffffffff82aeb028 r atapiscsi_switch +ffffffff82aec000 R wd_ca +ffffffff82aed000 R atascsi_switch +ffffffff82aee000 R mainbus_ca +ffffffff82aef000 R bios_ca +ffffffff82af0000 R mpbios_ca +ffffffff82af0030 r loc_where +ffffffff82af1000 R mpbios_icu_table +ffffffff82af2000 R cpu_ca +ffffffff82af3000 R lapic_timer_intrclock +ffffffff82af4000 R ioapic_ca +ffffffff82af5000 R efifb_ca +ffffffff82af5028 R efifb_screen_list +ffffffff82af6000 R pvbus_ca +ffffffff82af7000 R pvclock_ca +ffffffff82af8000 R vmt_ca +ffffffff82af9000 R xen_ca +ffffffff82afa000 R xs_errors +ffffffff82afb000 R xnf_ca +ffffffff82afc000 R xbf_ca +ffffffff82afc028 R xbf_switch +ffffffff82afd000 R hyperv_ca +ffffffff82afd028 R hv_guid_network +ffffffff82afd038 R hv_guid_ide +ffffffff82afd048 R hv_guid_scsi +ffffffff82afd058 R hv_guid_shutdown +ffffffff82afd068 R hv_guid_timesync +ffffffff82afd078 R hv_guid_heartbeat +ffffffff82afd088 R hv_guid_kvp +ffffffff82afe000 r kvp_pools +ffffffff82aff000 R hvn_ca +ffffffff82b00000 R hvs_ca +ffffffff82b00028 R hvs_switch +ffffffff82b01000 r virtio_device_name +ffffffff82b02000 R vio_ca +ffffffff82b02030 r virtio_net_feature_names +ffffffff82b03000 R vioblk_ca +ffffffff82b03028 R vioblk_switch +ffffffff82b04000 R viomb_ca +ffffffff82b04030 r viomb_feature_names +ffffffff82b05000 R viornd_ca +ffffffff82b06000 R vioscsi_ca +ffffffff82b06028 R vioscsi_switch +ffffffff82b06050 R vioscsi_vq_names +ffffffff82b07000 R vmmci_ca +ffffffff82b08000 R pci_ca +ffffffff82b09000 r pci_quirks +ffffffff82b0a000 R pci_subclass_prehistoric +ffffffff82b0a050 R pci_subclass_mass_storage +ffffffff82b0a160 R pci_subclass_network +ffffffff82b0a250 R pci_subclass_display +ffffffff82b0a2d0 R pci_subclass_multimedia +ffffffff82b0a360 R pci_subclass_memory +ffffffff82b0a3c0 R pci_subclass_bridge +ffffffff82b0a510 R pci_subclass_communications +ffffffff82b0a5d0 R pci_subclass_system +ffffffff82b0a6c0 R pci_subclass_input +ffffffff82b0a770 R pci_subclass_dock +ffffffff82b0a7c0 R pci_subclass_processor +ffffffff82b0a880 R pci_subclass_serialbus +ffffffff82b0a990 R pci_subclass_wireless +ffffffff82b0aa70 R pci_subclass_i2o +ffffffff82b0aaa0 R pci_subclass_satcom +ffffffff82b0ab20 R pci_subclass_crypto +ffffffff82b0ab80 R pci_subclass_dasp +ffffffff82b0ac10 R pci_class +ffffffff82b0ae20 r pci_known_vendors +ffffffff82b0c410 r pci_known_products +ffffffff82b30000 R vga_pci_ca +ffffffff82b30030 r vga_devs +ffffffff82b31000 R ahc_pci_ident_table +ffffffff82b315d0 R ahc_pci_ca +ffffffff82b32000 R ahd_pci_ident_table +ffffffff82b32198 R ahd_num_pci_devs +ffffffff82b321a0 R ahd_pci_ca +ffffffff82b321d0 r pci_bus_modes +ffffffff82b32210 r pci_status_strings +ffffffff82b32250 r pci_status_source +ffffffff82b32290 r split_status_strings +ffffffff82b33000 R adw_pci_ca +ffffffff82b33028 R adw_pci_devices +ffffffff82b34000 r adw_3550_Default_EEPROM +ffffffff82b34080 r adw_38C0800_Default_EEPROM +ffffffff82b34100 r adw_38C1600_Default_EEPROM +ffffffff82b35000 R adw_asc3550_mcode +ffffffff82b363a0 R adw_asc3550_mcode_data +ffffffff82b363b0 R adw_asc38C0800_mcode +ffffffff82b37888 R adw_asc38C0800_mcode_data +ffffffff82b378a0 R adw_asc38C1600_mcode +ffffffff82b39160 R adw_asc38C1600_mcode_data +ffffffff82b3a000 R twe_pci_ca +ffffffff82b3a028 R twe_pci_devices +ffffffff82b3b000 R arc_ca +ffffffff82b3b028 R arc_switch +ffffffff82b3b050 r arc_devices +ffffffff82b3b190 r arc_intel +ffffffff82b3b198 r arc_marvell +ffffffff82b3b1a0 r arc_lsi +ffffffff82b3b1a8 r arc_marvell2 +ffffffff82b3c000 R jmb_ca +ffffffff82b3c030 r jmb_devices +ffffffff82b3d000 R ahci_pci_ca +ffffffff82b3d028 R ahci_jmb_ca +ffffffff82b3d050 r ahci_devices +ffffffff82b3e000 R nvme_pci_ca +ffffffff82b3e028 r nvme_msi_blacklist +ffffffff82b3f000 R ami_pci_ca +ffffffff82b3f030 r ami_pci_subsys +ffffffff82b3f270 r ami_pci_vendors +ffffffff82b40000 R mfi_pci_ca +ffffffff82b40030 r mfi_pci_devices +ffffffff82b41000 R mfii_ca +ffffffff82b41028 R mfii_switch +ffffffff82b41050 R mfii_pd_switch +ffffffff82b41078 R mfii_iop_thunderbolt +ffffffff82b41088 R mfii_iop_25 +ffffffff82b41098 R mfii_iop_35 +ffffffff82b410b0 R mfii_devices +ffffffff82b41180 r mfi_bbu_indicators +ffffffff82b42000 R ips_ca +ffffffff82b42028 r ips_ids +ffffffff82b42040 r ips_chips +ffffffff82b42090 r ips_names +ffffffff82b42128 r ips_switch +ffffffff82b42150 r ips_pt_switch +ffffffff82b43000 R eap_ca +ffffffff82b43028 R eap1370_hw_if +ffffffff82b430e0 R eap1371_hw_if +ffffffff82b43198 R eap_midi_hw_if +ffffffff82b431d0 R eap_devices +ffffffff82b44000 R auacer_pci_devices +ffffffff82b44008 R auacer_ca +ffffffff82b44030 R auacer_hw_if +ffffffff82b45000 R auich_ca +ffffffff82b45028 R auich_hw_if +ffffffff82b450e0 r auich_devices +ffffffff82b46000 R azalia_ca +ffffffff82b46028 R azalia_hw_if +ffffffff82b460e0 R azalia_pci_devices +ffffffff82b46120 r pin_devices +ffffffff82b461a0 r line_colors +ffffffff82b46220 r wtypes +ffffffff82b47000 r azalia_codec_init_dolby_atmos.atmos_init +ffffffff82b47050 r azalia_codec_init_dolby_atmos.atmos_v23_v25 +ffffffff82b48000 R envy_ca +ffffffff82b48028 R envy_hw_if +ffffffff82b480e0 R envy_midi_hw_if +ffffffff82b49000 R emuxki_devices +ffffffff82b49010 R emu_ca +ffffffff82b49038 R emuxki_hw_if +ffffffff82b490f0 r emuxki_recbuf_sz +ffffffff82b49170 r emuxki_recsrc_szreg +ffffffff82b4917c r emuxki_recsrc_bufaddrreg +ffffffff82b49190 r emuxki_rate_to_pitch.logMagTable +ffffffff82b49390 r emuxki_rate_to_pitch.logSlopeTable +ffffffff82b4a000 R auixp_pci_devices +ffffffff82b4a010 R auixp_ca +ffffffff82b4a038 R auixp_hw_if +ffffffff82b4b000 R clcs_ca +ffffffff82b4b028 R cs4280_hw_if +ffffffff82b4b0e0 R cs4280_devices +ffffffff82b4c000 R yds_ca +ffffffff82b4c028 r yds_hw_if +ffffffff82b4c0e0 r yds_chip_capability_list +ffffffff82b4c120 r yds_get_lpfk.lpfkt +ffffffff82b4c160 r yds_get_lpfq.lpfqt +ffffffff82b4d000 R auvia_ca +ffffffff82b4d028 R auvia_hw_if +ffffffff82b4d0e0 R auvia_devices +ffffffff82b4d0f0 r auvia_set_params_sub.slottab +ffffffff82b4e000 R gdt_pci_ca +ffffffff82b4f000 R ciss_pci_ca +ffffffff82b4f030 R ciss_pci_devices +ffffffff82b50000 R qlw_pci_ca +ffffffff82b50030 r qlw_devices +ffffffff82b50050 r isp_1040_risc_code +ffffffff82b559f0 r isp_1080_risc_code +ffffffff82b5d470 r isp_12160_risc_code +ffffffff82b65000 R qla_pci_ca +ffffffff82b65030 r qla_devices +ffffffff82b66000 R qle_ca +ffffffff82b66028 R qle_switch +ffffffff82b66050 r qle_devices +ffffffff82b66070 r isp_2400_risc_code +ffffffff82b95a50 r isp_2500_risc_code +ffffffff82bc8000 R mpi_pci_ca +ffffffff82bc8030 r mpi_devices +ffffffff82bc9000 R mpii_ca +ffffffff82bc9028 R mpii_switch +ffffffff82bc9050 r mpii_devices +ffffffff82bca000 R sili_pci_ca +ffffffff82bca030 r sili_devices +ffffffff82bcb000 R aq_devices +ffffffff82bcb060 R aq_products +ffffffff82bcb1d0 R aq_fw1x_ops +ffffffff82bcb1f8 R aq_fw2x_ops +ffffffff82bcb220 R aq2_fw_ops +ffffffff82bcb248 R aq_ca +ffffffff82bcc000 R de_ca +ffffffff82bcc030 r tulip_srom_conninfo +ffffffff82bcc120 r tulip_mii_phy_attrlist +ffffffff82bcc1e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff82bcc208 r tulip_21040_10baset_only_boardsw +ffffffff82bcc230 r tulip_21040_boardsw +ffffffff82bcc258 r tulip_2114x_isv_boardsw +ffffffff82bcc280 r tulip_21140_smc9332_boardsw +ffffffff82bcc2a8 r tulip_21040_auibnc_only_boardsw +ffffffff82bcc2d0 r tulip_21140_cogent_em100_boardsw +ffffffff82bcc2f8 r tulip_21140_accton_boardsw +ffffffff82bcc320 r tulip_21140_eb_boardsw +ffffffff82bcc348 r tulip_21041_boardsw +ffffffff82bcc370 r tulip_read_macaddr.testpat +ffffffff82bcc380 r tulip_vendors +ffffffff82bcc430 r tulip_media_to_ifmedia +ffffffff82bcc490 r tulip_chipdescs +ffffffff82bcd000 R ep_pci_ca +ffffffff82bcd030 R ep_pci_devices +ffffffff82bce000 R pcn_ca +ffffffff82bce028 R pcn_devices +ffffffff82bce030 r pcn_79c970_rcvfw +ffffffff82bce050 r pcn_79c970_xmtsp +ffffffff82bce070 r pcn_79c970_xmtfw +ffffffff82bce090 r pcn_79c971_rcvfw +ffffffff82bce0b0 r pcn_79c971_xmtsp_sram +ffffffff82bce0d0 r pcn_79c971_xmtsp +ffffffff82bce0f0 r pcn_79c971_xmtfw +ffffffff82bce110 r pcn_variants +ffffffff82bcf000 R siop_products +ffffffff82bd0000 R siop_pci_ca +ffffffff82bd1000 R rdcide_setup +ffffffff82bd1005 R rdcide_hold +ffffffff82bd100a R rdcide_udmatim +ffffffff82bd1010 R rdcide_udmaclk +ffffffff82bd1028 R default_product_desc +ffffffff82bd1040 R pciide_intel_products +ffffffff82bd1630 R pciide_amd_products +ffffffff82bd1690 R pciide_cmd_products +ffffffff82bd1730 R pciide_via_products +ffffffff82bd1810 R pciide_cypress_products +ffffffff82bd1820 R pciide_sis_products +ffffffff82bd1870 R pciide_natsemi_products +ffffffff82bd1890 R pciide_acer_products +ffffffff82bd18a0 R pciide_triones_products +ffffffff82bd18f0 R pciide_promise_products +ffffffff82bd1ac0 R pciide_acard_products +ffffffff82bd1b10 R pciide_serverworks_products +ffffffff82bd1bb0 R pciide_nvidia_products +ffffffff82bd1e80 R pciide_ite_products +ffffffff82bd1ea0 R pciide_ati_products +ffffffff82bd1f20 R pciide_jmicron_products +ffffffff82bd1f70 R pciide_phison_products +ffffffff82bd1f80 R pciide_rdc_products +ffffffff82bd1f90 R pciide_vendors +ffffffff82bd2140 R pciide_pci_ca +ffffffff82bd2168 R pciide_jmb_ca +ffffffff82bd2190 r piix_isp_dma +ffffffff82bd2193 r piix_rtc_dma +ffffffff82bd2196 r apollo_pio_set +ffffffff82bd219b r cmd0643_9_data_tim_pio +ffffffff82bd21a0 r cmd0643_9_data_tim_dma +ffffffff82bd21a3 r cmd680_channel_map.init_val +ffffffff82bd21b1 r cmd680_setup_channel.udma2_tbl +ffffffff82bd21b8 r cmd680_setup_channel.dma_tbl +ffffffff82bd21be r cmd680_setup_channel.pio_tbl +ffffffff82bd21d0 r satalink_ba5_regmap +ffffffff82bd2690 r sii3114_chansetup.channel_names +ffffffff82bd26b0 r cy_pio_pulse +ffffffff82bd26c0 r sis_udma133new_tim +ffffffff82bd26e0 r sis_pio133new_tim +ffffffff82bd26f4 r sis_dma133new_tim +ffffffff82bd2700 r sis_udma66_tim +ffffffff82bd2706 r sis_udma100new_tim +ffffffff82bd270c r sis_udma133old_tim +ffffffff82bd2713 r sis_pio_act +ffffffff82bd2718 r sis_pio_rec +ffffffff82bd271d r natsemi_pio_pulse +ffffffff82bd2722 r natsemi_pio_recover +ffffffff82bd2727 r natsemi_dma_pulse +ffffffff82bd272a r natsemi_dma_recover +ffffffff82bd2730 r scx200_udma33 +ffffffff82bd273c r scx200_dma33 +ffffffff82bd2750 r scx200_pio33 +ffffffff82bd2778 r acer_udma +ffffffff82bd277e r acer_pio +ffffffff82bd2790 r hpt370_pio +ffffffff82bd27a4 r hpt370_dma +ffffffff82bd27b0 r hpt370_udma +ffffffff82bd27d0 r hpt372_pio +ffffffff82bd27e4 r hpt372_dma +ffffffff82bd27f0 r hpt372_udma +ffffffff82bd280c r hpt366_dma +ffffffff82bd2820 r hpt366_udma +ffffffff82bd2840 r hpt374_pio +ffffffff82bd2854 r hpt374_dma +ffffffff82bd2860 r hpt374_udma +ffffffff82bd287c r pdc2xx_pa +ffffffff82bd2881 r pdc2xx_pb +ffffffff82bd2886 r pdc2xx_dma_mb +ffffffff82bd2889 r pdc2xx_dma_mc +ffffffff82bd288c r pdc2xx_udma_mc +ffffffff82bd2892 r acard_act_udma +ffffffff82bd2899 r acard_rec_udma +ffffffff82bd28a0 r acard_udma_conf +ffffffff82bd28a7 r acard_act_dma +ffffffff82bd28aa r acard_rec_dma +ffffffff82bd28ad r acard_act_pio +ffffffff82bd28b2 r acard_rec_pio +ffffffff82bd28b7 r nforce_udma +ffffffff82bd28be r nforce_pio +ffffffff82bd28c3 r ixp_mdma_timings +ffffffff82bd28c6 r ixp_pio_timings +ffffffff82bd3000 R ppb_ca +ffffffff82bd4000 R cy_pci_ca +ffffffff82bd4030 R cy_pci_devices +ffffffff82bd5000 R rl_pci_ca +ffffffff82bd5030 R rl_pci_devices +ffffffff82bd6000 R re_pci_devices +ffffffff82bd6030 R re_pci_ca +ffffffff82bd7000 R vr_ca +ffffffff82bd8000 R txp_ca +ffffffff82bd8030 R txp_devices +ffffffff82bd9000 r cards +ffffffff82bda000 r format_params +ffffffff82bda1a0 r pixfmt_table +ffffffff82bda320 r meteor_pixfmt_table +ffffffff82bdb000 R bktr_ca +ffffffff82bdb028 R bktr_hw_if +ffffffff82bdc000 r tuners +ffffffff82bdc170 r freqTable +ffffffff82bdc260 r nabcst +ffffffff82bdc2a0 r irccable +ffffffff82bdc310 r hrccable +ffffffff82bdc380 r weurope +ffffffff82bdc420 r jpnbcst +ffffffff82bdc460 r jpncable +ffffffff82bdc4c0 r xussr +ffffffff82bdc530 r australia +ffffffff82bdc590 r france +ffffffff82bdd000 R xl_pci_ca +ffffffff82bdd030 R xl_pci_devices +ffffffff82bde000 R fxp_pci_ca +ffffffff82bde030 R fxp_pci_devices +ffffffff82bdf000 R em_devices +ffffffff82bdf308 R em_ca +ffffffff82bdf330 r em_counters +ffffffff82be0000 r em_igp_cable_length_table +ffffffff82be0100 r em_igp_2_cable_length_table +ffffffff82be1000 R ixgb_devices +ffffffff82be1010 R ixgb_ca +ffffffff82be2000 R ixgbe_devices +ffffffff82be20b8 R ix_ca +ffffffff82be20e0 r ix_counters +ffffffff82be23e0 r ix_rxq_kstats_tpl +ffffffff82be2458 r ix_txq_kstats_tpl +ffffffff82be3000 r ixgbe_mvals_base +ffffffff82be3060 r ixgbe_mvals_X540 +ffffffff82be30c0 r ixgbe_mvals_X550 +ffffffff82be3120 r ixgbe_mvals_X550EM_x +ffffffff82be3180 r ixgbe_mvals_X550EM_a +ffffffff82be6000 R ixl_ca +ffffffff82be6030 R ixl_port_counters +ffffffff82be62c0 R ixl_vsi_counters +ffffffff82be6380 r ixl_devices +ffffffff82be64c0 r ixl_710 +ffffffff82be64e8 r ixl_722 +ffffffff82be6510 r ixl_pf_aq_regs +ffffffff82be6578 r ixl_710_decrepit +ffffffff82be65a0 r ixl_phy_type_map +ffffffff82be6770 r ixl_speed_type_map +ffffffff82be67b0 r ixl_hmc_pack_rxq +ffffffff82be6830 r ixl_hmc_pack_txq +ffffffff82be68a0 r ixl_sfp_ops +ffffffff82be68b8 r ixl_qsfp_ops +ffffffff82be7000 r dwqe_pci_devices +ffffffff82be7018 R dwqe_pci_ca +ffffffff82be8000 R xge_ca +ffffffff82be8028 R xge_devices +ffffffff82be8030 r xge_fix_mac +ffffffff82be8110 r xge_xena_dtx_cfg +ffffffff82be8170 r xge_herc_dtx_cfg +ffffffff82be9000 R thtc_ca +ffffffff82be9028 R tht_ca +ffffffff82be9050 r thtc_devices +ffffffff82be9068 r tht_link_state.interval +ffffffff82bea000 R myx_ca +ffffffff82bea028 R myx_devices +ffffffff82beb000 R oce_ca +ffffffff82beb030 R oce_devices +ffffffff82bec000 R dc_pci_ca +ffffffff82bed000 R epic_pci_ca +ffffffff82bed028 R epic_pci_devices +ffffffff82bee000 R ti_pci_ca +ffffffff82bee030 R ti_devices +ffffffff82bef000 R ne_pci_ca +ffffffff82bef030 R ne_pci_prod +ffffffff82bf0000 R gem_pci_ca +ffffffff82bf0030 R gem_pci_devices +ffffffff82bf0050 r gem_promhdr +ffffffff82bf0052 r gem_promdat +ffffffff82bf005a r gem_promdat2 +ffffffff82bf1000 R cas_ca +ffffffff82bf1028 R cas_pci_devices +ffffffff82bf1030 r cas_promhdr +ffffffff82bf1032 r cas_promdat_sun +ffffffff82bf103a r cas_promdat_ns +ffffffff82bf1042 r cas_promdat2 +ffffffff82bf2000 R sf_pci_ca +ffffffff82bf2028 R sf_pci_products +ffffffff82bf3000 R sis_ca +ffffffff82bf3028 R sis_devices +ffffffff82bf4000 R se_devices +ffffffff82bf4008 R se_ca +ffffffff82bf5000 R mbg_ca +ffffffff82bf5030 R mbg_devices +ffffffff82bf6000 R uhci_pci_ca +ffffffff82bf7000 R ohci_pci_ca +ffffffff82bf8000 R ehci_pci_ca +ffffffff82bf9000 R xhci_pci_ca +ffffffff82bfa000 R cbb_pci_ca +ffffffff82bfa028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff82bfb000 R skc_devices +ffffffff82bfb030 R skc_ca +ffffffff82bfb058 R sk_ca +ffffffff82bfc000 R mskc_devices +ffffffff82bfc0a8 R mskc_ca +ffffffff82bfc0d0 R msk_ca +ffffffff82bfc100 r msk_mib +ffffffff82bfd000 R puc_pci_ca +ffffffff82bfe000 R puc_devs +ffffffff82c03000 R com_puc_ca +ffffffff82c03030 r puc_port_types +ffffffff82c04000 R lpt_puc_ca +ffffffff82c05000 R wi_pci_ca +ffffffff82c05030 r wi_pci_products +ffffffff82c06000 R an_pci_ca +ffffffff82c06030 R an_pci_devices +ffffffff82c07000 R iwi_devices +ffffffff82c07010 R iwi_ca +ffffffff82c08000 R wpi_ca +ffffffff82c08028 r wpi_devices +ffffffff82c08030 r wpi_rates +ffffffff82c08050 r wpi_rf_gain_5ghz +ffffffff82c080a0 r wpi_dsp_gain_5ghz +ffffffff82c080f0 r wpi_rf_gain_2ghz +ffffffff82c08140 r wpi_dsp_gain_2ghz +ffffffff82c08190 r wpi_pmgt +ffffffff82c08310 r wpi_bands +ffffffff82c09000 R iwn_mcs2ridx +ffffffff82c09020 R iwn_ca +ffffffff82c09050 r iwn_devices +ffffffff82c090e8 r iwn4965_sensitivity_limits +ffffffff82c09124 r iwn5000_sensitivity_limits +ffffffff82c09160 r iwn5150_sensitivity_limits +ffffffff82c0919c r iwn1000_sensitivity_limits +ffffffff82c091d8 r iwn6000_sensitivity_limits +ffffffff82c09214 r iwn2000_sensitivity_limits +ffffffff82c09250 r iwn_fw_errmsg +ffffffff82c09340 r iwn4965_set_txpower.tdiv +ffffffff82c09360 r iwn4965_rf_gain_5ghz +ffffffff82c093d0 r iwn4965_dsp_gain_5ghz +ffffffff82c09440 r iwn4965_dsp_gain_2ghz +ffffffff82c094b0 r iwn_pmgt +ffffffff82c096f0 r iwn4965_post_alive.qid2fifo +ffffffff82c09700 r iwn_bands +ffffffff82c09770 r iwn_rates +ffffffff82c09820 r iwn4965_rf_gain_2ghz +ffffffff82c0a000 R iwm_nvm_channels +ffffffff82c0a030 R iwm_nvm_channels_8000 +ffffffff82c0a070 R iwm_rates +ffffffff82c0a0d0 R iwm_ht_mcs2ridx +ffffffff82c0a110 R iwm_tid_to_ac +ffffffff82c0a118 R iwm_ac_to_tx_fifo +ffffffff82c0a120 R iwm_nvm_to_read +ffffffff82c0a144 r iwm_set_hw_address_8000.reserved_mac +ffffffff82c0a180 r iwm_sf_full_timeout +ffffffff82c0a1b0 r iwm_sf_full_timeout_def +ffffffff82c0a1e0 r advanced_lookup +ffffffff82c0a320 r iwm_devices +ffffffff82c0a360 R iwm_ca +ffffffff82c0b000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff82c0b020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff82c0b040 R iwx_qu_b0_hr1_b0 +ffffffff82c0b060 R iwx_qu_b0_hr_b0 +ffffffff82c0b080 R iwx_ax201_cfg_qu_hr +ffffffff82c0b0a0 R iwx_qu_c0_hr1_b0 +ffffffff82c0b0c0 R iwx_qu_c0_hr_b0 +ffffffff82c0b0e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff82c0b100 R iwx_quz_a0_hr1_b0 +ffffffff82c0b120 R iwx_ax201_cfg_quz_hr +ffffffff82c0b140 R iwx_cfg_so_a0_hr_b0 +ffffffff82c0b160 R iwx_cfg_quz_a0_hr_b0 +ffffffff82c0b180 R iwx_2ax_cfg_so_gf_a0 +ffffffff82c0b1a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff82c0b1c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff82c0b1e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff82c0b200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff82c0b220 R iwx_2ax_cfg_so_jf_b0 +ffffffff82c0b240 R iwx_nvm_channels_8000 +ffffffff82c0b280 R iwx_rates +ffffffff82c0b2e0 R iwx_mcs2ridx +ffffffff82c0b320 R iwx_tid_to_ac +ffffffff82c0b328 R iwx_ac_to_tx_fifo +ffffffff82c0b330 r iwx_nvm_channels_uhb +ffffffff82c0b39e r iwx_is_valid_mac_addr.reserved_mac +ffffffff82c0b3b0 r iwx_sf_full_timeout +ffffffff82c0b3e0 r iwx_sf_full_timeout_def +ffffffff82c0b410 r advanced_lookup +ffffffff82c0b550 r iwx_devices +ffffffff82c0b590 r iwx_dev_info_table +ffffffff82c0be18 R iwx_ca +ffffffff82c0c000 R qwx_pci_ca +ffffffff82c0c028 r qwx_pci_devices +ffffffff82c0c030 R qwx_msi_config_one_msi +ffffffff82c0c050 R qwx_msi_config +ffffffff82c0c0c8 r qwx_pci_ops_qca6390 +ffffffff82c0c0f8 r qwx_pci_ops_qcn9074 +ffffffff82c0d000 R cmpci_ca +ffffffff82c0d028 R cmpci_hw_if +ffffffff82c0d0e0 r cmpci_rate_table +ffffffff82c0d120 R cmpci_devices +ffffffff82c0d130 r cmpci_query_devinfo.mixer_port_names +ffffffff82c0d160 r cmpci_query_devinfo.mixer_classes +ffffffff82c0e000 R iha_pci_ca +ffffffff82c0e028 R iha_switch +ffffffff82c0f000 R pcscp_ca +ffffffff82c10000 R bge_ca +ffffffff82c10030 R bge_devices +ffffffff82c101b0 r bge_revisions +ffffffff82c10610 r bge_majorrevs +ffffffff82c10790 r bge_kstat_tpl +ffffffff82c11000 R bnx_devices +ffffffff82c11020 R bnx_ca +ffffffff82c12000 R vge_ca +ffffffff82c12028 R vge_devices +ffffffff82c13000 R stge_ca +ffffffff82c13028 R stge_mii_bitbang_ops +ffffffff82c13050 R stge_devices +ffffffff82c14000 R nfe_ca +ffffffff82c14030 R nfe_devices +ffffffff82c15000 R et_devices +ffffffff82c15008 R et_ca +ffffffff82c16000 R jme_devices +ffffffff82c16008 R jme_ca +ffffffff82c17000 R age_devices +ffffffff82c17008 R age_ca +ffffffff82c18000 R alc_devices +ffffffff82c18038 R alc_ca +ffffffff82c19000 R ale_devices +ffffffff82c19008 R ale_ca +ffffffff82c1a000 R amdpm_ca +ffffffff82c1a030 R amdpm_ids +ffffffff82c1b000 R bce_ca +ffffffff82c1b028 R bce_devices +ffffffff82c1c000 R ath_pci_ca +ffffffff82c1d000 R athn_pci_ca +ffffffff82c1d030 r athn_pci_devices +ffffffff82c1e000 R atw_pci_ca +ffffffff82c1e028 R atw_pci_devices +ffffffff82c1f000 R rtw_pci_ca +ffffffff82c1f030 R rtw_pci_products +ffffffff82c20000 R rtwn_pci_ca +ffffffff82c20030 r rtwn_pci_devices +ffffffff82c20040 r rtl8188eu_mac +ffffffff82c201b0 r rtl8192cu_mac +ffffffff82c20310 r rtl8192ce_mac +ffffffff82c20458 r rtl8188eu_bb_prog +ffffffff82c20480 r rtl8723a_bb_prog +ffffffff82c204a8 r rtl8192ce_bb_prog_1t +ffffffff82c204d0 r rtl8192ce_bb_prog_2t +ffffffff82c20500 r rtl8188eu_bb_regs +ffffffff82c20680 r rtl8188eu_bb_vals +ffffffff82c20980 r rtl8188eu_agc_vals +ffffffff82c20b80 r rtl8723a_bb_regs +ffffffff82c20d00 r rtl8723a_bb_vals +ffffffff82c20ff0 r rtl8192ce_agc_vals +ffffffff82c21270 r rtl8192ce_bb_regs +ffffffff82c213f0 r rtl8192ce_bb_vals_1t +ffffffff82c216e0 r rtl8192ce_bb_vals_2t +ffffffff82c22000 R ral_pci_ca +ffffffff82c22030 R ral_pci_devices +ffffffff82c23000 R acx_pci_ca +ffffffff82c23028 R acx_pci_devices +ffffffff82c24000 R pgt_pci_ca +ffffffff82c24028 R pgt_pci_devices +ffffffff82c25000 R malo_pci_ca +ffffffff82c25028 R malo_pci_devices +ffffffff82c26000 R bwi_pci_ca +ffffffff82c26030 R bwi_pci_devices +ffffffff82c27000 R piixpm_ca +ffffffff82c27030 R piixpm_ids +ffffffff82c28000 R vic_ca +ffffffff82c28028 R vic_devices +ffffffff82c29000 R vmx_devices +ffffffff82c29008 R vmx_ca +ffffffff82c29030 r vmx_tx_kstat_tpl +ffffffff82c290d0 r vmx_kstat_rate +ffffffff82c290e0 r vmx_rx_kstat_tpl +ffffffff82c2a000 R vmwpvs_ca +ffffffff82c2a028 R vmwpvs_switch +ffffffff82c2b000 R lii_ca +ffffffff82c2b028 R lii_devices +ffffffff82c2c000 R ichiic_ca +ffffffff82c2c030 R ichiic_ids +ffffffff82c2d000 R viapm_ca +ffffffff82c2d030 R viapm_ids +ffffffff82c2d070 r val_to_temp +ffffffff82c2d870 r val_to_uV.mult +ffffffff82c2e000 R amdiic_ca +ffffffff82c2e028 R amdiic_ids +ffffffff82c2f000 R nviic_ca +ffffffff82c2f030 R nviic_ids +ffffffff82c30000 R sdhc_pci_ca +ffffffff82c31000 R kate_ca +ffffffff82c31030 r kate_proc +ffffffff82c32000 R km_ca +ffffffff82c32030 r km_devices +ffffffff82c33000 R ksmn_ca +ffffffff82c33030 r ksmn_devices +ffffffff82c34000 R iosf_pci_ca +ffffffff82c35000 R itherm_devices +ffffffff82c35008 R itherm_ca +ffffffff82c36000 R pchtemp_ca +ffffffff82c36030 R pchtemp_devices +ffffffff82c37000 R rtsx_pci_ca +ffffffff82c38000 R xspd_ca +ffffffff82c38028 R xspd_devices +ffffffff82c39000 R virtio_pci_ca +ffffffff82c39028 R virtio_pci_ops +ffffffff82c3a000 R dwiic_pci_ca +ffffffff82c3a030 R dwiic_pci_ids +ffffffff82c3b000 R bwfm_pci_ca +ffffffff82c3b030 r bwfm_pci_devices +ffffffff82c3c000 R ccp_pci_ca +ffffffff82c3c030 r ccp_pci_devices +ffffffff82c3d000 R bnxt_devices +ffffffff82c3d040 R bnxt_ca +ffffffff82c3e000 R mcx_ca +ffffffff82c3e030 r mcx_devices +ffffffff82c3e060 r mcx_rss_config +ffffffff82c3e0d0 r mcx_eth_cap_map +ffffffff82c3e2d0 r mcx_ext_eth_cap_map +ffffffff82c3e3d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff82c3e3e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82c3e400 r mcx_kstat_ppcnt_rfc2819 +ffffffff82c3e418 r mcx_kstat_ppcnt_rfc3635 +ffffffff82c3e430 r mcx_ppcnt_ieee8023_tpl +ffffffff82c3e5b0 r mcx_ppcnt_rfc2863_tpl +ffffffff82c3e6c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82c3e870 r mcx_ppcnt_rfc3635_tpl +ffffffff82c3e9b0 r mcx_kstat_mtmp_tpl +ffffffff82c3ea50 r mcx_kstat_mtmp_rate +ffffffff82c3ea60 r mcx_queue_kstat_tpl +ffffffff82c3f000 R iavf_ca +ffffffff82c3f030 r iavf_devices +ffffffff82c3f040 r iavf_aq_regs +ffffffff82c3f0b0 r iavf_link_speeds +ffffffff82c40000 R rge_ca +ffffffff82c40028 R rge_devices +ffffffff82c40040 r rge_phy_config_mac_cfg2_8126.mac_cfg2_a438_value +ffffffff82c40070 r rge_phy_config_mac_cfg2_8126.mac_cfg2_b87e_value +ffffffff82c400c0 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff82c400e0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff82c40140 r rtl8125_mac_cfg3_mcu +ffffffff82c409e0 r rtl8125_mac_cfg5_mcu +ffffffff82c41a00 r rtl8126_mac_cfg2_mcu +ffffffff82c48a20 r rtl8125_mac_bps +ffffffff82c48e20 r rtl8125b_mac_bps +ffffffff82c49048 r rge_kstats_tpl +ffffffff82c4a000 R igc_devices +ffffffff82c4a040 R igc_ca +ffffffff82c4a070 r igc_counters +ffffffff82c4b000 R ngbe_devices +ffffffff82c4b008 R ngbe_ca +ffffffff82c4c000 R com_pci_ca +ffffffff82c4c030 R com_pci_ids +ffffffff82c4d000 R ufshci_pci_ca +ffffffff82c4e000 r agp_attach.agp_max +ffffffff82c4e048 R agp_ca +ffffffff82c4f000 R intagp_ca +ffffffff82c50000 r drm_plane_create_rotation_property.props +ffffffff82c51000 r drm_bridge_priv_state_funcs +ffffffff82c53000 r color_encoding_name +ffffffff82c53020 r color_range_name +ffffffff82c54000 r drm_subpixel_enum_list +ffffffff82c54060 r drm_dpms_enum_list +ffffffff82c540a0 r drm_dvi_i_select_enum_list +ffffffff82c540d0 r drm_dvi_i_subconnector_enum_list +ffffffff82c54100 r drm_tv_mode_enum_list +ffffffff82c54170 r drm_tv_select_enum_list +ffffffff82c541c0 r drm_tv_subconnector_enum_list +ffffffff82c54210 r drm_dp_subconnector_enum_list +ffffffff82c54280 r colorspace_names +ffffffff82c54300 r drm_link_status_enum_list +ffffffff82c54320 r drm_scaling_mode_enum_list +ffffffff82c54360 r drm_aspect_ratio_enum_list +ffffffff82c54390 r drm_content_type_enum_list +ffffffff82c543e0 r drm_panel_orientation_enum_list +ffffffff82c54420 r privacy_screen_enum +ffffffff82c55000 r drm_crtc_fence_ops +ffffffff82c56000 r drm_dmt_modes +ffffffff82c58940 r edid_cea_modes_1 +ffffffff82c5c4d0 r edid_cea_modes_193 +ffffffff82c5d180 r edid_quirk_list +ffffffff82c5d360 r drm_mode_do_interlace_quirk.cea_interlaced +ffffffff82c5d3a0 r edid_4k_modes +ffffffff82c5d600 r edid_est_modes +ffffffff82c5de00 r est3_modes +ffffffff82c5df60 r stereo_mandatory_modes +ffffffff82c5dfe0 r extra_modes +ffffffff82c5f000 r drm_encoder_enum_list +ffffffff82c61000 r drm_fbdev_dma_helper_funcs +ffffffff82c61010 r drm_fbdev_dma_client_funcs +ffffffff82c61030 r drm_fbdev_dma_fb_ops +ffffffff82c62000 r drm_fbdev_generic_helper_funcs +ffffffff82c62010 r drm_fbdev_generic_client_funcs +ffffffff82c62030 r drm_fbdev_generic_fb_ops +ffffffff82c64000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82c64004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82c64008 r drm_fb_xrgb8888_to_xrgb1555.dst_pixsize +ffffffff82c6400c r drm_fb_xrgb8888_to_argb1555.dst_pixsize +ffffffff82c64010 r drm_fb_xrgb8888_to_rgba5551.dst_pixsize +ffffffff82c64014 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff82c64018 r drm_fb_xrgb8888_to_argb8888.dst_pixsize +ffffffff82c6401c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82c64020 r drm_fb_xrgb8888_to_argb2101010.dst_pixsize +ffffffff82c64024 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82c64028 r drm_fb_xrgb8888_to_xbgr8888.dst_pixsize +ffffffff82c6402c r drm_fb_xrgb8888_to_abgr8888.dst_pixsize +ffffffff82c65000 r __drm_format_info.formats +ffffffff82c66000 R drm_pgops +ffffffff82c67000 r drm_gem_dma_default_funcs +ffffffff82c68000 R drm_gem_fb_funcs +ffffffff82c69000 r drm_ioctls +ffffffff82c6b000 r dma_fence_stub_ops +ffffffff82c6b040 R dma_fence_array_ops +ffffffff82c6b080 R dma_fence_chain_ops +ffffffff82c6b0c0 R dmabufops +ffffffff82c6b0f8 R syncfileops +ffffffff82c6c000 r drm_plane_type_enum_list +ffffffff82c6d000 r tv_modes_parameters +ffffffff82c6d0c0 r drm_mode_status_names +ffffffff82c6d200 r drm_named_modes +ffffffff82c6e000 r primary_plane_funcs +ffffffff82c6e068 r safe_modeset_formats +ffffffff82c6f000 r orientation_data +ffffffff82c72c78 r lcd800x1280_rightside_up +ffffffff82c72c90 r lcd720x1280_rightside_up +ffffffff82c72ca8 r lcd800x1280_leftside_up +ffffffff82c72cc0 r lcd1080x1920_leftside_up +ffffffff82c72cd8 r lcd1600x2560_rightside_up +ffffffff82c72cf0 r lcd1200x1920_rightside_up +ffffffff82c72d08 r gpd_micropc +ffffffff82c72d20 r gpd_pocket +ffffffff82c72d38 r gpd_pocket2 +ffffffff82c72d50 r gpd_win +ffffffff82c72d68 r gpd_win2 +ffffffff82c72d80 r lcd1080x1920_rightside_up +ffffffff82c72d98 r itworks_tw891 +ffffffff82c72db0 r lcd1600x2560_leftside_up +ffffffff82c72dc8 r onegx1_pro +ffffffff82c72de0 r lcd1280x1920_rightside_up +ffffffff82c72df8 r gpd_onemix2s +ffffffff82c72e10 r .compoundliteral +ffffffff82c72e20 r .compoundliteral.5 +ffffffff82c72e48 r .compoundliteral.9 +ffffffff82c72e68 r .compoundliteral.17 +ffffffff82c72ea8 r .compoundliteral.21 +ffffffff82c72ec8 r .compoundliteral.23 +ffffffff82c72ed8 r .compoundliteral.25 +ffffffff82c72ee8 r .compoundliteral.29 +ffffffff82c73000 r drm_gem_prime_dmabuf_ops +ffffffff82c75000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82c76000 r drm_dp_phy_name.phy_names +ffffffff82c76048 r drm_dp_i2c_algo +ffffffff82c76058 r drm_dp_i2c_lock_ops +ffffffff82c76070 r dp_aux_bl_ops +ffffffff82c76090 r dpcd_quirk_list +ffffffff82c76320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82c77000 R drm_dp_mst_topology_state_funcs +ffffffff82c77020 r drm_dp_mst_req_type_str.req_type_str +ffffffff82c771f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82c77220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82c77278 r drm_dp_mst_i2c_algo +ffffffff82c78000 r rc_parameters_1_2_444 +ffffffff82c785f0 r rc_parameters_pre_scr +ffffffff82c78920 r rc_parameters_1_2_422 +ffffffff82c78df0 r rc_parameters_1_2_420 +ffffffff82c7a000 r hdmi_colorimetry_val +ffffffff82c7b018 R ttm_bo_vm_ops +ffffffff82c7c000 r ttm_range_manager_func +ffffffff82c7d018 r ttm_kmap_iter_io_ops +ffffffff82c7d030 r ttm_kmap_iter_linear_io_ops +ffffffff82c7e000 r ttm_sys_manager_func +ffffffff82c7f000 r ttm_kmap_iter_tt_ops +ffffffff82c80000 r drm_sched_fence_ops_scheduled +ffffffff82c80040 r drm_sched_fence_ops_finished +ffffffff82c81000 R ch7017_ops +ffffffff82c82000 R ch7xxx_ops +ffffffff82c82060 r ch7xxx_ids +ffffffff82c83000 R ivch_ops +ffffffff82c83060 r backup_addresses +ffffffff82c84000 R ns2501_ops +ffffffff82c84060 r mode_agnostic_values +ffffffff82c840e0 r ns2501_modes +ffffffff82c85000 R sil164_ops +ffffffff82c86000 R tfp410_ops +ffffffff82c87000 r chv_dpll +ffffffff82c87050 r vlv_dpll +ffffffff82c870a0 r g4x_dpll +ffffffff82c870f0 r pch_dpll +ffffffff82c87138 r intel_dp_enc_funcs +ffffffff82c88000 r intel_hdmi_enc_funcs +ffffffff82c89000 r vlv_primary_formats +ffffffff82c89030 r ivb_primary_formats +ffffffff82c89050 r i965_primary_formats +ffffffff82c89070 r i8xx_primary_formats +ffffffff82c89080 r i965_plane_funcs +ffffffff82c890e8 r i8xx_plane_funcs +ffffffff82c8a000 r ilk_wm_funcs +ffffffff82c8a040 r vlv_wm_funcs +ffffffff82c8a080 r g4x_wm_funcs +ffffffff82c8a0c0 r nop_funcs +ffffffff82c8a100 r pnv_wm_funcs +ffffffff82c8a140 r i965_wm_funcs +ffffffff82c8a180 r i9xx_wm_funcs +ffffffff82c8a1c0 r i845_wm_funcs +ffffffff82c8a200 r cxsr_latency_table +ffffffff82c8b000 r gen11_dsi_encoder_funcs +ffffffff82c8b020 r gen11_dsi_connector_funcs +ffffffff82c8b098 r gen11_dsi_connector_helper_funcs +ffffffff82c8b0f8 r gen11_dsi_host_ops +ffffffff82c8c000 r intel_plane_helper_funcs +ffffffff82c8d000 r g4x_audio_funcs +ffffffff82c8d018 r ibx_audio_funcs +ffffffff82c8d030 r hsw_audio_funcs +ffffffff82c8d050 r hdmi_audio_clock +ffffffff82c8d0c0 r hdmi_aud_ncts_36bpp +ffffffff82c8d1a0 r hdmi_aud_ncts_30bpp +ffffffff82c8d280 r hdmi_aud_ncts_24bpp +ffffffff82c8e000 r intel_backlight_device_ops +ffffffff82c8e018 r bxt_pwm_funcs +ffffffff82c8e048 r cnp_pwm_funcs +ffffffff82c8e078 r lpt_pwm_funcs +ffffffff82c8e0a8 r spt_pwm_funcs +ffffffff82c8e0d8 r pch_pwm_funcs +ffffffff82c8e108 r ext_pwm_funcs +ffffffff82c8e138 r vlv_pwm_funcs +ffffffff82c8e168 r i965_pwm_funcs +ffffffff82c8e198 r i9xx_pwm_funcs +ffffffff82c8e1c8 r pwm_bl_funcs +ffffffff82c8f000 r bdb_blocks +ffffffff82c8f160 r adlp_aux_ch_map +ffffffff82c8f169 r adls_aux_ch_map +ffffffff82c8f170 r rkl_aux_ch_map +ffffffff82c8f175 r direct_aux_ch_map +ffffffff82c8f17e r translate_iboost.mapping +ffffffff82c8f181 r adlp_ddc_pin_map +ffffffff82c8f18e r adls_ddc_pin_map +ffffffff82c8f19b r rkl_pch_tgp_ddc_pin_map +ffffffff82c8f1a6 r gen9bc_tgp_ddc_pin_map +ffffffff82c8f1b1 r icp_ddc_pin_map +ffffffff82c8f1c0 r cnp_ddc_pin_map +ffffffff82c90000 r mtl_sa_info +ffffffff82c90006 r adlp_sa_info +ffffffff82c9000c r adls_sa_info +ffffffff82c90012 r rkl_sa_info +ffffffff82c90018 r tgl_sa_info +ffffffff82c90020 r intel_bw_funcs +ffffffff82c91000 r intel_cdclk_funcs +ffffffff82c91010 r mtl_cdclk_funcs +ffffffff82c91030 r mtl_cdclk_table +ffffffff82c91088 r tgl_cdclk_funcs +ffffffff82c910b0 r dg2_cdclk_table +ffffffff82c91160 r adlp_a_step_cdclk_table +ffffffff82c911e0 r rplu_cdclk_table +ffffffff82c912c8 r rplu_cdclk_funcs +ffffffff82c912f0 r adlp_cdclk_table +ffffffff82c913b0 r rkl_cdclk_table +ffffffff82c914a0 r icl_cdclk_table +ffffffff82c91588 r ehl_cdclk_funcs +ffffffff82c915a8 r icl_cdclk_funcs +ffffffff82c915c8 r bxt_cdclk_funcs +ffffffff82c915f0 r glk_cdclk_table +ffffffff82c91620 r bxt_cdclk_table +ffffffff82c91668 r skl_cdclk_funcs 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tv_modes +ffffffff82ccc790 r ntsc_m_levels_composite +ffffffff82ccc796 r ntsc_m_levels_svideo +ffffffff82ccc79c r ntsc_m_csc_composite +ffffffff82ccc7b4 r ntsc_m_csc_svideo +ffffffff82ccc7d0 r filter_table +ffffffff82cccb08 r ntsc_j_levels_composite +ffffffff82cccb0e r ntsc_j_levels_svideo +ffffffff82cccb14 r ntsc_j_csc_composite +ffffffff82cccb2c r ntsc_j_csc_svideo +ffffffff82cccb44 r pal_m_levels_composite +ffffffff82cccb4a r pal_m_levels_svideo +ffffffff82cccb50 r pal_m_csc_composite +ffffffff82cccb68 r pal_m_csc_svideo +ffffffff82cccb80 r pal_n_levels_composite +ffffffff82cccb86 r pal_n_levels_svideo +ffffffff82cccb8c r pal_n_csc_composite +ffffffff82cccba4 r pal_n_csc_svideo +ffffffff82cccbbc r pal_levels_composite +ffffffff82cccbc2 r pal_levels_svideo +ffffffff82cccbc8 r pal_csc_composite +ffffffff82cccbe0 r pal_csc_svideo +ffffffff82cccbf8 r component_levels +ffffffff82cccbfe r sdtv_csc_yprpb +ffffffff82cccc16 r hdtv_csc_yprpb +ffffffff82cccc30 r input_res_table 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lfsr_converts +ffffffff82cd3000 r clflush_ops +ffffffff82cd4000 r create_extensions +ffffffff82cd4010 r set_proto_ctx_engines_extensions +ffffffff82cd5000 r create_extensions +ffffffff82cd6000 r i915_dmabuf_ops +ffffffff82cd7000 r execbuf_extensions +ffffffff82cd7010 r user_ring_map +ffffffff82cd8000 r i915_gem_object_internal_ops +ffffffff82cd9000 r i915_gem_object_funcs +ffffffff82cda000 R i915_gem_shmem_ops +ffffffff82cda080 r shmem_region_ops +ffffffff82cdb000 r i915_region_stolen_lmem_ops +ffffffff82cdb020 r i915_region_stolen_smem_ops +ffffffff82cdb040 r i915_gem_object_stolen_ops +ffffffff82cdc000 R vm_ops_ttm +ffffffff82cdc048 r i915_gem_ttm_obj_ops +ffffffff82cdc0c8 r ttm_system_region_ops +ffffffff82cdc0e8 r sys_placement_flags +ffffffff82cdc0f8 r tt_rsgt_ops +ffffffff82cdd000 r dma_fence_memcpy_ops +ffffffff82cde000 r i915_ttm_recover_region.recover_ops +ffffffff82cde020 r i915_ttm_backup_region.backup_ops +ffffffff82cde028 r i915_ttm_restore_region.restore_ops +ffffffff82cdf000 r pd_dummy_obj_ops +ffffffff82cdf080 r pd_vma_ops +ffffffff82ce0000 r gen6_null_state_relocs +ffffffff82ce0020 r gen6_null_state_batch +ffffffff82ce0470 R gen6_null_state +ffffffff82ce1000 r hsw_clear_kernel +ffffffff82ce1340 r ivb_clear_kernel +ffffffff82ce2000 r gen7_null_state_relocs +ffffffff82ce2018 R gen7_null_state +ffffffff82ce2030 r gen7_null_state_batch +ffffffff82ce3000 r gen8_null_state_relocs +ffffffff82ce3018 R gen8_null_state +ffffffff82ce3030 r gen8_null_state_batch +ffffffff82ce4000 r gen9_null_state_relocs +ffffffff82ce4018 R gen9_null_state +ffffffff82ce4030 r gen9_null_state_batch +ffffffff82ce5000 r intel_engines +ffffffff82ce51b0 r get_reset_domain.engine_reset_domains +ffffffff82ce5220 r get_reset_domain.engine_reset_domains.40 +ffffffff82ce526c r engine_class_guc_class_map +ffffffff82ce5280 r intel_engine_init_tlb_invalidation.gen12_regs +ffffffff82ce52a0 r intel_engine_init_tlb_invalidation.xehp_regs +ffffffff82ce52c0 r intel_engine_init_tlb_invalidation.xelpmp_regs +ffffffff82ce52e0 r __cs_pending_mi_force_wakes._reg +ffffffff82ce6000 r wf_ops +ffffffff82ce7000 r intel_engine_class_repr.uabi_names +ffffffff82ce7030 r uabi_classes +ffffffff82ce703c r legacy_ring_idx.map +ffffffff82ce8000 r execlists_context_ops +ffffffff82ce8090 r virtual_context_ops +ffffffff82ce9000 r xelpmp_oaddrm_steering_table +ffffffff82ce9020 r xelpg_instance0_steering_table +ffffffff82ce9070 r xelpg_l3bank_steering_table +ffffffff82ce9080 r xelpg_dss_steering_table +ffffffff82ce90d0 r pvc_instance0_steering_table +ffffffff82ce9140 r xehpsdv_mslice_steering_table +ffffffff82ce9160 r dg2_lncf_steering_table +ffffffff82ce9180 r xehpsdv_lncf_steering_table +ffffffff82ce91a0 r xehpsdv_gam_steering_table +ffffffff82ce91c0 r icl_l3bank_steering_table +ffffffff82ce91d0 r intel_steering_types +ffffffff82cea000 r wf_ops +ffffffff82ceb000 r gen12_rcs_offsets +ffffffff82ceb090 r gen9_rcs_offsets +ffffffff82ceb110 r gen9_xcs_offsets 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skl_gt2_info +ffffffff82d040e0 r skl_gt3_info +ffffffff82d04148 r skl_gt4_info +ffffffff82d041b0 r bxt_info +ffffffff82d04218 r glk_info +ffffffff82d04280 r kbl_gt1_info +ffffffff82d042e8 r kbl_gt2_info +ffffffff82d04350 r kbl_gt3_info +ffffffff82d043b8 r cfl_gt1_info +ffffffff82d04420 r cfl_gt2_info +ffffffff82d04488 r cfl_gt3_info +ffffffff82d044f0 r cml_gt1_info +ffffffff82d04558 r cml_gt2_info +ffffffff82d045c0 r icl_info +ffffffff82d04628 r ehl_info +ffffffff82d04690 r jsl_info +ffffffff82d046f8 r tgl_info +ffffffff82d04760 r rkl_info +ffffffff82d047c8 r adl_s_info +ffffffff82d04830 r adl_p_info +ffffffff82d04898 r dg1_info +ffffffff82d04900 r dg2_info +ffffffff82d04968 r ats_m_info +ffffffff82d049d0 r xelpmp_extra_gt +ffffffff82d04a10 r mtl_info +ffffffff82d05000 r oa_formats +ffffffff82d050f0 r gen8_update_reg_state_unlocked.flex_regs +ffffffff82d05110 r gen8_oa_mux_regs +ffffffff82d05130 r xehp_oa_b_counters +ffffffff82d05150 r gen12_oa_b_counters +ffffffff82d05190 r mtl_oam_b_counters +ffffffff82d051c0 r mtl_oa_mux_regs +ffffffff82d051f0 r gen12_oa_mux_regs +ffffffff82d06000 r i915_query_funcs +ffffffff82d07000 R i915_fence_ops +ffffffff82d08000 r rsgt_ops +ffffffff82d09000 r fence_ops +ffffffff82d0a000 r i915_ttm_buddy_manager_func +ffffffff82d0b000 r bind_ops +ffffffff82d0c000 r nop_clock_gating_funcs +ffffffff82d0c008 r pvc_clock_gating_funcs +ffffffff82d0c010 r dg2_clock_gating_funcs +ffffffff82d0c018 r xehpsdv_clock_gating_funcs +ffffffff82d0c020 r adlp_clock_gating_funcs +ffffffff82d0c028 r gen12lp_clock_gating_funcs +ffffffff82d0c030 r icl_clock_gating_funcs +ffffffff82d0c038 r cfl_clock_gating_funcs +ffffffff82d0c040 r skl_clock_gating_funcs +ffffffff82d0c048 r kbl_clock_gating_funcs +ffffffff82d0c050 r bxt_clock_gating_funcs +ffffffff82d0c058 r glk_clock_gating_funcs +ffffffff82d0c060 r bdw_clock_gating_funcs +ffffffff82d0c068 r chv_clock_gating_funcs +ffffffff82d0c070 r hsw_clock_gating_funcs +ffffffff82d0c078 r ivb_clock_gating_funcs +ffffffff82d0c080 r vlv_clock_gating_funcs +ffffffff82d0c088 r gen6_clock_gating_funcs +ffffffff82d0c090 r ilk_clock_gating_funcs +ffffffff82d0c098 r g4x_clock_gating_funcs +ffffffff82d0c0a0 r i965gm_clock_gating_funcs +ffffffff82d0c0a8 r i965g_clock_gating_funcs +ffffffff82d0c0b0 r gen3_clock_gating_funcs +ffffffff82d0c0b8 r i85x_clock_gating_funcs +ffffffff82d0c0c0 r i830_clock_gating_funcs +ffffffff82d0d000 r platform_names +ffffffff82d0d140 r subplatform_ult_ids +ffffffff82d0d1a4 r no_display +ffffffff82d0e000 r intel_region_map +ffffffff82d10000 r dg2_g10_revid_step_tbl +ffffffff82d10030 r dg2_g11_revid_step_tbl +ffffffff82d10050 r xehpsdv_revids +ffffffff82d10080 r adlp_rplp_revids +ffffffff82d100a0 r adlp_revids +ffffffff82d100e0 r adls_rpls_revids +ffffffff82d10120 r adls_revids +ffffffff82d10160 r rkl_revids +ffffffff82d10180 r bxt_revids +ffffffff82d101c0 r skl_revids +ffffffff82d101f0 r pvc_bd_subids +ffffffff82d10210 r pvc_ct_subids +ffffffff82d12000 r forcewake_domain_names +ffffffff82d12080 r __mtl_fw_ranges +ffffffff82d12200 r mtl_shadowed_regs +ffffffff82d12280 r __pvc_fw_ranges +ffffffff82d12430 r pvc_shadowed_regs +ffffffff82d12550 r __dg2_fw_ranges +ffffffff82d12820 r dg2_shadowed_regs +ffffffff82d12940 r __xehp_fw_ranges +ffffffff82d12c10 r gen12_shadowed_regs +ffffffff82d12d30 r __gen12_fw_ranges +ffffffff82d12f40 r __gen11_fw_ranges +ffffffff82d130f0 r gen11_shadowed_regs +ffffffff82d131b0 r __gen9_fw_ranges +ffffffff82d13330 r gen8_shadowed_regs +ffffffff82d13360 r __chv_fw_ranges +ffffffff82d13420 r __gen6_fw_ranges +ffffffff82d13430 r __vlv_fw_ranges +ffffffff82d13488 r uncore_get_fallback +ffffffff82d13490 r uncore_get_normal +ffffffff82d13498 r uncore_get_thread_status +ffffffff82d134a0 r __xelpmp_fw_ranges +ffffffff82d135d0 r xelpmp_shadowed_regs +ffffffff82d14000 r i915_pxp_tee_component_ops +ffffffff82d15000 r intel_dram_type_str.str +ffffffff82d16000 r atom_op_names +ffffffff82d163e0 r opcode_table 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caicos_mgcg_disable +ffffffff82d1b930 r turks_sysls_enable +ffffffff82d1b9f0 r caicos_sysls_enable +ffffffff82d1baa0 r turks_sysls_disable +ffffffff82d1bb60 r caicos_sysls_disable +ffffffff82d1c000 r didt_config_ci +ffffffff82d1c5b4 r defaults_bonaire_xt +ffffffff82d1c600 r defaults_saturn_xt +ffffffff82d1c64c r defaults_hawaii_xt +ffffffff82d1c698 r defaults_hawaii_pro +ffffffff82d1d000 r ci_program_jump_on_start.data +ffffffff82d1e000 r bonaire_io_mc_regs +ffffffff82d1e120 r hawaii_io_mc_regs +ffffffff82d1e1d0 r mc_cg_registers +ffffffff82d1e200 r bonaire_mgcg_cgcg_init +ffffffff82d1e5e0 r bonaire_golden_registers +ffffffff82d1e7d0 r bonaire_golden_common_registers +ffffffff82d1e800 r bonaire_golden_spm_registers +ffffffff82d1e810 r kalindi_mgcg_cgcg_init +ffffffff82d1eab0 r kalindi_golden_registers +ffffffff82d1ec20 r kalindi_golden_common_registers +ffffffff82d1ec50 r kalindi_golden_spm_registers +ffffffff82d1ec60 r godavari_golden_registers +ffffffff82d1ede0 r spectre_mgcg_cgcg_init +ffffffff82d1f200 r spectre_golden_registers +ffffffff82d1f330 r spectre_golden_common_registers +ffffffff82d1f360 r spectre_golden_spm_registers +ffffffff82d1f370 r hawaii_mgcg_cgcg_init +ffffffff82d1f880 r hawaii_golden_registers +ffffffff82d1fa30 r hawaii_golden_common_registers +ffffffff82d1fa6c r hawaii_golden_spm_registers +ffffffff82d1fa80 r spectre_rlc_save_restore_register_list +ffffffff82d20170 r kalindi_rlc_save_restore_register_list +ffffffff82d20680 r ci_cs_data +ffffffff82d206a0 r ci_SECT_CONTEXT_defs +ffffffff82d20720 r ci_SECT_CONTEXT_def_1 +ffffffff82d20a70 r ci_SECT_CONTEXT_def_3 +ffffffff82d20a90 r ci_SECT_CONTEXT_def_4 +ffffffff82d20d04 r ci_SECT_CONTEXT_def_5 +ffffffff82d20d0c r ci_SECT_CONTEXT_def_6 +ffffffff82d20d10 r ci_SECT_CONTEXT_def_2 +ffffffff82d21160 r ci_SECT_CONTEXT_def_7 +ffffffff82d21510 r cik_default_state +ffffffff82d23000 r dce3_2_afmt_write_sad_regs.eld_reg_to_type +ffffffff82d24000 r dce6_afmt_write_sad_regs.eld_reg_to_type +ffffffff82d25000 r ni_tx_offsets +ffffffff82d25020 r evergreen_dp_offsets +ffffffff82d25040 r evergreen_disp_int_status +ffffffff82d25060 r evergreen_golden_registers +ffffffff82d25260 r evergreen_golden_registers2 +ffffffff82d25310 r cypress_mgcg_init +ffffffff82d25a10 r juniper_mgcg_init +ffffffff82d25e80 r redwood_mgcg_init +ffffffff82d261b0 r cedar_golden_registers +ffffffff82d26390 r cedar_mgcg_init +ffffffff82d265f0 r wrestler_golden_registers +ffffffff82d26840 r supersumo_golden_registers +ffffffff82d26ba0 r sumo_golden_registers +ffffffff82d26be0 r barts_golden_registers +ffffffff82d26e00 r turks_golden_registers +ffffffff82d27040 r caicos_golden_registers +ffffffff82d27280 r sumo_rlc_save_restore_register_list +ffffffff82d273d0 r evergreen_cs_data +ffffffff82d27410 r SECT_CONTEXT_defs +ffffffff82d27490 r SECT_CLEAR_defs +ffffffff82d274b0 r SECT_CTRLCONST_defs +ffffffff82d274d0 r SECT_CONTEXT_def_2 +ffffffff82d274f0 r SECT_CONTEXT_def_4 +ffffffff82d27680 r SECT_CONTEXT_def_5 +ffffffff82d276a0 r SECT_CONTEXT_def_6 +ffffffff82d27780 r SECT_CONTEXT_def_1 +ffffffff82d27f20 r SECT_CONTEXT_def_3 +ffffffff82d28000 r SECT_CONTEXT_def_7 +ffffffff82d28488 r SECT_CLEAR_def_1 +ffffffff82d28494 r SECT_CTRLCONST_def_1 +ffffffff82d284a0 r evergreen_default_state +ffffffff82d29000 r cayman_reg_safe_bm +ffffffff82d2b000 r evergreen_reg_safe_bm +ffffffff82d2e000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82d2f000 r didt_config_kv +ffffffff82d30000 r barts_io_mc_regs +ffffffff82d300f0 r turks_io_mc_regs +ffffffff82d301e0 r caicos_io_mc_regs +ffffffff82d302d0 r cayman_io_mc_regs +ffffffff82d303c0 r cayman_golden_registers +ffffffff82d30580 r cayman_golden_registers2 +ffffffff82d305d0 r dvst_golden_registers +ffffffff82d30860 r dvst_golden_registers2 +ffffffff82d30890 r scrapper_golden_registers +ffffffff82d30d70 r tn_rlc_save_restore_register_list +ffffffff82d30f60 r cayman_cs_data +ffffffff82d30fa0 r SECT_CONTEXT_defs +ffffffff82d31020 r SECT_CLEAR_defs +ffffffff82d31040 r SECT_CTRLCONST_defs +ffffffff82d31060 r SECT_CONTEXT_def_2 +ffffffff82d31080 r SECT_CONTEXT_def_4 +ffffffff82d31210 r SECT_CONTEXT_def_5 +ffffffff82d31230 r SECT_CONTEXT_def_1 +ffffffff82d319d0 r SECT_CONTEXT_def_3 +ffffffff82d31ab0 r SECT_CONTEXT_def_6 +ffffffff82d31b90 r SECT_CONTEXT_def_7 +ffffffff82d32018 r SECT_CLEAR_def_1 +ffffffff82d32024 r SECT_CTRLCONST_def_1 +ffffffff82d32030 r cayman_default_state +ffffffff82d33000 r cac_weights_cayman_xt +ffffffff82d33128 r cac_weights_cayman_pro +ffffffff82d33250 r cac_weights_cayman_le +ffffffff82d33380 r cayman_cgcg_cgls_default +ffffffff82d335c0 r cayman_mgcg_default +ffffffff82d33f20 r cayman_sysls_default +ffffffff82d33ff0 r cayman_cgcg_cgls_enable +ffffffff82d34240 r cayman_cgcg_cgls_disable +ffffffff82d344a0 r cayman_mgcg_enable +ffffffff82d34520 r cayman_mgcg_disable +ffffffff82d345a0 r cayman_sysls_enable +ffffffff82d34670 r cayman_sysls_disable +ffffffff82d35000 r rn50_reg_safe_bm +ffffffff82d351a0 r r100_reg_safe_bm +ffffffff82d36000 r r200_reg_safe_bm +ffffffff82d37000 r r300_reg_safe_bm +ffffffff82d38000 r r420_reg_safe_bm +ffffffff82d3a000 r color_formats_table +ffffffff82d3a480 r r600_reg_safe_bm +ffffffff82d3d000 R r600_utc +ffffffff82d3d040 R r600_dtc +ffffffff82d3d080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82d3f000 r r100_gfx_ring +ffffffff82d3f070 r r300_gfx_ring +ffffffff82d3f0e0 r rv515_gfx_ring +ffffffff82d3f150 r r600_gfx_ring +ffffffff82d3f1c0 r r600_dma_ring +ffffffff82d3f230 r rv6xx_uvd_ring +ffffffff82d3f2a0 r rv770_uvd_ring +ffffffff82d3f310 r evergreen_gfx_ring +ffffffff82d3f380 r evergreen_dma_ring +ffffffff82d3f3f0 r cayman_gfx_ring +ffffffff82d3f460 r cayman_dma_ring +ffffffff82d3f4d0 r cayman_uvd_ring +ffffffff82d3f540 r trinity_vce_ring +ffffffff82d3f5b0 r si_gfx_ring +ffffffff82d3f620 r si_dma_ring +ffffffff82d3f690 r ci_gfx_ring +ffffffff82d3f700 r ci_cp_ring +ffffffff82d3f770 r ci_dma_ring +ffffffff82d3f7e0 r ci_vce_ring +ffffffff82d40000 r object_connector_convert +ffffffff82d40060 r supported_devices_connector_convert +ffffffff82d400a0 r supported_devices_connector_object_id_convert +ffffffff82d400c0 r thermal_controller_names +ffffffff82d40100 r pp_lib_thermal_controller_names +ffffffff82d41000 r pin_offsets +ffffffff82d41020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff82d43000 r thermal_controller_names +ffffffff82d43020 r default_primarydac_adj +ffffffff82d43120 r default_tvdac_adj +ffffffff82d43220 r default_tmds_pll +ffffffff82d44000 r radeon_dp_connector_funcs +ffffffff82d44078 r radeon_dp_connector_helper_funcs +ffffffff82d440d8 r radeon_lvds_bridge_connector_funcs +ffffffff82d44150 r radeon_vga_connector_funcs +ffffffff82d441c8 r radeon_vga_connector_helper_funcs +ffffffff82d44228 r radeon_dvi_connector_funcs +ffffffff82d442a0 r radeon_dvi_connector_helper_funcs +ffffffff82d44300 r radeon_edp_connector_funcs +ffffffff82d44378 r radeon_tv_connector_funcs +ffffffff82d443f0 r radeon_tv_connector_helper_funcs +ffffffff82d44450 r radeon_lvds_connector_funcs +ffffffff82d444c8 r radeon_lvds_connector_helper_funcs +ffffffff82d45000 r radeon_family_name +ffffffff82d453f0 r radeon_px_quirk_list +ffffffff82d46000 r radeon_fb_funcs +ffffffff82d46018 r radeon_mode_funcs +ffffffff82d46060 r radeon_tmds_pll_enum_list +ffffffff82d46080 r radeon_tv_std_enum_list +ffffffff82d46100 r radeon_underscan_enum_list +ffffffff82d46130 r radeon_audio_enum_list +ffffffff82d46160 r radeon_dither_enum_list +ffffffff82d46180 r radeon_output_csc_enum_list +ffffffff82d461c0 r radeon_crtc_funcs +ffffffff82d46280 r hpd_names +ffffffff82d462b0 r encoder_names +ffffffff82d463e0 r radeon_afmt_init.eg_offsets +ffffffff82d47000 r aux_offset +ffffffff82d48000 R radeondrm_ca +ffffffff82d48030 r pciidlist +ffffffff82d4c1d0 r kms_driver +ffffffff82d4c2c0 r radeon_ioctls_kms +ffffffff82d4d000 r radeon_fbdev_fb_helper_funcs +ffffffff82d4d010 r radeon_fbdev_client_funcs +ffffffff82d4d030 r radeon_fbdev_fb_ops +ffffffff82d4e000 R radeon_fence_ops +ffffffff82d50000 R radeon_gem_object_funcs +ffffffff82d50070 r radeon_gem_vm_ops +ffffffff82d51000 r radeon_i2c_algo +ffffffff82d51010 r radeon_atom_i2c_algo +ffffffff82d52000 r legacy_helper_funcs +ffffffff82d53000 r radeon_backlight_ops +ffffffff82d53018 r radeon_legacy_lvds_enc_funcs +ffffffff82d53038 r radeon_legacy_lvds_helper_funcs +ffffffff82d530a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82d530c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82d53128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82d53148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82d531b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82d531d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82d53238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82d53258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82d54000 r SLOPE_value +ffffffff82d54030 r YCOEF_EN_value +ffffffff82d54060 r YCOEF_value +ffffffff82d54090 r available_tv_modes +ffffffff82d54110 r hor_timing_NTSC +ffffffff82d54150 r vert_timing_NTSC +ffffffff82d54190 r hor_timing_PAL +ffffffff82d541d0 r vert_timing_PAL +ffffffff82d56000 r radeon_pm_state_type_name +ffffffff82d57000 r radeon_evict_flags.placements +ffffffff82d5a000 r rs600_reg_safe_bm +ffffffff82d5c000 r rv515_reg_safe_bm +ffffffff82d5d000 r dll_speed_table +ffffffff82d5e000 r r7xx_golden_registers +ffffffff82d5e090 r r7xx_golden_dyn_gpr_registers +ffffffff82d5e100 r rv770ce_golden_registers +ffffffff82d5e160 r rv770_golden_registers +ffffffff82d5e1b0 r rv770_mgcg_init +ffffffff82d5e8f0 r rv730_golden_registers +ffffffff82d5e950 r rv730_mgcg_init +ffffffff82d5eee0 r rv710_golden_registers +ffffffff82d5ef30 r rv710_mgcg_init +ffffffff82d5f1d0 r rv740_golden_registers +ffffffff82d5f360 r rv740_mgcg_init +ffffffff82d61000 r rv730_smc_int_vectors +ffffffff82d61040 r rv710_smc_int_vectors +ffffffff82d61080 r rv740_smc_int_vectors +ffffffff82d610c0 r cypress_smc_int_vectors +ffffffff82d61100 r caicos_smc_int_vectors +ffffffff82d61140 r cayman_smc_int_vectors +ffffffff82d62000 r tahiti_io_mc_regs +ffffffff82d62120 r pitcairn_io_mc_regs +ffffffff82d62240 r verde_io_mc_regs +ffffffff82d62360 r oland_io_mc_regs +ffffffff82d62480 r hainan_io_mc_regs +ffffffff82d625a0 r crtc_offsets +ffffffff82d625c0 r si_disp_int_status +ffffffff82d625e0 r tahiti_golden_registers +ffffffff82d62760 r tahiti_golden_rlc_registers +ffffffff82d627b0 r tahiti_mgcg_cgcg_init +ffffffff82d62d98 r tahiti_golden_registers2 +ffffffff82d62db0 r pitcairn_golden_registers +ffffffff82d62f00 r pitcairn_golden_rlc_registers +ffffffff82d62f40 r pitcairn_mgcg_cgcg_init +ffffffff82d633b0 r verde_golden_registers +ffffffff82d63620 r verde_golden_rlc_registers +ffffffff82d63660 r verde_mgcg_cgcg_init +ffffffff82d63ae0 r oland_golden_registers +ffffffff82d63c30 r oland_golden_rlc_registers +ffffffff82d63c70 r oland_mgcg_cgcg_init +ffffffff82d64000 r hainan_golden_registers +ffffffff82d6412c r hainan_golden_registers2 +ffffffff82d64140 r hainan_mgcg_cgcg_init +ffffffff82d644b0 r verde_rlc_save_restore_register_list +ffffffff82d64820 r si_cs_data +ffffffff82d64840 r si_SECT_CONTEXT_defs +ffffffff82d648c0 r si_SECT_CONTEXT_def_1 +ffffffff82d64c10 r si_SECT_CONTEXT_def_3 +ffffffff82d64c30 r si_SECT_CONTEXT_def_4 +ffffffff82d64ea4 r si_SECT_CONTEXT_def_5 +ffffffff82d64ea8 r si_SECT_CONTEXT_def_6 +ffffffff82d64eb0 r si_SECT_CONTEXT_def_2 +ffffffff82d652f0 r si_SECT_CONTEXT_def_7 +ffffffff82d656a0 r mc_cg_registers +ffffffff82d656d0 r si_default_state +ffffffff82d66000 r cac_weights_tahiti +ffffffff82d664d0 r lcac_tahiti +ffffffff82d66ba0 r cac_override_tahiti +ffffffff82d66bb4 r powertune_data_tahiti +ffffffff82d66bf0 r dte_data_tahiti +ffffffff82d66cc0 r dte_data_new_zealand +ffffffff82d66d90 r dte_data_malta +ffffffff82d66e60 r lcac_pitcairn +ffffffff82d67530 r cac_override_pitcairn +ffffffff82d67544 r powertune_data_pitcairn +ffffffff82d67580 r lcac_cape_verde +ffffffff82d679d0 r cac_override_cape_verde +ffffffff82d679e4 r powertune_data_cape_verde +ffffffff82d67a20 r cac_weights_cape_verde_pro +ffffffff82d67ef0 r cac_weights_heathrow +ffffffff82d683c0 r cac_weights_chelsea_xt +ffffffff82d68890 r cac_weights_chelsea_pro +ffffffff82d68d60 r cac_weights_cape_verde +ffffffff82d69230 r cac_weights_mars_pro +ffffffff82d69700 r lcac_mars_pro +ffffffff82d69a60 r cac_override_oland +ffffffff82d69a74 r powertune_data_mars_pro +ffffffff82d69ab0 r cac_weights_mars_xt +ffffffff82d69f80 r cac_weights_oland_pro +ffffffff82d6a450 r cac_weights_oland_xt +ffffffff82d6a920 r lcac_oland +ffffffff82d6ac7c r powertune_data_oland +ffffffff82d6acc0 r cac_weights_hainan +ffffffff82d6b184 r powertune_data_hainan +ffffffff82d6b1c0 r dte_data_aruba_pro +ffffffff82d6b290 r dte_data_tahiti_pro +ffffffff82d6b360 r dte_data_curacao_pro +ffffffff82d6b430 r dte_data_neptune_xt +ffffffff82d6b500 r dte_data_sun_xt +ffffffff82d6b5d0 r dte_data_venus_xtx +ffffffff82d6b6a0 r dte_data_venus_xt +ffffffff82d6b770 r dte_data_venus_pro +ffffffff82d6b840 r dte_data_mars_pro +ffffffff82d6c000 r si_program_jump_on_start.data +ffffffff82d6d000 r sumo_dtc +ffffffff82d6e000 r trinity_mgcg_shls_default +ffffffff82d6e380 r trinity_sysls_enable +ffffffff82d6e450 r trinity_sysls_disable +ffffffff82d70000 r GC_BASE +ffffffff82d700a8 r HDP_BASE +ffffffff82d70150 r MMHUB_BASE +ffffffff82d701f8 r ATHUB_BASE +ffffffff82d702a0 r NBIO_BASE +ffffffff82d70348 r MP0_BASE +ffffffff82d703f0 r MP1_BASE +ffffffff82d70498 r DF_BASE +ffffffff82d70540 r OSSSYS_BASE +ffffffff82d705e8 r SDMA0_BASE +ffffffff82d70690 r SDMA1_BASE +ffffffff82d70738 r SDMA2_BASE +ffffffff82d707e0 r SDMA3_BASE +ffffffff82d70888 r SDMA4_BASE +ffffffff82d70930 r SMUIO_BASE +ffffffff82d709d8 r THM_BASE +ffffffff82d70a80 r UMC_BASE +ffffffff82d70b28 r VCN_BASE +ffffffff82d71000 r amdgpu_afmt_predefined_acr +ffffffff82d72000 r atom_op_names +ffffffff82d723e0 r opcode_table +ffffffff82d72bd0 r atom_dst_to_src +ffffffff82d72c50 r atom_io_names +ffffffff82d72c80 r atom_table_names +ffffffff82d72ed0 r atom_iio_len +ffffffff82d73000 r object_connector_convert +ffffffff82d73058 R amdgpu_vbios_version_attr_group +ffffffff82d74000 r voltage_names +ffffffff82d74020 r pre_emph_names +ffffffff82d75000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82d77000 r amdgpu_benchmark.common_modes +ffffffff82d78000 r amdgpu_cgs_ops +ffffffff82d79000 r amdgpu_connector_dp_funcs +ffffffff82d79078 r amdgpu_connector_dp_helper_funcs +ffffffff82d790d8 r amdgpu_connector_edp_funcs +ffffffff82d79150 r amdgpu_connector_vga_funcs +ffffffff82d791c8 r amdgpu_connector_vga_helper_funcs +ffffffff82d79228 r amdgpu_connector_dvi_funcs +ffffffff82d792a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82d79300 r amdgpu_connector_lvds_funcs +ffffffff82d79378 r amdgpu_connector_lvds_helper_funcs +ffffffff82d793e0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82d7b000 R amdgpu_ctx_num_entities +ffffffff82d7c000 r amdgpu_kms_driver +ffffffff82d7c0f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82d7d000 r hw_id_map +ffffffff82d7d090 r hw_id_names +ffffffff82d7e000 r hpd_names +ffffffff82d7e030 r encoder_names +ffffffff82d7e180 r dcc_retile_formats +ffffffff82d7e270 r dcc_formats +ffffffff82d7e360 R amdgpu_mode_funcs +ffffffff82d7e3b0 r amdgpu_underscan_enum_list +ffffffff82d7e3e0 r amdgpu_audio_enum_list +ffffffff82d7e410 r amdgpu_dither_enum_list +ffffffff82d7e430 r amdgpu_fb_funcs_atomic +ffffffff82d7e448 r amdgpu_fb_funcs +ffffffff82d7f000 R amdgpu_dmabuf_ops +ffffffff82d80000 R amdgpu_ioctls_kms +ffffffff82d80210 R amdgpu_partition_driver +ffffffff82d802f8 R amdgpu_ca +ffffffff82d80320 r pciidlist +ffffffff82d811f0 r amdgpu_unsupported_pciidlist +ffffffff82d81770 r amdgpu_kms_driver +ffffffff82d82000 r amdgpu_job_fence_ops +ffffffff82d82040 r amdgpu_fence_ops +ffffffff82d83000 r amdgpu_gem_object_funcs +ffffffff82d83070 r amdgpu_gem_vm_ops +ffffffff82d84000 R amdgpu_gtt_mgr_attr_group +ffffffff82d84018 r amdgpu_gtt_mgr_func +ffffffff82d85000 r amdgpu_atombios_i2c_algo +ffffffff82d86000 R node_id_to_phys_map +ffffffff82d87000 R amdgpu_sched_ops +ffffffff82d89000 r amdgpu_vram_names +ffffffff82d8a000 r amdgpu_preempt_mgr_func +ffffffff82d8b000 R psp_ip_funcs +ffffffff82d8b0a8 R psp_v3_1_ip_block +ffffffff82d8b0c0 R psp_v10_0_ip_block +ffffffff82d8b0d8 R psp_v11_0_ip_block +ffffffff82d8b0f0 R psp_v11_0_8_ip_block +ffffffff82d8b108 R psp_v12_0_ip_block +ffffffff82d8b120 R psp_v13_0_ip_block +ffffffff82d8b138 R psp_v13_0_4_ip_block +ffffffff82d8d000 r sw_ring_info +ffffffff82d8e000 r amdgpu_evict_flags.placements +ffffffff82d92000 R amdgpu_vkms_ip_block +ffffffff82d93000 R amdgpu_vm_cpu_funcs +ffffffff82d95000 R amdgpu_vm_sdma_funcs +ffffffff82d96000 R amdgpu_vram_mgr_attr_group +ffffffff82d96018 r amdgpu_vram_mgr_func +ffffffff82d96040 r amdgpu_dummy_vram_mgr_func +ffffffff82d97000 r xgmi_pcs_err_status_reg_arct +ffffffff82d97020 r xgmi3x16_pcs_ras_fields +ffffffff82d971f0 r xgmi_pcs_ras_fields +ffffffff82d97310 r wafl_pcs_ras_fields +ffffffff82d98000 r GC_BASE +ffffffff82d980c0 r HDP_BASE +ffffffff82d98180 r MMHUB_BASE +ffffffff82d98240 r ATHUB_BASE +ffffffff82d98300 r NBIF0_BASE +ffffffff82d983c0 r MP0_BASE +ffffffff82d98480 r MP1_BASE +ffffffff82d98540 r UVD_BASE +ffffffff82d98600 r DF_BASE +ffffffff82d986c0 r OSSSYS_BASE +ffffffff82d98780 r SDMA0_BASE +ffffffff82d98840 r SDMA1_BASE +ffffffff82d98900 r SDMA2_BASE +ffffffff82d989c0 r SDMA3_BASE +ffffffff82d98a80 r SDMA4_BASE +ffffffff82d98b40 r SDMA5_BASE +ffffffff82d98c00 r SDMA6_BASE +ffffffff82d98cc0 r SDMA7_BASE +ffffffff82d98d80 r SMUIO_BASE +ffffffff82d98e40 r THM_BASE +ffffffff82d98f00 r UMC_BASE +ffffffff82d98fc0 r RSMU_BASE +ffffffff82d9a000 r cz_ih_ip_funcs +ffffffff82d9a0a8 R cz_ih_ip_block +ffffffff82d9a0c0 r cz_ih_funcs +ffffffff82d9b000 r crtc_offsets +ffffffff82d9b020 r dce_v10_0_ip_funcs +ffffffff82d9b0c8 R dce_v10_0_ip_block +ffffffff82d9b0e0 R dce_v10_1_ip_block +ffffffff82d9b0f8 r dce_v10_0_display_funcs +ffffffff82d9b150 r hpd_offsets +ffffffff82d9b168 r dce_v10_0_encoder_funcs +ffffffff82d9b188 r dce_v10_0_dac_helper_funcs +ffffffff82d9b1f0 r dce_v10_0_dig_helper_funcs +ffffffff82d9b258 r dce_v10_0_ext_helper_funcs +ffffffff82d9b2c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82d9b2f0 r dce_v10_0_crtc_irq_funcs +ffffffff82d9b300 r dce_v10_0_pageflip_irq_funcs +ffffffff82d9b310 r dce_v10_0_hpd_irq_funcs +ffffffff82d9b320 r interrupt_status_offsets +ffffffff82d9b380 r dce_v10_0_crtc_funcs +ffffffff82d9b440 r dce_v10_0_crtc_helper_funcs +ffffffff82d9b4c0 r vga_control_regs +ffffffff82d9b4e0 r dig_offsets +ffffffff82d9b500 r pin_offsets +ffffffff82d9b520 r fiji_mgcg_cgcg_init +ffffffff82d9b540 r golden_settings_fiji_a10 +ffffffff82d9b570 r tonga_mgcg_cgcg_init +ffffffff82d9b590 r golden_settings_tonga_a11 +ffffffff82d9c000 r crtc_offsets +ffffffff82d9c020 r dce_v11_0_ip_funcs +ffffffff82d9c0c8 R dce_v11_0_ip_block +ffffffff82d9c0e0 R dce_v11_2_ip_block +ffffffff82d9c0f8 r dce_v11_0_display_funcs +ffffffff82d9c150 r hpd_offsets +ffffffff82d9c168 r dce_v11_0_encoder_funcs +ffffffff82d9c188 r dce_v11_0_dac_helper_funcs +ffffffff82d9c1f0 r dce_v11_0_dig_helper_funcs +ffffffff82d9c258 r dce_v11_0_ext_helper_funcs +ffffffff82d9c2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82d9c2f0 r dce_v11_0_crtc_irq_funcs +ffffffff82d9c300 r dce_v11_0_pageflip_irq_funcs +ffffffff82d9c310 r dce_v11_0_hpd_irq_funcs +ffffffff82d9c320 r interrupt_status_offsets +ffffffff82d9c380 r dce_v11_0_crtc_funcs +ffffffff82d9c440 r dce_v11_0_crtc_helper_funcs +ffffffff82d9c4c0 r vga_control_regs +ffffffff82d9c4e0 r dig_offsets +ffffffff82d9c510 r cz_mgcg_cgcg_init +ffffffff82d9c530 r cz_golden_settings_a11 +ffffffff82d9c550 r stoney_golden_settings_a11 +ffffffff82d9c570 r polaris11_golden_settings_a11 +ffffffff82d9c5b0 r polaris10_golden_settings_a11 +ffffffff82d9d000 R df_v1_7_funcs +ffffffff82d9d070 r df_v1_7_channel_number +ffffffff82d9e000 R df_v3_6_funcs +ffffffff82d9e070 r df_v3_6_channel_number +ffffffff82d9f000 R df_v4_3_funcs +ffffffff82da0000 r GC_BASE +ffffffff82da00a8 r HDP_BASE +ffffffff82da0150 r MMHUB_BASE +ffffffff82da01f8 r ATHUB_BASE +ffffffff82da02a0 r NBIO_BASE +ffffffff82da0348 r MP0_BASE +ffffffff82da03f0 r MP1_BASE +ffffffff82da0498 r VCN0_BASE +ffffffff82da0540 r DF_BASE +ffffffff82da05e8 r DCN_BASE +ffffffff82da0690 r OSSSYS_BASE +ffffffff82da0738 r SMUIO_BASE +ffffffff82da07e0 r THM_BASE +ffffffff82da1000 r gfx_v10_0_ip_funcs +ffffffff82da10a8 R gfx_v10_0_ip_block +ffffffff82da10c0 r gfx_v10_0_gfx_funcs +ffffffff82da1120 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82da73c0 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82daade0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82db1080 r gfx_v10_0_kiq_pm4_funcs +ffffffff82db10c0 r gfx_v10_0_ring_funcs_kiq +ffffffff82db1200 r gfx_v10_0_ring_funcs_gfx +ffffffff82db1340 r gfx_v10_0_ring_funcs_compute +ffffffff82db1480 r gfx_v10_0_eop_irq_funcs +ffffffff82db1490 r gfx_v10_0_kiq_irq_funcs +ffffffff82db14a0 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82db14b0 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82db14c0 r gfx_v10_0_rlc_funcs +ffffffff82db1528 r gfx_v10_0_rlc_funcs_sriov +ffffffff82db1590 r gfx10_cs_data +ffffffff82db15b0 r gfx10_SECT_CONTEXT_defs +ffffffff82db1640 r gfx10_SECT_CONTEXT_def_1 +ffffffff82db19a0 r gfx10_SECT_CONTEXT_def_3 +ffffffff82db19b0 r gfx10_SECT_CONTEXT_def_4 +ffffffff82db1c28 r gfx10_SECT_CONTEXT_def_5 +ffffffff82db1c30 r gfx10_SECT_CONTEXT_def_6 +ffffffff82db1c40 r gfx10_SECT_CONTEXT_def_2 +ffffffff82db2080 r gfx10_SECT_CONTEXT_def_7 +ffffffff82db2190 r gfx10_SECT_CONTEXT_def_8 +ffffffff82db24c0 r golden_settings_gc_10_1 +ffffffff82db2880 r golden_settings_gc_10_0_nv10 +ffffffff82db2880 r golden_settings_gc_10_1_1 +ffffffff82db2c10 r golden_settings_gc_10_1_2 +ffffffff82db2c10 r golden_settings_gc_10_1_nv14 +ffffffff82db3000 r golden_settings_gc_10_1_2_nv12 +ffffffff82db3000 r golden_settings_gc_10_3 +ffffffff82db3408 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82db3410 r golden_settings_gc_10_3_2 +ffffffff82db3800 r golden_settings_gc_10_3_vangogh +ffffffff82db3a60 r golden_settings_gc_10_3_3 +ffffffff82db3c40 r golden_settings_gc_10_3_4 +ffffffff82db3fa0 r golden_settings_gc_10_3_5 +ffffffff82db42a0 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82db45d0 r golden_settings_gc_10_3_6 +ffffffff82db47e0 r golden_settings_gc_10_3_7 +ffffffff82db5000 r gfx_v11_0_ip_funcs +ffffffff82db50a8 R gfx_v11_0_ip_block +ffffffff82db50c0 r gfx_v11_0_gfx_funcs +ffffffff82db5120 r gfx_v11_0_kiq_pm4_funcs +ffffffff82db5160 r gfx_v11_0_ring_funcs_kiq +ffffffff82db52a0 r gfx_v11_0_ring_funcs_gfx +ffffffff82db53e0 r gfx_v11_0_ring_funcs_compute +ffffffff82db5520 r gfx_v11_0_eop_irq_funcs +ffffffff82db5530 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82db5540 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82db5550 r gfx_v11_0_rlc_gc_fed_irq_funcs +ffffffff82db5560 r gfx_v11_0_rlc_funcs +ffffffff82db55d0 r gfx11_cs_data +ffffffff82db55f0 r gfx11_SECT_CONTEXT_defs +ffffffff82db5670 r gfx11_SECT_CONTEXT_def_1 +ffffffff82db59d0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82db59e0 r gfx11_SECT_CONTEXT_def_5 +ffffffff82db59e8 r gfx11_SECT_CONTEXT_def_6 +ffffffff82db59f0 r gfx11_SECT_CONTEXT_def_2 +ffffffff82db5e30 r gfx11_SECT_CONTEXT_def_4 +ffffffff82db60b0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82db6520 r golden_settings_gc_11_0_1 +ffffffff82db6600 r golden_settings_gc_11_0 +ffffffff82db7000 r gfx_v8_0_ip_funcs +ffffffff82db70a8 R gfx_v8_0_ip_block +ffffffff82db70c0 R gfx_v8_1_ip_block +ffffffff82db70d8 r gfx_v8_0_gfx_funcs +ffffffff82db7138 r gfx_v8_0_ring_funcs_kiq +ffffffff82db7278 r gfx_v8_0_ring_funcs_gfx +ffffffff82db73b8 r gfx_v8_0_ring_funcs_compute +ffffffff82db7500 r amdgpu_gds_reg_offset +ffffffff82db7600 r gfx_v8_0_eop_irq_funcs +ffffffff82db7610 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82db7620 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82db7630 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82db7640 r gfx_v8_0_sq_irq_funcs +ffffffff82db7650 r sq_edc_source_names +ffffffff82db7688 r iceland_rlc_funcs +ffffffff82db76f0 r vi_cs_data +ffffffff82db7710 r vi_SECT_CONTEXT_defs +ffffffff82db7790 r vi_SECT_CONTEXT_def_1 +ffffffff82db7ae0 r vi_SECT_CONTEXT_def_3 +ffffffff82db7b00 r vi_SECT_CONTEXT_def_4 +ffffffff82db7d74 r vi_SECT_CONTEXT_def_5 +ffffffff82db7d7c r vi_SECT_CONTEXT_def_6 +ffffffff82db7d80 r vi_SECT_CONTEXT_def_2 +ffffffff82db81d0 r vi_SECT_CONTEXT_def_7 +ffffffff82db8580 r vgpr_init_compute_shader +ffffffff82db8690 r vgpr_init_regs +ffffffff82db8720 r sgpr1_init_regs +ffffffff82db87b0 r sgpr2_init_regs +ffffffff82db8840 r sec_ded_counter_registers +ffffffff82db88b0 r iceland_mgcg_cgcg_init +ffffffff82db8bb0 r golden_settings_iceland_a11 +ffffffff82db8c70 r iceland_golden_common_all +ffffffff82db8cd0 r fiji_mgcg_cgcg_init +ffffffff82db8e80 r golden_settings_fiji_a10 +ffffffff82db8f10 r fiji_golden_common_all +ffffffff82db8f90 r tonga_mgcg_cgcg_init +ffffffff82db9320 r golden_settings_tonga_a11 +ffffffff82db93e0 r tonga_golden_common_all +ffffffff82db9440 r golden_settings_vegam_a11 +ffffffff82db9510 r vegam_golden_common_all +ffffffff82db9560 r golden_settings_polaris11_a11 +ffffffff82db9630 r polaris11_golden_common_all +ffffffff82db9680 r golden_settings_polaris10_a11 +ffffffff82db9750 r polaris10_golden_common_all +ffffffff82db97b0 r cz_mgcg_cgcg_init +ffffffff82db9b40 r cz_golden_settings_a11 +ffffffff82db9bd0 r cz_golden_common_all +ffffffff82db9c30 r stoney_mgcg_cgcg_init +ffffffff82db9c70 r stoney_golden_settings_a11 +ffffffff82db9cf0 r stoney_golden_common_all +ffffffff82dba000 R gfx_v9_0_ras_ops +ffffffff82dba040 r gfx_v9_0_ip_funcs +ffffffff82dba0e8 R gfx_v9_0_ip_block +ffffffff82dba100 r ras_gfx_subblocks +ffffffff82dbab80 r gfx_v9_0_edc_counter_regs +ffffffff82dbaf20 r gfx_v9_0_ras_fields +ffffffff82dbc000 r gfx_v9_0_gfx_funcs +ffffffff82dbc060 r gfx_v9_0_kiq_pm4_funcs +ffffffff82dbc0a0 r gfx_v9_0_ring_funcs_kiq +ffffffff82dbc1e0 r gfx_v9_0_ring_funcs_gfx +ffffffff82dbc320 r gfx_v9_0_sw_ring_funcs_gfx +ffffffff82dbc460 r gfx_v9_0_ring_funcs_compute +ffffffff82dbc5a0 r gfx_v9_0_eop_irq_funcs +ffffffff82dbc5b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82dbc5c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82dbc5d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82dbc5e0 r gfx_v9_0_rlc_funcs +ffffffff82dbc650 r gfx9_cs_data +ffffffff82dbc670 r gfx9_SECT_CONTEXT_defs +ffffffff82dbc700 r gfx9_SECT_CONTEXT_def_1 +ffffffff82dbca50 r gfx9_SECT_CONTEXT_def_3 +ffffffff82dbca60 r gfx9_SECT_CONTEXT_def_4 +ffffffff82dbccd4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82dbccdc r gfx9_SECT_CONTEXT_def_6 +ffffffff82dbcce0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82dbcdf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82dbd260 r gfx9_SECT_CONTEXT_def_8 +ffffffff82dbd4d0 r vgpr_init_compute_shader_arcturus +ffffffff82dbdd60 r vgpr_init_regs_arcturus +ffffffff82dbdef0 r vgpr_init_regs +ffffffff82dbe080 r sgpr1_init_regs +ffffffff82dbe210 r sgpr2_init_regs +ffffffff82dbe3a0 r golden_settings_gc_9_0 +ffffffff82dbe580 r golden_settings_gc_9_0_vg10 +ffffffff82dbe730 r golden_settings_gc_9_2_1 +ffffffff82dbe8b0 r golden_settings_gc_9_2_1_vg12 +ffffffff82dbe9f0 r golden_settings_gc_9_0_vg20 +ffffffff82dbeb00 r golden_settings_gc_9_4_1_arct +ffffffff82dbec10 r golden_settings_gc_9_1 +ffffffff82dbee50 r golden_settings_gc_9_1_rv2 +ffffffff82dbf020 r golden_settings_gc_9_1_rv1 +ffffffff82dbf0d0 r golden_settings_gc_9_1_rn +ffffffff82dbf1f0 r golden_settings_gc_9_x_common +ffffffff82dc0000 R gfx_v9_4_ras_ops +ffffffff82dc0040 r gfx_v9_4_edc_counter_regs +ffffffff82dc0420 r gfx_v9_4_ras_fields +ffffffff82dc2000 R vgpr_init_regs_aldebaran +ffffffff82dc21b0 R sgpr112_init_regs_aldebaran +ffffffff82dc2360 R sgpr96_init_regs_aldebaran +ffffffff82dc2510 R sgpr64_init_regs_aldebaran +ffffffff82dc26c0 r golden_settings_gc_9_4_2_alde +ffffffff82dc2720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82dc27b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82dc2840 r sgpr112_init_compute_shader_aldebaran +ffffffff82dc2a60 r sgpr96_init_compute_shader_aldebaran +ffffffff82dc2c50 r sgpr64_init_compute_shader_aldebaran +ffffffff82dc2dc0 r vgpr_init_compute_shader_aldebaran +ffffffff82dc36a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82dc3a20 r gfx_v9_4_2_ras_fields +ffffffff82dc53c0 r gfx_v9_4_2_utc_blocks +ffffffff82dc6000 r gfx_v9_4_3_ip_funcs +ffffffff82dc60a8 R gfx_v9_4_3_ip_block +ffffffff82dc60c0 r gfx_v9_4_3_kiq_pm4_funcs +ffffffff82dc6100 r gfx_v9_4_3_ring_funcs_kiq +ffffffff82dc6240 r gfx_v9_4_3_ring_funcs_compute +ffffffff82dc6380 r gfx_v9_4_3_eop_irq_funcs +ffffffff82dc6390 r gfx_v9_4_3_priv_reg_irq_funcs +ffffffff82dc63a0 r gfx_v9_4_3_priv_inst_irq_funcs +ffffffff82dc63b0 r gfx_v9_4_3_rlc_funcs +ffffffff82dc6418 r gfx_v9_4_3_gfx_funcs +ffffffff82dc6480 r gfx_v9_4_3_ce_reg_list +ffffffff82dc6810 r gfx_v9_4_3_ras_mem_list_array +ffffffff82dc6970 r gfx_v9_4_3_ue_reg_list +ffffffff82dc6d30 r gfx_v9_4_3_ras_cp_mem_list +ffffffff82dc6d80 r gfx_v9_4_3_ras_gcea_mem_list +ffffffff82dc6ec0 r gfx_v9_4_3_ras_gc_cane_mem_list +ffffffff82dc6ed0 r gfx_v9_4_3_ras_gcutcl2_mem_list +ffffffff82dc6ee0 r gfx_v9_4_3_ras_gds_mem_list +ffffffff82dc6ef0 r gfx_v9_4_3_ras_lds_mem_list +ffffffff82dc7110 r gfx_v9_4_3_ras_rlc_mem_list +ffffffff82dc7190 r gfx_v9_4_3_ras_sp_mem_list +ffffffff82dc71a0 r gfx_v9_4_3_ras_spi_mem_list +ffffffff82dc71e0 r gfx_v9_4_3_ras_sqc_mem_list +ffffffff82dc7350 r gfx_v9_4_3_ras_sq_mem_list +ffffffff82dc7390 r gfx_v9_4_3_ras_ta_mem_list +ffffffff82dc73e0 r gfx_v9_4_3_ras_tcc_mem_list +ffffffff82dc73f0 r gfx_v9_4_3_ras_tca_mem_list +ffffffff82dc7400 r gfx_v9_4_3_ras_tci_mem_list +ffffffff82dc7410 r gfx_v9_4_3_ras_tcp_mem_list +ffffffff82dc75a0 r gfx_v9_4_3_ras_td_mem_list +ffffffff82dc75d0 r gfx_v9_4_3_ras_tcx_mem_list +ffffffff82dc7b50 r gfx_v9_4_3_ras_atc_l2_mem_list +ffffffff82dc7b60 r gfx_v9_4_3_ras_utcl2_mem_list +ffffffff82dc7b70 r gfx_v9_4_3_ras_vml2_mem_list +ffffffff82dc7b80 r gfx_v9_4_3_ras_vml2_walker_mem_list +ffffffff82dc8000 R gfxhub_v1_0_funcs +ffffffff82dc9000 R gfxhub_v1_2_funcs +ffffffff82dca000 R gfxhub_v2_0_funcs +ffffffff82dca060 r gfxhub_v2_0_vmhub_funcs ffffffff82dca070 r gfxhub_client_ids -ffffffff82dcb000 R gfxhub_v3_0_3_funcs -ffffffff82dcb060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82dcb000 R gfxhub_v2_1_funcs +ffffffff82dcb060 r gfxhub_v2_1_vmhub_funcs ffffffff82dcb070 r gfxhub_client_ids -ffffffff82dcc000 R gmc_v10_0_ip_funcs -ffffffff82dcc0a8 R gmc_v10_0_ip_block -ffffffff82dcc0c0 r gmc_v10_0_gmc_funcs -ffffffff82dcc118 r gmc_v10_0_irq_funcs -ffffffff82dcc128 r gmc_v10_0_ecc_funcs -ffffffff82dcd000 R gmc_v11_0_ip_funcs -ffffffff82dcd0a8 R gmc_v11_0_ip_block -ffffffff82dcd0c0 r gmc_v11_0_gmc_funcs -ffffffff82dcd118 r gmc_v11_0_irq_funcs -ffffffff82dcd128 r gmc_v11_0_ecc_funcs -ffffffff82dce000 r gmc_v7_0_ip_funcs -ffffffff82dce0a8 R gmc_v7_0_ip_block -ffffffff82dce0c0 R gmc_v7_4_ip_block -ffffffff82dce0d8 r gmc_v7_0_gmc_funcs -ffffffff82dce130 r gmc_v7_0_irq_funcs -ffffffff82dce140 r iceland_mgcg_cgcg_init -ffffffff82dce150 r golden_settings_iceland_a11 -ffffffff82dce180 r mc_cg_registers -ffffffff82dce1b0 r mc_cg_en -ffffffff82dce1e0 r mc_cg_ls_en -ffffffff82dcf000 r gmc_v8_0_ip_funcs -ffffffff82dcf0a8 R gmc_v8_0_ip_block -ffffffff82dcf0c0 R gmc_v8_1_ip_block -ffffffff82dcf0d8 R gmc_v8_5_ip_block -ffffffff82dcf0f0 r gmc_v8_0_gmc_funcs -ffffffff82dcf148 r gmc_v8_0_irq_funcs -ffffffff82dcf158 r fiji_mgcg_cgcg_init -ffffffff82dcf170 r golden_settings_fiji_a10 -ffffffff82dcf1a0 r tonga_mgcg_cgcg_init -ffffffff82dcf1b0 r golden_settings_tonga_a11 -ffffffff82dcf210 r golden_settings_polaris11_a11 -ffffffff82dcf240 r golden_settings_polaris10_a11 -ffffffff82dcf27c r cz_mgcg_cgcg_init -ffffffff82dcf290 r stoney_mgcg_cgcg_init -ffffffff82dcf2b0 r golden_settings_stoney_common -ffffffff82dd0000 R gmc_v9_0_ip_funcs -ffffffff82dd00a8 R gmc_v9_0_ip_block -ffffffff82dd00c0 r gmc_v9_0_gmc_funcs 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vcn_v4_0_irq_funcs -ffffffff82e28110 r vcn_v4_0_ras_irq_funcs -ffffffff82e29000 r vcn_v4_0_3_ip_funcs -ffffffff82e290a8 R vcn_v4_0_3_ip_block -ffffffff82e290c0 r vcn_v4_0_3_unified_ring_vm_funcs -ffffffff82e29200 r vcn_v4_0_3_irq_funcs -ffffffff82e29210 r vcn_v4_0_3_ras_hw_ops -ffffffff82e29250 r vcn_v4_0_3_ue_reg_list -ffffffff82e2a000 R vega10_ih_ip_funcs -ffffffff82e2a0a8 R vega10_ih_ip_block -ffffffff82e2a0c0 r vega10_ih_funcs -ffffffff82e2a0e0 r vega10_ih_self_irq_funcs -ffffffff82e2b000 r GC_BASE -ffffffff82e2b064 r HDP_BASE -ffffffff82e2b0c8 r MMHUB_BASE -ffffffff82e2b12c r ATHUB_BASE -ffffffff82e2b190 r NBIO_BASE -ffffffff82e2b1f4 r MP0_BASE -ffffffff82e2b258 r MP1_BASE -ffffffff82e2b2bc r VCE_BASE -ffffffff82e2b320 r VCN_BASE -ffffffff82e2b384 r DF_BASE -ffffffff82e2b3e8 r DCE_BASE -ffffffff82e2b44c r OSSSYS_BASE -ffffffff82e2b4b0 r SDMA0_BASE -ffffffff82e2b514 r SDMA1_BASE -ffffffff82e2b578 r SMUIO_BASE -ffffffff82e2b5dc r PWR_BASE -ffffffff82e2b640 r NBIF_BASE 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gmc_v7_0_gmc_funcs +ffffffff82dd0130 r gmc_v7_0_irq_funcs +ffffffff82dd0140 r iceland_mgcg_cgcg_init +ffffffff82dd0150 r golden_settings_iceland_a11 +ffffffff82dd0180 r mc_cg_registers +ffffffff82dd01b0 r mc_cg_en +ffffffff82dd01e0 r mc_cg_ls_en +ffffffff82dd1000 r gmc_v8_0_ip_funcs +ffffffff82dd10a8 R gmc_v8_0_ip_block +ffffffff82dd10c0 R gmc_v8_1_ip_block +ffffffff82dd10d8 R gmc_v8_5_ip_block +ffffffff82dd10f0 r gmc_v8_0_gmc_funcs +ffffffff82dd1148 r gmc_v8_0_irq_funcs +ffffffff82dd1158 r fiji_mgcg_cgcg_init +ffffffff82dd1170 r golden_settings_fiji_a10 +ffffffff82dd11a0 r tonga_mgcg_cgcg_init +ffffffff82dd11b0 r golden_settings_tonga_a11 +ffffffff82dd1210 r golden_settings_polaris11_a11 +ffffffff82dd1240 r golden_settings_polaris10_a11 +ffffffff82dd127c r cz_mgcg_cgcg_init +ffffffff82dd1290 r stoney_mgcg_cgcg_init +ffffffff82dd12b0 r golden_settings_stoney_common +ffffffff82dd2000 R gmc_v9_0_ip_funcs +ffffffff82dd20a8 R gmc_v9_0_ip_block +ffffffff82dd20c0 r gmc_v9_0_gmc_funcs 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+ffffffff82ddb0e0 r ih_v6_0_self_irq_funcs +ffffffff82ddc000 r ih_v6_1_ip_funcs +ffffffff82ddc0a8 R ih_v6_1_ip_block +ffffffff82ddc0c0 r ih_v6_1_funcs +ffffffff82ddc0e0 r ih_v6_1_self_irq_funcs +ffffffff82ddd000 R gfx_v11_0_imu_funcs +ffffffff82ddd030 r imu_rlc_ram_golden_11 +ffffffff82ddd680 r imu_rlc_ram_golden_11_0_2 +ffffffff82dde000 r imu_rlc_ram_golden_11_0_3 +ffffffff82ddf000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82ddf140 r jpeg_v1_0_irq_funcs +ffffffff82de0000 r jpeg_v2_0_ip_funcs +ffffffff82de00a8 R jpeg_v2_0_ip_block +ffffffff82de00c0 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82de0200 r jpeg_v2_0_irq_funcs +ffffffff82de1000 r jpeg_v2_5_ip_funcs +ffffffff82de10a8 R jpeg_v2_5_ip_block +ffffffff82de10c0 r jpeg_v2_6_ip_funcs +ffffffff82de1168 R jpeg_v2_6_ip_block +ffffffff82de1180 R jpeg_v2_6_ras_hw_ops +ffffffff82de11c0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82de1300 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82de1440 r jpeg_v2_5_irq_funcs +ffffffff82de1450 r jpeg_v2_6_ras_irq_funcs +ffffffff82de2000 r jpeg_v3_0_ip_funcs +ffffffff82de20a8 R jpeg_v3_0_ip_block +ffffffff82de20c0 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82de2200 r jpeg_v3_0_irq_funcs +ffffffff82de3000 r jpeg_v4_0_ip_funcs +ffffffff82de30a8 R jpeg_v4_0_ip_block +ffffffff82de30c0 R jpeg_v4_0_ras_hw_ops +ffffffff82de3100 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82de3240 r jpeg_v4_0_irq_funcs +ffffffff82de3250 r jpeg_v4_0_ras_irq_funcs +ffffffff82de4000 r jpeg_v4_0_3_ip_funcs +ffffffff82de40a8 R jpeg_v4_0_3_ip_block +ffffffff82de40c0 r jpeg_v4_0_3_dec_ring_vm_funcs +ffffffff82de4200 r jpeg_v4_0_3_irq_funcs +ffffffff82de4210 r jpeg_v4_0_3_ras_hw_ops +ffffffff82de4250 r jpeg_v4_0_3_ue_reg_list +ffffffff82de5000 R lsdma_v6_0_funcs +ffffffff82de6000 r mca_v3_0_mp0_hw_ops +ffffffff82de6040 r mca_v3_0_mp1_hw_ops +ffffffff82de6080 r mca_v3_0_mpio_hw_ops +ffffffff82de7000 r mes_v10_1_ip_funcs +ffffffff82de70a8 R mes_v10_1_ip_block +ffffffff82de70c0 r mes_v10_1_funcs +ffffffff82de70f0 r mes_v10_1_ring_funcs +ffffffff82de8000 r mes_v11_0_ip_funcs +ffffffff82de80a8 R mes_v11_0_ip_block +ffffffff82de80c0 r mes_v11_0_funcs +ffffffff82de80f0 r mes_v11_0_ring_funcs +ffffffff82de9000 R mmhub_v1_0_funcs +ffffffff82de9050 r mmhub_v1_0_edc_cnt_regs +ffffffff82de90c0 r mmhub_v1_0_ras_fields +ffffffff82dea000 R mmhub_v1_7_funcs +ffffffff82dea050 r mmhub_v1_7_edc_cnt_regs +ffffffff82dea250 r mmhub_v1_7_ras_fields +ffffffff82deb9c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82dec000 R mmhub_v1_8_funcs +ffffffff82dec050 r mmhub_v1_8_ras_hw_ops +ffffffff82dec090 r mmhub_v1_8_ce_reg_list +ffffffff82dec180 r mmhub_v1_8_ras_memory_list +ffffffff82dec2b0 r mmhub_v1_8_ue_reg_list +ffffffff82ded000 R mmhub_v2_0_funcs +ffffffff82ded050 r mmhub_v2_0_vmhub_funcs +ffffffff82ded060 r mmhub_client_ids_navi1x +ffffffff82ded190 r mmhub_client_ids_sienna_cichlid +ffffffff82ded450 r mmhub_client_ids_beige_goby +ffffffff82dee000 R mmhub_v2_3_funcs +ffffffff82dee050 r mmhub_v2_3_vmhub_funcs +ffffffff82dee060 r mmhub_client_ids_vangogh +ffffffff82def000 R mmhub_v3_0_funcs +ffffffff82def050 r mmhub_v3_0_vmhub_funcs +ffffffff82def060 r mmhub_client_ids_v3_0_0 +ffffffff82df0000 R mmhub_v3_0_1_funcs +ffffffff82df0050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82df0060 r mmhub_client_ids_v3_0_1 +ffffffff82df1000 R mmhub_v3_0_2_funcs +ffffffff82df1050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82df1060 r mmhub_client_ids_v3_0_2 +ffffffff82df2000 R mmhub_v9_4_ras_hw_ops +ffffffff82df2040 R mmhub_v9_4_funcs +ffffffff82df2090 r mmhub_v9_4_edc_cnt_regs +ffffffff82df2330 r mmhub_v9_4_ras_fields +ffffffff82df43b0 r mmhub_v9_4_err_status_regs +ffffffff82df5000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82df5010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82df5020 R xgpu_ai_virt_ops +ffffffff82df6000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82df6010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82df6020 R xgpu_nv_virt_ops +ffffffff82df7000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82df7240 r xgpu_fiji_golden_settings_a10 +ffffffff82df7370 r xgpu_fiji_golden_common_all +ffffffff82df73f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82df7810 r xgpu_tonga_golden_settings_a11 +ffffffff82df79d0 r xgpu_tonga_golden_common_all +ffffffff82df7a28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82df7a38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82df7a48 R xgpu_vi_virt_ops +ffffffff82df8000 r navi10_ih_ip_funcs +ffffffff82df80a8 R navi10_ih_ip_block +ffffffff82df80c0 r navi10_ih_funcs +ffffffff82df80e0 r navi10_ih_self_irq_funcs +ffffffff82df9000 R nbio_v2_3_hdp_flush_reg +ffffffff82df9048 R nbio_v2_3_funcs +ffffffff82dfa000 R nbio_v4_3_hdp_flush_reg +ffffffff82dfa048 R nbio_v4_3_funcs +ffffffff82dfa158 R nbio_v4_3_sriov_funcs +ffffffff82dfa268 r nbio_v4_3_ras_err_event_athub_irq_funcs +ffffffff82dfb000 R nbio_v6_1_hdp_flush_reg +ffffffff82dfb048 R nbio_v6_1_funcs +ffffffff82dfc000 R nbio_v7_0_hdp_flush_reg +ffffffff82dfc048 R nbio_v7_0_funcs +ffffffff82dfd000 R nbio_v7_2_hdp_flush_reg +ffffffff82dfd048 R nbio_v7_2_funcs +ffffffff82dfe000 R nbio_v7_4_hdp_flush_reg +ffffffff82dfe048 R nbio_v7_4_ras_hw_ops +ffffffff82dfe088 R nbio_v7_4_funcs +ffffffff82dfe198 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82dfe1a8 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82dff000 R nbio_v7_7_hdp_flush_reg +ffffffff82dff048 R nbio_v7_7_funcs +ffffffff82e00000 R nbio_v7_9_hdp_flush_reg +ffffffff82e00048 R nbio_v7_9_funcs +ffffffff82e00158 R nbio_v7_9_ras_hw_ops +ffffffff82e00198 r nbio_v7_9_ras_controller_irq_funcs +ffffffff82e001a8 r nbio_v7_9_ras_err_event_athub_irq_funcs +ffffffff82e01000 r nv_common_ip_funcs +ffffffff82e010a8 R nv_common_ip_block +ffffffff82e010c0 r nv_asic_funcs +ffffffff82e01180 r nv_allowed_read_registers +ffffffff82e01300 r sc_video_codecs_encode +ffffffff82e01310 r sc_video_codecs_decode_vcn1 +ffffffff82e01320 r sc_video_codecs_decode_vcn0 +ffffffff82e01330 r yc_video_codecs_decode +ffffffff82e01340 r bg_video_codecs_encode +ffffffff82e01350 r bg_video_codecs_decode +ffffffff82e01360 r nv_video_codecs_encode +ffffffff82e01370 r nv_video_codecs_decode +ffffffff82e01380 r sc_video_codecs_encode_array +ffffffff82e013b0 r sc_video_codecs_decode_array_vcn1 +ffffffff82e01440 r sc_video_codecs_decode_array_vcn0 +ffffffff82e014e0 r yc_video_codecs_decode_array +ffffffff82e01550 r bg_video_codecs_decode_array +ffffffff82e01590 r nv_video_codecs_encode_array +ffffffff82e015c0 r nv_video_codecs_decode_array +ffffffff82e02000 r psp_v10_0_funcs +ffffffff82e03000 r psp_v11_0_funcs +ffffffff82e04000 r psp_v11_0_8_funcs +ffffffff82e05000 r psp_v12_0_funcs +ffffffff82e06000 r psp_v13_0_funcs +ffffffff82e07000 r psp_v13_0_4_funcs +ffffffff82e08000 r psp_v3_1_funcs +ffffffff82e09000 r sdma_v2_4_ip_funcs +ffffffff82e090a8 R sdma_v2_4_ip_block +ffffffff82e090c0 r sdma_v2_4_ring_funcs +ffffffff82e09200 r sdma_v2_4_buffer_funcs +ffffffff82e09220 r sdma_v2_4_vm_pte_funcs +ffffffff82e09240 r sdma_v2_4_trap_irq_funcs +ffffffff82e09250 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82e09260 r iceland_mgcg_cgcg_init +ffffffff82e09280 r golden_settings_iceland_a11 +ffffffff82e0a000 r sdma_v3_0_ip_funcs +ffffffff82e0a0a8 R sdma_v3_0_ip_block +ffffffff82e0a0c0 R sdma_v3_1_ip_block +ffffffff82e0a0d8 r sdma_v3_0_ring_funcs +ffffffff82e0a218 r sdma_v3_0_buffer_funcs +ffffffff82e0a238 r sdma_v3_0_vm_pte_funcs +ffffffff82e0a258 r sdma_v3_0_trap_irq_funcs +ffffffff82e0a268 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82e0a280 r fiji_mgcg_cgcg_init +ffffffff82e0a2a0 r golden_settings_fiji_a10 +ffffffff82e0a300 r tonga_mgcg_cgcg_init +ffffffff82e0a320 r golden_settings_tonga_a11 +ffffffff82e0a3a0 r golden_settings_polaris11_a11 +ffffffff82e0a420 r golden_settings_polaris10_a11 +ffffffff82e0a4a0 r cz_mgcg_cgcg_init +ffffffff82e0a4c0 r cz_golden_settings_a11 +ffffffff82e0a550 r stoney_mgcg_cgcg_init +ffffffff82e0a560 r stoney_golden_settings_a11 +ffffffff82e0b000 R sdma_v4_0_ip_funcs +ffffffff82e0b0a8 R sdma_v4_0_ras_hw_ops +ffffffff82e0b0e8 R sdma_v4_0_ip_block +ffffffff82e0b100 r sdma_v4_0_ring_funcs +ffffffff82e0b240 r sdma_v4_0_page_ring_funcs +ffffffff82e0b380 r sdma_v4_0_buffer_funcs +ffffffff82e0b3a0 r sdma_v4_0_vm_pte_funcs +ffffffff82e0b3c0 r sdma_v4_0_trap_irq_funcs +ffffffff82e0b3d0 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82e0b3e0 r sdma_v4_0_ecc_irq_funcs +ffffffff82e0b3f0 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82e0b400 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82e0b410 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82e0b420 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82e0b430 r golden_settings_sdma_4 +ffffffff82e0b690 r golden_settings_sdma_vg10 +ffffffff82e0b740 r golden_settings_sdma_vg12 +ffffffff82e0b7f0 r golden_settings_sdma0_4_2_init +ffffffff82e0b810 r golden_settings_sdma0_4_2 +ffffffff82e0baa0 r golden_settings_sdma1_4_2 +ffffffff82e0bd30 r golden_settings_sdma_arct +ffffffff82e0c030 r golden_settings_sdma_aldebaran +ffffffff82e0c1a0 r golden_settings_sdma_4_1 +ffffffff82e0c2b0 r golden_settings_sdma_rv2 +ffffffff82e0c2e0 r golden_settings_sdma_rv1 +ffffffff82e0c310 r golden_settings_sdma_4_3 +ffffffff82e0c400 r sdma_v4_0_ras_fields +ffffffff82e0d000 R sdma_v4_4_ras_hw_ops +ffffffff82e0d040 r sdma_v4_4_ras_fields +ffffffff82e0e000 R sdma_v4_4_2_ip_funcs +ffffffff82e0e0a8 R sdma_v4_4_2_ip_block +ffffffff82e0e0c0 r sdma_v4_4_2_ring_funcs +ffffffff82e0e200 r sdma_v4_4_2_page_ring_funcs +ffffffff82e0e340 r sdma_v4_4_2_buffer_funcs +ffffffff82e0e360 r sdma_v4_4_2_vm_pte_funcs +ffffffff82e0e380 r sdma_v4_4_2_trap_irq_funcs +ffffffff82e0e390 r sdma_v4_4_2_illegal_inst_irq_funcs +ffffffff82e0e3a0 r sdma_v4_4_2_ecc_irq_funcs +ffffffff82e0e3b0 r sdma_v4_4_2_vm_hole_irq_funcs +ffffffff82e0e3c0 r sdma_v4_4_2_doorbell_invalid_irq_funcs +ffffffff82e0e3d0 r sdma_v4_4_2_pool_timeout_irq_funcs +ffffffff82e0e3e0 r sdma_v4_4_2_srbm_write_irq_funcs +ffffffff82e0e3f0 r sdma_v4_4_2_ras_hw_ops +ffffffff82e0e430 r sdma_v4_2_2_ue_reg_list +ffffffff82e0e460 r sdma_v4_4_2_ras_memory_list +ffffffff82e0f000 R sdma_v5_0_ip_funcs +ffffffff82e0f0a8 R sdma_v5_0_ip_block +ffffffff82e0f0c0 r sdma_v5_0_ring_funcs +ffffffff82e0f200 r sdma_v5_0_buffer_funcs +ffffffff82e0f220 r sdma_v5_0_vm_pte_funcs +ffffffff82e0f240 r sdma_v5_0_trap_irq_funcs +ffffffff82e0f250 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82e0f260 r golden_settings_sdma_5 +ffffffff82e0f4a0 r golden_settings_sdma_nv10 +ffffffff82e0f4d0 r golden_settings_sdma_nv14 +ffffffff82e0f500 r golden_settings_sdma_5_sriov +ffffffff82e0f6e0 r golden_settings_sdma_nv12 +ffffffff82e0f770 r golden_settings_sdma_cyan_skillfish +ffffffff82e10000 R sdma_v5_2_ip_funcs +ffffffff82e100a8 R sdma_v5_2_ip_block +ffffffff82e100c0 r sdma_v5_2_ring_funcs +ffffffff82e10200 r sdma_v5_2_buffer_funcs +ffffffff82e10220 r sdma_v5_2_vm_pte_funcs +ffffffff82e10240 r sdma_v5_2_trap_irq_funcs +ffffffff82e10250 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82e11000 R sdma_v6_0_ip_funcs +ffffffff82e110a8 R sdma_v6_0_ip_block +ffffffff82e110c0 r sdma_v6_0_ring_funcs +ffffffff82e11200 r sdma_v6_0_buffer_funcs +ffffffff82e11220 r sdma_v6_0_vm_pte_funcs +ffffffff82e11240 r sdma_v6_0_trap_irq_funcs +ffffffff82e11250 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82e12000 r smu_v11_0_i2c_algo +ffffffff82e12010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82e12028 r smu_v11_0_i2c_control_quirks +ffffffff82e13000 R smuio_v11_0_funcs +ffffffff82e14000 R smuio_v11_0_6_funcs +ffffffff82e15000 R smuio_v13_0_funcs +ffffffff82e16000 R smuio_v13_0_3_funcs +ffffffff82e17000 R smuio_v13_0_6_funcs +ffffffff82e18000 R smuio_v9_0_funcs +ffffffff82e19000 r soc15_common_ip_funcs +ffffffff82e190a8 R vega10_common_ip_block +ffffffff82e190c0 r soc15_asic_funcs +ffffffff82e19180 r vega20_asic_funcs +ffffffff82e19240 r aqua_vanjaram_asic_funcs +ffffffff82e19300 r soc15_allowed_read_registers +ffffffff82e19490 r vega_video_codecs_encode +ffffffff82e194a0 r vega_video_codecs_decode +ffffffff82e194b0 r rv_video_codecs_decode +ffffffff82e194c0 r rn_video_codecs_decode +ffffffff82e194d0 r vcn_4_0_3_video_codecs_encode +ffffffff82e194e0 r vcn_4_0_3_video_codecs_decode +ffffffff82e194f0 r vega_video_codecs_encode_array +ffffffff82e19520 r vega_video_codecs_decode_array +ffffffff82e195a0 r rv_video_codecs_decode_array +ffffffff82e19630 r rn_video_codecs_decode_array +ffffffff82e196c0 r vcn_4_0_3_video_codecs_decode_array +ffffffff82e1a000 r soc21_common_ip_funcs +ffffffff82e1a0a8 R soc21_common_ip_block +ffffffff82e1a0c0 r soc21_asic_funcs +ffffffff82e1a180 r soc21_allowed_read_registers +ffffffff82e1a300 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82e1a310 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82e1a320 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82e1a330 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82e1a340 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82e1a370 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82e1a3c0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82e1a400 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82e1b000 r tonga_ih_ip_funcs +ffffffff82e1b0a8 R tonga_ih_ip_block +ffffffff82e1b0c0 r tonga_ih_funcs +ffffffff82e1c000 R umc_v6_0_funcs +ffffffff82e1d000 R umc_v6_1_channel_idx_tbl +ffffffff82e1d080 R umc_v6_1_ras_hw_ops +ffffffff82e1e000 R umc_v6_7_channel_idx_tbl_second +ffffffff82e1e080 R umc_v6_7_channel_idx_tbl_first +ffffffff82e1e100 R umc_v6_7_ras_hw_ops +ffffffff82e1f000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82e1f040 R umc_v8_10_channel_idx_tbl_ext0 +ffffffff82e1f080 R umc_v8_10_channel_idx_tbl +ffffffff82e1f0e0 R umc_v8_10_ras_hw_ops +ffffffff82e20000 R umc_v8_7_channel_idx_tbl +ffffffff82e20040 R umc_v8_7_ras_hw_ops +ffffffff82e21000 r uvd_v5_0_ip_funcs +ffffffff82e210a8 R uvd_v5_0_ip_block +ffffffff82e210c0 r uvd_v5_0_ring_funcs +ffffffff82e21200 r uvd_v5_0_irq_funcs +ffffffff82e22000 r uvd_v6_0_ip_funcs +ffffffff82e220a8 R uvd_v6_0_ip_block +ffffffff82e220c0 R uvd_v6_2_ip_block +ffffffff82e220d8 R uvd_v6_3_ip_block +ffffffff82e220f0 r uvd_v6_0_ring_vm_funcs +ffffffff82e22230 r uvd_v6_0_ring_phys_funcs +ffffffff82e22370 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82e224b0 r uvd_v6_0_irq_funcs +ffffffff82e23000 R uvd_v7_0_ip_funcs +ffffffff82e230a8 R uvd_v7_0_ip_block +ffffffff82e230c0 r uvd_v7_0_ring_vm_funcs +ffffffff82e23200 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82e23340 r uvd_v7_0_irq_funcs +ffffffff82e24000 r vce_v3_0_ip_funcs +ffffffff82e240a8 R vce_v3_0_ip_block +ffffffff82e240c0 R vce_v3_1_ip_block +ffffffff82e240d8 R vce_v3_4_ip_block +ffffffff82e240f0 r vce_v3_0_ring_vm_funcs +ffffffff82e24230 r vce_v3_0_ring_phys_funcs +ffffffff82e24370 r vce_v3_0_irq_funcs +ffffffff82e25000 R vce_v4_0_ip_funcs +ffffffff82e250a8 R vce_v4_0_ip_block +ffffffff82e250c0 r vce_v4_0_ring_vm_funcs +ffffffff82e25200 r vce_v4_0_irq_funcs +ffffffff82e26000 r vcn_v1_0_ip_funcs +ffffffff82e260a8 R vcn_v1_0_ip_block +ffffffff82e260c0 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82e26200 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82e26340 r vcn_v1_0_irq_funcs +ffffffff82e27000 r vcn_v2_0_ip_funcs +ffffffff82e270a8 R vcn_v2_0_ip_block +ffffffff82e270c0 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82e27200 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82e27340 r vcn_v2_0_irq_funcs +ffffffff82e28000 r vcn_v2_5_ip_funcs +ffffffff82e280a8 R vcn_v2_5_ip_block +ffffffff82e280c0 r vcn_v2_6_ip_funcs +ffffffff82e28168 R vcn_v2_6_ip_block +ffffffff82e28180 R vcn_v2_6_ras_hw_ops +ffffffff82e281c0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82e28300 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82e28440 r vcn_v2_5_irq_funcs +ffffffff82e28450 r vcn_v2_6_ras_irq_funcs +ffffffff82e29000 r vcn_v3_0_ip_funcs +ffffffff82e290a8 R vcn_v3_0_ip_block +ffffffff82e290c0 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82e29200 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82e29340 r vcn_v3_0_irq_funcs +ffffffff82e2a000 r vcn_v4_0_ip_funcs +ffffffff82e2a0a8 R vcn_v4_0_ip_block +ffffffff82e2a0c0 R vcn_v4_0_ras_hw_ops +ffffffff82e2a100 r vcn_v4_0_irq_funcs +ffffffff82e2a110 r vcn_v4_0_ras_irq_funcs +ffffffff82e2b000 r vcn_v4_0_3_ip_funcs +ffffffff82e2b0a8 R vcn_v4_0_3_ip_block +ffffffff82e2b0c0 r vcn_v4_0_3_unified_ring_vm_funcs +ffffffff82e2b200 r vcn_v4_0_3_irq_funcs +ffffffff82e2b210 r vcn_v4_0_3_ras_hw_ops +ffffffff82e2b250 r vcn_v4_0_3_ue_reg_list +ffffffff82e2c000 R vega10_ih_ip_funcs +ffffffff82e2c0a8 R vega10_ih_ip_block +ffffffff82e2c0c0 r vega10_ih_funcs +ffffffff82e2c0e0 r vega10_ih_self_irq_funcs ffffffff82e2d000 r GC_BASE -ffffffff82e2d090 r HDP_BASE -ffffffff82e2d120 r MMHUB_BASE -ffffffff82e2d1b0 r ATHUB_BASE -ffffffff82e2d240 r NBIO_BASE -ffffffff82e2d2d0 r MP0_BASE -ffffffff82e2d360 r MP1_BASE -ffffffff82e2d3f0 r UVD_BASE -ffffffff82e2d480 r VCE_BASE -ffffffff82e2d510 r DF_BASE -ffffffff82e2d5a0 r DCE_BASE -ffffffff82e2d630 r OSSSYS_BASE -ffffffff82e2d6c0 r SDMA0_BASE -ffffffff82e2d750 r SDMA1_BASE -ffffffff82e2d7e0 r SMUIO_BASE -ffffffff82e2d870 r THM_BASE -ffffffff82e2d900 r CLK_BASE -ffffffff82e2d990 r UMC_BASE -ffffffff82e2da20 r RSMU_BASE -ffffffff82e2e000 r vi_common_ip_block -ffffffff82e2e018 r vi_common_ip_funcs -ffffffff82e2e0c0 r vi_asic_funcs -ffffffff82e2e180 r vi_allowed_read_registers -ffffffff82e2e3e0 r topaz_video_codecs_encode -ffffffff82e2e3f0 r topaz_video_codecs_decode -ffffffff82e2e400 r tonga_video_codecs_encode -ffffffff82e2e410 r tonga_video_codecs_decode -ffffffff82e2e420 r polaris_video_codecs_encode -ffffffff82e2e430 r cz_video_codecs_decode -ffffffff82e2e440 r tonga_video_codecs_encode_array -ffffffff82e2e460 r tonga_video_codecs_decode_array -ffffffff82e2e4b0 r polaris_video_codecs_encode_array -ffffffff82e2e4e0 r cz_video_codecs_decode_array -ffffffff82e2e560 r iceland_mgcg_cgcg_init -ffffffff82e2e5a0 r fiji_mgcg_cgcg_init -ffffffff82e2e600 r tonga_mgcg_cgcg_init -ffffffff82e2e660 r cz_mgcg_cgcg_init -ffffffff82e2e6a0 r stoney_mgcg_cgcg_init -ffffffff82e2f000 r amdgpu_dm_funcs -ffffffff82e2f0a8 R dm_ip_block -ffffffff82e2f0c0 R amdgpu_dm_encoder_helper_funcs -ffffffff82e2f128 r dm_display_funcs -ffffffff82e2f180 r hpd_disconnect_quirk_table -ffffffff82e2fef0 r amdgpu_dm_mode_funcs -ffffffff82e2ff38 r amdgpu_dm_audio_component_bind_ops -ffffffff82e2ff48 r amdgpu_dm_audio_component_ops -ffffffff82e2ff80 r amdgpu_dm_encoder_funcs -ffffffff82e2ffa0 r amdgpu_dm_connector_funcs -ffffffff82e30018 r amdgpu_dm_connector_helper_funcs -ffffffff82e30078 r amdgpu_dm_i2c_algo -ffffffff82e30088 r amdgpu_dm_backlight_ops -ffffffff82e30260 r add_fs_modes.common_rates -ffffffff82e31000 r amdgpu_dm_crtc_funcs -ffffffff82e310c0 r amdgpu_dm_crtc_helper_funcs -ffffffff82e32000 r dm_dtn_log_begin.msg -ffffffff82e3200d r dm_dtn_log_end.msg -ffffffff82e32018 r SYNAPTICS_DEVICE_ID -ffffffff82e33000 r dm_crtc_irq_funcs -ffffffff82e33010 r dm_vline0_irq_funcs -ffffffff82e33020 r dm_dmub_outbox_irq_funcs -ffffffff82e33030 r dm_vupdate_irq_funcs -ffffffff82e33040 r dm_dmub_trace_irq_funcs -ffffffff82e33050 r dm_pageflip_irq_funcs -ffffffff82e33060 r dm_hpd_irq_funcs -ffffffff82e34000 r amdgpu_dm_encoder_funcs -ffffffff82e34020 r dm_mst_cbs -ffffffff82e34030 r dm_dp_mst_connector_funcs -ffffffff82e340a8 r dm_dp_mst_connector_helper_funcs -ffffffff82e35000 r dm_plane_funcs -ffffffff82e35068 r dm_plane_helper_funcs -ffffffff82e37000 r vbios_funcs -ffffffff82e38000 r vbios_funcs -ffffffff82e3d000 r command_table_helper_funcs -ffffffff82e3e000 r command_table_helper_funcs +ffffffff82e2d064 r HDP_BASE +ffffffff82e2d0c8 r MMHUB_BASE +ffffffff82e2d12c r ATHUB_BASE +ffffffff82e2d190 r NBIO_BASE +ffffffff82e2d1f4 r MP0_BASE +ffffffff82e2d258 r MP1_BASE +ffffffff82e2d2bc r VCE_BASE +ffffffff82e2d320 r VCN_BASE +ffffffff82e2d384 r DF_BASE +ffffffff82e2d3e8 r DCE_BASE +ffffffff82e2d44c r OSSSYS_BASE +ffffffff82e2d4b0 r SDMA0_BASE +ffffffff82e2d514 r SDMA1_BASE +ffffffff82e2d578 r SMUIO_BASE +ffffffff82e2d5dc r PWR_BASE +ffffffff82e2d640 r NBIF_BASE +ffffffff82e2d6a4 r THM_BASE +ffffffff82e2d708 r CLK_BASE +ffffffff82e2e000 R vega20_ih_ip_funcs +ffffffff82e2e0a8 R vega20_ih_ip_block +ffffffff82e2e0c0 r vega20_ih_funcs +ffffffff82e2e0e0 r vega20_ih_self_irq_funcs +ffffffff82e2f000 r GC_BASE +ffffffff82e2f090 r HDP_BASE +ffffffff82e2f120 r MMHUB_BASE +ffffffff82e2f1b0 r ATHUB_BASE +ffffffff82e2f240 r NBIO_BASE +ffffffff82e2f2d0 r MP0_BASE +ffffffff82e2f360 r MP1_BASE +ffffffff82e2f3f0 r UVD_BASE +ffffffff82e2f480 r VCE_BASE +ffffffff82e2f510 r DF_BASE +ffffffff82e2f5a0 r DCE_BASE +ffffffff82e2f630 r OSSSYS_BASE +ffffffff82e2f6c0 r SDMA0_BASE +ffffffff82e2f750 r SDMA1_BASE +ffffffff82e2f7e0 r SMUIO_BASE +ffffffff82e2f870 r THM_BASE +ffffffff82e2f900 r CLK_BASE +ffffffff82e2f990 r UMC_BASE +ffffffff82e2fa20 r RSMU_BASE +ffffffff82e30000 r vi_common_ip_block +ffffffff82e30018 r vi_common_ip_funcs +ffffffff82e300c0 r vi_asic_funcs +ffffffff82e30180 r vi_allowed_read_registers +ffffffff82e303e0 r topaz_video_codecs_encode +ffffffff82e303f0 r topaz_video_codecs_decode +ffffffff82e30400 r tonga_video_codecs_encode +ffffffff82e30410 r tonga_video_codecs_decode +ffffffff82e30420 r polaris_video_codecs_encode +ffffffff82e30430 r cz_video_codecs_decode +ffffffff82e30440 r tonga_video_codecs_encode_array +ffffffff82e30460 r tonga_video_codecs_decode_array +ffffffff82e304b0 r polaris_video_codecs_encode_array +ffffffff82e304e0 r cz_video_codecs_decode_array +ffffffff82e30560 r iceland_mgcg_cgcg_init +ffffffff82e305a0 r fiji_mgcg_cgcg_init +ffffffff82e30600 r tonga_mgcg_cgcg_init +ffffffff82e30660 r cz_mgcg_cgcg_init +ffffffff82e306a0 r stoney_mgcg_cgcg_init +ffffffff82e31000 r amdgpu_dm_funcs +ffffffff82e310a8 R dm_ip_block +ffffffff82e310c0 R amdgpu_dm_encoder_helper_funcs +ffffffff82e31128 r dm_display_funcs +ffffffff82e31180 r hpd_disconnect_quirk_table +ffffffff82e31ef0 r amdgpu_dm_mode_funcs +ffffffff82e31f38 r amdgpu_dm_audio_component_bind_ops +ffffffff82e31f48 r amdgpu_dm_audio_component_ops +ffffffff82e31f80 r amdgpu_dm_encoder_funcs +ffffffff82e31fa0 r amdgpu_dm_connector_funcs +ffffffff82e32018 r amdgpu_dm_connector_helper_funcs +ffffffff82e32078 r amdgpu_dm_i2c_algo +ffffffff82e32088 r amdgpu_dm_backlight_ops +ffffffff82e32260 r add_fs_modes.common_rates +ffffffff82e33000 r amdgpu_dm_crtc_funcs +ffffffff82e330c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82e34000 r dm_dtn_log_begin.msg +ffffffff82e3400d r dm_dtn_log_end.msg +ffffffff82e34018 r SYNAPTICS_DEVICE_ID +ffffffff82e35000 r dm_crtc_irq_funcs +ffffffff82e35010 r dm_vline0_irq_funcs +ffffffff82e35020 r dm_dmub_outbox_irq_funcs +ffffffff82e35030 r dm_vupdate_irq_funcs +ffffffff82e35040 r dm_dmub_trace_irq_funcs +ffffffff82e35050 r dm_pageflip_irq_funcs +ffffffff82e35060 r dm_hpd_irq_funcs +ffffffff82e36000 r amdgpu_dm_encoder_funcs +ffffffff82e36020 r dm_mst_cbs +ffffffff82e36030 r dm_dp_mst_connector_funcs +ffffffff82e360a8 r dm_dp_mst_connector_helper_funcs +ffffffff82e37000 r dm_plane_funcs +ffffffff82e37068 r dm_plane_helper_funcs +ffffffff82e39000 r vbios_funcs +ffffffff82e3a000 r vbios_funcs ffffffff82e3f000 r command_table_helper_funcs ffffffff82e40000 r command_table_helper_funcs -ffffffff82e41000 r dce80_max_clks_by_state -ffffffff82e41028 r disp_clk_regs -ffffffff82e4107c r disp_clk_shift -ffffffff82e41088 r disp_clk_mask -ffffffff82e42000 r dce110_max_clks_by_state -ffffffff82e42028 r disp_clk_regs -ffffffff82e4207c r disp_clk_shift -ffffffff82e42088 r disp_clk_mask -ffffffff82e43000 r dce112_max_clks_by_state +ffffffff82e41000 r command_table_helper_funcs +ffffffff82e42000 r command_table_helper_funcs +ffffffff82e43000 r dce80_max_clks_by_state ffffffff82e43028 r disp_clk_regs ffffffff82e4307c r disp_clk_shift ffffffff82e43088 r disp_clk_mask -ffffffff82e44000 r dce120_max_clks_by_state -ffffffff82e45000 r clk_mgr_regs -ffffffff82e45054 r clk_mgr_shift -ffffffff82e45060 r clk_mgr_mask -ffffffff82e46000 r clk_mgr_regs -ffffffff82e46054 r clk_mgr_shift -ffffffff82e46060 r clk_mgr_mask +ffffffff82e44000 r dce110_max_clks_by_state +ffffffff82e44028 r disp_clk_regs +ffffffff82e4407c r disp_clk_shift +ffffffff82e44088 r disp_clk_mask +ffffffff82e45000 r dce112_max_clks_by_state +ffffffff82e45028 r disp_clk_regs +ffffffff82e4507c r disp_clk_shift +ffffffff82e45088 r disp_clk_mask +ffffffff82e46000 r dce120_max_clks_by_state ffffffff82e47000 r clk_mgr_regs ffffffff82e47054 r clk_mgr_shift ffffffff82e47060 r clk_mgr_mask -ffffffff82e48000 r lpddr5_wm_table -ffffffff82e480c0 r ddr5_wm_table -ffffffff82e49000 r lpddr5_wm_table -ffffffff82e490c0 r ddr5_wm_table -ffffffff82e4a000 r ddr5_wm_table +ffffffff82e48000 r clk_mgr_regs +ffffffff82e48054 r clk_mgr_shift +ffffffff82e48060 r clk_mgr_mask +ffffffff82e49000 r clk_mgr_regs +ffffffff82e49054 r clk_mgr_shift +ffffffff82e49060 r clk_mgr_mask +ffffffff82e4a000 r lpddr5_wm_table +ffffffff82e4a0c0 r ddr5_wm_table ffffffff82e4b000 r lpddr5_wm_table -ffffffff82e4b0c0 r ddr4_wm_table -ffffffff82e4c000 r clk_mgr_regs_dcn321 -ffffffff82e4c054 r clk_mgr_shift_dcn321 -ffffffff82e4c060 r clk_mgr_mask_dcn321 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+ffffffff82f25d60 r apg_shift +ffffffff82f25d68 r apg_mask +ffffffff82f25d80 r hpo_dp_link_enc_regs +ffffffff82f25e90 r hpo_dp_le_shift +ffffffff82f25eac r hpo_dp_le_mask +ffffffff82f25f10 r hwseq_reg +ffffffff82f2612c r hwseq_shift +ffffffff82f261ac r hwseq_mask +ffffffff82f27000 r bios_regs +ffffffff82f27008 r res_cap_dcn31 +ffffffff82f27050 r clk_src_regs +ffffffff82f271f4 r dccg_regs +ffffffff82f272e4 r dccg_shift +ffffffff82f27384 r dccg_mask +ffffffff82f27600 r abm_regs +ffffffff82f277a0 r abm_shift +ffffffff82f277c4 r abm_mask +ffffffff82f27850 r res_create_funcs +ffffffff82f27880 r plane_cap +ffffffff82f278b0 r link_enc_regs +ffffffff82f27f10 r link_enc_aux_regs +ffffffff82f27f60 r link_enc_hpd_regs +ffffffff82f27f74 r le_shift +ffffffff82f28064 r le_mask +ffffffff82f2841c r link_enc_feature +ffffffff82f2842c r panel_config_defaults +ffffffff82f28480 r debug_defaults_drv +ffffffff82f28628 r cs_shift +ffffffff82f28634 r cs_mask +ffffffff82f2865c r hubbub_reg +ffffffff82f287e4 r hubbub_shift +ffffffff82f28874 r hubbub_mask +ffffffff82f28ab0 r vmid_regs +ffffffff82f28c70 r vmid_shifts +ffffffff82f28c78 r vmid_masks +ffffffff82f28ca0 r hubp_regs +ffffffff82f294d0 r hubp_shift +ffffffff82f295cc r hubp_mask +ffffffff82f299c0 r dpp_regs +ffffffff82f2aed0 r tf_shift +ffffffff82f2b1a4 r tf_mask +ffffffff82f2bcf0 r opp_regs +ffffffff82f2be50 r opp_shift +ffffffff82f2be88 r opp_mask +ffffffff82f2bf60 r optc_regs +ffffffff82f2c500 r optc_shift +ffffffff82f2c5d4 r optc_mask +ffffffff82f2c91c r mpc_regs +ffffffff82f2e108 r mpc_shift +ffffffff82f2e1e4 r mpc_mask +ffffffff82f2e550 r dsc_regs +ffffffff82f2e79c r dsc_shift +ffffffff82f2e854 r dsc_mask +ffffffff82f2eb30 r dwbc30_regs +ffffffff82f2ed0c r dwbc30_shift +ffffffff82f2ee40 r dwbc30_mask +ffffffff82f2f310 r mcif_wb30_regs +ffffffff82f2f40c r mcif_wb30_shift +ffffffff82f2f4b8 r mcif_wb30_mask +ffffffff82f2f770 r aux_engine_regs +ffffffff82f2f838 r aux_mask +ffffffff82f2f898 r aux_shift +ffffffff82f2f8b0 r i2c_hw_regs +ffffffff82f2f9c8 r i2c_shifts +ffffffff82f2f9f4 r i2c_masks +ffffffff82f2faa0 r audio_regs +ffffffff82f2fbd4 r audio_shift +ffffffff82f2fbec r audio_mask +ffffffff82f2fc30 r stream_enc_regs +ffffffff82f302d4 r se_shift +ffffffff82f303b0 r se_mask +ffffffff82f30720 r vpg_regs +ffffffff82f30810 r vpg_shift +ffffffff82f30838 r vpg_mask +ffffffff82f308e0 r afmt_regs +ffffffff82f309b8 r afmt_shift +ffffffff82f309cc r afmt_mask +ffffffff82f30a20 r hpo_dp_stream_enc_regs +ffffffff82f30c50 r hpo_dp_se_shift +ffffffff82f30c78 r hpo_dp_se_mask +ffffffff82f30d20 r apg_regs +ffffffff82f30d60 r apg_shift +ffffffff82f30d68 r apg_mask +ffffffff82f30d80 r hpo_dp_link_enc_regs +ffffffff82f30e90 r hpo_dp_le_shift +ffffffff82f30eac r hpo_dp_le_mask +ffffffff82f30f10 r hwseq_reg +ffffffff82f3112c r hwseq_shift +ffffffff82f311ac r hwseq_mask +ffffffff82f32000 r dccg32_funcs +ffffffff82f33000 r dcn32_link_enc_funcs +ffffffff82f34000 r dcn32_str_enc_funcs +ffffffff82f35000 r hubbub32_funcs +ffffffff82f36000 r dcn32_funcs +ffffffff82f362e8 r dcn32_private_funcs +ffffffff82f37000 r dcn32_mmhubbub_funcs +ffffffff82f38000 r dcn32_mpc_funcs +ffffffff82f39000 r res_cap_dcn32 +ffffffff82f3903c r dccg_shift +ffffffff82f390dc r dccg_mask +ffffffff82f39350 r abm_shift +ffffffff82f39374 r abm_mask +ffffffff82f39400 r res_create_funcs +ffffffff82f39430 r plane_cap +ffffffff82f3945c r le_shift +ffffffff82f3954c r le_mask +ffffffff82f39904 r link_enc_feature +ffffffff82f39918 r debug_defaults_drv +ffffffff82f39ac0 r cs_shift +ffffffff82f39acc r cs_mask +ffffffff82f39af4 r hubbub_shift +ffffffff82f39b84 r hubbub_mask +ffffffff82f39dbc r vmid_shifts +ffffffff82f39dc4 r vmid_masks +ffffffff82f39de4 r hubp_shift +ffffffff82f39ee0 r hubp_mask +ffffffff82f3a2d0 r tf_shift +ffffffff82f3a5a4 r tf_mask +ffffffff82f3b0e8 r opp_shift +ffffffff82f3b120 r opp_mask +ffffffff82f3b1f4 r optc_shift +ffffffff82f3b2c8 r optc_mask +ffffffff82f3b610 r mpc_shift +ffffffff82f3b6ec r mpc_mask +ffffffff82f3ba58 r dsc_shift +ffffffff82f3bb10 r dsc_mask +ffffffff82f3bde8 r dwbc30_shift +ffffffff82f3bf1c r dwbc30_mask +ffffffff82f3c3e4 r mcif_wb30_shift +ffffffff82f3c490 r mcif_wb30_mask +ffffffff82f3c73c r aux_mask +ffffffff82f3c79c r aux_shift +ffffffff82f3c7b4 r i2c_shifts +ffffffff82f3c7e0 r i2c_masks +ffffffff82f3c884 r audio_shift +ffffffff82f3c89c r audio_mask +ffffffff82f3c8d8 r se_shift +ffffffff82f3c9b4 r se_mask +ffffffff82f3cd20 r vpg_shift +ffffffff82f3cd48 r vpg_mask +ffffffff82f3cddc r afmt_shift +ffffffff82f3cdf0 r afmt_mask +ffffffff82f3ce34 r hpo_dp_se_shift +ffffffff82f3ce5c r hpo_dp_se_mask +ffffffff82f3cefc r apg_shift +ffffffff82f3cf04 r apg_mask +ffffffff82f3cf1c r hpo_dp_le_shift +ffffffff82f3cf38 r hpo_dp_le_mask +ffffffff82f3cf9c r hwseq_shift +ffffffff82f3d01c r hwseq_mask +ffffffff82f3e000 r dcn321_link_enc_funcs +ffffffff82f3f000 r res_cap_dcn321 +ffffffff82f3f03c r dccg_shift +ffffffff82f3f0dc r dccg_mask +ffffffff82f3f350 r abm_shift +ffffffff82f3f374 r abm_mask +ffffffff82f3f400 r res_create_funcs +ffffffff82f3f430 r plane_cap +ffffffff82f3f45c r le_shift +ffffffff82f3f54c r le_mask +ffffffff82f3f904 r link_enc_feature +ffffffff82f3f918 r debug_defaults_drv +ffffffff82f3fac0 r cs_shift +ffffffff82f3facc r cs_mask +ffffffff82f3faf4 r hubbub_shift +ffffffff82f3fb84 r hubbub_mask +ffffffff82f3fdbc r vmid_shifts +ffffffff82f3fdc4 r vmid_masks +ffffffff82f3fde4 r hubp_shift +ffffffff82f3fee0 r hubp_mask +ffffffff82f402d0 r tf_shift +ffffffff82f405a4 r tf_mask +ffffffff82f410e8 r opp_shift +ffffffff82f41120 r opp_mask +ffffffff82f411f4 r optc_shift +ffffffff82f412c8 r optc_mask +ffffffff82f41610 r mpc_shift +ffffffff82f416ec r mpc_mask +ffffffff82f41a58 r dsc_shift +ffffffff82f41b10 r dsc_mask +ffffffff82f41de8 r dwbc30_shift +ffffffff82f41f1c r dwbc30_mask +ffffffff82f423e4 r mcif_wb30_shift +ffffffff82f42490 r mcif_wb30_mask +ffffffff82f4273c r aux_mask +ffffffff82f4279c r aux_shift +ffffffff82f427b4 r i2c_shifts +ffffffff82f427e0 r i2c_masks +ffffffff82f42884 r audio_shift +ffffffff82f4289c r audio_mask +ffffffff82f428d8 r se_shift +ffffffff82f429b4 r se_mask +ffffffff82f42d20 r vpg_shift +ffffffff82f42d48 r vpg_mask +ffffffff82f42ddc r afmt_shift +ffffffff82f42df0 r afmt_mask +ffffffff82f42e34 r hpo_dp_se_shift +ffffffff82f42e5c r hpo_dp_se_mask +ffffffff82f42efc r apg_shift +ffffffff82f42f04 r apg_mask +ffffffff82f42f1c r hpo_dp_le_shift +ffffffff82f42f38 r hpo_dp_le_mask +ffffffff82f42f9c r hwseq_shift +ffffffff82f4301c r hwseq_mask +ffffffff82f45000 R dcn10_soc_defaults +ffffffff82f4508c R dcn10_ip_defaults +ffffffff82f51000 r dml20_funcs +ffffffff82f51030 r dml20v2_funcs +ffffffff82f51060 r dml21_funcs +ffffffff82f51090 r dml30_funcs +ffffffff82f510c0 r dml31_funcs +ffffffff82f510f0 r dml314_funcs +ffffffff82f51120 r dml32_funcs +ffffffff82f54000 r qp_table_444_8bpc_max +ffffffff82f54940 r qp_table_444_8bpc_min +ffffffff82f55280 r qp_table_444_10bpc_max +ffffffff82f55ec0 r qp_table_444_10bpc_min +ffffffff82f56b00 r qp_table_444_12bpc_max +ffffffff82f57a40 r qp_table_444_12bpc_min +ffffffff82f58980 r qp_table_422_8bpc_max +ffffffff82f58ec0 r qp_table_422_8bpc_min +ffffffff82f59400 r qp_table_422_10bpc_max +ffffffff82f59b40 r qp_table_422_10bpc_min +ffffffff82f5a280 r qp_table_422_12bpc_max +ffffffff82f5abc0 r qp_table_422_12bpc_min +ffffffff82f5b500 r qp_table_420_8bpc_max +ffffffff82f5b940 r qp_table_420_8bpc_min +ffffffff82f5bd80 r qp_table_420_10bpc_max +ffffffff82f5c340 r qp_table_420_10bpc_min +ffffffff82f5c900 r qp_table_420_12bpc_max +ffffffff82f5d040 r qp_table_420_12bpc_min ffffffff82f5f000 r funcs ffffffff82f5f050 r hpd_regs ffffffff82f5f1a0 r hpd_shift @@ -48567,111 +48562,111 @@ ffffffff82f631c0 r ddc_data_regs ffffffff82f633a0 r ddc_clk_regs ffffffff82f63580 r ddc_shift ffffffff82f635a8 r ddc_mask -ffffffff82f635d0 r generic_regs -ffffffff82f63640 r generic_shift -ffffffff82f63650 r generic_mask ffffffff82f64000 r funcs ffffffff82f65000 r funcs ffffffff82f65050 r hpd_regs ffffffff82f651a0 r hpd_shift ffffffff82f651b0 r hpd_mask -ffffffff82f651c0 r ddc_data_regs_dcn -ffffffff82f65370 r ddc_clk_regs_dcn -ffffffff82f65520 r ddc_shift -ffffffff82f65640 r ddc_mask -ffffffff82f65760 r generic_regs -ffffffff82f657d0 r generic_shift -ffffffff82f657e0 r generic_mask +ffffffff82f651c0 r ddc_data_regs +ffffffff82f653a0 r ddc_clk_regs +ffffffff82f65580 r ddc_shift +ffffffff82f655a8 r ddc_mask +ffffffff82f655d0 r generic_regs +ffffffff82f65640 r generic_shift +ffffffff82f65650 r generic_mask ffffffff82f66000 r funcs ffffffff82f67000 r funcs ffffffff82f67050 r hpd_regs -ffffffff82f67168 r hpd_shift -ffffffff82f67178 r hpd_mask -ffffffff82f67190 r ddc_data_regs_dcn -ffffffff82f672c0 r ddc_clk_regs_dcn -ffffffff82f673f0 r ddc_shift -ffffffff82f674e0 r ddc_mask -ffffffff82f675d0 r generic_regs -ffffffff82f67604 r generic_shift -ffffffff82f6760c r generic_mask +ffffffff82f671a0 r hpd_shift +ffffffff82f671b0 r hpd_mask +ffffffff82f671c0 r ddc_data_regs_dcn +ffffffff82f67370 r ddc_clk_regs_dcn +ffffffff82f67520 r ddc_shift +ffffffff82f67640 r ddc_mask +ffffffff82f67760 r generic_regs +ffffffff82f677d0 r generic_shift +ffffffff82f677e0 r generic_mask ffffffff82f68000 r funcs ffffffff82f69000 r funcs ffffffff82f69050 r hpd_regs -ffffffff82f691a0 r hpd_shift -ffffffff82f691b0 r hpd_mask -ffffffff82f691c0 r ddc_data_regs_dcn -ffffffff82f69370 r ddc_clk_regs_dcn -ffffffff82f69520 r ddc_shift -ffffffff82f69640 r ddc_mask -ffffffff82f69760 r generic_regs -ffffffff82f697d0 r generic_shift -ffffffff82f697e0 r generic_mask +ffffffff82f69168 r hpd_shift +ffffffff82f69178 r hpd_mask +ffffffff82f69190 r ddc_data_regs_dcn +ffffffff82f692c0 r ddc_clk_regs_dcn +ffffffff82f693f0 r ddc_shift +ffffffff82f694e0 r ddc_mask +ffffffff82f695d0 r generic_regs +ffffffff82f69604 r generic_shift +ffffffff82f6960c r generic_mask ffffffff82f6a000 r funcs ffffffff82f6b000 r funcs ffffffff82f6b050 r hpd_regs -ffffffff82f6b168 r hpd_shift -ffffffff82f6b178 r hpd_mask -ffffffff82f6b190 r ddc_data_regs_dcn -ffffffff82f6b300 r ddc_clk_regs_dcn -ffffffff82f6b470 r ddc_shift -ffffffff82f6b560 r ddc_mask -ffffffff82f6b650 r generic_regs -ffffffff82f6b6c0 r generic_shift -ffffffff82f6b6d0 r generic_mask +ffffffff82f6b1a0 r hpd_shift +ffffffff82f6b1b0 r hpd_mask +ffffffff82f6b1c0 r ddc_data_regs_dcn +ffffffff82f6b370 r ddc_clk_regs_dcn +ffffffff82f6b520 r ddc_shift +ffffffff82f6b640 r ddc_mask +ffffffff82f6b760 r generic_regs +ffffffff82f6b7d0 r generic_shift +ffffffff82f6b7e0 r generic_mask ffffffff82f6c000 r funcs ffffffff82f6d000 r funcs ffffffff82f6d050 r hpd_regs ffffffff82f6d168 r hpd_shift ffffffff82f6d178 r hpd_mask ffffffff82f6d190 r ddc_data_regs_dcn -ffffffff82f6d340 r ddc_clk_regs_dcn -ffffffff82f6d4f0 r ddc_shift -ffffffff82f6d610 r ddc_mask -ffffffff82f6d730 r generic_regs -ffffffff82f6d7a0 r generic_shift -ffffffff82f6d7b0 r generic_mask +ffffffff82f6d300 r ddc_clk_regs_dcn +ffffffff82f6d470 r ddc_shift +ffffffff82f6d560 r ddc_mask +ffffffff82f6d650 r generic_regs +ffffffff82f6d6c0 r generic_shift +ffffffff82f6d6d0 r generic_mask ffffffff82f6e000 r funcs ffffffff82f6f000 r funcs +ffffffff82f6f050 r hpd_regs +ffffffff82f6f168 r hpd_shift +ffffffff82f6f178 r hpd_mask +ffffffff82f6f190 r ddc_data_regs_dcn +ffffffff82f6f340 r ddc_clk_regs_dcn +ffffffff82f6f4f0 r ddc_shift +ffffffff82f6f610 r ddc_mask +ffffffff82f6f730 r generic_regs +ffffffff82f6f7a0 r generic_shift +ffffffff82f6f7b0 r generic_mask ffffffff82f70000 r funcs ffffffff82f71000 r funcs -ffffffff82f72000 r hdmi_14_protection -ffffffff82f72010 r dp_11_protection -ffffffff82f72020 r hdcp_i2c_offsets -ffffffff82f72050 r hdcp_dpcd_addrs -ffffffff82f73000 r irq_service_funcs_dce110 -ffffffff82f73008 r dummy_irq_info_funcs -ffffffff82f73018 r hpd_irq_info_funcs -ffffffff82f73028 r hpd_rx_irq_info_funcs -ffffffff82f73038 r pflip_irq_info_funcs -ffffffff82f73048 r vupdate_irq_info_funcs -ffffffff82f73058 r vblank_irq_info_funcs -ffffffff82f73070 r irq_source_info_dce110 -ffffffff82f75000 r irq_service_funcs_dce120 +ffffffff82f72000 r funcs +ffffffff82f73000 r funcs +ffffffff82f74000 r hdmi_14_protection +ffffffff82f74010 r dp_11_protection +ffffffff82f74020 r hdcp_i2c_offsets +ffffffff82f74050 r hdcp_dpcd_addrs +ffffffff82f75000 r irq_service_funcs_dce110 ffffffff82f75008 r dummy_irq_info_funcs ffffffff82f75018 r hpd_irq_info_funcs ffffffff82f75028 r hpd_rx_irq_info_funcs ffffffff82f75038 r pflip_irq_info_funcs ffffffff82f75048 r vupdate_irq_info_funcs ffffffff82f75058 r vblank_irq_info_funcs -ffffffff82f75070 r irq_source_info_dce120 -ffffffff82f77000 r irq_service_funcs_dce80 +ffffffff82f75070 r irq_source_info_dce110 +ffffffff82f77000 r irq_service_funcs_dce120 ffffffff82f77008 r dummy_irq_info_funcs ffffffff82f77018 r hpd_irq_info_funcs ffffffff82f77028 r hpd_rx_irq_info_funcs ffffffff82f77038 r pflip_irq_info_funcs ffffffff82f77048 r vupdate_irq_info_funcs ffffffff82f77058 r vblank_irq_info_funcs -ffffffff82f77070 r irq_source_info_dce80 -ffffffff82f79000 r irq_service_funcs_dcn10 +ffffffff82f77070 r irq_source_info_dce120 +ffffffff82f79000 r irq_service_funcs_dce80 ffffffff82f79008 r dummy_irq_info_funcs ffffffff82f79018 r hpd_irq_info_funcs ffffffff82f79028 r hpd_rx_irq_info_funcs ffffffff82f79038 r pflip_irq_info_funcs -ffffffff82f79048 r vupdate_no_lock_irq_info_funcs +ffffffff82f79048 r vupdate_irq_info_funcs ffffffff82f79058 r vblank_irq_info_funcs -ffffffff82f79068 r vline0_irq_info_funcs -ffffffff82f79080 r irq_source_info_dcn10 -ffffffff82f7b000 r irq_service_funcs_dcn20 +ffffffff82f79070 r irq_source_info_dce80 +ffffffff82f7b000 r irq_service_funcs_dcn10 ffffffff82f7b008 r dummy_irq_info_funcs ffffffff82f7b018 r hpd_irq_info_funcs ffffffff82f7b028 r hpd_rx_irq_info_funcs @@ -48679,8 +48674,8 @@ ffffffff82f7b038 r pflip_irq_info_funcs ffffffff82f7b048 r vupdate_no_lock_irq_info_funcs ffffffff82f7b058 r vblank_irq_info_funcs ffffffff82f7b068 r vline0_irq_info_funcs -ffffffff82f7b080 r irq_source_info_dcn20 -ffffffff82f7d000 r irq_service_funcs_dcn201 +ffffffff82f7b080 r irq_source_info_dcn10 +ffffffff82f7d000 r irq_service_funcs_dcn20 ffffffff82f7d008 r dummy_irq_info_funcs ffffffff82f7d018 r hpd_irq_info_funcs ffffffff82f7d028 r hpd_rx_irq_info_funcs @@ -48688,19 +48683,18 @@ ffffffff82f7d038 r pflip_irq_info_funcs ffffffff82f7d048 r vupdate_no_lock_irq_info_funcs ffffffff82f7d058 r vblank_irq_info_funcs ffffffff82f7d068 r vline0_irq_info_funcs -ffffffff82f7d080 r irq_source_info_dcn201 -ffffffff82f7f000 r irq_source_info_dcn21 -ffffffff82f80290 r irq_service_funcs_dcn21 -ffffffff82f80298 r dummy_irq_info_funcs -ffffffff82f802a8 r hpd_irq_info_funcs -ffffffff82f802b8 r hpd_rx_irq_info_funcs -ffffffff82f802c8 r pflip_irq_info_funcs -ffffffff82f802d8 r vupdate_no_lock_irq_info_funcs -ffffffff82f802e8 r vblank_irq_info_funcs -ffffffff82f802f8 r vline0_irq_info_funcs -ffffffff82f80308 r dmub_outbox_irq_info_funcs -ffffffff82f81000 r irq_source_info_dcn30 -ffffffff82f82290 r irq_service_funcs_dcn30 +ffffffff82f7d080 r irq_source_info_dcn20 +ffffffff82f7f000 r irq_service_funcs_dcn201 +ffffffff82f7f008 r dummy_irq_info_funcs +ffffffff82f7f018 r hpd_irq_info_funcs +ffffffff82f7f028 r hpd_rx_irq_info_funcs +ffffffff82f7f038 r pflip_irq_info_funcs +ffffffff82f7f048 r vupdate_no_lock_irq_info_funcs +ffffffff82f7f058 r vblank_irq_info_funcs +ffffffff82f7f068 r vline0_irq_info_funcs +ffffffff82f7f080 r irq_source_info_dcn201 +ffffffff82f81000 r irq_source_info_dcn21 +ffffffff82f82290 r irq_service_funcs_dcn21 ffffffff82f82298 r dummy_irq_info_funcs ffffffff82f822a8 r hpd_irq_info_funcs ffffffff82f822b8 r hpd_rx_irq_info_funcs @@ -48708,9 +48702,9 @@ ffffffff82f822c8 r pflip_irq_info_funcs ffffffff82f822d8 r vupdate_no_lock_irq_info_funcs ffffffff82f822e8 r vblank_irq_info_funcs ffffffff82f822f8 r vline0_irq_info_funcs -ffffffff82f82308 r dmub_trace_irq_info_funcs -ffffffff82f83000 r irq_source_info_dcn302 -ffffffff82f84290 r irq_service_funcs_dcn302 +ffffffff82f82308 r dmub_outbox_irq_info_funcs +ffffffff82f83000 r irq_source_info_dcn30 +ffffffff82f84290 r irq_service_funcs_dcn30 ffffffff82f84298 r dummy_irq_info_funcs ffffffff82f842a8 r hpd_irq_info_funcs ffffffff82f842b8 r hpd_rx_irq_info_funcs @@ -48719,27 +48713,27 @@ ffffffff82f842d8 r vupdate_no_lock_irq_info_funcs ffffffff82f842e8 r vblank_irq_info_funcs ffffffff82f842f8 r vline0_irq_info_funcs ffffffff82f84308 r dmub_trace_irq_info_funcs -ffffffff82f85000 r irq_service_funcs_dcn303 -ffffffff82f85008 r dummy_irq_info_funcs -ffffffff82f85018 r hpd_irq_info_funcs -ffffffff82f85028 r hpd_rx_irq_info_funcs -ffffffff82f85038 r pflip_irq_info_funcs -ffffffff82f85048 r vupdate_no_lock_irq_info_funcs -ffffffff82f85058 r vblank_irq_info_funcs -ffffffff82f85068 r vline0_irq_info_funcs -ffffffff82f85080 r irq_source_info_dcn303 -ffffffff82f87000 r irq_source_info_dcn31 -ffffffff82f88290 r irq_service_funcs_dcn31 -ffffffff82f88298 r dummy_irq_info_funcs -ffffffff82f882a8 r hpd_irq_info_funcs -ffffffff82f882b8 r hpd_rx_irq_info_funcs -ffffffff82f882c8 r pflip_irq_info_funcs -ffffffff82f882d8 r vupdate_no_lock_irq_info_funcs -ffffffff82f882e8 r vblank_irq_info_funcs -ffffffff82f882f8 r vline0_irq_info_funcs -ffffffff82f88308 r outbox_irq_info_funcs -ffffffff82f89000 r irq_source_info_dcn314 -ffffffff82f8a290 r irq_service_funcs_dcn314 +ffffffff82f85000 r irq_source_info_dcn302 +ffffffff82f86290 r irq_service_funcs_dcn302 +ffffffff82f86298 r dummy_irq_info_funcs +ffffffff82f862a8 r hpd_irq_info_funcs +ffffffff82f862b8 r hpd_rx_irq_info_funcs +ffffffff82f862c8 r pflip_irq_info_funcs +ffffffff82f862d8 r vupdate_no_lock_irq_info_funcs +ffffffff82f862e8 r vblank_irq_info_funcs +ffffffff82f862f8 r vline0_irq_info_funcs +ffffffff82f86308 r dmub_trace_irq_info_funcs +ffffffff82f87000 r irq_service_funcs_dcn303 +ffffffff82f87008 r dummy_irq_info_funcs +ffffffff82f87018 r hpd_irq_info_funcs +ffffffff82f87028 r hpd_rx_irq_info_funcs +ffffffff82f87038 r pflip_irq_info_funcs +ffffffff82f87048 r vupdate_no_lock_irq_info_funcs +ffffffff82f87058 r vblank_irq_info_funcs +ffffffff82f87068 r vline0_irq_info_funcs +ffffffff82f87080 r irq_source_info_dcn303 +ffffffff82f89000 r irq_source_info_dcn31 +ffffffff82f8a290 r irq_service_funcs_dcn31 ffffffff82f8a298 r dummy_irq_info_funcs ffffffff82f8a2a8 r hpd_irq_info_funcs ffffffff82f8a2b8 r hpd_rx_irq_info_funcs @@ -48748,8 +48742,8 @@ ffffffff82f8a2d8 r vupdate_no_lock_irq_info_funcs ffffffff82f8a2e8 r vblank_irq_info_funcs ffffffff82f8a2f8 r vline0_irq_info_funcs ffffffff82f8a308 r outbox_irq_info_funcs -ffffffff82f8b000 r irq_source_info_dcn315 -ffffffff82f8c290 r irq_service_funcs_dcn315 +ffffffff82f8b000 r irq_source_info_dcn314 +ffffffff82f8c290 r irq_service_funcs_dcn314 ffffffff82f8c298 r dummy_irq_info_funcs ffffffff82f8c2a8 r hpd_irq_info_funcs ffffffff82f8c2b8 r hpd_rx_irq_info_funcs @@ -48758,8 +48752,8 @@ ffffffff82f8c2d8 r vupdate_no_lock_irq_info_funcs ffffffff82f8c2e8 r vblank_irq_info_funcs ffffffff82f8c2f8 r vline0_irq_info_funcs ffffffff82f8c308 r outbox_irq_info_funcs -ffffffff82f8d000 r irq_source_info_dcn32 -ffffffff82f8e290 r irq_service_funcs_dcn32 +ffffffff82f8d000 r irq_source_info_dcn315 +ffffffff82f8e290 r irq_service_funcs_dcn315 ffffffff82f8e298 r dummy_irq_info_funcs ffffffff82f8e2a8 r hpd_irq_info_funcs ffffffff82f8e2b8 r hpd_rx_irq_info_funcs @@ -48768,9514 +48762,9524 @@ ffffffff82f8e2d8 r vupdate_no_lock_irq_info_funcs ffffffff82f8e2e8 r vblank_irq_info_funcs ffffffff82f8e2f8 r vline0_irq_info_funcs ffffffff82f8e308 r outbox_irq_info_funcs -ffffffff82f90000 r dio_link_hwss -ffffffff82f91000 r dio_fixed_vs_pe_retimer_link_hwss -ffffffff82f92000 r dpia_link_hwss -ffffffff82f93000 r hpo_dp_link_hwss -ffffffff82f94000 r hpo_fixed_vs_pe_retimer_dp_link_hwss -ffffffff82f95000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82f96000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82f96006 r DP_DVI_CONVERTER_ID_4 -ffffffff82f9600d r DP_DVI_CONVERTER_ID_5 -ffffffff82f97000 r dp_lt_fallbacks -ffffffff82f9b000 r mandatory_dpcd_partitions -ffffffff82f9c000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82f9c007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82f9d000 r virtual_lnk_enc_funcs -ffffffff82f9e000 r virtual_link_hwss -ffffffff82f9f000 r virtual_str_enc_funcs -ffffffff82fa0000 R dmub_srv_dcn20_regs -ffffffff82fa1000 R dmub_srv_dcn21_regs -ffffffff82fa2000 R dmub_srv_dcn30_regs -ffffffff82fa3000 R dmub_srv_dcn301_regs -ffffffff82fa4000 R dmub_srv_dcn302_regs -ffffffff82fa5000 R dmub_srv_dcn303_regs -ffffffff82fa6000 R dmub_srv_dcn31_regs -ffffffff82fa7000 R dmub_srv_dcn314_regs -ffffffff82fa8000 R dmub_srv_dcn315_regs -ffffffff82fa9000 R dmub_srv_dcn316_regs -ffffffff82faa000 R dmub_srv_dcn32_regs -ffffffff82fab000 r numerator01 -ffffffff82fab020 r numerator02 -ffffffff82fab040 r numerator04 -ffffffff82fab060 r numerator05 -ffffffff82faf000 r abm_settings -ffffffff82faf020 r abm_settings_config0 -ffffffff82faf060 r abm_settings_config1 -ffffffff82faf0a0 r abm_settings_config2 -ffffffff82faf0d8 r min_reduction_table_v_2_2 -ffffffff82faf0e5 r max_reduction_table_v_2_2 -ffffffff82faf0f2 r min_reduction_table -ffffffff82faf0ff r max_reduction_table -ffffffff82faf110 r custom_backlight_curve0 -ffffffff82fb0000 R amdgpu_pp_profile_name -ffffffff82fb1000 r pp_lib_thermal_controller_names -ffffffff82fb2000 r pp_ip_funcs -ffffffff82fb20a8 R pp_smu_ip_block -ffffffff82fb20c0 r pp_dpm_funcs -ffffffff82fb3000 r gpio_tbl -ffffffff82fb30f0 r enable_fb_req_rej_tbl -ffffffff82fb3140 r use_bclk_tbl -ffffffff82fb3310 r turn_off_plls_tbl -ffffffff82fb3640 r enter_baco_tbl -ffffffff82fb3730 r exit_baco_tbl -ffffffff82fb3850 r clean_baco_tbl -ffffffff82fb4000 r gpio_tbl -ffffffff82fb40f0 r enable_fb_req_rej_tbl -ffffffff82fb4140 r use_bclk_tbl -ffffffff82fb42e0 r turn_off_plls_tbl -ffffffff82fb4370 r clk_req_b_tbl -ffffffff82fb4490 r enter_baco_tbl -ffffffff82fb45b0 r exit_baco_tbl -ffffffff82fb46d0 r clean_baco_tbl +ffffffff82f8f000 r irq_source_info_dcn32 +ffffffff82f90290 r irq_service_funcs_dcn32 +ffffffff82f90298 r dummy_irq_info_funcs +ffffffff82f902a8 r hpd_irq_info_funcs +ffffffff82f902b8 r hpd_rx_irq_info_funcs +ffffffff82f902c8 r pflip_irq_info_funcs +ffffffff82f902d8 r vupdate_no_lock_irq_info_funcs +ffffffff82f902e8 r vblank_irq_info_funcs +ffffffff82f902f8 r vline0_irq_info_funcs +ffffffff82f90308 r outbox_irq_info_funcs +ffffffff82f92000 r dio_link_hwss +ffffffff82f93000 r dio_fixed_vs_pe_retimer_link_hwss +ffffffff82f94000 r dpia_link_hwss +ffffffff82f95000 r hpo_dp_link_hwss +ffffffff82f96000 r hpo_fixed_vs_pe_retimer_dp_link_hwss +ffffffff82f97000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82f98000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82f98006 r DP_DVI_CONVERTER_ID_4 +ffffffff82f9800d r DP_DVI_CONVERTER_ID_5 +ffffffff82f99000 r dp_lt_fallbacks +ffffffff82f9d000 r mandatory_dpcd_partitions +ffffffff82f9e000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82f9e007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82f9f000 r virtual_lnk_enc_funcs +ffffffff82fa0000 r virtual_link_hwss +ffffffff82fa1000 r virtual_str_enc_funcs +ffffffff82fa2000 R dmub_srv_dcn20_regs +ffffffff82fa3000 R dmub_srv_dcn21_regs +ffffffff82fa4000 R dmub_srv_dcn30_regs +ffffffff82fa5000 R dmub_srv_dcn301_regs +ffffffff82fa6000 R dmub_srv_dcn302_regs +ffffffff82fa7000 R dmub_srv_dcn303_regs +ffffffff82fa8000 R dmub_srv_dcn31_regs +ffffffff82fa9000 R dmub_srv_dcn314_regs +ffffffff82faa000 R dmub_srv_dcn315_regs +ffffffff82fab000 R dmub_srv_dcn316_regs +ffffffff82fac000 R dmub_srv_dcn32_regs +ffffffff82fad000 r numerator01 +ffffffff82fad020 r numerator02 +ffffffff82fad040 r numerator04 +ffffffff82fad060 r numerator05 +ffffffff82fb1000 r abm_settings +ffffffff82fb1020 r abm_settings_config0 +ffffffff82fb1060 r abm_settings_config1 +ffffffff82fb10a0 r abm_settings_config2 +ffffffff82fb10d8 r min_reduction_table_v_2_2 +ffffffff82fb10e5 r max_reduction_table_v_2_2 +ffffffff82fb10f2 r min_reduction_table +ffffffff82fb10ff r max_reduction_table +ffffffff82fb1110 r custom_backlight_curve0 +ffffffff82fb2000 R amdgpu_pp_profile_name +ffffffff82fb3000 r pp_lib_thermal_controller_names +ffffffff82fb4000 r pp_ip_funcs +ffffffff82fb40a8 R pp_smu_ip_block +ffffffff82fb40c0 r pp_dpm_funcs ffffffff82fb5000 r gpio_tbl ffffffff82fb50f0 r enable_fb_req_rej_tbl -ffffffff82fb5140 r use_bclk_tbl_vg -ffffffff82fb5200 r turn_off_plls_tbl_vg -ffffffff82fb5350 r use_bclk_tbl -ffffffff82fb5440 r turn_off_plls_tbl -ffffffff82fb55f0 r clk_req_b_tbl -ffffffff82fb5710 r enter_baco_tbl -ffffffff82fb5830 r exit_baco_tbl -ffffffff82fb5950 r clean_baco_tbl -ffffffff82fb6000 r vega10_fuses_default -ffffffff82fc5000 r pp_r600_encode_lanes -ffffffff82fc6000 R pptable_v1_0_funcs -ffffffff82fc7000 R pptable_funcs -ffffffff82fc7020 r soft_dummy_pp_table -ffffffff82fc8000 r smu10_hwmgr_funcs -ffffffff82fc9000 r smu7_hwmgr_funcs -ffffffff82fc92f8 r smu7_irq_funcs -ffffffff82fc9310 r SMU7ThermalPolicy -ffffffff82fca000 r GCCACConfig_Polaris10 -ffffffff82fca1b0 r DIDTConfig_Polaris10 -ffffffff82fcaa50 r GCCACConfig_Polaris11 -ffffffff82fcac00 r DIDTConfig_Polaris11_Kicker -ffffffff82fcb4a0 r DIDTConfig_Polaris11 -ffffffff82fcbd40 r DIDTConfig_Polaris12 -ffffffff82fcc5e0 r GCCACConfig_VegaM -ffffffff82fcc790 r DIDTConfig_VegaM -ffffffff82fce000 r smu8_hwmgr_funcs -ffffffff82fce2f0 r SMU7ThermalPolicy -ffffffff82fcf000 r smu9_irq_funcs -ffffffff82fd0000 r gpio_tbl_iceland -ffffffff82fd0060 r gpio_tbl -ffffffff82fd0150 r enable_fb_req_rej_tbl -ffffffff82fd01a0 r use_bclk_tbl -ffffffff82fd0370 r turn_off_plls_tbl -ffffffff82fd0610 r enter_baco_tbl -ffffffff82fd0730 r exit_baco_tbl_iceland -ffffffff82fd0870 r clean_baco_tbl_iceland -ffffffff82fd0890 r exit_baco_tbl -ffffffff82fd09b0 r clean_baco_tbl -ffffffff82fd1000 r pre_baco_tbl -ffffffff82fd1090 r enter_baco_tbl -ffffffff82fd12b0 r exit_baco_tbl -ffffffff82fd1520 r clean_baco_tbl -ffffffff82fd2000 r vega10_hwmgr_funcs -ffffffff82fd22f0 r channel_number -ffffffff82fd2320 r SMU7ThermalWithDelayPolicy -ffffffff82fd3000 r SEDiDtStallCtrlConfig_vega10 -ffffffff82fd3110 r SEDiDtStallPatternConfig_vega10 -ffffffff82fd32e0 r SEDiDtWeightConfig_Vega10 -ffffffff82fd33b0 r SEDiDtCtrl1Config_Vega10 -ffffffff82fd3440 r SEDiDtCtrl2Config_Vega10 -ffffffff82fd3510 r SEDiDtCtrl3Config_vega10 -ffffffff82fd3820 r SEDiDtTuningCtrlConfig_Vega10 -ffffffff82fd38b0 r SELCacConfig_Vega10 -ffffffff82fd3a40 r SEDiDtCtrl0Config_Vega10 -ffffffff82fd3d10 r AvfsPSMInitConfig_vega10 -ffffffff82fd3d90 r SEEDCStallPatternConfig_Vega10 -ffffffff82fd3ea0 r SEEDCStallDelayConfig_Vega10 -ffffffff82fd3f80 r SEEDCCtrlConfig_Vega10 -ffffffff82fd4040 r PSMSEEDCStallPatternConfig_Vega10 -ffffffff82fd40c0 r PSMSEEDCStallDelayConfig_Vega10 -ffffffff82fd41d0 r PSMSEEDCCtrlResetConfig_Vega10 -ffffffff82fd4290 r PSMSEEDCCtrlConfig_Vega10 -ffffffff82fd4350 r SEEDCForceStallPatternConfig_Vega10 -ffffffff82fd43e0 r SEEDCCtrlForceStallConfig_Vega10 -ffffffff82fd5000 R vega10_pptable_funcs -ffffffff82fd6000 r pre_baco_tbl -ffffffff82fd6090 r enter_baco_tbl -ffffffff82fd62b0 r exit_baco_tbl -ffffffff82fd6520 r clean_baco_tbl -ffffffff82fd7000 r vega12_hwmgr_funcs -ffffffff82fd72f0 r SMU7ThermalWithDelayPolicy -ffffffff82fd7340 r link_width -ffffffff82fd8000 R vega12_pptable_funcs -ffffffff82fd9000 r clean_baco_tbl -ffffffff82fda000 r vega20_hwmgr_funcs -ffffffff82fda2f0 r SMU7ThermalWithDelayPolicy -ffffffff82fda340 r link_width -ffffffff82fdb000 R vega20_pptable_funcs -ffffffff82fdc000 R ci_smu_funcs -ffffffff82fdc0e0 r defaults_hawaii_pro -ffffffff82fdc12c r defaults_hawaii_xt -ffffffff82fdc178 r defaults_saturn_xt -ffffffff82fdc1c4 r defaults_bonaire_xt -ffffffff82fdc210 r ci_program_jump_on_start.data -ffffffff82fdd000 R fiji_smu_funcs -ffffffff82fdd0e0 r avfs_graphics_level -ffffffff82fdd240 r fiji_power_tune_data_set_array -ffffffff82fdd246 r fiji_clock_stretch_amount_conversion -ffffffff82fdd260 r fiji_clock_stretcher_ddt_table -ffffffff82fde000 R iceland_smu_funcs -ffffffff82fde0e0 r defaults_icelandxt -ffffffff82fde12c r defaults_icelandpro -ffffffff82fde178 r defaults_iceland -ffffffff82fdf000 R polaris10_smu_funcs -ffffffff82fdf0e0 r avfs_graphics_level_polaris10 -ffffffff82fdf2a0 r avfs_memory_level_polaris10 -ffffffff82fdf2c0 r polaris10_power_tune_data_set_array -ffffffff82fdf310 r Range_Table -ffffffff82fe0000 R smu10_smu_funcs -ffffffff82fe1000 r smu7_program_jump_on_start.data -ffffffff82fe1010 r pwr_virus_table_pre -ffffffff82fe1680 r pwr_virus_table_post -ffffffff82fe1f80 r pwr_virus_section1 -ffffffff82fe2610 r pwr_virus_section2 -ffffffff82fe2660 r pwr_virus_section3 -ffffffff82fe9ab0 r pwr_virus_section4 -ffffffff82fe9e80 r pwr_virus_section5 -ffffffff82fea490 r pwr_virus_section6 -ffffffff82fec000 R smu8_smu_funcs -ffffffff82fed000 R tonga_smu_funcs -ffffffff82fed0e0 r tonga_power_tune_data_set_array -ffffffff82fed12c r tonga_clock_stretch_amount_conversion -ffffffff82fed140 r tonga_clock_stretcher_ddt_table -ffffffff82fee000 R vega10_smu_funcs -ffffffff82fef000 R vega12_smu_funcs -ffffffff82ff0000 R vega20_smu_funcs -ffffffff82ff1000 R vegam_smu_funcs -ffffffff82ff10e0 r vegam_power_tune_data_set_array -ffffffff82ff1130 r Range_Table -ffffffff82ff2000 R smu_ip_funcs -ffffffff82ff20a8 R smu_v11_0_ip_block -ffffffff82ff20c0 R smu_v12_0_ip_block -ffffffff82ff20d8 R smu_v13_0_ip_block -ffffffff82ff20f0 r swsmu_pm_funcs -ffffffff82ff3000 r arcturus_ppt_funcs -ffffffff82ff33f0 r arcturus_table_map -ffffffff82ff3470 r arcturus_pwr_src_map -ffffffff82ff3480 r arcturus_workload_map -ffffffff82ff34d0 r smu11_thermal_policy -ffffffff82ff3528 r arcturus_i2c_algo -ffffffff82ff3538 r arcturus_i2c_control_quirks -ffffffff82ff3550 r arcturus_throttler_map -ffffffff82ff3570 r arcturus_message_map -ffffffff82ff3ff0 r arcturus_clk_map -ffffffff82ff40b0 r arcturus_feature_mask_map -ffffffff82ff5000 r cyan_skillfish_ppt_funcs -ffffffff82ff6000 r navi10_ppt_funcs -ffffffff82ff63f0 r smu11_thermal_policy -ffffffff82ff6448 r navi10_i2c_algo -ffffffff82ff6458 r navi10_i2c_control_quirks -ffffffff82ff6470 r navi1x_throttler_map -ffffffff82ff6490 r NoDbiPrbs7 -ffffffff82ff7490 r DbiPrbs7 -ffffffff82ff9000 r sienna_cichlid_ppt_funcs -ffffffff82ff93f0 r smu11_thermal_policy -ffffffff82ff9448 r sienna_cichlid_i2c_algo -ffffffff82ff9458 r sienna_cichlid_i2c_control_quirks -ffffffff82ff9470 r sienna_cichlid_throttler_map -ffffffff82ffa000 r smu_v11_0_irq_funcs -ffffffff82ffa010 r link_width -ffffffff82ffb000 r vangogh_ppt_funcs -ffffffff82ffb3e8 r vangogh_throttler_map -ffffffff82ffc000 r renoir_ppt_funcs -ffffffff82ffc3e8 r renoir_throttler_map -ffffffff82ffd000 r aldebaran_ppt_funcs -ffffffff82ffd3f0 r aldebaran_clk_map -ffffffff82ffd4b0 r aldebaran_table_map -ffffffff82ffd530 r smu13_thermal_policy -ffffffff82ffd588 r aldebaran_i2c_algo -ffffffff82ffd598 r aldebaran_i2c_control_quirks -ffffffff82ffd5b0 r aldebaran_throttler_map -ffffffff82ffd5d0 r aldebaran_message_map -ffffffff82ffe050 r aldebaran_feature_mask_map -ffffffff82fff000 R pmfw_decoded_link_speed -ffffffff82fff020 R pmfw_decoded_link_width -ffffffff82fff040 r smu_v13_0_irq_funcs -ffffffff83000000 r smu_v13_0_0_ppt_funcs -ffffffff830003f0 r smu13_thermal_policy -ffffffff83000448 r smu_v13_0_0_i2c_algo -ffffffff83000458 r smu_v13_0_0_i2c_control_quirks -ffffffff83000470 r smu_v13_0_0_throttler_map -ffffffff83001000 r smu_v13_0_4_ppt_funcs -ffffffff83002000 r smu_v13_0_5_ppt_funcs -ffffffff83003000 r smu_v13_0_6_ppt_funcs -ffffffff830033f0 r smu_v13_0_6_message_map -ffffffff83003e70 r smu_v13_0_6_clk_map -ffffffff83003f30 r smu_v13_0_6_table_map -ffffffff83003fb0 r smu_v13_0_6_i2c_algo -ffffffff83003fc0 r smu_v13_0_6_i2c_control_quirks -ffffffff83003fd0 r smu_v13_0_6_irq_funcs -ffffffff83003fe0 r smu_v13_0_6_throttler_map -ffffffff83003ff0 r smu_v13_0_6_feature_mask_map -ffffffff83005000 r smu_v13_0_7_ppt_funcs -ffffffff830053f0 r smu13_thermal_policy -ffffffff83005450 r smu_v13_0_7_throttler_map -ffffffff83006000 r yellow_carp_ppt_funcs -ffffffff83007000 R link_speed -ffffffff83007020 r __smu_message_names -ffffffff83008000 R pchb_ca -ffffffff83009000 R amas_ca -ffffffff83009028 R amas_devices -ffffffff83009040 r amas_feature -ffffffff8300a000 R cardslot_ca -ffffffff8300b000 R cardbus_ca -ffffffff8300c000 R com_cardbus_ca -ffffffff8300d000 R xl_cardbus_ca -ffffffff8300d030 R xl_cardbus_products -ffffffff8300e000 R dc_cardbus_ca -ffffffff8300e030 R dc_cardbus_devices -ffffffff8300f000 R fxp_cardbus_ca -ffffffff8300f028 R fxp_cardbus_devices -ffffffff83010000 R rl_cardbus_devices -ffffffff83010028 R rl_cardbus_ca -ffffffff83011000 R re_cardbus_ca -ffffffff83011028 R re_cardbus_devices -ffffffff83012000 R ath_cardbus_ca -ffffffff83013000 R athn_cardbus_ca -ffffffff83013030 r athn_cardbus_devices -ffffffff83014000 R atw_cardbus_ca -ffffffff83014028 R atw_cardbus_devices -ffffffff83015000 R rtw_cardbus_ca -ffffffff83015028 R rtw_cardbus_devices -ffffffff83016000 R ral_cardbus_ca -ffffffff83016030 r ral_cardbus_devices -ffffffff83017000 R acx_cardbus_ca -ffffffff83017028 r acx_cardbus_devices -ffffffff83018000 R pgt_cardbus_ca -ffffffff83018028 R pgt_cardbus_devices -ffffffff83019000 R ehci_cardbus_ca -ffffffff8301a000 R ohci_cardbus_ca -ffffffff8301b000 R uhci_cardbus_ca -ffffffff8301c000 R malo_cardbus_ca -ffffffff8301c028 r malo_cardbus_devices -ffffffff8301d000 R bwi_cardbus_ca -ffffffff8301d030 r bwi_cardbus_devices -ffffffff8301e000 R pcmcia_ca -ffffffff8301f000 r pcmcia_parse_cis_tuple.init_cfe -ffffffff83020000 r pcmcia_cis_quirks -ffffffff83021000 R ep_pcmcia_ca -ffffffff83022000 R ne_pcmcia_ca -ffffffff83022030 R ne2000devs -ffffffff83024000 R aic_pcmcia_ca -ffffffff83025000 R com_pcmcia_ca -ffffffff83026000 R wdc_pcmcia_ca -ffffffff83027000 R sm_pcmcia_ca -ffffffff83028000 R xe_pcmcia_ca -ffffffff83029000 R wi_pcmcia_ca -ffffffff83029030 r wi_pcmcia_products -ffffffff8302a000 R malo_pcmcia_ca -ffffffff8302b000 R an_pcmcia_ca -ffffffff8302c000 R pcib_ca -ffffffff8302d000 R amdpcib_ca -ffffffff8302d028 R amdpcib_devices -ffffffff8302e000 R tcpcib_ca -ffffffff8302e028 R tcpcib_devices -ffffffff8302f000 R aapic_ca -ffffffff83030000 R hme_pci_ca -ffffffff83030028 r hme_promhdr -ffffffff8303002a r hme_promdat -ffffffff83031000 R isa_ca -ffffffff83032000 R isadma_ca -ffffffff83033000 R fdc_ca -ffffffff83034000 R fd_ca -ffffffff83035000 R com_isa_ca -ffffffff83036000 R pckbc_isa_ca -ffffffff83037000 R vga_isa_ca -ffffffff83038000 R wdc_isa_ca -ffffffff83039000 R mpu_midi_hw_if -ffffffff8303a000 R mpu_isa_ca -ffffffff8303b000 R pcppi_ca -ffffffff8303c000 R spkr_ca -ffffffff8303c030 r pitchtab -ffffffff8303d000 R lpt_isa_ca -ffffffff8303e000 R wbsio_ca -ffffffff8303f000 R schsio_ca -ffffffff83040000 R lm_isa_ca -ffffffff83040028 R lm_wbsio_ca -ffffffff83041000 R it_sensors -ffffffff83041110 R it_vrfact -ffffffff83041140 R it_fan_regs -ffffffff83041160 R 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pfkeyv2_mtx -ffffffff834ea010 d pfkeyv2_seq -ffffffff834eb000 D sadb_exts_allowed_in -ffffffff834eb090 D sadb_exts_required_in -ffffffff834ec000 D cold -ffffffff834ed000 D bdevsw -ffffffff834ed460 D nblkdev -ffffffff834ed470 D cdevsw -ffffffff834ef450 D nchrdev -ffffffff834ef454 D mem_no -ffffffff834ef458 D swapdev -ffffffff834ef460 D constab -ffffffff834f0000 D machine -ffffffff834f0008 D cpu_idle_cycle_fcn -ffffffff834f0010 D lid_action -ffffffff834f0014 D pwr_action -ffffffff834f0018 D isa_constraint -ffffffff834f0028 D dma_constraint -ffffffff834f0040 D uvm_md_constraints -ffffffff834f0058 D delay_func -ffffffff834f0060 D initclock_func -ffffffff834f0068 D startclock_func -ffffffff834f0070 D bootinfo_size -ffffffff834f0074 D waittime -ffffffff834f0078 D dumpmag -ffffffff834f1000 d identifycpu.prevci -ffffffff834f2000 D tsc_rdtsc -ffffffff834f2008 D tsc_timecounter -ffffffff834f2058 D tsc_is_synchronized -ffffffff834f3000 D local_apic -ffffffff834f3020 D lapic_id -ffffffff834f3080 D lapic_tpr -ffffffff834f30a0 d lapic_ppr -ffffffff834f3100 d lapic_isr -ffffffff834f4000 D warn_once -ffffffff834f5000 d errata -ffffffff834f6000 D cpu_ucode_mtx -ffffffff834f7000 D mem_owner_bios -ffffffff834f7008 D mrops -ffffffff834f7028 D mtrrmask -ffffffff834f7030 D mtrrtomrt -ffffffff834f8000 D pg_frame -ffffffff834f8008 D pg_lgframe -ffffffff834f8010 D pmap_pg_wc -ffffffff834f8018 D pmaps_lock -ffffffff834f8028 d pmap_maxkvaddr -ffffffff834f9000 D kv_physwait -ffffffff834fa000 D fpu_save_len -ffffffff834fb000 D i8259_pic -ffffffff834fc000 D softintr_pic -ffffffff834fd000 D ipifunc -ffffffff834fe000 D setperf_mp_mutex -ffffffff834ff000 D db_Grp6 -ffffffff834ff040 D db_Grp7 -ffffffff834ff100 D db_Grp8 -ffffffff834ff140 D db_Grp9 -ffffffff834ff200 D db_GrpA -ffffffff834ff240 D db_GrpB -ffffffff834ff280 D db_GrpC -ffffffff834ff2c0 D db_inst_0f0x -ffffffff834ff440 D db_inst_0f2x -ffffffff834ff5c0 D db_inst_0f3x -ffffffff834ff740 D db_inst_0f8x -ffffffff834ff8c0 D db_inst_0f9x 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sienna_cichlid_ppt_funcs +ffffffff82ffb3f0 r smu11_thermal_policy +ffffffff82ffb448 r sienna_cichlid_i2c_algo +ffffffff82ffb458 r sienna_cichlid_i2c_control_quirks +ffffffff82ffb470 r sienna_cichlid_throttler_map +ffffffff82ffc000 r smu_v11_0_irq_funcs +ffffffff82ffc010 r link_width +ffffffff82ffd000 r vangogh_ppt_funcs +ffffffff82ffd3e8 r vangogh_throttler_map +ffffffff82ffe000 r renoir_ppt_funcs +ffffffff82ffe3e8 r renoir_throttler_map +ffffffff82fff000 r aldebaran_ppt_funcs +ffffffff82fff3f0 r aldebaran_clk_map +ffffffff82fff4b0 r aldebaran_table_map +ffffffff82fff530 r smu13_thermal_policy +ffffffff82fff588 r aldebaran_i2c_algo +ffffffff82fff598 r aldebaran_i2c_control_quirks +ffffffff82fff5b0 r aldebaran_throttler_map +ffffffff82fff5d0 r aldebaran_message_map +ffffffff83000050 r aldebaran_feature_mask_map +ffffffff83001000 R pmfw_decoded_link_speed +ffffffff83001020 R pmfw_decoded_link_width +ffffffff83001040 r smu_v13_0_irq_funcs +ffffffff83002000 r smu_v13_0_0_ppt_funcs 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+ffffffff8300b040 r amas_feature +ffffffff8300c000 R cardslot_ca +ffffffff8300d000 R cardbus_ca +ffffffff8300e000 R com_cardbus_ca +ffffffff8300f000 R xl_cardbus_ca +ffffffff8300f030 R xl_cardbus_products +ffffffff83010000 R dc_cardbus_ca +ffffffff83010030 R dc_cardbus_devices +ffffffff83011000 R fxp_cardbus_ca +ffffffff83011028 R fxp_cardbus_devices +ffffffff83012000 R rl_cardbus_devices +ffffffff83012028 R rl_cardbus_ca +ffffffff83013000 R re_cardbus_ca +ffffffff83013028 R re_cardbus_devices +ffffffff83014000 R ath_cardbus_ca +ffffffff83015000 R athn_cardbus_ca +ffffffff83015030 r athn_cardbus_devices +ffffffff83016000 R atw_cardbus_ca +ffffffff83016028 R atw_cardbus_devices +ffffffff83017000 R rtw_cardbus_ca +ffffffff83017028 R rtw_cardbus_devices +ffffffff83018000 R ral_cardbus_ca +ffffffff83018030 r ral_cardbus_devices +ffffffff83019000 R acx_cardbus_ca +ffffffff83019028 r acx_cardbus_devices +ffffffff8301a000 R pgt_cardbus_ca +ffffffff8301a028 R pgt_cardbus_devices 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hme_pci_ca +ffffffff83032028 r hme_promhdr +ffffffff8303202a r hme_promdat +ffffffff83033000 R isa_ca +ffffffff83034000 R isadma_ca +ffffffff83035000 R fdc_ca +ffffffff83036000 R fd_ca +ffffffff83037000 R com_isa_ca +ffffffff83038000 R pckbc_isa_ca +ffffffff83039000 R vga_isa_ca +ffffffff8303a000 R wdc_isa_ca +ffffffff8303b000 R mpu_midi_hw_if +ffffffff8303c000 R mpu_isa_ca +ffffffff8303d000 R pcppi_ca +ffffffff8303e000 R spkr_ca +ffffffff8303e030 r pitchtab +ffffffff8303f000 R lpt_isa_ca +ffffffff83040000 R wbsio_ca +ffffffff83041000 R schsio_ca +ffffffff83042000 R lm_isa_ca +ffffffff83042028 R lm_wbsio_ca +ffffffff83043000 R it_sensors +ffffffff83043110 R it_vrfact +ffffffff83043140 R it_fan_regs +ffffffff83043160 R it_fan_ext_regs +ffffffff83043178 R it_ca +ffffffff83044000 R abitkv_sensors +ffffffff83044200 R abitaa_sensors +ffffffff83044480 R abitav_sensors +ffffffff83044700 R abitas_sensors +ffffffff83044980 R abitax_sensors +ffffffff83044bc0 R abitm4_sensors +ffffffff83044e80 R abitan_sensors +ffffffff83045120 R abital_sensors +ffffffff830453a0 R abitaw_sensors +ffffffff83045700 R abitni_sensors +ffffffff830459a0 R abitat_sensors +ffffffff83045cc0 R abitan2_sensors +ffffffff83045f60 R abitab_sensors +ffffffff83046220 R abitan3_sensors +ffffffff83046500 R abitaw2_sensors +ffffffff83046860 R abitat2_sensors +ffffffff83046b60 R abitab2_sensors +ffffffff83046ea0 R abitin_sensors +ffffffff830471e0 R uguru_ca +ffffffff83048000 R aps_ca +ffffffff83049000 R wsdisplay_emul_ca +ffffffff83049030 r charClass +ffffffff8304a000 r usl_syncops +ffffffff8304b000 R wsevent_filtops +ffffffff8304c000 R wskbd_ca +ffffffff8304d000 r latin1_to_upper +ffffffff8304e000 R wsmouse_ca +ffffffff8304f000 R cyrillic_to_koi8 +ffffffff8304f060 R unicode_to_latin2 +ffffffff8304f0e0 R unicode_to_latin7 +ffffffff83050000 R wsemul_vt100_ops +ffffffff83051000 r decspcgr2uni +ffffffff83051100 r dectech2uni +ffffffff83051200 r nrctable +ffffffff83052000 r vt100_fkeys +ffffffff830520c0 r vt100_pfkeys +ffffffff830520e0 r vt100_numpad +ffffffff83053000 R pckbd_ca +ffffffff83053028 R pckbd_accessops +ffffffff83053040 R pckbd_consops +ffffffff83053060 R pckbd_keymapdata +ffffffff83053070 R pckbd_xtbl2 +ffffffff83053100 R pckbd_xtbl2_ext +ffffffff83054000 r pckbd_keydesc_us +ffffffff83054250 r pckbd_keydesc_de +ffffffff830542f0 r pckbd_keydesc_de_nodead +ffffffff83054310 r pckbd_keydesc_fr +ffffffff830543d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff83054510 r pckbd_keydesc_dk +ffffffff830545a0 r pckbd_keydesc_dk_nodead +ffffffff830545b0 r pckbd_keydesc_it +ffffffff83054640 r pckbd_keydesc_uk +ffffffff830546e0 r pckbd_keydesc_jp +ffffffff83054750 r pckbd_keydesc_sv +ffffffff83054780 r pckbd_keydesc_sv_nodead +ffffffff83054790 r pckbd_keydesc_no +ffffffff830547c0 r pckbd_keydesc_no_nodead +ffffffff830547d0 r pckbd_keydesc_us_declk +ffffffff83054860 r pckbd_keydesc_us_dvorak +ffffffff83054900 r pckbd_keydesc_us_colemak +ffffffff83054948 r pckbd_keydesc_swapctrlcaps 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pckbd_keydesc_ee_nodead +ffffffff830558b0 R pckbd_keydesctab +ffffffff83056000 R pms_ca +ffffffff83056028 R pms_accessops +ffffffff83056040 R pms_sec_accessops +ffffffff83056060 R pms_protocols +ffffffff830561e0 r alps_models +ffffffff83057000 R skgpio_led_offset +ffffffff83057008 R skgpio_ca +ffffffff83058000 R hidkbd_trtab +ffffffff83058100 r apple_fn_trans +ffffffff83058120 r apple_tb_trans +ffffffff83058140 r apple_mba_trans +ffffffff83059000 r hidcc_attach_wskbd.accessops +ffffffff83059020 r hidcc_keysyms +ffffffff8305a000 R usb_ca +ffffffff8305b000 R usb_known_products +ffffffff83067050 R usb_known_vendors +ffffffff83069880 R usbd_error_strs +ffffffff8306a000 R usb_quirks +ffffffff8306a3d8 R usb_dev_quirks +ffffffff8306a3e0 R usbd_no_quirk +ffffffff8306b000 R uhub_ca +ffffffff8306b028 R uhub_uhub_ca +ffffffff8306c000 R uaudio_ca +ffffffff8306c028 R uaudio_hw_if +ffffffff8306c0e0 R uaudio_rates +ffffffff8306c120 r uaudio_clkname.names +ffffffff8306c140 r uaudio_feature_addent.features +ffffffff8306d000 R uvideo_ca +ffffffff8306d028 R uvideo_hw_if +ffffffff8306d100 R uvideo_devs +ffffffff8306e000 r utvfu_select_norm.pal +ffffffff8306e040 r utvfu_select_norm.ntsc +ffffffff8306e080 r utvfu_setup_capture.setup +ffffffff8306e180 r utvfu_audio_start_chip.setup +ffffffff8306e1c8 r utvfu_audio_stop_chip.setup +ffffffff8306e1d8 R utvfu_ca +ffffffff8306e200 R utvfu_vid_hw_if +ffffffff8306e2d0 R utvfu_au_hw_if +ffffffff8306f000 R udl_ca +ffffffff8306f030 r udl_devs +ffffffff8306f0b0 r udl_modes +ffffffff83070000 R umidi_hw_if +ffffffff83070030 R umidi_ca +ffffffff83070060 r umidi_evlen +ffffffff83070080 r packet_length +ffffffff83071000 r quirk_name +ffffffff83072000 R ucom_ca +ffffffff83073000 R ugen_ca +ffffffff83073028 R ugenread_intr_filtops +ffffffff83073058 R ugenread_isoc_filtops +ffffffff83074000 R uhidev_ca +ffffffff83074030 r uhid_graphire_report_descr +ffffffff830740b0 r uhid_graphire3_4x5_report_descr +ffffffff83074160 r uhid_xb360gp_report_descr +ffffffff83074210 r uhid_xbonegp_report_descr +ffffffff83075000 R uhid_ca +ffffffff83075028 R uhidread_filtops +ffffffff83076000 R fido_ca +ffffffff83077000 R ujoy_ca +ffffffff83078000 r ukbd_keydesc_us +ffffffff830782a0 r ukbd_keydesc_de +ffffffff83078350 r ukbd_keydesc_de_nodead +ffffffff83078370 r ukbd_keydesc_fr +ffffffff83078430 r ukbd_keydesc_fr_apple +ffffffff83078570 r ukbd_keydesc_fr_dvorak_bepo +ffffffff830786b0 r ukbd_keydesc_dk +ffffffff83078750 r ukbd_keydesc_dk_nodead +ffffffff83078760 r ukbd_keydesc_it +ffffffff83078800 r ukbd_keydesc_uk +ffffffff830788b0 r ukbd_keydesc_jp +ffffffff83078920 r ukbd_keydesc_sv +ffffffff83078950 r ukbd_keydesc_sv_nodead +ffffffff83078960 r ukbd_keydesc_no +ffffffff83078990 r ukbd_keydesc_no_nodead +ffffffff830789a0 r ukbd_keydesc_us_dvorak +ffffffff83078a40 r ukbd_keydesc_us_colemak +ffffffff83078a88 r ukbd_keydesc_swapctrlcaps +ffffffff83078aa0 r ukbd_keydesc_iopener +ffffffff83078af0 r ukbd_keydesc_es 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smsc_ca +ffffffff83095030 r smsc_devs +ffffffff83096000 R cue_ca +ffffffff83097000 R kue_devs +ffffffff83097088 R kue_ca +ffffffff83098000 R cdce_devs +ffffffff83098048 R cdce_ca +ffffffff83099000 R urndis_ca +ffffffff83099030 R urndis_class +ffffffff8309a000 R mos_devs +ffffffff8309a018 R mos_ca +ffffffff8309b000 R mue_devs +ffffffff8309b020 R mue_ca +ffffffff8309c000 R udav_ca +ffffffff8309c030 r udav_devs +ffffffff8309d000 R upl_ca +ffffffff8309e000 R ugl_ca +ffffffff8309f000 R url_ca +ffffffff8309f030 r url_devs +ffffffff830a0000 R ure_devs +ffffffff830a00e8 R ure_ca +ffffffff830a1000 R uaq_devs +ffffffff830a1018 R uaq_ca +ffffffff830a2000 R umodem_methods +ffffffff830a2040 R umodem_ca +ffffffff830a3000 R uftdi_methods +ffffffff830a3040 R uftdi_ca +ffffffff830a3070 r uftdi_devs +ffffffff830a4000 R uplcom_methods +ffffffff830a4040 R uplcom_ca +ffffffff830a4070 r uplcom_devs +ffffffff830a5000 R umct_methods +ffffffff830a5040 R umct_ca +ffffffff830a5070 r umct_devs +ffffffff830a6000 R uvscom_methods +ffffffff830a6040 R uvscom_ca +ffffffff830a6070 r uvscom_devs +ffffffff830a7000 R ubsa_methods +ffffffff830a7040 R ubsa_devs +ffffffff830a7060 R ubsa_ca +ffffffff830a8000 R ukspan_ca +ffffffff830a8028 r ukspan_devs +ffffffff830a8030 r ukspan_methods +ffffffff830a9000 R uslcom_methods +ffffffff830a9040 R uslcom_ca +ffffffff830a9070 r uslcom_devs +ffffffff830aa000 R uark_methods +ffffffff830aa040 R uark_ca +ffffffff830aa068 r uark_devs +ffffffff830ab000 R moscom_methods +ffffffff830ab040 R moscom_ca +ffffffff830ab068 r moscom_devs +ffffffff830ac000 R umcs_methods +ffffffff830ac040 R umcs_devs +ffffffff830ac050 R umcs_ca +ffffffff830ad000 R uscom_methods +ffffffff830ad040 R uscom_ca +ffffffff830ad068 r uscom_devs +ffffffff830ae000 R ucrcom_methods +ffffffff830ae040 R ucrcom_ca +ffffffff830af000 R uxrcom_methods +ffffffff830af040 R uxrcom_ca +ffffffff830af068 r uxrcom_devs +ffffffff830b0000 R uipaq_methods +ffffffff830b0040 R uipaq_ca +ffffffff830b0070 r uipaq_devs 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kstat_next_id +ffffffff83446018 D kstat_default_lock +ffffffff83447000 D pf_inp_mtx +ffffffff83447010 D pf_hdr_limit +ffffffff83447020 D pf_pool_limits +ffffffff83447090 D pf_state_list +ffffffff834470c0 D pf_purge_states_task +ffffffff834470f0 D pf_purge_states_to +ffffffff83447138 D pf_purge_states_collect +ffffffff83447140 D pf_purge_to +ffffffff83447188 D pf_purge_task +ffffffff83448000 D pf_tags +ffffffff83448010 D pf_qids +ffffffff83448020 D pf_lock +ffffffff83448030 D pf_state_lock +ffffffff83448040 D pfioctl_rw +ffffffff83448050 d pf_open_trans.ticket +ffffffff83449000 D pfi_update +ffffffff8344a000 D pflog_cloner +ffffffff8344b000 D pfsync_cloner +ffffffff8344c000 D pflow_cloner +ffffffff8344d000 d hotplug_mtx +ffffffff8344e000 D pppoe_cloner +ffffffff8344e030 D pppoediscinq +ffffffff8344e060 D pppoeinq +ffffffff8344f000 D dt_lock +ffffffff83450000 D dt_prov_profile +ffffffff83450030 D dt_prov_interval +ffffffff83451000 D dtps_nsysent +ffffffff83451008 D dt_prov_syscall +ffffffff83452000 D dt_prov_static +ffffffff83452030 D dt_static_sched_dequeue +ffffffff834520a0 D dt_static_sched_enqueue +ffffffff83452110 D dt_static_sched_fork +ffffffff83452180 D dt_static_sched_off__cpu +ffffffff834521f0 D dt_static_sched_on__cpu +ffffffff83452260 D dt_static_sched_remain__cpu +ffffffff834522d0 D dt_static_sched_sleep +ffffffff83452340 D dt_static_sched_steal +ffffffff834523b0 D dt_static_sched_unsleep +ffffffff83452420 D dt_static_sched_wakeup +ffffffff83452490 D dt_static_raw_syscalls_sys_enter +ffffffff83452500 D dt_static_raw_syscalls_sys_exit +ffffffff83452570 D dt_static_uvm_fault +ffffffff834525e0 D dt_static_uvm_map_insert +ffffffff83452650 D dt_static_uvm_map_remove +ffffffff834526c0 D dt_static_uvm_malloc +ffffffff83452730 D dt_static_uvm_free +ffffffff834527a0 D dt_static_uvm_pool_get +ffffffff83452810 D dt_static_uvm_pool_put +ffffffff83452880 D dt_static_vfs_bufcache_rel +ffffffff834528f0 D dt_static_vfs_bufcache_take +ffffffff83452960 D dt_static_vfs_cleaner +ffffffff834529d0 D dt_static_vmm_guest_enter +ffffffff83452a40 D dt_static_vmm_guest_exit +ffffffff83452ab0 D dt_static_vmm_inout +ffffffff83452b20 D dt_static_smr_call +ffffffff83452b90 D dt_static_smr_called +ffffffff83452c00 D dt_static_smr_barrier_enter +ffffffff83452c70 D dt_static_smr_barrier_exit +ffffffff83452ce0 D dt_static_smr_wakeup +ffffffff83452d50 D dt_static_smr_thread +ffffffff83452dc0 D dt_static_refcnt_none +ffffffff83452e30 D dt_static_refcnt_ethmulti +ffffffff83452ea0 D dt_static_refcnt_ifaddr +ffffffff83452f10 D dt_static_refcnt_ifmaddr +ffffffff83452f80 D dt_static_refcnt_inpcb +ffffffff83452ff0 D dt_static_refcnt_rtentry +ffffffff83453060 D dt_static_refcnt_syncache +ffffffff834530d0 D dt_static_refcnt_tdb +ffffffff83454000 D db_next_free_breakpoint +ffffffff83454008 D db_breakpoints_inserted +ffffffff83455000 D db_ed_style +ffffffff83456000 D db_examine_format +ffffffff83456078 D db_print_format +ffffffff83457000 D db_history_size +ffffffff83457008 D db_history_curr +ffffffff83457010 D db_history_last +ffffffff83458000 D db_tab_stop_width +ffffffff83458004 D db_max_line +ffffffff83458008 D db_max_width +ffffffff8345800c D db_radix +ffffffff83459000 D db_lastsym +ffffffff83459008 D db_maxoff +ffffffff8345a000 D db_vars +ffffffff8345a090 D db_evars +ffffffff8345b000 D db_watchpoints_inserted +ffffffff8345b008 D db_next_free_watchpoint +ffffffff8345c000 D db_log +ffffffff8345d000 D audio_cd +ffffffff8345d020 D audio_lock +ffffffff8345e000 D midi_cd +ffffffff8345f000 D rnd_cold +ffffffff8345f004 D rnd_slowextract +ffffffff8345f008 D rnd_timeout +ffffffff8345f050 D rndlock +ffffffff8345f060 D rndreinit_timeout +ffffffff8345f0a8 D rnd_task +ffffffff83460000 D video_cd +ffffffff83461000 d rrip_table_analyze +ffffffff834610e0 d rrip_table_getname +ffffffff834611e0 d rrip_table_getsymname +ffffffff83461280 d rrip_table_extref +ffffffff83462000 D nexecs +ffffffff83463000 D elf_note_names +ffffffff83464000 D ncpus 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nosuidcoredump +ffffffff83472008 D sigio_lock +ffffffff83473000 D smr_lock +ffffffff83473010 D smr_logintvl +ffffffff83474000 D startuphook_list +ffffffff83475000 D sysctl_lock +ffffffff83475010 D sysctl_disklock +ffffffff83475020 d openbsd +ffffffff83475024 d arg_max +ffffffff83475028 d posix_version +ffffffff8347502c d ngroups_max +ffffffff83475030 d int_one +ffffffff83475034 d maxpartitions +ffffffff83475038 d raw_part +ffffffff8347503c D allowpowerdown +ffffffff83475040 D hw_power +ffffffff83475044 d byte_order +ffffffff83476000 d thrsleep_queue +ffffffff83476010 d thrsleep_lock +ffffffff83477000 D tc_lock +ffffffff83477010 D windup_mtx +ffffffff83477020 d dummy_timecounter +ffffffff83477070 D timecounter +ffffffff83477078 d timehands +ffffffff83477080 d th0 +ffffffff83477118 d th1 +ffffffff83478000 D itimer_mtx +ffffffff83478010 D ratecheck_mtx +ffffffff83478020 D ppsratecheck_mtx +ffffffff83478030 D resettodr_to +ffffffff83478078 D resettodr_task +ffffffff83479000 D timeout_mutex +ffffffff8347a000 D wdog_auto +ffffffff8347b000 D taskq_sys +ffffffff8347b050 D taskq_sys_mp +ffffffff8347c000 d update_loadavg.to +ffffffff8347c048 D ccpu +ffffffff8347c050 d schedcpu.to +ffffffff8347c098 D perflevel +ffffffff8347c09c D perfpolicy +ffffffff8347c0a0 D setperf_to +ffffffff8347d000 D autoconf_attdet_mtx +ffffffff8347d010 D msgs +ffffffff8347e000 d evcount_list +ffffffff8347e010 d evcount_percpu_init_list +ffffffff8347f000 D syslogf_rwlock +ffffffff8347f010 D log_mtx +ffffffff8347f020 D log_kq_mtx +ffffffff8347f030 D logstash_in +ffffffff8347f038 D logstash_out +ffffffff8347f040 D logstash_rwlock +ffffffff83480000 D pool_head +ffffffff83480010 D pool_lock +ffffffff83480020 D pool_debug +ffffffff83480028 D pool_allocator_single +ffffffff83480040 D pool_allocator_multi +ffffffff83480058 D pool_allocator_multi_ni +ffffffff83480070 D pool_gc_tick +ffffffff834800b8 D pool_gc_task +ffffffff83481000 D kprintf_mutex +ffffffff83481010 D db_panic +ffffffff83481014 D splassert_ctl +ffffffff83481018 D v_putc +ffffffff83481020 D printf_flags +ffffffff83482000 D userconf_base +ffffffff83482004 D userconf_maxdev +ffffffff83482008 D userconf_totdev +ffffffff8348200c D userconf_maxlocnames +ffffffff83482010 D userconf_cnt +ffffffff83482014 D userconf_lines +ffffffff83482018 D userconf_histsz +ffffffff83482020 D userconf_cmds +ffffffff83483000 D ftlock +ffffffff83484000 d ppollcollect.poll_errintvl +ffffffff83485000 D ttydefchars +ffffffff83485014 D ttclos +ffffffff8348501b D ttopen +ffffffff83485022 D ttybg +ffffffff83485028 D ttyin +ffffffff8348502e D ttyout +ffffffff83485038 D ttylist_lock +ffffffff83486000 D linesw +ffffffff83486280 D nlinesw +ffffffff83487000 D pt_softc_lock +ffffffff83488000 d mbstat_boot_boot_cpumem +ffffffff834880c0 D mbstat +ffffffff834880d0 D mclsizes +ffffffff834880f0 D m_extref_mtx +ffffffff83488100 D m_pool_allocator +ffffffff83489000 D somaxconn +ffffffff83489004 D sominconn +ffffffff83489008 D sosplice_lock +ffffffff8348a000 D sb_max +ffffffff8348b000 D unp_df_lock +ffffffff8348b010 D unp_gc_lock +ffffffff8348b020 D unp_rights_mtx +ffffffff8348b030 D unp_ino_mtx +ffffffff8348b040 D unp_gc_task +ffffffff8348b070 D unpst_sendspace +ffffffff8348b074 D unpst_recvspace +ffffffff8348b078 D unpsq_sendspace +ffffffff8348b07c D unpsq_recvspace +ffffffff8348b080 D unpdg_sendspace +ffffffff8348b084 D unpdg_recvspace +ffffffff8348c000 D doingcache +ffffffff8348d000 D maxvfsconf +ffffffff8348d010 d vfsconflist +ffffffff8348e000 D lockf_lock +ffffffff8348e010 D maxlocksperuid +ffffffff8348f000 D iftovt_tab +ffffffff8348f040 D vttoif_tab +ffffffff8348f064 D suid_clear +ffffffff8348f068 D vnode_mtx +ffffffff8348f078 D vfs_stall_lock +ffffffff8348f090 D vtypes +ffffffff8348f0e0 D vtags +ffffffff83490000 D syncer_maxdelay +ffffffff83490004 D syncdelay +ffffffff83491000 D dosdirtemplate +ffffffff83492000 D ntfs_hashlock +ffffffff83493000 D ntfs_toupper_lock +ffffffff83494000 D art_table_gc_mtx +ffffffff83494010 D art_table_gc_task +ffffffff83494040 D art_node_gc_mtx +ffffffff83494050 D art_node_gc_task +ffffffff83495000 D bpf_bufsize +ffffffff83495004 D bpf_maxbufsize +ffffffff83496000 D ifg_head +ffffffff83496010 D if_cloners_lock +ffffffff83496020 D if_hooks_mtx +ffffffff83496030 D if_input_task_locked +ffffffff83496060 D netlock +ffffffff83496070 D ifnetlist +ffffffff83497000 D ifiq_maxlen_drop +ffffffff83497004 D ifiq_maxlen_return +ffffffff83498000 D etherbroadcastaddr +ffffffff83498006 D ether_ipmulticast_min +ffffffff8349800c D ether_ipmulticast_max +ffffffff83498012 D ether_ip6multicast_min +ffffffff83498018 D ether_ip6multicast_max +ffffffff83499000 D etherip_cloner +ffffffff83499030 D etherip_list +ffffffff8349a000 D loop_cloner +ffffffff8349b000 D ifmedia_mtx +ffffffff8349c000 D ppp_compressors +ffffffff8349c020 D ppp_cloner +ffffffff8349d000 D ppp_pkt_init +ffffffff8349e000 D ppp_bsd_compress +ffffffff8349f000 D ppp_deflate +ffffffff8349f070 D ppp_deflate_draft +ffffffff834a0000 D tun_cloner +ffffffff834a0030 D tap_cloner +ffffffff834a1000 D bridgeintrq +ffffffff834a1038 D bridge_cloner +ffffffff834a2000 d veb_cloner +ffffffff834a2030 d vport_cloner +ffffffff834a3000 D vlan_tagh_lk +ffffffff834a3010 D vlan_cloner +ffffffff834a3040 D svlan_cloner +ffffffff834a4000 D pipex_list_mtx +ffffffff834a4010 D pipex_prune +ffffffff834a4018 D pipexoutq +ffffffff834a4050 d SHAPad2 +ffffffff834a5000 D rtmap_gc +ffffffff834a5018 D rt_rc +ffffffff834a6000 D rt_labels +ffffffff834a6010 D rtlabel_mtx +ffffffff834a7000 D enc_cloner +ffffffff834a8000 D gre_cloner +ffffffff834a8030 D gre_list +ffffffff834a8040 D mgre_cloner +ffffffff834a8070 D egre_cloner +ffffffff834a80a0 D nvgre_cloner +ffffffff834a80d0 D eoip_cloner +ffffffff834a9000 D trunk_cloner +ffffffff834aa000 d aggr_cloner +ffffffff834ab000 d tpmr_cloner +ffffffff834ac000 D mpe_cloner +ffffffff834ad000 D mpw_cloner +ffffffff834ae000 D mpip_cloner +ffffffff834af000 d bpe_cloner +ffffffff834af030 d bpe_lock +ffffffff834b0000 D vether_cloner +ffffffff834b1000 d rport_cloner +ffffffff834b1030 d rport_interfaces_lock +ffffffff834b2000 D pair_cloner +ffffffff834b3000 d vxlan_cloner +ffffffff834b3030 d vxlan_lock +ffffffff834b3040 d vxlan_teps +ffffffff834b4000 D underload_interval +ffffffff834b4010 D wg_cloner +ffffffff834b5000 d stoeplitz_keyseed +ffffffff834b6000 D ieee80211_cache_size +ffffffff834b7000 D arpt_prune +ffffffff834b7004 D arpt_keep +ffffffff834b7008 D arpt_down +ffffffff834b7010 D arpinq +ffffffff834b7048 D arp_mtx +ffffffff834b7058 D arp_maxtries +ffffffff834b8000 D ipport_firstauto +ffffffff834b8004 D ipport_lastauto +ffffffff834b8008 D ipport_hifirstauto +ffffffff834b800c D ipport_hilastauto +ffffffff834b9000 D divert_sendspace +ffffffff834b9004 D divert_recvspace +ffffffff834b9008 D divbhashsize +ffffffff834ba000 D icmptstamprepl +ffffffff834ba004 D icmperrppslim +ffffffff834ba008 D icmp_redirtimeout +ffffffff834bb000 D ip_sendredirects +ffffffff834bb004 D ip_defttl +ffffffff834bb008 D ip_mtudisc +ffffffff834bb00c D ip_mtudisc_timeout +ffffffff834bb010 D ipq_mutex +ffffffff834bb020 D ip_maxqueue +ffffffff834bb028 D ipintrq +ffffffff834bb060 d ipsend_task +ffffffff834bb090 d ipsendraw_task +ffffffff834bc000 D ip_mrtproto +ffffffff834bc004 d sin +ffffffff834bd000 D rip_sendspace +ffffffff834bd008 D rip_recvspace +ffffffff834be000 D tcp_debug_mtx +ffffffff834bf000 D tcprexmtthresh +ffffffff834bf004 D tcptv_keep_init +ffffffff834bf008 D tcp_rst_ppslim +ffffffff834bf00c D tcp_ackdrop_ppslim +ffffffff834bf010 D tcp_syn_hash_size +ffffffff834bf014 D tcp_syn_cache_limit +ffffffff834bf018 D tcp_syn_bucket_limit +ffffffff834bf01c D tcp_syn_use_limit +ffffffff834bf020 D syn_cache_mtx +ffffffff834c0000 D tcp_outflags +ffffffff834c1000 D tcp_timer_mtx +ffffffff834c1010 D tcp_mssdflt +ffffffff834c1014 D tcp_rttdflt +ffffffff834c1018 D tcp_do_rfc1323 +ffffffff834c101c D tcp_do_sack +ffffffff834c1020 D tcp_do_rfc3390 +ffffffff834c1024 D tcp_do_tso +ffffffff834c1028 D tcp_reass_limit +ffffffff834c102c D tcp_sackhole_limit +ffffffff834c2000 D tcp_backoff +ffffffff834c2034 D tcp_totbackoff +ffffffff834c3000 D tcp_sendspace +ffffffff834c3004 D tcp_recvspace +ffffffff834c3008 D tcp_autorcvbuf_inc +ffffffff834c4000 D udpcksum +ffffffff834c4004 D udp_sendspace +ffffffff834c4008 D udp_recvspace +ffffffff834c5000 D ipsec_flows_mtx +ffffffff834c5010 D ipsec_ids_idle +ffffffff834c5014 D ipsec_ids_next_flow +ffffffff834c5018 D ipsec_policy_head +ffffffff834c5028 D ipsp_ids_gc_timeout +ffffffff834c5070 D tdb_sadb_mtx +ffffffff834c5080 d tdb_hashmask +ffffffff834c6000 D ipo_tdb_mtx +ffffffff834c6010 D ipsec_acquire_mtx +ffffffff834c6020 D ipsec_acquire_head +ffffffff834c7000 D ipsec_keep_invalid +ffffffff834c7004 D ipsec_require_pfs +ffffffff834c7008 D ipsec_soft_timeout +ffffffff834c700c D ipsec_exp_timeout +ffffffff834c7010 D ipsec_soft_first_use +ffffffff834c7014 D ipsec_exp_first_use +ffffffff834c7018 D ipsec_expire_acquire +ffffffff834c701c D esp_enable +ffffffff834c7020 D ah_enable +ffffffff834c8000 D udpencap_enable +ffffffff834c8004 D udpencap_port +ffffffff834c9000 D carp_vh_rc +ffffffff834c9020 D carp_sc_rc +ffffffff834c9040 D carp_opts +ffffffff834c9058 D carp_cloner +ffffffff834c9088 d carp_send_na.mcast +ffffffff834ca000 d PADDING +ffffffff834cb000 d PADDING +ffffffff834cc000 d weak_keys +ffffffff834cd000 D swcr_id +ffffffff834ce000 D window_inflate +ffffffff834ce004 D window_deflate +ffffffff834cf000 D ghash_update +ffffffff834d0000 D mpls_defttl +ffffffff834d0004 D mpls_mapttl_ip +ffffffff834d1000 D nfskevq_lock +ffffffff834d2000 D desirednfsrvcache +ffffffff834d3000 D nfs_niothreads +ffffffff834d4000 D fragtbl +ffffffff834d5000 D ffs_vtbl +ffffffff834d6000 D dirchk +ffffffff834d7000 D desireddquot +ffffffff834d8000 D amap_list_lock +ffffffff834d9000 d uao_list_lock +ffffffff834da000 D udv_lock +ffffffff834db000 d uvmexp_countersboot_boot_cpumem +ffffffff834db0c0 D uvmexp_counters +ffffffff834db0c8 D vm_min_kernel_address +ffffffff834dc000 D no_constraint +ffffffff834dd000 d uvm_kmapent_warn_rate +ffffffff834de000 D maxslp +ffffffff834df000 D uvmpagerops +ffffffff834e0000 D uvm_swap_data_lock +ffffffff834e0010 D swap_syscall_lock +ffffffff834e0020 D oommtx +ffffffff834e1000 D uvm_doswapencrypt +ffffffff834e2000 D gif_list +ffffffff834e2010 D gif_cloner +ffffffff834e3000 d sec_cloner +ffffffff834e3030 d sec_tdb_gc_mtx +ffffffff834e3040 d sec_tdb_gc_task +ffffffff834e4000 D divert6_sendspace +ffffffff834e4004 D divert6_recvspace +ffffffff834e4008 D divb6hashsize +ffffffff834e5000 d in6_get_hw_ifid.allone +ffffffff834e6000 D ip6_sendredirects +ffffffff834e6004 D ip6_defhlim +ffffffff834e6008 D ip6_defmcasthlim +ffffffff834e600c D ip6_maxfragpackets +ffffffff834e6010 D ip6_maxfrags +ffffffff834e6014 D ip6_log_interval +ffffffff834e6018 D ip6_hdrnestlimit +ffffffff834e601c D ip6_dad_count +ffffffff834e6020 D ip6_auto_flowlabel +ffffffff834e6024 D ip6_use_deprecated +ffffffff834e6028 D ip6_neighborgcthresh +ffffffff834e602c D ip6_maxdynroutes +ffffffff834e6030 D rip6_sendspace +ffffffff834e6038 D rip6_recvspace +ffffffff834e6040 D icmp6_redirtimeout +ffffffff834e6044 D icmp6errppslim +ffffffff834e6048 D ip6_mtudisc_timeout +ffffffff834e7000 D frag6_mutex +ffffffff834e8000 d icmp6_mtudisc_hiwat +ffffffff834e8004 d icmp6_mtudisc_lowat +ffffffff834e9000 d randomtab_20 +ffffffff834ea000 D ip6intrq +ffffffff834ea038 d ip6send_task +ffffffff834eb000 D nd6_timer_next +ffffffff834eb008 D nd6_expire_next +ffffffff834eb010 D nd6_delay +ffffffff834eb014 D nd6_umaxtries +ffffffff834eb018 D nd6_mmaxtries +ffffffff834eb01c D nd6_gctimer +ffffffff834eb020 D nd6_maxndopt +ffffffff834eb028 D nd6_mtx +ffffffff834eb038 D nd6_list +ffffffff834ec000 d dadq +ffffffff834ed000 D pfkeyv2_mtx +ffffffff834ed010 d pfkeyv2_seq +ffffffff834ee000 D sadb_exts_allowed_in +ffffffff834ee090 D sadb_exts_required_in +ffffffff834ef000 D cold +ffffffff834f0000 D bdevsw +ffffffff834f0460 D nblkdev +ffffffff834f0470 D cdevsw +ffffffff834f2450 D nchrdev +ffffffff834f2454 D mem_no +ffffffff834f2458 D swapdev +ffffffff834f2460 D constab +ffffffff834f3000 D machine +ffffffff834f3008 D cpu_idle_cycle_fcn +ffffffff834f3010 D lid_action +ffffffff834f3014 D pwr_action +ffffffff834f3018 D isa_constraint +ffffffff834f3028 D dma_constraint +ffffffff834f3040 D uvm_md_constraints +ffffffff834f3058 D delay_func +ffffffff834f3060 D initclock_func +ffffffff834f3068 D startclock_func +ffffffff834f3070 D bootinfo_size +ffffffff834f3074 D waittime +ffffffff834f3078 D dumpmag +ffffffff834f4000 d identifycpu.prevci +ffffffff834f5000 D tsc_rdtsc +ffffffff834f5008 D tsc_timecounter +ffffffff834f5058 D tsc_is_synchronized +ffffffff834f6000 D local_apic +ffffffff834f6020 D lapic_id +ffffffff834f6080 D lapic_tpr +ffffffff834f60a0 d lapic_ppr +ffffffff834f6100 d lapic_isr +ffffffff834f7000 D warn_once +ffffffff834f8000 d errata +ffffffff834f9000 D cpu_ucode_mtx +ffffffff834fa000 D mem_owner_bios +ffffffff834fa008 D mrops +ffffffff834fa028 D mtrrmask +ffffffff834fa030 D mtrrtomrt +ffffffff834fb000 D pg_frame +ffffffff834fb008 D pg_lgframe +ffffffff834fb010 D pmap_pg_wc +ffffffff834fb018 D pmaps_lock +ffffffff834fb028 d pmap_maxkvaddr +ffffffff834fc000 D kv_physwait +ffffffff834fd000 D fpu_save_len +ffffffff834fe000 D i8259_pic +ffffffff834ff000 D softintr_pic +ffffffff83500000 D ipifunc +ffffffff83501000 D setperf_mp_mutex +ffffffff83502000 D db_Grp6 +ffffffff83502040 D db_Grp7 +ffffffff83502100 D db_Grp8 +ffffffff83502140 D db_Grp9 +ffffffff83502200 D db_GrpA +ffffffff83502240 D db_GrpB +ffffffff83502280 D db_GrpC +ffffffff835022c0 D db_inst_0f0x +ffffffff83502440 D db_inst_0f2x +ffffffff835025c0 D db_inst_0f3x +ffffffff83502740 D db_inst_0f8x +ffffffff835028c0 D db_inst_0f9x +ffffffff83502a40 D db_inst_0fax +ffffffff83502bc0 D db_inst_0fbx +ffffffff83502d40 D db_inst_0fcx +ffffffff83502ec0 D db_inst_0f +ffffffff83502f40 D db_Esc92 +ffffffff83502f80 D db_Esc94 +ffffffff83502fc0 D db_Esc95 +ffffffff83503000 D db_Esc96 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+ffffffff83508108 D spleen32x64 +ffffffff83508160 d builtin_fonts +ffffffff835081e0 d wsfont_add.cookiegen +ffffffff835081f0 d spleen8x16_data +ffffffff83508ff0 d spleen12x24_data +ffffffff8350b9f0 d spleen16x32_data +ffffffff8350f1f0 d spleen32x64_data +ffffffff8351e000 D nsphy_cd +ffffffff8351f000 D nsphyter_cd +ffffffff83520000 D gentbi_cd +ffffffff83521000 D qsphy_cd +ffffffff83522000 D inphy_cd +ffffffff83523000 D iophy_cd +ffffffff83524000 D eephy_cd +ffffffff83525000 D exphy_cd +ffffffff83526000 D rlphy_cd +ffffffff83527000 D lxtphy_cd +ffffffff83528000 D luphy_cd +ffffffff83529000 D mtdphy_cd +ffffffff8352a000 D icsphy_cd +ffffffff8352b000 D sqphy_cd +ffffffff8352c000 D tqphy_cd +ffffffff8352d000 D ukphy_cd +ffffffff8352e000 D dcphy_cd +ffffffff8352f000 D bmtphy_cd +ffffffff83530000 D brgphy_cd +ffffffff83531000 D xmphy_cd +ffffffff83532000 D amphy_cd +ffffffff83533000 D acphy_cd +ffffffff83534000 D nsgphy_cd +ffffffff83535000 D urlphy_cd +ffffffff83536000 D rgephy_cd +ffffffff83537000 D ciphy_cd +ffffffff83538000 D ipgphy_cd +ffffffff83539000 D etphy_cd +ffffffff8353a000 D jmphy_cd +ffffffff8353b000 D atphy_cd +ffffffff8353c000 D scsi_autoconf +ffffffff8353c008 D scsibus_cd +ffffffff8353d000 D cd_cd +ffffffff8353e000 D ch_cd +ffffffff8353e020 D chquirks +ffffffff8353f000 D sd_cd +ffffffff83540000 D st_cd +ffffffff83541000 D uk_cd +ffffffff83542000 D safte_cd +ffffffff83543000 D ses_cd +ffffffff83544000 D sym_cd +ffffffff83544020 D sym_devices +ffffffff83544070 D asym_devices +ffffffff83545000 D rdac_cd +ffffffff83545020 D rdac_devices +ffffffff83546000 D emc_cd +ffffffff83546020 D emc_devices +ffffffff83547000 D hds_cd +ffffffff83547020 D hds_devices +ffffffff83548000 D atapiscsi_cd +ffffffff83549000 D wd_cd +ffffffff83549020 d wddumpmulti +ffffffff8354a000 D mainbus_cd +ffffffff8354a020 D mba_iba +ffffffff8354b000 D bios_cd +ffffffff8354b020 D smbios_uninfo +ffffffff8354c000 D mpbios_cd +ffffffff8354c020 d mp_conf +ffffffff8354c070 d extint_bus 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+ffffffff8355b160 D hyperv_cd +ffffffff8355c000 d hv_ic_devs +ffffffff8355d000 D hvn_cd +ffffffff8355e000 D hvs_cd +ffffffff8355f000 D virtio_cd +ffffffff83560000 D vio_cd +ffffffff83561000 D vioblk_cd +ffffffff83562000 D viomb_cd +ffffffff83563000 D viornd_cd +ffffffff83564000 D vioscsi_cd +ffffffff83565000 D vmmci_cd +ffffffff83566000 D pci_cd +ffffffff83567000 D arc_fw_hdr +ffffffff83567008 D arc_cd +ffffffff83568000 D jmb_cd +ffffffff83569000 D mfii_cd +ffffffff8356a000 D ips_cd +ffffffff8356b000 D eap_cd +ffffffff8356c000 D auacer_cd +ffffffff8356d000 D auich_cd +ffffffff8356e000 D azalia_cd +ffffffff8356f000 D envy_cd +ffffffff8356f020 D envy_matchids +ffffffff8356f030 D envy_rates +ffffffff8356f0b0 D ak4524_dac +ffffffff8356f0d8 D ak4524_adc +ffffffff8356f100 D ak4358_dac +ffffffff8356f128 D ak5365_adc +ffffffff8356f150 D unkenvy_codec +ffffffff8356f180 D envy_cards +ffffffff8356f3f0 D envy_cards_ht +ffffffff8356f600 d julia_eeprom +ffffffff83570000 D emu_cd +ffffffff83571000 D auixp_cd +ffffffff83572000 D clcs_cd +ffffffff83573000 D yds_cd +ffffffff83574000 D auvia_cd +ffffffff83575000 D qle_cd +ffffffff83576000 D mpii_cd +ffffffff83577000 D aq_cd +ffffffff83578000 D de_cd +ffffffff83579000 D pcn_cd +ffffffff8357a000 D wdc_sii3114_vtbl +ffffffff8357a038 D wdc_pdc203xx_vtbl +ffffffff8357a070 D wdc_svwsata_vtbl +ffffffff8357a0a8 D pciide_cd +ffffffff8357a0d0 d sis_hostbr_type +ffffffff8357b000 D ppb_cd +ffffffff8357c000 D vr_cd +ffffffff8357c020 D vr_devices +ffffffff8357d000 D txp_cd +ffffffff8357e000 D bt848_card_signature +ffffffff8357f000 D bktr_cd +ffffffff83580000 D em_cd +ffffffff83581000 D ixgb_cd +ffffffff83582000 D ix_cd +ffffffff83582020 D ixgbe_smart_speed +ffffffff83582024 D ixgbe_enable_msix +ffffffff83583000 D ixl_cd +ffffffff83583020 d ixl_sff_lock +ffffffff83584000 D xge_cd +ffffffff83585000 D thtc_cd +ffffffff83585020 D tht_cd +ffffffff83585040 D tht_txt_desc +ffffffff83585068 D tht_rxf_desc +ffffffff83585090 D tht_rxd_desc +ffffffff835850b8 D tht_txf_desc +ffffffff83586000 D myx_cd +ffffffff83587000 D oce_cd +ffffffff83588000 D dc_devs +ffffffff83589000 D cas_cd +ffffffff8358a000 D sis_cd +ffffffff8358b000 D se_cd +ffffffff8358c000 D mbg_cd +ffffffff8358d000 D cbb_cd +ffffffff8358d020 D yc_chipsets +ffffffff8358d1b0 d pccbb_funcs +ffffffff8358d1e0 d pccbb_pcmcia_funcs +ffffffff8358e000 D skc_cd +ffffffff8358e020 D sk_cd +ffffffff8358f000 D mskc_cd +ffffffff8358f020 D msk_cd +ffffffff83590000 D puc_cd +ffffffff83591000 D puc_ndevs +ffffffff83592000 D iwi_cd +ffffffff83593000 D wpi_cd +ffffffff83594000 D iwn_cd +ffffffff83595000 D iwm_cd +ffffffff83596000 D iwx_cd +ffffffff83597000 d .compoundliteral +ffffffff83597040 d .compoundliteral.4 +ffffffff83597080 d .compoundliteral.5 +ffffffff835970b0 d .compoundliteral.6 +ffffffff835970f0 d .compoundliteral.7 +ffffffff83597130 d .compoundliteral.8 +ffffffff83598000 D cmpci_cd +ffffffff83599000 D iha_cd +ffffffff8359a000 D pcscp_cd +ffffffff8359a020 D pcscp_glue +ffffffff8359b000 D bge_cd +ffffffff8359c000 D bnx_firmwares +ffffffff8359c160 D bnx_rv2ps +ffffffff8359c1c0 D bnx_cd +ffffffff8359c1e0 d flash_5709 +ffffffff8359c210 d flash_table +ffffffff8359d000 D vge_cd +ffffffff8359e000 D stge_cd +ffffffff8359f000 D nfe_cd +ffffffff835a0000 D et_cd +ffffffff835a1000 D jme_cd +ffffffff835a2000 D age_cd +ffffffff835a3000 D alc_dma_burst +ffffffff835a3020 D alc_cd +ffffffff835a4000 D ale_cd +ffffffff835a5000 D amdpm_cd +ffffffff835a5020 d amdpm_timecounter +ffffffff835a6000 D bce_cd +ffffffff835a7000 D rtwn_cd +ffffffff835a8000 d ral_rt2560_opns +ffffffff835a8028 d ral_rt2661_opns +ffffffff835a8050 d ral_rt2860_opns +ffffffff835a9000 D piixpm_cd +ffffffff835aa000 D vic_cd +ffffffff835ab000 D vmx_cd +ffffffff835ac000 D vmwpvs_cd +ffffffff835ad000 D lii_cd +ffffffff835ae000 D ichiic_cd +ffffffff835af000 D viapm_cd +ffffffff835af020 d viapm_timecounter +ffffffff835b0000 D amdiic_cd +ffffffff835b1000 D nviic_cd +ffffffff835b2000 D kate_cd +ffffffff835b3000 D km_cd +ffffffff835b4000 D cpu_model_offsets +ffffffff835b4070 D ksmn_cd +ffffffff835b5000 D itherm_cd +ffffffff835b6000 D pchtemp_cd +ffffffff835b7000 D xspd_cd +ffffffff835b8000 D bwfm_pci_buscore_ops +ffffffff835b8030 D bwfm_pci_bus_ops +ffffffff835b8058 D bwfm_pci_msgbuf_ops +ffffffff835b9000 D bnxt_cd +ffffffff835ba000 D mcx_cd +ffffffff835bb000 D iavf_cd +ffffffff835bc000 D rge_cd +ffffffff835bd000 D igc_cd +ffffffff835be000 D ngbe_cd +ffffffff835bf000 D agp_cd +ffffffff835c0000 D intagp_cd +ffffffff835c0020 D agp_i810_methods +ffffffff835c1000 D reservation_ww_class +ffffffff835c2000 d bridge_lock +ffffffff835c2010 d bridge_list +ffffffff835c3000 d drm_connector_enum_list +ffffffff835c31f8 d connector_list_lock +ffffffff835c3208 d connector_list +ffffffff835c4000 d kernel_fb_helper_list +ffffffff835c4010 d kernel_fb_helper_lock +ffffffff835c5000 D drm_global_mutex +ffffffff835c6000 D i2c_bit_algo +ffffffff835c6010 d drm_fence_context_count +ffffffff835c6018 d dma_fence_stub_mtx +ffffffff835c6028 D wait_bit_mtx +ffffffff835c6038 D shrinkers +ffffffff835c7000 d crtc_ww_class +ffffffff835c8000 d panel_lock +ffffffff835c8010 d panel_list +ffffffff835c9000 d ttm_global_mutex +ffffffff835ca000 D drm_sched_policy +ffffffff835cb000 D intel_bbops +ffffffff835cc000 d i915_sys_placement +ffffffff835cc020 d i915_ttm_bo_driver +ffffffff835cd000 d mchdev_lock +ffffffff835ce000 D inteldrm_stdscreen +ffffffff835ce030 D inteldrm_scrlist +ffffffff835ce038 D inteldrm_screenlist +ffffffff835ce048 D inteldrm_accessops +ffffffff835ce0a8 D inteldrm_cd +ffffffff835cf000 d capture_mutex +ffffffff835d0000 d mitigations +ffffffff835d1000 D i915_modparams +ffffffff835d2000 d schedule_lock +ffffffff835d3000 d unbind_fence_ops +ffffffff835d4000 D intel_graphics_stolen_res +ffffffff835d5000 D btc_valid_sclk +ffffffff835d6000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff835d6020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff835d7000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff835d7008 d r600_cs_packet_parse_vline.vline_status +ffffffff835d8000 d r100_asic +ffffffff835d82e0 d r200_asic +ffffffff835d85c0 d r300_asic_pcie +ffffffff835d88a0 d r300_asic +ffffffff835d8b80 d r420_asic +ffffffff835d8e60 d rs400_asic +ffffffff835d9140 d rs600_asic +ffffffff835d9420 d rs690_asic +ffffffff835d9700 d rv515_asic +ffffffff835d99e0 d r520_asic +ffffffff835d9cc0 d r600_asic +ffffffff835d9fa0 d rv6xx_asic +ffffffff835da280 d rs780_asic +ffffffff835da560 d rv770_asic +ffffffff835da840 d evergreen_asic +ffffffff835dab20 d sumo_asic +ffffffff835dae00 d btc_asic +ffffffff835db0e0 d cayman_asic +ffffffff835db3c0 d trinity_asic +ffffffff835db6a0 d si_asic +ffffffff835db980 d ci_asic +ffffffff835dbc60 d kv_asic +ffffffff835dc000 d dce6_funcs +ffffffff835dc018 d dce6_hdmi_funcs +ffffffff835dc088 d dce6_dp_funcs +ffffffff835dc0f8 d dce4_funcs +ffffffff835dc110 d dce4_hdmi_funcs +ffffffff835dc180 d dce4_dp_funcs +ffffffff835dc1f0 d dce32_funcs +ffffffff835dc208 d dce32_hdmi_funcs +ffffffff835dc278 d dce32_dp_funcs +ffffffff835dc2e8 d r600_funcs +ffffffff835dc300 d r600_hdmi_funcs +ffffffff835dd000 D radeon_modeset +ffffffff835dd004 D radeon_dynclks +ffffffff835dd008 D radeon_agpmode +ffffffff835dd00c D radeon_gart_size +ffffffff835dd010 D radeon_tv +ffffffff835dd014 D radeon_audio +ffffffff835dd018 D radeon_pcie_gen2 +ffffffff835dd01c D radeon_msi +ffffffff835dd020 D radeon_lockup_timeout +ffffffff835dd024 D radeon_dpm +ffffffff835dd028 D radeon_aspm +ffffffff835dd02c D radeon_runtime_pm +ffffffff835dd030 D radeon_vm_size +ffffffff835dd034 D radeon_vm_block_size +ffffffff835dd038 D radeon_use_pflipirq +ffffffff835dd03c D radeon_bapm +ffffffff835dd040 D radeon_backlight +ffffffff835dd044 D radeon_auxch +ffffffff835dd048 D radeon_uvd +ffffffff835dd04c D radeon_vce +ffffffff835dd050 D radeon_si_support +ffffffff835dd054 D radeon_cik_support +ffffffff835dd058 D radeondrm_cd +ffffffff835dd078 D radeondrm_stdscreen +ffffffff835dd0a8 D radeondrm_scrlist +ffffffff835dd0b0 D radeondrm_screenlist +ffffffff835dd0c0 D radeondrm_accessops +ffffffff835de000 D radeon_bbops +ffffffff835df000 d radeon_bo_driver +ffffffff835e0000 d verde_pg_init +ffffffff835e1000 d cac_weights_pitcairn +ffffffff835e14d0 d cac_weights_oland +ffffffff835e2000 d aldebaran_mode2_handler +ffffffff835e3000 d amdgpu_vbios_version_attrs +ffffffff835e4000 D amdgpu_asic_name +ffffffff835e5000 D amdgpu_vram_limit +ffffffff835e5004 D amdgpu_gart_size +ffffffff835e5008 D amdgpu_gtt_size +ffffffff835e500c D amdgpu_moverate +ffffffff835e5010 D amdgpu_audio +ffffffff835e5014 D amdgpu_pcie_gen2 +ffffffff835e5018 D amdgpu_msi +ffffffff835e501c D amdgpu_dpm +ffffffff835e5020 D amdgpu_fw_load_type +ffffffff835e5024 D amdgpu_aspm +ffffffff835e5028 D amdgpu_runtime_pm +ffffffff835e502c D amdgpu_ip_block_mask +ffffffff835e5030 D amdgpu_bapm +ffffffff835e5034 D amdgpu_vm_size +ffffffff835e5038 D amdgpu_vm_fragment_size +ffffffff835e503c D amdgpu_vm_block_size +ffffffff835e5040 D amdgpu_vm_update_mode +ffffffff835e5044 D amdgpu_dc +ffffffff835e5048 D amdgpu_sched_jobs +ffffffff835e504c D amdgpu_sched_hw_submission +ffffffff835e5050 D amdgpu_cg_mask +ffffffff835e5058 D amdgpu_pg_mask +ffffffff835e505c D amdgpu_sdma_phase_quantum +ffffffff835e5060 D amdgpu_pp_feature_mask +ffffffff835e5064 D amdgpu_lbpw +ffffffff835e5068 D amdgpu_compute_multipipe +ffffffff835e506c D amdgpu_gpu_recovery +ffffffff835e5070 D amdgpu_smu_pptable_id +ffffffff835e5074 D amdgpu_dc_feature_mask +ffffffff835e5078 D amdgpu_async_gfx_ring +ffffffff835e507c D amdgpu_mcbp +ffffffff835e5080 D amdgpu_discovery +ffffffff835e5084 D amdgpu_noretry +ffffffff835e5088 D amdgpu_force_asic_type +ffffffff835e508c D amdgpu_tmz +ffffffff835e5090 D amdgpu_reset_method +ffffffff835e5094 D amdgpu_num_kcq +ffffffff835e5098 D amdgpu_use_xgmi_p2p +ffffffff835e509c D amdgpu_sg_display +ffffffff835e50a0 D amdgpu_user_partt_mode +ffffffff835e50a8 D mgpu_info +ffffffff835e5558 D amdgpu_ras_enable +ffffffff835e555c D amdgpu_ras_mask +ffffffff835e5560 D amdgpu_bad_page_threshold +ffffffff835e5564 D amdgpu_backlight +ffffffff835e5568 D amdgpu_cd +ffffffff835e5588 D amdgpu_stdscreen +ffffffff835e55b8 D amdgpu_scrlist +ffffffff835e55c0 D amdgpu_screenlist +ffffffff835e55d0 D amdgpu_accessops +ffffffff835e6000 d amdgpu_gtt_mgr_attributes +ffffffff835e7000 D amdgpu_bbops +ffffffff835e8000 D soc15_ih_clientid_name +ffffffff835e9000 D ras_error_string +ffffffff835e9030 D ras_block_string +ffffffff835e90c0 D ras_mca_block_string +ffffffff835ea000 d amdgpu_bo_driver +ffffffff835eb000 d amdgpu_vram_mgr_attributes +ffffffff835ec000 d xgmi_mutex +ffffffff835ec010 D xgmi_ras_hw_ops +ffffffff835ec050 D xgmi_ras +ffffffff835ed000 D aqua_vanjaram_xcp_funcs +ffffffff835ee000 D gfx_v11_0_3_ras +ffffffff835ef000 d gfx_v9_0_ras +ffffffff835f0000 D gfx_v9_4_ras +ffffffff835f1000 D gfx_v9_4_2_ras_ops +ffffffff835f1040 D gfx_v9_4_2_ras +ffffffff835f2000 D gfx_v9_4_3_xcp_funcs +ffffffff835f2020 D gfx_v9_4_3_ras_ops +ffffffff835f2060 D gfx_v9_4_3_ras +ffffffff835f3000 D gfxhub_v1_2_xcp_funcs +ffffffff835f4000 D hdp_v4_0_ras_hw_ops +ffffffff835f4040 D hdp_v4_0_ras +ffffffff835f5000 d jpeg_v2_6_ras +ffffffff835f6000 d jpeg_v4_0_ras +ffffffff835f7000 d jpeg_v4_0_3_ras +ffffffff835f8000 D mca_v3_0_mp0_ras +ffffffff835f8058 D mca_v3_0_mp1_ras +ffffffff835f80b0 D mca_v3_0_mpio_ras +ffffffff835f9000 D mmhub_v1_0_ras_hw_ops +ffffffff835f9040 D mmhub_v1_0_ras +ffffffff835fa000 D mmhub_v1_7_ras_hw_ops +ffffffff835fa040 D mmhub_v1_7_ras +ffffffff835fb000 D mmhub_v1_8_ras +ffffffff835fc000 D mmhub_v9_4_ras +ffffffff835fd000 D nbio_v4_3_ras +ffffffff835fe000 D nbio_v7_4_ras +ffffffff835ff000 D nbio_v7_9_ras +ffffffff83600000 d sriov_sc_video_codecs_encode +ffffffff83600010 d sriov_sc_video_codecs_decode_vcn1 +ffffffff83600020 d sriov_sc_video_codecs_decode_vcn0 +ffffffff83600030 d sriov_sc_video_codecs_encode_array +ffffffff83600060 d sriov_sc_video_codecs_decode_array_vcn1 +ffffffff836000f0 d sriov_sc_video_codecs_decode_array_vcn0 +ffffffff83601000 d sdma_v4_0_ras +ffffffff83602000 D sdma_v4_4_ras +ffffffff83603000 D sdma_v4_4_2_xcp_funcs +ffffffff83603020 d sdma_v4_4_2_ras +ffffffff83604000 d sdma_v6_0_3_ras +ffffffff83605000 d sienna_cichlid_mode2_handler +ffffffff83606000 d smu_v13_0_10_mode2_handler +ffffffff83607000 d sriov_vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff83607010 d sriov_vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff83607020 d sriov_vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff83607030 d sriov_vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff83607040 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff83607070 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff83607100 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff83607140 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff83608000 D umc_v6_1_ras +ffffffff83609000 D umc_v6_7_ras +ffffffff8360a000 D umc_v8_10_ras +ffffffff8360b000 D umc_v8_7_ras +ffffffff8360c000 d vcn_v2_6_ras +ffffffff8360d000 d vcn_v4_0_unified_ring_vm_funcs +ffffffff8360d140 d vcn_v4_0_ras +ffffffff8360e000 d vcn_v4_0_3_ras +ffffffff8360f000 d amdgpu_dm_mode_config_helperfuncs +ffffffff8360f010 d dm_atomic_state_funcs +ffffffff83610000 d construct_integrated_info.result +ffffffff83610004 d bios_parser_get_firmware_info.result +ffffffff83611000 d dce_funcs +ffffffff83612000 d dce110_funcs +ffffffff83613000 d dce112_funcs +ffffffff83614000 d dce120_funcs +ffffffff83615000 d rv1_clk_funcs +ffffffff83615090 d rv1_clk_internal_funcs +ffffffff83616000 d rv2_clk_internal_funcs +ffffffff83617000 d dcn2_funcs +ffffffff83618000 d dcn201_funcs +ffffffff83619000 d dcn21_funcs +ffffffff83619090 d rn_bw_params +ffffffff8361a000 D dcn3_fpga_funcs +ffffffff8361a090 d dcn3_funcs +ffffffff8361b000 d vg_funcs +ffffffff8361b090 d dummy_clocks +ffffffff8361b1c0 d vg_bw_params +ffffffff8361c000 d dcn31_funcs +ffffffff8361c090 d dcn31_bw_params +ffffffff8361d000 d dcn314_funcs +ffffffff8361d090 d dcn314_bw_params +ffffffff8361e000 d dcn315_funcs +ffffffff8361e090 d dcn315_bw_params +ffffffff8361f000 d dcn316_funcs +ffffffff8361f090 d dcn316_bw_params +ffffffff83620000 d dcn32_funcs +ffffffff83621000 d dcn10_dpp_cap +ffffffff83622000 d dcn20_dpp_funcs +ffffffff83622110 d dcn20_dpp_cap +ffffffff83623000 d dcn20_hubp_funcs +ffffffff83624000 d dcn20_opp_funcs +ffffffff83625000 d dcn20_tg_funcs +ffffffff83626000 d dcn201_dpp_funcs +ffffffff83626110 d dcn201_dpp_cap +ffffffff83627000 d dcn201_hubp_funcs +ffffffff83628000 d dcn201_opp_funcs +ffffffff83629000 d dcn201_tg_funcs +ffffffff8362a000 d dcn201_res_pool_funcs +ffffffff8362a0f8 d dcn201_ip +ffffffff8362a2b0 d dcn201_soc +ffffffff8362c000 d dcn21_hubp_funcs +ffffffff8362d000 d dcn30_afmt_funcs +ffffffff8362e000 d dcn30_dpp_funcs +ffffffff8362e110 d dcn30_dpp_cap +ffffffff8362f000 d dcn30_hubp_funcs +ffffffff83630000 d dcn30_tg_funcs +ffffffff83631000 d dcn30_vpg_funcs +ffffffff83632000 d dcn30_tg_funcs +ffffffff83633000 d res_cap_dcn301 +ffffffff83633040 d dcn301_res_pool_funcs +ffffffff83634000 d dcn302_res_pool_funcs +ffffffff83635000 d dcn303_res_pool_funcs +ffffffff83636000 d dcn31_afmt_funcs +ffffffff83637000 d dcn31_apg_funcs +ffffffff83638000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff83639000 d dcn31_hubp_funcs +ffffffff8363a000 d dcn31_tg_funcs +ffffffff8363b000 d dcn31_res_pool_funcs +ffffffff8363c000 d dcn31_vpg_funcs +ffffffff8363d000 d dcn314_tg_funcs +ffffffff8363e000 d dcn314_res_pool_funcs +ffffffff8363f000 d dcn315_res_pool_funcs +ffffffff83640000 d dcn316_res_pool_funcs +ffffffff83641000 d dcn32_dpp_funcs +ffffffff83641110 d dcn32_dpp_cap +ffffffff83642000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff83643000 d dcn32_hubp_funcs +ffffffff83644000 d dcn32_tg_funcs +ffffffff83645000 d dcn32_res_pool_funcs +ffffffff83646000 d dcn321_res_pool_funcs +ffffffff83647000 D dcn1_0_ip +ffffffff836471b8 D dcn1_0_soc +ffffffff83649000 D dcn2_0_ip +ffffffff836491b8 D dcn2_0_nv14_ip +ffffffff83649370 D dcn2_0_soc +ffffffff8364a6a8 D dcn2_0_nv14_soc +ffffffff8364b9e0 D dcn2_0_nv12_soc +ffffffff8364cd18 D dcn2_1_ip +ffffffff8364ced0 D dcn2_1_soc +ffffffff8364e208 D ddr4_wm_table_gs +ffffffff8364e2c8 D lpddr4_wm_table_gs +ffffffff8364e388 D lpddr4_wm_table_with_disabled_ppt +ffffffff8364e448 D ddr4_wm_table_rn +ffffffff8364e508 D ddr4_1R_wm_table_rn +ffffffff8364e5c8 D lpddr4_wm_table_rn +ffffffff8364f000 D dcn3_0_ip +ffffffff8364f1b8 D dcn3_0_soc +ffffffff83651000 D dcn3_01_ip +ffffffff836511b8 D dcn3_01_soc +ffffffff836524f0 D ddr4_wm_table +ffffffff836525b0 D lpddr5_wm_table +ffffffff83653000 D dcn3_02_ip +ffffffff836531b8 D dcn3_02_soc +ffffffff83655000 D dcn3_03_ip +ffffffff836551b8 D dcn3_03_soc +ffffffff83657000 D dcn3_1_ip +ffffffff836571b8 D dcn3_15_ip +ffffffff83657370 D dcn3_16_ip +ffffffff83657528 d dcn3_15_soc +ffffffff83658860 d dcn3_1_soc +ffffffff83659b98 d dcn3_16_soc +ffffffff8365b000 D dcn3_14_ip +ffffffff8365b1b8 d dcn3_14_soc +ffffffff8365d000 D dcn3_2_ip +ffffffff8365d1b8 D dcn3_2_soc +ffffffff8365f000 D dcn3_21_ip +ffffffff8365f1b8 D dcn3_21_soc +ffffffff83661000 d dsc_policy_max_target_bpp_limit +ffffffff83662000 D DIDTEDCConfig_P12 +ffffffff83662070 d smu7_profiling +ffffffff83663000 d cyan_skillfish_table_map +ffffffff83663080 d cyan_skillfish_message_map +ffffffff83664000 d navi10_table_map +ffffffff83664080 d navi10_pwr_src_map +ffffffff83664090 d navi10_workload_map +ffffffff836640e0 d navi10_message_map +ffffffff83664b60 d navi10_clk_map +ffffffff83664c20 d navi10_feature_mask_map +ffffffff83665000 d sienna_cichlid_table_map +ffffffff83665080 d sienna_cichlid_pwr_src_map +ffffffff83665090 d sienna_cichlid_workload_map +ffffffff836650e0 d sienna_cichlid_message_map +ffffffff83665b60 d sienna_cichlid_clk_map +ffffffff83665c20 d sienna_cichlid_feature_mask_map +ffffffff83666000 d vangogh_message_map +ffffffff83666a80 d vangogh_table_map +ffffffff83666b00 d vangogh_workload_map +ffffffff83666b50 d vangogh_feature_mask_map +ffffffff83667000 d renoir_table_map +ffffffff83667080 d renoir_workload_map +ffffffff836670d0 d renoir_message_map +ffffffff83667b50 d renoir_clk_map +ffffffff83668000 d smu_v13_0_0_message_map +ffffffff83668a80 d smu_v13_0_0_feature_mask_map +ffffffff83668e50 d smu_v13_0_0_table_map +ffffffff83668ed0 d smu_v13_0_0_pwr_src_map +ffffffff83668ee0 d smu_v13_0_0_workload_map +ffffffff83668f30 d smu_v13_0_0_clk_map +ffffffff83669000 d smu_v13_0_4_table_map +ffffffff83669080 d smu_v13_0_4_message_map +ffffffff83669b00 d smu_v13_0_4_feature_mask_map +ffffffff8366a000 d smu_v13_0_5_table_map +ffffffff8366a080 d smu_v13_0_5_message_map +ffffffff8366ab00 d smu_v13_0_5_feature_mask_map +ffffffff8366b000 d smu_v13_0_7_message_map +ffffffff8366ba80 d smu_v13_0_7_feature_mask_map +ffffffff8366be50 d smu_v13_0_7_table_map +ffffffff8366bed0 d smu_v13_0_7_pwr_src_map +ffffffff8366bee0 d smu_v13_0_7_workload_map +ffffffff8366bf30 d smu_v13_0_7_clk_map +ffffffff8366c000 d yellow_carp_table_map +ffffffff8366c080 d yellow_carp_message_map +ffffffff8366cb00 d yellow_carp_feature_mask_map +ffffffff8366d000 D pci_conf_lock +ffffffff8366d010 D pci_bus_dma_tag +ffffffff8366d088 D msi_pic +ffffffff8366d120 D msix_pic +ffffffff8366e000 D pchb_cd +ffffffff8366f000 D amas_cd +ffffffff83670000 D cardslot_cd +ffffffff83671000 D cardbus_cd +ffffffff83672000 d csdevs +ffffffff83673000 d ral_rt2560_opns +ffffffff83673028 d ral_rt2661_opns +ffffffff83673050 d ral_rt2860_opns +ffffffff83674000 D pcmcia_cd +ffffffff83675000 D pcmcia_3cxem556_func0 +ffffffff836750b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff83675158 D pcmcia_megahertz_xjem1144_func0 +ffffffff83675210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff836752b0 d pcmcia_3cxem556_func1 +ffffffff83675368 d pcmcia_3cxem556_func1_cfe0 +ffffffff83675408 d pcmcia_megahertz_xjem1144_func1 +ffffffff836754c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff83675560 d pcmcia_sierra_a555_func1 +ffffffff83675618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff836756b8 d pcmcia_sveclancard_func0 +ffffffff83675770 d pcmcia_sveclancard_func0_cfe0 +ffffffff83676000 D ep_pcmcia_prod +ffffffff83677000 D aic_pcmcia_prod +ffffffff83678000 D com_pcmcia_prod +ffffffff83679000 D wdc_pcmcia_pr +ffffffff8367a000 D sm_pcmcia_prod +ffffffff8367b000 D xe_cd +ffffffff8367c000 D pcib_cd +ffffffff8367d000 D amdpcib_cd +ffffffff8367e000 D tcpcib_cd +ffffffff8367f000 D aapic_cd +ffffffff83680000 D hme_cd +ffffffff83681000 D isa_cd +ffffffff83682000 D isadma_cd +ffffffff83683000 D fdc_cd +ffffffff83684000 D fd_types +ffffffff836841f8 D fd_cd +ffffffff83685000 D mpu_cd +ffffffff83686000 D pcppi_cd +ffffffff83687000 D spkr_cd +ffffffff83688000 D wbsio_cd +ffffffff83689000 D schsio_cd +ffffffff8368a000 D it_cd +ffffffff8368b000 D uguru_cd +ffffffff8368c000 D aps_cd +ffffffff8368d000 D isa_bus_dma_tag +ffffffff8368e000 D wsdisplay_cd +ffffffff8368e020 D wsdisplay_cons +ffffffff8368e058 D wsdisplay_defaultscreens +ffffffff8368f000 D wskbd_cd +ffffffff8368f020 D wskbd_default_bell_data +ffffffff8368f030 D wskbd_default_keyrepeat_data +ffffffff8368f040 D wskbd_srcops +ffffffff83690000 d compose_tab +ffffffff83691000 D wsmouse_cd +ffffffff83691020 D wsmouse_srcops +ffffffff83692000 D wsmux_srcops +ffffffff83692030 D wsmux_tree_lock +ffffffff83693000 D vt100_output +ffffffff83694000 D pckbd_cd +ffffffff83695000 D pms_cd +ffffffff83695020 d synaptics_params +ffffffff83695030 d alps_params +ffffffff83696000 D skgpio_cd +ffffffff83697000 D pctr_conf_lock +ffffffff83698000 D ukbd_keymapdata +ffffffff83699000 D usbrev_str +ffffffff83699030 D usb_cd +ffffffff8369a000 d usbd_ratecheck.errinterval +ffffffff8369b000 D uhub_cd +ffffffff8369c000 D uaudio_cd +ffffffff8369d000 D uvideo_ctrls +ffffffff8369d2d8 D uvideo_cd +ffffffff8369e000 D utvfu_norm_params +ffffffff8369e030 D utvfu_cd +ffffffff8369f000 D udl_reg_vals_640x480_60 +ffffffff8369f020 D udl_reg_vals_640x480_67 +ffffffff8369f040 D udl_reg_vals_640x480_72 +ffffffff8369f060 D udl_reg_vals_640x480_75 +ffffffff8369f080 D udl_reg_vals_800x480_61 +ffffffff8369f0a0 D udl_reg_vals_800x600_56 +ffffffff8369f0c0 D udl_reg_vals_800x600_60 +ffffffff8369f0e0 D udl_reg_vals_800x600_72 +ffffffff8369f100 D udl_reg_vals_800x600_74 +ffffffff8369f120 D udl_reg_vals_800x600_75 +ffffffff8369f140 D udl_reg_vals_1024x768_60 +ffffffff8369f160 D udl_reg_vals_1024x768_70 +ffffffff8369f180 D udl_reg_vals_1024x768_75 +ffffffff8369f1a0 D udl_reg_vals_1280x800_60 +ffffffff8369f1c0 D udl_reg_vals_1280x960_60 +ffffffff8369f1e0 D udl_reg_vals_1280x1024_60 +ffffffff8369f200 D udl_reg_vals_1280x1024_75 +ffffffff8369f220 D udl_reg_vals_1366x768_60 +ffffffff8369f240 D udl_reg_vals_1440x900_60 +ffffffff8369f260 D udl_reg_vals_1440x900_59 +ffffffff8369f280 D udl_reg_vals_1440x900_75 +ffffffff8369f2a0 D udl_reg_vals_1680x1050_60 +ffffffff8369f2c0 D udl_reg_vals_1600x1200_60 +ffffffff8369f2e0 D udl_reg_vals_1920x1080_60 +ffffffff8369f300 D udl_null_key_1 +ffffffff8369f310 D udl_decomp_table +ffffffff836a0510 D udl_cd +ffffffff836a0530 D udl_stdscreen +ffffffff836a0560 D udl_scrlist +ffffffff836a0568 D udl_screenlist +ffffffff836a0578 D udl_accessops +ffffffff836a1000 D umidi_cd +ffffffff836a2000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff836a2020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff836a2040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff836a2060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff836a2080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff836a20a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff836a20c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff836a20e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff836a2100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff836a2120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff836a2140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff836a2160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff836a2180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff836a21a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff836a21c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff836a21e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff836a2200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff836a2220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff836a2240 D umidi_quirklist +ffffffff836a24a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff836a24c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff836a24d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff836a24f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff836a2500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff836a2520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff836a2530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff836a2550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff836a2560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff836a2580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff836a2590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff836a25b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff836a25c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff836a25e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff836a25f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff836a2610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff836a2620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff836a2640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff836a2650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff836a2670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff836a2680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff836a26a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff836a26b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff836a26d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff836a26e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff836a2700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff836a2710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff836a2730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff836a2740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff836a2760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff836a2770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff836a2790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff836a27a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff836a27c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff836a27d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff836a27f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff836a3000 D ucom_cd +ffffffff836a3020 D sysctl_ucomlock +ffffffff836a4000 D ugen_cd +ffffffff836a5000 D uhidev_cd +ffffffff836a5020 d uhidev_use_rdesc.reportbuf +ffffffff836a6000 D uhid_cd +ffffffff836a7000 D fido_cd +ffffffff836a8000 D ujoy_cd +ffffffff836a9000 D ukbd_cd +ffffffff836aa000 D ums_cd +ffffffff836aa020 d ums_fix_elecom_descriptor.match +ffffffff836ab000 D umt_cd +ffffffff836ac000 D def_scale +ffffffff836ac020 D uts_cd +ffffffff836ad000 D ubcmtp_cd +ffffffff836ad020 d ubcmtp_wsmousecfg +ffffffff836ae000 D ucycom_cd +ffffffff836af000 D uslhcom_cd +ffffffff836b0000 D ulpt_fwdevs +ffffffff836b0060 D ulpt_cd +ffffffff836b0080 D ulptusein +ffffffff836b1000 D umass_cd +ffffffff836b1020 d umass_bbb_transfer.dCBWtag +ffffffff836b2000 D uthum_cd +ffffffff836b3000 D ugold_cd +ffffffff836b3020 d cmd_init +ffffffff836b3028 d cmd_type +ffffffff836b3030 d cmd_data +ffffffff836b4000 D utrh_cd +ffffffff836b5000 D uoakrh_cd +ffffffff836b6000 D uoaklux_cd +ffffffff836b7000 D uoakv_cd +ffffffff836b8000 D uonerng_cd +ffffffff836b9000 D urng_cd +ffffffff836ba000 D udcf_cd +ffffffff836bb000 D umbg_cd +ffffffff836bc000 D uvisor_cd +ffffffff836bd000 D udsbr_cd +ffffffff836be000 D utwitch_cd +ffffffff836bf000 D aue_cd +ffffffff836c0000 D axe_cd +ffffffff836c1000 D axen_cd +ffffffff836c2000 D smsc_cd +ffffffff836c3000 D cue_devs +ffffffff836c3010 D cue_cd +ffffffff836c4000 D kue_cd +ffffffff836c5000 D cdce_cd +ffffffff836c6000 D urndis_cd +ffffffff836c7000 D mos_cd +ffffffff836c8000 D mue_cd +ffffffff836c9000 D udav_cd +ffffffff836ca000 D upl_devs +ffffffff836ca008 D upl_cd +ffffffff836cb000 D ugl_devs +ffffffff836cb008 D ugl_cd +ffffffff836cc000 D url_cd +ffffffff836cd000 D ure_cd +ffffffff836ce000 D uaq_cd +ffffffff836cf000 D umodem_cd +ffffffff836d0000 D uftdi_cd +ffffffff836d1000 D uplcom_cd +ffffffff836d2000 D umct_cd +ffffffff836d3000 D uvscom_cd +ffffffff836d4000 D ubsa_cd +ffffffff836d5000 D ukspan_cd +ffffffff836d6000 D uslcom_cd +ffffffff836d7000 D uark_cd +ffffffff836d8000 D moscom_cd +ffffffff836d9000 D umcs_cd +ffffffff836da000 D uscom_cd +ffffffff836db000 D ucrcom_cd +ffffffff836dc000 D uxrcom_cd +ffffffff836dd000 D uipaq_cd +ffffffff836de000 D umsm_cd +ffffffff836df000 D uchcom_cd +ffffffff836e0000 D uticom_cd +ffffffff836e1000 D wi_func_usb +ffffffff836e1060 D wi_usb_cd +ffffffff836e2000 D atu_cd +ffffffff836e2020 D atu_devs +ffffffff836e2270 D atu_radfirm +ffffffff836e3000 D ural_cd +ffffffff836e4000 D rum_cd +ffffffff836e5000 D run_cd +ffffffff836e5020 D rt3070_freqs +ffffffff836e6000 D mtw_cd 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