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nbio_v7_9_enable_doorbell_aperture -ffffffff8207e9d0 t nbio_v7_9_enable_doorbell_selfring_aperture -ffffffff8207eb50 t nbio_v7_9_ih_doorbell_range -ffffffff8207ec70 t nbio_v7_9_enable_doorbell_interrupt -ffffffff8207ed90 t nbio_v7_9_update_medium_grain_clock_gating -ffffffff8207edc0 t nbio_v7_9_update_medium_grain_light_sleep -ffffffff8207edf0 t nbio_v7_9_get_clockgating_state -ffffffff8207ee20 t nbio_v7_9_ih_control -ffffffff8207ef90 t nbio_v7_9_init_registers -ffffffff8207f320 t nbio_v7_9_remap_hdp_registers -ffffffff8207f440 t nbio_v7_9_get_compute_partition_mode -ffffffff8207f4e0 t nbio_v7_9_get_memory_partition_mode -ffffffff8207f5e0 t nbio_v7_9_get_pcie_replay_count -ffffffff8207f640 t nbio_v7_9_get_pcie_usage -ffffffff8207f800 t nbio_v7_9_query_ras_error_count -ffffffff8207f830 t nbio_v7_9_handle_ras_controller_intr_no_bifring -ffffffff8207f980 t nbio_v7_9_handle_ras_err_event_athub_intr_no_bifring -ffffffff8207fac0 t nbio_v7_9_init_ras_controller_interrupt -ffffffff8207fb00 t nbio_v7_9_init_ras_err_event_athub_interrupt -ffffffff8207fb40 t nbio_v7_9_set_ras_controller_irq_state -ffffffff8207fb70 t nbio_v7_9_process_ras_controller_irq -ffffffff8207fba0 t nbio_v7_9_set_ras_err_event_athub_irq_state -ffffffff8207fbd0 t nbio_v7_9_process_err_event_athub_irq -ffffffff82080000 T nv_grbm_select -ffffffff820800a0 T nv_set_virt_ops -ffffffff820800e0 t nv_common_early_init -ffffffff820804e0 t nv_common_late_init -ffffffff820805a0 t nv_common_sw_init -ffffffff820805f0 t nv_common_sw_fini -ffffffff82080620 t nv_common_hw_init -ffffffff82080750 t nv_common_hw_fini -ffffffff820807c0 t nv_common_suspend -ffffffff82080830 t nv_common_resume -ffffffff82080870 t nv_common_is_idle -ffffffff820808a0 t nv_common_wait_for_idle -ffffffff820808d0 t nv_common_soft_reset -ffffffff82080900 t nv_common_set_clockgating_state -ffffffff820809f0 t nv_common_set_powergating_state -ffffffff82080a20 t nv_common_get_clockgating_state -ffffffff82080aa0 t nv_didt_rreg -ffffffff82080b60 t nv_didt_wreg -ffffffff82080c00 t nv_read_disabled_bios -ffffffff82080c30 t nv_read_register -ffffffff82080d30 t nv_asic_reset -ffffffff82080ec0 t nv_asic_reset_method -ffffffff82080fc0 t nv_get_xclk -ffffffff82080ff0 t nv_set_uvd_clocks -ffffffff82081020 t nv_set_vce_clocks -ffffffff82081050 t nv_get_config_memsize -ffffffff82081070 t nv_need_full_reset -ffffffff820810a0 t nv_init_doorbell_index -ffffffff820811d0 t nv_need_reset_on_init -ffffffff82081280 t nv_pre_asic_init -ffffffff820812b0 t nv_update_umd_stable_pstate -ffffffff82081380 t nv_query_video_codecs -ffffffff82082000 T psp_v10_0_set_psp_funcs -ffffffff82082030 t psp_v10_0_init_microcode -ffffffff82082120 t psp_v10_0_ring_create -ffffffff82082510 t psp_v10_0_ring_stop -ffffffff820827c0 t psp_v10_0_ring_destroy -ffffffff82082850 t psp_v10_0_mode1_reset -ffffffff820828a0 t psp_v10_0_ring_get_wptr -ffffffff82082900 t psp_v10_0_ring_set_wptr -ffffffff82083000 T psp_v11_0_set_psp_funcs -ffffffff82083030 t psp_v11_0_init_microcode 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psp_v11_0_8_ring_set_wptr -ffffffff82087000 T psp_v12_0_set_psp_funcs -ffffffff82087030 t psp_v12_0_init_microcode -ffffffff82087100 t psp_v12_0_bootloader_load_sysdrv -ffffffff82087520 t psp_v12_0_bootloader_load_sos -ffffffff82087990 t psp_v12_0_ring_create -ffffffff82088670 t psp_v12_0_ring_stop -ffffffff82088950 t psp_v12_0_ring_destroy -ffffffff820889e0 t psp_v12_0_mode1_reset -ffffffff82088b10 t psp_v12_0_ring_get_wptr -ffffffff82088b80 t psp_v12_0_ring_set_wptr -ffffffff82089000 T psp_v13_0_set_psp_funcs -ffffffff82089030 t psp_v13_0_init_microcode -ffffffff82089160 t psp_v13_0_wait_for_bootloader_steady_state -ffffffff82089290 t psp_v13_0_bootloader_load_kdb -ffffffff820892b0 t psp_v13_0_bootloader_load_spl -ffffffff820892d0 t psp_v13_0_bootloader_load_sysdrv -ffffffff820892f0 t psp_v13_0_bootloader_load_soc_drv -ffffffff82089310 t psp_v13_0_bootloader_load_intf_drv -ffffffff82089330 t psp_v13_0_bootloader_load_dbg_drv -ffffffff82089350 t psp_v13_0_bootloader_load_ras_drv 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psp_v13_0_4_bootloader_load_soc_drv -ffffffff8208c170 t psp_v13_0_4_bootloader_load_intf_drv -ffffffff8208c190 t psp_v13_0_4_bootloader_load_dbg_drv -ffffffff8208c1b0 t psp_v13_0_4_bootloader_load_sos -ffffffff8208c620 t psp_v13_0_4_ring_create -ffffffff8208ceb0 t psp_v13_0_4_ring_stop -ffffffff8208d3c0 t psp_v13_0_4_ring_destroy -ffffffff8208d450 t psp_v13_0_4_ring_get_wptr -ffffffff8208d4c0 t psp_v13_0_4_ring_set_wptr -ffffffff8208d5e0 t psp_v13_0_4_bootloader_load_component -ffffffff8208d7f0 t psp_v13_0_4_wait_for_bootloader -ffffffff8208e000 T psp_v3_1_set_psp_funcs -ffffffff8208e030 t psp_v3_1_init_microcode -ffffffff8208e0f0 t psp_v3_1_bootloader_load_sysdrv -ffffffff8208e510 t psp_v3_1_bootloader_load_sos -ffffffff8208e980 t psp_v3_1_ring_create -ffffffff8208f840 t psp_v3_1_ring_stop -ffffffff8208fb20 t psp_v3_1_ring_destroy -ffffffff8208fbb0 t psp_v3_1_smu_reload_quirk -ffffffff8208fc00 t psp_v3_1_mode1_reset -ffffffff8208fd30 t psp_v3_1_ring_get_wptr -ffffffff8208fd80 t psp_v3_1_ring_set_wptr -ffffffff82090000 t sdma_v2_4_early_init -ffffffff820900f0 t sdma_v2_4_sw_init -ffffffff82090520 t sdma_v2_4_sw_fini -ffffffff820905f0 t sdma_v2_4_hw_init -ffffffff82090aa0 t sdma_v2_4_hw_fini -ffffffff82090af0 t sdma_v2_4_suspend -ffffffff82090b40 t sdma_v2_4_resume -ffffffff82090b50 t sdma_v2_4_is_idle -ffffffff82090ba0 t sdma_v2_4_wait_for_idle -ffffffff82090c50 t sdma_v2_4_soft_reset -ffffffff82090e00 t sdma_v2_4_set_clockgating_state -ffffffff82090e30 t sdma_v2_4_set_powergating_state -ffffffff82090e60 t sdma_v2_4_ring_get_rptr -ffffffff82090ea0 t sdma_v2_4_ring_get_wptr -ffffffff82090f00 t sdma_v2_4_ring_set_wptr -ffffffff82090f40 t sdma_v2_4_ring_emit_ib -ffffffff82091220 t sdma_v2_4_ring_emit_fence -ffffffff82091670 t sdma_v2_4_ring_emit_pipeline_sync -ffffffff82091920 t sdma_v2_4_ring_emit_vm_flush -ffffffff82091bd0 t sdma_v2_4_ring_emit_hdp_flush -ffffffff82091e80 t sdma_v2_4_ring_test_ring -ffffffff820921b0 t sdma_v2_4_ring_test_ib -ffffffff820923c0 t sdma_v2_4_ring_insert_nop -ffffffff82092500 t sdma_v2_4_ring_pad_ib -ffffffff82092630 t sdma_v2_4_ring_emit_wreg -ffffffff82092790 t sdma_v2_4_emit_copy_buffer -ffffffff82092850 t sdma_v2_4_emit_fill_buffer -ffffffff820928e0 t sdma_v2_4_vm_copy_pte -ffffffff820929a0 t sdma_v2_4_vm_write_pte -ffffffff82092a70 t sdma_v2_4_vm_set_pte_pde -ffffffff82092b70 t sdma_v2_4_set_trap_irq_state -ffffffff82092c60 t sdma_v2_4_process_trap_irq -ffffffff82092d00 t sdma_v2_4_process_illegal_inst_irq -ffffffff82092d80 t sdma_v2_4_enable -ffffffff82093000 t sdma_v3_0_early_init -ffffffff82093100 t sdma_v3_0_sw_init -ffffffff82093530 t sdma_v3_0_sw_fini -ffffffff82093600 t sdma_v3_0_hw_init -ffffffff82093770 t sdma_v3_0_hw_fini -ffffffff820937d0 t sdma_v3_0_suspend -ffffffff82093830 t sdma_v3_0_resume -ffffffff82093840 t sdma_v3_0_is_idle -ffffffff82093890 t sdma_v3_0_wait_for_idle -ffffffff82093940 t sdma_v3_0_check_soft_reset -ffffffff820939a0 t sdma_v3_0_pre_soft_reset -ffffffff82093a00 t sdma_v3_0_soft_reset -ffffffff82093b00 t sdma_v3_0_post_soft_reset -ffffffff82093b50 t sdma_v3_0_set_clockgating_state -ffffffff82093e00 t sdma_v3_0_set_powergating_state -ffffffff82093e30 t sdma_v3_0_get_clockgating_state -ffffffff82093ed0 t sdma_v3_0_ring_get_rptr -ffffffff82093f10 t sdma_v3_0_ring_get_wptr -ffffffff82093f90 t sdma_v3_0_ring_set_wptr -ffffffff82094040 t sdma_v3_0_ring_emit_ib -ffffffff82094320 t sdma_v3_0_ring_emit_fence -ffffffff82094770 t sdma_v3_0_ring_emit_pipeline_sync -ffffffff82094a20 t sdma_v3_0_ring_emit_vm_flush -ffffffff82094cd0 t sdma_v3_0_ring_emit_hdp_flush -ffffffff82094f80 t sdma_v3_0_ring_test_ring -ffffffff820952b0 t sdma_v3_0_ring_test_ib -ffffffff820954c0 t sdma_v3_0_ring_insert_nop -ffffffff82095600 t sdma_v3_0_ring_pad_ib -ffffffff82095730 t sdma_v3_0_ring_emit_wreg -ffffffff82095890 t sdma_v3_0_emit_copy_buffer -ffffffff82095950 t sdma_v3_0_emit_fill_buffer -ffffffff820959e0 t sdma_v3_0_vm_copy_pte -ffffffff82095aa0 t sdma_v3_0_vm_write_pte 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sdma_v4_0_reset_ras_error_count -ffffffff8209bc20 t sdma_v4_0_ring_get_rptr -ffffffff8209bc80 t sdma_v4_0_ring_get_wptr -ffffffff8209be90 t sdma_v4_0_ring_set_wptr -ffffffff8209c140 t sdma_v4_0_ring_emit_ib -ffffffff8209c420 t sdma_v4_0_ring_emit_fence -ffffffff8209c890 t sdma_v4_0_ring_emit_pipeline_sync -ffffffff8209c8f0 t sdma_v4_0_ring_emit_vm_flush -ffffffff8209c910 t sdma_v4_0_ring_emit_hdp_flush -ffffffff8209c9d0 t sdma_v4_0_ring_test_ring -ffffffff8209cd00 t sdma_v4_0_ring_test_ib -ffffffff8209cf10 t sdma_v4_0_ring_insert_nop -ffffffff8209d050 t sdma_v4_0_ring_pad_ib -ffffffff8209d180 t sdma_v4_0_ring_emit_wreg -ffffffff8209d2e0 t sdma_v4_0_ring_emit_reg_wait -ffffffff8209d330 t sdma_v4_0_wait_reg_mem -ffffffff8209d680 t sdma_v4_0_page_ring_get_wptr -ffffffff8209d840 t sdma_v4_0_page_ring_set_wptr -ffffffff8209da10 t sdma_v4_0_emit_copy_buffer -ffffffff8209dad0 t sdma_v4_0_emit_fill_buffer -ffffffff8209db60 t sdma_v4_0_vm_copy_pte -ffffffff8209dc20 t sdma_v4_0_vm_write_pte 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sdma_v4_4_2_ring_insert_nop -ffffffff820a38b0 t sdma_v4_4_2_ring_pad_ib -ffffffff820a39e0 t sdma_v4_4_2_ring_emit_wreg -ffffffff820a3b40 t sdma_v4_4_2_ring_emit_reg_wait -ffffffff820a3b90 t sdma_v4_4_2_wait_reg_mem -ffffffff820a3ee0 t sdma_v4_4_2_page_ring_get_wptr -ffffffff820a4000 t sdma_v4_4_2_page_ring_set_wptr -ffffffff820a4130 t sdma_v4_4_2_emit_copy_buffer -ffffffff820a41f0 t sdma_v4_4_2_emit_fill_buffer -ffffffff820a4280 t sdma_v4_4_2_vm_copy_pte -ffffffff820a4340 t sdma_v4_4_2_vm_write_pte -ffffffff820a4410 t sdma_v4_4_2_vm_set_pte_pde -ffffffff820a4510 t sdma_v4_4_2_set_trap_irq_state -ffffffff820a4610 t sdma_v4_4_2_process_trap_irq -ffffffff820a4740 t sdma_v4_4_2_process_illegal_inst_irq -ffffffff820a47e0 t sdma_v4_4_2_set_ecc_irq_state -ffffffff820a48f0 t sdma_v4_4_2_process_vm_hole_irq -ffffffff820a49e0 t sdma_v4_4_2_process_doorbell_invalid_irq -ffffffff820a4ad0 t sdma_v4_4_2_process_pool_timeout_irq -ffffffff820a4bc0 t sdma_v4_4_2_process_srbm_write_irq -ffffffff820a4cb0 t sdma_v4_4_2_query_ras_error_count -ffffffff820a4e30 t sdma_v4_4_2_reset_ras_error_count -ffffffff820a4fa0 t sdma_v4_4_2_inst_init_golden_registers -ffffffff820a5170 t sdma_v4_4_2_inst_start -ffffffff820a69a0 t sdma_v4_4_2_inst_ctx_switch_enable -ffffffff820a6cf0 t sdma_v4_4_2_inst_enable -ffffffff820a8000 t sdma_v5_0_early_init -ffffffff820a8130 t sdma_v5_0_sw_init -ffffffff820a8350 t sdma_v5_0_sw_fini -ffffffff820a83f0 t sdma_v5_0_hw_init -ffffffff820a98c0 t sdma_v5_0_hw_fini -ffffffff820a9930 t sdma_v5_0_suspend -ffffffff820a99a0 t sdma_v5_0_resume -ffffffff820a99b0 t sdma_v5_0_is_idle -ffffffff820a9a50 t sdma_v5_0_wait_for_idle -ffffffff820a9b30 t sdma_v5_0_soft_reset -ffffffff820a9b60 t sdma_v5_0_set_clockgating_state -ffffffff820a9d80 t sdma_v5_0_set_powergating_state -ffffffff820a9db0 t sdma_v5_0_get_clockgating_state -ffffffff820a9e60 t sdma_v5_0_ring_get_rptr -ffffffff820a9ec0 t sdma_v5_0_ring_get_wptr -ffffffff820aa080 t sdma_v5_0_ring_set_wptr -ffffffff820aa430 t sdma_v5_0_ring_emit_ib -ffffffff820aa730 t sdma_v5_0_ring_emit_fence -ffffffff820aabe0 t sdma_v5_0_ring_emit_pipeline_sync -ffffffff820aae90 t sdma_v5_0_ring_emit_vm_flush -ffffffff820aaeb0 t sdma_v5_0_ring_emit_hdp_flush -ffffffff820ab180 t sdma_v5_0_ring_test_ring -ffffffff820ab5b0 t sdma_v5_0_ring_test_ib -ffffffff820ab940 t sdma_v5_0_ring_insert_nop -ffffffff820aba80 t sdma_v5_0_ring_pad_ib -ffffffff820abbb0 t sdma_v5_0_ring_init_cond_exec -ffffffff820abe00 t sdma_v5_0_ring_patch_cond_exec -ffffffff820abec0 t sdma_v5_0_ring_emit_wreg -ffffffff820ac020 t sdma_v5_0_ring_emit_reg_wait -ffffffff820ac2c0 t sdma_v5_0_ring_emit_reg_write_reg_wait -ffffffff820ac350 t sdma_v5_0_ring_preempt_ib -ffffffff820ac4e0 t sdma_v5_0_ring_emit_mem_sync -ffffffff820ac710 t sdma_v5_0_emit_copy_buffer -ffffffff820ac7d0 t sdma_v5_0_emit_fill_buffer -ffffffff820ac860 t sdma_v5_0_vm_copy_pte -ffffffff820ac920 t sdma_v5_0_vm_write_pte -ffffffff820ac9f0 t sdma_v5_0_vm_set_pte_pde -ffffffff820acaf0 t sdma_v5_0_set_trap_irq_state -ffffffff820acb90 t sdma_v5_0_process_trap_irq -ffffffff820accd0 t sdma_v5_0_process_illegal_inst_irq -ffffffff820acd00 t sdma_v5_0_mqd_init -ffffffff820acdf0 t sdma_v5_0_ctx_switch_enable -ffffffff820ad170 t sdma_v5_0_enable -ffffffff820ae000 t sdma_v5_2_early_init -ffffffff820ae130 t sdma_v5_2_sw_init -ffffffff820ae3f0 t sdma_v5_2_sw_fini -ffffffff820ae490 t sdma_v5_2_hw_init -ffffffff820b02c0 t sdma_v5_2_hw_fini -ffffffff820b0330 t sdma_v5_2_suspend -ffffffff820b03a0 t sdma_v5_2_resume -ffffffff820b03b0 t sdma_v5_2_is_idle -ffffffff820b0470 t sdma_v5_2_wait_for_idle -ffffffff820b05a0 t sdma_v5_2_soft_reset -ffffffff820b08c0 t sdma_v5_2_set_clockgating_state -ffffffff820b0c60 t sdma_v5_2_set_powergating_state -ffffffff820b0c90 t sdma_v5_2_get_clockgating_state -ffffffff820b0d40 t sdma_v5_2_ring_get_rptr -ffffffff820b0da0 t sdma_v5_2_ring_get_wptr -ffffffff820b0ef0 t sdma_v5_2_ring_set_wptr -ffffffff820b10d0 t sdma_v5_2_ring_emit_ib -ffffffff820b13d0 t sdma_v5_2_ring_emit_fence -ffffffff820b1880 t sdma_v5_2_ring_emit_pipeline_sync -ffffffff820b1b30 t sdma_v5_2_ring_emit_vm_flush -ffffffff820b1b50 t sdma_v5_2_ring_emit_hdp_flush -ffffffff820b1e50 t sdma_v5_2_ring_test_ring -ffffffff820b2280 t sdma_v5_2_ring_test_ib -ffffffff820b2610 t sdma_v5_2_ring_insert_nop -ffffffff820b2750 t sdma_v5_2_ring_pad_ib -ffffffff820b2880 t sdma_v5_2_ring_init_cond_exec -ffffffff820b2ad0 t sdma_v5_2_ring_patch_cond_exec -ffffffff820b2b90 t sdma_v5_2_ring_begin_use -ffffffff820b2bb0 t sdma_v5_2_ring_end_use -ffffffff820b2bd0 t sdma_v5_2_ring_emit_wreg -ffffffff820b2d30 t sdma_v5_2_ring_emit_reg_wait -ffffffff820b2fd0 t sdma_v5_2_ring_emit_reg_write_reg_wait -ffffffff820b3060 t sdma_v5_2_ring_preempt_ib -ffffffff820b3220 t sdma_v5_2_ring_emit_mem_sync -ffffffff820b3450 t sdma_v5_2_emit_copy_buffer -ffffffff820b3510 t sdma_v5_2_emit_fill_buffer -ffffffff820b35a0 t sdma_v5_2_vm_copy_pte -ffffffff820b3660 t sdma_v5_2_vm_write_pte -ffffffff820b3730 t sdma_v5_2_vm_set_pte_pde -ffffffff820b3830 t sdma_v5_2_set_trap_irq_state -ffffffff820b38f0 t sdma_v5_2_process_trap_irq -ffffffff820b3a60 t sdma_v5_2_process_illegal_inst_irq -ffffffff820b3a90 t sdma_v5_2_mqd_init -ffffffff820b3b80 t sdma_v5_2_ctx_switch_enable -ffffffff820b3fd0 t sdma_v5_2_enable -ffffffff820b5000 t sdma_v6_0_early_init -ffffffff820b5120 t sdma_v6_0_sw_init -ffffffff820b5330 t sdma_v6_0_sw_fini -ffffffff820b53d0 t sdma_v6_0_hw_init -ffffffff820b53e0 t sdma_v6_0_hw_fini -ffffffff820b54d0 t sdma_v6_0_suspend -ffffffff820b5510 t sdma_v6_0_resume -ffffffff820b5520 t sdma_v6_0_is_idle -ffffffff820b55c0 t sdma_v6_0_wait_for_idle -ffffffff820b56a0 t sdma_v6_0_check_soft_reset -ffffffff820b5770 t sdma_v6_0_soft_reset -ffffffff820b5cc0 t sdma_v6_0_set_clockgating_state -ffffffff820b5cf0 t sdma_v6_0_set_powergating_state -ffffffff820b5d20 t sdma_v6_0_get_clockgating_state -ffffffff820b5d50 t sdma_v6_0_ring_get_rptr -ffffffff820b5db0 t sdma_v6_0_ring_get_wptr -ffffffff820b5e30 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sdma_v6_0_vm_set_pte_pde -ffffffff820b8b20 t sdma_v6_0_set_trap_irq_state -ffffffff820b8bc0 t sdma_v6_0_process_trap_irq -ffffffff820b8d20 t sdma_v6_0_process_illegal_inst_irq -ffffffff820b8d50 t sdma_v6_0_mqd_init -ffffffff820b8e80 t sdma_v6_0_start -ffffffff820b91e0 t sdma_v6_0_enable -ffffffff820b9380 t sdma_v6_0_gfx_resume -ffffffff820ba5c0 t sdma_v6_0_gfx_stop -ffffffff820bb000 T sienna_cichlid_reset_init -ffffffff820bb0e0 t sienna_cichlid_async_reset -ffffffff820bb140 t sienna_cichlid_get_reset_handler -ffffffff820bb1d0 T sienna_cichlid_reset_fini -ffffffff820bb230 t sienna_cichlid_mode2_prepare_hwcontext -ffffffff820bb3a0 t sienna_cichlid_mode2_perform_reset -ffffffff820bb430 t sienna_cichlid_mode2_restore_hwcontext -ffffffff820bb7a0 t sienna_cichlid_mode2_reset -ffffffff820bc000 T smu_v11_0_i2c_control_init -ffffffff820bc0e0 T smu_v11_0_i2c_control_fini -ffffffff820bc120 t smu_v11_0_i2c_xfer -ffffffff820bd490 t smu_v11_0_i2c_func -ffffffff820bd4c0 t smu_v11_0_i2c_enable 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smuio_v13_0_get_rom_index_offset -ffffffff820c1040 t smuio_v13_0_get_rom_data_offset -ffffffff820c1080 t smuio_v13_0_update_rom_clock_gating -ffffffff820c11e0 t smuio_v13_0_get_clock_gating_state -ffffffff820c1290 t smuio_v13_0_get_die_id -ffffffff820c1320 t smuio_v13_0_get_socket_id -ffffffff820c13c0 t smuio_v13_0_is_host_gpu_xgmi_supported -ffffffff820c2000 t smuio_v13_0_3_get_die_id -ffffffff820c20a0 t smuio_v13_0_3_get_socket_id -ffffffff820c2140 t smuio_v13_0_3_get_pkg_type -ffffffff820c3000 t smuio_v13_0_6_get_rom_index_offset -ffffffff820c3040 t smuio_v13_0_6_get_rom_data_offset -ffffffff820c4000 t smuio_v9_0_get_rom_index_offset -ffffffff820c4040 t smuio_v9_0_get_rom_data_offset -ffffffff820c4080 t smuio_v9_0_update_rom_clock_gating -ffffffff820c41e0 t smuio_v9_0_get_clock_gating_state -ffffffff820c5000 T soc15_grbm_select -ffffffff820c5090 T soc15_program_register_sequence -ffffffff820c52b0 T soc15_set_virt_ops -ffffffff820c5320 t soc15_common_early_init -ffffffff820c5750 t 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umc_v8_10_convert_error_address -ffffffff820ce5e0 t umc_v8_10_err_cnt_init_per_channel -ffffffff820ce6b0 t umc_v8_10_ecc_info_query_ecc_error_count -ffffffff820ce7a0 t umc_v8_10_ecc_info_query_error_address -ffffffff820cf000 t umc_v8_7_query_ras_error_count -ffffffff820cf370 t umc_v8_7_query_ras_error_address -ffffffff820cf540 t umc_v8_7_err_cnt_init -ffffffff820cf6d0 t umc_v8_7_ecc_info_query_ras_error_count -ffffffff820cf800 t umc_v8_7_ecc_info_query_ras_error_address -ffffffff820d0000 t uvd_v5_0_early_init -ffffffff820d0050 t uvd_v5_0_sw_init -ffffffff820d0170 t uvd_v5_0_sw_fini -ffffffff820d01d0 t uvd_v5_0_hw_init -ffffffff820d0780 t uvd_v5_0_hw_fini -ffffffff820d0810 t uvd_v5_0_suspend -ffffffff820d0950 t uvd_v5_0_resume -ffffffff820d09b0 t uvd_v5_0_is_idle -ffffffff820d0a00 t uvd_v5_0_wait_for_idle -ffffffff820d0a90 t uvd_v5_0_soft_reset -ffffffff820d0b80 t uvd_v5_0_set_clockgating_state -ffffffff820d0d80 t uvd_v5_0_set_powergating_state -ffffffff820d0dd0 t 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vcn_v2_0_sw_init -ffffffff820f65c0 t vcn_v2_0_sw_fini -ffffffff820f6670 t vcn_v2_0_hw_init -ffffffff820f70b0 t vcn_v2_0_hw_fini -ffffffff820f71d0 t vcn_v2_0_suspend -ffffffff820f7200 t vcn_v2_0_resume -ffffffff820f7260 t vcn_v2_0_is_idle -ffffffff820f7300 t vcn_v2_0_wait_for_idle -ffffffff820f7340 t vcn_v2_0_set_clockgating_state -ffffffff820f73f0 t vcn_v2_0_set_powergating_state -ffffffff820f7ab0 t vcn_v2_0_dec_ring_get_rptr -ffffffff820f7b40 t vcn_v2_0_dec_ring_get_wptr -ffffffff820f7bf0 t vcn_v2_0_dec_ring_set_wptr -ffffffff820f7d30 t vcn_v2_0_enc_ring_get_rptr -ffffffff820f7e10 t vcn_v2_0_enc_ring_get_wptr -ffffffff820f7f10 t vcn_v2_0_enc_ring_set_wptr -ffffffff820f8000 t vcn_v2_0_set_interrupt_state -ffffffff820f8030 t vcn_v2_0_process_interrupt -ffffffff820f80f0 t vcn_v2_0_pause_dpg_mode -ffffffff820f89c0 t vcn_v2_0_enable_clock_gating -ffffffff820f8c80 t vcn_v2_0_disable_clock_gating -ffffffff820f9110 t vcn_v2_0_start -ffffffff820fe0e0 t vcn_v2_0_enable_static_power_gating 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inteldrm_burner_cb +ffffffff81d11ea0 T inteldrm_backlight_update_status +ffffffff81d11f00 T inteldrm_backlight_get_brightness +ffffffff81d11f60 T inteldrm_match +ffffffff81d12000 T inteldrm_attach +ffffffff81d12510 T inteldrm_detach +ffffffff81d12540 T inteldrm_activate +ffffffff81d12970 T inteldrm_intr +ffffffff81d129b0 T inteldrm_attachhook +ffffffff81d12c50 T inteldrm_forcedetach +ffffffff81d12c90 T inteldrm_native_backlight +ffffffff81d12e00 T inteldrm_firmware_backlight +ffffffff81d12fb0 t i915_pcode_init +ffffffff81d13080 t i915_driver_open +ffffffff81d130a0 t i915_driver_postclose +ffffffff81d13110 t i915_driver_lastclose +ffffffff81d13130 t i915_driver_release +ffffffff81d132e0 t i915_gem_reject_pin_ioctl +ffffffff81d14000 T i915_drm_client_alloc +ffffffff81d14090 T __i915_drm_client_free +ffffffff81d15000 T i915_gem_get_aperture_ioctl +ffffffff81d150e0 T i915_gem_object_unbind +ffffffff81d153c0 T i915_gem_pread_ioctl +ffffffff81d15590 t i915_gem_shmem_pread +ffffffff81d15a40 t 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i915_pci_unregister_driver +ffffffff81d2a000 T i915_oa_config_release +ffffffff81d2a080 T i915_perf_get_oa_config +ffffffff81d2a0e0 T i915_perf_oa_timestamp_frequency +ffffffff81d2a1e0 T i915_oa_init_reg_state +ffffffff81d2a2d0 T i915_perf_open_ioctl +ffffffff81d2abe0 T i915_perf_register +ffffffff81d2ac10 T i915_perf_unregister +ffffffff81d2ac80 T i915_perf_add_config_ioctl +ffffffff81d2ace0 T i915_perf_remove_config_ioctl +ffffffff81d2ad50 T i915_perf_init +ffffffff81d2b480 t gen7_is_valid_b_counter_addr +ffffffff81d2b4d0 t hsw_is_valid_mux_addr +ffffffff81d2b550 t hsw_enable_metric_set +ffffffff81d2b640 t hsw_disable_metric_set +ffffffff81d2b730 t gen7_oa_enable +ffffffff81d2b8d0 t gen7_oa_disable +ffffffff81d2b9b0 t gen7_oa_read +ffffffff81d2beb0 t gen7_oa_hw_tail_read +ffffffff81d2bf10 t gen8_oa_read +ffffffff81d2c5f0 t gen8_is_valid_mux_addr +ffffffff81d2c670 t gen8_is_valid_flex_addr +ffffffff81d2c6f0 t chv_is_valid_mux_addr +ffffffff81d2c770 t gen8_oa_enable +ffffffff81d2c900 t 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i915_request_active_engine +ffffffff81d323c0 T i915_request_free_capture_list +ffffffff81d32440 T i915_request_retire +ffffffff81d32650 T i915_request_retire_upto +ffffffff81d326d0 T __i915_request_skip +ffffffff81d32780 T i915_request_set_error_once +ffffffff81d327f0 T i915_request_mark_eio +ffffffff81d32890 T __i915_request_submit +ffffffff81d32aa0 T i915_request_submit +ffffffff81d32b00 T __i915_request_unsubmit +ffffffff81d32b70 T i915_request_unsubmit +ffffffff81d32c00 T i915_request_cancel +ffffffff81d32c80 T __i915_request_create +ffffffff81d33010 t request_alloc_slow +ffffffff81d331b0 T i915_request_create +ffffffff81d33330 T i915_request_await_execution +ffffffff81d33460 t __i915_request_await_execution +ffffffff81d335c0 t i915_request_await_external +ffffffff81d33730 T i915_request_await_dma_fence +ffffffff81d33b10 T i915_request_await_deps +ffffffff81d33b90 T i915_request_await_object +ffffffff81d33c60 T __i915_request_commit +ffffffff81d33f60 T __i915_request_queue_bh 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intel_vgt_deballoon +ffffffff81d40400 T intel_vgt_balloon +ffffffff81d41000 T i915_vma_instance +ffffffff81d41120 t vma_create +ffffffff81d41630 T i915_vma_work +ffffffff81d416b0 T i915_vma_wait_for_bind +ffffffff81d41740 T i915_vma_bind +ffffffff81d41b10 T i915_vma_pin_iomap +ffffffff81d41ce0 T i915_vma_flush_writes +ffffffff81d41d30 T i915_vma_unpin_iomap +ffffffff81d41da0 T i915_vma_unpin_and_release +ffffffff81d41e10 T i915_vma_misplaced +ffffffff81d41f00 T __i915_vma_set_map_and_fenceable +ffffffff81d41f90 T i915_gem_valid_gtt_space +ffffffff81d42020 T vma_invalidate_tlb +ffffffff81d42090 T i915_vma_pin_ww +ffffffff81d42800 t i915_vma_insert +ffffffff81d42bc0 T i915_ggtt_pin +ffffffff81d42cc0 t __i915_ggtt_pin +ffffffff81d42e90 t i915_gem_object_lock +ffffffff81d430e0 T i915_ggtt_clear_scanout +ffffffff81d43160 T i915_vma_close +ffffffff81d43240 T i915_vma_reopen +ffffffff81d432c0 T i915_vma_destroy_locked +ffffffff81d433d0 t release_references +ffffffff81d43540 T i915_vma_destroy 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intel_device_info_print +ffffffff81d4ac30 T intel_device_info_runtime_init_early +ffffffff81d4b360 T intel_device_info_runtime_init +ffffffff81d4b440 T intel_device_info_driver_create +ffffffff81d4b560 T intel_driver_caps_print +ffffffff81d4c000 T intel_memory_region_lookup +ffffffff81d4c0e0 T intel_memory_region_by_type +ffffffff81d4c1a0 T intel_memory_region_reserve +ffffffff81d4c1c0 T intel_memory_region_debug +ffffffff81d4c230 T intel_memory_region_create +ffffffff81d4c3f0 T intel_memory_region_set_name +ffffffff81d4c480 T intel_memory_region_avail +ffffffff81d4c500 T intel_memory_region_destroy +ffffffff81d4c580 T intel_memory_regions_hw_probe +ffffffff81d4c6f0 T intel_memory_regions_driver_release +ffffffff81d4d000 T snb_pcode_read +ffffffff81d4d0f0 t __snb_pcode_rw +ffffffff81d4d290 T snb_pcode_write_timeout +ffffffff81d4d390 T skl_pcode_request +ffffffff81d4d740 T intel_pcode_init +ffffffff81d4d8a0 T snb_pcode_read_p +ffffffff81d4d9e0 T snb_pcode_write_p +ffffffff81d4e000 T intel_region_ttm_device_init +ffffffff81d4e080 T intel_region_ttm_device_fini +ffffffff81d4e0a0 T intel_region_to_ttm_type +ffffffff81d4e0e0 T intel_region_ttm_init +ffffffff81d4e190 T intel_region_ttm_fini +ffffffff81d4e4e0 T intel_region_ttm_resource_to_rsgt +ffffffff81d4e520 T intel_region_ttm_resource_free +ffffffff81d4f000 T intel_runtime_pm_get_raw +ffffffff81d4f0a0 T intel_runtime_pm_get +ffffffff81d4f170 T intel_runtime_pm_get_if_in_use +ffffffff81d4f240 T intel_runtime_pm_get_if_active +ffffffff81d4f310 T intel_runtime_pm_get_noresume +ffffffff81d4f480 T intel_runtime_pm_put_raw +ffffffff81d4f520 T intel_runtime_pm_put_unchecked +ffffffff81d4f600 T intel_runtime_pm_enable +ffffffff81d4f630 T intel_runtime_pm_disable +ffffffff81d4f660 T intel_runtime_pm_driver_release +ffffffff81d4f700 T intel_runtime_pm_init_early +ffffffff81d50000 T intel_sbi_read +ffffffff81d50060 t intel_sbi_rw +ffffffff81d50270 T intel_sbi_write +ffffffff81d51000 T intel_step_init +ffffffff81d51530 T intel_step_name +ffffffff81d51570 t pvc_step_lookup +ffffffff81d52000 T gen3_stolen_base +ffffffff81d52060 T gen11_stolen_base +ffffffff81d520f0 T i830_stolen_size +ffffffff81d52170 T gen3_stolen_size +ffffffff81d521f0 T gen6_stolen_size +ffffffff81d52250 T chv_stolen_size +ffffffff81d522d0 T gen8_stolen_size +ffffffff81d52330 T gen9_stolen_size +ffffffff81d523b0 T intel_init_stolen_res +ffffffff81d53000 T intel_uncore_mmio_debug_init_early +ffffffff81d53070 T intel_uncore_forcewake_domain_to_str +ffffffff81d530f0 T intel_uncore_fw_release_timer +ffffffff81d53240 t fw_domains_put +ffffffff81d532e0 T intel_uncore_suspend +ffffffff81d53330 t intel_uncore_forcewake_reset +ffffffff81d53660 T intel_uncore_resume_early +ffffffff81d537d0 T intel_uncore_unclaimed_mmio +ffffffff81d53850 T intel_uncore_runtime_resume +ffffffff81d53880 T intel_uncore_forcewake_get +ffffffff81d53a20 T intel_uncore_forcewake_user_get +ffffffff81d53b50 T intel_uncore_forcewake_get__locked +ffffffff81d53c20 T intel_uncore_forcewake_user_put +ffffffff81d53d90 T intel_uncore_forcewake_put__locked +ffffffff81d53eb0 T intel_uncore_forcewake_put +ffffffff81d53ff0 T intel_uncore_forcewake_put_delayed +ffffffff81d54170 T intel_uncore_forcewake_flush +ffffffff81d54230 T assert_forcewakes_inactive +ffffffff81d542a0 T assert_forcewakes_active +ffffffff81d542d0 T intel_uncore_setup_mmio +ffffffff81d54300 t uncore_unmap_mmio +ffffffff81d54330 T intel_uncore_init_early +ffffffff81d543a0 T intel_uncore_init_mmio +ffffffff81d559e0 T intel_uncore_prune_engine_fw_domains +ffffffff81d55bf0 t fw_domain_fini +ffffffff81d55d00 T intel_uncore_fini_mmio +ffffffff81d55f70 T __intel_wait_for_register_fw +ffffffff81d56270 T __intel_wait_for_register +ffffffff81d56680 T intel_uncore_forcewake_for_reg +ffffffff81d567a0 t check_for_unclaimed_mmio +ffffffff81d56910 T intel_uncore_arm_unclaimed_mmio_detection +ffffffff81d56a30 t vgpu_write8 +ffffffff81d56a70 t vgpu_write16 +ffffffff81d56ab0 t vgpu_write32 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i915_pxp_tee_component_unbind +ffffffff81d5f000 T intel_dram_detect +ffffffff81d5f4c0 t gen11_get_dram_info +ffffffff81d5f510 t bxt_get_dram_info +ffffffff81d5f860 t skl_get_dram_info +ffffffff81d5fa80 T intel_dram_edram_detect +ffffffff81d5fb10 t icl_pcode_read_mem_global_info +ffffffff81d5fc00 t skl_dram_get_channel_info +ffffffff81d5fde0 t skl_dram_get_dimm_info +ffffffff81d60000 T intel_gmch_bridge_setup +ffffffff81d600e0 t intel_gmch_bridge_release +ffffffff81d60110 T intel_gmch_bar_setup +ffffffff81d60340 T intel_gmch_bar_teardown +ffffffff81d60440 T intel_gmch_vga_set_state +ffffffff81d61000 T intel_detect_pch +ffffffff81d61200 t intel_pch_match +ffffffff81d61250 t intel_pch_type +ffffffff81d61ad0 t intel_virt_detect_pch +ffffffff81d62000 T vlv_iosf_sb_get +ffffffff81d62020 T vlv_iosf_sb_put +ffffffff81d62040 T vlv_punit_read +ffffffff81d620a0 t vlv_sideband_rw +ffffffff81d62270 T vlv_punit_write +ffffffff81d622d0 T vlv_bunit_read +ffffffff81d62330 T vlv_bunit_write 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atombios_dvo_setup +ffffffff81d716d0 T atombios_digital_setup +ffffffff81d719c0 T atombios_get_encoder_mode +ffffffff81d71cd0 T atombios_dig_encoder_setup2 +ffffffff81d72160 T atombios_dig_encoder_setup +ffffffff81d72180 T atombios_dig_transmitter_setup2 +ffffffff81d72bf0 T atombios_set_edp_panel_power +ffffffff81d72d30 T radeon_atom_release_dig_encoder +ffffffff81d72d70 T radeon_atom_pick_dig_encoder +ffffffff81d72fd0 T radeon_atom_encoder_init +ffffffff81d730b0 t atombios_external_encoder_setup +ffffffff81d73370 T radeon_atom_ext_encoder_setup_ddc +ffffffff81d733d0 T radeon_enc_destroy +ffffffff81d734b0 T radeon_add_atom_encoder +ffffffff81d73960 t radeon_atombios_set_dig_info +ffffffff81d739d0 t radeon_atombios_set_dac_info +ffffffff81d73a50 t radeon_atom_backlight_update_status +ffffffff81d73ac0 t radeon_atom_encoder_dpms +ffffffff81d73da0 t radeon_atom_mode_fixup +ffffffff81d73f10 t radeon_atom_encoder_prepare +ffffffff81d744a0 t radeon_atom_encoder_commit +ffffffff81d744e0 t radeon_atom_encoder_mode_set +ffffffff81d74ad0 t radeon_atom_dig_detect +ffffffff81d74c00 t radeon_atom_encoder_disable +ffffffff81d74ef0 t radeon_atom_encoder_dpms_avivo +ffffffff81d75140 t radeon_atom_encoder_dpms_dig +ffffffff81d75780 t atombios_dac_setup +ffffffff81d75870 t radeon_atom_dac_detect +ffffffff81d75a80 t radeon_atom_ext_dpms +ffffffff81d75ab0 t radeon_atom_ext_prepare +ffffffff81d75ae0 t radeon_atom_ext_commit +ffffffff81d75b10 t radeon_atom_ext_mode_set +ffffffff81d75b40 t radeon_atom_ext_disable +ffffffff81d76000 T radeon_atom_hw_i2c_xfer +ffffffff81d76160 t radeon_process_i2c_ch +ffffffff81d76390 T radeon_atom_hw_i2c_func +ffffffff81d77000 T btc_get_max_clock_from_voltage_dependency_table +ffffffff81d770d0 T btc_apply_voltage_dependency_rules +ffffffff81d77140 T btc_skip_blacklist_clocks +ffffffff81d77230 T btc_adjust_clock_combinations +ffffffff81d77360 T btc_apply_voltage_delta_rules +ffffffff81d77490 T btc_program_mgcg_hw_sequence +ffffffff81d775a0 T btc_dpm_enabled +ffffffff81d775b0 T btc_notify_uvd_to_smc +ffffffff81d77640 T btc_reset_to_default +ffffffff81d77690 T btc_read_arb_registers +ffffffff81d77730 T btc_dpm_vblank_too_short +ffffffff81d777b0 T btc_dpm_pre_set_power_state +ffffffff81d78a00 T btc_dpm_set_power_state +ffffffff81d78de0 t btc_set_power_state_conditionally_enable_ulv +ffffffff81d78f60 T btc_dpm_post_set_power_state +ffffffff81d790a0 t btc_update_current_ps +ffffffff81d791b0 T btc_dpm_enable +ffffffff81d7a2a0 t btc_cg_clock_gating_enable +ffffffff81d7a3e0 t btc_mg_clock_gating_enable +ffffffff81d7a520 t btc_ls_clock_gating_enable +ffffffff81d7a660 t btc_init_stutter_mode +ffffffff81d7a6e0 T btc_dpm_disable +ffffffff81d7aa50 T btc_dpm_setup_asic +ffffffff81d7ab70 T btc_dpm_init +ffffffff81d7afe0 T btc_dpm_fini +ffffffff81d7b0b0 T btc_dpm_debugfs_print_current_performance_level +ffffffff81d7b110 T btc_dpm_get_current_sclk +ffffffff81d7b1a0 T btc_dpm_get_current_mclk +ffffffff81d7b230 T btc_dpm_get_sclk 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ci_get_leakage_voltages +ffffffff81d85b30 t ci_patch_dependency_tables_with_leakage +ffffffff81d861a0 t ci_set_private_data_variables_based_on_pptable +ffffffff81d862b0 T ci_dpm_debugfs_print_current_performance_level +ffffffff81d86410 T ci_dpm_print_power_state +ffffffff81d864f0 T ci_dpm_get_current_sclk +ffffffff81d865d0 T ci_dpm_get_current_mclk +ffffffff81d866b0 T ci_dpm_get_sclk +ffffffff81d86700 T ci_dpm_get_mclk +ffffffff81d86750 t ci_set_valid_flag +ffffffff81d867f0 t ci_populate_all_graphic_levels +ffffffff81d86db0 t ci_populate_all_memory_levels +ffffffff81d876d0 t ci_populate_smc_vce_level +ffffffff81d877f0 t ci_populate_smc_acp_level +ffffffff81d878f0 t ci_populate_smc_samu_level +ffffffff81d879f0 t ci_do_program_memory_timing_parameters +ffffffff81d87c20 t ci_populate_smc_uvd_level +ffffffff81d87d80 t ci_populate_smc_initial_state +ffffffff81d87e20 t ci_populate_bapm_parameters_in_dpm_table +ffffffff81d87fa0 t ci_populate_smc_voltage_table +ffffffff81d880c0 t ci_min_max_v_gnbl_pm_lid_from_bapm_vddc +ffffffff81d88320 t ci_enable_sclk_mclk_dpm +ffffffff81d88710 t ci_thermal_enable_alert +ffffffff81d88910 t ci_enable_vce_dpm +ffffffff81d89000 T ci_copy_bytes_to_smc +ffffffff81d89260 T ci_start_smc +ffffffff81d892a0 T ci_reset_smc +ffffffff81d892e0 T ci_program_jump_on_start +ffffffff81d89310 T ci_stop_smc_clock +ffffffff81d89350 T ci_start_smc_clock +ffffffff81d89390 T ci_is_smc_running +ffffffff81d89410 T ci_load_smc_ucode +ffffffff81d895d0 T ci_read_smc_sram_dword +ffffffff81d896c0 T ci_write_smc_sram_dword +ffffffff81d8a000 T cik_get_allowed_info_register +ffffffff81d8a0a0 T cik_didt_rreg +ffffffff81d8a150 T cik_didt_wreg +ffffffff81d8a1e0 T ci_get_temp +ffffffff81d8a230 T kv_get_temp +ffffffff81d8a290 T cik_pciep_rreg +ffffffff81d8a320 T cik_pciep_wreg +ffffffff81d8a390 T cik_get_xclk +ffffffff81d8a410 T cik_mm_rdoorbell +ffffffff81d8a480 T cik_mm_wdoorbell +ffffffff81d8a4d0 T ci_mc_load_microcode +ffffffff81d8a840 T cik_ring_test +ffffffff81d8ab60 T cik_fence_gfx_ring_emit +ffffffff81d8afb0 T cik_fence_compute_ring_emit +ffffffff81d8b260 T cik_semaphore_ring_emit +ffffffff81d8b450 T cik_copy_cpdma +ffffffff81d8b940 T cik_ring_ib_execute +ffffffff81d8bf50 T cik_ib_test +ffffffff81d8c2e0 T cik_gfx_get_rptr +ffffffff81d8c340 T cik_gfx_get_wptr +ffffffff81d8c380 T cik_gfx_set_wptr +ffffffff81d8c3c0 T cik_compute_get_rptr +ffffffff81d8c4b0 T cik_compute_get_wptr +ffffffff81d8c5a0 T cik_compute_set_wptr +ffffffff81d8c620 T cik_gpu_check_soft_reset +ffffffff81d8c7a0 T cik_asic_reset +ffffffff81d8ccf0 t cik_gpu_pci_config_reset +ffffffff81d8d560 T cik_gfx_is_lockup +ffffffff81d8d5e0 T cik_pcie_gart_tlb_flush +ffffffff81d8d630 T cik_ib_parse +ffffffff81d8d660 T cik_vm_init +ffffffff81d8d6c0 T cik_vm_fini +ffffffff81d8d6f0 T cik_vm_flush +ffffffff81d8e4f0 T cik_enter_rlc_safe_mode +ffffffff81d8e600 T cik_exit_rlc_safe_mode +ffffffff81d8e640 T cik_update_cg +ffffffff81d8eb90 t cik_enable_mgcg +ffffffff81d8f0c0 t cik_enable_cgcg +ffffffff81d8f450 T cik_init_cp_pg_table +ffffffff81d8f6e0 T cik_get_csb_size +ffffffff81d8f770 T cik_get_csb_buffer +ffffffff81d8f900 T cik_irq_set +ffffffff81d90780 t cik_disable_interrupt_state +ffffffff81d90c90 T cik_irq_process +ffffffff81d926e0 t cik_irq_ack +ffffffff81d930c0 T cik_resume +ffffffff81d93180 t cik_init_golden_registers +ffffffff81d933b0 t cik_startup +ffffffff81d965d0 T cik_suspend +ffffffff81d96a80 T cik_init +ffffffff81d97100 t cik_init_microcode +ffffffff81d98140 t cik_uvd_init +ffffffff81d98200 t cik_vce_init +ffffffff81d982e0 t cik_cp_fini +ffffffff81d98370 t cik_irq_fini +ffffffff81d984a0 t cik_mec_fini +ffffffff81d98580 t cik_pcie_gart_fini +ffffffff81d98690 T cik_fini +ffffffff81d98ac0 T dce8_program_fmt +ffffffff81d98c10 T dce8_bandwidth_update +ffffffff81d998c0 T cik_get_gpu_clock_counter +ffffffff81d99990 T cik_set_uvd_clocks +ffffffff81d99a10 t cik_set_uvd_clock +ffffffff81d99bf0 T cik_set_vce_clocks +ffffffff81d99f10 t cik_wait_for_rlc_serdes +ffffffff81d9a100 t cik_mec_init +ffffffff81d9a340 t cik_uvd_start +ffffffff81d9a450 t cik_vce_start +ffffffff81d9a5a0 t cik_irq_init +ffffffff81d9b1c0 t cik_cp_resume +ffffffff81d9cb50 t cik_uvd_resume +ffffffff81d9cc30 t cik_vce_resume +ffffffff81d9cd40 t pcie_capability_set_word +ffffffff81d9ce70 t pcie_capability_read_word +ffffffff81d9cf20 t pcie_capability_clear_and_set_word +ffffffff81d9d060 t pcie_capability_write_word +ffffffff81d9d130 t cik_get_cu_active_bitmap +ffffffff81d9d2c0 t radeon_bo_reserve +ffffffff81d9d460 t radeon_bo_unreserve +ffffffff81d9d570 t cik_update_gfx_pg +ffffffff81d9d720 t cik_compute_stop +ffffffff81d9d8a0 t cik_cp_compute_fini +ffffffff81d9dad0 t request_firmware +ffffffff81d9db80 t release_firmware +ffffffff81d9dbc0 t dce8_latency_watermark +ffffffff81d9e000 T cik_sdma_get_rptr +ffffffff81d9e070 T cik_sdma_get_wptr +ffffffff81d9e0c0 T cik_sdma_set_wptr +ffffffff81d9e110 T cik_sdma_ring_ib_execute +ffffffff81d9e560 T cik_sdma_fence_ring_emit +ffffffff81d9e760 t cik_sdma_hdp_flush_ring_emit +ffffffff81d9e9d0 T cik_sdma_semaphore_ring_emit +ffffffff81d9eb00 T cik_sdma_enable +ffffffff81d9ecf0 T cik_sdma_resume +ffffffff81d9f1f0 T cik_sdma_fini +ffffffff81d9f240 T cik_copy_dma +ffffffff81d9f6e0 T cik_sdma_ring_test +ffffffff81d9f9e0 T cik_sdma_ib_test +ffffffff81d9fc80 T cik_sdma_is_lockup +ffffffff81d9fd10 T cik_sdma_vm_copy_pages +ffffffff81d9fe20 T cik_sdma_vm_write_pages +ffffffff81d9ffa0 T cik_sdma_vm_set_pages +ffffffff81da0120 T cik_sdma_vm_pad_ib +ffffffff81da0170 T cik_dma_vm_flush +ffffffff81da1000 T cypress_enable_spread_spectrum +ffffffff81da1140 T cypress_start_dpm +ffffffff81da1190 T cypress_enable_sclk_control +ffffffff81da11f0 T cypress_enable_mclk_control +ffffffff81da1250 T cypress_notify_smc_display_change +ffffffff81da12a0 T cypress_program_response_times +ffffffff81da1390 T cypress_advertise_gen2_capability +ffffffff81da14a0 T cypress_notify_link_speed_change_after_state_change +ffffffff81da1590 T cypress_notify_link_speed_change_before_state_change +ffffffff81da1670 T cypress_get_strobe_mode_settings +ffffffff81da1780 T cypress_get_mclk_frequency_ratio +ffffffff81da1830 T cypress_map_clkf_to_ibias +ffffffff81da18f0 T cypress_convert_power_level_to_smc +ffffffff81da1d10 t cypress_populate_mclk_value +ffffffff81da2150 T cypress_upload_sw_state +ffffffff81da2330 T cypress_upload_mc_reg_table +ffffffff81da2410 t cypress_convert_mc_reg_table_to_smc +ffffffff81da2860 T cypress_calculate_burst_time +ffffffff81da28f0 T cypress_program_memory_timing_parameters +ffffffff81da2ac0 T cypress_populate_smc_initial_state +ffffffff81da2eb0 T cypress_populate_smc_acpi_state +ffffffff81da3260 T cypress_construct_voltage_tables +ffffffff81da3420 T cypress_populate_smc_voltage_tables +ffffffff81da3560 T cypress_get_mvdd_configuration +ffffffff81da3650 T cypress_populate_mc_reg_table +ffffffff81da39e0 T cypress_get_table_locations +ffffffff81da3af0 T cypress_enable_display_gap +ffffffff81da3b50 T cypress_dpm_setup_asic +ffffffff81da3cb0 T cypress_dpm_enable +ffffffff81da4960 t cypress_force_mc_use_s1 +ffffffff81da4c30 t cypress_gfx_clock_gating_enable +ffffffff81da5010 t cypress_mg_clock_gating_enable +ffffffff81da52f0 T cypress_dpm_disable +ffffffff81da5580 T cypress_dpm_set_power_state +ffffffff81da5880 T cypress_dpm_display_configuration_changed +ffffffff81da5960 T cypress_dpm_init +ffffffff81da5c30 T cypress_dpm_fini +ffffffff81da5cd0 T cypress_dpm_vblank_too_short +ffffffff81da5d50 t cypress_wait_for_mc_sequencer +ffffffff81da6000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81da6080 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81da6100 T dce3_2_afmt_write_sad_regs +ffffffff81da6200 T dce3_2_audio_set_dto +ffffffff81da6340 T dce3_2_hdmi_update_acr +ffffffff81da6710 T dce3_2_set_audio_packet +ffffffff81da68d0 T dce3_2_set_mute +ffffffff81da7000 T dce6_endpoint_rreg +ffffffff81da7100 T dce6_endpoint_wreg +ffffffff81da7210 T dce6_audio_get_pin +ffffffff81da73a0 T dce6_afmt_select_pin +ffffffff81da7430 T dce6_afmt_write_latency_fields +ffffffff81da74f0 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81da75d0 T dce6_afmt_dp_write_speaker_allocation +ffffffff81da76b0 T dce6_afmt_write_sad_regs +ffffffff81da7800 T dce6_audio_enable +ffffffff81da7850 T dce6_hdmi_audio_set_dto +ffffffff81da78c0 T dce6_dp_audio_set_dto +ffffffff81da8000 T eg_cg_rreg +ffffffff81da8090 T eg_cg_wreg +ffffffff81da8100 T eg_pif_phy0_rreg +ffffffff81da8190 T eg_pif_phy0_wreg +ffffffff81da8200 T eg_pif_phy1_rreg +ffffffff81da8290 T eg_pif_phy1_wreg +ffffffff81da8300 T evergreen_get_allowed_info_register +ffffffff81da8390 T evergreen_tiling_fields +ffffffff81da8430 T sumo_set_uvd_clocks +ffffffff81da8520 t sumo_set_uvd_clock +ffffffff81da8780 T evergreen_set_uvd_clocks +ffffffff81da8e40 T evergreen_fix_pci_max_read_req_size +ffffffff81da9040 T dce4_program_fmt +ffffffff81da9170 T dce4_wait_for_vblank +ffffffff81da9430 T evergreen_page_flip +ffffffff81da95e0 T evergreen_page_flip_pending +ffffffff81da9660 T evergreen_get_temp +ffffffff81da9730 T sumo_get_temp +ffffffff81da9780 T sumo_pm_init_profile +ffffffff81da98d0 T btc_pm_init_profile +ffffffff81da99f0 T evergreen_pm_misc +ffffffff81da9bb0 T evergreen_pm_prepare +ffffffff81da9cd0 T evergreen_pm_finish +ffffffff81da9df0 T evergreen_hpd_sense +ffffffff81da9e70 T evergreen_hpd_set_polarity +ffffffff81da9fc0 T evergreen_hpd_init +ffffffff81daa0a0 T evergreen_hpd_fini +ffffffff81daa150 T evergreen_get_number_of_dram_channels +ffffffff81daa1a0 T evergreen_bandwidth_update +ffffffff81daa380 t evergreen_line_buffer_adjust +ffffffff81daa5a0 t evergreen_program_watermarks +ffffffff81dab0a0 T evergreen_mc_wait_for_idle +ffffffff81dab140 T evergreen_pcie_gart_tlb_flush +ffffffff81dab220 T evergreen_mc_stop +ffffffff81dabe80 T evergreen_mc_resume +ffffffff81dac650 T evergreen_mc_program +ffffffff81daca70 T evergreen_ring_ib_execute +ffffffff81dacf70 T evergreen_mc_init +ffffffff81dad0d0 T evergreen_print_gpu_status_regs +ffffffff81dad120 T evergreen_is_display_hung +ffffffff81dad350 T evergreen_gpu_check_soft_reset +ffffffff81dad4c0 T evergreen_gpu_pci_config_reset +ffffffff81dad690 T evergreen_asic_reset +ffffffff81dada80 T evergreen_gfx_is_lockup +ffffffff81dadb00 T sumo_rlc_fini +ffffffff81dadd40 t radeon_bo_reserve +ffffffff81dadee0 t radeon_bo_unreserve +ffffffff81dadff0 T sumo_rlc_init +ffffffff81dae8e0 T evergreen_rlc_resume +ffffffff81daec50 T evergreen_get_vblank_counter +ffffffff81daecc0 T evergreen_disable_interrupt_state +ffffffff81daefc0 T evergreen_irq_set +ffffffff81daf660 T evergreen_irq_suspend +ffffffff81daf6d0 T evergreen_irq_process +ffffffff81db0370 t evergreen_irq_ack +ffffffff81db0aa0 T evergreen_resume +ffffffff81db0bb0 t evergreen_init_golden_registers +ffffffff81db0e20 t evergreen_startup +ffffffff81db2870 T evergreen_suspend +ffffffff81db2a80 T evergreen_init +ffffffff81db2fc0 t evergreen_pcie_gart_fini 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dce4_audio_enable +ffffffff81dc0080 T evergreen_hdmi_update_acr +ffffffff81dc02d0 T dce4_afmt_write_latency_fields +ffffffff81dc0340 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81dc03c0 T dce4_afmt_dp_write_speaker_allocation +ffffffff81dc0440 T evergreen_hdmi_write_sad_regs +ffffffff81dc0540 T evergreen_set_avi_packet +ffffffff81dc0700 T dce4_hdmi_audio_set_dto +ffffffff81dc07e0 T dce4_dp_audio_set_dto +ffffffff81dc08e0 T dce4_set_vbi_packet +ffffffff81dc0950 T dce4_hdmi_set_color_depth +ffffffff81dc0ac0 T dce4_set_audio_packet +ffffffff81dc0d10 T dce4_set_mute +ffffffff81dc0e20 T evergreen_hdmi_enable +ffffffff81dc11b0 T evergreen_dp_enable +ffffffff81dc2000 T kv_dpm_enable_bapm +ffffffff81dc2070 T kv_dpm_enable +ffffffff81dc3060 t kv_populate_vce_table +ffffffff81dc3300 t kv_populate_samu_table +ffffffff81dc3580 t kv_populate_acp_table +ffffffff81dc3730 t kv_start_am +ffffffff81dc3770 t kv_enable_auto_thermal_throttling +ffffffff81dc37b0 t kv_enable_dpm_voltage_scaling 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+ffffffff81dc6840 T kv_dpm_get_sclk +ffffffff81dc6890 T kv_dpm_get_mclk +ffffffff81dc7000 T kv_notify_message_to_smu +ffffffff81dc70c0 T kv_dpm_get_enable_mask +ffffffff81dc71b0 T kv_send_msg_to_smc_with_parameter +ffffffff81dc7280 T kv_read_smc_sram_dword +ffffffff81dc7310 T kv_smc_dpm_enable +ffffffff81dc7450 T kv_smc_bapm_enable +ffffffff81dc7590 T kv_copy_bytes_to_smc +ffffffff81dc8000 T tn_smc_rreg +ffffffff81dc8090 T tn_smc_wreg +ffffffff81dc8100 T ni_mc_load_microcode +ffffffff81dc82f0 T ni_init_microcode +ffffffff81dc88c0 t request_firmware +ffffffff81dc8970 t release_firmware +ffffffff81dc89b0 T cayman_get_allowed_info_register +ffffffff81dc8a40 T tn_get_temp +ffffffff81dc8ae0 T cayman_pcie_gart_tlb_flush +ffffffff81dc8b30 T cayman_cp_int_cntl_setup +ffffffff81dc8b80 T cayman_fence_ring_emit +ffffffff81dc8f70 T cayman_ring_ib_execute +ffffffff81dc9440 T cayman_gfx_get_rptr +ffffffff81dc94d0 T cayman_gfx_get_wptr +ffffffff81dc9540 T cayman_gfx_set_wptr +ffffffff81dc95c0 T cayman_gpu_check_soft_reset +ffffffff81dc9760 T cayman_asic_reset +ffffffff81dc9af0 T cayman_gfx_is_lockup +ffffffff81dc9b70 T cayman_resume +ffffffff81dc9c30 t ni_init_golden_registers +ffffffff81dc9d20 t cayman_startup +ffffffff81dcb2e0 T cayman_suspend +ffffffff81dcb520 T cayman_init +ffffffff81dcb9b0 t cayman_uvd_init +ffffffff81dcba70 t cayman_vce_init +ffffffff81dcbb50 t cayman_cp_fini +ffffffff81dcbbe0 t cayman_pcie_gart_fini +ffffffff81dcbd30 T cayman_fini +ffffffff81dcc070 T cayman_vm_init +ffffffff81dcc0d0 T cayman_vm_fini +ffffffff81dcc100 T cayman_vm_decode_fault +ffffffff81dcc1a0 T cayman_vm_flush +ffffffff81dcc680 T tn_set_vce_clocks +ffffffff81dcc980 t cayman_uvd_start +ffffffff81dcca60 t cayman_vce_start +ffffffff81dccbb0 t cayman_cp_load_microcode +ffffffff81dccd40 t cayman_cp_resume +ffffffff81dcddf0 t cayman_uvd_resume +ffffffff81dcded0 t cayman_vce_resume +ffffffff81dce000 T cayman_dma_get_rptr +ffffffff81dce070 T cayman_dma_get_wptr +ffffffff81dce0c0 T cayman_dma_set_wptr +ffffffff81dce110 T cayman_dma_ring_ib_execute +ffffffff81dce4e0 T cayman_dma_stop +ffffffff81dce590 T cayman_dma_resume +ffffffff81dce800 T cayman_dma_fini +ffffffff81dce8c0 T cayman_dma_is_lockup +ffffffff81dce950 T cayman_dma_vm_copy_pages +ffffffff81dcea50 T cayman_dma_vm_write_pages +ffffffff81dcebc0 T cayman_dma_vm_set_pages +ffffffff81dced30 T cayman_dma_vm_pad_ib +ffffffff81dced80 T cayman_dma_vm_flush +ffffffff81dd0000 T ni_get_pi +ffffffff81dd0030 T ni_get_ps +ffffffff81dd0060 T ni_dpm_vblank_too_short +ffffffff81dd00e0 T ni_dpm_force_performance_level +ffffffff81dd0250 T ni_copy_and_switch_arb_sets +ffffffff81dd0520 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81dd05a0 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81dd0620 T ni_dpm_setup_asic +ffffffff81dd0880 T ni_update_current_ps +ffffffff81dd0950 T ni_update_requested_ps +ffffffff81dd0a20 T ni_dpm_enable +ffffffff81dd1a20 t ni_init_smc_table +ffffffff81dd2450 t ni_init_smc_spll_table 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ni_dpm_get_mclk +ffffffff81dd77e0 t ni_do_program_memory_timing_parameters +ffffffff81dd7940 t ni_calculate_sclk_params +ffffffff81dd7b90 t ni_calculate_power_boost_limit +ffffffff81dd7d30 t ni_populate_mclk_value +ffffffff81dd9000 T r100_wait_for_vblank +ffffffff81dd9190 T r100_page_flip +ffffffff81dd94a0 T r100_page_flip_pending +ffffffff81dd9570 T r100_pm_get_dynpm_state +ffffffff81dd9790 T r100_pm_init_profile +ffffffff81dd9870 T r100_pm_misc +ffffffff81dd9d10 T r100_pm_prepare +ffffffff81dd9dc0 T r100_pm_finish +ffffffff81dd9e70 T r100_gui_idle +ffffffff81dd9eb0 T r100_hpd_sense +ffffffff81dd9f10 T r100_hpd_set_polarity +ffffffff81dd9fd0 T r100_hpd_init +ffffffff81dda080 T r100_hpd_fini +ffffffff81dda0f0 T r100_pci_gart_tlb_flush +ffffffff81dda120 T r100_pci_gart_init +ffffffff81dda200 T r100_pci_gart_get_page_entry +ffffffff81dda230 T r100_pci_gart_set_page +ffffffff81dda270 T r100_pci_gart_enable +ffffffff81dda360 T r100_pci_gart_disable +ffffffff81dda3e0 T r100_pci_gart_fini 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+ffffffff81de6cd0 T r300_asic_reset +ffffffff81de6f30 T r300_mc_init +ffffffff81de7000 T rv370_set_pcie_lanes +ffffffff81de7220 T rv370_get_pcie_lanes +ffffffff81de72e0 T r300_cs_parse +ffffffff81de76b0 t r300_packet0_check +ffffffff81de8610 T r300_set_reg_safe +ffffffff81de8650 T r300_mc_program +ffffffff81de8800 T r300_clock_startup +ffffffff81de8890 T r300_resume +ffffffff81de8ab0 t r300_startup +ffffffff81de8ea0 T r300_suspend +ffffffff81de8f50 T r300_fini +ffffffff81de90b0 T r300_init +ffffffff81dea000 T r420_pm_init_profile +ffffffff81dea0f0 T r420_pipes_init +ffffffff81dea2f0 T r420_mc_rreg +ffffffff81dea380 T r420_mc_wreg +ffffffff81dea400 T r420_resume +ffffffff81dea620 t r420_startup +ffffffff81dea8b0 T r420_suspend +ffffffff81deaaa0 T r420_fini +ffffffff81deabf0 T r420_init +ffffffff81deaf50 T r420_debugfs_pipes_info_init +ffffffff81deaf80 t r420_cp_errata_init +ffffffff81dec000 T r520_mc_wait_for_idle +ffffffff81dec0b0 T r520_resume +ffffffff81dec1e0 t r520_startup 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+ffffffff81def1d0 t radeon_bo_unreserve +ffffffff81def2e0 T r600_vram_scratch_fini +ffffffff81def370 T r600_set_bios_scratch_engine_hung +ffffffff81def3c0 T r600_gpu_check_soft_reset +ffffffff81def790 T r600_asic_reset +ffffffff81defbc0 t r600_gpu_pci_config_reset +ffffffff81defe20 T r600_gfx_is_lockup +ffffffff81defea0 T r6xx_remap_render_backend +ffffffff81df0070 T r600_count_pipe_bits +ffffffff81df00e0 T r600_pciep_rreg +ffffffff81df0170 T r600_pciep_wreg +ffffffff81df01e0 T r600_cp_stop +ffffffff81df0260 T r600_init_microcode +ffffffff81df0810 t request_firmware +ffffffff81df08c0 t release_firmware +ffffffff81df0900 T r600_gfx_get_rptr +ffffffff81df0960 T r600_gfx_get_wptr +ffffffff81df09a0 T r600_gfx_set_wptr +ffffffff81df09e0 T r600_cp_start +ffffffff81df0db0 T r600_cp_resume +ffffffff81df11d0 T r600_ring_init +ffffffff81df1290 T r600_cp_fini +ffffffff81df1320 T r600_scratch_init +ffffffff81df1390 T r600_ring_test +ffffffff81df16b0 T r600_fence_ring_emit +ffffffff81df2020 T r600_semaphore_ring_emit +ffffffff81df2240 T r600_copy_cpdma +ffffffff81df28b0 T r600_set_surface_reg +ffffffff81df28e0 T r600_clear_surface_reg +ffffffff81df2910 T r600_vga_set_state +ffffffff81df2970 T r600_resume +ffffffff81df2a20 t r600_startup +ffffffff81df4930 T r600_suspend +ffffffff81df4af0 T r600_irq_suspend +ffffffff81df4bd0 t r600_pcie_gart_disable +ffffffff81df4dd0 T r600_init +ffffffff81df56f0 T r600_ih_ring_init +ffffffff81df5760 T r600_irq_fini +ffffffff81df58e0 t r600_pcie_gart_fini +ffffffff81df5920 T r600_fini +ffffffff81df5b70 T r600_ring_ib_execute +ffffffff81df6060 T r600_ib_test +ffffffff81df6370 T r600_ih_ring_alloc +ffffffff81df64c0 T r600_ih_ring_fini +ffffffff81df6570 T r600_rlc_stop +ffffffff81df6780 T r600_disable_interrupts +ffffffff81df6830 T r600_irq_init +ffffffff81df6cd0 t r600_disable_interrupt_state +ffffffff81df6fd0 T r600_irq_disable +ffffffff81df70a0 T r600_irq_set +ffffffff81df78a0 t r600_irq_ack +ffffffff81df7dd0 T r600_irq_process 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+ffffffff81e00390 T r600_dma_fini +ffffffff81e00410 T r600_dma_is_lockup +ffffffff81e00490 T r600_dma_ring_test +ffffffff81e00750 T r600_dma_fence_ring_emit +ffffffff81e00960 T r600_dma_semaphore_ring_emit +ffffffff81e00aa0 T r600_dma_ib_test +ffffffff81e00d10 T r600_dma_ring_ib_execute +ffffffff81e010a0 T r600_copy_dma +ffffffff81e02000 T r600_dpm_print_class_info +ffffffff81e02340 T r600_dpm_print_cap_info +ffffffff81e023e0 T r600_dpm_print_ps_status +ffffffff81e024a0 T r600_dpm_get_vblank_time +ffffffff81e02560 T r600_dpm_get_vrefresh +ffffffff81e025f0 T r600_calculate_u_and_p +ffffffff81e02670 T r600_calculate_at +ffffffff81e02720 T r600_gfx_clockgating_enable +ffffffff81e02830 T r600_dynamicpm_enable +ffffffff81e02880 T r600_enable_thermal_protection +ffffffff81e028e0 T r600_enable_acpi_pm +ffffffff81e02930 T r600_enable_dynamic_pcie_gen2 +ffffffff81e02980 T r600_dynamicpm_enabled +ffffffff81e029c0 T r600_enable_sclk_control +ffffffff81e02a20 T r600_enable_mclk_control +ffffffff81e02a80 T r600_enable_spll_bypass +ffffffff81e02ad0 T r600_wait_for_spll_change +ffffffff81e02b60 T r600_set_bsp +ffffffff81e02ba0 T r600_set_at +ffffffff81e02c00 T r600_set_tc +ffffffff81e02c60 T r600_select_td +ffffffff81e02d10 T r600_set_vrc +ffffffff81e02d50 T r600_set_tpu +ffffffff81e02db0 T r600_set_tpc +ffffffff81e02e10 T r600_set_sstu +ffffffff81e02e70 T r600_set_sst +ffffffff81e02ec0 T r600_set_git +ffffffff81e02f10 T r600_set_fctu +ffffffff81e02f70 T r600_set_fct +ffffffff81e02fc0 T r600_set_ctxcgtt3d_rphc +ffffffff81e03020 T r600_set_ctxcgtt3d_rsdc +ffffffff81e03080 T r600_set_vddc3d_oorsu +ffffffff81e030e0 T r600_set_vddc3d_oorphc +ffffffff81e03140 T r600_set_vddc3d_oorsdc +ffffffff81e031a0 T r600_set_mpll_lock_time +ffffffff81e031f0 T r600_set_mpll_reset_time +ffffffff81e03240 T r600_engine_clock_entry_enable +ffffffff81e03340 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81e03440 T r600_engine_clock_entry_enable_post_divider +ffffffff81e03540 T r600_engine_clock_entry_set_post_divider +ffffffff81e03610 T r600_engine_clock_entry_set_reference_divider +ffffffff81e036e0 T r600_engine_clock_entry_set_feedback_divider +ffffffff81e037b0 T r600_engine_clock_entry_set_step_time +ffffffff81e03880 T r600_vid_rt_set_ssu +ffffffff81e038e0 T r600_vid_rt_set_vru +ffffffff81e03940 T r600_vid_rt_set_vrt +ffffffff81e039a0 T r600_voltage_control_enable_pins +ffffffff81e039f0 T r600_voltage_control_program_voltages +ffffffff81e03a80 T r600_voltage_control_deactivate_static_control +ffffffff81e03b10 T r600_power_level_enable +ffffffff81e03b80 T r600_power_level_set_voltage_index +ffffffff81e03bf0 T r600_power_level_set_mem_clock_index +ffffffff81e03c50 T r600_power_level_set_eng_clock_index +ffffffff81e03cc0 T r600_power_level_set_watermark_id +ffffffff81e03d30 T r600_power_level_set_pcie_gen2 +ffffffff81e03d90 T r600_power_level_get_current_index +ffffffff81e03dd0 T r600_power_level_get_target_index +ffffffff81e03e10 T r600_power_level_set_enter_index +ffffffff81e03e70 T r600_wait_for_power_level_unequal +ffffffff81e03f70 T r600_wait_for_power_level +ffffffff81e04070 T r600_start_dpm +ffffffff81e04360 T r600_stop_dpm +ffffffff81e043b0 T r600_dpm_pre_set_power_state +ffffffff81e043e0 T r600_dpm_post_set_power_state +ffffffff81e04410 T r600_is_uvd_state +ffffffff81e04450 T r600_is_internal_thermal_sensor +ffffffff81e04490 T r600_dpm_late_enable +ffffffff81e045a0 T r600_get_platform_caps +ffffffff81e04640 T r600_parse_extended_power_table +ffffffff81e05490 T r600_free_extended_power_table +ffffffff81e055f0 T r600_get_pcie_gen_support +ffffffff81e05640 T r600_get_pcie_lane_support +ffffffff81e056a0 T r600_encode_pci_lane_width +ffffffff81e06000 T r600_audio_update_hdmi +ffffffff81e06180 t r600_audio_status +ffffffff81e062a0 T r600_hdmi_buffer_status_changed +ffffffff81e06350 T r600_hdmi_update_audio_settings +ffffffff81e067c0 T r600_audio_enable +ffffffff81e06840 T r600_audio_get_pin +ffffffff81e06870 T r600_hdmi_update_acr +ffffffff81e06c90 T r600_set_avi_packet +ffffffff81e06ed0 T r600_hdmi_audio_workaround +ffffffff81e06fa0 T r600_hdmi_audio_set_dto +ffffffff81e07060 T r600_set_vbi_packet +ffffffff81e07120 T r600_set_audio_packet +ffffffff81e07460 T r600_set_mute +ffffffff81e07570 T r600_hdmi_enable +ffffffff81e08000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81e08040 T radeon_acpi_pcie_notify_device_ready +ffffffff81e08170 T radeon_acpi_pcie_performance_request +ffffffff81e08570 T radeon_acpi_init +ffffffff81e08de0 t radeon_acpi_event +ffffffff81e09160 T radeon_acpi_fini +ffffffff81e0a000 T radeon_agp_head_init +ffffffff81e0a050 T radeon_agp_init +ffffffff81e0a0b0 T radeon_agp_resume +ffffffff81e0a150 T radeon_agp_fini +ffffffff81e0a1a0 T radeon_agp_suspend +ffffffff81e0b000 T radeon_agp_disable +ffffffff81e0b130 T radeon_asic_init +ffffffff81e0b900 t radeon_invalid_rreg +ffffffff81e0b940 t radeon_invalid_wreg +ffffffff81e0b990 t radeon_invalid_get_allowed_info_register +ffffffff81e0c000 T radeon_atombios_i2c_init +ffffffff81e0c3b0 T radeon_atombios_lookup_gpio +ffffffff81e0c4c0 T radeon_get_atom_connector_info_from_object_table +ffffffff81e0ce70 t radeon_lookup_i2c_gpio +ffffffff81e0d160 t radeon_atom_apply_quirks +ffffffff81e0d590 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81e0daf0 T radeon_atom_get_clock_info +ffffffff81e0def0 T radeon_atombios_sideport_present +ffffffff81e0dfb0 T radeon_atombios_get_tmds_info +ffffffff81e0e100 T radeon_atombios_get_ppll_ss_info +ffffffff81e0e230 T radeon_atombios_get_asic_ss_info +ffffffff81e0e510 t radeon_atombios_get_igp_ss_overrides +ffffffff81e0e630 T radeon_atombios_get_lvds_info +ffffffff81e0e9d0 T radeon_atombios_get_primary_dac_info +ffffffff81e0eaa0 T radeon_atom_get_tv_timings +ffffffff81e0ecf0 T radeon_atombios_get_tv_info +ffffffff81e0edb0 T radeon_atombios_get_tv_dac_info +ffffffff81e0eed0 T radeon_atombios_get_default_voltages +ffffffff81e0ef90 T radeon_atombios_get_power_modes +ffffffff81e100f0 T radeon_atom_get_clock_dividers +ffffffff81e10410 T radeon_atom_get_memory_pll_dividers +ffffffff81e10570 T radeon_atom_set_clock_gating +ffffffff81e105d0 T radeon_atom_get_engine_clock +ffffffff81e10620 T radeon_atom_get_memory_clock +ffffffff81e10670 T radeon_atom_set_engine_clock +ffffffff81e106d0 T radeon_atom_set_memory_clock +ffffffff81e10730 T radeon_atom_set_engine_dram_timings +ffffffff81e107b0 T radeon_atom_update_memory_dll +ffffffff81e10800 T radeon_atom_set_ac_timing +ffffffff81e10860 T radeon_atom_set_voltage +ffffffff81e10940 T radeon_atom_get_max_vddc +ffffffff81e10a30 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81e10b20 T radeon_atom_get_leakage_id_from_vbios +ffffffff81e10bf0 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81e10e10 T radeon_atom_get_voltage_evv +ffffffff81e10ed0 T radeon_atom_get_voltage_gpio_settings +ffffffff81e10ff0 T radeon_atom_is_voltage_gpio +ffffffff81e111a0 T radeon_atom_get_svi2_info +ffffffff81e11290 T radeon_atom_get_max_voltage +ffffffff81e11420 T radeon_atom_get_min_voltage +ffffffff81e11580 T radeon_atom_get_voltage_step +ffffffff81e116a0 T radeon_atom_round_to_true_voltage +ffffffff81e11820 T radeon_atom_get_voltage_table +ffffffff81e11ac0 T radeon_atom_get_memory_info +ffffffff81e11c80 T radeon_atom_get_mclk_range_table +ffffffff81e11ed0 T radeon_atom_init_mc_reg_table +ffffffff81e12160 T radeon_atom_initialize_bios_scratch_regs +ffffffff81e12230 T radeon_save_bios_scratch_regs +ffffffff81e12310 T radeon_restore_bios_scratch_regs +ffffffff81e123f0 T radeon_atom_output_lock +ffffffff81e12480 T radeon_atombios_connected_scratch_regs +ffffffff81e12ce0 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81e12e30 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81e13060 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81e13240 t radeon_atombios_add_pplib_thermal_controller +ffffffff81e136c0 t radeon_atombios_parse_pplib_clock_info +ffffffff81e13a80 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81e14000 T radeon_audio_init +ffffffff81e14200 t radeon_audio_enable +ffffffff81e14360 T radeon_audio_endpoint_rreg +ffffffff81e143a0 T radeon_audio_endpoint_wreg +ffffffff81e143e0 T radeon_audio_get_pin +ffffffff81e14430 T radeon_audio_detect +ffffffff81e145d0 T radeon_audio_fini +ffffffff81e14660 T radeon_audio_mode_set +ffffffff81e146b0 T radeon_audio_dpms +ffffffff81e14700 T radeon_audio_decode_dfs_div +ffffffff81e14760 T radeon_audio_component_init +ffffffff81e147d0 T radeon_audio_component_fini +ffffffff81e14820 t radeon_audio_hdmi_mode_set +ffffffff81e14f80 t radeon_audio_write_speaker_allocation +ffffffff81e15060 t radeon_audio_write_sad_regs +ffffffff81e15160 t radeon_audio_set_avi_packet +ffffffff81e152c0 t radeon_audio_dp_mode_set +ffffffff81e15470 t radeon_audio_rreg +ffffffff81e154c0 t radeon_audio_wreg +ffffffff81e16000 T radeon_benchmark +ffffffff81e16c80 t radeon_benchmark_move +ffffffff81e16ff0 t radeon_bo_reserve +ffffffff81e17190 t radeon_bo_unreserve +ffffffff81e172a0 t radeon_benchmark_do_move +ffffffff81e18000 T radeon_get_bios +ffffffff81e190b0 t igp_read_bios_from_vram +ffffffff81e19200 t radeon_read_bios +ffffffff81e1a000 T radeon_legacy_get_engine_clock +ffffffff81e1a0f0 T radeon_legacy_get_memory_clock +ffffffff81e1a1e0 T radeon_get_clock_info +ffffffff81e1a7f0 T radeon_legacy_set_engine_clock +ffffffff81e1ac30 T radeon_legacy_set_clock_gating +ffffffff81e1d000 T radeon_combios_check_hardcoded_edid +ffffffff81e1d120 t combios_get_table_offset +ffffffff81e1d710 T radeon_bios_get_hardcoded_edid +ffffffff81e1d7b0 T radeon_combios_i2c_init +ffffffff81e1dea0 t combios_setup_i2c_bus +ffffffff81e1e190 t radeon_combios_get_i2c_info_from_table +ffffffff81e1e3e0 T radeon_combios_get_clock_info +ffffffff81e1e5d0 T radeon_combios_sideport_present +ffffffff81e1e650 T radeon_combios_get_primary_dac_info +ffffffff81e1e7a0 T radeon_combios_get_tv_info +ffffffff81e1e8b0 T radeon_combios_get_tv_dac_info +ffffffff81e1eb70 T radeon_combios_get_lvds_info +ffffffff81e1f220 T radeon_legacy_get_tmds_info_from_table +ffffffff81e1f2f0 T radeon_legacy_get_tmds_info_from_combios +ffffffff81e1f520 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81e1f760 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81e1fad0 T radeon_get_legacy_connector_info_from_table +ffffffff81e22060 T radeon_get_legacy_connector_info_from_bios +ffffffff81e22da0 T radeon_combios_get_power_modes +ffffffff81e234b0 T radeon_external_tmds_setup +ffffffff81e235a0 T radeon_combios_external_tmds_setup +ffffffff81e23b60 T radeon_combios_asic_init +ffffffff81e24100 t combios_parse_mmio_table +ffffffff81e24340 t combios_parse_pll_table +ffffffff81e246a0 T radeon_combios_initialize_bios_scratch_regs +ffffffff81e24730 T radeon_combios_output_lock +ffffffff81e24790 T radeon_combios_connected_scratch_regs +ffffffff81e24b80 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81e24c60 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81e25000 T radeon_connector_hotplug +ffffffff81e25140 T radeon_get_monitor_bpc +ffffffff81e25610 T radeon_connector_edid +ffffffff81e256d0 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81e25750 T radeon_connector_is_dp12_capable +ffffffff81e257f0 T radeon_add_atom_connector +ffffffff81e26940 T radeon_add_legacy_connector +ffffffff81e26ed0 t radeon_dp_detect +ffffffff81e27320 t radeon_dvi_force +ffffffff81e27370 t radeon_connector_set_property +ffffffff81e27c60 t radeon_connector_unregister +ffffffff81e27cd0 t radeon_connector_destroy +ffffffff81e27d60 t radeon_best_single_encoder +ffffffff81e27dd0 t radeon_connector_get_edid +ffffffff81e27f40 t radeon_dp_get_modes +ffffffff81e282d0 t radeon_dp_mode_valid +ffffffff81e284d0 t radeon_dvi_encoder +ffffffff81e28590 t radeon_fixup_lvds_native_mode +ffffffff81e28700 t radeon_add_common_modes +ffffffff81e28800 t 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radeon_crtc_cursor_move +ffffffff81e2d080 t radeon_lock_cursor +ffffffff81e2d270 t radeon_cursor_move_locked +ffffffff81e2d810 T radeon_crtc_cursor_set2 +ffffffff81e2db30 t radeon_hide_cursor +ffffffff81e2dc00 t radeon_bo_reserve +ffffffff81e2dda0 t radeon_bo_unreserve +ffffffff81e2deb0 t radeon_show_cursor +ffffffff81e2e130 T radeon_cursor_reset +ffffffff81e2f000 T radeon_is_px +ffffffff81e2f040 T radeon_program_register_sequence +ffffffff81e2f190 T radeon_pci_config_reset +ffffffff81e2f1c0 T radeon_surface_init +ffffffff81e2f3d0 T radeon_scratch_init +ffffffff81e2f450 T radeon_scratch_get +ffffffff81e2f4d0 T radeon_scratch_free +ffffffff81e2f530 T radeon_doorbell_get +ffffffff81e2f5e0 T radeon_doorbell_free +ffffffff81e2f630 T radeon_wb_disable +ffffffff81e2f660 T radeon_wb_fini +ffffffff81e2f720 t radeon_bo_reserve +ffffffff81e2f8c0 t radeon_bo_unreserve +ffffffff81e2f9d0 T radeon_wb_init +ffffffff81e2fd60 T radeon_vram_location +ffffffff81e2fea0 T radeon_gtt_location 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radeondrm_detach_kms +ffffffff81e399d0 T radeondrm_activate_kms +ffffffff81e39aa0 T radeondrm_wsioctl +ffffffff81e39b60 T radeondrm_wsmmap +ffffffff81e39b90 T radeondrm_alloc_screen +ffffffff81e39bc0 T radeondrm_free_screen +ffffffff81e39bd0 T radeondrm_show_screen +ffffffff81e39ce0 T radeondrm_enter_ddb +ffffffff81e39d50 T radeondrm_doswitch +ffffffff81e39e00 T radeondrm_setpal +ffffffff81e3a050 T radeondrm_attachhook +ffffffff81e3a420 T radeondrm_forcedetach +ffffffff81e3b000 T radeon_setup_encoder_clones +ffffffff81e3b0b0 T radeon_get_encoder_enum +ffffffff81e3b230 T radeon_link_encoder_connector +ffffffff81e3b390 T radeon_encoder_set_active_device +ffffffff81e3b450 T radeon_get_connector_for_encoder +ffffffff81e3b4c0 T radeon_get_connector_for_encoder_init +ffffffff81e3b530 T radeon_get_external_encoder +ffffffff81e3b5c0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81e3b660 T radeon_panel_mode_fixup +ffffffff81e3b830 T radeon_dig_monitor_is_duallink +ffffffff81e3b960 T radeon_encoder_is_digital +ffffffff81e3c000 T radeon_fbdev_setup +ffffffff81e3c180 T radeon_fbdev_set_suspend +ffffffff81e3c1d0 T radeon_fbdev_robj_is_fb +ffffffff81e3c250 T radeondrm_burner +ffffffff81e3c2e0 T radeondrm_burner_cb +ffffffff81e3c310 t radeon_fbdev_fb_helper_fb_probe +ffffffff81e3c980 t radeon_bo_reserve +ffffffff81e3cb20 t radeon_bo_unreserve +ffffffff81e3cc30 t radeon_fbdev_client_unregister +ffffffff81e3cca0 t radeon_fbdev_client_restore +ffffffff81e3ccf0 t radeon_fbdev_client_hotplug +ffffffff81e3d000 T radeon_fence_emit +ffffffff81e3d140 T radeon_fence_process +ffffffff81e3d220 t radeon_fence_activity +ffffffff81e3d4b0 T radeon_fence_signaled +ffffffff81e3d530 t radeon_fence_seq_signaled +ffffffff81e3d650 T radeon_fence_wait_timeout +ffffffff81e3d790 t radeon_fence_wait_seq_timeout +ffffffff81e3dc70 T radeon_fence_wait +ffffffff81e3ddc0 T radeon_fence_wait_any +ffffffff81e3df10 T radeon_fence_wait_next +ffffffff81e3dfe0 T radeon_fence_wait_empty +ffffffff81e3e100 T radeon_fence_ref +ffffffff81e3e150 T radeon_fence_unref +ffffffff81e3e190 T radeon_fence_count_emitted +ffffffff81e3e2b0 T radeon_fence_need_sync +ffffffff81e3e310 T radeon_fence_note_sync +ffffffff81e3e4e0 T radeon_fence_driver_start_ring +ffffffff81e3e6f0 T radeon_fence_driver_init +ffffffff81e3e840 T radeon_debugfs_fence_init +ffffffff81e3e870 T radeon_fence_driver_fini +ffffffff81e3eaf0 T radeon_fence_driver_force_completion +ffffffff81e3ec00 t radeon_fence_get_driver_name +ffffffff81e3ec30 t radeon_fence_get_timeline_name +ffffffff81e3ecd0 t radeon_fence_enable_signaling +ffffffff81e3ef40 t radeon_fence_is_signaled +ffffffff81e3f0c0 t radeon_fence_default_wait +ffffffff81e3f260 t radeon_fence_any_seq_signaled +ffffffff81e3f3e0 t radeon_fence_check_lockup +ffffffff81e3f690 t __delayed_work_tick +ffffffff81e3f6b0 t radeon_fence_check_signaled +ffffffff81e3f760 t radeon_fence_wait_cb +ffffffff81e40000 T radeon_gart_table_ram_alloc +ffffffff81e400d0 T radeon_gart_table_ram_free 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radeon_gem_set_domain_ioctl +ffffffff81e41ad0 T radeon_mode_dumb_mmap +ffffffff81e41ba0 T radeon_gem_mmap_ioctl +ffffffff81e41c70 T radeon_gem_busy_ioctl +ffffffff81e41d40 T radeon_gem_wait_idle_ioctl +ffffffff81e41e70 T radeon_gem_set_tiling_ioctl +ffffffff81e41f40 T radeon_gem_get_tiling_ioctl +ffffffff81e42040 t radeon_bo_reserve +ffffffff81e42280 t radeon_bo_unreserve +ffffffff81e42390 T radeon_gem_va_ioctl +ffffffff81e42690 t radeon_gem_va_update_vm +ffffffff81e42820 T radeon_gem_op_ioctl +ffffffff81e42930 T radeon_align_pitch +ffffffff81e429c0 T radeon_mode_dumb_create +ffffffff81e42b20 T radeon_gem_debugfs_init +ffffffff81e43000 T radeon_ddc_probe +ffffffff81e430d0 T radeon_router_select_ddc_port +ffffffff81e43370 T radeon_bb_set_bits +ffffffff81e43500 T radeon_bb_set_dir +ffffffff81e43530 T radeon_bb_read_bits +ffffffff81e43620 T radeon_acquire_bus +ffffffff81e43b20 T radeon_release_bus +ffffffff81e43cc0 T radeon_send_start +ffffffff81e43ce0 T radeon_send_stop +ffffffff81e43d00 T radeon_initiate_xfer +ffffffff81e43d20 T radeon_read_byte +ffffffff81e43d40 T radeon_write_byte +ffffffff81e43d60 T radeon_i2c_create +ffffffff81e43fb0 T radeon_i2c_destroy +ffffffff81e44030 T radeon_i2c_init +ffffffff81e44080 T radeon_i2c_fini +ffffffff81e44140 T radeon_i2c_add +ffffffff81e44300 T radeon_i2c_lookup +ffffffff81e444d0 T radeon_i2c_get_byte +ffffffff81e445b0 T radeon_i2c_put_byte +ffffffff81e44650 T radeon_router_select_cd_port +ffffffff81e448f0 t radeon_hw_i2c_xfer +ffffffff81e45600 t radeon_hw_i2c_func +ffffffff81e45630 t r100_hw_i2c_xfer +ffffffff81e45d40 t radeon_get_i2c_prescale +ffffffff81e46000 T radeon_ib_get +ffffffff81e46120 T radeon_ib_free +ffffffff81e46170 T radeon_ib_schedule +ffffffff81e46470 T radeon_ib_pool_init +ffffffff81e46520 T radeon_ib_pool_fini +ffffffff81e465a0 T radeon_ib_ring_tests +ffffffff81e47000 T radeon_driver_irq_handler_kms +ffffffff81e47050 T radeon_msi_ok +ffffffff81e47150 T radeon_irq_kms_init +ffffffff81e47440 t radeon_hotplug_work_func +ffffffff81e47510 t radeon_dp_work_func +ffffffff81e47590 T radeon_irq_kms_fini +ffffffff81e47740 T radeon_irq_kms_sw_irq_get +ffffffff81e477f0 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81e47830 T radeon_irq_kms_sw_irq_put +ffffffff81e478d0 T radeon_irq_kms_pflip_irq_get +ffffffff81e47990 T radeon_irq_kms_pflip_irq_put +ffffffff81e47a40 T radeon_irq_kms_enable_afmt +ffffffff81e47ae0 T radeon_irq_kms_disable_afmt +ffffffff81e47b80 T radeon_irq_kms_enable_hpd +ffffffff81e47c80 T radeon_irq_kms_disable_hpd +ffffffff81e47d70 T radeon_irq_kms_set_irq_n_enabled +ffffffff81e47f00 t __delayed_work_tick +ffffffff81e48000 T radeon_info_ioctl +ffffffff81e48b90 t radeon_set_filp_rights +ffffffff81e48c20 T radeon_driver_open_kms +ffffffff81e48d90 t radeon_bo_reserve +ffffffff81e48f30 T radeon_driver_postclose_kms +ffffffff81e491b0 T radeon_get_vblank_counter_kms +ffffffff81e493a0 T radeon_enable_vblank_kms +ffffffff81e49470 T radeon_disable_vblank_kms +ffffffff81e4a000 T radeon_crtc_set_base +ffffffff81e4a020 T radeon_crtc_do_set_base +ffffffff81e4a650 T radeon_crtc_set_base_atomic +ffffffff81e4a670 t radeon_bo_reserve +ffffffff81e4a810 t radeon_bo_unreserve +ffffffff81e4a920 T radeon_legacy_init_crtc +ffffffff81e4a970 t radeon_crtc_dpms +ffffffff81e4ab80 t radeon_crtc_prepare +ffffffff81e4ac00 t radeon_crtc_commit +ffffffff81e4ac80 t radeon_crtc_mode_fixup +ffffffff81e4aca0 t radeon_crtc_mode_set +ffffffff81e4c380 t radeon_crtc_disable +ffffffff81e4d000 T radeon_legacy_get_backlight_level +ffffffff81e4d050 T radeon_legacy_set_backlight_level +ffffffff81e4d0a0 t radeon_legacy_lvds_update +ffffffff81e4d440 T radeon_legacy_backlight_init +ffffffff81e4d650 t radeon_legacy_backlight_get_brightness +ffffffff81e4d6b0 T radeon_add_legacy_encoder +ffffffff81e4daa0 t radeon_legacy_backlight_update_status +ffffffff81e4db50 t radeon_lvds_enc_destroy +ffffffff81e4dc00 t radeon_legacy_lvds_dpms +ffffffff81e4dc60 t radeon_legacy_mode_fixup +ffffffff81e4dce0 t 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radeon_bo_list_validate +ffffffff81e54300 T radeon_bo_get_surface_reg +ffffffff81e54590 T radeon_bo_set_tiling_flags +ffffffff81e54900 T radeon_bo_get_tiling_flags +ffffffff81e54950 T radeon_bo_move_notify +ffffffff81e54a20 T radeon_bo_fault_reserve_notify +ffffffff81e54ce0 t ttm_bo_move_to_lru_tail_unlocked +ffffffff81e54d30 T radeon_bo_fence +ffffffff81e55000 T radeon_pm_get_type_index +ffffffff81e55080 T radeon_pm_acpi_event_handler +ffffffff81e55190 t radeon_pm_update_profile +ffffffff81e552b0 t radeon_pm_set_clocks +ffffffff81e55da0 T radeon_dpm_enable_uvd +ffffffff81e55e80 T radeon_pm_compute_clocks +ffffffff81e569b0 T radeon_dpm_enable_vce +ffffffff81e56a30 T radeon_pm_suspend +ffffffff81e56b50 T radeon_pm_resume +ffffffff81e56e80 T radeon_pm_init +ffffffff81e57620 T radeon_pm_late_init +ffffffff81e57700 T radeon_pm_fini +ffffffff81e57860 t radeon_dpm_thermal_work_handler +ffffffff81e57960 t radeon_dynpm_idle_work_handler +ffffffff81e57c40 t __delayed_work_tick +ffffffff81e58000 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rv6xx_dpm_get_current_mclk +ffffffff81e80e30 T rv6xx_dpm_fini +ffffffff81e80ed0 T rv6xx_dpm_get_sclk +ffffffff81e80f10 T rv6xx_dpm_get_mclk +ffffffff81e80f50 T rv6xx_dpm_force_performance_level +ffffffff81e81130 t rv6xx_generate_steps +ffffffff81e81470 t rv6xx_output_stepping +ffffffff81e815b0 t rv6xx_program_mclk_stepping_entry +ffffffff81e81860 t rv6xx_program_engine_spread_spectrum +ffffffff81e81ba0 t rv6xx_step_sw_voltage +ffffffff81e82000 T rv730_populate_sclk_value +ffffffff81e82250 T rv730_populate_mclk_value +ffffffff81e824a0 T rv730_read_clock_registers +ffffffff81e825d0 T rv730_populate_smc_acpi_state +ffffffff81e827d0 T rv730_populate_smc_initial_state +ffffffff81e829d0 T rv730_program_memory_timing_parameters +ffffffff81e82bf0 T rv730_start_dpm +ffffffff81e82c80 T rv730_stop_dpm +ffffffff81e82d50 T rv730_program_dcodt +ffffffff81e82e20 T rv730_get_odt_values +ffffffff81e83000 T rv740_get_decoded_reference_divider +ffffffff81e830b0 T rv740_get_dll_speed +ffffffff81e832c0 T rv740_populate_sclk_value +ffffffff81e834e0 T rv740_populate_mclk_value +ffffffff81e838c0 T rv740_read_clock_registers +ffffffff81e83a00 T rv740_populate_smc_acpi_state +ffffffff81e83c70 T rv740_enable_mclk_spread_spectrum +ffffffff81e83cc0 T rv740_get_mclk_frequency_ratio +ffffffff81e84000 T rv770_set_uvd_clocks +ffffffff81e846a0 T rv770_get_xclk +ffffffff81e84700 T rv770_page_flip +ffffffff81e84a60 T rv770_page_flip_pending +ffffffff81e84ae0 T rv770_get_temp +ffffffff81e84b40 T rv770_pm_misc +ffffffff81e84c30 T r700_cp_stop +ffffffff81e84cb0 T r700_cp_fini +ffffffff81e84d40 T rv770_set_clk_bypass_mode +ffffffff81e84e60 T r700_vram_gtt_location +ffffffff81e85010 T rv770_resume +ffffffff81e850d0 t rv770_init_golden_registers +ffffffff81e852d0 t rv770_startup +ffffffff81e870d0 T rv770_suspend +ffffffff81e87330 T rv770_init +ffffffff81e87860 t rv770_pcie_gart_fini +ffffffff81e879f0 T rv770_fini +ffffffff81e87d40 t rv770_uvd_start +ffffffff81e87e20 t rv770_cp_load_microcode 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rv770_program_engine_speed_parameters +ffffffff81e8aa20 T rv770_program_vc +ffffffff81e8aa70 T rv770_clear_vc +ffffffff81e8aab0 T rv770_upload_firmware +ffffffff81e8ab00 T rv770_populate_initial_mvdd_value +ffffffff81e8ab50 T rv770_get_memory_module_index +ffffffff81e8ab90 T rv770_enable_voltage_control +ffffffff81e8abe0 T rv770_halt_smc +ffffffff81e8ac50 T rv770_resume_smc +ffffffff81e8aca0 T rv770_set_sw_state +ffffffff81e8ad00 T rv770_set_boot_state +ffffffff81e8ad50 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81e8adc0 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81e8ae30 T rv770_restrict_performance_levels_before_switch +ffffffff81e8aeb0 T rv770_dpm_force_performance_level +ffffffff81e8af90 T r7xx_start_smc +ffffffff81e8afc0 T r7xx_stop_smc +ffffffff81e8aff0 T rv770_read_voltage_smio_registers +ffffffff81e8b030 T rv770_reset_smio_status +ffffffff81e8b0f0 T rv770_get_memory_type +ffffffff81e8b140 T rv770_get_pcie_gen2_status +ffffffff81e8b1c0 T rv770_get_max_vddc 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rv770_copy_bytes_to_smc +ffffffff81e8f210 T rv770_start_smc +ffffffff81e8f260 T rv770_reset_smc +ffffffff81e8f2b0 T rv770_stop_smc_clock +ffffffff81e8f300 T rv770_start_smc_clock +ffffffff81e8f350 T rv770_is_smc_running +ffffffff81e8f390 T rv770_send_msg_to_smc +ffffffff81e8f480 T rv770_wait_for_smc_inactive +ffffffff81e8f530 T rv770_load_smc_ucode +ffffffff81e8f6e0 T rv770_read_smc_sram_dword +ffffffff81e8f7b0 T rv770_write_smc_sram_dword +ffffffff81e90000 T si_get_allowed_info_register +ffffffff81e90090 T si_get_xclk +ffffffff81e90100 T si_get_temp +ffffffff81e90150 T si_mc_load_microcode +ffffffff81e90440 T dce6_bandwidth_update +ffffffff81e90620 t dce6_line_buffer_adjust +ffffffff81e907e0 t dce6_program_watermarks +ffffffff81e91330 T si_fence_ring_emit +ffffffff81e91800 T si_ring_ib_execute +ffffffff81e92020 T si_gpu_check_soft_reset +ffffffff81e921d0 T si_asic_reset +ffffffff81e925f0 t si_gpu_pci_config_reset +ffffffff81e92960 T si_gfx_is_lockup +ffffffff81e929e0 T si_vram_gtt_location +ffffffff81e92a90 T si_pcie_gart_tlb_flush +ffffffff81e92ae0 T si_ib_parse +ffffffff81e931d0 T si_vm_init +ffffffff81e93210 T si_vm_fini +ffffffff81e93240 T si_vm_flush +ffffffff81e939b0 T si_init_uvd_internal_cg +ffffffff81e93a00 T si_get_csb_size +ffffffff81e93a90 T si_get_csb_buffer +ffffffff81e93c10 T si_rlc_reset +ffffffff81e93c90 T si_irq_set +ffffffff81e94210 t si_disable_interrupt_state +ffffffff81e944b0 T si_irq_process +ffffffff81e95920 t si_irq_ack +ffffffff81e95f40 T si_resume +ffffffff81e96000 t si_init_golden_registers +ffffffff81e96230 t si_startup +ffffffff81e98a60 T si_suspend +ffffffff81e98dc0 t si_fini_cg +ffffffff81e98e80 T si_init +ffffffff81e9a5b0 t si_cp_fini +ffffffff81e9a6e0 t si_irq_fini +ffffffff81e9a7d0 t si_pcie_gart_fini +ffffffff81e9a8e0 T si_fini +ffffffff81e9abc0 T si_get_gpu_clock_counter +ffffffff81e9ac90 T si_set_uvd_clocks +ffffffff81e9b320 T si_set_vce_clocks +ffffffff81e9bac0 t si_vce_send_vcepll_ctlreq +ffffffff81e9be00 t dce6_latency_watermark +ffffffff81e9c040 t si_rlc_stop +ffffffff81e9c220 t si_vm_reg_valid +ffffffff81e9c390 t si_vm_packet3_cp_dma_check +ffffffff81e9c530 t si_uvd_start +ffffffff81e9c610 t si_vce_start +ffffffff81e9c760 t si_irq_init +ffffffff81e9d290 t si_cp_load_microcode +ffffffff81e9d690 t si_cp_resume +ffffffff81e9e6c0 t si_uvd_resume +ffffffff81e9e7a0 t si_vce_resume +ffffffff81e9e8b0 t pcie_capability_set_word +ffffffff81e9e9e0 t pcie_capability_read_word +ffffffff81e9ea90 t pcie_capability_clear_and_set_word +ffffffff81e9ebd0 t pcie_capability_write_word +ffffffff81e9eca0 t si_update_cg +ffffffff81e9f270 t si_enable_mgcg +ffffffff81e9f6d0 t si_enable_cgcg +ffffffff81e9fab0 t request_firmware +ffffffff81e9fb60 t release_firmware +ffffffff81ea0000 T si_dma_is_lockup +ffffffff81ea0090 T si_dma_vm_copy_pages +ffffffff81ea0180 T si_dma_vm_write_pages +ffffffff81ea02f0 T si_dma_vm_set_pages +ffffffff81ea0460 T si_dma_vm_flush +ffffffff81ea0950 T si_copy_dma +ffffffff81ea1000 T si_dpm_force_performance_level +ffffffff81ea1190 T si_get_ddr3_mclk_frequency_ratio +ffffffff81ea11f0 T si_get_mclk_frequency_ratio +ffffffff81ea1270 T si_trim_voltage_table_to_fit_state_table +ffffffff81ea1380 T si_dpm_setup_asic +ffffffff81ea1560 T si_fan_ctrl_get_fan_speed_percent +ffffffff81ea15f0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81ea16b0 T si_fan_ctrl_set_mode +ffffffff81ea1910 T si_fan_ctrl_get_mode +ffffffff81ea1960 T si_dpm_enable +ffffffff81ea2ee0 t si_init_smc_table +ffffffff81ea4190 t si_init_smc_spll_table +ffffffff81ea4330 t si_init_arb_table_index +ffffffff81ea43c0 t si_populate_mc_reg_table +ffffffff81ea4af0 t si_initialize_smc_cac_tables +ffffffff81ea6770 t si_initialize_hardware_cac_manager +ffffffff81ea6840 t si_initialize_smc_dte_tables +ffffffff81ea6b60 t si_populate_smc_tdp_limits +ffffffff81ea6d90 t si_populate_smc_tdp_limits_2 +ffffffff81ea6e80 t si_program_response_times +ffffffff81ea6fd0 t si_program_ds_registers +ffffffff81ea7070 t si_dpm_start_smc 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sumo_dpm_get_current_mclk +ffffffff81eb2460 T sumo_dpm_get_current_vddc +ffffffff81eb2530 T sumo_dpm_fini +ffffffff81eb25d0 T sumo_dpm_get_sclk +ffffffff81eb2620 T sumo_dpm_get_mclk +ffffffff81eb2650 T sumo_dpm_force_performance_level +ffffffff81eb2ad0 t sumo_power_level_enable +ffffffff81eb2d20 t sumo_program_power_level +ffffffff81eb4000 T sumo_initialize_m3_arb +ffffffff81eb43c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81eb4470 t sumo_send_msg_to_smu +ffffffff81eb4640 T sumo_smu_pg_init +ffffffff81eb4660 T sumo_enable_boost_timer +ffffffff81eb47e0 T sumo_set_tdp_limit +ffffffff81eb4860 T sumo_boost_state_enable +ffffffff81eb48b0 T sumo_get_running_fw_version +ffffffff81eb5000 T trinity_dpm_enable_bapm +ffffffff81eb5090 T trinity_dpm_enable +ffffffff81eb5690 T trinity_dpm_late_enable +ffffffff81eb5cc0 T trinity_dpm_disable +ffffffff81eb6160 T trinity_dpm_force_performance_level +ffffffff81eb6230 T trinity_dpm_pre_set_power_state +ffffffff81eb6810 T trinity_dpm_set_power_state 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trinity_acquire_mutex +ffffffff81eb9920 T trinity_release_mutex +ffffffff81eba000 T uvd_v1_0_get_rptr +ffffffff81eba040 T uvd_v1_0_get_wptr +ffffffff81eba080 T uvd_v1_0_set_wptr +ffffffff81eba0c0 T uvd_v1_0_fence_emit +ffffffff81eba500 T uvd_v1_0_resume +ffffffff81eba660 T uvd_v1_0_init +ffffffff81ebac60 T uvd_v1_0_start +ffffffff81ebb600 T uvd_v1_0_fini +ffffffff81ebb7b0 T uvd_v1_0_stop +ffffffff81ebb950 T uvd_v1_0_ring_test +ffffffff81ebbb50 T uvd_v1_0_semaphore_emit +ffffffff81ebbb80 T uvd_v1_0_ib_execute +ffffffff81ebbd30 T uvd_v1_0_ib_test +ffffffff81ebc000 T uvd_v2_2_fence_emit +ffffffff81ebc4d0 T uvd_v2_2_semaphore_emit +ffffffff81ebc700 T uvd_v2_2_resume +ffffffff81ebd000 T uvd_v3_1_semaphore_emit +ffffffff81ebe000 T uvd_v4_2_resume +ffffffff81ebf000 T vce_v1_0_get_rptr +ffffffff81ebf090 T vce_v1_0_get_wptr +ffffffff81ebf120 T vce_v1_0_set_wptr +ffffffff81ebf1b0 T vce_v1_0_enable_mgcg +ffffffff81ebf4b0 T vce_v1_0_load_fw +ffffffff81ebf680 T vce_v1_0_bo_size +ffffffff81ebf6f0 T vce_v1_0_resume +ffffffff81ec0220 T vce_v1_0_start +ffffffff81ec0b40 T vce_v1_0_init +ffffffff81ec1000 T vce_v2_0_enable_mgcg +ffffffff81ec1070 t vce_v2_0_set_dyn_cg +ffffffff81ec1280 T vce_v2_0_bo_size +ffffffff81ec12f0 T vce_v2_0_resume +ffffffff81ec2000 T aldebaran_reset_init +ffffffff81ec20e0 t aldebaran_async_reset +ffffffff81ec2140 t aldebaran_get_reset_handler +ffffffff81ec21e0 T aldebaran_reset_fini +ffffffff81ec2240 t aldebaran_mode2_prepare_hwcontext +ffffffff81ec2380 t aldebaran_mode2_perform_reset +ffffffff81ec2590 t aldebaran_mode2_restore_hwcontext +ffffffff81ec2c10 t aldebaran_mode2_reset +ffffffff81ec3000 T aldebaran_reg_base_init +ffffffff81ec4000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81ec4040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81ec4070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81ec4190 T amdgpu_acpi_pcie_performance_request +ffffffff81ec4580 T amdgpu_acpi_power_shift_control +ffffffff81ec46f0 T amdgpu_acpi_smart_shift_update +ffffffff81ec47a0 T amdgpu_acpi_get_tmr_info +ffffffff81ec4830 T amdgpu_acpi_get_mem_info +ffffffff81ec48f0 T amdgpu_acpi_init +ffffffff81ec49b0 t amdgpu_acpi_event +ffffffff81ec4d30 T amdgpu_acpi_get_backlight_caps +ffffffff81ec4d80 T amdgpu_acpi_fini +ffffffff81ec4da0 T amdgpu_acpi_should_gpu_reset +ffffffff81ec4e00 T amdgpu_acpi_is_s3_active +ffffffff81ec4e40 T amdgpu_acpi_detect +ffffffff81ec5900 T amdgpu_acpi_release +ffffffff81ec5aa0 T amdgpu_acpi_is_s0ix_active +ffffffff81ec6000 T amdgpu_afmt_acr +ffffffff81ec7000 T amdgpu_amdkfd_init +ffffffff81ec7040 T amdgpu_amdkfd_fini +ffffffff81ec7070 T amdgpu_amdkfd_device_probe +ffffffff81ec70a0 T amdgpu_amdkfd_device_init +ffffffff81ec7260 t amdgpu_amdkfd_reset_work +ffffffff81ec72f0 T amdgpu_amdkfd_device_fini_sw +ffffffff81ec7340 T amdgpu_amdkfd_interrupt +ffffffff81ec7370 T amdgpu_amdkfd_suspend +ffffffff81ec73a0 T amdgpu_amdkfd_resume +ffffffff81ec73d0 T amdgpu_amdkfd_pre_reset +ffffffff81ec7400 T amdgpu_amdkfd_post_reset +ffffffff81ec7430 T amdgpu_amdkfd_gpu_reset +ffffffff81ec74a0 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81ec77c0 t amdgpu_bo_reserve +ffffffff81ec7950 t amdgpu_bo_unreserve +ffffffff81ec7a60 T amdgpu_amdkfd_free_gtt_mem +ffffffff81ec7b00 T amdgpu_amdkfd_alloc_gws +ffffffff81ec7c00 T amdgpu_amdkfd_free_gws +ffffffff81ec7c50 T amdgpu_amdkfd_get_fw_version +ffffffff81ec7d00 T amdgpu_amdkfd_get_local_mem_info +ffffffff81ec7eb0 T amdgpu_amdkfd_xcp_memory_size +ffffffff81ec7f50 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81ec7f90 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81ec8000 T amdgpu_amdkfd_get_cu_info +ffffffff81ec8120 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81ec8270 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81ec82f0 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81ec8390 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81ec8510 T amdgpu_amdkfd_submit_ib +ffffffff81ec86b0 T amdgpu_amdkfd_set_compute_idle +ffffffff81ec8700 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81ec8740 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81ec8880 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81ec88c0 T amdgpu_amdkfd_have_atomics_support +ffffffff81ec88f0 T amdgpu_amdkfd_debug_mem_fence +ffffffff81ec8910 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81ec8920 T amdgpu_amdkfd_send_close_event_drain_irq +ffffffff81ec8940 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81ec8990 T amdgpu_amdkfd_check_and_lock_kfd +ffffffff81ec89c0 T amdgpu_amdkfd_unlock_kfd +ffffffff81ec89f0 T amdgpu_amdkfd_unmap_hiq +ffffffff81ec9000 T amdgpu_atom_execute_table +ffffffff81ec90c0 t amdgpu_atom_execute_table_locked +ffffffff81ec9470 T amdgpu_atom_parse +ffffffff81ec9a30 T amdgpu_atom_destroy +ffffffff81ec9a70 T amdgpu_atom_asic_init +ffffffff81ec9ba0 t get_u32 +ffffffff81ec9c00 T amdgpu_atom_parse_data_header +ffffffff81ec9ca0 T amdgpu_atom_parse_cmd_header +ffffffff81ec9d20 t atom_op_move +ffffffff81ec9f50 t atom_op_and +ffffffff81eca170 t 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amdgpu_atombios_scratch_regs_engine_hung +ffffffff81ed0be0 T amdgpu_atombios_scratch_regs_set_backlight_level +ffffffff81ed0c40 T amdgpu_atombios_scratch_need_asic_init +ffffffff81ed0c90 T amdgpu_atombios_copy_swap +ffffffff81ed0cb0 T amdgpu_atombios_sysfs_init +ffffffff81ed0ce0 T amdgpu_atombios_fini +ffffffff81ed0db0 T amdgpu_atombios_init +ffffffff81ed10e0 t cail_reg_read +ffffffff81ed1100 t cail_reg_write +ffffffff81ed1120 t cail_mc_read +ffffffff81ed1150 t cail_mc_write +ffffffff81ed1180 t cail_pll_read +ffffffff81ed11b0 t cail_pll_write +ffffffff81ed11e0 T amdgpu_atombios_get_data_table +ffffffff81ed2000 T amdgpu_atombios_crtc_overscan_setup +ffffffff81ed2160 T amdgpu_atombios_crtc_scaler_setup +ffffffff81ed21e0 T amdgpu_atombios_crtc_lock +ffffffff81ed2250 T amdgpu_atombios_crtc_enable +ffffffff81ed22c0 T amdgpu_atombios_crtc_blank +ffffffff81ed2330 T amdgpu_atombios_crtc_powergate +ffffffff81ed23b0 T amdgpu_atombios_crtc_powergate_init +ffffffff81ed2420 T amdgpu_atombios_crtc_set_dtd_timing +ffffffff81ed2560 T amdgpu_atombios_crtc_set_disp_eng_pll +ffffffff81ed2670 T amdgpu_atombios_crtc_set_dce_clock +ffffffff81ed2770 T amdgpu_atombios_crtc_program_pll +ffffffff81ed2aa0 T amdgpu_atombios_crtc_prepare_pll +ffffffff81ed3030 T amdgpu_atombios_crtc_set_pll +ffffffff81ed4000 T amdgpu_atombios_dp_aux_init +ffffffff81ed4090 t amdgpu_atombios_dp_aux_transfer +ffffffff81ed4230 T amdgpu_atombios_dp_get_sinktype +ffffffff81ed42a0 T amdgpu_atombios_dp_get_dpcd +ffffffff81ed4480 T amdgpu_atombios_dp_get_panel_mode +ffffffff81ed4590 T amdgpu_atombios_dp_set_link_config +ffffffff81ed4620 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81ed47d0 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81ed4860 T amdgpu_atombios_dp_needs_link_train +ffffffff81ed48e0 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81ed4960 T amdgpu_atombios_dp_link_train +ffffffff81ed5020 t amdgpu_atombios_dp_process_aux_ch +ffffffff81ed51b0 t amdgpu_atombios_dp_get_adjust_train +ffffffff81ed6000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81ed6050 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81ed60b0 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81ed6110 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81ed6240 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81ed6d00 T amdgpu_atombios_encoder_init_backlight +ffffffff81ed6ee0 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81ed6f40 T amdgpu_atombios_encoder_fini_backlight +ffffffff81ed6fe0 T amdgpu_atombios_encoder_is_digital +ffffffff81ed7030 T amdgpu_atombios_encoder_mode_fixup +ffffffff81ed7130 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81ed72f0 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81ed7840 t amdgpu_atombios_encoder_get_bpc +ffffffff81ed7890 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81ed79c0 T amdgpu_atombios_encoder_dpms +ffffffff81ed7b40 t amdgpu_atombios_encoder_setup_dig +ffffffff81ed7ff0 t amdgpu_atombios_encoder_setup_dvo +ffffffff81ed81c0 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81ed85e0 T amdgpu_atombios_encoder_init_dig +ffffffff81ed86c0 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81ed8970 T amdgpu_atombios_encoder_dac_detect +ffffffff81ed8b60 T amdgpu_atombios_encoder_dig_detect +ffffffff81ed8c90 T amdgpu_atombios_encoder_setup_ext_encoder_ddc +ffffffff81ed8cf0 T amdgpu_atombios_encoder_set_bios_scratch_regs +ffffffff81ed9330 T amdgpu_atombios_encoder_get_lcd_info +ffffffff81ed96c0 T amdgpu_atombios_encoder_get_dig_info +ffffffff81ed9730 t amdgpu_atombios_encoder_update_backlight_status +ffffffff81eda000 T amdgpu_atombios_i2c_xfer +ffffffff81eda400 T amdgpu_atombios_i2c_func +ffffffff81eda430 T amdgpu_atombios_i2c_channel_trans +ffffffff81edb000 T amdgpu_atomfirmware_query_firmware_capability +ffffffff81edb0a0 T amdgpu_atomfirmware_gpu_virtualization_supported +ffffffff81edb0e0 T amdgpu_atomfirmware_scratch_regs_init +ffffffff81edb160 T amdgpu_atomfirmware_allocate_fb_scratch +ffffffff81edb390 T amdgpu_atomfirmware_get_vram_info +ffffffff81edb8e0 t convert_atom_mem_type_to_vram_type +ffffffff81edb960 T amdgpu_atomfirmware_mem_ecc_supported +ffffffff81edba30 T amdgpu_atomfirmware_sram_ecc_supported +ffffffff81edba70 T amdgpu_atomfirmware_dynamic_boot_config_supported +ffffffff81edbab0 T amdgpu_atomfirmware_ras_rom_addr +ffffffff81edbb60 T amdgpu_atomfirmware_get_clock_info +ffffffff81edbdd0 T amdgpu_atomfirmware_get_gfx_info +ffffffff81edbf60 T amdgpu_atomfirmware_mem_training_supported +ffffffff81edbfa0 T amdgpu_atomfirmware_get_fw_reserved_fb_size +ffffffff81edc030 T amdgpu_atomfirmware_asic_init +ffffffff81edd000 T amdgpu_benchmark +ffffffff81edd940 t amdgpu_benchmark_move +ffffffff81ede000 T amdgpu_read_bios +ffffffff81ede1f0 t check_atom_bios +ffffffff81ede310 T amdgpu_get_bios +ffffffff81ede930 t igp_read_bios_from_vram +ffffffff81edeac0 t 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t dce_v10_0_ext_disable +ffffffff81f7ed60 t dce_v10_0_set_crtc_irq_state +ffffffff81f7ee60 t dce_v10_0_crtc_irq +ffffffff81f7f100 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81f7f1e0 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81f7f2c0 t dce_v10_0_set_pageflip_irq_state +ffffffff81f7f380 t dce_v10_0_pageflip_irq +ffffffff81f7f530 t dce_v10_0_set_hpd_irq_state +ffffffff81f7f620 t dce_v10_0_hpd_irq +ffffffff81f7f770 t dce_v10_0_afmt_init +ffffffff81f7f8a0 t dce_v10_0_audio_init +ffffffff81f7f970 t INIT_DELAYED_WORK +ffffffff81f7f9c0 t dce_v10_0_crtc_cursor_set2 +ffffffff81f7fd20 t dce_v10_0_crtc_cursor_move +ffffffff81f7fe20 t dce_v10_0_crtc_gamma_set +ffffffff81f7fe70 t dce_v10_0_crtc_destroy +ffffffff81f7feb0 t amdgpu_bo_reserve +ffffffff81f800f0 t amdgpu_bo_unreserve +ffffffff81f80200 t dce_v10_0_lock_cursor +ffffffff81f80270 t dce_v10_0_cursor_move_locked +ffffffff81f803e0 t dce_v10_0_show_cursor +ffffffff81f80490 t dce_v10_0_crtc_load_lut +ffffffff81f80930 t dce_v10_0_crtc_dpms +ffffffff81f80ba0 t dce_v10_0_crtc_prepare +ffffffff81f80bf0 t dce_v10_0_crtc_commit +ffffffff81f80c30 t dce_v10_0_crtc_mode_fixup +ffffffff81f80e50 t dce_v10_0_crtc_mode_set +ffffffff81f810b0 t dce_v10_0_crtc_set_base +ffffffff81f810d0 t dce_v10_0_crtc_set_base_atomic +ffffffff81f810f0 t dce_v10_0_crtc_disable +ffffffff81f812c0 t dce_v10_0_crtc_do_set_base +ffffffff81f81af0 t __delayed_work_tick +ffffffff81f81b10 t dce_v10_0_is_display_hung +ffffffff81f82000 T dce_v11_0_disable_dce +ffffffff81f821c0 t dce_v11_0_early_init +ffffffff81f822f0 t dce_v11_0_sw_init +ffffffff81f826c0 t dce_v11_0_sw_fini +ffffffff81f82820 t dce_v11_0_hw_init +ffffffff81f82cd0 t dce_v11_0_hw_fini +ffffffff81f82ec0 t dce_v11_0_suspend +ffffffff81f82f40 t dce_v11_0_resume +ffffffff81f82fd0 t dce_v11_0_is_idle +ffffffff81f83000 t dce_v11_0_wait_for_idle +ffffffff81f83030 t dce_v11_0_soft_reset +ffffffff81f83290 t dce_v11_0_set_clockgating_state +ffffffff81f832c0 t dce_v11_0_set_powergating_state +ffffffff81f832f0 t dce_v11_0_audio_endpt_rreg +ffffffff81f833b0 t dce_v11_0_audio_endpt_wreg +ffffffff81f83440 t dce_v11_0_bandwidth_update +ffffffff81f83f90 t dce_v11_0_vblank_get_counter +ffffffff81f83fe0 t dce_v11_0_hpd_sense +ffffffff81f84040 t dce_v11_0_hpd_set_polarity +ffffffff81f84120 t dce_v11_0_hpd_get_gpio_reg +ffffffff81f84150 t dce_v11_0_page_flip +ffffffff81f84280 t dce_v11_0_crtc_get_scanoutpos +ffffffff81f84330 t dce_v11_0_encoder_add +ffffffff81f845c0 t dce_v11_0_latency_watermark +ffffffff81f847f0 t dce_v11_0_encoder_destroy +ffffffff81f84860 t dce_v11_0_encoder_prepare +ffffffff81f84aa0 t dce_v11_0_encoder_commit +ffffffff81f84ae0 t dce_v11_0_encoder_mode_set +ffffffff81f85da0 t dce_v11_0_encoder_disable +ffffffff81f85ed0 t dce_v11_0_ext_dpms +ffffffff81f85f00 t dce_v11_0_ext_prepare +ffffffff81f85f30 t dce_v11_0_ext_commit +ffffffff81f85f60 t dce_v11_0_ext_mode_set +ffffffff81f85f90 t dce_v11_0_ext_disable +ffffffff81f85fc0 t dce_v11_0_set_crtc_irq_state +ffffffff81f860c0 t dce_v11_0_crtc_irq +ffffffff81f86340 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81f86420 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81f86500 t dce_v11_0_set_pageflip_irq_state +ffffffff81f865c0 t dce_v11_0_pageflip_irq +ffffffff81f86770 t dce_v11_0_set_hpd_irq_state +ffffffff81f86860 t dce_v11_0_hpd_irq +ffffffff81f869b0 t dce_v11_0_afmt_init +ffffffff81f86ae0 t dce_v11_0_audio_init +ffffffff81f86bf0 t INIT_DELAYED_WORK +ffffffff81f86c40 t dce_v11_0_crtc_cursor_set2 +ffffffff81f86fa0 t dce_v11_0_crtc_cursor_move +ffffffff81f870a0 t dce_v11_0_crtc_gamma_set +ffffffff81f870f0 t dce_v11_0_crtc_destroy +ffffffff81f87130 t amdgpu_bo_reserve +ffffffff81f87370 t amdgpu_bo_unreserve +ffffffff81f87480 t dce_v11_0_lock_cursor +ffffffff81f874f0 t dce_v11_0_cursor_move_locked +ffffffff81f87660 t dce_v11_0_show_cursor +ffffffff81f87710 t dce_v11_0_crtc_load_lut +ffffffff81f87b60 t dce_v11_0_crtc_dpms +ffffffff81f87dd0 t dce_v11_0_crtc_prepare +ffffffff81f87e20 t dce_v11_0_crtc_commit +ffffffff81f87e60 t dce_v11_0_crtc_mode_fixup +ffffffff81f88150 t dce_v11_0_crtc_mode_set +ffffffff81f88430 t dce_v11_0_crtc_set_base +ffffffff81f88450 t dce_v11_0_crtc_set_base_atomic +ffffffff81f88470 t dce_v11_0_crtc_disable +ffffffff81f88650 t dce_v11_0_crtc_do_set_base +ffffffff81f88e80 t __delayed_work_tick +ffffffff81f89000 t df_v1_7_sw_init +ffffffff81f89040 t df_v1_7_sw_fini +ffffffff81f89070 t df_v1_7_enable_broadcast_mode +ffffffff81f891a0 t df_v1_7_get_fb_channel_number +ffffffff81f89240 t df_v1_7_get_hbm_channel_number +ffffffff81f892a0 t df_v1_7_update_medium_grain_clock_gating +ffffffff81f89450 t df_v1_7_get_clockgating_state +ffffffff81f894f0 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81f8a000 t df_v3_6_sw_init +ffffffff81f8a160 t df_v3_6_sw_fini +ffffffff81f8a190 t df_v3_6_enable_broadcast_mode +ffffffff81f8a2c0 t df_v3_6_get_fb_channel_number +ffffffff81f8a3c0 t df_v3_6_get_hbm_channel_number +ffffffff81f8a420 t df_v3_6_update_medium_grain_clock_gating +ffffffff81f8a5f0 t df_v3_6_get_clockgating_state +ffffffff81f8a690 t df_v3_6_pmc_start +ffffffff81f8aa20 t df_v3_6_pmc_stop +ffffffff81f8ad60 t df_v3_6_pmc_get_count +ffffffff81f8af40 t df_v3_6_get_fica +ffffffff81f8b090 t df_v3_6_set_fica +ffffffff81f8b1c0 t df_v3_6_query_ras_poison_mode +ffffffff81f8c000 t df_v4_3_query_ras_poison_mode +ffffffff81f8d000 T dimgrey_cavefish_reg_base_init +ffffffff81f8e000 T emu_soc_asic_init +ffffffff81f8f000 t gfx_v10_0_early_init +ffffffff81f8f920 t gfx_v10_0_late_init +ffffffff81f8f990 t gfx_v10_0_sw_init +ffffffff81f8ff50 t gfx_v10_0_sw_fini +ffffffff81f90210 t gfx_v10_0_hw_init +ffffffff81f933f0 t gfx_v10_0_hw_fini +ffffffff81f93500 t gfx_v10_0_suspend +ffffffff81f93540 t gfx_v10_0_resume +ffffffff81f93550 t gfx_v10_0_is_idle +ffffffff81f935f0 t gfx_v10_0_wait_for_idle +ffffffff81f93700 t gfx_v10_0_soft_reset +ffffffff81f93ae0 t gfx_v10_0_set_clockgating_state +ffffffff81f93e60 t gfx_v10_0_set_powergating_state +ffffffff81f93f30 t gfx_v10_0_get_clockgating_state +ffffffff81f94080 t gfx_v10_0_get_gpu_clock_counter +ffffffff81f94600 t gfx_v10_0_select_se_sh +ffffffff81f946a0 t gfx_v10_0_read_wave_data +ffffffff81f94990 t gfx_v10_0_read_wave_vgprs +ffffffff81f949c0 t gfx_v10_0_read_wave_sgprs +ffffffff81f94a40 t gfx_v10_0_select_me_pipe_q +ffffffff81f94a60 t gfx_v10_0_init_spm_golden_registers +ffffffff81f94ad0 t gfx_v10_0_update_perfmon_mgcg +ffffffff81f94c00 t wave_read_ind +ffffffff81f94d00 t wave_read_regs +ffffffff81f94e80 t gfx10_kiq_set_resources +ffffffff81f951e0 t gfx10_kiq_map_queues +ffffffff81f955c0 t gfx10_kiq_unmap_queues +ffffffff81f95a00 t gfx10_kiq_query_status +ffffffff81f95d20 t gfx10_kiq_invalidate_tlbs +ffffffff81f95e50 t gfx_v10_0_ring_get_rptr_compute +ffffffff81f95e80 t gfx_v10_0_ring_get_wptr_compute +ffffffff81f95ef0 t gfx_v10_0_ring_set_wptr_compute +ffffffff81f96050 t gfx_v10_0_ring_emit_ib_compute +ffffffff81f963d0 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81f96850 t gfx_v10_0_ring_test_ring +ffffffff81f96b00 t gfx_v10_0_ring_test_ib +ffffffff81f96de0 t gfx_v10_0_ring_emit_rreg +ffffffff81f970a0 t gfx_v10_0_ring_emit_wreg +ffffffff81f97300 t gfx_v10_0_ring_emit_reg_wait +ffffffff81f97360 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81f97400 t gfx_v10_0_wait_reg_mem +ffffffff81f97760 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81f97790 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81f978b0 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81f97af0 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81f981e0 t gfx_v10_0_ring_emit_fence +ffffffff81f985f0 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81f98660 t gfx_v10_0_ring_emit_vm_flush +ffffffff81f98850 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81f98940 t gfx_v10_0_ring_emit_gds_switch +ffffffff81f98a40 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81f98c90 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81f98d50 t gfx_v10_0_ring_emit_sb +ffffffff81f98e40 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81f99370 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81f99480 t gfx_v10_0_ring_soft_recovery +ffffffff81f994f0 t gfx_v10_0_ring_preempt_ib +ffffffff81f996a0 t gfx_v10_0_emit_mem_sync +ffffffff81f99a10 t gfx_v10_0_write_data_to_reg +ffffffff81f99c40 t gfx_v10_0_set_eop_interrupt_state +ffffffff81f99d40 t gfx_v10_0_eop_irq +ffffffff81f99f20 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81f9a0e0 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81f9a2c0 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81f9a630 t gfx_v10_0_kiq_irq +ffffffff81f9a6c0 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81f9a810 t gfx_v10_0_priv_reg_irq +ffffffff81f9a880 t gfx_v10_0_handle_priv_fault +ffffffff81f9a9f0 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81f9ab40 t gfx_v10_0_priv_inst_irq +ffffffff81f9abb0 t gfx_v10_0_is_rlc_enabled +ffffffff81f9ac50 t gfx_v10_0_set_safe_mode +ffffffff81f9af50 t gfx_v10_0_unset_safe_mode +ffffffff81f9b000 t gfx_v10_0_rlc_init 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gfx_v10_0_get_rb_active_bitmap +ffffffff81fa1a10 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81fa1b30 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81fa1c40 t gfx_v10_0_cp_gfx_enable +ffffffff81fa1ee0 t gfx_v10_0_cp_compute_enable +ffffffff81fa20a0 t amdgpu_bo_reserve +ffffffff81fa2240 t gfx_v10_0_kiq_init_register +ffffffff81fa3330 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81fa3430 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81fa3760 t gfx_v10_0_cp_gfx_start +ffffffff81fa4250 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81fa45e0 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81fa4de0 t gfx_v10_0_update_3d_clock_gating +ffffffff81fa5210 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81fa5640 t gfx_v10_cntl_pg +ffffffff81fa6000 t gfx_v11_0_early_init +ffffffff81fa6870 t gfx_v11_0_late_init +ffffffff81fa68e0 t gfx_v11_0_sw_init +ffffffff81fa6ee0 t gfx_v11_0_sw_fini +ffffffff81fa7190 t gfx_v11_0_hw_init +ffffffff81fabd40 t gfx_v11_0_hw_fini +ffffffff81fabea0 t gfx_v11_0_suspend +ffffffff81fabee0 t gfx_v11_0_resume +ffffffff81fabef0 t gfx_v11_0_is_idle +ffffffff81fabf90 t gfx_v11_0_wait_for_idle +ffffffff81fac0a0 t gfx_v11_0_check_soft_reset +ffffffff81fac1e0 t gfx_v11_0_soft_reset +ffffffff81fad0b0 t gfx_v11_0_post_soft_reset +ffffffff81fad0c0 t gfx_v11_0_set_clockgating_state +ffffffff81fade20 t gfx_v11_0_set_powergating_state +ffffffff81faded0 t gfx_v11_0_get_clockgating_state +ffffffff81fae0c0 t gfx_v11_0_get_gpu_clock_counter +ffffffff81fae4b0 t gfx_v11_0_select_se_sh +ffffffff81fae550 t gfx_v11_0_read_wave_data +ffffffff81fae820 t gfx_v11_0_read_wave_vgprs +ffffffff81fae850 t gfx_v11_0_read_wave_sgprs +ffffffff81fae8d0 t gfx_v11_0_select_me_pipe_q +ffffffff81fae8f0 t gfx_v11_0_update_perf_clk +ffffffff81faea30 t gfx_v11_0_get_gfx_shadow_info +ffffffff81faeaa0 t wave_read_ind +ffffffff81faeba0 t wave_read_regs +ffffffff81faed20 t gfx11_kiq_set_resources +ffffffff81faf080 t gfx11_kiq_map_queues +ffffffff81faf460 t gfx11_kiq_unmap_queues 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gfx_v11_0_ring_emit_vm_flush +ffffffff81fb2710 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81fb2800 t gfx_v11_0_ring_emit_gds_switch +ffffffff81fb2900 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81fb2b50 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81fb2c10 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81fb2d90 t gfx_v11_0_ring_emit_gfx_shadow +ffffffff81fb31a0 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81fb32b0 t gfx_v11_0_ring_soft_recovery +ffffffff81fb3320 t gfx_v11_0_ring_preempt_ib +ffffffff81fb34d0 t gfx_v11_0_emit_mem_sync +ffffffff81fb3840 t gfx_v11_0_write_data_to_reg +ffffffff81fb3a70 t gfx_v11_0_set_eop_interrupt_state +ffffffff81fb3b10 t gfx_v11_0_eop_irq +ffffffff81fb3cf0 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81fb3eb0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81fb4060 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81fb41b0 t gfx_v11_0_priv_reg_irq +ffffffff81fb4220 t gfx_v11_0_handle_priv_fault +ffffffff81fb4390 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81fb44e0 t gfx_v11_0_priv_inst_irq +ffffffff81fb4550 t gfx_v11_0_rlc_gc_fed_irq +ffffffff81fb45a0 t gfx_v11_0_is_rlc_enabled +ffffffff81fb4640 t gfx_v11_0_set_safe_mode +ffffffff81fb47c0 t gfx_v11_0_unset_safe_mode +ffffffff81fb4830 t gfx_v11_0_rlc_init +ffffffff81fb48b0 t gfx_v11_0_get_csb_size +ffffffff81fb48e0 t gfx_v11_0_get_csb_buffer +ffffffff81fb4a50 t gfx_v11_0_rlc_resume +ffffffff81fb5900 t gfx_v11_0_rlc_stop +ffffffff81fb59e0 t gfx_v11_0_rlc_reset +ffffffff81fb5bd0 t gfx_v11_0_rlc_start +ffffffff81fb5dc0 t gfx_v11_0_update_spm_vmid +ffffffff81fb5ee0 t gfx_v11_0_init_csb +ffffffff81fb60a0 t gfx_v11_0_gfx_mqd_init +ffffffff81fb64d0 t gfx_v11_0_compute_mqd_init +ffffffff81fb6a70 t gfx_v11_0_mec_init +ffffffff81fb6c00 t gfx_v11_0_compute_ring_init +ffffffff81fb6d60 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff81fb6f60 t gfx_v11_0_gpu_early_init +ffffffff81fb7030 t amdgpu_bo_unreserve +ffffffff81fb7140 t gfx_v11_0_disable_gpa_mode +ffffffff81fb7300 t gfx_v11_0_cp_resume +ffffffff81fbba60 t gfx_v11_0_config_me_cache +ffffffff81fbbe80 t gfx_v11_0_config_pfp_cache +ffffffff81fbc2a0 t gfx_v11_0_config_mec_cache +ffffffff81fbc6c0 t gfx_v11_0_get_sa_active_bitmap +ffffffff81fbc7f0 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81fbc900 t gfx_v11_0_cp_compute_enable +ffffffff81fbcb00 t gfx_v11_0_cp_gfx_enable +ffffffff81fbcd30 t amdgpu_bo_reserve +ffffffff81fbced0 t gfx_v11_0_kiq_init_register +ffffffff81fbdfd0 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81fbe0c0 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81fbe2d0 t gfx_v11_0_cp_gfx_start +ffffffff81fbec20 t gfx_v11_cntl_pg +ffffffff81fbf000 t gfx_v11_0_3_rlc_gc_fed_irq +ffffffff81fbf240 t gfx_v11_0_3_poison_consumption_handler +ffffffff81fc0000 t gfx_v8_0_early_init +ffffffff81fc0310 t gfx_v8_0_late_init +ffffffff81fc0ad0 t gfx_v8_0_sw_init +ffffffff81fc0f30 t gfx_v8_0_sw_fini +ffffffff81fc1140 t gfx_v8_0_hw_init +ffffffff81fc3720 t gfx_v8_0_hw_fini +ffffffff81fc3cb0 t gfx_v8_0_suspend +ffffffff81fc3cf0 t gfx_v8_0_resume +ffffffff81fc3d00 t gfx_v8_0_is_idle +ffffffff81fc3d80 t gfx_v8_0_wait_for_idle +ffffffff81fc3e50 t gfx_v8_0_check_soft_reset +ffffffff81fc3f50 t gfx_v8_0_pre_soft_reset +ffffffff81fc4110 t gfx_v8_0_soft_reset +ffffffff81fc4360 t gfx_v8_0_post_soft_reset +ffffffff81fc4550 t gfx_v8_0_set_clockgating_state +ffffffff81fc4830 t gfx_v8_0_set_powergating_state +ffffffff81fc4ce0 t gfx_v8_0_get_clockgating_state +ffffffff81fc4df0 t gfx_v8_0_get_gpu_clock_counter +ffffffff81fc4eb0 t gfx_v8_0_select_se_sh +ffffffff81fc4f10 t gfx_v8_0_read_wave_data +ffffffff81fc5510 t gfx_v8_0_read_wave_sgprs +ffffffff81fc55e0 t gfx_v8_0_select_me_pipe_q +ffffffff81fc5600 t gfx_v8_0_ring_get_rptr +ffffffff81fc5630 t gfx_v8_0_ring_get_wptr_compute +ffffffff81fc5660 t gfx_v8_0_ring_set_wptr_compute +ffffffff81fc56a0 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81fc5b10 t gfx_v8_0_ring_test_ring +ffffffff81fc5d50 t gfx_v8_0_ring_emit_rreg +ffffffff81fc6010 t gfx_v8_0_ring_emit_wreg +ffffffff81fc6270 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81fc62d0 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81fc6350 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81fc6910 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81fc6e60 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81fc7180 t gfx_v8_0_ring_emit_vm_flush +ffffffff81fc7580 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81fc78d0 t gfx_v8_0_ring_emit_gds_switch +ffffffff81fc8130 t gfx_v8_0_ring_test_ib +ffffffff81fc8320 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81fc8570 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81fc8620 t gfx_v8_ring_emit_sb +ffffffff81fc8710 t gfx_v8_ring_emit_cntxcntl +ffffffff81fc8d10 t gfx_v8_0_ring_soft_recovery +ffffffff81fc8d40 t gfx_v8_0_emit_mem_sync +ffffffff81fc8f60 t gfx_v8_0_ring_emit_ib_compute +ffffffff81fc92a0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81fc95d0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81fc98c0 t gfx_v8_0_emit_wave_limit +ffffffff81fc9a90 t gfx_v8_0_set_eop_interrupt_state +ffffffff81fc9d10 t gfx_v8_0_eop_irq +ffffffff81fc9e40 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81fc9ed0 t gfx_v8_0_priv_reg_irq +ffffffff81fc9ff0 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81fca080 t gfx_v8_0_priv_inst_irq +ffffffff81fca1a0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81fca4e0 t gfx_v8_0_cp_ecc_error_irq +ffffffff81fca530 t gfx_v8_0_set_sq_int_state +ffffffff81fca5c0 t gfx_v8_0_sq_irq +ffffffff81fca640 t gfx_v8_0_parse_sq_irq +ffffffff81fca8c0 t gfx_v8_0_is_rlc_enabled +ffffffff81fca910 t gfx_v8_0_set_safe_mode +ffffffff81fcaa40 t gfx_v8_0_unset_safe_mode +ffffffff81fcab00 t gfx_v8_0_rlc_init +ffffffff81fcabc0 t gfx_v8_0_get_csb_size +ffffffff81fcabf0 t gfx_v8_0_get_csb_buffer +ffffffff81fcad60 t gfx_v8_0_cp_jump_table_num +ffffffff81fcada0 t gfx_v8_0_rlc_resume +ffffffff81fcb250 t gfx_v8_0_rlc_stop +ffffffff81fcb2e0 t gfx_v8_0_rlc_reset +ffffffff81fcb390 t gfx_v8_0_rlc_start +ffffffff81fcb430 t gfx_v8_0_update_spm_vmid +ffffffff81fcb4c0 t gfx_v8_0_init_save_restore_list +ffffffff81fcb9a0 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81fcbc10 t gfx_v8_0_sq_irq_work_func +ffffffff81fcbc30 t gfx_v8_0_init_microcode +ffffffff81fcc5c0 t gfx_v8_0_mec_init +ffffffff81fcc6f0 t gfx_v8_0_compute_ring_init +ffffffff81fcc840 t gfx_v8_0_gpu_early_init +ffffffff81fccd10 t amdgpu_bo_unreserve +ffffffff81fcce20 t gfx_v8_0_kiq_resume +ffffffff81fcd170 t gfx_v8_0_cp_gfx_resume +ffffffff81fcddb0 t gfx_v8_0_kcq_resume +ffffffff81fce8c0 t amdgpu_bo_reserve +ffffffff81fcea60 t gfx_v8_0_mqd_commit +ffffffff81fcecd0 t gfx_v8_0_mqd_init +ffffffff81fcf1e0 t gfx_v8_0_deactivate_hqd +ffffffff81fcf2e0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81fcf6f0 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81fd0000 t gfx_v9_0_ras_error_inject +ffffffff81fd01e0 t gfx_v9_0_query_ras_error_count +ffffffff81fd0f10 t gfx_v9_0_reset_ras_error_count +ffffffff81fd1ab0 T gfx_v9_0_select_se_sh +ffffffff81fd1b50 t gfx_v9_0_early_init +ffffffff81fd2790 t gfx_v9_0_late_init +ffffffff81fd3770 t gfx_v9_0_sw_init +ffffffff81fd3f50 t gfx_v9_0_sw_fini +ffffffff81fd41b0 t gfx_v9_0_hw_init +ffffffff81fd7720 t gfx_v9_0_hw_fini +ffffffff81fd7fe0 t gfx_v9_0_suspend +ffffffff81fd8020 t gfx_v9_0_resume +ffffffff81fd8030 t gfx_v9_0_is_idle +ffffffff81fd80d0 t gfx_v9_0_wait_for_idle +ffffffff81fd81d0 t gfx_v9_0_soft_reset +ffffffff81fd85e0 t gfx_v9_0_set_clockgating_state +ffffffff81fd86e0 t gfx_v9_0_set_powergating_state +ffffffff81fd8b40 t gfx_v9_0_get_clockgating_state +ffffffff81fd8c80 t gfx_v9_0_get_gpu_clock_counter +ffffffff81fd9560 t gfx_v9_0_read_wave_data +ffffffff81fd9830 t gfx_v9_0_read_wave_vgprs +ffffffff81fd98a0 t gfx_v9_0_read_wave_sgprs +ffffffff81fd98d0 t gfx_v9_0_select_me_pipe_q +ffffffff81fd98f0 t wave_read_ind +ffffffff81fd9a00 t wave_read_regs +ffffffff81fd9b70 t gfx_v9_0_kiq_set_resources +ffffffff81fd9ed0 t gfx_v9_0_kiq_map_queues +ffffffff81fda250 t gfx_v9_0_kiq_unmap_queues +ffffffff81fda5c0 t gfx_v9_0_kiq_query_status +ffffffff81fda8e0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81fdaa10 t gfx_v9_0_ring_get_rptr_compute +ffffffff81fdaa40 t gfx_v9_0_ring_get_wptr_compute +ffffffff81fdaab0 t gfx_v9_0_ring_set_wptr_compute +ffffffff81fdab10 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81fdaf90 t gfx_v9_0_ring_test_ring +ffffffff81fdb200 t gfx_v9_0_ring_emit_rreg +ffffffff81fdb4c0 t gfx_v9_0_ring_emit_wreg +ffffffff81fdb720 t gfx_v9_0_ring_emit_reg_wait +ffffffff81fdb780 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81fdb820 t gfx_v9_0_wait_reg_mem +ffffffff81fdbb80 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81fdbbb0 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81fdbcd0 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81fdbe10 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81fdc500 t gfx_v9_0_ring_emit_fence +ffffffff81fdc900 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81fdc970 t gfx_v9_0_ring_emit_vm_flush +ffffffff81fdca90 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81fdcb80 t gfx_v9_0_ring_emit_gds_switch +ffffffff81fdcc80 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81fdced0 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81fdcf90 t gfx_v9_ring_emit_sb +ffffffff81fdd080 t gfx_v9_ring_emit_cntxcntl +ffffffff81fdd5c0 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81fdd6d0 t gfx_v9_0_ring_soft_recovery +ffffffff81fdd740 t gfx_v9_0_ring_preempt_ib +ffffffff81fdd970 t gfx_v9_0_emit_mem_sync +ffffffff81fddc60 t gfx_v9_0_write_data_to_reg +ffffffff81fdde90 t gfx_v9_0_ring_test_ib +ffffffff81fde080 t gfx_v9_0_ring_patch_cntl +ffffffff81fde0c0 t gfx_v9_0_ring_patch_ce_meta +ffffffff81fde1d0 t gfx_v9_0_ring_patch_de_meta +ffffffff81fde2a0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81fde600 t gfx_v9_0_emit_wave_limit +ffffffff81fde800 t gfx_v9_0_set_eop_interrupt_state +ffffffff81fdea00 t gfx_v9_0_eop_irq +ffffffff81fdeb70 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81fded50 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81fdeea0 t gfx_v9_0_priv_reg_irq +ffffffff81fdefc0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81fdf110 t gfx_v9_0_priv_inst_irq +ffffffff81fdf230 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81fdfc20 t gfx_v9_0_is_rlc_enabled +ffffffff81fdfcc0 t gfx_v9_0_set_safe_mode +ffffffff81fdfe40 t gfx_v9_0_unset_safe_mode +ffffffff81fdfeb0 t gfx_v9_0_rlc_init +ffffffff81fdff30 t gfx_v9_0_get_csb_size +ffffffff81fdff60 t gfx_v9_0_get_csb_buffer +ffffffff81fe00a0 t gfx_v9_0_cp_jump_table_num +ffffffff81fe00f0 t gfx_v9_0_rlc_resume +ffffffff81fe1b20 t gfx_v9_0_rlc_stop +ffffffff81fe1f40 t gfx_v9_0_rlc_reset +ffffffff81fe2120 t gfx_v9_0_rlc_start +ffffffff81fe22a0 t gfx_v9_0_update_spm_vmid +ffffffff81fe22f0 t gfx_v9_0_is_rlcg_access_range +ffffffff81fe2340 t gfx_v9_0_init_csb +ffffffff81fe2500 t gfx_v9_0_enable_lbpw +ffffffff81fe2610 t gfx_v9_0_update_spm_vmid_internal +ffffffff81fe2740 t gfx_v9_0_init_always_on_cu_mask +ffffffff81fe2a00 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81fe2b10 t gfx_v9_0_mec_init +ffffffff81fe2d70 t gfx_v9_0_compute_ring_init +ffffffff81fe2ed0 t gfx_v9_0_gpu_early_init +ffffffff81fe3340 t amdgpu_bo_unreserve +ffffffff81fe3450 t gfx_v9_0_cp_gfx_enable +ffffffff81fe3550 t amdgpu_bo_reserve +ffffffff81fe36f0 t gfx_v9_0_kiq_init_register +ffffffff81fe4560 t gfx_v9_0_mqd_init +ffffffff81fe4b30 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81fe50e0 t gfx_v9_0_update_3d_clock_gating +ffffffff81fe5540 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81fe6000 t gfx_v9_4_query_ras_error_count +ffffffff81fe6ef0 t gfx_v9_4_query_ras_error_status +ffffffff81fe70f0 t gfx_v9_4_reset_ras_error_count +ffffffff81fe8000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81fe8890 T gfx_v9_4_2_init_golden_registers +ffffffff81fe8930 T gfx_v9_4_2_debug_trap_config_init +ffffffff81fe8a50 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81fe8c70 t gfx_v9_4_2_query_ras_error_count +ffffffff81fe8d40 t gfx_v9_4_2_query_ras_error_status +ffffffff81fe96e0 t gfx_v9_4_2_reset_ras_error_count +ffffffff81fe9750 t gfx_v9_4_2_reset_ras_error_status +ffffffff81fe9cb0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81fe9f10 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81fe9fb0 t gfx_v9_4_2_run_shader +ffffffff81fea3e0 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81feaac0 t gfx_v9_4_2_query_sram_edc_count +ffffffff81feae30 t gfx_v9_4_2_query_utc_edc_count +ffffffff81feb020 t wave_read_ind +ffffffff81fec000 t gfx_v9_4_3_xcp_suspend +ffffffff81fec0b0 t gfx_v9_4_3_xcp_resume +ffffffff81fec250 t gfx_v9_4_3_query_ras_error_count +ffffffff81fec270 t gfx_v9_4_3_query_ras_error_status +ffffffff81fec290 t gfx_v9_4_3_reset_ras_error_count +ffffffff81fec2b0 t gfx_v9_4_3_reset_ras_error_status +ffffffff81fec2d0 t gfx_v9_4_3_enable_watchdog_timer +ffffffff81fec2f0 t gfx_v9_4_3_early_init +ffffffff81feca60 t gfx_v9_4_3_late_init +ffffffff81fecaf0 t gfx_v9_4_3_sw_init +ffffffff81fecfe0 t gfx_v9_4_3_sw_fini +ffffffff81fed210 t gfx_v9_4_3_hw_init +ffffffff81fee090 t gfx_v9_4_3_hw_fini +ffffffff81fee170 t gfx_v9_4_3_suspend +ffffffff81fee250 t gfx_v9_4_3_resume +ffffffff81fee260 t gfx_v9_4_3_is_idle +ffffffff81fee450 t gfx_v9_4_3_wait_for_idle +ffffffff81fee4f0 t gfx_v9_4_3_soft_reset +ffffffff81feed30 t gfx_v9_4_3_set_clockgating_state +ffffffff81feeef0 t gfx_v9_4_3_set_powergating_state +ffffffff81feef20 t gfx_v9_4_3_get_clockgating_state +ffffffff81fef0d0 t gfx_v9_4_3_kiq_set_resources +ffffffff81fef430 t gfx_v9_4_3_kiq_map_queues +ffffffff81fef7d0 t gfx_v9_4_3_kiq_unmap_queues +ffffffff81fefb90 t gfx_v9_4_3_kiq_query_status +ffffffff81fefeb0 t gfx_v9_4_3_kiq_invalidate_tlbs +ffffffff81feffe0 t gfx_v9_4_3_ring_get_rptr_compute +ffffffff81ff0020 t gfx_v9_4_3_ring_get_wptr_compute +ffffffff81ff0090 t gfx_v9_4_3_ring_set_wptr_compute +ffffffff81ff00f0 t gfx_v9_4_3_ring_emit_fence_kiq +ffffffff81ff0590 t gfx_v9_4_3_ring_test_ring +ffffffff81ff0830 t gfx_v9_4_3_ring_emit_rreg +ffffffff81ff0af0 t gfx_v9_4_3_ring_emit_wreg +ffffffff81ff0d50 t gfx_v9_4_3_ring_emit_reg_wait +ffffffff81ff0db0 t gfx_v9_4_3_ring_emit_reg_write_reg_wait +ffffffff81ff0dd0 t gfx_v9_4_3_wait_reg_mem +ffffffff81ff1130 t gfx_v9_4_3_ring_emit_ib_compute +ffffffff81ff1490 t gfx_v9_4_3_ring_emit_fence +ffffffff81ff1880 t gfx_v9_4_3_ring_emit_pipeline_sync +ffffffff81ff18f0 t gfx_v9_4_3_ring_emit_vm_flush +ffffffff81ff1910 t gfx_v9_4_3_ring_emit_hdp_flush +ffffffff81ff1a00 t gfx_v9_4_3_ring_emit_gds_switch +ffffffff81ff1be0 t gfx_v9_4_3_ring_test_ib +ffffffff81ff1dd0 t gfx_v9_4_3_emit_mem_sync +ffffffff81ff20c0 t gfx_v9_4_3_emit_wave_limit +ffffffff81ff22d0 t gfx_v9_4_3_write_data_to_reg +ffffffff81ff2500 t gfx_v9_4_3_set_eop_interrupt_state +ffffffff81ff2680 t gfx_v9_4_3_eop_irq +ffffffff81ff2830 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state +ffffffff81ff29b0 t gfx_v9_4_3_ih_to_xcc_inst +ffffffff81ff2a90 t gfx_v9_4_3_set_priv_reg_fault_state +ffffffff81ff2ef0 t gfx_v9_4_3_priv_reg_irq +ffffffff81ff2f60 t gfx_v9_4_3_fault +ffffffff81ff30e0 t gfx_v9_4_3_set_priv_inst_fault_state +ffffffff81ff3540 t gfx_v9_4_3_priv_inst_irq +ffffffff81ff35b0 t gfx_v9_4_3_is_rlc_enabled +ffffffff81ff3700 t gfx_v9_4_3_xcc_set_safe_mode +ffffffff81ff3a10 t gfx_v9_4_3_xcc_unset_safe_mode +ffffffff81ff3b50 t gfx_v9_4_3_rlc_init +ffffffff81ff3bb0 t gfx_v9_4_3_rlc_resume +ffffffff81ff3c70 t gfx_v9_4_3_rlc_stop +ffffffff81ff3d20 t gfx_v9_4_3_rlc_reset +ffffffff81ff44a0 t gfx_v9_4_3_rlc_start +ffffffff81ff4550 t gfx_v9_4_3_update_spm_vmid +ffffffff81ff47b0 t gfx_v9_4_3_is_rlcg_access_range +ffffffff81ff4880 t gfx_v9_4_3_xcc_rlc_resume +ffffffff81ff5240 t gfx_v9_4_3_xcc_rlc_stop +ffffffff81ff5aa0 t gfx_v9_4_3_xcc_rlc_start +ffffffff81ff5eb0 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt +ffffffff81ff6110 t gfx_v9_4_3_xcc_select_se_sh +ffffffff81ff6340 t gfx_v9_4_3_mec_init +ffffffff81ff66b0 t gfx_v9_4_3_gpu_early_init +ffffffff81ff6900 t amdgpu_bo_unreserve +ffffffff81ff6a10 t gfx_v9_4_3_get_gpu_clock_counter +ffffffff81ff6de0 t gfx_v9_4_3_read_wave_data +ffffffff81ff7140 t gfx_v9_4_3_read_wave_vgprs +ffffffff81ff7160 t gfx_v9_4_3_read_wave_sgprs +ffffffff81ff71c0 t gfx_v9_4_3_select_me_pipe_q +ffffffff81ff7240 t gfx_v9_4_3_switch_compute_partition +ffffffff81ff75f0 t wave_read_ind +ffffffff81ff7830 t wave_read_regs +ffffffff81ff7b10 t gfx_v9_4_3_xcc_constants_init +ffffffff81ff8e80 t gfx_v9_4_3_xcc_cp_resume +ffffffff81ffa120 t gfx_v9_4_3_xcc_cp_compute_enable +ffffffff81ffa300 t amdgpu_bo_reserve +ffffffff81ffa4a0 t gfx_v9_4_3_xcc_kiq_init_register +ffffffff81ffc540 t gfx_v9_4_3_xcc_mqd_init +ffffffff81ffd0e0 t gfx_v9_4_3_xcc_fini +ffffffff81ffd760 t gfx_v9_4_3_xcc_q_fini_register +ffffffff81ffe2c0 t gfx_v9_4_3_xcc_update_sram_fgcg +ffffffff81ffe570 t gfx_v9_4_3_xcc_update_repeater_fgcg +ffffffff81ffe820 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating +ffffffff81fff510 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating +ffffffff81fffea0 t gfx_v9_4_3_inst_query_ras_err_count +ffffffff82000150 t gfx_v9_4_3_inst_query_ras_err_status +ffffffff82001140 t gfx_v9_4_3_inst_reset_ras_err_count +ffffffff82001330 t gfx_v9_4_3_inst_reset_ras_err_status +ffffffff82001bd0 t gfx_v9_4_3_inst_enable_watchdog_timer +ffffffff82002000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff820020a0 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff820021f0 t gfxhub_v1_0_gart_enable +ffffffff820039c0 t gfxhub_v1_0_gart_disable +ffffffff82003cb0 t gfxhub_v1_0_set_fault_enable_default +ffffffff82003db0 t gfxhub_v1_0_init +ffffffff82004000 T gfxhub_v1_1_get_xgmi_info +ffffffff82005000 t gfxhub_v1_2_get_mc_fb_offset +ffffffff82005150 t gfxhub_v1_2_setup_vm_pt_regs +ffffffff820051c0 t gfxhub_v1_2_gart_enable +ffffffff82005250 t gfxhub_v1_2_gart_disable +ffffffff820052b0 t gfxhub_v1_2_set_fault_enable_default +ffffffff82005320 t gfxhub_v1_2_init +ffffffff82005680 t gfxhub_v1_2_get_xgmi_info +ffffffff82005930 t gfxhub_v1_2_xcp_suspend +ffffffff82005980 t gfxhub_v1_2_xcp_resume +ffffffff82005a00 t gfxhub_v1_2_xcc_setup_vm_pt_regs +ffffffff82005d60 t gfxhub_v1_2_xcc_gart_enable +ffffffff820099d0 t gfxhub_v1_2_xcc_gart_disable +ffffffff8200a130 t gfxhub_v1_2_xcc_set_fault_enable_default +ffffffff8200b000 t gfxhub_v2_0_get_fb_location +ffffffff8200b0a0 t gfxhub_v2_0_get_mc_fb_offset +ffffffff8200b140 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff8200b290 t gfxhub_v2_0_gart_enable +ffffffff8200c730 t gfxhub_v2_0_gart_disable +ffffffff8200c9a0 t gfxhub_v2_0_set_fault_enable_default +ffffffff8200caa0 t gfxhub_v2_0_init +ffffffff8200cb70 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff8200cd90 t gfxhub_v2_0_get_invalidate_req +ffffffff8200d000 t gfxhub_v2_1_get_fb_location +ffffffff8200d0a0 t gfxhub_v2_1_get_mc_fb_offset +ffffffff8200d140 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff8200d290 t gfxhub_v2_1_gart_enable +ffffffff8200e830 t gfxhub_v2_1_gart_disable +ffffffff8200eaa0 t gfxhub_v2_1_set_fault_enable_default +ffffffff8200ebc0 t gfxhub_v2_1_init +ffffffff8200ec90 t gfxhub_v2_1_get_xgmi_info +ffffffff8200edf0 t gfxhub_v2_1_utcl2_harvest +ffffffff8200efe0 t gfxhub_v2_1_save_regs +ffffffff8200fb30 t gfxhub_v2_1_restore_regs +ffffffff82010900 t gfxhub_v2_1_halt +ffffffff82010d50 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff82010f70 t gfxhub_v2_1_get_invalidate_req +ffffffff82011000 t gfxhub_v3_0_get_fb_location +ffffffff820110a0 t gfxhub_v3_0_get_mc_fb_offset +ffffffff82011140 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff82011290 t gfxhub_v3_0_gart_enable +ffffffff82012830 t gfxhub_v3_0_gart_disable +ffffffff82012b10 t gfxhub_v3_0_set_fault_enable_default +ffffffff82012d00 t gfxhub_v3_0_init +ffffffff82012dd0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff82012ff0 t gfxhub_v3_0_get_invalidate_req +ffffffff82014000 t gfxhub_v3_0_3_get_fb_location +ffffffff820140a0 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff82014140 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff82014290 t gfxhub_v3_0_3_gart_enable +ffffffff820156f0 t gfxhub_v3_0_3_gart_disable +ffffffff820159f0 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff82015b10 t gfxhub_v3_0_3_init +ffffffff82015be0 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff82015e00 t gfxhub_v3_0_3_get_invalidate_req +ffffffff82016000 t gmc_v10_0_early_init +ffffffff82016170 t gmc_v10_0_late_init +ffffffff820161f0 t gmc_v10_0_sw_init +ffffffff82016690 t gmc_v10_0_sw_fini +ffffffff82016710 t gmc_v10_0_hw_init +ffffffff82016990 t gmc_v10_0_hw_fini +ffffffff82016a80 t gmc_v10_0_suspend +ffffffff82016ac0 t gmc_v10_0_resume +ffffffff82016b20 t gmc_v10_0_is_idle +ffffffff82016b50 t gmc_v10_0_wait_for_idle +ffffffff82016b80 t gmc_v10_0_soft_reset +ffffffff82016bb0 t gmc_v10_0_set_clockgating_state +ffffffff82016c70 t gmc_v10_0_set_powergating_state +ffffffff82016ca0 t gmc_v10_0_get_clockgating_state +ffffffff82016d50 t gmc_v10_0_flush_gpu_tlb +ffffffff82017060 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff82017380 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff82017560 t gmc_v10_0_emit_pasid_mapping +ffffffff820175e0 t gmc_v10_0_map_mtype +ffffffff82017630 t gmc_v10_0_get_vm_pde +ffffffff82017730 t gmc_v10_0_get_vm_pte +ffffffff82017810 t gmc_v10_0_get_vbios_fb_size +ffffffff820179a0 t gmc_v10_0_flush_vm_hub +ffffffff82017e40 t gmc_v10_0_vm_fault_interrupt_state +ffffffff82017ef0 t gmc_v10_0_process_interrupt +ffffffff82018220 t gmc_v10_0_ecc_interrupt_state +ffffffff82018250 t gmc_v10_0_gart_init +ffffffff82019000 t gmc_v11_0_early_init +ffffffff820191f0 t gmc_v11_0_late_init +ffffffff82019270 t gmc_v11_0_sw_init +ffffffff82019630 t gmc_v11_0_sw_fini +ffffffff820196b0 t gmc_v11_0_hw_init +ffffffff82019860 t gmc_v11_0_hw_fini +ffffffff82019920 t gmc_v11_0_suspend +ffffffff820199e0 t gmc_v11_0_resume +ffffffff82019a40 t gmc_v11_0_is_idle +ffffffff82019a70 t gmc_v11_0_wait_for_idle +ffffffff82019aa0 t gmc_v11_0_soft_reset +ffffffff82019ad0 t gmc_v11_0_set_clockgating_state +ffffffff82019b50 t gmc_v11_0_set_powergating_state +ffffffff82019b80 t gmc_v11_0_get_clockgating_state +ffffffff82019bc0 t gmc_v11_0_flush_gpu_tlb +ffffffff8201a0f0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff8201a3c0 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff8201a5a0 t gmc_v11_0_emit_pasid_mapping +ffffffff8201a620 t gmc_v11_0_map_mtype +ffffffff8201a670 t gmc_v11_0_get_vm_pde +ffffffff8201a770 t gmc_v11_0_get_vm_pte +ffffffff8201a850 t gmc_v11_0_get_vbios_fb_size +ffffffff8201a9e0 t gmc_v11_0_vm_fault_interrupt_state +ffffffff8201aa90 t gmc_v11_0_process_interrupt +ffffffff8201acf0 t gmc_v11_0_ecc_interrupt_state +ffffffff8201ad20 t gmc_v11_0_gart_init +ffffffff8201b000 t gmc_v7_0_early_init +ffffffff8201b0a0 t gmc_v7_0_late_init +ffffffff8201b0f0 t gmc_v7_0_sw_init +ffffffff8201b610 t gmc_v7_0_sw_fini +ffffffff8201b6c0 t gmc_v7_0_hw_init +ffffffff8201c350 t gmc_v7_0_hw_fini +ffffffff8201c460 t gmc_v7_0_suspend +ffffffff8201c4a0 t gmc_v7_0_resume +ffffffff8201c500 t gmc_v7_0_is_idle +ffffffff8201c550 t gmc_v7_0_wait_for_idle +ffffffff8201c600 t gmc_v7_0_soft_reset +ffffffff8201c910 t gmc_v7_0_set_clockgating_state +ffffffff8201cbb0 t gmc_v7_0_set_powergating_state +ffffffff8201cbe0 t gmc_v7_0_flush_gpu_tlb +ffffffff8201cc10 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff8201ccf0 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff8201cda0 t gmc_v7_0_emit_pasid_mapping +ffffffff8201cdd0 t gmc_v7_0_set_prt +ffffffff8201cff0 t gmc_v7_0_get_vm_pde +ffffffff8201d050 t gmc_v7_0_get_vm_pte +ffffffff8201d090 t gmc_v7_0_get_vbios_fb_size +ffffffff8201d110 t gmc_v7_0_vm_fault_interrupt_state +ffffffff8201d210 t gmc_v7_0_process_interrupt +ffffffff8201d520 t gmc_v7_0_gart_init +ffffffff8201e000 t gmc_v8_0_early_init +ffffffff8201e0a0 t gmc_v8_0_late_init +ffffffff8201e0f0 t gmc_v8_0_sw_init +ffffffff8201e7b0 t gmc_v8_0_sw_fini +ffffffff8201e860 t gmc_v8_0_hw_init +ffffffff8201f890 t gmc_v8_0_hw_fini +ffffffff8201f9a0 t gmc_v8_0_suspend +ffffffff8201f9e0 t gmc_v8_0_resume +ffffffff8201fa40 t gmc_v8_0_is_idle +ffffffff8201fa90 t gmc_v8_0_wait_for_idle +ffffffff8201fb40 t gmc_v8_0_check_soft_reset +ffffffff8201fbc0 t gmc_v8_0_pre_soft_reset +ffffffff8201fd70 t gmc_v8_0_soft_reset +ffffffff8201fe70 t gmc_v8_0_post_soft_reset +ffffffff8201ff00 t gmc_v8_0_set_clockgating_state +ffffffff82020730 t gmc_v8_0_set_powergating_state +ffffffff82020760 t gmc_v8_0_get_clockgating_state +ffffffff820207d0 t gmc_v8_0_flush_gpu_tlb +ffffffff82020800 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff820208e0 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff82020990 t gmc_v8_0_emit_pasid_mapping +ffffffff820209c0 t gmc_v8_0_set_prt +ffffffff82020be0 t gmc_v8_0_get_vm_pde +ffffffff82020c40 t gmc_v8_0_get_vm_pte +ffffffff82020c90 t gmc_v8_0_get_vbios_fb_size +ffffffff82020d10 t gmc_v8_0_vm_fault_interrupt_state +ffffffff82020e10 t gmc_v8_0_process_interrupt +ffffffff82021230 t gmc_v8_0_gart_init +ffffffff82022000 T gmc_v9_0_restore_registers +ffffffff82022170 t gmc_v9_0_early_init +ffffffff82022540 t gmc_v9_0_late_init +ffffffff82022670 t gmc_v9_0_sw_init +ffffffff82022ee0 t gmc_v9_0_sw_fini +ffffffff82022fe0 t gmc_v9_0_hw_init +ffffffff82023560 t gmc_v9_0_hw_fini +ffffffff82023660 t gmc_v9_0_suspend +ffffffff820236a0 t gmc_v9_0_resume +ffffffff82023700 t gmc_v9_0_is_idle +ffffffff82023730 t gmc_v9_0_wait_for_idle +ffffffff82023760 t gmc_v9_0_soft_reset +ffffffff82023790 t gmc_v9_0_set_clockgating_state +ffffffff82023800 t gmc_v9_0_set_powergating_state +ffffffff82023830 t gmc_v9_0_get_clockgating_state +ffffffff82023870 t gmc_v9_0_flush_gpu_tlb +ffffffff82023fa0 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff820243e0 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff82024610 t gmc_v9_0_emit_pasid_mapping +ffffffff82024690 t gmc_v9_0_map_mtype +ffffffff820246d0 t gmc_v9_0_get_vm_pde +ffffffff820247e0 t gmc_v9_0_get_vm_pte +ffffffff82024b20 t gmc_v9_0_override_vm_pte_flags +ffffffff82024be0 t gmc_v9_0_get_vbios_fb_size +ffffffff82024d90 t gmc_v9_0_query_memory_partition +ffffffff82024df0 t gmc_v9_0_vm_fault_interrupt_state +ffffffff820252d0 t gmc_v9_0_process_interrupt +ffffffff82025ba0 t gmc_v9_0_ecc_interrupt_state +ffffffff82025d50 t gmc_v9_0_init_mem_ranges +ffffffff820261c0 t gmc_v9_0_gart_init +ffffffff82026330 t gmc_v9_0_save_registers +ffffffff82027000 t hdp_v4_0_query_ras_error_count +ffffffff820270d0 t hdp_v4_0_reset_ras_error_count +ffffffff82027200 t hdp_v4_0_flush_hdp +ffffffff82027250 t hdp_v4_0_invalidate_hdp +ffffffff82027330 t hdp_v4_0_update_clock_gating +ffffffff82027440 t hdp_v4_0_get_clockgating_state +ffffffff820274a0 t hdp_v4_0_init_registers +ffffffff82028000 t hdp_v5_0_flush_hdp +ffffffff82028050 t hdp_v5_0_invalidate_hdp +ffffffff820280f0 t hdp_v5_0_update_clock_gating +ffffffff82028530 t hdp_v5_0_get_clockgating_state +ffffffff82028670 t hdp_v5_0_init_registers +ffffffff82029000 t hdp_v5_2_flush_hdp +ffffffff82029050 t hdp_v5_2_update_clock_gating +ffffffff820294a0 t hdp_v5_2_get_clockgating_state +ffffffff8202a000 t hdp_v6_0_flush_hdp +ffffffff8202a050 t hdp_v6_0_update_clock_gating +ffffffff8202a3b0 t hdp_v6_0_get_clockgating_state +ffffffff8202b000 t iceland_ih_early_init +ffffffff8202b050 t iceland_ih_sw_init +ffffffff8202b0c0 t iceland_ih_sw_fini +ffffffff8202b120 t iceland_ih_hw_init +ffffffff8202b410 t iceland_ih_hw_fini +ffffffff8202b520 t iceland_ih_suspend +ffffffff8202b630 t iceland_ih_resume +ffffffff8202b670 t iceland_ih_is_idle +ffffffff8202b6c0 t iceland_ih_wait_for_idle +ffffffff8202b770 t iceland_ih_soft_reset +ffffffff8202b890 t iceland_ih_set_clockgating_state +ffffffff8202b8c0 t iceland_ih_set_powergating_state +ffffffff8202b8f0 t iceland_ih_get_wptr +ffffffff8202ba20 t iceland_ih_decode_iv +ffffffff8202baa0 t iceland_ih_set_rptr +ffffffff8202c000 t ih_v6_0_early_init +ffffffff8202c050 t ih_v6_0_sw_init +ffffffff8202c1d0 t ih_v6_0_sw_fini +ffffffff8202c210 t ih_v6_0_hw_init +ffffffff8202c8a0 t ih_v6_0_hw_fini +ffffffff8202c910 t ih_v6_0_suspend +ffffffff8202c980 t ih_v6_0_resume +ffffffff8202c990 t ih_v6_0_is_idle +ffffffff8202c9c0 t ih_v6_0_wait_for_idle +ffffffff8202c9f0 t ih_v6_0_soft_reset +ffffffff8202ca20 t ih_v6_0_set_clockgating_state +ffffffff8202cb60 t ih_v6_0_set_powergating_state +ffffffff8202cd00 t ih_v6_0_get_clockgating_state +ffffffff8202cda0 t ih_v6_0_get_wptr +ffffffff8202cee0 t ih_v6_0_set_rptr +ffffffff8202cfc0 t ih_v6_0_self_irq +ffffffff8202d030 t ih_v6_0_toggle_interrupts +ffffffff8202d250 t force_update_wptr_for_self_int +ffffffff8202e000 t ih_v6_1_early_init +ffffffff8202e050 t ih_v6_1_sw_init +ffffffff8202e1d0 t ih_v6_1_sw_fini +ffffffff8202e210 t ih_v6_1_hw_init +ffffffff8202e8a0 t ih_v6_1_hw_fini +ffffffff8202e910 t ih_v6_1_suspend +ffffffff8202e980 t ih_v6_1_resume +ffffffff8202e990 t ih_v6_1_is_idle +ffffffff8202e9c0 t ih_v6_1_wait_for_idle +ffffffff8202e9f0 t ih_v6_1_soft_reset +ffffffff8202ea20 t ih_v6_1_set_clockgating_state +ffffffff8202eb60 t ih_v6_1_set_powergating_state +ffffffff8202ed00 t ih_v6_1_get_clockgating_state +ffffffff8202eda0 t ih_v6_1_get_wptr +ffffffff8202eee0 t ih_v6_1_set_rptr +ffffffff8202efc0 t ih_v6_1_self_irq +ffffffff8202f030 t ih_v6_1_toggle_interrupts +ffffffff8202f250 t force_update_wptr_for_self_int +ffffffff82030000 t imu_v11_0_init_microcode +ffffffff820301b0 t imu_v11_0_load_microcode +ffffffff82030580 t imu_v11_0_setup +ffffffff82030860 t imu_v11_0_start +ffffffff82030980 t imu_v11_0_program_rlc_ram +ffffffff82030b60 t imu_v11_0_wait_for_reset_status +ffffffff82030ce0 t program_imu_rlc_ram +ffffffff82032000 T imu_v11_0_3_program_rlc_ram +ffffffff82033000 T jpeg_v1_0_early_init +ffffffff82033080 T jpeg_v1_0_sw_init +ffffffff82033190 T jpeg_v1_0_sw_fini +ffffffff820331b0 T jpeg_v1_0_start +ffffffff82033cf0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff82033d80 t jpeg_v1_0_decode_ring_get_wptr +ffffffff82033e10 t jpeg_v1_0_decode_ring_set_wptr +ffffffff82033e80 t jpeg_v1_0_decode_ring_emit_ib +ffffffff82034860 t jpeg_v1_0_decode_ring_emit_fence +ffffffff820352b0 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff82035320 t jpeg_v1_0_decode_ring_nop +ffffffff82035480 t jpeg_v1_0_decode_ring_insert_start +ffffffff82035660 t jpeg_v1_0_decode_ring_insert_end +ffffffff82035840 t jpeg_v1_0_ring_begin_use +ffffffff82035970 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff82035c00 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff82036060 t jpeg_v1_0_set_interrupt_state +ffffffff82036090 t jpeg_v1_0_process_interrupt +ffffffff82037000 T jpeg_v2_0_dec_ring_insert_start +ffffffff820371c0 T jpeg_v2_0_dec_ring_insert_end +ffffffff82037380 T jpeg_v2_0_dec_ring_emit_fence +ffffffff82037af0 T jpeg_v2_0_dec_ring_emit_ib +ffffffff82038380 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff82038780 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff820387f0 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff82038a50 T jpeg_v2_0_dec_ring_nop +ffffffff82038bb0 t jpeg_v2_0_early_init +ffffffff82038c40 t jpeg_v2_0_sw_init +ffffffff82038d90 t jpeg_v2_0_sw_fini +ffffffff82038df0 t jpeg_v2_0_hw_init +ffffffff82038e80 t jpeg_v2_0_hw_fini +ffffffff82038f70 t jpeg_v2_0_suspend +ffffffff82038fa0 t jpeg_v2_0_resume +ffffffff82039050 t jpeg_v2_0_is_idle +ffffffff820390f0 t jpeg_v2_0_wait_for_idle +ffffffff82039130 t jpeg_v2_0_set_clockgating_state +ffffffff820391f0 t jpeg_v2_0_set_powergating_state +ffffffff82039a60 t jpeg_v2_0_dec_ring_get_rptr +ffffffff82039af0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff82039ba0 t jpeg_v2_0_dec_ring_set_wptr +ffffffff82039c40 t jpeg_v2_0_set_interrupt_state +ffffffff82039c70 t jpeg_v2_0_process_interrupt +ffffffff82039d10 t jpeg_v2_0_enable_clock_gating +ffffffff82039ee0 t jpeg_v2_0_disable_clock_gating +ffffffff8203b000 t jpeg_v2_6_query_ras_poison_status +ffffffff8203b160 t jpeg_v2_5_early_init +ffffffff8203b380 t jpeg_v2_5_sw_init +ffffffff8203b660 t jpeg_v2_5_sw_fini +ffffffff8203b6c0 t jpeg_v2_5_hw_init +ffffffff8203b7c0 t jpeg_v2_5_hw_fini +ffffffff8203b980 t jpeg_v2_5_suspend +ffffffff8203b9b0 t jpeg_v2_5_resume +ffffffff8203bad0 t jpeg_v2_5_is_idle +ffffffff8203bbe0 t jpeg_v2_5_wait_for_idle +ffffffff8203bca0 t jpeg_v2_5_set_clockgating_state +ffffffff8203bd60 t jpeg_v2_5_set_powergating_state +ffffffff8203c5c0 t jpeg_v2_5_dec_ring_get_rptr +ffffffff8203c660 t jpeg_v2_5_dec_ring_get_wptr +ffffffff8203c710 t jpeg_v2_5_dec_ring_set_wptr +ffffffff8203c7c0 t jpeg_v2_6_dec_ring_insert_start +ffffffff8203c9a0 t jpeg_v2_6_dec_ring_insert_end +ffffffff8203cb80 t jpeg_v2_5_set_interrupt_state +ffffffff8203cbb0 t jpeg_v2_5_process_interrupt +ffffffff8203cc90 t jpeg_v2_6_set_ras_interrupt_state +ffffffff8203ccc0 t jpeg_v2_5_enable_clock_gating +ffffffff8203cda0 t jpeg_v2_5_disable_clock_gating +ffffffff8203e000 t jpeg_v3_0_early_init +ffffffff8203e120 t jpeg_v3_0_sw_init +ffffffff8203e270 t jpeg_v3_0_sw_fini +ffffffff8203e2d0 t jpeg_v3_0_hw_init +ffffffff8203e360 t jpeg_v3_0_hw_fini +ffffffff8203e450 t jpeg_v3_0_suspend +ffffffff8203e480 t jpeg_v3_0_resume +ffffffff8203e530 t jpeg_v3_0_is_idle +ffffffff8203e5d0 t jpeg_v3_0_wait_for_idle +ffffffff8203e610 t jpeg_v3_0_set_clockgating_state +ffffffff8203e6d0 t jpeg_v3_0_set_powergating_state +ffffffff8203f020 t jpeg_v3_0_dec_ring_get_rptr +ffffffff8203f0b0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff8203f160 t jpeg_v3_0_dec_ring_set_wptr +ffffffff8203f200 t jpeg_v3_0_set_interrupt_state +ffffffff8203f230 t jpeg_v3_0_process_interrupt +ffffffff8203f2d0 t jpeg_v3_0_enable_clock_gating +ffffffff8203f3b0 t jpeg_v3_0_disable_clock_gating +ffffffff82040000 t jpeg_v4_0_query_ras_poison_status +ffffffff82040160 t jpeg_v4_0_early_init +ffffffff82040240 t jpeg_v4_0_sw_init +ffffffff82040410 t jpeg_v4_0_sw_fini +ffffffff82040470 t jpeg_v4_0_hw_init +ffffffff82040b60 t jpeg_v4_0_hw_fini +ffffffff82040c60 t jpeg_v4_0_suspend +ffffffff82040c90 t jpeg_v4_0_resume +ffffffff82040cf0 t jpeg_v4_0_is_idle +ffffffff82040d90 t jpeg_v4_0_wait_for_idle +ffffffff82040dd0 t jpeg_v4_0_set_clockgating_state +ffffffff82040ea0 t jpeg_v4_0_set_powergating_state +ffffffff82041760 t jpeg_v4_0_dec_ring_get_rptr +ffffffff820417f0 t jpeg_v4_0_dec_ring_get_wptr +ffffffff820418a0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff82041940 t jpeg_v4_0_set_interrupt_state +ffffffff82041970 t jpeg_v4_0_process_interrupt +ffffffff82041a20 t jpeg_v4_0_set_ras_interrupt_state +ffffffff82041a50 t jpeg_v4_0_enable_clock_gating +ffffffff82041c30 t jpeg_v4_0_disable_clock_gating +ffffffff82042000 t jpeg_v4_0_3_early_init +ffffffff82042180 t jpeg_v4_0_3_sw_init +ffffffff82042500 t jpeg_v4_0_3_sw_fini +ffffffff82042560 t jpeg_v4_0_3_hw_init +ffffffff820430a0 t jpeg_v4_0_3_hw_fini +ffffffff82043150 t jpeg_v4_0_3_suspend +ffffffff820431f0 t jpeg_v4_0_3_resume +ffffffff82043250 t jpeg_v4_0_3_is_idle +ffffffff82043460 t jpeg_v4_0_3_wait_for_idle +ffffffff820435d0 t jpeg_v4_0_3_set_clockgating_state +ffffffff82043670 t jpeg_v4_0_3_set_powergating_state +ffffffff82044450 t jpeg_v4_0_3_dec_ring_get_rptr +ffffffff820445f0 t jpeg_v4_0_3_dec_ring_get_wptr +ffffffff820447b0 t jpeg_v4_0_3_dec_ring_set_wptr +ffffffff82044960 t jpeg_v4_0_3_dec_ring_emit_ib +ffffffff82045280 t jpeg_v4_0_3_dec_ring_emit_fence +ffffffff82045ad0 t jpeg_v4_0_3_dec_ring_emit_vm_flush +ffffffff82045b40 t jpeg_v4_0_3_dec_ring_nop +ffffffff82045ca0 t jpeg_v4_0_3_dec_ring_insert_start +ffffffff82045e60 t jpeg_v4_0_3_dec_ring_insert_end +ffffffff82046020 t jpeg_v4_0_3_dec_ring_emit_wreg +ffffffff82046280 t jpeg_v4_0_3_dec_ring_emit_reg_wait +ffffffff82046680 t jpeg_v4_0_3_set_interrupt_state +ffffffff820466b0 t jpeg_v4_0_3_process_interrupt +ffffffff82046960 t jpeg_v4_0_3_query_ras_error_count +ffffffff82046a80 t jpeg_v4_0_3_reset_ras_error_count +ffffffff82046b90 t jpeg_v4_0_3_disable_clock_gating +ffffffff82047000 t lsdma_v6_0_copy_mem +ffffffff820473e0 t lsdma_v6_0_fill_mem +ffffffff82047740 t lsdma_v6_0_update_memory_power_gating +ffffffff82048000 t mca_v3_0_ras_block_match +ffffffff82048050 t mca_v3_0_mp0_query_ras_error_count +ffffffff82048070 t mca_v3_0_mp1_query_ras_error_count +ffffffff82048090 t mca_v3_0_mpio_query_ras_error_count +ffffffff82049000 t mes_v10_0_early_init +ffffffff82049070 t mes_v10_0_late_init +ffffffff820490c0 t mes_v10_1_sw_init +ffffffff82049630 t mes_v10_1_sw_fini +ffffffff820497c0 t mes_v10_1_hw_init +ffffffff8204a1b0 t mes_v10_1_hw_fini +ffffffff8204a2c0 t mes_v10_1_suspend +ffffffff8204a400 t mes_v10_1_resume +ffffffff8204a460 t mes_v10_1_kiq_hw_init +ffffffff8204a8f0 t mes_v10_1_add_hw_queue +ffffffff8204aa80 t mes_v10_1_remove_hw_queue +ffffffff8204ab20 t mes_v10_1_unmap_legacy_queue +ffffffff8204ac20 t mes_v10_1_suspend_gang +ffffffff8204ac50 t mes_v10_1_resume_gang +ffffffff8204ac80 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff8204aed0 t mes_v10_1_load_microcode +ffffffff8204b7f0 t mes_v10_1_enable +ffffffff8204bd00 t mes_v10_1_queue_init +ffffffff8204bfe0 t amdgpu_bo_unreserve +ffffffff8204c0f0 t mes_v10_1_ring_get_rptr +ffffffff8204c120 t mes_v10_1_ring_get_wptr +ffffffff8204c190 t mes_v10_1_ring_set_wptr +ffffffff8204d000 t mes_v11_0_early_init +ffffffff8204d070 t mes_v11_0_late_init +ffffffff8204d0e0 t mes_v11_0_sw_init +ffffffff8204d650 t mes_v11_0_sw_fini +ffffffff8204d8a0 t mes_v11_0_hw_init +ffffffff8204e1b0 t mes_v11_0_hw_fini +ffffffff8204e1e0 t mes_v11_0_suspend +ffffffff8204e1f0 t mes_v11_0_resume +ffffffff8204e250 t mes_v11_0_kiq_hw_init +ffffffff8204e4a0 t mes_v11_0_kiq_hw_fini +ffffffff8204e600 t mes_v11_0_add_hw_queue +ffffffff8204e810 t mes_v11_0_remove_hw_queue +ffffffff8204e8b0 t mes_v11_0_unmap_legacy_queue +ffffffff8204e9d0 t mes_v11_0_suspend_gang +ffffffff8204ea00 t mes_v11_0_resume_gang +ffffffff8204ea30 t mes_v11_0_misc_op +ffffffff8204ebf0 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff8204ee50 t mes_v11_0_load_microcode +ffffffff8204f6f0 t mes_v11_0_enable +ffffffff8204fca0 t mes_v11_0_queue_init +ffffffff82050920 t amdgpu_bo_unreserve +ffffffff82050a30 t mes_v11_0_mqd_init +ffffffff82050c50 t mes_v11_0_kiq_dequeue +ffffffff82051140 t mes_v11_0_ring_get_rptr +ffffffff82051170 t mes_v11_0_ring_get_wptr +ffffffff820511e0 t mes_v11_0_ring_set_wptr +ffffffff82052000 t mmhub_v1_0_query_ras_error_count +ffffffff82052160 t mmhub_v1_0_reset_ras_error_count +ffffffff82052230 t mmhub_v1_0_get_fb_location +ffffffff82052360 t mmhub_v1_0_init +ffffffff82052410 t mmhub_v1_0_gart_enable +ffffffff820539c0 t mmhub_v1_0_set_fault_enable_default +ffffffff82053ae0 t mmhub_v1_0_gart_disable +ffffffff82053db0 t mmhub_v1_0_set_clockgating +ffffffff820542a0 t mmhub_v1_0_get_clockgating +ffffffff820543e0 t mmhub_v1_0_setup_vm_pt_regs +ffffffff82054530 t mmhub_v1_0_update_power_gating +ffffffff82055000 t mmhub_v1_7_query_ras_error_count +ffffffff82055160 t mmhub_v1_7_query_ras_error_status +ffffffff82055270 t mmhub_v1_7_reset_ras_error_count +ffffffff82055320 t mmhub_v1_7_reset_ras_error_status +ffffffff82055440 t mmhub_v1_7_get_fb_location +ffffffff82055570 t mmhub_v1_7_init +ffffffff82055610 t mmhub_v1_7_gart_enable +ffffffff82056df0 t mmhub_v1_7_set_fault_enable_default +ffffffff82056f10 t mmhub_v1_7_gart_disable +ffffffff820571e0 t mmhub_v1_7_set_clockgating +ffffffff820575c0 t mmhub_v1_7_get_clockgating +ffffffff82057700 t mmhub_v1_7_setup_vm_pt_regs +ffffffff82058000 t mmhub_v1_8_get_fb_location +ffffffff82058130 t mmhub_v1_8_init +ffffffff820582b0 t mmhub_v1_8_gart_enable +ffffffff8205a1d0 t mmhub_v1_8_set_fault_enable_default +ffffffff8205a3c0 t mmhub_v1_8_gart_disable +ffffffff8205a760 t mmhub_v1_8_set_clockgating +ffffffff8205a790 t mmhub_v1_8_get_clockgating +ffffffff8205a7c0 t mmhub_v1_8_setup_vm_pt_regs +ffffffff8205a9f0 t mmhub_v1_8_query_ras_error_count +ffffffff8205ab80 t mmhub_v1_8_query_ras_error_status +ffffffff8205ae80 t mmhub_v1_8_reset_ras_error_count +ffffffff8205afc0 t mmhub_v1_8_reset_ras_error_status +ffffffff8205c000 t mmhub_v2_0_init +ffffffff8205c0d0 t mmhub_v2_0_gart_enable +ffffffff8205d4f0 t mmhub_v2_0_set_fault_enable_default +ffffffff8205d610 t mmhub_v2_0_gart_disable +ffffffff8205d8e0 t mmhub_v2_0_set_clockgating +ffffffff8205dc70 t mmhub_v2_0_get_clockgating +ffffffff8205de30 t mmhub_v2_0_setup_vm_pt_regs +ffffffff8205df90 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff8205e230 t mmhub_v2_0_get_invalidate_req +ffffffff8205f000 t mmhub_v2_3_init +ffffffff8205f0e0 t mmhub_v2_3_gart_enable +ffffffff82060760 t mmhub_v2_3_set_fault_enable_default +ffffffff82060860 t mmhub_v2_3_gart_disable +ffffffff82060b40 t mmhub_v2_3_set_clockgating +ffffffff82061050 t mmhub_v2_3_get_clockgating +ffffffff82061270 t mmhub_v2_3_setup_vm_pt_regs +ffffffff820613c0 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff82061610 t mmhub_v2_3_get_invalidate_req +ffffffff82062000 t mmhub_v3_0_get_fb_location +ffffffff820620a0 t mmhub_v3_0_get_mc_fb_offset +ffffffff82062140 t mmhub_v3_0_init +ffffffff82062220 t mmhub_v3_0_gart_enable +ffffffff82063690 t mmhub_v3_0_set_fault_enable_default +ffffffff820637b0 t mmhub_v3_0_gart_disable +ffffffff82063a80 t mmhub_v3_0_set_clockgating +ffffffff82063c70 t mmhub_v3_0_get_clockgating +ffffffff82063d30 t mmhub_v3_0_setup_vm_pt_regs +ffffffff82063e80 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff820640d0 t mmhub_v3_0_get_invalidate_req +ffffffff82065000 t mmhub_v3_0_1_get_fb_location +ffffffff820650a0 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff82065140 t mmhub_v3_0_1_init +ffffffff82065210 t mmhub_v3_0_1_gart_enable +ffffffff820667a0 t mmhub_v3_0_1_set_fault_enable_default +ffffffff820668a0 t mmhub_v3_0_1_gart_disable +ffffffff82066b80 t mmhub_v3_0_1_set_clockgating +ffffffff82066d70 t mmhub_v3_0_1_get_clockgating +ffffffff82066e30 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff82066f80 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff820671d0 t mmhub_v3_0_1_get_invalidate_req +ffffffff82068000 t mmhub_v3_0_2_get_fb_location +ffffffff820680a0 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff82068140 t mmhub_v3_0_2_init +ffffffff82068210 t mmhub_v3_0_2_gart_enable +ffffffff82069660 t mmhub_v3_0_2_set_fault_enable_default +ffffffff82069780 t mmhub_v3_0_2_gart_disable +ffffffff82069a50 t mmhub_v3_0_2_set_clockgating +ffffffff82069a80 t mmhub_v3_0_2_get_clockgating +ffffffff82069ab0 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff82069c00 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff82069e30 t mmhub_v3_0_2_get_invalidate_req +ffffffff8206a000 t mmhub_v9_4_query_ras_error_count +ffffffff8206a160 t mmhub_v9_4_query_ras_error_status +ffffffff8206a270 t mmhub_v9_4_reset_ras_error_count +ffffffff8206a340 t mmhub_v9_4_get_fb_location +ffffffff8206a470 t mmhub_v9_4_init +ffffffff8206a5c0 t mmhub_v9_4_gart_enable +ffffffff8206bc60 t mmhub_v9_4_set_fault_enable_default +ffffffff8206be70 t mmhub_v9_4_gart_disable +ffffffff8206c210 t mmhub_v9_4_set_clockgating +ffffffff8206c750 t mmhub_v9_4_get_clockgating +ffffffff8206c890 t mmhub_v9_4_setup_vm_pt_regs +ffffffff8206c8e0 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff8206d000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff8206d050 T xgpu_ai_mailbox_add_irq_id +ffffffff8206d100 T xgpu_ai_mailbox_get_irq +ffffffff8206d1d0 t xgpu_ai_mailbox_flr_work +ffffffff8206d470 T xgpu_ai_mailbox_put_irq +ffffffff8206d4b0 t xgpu_ai_request_full_gpu_access +ffffffff8206d4d0 t xgpu_ai_release_full_gpu_access +ffffffff8206d4f0 t xgpu_ai_request_init_data +ffffffff8206d560 t xgpu_ai_request_reset +ffffffff8206d630 t xgpu_ai_mailbox_trans_msg +ffffffff8206d8f0 t xgpu_ai_ras_poison_handler +ffffffff8206d920 t xgpu_ai_set_mailbox_ack_irq +ffffffff8206d9c0 t xgpu_ai_mailbox_ack_irq +ffffffff8206da20 t xgpu_ai_set_mailbox_rcv_irq +ffffffff8206dac0 t xgpu_ai_mailbox_rcv_irq +ffffffff8206dbd0 t xgpu_ai_send_access_requests +ffffffff8206dcf0 t xgpu_ai_poll_msg +ffffffff8206e000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff8206e050 T xgpu_nv_mailbox_add_irq_id +ffffffff8206e100 T xgpu_nv_mailbox_get_irq +ffffffff8206e1d0 t xgpu_nv_mailbox_flr_work +ffffffff8206e490 T xgpu_nv_mailbox_put_irq +ffffffff8206e4d0 t xgpu_nv_request_full_gpu_access +ffffffff8206e4f0 t xgpu_nv_release_full_gpu_access +ffffffff8206e510 t xgpu_nv_request_init_data +ffffffff8206e530 t xgpu_nv_request_reset +ffffffff8206e690 t xgpu_nv_mailbox_trans_msg +ffffffff8206e8c0 t xgpu_nv_ras_poison_handler +ffffffff8206e8e0 t xgpu_nv_set_mailbox_ack_irq +ffffffff8206e970 t xgpu_nv_mailbox_ack_irq +ffffffff8206e9d0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff8206ea60 t xgpu_nv_mailbox_rcv_irq +ffffffff8206eb30 t xgpu_nv_send_access_requests +ffffffff8206f000 T xgpu_vi_init_golden_registers +ffffffff8206f0f0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff8206f140 T xgpu_vi_mailbox_add_irq_id +ffffffff8206f1f0 T xgpu_vi_mailbox_get_irq +ffffffff8206f2c0 t xgpu_vi_mailbox_flr_work +ffffffff8206f460 T xgpu_vi_mailbox_put_irq +ffffffff8206f4a0 t xgpu_vi_request_full_gpu_access +ffffffff8206f4c0 t xgpu_vi_release_full_gpu_access +ffffffff8206f4e0 t xgpu_vi_request_reset +ffffffff8206f500 t xgpu_vi_wait_reset_cmpl +ffffffff8206f640 t xgpu_vi_set_mailbox_ack_irq +ffffffff8206f6d0 t xgpu_vi_mailbox_ack_irq +ffffffff8206f730 t xgpu_vi_set_mailbox_rcv_irq +ffffffff8206f7c0 t xgpu_vi_mailbox_rcv_irq +ffffffff8206f890 t xgpu_vi_mailbox_rcv_msg +ffffffff8206f9f0 t xgpu_vi_send_access_requests +ffffffff82070000 t navi10_ih_early_init +ffffffff82070060 t navi10_ih_sw_init +ffffffff820701f0 t navi10_ih_sw_fini +ffffffff82070230 t navi10_ih_hw_init +ffffffff82070710 t navi10_ih_hw_fini +ffffffff82070780 t navi10_ih_suspend +ffffffff820707f0 t navi10_ih_resume +ffffffff82070800 t navi10_ih_is_idle +ffffffff82070830 t navi10_ih_wait_for_idle +ffffffff82070860 t navi10_ih_soft_reset +ffffffff82070890 t navi10_ih_set_clockgating_state +ffffffff820709d0 t navi10_ih_set_powergating_state +ffffffff82070a00 t navi10_ih_get_clockgating_state +ffffffff82070aa0 t navi10_ih_get_wptr +ffffffff82070c00 t navi10_ih_set_rptr +ffffffff82070cf0 t navi10_ih_self_irq +ffffffff82070d70 t navi10_ih_toggle_interrupts +ffffffff82070f00 t force_update_wptr_for_self_int +ffffffff82072000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff82072040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff82072080 t nbio_v2_3_get_pcie_index_offset +ffffffff820720c0 t nbio_v2_3_get_pcie_data_offset +ffffffff82072100 t nbio_v2_3_get_rev_id +ffffffff82072160 t nbio_v2_3_mc_access_enable +ffffffff82072210 t nbio_v2_3_get_memsize +ffffffff82072280 t nbio_v2_3_sdma_doorbell_range +ffffffff82072330 t nbio_v2_3_vcn_doorbell_range +ffffffff820723c0 t nbio_v2_3_enable_doorbell_aperture +ffffffff820724d0 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff82072650 t nbio_v2_3_ih_doorbell_range +ffffffff82072780 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff82072830 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff820728e0 t nbio_v2_3_get_clockgating_state +ffffffff82072970 t nbio_v2_3_ih_control +ffffffff82072ae0 t nbio_v2_3_init_registers +ffffffff82072b80 t nbio_v2_3_remap_hdp_registers +ffffffff82072ca0 t nbio_v2_3_enable_aspm +ffffffff82072d40 t nbio_v2_3_program_aspm +ffffffff820734c0 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff82073560 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff820735e0 t nbio_v2_3_clear_doorbell_interrupt +ffffffff82074000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff82074040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff82074080 t nbio_v4_3_get_pcie_index_offset +ffffffff820740b0 t nbio_v4_3_get_pcie_data_offset +ffffffff820740f0 t nbio_v4_3_get_rev_id +ffffffff82074190 t nbio_v4_3_mc_access_enable +ffffffff82074240 t nbio_v4_3_get_memsize +ffffffff820742b0 t nbio_v4_3_sdma_doorbell_range +ffffffff82074430 t nbio_v4_3_vcn_doorbell_range +ffffffff820745f0 t nbio_v4_3_gc_doorbell_init +ffffffff82074700 t nbio_v4_3_enable_doorbell_aperture +ffffffff82074810 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff82074990 t nbio_v4_3_ih_doorbell_range +ffffffff82074ac0 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff82074c10 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff82074d50 t nbio_v4_3_get_clockgating_state +ffffffff82074e90 t nbio_v4_3_ih_control +ffffffff82075000 t nbio_v4_3_init_registers +ffffffff82075140 t nbio_v4_3_remap_hdp_registers +ffffffff82075260 t nbio_v4_3_program_aspm +ffffffff82076090 t nbio_v4_3_get_rom_offset +ffffffff82076130 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff82076160 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff82076190 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff820761c0 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff820761f0 t nbio_v4_3_handle_ras_err_event_athub_intr_no_bifring +ffffffff82076330 t nbio_v4_3_init_ras_err_event_athub_interrupt +ffffffff82076370 t nbio_v4_3_set_ras_err_event_athub_irq_state +ffffffff82076490 t nbio_v4_3_process_err_event_athub_irq +ffffffff82077000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff82077040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff82077080 t nbio_v6_1_get_pcie_index_offset +ffffffff820770c0 t nbio_v6_1_get_pcie_data_offset +ffffffff82077100 t nbio_v6_1_get_rev_id +ffffffff820771a0 t nbio_v6_1_mc_access_enable +ffffffff82077250 t nbio_v6_1_get_memsize +ffffffff820772c0 t nbio_v6_1_sdma_doorbell_range +ffffffff82077360 t nbio_v6_1_enable_doorbell_aperture +ffffffff82077470 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff820775f0 t nbio_v6_1_ih_doorbell_range +ffffffff82077720 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff820777d0 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff82077880 t nbio_v6_1_get_clockgating_state +ffffffff82077910 t nbio_v6_1_ih_control +ffffffff82077a80 t nbio_v6_1_init_registers +ffffffff82077b60 t nbio_v6_1_remap_hdp_registers +ffffffff82077c80 t nbio_v6_1_program_aspm +ffffffff82079000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff82079040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff82079080 t nbio_v7_0_get_pcie_index_offset +ffffffff820790c0 t nbio_v7_0_get_pcie_data_offset +ffffffff82079100 t nbio_v7_0_get_rev_id +ffffffff820791a0 t nbio_v7_0_mc_access_enable +ffffffff82079250 t nbio_v7_0_get_memsize +ffffffff820792c0 t nbio_v7_0_sdma_doorbell_range +ffffffff82079360 t nbio_v7_0_vcn_doorbell_range +ffffffff820793e0 t nbio_v7_0_enable_doorbell_aperture +ffffffff820794f0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff82079520 t nbio_v7_0_ih_doorbell_range +ffffffff82079650 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff82079790 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff82079840 t nbio_v7_0_get_clockgating_state +ffffffff820798d0 t nbio_v7_0_ih_control +ffffffff82079a40 t nbio_v7_0_init_registers +ffffffff82079a90 t nbio_v7_0_remap_hdp_registers +ffffffff82079bb0 t nbio_7_0_read_syshub_ind_mmr +ffffffff82079c90 t nbio_7_0_write_syshub_ind_mmr +ffffffff8207a000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff8207a040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff8207a080 t nbio_v7_2_get_pcie_index_offset +ffffffff8207a0c0 t nbio_v7_2_get_pcie_data_offset +ffffffff8207a100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff8207a130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff8207a170 t nbio_v7_2_get_rev_id +ffffffff8207a260 t nbio_v7_2_mc_access_enable +ffffffff8207a3a0 t nbio_v7_2_get_memsize +ffffffff8207a410 t nbio_v7_2_sdma_doorbell_range +ffffffff8207a4b0 t nbio_v7_2_vcn_doorbell_range +ffffffff8207a540 t nbio_v7_2_enable_doorbell_aperture +ffffffff8207a630 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff8207a7b0 t nbio_v7_2_ih_doorbell_range +ffffffff8207a840 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff8207a900 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff8207aab0 t nbio_v7_2_get_clockgating_state +ffffffff8207ab50 t nbio_v7_2_ih_control +ffffffff8207acc0 t nbio_v7_2_init_registers +ffffffff8207aea0 t nbio_v7_2_remap_hdp_registers +ffffffff8207b000 t nbio_v7_4_query_ras_error_count +ffffffff8207b1d0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff8207b480 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff8207b650 t nbio_v7_4_init_ras_controller_interrupt +ffffffff8207b690 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff8207b6d0 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff8207b710 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff8207b750 t nbio_v7_4_get_pcie_index_offset +ffffffff8207b790 t nbio_v7_4_get_pcie_data_offset +ffffffff8207b7d0 t nbio_v7_4_get_rev_id +ffffffff8207b8b0 t nbio_v7_4_mc_access_enable +ffffffff8207b960 t nbio_v7_4_get_memsize +ffffffff8207b9d0 t nbio_v7_4_sdma_doorbell_range +ffffffff8207baa0 t nbio_v7_4_vcn_doorbell_range +ffffffff8207bb50 t nbio_v7_4_enable_doorbell_aperture +ffffffff8207bc60 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff8207bde0 t nbio_v7_4_ih_doorbell_range +ffffffff8207bf10 t nbio_v7_4_enable_doorbell_interrupt +ffffffff8207c070 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff8207c0a0 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff8207c150 t nbio_v7_4_get_clockgating_state +ffffffff8207c1e0 t nbio_v7_4_ih_control +ffffffff8207c350 t nbio_v7_4_init_registers +ffffffff8207c450 t nbio_v7_4_remap_hdp_registers +ffffffff8207c570 t nbio_v7_4_program_aspm +ffffffff8207ca20 t nbio_v7_4_set_ras_controller_irq_state +ffffffff8207cbd0 t nbio_v7_4_process_ras_controller_irq +ffffffff8207cc00 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff8207cdb0 t nbio_v7_4_process_err_event_athub_irq +ffffffff8207d000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff8207d040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff8207d080 t nbio_v7_7_get_pcie_index_offset +ffffffff8207d0c0 t nbio_v7_7_get_pcie_data_offset +ffffffff8207d100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff8207d130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff8207d170 t nbio_v7_7_get_rev_id +ffffffff8207d210 t nbio_v7_7_mc_access_enable +ffffffff8207d2c0 t nbio_v7_7_get_memsize +ffffffff8207d330 t nbio_v7_7_sdma_doorbell_range +ffffffff8207d3d0 t nbio_v7_7_vcn_doorbell_range +ffffffff8207d460 t nbio_v7_7_enable_doorbell_aperture +ffffffff8207d550 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff8207d6d0 t nbio_v7_7_ih_doorbell_range +ffffffff8207d800 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff8207d950 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff8207db80 t nbio_v7_7_get_clockgating_state +ffffffff8207dcc0 t nbio_v7_7_ih_control +ffffffff8207de30 t nbio_v7_7_init_registers +ffffffff8207df50 t nbio_v7_7_remap_hdp_registers +ffffffff8207f000 t nbio_v7_9_get_hdp_flush_req_offset +ffffffff8207f040 t nbio_v7_9_get_hdp_flush_done_offset +ffffffff8207f080 t nbio_v7_9_get_pcie_index_offset +ffffffff8207f0c0 t nbio_v7_9_get_pcie_data_offset +ffffffff8207f100 t nbio_v7_9_get_pcie_index_hi_offset +ffffffff8207f140 t nbio_v7_9_get_rev_id +ffffffff8207f1e0 t nbio_v7_9_mc_access_enable +ffffffff8207f290 t nbio_v7_9_get_memsize +ffffffff8207f300 t nbio_v7_9_sdma_doorbell_range +ffffffff8207f680 t nbio_v7_9_vcn_doorbell_range +ffffffff8207f840 t nbio_v7_9_enable_doorbell_aperture +ffffffff8207f9d0 t nbio_v7_9_enable_doorbell_selfring_aperture +ffffffff8207fb50 t nbio_v7_9_ih_doorbell_range +ffffffff8207fc70 t nbio_v7_9_enable_doorbell_interrupt +ffffffff8207fd90 t nbio_v7_9_update_medium_grain_clock_gating +ffffffff8207fdc0 t nbio_v7_9_update_medium_grain_light_sleep +ffffffff8207fdf0 t nbio_v7_9_get_clockgating_state +ffffffff8207fe20 t nbio_v7_9_ih_control +ffffffff8207ff90 t nbio_v7_9_init_registers +ffffffff82080320 t nbio_v7_9_remap_hdp_registers +ffffffff82080440 t nbio_v7_9_get_compute_partition_mode +ffffffff820804e0 t nbio_v7_9_get_memory_partition_mode +ffffffff820805e0 t nbio_v7_9_get_pcie_replay_count +ffffffff82080640 t nbio_v7_9_get_pcie_usage +ffffffff82080800 t nbio_v7_9_query_ras_error_count +ffffffff82080830 t nbio_v7_9_handle_ras_controller_intr_no_bifring +ffffffff82080980 t nbio_v7_9_handle_ras_err_event_athub_intr_no_bifring +ffffffff82080ac0 t nbio_v7_9_init_ras_controller_interrupt +ffffffff82080b00 t nbio_v7_9_init_ras_err_event_athub_interrupt +ffffffff82080b40 t nbio_v7_9_set_ras_controller_irq_state +ffffffff82080b70 t nbio_v7_9_process_ras_controller_irq +ffffffff82080ba0 t nbio_v7_9_set_ras_err_event_athub_irq_state +ffffffff82080bd0 t nbio_v7_9_process_err_event_athub_irq +ffffffff82081000 T nv_grbm_select +ffffffff820810a0 T nv_set_virt_ops +ffffffff820810e0 t nv_common_early_init +ffffffff820814e0 t nv_common_late_init +ffffffff820815a0 t nv_common_sw_init +ffffffff820815f0 t nv_common_sw_fini +ffffffff82081620 t nv_common_hw_init +ffffffff82081750 t nv_common_hw_fini +ffffffff820817c0 t nv_common_suspend +ffffffff82081830 t nv_common_resume +ffffffff82081870 t nv_common_is_idle +ffffffff820818a0 t nv_common_wait_for_idle +ffffffff820818d0 t nv_common_soft_reset +ffffffff82081900 t nv_common_set_clockgating_state +ffffffff820819f0 t nv_common_set_powergating_state +ffffffff82081a20 t nv_common_get_clockgating_state +ffffffff82081aa0 t nv_didt_rreg +ffffffff82081b60 t nv_didt_wreg +ffffffff82081c00 t nv_read_disabled_bios +ffffffff82081c30 t nv_read_register +ffffffff82081d30 t nv_asic_reset +ffffffff82081ec0 t nv_asic_reset_method +ffffffff82081fc0 t nv_get_xclk +ffffffff82081ff0 t nv_set_uvd_clocks +ffffffff82082020 t nv_set_vce_clocks +ffffffff82082050 t nv_get_config_memsize +ffffffff82082070 t nv_need_full_reset +ffffffff820820a0 t nv_init_doorbell_index +ffffffff820821d0 t nv_need_reset_on_init +ffffffff82082280 t nv_pre_asic_init +ffffffff820822b0 t nv_update_umd_stable_pstate +ffffffff82082380 t nv_query_video_codecs +ffffffff82083000 T psp_v10_0_set_psp_funcs +ffffffff82083030 t psp_v10_0_init_microcode +ffffffff82083120 t psp_v10_0_ring_create +ffffffff82083510 t psp_v10_0_ring_stop +ffffffff820837c0 t psp_v10_0_ring_destroy +ffffffff82083850 t psp_v10_0_mode1_reset +ffffffff820838a0 t psp_v10_0_ring_get_wptr +ffffffff82083900 t psp_v10_0_ring_set_wptr +ffffffff82084000 T psp_v11_0_set_psp_funcs +ffffffff82084030 t psp_v11_0_init_microcode +ffffffff820841e0 t psp_v11_0_bootloader_load_kdb +ffffffff82084200 t psp_v11_0_bootloader_load_spl +ffffffff82084220 t psp_v11_0_bootloader_load_sysdrv +ffffffff82084240 t psp_v11_0_bootloader_load_sos +ffffffff82084690 t psp_v11_0_ring_create +ffffffff82084f10 t psp_v11_0_ring_stop +ffffffff820851f0 t psp_v11_0_ring_destroy +ffffffff82085280 t psp_v11_0_mode1_reset +ffffffff820853b0 t psp_v11_0_memory_training +ffffffff82085940 t psp_v11_0_ring_get_wptr +ffffffff82085990 t psp_v11_0_ring_set_wptr +ffffffff82085af0 t psp_v11_0_load_usbc_pd_fw +ffffffff82085d20 t psp_v11_0_read_usbc_pd_fw +ffffffff82085e60 t psp_v11_0_bootloader_load_component +ffffffff82086050 t psp_v11_0_wait_for_bootloader +ffffffff82086270 t psp_v11_0_memory_training_send_msg +ffffffff82087000 T psp_v11_0_8_set_psp_funcs +ffffffff82087030 t psp_v11_0_8_ring_create +ffffffff820878b0 t psp_v11_0_8_ring_stop +ffffffff82087db0 t psp_v11_0_8_ring_destroy +ffffffff82087e40 t psp_v11_0_8_ring_get_wptr +ffffffff82087eb0 t psp_v11_0_8_ring_set_wptr +ffffffff82088000 T psp_v12_0_set_psp_funcs +ffffffff82088030 t psp_v12_0_init_microcode +ffffffff82088100 t psp_v12_0_bootloader_load_sysdrv +ffffffff82088520 t psp_v12_0_bootloader_load_sos +ffffffff82088990 t psp_v12_0_ring_create +ffffffff82089670 t psp_v12_0_ring_stop +ffffffff82089950 t psp_v12_0_ring_destroy +ffffffff820899e0 t psp_v12_0_mode1_reset +ffffffff82089b10 t psp_v12_0_ring_get_wptr +ffffffff82089b80 t psp_v12_0_ring_set_wptr +ffffffff8208a000 T psp_v13_0_set_psp_funcs +ffffffff8208a030 t psp_v13_0_init_microcode +ffffffff8208a160 t psp_v13_0_wait_for_bootloader_steady_state +ffffffff8208a290 t psp_v13_0_bootloader_load_kdb +ffffffff8208a2b0 t psp_v13_0_bootloader_load_spl +ffffffff8208a2d0 t psp_v13_0_bootloader_load_sysdrv +ffffffff8208a2f0 t psp_v13_0_bootloader_load_soc_drv +ffffffff8208a310 t psp_v13_0_bootloader_load_intf_drv +ffffffff8208a330 t psp_v13_0_bootloader_load_dbg_drv +ffffffff8208a350 t psp_v13_0_bootloader_load_ras_drv +ffffffff8208a370 t psp_v13_0_bootloader_load_sos +ffffffff8208a830 t psp_v13_0_ring_create +ffffffff8208b0b0 t psp_v13_0_ring_stop +ffffffff8208b5b0 t psp_v13_0_ring_destroy +ffffffff8208b640 t psp_v13_0_memory_training +ffffffff8208bb20 t psp_v13_0_ring_get_wptr +ffffffff8208bb90 t psp_v13_0_ring_set_wptr +ffffffff8208bca0 t psp_v13_0_load_usbc_pd_fw +ffffffff8208bed0 t psp_v13_0_read_usbc_pd_fw +ffffffff8208c010 t psp_v13_0_update_spirom +ffffffff8208c230 t psp_v13_0_vbflash_status +ffffffff8208c290 t psp_v13_0_fatal_error_recovery_quirk +ffffffff8208c3f0 t psp_v13_0_bootloader_load_component +ffffffff8208c6b0 t psp_v13_0_memory_training_send_msg +ffffffff8208c830 t psp_v13_0_exec_spi_cmd +ffffffff8208d000 T psp_v13_0_4_set_psp_funcs +ffffffff8208d030 t psp_v13_0_4_init_microcode +ffffffff8208d0f0 t psp_v13_0_4_bootloader_load_kdb +ffffffff8208d110 t psp_v13_0_4_bootloader_load_spl +ffffffff8208d130 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff8208d150 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff8208d170 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff8208d190 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff8208d1b0 t psp_v13_0_4_bootloader_load_sos +ffffffff8208d620 t psp_v13_0_4_ring_create +ffffffff8208deb0 t psp_v13_0_4_ring_stop +ffffffff8208e3c0 t psp_v13_0_4_ring_destroy +ffffffff8208e450 t psp_v13_0_4_ring_get_wptr +ffffffff8208e4c0 t psp_v13_0_4_ring_set_wptr +ffffffff8208e5e0 t psp_v13_0_4_bootloader_load_component +ffffffff8208e7f0 t psp_v13_0_4_wait_for_bootloader +ffffffff8208f000 T psp_v3_1_set_psp_funcs +ffffffff8208f030 t psp_v3_1_init_microcode +ffffffff8208f0f0 t psp_v3_1_bootloader_load_sysdrv +ffffffff8208f510 t psp_v3_1_bootloader_load_sos +ffffffff8208f980 t psp_v3_1_ring_create +ffffffff82090840 t psp_v3_1_ring_stop +ffffffff82090b20 t psp_v3_1_ring_destroy +ffffffff82090bb0 t psp_v3_1_smu_reload_quirk +ffffffff82090c00 t psp_v3_1_mode1_reset +ffffffff82090d30 t psp_v3_1_ring_get_wptr +ffffffff82090d80 t psp_v3_1_ring_set_wptr +ffffffff82091000 t sdma_v2_4_early_init +ffffffff820910f0 t sdma_v2_4_sw_init +ffffffff82091520 t sdma_v2_4_sw_fini +ffffffff820915f0 t sdma_v2_4_hw_init +ffffffff82091aa0 t sdma_v2_4_hw_fini +ffffffff82091af0 t sdma_v2_4_suspend +ffffffff82091b40 t sdma_v2_4_resume +ffffffff82091b50 t sdma_v2_4_is_idle +ffffffff82091ba0 t sdma_v2_4_wait_for_idle +ffffffff82091c50 t sdma_v2_4_soft_reset +ffffffff82091e00 t sdma_v2_4_set_clockgating_state +ffffffff82091e30 t sdma_v2_4_set_powergating_state +ffffffff82091e60 t sdma_v2_4_ring_get_rptr +ffffffff82091ea0 t sdma_v2_4_ring_get_wptr +ffffffff82091f00 t sdma_v2_4_ring_set_wptr +ffffffff82091f40 t sdma_v2_4_ring_emit_ib +ffffffff82092220 t sdma_v2_4_ring_emit_fence +ffffffff82092670 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff82092920 t sdma_v2_4_ring_emit_vm_flush +ffffffff82092bd0 t sdma_v2_4_ring_emit_hdp_flush +ffffffff82092e80 t sdma_v2_4_ring_test_ring +ffffffff820931b0 t sdma_v2_4_ring_test_ib +ffffffff820933c0 t sdma_v2_4_ring_insert_nop +ffffffff82093500 t sdma_v2_4_ring_pad_ib +ffffffff82093630 t sdma_v2_4_ring_emit_wreg +ffffffff82093790 t sdma_v2_4_emit_copy_buffer +ffffffff82093850 t sdma_v2_4_emit_fill_buffer +ffffffff820938e0 t sdma_v2_4_vm_copy_pte +ffffffff820939a0 t sdma_v2_4_vm_write_pte +ffffffff82093a70 t sdma_v2_4_vm_set_pte_pde +ffffffff82093b70 t sdma_v2_4_set_trap_irq_state +ffffffff82093c60 t sdma_v2_4_process_trap_irq +ffffffff82093d00 t sdma_v2_4_process_illegal_inst_irq +ffffffff82093d80 t sdma_v2_4_enable +ffffffff82094000 t sdma_v3_0_early_init +ffffffff82094100 t sdma_v3_0_sw_init +ffffffff82094530 t sdma_v3_0_sw_fini +ffffffff82094600 t sdma_v3_0_hw_init +ffffffff82094770 t sdma_v3_0_hw_fini +ffffffff820947d0 t sdma_v3_0_suspend +ffffffff82094830 t sdma_v3_0_resume +ffffffff82094840 t sdma_v3_0_is_idle +ffffffff82094890 t sdma_v3_0_wait_for_idle +ffffffff82094940 t sdma_v3_0_check_soft_reset +ffffffff820949a0 t sdma_v3_0_pre_soft_reset +ffffffff82094a00 t sdma_v3_0_soft_reset +ffffffff82094b00 t sdma_v3_0_post_soft_reset +ffffffff82094b50 t sdma_v3_0_set_clockgating_state +ffffffff82094e00 t sdma_v3_0_set_powergating_state +ffffffff82094e30 t sdma_v3_0_get_clockgating_state +ffffffff82094ed0 t sdma_v3_0_ring_get_rptr +ffffffff82094f10 t sdma_v3_0_ring_get_wptr +ffffffff82094f90 t sdma_v3_0_ring_set_wptr +ffffffff82095040 t sdma_v3_0_ring_emit_ib +ffffffff82095320 t sdma_v3_0_ring_emit_fence +ffffffff82095770 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff82095a20 t sdma_v3_0_ring_emit_vm_flush +ffffffff82095cd0 t sdma_v3_0_ring_emit_hdp_flush +ffffffff82095f80 t sdma_v3_0_ring_test_ring +ffffffff820962b0 t sdma_v3_0_ring_test_ib +ffffffff820964c0 t sdma_v3_0_ring_insert_nop +ffffffff82096600 t sdma_v3_0_ring_pad_ib +ffffffff82096730 t sdma_v3_0_ring_emit_wreg +ffffffff82096890 t sdma_v3_0_emit_copy_buffer +ffffffff82096950 t sdma_v3_0_emit_fill_buffer +ffffffff820969e0 t sdma_v3_0_vm_copy_pte +ffffffff82096aa0 t sdma_v3_0_vm_write_pte +ffffffff82096b70 t sdma_v3_0_vm_set_pte_pde +ffffffff82096c70 t sdma_v3_0_set_trap_irq_state +ffffffff82096d60 t sdma_v3_0_process_trap_irq +ffffffff82096e00 t sdma_v3_0_process_illegal_inst_irq +ffffffff82096e80 t sdma_v3_0_ctx_switch_enable +ffffffff82097050 t sdma_v3_0_enable +ffffffff82097200 t sdma_v3_0_gfx_resume +ffffffff82098000 t sdma_v4_0_early_init +ffffffff820982f0 t sdma_v4_0_late_init +ffffffff820985b0 t sdma_v4_0_sw_init +ffffffff82098a60 t sdma_v4_0_sw_fini +ffffffff82098b30 t sdma_v4_0_hw_init +ffffffff8209bcf0 t sdma_v4_0_hw_fini +ffffffff8209bdf0 t sdma_v4_0_suspend +ffffffff8209be50 t sdma_v4_0_resume +ffffffff8209bee0 t sdma_v4_0_is_idle +ffffffff8209c010 t sdma_v4_0_wait_for_idle +ffffffff8209c1c0 t sdma_v4_0_soft_reset +ffffffff8209c1f0 t sdma_v4_0_set_clockgating_state +ffffffff8209c720 t sdma_v4_0_set_powergating_state +ffffffff8209c800 t sdma_v4_0_get_clockgating_state +ffffffff8209c8b0 t sdma_v4_0_query_ras_error_count +ffffffff8209caa0 t sdma_v4_0_reset_ras_error_count +ffffffff8209cc20 t sdma_v4_0_ring_get_rptr +ffffffff8209cc80 t sdma_v4_0_ring_get_wptr +ffffffff8209ce90 t sdma_v4_0_ring_set_wptr +ffffffff8209d140 t sdma_v4_0_ring_emit_ib +ffffffff8209d420 t sdma_v4_0_ring_emit_fence +ffffffff8209d890 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff8209d8f0 t sdma_v4_0_ring_emit_vm_flush +ffffffff8209d910 t sdma_v4_0_ring_emit_hdp_flush +ffffffff8209d9d0 t sdma_v4_0_ring_test_ring +ffffffff8209dd00 t sdma_v4_0_ring_test_ib +ffffffff8209df10 t sdma_v4_0_ring_insert_nop +ffffffff8209e050 t sdma_v4_0_ring_pad_ib +ffffffff8209e180 t sdma_v4_0_ring_emit_wreg +ffffffff8209e2e0 t sdma_v4_0_ring_emit_reg_wait +ffffffff8209e330 t sdma_v4_0_wait_reg_mem +ffffffff8209e680 t sdma_v4_0_page_ring_get_wptr +ffffffff8209e840 t sdma_v4_0_page_ring_set_wptr +ffffffff8209ea10 t sdma_v4_0_emit_copy_buffer +ffffffff8209ead0 t sdma_v4_0_emit_fill_buffer +ffffffff8209eb60 t sdma_v4_0_vm_copy_pte +ffffffff8209ec20 t sdma_v4_0_vm_write_pte +ffffffff8209ecf0 t sdma_v4_0_vm_set_pte_pde +ffffffff8209edf0 t sdma_v4_0_set_trap_irq_state +ffffffff8209efa0 t sdma_v4_0_process_trap_irq +ffffffff8209f100 t sdma_v4_0_process_illegal_inst_irq +ffffffff8209f220 t sdma_v4_0_set_ecc_irq_state +ffffffff8209f3d0 t sdma_v4_0_process_vm_hole_irq +ffffffff8209f420 t sdma_v4_0_print_iv_entry +ffffffff8209f570 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff8209f5c0 t sdma_v4_0_process_pool_timeout_irq +ffffffff8209f610 t sdma_v4_0_process_srbm_write_irq +ffffffff8209f660 t sdma_v4_0_process_ras_data_cb +ffffffff8209f6e0 t sdma_v4_0_ctx_switch_enable +ffffffff8209fe00 t sdma_v4_0_enable +ffffffff820a03f0 t sdma_v4_0_gfx_enable +ffffffff820a1000 t sdma_v4_4_query_ras_error_count +ffffffff820a12b0 t sdma_v4_4_reset_ras_error_count +ffffffff820a2000 t sdma_v4_4_2_early_init +ffffffff820a22b0 t sdma_v4_4_2_late_init +ffffffff820a2340 t sdma_v4_4_2_sw_init +ffffffff820a2920 t sdma_v4_4_2_sw_fini +ffffffff820a29f0 t sdma_v4_4_2_hw_init +ffffffff820a2a40 t sdma_v4_4_2_hw_fini +ffffffff820a2b20 t sdma_v4_4_2_suspend +ffffffff820a2c30 t sdma_v4_4_2_resume +ffffffff820a2c80 t sdma_v4_4_2_is_idle +ffffffff820a2d30 t sdma_v4_4_2_wait_for_idle +ffffffff820a2e60 t sdma_v4_4_2_soft_reset +ffffffff820a2e90 t sdma_v4_4_2_set_clockgating_state +ffffffff820a3350 t sdma_v4_4_2_set_powergating_state +ffffffff820a3380 t sdma_v4_4_2_get_clockgating_state +ffffffff820a3480 t sdma_v4_4_2_xcp_suspend +ffffffff820a3570 t sdma_v4_4_2_xcp_resume +ffffffff820a35b0 t sdma_v4_4_2_ring_get_rptr +ffffffff820a3630 t sdma_v4_4_2_ring_get_wptr +ffffffff820a3790 t sdma_v4_4_2_ring_set_wptr +ffffffff820a3990 t sdma_v4_4_2_ring_emit_ib +ffffffff820a3c70 t sdma_v4_4_2_ring_emit_fence +ffffffff820a40e0 t sdma_v4_4_2_ring_emit_pipeline_sync +ffffffff820a4140 t sdma_v4_4_2_ring_emit_vm_flush +ffffffff820a4160 t sdma_v4_4_2_ring_emit_hdp_flush +ffffffff820a4230 t sdma_v4_4_2_ring_test_ring +ffffffff820a4560 t sdma_v4_4_2_ring_test_ib +ffffffff820a4770 t sdma_v4_4_2_ring_insert_nop +ffffffff820a48b0 t sdma_v4_4_2_ring_pad_ib +ffffffff820a49e0 t sdma_v4_4_2_ring_emit_wreg +ffffffff820a4b40 t sdma_v4_4_2_ring_emit_reg_wait +ffffffff820a4b90 t sdma_v4_4_2_wait_reg_mem +ffffffff820a4ee0 t sdma_v4_4_2_page_ring_get_wptr +ffffffff820a5000 t sdma_v4_4_2_page_ring_set_wptr +ffffffff820a5130 t sdma_v4_4_2_emit_copy_buffer +ffffffff820a51f0 t sdma_v4_4_2_emit_fill_buffer +ffffffff820a5280 t sdma_v4_4_2_vm_copy_pte +ffffffff820a5340 t sdma_v4_4_2_vm_write_pte +ffffffff820a5410 t sdma_v4_4_2_vm_set_pte_pde +ffffffff820a5510 t sdma_v4_4_2_set_trap_irq_state +ffffffff820a5610 t sdma_v4_4_2_process_trap_irq +ffffffff820a5740 t sdma_v4_4_2_process_illegal_inst_irq +ffffffff820a57e0 t sdma_v4_4_2_set_ecc_irq_state +ffffffff820a58f0 t sdma_v4_4_2_process_vm_hole_irq +ffffffff820a59e0 t sdma_v4_4_2_process_doorbell_invalid_irq +ffffffff820a5ad0 t sdma_v4_4_2_process_pool_timeout_irq +ffffffff820a5bc0 t sdma_v4_4_2_process_srbm_write_irq +ffffffff820a5cb0 t sdma_v4_4_2_query_ras_error_count +ffffffff820a5e30 t sdma_v4_4_2_reset_ras_error_count +ffffffff820a5fa0 t sdma_v4_4_2_inst_init_golden_registers +ffffffff820a6170 t sdma_v4_4_2_inst_start +ffffffff820a79a0 t sdma_v4_4_2_inst_ctx_switch_enable +ffffffff820a7cf0 t sdma_v4_4_2_inst_enable +ffffffff820a9000 t sdma_v5_0_early_init +ffffffff820a9130 t sdma_v5_0_sw_init +ffffffff820a9350 t sdma_v5_0_sw_fini +ffffffff820a93f0 t sdma_v5_0_hw_init +ffffffff820aa8c0 t sdma_v5_0_hw_fini +ffffffff820aa930 t sdma_v5_0_suspend +ffffffff820aa9a0 t sdma_v5_0_resume +ffffffff820aa9b0 t sdma_v5_0_is_idle +ffffffff820aaa50 t sdma_v5_0_wait_for_idle +ffffffff820aab30 t sdma_v5_0_soft_reset +ffffffff820aab60 t sdma_v5_0_set_clockgating_state +ffffffff820aad80 t sdma_v5_0_set_powergating_state +ffffffff820aadb0 t sdma_v5_0_get_clockgating_state +ffffffff820aae60 t sdma_v5_0_ring_get_rptr +ffffffff820aaec0 t sdma_v5_0_ring_get_wptr +ffffffff820ab080 t sdma_v5_0_ring_set_wptr +ffffffff820ab430 t sdma_v5_0_ring_emit_ib +ffffffff820ab730 t sdma_v5_0_ring_emit_fence +ffffffff820abbe0 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff820abe90 t sdma_v5_0_ring_emit_vm_flush +ffffffff820abeb0 t sdma_v5_0_ring_emit_hdp_flush +ffffffff820ac180 t sdma_v5_0_ring_test_ring +ffffffff820ac5b0 t sdma_v5_0_ring_test_ib +ffffffff820ac940 t sdma_v5_0_ring_insert_nop +ffffffff820aca80 t sdma_v5_0_ring_pad_ib +ffffffff820acbb0 t sdma_v5_0_ring_init_cond_exec +ffffffff820ace00 t sdma_v5_0_ring_patch_cond_exec +ffffffff820acec0 t sdma_v5_0_ring_emit_wreg +ffffffff820ad020 t sdma_v5_0_ring_emit_reg_wait +ffffffff820ad2c0 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff820ad350 t sdma_v5_0_ring_preempt_ib +ffffffff820ad4e0 t sdma_v5_0_ring_emit_mem_sync +ffffffff820ad710 t sdma_v5_0_emit_copy_buffer +ffffffff820ad7d0 t sdma_v5_0_emit_fill_buffer +ffffffff820ad860 t sdma_v5_0_vm_copy_pte +ffffffff820ad920 t sdma_v5_0_vm_write_pte +ffffffff820ad9f0 t sdma_v5_0_vm_set_pte_pde +ffffffff820adaf0 t sdma_v5_0_set_trap_irq_state +ffffffff820adb90 t sdma_v5_0_process_trap_irq +ffffffff820adcd0 t sdma_v5_0_process_illegal_inst_irq +ffffffff820add00 t sdma_v5_0_mqd_init +ffffffff820addf0 t sdma_v5_0_ctx_switch_enable +ffffffff820ae170 t sdma_v5_0_enable +ffffffff820af000 t sdma_v5_2_early_init +ffffffff820af130 t sdma_v5_2_sw_init +ffffffff820af3f0 t sdma_v5_2_sw_fini +ffffffff820af490 t sdma_v5_2_hw_init +ffffffff820b12c0 t sdma_v5_2_hw_fini +ffffffff820b1330 t sdma_v5_2_suspend +ffffffff820b13a0 t sdma_v5_2_resume +ffffffff820b13b0 t sdma_v5_2_is_idle +ffffffff820b1470 t sdma_v5_2_wait_for_idle +ffffffff820b15a0 t sdma_v5_2_soft_reset +ffffffff820b18c0 t sdma_v5_2_set_clockgating_state +ffffffff820b1c60 t sdma_v5_2_set_powergating_state +ffffffff820b1c90 t sdma_v5_2_get_clockgating_state +ffffffff820b1d40 t sdma_v5_2_ring_get_rptr +ffffffff820b1da0 t sdma_v5_2_ring_get_wptr +ffffffff820b1ef0 t sdma_v5_2_ring_set_wptr +ffffffff820b20d0 t sdma_v5_2_ring_emit_ib +ffffffff820b23d0 t sdma_v5_2_ring_emit_fence +ffffffff820b2880 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff820b2b30 t sdma_v5_2_ring_emit_vm_flush +ffffffff820b2b50 t sdma_v5_2_ring_emit_hdp_flush +ffffffff820b2e50 t sdma_v5_2_ring_test_ring +ffffffff820b3280 t sdma_v5_2_ring_test_ib +ffffffff820b3610 t sdma_v5_2_ring_insert_nop +ffffffff820b3750 t sdma_v5_2_ring_pad_ib +ffffffff820b3880 t sdma_v5_2_ring_init_cond_exec +ffffffff820b3ad0 t sdma_v5_2_ring_patch_cond_exec +ffffffff820b3b90 t sdma_v5_2_ring_begin_use +ffffffff820b3bb0 t sdma_v5_2_ring_end_use +ffffffff820b3bd0 t sdma_v5_2_ring_emit_wreg +ffffffff820b3d30 t sdma_v5_2_ring_emit_reg_wait +ffffffff820b3fd0 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff820b4060 t sdma_v5_2_ring_preempt_ib +ffffffff820b4220 t sdma_v5_2_ring_emit_mem_sync +ffffffff820b4450 t sdma_v5_2_emit_copy_buffer +ffffffff820b4510 t sdma_v5_2_emit_fill_buffer +ffffffff820b45a0 t sdma_v5_2_vm_copy_pte +ffffffff820b4660 t sdma_v5_2_vm_write_pte +ffffffff820b4730 t sdma_v5_2_vm_set_pte_pde +ffffffff820b4830 t sdma_v5_2_set_trap_irq_state +ffffffff820b48f0 t sdma_v5_2_process_trap_irq +ffffffff820b4a60 t sdma_v5_2_process_illegal_inst_irq +ffffffff820b4a90 t sdma_v5_2_mqd_init +ffffffff820b4b80 t sdma_v5_2_ctx_switch_enable +ffffffff820b4fd0 t sdma_v5_2_enable +ffffffff820b6000 t sdma_v6_0_early_init +ffffffff820b6120 t sdma_v6_0_sw_init +ffffffff820b6330 t sdma_v6_0_sw_fini +ffffffff820b63d0 t sdma_v6_0_hw_init +ffffffff820b63e0 t sdma_v6_0_hw_fini +ffffffff820b64d0 t sdma_v6_0_suspend +ffffffff820b6510 t sdma_v6_0_resume +ffffffff820b6520 t sdma_v6_0_is_idle +ffffffff820b65c0 t sdma_v6_0_wait_for_idle +ffffffff820b66a0 t sdma_v6_0_check_soft_reset +ffffffff820b6770 t sdma_v6_0_soft_reset +ffffffff820b6cc0 t sdma_v6_0_set_clockgating_state +ffffffff820b6cf0 t sdma_v6_0_set_powergating_state +ffffffff820b6d20 t sdma_v6_0_get_clockgating_state +ffffffff820b6d50 t sdma_v6_0_ring_get_rptr +ffffffff820b6db0 t sdma_v6_0_ring_get_wptr +ffffffff820b6e30 t sdma_v6_0_ring_set_wptr +ffffffff820b71e0 t sdma_v6_0_ring_emit_ib +ffffffff820b74e0 t sdma_v6_0_ring_emit_fence +ffffffff820b7990 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff820b7c40 t sdma_v6_0_ring_emit_vm_flush +ffffffff820b7ee0 t sdma_v6_0_ring_emit_hdp_flush +ffffffff820b81b0 t sdma_v6_0_ring_test_ring +ffffffff820b85e0 t sdma_v6_0_ring_test_ib +ffffffff820b8970 t sdma_v6_0_ring_insert_nop +ffffffff820b8ab0 t sdma_v6_0_ring_pad_ib +ffffffff820b8be0 t sdma_v6_0_ring_init_cond_exec +ffffffff820b8e30 t sdma_v6_0_ring_patch_cond_exec +ffffffff820b8ef0 t sdma_v6_0_ring_emit_wreg +ffffffff820b9050 t sdma_v6_0_ring_emit_reg_wait +ffffffff820b92f0 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff820b9380 t sdma_v6_0_ring_preempt_ib +ffffffff820b9510 t sdma_v6_0_ring_emit_mem_sync +ffffffff820b9740 t sdma_v6_0_emit_copy_buffer +ffffffff820b9800 t sdma_v6_0_emit_fill_buffer +ffffffff820b9890 t sdma_v6_0_vm_copy_pte +ffffffff820b9950 t sdma_v6_0_vm_write_pte +ffffffff820b9a20 t sdma_v6_0_vm_set_pte_pde +ffffffff820b9b20 t sdma_v6_0_set_trap_irq_state +ffffffff820b9bc0 t sdma_v6_0_process_trap_irq +ffffffff820b9d20 t sdma_v6_0_process_illegal_inst_irq +ffffffff820b9d50 t sdma_v6_0_mqd_init +ffffffff820b9e80 t sdma_v6_0_start +ffffffff820ba1e0 t sdma_v6_0_enable +ffffffff820ba380 t sdma_v6_0_gfx_resume +ffffffff820bb5c0 t sdma_v6_0_gfx_stop +ffffffff820bc000 T sienna_cichlid_reset_init +ffffffff820bc0e0 t sienna_cichlid_async_reset +ffffffff820bc140 t sienna_cichlid_get_reset_handler +ffffffff820bc1d0 T sienna_cichlid_reset_fini +ffffffff820bc230 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff820bc3a0 t sienna_cichlid_mode2_perform_reset +ffffffff820bc430 t sienna_cichlid_mode2_restore_hwcontext +ffffffff820bc7a0 t sienna_cichlid_mode2_reset +ffffffff820bd000 T smu_v11_0_i2c_control_init +ffffffff820bd0e0 T smu_v11_0_i2c_control_fini +ffffffff820bd120 t smu_v11_0_i2c_xfer +ffffffff820be490 t smu_v11_0_i2c_func +ffffffff820be4c0 t smu_v11_0_i2c_enable +ffffffff820be620 t smu_v11_0_i2c_abort +ffffffff820be740 t lock_bus +ffffffff820be7f0 t trylock_bus +ffffffff820be850 t unlock_bus +ffffffff820bf000 T smu_v13_0_10_reset_init +ffffffff820bf0e0 t smu_v13_0_10_async_reset +ffffffff820bf140 t smu_v13_0_10_get_reset_handler +ffffffff820bf1f0 T smu_v13_0_10_reset_fini +ffffffff820bf250 t smu_v13_0_10_mode2_prepare_hwcontext +ffffffff820bf3a0 t smu_v13_0_10_mode2_perform_reset +ffffffff820bf430 t smu_v13_0_10_mode2_restore_hwcontext +ffffffff820bf820 t smu_v13_0_10_mode2_reset +ffffffff820c0000 t smuio_v11_0_get_rom_index_offset +ffffffff820c0040 t smuio_v11_0_get_rom_data_offset +ffffffff820c0080 t smuio_v11_0_update_rom_clock_gating +ffffffff820c01d0 t smuio_v11_0_get_clock_gating_state +ffffffff820c1000 t smuio_v11_0_6_get_rom_index_offset +ffffffff820c1040 t smuio_v11_0_6_get_rom_data_offset +ffffffff820c1080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff820c11e0 t smuio_v11_0_6_get_clock_gating_state +ffffffff820c2000 t smuio_v13_0_get_rom_index_offset +ffffffff820c2040 t smuio_v13_0_get_rom_data_offset +ffffffff820c2080 t smuio_v13_0_update_rom_clock_gating +ffffffff820c21e0 t smuio_v13_0_get_clock_gating_state +ffffffff820c2290 t smuio_v13_0_get_die_id +ffffffff820c2320 t smuio_v13_0_get_socket_id +ffffffff820c23c0 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff820c3000 t smuio_v13_0_3_get_die_id +ffffffff820c30a0 t smuio_v13_0_3_get_socket_id +ffffffff820c3140 t smuio_v13_0_3_get_pkg_type +ffffffff820c4000 t smuio_v13_0_6_get_rom_index_offset +ffffffff820c4040 t smuio_v13_0_6_get_rom_data_offset +ffffffff820c5000 t smuio_v9_0_get_rom_index_offset +ffffffff820c5040 t smuio_v9_0_get_rom_data_offset +ffffffff820c5080 t smuio_v9_0_update_rom_clock_gating +ffffffff820c51e0 t smuio_v9_0_get_clock_gating_state +ffffffff820c6000 T soc15_grbm_select +ffffffff820c6090 T soc15_program_register_sequence +ffffffff820c62b0 T soc15_set_virt_ops +ffffffff820c6320 t soc15_common_early_init +ffffffff820c6750 t soc15_common_late_init +ffffffff820c67c0 t soc15_common_sw_init +ffffffff820c6820 t soc15_common_sw_fini +ffffffff820c6880 t soc15_common_hw_init +ffffffff820c69d0 t soc15_common_hw_fini +ffffffff820c6ad0 t soc15_common_suspend +ffffffff820c6b10 t soc15_common_resume +ffffffff820c6c00 t soc15_common_is_idle +ffffffff820c6c30 t soc15_common_wait_for_idle +ffffffff820c6c60 t soc15_common_soft_reset +ffffffff820c6c90 t soc15_common_set_clockgating_state +ffffffff820c7040 t soc15_common_set_powergating_state +ffffffff820c7070 t soc15_common_get_clockgating_state +ffffffff820c71b0 t soc15_uvd_ctx_rreg +ffffffff820c7280 t soc15_uvd_ctx_wreg +ffffffff820c7320 t soc15_didt_rreg +ffffffff820c73e0 t soc15_didt_wreg +ffffffff820c7480 t soc15_gc_cac_rreg +ffffffff820c75d0 t soc15_gc_cac_wreg +ffffffff820c7710 t soc15_se_cac_rreg +ffffffff820c7860 t soc15_se_cac_wreg +ffffffff820c79a0 t soc15_read_disabled_bios +ffffffff820c79d0 t soc15_read_register +ffffffff820c7ae0 t soc15_asic_reset +ffffffff820c7cb0 t soc15_asic_reset_method +ffffffff820c7e70 t soc15_get_xclk +ffffffff820c7ed0 t soc15_set_uvd_clocks +ffffffff820c7f00 t soc15_set_vce_clocks +ffffffff820c7f30 t soc15_get_config_memsize +ffffffff820c7f50 t soc15_need_full_reset +ffffffff820c7f80 t soc15_get_pcie_usage +ffffffff820c80f0 t soc15_need_reset_on_init +ffffffff820c81b0 t soc15_get_pcie_replay_count +ffffffff820c8230 t soc15_supports_baco +ffffffff820c8290 t soc15_pre_asic_init +ffffffff820c82a0 t soc15_query_video_codecs +ffffffff820c8390 t vega20_get_pcie_usage +ffffffff820c9000 T soc21_grbm_select +ffffffff820c9090 t soc21_common_early_init +ffffffff820c9210 t soc21_common_late_init +ffffffff820c9310 t soc21_common_sw_init +ffffffff820c9360 t soc21_common_sw_fini +ffffffff820c9390 t soc21_common_hw_init +ffffffff820c9470 t soc21_common_hw_fini +ffffffff820c9520 t soc21_common_suspend +ffffffff820c95d0 t soc21_common_resume +ffffffff820c97e0 t soc21_common_is_idle +ffffffff820c9810 t soc21_common_wait_for_idle +ffffffff820c9840 t soc21_common_soft_reset +ffffffff820c9870 t soc21_common_set_clockgating_state +ffffffff820c9930 t soc21_common_set_powergating_state +ffffffff820c99a0 t soc21_common_get_clockgating_state +ffffffff820c99f0 t soc21_didt_rreg +ffffffff820c9ab0 t soc21_didt_wreg +ffffffff820c9b50 t soc21_read_disabled_bios +ffffffff820c9b80 t soc21_read_register +ffffffff820c9c80 t soc21_asic_reset +ffffffff820c9d60 t soc21_asic_reset_method +ffffffff820c9e30 t soc21_get_xclk +ffffffff820c9e60 t soc21_set_uvd_clocks +ffffffff820c9e90 t soc21_set_vce_clocks +ffffffff820c9ec0 t soc21_get_config_memsize +ffffffff820c9ee0 t soc21_need_full_reset +ffffffff820c9f10 t soc21_init_doorbell_index +ffffffff820ca030 t soc21_need_reset_on_init +ffffffff820ca0e0 t soc21_pre_asic_init +ffffffff820ca110 t soc21_update_umd_stable_pstate +ffffffff820ca190 t soc21_query_video_codecs +ffffffff820cb000 t tonga_ih_early_init +ffffffff820cb050 t tonga_ih_sw_init +ffffffff820cb0e0 t tonga_ih_sw_fini +ffffffff820cb140 t tonga_ih_hw_init +ffffffff820cb3c0 t tonga_ih_hw_fini +ffffffff820cb490 t tonga_ih_suspend +ffffffff820cb560 t tonga_ih_resume +ffffffff820cb5a0 t tonga_ih_is_idle +ffffffff820cb5f0 t tonga_ih_wait_for_idle +ffffffff820cb6a0 t tonga_ih_check_soft_reset +ffffffff820cb700 t tonga_ih_pre_soft_reset +ffffffff820cb7e0 t tonga_ih_soft_reset +ffffffff820cb8e0 t tonga_ih_post_soft_reset +ffffffff820cb930 t tonga_ih_set_clockgating_state +ffffffff820cb960 t tonga_ih_set_powergating_state +ffffffff820cb990 t tonga_ih_get_wptr +ffffffff820cbac0 t tonga_ih_decode_iv +ffffffff820cbb40 t tonga_ih_set_rptr +ffffffff820cc000 t umc_v6_0_init_registers +ffffffff820cd000 t umc_v6_1_query_ras_error_count +ffffffff820cd5c0 t umc_v6_1_query_ras_error_address +ffffffff820cd8f0 t umc_v6_1_err_cnt_init +ffffffff820ce000 T umc_v6_7_convert_error_address +ffffffff820ce3a0 t umc_v6_7_query_ras_error_count +ffffffff820ce3e0 t umc_v6_7_query_ras_error_address +ffffffff820ce400 t umc_v6_7_query_ras_poison_mode +ffffffff820ce460 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff820ce480 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff820ce4a0 t umc_v6_7_query_ecc_error_count +ffffffff820ce7a0 t umc_v6_7_reset_error_count_per_channel +ffffffff820ce8e0 t umc_v6_7_query_error_address +ffffffff820cea10 t umc_v6_7_ecc_info_querry_ecc_error_count +ffffffff820cec20 t umc_v6_7_ecc_info_query_error_address +ffffffff820cf000 t umc_v8_10_query_ras_error_count +ffffffff820cf040 t umc_v8_10_query_ras_error_address +ffffffff820cf060 t umc_v8_10_err_cnt_init +ffffffff820cf080 t umc_v8_10_query_ras_poison_mode +ffffffff820cf0b0 t umc_v8_10_ecc_info_query_ras_error_count +ffffffff820cf0d0 t umc_v8_10_ecc_info_query_ras_error_address +ffffffff820cf0f0 t umc_v8_10_set_eeprom_table_version +ffffffff820cf120 t umc_v8_10_query_ecc_error_count +ffffffff820cf200 t umc_v8_10_clear_error_count_per_channel +ffffffff820cf270 t umc_v8_10_query_error_address +ffffffff820cf3b0 t umc_v8_10_convert_error_address +ffffffff820cf5e0 t umc_v8_10_err_cnt_init_per_channel +ffffffff820cf6b0 t umc_v8_10_ecc_info_query_ecc_error_count +ffffffff820cf7a0 t umc_v8_10_ecc_info_query_error_address +ffffffff820d0000 t umc_v8_7_query_ras_error_count +ffffffff820d0370 t umc_v8_7_query_ras_error_address +ffffffff820d0540 t umc_v8_7_err_cnt_init +ffffffff820d06d0 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff820d0800 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff820d1000 t uvd_v5_0_early_init +ffffffff820d1050 t uvd_v5_0_sw_init +ffffffff820d1170 t uvd_v5_0_sw_fini +ffffffff820d11d0 t uvd_v5_0_hw_init +ffffffff820d1780 t uvd_v5_0_hw_fini +ffffffff820d1810 t uvd_v5_0_suspend +ffffffff820d1950 t uvd_v5_0_resume +ffffffff820d19b0 t uvd_v5_0_is_idle +ffffffff820d1a00 t uvd_v5_0_wait_for_idle +ffffffff820d1a90 t uvd_v5_0_soft_reset +ffffffff820d1b80 t uvd_v5_0_set_clockgating_state +ffffffff820d1d80 t uvd_v5_0_set_powergating_state +ffffffff820d1dd0 t uvd_v5_0_get_clockgating_state +ffffffff820d1e70 t uvd_v5_0_ring_get_rptr +ffffffff820d1ec0 t uvd_v5_0_ring_get_wptr +ffffffff820d1f10 t uvd_v5_0_ring_set_wptr +ffffffff820d1f40 t uvd_v5_0_ring_emit_ib +ffffffff820d21e0 t uvd_v5_0_ring_emit_fence +ffffffff820d2800 t uvd_v5_0_ring_test_ring +ffffffff820d29d0 t uvd_v5_0_ring_insert_nop +ffffffff820d2b30 t uvd_v5_0_set_interrupt_state +ffffffff820d2b60 t uvd_v5_0_process_interrupt +ffffffff820d2bd0 t uvd_v5_0_stop +ffffffff820d2d50 t uvd_v5_0_start +ffffffff820d4000 t uvd_v6_0_early_init +ffffffff820d4190 t uvd_v6_0_sw_init +ffffffff820d4450 t uvd_v6_0_sw_fini +ffffffff820d4520 t uvd_v6_0_hw_init +ffffffff820d4b90 t uvd_v6_0_hw_fini +ffffffff820d4c20 t uvd_v6_0_suspend +ffffffff820d4d60 t uvd_v6_0_resume +ffffffff820d4dc0 t uvd_v6_0_is_idle +ffffffff820d4e10 t uvd_v6_0_wait_for_idle +ffffffff820d4ea0 t uvd_v6_0_check_soft_reset +ffffffff820d4f30 t uvd_v6_0_pre_soft_reset +ffffffff820d4f80 t uvd_v6_0_soft_reset +ffffffff820d5080 t uvd_v6_0_post_soft_reset +ffffffff820d5150 t uvd_v6_0_set_clockgating_state +ffffffff820d5340 t uvd_v6_0_set_powergating_state +ffffffff820d53c0 t uvd_v6_0_get_clockgating_state +ffffffff820d5470 t uvd_v6_0_ring_get_rptr +ffffffff820d54c0 t uvd_v6_0_ring_get_wptr +ffffffff820d5510 t uvd_v6_0_ring_set_wptr +ffffffff820d5540 t uvd_v6_0_ring_emit_ib +ffffffff820d58e0 t uvd_v6_0_ring_emit_fence +ffffffff820d5f00 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff820d6340 t uvd_v6_0_ring_emit_vm_flush +ffffffff820d66e0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff820d6710 t uvd_v6_0_ring_test_ring +ffffffff820d68e0 t uvd_v6_0_ring_insert_nop +ffffffff820d6a40 t uvd_v6_0_ring_emit_wreg +ffffffff820d6cf0 t uvd_v6_0_enc_ring_get_rptr +ffffffff820d6d50 t uvd_v6_0_enc_ring_get_wptr +ffffffff820d6db0 t uvd_v6_0_enc_ring_set_wptr +ffffffff820d6df0 t uvd_v6_0_enc_ring_emit_ib +ffffffff820d7060 t uvd_v6_0_enc_ring_emit_fence +ffffffff820d72c0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff820d7490 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff820d76c0 t uvd_v6_0_enc_ring_test_ring +ffffffff820d7830 t uvd_v6_0_enc_ring_test_ib +ffffffff820d7d90 t uvd_v6_0_enc_ring_insert_end +ffffffff820d7e20 t uvd_v6_0_set_interrupt_state +ffffffff820d7e50 t uvd_v6_0_process_interrupt +ffffffff820d7f50 t uvd_v6_0_stop +ffffffff820d80d0 t uvd_v6_0_start +ffffffff820d9000 t uvd_v7_0_early_init +ffffffff820d9290 t uvd_v7_0_sw_init +ffffffff820d9720 t uvd_v7_0_sw_fini +ffffffff820d9830 t uvd_v7_0_hw_init +ffffffff820dcd00 t uvd_v7_0_hw_fini +ffffffff820dd0b0 t uvd_v7_0_suspend +ffffffff820dd190 t uvd_v7_0_resume +ffffffff820dd1f0 t uvd_v7_0_set_clockgating_state +ffffffff820dd220 t uvd_v7_0_ring_get_rptr +ffffffff820dd2c0 t uvd_v7_0_ring_get_wptr +ffffffff820dd360 t uvd_v7_0_ring_set_wptr +ffffffff820dd3e0 t uvd_v7_0_ring_patch_cs_in_place +ffffffff820dd450 t uvd_v7_0_ring_emit_ib +ffffffff820dd840 t uvd_v7_0_ring_emit_fence +ffffffff820ddf00 t uvd_v7_0_ring_emit_vm_flush +ffffffff820ddf70 t uvd_v7_0_ring_emit_hdp_flush +ffffffff820ddfa0 t uvd_v7_0_ring_test_ring +ffffffff820de270 t uvd_v7_0_ring_insert_nop +ffffffff820de410 t uvd_v7_0_ring_emit_wreg +ffffffff820de700 t uvd_v7_0_ring_emit_reg_wait +ffffffff820deae0 t uvd_v7_0_enc_ring_get_rptr +ffffffff820debe0 t uvd_v7_0_enc_ring_get_wptr +ffffffff820decf0 t uvd_v7_0_enc_ring_set_wptr +ffffffff820dedf0 t uvd_v7_0_enc_ring_emit_ib +ffffffff820df060 t uvd_v7_0_enc_ring_emit_fence +ffffffff820df2c0 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff820df330 t uvd_v7_0_enc_ring_test_ring +ffffffff820df4b0 t uvd_v7_0_enc_ring_test_ib +ffffffff820dfa10 t uvd_v7_0_enc_ring_insert_end +ffffffff820dfaa0 t uvd_v7_0_enc_ring_emit_wreg +ffffffff820dfc00 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff820dfdd0 t uvd_v7_0_set_interrupt_state +ffffffff820dfe00 t uvd_v7_0_process_interrupt +ffffffff820e0000 t vce_v3_0_early_init +ffffffff820e01a0 t vce_v3_0_sw_init +ffffffff820e0340 t vce_v3_0_sw_fini +ffffffff820e03a0 t vce_v3_0_hw_init +ffffffff820e04a0 t vce_v3_0_hw_fini +ffffffff820e05a0 t vce_v3_0_suspend +ffffffff820e06b0 t vce_v3_0_resume +ffffffff820e07d0 t vce_v3_0_is_idle +ffffffff820e0840 t vce_v3_0_wait_for_idle +ffffffff820e0900 t vce_v3_0_check_soft_reset +ffffffff820e0a30 t vce_v3_0_pre_soft_reset +ffffffff820e0b00 t vce_v3_0_soft_reset +ffffffff820e0c00 t vce_v3_0_post_soft_reset +ffffffff820e0cd0 t vce_v3_0_set_clockgating_state +ffffffff820e10b0 t vce_v3_0_set_powergating_state +ffffffff820e1c00 t vce_v3_0_get_clockgating_state +ffffffff820e1cf0 t vce_v3_0_ring_get_rptr +ffffffff820e1de0 t vce_v3_0_ring_get_wptr +ffffffff820e1ed0 t vce_v3_0_ring_set_wptr +ffffffff820e1fa0 t vce_v3_0_ring_emit_ib +ffffffff820e2210 t vce_v3_0_emit_pipeline_sync +ffffffff820e23e0 t vce_v3_0_emit_vm_flush +ffffffff820e2680 t vce_v3_0_set_interrupt_state +ffffffff820e2700 t vce_v3_0_process_interrupt +ffffffff820e27e0 t vce_v3_0_stop +ffffffff820e3000 t vce_v4_0_early_init +ffffffff820e30c0 t vce_v4_0_sw_init +ffffffff820e33d0 t vce_v4_0_sw_fini +ffffffff820e3470 t vce_v4_0_hw_init +ffffffff820e3cc0 t vce_v4_0_hw_fini +ffffffff820e3e30 t vce_v4_0_suspend +ffffffff820e3fa0 t vce_v4_0_resume +ffffffff820e4070 t vce_v4_0_set_clockgating_state +ffffffff820e40a0 t vce_v4_0_set_powergating_state +ffffffff820e41b0 t vce_v4_0_ring_get_rptr +ffffffff820e4220 t vce_v4_0_ring_get_wptr +ffffffff820e42b0 t vce_v4_0_ring_set_wptr +ffffffff820e4340 t vce_v4_0_ring_emit_ib +ffffffff820e45b0 t vce_v4_0_ring_emit_fence +ffffffff820e4810 t vce_v4_0_emit_vm_flush +ffffffff820e4880 t vce_v4_0_ring_insert_end +ffffffff820e4910 t vce_v4_0_emit_wreg +ffffffff820e4a70 t vce_v4_0_emit_reg_wait +ffffffff820e4c40 t vce_v4_0_set_interrupt_state +ffffffff820e4cd0 t vce_v4_0_process_interrupt +ffffffff820e4d80 t vce_v4_0_start +ffffffff820e6000 T vcn_dec_sw_ring_emit_fence +ffffffff820e6260 T vcn_dec_sw_ring_insert_end +ffffffff820e62f0 T vcn_dec_sw_ring_emit_ib +ffffffff820e6560 T vcn_dec_sw_ring_emit_reg_wait +ffffffff820e6730 T vcn_dec_sw_ring_emit_vm_flush +ffffffff820e67a0 T vcn_dec_sw_ring_emit_wreg +ffffffff820e7000 T vcn_v1_0_set_pg_for_begin_use +ffffffff820e7160 T vcn_v1_0_ring_end_use +ffffffff820e71d0 t vcn_v1_0_early_init +ffffffff820e7340 t vcn_v1_0_sw_init +ffffffff820e7640 t vcn_v1_0_sw_fini +ffffffff820e76b0 t vcn_v1_0_hw_init +ffffffff820e77b0 t vcn_v1_0_hw_fini +ffffffff820e78d0 t vcn_v1_0_suspend +ffffffff820e7960 t vcn_v1_0_resume +ffffffff820e7a80 t vcn_v1_0_is_idle +ffffffff820e7b20 t vcn_v1_0_wait_for_idle +ffffffff820e7b60 t vcn_v1_0_set_clockgating_state +ffffffff820e7c30 t vcn_v1_0_set_powergating_state +ffffffff820e82a0 t vcn_v1_0_dec_ring_get_rptr +ffffffff820e8330 t vcn_v1_0_dec_ring_get_wptr +ffffffff820e83c0 t vcn_v1_0_dec_ring_set_wptr +ffffffff820e84e0 t vcn_v1_0_ring_patch_cs_in_place +ffffffff820e86d0 t vcn_v1_0_dec_ring_emit_ib +ffffffff820e8aa0 t vcn_v1_0_dec_ring_emit_fence +ffffffff820e9130 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff820e91a0 t vcn_v1_0_dec_ring_insert_nop +ffffffff820e9340 t vcn_v1_0_dec_ring_insert_start +ffffffff820e9530 t vcn_v1_0_dec_ring_insert_end +ffffffff820e9640 t vcn_v1_0_ring_begin_use +ffffffff820e9700 t vcn_v1_0_dec_ring_emit_wreg +ffffffff820e99e0 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff820e9da0 t vcn_v1_0_enc_ring_get_rptr +ffffffff820e9e80 t vcn_v1_0_enc_ring_get_wptr +ffffffff820e9f60 t vcn_v1_0_enc_ring_set_wptr +ffffffff820ea020 t vcn_v1_0_enc_ring_emit_ib +ffffffff820ea290 t vcn_v1_0_enc_ring_emit_fence +ffffffff820ea4f0 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff820ea560 t vcn_v1_0_enc_ring_insert_end +ffffffff820ea5f0 t vcn_v1_0_enc_ring_emit_wreg +ffffffff820ea750 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff820ea920 t vcn_v1_0_set_interrupt_state +ffffffff820ea950 t vcn_v1_0_process_interrupt +ffffffff820eaa10 t vcn_v1_0_idle_work_handler +ffffffff820eabc0 t vcn_v1_0_pause_dpg_mode +ffffffff820ebc90 t vcn_v1_0_enable_clock_gating +ffffffff820ec130 t vcn_v1_0_disable_clock_gating +ffffffff820ec790 t vcn_1_0_enable_static_power_gating +ffffffff820ec960 t vcn_v1_0_start_dpg_mode +ffffffff820f1190 t vcn_v1_0_start_spg_mode +ffffffff820f39f0 t vcn_v1_0_clock_gating_dpg_mode +ffffffff820f5000 T vcn_v2_0_dec_ring_insert_start +ffffffff820f51d0 T vcn_v2_0_dec_ring_insert_end +ffffffff820f52d0 T vcn_v2_0_dec_ring_insert_nop +ffffffff820f5450 T vcn_v2_0_dec_ring_emit_fence +ffffffff820f5a80 T vcn_v2_0_dec_ring_emit_ib +ffffffff820f5e20 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff820f61b0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff820f6220 T vcn_v2_0_dec_ring_emit_wreg +ffffffff820f64d0 T vcn_v2_0_enc_ring_emit_fence +ffffffff820f6730 T vcn_v2_0_enc_ring_insert_end +ffffffff820f67c0 T vcn_v2_0_enc_ring_emit_ib +ffffffff820f6a30 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff820f6c00 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff820f6c70 T vcn_v2_0_enc_ring_emit_wreg +ffffffff820f6dd0 T vcn_v2_0_dec_ring_test_ring +ffffffff820f70b0 t vcn_v2_0_early_init +ffffffff820f7220 t vcn_v2_0_sw_init +ffffffff820f75c0 t vcn_v2_0_sw_fini +ffffffff820f7670 t vcn_v2_0_hw_init +ffffffff820f80b0 t vcn_v2_0_hw_fini +ffffffff820f81d0 t vcn_v2_0_suspend +ffffffff820f8200 t vcn_v2_0_resume +ffffffff820f8260 t vcn_v2_0_is_idle +ffffffff820f8300 t vcn_v2_0_wait_for_idle +ffffffff820f8340 t vcn_v2_0_set_clockgating_state +ffffffff820f83f0 t vcn_v2_0_set_powergating_state +ffffffff820f8ab0 t vcn_v2_0_dec_ring_get_rptr +ffffffff820f8b40 t vcn_v2_0_dec_ring_get_wptr +ffffffff820f8bf0 t vcn_v2_0_dec_ring_set_wptr +ffffffff820f8d30 t vcn_v2_0_enc_ring_get_rptr +ffffffff820f8e10 t vcn_v2_0_enc_ring_get_wptr +ffffffff820f8f10 t vcn_v2_0_enc_ring_set_wptr +ffffffff820f9000 t vcn_v2_0_set_interrupt_state +ffffffff820f9030 t vcn_v2_0_process_interrupt +ffffffff820f90f0 t vcn_v2_0_pause_dpg_mode +ffffffff820f99c0 t vcn_v2_0_enable_clock_gating +ffffffff820f9c80 t vcn_v2_0_disable_clock_gating +ffffffff820fa110 t vcn_v2_0_start +ffffffff820ff0e0 t vcn_v2_0_enable_static_power_gating +ffffffff820ff260 t vcn_v2_0_clock_gating_dpg_mode +ffffffff82100140 t vcn_v2_0_mc_resume_dpg_mode +ffffffff82105000 t vcn_v2_6_query_poison_status +ffffffff821050e0 t vcn_v2_5_early_init +ffffffff821053e0 t vcn_v2_5_sw_init +ffffffff82105930 t vcn_v2_5_sw_fini +ffffffff82105a20 t vcn_v2_5_hw_init +ffffffff82106530 t vcn_v2_5_hw_fini +ffffffff821066e0 t vcn_v2_5_suspend +ffffffff82106710 t vcn_v2_5_resume +ffffffff82106770 t vcn_v2_5_is_idle +ffffffff82106870 t vcn_v2_5_wait_for_idle +ffffffff82106920 t vcn_v2_5_set_clockgating_state +ffffffff821069b0 t vcn_v2_5_set_powergating_state +ffffffff821091b0 t vcn_v2_5_dec_ring_get_rptr +ffffffff82109250 t vcn_v2_5_dec_ring_get_wptr +ffffffff82109310 t vcn_v2_5_dec_ring_set_wptr +ffffffff821093c0 t vcn_v2_5_enc_ring_get_rptr +ffffffff821094c0 t vcn_v2_5_enc_ring_get_wptr +ffffffff821095d0 t vcn_v2_5_enc_ring_set_wptr +ffffffff821096e0 t vcn_v2_5_set_interrupt_state +ffffffff82109710 t vcn_v2_5_process_interrupt +ffffffff82109830 t vcn_v2_6_set_ras_interrupt_state +ffffffff82109860 t vcn_v2_5_pause_dpg_mode +ffffffff8210a0a0 t vcn_v2_5_enable_clock_gating +ffffffff8210a400 t vcn_v2_5_disable_clock_gating +ffffffff8210a970 t vcn_v2_5_start_dpg_mode +ffffffff8210e910 t vcn_v2_5_clock_gating_dpg_mode +ffffffff8210f820 t vcn_v2_5_mc_resume_dpg_mode +ffffffff82115000 t vcn_v3_0_early_init +ffffffff82115230 t vcn_v3_0_sw_init +ffffffff82115750 t vcn_v3_0_sw_fini +ffffffff82115850 t vcn_v3_0_hw_init +ffffffff82116470 t vcn_v3_0_hw_fini +ffffffff82116590 t vcn_v3_0_suspend +ffffffff821165c0 t vcn_v3_0_resume +ffffffff82116620 t vcn_v3_0_is_idle +ffffffff82116720 t vcn_v3_0_wait_for_idle +ffffffff821167d0 t vcn_v3_0_set_clockgating_state +ffffffff821168f0 t vcn_v3_0_set_powergating_state +ffffffff821194e0 t vcn_v3_0_dec_ring_get_rptr +ffffffff82119580 t vcn_v3_0_dec_ring_get_wptr +ffffffff82119640 t vcn_v3_0_dec_ring_set_wptr +ffffffff821197b0 t vcn_v3_0_ring_patch_cs_in_place +ffffffff82119b30 t vcn_v3_0_enc_ring_get_rptr +ffffffff82119c30 t vcn_v3_0_enc_ring_get_wptr +ffffffff82119d40 t vcn_v3_0_enc_ring_set_wptr +ffffffff82119e50 t vcn_v3_0_set_interrupt_state +ffffffff82119e80 t vcn_v3_0_process_interrupt +ffffffff82119fa0 t vcn_v3_0_pause_dpg_mode +ffffffff8211a8c0 t vcn_v3_0_enable_clock_gating +ffffffff8211ab90 t vcn_v3_0_disable_clock_gating +ffffffff8211b150 t vcn_v3_0_start_dpg_mode +ffffffff8211e960 t vcn_v3_0_clock_gating_dpg_mode +ffffffff8211f8a0 t vcn_v3_0_mc_resume_dpg_mode +ffffffff82125000 t vcn_v4_0_query_ras_poison_status +ffffffff821250e0 t vcn_v4_0_early_init +ffffffff821252b0 t vcn_v4_0_sw_init +ffffffff821255b0 t vcn_v4_0_sw_fini +ffffffff821256b0 t vcn_v4_0_hw_init +ffffffff821261a0 t vcn_v4_0_hw_fini +ffffffff82126310 t vcn_v4_0_suspend +ffffffff82126340 t vcn_v4_0_resume +ffffffff821263a0 t vcn_v4_0_is_idle +ffffffff821264b0 t vcn_v4_0_wait_for_idle +ffffffff82126570 t vcn_v4_0_set_clockgating_state +ffffffff821266a0 t vcn_v4_0_set_powergating_state +ffffffff82127010 t vcn_v4_0_unified_ring_get_rptr +ffffffff821270f0 t vcn_v4_0_unified_ring_get_wptr +ffffffff821271f0 t vcn_v4_0_unified_ring_set_wptr +ffffffff821272f0 t vcn_v4_0_ring_patch_cs_in_place +ffffffff821276e0 t vcn_v4_0_limit_sched +ffffffff82127750 t vcn_v4_0_set_interrupt_state +ffffffff82127780 t vcn_v4_0_process_interrupt +ffffffff82127850 t vcn_v4_0_set_ras_interrupt_state +ffffffff82127880 t vcn_v4_0_pause_dpg_mode +ffffffff82127b40 t vcn_v4_0_enable_clock_gating +ffffffff82127e70 t vcn_v4_0_disable_clock_gating +ffffffff821283b0 t vcn_v4_0_start +ffffffff8212d940 t vcn_v4_0_disable_clock_gating_dpg_mode +ffffffff8212e880 t vcn_v4_0_mc_resume_dpg_mode +ffffffff82134000 t vcn_v4_0_3_early_init +ffffffff82134110 t vcn_v4_0_3_sw_init +ffffffff82134410 t vcn_v4_0_3_sw_fini +ffffffff821344e0 t vcn_v4_0_3_hw_init +ffffffff821352f0 t vcn_v4_0_3_hw_fini +ffffffff82135390 t vcn_v4_0_3_suspend +ffffffff82135410 t vcn_v4_0_3_resume +ffffffff82135470 t vcn_v4_0_3_is_idle +ffffffff82135610 t vcn_v4_0_3_wait_for_idle +ffffffff82135730 t vcn_v4_0_3_set_clockgating_state +ffffffff82135900 t vcn_v4_0_3_set_powergating_state +ffffffff821360d0 t vcn_v4_0_3_unified_ring_get_rptr +ffffffff82136270 t vcn_v4_0_3_unified_ring_get_wptr +ffffffff82136430 t vcn_v4_0_3_unified_ring_set_wptr +ffffffff82136600 t vcn_v4_0_3_set_interrupt_state +ffffffff82136630 t vcn_v4_0_3_process_interrupt +ffffffff82136770 t vcn_v4_0_3_query_ras_error_count +ffffffff82136890 t vcn_v4_0_3_reset_ras_error_count +ffffffff821369a0 t vcn_v4_0_3_pause_dpg_mode +ffffffff821369d0 t vcn_v4_0_3_enable_clock_gating +ffffffff82136d30 t vcn_v4_0_3_disable_clock_gating +ffffffff821372a0 t vcn_v4_0_3_start +ffffffff8213c360 t vcn_v4_0_3_disable_clock_gating_dpg_mode +ffffffff8213d270 t vcn_v4_0_3_mc_resume_dpg_mode +ffffffff82143000 t vega10_ih_early_init +ffffffff82143050 t vega10_ih_sw_init +ffffffff82143330 t vega10_ih_sw_fini +ffffffff82143370 t vega10_ih_hw_init +ffffffff82143780 t vega10_ih_hw_fini +ffffffff821437e0 t vega10_ih_suspend +ffffffff82143840 t vega10_ih_resume +ffffffff82143850 t vega10_ih_is_idle +ffffffff82143880 t vega10_ih_wait_for_idle +ffffffff821438b0 t vega10_ih_soft_reset +ffffffff821438e0 t vega10_ih_set_clockgating_state +ffffffff82143a40 t vega10_ih_set_powergating_state +ffffffff82143a70 t vega10_ih_get_wptr +ffffffff82143bd0 t vega10_ih_set_rptr +ffffffff82143cc0 t vega10_ih_self_irq +ffffffff82143d40 t vega10_ih_toggle_interrupts +ffffffff82144000 T vega10_reg_base_init +ffffffff82144150 T vega10_doorbell_index_init +ffffffff82145000 t vega20_ih_early_init +ffffffff82145050 t vega20_ih_sw_init +ffffffff82145360 t vega20_ih_sw_fini +ffffffff821453a0 t vega20_ih_hw_init +ffffffff82145a80 t vega20_ih_hw_fini +ffffffff82145ae0 t vega20_ih_suspend +ffffffff82145b40 t vega20_ih_resume +ffffffff82145b50 t vega20_ih_is_idle +ffffffff82145b80 t vega20_ih_wait_for_idle +ffffffff82145bb0 t vega20_ih_soft_reset +ffffffff82145be0 t vega20_ih_set_clockgating_state +ffffffff82145d20 t vega20_ih_set_powergating_state +ffffffff82145d50 t vega20_ih_get_wptr +ffffffff82145eb0 t vega20_ih_set_rptr +ffffffff82145fa0 t vega20_ih_self_irq +ffffffff82146020 t vega20_ih_toggle_interrupts +ffffffff82147000 T vega20_reg_base_init +ffffffff82147160 T vega20_doorbell_index_init +ffffffff82148000 T vi_srbm_select +ffffffff82148050 T vi_set_virt_ops +ffffffff82148090 T vi_set_ip_blocks +ffffffff82148640 T legacy_doorbell_index_init +ffffffff821486f0 t vi_common_early_init +ffffffff821489f0 t vi_common_late_init +ffffffff82148a40 t vi_common_sw_init +ffffffff82148a90 t vi_common_sw_fini +ffffffff82148ac0 t vi_common_hw_init +ffffffff821492a0 t vi_common_hw_fini +ffffffff82149320 t vi_common_suspend +ffffffff821493a0 t vi_common_resume +ffffffff821493e0 t vi_common_is_idle +ffffffff82149410 t vi_common_wait_for_idle +ffffffff82149440 t vi_common_soft_reset +ffffffff82149470 t vi_common_set_clockgating_state +ffffffff82149a70 t vi_common_set_powergating_state +ffffffff82149aa0 t vi_common_get_clockgating_state +ffffffff82149b90 t cz_smc_rreg +ffffffff82149c30 t cz_smc_wreg +ffffffff82149cb0 t vi_smc_rreg +ffffffff82149d60 t vi_smc_wreg +ffffffff82149df0 t vi_pcie_rreg +ffffffff82149eb0 t vi_pcie_wreg +ffffffff82149f70 t vi_uvd_ctx_rreg +ffffffff8214a020 t vi_uvd_ctx_wreg +ffffffff8214a0b0 t vi_didt_rreg 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+ffffffff8214d070 T amdgpu_dm_update_connector_after_detect +ffffffff8214d680 T amdgpu_dm_update_freesync_caps +ffffffff8214dc40 T dm_atomic_get_state +ffffffff8214dcb0 T amdgpu_dm_connector_atomic_set_property +ffffffff8214dd70 T amdgpu_dm_connector_atomic_get_property +ffffffff8214de10 T amdgpu_dm_connector_funcs_reset +ffffffff8214df10 T amdgpu_dm_connector_atomic_duplicate_state +ffffffff8214e020 T create_validate_stream_for_sink +ffffffff8214f950 T amdgpu_dm_connector_mode_valid +ffffffff8214fb50 T convert_dc_color_depth_into_bpc +ffffffff8214fb90 t dm_encoder_helper_disable +ffffffff8214fbc0 t dm_encoder_helper_atomic_check +ffffffff8214fdd0 T amdgpu_dm_connector_init_helper +ffffffff821501c0 T amdgpu_dm_get_encoder_crtc_mask +ffffffff82150210 T dm_restore_drm_connector_state +ffffffff821503a0 t parse_hdmi_amd_vsdb +ffffffff82150750 T amdgpu_dm_trigger_timing_sync +ffffffff82150930 T dm_write_reg_func +ffffffff82150950 T dm_read_reg_func +ffffffff82150a00 T amdgpu_dm_process_dmub_aux_transfer_sync +ffffffff82150c70 T amdgpu_dm_process_dmub_set_config_sync +ffffffff82150e10 T check_seamless_boot_capability +ffffffff82150e60 T dm_execute_dmub_cmd +ffffffff82150e80 T dm_execute_dmub_cmd_list +ffffffff82150ea0 t dm_early_init +ffffffff82151270 t dm_late_init +ffffffff82151570 t dm_sw_init +ffffffff82151b90 t dm_sw_fini +ffffffff82151c60 t amdgpu_dm_early_fini +ffffffff82151cc0 t dm_hw_init +ffffffff82153c90 t dm_hw_fini +ffffffff82153d00 t dm_suspend +ffffffff82154140 t dm_resume +ffffffff82154ba0 t dm_is_idle +ffffffff82154bd0 t dm_wait_for_idle +ffffffff82154c00 t dm_check_soft_reset +ffffffff82154c30 t dm_soft_reset +ffffffff82154c60 t dm_set_clockgating_state +ffffffff82154c90 t dm_set_powergating_state +ffffffff82154cc0 t dm_bandwidth_update +ffffffff82154cf0 t dm_vblank_get_counter +ffffffff82154d70 t dm_crtc_get_scanoutpos +ffffffff82154e60 t amdgpu_dm_dmub_reg_read +ffffffff82154f10 t amdgpu_dm_dmub_reg_write +ffffffff82154f40 t dm_dmub_hw_init +ffffffff821553a0 t dmub_aux_setconfig_callback +ffffffff82155450 t amdgpu_dm_fini +ffffffff821556a0 t emulated_link_detect +ffffffff821557b0 t amdgpu_dm_atomic_check +ffffffff821566a0 t dm_update_plane_state +ffffffff82156d50 t dm_update_crtc_state +ffffffff82157840 t dm_check_crtc_cursor +ffffffff82157bc0 t is_scaling_state_different +ffffffff82157c60 t do_aquire_global_lock +ffffffff82157f30 t dm_update_mst_vcpi_slots_for_dsc +ffffffff82158140 t dm_atomic_destroy_state +ffffffff82158180 t dm_check_cursor_fb +ffffffff82158330 t fill_dc_plane_attributes +ffffffff821585e0 t fill_dc_plane_info_and_addr +ffffffff82158930 t fill_hdr_info_packet +ffffffff82158aa0 t is_timing_unchanged_for_freesync +ffffffff82158bd0 t get_highest_refresh_rate_mode +ffffffff82158d30 t update_stream_scaling_settings +ffffffff82158e80 t amdgpu_dm_atomic_commit_tail +ffffffff8215c000 t amdgpu_dm_backlight_set_level +ffffffff8215c200 t dm_atomic_duplicate_state +ffffffff8215c2c0 t amdgpu_dm_audio_component_bind +ffffffff8215c330 t amdgpu_dm_audio_component_unbind +ffffffff8215c390 t amdgpu_dm_audio_component_get_eld +ffffffff8215c4f0 t dm_dmub_outbox1_low_irq +ffffffff8215c830 t dm_handle_hpd_work +ffffffff8215c8c0 t amdgpu_dm_encoder_destroy +ffffffff8215c900 t amdgpu_dm_i2c_xfer +ffffffff8215ca60 t amdgpu_dm_i2c_func +ffffffff8215ca90 t amdgpu_dm_connector_detect +ffffffff8215cb50 t amdgpu_dm_connector_funcs_force +ffffffff8215cc40 t amdgpu_dm_connector_late_register +ffffffff8215cdc0 t amdgpu_dm_connector_unregister +ffffffff8215cde0 t amdgpu_dm_connector_destroy +ffffffff8215cef0 t amdgpu_dm_backlight_update_status +ffffffff8215cf80 t amdgpu_dm_backlight_get_brightness +ffffffff8215d180 t get_modes +ffffffff8215d190 t amdgpu_dm_connector_atomic_check +ffffffff8215d2f0 t amdgpu_dm_connector_get_modes +ffffffff8215d970 t dm_crtc_high_irq +ffffffff8215db30 t dm_vupdate_high_irq +ffffffff8215dce0 t dm_pflip_high_irq +ffffffff8215df30 t register_hpd_handlers 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dm_helpers_parse_edid_caps +ffffffff82164290 T dm_helpers_dp_update_branch_info +ffffffff821642c0 T dm_helpers_dp_mst_write_payload_allocation_table +ffffffff821646d0 T dm_helpers_dp_mst_poll_pending_down_reply +ffffffff82164700 T dm_helpers_dp_mst_clear_payload_allocation_table +ffffffff82164730 T dm_helpers_dp_mst_poll_for_allocation_change_trigger +ffffffff821647b0 T dm_helpers_dp_mst_send_payload_allocation +ffffffff82164890 T dm_dtn_log_begin +ffffffff821648e0 T dm_dtn_log_append_v +ffffffff82164a60 T dm_dtn_log_end +ffffffff82164ab0 T dm_helpers_dp_mst_start_top_mgr +ffffffff82164b90 T dm_helpers_dp_mst_stop_top_mgr +ffffffff82164c40 T dm_helpers_dp_read_dpcd +ffffffff82164ce0 T dm_helpers_dp_write_dpcd +ffffffff82164d70 T dm_helpers_submit_i2c +ffffffff82164ec0 T dm_helpers_dp_write_dsc_enable +ffffffff82165600 T dm_helpers_is_dp_sink_present +ffffffff821656b0 T dm_helpers_read_local_edid +ffffffff82165960 T dm_helper_dmub_aux_transfer_sync +ffffffff821659b0 T dm_helpers_dmub_set_config_sync +ffffffff821659d0 T dm_set_dcn_clocks +ffffffff82165a00 T dm_helpers_smu_timeout +ffffffff82165a30 T dm_helpers_init_panel_settings +ffffffff82165aa0 T dm_helpers_override_panel_settings +ffffffff82165ae0 T dm_helpers_allocate_gpu_mem +ffffffff82165bf0 T dm_helpers_free_gpu_mem +ffffffff82165c90 T dm_helpers_dmub_outbox_interrupt_control +ffffffff82165d30 T dm_helpers_mst_enable_stream_features +ffffffff82165e60 T dm_helpers_dp_handle_test_pattern_request +ffffffff821661b0 T dm_set_phyd32clk +ffffffff821661e0 T dm_helpers_enable_periodic_detection +ffffffff82166210 T dm_helpers_dp_mst_update_branch_bandwidth +ffffffff82166240 T dm_get_adaptive_sync_support_type +ffffffff821662b0 t execute_synaptics_rc_command +ffffffff82167000 T amdgpu_dm_irq_register_interrupt +ffffffff821671d0 t dm_irq_work_func +ffffffff821671f0 T amdgpu_dm_irq_unregister_interrupt +ffffffff821673b0 T amdgpu_dm_irq_init +ffffffff821674b0 T amdgpu_dm_irq_fini +ffffffff82167680 T amdgpu_dm_irq_suspend +ffffffff821677d0 T amdgpu_dm_irq_resume_early +ffffffff821679a0 T amdgpu_dm_irq_resume_late +ffffffff82167b70 T amdgpu_dm_set_irq_funcs +ffffffff82167c30 T amdgpu_dm_outbox_init +ffffffff82167c60 T amdgpu_dm_hpd_init +ffffffff82167d30 T amdgpu_dm_hpd_fini +ffffffff82167e00 t amdgpu_dm_set_crtc_irq_state +ffffffff82167e90 t amdgpu_dm_irq_handler +ffffffff821680f0 t amdgpu_dm_set_vline0_irq_state +ffffffff82168180 t amdgpu_dm_set_dmub_outbox_irq_state +ffffffff821681e0 t amdgpu_dm_set_vupdate_irq_state +ffffffff82168270 t amdgpu_dm_set_dmub_trace_irq_state +ffffffff821682d0 t amdgpu_dm_set_pflip_irq_state +ffffffff82168360 t amdgpu_dm_set_hpd_irq_state +ffffffff82169000 T needs_dsc_aux_workaround +ffffffff82169050 T dm_dp_create_fake_mst_encoders +ffffffff82169110 T dm_handle_mst_sideband_msg_ready_event +ffffffff821693b0 T amdgpu_dm_initialize_dp_connector +ffffffff821694d0 t kasprintf +ffffffff821695b0 t dm_dp_aux_transfer +ffffffff82169700 T dm_mst_get_pbn_divider +ffffffff82169770 T compute_mst_dsc_configs_for_state +ffffffff82169a30 t is_dsc_need_re_compute +ffffffff82169c00 t compute_mst_dsc_configs_for_link +ffffffff8216a2c0 T pre_validate_dsc +ffffffff8216a8e0 T dm_dp_mst_is_port_support_mode +ffffffff8216ab80 t amdgpu_dm_encoder_destroy +ffffffff8216ab90 t dm_dp_add_mst_connector +ffffffff8216adc0 t dm_handle_mst_down_rep_msg_ready +ffffffff8216ade0 t amdgpu_dm_mst_connector_late_register +ffffffff8216ae30 t amdgpu_dm_mst_connector_early_unregister +ffffffff8216af20 t dm_dp_mst_connector_destroy +ffffffff8216afc0 t dm_dp_mst_get_modes +ffffffff8216b570 t dm_dp_mst_detect +ffffffff8216b780 t dm_mst_atomic_best_encoder +ffffffff8216b7e0 t dm_dp_mst_atomic_check +ffffffff8216b810 t set_dsc_configs_from_fairness_vars +ffffffff8216bb00 t increase_dsc_bpp +ffffffff8216c0a0 t try_disable_dsc +ffffffff8216d000 T amdgpu_dm_plane_get_format_info +ffffffff8216d020 T amdgpu_dm_plane_fill_blending_from_plane_state +ffffffff8216d120 T amdgpu_dm_plane_fill_plane_buffer_attributes +ffffffff8216d6b0 T amdgpu_dm_plane_helper_check_state +ffffffff8216d8d0 T amdgpu_dm_plane_fill_dc_scaling_info +ffffffff8216db30 T amdgpu_dm_plane_handle_cursor_update +ffffffff8216de00 T amdgpu_dm_plane_init +ffffffff8216edc0 T is_video_format +ffffffff8216ee10 t dm_drm_plane_reset +ffffffff8216eeb0 t dm_drm_plane_duplicate_state +ffffffff8216ef50 t dm_drm_plane_destroy_state +ffffffff8216ef90 t dm_plane_format_mod_supported +ffffffff8216f0c0 t dm_plane_helper_prepare_fb +ffffffff8216f400 t dm_plane_helper_cleanup_fb +ffffffff8216f4b0 t dm_plane_atomic_check +ffffffff8216f5a0 t dm_plane_atomic_async_check +ffffffff8216f5e0 t dm_plane_atomic_async_update +ffffffff8216f690 t amdgpu_bo_reserve +ffffffff8216f8d0 t amdgpu_bo_unreserve +ffffffff82170000 T dm_pp_apply_display_requirements +ffffffff821701f0 T dm_pp_get_clock_levels_by_type +ffffffff821705b0 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff821707a0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff82170990 T dm_pp_notify_wm_clock_changes +ffffffff821709f0 T dm_pp_apply_power_level_change_request +ffffffff82170a20 T dm_pp_apply_clock_for_voltage_request +ffffffff82170ad0 T dm_pp_get_static_clocks +ffffffff82170ba0 T dm_pp_get_funcs +ffffffff82170cb0 t pp_rv_set_wm_ranges +ffffffff82170e40 t pp_rv_set_pme_wa_enable +ffffffff82170e60 t pp_rv_set_active_display_count +ffffffff82170e80 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff82170ea0 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff82170ec0 t pp_rv_set_hard_min_fclk_by_freq +ffffffff82170ee0 t pp_nv_set_display_count +ffffffff82170f40 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff82170fb0 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff82171010 t pp_nv_set_voltage_by_freq +ffffffff821710b0 t pp_nv_set_wm_ranges +ffffffff82171100 t pp_nv_set_hard_min_uclk_by_freq +ffffffff82171170 t pp_nv_get_maximum_sustainable_clocks +ffffffff821711d0 t pp_nv_get_uclk_dpm_states +ffffffff82171230 t pp_nv_set_pstate_handshake_support +ffffffff82171290 t pp_rn_set_wm_ranges +ffffffff821712e0 t pp_rn_get_dpm_clock_table +ffffffff82172000 T amdgpu_dm_set_psr_caps +ffffffff82172160 T amdgpu_dm_link_setup_psr +ffffffff82172320 T amdgpu_dm_psr_enable +ffffffff82172430 T amdgpu_dm_psr_disable +ffffffff821724c0 T amdgpu_dm_psr_disable_all +ffffffff82173000 T amdgpu_dm_setup_replay +ffffffff82173100 T amdgpu_dm_replay_enable +ffffffff821732b0 T amdgpu_dm_replay_disable +ffffffff82174000 T dm_get_elapse_time_in_ns +ffffffff82174030 T dm_perf_trace_timestamp +ffffffff82175000 T dc_assert_fp_enabled +ffffffff82175080 T dc_fpu_begin +ffffffff821750d0 T dc_fpu_end +ffffffff82176000 T dal_vector_construct +ffffffff821760e0 T dal_vector_presized_create +ffffffff821763a0 T dal_vector_create +ffffffff821764e0 T dal_vector_destruct +ffffffff82176540 T dal_vector_destroy +ffffffff821765d0 T dal_vector_get_count +ffffffff82176600 T dal_vector_at_index +ffffffff82176640 T dal_vector_remove_at_index +ffffffff821766e0 T dal_vector_set_at_index +ffffffff82176740 T dal_vector_insert_at +ffffffff82176870 T dal_vector_reserve +ffffffff82176930 T dal_vector_append +ffffffff82176a60 T dal_vector_clone +ffffffff82176b20 T dal_vector_capacity +ffffffff82176b50 T dal_vector_clear +ffffffff82177000 T fixed_point_to_int_frac +ffffffff82177220 T convert_float_matrix +ffffffff821772f0 T reduce_fraction +ffffffff82178000 T is_rgb_cspace +ffffffff82178090 T is_lower_pipe_tree_visible +ffffffff82178100 T is_upper_pipe_tree_visible +ffffffff82178170 T is_pipe_tree_visible +ffffffff82178200 T build_prescale_params +ffffffff82179000 T dc_fixpt_from_fraction +ffffffff821791e0 T dc_fixpt_mul +ffffffff821793a0 T dc_fixpt_sqr +ffffffff82179520 T dc_fixpt_recip +ffffffff82179590 T dc_fixpt_sinc +ffffffff821797d0 T dc_fixpt_sin +ffffffff82179800 T dc_fixpt_cos +ffffffff82179920 T dc_fixpt_exp +ffffffff82179c40 t fixed31_32_exp_from_taylor_series +ffffffff8217a110 T dc_fixpt_log +ffffffff8217a350 T dc_fixpt_u4d19 +ffffffff8217a390 T dc_fixpt_u3d19 +ffffffff8217a3d0 T dc_fixpt_u2d19 +ffffffff8217a410 T dc_fixpt_u0d19 +ffffffff8217a440 T dc_fixpt_clamp_u0d14 +ffffffff8217a490 T dc_fixpt_clamp_u0d10 +ffffffff8217a4e0 T dc_fixpt_s4d19 +ffffffff8217b000 T bios_parser_create +ffffffff8217c380 t bios_parser_get_connectors_number +ffffffff8217c3e0 t bios_parser_get_connector_id +ffffffff8217c490 t bios_parser_get_src_obj +ffffffff8217c5c0 t bios_parser_get_i2c_info +ffffffff8217c800 t bios_parser_get_hpd_info +ffffffff8217c8f0 t bios_parser_get_device_tag +ffffffff8217cb10 t bios_parser_get_spread_spectrum_info +ffffffff8217cd20 t bios_parser_get_ss_entry_number +ffffffff8217cf80 t bios_parser_get_embedded_panel_info +ffffffff8217d510 t bios_parser_get_gpio_pin_info +ffffffff8217d630 t bios_parser_get_encoder_cap_info +ffffffff8217d740 t bios_parser_set_scratch_critical_state +ffffffff8217d750 t bios_parser_is_device_id_supported +ffffffff8217d810 t bios_parser_encoder_control +ffffffff8217d850 t bios_parser_transmitter_control +ffffffff8217d890 t bios_parser_enable_crtc +ffffffff8217d8e0 t bios_parser_adjust_pixel_clock +ffffffff8217d920 t bios_parser_set_pixel_clock +ffffffff8217d960 t bios_parser_set_dce_clock +ffffffff8217d9a0 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff8217d9f0 t bios_parser_program_crtc_timing +ffffffff8217da30 t bios_parser_program_display_engine_pll +ffffffff8217da70 t bios_parser_enable_disp_power_gating +ffffffff8217dab0 t bios_parser_destroy +ffffffff8217db90 t bios_get_board_layout_info +ffffffff8217de30 t get_bios_object +ffffffff8217e030 t get_ss_info_from_ss_info_table +ffffffff8217e230 t get_ss_info_v3_1 +ffffffff8217e3a0 t get_ss_entry_number_from_ss_info_tbl +ffffffff8217f000 T firmware_parser_create +ffffffff82181000 t bios_parser_get_connectors_number +ffffffff82181170 t bios_parser_get_connector_id +ffffffff821811d0 t bios_parser_get_src_obj +ffffffff821814b0 t bios_parser_get_i2c_info +ffffffff82181780 t bios_parser_get_hpd_info +ffffffff82181920 t bios_parser_get_device_tag +ffffffff82181c10 t bios_parser_get_spread_spectrum_info +ffffffff821820c0 t bios_parser_get_ss_entry_number +ffffffff821820f0 t bios_parser_get_embedded_panel_info +ffffffff82182300 t bios_parser_get_gpio_pin_info +ffffffff82182420 t bios_parser_get_encoder_cap_info +ffffffff82182590 t bios_parser_is_accelerated_mode +ffffffff821825a0 t bios_parser_set_scratch_critical_state +ffffffff821825b0 t bios_parser_is_device_id_supported +ffffffff82182620 t bios_parser_encoder_control +ffffffff82182660 t bios_parser_transmitter_control +ffffffff821826a0 t bios_parser_enable_crtc +ffffffff821826f0 t bios_parser_set_pixel_clock +ffffffff82182730 t bios_parser_set_dce_clock +ffffffff82182770 t bios_parser_program_crtc_timing +ffffffff821827b0 t bios_parser_enable_disp_power_gating +ffffffff821827f0 t firmware_parser_destroy +ffffffff821828d0 t bios_get_board_layout_info +ffffffff82182dc0 t bios_parser_pack_data_tables +ffffffff82182df0 t bios_get_atom_dc_golden_table +ffffffff82182f50 t bios_parser_enable_lvtma_control +ffffffff82182fa0 t bios_parser_get_soc_bb_info +ffffffff821830b0 t bios_parser_get_disp_connector_caps_info +ffffffff82183230 t bios_parser_get_lttpr_caps +ffffffff821833a0 t bios_parser_get_lttpr_interop +ffffffff82183500 t bios_parser_get_connector_speed_cap_info +ffffffff82183650 t get_bios_object +ffffffff821837c0 t get_bios_object_from_path_v3 +ffffffff82184000 T object_id_from_bios_object_id +ffffffff82185000 T bios_get_image +ffffffff82185050 T bios_is_accelerated_mode +ffffffff821850b0 T bios_set_scratch_acc_mode_change +ffffffff821850f0 T bios_set_scratch_critical_state +ffffffff82185130 T bios_get_vga_enabled_displays +ffffffff82186000 T dal_bios_parser_create +ffffffff82186070 T dal_bios_parser_destroy +ffffffff82187000 T dal_bios_parser_init_cmd_tbl +ffffffff82187910 t encoder_control_digx_v3 +ffffffff82187a30 t encoder_control_digx_v4 +ffffffff82187b50 t encoder_control_digx_v5 +ffffffff82187cb0 t encoder_control_dig1_v1 +ffffffff82187d50 t encoder_control_dig2_v1 +ffffffff82187df0 t encoder_control_dig_v1 +ffffffff82187e50 t transmitter_control_v2 +ffffffff82188000 t transmitter_control_v3 +ffffffff821881d0 t transmitter_control_v4 +ffffffff82188390 t transmitter_control_v1_5 +ffffffff82188530 t transmitter_control_v1_6 +ffffffff821886b0 t set_pixel_clock_v3 +ffffffff82188850 t set_pixel_clock_v5 +ffffffff82188a20 t set_pixel_clock_v6 +ffffffff82188bf0 t set_pixel_clock_v7 +ffffffff82188e00 t enable_spread_spectrum_on_ppll_v1 +ffffffff82188f20 t enable_spread_spectrum_on_ppll_v2 +ffffffff82189060 t enable_spread_spectrum_on_ppll_v3 +ffffffff82189180 t adjust_display_pll_v2 +ffffffff821892f0 t adjust_display_pll_v3 +ffffffff82189490 t dac1_encoder_control_v1 +ffffffff82189510 t dac2_encoder_control_v1 +ffffffff82189590 t dac1_output_control_v1 +ffffffff82189600 t dac2_output_control_v1 +ffffffff82189670 t set_crtc_using_dtd_timing_v3 +ffffffff821897e0 t set_crtc_timing_v1 +ffffffff82189980 t enable_crtc_v1 +ffffffff82189a30 t enable_crtc_mem_req_v1 +ffffffff82189ae0 t program_clock_v5 +ffffffff82189c00 t program_clock_v6 +ffffffff82189d30 t external_encoder_control_v3 +ffffffff82189f00 t enable_disp_power_gating_v2_1 +ffffffff82189fe0 t set_dce_clock_v2_1 +ffffffff8218b000 T dal_firmware_parser_init_cmd_tbl +ffffffff8218b460 t encoder_control_digx_v1_5 +ffffffff8218b650 t encoder_control_fallback +ffffffff8218b6b0 t transmitter_control_v1_6 +ffffffff8218b880 t transmitter_control_v1_7 +ffffffff8218baa0 t transmitter_control_fallback +ffffffff8218bb00 t set_pixel_clock_v7 +ffffffff8218bd90 t set_pixel_clock_fallback +ffffffff8218bdf0 t set_crtc_using_dtd_timing_v3 +ffffffff8218bf60 t enable_crtc_v1 +ffffffff8218c010 t external_encoder_control_v3 +ffffffff8218c040 t enable_disp_power_gating_v2_1 +ffffffff8218c1c0 t enable_disp_power_gating_fallback +ffffffff8218c220 t set_dce_clock_v2_1 +ffffffff8218c360 t get_smu_clock_info_v3_1 +ffffffff8218c3d0 t enable_lvtma_control +ffffffff8218d000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff8218d0c0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff8218d1e0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff8218d270 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff8218d300 T dal_cmd_table_helper_assign_control_parameter +ffffffff8218d3e0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff8218d4c0 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff8218e000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff8218e0d0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff8218e1e0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff8218e270 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff8218e300 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff8218e3e0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff8218f000 T dal_cmd_tbl_helper_dce110_get_table ffffffff8218f030 t encoder_action_to_atom ffffffff8218f0b0 t engine_bp_to_atom ffffffff8218f100 t clock_source_id_to_atom -ffffffff8218f1d0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff8218f220 t signal_type_to_atom_dig_mode -ffffffff8218f280 t hpd_sel_to_atom -ffffffff8218f2c0 t dig_encoder_sel_to_atom -ffffffff8218f2f0 t phy_id_to_atom -ffffffff8218f330 t disp_power_gating_action_to_atom -ffffffff8218f3a0 t dc_clock_type_to_atom -ffffffff8218f420 t transmitter_color_depth_to_atom -ffffffff82190000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff8218f1a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff8218f1f0 t signal_type_to_atom_dig_mode +ffffffff8218f250 t hpd_sel_to_atom +ffffffff8218f290 t dig_encoder_sel_to_atom +ffffffff8218f2c0 t phy_id_to_atom +ffffffff8218f300 t disp_power_gating_action_to_atom +ffffffff82190000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff82190030 t encoder_action_to_atom ffffffff821900b0 t engine_bp_to_atom ffffffff82190100 t clock_source_id_to_atom @@ -31819,7 +31811,7 @@ ffffffff821902f0 t phy_id_to_atom ffffffff82190330 t disp_power_gating_action_to_atom ffffffff821903a0 t dc_clock_type_to_atom ffffffff82190420 t transmitter_color_depth_to_atom -ffffffff82191000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff82191000 T dal_cmd_tbl_helper_dce112_get_table ffffffff82191030 t encoder_action_to_atom ffffffff821910b0 t engine_bp_to_atom ffffffff82191100 t clock_source_id_to_atom @@ -31827,26431 +31819,26443 @@ ffffffff821911d0 t clock_source_id_to_atom_phy_clk_src ffffffff82191220 t signal_type_to_atom_dig_mode ffffffff82191280 t hpd_sel_to_atom ffffffff821912c0 t dig_encoder_sel_to_atom -ffffffff82191310 t phy_id_to_atom -ffffffff82191350 t disp_power_gating_action_to_atom -ffffffff82192000 T clk_mgr_helper_get_active_display_cnt -ffffffff821920e0 T clk_mgr_helper_get_active_plane_cnt -ffffffff82192190 T clk_mgr_exit_optimized_pwr_state -ffffffff821922b0 T clk_mgr_optimize_pwr_state -ffffffff821923b0 T dc_clk_mgr_create -ffffffff82192b90 T dc_destroy_clk_mgr -ffffffff82193000 T dentist_get_divider_from_did -ffffffff82193070 T dce_adjust_dp_ref_freq_for_ss -ffffffff82193190 T dce_get_dp_ref_freq_khz -ffffffff821932e0 T dce12_get_dp_ref_freq_khz -ffffffff82193300 T dce_get_max_pixel_clock_for_all_paths -ffffffff82193510 T dce_get_required_clocks_state -ffffffff821935c0 T dce_set_clock -ffffffff82193730 T dce_clock_read_ss_info -ffffffff82193870 T dce_clk_mgr_construct -ffffffff82193a70 t dce_update_clocks -ffffffff82194000 T dce110_get_min_vblank_time_us -ffffffff82194090 T dce110_fill_display_configs -ffffffff82194310 T dce11_pplib_apply_display_requirements -ffffffff82194620 T dce110_clk_mgr_construct -ffffffff821946d0 t dce11_update_clocks -ffffffff82195000 T dce112_set_clock -ffffffff821951a0 T dce112_set_dispclk -ffffffff821952d0 T dce112_set_dprefclk -ffffffff82195350 T dce112_clk_mgr_construct -ffffffff82195410 t dce112_update_clocks -ffffffff82196000 T dce120_clk_mgr_construct -ffffffff821960a0 T dce121_clk_mgr_construct -ffffffff821961e0 t dce12_update_clocks -ffffffff82197000 T rv1_clk_mgr_construct -ffffffff821970c0 t rv1_update_clocks -ffffffff82197600 t rv1_init_clocks -ffffffff82197690 t rv1_enable_pme_wa -ffffffff82198000 T rv1_vbios_smu_set_dispclk -ffffffff821980f0 t rv1_vbios_smu_send_msg_with_param -ffffffff82198230 T rv1_vbios_smu_set_dprefclk -ffffffff82199000 T rv2_clk_mgr_construct -ffffffff8219a000 T dentist_get_did_from_divider -ffffffff8219a080 T dcn20_update_clocks_update_dpp_dto -ffffffff8219a160 T dcn20_update_clocks_update_dentist -ffffffff8219a6f0 T dcn2_update_clocks -ffffffff8219ace0 T dcn2_read_clocks_from_hw_dentist -ffffffff8219add0 T dcn2_update_clocks_fpga -ffffffff8219af00 T dcn2_init_clocks -ffffffff8219afa0 T dcn2_get_clock -ffffffff8219b010 T dcn20_clk_mgr_construct -ffffffff8219b160 t dcn2_enable_pme_wa -ffffffff8219b1b0 t dcn2_are_clock_states_equal -ffffffff8219b220 t dcn2_notify_link_rate_change -ffffffff8219c000 T dcn201_clk_mgr_construct -ffffffff8219c130 t dcn201_update_clocks -ffffffff8219c370 t dcn201_init_clocks -ffffffff8219d000 T rn_clk_mgr_construct -ffffffff8219d970 t rn_update_clocks -ffffffff8219df70 t rn_set_low_power_state -ffffffff8219e160 t rn_init_clocks -ffffffff8219e200 t rn_enable_pme_wa -ffffffff8219e210 t rn_are_clock_states_equal -ffffffff8219e260 t rn_notify_wm_ranges -ffffffff8219e600 t rn_notify_link_rate_change -ffffffff8219f000 T rn_vbios_smu_get_smu_version -ffffffff8219f020 t rn_vbios_smu_send_msg_with_param -ffffffff8219f200 T rn_vbios_smu_set_dispclk -ffffffff8219f330 T rn_vbios_smu_set_dprefclk -ffffffff8219f3a0 T rn_vbios_smu_set_hard_min_dcfclk -ffffffff8219f420 T rn_vbios_smu_set_min_deep_sleep_dcfclk -ffffffff8219f4a0 T rn_vbios_smu_set_phyclk -ffffffff8219f4e0 T rn_vbios_smu_set_dppclk -ffffffff8219f5a0 T rn_vbios_smu_set_dcn_low_power_state -ffffffff8219f5c0 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn -ffffffff8219f5e0 T rn_vbios_smu_enable_pme_wa -ffffffff8219f600 T rn_vbios_smu_is_periodic_retraining_disabled -ffffffff821a0000 T dcn3_init_clocks -ffffffff821a0470 t dcn3_init_clocks_fpga -ffffffff821a0480 T dcn3_clk_mgr_construct -ffffffff821a0600 T dcn3_clk_mgr_destroy -ffffffff821a0670 t dcn3_update_clocks -ffffffff821a0ad0 t dcn3_enable_pme_wa -ffffffff821a0b10 t dcn3_are_clock_states_equal -ffffffff821a0b70 t dcn3_notify_wm_ranges -ffffffff821a0e20 t dcn30_notify_link_rate_change -ffffffff821a0f40 t dcn3_set_hard_min_memclk -ffffffff821a0fe0 t dcn3_set_hard_max_memclk -ffffffff821a1040 t dcn3_set_max_memclk -ffffffff821a1080 t dcn3_set_min_memclk -ffffffff821a10c0 t dcn3_get_memclk_states_from_smu -ffffffff821a1220 t dcn3_is_smu_present -ffffffff821a2000 T dcn30_smu_test_message -ffffffff821a2070 t dcn30_smu_send_msg_with_param -ffffffff821a2220 T dcn30_smu_get_smu_version -ffffffff821a2240 T dcn30_smu_check_driver_if_version -ffffffff821a22a0 T dcn30_smu_check_msg_header_version -ffffffff821a2300 T dcn30_smu_set_dram_addr_high -ffffffff821a2320 T dcn30_smu_set_dram_addr_low -ffffffff821a2340 T dcn30_smu_transfer_wm_table_smu_2_dram -ffffffff821a2360 T dcn30_smu_transfer_wm_table_dram_2_smu -ffffffff821a2380 T dcn30_smu_set_hard_min_by_freq -ffffffff821a23e0 T dcn30_smu_set_hard_max_by_freq -ffffffff821a2440 T dcn30_smu_get_dpm_freq_by_index -ffffffff821a24a0 T dcn30_smu_get_dc_mode_max_dpm_freq -ffffffff821a2500 T dcn30_smu_set_min_deep_sleep_dcef_clk -ffffffff821a2520 T dcn30_smu_set_num_of_displays -ffffffff821a2540 T dcn30_smu_set_display_refresh_from_mall -ffffffff821a2570 T dcn30_smu_set_external_client_df_cstate_allow -ffffffff821a2590 T dcn30_smu_set_pme_workaround -ffffffff821a3000 T dcn301_smu_get_smu_version -ffffffff821a3080 t dcn301_smu_send_msg_with_param -ffffffff821a3250 T dcn301_smu_set_dispclk -ffffffff821a3300 T dcn301_smu_set_dprefclk -ffffffff821a33c0 T dcn301_smu_set_hard_min_dcfclk -ffffffff821a3470 T dcn301_smu_set_min_deep_sleep_dcfclk -ffffffff821a3520 T dcn301_smu_set_dppclk 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hpd_ack -ffffffff82479000 T dal_irq_service_dce120_create -ffffffff82479090 t hpd_ack -ffffffff8247a000 T dal_irq_service_dce80_create +ffffffff821912f0 t phy_id_to_atom +ffffffff82191330 t disp_power_gating_action_to_atom +ffffffff821913a0 t dc_clock_type_to_atom +ffffffff82191420 t transmitter_color_depth_to_atom +ffffffff82192000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff82192030 t encoder_action_to_atom +ffffffff821920b0 t engine_bp_to_atom +ffffffff82192100 t clock_source_id_to_atom +ffffffff821921d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff82192220 t signal_type_to_atom_dig_mode +ffffffff82192280 t hpd_sel_to_atom +ffffffff821922c0 t dig_encoder_sel_to_atom +ffffffff82192310 t phy_id_to_atom +ffffffff82192350 t disp_power_gating_action_to_atom +ffffffff82193000 T clk_mgr_helper_get_active_display_cnt +ffffffff821930e0 T clk_mgr_helper_get_active_plane_cnt +ffffffff82193190 T clk_mgr_exit_optimized_pwr_state +ffffffff821932b0 T clk_mgr_optimize_pwr_state +ffffffff821933b0 T dc_clk_mgr_create +ffffffff82193b90 T dc_destroy_clk_mgr +ffffffff82194000 T dentist_get_divider_from_did +ffffffff82194070 T dce_adjust_dp_ref_freq_for_ss +ffffffff82194190 T dce_get_dp_ref_freq_khz +ffffffff821942e0 T dce12_get_dp_ref_freq_khz +ffffffff82194300 T dce_get_max_pixel_clock_for_all_paths +ffffffff82194510 T dce_get_required_clocks_state +ffffffff821945c0 T dce_set_clock +ffffffff82194730 T dce_clock_read_ss_info +ffffffff82194870 T dce_clk_mgr_construct +ffffffff82194a70 t dce_update_clocks +ffffffff82195000 T dce110_get_min_vblank_time_us +ffffffff82195090 T dce110_fill_display_configs +ffffffff82195310 T dce11_pplib_apply_display_requirements +ffffffff82195620 T dce110_clk_mgr_construct +ffffffff821956d0 t dce11_update_clocks +ffffffff82196000 T dce112_set_clock +ffffffff821961a0 T dce112_set_dispclk +ffffffff821962d0 T dce112_set_dprefclk +ffffffff82196350 T dce112_clk_mgr_construct +ffffffff82196410 t dce112_update_clocks +ffffffff82197000 T dce120_clk_mgr_construct +ffffffff821970a0 T dce121_clk_mgr_construct +ffffffff821971e0 t dce12_update_clocks +ffffffff82198000 T rv1_clk_mgr_construct +ffffffff821980c0 t rv1_update_clocks +ffffffff82198600 t rv1_init_clocks +ffffffff82198690 t rv1_enable_pme_wa +ffffffff82199000 T rv1_vbios_smu_set_dispclk +ffffffff821990f0 t rv1_vbios_smu_send_msg_with_param +ffffffff82199230 T rv1_vbios_smu_set_dprefclk +ffffffff8219a000 T rv2_clk_mgr_construct +ffffffff8219b000 T dentist_get_did_from_divider +ffffffff8219b080 T dcn20_update_clocks_update_dpp_dto +ffffffff8219b160 T dcn20_update_clocks_update_dentist +ffffffff8219b6f0 T dcn2_update_clocks +ffffffff8219bce0 T dcn2_read_clocks_from_hw_dentist +ffffffff8219bdd0 T dcn2_update_clocks_fpga +ffffffff8219bf00 T dcn2_init_clocks +ffffffff8219bfa0 T dcn2_get_clock +ffffffff8219c010 T dcn20_clk_mgr_construct +ffffffff8219c160 t dcn2_enable_pme_wa +ffffffff8219c1b0 t dcn2_are_clock_states_equal +ffffffff8219c220 t dcn2_notify_link_rate_change +ffffffff8219d000 T dcn201_clk_mgr_construct +ffffffff8219d130 t dcn201_update_clocks +ffffffff8219d370 t dcn201_init_clocks +ffffffff8219e000 T rn_clk_mgr_construct +ffffffff8219e970 t rn_update_clocks +ffffffff8219ef70 t rn_set_low_power_state +ffffffff8219f160 t rn_init_clocks +ffffffff8219f200 t rn_enable_pme_wa +ffffffff8219f210 t rn_are_clock_states_equal +ffffffff8219f260 t rn_notify_wm_ranges +ffffffff8219f600 t rn_notify_link_rate_change +ffffffff821a0000 T rn_vbios_smu_get_smu_version +ffffffff821a0020 t rn_vbios_smu_send_msg_with_param +ffffffff821a0200 T rn_vbios_smu_set_dispclk +ffffffff821a0330 T rn_vbios_smu_set_dprefclk +ffffffff821a03a0 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff821a0420 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff821a04a0 T rn_vbios_smu_set_phyclk +ffffffff821a04e0 T rn_vbios_smu_set_dppclk +ffffffff821a05a0 T rn_vbios_smu_set_dcn_low_power_state +ffffffff821a05c0 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff821a05e0 T rn_vbios_smu_enable_pme_wa +ffffffff821a0600 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff821a1000 T dcn3_init_clocks +ffffffff821a1470 t dcn3_init_clocks_fpga +ffffffff821a1480 T dcn3_clk_mgr_construct +ffffffff821a1600 T dcn3_clk_mgr_destroy +ffffffff821a1670 t dcn3_update_clocks +ffffffff821a1ad0 t dcn3_enable_pme_wa +ffffffff821a1b10 t dcn3_are_clock_states_equal +ffffffff821a1b70 t dcn3_notify_wm_ranges +ffffffff821a1e20 t dcn30_notify_link_rate_change +ffffffff821a1f40 t dcn3_set_hard_min_memclk +ffffffff821a1fe0 t dcn3_set_hard_max_memclk +ffffffff821a2040 t dcn3_set_max_memclk +ffffffff821a2080 t dcn3_set_min_memclk +ffffffff821a20c0 t dcn3_get_memclk_states_from_smu +ffffffff821a2220 t dcn3_is_smu_present +ffffffff821a3000 T dcn30_smu_test_message +ffffffff821a3070 t dcn30_smu_send_msg_with_param +ffffffff821a3220 T dcn30_smu_get_smu_version +ffffffff821a3240 T dcn30_smu_check_driver_if_version +ffffffff821a32a0 T dcn30_smu_check_msg_header_version +ffffffff821a3300 T dcn30_smu_set_dram_addr_high +ffffffff821a3320 T dcn30_smu_set_dram_addr_low +ffffffff821a3340 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff821a3360 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff821a3380 T dcn30_smu_set_hard_min_by_freq +ffffffff821a33e0 T dcn30_smu_set_hard_max_by_freq +ffffffff821a3440 T dcn30_smu_get_dpm_freq_by_index +ffffffff821a34a0 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff821a3500 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff821a3520 T dcn30_smu_set_num_of_displays +ffffffff821a3540 T dcn30_smu_set_display_refresh_from_mall +ffffffff821a3570 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff821a3590 T dcn30_smu_set_pme_workaround +ffffffff821a4000 T dcn301_smu_get_smu_version +ffffffff821a4080 t dcn301_smu_send_msg_with_param +ffffffff821a4250 T dcn301_smu_set_dispclk +ffffffff821a4300 T dcn301_smu_set_dprefclk +ffffffff821a43c0 T dcn301_smu_set_hard_min_dcfclk +ffffffff821a4470 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff821a4520 T dcn301_smu_set_dppclk +ffffffff821a45d0 T dcn301_smu_set_display_idle_optimization +ffffffff821a4630 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff821a4690 T dcn301_smu_enable_pme_wa +ffffffff821a46b0 T dcn301_smu_set_dram_addr_high +ffffffff821a4710 T dcn301_smu_set_dram_addr_low +ffffffff821a4770 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff821a4790 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff821a5000 T vg_clk_mgr_construct +ffffffff821a5930 T vg_clk_mgr_destroy +ffffffff821a5980 t vg_update_clocks +ffffffff821a5d00 t vg_init_clocks +ffffffff821a5da0 t vg_enable_pme_wa +ffffffff821a5db0 t vg_are_clock_states_equal +ffffffff821a5e00 t vg_notify_wm_ranges +ffffffff821a7000 T dcn31_update_clocks +ffffffff821a76a0 T dcn31_init_clocks +ffffffff821a7750 T dcn31_are_clock_states_equal +ffffffff821a77b0 T dcn31_get_dtb_ref_freq_khz +ffffffff821a77e0 T dcn31_clk_mgr_construct +ffffffff821a7f50 T dcn31_clk_mgr_destroy +ffffffff821a7fa0 t dcn31_set_low_power_state +ffffffff821a81c0 t dcn31_enable_pme_wa +ffffffff821a81d0 t dcn31_notify_wm_ranges +ffffffff821a8570 t find_clk_for_voltage +ffffffff821a9000 T dcn31_smu_get_smu_version +ffffffff821a9020 t dcn31_smu_send_msg_with_param +ffffffff821a9290 T dcn31_smu_set_dispclk +ffffffff821a9310 T dcn31_smu_set_dprefclk +ffffffff821a9390 T dcn31_smu_set_hard_min_dcfclk +ffffffff821a9420 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff821a94b0 T dcn31_smu_set_dppclk +ffffffff821a9530 T dcn31_smu_set_display_idle_optimization +ffffffff821a9580 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff821a95d0 T dcn31_smu_enable_pme_wa +ffffffff821a9610 T dcn31_smu_set_dram_addr_high +ffffffff821a9650 T dcn31_smu_set_dram_addr_low +ffffffff821a9690 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff821a96d0 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff821a9710 T dcn31_smu_set_zstate_support +ffffffff821a9780 T dcn31_smu_set_dtbclk +ffffffff821aa000 T dcn314_update_clocks +ffffffff821aa6d0 T dcn314_are_clock_states_equal +ffffffff821aa730 T dcn314_clk_mgr_construct +ffffffff821ab4f0 T dcn314_clk_mgr_destroy +ffffffff821ab540 t dcn314_enable_pme_wa +ffffffff821ab550 t dcn314_notify_wm_ranges +ffffffff821ac000 T dcn314_smu_get_smu_version +ffffffff821ac020 t dcn314_smu_send_msg_with_param +ffffffff821ac2b0 T dcn314_smu_set_dispclk +ffffffff821ac330 T dcn314_smu_set_dprefclk +ffffffff821ac3b0 T dcn314_smu_set_hard_min_dcfclk +ffffffff821ac440 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff821ac4d0 T dcn314_smu_set_dppclk +ffffffff821ac550 T dcn314_smu_set_display_idle_optimization +ffffffff821ac5a0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff821ac5f0 T dcn314_smu_enable_pme_wa +ffffffff821ac630 T dcn314_smu_set_dram_addr_high +ffffffff821ac670 T dcn314_smu_set_dram_addr_low +ffffffff821ac6b0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff821ac6f0 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff821ac730 T dcn314_smu_set_zstate_support +ffffffff821ac780 T dcn314_smu_set_dtbclk +ffffffff821ad000 T dcn315_clk_mgr_construct +ffffffff821ad890 T dcn315_clk_mgr_destroy +ffffffff821ad8e0 t dcn315_update_clocks +ffffffff821adef0 t dcn315_enable_pme_wa +ffffffff821adf00 t dcn315_notify_wm_ranges +ffffffff821ae2a0 t dcn315_disable_otg_wa +ffffffff821af000 T dcn315_smu_get_smu_version +ffffffff821af020 t dcn315_smu_send_msg_with_param +ffffffff821af3d0 T dcn315_smu_set_dispclk +ffffffff821af450 T dcn315_smu_set_hard_min_dcfclk +ffffffff821af4e0 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff821af570 T dcn315_smu_set_dppclk +ffffffff821af5f0 T dcn315_smu_set_display_idle_optimization +ffffffff821af640 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff821af690 T dcn315_smu_enable_pme_wa +ffffffff821af6d0 T dcn315_smu_set_dram_addr_high +ffffffff821af710 T dcn315_smu_set_dram_addr_low +ffffffff821af750 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff821af790 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff821af7d0 T dcn315_smu_get_dpref_clk +ffffffff821af830 T dcn315_smu_get_dtbclk +ffffffff821af890 T dcn315_smu_set_dtbclk +ffffffff821b0000 T dcn316_clk_mgr_construct +ffffffff821b06e0 T dcn316_clk_mgr_destroy +ffffffff821b0730 t dcn316_update_clocks +ffffffff821b0da0 t dcn316_enable_pme_wa +ffffffff821b0db0 t dcn316_notify_wm_ranges +ffffffff821b1150 t find_clk_for_voltage +ffffffff821b2000 T dcn316_smu_get_smu_version +ffffffff821b2020 t dcn316_smu_send_msg_with_param +ffffffff821b2200 T dcn316_smu_set_dispclk +ffffffff821b2280 T dcn316_smu_set_hard_min_dcfclk +ffffffff821b2310 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff821b23a0 T dcn316_smu_set_dppclk +ffffffff821b2420 T dcn316_smu_set_display_idle_optimization +ffffffff821b2470 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff821b24c0 T dcn316_smu_set_dram_addr_high +ffffffff821b2500 T dcn316_smu_set_dram_addr_low +ffffffff821b2540 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff821b2580 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff821b25c0 T dcn316_smu_enable_pme_wa +ffffffff821b2600 T dcn316_smu_set_dtbclk +ffffffff821b2640 T dcn316_smu_get_dpref_clk +ffffffff821b26a0 T dcn316_smu_get_smu_fclk +ffffffff821b3000 T dcn32_init_clocks +ffffffff821b3620 T dcn32_update_clocks_update_dpp_dto +ffffffff821b3760 T dcn32_clk_mgr_construct +ffffffff821b3a40 t dcn32_dump_clk_registers +ffffffff821b3ce0 T dcn32_clk_mgr_destroy +ffffffff821b3d50 t dcn32_update_clocks +ffffffff821b46b0 t dcn32_enable_pme_wa +ffffffff821b46f0 t dcn32_are_clock_states_equal +ffffffff821b4760 t dcn32_notify_wm_ranges +ffffffff821b48f0 t dcn32_set_hard_min_memclk +ffffffff821b4980 t dcn32_set_hard_max_memclk +ffffffff821b49d0 t dcn32_set_max_memclk +ffffffff821b4a10 t dcn32_set_min_memclk +ffffffff821b4a50 t dcn32_get_memclk_states_from_smu +ffffffff821b4ce0 t dcn32_is_smu_present +ffffffff821b4d10 t dcn32_get_dispclk_from_dentist +ffffffff821b4db0 t dcn32_update_clocks_update_dentist +ffffffff821b6000 T dcn32_smu_send_fclk_pstate_message +ffffffff821b6020 t dcn32_smu_send_msg_with_param +ffffffff821b61a0 T dcn32_smu_send_cab_for_uclk_message +ffffffff821b61d0 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff821b61f0 T dcn32_smu_set_pme_workaround +ffffffff821b6210 T dcn32_smu_set_hard_min_by_freq +ffffffff821b6270 T dcn32_smu_wait_for_dmub_ack_mclk +ffffffff821b7000 T dc_stream_adjust_vmin_vmax +ffffffff821b7170 T dc_stream_get_last_used_drr_vtotal +ffffffff821b72e0 T dc_stream_get_crtc_position +ffffffff821b7540 T dc_stream_configure_crc +ffffffff821b76c0 T dc_stream_get_crc +ffffffff821b77b0 T dc_stream_set_dyn_expansion +ffffffff821b7a40 T dc_stream_set_dither_option +ffffffff821b7be0 T dc_stream_set_gamut_remap +ffffffff821b7d90 T dc_stream_program_csc_matrix +ffffffff821b7ff0 T dc_stream_set_static_screen_params +ffffffff821b8180 T dc_create +ffffffff821b87c0 t dc_construct_ctx +ffffffff821b8960 t dc_destruct +ffffffff821b8cc0 T dc_hardware_init +ffffffff821b8d90 T dc_init_callbacks +ffffffff821b8de0 T dc_deinit_callbacks +ffffffff821b8e30 T dc_destroy +ffffffff821b8ea0 T dc_validate_boot_timing +ffffffff821b92b0 T dc_enable_stereo +ffffffff821b93c0 T dc_trigger_sync +ffffffff821b9a20 T dc_z10_restore +ffffffff821b9a60 T dc_z10_save_init +ffffffff821b9aa0 T dc_commit_streams +ffffffff821b9ff0 t commit_minimal_transition_state +ffffffff821ba470 T dc_create_state +ffffffff821ba510 t dc_commit_state_no_check +ffffffff821bbe40 T dc_release_state +ffffffff821bbeb0 T dc_acquire_release_mpc_3dlut +ffffffff821bbf80 T dc_post_update_surfaces_to_stream +ffffffff821bc400 T dc_copy_state +ffffffff821bc5f0 T dc_retain_state +ffffffff821bc620 T dc_set_generic_gpio_for_stereo +ffffffff821bc780 T dc_check_update_surfaces_for_stream +ffffffff821bd190 T dc_dmub_update_dirty_rect +ffffffff821bd3a0 T dc_update_planes_and_stream +ffffffff821be040 t fast_update_only +ffffffff821be3a0 t commit_planes_for_stream_fast +ffffffff821be7f0 t commit_planes_for_stream +ffffffff821bff50 T dc_commit_updates_for_stream +ffffffff821c0630 t copy_surface_update_to_plane +ffffffff821c0a50 t copy_stream_update_to_stream +ffffffff821c1150 T dc_get_current_stream_count +ffffffff821c1190 T dc_get_stream_at_index +ffffffff821c11e0 T dc_interrupt_to_irq_source +ffffffff821c1200 T dc_interrupt_set +ffffffff821c1250 T dc_interrupt_ack +ffffffff821c1270 T dc_power_down_on_boot +ffffffff821c12c0 T dc_set_power_state +ffffffff821c14f0 T dc_resume +ffffffff821c1570 T dc_is_dmcu_initialized +ffffffff821c15c0 T get_clock_requirements_for_state +ffffffff821c1640 T dc_set_clock +ffffffff821c1680 T dc_get_clock +ffffffff821c16c0 T dc_set_psr_allow_active +ffffffff821c17d0 T dc_allow_idle_optimizations +ffffffff821c1880 T dc_unlock_memory_clock_frequency +ffffffff821c1900 T dc_lock_memory_clock_frequency +ffffffff821c19a0 T dc_enable_dcmode_clk_limit +ffffffff821c1b70 t blank_and_force_memclk +ffffffff821c1da0 T dc_is_plane_eligible_for_idle_optimizations +ffffffff821c1e00 T dc_hardware_release +ffffffff821c1e50 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff821c1e90 T dc_is_dmub_outbox_supported +ffffffff821c1f00 T dc_enable_dmub_notifications +ffffffff821c1f70 T dc_enable_dmub_outbox +ffffffff821c1fc0 T dc_process_dmub_aux_transfer_async +ffffffff821c2150 T get_link_index_from_dpia_port_index +ffffffff821c2210 T dc_process_dmub_set_config_async +ffffffff821c22f0 T dc_process_dmub_set_mst_slots +ffffffff821c23e0 T dc_process_dmub_dpia_hpd_int_enable +ffffffff821c24b0 T dc_print_dmub_diagnostic_data +ffffffff821c24d0 T dc_disable_accelerated_mode +ffffffff821c24f0 T dc_notify_vsync_int_state +ffffffff821c2720 T dc_abm_save_restore +ffffffff821c2910 T dc_query_current_properties +ffffffff821c2980 T dc_set_edp_power +ffffffff821c29f0 t create_links +ffffffff821c2ea0 t create_link_encoders +ffffffff821c2f90 t dc_update_viusal_confirm_color +ffffffff821c4000 T pre_surface_trace +ffffffff821c4030 T update_surface_trace +ffffffff821c4060 T post_surface_trace +ffffffff821c4090 T context_timing_trace +ffffffff821c4260 T context_clock_trace +ffffffff821c4290 T dc_status_to_str +ffffffff821c5000 T find_color_matrix +ffffffff821c50b0 T color_space_to_black_color +ffffffff821c5120 T hwss_wait_for_blank_complete +ffffffff821c51d0 T get_mpctree_visual_confirm_color +ffffffff821c5230 T get_surface_visual_confirm_color +ffffffff821c52e0 T get_hdr_visual_confirm_color +ffffffff821c53a0 T get_subvp_visual_confirm_color +ffffffff821c54a0 T hwss_build_fast_sequence +ffffffff821c5b60 T hwss_execute_sequence +ffffffff821c5fc0 T hwss_setup_dpp +ffffffff821c6060 T hwss_program_bias_and_scale +ffffffff821c60e0 T hwss_program_manual_trigger +ffffffff821c6130 T hwss_power_on_mpc_mem_pwr +ffffffff821c6180 T hwss_set_output_csc +ffffffff821c61d0 T hwss_set_ocsc_default +ffffffff821c6220 T hwss_send_dmcub_cmd +ffffffff821c6240 T get_mclk_switch_visual_confirm_color +ffffffff821c63a0 T get_surface_tile_visual_confirm_color +ffffffff821c7000 T link_enc_cfg_init +ffffffff821c71f0 T link_enc_cfg_copy +ffffffff821c7220 T link_enc_cfg_link_encs_assign +ffffffff821c86c0 T link_enc_cfg_validate +ffffffff821c8e70 T link_enc_cfg_link_enc_unassign +ffffffff821c9000 T link_enc_cfg_is_transmitter_mappable +ffffffff821c9120 T link_enc_cfg_get_stream_using_link_enc +ffffffff821c9220 T link_enc_cfg_get_link_using_link_enc +ffffffff821c9330 T link_enc_cfg_get_link_enc_used_by_link +ffffffff821c94b0 T link_enc_cfg_get_next_avail_link_enc +ffffffff821c9620 T link_enc_cfg_get_link_enc_used_by_stream +ffffffff821c9640 T link_enc_cfg_get_link_enc +ffffffff821c96d0 T link_enc_cfg_get_link_enc_used_by_stream_current +ffffffff821c9850 T link_enc_cfg_is_link_enc_avail +ffffffff821c9a50 T link_enc_cfg_set_transient_mode +ffffffff821ca000 T dc_get_link_at_index +ffffffff821ca030 T dc_get_edp_links +ffffffff821ca0b0 T dc_get_edp_link_panel_inst +ffffffff821ca170 T dc_link_detect +ffffffff821ca1a0 T dc_link_detect_connection_type +ffffffff821ca1d0 T dc_link_get_status +ffffffff821ca200 T dc_link_is_hdcp14 +ffffffff821ca230 T dc_link_is_hdcp22 +ffffffff821ca260 T dc_link_clear_dprx_states +ffffffff821ca290 T dc_link_reset_cur_dp_mst_topology +ffffffff821ca2c0 T dc_link_bandwidth_kbps +ffffffff821ca2f0 T dc_get_cur_link_res_map +ffffffff821ca310 T dc_restore_link_res_map +ffffffff821ca330 T dc_link_update_dsc_config +ffffffff821ca360 T dc_is_oem_i2c_device_present +ffffffff821ca3b0 T dc_submit_i2c +ffffffff821ca3e0 T dc_submit_i2c_oem +ffffffff821ca430 T dc_link_dp_handle_automated_test +ffffffff821ca460 T dc_link_dp_set_test_pattern +ffffffff821ca490 T dc_link_set_drive_settings +ffffffff821ca530 T dc_link_set_preferred_link_settings +ffffffff821ca550 T dc_link_set_preferred_training_settings +ffffffff821ca580 T dc_dp_trace_is_initialized +ffffffff821ca5b0 T dc_dp_trace_set_is_logged_flag +ffffffff821ca5e0 T dc_dp_trace_is_logged +ffffffff821ca610 T dc_dp_trace_get_lt_end_timestamp +ffffffff821ca640 T dc_dp_trace_get_lt_counts +ffffffff821ca670 T dc_dp_trace_get_link_loss_count +ffffffff821ca6a0 T dc_link_add_remote_sink +ffffffff821ca6d0 T dc_link_remove_remote_sink +ffffffff821ca700 T dc_link_aux_transfer_raw +ffffffff821ca730 T dc_link_bw_kbps_from_raw_frl_link_rate_data +ffffffff821ca750 T dc_link_decide_edp_link_settings +ffffffff821ca780 T dc_link_dp_get_max_link_enc_cap +ffffffff821ca7b0 T dc_link_dp_mst_decide_link_encoding_format +ffffffff821ca7e0 T dc_link_get_link_cap +ffffffff821ca810 T dc_link_get_highest_encoding_format +ffffffff821ca8e0 T dc_link_is_dp_sink_present +ffffffff821ca910 T dc_link_is_fec_supported +ffffffff821ca940 T dc_link_overwrite_extended_receiver_cap +ffffffff821ca970 T dc_link_should_enable_fec +ffffffff821ca9a0 T dc_link_dp_dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff821ca9d0 T dc_link_handle_usb4_bw_alloc_response +ffffffff821caa00 T dc_link_check_link_loss_status +ffffffff821caa30 T dc_link_dp_allow_hpd_rx_irq +ffffffff821caa60 T dc_link_dp_handle_link_loss +ffffffff821caa90 T dc_link_dp_read_hpd_rx_irq_data +ffffffff821caac0 T dc_link_handle_hpd_rx_irq +ffffffff821caaf0 T dc_link_dp_receiver_power_ctrl +ffffffff821cab20 T dc_link_decide_lttpr_mode +ffffffff821cab50 T dc_link_edp_panel_backlight_power_on +ffffffff821cab80 T dc_link_get_backlight_level +ffffffff821cabb0 T dc_link_get_backlight_level_nits +ffffffff821cabe0 T dc_link_set_backlight_level +ffffffff821cac10 T dc_link_set_backlight_level_nits +ffffffff821cac40 T dc_link_get_target_backlight_pwm +ffffffff821cac70 T dc_link_get_psr_state +ffffffff821caca0 T dc_link_set_psr_allow_active +ffffffff821cacd0 T dc_link_setup_psr +ffffffff821cad00 T dc_link_get_replay_state +ffffffff821cad30 T dc_link_wait_for_t12 +ffffffff821cad60 T dc_link_get_hpd_state +ffffffff821cad90 T dc_link_enable_hpd +ffffffff821cadc0 T dc_link_disable_hpd +ffffffff821cadf0 T dc_link_enable_hpd_filter +ffffffff821cae20 T dc_link_dp_dpia_validate +ffffffff821cb000 T resource_parse_asic_id +ffffffff821cb250 T dc_create_resource_pool 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resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine +ffffffff821cd920 T resource_is_for_mpcc_combine +ffffffff821cd9b0 T resource_find_any_free_pipe +ffffffff821cda20 T resource_get_otg_master_for_stream +ffffffff821cdb50 T resource_get_opp_head +ffffffff821cdbf0 T dc_add_plane_to_context +ffffffff821cdef0 T dc_remove_plane_from_context +ffffffff821ce0f0 T dc_rem_all_planes_for_stream +ffffffff821ce2b0 T dc_add_all_planes_for_stream +ffffffff821ce430 T dc_is_timing_changed +ffffffff821ce4a0 T dc_is_stream_unchanged +ffffffff821ce590 T dc_is_stream_scaling_unchanged +ffffffff821ce640 T update_audio_usage +ffffffff821ce6b0 T dc_add_stream_to_ctx +ffffffff821ce7a0 T dc_remove_stream_from_ctx +ffffffff821cebf0 T resource_map_pool_resources +ffffffff821cf6e0 t acquire_first_split_pipe +ffffffff821cf860 t add_hpo_dp_link_enc_to_ctx +ffffffff821cf930 t find_first_free_audio +ffffffff821cf9f0 T dc_resource_state_copy_construct_current +ffffffff821cfa10 T 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resource_transmitter_to_phy_idx +ffffffff821d2530 T get_link_hwss +ffffffff821d25f0 T is_h_timing_divisible_by_2 +ffffffff821d2650 T dc_resource_acquire_secondary_pipe_for_mpc_odm +ffffffff821d2880 T update_dp_encoder_resources_for_test_harness +ffffffff821d2b40 t calculate_plane_rec_in_timing_active +ffffffff821d2e60 t calculate_init_and_vp +ffffffff821d4000 T dc_sink_retain +ffffffff821d4030 T dc_sink_release +ffffffff821d40b0 T dc_sink_create +ffffffff821d5000 T dc_stat_get_dmub_notification +ffffffff821d50d0 T dc_stat_get_dmub_dataout +ffffffff821d6000 T update_stream_signal +ffffffff821d6080 T dc_stream_retain +ffffffff821d60b0 T dc_stream_release +ffffffff821d6150 T dc_create_stream_for_sink +ffffffff821d64b0 T dc_copy_stream +ffffffff821d6590 T dc_stream_get_status_from_state +ffffffff821d65f0 T dc_stream_get_status +ffffffff821d6660 T dc_optimize_timing_for_fsft +ffffffff821d66b0 T dc_stream_set_cursor_attributes +ffffffff821d68f0 t program_cursor_attributes +ffffffff821d6a80 T dc_stream_set_cursor_position +ffffffff821d6be0 t program_cursor_position +ffffffff821d6d40 T dc_stream_add_writeback +ffffffff821d6f60 T dc_stream_remove_writeback +ffffffff821d70a0 T dc_stream_warmup_writeback +ffffffff821d70e0 T dc_stream_get_vblank_counter +ffffffff821d71b0 T dc_stream_send_dp_sdp +ffffffff821d74c0 T dc_stream_get_scanoutpos +ffffffff821d75a0 T dc_stream_dmdata_status_done +ffffffff821d7660 T dc_stream_set_dynamic_metadata +ffffffff821d77d0 T dc_stream_add_dsc_to_resource +ffffffff821d7820 T dc_stream_get_pipe_ctx +ffffffff821d78d0 T dc_stream_log +ffffffff821d8000 T enable_surface_flip_reporting +ffffffff821d8030 T dc_create_plane_state +ffffffff821d8200 T dc_plane_get_status +ffffffff821d8390 T dc_plane_state_retain +ffffffff821d83c0 T dc_plane_state_release +ffffffff821d8510 T dc_gamma_retain +ffffffff821d8540 T dc_gamma_release +ffffffff821d85a0 T dc_create_gamma +ffffffff821d8600 T dc_transfer_func_retain +ffffffff821d8630 T dc_transfer_func_release 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hubp1_set_vm_system_aperture_settings +ffffffff82243b10 t hubp1_set_vm_context0_settings +ffffffff82243e40 t hubp1_set_hubp_blank_en +ffffffff82243e80 t hubp1_disconnect +ffffffff82243f20 t hubp1_disable_control +ffffffff82243f60 t hubp1_get_underflow_status +ffffffff82243fd0 t hubp1_wait_pipe_read_start +ffffffff82245000 T dcn10_lock_all_pipes +ffffffff82245150 T dcn10_log_hw_state +ffffffff82246ec0 T dcn10_did_underflow_occur +ffffffff82246f80 T dcn10_enable_power_gating_plane +ffffffff82247160 T dcn10_disable_vga +ffffffff822473a0 T dcn10_dpp_pg_control +ffffffff82247610 T dcn10_hubp_pg_control +ffffffff822478a0 T dcn10_bios_golden_init +ffffffff82247a30 T dcn10_enable_stream_timing +ffffffff82247eb0 T dcn10_verify_allow_pstate_change_high +ffffffff82248260 T dcn10_plane_atomic_disconnect +ffffffff822483a0 T dcn10_plane_atomic_power_down +ffffffff82248510 T dcn10_plane_atomic_disable +ffffffff82248680 T dcn10_disable_plane +ffffffff82248850 T dcn10_init_pipes +ffffffff82248fe0 T dcn10_init_hw +ffffffff822495a0 T dcn10_power_down_on_boot +ffffffff82249730 T dcn10_reset_hw_ctx_wrap +ffffffff82249ad0 T dcn10_update_plane_addr +ffffffff82249c00 T dcn10_set_input_transfer_func +ffffffff82249da0 T dcn10_set_output_transfer_func +ffffffff82249e80 T dcn10_pipe_control_lock +ffffffff82249f50 T dcn10_cursor_lock +ffffffff8224a140 T dcn10_enable_vblanks_synchronization +ffffffff8224a9b0 T dcn10_enable_timing_synchronization +ffffffff8224ae40 T dcn10_enable_per_frame_crtc_position_reset +ffffffff8224b070 T dcn10_program_gamut_remap +ffffffff8224b270 T dcn10_program_output_csc +ffffffff8224b3c0 T dcn10_update_visual_confirm_color +ffffffff8224b440 T dcn10_update_mpcc +ffffffff8224b740 T dcn10_blank_pixel_data +ffffffff8224b8c0 T dcn10_set_hdr_multiplier +ffffffff8224b960 T dcn10_program_pipe +ffffffff8224c6a0 T dcn10_wait_for_pending_cleared +ffffffff8224c7c0 T dcn10_post_unlock_program_front_end +ffffffff8224ca80 T dcn10_prepare_bandwidth +ffffffff8224cc50 T dcn10_optimize_bandwidth +ffffffff8224ce20 T dcn10_set_drr +ffffffff8224cf20 T dcn10_get_position +ffffffff8224cfb0 T dcn10_set_static_screen_control +ffffffff8224d060 T dcn10_setup_stereo +ffffffff8224d1d0 T dcn10_wait_for_mpcc_disconnect +ffffffff8224d3a0 T dcn10_dummy_display_power_gating +ffffffff8224d3d0 T dcn10_update_pending_status +ffffffff8224d530 T dcn10_update_dchub +ffffffff8224d560 T dcn10_set_cursor_position +ffffffff8224dab0 T dcn10_set_cursor_attribute +ffffffff8224db10 T dcn10_set_cursor_sdr_white_level +ffffffff8224dbe0 T dcn10_get_vupdate_offset_from_vsync +ffffffff8224dc70 T dcn10_calc_vupdate_position +ffffffff8224dd10 T dcn10_setup_periodic_interrupt +ffffffff8224de30 T dcn10_setup_vupdate_interrupt +ffffffff8224df00 T dcn10_unblank_stream +ffffffff8224e020 T dcn10_send_immediate_sdp_message +ffffffff8224e080 T dcn10_set_clock +ffffffff8224e190 T dcn10_get_clock +ffffffff8224e1f0 T dcn10_get_dcc_en_bits +ffffffff8224f000 T snprintf_count +ffffffff8224f090 T dcn10_clear_status_bits +ffffffff8224f260 T dcn10_get_hw_state +ffffffff82251000 T dcn10_hw_sequencer_construct +ffffffff82252000 T dcn10_ipp_construct +ffffffff82252050 T dcn20_ipp_construct +ffffffff822520a0 t dcn10_ipp_destroy +ffffffff82253000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff822530d0 T dcn10_get_dig_frontend +ffffffff82253190 T enc1_configure_encoder +ffffffff82253210 T dcn10_psr_program_dp_dphy_fast_training +ffffffff822532a0 T dcn10_psr_program_secondary_packet +ffffffff82253320 T dcn10_is_dig_enabled +ffffffff82253390 T dcn10_link_encoder_validate_dvi_output +ffffffff82253440 T dcn10_link_encoder_validate_dp_output +ffffffff82253480 T dcn10_link_encoder_construct +ffffffff82253680 T dcn10_link_encoder_validate_output_with_stream +ffffffff82253880 T dcn10_link_encoder_hw_init +ffffffff82253ac0 T dcn10_aux_initialize +ffffffff82253b60 T dcn10_link_encoder_destroy +ffffffff82253bb0 T dcn10_link_encoder_setup +ffffffff82253d00 T dcn10_link_encoder_enable_tmds_output +ffffffff82253e00 T dcn10_link_encoder_enable_tmds_output_with_clk_pattern_wa +ffffffff82253f40 T dcn10_link_encoder_enable_dp_output +ffffffff822540d0 T dcn10_link_encoder_enable_dp_mst_output +ffffffff82254260 T dcn10_link_encoder_disable_output +ffffffff82254470 T dcn10_link_encoder_dp_set_lane_settings +ffffffff82254620 T dcn10_link_encoder_dp_set_phy_pattern +ffffffff82254df0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff82255050 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff82255380 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff822554e0 T dcn10_link_encoder_enable_hpd +ffffffff82255520 T dcn10_link_encoder_disable_hpd +ffffffff82255560 T dcn10_get_dig_mode +ffffffff822555e0 T dcn10_link_encoder_get_max_link_cap +ffffffff82255660 t program_pattern_symbols +ffffffff82256000 T mpc1_set_bg_color +ffffffff82256210 T mpc1_get_mpcc +ffffffff822562b0 T mpc1_update_stereo_mix +ffffffff822563e0 T mpc1_assert_idle_mpcc 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optc1_setup_vertical_interrupt2 +ffffffff8225a2e0 T optc1_program_timing +ffffffff8225aa30 T optc1_is_two_pixels_per_containter +ffffffff8225aa80 T optc1_set_vtg_params +ffffffff8225abb0 T optc1_set_blank_data_double_buffer +ffffffff8225abf0 T optc1_set_timing_double_buffer +ffffffff8225ac30 T optc1_set_blank +ffffffff8225ad20 T optc1_is_blanked +ffffffff8225adb0 T optc1_enable_optc_clock +ffffffff8225b010 T optc1_disable_crtc +ffffffff8225b120 T optc1_program_blank_color +ffffffff8225b1e0 T optc1_validate_timing +ffffffff8225b2f0 T optc1_get_vblank_counter +ffffffff8225b360 T optc1_lock +ffffffff8225b460 T optc1_unlock +ffffffff8225b4d0 T optc1_get_position +ffffffff8225b560 T optc1_is_counter_moving +ffffffff8225b5f0 T optc1_did_triggered_reset_occur +ffffffff8225b6a0 T optc1_disable_reset_trigger +ffffffff8225b780 T optc1_enable_reset_trigger +ffffffff8225b8b0 T optc1_enable_crtc_reset +ffffffff8225ba20 T optc1_wait_for_state +ffffffff8225baf0 T optc1_set_early_control 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dcn10_resource_destruct +ffffffff8225f8a0 t dcn10_destroy_resource_pool +ffffffff8225f910 t dcn10_panel_cntl_create +ffffffff8225f9a0 t dcn10_link_encoder_create +ffffffff8225fab0 t dcn10_validate_bandwidth +ffffffff8225fb50 t dcn10_validate_global +ffffffff8225fd30 t dcn10_acquire_free_pipe_for_layer +ffffffff8225fe80 t dcn10_validate_plane +ffffffff8225fed0 t dcn10_add_stream_to_ctx +ffffffff822600d0 t dcn10_patch_unknown_plane_state +ffffffff82260130 t read_dce_straps +ffffffff82260160 t create_audio +ffffffff82260190 t dcn10_stream_encoder_create +ffffffff82260230 t dcn10_hwseq_create +ffffffff822602f0 t dcn10_get_dcc_compression_cap +ffffffff82261000 T enc1_update_generic_info_packet +ffffffff822614b0 T enc1_stream_encoder_dp_set_stream_attribute +ffffffff822619d0 T enc1_stream_encoder_set_stream_attribute_helper +ffffffff82261a60 T enc1_stream_encoder_hdmi_set_stream_attribute +ffffffff822620e0 T enc1_stream_encoder_dvi_set_stream_attribute +ffffffff82262290 T enc1_stream_encoder_set_throttled_vcp_size +ffffffff822624d0 T enc1_stream_encoder_update_dp_info_packets +ffffffff82262700 T enc1_stream_encoder_send_immediate_sdp_message +ffffffff82262bc0 T enc1_stream_encoder_stop_dp_info_packets +ffffffff82262da0 T enc1_stream_encoder_dp_blank +ffffffff82262f70 T enc1_stream_encoder_dp_unblank +ffffffff822631e0 T enc1_stream_encoder_set_avmute +ffffffff82263220 T enc1_reset_hdmi_stream_attribute +ffffffff822632f0 T get_audio_clock_info +ffffffff822633e0 T enc1_se_enable_audio_clock +ffffffff82263440 T enc1_se_enable_dp_audio +ffffffff82263520 T enc1_se_audio_mute_control +ffffffff82263570 T enc1_se_dp_audio_setup +ffffffff82263580 t enc1_se_audio_setup +ffffffff822636f0 T enc1_se_dp_audio_enable +ffffffff82263990 T enc1_se_dp_audio_disable +ffffffff82263b10 T enc1_se_hdmi_audio_setup +ffffffff82264050 T enc1_se_hdmi_audio_disable +ffffffff822640e0 T enc1_setup_stereo_sync +ffffffff82264170 T enc1_dig_connect_to_otg +ffffffff822641b0 T enc1_dig_source_otg +ffffffff82264220 T enc1_stream_encoder_dp_get_pixel_format +ffffffff82264310 T dcn10_stream_encoder_construct +ffffffff82264370 t enc1_stream_encoder_update_hdmi_info_packets +ffffffff82264790 t enc1_stream_encoder_stop_hdmi_info_packets +ffffffff82265000 T dccg2_update_dpp_dto +ffffffff82265170 T dccg2_get_dccg_ref_freq +ffffffff82265230 T dccg2_set_fifo_errdet_ovr_en +ffffffff82265270 T dccg2_otg_add_pixel +ffffffff82265310 T dccg2_otg_drop_pixel +ffffffff822653b0 T dccg2_init +ffffffff822653e0 T dccg2_create +ffffffff822654a0 T dcn_dccg_destroy +ffffffff82266000 T dpp20_read_state +ffffffff82266220 T dpp2_power_on_obuf +ffffffff82266310 T dpp2_dummy_program_input_lut +ffffffff82266340 T dscl2_calc_lb_num_partitions +ffffffff82266470 T dpp2_cnv_set_alpha_keyer +ffffffff82266740 T dpp2_set_cursor_attributes +ffffffff822668b0 T oppn20_dummy_program_regamma_pwl +ffffffff822668e0 T dpp2_construct +ffffffff82266960 t dpp2_cnv_setup +ffffffff82268000 T dpp2_set_degamma_pwl +ffffffff82268430 T dpp2_set_degamma +ffffffff822685e0 T dpp2_cm_set_gamut_remap +ffffffff82268830 T dpp2_program_input_csc +ffffffff82268a80 T dpp20_program_blnd_lut +ffffffff82269250 T dpp20_program_shaper +ffffffff8226b3d0 T dpp20_program_3dlut +ffffffff8226bb60 t dpp20_set3dlut_ram12 +ffffffff8226bd50 T dpp2_set_hdr_multiplier +ffffffff8226c000 T dsc2_construct +ffffffff8226c050 T dsc2_get_enc_caps +ffffffff8226c0d0 T dsc_config_log +ffffffff8226c190 T dsc2_get_packed_pps +ffffffff8226c390 T dsc_prepare_config +ffffffff8226c950 T dsc_log_pps +ffffffff8226d2c0 T dsc_override_rc_params +ffffffff8226d410 T dsc_init_reg_values +ffffffff8226d500 T dsc_dc_pixel_encoding_to_dsc_pixel_format +ffffffff8226d5b0 T dsc_dc_color_depth_to_dsc_bits_per_comp +ffffffff8226d5f0 T dsc_update_from_dsc_parameters +ffffffff8226d6b0 t dsc2_read_state +ffffffff8226d8b0 t dsc2_validate_stream +ffffffff8226d910 t dsc2_set_config +ffffffff8226ede0 t dsc2_enable +ffffffff8226efd0 t dsc2_disable +ffffffff8226f190 t dsc2_disconnect +ffffffff82270000 T dwb2_config_dwb_cnv +ffffffff82270240 T dwb2_disable +ffffffff82270380 T dwb2_is_enabled +ffffffff82270430 T dwb2_set_stereo +ffffffff82270530 T dwb2_set_new_content +ffffffff822705b0 T dwb2_set_scaler +ffffffff822709b0 T dcn20_dwbc_construct +ffffffff82270a00 t dwb2_get_caps +ffffffff82270ae0 t dwb2_enable +ffffffff82270c70 t dwb2_update +ffffffff82270e00 t dwb2_set_warmup +ffffffff82271000 T dwb_program_horz_scalar +ffffffff82271590 t wbscl_get_filter_coeffs_16p +ffffffff82271b10 t wbscl_set_scaler_filter +ffffffff82271d30 T dwb_program_vert_scalar +ffffffff82273000 T hubbub2_dcc_support_swizzle +ffffffff822730c0 T hubbub2_dcc_support_pixel_format +ffffffff82273110 T hubbub2_get_dcc_compression_cap +ffffffff82273360 T hubbub2_init_vm_ctx +ffffffff822734d0 T hubbub2_init_dchub_sys_ctx +ffffffff82273750 T hubbub2_update_dchub +ffffffff82273980 T hubbub2_wm_read_state +ffffffff82273d60 T hubbub2_get_dchub_ref_freq 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enc3_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff822b3040 T enc3_stream_encoder_update_dp_info_packets +ffffffff822b3350 T enc3_audio_mute_control +ffffffff822b33d0 T enc3_se_dp_audio_setup +ffffffff822b3460 T enc3_se_dp_audio_enable +ffffffff822b3580 T enc3_se_hdmi_audio_setup +ffffffff822b3910 T dcn30_dio_stream_encoder_construct +ffffffff822b3980 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff822b4010 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff822b4260 t enc3_read_state +ffffffff822b4420 t enc3_dp_set_dsc_config +ffffffff822b4500 t enc3_dp_set_odm_combine +ffffffff822b5000 T dpp30_read_state +ffffffff822b5050 T dpp3_program_post_csc +ffffffff822b5250 T dpp3_set_pre_degam +ffffffff822b5310 T dpp3_cnv_setup +ffffffff822b5c80 T dpp3_set_cursor_attributes +ffffffff822b5e00 T dpp3_get_optimal_number_of_taps +ffffffff822b6920 T dpp3_construct +ffffffff822b6980 t dpp3_deferred_update +ffffffff822b6db0 t dpp3_program_blnd_lut +ffffffff822b78b0 t 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hubbub301_construct +ffffffff822d8000 T dcn301_hw_sequencer_construct +ffffffff822d9000 T optc301_set_drr +ffffffff822d9260 T optc301_setup_manual_trigger +ffffffff822d9390 T dcn301_timing_generator_init +ffffffff822da000 T dcn301_panel_cntl_construct +ffffffff822da050 t dcn301_panel_cntl_destroy +ffffffff822da0a0 t dcn301_panel_cntl_hw_init +ffffffff822da320 t dcn301_is_panel_backlight_on +ffffffff822da390 t dcn301_is_panel_powered_on +ffffffff822da450 t dcn301_store_backlight_level +ffffffff822da510 t dcn301_get_16_bit_backlight_from_pwm +ffffffff822db000 T dcn301_create_resource_pool +ffffffff822dc8a0 t dcn301_destruct +ffffffff822dcec0 t dcn301_destroy_resource_pool +ffffffff822dcf30 t dcn301_panel_cntl_create +ffffffff822dcfc0 t dcn301_link_encoder_create +ffffffff822dd080 t dcn301_calculate_wm_and_dlg +ffffffff822dd100 t read_dce_straps +ffffffff822dd130 t dcn301_create_audio +ffffffff822dd160 t dcn301_stream_encoder_create +ffffffff822dd320 t dcn301_hwseq_create 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dcn303_create_resource_pool +ffffffff822e6570 t dcn303_resource_destruct +ffffffff822e6b70 t dcn303_destroy_resource_pool +ffffffff822e6be0 t dcn303_panel_cntl_create +ffffffff822e6c70 t dcn303_link_encoder_create +ffffffff822e6d30 t dcn303_get_panel_config_defaults +ffffffff822e6db0 t read_dce_straps +ffffffff822e6de0 t dcn303_create_audio +ffffffff822e6e10 t dcn303_stream_encoder_create +ffffffff822e6fd0 t dcn303_hwseq_create +ffffffff822e8000 T afmt31_powerdown +ffffffff822e8090 T afmt31_poweron +ffffffff822e8120 T afmt31_construct +ffffffff822e9000 T apg31_construct +ffffffff822e9050 t apg31_se_audio_setup +ffffffff822e9170 t apg31_enable +ffffffff822e92a0 t apg31_disable +ffffffff822ea000 T dccg31_update_dpp_dto +ffffffff822ea180 T dccg31_set_dpstreamclk +ffffffff822ea320 t dccg31_disable_dpstreamclk +ffffffff822ea480 T dccg31_enable_symclk32_se +ffffffff822ea7b0 T dccg31_disable_symclk32_se +ffffffff822eaab0 T dccg31_enable_symclk32_le +ffffffff822eabd0 T dccg31_disable_symclk32_le +ffffffff822eacc0 T dccg31_set_symclk32_le_root_clock_gating +ffffffff822eade0 T dccg31_disable_dscclk +ffffffff822eb050 T dccg31_enable_dscclk +ffffffff822eb2f0 T dccg31_set_physymclk +ffffffff822eb860 T dccg31_set_dtbclk_dto +ffffffff822ebb50 T dccg31_set_audio_dtbclk_dto +ffffffff822ebc80 T dccg31_get_dccg_ref_freq +ffffffff822ebcb0 T dccg31_set_dispclk_change_mode +ffffffff822ebd00 T dccg31_init +ffffffff822ec3a0 T dccg31_otg_add_pixel +ffffffff822ec3e0 T dccg31_otg_drop_pixel +ffffffff822ec420 T dccg31_create +ffffffff822ed000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff822ed3c0 T dcn31_link_encoder_construct +ffffffff822ed5b0 T dcn31_link_encoder_construct_minimal +ffffffff822ed630 T dcn31_link_encoder_enable_dp_output +ffffffff822ed8b0 T dcn31_link_encoder_enable_dp_mst_output +ffffffff822edb30 T dcn31_link_encoder_disable_output +ffffffff822edde0 T dcn31_link_encoder_is_in_alt_mode +ffffffff822edf40 T dcn31_link_encoder_get_max_link_cap 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dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff822f1fd0 t dcn31_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num +ffffffff822f20a0 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff822f22f0 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff822f24a0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff822f2790 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff822f28a0 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff822f2960 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff822f2a50 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff822f2c40 t dcn31_hpo_dp_stream_enc_read_state +ffffffff822f2e00 t dcn31_set_hblank_min_symbol_width +ffffffff822f3000 T hubbub31_init_dchub_sys_ctx +ffffffff822f3220 T hubbub31_init +ffffffff822f32d0 T hubbub31_construct +ffffffff822f3370 t hubbub31_get_dcc_compression_cap +ffffffff822f3570 t hubbub31_get_dchub_ref_freq +ffffffff822f3650 t hubbub31_program_watermarks +ffffffff822f51b0 t hubbub31_verify_allow_pstate_change_high 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optc31_disable_crtc +ffffffff822fa780 t optc31_set_odm_combine +ffffffff822fb000 T dcn31_panel_cntl_construct +ffffffff822fb040 t dcn31_panel_cntl_destroy +ffffffff822fb090 t dcn31_panel_cntl_hw_init +ffffffff822fb190 t dcn31_is_panel_backlight_on +ffffffff822fb240 t dcn31_is_panel_powered_on +ffffffff822fb300 t dcn31_store_backlight_level +ffffffff822fb3d0 t dcn31_get_16_bit_backlight_from_pwm +ffffffff822fc000 T dcn31x_populate_dml_pipes_from_context +ffffffff822fc190 T dcn31_populate_dml_pipes_from_context +ffffffff822fc610 T dcn31_calculate_wm_and_dlg +ffffffff822fc690 T dcn31_populate_dml_writeback_from_context +ffffffff822fc700 T dcn31_set_mcif_arb_params +ffffffff822fc770 T dcn31_validate_bandwidth +ffffffff822fcbd0 T dcn31_create_resource_pool +ffffffff822fe220 t dcn31_resource_destruct +ffffffff822fe9a0 t dcn31_destroy_resource_pool +ffffffff822fea10 t dcn31_panel_cntl_create +ffffffff822fea80 t dcn31_link_encoder_create +ffffffff822feb40 t dcn31_link_enc_create_minimal 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enc314_stream_encoder_dp_blank +ffffffff823029e0 t enc314_stream_encoder_dp_unblank +ffffffff82302df0 t enc314_read_state +ffffffff82302f80 t enc314_dp_set_dsc_config +ffffffff82302fd0 t enc314_dp_set_odm_combine +ffffffff82303010 t enc314_set_dig_input_mode +ffffffff82303060 t enc314_enable_fifo +ffffffff82303120 t enc314_disable_fifo +ffffffff82303170 t enc314_reset_fifo +ffffffff82304000 T dcn314_update_odm +ffffffff823046a0 T dcn314_dsc_pg_control +ffffffff82304ac0 T dcn314_enable_power_gating_plane +ffffffff82304da0 T dcn314_calculate_dccg_k1_k2_values +ffffffff82304f60 T dcn314_set_pixels_per_cycle +ffffffff82305050 T dcn314_resync_fifo_dccg_dio +ffffffff82305210 T dcn314_dpp_root_clock_control +ffffffff82305270 T dcn314_disable_link_output +ffffffff82306000 T dcn314_hw_sequencer_construct +ffffffff82307000 T dcn314_timing_generator_init +ffffffff82307070 t optc314_enable_crtc +ffffffff823071a0 t optc314_disable_crtc +ffffffff82307290 t optc314_phantom_crtc_post_enable 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dcn315_create_resource_pool +ffffffff8230c540 t dcn315_resource_destruct +ffffffff8230cca0 t dcn315_destroy_resource_pool +ffffffff8230cd10 t dcn31_panel_cntl_create +ffffffff8230cd80 t dcn31_link_encoder_create +ffffffff8230ce40 t dcn31_link_enc_create_minimal +ffffffff8230cf00 t dcn315_populate_dml_pipes_from_context +ffffffff8230d670 t dcn315_get_panel_config_defaults +ffffffff8230d6b0 t read_dce_straps +ffffffff8230d6e0 t dcn31_create_audio +ffffffff8230d710 t dcn315_stream_encoder_create +ffffffff8230d8d0 t dcn31_hpo_dp_stream_encoder_create +ffffffff8230dae0 t dcn31_hpo_dp_link_encoder_create +ffffffff8230db80 t dcn31_hwseq_create +ffffffff8230e000 T dcn316_create_resource_pool +ffffffff8230f550 t dcn316_resource_destruct +ffffffff8230fcb0 t dcn316_destroy_resource_pool +ffffffff8230fd20 t dcn31_panel_cntl_create +ffffffff8230fd90 t dcn31_link_encoder_create +ffffffff8230fe50 t dcn31_link_enc_create_minimal +ffffffff8230ff10 t dcn316_populate_dml_pipes_from_context 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enc32_stream_encoder_dp_unblank +ffffffff823135b0 T enc32_enable_fifo +ffffffff82313670 t enc32_reset_fifo +ffffffff82313790 T dcn32_dio_stream_encoder_construct +ffffffff82313800 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff82313df0 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff82313f90 t enc32_read_state +ffffffff82314120 t enc32_dp_set_dsc_config +ffffffff82314170 t enc32_dp_set_odm_combine +ffffffff823141b0 t enc32_set_dig_input_mode +ffffffff82315000 T dpp32_construct +ffffffff82315060 t dscl32_calc_lb_num_partitions +ffffffff82316000 T hpo_dp_link_encoder32_construct +ffffffff82316060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff82317000 T hubbub32_set_request_limit +ffffffff82317140 T dcn32_program_det_size +ffffffff82317310 T hubbub32_program_urgent_watermarks +ffffffff82317b10 T hubbub32_program_stutter_watermarks +ffffffff82317fa0 T hubbub32_program_pstate_watermarks +ffffffff82318470 T hubbub32_program_usr_watermarks +ffffffff823186f0 T hubbub32_force_usr_retraining_allow +ffffffff82318780 T hubbub32_force_wm_propagate_to_pipes +ffffffff82318830 T hubbub32_init +ffffffff82318990 T hubbub32_construct +ffffffff82318a10 t hubbub32_wm_read_state +ffffffff82318f10 t hubbub32_program_watermarks +ffffffff82319060 t hubbub32_init_watermarks +ffffffff823195e0 t dcn32_program_compbuf_size +ffffffff823198b0 t dcn32_init_crb +ffffffff8231a000 T hubp32_update_force_pstate_disallow +ffffffff8231a090 T hubp32_update_force_cursor_pstate_disallow +ffffffff8231a120 T hubp32_update_mall_sel +ffffffff8231a1c0 T hubp32_prepare_subvp_buffering +ffffffff8231a260 T hubp32_phantom_hubp_post_enable +ffffffff8231a390 T hubp32_cursor_set_attributes +ffffffff8231a690 T hubp32_init +ffffffff8231a6c0 T hubp32_construct +ffffffff8231b000 T dcn32_dsc_pg_control +ffffffff8231b370 T dcn32_enable_power_gating_plane +ffffffff8231b630 T dcn32_hubp_pg_control +ffffffff8231b8e0 T dcn32_apply_idle_power_optimizations +ffffffff8231bbf0 T dcn32_commit_subvp_config +ffffffff8231bca0 T dcn32_subvp_pipe_control_lock +ffffffff8231be80 T dcn32_subvp_pipe_control_lock_fast +ffffffff8231bf00 T dcn32_set_mpc_shaper_3dlut +ffffffff8231c030 T dcn32_set_mcm_luts +ffffffff8231c1f0 T dcn32_set_input_transfer_func +ffffffff8231c350 T dcn32_set_output_transfer_func +ffffffff8231c5d0 T dcn32_update_force_pstate +ffffffff8231c820 T dcn32_update_mall_sel +ffffffff8231ca30 T dcn32_program_mall_pipe_config +ffffffff8231cb20 T dcn32_init_hw +ffffffff8231d520 T dcn32_update_odm +ffffffff8231dbc0 T dcn32_calculate_dccg_k1_k2_values +ffffffff8231de20 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff8231ded0 T dcn32_set_pixels_per_cycle +ffffffff8231e030 T dcn32_resync_fifo_dccg_dio +ffffffff8231e200 T dcn32_unblank_stream +ffffffff8231e450 T dcn32_disable_link_output +ffffffff8231e840 T dcn32_update_phantom_vp_position +ffffffff8231e950 T dcn32_apply_update_flags_for_phantom +ffffffff8231e9e0 T dcn32_dsc_pg_status +ffffffff8231eac0 T dcn32_update_dsc_pg +ffffffff8231ebd0 T dcn32_enable_phantom_streams +ffffffff8231ed30 T dcn32_init_blank +ffffffff8231efc0 T dcn32_blank_phantom +ffffffff8231f170 T dcn32_is_pipe_topology_transition_seamless +ffffffff82320000 T dcn32_hw_sequencer_init_functions +ffffffff82321000 T dcn32_mmhubbub_construct +ffffffff82321050 t mmhubbub32_warmup_mcif +ffffffff823212a0 t mmhubbub32_config_mcif_buf +ffffffff82321800 t mmhubbub32_config_mcif_arb +ffffffff82322000 T mpc32_mpc_init +ffffffff82322210 T mpc32_power_on_blnd_lut +ffffffff823223b0 T mpc32_configure_post1dlut +ffffffff823224c0 T mpc32_program_post1dluta_settings +ffffffff823226e0 T mpc32_program_post1dlutb_settings +ffffffff82322900 T mpc32_program_post1dlut_pwl +ffffffff82322d90 T mpc32_program_post1dlut +ffffffff82323100 T mpc32_configure_shaper_lut +ffffffff82323230 T mpc32_program_shaper_luta_settings +ffffffff82324190 T mpc32_program_shaper_lutb_settings +ffffffff823250f0 T mpc32_program_shaper_lut +ffffffff823252b0 T mpc32_power_on_shaper_3dlut +ffffffff82325510 T mpc32_program_shaper +ffffffff823258a0 T mpc32_select_3dlut_ram +ffffffff82325950 T mpc32_select_3dlut_ram_mask +ffffffff82325a30 T mpc32_set3dlut_ram12 +ffffffff82325c40 T mpc32_set3dlut_ram10 +ffffffff82325d20 T mpc32_program_3dlut +ffffffff823267e0 T dcn32_mpc_construct +ffffffff82327000 T optc32_set_h_timing_div_manual_mode +ffffffff82327040 T dcn32_timing_generator_init +ffffffff823270b0 t optc32_enable_crtc +ffffffff823271e0 t optc32_disable_crtc +ffffffff823273c0 t optc32_phantom_crtc_post_enable +ffffffff82327490 t optc32_disable_phantom_otg +ffffffff82327590 t optc32_set_drr +ffffffff82327770 t optc32_set_odm_bypass +ffffffff82327900 t optc32_set_odm_combine +ffffffff82328000 T dcn32_panel_cntl_create +ffffffff82328070 T dcn32_acquire_post_bldn_3dlut +ffffffff82328170 T dcn32_release_post_bldn_3dlut +ffffffff82328220 T dcn32_retain_phantom_pipes +ffffffff82328330 T dcn32_remove_phantom_pipes +ffffffff823284d0 T dcn32_add_phantom_pipes +ffffffff82328950 T dcn32_validate_bandwidth +ffffffff82328ec0 T dcn32_populate_dml_pipes_from_context +ffffffff82329350 T dcn32_calculate_wm_and_dlg +ffffffff823293d0 T dcn32_create_resource_pool +ffffffff823294a0 t dcn32_resource_construct +ffffffff82334ca0 T dcn32_acquire_free_pipe_as_secondary_dpp_pipe +ffffffff82334fc0 T dcn32_calc_num_avail_chans_for_mall +ffffffff82335030 t dcn32_mpc_create +ffffffff82339690 t dcn32_dwbc_create +ffffffff8233a0c0 t dcn32_mmhubbub_create +ffffffff8233a5a0 t dcn32_resource_destruct +ffffffff8233ad30 t dcn32_destroy_resource_pool +ffffffff8233ada0 t dcn32_link_encoder_create +ffffffff8233be80 t dcn32_update_bw_bounding_box +ffffffff8233bee0 t read_dce_straps +ffffffff8233bf10 t dcn32_create_audio +ffffffff8233c290 t dcn32_stream_encoder_create +ffffffff8233e110 t dcn32_hpo_dp_stream_encoder_create +ffffffff8233ef40 t dcn32_hpo_dp_link_encoder_create +ffffffff8233f3b0 t dcn32_hwseq_create +ffffffff8233f8a0 t dcn32_vpg_create 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dcn_find_dcfclk_suits_all +ffffffff82378380 T dcn_bw_update_from_pplib_fclks +ffffffff82378510 T dcn_bw_update_from_pplib_dcfclks +ffffffff823785e0 T dcn_get_soc_clks +ffffffff82378660 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff82379000 T dcn10_resource_construct_fp +ffffffff8237a000 T dcn20_populate_dml_writeback_from_context +ffffffff8237a190 T dcn20_fpu_set_wb_arb_params +ffffffff8237a390 T dcn20_calculate_dlg_params +ffffffff8237ac20 T dcn20_populate_dml_pipes_from_context +ffffffff8237bba0 T dcn20_calculate_wm +ffffffff8237c4a0 T dcn20_update_bounding_box +ffffffff8237c730 T dcn20_cap_soc_clocks +ffffffff8237caa0 T dcn20_patch_bounding_box +ffffffff8237cc90 T dcn20_validate_bandwidth_fp +ffffffff8237ce60 t dcn20_validate_bandwidth_internal +ffffffff8237d2e0 T dcn20_fpu_set_wm_ranges +ffffffff8237d390 T dcn20_fpu_adjust_dppclk +ffffffff8237d430 T dcn21_populate_dml_pipes_from_context +ffffffff8237d550 T dcn21_validate_bandwidth_fp +ffffffff8237e090 T dcn21_update_bw_bounding_box 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CalculatePrefetchSourceLines +ffffffff8239d840 t CalculateWriteBackDelay +ffffffff8239db80 t CalculateDelayAfterScaler +ffffffff8239df10 t CalculatePrefetchSchedule +ffffffff8239ed30 t CalculateFlipSchedule +ffffffff8239f140 t adjust_ReturnBW +ffffffff823a0000 T dml20_rq_dlg_get_rq_reg +ffffffff823a04e0 t dml20_rq_dlg_get_rq_params +ffffffff823a06b0 T dml20_rq_dlg_get_dlg_reg +ffffffff823a2980 t get_surf_rq_param +ffffffff823a3210 t calculate_ttu_cursor +ffffffff823a4000 T dml20v2_rq_dlg_get_rq_reg +ffffffff823a44e0 t dml20v2_rq_dlg_get_rq_params +ffffffff823a46b0 T dml20v2_rq_dlg_get_dlg_reg +ffffffff823a6990 t get_surf_rq_param +ffffffff823a7220 t calculate_ttu_cursor +ffffffff823a8000 T dml21_recalculate +ffffffff823a8770 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff823ae290 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff823b4b30 t TruncToValidBPP +ffffffff823b50d0 t CalculateDCFCLKDeepSleep +ffffffff823b5440 t CalculateVMAndRowBytes +ffffffff823b5cf0 t CalculatePrefetchSourceLines +ffffffff823b5ee0 t CalculateWriteBackDelay +ffffffff823b6220 t CalculatePrefetchSchedulePerPlane +ffffffff823b6a80 t CalculateUrgentBurstFactor +ffffffff823b6ec0 t CalculateFlipSchedule +ffffffff823b7400 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff823b8440 t CalculatePrefetchSchedule +ffffffff823ba000 T dml21_rq_dlg_get_rq_reg +ffffffff823ba4e0 t dml_rq_dlg_get_rq_params +ffffffff823ba6b0 T dml21_rq_dlg_get_dlg_reg +ffffffff823bce10 t get_surf_rq_param +ffffffff823bd780 t calculate_ttu_cursor +ffffffff823be000 T optc3_fpu_set_vrr_m_const +ffffffff823be540 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff823be860 T dcn30_fpu_set_mcif_arb_params +ffffffff823bea20 T dcn30_fpu_update_soc_for_wm_a +ffffffff823beaf0 T dcn30_fpu_calculate_wm_and_dlg +ffffffff823bf690 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff823bf8b0 T dcn30_fpu_update_dram_channel_width_bytes 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CalculateFlipSchedule +ffffffff823d4e90 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff823d5c40 t CalculateSwathWidth +ffffffff823d7000 T dml30_rq_dlg_get_rq_reg +ffffffff823d74f0 t dml_rq_dlg_get_rq_params +ffffffff823d7790 T dml30_rq_dlg_get_dlg_reg +ffffffff823da2f0 t get_surf_rq_param +ffffffff823dacb0 t calculate_ttu_cursor +ffffffff823db000 T dcn301_update_bw_bounding_box +ffffffff823db300 T dcn301_fpu_set_wm_ranges +ffffffff823db3b0 T dcn301_fpu_init_soc_bounding_box +ffffffff823db460 T dcn301_calculate_wm_and_dlg_fp +ffffffff823db7d0 t calculate_wm_set_for_vlevel +ffffffff823dc000 T dcn302_fpu_update_bw_bounding_box +ffffffff823dc980 T dcn302_fpu_init_soc_bounding_box +ffffffff823dd000 T dcn303_fpu_update_bw_bounding_box +ffffffff823dd9e0 T dcn303_fpu_init_soc_bounding_box +ffffffff823de000 T dcn31_zero_pipe_dcc_fraction +ffffffff823de070 T dcn31_update_soc_for_wm_a +ffffffff823de130 T dcn315_update_soc_for_wm_a +ffffffff823de210 T dcn31_calculate_wm_and_dlg_fp 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CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff823f3ec0 t CalculateSwathWidth +ffffffff823f4430 t CalculatePrefetchSchedule +ffffffff823f5950 t CalculateVupdateAndDynamicMetadataParameters +ffffffff823f6000 T dml31_rq_dlg_get_rq_reg +ffffffff823f64f0 t dml_rq_dlg_get_rq_params +ffffffff823f6790 T dml31_rq_dlg_get_dlg_reg +ffffffff823f9680 t get_surf_rq_param +ffffffff823fb000 T dcn314_update_bw_bounding_box_fpu +ffffffff823fb410 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff823fc000 T dml314_recalculate +ffffffff823fc2a0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff824034c0 T dml314_CalculateWriteBackDISPCLK +ffffffff82403650 t dml_max3 +ffffffff824036c0 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff8240bdf0 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff8240c060 t CalculateSwathAndDETConfiguration +ffffffff8240c6d0 t TruncToValidBPP +ffffffff8240c930 t CalculateDCFCLKDeepSleep +ffffffff8240cc80 t CalculateVMAndRowBytes +ffffffff8240d320 t CalculatePrefetchSourceLines +ffffffff8240d510 t CalculateUrgentBurstFactor +ffffffff8240d7c0 t CalculateMaxVStartup +ffffffff8240d930 t UseMinimumDCFCLK +ffffffff8240e950 t CalculatePrefetchSchedulePerPlane +ffffffff8240f0d0 t CalculateFlipSchedule +ffffffff8240f6c0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82410340 t CalculateSwathWidth +ffffffff824108b0 t CalculatePrefetchSchedule +ffffffff82411dd0 t CalculateVupdateAndDynamicMetadataParameters +ffffffff82413000 T dml314_rq_dlg_get_rq_reg +ffffffff824134f0 t dml_rq_dlg_get_rq_params +ffffffff82413790 T dml314_rq_dlg_get_dlg_reg +ffffffff82416670 t get_surf_rq_param +ffffffff82418000 T dcn32_build_wm_range_table_fpu +ffffffff824183a0 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff82418570 T dcn32_internal_validate_bw +ffffffff8241a5f0 T dcn32_helper_populate_phantom_dlg_params +ffffffff8241a7b0 T dcn32_predict_pipe_split +ffffffff8241aa00 T dcn32_set_phantom_stream_timing +ffffffff8241ad30 T dcn32_determine_max_vratio_prefetch +ffffffff8241ae10 t dcn32_split_stream_for_mpc_or_odm +ffffffff8241b200 T dcn32_calculate_wm_and_dlg_fpu +ffffffff8241cb20 T dcn32_patch_dpm_table +ffffffff8241cd30 T dcn32_update_bw_bounding_box_fpu +ffffffff8241f450 T dcn32_zero_pipe_dcc_fraction +ffffffff8241f4c0 T dcn32_allow_subvp_with_active_margin +ffffffff8241f590 T dcn32_allow_subvp_high_refresh_rate +ffffffff8241f7b0 T dcn32_assign_fpo_vactive_candidate +ffffffff8241f870 T dcn32_find_vactive_pipe +ffffffff8241f9e0 T dcn32_set_clock_limits +ffffffff8241fa30 T dcn32_override_min_req_memclk +ffffffff8241fb00 t subvp_drr_schedulable +ffffffff8241fdc0 t get_optimal_ntuple +ffffffff82421000 T dml32_recalculate +ffffffff82425510 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff8242e000 T dml32_dscceComputeDelay +ffffffff8242e150 T dml32_dscComputeDelay +ffffffff8242e190 T IsVertical +ffffffff8242e1c0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff8242e540 t dml_max3 +ffffffff8242e5b0 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff8242e8e0 T dml32_CalculateSwathAndDETConfiguration +ffffffff8242f140 T dml32_CalculateSwathWidth +ffffffff8242fab0 T dml32_UnboundedRequest +ffffffff8242fb20 T dml32_CalculateDETBufferSize +ffffffff824301a0 T dml32_CalculateODMMode +ffffffff82430970 T dml32_CalculateRequiredDispclk +ffffffff82430b40 T dml32_RoundToDFSGranularity +ffffffff82430bd0 T dml32_CalculateOutputLink +ffffffff824316d0 T dml32_TruncToValidBPP +ffffffff82431a10 T dml32_CalculateDPPCLK +ffffffff82431bc0 T dml32_RequiredDTBCLK +ffffffff82431e60 t dml_max4 +ffffffff82431ef0 T dml32_DSCDelayRequirement +ffffffff82432400 T dml32_CalculateSurfaceSizeInMall +ffffffff82433110 T dml32_CalculateVMRowAndSwath +ffffffff82433f50 T dml32_CalculateVMAndRowBytes +ffffffff82434cb0 T dml32_CalculatePrefetchSourceLines +ffffffff82434f20 T dml32_CalculateMALLUseForStaticScreen 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fetch_ip_params +ffffffff82445c50 t fetch_pipe_params +ffffffff82446ce0 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff82446d60 T get_clk_dcf_deepsleep +ffffffff82446eb0 T get_wm_urgent +ffffffff82447000 T get_wm_memory_trip +ffffffff82447150 T get_wm_writeback_urgent +ffffffff824472a0 T get_wm_stutter_exit +ffffffff824473f0 T get_wm_stutter_enter_exit +ffffffff82447540 T get_wm_z8_stutter_exit +ffffffff82447690 T get_wm_z8_stutter_enter_exit +ffffffff824477e0 T get_stutter_efficiency_z8 +ffffffff82447930 T get_stutter_num_bursts_z8 +ffffffff82447a80 T get_wm_dram_clock_change +ffffffff82447bd0 T get_wm_writeback_dram_clock_change +ffffffff82447d20 T get_stutter_efficiency +ffffffff82447e70 T get_stutter_efficiency_no_vblank +ffffffff82447fc0 T get_stutter_period +ffffffff82448110 T get_urgent_latency +ffffffff82448260 T get_urgent_extra_latency +ffffffff824483b0 T get_nonurgent_latency +ffffffff82448500 T get_dram_clock_change_latency +ffffffff82448650 T get_dispclk_calculated +ffffffff824487a0 T get_total_data_read_bw +ffffffff824488f0 T get_return_bw +ffffffff82448a40 T get_tcalc +ffffffff82448b90 T get_fraction_of_urgent_bandwidth +ffffffff82448ce0 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff82448e30 T get_cstate_max_cap_mode +ffffffff82448f90 T get_comp_buffer_size_kbytes +ffffffff824490e0 T get_pixel_chunk_size_in_kbyte +ffffffff82449230 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff82449380 T get_meta_chunk_size_in_kbyte +ffffffff824494d0 T get_min_pixel_chunk_size_in_byte +ffffffff82449620 T get_min_meta_chunk_size_in_byte +ffffffff82449770 T get_fclk_watermark +ffffffff824498c0 T get_usr_retraining_watermark +ffffffff82449a10 T get_comp_buffer_reserved_space_kbytes +ffffffff82449b60 T get_comp_buffer_reserved_space_64bytes +ffffffff82449cb0 T get_comp_buffer_reserved_space_zs +ffffffff82449e00 T get_unbounded_request_enabled +ffffffff82449f60 T get_dsc_delay +ffffffff8244a0c0 T get_dppclk_calculated +ffffffff8244a220 T get_dscclk_calculated +ffffffff8244a380 T get_min_ttu_vblank +ffffffff8244a4e0 T get_min_ttu_vblank_in_us +ffffffff8244a640 T get_vratio_prefetch_l +ffffffff8244a7a0 T get_vratio_prefetch_c +ffffffff8244a900 T get_dst_x_after_scaler +ffffffff8244aa60 T get_dst_y_after_scaler +ffffffff8244abc0 T get_dst_y_per_vm_vblank +ffffffff8244ad20 T get_dst_y_per_row_vblank +ffffffff8244ae80 T get_dst_y_prefetch +ffffffff8244afe0 T get_dst_y_per_vm_flip +ffffffff8244b140 T get_dst_y_per_row_flip +ffffffff8244b2a0 T get_refcyc_per_vm_group_vblank +ffffffff8244b400 T get_refcyc_per_vm_group_flip +ffffffff8244b560 T get_refcyc_per_vm_req_vblank +ffffffff8244b6c0 T get_refcyc_per_vm_req_flip +ffffffff8244b820 T get_refcyc_per_vm_group_vblank_in_us +ffffffff8244b980 T get_refcyc_per_vm_group_flip_in_us +ffffffff8244bae0 T get_refcyc_per_vm_req_vblank_in_us +ffffffff8244bc40 T get_refcyc_per_vm_req_flip_in_us +ffffffff8244bda0 T get_refcyc_per_vm_dmdata_in_us +ffffffff8244bf00 T get_dmdata_dl_delta_in_us +ffffffff8244c060 T get_refcyc_per_line_delivery_l_in_us +ffffffff8244c1c0 T get_refcyc_per_line_delivery_c_in_us +ffffffff8244c320 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff8244c480 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff8244c5e0 T get_refcyc_per_req_delivery_l_in_us +ffffffff8244c740 T get_refcyc_per_req_delivery_c_in_us +ffffffff8244c8a0 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff8244ca00 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff8244cb60 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff8244ccc0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff8244ce20 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff8244cf80 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff8244d0e0 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff8244d240 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff8244d3a0 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff8244d500 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff8244d660 T get_vstartup +ffffffff8244d7c0 T get_vupdate_offset +ffffffff8244d920 T get_vupdate_width +ffffffff8244da80 T get_vready_offset +ffffffff8244dbe0 T get_vready_at_or_after_vsync +ffffffff8244dd50 T get_min_dst_y_next_start +ffffffff8244deb0 T get_dst_y_per_pte_row_nom_l +ffffffff8244e010 T get_dst_y_per_pte_row_nom_c +ffffffff8244e170 T get_dst_y_per_meta_row_nom_l +ffffffff8244e2d0 T get_dst_y_per_meta_row_nom_c +ffffffff8244e430 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff8244e590 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff8244e6f0 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff8244e850 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff8244e9b0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff8244eb10 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff8244ec70 T get_vstartup_calculated +ffffffff8244edd0 T get_dpte_row_height_linear_c +ffffffff8244ef30 T get_swath_height_l +ffffffff8244f090 T get_swath_height_c +ffffffff8244f1f0 T get_det_stored_buffer_size_l_bytes +ffffffff8244f350 T get_det_stored_buffer_size_c_bytes +ffffffff8244f4b0 T get_dpte_group_size_in_bytes +ffffffff8244f610 T get_vm_group_size_in_bytes +ffffffff8244f770 T get_dpte_row_height_linear_l +ffffffff8244f8d0 T get_pte_buffer_mode +ffffffff8244fa40 T get_subviewport_lines_needed_in_mall +ffffffff8244fba0 T get_surface_size_in_mall +ffffffff8244fd00 T get_total_immediate_flip_bytes +ffffffff8244fe50 T get_total_immediate_flip_bw +ffffffff82450060 T get_total_prefetch_bw +ffffffff82450270 T get_total_surface_size_in_mall_bytes +ffffffff82450450 T get_det_buffer_size_kbytes +ffffffff824505b0 T get_is_phantom_pipe +ffffffff82450710 T Calculate256BBlockSizes +ffffffff82450800 T CalculateMinAndMaxPrefetchMode +ffffffff82450880 T ModeSupportAndSystemConfiguration +ffffffff82450bc0 T CalculateWriteBackDISPCLK +ffffffff82452000 T print__rq_params_st +ffffffff82452030 T print__data_rq_sizing_params_st +ffffffff82452060 T print__data_rq_dlg_params_st +ffffffff82452090 T print__data_rq_misc_params_st +ffffffff824520c0 T print__rq_dlg_params_st +ffffffff824520f0 T print__dlg_sys_params_st +ffffffff82452120 T print__data_rq_regs_st +ffffffff82452150 T print__rq_regs_st +ffffffff82452180 T print__dlg_regs_st +ffffffff824521b0 T print__ttu_regs_st +ffffffff82453000 T dml1_extract_rq_regs +ffffffff82453340 T dml1_rq_dlg_get_rq_params +ffffffff82453520 t get_surf_rq_param +ffffffff82454120 T dml1_rq_dlg_get_dlg_params +ffffffff82457000 T _do_calc_rc_params +ffffffff82457fd0 t get_qp_set +ffffffff82459000 T dc_bandwidth_in_kbps_from_timing +ffffffff824592e0 T dc_dsc_stream_bandwidth_in_kbps +ffffffff82459470 T dc_dsc_parse_dsc_dpcd +ffffffff82459730 t dsc_throughput_from_dpcd +ffffffff824598f0 T dc_dsc_compute_bandwidth_range +ffffffff82459b20 t intersect_dsc_caps +ffffffff82459cf0 t setup_dsc_config +ffffffff8245a4f0 T dc_dsc_compute_config +ffffffff8245a600 T dc_dsc_stream_bandwidth_overhead_in_kbps +ffffffff8245a790 T dc_dsc_get_policy_for_timing +ffffffff8245a830 T dc_dsc_policy_set_max_target_bpp_limit +ffffffff8245a860 T dc_dsc_policy_set_enable_dsc_when_not_needed +ffffffff8245a890 T dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff8245a8c0 T dc_set_disable_128b_132b_stream_overhead +ffffffff8245a8f0 T dc_dsc_get_default_config_option +ffffffff8245a940 t fit_num_slices_up +ffffffff8245a9f0 t decide_dsc_target_bpp_x16 +ffffffff8245b000 T calc_rc_params +ffffffff8245c000 T dscc_compute_dsc_parameters +ffffffff8245d000 T dal_hw_factory_dce110_init +ffffffff8245d060 t define_hpd_registers +ffffffff8245d0b0 t define_ddc_registers +ffffffff8245e000 T dal_hw_translate_dce110_init +ffffffff8245e030 t offset_to_id +ffffffff8245e3a0 t id_to_offset +ffffffff8245f000 T dal_hw_factory_dce120_init +ffffffff8245f060 t define_hpd_registers +ffffffff8245f0b0 t define_ddc_registers +ffffffff82460000 T dal_hw_translate_dce120_init +ffffffff82460030 t offset_to_id +ffffffff824603b0 t id_to_offset +ffffffff82461000 T dal_hw_factory_dce80_init +ffffffff82461060 t define_hpd_registers +ffffffff824610b0 t define_ddc_registers +ffffffff82462000 T dal_hw_translate_dce80_init +ffffffff82462030 t offset_to_id +ffffffff824627d0 t id_to_offset +ffffffff82463000 T dal_hw_factory_dcn10_init +ffffffff82463060 t define_hpd_registers +ffffffff824630b0 t define_ddc_registers +ffffffff82463150 t define_generic_registers +ffffffff82464000 T dal_hw_translate_dcn10_init +ffffffff82464030 t offset_to_id +ffffffff824643a0 t id_to_offset +ffffffff82465000 T dal_hw_factory_dcn20_init +ffffffff82465060 t define_hpd_registers +ffffffff824650b0 t define_ddc_registers +ffffffff82465160 t define_generic_registers +ffffffff82466000 T dal_hw_translate_dcn20_init +ffffffff82466030 t offset_to_id +ffffffff824662c0 t id_to_offset +ffffffff82467000 T dal_hw_factory_dcn21_init +ffffffff82467060 t define_hpd_registers +ffffffff824670b0 t define_ddc_registers +ffffffff82467160 t define_generic_registers +ffffffff82468000 T dal_hw_translate_dcn21_init +ffffffff82468030 t offset_to_id +ffffffff824682b0 t id_to_offset +ffffffff82469000 T dal_hw_factory_dcn30_init +ffffffff82469060 t define_hpd_registers +ffffffff824690b0 t define_ddc_registers +ffffffff82469160 t define_generic_registers +ffffffff8246a000 T dal_hw_translate_dcn30_init +ffffffff8246a030 t offset_to_id +ffffffff8246a2d0 t id_to_offset +ffffffff8246b000 T dal_hw_factory_dcn315_init +ffffffff8246b060 t define_hpd_registers +ffffffff8246b0b0 t define_ddc_registers +ffffffff8246b160 t define_generic_registers +ffffffff8246c000 T dal_hw_translate_dcn315_init +ffffffff8246c030 t offset_to_id +ffffffff8246c2b0 t id_to_offset +ffffffff8246d000 T dal_hw_factory_dcn32_init +ffffffff8246d060 t define_hpd_registers +ffffffff8246d0b0 t define_ddc_registers +ffffffff8246d160 t define_generic_registers +ffffffff8246e000 T dal_hw_translate_dcn32_init +ffffffff8246e030 t offset_to_id +ffffffff8246e290 t id_to_offset +ffffffff8246f000 T dal_gpio_open +ffffffff8246f0c0 T dal_gpio_open_ex +ffffffff8246f180 T dal_gpio_get_value +ffffffff8246f210 T dal_gpio_set_value +ffffffff8246f2a0 T dal_gpio_get_mode +ffffffff8246f2d0 T dal_gpio_lock_pin +ffffffff8246f2f0 T dal_gpio_unlock_pin +ffffffff8246f310 T dal_gpio_change_mode +ffffffff8246f3a0 T dal_gpio_get_id +ffffffff8246f3d0 T dal_gpio_get_enum +ffffffff8246f400 T dal_gpio_set_config +ffffffff8246f490 T dal_gpio_get_pin_info +ffffffff8246f4f0 T dal_gpio_get_sync_source +ffffffff8246f580 T dal_gpio_get_output_state +ffffffff8246f5b0 T dal_gpio_get_ddc +ffffffff8246f5e0 T dal_gpio_get_hpd +ffffffff8246f610 T dal_gpio_get_generic +ffffffff8246f640 T dal_gpio_close +ffffffff8246f6a0 T dal_gpio_create +ffffffff8246f850 T dal_gpio_destroy +ffffffff82470000 T dal_gpio_service_create +ffffffff82470280 T dal_gpio_service_create_irq +ffffffff82470350 T dal_gpio_create_irq +ffffffff824703e0 T dal_gpio_service_create_generic_mux +ffffffff82470490 T dal_gpio_destroy_generic_mux +ffffffff82470530 T dal_gpio_get_generic_pin_info +ffffffff824705a0 T dal_gpio_service_destroy +ffffffff82470720 T dal_mux_setup_config +ffffffff82470790 T dal_gpio_service_lock +ffffffff82470810 T dal_gpio_service_unlock +ffffffff82470890 T dal_gpio_service_open +ffffffff82470b20 T dal_gpio_service_close +ffffffff82470bc0 T dal_irq_get_source +ffffffff82470c40 T dal_irq_get_rx_source +ffffffff82470ca0 T dal_irq_setup_hpd_filter +ffffffff82470d00 T dal_gpio_destroy_irq +ffffffff82470da0 T dal_gpio_create_ddc +ffffffff82470f50 T dal_gpio_destroy_ddc +ffffffff82471050 T dal_ddc_close +ffffffff824710a0 T dal_ddc_open +ffffffff82471230 T dal_ddc_change_mode +ffffffff82471300 T dal_ddc_get_line +ffffffff82471320 T dal_ddc_set_config +ffffffff82472000 T dal_hw_ddc_init +ffffffff82472120 T dal_hw_ddc_get_pin +ffffffff82472130 t dal_hw_ddc_destroy +ffffffff824721a0 t set_config +ffffffff82473000 T dal_hw_factory_init +ffffffff82474000 T dal_hw_generic_init +ffffffff82474120 T dal_hw_generic_get_pin +ffffffff82474130 t dal_hw_generic_destroy +ffffffff824741a0 t set_config +ffffffff82475000 T dal_hw_gpio_open +ffffffff824750d0 T dal_hw_gpio_config_mode +ffffffff824751c0 T dal_hw_gpio_get_value +ffffffff82475230 T dal_hw_gpio_set_value +ffffffff824752c0 T dal_hw_gpio_change_mode +ffffffff824752d0 T dal_hw_gpio_close +ffffffff824753a0 T dal_hw_gpio_construct +ffffffff82475400 T dal_hw_gpio_destruct +ffffffff82476000 T dal_hw_hpd_init +ffffffff82476120 T dal_hw_hpd_get_pin +ffffffff82476130 t dal_hw_hpd_destroy +ffffffff824761a0 t get_value +ffffffff82476240 t set_config +ffffffff82477000 T dal_hw_translate_init +ffffffff82478000 T dc_process_hdcp_msg +ffffffff82478190 t hdmi_14_process_transaction +ffffffff82478310 t dp_11_process_transaction +ffffffff82479000 T dal_irq_service_dummy_set +ffffffff82479060 T dal_irq_service_dummy_ack +ffffffff824790c0 T dce110_vblank_set +ffffffff824791b0 T to_dal_irq_source_dce110 +ffffffff82479330 T dal_irq_service_dce110_create +ffffffff824793c0 t hpd_ack +ffffffff8247a000 T dal_irq_service_dce120_create ffffffff8247a090 t hpd_ack -ffffffff8247b000 T dal_irq_service_dcn10_create +ffffffff8247b000 T dal_irq_service_dce80_create ffffffff8247b090 t hpd_ack -ffffffff8247b160 t to_dal_irq_source_dcn10 -ffffffff8247c000 T dal_irq_service_dcn20_create +ffffffff8247c000 T dal_irq_service_dcn10_create ffffffff8247c090 t hpd_ack -ffffffff8247c160 t to_dal_irq_source_dcn20 -ffffffff8247d000 T dal_irq_service_dcn201_create +ffffffff8247c160 t to_dal_irq_source_dcn10 +ffffffff8247d000 T dal_irq_service_dcn20_create ffffffff8247d090 t hpd_ack -ffffffff8247d160 t to_dal_irq_source_dcn201 -ffffffff8247e000 T dal_irq_service_dcn21_create +ffffffff8247d160 t to_dal_irq_source_dcn20 +ffffffff8247e000 T dal_irq_service_dcn201_create ffffffff8247e090 t hpd_ack -ffffffff8247e160 t to_dal_irq_source_dcn21 -ffffffff8247f000 T dal_irq_service_dcn30_create +ffffffff8247e160 t to_dal_irq_source_dcn201 +ffffffff8247f000 T dal_irq_service_dcn21_create ffffffff8247f090 t hpd_ack -ffffffff8247f160 t to_dal_irq_source_dcn30 -ffffffff82480000 T dal_irq_service_dcn302_create +ffffffff8247f160 t to_dal_irq_source_dcn21 +ffffffff82480000 T dal_irq_service_dcn30_create ffffffff82480090 t hpd_ack -ffffffff82480160 t to_dal_irq_source_dcn302 -ffffffff82481000 T dal_irq_service_dcn303_create +ffffffff82480160 t to_dal_irq_source_dcn30 +ffffffff82481000 T dal_irq_service_dcn302_create ffffffff82481090 t hpd_ack -ffffffff82481160 t to_dal_irq_source_dcn303 -ffffffff82482000 T dal_irq_service_dcn31_create +ffffffff82481160 t to_dal_irq_source_dcn302 +ffffffff82482000 T dal_irq_service_dcn303_create ffffffff82482090 t hpd_ack -ffffffff82482160 t to_dal_irq_source_dcn31 -ffffffff82483000 T dal_irq_service_dcn314_create +ffffffff82482160 t to_dal_irq_source_dcn303 +ffffffff82483000 T dal_irq_service_dcn31_create ffffffff82483090 t hpd_ack -ffffffff82483160 t to_dal_irq_source_dcn314 -ffffffff82484000 T dal_irq_service_dcn315_create +ffffffff82483160 t to_dal_irq_source_dcn31 +ffffffff82484000 T dal_irq_service_dcn314_create ffffffff82484090 t hpd_ack -ffffffff82484160 t to_dal_irq_source_dcn315 -ffffffff82485000 T dal_irq_service_dcn32_create +ffffffff82484160 t to_dal_irq_source_dcn314 +ffffffff82485000 T dal_irq_service_dcn315_create ffffffff82485090 t hpd_ack -ffffffff82485160 t to_dal_irq_source_dcn32 -ffffffff82486000 T dal_irq_service_construct -ffffffff82486070 T dal_irq_service_destroy -ffffffff82486100 T dal_irq_service_set_generic -ffffffff82486180 T dal_irq_service_set -ffffffff82486360 T dal_irq_service_ack -ffffffff82486500 T dal_irq_service_ack_generic -ffffffff82486580 T dal_irq_service_to_irq_source -ffffffff82487000 T dp_handle_automated_test -ffffffff82487910 T dp_set_test_pattern -ffffffff82488110 t set_crtc_test_pattern -ffffffff824885f0 T dp_set_preferred_link_settings -ffffffff82488750 t dp_retrain_link_dp_test -ffffffff82488890 T dp_set_preferred_training_settings -ffffffff82489000 T dp_trace_init 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set_dio_throttled_vcp_size -ffffffff8248b020 T setup_dio_stream_encoder -ffffffff8248b130 T reset_dio_stream_encoder -ffffffff8248b220 T setup_dio_stream_attribute -ffffffff8248b3e0 T enable_dio_dp_link_output -ffffffff8248b480 T disable_dio_link_output -ffffffff8248b4f0 T set_dio_dp_link_test_pattern -ffffffff8248b560 T set_dio_dp_lane_settings -ffffffff8248b5a0 T update_dio_stream_allocation_table -ffffffff8248b620 T setup_dio_audio_output -ffffffff8248b690 T enable_dio_audio_packet -ffffffff8248b760 T disable_dio_audio_packet -ffffffff8248b850 T can_use_dio_link_hwss -ffffffff8248b890 T get_dio_link_hwss -ffffffff8248c000 T dp_dio_fixed_vs_pe_retimer_lane_cfg_to_hw_cfg -ffffffff8248c040 T dp_dio_fixed_vs_pe_retimer_exit_manual_automation -ffffffff8248c2e0 T enable_dio_fixed_vs_pe_retimer_program_4lane_output -ffffffff8248c440 T requires_fixed_vs_pe_retimer_dio_link_hwss -ffffffff8248c480 T get_dio_fixed_vs_pe_retimer_link_hwss -ffffffff8248c4b0 t enable_dio_fixed_vs_pe_retimer_dp_link_output -ffffffff8248c650 t set_dio_fixed_vs_pe_retimer_dp_link_test_pattern -ffffffff8248d000 T can_use_dpia_link_hwss -ffffffff8248d050 T get_dpia_link_hwss -ffffffff8248d080 t update_dpia_stream_allocation_table -ffffffff8248e000 T set_hpo_dp_throttled_vcp_size -ffffffff8248e030 T set_hpo_dp_hblank_min_symbol_width -ffffffff8248e160 T setup_hpo_dp_stream_encoder -ffffffff8248e1b0 T reset_hpo_dp_stream_encoder -ffffffff8248e1d0 T setup_hpo_dp_stream_attribute -ffffffff8248e250 T enable_hpo_dp_link_output -ffffffff8248e2d0 T disable_hpo_dp_link_output -ffffffff8248e380 T update_hpo_dp_stream_allocation_table -ffffffff8248e3a0 T setup_hpo_dp_audio_output -ffffffff8248e3e0 T enable_hpo_dp_audio_packet -ffffffff8248e400 T disable_hpo_dp_audio_packet -ffffffff8248e450 T can_use_hpo_dp_link_hwss -ffffffff8248e480 T get_hpo_dp_link_hwss -ffffffff8248e4b0 t set_hpo_dp_link_test_pattern -ffffffff8248e510 t set_hpo_dp_lane_settings -ffffffff8248f000 T requires_fixed_vs_pe_retimer_hpo_link_hwss -ffffffff8248f040 T get_hpo_fixed_vs_pe_retimer_dp_link_hwss -ffffffff8248f070 t enable_hpo_fixed_vs_pe_retimer_dp_link_output -ffffffff8248f0d0 t set_hpo_fixed_vs_pe_retimer_dp_link_test_pattern -ffffffff8248f4c0 t set_hpo_fixed_vs_pe_retimer_dp_lane_settings -ffffffff8248f550 t dp_hpo_fixed_vs_pe_retimer_set_tx_ffe -ffffffff82490000 T link_reset_cur_dp_mst_topology -ffffffff82490060 T link_detect_connection_type -ffffffff824901b0 T link_detect -ffffffff82491e30 T link_clear_dprx_states -ffffffff82491e60 T link_is_hdcp14 -ffffffff82491ec0 T link_is_hdcp22 -ffffffff82491f30 T link_get_status -ffffffff82491f60 T link_add_remote_sink -ffffffff82492140 T link_remove_remote_sink -ffffffff82492230 t wait_for_entering_dp_alt_mode -ffffffff82493000 T link_blank_all_dp_displays -ffffffff824930f0 T link_blank_dp_stream -ffffffff82493230 T link_blank_all_edp_displays -ffffffff82493300 T link_set_all_streams_dpms_off_for_link -ffffffff82493420 T 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sdmmc_minphys -ffffffff8281b280 T sdmmc_scsi_attach -ffffffff8281b4c0 T sdmmc_alloc_ccbs -ffffffff8281b620 T sdmmc_free_ccbs -ffffffff8281b680 T sdmmc_scsi_detach -ffffffff8281b840 T sdmmc_stimeout -ffffffff8281b8e0 T sdmmc_ccb_alloc -ffffffff8281b9a0 T sdmmc_ccb_free -ffffffff8281baa0 T sdmmc_inquiry -ffffffff8281bd30 T sdmmc_start_xs -ffffffff8281be50 T sdmmc_complete_xs -ffffffff8281bf40 T sdmmc_done_xs -ffffffff8281bf90 T sdmmc_scsi_hibernate_io -ffffffff8281d000 T bwfm_sdio_preinit -ffffffff8281d5a0 T bwfm_sdio_txcheck -ffffffff8281d5e0 T bwfm_sdio_txdata -ffffffff8281d660 T bwfm_sdio_txctl -ffffffff8281d7f0 T bwfm_sdio_buscore_read -ffffffff8281d800 T bwfm_sdio_buscore_write -ffffffff8281d820 T bwfm_sdio_buscore_prepare -ffffffff8281d9a0 T bwfm_sdio_buscore_activate -ffffffff8281da30 T bwfm_sdio_match -ffffffff8281dae0 T bwfm_sdio_attach -ffffffff8281de80 T bwfm_sdio_detach -ffffffff8281df00 T bwfm_sdio_task -ffffffff8281e0c0 T bwfm_sdio_write_1 -ffffffff8281e0f0 T bwfm_sdio_read_1 -ffffffff8281e120 T bwfm_sdio_write_4 -ffffffff8281e1f0 T bwfm_sdio_read_4 -ffffffff8281e2b0 T bwfm_sdio_load_microcode -ffffffff8281e5a0 T bwfm_sdio_clkctl -ffffffff8281e6d0 T bwfm_sdio_dev_write -ffffffff8281e720 T bwfm_sdio_intr -ffffffff8281e770 T bwfm_sdio_ram_read_write -ffffffff8281e9f0 T bwfm_sdio_htclk -ffffffff8281ecb0 T bwfm_sdio_readshared -ffffffff8281eda0 T bwfm_sdio_dev_read -ffffffff8281ede0 T bwfm_sdio_rx_frames -ffffffff8281f210 T bwfm_sdio_tx_frames -ffffffff8281f330 T bwfm_sdio_backplane -ffffffff8281f400 T bwfm_sdio_buf_read -ffffffff8281f500 T bwfm_sdio_buf_write -ffffffff8281f5d0 T bwfm_sdio_frame_read_write -ffffffff8281f780 T bwfm_sdio_newbuf -ffffffff8281f810 T bwfm_sdio_tx_ok -ffffffff8281f870 T bwfm_sdio_tx_ctrlframe -ffffffff8281f980 T bwfm_sdio_tx_dataframe -ffffffff8281faf0 T bwfm_sdio_rx_glom -ffffffff82820000 T onewire_match -ffffffff82820060 T onewire_attach -ffffffff82820120 T onewire_detach -ffffffff82820190 T onewire_activate -ffffffff828201b0 T onewire_scan -ffffffff82820400 T onewire_createthread -ffffffff82820470 T onewire_print -ffffffff82820560 T onewirebus_print -ffffffff828205b0 T onewire_lock -ffffffff828205d0 T onewire_unlock -ffffffff828205f0 T onewire_reset -ffffffff82820610 T onewire_bit -ffffffff82820630 T onewire_read_byte -ffffffff828207c0 T onewire_write_byte -ffffffff828208d0 T onewire_read_block -ffffffff82820970 T onewire_write_block -ffffffff82820a10 T onewire_triplet -ffffffff82820b20 T onewire_matchrom -ffffffff82820d10 T onewire_search -ffffffff82821180 T onewire_thread -ffffffff82822000 T onewire_crc -ffffffff828220b0 T onewire_crc16 -ffffffff82822170 T onewire_famname -ffffffff828221b0 T onewire_matchbyfam -ffffffff82823000 T owid_match -ffffffff82823030 T owid_attach -ffffffff82823120 T owid_detach -ffffffff82823170 T owid_activate -ffffffff82824000 T owsbm_match -ffffffff82824030 T owsbm_attach -ffffffff82824240 T owsbm_detach -ffffffff828242d0 T owsbm_activate -ffffffff82824300 T owsbm_update -ffffffff82825000 T owtemp_match -ffffffff82825030 T owtemp_attach -ffffffff82825160 T owtemp_detach -ffffffff828251f0 T owtemp_activate -ffffffff82825220 T owtemp_update -ffffffff82826000 T owctr_match -ffffffff82826030 T owctr_attach -ffffffff828261c0 T owctr_detach -ffffffff82826250 T owctr_activate -ffffffff82826280 T owctr_update -ffffffff828262c0 T owctr_update_counter -ffffffff82827000 A __text_page_start -ffffffff82827000 T Xsyscall_meltdown -ffffffff8282700c T Xsyscall -ffffffff82827299 t Xsyscall_trampback -ffffffff828272b0 T intr_user_exit -ffffffff828272f2 t intr_user_exit_post_ast -ffffffff8282744b t Xiretq_trampback -ffffffff82827457 T doreti_iret -ffffffff82828000 T alltraps -ffffffff82828138 T recall_trap -ffffffff82828150 T alltraps_kern -ffffffff82828153 T alltraps_kern_meltdown -ffffffff82829000 ? Xtrap00 -ffffffff82829000 A __kutext_start -ffffffff82829000 A __text_page_end -ffffffff82829010 ? Xtrap01 -ffffffff82829020 ? Xtrap02 -ffffffff82829028 c calltrap_specstk -ffffffff828290f0 ? calltrap_specstk_tramp -ffffffff82829110 ? Xtrap03 -ffffffff82829120 ? Xtrap04 -ffffffff82829130 ? Xtrap05 -ffffffff82829140 ? Xtrap06 -ffffffff82829150 ? Xtrap07 -ffffffff82829160 ? Xtrap08 -ffffffff82829170 ? Xtrap09 -ffffffff82829180 ? Xtrap0a -ffffffff82829190 ? Xtrap0b -ffffffff828291a0 ? Xtrap0c -ffffffff828291b0 ? Xtrap0d -ffffffff82829240 ? Xtrap0e -ffffffff82829250 ? Xintrspurious -ffffffff82829250 ? Xtrap0f -ffffffff82829260 ? Xtrap10 -ffffffff82829270 ? Xtrap11 -ffffffff82829280 ? Xtrap12 -ffffffff82829290 ? Xtrap13 -ffffffff828292a0 ? Xtrap14 -ffffffff828292b0 ? Xtrap15 -ffffffff828292c0 ? Xtrap16 -ffffffff828292c0 ? Xtrap17 -ffffffff828292c0 ? Xtrap18 -ffffffff828292c0 ? Xtrap19 -ffffffff828292c0 ? Xtrap1a -ffffffff828292c0 ? Xtrap1b -ffffffff828292c0 ? Xtrap1c -ffffffff828292c0 ? Xtrap1d -ffffffff828292c0 ? Xtrap1e -ffffffff828292c0 ? Xtrap1f -ffffffff828292d0 ? x2apic_eoi -ffffffff828292f0 ? Xintr_lapic_ipi -ffffffff82829330 ? Xipi_invltlb -ffffffff82829360 ? Xipi_invlpg -ffffffff82829390 ? Xipi_invlrange -ffffffff828293d0 ? Xipi_invltlb_pcid -ffffffff82829410 ? Xipi_invlpg_pcid -ffffffff82829460 ? Xipi_invlrange_pcid -ffffffff828294d0 ? Xintr_lapic_ltimer -ffffffff82829510 ? Xintr_xen_upcall -ffffffff82829550 ? Xintr_hyperv_upcall -ffffffff82829590 ? Xintr_legacy0 -ffffffff828295d0 ? Xintr_legacy1 -ffffffff82829610 ? Xintr_legacy2 -ffffffff82829650 ? Xintr_legacy3 -ffffffff82829690 ? Xintr_legacy4 -ffffffff828296d0 ? Xintr_legacy5 -ffffffff82829710 ? Xintr_legacy6 -ffffffff82829750 ? Xintr_legacy7 -ffffffff82829790 ? Xintr_legacy8 -ffffffff828297d0 ? Xintr_legacy9 -ffffffff82829810 ? Xintr_legacy10 -ffffffff82829850 ? Xintr_legacy11 -ffffffff82829890 ? Xintr_legacy12 -ffffffff828298d0 ? Xintr_legacy13 -ffffffff82829910 ? Xintr_legacy14 -ffffffff82829950 ? Xintr_legacy15 -ffffffff82829990 ? Xintr_ioapic_edge0 -ffffffff828299d0 ? Xintr_ioapic_edge1 -ffffffff82829a10 ? Xintr_ioapic_edge2 -ffffffff82829a50 ? Xintr_ioapic_edge3 -ffffffff82829a90 ? Xintr_ioapic_edge4 -ffffffff82829ad0 ? Xintr_ioapic_edge5 -ffffffff82829b10 ? Xintr_ioapic_edge6 -ffffffff82829b50 ? Xintr_ioapic_edge7 -ffffffff82829b90 ? Xintr_ioapic_edge8 -ffffffff82829bd0 ? Xintr_ioapic_edge9 -ffffffff82829c10 ? Xintr_ioapic_edge10 -ffffffff82829c50 ? Xintr_ioapic_edge11 -ffffffff82829c90 ? Xintr_ioapic_edge12 -ffffffff82829cd0 ? Xintr_ioapic_edge13 -ffffffff82829d10 ? Xintr_ioapic_edge14 -ffffffff82829d50 ? Xintr_ioapic_edge15 -ffffffff82829d90 ? Xintr_ioapic_edge16 -ffffffff82829dd0 ? Xintr_ioapic_edge17 -ffffffff82829e10 ? Xintr_ioapic_edge18 -ffffffff82829e50 ? Xintr_ioapic_edge19 -ffffffff82829e90 ? Xintr_ioapic_edge20 -ffffffff82829ed0 ? Xintr_ioapic_edge21 -ffffffff82829f10 ? Xintr_ioapic_edge22 -ffffffff82829f50 ? Xintr_ioapic_edge23 -ffffffff82829f90 ? Xintr_ioapic_edge24 -ffffffff82829fd0 ? Xintr_ioapic_edge25 -ffffffff8282a010 ? Xintr_ioapic_edge26 -ffffffff8282a050 ? Xintr_ioapic_edge27 -ffffffff8282a090 ? Xintr_ioapic_edge28 -ffffffff8282a0d0 ? Xintr_ioapic_edge29 -ffffffff8282a110 ? Xintr_ioapic_edge30 -ffffffff8282a150 ? Xintr_ioapic_edge31 -ffffffff8282a190 ? Xintr_ioapic_edge32 -ffffffff8282a1d0 ? Xintr_ioapic_edge33 -ffffffff8282a210 ? Xintr_ioapic_edge34 -ffffffff8282a250 ? Xintr_ioapic_edge35 -ffffffff8282a290 ? Xintr_ioapic_edge36 -ffffffff8282a2d0 ? Xintr_ioapic_edge37 -ffffffff8282a310 ? Xintr_ioapic_edge38 -ffffffff8282a350 ? Xintr_ioapic_edge39 -ffffffff8282a390 ? Xintr_ioapic_edge40 -ffffffff8282a3d0 ? Xintr_ioapic_edge41 -ffffffff8282a410 ? Xintr_ioapic_edge42 -ffffffff8282a450 ? Xintr_ioapic_edge43 -ffffffff8282a490 ? Xintr_ioapic_edge44 -ffffffff8282a4d0 ? Xintr_ioapic_edge45 -ffffffff8282a510 ? Xintr_ioapic_edge46 -ffffffff8282a550 ? Xintr_ioapic_edge47 -ffffffff8282a590 ? Xintr_ioapic_edge48 -ffffffff8282a5d0 ? Xintr_ioapic_edge49 -ffffffff8282a610 ? Xintr_ioapic_edge50 -ffffffff8282a650 ? Xintr_ioapic_edge51 -ffffffff8282a690 ? Xintr_ioapic_edge52 -ffffffff8282a6d0 ? Xintr_ioapic_edge53 -ffffffff8282a710 ? Xintr_ioapic_edge54 -ffffffff8282a750 ? Xintr_ioapic_edge55 -ffffffff8282a790 ? Xintr_ioapic_edge56 -ffffffff8282a7d0 ? Xintr_ioapic_edge57 -ffffffff8282a810 ? Xintr_ioapic_edge58 -ffffffff8282a850 ? Xintr_ioapic_edge59 -ffffffff8282a890 ? Xintr_ioapic_edge60 -ffffffff8282a8d0 ? Xintr_ioapic_edge61 -ffffffff8282a910 ? Xintr_ioapic_edge62 -ffffffff8282a950 ? Xintr_ioapic_edge63 -ffffffff8282a990 ? Xintr_ioapic_level0 -ffffffff8282a9d0 ? Xintr_ioapic_level1 -ffffffff8282aa10 ? Xintr_ioapic_level2 -ffffffff8282aa50 ? Xintr_ioapic_level3 -ffffffff8282aa90 ? Xintr_ioapic_level4 -ffffffff8282aad0 ? Xintr_ioapic_level5 -ffffffff8282ab10 ? Xintr_ioapic_level6 -ffffffff8282ab50 ? Xintr_ioapic_level7 -ffffffff8282ab90 ? Xintr_ioapic_level8 -ffffffff8282abd0 ? Xintr_ioapic_level9 -ffffffff8282ac10 ? Xintr_ioapic_level10 -ffffffff8282ac50 ? Xintr_ioapic_level11 -ffffffff8282ac90 ? Xintr_ioapic_level12 -ffffffff8282acd0 ? Xintr_ioapic_level13 -ffffffff8282ad10 ? Xintr_ioapic_level14 -ffffffff8282ad50 ? Xintr_ioapic_level15 -ffffffff8282ad90 ? Xintr_ioapic_level16 -ffffffff8282add0 ? Xintr_ioapic_level17 -ffffffff8282ae10 ? Xintr_ioapic_level18 -ffffffff8282ae50 ? Xintr_ioapic_level19 -ffffffff8282ae90 ? Xintr_ioapic_level20 -ffffffff8282aed0 ? Xintr_ioapic_level21 -ffffffff8282af10 ? Xintr_ioapic_level22 -ffffffff8282af50 ? Xintr_ioapic_level23 -ffffffff8282af90 ? Xintr_ioapic_level24 -ffffffff8282afd0 ? Xintr_ioapic_level25 -ffffffff8282b010 ? Xintr_ioapic_level26 -ffffffff8282b050 ? Xintr_ioapic_level27 -ffffffff8282b090 ? Xintr_ioapic_level28 -ffffffff8282b0d0 ? Xintr_ioapic_level29 -ffffffff8282b110 ? Xintr_ioapic_level30 -ffffffff8282b150 ? Xintr_ioapic_level31 -ffffffff8282b190 ? Xintr_ioapic_level32 -ffffffff8282b1d0 ? Xintr_ioapic_level33 -ffffffff8282b210 ? Xintr_ioapic_level34 -ffffffff8282b250 ? Xintr_ioapic_level35 -ffffffff8282b290 ? Xintr_ioapic_level36 -ffffffff8282b2d0 ? Xintr_ioapic_level37 -ffffffff8282b310 ? Xintr_ioapic_level38 -ffffffff8282b350 ? Xintr_ioapic_level39 -ffffffff8282b390 ? Xintr_ioapic_level40 -ffffffff8282b3d0 ? Xintr_ioapic_level41 -ffffffff8282b410 ? Xintr_ioapic_level42 -ffffffff8282b450 ? Xintr_ioapic_level43 -ffffffff8282b490 ? Xintr_ioapic_level44 -ffffffff8282b4d0 ? Xintr_ioapic_level45 -ffffffff8282b510 ? Xintr_ioapic_level46 -ffffffff8282b550 ? Xintr_ioapic_level47 -ffffffff8282b590 ? Xintr_ioapic_level48 -ffffffff8282b5d0 ? Xintr_ioapic_level49 -ffffffff8282b610 ? Xintr_ioapic_level50 -ffffffff8282b650 ? Xintr_ioapic_level51 -ffffffff8282b690 ? Xintr_ioapic_level52 -ffffffff8282b6d0 ? Xintr_ioapic_level53 -ffffffff8282b710 ? Xintr_ioapic_level54 -ffffffff8282b750 ? Xintr_ioapic_level55 -ffffffff8282b790 ? Xintr_ioapic_level56 -ffffffff8282b7d0 ? Xintr_ioapic_level57 -ffffffff8282b810 ? Xintr_ioapic_level58 -ffffffff8282b850 ? Xintr_ioapic_level59 -ffffffff8282b890 ? Xintr_ioapic_level60 -ffffffff8282b8d0 ? Xintr_ioapic_level61 -ffffffff8282b910 ? Xintr_ioapic_level62 -ffffffff8282b950 ? Xintr_ioapic_level63 -ffffffff8282c000 ? codepatch_fill_nop -ffffffff8282c000 A __cptext_start -ffffffff8282c000 A __kutext_end -ffffffff8282c0b0 ? codepatch_maprw -ffffffff8282c1c0 ? codepatch_unmaprw -ffffffff8282c230 ? codepatch_nop -ffffffff8282c3b0 ? codepatch_replace -ffffffff8282c580 ? codepatch_call -ffffffff8282c5a0 ? codepatch_control_flow -ffffffff8282c7c0 ? codepatch_jmp -ffffffff8282d000 A __cptext_end -ffffffff8282d000 A __rodata_start -ffffffff8282d000 C _etext -ffffffff8282d000 C etext -ffffffff8282e000 r seeprom_read -ffffffff8282e004 r icl_mg_pll_find_divisors.div1_vals -ffffffff8282e034 r athn_ac2qid -ffffffff8282e034 r athn_ac2qid -ffffffff8282e034 r athn_ac2qid -ffffffff8282e040 r rtwn_get_rssi.cckoff -ffffffff8282e068 r rsu_ac2qid -ffffffff8282e078 r pckbc_portcmd -ffffffff8282e07c r tht_fifo_write_pad.pad -ffffffff8282e084 r rsu_get_rssi.cckoff -ffffffff8282e0a4 r adlp_n_revids -ffffffff8282e0e8 r apple_iso_trans -ffffffff8282e0f0 r wihap_check_tx.txratetable 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vga_50lscreen_mono -ffffffff829411c8 R vga_50lscreen_bf -ffffffff829411f8 R vga_screenlist -ffffffff82941208 R vga_screenlist_mono -ffffffff82941218 R vga_accessops -ffffffff82941278 r i945_wm_info -ffffffff829412b8 r bgansitopc -ffffffff829412c0 r pctoansi -ffffffff82941300 r sdma_offsets -ffffffff82941300 r sdma_offsets -ffffffff82941338 r iha_rate_tbl -ffffffff82941370 r i830_a_wm_info -ffffffff829413a8 r gen9_edram_size_mb.ways -ffffffff82941408 r aggr_periodic_times -ffffffff82941508 r michael_final.pad -ffffffff82941530 r rt_copysa.maskarray -ffffffff82941538 r i915_wm_info -ffffffff82941540 r amdgpu_ih_clientid_jpeg -ffffffff82941540 r amdgpu_ih_clientid_uvds -ffffffff82941540 r amdgpu_ih_clientid_vcns -ffffffff82941540 r amdgpu_ih_clientid_vcns -ffffffff82941540 r amdgpu_ih_clientid_vcns -ffffffff82941570 r jsl_ehl_revids -ffffffff82941580 r vga_setfontset.cmaptabb -ffffffff829415f0 r i830_bc_wm_info -ffffffff82941658 r hsw_activate_psr2.map -ffffffff82941660 r tgl_revids -ffffffff82941698 r __drm_universal_plane_init.default_modifiers -ffffffff829416a8 r iwn_tid2fifo -ffffffff829416c0 r vga_setfontset.cmaptaba -ffffffff829416c8 r crtc_offsets -ffffffff829416c8 r crtc_offsets -ffffffff829416c8 r crtc_offsets -ffffffff82941770 r rtwn_r88e_get_rssi.cckoff -ffffffff82942000 R edid_vendors -ffffffff829422c0 R edid_nvendors -ffffffff829422d0 R edid_products -ffffffff82942330 R edid_nproducts -ffffffff82942340 r _edid_modes -ffffffff82943000 R videomode_list -ffffffff82944080 R videomode_count -ffffffff82945000 r ahc_hard_errors -ffffffff82945080 r critical_sections -ffffffff829450b0 r patches -ffffffff82945d50 r seqprog -ffffffff82947000 r ahc_switch -ffffffff82948000 r termstat_strings -ffffffff82948020 r critical_sections -ffffffff82948060 r seqprog -ffffffff82948d50 r patches -ffffffff8294a000 r ahd_switch -ffffffff8294b000 R aic_switch -ffffffff8294c000 R adw_switch -ffffffff8294d000 R gdt_switch -ffffffff8294e000 R twe_switch -ffffffff8294f000 R ciss_switch -ffffffff8294f030 R ciss_level -ffffffff8294f050 R ciss_stat -ffffffff82950000 R ami_switch -ffffffff82950028 R ami_raw_switch -ffffffff82951000 R mfi_switch -ffffffff82951028 R mfi_pd_switch -ffffffff82951050 r mfi_iop_xscale -ffffffff82951080 r mfi_iop_ppc -ffffffff829510b0 r mfi_iop_gen2 -ffffffff829510e0 r mfi_iop_skinny -ffffffff82951110 r mfi_bbu_indicators -ffffffff82952000 R qlw_switch -ffffffff82953000 R isp_2100_risc_code -ffffffff82965bf0 R isp_2200_risc_code -ffffffff82978990 R isp_2300_risc_code -ffffffff82992408 R qla_switch -ffffffff82992430 r qla_regs_2100 -ffffffff82992460 r qla_regs_2200 -ffffffff82992490 r qla_regs_23XX -ffffffff82993000 R ahci_atascsi_methods -ffffffff82994000 R nvme_switch -ffffffff82994028 r nvme_ops -ffffffff82995000 R mpi_switch -ffffffff82995060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs -ffffffff82995090 r chv_oa_mux_regs -ffffffff829950b0 r fiji_clock_stretcher_lookup_table -ffffffff829950b0 r tonga_clock_stretcher_lookup_table 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amdgpu_dpm_get_entrycount_gfxoff +ffffffff824e6010 T amdgpu_dpm_get_status_gfxoff +ffffffff824e60b0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff824e6110 T amdgpu_dpm_gfx_state_change +ffffffff824e6180 T amdgpu_dpm_get_ecc_info +ffffffff824e6220 T amdgpu_dpm_get_vce_clock_state +ffffffff824e62d0 T amdgpu_dpm_get_current_power_state +ffffffff824e6350 T amdgpu_dpm_set_power_state +ffffffff824e6500 T amdgpu_dpm_dispatch_task +ffffffff824e65c0 T amdgpu_dpm_get_performance_level +ffffffff824e6660 T amdgpu_dpm_force_performance_level +ffffffff824e6890 T amdgpu_dpm_get_pp_num_states +ffffffff824e6940 T amdgpu_dpm_get_pp_table +ffffffff824e69f0 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff824e6ab0 T amdgpu_dpm_odn_edit_dpm_table +ffffffff824e6b70 T amdgpu_dpm_print_clock_levels +ffffffff824e6c20 T amdgpu_dpm_emit_clock_levels +ffffffff824e6ce0 T amdgpu_dpm_set_ppfeature_status +ffffffff824e6d90 T amdgpu_dpm_get_ppfeature_status +ffffffff824e6e40 T amdgpu_dpm_force_clock_level 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pp_atomfwctrl_get_voltage_table_v4 +ffffffff824fc2c0 T pp_atomfwctrl_get_pp_assign_pin +ffffffff824fc3c0 T pp_atomfwctrl_enter_self_refresh +ffffffff824fc3f0 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff824fc4a0 T pp_atomfwctrl_get_avfs_information +ffffffff824fc7e0 T pp_atomfwctrl_get_gpio_information +ffffffff824fc890 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff824fc920 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff824fcd10 T pp_atomfwctrl_get_smc_dpm_information +ffffffff824fd000 T encode_pcie_lane_width +ffffffff824fd030 T decode_pcie_lane_width +ffffffff824fe000 t pp_tables_v1_0_initialize +ffffffff824ff590 t pp_tables_v1_0_uninitialize +ffffffff824ff7b0 T get_number_of_powerplay_table_entries_v1_0 +ffffffff824ff870 T get_powerplay_table_entry_v1_0 +ffffffff82500000 T pp_tables_get_response_times +ffffffff825000f0 T pp_tables_get_num_of_entries +ffffffff825001c0 T pp_tables_get_entry +ffffffff82500520 t init_non_clock_fields +ffffffff82500660 t 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smu7_fan_ctrl_start_smc_fan_control +ffffffff825145f0 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff82514610 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff82514840 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff82514a90 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff82514cc0 T smu7_thermal_get_temperature +ffffffff82514d20 T smu7_thermal_disable_alert +ffffffff82514de0 T smu7_thermal_stop_thermal_controller +ffffffff82514fa0 T smu7_start_thermal_controller +ffffffff825153f0 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff82516000 T smu8_init_function_pointers +ffffffff82516040 t smu8_hwmgr_backend_init +ffffffff82516550 t smu8_hwmgr_backend_fini +ffffffff825165e0 t smu8_setup_asic_task +ffffffff82516b90 t smu8_get_power_state_size +ffffffff82516bc0 t smu8_apply_state_adjust_rules +ffffffff82516d20 t smu8_dpm_force_dpm_level +ffffffff82517010 t smu8_enable_dpm_tasks +ffffffff825171c0 t smu8_disable_dpm_tasks +ffffffff825172c0 t smu8_dpm_patch_boot_state +ffffffff82517320 t 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smu8_dpm_get_pp_table_entry_callback +ffffffff82519000 T smu9_baco_get_capability +ffffffff82519100 T smu9_baco_get_state +ffffffff8251a000 T convert_to_vid +ffffffff8251a050 T convert_to_vddc +ffffffff8251a090 T phm_copy_clock_limits_array +ffffffff8251a170 T phm_copy_overdrive_settings_limits_array +ffffffff8251a250 T phm_set_field_to_u32 +ffffffff8251a2b0 T phm_wait_on_register +ffffffff8251a3c0 T phm_wait_on_indirect_register +ffffffff8251a500 T phm_wait_for_register_unequal +ffffffff8251a5f0 T phm_wait_for_indirect_register_unequal +ffffffff8251a710 T phm_cf_want_uvd_power_gating +ffffffff8251a750 T phm_cf_want_vce_power_gating +ffffffff8251a790 T phm_trim_voltage_table +ffffffff8251a8d0 T phm_get_svi2_mvdd_voltage_table +ffffffff8251aa80 T phm_get_svi2_vddci_voltage_table +ffffffff8251ac30 T phm_get_svi2_vdd_voltage_table +ffffffff8251ace0 T phm_trim_voltage_table_to_fit_state_table +ffffffff8251add0 T phm_reset_single_dpm_table +ffffffff8251ae30 T phm_setup_pcie_table_entry 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vega10_thermal_disable_alert +ffffffff8252e170 T vega10_thermal_stop_thermal_controller +ffffffff8252e1d0 T vega10_enable_mgpu_fan_boost +ffffffff8252e310 T vega10_start_thermal_controller +ffffffff8252e970 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff8252f000 T vega12_baco_set_state +ffffffff82530000 T vega12_enable_disable_vce_dpm +ffffffff825300a0 T vega12_hwmgr_init +ffffffff825300e0 t vega12_hwmgr_backend_init +ffffffff82530930 t vega12_hwmgr_backend_fini +ffffffff82530990 t vega12_setup_asic_task +ffffffff825309d0 t vega12_apply_clocks_adjust_rules +ffffffff82530d90 t vega12_dpm_force_dpm_level +ffffffff82531250 t vega12_enable_dpm_tasks +ffffffff82531ed0 t vega12_disable_dpm_tasks +ffffffff82531ff0 t vega12_patch_boot_state +ffffffff82532020 t vega12_power_gate_vce +ffffffff825320d0 t vega12_power_gate_uvd +ffffffff82532180 t vega12_dpm_get_mclk +ffffffff825321d0 t vega12_dpm_get_sclk +ffffffff82532220 t vega12_notify_smc_display_config_after_ps_adjustment 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vega20_baco_get_capability +ffffffff825370e0 T vega20_baco_get_state +ffffffff82537180 T vega20_baco_set_state +ffffffff825373c0 T vega20_baco_apply_vdci_flush_workaround +ffffffff82538000 T vega20_hwmgr_init +ffffffff82538040 t vega20_hwmgr_backend_init +ffffffff82538960 t vega20_hwmgr_backend_fini +ffffffff825389c0 t vega20_setup_asic_task +ffffffff82538ad0 t vega20_apply_clocks_adjust_rules +ffffffff82538f80 t vega20_dpm_force_dpm_level +ffffffff825397c0 t vega20_enable_dpm_tasks +ffffffff82539cc0 t vega20_disable_dpm_tasks +ffffffff82539e70 t vega20_power_gate_vce +ffffffff82539fd0 t vega20_power_gate_uvd +ffffffff8253a080 t vega20_dpm_get_mclk +ffffffff8253a1c0 t vega20_dpm_get_sclk +ffffffff8253a2f0 t vega20_notify_smc_display_config_after_ps_adjustment +ffffffff8253a460 t vega20_pre_display_configuration_changed_task +ffffffff8253a5f0 t vega20_display_configuration_changed_task +ffffffff8253a6e0 t vega20_set_fan_control_mode +ffffffff8253a750 t vega20_get_fan_control_mode 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vega20_validate_power_level_request +ffffffff82540090 T vega20_power_control_set_level +ffffffff82541000 t vega20_pp_tables_initialize +ffffffff825417b0 t vega20_pp_tables_uninitialize +ffffffff82542000 T vega20_fan_ctrl_stop_smc_fan_control +ffffffff825420a0 T vega20_fan_ctrl_start_smc_fan_control +ffffffff82542140 T vega20_fan_ctrl_get_fan_speed_pwm +ffffffff82542290 T vega20_fan_ctrl_set_fan_speed_pwm +ffffffff825424d0 t vega20_fan_ctrl_set_static_mode +ffffffff825426d0 T vega20_fan_ctrl_get_fan_speed_info +ffffffff82542710 T vega20_fan_ctrl_get_fan_speed_rpm +ffffffff82542780 T vega20_fan_ctrl_set_fan_speed_rpm +ffffffff82542960 T vega20_thermal_get_temperature +ffffffff82542a00 T vega20_thermal_disable_alert +ffffffff82542a90 T vega20_thermal_stop_thermal_controller +ffffffff82542b20 T vega20_start_thermal_controller +ffffffff82543000 t ci_smu_init +ffffffff82543070 t ci_smu_fini +ffffffff825430d0 t ci_start_smu +ffffffff82543100 t ci_send_msg_to_smc +ffffffff825431c0 t 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smu7_upload_smu_firmware_image +ffffffff8255a970 T smu7_setup_pwr_virus +ffffffff8255ae10 T smu7_init +ffffffff8255af50 T smu7_smu_fini +ffffffff8255c000 t smu8_smu_init +ffffffff8255c2e0 t smu8_smu_fini +ffffffff8255c390 t smu8_start_smu +ffffffff8255d630 t smu8_check_fw_load_finish +ffffffff8255d740 t smu8_get_argument +ffffffff8255d790 t smu8_send_msg_to_smc +ffffffff8255d7a0 t smu8_send_msg_to_smc_with_parameter +ffffffff8255da00 t smu8_download_pptable_settings +ffffffff8255db00 t smu8_upload_pptable_settings +ffffffff8255dc00 t smu8_is_dpm_running +ffffffff8255e000 T smu9_is_smc_ram_running +ffffffff8255e050 T smu9_send_msg_to_smc +ffffffff8255e1c0 t smu9_wait_for_response +ffffffff8255e2e0 t smu9_send_msg_to_smc_without_waiting +ffffffff8255e390 T smu9_send_msg_to_smc_with_parameter +ffffffff8255e5e0 T smu9_get_argument +ffffffff8255f000 T smum_thermal_avfs_enable +ffffffff8255f050 T smum_thermal_setup_fan_table +ffffffff8255f090 T smum_update_sclk_threshold +ffffffff8255f0d0 T smum_update_smc_table +ffffffff8255f110 T smum_get_offsetof +ffffffff8255f160 T smum_process_firmware_header +ffffffff8255f1a0 T smum_get_mac_definition +ffffffff8255f1f0 T smum_download_powerplay_table +ffffffff8255f230 T smum_upload_powerplay_table +ffffffff8255f270 T smum_send_msg_to_smc +ffffffff8255f350 T smum_send_msg_to_smc_with_parameter +ffffffff8255f440 T smum_init_smc_table +ffffffff8255f490 T smum_populate_all_graphic_levels +ffffffff8255f4e0 T smum_populate_all_memory_levels +ffffffff8255f530 T smum_initialize_mc_reg_table +ffffffff8255f580 T smum_is_dpm_running +ffffffff8255f5d0 T smum_is_hw_avfs_present +ffffffff8255f620 T smum_update_dpm_settings +ffffffff8255f670 T smum_smc_table_manager +ffffffff8255f6c0 T smum_stop_smc +ffffffff82560000 t tonga_smu_init +ffffffff825600b0 t tonga_start_smu +ffffffff82560550 t tonga_update_smc_table +ffffffff82560710 t tonga_process_firmware_header +ffffffff82560890 t tonga_update_sclk_threshold +ffffffff82560bc0 t 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vega10_enable_smc_features +ffffffff82566040 T vega10_get_enabled_smc_features +ffffffff825660b0 t vega10_smu_init +ffffffff82566460 t vega10_smu_fini +ffffffff82566570 t vega10_start_smu +ffffffff825666e0 t vega10_is_dpm_running +ffffffff82566730 t vega10_smc_table_manager +ffffffff82567000 T vega12_enable_smc_features +ffffffff82567100 T vega12_get_enabled_smc_features +ffffffff825671d0 t vega12_smu_init +ffffffff825675c0 t vega12_smu_fini +ffffffff82567700 t vega12_start_smu +ffffffff825677e0 t vega12_is_dpm_running +ffffffff82567890 t vega12_smc_table_manager +ffffffff82568000 T vega20_is_smc_ram_running +ffffffff82568050 T vega20_set_activity_monitor_coeff +ffffffff82568190 T vega20_get_activity_monitor_coeff +ffffffff825682f0 T vega20_enable_smc_features +ffffffff825683e0 T vega20_get_enabled_smc_features +ffffffff825684c0 T vega20_set_pptable_driver_address +ffffffff82568570 t vega20_smu_init +ffffffff825689c0 t vega20_smu_fini +ffffffff82568b10 t vega20_start_smu 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smu_early_init +ffffffff8256e8f0 t smu_late_init +ffffffff8256ed00 t smu_sw_init +ffffffff8256f480 t smu_sw_fini +ffffffff8256f710 t smu_hw_init +ffffffff8256fbc0 t smu_hw_fini +ffffffff8256fcd0 t smu_late_fini +ffffffff8256fcf0 t smu_suspend +ffffffff8256fde0 t smu_resume +ffffffff825700a0 t smu_set_clockgating_state +ffffffff825700d0 t smu_set_powergating_state +ffffffff82570100 T smu_get_power_limit +ffffffff82570240 T smu_mode1_reset_is_support +ffffffff82570290 T smu_mode2_reset_is_support +ffffffff825702e0 T smu_mode1_reset +ffffffff82570330 T smu_handle_passthrough_sbr +ffffffff82570380 T smu_get_ecc_info +ffffffff825703e0 T smu_wait_for_event +ffffffff82570430 T smu_stb_collect_info +ffffffff82570490 T amdgpu_smu_stb_debug_fs_init +ffffffff825704c0 T smu_send_hbm_bad_pages_num +ffffffff82570510 T smu_send_hbm_bad_channel_flag +ffffffff82570560 t smu_set_fan_control_mode +ffffffff82570620 t smu_get_fan_control_mode +ffffffff825706a0 t smu_set_fan_speed_pwm +ffffffff82570760 t smu_get_fan_speed_pwm +ffffffff825707c0 t smu_force_ppclk_levels +ffffffff82570890 t smu_print_ppclk_levels +ffffffff82570900 t smu_emit_ppclk_levels +ffffffff82570970 t smu_force_performance_level +ffffffff82570c30 t smu_read_sensor +ffffffff82570e90 t smu_get_apu_thermal_limit +ffffffff82570ee0 t smu_set_apu_thermal_limit +ffffffff82570f30 t smu_get_performance_level +ffffffff82570fa0 t smu_get_current_power_state +ffffffff82571000 t smu_get_fan_speed_rpm +ffffffff82571060 t smu_set_fan_speed_rpm +ffffffff82571120 t smu_get_power_num_states +ffffffff825711a0 t smu_sys_get_pp_table +ffffffff82571210 t smu_sys_set_pp_table +ffffffff82571450 t smu_switch_power_profile +ffffffff82571580 t smu_handle_dpm_task +ffffffff82571640 t smu_load_microcode +ffffffff82571740 t smu_dpm_set_power_gate +ffffffff82571b00 t smu_set_power_limit +ffffffff82571c40 t smu_get_power_profile_mode +ffffffff82571ca0 t smu_set_power_profile_mode +ffffffff82571d00 t smu_od_edit_dpm_table +ffffffff82571d60 t smu_set_mp1_state +ffffffff82571dc0 t smu_gfx_state_change_set +ffffffff82571e00 t smu_get_sclk +ffffffff82571e80 t smu_get_mclk +ffffffff82571f00 t smu_display_configuration_change +ffffffff82571f90 t smu_get_clock_by_type_with_latency +ffffffff82572050 t smu_display_clock_voltage_request +ffffffff825720b0 t smu_enable_mgpu_fan_boost +ffffffff82572110 t smu_set_display_count +ffffffff82572180 t smu_set_deep_sleep_dcefclk +ffffffff825721f0 t smu_get_baco_capability +ffffffff82572260 t smu_baco_set_state +ffffffff82572360 t smu_sys_get_pp_feature_mask +ffffffff825723e0 t smu_sys_set_pp_feature_mask +ffffffff82572450 t smu_mode2_reset +ffffffff82572510 t smu_enable_gfx_features +ffffffff825725d0 t smu_set_df_cstate +ffffffff825726a0 t smu_set_xgmi_pstate +ffffffff82572760 t smu_sys_get_gpu_metrics +ffffffff825727c0 t smu_set_watermarks_for_clock_ranges +ffffffff82572840 t smu_display_disable_memory_clock_switch +ffffffff825728a0 t smu_get_max_sustainable_clocks_by_dc +ffffffff82572900 t smu_get_uclk_dpm_states +ffffffff82572960 t smu_get_dpm_clock_table +ffffffff825729c0 t smu_get_prv_buffer_details +ffffffff82572a30 t smu_set_user_clk_dependencies +ffffffff82572ab0 t smu_adjust_power_state_dynamic +ffffffff82572d40 t smu_apply_default_config_table_settings +ffffffff82572e00 t smu_restore_dpm_user_profile +ffffffff82573280 t smu_throttling_logging_work_fn +ffffffff825732d0 t smu_interrupt_work_fn +ffffffff82573320 t smu_swctf_delayed_work_handler +ffffffff82573450 t __delayed_work_tick +ffffffff82573470 t smu_smc_hw_setup +ffffffff82573cb0 t smu_set_default_dpm_table +ffffffff82573e90 t smu_get_thermal_temperature_range +ffffffff82573f80 t smu_smc_hw_cleanup +ffffffff82575000 T arcturus_set_ppt_funcs +ffffffff82575050 t arcturus_run_btc +ffffffff82575110 t arcturus_get_allowed_feature_mask +ffffffff82575170 t arcturus_set_default_dpm_table +ffffffff825753d0 t arcturus_populate_umd_state_clk +ffffffff82575490 t arcturus_print_clk_levels +ffffffff82575740 t arcturus_force_clk_levels +ffffffff825759f0 t arcturus_get_power_profile_mode +ffffffff82575d20 t arcturus_set_power_profile_mode +ffffffff82576060 t arcturus_dpm_set_vcn_enable +ffffffff82576150 t arcturus_read_sensor +ffffffff82576380 t arcturus_is_dpm_running +ffffffff825763d0 t arcturus_get_fan_speed_pwm +ffffffff82576530 t arcturus_get_fan_speed_rpm +ffffffff82576650 t arcturus_get_thermal_temperature_range +ffffffff82576740 t arcturus_set_performance_level +ffffffff82576880 t arcturus_dump_pptable +ffffffff825768b0 t arcturus_get_power_limit +ffffffff825769d0 t arcturus_set_df_cstate +ffffffff82576b10 t arcturus_allow_xgmi_power_down +ffffffff82576c30 t arcturus_i2c_control_init +ffffffff82576d80 t arcturus_i2c_control_fini +ffffffff82576dc0 t arcturus_get_unique_id +ffffffff82576f00 t arcturus_init_smc_tables +ffffffff82577090 t arcturus_setup_pptable +ffffffff825771f0 t arcturus_set_fan_speed_pwm +ffffffff825773d0 t arcturus_set_fan_speed_rpm +ffffffff82577520 t arcturus_log_thermal_throttling_event +ffffffff82577970 t arcturus_get_gpu_metrics +ffffffff82577bc0 t arcturus_get_fan_parameters +ffffffff82577c00 t arcturus_get_current_clk_freq_by_table +ffffffff82577d70 t arcturus_get_smu_metrics_data +ffffffff82577ff0 t arcturus_upload_dpm_level +ffffffff82578110 t arcturus_i2c_xfer +ffffffff825783d0 t arcturus_i2c_func +ffffffff82578400 t arcturus_set_fan_static_mode +ffffffff82579000 T cyan_skillfish_set_ppt_funcs +ffffffff82579030 t cyan_skillfish_print_clk_levels +ffffffff82579170 t cyan_skillfish_od_edit_dpm_table +ffffffff825794b0 t cyan_skillfish_read_sensor +ffffffff825796e0 t cyan_skillfish_is_dpm_running +ffffffff82579790 t cyan_skillfish_init_smc_tables +ffffffff82579880 t cyan_skillfish_get_enabled_mask +ffffffff825798c0 t cyan_skillfish_get_dpm_ultimate_freq +ffffffff82579990 t cyan_skillfish_get_gpu_metrics +ffffffff82579c40 t cyan_skillfish_get_smu_metrics_data +ffffffff8257a000 T navi10_set_ppt_funcs +ffffffff8257a050 t navi10_run_btc +ffffffff8257a0e0 t navi10_get_allowed_feature_mask +ffffffff8257a3d0 t navi10_set_default_dpm_table +ffffffff8257a8f0 t navi10_populate_umd_state_clk +ffffffff8257aab0 t navi10_print_clk_levels +ffffffff8257ac90 t navi10_emit_clk_levels +ffffffff8257af00 t navi10_force_clk_levels +ffffffff8257b060 t navi10_od_edit_dpm_table +ffffffff8257b6a0 t navi10_get_clock_by_type_with_latency +ffffffff8257b7b0 t navi10_get_power_profile_mode +ffffffff8257ba90 t navi10_set_power_profile_mode +ffffffff8257bd90 t navi10_dpm_set_vcn_enable +ffffffff8257be30 t navi10_dpm_set_jpeg_enable +ffffffff8257bec0 t navi10_read_sensor +ffffffff8257c070 t navi10_pre_display_config_changed +ffffffff8257c130 t navi10_display_config_changed +ffffffff8257c1d0 t navi10_notify_smc_display_config +ffffffff8257c3a0 t navi10_is_dpm_running +ffffffff8257c3f0 t navi10_get_fan_speed_rpm +ffffffff8257c4a0 t navi10_set_watermarks_table +ffffffff8257c650 t navi10_get_thermal_temperature_range +ffffffff8257c740 t navi10_get_uclk_dpm_states +ffffffff8257c850 t navi10_set_default_od_settings +ffffffff8257cae0 t navi10_display_disable_memory_clock_switch +ffffffff8257cb70 t navi10_get_power_limit +ffffffff8257cca0 t navi10_update_pcie_parameters +ffffffff8257ce20 t navi10_i2c_control_init +ffffffff8257cf70 t navi10_i2c_control_fini +ffffffff8257cfb0 t navi10_init_smc_tables +ffffffff8257d220 t navi10_setup_pptable +ffffffff8257d490 t navi10_baco_enter +ffffffff8257d4e0 t navi10_baco_exit +ffffffff8257d640 t navi1x_get_gpu_metrics +ffffffff8257e0b0 t navi10_enable_mgpu_fan_boost +ffffffff8257e130 t navi10_get_fan_parameters +ffffffff8257e170 t navi10_post_smu_init +ffffffff8257e460 t navi10_get_default_config_table_settings +ffffffff8257e4b0 t navi10_set_config_table +ffffffff8257e570 t navi1x_get_smu_metrics_data +ffffffff8257ec30 t navi10_od_setting_check_range +ffffffff8257ecf0 t navi10_i2c_xfer +ffffffff8257efb0 t navi10_i2c_func +ffffffff8257efe0 t navi10_umc_hybrid_cdr_workaround +ffffffff82580000 T sienna_cichlid_set_ppt_funcs +ffffffff82580050 t sienna_cichlid_run_btc +ffffffff825800e0 t sienna_cichlid_get_allowed_feature_mask +ffffffff82580370 t sienna_cichlid_set_default_dpm_table +ffffffff82580a00 t sienna_cichlid_populate_umd_state_clk +ffffffff82580ac0 t sienna_cichlid_print_clk_levels +ffffffff82580ce0 t sienna_cichlid_force_clk_levels +ffffffff82580e50 t sienna_cichlid_od_edit_dpm_table +ffffffff82581450 t sienna_cichlid_restore_user_od_settings +ffffffff825814e0 t sienna_cichlid_get_power_profile_mode +ffffffff825817c0 t sienna_cichlid_set_power_profile_mode +ffffffff82581ac0 t sienna_cichlid_dpm_set_vcn_enable +ffffffff82581b90 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff82581c20 t sienna_cichlid_read_sensor +ffffffff82582490 t sienna_cichlid_pre_display_config_changed +ffffffff825824c0 t sienna_cichlid_display_config_changed +ffffffff82582520 t sienna_cichlid_notify_smc_display_config +ffffffff825826f0 t sienna_cichlid_is_dpm_running +ffffffff82582750 t sienna_cichlid_get_fan_speed_rpm +ffffffff82582860 t sienna_cichlid_set_watermarks_table +ffffffff82582a00 t sienna_cichlid_get_thermal_temperature_range +ffffffff82582ae0 t sienna_cichlid_get_uclk_dpm_states +ffffffff82582bf0 t sienna_cichlid_set_default_od_settings +ffffffff82582dc0 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff82582e50 t sienna_cichlid_dump_pptable +ffffffff82582e80 t sienna_cichlid_get_power_limit +ffffffff82582f50 t sienna_cichlid_update_pcie_parameters +ffffffff82583080 t sienna_cichlid_i2c_control_init +ffffffff825831d0 t sienna_cichlid_i2c_control_fini +ffffffff82583210 t sienna_cichlid_get_unique_id +ffffffff82583380 t sienna_cichlid_init_smc_tables +ffffffff825836f0 t sienna_cichlid_set_mp1_state +ffffffff82583730 t sienna_cichlid_setup_pptable +ffffffff82583ba0 t sienna_cichlid_system_features_control +ffffffff82583c40 t sienna_cichlid_baco_enter +ffffffff82583c90 t sienna_cichlid_baco_exit +ffffffff82583df0 t sienna_cichlid_is_mode1_reset_supported +ffffffff82583e80 t sienna_cichlid_is_mode2_reset_supported +ffffffff82583eb0 t sienna_cichlid_mode2_reset +ffffffff82584050 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff82584070 t sienna_cichlid_get_gpu_metrics +ffffffff82584630 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff82584680 t sienna_cichlid_get_fan_parameters +ffffffff825846c0 t sienna_cichlid_gpo_control +ffffffff82584790 t sienna_cichlid_get_ecc_info +ffffffff82584890 t sienna_cichlid_stb_get_data_direct +ffffffff82584950 t sienna_cichlid_get_default_config_table_settings +ffffffff825849c0 t sienna_cichlid_set_config_table +ffffffff82584a90 t sienna_cichlid_get_throttler_status_locked +ffffffff82584bf0 t sienna_cichlid_get_smartshift_power_percentage +ffffffff82584d20 t sienna_cichlid_i2c_xfer +ffffffff82584fe0 t sienna_cichlid_i2c_func +ffffffff82586000 T smu_v11_0_init_microcode +ffffffff82586170 T smu_v11_0_fini_microcode +ffffffff825861d0 T smu_v11_0_load_microcode +ffffffff82586330 T smu_v11_0_check_fw_status +ffffffff82586390 T smu_v11_0_check_fw_version +ffffffff82586520 T smu_v11_0_setup_pptable +ffffffff82586640 T smu_v11_0_init_smc_tables +ffffffff825867d0 T smu_v11_0_fini_smc_tables +ffffffff82586a90 T smu_v11_0_init_power +ffffffff82586b20 T smu_v11_0_fini_power +ffffffff82586b90 T smu_v11_0_get_vbios_bootup_values +ffffffff82586f40 T smu_v11_0_notify_memory_pool_location +ffffffff82587060 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff825870f0 T smu_v11_0_set_driver_table_location +ffffffff82587170 T smu_v11_0_set_tool_table_location +ffffffff825871f0 T smu_v11_0_init_display_count +ffffffff82587250 T smu_v11_0_set_allowed_mask +ffffffff82587330 T smu_v11_0_system_features_control +ffffffff82587350 T smu_v11_0_notify_display_change +ffffffff825873c0 T smu_v11_0_init_max_sustainable_clocks +ffffffff82587690 t smu_v11_0_get_max_sustainable_clock +ffffffff82587800 T smu_v11_0_get_current_power_limit +ffffffff82587900 T smu_v11_0_set_power_limit +ffffffff82587a70 T smu_v11_0_interrupt_work +ffffffff82587b00 T smu_v11_0_enable_thermal_alert +ffffffff82587bb0 T smu_v11_0_disable_thermal_alert +ffffffff82587bd0 T smu_v11_0_get_gfx_vdd +ffffffff82587c90 T smu_v11_0_display_clock_voltage_request +ffffffff82587e00 T smu_v11_0_set_hard_freq_limited_range +ffffffff82587f00 T smu_v11_0_gfx_off_control +ffffffff82587f70 T smu_v11_0_get_fan_control_mode +ffffffff82587fd0 T smu_v11_0_set_fan_speed_pwm +ffffffff825881b0 t smu_v11_0_set_fan_static_mode +ffffffff825883b0 T smu_v11_0_set_fan_speed_rpm +ffffffff82588500 T smu_v11_0_get_fan_speed_pwm +ffffffff82588660 T smu_v11_0_get_fan_speed_rpm +ffffffff82588770 T smu_v11_0_set_fan_control_mode +ffffffff82588960 T smu_v11_0_set_xgmi_pstate +ffffffff82588980 T smu_v11_0_register_irq_handler +ffffffff82588a50 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff82588ae0 T smu_v11_0_set_azalia_d3_pme +ffffffff82588b00 T smu_v11_0_baco_set_armd3_sequence +ffffffff82588b20 T smu_v11_0_baco_is_support +ffffffff82588bc0 T smu_v11_0_baco_get_state +ffffffff82588bf0 T smu_v11_0_baco_set_state +ffffffff82588f10 T smu_v11_0_baco_enter +ffffffff82589060 T smu_v11_0_baco_exit +ffffffff825891e0 T smu_v11_0_mode1_reset +ffffffff82589260 T smu_v11_0_handle_passthrough_sbr +ffffffff82589280 T smu_v11_0_get_dpm_ultimate_freq +ffffffff825893e0 T smu_v11_0_set_soft_freq_limited_range +ffffffff825894d0 T smu_v11_0_set_performance_level +ffffffff825898b0 T smu_v11_0_set_power_source +ffffffff82589920 T smu_v11_0_get_dpm_freq_by_index +ffffffff825899e0 T smu_v11_0_get_dpm_level_count +ffffffff82589a90 T smu_v11_0_set_single_dpm_table +ffffffff82589d70 T smu_v11_0_get_dpm_level_range +ffffffff82589f30 T smu_v11_0_get_current_pcie_link_width_level +ffffffff82589f90 T smu_v11_0_get_current_pcie_link_width +ffffffff8258a000 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff8258a060 T smu_v11_0_get_current_pcie_link_speed +ffffffff8258a0c0 T smu_v11_0_gfx_ulv_control +ffffffff8258a140 T smu_v11_0_deep_sleep_control +ffffffff8258a350 T smu_v11_0_restore_user_od_settings +ffffffff8258a3e0 T smu_v11_0_set_smu_mailbox_registers +ffffffff8258a450 t smu_v11_0_set_irq_state +ffffffff8258aaa0 t smu_v11_0_irq_process +ffffffff8258b000 T vangogh_set_ppt_funcs +ffffffff8258b040 t vangogh_set_default_dpm_tables +ffffffff8258b070 t vangogh_common_print_clk_levels +ffffffff8258b530 t vangogh_force_clk_levels +ffffffff8258b7b0 t vangogh_od_edit_dpm_table +ffffffff8258bd70 t vangogh_get_power_profile_mode +ffffffff8258bed0 t vangogh_set_power_profile_mode +ffffffff8258c020 t vangogh_dpm_set_vcn_enable +ffffffff8258c080 t vangogh_dpm_set_jpeg_enable +ffffffff8258c0e0 t vangogh_read_sensor +ffffffff8258c7f0 t vangogh_get_apu_thermal_limit +ffffffff8258c810 t vangogh_set_apu_thermal_limit +ffffffff8258c830 t vangogh_is_dpm_running +ffffffff8258c8a0 t vangogh_set_watermarks_table +ffffffff8258ca30 t vangogh_set_performance_level +ffffffff8258d3f0 t vangogh_get_power_limit +ffffffff8258d570 t vangogh_get_ppt_limit +ffffffff8258d5e0 t vangogh_get_dpm_clock_table +ffffffff8258d750 t vangogh_init_smc_tables +ffffffff8258d9d0 t vangogh_system_features_control +ffffffff8258da20 t vangogh_set_power_limit +ffffffff8258dbb0 t vangogh_get_gfxoff_status +ffffffff8258dc40 t vangogh_get_gfxoff_entrycount +ffffffff8258dcc0 t vangogh_set_gfxoff_residency +ffffffff8258dd40 t vangogh_get_gfxoff_residency +ffffffff8258dd80 t vangogh_mode2_reset +ffffffff8258df40 t vangogh_common_get_gpu_metrics +ffffffff8258e760 t vangogh_post_smu_init +ffffffff8258e920 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff8258e990 t vangogh_force_dpm_limit_value +ffffffff8258eb10 t vangogh_get_dpm_ultimate_freq +ffffffff8258eed0 t vangogh_set_soft_freq_limited_range +ffffffff8258f090 t vangogh_get_gpu_metrics_v2_3 +ffffffff82590000 T renoir_set_ppt_funcs +ffffffff825900a0 t renoir_get_current_power_state +ffffffff82590120 t renoir_print_clk_levels +ffffffff82590570 t renoir_force_clk_levels +ffffffff825907d0 t renoir_od_edit_dpm_table +ffffffff82590b10 t renoir_get_power_profile_mode +ffffffff82590c20 t renoir_set_power_profile_mode +ffffffff82590d70 t renoir_dpm_set_vcn_enable +ffffffff82590e10 t renoir_dpm_set_jpeg_enable +ffffffff82590ea0 t renoir_read_sensor +ffffffff825912a0 t renoir_is_dpm_running +ffffffff825912e0 t renoir_set_watermarks_table +ffffffff825914a0 t renoir_set_performance_level +ffffffff82591ae0 t renoir_get_dpm_clock_table +ffffffff82591e30 t renoir_init_smc_tables +ffffffff82591fd0 t renoir_get_enabled_mask +ffffffff82592010 t renoir_get_dpm_ultimate_freq +ffffffff825922e0 t renoir_get_gpu_metrics +ffffffff82592520 t renoir_gfx_state_change_set +ffffffff82592550 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff82592600 t renoir_force_dpm_limit_value +ffffffff82593000 T smu_v12_0_check_fw_status +ffffffff82593060 T smu_v12_0_check_fw_version +ffffffff825930e0 T smu_v12_0_powergate_sdma +ffffffff82593130 T smu_v12_0_set_gfx_cgpg +ffffffff82593190 T smu_v12_0_get_gfxoff_status +ffffffff82593220 T smu_v12_0_gfx_off_control +ffffffff82593350 T smu_v12_0_fini_smc_tables +ffffffff82593420 T smu_v12_0_set_default_dpm_tables +ffffffff82593450 T smu_v12_0_mode2_reset +ffffffff82593470 T smu_v12_0_set_soft_freq_limited_range +ffffffff825935f0 T smu_v12_0_set_driver_table_location +ffffffff82593670 T smu_v12_0_get_vbios_bootup_values +ffffffff82594000 T aldebaran_set_ppt_funcs +ffffffff82594050 t aldebaran_get_allowed_feature_mask +ffffffff825940b0 t aldebaran_set_default_dpm_table +ffffffff825942f0 t aldebaran_populate_umd_state_clk +ffffffff825943f0 t aldebaran_print_clk_levels +ffffffff825945f0 t aldebaran_force_clk_levels +ffffffff82594800 t aldebaran_usr_edit_dpm_table +ffffffff82594a40 t aldebaran_read_sensor +ffffffff82594cc0 t aldebaran_is_dpm_running +ffffffff82594d20 t aldebaran_get_thermal_temperature_range +ffffffff82594df0 t aldebaran_set_performance_level +ffffffff82594ea0 t aldebaran_get_power_limit +ffffffff82595060 t aldebaran_set_df_cstate +ffffffff825950f0 t aldebaran_allow_xgmi_power_down +ffffffff825951a0 t aldebaran_i2c_control_init +ffffffff82595270 t aldebaran_i2c_control_fini +ffffffff825952b0 t aldebaran_get_unique_id +ffffffff825953a0 t aldebaran_init_smc_tables +ffffffff82595590 t aldebaran_set_mp1_state +ffffffff825955d0 t aldebaran_setup_pptable +ffffffff825956c0 t aldebaran_system_features_control +ffffffff82595850 t aldebaran_set_power_limit +ffffffff825958e0 t aldebaran_is_baco_supported +ffffffff82595910 t aldebaran_is_mode1_reset_supported +ffffffff82595940 t aldebaran_is_mode2_reset_supported +ffffffff82595970 t aldebaran_mode1_reset +ffffffff82595a70 t aldebaran_mode2_reset +ffffffff82595eb0 t aldebaran_set_soft_freq_limited_range +ffffffff825960f0 t aldebaran_log_thermal_throttling_event +ffffffff82596450 t aldebaran_get_gpu_metrics +ffffffff82596720 t aldebaran_smu_handle_passthrough_sbr +ffffffff82596740 t aldebaran_smu_send_hbm_bad_page_num +ffffffff825967d0 t aldebaran_get_ecc_info +ffffffff82596940 t aldebaran_send_hbm_bad_channel_flag +ffffffff82596a30 t aldebaran_get_current_clk_freq_by_table +ffffffff82596ba0 t aldebaran_get_smu_metrics_data +ffffffff82596e20 t aldebaran_upload_dpm_level +ffffffff82596f40 t aldebaran_i2c_xfer +ffffffff82597200 t aldebaran_i2c_func +ffffffff82598000 T smu_v13_0_init_microcode +ffffffff82598150 T smu_v13_0_fini_microcode +ffffffff825981b0 T smu_v13_0_load_microcode +ffffffff825981e0 T smu_v13_0_init_pptable_microcode +ffffffff82598390 T smu_v13_0_get_pptable_from_firmware +ffffffff825984c0 T smu_v13_0_check_fw_status +ffffffff82598540 T smu_v13_0_check_fw_version +ffffffff825985d0 T smu_v13_0_setup_pptable +ffffffff82598770 T smu_v13_0_init_smc_tables +ffffffff82598940 T smu_v13_0_fini_smc_tables +ffffffff82598be0 T smu_v13_0_init_power +ffffffff82598c70 T smu_v13_0_fini_power +ffffffff82598d00 T smu_v13_0_get_vbios_bootup_values +ffffffff82598fd0 T smu_v13_0_notify_memory_pool_location +ffffffff825990a0 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff82599130 T smu_v13_0_set_driver_table_location +ffffffff825991b0 T smu_v13_0_set_tool_table_location +ffffffff82599230 T smu_v13_0_init_display_count +ffffffff82599270 T smu_v13_0_set_allowed_mask +ffffffff82599350 T smu_v13_0_gfx_off_control +ffffffff825993d0 T smu_v13_0_system_features_control +ffffffff825993f0 T smu_v13_0_notify_display_change +ffffffff82599460 T smu_v13_0_init_max_sustainable_clocks +ffffffff82599730 t smu_v13_0_get_max_sustainable_clock +ffffffff825998a0 T smu_v13_0_get_current_power_limit +ffffffff825999a0 T smu_v13_0_set_power_limit +ffffffff82599ae0 T smu_v13_0_enable_thermal_alert +ffffffff82599b80 T smu_v13_0_disable_thermal_alert +ffffffff82599bc0 T smu_v13_0_get_gfx_vdd +ffffffff82599c80 T smu_v13_0_display_clock_voltage_request +ffffffff82599df0 T smu_v13_0_set_hard_freq_limited_range +ffffffff82599ef0 T smu_v13_0_get_fan_control_mode +ffffffff82599f40 T smu_v13_0_set_fan_speed_pwm +ffffffff8259a1b0 t smu_v13_0_set_fan_static_mode +ffffffff8259a3b0 T smu_v13_0_set_fan_control_mode +ffffffff8259a550 T smu_v13_0_set_fan_speed_rpm +ffffffff8259a740 T smu_v13_0_set_xgmi_pstate +ffffffff8259a760 T smu_v13_0_register_irq_handler +ffffffff8259a840 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff8259a8d0 T smu_v13_0_set_azalia_d3_pme +ffffffff8259a8f0 T smu_v13_0_wait_for_event +ffffffff8259a940 T smu_v13_0_get_dpm_ultimate_freq +ffffffff8259aab0 T smu_v13_0_set_soft_freq_limited_range +ffffffff8259aba0 T smu_v13_0_set_performance_level +ffffffff8259b3f0 T smu_v13_0_set_power_source +ffffffff8259b460 T smu_v13_0_get_dpm_freq_by_index +ffffffff8259b520 T smu_v13_0_set_single_dpm_table +ffffffff8259b890 T smu_v13_0_get_current_pcie_link_width_level +ffffffff8259b8f0 T smu_v13_0_get_current_pcie_link_width +ffffffff8259b960 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff8259b9c0 T smu_v13_0_get_current_pcie_link_speed +ffffffff8259ba30 T smu_v13_0_set_vcn_enable +ffffffff8259baf0 T smu_v13_0_set_jpeg_enable +ffffffff8259bb10 T smu_v13_0_run_btc +ffffffff8259bba0 T smu_v13_0_gpo_control +ffffffff8259bc40 T smu_v13_0_deep_sleep_control +ffffffff8259bf40 T smu_v13_0_gfx_ulv_control +ffffffff8259bfc0 T smu_v13_0_baco_set_armd3_sequence +ffffffff8259c030 T smu_v13_0_baco_is_support +ffffffff8259c0d0 T smu_v13_0_baco_get_state +ffffffff8259c100 T smu_v13_0_baco_set_state +ffffffff8259c200 T smu_v13_0_baco_enter +ffffffff8259c390 T smu_v13_0_baco_exit +ffffffff8259c440 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff8259c480 T smu_v13_0_od_edit_dpm_table +ffffffff8259c790 T smu_v13_0_set_default_dpm_tables +ffffffff8259c7c0 T smu_v13_0_set_smu_mailbox_registers +ffffffff8259c830 T smu_v13_0_mode1_reset +ffffffff8259c8b0 T smu_v13_0_update_pcie_parameters +ffffffff8259cb30 t smu_v13_0_set_irq_state +ffffffff8259d180 t smu_v13_0_irq_process +ffffffff8259e000 T smu_v13_0_0_set_ppt_funcs +ffffffff8259e0f0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff8259e240 t smu_v13_0_0_set_default_dpm_table +ffffffff8259e6c0 t smu_v13_0_0_populate_umd_state_clk +ffffffff8259e800 t smu_v13_0_0_print_clk_levels +ffffffff8259e950 t smu_v13_0_0_force_clk_levels +ffffffff8259eae0 t smu_v13_0_0_od_edit_dpm_table +ffffffff8259f020 t smu_v13_0_0_restore_user_od_settings +ffffffff8259f100 t smu_v13_0_0_get_power_profile_mode +ffffffff8259f220 t smu_v13_0_0_set_power_profile_mode +ffffffff8259f4b0 t smu_v13_0_0_read_sensor +ffffffff8259f730 t smu_v13_0_0_is_dpm_running +ffffffff8259f780 t smu_v13_0_0_get_fan_speed_pwm +ffffffff8259f870 t smu_v13_0_0_get_fan_speed_rpm +ffffffff8259f8e0 t smu_v13_0_0_get_thermal_temperature_range +ffffffff8259f9e0 t smu_v13_0_0_set_default_od_settings +ffffffff8259fb40 t smu_v13_0_0_dump_pptable +ffffffff8259fb70 t smu_v13_0_0_get_power_limit +ffffffff8259fc60 t smu_v13_0_0_set_df_cstate +ffffffff8259fc80 t smu_v13_0_0_i2c_control_init +ffffffff8259fdd0 t smu_v13_0_0_i2c_control_fini +ffffffff8259fe10 t smu_v13_0_0_get_unique_id +ffffffff8259fec0 t smu_v13_0_0_init_smc_tables +ffffffff825a0130 t smu_v13_0_0_set_mp1_state +ffffffff825a0170 t smu_v13_0_0_setup_pptable +ffffffff825a02f0 t smu_v13_0_0_system_features_control +ffffffff825a0300 t smu_v13_0_0_baco_enter +ffffffff825a0370 t smu_v13_0_0_baco_exit +ffffffff825a03e0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff825a0440 t smu_v13_0_0_mode1_reset +ffffffff825a0590 t smu_v13_0_0_mode2_reset +ffffffff825a05e0 t smu_v13_0_0_enable_gfx_features +ffffffff825a0630 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff825a0760 t smu_v13_0_0_get_gpu_metrics +ffffffff825a0bc0 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff825a0c10 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff825a0ca0 t smu_v13_0_0_get_ecc_info +ffffffff825a0db0 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff825a0e40 t smu_v13_0_0_i2c_xfer +ffffffff825a1100 t smu_v13_0_0_i2c_func +ffffffff825a2000 T smu_v13_0_4_set_ppt_funcs +ffffffff825a20c0 t smu_v13_0_4_print_clk_levels +ffffffff825a2140 t smu_v13_0_4_force_clk_levels +ffffffff825a2420 t smu_v13_0_4_read_sensor +ffffffff825a2760 t smu_v13_0_4_is_dpm_running +ffffffff825a27c0 t smu_v13_0_4_set_watermarks_table +ffffffff825a2950 t smu_v13_0_4_set_performance_level +ffffffff825a3660 t smu_v13_0_4_init_smc_tables +ffffffff825a3800 t smu_v13_0_4_fini_smc_tables +ffffffff825a38d0 t smu_v13_0_4_system_features_control +ffffffff825a3960 t smu_v13_0_4_mode2_reset +ffffffff825a3980 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff825a3db0 t smu_v13_0_4_get_gpu_metrics +ffffffff825a3f90 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff825a3ff0 t smu_v13_0_4_get_current_clk_freq +ffffffff825a5000 T smu_v13_0_5_set_ppt_funcs +ffffffff825a50a0 t smu_v13_0_5_set_default_dpm_tables +ffffffff825a50d0 t smu_v13_0_5_print_clk_levels +ffffffff825a5170 t smu_v13_0_5_force_clk_levels +ffffffff825a5300 t smu_v13_0_5_od_edit_dpm_table +ffffffff825a5610 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff825a5630 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff825a5650 t smu_v13_0_5_read_sensor +ffffffff825a58d0 t smu_v13_0_5_is_dpm_running +ffffffff825a5930 t smu_v13_0_5_set_watermarks_table +ffffffff825a5ac0 t smu_v13_0_5_set_performance_level +ffffffff825a6140 t smu_v13_0_5_init_smc_tables +ffffffff825a62e0 t smu_v13_0_5_fini_smc_tables +ffffffff825a63b0 t smu_v13_0_5_system_features_control +ffffffff825a6400 t smu_v13_0_5_mode2_reset +ffffffff825a6490 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff825a68d0 t smu_v13_0_5_get_gpu_metrics +ffffffff825a6a30 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff825a7000 T smu_v13_0_6_set_ppt_funcs +ffffffff825a7050 t smu_v13_0_6_get_allowed_feature_mask +ffffffff825a70b0 t smu_v13_0_6_set_default_dpm_table +ffffffff825a7600 t smu_v13_0_6_populate_umd_state_clk +ffffffff825a7700 t smu_v13_0_6_print_clk_levels +ffffffff825a7ad0 t smu_v13_0_6_force_clk_levels +ffffffff825a7ce0 t smu_v13_0_6_usr_edit_dpm_table +ffffffff825a7f20 t smu_v13_0_6_read_sensor +ffffffff825a8530 t smu_v13_0_6_is_dpm_running +ffffffff825a85c0 t smu_v13_0_6_get_thermal_temperature_range +ffffffff825a8740 t smu_v13_0_6_set_performance_level +ffffffff825a8870 t smu_v13_0_6_get_power_limit +ffffffff825a8950 t smu_v13_0_6_set_df_cstate +ffffffff825a8970 t smu_v13_0_6_allow_xgmi_power_down +ffffffff825a8990 t smu_v13_0_6_i2c_control_init +ffffffff825a8ae0 t smu_v13_0_6_i2c_control_fini +ffffffff825a8b20 t smu_v13_0_6_get_unique_id +ffffffff825a8ba0 t smu_v13_0_6_init_smc_tables +ffffffff825a8d60 t smu_v13_0_6_check_fw_status +ffffffff825a8dc0 t smu_v13_0_6_setup_pptable +ffffffff825a8df0 t smu_v13_0_6_system_features_control +ffffffff825a8e90 t smu_v13_0_6_get_enabled_mask +ffffffff825a8f10 t smu_v13_0_6_set_power_limit +ffffffff825a8f30 t smu_v13_0_6_register_irq_handler +ffffffff825a8f90 t smu_v13_0_6_is_baco_supported +ffffffff825a8fc0 t smu_v13_0_6_is_mode1_reset_supported +ffffffff825a8ff0 t smu_v13_0_6_is_mode2_reset_supported +ffffffff825a9020 t smu_v13_0_6_mode1_reset +ffffffff825a90e0 t smu_v13_0_6_mode2_reset +ffffffff825a94a0 t smu_v13_0_6_get_dpm_ultimate_freq +ffffffff825a96e0 t smu_v13_0_6_set_soft_freq_limited_range +ffffffff825a9960 t smu_v13_0_6_log_thermal_throttling_event +ffffffff825a9ca0 t smu_v13_0_6_get_gpu_metrics +ffffffff825aa050 t smu_v13_0_6_smu_send_hbm_bad_page_num +ffffffff825aa0e0 t smu_v13_0_6_get_smu_metrics_data +ffffffff825aa3a0 t smu_v13_0_6_upload_dpm_level +ffffffff825aa4d0 t smu_v13_0_6_i2c_xfer +ffffffff825aa800 t smu_v13_0_6_i2c_func +ffffffff825aa830 t smu_v13_0_6_set_irq_state +ffffffff825aab10 t smu_v13_0_6_irq_process +ffffffff825ab000 T smu_v13_0_7_set_ppt_funcs +ffffffff825ab060 t smu_v13_0_7_get_allowed_feature_mask +ffffffff825ab1e0 t smu_v13_0_7_set_default_dpm_table +ffffffff825ab660 t smu_v13_0_7_populate_umd_state_clk +ffffffff825ab7a0 t smu_v13_0_7_print_clk_levels +ffffffff825ab8f0 t smu_v13_0_7_force_clk_levels +ffffffff825aba80 t smu_v13_0_7_od_edit_dpm_table +ffffffff825abfc0 t smu_v13_0_7_restore_user_od_settings +ffffffff825ac0a0 t smu_v13_0_7_get_power_profile_mode +ffffffff825ac200 t smu_v13_0_7_set_power_profile_mode +ffffffff825ac470 t smu_v13_0_7_read_sensor +ffffffff825ac6e0 t smu_v13_0_7_is_dpm_running +ffffffff825ac730 t smu_v13_0_7_get_fan_speed_pwm +ffffffff825ac820 t smu_v13_0_7_get_fan_speed_rpm +ffffffff825ac890 t smu_v13_0_7_get_thermal_temperature_range +ffffffff825ac990 t smu_v13_0_7_set_default_od_settings +ffffffff825acaf0 t smu_v13_0_7_dump_pptable +ffffffff825acb20 t smu_v13_0_7_get_power_limit +ffffffff825acc10 t smu_v13_0_7_set_df_cstate +ffffffff825acc30 t smu_v13_0_7_init_smc_tables +ffffffff825ace50 t smu_v13_0_7_check_fw_status +ffffffff825aceb0 t smu_v13_0_7_set_mp1_state +ffffffff825acef0 t smu_v13_0_7_setup_pptable +ffffffff825ad060 t smu_v13_0_7_baco_enter +ffffffff825ad0d0 t smu_v13_0_7_baco_exit +ffffffff825ad140 t smu_v13_0_7_is_mode1_reset_supported +ffffffff825ad180 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff825ad2b0 t smu_v13_0_7_get_gpu_metrics +ffffffff825ad700 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff825ae000 T yellow_carp_set_ppt_funcs +ffffffff825ae050 t yellow_carp_set_default_dpm_tables +ffffffff825ae080 t yellow_carp_print_clk_levels +ffffffff825ae100 t yellow_carp_force_clk_levels +ffffffff825ae3e0 t yellow_carp_od_edit_dpm_table +ffffffff825ae6f0 t yellow_carp_dpm_set_vcn_enable +ffffffff825ae710 t yellow_carp_dpm_set_jpeg_enable +ffffffff825ae730 t yellow_carp_read_sensor +ffffffff825aeb00 t yellow_carp_is_dpm_running +ffffffff825aeb60 t yellow_carp_set_watermarks_table +ffffffff825aecf0 t yellow_carp_set_performance_level +ffffffff825af8e0 t yellow_carp_init_smc_tables +ffffffff825afa80 t yellow_carp_fini_smc_tables +ffffffff825afb50 t yellow_carp_system_features_control +ffffffff825afba0 t yellow_carp_get_gfxoff_status +ffffffff825afc30 t yellow_carp_mode2_reset +ffffffff825afcc0 t yellow_carp_get_dpm_ultimate_freq +ffffffff825b0110 t yellow_carp_get_gpu_metrics +ffffffff825b02e0 t yellow_carp_post_smu_init +ffffffff825b0370 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff825b03d0 t yellow_carp_get_current_clk_freq +ffffffff825b04e0 t yellow_carp_get_dpm_profile_freq +ffffffff825b1000 T smu_cmn_send_msg_without_waiting +ffffffff825b11b0 T smu_cmn_wait_for_response +ffffffff825b1300 T smu_cmn_send_smc_msg_with_param +ffffffff825b1690 T smu_cmn_to_asic_specific_index +ffffffff825b17c0 t __smu_cmn_reg_print_error +ffffffff825b1a20 T smu_cmn_send_smc_msg +ffffffff825b1a40 T smu_cmn_send_debug_smc_msg +ffffffff825b1ae0 T smu_cmn_send_debug_smc_msg_with_param +ffffffff825b1b80 T smu_cmn_feature_is_supported +ffffffff825b1c30 T smu_cmn_feature_is_enabled +ffffffff825b1d30 T smu_cmn_clk_dpm_is_enabled +ffffffff825b1e40 T smu_cmn_get_enabled_mask +ffffffff825b1f40 T smu_cmn_get_indep_throttler_status +ffffffff825b1ff0 T smu_cmn_feature_update_enable_state +ffffffff825b20b0 T smu_cmn_feature_set_enabled +ffffffff825b2190 T smu_cmn_get_pp_feature_mask +ffffffff825b2340 T smu_cmn_set_pp_feature_mask +ffffffff825b2470 T smu_cmn_disable_all_features_with_exception +ffffffff825b2530 T smu_cmn_get_smc_version +ffffffff825b2620 T smu_cmn_update_table +ffffffff825b27b0 T smu_cmn_write_watermarks_table +ffffffff825b2890 T smu_cmn_write_pptable +ffffffff825b2970 T smu_cmn_get_metrics_table +ffffffff825b2ae0 T smu_cmn_get_combo_pptable +ffffffff825b2bd0 T smu_cmn_init_soft_gpu_metrics +ffffffff825b2cd0 T smu_cmn_set_mp1_state +ffffffff825b2d80 T smu_cmn_is_audio_func_enabled +ffffffff825b3000 T pci_mcfg_init +ffffffff825b3050 T pci_lookup_segment +ffffffff825b30b0 T pci_attach_hook +ffffffff825b30e0 T pci_bus_maxdevs +ffffffff825b3110 T pci_make_tag +ffffffff825b3190 T pci_decompose_tag +ffffffff825b31f0 T pci_conf_size +ffffffff825b3250 T pci_mcfg_map_bus +ffffffff825b32e0 T pci_conf_read +ffffffff825b3450 T pci_conf_write +ffffffff825b35a0 T pci_msix_table_map +ffffffff825b36f0 T pci_msix_table_unmap +ffffffff825b37a0 T msi_hwmask +ffffffff825b3880 T msi_hwunmask +ffffffff825b3960 T msi_addroute +ffffffff825b3aa0 T msi_delroute +ffffffff825b3b30 T msi_allocidtvec +ffffffff825b3ca0 T pci_intr_enable_msivec +ffffffff825b3da0 T pci_intr_map_msi +ffffffff825b3e60 T pci_intr_map_msivec +ffffffff825b3f20 T msix_hwmask +ffffffff825b40c0 T msix_hwunmask +ffffffff825b4220 T msix_addroute +ffffffff825b4470 T msix_delroute +ffffffff825b4600 T pci_intr_map_msix +ffffffff825b46e0 T pci_intr_map +ffffffff825b4940 T pci_intr_string +ffffffff825b4a20 T pci_intr_establish +ffffffff825b4a70 T pci_intr_establish_cpu +ffffffff825b4bf0 T pci_intr_disestablish +ffffffff825b4c10 T pci_init_extents +ffffffff825b4e30 T pci_probe_device_hook +ffffffff825b4e70 T pci_dev_postattach +ffffffff825b4e80 T pci_min_powerstate +ffffffff825b4e90 T pci_set_powerstate_md +ffffffff825b5000 T pciide_machdep_compat_intr_establish +ffffffff825b5070 T pciide_machdep_compat_intr_disestablish +ffffffff825b6000 T vga_post_init +ffffffff825b6390 t vm86_emu_inb +ffffffff825b63e0 t vm86_emu_inw +ffffffff825b6420 t vm86_emu_inl +ffffffff825b6460 t vm86_emu_outb +ffffffff825b64b0 t vm86_emu_outw +ffffffff825b64f0 t vm86_emu_outl +ffffffff825b6530 T vga_post_call +ffffffff825b65b0 T vga_post_free +ffffffff825b6640 T ddb_vgapost +ffffffff825b7000 T pchbmatch +ffffffff825b7040 T pchbattach +ffffffff825b7570 T pchbactivate +ffffffff825b75f0 T pchb_amd64ht_attach +ffffffff825b7750 T pchb_rnd +ffffffff825b77e0 T pchb_print +ffffffff825b8000 T amas_match +ffffffff825b8060 T amas_attach +ffffffff825b80c0 T amas_intl_nodes +ffffffff825b8160 T amas_get_pagerange +ffffffff825b9000 T agp_flush_cache +ffffffff825ba000 T cardslotmatch +ffffffff825ba050 T cardslotattach +ffffffff825ba320 T cardslot_event +ffffffff825ba380 T cardslot_cb_print +ffffffff825ba3e0 T cardslot_16_print +ffffffff825ba430 T cardslot_16_submatch +ffffffff825ba480 T cardslot_event_throw +ffffffff825ba540 T cardslot_process_event +ffffffff825bb000 T cardbusmatch +ffffffff825bb060 T cardbusattach +ffffffff825bb150 T cardbus_read_tuples +ffffffff825bb5e0 T parse_tuple +ffffffff825bb860 T cardbus_attach_card +ffffffff825bc170 T enable_function +ffffffff825bc220 T decode_tuples +ffffffff825bc300 T cardbusprint +ffffffff825bc420 T cardbussubmatch +ffffffff825bc480 T disable_function +ffffffff825bc4e0 T cardbus_detach_card +ffffffff825bc5d0 T cardbus_intr_establish +ffffffff825bc600 T cardbus_intr_disestablish +ffffffff825bc620 T cardbus_function_enable +ffffffff825bc720 T cardbus_function_disable +ffffffff825bc780 T cardbus_matchbyid +ffffffff825bc7f0 T decode_tuple +ffffffff825bd000 T cardbus_mapreg_map +ffffffff825bd1d0 T cardbus_mapreg_unmap +ffffffff825be000 T cardbus_read_exrom +ffffffff825bf000 T rbus_space_alloc +ffffffff825bf070 T rbus_space_alloc_subregion +ffffffff825bf270 T rbus_space_free +ffffffff825bf310 T rbus_new_body +ffffffff825bf3b0 T rbus_new_root_delegate +ffffffff825bf490 T rbus_new_root_share +ffffffff825c0000 T com_cardbus_match +ffffffff825c0080 T com_cardbus_attach +ffffffff825c0250 T com_cardbus_detach +ffffffff825c0300 T com_cardbus_find_csdev +ffffffff825c0480 T com_cardbus_gofigure +ffffffff825c0980 T com_cardbus_enable +ffffffff825c0a80 T com_cardbus_disable +ffffffff825c0ad0 T com_cardbus_setup +ffffffff825c1000 T xl_cardbus_match +ffffffff825c1080 T xl_cardbus_attach +ffffffff825c1480 T xl_cardbus_detach +ffffffff825c1550 T xl_cardbus_lookup +ffffffff825c1600 T xl_cardbus_intr_ack +ffffffff825c2000 T dc_cardbus_match +ffffffff825c2030 T dc_cardbus_attach +ffffffff825c2450 T dc_cardbus_detach +ffffffff825c2500 T dc_cardbus_setup +ffffffff825c3000 T fxp_cardbus_match +ffffffff825c3030 T fxp_cardbus_attach +ffffffff825c3290 T fxp_cardbus_detach +ffffffff825c3340 T fxp_cardbus_setup +ffffffff825c4000 t rl_cardbus_match +ffffffff825c4030 t rl_cardbus_attach +ffffffff825c4220 t rl_cardbus_detach +ffffffff825c42e0 T rl_cardbus_setup +ffffffff825c5000 T re_cardbus_probe +ffffffff825c5030 T re_cardbus_attach +ffffffff825c5280 T re_cardbus_detach +ffffffff825c5320 T re_cardbus_setup +ffffffff825c6000 T ath_cardbus_match +ffffffff825c6060 T ath_cardbus_attach +ffffffff825c61c0 T ath_cardbus_detach +ffffffff825c62a0 T ath_cardbus_enable +ffffffff825c63a0 T ath_cardbus_disable +ffffffff825c6400 T ath_cardbus_power +ffffffff825c6440 T ath_cardbus_setup +ffffffff825c7000 T athn_cardbus_match +ffffffff825c7030 T athn_cardbus_attach +ffffffff825c71a0 T athn_cardbus_detach +ffffffff825c7250 T athn_cardbus_enable +ffffffff825c7350 T athn_cardbus_disable +ffffffff825c73b0 T athn_cardbus_power +ffffffff825c73f0 T athn_cardbus_read +ffffffff825c7420 T athn_cardbus_write +ffffffff825c7450 T athn_cardbus_write_barrier +ffffffff825c7480 T athn_cardbus_setup +ffffffff825c8000 T atw_cardbus_match +ffffffff825c8030 T atw_cardbus_attach +ffffffff825c8260 T atw_cardbus_detach +ffffffff825c8330 T atw_cardbus_enable +ffffffff825c8430 T atw_cardbus_disable +ffffffff825c8490 T atw_cardbus_power +ffffffff825c84d0 T atw_cardbus_setup +ffffffff825c9000 T rtw_cardbus_match +ffffffff825c9030 T rtw_cardbus_attach +ffffffff825c92e0 T rtw_cardbus_detach +ffffffff825c9430 T rtw_cardbus_intr_ack +ffffffff825c9450 T rtw_cardbus_funcregen +ffffffff825c94d0 T rtw_cardbus_enable +ffffffff825c9690 T rtw_cardbus_disable +ffffffff825c97b0 T rtw_cardbus_power +ffffffff825c97f0 T rtw_cardbus_setup +ffffffff825ca000 T ral_cardbus_match +ffffffff825ca030 T ral_cardbus_attach +ffffffff825ca280 T ral_cardbus_detach +ffffffff825ca350 T ral_cardbus_activate +ffffffff825ca3f0 T ral_cardbus_enable +ffffffff825ca5a0 T ral_cardbus_disable +ffffffff825ca600 T ral_cardbus_setup +ffffffff825ca6c0 T ral_cardbus_wakeup +ffffffff825cb000 T acx_cardbus_match +ffffffff825cb030 T acx_cardbus_attach +ffffffff825cb2b0 T acx_cardbus_detach +ffffffff825cb400 T acx_cardbus_enable +ffffffff825cb510 T acx_cardbus_disable +ffffffff825cb570 T acx_cardbus_power +ffffffff825cb5b0 T acx_cardbus_setup +ffffffff825cc000 T pgt_cardbus_match +ffffffff825cc030 T pgt_cardbus_attach +ffffffff825cc290 T pgt_cardbus_detach +ffffffff825cc350 T pgt_cardbus_enable +ffffffff825cc500 T pgt_cardbus_disable +ffffffff825cc560 T pgt_cardbus_power +ffffffff825cc5c0 T pgt_cardbus_setup +ffffffff825cd000 T ehci_cardbus_match +ffffffff825cd040 T ehci_cardbus_attach +ffffffff825cd360 T ehci_cardbus_detach +ffffffff825ce000 T ohci_cardbus_match +ffffffff825ce040 T ohci_cardbus_attach +ffffffff825ce360 T ohci_cardbus_detach +ffffffff825cf000 T uhci_cardbus_match +ffffffff825cf040 T uhci_cardbus_attach +ffffffff825cf3d0 T uhci_cardbus_detach +ffffffff825d0000 T malo_cardbus_match +ffffffff825d0030 T malo_cardbus_attach +ffffffff825d02f0 T malo_cardbus_detach +ffffffff825d03e0 T malo_cardbus_enable +ffffffff825d05b0 T malo_cardbus_disable +ffffffff825d0610 T malo_cardbus_setup +ffffffff825d1000 T bwi_cardbus_match +ffffffff825d1030 T bwi_cardbus_attach +ffffffff825d1310 T bwi_cardbus_detach +ffffffff825d13d0 T bwi_cardbus_enable +ffffffff825d1580 T bwi_cardbus_disable +ffffffff825d15e0 T bwi_cardbus_setup +ffffffff825d16a0 T bwi_cardbus_conf_read +ffffffff825d16d0 T bwi_cardbus_conf_write +ffffffff825d2000 T rbus_pccbb_parent_mem +ffffffff825d2060 T rbus_pccbb_parent_io +ffffffff825d20d0 T pccbb_attach_hook +ffffffff825d3000 T pcmcia_match +ffffffff825d3060 T pcmcia_attach +ffffffff825d30f0 T pcmcia_activate +ffffffff825d31c0 T pcmcia_ccr_read +ffffffff825d3220 T pcmcia_ccr_write +ffffffff825d3290 T pcmcia_card_attach +ffffffff825d34c0 T pcmcia_print +ffffffff825d3790 T pcmcia_submatch +ffffffff825d37e0 T pcmcia_card_detach +ffffffff825d38a0 T pcmcia_card_deactivate +ffffffff825d3910 T pcmcia_card_gettype +ffffffff825d3970 T pcmcia_function_init +ffffffff825d39d0 T pcmcia_function_enable +ffffffff825d3e50 T pcmcia_function_disable +ffffffff825d3f80 T pcmcia_io_map +ffffffff825d41f0 T pcmcia_intr_establish +ffffffff825d44b0 T pcmcia_card_intr +ffffffff825d45f0 T pcmcia_intr_disestablish +ffffffff825d4840 T pcmcia_intr_string +ffffffff825d5000 T pcmcia_cis_read_1 +ffffffff825d5120 T pcmcia_read_cis +ffffffff825d5220 T pcmcia_scan_cis +ffffffff825d7270 T pcmcia_parse_cis_tuple +ffffffff825d8690 T pcmcia_print_cis +ffffffff825d9000 T pcmcia_check_cis_quirks +ffffffff825da000 T ep_pcmcia_match +ffffffff825da110 T ep_pcmcia_attach +ffffffff825da5b0 T ep_pcmcia_detach +ffffffff825da660 T ep_pcmcia_activate +ffffffff825da760 T ep_pcmcia_lookup +ffffffff825da870 T ep_pcmcia_enable1 +ffffffff825da930 T ep_pcmcia_get_enaddr +ffffffff825db000 T ne_pcmcia_match +ffffffff825db150 T ne_pcmcia_attach +ffffffff825db850 T ne_pcmcia_detach +ffffffff825db930 T ne_pcmcia_activate +ffffffff825dba50 T ne_pcmcia_get_enaddr +ffffffff825dbc80 T ne_pcmcia_dl10019_get_enaddr +ffffffff825dbf40 T ne_pcmcia_ax88190_set_iobase +ffffffff825dd000 T aic_pcmcia_match +ffffffff825dd0b0 T aic_pcmcia_attach +ffffffff825dd300 T aic_pcmcia_detach +ffffffff825de000 T com_pcmcia_match +ffffffff825de270 T com_pcmcia_attach +ffffffff825de5c0 T com_pcmcia_detach +ffffffff825de670 T com_pcmcia_activate +ffffffff825de750 T com_pcmcia_enable1 +ffffffff825de810 T com_pcmcia_enable +ffffffff825de930 T com_pcmcia_disable +ffffffff825de970 T com_pcmcia_disable1 +ffffffff825df000 t wdc_pcmcia_match +ffffffff825df0f0 t wdc_pcmcia_attach +ffffffff825df630 T wdc_pcmcia_detach +ffffffff825df750 T wdc_pcmcia_activate +ffffffff825df890 T wdc_pcmcia_disk_device_interface_callback +ffffffff825df940 T wdc_pcmcia_disk_device_interface +ffffffff825df9b0 T wdc_pcmcia_lookup +ffffffff825e0000 T sm_pcmcia_match +ffffffff825e0100 T sm_pcmcia_attach +ffffffff825e0370 T sm_pcmcia_detach +ffffffff825e0430 T sm_pcmcia_activate +ffffffff825e04d0 T sm_pcmcia_funce_enaddr +ffffffff825e04f0 T sm_pcmcia_ascii_enaddr +ffffffff825e0600 T sm_pcmcia_lannid_ciscallback +ffffffff825e0760 T sm_pcmcia_enable +ffffffff825e0810 T sm_pcmcia_disable +ffffffff825e1000 T xe_pcmcia_match +ffffffff825e1050 T xe_pcmcia_attach +ffffffff825e1730 T xe_pcmcia_detach +ffffffff825e1830 T xe_pcmcia_activate +ffffffff825e1bc0 T xe_pcmcia_interpret_manfid +ffffffff825e1c80 T xe_pcmcia_funce_enaddr +ffffffff825e1ca0 T xe_ioctl +ffffffff825e2090 T xe_start +ffffffff825e23a0 T xe_watchdog +ffffffff825e23f0 T xe_intr +ffffffff825e2830 T xe_full_reset +ffffffff825e2f80 T xe_mdi_read +ffffffff825e3bd0 T xe_mdi_write +ffffffff825e4780 T xe_statchg +ffffffff825e47b0 T xe_mediachange +ffffffff825e4850 T xe_mediastatus +ffffffff825e48c0 T xe_init +ffffffff825e4930 T xe_stop +ffffffff825e4aa0 T xe_reset +ffffffff825e4c80 T xe_pcmcia_lan_nid_ciscallback +ffffffff825e4e30 T xe_pcmcia_manfid_ciscallback +ffffffff825e4f60 T xe_get +ffffffff825e5270 T xe_set_address +ffffffff825e5590 T xe_cycle_power +ffffffff825e6000 T wi_pcmcia_match +ffffffff825e6140 T wi_pcmcia_attach +ffffffff825e6480 T wi_pcmcia_detach +ffffffff825e6560 T wi_pcmcia_activate +ffffffff825e6680 T wi_pcmcia_wakeup +ffffffff825e7000 T malo_pcmcia_match +ffffffff825e7050 T malo_pcmcia_attach +ffffffff825e7280 T malo_pcmcia_detach +ffffffff825e7320 T malo_pcmcia_activate +ffffffff825e7610 T cmalo_intr +ffffffff825e78d0 T cmalo_attach +ffffffff825e7f00 T cmalo_detach +ffffffff825e8000 T cmalo_stop +ffffffff825e8180 T malo_pcmcia_wakeup +ffffffff825e8240 T cmalo_init +ffffffff825e8610 T cmalo_intr_mask +ffffffff825e86b0 T cmalo_fw_alloc +ffffffff825e87a0 T cmalo_fw_load_helper +ffffffff825e8a60 T cmalo_fw_load_main +ffffffff825e8fd0 T cmalo_cmd_get_hwspec +ffffffff825e9160 T cmalo_ioctl +ffffffff825e9610 T cmalo_start +ffffffff825e96b0 T cmalo_watchdog +ffffffff825e96e0 T cmalo_newstate +ffffffff825e9a10 T cmalo_media_change +ffffffff825e9a80 T cmalo_cmd_set_scan +ffffffff825e9c70 T cmalo_fw_free +ffffffff825e9d00 T cmalo_cmd_set_macctrl +ffffffff825e9ea0 T cmalo_cmd_set_txpower +ffffffff825ea030 T cmalo_cmd_set_antenna +ffffffff825ea1d0 T cmalo_cmd_set_radio +ffffffff825ea370 T cmalo_cmd_set_channel +ffffffff825ea500 T cmalo_cmd_set_rate +ffffffff825ea750 T cmalo_cmd_set_snmp +ffffffff825ea910 T cmalo_cmd_set_macaddr +ffffffff825eaac0 T cmalo_wep +ffffffff825eab70 T cmalo_cmd_set_reset +ffffffff825eacb0 T cmalo_select_network +ffffffff825eae00 T cmalo_cmd_set_auth +ffffffff825eaee0 T cmalo_cmd_set_assoc +ffffffff825eb2c0 T cmalo_reflect_network +ffffffff825eb3d0 T cmalo_tx_done +ffffffff825eb490 T cmalo_rx +ffffffff825eb6e0 T cmalo_cmd_response +ffffffff825eb970 T cmalo_event +ffffffff825eb9f0 T cmalo_tx +ffffffff825ebc40 T cmalo_cmd_set_wep +ffffffff825ebef0 T cmalo_rate2bitmap +ffffffff825ebf30 T cmalo_hexdump +ffffffff825ebf60 T cmalo_cmd_request +ffffffff825ec100 T cmalo_cmd_rsp_hwspec +ffffffff825ec170 T cmalo_cmd_rsp_scan +ffffffff825ec3a0 T cmalo_parse_elements +ffffffff825ec4a0 T cmalo_cmd_rsp_assoc +ffffffff825ec4e0 T cmalo_cmd_set_80211d +ffffffff825ec600 T cmalo_cmd_set_bgscan_config +ffffffff825ec7a0 T cmalo_cmd_set_bgscan_query +ffffffff825ed000 T an_pcmcia_match +ffffffff825ed060 T an_pcmcia_attach +ffffffff825ed2a0 T an_pcmcia_detach +ffffffff825ed350 T an_pcmcia_activate +ffffffff825ee000 T pcibmatch +ffffffff825ee0c0 T pcibattach +ffffffff825ee100 T pcib_callback +ffffffff825ee180 T pcib_print +ffffffff825ef000 T amdpcib_match +ffffffff825ef060 T amdpcib_attach +ffffffff825ef1c0 T amdpcib_get_timecount +ffffffff825f0000 T tcpcib_match +ffffffff825f0060 T tcpcib_attach +ffffffff825f03c0 T tcpcib_activate +ffffffff825f0710 T tcpcib_wdt_init +ffffffff825f0890 T tcpcib_wdt_start +ffffffff825f08c0 T tcpcib_wdt_stop +ffffffff825f0960 T tcpcib_hpet_get_timecount +ffffffff825f0990 T tcpcib_wdt_cb +ffffffff825f1000 T aapic_match +ffffffff825f1040 T aapic_attach +ffffffff825f2000 T hme_config +ffffffff825f25a0 T hme_stop +ffffffff825f2840 T hme_start +ffffffff825f2bd0 T hme_ioctl +ffffffff825f2dc0 T hme_watchdog +ffffffff825f2e30 t hme_mii_readreg +ffffffff825f3000 t hme_mii_writereg +ffffffff825f31d0 t hme_mii_statchg +ffffffff825f3270 T hme_mediachange +ffffffff825f3390 T hme_mediastatus +ffffffff825f3410 T hme_mifinit +ffffffff825f34f0 T hme_tick +ffffffff825f3680 T hme_unconfig +ffffffff825f37b0 T hme_fill_rx_ring +ffffffff825f3960 T hme_reset +ffffffff825f39b0 T hme_init +ffffffff825f4000 T hme_meminit +ffffffff825f4160 T hme_iff +ffffffff825f4340 T hme_tint +ffffffff825f44b0 T hme_rint +ffffffff825f46b0 T hme_eint +ffffffff825f4760 T hme_intr +ffffffff825f4880 T hme_newbuf +ffffffff825f5000 T hmematch_pci +ffffffff825f5040 T hmeattach_pci +ffffffff825f5390 T hmedetach_pci +ffffffff825f5430 T hme_pci_enaddr +ffffffff825f6000 T isamatch +ffffffff825f6060 T isaattach +ffffffff825f61d0 T isascan +ffffffff825f6670 T isaprint +ffffffff825f6860 T isa_intr_typename +ffffffff825f7000 T isadmamatch +ffffffff825f7040 T isadmaattach +ffffffff825f7280 T isa_dmacascade +ffffffff825f7380 T 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schsio_activate +ffffffff82607410 T schsio_config_read +ffffffff82607460 T schsio_config_write +ffffffff826074c0 T schsio_wdt_init +ffffffff82607600 T schsio_hwm_init +ffffffff82607a00 T schsio_hwm_update +ffffffff82608080 T schsio_hwm_read +ffffffff826080d0 T schsio_wdt_cb +ffffffff82609000 T lm_isa_match +ffffffff82609220 T lm_isa_attach +ffffffff82609430 T lm_wbsio_match +ffffffff82609670 T lm_isa_writereg +ffffffff826096e0 T lm_isa_readreg +ffffffff82609740 T lm_isa_remove_alias +ffffffff8260a000 T it_match +ffffffff8260a380 T it_enter +ffffffff8260a420 T it_readreg +ffffffff8260a470 T it_writereg +ffffffff8260a4d0 T it_exit +ffffffff8260a520 T it_attach +ffffffff8260ad60 T it_wdog_cb +ffffffff8260b080 T it_ec_refresh +ffffffff8260b780 T it_ec_writereg +ffffffff8260b7e0 T it_ec_readreg +ffffffff8260b830 T it_activate +ffffffff8260c000 T uguru_refresh_temp +ffffffff8260c0f0 T uguru_refresh_volt +ffffffff8260c1a0 T uguru_refresh_fan +ffffffff8260c280 T uguru_match +ffffffff8260c460 T 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wsdisplaystop +ffffffff82613850 T wsdisplay_emulbell +ffffffff826138a0 T wsdisplay_emulinput +ffffffff82613940 T wsdisplay_kbdinput +ffffffff82613a60 T wsdisplay_rawkbdinput +ffffffff82613b00 T wsdisplay_switch3 +ffffffff82613d10 T wsdisplay_switch1 +ffffffff82613ea0 T wsdisplay_switch2 +ffffffff82614090 T wsdisplay_reset +ffffffff82614100 T wsscreen_attach_sync +ffffffff82614180 T wsscreen_detach_sync +ffffffff826141c0 T wsscreen_lookup_sync +ffffffff82614210 T wsdisplay_maxscreenidx +ffffffff82614240 T wsdisplay_screenstate +ffffffff82614290 T wsdisplay_getactivescreen +ffffffff826142d0 T wsscreen_switchwait +ffffffff82614410 T wsdisplay_kbdholdscreen +ffffffff82614480 T wsdisplay_set_console_kbd +ffffffff826144f0 T wsdisplay_set_cons_kbd +ffffffff82614530 T wsdisplay_unset_cons_kbd +ffffffff82614580 T wsdisplay_enter_ddb +ffffffff82614610 T wsdisplay_suspend +ffffffff82614690 T wsdisplay_suspend_device +ffffffff826148f0 T wsdisplay_resume +ffffffff826149f0 T wsdisplay_resume_device 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wskbd_pickfree +ffffffff8261cc50 T wskbd_set_console_display +ffffffff8261ccb0 T wskbd_add_mux +ffffffff8261cd30 T update_leds +ffffffff8261cde0 T update_modifier +ffffffff8261cee0 T change_displayparam +ffffffff8261cfa0 T internal_command +ffffffff8261d410 T wskbd_debugger +ffffffff8261e000 T wskbd_compose_value +ffffffff8261e1a0 T ksym_upcase +ffffffff8261e220 T fillmapentry +ffffffff8261e3b0 T wskbd_get_mapentry +ffffffff8261e5d0 T wskbd_init_keymap +ffffffff8261e670 T wskbd_load_keymap +ffffffff8261f000 T wsmouse_match +ffffffff8261f030 T wsmouse_attach +ffffffff8261f0e0 T wsmouse_detach +ffffffff8261f2f0 T wsmouse_activate +ffffffff8261f330 T wsmouse_mux_open +ffffffff8261f500 T wsmouse_mux_close +ffffffff8261f560 T wsmousedoioctl +ffffffff8261f5d0 T wsmousedevprint +ffffffff8261f620 T wsmouseopen +ffffffff8261f720 T wsmouse_input_cleanup +ffffffff8261f7c0 T wsmousedoopen +ffffffff8261f990 T wsmouseclose +ffffffff8261fa90 T wsmouse_input_reset +ffffffff8261fbe0 T wsmouseread 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acpivout_find_brightness +ffffffff827df870 T acpivout_set_brightness +ffffffff827e0000 T acpipwrres_match +ffffffff827e0070 T acpipwrres_attach +ffffffff827e0310 T acpipwrres_foundcons +ffffffff827e04d0 T acpipwrres_ref_incr +ffffffff827e0580 T acpipwrres_hascons +ffffffff827e05d0 T acpipwrres_ref_decr +ffffffff827e0670 T acpipwrres_addcons +ffffffff827e1000 T aibs_match +ffffffff827e1030 T aibs_attach +ffffffff827e1190 T aibs_probe +ffffffff827e1320 T aibs_attach_new +ffffffff827e1450 T aibs_attach_sif +ffffffff827e1630 T aibs_notify +ffffffff827e16a0 T aibs_add_sensor +ffffffff827e1940 T aibs_getpack +ffffffff827e19d0 T aibs_refresh +ffffffff827e1a40 T aibs_refresh_r +ffffffff827e1b90 T aibs_getvalue +ffffffff827e1cf0 T aibs_find_cb +ffffffff827e2000 T aplgpio_match +ffffffff827e2060 T aplgpio_attach +ffffffff827e2390 T aplgpio_intr +ffffffff827e2500 T aplgpio_read_pin +ffffffff827e2560 T aplgpio_write_pin +ffffffff827e25e0 T aplgpio_intr_establish +ffffffff827e2720 T aplgpio_intr_enable +ffffffff827e27b0 T aplgpio_intr_disable +ffffffff827e3000 T bytgpio_match +ffffffff827e3060 T bytgpio_attach +ffffffff827e33a0 T bytgpio_intr +ffffffff827e34f0 T bytgpio_read_pin +ffffffff827e3560 T bytgpio_write_pin +ffffffff827e35f0 T bytgpio_intr_establish +ffffffff827e3670 T bytgpio_intr_enable +ffffffff827e3760 T bytgpio_intr_disable +ffffffff827e4000 T chvgpio_match +ffffffff827e4060 T chvgpio_attach +ffffffff827e4380 T chvgpio_intr +ffffffff827e4470 T chvgpio_read_pin +ffffffff827e4520 T chvgpio_write_pin +ffffffff827e45f0 T chvgpio_intr_establish +ffffffff827e47e0 T chvgpio_intr_enable +ffffffff827e48c0 T chvgpio_intr_disable +ffffffff827e49a0 T chvgpio_opreg_handler +ffffffff827e4a40 T chvgpio_check_pin +ffffffff827e5000 T glkgpio_match +ffffffff827e5060 T glkgpio_attach +ffffffff827e5390 T glkgpio_intr +ffffffff827e5500 T glkgpio_read_pin +ffffffff827e5560 T glkgpio_write_pin +ffffffff827e55e0 T glkgpio_intr_establish +ffffffff827e5720 T glkgpio_intr_enable +ffffffff827e57b0 T glkgpio_intr_disable +ffffffff827e6000 T pchgpio_match +ffffffff827e6060 T pchgpio_attach +ffffffff827e6600 T pchgpio_activate +ffffffff827e66b0 T pchgpio_intr +ffffffff827e6900 T pchgpio_read_pin +ffffffff827e69f0 T pchgpio_write_pin +ffffffff827e6b10 T pchgpio_intr_establish +ffffffff827e6d60 T pchgpio_intr_enable +ffffffff827e6ea0 T pchgpio_intr_disable +ffffffff827e6fe0 T pchgpio_save +ffffffff827e7050 T pchgpio_restore +ffffffff827e70c0 T pchgpio_find_group +ffffffff827e7140 T pchgpio_intr_handle +ffffffff827e7240 T pchgpio_save_pin +ffffffff827e7420 T pchgpio_restore_pin +ffffffff827e8000 T tipmic_match +ffffffff827e8060 T tipmic_attach +ffffffff827e82c0 T tipmic_write_1 +ffffffff827e83a0 T tipmic_intr +ffffffff827e8550 T tipmic_get_lpat +ffffffff827e8690 T tipmic_read_pin +ffffffff827e86c0 T tipmic_write_pin +ffffffff827e86f0 T tipmic_thermal_opreg_handler +ffffffff827e9120 T tipmic_power_opreg_handler +ffffffff827e9400 T tipmic_read_1 +ffffffff827e94f0 T tipmic_raw_to_temp +ffffffff827ea000 T ccpmic_match +ffffffff827ea060 T ccpmic_attach +ffffffff827ea160 T ccpmic_get_lpat +ffffffff827ea290 T ccpmic_read_pin +ffffffff827ea450 T ccpmic_write_pin +ffffffff827ea5f0 T ccpmic_thermal_opreg_handler +ffffffff827ea890 T ccpmic_power_opreg_handler +ffffffff827eaad0 T ccpmic_read_1 +ffffffff827eabc0 T ccpmic_write_1 +ffffffff827eaca0 T ccpmic_raw_to_temp +ffffffff827eb000 T com_acpi_match +ffffffff827eb150 T com_acpi_attach +ffffffff827eb440 T com_acpi_is_designware +ffffffff827eb4c0 T com_acpi_intr_designware +ffffffff827eb500 T com_acpi_is_console +ffffffff827ec000 T sdhc_acpi_match +ffffffff827ec060 T sdhc_acpi_attach +ffffffff827ec400 T sdhc_acpi_parse_resources +ffffffff827ec4b0 T sdhc_acpi_card_detect_gpio +ffffffff827ec510 T sdhc_acpi_card_detect_intr +ffffffff827ec560 T sdhc_acpi_power_on +ffffffff827ec5f0 T sdhc_acpi_explore +ffffffff827ec620 T sdhc_acpi_card_detect_nonremovable +ffffffff827ec650 T sdhc_acpi_do_explore +ffffffff827ed000 T dwiic_acpi_match +ffffffff827ed050 T dwiic_acpi_attach +ffffffff827ed4f0 T dwiic_acpi_parse_crs +ffffffff827ed650 T dwiic_acpi_power +ffffffff827ed780 T dwiic_acpi_get_params +ffffffff827ed900 T dwiic_i2c_intr_establish +ffffffff827ed990 T dwiic_i2c_intr_disestablish +ffffffff827ed9b0 T dwiic_i2c_intr_string +ffffffff827eda40 T dwiic_acpi_acquire_bus +ffffffff827edaa0 T dwiic_acpi_release_bus +ffffffff827edae0 T dwiic_acpi_bus_scan +ffffffff827edb20 T dwiic_acpi_found_hid +ffffffff827edf10 T dwiic_matchhids +ffffffff827edfa0 T dwiic_acpi_found_ihidev +ffffffff827ee280 T dwiic_acpi_found_iatp +ffffffff827ee400 T dwiic_acpi_found_ietp +ffffffff827ef000 T acpicbkbd_match +ffffffff827ef030 T acpicbkbd_attach +ffffffff827ef0e0 T acpicbkbd_activate +ffffffff827ef140 T acpicbkbd_get_backlight +ffffffff827ef1c0 T acpicbkbd_set_backlight +ffffffff827ef270 T acpicbkbd_write_backlight +ffffffff827f0000 T acpials_match +ffffffff827f0090 T acpials_attach +ffffffff827f0280 T acpials_read +ffffffff827f0310 T acpials_addtask +ffffffff827f0350 T acpials_notify +ffffffff827f03e0 T acpials_update +ffffffff827f1000 T tpm_match +ffffffff827f1050 T tpm_attach +ffffffff827f13a0 T tpm_activate +ffffffff827f13f0 T tpm2_start_method +ffffffff827f1480 T tpm_probe +ffffffff827f1570 T tpm_init_tis +ffffffff827f1840 T tpm_init_crb +ffffffff827f1c30 T tpm_suspend +ffffffff827f1d60 T tpm_resume +ffffffff827f1d90 T tpm_write_tis +ffffffff827f21e0 T tpm_read_tis +ffffffff827f23f0 T tpm_write_crb +ffffffff827f28c0 T tpm_read_crb +ffffffff827f2c60 T tpm_request_locality_tis +ffffffff827f2d80 T tpm_request_locality_crb +ffffffff827f2ec0 T tpm_release_locality_crb +ffffffff827f2f20 T tpm_release_locality_tis +ffffffff827f2f90 T tpm_getburst +ffffffff827f3050 T tpm_status +ffffffff827f3070 T tpm_waitfor +ffffffff827f3160 T tpm_waitfor_status +ffffffff827f4000 T acpihve_match +ffffffff827f40d0 T acpihve_attach +ffffffff827f5000 T acpisbs_match +ffffffff827f5030 T acpisbs_attach +ffffffff827f5320 T acpisbs_activate +ffffffff827f5410 T acpisbs_read +ffffffff827f54e0 T acpisbs_setup_sensors +ffffffff827f5610 T acpisbs_refresh_sensors +ffffffff827f5760 T acpisbs_notify +ffffffff827f58c0 T acpi_smbus_read +ffffffff827f6000 T surface_match +ffffffff827f6060 T surface_attach +ffffffff827f60c0 T surface_hotkey +ffffffff827f7000 T ipmi_acpi_match +ffffffff827f7030 T ipmi_acpi_attach +ffffffff827f72b0 T ipmi_acpi_parse_crs +ffffffff827f8000 T amdgpio_match +ffffffff827f8060 T amdgpio_attach +ffffffff827f8330 T amdgpio_activate +ffffffff827f8430 T amdgpio_intr +ffffffff827f8610 T amdgpio_read_pin +ffffffff827f8670 T amdgpio_write_pin +ffffffff827f86f0 T amdgpio_intr_establish +ffffffff827f87f0 T amdgpio_intr_enable +ffffffff827f8880 T amdgpio_intr_disable +ffffffff827f8910 T amdgpio_save +ffffffff827f89a0 T amdgpio_restore +ffffffff827f8a40 T amdgpio_save_pin +ffffffff827f8ab0 T amdgpio_restore_pin +ffffffff827f8b20 T amdgpio_pin_intr +ffffffff827f9000 T acpihid_match +ffffffff827f9030 T acpihid_attach +ffffffff827f9270 T acpihid_init_dsm +ffffffff827f9400 T acpihid_eval +ffffffff827f9650 T acpihid_notify +ffffffff827f96c0 T acpihid_button_array_enable +ffffffff827fa000 t iosf_acpi_match +ffffffff827fa050 t iosf_acpi_attach +ffffffff827fa170 t iosf_acpi_mbi_mdr_rd +ffffffff827fa1f0 t iosf_acpi_mbi_mdr_wr +ffffffff827fb000 T intelpmc_match +ffffffff827fb030 T intelpmc_attach +ffffffff827fb110 T intelpmc_activate +ffffffff827fb320 T intelpmc_parse_lpit +ffffffff827fb490 T intelpmc_suspend +ffffffff827fb840 T intelpmc_resume +ffffffff827fbbf0 T intelpmc_dsm +ffffffff827fc000 T acpi_match +ffffffff827fc070 T acpi_attach +ffffffff827fc0b0 T acpi_probe +ffffffff827fc2a0 T acpi_map +ffffffff827fc3b0 T acpi_unmap +ffffffff827fc400 T acpi_bus_space_map +ffffffff827fc420 T acpi_bus_space_unmap +ffffffff827fc440 T acpi_intr_establish +ffffffff827fc5a0 T acpi_intr_disestablish +ffffffff827fc5b0 T acpi_scan +ffffffff827fc780 T acpi_acquire_glk +ffffffff827fc7e0 T acpi_release_glk +ffffffff827fc830 T acpi_attach_machdep +ffffffff827fca10 T acpi_sleep_cpu +ffffffff827fcbd0 T acpi_resume_cpu +ffffffff827fcd20 T sleep_mp +ffffffff827fce20 T resume_mp +ffffffff827fcf20 T acpi_iommu_device_map +ffffffff827fd000 T hibernate_resume_machdep +ffffffff827fd050 T hibernate_drop_to_real_mode +ffffffff827fd060 T hibernate_activate_resume_pt_machdep +ffffffff827fd0a0 T hibernate_switch_stack_machdep +ffffffff827fd0e0 T hibernate_flush +ffffffff827fd110 T acpi_savecpu +ffffffff827fe000 T sleep_showstate +ffffffff827fe100 T sleep_setstate +ffffffff827fe160 T gosleep +ffffffff827fe320 T sleep_resume +ffffffff827fe3b0 T suspend_finish +ffffffff827ff000 T acpiopen +ffffffff827ff0d0 T acpiclose +ffffffff827ff170 T acpiioctl +ffffffff827ff300 T request_sleep +ffffffff827ff390 T acpi_filtdetach +ffffffff827ff3f0 T acpi_filtread +ffffffff827ff430 T acpikqfilter +ffffffff82800000 T acpipci_match +ffffffff82800030 T acpipci_attach +ffffffff82800370 T acpipci_osc +ffffffff828004e0 T acpipci_parse_resources +ffffffff82800610 T acpipci_attach_bus +ffffffff82800820 T acpipci_print +ffffffff828008a0 T acpipci_attach_busses +ffffffff82801000 T efiopen +ffffffff82801040 T eficlose +ffffffff82801070 T efiioctl +ffffffff82801110 T efiioc_get_table +ffffffff82801280 T efiioc_var_get +ffffffff82801530 T efiioc_var_next +ffffffff82801760 T efiioc_var_set +ffffffff82801a10 T efi_adapt_error +ffffffff82802000 T efi_match +ffffffff82802070 T efi_attach +ffffffff82802390 T efi_map_runtime +ffffffff82802520 T efi_enter +ffffffff828025d0 T efi_leave +ffffffff82802660 T efi_fault +ffffffff82803000 T vmm_probe +ffffffff82803060 T vmm_attach +ffffffff828031b0 T vmm_activate +ffffffff82803340 T vmmopen +ffffffff82803390 T vmmclose +ffffffff828033c0 T vm_find +ffffffff82803500 T vmmioctl +ffffffff82803840 T vm_create +ffffffff82803bb0 T vm_get_info +ffffffff82803e60 T vm_terminate +ffffffff82804010 T vm_resetcpu +ffffffff82804140 T vm_share_mem +ffffffff828042b0 T pledge_ioctl_vmm +ffffffff828043a0 T vm_find_vcpu +ffffffff82804400 T vm_create_check_mem_ranges +ffffffff828045c0 T vm_teardown +ffffffff82804740 T vcpu_must_stop +ffffffff82805000 T vmm_enabled +ffffffff82805080 T vmm_attach_machdep +ffffffff82805260 T vmm_quiesce_vmx +ffffffff82805470 T vmm_activate_machdep +ffffffff82805510 T vmm_stop +ffffffff82805680 T vmm_start +ffffffff828057a0 T vmmioctl_machdep +ffffffff82805890 T vm_intr_pending +ffffffff82805950 T vm_mprotect_ept +ffffffff82805c10 T pledge_ioctl_vmm_machdep +ffffffff82805c60 T vm_rwvmparams +ffffffff82805e10 T vmm_init_pvclock +ffffffff82805ef0 T vm_rwregs +ffffffff82806030 T vcpu_readregs_vmx +ffffffff82806510 T vcpu_writeregs_vmx +ffffffff82806a50 T vcpu_readregs_svm +ffffffff82806f00 T vcpu_writeregs_svm +ffffffff828073d0 T vmm_get_guest_memtype +ffffffff82807450 T vmx_mprotect_ept +ffffffff82807710 T vmx_pmap_find_pte_ept +ffffffff828077e0 T start_vmm_on_cpu +ffffffff82807920 T stop_vmm_on_cpu +ffffffff828079c0 T vmclear_on_cpu +ffffffff82807a40 T vm_impl_init +ffffffff82807bd0 T vm_impl_deinit +ffffffff82807c00 T vcpu_reload_vmcs_vmx +ffffffff82807d80 T vcpu_reset_regs_svm +ffffffff82808150 T svm_setmsrbrw +ffffffff82808260 T svm_setmsrbr +ffffffff82808330 T vmm_alloc_vpid +ffffffff82808450 T svm_setmsrbw +ffffffff82808530 T vmx_setmsrbr +ffffffff828085e0 T vmx_setmsrbw +ffffffff82808690 T vmx_setmsrbrw +ffffffff828087a0 T svm_set_clean +ffffffff828087f0 T svm_set_dirty +ffffffff82808840 T vcpu_reset_regs_vmx +ffffffff82809330 T vcpu_vmx_check_cap +ffffffff82809430 T vcpu_vmx_compute_ctrl +ffffffff82809610 T vcpu_init_vmx +ffffffff82809a50 T vcpu_deinit_vmx +ffffffff82809bc0 T vcpu_reset_regs +ffffffff82809c00 T vcpu_init_svm +ffffffff82809de0 T vcpu_deinit_svm +ffffffff82809f50 T vcpu_init +ffffffff8280a020 T vmm_free_vpid +ffffffff8280a090 T vcpu_deinit +ffffffff8280a0d0 T vm_run +ffffffff8280a2d0 T vcpu_run_vmx +ffffffff8280ada0 T vcpu_run_svm +ffffffff8280b470 T vmm_fpurestore +ffffffff8280b540 T vmm_fpusave +ffffffff8280b5d0 T vmm_translate_gva +ffffffff8280b900 T vmm_update_pvclock +ffffffff8280ba10 T vmx_get_exit_info +ffffffff8280ba90 T vmx_handle_exit +ffffffff8280bf00 T vmx_instruction_error_decode +ffffffff8280c0d0 T vmm_get_guest_cpu_cpl +ffffffff8280c1f0 T vmx_handle_intr +ffffffff8280c290 T svm_handle_hlt +ffffffff8280c2e0 T vmx_handle_hlt +ffffffff8280c3b0 T svm_handle_exit +ffffffff8280c730 T svm_handle_np_fault +ffffffff8280c8d0 T vmm_handle_cpuid +ffffffff8280cf80 T svm_handle_msr +ffffffff8280d270 T svm_handle_xsetbv +ffffffff8280d330 T svm_handle_inout +ffffffff8280d440 T vmm_inject_ud +ffffffff8280d480 T vmm_inject_db +ffffffff8280d4c0 T vmx_handle_np_fault +ffffffff8280d640 T vmx_handle_inout +ffffffff8280d7e0 T vmx_handle_cr +ffffffff8280da20 T vmx_handle_rdmsr +ffffffff8280db20 T vmx_handle_wrmsr +ffffffff8280ddd0 T vmx_handle_xsetbv +ffffffff8280ded0 T vmm_inject_gp +ffffffff8280df10 T vmx_get_exit_qualification +ffffffff8280df80 T vmx_get_guest_faulttype +ffffffff8280e030 T svm_get_guest_faulttype +ffffffff8280e060 T svm_fault_page +ffffffff8280e0f0 T vmx_fault_page +ffffffff8280e270 T vmm_get_guest_cpu_mode +ffffffff8280e380 T vmx_load_pdptes +ffffffff8280e6a0 T vmx_handle_cr0_write +ffffffff8280e900 T vmx_handle_cr4_write +ffffffff8280e9c0 T vmm_handle_xsetbv +ffffffff8280ea70 T vmx_handle_misc_enable_msr +ffffffff8280ead0 T vmm_pat_is_valid +ffffffff8280ebb0 t vmm_handle_cpuid_0xd +ffffffff8280ecb0 T vmm_gpa_is_valid +ffffffff8280ed20 T vmx_exit_reason_decode +ffffffff8280ed60 T svm_exit_reason_decode +ffffffff8280fb70 T vcpu_state_decode +ffffffff82810000 T vmm_dispatch_intr +ffffffff82810030 T vmxon +ffffffff82810060 T vmxoff +ffffffff82810090 T vmclear +ffffffff828100c0 T vmptrld +ffffffff828100f0 T vmptrst +ffffffff82810120 T vmwrite +ffffffff82810150 T vmread +ffffffff82810180 T invvpid +ffffffff8281019b t invvpid_fail +ffffffff828101a2 t invvpid_ret +ffffffff828101c0 T invept +ffffffff828101db t invept_fail +ffffffff828101e2 t invept_ret +ffffffff82810200 T vmx_enter_guest +ffffffff8281022b t skip_init +ffffffff82810298 t no_l1df_msr +ffffffff8281029b t l1df_tlb_loop +ffffffff828102b4 t l1df_tlb_done +ffffffff828102bc t l1df_load_cache +ffffffff828102d3 t done_flush +ffffffff82810366 t do_resume +ffffffff828103eb t fail_launch_or_resume +ffffffff8281042d t fail_launch_unknown +ffffffff8281043a t fail_launch_invalid_vmcs +ffffffff82810447 t fail_launch_valid_vmcs +ffffffff82810464 t vmx_exit_handler_asm +ffffffff82810529 t restore_host +ffffffff82810550 T svm_enter_guest +ffffffff828106d2 t restore_host_svm +ffffffff82811000 T sdmmc_match +ffffffff82811060 T sdmmc_attach +ffffffff82811400 T sdmmc_detach +ffffffff828114c0 T sdmmc_activate +ffffffff828115b0 T sdmmc_discover_task +ffffffff828116a0 T sdmmc_create_thread +ffffffff82811710 T sdmmc_holds_root_device +ffffffff82811770 T sdmmc_task_thread +ffffffff828119f0 T sdmmc_needs_discover +ffffffff82811ac0 T sdmmc_del_task +ffffffff82811b80 T sdmmc_card_detach +ffffffff82811c90 T sdmmc_add_task +ffffffff82811d20 T sdmmc_card_attach +ffffffff82811e90 T sdmmc_enable +ffffffff82812020 T sdmmc_scan +ffffffff828120c0 T sdmmc_init +ffffffff828121f0 T sdmmc_disable +ffffffff82812380 T sdmmc_function_free +ffffffff828123a0 T sdmmc_delay +ffffffff828123f0 T sdmmc_select_card +ffffffff82812630 T sdmmc_set_bus_power +ffffffff828127f0 T sdmmc_function_alloc +ffffffff82812890 T sdmmc_app_command +ffffffff82812a50 T sdmmc_mmc_command +ffffffff82812ae0 T sdmmc_go_idle_state +ffffffff82812c10 T sdmmc_send_if_cond +ffffffff82812d80 T sdmmc_set_relative_addr +ffffffff82813000 T sdmmc_cisptr +ffffffff828130d0 T sdmmc_read_cis +ffffffff828134b0 T sdmmc_print_cis +ffffffff828136a0 T sdmmc_check_cis_quirks +ffffffff82814000 T sdmmc_io_enable +ffffffff828142f0 T sdmmc_io_reset +ffffffff82814450 T sdmmc_io_send_op_cond +ffffffff828145e0 T sdmmc_io_scan +ffffffff82814760 T sdmmc_io_init +ffffffff828148d0 T sdmmc_io_set_highspeed +ffffffff82814bd0 T sdmmc_io_set_bus_width +ffffffff82814ec0 T sdmmc_io_function_ready +ffffffff82815070 T sdmmc_io_read_1 +ffffffff828151f0 T sdmmc_io_function_enable +ffffffff82815690 T sdmmc_io_write_1 +ffffffff82815830 T sdmmc_io_function_disable +ffffffff82815b10 T sdmmc_io_attach +ffffffff82815c00 T sdmmc_print +ffffffff82815ec0 T sdmmc_submatch +ffffffff82815f50 T sdmmc_io_detach +ffffffff82816010 T sdmmc_io_rw_direct +ffffffff828161e0 T sdmmc_io_rw_extended_subr +ffffffff82816390 T sdmmc_io_rw_extended +ffffffff828167d0 T sdmmc_io_read_2 +ffffffff82816940 T sdmmc_io_write_2 +ffffffff82816ac0 T sdmmc_io_read_4 +ffffffff82816c30 T sdmmc_io_write_4 +ffffffff82816db0 T sdmmc_io_read_multi_1 +ffffffff82816eb0 T sdmmc_io_write_multi_1 +ffffffff82816fb0 T sdmmc_io_read_region_1 +ffffffff828170b0 T sdmmc_io_write_region_1 +ffffffff828171b0 T sdmmc_io_xchg +ffffffff82817370 T sdmmc_intr_enable +ffffffff82817650 T sdmmc_intr_disable +ffffffff82817930 T sdmmc_intr_establish +ffffffff82817a50 T sdmmc_intr_disestablish +ffffffff82817b50 T sdmmc_card_intr +ffffffff82817ba0 T sdmmc_intr_task +ffffffff82817c60 T sdmmc_io_set_blocklen +ffffffff82818000 T sdmmc_mem_enable +ffffffff828184d0 T sdmmc_mem_send_op_cond +ffffffff828186b0 T sdmmc_mem_signal_voltage +ffffffff828187b0 T sdmmc_mem_scan +ffffffff82818b00 T sdmmc_decode_csd +ffffffff82818f50 T sdmmc_decode_cid +ffffffff82819400 T sdmmc_mem_send_scr +ffffffff82819560 T sdmmc_mem_decode_scr +ffffffff828195c0 T sdmmc_mem_send_cxd_data +ffffffff82819740 T sdmmc_mem_set_bus_width +ffffffff82819870 T sdmmc_mem_sd_switch +ffffffff82819b30 T sdmmc_be512_to_bitfield512 +ffffffff82819be0 T sdmmc_mem_mmc_switch +ffffffff82819cd0 T sdmmc_mem_init +ffffffff82819e60 T sdmmc_mem_set_blocklen +ffffffff82819f70 T sdmmc_mem_sd_init +ffffffff8281a3e0 T sdmmc_mem_mmc_init +ffffffff8281ab60 T sdmmc_mem_select_transfer_mode +ffffffff8281abe0 T sdmmc_mem_execute_tuning +ffffffff8281ac70 T sdmmc_mem_read_block_subr +ffffffff8281b000 T sdmmc_mem_single_read_block +ffffffff8281b0d0 T sdmmc_mem_read_block +ffffffff8281b2e0 T sdmmc_mem_write_block_subr +ffffffff8281b660 T sdmmc_mem_single_write_block +ffffffff8281b730 T sdmmc_mem_write_block +ffffffff8281b940 T sdmmc_mem_hibernate_write +ffffffff8281c000 T sdmmc_scsi_cmd +ffffffff8281c200 T sdmmc_minphys +ffffffff8281c280 T sdmmc_scsi_attach +ffffffff8281c4c0 T sdmmc_alloc_ccbs +ffffffff8281c620 T sdmmc_free_ccbs +ffffffff8281c680 T sdmmc_scsi_detach +ffffffff8281c840 T sdmmc_stimeout +ffffffff8281c8e0 T sdmmc_ccb_alloc +ffffffff8281c9a0 T sdmmc_ccb_free +ffffffff8281caa0 T sdmmc_inquiry +ffffffff8281cd30 T sdmmc_start_xs +ffffffff8281ce50 T sdmmc_complete_xs +ffffffff8281cf40 T sdmmc_done_xs +ffffffff8281cf90 T sdmmc_scsi_hibernate_io +ffffffff8281e000 T bwfm_sdio_preinit +ffffffff8281e5a0 T bwfm_sdio_txcheck +ffffffff8281e5e0 T bwfm_sdio_txdata +ffffffff8281e660 T bwfm_sdio_txctl +ffffffff8281e7f0 T bwfm_sdio_buscore_read +ffffffff8281e800 T bwfm_sdio_buscore_write +ffffffff8281e820 T bwfm_sdio_buscore_prepare +ffffffff8281e9a0 T bwfm_sdio_buscore_activate +ffffffff8281ea30 T bwfm_sdio_match +ffffffff8281eae0 T bwfm_sdio_attach +ffffffff8281ee80 T bwfm_sdio_detach +ffffffff8281ef00 T bwfm_sdio_task +ffffffff8281f0c0 T bwfm_sdio_write_1 +ffffffff8281f0f0 T bwfm_sdio_read_1 +ffffffff8281f120 T bwfm_sdio_write_4 +ffffffff8281f1f0 T bwfm_sdio_read_4 +ffffffff8281f2b0 T bwfm_sdio_load_microcode +ffffffff8281f5a0 T bwfm_sdio_clkctl +ffffffff8281f6d0 T bwfm_sdio_dev_write +ffffffff8281f720 T bwfm_sdio_intr +ffffffff8281f770 T bwfm_sdio_ram_read_write +ffffffff8281f9f0 T bwfm_sdio_htclk +ffffffff8281fcb0 T bwfm_sdio_readshared +ffffffff8281fda0 T bwfm_sdio_dev_read +ffffffff8281fde0 T bwfm_sdio_rx_frames +ffffffff82820210 T bwfm_sdio_tx_frames +ffffffff82820330 T bwfm_sdio_backplane +ffffffff82820400 T bwfm_sdio_buf_read +ffffffff82820500 T bwfm_sdio_buf_write +ffffffff828205d0 T bwfm_sdio_frame_read_write +ffffffff82820780 T bwfm_sdio_newbuf +ffffffff82820810 T bwfm_sdio_tx_ok +ffffffff82820870 T bwfm_sdio_tx_ctrlframe +ffffffff82820980 T bwfm_sdio_tx_dataframe +ffffffff82820af0 T bwfm_sdio_rx_glom +ffffffff82821000 T onewire_match +ffffffff82821060 T onewire_attach +ffffffff82821120 T onewire_detach +ffffffff82821190 T onewire_activate +ffffffff828211b0 T onewire_scan +ffffffff82821400 T onewire_createthread +ffffffff82821470 T onewire_print +ffffffff82821560 T onewirebus_print +ffffffff828215b0 T onewire_lock +ffffffff828215d0 T onewire_unlock +ffffffff828215f0 T onewire_reset +ffffffff82821610 T onewire_bit +ffffffff82821630 T onewire_read_byte +ffffffff828217c0 T onewire_write_byte +ffffffff828218d0 T onewire_read_block +ffffffff82821970 T onewire_write_block +ffffffff82821a10 T onewire_triplet +ffffffff82821b20 T onewire_matchrom +ffffffff82821d10 T onewire_search +ffffffff82822180 T onewire_thread +ffffffff82823000 T onewire_crc +ffffffff828230b0 T onewire_crc16 +ffffffff82823170 T onewire_famname +ffffffff828231b0 T onewire_matchbyfam +ffffffff82824000 T owid_match +ffffffff82824030 T owid_attach +ffffffff82824120 T owid_detach +ffffffff82824170 T owid_activate +ffffffff82825000 T owsbm_match +ffffffff82825030 T owsbm_attach +ffffffff82825240 T owsbm_detach +ffffffff828252d0 T owsbm_activate +ffffffff82825300 T owsbm_update +ffffffff82826000 T owtemp_match +ffffffff82826030 T owtemp_attach +ffffffff82826160 T owtemp_detach +ffffffff828261f0 T owtemp_activate +ffffffff82826220 T owtemp_update +ffffffff82827000 T owctr_match +ffffffff82827030 T owctr_attach +ffffffff828271c0 T owctr_detach +ffffffff82827250 T owctr_activate +ffffffff82827280 T owctr_update +ffffffff828272c0 T owctr_update_counter +ffffffff82828000 A __text_page_start +ffffffff82828000 T Xsyscall_meltdown +ffffffff8282800c T Xsyscall +ffffffff82828299 t Xsyscall_trampback +ffffffff828282b0 T intr_user_exit +ffffffff828282f2 t intr_user_exit_post_ast +ffffffff8282844b t Xiretq_trampback +ffffffff82828457 T doreti_iret +ffffffff82829000 T alltraps +ffffffff82829138 T recall_trap +ffffffff82829150 T alltraps_kern +ffffffff82829153 T alltraps_kern_meltdown +ffffffff8282a000 ? Xtrap00 +ffffffff8282a000 A __kutext_start +ffffffff8282a000 A __text_page_end +ffffffff8282a010 ? Xtrap01 +ffffffff8282a020 ? Xtrap02 +ffffffff8282a028 c calltrap_specstk +ffffffff8282a0f0 ? calltrap_specstk_tramp +ffffffff8282a110 ? Xtrap03 +ffffffff8282a120 ? Xtrap04 +ffffffff8282a130 ? Xtrap05 +ffffffff8282a140 ? Xtrap06 +ffffffff8282a150 ? Xtrap07 +ffffffff8282a160 ? Xtrap08 +ffffffff8282a170 ? Xtrap09 +ffffffff8282a180 ? Xtrap0a +ffffffff8282a190 ? Xtrap0b +ffffffff8282a1a0 ? Xtrap0c +ffffffff8282a1b0 ? Xtrap0d +ffffffff8282a240 ? Xtrap0e +ffffffff8282a250 ? Xintrspurious +ffffffff8282a250 ? Xtrap0f +ffffffff8282a260 ? Xtrap10 +ffffffff8282a270 ? Xtrap11 +ffffffff8282a280 ? Xtrap12 +ffffffff8282a290 ? Xtrap13 +ffffffff8282a2a0 ? Xtrap14 +ffffffff8282a2b0 ? Xtrap15 +ffffffff8282a2c0 ? Xtrap16 +ffffffff8282a2c0 ? Xtrap17 +ffffffff8282a2c0 ? Xtrap18 +ffffffff8282a2c0 ? Xtrap19 +ffffffff8282a2c0 ? Xtrap1a +ffffffff8282a2c0 ? Xtrap1b +ffffffff8282a2c0 ? Xtrap1c +ffffffff8282a2c0 ? Xtrap1d +ffffffff8282a2c0 ? Xtrap1e +ffffffff8282a2c0 ? Xtrap1f +ffffffff8282a2d0 ? x2apic_eoi +ffffffff8282a2f0 ? Xintr_lapic_ipi +ffffffff8282a330 ? Xipi_invltlb +ffffffff8282a360 ? Xipi_invlpg +ffffffff8282a390 ? Xipi_invlrange +ffffffff8282a3d0 ? Xipi_invltlb_pcid +ffffffff8282a410 ? Xipi_invlpg_pcid +ffffffff8282a460 ? Xipi_invlrange_pcid +ffffffff8282a4d0 ? Xintr_lapic_ltimer +ffffffff8282a510 ? Xintr_xen_upcall +ffffffff8282a550 ? Xintr_hyperv_upcall +ffffffff8282a590 ? Xintr_legacy0 +ffffffff8282a5d0 ? Xintr_legacy1 +ffffffff8282a610 ? Xintr_legacy2 +ffffffff8282a650 ? Xintr_legacy3 +ffffffff8282a690 ? Xintr_legacy4 +ffffffff8282a6d0 ? Xintr_legacy5 +ffffffff8282a710 ? Xintr_legacy6 +ffffffff8282a750 ? Xintr_legacy7 +ffffffff8282a790 ? Xintr_legacy8 +ffffffff8282a7d0 ? Xintr_legacy9 +ffffffff8282a810 ? Xintr_legacy10 +ffffffff8282a850 ? Xintr_legacy11 +ffffffff8282a890 ? Xintr_legacy12 +ffffffff8282a8d0 ? Xintr_legacy13 +ffffffff8282a910 ? Xintr_legacy14 +ffffffff8282a950 ? Xintr_legacy15 +ffffffff8282a990 ? Xintr_ioapic_edge0 +ffffffff8282a9d0 ? Xintr_ioapic_edge1 +ffffffff8282aa10 ? Xintr_ioapic_edge2 +ffffffff8282aa50 ? Xintr_ioapic_edge3 +ffffffff8282aa90 ? Xintr_ioapic_edge4 +ffffffff8282aad0 ? Xintr_ioapic_edge5 +ffffffff8282ab10 ? Xintr_ioapic_edge6 +ffffffff8282ab50 ? Xintr_ioapic_edge7 +ffffffff8282ab90 ? Xintr_ioapic_edge8 +ffffffff8282abd0 ? Xintr_ioapic_edge9 +ffffffff8282ac10 ? Xintr_ioapic_edge10 +ffffffff8282ac50 ? Xintr_ioapic_edge11 +ffffffff8282ac90 ? Xintr_ioapic_edge12 +ffffffff8282acd0 ? Xintr_ioapic_edge13 +ffffffff8282ad10 ? Xintr_ioapic_edge14 +ffffffff8282ad50 ? Xintr_ioapic_edge15 +ffffffff8282ad90 ? Xintr_ioapic_edge16 +ffffffff8282add0 ? Xintr_ioapic_edge17 +ffffffff8282ae10 ? Xintr_ioapic_edge18 +ffffffff8282ae50 ? Xintr_ioapic_edge19 +ffffffff8282ae90 ? Xintr_ioapic_edge20 +ffffffff8282aed0 ? Xintr_ioapic_edge21 +ffffffff8282af10 ? Xintr_ioapic_edge22 +ffffffff8282af50 ? Xintr_ioapic_edge23 +ffffffff8282af90 ? Xintr_ioapic_edge24 +ffffffff8282afd0 ? Xintr_ioapic_edge25 +ffffffff8282b010 ? Xintr_ioapic_edge26 +ffffffff8282b050 ? Xintr_ioapic_edge27 +ffffffff8282b090 ? Xintr_ioapic_edge28 +ffffffff8282b0d0 ? Xintr_ioapic_edge29 +ffffffff8282b110 ? Xintr_ioapic_edge30 +ffffffff8282b150 ? Xintr_ioapic_edge31 +ffffffff8282b190 ? Xintr_ioapic_edge32 +ffffffff8282b1d0 ? Xintr_ioapic_edge33 +ffffffff8282b210 ? Xintr_ioapic_edge34 +ffffffff8282b250 ? Xintr_ioapic_edge35 +ffffffff8282b290 ? Xintr_ioapic_edge36 +ffffffff8282b2d0 ? Xintr_ioapic_edge37 +ffffffff8282b310 ? Xintr_ioapic_edge38 +ffffffff8282b350 ? Xintr_ioapic_edge39 +ffffffff8282b390 ? Xintr_ioapic_edge40 +ffffffff8282b3d0 ? Xintr_ioapic_edge41 +ffffffff8282b410 ? Xintr_ioapic_edge42 +ffffffff8282b450 ? Xintr_ioapic_edge43 +ffffffff8282b490 ? Xintr_ioapic_edge44 +ffffffff8282b4d0 ? Xintr_ioapic_edge45 +ffffffff8282b510 ? Xintr_ioapic_edge46 +ffffffff8282b550 ? Xintr_ioapic_edge47 +ffffffff8282b590 ? Xintr_ioapic_edge48 +ffffffff8282b5d0 ? Xintr_ioapic_edge49 +ffffffff8282b610 ? Xintr_ioapic_edge50 +ffffffff8282b650 ? Xintr_ioapic_edge51 +ffffffff8282b690 ? Xintr_ioapic_edge52 +ffffffff8282b6d0 ? Xintr_ioapic_edge53 +ffffffff8282b710 ? Xintr_ioapic_edge54 +ffffffff8282b750 ? Xintr_ioapic_edge55 +ffffffff8282b790 ? Xintr_ioapic_edge56 +ffffffff8282b7d0 ? Xintr_ioapic_edge57 +ffffffff8282b810 ? Xintr_ioapic_edge58 +ffffffff8282b850 ? Xintr_ioapic_edge59 +ffffffff8282b890 ? Xintr_ioapic_edge60 +ffffffff8282b8d0 ? Xintr_ioapic_edge61 +ffffffff8282b910 ? Xintr_ioapic_edge62 +ffffffff8282b950 ? Xintr_ioapic_edge63 +ffffffff8282b990 ? Xintr_ioapic_level0 +ffffffff8282b9d0 ? Xintr_ioapic_level1 +ffffffff8282ba10 ? Xintr_ioapic_level2 +ffffffff8282ba50 ? Xintr_ioapic_level3 +ffffffff8282ba90 ? Xintr_ioapic_level4 +ffffffff8282bad0 ? Xintr_ioapic_level5 +ffffffff8282bb10 ? Xintr_ioapic_level6 +ffffffff8282bb50 ? Xintr_ioapic_level7 +ffffffff8282bb90 ? Xintr_ioapic_level8 +ffffffff8282bbd0 ? Xintr_ioapic_level9 +ffffffff8282bc10 ? Xintr_ioapic_level10 +ffffffff8282bc50 ? Xintr_ioapic_level11 +ffffffff8282bc90 ? Xintr_ioapic_level12 +ffffffff8282bcd0 ? Xintr_ioapic_level13 +ffffffff8282bd10 ? Xintr_ioapic_level14 +ffffffff8282bd50 ? Xintr_ioapic_level15 +ffffffff8282bd90 ? Xintr_ioapic_level16 +ffffffff8282bdd0 ? Xintr_ioapic_level17 +ffffffff8282be10 ? Xintr_ioapic_level18 +ffffffff8282be50 ? Xintr_ioapic_level19 +ffffffff8282be90 ? Xintr_ioapic_level20 +ffffffff8282bed0 ? Xintr_ioapic_level21 +ffffffff8282bf10 ? Xintr_ioapic_level22 +ffffffff8282bf50 ? Xintr_ioapic_level23 +ffffffff8282bf90 ? Xintr_ioapic_level24 +ffffffff8282bfd0 ? Xintr_ioapic_level25 +ffffffff8282c010 ? Xintr_ioapic_level26 +ffffffff8282c050 ? Xintr_ioapic_level27 +ffffffff8282c090 ? Xintr_ioapic_level28 +ffffffff8282c0d0 ? Xintr_ioapic_level29 +ffffffff8282c110 ? Xintr_ioapic_level30 +ffffffff8282c150 ? Xintr_ioapic_level31 +ffffffff8282c190 ? Xintr_ioapic_level32 +ffffffff8282c1d0 ? Xintr_ioapic_level33 +ffffffff8282c210 ? Xintr_ioapic_level34 +ffffffff8282c250 ? Xintr_ioapic_level35 +ffffffff8282c290 ? Xintr_ioapic_level36 +ffffffff8282c2d0 ? Xintr_ioapic_level37 +ffffffff8282c310 ? Xintr_ioapic_level38 +ffffffff8282c350 ? Xintr_ioapic_level39 +ffffffff8282c390 ? Xintr_ioapic_level40 +ffffffff8282c3d0 ? Xintr_ioapic_level41 +ffffffff8282c410 ? Xintr_ioapic_level42 +ffffffff8282c450 ? Xintr_ioapic_level43 +ffffffff8282c490 ? Xintr_ioapic_level44 +ffffffff8282c4d0 ? Xintr_ioapic_level45 +ffffffff8282c510 ? Xintr_ioapic_level46 +ffffffff8282c550 ? Xintr_ioapic_level47 +ffffffff8282c590 ? Xintr_ioapic_level48 +ffffffff8282c5d0 ? Xintr_ioapic_level49 +ffffffff8282c610 ? Xintr_ioapic_level50 +ffffffff8282c650 ? Xintr_ioapic_level51 +ffffffff8282c690 ? Xintr_ioapic_level52 +ffffffff8282c6d0 ? Xintr_ioapic_level53 +ffffffff8282c710 ? Xintr_ioapic_level54 +ffffffff8282c750 ? Xintr_ioapic_level55 +ffffffff8282c790 ? Xintr_ioapic_level56 +ffffffff8282c7d0 ? Xintr_ioapic_level57 +ffffffff8282c810 ? Xintr_ioapic_level58 +ffffffff8282c850 ? Xintr_ioapic_level59 +ffffffff8282c890 ? Xintr_ioapic_level60 +ffffffff8282c8d0 ? Xintr_ioapic_level61 +ffffffff8282c910 ? Xintr_ioapic_level62 +ffffffff8282c950 ? Xintr_ioapic_level63 +ffffffff8282d000 ? codepatch_fill_nop +ffffffff8282d000 A __cptext_start +ffffffff8282d000 A __kutext_end +ffffffff8282d0b0 ? codepatch_maprw +ffffffff8282d1c0 ? codepatch_unmaprw +ffffffff8282d230 ? codepatch_nop +ffffffff8282d3b0 ? codepatch_replace +ffffffff8282d580 ? codepatch_call +ffffffff8282d5a0 ? codepatch_control_flow +ffffffff8282d7c0 ? codepatch_jmp +ffffffff8282e000 A __cptext_end +ffffffff8282e000 A __rodata_start +ffffffff8282e000 C _etext +ffffffff8282e000 C etext +ffffffff8282f000 r seeprom_read +ffffffff8282f004 r icl_mg_pll_find_divisors.div1_vals +ffffffff8282f034 r athn_ac2qid +ffffffff8282f034 r athn_ac2qid +ffffffff8282f034 r athn_ac2qid +ffffffff8282f040 r rtwn_get_rssi.cckoff +ffffffff8282f068 r rsu_ac2qid +ffffffff8282f078 r pckbc_portcmd +ffffffff8282f07c r tht_fifo_write_pad.pad +ffffffff8282f084 r rsu_get_rssi.cckoff +ffffffff8282f0a4 r adlp_n_revids +ffffffff8282f0e8 r apple_iso_trans +ffffffff8282f0f0 r wihap_check_tx.txratetable +ffffffff8282f0f4 r dmamode +ffffffff8282f118 r gen9_edram_size_mb.sets +ffffffff8282f12c r dg2_g12_revid_step_tbl +ffffffff82830000 r isomappings +ffffffff82830080 r unimappings +ffffffff82830230 r replacements +ffffffff82833abc r apollo_pio_rec +ffffffff8288193c r apollo_udma33_tim +ffffffff82897042 r pp_r600_decoded_lanes +ffffffff828ce051 r cmd680_setup_channel.udma_tbl +ffffffff828d655f r apollo_udma100_tim +ffffffff828d6565 r cmd0646_9_tim_udma +ffffffff828e4e9d r substchar +ffffffff8293c5c9 r apollo_udma133_tim +ffffffff8293c5d0 r apollo_udma66_tim +ffffffff8293c5fa r cy_pio_rec +ffffffff82941ee8 R drm_ca +ffffffff82941f10 R drm_filtops +ffffffff82941f40 R drmread_filtops +ffffffff82942000 r vga_emulops +ffffffff82942048 R vga_stdscreen +ffffffff82942078 R vga_stdscreen_mono +ffffffff829420a8 R vga_stdscreen_bf +ffffffff829420d8 R vga_40lscreen +ffffffff82942108 R vga_40lscreen_mono +ffffffff82942138 R vga_40lscreen_bf +ffffffff82942168 R vga_50lscreen +ffffffff82942198 R vga_50lscreen_mono +ffffffff829421c8 R vga_50lscreen_bf +ffffffff829421f8 R vga_screenlist +ffffffff82942208 R vga_screenlist_mono +ffffffff82942218 R vga_accessops +ffffffff82942278 r i945_wm_info +ffffffff829422b8 r bgansitopc +ffffffff829422c0 r pctoansi +ffffffff82942300 r sdma_offsets +ffffffff82942300 r sdma_offsets +ffffffff82942338 r iha_rate_tbl +ffffffff82942370 r i830_a_wm_info +ffffffff829423a8 r gen9_edram_size_mb.ways +ffffffff82942408 r aggr_periodic_times +ffffffff82942508 r michael_final.pad +ffffffff82942530 r rt_copysa.maskarray +ffffffff82942538 r i915_wm_info +ffffffff82942540 r amdgpu_ih_clientid_jpeg +ffffffff82942540 r amdgpu_ih_clientid_uvds +ffffffff82942540 r amdgpu_ih_clientid_vcns +ffffffff82942540 r amdgpu_ih_clientid_vcns +ffffffff82942540 r amdgpu_ih_clientid_vcns +ffffffff82942570 r jsl_ehl_revids +ffffffff82942580 r vga_setfontset.cmaptabb +ffffffff829425f0 r i830_bc_wm_info +ffffffff82942658 r hsw_activate_psr2.map +ffffffff82942660 r tgl_revids +ffffffff82942698 r __drm_universal_plane_init.default_modifiers +ffffffff829426a8 r iwn_tid2fifo +ffffffff829426c0 r vga_setfontset.cmaptaba +ffffffff829426c8 r crtc_offsets +ffffffff829426c8 r crtc_offsets +ffffffff829426c8 r crtc_offsets +ffffffff82942770 r rtwn_r88e_get_rssi.cckoff +ffffffff82943000 R edid_vendors +ffffffff829432c0 R edid_nvendors +ffffffff829432d0 R edid_products +ffffffff82943330 R edid_nproducts +ffffffff82943340 r _edid_modes +ffffffff82944000 R videomode_list +ffffffff82945080 R videomode_count +ffffffff82946000 r ahc_hard_errors +ffffffff82946080 r critical_sections +ffffffff829460b0 r patches +ffffffff82946d50 r seqprog +ffffffff82948000 r ahc_switch +ffffffff82949000 r termstat_strings +ffffffff82949020 r critical_sections +ffffffff82949060 r seqprog +ffffffff82949d50 r patches +ffffffff8294b000 r ahd_switch +ffffffff8294c000 R aic_switch +ffffffff8294d000 R adw_switch +ffffffff8294e000 R gdt_switch +ffffffff8294f000 R twe_switch +ffffffff82950000 R ciss_switch +ffffffff82950030 R ciss_level +ffffffff82950050 R ciss_stat +ffffffff82951000 R ami_switch +ffffffff82951028 R ami_raw_switch +ffffffff82952000 R mfi_switch +ffffffff82952028 R mfi_pd_switch +ffffffff82952050 r mfi_iop_xscale +ffffffff82952080 r mfi_iop_ppc +ffffffff829520b0 r mfi_iop_gen2 +ffffffff829520e0 r mfi_iop_skinny +ffffffff82952110 r mfi_bbu_indicators +ffffffff82953000 R qlw_switch +ffffffff82954000 R isp_2100_risc_code +ffffffff82966bf0 R isp_2200_risc_code +ffffffff82979990 R isp_2300_risc_code +ffffffff82993408 R qla_switch +ffffffff82993430 r qla_regs_2100 +ffffffff82993460 r qla_regs_2200 +ffffffff82993490 r qla_regs_23XX +ffffffff82994000 R ahci_atascsi_methods +ffffffff82995000 R nvme_switch +ffffffff82995028 r nvme_ops +ffffffff82996000 R mpi_switch +ffffffff82996060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff82996090 r chv_oa_mux_regs +ffffffff829960b0 r fiji_clock_stretcher_lookup_table +ffffffff829960b0 r tonga_clock_stretcher_lookup_table +ffffffff829960d0 r iosf_pci_devices +ffffffff829960f0 r link_speed +ffffffff829960f0 r link_speed +ffffffff82996130 r drm_fb_xfrm.default_dst_pitch +ffffffff82996130 r non_supported_protection +ffffffff82996140 r tgl_uy_revids +ffffffff829962b0 r bwi_phy_noise_11g_rev1 +ffffffff82996320 r cardslot_process_event.antonym_ev +ffffffff829963b0 r gen11_oa_mux_regs +ffffffff82996450 r dpia_to_preferred_enc_id_table +ffffffff829964c0 r ddr2_cycle_tenths +ffffffff82996530 r rtw_intr_rx.ratetbl +ffffffff829965b0 r abm_config +ffffffff82996630 r getbootinfo.ports +ffffffff82996680 r reg_offsets +ffffffff82996690 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff829966a0 r glk_revids +ffffffff829966b0 r init_non_clock_fields.look_up +ffffffff829966c0 r uftdi_8u232am_getrate.roundoff +ffffffff82996720 r zyd_rx_data.rates +ffffffff82996740 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff82996770 r intel_engine_init_tlb_invalidation.gen8_regs +ffffffff829967a0 r bwi_phy_noise_11g +ffffffff829967b0 r hpt366_pio +ffffffff82996810 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff82996830 r ether_crc32_be_update.rev +ffffffff82996830 r rtw_grf5101_mac_crypt.caesar +ffffffff82996880 r snb_b_fdi_train_param +ffffffff82996950 r intel_hpll_vco.elk_vco +ffffffff82996970 r icl_revids +ffffffff829969d0 r pin_offsets +ffffffff829969f0 r amdgpu_ih_srcid_jpeg +ffffffff82996a30 r firmware_list +ffffffff82996a90 r atom_arg_shift +ffffffff82996a90 r atom_arg_shift +ffffffff82996ad0 r pf_syncookie_wstab +ffffffff82996af0 r ieee80211_media_init.mopts +ffffffff82996b50 r add_entropy_words.twist_table +ffffffff82996bf0 r urtw_8225v2_txpwr_cck +ffffffff82996c10 r bwfm_pci_prio2fifo +ffffffff82996c10 r ieee80211_up_to_ac.up_to_ac +ffffffff82996cd0 r paritytab +ffffffff82996cd0 r x86emu_parity_tab +ffffffff82996cf0 r legacy_connector_convert +ffffffff82996d30 r gen7_oa_mux_regs +ffffffff82996d50 r hsw_oa_mux_regs +ffffffff82996d70 r notetab +ffffffff82996d90 r urtw_8225v2_txpwr_cck_ch14 +ffffffff82996db0 r bwi_rf_calibval.rf_calibvals +ffffffff82996e50 r pf_syncookie_msstab +ffffffff82996eb0 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff82996f10 r uath_wme_init.uath_wme_11g +ffffffff82996f50 r gen7_oa_b_counters +ffffffff82997150 r rtwn_iq_calib_run.reg_adda +ffffffff82997170 r nfs_backoff +ffffffff829971b0 r atom_def_dst +ffffffff829971b0 r atom_def_dst +ffffffff829971f0 r sha256_initial_hash_value +ffffffff82997250 r otus_edca_def +ffffffff82997270 r intel_hpll_vco.blb_vco +ffffffff82997350 r epic_pci_subsys_info +ffffffff82997370 r kbl_revids +ffffffff82997390 r atom_arg_mask +ffffffff82997390 r atom_arg_mask +ffffffff829973f0 r butmap +ffffffff82997430 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff82997470 r comsoft.lsrmap +ffffffff829974b0 r xgmi3x16_pcs_err_noncorrectable_mask_reg_aldebaran +ffffffff829974d0 r tulip_mii_phy_readspecific.table +ffffffff82997570 r intel_hpll_vco.pnv_vco +ffffffff829975d0 r dmapageport +ffffffff82997690 r intel_hpll_vco.ctg_vco +ffffffff82997750 r drm_calculate_luminance_range.pre_computed_values +ffffffff82998000 R sili_atascsi_methods +ffffffff82999000 R ncr53c9x_switch +ffffffff8299a000 r scf_period +ffffffff8299b000 R siop_script +ffffffff8299b5a0 R lun_switch +ffffffff8299b5d0 R tag_switch +ffffffff8299b660 R load_dsa +ffffffff8299b6c4 R siop_led_on +ffffffff8299b6cc R siop_led_off +ffffffff8299b6d8 R siop_switch +ffffffff8299c000 R ep_vortex_media +ffffffff8299c100 R ep_default_to_media +ffffffff8299d000 R wi_card_ident +ffffffff8299f000 R ucode_table +ffffffff829a0000 r re_revisions +ffffffff829a0290 r re_kstats_tpl +ffffffff829a2000 R smc91cxx_media +ffffffff829a2010 R smc91cxx_mii_bitbang_ops +ffffffff829a3000 R dl10019_mii_bitbang_ops +ffffffff829a3028 R dl10022_mii_bitbang_ops +ffffffff829a4000 R ax88190_mii_bitbang_ops +ffffffff829a6000 R ac97_on_off +ffffffff829a6304 R ac97_mic_select +ffffffff829a6608 R ac97_mono_select +ffffffff829a690c R ac97_source +ffffffff829a6c10 R ac97_volume_stereo +ffffffff829a6c2c R ac97_volume_mono +ffffffff829a6c50 R source_info +ffffffff829a7450 R ac97_ad +ffffffff829a7560 R ac97_ak +ffffffff829a75f0 R ac97_av +ffffffff829a7730 R ac97_rl +ffffffff829a7780 R ac97_cm +ffffffff829a7800 R ac97_cr +ffffffff829a7820 R ac97_cs +ffffffff829a7900 R ac97_cx +ffffffff829a7960 R ac97_dt +ffffffff829a7980 R ac97_em +ffffffff829a79b0 R ac97_es +ffffffff829a79d0 R ac97_is +ffffffff829a79f0 R ac97_ic +ffffffff829a7a70 R ac97_it +ffffffff829a7aa0 R ac97_ns +ffffffff829a7b60 R ac97_ps +ffffffff829a7b90 R ac97_sl +ffffffff829a7bb0 R ac97_st +ffffffff829a7d00 R ac97_vi +ffffffff829a7d30 R ac97_tt +ffffffff829a7db0 R ac97_ti +ffffffff829a7dd0 R ac97_wb +ffffffff829a7df0 R ac97_wo +ffffffff829a7e80 R ac97_ym +ffffffff829a7ed0 R ac97_vendors +ffffffff829a81d0 R ac97enhancement +ffffffff829a82d0 R ac97feature +ffffffff829a9000 R lm_chips +ffffffff829a9020 R lm78_sensors +ffffffff829a91a0 R w83627hf_sensors +ffffffff829a93a0 R w83627ehf_sensors +ffffffff829a95c0 R w83627dhg_sensors +ffffffff829a97c0 R nct6776f_sensors +ffffffff829a9a00 R nct6779d_sensors +ffffffff829a9d60 R w83637hf_sensors +ffffffff829a9f20 R w83697hf_sensors +ffffffff829aa0c0 R w83781d_sensors +ffffffff829aa280 R w83782d_sensors +ffffffff829aa480 R w83783s_sensors +ffffffff829aa600 R w83791d_sensors +ffffffff829aa860 R w83792d_sensors +ffffffff829aaae0 R as99127f_sensors +ffffffff829ab000 r ar5k_known_products +ffffffff829ab110 r ar5111_gain_opt +ffffffff829ab1e0 r ar5112_gain_opt +ffffffff829ab2b0 r ar5k_5ghz_channels +ffffffff829aba00 r ar5k_2ghz_channels +ffffffff829abf10 r ar5111_rf +ffffffff829ac350 r ar5112a_rf +ffffffff829ac890 r ar5112_rf +ffffffff829acda0 r ar5413_rf +ffffffff829ad1b0 r ar2413_rf +ffffffff829ad4d0 r ar2425_rf +ffffffff829ad830 r ar5111_rfg +ffffffff829adb30 r ar5112_rfg +ffffffff829ade30 r ar5413_rfg +ffffffff829ae130 r ar2413_rfg +ffffffff829ae430 r ar5k_rt_11a +ffffffff829ae552 r ar5k_rt_11b +ffffffff829ae674 r ar5k_rt_11g +ffffffff829ae796 r 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ar9280_2_0_rx_gain_13db_backoff +ffffffff829ba0c0 r ar9280_2_0_rx_gain +ffffffff829ba0e0 r ar9280_2_0_tx_gain_high_power +ffffffff829ba100 r ar9280_2_0_tx_gain +ffffffff829ba120 r ar9280_init_from_rom.chainoffset +ffffffff829ba130 r ar9280_2_0_regs +ffffffff829ba190 r ar9280_2_0_vals_5g20 +ffffffff829ba250 r ar9280_2_0_vals_5g40 +ffffffff829ba310 r ar9280_2_0_vals_2g40 +ffffffff829ba3d0 r ar9280_2_0_vals_2g20 +ffffffff829ba490 r ar9280_2_0_cm_regs +ffffffff829ba740 r ar9280_2_0_cm_vals +ffffffff829bac90 r ar9280_2_0_fast_clock_regs +ffffffff829bacb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff829bacf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff829bad30 r ar9280_2_0_serdes_regs +ffffffff829bad60 r ar9280_2_0_serdes_vals +ffffffff829bad90 r ar9280_2_0_rx_gain_regs +ffffffff829baea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff829bb0b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff829bb2c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff829bb4d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff829bb6e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff829bb8f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff829bbb00 r ar9280_2_0_tx_gain_regs +ffffffff829bbb40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff829bbbc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff829bbc40 r ar9280_2_0_tx_gain_vals_5g +ffffffff829bbcc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff829bc000 r ar9271_ini +ffffffff829bc068 r ar9285_1_2_ini +ffffffff829bc0d0 r ar9280_2_0_serdes +ffffffff829bc0e8 r ar9271_tx_gain_high_power +ffffffff829bc108 r ar9271_tx_gain +ffffffff829bc128 r ar9285_2_0_tx_gain_high_power +ffffffff829bc148 r ar9285_2_0_tx_gain +ffffffff829bc168 r ar9285_1_2_tx_gain_high_power +ffffffff829bc188 r ar9285_1_2_tx_gain +ffffffff829bc1b0 r ar9271_regs +ffffffff829bc410 r ar9271_vals_2g40 +ffffffff829bc8d0 r ar9271_vals_2g20 +ffffffff829bcd90 r ar9271_cm_regs +ffffffff829bd020 r ar9271_cm_vals +ffffffff829bd540 r ar9285_1_2_regs +ffffffff829bd7a0 r ar9285_1_2_vals_2g40 +ffffffff829bdc60 r ar9285_1_2_vals_2g20 +ffffffff829be120 r ar9285_1_2_cm_regs +ffffffff829be3a0 r ar9285_1_2_cm_vals +ffffffff829be890 r ar9280_2_0_serdes_regs +ffffffff829be8c0 r ar9280_2_0_serdes_vals +ffffffff829be8f0 r ar9271_tx_gain_regs +ffffffff829be940 r ar9271_tx_gain_high_power_vals_2g +ffffffff829be9d0 r ar9271_tx_gain_vals_2g +ffffffff829bea60 r ar9285_1_2_tx_gain_regs +ffffffff829beab0 r ar9285_2_0_tx_gain_high_power_vals_2g +ffffffff829beb50 r ar9285_2_0_tx_gain_vals_2g +ffffffff829bebf0 r ar9285_1_2_tx_gain_high_power_vals_2g +ffffffff829bec90 r ar9285_1_2_tx_gain_vals_2g +ffffffff829bf000 r ar9287_1_1_ini +ffffffff829bf068 r ar9280_2_0_serdes +ffffffff829bf080 r ar9287_1_1_rx_gain +ffffffff829bf0a0 r ar9287_1_1_tx_gain +ffffffff829bf0c0 r ar9287_1_1_regs +ffffffff829bf120 r ar9287_1_1_vals_2g40 +ffffffff829bf1d0 r ar9287_1_1_vals_2g20 +ffffffff829bf280 r ar9287_1_1_cm_regs +ffffffff829bf560 r ar9287_1_1_cm_vals +ffffffff829bfb20 r ar9280_2_0_serdes_regs +ffffffff829bfb50 r ar9280_2_0_serdes_vals +ffffffff829bfb80 r ar9287_1_1_rx_gain_regs +ffffffff829bfd90 r ar9287_1_1_rx_gain_vals_2g +ffffffff829c01a0 r ar9287_1_1_tx_gain_regs +ffffffff829c0200 r ar9287_1_1_tx_gain_vals_2g +ffffffff829c1000 r athn_rates +ffffffff829c2000 r ar9485_1_1_ini +ffffffff829c2068 r ar9485_1_1_serdes +ffffffff829c2080 r ar9380_2_2_ini +ffffffff829c20e8 r ar9380_2_2_serdes +ffffffff829c2100 r ar9380_2_2_rx_gain_wo_xlna +ffffffff829c2120 r ar9380_2_2_rx_gain +ffffffff829c2140 r ar9485_1_1_rx_gain +ffffffff829c2160 r ar9380_2_2_tx_gain_high_ob_db +ffffffff829c2180 r ar9380_2_2_tx_gain_low_ob_db +ffffffff829c21a0 r ar9380_2_2_tx_gain_high_power +ffffffff829c21c0 r ar9380_2_2_tx_gain +ffffffff829c21e0 r ar9485_1_1_tx_gain +ffffffff829c2200 r ar9485_1_1_regs +ffffffff829c2270 r ar9485_1_1_vals_2g40 +ffffffff829c2350 r ar9485_1_1_vals_2g20 +ffffffff829c2430 r ar9485_1_1_cm_regs +ffffffff829c2720 r ar9485_1_1_cm_vals +ffffffff829c2d00 r ar9485_1_1_serdes_regs +ffffffff829c2d0c r ar9485_1_1_serdes_vals +ffffffff829c2d20 r ar9380_2_2_regs +ffffffff829c2db0 r ar9380_2_2_vals_5g20 +ffffffff829c2ed0 r ar9380_2_2_vals_5g40 +ffffffff829c2ff0 r ar9380_2_2_vals_2g40 +ffffffff829c3110 r ar9380_2_2_vals_2g20 +ffffffff829c3230 r ar9380_2_2_cm_regs +ffffffff829c35d0 r ar9380_2_2_cm_vals +ffffffff829c3d00 r ar9380_2_2_fast_clock_regs +ffffffff829c3d20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff829c3d50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff829c3d74 r ar9380_2_2_serdes_regs +ffffffff829c3d80 r ar9380_2_2_serdes_vals +ffffffff829c3d90 r ar9380_2_2_rx_gain_regs +ffffffff829c3f90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff829c4390 r ar9380_2_2_rx_gain_vals +ffffffff829c4790 r ar9485_1_1_rx_gain_regs +ffffffff829c4890 r ar9485_1_1_rx_gain_vals +ffffffff829c4a90 r ar9380_2_2_tx_gain_regs +ffffffff829c4b60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff829c4d00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff829c4ea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff829c5040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff829c51e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff829c5380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff829c5520 r ar9380_2_2_tx_gain_vals_5g +ffffffff829c56c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff829c5860 r ar9485_1_1_tx_gain_regs +ffffffff829c58f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff829c5a10 r ar9380_def_rom +ffffffff829c5e50 r ar9380_def_rom_h112 +ffffffff829c6290 r ar9380_def_rom_h116 +ffffffff829c66d0 r ar9380_def_rom_x112 +ffffffff829c6b10 r ar9380_def_rom_x113 +ffffffff829c7000 R atw_txthresh_tab_lo +ffffffff829c7050 R atw_txthresh_tab_hi +ffffffff829c70a0 r atw_attach.empty_macaddr +ffffffff829c70b0 r atw_attach.type_strings +ffffffff829c70d0 r atw_rfmd2958_ifn +ffffffff829c7110 r atw_rfmd2958_rf1r +ffffffff829c7150 r atw_rxintr.rate_tbl +ffffffff829c8000 r rtw_identify_sta.empty_macaddr +ffffffff829c9000 r rtwn_set_key.etherzeroaddr +ffffffff829c9010 r rtl8188eu_rf_prog +ffffffff829c9030 r rtl8188ftv_rf_prog +ffffffff829c9050 r rtl8192e_rf_prog +ffffffff829c9080 r rtl8188ce_rf_prog +ffffffff829c90a0 r rtl8188ru_rf_prog +ffffffff829c90c0 r rtl8188cu_rf_prog +ffffffff829c90e0 r rtl8192ce_rf_prog +ffffffff829c9110 r rtl8188ru_txagc +ffffffff829c9170 r rtl8188eu_rf_regs +ffffffff829c9230 r rtl8188eu_rf_vals +ffffffff829c93b0 r rtl8188ftv_rf_regs +ffffffff829c9490 r rtl8188ftv_rf_vals +ffffffff829c9640 r rtl8192e_rf_regs +ffffffff829c9710 r rtl8192e_rf_vals +ffffffff829c98b0 r rtl8192e_rf2_regs +ffffffff829c9950 r rtl8192e_rf2_vals +ffffffff829c9a90 r rtl8192ce_rf1_regs +ffffffff829c9bb0 r rtl8188ce_rf_vals +ffffffff829c9df0 r rtl8188ru_rf_vals +ffffffff829ca030 r rtl8188cu_rf_vals +ffffffff829ca270 r rtl8192ce_rf1_vals +ffffffff829ca4b0 r rtl8192ce_rf2_regs +ffffffff829ca500 r rtl8192ce_rf2_vals +ffffffff829ca5a0 r rtl8192cu_txagc +ffffffff829cb000 r rt2560_rf2522_r2 +ffffffff829cb040 r rt2560_rf2524_r2 +ffffffff829cb080 r rt2560_rf2525_hi_r2 +ffffffff829cb0c0 r rt2560_rf2525_r2 +ffffffff829cb100 r rt2560_rf2525e_r2 +ffffffff829cb140 r rt2560_rf2526_hi_r2 +ffffffff829cb180 r rt2560_rf2526_r2 +ffffffff829cb1c0 r rt2560_def_bbp +ffffffff829cb200 r rt2560_def_mac +ffffffff829cc000 r rt2661_rf5225_1 +ffffffff829cc300 r rt2661_rf5225_2 +ffffffff829cc600 r rt2661_def_bbp +ffffffff829cc640 r rt2661_def_mac +ffffffff829cd000 r rt2860_rf2850 +ffffffff829cd430 r rt2860_rates +ffffffff829cd4f0 r rt3572_def_rf +ffffffff829cd530 r rt3090_def_rf +ffffffff829cd560 r rt5392_def_rf +ffffffff829cd5e0 r rt3290_def_rf +ffffffff829cd640 r rt5390_def_rf +ffffffff829cd6c0 r rt5390_def_bbp +ffffffff829cd6f0 r rt2860_def_mac +ffffffff829cf000 r acx111_reg +ffffffff829cf040 r acx111_rate_map +ffffffff829d0000 r acx100_reg +ffffffff829d0040 r acx100_txpower_rfmd +ffffffff829d0060 r gen8_rcs_offsets +ffffffff829d0090 r acx100_txpower_maxim +ffffffff829d00b0 r mtl_rcs_offsets +ffffffff829d00f0 r digits +ffffffff829d00f0 r pppdumpb.digits +ffffffff829d00f0 r pppdumpm.digits +ffffffff829d0140 r hangpic +ffffffff829d0180 r gen11_rcs_offsets +ffffffff829d01b0 r xehp_rcs_offsets +ffffffff829d01e0 r dg2_rcs_offsets +ffffffff829d0220 r dg2_xcs_offsets +ffffffff829d0250 r gen12_xcs_offsets +ffffffff829d1000 r trinity_override_mgpg_sequences +ffffffff829d13c0 r voltage_swing_to_pre_emphasis +ffffffff829d13d0 r sgpr_init_compute_shader +ffffffff829d14a0 r intel_hpll_vco.cl_vco +ffffffff829d14c0 r vgpr_init_compute_shader +ffffffff829d2000 r malo_cmd_string.cmds +ffffffff829d20b0 r malo_cmd_string_result.results +ffffffff829d3000 R bwi_vendor_led_act +ffffffff829d300c R bwi_default_led_act +ffffffff829d3010 R bwi_led_duration +ffffffff829d3380 r bwi_sup_bphy +ffffffff829d33c0 r bwi_phy_freq_11g_rev1 +ffffffff829d35c0 r bwi_phy_rotor_11g_rev1 +ffffffff829d36a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff829d36e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff829d3720 r bwi_phy_noise_scale_11g +ffffffff829d3760 r bwi_phy_sigma_sq_11g_rev2 +ffffffff829d37d0 r bwi_phy_sigma_sq_11g_rev7 +ffffffff829d3840 r bwi_phy_delay_11g_rev1 +ffffffff829d3920 r bwi_rf_get_gains.save_phy_regs +ffffffff829d3940 r bwi_rf_lo_find.map +ffffffff829d3960 r bwi_txpower_map_11b +ffffffff829d39a0 r bwi_txpower_map_11g +ffffffff829d39e0 r _bwi_rf_lo_update_11g.rf_atten_list +ffffffff829d3a20 r _bwi_rf_lo_update_11g.rf_atten_init_list +ffffffff829d3a60 r _bwi_rf_lo_update_11g.rf_lo_measure_order +ffffffff829d3aa0 r bwi_rf_set_nrssi_ofs_11g.save_phy_comm_regs +ffffffff829d3ac0 r bwi_bbpid_map +ffffffff829d3af0 r bwi_regwin_count +ffffffff829d3b40 r bwi_clkfreq +ffffffff829d3b58 r bwi_zero_addr +ffffffff829d4000 R ipq8074_ops +ffffffff829d4070 R ipq6018_ops +ffffffff829d40e0 R qca6390_ops +ffffffff829d4150 R qcn9074_ops +ffffffff829d41c0 R wcn6855_ops +ffffffff829d4230 R wcn6750_ops +ffffffff829d42a0 R ath11k_hw_ring_mask_ipq8074 +ffffffff829d42f8 R ath11k_hw_ring_mask_qca6390 +ffffffff829d4350 R ath11k_hw_ring_mask_qcn9074 +ffffffff829d43a8 R ath11k_hw_ring_mask_wcn6750 +ffffffff829d4400 R ath11k_target_ce_config_wlan_ipq8074 +ffffffff829d4510 R ath11k_target_service_to_ce_map_wlan_ipq8074 +ffffffff829d4620 R ath11k_target_service_to_ce_map_wlan_ipq6018 +ffffffff829d4710 R ath11k_target_ce_config_wlan_qca6390 +ffffffff829d47f0 R ath11k_target_service_to_ce_map_wlan_qca6390 +ffffffff829d48b0 R ath11k_target_ce_config_wlan_qcn9074 +ffffffff829d4990 R ath11k_target_service_to_ce_map_wlan_qcn9074 +ffffffff829d4a70 R qwx_host_ce_config_ipq8074 +ffffffff829d4d10 R qwx_host_ce_config_qca6390 +ffffffff829d4e30 R qwx_host_ce_config_qcn9074 +ffffffff829d4ef0 R ipq8074_regs +ffffffff829d4fc4 R qca6390_regs +ffffffff829d5098 R qcn9074_regs +ffffffff829d516c R wcn6855_regs +ffffffff829d5240 R wcn6750_regs +ffffffff829d5320 R qmi_response_type_v01_ei +ffffffff829d5380 R qmi_wlanfw_ind_register_req_msg_v01_ei +ffffffff829d56a0 R qmi_wlanfw_ind_register_resp_msg_v01_ei +ffffffff829d5720 R qmi_wlanfw_host_cap_req_msg_v01_ei +ffffffff829d5aa0 R qmi_wlanfw_host_cap_resp_msg_v01_ei +ffffffff829d5ae0 R qmi_wlanfw_mem_cfg_s_v01_ei +ffffffff829d5b60 R qmi_wlanfw_mem_seg_s_v01_ei +ffffffff829d5c00 R qmi_wlanfw_request_mem_ind_msg_v01_ei +ffffffff829d5c60 R qmi_wlanfw_mem_seg_resp_s_v01_ei +ffffffff829d5d00 R qmi_wlanfw_respond_mem_req_msg_v01_ei +ffffffff829d5d60 R qmi_wlanfw_respond_mem_resp_msg_v01_ei +ffffffff829d5da0 R qmi_wlanfw_cap_req_msg_v01_ei +ffffffff829d5dc0 R qmi_wlanfw_rf_chip_info_s_v01_ei +ffffffff829d5e20 R qmi_wlanfw_rf_board_info_s_v01_ei +ffffffff829d5e60 R qmi_wlanfw_soc_info_s_v01_ei +ffffffff829d5ea0 R qmi_wlanfw_fw_version_info_s_v01_ei +ffffffff829d5f00 R qmi_wlanfw_cap_resp_msg_v01_ei +ffffffff829d61c0 R qmi_wlanfw_bdf_download_req_msg_v01_ei +ffffffff829d63a0 R qmi_wlanfw_bdf_download_resp_msg_v01_ei +ffffffff829d63e0 R qmi_wlanfw_m3_info_req_msg_v01_ei +ffffffff829d6440 R qmi_wlanfw_m3_info_resp_msg_v01_ei +ffffffff829d6480 R qmi_wlanfw_wlan_ini_req_msg_v01_ei +ffffffff829d64e0 R qmi_wlanfw_wlan_ini_resp_msg_v01_ei +ffffffff829d6520 R qmi_wlanfw_ce_tgt_pipe_cfg_s_v01_ei +ffffffff829d65e0 R qmi_wlanfw_ce_svc_pipe_cfg_s_v01_ei +ffffffff829d6660 R qmi_wlanfw_shadow_reg_cfg_s_v01_ei +ffffffff829d66c0 R qmi_wlanfw_shadow_reg_v2_cfg_s_v01_ei +ffffffff829d6700 R qmi_wlanfw_wlan_mode_req_msg_v01_ei +ffffffff829d6780 R qmi_wlanfw_wlan_mode_resp_msg_v01_ei +ffffffff829d67c0 R qmi_wlanfw_wlan_cfg_req_msg_v01_ei +ffffffff829d69a0 R qmi_wlanfw_wlan_cfg_resp_msg_v01_ei +ffffffff829d69e0 r wmi_tlv_policies +ffffffff829d8740 r qwx_hw_mode_pri_map +ffffffff829d8770 r ath11k_hw_params +ffffffff829d8cf0 r hw_srng_config_templ +ffffffff829d8fa8 r ath11k_hw_hal_params_ipq8074 +ffffffff829d8fb8 r ath11k_hw_hal_params_qca6390 +ffffffff829d8fc8 r ath11k_hw_hal_params_wcn6750 +ffffffff829d8fd8 r ath11k_hw_tcl2wbm_rbm_map_ipq8074 +ffffffff829d8fe1 r ath11k_hw_tcl2wbm_rbm_map_wcn6750 +ffffffff829da000 R uhci_bus_methods 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vscsi_switch +ffffffff829e2050 R vscsi_filtops +ffffffff829e3000 R mpath_ca +ffffffff829e3028 R mpath_switch +ffffffff829e4000 R softraid_ca +ffffffff829e4028 R sr_switch +ffffffff829e5000 r spdmem_basic_types +ffffffff829e50a0 r spdmem_parity_types +ffffffff829e50e0 r spdmem_ddr4_decode.ddr4_chipsize +ffffffff829e6000 R ufshci_switch +ffffffff829e7000 R kstat_rlock_ops +ffffffff829e7010 R kstat_wlock_ops +ffffffff829e7020 R kstat_mutex_ops +ffffffff829e7030 R kstat_cpu_ops +ffffffff829e7040 r kstat_id_tree_RBT_INFO +ffffffff829e7058 R kstat_id_tree_RBT_TYPE +ffffffff829e7060 r kstat_pv_tree_RBT_INFO +ffffffff829e7078 R kstat_pv_tree_RBT_TYPE +ffffffff829e7080 r kstat_nm_tree_RBT_INFO +ffffffff829e7098 R kstat_nm_tree_RBT_TYPE +ffffffff829e8000 r fuse_rd_filtops +ffffffff829e9000 R fusefs_vfsops +ffffffff829e9070 R fusefs_vars +ffffffff829ea000 R fusefs_vops +ffffffff829ea110 R fusefsread_filtops +ffffffff829ea140 R fusefswrite_filtops +ffffffff829ea170 R fusefsvnode_filtops +ffffffff829eb000 r pf_state_tree_RBT_INFO +ffffffff829eb018 R pf_state_tree_RBT_TYPE +ffffffff829eb020 r pf_state_tree_id_RBT_INFO +ffffffff829eb038 R pf_state_tree_id_RBT_TYPE +ffffffff829eb040 r pf_translate_af.zero +ffffffff829ec000 R hfsc_ops +ffffffff829ec038 R ifq_hfsc_ops +ffffffff829ec040 R hfsc_pf_ops +ffffffff829ec088 R pfq_hfsc_ops +ffffffff829ed000 r fqcodel_ops +ffffffff829ed038 R ifq_fqcodel_ops +ffffffff829ed040 r fqcodel_pf_ops +ffffffff829ed088 R pfq_fqcodel_ops +ffffffff829ed090 r codel_intervals +ffffffff829ee000 r pfsync_bulk_req_state_names +ffffffff829ee030 r pfsync_bulk_req_event_names +ffffffff829ee060 r pfsync_qs +ffffffff829ee0d8 r pfsync_kstat_tpl +ffffffff829ee2e0 r pfsync_acts +ffffffff829ef000 r bio_mappings_RBT_INFO +ffffffff829ef018 R bio_mappings_RBT_TYPE +ffffffff829f0000 R hotplugread_filtops +ffffffff829f1000 R dtps_static +ffffffff829f2000 R db_show_all_cmds +ffffffff829f2180 R db_show_cmds +ffffffff829f24c0 R db_boot_cmds +ffffffff829f25a0 R db_command_table +ffffffff829f3000 R ddb_vars +ffffffff829f4000 R audio_ca +ffffffff829f4028 R audioctlread_filtops +ffffffff829f4058 R audiowrite_filtops +ffffffff829f4088 R audioread_filtops +ffffffff829f5000 R midi_ca +ffffffff829f5028 R midiwrite_filtops +ffffffff829f5058 R midiread_filtops +ffffffff829f6000 r mulawtolin16 +ffffffff829f6200 r lintomulaw +ffffffff829f7000 R randomread_filtops +ffffffff829f7030 R randomwrite_filtops +ffffffff829f8000 R video_ca +ffffffff829f8028 R video_filtops +ffffffff829f9000 R cd9660_vfsops +ffffffff829fa000 R cd9660_vops +ffffffff829fa110 R cd9660_specvops +ffffffff829fa220 R cd9660_fifovops +ffffffff829fa330 R cd9660read_filtops +ffffffff829fa360 R cd9660write_filtops +ffffffff829fa390 R cd9660vnode_filtops +ffffffff829fb000 R udf_vfsops +ffffffff829fc000 R udf_vops +ffffffff829fc110 r mon_lens +ffffffff829fd000 r month_days +ffffffff829fe000 R execsw +ffffffff829ff000 r shstrtab +ffffffff82a00000 R copyright +ffffffff82a000c0 r initpaths +ffffffff82a01000 R sysent +ffffffff82a03000 R bufq_impls +ffffffff82a04000 R kqueueops +ffffffff82a04038 R kqread_filtops +ffffffff82a04068 R proc_filtops +ffffffff82a04098 R sig_filtops +ffffffff82a040c8 R file_filtops +ffffffff82a040f8 R timer_filtops +ffffffff82a04130 R sysfilt_ops +ffffffff82a04178 R seltrue_filtops +ffffffff82a041a8 R dead_filtops +ffffffff82a041d8 R badfd_filtops +ffffffff82a04208 r mutex_klistops +ffffffff82a04220 r rwlock_klistops +ffffffff82a05000 R kv_exec +ffffffff82a06000 R addrmask +ffffffff82a07000 r rw_ops +ffffffff82a08000 r proc_printit.pstat +ffffffff82a09000 R pledge_syscalls +ffffffff82a09a60 r pledgenames +ffffffff82a09cb0 r pledgereq +ffffffff82a0a000 r unvname_rbt_RBT_INFO +ffffffff82a0a018 R unvname_rbt_RBT_TYPE +ffffffff82a0b000 R sigprop +ffffffff82a0c000 R kern_vars +ffffffff82a0c2f0 R hw_vars +ffffffff82a0d000 R tc_vars +ffffffff82a0e000 r sys_gettimeofday.zerotz +ffffffff82a0f000 r taskq_sys_name +ffffffff82a0f006 r taskq_sys_mp_name +ffffffff82a0f010 R systq +ffffffff82a0f018 R systqmp +ffffffff82a11000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff82a11010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff82a11020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff82a11030 r gpt_get_fstype.gpt_uuid_linux +ffffffff82a11040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff82a11050 r gpt_get_fstype.gpt_uuid_unused +ffffffff82a11060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff82a11070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff82a12000 r hiballoc_addr_RBT_INFO +ffffffff82a12018 R hiballoc_addr_RBT_TYPE +ffffffff82a13000 R logread_filtops +ffffffff82a14000 r phtree_RBT_INFO +ffffffff82a14018 R phtree_RBT_TYPE +ffffffff82a14020 r pool_lock_ops_rw +ffffffff82a14058 r pool_lock_ops_mtx +ffffffff82a15000 R pipe_rfiltops +ffffffff82a15030 R pipe_wfiltops +ffffffff82a15060 R pipe_efiltops +ffffffff82a15090 r pipeops +ffffffff82a16000 R socketops +ffffffff82a17000 R sysvsem_vars +ffffffff82a18000 R char_type +ffffffff82a18100 R ttyread_filtops +ffffffff82a18130 R ttywrite_filtops +ffffffff82a18160 R ttyexcept_filtops +ffffffff82a19000 R ptcread_filtops +ffffffff82a19030 R ptcwrite_filtops +ffffffff82a19060 R ptcexcept_filtops +ffffffff82a1b000 R domains +ffffffff82a1c000 R unixdomain +ffffffff82a1c050 R unixsw +ffffffff82a1d000 R soread_filtops +ffffffff82a1d030 R sowrite_filtops +ffffffff82a1d060 R soexcept_filtops +ffffffff82a1e000 R sun_noname +ffffffff82a1e010 R uipc_usrreqs +ffffffff82a1e0a0 R uipc_dgram_usrreqs +ffffffff82a1e130 R unpstctl_vars +ffffffff82a1e160 R unpsqctl_vars +ffffffff82a1e190 R unpdgctl_vars +ffffffff82a1f000 r namecache_rb_cache_RBT_INFO +ffffffff82a1f018 R namecache_rb_cache_RBT_TYPE +ffffffff82a20000 R generic_filtops +ffffffff82a21000 r buf_rb_bufs_RBT_INFO +ffffffff82a21018 R buf_rb_bufs_RBT_TYPE +ffffffff82a21020 r typename +ffffffff82a22000 R sync_vops +ffffffff82a23000 R vnops +ffffffff82a24000 R spec_vops +ffffffff82a25000 R dead_vops +ffffffff82a26000 R fifo_vops +ffffffff82a26110 R fiforead_filtops +ffffffff82a26140 R fifowrite_filtops +ffffffff82a26170 R fifoexcept_filtops +ffffffff82a27000 R regyear +ffffffff82a27020 R leapyear +ffffffff82a27040 r dos2unix +ffffffff82a27140 r u2l +ffffffff82a27240 r unix2dos +ffffffff82a28008 R msdosfs_vfsops +ffffffff82a29000 R msdosfs_vops +ffffffff82a29110 R msdosfsread_filtops +ffffffff82a29140 R msdosfswrite_filtops +ffffffff82a29170 R msdosfsvnode_filtops +ffffffff82a2a000 r _utf_count +ffffffff82a2b000 R ntfs_vfsops +ffffffff82a2c000 R ntfs_vops +ffffffff82a2d000 R bpfread_filtops +ffffffff82a2d030 R bpf_mbuf_ops +ffffffff82a2e000 r bpf_mem_ops +ffffffff82a2f000 R priq_ops +ffffffff82a2f038 R ifq_priq_ops +ffffffff82a2f040 r ifq_kstat_tpl +ffffffff82a2f180 r ifiq_kstat_tpl +ffffffff82a30000 r ether_crc32_le_update.crctab +ffffffff82a30040 r ether_crc32_be_update.crctab +ffffffff82a31000 r lcp +ffffffff82a31078 r ipcp +ffffffff82a310f0 r ipv6cp +ffffffff82a31168 r chap +ffffffff82a311e0 r pap +ffffffff82a32000 R ifmedia_baudrate_descriptions +ffffffff82a33000 r fcstab +ffffffff82a35000 R tunread_filtops +ffffffff82a35030 R tunwrite_filtops +ffffffff82a36000 R bridge_brport +ffffffff82a37000 R bstp_etheraddr +ffffffff82a38000 r eb_tree_RBT_INFO +ffffffff82a38018 R eb_tree_RBT_TYPE +ffffffff82a39000 r veb_etherbridge_ops +ffffffff82a39028 r veb_pf_ipv4 +ffffffff82a39040 r veb_pf_ipv6 +ffffffff82a3a000 r pipex_pppoe_padding +ffffffff82a3b000 r rn_addmask.normal_chars +ffffffff82a3c000 R route_src +ffffffff82a3c010 R route_usrreqs +ffffffff82a3c0a0 R routedomain +ffffffff82a3c0f0 R routesw +ffffffff82a3d000 R gre_vars +ffffffff82a3d030 r mgre_tree_RBT_INFO +ffffffff82a3d048 R mgre_tree_RBT_TYPE +ffffffff82a3d050 r egre_tree_RBT_INFO +ffffffff82a3d068 R egre_tree_RBT_TYPE +ffffffff82a3d070 r nvgre_ucast_tree_RBT_INFO +ffffffff82a3d088 R nvgre_ucast_tree_RBT_TYPE +ffffffff82a3d090 r nvgre_mcast_tree_RBT_INFO +ffffffff82a3d0a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff82a3d0b0 r eoip_tree_RBT_INFO +ffffffff82a3d0c8 R eoip_tree_RBT_TYPE +ffffffff82a3d0d0 r nvgre_etherbridge_ops +ffffffff82a3e000 r trunk_protos +ffffffff82a3f000 R ethermulticastaddr_slowprotocols +ffffffff82a3f006 R lacp_info_tlv_template +ffffffff82a3f00e R marker_info_tlv_template +ffffffff82a3f012 R marker_response_tlv_template +ffffffff82a3f020 R lacp_timer_funcs +ffffffff82a40000 r lacp_rxm_state_names +ffffffff82a40040 r lacp_rxm_event_names +ffffffff82a40090 r aggr_port_selected_names +ffffffff82a400b0 r lacp_mux_state_names +ffffffff82a400e0 r lacp_mux_event_names +ffffffff82a40128 r lacp_address_slow +ffffffff82a41000 r tpmr_pf_ipv4 +ffffffff82a41018 r tpmr_pf_ipv6 +ffffffff82a42000 r bpe_tree_RBT_INFO +ffffffff82a42018 R bpe_tree_RBT_TYPE +ffffffff82a42020 r bpe_etherbridge_ops +ffffffff82a43000 R pppx_rd_filtops +ffffffff82a43030 R pppx_wr_filtops +ffffffff82a43060 r pppx_ifs_RBT_INFO +ffffffff82a43078 R pppx_ifs_RBT_TYPE +ffffffff82a43080 r pppac_rd_filtops +ffffffff82a430b0 r pppac_wr_filtops +ffffffff82a44000 r vxlan_peers_RBT_INFO +ffffffff82a44018 R vxlan_peers_RBT_TYPE +ffffffff82a44020 r vxlan_etherbridge_ops +ffffffff82a45000 R stoeplitz_cache +ffffffff82a46000 R ieee80211_std_rateset_11a +ffffffff82a46010 R ieee80211_std_rateset_11b +ffffffff82a46020 R ieee80211_std_rateset_11g +ffffffff82a46030 R ieee80211_std_ratesets_11n +ffffffff82a463b0 R ieee80211_std_ratesets_11ac +ffffffff82a466b0 r ieee80211_setbasicrates.basic +ffffffff82a46710 r ieee80211_setmode.chanflags +ffffffff82a46730 r ieee80211_rate2media.rates +ffffffff82a468c0 r ieee80211_media2rate.ieeerates +ffffffff82a47000 r Sbox +ffffffff82a49000 r ieee80211_ioctl.empty_macaddr +ffffffff82a4a000 r ieee80211_find_rxnode.zero +ffffffff82a4a008 r ieee80211_tree_RBT_INFO +ffffffff82a4a020 R ieee80211_tree_RBT_TYPE +ffffffff82a4a028 r ieee80211_ess_tree_RBT_INFO +ffffffff82a4a040 R ieee80211_ess_tree_RBT_TYPE +ffffffff82a4a048 r ieee80211_do_slow_print.merge_print_intvl +ffffffff82a4b020 R ieee80211_edca_table +ffffffff82a4b0e0 R ieee80211_qap_edca_table +ffffffff82a4c000 R ieee80211_mgt_subtype_name +ffffffff82a4c080 R ieee80211_state_name +ffffffff82a4c0b0 R ieee80211_phymode_name +ffffffff82a4d000 r ieee80211_r_ctry +ffffffff82a4dae0 r ieee80211_r_names +ffffffff82a4df80 r ieee80211_r_map +ffffffff82a4f000 R zeroin46_addr +ffffffff82a4f010 R zeroin_addr +ffffffff82a50000 R inetdomain +ffffffff82a50050 R inetsw +ffffffff82a51000 R divertctl_vars +ffffffff82a51030 R divert_usrreqs +ffffffff82a52000 R icmpctl_vars +ffffffff82a53000 R ipctl_vars_unlocked +ffffffff82a53050 R ipctl_vars +ffffffff82a53140 R inetctlerrmap +ffffffff82a54000 R rip_usrreqs +ffffffff82a55000 R tcp_timer_funcs +ffffffff82a56000 R tcp_usrreqs +ffffffff82a56090 R tcp6_usrreqs +ffffffff82a56120 R tcpctl_vars +ffffffff82a57000 R udp_usrreqs +ffffffff82a57090 R udp6_usrreqs +ffffffff82a57120 R udpctl_vars +ffffffff82a58000 R gre_usrreqs +ffffffff82a59000 r ipsec_ids_tree_RBT_INFO +ffffffff82a59018 R ipsec_ids_tree_RBT_TYPE +ffffffff82a59020 r ipsec_ids_flows_RBT_INFO +ffffffff82a59038 R ipsec_ids_flows_RBT_TYPE +ffffffff82a59040 R xformsw +ffffffff82a59158 R xformswNXFORMSW +ffffffff82a5a000 R espctl_vars +ffffffff82a5a050 R ahctl_vars +ffffffff82a5a070 R ipcompctl_vars +ffffffff82a5a090 R ipsecctl_vars +ffffffff82a5b000 R ipseczeroes +ffffffff82a5c000 r carp_set_state.carp_states +ffffffff82a5d000 r Rcon +ffffffff82a5e000 r Te2 +ffffffff82a5e400 r Te3 +ffffffff82a5e800 r Te0 +ffffffff82a5ec00 r Te1 +ffffffff82a5f000 r rcon +ffffffff82a5f030 r Td0 +ffffffff82a5f430 r Td1 +ffffffff82a5f830 r Td2 +ffffffff82a5fc30 r Td3 +ffffffff82a60030 r Td4 +ffffffff82a62000 r K256 +ffffffff82a62100 r sha512_initial_hash_value +ffffffff82a62140 r K512 +ffffffff82a623c0 r sha384_initial_hash_value +ffffffff82a63000 r Blowfish_initstate.initstate +ffffffff82a65000 r cast_sbox1 +ffffffff82a65400 r cast_sbox2 +ffffffff82a65800 r cast_sbox3 +ffffffff82a65c00 r cast_sbox4 +ffffffff82a66000 r cast_sbox5 +ffffffff82a66400 r cast_sbox6 +ffffffff82a66800 r cast_sbox7 +ffffffff82a66c00 r cast_sbox8 +ffffffff82a67000 r des_SPtrans +ffffffff82a68000 r des_skb +ffffffff82a68800 r odd_parity +ffffffff82a69000 R hmac_ipad_buffer +ffffffff82a69080 R hmac_opad_buffer +ffffffff82a6a000 R enc_xform_3des +ffffffff82a6a040 R enc_xform_blf +ffffffff82a6a080 R enc_xform_cast5 +ffffffff82a6a0c0 R enc_xform_aes +ffffffff82a6a100 R enc_xform_aes_ctr +ffffffff82a6a140 R enc_xform_aes_gcm +ffffffff82a6a180 R enc_xform_aes_gmac +ffffffff82a6a1c0 R enc_xform_aes_xts +ffffffff82a6a200 R enc_xform_chacha20_poly1305 +ffffffff82a6a240 R enc_xform_null +ffffffff82a6a280 R auth_hash_hmac_md5_96 +ffffffff82a6a2c8 R auth_hash_hmac_sha1_96 +ffffffff82a6a310 R auth_hash_hmac_ripemd_160_96 +ffffffff82a6a358 R auth_hash_hmac_sha2_256_128 +ffffffff82a6a3a0 R auth_hash_hmac_sha2_384_192 +ffffffff82a6a3e8 R auth_hash_hmac_sha2_512_256 +ffffffff82a6a430 R auth_hash_gmac_aes_128 +ffffffff82a6a478 R auth_hash_gmac_aes_192 +ffffffff82a6a4c0 R auth_hash_gmac_aes_256 +ffffffff82a6a508 R auth_hash_chacha20_poly1305 +ffffffff82a6a550 R comp_algo_deflate +ffffffff82a6b000 r IV +ffffffff82a6c000 r idgen32_ftable +ffffffff82a6d000 r Chacha20_Poly1305_Update.zeroes +ffffffff82a6d010 r pad0 +ffffffff82a6e000 r null_point +ffffffff82a6e020 r base_point +ffffffff82a6f000 R mplsdomain +ffffffff82a70000 R mplsctl_vars +ffffffff82a71000 r nfs_nodetree_RBT_INFO +ffffffff82a71018 R nfs_nodetree_RBT_TYPE +ffffffff82a72000 r nfsread_filtops +ffffffff82a72030 r nfswrite_filtops +ffffffff82a72060 r nfsvnode_filtops +ffffffff82a73000 r nfs_ptimers +ffffffff82a74000 R nfsv2_type +ffffffff82a74030 R nfsv3_type +ffffffff82a74060 R nv2tov_type +ffffffff82a74080 R nv3tov_type +ffffffff82a740a0 R nfsv3_procid +ffffffff82a74100 R nfsv2_procid +ffffffff82a74160 r nfsrv_v3errmap +ffffffff82a74210 r nfsrv_v2errmap +ffffffff82a74256 r nfsv3err_null +ffffffff82a7425a r nfsv3err_getattr +ffffffff82a74270 r nfsv3err_setattr +ffffffff82a74290 r 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ffs_vfsops +ffffffff82a7a070 R sbtry +ffffffff82a7a080 R ffs_vars +ffffffff82a7b000 R ffs_vops +ffffffff82a7b110 R ffs_specvops +ffffffff82a7b220 R ffs_fifovops +ffffffff82a7c000 R mfs_vfsops +ffffffff82a7d000 R mfs_vops +ffffffff82a7e000 r quotatypes +ffffffff82a7f000 R ufsread_filtops +ffffffff82a7f030 R ufswrite_filtops +ffffffff82a7f060 R ufsvnode_filtops +ffffffff82a81000 R ext2fs_vfsops +ffffffff82a81070 r incompat +ffffffff82a82000 R ext2fs_vops +ffffffff82a82110 R ext2fs_specvops +ffffffff82a82220 R ext2fs_fifovops +ffffffff82a83000 R uaddr_kernel_functions +ffffffff82a83030 R uaddr_rnd_functions +ffffffff82a83060 R uaddr_bestfit_functions +ffffffff82a83090 R uaddr_pivot_functions +ffffffff82a830c0 R uaddr_stack_brk_functions +ffffffff82a830f0 r uaddr_free_rbtree_RBT_INFO +ffffffff82a83108 R uaddr_free_rbtree_RBT_TYPE +ffffffff82a84000 R aobj_pager +ffffffff82a85000 R uvm_deviceops +ffffffff82a86000 R kv_any +ffffffff82a86018 R kv_intrsafe +ffffffff82a86030 R kv_page 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rdac_mpath_ops +ffffffff82ae2000 R emc_ca +ffffffff82ae2028 R emc_mpath_ops +ffffffff82ae3000 R hds_ca +ffffffff82ae3028 R hds_mpath_ops +ffffffff82ae4000 R atapiscsi_ca +ffffffff82ae4028 r atapiscsi_switch +ffffffff82ae5000 R wd_ca +ffffffff82ae6000 R atascsi_switch +ffffffff82ae7000 R mainbus_ca +ffffffff82ae8000 R bios_ca +ffffffff82ae9000 R mpbios_ca +ffffffff82ae9030 r loc_where +ffffffff82aea000 R mpbios_icu_table +ffffffff82aeb000 R cpu_ca +ffffffff82aec000 R lapic_timer_intrclock +ffffffff82aed000 R ioapic_ca +ffffffff82aee000 R efifb_ca +ffffffff82aee028 R efifb_screen_list +ffffffff82aef000 R pvbus_ca +ffffffff82af0000 R pvclock_ca +ffffffff82af1000 R vmt_ca +ffffffff82af2000 R xen_ca +ffffffff82af3000 R xs_errors +ffffffff82af4000 R xnf_ca +ffffffff82af5000 R xbf_ca +ffffffff82af5028 R xbf_switch +ffffffff82af6000 R hyperv_ca +ffffffff82af6028 R hv_guid_network +ffffffff82af6038 R hv_guid_ide +ffffffff82af6048 R hv_guid_scsi +ffffffff82af6058 R hv_guid_shutdown +ffffffff82af6068 R hv_guid_timesync +ffffffff82af6078 R hv_guid_heartbeat +ffffffff82af6088 R hv_guid_kvp +ffffffff82af7000 r kvp_pools +ffffffff82af8000 R hvn_ca +ffffffff82af9000 R hvs_ca +ffffffff82af9028 R hvs_switch +ffffffff82afa000 r virtio_device_name +ffffffff82afb000 R vio_ca +ffffffff82afb030 r virtio_net_feature_names +ffffffff82afc000 R vioblk_ca +ffffffff82afc028 R vioblk_switch +ffffffff82afd000 R viomb_ca +ffffffff82afd030 r viomb_feature_names +ffffffff82afe000 R viornd_ca +ffffffff82aff000 R vioscsi_ca +ffffffff82aff028 R vioscsi_switch +ffffffff82aff050 R vioscsi_vq_names +ffffffff82b00000 R vmmci_ca +ffffffff82b01000 R pci_ca +ffffffff82b02000 r pci_quirks +ffffffff82b03000 R pci_subclass_prehistoric +ffffffff82b03050 R pci_subclass_mass_storage +ffffffff82b03160 R pci_subclass_network +ffffffff82b03250 R pci_subclass_display +ffffffff82b032d0 R pci_subclass_multimedia +ffffffff82b03360 R pci_subclass_memory +ffffffff82b033c0 R pci_subclass_bridge +ffffffff82b03510 R pci_subclass_communications +ffffffff82b035d0 R pci_subclass_system +ffffffff82b036c0 R pci_subclass_input +ffffffff82b03770 R pci_subclass_dock +ffffffff82b037c0 R pci_subclass_processor +ffffffff82b03880 R pci_subclass_serialbus +ffffffff82b03990 R pci_subclass_wireless +ffffffff82b03a70 R pci_subclass_i2o +ffffffff82b03aa0 R pci_subclass_satcom +ffffffff82b03b20 R pci_subclass_crypto +ffffffff82b03b80 R pci_subclass_dasp +ffffffff82b03c10 R pci_class +ffffffff82b03e20 r pci_known_vendors +ffffffff82b05410 r pci_known_products +ffffffff82b29000 R vga_pci_ca +ffffffff82b29030 r vga_devs +ffffffff82b2a000 R ahc_pci_ident_table +ffffffff82b2a5d0 R ahc_pci_ca +ffffffff82b2b000 R ahd_pci_ident_table +ffffffff82b2b198 R ahd_num_pci_devs +ffffffff82b2b1a0 R ahd_pci_ca +ffffffff82b2b1d0 r pci_bus_modes +ffffffff82b2b210 r pci_status_strings +ffffffff82b2b250 r pci_status_source +ffffffff82b2b290 r split_status_strings +ffffffff82b2c000 R adw_pci_ca +ffffffff82b2c028 R adw_pci_devices +ffffffff82b2d000 r adw_3550_Default_EEPROM +ffffffff82b2d080 r adw_38C0800_Default_EEPROM +ffffffff82b2d100 r adw_38C1600_Default_EEPROM +ffffffff82b2e000 R adw_asc3550_mcode +ffffffff82b2f3a0 R adw_asc3550_mcode_data +ffffffff82b2f3b0 R adw_asc38C0800_mcode +ffffffff82b30888 R adw_asc38C0800_mcode_data +ffffffff82b308a0 R adw_asc38C1600_mcode +ffffffff82b32160 R adw_asc38C1600_mcode_data +ffffffff82b33000 R twe_pci_ca +ffffffff82b33028 R twe_pci_devices +ffffffff82b34000 R arc_ca +ffffffff82b34028 R arc_switch +ffffffff82b34050 r arc_devices +ffffffff82b34190 r arc_intel +ffffffff82b34198 r arc_marvell +ffffffff82b341a0 r arc_lsi +ffffffff82b341a8 r arc_marvell2 +ffffffff82b35000 R jmb_ca +ffffffff82b35030 r jmb_devices +ffffffff82b36000 R ahci_pci_ca +ffffffff82b36028 R ahci_jmb_ca +ffffffff82b36050 r ahci_devices +ffffffff82b37000 R nvme_pci_ca +ffffffff82b37028 r nvme_msi_blacklist +ffffffff82b38000 R ami_pci_ca +ffffffff82b38030 r ami_pci_subsys +ffffffff82b38270 r ami_pci_vendors +ffffffff82b39000 R mfi_pci_ca +ffffffff82b39030 r mfi_pci_devices +ffffffff82b3a000 R mfii_ca +ffffffff82b3a028 R mfii_switch +ffffffff82b3a050 R mfii_pd_switch +ffffffff82b3a078 R mfii_iop_thunderbolt +ffffffff82b3a088 R mfii_iop_25 +ffffffff82b3a098 R mfii_iop_35 +ffffffff82b3a0b0 R mfii_devices +ffffffff82b3a180 r mfi_bbu_indicators +ffffffff82b3b000 R ips_ca +ffffffff82b3b028 r ips_ids +ffffffff82b3b040 r ips_chips +ffffffff82b3b090 r ips_names +ffffffff82b3b128 r ips_switch +ffffffff82b3b150 r ips_pt_switch +ffffffff82b3c000 R eap_ca +ffffffff82b3c028 R eap1370_hw_if +ffffffff82b3c0e0 R eap1371_hw_if +ffffffff82b3c198 R eap_midi_hw_if +ffffffff82b3c1d0 R eap_devices +ffffffff82b3d000 R auacer_pci_devices +ffffffff82b3d008 R auacer_ca +ffffffff82b3d030 R auacer_hw_if +ffffffff82b3e000 R auich_ca +ffffffff82b3e028 R auich_hw_if +ffffffff82b3e0e0 r auich_devices +ffffffff82b3f000 R azalia_ca +ffffffff82b3f028 R azalia_hw_if +ffffffff82b3f0e0 R azalia_pci_devices +ffffffff82b3f120 r pin_devices +ffffffff82b3f1a0 r line_colors +ffffffff82b3f220 r wtypes +ffffffff82b40000 r azalia_codec_init_dolby_atmos.atmos_init +ffffffff82b40050 r azalia_codec_init_dolby_atmos.atmos_v23_v25 +ffffffff82b41000 R envy_ca +ffffffff82b41028 R envy_hw_if +ffffffff82b410e0 R envy_midi_hw_if +ffffffff82b42000 R emuxki_devices +ffffffff82b42010 R emu_ca +ffffffff82b42038 R emuxki_hw_if +ffffffff82b420f0 r emuxki_recbuf_sz +ffffffff82b42170 r emuxki_recsrc_szreg +ffffffff82b4217c r emuxki_recsrc_bufaddrreg +ffffffff82b42190 r emuxki_rate_to_pitch.logMagTable +ffffffff82b42390 r emuxki_rate_to_pitch.logSlopeTable +ffffffff82b43000 R auixp_pci_devices +ffffffff82b43010 R auixp_ca +ffffffff82b43038 R auixp_hw_if +ffffffff82b44000 R clcs_ca +ffffffff82b44028 R cs4280_hw_if +ffffffff82b440e0 R cs4280_devices +ffffffff82b45000 R yds_ca +ffffffff82b45028 r yds_hw_if +ffffffff82b450e0 r yds_chip_capability_list +ffffffff82b45120 r yds_get_lpfk.lpfkt +ffffffff82b45160 r yds_get_lpfq.lpfqt +ffffffff82b46000 R auvia_ca +ffffffff82b46028 R auvia_hw_if +ffffffff82b460e0 R auvia_devices +ffffffff82b460f0 r auvia_set_params_sub.slottab +ffffffff82b47000 R gdt_pci_ca +ffffffff82b48000 R ciss_pci_ca +ffffffff82b48030 R ciss_pci_devices +ffffffff82b49000 R qlw_pci_ca +ffffffff82b49030 r qlw_devices +ffffffff82b49050 r isp_1040_risc_code +ffffffff82b4e9f0 r isp_1080_risc_code +ffffffff82b56470 r isp_12160_risc_code +ffffffff82b5e000 R qla_pci_ca +ffffffff82b5e030 r qla_devices +ffffffff82b5f000 R qle_ca +ffffffff82b5f028 R qle_switch +ffffffff82b5f050 r qle_devices +ffffffff82b5f070 r isp_2400_risc_code +ffffffff82b8ea50 r isp_2500_risc_code +ffffffff82bc1000 R mpi_pci_ca +ffffffff82bc1030 r mpi_devices +ffffffff82bc2000 R mpii_ca +ffffffff82bc2028 R mpii_switch +ffffffff82bc2050 r mpii_devices +ffffffff82bc3000 R sili_pci_ca +ffffffff82bc3030 r sili_devices +ffffffff82bc4000 R aq_devices +ffffffff82bc4060 R aq_products +ffffffff82bc41d0 R aq_fw1x_ops +ffffffff82bc41f8 R aq_fw2x_ops +ffffffff82bc4220 R aq2_fw_ops +ffffffff82bc4248 R aq_ca +ffffffff82bc5000 R de_ca +ffffffff82bc5030 r tulip_srom_conninfo +ffffffff82bc5120 r tulip_mii_phy_attrlist +ffffffff82bc51e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff82bc5208 r tulip_21040_10baset_only_boardsw +ffffffff82bc5230 r tulip_21040_boardsw +ffffffff82bc5258 r tulip_2114x_isv_boardsw +ffffffff82bc5280 r tulip_21140_smc9332_boardsw +ffffffff82bc52a8 r tulip_21040_auibnc_only_boardsw +ffffffff82bc52d0 r tulip_21140_cogent_em100_boardsw +ffffffff82bc52f8 r tulip_21140_accton_boardsw +ffffffff82bc5320 r tulip_21140_eb_boardsw +ffffffff82bc5348 r tulip_21041_boardsw +ffffffff82bc5370 r tulip_read_macaddr.testpat +ffffffff82bc5380 r tulip_vendors +ffffffff82bc5430 r tulip_media_to_ifmedia +ffffffff82bc5490 r tulip_chipdescs +ffffffff82bc6000 R ep_pci_ca +ffffffff82bc6030 R ep_pci_devices +ffffffff82bc7000 R pcn_ca +ffffffff82bc7028 R pcn_devices +ffffffff82bc7030 r pcn_79c970_rcvfw +ffffffff82bc7050 r pcn_79c970_xmtsp +ffffffff82bc7070 r pcn_79c970_xmtfw +ffffffff82bc7090 r pcn_79c971_rcvfw +ffffffff82bc70b0 r pcn_79c971_xmtsp_sram +ffffffff82bc70d0 r pcn_79c971_xmtsp +ffffffff82bc70f0 r pcn_79c971_xmtfw +ffffffff82bc7110 r pcn_variants +ffffffff82bc8000 R siop_products +ffffffff82bc9000 R siop_pci_ca +ffffffff82bca000 R rdcide_setup +ffffffff82bca005 R rdcide_hold +ffffffff82bca00a R rdcide_udmatim +ffffffff82bca010 R rdcide_udmaclk +ffffffff82bca028 R default_product_desc +ffffffff82bca040 R pciide_intel_products +ffffffff82bca630 R pciide_amd_products +ffffffff82bca690 R pciide_cmd_products +ffffffff82bca730 R pciide_via_products +ffffffff82bca810 R pciide_cypress_products +ffffffff82bca820 R pciide_sis_products +ffffffff82bca870 R pciide_natsemi_products +ffffffff82bca890 R pciide_acer_products +ffffffff82bca8a0 R pciide_triones_products +ffffffff82bca8f0 R pciide_promise_products +ffffffff82bcaac0 R pciide_acard_products +ffffffff82bcab10 R pciide_serverworks_products +ffffffff82bcabb0 R pciide_nvidia_products +ffffffff82bcae80 R pciide_ite_products +ffffffff82bcaea0 R pciide_ati_products +ffffffff82bcaf20 R pciide_jmicron_products +ffffffff82bcaf70 R pciide_phison_products +ffffffff82bcaf80 R pciide_rdc_products +ffffffff82bcaf90 R pciide_vendors +ffffffff82bcb140 R pciide_pci_ca +ffffffff82bcb168 R pciide_jmb_ca +ffffffff82bcb190 r piix_isp_dma +ffffffff82bcb193 r piix_rtc_dma +ffffffff82bcb196 r apollo_pio_set +ffffffff82bcb19b r cmd0643_9_data_tim_pio +ffffffff82bcb1a0 r cmd0643_9_data_tim_dma +ffffffff82bcb1a3 r cmd680_channel_map.init_val +ffffffff82bcb1b1 r cmd680_setup_channel.udma2_tbl +ffffffff82bcb1b8 r cmd680_setup_channel.dma_tbl +ffffffff82bcb1be r cmd680_setup_channel.pio_tbl +ffffffff82bcb1d0 r satalink_ba5_regmap +ffffffff82bcb690 r sii3114_chansetup.channel_names +ffffffff82bcb6b0 r cy_pio_pulse +ffffffff82bcb6c0 r sis_udma133new_tim +ffffffff82bcb6e0 r sis_pio133new_tim +ffffffff82bcb6f4 r sis_dma133new_tim +ffffffff82bcb700 r sis_udma66_tim +ffffffff82bcb706 r sis_udma100new_tim +ffffffff82bcb70c r sis_udma133old_tim +ffffffff82bcb713 r sis_pio_act +ffffffff82bcb718 r sis_pio_rec +ffffffff82bcb71d r natsemi_pio_pulse +ffffffff82bcb722 r natsemi_pio_recover +ffffffff82bcb727 r natsemi_dma_pulse +ffffffff82bcb72a r natsemi_dma_recover +ffffffff82bcb730 r scx200_udma33 +ffffffff82bcb73c r scx200_dma33 +ffffffff82bcb750 r scx200_pio33 +ffffffff82bcb778 r acer_udma +ffffffff82bcb77e r acer_pio +ffffffff82bcb790 r hpt370_pio +ffffffff82bcb7a4 r hpt370_dma +ffffffff82bcb7b0 r hpt370_udma +ffffffff82bcb7d0 r hpt372_pio +ffffffff82bcb7e4 r hpt372_dma +ffffffff82bcb7f0 r hpt372_udma +ffffffff82bcb80c r hpt366_dma +ffffffff82bcb820 r hpt366_udma +ffffffff82bcb840 r hpt374_pio +ffffffff82bcb854 r hpt374_dma +ffffffff82bcb860 r hpt374_udma +ffffffff82bcb87c r pdc2xx_pa +ffffffff82bcb881 r pdc2xx_pb +ffffffff82bcb886 r pdc2xx_dma_mb +ffffffff82bcb889 r pdc2xx_dma_mc +ffffffff82bcb88c r pdc2xx_udma_mc +ffffffff82bcb892 r acard_act_udma +ffffffff82bcb899 r acard_rec_udma +ffffffff82bcb8a0 r acard_udma_conf +ffffffff82bcb8a7 r acard_act_dma +ffffffff82bcb8aa r acard_rec_dma +ffffffff82bcb8ad r acard_act_pio +ffffffff82bcb8b2 r acard_rec_pio +ffffffff82bcb8b7 r nforce_udma +ffffffff82bcb8be r nforce_pio +ffffffff82bcb8c3 r ixp_mdma_timings +ffffffff82bcb8c6 r ixp_pio_timings +ffffffff82bcc000 R ppb_ca +ffffffff82bcd000 R cy_pci_ca +ffffffff82bcd030 R cy_pci_devices +ffffffff82bce000 R rl_pci_ca +ffffffff82bce030 R rl_pci_devices +ffffffff82bcf000 R re_pci_devices +ffffffff82bcf030 R re_pci_ca +ffffffff82bd0000 R vr_ca +ffffffff82bd1000 R txp_ca +ffffffff82bd1030 R txp_devices +ffffffff82bd2000 r cards +ffffffff82bd3000 r format_params +ffffffff82bd31a0 r pixfmt_table +ffffffff82bd3320 r meteor_pixfmt_table +ffffffff82bd4000 R bktr_ca +ffffffff82bd4028 R bktr_hw_if +ffffffff82bd5000 r tuners +ffffffff82bd5170 r freqTable +ffffffff82bd5260 r nabcst +ffffffff82bd52a0 r irccable +ffffffff82bd5310 r hrccable +ffffffff82bd5380 r weurope +ffffffff82bd5420 r jpnbcst +ffffffff82bd5460 r jpncable +ffffffff82bd54c0 r xussr +ffffffff82bd5530 r australia +ffffffff82bd5590 r france +ffffffff82bd6000 R xl_pci_ca +ffffffff82bd6030 R xl_pci_devices +ffffffff82bd7000 R fxp_pci_ca +ffffffff82bd7030 R fxp_pci_devices +ffffffff82bd8000 R em_devices +ffffffff82bd8308 R em_ca +ffffffff82bd8330 r em_counters +ffffffff82bd9000 r em_igp_cable_length_table +ffffffff82bd9100 r em_igp_2_cable_length_table +ffffffff82bda000 R ixgb_devices +ffffffff82bda010 R ixgb_ca +ffffffff82bdb000 R ixgbe_devices +ffffffff82bdb0b8 R ix_ca +ffffffff82bdb0e0 r ix_counters +ffffffff82bdb3e0 r ix_rxq_kstats_tpl +ffffffff82bdb458 r ix_txq_kstats_tpl +ffffffff82bdc000 r ixgbe_mvals_base +ffffffff82bdc060 r ixgbe_mvals_X540 +ffffffff82bdc0c0 r ixgbe_mvals_X550 +ffffffff82bdc120 r ixgbe_mvals_X550EM_x +ffffffff82bdc180 r ixgbe_mvals_X550EM_a +ffffffff82bdf000 R ixl_ca +ffffffff82bdf030 R ixl_port_counters +ffffffff82bdf2c0 R ixl_vsi_counters +ffffffff82bdf380 r ixl_devices +ffffffff82bdf4c0 r ixl_710 +ffffffff82bdf4e8 r ixl_722 +ffffffff82bdf510 r ixl_pf_aq_regs +ffffffff82bdf578 r ixl_710_decrepit +ffffffff82bdf5a0 r ixl_phy_type_map +ffffffff82bdf770 r ixl_speed_type_map +ffffffff82bdf7b0 r ixl_hmc_pack_rxq +ffffffff82bdf830 r ixl_hmc_pack_txq +ffffffff82bdf8a0 r ixl_sfp_ops +ffffffff82bdf8b8 r ixl_qsfp_ops +ffffffff82be0000 r dwqe_pci_devices +ffffffff82be0018 R dwqe_pci_ca +ffffffff82be1000 R xge_ca +ffffffff82be1028 R xge_devices +ffffffff82be1030 r xge_fix_mac +ffffffff82be1110 r xge_xena_dtx_cfg +ffffffff82be1170 r xge_herc_dtx_cfg +ffffffff82be2000 R thtc_ca +ffffffff82be2028 R tht_ca +ffffffff82be2050 r thtc_devices +ffffffff82be2068 r tht_link_state.interval +ffffffff82be3000 R myx_ca +ffffffff82be3028 R myx_devices +ffffffff82be4000 R oce_ca +ffffffff82be4030 R oce_devices +ffffffff82be5000 R dc_pci_ca +ffffffff82be6000 R epic_pci_ca +ffffffff82be6028 R epic_pci_devices +ffffffff82be7000 R ti_pci_ca +ffffffff82be7030 R ti_devices +ffffffff82be8000 R ne_pci_ca +ffffffff82be8030 R ne_pci_prod +ffffffff82be9000 R gem_pci_ca +ffffffff82be9030 R gem_pci_devices +ffffffff82be9050 r gem_promhdr +ffffffff82be9052 r gem_promdat +ffffffff82be905a r gem_promdat2 +ffffffff82bea000 R cas_ca +ffffffff82bea028 R cas_pci_devices +ffffffff82bea030 r cas_promhdr +ffffffff82bea032 r cas_promdat_sun +ffffffff82bea03a r cas_promdat_ns +ffffffff82bea042 r cas_promdat2 +ffffffff82beb000 R sf_pci_ca +ffffffff82beb028 R sf_pci_products +ffffffff82bec000 R sis_ca +ffffffff82bec028 R sis_devices +ffffffff82bed000 R se_devices +ffffffff82bed008 R se_ca +ffffffff82bee000 R mbg_ca +ffffffff82bee030 R mbg_devices +ffffffff82bef000 R uhci_pci_ca +ffffffff82bf0000 R ohci_pci_ca +ffffffff82bf1000 R ehci_pci_ca +ffffffff82bf2000 R xhci_pci_ca +ffffffff82bf3000 R cbb_pci_ca +ffffffff82bf3028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff82bf4000 R skc_devices +ffffffff82bf4030 R skc_ca +ffffffff82bf4058 R sk_ca +ffffffff82bf5000 R mskc_devices +ffffffff82bf50a8 R mskc_ca +ffffffff82bf50d0 R msk_ca +ffffffff82bf5100 r msk_mib +ffffffff82bf6000 R puc_pci_ca +ffffffff82bf7000 R puc_devs +ffffffff82bfc000 R com_puc_ca +ffffffff82bfc030 r puc_port_types +ffffffff82bfd000 R lpt_puc_ca +ffffffff82bfe000 R wi_pci_ca +ffffffff82bfe030 r wi_pci_products +ffffffff82bff000 R an_pci_ca +ffffffff82bff030 R an_pci_devices +ffffffff82c00000 R iwi_devices +ffffffff82c00010 R iwi_ca +ffffffff82c01000 R wpi_ca +ffffffff82c01028 r wpi_devices +ffffffff82c01030 r wpi_rates +ffffffff82c01050 r wpi_rf_gain_5ghz +ffffffff82c010a0 r wpi_dsp_gain_5ghz +ffffffff82c010f0 r wpi_rf_gain_2ghz +ffffffff82c01140 r wpi_dsp_gain_2ghz +ffffffff82c01190 r wpi_pmgt +ffffffff82c01310 r wpi_bands +ffffffff82c02000 R iwn_mcs2ridx +ffffffff82c02020 R iwn_ca +ffffffff82c02050 r iwn_devices +ffffffff82c020e8 r iwn4965_sensitivity_limits +ffffffff82c02124 r iwn5000_sensitivity_limits +ffffffff82c02160 r iwn5150_sensitivity_limits +ffffffff82c0219c r iwn1000_sensitivity_limits +ffffffff82c021d8 r iwn6000_sensitivity_limits +ffffffff82c02214 r iwn2000_sensitivity_limits +ffffffff82c02250 r iwn_fw_errmsg +ffffffff82c02340 r iwn4965_set_txpower.tdiv +ffffffff82c02360 r iwn4965_rf_gain_5ghz +ffffffff82c023d0 r iwn4965_dsp_gain_5ghz +ffffffff82c02440 r iwn4965_dsp_gain_2ghz +ffffffff82c024b0 r iwn_pmgt +ffffffff82c026f0 r iwn4965_post_alive.qid2fifo +ffffffff82c02700 r iwn_bands +ffffffff82c02770 r iwn_rates +ffffffff82c02820 r iwn4965_rf_gain_2ghz +ffffffff82c03000 R iwm_nvm_channels +ffffffff82c03030 R iwm_nvm_channels_8000 +ffffffff82c03070 R iwm_rates +ffffffff82c030d0 R iwm_ht_mcs2ridx +ffffffff82c03110 R iwm_tid_to_ac +ffffffff82c03118 R iwm_ac_to_tx_fifo +ffffffff82c03120 R iwm_nvm_to_read +ffffffff82c03144 r iwm_set_hw_address_8000.reserved_mac +ffffffff82c03180 r iwm_sf_full_timeout +ffffffff82c031b0 r iwm_sf_full_timeout_def +ffffffff82c031e0 r advanced_lookup +ffffffff82c03320 r iwm_devices +ffffffff82c03360 R iwm_ca +ffffffff82c04000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff82c04020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff82c04040 R iwx_qu_b0_hr1_b0 +ffffffff82c04060 R iwx_qu_b0_hr_b0 +ffffffff82c04080 R iwx_ax201_cfg_qu_hr +ffffffff82c040a0 R iwx_qu_c0_hr1_b0 +ffffffff82c040c0 R iwx_qu_c0_hr_b0 +ffffffff82c040e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff82c04100 R iwx_quz_a0_hr1_b0 +ffffffff82c04120 R iwx_ax201_cfg_quz_hr +ffffffff82c04140 R iwx_cfg_so_a0_hr_b0 +ffffffff82c04160 R iwx_cfg_quz_a0_hr_b0 +ffffffff82c04180 R iwx_2ax_cfg_so_gf_a0 +ffffffff82c041a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff82c041c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff82c041e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff82c04200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff82c04220 R iwx_2ax_cfg_so_jf_b0 +ffffffff82c04240 R iwx_nvm_channels_8000 +ffffffff82c04280 R iwx_rates +ffffffff82c042e0 R iwx_mcs2ridx +ffffffff82c04320 R iwx_tid_to_ac +ffffffff82c04328 R iwx_ac_to_tx_fifo +ffffffff82c04330 r iwx_nvm_channels_uhb +ffffffff82c0439e r iwx_is_valid_mac_addr.reserved_mac +ffffffff82c043b0 r iwx_sf_full_timeout +ffffffff82c043e0 r iwx_sf_full_timeout_def +ffffffff82c04410 r advanced_lookup +ffffffff82c04550 r iwx_devices +ffffffff82c04590 r iwx_dev_info_table +ffffffff82c04e18 R iwx_ca +ffffffff82c05000 R qwx_pci_ca +ffffffff82c05028 r qwx_pci_devices +ffffffff82c05030 R qwx_msi_config_one_msi +ffffffff82c05050 R qwx_msi_config +ffffffff82c050c8 r qwx_pci_ops_qca6390 +ffffffff82c050f8 r qwx_pci_ops_qcn9074 +ffffffff82c06000 R cmpci_ca +ffffffff82c06028 R cmpci_hw_if +ffffffff82c060e0 r cmpci_rate_table +ffffffff82c06120 R cmpci_devices +ffffffff82c06130 r cmpci_query_devinfo.mixer_port_names +ffffffff82c06160 r cmpci_query_devinfo.mixer_classes +ffffffff82c07000 R iha_pci_ca +ffffffff82c07028 R iha_switch +ffffffff82c08000 R pcscp_ca +ffffffff82c09000 R bge_ca +ffffffff82c09030 R bge_devices +ffffffff82c091b0 r bge_revisions +ffffffff82c09610 r bge_majorrevs +ffffffff82c09790 r bge_kstat_tpl +ffffffff82c0a000 R bnx_devices +ffffffff82c0a020 R bnx_ca +ffffffff82c0b000 R vge_ca +ffffffff82c0b028 R vge_devices +ffffffff82c0c000 R stge_ca +ffffffff82c0c028 R stge_mii_bitbang_ops +ffffffff82c0c050 R stge_devices +ffffffff82c0d000 R nfe_ca +ffffffff82c0d030 R nfe_devices +ffffffff82c0e000 R et_devices +ffffffff82c0e008 R et_ca +ffffffff82c0f000 R jme_devices +ffffffff82c0f008 R jme_ca +ffffffff82c10000 R age_devices +ffffffff82c10008 R age_ca +ffffffff82c11000 R alc_devices +ffffffff82c11038 R alc_ca +ffffffff82c12000 R ale_devices +ffffffff82c12008 R ale_ca +ffffffff82c13000 R amdpm_ca +ffffffff82c13030 R amdpm_ids +ffffffff82c14000 R bce_ca +ffffffff82c14028 R bce_devices +ffffffff82c15000 R ath_pci_ca +ffffffff82c16000 R athn_pci_ca +ffffffff82c16030 r athn_pci_devices +ffffffff82c17000 R atw_pci_ca +ffffffff82c17028 R atw_pci_devices +ffffffff82c18000 R rtw_pci_ca +ffffffff82c18030 R rtw_pci_products +ffffffff82c19000 R rtwn_pci_ca +ffffffff82c19030 r rtwn_pci_devices +ffffffff82c19040 r rtl8188eu_mac +ffffffff82c191b0 r rtl8192cu_mac +ffffffff82c19310 r rtl8192ce_mac +ffffffff82c19458 r rtl8188eu_bb_prog +ffffffff82c19480 r rtl8723a_bb_prog +ffffffff82c194a8 r rtl8192ce_bb_prog_1t +ffffffff82c194d0 r rtl8192ce_bb_prog_2t +ffffffff82c19500 r rtl8188eu_bb_regs +ffffffff82c19680 r rtl8188eu_bb_vals +ffffffff82c19980 r rtl8188eu_agc_vals +ffffffff82c19b80 r rtl8723a_bb_regs +ffffffff82c19d00 r rtl8723a_bb_vals +ffffffff82c19ff0 r rtl8192ce_agc_vals +ffffffff82c1a270 r rtl8192ce_bb_regs +ffffffff82c1a3f0 r rtl8192ce_bb_vals_1t +ffffffff82c1a6e0 r rtl8192ce_bb_vals_2t +ffffffff82c1b000 R ral_pci_ca +ffffffff82c1b030 R ral_pci_devices +ffffffff82c1c000 R acx_pci_ca +ffffffff82c1c028 R acx_pci_devices +ffffffff82c1d000 R pgt_pci_ca +ffffffff82c1d028 R pgt_pci_devices +ffffffff82c1e000 R malo_pci_ca +ffffffff82c1e028 R malo_pci_devices +ffffffff82c1f000 R bwi_pci_ca +ffffffff82c1f030 R bwi_pci_devices +ffffffff82c20000 R piixpm_ca +ffffffff82c20030 R piixpm_ids +ffffffff82c21000 R vic_ca +ffffffff82c21028 R vic_devices +ffffffff82c22000 R vmx_devices +ffffffff82c22008 R vmx_ca +ffffffff82c22030 r vmx_tx_kstat_tpl +ffffffff82c220d0 r vmx_kstat_rate +ffffffff82c220e0 r vmx_rx_kstat_tpl +ffffffff82c23000 R vmwpvs_ca +ffffffff82c23028 R vmwpvs_switch +ffffffff82c24000 R lii_ca +ffffffff82c24028 R lii_devices +ffffffff82c25000 R ichiic_ca +ffffffff82c25030 R ichiic_ids +ffffffff82c26000 R viapm_ca +ffffffff82c26030 R viapm_ids +ffffffff82c26070 r val_to_temp +ffffffff82c26870 r val_to_uV.mult +ffffffff82c27000 R amdiic_ca +ffffffff82c27028 R amdiic_ids +ffffffff82c28000 R nviic_ca +ffffffff82c28030 R nviic_ids +ffffffff82c29000 R sdhc_pci_ca +ffffffff82c2a000 R kate_ca +ffffffff82c2a030 r kate_proc +ffffffff82c2b000 R km_ca +ffffffff82c2b030 r km_devices +ffffffff82c2c000 R ksmn_ca +ffffffff82c2c030 r ksmn_devices +ffffffff82c2d000 R iosf_pci_ca +ffffffff82c2e000 R itherm_devices +ffffffff82c2e008 R itherm_ca +ffffffff82c2f000 R pchtemp_ca +ffffffff82c2f030 R pchtemp_devices +ffffffff82c30000 R rtsx_pci_ca +ffffffff82c31000 R xspd_ca +ffffffff82c31028 R xspd_devices +ffffffff82c32000 R virtio_pci_ca +ffffffff82c33000 R dwiic_pci_ca +ffffffff82c33030 R dwiic_pci_ids +ffffffff82c34000 R bwfm_pci_ca +ffffffff82c34030 r bwfm_pci_devices +ffffffff82c35000 R ccp_pci_ca +ffffffff82c35030 r ccp_pci_devices +ffffffff82c36000 R bnxt_devices +ffffffff82c36040 R bnxt_ca +ffffffff82c37000 R mcx_ca +ffffffff82c37030 r mcx_devices +ffffffff82c37060 r mcx_rss_config +ffffffff82c370d0 r mcx_eth_cap_map +ffffffff82c372d0 r mcx_ext_eth_cap_map +ffffffff82c373d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff82c373e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82c37400 r mcx_kstat_ppcnt_rfc2819 +ffffffff82c37418 r mcx_kstat_ppcnt_rfc3635 +ffffffff82c37430 r mcx_ppcnt_ieee8023_tpl +ffffffff82c375b0 r mcx_ppcnt_rfc2863_tpl +ffffffff82c376c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82c37870 r mcx_ppcnt_rfc3635_tpl +ffffffff82c379b0 r mcx_kstat_mtmp_tpl +ffffffff82c37a50 r mcx_kstat_mtmp_rate +ffffffff82c37a60 r mcx_queue_kstat_tpl +ffffffff82c38000 R iavf_ca +ffffffff82c38030 r iavf_devices +ffffffff82c38040 r iavf_aq_regs +ffffffff82c380b0 r iavf_link_speeds +ffffffff82c39000 R rge_ca +ffffffff82c39028 R rge_devices +ffffffff82c39040 r rge_phy_config_mac_cfg2_8126.mac_cfg2_a438_value +ffffffff82c39070 r rge_phy_config_mac_cfg2_8126.mac_cfg2_b87e_value +ffffffff82c390c0 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff82c390e0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff82c39140 r rtl8125_mac_cfg3_mcu +ffffffff82c399e0 r rtl8125_mac_cfg5_mcu +ffffffff82c3aa00 r rtl8126_mac_cfg2_mcu +ffffffff82c41a20 r rtl8125_mac_bps +ffffffff82c41e20 r rtl8125b_mac_bps +ffffffff82c42048 r rge_kstats_tpl +ffffffff82c43000 R igc_devices +ffffffff82c43040 R igc_ca +ffffffff82c43070 r igc_counters +ffffffff82c44000 R ngbe_devices +ffffffff82c44008 R ngbe_ca +ffffffff82c45000 R com_pci_ca +ffffffff82c45030 R com_pci_ids +ffffffff82c46000 R ufshci_pci_ca +ffffffff82c47000 r agp_attach.agp_max +ffffffff82c47048 R agp_ca +ffffffff82c48000 R intagp_ca +ffffffff82c49000 r drm_plane_create_rotation_property.props +ffffffff82c4a000 r drm_bridge_priv_state_funcs +ffffffff82c4c000 r color_encoding_name +ffffffff82c4c020 r color_range_name +ffffffff82c4d000 r drm_subpixel_enum_list +ffffffff82c4d060 r drm_dpms_enum_list +ffffffff82c4d0a0 r drm_dvi_i_select_enum_list +ffffffff82c4d0d0 r drm_dvi_i_subconnector_enum_list +ffffffff82c4d100 r drm_tv_mode_enum_list +ffffffff82c4d170 r drm_tv_select_enum_list +ffffffff82c4d1c0 r drm_tv_subconnector_enum_list +ffffffff82c4d210 r drm_dp_subconnector_enum_list +ffffffff82c4d280 r colorspace_names +ffffffff82c4d300 r drm_link_status_enum_list +ffffffff82c4d320 r drm_scaling_mode_enum_list +ffffffff82c4d360 r drm_aspect_ratio_enum_list +ffffffff82c4d390 r drm_content_type_enum_list +ffffffff82c4d3e0 r drm_panel_orientation_enum_list +ffffffff82c4d420 r privacy_screen_enum +ffffffff82c4e000 r drm_crtc_fence_ops +ffffffff82c4f000 r drm_dmt_modes +ffffffff82c51940 r edid_cea_modes_1 +ffffffff82c554d0 r edid_cea_modes_193 +ffffffff82c56180 r edid_quirk_list +ffffffff82c56360 r drm_mode_do_interlace_quirk.cea_interlaced +ffffffff82c563a0 r edid_4k_modes +ffffffff82c56600 r edid_est_modes +ffffffff82c56e00 r est3_modes +ffffffff82c56f60 r stereo_mandatory_modes +ffffffff82c56fe0 r extra_modes +ffffffff82c58000 r drm_encoder_enum_list +ffffffff82c5a000 r drm_fbdev_dma_helper_funcs +ffffffff82c5a010 r drm_fbdev_dma_client_funcs +ffffffff82c5a030 r drm_fbdev_dma_fb_ops +ffffffff82c5b000 r drm_fbdev_generic_helper_funcs +ffffffff82c5b010 r drm_fbdev_generic_client_funcs +ffffffff82c5b030 r drm_fbdev_generic_fb_ops +ffffffff82c5d000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82c5d004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82c5d008 r drm_fb_xrgb8888_to_xrgb1555.dst_pixsize +ffffffff82c5d00c r drm_fb_xrgb8888_to_argb1555.dst_pixsize +ffffffff82c5d010 r drm_fb_xrgb8888_to_rgba5551.dst_pixsize +ffffffff82c5d014 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff82c5d018 r drm_fb_xrgb8888_to_argb8888.dst_pixsize +ffffffff82c5d01c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82c5d020 r drm_fb_xrgb8888_to_argb2101010.dst_pixsize +ffffffff82c5d024 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82c5d028 r drm_fb_xrgb8888_to_xbgr8888.dst_pixsize +ffffffff82c5d02c r drm_fb_xrgb8888_to_abgr8888.dst_pixsize +ffffffff82c5e000 r __drm_format_info.formats +ffffffff82c5f000 R drm_pgops +ffffffff82c60000 r drm_gem_dma_default_funcs +ffffffff82c61000 R drm_gem_fb_funcs +ffffffff82c62000 r drm_ioctls +ffffffff82c64000 r dma_fence_stub_ops +ffffffff82c64040 R dma_fence_array_ops +ffffffff82c64080 R dma_fence_chain_ops +ffffffff82c640c0 R dmabufops +ffffffff82c640f8 R syncfileops +ffffffff82c65000 r drm_plane_type_enum_list +ffffffff82c66000 r tv_modes_parameters +ffffffff82c660c0 r drm_mode_status_names +ffffffff82c66200 r drm_named_modes +ffffffff82c67000 r primary_plane_funcs +ffffffff82c67068 r safe_modeset_formats +ffffffff82c68000 r orientation_data +ffffffff82c6bc78 r lcd800x1280_rightside_up +ffffffff82c6bc90 r lcd720x1280_rightside_up +ffffffff82c6bca8 r lcd800x1280_leftside_up +ffffffff82c6bcc0 r lcd1080x1920_leftside_up +ffffffff82c6bcd8 r lcd1600x2560_rightside_up +ffffffff82c6bcf0 r lcd1200x1920_rightside_up +ffffffff82c6bd08 r gpd_micropc +ffffffff82c6bd20 r gpd_pocket +ffffffff82c6bd38 r gpd_pocket2 +ffffffff82c6bd50 r gpd_win +ffffffff82c6bd68 r gpd_win2 +ffffffff82c6bd80 r lcd1080x1920_rightside_up +ffffffff82c6bd98 r itworks_tw891 +ffffffff82c6bdb0 r lcd1600x2560_leftside_up +ffffffff82c6bdc8 r onegx1_pro +ffffffff82c6bde0 r lcd1280x1920_rightside_up +ffffffff82c6bdf8 r gpd_onemix2s +ffffffff82c6be10 r .compoundliteral +ffffffff82c6be20 r .compoundliteral.5 +ffffffff82c6be48 r .compoundliteral.9 +ffffffff82c6be68 r .compoundliteral.17 +ffffffff82c6bea8 r .compoundliteral.21 +ffffffff82c6bec8 r .compoundliteral.23 +ffffffff82c6bed8 r .compoundliteral.25 +ffffffff82c6bee8 r .compoundliteral.29 +ffffffff82c6c000 r drm_gem_prime_dmabuf_ops +ffffffff82c6e000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82c6f000 r drm_dp_phy_name.phy_names +ffffffff82c6f048 r drm_dp_i2c_algo +ffffffff82c6f058 r drm_dp_i2c_lock_ops +ffffffff82c6f070 r dp_aux_bl_ops +ffffffff82c6f090 r dpcd_quirk_list +ffffffff82c6f320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82c70000 R drm_dp_mst_topology_state_funcs +ffffffff82c70020 r drm_dp_mst_req_type_str.req_type_str +ffffffff82c701f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82c70220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82c70278 r drm_dp_mst_i2c_algo +ffffffff82c71000 r rc_parameters_1_2_444 +ffffffff82c715f0 r rc_parameters_pre_scr +ffffffff82c71920 r rc_parameters_1_2_422 +ffffffff82c71df0 r rc_parameters_1_2_420 +ffffffff82c73000 r hdmi_colorimetry_val +ffffffff82c74018 R ttm_bo_vm_ops +ffffffff82c75000 r ttm_range_manager_func +ffffffff82c76018 r ttm_kmap_iter_io_ops +ffffffff82c76030 r ttm_kmap_iter_linear_io_ops +ffffffff82c77000 r ttm_sys_manager_func +ffffffff82c78000 r ttm_kmap_iter_tt_ops +ffffffff82c79000 r drm_sched_fence_ops_scheduled +ffffffff82c79040 r drm_sched_fence_ops_finished +ffffffff82c7a000 R ch7017_ops +ffffffff82c7b000 R ch7xxx_ops +ffffffff82c7b060 r ch7xxx_ids +ffffffff82c7c000 R ivch_ops +ffffffff82c7c060 r backup_addresses +ffffffff82c7d000 R ns2501_ops +ffffffff82c7d060 r mode_agnostic_values +ffffffff82c7d0e0 r ns2501_modes +ffffffff82c7e000 R sil164_ops +ffffffff82c7f000 R tfp410_ops +ffffffff82c80000 r chv_dpll +ffffffff82c80050 r vlv_dpll +ffffffff82c800a0 r g4x_dpll +ffffffff82c800f0 r pch_dpll +ffffffff82c80138 r intel_dp_enc_funcs +ffffffff82c81000 r intel_hdmi_enc_funcs +ffffffff82c82000 r vlv_primary_formats +ffffffff82c82030 r ivb_primary_formats +ffffffff82c82050 r i965_primary_formats +ffffffff82c82070 r i8xx_primary_formats +ffffffff82c82080 r i965_plane_funcs +ffffffff82c820e8 r i8xx_plane_funcs +ffffffff82c83000 r ilk_wm_funcs +ffffffff82c83040 r vlv_wm_funcs +ffffffff82c83080 r g4x_wm_funcs +ffffffff82c830c0 r nop_funcs +ffffffff82c83100 r pnv_wm_funcs +ffffffff82c83140 r i965_wm_funcs +ffffffff82c83180 r i9xx_wm_funcs +ffffffff82c831c0 r i845_wm_funcs +ffffffff82c83200 r cxsr_latency_table +ffffffff82c84000 r gen11_dsi_encoder_funcs +ffffffff82c84020 r gen11_dsi_connector_funcs +ffffffff82c84098 r gen11_dsi_connector_helper_funcs +ffffffff82c840f8 r gen11_dsi_host_ops +ffffffff82c85000 r intel_plane_helper_funcs +ffffffff82c86000 r g4x_audio_funcs +ffffffff82c86018 r ibx_audio_funcs +ffffffff82c86030 r hsw_audio_funcs +ffffffff82c86050 r hdmi_audio_clock +ffffffff82c860c0 r hdmi_aud_ncts_36bpp +ffffffff82c861a0 r hdmi_aud_ncts_30bpp +ffffffff82c86280 r hdmi_aud_ncts_24bpp +ffffffff82c87000 r intel_backlight_device_ops +ffffffff82c87018 r bxt_pwm_funcs +ffffffff82c87048 r cnp_pwm_funcs +ffffffff82c87078 r lpt_pwm_funcs +ffffffff82c870a8 r spt_pwm_funcs +ffffffff82c870d8 r pch_pwm_funcs +ffffffff82c87108 r ext_pwm_funcs +ffffffff82c87138 r vlv_pwm_funcs +ffffffff82c87168 r i965_pwm_funcs +ffffffff82c87198 r i9xx_pwm_funcs +ffffffff82c871c8 r pwm_bl_funcs +ffffffff82c88000 r bdb_blocks +ffffffff82c88160 r adlp_aux_ch_map +ffffffff82c88169 r adls_aux_ch_map +ffffffff82c88170 r rkl_aux_ch_map +ffffffff82c88175 r direct_aux_ch_map +ffffffff82c8817e r translate_iboost.mapping +ffffffff82c88181 r adlp_ddc_pin_map +ffffffff82c8818e r adls_ddc_pin_map +ffffffff82c8819b r rkl_pch_tgp_ddc_pin_map +ffffffff82c881a6 r gen9bc_tgp_ddc_pin_map +ffffffff82c881b1 r icp_ddc_pin_map +ffffffff82c881c0 r cnp_ddc_pin_map +ffffffff82c89000 r mtl_sa_info +ffffffff82c89006 r adlp_sa_info +ffffffff82c8900c r adls_sa_info +ffffffff82c89012 r rkl_sa_info +ffffffff82c89018 r tgl_sa_info +ffffffff82c89020 r intel_bw_funcs +ffffffff82c8a000 r intel_cdclk_funcs +ffffffff82c8a010 r mtl_cdclk_funcs +ffffffff82c8a030 r mtl_cdclk_table +ffffffff82c8a088 r tgl_cdclk_funcs +ffffffff82c8a0b0 r dg2_cdclk_table +ffffffff82c8a160 r adlp_a_step_cdclk_table +ffffffff82c8a1e0 r rplu_cdclk_table +ffffffff82c8a2c8 r rplu_cdclk_funcs +ffffffff82c8a2f0 r adlp_cdclk_table +ffffffff82c8a3b0 r rkl_cdclk_table +ffffffff82c8a4a0 r icl_cdclk_table +ffffffff82c8a588 r ehl_cdclk_funcs +ffffffff82c8a5a8 r icl_cdclk_funcs +ffffffff82c8a5c8 r bxt_cdclk_funcs +ffffffff82c8a5f0 r glk_cdclk_table +ffffffff82c8a620 r bxt_cdclk_table +ffffffff82c8a668 r skl_cdclk_funcs +ffffffff82c8a688 r bdw_cdclk_funcs +ffffffff82c8a6a8 r hsw_cdclk_funcs +ffffffff82c8a6c8 r chv_cdclk_funcs +ffffffff82c8a6e8 r vlv_cdclk_funcs +ffffffff82c8a708 r fixed_400mhz_cdclk_funcs +ffffffff82c8a728 r ilk_cdclk_funcs +ffffffff82c8a748 r gm45_cdclk_funcs +ffffffff82c8a768 r g33_cdclk_funcs +ffffffff82c8a788 r i965gm_cdclk_funcs +ffffffff82c8a7a8 r pnv_cdclk_funcs +ffffffff82c8a7c8 r i945gm_cdclk_funcs +ffffffff82c8a7e8 r i915gm_cdclk_funcs +ffffffff82c8a808 r i915g_cdclk_funcs +ffffffff82c8a828 r i865g_cdclk_funcs +ffffffff82c8a848 r i85x_cdclk_funcs +ffffffff82c8a868 r i845g_cdclk_funcs +ffffffff82c8a888 r i830_cdclk_funcs +ffffffff82c8a8a8 r g33_get_cdclk.div_3200 +ffffffff82c8a8ae r g33_get_cdclk.div_4000 +ffffffff82c8a8b4 r g33_get_cdclk.div_4800 +ffffffff82c8a8ba r g33_get_cdclk.div_5333 +ffffffff82c8a8c0 r i965gm_get_cdclk.div_3200 +ffffffff82c8a8c3 r i965gm_get_cdclk.div_4000 +ffffffff82c8a8c6 r i965gm_get_cdclk.div_5333 +ffffffff82c8b000 r chv_color_funcs +ffffffff82c8b040 r vlv_color_funcs +ffffffff82c8b080 r i965_color_funcs +ffffffff82c8b0c0 r i9xx_color_funcs +ffffffff82c8b100 r tgl_color_funcs +ffffffff82c8b140 r icl_color_funcs +ffffffff82c8b180 r glk_color_funcs +ffffffff82c8b1c0 r skl_color_funcs +ffffffff82c8b200 r bdw_color_funcs +ffffffff82c8b240 r hsw_color_funcs +ffffffff82c8b280 r ivb_color_funcs +ffffffff82c8b2c0 r ilk_color_funcs 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mtl_c10_hdmi_27_0 +ffffffff82c921a8 r mtl_c10_hdmi_27027 +ffffffff82c921c4 r mtl_c10_hdmi_28320 +ffffffff82c921e0 r mtl_c10_hdmi_30240 +ffffffff82c921fc r mtl_c10_hdmi_31500 +ffffffff82c92218 r mtl_c10_hdmi_36000 +ffffffff82c92234 r mtl_c10_hdmi_40000 +ffffffff82c92250 r mtl_c10_hdmi_49500 +ffffffff82c9226c r mtl_c10_hdmi_50000 +ffffffff82c92288 r mtl_c10_hdmi_57284 +ffffffff82c922a4 r mtl_c10_hdmi_58000 +ffffffff82c922c0 r mtl_c10_hdmi_65000 +ffffffff82c922dc r mtl_c10_hdmi_71000 +ffffffff82c922f8 r mtl_c10_hdmi_74176 +ffffffff82c92314 r mtl_c10_hdmi_74_25 +ffffffff82c92330 r mtl_c10_hdmi_75000 +ffffffff82c9234c r mtl_c10_hdmi_78750 +ffffffff82c92368 r mtl_c10_hdmi_85500 +ffffffff82c92384 r mtl_c10_hdmi_88750 +ffffffff82c923a0 r mtl_c10_hdmi_106500 +ffffffff82c923bc r mtl_c10_hdmi_108000 +ffffffff82c923d8 r mtl_c10_hdmi_115500 +ffffffff82c923f4 r mtl_c10_hdmi_119000 +ffffffff82c92410 r mtl_c10_hdmi_135000 +ffffffff82c9242c r mtl_c10_hdmi_138500 +ffffffff82c92448 r mtl_c10_hdmi_147160 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xehpsdv_clock_gating_funcs -ffffffff82d04020 r adlp_clock_gating_funcs -ffffffff82d04028 r gen12lp_clock_gating_funcs -ffffffff82d04030 r icl_clock_gating_funcs -ffffffff82d04038 r cfl_clock_gating_funcs -ffffffff82d04040 r skl_clock_gating_funcs -ffffffff82d04048 r kbl_clock_gating_funcs -ffffffff82d04050 r bxt_clock_gating_funcs -ffffffff82d04058 r glk_clock_gating_funcs -ffffffff82d04060 r bdw_clock_gating_funcs -ffffffff82d04068 r chv_clock_gating_funcs -ffffffff82d04070 r hsw_clock_gating_funcs -ffffffff82d04078 r ivb_clock_gating_funcs -ffffffff82d04080 r vlv_clock_gating_funcs -ffffffff82d04088 r gen6_clock_gating_funcs -ffffffff82d04090 r ilk_clock_gating_funcs -ffffffff82d04098 r g4x_clock_gating_funcs -ffffffff82d040a0 r i965gm_clock_gating_funcs -ffffffff82d040a8 r i965g_clock_gating_funcs -ffffffff82d040b0 r gen3_clock_gating_funcs -ffffffff82d040b8 r i85x_clock_gating_funcs -ffffffff82d040c0 r i830_clock_gating_funcs -ffffffff82d05000 r platform_names -ffffffff82d05140 r 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__gen9_fw_ranges -ffffffff82d0b320 r gen8_shadowed_regs -ffffffff82d0b350 r __chv_fw_ranges -ffffffff82d0b410 r __gen6_fw_ranges -ffffffff82d0b420 r __vlv_fw_ranges -ffffffff82d0b478 r uncore_get_fallback -ffffffff82d0b480 r uncore_get_normal -ffffffff82d0b488 r uncore_get_thread_status -ffffffff82d0b490 r __xelpmp_fw_ranges -ffffffff82d0b5c0 r xelpmp_shadowed_regs -ffffffff82d0c000 r i915_pxp_tee_component_ops -ffffffff82d0d000 r intel_dram_type_str.str -ffffffff82d0e000 r atom_op_names -ffffffff82d0e3e0 r opcode_table -ffffffff82d0eb90 r atom_dst_to_src -ffffffff82d0ec10 r atom_io_names -ffffffff82d0ec40 r atom_table_names -ffffffff82d0ee90 r atom_iio_len -ffffffff82d0f000 r atombios_helper_funcs -ffffffff82d0f080 r vga_control_regs -ffffffff82d10000 r voltage_names -ffffffff82d10020 r pre_emph_names -ffffffff82d11000 r radeon_atom_backlight_ops -ffffffff82d11018 r radeon_atom_enc_funcs -ffffffff82d11038 r radeon_atom_dig_helper_funcs -ffffffff82d110a0 r radeon_atom_dac_helper_funcs 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hawaii_io_mc_regs -ffffffff82d161d0 r mc_cg_registers -ffffffff82d16200 r bonaire_mgcg_cgcg_init -ffffffff82d165e0 r bonaire_golden_registers -ffffffff82d167d0 r bonaire_golden_common_registers -ffffffff82d16800 r bonaire_golden_spm_registers -ffffffff82d16810 r kalindi_mgcg_cgcg_init -ffffffff82d16ab0 r kalindi_golden_registers -ffffffff82d16c20 r kalindi_golden_common_registers -ffffffff82d16c50 r kalindi_golden_spm_registers -ffffffff82d16c60 r godavari_golden_registers -ffffffff82d16de0 r spectre_mgcg_cgcg_init -ffffffff82d17200 r spectre_golden_registers -ffffffff82d17330 r spectre_golden_common_registers -ffffffff82d17360 r spectre_golden_spm_registers -ffffffff82d17370 r hawaii_mgcg_cgcg_init -ffffffff82d17880 r hawaii_golden_registers -ffffffff82d17a30 r hawaii_golden_common_registers -ffffffff82d17a6c r hawaii_golden_spm_registers -ffffffff82d17a80 r spectre_rlc_save_restore_register_list -ffffffff82d18170 r kalindi_rlc_save_restore_register_list -ffffffff82d18680 r ci_cs_data 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xehpsdv_gam_steering_table +ffffffff82ce21c0 r icl_l3bank_steering_table +ffffffff82ce21d0 r intel_steering_types +ffffffff82ce3000 r wf_ops +ffffffff82ce4000 r gen12_rcs_offsets +ffffffff82ce4090 r gen9_rcs_offsets +ffffffff82ce4110 r gen9_xcs_offsets +ffffffff82ce4190 r gen8_xcs_offsets +ffffffff82ce5000 r mtl_mocs_table +ffffffff82ce5080 r pvc_mocs_table +ffffffff82ce50a0 r dg2_mocs_table +ffffffff82ce50c0 r xehpsdv_mocs_table +ffffffff82ce52c0 r dg1_mocs_table +ffffffff82ce54c0 r tgl_mocs_table +ffffffff82ce56c0 r gen12_mocs_table +ffffffff82ce58c0 r icl_mocs_table +ffffffff82ce5ac0 r skl_mocs_table +ffffffff82ce5cc0 r broxton_mocs_table +ffffffff82ce5ce0 r mocs_offset.offset +ffffffff82ce6000 r intel_region_lmem_ops +ffffffff82ce8000 r ring_context_ops +ffffffff82ce9000 r cparams +ffffffff82cea000 r mcr_ranges_xehp +ffffffff82cea070 r mcr_ranges_gen12 +ffffffff82cea0a0 r mcr_ranges_gen8 +ffffffff82cec000 r engine_class_guc_class_map +ffffffff82ced028 r guc_class_engine_class_map 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+ffffffff82cf9000 r init_funcs +ffffffff82cfa000 R pciidlist +ffffffff82cfc1d8 r i830_info +ffffffff82cfc240 r i845g_info +ffffffff82cfc2a8 r i85x_info +ffffffff82cfc310 r i865g_info +ffffffff82cfc378 r i915g_info +ffffffff82cfc3e0 r i915gm_info +ffffffff82cfc448 r i945g_info +ffffffff82cfc4b0 r i945gm_info +ffffffff82cfc518 r i965g_info +ffffffff82cfc580 r g33_info +ffffffff82cfc5e8 r i965gm_info +ffffffff82cfc650 r gm45_info +ffffffff82cfc6b8 r g45_info +ffffffff82cfc720 r pnv_g_info +ffffffff82cfc788 r pnv_m_info +ffffffff82cfc7f0 r ilk_d_info +ffffffff82cfc858 r ilk_m_info +ffffffff82cfc8c0 r snb_d_gt1_info +ffffffff82cfc928 r snb_d_gt2_info +ffffffff82cfc990 r snb_m_gt1_info +ffffffff82cfc9f8 r snb_m_gt2_info +ffffffff82cfca60 r ivb_q_info +ffffffff82cfcac8 r ivb_m_gt1_info +ffffffff82cfcb30 r ivb_m_gt2_info +ffffffff82cfcb98 r ivb_d_gt1_info +ffffffff82cfcc00 r ivb_d_gt2_info +ffffffff82cfcc68 r hsw_gt1_info +ffffffff82cfccd0 r hsw_gt2_info +ffffffff82cfcd38 r hsw_gt3_info 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mtl_info +ffffffff82cfe000 r oa_formats +ffffffff82cfe0f0 r gen8_update_reg_state_unlocked.flex_regs +ffffffff82cfe110 r gen8_oa_mux_regs +ffffffff82cfe130 r xehp_oa_b_counters +ffffffff82cfe150 r gen12_oa_b_counters +ffffffff82cfe190 r mtl_oam_b_counters +ffffffff82cfe1c0 r mtl_oa_mux_regs +ffffffff82cfe1f0 r gen12_oa_mux_regs +ffffffff82cff000 r i915_query_funcs +ffffffff82d00000 R i915_fence_ops +ffffffff82d01000 r rsgt_ops +ffffffff82d02000 r fence_ops +ffffffff82d03000 r i915_ttm_buddy_manager_func +ffffffff82d04000 r bind_ops +ffffffff82d05000 r nop_clock_gating_funcs +ffffffff82d05008 r pvc_clock_gating_funcs +ffffffff82d05010 r dg2_clock_gating_funcs +ffffffff82d05018 r xehpsdv_clock_gating_funcs +ffffffff82d05020 r adlp_clock_gating_funcs +ffffffff82d05028 r gen12lp_clock_gating_funcs +ffffffff82d05030 r icl_clock_gating_funcs +ffffffff82d05038 r cfl_clock_gating_funcs +ffffffff82d05040 r skl_clock_gating_funcs +ffffffff82d05048 r kbl_clock_gating_funcs +ffffffff82d05050 r bxt_clock_gating_funcs +ffffffff82d05058 r glk_clock_gating_funcs +ffffffff82d05060 r bdw_clock_gating_funcs +ffffffff82d05068 r chv_clock_gating_funcs +ffffffff82d05070 r hsw_clock_gating_funcs +ffffffff82d05078 r ivb_clock_gating_funcs +ffffffff82d05080 r vlv_clock_gating_funcs +ffffffff82d05088 r gen6_clock_gating_funcs +ffffffff82d05090 r ilk_clock_gating_funcs +ffffffff82d05098 r g4x_clock_gating_funcs +ffffffff82d050a0 r i965gm_clock_gating_funcs +ffffffff82d050a8 r i965g_clock_gating_funcs +ffffffff82d050b0 r gen3_clock_gating_funcs +ffffffff82d050b8 r i85x_clock_gating_funcs +ffffffff82d050c0 r i830_clock_gating_funcs +ffffffff82d06000 r platform_names +ffffffff82d06140 r subplatform_ult_ids +ffffffff82d061a4 r no_display +ffffffff82d07000 r intel_region_map +ffffffff82d09000 r dg2_g10_revid_step_tbl +ffffffff82d09030 r dg2_g11_revid_step_tbl +ffffffff82d09050 r xehpsdv_revids +ffffffff82d09080 r adlp_rplp_revids +ffffffff82d090a0 r adlp_revids +ffffffff82d090e0 r adls_rpls_revids +ffffffff82d09120 r adls_revids +ffffffff82d09160 r rkl_revids +ffffffff82d09180 r bxt_revids +ffffffff82d091c0 r skl_revids +ffffffff82d091f0 r pvc_bd_subids +ffffffff82d09210 r pvc_ct_subids +ffffffff82d0b000 r forcewake_domain_names +ffffffff82d0b080 r __mtl_fw_ranges +ffffffff82d0b1f0 r mtl_shadowed_regs +ffffffff82d0b270 r __pvc_fw_ranges +ffffffff82d0b420 r pvc_shadowed_regs +ffffffff82d0b540 r __dg2_fw_ranges +ffffffff82d0b810 r dg2_shadowed_regs +ffffffff82d0b930 r __xehp_fw_ranges +ffffffff82d0bc00 r gen12_shadowed_regs +ffffffff82d0bd20 r __gen12_fw_ranges +ffffffff82d0bf30 r __gen11_fw_ranges +ffffffff82d0c0e0 r gen11_shadowed_regs +ffffffff82d0c1a0 r __gen9_fw_ranges +ffffffff82d0c320 r gen8_shadowed_regs +ffffffff82d0c350 r __chv_fw_ranges +ffffffff82d0c410 r __gen6_fw_ranges +ffffffff82d0c420 r __vlv_fw_ranges +ffffffff82d0c478 r uncore_get_fallback +ffffffff82d0c480 r uncore_get_normal +ffffffff82d0c488 r uncore_get_thread_status +ffffffff82d0c490 r __xelpmp_fw_ranges +ffffffff82d0c5c0 r xelpmp_shadowed_regs +ffffffff82d0d000 r i915_pxp_tee_component_ops +ffffffff82d0e000 r intel_dram_type_str.str +ffffffff82d0f000 r atom_op_names +ffffffff82d0f3e0 r opcode_table +ffffffff82d0fb90 r atom_dst_to_src +ffffffff82d0fc10 r atom_io_names +ffffffff82d0fc40 r atom_table_names +ffffffff82d0fe90 r atom_iio_len +ffffffff82d10000 r atombios_helper_funcs +ffffffff82d10080 r vga_control_regs +ffffffff82d11000 r voltage_names +ffffffff82d11020 r pre_emph_names +ffffffff82d12000 r radeon_atom_backlight_ops +ffffffff82d12018 r radeon_atom_enc_funcs +ffffffff82d12038 r radeon_atom_dig_helper_funcs +ffffffff82d120a0 r radeon_atom_dac_helper_funcs +ffffffff82d12108 r radeon_atom_ext_helper_funcs +ffffffff82d13000 r caicos_cgcg_cgls_default +ffffffff82d13240 r barts_mgcg_default +ffffffff82d13900 r turks_mgcg_default +ffffffff82d13d80 r caicos_mgcg_default +ffffffff82d14110 r turks_sysls_default +ffffffff82d141d0 r caicos_sysls_default +ffffffff82d14280 r caicos_cgcg_cgls_enable +ffffffff82d144d0 r caicos_cgcg_cgls_disable +ffffffff82d14730 r barts_mgcg_enable +ffffffff82d147b0 r turks_mgcg_enable +ffffffff82d14830 r caicos_mgcg_enable +ffffffff82d148b0 r caicos_mgcg_disable +ffffffff82d14930 r turks_sysls_enable +ffffffff82d149f0 r caicos_sysls_enable +ffffffff82d14aa0 r turks_sysls_disable +ffffffff82d14b60 r caicos_sysls_disable +ffffffff82d15000 r didt_config_ci +ffffffff82d155b4 r defaults_bonaire_xt +ffffffff82d15600 r defaults_saturn_xt +ffffffff82d1564c r defaults_hawaii_xt +ffffffff82d15698 r defaults_hawaii_pro +ffffffff82d16000 r ci_program_jump_on_start.data +ffffffff82d17000 r bonaire_io_mc_regs +ffffffff82d17120 r hawaii_io_mc_regs +ffffffff82d171d0 r mc_cg_registers +ffffffff82d17200 r bonaire_mgcg_cgcg_init +ffffffff82d175e0 r bonaire_golden_registers +ffffffff82d177d0 r bonaire_golden_common_registers +ffffffff82d17800 r bonaire_golden_spm_registers +ffffffff82d17810 r kalindi_mgcg_cgcg_init +ffffffff82d17ab0 r kalindi_golden_registers +ffffffff82d17c20 r kalindi_golden_common_registers +ffffffff82d17c50 r kalindi_golden_spm_registers +ffffffff82d17c60 r godavari_golden_registers +ffffffff82d17de0 r spectre_mgcg_cgcg_init +ffffffff82d18200 r spectre_golden_registers +ffffffff82d18330 r spectre_golden_common_registers +ffffffff82d18360 r spectre_golden_spm_registers +ffffffff82d18370 r hawaii_mgcg_cgcg_init +ffffffff82d18880 r hawaii_golden_registers +ffffffff82d18a30 r hawaii_golden_common_registers +ffffffff82d18a6c r hawaii_golden_spm_registers +ffffffff82d18a80 r spectre_rlc_save_restore_register_list +ffffffff82d19170 r kalindi_rlc_save_restore_register_list +ffffffff82d19680 r ci_cs_data +ffffffff82d196a0 r ci_SECT_CONTEXT_defs +ffffffff82d19720 r ci_SECT_CONTEXT_def_1 +ffffffff82d19a70 r ci_SECT_CONTEXT_def_3 +ffffffff82d19a90 r ci_SECT_CONTEXT_def_4 +ffffffff82d19d04 r ci_SECT_CONTEXT_def_5 +ffffffff82d19d0c r ci_SECT_CONTEXT_def_6 +ffffffff82d19d10 r ci_SECT_CONTEXT_def_2 +ffffffff82d1a160 r ci_SECT_CONTEXT_def_7 +ffffffff82d1a510 r cik_default_state +ffffffff82d1c000 r dce3_2_afmt_write_sad_regs.eld_reg_to_type +ffffffff82d1d000 r dce6_afmt_write_sad_regs.eld_reg_to_type +ffffffff82d1e000 r ni_tx_offsets +ffffffff82d1e020 r evergreen_dp_offsets +ffffffff82d1e040 r evergreen_disp_int_status +ffffffff82d1e060 r evergreen_golden_registers +ffffffff82d1e260 r evergreen_golden_registers2 +ffffffff82d1e310 r cypress_mgcg_init +ffffffff82d1ea10 r juniper_mgcg_init +ffffffff82d1ee80 r redwood_mgcg_init +ffffffff82d1f1b0 r cedar_golden_registers +ffffffff82d1f390 r cedar_mgcg_init +ffffffff82d1f5f0 r wrestler_golden_registers +ffffffff82d1f840 r supersumo_golden_registers +ffffffff82d1fba0 r sumo_golden_registers +ffffffff82d1fbe0 r barts_golden_registers +ffffffff82d1fe00 r turks_golden_registers +ffffffff82d20040 r caicos_golden_registers +ffffffff82d20280 r sumo_rlc_save_restore_register_list +ffffffff82d203d0 r evergreen_cs_data +ffffffff82d20410 r SECT_CONTEXT_defs +ffffffff82d20490 r SECT_CLEAR_defs +ffffffff82d204b0 r SECT_CTRLCONST_defs +ffffffff82d204d0 r SECT_CONTEXT_def_2 +ffffffff82d204f0 r SECT_CONTEXT_def_4 +ffffffff82d20680 r SECT_CONTEXT_def_5 +ffffffff82d206a0 r SECT_CONTEXT_def_6 +ffffffff82d20780 r SECT_CONTEXT_def_1 +ffffffff82d20f20 r SECT_CONTEXT_def_3 +ffffffff82d21000 r SECT_CONTEXT_def_7 +ffffffff82d21488 r SECT_CLEAR_def_1 +ffffffff82d21494 r SECT_CTRLCONST_def_1 +ffffffff82d214a0 r evergreen_default_state +ffffffff82d22000 r cayman_reg_safe_bm +ffffffff82d24000 r evergreen_reg_safe_bm +ffffffff82d27000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82d28000 r didt_config_kv +ffffffff82d29000 r barts_io_mc_regs +ffffffff82d290f0 r turks_io_mc_regs +ffffffff82d291e0 r caicos_io_mc_regs +ffffffff82d292d0 r cayman_io_mc_regs +ffffffff82d293c0 r cayman_golden_registers +ffffffff82d29580 r cayman_golden_registers2 +ffffffff82d295d0 r dvst_golden_registers +ffffffff82d29860 r dvst_golden_registers2 +ffffffff82d29890 r scrapper_golden_registers +ffffffff82d29d70 r tn_rlc_save_restore_register_list +ffffffff82d29f60 r cayman_cs_data +ffffffff82d29fa0 r SECT_CONTEXT_defs +ffffffff82d2a020 r SECT_CLEAR_defs +ffffffff82d2a040 r SECT_CTRLCONST_defs +ffffffff82d2a060 r SECT_CONTEXT_def_2 +ffffffff82d2a080 r SECT_CONTEXT_def_4 +ffffffff82d2a210 r SECT_CONTEXT_def_5 +ffffffff82d2a230 r SECT_CONTEXT_def_1 +ffffffff82d2a9d0 r SECT_CONTEXT_def_3 +ffffffff82d2aab0 r SECT_CONTEXT_def_6 +ffffffff82d2ab90 r SECT_CONTEXT_def_7 +ffffffff82d2b018 r SECT_CLEAR_def_1 +ffffffff82d2b024 r SECT_CTRLCONST_def_1 +ffffffff82d2b030 r cayman_default_state +ffffffff82d2c000 r cac_weights_cayman_xt +ffffffff82d2c128 r cac_weights_cayman_pro +ffffffff82d2c250 r cac_weights_cayman_le +ffffffff82d2c380 r cayman_cgcg_cgls_default +ffffffff82d2c5c0 r cayman_mgcg_default +ffffffff82d2cf20 r cayman_sysls_default +ffffffff82d2cff0 r cayman_cgcg_cgls_enable +ffffffff82d2d240 r cayman_cgcg_cgls_disable +ffffffff82d2d4a0 r cayman_mgcg_enable +ffffffff82d2d520 r cayman_mgcg_disable +ffffffff82d2d5a0 r cayman_sysls_enable +ffffffff82d2d670 r cayman_sysls_disable +ffffffff82d2e000 r rn50_reg_safe_bm +ffffffff82d2e1a0 r r100_reg_safe_bm +ffffffff82d2f000 r r200_reg_safe_bm +ffffffff82d30000 r r300_reg_safe_bm +ffffffff82d31000 r r420_reg_safe_bm +ffffffff82d33000 r color_formats_table +ffffffff82d33480 r r600_reg_safe_bm +ffffffff82d36000 R r600_utc +ffffffff82d36040 R r600_dtc +ffffffff82d36080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82d38000 r r100_gfx_ring +ffffffff82d38070 r r300_gfx_ring +ffffffff82d380e0 r rv515_gfx_ring +ffffffff82d38150 r r600_gfx_ring +ffffffff82d381c0 r r600_dma_ring +ffffffff82d38230 r rv6xx_uvd_ring +ffffffff82d382a0 r rv770_uvd_ring +ffffffff82d38310 r evergreen_gfx_ring +ffffffff82d38380 r evergreen_dma_ring +ffffffff82d383f0 r cayman_gfx_ring +ffffffff82d38460 r cayman_dma_ring +ffffffff82d384d0 r cayman_uvd_ring +ffffffff82d38540 r trinity_vce_ring +ffffffff82d385b0 r si_gfx_ring +ffffffff82d38620 r si_dma_ring +ffffffff82d38690 r ci_gfx_ring +ffffffff82d38700 r ci_cp_ring +ffffffff82d38770 r ci_dma_ring +ffffffff82d387e0 r ci_vce_ring +ffffffff82d39000 r object_connector_convert +ffffffff82d39060 r supported_devices_connector_convert +ffffffff82d390a0 r supported_devices_connector_object_id_convert +ffffffff82d390c0 r thermal_controller_names +ffffffff82d39100 r pp_lib_thermal_controller_names +ffffffff82d3a000 r pin_offsets +ffffffff82d3a020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff82d3c000 r thermal_controller_names +ffffffff82d3c020 r default_primarydac_adj +ffffffff82d3c120 r default_tvdac_adj +ffffffff82d3c220 r default_tmds_pll +ffffffff82d3d000 r radeon_dp_connector_funcs +ffffffff82d3d078 r radeon_dp_connector_helper_funcs +ffffffff82d3d0d8 r radeon_lvds_bridge_connector_funcs +ffffffff82d3d150 r radeon_vga_connector_funcs +ffffffff82d3d1c8 r radeon_vga_connector_helper_funcs +ffffffff82d3d228 r radeon_dvi_connector_funcs +ffffffff82d3d2a0 r radeon_dvi_connector_helper_funcs +ffffffff82d3d300 r radeon_edp_connector_funcs +ffffffff82d3d378 r radeon_tv_connector_funcs +ffffffff82d3d3f0 r radeon_tv_connector_helper_funcs +ffffffff82d3d450 r radeon_lvds_connector_funcs +ffffffff82d3d4c8 r radeon_lvds_connector_helper_funcs +ffffffff82d3e000 r radeon_family_name +ffffffff82d3e3f0 r radeon_px_quirk_list +ffffffff82d3f000 r radeon_fb_funcs +ffffffff82d3f018 r radeon_mode_funcs +ffffffff82d3f060 r radeon_tmds_pll_enum_list +ffffffff82d3f080 r radeon_tv_std_enum_list +ffffffff82d3f100 r radeon_underscan_enum_list +ffffffff82d3f130 r radeon_audio_enum_list +ffffffff82d3f160 r radeon_dither_enum_list +ffffffff82d3f180 r radeon_output_csc_enum_list +ffffffff82d3f1c0 r radeon_crtc_funcs +ffffffff82d3f280 r hpd_names +ffffffff82d3f2b0 r encoder_names +ffffffff82d3f3e0 r radeon_afmt_init.eg_offsets +ffffffff82d40000 r aux_offset +ffffffff82d41000 R radeondrm_ca +ffffffff82d41030 r pciidlist +ffffffff82d451d0 r kms_driver +ffffffff82d452c0 r radeon_ioctls_kms +ffffffff82d46000 r radeon_fbdev_fb_helper_funcs +ffffffff82d46010 r radeon_fbdev_client_funcs +ffffffff82d46030 r radeon_fbdev_fb_ops +ffffffff82d47000 R radeon_fence_ops +ffffffff82d49000 R radeon_gem_object_funcs +ffffffff82d49070 r radeon_gem_vm_ops +ffffffff82d4a000 r radeon_i2c_algo +ffffffff82d4a010 r radeon_atom_i2c_algo +ffffffff82d4b000 r legacy_helper_funcs +ffffffff82d4c000 r radeon_backlight_ops +ffffffff82d4c018 r radeon_legacy_lvds_enc_funcs +ffffffff82d4c038 r radeon_legacy_lvds_helper_funcs +ffffffff82d4c0a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82d4c0c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82d4c128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82d4c148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82d4c1b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82d4c1d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82d4c238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82d4c258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82d4d000 r SLOPE_value +ffffffff82d4d030 r YCOEF_EN_value +ffffffff82d4d060 r YCOEF_value +ffffffff82d4d090 r available_tv_modes +ffffffff82d4d110 r hor_timing_NTSC +ffffffff82d4d150 r vert_timing_NTSC +ffffffff82d4d190 r hor_timing_PAL +ffffffff82d4d1d0 r vert_timing_PAL +ffffffff82d4f000 r radeon_pm_state_type_name +ffffffff82d50000 r radeon_evict_flags.placements +ffffffff82d53000 r rs600_reg_safe_bm +ffffffff82d55000 r rv515_reg_safe_bm +ffffffff82d56000 r dll_speed_table +ffffffff82d57000 r r7xx_golden_registers +ffffffff82d57090 r r7xx_golden_dyn_gpr_registers +ffffffff82d57100 r rv770ce_golden_registers +ffffffff82d57160 r rv770_golden_registers +ffffffff82d571b0 r rv770_mgcg_init +ffffffff82d578f0 r rv730_golden_registers +ffffffff82d57950 r rv730_mgcg_init +ffffffff82d57ee0 r rv710_golden_registers +ffffffff82d57f30 r rv710_mgcg_init +ffffffff82d581d0 r rv740_golden_registers +ffffffff82d58360 r rv740_mgcg_init +ffffffff82d5a000 r rv730_smc_int_vectors +ffffffff82d5a040 r rv710_smc_int_vectors +ffffffff82d5a080 r rv740_smc_int_vectors +ffffffff82d5a0c0 r cypress_smc_int_vectors +ffffffff82d5a100 r caicos_smc_int_vectors +ffffffff82d5a140 r cayman_smc_int_vectors +ffffffff82d5b000 r tahiti_io_mc_regs +ffffffff82d5b120 r pitcairn_io_mc_regs +ffffffff82d5b240 r verde_io_mc_regs +ffffffff82d5b360 r oland_io_mc_regs +ffffffff82d5b480 r hainan_io_mc_regs +ffffffff82d5b5a0 r crtc_offsets +ffffffff82d5b5c0 r si_disp_int_status +ffffffff82d5b5e0 r tahiti_golden_registers +ffffffff82d5b760 r tahiti_golden_rlc_registers +ffffffff82d5b7b0 r tahiti_mgcg_cgcg_init +ffffffff82d5bd98 r tahiti_golden_registers2 +ffffffff82d5bdb0 r pitcairn_golden_registers +ffffffff82d5bf00 r pitcairn_golden_rlc_registers +ffffffff82d5bf40 r pitcairn_mgcg_cgcg_init +ffffffff82d5c3b0 r verde_golden_registers +ffffffff82d5c620 r verde_golden_rlc_registers +ffffffff82d5c660 r verde_mgcg_cgcg_init +ffffffff82d5cae0 r oland_golden_registers +ffffffff82d5cc30 r oland_golden_rlc_registers +ffffffff82d5cc70 r oland_mgcg_cgcg_init +ffffffff82d5d000 r hainan_golden_registers +ffffffff82d5d12c r hainan_golden_registers2 +ffffffff82d5d140 r hainan_mgcg_cgcg_init +ffffffff82d5d4b0 r verde_rlc_save_restore_register_list +ffffffff82d5d820 r si_cs_data +ffffffff82d5d840 r si_SECT_CONTEXT_defs +ffffffff82d5d8c0 r si_SECT_CONTEXT_def_1 +ffffffff82d5dc10 r si_SECT_CONTEXT_def_3 +ffffffff82d5dc30 r si_SECT_CONTEXT_def_4 +ffffffff82d5dea4 r si_SECT_CONTEXT_def_5 +ffffffff82d5dea8 r si_SECT_CONTEXT_def_6 +ffffffff82d5deb0 r si_SECT_CONTEXT_def_2 +ffffffff82d5e2f0 r si_SECT_CONTEXT_def_7 +ffffffff82d5e6a0 r mc_cg_registers +ffffffff82d5e6d0 r si_default_state +ffffffff82d5f000 r cac_weights_tahiti +ffffffff82d5f4d0 r lcac_tahiti +ffffffff82d5fba0 r cac_override_tahiti +ffffffff82d5fbb4 r powertune_data_tahiti +ffffffff82d5fbf0 r dte_data_tahiti +ffffffff82d5fcc0 r dte_data_new_zealand +ffffffff82d5fd90 r dte_data_malta +ffffffff82d5fe60 r lcac_pitcairn +ffffffff82d60530 r cac_override_pitcairn +ffffffff82d60544 r powertune_data_pitcairn +ffffffff82d60580 r lcac_cape_verde +ffffffff82d609d0 r cac_override_cape_verde +ffffffff82d609e4 r powertune_data_cape_verde +ffffffff82d60a20 r cac_weights_cape_verde_pro +ffffffff82d60ef0 r cac_weights_heathrow +ffffffff82d613c0 r cac_weights_chelsea_xt +ffffffff82d61890 r cac_weights_chelsea_pro +ffffffff82d61d60 r cac_weights_cape_verde +ffffffff82d62230 r cac_weights_mars_pro +ffffffff82d62700 r lcac_mars_pro +ffffffff82d62a60 r cac_override_oland +ffffffff82d62a74 r powertune_data_mars_pro +ffffffff82d62ab0 r cac_weights_mars_xt +ffffffff82d62f80 r cac_weights_oland_pro +ffffffff82d63450 r cac_weights_oland_xt +ffffffff82d63920 r lcac_oland +ffffffff82d63c7c r powertune_data_oland +ffffffff82d63cc0 r cac_weights_hainan +ffffffff82d64184 r powertune_data_hainan +ffffffff82d641c0 r dte_data_aruba_pro +ffffffff82d64290 r dte_data_tahiti_pro +ffffffff82d64360 r dte_data_curacao_pro +ffffffff82d64430 r dte_data_neptune_xt +ffffffff82d64500 r dte_data_sun_xt +ffffffff82d645d0 r dte_data_venus_xtx +ffffffff82d646a0 r dte_data_venus_xt +ffffffff82d64770 r dte_data_venus_pro +ffffffff82d64840 r dte_data_mars_pro +ffffffff82d65000 r si_program_jump_on_start.data +ffffffff82d66000 r sumo_dtc +ffffffff82d67000 r trinity_mgcg_shls_default +ffffffff82d67380 r trinity_sysls_enable +ffffffff82d67450 r trinity_sysls_disable +ffffffff82d69000 r GC_BASE +ffffffff82d690a8 r HDP_BASE +ffffffff82d69150 r MMHUB_BASE +ffffffff82d691f8 r ATHUB_BASE +ffffffff82d692a0 r NBIO_BASE +ffffffff82d69348 r MP0_BASE +ffffffff82d693f0 r MP1_BASE +ffffffff82d69498 r DF_BASE +ffffffff82d69540 r OSSSYS_BASE +ffffffff82d695e8 r SDMA0_BASE +ffffffff82d69690 r SDMA1_BASE +ffffffff82d69738 r SDMA2_BASE +ffffffff82d697e0 r SDMA3_BASE +ffffffff82d69888 r SDMA4_BASE +ffffffff82d69930 r SMUIO_BASE +ffffffff82d699d8 r THM_BASE +ffffffff82d69a80 r UMC_BASE +ffffffff82d69b28 r VCN_BASE +ffffffff82d6a000 r amdgpu_afmt_predefined_acr +ffffffff82d6b000 r atom_op_names +ffffffff82d6b3e0 r opcode_table +ffffffff82d6bbd0 r atom_dst_to_src +ffffffff82d6bc50 r atom_io_names +ffffffff82d6bc80 r atom_table_names +ffffffff82d6bed0 r atom_iio_len +ffffffff82d6c000 r object_connector_convert +ffffffff82d6c058 R amdgpu_vbios_version_attr_group +ffffffff82d6d000 r voltage_names +ffffffff82d6d020 r pre_emph_names +ffffffff82d6e000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82d70000 r amdgpu_benchmark.common_modes +ffffffff82d71000 r amdgpu_cgs_ops +ffffffff82d72000 r amdgpu_connector_dp_funcs +ffffffff82d72078 r amdgpu_connector_dp_helper_funcs +ffffffff82d720d8 r amdgpu_connector_edp_funcs +ffffffff82d72150 r amdgpu_connector_vga_funcs +ffffffff82d721c8 r amdgpu_connector_vga_helper_funcs +ffffffff82d72228 r amdgpu_connector_dvi_funcs +ffffffff82d722a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82d72300 r amdgpu_connector_lvds_funcs +ffffffff82d72378 r amdgpu_connector_lvds_helper_funcs +ffffffff82d723e0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82d74000 R amdgpu_ctx_num_entities +ffffffff82d75000 r amdgpu_kms_driver +ffffffff82d750f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82d76000 r hw_id_map +ffffffff82d76090 r hw_id_names +ffffffff82d77000 r hpd_names +ffffffff82d77030 r encoder_names +ffffffff82d77180 r dcc_retile_formats +ffffffff82d77270 r dcc_formats +ffffffff82d77360 R amdgpu_mode_funcs +ffffffff82d773b0 r amdgpu_underscan_enum_list +ffffffff82d773e0 r amdgpu_audio_enum_list +ffffffff82d77410 r amdgpu_dither_enum_list +ffffffff82d77430 r amdgpu_fb_funcs_atomic +ffffffff82d77448 r amdgpu_fb_funcs +ffffffff82d78000 R amdgpu_dmabuf_ops +ffffffff82d79000 R amdgpu_ioctls_kms +ffffffff82d79210 R amdgpu_partition_driver +ffffffff82d792f8 R amdgpu_ca +ffffffff82d79320 r pciidlist +ffffffff82d7a1f0 r amdgpu_unsupported_pciidlist +ffffffff82d7a770 r amdgpu_kms_driver +ffffffff82d7b000 r amdgpu_job_fence_ops +ffffffff82d7b040 r amdgpu_fence_ops +ffffffff82d7c000 r amdgpu_gem_object_funcs +ffffffff82d7c070 r amdgpu_gem_vm_ops +ffffffff82d7d000 R amdgpu_gtt_mgr_attr_group +ffffffff82d7d018 r amdgpu_gtt_mgr_func +ffffffff82d7e000 r amdgpu_atombios_i2c_algo +ffffffff82d7f000 R node_id_to_phys_map +ffffffff82d80000 R amdgpu_sched_ops +ffffffff82d82000 r amdgpu_vram_names +ffffffff82d83000 r amdgpu_preempt_mgr_func +ffffffff82d84000 R psp_ip_funcs +ffffffff82d840a8 R psp_v3_1_ip_block +ffffffff82d840c0 R psp_v10_0_ip_block +ffffffff82d840d8 R psp_v11_0_ip_block +ffffffff82d840f0 R psp_v11_0_8_ip_block +ffffffff82d84108 R psp_v12_0_ip_block +ffffffff82d84120 R psp_v13_0_ip_block +ffffffff82d84138 R psp_v13_0_4_ip_block +ffffffff82d86000 r sw_ring_info +ffffffff82d87000 r amdgpu_evict_flags.placements +ffffffff82d8b000 R amdgpu_vkms_ip_block +ffffffff82d8c000 R amdgpu_vm_cpu_funcs +ffffffff82d8e000 R amdgpu_vm_sdma_funcs +ffffffff82d8f000 R amdgpu_vram_mgr_attr_group +ffffffff82d8f018 r amdgpu_vram_mgr_func +ffffffff82d8f040 r amdgpu_dummy_vram_mgr_func +ffffffff82d90000 r xgmi_pcs_err_status_reg_arct +ffffffff82d90020 r xgmi3x16_pcs_ras_fields +ffffffff82d901f0 r xgmi_pcs_ras_fields +ffffffff82d90310 r wafl_pcs_ras_fields +ffffffff82d91000 r GC_BASE +ffffffff82d910c0 r HDP_BASE +ffffffff82d91180 r MMHUB_BASE +ffffffff82d91240 r ATHUB_BASE +ffffffff82d91300 r NBIF0_BASE +ffffffff82d913c0 r MP0_BASE +ffffffff82d91480 r MP1_BASE +ffffffff82d91540 r UVD_BASE +ffffffff82d91600 r DF_BASE +ffffffff82d916c0 r OSSSYS_BASE +ffffffff82d91780 r SDMA0_BASE +ffffffff82d91840 r SDMA1_BASE +ffffffff82d91900 r SDMA2_BASE +ffffffff82d919c0 r SDMA3_BASE +ffffffff82d91a80 r SDMA4_BASE +ffffffff82d91b40 r SDMA5_BASE +ffffffff82d91c00 r SDMA6_BASE +ffffffff82d91cc0 r SDMA7_BASE +ffffffff82d91d80 r SMUIO_BASE +ffffffff82d91e40 r THM_BASE +ffffffff82d91f00 r UMC_BASE +ffffffff82d91fc0 r RSMU_BASE +ffffffff82d93000 r cz_ih_ip_funcs +ffffffff82d930a8 R cz_ih_ip_block +ffffffff82d930c0 r cz_ih_funcs ffffffff82d94000 r crtc_offsets -ffffffff82d94020 r dce_v11_0_ip_funcs -ffffffff82d940c8 R dce_v11_0_ip_block -ffffffff82d940e0 R dce_v11_2_ip_block -ffffffff82d940f8 r dce_v11_0_display_funcs +ffffffff82d94020 r dce_v10_0_ip_funcs +ffffffff82d940c8 R dce_v10_0_ip_block +ffffffff82d940e0 R dce_v10_1_ip_block +ffffffff82d940f8 r dce_v10_0_display_funcs ffffffff82d94150 r hpd_offsets -ffffffff82d94168 r dce_v11_0_encoder_funcs -ffffffff82d94188 r dce_v11_0_dac_helper_funcs -ffffffff82d941f0 r dce_v11_0_dig_helper_funcs -ffffffff82d94258 r dce_v11_0_ext_helper_funcs -ffffffff82d942c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82d942f0 r dce_v11_0_crtc_irq_funcs -ffffffff82d94300 r dce_v11_0_pageflip_irq_funcs -ffffffff82d94310 r dce_v11_0_hpd_irq_funcs +ffffffff82d94168 r dce_v10_0_encoder_funcs +ffffffff82d94188 r dce_v10_0_dac_helper_funcs +ffffffff82d941f0 r dce_v10_0_dig_helper_funcs +ffffffff82d94258 r dce_v10_0_ext_helper_funcs +ffffffff82d942c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82d942f0 r dce_v10_0_crtc_irq_funcs +ffffffff82d94300 r dce_v10_0_pageflip_irq_funcs +ffffffff82d94310 r dce_v10_0_hpd_irq_funcs ffffffff82d94320 r interrupt_status_offsets -ffffffff82d94380 r dce_v11_0_crtc_funcs -ffffffff82d94440 r dce_v11_0_crtc_helper_funcs +ffffffff82d94380 r dce_v10_0_crtc_funcs +ffffffff82d94440 r dce_v10_0_crtc_helper_funcs ffffffff82d944c0 r vga_control_regs ffffffff82d944e0 r dig_offsets -ffffffff82d94510 r cz_mgcg_cgcg_init -ffffffff82d94530 r cz_golden_settings_a11 -ffffffff82d94550 r stoney_golden_settings_a11 -ffffffff82d94570 r polaris11_golden_settings_a11 -ffffffff82d945b0 r polaris10_golden_settings_a11 -ffffffff82d95000 R df_v1_7_funcs -ffffffff82d95070 r df_v1_7_channel_number -ffffffff82d96000 R df_v3_6_funcs -ffffffff82d96070 r df_v3_6_channel_number -ffffffff82d97000 R df_v4_3_funcs -ffffffff82d98000 r GC_BASE -ffffffff82d980a8 r HDP_BASE -ffffffff82d98150 r MMHUB_BASE -ffffffff82d981f8 r ATHUB_BASE -ffffffff82d982a0 r NBIO_BASE -ffffffff82d98348 r MP0_BASE -ffffffff82d983f0 r MP1_BASE -ffffffff82d98498 r VCN0_BASE -ffffffff82d98540 r DF_BASE -ffffffff82d985e8 r DCN_BASE -ffffffff82d98690 r OSSSYS_BASE -ffffffff82d98738 r SMUIO_BASE -ffffffff82d987e0 r THM_BASE -ffffffff82d99000 r gfx_v10_0_ip_funcs -ffffffff82d990a8 R gfx_v10_0_ip_block -ffffffff82d990c0 r gfx_v10_0_gfx_funcs -ffffffff82d99120 r golden_settings_gc_rlc_spm_10_0_nv10 -ffffffff82d9f3c0 r golden_settings_gc_rlc_spm_10_1_nv14 -ffffffff82da2de0 r golden_settings_gc_rlc_spm_10_1_2_nv12 -ffffffff82da9080 r gfx_v10_0_kiq_pm4_funcs -ffffffff82da90c0 r gfx_v10_0_ring_funcs_kiq -ffffffff82da9200 r gfx_v10_0_ring_funcs_gfx -ffffffff82da9340 r gfx_v10_0_ring_funcs_compute -ffffffff82da9480 r gfx_v10_0_eop_irq_funcs -ffffffff82da9490 r gfx_v10_0_kiq_irq_funcs -ffffffff82da94a0 r gfx_v10_0_priv_reg_irq_funcs -ffffffff82da94b0 r gfx_v10_0_priv_inst_irq_funcs -ffffffff82da94c0 r gfx_v10_0_rlc_funcs -ffffffff82da9528 r gfx_v10_0_rlc_funcs_sriov -ffffffff82da9590 r gfx10_cs_data -ffffffff82da95b0 r gfx10_SECT_CONTEXT_defs -ffffffff82da9640 r gfx10_SECT_CONTEXT_def_1 -ffffffff82da99a0 r gfx10_SECT_CONTEXT_def_3 -ffffffff82da99b0 r gfx10_SECT_CONTEXT_def_4 -ffffffff82da9c28 r gfx10_SECT_CONTEXT_def_5 -ffffffff82da9c30 r gfx10_SECT_CONTEXT_def_6 -ffffffff82da9c40 r gfx10_SECT_CONTEXT_def_2 -ffffffff82daa080 r gfx10_SECT_CONTEXT_def_7 -ffffffff82daa190 r gfx10_SECT_CONTEXT_def_8 -ffffffff82daa4c0 r golden_settings_gc_10_1 -ffffffff82daa880 r golden_settings_gc_10_0_nv10 -ffffffff82daa880 r golden_settings_gc_10_1_1 -ffffffff82daac10 r golden_settings_gc_10_1_2 -ffffffff82daac10 r golden_settings_gc_10_1_nv14 -ffffffff82dab000 r golden_settings_gc_10_1_2_nv12 -ffffffff82dab000 r golden_settings_gc_10_3 -ffffffff82dab408 r golden_settings_gc_10_3_sienna_cichlid -ffffffff82dab410 r golden_settings_gc_10_3_2 -ffffffff82dab800 r golden_settings_gc_10_3_vangogh -ffffffff82daba60 r golden_settings_gc_10_3_3 -ffffffff82dabc40 r golden_settings_gc_10_3_4 -ffffffff82dabfa0 r golden_settings_gc_10_3_5 -ffffffff82dac2a0 r golden_settings_gc_10_0_cyan_skillfish -ffffffff82dac5d0 r golden_settings_gc_10_3_6 -ffffffff82dac7e0 r golden_settings_gc_10_3_7 -ffffffff82dad000 r gfx_v11_0_ip_funcs -ffffffff82dad0a8 R gfx_v11_0_ip_block -ffffffff82dad0c0 r gfx_v11_0_gfx_funcs -ffffffff82dad120 r gfx_v11_0_kiq_pm4_funcs -ffffffff82dad160 r gfx_v11_0_ring_funcs_kiq -ffffffff82dad2a0 r gfx_v11_0_ring_funcs_gfx -ffffffff82dad3e0 r gfx_v11_0_ring_funcs_compute -ffffffff82dad520 r gfx_v11_0_eop_irq_funcs -ffffffff82dad530 r gfx_v11_0_priv_reg_irq_funcs -ffffffff82dad540 r gfx_v11_0_priv_inst_irq_funcs -ffffffff82dad550 r gfx_v11_0_rlc_gc_fed_irq_funcs -ffffffff82dad560 r gfx_v11_0_rlc_funcs -ffffffff82dad5d0 r gfx11_cs_data -ffffffff82dad5f0 r gfx11_SECT_CONTEXT_defs -ffffffff82dad670 r gfx11_SECT_CONTEXT_def_1 -ffffffff82dad9d0 r gfx11_SECT_CONTEXT_def_3 -ffffffff82dad9e0 r gfx11_SECT_CONTEXT_def_5 -ffffffff82dad9e8 r gfx11_SECT_CONTEXT_def_6 -ffffffff82dad9f0 r gfx11_SECT_CONTEXT_def_2 -ffffffff82dade30 r gfx11_SECT_CONTEXT_def_4 -ffffffff82dae0b0 r gfx11_SECT_CONTEXT_def_7 -ffffffff82dae520 r golden_settings_gc_11_0_1 -ffffffff82dae600 r golden_settings_gc_11_0 -ffffffff82daf000 r gfx_v8_0_ip_funcs -ffffffff82daf0a8 R gfx_v8_0_ip_block -ffffffff82daf0c0 R gfx_v8_1_ip_block -ffffffff82daf0d8 r gfx_v8_0_gfx_funcs -ffffffff82daf138 r gfx_v8_0_ring_funcs_kiq -ffffffff82daf278 r gfx_v8_0_ring_funcs_gfx -ffffffff82daf3b8 r gfx_v8_0_ring_funcs_compute -ffffffff82daf500 r amdgpu_gds_reg_offset -ffffffff82daf600 r gfx_v8_0_eop_irq_funcs -ffffffff82daf610 r gfx_v8_0_priv_reg_irq_funcs -ffffffff82daf620 r gfx_v8_0_priv_inst_irq_funcs -ffffffff82daf630 r gfx_v8_0_cp_ecc_error_irq_funcs -ffffffff82daf640 r gfx_v8_0_sq_irq_funcs -ffffffff82daf650 r sq_edc_source_names -ffffffff82daf688 r iceland_rlc_funcs -ffffffff82daf6f0 r vi_cs_data -ffffffff82daf710 r vi_SECT_CONTEXT_defs -ffffffff82daf790 r vi_SECT_CONTEXT_def_1 -ffffffff82dafae0 r vi_SECT_CONTEXT_def_3 -ffffffff82dafb00 r vi_SECT_CONTEXT_def_4 -ffffffff82dafd74 r vi_SECT_CONTEXT_def_5 -ffffffff82dafd7c r vi_SECT_CONTEXT_def_6 -ffffffff82dafd80 r vi_SECT_CONTEXT_def_2 -ffffffff82db01d0 r vi_SECT_CONTEXT_def_7 -ffffffff82db0580 r vgpr_init_compute_shader -ffffffff82db0690 r vgpr_init_regs -ffffffff82db0720 r sgpr1_init_regs -ffffffff82db07b0 r sgpr2_init_regs -ffffffff82db0840 r sec_ded_counter_registers -ffffffff82db08b0 r iceland_mgcg_cgcg_init -ffffffff82db0bb0 r golden_settings_iceland_a11 -ffffffff82db0c70 r iceland_golden_common_all -ffffffff82db0cd0 r fiji_mgcg_cgcg_init -ffffffff82db0e80 r golden_settings_fiji_a10 -ffffffff82db0f10 r fiji_golden_common_all -ffffffff82db0f90 r tonga_mgcg_cgcg_init -ffffffff82db1320 r golden_settings_tonga_a11 -ffffffff82db13e0 r tonga_golden_common_all -ffffffff82db1440 r golden_settings_vegam_a11 -ffffffff82db1510 r vegam_golden_common_all -ffffffff82db1560 r golden_settings_polaris11_a11 -ffffffff82db1630 r polaris11_golden_common_all -ffffffff82db1680 r golden_settings_polaris10_a11 -ffffffff82db1750 r polaris10_golden_common_all -ffffffff82db17b0 r cz_mgcg_cgcg_init -ffffffff82db1b40 r cz_golden_settings_a11 -ffffffff82db1bd0 r cz_golden_common_all -ffffffff82db1c30 r stoney_mgcg_cgcg_init -ffffffff82db1c70 r stoney_golden_settings_a11 -ffffffff82db1cf0 r stoney_golden_common_all -ffffffff82db2000 R gfx_v9_0_ras_ops -ffffffff82db2040 r gfx_v9_0_ip_funcs -ffffffff82db20e8 R gfx_v9_0_ip_block -ffffffff82db2100 r ras_gfx_subblocks -ffffffff82db2b80 r gfx_v9_0_edc_counter_regs -ffffffff82db2f20 r gfx_v9_0_ras_fields -ffffffff82db4000 r gfx_v9_0_gfx_funcs -ffffffff82db4060 r gfx_v9_0_kiq_pm4_funcs -ffffffff82db40a0 r gfx_v9_0_ring_funcs_kiq -ffffffff82db41e0 r gfx_v9_0_ring_funcs_gfx -ffffffff82db4320 r gfx_v9_0_sw_ring_funcs_gfx -ffffffff82db4460 r gfx_v9_0_ring_funcs_compute -ffffffff82db45a0 r gfx_v9_0_eop_irq_funcs -ffffffff82db45b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82db45c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82db45d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82db45e0 r gfx_v9_0_rlc_funcs -ffffffff82db4650 r gfx9_cs_data -ffffffff82db4670 r gfx9_SECT_CONTEXT_defs -ffffffff82db4700 r gfx9_SECT_CONTEXT_def_1 -ffffffff82db4a50 r gfx9_SECT_CONTEXT_def_3 -ffffffff82db4a60 r gfx9_SECT_CONTEXT_def_4 -ffffffff82db4cd4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82db4cdc r gfx9_SECT_CONTEXT_def_6 -ffffffff82db4ce0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82db4df0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82db5260 r gfx9_SECT_CONTEXT_def_8 -ffffffff82db54d0 r vgpr_init_compute_shader_arcturus -ffffffff82db5d60 r vgpr_init_regs_arcturus -ffffffff82db5ef0 r vgpr_init_regs -ffffffff82db6080 r sgpr1_init_regs -ffffffff82db6210 r sgpr2_init_regs -ffffffff82db63a0 r golden_settings_gc_9_0 -ffffffff82db6580 r golden_settings_gc_9_0_vg10 -ffffffff82db6730 r golden_settings_gc_9_2_1 -ffffffff82db68b0 r golden_settings_gc_9_2_1_vg12 -ffffffff82db69f0 r golden_settings_gc_9_0_vg20 -ffffffff82db6b00 r golden_settings_gc_9_4_1_arct -ffffffff82db6c10 r golden_settings_gc_9_1 -ffffffff82db6e50 r golden_settings_gc_9_1_rv2 -ffffffff82db7020 r golden_settings_gc_9_1_rv1 -ffffffff82db70d0 r golden_settings_gc_9_1_rn -ffffffff82db71f0 r golden_settings_gc_9_x_common -ffffffff82db8000 R gfx_v9_4_ras_ops -ffffffff82db8040 r gfx_v9_4_edc_counter_regs -ffffffff82db8420 r gfx_v9_4_ras_fields -ffffffff82dba000 R vgpr_init_regs_aldebaran -ffffffff82dba1b0 R sgpr112_init_regs_aldebaran -ffffffff82dba360 R sgpr96_init_regs_aldebaran -ffffffff82dba510 R sgpr64_init_regs_aldebaran -ffffffff82dba6c0 r golden_settings_gc_9_4_2_alde -ffffffff82dba720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82dba7b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82dba840 r sgpr112_init_compute_shader_aldebaran -ffffffff82dbaa60 r sgpr96_init_compute_shader_aldebaran -ffffffff82dbac50 r sgpr64_init_compute_shader_aldebaran -ffffffff82dbadc0 r vgpr_init_compute_shader_aldebaran -ffffffff82dbb6a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82dbba20 r gfx_v9_4_2_ras_fields -ffffffff82dbd3c0 r gfx_v9_4_2_utc_blocks -ffffffff82dbe000 r gfx_v9_4_3_ip_funcs -ffffffff82dbe0a8 R gfx_v9_4_3_ip_block -ffffffff82dbe0c0 r gfx_v9_4_3_kiq_pm4_funcs -ffffffff82dbe100 r gfx_v9_4_3_ring_funcs_kiq -ffffffff82dbe240 r gfx_v9_4_3_ring_funcs_compute -ffffffff82dbe380 r gfx_v9_4_3_eop_irq_funcs -ffffffff82dbe390 r gfx_v9_4_3_priv_reg_irq_funcs -ffffffff82dbe3a0 r gfx_v9_4_3_priv_inst_irq_funcs -ffffffff82dbe3b0 r gfx_v9_4_3_rlc_funcs -ffffffff82dbe418 r gfx_v9_4_3_gfx_funcs -ffffffff82dbe480 r gfx_v9_4_3_ce_reg_list -ffffffff82dbe810 r gfx_v9_4_3_ras_mem_list_array -ffffffff82dbe970 r gfx_v9_4_3_ue_reg_list -ffffffff82dbed30 r gfx_v9_4_3_ras_cp_mem_list -ffffffff82dbed80 r gfx_v9_4_3_ras_gcea_mem_list -ffffffff82dbeec0 r gfx_v9_4_3_ras_gc_cane_mem_list -ffffffff82dbeed0 r gfx_v9_4_3_ras_gcutcl2_mem_list -ffffffff82dbeee0 r gfx_v9_4_3_ras_gds_mem_list -ffffffff82dbeef0 r gfx_v9_4_3_ras_lds_mem_list -ffffffff82dbf110 r gfx_v9_4_3_ras_rlc_mem_list -ffffffff82dbf190 r gfx_v9_4_3_ras_sp_mem_list -ffffffff82dbf1a0 r gfx_v9_4_3_ras_spi_mem_list -ffffffff82dbf1e0 r gfx_v9_4_3_ras_sqc_mem_list -ffffffff82dbf350 r gfx_v9_4_3_ras_sq_mem_list -ffffffff82dbf390 r gfx_v9_4_3_ras_ta_mem_list -ffffffff82dbf3e0 r gfx_v9_4_3_ras_tcc_mem_list -ffffffff82dbf3f0 r gfx_v9_4_3_ras_tca_mem_list -ffffffff82dbf400 r gfx_v9_4_3_ras_tci_mem_list -ffffffff82dbf410 r gfx_v9_4_3_ras_tcp_mem_list -ffffffff82dbf5a0 r gfx_v9_4_3_ras_td_mem_list -ffffffff82dbf5d0 r gfx_v9_4_3_ras_tcx_mem_list -ffffffff82dbfb50 r gfx_v9_4_3_ras_atc_l2_mem_list -ffffffff82dbfb60 r gfx_v9_4_3_ras_utcl2_mem_list -ffffffff82dbfb70 r gfx_v9_4_3_ras_vml2_mem_list -ffffffff82dbfb80 r gfx_v9_4_3_ras_vml2_walker_mem_list -ffffffff82dc0000 R gfxhub_v1_0_funcs -ffffffff82dc1000 R gfxhub_v1_2_funcs -ffffffff82dc2000 R gfxhub_v2_0_funcs -ffffffff82dc2060 r gfxhub_v2_0_vmhub_funcs -ffffffff82dc2070 r gfxhub_client_ids -ffffffff82dc3000 R gfxhub_v2_1_funcs -ffffffff82dc3060 r gfxhub_v2_1_vmhub_funcs +ffffffff82d94500 r pin_offsets +ffffffff82d94520 r fiji_mgcg_cgcg_init +ffffffff82d94540 r golden_settings_fiji_a10 +ffffffff82d94570 r tonga_mgcg_cgcg_init +ffffffff82d94590 r golden_settings_tonga_a11 +ffffffff82d95000 r crtc_offsets +ffffffff82d95020 r dce_v11_0_ip_funcs +ffffffff82d950c8 R dce_v11_0_ip_block +ffffffff82d950e0 R dce_v11_2_ip_block +ffffffff82d950f8 r dce_v11_0_display_funcs +ffffffff82d95150 r hpd_offsets +ffffffff82d95168 r dce_v11_0_encoder_funcs +ffffffff82d95188 r dce_v11_0_dac_helper_funcs +ffffffff82d951f0 r dce_v11_0_dig_helper_funcs +ffffffff82d95258 r dce_v11_0_ext_helper_funcs +ffffffff82d952c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82d952f0 r dce_v11_0_crtc_irq_funcs +ffffffff82d95300 r dce_v11_0_pageflip_irq_funcs +ffffffff82d95310 r dce_v11_0_hpd_irq_funcs +ffffffff82d95320 r interrupt_status_offsets +ffffffff82d95380 r dce_v11_0_crtc_funcs +ffffffff82d95440 r dce_v11_0_crtc_helper_funcs +ffffffff82d954c0 r vga_control_regs +ffffffff82d954e0 r dig_offsets +ffffffff82d95510 r cz_mgcg_cgcg_init +ffffffff82d95530 r cz_golden_settings_a11 +ffffffff82d95550 r stoney_golden_settings_a11 +ffffffff82d95570 r polaris11_golden_settings_a11 +ffffffff82d955b0 r polaris10_golden_settings_a11 +ffffffff82d96000 R df_v1_7_funcs +ffffffff82d96070 r df_v1_7_channel_number +ffffffff82d97000 R df_v3_6_funcs +ffffffff82d97070 r df_v3_6_channel_number +ffffffff82d98000 R df_v4_3_funcs +ffffffff82d99000 r GC_BASE +ffffffff82d990a8 r HDP_BASE +ffffffff82d99150 r MMHUB_BASE +ffffffff82d991f8 r ATHUB_BASE +ffffffff82d992a0 r NBIO_BASE +ffffffff82d99348 r MP0_BASE +ffffffff82d993f0 r MP1_BASE +ffffffff82d99498 r VCN0_BASE +ffffffff82d99540 r DF_BASE +ffffffff82d995e8 r DCN_BASE +ffffffff82d99690 r OSSSYS_BASE +ffffffff82d99738 r SMUIO_BASE +ffffffff82d997e0 r THM_BASE +ffffffff82d9a000 r gfx_v10_0_ip_funcs +ffffffff82d9a0a8 R gfx_v10_0_ip_block +ffffffff82d9a0c0 r gfx_v10_0_gfx_funcs +ffffffff82d9a120 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82da03c0 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82da3de0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82daa080 r gfx_v10_0_kiq_pm4_funcs +ffffffff82daa0c0 r gfx_v10_0_ring_funcs_kiq +ffffffff82daa200 r gfx_v10_0_ring_funcs_gfx +ffffffff82daa340 r gfx_v10_0_ring_funcs_compute +ffffffff82daa480 r gfx_v10_0_eop_irq_funcs +ffffffff82daa490 r gfx_v10_0_kiq_irq_funcs +ffffffff82daa4a0 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82daa4b0 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82daa4c0 r gfx_v10_0_rlc_funcs +ffffffff82daa528 r gfx_v10_0_rlc_funcs_sriov +ffffffff82daa590 r gfx10_cs_data +ffffffff82daa5b0 r gfx10_SECT_CONTEXT_defs +ffffffff82daa640 r gfx10_SECT_CONTEXT_def_1 +ffffffff82daa9a0 r gfx10_SECT_CONTEXT_def_3 +ffffffff82daa9b0 r gfx10_SECT_CONTEXT_def_4 +ffffffff82daac28 r gfx10_SECT_CONTEXT_def_5 +ffffffff82daac30 r gfx10_SECT_CONTEXT_def_6 +ffffffff82daac40 r gfx10_SECT_CONTEXT_def_2 +ffffffff82dab080 r gfx10_SECT_CONTEXT_def_7 +ffffffff82dab190 r gfx10_SECT_CONTEXT_def_8 +ffffffff82dab4c0 r golden_settings_gc_10_1 +ffffffff82dab880 r golden_settings_gc_10_0_nv10 +ffffffff82dab880 r golden_settings_gc_10_1_1 +ffffffff82dabc10 r golden_settings_gc_10_1_2 +ffffffff82dabc10 r golden_settings_gc_10_1_nv14 +ffffffff82dac000 r golden_settings_gc_10_1_2_nv12 +ffffffff82dac000 r golden_settings_gc_10_3 +ffffffff82dac408 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82dac410 r golden_settings_gc_10_3_2 +ffffffff82dac800 r golden_settings_gc_10_3_vangogh +ffffffff82daca60 r golden_settings_gc_10_3_3 +ffffffff82dacc40 r golden_settings_gc_10_3_4 +ffffffff82dacfa0 r golden_settings_gc_10_3_5 +ffffffff82dad2a0 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82dad5d0 r golden_settings_gc_10_3_6 +ffffffff82dad7e0 r golden_settings_gc_10_3_7 +ffffffff82dae000 r gfx_v11_0_ip_funcs +ffffffff82dae0a8 R gfx_v11_0_ip_block +ffffffff82dae0c0 r gfx_v11_0_gfx_funcs +ffffffff82dae120 r gfx_v11_0_kiq_pm4_funcs +ffffffff82dae160 r gfx_v11_0_ring_funcs_kiq +ffffffff82dae2a0 r gfx_v11_0_ring_funcs_gfx +ffffffff82dae3e0 r gfx_v11_0_ring_funcs_compute +ffffffff82dae520 r gfx_v11_0_eop_irq_funcs +ffffffff82dae530 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82dae540 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82dae550 r gfx_v11_0_rlc_gc_fed_irq_funcs +ffffffff82dae560 r gfx_v11_0_rlc_funcs +ffffffff82dae5d0 r gfx11_cs_data +ffffffff82dae5f0 r gfx11_SECT_CONTEXT_defs +ffffffff82dae670 r gfx11_SECT_CONTEXT_def_1 +ffffffff82dae9d0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82dae9e0 r gfx11_SECT_CONTEXT_def_5 +ffffffff82dae9e8 r gfx11_SECT_CONTEXT_def_6 +ffffffff82dae9f0 r gfx11_SECT_CONTEXT_def_2 +ffffffff82daee30 r gfx11_SECT_CONTEXT_def_4 +ffffffff82daf0b0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82daf520 r golden_settings_gc_11_0_1 +ffffffff82daf600 r golden_settings_gc_11_0 +ffffffff82db0000 r gfx_v8_0_ip_funcs +ffffffff82db00a8 R gfx_v8_0_ip_block +ffffffff82db00c0 R gfx_v8_1_ip_block +ffffffff82db00d8 r gfx_v8_0_gfx_funcs +ffffffff82db0138 r gfx_v8_0_ring_funcs_kiq +ffffffff82db0278 r gfx_v8_0_ring_funcs_gfx +ffffffff82db03b8 r gfx_v8_0_ring_funcs_compute +ffffffff82db0500 r amdgpu_gds_reg_offset +ffffffff82db0600 r gfx_v8_0_eop_irq_funcs +ffffffff82db0610 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82db0620 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82db0630 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82db0640 r gfx_v8_0_sq_irq_funcs +ffffffff82db0650 r sq_edc_source_names +ffffffff82db0688 r iceland_rlc_funcs +ffffffff82db06f0 r vi_cs_data +ffffffff82db0710 r vi_SECT_CONTEXT_defs +ffffffff82db0790 r vi_SECT_CONTEXT_def_1 +ffffffff82db0ae0 r vi_SECT_CONTEXT_def_3 +ffffffff82db0b00 r vi_SECT_CONTEXT_def_4 +ffffffff82db0d74 r vi_SECT_CONTEXT_def_5 +ffffffff82db0d7c r vi_SECT_CONTEXT_def_6 +ffffffff82db0d80 r vi_SECT_CONTEXT_def_2 +ffffffff82db11d0 r vi_SECT_CONTEXT_def_7 +ffffffff82db1580 r vgpr_init_compute_shader +ffffffff82db1690 r vgpr_init_regs +ffffffff82db1720 r sgpr1_init_regs +ffffffff82db17b0 r sgpr2_init_regs +ffffffff82db1840 r sec_ded_counter_registers +ffffffff82db18b0 r iceland_mgcg_cgcg_init +ffffffff82db1bb0 r golden_settings_iceland_a11 +ffffffff82db1c70 r iceland_golden_common_all +ffffffff82db1cd0 r fiji_mgcg_cgcg_init +ffffffff82db1e80 r golden_settings_fiji_a10 +ffffffff82db1f10 r fiji_golden_common_all +ffffffff82db1f90 r tonga_mgcg_cgcg_init +ffffffff82db2320 r golden_settings_tonga_a11 +ffffffff82db23e0 r tonga_golden_common_all +ffffffff82db2440 r golden_settings_vegam_a11 +ffffffff82db2510 r vegam_golden_common_all +ffffffff82db2560 r golden_settings_polaris11_a11 +ffffffff82db2630 r polaris11_golden_common_all +ffffffff82db2680 r golden_settings_polaris10_a11 +ffffffff82db2750 r polaris10_golden_common_all +ffffffff82db27b0 r cz_mgcg_cgcg_init +ffffffff82db2b40 r cz_golden_settings_a11 +ffffffff82db2bd0 r cz_golden_common_all +ffffffff82db2c30 r stoney_mgcg_cgcg_init +ffffffff82db2c70 r stoney_golden_settings_a11 +ffffffff82db2cf0 r stoney_golden_common_all +ffffffff82db3000 R gfx_v9_0_ras_ops +ffffffff82db3040 r gfx_v9_0_ip_funcs +ffffffff82db30e8 R gfx_v9_0_ip_block +ffffffff82db3100 r ras_gfx_subblocks +ffffffff82db3b80 r gfx_v9_0_edc_counter_regs +ffffffff82db3f20 r gfx_v9_0_ras_fields +ffffffff82db5000 r gfx_v9_0_gfx_funcs +ffffffff82db5060 r gfx_v9_0_kiq_pm4_funcs +ffffffff82db50a0 r gfx_v9_0_ring_funcs_kiq +ffffffff82db51e0 r gfx_v9_0_ring_funcs_gfx +ffffffff82db5320 r gfx_v9_0_sw_ring_funcs_gfx +ffffffff82db5460 r gfx_v9_0_ring_funcs_compute +ffffffff82db55a0 r gfx_v9_0_eop_irq_funcs +ffffffff82db55b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82db55c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82db55d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82db55e0 r gfx_v9_0_rlc_funcs +ffffffff82db5650 r gfx9_cs_data +ffffffff82db5670 r gfx9_SECT_CONTEXT_defs +ffffffff82db5700 r gfx9_SECT_CONTEXT_def_1 +ffffffff82db5a50 r gfx9_SECT_CONTEXT_def_3 +ffffffff82db5a60 r gfx9_SECT_CONTEXT_def_4 +ffffffff82db5cd4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82db5cdc r gfx9_SECT_CONTEXT_def_6 +ffffffff82db5ce0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82db5df0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82db6260 r gfx9_SECT_CONTEXT_def_8 +ffffffff82db64d0 r vgpr_init_compute_shader_arcturus +ffffffff82db6d60 r vgpr_init_regs_arcturus +ffffffff82db6ef0 r vgpr_init_regs +ffffffff82db7080 r sgpr1_init_regs +ffffffff82db7210 r sgpr2_init_regs +ffffffff82db73a0 r golden_settings_gc_9_0 +ffffffff82db7580 r golden_settings_gc_9_0_vg10 +ffffffff82db7730 r golden_settings_gc_9_2_1 +ffffffff82db78b0 r golden_settings_gc_9_2_1_vg12 +ffffffff82db79f0 r golden_settings_gc_9_0_vg20 +ffffffff82db7b00 r golden_settings_gc_9_4_1_arct +ffffffff82db7c10 r golden_settings_gc_9_1 +ffffffff82db7e50 r golden_settings_gc_9_1_rv2 +ffffffff82db8020 r golden_settings_gc_9_1_rv1 +ffffffff82db80d0 r golden_settings_gc_9_1_rn +ffffffff82db81f0 r golden_settings_gc_9_x_common +ffffffff82db9000 R gfx_v9_4_ras_ops +ffffffff82db9040 r gfx_v9_4_edc_counter_regs +ffffffff82db9420 r gfx_v9_4_ras_fields +ffffffff82dbb000 R vgpr_init_regs_aldebaran +ffffffff82dbb1b0 R sgpr112_init_regs_aldebaran +ffffffff82dbb360 R sgpr96_init_regs_aldebaran +ffffffff82dbb510 R sgpr64_init_regs_aldebaran +ffffffff82dbb6c0 r golden_settings_gc_9_4_2_alde +ffffffff82dbb720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82dbb7b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82dbb840 r sgpr112_init_compute_shader_aldebaran +ffffffff82dbba60 r sgpr96_init_compute_shader_aldebaran +ffffffff82dbbc50 r sgpr64_init_compute_shader_aldebaran +ffffffff82dbbdc0 r vgpr_init_compute_shader_aldebaran +ffffffff82dbc6a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82dbca20 r gfx_v9_4_2_ras_fields +ffffffff82dbe3c0 r gfx_v9_4_2_utc_blocks +ffffffff82dbf000 r gfx_v9_4_3_ip_funcs +ffffffff82dbf0a8 R gfx_v9_4_3_ip_block +ffffffff82dbf0c0 r gfx_v9_4_3_kiq_pm4_funcs +ffffffff82dbf100 r gfx_v9_4_3_ring_funcs_kiq +ffffffff82dbf240 r gfx_v9_4_3_ring_funcs_compute +ffffffff82dbf380 r gfx_v9_4_3_eop_irq_funcs +ffffffff82dbf390 r gfx_v9_4_3_priv_reg_irq_funcs +ffffffff82dbf3a0 r gfx_v9_4_3_priv_inst_irq_funcs +ffffffff82dbf3b0 r gfx_v9_4_3_rlc_funcs +ffffffff82dbf418 r gfx_v9_4_3_gfx_funcs +ffffffff82dbf480 r gfx_v9_4_3_ce_reg_list +ffffffff82dbf810 r gfx_v9_4_3_ras_mem_list_array +ffffffff82dbf970 r gfx_v9_4_3_ue_reg_list +ffffffff82dbfd30 r gfx_v9_4_3_ras_cp_mem_list +ffffffff82dbfd80 r gfx_v9_4_3_ras_gcea_mem_list +ffffffff82dbfec0 r gfx_v9_4_3_ras_gc_cane_mem_list +ffffffff82dbfed0 r gfx_v9_4_3_ras_gcutcl2_mem_list +ffffffff82dbfee0 r gfx_v9_4_3_ras_gds_mem_list +ffffffff82dbfef0 r gfx_v9_4_3_ras_lds_mem_list +ffffffff82dc0110 r gfx_v9_4_3_ras_rlc_mem_list +ffffffff82dc0190 r gfx_v9_4_3_ras_sp_mem_list +ffffffff82dc01a0 r gfx_v9_4_3_ras_spi_mem_list +ffffffff82dc01e0 r gfx_v9_4_3_ras_sqc_mem_list +ffffffff82dc0350 r gfx_v9_4_3_ras_sq_mem_list +ffffffff82dc0390 r gfx_v9_4_3_ras_ta_mem_list +ffffffff82dc03e0 r gfx_v9_4_3_ras_tcc_mem_list +ffffffff82dc03f0 r gfx_v9_4_3_ras_tca_mem_list +ffffffff82dc0400 r gfx_v9_4_3_ras_tci_mem_list +ffffffff82dc0410 r gfx_v9_4_3_ras_tcp_mem_list +ffffffff82dc05a0 r gfx_v9_4_3_ras_td_mem_list +ffffffff82dc05d0 r gfx_v9_4_3_ras_tcx_mem_list +ffffffff82dc0b50 r gfx_v9_4_3_ras_atc_l2_mem_list +ffffffff82dc0b60 r gfx_v9_4_3_ras_utcl2_mem_list +ffffffff82dc0b70 r gfx_v9_4_3_ras_vml2_mem_list +ffffffff82dc0b80 r gfx_v9_4_3_ras_vml2_walker_mem_list +ffffffff82dc1000 R gfxhub_v1_0_funcs +ffffffff82dc2000 R gfxhub_v1_2_funcs +ffffffff82dc3000 R gfxhub_v2_0_funcs +ffffffff82dc3060 r gfxhub_v2_0_vmhub_funcs ffffffff82dc3070 r gfxhub_client_ids -ffffffff82dc4000 R gfxhub_v3_0_funcs -ffffffff82dc4060 r gfxhub_v3_0_vmhub_funcs +ffffffff82dc4000 R gfxhub_v2_1_funcs +ffffffff82dc4060 r gfxhub_v2_1_vmhub_funcs ffffffff82dc4070 r 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sdma_v4_4_2_ip_block -ffffffff82e060c0 r sdma_v4_4_2_ring_funcs -ffffffff82e06200 r sdma_v4_4_2_page_ring_funcs -ffffffff82e06340 r sdma_v4_4_2_buffer_funcs -ffffffff82e06360 r sdma_v4_4_2_vm_pte_funcs -ffffffff82e06380 r sdma_v4_4_2_trap_irq_funcs -ffffffff82e06390 r sdma_v4_4_2_illegal_inst_irq_funcs -ffffffff82e063a0 r sdma_v4_4_2_ecc_irq_funcs -ffffffff82e063b0 r sdma_v4_4_2_vm_hole_irq_funcs -ffffffff82e063c0 r sdma_v4_4_2_doorbell_invalid_irq_funcs -ffffffff82e063d0 r sdma_v4_4_2_pool_timeout_irq_funcs -ffffffff82e063e0 r sdma_v4_4_2_srbm_write_irq_funcs -ffffffff82e063f0 r sdma_v4_4_2_ras_hw_ops -ffffffff82e06430 r sdma_v4_2_2_ue_reg_list -ffffffff82e06460 r sdma_v4_4_2_ras_memory_list -ffffffff82e07000 R sdma_v5_0_ip_funcs -ffffffff82e070a8 R sdma_v5_0_ip_block -ffffffff82e070c0 r sdma_v5_0_ring_funcs -ffffffff82e07200 r sdma_v5_0_buffer_funcs -ffffffff82e07220 r sdma_v5_0_vm_pte_funcs -ffffffff82e07240 r sdma_v5_0_trap_irq_funcs -ffffffff82e07250 r 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nbio_v4_3_hdp_flush_reg +ffffffff82df3048 R nbio_v4_3_funcs +ffffffff82df3158 R nbio_v4_3_sriov_funcs +ffffffff82df3268 r nbio_v4_3_ras_err_event_athub_irq_funcs +ffffffff82df4000 R nbio_v6_1_hdp_flush_reg +ffffffff82df4048 R nbio_v6_1_funcs +ffffffff82df5000 R nbio_v7_0_hdp_flush_reg +ffffffff82df5048 R nbio_v7_0_funcs +ffffffff82df6000 R nbio_v7_2_hdp_flush_reg +ffffffff82df6048 R nbio_v7_2_funcs +ffffffff82df7000 R nbio_v7_4_hdp_flush_reg +ffffffff82df7048 R nbio_v7_4_ras_hw_ops +ffffffff82df7088 R nbio_v7_4_funcs +ffffffff82df7198 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82df71a8 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82df8000 R nbio_v7_7_hdp_flush_reg +ffffffff82df8048 R nbio_v7_7_funcs +ffffffff82df9000 R nbio_v7_9_hdp_flush_reg +ffffffff82df9048 R nbio_v7_9_funcs +ffffffff82df9158 R nbio_v7_9_ras_hw_ops +ffffffff82df9198 r nbio_v7_9_ras_controller_irq_funcs +ffffffff82df91a8 r nbio_v7_9_ras_err_event_athub_irq_funcs +ffffffff82dfa000 r nv_common_ip_funcs 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psp_v13_0_funcs +ffffffff82e00000 r psp_v13_0_4_funcs +ffffffff82e01000 r psp_v3_1_funcs +ffffffff82e02000 r sdma_v2_4_ip_funcs +ffffffff82e020a8 R sdma_v2_4_ip_block +ffffffff82e020c0 r sdma_v2_4_ring_funcs +ffffffff82e02200 r sdma_v2_4_buffer_funcs +ffffffff82e02220 r sdma_v2_4_vm_pte_funcs +ffffffff82e02240 r sdma_v2_4_trap_irq_funcs +ffffffff82e02250 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82e02260 r iceland_mgcg_cgcg_init +ffffffff82e02280 r golden_settings_iceland_a11 +ffffffff82e03000 r sdma_v3_0_ip_funcs +ffffffff82e030a8 R sdma_v3_0_ip_block +ffffffff82e030c0 R sdma_v3_1_ip_block +ffffffff82e030d8 r sdma_v3_0_ring_funcs +ffffffff82e03218 r sdma_v3_0_buffer_funcs +ffffffff82e03238 r sdma_v3_0_vm_pte_funcs +ffffffff82e03258 r sdma_v3_0_trap_irq_funcs +ffffffff82e03268 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82e03280 r fiji_mgcg_cgcg_init +ffffffff82e032a0 r golden_settings_fiji_a10 +ffffffff82e03300 r tonga_mgcg_cgcg_init +ffffffff82e03320 r golden_settings_tonga_a11 +ffffffff82e033a0 r golden_settings_polaris11_a11 +ffffffff82e03420 r golden_settings_polaris10_a11 +ffffffff82e034a0 r cz_mgcg_cgcg_init +ffffffff82e034c0 r cz_golden_settings_a11 +ffffffff82e03550 r stoney_mgcg_cgcg_init +ffffffff82e03560 r stoney_golden_settings_a11 +ffffffff82e04000 R sdma_v4_0_ip_funcs +ffffffff82e040a8 R sdma_v4_0_ras_hw_ops +ffffffff82e040e8 R sdma_v4_0_ip_block +ffffffff82e04100 r sdma_v4_0_ring_funcs +ffffffff82e04240 r sdma_v4_0_page_ring_funcs +ffffffff82e04380 r sdma_v4_0_buffer_funcs +ffffffff82e043a0 r sdma_v4_0_vm_pte_funcs +ffffffff82e043c0 r sdma_v4_0_trap_irq_funcs +ffffffff82e043d0 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82e043e0 r sdma_v4_0_ecc_irq_funcs +ffffffff82e043f0 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82e04400 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82e04410 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82e04420 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82e04430 r golden_settings_sdma_4 +ffffffff82e04690 r golden_settings_sdma_vg10 +ffffffff82e04740 r golden_settings_sdma_vg12 +ffffffff82e047f0 r golden_settings_sdma0_4_2_init +ffffffff82e04810 r golden_settings_sdma0_4_2 +ffffffff82e04aa0 r golden_settings_sdma1_4_2 +ffffffff82e04d30 r golden_settings_sdma_arct +ffffffff82e05030 r golden_settings_sdma_aldebaran +ffffffff82e051a0 r golden_settings_sdma_4_1 +ffffffff82e052b0 r golden_settings_sdma_rv2 +ffffffff82e052e0 r golden_settings_sdma_rv1 +ffffffff82e05310 r golden_settings_sdma_4_3 +ffffffff82e05400 r sdma_v4_0_ras_fields +ffffffff82e06000 R sdma_v4_4_ras_hw_ops +ffffffff82e06040 r sdma_v4_4_ras_fields +ffffffff82e07000 R sdma_v4_4_2_ip_funcs +ffffffff82e070a8 R sdma_v4_4_2_ip_block +ffffffff82e070c0 r sdma_v4_4_2_ring_funcs +ffffffff82e07200 r sdma_v4_4_2_page_ring_funcs +ffffffff82e07340 r sdma_v4_4_2_buffer_funcs +ffffffff82e07360 r sdma_v4_4_2_vm_pte_funcs +ffffffff82e07380 r sdma_v4_4_2_trap_irq_funcs +ffffffff82e07390 r sdma_v4_4_2_illegal_inst_irq_funcs +ffffffff82e073a0 r sdma_v4_4_2_ecc_irq_funcs +ffffffff82e073b0 r sdma_v4_4_2_vm_hole_irq_funcs +ffffffff82e073c0 r sdma_v4_4_2_doorbell_invalid_irq_funcs +ffffffff82e073d0 r sdma_v4_4_2_pool_timeout_irq_funcs +ffffffff82e073e0 r sdma_v4_4_2_srbm_write_irq_funcs +ffffffff82e073f0 r sdma_v4_4_2_ras_hw_ops +ffffffff82e07430 r sdma_v4_2_2_ue_reg_list +ffffffff82e07460 r sdma_v4_4_2_ras_memory_list +ffffffff82e08000 R sdma_v5_0_ip_funcs +ffffffff82e080a8 R sdma_v5_0_ip_block +ffffffff82e080c0 r sdma_v5_0_ring_funcs +ffffffff82e08200 r sdma_v5_0_buffer_funcs +ffffffff82e08220 r sdma_v5_0_vm_pte_funcs +ffffffff82e08240 r sdma_v5_0_trap_irq_funcs +ffffffff82e08250 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82e08260 r golden_settings_sdma_5 +ffffffff82e084a0 r golden_settings_sdma_nv10 +ffffffff82e084d0 r golden_settings_sdma_nv14 +ffffffff82e08500 r golden_settings_sdma_5_sriov +ffffffff82e086e0 r golden_settings_sdma_nv12 +ffffffff82e08770 r golden_settings_sdma_cyan_skillfish +ffffffff82e09000 R sdma_v5_2_ip_funcs +ffffffff82e090a8 R sdma_v5_2_ip_block +ffffffff82e090c0 r sdma_v5_2_ring_funcs +ffffffff82e09200 r sdma_v5_2_buffer_funcs +ffffffff82e09220 r sdma_v5_2_vm_pte_funcs +ffffffff82e09240 r sdma_v5_2_trap_irq_funcs +ffffffff82e09250 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82e0a000 R sdma_v6_0_ip_funcs +ffffffff82e0a0a8 R sdma_v6_0_ip_block +ffffffff82e0a0c0 r sdma_v6_0_ring_funcs +ffffffff82e0a200 r sdma_v6_0_buffer_funcs +ffffffff82e0a220 r sdma_v6_0_vm_pte_funcs +ffffffff82e0a240 r sdma_v6_0_trap_irq_funcs +ffffffff82e0a250 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82e0b000 r smu_v11_0_i2c_algo +ffffffff82e0b010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82e0b028 r smu_v11_0_i2c_control_quirks +ffffffff82e0c000 R smuio_v11_0_funcs +ffffffff82e0d000 R smuio_v11_0_6_funcs +ffffffff82e0e000 R smuio_v13_0_funcs +ffffffff82e0f000 R smuio_v13_0_3_funcs +ffffffff82e10000 R smuio_v13_0_6_funcs +ffffffff82e11000 R smuio_v9_0_funcs +ffffffff82e12000 r soc15_common_ip_funcs +ffffffff82e120a8 R vega10_common_ip_block +ffffffff82e120c0 r soc15_asic_funcs +ffffffff82e12180 r vega20_asic_funcs +ffffffff82e12240 r aqua_vanjaram_asic_funcs +ffffffff82e12300 r soc15_allowed_read_registers +ffffffff82e12490 r vega_video_codecs_encode +ffffffff82e124a0 r vega_video_codecs_decode +ffffffff82e124b0 r rv_video_codecs_decode +ffffffff82e124c0 r rn_video_codecs_decode +ffffffff82e124d0 r vcn_4_0_3_video_codecs_encode +ffffffff82e124e0 r vcn_4_0_3_video_codecs_decode +ffffffff82e124f0 r vega_video_codecs_encode_array +ffffffff82e12520 r vega_video_codecs_decode_array +ffffffff82e125a0 r rv_video_codecs_decode_array +ffffffff82e12630 r rn_video_codecs_decode_array +ffffffff82e126c0 r vcn_4_0_3_video_codecs_decode_array +ffffffff82e13000 r soc21_common_ip_funcs +ffffffff82e130a8 R soc21_common_ip_block +ffffffff82e130c0 r soc21_asic_funcs +ffffffff82e13180 r soc21_allowed_read_registers +ffffffff82e13300 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82e13310 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82e13320 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82e13330 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82e13340 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82e13370 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82e133c0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82e13400 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82e14000 r tonga_ih_ip_funcs +ffffffff82e140a8 R tonga_ih_ip_block +ffffffff82e140c0 r tonga_ih_funcs +ffffffff82e15000 R umc_v6_0_funcs +ffffffff82e16000 R umc_v6_1_channel_idx_tbl +ffffffff82e16080 R umc_v6_1_ras_hw_ops +ffffffff82e17000 R umc_v6_7_channel_idx_tbl_second +ffffffff82e17080 R umc_v6_7_channel_idx_tbl_first +ffffffff82e17100 R umc_v6_7_ras_hw_ops +ffffffff82e18000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82e18040 R umc_v8_10_channel_idx_tbl_ext0 +ffffffff82e18080 R umc_v8_10_channel_idx_tbl +ffffffff82e180e0 R umc_v8_10_ras_hw_ops +ffffffff82e19000 R umc_v8_7_channel_idx_tbl +ffffffff82e19040 R umc_v8_7_ras_hw_ops +ffffffff82e1a000 r uvd_v5_0_ip_funcs +ffffffff82e1a0a8 R uvd_v5_0_ip_block +ffffffff82e1a0c0 r uvd_v5_0_ring_funcs +ffffffff82e1a200 r uvd_v5_0_irq_funcs +ffffffff82e1b000 r uvd_v6_0_ip_funcs +ffffffff82e1b0a8 R uvd_v6_0_ip_block +ffffffff82e1b0c0 R uvd_v6_2_ip_block +ffffffff82e1b0d8 R uvd_v6_3_ip_block +ffffffff82e1b0f0 r uvd_v6_0_ring_vm_funcs +ffffffff82e1b230 r uvd_v6_0_ring_phys_funcs +ffffffff82e1b370 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82e1b4b0 r uvd_v6_0_irq_funcs +ffffffff82e1c000 R uvd_v7_0_ip_funcs +ffffffff82e1c0a8 R uvd_v7_0_ip_block +ffffffff82e1c0c0 r uvd_v7_0_ring_vm_funcs +ffffffff82e1c200 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82e1c340 r uvd_v7_0_irq_funcs +ffffffff82e1d000 r vce_v3_0_ip_funcs +ffffffff82e1d0a8 R vce_v3_0_ip_block +ffffffff82e1d0c0 R vce_v3_1_ip_block +ffffffff82e1d0d8 R vce_v3_4_ip_block +ffffffff82e1d0f0 r vce_v3_0_ring_vm_funcs +ffffffff82e1d230 r vce_v3_0_ring_phys_funcs +ffffffff82e1d370 r vce_v3_0_irq_funcs +ffffffff82e1e000 R vce_v4_0_ip_funcs +ffffffff82e1e0a8 R vce_v4_0_ip_block +ffffffff82e1e0c0 r vce_v4_0_ring_vm_funcs +ffffffff82e1e200 r vce_v4_0_irq_funcs +ffffffff82e1f000 r vcn_v1_0_ip_funcs +ffffffff82e1f0a8 R vcn_v1_0_ip_block +ffffffff82e1f0c0 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82e1f200 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82e1f340 r vcn_v1_0_irq_funcs +ffffffff82e20000 r vcn_v2_0_ip_funcs +ffffffff82e200a8 R vcn_v2_0_ip_block +ffffffff82e200c0 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82e20200 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82e20340 r vcn_v2_0_irq_funcs +ffffffff82e21000 r vcn_v2_5_ip_funcs +ffffffff82e210a8 R vcn_v2_5_ip_block +ffffffff82e210c0 r vcn_v2_6_ip_funcs +ffffffff82e21168 R vcn_v2_6_ip_block +ffffffff82e21180 R vcn_v2_6_ras_hw_ops +ffffffff82e211c0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82e21300 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82e21440 r vcn_v2_5_irq_funcs +ffffffff82e21450 r vcn_v2_6_ras_irq_funcs +ffffffff82e22000 r vcn_v3_0_ip_funcs +ffffffff82e220a8 R vcn_v3_0_ip_block +ffffffff82e220c0 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82e22200 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82e22340 r vcn_v3_0_irq_funcs +ffffffff82e23000 r vcn_v4_0_ip_funcs +ffffffff82e230a8 R vcn_v4_0_ip_block +ffffffff82e230c0 R vcn_v4_0_ras_hw_ops +ffffffff82e23100 r vcn_v4_0_irq_funcs +ffffffff82e23110 r vcn_v4_0_ras_irq_funcs +ffffffff82e24000 r vcn_v4_0_3_ip_funcs +ffffffff82e240a8 R vcn_v4_0_3_ip_block +ffffffff82e240c0 r vcn_v4_0_3_unified_ring_vm_funcs +ffffffff82e24200 r vcn_v4_0_3_irq_funcs +ffffffff82e24210 r vcn_v4_0_3_ras_hw_ops +ffffffff82e24250 r vcn_v4_0_3_ue_reg_list +ffffffff82e25000 R vega10_ih_ip_funcs +ffffffff82e250a8 R vega10_ih_ip_block +ffffffff82e250c0 r vega10_ih_funcs +ffffffff82e250e0 r vega10_ih_self_irq_funcs +ffffffff82e26000 r GC_BASE +ffffffff82e26064 r HDP_BASE +ffffffff82e260c8 r MMHUB_BASE +ffffffff82e2612c r ATHUB_BASE +ffffffff82e26190 r NBIO_BASE +ffffffff82e261f4 r MP0_BASE +ffffffff82e26258 r MP1_BASE +ffffffff82e262bc r VCE_BASE +ffffffff82e26320 r VCN_BASE +ffffffff82e26384 r DF_BASE +ffffffff82e263e8 r DCE_BASE +ffffffff82e2644c r OSSSYS_BASE +ffffffff82e264b0 r SDMA0_BASE +ffffffff82e26514 r SDMA1_BASE +ffffffff82e26578 r SMUIO_BASE +ffffffff82e265dc r PWR_BASE +ffffffff82e26640 r NBIF_BASE +ffffffff82e266a4 r THM_BASE +ffffffff82e26708 r CLK_BASE +ffffffff82e27000 R vega20_ih_ip_funcs +ffffffff82e270a8 R vega20_ih_ip_block +ffffffff82e270c0 r vega20_ih_funcs +ffffffff82e270e0 r vega20_ih_self_irq_funcs +ffffffff82e28000 r GC_BASE +ffffffff82e28090 r HDP_BASE +ffffffff82e28120 r MMHUB_BASE +ffffffff82e281b0 r ATHUB_BASE +ffffffff82e28240 r NBIO_BASE +ffffffff82e282d0 r MP0_BASE +ffffffff82e28360 r MP1_BASE +ffffffff82e283f0 r UVD_BASE +ffffffff82e28480 r VCE_BASE +ffffffff82e28510 r DF_BASE +ffffffff82e285a0 r DCE_BASE +ffffffff82e28630 r OSSSYS_BASE +ffffffff82e286c0 r SDMA0_BASE +ffffffff82e28750 r SDMA1_BASE +ffffffff82e287e0 r SMUIO_BASE +ffffffff82e28870 r THM_BASE +ffffffff82e28900 r CLK_BASE +ffffffff82e28990 r UMC_BASE +ffffffff82e28a20 r RSMU_BASE +ffffffff82e29000 r vi_common_ip_block +ffffffff82e29018 r vi_common_ip_funcs +ffffffff82e290c0 r vi_asic_funcs +ffffffff82e29180 r vi_allowed_read_registers +ffffffff82e293e0 r topaz_video_codecs_encode +ffffffff82e293f0 r topaz_video_codecs_decode +ffffffff82e29400 r tonga_video_codecs_encode +ffffffff82e29410 r tonga_video_codecs_decode +ffffffff82e29420 r polaris_video_codecs_encode +ffffffff82e29430 r cz_video_codecs_decode +ffffffff82e29440 r tonga_video_codecs_encode_array +ffffffff82e29460 r tonga_video_codecs_decode_array +ffffffff82e294b0 r polaris_video_codecs_encode_array +ffffffff82e294e0 r cz_video_codecs_decode_array +ffffffff82e29560 r iceland_mgcg_cgcg_init +ffffffff82e295a0 r fiji_mgcg_cgcg_init +ffffffff82e29600 r tonga_mgcg_cgcg_init +ffffffff82e29660 r cz_mgcg_cgcg_init +ffffffff82e296a0 r stoney_mgcg_cgcg_init +ffffffff82e2a000 r amdgpu_dm_funcs +ffffffff82e2a0a8 R dm_ip_block +ffffffff82e2a0c0 R amdgpu_dm_encoder_helper_funcs +ffffffff82e2a128 r dm_display_funcs +ffffffff82e2a180 r hpd_disconnect_quirk_table +ffffffff82e2aef0 r amdgpu_dm_mode_funcs +ffffffff82e2af38 r amdgpu_dm_audio_component_bind_ops +ffffffff82e2af48 r amdgpu_dm_audio_component_ops +ffffffff82e2af80 r amdgpu_dm_encoder_funcs +ffffffff82e2afa0 r amdgpu_dm_connector_funcs +ffffffff82e2b018 r amdgpu_dm_connector_helper_funcs +ffffffff82e2b078 r amdgpu_dm_i2c_algo +ffffffff82e2b088 r amdgpu_dm_backlight_ops +ffffffff82e2b260 r add_fs_modes.common_rates +ffffffff82e2c000 r amdgpu_dm_crtc_funcs +ffffffff82e2c0c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82e2d000 r dm_dtn_log_begin.msg +ffffffff82e2d00d r dm_dtn_log_end.msg +ffffffff82e2d018 r SYNAPTICS_DEVICE_ID +ffffffff82e2e000 r dm_crtc_irq_funcs +ffffffff82e2e010 r dm_vline0_irq_funcs +ffffffff82e2e020 r dm_dmub_outbox_irq_funcs +ffffffff82e2e030 r dm_vupdate_irq_funcs +ffffffff82e2e040 r dm_dmub_trace_irq_funcs +ffffffff82e2e050 r dm_pageflip_irq_funcs +ffffffff82e2e060 r dm_hpd_irq_funcs +ffffffff82e2f000 r amdgpu_dm_encoder_funcs +ffffffff82e2f020 r dm_mst_cbs +ffffffff82e2f030 r dm_dp_mst_connector_funcs +ffffffff82e2f0a8 r dm_dp_mst_connector_helper_funcs +ffffffff82e30000 r dm_plane_funcs +ffffffff82e30068 r dm_plane_helper_funcs ffffffff82e32000 r vbios_funcs -ffffffff82e37000 r command_table_helper_funcs +ffffffff82e33000 r vbios_funcs ffffffff82e38000 r command_table_helper_funcs ffffffff82e39000 r command_table_helper_funcs ffffffff82e3a000 r command_table_helper_funcs -ffffffff82e3b000 r dce80_max_clks_by_state -ffffffff82e3b028 r disp_clk_regs -ffffffff82e3b07c r disp_clk_shift -ffffffff82e3b088 r disp_clk_mask -ffffffff82e3c000 r dce110_max_clks_by_state +ffffffff82e3b000 r command_table_helper_funcs +ffffffff82e3c000 r dce80_max_clks_by_state ffffffff82e3c028 r disp_clk_regs ffffffff82e3c07c r disp_clk_shift ffffffff82e3c088 r disp_clk_mask -ffffffff82e3d000 r dce112_max_clks_by_state +ffffffff82e3d000 r dce110_max_clks_by_state ffffffff82e3d028 r disp_clk_regs ffffffff82e3d07c r disp_clk_shift ffffffff82e3d088 r disp_clk_mask -ffffffff82e3e000 r dce120_max_clks_by_state -ffffffff82e3f000 r clk_mgr_regs -ffffffff82e3f054 r clk_mgr_shift -ffffffff82e3f060 r clk_mgr_mask +ffffffff82e3e000 r dce112_max_clks_by_state +ffffffff82e3e028 r disp_clk_regs +ffffffff82e3e07c r disp_clk_shift +ffffffff82e3e088 r disp_clk_mask +ffffffff82e3f000 r dce120_max_clks_by_state ffffffff82e40000 r clk_mgr_regs ffffffff82e40054 r clk_mgr_shift ffffffff82e40060 r clk_mgr_mask ffffffff82e41000 r clk_mgr_regs ffffffff82e41054 r clk_mgr_shift ffffffff82e41060 r clk_mgr_mask -ffffffff82e42000 r lpddr5_wm_table -ffffffff82e420c0 r ddr5_wm_table +ffffffff82e42000 r clk_mgr_regs +ffffffff82e42054 r clk_mgr_shift +ffffffff82e42060 r clk_mgr_mask ffffffff82e43000 r lpddr5_wm_table ffffffff82e430c0 r ddr5_wm_table -ffffffff82e44000 r ddr5_wm_table -ffffffff82e45000 r lpddr5_wm_table -ffffffff82e450c0 r ddr4_wm_table -ffffffff82e46000 r clk_mgr_regs_dcn321 -ffffffff82e46054 r clk_mgr_shift_dcn321 -ffffffff82e46060 r clk_mgr_mask_dcn321 -ffffffff82e46084 r clk_mgr_regs_dcn32 -ffffffff82e460d8 r clk_mgr_shift_dcn32 -ffffffff82e460e4 r clk_mgr_mask_dcn32 -ffffffff82e47000 r DC_BUILD_ID -ffffffff82e49000 r output_csc_matrix -ffffffff82e490e0 r black_color_format -ffffffff82e4c000 r dce_funcs -ffffffff82e4d000 r funcs -ffffffff82e4e000 R video_optimized_pixel_rates -ffffffff82e4e1c0 r dce110_clk_src_funcs -ffffffff82e4e1e8 r dce112_clk_src_funcs -ffffffff82e4e210 r dcn20_clk_src_funcs -ffffffff82e4e238 r dcn3_clk_src_funcs -ffffffff82e4e260 r dcn31_clk_src_funcs -ffffffff82e4f000 r dce_funcs -ffffffff82e4f068 r dcn10_funcs -ffffffff82e4f0d0 r dcn20_funcs -ffffffff82e4f138 r dcn21_funcs -ffffffff82e50000 r dce_ipp_funcs -ffffffff82e51000 r dce110_lnk_enc_funcs -ffffffff82e52000 r dce_mi_funcs -ffffffff82e52090 r dce112_mi_funcs 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filter_6tap_64p_upscale -ffffffff82e56090 r filter_6tap_64p_116 -ffffffff82e56220 r filter_6tap_64p_149 -ffffffff82e563b0 r filter_6tap_64p_183 -ffffffff82e56540 r filter_7tap_64p_upscale -ffffffff82e56710 r filter_7tap_64p_116 -ffffffff82e568e0 r filter_7tap_64p_149 -ffffffff82e56ab0 r filter_7tap_64p_183 -ffffffff82e56c80 r filter_8tap_64p_upscale -ffffffff82e56e90 r filter_8tap_64p_116 -ffffffff82e570a0 r filter_8tap_64p_149 -ffffffff82e572b0 r filter_8tap_64p_183 -ffffffff82e574c0 r filter_2tap_16p -ffffffff82e574f0 r filter_2tap_64p -ffffffff82e58000 r dce110_str_enc_funcs -ffffffff82e58120 r audio_clock_info_table_48bpc -ffffffff82e582b0 r audio_clock_info_table_36bpc -ffffffff82e58440 r audio_clock_info_table -ffffffff82e59000 r global_color_matrix -ffffffff82e590a8 r dce_transform_funcs -ffffffff82e5a000 r abm_funcs -ffffffff82e5b000 r psr_funcs -ffffffff82e5b040 r DP_SINK_DEVICE_STR_ID_1 -ffffffff82e5b045 r DP_SINK_DEVICE_STR_ID_2 -ffffffff82e5c000 r replay_funcs -ffffffff82e5d000 r reg_offsets -ffffffff82e5e000 r bios_regs -ffffffff82e5e008 r res_cap -ffffffff82e5e048 r dce100_res_pool_funcs -ffffffff82e5e140 r clk_src_regs -ffffffff82e5e23c r dmcu_regs -ffffffff82e5e298 r dmcu_shift -ffffffff82e5e2ac r dmcu_mask -ffffffff82e5e2f8 r abm_regs -ffffffff82e5e360 r abm_shift -ffffffff82e5e384 r abm_mask -ffffffff82e5e410 r debug_defaults -ffffffff82e5e5c0 r dce100_tg_offsets -ffffffff82e5e608 r plane_cap -ffffffff82e5e638 r res_create_funcs -ffffffff82e5e670 r panel_cntl_regs -ffffffff82e5e690 r panel_cntl_shift -ffffffff82e5e6a0 r panel_cntl_mask -ffffffff82e5e6e0 r link_enc_regs -ffffffff82e5eaa0 r link_enc_aux_regs -ffffffff82e5eaf0 r link_enc_hpd_regs -ffffffff82e5eb08 r link_enc_feature -ffffffff82e5eb18 r cs_shift -ffffffff82e5eb24 r cs_mask -ffffffff82e5eb50 r mi_regs -ffffffff82e5ee68 r mi_shifts -ffffffff82e5eeb0 r mi_masks -ffffffff82e5efd0 r ipp_regs -ffffffff82e5f1c8 r ipp_shift -ffffffff82e5f1f0 r ipp_mask -ffffffff82e5f290 r xfm_regs -ffffffff82e5f830 r xfm_shift -ffffffff82e5f890 r xfm_mask -ffffffff82e5fa10 r opp_regs -ffffffff82e5fb60 r opp_shift -ffffffff82e5fb8c r opp_mask -ffffffff82e5fc40 r aux_engine_regs -ffffffff82e5fd30 r aux_mask -ffffffff82e5fd90 r aux_shift -ffffffff82e5fdb0 r i2c_hw_regs -ffffffff82e5ff00 r i2c_shifts -ffffffff82e5ff2c r i2c_masks -ffffffff82e5ffd0 r audio_regs -ffffffff82e60104 r audio_shift -ffffffff82e6011c r audio_mask -ffffffff82e60160 r stream_enc_regs -ffffffff82e6080c r se_shift -ffffffff82e60890 r se_mask -ffffffff82e60a94 r hwseq_reg -ffffffff82e60cb0 r hwseq_shift -ffffffff82e60d30 r hwseq_mask -ffffffff82e61000 r reg_offsets -ffffffff82e61018 r dce110_compressor_funcs -ffffffff82e62000 r dce110_funcs -ffffffff82e622e8 r dce110_private_funcs -ffffffff82e63000 r dce110_mem_input_v_funcs -ffffffff82e63090 r dvmm_Hw_Setting_1DTiling -ffffffff82e63120 r dvmm_Hw_Setting_2DTiling -ffffffff82e631b0 r dvmm_Hw_Setting_Linear -ffffffff82e64000 r global_color_matrix -ffffffff82e640b0 r input_csc_matrix -ffffffff82e65000 r funcs -ffffffff82e66000 r bios_regs -ffffffff82e66008 r dce110_res_pool_funcs -ffffffff82e66100 r debug_defaults -ffffffff82e662b0 r clk_src_regs -ffffffff82e663ac r dmcu_regs -ffffffff82e66408 r dmcu_shift -ffffffff82e6641c r dmcu_mask -ffffffff82e66468 r abm_regs -ffffffff82e664d0 r abm_shift -ffffffff82e664f4 r abm_mask -ffffffff82e66580 r dce110_tg_offsets -ffffffff82e665c8 r res_create_funcs -ffffffff82e665f8 r plane_cap -ffffffff82e66624 r underlay_plane_cap -ffffffff82e66650 r stoney_resource_cap -ffffffff82e6668c r carrizo_resource_cap -ffffffff82e666d0 r panel_cntl_regs -ffffffff82e666f0 r panel_cntl_shift -ffffffff82e66700 r panel_cntl_mask -ffffffff82e66740 r link_enc_regs -ffffffff82e66b00 r link_enc_aux_regs -ffffffff82e66b50 r link_enc_hpd_regs -ffffffff82e66b68 r link_enc_feature -ffffffff82e66b78 r cs_shift -ffffffff82e66b84 r cs_mask -ffffffff82e66bb0 r mi_regs -ffffffff82e66d3c r mi_shifts -ffffffff82e66d84 r mi_masks -ffffffff82e66ea0 r ipp_regs -ffffffff82e66f9c r ipp_shift -ffffffff82e66fc4 r ipp_mask -ffffffff82e67060 r xfm_regs -ffffffff82e67330 r xfm_shift -ffffffff82e67390 r xfm_mask -ffffffff82e67510 r opp_regs -ffffffff82e67660 r opp_shift -ffffffff82e6768c r opp_mask -ffffffff82e67740 r aux_engine_regs -ffffffff82e67830 r aux_mask -ffffffff82e67890 r aux_shift -ffffffff82e678b0 r i2c_hw_regs -ffffffff82e67a00 r i2c_shifts -ffffffff82e67a2c r i2c_masks -ffffffff82e67ad0 r audio_regs -ffffffff82e67c04 r audio_shift -ffffffff82e67c1c r audio_mask -ffffffff82e67c60 r stream_enc_regs -ffffffff82e67f3c r se_shift -ffffffff82e67fc0 r se_mask -ffffffff82e681c4 r hwseq_stoney_reg -ffffffff82e683e0 r hwseq_cz_reg -ffffffff82e685fc r hwseq_shift -ffffffff82e6867c r hwseq_mask -ffffffff82e69000 r dce110_tg_funcs -ffffffff82e6a000 r dce110_tg_v_funcs -ffffffff82e6b000 r dce110_xfmv_funcs -ffffffff82e6c000 r reg_offsets +ffffffff82e44000 r lpddr5_wm_table +ffffffff82e440c0 r ddr5_wm_table +ffffffff82e45000 r ddr5_wm_table +ffffffff82e46000 r lpddr5_wm_table +ffffffff82e460c0 r ddr4_wm_table +ffffffff82e47000 r clk_mgr_regs_dcn321 +ffffffff82e47054 r clk_mgr_shift_dcn321 +ffffffff82e47060 r clk_mgr_mask_dcn321 +ffffffff82e47084 r clk_mgr_regs_dcn32 +ffffffff82e470d8 r clk_mgr_shift_dcn32 +ffffffff82e470e4 r clk_mgr_mask_dcn32 +ffffffff82e48000 r DC_BUILD_ID +ffffffff82e4a000 r output_csc_matrix +ffffffff82e4a0e0 r black_color_format +ffffffff82e4d000 r dce_funcs +ffffffff82e4e000 r funcs +ffffffff82e4f000 R video_optimized_pixel_rates +ffffffff82e4f1c0 r dce110_clk_src_funcs +ffffffff82e4f1e8 r dce112_clk_src_funcs +ffffffff82e4f210 r dcn20_clk_src_funcs +ffffffff82e4f238 r dcn3_clk_src_funcs +ffffffff82e4f260 r dcn31_clk_src_funcs +ffffffff82e50000 r dce_funcs +ffffffff82e50068 r dcn10_funcs +ffffffff82e500d0 r dcn20_funcs +ffffffff82e50138 r dcn21_funcs +ffffffff82e51000 r dce_ipp_funcs +ffffffff82e52000 r dce110_lnk_enc_funcs +ffffffff82e53000 r dce_mi_funcs +ffffffff82e53090 r dce112_mi_funcs +ffffffff82e53120 r dce120_mi_funcs +ffffffff82e531b0 r pte_settings +ffffffff82e54000 r funcs +ffffffff82e55000 r dce_link_panel_cntl_funcs +ffffffff82e56000 r filter_3tap_16p_upscale +ffffffff82e56040 r filter_3tap_16p_116 +ffffffff82e56080 r filter_3tap_16p_149 +ffffffff82e560c0 r filter_3tap_16p_183 +ffffffff82e56100 r filter_3tap_64p_upscale +ffffffff82e561d0 r filter_3tap_64p_116 +ffffffff82e562a0 r filter_3tap_64p_149 +ffffffff82e56370 r filter_3tap_64p_183 +ffffffff82e56440 r filter_4tap_16p_upscale +ffffffff82e56490 r filter_4tap_16p_116 +ffffffff82e564e0 r filter_4tap_16p_149 +ffffffff82e56530 r filter_4tap_16p_183 +ffffffff82e56580 r filter_4tap_64p_upscale +ffffffff82e56690 r filter_4tap_64p_116 +ffffffff82e567a0 r filter_4tap_64p_149 +ffffffff82e568b0 r filter_4tap_64p_183 +ffffffff82e569c0 r filter_5tap_64p_upscale +ffffffff82e56b10 r filter_5tap_64p_116 +ffffffff82e56c60 r filter_5tap_64p_149 +ffffffff82e56db0 r filter_5tap_64p_183 +ffffffff82e56f00 r filter_6tap_64p_upscale +ffffffff82e57090 r filter_6tap_64p_116 +ffffffff82e57220 r filter_6tap_64p_149 +ffffffff82e573b0 r filter_6tap_64p_183 +ffffffff82e57540 r filter_7tap_64p_upscale +ffffffff82e57710 r filter_7tap_64p_116 +ffffffff82e578e0 r filter_7tap_64p_149 +ffffffff82e57ab0 r filter_7tap_64p_183 +ffffffff82e57c80 r filter_8tap_64p_upscale +ffffffff82e57e90 r filter_8tap_64p_116 +ffffffff82e580a0 r filter_8tap_64p_149 +ffffffff82e582b0 r filter_8tap_64p_183 +ffffffff82e584c0 r filter_2tap_16p +ffffffff82e584f0 r filter_2tap_64p +ffffffff82e59000 r dce110_str_enc_funcs +ffffffff82e59120 r audio_clock_info_table_48bpc +ffffffff82e592b0 r audio_clock_info_table_36bpc +ffffffff82e59440 r audio_clock_info_table +ffffffff82e5a000 r global_color_matrix +ffffffff82e5a0a8 r dce_transform_funcs +ffffffff82e5b000 r abm_funcs +ffffffff82e5c000 r psr_funcs +ffffffff82e5c040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82e5c045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82e5d000 r replay_funcs +ffffffff82e5e000 r reg_offsets +ffffffff82e5f000 r bios_regs +ffffffff82e5f008 r res_cap +ffffffff82e5f048 r dce100_res_pool_funcs +ffffffff82e5f140 r clk_src_regs +ffffffff82e5f23c r dmcu_regs +ffffffff82e5f298 r dmcu_shift +ffffffff82e5f2ac r dmcu_mask +ffffffff82e5f2f8 r abm_regs +ffffffff82e5f360 r abm_shift +ffffffff82e5f384 r abm_mask +ffffffff82e5f410 r debug_defaults +ffffffff82e5f5c0 r dce100_tg_offsets +ffffffff82e5f608 r plane_cap +ffffffff82e5f638 r res_create_funcs +ffffffff82e5f670 r panel_cntl_regs +ffffffff82e5f690 r panel_cntl_shift +ffffffff82e5f6a0 r panel_cntl_mask +ffffffff82e5f6e0 r link_enc_regs +ffffffff82e5faa0 r link_enc_aux_regs +ffffffff82e5faf0 r link_enc_hpd_regs +ffffffff82e5fb08 r link_enc_feature +ffffffff82e5fb18 r cs_shift +ffffffff82e5fb24 r cs_mask +ffffffff82e5fb50 r mi_regs +ffffffff82e5fe68 r mi_shifts +ffffffff82e5feb0 r mi_masks +ffffffff82e5ffd0 r ipp_regs +ffffffff82e601c8 r ipp_shift +ffffffff82e601f0 r ipp_mask +ffffffff82e60290 r xfm_regs +ffffffff82e60830 r xfm_shift +ffffffff82e60890 r xfm_mask +ffffffff82e60a10 r opp_regs +ffffffff82e60b60 r opp_shift +ffffffff82e60b8c r opp_mask +ffffffff82e60c40 r aux_engine_regs +ffffffff82e60d30 r aux_mask +ffffffff82e60d90 r aux_shift +ffffffff82e60db0 r i2c_hw_regs +ffffffff82e60f00 r i2c_shifts +ffffffff82e60f2c r i2c_masks +ffffffff82e60fd0 r audio_regs +ffffffff82e61104 r audio_shift +ffffffff82e6111c r audio_mask +ffffffff82e61160 r stream_enc_regs +ffffffff82e6180c r se_shift +ffffffff82e61890 r se_mask +ffffffff82e61a94 r hwseq_reg +ffffffff82e61cb0 r hwseq_shift +ffffffff82e61d30 r hwseq_mask +ffffffff82e62000 r reg_offsets +ffffffff82e62018 r dce110_compressor_funcs +ffffffff82e63000 r dce110_funcs +ffffffff82e632e8 r dce110_private_funcs +ffffffff82e64000 r dce110_mem_input_v_funcs +ffffffff82e64090 r dvmm_Hw_Setting_1DTiling +ffffffff82e64120 r dvmm_Hw_Setting_2DTiling +ffffffff82e641b0 r dvmm_Hw_Setting_Linear +ffffffff82e65000 r global_color_matrix +ffffffff82e650b0 r input_csc_matrix +ffffffff82e66000 r funcs +ffffffff82e67000 r bios_regs +ffffffff82e67008 r dce110_res_pool_funcs +ffffffff82e67100 r debug_defaults +ffffffff82e672b0 r clk_src_regs +ffffffff82e673ac r dmcu_regs +ffffffff82e67408 r dmcu_shift +ffffffff82e6741c r dmcu_mask +ffffffff82e67468 r abm_regs +ffffffff82e674d0 r abm_shift +ffffffff82e674f4 r abm_mask +ffffffff82e67580 r dce110_tg_offsets +ffffffff82e675c8 r res_create_funcs +ffffffff82e675f8 r plane_cap +ffffffff82e67624 r underlay_plane_cap +ffffffff82e67650 r stoney_resource_cap +ffffffff82e6768c r carrizo_resource_cap +ffffffff82e676d0 r panel_cntl_regs +ffffffff82e676f0 r panel_cntl_shift +ffffffff82e67700 r panel_cntl_mask +ffffffff82e67740 r link_enc_regs +ffffffff82e67b00 r link_enc_aux_regs +ffffffff82e67b50 r link_enc_hpd_regs +ffffffff82e67b68 r link_enc_feature +ffffffff82e67b78 r cs_shift +ffffffff82e67b84 r cs_mask +ffffffff82e67bb0 r mi_regs +ffffffff82e67d3c r mi_shifts +ffffffff82e67d84 r mi_masks +ffffffff82e67ea0 r ipp_regs +ffffffff82e67f9c r ipp_shift +ffffffff82e67fc4 r ipp_mask +ffffffff82e68060 r xfm_regs +ffffffff82e68330 r xfm_shift +ffffffff82e68390 r xfm_mask +ffffffff82e68510 r opp_regs +ffffffff82e68660 r opp_shift +ffffffff82e6868c r opp_mask +ffffffff82e68740 r aux_engine_regs +ffffffff82e68830 r aux_mask +ffffffff82e68890 r aux_shift +ffffffff82e688b0 r i2c_hw_regs +ffffffff82e68a00 r i2c_shifts +ffffffff82e68a2c r i2c_masks +ffffffff82e68ad0 r audio_regs +ffffffff82e68c04 r audio_shift +ffffffff82e68c1c r audio_mask +ffffffff82e68c60 r stream_enc_regs +ffffffff82e68f3c r se_shift +ffffffff82e68fc0 r se_mask +ffffffff82e691c4 r hwseq_stoney_reg +ffffffff82e693e0 r hwseq_cz_reg +ffffffff82e695fc r hwseq_shift +ffffffff82e6967c r hwseq_mask +ffffffff82e6a000 r dce110_tg_funcs +ffffffff82e6b000 r dce110_tg_v_funcs +ffffffff82e6c000 r dce110_xfmv_funcs ffffffff82e6d000 r reg_offsets -ffffffff82e6e000 r bios_regs -ffffffff82e6e008 r dce112_res_pool_funcs -ffffffff82e6e100 r debug_defaults -ffffffff82e6e2b0 r clk_src_regs -ffffffff82e6e4a8 r dmcu_regs -ffffffff82e6e504 r dmcu_shift -ffffffff82e6e518 r dmcu_mask -ffffffff82e6e564 r abm_regs -ffffffff82e6e5cc r abm_shift -ffffffff82e6e5f0 r abm_mask -ffffffff82e6e680 r dce112_tg_offsets -ffffffff82e6e6c8 r res_create_funcs -ffffffff82e6e6f8 r plane_cap -ffffffff82e6e724 r polaris_11_resource_cap -ffffffff82e6e760 r polaris_10_resource_cap -ffffffff82e6e7a0 r panel_cntl_regs -ffffffff82e6e7c0 r panel_cntl_shift -ffffffff82e6e7d0 r panel_cntl_mask -ffffffff82e6e810 r link_enc_regs -ffffffff82e6ebd0 r link_enc_aux_regs -ffffffff82e6ec20 r link_enc_hpd_regs -ffffffff82e6ec38 r link_enc_feature -ffffffff82e6ec48 r cs_shift -ffffffff82e6ec54 r cs_mask -ffffffff82e6ec80 r mi_regs -ffffffff82e6ef98 r mi_shifts -ffffffff82e6efe0 r mi_masks -ffffffff82e6f100 r ipp_regs -ffffffff82e6f2f8 r ipp_shift -ffffffff82e6f320 r ipp_mask -ffffffff82e6f3c0 r xfm_regs -ffffffff82e6f960 r xfm_shift -ffffffff82e6f9c0 r xfm_mask -ffffffff82e6fb40 r opp_regs -ffffffff82e6fc90 r opp_shift -ffffffff82e6fcbc r opp_mask -ffffffff82e6fd70 r aux_engine_regs -ffffffff82e6fe60 r aux_mask -ffffffff82e6fec0 r aux_shift -ffffffff82e6fee0 r i2c_hw_regs -ffffffff82e70030 r i2c_shifts -ffffffff82e7005c r i2c_masks -ffffffff82e70100 r audio_regs -ffffffff82e70208 r audio_shift -ffffffff82e70220 r audio_mask -ffffffff82e70260 r stream_enc_regs -ffffffff82e70818 r se_shift -ffffffff82e7089c r se_mask -ffffffff82e70aa0 r hwseq_reg -ffffffff82e70cbc r hwseq_shift -ffffffff82e70d3c r hwseq_mask -ffffffff82e71000 r bios_regs -ffffffff82e71008 r res_cap -ffffffff82e71048 r dce120_res_pool_funcs -ffffffff82e71140 r debug_defaults -ffffffff82e712f0 r clk_src_regs -ffffffff82e714e8 r dmcu_regs -ffffffff82e71544 r dmcu_shift -ffffffff82e71558 r dmcu_mask -ffffffff82e715a4 r abm_regs -ffffffff82e7160c r abm_shift -ffffffff82e71630 r abm_mask -ffffffff82e716c0 r dce120_tg_offsets -ffffffff82e71708 r dce121_res_create_funcs -ffffffff82e71738 r res_create_funcs -ffffffff82e71768 r plane_cap -ffffffff82e717a0 r panel_cntl_regs -ffffffff82e717c0 r panel_cntl_shift -ffffffff82e717d0 r panel_cntl_mask -ffffffff82e71810 r link_enc_regs -ffffffff82e71bd0 r link_enc_aux_regs -ffffffff82e71c20 r link_enc_hpd_regs -ffffffff82e71c38 r link_enc_feature -ffffffff82e71c48 r cs_shift -ffffffff82e71c54 r cs_mask -ffffffff82e71c80 r mi_regs -ffffffff82e71f98 r mi_shifts -ffffffff82e71fe0 r mi_masks -ffffffff82e72100 r ipp_regs -ffffffff82e722f8 r ipp_shift -ffffffff82e72320 r ipp_mask -ffffffff82e723c0 r xfm_regs -ffffffff82e72960 r xfm_shift -ffffffff82e729c0 r xfm_mask -ffffffff82e72b40 r opp_regs -ffffffff82e72c90 r opp_shift -ffffffff82e72cbc r opp_mask -ffffffff82e72d70 r aux_engine_regs -ffffffff82e72e60 r aux_mask -ffffffff82e72ec0 r aux_shift -ffffffff82e72ee0 r i2c_hw_regs -ffffffff82e73030 r i2c_shifts -ffffffff82e7305c r i2c_masks -ffffffff82e73100 r audio_regs -ffffffff82e73234 r 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qp_table_444_10bpc_min +ffffffff82f4fb00 r qp_table_444_12bpc_max +ffffffff82f50a40 r qp_table_444_12bpc_min +ffffffff82f51980 r qp_table_422_8bpc_max +ffffffff82f51ec0 r qp_table_422_8bpc_min +ffffffff82f52400 r qp_table_422_10bpc_max +ffffffff82f52b40 r qp_table_422_10bpc_min +ffffffff82f53280 r qp_table_422_12bpc_max +ffffffff82f53bc0 r qp_table_422_12bpc_min +ffffffff82f54500 r qp_table_420_8bpc_max +ffffffff82f54940 r qp_table_420_8bpc_min +ffffffff82f54d80 r qp_table_420_10bpc_max +ffffffff82f55340 r qp_table_420_10bpc_min +ffffffff82f55900 r qp_table_420_12bpc_max +ffffffff82f56040 r qp_table_420_12bpc_min ffffffff82f58000 r funcs +ffffffff82f58050 r hpd_regs +ffffffff82f581a0 r hpd_shift +ffffffff82f581b0 r hpd_mask +ffffffff82f581c0 r ddc_data_regs +ffffffff82f583a0 r ddc_clk_regs +ffffffff82f58580 r ddc_shift +ffffffff82f585a8 r ddc_mask ffffffff82f59000 r funcs -ffffffff82f59050 r hpd_regs -ffffffff82f591a0 r hpd_shift -ffffffff82f591b0 r hpd_mask -ffffffff82f591c0 r ddc_data_regs -ffffffff82f593a0 r ddc_clk_regs -ffffffff82f59580 r ddc_shift -ffffffff82f595a8 r ddc_mask ffffffff82f5a000 r funcs +ffffffff82f5a050 r hpd_regs +ffffffff82f5a1a0 r hpd_shift +ffffffff82f5a1b0 r hpd_mask +ffffffff82f5a1c0 r ddc_data_regs +ffffffff82f5a3a0 r ddc_clk_regs +ffffffff82f5a580 r ddc_shift +ffffffff82f5a5a8 r ddc_mask ffffffff82f5b000 r funcs -ffffffff82f5b050 r hpd_regs -ffffffff82f5b1a0 r hpd_shift -ffffffff82f5b1b0 r hpd_mask -ffffffff82f5b1c0 r ddc_data_regs -ffffffff82f5b3a0 r ddc_clk_regs -ffffffff82f5b580 r ddc_shift -ffffffff82f5b5a8 r ddc_mask ffffffff82f5c000 r funcs +ffffffff82f5c050 r hpd_regs +ffffffff82f5c1a0 r hpd_shift +ffffffff82f5c1b0 r hpd_mask +ffffffff82f5c1c0 r ddc_data_regs +ffffffff82f5c3a0 r ddc_clk_regs +ffffffff82f5c580 r ddc_shift +ffffffff82f5c5a8 r ddc_mask ffffffff82f5d000 r funcs -ffffffff82f5d050 r hpd_regs -ffffffff82f5d1a0 r hpd_shift -ffffffff82f5d1b0 r hpd_mask -ffffffff82f5d1c0 r ddc_data_regs -ffffffff82f5d3a0 r ddc_clk_regs -ffffffff82f5d580 r ddc_shift -ffffffff82f5d5a8 r ddc_mask -ffffffff82f5d5d0 r generic_regs -ffffffff82f5d640 r generic_shift -ffffffff82f5d650 r generic_mask ffffffff82f5e000 r funcs +ffffffff82f5e050 r hpd_regs +ffffffff82f5e1a0 r hpd_shift +ffffffff82f5e1b0 r hpd_mask +ffffffff82f5e1c0 r ddc_data_regs +ffffffff82f5e3a0 r ddc_clk_regs +ffffffff82f5e580 r ddc_shift +ffffffff82f5e5a8 r ddc_mask +ffffffff82f5e5d0 r generic_regs +ffffffff82f5e640 r generic_shift +ffffffff82f5e650 r generic_mask ffffffff82f5f000 r funcs -ffffffff82f5f050 r hpd_regs -ffffffff82f5f1a0 r hpd_shift -ffffffff82f5f1b0 r hpd_mask -ffffffff82f5f1c0 r ddc_data_regs_dcn -ffffffff82f5f370 r ddc_clk_regs_dcn -ffffffff82f5f520 r ddc_shift -ffffffff82f5f640 r ddc_mask -ffffffff82f5f760 r generic_regs -ffffffff82f5f7d0 r generic_shift -ffffffff82f5f7e0 r generic_mask ffffffff82f60000 r funcs +ffffffff82f60050 r hpd_regs +ffffffff82f601a0 r hpd_shift +ffffffff82f601b0 r hpd_mask +ffffffff82f601c0 r ddc_data_regs_dcn +ffffffff82f60370 r ddc_clk_regs_dcn +ffffffff82f60520 r ddc_shift +ffffffff82f60640 r ddc_mask +ffffffff82f60760 r generic_regs +ffffffff82f607d0 r generic_shift +ffffffff82f607e0 r generic_mask ffffffff82f61000 r funcs -ffffffff82f61050 r hpd_regs -ffffffff82f61168 r hpd_shift -ffffffff82f61178 r hpd_mask -ffffffff82f61190 r ddc_data_regs_dcn -ffffffff82f612c0 r ddc_clk_regs_dcn -ffffffff82f613f0 r ddc_shift -ffffffff82f614e0 r ddc_mask -ffffffff82f615d0 r generic_regs -ffffffff82f61604 r generic_shift -ffffffff82f6160c r generic_mask ffffffff82f62000 r funcs +ffffffff82f62050 r hpd_regs +ffffffff82f62168 r hpd_shift +ffffffff82f62178 r hpd_mask +ffffffff82f62190 r ddc_data_regs_dcn +ffffffff82f622c0 r ddc_clk_regs_dcn +ffffffff82f623f0 r ddc_shift +ffffffff82f624e0 r ddc_mask +ffffffff82f625d0 r generic_regs +ffffffff82f62604 r generic_shift +ffffffff82f6260c r generic_mask ffffffff82f63000 r funcs -ffffffff82f63050 r hpd_regs -ffffffff82f631a0 r hpd_shift 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r hpd_regs +ffffffff82f66168 r hpd_shift +ffffffff82f66178 r hpd_mask +ffffffff82f66190 r ddc_data_regs_dcn +ffffffff82f66300 r ddc_clk_regs_dcn +ffffffff82f66470 r ddc_shift +ffffffff82f66560 r ddc_mask +ffffffff82f66650 r generic_regs +ffffffff82f666c0 r generic_shift +ffffffff82f666d0 r generic_mask ffffffff82f67000 r funcs -ffffffff82f67050 r hpd_regs -ffffffff82f67168 r hpd_shift -ffffffff82f67178 r hpd_mask -ffffffff82f67190 r ddc_data_regs_dcn -ffffffff82f67340 r ddc_clk_regs_dcn -ffffffff82f674f0 r ddc_shift -ffffffff82f67610 r ddc_mask -ffffffff82f67730 r generic_regs -ffffffff82f677a0 r generic_shift -ffffffff82f677b0 r generic_mask ffffffff82f68000 r funcs +ffffffff82f68050 r hpd_regs +ffffffff82f68168 r hpd_shift +ffffffff82f68178 r hpd_mask +ffffffff82f68190 r ddc_data_regs_dcn +ffffffff82f68340 r ddc_clk_regs_dcn +ffffffff82f684f0 r ddc_shift +ffffffff82f68610 r ddc_mask +ffffffff82f68730 r generic_regs +ffffffff82f687a0 r generic_shift +ffffffff82f687b0 r generic_mask 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hpd_irq_info_funcs -ffffffff82f71028 r hpd_rx_irq_info_funcs -ffffffff82f71038 r pflip_irq_info_funcs -ffffffff82f71048 r vupdate_irq_info_funcs -ffffffff82f71058 r vblank_irq_info_funcs -ffffffff82f71070 r irq_source_info_dce80 -ffffffff82f73000 r irq_service_funcs_dcn10 -ffffffff82f73008 r dummy_irq_info_funcs -ffffffff82f73018 r hpd_irq_info_funcs -ffffffff82f73028 r hpd_rx_irq_info_funcs -ffffffff82f73038 r pflip_irq_info_funcs -ffffffff82f73048 r vupdate_no_lock_irq_info_funcs -ffffffff82f73058 r vblank_irq_info_funcs -ffffffff82f73068 r vline0_irq_info_funcs -ffffffff82f73080 r irq_source_info_dcn10 -ffffffff82f75000 r irq_service_funcs_dcn20 -ffffffff82f75008 r dummy_irq_info_funcs -ffffffff82f75018 r hpd_irq_info_funcs -ffffffff82f75028 r hpd_rx_irq_info_funcs -ffffffff82f75038 r pflip_irq_info_funcs -ffffffff82f75048 r vupdate_no_lock_irq_info_funcs -ffffffff82f75058 r vblank_irq_info_funcs -ffffffff82f75068 r vline0_irq_info_funcs -ffffffff82f75080 r irq_source_info_dcn20 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hpo_fixed_vs_pe_retimer_dp_link_hwss -ffffffff82f8f000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82f90000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82f90006 r DP_DVI_CONVERTER_ID_4 -ffffffff82f9000d r DP_DVI_CONVERTER_ID_5 -ffffffff82f91000 r dp_lt_fallbacks -ffffffff82f95000 r mandatory_dpcd_partitions -ffffffff82f96000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82f96007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82f97000 r virtual_lnk_enc_funcs -ffffffff82f98000 r virtual_link_hwss -ffffffff82f99000 r virtual_str_enc_funcs -ffffffff82f9a000 R dmub_srv_dcn20_regs -ffffffff82f9b000 R dmub_srv_dcn21_regs -ffffffff82f9c000 R dmub_srv_dcn30_regs -ffffffff82f9d000 R dmub_srv_dcn301_regs -ffffffff82f9e000 R dmub_srv_dcn302_regs -ffffffff82f9f000 R dmub_srv_dcn303_regs -ffffffff82fa0000 R dmub_srv_dcn31_regs -ffffffff82fa1000 R dmub_srv_dcn314_regs -ffffffff82fa2000 R dmub_srv_dcn315_regs -ffffffff82fa3000 R dmub_srv_dcn316_regs -ffffffff82fa4000 R dmub_srv_dcn32_regs -ffffffff82fa5000 r numerator01 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dp_11_protection +ffffffff82f6d020 r hdcp_i2c_offsets +ffffffff82f6d050 r hdcp_dpcd_addrs +ffffffff82f6e000 r irq_service_funcs_dce110 +ffffffff82f6e008 r dummy_irq_info_funcs +ffffffff82f6e018 r hpd_irq_info_funcs +ffffffff82f6e028 r hpd_rx_irq_info_funcs +ffffffff82f6e038 r pflip_irq_info_funcs +ffffffff82f6e048 r vupdate_irq_info_funcs +ffffffff82f6e058 r vblank_irq_info_funcs +ffffffff82f6e070 r irq_source_info_dce110 +ffffffff82f70000 r irq_service_funcs_dce120 +ffffffff82f70008 r dummy_irq_info_funcs +ffffffff82f70018 r hpd_irq_info_funcs +ffffffff82f70028 r hpd_rx_irq_info_funcs +ffffffff82f70038 r pflip_irq_info_funcs +ffffffff82f70048 r vupdate_irq_info_funcs +ffffffff82f70058 r vblank_irq_info_funcs +ffffffff82f70070 r irq_source_info_dce120 +ffffffff82f72000 r irq_service_funcs_dce80 +ffffffff82f72008 r dummy_irq_info_funcs +ffffffff82f72018 r hpd_irq_info_funcs +ffffffff82f72028 r hpd_rx_irq_info_funcs +ffffffff82f72038 r pflip_irq_info_funcs +ffffffff82f72048 r vupdate_irq_info_funcs +ffffffff82f72058 r vblank_irq_info_funcs +ffffffff82f72070 r irq_source_info_dce80 +ffffffff82f74000 r irq_service_funcs_dcn10 +ffffffff82f74008 r dummy_irq_info_funcs +ffffffff82f74018 r hpd_irq_info_funcs +ffffffff82f74028 r hpd_rx_irq_info_funcs +ffffffff82f74038 r pflip_irq_info_funcs +ffffffff82f74048 r vupdate_no_lock_irq_info_funcs +ffffffff82f74058 r vblank_irq_info_funcs +ffffffff82f74068 r vline0_irq_info_funcs +ffffffff82f74080 r irq_source_info_dcn10 +ffffffff82f76000 r irq_service_funcs_dcn20 +ffffffff82f76008 r dummy_irq_info_funcs +ffffffff82f76018 r hpd_irq_info_funcs +ffffffff82f76028 r hpd_rx_irq_info_funcs +ffffffff82f76038 r pflip_irq_info_funcs +ffffffff82f76048 r vupdate_no_lock_irq_info_funcs +ffffffff82f76058 r vblank_irq_info_funcs +ffffffff82f76068 r vline0_irq_info_funcs +ffffffff82f76080 r irq_source_info_dcn20 +ffffffff82f78000 r irq_service_funcs_dcn201 +ffffffff82f78008 r dummy_irq_info_funcs +ffffffff82f78018 r hpd_irq_info_funcs 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hpd_rx_irq_info_funcs +ffffffff82f872c8 r pflip_irq_info_funcs +ffffffff82f872d8 r vupdate_no_lock_irq_info_funcs +ffffffff82f872e8 r vblank_irq_info_funcs +ffffffff82f872f8 r vline0_irq_info_funcs +ffffffff82f87308 r outbox_irq_info_funcs +ffffffff82f88000 r irq_source_info_dcn32 +ffffffff82f89290 r irq_service_funcs_dcn32 +ffffffff82f89298 r dummy_irq_info_funcs +ffffffff82f892a8 r hpd_irq_info_funcs +ffffffff82f892b8 r hpd_rx_irq_info_funcs +ffffffff82f892c8 r pflip_irq_info_funcs +ffffffff82f892d8 r vupdate_no_lock_irq_info_funcs +ffffffff82f892e8 r vblank_irq_info_funcs +ffffffff82f892f8 r vline0_irq_info_funcs +ffffffff82f89308 r outbox_irq_info_funcs +ffffffff82f8b000 r dio_link_hwss +ffffffff82f8c000 r dio_fixed_vs_pe_retimer_link_hwss +ffffffff82f8d000 r dpia_link_hwss +ffffffff82f8e000 r hpo_dp_link_hwss +ffffffff82f8f000 r hpo_fixed_vs_pe_retimer_dp_link_hwss +ffffffff82f90000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82f91000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82f91006 r DP_DVI_CONVERTER_ID_4 +ffffffff82f9100d r DP_DVI_CONVERTER_ID_5 +ffffffff82f92000 r dp_lt_fallbacks +ffffffff82f96000 r mandatory_dpcd_partitions +ffffffff82f97000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82f97007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82f98000 r virtual_lnk_enc_funcs +ffffffff82f99000 r virtual_link_hwss +ffffffff82f9a000 r virtual_str_enc_funcs +ffffffff82f9b000 R dmub_srv_dcn20_regs +ffffffff82f9c000 R dmub_srv_dcn21_regs +ffffffff82f9d000 R dmub_srv_dcn30_regs +ffffffff82f9e000 R dmub_srv_dcn301_regs +ffffffff82f9f000 R dmub_srv_dcn302_regs +ffffffff82fa0000 R dmub_srv_dcn303_regs +ffffffff82fa1000 R dmub_srv_dcn31_regs +ffffffff82fa2000 R dmub_srv_dcn314_regs +ffffffff82fa3000 R dmub_srv_dcn315_regs +ffffffff82fa4000 R dmub_srv_dcn316_regs +ffffffff82fa5000 R dmub_srv_dcn32_regs +ffffffff82fa6000 r numerator01 +ffffffff82fa6020 r numerator02 +ffffffff82fa6040 r numerator04 +ffffffff82fa6060 r numerator05 +ffffffff82faa000 r abm_settings +ffffffff82faa020 r abm_settings_config0 +ffffffff82faa060 r abm_settings_config1 +ffffffff82faa0a0 r abm_settings_config2 +ffffffff82faa0d8 r min_reduction_table_v_2_2 +ffffffff82faa0e5 r max_reduction_table_v_2_2 +ffffffff82faa0f2 r min_reduction_table +ffffffff82faa0ff r max_reduction_table +ffffffff82faa110 r custom_backlight_curve0 +ffffffff82fab000 R amdgpu_pp_profile_name +ffffffff82fac000 r pp_lib_thermal_controller_names +ffffffff82fad000 r pp_ip_funcs +ffffffff82fad0a8 R pp_smu_ip_block +ffffffff82fad0c0 r pp_dpm_funcs ffffffff82fae000 r gpio_tbl ffffffff82fae0f0 r enable_fb_req_rej_tbl ffffffff82fae140 r use_bclk_tbl -ffffffff82fae2e0 r turn_off_plls_tbl -ffffffff82fae370 r clk_req_b_tbl -ffffffff82fae490 r enter_baco_tbl -ffffffff82fae5b0 r exit_baco_tbl -ffffffff82fae6d0 r clean_baco_tbl +ffffffff82fae310 r turn_off_plls_tbl +ffffffff82fae640 r enter_baco_tbl +ffffffff82fae730 r exit_baco_tbl +ffffffff82fae850 r clean_baco_tbl ffffffff82faf000 r gpio_tbl ffffffff82faf0f0 r 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-ffffffff83452000 D db_log -ffffffff83453000 D audio_cd -ffffffff83453020 D audio_lock -ffffffff83454000 D midi_cd -ffffffff83455000 D rnd_cold -ffffffff83455004 D rnd_slowextract -ffffffff83455008 D rnd_timeout -ffffffff83455050 D rndlock -ffffffff83455060 D rndreinit_timeout -ffffffff834550a8 D rnd_task -ffffffff83456000 D video_cd -ffffffff83457000 d rrip_table_analyze -ffffffff834570e0 d rrip_table_getname -ffffffff834571e0 d rrip_table_getsymname -ffffffff83457280 d rrip_table_extref -ffffffff83458000 D nexecs -ffffffff83459000 D elf_note_names -ffffffff8345a000 D ncpus -ffffffff8345a004 D ncpusfound -ffffffff8345b000 D acct_lock -ffffffff8345b010 D acctsuspend -ffffffff8345b014 D acctresume -ffffffff8345b018 D acctrate -ffffffff8345c000 D bufqs_mtx -ffffffff8345d000 D ticks -ffffffff8345e000 D fhdlk -ffffffff8345f000 D kqueue_klist_lock -ffffffff8345f010 D kqueue_ps_list_lock -ffffffff8345f020 D kq_timeoutmax -ffffffff83460000 D stackgap_random -ffffffff83461000 D deadproc_mutex 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raw_part -ffffffff8346b03c D allowpowerdown -ffffffff8346b040 D hw_power -ffffffff8346b044 d byte_order -ffffffff8346c000 d thrsleep_queue -ffffffff8346c010 d thrsleep_lock -ffffffff8346d000 D tc_lock -ffffffff8346d010 D windup_mtx -ffffffff8346d020 d dummy_timecounter -ffffffff8346d070 D timecounter -ffffffff8346d078 d timehands -ffffffff8346d080 d th0 -ffffffff8346d118 d th1 -ffffffff8346e000 D itimer_mtx -ffffffff8346e010 D ratecheck_mtx -ffffffff8346e020 D ppsratecheck_mtx -ffffffff8346e030 D resettodr_to -ffffffff8346e078 D resettodr_task -ffffffff8346f000 D timeout_mutex -ffffffff83470000 D wdog_auto -ffffffff83471000 D taskq_sys -ffffffff83471050 D taskq_sys_mp -ffffffff83472000 d update_loadavg.to -ffffffff83472048 D ccpu -ffffffff83472050 d schedcpu.to -ffffffff83472098 D perflevel -ffffffff8347209c D perfpolicy -ffffffff834720a0 D setperf_to -ffffffff83473000 D autoconf_attdet_mtx -ffffffff83473010 D msgs -ffffffff83474000 d evcount_list -ffffffff83474010 d evcount_percpu_init_list -ffffffff83475000 D syslogf_rwlock -ffffffff83475010 D log_mtx -ffffffff83475020 D log_kq_mtx -ffffffff83475030 D logstash_in -ffffffff83475038 D logstash_out -ffffffff83475040 D logstash_rwlock -ffffffff83476000 D pool_head -ffffffff83476010 D pool_lock -ffffffff83476020 D pool_debug -ffffffff83476028 D pool_allocator_single -ffffffff83476040 D pool_allocator_multi -ffffffff83476058 D pool_allocator_multi_ni -ffffffff83476070 D pool_gc_tick -ffffffff834760b8 D pool_gc_task -ffffffff83477000 D kprintf_mutex -ffffffff83477010 D db_panic -ffffffff83477014 D splassert_ctl -ffffffff83477018 D v_putc -ffffffff83477020 D printf_flags -ffffffff83478000 D userconf_base -ffffffff83478004 D userconf_maxdev -ffffffff83478008 D userconf_totdev -ffffffff8347800c D userconf_maxlocnames -ffffffff83478010 D userconf_cnt -ffffffff83478014 D userconf_lines -ffffffff83478018 D userconf_histsz -ffffffff83478020 D userconf_cmds -ffffffff83479000 D ftlock -ffffffff8347a000 d ppollcollect.poll_errintvl -ffffffff8347b000 D ttydefchars -ffffffff8347b014 D ttclos -ffffffff8347b01b D ttopen -ffffffff8347b022 D ttybg -ffffffff8347b028 D ttyin -ffffffff8347b02e D ttyout -ffffffff8347b038 D ttylist_lock -ffffffff8347c000 D linesw -ffffffff8347c280 D nlinesw -ffffffff8347d000 D pt_softc_lock -ffffffff8347e000 d mbstat_boot_boot_cpumem -ffffffff8347e080 D mbstat -ffffffff8347e090 D mclsizes -ffffffff8347e0b0 D m_extref_mtx -ffffffff8347e0c0 D m_pool_allocator -ffffffff8347f000 D somaxconn -ffffffff8347f004 D sominconn -ffffffff8347f008 D sosplice_lock -ffffffff83480000 D sb_max -ffffffff83481000 D unp_df_lock -ffffffff83481010 D unp_gc_lock -ffffffff83481020 D unp_rights_mtx -ffffffff83481030 D unp_ino_mtx -ffffffff83481040 D unp_gc_task -ffffffff83481070 D unpst_sendspace -ffffffff83481074 D unpst_recvspace -ffffffff83481078 D unpsq_sendspace -ffffffff8348107c D unpsq_recvspace -ffffffff83481080 D unpdg_sendspace -ffffffff83481084 D unpdg_recvspace -ffffffff83482000 D doingcache -ffffffff83483000 D maxvfsconf -ffffffff83483010 d vfsconflist -ffffffff83484000 D lockf_lock -ffffffff83484010 D maxlocksperuid -ffffffff83485000 D iftovt_tab -ffffffff83485040 D vttoif_tab -ffffffff83485064 D suid_clear -ffffffff83485068 D vnode_mtx -ffffffff83485078 D vfs_stall_lock -ffffffff83485090 D vtypes -ffffffff834850e0 D vtags -ffffffff83486000 D syncer_maxdelay -ffffffff83486004 D syncdelay -ffffffff83487000 D dosdirtemplate -ffffffff83488000 D ntfs_hashlock -ffffffff83489000 D ntfs_toupper_lock -ffffffff8348a000 D art_table_gc_mtx -ffffffff8348a010 D art_table_gc_task -ffffffff8348a040 D art_node_gc_mtx -ffffffff8348a050 D art_node_gc_task -ffffffff8348b000 D bpf_bufsize -ffffffff8348b004 D bpf_maxbufsize -ffffffff8348c000 D ifg_head -ffffffff8348c010 D if_cloners_lock -ffffffff8348c020 D if_hooks_mtx -ffffffff8348c030 D if_input_task_locked -ffffffff8348c060 D netlock -ffffffff8348c070 D ifnetlist -ffffffff8348d000 D ifiq_maxlen_drop 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SHAPad2 -ffffffff8349b000 D rtmap_gc -ffffffff8349b018 D rt_rc -ffffffff8349c000 D rt_labels -ffffffff8349c010 D rtlabel_mtx -ffffffff8349d000 D enc_cloner -ffffffff8349e000 D gre_cloner -ffffffff8349e030 D gre_list -ffffffff8349e040 D mgre_cloner -ffffffff8349e070 D egre_cloner -ffffffff8349e0a0 D nvgre_cloner -ffffffff8349e0d0 D eoip_cloner -ffffffff8349f000 D trunk_cloner -ffffffff834a0000 d aggr_cloner -ffffffff834a1000 d tpmr_cloner -ffffffff834a2000 D mpe_cloner -ffffffff834a3000 D mpw_cloner -ffffffff834a4000 D mpip_cloner -ffffffff834a5000 d bpe_cloner -ffffffff834a5030 d bpe_lock -ffffffff834a6000 D vether_cloner -ffffffff834a7000 D pair_cloner -ffffffff834a8000 d vxlan_cloner -ffffffff834a8030 d vxlan_lock -ffffffff834a8040 d vxlan_teps -ffffffff834a9000 D underload_interval -ffffffff834a9010 D wg_cloner -ffffffff834aa000 d stoeplitz_keyseed -ffffffff834ab000 D ieee80211_cache_size -ffffffff834ac000 D arpt_prune -ffffffff834ac004 D arpt_keep -ffffffff834ac008 D arpt_down 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tcp_rst_ppslim -ffffffff834b400c D tcp_ackdrop_ppslim -ffffffff834b4010 D tcp_syn_hash_size -ffffffff834b4014 D tcp_syn_cache_limit -ffffffff834b4018 D tcp_syn_bucket_limit -ffffffff834b401c D tcp_syn_use_limit -ffffffff834b4020 D syn_cache_mtx -ffffffff834b5000 D tcp_outflags -ffffffff834b6000 D tcp_timer_mtx -ffffffff834b6010 D tcp_mssdflt -ffffffff834b6014 D tcp_rttdflt -ffffffff834b6018 D tcp_do_rfc1323 -ffffffff834b601c D tcp_do_sack -ffffffff834b6020 D tcp_do_rfc3390 -ffffffff834b6024 D tcp_do_tso -ffffffff834b6028 D tcp_reass_limit -ffffffff834b602c D tcp_sackhole_limit -ffffffff834b7000 D tcp_backoff -ffffffff834b7034 D tcp_totbackoff -ffffffff834b8000 D tcp_sendspace -ffffffff834b8004 D tcp_recvspace -ffffffff834b8008 D tcp_autorcvbuf_inc -ffffffff834b9000 D udpcksum -ffffffff834b9004 D udp_sendspace -ffffffff834b9008 D udp_recvspace -ffffffff834ba000 D ipsec_flows_mtx -ffffffff834ba010 D ipsec_ids_idle -ffffffff834ba014 D ipsec_ids_next_flow -ffffffff834ba018 D ipsec_policy_head -ffffffff834ba028 D ipsp_ids_gc_timeout -ffffffff834ba070 D tdb_sadb_mtx -ffffffff834ba080 d tdb_hashmask -ffffffff834bb000 D ipo_tdb_mtx -ffffffff834bb010 D ipsec_acquire_mtx -ffffffff834bb020 D ipsec_acquire_head -ffffffff834bc000 D ipsec_keep_invalid -ffffffff834bc004 D ipsec_require_pfs -ffffffff834bc008 D ipsec_soft_timeout -ffffffff834bc00c D ipsec_exp_timeout -ffffffff834bc010 D ipsec_soft_first_use -ffffffff834bc014 D ipsec_exp_first_use -ffffffff834bc018 D ipsec_expire_acquire -ffffffff834bc01c D esp_enable -ffffffff834bc020 D ah_enable -ffffffff834bd000 D udpencap_enable -ffffffff834bd004 D udpencap_port -ffffffff834be000 D carp_vh_rc -ffffffff834be020 D carp_sc_rc -ffffffff834be040 D carp_opts -ffffffff834be058 D carp_cloner -ffffffff834be088 d carp_send_na.mcast -ffffffff834bf000 d PADDING +ffffffff82faf140 r use_bclk_tbl +ffffffff82faf2e0 r turn_off_plls_tbl +ffffffff82faf370 r clk_req_b_tbl +ffffffff82faf490 r enter_baco_tbl +ffffffff82faf5b0 r exit_baco_tbl +ffffffff82faf6d0 r clean_baco_tbl +ffffffff82fb0000 r gpio_tbl +ffffffff82fb00f0 r enable_fb_req_rej_tbl +ffffffff82fb0140 r use_bclk_tbl_vg +ffffffff82fb0200 r turn_off_plls_tbl_vg +ffffffff82fb0350 r use_bclk_tbl +ffffffff82fb0440 r turn_off_plls_tbl +ffffffff82fb05f0 r clk_req_b_tbl +ffffffff82fb0710 r enter_baco_tbl +ffffffff82fb0830 r exit_baco_tbl +ffffffff82fb0950 r clean_baco_tbl +ffffffff82fb1000 r vega10_fuses_default +ffffffff82fc0000 r pp_r600_encode_lanes +ffffffff82fc1000 R pptable_v1_0_funcs +ffffffff82fc2000 R pptable_funcs +ffffffff82fc2020 r soft_dummy_pp_table +ffffffff82fc3000 r smu10_hwmgr_funcs +ffffffff82fc4000 r smu7_hwmgr_funcs +ffffffff82fc42f8 r smu7_irq_funcs +ffffffff82fc4310 r SMU7ThermalPolicy +ffffffff82fc5000 r GCCACConfig_Polaris10 +ffffffff82fc51b0 r DIDTConfig_Polaris10 +ffffffff82fc5a50 r GCCACConfig_Polaris11 +ffffffff82fc5c00 r DIDTConfig_Polaris11_Kicker +ffffffff82fc64a0 r DIDTConfig_Polaris11 +ffffffff82fc6d40 r DIDTConfig_Polaris12 +ffffffff82fc75e0 r GCCACConfig_VegaM +ffffffff82fc7790 r DIDTConfig_VegaM +ffffffff82fc9000 r smu8_hwmgr_funcs +ffffffff82fc92f0 r SMU7ThermalPolicy +ffffffff82fca000 r smu9_irq_funcs +ffffffff82fcb000 r gpio_tbl_iceland +ffffffff82fcb060 r gpio_tbl +ffffffff82fcb150 r enable_fb_req_rej_tbl +ffffffff82fcb1a0 r use_bclk_tbl +ffffffff82fcb370 r turn_off_plls_tbl +ffffffff82fcb610 r enter_baco_tbl +ffffffff82fcb730 r exit_baco_tbl_iceland +ffffffff82fcb870 r clean_baco_tbl_iceland +ffffffff82fcb890 r exit_baco_tbl +ffffffff82fcb9b0 r clean_baco_tbl +ffffffff82fcc000 r pre_baco_tbl +ffffffff82fcc090 r enter_baco_tbl +ffffffff82fcc2b0 r exit_baco_tbl +ffffffff82fcc520 r clean_baco_tbl +ffffffff82fcd000 r vega10_hwmgr_funcs +ffffffff82fcd2f0 r channel_number +ffffffff82fcd320 r SMU7ThermalWithDelayPolicy +ffffffff82fce000 r SEDiDtStallCtrlConfig_vega10 +ffffffff82fce110 r SEDiDtStallPatternConfig_vega10 +ffffffff82fce2e0 r SEDiDtWeightConfig_Vega10 +ffffffff82fce3b0 r SEDiDtCtrl1Config_Vega10 +ffffffff82fce440 r SEDiDtCtrl2Config_Vega10 +ffffffff82fce510 r SEDiDtCtrl3Config_vega10 +ffffffff82fce820 r SEDiDtTuningCtrlConfig_Vega10 +ffffffff82fce8b0 r SELCacConfig_Vega10 +ffffffff82fcea40 r SEDiDtCtrl0Config_Vega10 +ffffffff82fced10 r AvfsPSMInitConfig_vega10 +ffffffff82fced90 r SEEDCStallPatternConfig_Vega10 +ffffffff82fceea0 r SEEDCStallDelayConfig_Vega10 +ffffffff82fcef80 r SEEDCCtrlConfig_Vega10 +ffffffff82fcf040 r PSMSEEDCStallPatternConfig_Vega10 +ffffffff82fcf0c0 r PSMSEEDCStallDelayConfig_Vega10 +ffffffff82fcf1d0 r PSMSEEDCCtrlResetConfig_Vega10 +ffffffff82fcf290 r PSMSEEDCCtrlConfig_Vega10 +ffffffff82fcf350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff82fcf3e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff82fd0000 R vega10_pptable_funcs +ffffffff82fd1000 r pre_baco_tbl +ffffffff82fd1090 r enter_baco_tbl +ffffffff82fd12b0 r exit_baco_tbl +ffffffff82fd1520 r clean_baco_tbl +ffffffff82fd2000 r vega12_hwmgr_funcs +ffffffff82fd22f0 r SMU7ThermalWithDelayPolicy +ffffffff82fd2340 r link_width +ffffffff82fd3000 R vega12_pptable_funcs +ffffffff82fd4000 r clean_baco_tbl +ffffffff82fd5000 r vega20_hwmgr_funcs +ffffffff82fd52f0 r SMU7ThermalWithDelayPolicy +ffffffff82fd5340 r link_width +ffffffff82fd6000 R vega20_pptable_funcs +ffffffff82fd7000 R ci_smu_funcs +ffffffff82fd70e0 r defaults_hawaii_pro +ffffffff82fd712c r defaults_hawaii_xt +ffffffff82fd7178 r defaults_saturn_xt +ffffffff82fd71c4 r defaults_bonaire_xt +ffffffff82fd7210 r ci_program_jump_on_start.data +ffffffff82fd8000 R fiji_smu_funcs +ffffffff82fd80e0 r avfs_graphics_level +ffffffff82fd8240 r fiji_power_tune_data_set_array +ffffffff82fd8246 r fiji_clock_stretch_amount_conversion +ffffffff82fd8260 r fiji_clock_stretcher_ddt_table +ffffffff82fd9000 R iceland_smu_funcs +ffffffff82fd90e0 r defaults_icelandxt +ffffffff82fd912c r defaults_icelandpro +ffffffff82fd9178 r defaults_iceland +ffffffff82fda000 R polaris10_smu_funcs +ffffffff82fda0e0 r avfs_graphics_level_polaris10 +ffffffff82fda2a0 r avfs_memory_level_polaris10 +ffffffff82fda2c0 r polaris10_power_tune_data_set_array +ffffffff82fda310 r Range_Table +ffffffff82fdb000 R smu10_smu_funcs +ffffffff82fdc000 r smu7_program_jump_on_start.data +ffffffff82fdc010 r pwr_virus_table_pre +ffffffff82fdc680 r pwr_virus_table_post +ffffffff82fdcf80 r pwr_virus_section1 +ffffffff82fdd610 r pwr_virus_section2 +ffffffff82fdd660 r pwr_virus_section3 +ffffffff82fe4ab0 r pwr_virus_section4 +ffffffff82fe4e80 r pwr_virus_section5 +ffffffff82fe5490 r pwr_virus_section6 +ffffffff82fe7000 R smu8_smu_funcs +ffffffff82fe8000 R tonga_smu_funcs +ffffffff82fe80e0 r tonga_power_tune_data_set_array +ffffffff82fe812c r tonga_clock_stretch_amount_conversion +ffffffff82fe8140 r tonga_clock_stretcher_ddt_table +ffffffff82fe9000 R vega10_smu_funcs +ffffffff82fea000 R vega12_smu_funcs +ffffffff82feb000 R vega20_smu_funcs +ffffffff82fec000 R vegam_smu_funcs +ffffffff82fec0e0 r vegam_power_tune_data_set_array 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sienna_cichlid_ppt_funcs +ffffffff82ff43f0 r smu11_thermal_policy +ffffffff82ff4448 r sienna_cichlid_i2c_algo +ffffffff82ff4458 r sienna_cichlid_i2c_control_quirks +ffffffff82ff4470 r sienna_cichlid_throttler_map +ffffffff82ff5000 r smu_v11_0_irq_funcs +ffffffff82ff5010 r link_width +ffffffff82ff6000 r vangogh_ppt_funcs +ffffffff82ff63e8 r vangogh_throttler_map +ffffffff82ff7000 r renoir_ppt_funcs +ffffffff82ff73e8 r renoir_throttler_map +ffffffff82ff8000 r aldebaran_ppt_funcs +ffffffff82ff83f0 r aldebaran_clk_map +ffffffff82ff84b0 r aldebaran_table_map +ffffffff82ff8530 r smu13_thermal_policy +ffffffff82ff8588 r aldebaran_i2c_algo +ffffffff82ff8598 r aldebaran_i2c_control_quirks +ffffffff82ff85b0 r aldebaran_throttler_map +ffffffff82ff85d0 r aldebaran_message_map +ffffffff82ff9050 r aldebaran_feature_mask_map +ffffffff82ffa000 R pmfw_decoded_link_speed +ffffffff82ffa020 R pmfw_decoded_link_width +ffffffff82ffa040 r smu_v13_0_irq_funcs +ffffffff82ffb000 r smu_v13_0_0_ppt_funcs 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+ffffffff83004040 r amas_feature +ffffffff83005000 R cardslot_ca +ffffffff83006000 R cardbus_ca +ffffffff83007000 R com_cardbus_ca +ffffffff83008000 R xl_cardbus_ca +ffffffff83008030 R xl_cardbus_products +ffffffff83009000 R dc_cardbus_ca +ffffffff83009030 R dc_cardbus_devices +ffffffff8300a000 R fxp_cardbus_ca +ffffffff8300a028 R fxp_cardbus_devices +ffffffff8300b000 R rl_cardbus_devices +ffffffff8300b028 R rl_cardbus_ca +ffffffff8300c000 R re_cardbus_ca +ffffffff8300c028 R re_cardbus_devices +ffffffff8300d000 R ath_cardbus_ca +ffffffff8300e000 R athn_cardbus_ca +ffffffff8300e030 r athn_cardbus_devices +ffffffff8300f000 R atw_cardbus_ca +ffffffff8300f028 R atw_cardbus_devices +ffffffff83010000 R rtw_cardbus_ca +ffffffff83010028 R rtw_cardbus_devices +ffffffff83011000 R ral_cardbus_ca +ffffffff83011030 r ral_cardbus_devices +ffffffff83012000 R acx_cardbus_ca +ffffffff83012028 r acx_cardbus_devices +ffffffff83013000 R pgt_cardbus_ca +ffffffff83013028 R pgt_cardbus_devices +ffffffff83014000 R ehci_cardbus_ca +ffffffff83015000 R ohci_cardbus_ca +ffffffff83016000 R uhci_cardbus_ca +ffffffff83017000 R malo_cardbus_ca +ffffffff83017028 r malo_cardbus_devices +ffffffff83018000 R bwi_cardbus_ca +ffffffff83018030 r bwi_cardbus_devices +ffffffff83019000 R pcmcia_ca +ffffffff8301a000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff8301b000 r pcmcia_cis_quirks +ffffffff8301c000 R ep_pcmcia_ca +ffffffff8301d000 R ne_pcmcia_ca +ffffffff8301d030 R ne2000devs +ffffffff8301f000 R aic_pcmcia_ca +ffffffff83020000 R com_pcmcia_ca +ffffffff83021000 R wdc_pcmcia_ca +ffffffff83022000 R sm_pcmcia_ca +ffffffff83023000 R xe_pcmcia_ca +ffffffff83024000 R wi_pcmcia_ca +ffffffff83024030 r wi_pcmcia_products +ffffffff83025000 R malo_pcmcia_ca +ffffffff83026000 R an_pcmcia_ca +ffffffff83027000 R pcib_ca +ffffffff83028000 R amdpcib_ca +ffffffff83028028 R amdpcib_devices +ffffffff83029000 R tcpcib_ca +ffffffff83029028 R tcpcib_devices +ffffffff8302a000 R aapic_ca +ffffffff8302b000 R hme_pci_ca +ffffffff8302b028 r hme_promhdr +ffffffff8302b02a r hme_promdat +ffffffff8302c000 R isa_ca +ffffffff8302d000 R isadma_ca +ffffffff8302e000 R fdc_ca +ffffffff8302f000 R fd_ca +ffffffff83030000 R com_isa_ca +ffffffff83031000 R pckbc_isa_ca +ffffffff83032000 R vga_isa_ca +ffffffff83033000 R wdc_isa_ca +ffffffff83034000 R mpu_midi_hw_if +ffffffff83035000 R mpu_isa_ca +ffffffff83036000 R pcppi_ca +ffffffff83037000 R spkr_ca +ffffffff83037030 r pitchtab +ffffffff83038000 R lpt_isa_ca +ffffffff83039000 R wbsio_ca +ffffffff8303a000 R schsio_ca +ffffffff8303b000 R lm_isa_ca +ffffffff8303b028 R lm_wbsio_ca +ffffffff8303c000 R it_sensors +ffffffff8303c110 R it_vrfact +ffffffff8303c140 R it_fan_regs +ffffffff8303c160 R it_fan_ext_regs +ffffffff8303c178 R it_ca +ffffffff8303d000 R abitkv_sensors +ffffffff8303d200 R abitaa_sensors +ffffffff8303d480 R abitav_sensors +ffffffff8303d700 R abitas_sensors +ffffffff8303d980 R abitax_sensors +ffffffff8303dbc0 R abitm4_sensors +ffffffff8303de80 R abitan_sensors +ffffffff8303e120 R abital_sensors +ffffffff8303e3a0 R abitaw_sensors +ffffffff8303e700 R abitni_sensors +ffffffff8303e9a0 R abitat_sensors +ffffffff8303ecc0 R abitan2_sensors +ffffffff8303ef60 R abitab_sensors +ffffffff8303f220 R abitan3_sensors +ffffffff8303f500 R abitaw2_sensors +ffffffff8303f860 R abitat2_sensors +ffffffff8303fb60 R abitab2_sensors +ffffffff8303fea0 R abitin_sensors +ffffffff830401e0 R uguru_ca +ffffffff83041000 R aps_ca +ffffffff83042000 R wsdisplay_emul_ca +ffffffff83042030 r charClass +ffffffff83043000 r usl_syncops +ffffffff83044000 R wsevent_filtops +ffffffff83045000 R wskbd_ca +ffffffff83046000 r latin1_to_upper +ffffffff83047000 R wsmouse_ca +ffffffff83048000 R cyrillic_to_koi8 +ffffffff83048060 R unicode_to_latin2 +ffffffff830480e0 R unicode_to_latin7 +ffffffff83049000 R wsemul_vt100_ops +ffffffff8304a000 r decspcgr2uni +ffffffff8304a100 r dectech2uni +ffffffff8304a200 r nrctable +ffffffff8304b000 r vt100_fkeys +ffffffff8304b0c0 r vt100_pfkeys +ffffffff8304b0e0 r vt100_numpad +ffffffff8304c000 R pckbd_ca +ffffffff8304c028 R pckbd_accessops +ffffffff8304c040 R pckbd_consops +ffffffff8304c060 R pckbd_keymapdata +ffffffff8304c070 R pckbd_xtbl2 +ffffffff8304c100 R pckbd_xtbl2_ext +ffffffff8304d000 r pckbd_keydesc_us +ffffffff8304d250 r pckbd_keydesc_de +ffffffff8304d2f0 r pckbd_keydesc_de_nodead +ffffffff8304d310 r pckbd_keydesc_fr +ffffffff8304d3d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff8304d510 r pckbd_keydesc_dk +ffffffff8304d5a0 r pckbd_keydesc_dk_nodead +ffffffff8304d5b0 r pckbd_keydesc_it +ffffffff8304d640 r pckbd_keydesc_uk +ffffffff8304d6e0 r pckbd_keydesc_jp +ffffffff8304d750 r pckbd_keydesc_sv +ffffffff8304d780 r pckbd_keydesc_sv_nodead +ffffffff8304d790 r pckbd_keydesc_no +ffffffff8304d7c0 r pckbd_keydesc_no_nodead +ffffffff8304d7d0 r pckbd_keydesc_us_declk +ffffffff8304d860 r pckbd_keydesc_us_dvorak +ffffffff8304d900 r pckbd_keydesc_us_colemak +ffffffff8304d948 r pckbd_keydesc_swapctrlcaps +ffffffff8304d960 r pckbd_keydesc_iopener +ffffffff8304d9b0 r pckbd_keydesc_es +ffffffff8304da50 r pckbd_keydesc_be +ffffffff8304db10 r pckbd_keydesc_ru +ffffffff8304dc80 r pckbd_keydesc_ua +ffffffff8304de10 r pckbd_keydesc_sg +ffffffff8304dec0 r pckbd_keydesc_sg_nodead +ffffffff8304dee0 r pckbd_keydesc_sf +ffffffff8304df00 r pckbd_keydesc_pt +ffffffff8304df90 r pckbd_keydesc_lt +ffffffff8304e070 r pckbd_keydesc_la +ffffffff8304e100 r pckbd_keydesc_br +ffffffff8304e180 r pckbd_keydesc_tr +ffffffff8304e230 r pckbd_keydesc_tr_nodead +ffffffff8304e250 r pckbd_keydesc_pl +ffffffff8304e2b0 r pckbd_keydesc_hu +ffffffff8304e3c0 r pckbd_keydesc_si +ffffffff8304e4d0 r pckbd_keydesc_cf +ffffffff8304e5a0 r pckbd_keydesc_cf_nodead +ffffffff8304e5c0 r pckbd_keydesc_lv +ffffffff8304e640 r pckbd_keydesc_nl +ffffffff8304e720 r pckbd_keydesc_nl_nodead +ffffffff8304e740 r pckbd_keydesc_is +ffffffff8304e7cc r pckbd_keydesc_is_nodead +ffffffff8304e7e0 r pckbd_keydesc_ee +ffffffff8304e890 r pckbd_keydesc_ee_nodead +ffffffff8304e8b0 R pckbd_keydesctab +ffffffff8304f000 R pms_ca +ffffffff8304f028 R pms_accessops +ffffffff8304f040 R pms_sec_accessops +ffffffff8304f060 R pms_protocols +ffffffff8304f1e0 r alps_models +ffffffff83050000 R skgpio_led_offset +ffffffff83050008 R skgpio_ca +ffffffff83051000 R hidkbd_trtab +ffffffff83051100 r apple_fn_trans +ffffffff83051120 r apple_tb_trans +ffffffff83051140 r apple_mba_trans +ffffffff83052000 r hidcc_attach_wskbd.accessops +ffffffff83052020 r hidcc_keysyms +ffffffff83053000 R usb_ca +ffffffff83054000 R usb_known_products +ffffffff8305fff0 R usb_known_vendors +ffffffff83062810 R usbd_error_strs +ffffffff83063000 R usb_quirks +ffffffff83063390 R usb_dev_quirks +ffffffff83063398 R usbd_no_quirk +ffffffff83064000 R uhub_ca +ffffffff83064028 R uhub_uhub_ca +ffffffff83065000 R uaudio_ca +ffffffff83065028 R uaudio_hw_if +ffffffff830650e0 R uaudio_rates +ffffffff83065120 r uaudio_clkname.names +ffffffff83065140 r uaudio_feature_addent.features +ffffffff83066000 R uvideo_ca +ffffffff83066028 R uvideo_hw_if +ffffffff83066100 R uvideo_devs +ffffffff83067000 r utvfu_select_norm.pal +ffffffff83067040 r utvfu_select_norm.ntsc +ffffffff83067080 r utvfu_setup_capture.setup +ffffffff83067180 r utvfu_audio_start_chip.setup +ffffffff830671c8 r utvfu_audio_stop_chip.setup +ffffffff830671d8 R utvfu_ca +ffffffff83067200 R utvfu_vid_hw_if +ffffffff830672d0 R utvfu_au_hw_if +ffffffff83068000 R udl_ca +ffffffff83068030 r udl_devs +ffffffff830680b0 r udl_modes +ffffffff83069000 R umidi_hw_if +ffffffff83069030 R umidi_ca +ffffffff83069060 r umidi_evlen +ffffffff83069080 r packet_length +ffffffff8306a000 r quirk_name +ffffffff8306b000 R ucom_ca +ffffffff8306c000 R ugen_ca +ffffffff8306c028 R ugenread_intr_filtops +ffffffff8306c058 R ugenread_isoc_filtops +ffffffff8306d000 R uhidev_ca +ffffffff8306d030 r uhid_graphire_report_descr +ffffffff8306d0b0 r uhid_graphire3_4x5_report_descr +ffffffff8306d160 r uhid_xb360gp_report_descr +ffffffff8306d210 r uhid_xbonegp_report_descr +ffffffff8306e000 R uhid_ca +ffffffff8306e028 R uhidread_filtops +ffffffff8306f000 R fido_ca +ffffffff83070000 R ujoy_ca +ffffffff83071000 r ukbd_keydesc_us +ffffffff830712a0 r ukbd_keydesc_de +ffffffff83071350 r ukbd_keydesc_de_nodead +ffffffff83071370 r ukbd_keydesc_fr +ffffffff83071430 r ukbd_keydesc_fr_apple +ffffffff83071570 r ukbd_keydesc_fr_dvorak_bepo +ffffffff830716b0 r ukbd_keydesc_dk +ffffffff83071750 r ukbd_keydesc_dk_nodead +ffffffff83071760 r ukbd_keydesc_it +ffffffff83071800 r ukbd_keydesc_uk +ffffffff830718b0 r ukbd_keydesc_jp +ffffffff83071920 r ukbd_keydesc_sv +ffffffff83071950 r ukbd_keydesc_sv_nodead +ffffffff83071960 r ukbd_keydesc_no +ffffffff83071990 r ukbd_keydesc_no_nodead +ffffffff830719a0 r ukbd_keydesc_us_dvorak +ffffffff83071a40 r ukbd_keydesc_us_colemak +ffffffff83071a88 r ukbd_keydesc_swapctrlcaps +ffffffff83071aa0 r ukbd_keydesc_iopener +ffffffff83071af0 r ukbd_keydesc_es +ffffffff83071b90 r ukbd_keydesc_be +ffffffff83071c50 r ukbd_keydesc_ru +ffffffff83071dc0 r ukbd_keydesc_ua +ffffffff83071f60 r ukbd_keydesc_sg +ffffffff83072020 r ukbd_keydesc_sg_nodead +ffffffff83072040 r ukbd_keydesc_sf +ffffffff83072060 r ukbd_keydesc_pt +ffffffff830720f0 r ukbd_keydesc_pt_apple +ffffffff83072110 r ukbd_keydesc_lt +ffffffff830721f0 r ukbd_keydesc_la +ffffffff83072290 r ukbd_keydesc_br +ffffffff83072320 r ukbd_keydesc_tr +ffffffff830723e0 r ukbd_keydesc_tr_nodead +ffffffff83072400 r ukbd_keydesc_pl +ffffffff83072460 r ukbd_keydesc_hu +ffffffff83072570 r ukbd_keydesc_si +ffffffff83072690 r ukbd_keydesc_cf +ffffffff83072770 r ukbd_keydesc_cf_nodead +ffffffff83072790 r ukbd_keydesc_lv +ffffffff83072810 r ukbd_keydesc_nl +ffffffff830728f0 r ukbd_keydesc_nl_nodead +ffffffff83072910 r ukbd_keydesc_is +ffffffff830729a4 r ukbd_keydesc_is_nodead +ffffffff830729b0 r ukbd_keydesc_ee +ffffffff83072a60 r ukbd_keydesc_ee_nodead +ffffffff83072a80 R ukbd_keydesctab +ffffffff83073000 R ukbd_countrylayout +ffffffff83073090 R ukbd_consops +ffffffff830730b0 R ukbd_accessops +ffffffff830730c8 R ukbd_ca +ffffffff830730f0 R ukbd_never_console +ffffffff83074000 R ums_accessops +ffffffff83074018 R ums_ca +ffffffff83075000 R umt_accessops +ffffffff83075018 R umt_ca +ffffffff83076000 R uts_devs +ffffffff83076010 R uts_accessops +ffffffff83076028 R uts_ca +ffffffff83077000 R ubcmtp_accessops +ffffffff83077018 R ubcmtp_ca +ffffffff83077040 r ubcmtp_devices +ffffffff83078000 R ucycom_methods +ffffffff83078040 R ucycom_devs +ffffffff83078050 R ucycom_ca +ffffffff83079000 R uslhcom_methods +ffffffff83079040 R uslhcom_ca +ffffffff83079068 r uslhcom_devs +ffffffff8307a000 R ulpt_ca +ffffffff8307b000 R umass_ca +ffffffff8307b028 R umass_bbb_methods +ffffffff8307b040 R umass_cbi_methods +ffffffff8307c000 R umass_quirks +ffffffff8307d000 R umass_scsi_switch +ffffffff8307e000 R uthum_devs +ffffffff8307e008 R uthum_ca +ffffffff8307e030 r uthum_sensor_type_s +ffffffff8307f000 R ugold_devs +ffffffff8307f018 R ugold_ca +ffffffff83080000 R utrh_devs +ffffffff83080008 R utrh_ca +ffffffff83081000 R uoakrh_devs +ffffffff83081008 R uoakrh_ca +ffffffff83081030 R uoakrh_methods +ffffffff83082000 R uoaklux_devs +ffffffff83082008 R uoaklux_ca +ffffffff83082030 R uoaklux_methods +ffffffff83083000 R uoakv_devs +ffffffff83083008 R uoakv_ca +ffffffff83083030 R uoakv_methods +ffffffff83084000 R uonerng_ca +ffffffff83085000 R urng_ca +ffffffff83085030 r urng_devs +ffffffff83086000 R udcf_ca +ffffffff83086028 r udcf_devs +ffffffff83087000 R umbg_ca +ffffffff83088000 R uvisor_methods +ffffffff83088040 R uvisor_ca +ffffffff83088070 r uvisor_devs +ffffffff83089000 R udsbr_hw_if +ffffffff83089028 R udsbr_ca +ffffffff8308a000 R utwitch_devs +ffffffff8308a008 R utwitch_ca +ffffffff8308b000 R aue_devs +ffffffff8308b1b0 R aue_ca +ffffffff8308c000 R axe_devs +ffffffff8308c0d0 R axe_ca +ffffffff8308d000 R axen_devs +ffffffff8308d020 R axen_ca +ffffffff8308e000 R smsc_ca +ffffffff8308e030 r smsc_devs +ffffffff8308f000 R cue_ca +ffffffff83090000 R kue_devs +ffffffff83090088 R kue_ca +ffffffff83091000 R cdce_devs +ffffffff83091048 R cdce_ca +ffffffff83092000 R urndis_ca +ffffffff83092030 R urndis_class +ffffffff83093000 R mos_devs +ffffffff83093018 R mos_ca +ffffffff83094000 R mue_devs +ffffffff83094020 R mue_ca +ffffffff83095000 R udav_ca +ffffffff83095030 r udav_devs +ffffffff83096000 R upl_ca +ffffffff83097000 R ugl_ca +ffffffff83098000 R url_ca +ffffffff83098030 r url_devs +ffffffff83099000 R ure_devs +ffffffff830990e8 R ure_ca +ffffffff8309a000 R uaq_devs +ffffffff8309a018 R uaq_ca +ffffffff8309b000 R umodem_methods +ffffffff8309b040 R umodem_ca +ffffffff8309c000 R uftdi_methods +ffffffff8309c040 R uftdi_ca +ffffffff8309c070 r uftdi_devs +ffffffff8309d000 R uplcom_methods +ffffffff8309d040 R uplcom_ca +ffffffff8309d070 r uplcom_devs +ffffffff8309e000 R umct_methods +ffffffff8309e040 R umct_ca +ffffffff8309e070 r umct_devs +ffffffff8309f000 R uvscom_methods +ffffffff8309f040 R uvscom_ca +ffffffff8309f070 r uvscom_devs +ffffffff830a0000 R ubsa_methods +ffffffff830a0040 R ubsa_devs +ffffffff830a0060 R ubsa_ca +ffffffff830a1000 R ukspan_ca +ffffffff830a1028 r ukspan_devs +ffffffff830a1030 r ukspan_methods +ffffffff830a2000 R uslcom_methods +ffffffff830a2040 R uslcom_ca +ffffffff830a2070 r uslcom_devs +ffffffff830a3000 R uark_methods +ffffffff830a3040 R uark_ca +ffffffff830a3068 r uark_devs +ffffffff830a4000 R moscom_methods +ffffffff830a4040 R moscom_ca +ffffffff830a4068 r moscom_devs +ffffffff830a5000 R umcs_methods +ffffffff830a5040 R umcs_devs +ffffffff830a5050 R umcs_ca +ffffffff830a6000 R uscom_methods +ffffffff830a6040 R uscom_ca +ffffffff830a6068 r uscom_devs +ffffffff830a7000 R ucrcom_methods +ffffffff830a7040 R ucrcom_ca +ffffffff830a8000 R uxrcom_methods +ffffffff830a8040 R uxrcom_ca +ffffffff830a8068 r uxrcom_devs +ffffffff830a9000 R uipaq_methods +ffffffff830a9040 R uipaq_ca +ffffffff830a9070 r uipaq_devs +ffffffff830aa000 R umsm_methods +ffffffff830aa040 R umsm_ca +ffffffff830aa070 r umsm_devs +ffffffff830ab000 R uchcom_methods +ffffffff830ab040 R uchcom_ca +ffffffff830ab070 r uchcom_devs +ffffffff830ab090 r dividers +ffffffff830ac000 R uticom_methods +ffffffff830ac040 R uticom_ca +ffffffff830ac070 r uticom_devs +ffffffff830ad000 R wi_usb_devs +ffffffff830ad0f0 R wi_usb_ca +ffffffff830ae000 R atu_ca +ffffffff830af000 R ural_ca +ffffffff830af030 r ural_devs +ffffffff830af0a0 r ural_rf2522_r2 +ffffffff830af0e0 r ural_rf2524_r2 +ffffffff830af120 r ural_rf2525_hi_r2 +ffffffff830af160 r ural_rf2525_r2 +ffffffff830af1a0 r ural_rf2525e_r2 +ffffffff830af1e0 r ural_rf2526_hi_r2 +ffffffff830af220 r ural_rf2526_r2 +ffffffff830af260 r ural_def_bbp +ffffffff830af2a0 r ural_def_mac +ffffffff830b0000 R rum_ca +ffffffff830b0030 r rum_devs +ffffffff830b0110 r rum_rf5225 +ffffffff830b0460 r rum_rf5226 +ffffffff830b07b0 r rum_def_bbp +ffffffff830b07f0 r rum_def_mac +ffffffff830b1000 R run_ca +ffffffff830b1030 r run_devs +ffffffff830b1430 r rt2860_rf2850 +ffffffff830b1860 r rt2860_rates +ffffffff830b1920 r rt5592_freqs_40mhz +ffffffff830b1a60 r rt5592_freqs_20mhz +ffffffff830b1ba0 r rt5592_2ghz_def_rf +ffffffff830b1be0 r rt5592_chan_5ghz +ffffffff830b1e30 r rt5592_def_bbp +ffffffff830b1e70 r rt5592_bbp_r196 +ffffffff830b1ed0 r rt5390_def_bbp +ffffffff830b1f00 r rt3572_def_rf +ffffffff830b1f40 r rt3070_def_rf +ffffffff830b1f70 r rt3593_def_rf +ffffffff830b1fb0 r rt5592_def_rf +ffffffff830b1fe0 r rt5392_def_rf +ffffffff830b2060 r rt5390_def_rf +ffffffff830b20e0 r rt2870_def_mac +ffffffff830b3000 R mtw_ca +ffffffff830b3030 r mtw_devs +ffffffff830b3070 r rt2860_rates +ffffffff830b3130 r mt7601_rf_chan +ffffffff830b31a0 r mt7601_def_bbp +ffffffff830b32d0 r mt7601_rf_bank0 +ffffffff830b3330 r mt7601_rf_bank4 +ffffffff830b33b0 r mt7601_rf_bank5 +ffffffff830b3430 r mt7601_def_mac +ffffffff830b4000 R zyd_ca +ffffffff830b4030 r zyd_devs +ffffffff830b41b0 r zyd_rfmd_init.phyini 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dt_static_vmm_inout +ffffffff83449b20 D dt_static_smr_call +ffffffff83449b90 D dt_static_smr_called +ffffffff83449c00 D dt_static_smr_barrier_enter +ffffffff83449c70 D dt_static_smr_barrier_exit +ffffffff83449ce0 D dt_static_smr_wakeup +ffffffff83449d50 D dt_static_smr_thread +ffffffff83449dc0 D dt_static_refcnt_none +ffffffff83449e30 D dt_static_refcnt_ethmulti +ffffffff83449ea0 D dt_static_refcnt_ifaddr +ffffffff83449f10 D dt_static_refcnt_ifmaddr +ffffffff83449f80 D dt_static_refcnt_inpcb +ffffffff83449ff0 D dt_static_refcnt_rtentry +ffffffff8344a060 D dt_static_refcnt_syncache +ffffffff8344a0d0 D dt_static_refcnt_tdb +ffffffff8344b000 D db_next_free_breakpoint +ffffffff8344b008 D db_breakpoints_inserted +ffffffff8344c000 D db_ed_style +ffffffff8344d000 D db_examine_format +ffffffff8344d078 D db_print_format +ffffffff8344e000 D db_history_size +ffffffff8344e008 D db_history_curr +ffffffff8344e010 D db_history_last +ffffffff8344f000 D db_tab_stop_width +ffffffff8344f004 D db_max_line +ffffffff8344f008 D db_max_width +ffffffff8344f00c D db_radix +ffffffff83450000 D db_lastsym +ffffffff83450008 D db_maxoff +ffffffff83451000 D db_vars +ffffffff83451090 D db_evars +ffffffff83452000 D db_watchpoints_inserted +ffffffff83452008 D db_next_free_watchpoint +ffffffff83453000 D db_log +ffffffff83454000 D audio_cd +ffffffff83454020 D audio_lock +ffffffff83455000 D midi_cd +ffffffff83456000 D rnd_cold +ffffffff83456004 D rnd_slowextract +ffffffff83456008 D rnd_timeout +ffffffff83456050 D rndlock +ffffffff83456060 D rndreinit_timeout +ffffffff834560a8 D rnd_task +ffffffff83457000 D video_cd +ffffffff83458000 d rrip_table_analyze +ffffffff834580e0 d rrip_table_getname +ffffffff834581e0 d rrip_table_getsymname +ffffffff83458280 d rrip_table_extref +ffffffff83459000 D nexecs +ffffffff8345a000 D elf_note_names +ffffffff8345b000 D ncpus +ffffffff8345b004 D ncpusfound +ffffffff8345c000 D acct_lock +ffffffff8345c010 D acctsuspend +ffffffff8345c014 D acctresume +ffffffff8345c018 D acctrate +ffffffff8345d000 D bufqs_mtx +ffffffff8345e000 D ticks +ffffffff8345f000 D fhdlk +ffffffff83460000 D kqueue_klist_lock +ffffffff83460010 D kqueue_ps_list_lock +ffffffff83460020 D kq_timeoutmax +ffffffff83461000 D stackgap_random +ffffffff83462000 D deadproc_mutex +ffffffff83463000 D nprocesses +ffffffff83463004 D nthreads +ffffffff83463008 D fork_tfmrate +ffffffff83464000 D kthread_q +ffffffff83465000 D nkmempages +ffffffff83465008 D malloc_mtx +ffffffff83465020 D memname +ffffffff834654b0 D sysctl_kmemlock +ffffffff834654c0 D malloc_errintvl +ffffffff83466000 D maxdmap +ffffffff83466008 D maxsmap +ffffffff83466010 D rlimit_lock +ffffffff83467000 D sched_cost_load +ffffffff83467004 D sched_cost_priority +ffffffff83467008 D sched_cost_runnable +ffffffff8346700c D sched_cost_resident +ffffffff83468000 D intrmap_lock +ffffffff83469000 D nosuidcoredump +ffffffff83469008 D sigio_lock +ffffffff8346a000 D smr_lock +ffffffff8346a010 D smr_logintvl +ffffffff8346b000 D startuphook_list +ffffffff8346c000 D sysctl_lock +ffffffff8346c010 D sysctl_disklock +ffffffff8346c020 d openbsd +ffffffff8346c024 d arg_max +ffffffff8346c028 d posix_version +ffffffff8346c02c d ngroups_max +ffffffff8346c030 d int_one +ffffffff8346c034 d maxpartitions +ffffffff8346c038 d raw_part +ffffffff8346c03c D allowpowerdown +ffffffff8346c040 D hw_power +ffffffff8346c044 d byte_order +ffffffff8346d000 d thrsleep_queue +ffffffff8346d010 d thrsleep_lock +ffffffff8346e000 D tc_lock +ffffffff8346e010 D windup_mtx +ffffffff8346e020 d dummy_timecounter +ffffffff8346e070 D timecounter +ffffffff8346e078 d timehands +ffffffff8346e080 d th0 +ffffffff8346e118 d th1 +ffffffff8346f000 D itimer_mtx +ffffffff8346f010 D ratecheck_mtx +ffffffff8346f020 D ppsratecheck_mtx +ffffffff8346f030 D resettodr_to +ffffffff8346f078 D resettodr_task +ffffffff83470000 D timeout_mutex +ffffffff83471000 D wdog_auto +ffffffff83472000 D taskq_sys +ffffffff83472050 D taskq_sys_mp +ffffffff83473000 d update_loadavg.to +ffffffff83473048 D ccpu +ffffffff83473050 d schedcpu.to +ffffffff83473098 D perflevel +ffffffff8347309c D perfpolicy +ffffffff834730a0 D setperf_to +ffffffff83474000 D autoconf_attdet_mtx +ffffffff83474010 D msgs +ffffffff83475000 d evcount_list +ffffffff83475010 d evcount_percpu_init_list +ffffffff83476000 D syslogf_rwlock +ffffffff83476010 D log_mtx +ffffffff83476020 D log_kq_mtx +ffffffff83476030 D logstash_in +ffffffff83476038 D logstash_out +ffffffff83476040 D logstash_rwlock +ffffffff83477000 D pool_head +ffffffff83477010 D pool_lock +ffffffff83477020 D pool_debug +ffffffff83477028 D pool_allocator_single +ffffffff83477040 D pool_allocator_multi +ffffffff83477058 D pool_allocator_multi_ni +ffffffff83477070 D pool_gc_tick +ffffffff834770b8 D pool_gc_task +ffffffff83478000 D kprintf_mutex +ffffffff83478010 D db_panic +ffffffff83478014 D splassert_ctl +ffffffff83478018 D v_putc +ffffffff83478020 D printf_flags +ffffffff83479000 D userconf_base +ffffffff83479004 D userconf_maxdev +ffffffff83479008 D userconf_totdev +ffffffff8347900c D userconf_maxlocnames +ffffffff83479010 D userconf_cnt +ffffffff83479014 D userconf_lines +ffffffff83479018 D userconf_histsz +ffffffff83479020 D userconf_cmds +ffffffff8347a000 D ftlock +ffffffff8347b000 d ppollcollect.poll_errintvl +ffffffff8347c000 D ttydefchars +ffffffff8347c014 D ttclos +ffffffff8347c01b D ttopen +ffffffff8347c022 D ttybg +ffffffff8347c028 D ttyin +ffffffff8347c02e D ttyout +ffffffff8347c038 D ttylist_lock +ffffffff8347d000 D linesw +ffffffff8347d280 D nlinesw +ffffffff8347e000 D pt_softc_lock +ffffffff8347f000 d mbstat_boot_boot_cpumem +ffffffff8347f080 D mbstat +ffffffff8347f090 D mclsizes +ffffffff8347f0b0 D m_extref_mtx +ffffffff8347f0c0 D m_pool_allocator +ffffffff83480000 D somaxconn +ffffffff83480004 D sominconn +ffffffff83480008 D sosplice_lock +ffffffff83481000 D sb_max +ffffffff83482000 D unp_df_lock +ffffffff83482010 D unp_gc_lock +ffffffff83482020 D unp_rights_mtx +ffffffff83482030 D unp_ino_mtx +ffffffff83482040 D unp_gc_task +ffffffff83482070 D unpst_sendspace +ffffffff83482074 D unpst_recvspace +ffffffff83482078 D unpsq_sendspace +ffffffff8348207c D unpsq_recvspace +ffffffff83482080 D unpdg_sendspace +ffffffff83482084 D unpdg_recvspace +ffffffff83483000 D doingcache +ffffffff83484000 D maxvfsconf +ffffffff83484010 d vfsconflist +ffffffff83485000 D lockf_lock +ffffffff83485010 D maxlocksperuid +ffffffff83486000 D iftovt_tab +ffffffff83486040 D vttoif_tab +ffffffff83486064 D suid_clear +ffffffff83486068 D vnode_mtx +ffffffff83486078 D vfs_stall_lock +ffffffff83486090 D vtypes +ffffffff834860e0 D vtags +ffffffff83487000 D syncer_maxdelay +ffffffff83487004 D syncdelay +ffffffff83488000 D dosdirtemplate +ffffffff83489000 D ntfs_hashlock +ffffffff8348a000 D ntfs_toupper_lock +ffffffff8348b000 D art_table_gc_mtx +ffffffff8348b010 D art_table_gc_task +ffffffff8348b040 D art_node_gc_mtx +ffffffff8348b050 D art_node_gc_task +ffffffff8348c000 D bpf_bufsize +ffffffff8348c004 D bpf_maxbufsize +ffffffff8348d000 D ifg_head +ffffffff8348d010 D if_cloners_lock +ffffffff8348d020 D if_hooks_mtx +ffffffff8348d030 D if_input_task_locked +ffffffff8348d060 D netlock +ffffffff8348d070 D ifnetlist +ffffffff8348e000 D ifiq_maxlen_drop +ffffffff8348e004 D ifiq_maxlen_return +ffffffff8348f000 D etherbroadcastaddr +ffffffff8348f006 D ether_ipmulticast_min +ffffffff8348f00c D ether_ipmulticast_max +ffffffff8348f012 D ether_ip6multicast_min +ffffffff8348f018 D ether_ip6multicast_max +ffffffff83490000 D etherip_cloner +ffffffff83490030 D etherip_list +ffffffff83491000 D loop_cloner +ffffffff83492000 D ifmedia_mtx +ffffffff83493000 D ppp_compressors +ffffffff83493020 D ppp_cloner +ffffffff83494000 D ppp_pkt_init +ffffffff83495000 D ppp_bsd_compress +ffffffff83496000 D ppp_deflate +ffffffff83496070 D ppp_deflate_draft +ffffffff83497000 D tun_cloner +ffffffff83497030 D tap_cloner +ffffffff83498000 D bridgeintrq +ffffffff83498038 D bridge_cloner +ffffffff83499000 d veb_cloner +ffffffff83499030 d vport_cloner +ffffffff8349a000 D vlan_tagh_lk +ffffffff8349a010 D vlan_cloner +ffffffff8349a040 D svlan_cloner +ffffffff8349b000 D pipex_list_mtx +ffffffff8349b010 D pipex_prune +ffffffff8349b018 D pipexoutq +ffffffff8349b050 d SHAPad2 +ffffffff8349c000 D rtmap_gc +ffffffff8349c018 D rt_rc +ffffffff8349d000 D rt_labels +ffffffff8349d010 D rtlabel_mtx +ffffffff8349e000 D enc_cloner +ffffffff8349f000 D gre_cloner +ffffffff8349f030 D gre_list +ffffffff8349f040 D mgre_cloner +ffffffff8349f070 D egre_cloner +ffffffff8349f0a0 D nvgre_cloner +ffffffff8349f0d0 D eoip_cloner +ffffffff834a0000 D trunk_cloner +ffffffff834a1000 d aggr_cloner +ffffffff834a2000 d tpmr_cloner +ffffffff834a3000 D mpe_cloner +ffffffff834a4000 D mpw_cloner +ffffffff834a5000 D mpip_cloner +ffffffff834a6000 d bpe_cloner +ffffffff834a6030 d bpe_lock +ffffffff834a7000 D vether_cloner +ffffffff834a8000 D pair_cloner +ffffffff834a9000 d vxlan_cloner +ffffffff834a9030 d vxlan_lock +ffffffff834a9040 d vxlan_teps +ffffffff834aa000 D underload_interval +ffffffff834aa010 D wg_cloner +ffffffff834ab000 d stoeplitz_keyseed +ffffffff834ac000 D ieee80211_cache_size +ffffffff834ad000 D arpt_prune +ffffffff834ad004 D arpt_keep +ffffffff834ad008 D arpt_down +ffffffff834ad010 D arpinq +ffffffff834ad048 D arp_mtx +ffffffff834ad058 D arp_maxtries +ffffffff834ae000 D ipport_firstauto +ffffffff834ae004 D ipport_lastauto +ffffffff834ae008 D ipport_hifirstauto +ffffffff834ae00c D ipport_hilastauto +ffffffff834af000 D divert_sendspace +ffffffff834af004 D divert_recvspace +ffffffff834af008 D divbhashsize +ffffffff834b0000 D icmptstamprepl +ffffffff834b0004 D icmperrppslim +ffffffff834b0008 D icmp_redirtimeout +ffffffff834b1000 D ip_sendredirects +ffffffff834b1004 D ip_defttl +ffffffff834b1008 D ip_mtudisc +ffffffff834b100c D ip_mtudisc_timeout +ffffffff834b1010 D ipq_mutex +ffffffff834b1020 D ip_maxqueue +ffffffff834b1028 D ipintrq +ffffffff834b1060 d ipsend_task +ffffffff834b1090 d ipsendraw_task +ffffffff834b2000 D ip_mrtproto +ffffffff834b2004 d sin +ffffffff834b3000 D rip_sendspace +ffffffff834b3008 D rip_recvspace +ffffffff834b4000 D tcp_debug_mtx +ffffffff834b5000 D tcprexmtthresh +ffffffff834b5004 D tcptv_keep_init +ffffffff834b5008 D tcp_rst_ppslim +ffffffff834b500c D tcp_ackdrop_ppslim +ffffffff834b5010 D tcp_syn_hash_size +ffffffff834b5014 D tcp_syn_cache_limit +ffffffff834b5018 D tcp_syn_bucket_limit +ffffffff834b501c D tcp_syn_use_limit +ffffffff834b5020 D syn_cache_mtx +ffffffff834b6000 D tcp_outflags +ffffffff834b7000 D tcp_timer_mtx +ffffffff834b7010 D tcp_mssdflt +ffffffff834b7014 D tcp_rttdflt +ffffffff834b7018 D tcp_do_rfc1323 +ffffffff834b701c D tcp_do_sack +ffffffff834b7020 D tcp_do_rfc3390 +ffffffff834b7024 D tcp_do_tso +ffffffff834b7028 D tcp_reass_limit +ffffffff834b702c D tcp_sackhole_limit +ffffffff834b8000 D tcp_backoff +ffffffff834b8034 D tcp_totbackoff +ffffffff834b9000 D tcp_sendspace +ffffffff834b9004 D tcp_recvspace +ffffffff834b9008 D tcp_autorcvbuf_inc +ffffffff834ba000 D udpcksum +ffffffff834ba004 D udp_sendspace +ffffffff834ba008 D udp_recvspace +ffffffff834bb000 D ipsec_flows_mtx +ffffffff834bb010 D ipsec_ids_idle +ffffffff834bb014 D ipsec_ids_next_flow +ffffffff834bb018 D ipsec_policy_head +ffffffff834bb028 D ipsp_ids_gc_timeout +ffffffff834bb070 D tdb_sadb_mtx +ffffffff834bb080 d tdb_hashmask +ffffffff834bc000 D ipo_tdb_mtx +ffffffff834bc010 D ipsec_acquire_mtx +ffffffff834bc020 D ipsec_acquire_head +ffffffff834bd000 D ipsec_keep_invalid +ffffffff834bd004 D ipsec_require_pfs +ffffffff834bd008 D ipsec_soft_timeout +ffffffff834bd00c D ipsec_exp_timeout +ffffffff834bd010 D ipsec_soft_first_use +ffffffff834bd014 D ipsec_exp_first_use +ffffffff834bd018 D ipsec_expire_acquire +ffffffff834bd01c D esp_enable +ffffffff834bd020 D ah_enable +ffffffff834be000 D udpencap_enable +ffffffff834be004 D udpencap_port +ffffffff834bf000 D carp_vh_rc +ffffffff834bf020 D carp_sc_rc +ffffffff834bf040 D carp_opts +ffffffff834bf058 D carp_cloner +ffffffff834bf088 d carp_send_na.mcast ffffffff834c0000 d PADDING -ffffffff834c1000 d weak_keys -ffffffff834c2000 D swcr_id -ffffffff834c3000 D window_inflate -ffffffff834c3004 D window_deflate -ffffffff834c4000 D ghash_update -ffffffff834c5000 D mpls_defttl -ffffffff834c5004 D mpls_mapttl_ip -ffffffff834c6000 D nfskevq_lock -ffffffff834c7000 D desirednfsrvcache -ffffffff834c8000 D nfs_niothreads -ffffffff834c9000 D fragtbl -ffffffff834ca000 D ffs_vtbl -ffffffff834cb000 D dirchk -ffffffff834cc000 D desireddquot -ffffffff834cd000 D amap_list_lock -ffffffff834ce000 d uao_list_lock -ffffffff834cf000 D udv_lock -ffffffff834d0000 d uvmexp_countersboot_boot_cpumem -ffffffff834d00c0 D uvmexp_counters -ffffffff834d00c8 D vm_min_kernel_address -ffffffff834d1000 D no_constraint -ffffffff834d2000 d uvm_kmapent_warn_rate -ffffffff834d3000 D maxslp -ffffffff834d4000 D uvmpagerops -ffffffff834d5000 D uvm_swap_data_lock -ffffffff834d5010 D swap_syscall_lock -ffffffff834d5020 D oommtx -ffffffff834d6000 D uvm_doswapencrypt -ffffffff834d7000 D gif_list -ffffffff834d7010 D gif_cloner -ffffffff834d8000 d sec_cloner -ffffffff834d8030 d sec_tdb_gc_mtx -ffffffff834d8040 d sec_tdb_gc_task -ffffffff834d9000 D divert6_sendspace -ffffffff834d9004 D divert6_recvspace -ffffffff834d9008 D divb6hashsize -ffffffff834da000 d in6_get_hw_ifid.allone -ffffffff834db000 D ip6_sendredirects -ffffffff834db004 D ip6_defhlim -ffffffff834db008 D ip6_defmcasthlim -ffffffff834db00c D ip6_maxfragpackets -ffffffff834db010 D ip6_maxfrags -ffffffff834db014 D ip6_log_interval -ffffffff834db018 D ip6_hdrnestlimit -ffffffff834db01c D ip6_dad_count -ffffffff834db020 D ip6_auto_flowlabel -ffffffff834db024 D ip6_use_deprecated -ffffffff834db028 D ip6_neighborgcthresh -ffffffff834db02c D ip6_maxdynroutes -ffffffff834db030 D rip6_sendspace -ffffffff834db038 D rip6_recvspace -ffffffff834db040 D icmp6_redirtimeout -ffffffff834db044 D icmp6errppslim -ffffffff834db048 D ip6_mtudisc_timeout -ffffffff834dc000 D frag6_mutex -ffffffff834dd000 d icmp6_mtudisc_hiwat -ffffffff834dd004 d icmp6_mtudisc_lowat -ffffffff834de000 d randomtab_20 -ffffffff834df000 D ip6intrq -ffffffff834df038 d ip6send_task -ffffffff834e0000 D nd6_timer_next -ffffffff834e0008 D nd6_expire_next -ffffffff834e0010 D nd6_delay -ffffffff834e0014 D nd6_umaxtries -ffffffff834e0018 D nd6_mmaxtries -ffffffff834e001c D nd6_gctimer -ffffffff834e0020 D nd6_maxndopt -ffffffff834e0028 D nd6_mtx -ffffffff834e0038 D nd6_list -ffffffff834e1000 d dadq -ffffffff834e2000 D pfkeyv2_mtx -ffffffff834e2010 d pfkeyv2_seq -ffffffff834e3000 D sadb_exts_allowed_in -ffffffff834e3090 D sadb_exts_required_in -ffffffff834e4000 D cold -ffffffff834e5000 D bdevsw -ffffffff834e5460 D nblkdev -ffffffff834e5470 D cdevsw -ffffffff834e7450 D nchrdev -ffffffff834e7454 D mem_no -ffffffff834e7458 D swapdev -ffffffff834e7460 D constab -ffffffff834e8000 D machine -ffffffff834e8008 D cpu_idle_cycle_fcn -ffffffff834e8010 D lid_action -ffffffff834e8014 D pwr_action -ffffffff834e8018 D isa_constraint -ffffffff834e8028 D dma_constraint -ffffffff834e8040 D uvm_md_constraints -ffffffff834e8058 D delay_func -ffffffff834e8060 D initclock_func -ffffffff834e8068 D startclock_func -ffffffff834e8070 D bootinfo_size -ffffffff834e8074 D waittime -ffffffff834e8078 D dumpmag -ffffffff834e9000 d identifycpu.prevci -ffffffff834ea000 D tsc_rdtsc -ffffffff834ea008 D tsc_timecounter -ffffffff834ea058 D tsc_is_synchronized -ffffffff834eb000 D local_apic -ffffffff834eb020 D lapic_id -ffffffff834eb080 D lapic_tpr -ffffffff834eb0a0 d lapic_ppr -ffffffff834eb100 d lapic_isr -ffffffff834ec000 D warn_once -ffffffff834ed000 d errata -ffffffff834ee000 D cpu_ucode_mtx -ffffffff834ef000 D mem_owner_bios -ffffffff834ef008 D mrops -ffffffff834ef028 D mtrrmask -ffffffff834ef030 D mtrrtomrt -ffffffff834f0000 D pg_frame -ffffffff834f0008 D pg_lgframe -ffffffff834f0010 D pmap_pg_wc -ffffffff834f0018 D pmaps_lock -ffffffff834f0028 d pmap_maxkvaddr -ffffffff834f1000 D kv_physwait -ffffffff834f2000 D fpu_save_len -ffffffff834f3000 D i8259_pic -ffffffff834f4000 D softintr_pic -ffffffff834f5000 D ipifunc -ffffffff834f6000 D setperf_mp_mutex -ffffffff834f7000 D db_Grp6 -ffffffff834f7040 D db_Grp7 -ffffffff834f7100 D db_Grp8 -ffffffff834f7140 D db_Grp9 -ffffffff834f7200 D db_GrpA -ffffffff834f7240 D db_GrpB -ffffffff834f7280 D db_GrpC -ffffffff834f72c0 D db_inst_0f0x -ffffffff834f7440 D db_inst_0f2x -ffffffff834f75c0 D db_inst_0f3x -ffffffff834f7740 D db_inst_0f8x -ffffffff834f78c0 D db_inst_0f9x -ffffffff834f7a40 D db_inst_0fax -ffffffff834f7bc0 D db_inst_0fbx -ffffffff834f7d40 D db_inst_0fcx -ffffffff834f7ec0 D db_inst_0f -ffffffff834f7f40 D db_Esc92 -ffffffff834f7f80 D db_Esc94 -ffffffff834f7fc0 D db_Esc95 -ffffffff834f8000 D db_Esc96 -ffffffff834f8040 D db_Esc97 -ffffffff834f8080 D db_Esca5 -ffffffff834f80c0 D db_Escb4 -ffffffff834f8100 D db_Esce3 -ffffffff834f8140 D db_Escf4 -ffffffff834f8180 D db_Esc8 -ffffffff834f8240 D db_Esc9 -ffffffff834f8300 D db_Esca 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pmap_initialized -ffffffff838ce040 B kernel_pmap_store -ffffffff838ce118 B cr3_reuse_pcid -ffffffff838ce120 b cr3_pcid_temp -ffffffff838ce128 B virtual_avail -ffffffff838ce130 B pg_xo -ffffffff838ce140 B protection_codes -ffffffff838ce180 B pmap_use_pcid -ffffffff838ce184 b cr3_pcid_proc -ffffffff838ce188 B cr3_pcid_proc_intel -ffffffff838ce190 B pmaps -ffffffff838ce198 B pmap_pmap_pool -ffffffff838ce340 B pmap_pv_pool -ffffffff838ce4e8 B pmap_pdp_pool -ffffffff838cf000 B fpu_mxcsr_mask -ffffffff838cf008 B xsave_mask -ffffffff838d0000 B x86_soft_intrs -ffffffff838d1000 B i8259_imen -ffffffff838d2000 B prev_cache -ffffffff838d3000 B intr_shared_edge -ffffffff838d3004 B intr_suspended -ffffffff838d3008 B intr_nowake -ffffffff838d3010 B fake_softclock_intrhand -ffffffff838d3080 B fake_softnet_intrhand -ffffffff838d30f0 B fake_softtty_intrhand -ffffffff838d3160 B fake_timer_intrhand -ffffffff838d31d0 B fake_ipi_intrhand -ffffffff838d3240 B fake_xen_intrhand -ffffffff838d32b0 B fake_hyperv_intrhand -ffffffff838d4000 B atdevbase -ffffffff838d4010 b ioport_ex_storage -ffffffff838d42e0 B ioport_ex -ffffffff838d42f0 b iomem_ex_storage -ffffffff838d45c0 B iomem_ex -ffffffff838d45c8 b ioport_malloc_safe -ffffffff838d5000 B mp_perflevel -ffffffff838d5008 B ul_setperf -ffffffff838d6000 B cn_tab -ffffffff838d7000 B ddb_mp_mutex -ffffffff838d7010 B ddb_state -ffffffff838d7018 B ddb_regs -ffffffff838d70c8 B db_switch_cpu -ffffffff838d70d0 B db_switch_to_cpu -ffffffff838d70d8 B ddb_active_cpu -ffffffff838d8000 B rtclock_tval -ffffffff838d8008 B i8254_ticked -ffffffff838d800c B i8254_offset -ffffffff838d8010 B i8254_lastcount -ffffffff838d8018 b rtcstart.rtcdrain_timeout -ffffffff838d8060 B rtc_update_century -ffffffff838d8068 B rtc_todr -ffffffff838d9000 B k8pnow_current_state -ffffffff838da000 B bus_clock -ffffffff838da008 b est_fqlist -ffffffff838db000 B k1x_current_state -ffffffff838dc000 B rotatedfonts -ffffffff838dc008 B rasops_framebuffers -ffffffff838dd000 b stamp_attr -ffffffff838dd010 b stamp +ffffffff834c1000 d PADDING +ffffffff834c2000 d weak_keys +ffffffff834c3000 D swcr_id +ffffffff834c4000 D window_inflate +ffffffff834c4004 D window_deflate +ffffffff834c5000 D ghash_update +ffffffff834c6000 D mpls_defttl +ffffffff834c6004 D mpls_mapttl_ip +ffffffff834c7000 D nfskevq_lock +ffffffff834c8000 D desirednfsrvcache +ffffffff834c9000 D nfs_niothreads +ffffffff834ca000 D fragtbl +ffffffff834cb000 D ffs_vtbl +ffffffff834cc000 D dirchk +ffffffff834cd000 D desireddquot +ffffffff834ce000 D amap_list_lock +ffffffff834cf000 d uao_list_lock +ffffffff834d0000 D udv_lock +ffffffff834d1000 d uvmexp_countersboot_boot_cpumem +ffffffff834d10c0 D uvmexp_counters +ffffffff834d10c8 D vm_min_kernel_address +ffffffff834d2000 D no_constraint +ffffffff834d3000 d uvm_kmapent_warn_rate +ffffffff834d4000 D maxslp +ffffffff834d5000 D uvmpagerops +ffffffff834d6000 D uvm_swap_data_lock +ffffffff834d6010 D swap_syscall_lock +ffffffff834d6020 D oommtx +ffffffff834d7000 D uvm_doswapencrypt +ffffffff834d8000 D gif_list +ffffffff834d8010 D gif_cloner +ffffffff834d9000 d sec_cloner +ffffffff834d9030 d sec_tdb_gc_mtx +ffffffff834d9040 d sec_tdb_gc_task +ffffffff834da000 D divert6_sendspace +ffffffff834da004 D divert6_recvspace +ffffffff834da008 D divb6hashsize +ffffffff834db000 d in6_get_hw_ifid.allone +ffffffff834dc000 D ip6_sendredirects +ffffffff834dc004 D ip6_defhlim +ffffffff834dc008 D ip6_defmcasthlim +ffffffff834dc00c D ip6_maxfragpackets +ffffffff834dc010 D ip6_maxfrags +ffffffff834dc014 D ip6_log_interval +ffffffff834dc018 D ip6_hdrnestlimit +ffffffff834dc01c D ip6_dad_count +ffffffff834dc020 D ip6_auto_flowlabel +ffffffff834dc024 D ip6_use_deprecated +ffffffff834dc028 D ip6_neighborgcthresh +ffffffff834dc02c D ip6_maxdynroutes +ffffffff834dc030 D rip6_sendspace +ffffffff834dc038 D rip6_recvspace +ffffffff834dc040 D icmp6_redirtimeout +ffffffff834dc044 D icmp6errppslim +ffffffff834dc048 D ip6_mtudisc_timeout +ffffffff834dd000 D frag6_mutex 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+ffffffff834f3000 D fpu_save_len +ffffffff834f4000 D i8259_pic +ffffffff834f5000 D softintr_pic +ffffffff834f6000 D ipifunc +ffffffff834f7000 D setperf_mp_mutex +ffffffff834f8000 D db_Grp6 +ffffffff834f8040 D db_Grp7 +ffffffff834f8100 D db_Grp8 +ffffffff834f8140 D db_Grp9 +ffffffff834f8200 D db_GrpA +ffffffff834f8240 D db_GrpB +ffffffff834f8280 D db_GrpC +ffffffff834f82c0 D db_inst_0f0x +ffffffff834f8440 D db_inst_0f2x +ffffffff834f85c0 D db_inst_0f3x +ffffffff834f8740 D db_inst_0f8x +ffffffff834f88c0 D db_inst_0f9x +ffffffff834f8a40 D db_inst_0fax +ffffffff834f8bc0 D db_inst_0fbx +ffffffff834f8d40 D db_inst_0fcx +ffffffff834f8ec0 D db_inst_0f +ffffffff834f8f40 D db_Esc92 +ffffffff834f8f80 D db_Esc94 +ffffffff834f8fc0 D db_Esc95 +ffffffff834f9000 D db_Esc96 +ffffffff834f9040 D db_Esc97 +ffffffff834f9080 D db_Esca5 +ffffffff834f90c0 D db_Escb4 +ffffffff834f9100 D db_Esce3 +ffffffff834f9140 D db_Escf4 +ffffffff834f9180 D db_Esc8 +ffffffff834f9240 D db_Esc9 +ffffffff834f9300 D db_Esca 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spleen32x64_data +ffffffff83514000 D nsphy_cd +ffffffff83515000 D nsphyter_cd +ffffffff83516000 D gentbi_cd +ffffffff83517000 D qsphy_cd +ffffffff83518000 D inphy_cd +ffffffff83519000 D iophy_cd +ffffffff8351a000 D eephy_cd +ffffffff8351b000 D exphy_cd +ffffffff8351c000 D rlphy_cd +ffffffff8351d000 D lxtphy_cd +ffffffff8351e000 D luphy_cd +ffffffff8351f000 D mtdphy_cd +ffffffff83520000 D icsphy_cd +ffffffff83521000 D sqphy_cd +ffffffff83522000 D tqphy_cd +ffffffff83523000 D ukphy_cd +ffffffff83524000 D dcphy_cd +ffffffff83525000 D bmtphy_cd +ffffffff83526000 D brgphy_cd +ffffffff83527000 D xmphy_cd +ffffffff83528000 D amphy_cd +ffffffff83529000 D acphy_cd +ffffffff8352a000 D nsgphy_cd +ffffffff8352b000 D urlphy_cd +ffffffff8352c000 D rgephy_cd +ffffffff8352d000 D ciphy_cd +ffffffff8352e000 D ipgphy_cd +ffffffff8352f000 D etphy_cd +ffffffff83530000 D jmphy_cd +ffffffff83531000 D atphy_cd +ffffffff83532000 D scsi_autoconf +ffffffff83532008 D scsibus_cd +ffffffff83533000 D cd_cd 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cbb_cd +ffffffff83583020 D yc_chipsets +ffffffff835831b0 d pccbb_funcs +ffffffff835831e0 d pccbb_pcmcia_funcs +ffffffff83584000 D skc_cd +ffffffff83584020 D sk_cd +ffffffff83585000 D mskc_cd +ffffffff83585020 D msk_cd +ffffffff83586000 D puc_cd +ffffffff83587000 D puc_ndevs +ffffffff83588000 D iwi_cd +ffffffff83589000 D wpi_cd +ffffffff8358a000 D iwn_cd +ffffffff8358b000 D iwm_cd +ffffffff8358c000 D iwx_cd +ffffffff8358d000 d .compoundliteral +ffffffff8358d040 d .compoundliteral.4 +ffffffff8358d080 d .compoundliteral.5 +ffffffff8358d0b0 d .compoundliteral.6 +ffffffff8358d0f0 d .compoundliteral.7 +ffffffff8358d130 d .compoundliteral.8 +ffffffff8358e000 D cmpci_cd +ffffffff8358f000 D iha_cd +ffffffff83590000 D pcscp_cd +ffffffff83590020 D pcscp_glue +ffffffff83591000 D bge_cd +ffffffff83592000 D bnx_firmwares +ffffffff83592160 D bnx_rv2ps +ffffffff835921c0 D bnx_cd +ffffffff835921e0 d flash_5709 +ffffffff83592210 d flash_table +ffffffff83593000 D vge_cd +ffffffff83594000 D stge_cd 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bwfm_pci_buscore_ops +ffffffff835af030 D bwfm_pci_bus_ops +ffffffff835af058 D bwfm_pci_msgbuf_ops +ffffffff835b0000 D bnxt_cd +ffffffff835b1000 D mcx_cd +ffffffff835b2000 D iavf_cd +ffffffff835b3000 D rge_cd +ffffffff835b4000 D igc_cd +ffffffff835b5000 D ngbe_cd +ffffffff835b6000 D agp_cd +ffffffff835b7000 D intagp_cd +ffffffff835b7020 D agp_i810_methods +ffffffff835b8000 D reservation_ww_class +ffffffff835b9000 d bridge_lock +ffffffff835b9010 d bridge_list +ffffffff835ba000 d drm_connector_enum_list +ffffffff835ba1f8 d connector_list_lock +ffffffff835ba208 d connector_list +ffffffff835bb000 d kernel_fb_helper_list +ffffffff835bb010 d kernel_fb_helper_lock +ffffffff835bc000 D drm_global_mutex +ffffffff835bd000 D i2c_bit_algo +ffffffff835bd010 d drm_fence_context_count +ffffffff835bd018 d dma_fence_stub_mtx +ffffffff835bd028 D wait_bit_mtx +ffffffff835bd038 D shrinkers +ffffffff835be000 d crtc_ww_class +ffffffff835bf000 d panel_lock +ffffffff835bf010 d panel_list +ffffffff835c0000 d ttm_global_mutex +ffffffff835c1000 D drm_sched_policy +ffffffff835c2000 D intel_bbops +ffffffff835c3000 d i915_sys_placement +ffffffff835c3020 d i915_ttm_bo_driver +ffffffff835c4000 d mchdev_lock +ffffffff835c5000 D inteldrm_stdscreen +ffffffff835c5030 D inteldrm_scrlist +ffffffff835c5038 D inteldrm_screenlist +ffffffff835c5048 D inteldrm_accessops +ffffffff835c50a8 D inteldrm_cd +ffffffff835c6000 d capture_mutex +ffffffff835c7000 d mitigations +ffffffff835c8000 D i915_modparams +ffffffff835c9000 d schedule_lock +ffffffff835ca000 d unbind_fence_ops +ffffffff835cb000 D intel_graphics_stolen_res +ffffffff835cc000 D btc_valid_sclk +ffffffff835cd000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff835cd020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff835ce000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff835ce008 d r600_cs_packet_parse_vline.vline_status +ffffffff835cf000 d r100_asic +ffffffff835cf2e0 d r200_asic +ffffffff835cf5c0 d r300_asic_pcie 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+ffffffff835d4004 D radeon_dynclks +ffffffff835d4008 D radeon_agpmode +ffffffff835d400c D radeon_gart_size +ffffffff835d4010 D radeon_tv +ffffffff835d4014 D radeon_audio +ffffffff835d4018 D radeon_pcie_gen2 +ffffffff835d401c D radeon_msi +ffffffff835d4020 D radeon_lockup_timeout +ffffffff835d4024 D radeon_dpm +ffffffff835d4028 D radeon_aspm +ffffffff835d402c D radeon_runtime_pm +ffffffff835d4030 D radeon_vm_size +ffffffff835d4034 D radeon_vm_block_size +ffffffff835d4038 D radeon_use_pflipirq +ffffffff835d403c D radeon_bapm +ffffffff835d4040 D radeon_backlight +ffffffff835d4044 D radeon_auxch +ffffffff835d4048 D radeon_uvd +ffffffff835d404c D radeon_vce +ffffffff835d4050 D radeon_si_support +ffffffff835d4054 D radeon_cik_support +ffffffff835d4058 D radeondrm_cd +ffffffff835d4078 D radeondrm_stdscreen +ffffffff835d40a8 D radeondrm_scrlist +ffffffff835d40b0 D radeondrm_screenlist +ffffffff835d40c0 D radeondrm_accessops +ffffffff835d5000 D radeon_bbops +ffffffff835d6000 d radeon_bo_driver +ffffffff835d7000 d verde_pg_init +ffffffff835d8000 d cac_weights_pitcairn +ffffffff835d84d0 d cac_weights_oland +ffffffff835d9000 d aldebaran_mode2_handler +ffffffff835da000 d amdgpu_vbios_version_attrs +ffffffff835db000 D amdgpu_asic_name +ffffffff835dc000 D amdgpu_vram_limit +ffffffff835dc004 D amdgpu_gart_size +ffffffff835dc008 D amdgpu_gtt_size +ffffffff835dc00c D amdgpu_moverate +ffffffff835dc010 D amdgpu_audio +ffffffff835dc014 D amdgpu_pcie_gen2 +ffffffff835dc018 D amdgpu_msi +ffffffff835dc01c D amdgpu_dpm +ffffffff835dc020 D amdgpu_fw_load_type +ffffffff835dc024 D amdgpu_aspm +ffffffff835dc028 D amdgpu_runtime_pm +ffffffff835dc02c D amdgpu_ip_block_mask +ffffffff835dc030 D amdgpu_bapm +ffffffff835dc034 D amdgpu_vm_size +ffffffff835dc038 D amdgpu_vm_fragment_size +ffffffff835dc03c D amdgpu_vm_block_size +ffffffff835dc040 D amdgpu_vm_update_mode +ffffffff835dc044 D amdgpu_dc +ffffffff835dc048 D amdgpu_sched_jobs +ffffffff835dc04c D amdgpu_sched_hw_submission +ffffffff835dc050 D amdgpu_cg_mask +ffffffff835dc058 D amdgpu_pg_mask +ffffffff835dc05c D amdgpu_sdma_phase_quantum +ffffffff835dc060 D amdgpu_pp_feature_mask +ffffffff835dc064 D amdgpu_lbpw +ffffffff835dc068 D amdgpu_compute_multipipe +ffffffff835dc06c D amdgpu_gpu_recovery +ffffffff835dc070 D amdgpu_smu_pptable_id +ffffffff835dc074 D amdgpu_dc_feature_mask +ffffffff835dc078 D amdgpu_async_gfx_ring +ffffffff835dc07c D amdgpu_mcbp +ffffffff835dc080 D amdgpu_discovery +ffffffff835dc084 D amdgpu_noretry +ffffffff835dc088 D amdgpu_force_asic_type +ffffffff835dc08c D amdgpu_tmz +ffffffff835dc090 D amdgpu_reset_method +ffffffff835dc094 D amdgpu_num_kcq +ffffffff835dc098 D amdgpu_use_xgmi_p2p +ffffffff835dc09c D amdgpu_sg_display +ffffffff835dc0a0 D amdgpu_user_partt_mode +ffffffff835dc0a8 D mgpu_info +ffffffff835dc558 D amdgpu_ras_enable +ffffffff835dc55c D amdgpu_ras_mask +ffffffff835dc560 D amdgpu_bad_page_threshold +ffffffff835dc564 D amdgpu_backlight +ffffffff835dc568 D amdgpu_cd +ffffffff835dc588 D amdgpu_stdscreen +ffffffff835dc5b8 D amdgpu_scrlist +ffffffff835dc5c0 D amdgpu_screenlist +ffffffff835dc5d0 D amdgpu_accessops +ffffffff835dd000 d amdgpu_gtt_mgr_attributes +ffffffff835de000 D amdgpu_bbops +ffffffff835df000 D soc15_ih_clientid_name +ffffffff835e0000 D ras_error_string +ffffffff835e0030 D ras_block_string +ffffffff835e00c0 D ras_mca_block_string +ffffffff835e1000 d amdgpu_bo_driver +ffffffff835e2000 d amdgpu_vram_mgr_attributes +ffffffff835e3000 d xgmi_mutex +ffffffff835e3010 D xgmi_ras_hw_ops +ffffffff835e3050 D xgmi_ras +ffffffff835e4000 D aqua_vanjaram_xcp_funcs +ffffffff835e5000 D gfx_v11_0_3_ras +ffffffff835e6000 d gfx_v9_0_ras +ffffffff835e7000 D gfx_v9_4_ras +ffffffff835e8000 D gfx_v9_4_2_ras_ops +ffffffff835e8040 D gfx_v9_4_2_ras +ffffffff835e9000 D gfx_v9_4_3_xcp_funcs +ffffffff835e9020 D gfx_v9_4_3_ras_ops +ffffffff835e9060 D gfx_v9_4_3_ras +ffffffff835ea000 D gfxhub_v1_2_xcp_funcs +ffffffff835eb000 D hdp_v4_0_ras_hw_ops +ffffffff835eb040 D hdp_v4_0_ras +ffffffff835ec000 d jpeg_v2_6_ras +ffffffff835ed000 d jpeg_v4_0_ras +ffffffff835ee000 d jpeg_v4_0_3_ras +ffffffff835ef000 D mca_v3_0_mp0_ras +ffffffff835ef058 D mca_v3_0_mp1_ras +ffffffff835ef0b0 D mca_v3_0_mpio_ras +ffffffff835f0000 D mmhub_v1_0_ras_hw_ops +ffffffff835f0040 D mmhub_v1_0_ras +ffffffff835f1000 D mmhub_v1_7_ras_hw_ops +ffffffff835f1040 D mmhub_v1_7_ras +ffffffff835f2000 D mmhub_v1_8_ras +ffffffff835f3000 D mmhub_v9_4_ras +ffffffff835f4000 D nbio_v4_3_ras +ffffffff835f5000 D nbio_v7_4_ras +ffffffff835f6000 D nbio_v7_9_ras +ffffffff835f7000 d sriov_sc_video_codecs_encode +ffffffff835f7010 d sriov_sc_video_codecs_decode_vcn1 +ffffffff835f7020 d sriov_sc_video_codecs_decode_vcn0 +ffffffff835f7030 d sriov_sc_video_codecs_encode_array +ffffffff835f7060 d sriov_sc_video_codecs_decode_array_vcn1 +ffffffff835f70f0 d sriov_sc_video_codecs_decode_array_vcn0 +ffffffff835f8000 d sdma_v4_0_ras +ffffffff835f9000 D sdma_v4_4_ras +ffffffff835fa000 D sdma_v4_4_2_xcp_funcs +ffffffff835fa020 d sdma_v4_4_2_ras +ffffffff835fb000 d sdma_v6_0_3_ras +ffffffff835fc000 d sienna_cichlid_mode2_handler +ffffffff835fd000 d smu_v13_0_10_mode2_handler +ffffffff835fe000 d sriov_vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff835fe010 d sriov_vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff835fe020 d sriov_vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff835fe030 d sriov_vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff835fe040 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff835fe070 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff835fe100 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff835fe140 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff835ff000 D umc_v6_1_ras +ffffffff83600000 D umc_v6_7_ras +ffffffff83601000 D umc_v8_10_ras +ffffffff83602000 D umc_v8_7_ras +ffffffff83603000 d vcn_v2_6_ras +ffffffff83604000 d vcn_v4_0_unified_ring_vm_funcs +ffffffff83604140 d vcn_v4_0_ras +ffffffff83605000 d vcn_v4_0_3_ras +ffffffff83606000 d amdgpu_dm_mode_config_helperfuncs +ffffffff83606010 d dm_atomic_state_funcs +ffffffff83607000 d construct_integrated_info.result +ffffffff83607004 d bios_parser_get_firmware_info.result +ffffffff83608000 d dce_funcs +ffffffff83609000 d dce110_funcs +ffffffff8360a000 d dce112_funcs +ffffffff8360b000 d dce120_funcs +ffffffff8360c000 d rv1_clk_funcs +ffffffff8360c090 d rv1_clk_internal_funcs +ffffffff8360d000 d rv2_clk_internal_funcs +ffffffff8360e000 d dcn2_funcs +ffffffff8360f000 d dcn201_funcs +ffffffff83610000 d dcn21_funcs +ffffffff83610090 d rn_bw_params +ffffffff83611000 D dcn3_fpga_funcs +ffffffff83611090 d dcn3_funcs +ffffffff83612000 d vg_funcs +ffffffff83612090 d dummy_clocks +ffffffff836121c0 d vg_bw_params +ffffffff83613000 d dcn31_funcs +ffffffff83613090 d dcn31_bw_params +ffffffff83614000 d dcn314_funcs +ffffffff83614090 d dcn314_bw_params +ffffffff83615000 d dcn315_funcs +ffffffff83615090 d dcn315_bw_params +ffffffff83616000 d dcn316_funcs +ffffffff83616090 d dcn316_bw_params +ffffffff83617000 d dcn32_funcs +ffffffff83618000 d dcn10_dpp_cap +ffffffff83619000 d dcn20_dpp_funcs +ffffffff83619110 d dcn20_dpp_cap +ffffffff8361a000 d dcn20_hubp_funcs +ffffffff8361b000 d dcn20_opp_funcs +ffffffff8361c000 d dcn20_tg_funcs +ffffffff8361d000 d dcn201_dpp_funcs +ffffffff8361d110 d dcn201_dpp_cap +ffffffff8361e000 d dcn201_hubp_funcs +ffffffff8361f000 d dcn201_opp_funcs +ffffffff83620000 d dcn201_tg_funcs +ffffffff83621000 d dcn201_res_pool_funcs +ffffffff836210f8 d dcn201_ip +ffffffff836212b0 d dcn201_soc +ffffffff83623000 d dcn21_hubp_funcs +ffffffff83624000 d dcn30_afmt_funcs +ffffffff83625000 d dcn30_dpp_funcs +ffffffff83625110 d dcn30_dpp_cap +ffffffff83626000 d dcn30_hubp_funcs +ffffffff83627000 d dcn30_tg_funcs +ffffffff83628000 d dcn30_vpg_funcs +ffffffff83629000 d dcn30_tg_funcs +ffffffff8362a000 d res_cap_dcn301 +ffffffff8362a040 d dcn301_res_pool_funcs +ffffffff8362b000 d dcn302_res_pool_funcs +ffffffff8362c000 d dcn303_res_pool_funcs +ffffffff8362d000 d dcn31_afmt_funcs +ffffffff8362e000 d dcn31_apg_funcs +ffffffff8362f000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff83630000 d dcn31_hubp_funcs +ffffffff83631000 d dcn31_tg_funcs +ffffffff83632000 d dcn31_res_pool_funcs +ffffffff83633000 d dcn31_vpg_funcs +ffffffff83634000 d dcn314_tg_funcs +ffffffff83635000 d dcn314_res_pool_funcs +ffffffff83636000 d dcn315_res_pool_funcs +ffffffff83637000 d dcn316_res_pool_funcs +ffffffff83638000 d dcn32_dpp_funcs +ffffffff83638110 d dcn32_dpp_cap +ffffffff83639000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff8363a000 d dcn32_hubp_funcs +ffffffff8363b000 d dcn32_tg_funcs +ffffffff8363c000 d dcn32_res_pool_funcs +ffffffff8363d000 d dcn321_res_pool_funcs +ffffffff8363e000 D dcn1_0_ip +ffffffff8363e1b8 D dcn1_0_soc +ffffffff83640000 D dcn2_0_ip +ffffffff836401b8 D dcn2_0_nv14_ip +ffffffff83640370 D dcn2_0_soc +ffffffff836416a8 D dcn2_0_nv14_soc +ffffffff836429e0 D dcn2_0_nv12_soc +ffffffff83643d18 D dcn2_1_ip +ffffffff83643ed0 D dcn2_1_soc +ffffffff83645208 D ddr4_wm_table_gs +ffffffff836452c8 D lpddr4_wm_table_gs +ffffffff83645388 D lpddr4_wm_table_with_disabled_ppt +ffffffff83645448 D ddr4_wm_table_rn +ffffffff83645508 D ddr4_1R_wm_table_rn +ffffffff836455c8 D lpddr4_wm_table_rn +ffffffff83646000 D dcn3_0_ip +ffffffff836461b8 D dcn3_0_soc +ffffffff83648000 D dcn3_01_ip +ffffffff836481b8 D dcn3_01_soc +ffffffff836494f0 D ddr4_wm_table +ffffffff836495b0 D lpddr5_wm_table +ffffffff8364a000 D dcn3_02_ip +ffffffff8364a1b8 D dcn3_02_soc +ffffffff8364c000 D dcn3_03_ip +ffffffff8364c1b8 D dcn3_03_soc +ffffffff8364e000 D dcn3_1_ip +ffffffff8364e1b8 D dcn3_15_ip +ffffffff8364e370 D dcn3_16_ip +ffffffff8364e528 d dcn3_15_soc +ffffffff8364f860 d dcn3_1_soc +ffffffff83650b98 d dcn3_16_soc +ffffffff83652000 D dcn3_14_ip +ffffffff836521b8 d dcn3_14_soc +ffffffff83654000 D dcn3_2_ip +ffffffff836541b8 D dcn3_2_soc +ffffffff83656000 D dcn3_21_ip +ffffffff836561b8 D dcn3_21_soc +ffffffff83658000 d dsc_policy_max_target_bpp_limit +ffffffff83659000 D DIDTEDCConfig_P12 +ffffffff83659070 d smu7_profiling +ffffffff8365a000 d cyan_skillfish_table_map +ffffffff8365a080 d cyan_skillfish_message_map +ffffffff8365b000 d navi10_table_map +ffffffff8365b080 d navi10_pwr_src_map +ffffffff8365b090 d navi10_workload_map +ffffffff8365b0e0 d navi10_message_map +ffffffff8365bb60 d navi10_clk_map +ffffffff8365bc20 d navi10_feature_mask_map +ffffffff8365c000 d sienna_cichlid_table_map +ffffffff8365c080 d sienna_cichlid_pwr_src_map +ffffffff8365c090 d sienna_cichlid_workload_map +ffffffff8365c0e0 d sienna_cichlid_message_map +ffffffff8365cb60 d sienna_cichlid_clk_map +ffffffff8365cc20 d sienna_cichlid_feature_mask_map +ffffffff8365d000 d vangogh_message_map +ffffffff8365da80 d vangogh_table_map +ffffffff8365db00 d vangogh_workload_map +ffffffff8365db50 d vangogh_feature_mask_map +ffffffff8365e000 d renoir_table_map +ffffffff8365e080 d renoir_workload_map +ffffffff8365e0d0 d renoir_message_map +ffffffff8365eb50 d renoir_clk_map +ffffffff8365f000 d smu_v13_0_0_message_map +ffffffff8365fa80 d smu_v13_0_0_feature_mask_map +ffffffff8365fe50 d smu_v13_0_0_table_map +ffffffff8365fed0 d smu_v13_0_0_pwr_src_map +ffffffff8365fee0 d smu_v13_0_0_workload_map +ffffffff8365ff30 d smu_v13_0_0_clk_map +ffffffff83660000 d smu_v13_0_4_table_map +ffffffff83660080 d smu_v13_0_4_message_map +ffffffff83660b00 d smu_v13_0_4_feature_mask_map +ffffffff83661000 d smu_v13_0_5_table_map +ffffffff83661080 d smu_v13_0_5_message_map +ffffffff83661b00 d smu_v13_0_5_feature_mask_map +ffffffff83662000 d smu_v13_0_7_message_map +ffffffff83662a80 d smu_v13_0_7_feature_mask_map +ffffffff83662e50 d smu_v13_0_7_table_map +ffffffff83662ed0 d smu_v13_0_7_pwr_src_map +ffffffff83662ee0 d smu_v13_0_7_workload_map +ffffffff83662f30 d smu_v13_0_7_clk_map +ffffffff83663000 d yellow_carp_table_map +ffffffff83663080 d yellow_carp_message_map +ffffffff83663b00 d yellow_carp_feature_mask_map +ffffffff83664000 D pci_conf_lock +ffffffff83664010 D pci_bus_dma_tag +ffffffff83664088 D msi_pic +ffffffff83664120 D msix_pic +ffffffff83665000 D pchb_cd +ffffffff83666000 D amas_cd +ffffffff83667000 D cardslot_cd +ffffffff83668000 D cardbus_cd +ffffffff83669000 d csdevs +ffffffff8366a000 d ral_rt2560_opns +ffffffff8366a028 d ral_rt2661_opns +ffffffff8366a050 d ral_rt2860_opns +ffffffff8366b000 D pcmcia_cd +ffffffff8366c000 D pcmcia_3cxem556_func0 +ffffffff8366c0b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff8366c158 D pcmcia_megahertz_xjem1144_func0 +ffffffff8366c210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff8366c2b0 d pcmcia_3cxem556_func1 +ffffffff8366c368 d pcmcia_3cxem556_func1_cfe0 +ffffffff8366c408 d pcmcia_megahertz_xjem1144_func1 +ffffffff8366c4c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff8366c560 d pcmcia_sierra_a555_func1 +ffffffff8366c618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff8366c6b8 d pcmcia_sveclancard_func0 +ffffffff8366c770 d pcmcia_sveclancard_func0_cfe0 +ffffffff8366d000 D ep_pcmcia_prod +ffffffff8366e000 D aic_pcmcia_prod +ffffffff8366f000 D com_pcmcia_prod +ffffffff83670000 D wdc_pcmcia_pr +ffffffff83671000 D sm_pcmcia_prod +ffffffff83672000 D xe_cd +ffffffff83673000 D pcib_cd +ffffffff83674000 D amdpcib_cd +ffffffff83675000 D tcpcib_cd +ffffffff83676000 D aapic_cd +ffffffff83677000 D hme_cd +ffffffff83678000 D isa_cd +ffffffff83679000 D isadma_cd +ffffffff8367a000 D fdc_cd +ffffffff8367b000 D fd_types +ffffffff8367b1f8 D fd_cd +ffffffff8367c000 D mpu_cd +ffffffff8367d000 D pcppi_cd +ffffffff8367e000 D spkr_cd +ffffffff8367f000 D wbsio_cd +ffffffff83680000 D schsio_cd +ffffffff83681000 D it_cd +ffffffff83682000 D uguru_cd +ffffffff83683000 D aps_cd +ffffffff83684000 D isa_bus_dma_tag +ffffffff83685000 D wsdisplay_cd +ffffffff83685020 D wsdisplay_cons +ffffffff83685058 D wsdisplay_defaultscreens +ffffffff83686000 D wskbd_cd +ffffffff83686020 D wskbd_default_bell_data +ffffffff83686030 D wskbd_default_keyrepeat_data +ffffffff83686040 D wskbd_srcops +ffffffff83687000 d compose_tab +ffffffff83688000 D wsmouse_cd +ffffffff83688020 D wsmouse_srcops +ffffffff83689000 D wsmux_srcops +ffffffff83689030 D wsmux_tree_lock +ffffffff8368a000 D vt100_output +ffffffff8368b000 D pckbd_cd +ffffffff8368c000 D pms_cd +ffffffff8368c020 d synaptics_params +ffffffff8368c030 d alps_params +ffffffff8368d000 D skgpio_cd +ffffffff8368e000 D pctr_conf_lock +ffffffff8368f000 D ukbd_keymapdata +ffffffff83690000 D usbrev_str +ffffffff83690030 D usb_cd +ffffffff83691000 d usbd_ratecheck.errinterval +ffffffff83692000 D uhub_cd +ffffffff83693000 D uaudio_cd +ffffffff83694000 D uvideo_ctrls +ffffffff836942d8 D uvideo_cd +ffffffff83695000 D utvfu_norm_params +ffffffff83695030 D utvfu_cd +ffffffff83696000 D udl_reg_vals_640x480_60 +ffffffff83696020 D udl_reg_vals_640x480_67 +ffffffff83696040 D udl_reg_vals_640x480_72 +ffffffff83696060 D udl_reg_vals_640x480_75 +ffffffff83696080 D udl_reg_vals_800x480_61 +ffffffff836960a0 D udl_reg_vals_800x600_56 +ffffffff836960c0 D udl_reg_vals_800x600_60 +ffffffff836960e0 D udl_reg_vals_800x600_72 +ffffffff83696100 D udl_reg_vals_800x600_74 +ffffffff83696120 D udl_reg_vals_800x600_75 +ffffffff83696140 D udl_reg_vals_1024x768_60 +ffffffff83696160 D udl_reg_vals_1024x768_70 +ffffffff83696180 D udl_reg_vals_1024x768_75 +ffffffff836961a0 D udl_reg_vals_1280x800_60 +ffffffff836961c0 D udl_reg_vals_1280x960_60 +ffffffff836961e0 D udl_reg_vals_1280x1024_60 +ffffffff83696200 D udl_reg_vals_1280x1024_75 +ffffffff83696220 D udl_reg_vals_1366x768_60 +ffffffff83696240 D udl_reg_vals_1440x900_60 +ffffffff83696260 D udl_reg_vals_1440x900_59 +ffffffff83696280 D udl_reg_vals_1440x900_75 +ffffffff836962a0 D udl_reg_vals_1680x1050_60 +ffffffff836962c0 D udl_reg_vals_1600x1200_60 +ffffffff836962e0 D udl_reg_vals_1920x1080_60 +ffffffff83696300 D udl_null_key_1 +ffffffff83696310 D udl_decomp_table +ffffffff83697510 D udl_cd +ffffffff83697530 D udl_stdscreen +ffffffff83697560 D udl_scrlist +ffffffff83697568 D udl_screenlist +ffffffff83697578 D udl_accessops +ffffffff83698000 D umidi_cd +ffffffff83699000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff83699020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff83699040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff83699060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff83699080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff836990a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff836990c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff836990e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff83699100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff83699120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff83699140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff83699160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff83699180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff836991a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff836991c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff836991e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff83699200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff83699220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff83699240 D umidi_quirklist +ffffffff836994a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff836994c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff836994d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff836994f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff83699500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff83699520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff83699530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff83699550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff83699560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff83699580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff83699590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff836995b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff836995c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff836995e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff836995f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff83699610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff83699620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff83699640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff83699650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff83699670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff83699680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff836996a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff836996b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff836996d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff836996e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff83699700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff83699710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff83699730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff83699740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff83699760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff83699770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff83699790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff836997a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc 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glkgpio_hids +ffffffff8372b000 D pchgpio_cd +ffffffff8372b020 D pchgpio_hids +ffffffff8372b080 D pchgpio_devices +ffffffff8372c000 D tipmic_cd +ffffffff8372c020 D tipmic_thermal_regmap +ffffffff8372c030 D tipmic_power_regmap +ffffffff8372d000 D ccpmic_cd +ffffffff8372d020 D ccpmic_thermal_regmap +ffffffff8372d023 D ccpmic_power_regmap +ffffffff8372e000 D com_hids +ffffffff8372f000 D sdhc_hids +ffffffff83730000 D dwiic_hids +ffffffff83730050 D ihidev_hids +ffffffff83730070 D ietp_hids +ffffffff83730220 D iatp_hids +ffffffff83730240 d dwiic_acpi_found_ihidev.i2c_hid_guid +ffffffff83731000 D acpicbkbd_cd +ffffffff83731020 D acpicbkbd_hids +ffffffff83732000 D acpials_cd +ffffffff83732020 D acpials_hids +ffffffff83733000 D tpm_cd +ffffffff83733020 D tpm_hids +ffffffff83734000 D acpihve_cd +ffffffff83735000 D acpisbs_cd +ffffffff83735020 D acpisbs_hids +ffffffff83736000 D acpisurface_cd +ffffffff83736020 D acpisurface_hids +ffffffff83737000 D ipmi_acpi_hids +ffffffff83738000 D amdgpio_cd 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B pcimem_ex +ffffffff83a79870 B pcibus_ex +ffffffff83a7a000 b ddb_vgapostp +ffffffff83a7b000 B cardsloteventpool +ffffffff83a7c000 B rbus_null +ffffffff83a7d000 B pcmcia_verbose +ffffffff83a7e000 B isa_mem_head +ffffffff83a7e008 B isa_dev +ffffffff83a7e010 B isadma_dmam +ffffffff83a7f000 b spkr_attached +ffffffff83a7f008 b ppicookie +ffffffff83a7f010 b spkr_active +ffffffff83a7f018 b spkr_inbuf +ffffffff83a7f020 b octave +ffffffff83a7f024 b whole +ffffffff83a7f028 b fill +ffffffff83a7f02c b value +ffffffff83a7f030 b octtrack +ffffffff83a7f034 b octprefix +ffffffff83a80000 B it_softc_list +ffffffff83a81000 B aps_timeout +ffffffff83a82000 B intrtype +ffffffff83a82040 B intrhand +ffffffff83a820c0 B isa_dma_stats_loads +ffffffff83a820c8 B isa_dma_stats_bounces +ffffffff83a820d0 B isa_dma_stats_nbouncebufs +ffffffff83a820e0 B intrlevel +ffffffff83a83000 B wsdisplay_console_conf +ffffffff83a83028 B wsdisplay_console_initted +ffffffff83a83030 B wsdisplay_console_device +ffffffff83a83038 B wsdisplay_clearonclose +ffffffff83a8303c B wsdisplay_cons_pollmode +ffffffff83a83040 B wsdisplay_cons_kbd_pollc +ffffffff83a83048 B ws_get_param +ffffffff83a83050 B ws_set_param +ffffffff83a84000 b wskbd_console_data +ffffffff83a84040 b wskbd_console_initted +ffffffff83a84048 b wskbd_console_device +ffffffff83a84050 B wskbd_get_backlight +ffffffff83a84058 B wskbd_set_backlight +ffffffff83a84060 b wskbd_cngetc.num +ffffffff83a84064 b wskbd_cngetc.pos +ffffffff83a85000 b compose_tab_inorder +ffffffff83a86000 B nwsmux +ffffffff83a86008 B wsmuxdevs +ffffffff83a87000 B wsemul_vt100_console_emuldata +ffffffff83a88000 B pckbd_consdata +ffffffff83a88038 B pckbd_bell_fn +ffffffff83a88040 B pckbd_bell_fn_arg +ffffffff83a89000 b wscninit.initted +ffffffff83a8a000 B pctr_isamd +ffffffff83a8a004 B pctr_isintel +ffffffff83a8a008 B pctr_intel_cap +ffffffff83a8a010 B pctr_fn +ffffffff83a8b000 b nvram_initialized +ffffffff83a8c000 B hidkbd_is_console +ffffffff83a8c008 B hidkbd_bell_fn +ffffffff83a8c010 B hidkbd_bell_fn_arg +ffffffff83a8d000 B usb_task_thread_proc +ffffffff83a8d008 B usb_abort_task_thread_proc +ffffffff83a8d010 b usb_nbuses +ffffffff83a8d018 B usbpalock +ffffffff83a8d028 B usb_abort_tasks +ffffffff83a8d038 B usb_explore_tasks +ffffffff83a8d048 B usb_generic_tasks +ffffffff83a8d058 b usb_run_abort_tasks +ffffffff83a8d05c b usb_run_tasks +ffffffff83a8d060 B explore_pending +ffffffff83a8e000 B usb_blk_freelist +ffffffff83a8e008 B usb_blk_nfree +ffffffff83a8e010 B usb_frag_freelist +ffffffff83a8f000 b usbd_errstr.buffer +ffffffff83a8f008 b usb_delay_ms.usb_delay_wchan +ffffffff83a8f010 b usbd_probe_and_attach.cookie +ffffffff83a90000 b ucom_change +ffffffff83a90008 b sysctl_ucominit.ucoms +ffffffff83a90010 b sysctl_ucominit.ucomslen +ffffffff83a91000 b t_wait +ffffffff83a91004 b t_trust +ffffffff83a92000 B umb_session_id +ffffffff83a92010 b umb_val2descr.sval +ffffffff83a93000 b probe_ic +ffffffff83a93008 b probe_addr +ffffffff83a93010 b probe_val +ffffffff83a93110 B skip_fc +ffffffff83a93118 B ignore_addrs +ffffffff83a93120 b iic_dump.iicvalcnt +ffffffff83a94000 B acpi_softc +ffffffff83a94008 B acpiwqpool +ffffffff83a941b0 B acpi_enabled +ffffffff83a941b4 b acpi_maptable.tblid +ffffffff83a941b8 b acpi_add_device.nacpicpus +ffffffff83a941bc B acpi_force_bm +ffffffff83a941c0 B mouse_has_softbtn +ffffffff83a941c4 B acpi_evindex +ffffffff83a941c8 B acpi_poll_enabled +ffffffff83a941cc B acpi_hasprocfvs +ffffffff83a941d0 B acpi_haspci +ffffffff83a95000 B aml_root +ffffffff83a95060 B aml_lastscope +ffffffff83a95068 B aml_ophash +ffffffff83a95070 b aml_mnem.mnemstr +ffffffff83a95090 B aml_notify_list +ffffffff83a95098 B acpi_nalloc +ffffffff83a950a0 b acpi_sleep.acpinowait +ffffffff83a950b0 b aml_nodename.namebuf +ffffffff83a95130 b aml_getname.namebuf +ffffffff83a951b0 b aml_getname.p +ffffffff83a951b8 b global_lock_count +ffffffff83a951c0 b aml_eisaid.id +ffffffff83a951c8 B aml_global_lock +ffffffff83a951d0 b aml_mapresource.map +ffffffff83a95210 b aml_val_to_string.buffer +ffffffff83a95310 B aml_error +ffffffff83a95314 B odp +ffffffff83a95318 B maxdp +ffffffff83a9531c B aml_busy +ffffffff83a96000 B scope +ffffffff83a97000 B acpibtn_lids +ffffffff83a98000 B cst_stats +ffffffff83a99000 B acpihpet_attached +ffffffff83a9a000 b acpiec_wait.acpiecnowait +ffffffff83a9b000 B acpitz_cpu_setperf +ffffffff83a9c000 B acpimadt_busses +ffffffff83a9f000 B acpimadt_isa_bus +ffffffff83a9f030 b lapic_map +ffffffff83aa0000 B acpidmar_ddb +ffffffff83aa0010 b dmar_bdf.bdf +ffffffff83aa0030 B acpidmar_sc +ffffffff83aa0038 B domain_map_page +ffffffff83aa0040 b dom_bdf.mmm +ffffffff83aa0070 b iommu_init.niommu +ffffffff83aa0078 b acpidmar_pci_attach.dom +ffffffff83aa0080 b sid_flag +ffffffff83ae0080 b ivhd_showpage.show +ffffffff83ae0084 b ivhd_iommu_init.niommu +ffffffff83ae0088 b acpidmar_intr.ofe.0 +ffffffff83ae0090 b acpidmar_intr.ofe.1 +ffffffff83ae1000 b dwiic_i2c_intr_string.irqstr +ffffffff83ae2000 B acpihve_attached +ffffffff83ae3000 B efi_get_variable +ffffffff83ae3008 B efi_get_next_variable_name +ffffffff83ae3010 B efi_set_variable +ffffffff83ae4000 B efi_jmpbuf +ffffffff83ae5000 B vm_pool +ffffffff83ae51a8 B vcpu_pool +ffffffff83ae5350 B vmm_softc +ffffffff83ae6000 B l1tf_flush_region +ffffffff83ae7000 B sdmmc_verbose +ffffffff83ae8000 B utc_offset +ffffffff83ae8008 B bufpages +ffffffff83ae8010 B utsname +ffffffff83ae9000 B mountroot +ffffffff83aea000 B __kernel_bss_end ffffffff83c00000 B _end ffffffff83c00000 B end