--- 7.5/2024-08-01T06:17:09Z/2024-07-26T00:00:00Z/nm-bsd-ot14.txt	Sun Aug  4 12:46:05 2024
+++ 7.5/2024-08-01T06:17:09Z/2024-07-27T00:00:00Z/nm-bsd-ot14.txt	Sun Aug  4 15:31:11 2024
@@ -6821,19 +6821,19 @@ ffffffff8135b020 T setitimer
 ffffffff8135b3c0 T process_reset_itimer_flag
 ffffffff8135b430 T cancel_all_itimers
 ffffffff8135b4d0 T sys_getitimer
-ffffffff8135b570 T sys_setitimer
-ffffffff8135b750 T itimerfix
-ffffffff8135b830 T realitexpire
-ffffffff8135b9f0 T itimerdecr
-ffffffff8135bae0 T itimer_update
-ffffffff8135be50 T ratecheck
-ffffffff8135bf30 T ppsratecheck
-ffffffff8135c050 T inittodr
-ffffffff8135c210 T todr_attach
-ffffffff8135c260 T periodic_resettodr
-ffffffff8135c280 T perform_resettodr
-ffffffff8135c320 T start_periodic_resettodr
-ffffffff8135c340 T stop_periodic_resettodr
+ffffffff8135b5b0 T sys_setitimer
+ffffffff8135b800 T itimerfix
+ffffffff8135b8e0 T realitexpire
+ffffffff8135baa0 T itimerdecr
+ffffffff8135bb90 T itimer_update
+ffffffff8135bf00 T ratecheck
+ffffffff8135bfe0 T ppsratecheck
+ffffffff8135c100 T inittodr
+ffffffff8135c2c0 T todr_attach
+ffffffff8135c310 T periodic_resettodr
+ffffffff8135c330 T perform_resettodr
+ffffffff8135c3d0 T start_periodic_resettodr
+ffffffff8135c3f0 T stop_periodic_resettodr
 ffffffff8135d000 T timeout_startup
 ffffffff8135d150 T timeout_proc_init
 ffffffff8135d1b0 T softclock
@@ -8990,16 +8990,16 @@ ffffffff814510c0 T pipex_sockaddr_compar_addr
 ffffffff81451150 T pipex_pptp_userland_output
 ffffffff814512d0 T pipex_l2tp_lookup_session
 ffffffff81451360 T pipex_l2tp_input
-ffffffff814517c0 T pipex_l2tp_userland_lookup_session_ipv4
-ffffffff81451820 T pipex_l2tp_userland_lookup_session
-ffffffff81451a30 T pipex_l2tp_userland_lookup_session_ipv6
-ffffffff81451ad0 T pipex_l2tp_userland_output
-ffffffff81451c40 T pipex_mppe_init
-ffffffff81451e50 T GetNewKeyFromSHA
-ffffffff81451f60 T pipex_mppe_reduce_key
-ffffffff81451fb0 T mppe_key_change
-ffffffff81452170 T pipex_ccp_output
-ffffffff81452250 T pipex_sysctl
+ffffffff81451820 T pipex_l2tp_userland_lookup_session_ipv4
+ffffffff81451880 T pipex_l2tp_userland_lookup_session
+ffffffff81451a90 T pipex_l2tp_userland_lookup_session_ipv6
+ffffffff81451b30 T pipex_l2tp_userland_output
+ffffffff81451ca0 T pipex_mppe_init
+ffffffff81451eb0 T GetNewKeyFromSHA
+ffffffff81451fc0 T pipex_mppe_reduce_key
+ffffffff81452010 T mppe_key_change
+ffffffff814521d0 T pipex_ccp_output
+ffffffff814522b0 T pipex_sysctl
 ffffffff81453000 T rn_search_m
 ffffffff81453070 T rn_refines
 ffffffff81453170 T rn_lookup
@@ -29384,92 +29384,92 @@ ffffffff81feaa60 t gfx_v9_4_3_late_init
 ffffffff81feaaf0 t gfx_v9_4_3_sw_init
 ffffffff81feafe0 t gfx_v9_4_3_sw_fini
 ffffffff81feb210 t gfx_v9_4_3_hw_init
-ffffffff81febdf0 t gfx_v9_4_3_hw_fini
-ffffffff81febed0 t gfx_v9_4_3_suspend
-ffffffff81febfb0 t gfx_v9_4_3_resume
-ffffffff81febfc0 t gfx_v9_4_3_is_idle
-ffffffff81fec1b0 t gfx_v9_4_3_wait_for_idle
-ffffffff81fec250 t gfx_v9_4_3_soft_reset
-ffffffff81feca90 t gfx_v9_4_3_set_clockgating_state
-ffffffff81fecc50 t gfx_v9_4_3_set_powergating_state
-ffffffff81fecc80 t gfx_v9_4_3_get_clockgating_state
-ffffffff81fece30 t gfx_v9_4_3_kiq_set_resources
-ffffffff81fed190 t gfx_v9_4_3_kiq_map_queues
-ffffffff81fed530 t gfx_v9_4_3_kiq_unmap_queues
-ffffffff81fed8f0 t gfx_v9_4_3_kiq_query_status
-ffffffff81fedc10 t gfx_v9_4_3_kiq_invalidate_tlbs
-ffffffff81fedd40 t gfx_v9_4_3_ring_get_rptr_compute
-ffffffff81fedd80 t gfx_v9_4_3_ring_get_wptr_compute
-ffffffff81feddf0 t gfx_v9_4_3_ring_set_wptr_compute
-ffffffff81fede50 t gfx_v9_4_3_ring_emit_fence_kiq
-ffffffff81fee2f0 t gfx_v9_4_3_ring_test_ring
-ffffffff81fee590 t gfx_v9_4_3_ring_emit_rreg
-ffffffff81fee850 t gfx_v9_4_3_ring_emit_wreg
-ffffffff81feeab0 t gfx_v9_4_3_ring_emit_reg_wait
-ffffffff81feeb10 t gfx_v9_4_3_ring_emit_reg_write_reg_wait
-ffffffff81feeb30 t gfx_v9_4_3_wait_reg_mem
-ffffffff81feee90 t gfx_v9_4_3_ring_emit_ib_compute
-ffffffff81fef1f0 t gfx_v9_4_3_ring_emit_fence
-ffffffff81fef5e0 t gfx_v9_4_3_ring_emit_pipeline_sync
-ffffffff81fef650 t gfx_v9_4_3_ring_emit_vm_flush
-ffffffff81fef670 t gfx_v9_4_3_ring_emit_hdp_flush
-ffffffff81fef760 t gfx_v9_4_3_ring_emit_gds_switch
-ffffffff81fef940 t gfx_v9_4_3_ring_test_ib
-ffffffff81fefb30 t gfx_v9_4_3_emit_mem_sync
-ffffffff81fefe20 t gfx_v9_4_3_emit_wave_limit
-ffffffff81ff0030 t gfx_v9_4_3_write_data_to_reg
-ffffffff81ff0260 t gfx_v9_4_3_set_eop_interrupt_state
-ffffffff81ff03e0 t gfx_v9_4_3_eop_irq
-ffffffff81ff0590 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state
-ffffffff81ff0710 t gfx_v9_4_3_ih_to_xcc_inst
-ffffffff81ff07f0 t gfx_v9_4_3_set_priv_reg_fault_state
-ffffffff81ff0c50 t gfx_v9_4_3_priv_reg_irq
-ffffffff81ff0cc0 t gfx_v9_4_3_fault
-ffffffff81ff0e40 t gfx_v9_4_3_set_priv_inst_fault_state
-ffffffff81ff12a0 t gfx_v9_4_3_priv_inst_irq
-ffffffff81ff1310 t gfx_v9_4_3_is_rlc_enabled
-ffffffff81ff1460 t gfx_v9_4_3_xcc_set_safe_mode
-ffffffff81ff1770 t gfx_v9_4_3_xcc_unset_safe_mode
-ffffffff81ff18b0 t gfx_v9_4_3_rlc_init
-ffffffff81ff1910 t gfx_v9_4_3_rlc_resume
-ffffffff81ff19d0 t gfx_v9_4_3_rlc_stop
-ffffffff81ff1a80 t gfx_v9_4_3_rlc_reset
-ffffffff81ff2200 t gfx_v9_4_3_rlc_start
-ffffffff81ff22b0 t gfx_v9_4_3_update_spm_vmid
-ffffffff81ff2510 t gfx_v9_4_3_is_rlcg_access_range
-ffffffff81ff25e0 t gfx_v9_4_3_xcc_rlc_resume
-ffffffff81ff2fa0 t gfx_v9_4_3_xcc_rlc_stop
-ffffffff81ff3800 t gfx_v9_4_3_xcc_rlc_start
-ffffffff81ff3c10 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt
-ffffffff81ff3e70 t gfx_v9_4_3_xcc_select_se_sh
-ffffffff81ff40a0 t gfx_v9_4_3_mec_init
-ffffffff81ff4410 t gfx_v9_4_3_gpu_early_init
-ffffffff81ff4660 t amdgpu_bo_unreserve
-ffffffff81ff4770 t gfx_v9_4_3_get_gpu_clock_counter
-ffffffff81ff4b40 t gfx_v9_4_3_read_wave_data
-ffffffff81ff4ea0 t gfx_v9_4_3_read_wave_vgprs
-ffffffff81ff4ec0 t gfx_v9_4_3_read_wave_sgprs
-ffffffff81ff4f20 t gfx_v9_4_3_select_me_pipe_q
-ffffffff81ff4fa0 t gfx_v9_4_3_switch_compute_partition
-ffffffff81ff5350 t wave_read_ind
-ffffffff81ff5590 t wave_read_regs
-ffffffff81ff5870 t gfx_v9_4_3_xcc_constants_init
-ffffffff81ff6be0 t gfx_v9_4_3_xcc_cp_resume
-ffffffff81ff7e80 t gfx_v9_4_3_xcc_cp_compute_enable
-ffffffff81ff8060 t amdgpu_bo_reserve
-ffffffff81ff8200 t gfx_v9_4_3_xcc_kiq_init_register
-ffffffff81ffa2a0 t gfx_v9_4_3_xcc_mqd_init
-ffffffff81ffae40 t gfx_v9_4_3_xcc_fini
-ffffffff81ffb4c0 t gfx_v9_4_3_xcc_q_fini_register
-ffffffff81ffc020 t gfx_v9_4_3_xcc_update_sram_fgcg
-ffffffff81ffc2d0 t gfx_v9_4_3_xcc_update_repeater_fgcg
-ffffffff81ffc580 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating
-ffffffff81ffd270 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating
-ffffffff81ffdc00 t gfx_v9_4_3_inst_query_ras_err_count
-ffffffff81ffdeb0 t gfx_v9_4_3_inst_query_ras_err_status
-ffffffff81ffeea0 t gfx_v9_4_3_inst_reset_ras_err_count
-ffffffff81fff090 t gfx_v9_4_3_inst_reset_ras_err_status
-ffffffff81fff930 t gfx_v9_4_3_inst_enable_watchdog_timer
+ffffffff81fec090 t gfx_v9_4_3_hw_fini
+ffffffff81fec170 t gfx_v9_4_3_suspend
+ffffffff81fec250 t gfx_v9_4_3_resume
+ffffffff81fec260 t gfx_v9_4_3_is_idle
+ffffffff81fec450 t gfx_v9_4_3_wait_for_idle
+ffffffff81fec4f0 t gfx_v9_4_3_soft_reset
+ffffffff81fecd30 t gfx_v9_4_3_set_clockgating_state
+ffffffff81fecef0 t gfx_v9_4_3_set_powergating_state
+ffffffff81fecf20 t gfx_v9_4_3_get_clockgating_state
+ffffffff81fed0d0 t gfx_v9_4_3_kiq_set_resources
+ffffffff81fed430 t gfx_v9_4_3_kiq_map_queues
+ffffffff81fed7d0 t gfx_v9_4_3_kiq_unmap_queues
+ffffffff81fedb90 t gfx_v9_4_3_kiq_query_status
+ffffffff81fedeb0 t gfx_v9_4_3_kiq_invalidate_tlbs
+ffffffff81fedfe0 t gfx_v9_4_3_ring_get_rptr_compute
+ffffffff81fee020 t gfx_v9_4_3_ring_get_wptr_compute
+ffffffff81fee090 t gfx_v9_4_3_ring_set_wptr_compute
+ffffffff81fee0f0 t gfx_v9_4_3_ring_emit_fence_kiq
+ffffffff81fee590 t gfx_v9_4_3_ring_test_ring
+ffffffff81fee830 t gfx_v9_4_3_ring_emit_rreg
+ffffffff81feeaf0 t gfx_v9_4_3_ring_emit_wreg
+ffffffff81feed50 t gfx_v9_4_3_ring_emit_reg_wait
+ffffffff81feedb0 t gfx_v9_4_3_ring_emit_reg_write_reg_wait
+ffffffff81feedd0 t gfx_v9_4_3_wait_reg_mem
+ffffffff81fef130 t gfx_v9_4_3_ring_emit_ib_compute
+ffffffff81fef490 t gfx_v9_4_3_ring_emit_fence
+ffffffff81fef880 t gfx_v9_4_3_ring_emit_pipeline_sync
+ffffffff81fef8f0 t gfx_v9_4_3_ring_emit_vm_flush
+ffffffff81fef910 t gfx_v9_4_3_ring_emit_hdp_flush
+ffffffff81fefa00 t gfx_v9_4_3_ring_emit_gds_switch
+ffffffff81fefbe0 t gfx_v9_4_3_ring_test_ib
+ffffffff81fefdd0 t gfx_v9_4_3_emit_mem_sync
+ffffffff81ff00c0 t gfx_v9_4_3_emit_wave_limit
+ffffffff81ff02d0 t gfx_v9_4_3_write_data_to_reg
+ffffffff81ff0500 t gfx_v9_4_3_set_eop_interrupt_state
+ffffffff81ff0680 t gfx_v9_4_3_eop_irq
+ffffffff81ff0830 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state
+ffffffff81ff09b0 t gfx_v9_4_3_ih_to_xcc_inst
+ffffffff81ff0a90 t gfx_v9_4_3_set_priv_reg_fault_state
+ffffffff81ff0ef0 t gfx_v9_4_3_priv_reg_irq
+ffffffff81ff0f60 t gfx_v9_4_3_fault
+ffffffff81ff10e0 t gfx_v9_4_3_set_priv_inst_fault_state
+ffffffff81ff1540 t gfx_v9_4_3_priv_inst_irq
+ffffffff81ff15b0 t gfx_v9_4_3_is_rlc_enabled
+ffffffff81ff1700 t gfx_v9_4_3_xcc_set_safe_mode
+ffffffff81ff1a10 t gfx_v9_4_3_xcc_unset_safe_mode
+ffffffff81ff1b50 t gfx_v9_4_3_rlc_init
+ffffffff81ff1bb0 t gfx_v9_4_3_rlc_resume
+ffffffff81ff1c70 t gfx_v9_4_3_rlc_stop
+ffffffff81ff1d20 t gfx_v9_4_3_rlc_reset
+ffffffff81ff24a0 t gfx_v9_4_3_rlc_start
+ffffffff81ff2550 t gfx_v9_4_3_update_spm_vmid
+ffffffff81ff27b0 t gfx_v9_4_3_is_rlcg_access_range
+ffffffff81ff2880 t gfx_v9_4_3_xcc_rlc_resume
+ffffffff81ff3240 t gfx_v9_4_3_xcc_rlc_stop
+ffffffff81ff3aa0 t gfx_v9_4_3_xcc_rlc_start
+ffffffff81ff3eb0 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt
+ffffffff81ff4110 t gfx_v9_4_3_xcc_select_se_sh
+ffffffff81ff4340 t gfx_v9_4_3_mec_init
+ffffffff81ff46b0 t gfx_v9_4_3_gpu_early_init
+ffffffff81ff4900 t amdgpu_bo_unreserve
+ffffffff81ff4a10 t gfx_v9_4_3_get_gpu_clock_counter
+ffffffff81ff4de0 t gfx_v9_4_3_read_wave_data
+ffffffff81ff5140 t gfx_v9_4_3_read_wave_vgprs
+ffffffff81ff5160 t gfx_v9_4_3_read_wave_sgprs
+ffffffff81ff51c0 t gfx_v9_4_3_select_me_pipe_q
+ffffffff81ff5240 t gfx_v9_4_3_switch_compute_partition
+ffffffff81ff55f0 t wave_read_ind
+ffffffff81ff5830 t wave_read_regs
+ffffffff81ff5b10 t gfx_v9_4_3_xcc_constants_init
+ffffffff81ff6e80 t gfx_v9_4_3_xcc_cp_resume
+ffffffff81ff8120 t gfx_v9_4_3_xcc_cp_compute_enable
+ffffffff81ff8300 t amdgpu_bo_reserve
+ffffffff81ff84a0 t gfx_v9_4_3_xcc_kiq_init_register
+ffffffff81ffa540 t gfx_v9_4_3_xcc_mqd_init
+ffffffff81ffb0e0 t gfx_v9_4_3_xcc_fini
+ffffffff81ffb760 t gfx_v9_4_3_xcc_q_fini_register
+ffffffff81ffc2c0 t gfx_v9_4_3_xcc_update_sram_fgcg
+ffffffff81ffc570 t gfx_v9_4_3_xcc_update_repeater_fgcg
+ffffffff81ffc820 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating
+ffffffff81ffd510 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating
+ffffffff81ffdea0 t gfx_v9_4_3_inst_query_ras_err_count
+ffffffff81ffe150 t gfx_v9_4_3_inst_query_ras_err_status
+ffffffff81fff140 t gfx_v9_4_3_inst_reset_ras_err_count
+ffffffff81fff330 t gfx_v9_4_3_inst_reset_ras_err_status
+ffffffff81fffbd0 t gfx_v9_4_3_inst_enable_watchdog_timer
 ffffffff82000000 t gfxhub_v1_0_get_mc_fb_offset
 ffffffff820000a0 t gfxhub_v1_0_setup_vm_pt_regs
 ffffffff820001f0 t gfxhub_v1_0_gart_enable
@@ -31328,100 +31328,100 @@ ffffffff8214a060 T amdgpu_xcp_drv_release
 ffffffff8214b000 T amdgpu_dm_find_first_crtc_matching_connector
 ffffffff8214b070 T amdgpu_dm_update_connector_after_detect
 ffffffff8214b680 T amdgpu_dm_update_freesync_caps
-ffffffff8214bb60 T dm_atomic_get_state
-ffffffff8214bbd0 T amdgpu_dm_connector_atomic_set_property
-ffffffff8214bc90 T amdgpu_dm_connector_atomic_get_property
-ffffffff8214bd30 T amdgpu_dm_connector_funcs_reset
-ffffffff8214be30 T amdgpu_dm_connector_atomic_duplicate_state
-ffffffff8214bf40 T create_validate_stream_for_sink
-ffffffff8214d870 T amdgpu_dm_connector_mode_valid
-ffffffff8214da70 T convert_dc_color_depth_into_bpc
-ffffffff8214dab0 t dm_encoder_helper_disable
-ffffffff8214dae0 t dm_encoder_helper_atomic_check
-ffffffff8214dcf0 T amdgpu_dm_connector_init_helper
-ffffffff8214e0e0 T amdgpu_dm_get_encoder_crtc_mask
-ffffffff8214e130 T dm_restore_drm_connector_state
-ffffffff8214e2c0 t parse_hdmi_amd_vsdb
-ffffffff8214e670 T amdgpu_dm_trigger_timing_sync
-ffffffff8214e850 T dm_write_reg_func
-ffffffff8214e870 T dm_read_reg_func
-ffffffff8214e920 T amdgpu_dm_process_dmub_aux_transfer_sync
-ffffffff8214eb90 T amdgpu_dm_process_dmub_set_config_sync
-ffffffff8214ed30 T check_seamless_boot_capability
-ffffffff8214ed80 T dm_execute_dmub_cmd
-ffffffff8214eda0 T dm_execute_dmub_cmd_list
-ffffffff8214edc0 t dm_early_init
-ffffffff8214f190 t dm_late_init
-ffffffff8214f490 t dm_sw_init
-ffffffff8214fab0 t dm_sw_fini
-ffffffff8214fb80 t amdgpu_dm_early_fini
-ffffffff8214fbe0 t dm_hw_init
-ffffffff82151bb0 t dm_hw_fini
-ffffffff82151c20 t dm_suspend
-ffffffff82152060 t dm_resume
-ffffffff82152ac0 t dm_is_idle
-ffffffff82152af0 t dm_wait_for_idle
-ffffffff82152b20 t dm_check_soft_reset
-ffffffff82152b50 t dm_soft_reset
-ffffffff82152b80 t dm_set_clockgating_state
-ffffffff82152bb0 t dm_set_powergating_state
-ffffffff82152be0 t dm_bandwidth_update
-ffffffff82152c10 t dm_vblank_get_counter
-ffffffff82152c90 t dm_crtc_get_scanoutpos
-ffffffff82152d80 t amdgpu_dm_dmub_reg_read
-ffffffff82152e30 t amdgpu_dm_dmub_reg_write
-ffffffff82152e60 t dm_dmub_hw_init
-ffffffff821532c0 t dmub_aux_setconfig_callback
-ffffffff82153370 t amdgpu_dm_fini
-ffffffff821535c0 t emulated_link_detect
-ffffffff821536d0 t amdgpu_dm_atomic_check
-ffffffff821545c0 t dm_update_plane_state
-ffffffff82154c70 t dm_update_crtc_state
-ffffffff82155760 t dm_check_crtc_cursor
-ffffffff82155ae0 t is_scaling_state_different
-ffffffff82155b80 t do_aquire_global_lock
-ffffffff82155e50 t dm_update_mst_vcpi_slots_for_dsc
-ffffffff82156060 t dm_atomic_destroy_state
-ffffffff821560a0 t dm_check_cursor_fb
-ffffffff82156250 t fill_dc_plane_attributes
-ffffffff82156500 t fill_dc_plane_info_and_addr
-ffffffff82156850 t fill_hdr_info_packet
-ffffffff821569c0 t is_timing_unchanged_for_freesync
-ffffffff82156af0 t get_highest_refresh_rate_mode
-ffffffff82156c50 t update_stream_scaling_settings
-ffffffff82156da0 t amdgpu_dm_atomic_commit_tail
-ffffffff82159f20 t amdgpu_dm_backlight_set_level
-ffffffff8215a120 t dm_atomic_duplicate_state
-ffffffff8215a1e0 t amdgpu_dm_audio_component_bind
-ffffffff8215a250 t amdgpu_dm_audio_component_unbind
-ffffffff8215a2b0 t amdgpu_dm_audio_component_get_eld
-ffffffff8215a410 t dm_dmub_outbox1_low_irq
-ffffffff8215a750 t dm_handle_hpd_work
-ffffffff8215a7e0 t amdgpu_dm_encoder_destroy
-ffffffff8215a820 t amdgpu_dm_i2c_xfer
-ffffffff8215a980 t amdgpu_dm_i2c_func
-ffffffff8215a9b0 t amdgpu_dm_connector_detect
-ffffffff8215aa70 t amdgpu_dm_connector_funcs_force
-ffffffff8215ab60 t amdgpu_dm_connector_late_register
-ffffffff8215ace0 t amdgpu_dm_connector_unregister
-ffffffff8215ad00 t amdgpu_dm_connector_destroy
-ffffffff8215ae10 t amdgpu_dm_backlight_update_status
-ffffffff8215aea0 t amdgpu_dm_backlight_get_brightness
-ffffffff8215b0a0 t get_modes
-ffffffff8215b0b0 t amdgpu_dm_connector_atomic_check
-ffffffff8215b210 t amdgpu_dm_connector_get_modes
-ffffffff8215b890 t dm_crtc_high_irq
-ffffffff8215ba50 t dm_vupdate_high_irq
-ffffffff8215bc00 t dm_pflip_high_irq
-ffffffff8215be50 t register_hpd_handlers
-ffffffff8215bf70 t dmub_hpd_callback
-ffffffff8215c130 t handle_hpd_irq
-ffffffff8215c140 t handle_hpd_rx_irq
-ffffffff8215c4f0 t handle_hpd_irq_helper
-ffffffff8215c6b0 t schedule_hpd_rx_offload_work
-ffffffff8215c780 t dm_handle_hpd_rx_offload_work
-ffffffff8215cb60 t dm_gpureset_toggle_interrupts
-ffffffff8215cda0 t s3_handle_mst
+ffffffff8214bc40 T dm_atomic_get_state
+ffffffff8214bcb0 T amdgpu_dm_connector_atomic_set_property
+ffffffff8214bd70 T amdgpu_dm_connector_atomic_get_property
+ffffffff8214be10 T amdgpu_dm_connector_funcs_reset
+ffffffff8214bf10 T amdgpu_dm_connector_atomic_duplicate_state
+ffffffff8214c020 T create_validate_stream_for_sink
+ffffffff8214d950 T amdgpu_dm_connector_mode_valid
+ffffffff8214db50 T convert_dc_color_depth_into_bpc
+ffffffff8214db90 t dm_encoder_helper_disable
+ffffffff8214dbc0 t dm_encoder_helper_atomic_check
+ffffffff8214ddd0 T amdgpu_dm_connector_init_helper
+ffffffff8214e1c0 T amdgpu_dm_get_encoder_crtc_mask
+ffffffff8214e210 T dm_restore_drm_connector_state
+ffffffff8214e3a0 t parse_hdmi_amd_vsdb
+ffffffff8214e750 T amdgpu_dm_trigger_timing_sync
+ffffffff8214e930 T dm_write_reg_func
+ffffffff8214e950 T dm_read_reg_func
+ffffffff8214ea00 T amdgpu_dm_process_dmub_aux_transfer_sync
+ffffffff8214ec70 T amdgpu_dm_process_dmub_set_config_sync
+ffffffff8214ee10 T check_seamless_boot_capability
+ffffffff8214ee60 T dm_execute_dmub_cmd
+ffffffff8214ee80 T dm_execute_dmub_cmd_list
+ffffffff8214eea0 t dm_early_init
+ffffffff8214f270 t dm_late_init
+ffffffff8214f570 t dm_sw_init
+ffffffff8214fb90 t dm_sw_fini
+ffffffff8214fc60 t amdgpu_dm_early_fini
+ffffffff8214fcc0 t dm_hw_init
+ffffffff82151c90 t dm_hw_fini
+ffffffff82151d00 t dm_suspend
+ffffffff82152140 t dm_resume
+ffffffff82152ba0 t dm_is_idle
+ffffffff82152bd0 t dm_wait_for_idle
+ffffffff82152c00 t dm_check_soft_reset
+ffffffff82152c30 t dm_soft_reset
+ffffffff82152c60 t dm_set_clockgating_state
+ffffffff82152c90 t dm_set_powergating_state
+ffffffff82152cc0 t dm_bandwidth_update
+ffffffff82152cf0 t dm_vblank_get_counter
+ffffffff82152d70 t dm_crtc_get_scanoutpos
+ffffffff82152e60 t amdgpu_dm_dmub_reg_read
+ffffffff82152f10 t amdgpu_dm_dmub_reg_write
+ffffffff82152f40 t dm_dmub_hw_init
+ffffffff821533a0 t dmub_aux_setconfig_callback
+ffffffff82153450 t amdgpu_dm_fini
+ffffffff821536a0 t emulated_link_detect
+ffffffff821537b0 t amdgpu_dm_atomic_check
+ffffffff821546a0 t dm_update_plane_state
+ffffffff82154d50 t dm_update_crtc_state
+ffffffff82155840 t dm_check_crtc_cursor
+ffffffff82155bc0 t is_scaling_state_different
+ffffffff82155c60 t do_aquire_global_lock
+ffffffff82155f30 t dm_update_mst_vcpi_slots_for_dsc
+ffffffff82156140 t dm_atomic_destroy_state
+ffffffff82156180 t dm_check_cursor_fb
+ffffffff82156330 t fill_dc_plane_attributes
+ffffffff821565e0 t fill_dc_plane_info_and_addr
+ffffffff82156930 t fill_hdr_info_packet
+ffffffff82156aa0 t is_timing_unchanged_for_freesync
+ffffffff82156bd0 t get_highest_refresh_rate_mode
+ffffffff82156d30 t update_stream_scaling_settings
+ffffffff82156e80 t amdgpu_dm_atomic_commit_tail
+ffffffff8215a000 t amdgpu_dm_backlight_set_level
+ffffffff8215a200 t dm_atomic_duplicate_state
+ffffffff8215a2c0 t amdgpu_dm_audio_component_bind
+ffffffff8215a330 t amdgpu_dm_audio_component_unbind
+ffffffff8215a390 t amdgpu_dm_audio_component_get_eld
+ffffffff8215a4f0 t dm_dmub_outbox1_low_irq
+ffffffff8215a830 t dm_handle_hpd_work
+ffffffff8215a8c0 t amdgpu_dm_encoder_destroy
+ffffffff8215a900 t amdgpu_dm_i2c_xfer
+ffffffff8215aa60 t amdgpu_dm_i2c_func
+ffffffff8215aa90 t amdgpu_dm_connector_detect
+ffffffff8215ab50 t amdgpu_dm_connector_funcs_force
+ffffffff8215ac40 t amdgpu_dm_connector_late_register
+ffffffff8215adc0 t amdgpu_dm_connector_unregister
+ffffffff8215ade0 t amdgpu_dm_connector_destroy
+ffffffff8215aef0 t amdgpu_dm_backlight_update_status
+ffffffff8215af80 t amdgpu_dm_backlight_get_brightness
+ffffffff8215b180 t get_modes
+ffffffff8215b190 t amdgpu_dm_connector_atomic_check
+ffffffff8215b2f0 t amdgpu_dm_connector_get_modes
+ffffffff8215b970 t dm_crtc_high_irq
+ffffffff8215bb30 t dm_vupdate_high_irq
+ffffffff8215bce0 t dm_pflip_high_irq
+ffffffff8215bf30 t register_hpd_handlers
+ffffffff8215c050 t dmub_hpd_callback
+ffffffff8215c210 t handle_hpd_irq
+ffffffff8215c220 t handle_hpd_rx_irq
+ffffffff8215c5d0 t handle_hpd_irq_helper
+ffffffff8215c790 t schedule_hpd_rx_offload_work
+ffffffff8215c860 t dm_handle_hpd_rx_offload_work
+ffffffff8215cc40 t dm_gpureset_toggle_interrupts
+ffffffff8215ce80 t s3_handle_mst
 ffffffff8215e000 T amdgpu_dm_init_color_mod
 ffffffff8215e010 T amdgpu_dm_verify_lut_sizes
 ffffffff8215e0f0 T amdgpu_dm_update_crtc_color_mgmt
@@ -42159,16 +42159,16 @@ ffffffff8282d230 r replacements
 ffffffff82830b41 r apollo_pio_rec
 ffffffff8287eb40 r apollo_udma33_tim
 ffffffff82894304 r pp_r600_decoded_lanes
-ffffffff828cb3ea r cmd680_setup_channel.udma_tbl
-ffffffff828d393a r apollo_udma100_tim
-ffffffff828d3940 r cmd0646_9_tim_udma
-ffffffff828e22cc r substchar
-ffffffff82939b84 r apollo_udma133_tim
-ffffffff82939b8b r apollo_udma66_tim
-ffffffff82939bb5 r cy_pio_rec
-ffffffff8293f4a0 R drm_ca
-ffffffff8293f4c8 R drm_filtops
-ffffffff8293f4f8 R drmread_filtops
+ffffffff828cb419 r cmd680_setup_channel.udma_tbl
+ffffffff828d3969 r apollo_udma100_tim
+ffffffff828d396f r cmd0646_9_tim_udma
+ffffffff828e22fb r substchar
+ffffffff82939bcb r apollo_udma133_tim
+ffffffff82939bd2 r apollo_udma66_tim
+ffffffff82939bfc r cy_pio_rec
+ffffffff8293f4e8 R drm_ca
+ffffffff8293f510 R drm_filtops
+ffffffff8293f540 R drmread_filtops
 ffffffff82940000 r vga_emulops
 ffffffff82940048 R vga_stdscreen
 ffffffff82940078 R vga_stdscreen_mono
@@ -44295,31 +44295,31 @@ ffffffff82c65200 r drm_named_modes
 ffffffff82c66000 r primary_plane_funcs
 ffffffff82c66068 r safe_modeset_formats
 ffffffff82c67000 r orientation_data
-ffffffff82c6ab20 r lcd800x1280_rightside_up
-ffffffff82c6ab38 r lcd720x1280_rightside_up
-ffffffff82c6ab50 r lcd800x1280_leftside_up
-ffffffff82c6ab68 r lcd1080x1920_leftside_up
-ffffffff82c6ab80 r lcd1200x1920_rightside_up
-ffffffff82c6ab98 r gpd_micropc
-ffffffff82c6abb0 r gpd_pocket
-ffffffff82c6abc8 r gpd_pocket2
-ffffffff82c6abe0 r gpd_win
-ffffffff82c6abf8 r gpd_win2
-ffffffff82c6ac10 r lcd1080x1920_rightside_up
-ffffffff82c6ac28 r itworks_tw891
-ffffffff82c6ac40 r lcd1600x2560_leftside_up
-ffffffff82c6ac58 r lcd1600x2560_rightside_up
-ffffffff82c6ac70 r onegx1_pro
-ffffffff82c6ac88 r lcd1280x1920_rightside_up
-ffffffff82c6aca0 r gpd_onemix2s
-ffffffff82c6acb8 r .compoundliteral
-ffffffff82c6acc8 r .compoundliteral.5
-ffffffff82c6acf0 r .compoundliteral.9
-ffffffff82c6ad10 r .compoundliteral.17
-ffffffff82c6ad50 r .compoundliteral.21
-ffffffff82c6ad70 r .compoundliteral.23
-ffffffff82c6ad80 r .compoundliteral.25
-ffffffff82c6ad90 r .compoundliteral.29
+ffffffff82c6ac78 r lcd800x1280_rightside_up
+ffffffff82c6ac90 r lcd720x1280_rightside_up
+ffffffff82c6aca8 r lcd800x1280_leftside_up
+ffffffff82c6acc0 r lcd1080x1920_leftside_up
+ffffffff82c6acd8 r lcd1600x2560_rightside_up
+ffffffff82c6acf0 r lcd1200x1920_rightside_up
+ffffffff82c6ad08 r gpd_micropc
+ffffffff82c6ad20 r gpd_pocket
+ffffffff82c6ad38 r gpd_pocket2
+ffffffff82c6ad50 r gpd_win
+ffffffff82c6ad68 r gpd_win2
+ffffffff82c6ad80 r lcd1080x1920_rightside_up
+ffffffff82c6ad98 r itworks_tw891
+ffffffff82c6adb0 r lcd1600x2560_leftside_up
+ffffffff82c6adc8 r onegx1_pro
+ffffffff82c6ade0 r lcd1280x1920_rightside_up
+ffffffff82c6adf8 r gpd_onemix2s
+ffffffff82c6ae10 r .compoundliteral
+ffffffff82c6ae20 r .compoundliteral.5
+ffffffff82c6ae48 r .compoundliteral.9
+ffffffff82c6ae68 r .compoundliteral.17
+ffffffff82c6aea8 r .compoundliteral.21
+ffffffff82c6aec8 r .compoundliteral.23
+ffffffff82c6aed8 r .compoundliteral.25
+ffffffff82c6aee8 r .compoundliteral.29
 ffffffff82c6b000 r drm_gem_prime_dmabuf_ops
 ffffffff82c6d000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id
 ffffffff82c6e000 r drm_dp_phy_name.phy_names