--- 7.5/2024-08-01T06:17:09Z/2024-07-21T00:00:00Z/nm-bsd-ot14.txt Sat Aug 3 22:13:45 2024 +++ 7.5/2024-08-01T06:17:09Z/2024-07-22T00:00:00Z/nm-bsd-ot14.txt Sun Aug 4 00:59:57 2024 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001418f A acpi_pdirpa 01000000 A __kernel_phys_base -02827000 T __kernel_kutext_phys -0282a000 C __kernel_cptext_phys -0282b000 C __kernel_rodata_phys -03135000 R __kernel_kutext_page_phys -03137000 C __kernel_randomdata_phys -033f1000 R __kernel_data_phys -0374d000 D __kernel_kudata_phys -0374e000 C __kernel_bss_phys +02828000 T __kernel_kutext_phys +0282b000 C __kernel_cptext_phys +0282c000 C __kernel_rodata_phys +03136000 R __kernel_kutext_page_phys +03138000 C __kernel_randomdata_phys +033f2000 R __kernel_data_phys +0374e000 D __kernel_kudata_phys +0374f000 C __kernel_bss_phys 03c00000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -18,13 +18,13 @@ ffffffff81000000 A kernel_text ffffffff81001000 T start ffffffff8100105d t bi_size_ok ffffffff81001133 t cont -ffffffff8100126d t map_syms -ffffffff810012a9 t map_tables -ffffffff810013f8 t store_pte -ffffffff810014be t write_efer -ffffffff810014d2 t compat -ffffffff810014e1 t longmode -ffffffff810014ed t longmode_hi +ffffffff810012f8 t map_syms +ffffffff81001334 t map_tables +ffffffff81001483 t store_pte +ffffffff81001549 t write_efer +ffffffff8100155d t compat +ffffffff8100156c t longmode +ffffffff81001578 t longmode_hi ffffffff81003000 T endboot ffffffff81003000 T read_seeprom ffffffff81004000 T pcdisplay_cursor_reset @@ -12342,49 +12342,49 @@ ffffffff816746f0 T pmap_tlb_shootrange ffffffff816749a0 T pmap_set_pml4_early ffffffff81674b40 T pmap_clear_pml4_early ffffffff81674bb0 T pmap_bootstrap -ffffffff81675270 T pmap_init_percpu -ffffffff81675290 T pmap_randomize -ffffffff816754e0 T pmap_extract -ffffffff81675690 T pmap_randomize_level -ffffffff81675920 T pmap_prealloc_lowmem_ptps -ffffffff81675a40 T pmap_init -ffffffff81675a70 T pmap_enter_pv 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nbio_v7_4_ih_control -ffffffff8207a350 t nbio_v7_4_init_registers -ffffffff8207a450 t nbio_v7_4_remap_hdp_registers -ffffffff8207a570 t nbio_v7_4_program_aspm -ffffffff8207aa20 t nbio_v7_4_set_ras_controller_irq_state -ffffffff8207abd0 t nbio_v7_4_process_ras_controller_irq -ffffffff8207ac00 t nbio_v7_4_set_ras_err_event_athub_irq_state -ffffffff8207adb0 t nbio_v7_4_process_err_event_athub_irq -ffffffff8207b000 t nbio_v7_7_get_hdp_flush_req_offset -ffffffff8207b040 t nbio_v7_7_get_hdp_flush_done_offset -ffffffff8207b080 t nbio_v7_7_get_pcie_index_offset -ffffffff8207b0c0 t nbio_v7_7_get_pcie_data_offset -ffffffff8207b100 t nbio_v7_7_get_pcie_port_index_offset -ffffffff8207b130 t nbio_v7_7_get_pcie_port_data_offset -ffffffff8207b170 t nbio_v7_7_get_rev_id -ffffffff8207b210 t nbio_v7_7_mc_access_enable -ffffffff8207b2c0 t nbio_v7_7_get_memsize -ffffffff8207b330 t nbio_v7_7_sdma_doorbell_range -ffffffff8207b3d0 t nbio_v7_7_vcn_doorbell_range -ffffffff8207b460 t nbio_v7_7_enable_doorbell_aperture -ffffffff8207b550 t nbio_v7_7_enable_doorbell_selfring_aperture -ffffffff8207b6d0 t nbio_v7_7_ih_doorbell_range -ffffffff8207b800 t nbio_v7_7_update_medium_grain_clock_gating -ffffffff8207b950 t nbio_v7_7_update_medium_grain_light_sleep -ffffffff8207bb80 t nbio_v7_7_get_clockgating_state -ffffffff8207bcc0 t nbio_v7_7_ih_control -ffffffff8207be30 t nbio_v7_7_init_registers -ffffffff8207bf50 t nbio_v7_7_remap_hdp_registers -ffffffff8207d000 t nbio_v7_9_get_hdp_flush_req_offset -ffffffff8207d040 t nbio_v7_9_get_hdp_flush_done_offset -ffffffff8207d080 t nbio_v7_9_get_pcie_index_offset -ffffffff8207d0c0 t nbio_v7_9_get_pcie_data_offset -ffffffff8207d100 t nbio_v7_9_get_pcie_index_hi_offset -ffffffff8207d140 t nbio_v7_9_get_rev_id -ffffffff8207d1e0 t nbio_v7_9_mc_access_enable -ffffffff8207d290 t nbio_v7_9_get_memsize -ffffffff8207d300 t nbio_v7_9_sdma_doorbell_range -ffffffff8207d680 t nbio_v7_9_vcn_doorbell_range -ffffffff8207d840 t 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psp_v13_0_4_bootloader_load_soc_drv -ffffffff8208b170 t psp_v13_0_4_bootloader_load_intf_drv -ffffffff8208b190 t psp_v13_0_4_bootloader_load_dbg_drv -ffffffff8208b1b0 t psp_v13_0_4_bootloader_load_sos -ffffffff8208b620 t psp_v13_0_4_ring_create -ffffffff8208beb0 t psp_v13_0_4_ring_stop -ffffffff8208c3c0 t psp_v13_0_4_ring_destroy -ffffffff8208c450 t psp_v13_0_4_ring_get_wptr -ffffffff8208c4c0 t psp_v13_0_4_ring_set_wptr -ffffffff8208c5e0 t psp_v13_0_4_bootloader_load_component -ffffffff8208c7f0 t psp_v13_0_4_wait_for_bootloader -ffffffff8208d000 T psp_v3_1_set_psp_funcs -ffffffff8208d030 t psp_v3_1_init_microcode -ffffffff8208d0f0 t psp_v3_1_bootloader_load_sysdrv -ffffffff8208d510 t psp_v3_1_bootloader_load_sos -ffffffff8208d980 t psp_v3_1_ring_create -ffffffff8208e840 t psp_v3_1_ring_stop -ffffffff8208eb20 t psp_v3_1_ring_destroy -ffffffff8208ebb0 t psp_v3_1_smu_reload_quirk -ffffffff8208ec00 t psp_v3_1_mode1_reset -ffffffff8208ed30 t psp_v3_1_ring_get_wptr -ffffffff8208ed80 t psp_v3_1_ring_set_wptr -ffffffff8208f000 t sdma_v2_4_early_init -ffffffff8208f0f0 t sdma_v2_4_sw_init -ffffffff8208f520 t sdma_v2_4_sw_fini -ffffffff8208f5f0 t sdma_v2_4_hw_init -ffffffff8208faa0 t sdma_v2_4_hw_fini -ffffffff8208faf0 t sdma_v2_4_suspend -ffffffff8208fb40 t sdma_v2_4_resume -ffffffff8208fb50 t sdma_v2_4_is_idle -ffffffff8208fba0 t sdma_v2_4_wait_for_idle -ffffffff8208fc50 t sdma_v2_4_soft_reset -ffffffff8208fe00 t sdma_v2_4_set_clockgating_state -ffffffff8208fe30 t sdma_v2_4_set_powergating_state -ffffffff8208fe60 t sdma_v2_4_ring_get_rptr -ffffffff8208fea0 t sdma_v2_4_ring_get_wptr -ffffffff8208ff00 t sdma_v2_4_ring_set_wptr -ffffffff8208ff40 t sdma_v2_4_ring_emit_ib -ffffffff82090220 t sdma_v2_4_ring_emit_fence -ffffffff82090670 t sdma_v2_4_ring_emit_pipeline_sync -ffffffff82090920 t sdma_v2_4_ring_emit_vm_flush -ffffffff82090bd0 t sdma_v2_4_ring_emit_hdp_flush -ffffffff82090e80 t sdma_v2_4_ring_test_ring -ffffffff820911b0 t sdma_v2_4_ring_test_ib -ffffffff820913c0 t sdma_v2_4_ring_insert_nop -ffffffff82091500 t sdma_v2_4_ring_pad_ib -ffffffff82091630 t sdma_v2_4_ring_emit_wreg -ffffffff82091790 t sdma_v2_4_emit_copy_buffer -ffffffff82091850 t sdma_v2_4_emit_fill_buffer -ffffffff820918e0 t sdma_v2_4_vm_copy_pte -ffffffff820919a0 t sdma_v2_4_vm_write_pte -ffffffff82091a70 t sdma_v2_4_vm_set_pte_pde -ffffffff82091b70 t sdma_v2_4_set_trap_irq_state -ffffffff82091c60 t sdma_v2_4_process_trap_irq -ffffffff82091d00 t sdma_v2_4_process_illegal_inst_irq -ffffffff82091d80 t sdma_v2_4_enable -ffffffff82092000 t sdma_v3_0_early_init -ffffffff82092100 t sdma_v3_0_sw_init -ffffffff82092530 t sdma_v3_0_sw_fini -ffffffff82092600 t sdma_v3_0_hw_init -ffffffff82092770 t sdma_v3_0_hw_fini -ffffffff820927d0 t sdma_v3_0_suspend -ffffffff82092830 t sdma_v3_0_resume -ffffffff82092840 t sdma_v3_0_is_idle -ffffffff82092890 t sdma_v3_0_wait_for_idle -ffffffff82092940 t sdma_v3_0_check_soft_reset -ffffffff820929a0 t sdma_v3_0_pre_soft_reset -ffffffff82092a00 t sdma_v3_0_soft_reset -ffffffff82092b00 t sdma_v3_0_post_soft_reset -ffffffff82092b50 t sdma_v3_0_set_clockgating_state -ffffffff82092e00 t sdma_v3_0_set_powergating_state -ffffffff82092e30 t sdma_v3_0_get_clockgating_state -ffffffff82092ed0 t sdma_v3_0_ring_get_rptr -ffffffff82092f10 t sdma_v3_0_ring_get_wptr -ffffffff82092f90 t sdma_v3_0_ring_set_wptr -ffffffff82093040 t sdma_v3_0_ring_emit_ib -ffffffff82093320 t sdma_v3_0_ring_emit_fence -ffffffff82093770 t sdma_v3_0_ring_emit_pipeline_sync -ffffffff82093a20 t sdma_v3_0_ring_emit_vm_flush -ffffffff82093cd0 t sdma_v3_0_ring_emit_hdp_flush -ffffffff82093f80 t sdma_v3_0_ring_test_ring -ffffffff820942b0 t sdma_v3_0_ring_test_ib -ffffffff820944c0 t sdma_v3_0_ring_insert_nop -ffffffff82094600 t sdma_v3_0_ring_pad_ib -ffffffff82094730 t sdma_v3_0_ring_emit_wreg -ffffffff82094890 t sdma_v3_0_emit_copy_buffer -ffffffff82094950 t sdma_v3_0_emit_fill_buffer -ffffffff820949e0 t sdma_v3_0_vm_copy_pte -ffffffff82094aa0 t sdma_v3_0_vm_write_pte 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sdma_v4_0_reset_ras_error_count -ffffffff8209ac20 t sdma_v4_0_ring_get_rptr -ffffffff8209ac80 t sdma_v4_0_ring_get_wptr -ffffffff8209ae90 t sdma_v4_0_ring_set_wptr -ffffffff8209b140 t sdma_v4_0_ring_emit_ib -ffffffff8209b420 t sdma_v4_0_ring_emit_fence -ffffffff8209b890 t sdma_v4_0_ring_emit_pipeline_sync -ffffffff8209b8f0 t sdma_v4_0_ring_emit_vm_flush -ffffffff8209b910 t sdma_v4_0_ring_emit_hdp_flush -ffffffff8209b9d0 t sdma_v4_0_ring_test_ring -ffffffff8209bd00 t sdma_v4_0_ring_test_ib -ffffffff8209bf10 t sdma_v4_0_ring_insert_nop -ffffffff8209c050 t sdma_v4_0_ring_pad_ib -ffffffff8209c180 t sdma_v4_0_ring_emit_wreg -ffffffff8209c2e0 t sdma_v4_0_ring_emit_reg_wait -ffffffff8209c330 t sdma_v4_0_wait_reg_mem -ffffffff8209c680 t sdma_v4_0_page_ring_get_wptr -ffffffff8209c840 t sdma_v4_0_page_ring_set_wptr -ffffffff8209ca10 t sdma_v4_0_emit_copy_buffer -ffffffff8209cad0 t sdma_v4_0_emit_fill_buffer -ffffffff8209cb60 t sdma_v4_0_vm_copy_pte -ffffffff8209cc20 t sdma_v4_0_vm_write_pte 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sdma_v4_4_2_ring_insert_nop -ffffffff820a28b0 t sdma_v4_4_2_ring_pad_ib -ffffffff820a29e0 t sdma_v4_4_2_ring_emit_wreg -ffffffff820a2b40 t sdma_v4_4_2_ring_emit_reg_wait -ffffffff820a2b90 t sdma_v4_4_2_wait_reg_mem -ffffffff820a2ee0 t sdma_v4_4_2_page_ring_get_wptr -ffffffff820a3000 t sdma_v4_4_2_page_ring_set_wptr -ffffffff820a3130 t sdma_v4_4_2_emit_copy_buffer -ffffffff820a31f0 t sdma_v4_4_2_emit_fill_buffer -ffffffff820a3280 t sdma_v4_4_2_vm_copy_pte -ffffffff820a3340 t sdma_v4_4_2_vm_write_pte -ffffffff820a3410 t sdma_v4_4_2_vm_set_pte_pde -ffffffff820a3510 t sdma_v4_4_2_set_trap_irq_state -ffffffff820a3610 t sdma_v4_4_2_process_trap_irq -ffffffff820a3740 t sdma_v4_4_2_process_illegal_inst_irq -ffffffff820a37e0 t sdma_v4_4_2_set_ecc_irq_state -ffffffff820a38f0 t sdma_v4_4_2_process_vm_hole_irq -ffffffff820a39e0 t sdma_v4_4_2_process_doorbell_invalid_irq -ffffffff820a3ad0 t sdma_v4_4_2_process_pool_timeout_irq -ffffffff820a3bc0 t sdma_v4_4_2_process_srbm_write_irq -ffffffff820a3cb0 t sdma_v4_4_2_query_ras_error_count -ffffffff820a3e30 t sdma_v4_4_2_reset_ras_error_count -ffffffff820a3fa0 t sdma_v4_4_2_inst_init_golden_registers -ffffffff820a4170 t sdma_v4_4_2_inst_start -ffffffff820a59a0 t sdma_v4_4_2_inst_ctx_switch_enable -ffffffff820a5cf0 t sdma_v4_4_2_inst_enable -ffffffff820a7000 t sdma_v5_0_early_init -ffffffff820a7130 t sdma_v5_0_sw_init -ffffffff820a7350 t sdma_v5_0_sw_fini -ffffffff820a73f0 t sdma_v5_0_hw_init -ffffffff820a88c0 t sdma_v5_0_hw_fini -ffffffff820a8930 t sdma_v5_0_suspend -ffffffff820a89a0 t sdma_v5_0_resume -ffffffff820a89b0 t sdma_v5_0_is_idle -ffffffff820a8a50 t sdma_v5_0_wait_for_idle -ffffffff820a8b30 t sdma_v5_0_soft_reset -ffffffff820a8b60 t sdma_v5_0_set_clockgating_state -ffffffff820a8d80 t sdma_v5_0_set_powergating_state -ffffffff820a8db0 t sdma_v5_0_get_clockgating_state -ffffffff820a8e60 t sdma_v5_0_ring_get_rptr -ffffffff820a8ec0 t sdma_v5_0_ring_get_wptr -ffffffff820a9080 t sdma_v5_0_ring_set_wptr -ffffffff820a9430 t sdma_v5_0_ring_emit_ib -ffffffff820a9730 t sdma_v5_0_ring_emit_fence -ffffffff820a9be0 t sdma_v5_0_ring_emit_pipeline_sync -ffffffff820a9e90 t sdma_v5_0_ring_emit_vm_flush -ffffffff820a9eb0 t sdma_v5_0_ring_emit_hdp_flush -ffffffff820aa180 t sdma_v5_0_ring_test_ring -ffffffff820aa5b0 t sdma_v5_0_ring_test_ib -ffffffff820aa940 t sdma_v5_0_ring_insert_nop -ffffffff820aaa80 t sdma_v5_0_ring_pad_ib -ffffffff820aabb0 t sdma_v5_0_ring_init_cond_exec -ffffffff820aae00 t sdma_v5_0_ring_patch_cond_exec -ffffffff820aaec0 t sdma_v5_0_ring_emit_wreg -ffffffff820ab020 t sdma_v5_0_ring_emit_reg_wait -ffffffff820ab2c0 t sdma_v5_0_ring_emit_reg_write_reg_wait -ffffffff820ab350 t sdma_v5_0_ring_preempt_ib -ffffffff820ab4e0 t sdma_v5_0_ring_emit_mem_sync -ffffffff820ab710 t sdma_v5_0_emit_copy_buffer -ffffffff820ab7d0 t sdma_v5_0_emit_fill_buffer -ffffffff820ab860 t sdma_v5_0_vm_copy_pte -ffffffff820ab920 t sdma_v5_0_vm_write_pte -ffffffff820ab9f0 t sdma_v5_0_vm_set_pte_pde -ffffffff820abaf0 t sdma_v5_0_set_trap_irq_state -ffffffff820abb90 t sdma_v5_0_process_trap_irq -ffffffff820abcd0 t sdma_v5_0_process_illegal_inst_irq -ffffffff820abd00 t sdma_v5_0_mqd_init -ffffffff820abdf0 t sdma_v5_0_ctx_switch_enable -ffffffff820ac170 t sdma_v5_0_enable -ffffffff820ad000 t sdma_v5_2_early_init -ffffffff820ad130 t sdma_v5_2_sw_init -ffffffff820ad3f0 t sdma_v5_2_sw_fini -ffffffff820ad490 t sdma_v5_2_hw_init -ffffffff820af2c0 t sdma_v5_2_hw_fini -ffffffff820af330 t sdma_v5_2_suspend -ffffffff820af3a0 t sdma_v5_2_resume -ffffffff820af3b0 t sdma_v5_2_is_idle -ffffffff820af470 t sdma_v5_2_wait_for_idle -ffffffff820af5a0 t sdma_v5_2_soft_reset -ffffffff820af8c0 t sdma_v5_2_set_clockgating_state -ffffffff820afc60 t sdma_v5_2_set_powergating_state -ffffffff820afc90 t sdma_v5_2_get_clockgating_state -ffffffff820afd40 t sdma_v5_2_ring_get_rptr -ffffffff820afda0 t sdma_v5_2_ring_get_wptr -ffffffff820afef0 t sdma_v5_2_ring_set_wptr -ffffffff820b00d0 t sdma_v5_2_ring_emit_ib -ffffffff820b03d0 t sdma_v5_2_ring_emit_fence -ffffffff820b0880 t sdma_v5_2_ring_emit_pipeline_sync -ffffffff820b0b30 t sdma_v5_2_ring_emit_vm_flush -ffffffff820b0b50 t sdma_v5_2_ring_emit_hdp_flush -ffffffff820b0e50 t sdma_v5_2_ring_test_ring -ffffffff820b1280 t sdma_v5_2_ring_test_ib -ffffffff820b1610 t sdma_v5_2_ring_insert_nop -ffffffff820b1750 t sdma_v5_2_ring_pad_ib -ffffffff820b1880 t sdma_v5_2_ring_init_cond_exec -ffffffff820b1ad0 t sdma_v5_2_ring_patch_cond_exec -ffffffff820b1b90 t sdma_v5_2_ring_begin_use -ffffffff820b1bb0 t sdma_v5_2_ring_end_use -ffffffff820b1bd0 t sdma_v5_2_ring_emit_wreg -ffffffff820b1d30 t sdma_v5_2_ring_emit_reg_wait -ffffffff820b1fd0 t sdma_v5_2_ring_emit_reg_write_reg_wait -ffffffff820b2060 t sdma_v5_2_ring_preempt_ib -ffffffff820b2220 t sdma_v5_2_ring_emit_mem_sync -ffffffff820b2450 t sdma_v5_2_emit_copy_buffer -ffffffff820b2510 t sdma_v5_2_emit_fill_buffer -ffffffff820b25a0 t sdma_v5_2_vm_copy_pte -ffffffff820b2660 t sdma_v5_2_vm_write_pte -ffffffff820b2730 t sdma_v5_2_vm_set_pte_pde -ffffffff820b2830 t sdma_v5_2_set_trap_irq_state -ffffffff820b28f0 t sdma_v5_2_process_trap_irq -ffffffff820b2a60 t sdma_v5_2_process_illegal_inst_irq -ffffffff820b2a90 t sdma_v5_2_mqd_init -ffffffff820b2b80 t sdma_v5_2_ctx_switch_enable -ffffffff820b2fd0 t sdma_v5_2_enable -ffffffff820b4000 t sdma_v6_0_early_init -ffffffff820b4120 t sdma_v6_0_sw_init -ffffffff820b4330 t sdma_v6_0_sw_fini -ffffffff820b43d0 t sdma_v6_0_hw_init -ffffffff820b43e0 t sdma_v6_0_hw_fini -ffffffff820b44d0 t sdma_v6_0_suspend -ffffffff820b4510 t sdma_v6_0_resume -ffffffff820b4520 t sdma_v6_0_is_idle -ffffffff820b45c0 t sdma_v6_0_wait_for_idle -ffffffff820b46a0 t sdma_v6_0_check_soft_reset -ffffffff820b4770 t sdma_v6_0_soft_reset -ffffffff820b4cc0 t sdma_v6_0_set_clockgating_state -ffffffff820b4cf0 t sdma_v6_0_set_powergating_state -ffffffff820b4d20 t sdma_v6_0_get_clockgating_state -ffffffff820b4d50 t sdma_v6_0_ring_get_rptr -ffffffff820b4db0 t sdma_v6_0_ring_get_wptr -ffffffff820b4e30 t sdma_v6_0_ring_set_wptr -ffffffff820b51e0 t sdma_v6_0_ring_emit_ib -ffffffff820b54e0 t sdma_v6_0_ring_emit_fence -ffffffff820b5990 t sdma_v6_0_ring_emit_pipeline_sync -ffffffff820b5c40 t sdma_v6_0_ring_emit_vm_flush -ffffffff820b5ee0 t sdma_v6_0_ring_emit_hdp_flush -ffffffff820b61b0 t sdma_v6_0_ring_test_ring -ffffffff820b65e0 t sdma_v6_0_ring_test_ib -ffffffff820b6970 t sdma_v6_0_ring_insert_nop -ffffffff820b6ab0 t sdma_v6_0_ring_pad_ib -ffffffff820b6be0 t sdma_v6_0_ring_init_cond_exec -ffffffff820b6e30 t sdma_v6_0_ring_patch_cond_exec -ffffffff820b6ef0 t sdma_v6_0_ring_emit_wreg -ffffffff820b7050 t sdma_v6_0_ring_emit_reg_wait -ffffffff820b72f0 t sdma_v6_0_ring_emit_reg_write_reg_wait -ffffffff820b7380 t sdma_v6_0_ring_preempt_ib -ffffffff820b7510 t sdma_v6_0_ring_emit_mem_sync -ffffffff820b7740 t sdma_v6_0_emit_copy_buffer -ffffffff820b7800 t sdma_v6_0_emit_fill_buffer -ffffffff820b7890 t sdma_v6_0_vm_copy_pte -ffffffff820b7950 t sdma_v6_0_vm_write_pte -ffffffff820b7a20 t sdma_v6_0_vm_set_pte_pde -ffffffff820b7b20 t sdma_v6_0_set_trap_irq_state -ffffffff820b7bc0 t sdma_v6_0_process_trap_irq -ffffffff820b7d20 t sdma_v6_0_process_illegal_inst_irq -ffffffff820b7d50 t sdma_v6_0_mqd_init -ffffffff820b7e80 t sdma_v6_0_start -ffffffff820b81e0 t sdma_v6_0_enable -ffffffff820b8380 t sdma_v6_0_gfx_resume -ffffffff820b95c0 t sdma_v6_0_gfx_stop -ffffffff820ba000 T sienna_cichlid_reset_init -ffffffff820ba0e0 t sienna_cichlid_async_reset -ffffffff820ba140 t sienna_cichlid_get_reset_handler -ffffffff820ba1d0 T sienna_cichlid_reset_fini -ffffffff820ba230 t sienna_cichlid_mode2_prepare_hwcontext -ffffffff820ba3a0 t sienna_cichlid_mode2_perform_reset -ffffffff820ba430 t sienna_cichlid_mode2_restore_hwcontext -ffffffff820ba7a0 t sienna_cichlid_mode2_reset -ffffffff820bb000 T smu_v11_0_i2c_control_init -ffffffff820bb0e0 T smu_v11_0_i2c_control_fini -ffffffff820bb120 t smu_v11_0_i2c_xfer -ffffffff820bc490 t smu_v11_0_i2c_func -ffffffff820bc4c0 t smu_v11_0_i2c_enable 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smuio_v13_0_get_rom_index_offset -ffffffff820c0040 t smuio_v13_0_get_rom_data_offset -ffffffff820c0080 t smuio_v13_0_update_rom_clock_gating -ffffffff820c01e0 t smuio_v13_0_get_clock_gating_state -ffffffff820c0290 t smuio_v13_0_get_die_id -ffffffff820c0320 t smuio_v13_0_get_socket_id -ffffffff820c03c0 t smuio_v13_0_is_host_gpu_xgmi_supported -ffffffff820c1000 t smuio_v13_0_3_get_die_id -ffffffff820c10a0 t smuio_v13_0_3_get_socket_id -ffffffff820c1140 t smuio_v13_0_3_get_pkg_type -ffffffff820c2000 t smuio_v13_0_6_get_rom_index_offset -ffffffff820c2040 t smuio_v13_0_6_get_rom_data_offset -ffffffff820c3000 t smuio_v9_0_get_rom_index_offset -ffffffff820c3040 t smuio_v9_0_get_rom_data_offset -ffffffff820c3080 t smuio_v9_0_update_rom_clock_gating -ffffffff820c31e0 t smuio_v9_0_get_clock_gating_state -ffffffff820c4000 T soc15_grbm_select -ffffffff820c4090 T soc15_program_register_sequence -ffffffff820c42b0 T soc15_set_virt_ops -ffffffff820c4320 t soc15_common_early_init -ffffffff820c4750 t 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t umc_v6_7_query_ras_poison_mode -ffffffff820cc460 t umc_v6_7_ecc_info_query_ras_error_count -ffffffff820cc480 t umc_v6_7_ecc_info_query_ras_error_address -ffffffff820cc4a0 t umc_v6_7_query_ecc_error_count -ffffffff820cc7a0 t umc_v6_7_reset_error_count_per_channel -ffffffff820cc8e0 t umc_v6_7_query_error_address -ffffffff820cca10 t umc_v6_7_ecc_info_querry_ecc_error_count -ffffffff820ccc20 t umc_v6_7_ecc_info_query_error_address -ffffffff820cd000 t umc_v8_10_query_ras_error_count -ffffffff820cd040 t umc_v8_10_query_ras_error_address -ffffffff820cd060 t umc_v8_10_err_cnt_init -ffffffff820cd080 t umc_v8_10_query_ras_poison_mode -ffffffff820cd0b0 t umc_v8_10_ecc_info_query_ras_error_count -ffffffff820cd0d0 t umc_v8_10_ecc_info_query_ras_error_address -ffffffff820cd0f0 t umc_v8_10_set_eeprom_table_version -ffffffff820cd120 t umc_v8_10_query_ecc_error_count -ffffffff820cd200 t umc_v8_10_clear_error_count_per_channel -ffffffff820cd270 t umc_v8_10_query_error_address -ffffffff820cd3b0 t umc_v8_10_convert_error_address -ffffffff820cd5e0 t umc_v8_10_err_cnt_init_per_channel -ffffffff820cd6b0 t umc_v8_10_ecc_info_query_ecc_error_count -ffffffff820cd7a0 t umc_v8_10_ecc_info_query_error_address -ffffffff820ce000 t umc_v8_7_query_ras_error_count -ffffffff820ce370 t umc_v8_7_query_ras_error_address -ffffffff820ce540 t umc_v8_7_err_cnt_init -ffffffff820ce6d0 t umc_v8_7_ecc_info_query_ras_error_count -ffffffff820ce800 t umc_v8_7_ecc_info_query_ras_error_address -ffffffff820cf000 t uvd_v5_0_early_init -ffffffff820cf050 t uvd_v5_0_sw_init -ffffffff820cf170 t uvd_v5_0_sw_fini -ffffffff820cf1d0 t uvd_v5_0_hw_init -ffffffff820cf780 t uvd_v5_0_hw_fini -ffffffff820cf810 t uvd_v5_0_suspend -ffffffff820cf950 t uvd_v5_0_resume -ffffffff820cf9b0 t uvd_v5_0_is_idle -ffffffff820cfa00 t uvd_v5_0_wait_for_idle -ffffffff820cfa90 t uvd_v5_0_soft_reset -ffffffff820cfb80 t uvd_v5_0_set_clockgating_state -ffffffff820cfd80 t uvd_v5_0_set_powergating_state -ffffffff820cfdd0 t uvd_v5_0_get_clockgating_state -ffffffff820cfe70 t uvd_v5_0_ring_get_rptr -ffffffff820cfec0 t uvd_v5_0_ring_get_wptr -ffffffff820cff10 t uvd_v5_0_ring_set_wptr -ffffffff820cff40 t uvd_v5_0_ring_emit_ib -ffffffff820d01e0 t uvd_v5_0_ring_emit_fence -ffffffff820d0800 t uvd_v5_0_ring_test_ring -ffffffff820d09d0 t uvd_v5_0_ring_insert_nop -ffffffff820d0b30 t uvd_v5_0_set_interrupt_state -ffffffff820d0b60 t uvd_v5_0_process_interrupt -ffffffff820d0bd0 t uvd_v5_0_stop -ffffffff820d0d50 t uvd_v5_0_start -ffffffff820d2000 t uvd_v6_0_early_init -ffffffff820d2190 t uvd_v6_0_sw_init -ffffffff820d2450 t uvd_v6_0_sw_fini -ffffffff820d2520 t uvd_v6_0_hw_init -ffffffff820d2b90 t uvd_v6_0_hw_fini -ffffffff820d2c20 t uvd_v6_0_suspend -ffffffff820d2d60 t uvd_v6_0_resume -ffffffff820d2dc0 t uvd_v6_0_is_idle -ffffffff820d2e10 t uvd_v6_0_wait_for_idle -ffffffff820d2ea0 t uvd_v6_0_check_soft_reset -ffffffff820d2f30 t uvd_v6_0_pre_soft_reset -ffffffff820d2f80 t uvd_v6_0_soft_reset -ffffffff820d3080 t uvd_v6_0_post_soft_reset -ffffffff820d3150 t uvd_v6_0_set_clockgating_state -ffffffff820d3340 t uvd_v6_0_set_powergating_state -ffffffff820d33c0 t uvd_v6_0_get_clockgating_state -ffffffff820d3470 t uvd_v6_0_ring_get_rptr -ffffffff820d34c0 t uvd_v6_0_ring_get_wptr -ffffffff820d3510 t uvd_v6_0_ring_set_wptr -ffffffff820d3540 t uvd_v6_0_ring_emit_ib -ffffffff820d38e0 t uvd_v6_0_ring_emit_fence -ffffffff820d3f00 t uvd_v6_0_ring_emit_pipeline_sync -ffffffff820d4340 t uvd_v6_0_ring_emit_vm_flush -ffffffff820d46e0 t uvd_v6_0_ring_emit_hdp_flush -ffffffff820d4710 t uvd_v6_0_ring_test_ring -ffffffff820d48e0 t uvd_v6_0_ring_insert_nop -ffffffff820d4a40 t uvd_v6_0_ring_emit_wreg -ffffffff820d4cf0 t uvd_v6_0_enc_ring_get_rptr -ffffffff820d4d50 t uvd_v6_0_enc_ring_get_wptr -ffffffff820d4db0 t uvd_v6_0_enc_ring_set_wptr -ffffffff820d4df0 t uvd_v6_0_enc_ring_emit_ib -ffffffff820d5060 t uvd_v6_0_enc_ring_emit_fence -ffffffff820d52c0 t uvd_v6_0_enc_ring_emit_pipeline_sync -ffffffff820d5490 t uvd_v6_0_enc_ring_emit_vm_flush -ffffffff820d56c0 t uvd_v6_0_enc_ring_test_ring -ffffffff820d5830 t uvd_v6_0_enc_ring_test_ib -ffffffff820d5d90 t uvd_v6_0_enc_ring_insert_end -ffffffff820d5e20 t uvd_v6_0_set_interrupt_state -ffffffff820d5e50 t uvd_v6_0_process_interrupt -ffffffff820d5f50 t uvd_v6_0_stop -ffffffff820d60d0 t uvd_v6_0_start -ffffffff820d7000 t uvd_v7_0_early_init -ffffffff820d7290 t uvd_v7_0_sw_init -ffffffff820d7720 t uvd_v7_0_sw_fini -ffffffff820d7830 t uvd_v7_0_hw_init -ffffffff820dad00 t uvd_v7_0_hw_fini -ffffffff820db0b0 t uvd_v7_0_suspend -ffffffff820db190 t uvd_v7_0_resume -ffffffff820db1f0 t uvd_v7_0_set_clockgating_state -ffffffff820db220 t uvd_v7_0_ring_get_rptr -ffffffff820db2c0 t uvd_v7_0_ring_get_wptr -ffffffff820db360 t uvd_v7_0_ring_set_wptr -ffffffff820db3e0 t uvd_v7_0_ring_patch_cs_in_place -ffffffff820db450 t uvd_v7_0_ring_emit_ib -ffffffff820db840 t uvd_v7_0_ring_emit_fence -ffffffff820dbf00 t uvd_v7_0_ring_emit_vm_flush -ffffffff820dbf70 t uvd_v7_0_ring_emit_hdp_flush -ffffffff820dbfa0 t uvd_v7_0_ring_test_ring -ffffffff820dc270 t uvd_v7_0_ring_insert_nop -ffffffff820dc410 t uvd_v7_0_ring_emit_wreg -ffffffff820dc700 t uvd_v7_0_ring_emit_reg_wait -ffffffff820dcae0 t uvd_v7_0_enc_ring_get_rptr -ffffffff820dcbe0 t uvd_v7_0_enc_ring_get_wptr -ffffffff820dccf0 t uvd_v7_0_enc_ring_set_wptr -ffffffff820dcdf0 t uvd_v7_0_enc_ring_emit_ib -ffffffff820dd060 t uvd_v7_0_enc_ring_emit_fence -ffffffff820dd2c0 t uvd_v7_0_enc_ring_emit_vm_flush -ffffffff820dd330 t uvd_v7_0_enc_ring_test_ring -ffffffff820dd4b0 t uvd_v7_0_enc_ring_test_ib -ffffffff820dda10 t uvd_v7_0_enc_ring_insert_end -ffffffff820ddaa0 t uvd_v7_0_enc_ring_emit_wreg -ffffffff820ddc00 t uvd_v7_0_enc_ring_emit_reg_wait -ffffffff820dddd0 t uvd_v7_0_set_interrupt_state -ffffffff820dde00 t uvd_v7_0_process_interrupt -ffffffff820de000 t vce_v3_0_early_init -ffffffff820de1a0 t vce_v3_0_sw_init -ffffffff820de340 t vce_v3_0_sw_fini -ffffffff820de3a0 t vce_v3_0_hw_init -ffffffff820de4a0 t vce_v3_0_hw_fini -ffffffff820de5a0 t vce_v3_0_suspend -ffffffff820de6b0 t vce_v3_0_resume -ffffffff820de7d0 t vce_v3_0_is_idle -ffffffff820de840 t vce_v3_0_wait_for_idle -ffffffff820de900 t vce_v3_0_check_soft_reset -ffffffff820dea30 t vce_v3_0_pre_soft_reset -ffffffff820deb00 t vce_v3_0_soft_reset -ffffffff820dec00 t vce_v3_0_post_soft_reset -ffffffff820decd0 t vce_v3_0_set_clockgating_state -ffffffff820df0b0 t vce_v3_0_set_powergating_state -ffffffff820dfc00 t vce_v3_0_get_clockgating_state -ffffffff820dfcf0 t vce_v3_0_ring_get_rptr -ffffffff820dfde0 t vce_v3_0_ring_get_wptr -ffffffff820dfed0 t vce_v3_0_ring_set_wptr -ffffffff820dffa0 t vce_v3_0_ring_emit_ib -ffffffff820e0210 t vce_v3_0_emit_pipeline_sync -ffffffff820e03e0 t vce_v3_0_emit_vm_flush -ffffffff820e0680 t vce_v3_0_set_interrupt_state -ffffffff820e0700 t vce_v3_0_process_interrupt -ffffffff820e07e0 t vce_v3_0_stop -ffffffff820e1000 t vce_v4_0_early_init -ffffffff820e10c0 t vce_v4_0_sw_init -ffffffff820e13d0 t vce_v4_0_sw_fini -ffffffff820e1470 t vce_v4_0_hw_init -ffffffff820e1cc0 t vce_v4_0_hw_fini -ffffffff820e1e30 t vce_v4_0_suspend -ffffffff820e1fa0 t vce_v4_0_resume -ffffffff820e2070 t vce_v4_0_set_clockgating_state -ffffffff820e20a0 t vce_v4_0_set_powergating_state -ffffffff820e21b0 t vce_v4_0_ring_get_rptr -ffffffff820e2220 t vce_v4_0_ring_get_wptr -ffffffff820e22b0 t vce_v4_0_ring_set_wptr -ffffffff820e2340 t vce_v4_0_ring_emit_ib -ffffffff820e25b0 t vce_v4_0_ring_emit_fence -ffffffff820e2810 t vce_v4_0_emit_vm_flush -ffffffff820e2880 t vce_v4_0_ring_insert_end -ffffffff820e2910 t vce_v4_0_emit_wreg -ffffffff820e2a70 t vce_v4_0_emit_reg_wait -ffffffff820e2c40 t vce_v4_0_set_interrupt_state -ffffffff820e2cd0 t vce_v4_0_process_interrupt -ffffffff820e2d80 t vce_v4_0_start -ffffffff820e4000 T vcn_dec_sw_ring_emit_fence -ffffffff820e4260 T vcn_dec_sw_ring_insert_end -ffffffff820e42f0 T vcn_dec_sw_ring_emit_ib -ffffffff820e4560 T vcn_dec_sw_ring_emit_reg_wait -ffffffff820e4730 T vcn_dec_sw_ring_emit_vm_flush -ffffffff820e47a0 T vcn_dec_sw_ring_emit_wreg -ffffffff820e5000 T vcn_v1_0_set_pg_for_begin_use -ffffffff820e5160 T vcn_v1_0_ring_end_use -ffffffff820e51d0 t vcn_v1_0_early_init -ffffffff820e5340 t vcn_v1_0_sw_init -ffffffff820e5640 t vcn_v1_0_sw_fini -ffffffff820e56b0 t vcn_v1_0_hw_init -ffffffff820e57b0 t vcn_v1_0_hw_fini -ffffffff820e58d0 t vcn_v1_0_suspend -ffffffff820e5960 t vcn_v1_0_resume -ffffffff820e5a80 t vcn_v1_0_is_idle -ffffffff820e5b20 t vcn_v1_0_wait_for_idle -ffffffff820e5b60 t vcn_v1_0_set_clockgating_state -ffffffff820e5c30 t vcn_v1_0_set_powergating_state -ffffffff820e62a0 t vcn_v1_0_dec_ring_get_rptr -ffffffff820e6330 t vcn_v1_0_dec_ring_get_wptr -ffffffff820e63c0 t vcn_v1_0_dec_ring_set_wptr -ffffffff820e64e0 t vcn_v1_0_ring_patch_cs_in_place -ffffffff820e66d0 t vcn_v1_0_dec_ring_emit_ib -ffffffff820e6aa0 t vcn_v1_0_dec_ring_emit_fence -ffffffff820e7130 t vcn_v1_0_dec_ring_emit_vm_flush -ffffffff820e71a0 t vcn_v1_0_dec_ring_insert_nop -ffffffff820e7340 t vcn_v1_0_dec_ring_insert_start -ffffffff820e7530 t vcn_v1_0_dec_ring_insert_end -ffffffff820e7640 t vcn_v1_0_ring_begin_use -ffffffff820e7700 t vcn_v1_0_dec_ring_emit_wreg -ffffffff820e79e0 t vcn_v1_0_dec_ring_emit_reg_wait -ffffffff820e7da0 t vcn_v1_0_enc_ring_get_rptr -ffffffff820e7e80 t vcn_v1_0_enc_ring_get_wptr -ffffffff820e7f60 t vcn_v1_0_enc_ring_set_wptr -ffffffff820e8020 t vcn_v1_0_enc_ring_emit_ib -ffffffff820e8290 t vcn_v1_0_enc_ring_emit_fence -ffffffff820e84f0 t vcn_v1_0_enc_ring_emit_vm_flush -ffffffff820e8560 t vcn_v1_0_enc_ring_insert_end -ffffffff820e85f0 t vcn_v1_0_enc_ring_emit_wreg -ffffffff820e8750 t vcn_v1_0_enc_ring_emit_reg_wait -ffffffff820e8920 t vcn_v1_0_set_interrupt_state -ffffffff820e8950 t vcn_v1_0_process_interrupt -ffffffff820e8a10 t vcn_v1_0_idle_work_handler -ffffffff820e8bc0 t vcn_v1_0_pause_dpg_mode -ffffffff820e9c90 t vcn_v1_0_enable_clock_gating -ffffffff820ea130 t vcn_v1_0_disable_clock_gating -ffffffff820ea790 t vcn_1_0_enable_static_power_gating -ffffffff820ea960 t vcn_v1_0_start_dpg_mode -ffffffff820ef190 t vcn_v1_0_start_spg_mode -ffffffff820f19f0 t vcn_v1_0_clock_gating_dpg_mode -ffffffff820f3000 T vcn_v2_0_dec_ring_insert_start -ffffffff820f31d0 T vcn_v2_0_dec_ring_insert_end -ffffffff820f32d0 T vcn_v2_0_dec_ring_insert_nop -ffffffff820f3450 T vcn_v2_0_dec_ring_emit_fence -ffffffff820f3a80 T vcn_v2_0_dec_ring_emit_ib -ffffffff820f3e20 T vcn_v2_0_dec_ring_emit_reg_wait -ffffffff820f41b0 T vcn_v2_0_dec_ring_emit_vm_flush -ffffffff820f4220 T vcn_v2_0_dec_ring_emit_wreg -ffffffff820f44d0 T vcn_v2_0_enc_ring_emit_fence -ffffffff820f4730 T vcn_v2_0_enc_ring_insert_end -ffffffff820f47c0 T vcn_v2_0_enc_ring_emit_ib -ffffffff820f4a30 T vcn_v2_0_enc_ring_emit_reg_wait -ffffffff820f4c00 T vcn_v2_0_enc_ring_emit_vm_flush -ffffffff820f4c70 T vcn_v2_0_enc_ring_emit_wreg -ffffffff820f4dd0 T vcn_v2_0_dec_ring_test_ring -ffffffff820f50b0 t vcn_v2_0_early_init -ffffffff820f5220 t vcn_v2_0_sw_init -ffffffff820f55c0 t vcn_v2_0_sw_fini -ffffffff820f5670 t vcn_v2_0_hw_init -ffffffff820f60b0 t vcn_v2_0_hw_fini -ffffffff820f61d0 t vcn_v2_0_suspend -ffffffff820f6200 t vcn_v2_0_resume -ffffffff820f6260 t vcn_v2_0_is_idle -ffffffff820f6300 t vcn_v2_0_wait_for_idle -ffffffff820f6340 t vcn_v2_0_set_clockgating_state -ffffffff820f63f0 t vcn_v2_0_set_powergating_state -ffffffff820f6ab0 t vcn_v2_0_dec_ring_get_rptr -ffffffff820f6b40 t vcn_v2_0_dec_ring_get_wptr -ffffffff820f6bf0 t vcn_v2_0_dec_ring_set_wptr -ffffffff820f6d30 t vcn_v2_0_enc_ring_get_rptr -ffffffff820f6e10 t vcn_v2_0_enc_ring_get_wptr -ffffffff820f6f10 t vcn_v2_0_enc_ring_set_wptr -ffffffff820f7000 t vcn_v2_0_set_interrupt_state -ffffffff820f7030 t vcn_v2_0_process_interrupt -ffffffff820f70f0 t vcn_v2_0_pause_dpg_mode -ffffffff820f79c0 t vcn_v2_0_enable_clock_gating -ffffffff820f7c80 t vcn_v2_0_disable_clock_gating -ffffffff820f8110 t vcn_v2_0_start -ffffffff820fd0e0 t vcn_v2_0_enable_static_power_gating -ffffffff820fd260 t vcn_v2_0_clock_gating_dpg_mode -ffffffff820fe140 t vcn_v2_0_mc_resume_dpg_mode -ffffffff82103000 t vcn_v2_6_query_poison_status -ffffffff821030e0 t vcn_v2_5_early_init -ffffffff821033e0 t vcn_v2_5_sw_init -ffffffff82103930 t vcn_v2_5_sw_fini -ffffffff82103a20 t vcn_v2_5_hw_init -ffffffff82104530 t vcn_v2_5_hw_fini -ffffffff821046e0 t vcn_v2_5_suspend -ffffffff82104710 t vcn_v2_5_resume -ffffffff82104770 t vcn_v2_5_is_idle -ffffffff82104870 t vcn_v2_5_wait_for_idle -ffffffff82104920 t vcn_v2_5_set_clockgating_state -ffffffff821049b0 t vcn_v2_5_set_powergating_state -ffffffff821071b0 t vcn_v2_5_dec_ring_get_rptr -ffffffff82107250 t vcn_v2_5_dec_ring_get_wptr -ffffffff82107310 t vcn_v2_5_dec_ring_set_wptr -ffffffff821073c0 t vcn_v2_5_enc_ring_get_rptr -ffffffff821074c0 t vcn_v2_5_enc_ring_get_wptr -ffffffff821075d0 t vcn_v2_5_enc_ring_set_wptr -ffffffff821076e0 t vcn_v2_5_set_interrupt_state -ffffffff82107710 t vcn_v2_5_process_interrupt -ffffffff82107830 t vcn_v2_6_set_ras_interrupt_state -ffffffff82107860 t vcn_v2_5_pause_dpg_mode -ffffffff821080a0 t vcn_v2_5_enable_clock_gating -ffffffff82108400 t vcn_v2_5_disable_clock_gating -ffffffff82108970 t vcn_v2_5_start_dpg_mode -ffffffff8210c910 t vcn_v2_5_clock_gating_dpg_mode -ffffffff8210d820 t vcn_v2_5_mc_resume_dpg_mode -ffffffff82113000 t vcn_v3_0_early_init -ffffffff82113230 t vcn_v3_0_sw_init -ffffffff82113750 t vcn_v3_0_sw_fini -ffffffff82113850 t vcn_v3_0_hw_init -ffffffff82114470 t vcn_v3_0_hw_fini -ffffffff82114590 t vcn_v3_0_suspend -ffffffff821145c0 t vcn_v3_0_resume -ffffffff82114620 t vcn_v3_0_is_idle -ffffffff82114720 t vcn_v3_0_wait_for_idle -ffffffff821147d0 t vcn_v3_0_set_clockgating_state -ffffffff821148f0 t vcn_v3_0_set_powergating_state -ffffffff821174e0 t vcn_v3_0_dec_ring_get_rptr -ffffffff82117580 t vcn_v3_0_dec_ring_get_wptr -ffffffff82117640 t vcn_v3_0_dec_ring_set_wptr -ffffffff821177b0 t vcn_v3_0_ring_patch_cs_in_place -ffffffff82117b30 t vcn_v3_0_enc_ring_get_rptr -ffffffff82117c30 t vcn_v3_0_enc_ring_get_wptr -ffffffff82117d40 t vcn_v3_0_enc_ring_set_wptr -ffffffff82117e50 t vcn_v3_0_set_interrupt_state -ffffffff82117e80 t vcn_v3_0_process_interrupt -ffffffff82117fa0 t vcn_v3_0_pause_dpg_mode -ffffffff821188c0 t vcn_v3_0_enable_clock_gating -ffffffff82118b90 t vcn_v3_0_disable_clock_gating -ffffffff82119150 t vcn_v3_0_start_dpg_mode -ffffffff8211c960 t vcn_v3_0_clock_gating_dpg_mode -ffffffff8211d8a0 t vcn_v3_0_mc_resume_dpg_mode -ffffffff82123000 t vcn_v4_0_query_ras_poison_status -ffffffff821230e0 t vcn_v4_0_early_init -ffffffff821232b0 t vcn_v4_0_sw_init -ffffffff821235b0 t vcn_v4_0_sw_fini -ffffffff821236b0 t vcn_v4_0_hw_init -ffffffff821241a0 t vcn_v4_0_hw_fini -ffffffff82124310 t vcn_v4_0_suspend -ffffffff82124340 t vcn_v4_0_resume -ffffffff821243a0 t vcn_v4_0_is_idle -ffffffff821244b0 t vcn_v4_0_wait_for_idle -ffffffff82124570 t vcn_v4_0_set_clockgating_state -ffffffff821246a0 t vcn_v4_0_set_powergating_state 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Xrecurse_ioapic_level9 +ffffffff816951f0 T Xresume_ioapic_level9 +ffffffff81695220 T Xintr_ioapic_level9_untramp +ffffffff81695530 T Xrecurse_ioapic_level10 +ffffffff816955b0 T Xresume_ioapic_level10 +ffffffff816955e0 T Xintr_ioapic_level10_untramp +ffffffff816958f0 T Xrecurse_ioapic_level11 +ffffffff81695970 T Xresume_ioapic_level11 +ffffffff816959a0 T Xintr_ioapic_level11_untramp +ffffffff81695cb0 T Xrecurse_ioapic_level12 +ffffffff81695d30 T Xresume_ioapic_level12 +ffffffff81695d60 T Xintr_ioapic_level12_untramp +ffffffff81696070 T Xrecurse_ioapic_level13 +ffffffff816960f0 T Xresume_ioapic_level13 +ffffffff81696120 T Xintr_ioapic_level13_untramp +ffffffff81696430 T Xrecurse_ioapic_level14 +ffffffff816964b0 T Xresume_ioapic_level14 +ffffffff816964e0 T Xintr_ioapic_level14_untramp +ffffffff816967f0 T Xrecurse_ioapic_level15 +ffffffff81696870 T Xresume_ioapic_level15 +ffffffff816968a0 T Xintr_ioapic_level15_untramp +ffffffff81696bb0 T Xrecurse_ioapic_level16 +ffffffff81696c30 T Xresume_ioapic_level16 +ffffffff81696c60 T Xintr_ioapic_level16_untramp +ffffffff81696f70 T Xrecurse_ioapic_level17 +ffffffff81696ff0 T Xresume_ioapic_level17 +ffffffff81697020 T Xintr_ioapic_level17_untramp +ffffffff81697330 T Xrecurse_ioapic_level18 +ffffffff816973b0 T Xresume_ioapic_level18 +ffffffff816973e0 T Xintr_ioapic_level18_untramp +ffffffff816976f0 T Xrecurse_ioapic_level19 +ffffffff81697770 T Xresume_ioapic_level19 +ffffffff816977a0 T Xintr_ioapic_level19_untramp +ffffffff81697ab0 T Xrecurse_ioapic_level20 +ffffffff81697b30 T Xresume_ioapic_level20 +ffffffff81697b60 T Xintr_ioapic_level20_untramp +ffffffff81697e70 T Xrecurse_ioapic_level21 +ffffffff81697ef0 T Xresume_ioapic_level21 +ffffffff81697f20 T Xintr_ioapic_level21_untramp +ffffffff81698230 T Xrecurse_ioapic_level22 +ffffffff816982b0 T Xresume_ioapic_level22 +ffffffff816982e0 T Xintr_ioapic_level22_untramp +ffffffff816985f0 T Xrecurse_ioapic_level23 +ffffffff81698670 T Xresume_ioapic_level23 +ffffffff816986a0 T Xintr_ioapic_level23_untramp +ffffffff816989b0 T Xrecurse_ioapic_level24 +ffffffff81698a30 T Xresume_ioapic_level24 +ffffffff81698a60 T Xintr_ioapic_level24_untramp +ffffffff81698d70 T Xrecurse_ioapic_level25 +ffffffff81698df0 T Xresume_ioapic_level25 +ffffffff81698e20 T Xintr_ioapic_level25_untramp +ffffffff81699130 T Xrecurse_ioapic_level26 +ffffffff816991b0 T Xresume_ioapic_level26 +ffffffff816991e0 T Xintr_ioapic_level26_untramp +ffffffff816994f0 T Xrecurse_ioapic_level27 +ffffffff81699570 T Xresume_ioapic_level27 +ffffffff816995a0 T Xintr_ioapic_level27_untramp +ffffffff816998b0 T Xrecurse_ioapic_level28 +ffffffff81699930 T Xresume_ioapic_level28 +ffffffff81699960 T Xintr_ioapic_level28_untramp +ffffffff81699c70 T Xrecurse_ioapic_level29 +ffffffff81699cf0 T Xresume_ioapic_level29 +ffffffff81699d20 T Xintr_ioapic_level29_untramp +ffffffff8169a030 T Xrecurse_ioapic_level30 +ffffffff8169a0b0 T Xresume_ioapic_level30 +ffffffff8169a0e0 T Xintr_ioapic_level30_untramp +ffffffff8169a3f0 T Xrecurse_ioapic_level31 +ffffffff8169a470 T Xresume_ioapic_level31 +ffffffff8169a4a0 T Xintr_ioapic_level31_untramp +ffffffff8169a7c0 T Xrecurse_ioapic_level32 +ffffffff8169a840 T Xresume_ioapic_level32 +ffffffff8169a870 T Xintr_ioapic_level32_untramp +ffffffff8169ab90 T Xrecurse_ioapic_level33 +ffffffff8169ac10 T Xresume_ioapic_level33 +ffffffff8169ac40 T Xintr_ioapic_level33_untramp +ffffffff8169af60 T Xrecurse_ioapic_level34 +ffffffff8169afe0 T Xresume_ioapic_level34 +ffffffff8169b010 T Xintr_ioapic_level34_untramp +ffffffff8169b330 T Xrecurse_ioapic_level35 +ffffffff8169b3b0 T Xresume_ioapic_level35 +ffffffff8169b3e0 T Xintr_ioapic_level35_untramp +ffffffff8169b700 T Xrecurse_ioapic_level36 +ffffffff8169b780 T Xresume_ioapic_level36 +ffffffff8169b7b0 T Xintr_ioapic_level36_untramp +ffffffff8169bad0 T Xrecurse_ioapic_level37 +ffffffff8169bb50 T Xresume_ioapic_level37 +ffffffff8169bb80 T Xintr_ioapic_level37_untramp +ffffffff8169bea0 T Xrecurse_ioapic_level38 +ffffffff8169bf20 T Xresume_ioapic_level38 +ffffffff8169bf50 T Xintr_ioapic_level38_untramp +ffffffff8169c270 T Xrecurse_ioapic_level39 +ffffffff8169c2f0 T Xresume_ioapic_level39 +ffffffff8169c320 T Xintr_ioapic_level39_untramp +ffffffff8169c640 T Xrecurse_ioapic_level40 +ffffffff8169c6c0 T Xresume_ioapic_level40 +ffffffff8169c6f0 T Xintr_ioapic_level40_untramp +ffffffff8169ca10 T Xrecurse_ioapic_level41 +ffffffff8169ca90 T Xresume_ioapic_level41 +ffffffff8169cac0 T Xintr_ioapic_level41_untramp +ffffffff8169cde0 T Xrecurse_ioapic_level42 +ffffffff8169ce60 T Xresume_ioapic_level42 +ffffffff8169ce90 T Xintr_ioapic_level42_untramp +ffffffff8169d1b0 T Xrecurse_ioapic_level43 +ffffffff8169d230 T Xresume_ioapic_level43 +ffffffff8169d260 T Xintr_ioapic_level43_untramp +ffffffff8169d580 T Xrecurse_ioapic_level44 +ffffffff8169d600 T Xresume_ioapic_level44 +ffffffff8169d630 T Xintr_ioapic_level44_untramp +ffffffff8169d950 T Xrecurse_ioapic_level45 +ffffffff8169d9d0 T Xresume_ioapic_level45 +ffffffff8169da00 T Xintr_ioapic_level45_untramp +ffffffff8169dd20 T Xrecurse_ioapic_level46 +ffffffff8169dda0 T Xresume_ioapic_level46 +ffffffff8169ddd0 T Xintr_ioapic_level46_untramp +ffffffff8169e0f0 T Xrecurse_ioapic_level47 +ffffffff8169e170 T Xresume_ioapic_level47 +ffffffff8169e1a0 T Xintr_ioapic_level47_untramp +ffffffff8169e4c0 T Xrecurse_ioapic_level48 +ffffffff8169e540 T Xresume_ioapic_level48 +ffffffff8169e570 T Xintr_ioapic_level48_untramp +ffffffff8169e890 T Xrecurse_ioapic_level49 +ffffffff8169e910 T Xresume_ioapic_level49 +ffffffff8169e940 T Xintr_ioapic_level49_untramp +ffffffff8169ec60 T Xrecurse_ioapic_level50 +ffffffff8169ece0 T Xresume_ioapic_level50 +ffffffff8169ed10 T Xintr_ioapic_level50_untramp +ffffffff8169f030 T Xrecurse_ioapic_level51 +ffffffff8169f0b0 T Xresume_ioapic_level51 +ffffffff8169f0e0 T Xintr_ioapic_level51_untramp +ffffffff8169f400 T Xrecurse_ioapic_level52 +ffffffff8169f480 T Xresume_ioapic_level52 +ffffffff8169f4b0 T Xintr_ioapic_level52_untramp +ffffffff8169f7d0 T Xrecurse_ioapic_level53 +ffffffff8169f850 T Xresume_ioapic_level53 +ffffffff8169f880 T Xintr_ioapic_level53_untramp +ffffffff8169fba0 T Xrecurse_ioapic_level54 +ffffffff8169fc20 T Xresume_ioapic_level54 +ffffffff8169fc50 T Xintr_ioapic_level54_untramp +ffffffff8169ff70 T Xrecurse_ioapic_level55 +ffffffff8169fff0 T Xresume_ioapic_level55 +ffffffff816a0020 T Xintr_ioapic_level55_untramp +ffffffff816a0340 T Xrecurse_ioapic_level56 +ffffffff816a03c0 T Xresume_ioapic_level56 +ffffffff816a03f0 T Xintr_ioapic_level56_untramp +ffffffff816a0710 T Xrecurse_ioapic_level57 +ffffffff816a0790 T Xresume_ioapic_level57 +ffffffff816a07c0 T Xintr_ioapic_level57_untramp +ffffffff816a0ae0 T Xrecurse_ioapic_level58 +ffffffff816a0b60 T Xresume_ioapic_level58 +ffffffff816a0b90 T Xintr_ioapic_level58_untramp +ffffffff816a0eb0 T Xrecurse_ioapic_level59 +ffffffff816a0f30 T Xresume_ioapic_level59 +ffffffff816a0f60 T Xintr_ioapic_level59_untramp +ffffffff816a1280 T Xrecurse_ioapic_level60 +ffffffff816a1300 T Xresume_ioapic_level60 +ffffffff816a1330 T Xintr_ioapic_level60_untramp +ffffffff816a1650 T Xrecurse_ioapic_level61 +ffffffff816a16d0 T Xresume_ioapic_level61 +ffffffff816a1700 T Xintr_ioapic_level61_untramp +ffffffff816a1a20 T Xrecurse_ioapic_level62 +ffffffff816a1aa0 T Xresume_ioapic_level62 +ffffffff816a1ad0 T Xintr_ioapic_level62_untramp +ffffffff816a1df0 T Xrecurse_ioapic_level63 +ffffffff816a1e70 T Xresume_ioapic_level63 +ffffffff816a1ea0 T Xintr_ioapic_level63_untramp +ffffffff816a21c0 T retpoline_r13 +ffffffff816a21e0 T Xsofttty +ffffffff816a2220 T Xsoftnet +ffffffff816a2260 T Xsoftclock +ffffffff816a3000 T kcopy +ffffffff816a30d0 T copyout +ffffffff816a3160 T _copyin +ffffffff816a3200 T copy_fault +ffffffff816a3230 T copyoutstr +ffffffff816a32c0 T _copyinstr +ffffffff816a3340 T copystr_fault +ffffffff816a3349 t copystr_return +ffffffff816a4000 T Xspllower +ffffffff816a4080 T Xdoreti +ffffffff816a5000 T mds_handler_ivb +ffffffff816a5070 T mds_handler_bdw +ffffffff816a50e0 T mds_handler_skl +ffffffff816a5100 T mds_handler_skl_sse +ffffffff816a5180 T mds_handler_skl_avx +ffffffff816a5200 T mds_handler_skl_avx512 +ffffffff816a5280 T mds_handler_silvermont +ffffffff816a52e0 T mds_handler_knights +ffffffff816a6000 T intr_default_setup +ffffffff816a6090 T x86_nmi +ffffffff816a60f0 T intr_calculatemasks +ffffffff816a6490 T intr_allocate_slot_cpu +ffffffff816a6640 T intr_allocate_slot +ffffffff816a6960 T intr_establish +ffffffff816a6e50 T intr_disestablish +ffffffff816a6fd0 T intr_handler +ffffffff816a70b0 T cpu_intr_init +ffffffff816a7340 T intr_printconfig +ffffffff816a7370 T intr_barrier +ffffffff816a7390 T intr_enable_wakeup +ffffffff816a7430 T intr_disable_wakeup +ffffffff816a7510 T splraise +ffffffff816a7580 T spllower +ffffffff816a75f0 T softintr +ffffffff816a8000 T x86_bus_space_io_read_1 +ffffffff816a8030 T x86_bus_space_io_read_2 +ffffffff816a8060 T x86_bus_space_io_read_4 +ffffffff816a8090 T x86_bus_space_io_read_8 +ffffffff816a80b0 T x86_bus_space_io_read_multi_1 +ffffffff816a80f0 T x86_bus_space_io_read_multi_2 +ffffffff816a8130 T x86_bus_space_io_read_multi_4 +ffffffff816a8170 T x86_bus_space_io_read_multi_8 +ffffffff816a8190 T x86_bus_space_io_read_region_1 +ffffffff816a81d0 T x86_bus_space_io_read_region_2 +ffffffff816a8210 T x86_bus_space_io_read_region_4 +ffffffff816a8250 T x86_bus_space_io_read_region_8 +ffffffff816a8270 T x86_bus_space_io_write_1 +ffffffff816a82a0 T x86_bus_space_io_write_2 +ffffffff816a82d0 T x86_bus_space_io_write_4 +ffffffff816a8300 T x86_bus_space_io_write_8 +ffffffff816a8320 T x86_bus_space_io_write_multi_1 +ffffffff816a8360 T x86_bus_space_io_write_multi_2 +ffffffff816a83a0 T x86_bus_space_io_write_multi_4 +ffffffff816a83e0 T x86_bus_space_io_write_multi_8 +ffffffff816a8400 T x86_bus_space_io_write_region_1 +ffffffff816a8440 T x86_bus_space_io_write_region_2 +ffffffff816a8480 T x86_bus_space_io_write_region_4 +ffffffff816a84c0 T x86_bus_space_io_write_region_8 +ffffffff816a84e0 T x86_bus_space_io_set_multi_1 +ffffffff816a8530 T x86_bus_space_io_set_multi_2 +ffffffff816a8580 T x86_bus_space_io_set_multi_4 +ffffffff816a85d0 T x86_bus_space_io_set_multi_8 +ffffffff816a85f0 T x86_bus_space_io_set_region_1 +ffffffff816a8640 T x86_bus_space_io_set_region_2 +ffffffff816a86a0 T x86_bus_space_io_set_region_4 +ffffffff816a86f0 T x86_bus_space_io_set_region_8 +ffffffff816a8710 T x86_bus_space_io_copy_1 +ffffffff816a87a0 T x86_bus_space_io_copy_2 +ffffffff816a8830 T x86_bus_space_io_copy_4 +ffffffff816a88c0 T x86_bus_space_io_copy_8 +ffffffff816a88e0 T x86_bus_space_io_vaddr +ffffffff816a8910 T x86_bus_space_io_mmap +ffffffff816a8940 T x86_bus_space_mem_read_1 +ffffffff816a8970 T x86_bus_space_mem_read_2 +ffffffff816a89a0 T x86_bus_space_mem_read_4 +ffffffff816a89d0 T x86_bus_space_mem_read_8 +ffffffff816a8a00 T x86_bus_space_mem_read_multi_1 +ffffffff816a8a40 T x86_bus_space_mem_read_multi_2 +ffffffff816a8a80 T x86_bus_space_mem_read_multi_4 +ffffffff816a8ac0 T x86_bus_space_mem_read_multi_8 +ffffffff816a8b00 T x86_bus_space_mem_read_region_1 +ffffffff816a8b30 T x86_bus_space_mem_read_region_2 +ffffffff816a8b70 T x86_bus_space_mem_read_region_4 +ffffffff816a8ba0 T x86_bus_space_mem_read_region_8 +ffffffff816a8be0 T x86_bus_space_mem_write_1 +ffffffff816a8c10 T x86_bus_space_mem_write_2 +ffffffff816a8c40 T x86_bus_space_mem_write_4 +ffffffff816a8c70 T x86_bus_space_mem_write_8 +ffffffff816a8ca0 T x86_bus_space_mem_write_multi_1 +ffffffff816a8ce0 T x86_bus_space_mem_write_multi_2 +ffffffff816a8d20 T x86_bus_space_mem_write_multi_4 +ffffffff816a8d60 T x86_bus_space_mem_write_multi_8 +ffffffff816a8da0 T x86_bus_space_mem_write_region_1 +ffffffff816a8dd0 T x86_bus_space_mem_write_region_2 +ffffffff816a8e10 T x86_bus_space_mem_write_region_4 +ffffffff816a8e40 T x86_bus_space_mem_write_region_8 +ffffffff816a8e80 T x86_bus_space_mem_set_multi_1 +ffffffff816a8f00 T x86_bus_space_mem_set_multi_2 +ffffffff816a8f90 T x86_bus_space_mem_set_multi_4 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_bus_dmamap_load +ffffffff816ab190 T _bus_dmamap_load_buffer +ffffffff816ab460 T _bus_dmamap_load_mbuf +ffffffff816ab590 T _bus_dmamap_load_uio +ffffffff816ab730 T _bus_dmamap_load_raw +ffffffff816ab9a0 T _bus_dmamap_unload +ffffffff816ab9e0 T _bus_dmamap_sync +ffffffff816aba10 T _bus_dmamem_alloc +ffffffff816aba70 T _bus_dmamem_alloc_range +ffffffff816abc00 T _bus_dmamem_free +ffffffff816abd00 T _bus_dmamem_map +ffffffff816abf00 T _bus_dmamem_unmap +ffffffff816abfb0 T _bus_dmamem_mmap +ffffffff816ad000 T cpu_spinup_finish +ffffffff816ae000 T x86_64_ipi_halt +ffffffff816ae0e0 T x86_64_ipi_nop +ffffffff816ae110 T x86_64_ipi_vmclear_vmm +ffffffff816ae120 T x86_64_ipi_reload_mtrr +ffffffff816ae170 T x86_64_ipi_start_vmm +ffffffff816ae180 T x86_64_ipi_stop_vmm +ffffffff816ae190 T x86_64_ipi_wbinvd +ffffffff816af000 T x86_send_ipi +ffffffff816af060 T x86_fast_ipi +ffffffff816af0d0 T x86_broadcast_ipi +ffffffff816af160 T x86_ipi_handler +ffffffff816b0000 T mp_setperf +ffffffff816b0070 T x86_setperf_ipi +ffffffff816b0090 T mp_setperf_init +ffffffff816b1000 T apic_format_redir +ffffffff816b2000 T consinit +ffffffff816b3000 T cninit +ffffffff816b4000 T dkcsumattach +ffffffff816b5000 T db_read_address +ffffffff816b51e0 T db_print_address +ffffffff816b5300 T db_disasm_3dnow +ffffffff816b53c0 T db_disasm_esc +ffffffff816b5600 T db_disasm +ffffffff816b7000 T db_printtrap +ffffffff816b7090 T db_ktrap +ffffffff816b7300 T db_enter_ddb +ffffffff816b7630 T db_sysregs_cmd +ffffffff816b77b0 T db_cpuinfo_cmd +ffffffff816b7900 T db_startproc_cmd +ffffffff816b7a70 T db_startcpu +ffffffff816b7b00 T db_stopproc_cmd +ffffffff816b7ce0 T db_stopcpu +ffffffff816b7d80 T db_ddbproc_cmd +ffffffff816b7eb0 T x86_ipi_db +ffffffff816b7ee0 T db_enter +ffffffff816b7f10 T db_machine_init +ffffffff816b8000 T db_read_bytes +ffffffff816b8100 T db_write_bytes +ffffffff816b9000 T db_stack_trace_print +ffffffff816b9670 T stacktrace_save_at +ffffffff816b9750 T stacktrace_save_utrace +ffffffff816b98a0 T db_get_pc +ffffffff816b98c0 T db_get_probe_addr +ffffffff816ba000 T in_cksum +ffffffff816bb000 T in4_cksum +ffffffff816bc000 T mc146818_read +ffffffff816bc060 T mc146818_write +ffffffff816bc0b0 T startclocks +ffffffff816bc110 T i8254_startclock +ffffffff816bc150 T clockintr +ffffffff816bc1d0 T i8254_get_timecount +ffffffff816bc250 T rtcintr +ffffffff816bc300 T gettick +ffffffff816bc380 T i8254_delay +ffffffff816bc4d0 T rtcdrain +ffffffff816bc540 T i8254_initclocks +ffffffff816bc5a0 T i8254_inittimecounter +ffffffff816bc5c0 T i8254_start_both_clocks +ffffffff816bc700 T rtcstart +ffffffff816bc7c0 T rtcstop +ffffffff816bc800 T rtcget +ffffffff816bca50 T rtcput +ffffffff816bcdb0 T bcdtobin +ffffffff816bcdf0 T bintobcd +ffffffff816bce50 T rtcgettime +ffffffff816bd200 T rtcsettime +ffffffff816bd460 T rtcinit +ffffffff816bd4a0 T setstatclockrate +ffffffff816bd550 T i8254_inittimecounter_simple +ffffffff816bd5d0 T i8254_simple_get_timecount +ffffffff816be000 T k8pnow_read_pending_wait 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atascsi_disk_cmd_done +ffffffff81719440 T atascsi_disk_vpd_supported +ffffffff81719520 T atascsi_disk_vpd_serial +ffffffff81719680 T atascsi_disk_vpd_ident +ffffffff817199b0 T atascsi_disk_vpd_ata +ffffffff81719c10 T atascsi_disk_vpd_limits +ffffffff81719d40 T atascsi_disk_vpd_info +ffffffff81719e40 T atascsi_disk_vpd_thin +ffffffff81719f10 T atascsi_disk_inquiry +ffffffff8171a0e0 T ata_swapcopy +ffffffff8171a140 T ata_identify_block_l2p_exp +ffffffff8171a190 T atascsi_disk_write_same_16_done +ffffffff8171a1e0 T atascsi_disk_unmap_task +ffffffff8171a3f0 T atascsi_disk_unmap_done +ffffffff8171a460 T atascsi_disk_sync_done +ffffffff8171a500 T ata_identify_blocks +ffffffff8171a580 T ata_identify_blocksize +ffffffff8171a5e0 T ata_identify_block_logical_align +ffffffff8171a640 T atascsi_passthru_map +ffffffff8171a710 T atascsi_passthru_done +ffffffff8171a7a0 T atascsi_disk_start_stop_done +ffffffff8171a8d0 T atascsi_atapi_cmd_done +ffffffff8171a9b0 T atascsi_pmp_sense +ffffffff8171aa00 T atascsi_pmp_inq +ffffffff8171ab70 T ata_complete +ffffffff8171b000 T mainbus_match +ffffffff8171b030 T mainbus_attach +ffffffff8171b3f0 T mainbus_print +ffffffff8171b480 T mainbus_efifb_reattach +ffffffff8171c000 T codepatch_disable +ffffffff8171d000 T bios_match +ffffffff8171d060 T bios_attach +ffffffff8171dbe0 T smbios_find +ffffffff8171dce0 T smbios_find_table +ffffffff8171dea0 T smbios_get_string +ffffffff8171df60 T fixstring +ffffffff8171e150 T smbios_info +ffffffff8171ef50 T bios_print +ffffffff8171f000 T mpbios_match +ffffffff8171f060 T mpbios_attach +ffffffff8171f080 T mpbios_scan +ffffffff8171f580 T mp_print +ffffffff8171f5e0 T mp_match +ffffffff8171f660 T mpbios_map +ffffffff8171f770 T mpbios_unmap +ffffffff8171f7c0 T mpbios_probe +ffffffff8171fdc0 T mpbios_search +ffffffff817200b0 T mpbios_cpu +ffffffff81720150 T mpbios_bus +ffffffff81720330 T mpbios_ioapic +ffffffff817203d0 T mpbios_int +ffffffff81720720 T mp_cfg_special_intr +ffffffff81720790 T mp_cfg_pci_intr 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lapic_timer_oneshot +ffffffff81725c40 T lapic_timer_periodic +ffffffff81725cb0 T lapic_clockintr +ffffffff81725d40 T lapic_startclock +ffffffff81725d70 T lapic_initclocks +ffffffff81725dd0 T lapic_calibrate_timer +ffffffff81726070 T i82489_ipi_init +ffffffff81726150 T x2apic_ipi_init +ffffffff817261d0 T x86_ipi_init +ffffffff81727000 T ioapic_find +ffffffff81727080 T ioapic_find_bybase +ffffffff817270e0 T ioapic_print_redir +ffffffff817271c0 T ioapic_match +ffffffff81727220 T ioapic_attach +ffffffff817275e0 T ioapic_activate +ffffffff817276d0 T ioapic_set_id +ffffffff817277f0 T ioapic_hwmask +ffffffff817278b0 T ioapic_hwunmask +ffffffff81727960 T ioapic_addroute +ffffffff817279d0 T ioapic_delroute +ffffffff81727ab0 T apic_set_redir +ffffffff81727d40 T ioapic_enable +ffffffff81727e70 T ioapic_dump +ffffffff81728000 T efifb_match +ffffffff81728090 T efifb_attach +ffffffff817283e0 T efifb_ioctl +ffffffff81728510 T efifb_mmap +ffffffff81728570 T efifb_alloc_screen +ffffffff817285a0 T efifb_efiinfo_init +ffffffff817286b0 T efifb_rasops_init +ffffffff817288c0 T efifb_cnattach +ffffffff81728ac0 T efifb_cnattach_common +ffffffff81728bc0 T efifb_early_map +ffffffff81728bd0 T efifb_cnremap +ffffffff81728c80 T efifb_early_cleanup +ffffffff81728c90 T efifb_is_console +ffffffff81728d80 T efifb_is_primary +ffffffff81728eb0 T efifb_detach +ffffffff81728ee0 T efifb_reattach +ffffffff81728f00 T efifb_cb_cnattach +ffffffff81729090 T cb_find_fb +ffffffff81729220 T efifb_cb_found +ffffffff81729260 T efifb_stolen +ffffffff8172a000 T pvbus_match +ffffffff8172a060 T pvbus_attach +ffffffff8172a350 T pvbus_activate +ffffffff8172a360 T pvbus_kvm +ffffffff8172a3a0 T pvbus_hyperv +ffffffff8172a410 T pvbus_hyperv_print +ffffffff8172a440 T pvbus_xen +ffffffff8172a4a0 T pvbus_xen_print +ffffffff8172a4d0 T pvbus_probe +ffffffff8172a500 T pvbus_search +ffffffff8172a5a0 T pvbus_identify +ffffffff8172a780 T pvbus_init_cpu +ffffffff8172a880 T pvbus_print +ffffffff8172a8e0 T pvbus_shutdown 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vm_rpc_open +ffffffff8172f530 T vm_rpc_send_rpci_tx +ffffffff8172f5e0 T vmt_tick_hook +ffffffff8172f620 T vmt_tclo_tick +ffffffff8172ff00 T vmt_nicinfo_task +ffffffff817300e0 T vmt_kvop +ffffffff81730730 T vm_rpc_send +ffffffff817308f0 T vm_rpc_get_length +ffffffff81730a00 T vm_rpc_get_data +ffffffff81730bc0 T vm_rpc_close +ffffffff81730cd0 T vmt_resume +ffffffff81730e00 T vmt_shutdown +ffffffff81730fc0 T vmt_update_guest_uptime +ffffffff81731030 T vmt_clear_guest_info +ffffffff817310b0 T vmt_update_guest_info +ffffffff817311d0 T vmt_tick +ffffffff817313a0 T vmt_tclo_state_change_success +ffffffff81731400 T vmt_do_shutdown +ffffffff81731600 T vm_rpc_send_str +ffffffff817317e0 T vmt_do_reboot +ffffffff817319e0 T vm_rpci_response_successful +ffffffff81731a20 T vmt_set_backup_status +ffffffff81731a50 T vmt_quiesce_task +ffffffff81731b90 T vmt_quiesce_done_task +ffffffff81731c50 T vmt_tclo_process +ffffffff81731d20 T vmt_xdr_ifaddr +ffffffff81731e90 T vmt_xdr_nic_entry +ffffffff81732050 T vmt_xdr_nic_info +ffffffff81732170 T vm_rpc_send_rpci_tx_buf +ffffffff817326f0 T vm_ins +ffffffff81732760 T vm_outs +ffffffff81733000 T xen_match +ffffffff81733040 T xen_attach +ffffffff817332d0 T xen_activate +ffffffff81733300 T xen_bus_dmamap_create +ffffffff817334c0 T xen_bus_dmamap_destroy +ffffffff81733570 T xen_bus_dmamap_load +ffffffff817336c0 T xen_bus_dmamap_load_mbuf +ffffffff81733810 T xen_bus_dmamap_unload +ffffffff817338b0 T xen_bus_dmamap_sync +ffffffff817338f0 T xen_init_hypercall +ffffffff817339a0 T xen_getfeatures +ffffffff81733a50 T xen_init_info_page +ffffffff81733b80 T xen_init_cbvec +ffffffff81733c20 T xen_init_interrupts +ffffffff81733ce0 T xen_init_grant_tables +ffffffff81733e60 T xen_probe_devices +ffffffff81734180 T xen_disable_emulated_devices +ffffffff81734200 T xen_deferred +ffffffff817342a0 T xen_intr_enable +ffffffff81734420 T xen_control +ffffffff81734620 T xen_resume +ffffffff81734650 T xen_hypercall +ffffffff81734830 T xen_hypercallv +ffffffff817348f0 T xen_intr_ack +ffffffff81734950 T xen_intr +ffffffff81734b80 T xen_intr_schedule +ffffffff81734cb0 T xen_intr_barrier +ffffffff81734d80 T xen_intr_signal +ffffffff81734ed0 T xen_intr_establish +ffffffff81735200 T xen_intr_dispatch +ffffffff81735330 T xen_intr_disestablish +ffffffff81735530 T xen_intr_mask +ffffffff81735600 T xen_intr_unmask +ffffffff81735780 T xen_grant_table_grow +ffffffff817359f0 T xen_grant_table_alloc +ffffffff81735ca0 T xen_grant_table_free +ffffffff81735d50 T xen_grant_table_enter +ffffffff81735e00 T xen_grant_table_remove +ffffffff81735f60 T xen_attach_device +ffffffff81736130 t xen_attach_print +ffffffff81736190 T xen_hotplug +ffffffff81736450 T xen_unplug_emulated +ffffffff81737000 T xs_attach +ffffffff817374d0 T xs_intr +ffffffff81737980 T xs_get_msg +ffffffff81737a90 T xs_put_msg +ffffffff81737b30 T xs_geterror +ffffffff81737dc0 T xs_poll +ffffffff81737e50 T xs_output +ffffffff81738030 T xs_ring_put +ffffffff81738140 T xs_start +ffffffff817382f0 T xs_reply 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xnf_init +ffffffff8173bc10 T xnf_iff +ffffffff8173bc40 T xnf_rx_ring_fill +ffffffff8173beb0 T xnf_tx_ring_drain +ffffffff8173bf00 T xnf_rx_ring_drain +ffffffff8173bf50 T xnf_encap +ffffffff8173c380 T xnf_txeof +ffffffff8173c5f0 T xnf_rxeof +ffffffff8173d000 T xbf_match +ffffffff8173d060 T xbf_attach +ffffffff8173d2c0 T xbf_detach +ffffffff8173d380 T xbf_scsi_cmd +ffffffff8173d780 T xbf_get_type +ffffffff8173d9b0 T xbf_intr +ffffffff8173dba0 T xbf_init +ffffffff8173e210 T xbf_stop +ffffffff8173e3c0 T xbf_complete_cmd +ffffffff8173e6a0 T xbf_reclaim_cmd +ffffffff8173e710 T xbf_scsi_done +ffffffff8173e760 T xbf_scsi_inq +ffffffff8173e950 T xbf_scsi_capacity +ffffffff8173ea60 T xbf_scsi_capacity16 +ffffffff8173ebc0 T xbf_submit_cmd +ffffffff8173eef0 T xbf_poll_cmd +ffffffff8173efb0 T xbf_load_cmd +ffffffff8173f1d0 T xbf_bounce_cmd +ffffffff8173f3f0 T xbf_dma_alloc +ffffffff8173f6b0 T xbf_dma_free +ffffffff8173f7c0 T xbf_scsi_inquiry +ffffffff8173f960 T xbf_ring_create +ffffffff8173fab0 T xbf_ring_destroy +ffffffff8173fc00 T xbf_alloc_ccbs +ffffffff8173ff70 T xbf_free_ccbs +ffffffff817400a0 T xbf_put_ccb +ffffffff81740130 T xbf_get_ccb +ffffffff81741000 T hv_channel_offer +ffffffff817410d0 T hv_channel_rescind +ffffffff81741100 T hv_channel_delivered +ffffffff81741120 T hv_channel_response +ffffffff81741290 T hv_gettime +ffffffff817412c0 T hv_match +ffffffff81741320 T hv_attach +ffffffff817414c0 T hv_set_version +ffffffff81741500 T hv_init_hypercall +ffffffff817415b0 T hv_init_interrupts +ffffffff81741760 T hv_vmbus_connect +ffffffff81741bd0 T hv_channel_scan +ffffffff81741e90 T hv_attach_devices +ffffffff81742010 T hv_delay +ffffffff81742090 T hv_hypercall +ffffffff81742190 T hv_init_synic +ffffffff81742310 T hv_cmd +ffffffff817424e0 T hv_start +ffffffff817427c0 T hv_reply +ffffffff817428a0 T hv_intr +ffffffff817428e0 T hv_wait +ffffffff81742a60 t hv_reply_done +ffffffff81742b00 T hv_intr_signal +ffffffff81742bb0 T hv_event_intr +ffffffff81742db0 T hv_message_intr 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hv_heartbeat +ffffffff817464a0 T hv_shutdown_attach +ffffffff81746560 t hv_shutdown_task +ffffffff81746570 T hv_shutdown +ffffffff817467e0 T hv_timesync_attach +ffffffff817468e0 T hv_timesync +ffffffff81746bd0 T hv_kvp_attach +ffffffff81747030 t kvp_pool_insert +ffffffff817471a0 T hv_kvop +ffffffff817476b0 T hv_kvp +ffffffff817485d0 t kvp_pool_import +ffffffff81748830 t kvp_pool_export +ffffffff81749000 T hvn_match +ffffffff81749060 T hvn_attach +ffffffff817493f0 T hvn_nvs_attach +ffffffff81749790 T hvn_rx_ring_create +ffffffff81749970 T hvn_tx_ring_create +ffffffff81749b90 T hvn_ioctl +ffffffff81749e10 T hvn_start +ffffffff81749fe0 T hvn_media_change +ffffffff8174a010 T hvn_media_status +ffffffff8174a0e0 T hvn_rndis_attach +ffffffff8174a820 T hvn_set_capabilities +ffffffff8174a8d0 T hvn_rndis_detach +ffffffff8174ab40 T hvn_get_lladdr +ffffffff8174abc0 T hvn_rx_ring_destroy +ffffffff8174acf0 T hvn_tx_ring_destroy +ffffffff8174aea0 T hvn_nvs_detach +ffffffff8174af20 T hvn_init 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mpii_handshake_recv_dword +ffffffff817d7fa0 T mpii_handshake_recv +ffffffff817d8250 T mpii_empty_done +ffffffff817d8280 T mpii_push_reply +ffffffff817d8300 T mpii_poll +ffffffff817d8520 T mpii_eventack +ffffffff817d8740 T mpii_eventack_done +ffffffff817d87c0 T mpii_start +ffffffff817d8890 T mpii_event_sas +ffffffff817d8d00 T mpii_eventnotify_done +ffffffff817d8d40 T mpii_event_raid +ffffffff817d90a0 T mpii_find_dev +ffffffff817d9100 T mpii_insert_dev +ffffffff817d9180 T mpii_remove_dev +ffffffff817d9200 T mpii_event_discovery +ffffffff817d9260 T mpii_sas_remove_device +ffffffff817d9430 T mpii_event_done +ffffffff817d9510 T mpii_wait +ffffffff817d96d0 T mpii_dmamem_alloc +ffffffff817d9890 T mpii_scsi_cmd_tmo_handler +ffffffff817d9a10 T mpii_put_ccb +ffffffff817d9ad0 T mpii_poll_done +ffffffff817d9b00 T mpii_wait_done +ffffffff817d9b60 T mpii_scsi_cmd_done +ffffffff817d9e10 T mpii_scsi_cmd_tmo +ffffffff817d9f30 T mpii_scsi_cmd_tmo_done +ffffffff817d9f50 T mpii_ioctl_cache +ffffffff817da1e0 T mpii_ioctl_inq +ffffffff817da2a0 T mpii_ioctl_vol +ffffffff817da580 T mpii_ioctl_disk +ffffffff817da7a0 T mpii_find_vol +ffffffff817da7f0 T mpii_bio_hs +ffffffff817daa20 T mpii_bio_disk +ffffffff817dacc0 T mpii_bio_volstate +ffffffff817dae80 T mpii_refresh_sensors +ffffffff817db000 T sili_pci_match +ffffffff817db0a0 T sili_pci_attach +ffffffff817db420 T sili_pci_detach +ffffffff817db4f0 T sili_pci_activate +ffffffff817db530 T sili_lookup +ffffffff817dc000 T aq_fw1x_reset +ffffffff817dc060 T aq1_get_mac_addr +ffffffff817dc160 T aq_fw1x_set_mode +ffffffff817dc190 T aq_fw1x_get_mode +ffffffff817dc1c0 T aq_fw1x_get_stats +ffffffff817dc1f0 T aq_fw2x_reset +ffffffff817dc290 T aq_fw2x_set_mode +ffffffff817dc470 T aq_fw2x_get_mode +ffffffff817dc630 T aq_fw2x_get_stats +ffffffff817dc660 T aq2_fw_reset +ffffffff817dc850 T aq2_get_mac_addr +ffffffff817dc900 T aq2_fw_set_mode +ffffffff817dcb70 T aq2_fw_get_mode +ffffffff817dcc50 T aq2_fw_get_stats +ffffffff817dcc80 T aq_match +ffffffff817dccb0 T aq_attach +ffffffff817ddbd0 T aq_activate +ffffffff817ddc00 T aq_lookup +ffffffff817ddc80 T aq_intr +ffffffff817dde40 T aq_intr_link +ffffffff817ddf60 T aq1_fw_reboot +ffffffff817de230 T aq2_fw_reboot +ffffffff817de750 T aq_hw_reset +ffffffff817de900 T aq_init_rss +ffffffff817ded10 T aq_hw_init +ffffffff817df0c0 T aq_ifmedia_change +ffffffff817df1b0 T aq_ifmedia_status +ffffffff817df2c0 T aq_ioctl +ffffffff817df550 T aq_start +ffffffff817df8e0 T aq_watchdog +ffffffff817df910 T aq_set_linkmode +ffffffff817df940 T aq_refill +ffffffff817df9c0 T aq_intr_queue +ffffffff817dfac0 T aq_enable_intr +ffffffff817dfbf0 T aq1_fw_read_version +ffffffff817dfca0 T aq1_mac_soft_reset +ffffffff817dfcd0 T aq1_fw_version_init +ffffffff817dfe90 T aq1_hw_init_ucp +ffffffff817e0040 T aq1_mac_soft_reset_rbl +ffffffff817e0370 T aq1_global_software_reset +ffffffff817e04c0 T aq1_mac_soft_reset_flb +ffffffff817e0980 T aq2_interface_buffer_read +ffffffff817e0af0 T aq1_fw_downld_dwords +ffffffff817e0eb0 T aq_hw_l3_filter_set +ffffffff817e1150 T aq_hw_init_tx_path +ffffffff817e1450 T aq_hw_init_rx_path +ffffffff817e1e50 T aq_set_mac_addr +ffffffff817e20c0 T aq_hw_qos_set +ffffffff817e2950 T aq2_filter_art_set +ffffffff817e2b60 T aq_get_linkmode +ffffffff817e2bd0 T aq_txring_reset +ffffffff817e3020 T aq_rxring_reset +ffffffff817e3630 T aq_rx_fill +ffffffff817e3890 T aq_rxeof +ffffffff817e3c60 T aq_txeof +ffffffff817e3e70 T aq_update_link_status +ffffffff817e3f20 T aq_free_slots +ffffffff817e3fd0 T aq_queue_up +ffffffff817e44b0 T aq_dmamem_alloc +ffffffff817e4630 T aq_dmamem_free +ffffffff817e46b0 T aq_queue_down +ffffffff817e4a20 T aq_invalidate_rx_desc_cache +ffffffff817e4ab0 T aq_up +ffffffff817e4fa0 T aq_down +ffffffff817e5140 T aq_rxrinfo +ffffffff817e5250 T aq_iff +ffffffff817e6000 T tulip_probe +ffffffff817e6060 T tulip_attach +ffffffff817e6cd0 T tulip_timeout_callback +ffffffff817e6d40 T tulip_timeout +ffffffff817e6db0 T tulip_txprobe +ffffffff817e6f30 T tulip_txput +ffffffff817e7530 T tulip_media_set +ffffffff817e7bf0 T tulip_reset +ffffffff817e8040 T tulip_mii_autonegotiate +ffffffff817e83a0 T tulip_mii_readreg +ffffffff817e85e0 T tulip_mii_writereg +ffffffff817e8830 T tulip_linkup +ffffffff817e8910 T tulip_init +ffffffff817e8ac0 T tulip_media_print +ffffffff817e8b10 T tulip_media_link_monitor +ffffffff817e8d80 T tulip_mii_map_abilities +ffffffff817e8e10 T tulip_media_poll +ffffffff817e9360 T tulip_mii_phy_readspecific +ffffffff817e9560 T tulip_media_select +ffffffff817e96a0 T tulip_21040_mediainfo_init +ffffffff817e97a0 T tulip_21040_media_probe +ffffffff817e9890 T tulip_21040_10baset_only_media_probe +ffffffff817e9950 T tulip_21040_10baset_only_media_select +ffffffff817e99b0 T tulip_21040_auibnc_only_media_probe +ffffffff817e9a50 T tulip_21040_auibnc_only_media_select +ffffffff817e9aa0 T tulip_21041_mediainfo_init +ffffffff817e9b60 T tulip_21041_media_probe +ffffffff817e9c40 T tulip_21041_media_poll +ffffffff817e9fb0 T tulip_mii_get_phyaddr +ffffffff817ea080 T tulip_2114x_media_preset +ffffffff817ea2b0 T tulip_null_media_poll +ffffffff817ea2e0 T tulip_21140_mediainit +ffffffff817ea330 T tulip_21140_evalboard_media_probe +ffffffff817ea560 T tulip_21140_accton_media_probe +ffffffff817ea7c0 T tulip_21140_smc9332_media_probe +ffffffff817eaa40 T tulip_21140_cogent_em100_media_probe +ffffffff817eabe0 T tulip_21140_znyx_zx34x_media_probe +ffffffff817eae80 T tulip_2114x_media_probe +ffffffff817eaeb0 T tulip_delay_300ns +ffffffff817eb010 T tulip_srom_idle +ffffffff817ebd30 T tulip_srom_read +ffffffff817ecf80 T tulip_mii_writebits +ffffffff817ed690 T tulip_mii_turnaround +ffffffff817ee110 T tulip_mii_readbits +ffffffff817ee620 T tulip_identify_dec_nic +ffffffff817ee700 T tulip_identify_znyx_nic +ffffffff817eea00 T tulip_identify_smc_nic +ffffffff817eebf0 T tulip_identify_cogent_nic +ffffffff817eed00 T tulip_identify_accton_nic +ffffffff817eee60 T tulip_identify_asante_nic +ffffffff817ef170 T tulip_identify_compex_nic +ffffffff817ef2e0 T tulip_srom_decode +ffffffff817effa0 T tulip_read_macaddr +ffffffff817f0a00 T tulip_ifmedia_add +ffffffff817f0b10 T tulip_ifmedia_change +ffffffff817f0d00 T tulip_ifmedia_status +ffffffff817f0d70 T tulip_alloc_rxmap +ffffffff817f0db0 T tulip_free_rxmap +ffffffff817f0df0 T tulip_alloc_txmap +ffffffff817f0e30 T tulip_free_txmap +ffffffff817f0e70 T tulip_addr_filter +ffffffff817f11d0 T tulip_rx_intr +ffffffff817f1890 T tulip_txput_setup +ffffffff817f1b70 T tulip_tx_intr +ffffffff817f1fd0 T tulip_print_abnormal_interrupt +ffffffff817f2000 T tulip_intr_handler +ffffffff817f23f0 T tulip_ifstart +ffffffff817f24d0 T tulip_intr_shared +ffffffff817f2550 T tulip_intr_normal +ffffffff817f25a0 T tulip_ifioctl +ffffffff817f26c0 T tulip_ifwatchdog +ffffffff817f27e0 T tulip_busdma_allocmem +ffffffff817f29a0 T tulip_busdma_init +ffffffff817f2bf0 T tulip_initcsrs +ffffffff817f2cf0 T tulip_initring +ffffffff817f3000 T ep_pci_match +ffffffff817f3030 T ep_pci_attach +ffffffff817f4000 T pcn_match +ffffffff817f4070 T pcn_attach +ffffffff817f4960 T pcn_tick +ffffffff817f49d0 T pcn_reset +ffffffff817f4a60 T pcn_intr +ffffffff817f4d30 T pcn_ioctl +ffffffff817f4ed0 T pcn_start +ffffffff817f5390 T pcn_watchdog +ffffffff817f5410 T pcn_txintr +ffffffff817f5930 T pcn_init +ffffffff817f63e0 T pcn_stop +ffffffff817f6590 T pcn_rxintr +ffffffff817f6b30 T pcn_spnd +ffffffff817f6c60 T pcn_add_rxbuf +ffffffff817f6e90 T pcn_rxdrain +ffffffff817f6f40 T pcn_set_filter +ffffffff817f70b0 T pcn_79c970_mediainit +ffffffff817f71e0 T pcn_79c970_mediachange +ffffffff817f73d0 T pcn_79c970_mediastatus +ffffffff817f7410 T pcn_79c971_mediainit +ffffffff817f74f0 T pcn_mii_readreg +ffffffff817f75d0 T pcn_mii_writereg +ffffffff817f7680 T pcn_mii_statchg +ffffffff817f76f0 T pcn_79c971_mediachange +ffffffff817f7740 T pcn_79c971_mediastatus +ffffffff817f8000 T siop_lookup_product +ffffffff817f80a0 T siop_pci_attach_common +ffffffff817f85b0 T siop_pci_reset +ffffffff817f9000 T siop_pci_match +ffffffff817f9050 T siop_pci_attach +ffffffff817fa000 T sii3114_read_reg +ffffffff817fa060 T sii3114_write_reg +ffffffff817fa0d0 T pdc203xx_read_reg +ffffffff817fa130 T pdc203xx_write_reg +ffffffff817fa1a0 T svwsata_read_reg +ffffffff817fa210 T svwsata_write_reg +ffffffff817fa260 T svwsata_lba48_write_reg +ffffffff817fa2b0 T pciide_pci_read +ffffffff817fa300 T pciide_pci_write +ffffffff817fa380 T default_chip_map +ffffffff817faac0 T artisea_chip_map +ffffffff817fadb0 T piix_chip_map +ffffffff817fb470 T piixsata_chip_map +ffffffff817fba80 T sch_chip_map +ffffffff817fbe40 T amd756_chip_map +ffffffff817fc310 T ixp_chip_map +ffffffff817fc720 T cmd_chip_map +ffffffff817fc8a0 T cmd0643_9_chip_map +ffffffff817fcc10 T cmd680_chip_map +ffffffff817fce50 T sii3112_chip_map +ffffffff817fd2a0 T sii3114_chip_map +ffffffff817fd8f0 T apollo_chip_map +ffffffff817fe070 T sata_chip_map +ffffffff817fe2b0 T cy693_chip_map +ffffffff817fe710 T sis_chip_map +ffffffff817fefe0 T natsemi_chip_map +ffffffff817ff540 T ns_scx200_chip_map +ffffffff817ff980 T acer_chip_map +ffffffff81800150 T hpt_chip_map +ffffffff81800720 T pdc202xx_chip_map +ffffffff81801200 T pdcsata_chip_map +ffffffff81801ae0 T acard_chip_map +ffffffff81801db0 T serverworks_chip_map +ffffffff81802180 T svwsata_chip_map +ffffffff818025e0 T nforce_chip_map +ffffffff81802af0 T ite_chip_map +ffffffff81802e20 T jmicron_chip_map +ffffffff818032c0 T phison_chip_map +ffffffff81803690 T rdc_chip_map +ffffffff81803bb0 T pciide_match +ffffffff81803c60 T pciide_attach +ffffffff81803d40 T pciide_detach +ffffffff81803db0 T pciide_activate +ffffffff81804610 T pciide_lookup_product +ffffffff818048c0 T pciide_dmacmd_read +ffffffff818048f0 T pciide_dmacmd_write +ffffffff81804920 T pciide_dmactl_read +ffffffff81804950 T pciide_dmactl_write +ffffffff81804980 T pciide_dmatbl_write +ffffffff818049b0 T pciide_mapregs_compat +ffffffff81804b70 T pciide_unmapregs_compat +ffffffff81804c10 T pciide_mapregs_native +ffffffff81804fb0 T pciide_unmapregs_native +ffffffff81805060 T pciide_mapreg_dma +ffffffff81805220 T pciide_dma_init +ffffffff81805520 T pciide_dma_start +ffffffff818055b0 T pciide_dma_finish +ffffffff818057c0 T pciide_unmapreg_dma +ffffffff818057f0 T pciide_intr_flag +ffffffff81805ab0 T pciide_compat_intr +ffffffff81805b30 T pciide_pci_intr +ffffffff81805c10 T pciide_channel_dma_setup +ffffffff81805cf0 T pciide_dma_table_setup +ffffffff81805f80 T pciide_irqack +ffffffff81805fe0 T pciide_chansetup +ffffffff818060d0 T pciide_chanfree +ffffffff81806120 T pciide_mapchan +ffffffff818061c0 T pciide_unmap_chan +ffffffff818062c0 T pciide_chan_candisable +ffffffff81806340 T pciide_map_compat_intr +ffffffff81806400 T pciide_unmap_compat_intr +ffffffff81806460 T pciide_print_channels +ffffffff81806530 T pciide_print_modes +ffffffff81806540 T default_chip_unmap +ffffffff81806640 T sata_setup_channel +ffffffff81806770 T piix_timing_debug +ffffffff818067a0 T piix_setup_channel +ffffffff81806cb0 T piix3_4_setup_channel +ffffffff81807500 T piix_setup_idetim_timings +ffffffff81807570 T piix_setup_idetim_drvs +ffffffff81807680 T piix_setup_sidetim_timings +ffffffff818076f0 T amd756_setup_channel +ffffffff81807af0 T apollo_setup_channel +ffffffff81807e90 T cmd_channel_map +ffffffff81808230 T cmd_pci_intr +ffffffff81808360 T cmd646_9_irqack +ffffffff81808490 T cmd0643_9_setup_channel +ffffffff81808930 T cmd680_setup_channel +ffffffff81808ef0 T cmd680_channel_map +ffffffff81809240 T sii_fixup_cacheline +ffffffff818095d0 T sii3112_setup_channel +ffffffff818097d0 T sii3112_drv_probe +ffffffff81809bc0 T sii3114_mapreg_dma +ffffffff81809ed0 T sii3114_chansetup +ffffffff81809fa0 T sii3114_mapchan +ffffffff8180a2f0 T sii3114_dmacmd_read +ffffffff8180a330 T sii3114_dmacmd_write +ffffffff8180a370 T sii3114_dmactl_read +ffffffff8180a3b0 T sii3114_dmactl_write +ffffffff8180a3f0 T sii3114_dmatbl_write +ffffffff8180a430 T cy693_setup_channel +ffffffff8180a670 T sis_hostbr_match +ffffffff8180a740 T sis_south_match +ffffffff8180a780 T sis_setup_channel +ffffffff8180ab00 T sis96x_setup_channel +ffffffff8180ade0 T natsemi_irqack +ffffffff8180ae90 T natsemi_setup_channel +ffffffff8180b2f0 T natsemi_pci_intr +ffffffff8180b400 T ns_scx200_setup_channel +ffffffff8180b730 T acer_dma_init +ffffffff8180b770 T acer_setup_channel +ffffffff8180bbe0 T acer_pci_intr +ffffffff8180bce0 T hpt_setup_channel +ffffffff8180c070 T hpt_pci_intr +ffffffff8180c1a0 T pdc268_config_read +ffffffff8180c210 T pdc20268_setup_channel +ffffffff8180c400 T pdc202xx_setup_channel +ffffffff8180c880 T pdc20262_dma_start +ffffffff8180ca00 T pdc20262_dma_finish +ffffffff8180caf0 T pdc20265_pci_intr +ffffffff8180ccd0 T pdc202xx_pci_intr +ffffffff8180ce00 T pdc203xx_pci_intr +ffffffff8180cf10 T pdc205xx_pci_intr +ffffffff8180d080 T pdc203xx_irqack +ffffffff8180d130 T pdc203xx_setup_channel +ffffffff8180d250 T pdc205xx_do_reset +ffffffff8180d320 T pdc205xx_drv_probe +ffffffff8180d620 T pdc203xx_dma_start +ffffffff8180d6f0 T pdc203xx_dma_finish +ffffffff8180d800 T serverworks_setup_channel +ffffffff8180dc60 T serverworks_pci_intr +ffffffff8180dd90 T svwsata_mapreg_dma +ffffffff8180de40 T svwsata_drv_probe +ffffffff8180e1b0 T svwsata_mapchan +ffffffff8180e2b0 T svwsata_dmacmd_read +ffffffff8180e2e0 T svwsata_dmacmd_write +ffffffff8180e310 T svwsata_dmactl_read +ffffffff8180e340 T svwsata_dmactl_write +ffffffff8180e370 T svwsata_dmatbl_write +ffffffff8180e3a0 T acard_setup_channel +ffffffff8180e820 T nforce_setup_channel +ffffffff8180eba0 T nforce_pci_intr +ffffffff8180ecb0 T ite_setup_channel +ffffffff8180f050 T ixp_setup_channel +ffffffff8180f450 T jmicron_setup_channel +ffffffff8180f6c0 T phison_setup_channel +ffffffff8180f8e0 T sch_setup_channel +ffffffff8180faf0 T rdc_setup_channel +ffffffff8180ff60 t ba5_read_4_ind +ffffffff81810010 t ba5_write_4_ind +ffffffff81811000 T ppbmatch +ffffffff81811050 T ppbattach +ffffffff81811940 T ppbdetach +ffffffff81811a90 T ppbactivate +ffffffff81812020 T ppb_alloc_busrange +ffffffff818121f0 T ppb_hotplug_insert +ffffffff81812250 T ppb_hotplug_rescan +ffffffff81812290 T ppb_hotplug_remove +ffffffff81812410 T ppb_hotplug_insert_finish +ffffffff81812440 T ppb_intr +ffffffff81812520 T ppb_alloc_resources +ffffffff81812d40 T ppbprint +ffffffff81813000 T cy_pci_match +ffffffff81813030 T cy_pci_attach +ffffffff81814000 T rl_pci_match +ffffffff81814060 T rl_pci_attach +ffffffff81814260 T rl_pci_detach +ffffffff81815000 T re_pci_probe +ffffffff818150b0 T re_pci_attach +ffffffff818154a0 T re_pci_detach +ffffffff81815520 T re_pci_activate +ffffffff81816000 T vr_probe +ffffffff818160d0 T vr_attach +ffffffff818167f0 T vr_activate +ffffffff81816880 T vr_mii_readreg +ffffffff81816a40 T vr_mii_writereg +ffffffff81816bf0 T vr_miibus_readreg +ffffffff81816c60 T vr_miibus_writereg +ffffffff81816cd0 T vr_miibus_statchg +ffffffff81816cf0 T vr_setcfg +ffffffff81816f60 T vr_iff +ffffffff818170f0 T vr_reset +ffffffff81817230 T vr_quirks +ffffffff81817330 T vr_dmamem_alloc +ffffffff818174c0 T vr_dmamem_free +ffffffff81817550 T vr_intr +ffffffff818177d0 T vr_chipinit +ffffffff818178f0 T vr_ioctl +ffffffff81817ad0 T vr_start +ffffffff81817cd0 T vr_watchdog +ffffffff81817d80 T vr_wol +ffffffff81817f90 T vr_ifmedia_upd +ffffffff81817fe0 T vr_ifmedia_sts +ffffffff81818050 T vr_tick +ffffffff81818100 T vr_rxtick +ffffffff81818200 T vr_stop +ffffffff81818540 T vr_init +ffffffff81818c70 T vr_list_tx_init +ffffffff81818d70 T vr_list_rx_init +ffffffff81818f60 T vr_fill_rx_ring +ffffffff81819030 T vr_alloc_mbuf +ffffffff818191d0 T vr_rxeof +ffffffff818194b0 T vr_rxeoc +ffffffff818196a0 T vr_txeof +ffffffff81819880 T vr_encap +ffffffff8181a000 T txp_probe +ffffffff8181a030 T txp_attach +ffffffff8181a1f0 T txp_attachhook +ffffffff8181a610 T txp_chip_init +ffffffff8181a840 T txp_download_fw +ffffffff8181add0 T txp_alloc_rings +ffffffff8181bb90 T txp_command +ffffffff8181bc70 T txp_ifmedia_upd +ffffffff8181bd90 T txp_ifmedia_sts +ffffffff8181c0b0 T txp_ioctl +ffffffff8181c210 T txp_start +ffffffff8181c640 T txp_watchdog +ffffffff8181c670 T txp_capabilities +ffffffff8181c840 T txp_tick +ffffffff8181c9d0 T txp_intr +ffffffff8181cca0 T txp_reset_adapter +ffffffff8181cdd0 T txp_download_fw_wait +ffffffff8181cee0 T txp_download_fw_section +ffffffff8181d330 T txp_dma_malloc +ffffffff8181d500 T txp_dma_free +ffffffff8181d590 T txp_rx_reclaim +ffffffff8181d8d0 T txp_rxbuf_reclaim +ffffffff8181dbb0 T txp_tx_reclaim +ffffffff8181dd80 T txp_init +ffffffff8181df00 T txp_stop +ffffffff8181e020 T txp_set_filter +ffffffff8181e1c0 T txp_command2 +ffffffff8181e510 T txp_cmd_desc_numfree +ffffffff8181e570 T txp_response +ffffffff8181e870 T txp_rsp_fixup +ffffffff8181e960 T txp_show_descriptor +ffffffff8181f000 T init_audio_devices +ffffffff8181f150 T init_BTSC +ffffffff8181f240 T set_audio +ffffffff8181f660 T set_bctv_audio +ffffffff8181fab0 T msp_autodetect +ffffffff8181ffd0 T temp_mute +ffffffff81820070 T set_BTSC +ffffffff81820090 T bctv_gpio_write +ffffffff81820250 T msp_read_id +ffffffff81820320 T dpl_read_id +ffffffff818203f0 T dpl_autodetect +ffffffff81821000 T writeEEProm +ffffffff81821030 T readEEProm +ffffffff81821100 T signCard +ffffffff818211b0 T probeCard +ffffffff81823000 T bktr_name +ffffffff81823030 T common_bktr_attach +ffffffff81823390 t oformat_meteor_to_bt +ffffffff818234b0 T common_bktr_intr +ffffffff81823bc0 T video_open +ffffffff81824170 t set_fps +ffffffff818242d0 T vbi_open +ffffffff81824380 T tuner_open +ffffffff818243d0 T video_close +ffffffff81824500 T tuner_close +ffffffff81824530 T vbi_close +ffffffff81824560 T video_read +ffffffff81824770 t start_capture +ffffffff81827aa0 T vbi_read +ffffffff81827be0 T video_ioctl +ffffffff818292c0 T bktr_common_ioctl +ffffffff81829c30 T tuner_ioctl +ffffffff8182abd0 t remote_read +ffffffff8182ae00 T i2cWrite +ffffffff8182af50 T i2cRead +ffffffff8182b0a0 T msp_dpl_read +ffffffff8182b460 T msp_dpl_write +ffffffff8182b6d0 T msp_dpl_reset +ffffffff8182bb10 t i2c_write_byte +ffffffff8182bd90 t i2c_read_byte +ffffffff8182c050 t split +ffffffff8182c280 t getline +ffffffff8182d000 t bktr_probe +ffffffff8182d060 t bktr_attach +ffffffff8182d390 T bktr_get_info +ffffffff8182d480 T bktr_set_info +ffffffff8182d620 T get_bktr_mem +ffffffff8182d8f0 T free_bktr_mem +ffffffff8182d960 T bktropen +ffffffff8182da20 T bktrclose +ffffffff8182daa0 T bktrread +ffffffff8182db30 T bktrwrite +ffffffff8182db60 T bktrioctl +ffffffff8182dc00 T bktrmmap +ffffffff8182dca0 t bktr_intr +ffffffff8182e000 T select_tuner +ffffffff8182e050 T tv_freq +ffffffff8182e2e0 T do_afc +ffffffff8182e440 T get_tuner_status +ffffffff8182e460 T tv_channel +ffffffff8182e520 T tuner_getchnlset +ffffffff8182f000 T xl_pci_match +ffffffff8182f030 T xl_pci_attach +ffffffff8182f410 T xl_pci_detach +ffffffff8182f4b0 T xl_pci_wol_power +ffffffff8182f510 T xl_pci_intr_ack +ffffffff81830000 T fxp_pci_match +ffffffff81830030 T fxp_pci_attach +ffffffff818303b0 T fxp_pci_detach +ffffffff81831000 T em_probe +ffffffff81831030 T em_attach +ffffffff81831610 T em_detach +ffffffff818316c0 T em_activate +ffffffff81831750 T em_defer_attach +ffffffff81831830 T em_stop +ffffffff81831990 T em_free_pci_resources +ffffffff81831c90 T em_setup_interface +ffffffff81831ef0 T em_update_link_status +ffffffff81832140 T em_local_timer +ffffffff81832220 T em_82547_move_tail +ffffffff81832270 T em_identify_hardware +ffffffff818323a0 T em_allocate_pci_resources +ffffffff81832840 T em_allocate_desc_rings +ffffffff81832970 T em_hardware_init +ffffffff81832cc0 T em_kstat_attach +ffffffff81832e40 T em_start +ffffffff81833190 T em_encap +ffffffff81833680 T em_82547_move_tail_locked +ffffffff818338e0 T em_82547_update_fifo_head +ffffffff81833930 T em_ioctl +ffffffff81833c80 T em_init +ffffffff818340c0 T em_get_sffpage +ffffffff81834190 T em_disable_intr +ffffffff818342c0 T em_iff +ffffffff81834660 T em_initialize_receive_unit +ffffffff81834eb0 T em_enable_intr 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em_free_receive_structures +ffffffff81838b10 T em_legacy_irq_quirk_spt +ffffffff81838c00 T em_rxrefill +ffffffff81838c50 T em_allocate_msix +ffffffff81838ec0 T em_allocate_legacy +ffffffff81839020 T em_dma_free +ffffffff818390b0 T em_disable_aspm +ffffffff81839190 T em_dma_malloc +ffffffff81839350 T em_allocate_transmit_structures +ffffffff81839460 T em_get_buf +ffffffff818395e0 T em_allocate_receive_structures +ffffffff818397f0 T em_rxfill +ffffffff81839950 T em_tbi_adjust_stats +ffffffff81839b20 T em_receive_checksum +ffffffff81839b90 T em_write_pci_cfg +ffffffff81839c10 T em_read_pci_cfg +ffffffff81839c90 T em_read_pcie_cap_reg +ffffffff81839cc0 T em_flush_tx_ring +ffffffff81839e50 T em_flush_rx_ring +ffffffff8183a070 T em_queue_intr_msix +ffffffff8183a140 T em_link_intr_msix +ffffffff8183a2b0 T em_enable_queue_intr_msix +ffffffff8183b000 T em_set_mac_type +ffffffff8183ba20 T em_set_sfp_media_type_82575 +ffffffff8183be10 T em_translate_82542_register +ffffffff8183c040 T em_read_sfp_data_byte +ffffffff8183c150 T em_set_media_type +ffffffff8183c3f0 T em_reset_hw +ffffffff8183d260 T em_disable_pciex_master +ffffffff8183d350 T em_check_phy_reset_block +ffffffff8183d420 T em_gate_hw_phy_config_ich8lan +ffffffff8183d4d0 t em_get_software_flag +ffffffff8183d6a0 T em_hv_phy_workarounds_ich8lan +ffffffff8183db50 T em_lv_phy_workarounds_ich8lan +ffffffff8183dc90 t em_phy_init_script +ffffffff8183dfb0 T em_read_eeprom +ffffffff8183e720 T em_set_eee_i350 +ffffffff8183e870 T em_init_hw +ffffffff818407a0 T em_phy_reset +ffffffff81840a20 T em_clear_vfta_i350 +ffffffff81840c60 T em_read_phy_reg +ffffffff81840e50 T em_setup_link +ffffffff818436d0 T em_enable_tx_pkt_filtering +ffffffff81843b70 T em_clear_hw_cntrs +ffffffff81844740 T em_write_phy_reg +ffffffff81844900 T em_power_up_serdes_link_82575 +ffffffff81844a20 T em_copper_link_autoneg +ffffffff81844b80 T em_phy_setup_autoneg +ffffffff81844d00 T em_copper_link_postconfig +ffffffff81844e00 T em_config_collision_dist +ffffffff81844ea0 t em_config_mac_to_phy +ffffffff81845040 t em_config_fc_after_link_up +ffffffff818452e0 t em_config_dsp_after_link_change +ffffffff81845e10 T em_force_mac_fc +ffffffff81845ee0 T em_check_for_link +ffffffff818466b0 T em_get_pcs_speed_and_duplex_82575 +ffffffff81846770 T em_k1_gig_workaround_hv +ffffffff818468d0 T em_link_stall_workaround_hv +ffffffff818469d0 T em_k1_workaround_lv +ffffffff81846aa0 T em_k1_workaround_lpt_lp +ffffffff81846e00 t em_check_downshift +ffffffff81846ec0 T em_set_eee_pchlan +ffffffff81846f70 t em_polarity_reversal_workaround +ffffffff81847250 T em_get_speed_and_duplex +ffffffff81847800 T em_access_phy_wakeup_reg_bm +ffffffff818479c0 t em_write_phy_reg_ex +ffffffff81847c90 t em_read_phy_reg_ex +ffffffff81848260 T em_access_phy_debug_regs_hv +ffffffff81848340 T em_access_phy_reg_hv +ffffffff818484d0 t em_swfw_sync_acquire +ffffffff818486c0 t em_swfw_sync_release +ffffffff81848860 T em_sgmii_uses_mdio_82575 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em_rar_set +ffffffff8184c0f0 T em_get_bus_info +ffffffff8184c290 T em_check_mng_mode +ffffffff8184c310 T em_valid_nvm_bank_detect_ich8lan +ffffffff8184c4f0 T em_read_eeprom_spt +ffffffff8184c7e0 t em_release_software_flag +ffffffff8184c8a0 T em_read_ich8_data32 +ffffffff8184ca50 t em_ich8_cycle_init +ffffffff8184cc30 t em_ich8_flash_cycle +ffffffff8184cda0 T em_configure_k1_ich8lan +ffffffff8184d050 t em_toggle_lanphypc_pch_lpt +ffffffff8184d210 t em_copper_link_ggp_setup +ffffffff8184d570 t em_copper_link_82580_setup +ffffffff8184d610 t em_copper_link_rtl8211_setup +ffffffff8184d940 t em_phy_reset_dsp +ffffffff8184d9e0 t em_get_hw_eeprom_semaphore +ffffffff8184db90 t em_shift_out_mdi_bits +ffffffff8184dd70 t em_erase_ich8_4k_segment +ffffffff8184e000 t em_write_ich8_byte +ffffffff8184e1c0 t em_read_ich8_data +ffffffff8184f000 T em_lookup_gcu +ffffffff8184f030 T em_attach_miibus +ffffffff8184f060 T gcu_miibus_readreg +ffffffff8184f210 T gcu_miibus_writereg +ffffffff8184f390 T gcu_miibus_statchg +ffffffff81850000 T ixgb_probe +ffffffff81850030 T ixgb_attach +ffffffff81850560 T ixgb_local_timer +ffffffff81850630 T ixgb_identify_hardware +ffffffff81850750 T ixgb_allocate_pci_resources +ffffffff81850920 T ixgb_dma_malloc +ffffffff81850b80 T ixgb_hardware_init +ffffffff81850c60 T ixgb_setup_interface +ffffffff81850dd0 T ixgb_update_stats_counters +ffffffff818518e0 T ixgb_update_link_status +ffffffff81851960 T ixgb_dma_free +ffffffff81851a40 T ixgb_free_pci_resources +ffffffff81851ad0 T ixgb_start +ffffffff81851d80 T ixgb_encap +ffffffff81851fa0 T ixgb_ioctl +ffffffff818522c0 T ixgb_init +ffffffff818528d0 T ixgb_set_promisc +ffffffff81852950 T ixgb_stop +ffffffff81852a00 T ixgb_disable_intr +ffffffff81852a30 T ixgb_set_multi +ffffffff81852b60 T ixgb_enable_intr +ffffffff81852bb0 T ixgb_watchdog +ffffffff81852c60 T ixgb_enable_hw_vlans +ffffffff81852cc0 T ixgb_setup_transmit_structures +ffffffff81852e70 T ixgb_initialize_transmit_unit +ffffffff81853020 T ixgb_setup_receive_structures +ffffffff818530b0 T ixgb_initialize_receive_unit +ffffffff818533c0 T ixgb_intr +ffffffff81853600 T ixgb_rxeof +ffffffff81853aa0 T ixgb_txeof +ffffffff81853cb0 T ixgb_media_status +ffffffff81853da0 T ixgb_media_change +ffffffff81853df0 T ixgb_free_transmit_structures +ffffffff81853f50 T ixgb_free_receive_structures +ffffffff818540b0 T ixgb_allocate_transmit_structures +ffffffff81854140 T ixgb_transmit_checksum_setup +ffffffff81854240 T ixgb_get_buf +ffffffff81854420 T ixgb_allocate_receive_structures +ffffffff818545e0 T ixgb_receive_checksum +ffffffff81854640 T ixgb_write_pci_cfg +ffffffff81855000 T ixgb_validate_eeprom_checksum +ffffffff81855080 T ixgb_read_eeprom +ffffffff818553b0 T ixgb_update_eeprom_checksum +ffffffff81855420 T ixgb_write_eeprom +ffffffff81855aa0 t ixgb_shift_out_bits +ffffffff81855c10 T ixgb_get_eeprom_data +ffffffff81855cc0 T ixgb_get_eeprom_word +ffffffff81855da0 T ixgb_get_ee_mac_addr +ffffffff81855ea0 T ixgb_get_ee_pba_number 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ixgbe_allocate_legacy +ffffffff8185b670 T ixgbe_setup_interface +ffffffff8185ba60 T ixgbe_free_transmit_structures +ffffffff8185baf0 T ixgbe_free_receive_structures +ffffffff8185bbc0 T ixgbe_free_pci_resources +ffffffff8185bcb0 T ixgbe_stop +ffffffff8185c040 T ixgbe_init +ffffffff8185ce70 T ixgbe_start +ffffffff8185d070 T ixgbe_encap +ffffffff8185d4d0 T ixgbe_ioctl +ffffffff8185d8b0 T ixgbe_rxrinfo +ffffffff8185da20 T ixgbe_get_sffpage +ffffffff8185dbf0 T ixgbe_disable_intr +ffffffff8185dce0 T ixgbe_iff +ffffffff8185de70 T ixgbe_enable_intr +ffffffff8185df90 T ixgbe_enable_queues +ffffffff8185e0a0 T ixgbe_watchdog +ffffffff8185e2e0 T ixgbe_setup_transmit_structures +ffffffff8185e3c0 T ixgbe_initialize_transmit_units +ffffffff8185e700 T ixgbe_setup_receive_structures +ffffffff8185e840 T ixgbe_initialize_receive_units +ffffffff8185edc0 T ixgbe_config_gpie +ffffffff8185eea0 T ixgbe_setup_vlan_hw_support +ffffffff8185f040 T ixgbe_configure_ivars +ffffffff8185f220 T ixgbe_set_ivar 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ixgbe_free_transmit_buffers +ffffffff81861b20 T ixgbe_get_buf +ffffffff81861c90 T ixgbe_allocate_receive_buffers +ffffffff81861df0 T ixgbe_setup_receive_ring +ffffffff81861f00 T ixgbe_rxfill +ffffffff81862070 T ixgbe_initialize_rss_mapping +ffffffff81862360 T ixgbe_map_queue_statistics +ffffffff81862490 T ixgbe_free_receive_buffers +ffffffff818625e0 T ixgbe_rx_offload +ffffffff818627c0 T ixgbe_read_pci_cfg +ffffffff81862820 T ixgbe_write_pci_cfg +ffffffff818628a0 t ix_kstats_read +ffffffff81862a90 t ix_rxq_kstats_read +ffffffff81862c30 t ix_txq_kstats_read +ffffffff81863000 T ixgbe_init_ops_generic +ffffffff81863270 T ixgbe_init_eeprom_params_generic +ffffffff81863330 T ixgbe_read_eerd_generic +ffffffff81863460 T ixgbe_read_eeprom_bit_bang_generic +ffffffff818637c0 T ixgbe_write_eeprom_generic +ffffffff81863d50 T ixgbe_validate_eeprom_checksum_generic +ffffffff81863e30 T ixgbe_update_eeprom_checksum_generic +ffffffff81863ed0 T ixgbe_calc_eeprom_checksum_generic +ffffffff81864090 T ixgbe_init_hw_generic +ffffffff818640f0 T ixgbe_start_hw_generic +ffffffff81864260 T ixgbe_clear_hw_cntrs_generic +ffffffff81864f40 T ixgbe_enable_rx_dma_generic +ffffffff81864fa0 T ixgbe_get_mac_addr_generic +ffffffff81865050 T ixgbe_stop_adapter_generic +ffffffff81865200 T ixgbe_get_bus_info_generic +ffffffff818652c0 T ixgbe_set_lan_id_multi_port_pcie +ffffffff818653b0 T ixgbe_acquire_swfw_sync +ffffffff81865680 T ixgbe_release_swfw_sync +ffffffff81865760 T prot_autoc_read_generic +ffffffff818657c0 T prot_autoc_write_generic +ffffffff81865820 T ixgbe_led_on_generic +ffffffff81865900 T ixgbe_led_off_generic +ffffffff818659d0 T ixgbe_blink_led_start_generic +ffffffff81865b90 T ixgbe_blink_led_stop_generic +ffffffff81865ce0 T ixgbe_set_rar_generic +ffffffff81865e20 T ixgbe_clear_rar_generic +ffffffff81865f40 T ixgbe_init_rx_addrs_generic +ffffffff81866160 T ixgbe_update_mc_addr_list_generic +ffffffff81866380 T ixgbe_enable_mc_generic +ffffffff818663f0 T ixgbe_disable_mc_generic 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ixgbe_enable_tx_laser_multispeed_fiber +ffffffff81870360 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff818704f0 T ixgbe_setup_mac_link_82599 +ffffffff818707c0 T ixgbe_set_hard_rate_select_speed +ffffffff81870890 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff81870970 T ixgbe_setup_mac_link_smartspeed +ffffffff81870de0 T ixgbe_init_phy_ops_82599 +ffffffff81870f70 T ixgbe_read_i2c_byte_82599 +ffffffff81871130 T ixgbe_write_i2c_byte_82599 +ffffffff818712f0 T ixgbe_setup_copper_link_82599 +ffffffff81871360 T ixgbe_setup_sfp_modules_82599 +ffffffff81871590 T prot_autoc_read_82599 +ffffffff818716f0 T prot_autoc_write_82599 +ffffffff818718b0 T ixgbe_reset_pipeline_82599 +ffffffff81871ce0 T ixgbe_init_ops_82599 +ffffffff81871ef0 T ixgbe_identify_phy_82599 +ffffffff81871fa0 T ixgbe_reset_hw_82599 +ffffffff818723e0 T ixgbe_get_media_type_82599 +ffffffff81872510 T ixgbe_get_supported_physical_layer_82599 +ffffffff81872700 T ixgbe_enable_rx_dma_82599 +ffffffff81872790 T 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iwn_dma_contig_alloc +ffffffff818f8080 T iwn_dma_contig_free +ffffffff818f8170 T iwn_reset_rx_ring +ffffffff818f8340 T iwn_reset_tx_ring +ffffffff818f8470 T iwn5000_ict_reset +ffffffff818f8570 T iwn_apm_init +ffffffff818f8aa0 T iwn_apm_stop +ffffffff818f8c20 T iwn_read_eeprom_channels +ffffffff818f8dc0 T iwn_read_eeprom_enhinfo +ffffffff818f8f50 T iwn_scan_abort +ffffffff818f9110 T iwn_set_led +ffffffff818f9300 T iwn_cmd +ffffffff818f96a0 T iwn_scan +ffffffff818f9be0 T iwn_auth +ffffffff818f9ec0 T iwn_run +ffffffff818fa3b0 T iwn_iter_func +ffffffff818fa450 T iwn_set_link_quality +ffffffff818fa910 T iwn_ccmp_decap +ffffffff818faa20 T iwn_rx_phy +ffffffff818fab10 T iwn_rx_done +ffffffff818fb1b0 T iwn_ra_choose +ffffffff818fb240 T iwn_ampdu_rate_control +ffffffff818fb3a0 T iwn_ht_single_rate_control +ffffffff818fb5d0 T iwn_rx_compressed_ba +ffffffff818fb7a0 T iwn_ampdu_txq_advance +ffffffff818fb950 T iwn_clear_oactive +ffffffff818fb9d0 T iwn5000_rx_calib_results +ffffffff818fbb50 T iwn_rx_statistics +ffffffff818fbd10 T iwn4965_power_calibration +ffffffff818fbd60 T iwn_get_noise +ffffffff818fbdd0 T iwn_collect_noise +ffffffff818fc100 T iwn_tune_sensitivity +ffffffff818fc8c0 T iwn_tx_done_free_txdata +ffffffff818fc990 T iwn_ampdu_tx_done +ffffffff818fcc70 T iwn_tx_done +ffffffff818fcf00 T iwn_cmd_done +ffffffff818fd000 T iwn_notif_intr +ffffffff818fd760 T iwn_init_sensitivity +ffffffff818fda50 T iwn_wakeup_intr +ffffffff818fdb30 T iwn_fatal_intr +ffffffff818fdec0 T iwn_rval2ridx +ffffffff818fdf40 T iwn_tx +ffffffff818feae0 T iwn_rxon_ht40_enabled +ffffffff818feb20 T iwn_set_pslevel +ffffffff818fecf0 T iwn_add_broadcast_node +ffffffff818fef40 T iwn_set_critical_temp +ffffffff818ff150 T iwn_set_timing +ffffffff818ff340 T iwn_send_sensitivity +ffffffff818ff450 T iwn_send_btcoex +ffffffff818ff610 T iwn_send_advanced_btcoex +ffffffff818ffde0 T iwn5000_runtime_calib +ffffffff818ffff0 T iwn_config +ffffffff81900550 T iwn6000_temp_offset_calib +ffffffff81900720 T iwn2000_temp_offset_calib +ffffffff81900920 T iwn_get_active_dwell_time +ffffffff81900960 T iwn_limit_dwell +ffffffff819009d0 T iwn_get_passive_dwell_time +ffffffff81900a50 T iwn_rxon_configure_ht40 +ffffffff81900af0 T iwn_update_rxon_restore_power +ffffffff81900df0 T iwn5000_query_calibration +ffffffff81901070 T iwn5000_send_calibration +ffffffff819011f0 T iwn5000_send_wimax_coex +ffffffff819013e0 T iwn5000_crystal_calib +ffffffff819015b0 T iwn_hw_stop +ffffffff81901aa0 T iwn_hw_init +ffffffff819022d0 T iwn4965_load_bootcode +ffffffff81902760 T iwn5000_load_firmware_section +ffffffff81902a30 T iwn_read_firmware_leg +ffffffff81902b50 T iwn_read_firmware_tlv +ffffffff81902de0 T iwn_read_firmware +ffffffff81903050 T iwn_apm_stop_master +ffffffff81904000 T iwm_lookup_cmd_ver +ffffffff81904070 T iwm_is_mimo_ht_plcp +ffffffff819040b0 T iwm_is_mimo_ht_mcs +ffffffff81904100 T iwm_store_cscheme +ffffffff81904150 T iwm_firmware_store_section +ffffffff819041f0 T iwm_set_default_calib +ffffffff81904240 T iwm_fw_info_free +ffffffff819042a0 T iwm_fw_version_str +ffffffff819042e0 T iwm_read_firmware +ffffffff81904c00 T iwm_read_prph_unlocked +ffffffff81904c70 T iwm_read_prph +ffffffff81904d00 T iwm_nic_assert_locked +ffffffff81904d60 T iwm_write_prph_unlocked +ffffffff81904dd0 T iwm_write_prph +ffffffff81904e60 T iwm_write_prph64 +ffffffff81904f80 T iwm_read_mem +ffffffff819050e0 T iwm_nic_lock +ffffffff81905260 T iwm_nic_unlock +ffffffff81905320 T iwm_write_mem +ffffffff81905490 T iwm_write_mem32 +ffffffff819055c0 T iwm_poll_bit +ffffffff819056b0 T iwm_set_bits_mask_prph +ffffffff81905890 T iwm_set_bits_prph +ffffffff819058b0 T iwm_clear_bits_prph +ffffffff819058d0 T iwm_dma_contig_alloc +ffffffff81905b20 T iwm_dma_contig_free +ffffffff81905c10 T iwm_alloc_rx_ring +ffffffff81905e20 T iwm_rx_addbuf +ffffffff81906040 T iwm_free_rx_ring +ffffffff819063b0 T iwm_disable_rx_dma +ffffffff81906630 T iwm_reset_rx_ring +ffffffff819066c0 T iwm_alloc_tx_ring +ffffffff819068d0 T iwm_free_tx_ring +ffffffff81906b60 T iwm_reset_tx_ring +ffffffff81906d70 T iwm_enable_rfkill_int +ffffffff81906ec0 T iwm_check_rfkill +ffffffff81906f50 T iwm_enable_interrupts +ffffffff81907010 T iwm_enable_fwload_interrupt +ffffffff819070f0 T iwm_restore_interrupts +ffffffff81907120 T iwm_disable_interrupts +ffffffff819071f0 T iwm_ict_reset +ffffffff81907400 T iwm_set_hw_ready +ffffffff81907660 T iwm_prepare_card_hw +ffffffff819077e0 T iwm_apm_config +ffffffff819078e0 T iwm_apm_init +ffffffff81908170 T iwm_apm_stop +ffffffff81908650 T iwm_init_msix_hw +ffffffff81908710 T iwm_conf_msix_hw +ffffffff81908da0 T iwm_clear_persistence_bit +ffffffff81908f30 T iwm_start_hw +ffffffff819091c0 T iwm_stop_device +ffffffff81909910 T iwm_nic_config +ffffffff81909a00 T iwm_nic_rx_init +ffffffff81909a20 T iwm_nic_rx_mq_init +ffffffff81909ef0 T iwm_nic_rx_legacy_init +ffffffff8190a1b0 T iwm_nic_tx_init +ffffffff8190a3e0 T iwm_nic_init +ffffffff8190a590 T iwm_enable_ac_txq +ffffffff8190aae0 T iwm_enable_txq +ffffffff8190acd0 T iwm_send_cmd_pdu +ffffffff8190ad60 T iwm_disable_txq +ffffffff8190ae40 T iwm_post_alive +ffffffff8190b4f0 T iwm_phy_db_get_section +ffffffff8190b590 T iwm_phy_db_set_section +ffffffff8190b6f0 T iwm_is_valid_channel +ffffffff8190b760 T iwm_ch_id_to_ch_index +ffffffff8190b7e0 T iwm_channel_id_to_papd +ffffffff8190b880 T iwm_channel_id_to_txp +ffffffff8190ba10 T iwm_phy_db_get_section_data +ffffffff8190bba0 T iwm_send_phy_db_cmd +ffffffff8190bc50 T iwm_send_cmd +ffffffff8190c3e0 T iwm_phy_db_send_all_channel_groups +ffffffff8190c5d0 T iwm_send_phy_db_data +ffffffff8190c840 T iwm_send_time_event_cmd +ffffffff8190c960 T iwm_free_resp +ffffffff8190c9e0 T iwm_protect_session +ffffffff8190caa0 T iwm_unprotect_session +ffffffff8190cb50 T iwm_nvm_read_chunk +ffffffff8190ccc0 T iwm_nvm_read_section +ffffffff8190cd90 T iwm_fw_valid_tx_ant +ffffffff8190cdd0 T iwm_fw_valid_rx_ant +ffffffff8190ce20 T iwm_valid_siso_ant_rate_mask +ffffffff8190ce80 T iwm_init_channel_map +ffffffff8190cff0 T iwm_mimo_enabled +ffffffff8190d030 T iwm_setup_ht_rates +ffffffff8190d0e0 T iwm_setup_vht_rates +ffffffff8190d170 T iwm_init_reorder_buffer +ffffffff8190d1d0 T iwm_clear_reorder_buffer +ffffffff8190d2a0 T iwm_rx_ba_session_expired +ffffffff8190d3d0 T iwm_reorder_timer_expired +ffffffff8190d5c0 T iwm_release_frames +ffffffff8190d7d0 T iwm_sta_rx_agg +ffffffff8190dd30 T iwm_send_cmd_pdu_status +ffffffff8190ddc0 T iwm_mac_ctxt_task +ffffffff8190df50 T iwm_mac_ctxt_cmd +ffffffff8190e170 T iwm_updateprot +ffffffff8190e250 T iwm_add_task +ffffffff8190e2e0 T iwm_updateslot +ffffffff8190e3c0 T iwm_updateedca +ffffffff8190e4a0 T iwm_phy_ctxt_task +ffffffff8190e680 T iwm_phy_ctxt_update +ffffffff8190e820 T iwm_setrates +ffffffff8190e9d0 T iwm_updatechan +ffffffff8190eab0 T iwm_updatedtim +ffffffff8190eb90 T iwm_sta_tx_agg +ffffffff8190f0e0 T iwm_flush_sta +ffffffff8190f2c0 T iwm_txq_advance +ffffffff8190f4e0 T iwm_clear_oactive +ffffffff8190f560 T iwm_ba_task +ffffffff8190f7d0 T iwm_ampdu_rx_start +ffffffff8190f8d0 T iwm_ampdu_rx_stop +ffffffff8190f9d0 T iwm_ampdu_tx_start +ffffffff8190fa90 T iwm_ampdu_tx_stop +ffffffff8190fb90 T iwm_set_hw_address_8000 +ffffffff8190fe80 T iwm_parse_nvm_data +ffffffff81910100 T iwm_parse_nvm_sections +ffffffff81910220 T iwm_nvm_init +ffffffff81910520 T iwm_firmware_load_sect +ffffffff819105e0 T iwm_firmware_load_chunk +ffffffff81910910 T iwm_load_firmware_7000 +ffffffff81910b90 T iwm_load_cpu_sections_8000 +ffffffff81910fc0 T iwm_load_firmware_8000 +ffffffff81911220 T iwm_load_firmware +ffffffff81911320 T iwm_start_fw +ffffffff81911540 T iwm_send_tx_ant_cfg +ffffffff819115e0 T iwm_send_phy_cfg_cmd +ffffffff819116a0 T iwm_send_dqa_cmd +ffffffff81911740 T iwm_load_ucode_wait_alive +ffffffff819118d0 T iwm_save_fw_paging +ffffffff81911940 T iwm_send_paging_cmd +ffffffff81911ab0 T iwm_free_fw_paging +ffffffff81911c40 T iwm_run_init_mvm_ucode +ffffffff81912000 T iwm_send_bt_init_conf +ffffffff819120a0 T iwm_sf_config +ffffffff819122c0 T iwm_config_ltr +ffffffff81912380 T iwm_get_signal_strength +ffffffff819123e0 T iwm_rxmq_get_signal_strength +ffffffff81912430 T iwm_rx_rx_phy_cmd +ffffffff819124a0 T iwm_get_noise +ffffffff81912510 T iwm_ccmp_decap +ffffffff81912620 T iwm_rx_hwdecrypt +ffffffff81912700 T iwm_rx_frame +ffffffff81912a60 T iwm_rx_mpdu +ffffffff81912c80 T iwm_flip_address +ffffffff81912ce0 T iwm_detect_duplicate +ffffffff81912e00 T iwm_is_sn_less +ffffffff81912e60 T iwm_oldsn_workaround +ffffffff81912f30 T iwm_rx_reorder +ffffffff81913500 T iwm_rx_mpdu_mq +ffffffff81913950 T iwm_ra_choose +ffffffff81913a20 T iwm_ht_single_rate_control +ffffffff81913c80 T iwm_vht_single_rate_control +ffffffff81913f00 T iwm_rx_tx_cmd_single +ffffffff819140f0 T iwm_txd_done +ffffffff819141f0 T iwm_reset_sched +ffffffff819142a0 T iwm_ampdu_tx_done +ffffffff81914650 T iwm_rx_tx_cmd +ffffffff81914860 T iwm_ampdu_rate_control +ffffffff81914a20 T iwm_rx_compressed_ba +ffffffff81914bc0 T iwm_rx_bmiss +ffffffff81914cd0 T iwm_binding_cmd +ffffffff81914e70 T iwm_phy_ctxt_cmd_hdr +ffffffff81914ee0 T iwm_phy_ctxt_cmd_data +ffffffff81915060 T iwm_get_vht_ctrl_pos +ffffffff819150d0 T iwm_phy_ctxt_cmd_uhb +ffffffff81915310 T iwm_phy_ctxt_cmd +ffffffff81915470 T iwm_update_sched +ffffffff81915540 T iwm_send_cmd_status +ffffffff81915670 T iwm_cmd_done +ffffffff81915840 T iwm_tx_fill_cmd +ffffffff81915c60 T iwm_rval2ridx +ffffffff81915cf0 T iwm_tx +ffffffff81916850 T iwm_flush_tx_path +ffffffff81916920 T iwm_wait_tx_queues_empty +ffffffff819169e0 T iwm_led_enable +ffffffff81916a10 T iwm_led_disable +ffffffff81916a40 T iwm_led_is_enabled +ffffffff81916aa0 T iwm_led_blink_timeout +ffffffff81916b30 T iwm_led_blink_start +ffffffff81916b90 T iwm_led_blink_stop +ffffffff81916be0 T iwm_beacon_filter_send_cmd +ffffffff81916c70 T iwm_beacon_filter_set_cqm_params +ffffffff81916cb0 T iwm_update_beacon_abort +ffffffff81916db0 T iwm_power_build_cmd +ffffffff81916e40 T iwm_power_mac_update_mode +ffffffff81917060 T iwm_power_update_device +ffffffff81917110 T iwm_enable_beacon_filter +ffffffff81917210 T iwm_disable_beacon_filter +ffffffff819172f0 T iwm_add_sta_cmd +ffffffff819176f0 T iwm_add_aux_sta +ffffffff819178a0 T iwm_drain_sta +ffffffff81917a60 T iwm_rm_sta_cmd +ffffffff81917b40 T iwm_scan_rx_chain +ffffffff81917bb0 T iwm_scan_rate_n_flags +ffffffff81917cb0 T iwm_lmac_scan_fill_channels +ffffffff81917da0 T iwm_umac_scan_fill_channels +ffffffff81917e80 T iwm_fill_probe_req_v1 +ffffffff81917f30 T iwm_fill_probe_req +ffffffff819181a0 T iwm_lmac_scan +ffffffff819186d0 T iwm_config_umac_scan +ffffffff81918910 T iwm_umac_scan_size +ffffffff81918980 T iwm_get_scan_req_umac_chan_param +ffffffff819189d0 T iwm_get_scan_req_umac_data +ffffffff81918a20 T iwm_umac_scan +ffffffff81918ec0 T iwm_mcc_update +ffffffff81918f60 T iwm_ridx2rate +ffffffff81918fd0 T iwm_ack_rates +ffffffff81919290 T iwm_mac_ctxt_cmd_common +ffffffff819195b0 T iwm_mac_ctxt_cmd_fill_sta +ffffffff81919670 T iwm_update_quotas +ffffffff81919a40 T iwm_del_task +ffffffff81919aa0 T iwm_scan +ffffffff81919d60 T iwm_scan_abort +ffffffff81919ea0 T iwm_bgscan +ffffffff81919f50 T iwm_bgscan_done +ffffffff8191a020 T iwm_bgscan_done_task +ffffffff8191a2b0 T iwm_umac_scan_abort +ffffffff8191a350 T iwm_lmac_scan_abort +ffffffff8191a3f0 T iwm_auth +ffffffff8191a7e0 T iwm_deauth +ffffffff8191aba0 T iwm_run +ffffffff8191b180 T iwm_allow_mcast +ffffffff8191b2a0 T iwm_run_stop +ffffffff8191b970 T iwm_node_alloc +ffffffff8191b990 T iwm_set_key_v1 +ffffffff8191bae0 T iwm_set_key +ffffffff8191bd70 T iwm_delete_key_v1 +ffffffff8191beb0 T iwm_delete_key +ffffffff8191c140 T iwm_calib_timeout +ffffffff8191c210 T iwm_set_rate_table_vht +ffffffff8191c570 T iwm_set_rate_table +ffffffff8191c940 T iwm_media_change +ffffffff8191cb50 T iwm_stop +ffffffff8191d080 T iwm_init +ffffffff8191d3a0 T iwm_newstate_task +ffffffff8191d570 T iwm_newstate +ffffffff8191d720 T iwm_endscan +ffffffff8191d770 T iwm_fill_sf_command +ffffffff8191d840 T iwm_send_soc_conf +ffffffff8191d990 T iwm_send_update_mcc_cmd +ffffffff8191db50 T iwm_send_temp_report_ths_cmd +ffffffff8191dc30 T iwm_tt_tx_backoff +ffffffff8191dcd0 T iwm_fill_paging_mem +ffffffff8191e090 T iwm_alloc_fw_paging_mem +ffffffff8191e4c0 T iwm_init_hw +ffffffff8191ec70 T iwm_preinit +ffffffff8191ee70 T iwm_start +ffffffff8191f060 T iwm_watchdog +ffffffff8191f230 T iwm_nic_error +ffffffff8191f8a0 T iwm_dump_driver_status +ffffffff8191f960 T iwm_ioctl +ffffffff8191fb00 T iwm_nic_umac_error +ffffffff819200a0 T iwm_desc_lookup +ffffffff81920230 T iwm_rx_pkt_valid +ffffffff81920280 T iwm_rx_pkt +ffffffff819211c0 T iwm_notif_intr +ffffffff81921350 T iwm_intr +ffffffff81921810 T iwm_intr_msix +ffffffff81921b20 T iwm_match +ffffffff81921b50 T iwm_attach_hook +ffffffff81921b90 T iwm_attach +ffffffff81922b10 T iwm_radiotap_attach +ffffffff81922bb0 T iwm_init_task +ffffffff81922ca0 T iwm_resume +ffffffff81922e20 T iwm_wakeup +ffffffff81922ef0 T iwm_activate +ffffffff81924000 T iwx_lookup_cmd_ver +ffffffff81924070 T iwx_lookup_notif_ver +ffffffff819240e0 T iwx_is_mimo_ht_plcp +ffffffff81924120 T iwx_store_cscheme +ffffffff81924170 T iwx_ctxt_info_alloc_dma +ffffffff81924220 T iwx_dma_contig_alloc +ffffffff81924470 T iwx_ctxt_info_free_paging +ffffffff81924610 T iwx_dma_contig_free +ffffffff81924700 T iwx_get_num_sections +ffffffff81924780 T iwx_init_fw_sec +ffffffff81924c30 T iwx_fw_version_str +ffffffff81924c70 T iwx_alloc_fw_monitor_block +ffffffff81924d20 T iwx_alloc_fw_monitor +ffffffff81924df0 T iwx_apply_debug_destination +ffffffff819253c0 T iwx_nic_lock +ffffffff81925540 T iwx_write_prph +ffffffff819255f0 T iwx_set_bits_prph +ffffffff81925610 T iwx_clear_bits_prph +ffffffff81925630 T iwx_read_prph +ffffffff819256d0 T iwx_nic_unlock +ffffffff81925790 T iwx_set_ltr +ffffffff819258f0 T iwx_ctxt_info_init +ffffffff81925c50 T iwx_ctxt_info_free_fw_img +ffffffff81925e10 T iwx_ctxt_info_gen3_init +ffffffff81926560 T iwx_write_umac_prph +ffffffff81926610 T iwx_firmware_store_section +ffffffff819266b0 T iwx_set_default_calib +ffffffff81926700 T iwx_fw_info_free +ffffffff819267b0 T iwx_read_firmware +ffffffff81927320 T iwx_prph_addr_mask +ffffffff81927360 T iwx_read_prph_unlocked +ffffffff819273e0 T iwx_nic_assert_locked +ffffffff81927440 T iwx_write_prph_unlocked +ffffffff819274d0 T iwx_write_prph64 +ffffffff81927610 T iwx_read_umac_prph_unlocked +ffffffff819276a0 T iwx_read_umac_prph +ffffffff81927750 T iwx_write_umac_prph_unlocked +ffffffff819277e0 T iwx_read_mem +ffffffff81927940 T iwx_write_mem +ffffffff81927ab0 T iwx_write_mem32 +ffffffff81927be0 T iwx_poll_bit +ffffffff81927cd0 T iwx_set_bits_mask_prph +ffffffff81927f00 T iwx_alloc_rx_ring +ffffffff81928110 T iwx_rx_addbuf +ffffffff81928360 T iwx_free_rx_ring +ffffffff819286d0 T iwx_disable_rx_dma +ffffffff81928960 T iwx_reset_rx_ring +ffffffff81928a00 T iwx_alloc_tx_ring +ffffffff81928c30 T iwx_free_tx_ring +ffffffff81928f90 T iwx_reset_tx_ring +ffffffff81929230 T iwx_enable_rfkill_int +ffffffff81929330 T iwx_check_rfkill +ffffffff819293c0 T iwx_enable_interrupts +ffffffff81929480 T iwx_enable_fwload_interrupt +ffffffff81929570 T iwx_restore_interrupts +ffffffff819295a0 T iwx_disable_interrupts +ffffffff81929670 T iwx_ict_reset +ffffffff81929880 T iwx_set_hw_ready +ffffffff81929ae0 T iwx_prepare_card_hw +ffffffff81929c60 T iwx_force_power_gating +ffffffff81929d30 T iwx_apm_config +ffffffff81929e30 T iwx_apm_init +ffffffff8192a120 T iwx_apm_stop +ffffffff8192a600 T iwx_init_msix_hw +ffffffff8192a6c0 T iwx_conf_msix_hw +ffffffff8192ad90 T iwx_clear_persistence_bit +ffffffff8192af50 T iwx_start_hw +ffffffff8192b430 T iwx_stop_device +ffffffff8192bb20 T iwx_nic_config +ffffffff8192bbb0 T iwx_nic_rx_init +ffffffff8192bc10 T iwx_nic_init +ffffffff8192bd60 T iwx_enable_txq +ffffffff8192c080 T iwx_send_cmd +ffffffff8192c6d0 T iwx_free_resp +ffffffff8192c750 T iwx_disable_txq +ffffffff8192c9c0 T iwx_post_alive +ffffffff8192ca60 T iwx_schedule_session_protection +ffffffff8192cb40 T iwx_send_cmd_pdu +ffffffff8192cbd0 T iwx_unprotect_session +ffffffff8192ccb0 T iwx_fw_valid_tx_ant +ffffffff8192ccf0 T iwx_fw_valid_rx_ant +ffffffff8192cd40 T iwx_init_channel_map +ffffffff8192cf50 T iwx_mimo_enabled +ffffffff8192cf90 T iwx_setup_ht_rates +ffffffff8192d040 T iwx_setup_vht_rates +ffffffff8192d0d0 T iwx_init_reorder_buffer +ffffffff8192d130 T iwx_clear_reorder_buffer +ffffffff8192d200 T iwx_rx_ba_session_expired +ffffffff8192d330 T iwx_rx_bar_frame_release +ffffffff8192d3e0 T iwx_release_frames +ffffffff8192d5f0 T iwx_reorder_timer_expired +ffffffff8192d7e0 T iwx_find_rxba_data +ffffffff8192d870 T iwx_sta_rx_agg_baid_cfg_cmd +ffffffff8192dad0 T iwx_send_cmd_pdu_status +ffffffff8192db60 T iwx_sta_rx_agg_sta_cmd +ffffffff8192ddc0 T iwx_sta_rx_agg +ffffffff8192e0e0 T iwx_mac_ctxt_task +ffffffff8192e2a0 T iwx_mac_ctxt_cmd +ffffffff8192e4c0 T iwx_phy_ctxt_task +ffffffff8192e690 T iwx_phy_ctxt_update +ffffffff8192eb20 T iwx_updatechan +ffffffff8192ec00 T iwx_add_task +ffffffff8192ec90 T iwx_updateprot +ffffffff8192ed70 T iwx_updateslot +ffffffff8192ee50 T iwx_updateedca +ffffffff8192ef30 T iwx_updatedtim +ffffffff8192f010 T iwx_sta_tx_agg_start +ffffffff8192f240 T iwx_ba_task +ffffffff8192f3c0 T iwx_ampdu_rx_start +ffffffff8192f4c0 T iwx_ampdu_rx_stop +ffffffff8192f5c0 T iwx_ampdu_tx_start +ffffffff8192f670 T iwx_set_mac_addr_from_csr +ffffffff8192f8d0 T iwx_flip_hw_address +ffffffff8192f920 T iwx_is_valid_mac_addr +ffffffff8192f9d0 T iwx_nvm_get +ffffffff8192fcf0 T iwx_load_firmware +ffffffff8192ff20 T iwx_start_fw +ffffffff81930160 T iwx_pnvm_handle_section +ffffffff819304b0 T iwx_ctxt_info_gen3_set_pnvm +ffffffff81930500 T iwx_pnvm_parse +ffffffff819305f0 T iwx_load_pnvm +ffffffff81930a20 T iwx_send_tx_ant_cfg +ffffffff81930ac0 T iwx_send_phy_cfg_cmd +ffffffff81930b70 T iwx_send_dqa_cmd +ffffffff81930c10 T iwx_load_ucode_wait_alive +ffffffff81930d00 T iwx_run_init_mvm_ucode +ffffffff81930fb0 T iwx_config_ltr +ffffffff81931070 T iwx_update_rx_desc +ffffffff81931110 T iwx_rxmq_get_signal_strength +ffffffff81931160 T iwx_rx_rx_phy_cmd +ffffffff819311d0 T iwx_get_noise +ffffffff81931240 T iwx_ccmp_decap +ffffffff819313a0 T iwx_rx_hwdecrypt +ffffffff819314b0 T iwx_rx_frame +ffffffff81931790 T iwx_detect_duplicate +ffffffff819318b0 T iwx_is_sn_less +ffffffff81931910 T iwx_oldsn_workaround +ffffffff819319e0 T iwx_rx_reorder +ffffffff81931fb0 T iwx_rx_mpdu_mq +ffffffff81932330 T iwx_clear_tx_desc +ffffffff819324d0 T iwx_txd_done +ffffffff819325c0 T iwx_txq_advance +ffffffff81932910 T iwx_tx_update_byte_tbl +ffffffff819329b0 T iwx_rx_tx_cmd +ffffffff81932b30 T iwx_clear_oactive +ffffffff81932bb0 T iwx_rx_compressed_ba +ffffffff81932d40 T iwx_rx_bmiss +ffffffff81932e50 T iwx_binding_cmd +ffffffff81932fe0 T iwx_get_vht_ctrl_pos +ffffffff81933050 T iwx_phy_ctxt_cmd_uhb_v3_v4 +ffffffff819332c0 T iwx_phy_ctxt_cmd_v3_v4 +ffffffff81933530 T iwx_phy_ctxt_cmd +ffffffff81933650 T iwx_send_cmd_status +ffffffff81933780 T iwx_cmd_done +ffffffff81933890 T iwx_fw_rateidx_ofdm +ffffffff819338f0 T iwx_fw_rateidx_cck +ffffffff81933950 T iwx_tx_fill_cmd +ffffffff81933bf0 T iwx_rval2ridx +ffffffff81933c80 T iwx_tx +ffffffff81934480 T iwx_flush_sta_tids +ffffffff81934650 T iwx_drain_sta +ffffffff81934800 T iwx_flush_sta +ffffffff81934af0 T iwx_beacon_filter_send_cmd +ffffffff81934b80 T iwx_update_beacon_abort +ffffffff81934c90 T iwx_power_build_cmd +ffffffff81934d20 T iwx_power_mac_update_mode +ffffffff81934f50 T iwx_power_update_device +ffffffff81935000 T iwx_enable_beacon_filter +ffffffff81935120 T iwx_disable_beacon_filter +ffffffff81935220 T iwx_add_sta_cmd +ffffffff81935530 T iwx_rm_sta_cmd +ffffffff81935600 T iwx_rm_sta +ffffffff81935ac0 T iwx_disable_mgmt_queue +ffffffff81935bc0 T iwx_umac_scan_fill_channels +ffffffff81935ce0 T iwx_fill_probe_req +ffffffff81935f50 T iwx_config_umac_scan_reduced +ffffffff819360c0 T iwx_scan_umac_flags_v2 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iwx_ioctl +ffffffff8193c8f0 T iwx_nic_umac_error +ffffffff8193ce90 T iwx_desc_lookup +ffffffff8193d020 T iwx_rx_pkt_valid +ffffffff8193d070 T iwx_rx_pkt +ffffffff8193e220 T iwx_notif_intr +ffffffff8193e3a0 T iwx_intr +ffffffff8193e8c0 T iwx_intr_msix +ffffffff8193ec20 T iwx_match +ffffffff8193ec50 T iwx_attach_hook +ffffffff8193ec90 T iwx_find_device_cfg +ffffffff8193ee40 T iwx_attach +ffffffff819400d0 T iwx_radiotap_attach +ffffffff81940170 T iwx_init_task +ffffffff81940260 T iwx_resume +ffffffff819403e0 T iwx_wakeup +ffffffff81940500 T iwx_activate +ffffffff81941000 T qwx_pci_match +ffffffff81941030 T qwx_pci_attach +ffffffff81941d30 T qwx_pci_detach +ffffffff81941fa0 T qwx_pci_init_qmi_ce_config +ffffffff81941fc0 T qwx_pcic_init_msi_config +ffffffff81942070 T qwx_pci_alloc_msi +ffffffff81942170 T qwx_pcic_map_service_to_pipe +ffffffff81942270 T qwx_pcic_get_user_msi_vector +ffffffff81942360 T qwx_pcic_read32 +ffffffff81942460 T qwx_pcic_write32 +ffffffff81942570 T qwx_pci_start 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bge_stats_update_regs +ffffffff8195cd90 T bge_stats_update +ffffffff8195cee0 T bge_compact_dma_runt +ffffffff8195d120 T bge_cksum_pad +ffffffff8195d220 T bge_encap +ffffffff8195d5b0 T bge_rxrinfo +ffffffff8195d730 T bge_stop_block +ffffffff8195d820 T bge_kstat_read +ffffffff8195e000 T bnx_probe +ffffffff8195e030 T bnx_attach +ffffffff8195e4a0 T nswaph +ffffffff8195e4f0 T bnx_read_firmware +ffffffff8195f0e0 T bnx_read_rv2p +ffffffff8195f220 T bnx_reg_rd_ind +ffffffff8195f280 T bnx_intr +ffffffff8195f550 T bnx_attachhook +ffffffff8195fa00 T bnx_release_resources +ffffffff8195fa80 T bnx_reset +ffffffff819600d0 T bnx_chipinit +ffffffff819603d0 T bnx_nvram_test +ffffffff81960560 T bnx_get_mac_addr +ffffffff819606a0 T bnx_get_media +ffffffff81960860 T bnx_dma_alloc +ffffffff81961310 T bnx_ioctl +ffffffff81961570 T bnx_start +ffffffff81961740 T bnx_watchdog +ffffffff819617e0 T bnx_miibus_read_reg +ffffffff81961ac0 T bnx_miibus_write_reg +ffffffff81961d60 T bnx_miibus_statchg +ffffffff81961f70 T bnx_init_media +ffffffff81962020 T bnx_ifmedia_upd +ffffffff819620b0 T bnx_ifmedia_sts +ffffffff81962130 T bnx_tick +ffffffff81962270 T bnx_rxrefill +ffffffff819622d0 T bnx_mgmt_init +ffffffff81962420 T bnx_reg_wr_ind +ffffffff81962480 T bnx_ctx_wr +ffffffff819626e0 T bnx_acquire_nvram_lock +ffffffff819627b0 T bnx_release_nvram_lock +ffffffff81962880 T bnx_enable_nvram_access +ffffffff819628e0 T bnx_disable_nvram_access +ffffffff81962940 T bnx_nvram_read_dword +ffffffff81962af0 T bnx_init_nvram +ffffffff81963320 T bnx_nvram_read +ffffffff819636d0 T bnx_dma_free +ffffffff81963d40 T bnx_fw_sync +ffffffff81963f60 T bnx_load_rv2p_fw +ffffffff81964090 T bnx_load_cpu_fw +ffffffff81964660 T bnx_init_cpus +ffffffff81965070 T bnx_init_context +ffffffff81965960 T bnx_set_mac_addr +ffffffff819659e0 T bnx_stop +ffffffff81965d70 T bnx_disable_intr +ffffffff81965dd0 T bnx_free_rx_chain +ffffffff81965ec0 T bnx_free_tx_chain +ffffffff81965ff0 T bnx_blockinit +ffffffff819666e0 T bnx_get_buf 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stge_watchdog +ffffffff8196f870 T stge_txintr +ffffffff8196f9e0 T stge_init +ffffffff81970380 T stge_stop +ffffffff81970630 T stge_iff +ffffffff81970770 T stge_rxintr +ffffffff81970ce0 T stge_stats_update +ffffffff81970e40 T stge_add_rxbuf +ffffffff81971090 T stge_rxdrain +ffffffff81972000 T nfe_match +ffffffff81972030 T nfe_attach +ffffffff819727f0 T nfe_activate +ffffffff81972880 T nfe_stop +ffffffff81972a40 T nfe_init +ffffffff81973130 T nfe_intr +ffffffff81973240 T nfe_get_macaddr +ffffffff81973340 T nfe_alloc_tx_ring +ffffffff81973590 T nfe_alloc_rx_ring +ffffffff81973960 T nfe_free_tx_ring +ffffffff81973b10 T nfe_ioctl +ffffffff81973ca0 T nfe_start +ffffffff81973ed0 T nfe_watchdog +ffffffff81973f40 T nfe_wol +ffffffff81973fc0 T nfe_miibus_readreg +ffffffff81974180 T nfe_miibus_writereg +ffffffff81974320 T nfe_miibus_statchg +ffffffff819744c0 T nfe_ifmedia_upd +ffffffff81974520 T nfe_ifmedia_sts +ffffffff81974590 T nfe_tick +ffffffff81974600 T nfe_rxeof +ffffffff81974a40 T nfe_txeof +ffffffff81974d10 T nfe_iff +ffffffff81975030 T nfe_txdesc32_sync +ffffffff81975070 T nfe_txdesc64_sync +ffffffff819750b0 T nfe_txdesc32_rsync +ffffffff81975150 T nfe_txdesc64_rsync +ffffffff819751f0 T nfe_rxdesc32_sync +ffffffff81975230 T nfe_rxdesc64_sync +ffffffff81975270 T nfe_encap +ffffffff81975540 T nfe_set_macaddr +ffffffff819755b0 T nfe_reset_tx_ring +ffffffff81975710 T nfe_reset_rx_ring +ffffffff819757f0 T nfe_free_rx_ring +ffffffff81976000 T et_match +ffffffff81976030 T et_attach +ffffffff819765e0 T et_detach +ffffffff81976720 T et_intr +ffffffff81976850 T et_bus_config +ffffffff81976900 T et_get_eaddr +ffffffff81976990 T et_reset +ffffffff81976a50 T et_disable_intrs +ffffffff81976a80 T et_dma_alloc +ffffffff81976cb0 T et_ioctl +ffffffff81976e70 T et_start +ffffffff81977060 T et_watchdog +ffffffff819770b0 T et_chip_attach +ffffffff819771e0 T et_miibus_readreg +ffffffff81977370 T et_miibus_writereg +ffffffff819774c0 T et_miibus_statchg +ffffffff819775d0 T et_ifmedia_upd +ffffffff81977660 T et_ifmedia_sts +ffffffff819776d0 T et_tick +ffffffff81977740 T et_txtick +ffffffff81977790 T et_stop +ffffffff81977a50 T et_dma_free +ffffffff81977c90 T et_stop_rxdma +ffffffff81977d60 T et_stop_txdma +ffffffff81977dc0 T et_free_tx_ring +ffffffff81977e90 T et_free_rx_ring +ffffffff81978010 T et_enable_intrs +ffffffff81978040 T et_dma_mem_create +ffffffff81978230 T et_dma_mbuf_create +ffffffff81978600 T et_dma_mem_destroy +ffffffff81978680 T et_dma_mbuf_destroy +ffffffff81978800 T et_rxeof +ffffffff81978c00 T et_txeof +ffffffff81978e60 T et_init +ffffffff81979150 T et_init_tx_ring +ffffffff81979220 T et_init_rx_ring +ffffffff819793b0 T et_chip_init +ffffffff81979750 T et_enable_txrx +ffffffff819798c0 T et_start_rxdma +ffffffff819799b0 T et_start_txdma +ffffffff81979a10 T et_setmulti +ffffffff81979c80 T et_encap +ffffffff8197a0d0 T et_init_mac +ffffffff8197a280 T et_init_rxmac +ffffffff8197a5d0 T et_init_txmac +ffffffff8197a660 T et_init_rxdma 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age_stop_rxmac +ffffffff81983110 T age_stop_txmac +ffffffff81983260 T age_mac_config +ffffffff81983310 T age_rxintr +ffffffff81983510 T age_txintr +ffffffff81983700 T age_init +ffffffff819842e0 T age_stats_update +ffffffff81984610 T age_encap +ffffffff819848a0 T age_iff +ffffffff81984a20 T age_rxeof +ffffffff81984dd0 T age_newbuf +ffffffff81984fb0 T age_init_rx_ring +ffffffff819850a0 T age_init_rr_ring +ffffffff81985130 T age_init_tx_ring +ffffffff819851f0 T age_init_cmb_block +ffffffff81985240 T age_init_smb_block +ffffffff819852a0 T age_rxvlan +ffffffff81986000 T alc_match +ffffffff81986030 T alc_attach +ffffffff81986a00 T alc_detach +ffffffff81986b30 T alc_activate +ffffffff81986bd0 T alc_miibus_readreg +ffffffff81986dc0 T alc_mii_readreg_816x +ffffffff81986ee0 T alc_mii_readreg_813x +ffffffff81987010 T alc_miibus_writereg +ffffffff81987200 T alc_mii_writereg_816x +ffffffff81987330 T alc_mii_writereg_813x +ffffffff81987440 T alc_miibus_statchg +ffffffff81987860 T alc_stop_mac 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+ffffffff81994550 T amdpm_i2c_release_bus +ffffffff819945a0 T amdpm_i2c_exec +ffffffff81994980 T amdpm_get_timecount +ffffffff819949b0 T amdpm_intr +ffffffff81995000 T bce_probe +ffffffff81995030 T bce_attach +ffffffff81995a40 T bce_activate +ffffffff81995ac0 T bce_intr +ffffffff81995e40 T bce_reset +ffffffff81996580 T bce_ioctl +ffffffff81996720 T bce_start +ffffffff819969a0 T bce_watchdog +ffffffff81996a00 T bce_mii_read +ffffffff81996b70 T bce_mii_write +ffffffff81996cd0 T bce_statchg +ffffffff81997150 T bce_mediachange +ffffffff819971a0 T bce_mediastatus +ffffffff81997210 T bce_tick +ffffffff81997280 T bce_stop +ffffffff819973f0 T bce_init +ffffffff81997910 T bce_iff +ffffffff81997a30 T bce_rxintr +ffffffff81997c00 T bce_txintr +ffffffff81997d00 T bce_add_rxbuf +ffffffff81997dc0 T bce_add_mac +ffffffff81998000 T ath_pci_match +ffffffff81998070 T ath_pci_attach +ffffffff819982f0 T ath_pci_detach +ffffffff81999000 T athn_pci_match +ffffffff81999030 T athn_pci_attach +ffffffff81999340 T athn_pci_detach +ffffffff819993c0 T athn_pci_activate +ffffffff819994a0 T athn_pci_read +ffffffff819994d0 T athn_pci_write +ffffffff81999500 T athn_pci_write_barrier +ffffffff81999530 T athn_pci_disable_aspm +ffffffff819995a0 T athn_pci_wakeup +ffffffff8199a000 T atw_pci_match +ffffffff8199a030 T atw_pci_attach +ffffffff8199a300 T atw_pci_detach +ffffffff8199a390 t atw_pci_enable +ffffffff8199a440 t atw_pci_disable +ffffffff8199b000 T rtw_pci_match +ffffffff8199b030 T rtw_pci_attach +ffffffff8199b2a0 T rtw_pci_detach +ffffffff8199b330 T rtw_pci_enable +ffffffff8199b3e0 T rtw_pci_disable +ffffffff8199c000 T rtwn_pci_match +ffffffff8199c030 T rtwn_pci_attach +ffffffff8199c700 T rtwn_pci_detach +ffffffff8199c880 T rtwn_pci_activate +ffffffff8199c8a0 T rtwn_calib_to +ffffffff8199c920 T rtwn_scan_to +ffffffff8199c940 T rtwn_intr +ffffffff8199cc80 T rtwn_alloc_rx_list +ffffffff8199d000 T rtwn_alloc_tx_list +ffffffff8199d290 T rtwn_free_rx_list +ffffffff8199d420 T rtwn_pci_write_1 +ffffffff8199d450 T rtwn_pci_write_2 +ffffffff8199d480 T rtwn_pci_write_4 +ffffffff8199d4b0 T rtwn_pci_read_1 +ffffffff8199d4e0 T rtwn_pci_read_2 +ffffffff8199d510 T rtwn_pci_read_4 +ffffffff8199d540 T rtwn_tx +ffffffff8199db50 T rtwn_power_on +ffffffff8199db80 T rtwn_dma_init +ffffffff8199dff0 T rtwn_pci_load_firmware +ffffffff8199e0a0 T rtwn_fw_loadpage +ffffffff8199e200 T rtwn_mac_init +ffffffff8199e350 T rtwn_bb_init +ffffffff8199e920 T rtwn_alloc_buffers +ffffffff8199e950 T rtwn_pci_init +ffffffff8199ea50 T rtwn_pci_stop +ffffffff8199ec10 T rtwn_is_oactive +ffffffff8199ec50 T rtwn_next_calib +ffffffff8199ec70 T rtwn_cancel_calib +ffffffff8199ecb0 T rtwn_pci_next_scan +ffffffff8199ecd0 T rtwn_cancel_scan +ffffffff8199ed10 T rtwn_wait_async +ffffffff8199ed40 T rtwn_free_tx_list +ffffffff8199eee0 T rtwn_setup_rx_desc +ffffffff8199ef50 T rtwn_reset_rx_list +ffffffff8199eff0 T rtwn_reset_tx_list +ffffffff8199f170 T rtwn_rx_frame +ffffffff8199f650 T rtwn_tx_done +ffffffff8199f820 T rtwn_poll_c2h_events +ffffffff8199fa10 T rtwn_pci_92c_stop +ffffffff8199fc70 T rtwn_pci_88e_stop +ffffffff819a0190 T rtwn_pci_23a_stop +ffffffff819a0660 T rtwn_88e_intr +ffffffff819a0a20 T rtwn_llt_write +ffffffff819a0b00 T rtwn_llt_init +ffffffff819a0e20 T rtwn_92c_power_on +ffffffff819a13e0 T rtwn_88e_power_on +ffffffff819a1920 T rtwn_23a_power_on +ffffffff819a1ef0 T rtwn_tx_report +ffffffff819a2000 T ral_pci_match +ffffffff819a2030 T ral_pci_attach +ffffffff819a2260 T ral_pci_detach +ffffffff819a2310 T ral_pci_activate +ffffffff819a23b0 T ral_pci_wakeup +ffffffff819a3000 T acx_pci_match +ffffffff819a3030 T acx_pci_attach +ffffffff819a32c0 T acx_pci_detach +ffffffff819a4000 T pgt_pci_match +ffffffff819a4030 T pgt_pci_attach +ffffffff819a4260 T pgt_pci_detach +ffffffff819a5000 T malo_pci_match +ffffffff819a5030 T malo_pci_attach +ffffffff819a5230 T malo_pci_detach +ffffffff819a5290 T malo_pci_activate +ffffffff819a5300 T malo_pci_wakeup +ffffffff819a6000 T bwi_pci_match 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vmxnet3_alloc_txring +ffffffff819ace80 T vmxnet3_alloc_rxring +ffffffff819ad210 t vmx_dmamem_alloc +ffffffff819ad3a0 T vmxnet3_rxfill_tick +ffffffff819ad420 T vmxnet3_txinit +ffffffff819ad530 T vmxnet3_rxfill +ffffffff819ad890 T vmxnet3_rxinit +ffffffff819ada80 T vmxnet3_txstop +ffffffff819adba0 T vmxnet3_rxstop +ffffffff819add50 T vmxnet3_enable_all_intrs +ffffffff819ade30 T vmxnet3_disable_all_intrs +ffffffff819adf10 T vmxnet3_evintr +ffffffff819ae110 T vmxnet3_rxintr +ffffffff819ae5b0 T vmxnet3_txintr +ffffffff819ae7a0 T vmxnet3_init +ffffffff819aec10 T vmxnet3_rx_offload +ffffffff819aede0 T vmxnet3_iff +ffffffff819aef30 T vmxnet3_stop +ffffffff819af250 T vmxnet3_reset +ffffffff819af290 T vmxnet3_tx_offload +ffffffff819af430 t vmx_kstat_create +ffffffff819af690 t vmx_kstat_read +ffffffff819b0000 T vmwpvs_match +ffffffff819b0040 T vmwpvs_attach +ffffffff819b0bc0 T vmwpvs_scsi_cmd +ffffffff819b10a0 T vmwpvs_intx +ffffffff819b1130 T vmwpvs_msg_task +ffffffff819b1410 T vmwpvs_intr +ffffffff819b1640 T vmwpvs_get_config +ffffffff819b18d0 T vmwpvs_dmamem_zalloc +ffffffff819b1940 T vmwpvs_dmamem_alloc +ffffffff819b1af0 T vmwpvs_ccb_put +ffffffff819b1b60 T vmwpvs_setup_rings +ffffffff819b1ca0 T vmwpvs_setup_msg_ring +ffffffff819b1d90 T vmwpvs_ccb_get +ffffffff819b1e20 T vmwpvs_dmamem_free +ffffffff819b1ec0 T vmwpvs_cmd +ffffffff819b1f70 T vmwpvs_scsi_cmd_done +ffffffff819b2170 T vmwpvs_scsi_cmd_poll +ffffffff819b3000 T lii_match +ffffffff819b3030 T lii_attach +ffffffff819b3520 T lii_activate +ffffffff819b3640 T lii_reset +ffffffff819b3a10 T lii_spi_configure +ffffffff819b3b40 T lii_eeprom_present +ffffffff819b3be0 T lii_eeprom_read +ffffffff819b3c10 T lii_spi_read +ffffffff819b3fb0 T lii_read_macaddr +ffffffff819b4140 T lii_intr +ffffffff819b4270 T lii_alloc_rings +ffffffff819b44d0 T lii_tick +ffffffff819b4540 T lii_mii_readreg +ffffffff819b48a0 T lii_mii_writereg +ffffffff819b4c00 T lii_mii_statchg +ffffffff819b4c80 T lii_media_change +ffffffff819b4cd0 T lii_media_status +ffffffff819b4d40 T lii_ioctl +ffffffff819b4f20 T lii_start +ffffffff819b5120 T lii_watchdog +ffffffff819b5170 T lii_stop +ffffffff819b5200 T lii_init +ffffffff819b5850 T lii_iff +ffffffff819b59c0 T lii_tx_put +ffffffff819b5af0 T lii_free_tx_space +ffffffff819b5b30 T lii_rxintr +ffffffff819b5d10 T lii_txintr +ffffffff819b6000 T ichiic_match +ffffffff819b6030 T ichiic_attach +ffffffff819b6280 T ichiic_intr +ffffffff819b63c0 T ichiic_i2c_acquire_bus +ffffffff819b6420 T ichiic_i2c_release_bus +ffffffff819b6470 T ichiic_i2c_exec +ffffffff819b7000 T viapm_match +ffffffff819b7030 T viapm_attach +ffffffff819b7800 T viapm_intr +ffffffff819b7940 T viapm_i2c_acquire_bus +ffffffff819b79a0 T viapm_i2c_release_bus +ffffffff819b79f0 T viapm_i2c_exec +ffffffff819b7d90 T viapm_refresh_sensor_data +ffffffff819b8100 T viapm_refresh +ffffffff819b8130 T val_to_uK +ffffffff819b81d0 T val_to_rpm +ffffffff819b8210 T val_to_uV +ffffffff819b82b0 T viapm_get_timecount +ffffffff819b9000 T amdiic_match +ffffffff819b9030 T amdiic_attach +ffffffff819b9260 T amdiic_intr +ffffffff819b9350 T amdiic_i2c_acquire_bus +ffffffff819b93b0 T amdiic_i2c_release_bus +ffffffff819b9400 T amdiic_i2c_exec +ffffffff819b96b0 T amdiic_read +ffffffff819b9860 T amdiic_wait +ffffffff819b9920 T amdiic_write +ffffffff819ba000 T nviic_match +ffffffff819ba030 T nviic_attach +ffffffff819ba2d0 T nviic_i2c_acquire_bus +ffffffff819ba320 T nviic_i2c_release_bus +ffffffff819ba370 T nviic_i2c_exec +ffffffff819ba640 T nviic_write +ffffffff819ba6a0 T nviic_read +ffffffff819bb000 T sdhc_pci_match +ffffffff819bb060 T sdhc_pci_attach +ffffffff819bb430 T sdhc_pci_activate +ffffffff819bb490 T sdhc_takecontroller +ffffffff819bb550 T sdhc_ricohfix +ffffffff819bb720 T sdhc_pci_conf_write +ffffffff819bc000 T kate_match +ffffffff819bc180 T kate_attach +ffffffff819bc510 T kate_refresh +ffffffff819bd000 T km_match +ffffffff819bd050 T km_attach +ffffffff819bd110 T km_refresh +ffffffff819be000 T ksmn_match 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virtio_pci_read_device_config_1 +ffffffff819c4650 T virtio_pci_read_device_config_2 +ffffffff819c4680 T virtio_pci_read_device_config_4 +ffffffff819c46b0 T virtio_pci_read_device_config_8 +ffffffff819c4740 T virtio_pci_write_device_config_1 +ffffffff819c4770 T virtio_pci_write_device_config_2 +ffffffff819c47a0 T virtio_pci_write_device_config_4 +ffffffff819c47d0 T virtio_pci_write_device_config_8 +ffffffff819c4840 T virtio_pci_read_queue_size +ffffffff819c48c0 T virtio_pci_setup_queue +ffffffff819c4c30 T virtio_pci_get_status +ffffffff819c4ca0 T virtio_pci_set_status +ffffffff819c4e10 T virtio_pci_negotiate_features +ffffffff819c4f70 T virtio_pci_poll_intr +ffffffff819c4ff0 T virtio_pci_find_cap +ffffffff819c51c0 T virtio_pci_attach_10 +ffffffff819c5690 T virtio_pci_attach_09 +ffffffff819c5800 T virtio_pci_adjust_config_region +ffffffff819c58b0 T virtio_pci_setup_msix +ffffffff819c5cb0 T virtio_pci_legacy_intr +ffffffff819c5d80 T virtio_pci_legacy_intr_mpsafe +ffffffff819c5e30 T virtio_pci_free_irqs +ffffffff819c60e0 T virtio_pci_negotiate_features_10 +ffffffff819c6380 T virtio_pci_msix_establish +ffffffff819c6460 T virtio_pci_set_msix_queue_vector +ffffffff819c64e0 T virtio_pci_set_msix_config_vector +ffffffff819c6520 T virtio_pci_config_intr +ffffffff819c6560 T virtio_pci_shared_queue_intr +ffffffff819c6570 T virtio_pci_queue_intr +ffffffff819c7000 T dwiic_pci_match +ffffffff819c7030 T dwiic_pci_attach +ffffffff819c7410 T dwiic_pci_activate +ffffffff819c7490 T dwiic_pci_bus_scan +ffffffff819c8000 T bwfm_pci_buscore_read +ffffffff819c8070 T bwfm_pci_buscore_write +ffffffff819c80f0 T bwfm_pci_buscore_prepare +ffffffff819c8120 T bwfm_pci_buscore_reset +ffffffff819c8390 T bwfm_pci_buscore_activate +ffffffff819c83c0 T bwfm_pci_preinit +ffffffff819c9410 T bwfm_pci_stop +ffffffff819c94b0 T bwfm_pci_txcheck +ffffffff819c9570 T bwfm_pci_txdata +ffffffff819c9910 T bwfm_pci_msgbuf_query_dcmd +ffffffff819c9dd0 T bwfm_pci_msgbuf_set_dcmd +ffffffff819c9e20 T bwfm_pci_match +ffffffff819c9e50 T bwfm_pci_attach +ffffffff819ca170 T bwfm_pci_detach +ffffffff819ca1d0 T bwfm_pci_activate +ffffffff819ca3f0 T bwfm_pci_intr +ffffffff819ca6b0 T bwfm_pci_select_core +ffffffff819ca7a0 T bwfm_pci_load_microcode +ffffffff819cad00 T bwfm_pci_dmamem_alloc +ffffffff819caee0 T bwfm_pci_setup_ring +ffffffff819cb120 T bwfm_pci_intr_enable +ffffffff819cb170 T bwfm_pci_hostready +ffffffff819cb1e0 T bwfm_pci_fill_rx_rings +ffffffff819cb240 T bwfm_pci_dmamem_free +ffffffff819cb2d0 T bwfm_pci_cleanup +ffffffff819cbb60 T bwfm_pci_send_mb_data +ffffffff819cbcb0 T bwfm_pci_intmask +ffffffff819cbcf0 T bwfm_pci_pktid_avail +ffffffff819cbd70 T bwfm_pci_pktid_new +ffffffff819cbef0 T bwfm_pci_pktid_free +ffffffff819cbfb0 T bwfm_pci_fill_rx_buf_ring +ffffffff819cc340 T bwfm_pci_fill_rx_ioctl_ring +ffffffff819cc700 T bwfm_pci_ring_write_reserve +ffffffff819cc800 T bwfm_pci_ring_write_cancel +ffffffff819cc840 T bwfm_pci_ring_write_commit +ffffffff819cc930 T bwfm_pci_ring_write_rptr +ffffffff819cc9b0 T bwfm_pci_ring_write_wptr +ffffffff819cca30 T bwfm_pci_setup_flowring +ffffffff819ccba0 T bwfm_pci_ring_bell +ffffffff819ccbe0 T bwfm_pci_ring_update_rptr +ffffffff819ccc90 T bwfm_pci_ring_update_wptr +ffffffff819ccd40 T bwfm_pci_ring_write_reserve_multi +ffffffff819cce60 T bwfm_pci_ring_read_avail +ffffffff819ccf70 T bwfm_pci_ring_read_commit +ffffffff819cd000 T bwfm_pci_ring_rx +ffffffff819cd230 T bwfm_pci_msg_rx +ffffffff819cd8d0 T bwfm_pci_flowring_delete_cb +ffffffff819cd9a0 T bwfm_pci_msgbuf_rxioctl +ffffffff819cdaa0 T bwfm_pci_intr_status +ffffffff819cdae0 T bwfm_pci_intr_ack +ffffffff819cdb20 T bwfm_pci_flowring_lookup +ffffffff819cdcb0 T bwfm_pci_flowring_create +ffffffff819cddf0 T bwfm_pci_flowring_create_cb +ffffffff819ce170 T bwfm_pci_flowring_delete +ffffffff819ce490 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff819ce6e0 T bwfm_pci_handle_mb_data +ffffffff819ce7d0 T bwfm_pci_intr_disable +ffffffff819cf000 T ccp_pci_match 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t mcx_kstat_queue_read +ffffffff819ebea0 t mcx_timecounter_read +ffffffff819ec000 t iavf_match +ffffffff819ec030 t iavf_attach +ffffffff819ecad0 t iavf_reset +ffffffff819ece50 t iavf_dmamem_alloc +ffffffff819ecfe0 t iavf_arq_fill +ffffffff819ed2e0 t iavf_arq_timeout +ffffffff819ed310 t iavf_init_admin_queue +ffffffff819ed520 t iavf_get_version +ffffffff819ed790 t iavf_get_vf_resources +ffffffff819ed9c0 t iavf_config_irq_map +ffffffff819edc00 t iavf_intr +ffffffff819ee380 t iavf_ioctl +ffffffff819eea00 t iavf_start +ffffffff819eedb0 t iavf_watchdog +ffffffff819eede0 t iavf_media_change +ffffffff819eee10 t iavf_media_status +ffffffff819eeea0 t iavf_dmamem_free +ffffffff819eef30 t iavf_arq_unfill +ffffffff819ef050 t iavf_down +ffffffff819ef4c0 t iavf_up +ffffffff819f00a0 t iavf_queue_select +ffffffff819f0320 t iavf_txr_free +ffffffff819f0460 t iavf_rxr_free +ffffffff819f05a0 t iavf_rxfill +ffffffff819f0900 t iavf_rxrefill +ffffffff819f0920 t iavf_process_arq +ffffffff819f0e00 t iavf_add_del_addr +ffffffff819f2000 T rge_match +ffffffff819f2030 T rge_attach +ffffffff819f2610 T rge_activate +ffffffff819f2790 T rge_intr +ffffffff819f2b10 T rge_config_imtype +ffffffff819f2b80 T rge_chipinit +ffffffff819f2cf0 T rge_get_macaddr +ffffffff819f2f30 T rge_allocmem +ffffffff819f33d0 T rge_ioctl +ffffffff819f35c0 T rge_start +ffffffff819f37c0 T rge_watchdog +ffffffff819f3810 T rge_wol +ffffffff819f3ad0 T rge_tick +ffffffff819f3b70 T rge_txstart +ffffffff819f3ba0 T rge_ifmedia_upd +ffffffff819f43f0 T rge_ifmedia_sts +ffffffff819f4500 T rge_add_media_types +ffffffff819f4660 T rge_kstat_attach +ffffffff819f49b0 T rge_wol_power +ffffffff819f4ac0 T rge_rxeof +ffffffff819f4f80 T rge_txeof +ffffffff819f51c0 T rge_init +ffffffff819f70a0 T rge_setup_intr +ffffffff819f7250 T rge_encap +ffffffff819f7550 T rge_stop +ffffffff819f78e0 T rge_iff +ffffffff819f7a70 T rge_set_macaddr +ffffffff819f7b70 T rge_rx_list_init +ffffffff819f7c60 T rge_tx_list_init +ffffffff819f7d50 T rge_phy_config +ffffffff819f9030 T rge_disable_aspm_clkreq +ffffffff819f9190 T rge_read_csi +ffffffff819f9270 T rge_write_csi +ffffffff819f9360 T rge_write_mac_ocp +ffffffff819f93b0 T rge_read_mac_ocp +ffffffff819f9440 T rge_hw_reset +ffffffff819f9580 T rge_write_phy_ocp +ffffffff819f9660 T rge_read_phy_ocp +ffffffff819f9730 T rge_read_phy +ffffffff819f9820 T rge_write_phy +ffffffff819f9920 T rge_get_link_status +ffffffff819f9980 T rge_newbuf +ffffffff819f9b40 T rge_discard_rxbuf +ffffffff819f9bb0 T rge_fill_rx_ring +ffffffff819f9c40 T rge_reset +ffffffff819f9f50 T rge_exit_oob +ffffffff819fa9f0 T rge_set_phy_power +ffffffff819face0 T rge_hw_init +ffffffff819fb670 T rge_ephy_config +ffffffff819fb6c0 T rge_ephy_config_mac_cfg3 +ffffffff819fba30 T rge_ephy_config_mac_cfg5 +ffffffff819fbb60 T rge_write_ephy +ffffffff819fbe80 T rge_read_ephy +ffffffff819fc1c0 T rge_phy_config_mac_cfg2_8126 +ffffffff81a03b60 T rge_phy_config_mac_cfg3 +ffffffff81a05d30 T rge_phy_config_mac_cfg5 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igc_release_swfw_sync_i225 +ffffffff81a12e10 T igc_setup_copper_link_i225 +ffffffff81a12ec0 T igc_init_phy_params_i225 +ffffffff81a12fb0 T igc_get_hw_semaphore_i225 +ffffffff81a131b0 T __igc_write_nvm_srwr +ffffffff81a13300 T igc_update_flash_i225 +ffffffff81a137b0 T igc_set_flsw_flash_burst_counter_i225 +ffffffff81a13820 T igc_write_erase_flash_command_i225 +ffffffff81a13950 T igc_pool_flash_update_done_i225 +ffffffff81a139f0 T igc_set_ltr_i225 +ffffffff81a13cc0 T igc_init_function_pointers_i225 +ffffffff81a13d40 T igc_set_eee_i225 +ffffffff81a14000 T igc_init_mac_ops_generic +ffffffff81a14050 T igc_null_ops_generic +ffffffff81a14080 T igc_config_collision_dist_generic +ffffffff81a14100 T igc_rar_set_generic +ffffffff81a14200 T igc_write_vfta_generic +ffffffff81a14260 T igc_init_rx_addrs_generic +ffffffff81a14320 T igc_check_alt_mac_addr_generic +ffffffff81a144d0 T igc_hash_mc_addr_generic +ffffffff81a14570 T igc_update_mc_addr_list_generic +ffffffff81a146e0 T igc_clear_hw_cntrs_base_generic +ffffffff81a14c20 T igc_setup_link_generic +ffffffff81a14df0 T igc_set_fc_watermarks_generic +ffffffff81a14eb0 T igc_force_mac_fc_generic +ffffffff81a14f70 T igc_config_fc_after_link_up_generic +ffffffff81a15130 T igc_get_speed_and_duplex_copper_generic +ffffffff81a151e0 T igc_put_hw_semaphore_generic +ffffffff81a15240 T igc_get_auto_rd_done_generic +ffffffff81a15550 T igc_disable_pcie_master_generic +ffffffff81a16000 T igc_init_nvm_ops_generic +ffffffff81a16080 T igc_null_read_nvm +ffffffff81a160b0 T igc_null_nvm_generic +ffffffff81a160e0 T igc_reload_nvm_generic +ffffffff81a16180 T igc_null_write_nvm +ffffffff81a161b0 T igc_poll_eerd_eewr_done +ffffffff81a16260 T igc_read_nvm_eerd +ffffffff81a163c0 T igc_read_mac_addr_generic +ffffffff81a164b0 T igc_validate_nvm_checksum_generic +ffffffff81a17000 T igc_init_phy_ops_generic +ffffffff81a170f0 T igc_null_set_page +ffffffff81a17120 T igc_null_read_reg +ffffffff81a17150 T igc_null_phy_generic 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ngbe_allocate_transmit_buffers +ffffffff81a1f110 T ngbe_setup_receive_ring +ffffffff81a1f230 T ngbe_setup_transmit_ring +ffffffff81a1f3a0 T ngbe_addr_list_itr +ffffffff81a1f3e0 T ngbe_setup_psrtype +ffffffff81a1f410 T ngbe_initialize_rss_mapping +ffffffff81a1f6a0 T ngbe_handle_phy_event +ffffffff81a1f750 T ngbe_enable_queue +ffffffff81a1f7b0 T ngbe_rxeof +ffffffff81a1fb60 T ngbe_txeof +ffffffff81a1fd20 T ngbe_init_eeprom_params +ffffffff81a1fda0 T ngbe_init_hw +ffffffff81a1fe10 T ngbe_init_ops +ffffffff81a20020 T ngbe_phy_reset +ffffffff81a201e0 T ngbe_phy_read_reg +ffffffff81a20290 T ngbe_phy_write_reg +ffffffff81a20340 T ngbe_phy_setup_link +ffffffff81a20610 T ngbe_phy_led_ctrl +ffffffff81a20720 T ngbe_phy_check_overtemp +ffffffff81a20780 T ngbe_phy_identify +ffffffff81a207c0 T ngbe_phy_init +ffffffff81a20a50 T ngbe_phy_check_event +ffffffff81a20ab0 T ngbe_phy_get_advertised_pause +ffffffff81a20b20 T ngbe_phy_get_lp_advertised_pause +ffffffff81a20bf0 T ngbe_phy_set_pause_advertisement +ffffffff81a20c80 T ngbe_phy_setup +ffffffff81a20e70 T ngbe_clear_hw_cntrs +ffffffff81a21150 T ngbe_get_mac_addr +ffffffff81a21220 T ngbe_stop_adapter +ffffffff81a214e0 T ngbe_get_bus_info +ffffffff81a215a0 T ngbe_set_lan_id_multi_port_pcie +ffffffff81a21610 T ngbe_acquire_swfw_sync +ffffffff81a218e0 T ngbe_release_swfw_sync +ffffffff81a21a50 T ngbe_reset_hw +ffffffff81a21cf0 T ngbe_get_media_type +ffffffff81a21d20 T ngbe_disable_sec_rx_path +ffffffff81a21df0 T ngbe_enable_sec_rx_path +ffffffff81a21e70 T ngbe_enable_rx_dma +ffffffff81a21ed0 T ngbe_start_hw +ffffffff81a21fc0 T ngbe_set_rar +ffffffff81a22150 T ngbe_init_rx_addrs +ffffffff81a22350 T ngbe_update_mc_addr_list +ffffffff81a22530 T ngbe_enable_rx +ffffffff81a226a0 T ngbe_disable_rx +ffffffff81a227f0 T ngbe_clear_vfta +ffffffff81a22910 T ngbe_init_uta_tables +ffffffff81a22990 T ngbe_fc_enable +ffffffff81a22ca0 T ngbe_setup_fc +ffffffff81a22d90 T ngbe_check_mac_link +ffffffff81a22f20 T ngbe_set_rxpba +ffffffff81a22fd0 T ngbe_eepromcheck_cap +ffffffff81a230b0 T ngbe_phy_led_oem_chk +ffffffff81a231d0 T ngbe_set_fw_drv_ver +ffffffff81a23320 T ngbe_init_thermal_sensor_thresh +ffffffff81a23400 T ngbe_validate_mac_addr +ffffffff81a23460 T ngbe_fc_autoneg +ffffffff81a23600 T ngbe_fc_autoneg_copper +ffffffff81a23720 T ngbe_negotiate_fc +ffffffff81a237d0 T ngbe_fmgr_cmd_op +ffffffff81a238d0 T ngbe_flash_read_dword +ffffffff81a239e0 T ngbe_calculate_checksum +ffffffff81a23aa0 T ngbe_check_internal_phy_id +ffffffff81a23c20 T ngbe_gphy_wait_mdio_access_on +ffffffff81a23cb0 T ngbe_check_mng_access +ffffffff81a23d10 T ngbe_mng_present +ffffffff81a23d70 T ngbe_check_reset_blocked +ffffffff81a23e00 T ngbe_set_ivar +ffffffff81a23f00 T ngbe_pbthresh_setup +ffffffff81a23fd0 T ngbe_disable_queue +ffffffff81a24030 T ngbe_host_interface_command +ffffffff81a244a0 T ngbe_tx_ctx_setup +ffffffff81a24530 T ngbe_read_pci_cfg_word +ffffffff81a24590 T ngbe_set_pci_config_data +ffffffff81a24620 T ngbe_get_copper_link_capabilities +ffffffff81a24670 T ngbe_get_eeprom_semaphore +ffffffff81a24810 T ngbe_release_eeprom_semaphore +ffffffff81a248e0 T ngbe_gphy_dis_eee +ffffffff81a24a40 T ngbe_gphy_efuse_calibration +ffffffff81a24ee0 T ngbe_hpbthresh +ffffffff81a24f80 T ngbe_lpbthresh +ffffffff81a24fc0 T ngbe_mta_vector +ffffffff81a25010 T ngbe_setup_copper_link +ffffffff81a25060 T ngbe_reset_misc +ffffffff81a25450 T ngbe_set_mta +ffffffff81a254c0 T ngbe_rx_checksum +ffffffff81a26000 T com_pci_match +ffffffff81a26030 T com_pci_attach +ffffffff81a263a0 T com_pci_detach +ffffffff81a26450 T com_pci_activate +ffffffff81a26560 T com_pci_intr_designware +ffffffff81a27000 T ufshci_pci_match +ffffffff81a27040 T ufshci_pci_attach +ffffffff81a271d0 T ufshci_pci_detach +ffffffff81a27200 T ufshci_pci_activate +ffffffff81a28000 T agpdev_print +ffffffff81a28050 T agpbus_probe +ffffffff81a280c0 T agpvga_match +ffffffff81a28130 T agp_attach_bus +ffffffff81a281c0 T agp_probe +ffffffff81a281f0 T agp_attach +ffffffff81a28310 T agp_alloc_gatt +ffffffff81a28520 T agp_alloc_dmamem +ffffffff81a28670 T agp_free_dmamem +ffffffff81a286e0 T agp_free_gatt +ffffffff81a28790 T agp_generic_enable +ffffffff81a28960 T agp_find_device +ffffffff81a289b0 T agp_state +ffffffff81a289e0 T agp_get_info +ffffffff81a28a90 T agp_acquire +ffffffff81a28ae0 T agp_release +ffffffff81a28b30 T agp_enable +ffffffff81a28b60 T agp_mmap +ffffffff81a29000 T agp_i810_probe +ffffffff81a29060 T agp_i810_attach +ffffffff81a29610 T agp_i810_activate +ffffffff81a29660 T agp_i810_bind_page +ffffffff81a29730 T agp_i810_unbind_page +ffffffff81a297f0 T agp_i810_flush_tlb +ffffffff81a29820 T agp_i810_enable +ffffffff81a29850 T agp_i810_get_chiptype +ffffffff81a29ac0 T intagp_gmch_match +ffffffff81a29b20 T agp_i810_configure +ffffffff81a29c80 T intagp_write_gtt +ffffffff81a2a000 T dma_resv_init +ffffffff81a2a070 T dma_resv_fini +ffffffff81a2a170 T dma_resv_reserve_fences +ffffffff81a2a350 T dma_resv_add_fence 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drm_atomic_get_bridge_state +ffffffff81a2f5a0 T drm_atomic_get_old_bridge_state +ffffffff81a2f600 T drm_atomic_get_new_bridge_state +ffffffff81a2f660 T drm_atomic_add_encoder_bridges +ffffffff81a2f740 T drm_atomic_add_affected_connectors +ffffffff81a2f8a0 T drm_atomic_add_affected_planes +ffffffff81a2f9d0 T drm_atomic_check_only +ffffffff81a30560 T drm_atomic_commit +ffffffff81a30640 T drm_atomic_print_new_state +ffffffff81a30850 T drm_atomic_nonblocking_commit +ffffffff81a30900 T __drm_atomic_helper_disable_plane +ffffffff81a30990 T __drm_atomic_helper_set_config +ffffffff81a30d90 t drm_atomic_plane_print_state +ffffffff81a31020 t drm_atomic_crtc_print_state +ffffffff81a312f0 t drm_atomic_connector_print_state +ffffffff81a31450 T drm_state_dump +ffffffff81a32000 T drm_atomic_helper_check_modeset +ffffffff81a32e00 t handle_conflicting_encoders +ffffffff81a33170 t mode_fixup +ffffffff81a334f0 T drm_atomic_helper_check_wb_encoder_state +ffffffff81a33560 T drm_atomic_helper_check_plane_state +ffffffff81a33980 T drm_atomic_helper_check_crtc_primary_plane +ffffffff81a33a30 T drm_atomic_helper_check_planes +ffffffff81a33d10 T drm_atomic_helper_check +ffffffff81a33de0 T drm_atomic_helper_async_check +ffffffff81a340e0 T drm_atomic_helper_update_legacy_modeset_state +ffffffff81a34350 T drm_atomic_helper_calc_timestamping_constants +ffffffff81a343f0 T drm_atomic_helper_commit_modeset_disables +ffffffff81a34ae0 T drm_atomic_helper_commit_modeset_enables +ffffffff81a34e00 T drm_atomic_helper_wait_for_fences +ffffffff81a35010 T drm_atomic_helper_wait_for_vblanks +ffffffff81a353c0 T drm_atomic_helper_wait_for_flip_done +ffffffff81a355b0 T drm_atomic_helper_commit_tail +ffffffff81a35780 T drm_atomic_helper_commit_planes +ffffffff81a35b30 T drm_atomic_helper_fake_vblank +ffffffff81a35c30 T drm_atomic_helper_commit_hw_done +ffffffff81a35e50 T drm_atomic_helper_cleanup_planes +ffffffff81a35f00 T drm_atomic_helper_commit_tail_rpm +ffffffff81a360d0 t try_wait_for_completion +ffffffff81a36140 T drm_atomic_helper_async_commit +ffffffff81a36410 T drm_atomic_helper_commit +ffffffff81a36710 T drm_atomic_helper_prepare_planes +ffffffff81a369e0 T drm_atomic_helper_unprepare_planes +ffffffff81a36af0 T drm_atomic_helper_setup_commit +ffffffff81a372e0 t commit_work +ffffffff81a37300 T drm_atomic_helper_swap_state +ffffffff81a379c0 t commit_tail +ffffffff81a37c10 t release_crtc_commit +ffffffff81a37c50 t crtc_or_fake_commit +ffffffff81a37d80 T drm_atomic_helper_wait_for_dependencies +ffffffff81a37fc0 T drm_atomic_helper_commit_cleanup_done +ffffffff81a382b0 T drm_atomic_helper_commit_planes_on_crtc +ffffffff81a38560 T drm_atomic_helper_disable_planes_on_crtc +ffffffff81a386d0 T drm_atomic_helper_update_plane +ffffffff81a38830 T drm_atomic_helper_disable_plane +ffffffff81a38930 T drm_atomic_helper_set_config +ffffffff81a38a10 T drm_atomic_helper_disable_all +ffffffff81a38c00 T drm_atomic_helper_shutdown +ffffffff81a38d80 T drm_atomic_helper_duplicate_state +ffffffff81a38f10 T drm_atomic_helper_suspend +ffffffff81a390b0 T drm_atomic_helper_commit_duplicated_state +ffffffff81a39200 T drm_atomic_helper_resume +ffffffff81a39370 T drm_atomic_helper_page_flip +ffffffff81a39450 t page_flip_common +ffffffff81a39580 T drm_atomic_helper_page_flip_target +ffffffff81a396c0 T drm_atomic_helper_bridge_propagate_bus_fmt +ffffffff81a39740 t set_best_encoder +ffffffff81a3a000 T __drm_atomic_helper_crtc_state_reset +ffffffff81a3a030 T __drm_atomic_helper_crtc_reset +ffffffff81a3a0a0 T drm_atomic_helper_crtc_reset +ffffffff81a3a150 T __drm_atomic_helper_crtc_duplicate_state +ffffffff81a3a230 T drm_atomic_helper_crtc_duplicate_state +ffffffff81a3a2f0 T __drm_atomic_helper_crtc_destroy_state +ffffffff81a3a3e0 T drm_atomic_helper_crtc_destroy_state +ffffffff81a3a420 T __drm_atomic_helper_plane_state_reset +ffffffff81a3a500 T __drm_atomic_helper_plane_reset +ffffffff81a3a560 T drm_atomic_helper_plane_reset +ffffffff81a3a670 T __drm_atomic_helper_plane_destroy_state +ffffffff81a3a6e0 T __drm_atomic_helper_plane_duplicate_state +ffffffff81a3a760 T drm_atomic_helper_plane_duplicate_state +ffffffff81a3a860 T drm_atomic_helper_plane_destroy_state +ffffffff81a3a8e0 T __drm_atomic_helper_connector_state_reset +ffffffff81a3a910 T __drm_atomic_helper_connector_reset +ffffffff81a3a950 T drm_atomic_helper_connector_reset +ffffffff81a3aa40 T __drm_atomic_helper_connector_destroy_state +ffffffff81a3aaa0 T drm_atomic_helper_connector_tv_margins_reset +ffffffff81a3ab00 T drm_atomic_helper_connector_tv_reset +ffffffff81a3ad50 T drm_atomic_helper_connector_tv_check +ffffffff81a3ae30 T __drm_atomic_helper_connector_duplicate_state +ffffffff81a3aed0 T drm_atomic_helper_connector_duplicate_state +ffffffff81a3afe0 T drm_atomic_helper_connector_destroy_state +ffffffff81a3b050 T __drm_atomic_helper_private_obj_duplicate_state +ffffffff81a3b090 T __drm_atomic_helper_bridge_duplicate_state +ffffffff81a3b0d0 T drm_atomic_helper_bridge_duplicate_state +ffffffff81a3b190 T drm_atomic_helper_bridge_destroy_state +ffffffff81a3b1b0 T __drm_atomic_helper_bridge_reset +ffffffff81a3b200 T drm_atomic_helper_bridge_reset +ffffffff81a3c000 T drm_atomic_set_mode_for_crtc +ffffffff81a3c250 T drm_atomic_set_mode_prop_for_crtc +ffffffff81a3c530 T drm_atomic_set_crtc_for_plane +ffffffff81a3c6d0 T drm_atomic_set_fb_for_plane +ffffffff81a3c7c0 T drm_atomic_set_crtc_for_connector +ffffffff81a3c950 T drm_atomic_get_property +ffffffff81a3d0f0 T drm_atomic_connector_commit_dpms +ffffffff81a3d250 T drm_atomic_set_property +ffffffff81a3de50 T drm_mode_atomic_ioctl +ffffffff81a3e3d0 t prepare_signaling +ffffffff81a3e8f0 t complete_signaling +ffffffff81a3eaf0 t drm_atomic_replace_property_blob_from_id +ffffffff81a3ec90 t drm_atomic_set_writeback_fb_for_connector +ffffffff81a3ed00 t set_out_fence_for_connector +ffffffff81a3f000 T drm_is_current_master +ffffffff81a3f070 T drm_getmagic +ffffffff81a3f160 T drm_authmagic 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+ffffffff81a411c0 T drm_bridge_attach +ffffffff81a413a0 T drm_bridge_detach +ffffffff81a41490 T drm_bridge_chain_mode_fixup +ffffffff81a41540 T drm_bridge_chain_mode_valid +ffffffff81a415f0 T drm_bridge_chain_mode_set +ffffffff81a41690 T drm_atomic_bridge_chain_disable +ffffffff81a417a0 T drm_atomic_bridge_chain_post_disable +ffffffff81a419e0 T drm_atomic_bridge_chain_pre_enable +ffffffff81a41c50 T drm_atomic_bridge_chain_enable +ffffffff81a41d80 T drm_atomic_bridge_chain_check +ffffffff81a42180 T drm_bridge_detect +ffffffff81a421e0 T drm_bridge_get_modes +ffffffff81a42240 T drm_bridge_edid_read +ffffffff81a42310 T drm_bridge_get_edid +ffffffff81a42370 T drm_bridge_hpd_enable +ffffffff81a42450 T drm_bridge_hpd_disable +ffffffff81a424f0 T drm_bridge_hpd_notify +ffffffff81a42550 t drm_bridge_atomic_duplicate_priv_state +ffffffff81a42570 t drm_bridge_atomic_destroy_priv_state +ffffffff81a42590 t select_bus_fmt_recursive +ffffffff81a43000 T drm_buddy_init +ffffffff81a434c0 T drm_buddy_fini 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+ffffffff81a46640 T drm_client_buffer_vmap +ffffffff81a466c0 T drm_client_buffer_vunmap +ffffffff81a466e0 T drm_client_framebuffer_create +ffffffff81a46a20 T drm_client_framebuffer_delete +ffffffff81a46b20 T drm_client_framebuffer_flush +ffffffff81a47000 T drm_client_modeset_create +ffffffff81a47150 T drm_client_modeset_free +ffffffff81a47280 T drm_client_modeset_probe +ffffffff81a48ca0 t drm_client_pick_crtcs +ffffffff81a48fc0 T drm_client_rotation +ffffffff81a49170 T drm_client_modeset_check +ffffffff81a49220 t drm_client_modeset_commit_atomic +ffffffff81a49490 T drm_client_modeset_commit_locked +ffffffff81a49680 T drm_client_modeset_commit +ffffffff81a49710 T drm_client_modeset_dpms +ffffffff81a499d0 t drm_connector_pick_cmdline_mode +ffffffff81a4a000 T drm_color_ctm_s31_32_to_qm_n +ffffffff81a4a0d0 T drm_crtc_enable_color_mgmt +ffffffff81a4a1c0 T drm_mode_crtc_set_gamma_size +ffffffff81a4a2f0 T drm_mode_gamma_set_ioctl +ffffffff81a4a8b0 T drm_mode_gamma_get_ioctl +ffffffff81a4aa20 T drm_get_color_encoding_name +ffffffff81a4aaa0 T drm_get_color_range_name +ffffffff81a4ab20 T drm_plane_create_color_properties +ffffffff81a4adb0 T drm_color_lut_check +ffffffff81a4b000 T drm_connector_ida_init +ffffffff81a4b1c0 T drm_connector_ida_destroy +ffffffff81a4b380 T drm_get_connector_type_name +ffffffff81a4b3c0 T drm_connector_free_work_fn +ffffffff81a4b4a0 T drm_connector_init +ffffffff81a4b530 t __drm_connector_init +ffffffff81a4b930 T drm_connector_init_with_ddc +ffffffff81a4b9c0 T drmm_connector_init +ffffffff81a4ba90 t drm_connector_cleanup_action +ffffffff81a4bab0 T drm_connector_attach_edid_property +ffffffff81a4bad0 T drm_connector_attach_encoder +ffffffff81a4bb60 T drm_connector_has_possible_encoder +ffffffff81a4bba0 T drm_connector_cleanup +ffffffff81a4bf90 T drm_connector_unregister +ffffffff81a4c040 T drm_mode_put_tile_group +ffffffff81a4c0f0 T drm_connector_register +ffffffff81a4c220 T drm_connector_unregister_all +ffffffff81a4c400 T drm_connector_list_iter_begin +ffffffff81a4c440 T drm_connector_list_iter_next +ffffffff81a4c560 T drm_connector_list_iter_end +ffffffff81a4c640 T drm_connector_register_all +ffffffff81a4c800 T drm_get_connector_status_name +ffffffff81a4c850 T drm_get_connector_force_name +ffffffff81a4c890 T drm_get_subpixel_order_name +ffffffff81a4c8d0 T drm_get_dpms_name +ffffffff81a4c910 T drm_display_info_set_bus_formats +ffffffff81a4ca00 T drm_get_dvi_i_select_name +ffffffff81a4ca60 T drm_get_dvi_i_subconnector_name +ffffffff81a4cac0 T drm_get_tv_mode_name +ffffffff81a4cb00 T drm_get_tv_mode_from_name +ffffffff81a4cd20 T drm_get_tv_select_name +ffffffff81a4cd80 T drm_get_tv_subconnector_name +ffffffff81a4cde0 T drm_get_dp_subconnector_name +ffffffff81a4ce70 T drm_get_colorspace_name +ffffffff81a4ceb0 T drm_connector_create_standard_properties +ffffffff81a4d070 T drm_mode_create_dvi_i_properties +ffffffff81a4d120 T drm_connector_attach_dp_subconnector_property +ffffffff81a4d190 T drm_connector_attach_content_type_property +ffffffff81a4d230 T drm_mode_create_content_type_property +ffffffff81a4d2c0 T drm_connector_attach_tv_margin_properties +ffffffff81a4d340 T drm_mode_create_tv_margin_properties +ffffffff81a4d480 T drm_mode_create_tv_properties_legacy +ffffffff81a4d730 T drm_mode_create_tv_properties +ffffffff81a4d920 T drm_mode_create_scaling_mode_property +ffffffff81a4d990 T drm_connector_attach_vrr_capable_property +ffffffff81a4da30 T drm_connector_attach_scaling_mode_property +ffffffff81a4dc50 T drm_mode_create_aspect_ratio_property +ffffffff81a4dce0 T drm_mode_create_hdmi_colorspace_property +ffffffff81a4dd00 t drm_mode_create_colorspace_property +ffffffff81a4de50 T drm_mode_create_dp_colorspace_property +ffffffff81a4de80 T drm_mode_create_suggested_offset_properties +ffffffff81a4df60 T drm_connector_set_path_property +ffffffff81a4dfc0 T drm_connector_set_tile_property +ffffffff81a4e130 T drm_connector_set_link_status_property +ffffffff81a4e190 T drm_connector_attach_max_bpc_property +ffffffff81a4e260 T drm_connector_attach_hdr_output_metadata_property +ffffffff81a4e2b0 T drm_connector_attach_colorspace_property +ffffffff81a4e300 T drm_connector_atomic_hdr_metadata_equal +ffffffff81a4e380 T drm_connector_set_vrr_capable_property +ffffffff81a4e3d0 T drm_connector_set_panel_orientation +ffffffff81a4e4a0 T drm_connector_set_panel_orientation_with_quirk +ffffffff81a4e5a0 T drm_connector_set_orientation_from_panel +ffffffff81a4e6a0 T drm_connector_create_privacy_screen_properties +ffffffff81a4e750 T drm_connector_attach_privacy_screen_properties +ffffffff81a4e7d0 T drm_connector_attach_privacy_screen_provider +ffffffff81a4e900 t drm_connector_privacy_screen_notifier +ffffffff81a4e9d0 T drm_connector_update_privacy_screen +ffffffff81a4ea40 T drm_connector_set_obj_prop +ffffffff81a4eb50 T drm_connector_property_set_ioctl +ffffffff81a4ebb0 T drm_mode_getconnector +ffffffff81a4f130 T drm_connector_find_by_fwnode +ffffffff81a4f1f0 T drm_connector_oob_hotplug_event +ffffffff81a4f2f0 T drm_mode_get_tile_group +ffffffff81a4f400 T drm_mode_create_tile_group +ffffffff81a4f4f0 t drm_connector_free +ffffffff81a4f540 t kasprintf +ffffffff81a50000 T drm_crtc_from_index +ffffffff81a50060 T drm_crtc_force_disable +ffffffff81a501b0 T drm_mode_set_config_internal +ffffffff81a50230 T drm_crtc_register_all +ffffffff81a502c0 T drm_crtc_unregister_all +ffffffff81a50340 T drm_crtc_create_fence +ffffffff81a503d0 T drm_crtc_init_with_planes +ffffffff81a504b0 t __drm_crtc_init_with_planes +ffffffff81a50940 T drmm_crtc_init_with_planes +ffffffff81a50a60 T __drmm_crtc_alloc_with_planes +ffffffff81a50c00 T drm_crtc_cleanup +ffffffff81a50d40 T drm_mode_getcrtc +ffffffff81a50f20 t __drm_mode_set_config_internal +ffffffff81a510e0 T drm_crtc_check_viewport +ffffffff81a511a0 T drm_mode_setcrtc +ffffffff81a51a40 T drm_mode_crtc_set_obj_prop +ffffffff81a51ad0 T drm_crtc_create_scaling_filter_property +ffffffff81a51b50 t drm_crtc_fence_get_driver_name +ffffffff81a51bd0 t drm_crtc_fence_get_timeline_name +ffffffff81a51c40 t kasprintf +ffffffff81a51d20 t drmm_crtc_init_with_planes_cleanup +ffffffff81a52000 T drm_helper_encoder_in_use +ffffffff81a521b0 T drm_helper_crtc_in_use +ffffffff81a522e0 T drm_helper_disable_unused_functions +ffffffff81a52380 t __drm_helper_disable_unused_functions +ffffffff81a524c0 T drm_crtc_helper_set_mode +ffffffff81a52a40 T drm_crtc_helper_atomic_check +ffffffff81a52a90 T drm_connector_get_single_encoder +ffffffff81a52b70 T drm_crtc_helper_set_config +ffffffff81a539a0 T drm_helper_connector_dpms +ffffffff81a53d00 T drm_helper_resume_force_mode +ffffffff81a54090 T drm_helper_force_disable_all +ffffffff81a55000 T drm_atomic_helper_check_plane_damage +ffffffff81a550b0 T drm_atomic_helper_dirtyfb +ffffffff81a553f0 T drm_atomic_helper_damage_iter_init +ffffffff81a55550 T drm_atomic_helper_damage_iter_next +ffffffff81a555f0 T drm_atomic_helper_damage_merged +ffffffff81a56000 T displayid_iter_edid_begin +ffffffff81a56050 T __displayid_iter_next +ffffffff81a56320 T displayid_iter_end +ffffffff81a56370 T displayid_version +ffffffff81a563a0 T displayid_primary_use +ffffffff81a57000 T drm_mode_create_dumb +ffffffff81a570e0 T drm_mode_create_dumb_ioctl +ffffffff81a571c0 T drm_mode_mmap_dumb_ioctl +ffffffff81a57230 T drm_mode_destroy_dumb +ffffffff81a57280 T drm_mode_destroy_dumb_ioctl +ffffffff81a58000 T drm_edid_header_is_valid +ffffffff81a58080 T drm_edid_are_equal +ffffffff81a58100 T drm_edid_block_valid +ffffffff81a58370 t edid_block_check +ffffffff81a584b0 t edid_block_status_print +ffffffff81a585a0 T drm_edid_is_valid +ffffffff81a58620 T drm_edid_valid +ffffffff81a58760 t drm_edid_block_count +ffffffff81a588a0 T drm_edid_override_show +ffffffff81a58900 T drm_edid_override_set +ffffffff81a58b10 T drm_edid_alloc +ffffffff81a58bf0 T drm_edid_free +ffffffff81a58c50 T drm_edid_override_reset +ffffffff81a58d30 T drm_edid_override_connector_update +ffffffff81a58e30 t drm_edid_override_get +ffffffff81a58f50 T drm_edid_connector_update +ffffffff81a59430 T drm_edid_connector_add_modes +ffffffff81a59590 T drm_do_get_edid +ffffffff81a595b0 t _drm_do_get_edid +ffffffff81a59ab0 T drm_edid_raw +ffffffff81a59b40 T drm_edid_dup +ffffffff81a59c30 T drm_probe_ddc +ffffffff81a59d40 t drm_do_probe_ddc_edid +ffffffff81a59ea0 T drm_get_edid +ffffffff81a5a030 T drm_connector_update_edid_property +ffffffff81a5a0a0 T drm_edid_read_custom +ffffffff81a5a1c0 T drm_edid_read_ddc +ffffffff81a5a300 T drm_edid_read +ffffffff81a5a390 T drm_edid_get_panel_id +ffffffff81a5a560 t edid_block_read +ffffffff81a5a840 T drm_get_edid_switcheroo +ffffffff81a5a890 T drm_edid_read_switcheroo +ffffffff81a5a8e0 T drm_edid_duplicate +ffffffff81a5a970 T drm_mode_find_dmt +ffffffff81a5aaa0 T drm_mode_fixup_1366x768 +ffffffff81a5aaf0 T drm_find_edid_extension +ffffffff81a5aba0 T drm_match_cea_mode +ffffffff81a5ae40 T drm_display_mode_from_cea_vic +ffffffff81a5aeb0 T drm_edid_get_monitor_name +ffffffff81a5af70 t get_monitor_name +ffffffff81a5b3e0 T drm_edid_to_sad +ffffffff81a5b610 T drm_edid_to_speaker_allocation +ffffffff81a5b7f0 T drm_av_sync_delay +ffffffff81a5b8a0 T drm_detect_hdmi_monitor +ffffffff81a5b9e0 T drm_detect_monitor_audio +ffffffff81a5bb90 T drm_default_rgb_quant_range +ffffffff81a5bbe0 t update_display_info +ffffffff81a5d590 t _drm_edid_connector_add_modes +ffffffff81a5ed50 T drm_add_edid_modes +ffffffff81a5ee70 T drm_add_modes_noedid +ffffffff81a5ef80 T drm_set_preferred_mode +ffffffff81a5efe0 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff81a5f2d0 T drm_hdmi_avi_infoframe_quant_range +ffffffff81a5f370 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff81a5f450 t connector_bad_edid +ffffffff81a5f640 t edid_filter_invalid_blocks +ffffffff81a5f800 t drm_for_each_detailed_block +ffffffff81a5f9f0 t __cea_db_iter_next +ffffffff81a5fc10 t get_monitor_range +ffffffff81a5fcb0 t do_detailed_mode +ffffffff81a60750 t do_cvt_mode +ffffffff81a609e0 t drm_mode_std +ffffffff81a61430 t do_standard_modes +ffffffff81a615e0 t drm_monitor_supports_rb +ffffffff81a619f0 t drm_gtf2_mode +ffffffff81a627f0 t drm_gtf2_hbreak +ffffffff81a62b60 t do_established_modes +ffffffff81a62d80 t drm_match_hdmi_mode +ffffffff81a62f10 t do_inferred_modes +ffffffff81a63680 t mode_in_range +ffffffff81a64000 T drm_encoder_register_all +ffffffff81a64090 T drm_encoder_unregister_all +ffffffff81a64110 T drm_encoder_init +ffffffff81a641e0 t __drm_encoder_init +ffffffff81a643e0 T drm_encoder_cleanup +ffffffff81a64520 T __drmm_encoder_alloc +ffffffff81a64660 T drmm_encoder_init +ffffffff81a64750 T drm_mode_getencoder +ffffffff81a64910 t kasprintf +ffffffff81a649f0 t drmm_encoder_alloc_release +ffffffff81a65000 T drm_i2c_encoder_dpms +ffffffff81a65020 T drm_i2c_encoder_mode_fixup +ffffffff81a65060 T drm_i2c_encoder_prepare +ffffffff81a65080 T drm_i2c_encoder_commit +ffffffff81a650a0 T drm_i2c_encoder_mode_set +ffffffff81a650c0 T drm_i2c_encoder_detect +ffffffff81a650e0 T drm_i2c_encoder_save +ffffffff81a65100 T drm_i2c_encoder_restore +ffffffff81a66000 T drm_exec_init +ffffffff81a66080 T drm_exec_fini +ffffffff81a66110 t drm_exec_unlock_all +ffffffff81a662b0 T drm_exec_cleanup +ffffffff81a66350 T drm_exec_lock_obj +ffffffff81a66660 t drm_exec_obj_locked +ffffffff81a66750 t dma_resv_unlock +ffffffff81a66800 T drm_exec_unlock_obj +ffffffff81a669b0 T drm_exec_prepare_obj +ffffffff81a66a50 T drm_exec_prepare_array +ffffffff81a66b20 t dma_resv_lock_slow_interruptible +ffffffff81a66c80 t dma_resv_lock_slow +ffffffff81a66d70 t __ww_mutex_lock +ffffffff81a67000 T drm_fb_helper_debug_enter +ffffffff81a67110 T drm_fb_helper_debug_leave +ffffffff81a672b0 T drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81a67370 t __drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81a67440 T drm_fb_helper_blank +ffffffff81a67570 T drm_fb_helper_prepare +ffffffff81a67690 t drm_fb_helper_resume_worker +ffffffff81a676c0 t drm_fb_helper_damage_work +ffffffff81a67850 T drm_fb_helper_unprepare +ffffffff81a67880 T drm_fb_helper_init +ffffffff81a67900 T drm_fb_helper_alloc_info +ffffffff81a67970 T drm_fb_helper_release_info +ffffffff81a679c0 T drm_fb_helper_unregister_info +ffffffff81a679f0 T drm_fb_helper_fini +ffffffff81a67b00 T drm_fb_helper_set_suspend +ffffffff81a67b30 T drm_fb_helper_set_suspend_unlocked +ffffffff81a67b60 T drm_fb_helper_set_par +ffffffff81a67c40 T drm_fb_helper_pan_display +ffffffff81a67d30 T drm_fb_helper_fill_info +ffffffff81a67e00 T drm_fb_helper_initial_config +ffffffff81a67e40 t __drm_fb_helper_initial_config_and_unlock +ffffffff81a68540 T drm_fb_helper_hotplug_event +ffffffff81a686c0 t drm_setup_crtcs_fb +ffffffff81a68840 T drm_fb_helper_lastclose +ffffffff81a68910 T drm_fb_helper_output_poll_changed +ffffffff81a69000 T drm_fb_dma_get_gem_obj +ffffffff81a6a000 T drm_fbdev_dma_setup +ffffffff81a6a1d0 t drm_fbdev_dma_helper_fb_probe +ffffffff81a6a480 t drm_fbdev_dma_client_unregister +ffffffff81a6a4e0 t drm_fbdev_dma_client_restore +ffffffff81a6a530 t drm_fbdev_dma_client_hotplug +ffffffff81a6b000 T drm_fbdev_generic_setup +ffffffff81a6b1d0 t drm_fbdev_generic_helper_fb_probe +ffffffff81a6b370 t drm_fbdev_generic_helper_fb_dirty +ffffffff81a6b670 t drm_fbdev_generic_client_unregister +ffffffff81a6b6d0 t drm_fbdev_generic_client_restore +ffffffff81a6b720 t drm_fbdev_generic_client_hotplug +ffffffff81a6c000 T drm_dev_needs_global_mutex +ffffffff81a6c060 T drm_file_alloc +ffffffff81a6c350 T drm_file_free +ffffffff81a6c5e0 T drm_lastclose +ffffffff81a6c660 T drm_release +ffffffff81a6c6c0 T drm_file_update_pid +ffffffff81a6c710 T drm_release_noglobal +ffffffff81a6c770 T drm_read +ffffffff81a6c7d0 T drm_event_reserve_init_locked +ffffffff81a6c850 T drm_event_reserve_init +ffffffff81a6c920 T drm_event_cancel_free +ffffffff81a6c9b0 T drm_send_event_timestamp_locked +ffffffff81a6c9c0 t drm_send_event_helper +ffffffff81a6cbe0 T drm_send_event_locked +ffffffff81a6cc00 T drm_send_event +ffffffff81a6cc60 T drm_print_memory_stats +ffffffff81a6cf00 T drm_show_memory_stats +ffffffff81a6d180 T drm_show_fdinfo +ffffffff81a6d1a0 T mock_drm_getfile +ffffffff81a6e000 T drm_flip_work_allocate_task +ffffffff81a6e060 T drm_flip_work_queue_task +ffffffff81a6e0c0 T drm_flip_work_queue +ffffffff81a6e180 T drm_flip_work_commit +ffffffff81a6e210 T drm_flip_work_init +ffffffff81a6e280 t flip_worker +ffffffff81a6e3a0 T drm_flip_work_cleanup +ffffffff81a6f000 T drm_fb_clip_offset +ffffffff81a6f040 T drm_fb_memcpy +ffffffff81a6f330 T drm_fb_swab +ffffffff81a6f450 t drm_fb_swab32_line +ffffffff81a6f4b0 t drm_fb_swab16_line +ffffffff81a6f510 t drm_fb_xfrm +ffffffff81a6f850 T drm_fb_xrgb8888_to_rgb332 +ffffffff81a6f8b0 t drm_fb_xrgb8888_to_rgb332_line +ffffffff81a6f9b0 T drm_fb_xrgb8888_to_rgb565 +ffffffff81a6fa40 t drm_fb_xrgb8888_to_rgb565_swab_line +ffffffff81a6fb60 t drm_fb_xrgb8888_to_rgb565_line +ffffffff81a6fc70 T drm_fb_xrgb8888_to_xrgb1555 +ffffffff81a6fcd0 t drm_fb_xrgb8888_to_xrgb1555_line +ffffffff81a6fde0 T drm_fb_xrgb8888_to_argb1555 +ffffffff81a6fe40 t drm_fb_xrgb8888_to_argb1555_line +ffffffff81a6ff60 T drm_fb_xrgb8888_to_rgba5551 +ffffffff81a6ffc0 t drm_fb_xrgb8888_to_rgba5551_line +ffffffff81a700d0 T drm_fb_xrgb8888_to_rgb888 +ffffffff81a70130 t drm_fb_xrgb8888_to_rgb888_line +ffffffff81a701c0 T drm_fb_xrgb8888_to_argb8888 +ffffffff81a70220 t drm_fb_xrgb8888_to_argb8888_line +ffffffff81a702f0 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff81a70350 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff81a703d0 T drm_fb_xrgb8888_to_argb2101010 +ffffffff81a70430 t drm_fb_xrgb8888_to_argb2101010_line +ffffffff81a704c0 T drm_fb_xrgb8888_to_gray8 +ffffffff81a70520 t drm_fb_xrgb8888_to_gray8_line +ffffffff81a70590 T drm_fb_blit +ffffffff81a70c90 T drm_fb_xrgb8888_to_mono +ffffffff81a71030 T drm_fb_build_fourcc_list +ffffffff81a71340 t drm_fb_xrgb8888_to_xbgr8888_line +ffffffff81a71420 t drm_fb_xrgb8888_to_abgr8888_line +ffffffff81a72000 T drm_mode_legacy_fb_format +ffffffff81a720f0 T drm_driver_legacy_fb_format +ffffffff81a721f0 T __drm_format_info +ffffffff81a72270 T drm_format_info +ffffffff81a72320 T drm_get_format_info +ffffffff81a72410 T drm_format_info_block_width +ffffffff81a72460 T drm_format_info_block_height +ffffffff81a724b0 T drm_format_info_bpp +ffffffff81a72530 T drm_format_info_min_pitch +ffffffff81a73000 T drm_framebuffer_check_src_coords +ffffffff81a73130 T drm_mode_addfb +ffffffff81a73380 T drm_mode_addfb2 +ffffffff81a734a0 T drm_mode_addfb_ioctl +ffffffff81a734c0 T drm_internal_framebuffer_create +ffffffff81a73b00 T drm_mode_addfb2_ioctl +ffffffff81a73c20 T drm_mode_rmfb +ffffffff81a73e60 T drm_framebuffer_lookup +ffffffff81a73eb0 t drm_mode_rmfb_work_fn +ffffffff81a73f80 T drm_mode_rmfb_ioctl +ffffffff81a73fa0 T drm_mode_getfb +ffffffff81a74120 T drm_mode_getfb2_ioctl +ffffffff81a74510 T drm_mode_dirtyfb_ioctl +ffffffff81a746d0 T drm_fb_release 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drm_gem_handle_create_tail +ffffffff81a76fa0 t drm_gem_object_handle_put_unlocked +ffffffff81a77110 T drm_gem_handle_create +ffffffff81a77160 T drm_gem_free_mmap_offset +ffffffff81a77190 T drm_gem_create_mmap_offset_size +ffffffff81a771c0 T drm_gem_get_pages +ffffffff81a77220 T drm_gem_put_pages +ffffffff81a77250 T drm_gem_objects_lookup +ffffffff81a77400 T drm_gem_dma_resv_wait +ffffffff81a77570 T drm_gem_close_ioctl +ffffffff81a775c0 T drm_gem_flink_ioctl +ffffffff81a77780 T drm_gem_open_ioctl +ffffffff81a778e0 T drm_gem_open +ffffffff81a77920 T drm_gem_release +ffffffff81a77960 T drm_gem_object_release +ffffffff81a77ad0 T drm_gem_lru_remove +ffffffff81a77bc0 T drm_gem_object_free +ffffffff81a77c10 T drm_gem_mmap_obj +ffffffff81a77d20 T drm_gem_mmap +ffffffff81a77fe0 T drm_gem_print_info +ffffffff81a78130 T drm_gem_pin +ffffffff81a78170 T drm_gem_unpin +ffffffff81a781b0 T drm_gem_vmap +ffffffff81a78220 T drm_gem_vunmap +ffffffff81a78290 T drm_gem_vmap_unlocked +ffffffff81a784d0 T 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backlight_device_unregister +ffffffff81a84da0 T backlight_schedule_update_status +ffffffff81a84dc0 T backlight_enable +ffffffff81a84e00 T backlight_disable +ffffffff81a84e40 T backlight_device_get_by_name +ffffffff81a84ec0 T dev_set_drvdata +ffffffff81a84f60 T dev_get_drvdata +ffffffff81a84fc0 T drm_sysfs_hotplug_event +ffffffff81a84fe0 T drm_sysfs_connector_hotplug_event +ffffffff81a85000 T drm_sysfs_connector_status_event +ffffffff81a85020 T drm_sysfs_connector_property_event +ffffffff81a85040 T dma_fence_get +ffffffff81a85080 T dma_fence_get_rcu +ffffffff81a850c0 T dma_fence_get_rcu_safe +ffffffff81a85100 T dma_fence_release +ffffffff81a85130 T dma_fence_put +ffffffff81a851a0 T dma_fence_signal_timestamp_locked +ffffffff81a85260 T dma_fence_signal +ffffffff81a853b0 T dma_fence_signal_locked +ffffffff81a854e0 T dma_fence_signal_timestamp +ffffffff81a855e0 T dma_fence_is_signaled +ffffffff81a85660 T dma_fence_is_signaled_locked +ffffffff81a857b0 T dma_fence_timestamp +ffffffff81a85860 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dma_fence_chain_find_seqno +ffffffff81a86c90 T dma_fence_chain_walk +ffffffff81a86ef0 T dma_fence_chain_init +ffffffff81a87000 t dma_fence_chain_get_driver_name +ffffffff81a87030 t dma_fence_chain_get_timeline_name +ffffffff81a87060 t dma_fence_chain_enable_signaling +ffffffff81a87250 t dma_fence_chain_signaled +ffffffff81a87350 t dma_fence_chain_release +ffffffff81a874b0 T dma_fence_is_container +ffffffff81a87500 T dmabuf_read +ffffffff81a87530 T dmabuf_write +ffffffff81a87560 T dmabuf_ioctl +ffffffff81a87590 T dmabuf_kqfilter +ffffffff81a875c0 T dmabuf_stat +ffffffff81a87680 T dmabuf_close +ffffffff81a87710 T dmabuf_seek +ffffffff81a877b0 T dma_buf_export +ffffffff81a87870 T dma_buf_get +ffffffff81a87910 T dma_buf_put +ffffffff81a879c0 T dma_buf_fd +ffffffff81a87b10 T get_dma_buf +ffffffff81a87b60 T pcie_get_speed_cap +ffffffff81a87d50 T printk +ffffffff81a87e00 T pcie_get_width_cap +ffffffff81a87f20 T pcie_aspm_enabled +ffffffff81a87fc0 T wait_on_bit +ffffffff81a880a0 T wait_on_bit_timeout +ffffffff81a88170 T wake_up_bit +ffffffff81a881c0 T clear_and_wake_up_bit +ffffffff81a88230 T bit_waitqueue +ffffffff81a88260 T __var_waitqueue +ffffffff81a88290 T drm_linux_init +ffffffff81a88480 T drm_linux_exit +ffffffff81a88500 T pci_resize_resource +ffffffff81a88670 T register_shrinker +ffffffff81a886c0 T unregister_shrinker +ffffffff81a88720 T drmbackoff +ffffffff81a887b0 T bitmap_zalloc +ffffffff81a887e0 T bitmap_free +ffffffff81a88800 T atomic_dec_and_mutex_lock +ffffffff81a88890 T interval_tree_iter_first +ffffffff81a88940 T interval_tree_remove +ffffffff81a88960 T interval_tree_insert +ffffffff81a889d0 T syncfile_read +ffffffff81a88a00 T syncfile_write +ffffffff81a88a30 T syncfile_ioctl +ffffffff81a88a60 T syncfile_kqfilter +ffffffff81a88a90 T syncfile_stat +ffffffff81a88b40 T syncfile_close +ffffffff81a88bf0 T syncfile_seek +ffffffff81a88c80 T fd_install +ffffffff81a88d70 T fput +ffffffff81a88dd0 T get_unused_fd_flags +ffffffff81a88f10 T put_unused_fd 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drm_mode_obj_find_prop_id +ffffffff81a91ec0 T drm_mode_obj_set_property_ioctl +ffffffff81a93000 T drm_mode_debug_printmodeline +ffffffff81a93140 T drm_mode_vrefresh +ffffffff81a931e0 T drm_mode_create +ffffffff81a93200 T drm_mode_destroy +ffffffff81a93240 T drm_mode_probed_add +ffffffff81a932f0 T drm_analog_tv_mode +ffffffff81a93c50 T drm_cvt_mode +ffffffff81a940e0 T drm_mode_set_name +ffffffff81a94130 T drm_gtf_mode_complex +ffffffff81a94440 T drm_gtf_mode +ffffffff81a944a0 T drm_mode_get_hv_timing +ffffffff81a944f0 T drm_mode_init +ffffffff81a945c0 T drm_mode_set_crtcinfo +ffffffff81a94780 T drm_mode_copy +ffffffff81a947e0 T drm_mode_duplicate +ffffffff81a94870 T drm_mode_match +ffffffff81a94a10 T drm_mode_equal +ffffffff81a94a30 T drm_mode_equal_no_clocks +ffffffff81a94a50 T drm_mode_equal_no_clocks_no_stereo +ffffffff81a94b10 T drm_mode_validate_driver +ffffffff81a94c00 T drm_mode_validate_size +ffffffff81a94c50 T drm_mode_validate_ycbcr420 +ffffffff81a94cc0 T drm_mode_is_420_only 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drm_warn_on_modeset_not_all_locked +ffffffff81a97710 T drm_modeset_unlock_all +ffffffff81a97810 T drm_modeset_drop_locks +ffffffff81a978a0 T drm_modeset_unlock +ffffffff81a97980 t modeset_lock +ffffffff81a97d20 T drm_modeset_lock_init +ffffffff81a97d90 T drm_modeset_lock +ffffffff81a97ed0 T drm_modeset_lock_single_interruptible +ffffffff81a98020 t __ww_mutex_lock +ffffffff81a99000 T drm_mtrr_add +ffffffff81a99080 T drm_mtrr_del +ffffffff81a9a000 T drm_panel_init +ffffffff81a9a090 T drm_panel_add +ffffffff81a9a0f0 T drm_panel_remove +ffffffff81a9a150 T drm_panel_prepare +ffffffff81a9a280 T drm_panel_unprepare +ffffffff81a9a3c0 T drm_panel_enable +ffffffff81a9a4d0 T drm_panel_disable +ffffffff81a9a5d0 T drm_panel_get_modes +ffffffff81a9a630 T drm_is_panel_follower +ffffffff81a9a680 T drm_panel_add_follower +ffffffff81a9a6e0 T drm_panel_remove_follower +ffffffff81a9a700 T devm_drm_panel_add_follower +ffffffff81a9a760 T drm_panel_of_backlight +ffffffff81a9b000 T drm_get_panel_orientation_quirk +ffffffff81a9c000 T drm_pci_set_busid +ffffffff81a9c0b0 t kasprintf +ffffffff81a9d000 T drm_universal_plane_init +ffffffff81a9d100 t __drm_universal_plane_init +ffffffff81a9d6b0 T __drmm_universal_plane_alloc +ffffffff81a9d820 t drmm_universal_plane_alloc_release +ffffffff81a9d870 T __drm_universal_plane_alloc +ffffffff81a9d9d0 T drm_plane_register_all +ffffffff81a9dae0 T drm_plane_unregister_all +ffffffff81a9db60 T drm_plane_cleanup +ffffffff81a9dce0 T drm_plane_from_index +ffffffff81a9dd40 T drm_plane_force_disable +ffffffff81a9de80 T drm_mode_plane_set_obj_prop +ffffffff81a9df10 T drm_mode_getplane_res +ffffffff81a9e050 T drm_mode_getplane +ffffffff81a9e1d0 T drm_plane_check_pixel_format +ffffffff81a9e290 T drm_any_plane_has_format +ffffffff81a9e3b0 T drm_mode_setplane +ffffffff81a9e720 T drm_mode_cursor_ioctl +ffffffff81a9e790 t drm_mode_cursor_common +ffffffff81a9ed60 T drm_mode_cursor2_ioctl +ffffffff81a9ed80 T drm_mode_page_flip_ioctl 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drm_kms_helper_poll_init +ffffffff81aa5360 t output_poll_execute +ffffffff81aa5630 T drm_kms_helper_poll_fini +ffffffff81aa5680 T drm_connector_helper_hpd_irq_event +ffffffff81aa5770 t check_connector_changed +ffffffff81aa5970 T drm_helper_hpd_irq_event +ffffffff81aa5b20 T drm_crtc_helper_mode_valid_fixed +ffffffff81aa5b70 T drm_connector_helper_get_modes_from_ddc +ffffffff81aa5c20 T drm_connector_helper_get_modes_fixed +ffffffff81aa5db0 T drm_connector_helper_get_modes +ffffffff81aa5e40 T drm_connector_helper_tv_get_modes +ffffffff81aa60b0 t __delayed_work_tick +ffffffff81aa7000 T drm_property_create +ffffffff81aa7220 T drm_property_create_enum +ffffffff81aa72e0 T drm_property_add_enum +ffffffff81aa7510 T drm_property_destroy +ffffffff81aa75d0 T drm_property_create_bitmask +ffffffff81aa7710 T drm_property_create_range +ffffffff81aa7780 T drm_property_create_signed_range +ffffffff81aa77f0 T drm_property_create_object +ffffffff81aa78a0 T drm_property_create_bool +ffffffff81aa7910 T drm_mode_getproperty_ioctl +ffffffff81aa7b90 T drm_property_create_blob +ffffffff81aa7d00 t drm_property_free_blob +ffffffff81aa7d90 T drm_property_blob_put +ffffffff81aa7dd0 T drm_property_destroy_user_blobs +ffffffff81aa7e60 T drm_property_blob_get +ffffffff81aa7eb0 T drm_property_lookup_blob +ffffffff81aa7ed0 T drm_property_replace_global_blob +ffffffff81aa8050 T drm_property_replace_blob +ffffffff81aa80c0 T drm_mode_getblob_ioctl +ffffffff81aa81a0 T drm_mode_createblob_ioctl +ffffffff81aa82d0 T drm_mode_destroyblob_ioctl +ffffffff81aa8410 T drm_property_change_valid_get +ffffffff81aa8680 T drm_property_change_valid_put +ffffffff81aa9000 T drm_rect_intersect +ffffffff81aa9080 T drm_rect_clip_scaled +ffffffff81aa92f0 T drm_rect_calc_hscale +ffffffff81aa93d0 T drm_rect_calc_vscale +ffffffff81aa94b0 T drm_rect_debug_print +ffffffff81aa95e0 T drm_rect_rotate +ffffffff81aa96a0 T drm_rect_rotate_inv +ffffffff81aaa000 T drm_self_refresh_helper_update_avg_times +ffffffff81aaa170 T drm_self_refresh_helper_alter_state +ffffffff81aaa320 T drm_self_refresh_helper_init +ffffffff81aaa4f0 t drm_self_refresh_helper_entry_work +ffffffff81aaa6a0 T drm_self_refresh_helper_cleanup +ffffffff81aaa730 t __delayed_work_tick +ffffffff81aab000 T drm_suballoc_manager_init +ffffffff81aab1a0 T drm_suballoc_manager_fini +ffffffff81aab2e0 t drm_suballoc_try_free +ffffffff81aab3f0 T drm_suballoc_new +ffffffff81aabf30 t drm_suballoc_event +ffffffff81aac080 T drm_suballoc_free +ffffffff81aad000 T drm_syncobj_find +ffffffff81aad090 T drm_syncobj_add_point +ffffffff81aad1f0 t syncobj_wait_syncobj_func +ffffffff81aad2d0 t syncobj_eventfd_entry_func +ffffffff81aad400 T drm_syncobj_replace_fence +ffffffff81aad4e0 T drm_syncobj_find_fence +ffffffff81aad8e0 t drm_syncobj_fence_add_wait +ffffffff81aad9e0 T drm_syncobj_free +ffffffff81aada90 T drm_syncobj_create +ffffffff81aadcb0 T drm_syncobj_get_handle +ffffffff81aade10 T drm_syncobj_get_fd +ffffffff81aade70 T drm_syncobj_open +ffffffff81aadeb0 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drm_crtc_accurate_vblank_count +ffffffff81ab11d0 t drm_update_vblank_count +ffffffff81ab1670 T drm_vblank_disable_and_save +ffffffff81ab17e0 T drm_vblank_init +ffffffff81ab1990 t vblank_disable_fn +ffffffff81ab1a30 t drm_vblank_init_release +ffffffff81ab1ac0 T drm_dev_has_vblank +ffffffff81ab1af0 T drm_crtc_vblank_waitqueue +ffffffff81ab1b40 T drm_calc_timestamping_constants +ffffffff81ab1d80 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff81ab2330 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff81ab2350 T drm_crtc_vblank_count +ffffffff81ab23e0 T drm_crtc_vblank_count_and_time +ffffffff81ab24b0 t drm_vblank_count_and_time +ffffffff81ab2570 T drm_crtc_next_vblank_start +ffffffff81ab26d0 T drm_crtc_arm_vblank_event +ffffffff81ab27b0 T drm_crtc_send_vblank_event +ffffffff81ab2980 t send_vblank_event +ffffffff81ab2a30 T drm_vblank_get +ffffffff81ab2b50 t drm_vblank_enable +ffffffff81ab2da0 T drm_crtc_vblank_get +ffffffff81ab2ec0 T drm_vblank_put +ffffffff81ab2ff0 T drm_crtc_vblank_put +ffffffff81ab3010 T drm_wait_one_vblank +ffffffff81ab3580 T drm_crtc_wait_one_vblank +ffffffff81ab35a0 T drm_crtc_vblank_off +ffffffff81ab3a10 T drm_crtc_vblank_reset +ffffffff81ab3b50 T drm_crtc_set_max_vblank_count +ffffffff81ab3c30 T drm_crtc_vblank_on +ffffffff81ab3da0 t drm_reset_vblank_timestamp +ffffffff81ab3fe0 T drm_crtc_vblank_restore +ffffffff81ab4410 T drm_legacy_modeset_ctl_ioctl +ffffffff81ab4670 T drm_wait_vblank_ioctl +ffffffff81ab4c70 t drm_wait_vblank_reply +ffffffff81ab4d90 t drm_queue_vblank_event +ffffffff81ab5130 T drm_handle_vblank +ffffffff81ab54d0 t drm_handle_vblank_events +ffffffff81ab5790 T drm_crtc_handle_vblank +ffffffff81ab57b0 T drm_crtc_get_sequence_ioctl +ffffffff81ab59b0 T drm_crtc_queue_sequence_ioctl +ffffffff81ab5cd0 t __get_vblank_counter +ffffffff81ab6000 T drm_handle_vblank_works +ffffffff81ab61c0 T drm_vblank_cancel_pending_works +ffffffff81ab6320 T drm_vblank_work_schedule +ffffffff81ab6600 T drm_vblank_work_cancel_sync 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hdmi_audio_infoframe_check +ffffffff81ab87b0 T hdmi_audio_infoframe_pack_only +ffffffff81ab8910 T hdmi_audio_infoframe_pack +ffffffff81ab8960 T hdmi_audio_infoframe_pack_for_dp +ffffffff81ab8a50 T hdmi_vendor_infoframe_init +ffffffff81ab8ab0 T hdmi_vendor_infoframe_check +ffffffff81ab8b50 T hdmi_vendor_infoframe_pack_only +ffffffff81ab8d10 T hdmi_vendor_infoframe_pack +ffffffff81ab8db0 T hdmi_drm_infoframe_init +ffffffff81ab8e10 T hdmi_drm_infoframe_check +ffffffff81ab8e60 T hdmi_drm_infoframe_pack_only +ffffffff81ab9060 T hdmi_drm_infoframe_pack +ffffffff81ab90b0 T hdmi_infoframe_check +ffffffff81ab9210 T hdmi_infoframe_pack_only +ffffffff81ab9440 T hdmi_infoframe_pack +ffffffff81ab95c0 T hdmi_infoframe_log +ffffffff81aba6e0 T hdmi_drm_infoframe_unpack_only +ffffffff81aba7c0 T hdmi_infoframe_unpack +ffffffff81abb000 T list_sort +ffffffff81abc000 T radix_tree_lookup +ffffffff81abc0b0 T radix_tree_iter_find +ffffffff81abc180 T radix_tree_delete +ffffffff81abc330 T radix_tree_iter_delete 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drm_dp_pcon_is_frl_ready +ffffffff81ac3fb0 T drm_dp_pcon_frl_configure_1 +ffffffff81ac40c0 T drm_dp_pcon_frl_configure_2 +ffffffff81ac4130 T drm_dp_pcon_reset_frl_config +ffffffff81ac4190 T drm_dp_pcon_frl_enable +ffffffff81ac4260 T drm_dp_pcon_hdmi_link_active +ffffffff81ac42c0 T drm_dp_pcon_hdmi_link_mode +ffffffff81ac4340 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff81ac4450 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff81ac4480 T drm_dp_pcon_dsc_max_slices +ffffffff81ac4510 T drm_dp_pcon_dsc_max_slice_width +ffffffff81ac4540 T drm_dp_pcon_dsc_bpp_incr +ffffffff81ac4580 T drm_dp_pcon_pps_default +ffffffff81ac4610 T drm_dp_pcon_pps_override_buf +ffffffff81ac46d0 T drm_dp_pcon_pps_override_param +ffffffff81ac47e0 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff81ac4890 T drm_edp_backlight_set_level +ffffffff81ac4980 T drm_edp_backlight_enable +ffffffff81ac4bd0 t drm_edp_backlight_set_enable +ffffffff81ac4d30 T drm_edp_backlight_disable +ffffffff81ac4d80 T drm_edp_backlight_init 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drm_dp_mst_connector_early_unregister +ffffffff81ac76c0 T drm_dp_send_power_updown_phy +ffffffff81ac7980 t drm_dp_mst_topology_put_port +ffffffff81ac7ac0 t drm_dp_mst_wait_tx_reply +ffffffff81ac7ea0 T drm_dp_send_query_stream_enc_status +ffffffff81ac81d0 T drm_dp_add_payload_part1 +ffffffff81ac83c0 T drm_dp_remove_payload +ffffffff81ac8590 T drm_dp_add_payload_part2 +ffffffff81ac87a0 T drm_dp_get_vc_payload_bw +ffffffff81ac8840 T drm_dp_read_mst_cap +ffffffff81ac88a0 T drm_dp_mst_topology_mgr_set_mst +ffffffff81ac8bb0 t drm_dp_dpcd_write_payload +ffffffff81ac8d80 t drm_dp_mst_topology_put_mstb +ffffffff81ac8ea0 T drm_dp_mst_topology_mgr_suspend +ffffffff81ac8fb0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff81ac9020 T drm_dp_mst_topology_mgr_resume +ffffffff81ac92d0 T drm_dp_mst_hpd_irq_handle_event +ffffffff81aca340 T drm_dp_mst_hpd_irq_send_new_request +ffffffff81aca3e0 T drm_dp_mst_detect_port +ffffffff81aca580 T drm_dp_mst_edid_read +ffffffff81aca6b0 T drm_dp_mst_get_edid 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drm_hdmi_avi_infoframe_bars +ffffffff81ad41d0 T drm_hdmi_avi_infoframe_content_type +ffffffff81ad5000 T drm_scdc_read +ffffffff81ad50a0 T drm_scdc_write +ffffffff81ad51a0 T drm_scdc_get_scrambling_status +ffffffff81ad5280 T drm_scdc_set_scrambling +ffffffff81ad5440 T drm_scdc_set_high_tmds_clock_ratio +ffffffff81ad6000 T drm_gem_ttm_mmap +ffffffff81ad6080 T drm_gem_ttm_vmap +ffffffff81ad6090 T drm_gem_ttm_vunmap +ffffffff81ad7000 T ttm_agp_bind +ffffffff81ad7060 T ttm_agp_unbind +ffffffff81ad7080 T ttm_agp_is_bound +ffffffff81ad70d0 T ttm_agp_destroy +ffffffff81ad70f0 T ttm_agp_tt_create +ffffffff81ad8000 T ttm_bo_move_to_lru_tail +ffffffff81ad8040 T ttm_bo_set_bulk_move +ffffffff81ad8120 T ttm_bo_put +ffffffff81ad8750 T ttm_bo_eviction_valuable +ffffffff81ad87a0 T ttm_mem_evict_first +ffffffff81ad8fe0 t ttm_bo_evict_swapout_allowable +ffffffff81ad9220 t dma_resv_unlock +ffffffff81ad92d0 t ttm_bo_cleanup_refs +ffffffff81ad96e0 t ttm_bo_unreserve +ffffffff81ad97e0 T ttm_bo_pin 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ttm_transfered_destroy +ffffffff81add000 T ttm_bo_vm_reserve +ffffffff81add1c0 t dma_resv_lock_interruptible +ffffffff81add300 T ttm_bo_vm_fault_reserved +ffffffff81add690 T ttm_bo_vm_fault +ffffffff81add830 T ttm_bo_vm_reference +ffffffff81add860 T ttm_bo_vm_detach +ffffffff81add870 T ttm_bo_mmap_obj +ffffffff81ade000 T ttm_global_swapout +ffffffff81ade100 T ttm_device_swapout +ffffffff81ade250 T ttm_device_init +ffffffff81ade570 T ttm_device_fini +ffffffff81ade790 T ttm_device_clear_dma_mappings +ffffffff81ade860 t ttm_device_clear_lru_dma_mappings +ffffffff81adf000 T ttm_eu_backoff_reservation +ffffffff81adf170 T ttm_eu_reserve_buffers +ffffffff81adf680 T ttm_eu_fence_buffer_objects +ffffffff81adf820 t __ww_mutex_lock +ffffffff81ae0000 T ttm_prot_from_caching +ffffffff81ae1000 T ttm_pool_alloc +ffffffff81ae1b50 t ttm_pool_free_range +ffffffff81ae1ed0 T ttm_pool_free +ffffffff81ae1f40 t ttm_pool_shrink +ffffffff81ae21a0 T ttm_pool_init +ffffffff81ae2480 T ttm_pool_fini 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ttm_resource_compat +ffffffff81ae4c90 T ttm_resource_set_bo +ffffffff81ae4cf0 T ttm_resource_manager_init +ffffffff81ae4da0 T ttm_resource_manager_evict_all +ffffffff81ae5030 T ttm_resource_manager_usage +ffffffff81ae50a0 T ttm_resource_manager_debug +ffffffff81ae51c0 T ttm_resource_manager_first +ffffffff81ae5250 T ttm_resource_manager_next +ffffffff81ae5370 T ttm_kmap_iter_iomap_init +ffffffff81ae53d0 T ttm_kmap_iter_linear_io_init +ffffffff81ae55f0 T ttm_kmap_iter_linear_io_fini +ffffffff81ae5640 T ttm_resource_manager_create_debugfs +ffffffff81ae5670 t ttm_kmap_iter_iomap_map_local +ffffffff81ae5760 t ttm_kmap_iter_iomap_unmap_local +ffffffff81ae5790 t ttm_kmap_iter_linear_io_map_local +ffffffff81ae6000 T ttm_sys_man_init +ffffffff81ae6140 t ttm_sys_man_alloc +ffffffff81ae61d0 t ttm_sys_man_free +ffffffff81ae7000 T ttm_tt_create +ffffffff81ae7120 T ttm_tt_destroy +ffffffff81ae7140 T ttm_tt_init +ffffffff81ae7240 T ttm_tt_fini +ffffffff81ae7360 T ttm_sg_tt_init +ffffffff81ae75e0 T ttm_tt_swapin +ffffffff81ae7720 T ttm_tt_swapout +ffffffff81ae7780 T ttm_tt_populate +ffffffff81ae7930 T ttm_tt_unpopulate +ffffffff81ae79f0 T ttm_tt_mgr_init +ffffffff81ae7a50 T ttm_kmap_iter_tt_init +ffffffff81ae7ab0 T ttm_tt_pages_limit +ffffffff81ae7ae0 t ttm_kmap_iter_tt_map_local +ffffffff81ae7b40 t ttm_kmap_iter_tt_unmap_local +ffffffff81ae8000 T drm_sched_entity_init +ffffffff81ae81b0 T drm_sched_entity_modify_sched +ffffffff81ae8230 T drm_sched_entity_is_ready +ffffffff81ae8270 T drm_sched_entity_error +ffffffff81ae82b0 T drm_sched_entity_flush +ffffffff81ae8620 t drm_sched_entity_kill +ffffffff81ae8820 T drm_sched_entity_fini +ffffffff81ae88c0 T drm_sched_entity_destroy +ffffffff81ae8990 T drm_sched_entity_set_priority +ffffffff81ae89e0 T drm_sched_entity_pop_job +ffffffff81ae8c90 T drm_sched_entity_select_rq +ffffffff81ae8d90 T drm_sched_entity_push_job +ffffffff81ae8f20 t drm_sched_entity_kill_jobs_cb +ffffffff81ae90e0 t drm_sched_entity_kill_jobs_work +ffffffff81ae9160 t drm_sched_entity_clear_dep +ffffffff81ae9180 t drm_sched_entity_wakeup +ffffffff81aea000 T drm_sched_fence_slab_init +ffffffff81aea070 T drm_sched_fence_slab_fini +ffffffff81aea090 T drm_sched_fence_scheduled +ffffffff81aea100 T drm_sched_fence_finished +ffffffff81aea120 T drm_sched_fence_free +ffffffff81aea1d0 T to_drm_sched_fence +ffffffff81aea230 T drm_sched_fence_alloc +ffffffff81aea2b0 T drm_sched_fence_init +ffffffff81aea340 t drm_sched_fence_get_driver_name +ffffffff81aea370 t drm_sched_fence_get_timeline_name +ffffffff81aea3d0 t drm_sched_fence_release_scheduled +ffffffff81aea4d0 t drm_sched_fence_release_finished +ffffffff81aea510 t drm_sched_fence_set_deadline_finished +ffffffff81aeb000 T drm_sched_rq_update_fifo +ffffffff81aeb110 T drm_sched_rq_add_entity +ffffffff81aeb1a0 T drm_sched_rq_remove_entity +ffffffff81aeb290 T drm_sched_fault +ffffffff81aeb2e0 T drm_sched_suspend_timeout +ffffffff81aeb370 T drm_sched_resume_timeout +ffffffff81aeb430 T drm_sched_stop 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chv_pre_enable_dp +ffffffff81af8eb0 t vlv_enable_dp +ffffffff81af8ef0 t vlv_disable_dp +ffffffff81af8f80 t chv_post_disable_dp +ffffffff81af9000 t chv_dp_post_pll_disable +ffffffff81af9020 t vlv_dp_pre_pll_enable +ffffffff81af9060 t vlv_pre_enable_dp +ffffffff81af90a0 t vlv_post_disable_dp +ffffffff81af90c0 t g4x_pre_enable_dp +ffffffff81af93b0 t g4x_enable_dp +ffffffff81af9410 t g4x_disable_dp +ffffffff81af94a0 t g4x_post_disable_dp +ffffffff81af96e0 t cpt_set_link_train +ffffffff81af97b0 t g4x_set_link_train +ffffffff81af9880 t chv_set_signal_levels +ffffffff81af9960 t vlv_set_signal_levels +ffffffff81af9a40 t ivb_cpu_edp_set_signal_levels +ffffffff81af9b60 t snb_cpu_edp_set_signal_levels +ffffffff81af9c80 t g4x_set_signal_levels +ffffffff81af9d90 t intel_dp_preemph_max_3 +ffffffff81af9dc0 t intel_dp_voltage_max_3 +ffffffff81af9df0 t intel_dp_preemph_max_2 +ffffffff81af9e20 t intel_dp_voltage_max_2 +ffffffff81af9e50 t g4x_digital_port_connected +ffffffff81af9ef0 t ilk_digital_port_connected +ffffffff81af9f60 t ibx_digital_port_connected +ffffffff81af9fd0 t intel_dp_encoder_reset +ffffffff81afa0f0 t intel_dp_encoder_destroy +ffffffff81afa160 t intel_dp_prepare +ffffffff81afa410 t intel_enable_dp +ffffffff81afa6d0 t intel_dp_link_down +ffffffff81afaa90 t assert_dp_port +ffffffff81afb000 T g4x_hdmi_connector_atomic_check +ffffffff81afb1a0 T g4x_hdmi_init +ffffffff81afb580 t intel_hdmi_hotplug +ffffffff81afb5e0 t g4x_hdmi_compute_config +ffffffff81afb720 t pch_disable_hdmi +ffffffff81afb740 t pch_post_disable_hdmi +ffffffff81afb760 t g4x_disable_hdmi +ffffffff81afb7b0 t intel_hdmi_get_hw_state +ffffffff81afb880 t intel_hdmi_get_config +ffffffff81afba50 t chv_hdmi_pre_pll_enable +ffffffff81afba90 t chv_hdmi_pre_enable +ffffffff81afbc20 t vlv_enable_hdmi +ffffffff81afbca0 t chv_hdmi_post_disable +ffffffff81afbd10 t chv_hdmi_post_pll_disable +ffffffff81afbd30 t vlv_hdmi_pre_pll_enable +ffffffff81afbd70 t vlv_hdmi_pre_enable +ffffffff81afbef0 t vlv_hdmi_post_disable +ffffffff81afbf10 t intel_hdmi_pre_enable +ffffffff81afbf90 t cpt_enable_hdmi +ffffffff81afc1f0 t ibx_enable_hdmi +ffffffff81afc460 t g4x_enable_hdmi +ffffffff81afc590 t intel_disable_hdmi +ffffffff81afc810 t intel_hdmi_prepare +ffffffff81afd000 T hsw_ips_disable +ffffffff81afd170 T hsw_ips_pre_update +ffffffff81afd210 T hsw_ips_post_update +ffffffff81afd440 T hsw_crtc_supports_ips +ffffffff81afd4a0 T hsw_crtc_state_ips_capable +ffffffff81afd540 T hsw_ips_compute_config +ffffffff81afd680 T hsw_ips_get_config +ffffffff81afd720 T hsw_ips_crtc_debugfs_add +ffffffff81afe000 T i9xx_check_plane_surface +ffffffff81afe310 T i965_plane_max_stride +ffffffff81afe380 T intel_primary_plane_create +ffffffff81afe850 t i9xx_plane_min_cdclk +ffffffff81afe8c0 t i9xx_plane_max_stride +ffffffff81afe930 t hsw_primary_max_stride +ffffffff81afe990 t ilk_primary_max_stride +ffffffff81afea00 t i830_plane_update_arm +ffffffff81afea50 t i9xx_plane_update_noarm +ffffffff81afeb80 t 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i9xx_wm_init +ffffffff81b00e90 t intel_get_cxsr_latency +ffffffff81b00f50 t ilk_compute_pipe_wm +ffffffff81b01300 t ilk_compute_intermediate_wm +ffffffff81b01540 t ilk_initial_watermarks +ffffffff81b015d0 t ilk_optimize_watermarks +ffffffff81b016a0 t ilk_wm_get_hw_state +ffffffff81b01b20 t ilk_compute_wm_level +ffffffff81b02030 t ilk_validate_wm_level +ffffffff81b02180 t ilk_compute_wm_maximums +ffffffff81b023b0 t ilk_program_watermarks +ffffffff81b031e0 t ilk_wm_merge +ffffffff81b034a0 t vlv_compute_pipe_wm +ffffffff81b03e90 t vlv_compute_intermediate_wm +ffffffff81b041e0 t vlv_initial_watermarks +ffffffff81b04270 t vlv_atomic_update_fifo +ffffffff81b04580 t vlv_optimize_watermarks +ffffffff81b04650 t vlv_wm_get_hw_state_and_sanitize +ffffffff81b05530 t _vlv_compute_pipe_wm +ffffffff81b05850 t vlv_invalidate_wms +ffffffff81b059c0 t vlv_program_watermarks +ffffffff81b06200 t chv_set_memory_dvfs +ffffffff81b06410 t g4x_compute_pipe_wm +ffffffff81b06d40 t g4x_compute_intermediate_wm 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intel_plane_check_src_coordinates +ffffffff81b14220 T intel_plane_helper_add +ffffffff81b14260 t intel_prepare_plane_fb +ffffffff81b14540 t intel_cleanup_plane_fb +ffffffff81b15000 T intel_audio_sdp_split_update +ffffffff81b150e0 T intel_audio_compute_config +ffffffff81b151a0 T intel_audio_codec_enable +ffffffff81b153b0 T intel_audio_codec_disable +ffffffff81b15630 T intel_audio_codec_get_config +ffffffff81b15680 T intel_audio_hooks_init +ffffffff81b15700 T intel_audio_cdclk_change_pre +ffffffff81b157a0 T intel_audio_cdclk_change_post +ffffffff81b15890 T intel_audio_init +ffffffff81b158a0 T intel_audio_register +ffffffff81b158d0 T intel_audio_deinit +ffffffff81b15920 t g4x_audio_codec_enable +ffffffff81b15b30 t g4x_audio_codec_disable +ffffffff81b15bd0 t g4x_audio_codec_get_config +ffffffff81b15d10 t ibx_audio_codec_enable +ffffffff81b15f10 t ibx_audio_codec_disable +ffffffff81b16120 t intel_acomp_get_config +ffffffff81b161a0 t audio_config_hdmi_pixel_clock +ffffffff81b16390 t hsw_audio_codec_enable +ffffffff81b16b20 t hsw_audio_codec_disable +ffffffff81b17000 T intel_backlight_invert_pwm_level +ffffffff81b170c0 T intel_backlight_set_pwm_level +ffffffff81b17130 T intel_backlight_level_to_pwm +ffffffff81b17350 T intel_backlight_level_from_pwm +ffffffff81b17510 T intel_backlight_set_acpi +ffffffff81b17750 T intel_backlight_disable +ffffffff81b17840 T intel_backlight_enable +ffffffff81b17900 t __intel_backlight_enable +ffffffff81b17a50 T intel_backlight_device_register +ffffffff81b17d70 t kasprintf +ffffffff81b17e50 T intel_backlight_device_unregister +ffffffff81b17eb0 T intel_backlight_update +ffffffff81b17f50 T intel_backlight_setup +ffffffff81b18140 T intel_backlight_destroy +ffffffff81b18170 T intel_backlight_init_funcs +ffffffff81b182f0 t intel_backlight_device_update_status +ffffffff81b18550 t intel_backlight_device_get_brightness +ffffffff81b18720 t bxt_setup_backlight +ffffffff81b189b0 t bxt_get_backlight +ffffffff81b189f0 t bxt_set_backlight +ffffffff81b18a30 t bxt_disable_backlight +ffffffff81b18b90 t bxt_enable_backlight +ffffffff81b18e70 t bxt_hz_to_pwm +ffffffff81b18eb0 t cnp_setup_backlight +ffffffff81b191b0 t cnp_disable_backlight +ffffffff81b19290 t cnp_enable_backlight +ffffffff81b19480 t cnp_hz_to_pwm +ffffffff81b194c0 t lpt_setup_backlight +ffffffff81b198a0 t lpt_get_backlight +ffffffff81b19900 t lpt_set_backlight +ffffffff81b19980 t lpt_disable_backlight +ffffffff81b19ad0 t lpt_enable_backlight +ffffffff81b19d20 t lpt_hz_to_pwm +ffffffff81b19d90 t pch_get_backlight +ffffffff81b19df0 t spt_hz_to_pwm +ffffffff81b19e40 t pch_setup_backlight +ffffffff81b1a090 t pch_set_backlight +ffffffff81b1a110 t pch_disable_backlight +ffffffff81b1a230 t pch_enable_backlight +ffffffff81b1a4f0 t pch_hz_to_pwm +ffffffff81b1a530 t ext_pwm_setup_backlight +ffffffff81b1a5f0 t ext_pwm_get_backlight +ffffffff81b1a640 t ext_pwm_set_backlight +ffffffff81b1a660 t ext_pwm_disable_backlight +ffffffff81b1a680 t ext_pwm_enable_backlight +ffffffff81b1a6b0 t vlv_setup_backlight +ffffffff81b1a940 t vlv_get_backlight +ffffffff81b1a9f0 t vlv_set_backlight +ffffffff81b1aa80 t vlv_disable_backlight +ffffffff81b1ab60 t vlv_enable_backlight +ffffffff81b1ad40 t vlv_hz_to_pwm +ffffffff81b1adf0 t i965_setup_backlight +ffffffff81b1b060 t i9xx_get_backlight +ffffffff81b1b110 t i9xx_set_backlight +ffffffff81b1b270 t i965_disable_backlight +ffffffff81b1b340 t i965_enable_backlight +ffffffff81b1b530 t i965_hz_to_pwm +ffffffff81b1b590 t i9xx_setup_backlight +ffffffff81b1b910 t i9xx_disable_backlight +ffffffff81b1b980 t i9xx_enable_backlight +ffffffff81b1bb60 t i9xx_hz_to_pwm +ffffffff81b1bbc0 t intel_pwm_setup_backlight +ffffffff81b1bce0 t intel_pwm_get_backlight +ffffffff81b1bdc0 t intel_pwm_set_backlight +ffffffff81b1be80 t intel_pwm_disable_backlight +ffffffff81b1bf40 t intel_pwm_enable_backlight +ffffffff81b1d000 T intel_bios_encoder_port +ffffffff81b1d080 t dvo_port_to_port +ffffffff81b1d260 T intel_bios_dp_max_link_rate +ffffffff81b1d2e0 T intel_bios_dp_max_lane_count +ffffffff81b1d330 T intel_bios_encoder_supports_dvi +ffffffff81b1d360 T intel_bios_encoder_supports_hdmi +ffffffff81b1d3a0 T intel_bios_encoder_supports_dp +ffffffff81b1d3d0 T intel_bios_encoder_supports_edp +ffffffff81b1d410 T intel_bios_encoder_supports_dsi +ffffffff81b1d440 T intel_bios_encoder_is_lspcon +ffffffff81b1d490 T intel_bios_hdmi_level_shift +ffffffff81b1d4f0 T intel_bios_hdmi_max_tmds_clock +ffffffff81b1d580 T intel_bios_is_valid_vbt +ffffffff81b1d680 T intel_bios_init +ffffffff81b1f750 T intel_bios_init_panel_early +ffffffff81b1f770 t intel_bios_init_panel +ffffffff81b21a40 T intel_bios_init_panel_late +ffffffff81b21a60 T intel_bios_driver_remove +ffffffff81b21b70 T intel_bios_fini_panel +ffffffff81b21c80 T intel_bios_is_tv_present +ffffffff81b21d00 T intel_bios_is_lvds_present +ffffffff81b21db0 T intel_bios_is_port_present +ffffffff81b21e90 T intel_bios_encoder_supports_dp_dual_mode +ffffffff81b21f00 T intel_bios_is_dsi_present +ffffffff81b21fd0 T intel_bios_get_dsc_params +ffffffff81b22200 T intel_bios_dp_aux_ch +ffffffff81b22300 T intel_bios_dp_has_shared_aux_ch +ffffffff81b22390 T intel_bios_dp_boost_level +ffffffff81b22420 T intel_bios_hdmi_boost_level +ffffffff81b224c0 T intel_bios_hdmi_ddc_pin +ffffffff81b22630 T intel_bios_encoder_supports_typec_usb +ffffffff81b22680 T intel_bios_encoder_supports_tbt +ffffffff81b226d0 T intel_bios_encoder_lane_reversal +ffffffff81b22710 T intel_bios_encoder_hpd_invert +ffffffff81b22750 T intel_bios_encoder_data_lookup +ffffffff81b22820 T intel_bios_for_each_encoder +ffffffff81b228a0 t opregion_get_panel_type +ffffffff81b228c0 t vbt_get_panel_type +ffffffff81b229d0 t pnpid_get_panel_type +ffffffff81b22bd0 t fallback_get_panel_type +ffffffff81b22c00 t fill_detail_timing_data +ffffffff81b23000 T icl_pcode_restrict_qgv_points +ffffffff81b23130 T intel_bw_init_hw +ffffffff81b232a0 t tgl_get_bw_info +ffffffff81b238c0 t icl_get_bw_info +ffffffff81b23cb0 T intel_bw_crtc_update +ffffffff81b23da0 t intel_bw_crtc_data_rate +ffffffff81b23ec0 T intel_atomic_get_old_bw_state +ffffffff81b23ee0 T intel_atomic_get_new_bw_state +ffffffff81b23f00 T intel_atomic_get_bw_state +ffffffff81b23f20 T intel_bw_min_cdclk +ffffffff81b241a0 T intel_bw_calc_min_cdclk +ffffffff81b245b0 T intel_bw_atomic_check +ffffffff81b250e0 T intel_bw_init +ffffffff81b25160 t icl_get_qgv_points +ffffffff81b25740 t skl_plane_calc_dbuf_bw +ffffffff81b25890 t intel_bw_duplicate_state +ffffffff81b25910 t intel_bw_destroy_state +ffffffff81b26000 T intel_cdclk_get_cdclk +ffffffff81b26020 T intel_cdclk_init_hw +ffffffff81b26850 T intel_cdclk_uninit_hw +ffffffff81b26970 T intel_cdclk_needs_modeset +ffffffff81b269b0 T intel_cdclk_dump_config +ffffffff81b26a30 T intel_set_cdclk_pre_plane_update +ffffffff81b26da0 t intel_set_cdclk +ffffffff81b271c0 T intel_set_cdclk_post_plane_update +ffffffff81b27480 T intel_crtc_compute_min_cdclk +ffffffff81b27830 T intel_atomic_get_cdclk_state +ffffffff81b27850 T intel_cdclk_atomic_check +ffffffff81b27970 T intel_cdclk_init +ffffffff81b279f0 T intel_modeset_calc_cdclk +ffffffff81b280c0 t intel_cdclk_can_crawl +ffffffff81b28150 T intel_update_max_cdclk +ffffffff81b284d0 T intel_update_cdclk +ffffffff81b28570 T intel_read_rawclk +ffffffff81b28720 t i9xx_hrawclk +ffffffff81b287e0 T intel_cdclk_debugfs_register +ffffffff81b28810 T intel_init_cdclk_hooks +ffffffff81b28c40 t bxt_set_cdclk +ffffffff81b29300 t _bxt_set_cdclk +ffffffff81b29b70 t skl_set_cdclk +ffffffff81b2a230 t intel_cdclk_duplicate_state +ffffffff81b2a2c0 t intel_cdclk_destroy_state +ffffffff81b2a2e0 t bxt_get_cdclk +ffffffff81b2a550 t bxt_modeset_calc_cdclk +ffffffff81b2a9e0 t tgl_calc_voltage_level +ffffffff81b2aa30 t intel_compute_min_cdclk +ffffffff81b2ac70 t rplu_calc_voltage_level +ffffffff81b2acc0 t ehl_calc_voltage_level +ffffffff81b2ad10 t icl_calc_voltage_level +ffffffff81b2ad60 t bxt_calc_voltage_level +ffffffff81b2adb0 t skl_get_cdclk +ffffffff81b2afe0 t skl_modeset_calc_cdclk +ffffffff81b2b1f0 t bdw_get_cdclk +ffffffff81b2b2f0 t bdw_set_cdclk +ffffffff81b2b950 t bdw_modeset_calc_cdclk +ffffffff81b2ba50 t hsw_get_cdclk +ffffffff81b2bb30 t fixed_modeset_calc_cdclk +ffffffff81b2bb80 t vlv_get_cdclk +ffffffff81b2bc70 t chv_set_cdclk +ffffffff81b2c070 t vlv_modeset_calc_cdclk +ffffffff81b2c250 t vlv_set_cdclk +ffffffff81b2c870 t fixed_400mhz_get_cdclk +ffffffff81b2c8a0 t fixed_450mhz_get_cdclk +ffffffff81b2c8d0 t gm45_get_cdclk +ffffffff81b2c9f0 t intel_hpll_vco +ffffffff81b2cb30 t g33_get_cdclk +ffffffff81b2cc60 t i965gm_get_cdclk +ffffffff81b2cd70 t pnv_get_cdclk +ffffffff81b2ce30 t i945gm_get_cdclk +ffffffff81b2ceb0 t i915gm_get_cdclk +ffffffff81b2cf30 t fixed_333mhz_get_cdclk +ffffffff81b2cf60 t fixed_266mhz_get_cdclk +ffffffff81b2cf90 t i85x_get_cdclk +ffffffff81b2d030 t fixed_200mhz_get_cdclk +ffffffff81b2d060 t fixed_133mhz_get_cdclk +ffffffff81b2e000 T intel_color_load_luts +ffffffff81b2e030 T intel_color_commit_noarm +ffffffff81b2e080 T intel_color_commit_arm +ffffffff81b2e0b0 T intel_color_post_update +ffffffff81b2e100 T intel_color_prepare_commit +ffffffff81b2e130 T intel_color_cleanup_commit +ffffffff81b2e190 T intel_color_check +ffffffff81b2e1b0 T intel_color_get_config +ffffffff81b2e230 T intel_color_lut_equal +ffffffff81b2e290 T intel_color_assert_luts +ffffffff81b2e590 T intel_color_crtc_init +ffffffff81b2e610 T intel_color_init +ffffffff81b2e750 T intel_color_init_hooks +ffffffff81b2e880 t chv_color_check +ffffffff81b2edc0 t i9xx_color_commit_arm +ffffffff81b2edd0 t chv_load_luts +ffffffff81b2f1e0 t chv_read_luts +ffffffff81b2f460 t chv_lut_equal +ffffffff81b2f790 t chv_read_csc +ffffffff81b2f8b0 t intel_color_add_affected_planes +ffffffff81b2fa30 t _check_luts +ffffffff81b2fbb0 t i965_load_luts +ffffffff81b2ff20 t i965_read_luts +ffffffff81b30300 t vlv_color_check +ffffffff81b307d0 t vlv_load_luts +ffffffff81b30980 t i965_lut_equal +ffffffff81b30b60 t vlv_read_csc +ffffffff81b30d40 t i9xx_color_check +ffffffff81b30ff0 t i9xx_load_luts +ffffffff81b31460 t i9xx_read_luts +ffffffff81b31810 t i9xx_lut_equal +ffffffff81b31a30 t icl_color_check +ffffffff81b31e50 t icl_color_commit_noarm +ffffffff81b32110 t icl_color_commit_arm +ffffffff81b32200 t icl_load_luts +ffffffff81b32ab0 t icl_read_luts +ffffffff81b32e00 t icl_lut_equal +ffffffff81b33180 t icl_read_csc +ffffffff81b33440 t ilk_csc_convert_ctm +ffffffff81b33860 t ilk_update_pipe_csc +ffffffff81b33ab0 t glk_load_degamma_lut +ffffffff81b33d70 t ivb_load_lut_ext_max +ffffffff81b33eb0 t glk_load_lut_ext2_max +ffffffff81b33ff0 t bdw_load_lut_10 +ffffffff81b34250 t glk_read_degamma_lut +ffffffff81b343d0 t bdw_read_lut_10 +ffffffff81b34560 t ilk_read_pipe_csc +ffffffff81b34790 t icl_color_post_update +ffffffff81b347c0 t glk_color_check +ffffffff81b34d20 t skl_color_commit_noarm +ffffffff81b34d70 t skl_color_commit_arm +ffffffff81b34ea0 t glk_load_luts +ffffffff81b35060 t glk_read_luts +ffffffff81b35200 t glk_lut_equal +ffffffff81b35530 t skl_read_csc +ffffffff81b35580 t ilk_csc_limited_range +ffffffff81b35620 t ilk_assign_csc +ffffffff81b35920 t ivb_color_check +ffffffff81b36000 t bdw_load_luts +ffffffff81b36200 t bdw_read_luts +ffffffff81b36420 t ivb_lut_equal +ffffffff81b367f0 t ilk_assign_luts +ffffffff81b36a50 t ilk_color_commit_noarm +ffffffff81b36aa0 t hsw_color_commit_arm +ffffffff81b36b60 t ilk_read_csc +ffffffff81b36bb0 t ivb_load_luts +ffffffff81b36db0 t ivb_read_luts +ffffffff81b372a0 t ivb_load_lut_10 +ffffffff81b374b0 t ilk_color_commit_arm +ffffffff81b37540 t ilk_color_check +ffffffff81b377c0 t ilk_load_luts +ffffffff81b37a50 t ilk_read_luts +ffffffff81b37cd0 t ilk_lut_equal +ffffffff81b39000 T intel_combo_phy_power_up_lanes +ffffffff81b39140 T intel_combo_phy_init +ffffffff81b396b0 T intel_combo_phy_uninit +ffffffff81b398a0 t icl_combo_phy_verify_state +ffffffff81b3a000 T intel_connector_init +ffffffff81b3a090 T intel_connector_alloc +ffffffff81b3a140 T intel_connector_free +ffffffff81b3a190 T intel_connector_destroy +ffffffff81b3a210 T intel_connector_register +ffffffff81b3a220 T intel_connector_unregister +ffffffff81b3a230 T intel_connector_attach_encoder +ffffffff81b3a250 T intel_connector_get_hw_state +ffffffff81b3a2b0 T intel_connector_get_pipe +ffffffff81b3a380 T intel_connector_update_modes +ffffffff81b3a3b0 T intel_ddc_get_modes +ffffffff81b3a440 T intel_attach_force_audio_property +ffffffff81b3a4e0 T intel_attach_broadcast_rgb_property +ffffffff81b3a590 T intel_attach_aspect_ratio_property +ffffffff81b3a600 T intel_attach_hdmi_colorspace_property +ffffffff81b3a660 T intel_attach_dp_colorspace_property +ffffffff81b3a6c0 T intel_attach_scaling_mode_property +ffffffff81b3b000 T intel_crt_port_enabled +ffffffff81b3b090 T intel_crt_reset +ffffffff81b3b190 T intel_crt_init +ffffffff81b3b650 t hsw_crt_get_config +ffffffff81b3b710 t hsw_crt_compute_config +ffffffff81b3b820 t hsw_pre_pll_enable_crt +ffffffff81b3b890 t hsw_pre_enable_crt +ffffffff81b3b940 t hsw_enable_crt +ffffffff81b3bb30 t hsw_disable_crt +ffffffff81b3bba0 t hsw_post_disable_crt +ffffffff81b3bd90 t pch_crt_compute_config +ffffffff81b3bde0 t pch_disable_crt +ffffffff81b3be10 t pch_post_disable_crt +ffffffff81b3bf00 t intel_crt_compute_config +ffffffff81b3bf50 t intel_disable_crt +ffffffff81b3c040 t intel_crt_get_config +ffffffff81b3c0e0 t intel_crt_get_hw_state +ffffffff81b3c1b0 t intel_enable_crt +ffffffff81b3c2a0 t intel_spurious_crt_detect_dmi_callback +ffffffff81b3c300 t intel_crt_get_modes +ffffffff81b3c450 t intel_crt_detect +ffffffff81b3c740 t intel_crt_mode_valid +ffffffff81b3c860 t intel_crt_get_edid +ffffffff81b3c940 t intel_crt_detect_hotplug +ffffffff81b3ce50 t intel_crt_detect_ddc +ffffffff81b3cf50 t intel_crt_load_detect +ffffffff81b3e000 T intel_first_crtc +ffffffff81b3e020 T intel_crtc_for_pipe +ffffffff81b3e080 T intel_crtc_wait_for_next_vblank +ffffffff81b3e090 T intel_wait_for_vblank_if_active +ffffffff81b3e100 T intel_crtc_get_vblank_counter +ffffffff81b3e190 T intel_crtc_max_vblank_count +ffffffff81b3e220 T intel_crtc_vblank_on +ffffffff81b3e2c0 t assert_vblank_disabled +ffffffff81b3e3b0 T intel_crtc_vblank_off +ffffffff81b3e3e0 T intel_crtc_state_alloc +ffffffff81b3e4a0 T intel_crtc_state_reset +ffffffff81b3e540 T intel_crtc_init +ffffffff81b3e940 T intel_wait_for_vblank_workers +ffffffff81b3ea00 T intel_usecs_to_scanlines +ffffffff81b3ea50 T intel_pipe_update_start +ffffffff81b3ef20 T intel_pipe_update_end +ffffffff81b3f2a0 t intel_crtc_destroy +ffffffff81b3f2e0 t intel_crtc_late_register +ffffffff81b3f310 t intel_crtc_vblank_work +ffffffff81b40000 T intel_output_format_name +ffffffff81b40040 T intel_crtc_state_dump +ffffffff81b41620 t ilk_dump_csc +ffffffff81b42000 T intel_cursor_plane_create +ffffffff81b42240 t i845_cursor_max_stride +ffffffff81b42270 t i845_cursor_update_arm +ffffffff81b424d0 t i845_cursor_disable_arm +ffffffff81b424f0 t i845_cursor_get_hw_state +ffffffff81b425b0 t i845_check_cursor +ffffffff81b42770 t i9xx_cursor_max_stride +ffffffff81b427b0 t i9xx_cursor_update_arm +ffffffff81b42b70 t i9xx_cursor_disable_arm +ffffffff81b42b90 t i9xx_cursor_get_hw_state +ffffffff81b42ca0 t i9xx_check_cursor +ffffffff81b42f50 t intel_check_cursor +ffffffff81b431a0 t intel_legacy_cursor_update +ffffffff81b43600 t intel_cursor_format_mod_supported +ffffffff81b44000 T intel_is_c10phy +ffffffff81b44040 T intel_cx0_phy_set_signal_levels +ffffffff81b446f0 t intel_cx0_rmw +ffffffff81b44800 T intel_c10pll_readout_hw_state +ffffffff81b449f0 T intel_c10pll_dump_hw_state +ffffffff81b44cc0 T intel_cx0_phy_check_hdmi_link_rate +ffffffff81b44e50 T intel_cx0pll_calc_state +ffffffff81b452a0 T intel_c20pll_readout_hw_state +ffffffff81b458f0 t intel_c20_sram_read +ffffffff81b45a30 T intel_c20pll_dump_hw_state +ffffffff81b45ea0 T intel_c10pll_calc_port_clock +ffffffff81b45f80 T intel_c20pll_calc_port_clock +ffffffff81b46080 T intel_mtl_tbt_calc_port_clock +ffffffff81b461f0 T intel_mtl_pll_enable +ffffffff81b47de0 T intel_mtl_pll_disable +ffffffff81b48300 T intel_mtl_port_pll_type +ffffffff81b48390 T intel_c10pll_state_verify +ffffffff81b486d0 t __intel_cx0_read +ffffffff81b48b20 t __intel_cx0_write +ffffffff81b48ef0 t intel_cx0_bus_reset +ffffffff81b49040 t intel_cx0_wait_for_ack +ffffffff81b491f0 t intel_cx0_powerdown_change_sequence +ffffffff81b494a0 t intel_c20_sram_write +ffffffff81b4a000 T hsw_prepare_dp_ddi_buffers +ffffffff81b4a1d0 T intel_wait_ddi_buf_idle +ffffffff81b4a420 T intel_ddi_set_dp_msa +ffffffff81b4a610 T intel_ddi_enable_transcoder_func +ffffffff81b4a700 t intel_ddi_transcoder_func_reg_val_get +ffffffff81b4a9c0 T intel_ddi_disable_transcoder_func +ffffffff81b4abe0 T intel_ddi_toggle_hdcp_bits +ffffffff81b4ad40 T intel_ddi_connector_get_hw_state +ffffffff81b4aeb0 T intel_ddi_get_hw_state +ffffffff81b4af30 t intel_ddi_get_encoder_pipes +ffffffff81b4b3f0 T intel_ddi_enable_transcoder_clock +ffffffff81b4b4c0 T intel_ddi_disable_transcoder_clock +ffffffff81b4b530 T intel_ddi_level +ffffffff81b4b750 T icl_ddi_combo_get_pll +ffffffff81b4b7e0 T hsw_ddi_enable_clock +ffffffff81b4b8a0 T hsw_ddi_disable_clock +ffffffff81b4b8e0 T hsw_ddi_is_clock_enabled +ffffffff81b4b950 T intel_ddi_enable_clock +ffffffff81b4b990 T intel_ddi_disable_clock +ffffffff81b4b9d0 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff81b4bbe0 T dp_tp_ctl_reg +ffffffff81b4bc60 T dp_tp_status_reg +ffffffff81b4bce0 T intel_ddi_update_pipe +ffffffff81b4bd80 T intel_ddi_update_active_dpll +ffffffff81b4bea0 T intel_ddi_compute_min_voltage_level +ffffffff81b4bf20 T intel_ddi_get_clock +ffffffff81b4c040 T intel_ddi_port_pll_type +ffffffff81b4c080 T hsw_ddi_get_config +ffffffff81b4c190 t intel_ddi_get_config +ffffffff81b4cc00 T intel_ddi_init +ffffffff81b4dad0 t intel_ddi_hotplug +ffffffff81b4dfb0 t intel_ddi_compute_output_type +ffffffff81b4e030 t intel_ddi_compute_config +ffffffff81b4e1b0 t intel_ddi_compute_config_late +ffffffff81b4e4a0 t intel_enable_ddi +ffffffff81b4ef30 t intel_ddi_pre_pll_enable +ffffffff81b4f170 t intel_ddi_pre_enable +ffffffff81b503e0 t intel_disable_ddi +ffffffff81b505e0 t intel_ddi_post_pll_disable +ffffffff81b506e0 t intel_ddi_post_disable +ffffffff81b50c40 t intel_ddi_sync_state +ffffffff81b50d10 t intel_ddi_initial_fastset_check +ffffffff81b50df0 t intel_ddi_encoder_suspend +ffffffff81b50e00 t intel_ddi_encoder_shutdown +ffffffff81b50e30 t intel_ddi_get_power_domains +ffffffff81b50fe0 t mtl_ddi_get_config +ffffffff81b51110 t dg2_ddi_get_config +ffffffff81b51170 t adls_ddi_enable_clock +ffffffff81b51310 t adls_ddi_disable_clock +ffffffff81b513f0 t adls_ddi_is_clock_enabled +ffffffff81b514a0 t adls_ddi_get_config +ffffffff81b51580 t rkl_ddi_enable_clock +ffffffff81b51730 t rkl_ddi_disable_clock +ffffffff81b517f0 t rkl_ddi_is_clock_enabled +ffffffff81b51880 t rkl_ddi_get_config +ffffffff81b51970 t dg1_ddi_enable_clock +ffffffff81b51b60 t dg1_ddi_disable_clock +ffffffff81b51c40 t dg1_ddi_is_clock_enabled +ffffffff81b51cf0 t dg1_ddi_get_config +ffffffff81b51de0 t jsl_ddi_tc_enable_clock +ffffffff81b51e80 t jsl_ddi_tc_disable_clock +ffffffff81b51f70 t jsl_ddi_tc_is_clock_enabled +ffffffff81b52040 t icl_ddi_tc_port_pll_type +ffffffff81b520d0 t icl_ddi_combo_get_config +ffffffff81b52190 t icl_ddi_combo_enable_clock +ffffffff81b52310 t icl_ddi_combo_disable_clock +ffffffff81b523d0 t icl_ddi_combo_is_clock_enabled +ffffffff81b52460 t icl_ddi_tc_enable_clock +ffffffff81b52670 t icl_ddi_tc_disable_clock +ffffffff81b52770 t icl_ddi_tc_is_clock_enabled +ffffffff81b52840 t icl_ddi_tc_get_config +ffffffff81b52ab0 t bxt_ddi_get_config +ffffffff81b52b40 t skl_ddi_enable_clock +ffffffff81b52c60 t skl_ddi_disable_clock +ffffffff81b52d00 t skl_ddi_is_clock_enabled +ffffffff81b52d80 t skl_ddi_get_config +ffffffff81b52e30 t icl_combo_phy_set_signal_levels +ffffffff81b53b10 t tgl_dkl_phy_set_signal_levels +ffffffff81b53eb0 t icl_mg_phy_set_signal_levels +ffffffff81b54940 t hsw_set_signal_levels +ffffffff81b54d20 t intel_ddi_max_lanes +ffffffff81b54e10 t need_aux_ch +ffffffff81b54e90 t intel_ddi_tc_encoder_suspend_complete +ffffffff81b54ed0 t intel_ddi_tc_encoder_shutdown_complete +ffffffff81b54f10 t lpt_digital_port_connected +ffffffff81b54f80 t bdw_digital_port_connected +ffffffff81b54ff0 t hsw_digital_port_connected +ffffffff81b55060 t intel_ddi_init_dp_connector +ffffffff81b55150 t intel_ddi_init_hdmi_connector +ffffffff81b551c0 t intel_ddi_encoder_reset +ffffffff81b552b0 t intel_ddi_encoder_destroy +ffffffff81b553a0 t intel_ddi_encoder_late_register +ffffffff81b55400 t mtl_ddi_enable_d2d +ffffffff81b55600 t intel_wait_ddi_buf_active +ffffffff81b55980 t intel_ddi_main_link_aux_domain +ffffffff81b55a80 t icl_program_mg_dp_mode +ffffffff81b55db0 t intel_ddi_init_dp_buf_reg +ffffffff81b55fd0 t intel_disable_ddi_buf +ffffffff81b561b0 t mtl_disable_ddi_buf +ffffffff81b56650 t intel_ddi_disable_fec_state +ffffffff81b567b0 t mtl_ddi_prepare_link_retrain +ffffffff81b56b50 t intel_ddi_prepare_link_retrain +ffffffff81b570e0 t intel_ddi_set_link_train +ffffffff81b57240 t intel_ddi_set_idle_link_train +ffffffff81b57430 t intel_ddi_dp_voltage_max +ffffffff81b574f0 t intel_ddi_dp_preemph_max +ffffffff81b58000 T is_hobl_buf_trans +ffffffff81b58040 T intel_ddi_buf_trans_init +ffffffff81b58330 t mtl_get_cx0_buf_trans +ffffffff81b58430 t dg2_get_snps_buf_trans +ffffffff81b584b0 t adlp_get_combo_buf_trans +ffffffff81b585d0 t adlp_get_dkl_buf_trans +ffffffff81b58630 t adls_get_combo_buf_trans +ffffffff81b58750 t rkl_get_combo_buf_trans +ffffffff81b58870 t dg1_get_combo_buf_trans +ffffffff81b58990 t tgl_get_combo_buf_trans +ffffffff81b58ad0 t tgl_get_dkl_buf_trans +ffffffff81b58b30 t jsl_get_combo_buf_trans +ffffffff81b58bd0 t ehl_get_combo_buf_trans +ffffffff81b58c70 t icl_get_combo_buf_trans +ffffffff81b58d20 t icl_get_mg_buf_trans +ffffffff81b58d80 t bxt_get_buf_trans +ffffffff81b58e00 t kbl_y_get_buf_trans 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intel_rotation_info_size +ffffffff81b5af60 T intel_remapped_info_size +ffffffff81b5b090 T intel_plane_uses_fence +ffffffff81b5b0e0 T intel_fb_xy_to_linear +ffffffff81b5b130 T intel_add_fb_offsets +ffffffff81b5b180 T intel_plane_fb_max_stride +ffffffff81b5b210 T intel_set_plane_visible +ffffffff81b5b260 T intel_plane_fixup_bitmasks +ffffffff81b5b310 T intel_plane_disable_noatomic +ffffffff81b5b530 T intel_plane_fence_y_offset +ffffffff81b5b5a0 T intel_has_pending_fb_unpin +ffffffff81b5b6b0 T intel_get_crtc_new_encoder +ffffffff81b5b850 T ilk_pfit_disable +ffffffff81b5b910 T intel_phy_is_combo +ffffffff81b5b980 T intel_phy_is_tc +ffffffff81b5b9f0 T intel_phy_is_snps +ffffffff81b5ba40 T intel_port_to_phy +ffffffff81b5baf0 T intel_port_to_tc +ffffffff81b5bc00 T intel_aux_power_domain +ffffffff81b5bc50 T intel_modeset_get_crtc_power_domains +ffffffff81b5be90 T intel_modeset_put_crtc_power_domains +ffffffff81b5bec0 T intel_encoder_destroy +ffffffff81b5bf00 T intel_encoder_get_config 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pipe_config_mismatch +ffffffff81b61660 t pipe_config_infoframe_mismatch +ffffffff81b61850 T intel_modeset_all_pipes +ffffffff81b61a80 T intel_atomic_add_affected_planes +ffffffff81b61b60 T intel_calc_active_pipes +ffffffff81b61bf0 T intel_atomic_check +ffffffff81b63f30 t copy_bigjoiner_crtc_state_nomodeset +ffffffff81b64060 t intel_atomic_check_planes +ffffffff81b64b50 t intel_modeset_checks +ffffffff81b64ce0 t intel_atomic_check_crtcs +ffffffff81b65170 t intel_async_flip_check_hw +ffffffff81b65660 T intel_crtc_arm_fifo_underrun +ffffffff81b65700 T intel_atomic_helper_free_state_worker +ffffffff81b65780 T intel_atomic_commit +ffffffff81b65b80 t intel_atomic_commit_ready +ffffffff81b65c10 t intel_atomic_commit_work +ffffffff81b65c30 t intel_atomic_commit_tail +ffffffff81b670b0 T intel_plane_destroy +ffffffff81b670f0 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81b67170 T assert_port_valid +ffffffff81b671f0 T intel_setup_outputs +ffffffff81b67c70 T intel_mode_valid +ffffffff81b67df0 T intel_cpu_transcoder_mode_valid +ffffffff81b67eb0 T intel_mode_valid_max_plane_size +ffffffff81b67f30 T intel_init_display_hooks +ffffffff81b67fb0 T intel_initial_commit +ffffffff81b681c0 T i830_enable_pipe +ffffffff81b68940 T i830_disable_pipe +ffffffff81b68cd0 T intel_hpd_poll_fini +ffffffff81b68e10 T intel_scanout_needs_vtd_wa +ffffffff81b68e50 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81b68ff0 t intel_atomic_cleanup_work +ffffffff81b69120 t intel_pre_plane_update +ffffffff81b69730 t hsw_get_pipe_config +ffffffff81b6a520 t hsw_crtc_enable +ffffffff81b6b0d0 t hsw_crtc_disable +ffffffff81b6b430 t skl_commit_modeset_enables +ffffffff81b6ba70 t intel_get_transcoder_timings +ffffffff81b6bdc0 t intel_get_pipe_src_size +ffffffff81b6bef0 t ilk_get_pfit_config +ffffffff81b6c090 t enabled_bigjoiner_pipes +ffffffff81b6c300 t bdw_set_pipe_misc +ffffffff81b6c460 t ilk_pfit_enable +ffffffff81b6c590 t intel_set_transcoder_timings +ffffffff81b6c990 t intel_update_crtc +ffffffff81b6d0e0 t intel_commit_modeset_enables +ffffffff81b6d220 t ilk_get_pipe_config +ffffffff81b6d4c0 t ilk_crtc_enable +ffffffff81b6d940 t ilk_crtc_disable +ffffffff81b6dc20 t i9xx_get_pipe_config +ffffffff81b6e4a0 t valleyview_crtc_enable +ffffffff81b6e9c0 t i9xx_crtc_disable +ffffffff81b6ede0 t i9xx_pfit_enable +ffffffff81b6ef80 t i9xx_crtc_enable +ffffffff81b70000 T intel_display_device_probe +ffffffff81b70290 T intel_display_device_info_runtime_init +ffffffff81b70920 T intel_display_device_info_print +ffffffff81b71000 T intel_display_driver_probe_defer +ffffffff81b71030 T intel_display_driver_init_hw +ffffffff81b71100 T intel_display_driver_early_probe +ffffffff81b711c0 T intel_display_driver_probe_noirq +ffffffff81b71540 T intel_display_driver_probe_nogem +ffffffff81b71940 T intel_display_driver_probe +ffffffff81b71a20 T intel_display_driver_register +ffffffff81b71ab0 T intel_display_driver_remove +ffffffff81b71b80 T intel_display_driver_remove_noirq +ffffffff81b71c80 T intel_display_driver_remove_nogem +ffffffff81b71cd0 T intel_display_driver_unregister +ffffffff81b71d70 T intel_display_driver_suspend +ffffffff81b71e30 T __intel_display_driver_resume +ffffffff81b71f70 T intel_display_driver_resume +ffffffff81b73000 T ilk_update_display_irq +ffffffff81b73150 T ilk_enable_display_irq +ffffffff81b73170 T ilk_disable_display_irq +ffffffff81b73270 T bdw_update_port_irq +ffffffff81b733e0 T bdw_enable_pipe_irq +ffffffff81b73400 t bdw_update_pipe_irq +ffffffff81b73560 T bdw_disable_pipe_irq +ffffffff81b73680 T ibx_display_interrupt_update +ffffffff81b737c0 T ibx_enable_display_interrupt +ffffffff81b737e0 T ibx_disable_display_interrupt +ffffffff81b738c0 T i915_pipestat_enable_mask +ffffffff81b73a80 T i915_enable_pipestat +ffffffff81b73c20 T i915_disable_pipestat +ffffffff81b73dc0 T i915_enable_asle_pipestat +ffffffff81b73e80 T i9xx_pipestat_irq_reset +ffffffff81b74030 T i9xx_pipestat_irq_ack +ffffffff81b741d0 T i8xx_pipestat_irq_handler +ffffffff81b74470 t i9xx_pipe_crc_irq_handler +ffffffff81b745e0 T i915_pipestat_irq_handler +ffffffff81b748c0 T i965_pipestat_irq_handler +ffffffff81b74ba0 T valleyview_pipestat_irq_handler +ffffffff81b74d80 T ilk_display_irq_handler +ffffffff81b75370 t cpt_irq_handler +ffffffff81b75760 T ivb_display_irq_handler +ffffffff81b75e10 T gen8_de_pipe_underrun_mask +ffffffff81b75e50 T gen8_de_irq_handler +ffffffff81b76be0 T gen11_gu_misc_irq_ack +ffffffff81b76c30 T gen11_gu_misc_irq_handler +ffffffff81b76c70 T gen11_display_irq_handler +ffffffff81b76d00 T i8xx_enable_vblank +ffffffff81b76d90 T i915gm_enable_vblank +ffffffff81b76e60 T i965_enable_vblank +ffffffff81b76ef0 T ilk_enable_vblank +ffffffff81b76fc0 T bdw_enable_vblank +ffffffff81b771d0 T i8xx_disable_vblank +ffffffff81b77240 T i915gm_disable_vblank +ffffffff81b77320 T i965_disable_vblank +ffffffff81b77390 T ilk_disable_vblank +ffffffff81b774b0 T bdw_disable_vblank +ffffffff81b77680 T vlv_display_irq_reset +ffffffff81b777a0 T vlv_display_irq_postinstall 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intel_power_domains_disable +ffffffff81b7c1c0 T intel_power_domains_suspend +ffffffff81b7c420 t icl_display_core_uninit +ffffffff81b7c580 t bxt_display_core_uninit +ffffffff81b7c680 T intel_power_domains_resume +ffffffff81b7c780 T intel_display_power_suspend_late +ffffffff81b7c880 t hsw_enable_pc8 +ffffffff81b7d7b0 T intel_display_power_resume_early +ffffffff81b7d8c0 t hsw_disable_pc8 +ffffffff81b7ddd0 T intel_display_power_suspend +ffffffff81b7de60 T intel_display_power_resume +ffffffff81b7df80 T intel_display_power_debug +ffffffff81b7e080 T intel_display_power_ddi_io_domain +ffffffff81b7e180 T intel_display_power_ddi_lanes_domain +ffffffff81b7e280 T intel_display_power_aux_io_domain +ffffffff81b7e390 T intel_display_power_legacy_aux_domain +ffffffff81b7e4a0 T intel_display_power_tbt_aux_domain +ffffffff81b7e5b0 t __delayed_work_tick +ffffffff81b7f000 T intel_display_power_map_init +ffffffff81b7f180 t __set_power_wells +ffffffff81b7f580 T intel_display_power_map_cleanup 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gen9_dc_off_power_well_enabled +ffffffff81b82fd0 t bxt_dpio_cmn_power_well_enable +ffffffff81b83000 t bxt_dpio_cmn_power_well_disable +ffffffff81b83030 t bxt_dpio_cmn_power_well_enabled +ffffffff81b83060 t vlv_display_power_well_enable +ffffffff81b830a0 t vlv_display_power_well_disable +ffffffff81b83140 t vlv_dpio_cmn_power_well_enable +ffffffff81b831e0 t vlv_dpio_cmn_power_well_disable +ffffffff81b83310 t vlv_power_well_enable +ffffffff81b83330 t vlv_power_well_disable +ffffffff81b83350 t icl_aux_power_well_enable +ffffffff81b83b20 t icl_aux_power_well_disable +ffffffff81b83df0 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81b83e10 t tgl_tc_cold_off_power_well_enable +ffffffff81b83e30 t tgl_tc_cold_off_power_well_disable +ffffffff81b83e50 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81b83e80 t xelpdp_aux_power_well_enable +ffffffff81b83f60 t xelpdp_aux_power_well_disable +ffffffff81b84040 t xelpdp_aux_power_well_enabled +ffffffff81b84100 t chv_set_pipe_power_well +ffffffff81b84360 t vlv_display_power_well_init +ffffffff81b84780 t vlv_set_power_well +ffffffff81b84a00 t hsw_wait_for_power_well_enable +ffffffff81b84b60 t hsw_wait_for_power_well_disable +ffffffff81b84e80 t tgl_tc_cold_request +ffffffff81b86000 T intel_display_reset_prepare +ffffffff81b86240 T intel_display_reset_finish +ffffffff81b87000 T intel_display_rps_boost_after_vblank +ffffffff81b87140 t do_rps_boost +ffffffff81b87200 T intel_display_rps_mark_interactive +ffffffff81b88000 T intel_dkl_phy_init +ffffffff81b88020 T intel_dkl_phy_read +ffffffff81b88170 T intel_dkl_phy_write +ffffffff81b882a0 T intel_dkl_phy_rmw +ffffffff81b88400 T intel_dkl_phy_posting_read +ffffffff81b89000 T intel_dmc_has_payload +ffffffff81b89050 T intel_dmc_enable_pipe +ffffffff81b89180 T intel_dmc_disable_pipe +ffffffff81b892b0 T intel_dmc_load_program +ffffffff81b89bb0 t pipedmc_clock_gating_wa +ffffffff81b89e00 T intel_dmc_disable_program +ffffffff81b8a060 T assert_dmc_loaded +ffffffff81b8a220 T intel_dmc_init +ffffffff81b8a510 t dmc_load_work_fn +ffffffff81b8aef0 T intel_dmc_suspend +ffffffff81b8af80 T intel_dmc_resume +ffffffff81b8b030 T intel_dmc_fini +ffffffff81b8b1c0 T intel_dmc_print_error_state +ffffffff81b8b2d0 T intel_dmc_debugfs_register +ffffffff81b8c000 T intel_dp_is_edp +ffffffff81b8c030 T intel_dp_is_uhbr +ffffffff81b8c070 T intel_dp_max_lane_count +ffffffff81b8c0e0 T intel_dp_link_required +ffffffff81b8c120 T intel_dp_max_data_rate +ffffffff81b8c180 T intel_dp_can_bigjoiner +ffffffff81b8c1f0 T intel_dp_get_link_train_fallback_values +ffffffff81b8c5f0 T intel_dp_mode_to_fec_clock +ffffffff81b8c640 T intel_dp_dsc_nearest_valid_bpp +ffffffff81b8c750 T intel_dp_dsc_get_output_bpp +ffffffff81b8c880 T intel_dp_dsc_get_slice_count +ffffffff81b8ca30 T intel_dp_min_bpp +ffffffff81b8ca70 T intel_dp_need_bigjoiner +ffffffff81b8cae0 T intel_dp_source_supports_tps3 +ffffffff81b8cb30 T intel_dp_source_supports_tps4 +ffffffff81b8cb70 T intel_dp_max_link_rate +ffffffff81b8cc30 T intel_dp_rate_select +ffffffff81b8ccd0 T intel_dp_compute_rate +ffffffff81b8cdb0 T intel_dp_has_hdmi_sink +ffffffff81b8cdf0 T intel_dp_adjust_compliance_config +ffffffff81b8cf40 T intel_dp_dsc_compute_bpp +ffffffff81b8d000 T intel_dp_dsc_compute_config +ffffffff81b8d760 T intel_dp_limited_color_range +ffffffff81b8d7d0 T intel_dp_compute_psr_vsc_sdp +ffffffff81b8d850 T intel_dp_needs_vsc_sdp +ffffffff81b8d8a0 t intel_dp_compute_vsc_colorimetry +ffffffff81b8da20 T intel_dp_compute_config +ffffffff81b8def0 t intel_dp_compute_output_format +ffffffff81b8e150 t intel_dp_audio_compute_config +ffffffff81b8e240 t intel_dp_drrs_compute_config +ffffffff81b8e430 t intel_dp_compute_vsc_sdp +ffffffff81b8e4e0 t intel_dp_compute_hdr_metadata_infoframe_sdp +ffffffff81b8e590 T intel_dp_set_link_params +ffffffff81b8e5d0 T intel_edp_backlight_on +ffffffff81b8e680 T intel_edp_backlight_off +ffffffff81b8e730 T intel_dp_sink_set_decompression_state +ffffffff81b8e7e0 T intel_dp_wait_source_oui +ffffffff81b8e8e0 T intel_dp_set_power +ffffffff81b8eb60 T intel_dp_sync_state +ffffffff81b8ebf0 t intel_dp_get_dpcd +ffffffff81b8ed90 t intel_dp_reset_max_link_params +ffffffff81b8eeb0 T intel_dp_initial_fastset_check +ffffffff81b8f000 T intel_dp_check_frl_training +ffffffff81b8f690 T intel_dp_pcon_dsc_configure +ffffffff81b8f8c0 T intel_dp_configure_protocol_converter +ffffffff81b8fab0 T intel_dp_get_colorimetry_status +ffffffff81b8fb20 T intel_edp_fixup_vbt_bpp +ffffffff81b8fbb0 T intel_write_dp_vsc_sdp +ffffffff81b8fd60 T intel_dp_set_infoframes +ffffffff81b8fea0 t intel_write_dp_sdp +ffffffff81b901a0 T intel_read_dp_sdp +ffffffff81b904f0 T intel_dp_get_active_pipes +ffffffff81b90750 T intel_dp_retrain_link +ffffffff81b90aa0 t intel_dp_needs_link_retrain +ffffffff81b90c50 T intel_dp_phy_test +ffffffff81b91420 T intel_digital_port_connected +ffffffff81b914f0 T intel_dp_encoder_flush_work +ffffffff81b91570 T intel_dp_encoder_suspend +ffffffff81b915b0 T intel_dp_encoder_shutdown +ffffffff81b915f0 T intel_dp_hpd_pulse +ffffffff81b91d80 T intel_dp_is_port_edp +ffffffff81b91e10 T intel_dp_init_connector +ffffffff81b93240 t intel_dp_modeset_retry_work_fn +ffffffff81b93300 t intel_dp_set_common_rates +ffffffff81b934a0 T intel_dp_mst_suspend +ffffffff81b93550 T intel_dp_mst_resume +ffffffff81b93620 t intel_dp_output_format +ffffffff81b93760 t intel_dp_compute_link_config +ffffffff81b93fc0 t intel_dp_tmds_clock_valid +ffffffff81b94060 t intel_dp_set_sink_rates +ffffffff81b942c0 t intel_dp_check_device_service_irq +ffffffff81b94970 t intel_dp_force +ffffffff81b94ad0 t intel_dp_connector_register +ffffffff81b94bd0 t intel_dp_connector_unregister +ffffffff81b94c30 t intel_dp_oob_hotplug_event +ffffffff81b94cc0 t intel_dp_set_edid +ffffffff81b95170 t intel_dp_get_modes +ffffffff81b95280 t intel_dp_detect +ffffffff81b95c80 t intel_dp_mode_valid +ffffffff81b96080 t intel_dp_connector_atomic_check +ffffffff81b96490 t intel_dp_get_dsc_sink_cap +ffffffff81b96620 t intel_dp_mode_min_output_bpp +ffffffff81b96690 t intel_dp_mode_valid_downstream +ffffffff81b96880 t icl_max_source_rate +ffffffff81b97000 T intel_dp_aux_pack +ffffffff81b97070 T intel_dp_aux_fini +ffffffff81b97090 T intel_dp_aux_init +ffffffff81b972b0 t xelpdp_aux_ctl_reg +ffffffff81b97390 t xelpdp_aux_data_reg +ffffffff81b97470 t tgl_aux_ctl_reg +ffffffff81b97500 t tgl_aux_data_reg +ffffffff81b975a0 t skl_aux_ctl_reg +ffffffff81b97630 t skl_aux_data_reg +ffffffff81b976d0 t ilk_aux_ctl_reg +ffffffff81b97750 t ilk_aux_data_reg +ffffffff81b977e0 t g4x_aux_ctl_reg +ffffffff81b97870 t g4x_aux_data_reg +ffffffff81b97910 t skl_get_aux_clock_divider +ffffffff81b97940 t hsw_get_aux_clock_divider +ffffffff81b979d0 t ilk_get_aux_clock_divider +ffffffff81b97a30 t g4x_get_aux_clock_divider +ffffffff81b97a80 t skl_get_aux_send_ctl +ffffffff81b97b00 t g4x_get_aux_send_ctl +ffffffff81b97b60 t kasprintf +ffffffff81b97c40 t intel_dp_aux_transfer +ffffffff81b97f00 T intel_dp_aux_ch +ffffffff81b98080 T intel_dp_aux_irq_handler +ffffffff81b98120 t intel_dp_aux_xfer +ffffffff81b99000 T intel_dp_aux_init_backlight_funcs +ffffffff81b99290 t intel_dp_aux_hdr_setup_backlight +ffffffff81b99430 t intel_dp_aux_hdr_get_backlight +ffffffff81b995e0 t intel_dp_aux_hdr_set_backlight +ffffffff81b996f0 t intel_dp_aux_hdr_disable_backlight +ffffffff81b99780 t intel_dp_aux_hdr_enable_backlight +ffffffff81b99a10 t intel_dp_aux_vesa_setup_backlight +ffffffff81b99ca0 t intel_dp_aux_vesa_get_backlight +ffffffff81b99cd0 t intel_dp_aux_vesa_set_backlight +ffffffff81b99d70 t intel_dp_aux_vesa_disable_backlight +ffffffff81b99e30 t intel_dp_aux_vesa_enable_backlight +ffffffff81b9a000 T intel_dp_hdcp_init +ffffffff81b9a0c0 t intel_dp_hdcp_write_an_aksv +ffffffff81b9a1d0 t intel_dp_hdcp_read_bksv +ffffffff81b9a270 t intel_dp_hdcp_read_bstatus +ffffffff81b9a310 t intel_dp_hdcp_repeater_present +ffffffff81b9a3d0 t intel_dp_hdcp_read_ri_prime +ffffffff81b9a470 t intel_dp_hdcp_read_ksv_ready +ffffffff81b9a520 t intel_dp_hdcp_read_ksv_fifo +ffffffff81b9a620 t intel_dp_hdcp_read_v_prime_part +ffffffff81b9a6d0 t intel_dp_hdcp_toggle_signalling +ffffffff81b9a700 t intel_dp_mst_hdcp_stream_encryption +ffffffff81b9a910 t intel_dp_hdcp_check_link +ffffffff81b9a9a0 t intel_dp_hdcp_capable +ffffffff81b9aa60 t intel_dp_hdcp2_capable +ffffffff81b9aaf0 t intel_dp_hdcp2_write_msg +ffffffff81b9acb0 t intel_dp_hdcp2_read_msg +ffffffff81b9b400 t intel_dp_hdcp2_config_stream_type +ffffffff81b9b460 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81b9b700 t intel_dp_mst_hdcp2_check_link +ffffffff81b9b7d0 t intel_dp_hdcp2_check_link +ffffffff81b9c000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81b9c100 t intel_dp_init_lttpr +ffffffff81b9c440 T intel_dp_get_adjust_train +ffffffff81b9ccb0 T intel_dp_program_link_training_pattern +ffffffff81b9cde0 T intel_dp_set_signal_levels +ffffffff81b9d1b0 T intel_dp_dump_link_status +ffffffff81b9d2b0 T intel_dp_stop_link_train +ffffffff81b9d5d0 T intel_dp_start_link_train +ffffffff81b9f8b0 T intel_dp_128b132b_sdp_crc16 +ffffffff81b9f9a0 t intel_dp_link_train_phy +ffffffff81ba2000 T intel_dp_mst_encoder_active_links +ffffffff81ba2030 T intel_dp_mst_encoder_init +ffffffff81ba22a0 T intel_dp_mst_source_support +ffffffff81ba22e0 T intel_dp_mst_encoder_cleanup +ffffffff81ba2340 T intel_dp_mst_is_master_trans +ffffffff81ba2380 T intel_dp_mst_is_slave_trans +ffffffff81ba23c0 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81ba2490 t intel_dp_add_mst_connector +ffffffff81ba2750 t intel_dp_mst_poll_hpd_irq +ffffffff81ba2770 t intel_dp_mst_get_hw_state +ffffffff81ba27e0 t intel_dp_mst_connector_late_register +ffffffff81ba2870 t intel_dp_mst_connector_early_unregister +ffffffff81ba28b0 t intel_dp_mst_get_modes +ffffffff81ba2960 t intel_dp_mst_detect +ffffffff81ba2a70 t intel_dp_mst_mode_valid_ctx +ffffffff81ba2d10 t intel_mst_atomic_best_encoder +ffffffff81ba2d70 t intel_dp_mst_atomic_check +ffffffff81ba2f60 t intel_dp_mst_compute_config +ffffffff81ba3590 t intel_dp_mst_compute_config_late +ffffffff81ba36a0 t intel_mst_disable_dp +ffffffff81ba37c0 t intel_mst_post_disable_dp +ffffffff81ba3af0 t intel_mst_post_pll_disable_dp +ffffffff81ba3b50 t intel_mst_pre_pll_enable_dp +ffffffff81ba3b90 t intel_mst_pre_enable_dp +ffffffff81ba3e00 t intel_mst_enable_dp +ffffffff81ba4250 t intel_dp_mst_enc_get_hw_state +ffffffff81ba4290 t intel_dp_mst_enc_get_config +ffffffff81ba42b0 t intel_dp_mst_initial_fastset_check +ffffffff81ba42d0 t intel_dp_mst_encoder_destroy +ffffffff81ba4310 t intel_dp_mst_find_vcpi_slots_for_bpp +ffffffff81ba5000 T bxt_port_to_phy_channel +ffffffff81ba5120 T bxt_ddi_phy_set_signal_levels +ffffffff81ba5570 T bxt_ddi_phy_is_enabled +ffffffff81ba56c0 T bxt_ddi_phy_uninit +ffffffff81ba57c0 T bxt_ddi_phy_init +ffffffff81ba5a20 t _bxt_ddi_phy_init +ffffffff81ba6020 T bxt_ddi_phy_verify_state +ffffffff81ba6370 t __phy_reg_verify_state +ffffffff81ba6490 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81ba6500 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81ba67b0 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81ba69c0 T vlv_dig_port_to_channel +ffffffff81ba6a30 T vlv_dig_port_to_phy +ffffffff81ba6aa0 T vlv_pipe_to_channel +ffffffff81ba6b00 T chv_set_phy_signal_level +ffffffff81ba6ef0 T chv_data_lane_soft_reset +ffffffff81ba70f0 T chv_phy_pre_pll_enable +ffffffff81ba7400 T chv_phy_pre_encoder_enable +ffffffff81ba76c0 T chv_phy_release_cl2_override +ffffffff81ba7750 T chv_phy_post_pll_disable +ffffffff81ba7830 T vlv_set_phy_signal_level +ffffffff81ba79e0 T vlv_phy_pre_pll_enable +ffffffff81ba7b20 T vlv_phy_pre_encoder_enable +ffffffff81ba7c50 T vlv_phy_reset_lanes +ffffffff81ba8000 T pnv_calc_dpll_params +ffffffff81ba80c0 T i9xx_calc_dpll_params +ffffffff81ba8190 T vlv_calc_dpll_params +ffffffff81ba8250 T chv_calc_dpll_params +ffffffff81ba8330 T bxt_find_best_dpll +ffffffff81ba8350 t chv_find_best_dpll +ffffffff81ba86a0 T i9xx_dpll_compute_fp +ffffffff81ba86e0 T vlv_compute_dpll +ffffffff81ba8760 T chv_compute_dpll +ffffffff81ba87e0 T intel_dpll_crtc_compute_clock +ffffffff81ba88f0 T intel_dpll_crtc_get_shared_dpll +ffffffff81ba8a70 T intel_dpll_init_clock_hook +ffffffff81ba8b80 T i9xx_enable_pll +ffffffff81ba9010 T vlv_enable_pll +ffffffff81ba9640 T chv_enable_pll +ffffffff81ba9d40 T vlv_force_pll_on +ffffffff81ba9ec0 T vlv_disable_pll +ffffffff81ba9fb0 T chv_disable_pll +ffffffff81baa130 T i9xx_disable_pll +ffffffff81baa260 T vlv_force_pll_off +ffffffff81baa380 T assert_pll_enabled +ffffffff81baa490 T assert_pll_disabled +ffffffff81baa5a0 t intel_pll_is_valid +ffffffff81baa660 t mtl_crtc_compute_clock +ffffffff81baa760 t dg2_crtc_compute_clock +ffffffff81baa800 t hsw_crtc_compute_clock +ffffffff81baa8e0 t hsw_crtc_get_shared_dpll +ffffffff81baa990 t ilk_crtc_compute_clock +ffffffff81baace0 t ilk_crtc_get_shared_dpll +ffffffff81baad30 t g4x_find_best_dpll +ffffffff81bab090 t chv_crtc_compute_clock +ffffffff81bab1b0 t vlv_crtc_compute_clock +ffffffff81bab660 t g4x_crtc_compute_clock +ffffffff81bab7f0 t i9xx_compute_dpll +ffffffff81baba90 t pnv_crtc_compute_clock +ffffffff81babea0 t i9xx_crtc_compute_clock +ffffffff81babfe0 t i9xx_find_best_dpll +ffffffff81bac320 t i8xx_crtc_compute_clock +ffffffff81bad000 T intel_get_shared_dpll_by_id +ffffffff81bad040 T assert_shared_dpll +ffffffff81bad200 T intel_dpll_get_hw_state +ffffffff81bad230 T icl_tc_port_to_pll_id +ffffffff81bad260 T intel_enable_shared_dpll +ffffffff81bad610 T intel_disable_shared_dpll +ffffffff81bad8f0 T intel_unreference_shared_dpll_crtc +ffffffff81bada00 T intel_shared_dpll_swap_state +ffffffff81badb00 T icl_set_active_port_dpll +ffffffff81badb40 T intel_shared_dpll_init +ffffffff81badd60 T intel_compute_shared_dplls +ffffffff81baddf0 T intel_reserve_shared_dplls +ffffffff81bade80 T intel_release_shared_dplls +ffffffff81badec0 T intel_update_active_dpll +ffffffff81badf20 T intel_dpll_get_freq +ffffffff81badfb0 T intel_dpll_update_ref_clks +ffffffff81bae000 T intel_dpll_readout_hw_state +ffffffff81bae260 T intel_dpll_sanitize_state +ffffffff81bae360 T intel_dpll_dump_hw_state +ffffffff81bae3f0 T intel_shared_dpll_state_verify +ffffffff81bae5e0 t verify_single_dpll_state +ffffffff81baec10 T intel_shared_dpll_verify_disabled +ffffffff81baeca0 t icl_compute_dplls +ffffffff81baf940 t icl_get_dplls +ffffffff81bafca0 t icl_put_dplls +ffffffff81bafd60 t icl_update_active_dpll +ffffffff81bafe20 t icl_update_dpll_ref_clks +ffffffff81bafe60 t icl_dump_hw_state +ffffffff81baff30 t combo_pll_enable +ffffffff81bb0190 t combo_pll_disable +ffffffff81bb0270 t combo_pll_get_hw_state +ffffffff81bb02f0 t icl_ddi_combo_pll_get_freq +ffffffff81bb04d0 t icl_dpll_write +ffffffff81bb0740 t adlp_cmtg_clock_gating_wa +ffffffff81bb08e0 t icl_pll_disable +ffffffff81bb0ab0 t icl_pll_get_hw_state +ffffffff81bb0e00 t tbt_pll_enable +ffffffff81bb1000 t tbt_pll_disable +ffffffff81bb1020 t tbt_pll_get_hw_state +ffffffff81bb1040 t icl_ddi_tbt_pll_get_freq +ffffffff81bb10b0 t mg_pll_enable +ffffffff81bb1820 t mg_pll_disable +ffffffff81bb1860 t dkl_pll_get_hw_state +ffffffff81bb1ad0 t icl_ddi_mg_pll_get_freq +ffffffff81bb1bb0 t icl_calc_dpll_state +ffffffff81bb1cf0 t intel_find_shared_dpll +ffffffff81bb2060 t intel_reference_shared_dpll +ffffffff81bb22b0 t intel_unreference_shared_dpll +ffffffff81bb24f0 t mg_pll_get_hw_state +ffffffff81bb27b0 t bxt_compute_dpll +ffffffff81bb2ae0 t bxt_get_dpll +ffffffff81bb2bc0 t intel_put_dpll +ffffffff81bb2c20 t bxt_update_dpll_ref_clks +ffffffff81bb2c60 t bxt_dump_hw_state +ffffffff81bb2d20 t bxt_ddi_pll_enable +ffffffff81bb3880 t bxt_ddi_pll_disable +ffffffff81bb3ae0 t bxt_ddi_pll_get_hw_state +ffffffff81bb3fb0 t bxt_ddi_pll_get_freq +ffffffff81bb4050 t bxt_ddi_set_dpll_hw_state +ffffffff81bb4250 t skl_compute_dpll +ffffffff81bb49e0 t skl_get_dpll +ffffffff81bb4aa0 t skl_update_dpll_ref_clks +ffffffff81bb4ae0 t skl_dump_hw_state +ffffffff81bb4b50 t skl_ddi_dpll0_enable +ffffffff81bb4c20 t skl_ddi_dpll0_disable +ffffffff81bb4c50 t skl_ddi_dpll0_get_hw_state +ffffffff81bb4d80 t skl_ddi_pll_get_freq +ffffffff81bb4e10 t skl_ddi_wrpll_get_freq +ffffffff81bb4f70 t skl_ddi_pll_enable +ffffffff81bb51f0 t skl_ddi_pll_disable +ffffffff81bb5290 t skl_ddi_pll_get_hw_state +ffffffff81bb53e0 t hsw_compute_dpll +ffffffff81bb5c10 t hsw_get_dpll +ffffffff81bb5d70 t hsw_update_dpll_ref_clks +ffffffff81bb5df0 t hsw_dump_hw_state +ffffffff81bb5e20 t hsw_ddi_wrpll_enable +ffffffff81bb5eb0 t hsw_ddi_wrpll_disable +ffffffff81bb5fb0 t hsw_ddi_wrpll_get_hw_state +ffffffff81bb6070 t hsw_ddi_wrpll_get_freq +ffffffff81bb6160 t hsw_ddi_spll_enable +ffffffff81bb61e0 t hsw_ddi_spll_disable +ffffffff81bb62c0 t hsw_ddi_spll_get_hw_state +ffffffff81bb6360 t hsw_ddi_spll_get_freq +ffffffff81bb6400 t hsw_ddi_lcpll_enable +ffffffff81bb6430 t hsw_ddi_lcpll_disable +ffffffff81bb6460 t hsw_ddi_lcpll_get_hw_state +ffffffff81bb6490 t hsw_ddi_lcpll_get_freq +ffffffff81bb6510 t ibx_compute_dpll +ffffffff81bb6540 t ibx_get_dpll +ffffffff81bb6660 t ibx_dump_hw_state +ffffffff81bb66d0 t ibx_pch_dpll_enable +ffffffff81bb68d0 t ibx_pch_dpll_disable +ffffffff81bb6960 t ibx_pch_dpll_get_hw_state +ffffffff81bb7000 T intel_dpt_pin +ffffffff81bb7220 T intel_dpt_unpin +ffffffff81bb72a0 T intel_dpt_resume +ffffffff81bb7390 T intel_dpt_suspend +ffffffff81bb7480 T intel_dpt_create +ffffffff81bb7920 t dpt_insert_page +ffffffff81bb7990 t dpt_clear_range +ffffffff81bb79c0 t dpt_insert_entries +ffffffff81bb7ab0 t dpt_cleanup +ffffffff81bb7b00 t dpt_bind_vma +ffffffff81bb7ba0 t dpt_unbind_vma +ffffffff81bb7bd0 T intel_dpt_destroy +ffffffff81bb7c20 T intel_dpt_configure +ffffffff81bb7df0 t __ww_mutex_lock +ffffffff81bb8000 T intel_drrs_type_str +ffffffff81bb8040 T intel_drrs_is_active +ffffffff81bb8070 T intel_drrs_activate +ffffffff81bb8270 T intel_drrs_deactivate +ffffffff81bb8470 T intel_drrs_invalidate +ffffffff81bb8490 t intel_drrs_frontbuffer_update +ffffffff81bb8720 T intel_drrs_flush +ffffffff81bb8740 T intel_drrs_crtc_init +ffffffff81bb8800 t intel_drrs_downclock_work +ffffffff81bb8950 T intel_drrs_crtc_debugfs_add +ffffffff81bb8980 T intel_drrs_connector_debugfs_add +ffffffff81bb8990 t __delayed_work_tick +ffffffff81bb9000 T intel_dsb_reg_write +ffffffff81bb9140 T intel_dsb_finish +ffffffff81bb91c0 T intel_dsb_commit +ffffffff81bb9390 T intel_dsb_wait +ffffffff81bb95b0 T intel_dsb_prepare +ffffffff81bb9780 T intel_dsb_cleanup +ffffffff81bba000 T intel_dsi_wait_panel_power_cycle +ffffffff81bba0f0 T intel_dsi_shutdown +ffffffff81bba1e0 T intel_dsi_bitrate +ffffffff81bba270 T intel_dsi_tlpx_ns +ffffffff81bba2c0 T intel_dsi_get_modes +ffffffff81bba2d0 T intel_dsi_mode_valid +ffffffff81bba3a0 T intel_dsi_host_init +ffffffff81bba460 T intel_dsi_get_panel_orientation +ffffffff81bbb000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81bbb0a0 t dcs_setup_backlight +ffffffff81bbb130 t dcs_get_backlight +ffffffff81bbb230 t dcs_set_backlight +ffffffff81bbb330 t dcs_disable_backlight +ffffffff81bbb700 t dcs_enable_backlight +ffffffff81bbc000 T intel_dsi_vbt_exec_sequence +ffffffff81bbc020 T intel_dsi_log_params +ffffffff81bbc460 T intel_dsi_vbt_init +ffffffff81bbc970 T intel_dsi_vbt_gpio_init +ffffffff81bbc990 T intel_dsi_vbt_gpio_cleanup +ffffffff81bbd000 T intel_dvo_init +ffffffff81bbd730 t intel_disable_dvo +ffffffff81bbd7f0 t intel_enable_dvo +ffffffff81bbd8f0 t intel_dvo_get_hw_state +ffffffff81bbd970 t intel_dvo_get_config +ffffffff81bbda20 t intel_dvo_compute_config +ffffffff81bbdac0 t intel_dvo_pre_enable +ffffffff81bbdbd0 t intel_dvo_connector_get_hw_state +ffffffff81bbdc60 t intel_dvo_enc_destroy +ffffffff81bbdca0 t intel_dvo_detect +ffffffff81bbddc0 t intel_dvo_get_modes +ffffffff81bbde40 t intel_dvo_mode_valid +ffffffff81bbe000 T intel_fb_get_format_info +ffffffff81bbe2b0 T intel_fb_is_tiled_modifier +ffffffff81bbe300 t lookup_modifier +ffffffff81bbe540 T intel_fb_is_ccs_modifier +ffffffff81bbe590 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81bbe5e0 T intel_fb_is_mc_ccs_modifier +ffffffff81bbe630 T intel_fb_plane_get_modifiers +ffffffff81bbe830 T intel_fb_plane_supports_modifier +ffffffff81bbe8b0 T intel_format_info_is_yuv_semiplanar +ffffffff81bbe930 T intel_fb_is_ccs_aux_plane +ffffffff81bbe9f0 T intel_fb_rc_ccs_cc_plane +ffffffff81bbeae0 T is_surface_linear +ffffffff81bbec70 T main_to_ccs_plane +ffffffff81bbed20 T skl_ccs_to_main_plane +ffffffff81bbee80 T skl_main_to_aux_plane +ffffffff81bbefc0 T intel_tile_size +ffffffff81bbf000 T intel_tile_width_bytes +ffffffff81bbf470 T intel_tile_height +ffffffff81bbf4e0 T intel_tile_row_size +ffffffff81bbf570 T intel_fb_align_height +ffffffff81bbf5f0 T intel_fb_modifier_uses_dpt +ffffffff81bbf630 T intel_fb_uses_dpt +ffffffff81bbf690 T intel_cursor_alignment +ffffffff81bbf6f0 T intel_surf_alignment +ffffffff81bbf9c0 T intel_fb_plane_get_subsampling +ffffffff81bbfb40 T intel_plane_adjust_aligned_offset +ffffffff81bbfbc0 t intel_adjust_aligned_offset +ffffffff81bbfd90 T intel_plane_compute_aligned_offset +ffffffff81bbfea0 t intel_compute_aligned_offset +ffffffff81bc0090 T intel_fb_needs_pot_stride_remap +ffffffff81bc0100 T intel_fb_supports_90_270_rotation +ffffffff81bc0160 T intel_fill_fb_info +ffffffff81bc0d90 t calc_plane_remap_info +ffffffff81bc17b0 T intel_fb_fill_view +ffffffff81bc1820 T intel_plane_compute_gtt +ffffffff81bc1d60 t intel_plane_check_stride +ffffffff81bc1ee0 T intel_framebuffer_init +ffffffff81bc2880 t gen12_ccs_aux_stride +ffffffff81bc2900 T intel_user_framebuffer_create +ffffffff81bc2aa0 T intel_framebuffer_create +ffffffff81bc2b50 t intel_adjust_tile_offset +ffffffff81bc2c90 t intel_user_framebuffer_destroy +ffffffff81bc2d10 t intel_user_framebuffer_create_handle +ffffffff81bc2d40 t intel_user_framebuffer_dirty +ffffffff81bc3000 T intel_pin_and_fence_fb_obj +ffffffff81bc33c0 t i915_gem_object_lock +ffffffff81bc3610 T intel_unpin_fb_vma +ffffffff81bc3680 T intel_plane_pin_fb +ffffffff81bc3ab0 T intel_plane_unpin_fb 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ilk_fbc_program_cfb +ffffffff81bc7080 t ivb_fbc_set_false_color +ffffffff81bc7100 t snb_fbc_activate +ffffffff81bc71a0 t ilk_fbc_is_compressing +ffffffff81bc7210 t ilk_fbc_activate +ffffffff81bc7350 t i965_fbc_nuke +ffffffff81bc73f0 t g4x_fbc_activate +ffffffff81bc7510 t g4x_fbc_deactivate +ffffffff81bc75b0 t g4x_fbc_is_active +ffffffff81bc7610 t g4x_fbc_is_compressing +ffffffff81bc7670 t g4x_fbc_program_cfb +ffffffff81bc76c0 t i8xx_fbc_activate +ffffffff81bc7850 t i8xx_fbc_deactivate +ffffffff81bc7950 t i8xx_fbc_is_active +ffffffff81bc79b0 t i8xx_fbc_is_compressing +ffffffff81bc7a10 t i8xx_fbc_program_cfb +ffffffff81bc7ab0 t i8xx_fbc_nuke +ffffffff81bc8000 T intel_fbdev_init +ffffffff81bc8590 t intel_fbdev_suspend_worker +ffffffff81bc85c0 T intel_fbdev_initial_config_async +ffffffff81bc8630 T intel_fbdev_unregister +ffffffff81bc8670 T intel_fbdev_set_suspend +ffffffff81bc86a0 T intel_fbdev_fini +ffffffff81bc8750 T intel_fbdev_output_poll_changed +ffffffff81bc8800 T intel_fbdev_restore_mode +ffffffff81bc8890 T intel_fbdev_framebuffer +ffffffff81bc88d0 t intelfb_create +ffffffff81bc9310 t intelfb_dirty +ffffffff81bc9380 t intel_fbdev_set_par +ffffffff81bca000 T assert_fdi_tx_enabled +ffffffff81bca020 t assert_fdi_tx +ffffffff81bca170 T assert_fdi_tx_disabled +ffffffff81bca190 T assert_fdi_rx_enabled +ffffffff81bca280 T assert_fdi_rx_disabled +ffffffff81bca370 T assert_fdi_tx_pll_enabled +ffffffff81bca470 T assert_fdi_rx_pll_enabled +ffffffff81bca570 T assert_fdi_rx_pll_disabled +ffffffff81bca670 T intel_fdi_link_train +ffffffff81bca690 T intel_fdi_pll_freq_update +ffffffff81bca740 T intel_fdi_link_freq +ffffffff81bca790 T ilk_fdi_compute_config +ffffffff81bcab20 T intel_fdi_normal_train +ffffffff81bcace0 T hsw_fdi_link_train +ffffffff81bcb300 T hsw_fdi_disable +ffffffff81bcb4d0 T ilk_fdi_pll_enable +ffffffff81bcb730 T ilk_fdi_pll_disable +ffffffff81bcb8b0 T ilk_fdi_disable +ffffffff81bcbb80 T intel_fdi_init_hook +ffffffff81bcbbe0 t ilk_fdi_link_train +ffffffff81bcc3f0 t gen6_fdi_link_train +ffffffff81bcce60 t ivb_manual_fdi_link_train +ffffffff81bcd920 t cpt_set_fdi_bc_bifurcation +ffffffff81bce000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81bce480 T intel_set_pch_fifo_underrun_reporting +ffffffff81bce720 T intel_cpu_fifo_underrun_irq_handler +ffffffff81bce940 T intel_pch_fifo_underrun_irq_handler +ffffffff81bce9d0 T intel_check_cpu_fifo_underruns +ffffffff81bcec20 T intel_check_pch_fifo_underruns +ffffffff81bced80 T intel_init_fifo_underrun_reporting +ffffffff81bcf000 T intel_frontbuffer_flip_prepare +ffffffff81bcf060 T intel_frontbuffer_flip_complete +ffffffff81bcf180 T intel_frontbuffer_flip +ffffffff81bcf290 T __intel_fb_invalidate +ffffffff81bcf350 T __intel_fb_flush +ffffffff81bcf480 T intel_frontbuffer_get +ffffffff81bcf600 t frontbuffer_active +ffffffff81bcf630 t frontbuffer_retire +ffffffff81bcf670 T intel_frontbuffer_put +ffffffff81bcf7c0 T intel_frontbuffer_track +ffffffff81bd0000 T intel_atomic_global_obj_init +ffffffff81bd0070 T intel_atomic_global_obj_cleanup +ffffffff81bd0170 T intel_atomic_get_global_obj_state +ffffffff81bd03f0 T intel_atomic_get_old_global_obj_state +ffffffff81bd0450 T intel_atomic_get_new_global_obj_state +ffffffff81bd04b0 T intel_atomic_swap_global_state +ffffffff81bd0600 T intel_atomic_clear_global_state +ffffffff81bd0730 T intel_atomic_lock_global_state +ffffffff81bd07c0 T intel_atomic_serialize_global_state +ffffffff81bd0850 T intel_atomic_global_state_is_serialized +ffffffff81bd1000 T intel_gmbus_is_valid_pin +ffffffff81bd1100 T intel_gmbus_reset +ffffffff81bd1170 T intel_bb_set_bits +ffffffff81bd12d0 T intel_bb_set_dir +ffffffff81bd1300 T intel_bb_read_bits +ffffffff81bd14d0 T intel_acquire_bus +ffffffff81bd1730 T intel_release_bus +ffffffff81bd1910 T intel_send_start +ffffffff81bd1930 T intel_send_stop +ffffffff81bd1950 T intel_initiate_xfer +ffffffff81bd1970 T intel_read_byte +ffffffff81bd1990 T intel_write_byte +ffffffff81bd19b0 T intel_gmbus_output_aksv +ffffffff81bd1ab0 t do_gmbus_xfer +ffffffff81bd2140 T intel_gmbus_setup +ffffffff81bd24f0 T intel_gmbus_teardown +ffffffff81bd2580 T intel_gmbus_get_adapter +ffffffff81bd2600 T intel_gmbus_force_bit +ffffffff81bd26b0 T intel_gmbus_is_forced_bit +ffffffff81bd26e0 T intel_gmbus_irq_handler +ffffffff81bd2780 t gmbus_xfer_read +ffffffff81bd2a80 t gmbus_xfer_write +ffffffff81bd2cd0 t gmbus_wait +ffffffff81bd3130 t gmbus_wait_idle +ffffffff81bd3300 t gmbus_xfer +ffffffff81bd3400 t gmbus_func +ffffffff81bd3450 t gmbus_lock_bus +ffffffff81bd3470 t gmbus_trylock_bus +ffffffff81bd34d0 t gmbus_unlock_bus +ffffffff81bd4000 T intel_hdcp_capable +ffffffff81bd40b0 t intel_hdcp_read_valid_bksv +ffffffff81bd4350 T intel_hdcp2_capable +ffffffff81bd44b0 T is_hdcp_supported +ffffffff81bd4500 T intel_hdcp_component_init +ffffffff81bd4560 T intel_hdcp_init +ffffffff81bd4730 t intel_hdcp_check_work +ffffffff81bd76f0 t intel_hdcp_prop_work +ffffffff81bd7790 T intel_hdcp_enable +ffffffff81bd77f0 T intel_hdcp_disable +ffffffff81bd7970 t intel_hdcp_update_value +ffffffff81bd7b60 t _intel_hdcp2_disable +ffffffff81bd7fd0 t _intel_hdcp_disable +ffffffff81bd8330 T intel_hdcp_update_pipe +ffffffff81bd84e0 T intel_hdcp_component_fini +ffffffff81bd8590 T intel_hdcp_cleanup +ffffffff81bd86e0 T intel_hdcp_atomic_check +ffffffff81bd8770 T intel_hdcp_handle_cp_irq +ffffffff81bd8890 t __delayed_work_tick +ffffffff81bd88b0 t hdcp2_authenticate_repeater_topology +ffffffff81bd8bc0 t transcoder_name +ffffffff81bd8c00 t intel_hdcp_get_repeater_ctl +ffffffff81bd8ce0 t ktime_get_raw +ffffffff81bd8d60 t wait_remaining_ms_from_jiffies +ffffffff81bd8df0 t intel_hdcp_auth_downstream +ffffffff81bda2e0 t intel_write_sha_text +ffffffff81bdb000 T intel_hdcp_gsc_cs_required +ffffffff81bdb040 T intel_hdcp_gsc_init +ffffffff81bdb590 T intel_hdcp_gsc_fini +ffffffff81bdb600 T intel_hdcp_gsc_msg_send +ffffffff81bdb9b0 t gsc_hdcp_initiate_session +ffffffff81bdba10 t gsc_hdcp_verify_receiver_cert_prepare_km +ffffffff81bdba70 t gsc_hdcp_verify_hprime +ffffffff81bdbad0 t gsc_hdcp_store_pairing_info +ffffffff81bdbb30 t gsc_hdcp_initiate_locality_check +ffffffff81bdbb90 t gsc_hdcp_verify_lprime +ffffffff81bdbbf0 t gsc_hdcp_get_session_key +ffffffff81bdbc50 t gsc_hdcp_repeater_check_flow_prepare_ack +ffffffff81bdbcb0 t gsc_hdcp_verify_mprime +ffffffff81bdbd10 t gsc_hdcp_enable_authentication +ffffffff81bdbd70 t gsc_hdcp_close_session +ffffffff81bdc000 T intel_hdmi_to_i915 +ffffffff81bdc040 T hsw_write_infoframe +ffffffff81bdc4c0 t hsw_dip_data_reg +ffffffff81bdc680 T hsw_read_infoframe +ffffffff81bdc750 T intel_hdmi_infoframe_enable +ffffffff81bdc7f0 T intel_hdmi_infoframes_enabled +ffffffff81bdc910 T intel_read_infoframe +ffffffff81bdcac0 T intel_hdmi_read_gcp_infoframe +ffffffff81bdcba0 T intel_dp_dual_mode_set_tmds_output +ffffffff81bdcc70 T intel_hdmi_tmds_clock +ffffffff81bdccc0 T intel_hdmi_bpc_possible +ffffffff81bdcdf0 T intel_hdmi_limited_color_range +ffffffff81bdce60 T intel_hdmi_compute_has_hdmi_sink +ffffffff81bdced0 T intel_hdmi_compute_config +ffffffff81bdd520 t intel_hdmi_compute_output_format +ffffffff81bdd6a0 t intel_hdmi_compute_hdmi_infoframe +ffffffff81bdd780 t intel_hdmi_compute_drm_infoframe +ffffffff81bdd890 T intel_hdmi_encoder_shutdown +ffffffff81bdd970 T intel_hdmi_handle_sink_scrambling +ffffffff81bdda70 T intel_infoframe_init +ffffffff81bddc10 t vlv_write_infoframe +ffffffff81bddf90 t vlv_read_infoframe +ffffffff81bde130 t vlv_set_infoframes +ffffffff81bde4b0 t vlv_infoframes_enabled +ffffffff81bde550 t g4x_write_infoframe +ffffffff81bde840 t g4x_read_infoframe +ffffffff81bde990 t g4x_set_infoframes +ffffffff81bdec50 t g4x_infoframes_enabled +ffffffff81bdecd0 t hsw_set_infoframes +ffffffff81bdefb0 t hsw_infoframes_enabled +ffffffff81bdf040 t ibx_write_infoframe +ffffffff81bdf380 t ibx_read_infoframe +ffffffff81bdf500 t ibx_set_infoframes +ffffffff81bdf880 t ibx_infoframes_enabled +ffffffff81bdf910 t cpt_write_infoframe +ffffffff81bdfc50 t cpt_read_infoframe +ffffffff81bdfdd0 t cpt_set_infoframes +ffffffff81be00f0 t cpt_infoframes_enabled +ffffffff81be0170 T intel_hdmi_init_connector +ffffffff81be0a00 T intel_hdmi_dsc_get_slice_height +ffffffff81be0a60 T intel_hdmi_dsc_get_num_slices +ffffffff81be0be0 T intel_hdmi_dsc_get_bpp +ffffffff81be0cc0 t intel_hdmi_compute_clock +ffffffff81be0f40 t hdmi_port_clock_valid +ffffffff81be11a0 t intel_write_infoframe +ffffffff81be1390 t intel_hdmi_detect +ffffffff81be1580 t intel_hdmi_force +ffffffff81be1630 t intel_hdmi_connector_register +ffffffff81be1640 t intel_hdmi_connector_unregister +ffffffff81be1650 t intel_hdmi_set_edid +ffffffff81be1990 t intel_hdmi_get_modes +ffffffff81be19a0 t intel_hdmi_mode_valid +ffffffff81be1b80 t intel_hdmi_connector_atomic_check +ffffffff81be1bb0 t intel_hdmi_mode_clock_valid +ffffffff81be1d70 t intel_hdmi_hdcp_write_an_aksv +ffffffff81be1ef0 t intel_hdmi_hdcp_read_bksv +ffffffff81be1fd0 t intel_hdmi_hdcp_read_bstatus +ffffffff81be20b0 t intel_hdmi_hdcp_repeater_present +ffffffff81be21a0 t intel_hdmi_hdcp_read_ri_prime +ffffffff81be2280 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81be2370 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81be2450 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81be2550 t intel_hdmi_hdcp_toggle_signalling +ffffffff81be2810 t intel_hdmi_hdcp_check_link +ffffffff81be2bb0 t intel_hdmi_hdcp2_capable +ffffffff81be2c80 t intel_hdmi_hdcp2_write_msg +ffffffff81be2da0 t intel_hdmi_hdcp2_read_msg +ffffffff81be3210 t intel_hdmi_hdcp2_check_link +ffffffff81be4000 T intel_hpd_pin_default +ffffffff81be4030 T intel_encoder_hotplug +ffffffff81be4190 T intel_hpd_trigger_irq +ffffffff81be4210 T intel_hpd_irq_handler +ffffffff81be4670 T intel_hpd_init +ffffffff81be4790 T intel_hpd_poll_enable +ffffffff81be4820 T intel_hpd_poll_disable +ffffffff81be4880 T intel_hpd_init_early +ffffffff81be49d0 t i915_hotplug_work_func +ffffffff81be4e80 t i915_digport_work_func +ffffffff81be5030 t i915_hpd_poll_init_work +ffffffff81be5180 t intel_hpd_irq_storm_reenable_work +ffffffff81be54f0 T intel_hpd_cancel_work +ffffffff81be5630 T intel_hpd_disable +ffffffff81be56d0 T intel_hpd_enable +ffffffff81be5750 T intel_hpd_debugfs_register +ffffffff81be5780 t __delayed_work_tick +ffffffff81be6000 T i915_hotplug_interrupt_update_locked +ffffffff81be60c0 T i915_hotplug_interrupt_update +ffffffff81be61b0 T i9xx_hpd_irq_ack +ffffffff81be6310 T i9xx_hpd_irq_handler +ffffffff81be64d0 T ibx_hpd_irq_handler +ffffffff81be66a0 T xelpdp_pica_irq_handler +ffffffff81be69c0 T icp_irq_handler +ffffffff81be6ca0 T spt_irq_handler +ffffffff81be6f70 T ilk_hpd_irq_handler +ffffffff81be70b0 T bxt_hpd_irq_handler +ffffffff81be7230 T gen11_hpd_irq_handler +ffffffff81be74d0 T intel_hpd_enable_detection +ffffffff81be7510 T intel_hpd_irq_setup +ffffffff81be7560 T intel_hotplug_irq_init +ffffffff81be77f0 t i915_hpd_irq_setup +ffffffff81be7910 t i915_hpd_enable_detection +ffffffff81be79c0 t icp_hpd_irq_setup +ffffffff81be7bd0 t icp_hpd_enable_detection +ffffffff81be7ce0 t dg1_hpd_irq_setup +ffffffff81be7d50 t dg1_hpd_enable_detection +ffffffff81be7ec0 t xelpdp_hpd_irq_setup +ffffffff81be8340 t xelpdp_hpd_enable_detection +ffffffff81be8510 t gen11_hpd_irq_setup +ffffffff81be87a0 t gen11_hpd_enable_detection +ffffffff81be89e0 t bxt_hpd_irq_setup +ffffffff81be8b90 t bxt_hpd_enable_detection +ffffffff81be8ca0 t spt_hpd_irq_setup +ffffffff81be8ee0 t spt_hpd_enable_detection +ffffffff81be9020 t ilk_hpd_irq_setup +ffffffff81be92b0 t ilk_hpd_enable_detection +ffffffff81bea000 T intel_hti_init +ffffffff81bea070 T intel_hti_uses_phy +ffffffff81bea110 T intel_hti_dpll_mask +ffffffff81beb000 T intel_load_detect_get_pipe +ffffffff81beb430 t intel_modeset_disable_planes +ffffffff81beb510 T intel_load_detect_release_pipe +ffffffff81bec000 T intel_lpe_audio_irq_handler +ffffffff81bec020 T intel_lpe_audio_init +ffffffff81bec050 T intel_lpe_audio_teardown +ffffffff81bec070 T intel_lpe_audio_notify +ffffffff81bed000 T lspcon_detect_hdr_capability +ffffffff81bed0c0 T lspcon_write_infoframe +ffffffff81bed950 T lspcon_read_infoframe +ffffffff81bed990 T lspcon_set_infoframes +ffffffff81bedc20 T lspcon_infoframes_enabled +ffffffff81bede30 T lspcon_wait_pcon_mode +ffffffff81bede50 t lspcon_wait_mode +ffffffff81bee180 T lspcon_init +ffffffff81bee660 T intel_lspcon_infoframes_enabled +ffffffff81bee690 T lspcon_resume +ffffffff81bee9a0 t lspcon_change_mode +ffffffff81bef000 T intel_lvds_port_enabled +ffffffff81bef090 T intel_get_lvds_encoder +ffffffff81bef0f0 T intel_is_dual_link_lvds +ffffffff81bef150 T intel_lvds_init +ffffffff81bef950 t intel_enable_lvds +ffffffff81befad0 t intel_pre_enable_lvds +ffffffff81befdf0 t intel_lvds_compute_config +ffffffff81beff70 t pch_disable_lvds +ffffffff81beff90 t pch_post_disable_lvds +ffffffff81beffb0 t gmch_disable_lvds +ffffffff81befff0 t intel_lvds_get_hw_state +ffffffff81bf00c0 t intel_lvds_get_config +ffffffff81bf01e0 t intel_lvds_shutdown +ffffffff81bf0290 t compute_is_dual_link_lvds +ffffffff81bf0380 t intel_no_lvds_dmi_callback +ffffffff81bf03d0 t intel_disable_lvds +ffffffff81bf0520 t intel_lvds_get_modes +ffffffff81bf0580 t intel_lvds_mode_valid +ffffffff81bf0630 t intel_dual_link_lvds_callback +ffffffff81bf1000 T _intel_modeset_lock_begin +ffffffff81bf1070 T _intel_modeset_lock_loop +ffffffff81bf10b0 T _intel_modeset_lock_end +ffffffff81bf2000 T intel_modeset_setup_hw_state +ffffffff81bf36b0 t intel_crtc_disable_noatomic +ffffffff81bf3d80 t intel_crtc_disable_noatomic_begin +ffffffff81bf5000 T intel_modeset_verify_crtc +ffffffff81bf5630 t verify_connector_state +ffffffff81bf5b10 T intel_modeset_verify_disabled +ffffffff81bf6000 T intel_opregion_notify_encoder +ffffffff81bf6190 t swsci +ffffffff81bf6530 T intel_opregion_notify_adapter +ffffffff81bf6590 T intel_opregion_asle_intr +ffffffff81bf65e0 T intel_opregion_setup +ffffffff81bf6f90 t asle_work +ffffffff81bf7490 T intel_opregion_get_panel_type +ffffffff81bf75a0 T intel_opregion_get_edid +ffffffff81bf7690 T intel_opregion_headless_sku +ffffffff81bf76e0 T intel_opregion_register +ffffffff81bf7780 T intel_opregion_resume +ffffffff81bf7820 T intel_opregion_suspend +ffffffff81bf78e0 T intel_opregion_unregister +ffffffff81bf79c0 T intel_opregion_cleanup +ffffffff81bf7ad0 t intel_no_opregion_vbt_callback +ffffffff81bf7b30 t intel_use_opregion_panel_type_callback +ffffffff81bf8000 T intel_overlay_reset +ffffffff81bf8050 T intel_overlay_switch_off +ffffffff81bf82a0 t intel_overlay_release_old_vid +ffffffff81bf84a0 T intel_overlay_put_image_ioctl +ffffffff81bf8850 t update_pfit_vscale_ratio +ffffffff81bf8930 t check_overlay_dst +ffffffff81bf8a10 t check_overlay_src +ffffffff81bf8c60 t intel_overlay_do_put_image +ffffffff81bf9920 T intel_overlay_attrs_ioctl +ffffffff81bf9cc0 t check_gamma +ffffffff81bf9eb0 T intel_overlay_setup +ffffffff81bfa160 t intel_overlay_last_flip_retire +ffffffff81bfa1a0 T intel_overlay_cleanup +ffffffff81bfa260 T intel_overlay_capture_error_state +ffffffff81bfa370 T intel_overlay_print_error_state +ffffffff81bfa8b0 t intel_overlay_release_old_vid_tail +ffffffff81bfa980 t intel_overlay_off_tail +ffffffff81bfab70 t intel_overlay_flip_prepare +ffffffff81bfb000 T intel_panel_use_ssc +ffffffff81bfb060 T intel_panel_preferred_fixed_mode +ffffffff81bfb0b0 T intel_panel_fixed_mode +ffffffff81bfb230 T intel_panel_downclock_mode +ffffffff81bfb330 T intel_panel_highest_mode +ffffffff81bfb390 T intel_panel_get_modes +ffffffff81bfb440 T intel_panel_drrs_type +ffffffff81bfb470 T intel_panel_compute_config +ffffffff81bfb630 T intel_panel_add_edid_fixed_modes +ffffffff81bfbb90 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81bfbc00 t intel_panel_add_fixed_mode +ffffffff81bfbd90 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81bfbe00 T intel_panel_add_encoder_fixed_mode +ffffffff81bfbe40 T intel_panel_fitting +ffffffff81bfc4b0 T intel_panel_detect +ffffffff81bfc550 T intel_panel_mode_valid +ffffffff81bfc600 T intel_panel_init_alloc +ffffffff81bfc650 T intel_panel_init +ffffffff81bfc790 T intel_panel_fini +ffffffff81bfd000 T intel_has_pch_trancoder +ffffffff81bfd060 T intel_crtc_pch_transcoder +ffffffff81bfd0a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81bfd0f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81bfd140 T ilk_pch_pre_enable +ffffffff81bfd170 T ilk_pch_enable +ffffffff81bfd820 t ilk_pch_transcoder_set_timings +ffffffff81bfdaf0 T ilk_pch_disable +ffffffff81bfdb10 T ilk_pch_post_disable +ffffffff81bfdfc0 T ilk_pch_get_config +ffffffff81bfe1d0 T lpt_pch_enable +ffffffff81bfe4a0 T lpt_pch_disable +ffffffff81bfe5e0 T lpt_pch_get_config +ffffffff81bfe6d0 T intel_pch_sanitize +ffffffff81bfea10 t assert_pch_dp_disabled +ffffffff81bfebc0 t assert_pch_hdmi_disabled +ffffffff81bff000 T lpt_disable_iclkip +ffffffff81bff0a0 T lpt_iclkip +ffffffff81bff130 T lpt_program_iclkip +ffffffff81bff450 T lpt_get_iclkip +ffffffff81bff590 T lpt_disable_clkout_dp +ffffffff81bff690 T intel_init_pch_refclk +ffffffff81c01000 T intel_crtc_initial_plane_config +ffffffff81c02000 T intel_pmdemand_init +ffffffff81c02150 T intel_pmdemand_init_early +ffffffff81c021e0 T intel_pmdemand_update_phys_mask +ffffffff81c02290 T intel_pmdemand_update_port_clock +ffffffff81c022d0 T intel_pmdemand_atomic_check +ffffffff81c02710 t intel_pmdemand_update_max_ddiclk +ffffffff81c027e0 t intel_pmdemand_update_active_non_tc_phys +ffffffff81c02a10 T intel_pmdemand_init_pmdemand_params +ffffffff81c02c10 T intel_pmdemand_program_dbuf +ffffffff81c02de0 t intel_pmdemand_wait +ffffffff81c03020 T intel_pmdemand_pre_plane_update +ffffffff81c03140 t intel_pmdemand_program_params +ffffffff81c035f0 T intel_pmdemand_post_plane_update +ffffffff81c03700 t intel_pmdemand_duplicate_state +ffffffff81c03790 t intel_pmdemand_destroy_state +ffffffff81c04000 T intel_pps_lock +ffffffff81c04070 T intel_pps_unlock +ffffffff81c040e0 T intel_pps_reset_all +ffffffff81c04240 T intel_pps_check_power_unlocked +ffffffff81c04590 t pps_name +ffffffff81c04640 T intel_pps_wait_power_cycle +ffffffff81c04710 t wait_panel_power_cycle +ffffffff81c04920 T intel_pps_vdd_on_unlocked +ffffffff81c04f80 T intel_pps_vdd_on +ffffffff81c05160 T intel_pps_vdd_off_sync +ffffffff81c05270 t intel_pps_vdd_off_sync_unlocked +ffffffff81c05730 T intel_pps_vdd_off_unlocked +ffffffff81c05920 T intel_pps_on_unlocked +ffffffff81c05e70 T intel_pps_on +ffffffff81c05f40 T intel_pps_off_unlocked +ffffffff81c063b0 T intel_pps_off +ffffffff81c06480 T intel_pps_backlight_on +ffffffff81c066d0 T intel_pps_backlight_off +ffffffff81c06940 T intel_pps_backlight_power +ffffffff81c06b70 T vlv_pps_init +ffffffff81c06d70 t vlv_detach_power_sequencer +ffffffff81c06f70 t vlv_steal_power_sequencer +ffffffff81c070b0 t pps_init_delays +ffffffff81c07590 t pps_init_registers +ffffffff81c079a0 T intel_pps_have_panel_power_or_vdd +ffffffff81c07b40 T intel_pps_encoder_reset +ffffffff81c07d30 t vlv_initial_power_sequencer_setup +ffffffff81c080a0 t pps_vdd_init +ffffffff81c08280 T intel_pps_init +ffffffff81c08780 t edp_panel_vdd_work +ffffffff81c08840 T intel_pps_init_late +ffffffff81c08ac0 T intel_pps_unlock_regs_wa +ffffffff81c08be0 T intel_pps_setup +ffffffff81c08c50 T assert_pps_unlocked +ffffffff81c08f20 t intel_pps_get_registers +ffffffff81c09830 t wait_panel_status +ffffffff81c09cd0 t intel_pps_readout_hw_state +ffffffff81c09ec0 t __delayed_work_tick +ffffffff81c0a000 T intel_psr_irq_handler +ffffffff81c0a710 t transcoder_name +ffffffff81c0a750 T intel_psr_init_dpcd +ffffffff81c0aa40 T intel_psr_compute_config +ffffffff81c0ac40 t intel_psr2_config_valid +ffffffff81c0b120 T intel_psr_get_config +ffffffff81c0b2e0 T intel_psr_disable +ffffffff81c0b420 t intel_psr_disable_locked +ffffffff81c0b810 T intel_psr_pause +ffffffff81c0ba30 t intel_psr_exit +ffffffff81c0bd10 T intel_psr_resume +ffffffff81c0bdb0 t intel_psr_activate +ffffffff81c0c550 T intel_psr2_disable_plane_sel_fetch_arm +ffffffff81c0c5c0 T intel_psr2_program_plane_sel_fetch_arm +ffffffff81c0c660 T intel_psr2_program_plane_sel_fetch_noarm +ffffffff81c0c7d0 T intel_psr2_program_trans_man_trk_ctl +ffffffff81c0c8c0 T intel_psr2_sel_fetch_update +ffffffff81c0d070 T intel_psr_pre_plane_update +ffffffff81c0d250 t wm_optimization_wa +ffffffff81c0d410 T intel_psr_post_plane_update +ffffffff81c0e190 T intel_psr_wait_for_idle_locked +ffffffff81c0e380 T intel_psr_debug_set +ffffffff81c0e750 T intel_psr_invalidate +ffffffff81c0e9b0 T intel_psr_flush +ffffffff81c0ee50 T intel_psr_init +ffffffff81c0efa0 t intel_psr_work +ffffffff81c0f1a0 t tgl_dc3co_disable_work +ffffffff81c0f200 T intel_psr_short_pulse +ffffffff81c0f670 T intel_psr_enabled +ffffffff81c0f700 T intel_psr_lock +ffffffff81c0f7c0 T intel_psr_unlock +ffffffff81c0f880 T intel_psr_debugfs_register +ffffffff81c0f8b0 T intel_psr_connector_debugfs_add +ffffffff81c0f8e0 t _compute_psr2_sdp_prior_scanline_indication +ffffffff81c0f9a0 t _compute_psr2_wake_times +ffffffff81c0faa0 t intel_psr2_sel_fetch_config_valid +ffffffff81c0fb30 t psr2_granularity_check +ffffffff81c0fc20 t tgl_psr2_disable_dc3co +ffffffff81c0fd40 t __delayed_work_tick +ffffffff81c10000 T intel_lookup_range_min_qp +ffffffff81c10120 T intel_lookup_range_max_qp +ffffffff81c11000 T intel_init_quirks +ffffffff81c11110 T intel_has_quirk +ffffffff81c11150 t quirk_ssc_force_disable +ffffffff81c11180 t quirk_invert_brightness +ffffffff81c111b0 t quirk_backlight_present +ffffffff81c111e0 t quirk_increase_t12_delay +ffffffff81c11210 t quirk_increase_ddi_disabled_time +ffffffff81c11240 t intel_dmi_reverse_brightness +ffffffff81c11290 t intel_dmi_no_pps_backlight +ffffffff81c12000 T intel_sdvo_port_enabled +ffffffff81c120b0 T intel_sdvo_init +ffffffff81c132f0 t intel_sdvo_compute_config +ffffffff81c13720 t pch_disable_sdvo +ffffffff81c13750 t pch_post_disable_sdvo +ffffffff81c13760 t intel_disable_sdvo +ffffffff81c13940 t intel_sdvo_pre_enable +ffffffff81c14430 t intel_enable_sdvo +ffffffff81c14650 t intel_sdvo_get_hw_state +ffffffff81c14750 t intel_sdvo_get_config +ffffffff81c14c30 t intel_sdvo_set_target_input +ffffffff81c14cb0 t intel_sdvo_get_input_pixel_clock_range +ffffffff81c14d60 t intel_sdvo_ddc_proxy_xfer +ffffffff81c14e10 t intel_sdvo_ddc_proxy_func +ffffffff81c14e40 t __intel_sdvo_write_cmd +ffffffff81c15350 t proxy_lock_bus +ffffffff81c15380 t proxy_trylock_bus +ffffffff81c153b0 t proxy_unlock_bus +ffffffff81c153e0 t intel_sdvo_enc_destroy +ffffffff81c153f0 t intel_sdvo_set_output_timings_from_mode +ffffffff81c15520 t intel_sdvo_get_preferred_input_mode +ffffffff81c15910 t intel_sdvo_get_dtd_from_mode +ffffffff81c15a90 t intel_sdvo_read_response +ffffffff81c16000 t intel_sdvo_get_value +ffffffff81c16080 t intel_sdvo_write_sdvox +ffffffff81c162f0 t intel_sdvo_write_infoframe +ffffffff81c164f0 t intel_sdvo_read_infoframe +ffffffff81c16770 t intel_sdvo_hotplug +ffffffff81c167c0 t intel_sdvo_connector_get_hw_state +ffffffff81c16860 t intel_sdvo_detect +ffffffff81c16bc0 t intel_sdvo_connector_register +ffffffff81c16bd0 t intel_sdvo_connector_unregister +ffffffff81c16be0 t intel_sdvo_connector_duplicate_state +ffffffff81c16c70 t intel_sdvo_connector_atomic_set_property +ffffffff81c16e40 t intel_sdvo_connector_atomic_get_property +ffffffff81c17060 t intel_sdvo_get_analog_edid +ffffffff81c170a0 t intel_sdvo_connector_matches_edid +ffffffff81c17140 t intel_sdvo_get_modes +ffffffff81c17470 t intel_sdvo_mode_valid +ffffffff81c175a0 t intel_sdvo_atomic_check +ffffffff81c17660 t intel_sdvo_create_enhance_property +ffffffff81c19000 T intel_snps_phy_wait_for_calibration +ffffffff81c190e0 T intel_snps_phy_update_psr_power_state +ffffffff81c191b0 T intel_snps_phy_set_signal_levels +ffffffff81c19460 T intel_mpllb_calc_state +ffffffff81c19610 T intel_snps_phy_check_hdmi_link_rate +ffffffff81c196b0 T intel_mpllb_enable +ffffffff81c19950 T intel_mpllb_disable +ffffffff81c19b00 T intel_mpllb_calc_port_clock +ffffffff81c19bd0 T intel_mpllb_readout_hw_state +ffffffff81c19d90 T intel_mpllb_state_verify +ffffffff81c1b000 T vlv_plane_min_cdclk +ffffffff81c1b0f0 T ivb_plane_min_cdclk +ffffffff81c1b1b0 T hsw_plane_min_cdclk +ffffffff81c1b250 T chv_plane_check_rotation +ffffffff81c1b2d0 T intel_sprite_plane_create +ffffffff81c1b670 t vlv_sprite_update_noarm +ffffffff81c1b770 t vlv_sprite_update_arm +ffffffff81c1be10 t vlv_sprite_disable_arm +ffffffff81c1bea0 t vlv_sprite_get_hw_state +ffffffff81c1bf90 t vlv_sprite_check +ffffffff81c1c090 t ivb_sprite_update_noarm +ffffffff81c1c200 t ivb_sprite_update_arm +ffffffff81c1c5e0 t ivb_sprite_disable_arm +ffffffff81c1c690 t ivb_sprite_get_hw_state +ffffffff81c1c760 t g4x_sprite_check +ffffffff81c1ca40 t hsw_sprite_max_stride +ffffffff81c1caa0 t g4x_sprite_max_stride +ffffffff81c1cb10 t ivb_sprite_min_cdclk +ffffffff81c1cc50 t g4x_sprite_update_noarm +ffffffff81c1cdb0 t g4x_sprite_update_arm +ffffffff81c1d200 t g4x_sprite_disable_arm +ffffffff81c1d2b0 t g4x_sprite_get_hw_state +ffffffff81c1d380 t g4x_sprite_min_cdclk +ffffffff81c1d460 t vlv_sprite_ctl +ffffffff81c1d660 t vlv_sprite_format_mod_supported +ffffffff81c1d7a0 t ivb_sprite_ctl +ffffffff81c1d9e0 t g4x_sprite_ctl +ffffffff81c1dbb0 t snb_sprite_format_mod_supported +ffffffff81c1dca0 t g4x_sprite_format_mod_supported +ffffffff81c1e000 T intel_sprite_set_colorkey_ioctl +ffffffff81c1f000 T intel_tc_port_in_tbt_alt_mode +ffffffff81c1f090 T intel_tc_port_in_dp_alt_mode +ffffffff81c1f120 T intel_tc_port_in_legacy_mode +ffffffff81c1f1b0 T intel_tc_cold_requires_aux_pw +ffffffff81c1f230 T intel_tc_port_get_lane_mask +ffffffff81c1f380 T intel_tc_port_get_pin_assignment_mask +ffffffff81c1f4d0 T intel_tc_port_fia_max_lane_count +ffffffff81c1f720 T intel_tc_port_set_fia_lane_count +ffffffff81c1f910 T intel_tc_port_init_mode +ffffffff81c1fb80 t intel_tc_port_update_mode +ffffffff81c1ffb0 T intel_tc_port_sanitize_mode +ffffffff81c20340 T intel_tc_port_connected_locked +ffffffff81c204b0 T intel_tc_port_ref_held +ffffffff81c20510 T intel_tc_port_connected +ffffffff81c205a0 T intel_tc_port_link_needs_reset +ffffffff81c20670 T intel_tc_port_link_reset +ffffffff81c207b0 T intel_tc_port_link_cancel_reset_work +ffffffff81c20880 T intel_tc_port_lock +ffffffff81c208a0 t __intel_tc_port_lock +ffffffff81c20a20 T intel_tc_port_suspend +ffffffff81c20a90 T intel_tc_port_unlock +ffffffff81c20b10 T intel_tc_port_get_link +ffffffff81c20bb0 T intel_tc_port_put_link +ffffffff81c20c70 T intel_tc_port_init +ffffffff81c20f30 t kasprintf +ffffffff81c21010 t intel_tc_port_disconnect_phy_work +ffffffff81c21070 t intel_tc_port_link_reset_work +ffffffff81c21430 T intel_tc_port_cleanup +ffffffff81c21510 t intel_tc_port_needs_reset +ffffffff81c21630 t tgl_tc_phy_cold_off_domain +ffffffff81c21660 t xelpdp_tc_phy_hpd_live_status +ffffffff81c217a0 t adlp_tc_phy_is_ready +ffffffff81c218c0 t xelpdp_tc_phy_is_owned +ffffffff81c219b0 t xelpdp_tc_phy_get_hw_state +ffffffff81c21b80 t xelpdp_tc_phy_connect +ffffffff81c21e60 t xelpdp_tc_phy_disconnect +ffffffff81c21fe0 t adlp_tc_phy_init +ffffffff81c22050 t tc_phy_get_current_mode +ffffffff81c223b0 t tc_phy_wait_for_ready +ffffffff81c22550 t xelpdp_tc_phy_enable_tcss_power +ffffffff81c22800 t tc_phy_verify_legacy_or_dp_alt_mode +ffffffff81c22a10 t xelpdp_tc_phy_wait_for_tcss_power +ffffffff81c22c60 t adlp_tc_phy_cold_off_domain +ffffffff81c22cc0 t adlp_tc_phy_hpd_live_status +ffffffff81c22de0 t adlp_tc_phy_is_owned +ffffffff81c22ec0 t adlp_tc_phy_get_hw_state +ffffffff81c22f80 t adlp_tc_phy_connect +ffffffff81c23320 t adlp_tc_phy_disconnect +ffffffff81c234c0 t icl_tc_phy_hpd_live_status +ffffffff81c23660 t icl_tc_phy_is_ready +ffffffff81c23780 t icl_tc_phy_is_owned +ffffffff81c238a0 t icl_tc_phy_get_hw_state +ffffffff81c23960 t icl_tc_phy_connect +ffffffff81c23b20 t icl_tc_phy_disconnect +ffffffff81c23bb0 t tgl_tc_phy_init +ffffffff81c23d20 t icl_tc_phy_take_ownership +ffffffff81c23eb0 t icl_tc_phy_cold_off_domain +ffffffff81c23f10 t icl_tc_phy_init +ffffffff81c23f70 t __delayed_work_tick +ffffffff81c24000 T intel_tv_init +ffffffff81c24490 t intel_tv_compute_config +ffffffff81c24990 t intel_tv_get_config +ffffffff81c24eb0 t intel_tv_pre_enable +ffffffff81c258f0 t intel_enable_tv +ffffffff81c25970 t intel_disable_tv +ffffffff81c259e0 t intel_tv_get_hw_state +ffffffff81c25a50 t intel_tv_connector_duplicate_state +ffffffff81c25ae0 t intel_tv_mode_to_mode +ffffffff81c25c30 t intel_tv_get_modes +ffffffff81c25fb0 t intel_tv_detect +ffffffff81c26520 t intel_tv_mode_valid +ffffffff81c265e0 t intel_tv_atomic_check +ffffffff81c27000 T i915_get_vblank_counter +ffffffff81c27220 T g4x_get_vblank_counter +ffffffff81c272b0 T intel_crtc_get_vblank_timestamp +ffffffff81c272d0 t i915_get_crtc_scanoutpos +ffffffff81c27720 T intel_get_crtc_scanline +ffffffff81c277a0 t __intel_get_crtc_scanline +ffffffff81c27a00 T intel_wait_for_pipe_scanline_stopped +ffffffff81c27a10 t wait_for_pipe_scanline_moving +ffffffff81c27cd0 T intel_wait_for_pipe_scanline_moving +ffffffff81c27cf0 T intel_crtc_update_active_timings +ffffffff81c28000 T intel_dsc_source_support +ffffffff81c28050 T intel_dsc_compute_params +ffffffff81c28680 T intel_dsc_power_domain +ffffffff81c28730 T intel_dsc_get_num_vdsc_instances +ffffffff81c28780 T intel_dsc_dsi_pps_write +ffffffff81c28ac0 T intel_dsc_dp_pps_write +ffffffff81c28bc0 T intel_uncompressed_joiner_enable +ffffffff81c28cf0 T intel_dsc_enable +ffffffff81c2aa10 T intel_dsc_disable +ffffffff81c2aba0 T intel_dsc_get_config +ffffffff81c2b000 T intel_vga_disable +ffffffff81c2b150 T intel_vga_redisable_power_on +ffffffff81c2b200 T intel_vga_redisable +ffffffff81c2b2e0 T intel_vga_reset_io_mem +ffffffff81c2b340 T intel_vga_register +ffffffff81c2b370 T intel_vga_unregister +ffffffff81c2c000 T intel_vrr_is_capable +ffffffff81c2c080 T intel_vrr_check_modeset +ffffffff81c2c110 T intel_vrr_vmin_vblank_start +ffffffff81c2c170 T intel_vrr_vmax_vblank_start +ffffffff81c2c1d0 T intel_vrr_compute_config +ffffffff81c2c360 T intel_vrr_set_transcoder_timings +ffffffff81c2c560 T intel_vrr_send_push +ffffffff81c2c5e0 T intel_vrr_is_push_sent +ffffffff81c2c670 T intel_vrr_enable +ffffffff81c2c7a0 T intel_vrr_disable +ffffffff81c2c8f0 T intel_vrr_get_config +ffffffff81c2d000 T intel_update_watermarks +ffffffff81c2d040 T intel_compute_pipe_wm +ffffffff81c2d090 T intel_compute_intermediate_wm +ffffffff81c2d120 T intel_initial_watermarks +ffffffff81c2d180 T intel_atomic_update_watermarks +ffffffff81c2d1c0 T intel_optimize_watermarks +ffffffff81c2d200 T intel_compute_global_watermarks +ffffffff81c2d250 T intel_wm_get_hw_state +ffffffff81c2d290 T intel_wm_plane_visible +ffffffff81c2d2f0 T intel_print_wm_latency +ffffffff81c2d410 T intel_wm_init +ffffffff81c2d430 T intel_wm_debugfs_register +ffffffff81c2e000 T skl_update_scaler_crtc +ffffffff81c2e0c0 t skl_update_scaler +ffffffff81c2e430 T skl_update_scaler_plane +ffffffff81c2e850 T intel_atomic_setup_scalers +ffffffff81c2ee30 T skl_pfit_enable +ffffffff81c2f330 T skl_program_plane_scaler +ffffffff81c2fa80 T skl_detach_scalers +ffffffff81c2fbe0 T skl_scaler_disable +ffffffff81c2fd10 T skl_scaler_get_config +ffffffff81c30000 T skl_format_to_fourcc +ffffffff81c30180 T icl_is_nv12_y_plane +ffffffff81c301f0 T icl_hdr_plane_mask +ffffffff81c30220 T icl_is_hdr_plane +ffffffff81c30260 T skl_calc_main_surface_offset +ffffffff81c304e0 T skl_universal_plane_create +ffffffff81c30d70 t icl_plane_min_width +ffffffff81c30f00 t icl_hdr_plane_max_width +ffffffff81c30f60 t icl_sdr_plane_max_width +ffffffff81c30f90 t icl_plane_max_height +ffffffff81c30fc0 t icl_plane_min_cdclk +ffffffff81c31010 t glk_plane_max_width +ffffffff81c310d0 t skl_plane_max_height +ffffffff81c31100 t glk_plane_min_cdclk +ffffffff81c31170 t skl_plane_max_width +ffffffff81c31250 t skl_plane_min_cdclk +ffffffff81c312c0 t skl_plane_max_stride +ffffffff81c31360 t icl_plane_update_noarm +ffffffff81c31c40 t icl_plane_update_arm +ffffffff81c31df0 t icl_plane_disable_arm +ffffffff81c31f10 t skl_plane_update_noarm +ffffffff81c320c0 t skl_plane_update_arm +ffffffff81c323f0 t skl_plane_disable_arm +ffffffff81c324b0 t skl_plane_get_hw_state +ffffffff81c325a0 t skl_plane_check +ffffffff81c33390 t skl_plane_async_flip +ffffffff81c334c0 t skl_plane_enable_flip_done +ffffffff81c33540 t skl_plane_disable_flip_done +ffffffff81c335c0 T skl_get_initial_plane_config +ffffffff81c33e00 t skl_plane_aux_dist +ffffffff81c33f30 t skl_surf_address +ffffffff81c34060 t skl_plane_check_nv12_rotation +ffffffff81c34110 t pxp_is_borked +ffffffff81c34170 t skl_plane_ctl +ffffffff81c34860 t glk_plane_color_ctl +ffffffff81c349b0 t skl_check_main_ccs_coordinates +ffffffff81c34b60 t gen12_plane_format_mod_supported +ffffffff81c34de0 t skl_plane_format_mod_supported +ffffffff81c36000 T intel_enabled_dbuf_slices_mask +ffffffff81c36140 T intel_sagv_pre_plane_update +ffffffff81c362f0 T intel_sagv_post_plane_update +ffffffff81c365a0 T intel_can_enable_sagv +ffffffff81c36610 T skl_ddb_dbuf_slice_mask +ffffffff81c366c0 T skl_write_plane_wm +ffffffff81c36b40 T skl_write_cursor_wm +ffffffff81c36f20 T skl_ddb_allocation_overlaps +ffffffff81c36fc0 T intel_wm_state_verify +ffffffff81c37a50 t skl_pipe_wm_get_hw_state +ffffffff81c37db0 T skl_watermark_ipc_enabled +ffffffff81c37de0 T skl_watermark_ipc_update +ffffffff81c37ea0 T skl_watermark_ipc_init +ffffffff81c37f80 T skl_wm_init +ffffffff81c38830 T intel_atomic_get_dbuf_state +ffffffff81c38850 T intel_dbuf_init +ffffffff81c388d0 T intel_dbuf_pre_plane_update +ffffffff81c38c10 T intel_dbuf_post_plane_update +ffffffff81c38d00 T intel_mbus_dbox_update +ffffffff81c38fa0 T skl_watermark_debugfs_register +ffffffff81c38fd0 t skl_sagv_disable +ffffffff81c39110 t skl_compute_wm +ffffffff81c3c5e0 t skl_wm_get_hw_state_and_sanitize +ffffffff81c3ce40 t skl_build_plane_wm_single +ffffffff81c3d1f0 t skl_compute_wm_params +ffffffff81c3d600 t skl_compute_plane_wm +ffffffff81c3da50 t skl_compute_dbuf_slices +ffffffff81c3df50 t skl_ddb_entry_for_slices +ffffffff81c3e0a0 t intel_dbuf_duplicate_state +ffffffff81c3e140 t intel_dbuf_destroy_state +ffffffff81c3f000 T pixel_format_from_register_bits +ffffffff81c3f070 T vlv_dsi_wait_for_fifo_empty +ffffffff81c3f130 T vlv_dsi_init +ffffffff81c3fab0 t intel_dsi_compute_config +ffffffff81c3fc30 t intel_dsi_pre_enable +ffffffff81c41c20 t bxt_dsi_enable +ffffffff81c41c40 t intel_dsi_disable +ffffffff81c41fb0 t intel_dsi_post_disable +ffffffff81c42e50 t intel_dsi_get_hw_state +ffffffff81c43160 t intel_dsi_get_config +ffffffff81c439d0 t intel_dsi_encoder_destroy +ffffffff81c43a00 t intel_dsi_prepare +ffffffff81c44820 t dpi_send_cmd +ffffffff81c449d0 t intel_dsi_host_attach +ffffffff81c44a00 t intel_dsi_host_detach +ffffffff81c44a30 t intel_dsi_host_transfer +ffffffff81c44ee0 t vlv_dsi_mode_valid +ffffffff81c45000 T vlv_dsi_pll_compute +ffffffff81c453d0 t vlv_dsi_pclk +ffffffff81c45580 T vlv_dsi_pll_enable +ffffffff81c45830 T vlv_dsi_pll_disable +ffffffff81c458d0 T bxt_dsi_pll_is_enabled +ffffffff81c459b0 T bxt_dsi_pll_disable +ffffffff81c45ae0 T vlv_dsi_get_pclk +ffffffff81c45bb0 T bxt_dsi_get_pclk +ffffffff81c45c80 T vlv_dsi_reset_clocks +ffffffff81c45d20 T bxt_dsi_pll_compute +ffffffff81c45ed0 T bxt_dsi_pll_enable +ffffffff81c46290 T bxt_dsi_reset_clocks +ffffffff81c463e0 T assert_dsi_pll_enabled +ffffffff81c46400 t assert_dsi_pll +ffffffff81c46530 T assert_dsi_pll_disabled +ffffffff81c47000 T i915_gem_busy_ioctl +ffffffff81c48000 T i915_gem_clflush_object +ffffffff81c48280 t clflush_work +ffffffff81c482f0 t clflush_release +ffffffff81c49000 T i915_lut_handle_alloc +ffffffff81c49020 T i915_lut_handle_free +ffffffff81c49040 T i915_gem_context_release +ffffffff81c49070 T i915_gem_init__contexts +ffffffff81c490d0 T i915_gem_context_open +ffffffff81c49290 t i915_gem_create_context +ffffffff81c49bb0 t proto_context_close +ffffffff81c49c70 t gem_context_register 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intel_gsc_uc_fw_init_done +ffffffff81cda150 T intel_gsc_fw_get_binary_info +ffffffff81cda500 T intel_gsc_uc_fw_upload +ffffffff81cda970 t gsc_fw_query_compatibility_version +ffffffff81cdb000 T intel_gsc_proxy_request_handler +ffffffff81cdb920 T intel_gsc_proxy_irq_handler +ffffffff81cdb9c0 T intel_gsc_proxy_fini +ffffffff81cdba30 T intel_gsc_proxy_init +ffffffff81cdc000 T intel_gsc_uc_init_early +ffffffff81cdc120 t gsc_work +ffffffff81cdc360 T intel_gsc_uc_init +ffffffff81cdc5e0 T intel_gsc_uc_fini +ffffffff81cdc6f0 T intel_gsc_uc_flush_work +ffffffff81cdc730 T intel_gsc_uc_resume +ffffffff81cdc7f0 T intel_gsc_uc_load_start +ffffffff81cdc8a0 T intel_gsc_uc_load_status +ffffffff81cdd000 T intel_gsc_uc_debugfs_register +ffffffff81cde000 T intel_gsc_uc_heci_cmd_submit_packet +ffffffff81cde380 T intel_gsc_uc_heci_cmd_emit_mtl_header +ffffffff81cde3e0 T intel_gsc_uc_heci_cmd_submit_nonpriv +ffffffff81cde980 t i915_gem_object_lock +ffffffff81cdf000 T intel_guc_notify +ffffffff81cdf040 T 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intel_guc_load_status +ffffffff81ce1320 T intel_guc_write_barrier +ffffffff81ce2000 T intel_guc_ads_print_policy_info +ffffffff81ce2120 T intel_guc_global_policies_update +ffffffff81ce2330 T intel_guc_ads_create +ffffffff81ce29b0 t guc_prep_golden_context +ffffffff81ce2bd0 t guc_capture_prep_lists +ffffffff81ce3310 t __guc_ads_init +ffffffff81ce3870 T intel_guc_ads_init_late +ffffffff81ce3aa0 T intel_guc_ads_destroy +ffffffff81ce3b10 T intel_guc_ads_reset +ffffffff81ce3bc0 T intel_guc_engine_usage_offset +ffffffff81ce3c00 T intel_guc_engine_usage_record_map +ffffffff81ce3cb0 t guc_mmio_reg_add +ffffffff81ce4000 T intel_guc_capture_getlistsize +ffffffff81ce4020 t guc_capture_getlistsize +ffffffff81ce4280 T intel_guc_capture_getlist +ffffffff81ce5410 t guc_cap_list_num_regs +ffffffff81ce5520 T intel_guc_capture_getnullheader +ffffffff81ce5600 T intel_guc_capture_print_engine_node +ffffffff81ce5ba0 T intel_guc_capture_free_node +ffffffff81ce5c20 T intel_guc_capture_is_matching_engine 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intel_gt_fini_hwconfig +ffffffff81cee000 T intel_guc_log_section_size_capture +ffffffff81cee050 t guc_log_init_sizes +ffffffff81cee2b0 T intel_guc_check_log_buf_overflow +ffffffff81cee360 T intel_guc_get_log_buffer_size +ffffffff81cee410 T intel_guc_get_log_buffer_offset +ffffffff81cee510 T intel_guc_log_init_early +ffffffff81cee590 t copy_debug_logs_work +ffffffff81cee5b0 T intel_guc_log_create +ffffffff81cee830 T intel_guc_log_destroy +ffffffff81cee860 T intel_guc_log_set_level +ffffffff81cee9d0 T intel_guc_log_relay_created +ffffffff81ceea00 T intel_guc_log_relay_open +ffffffff81ceead0 T intel_guc_log_relay_start +ffffffff81ceeb40 T intel_guc_log_relay_flush +ffffffff81ceec10 t guc_log_copy_debuglogs_for_relay +ffffffff81ceeda0 T intel_guc_log_relay_close +ffffffff81ceee50 T intel_guc_log_handle_flush_event +ffffffff81ceeea0 T intel_guc_log_info +ffffffff81ceefb0 T intel_guc_log_dump +ffffffff81cf0000 T intel_guc_log_debugfs_register +ffffffff81cf1000 T intel_guc_rc_init_early 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intel_guc_wait_for_pending_msg +ffffffff81cf4190 T intel_guc_wait_for_idle +ffffffff81cf41e0 T intel_guc_busyness_park +ffffffff81cf4300 T intel_guc_busyness_unpark +ffffffff81cf43c0 t guc_update_pm_timestamp +ffffffff81cf45b0 T intel_guc_submission_reset_prepare +ffffffff81cf4e40 t guc_flush_destroyed_contexts +ffffffff81cf4ff0 T intel_guc_submission_reset +ffffffff81cf5150 t __guc_reset_context +ffffffff81cf54b0 T intel_guc_submission_cancel_requests +ffffffff81cf5810 T intel_guc_submission_reset_finish +ffffffff81cf5920 T intel_guc_submission_init +ffffffff81cf5ae0 T intel_guc_submission_fini +ffffffff81cf5b90 T intel_guc_submission_setup +ffffffff81cf6020 t guc_sched_engine_disabled +ffffffff81cf6050 t guc_sched_engine_destroy +ffffffff81cf60c0 t guc_bump_inflight_request_prio +ffffffff81cf61c0 t guc_retire_inflight_request_prio +ffffffff81cf6250 t guc_submission_tasklet +ffffffff81cf66a0 t guc_sanitize +ffffffff81cf6720 t guc_release +ffffffff81cf6760 T intel_guc_submission_enable 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intel_guc_virtual_engine_has_heartbeat +ffffffff81cf9d40 t guc_update_engine_gt_clks +ffffffff81cf9f00 t guc_virtual_get_sibling +ffffffff81cf9fb0 t update_context_prio +ffffffff81cfa1d0 t try_context_registration +ffffffff81cfa560 t guc_wq_item_append +ffffffff81cfa800 t guc_add_request +ffffffff81cfaa70 t clr_ctx_id_mapping +ffffffff81cfaba0 t guc_context_policy_init_v70 +ffffffff81cfad50 t guc_resume +ffffffff81cfae70 t guc_request_alloc +ffffffff81cfb2d0 t add_to_context +ffffffff81cfb3e0 t remove_from_context +ffffffff81cfb4c0 t guc_engine_reset_prepare +ffffffff81cfb530 t guc_rewind_nop +ffffffff81cfb560 t guc_reset_nop +ffffffff81cfb590 t guc_set_default_submission +ffffffff81cfb5d0 t guc_engine_busyness +ffffffff81cfb800 t guc_context_alloc +ffffffff81cfb820 t guc_context_revoke +ffffffff81cfbbe0 t guc_context_close +ffffffff81cfbc80 t guc_context_pre_pin +ffffffff81cfbca0 t guc_context_pin +ffffffff81cfbd70 t guc_context_unpin +ffffffff81cfbee0 t guc_context_post_unpin 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intel_huc_auth +ffffffff81cff970 T intel_huc_is_authenticated +ffffffff81cffa40 T intel_huc_check_status +ffffffff81cffb60 t huc_is_fully_authenticated +ffffffff81cffcc0 T intel_huc_update_auth_status +ffffffff81cffdf0 T intel_huc_load_status +ffffffff81cfff00 t sw_fence_dummy_notify +ffffffff81cfff30 t huc_delayed_load_timer_callback +ffffffff81d01000 T intel_huc_debugfs_register +ffffffff81d02000 T intel_huc_fw_auth_via_gsccs +ffffffff81d024c0 T intel_huc_fw_get_binary_info +ffffffff81d027d0 T intel_huc_fw_load_and_auth_via_gsc +ffffffff81d02890 T intel_huc_fw_upload +ffffffff81d03000 T intel_uc_init_early +ffffffff81d03190 T intel_uc_init_late +ffffffff81d031d0 T intel_uc_driver_late_release +ffffffff81d03200 T intel_uc_init_mmio +ffffffff81d03220 T intel_uc_driver_remove +ffffffff81d032c0 T intel_uc_reset_prepare +ffffffff81d03340 t __uc_sanitize +ffffffff81d034a0 T intel_uc_reset +ffffffff81d034f0 T intel_uc_reset_finish +ffffffff81d03540 T intel_uc_cancel_requests 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i915_cmd_parser_get_version +ffffffff81d0d000 T i915_fence_context_timeout +ffffffff81d0e000 T i915_deps_init +ffffffff81d0e070 T i915_deps_fini +ffffffff81d0e100 T i915_deps_sync +ffffffff81d0e1c0 T i915_deps_add_dependency +ffffffff81d0e490 T i915_deps_add_resv +ffffffff81d0f000 T i915_print_iommu_status +ffffffff81d0f050 T i915_driver_probe +ffffffff81d0fc60 t i915_driver_register +ffffffff81d0fdb0 T inteldrm_init_backlight +ffffffff81d0fe40 t i915_welcome_messages +ffffffff81d10000 T i915_driver_remove +ffffffff81d10190 T i915_driver_shutdown +ffffffff81d103c0 T i915_driver_resume_switcheroo +ffffffff81d10430 t i915_drm_resume_early +ffffffff81d10550 t i915_drm_resume +ffffffff81d10850 T intagpsubmatch +ffffffff81d108a0 T intagp_print +ffffffff81d108f0 T inteldrm_wsioctl +ffffffff81d10b00 T inteldrm_wsmmap +ffffffff81d10b30 T inteldrm_alloc_screen +ffffffff81d10b60 T inteldrm_free_screen +ffffffff81d10b80 T inteldrm_show_screen +ffffffff81d10c60 T inteldrm_load_font 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gen7_oa_hw_tail_read +ffffffff81d2af10 t gen8_oa_read +ffffffff81d2b5f0 t gen8_is_valid_mux_addr +ffffffff81d2b670 t gen8_is_valid_flex_addr +ffffffff81d2b6f0 t chv_is_valid_mux_addr +ffffffff81d2b770 t gen8_oa_enable +ffffffff81d2b900 t gen8_oa_disable +ffffffff81d2b9e0 t gen8_enable_metric_set +ffffffff81d2baa0 t gen8_disable_metric_set +ffffffff81d2bb10 t gen8_oa_hw_tail_read +ffffffff81d2bb70 t gen11_is_valid_mux_addr +ffffffff81d2bc30 t gen11_disable_metric_set +ffffffff81d2bca0 t xehp_is_valid_b_counter_addr +ffffffff81d2bd70 t gen12_is_valid_b_counter_addr +ffffffff81d2bdc0 t gen12_is_valid_mux_addr +ffffffff81d2be60 t gen12_oa_enable +ffffffff81d2c040 t gen12_oa_disable +ffffffff81d2c1c0 t gen12_enable_metric_set +ffffffff81d2c3f0 t gen12_disable_metric_set +ffffffff81d2c570 t gen12_oa_hw_tail_read +ffffffff81d2c5e0 T i915_perf_sysctl_register +ffffffff81d2c610 T i915_perf_sysctl_unregister +ffffffff81d2c640 T i915_perf_fini +ffffffff81d2c780 t destroy_config +ffffffff81d2c830 T i915_perf_ioctl_version +ffffffff81d2c940 t get_sseu_config +ffffffff81d2c990 t emit_oa_config +ffffffff81d2d150 t i915_gem_object_lock +ffffffff81d2d3a0 t append_oa_status +ffffffff81d2d430 t append_oa_sample +ffffffff81d2d5b0 t lrc_configure_all_contexts +ffffffff81d2d760 t oa_configure_all_contexts +ffffffff81d2db30 t gen8_modify_self +ffffffff81d2dd30 t gen8_modify_context +ffffffff81d2df10 t gen12_configure_oar_context +ffffffff81d2f000 T i915_query_ioctl +ffffffff81d2f120 t query_topology_info +ffffffff81d2f170 t query_engine_info +ffffffff81d2f430 t query_perf_config +ffffffff81d2f7b0 t query_memregion_info +ffffffff81d2fa60 t query_hwconfig_blob +ffffffff81d2faf0 t query_geometry_subslices +ffffffff81d2fb90 t fill_topology_info +ffffffff81d2fd50 t query_perf_config_data +ffffffff81d30130 t copy_perf_config_registers_or_number +ffffffff81d31000 T i915_request_slab_cache +ffffffff81d31030 t i915_fence_get_driver_name +ffffffff81d31060 t i915_fence_get_timeline_name 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i915_rsgt_from_mm_node +ffffffff81d34380 T i915_rsgt_from_buddy_resource +ffffffff81d345f0 t i915_refct_sgt_release +ffffffff81d35000 T i915_sched_lookup_priolist +ffffffff81d35130 T __i915_priolist_free +ffffffff81d35150 T i915_schedule +ffffffff81d35680 T i915_sched_node_init +ffffffff81d356e0 T i915_sched_node_reinit +ffffffff81d35720 T __i915_sched_node_add_dependency +ffffffff81d35840 T i915_sched_node_add_dependency +ffffffff81d359a0 T i915_sched_node_fini +ffffffff81d35ab0 T i915_request_show_with_schedule +ffffffff81d35bb0 T i915_sched_engine_create +ffffffff81d35c70 t default_destroy +ffffffff81d35cd0 t default_disabled +ffffffff81d35d00 T i915_scheduler_module_exit +ffffffff81d35d30 T i915_scheduler_module_init +ffffffff81d36000 T i915_save_display +ffffffff81d36410 T i915_restore_display +ffffffff81d37000 T i915_sw_fence_complete +ffffffff81d37040 t __i915_sw_fence_complete +ffffffff81d371e0 T i915_sw_fence_await +ffffffff81d37260 T __i915_sw_fence_init +ffffffff81d372e0 T i915_sw_fence_reinit +ffffffff81d37320 T i915_sw_fence_commit +ffffffff81d37360 T i915_sw_fence_await_sw_fence +ffffffff81d37380 t __i915_sw_fence_await_sw_fence +ffffffff81d375e0 T i915_sw_fence_await_sw_fence_gfp +ffffffff81d37600 T i915_sw_fence_await_dma_fence +ffffffff81d37890 t dma_i915_sw_fence_wake +ffffffff81d37910 t irq_i915_sw_fence_work +ffffffff81d37960 t timer_i915_sw_fence_wake +ffffffff81d37a60 t dma_i915_sw_fence_wake_timer +ffffffff81d37af0 T __i915_sw_fence_await_dma_fence +ffffffff81d37c50 t __dma_i915_sw_fence_wake +ffffffff81d37cb0 T i915_sw_fence_await_reservation +ffffffff81d37dc0 t i915_sw_fence_wake +ffffffff81d38000 T dma_fence_work_init +ffffffff81d380a0 t fence_notify +ffffffff81d381c0 t fence_work +ffffffff81d38230 T dma_fence_work_chain +ffffffff81d38280 t get_driver_name +ffffffff81d382b0 t get_timeline_name +ffffffff81d382f0 t fence_release +ffffffff81d39000 T i915_switcheroo_register +ffffffff81d39030 T i915_switcheroo_unregister +ffffffff81d3a000 T i915_syncmap_init +ffffffff81d3a030 T i915_syncmap_is_later +ffffffff81d3a150 T i915_syncmap_set +ffffffff81d3a200 t __sync_set +ffffffff81d3a560 T i915_syncmap_free +ffffffff81d3a5d0 t __sync_free +ffffffff81d3b000 T i915_setup_sysfs +ffffffff81d3b030 T i915_teardown_sysfs +ffffffff81d3c000 T i915_ttm_buddy_man_init +ffffffff81d3c240 T i915_ttm_buddy_man_fini +ffffffff81d3c460 T i915_ttm_buddy_man_reserve +ffffffff81d3c550 T i915_ttm_buddy_man_visible_size +ffffffff81d3c580 T i915_ttm_buddy_man_avail +ffffffff81d3c5e0 t i915_ttm_buddy_man_alloc +ffffffff81d3c960 t i915_ttm_buddy_man_free +ffffffff81d3ca00 t i915_ttm_buddy_man_intersects +ffffffff81d3cab0 t i915_ttm_buddy_man_compatible +ffffffff81d3cb60 t i915_ttm_buddy_man_debug +ffffffff81d3d000 T i915_user_extensions +ffffffff81d3e000 T __i915_printk +ffffffff81d3e0f0 T add_taint_for_CI +ffffffff81d3e120 T cancel_timer +ffffffff81d3e170 T set_timer_ms +ffffffff81d3e220 T i915_vtd_active +ffffffff81d3f000 T intel_vgpu_detect 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i915_gem_object_lock +ffffffff81d420e0 T i915_ggtt_clear_scanout +ffffffff81d42160 T i915_vma_close +ffffffff81d42240 T i915_vma_reopen +ffffffff81d422c0 T i915_vma_destroy_locked +ffffffff81d423d0 t release_references +ffffffff81d42540 T i915_vma_destroy +ffffffff81d426a0 T i915_vma_parked +ffffffff81d429e0 T i915_vma_revoke_mmap +ffffffff81d42af0 T _i915_vma_move_to_active +ffffffff81d42dc0 T __i915_vma_evict +ffffffff81d43160 T __i915_vma_unbind +ffffffff81d43210 T i915_vma_unbind +ffffffff81d43390 T i915_vma_unbind_async +ffffffff81d43550 t __i915_vma_unbind_async +ffffffff81d43630 T i915_vma_unbind_unlocked +ffffffff81d43770 T i915_vma_make_unshrinkable +ffffffff81d437c0 T i915_vma_make_shrinkable +ffffffff81d437e0 T i915_vma_make_purgeable +ffffffff81d43800 T i915_vma_module_exit +ffffffff81d43820 T i915_vma_module_init +ffffffff81d43890 t __i915_vma_active +ffffffff81d43940 t __i915_vma_retire +ffffffff81d439e0 t __vma_bind +ffffffff81d43a80 t __vma_release +ffffffff81d43b10 t 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snb_pcode_read +ffffffff81d4c0f0 t __snb_pcode_rw +ffffffff81d4c290 T snb_pcode_write_timeout +ffffffff81d4c390 T skl_pcode_request +ffffffff81d4c740 T intel_pcode_init +ffffffff81d4c8a0 T snb_pcode_read_p +ffffffff81d4c9e0 T snb_pcode_write_p +ffffffff81d4d000 T intel_region_ttm_device_init +ffffffff81d4d080 T intel_region_ttm_device_fini +ffffffff81d4d0a0 T intel_region_to_ttm_type +ffffffff81d4d0e0 T intel_region_ttm_init +ffffffff81d4d190 T intel_region_ttm_fini +ffffffff81d4d4e0 T intel_region_ttm_resource_to_rsgt +ffffffff81d4d520 T intel_region_ttm_resource_free +ffffffff81d4e000 T intel_runtime_pm_get_raw +ffffffff81d4e0a0 T intel_runtime_pm_get +ffffffff81d4e170 T intel_runtime_pm_get_if_in_use +ffffffff81d4e240 T intel_runtime_pm_get_if_active +ffffffff81d4e310 T intel_runtime_pm_get_noresume +ffffffff81d4e480 T intel_runtime_pm_put_raw +ffffffff81d4e520 T intel_runtime_pm_put_unchecked +ffffffff81d4e600 T intel_runtime_pm_enable +ffffffff81d4e630 T intel_runtime_pm_disable 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intel_uncore_forcewake_for_reg +ffffffff81d557a0 t check_for_unclaimed_mmio +ffffffff81d55910 T intel_uncore_arm_unclaimed_mmio_detection +ffffffff81d55a30 t vgpu_write8 +ffffffff81d55a70 t vgpu_write16 +ffffffff81d55ab0 t vgpu_write32 +ffffffff81d55af0 t vgpu_read8 +ffffffff81d55b30 t vgpu_read16 +ffffffff81d55b70 t vgpu_read32 +ffffffff81d55bb0 t vgpu_read64 +ffffffff81d55bf0 t gen5_write8 +ffffffff81d55d00 t gen5_write16 +ffffffff81d55e10 t gen5_write32 +ffffffff81d55f20 t gen5_read8 +ffffffff81d56020 t gen5_read16 +ffffffff81d56120 t gen5_read32 +ffffffff81d56220 t gen5_read64 +ffffffff81d56320 t gen2_write8 +ffffffff81d56420 t gen2_write16 +ffffffff81d56520 t gen2_write32 +ffffffff81d56620 t gen2_read8 +ffffffff81d56710 t gen2_read16 +ffffffff81d56800 t gen2_read32 +ffffffff81d568f0 t gen2_read64 +ffffffff81d569e0 t fwtable_read8 +ffffffff81d56cf0 t fwtable_read16 +ffffffff81d57000 t fwtable_read32 +ffffffff81d57310 t fwtable_read64 +ffffffff81d57620 t fwtable_reg_read_fw_domains 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intel_wakeref_wait_for_idle +ffffffff81d5a4e0 T intel_wakeref_auto_init +ffffffff81d5a570 t wakeref_auto_timeout +ffffffff81d5a630 T intel_wakeref_auto +ffffffff81d5a8a0 T intel_wakeref_auto_fini +ffffffff81d5a970 t __delayed_work_tick +ffffffff81d5b000 T intel_pxp_is_supported +ffffffff81d5b030 T intel_pxp_is_enabled +ffffffff81d5b060 T intel_pxp_is_active +ffffffff81d5b090 T intel_pxp_init +ffffffff81d5b0c0 T intel_pxp_fini +ffffffff81d5b180 T intel_pxp_mark_termination_in_progress +ffffffff81d5b1c0 T intel_pxp_get_backend_timeout_ms +ffffffff81d5b200 T intel_pxp_end +ffffffff81d5b230 T intel_pxp_fini_hw +ffffffff81d5b270 T intel_pxp_get_readiness_status +ffffffff81d5b2a0 T intel_pxp_start +ffffffff81d5b2d0 T intel_pxp_init_hw +ffffffff81d5b310 T intel_pxp_key_check +ffffffff81d5b340 T intel_pxp_invalidate +ffffffff81d5c000 T intel_pxp_huc_load_and_auth +ffffffff81d5d000 T intel_pxp_tee_stream_message +ffffffff81d5d190 T intel_pxp_tee_component_init +ffffffff81d5d460 T intel_pxp_tee_component_fini +ffffffff81d5d4e0 T intel_pxp_tee_cmd_create_arb_session +ffffffff81d5d760 T intel_pxp_tee_end_arb_fw_session +ffffffff81d5da30 t i915_pxp_tee_component_bind +ffffffff81d5dc00 t i915_pxp_tee_component_unbind +ffffffff81d5e000 T intel_dram_detect +ffffffff81d5e4c0 t gen11_get_dram_info +ffffffff81d5e510 t bxt_get_dram_info +ffffffff81d5e860 t skl_get_dram_info +ffffffff81d5ea80 T intel_dram_edram_detect +ffffffff81d5eb10 t icl_pcode_read_mem_global_info +ffffffff81d5ec00 t skl_dram_get_channel_info +ffffffff81d5ede0 t skl_dram_get_dimm_info +ffffffff81d5f000 T intel_gmch_bridge_setup +ffffffff81d5f0e0 t intel_gmch_bridge_release +ffffffff81d5f110 T intel_gmch_bar_setup +ffffffff81d5f340 T intel_gmch_bar_teardown +ffffffff81d5f440 T intel_gmch_vga_set_state +ffffffff81d60000 T intel_detect_pch +ffffffff81d60200 t intel_pch_match +ffffffff81d60250 t intel_pch_type +ffffffff81d60ad0 t intel_virt_detect_pch +ffffffff81d61000 T vlv_iosf_sb_get +ffffffff81d61020 T vlv_iosf_sb_put +ffffffff81d61040 T vlv_punit_read +ffffffff81d610a0 t vlv_sideband_rw +ffffffff81d61270 T vlv_punit_write +ffffffff81d612d0 T vlv_bunit_read +ffffffff81d61330 T vlv_bunit_write +ffffffff81d61390 T vlv_nc_read +ffffffff81d613f0 T vlv_iosf_sb_read +ffffffff81d61450 T vlv_iosf_sb_write +ffffffff81d614a0 T vlv_cck_read +ffffffff81d61500 T vlv_cck_write +ffffffff81d61560 T vlv_ccu_read +ffffffff81d615c0 T vlv_ccu_write +ffffffff81d61620 T vlv_dpio_read +ffffffff81d61700 T vlv_dpio_write +ffffffff81d61770 T vlv_flisdsi_read +ffffffff81d617d0 T vlv_flisdsi_write +ffffffff81d62000 T vlv_suspend_complete +ffffffff81d62d40 T vlv_resume_prepare +ffffffff81d63a90 T vlv_suspend_init +ffffffff81d63b00 T vlv_suspend_cleanup +ffffffff81d63b60 t vlv_wait_for_pw_status +ffffffff81d64000 T atom_execute_table_scratch_unlocked +ffffffff81d640c0 t atom_execute_table_locked +ffffffff81d64470 T atom_execute_table +ffffffff81d64550 T atom_parse +ffffffff81d64750 T atom_destroy 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atombios_set_backlight_level +ffffffff81d70230 T atombios_dig_transmitter_setup +ffffffff81d70250 T radeon_atom_backlight_init +ffffffff81d70480 t radeon_atom_backlight_get_brightness +ffffffff81d704e0 T atombios_dvo_setup +ffffffff81d706d0 T atombios_digital_setup +ffffffff81d709c0 T atombios_get_encoder_mode +ffffffff81d70cd0 T atombios_dig_encoder_setup2 +ffffffff81d71160 T atombios_dig_encoder_setup +ffffffff81d71180 T atombios_dig_transmitter_setup2 +ffffffff81d71bf0 T atombios_set_edp_panel_power +ffffffff81d71d30 T radeon_atom_release_dig_encoder +ffffffff81d71d70 T radeon_atom_pick_dig_encoder +ffffffff81d71fd0 T radeon_atom_encoder_init +ffffffff81d720b0 t atombios_external_encoder_setup +ffffffff81d72370 T radeon_atom_ext_encoder_setup_ddc +ffffffff81d723d0 T radeon_enc_destroy +ffffffff81d724b0 T radeon_add_atom_encoder +ffffffff81d72960 t radeon_atombios_set_dig_info +ffffffff81d729d0 t radeon_atombios_set_dac_info +ffffffff81d72a50 t radeon_atom_backlight_update_status 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btc_skip_blacklist_clocks +ffffffff81d76230 T btc_adjust_clock_combinations +ffffffff81d76360 T btc_apply_voltage_delta_rules +ffffffff81d76490 T btc_program_mgcg_hw_sequence +ffffffff81d765a0 T btc_dpm_enabled +ffffffff81d765b0 T btc_notify_uvd_to_smc +ffffffff81d76640 T btc_reset_to_default +ffffffff81d76690 T btc_read_arb_registers +ffffffff81d76730 T btc_dpm_vblank_too_short +ffffffff81d767b0 T btc_dpm_pre_set_power_state +ffffffff81d77a00 T btc_dpm_set_power_state +ffffffff81d77de0 t btc_set_power_state_conditionally_enable_ulv +ffffffff81d77f60 T btc_dpm_post_set_power_state +ffffffff81d780a0 t btc_update_current_ps +ffffffff81d781b0 T btc_dpm_enable +ffffffff81d792a0 t btc_cg_clock_gating_enable +ffffffff81d793e0 t btc_mg_clock_gating_enable +ffffffff81d79520 t btc_ls_clock_gating_enable +ffffffff81d79660 t btc_init_stutter_mode +ffffffff81d796e0 T btc_dpm_disable +ffffffff81d79a50 T btc_dpm_setup_asic +ffffffff81d79b70 T btc_dpm_init +ffffffff81d79fe0 T btc_dpm_fini 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ci_populate_initial_mc_reg_table +ffffffff81d7fc90 t ci_populate_pm_base +ffffffff81d80020 t ci_dpm_start_smc +ffffffff81d800d0 t ci_enable_vr_hot_gpio_interrupt +ffffffff81d80190 t ci_notify_smc_display_change +ffffffff81d80270 t ci_enable_sclk_control +ffffffff81d802b0 t ci_enable_ulv +ffffffff81d80430 t ci_enable_ds_master_switch +ffffffff81d80650 t ci_start_dpm +ffffffff81d808a0 t ci_enable_didt +ffffffff81d80ba0 t ci_enable_smc_cac +ffffffff81d80d50 t ci_enable_power_containment +ffffffff81d81230 t ci_power_control_set_level +ffffffff81d81360 t ci_enable_auto_throttle_source +ffffffff81d81450 t ci_enable_thermal_based_sclk_dpm +ffffffff81d815d0 t ci_thermal_start_thermal_controller +ffffffff81d81930 T ci_dpm_late_enable +ffffffff81d819f0 T ci_dpm_disable +ffffffff81d82290 T ci_dpm_set_power_state +ffffffff81d82fe0 t ci_update_sclk_t +ffffffff81d83060 t ci_update_and_upload_mc_reg_table +ffffffff81d832e0 t ci_unfreeze_sclk_mclk_dpm +ffffffff81d834c0 t ci_notify_link_speed_change_after_state_change +ffffffff81d83600 T ci_dpm_display_configuration_changed +ffffffff81d837f0 T ci_dpm_fini +ffffffff81d838c0 T ci_dpm_init +ffffffff81d84860 t ci_initialize_powertune_defaults +ffffffff81d84950 t ci_get_leakage_voltages +ffffffff81d84b30 t ci_patch_dependency_tables_with_leakage +ffffffff81d851a0 t ci_set_private_data_variables_based_on_pptable +ffffffff81d852b0 T ci_dpm_debugfs_print_current_performance_level +ffffffff81d85410 T ci_dpm_print_power_state +ffffffff81d854f0 T ci_dpm_get_current_sclk +ffffffff81d855d0 T ci_dpm_get_current_mclk +ffffffff81d856b0 T ci_dpm_get_sclk +ffffffff81d85700 T ci_dpm_get_mclk +ffffffff81d85750 t ci_set_valid_flag +ffffffff81d857f0 t ci_populate_all_graphic_levels +ffffffff81d85db0 t ci_populate_all_memory_levels +ffffffff81d866d0 t ci_populate_smc_vce_level +ffffffff81d867f0 t ci_populate_smc_acp_level +ffffffff81d868f0 t ci_populate_smc_samu_level +ffffffff81d869f0 t ci_do_program_memory_timing_parameters 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cik_pciep_rreg +ffffffff81d89320 T cik_pciep_wreg +ffffffff81d89390 T cik_get_xclk +ffffffff81d89410 T cik_mm_rdoorbell +ffffffff81d89480 T cik_mm_wdoorbell +ffffffff81d894d0 T ci_mc_load_microcode +ffffffff81d89840 T cik_ring_test +ffffffff81d89b60 T cik_fence_gfx_ring_emit +ffffffff81d89fb0 T cik_fence_compute_ring_emit +ffffffff81d8a260 T cik_semaphore_ring_emit +ffffffff81d8a450 T cik_copy_cpdma +ffffffff81d8a940 T cik_ring_ib_execute +ffffffff81d8af50 T cik_ib_test +ffffffff81d8b2e0 T cik_gfx_get_rptr +ffffffff81d8b340 T cik_gfx_get_wptr +ffffffff81d8b380 T cik_gfx_set_wptr +ffffffff81d8b3c0 T cik_compute_get_rptr +ffffffff81d8b4b0 T cik_compute_get_wptr +ffffffff81d8b5a0 T cik_compute_set_wptr +ffffffff81d8b620 T cik_gpu_check_soft_reset +ffffffff81d8b7a0 T cik_asic_reset +ffffffff81d8bcf0 t cik_gpu_pci_config_reset +ffffffff81d8c560 T cik_gfx_is_lockup +ffffffff81d8c5e0 T cik_pcie_gart_tlb_flush +ffffffff81d8c630 T cik_ib_parse +ffffffff81d8c660 T cik_vm_init +ffffffff81d8c6c0 T cik_vm_fini +ffffffff81d8c6f0 T cik_vm_flush +ffffffff81d8d4f0 T cik_enter_rlc_safe_mode +ffffffff81d8d600 T cik_exit_rlc_safe_mode +ffffffff81d8d640 T cik_update_cg +ffffffff81d8db90 t cik_enable_mgcg +ffffffff81d8e0c0 t cik_enable_cgcg +ffffffff81d8e450 T cik_init_cp_pg_table +ffffffff81d8e6e0 T cik_get_csb_size +ffffffff81d8e770 T cik_get_csb_buffer +ffffffff81d8e900 T cik_irq_set +ffffffff81d8f780 t cik_disable_interrupt_state +ffffffff81d8fc90 T cik_irq_process +ffffffff81d916e0 t cik_irq_ack +ffffffff81d920c0 T cik_resume +ffffffff81d92180 t cik_init_golden_registers +ffffffff81d923b0 t cik_startup +ffffffff81d955d0 T cik_suspend +ffffffff81d95a80 T cik_init +ffffffff81d96100 t cik_init_microcode +ffffffff81d97140 t cik_uvd_init +ffffffff81d97200 t cik_vce_init +ffffffff81d972e0 t cik_cp_fini +ffffffff81d97370 t cik_irq_fini +ffffffff81d974a0 t cik_mec_fini +ffffffff81d97580 t cik_pcie_gart_fini +ffffffff81d97690 T cik_fini +ffffffff81d97ac0 T dce8_program_fmt +ffffffff81d97c10 T dce8_bandwidth_update +ffffffff81d988c0 T cik_get_gpu_clock_counter +ffffffff81d98990 T cik_set_uvd_clocks +ffffffff81d98a10 t cik_set_uvd_clock +ffffffff81d98bf0 T cik_set_vce_clocks +ffffffff81d98f10 t cik_wait_for_rlc_serdes +ffffffff81d99100 t cik_mec_init +ffffffff81d99340 t cik_uvd_start +ffffffff81d99450 t cik_vce_start +ffffffff81d995a0 t cik_irq_init +ffffffff81d9a1c0 t cik_cp_resume +ffffffff81d9bb50 t cik_uvd_resume +ffffffff81d9bc30 t cik_vce_resume +ffffffff81d9bd40 t pcie_capability_set_word +ffffffff81d9be70 t pcie_capability_read_word +ffffffff81d9bf20 t pcie_capability_clear_and_set_word +ffffffff81d9c060 t pcie_capability_write_word +ffffffff81d9c130 t cik_get_cu_active_bitmap +ffffffff81d9c2c0 t radeon_bo_reserve +ffffffff81d9c460 t radeon_bo_unreserve +ffffffff81d9c570 t cik_update_gfx_pg +ffffffff81d9c720 t cik_compute_stop +ffffffff81d9c8a0 t cik_cp_compute_fini +ffffffff81d9cad0 t request_firmware +ffffffff81d9cb80 t release_firmware +ffffffff81d9cbc0 t dce8_latency_watermark +ffffffff81d9d000 T cik_sdma_get_rptr +ffffffff81d9d070 T cik_sdma_get_wptr +ffffffff81d9d0c0 T cik_sdma_set_wptr +ffffffff81d9d110 T cik_sdma_ring_ib_execute +ffffffff81d9d560 T cik_sdma_fence_ring_emit +ffffffff81d9d760 t cik_sdma_hdp_flush_ring_emit +ffffffff81d9d9d0 T cik_sdma_semaphore_ring_emit +ffffffff81d9db00 T cik_sdma_enable +ffffffff81d9dcf0 T cik_sdma_resume +ffffffff81d9e1f0 T cik_sdma_fini +ffffffff81d9e240 T cik_copy_dma +ffffffff81d9e6e0 T cik_sdma_ring_test +ffffffff81d9e9e0 T cik_sdma_ib_test +ffffffff81d9ec80 T cik_sdma_is_lockup +ffffffff81d9ed10 T cik_sdma_vm_copy_pages +ffffffff81d9ee20 T cik_sdma_vm_write_pages +ffffffff81d9efa0 T cik_sdma_vm_set_pages +ffffffff81d9f120 T cik_sdma_vm_pad_ib +ffffffff81d9f170 T cik_dma_vm_flush +ffffffff81da0000 T cypress_enable_spread_spectrum +ffffffff81da0140 T cypress_start_dpm +ffffffff81da0190 T cypress_enable_sclk_control +ffffffff81da01f0 T cypress_enable_mclk_control +ffffffff81da0250 T cypress_notify_smc_display_change +ffffffff81da02a0 T cypress_program_response_times +ffffffff81da0390 T cypress_advertise_gen2_capability +ffffffff81da04a0 T cypress_notify_link_speed_change_after_state_change +ffffffff81da0590 T cypress_notify_link_speed_change_before_state_change +ffffffff81da0670 T cypress_get_strobe_mode_settings +ffffffff81da0780 T cypress_get_mclk_frequency_ratio +ffffffff81da0830 T cypress_map_clkf_to_ibias +ffffffff81da08f0 T cypress_convert_power_level_to_smc +ffffffff81da0d10 t cypress_populate_mclk_value +ffffffff81da1150 T cypress_upload_sw_state +ffffffff81da1330 T cypress_upload_mc_reg_table +ffffffff81da1410 t cypress_convert_mc_reg_table_to_smc +ffffffff81da1860 T cypress_calculate_burst_time +ffffffff81da18f0 T cypress_program_memory_timing_parameters +ffffffff81da1ac0 T cypress_populate_smc_initial_state +ffffffff81da1eb0 T cypress_populate_smc_acpi_state +ffffffff81da2260 T cypress_construct_voltage_tables +ffffffff81da2420 T cypress_populate_smc_voltage_tables +ffffffff81da2560 T cypress_get_mvdd_configuration +ffffffff81da2650 T cypress_populate_mc_reg_table +ffffffff81da29e0 T cypress_get_table_locations +ffffffff81da2af0 T cypress_enable_display_gap +ffffffff81da2b50 T cypress_dpm_setup_asic +ffffffff81da2cb0 T cypress_dpm_enable +ffffffff81da3960 t cypress_force_mc_use_s1 +ffffffff81da3c30 t cypress_gfx_clock_gating_enable +ffffffff81da4010 t cypress_mg_clock_gating_enable +ffffffff81da42f0 T cypress_dpm_disable +ffffffff81da4580 T cypress_dpm_set_power_state +ffffffff81da4880 T cypress_dpm_display_configuration_changed +ffffffff81da4960 T cypress_dpm_init +ffffffff81da4c30 T cypress_dpm_fini +ffffffff81da4cd0 T cypress_dpm_vblank_too_short +ffffffff81da4d50 t cypress_wait_for_mc_sequencer +ffffffff81da5000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81da5080 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81da5100 T dce3_2_afmt_write_sad_regs +ffffffff81da5200 T dce3_2_audio_set_dto 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sumo_set_uvd_clock +ffffffff81da7780 T evergreen_set_uvd_clocks +ffffffff81da7e40 T evergreen_fix_pci_max_read_req_size +ffffffff81da8040 T dce4_program_fmt +ffffffff81da8170 T dce4_wait_for_vblank +ffffffff81da8430 T evergreen_page_flip +ffffffff81da85e0 T evergreen_page_flip_pending +ffffffff81da8660 T evergreen_get_temp +ffffffff81da8730 T sumo_get_temp +ffffffff81da8780 T sumo_pm_init_profile +ffffffff81da88d0 T btc_pm_init_profile +ffffffff81da89f0 T evergreen_pm_misc +ffffffff81da8bb0 T evergreen_pm_prepare +ffffffff81da8cd0 T evergreen_pm_finish +ffffffff81da8df0 T evergreen_hpd_sense +ffffffff81da8e70 T evergreen_hpd_set_polarity +ffffffff81da8fc0 T evergreen_hpd_init +ffffffff81da90a0 T evergreen_hpd_fini +ffffffff81da9150 T evergreen_get_number_of_dram_channels +ffffffff81da91a0 T evergreen_bandwidth_update +ffffffff81da9380 t evergreen_line_buffer_adjust +ffffffff81da95a0 t evergreen_program_watermarks +ffffffff81daa0a0 T evergreen_mc_wait_for_idle +ffffffff81daa140 T evergreen_pcie_gart_tlb_flush +ffffffff81daa220 T evergreen_mc_stop +ffffffff81daae80 T evergreen_mc_resume +ffffffff81dab650 T evergreen_mc_program +ffffffff81daba70 T evergreen_ring_ib_execute +ffffffff81dabf70 T evergreen_mc_init +ffffffff81dac0d0 T evergreen_print_gpu_status_regs +ffffffff81dac120 T evergreen_is_display_hung +ffffffff81dac350 T evergreen_gpu_check_soft_reset +ffffffff81dac4c0 T evergreen_gpu_pci_config_reset +ffffffff81dac690 T evergreen_asic_reset +ffffffff81daca80 T evergreen_gfx_is_lockup +ffffffff81dacb00 T sumo_rlc_fini +ffffffff81dacd40 t radeon_bo_reserve +ffffffff81dacee0 t radeon_bo_unreserve +ffffffff81dacff0 T sumo_rlc_init +ffffffff81dad8e0 T evergreen_rlc_resume +ffffffff81dadc50 T evergreen_get_vblank_counter +ffffffff81dadcc0 T evergreen_disable_interrupt_state +ffffffff81dadfc0 T evergreen_irq_set +ffffffff81dae660 T evergreen_irq_suspend +ffffffff81dae6d0 T evergreen_irq_process +ffffffff81daf370 t evergreen_irq_ack +ffffffff81dafaa0 T evergreen_resume +ffffffff81dafbb0 t evergreen_init_golden_registers +ffffffff81dafe20 t evergreen_startup +ffffffff81db1870 T evergreen_suspend +ffffffff81db1a80 T evergreen_init +ffffffff81db1fc0 t evergreen_pcie_gart_fini +ffffffff81db20f0 T evergreen_fini +ffffffff81db2390 T evergreen_pcie_gen2_enable +ffffffff81db2620 T evergreen_program_aspm +ffffffff81db2e10 t evergreen_latency_watermark +ffffffff81db3010 t evergreen_uvd_start +ffffffff81db30f0 t evergreen_cp_load_microcode +ffffffff81db3250 t evergreen_cp_resume +ffffffff81db4070 t evergreen_uvd_resume +ffffffff81db5000 T evergreen_cs_parse +ffffffff81db7a40 T evergreen_dma_cs_parse +ffffffff81db8c40 T evergreen_ib_parse +ffffffff81db9110 T evergreen_dma_ib_parse +ffffffff81db92f0 t evergreen_cs_track_check +ffffffff81dba460 t evergreen_cs_handle_reg +ffffffff81dbc3e0 t evergreen_surface_value_conv_check +ffffffff81dbc6d0 t evergreen_surface_check +ffffffff81dbcb80 t evergreen_cs_track_validate_htile +ffffffff81dbce40 t evergreen_vm_reg_valid +ffffffff81dbe000 T evergreen_dma_fence_ring_emit +ffffffff81dbe2f0 T evergreen_dma_ring_ib_execute +ffffffff81dbe680 T evergreen_copy_dma +ffffffff81dbeaa0 T evergreen_dma_is_lockup +ffffffff81dbf000 T dce4_audio_enable +ffffffff81dbf080 T evergreen_hdmi_update_acr +ffffffff81dbf2d0 T dce4_afmt_write_latency_fields +ffffffff81dbf340 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81dbf3c0 T dce4_afmt_dp_write_speaker_allocation +ffffffff81dbf440 T evergreen_hdmi_write_sad_regs +ffffffff81dbf540 T evergreen_set_avi_packet +ffffffff81dbf700 T dce4_hdmi_audio_set_dto +ffffffff81dbf7e0 T dce4_dp_audio_set_dto +ffffffff81dbf8e0 T dce4_set_vbi_packet +ffffffff81dbf950 T dce4_hdmi_set_color_depth +ffffffff81dbfac0 T dce4_set_audio_packet +ffffffff81dbfd10 T dce4_set_mute +ffffffff81dbfe20 T evergreen_hdmi_enable +ffffffff81dc01b0 T evergreen_dp_enable +ffffffff81dc1000 T kv_dpm_enable_bapm +ffffffff81dc1070 T kv_dpm_enable +ffffffff81dc2060 t kv_populate_vce_table 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+ffffffff81dc55f0 T kv_dpm_get_current_sclk +ffffffff81dc5660 T kv_dpm_get_current_mclk +ffffffff81dc5690 T kv_dpm_print_power_state +ffffffff81dc5760 T kv_dpm_fini +ffffffff81dc5810 T kv_dpm_display_configuration_changed +ffffffff81dc5840 T kv_dpm_get_sclk +ffffffff81dc5890 T kv_dpm_get_mclk +ffffffff81dc6000 T kv_notify_message_to_smu +ffffffff81dc60c0 T kv_dpm_get_enable_mask +ffffffff81dc61b0 T kv_send_msg_to_smc_with_parameter +ffffffff81dc6280 T kv_read_smc_sram_dword +ffffffff81dc6310 T kv_smc_dpm_enable +ffffffff81dc6450 T kv_smc_bapm_enable +ffffffff81dc6590 T kv_copy_bytes_to_smc +ffffffff81dc7000 T tn_smc_rreg +ffffffff81dc7090 T tn_smc_wreg +ffffffff81dc7100 T ni_mc_load_microcode +ffffffff81dc72f0 T ni_init_microcode +ffffffff81dc78c0 t request_firmware +ffffffff81dc7970 t release_firmware +ffffffff81dc79b0 T cayman_get_allowed_info_register +ffffffff81dc7a40 T tn_get_temp +ffffffff81dc7ae0 T cayman_pcie_gart_tlb_flush +ffffffff81dc7b30 T cayman_cp_int_cntl_setup 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ni_dpm_setup_asic +ffffffff81dcf880 T ni_update_current_ps +ffffffff81dcf950 T ni_update_requested_ps +ffffffff81dcfa20 T ni_dpm_enable +ffffffff81dd0a20 t ni_init_smc_table +ffffffff81dd1450 t ni_init_smc_spll_table +ffffffff81dd15e0 t ni_init_arb_table_index +ffffffff81dd1690 t ni_populate_mc_reg_table +ffffffff81dd1bd0 t ni_initialize_smc_cac_tables +ffffffff81dd2ea0 t ni_initialize_hardware_cac_manager +ffffffff81dd34d0 t ni_populate_smc_tdp_limits +ffffffff81dd36b0 t ni_program_response_times +ffffffff81dd3800 T ni_dpm_disable +ffffffff81dd3c60 t ni_enable_power_containment +ffffffff81dd3d40 t ni_enable_smc_cac +ffffffff81dd3ea0 T ni_dpm_pre_set_power_state +ffffffff81dd4510 T ni_dpm_set_power_state +ffffffff81dd4890 t ni_upload_sw_state +ffffffff81dd5550 t ni_upload_mc_reg_table +ffffffff81dd57d0 t ni_power_control_set_level +ffffffff81dd58d0 T ni_dpm_post_set_power_state +ffffffff81dd59c0 T ni_dpm_init +ffffffff81dd6420 T ni_dpm_fini +ffffffff81dd64f0 T ni_dpm_print_power_state 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rv370_pcie_gart_enable +ffffffff81de4950 T rv370_pcie_gart_disable +ffffffff81de4b40 T rv370_pcie_gart_fini +ffffffff81de4b80 T r300_fence_ring_emit +ffffffff81de5190 T r300_ring_start +ffffffff81de5c30 T r300_mc_wait_for_idle +ffffffff81de5cd0 T r300_asic_reset +ffffffff81de5f30 T r300_mc_init +ffffffff81de6000 T rv370_set_pcie_lanes +ffffffff81de6220 T rv370_get_pcie_lanes +ffffffff81de62e0 T r300_cs_parse +ffffffff81de66b0 t r300_packet0_check +ffffffff81de7610 T r300_set_reg_safe +ffffffff81de7650 T r300_mc_program +ffffffff81de7800 T r300_clock_startup +ffffffff81de7890 T r300_resume +ffffffff81de7ab0 t r300_startup +ffffffff81de7ea0 T r300_suspend +ffffffff81de7f50 T r300_fini +ffffffff81de80b0 T r300_init +ffffffff81de9000 T r420_pm_init_profile +ffffffff81de90f0 T r420_pipes_init +ffffffff81de92f0 T r420_mc_rreg +ffffffff81de9380 T r420_mc_wreg +ffffffff81de9400 T r420_resume +ffffffff81de9620 t r420_startup +ffffffff81de98b0 T r420_suspend +ffffffff81de9aa0 T r420_fini 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r600_pcie_gart_init +ffffffff81dedd30 T r600_mc_wait_for_idle +ffffffff81deddd0 T rs780_mc_rreg +ffffffff81dede80 T rs780_mc_wreg +ffffffff81dedf10 T r600_vram_scratch_init +ffffffff81dee030 t radeon_bo_reserve +ffffffff81dee1d0 t radeon_bo_unreserve +ffffffff81dee2e0 T r600_vram_scratch_fini +ffffffff81dee370 T r600_set_bios_scratch_engine_hung +ffffffff81dee3c0 T r600_gpu_check_soft_reset +ffffffff81dee790 T r600_asic_reset +ffffffff81deebc0 t r600_gpu_pci_config_reset +ffffffff81deee20 T r600_gfx_is_lockup +ffffffff81deeea0 T r6xx_remap_render_backend +ffffffff81def070 T r600_count_pipe_bits +ffffffff81def0e0 T r600_pciep_rreg +ffffffff81def170 T r600_pciep_wreg +ffffffff81def1e0 T r600_cp_stop +ffffffff81def260 T r600_init_microcode +ffffffff81def810 t request_firmware +ffffffff81def8c0 t release_firmware +ffffffff81def900 T r600_gfx_get_rptr +ffffffff81def960 T r600_gfx_get_wptr +ffffffff81def9a0 T r600_gfx_set_wptr +ffffffff81def9e0 T r600_cp_start +ffffffff81defdb0 T r600_cp_resume +ffffffff81df01d0 T r600_ring_init +ffffffff81df0290 T r600_cp_fini +ffffffff81df0320 T r600_scratch_init +ffffffff81df0390 T r600_ring_test +ffffffff81df06b0 T r600_fence_ring_emit +ffffffff81df1020 T r600_semaphore_ring_emit +ffffffff81df1240 T r600_copy_cpdma +ffffffff81df18b0 T r600_set_surface_reg +ffffffff81df18e0 T r600_clear_surface_reg +ffffffff81df1910 T r600_vga_set_state +ffffffff81df1970 T r600_resume +ffffffff81df1a20 t r600_startup +ffffffff81df3930 T r600_suspend +ffffffff81df3af0 T r600_irq_suspend +ffffffff81df3bd0 t r600_pcie_gart_disable +ffffffff81df3dd0 T r600_init +ffffffff81df46f0 T r600_ih_ring_init +ffffffff81df4760 T r600_irq_fini +ffffffff81df48e0 t r600_pcie_gart_fini +ffffffff81df4920 T r600_fini +ffffffff81df4b70 T r600_ring_ib_execute +ffffffff81df5060 T r600_ib_test +ffffffff81df5370 T r600_ih_ring_alloc +ffffffff81df54c0 T r600_ih_ring_fini +ffffffff81df5570 T r600_rlc_stop +ffffffff81df5780 T r600_disable_interrupts +ffffffff81df5830 T r600_irq_init +ffffffff81df5cd0 t r600_disable_interrupt_state +ffffffff81df5fd0 T r600_irq_disable +ffffffff81df60a0 T r600_irq_set +ffffffff81df68a0 t r600_irq_ack +ffffffff81df6dd0 T r600_irq_process +ffffffff81df7b40 T r600_mmio_hdp_flush +ffffffff81df7bc0 T r600_set_pcie_lanes +ffffffff81df7d00 T r600_get_pcie_lanes +ffffffff81df7df0 T r600_get_gpu_clock_counter +ffffffff81df7ea0 t r600_cp_load_microcode +ffffffff81df8200 t r600_uvd_resume +ffffffff81df9000 T r600_fmt_is_valid_color +ffffffff81df9040 T r600_fmt_is_valid_texture +ffffffff81df9090 T r600_fmt_get_blocksize +ffffffff81df90d0 T r600_fmt_get_nblocksx +ffffffff81df9120 T r600_fmt_get_nblocksy +ffffffff81df9180 T r600_cs_common_vline_parse +ffffffff81df9470 T r600_mip_minify +ffffffff81df94d0 T r600_cs_parse +ffffffff81dfb540 T r600_dma_cs_next_reloc +ffffffff81dfb5d0 T r600_dma_cs_parse +ffffffff81dfbcb0 t r600_cs_track_check +ffffffff81dfce90 t r600_cs_check_reg +ffffffff81dfde70 t r600_is_safe_reg +ffffffff81dfdf20 t r600_texture_size +ffffffff81dff000 T r600_dma_get_rptr +ffffffff81dff060 T r600_dma_get_wptr +ffffffff81dff0a0 T r600_dma_set_wptr +ffffffff81dff0e0 T r600_dma_stop +ffffffff81dff170 T r600_dma_resume +ffffffff81dff390 T r600_dma_fini +ffffffff81dff410 T r600_dma_is_lockup +ffffffff81dff490 T r600_dma_ring_test +ffffffff81dff750 T r600_dma_fence_ring_emit +ffffffff81dff960 T r600_dma_semaphore_ring_emit +ffffffff81dffaa0 T r600_dma_ib_test +ffffffff81dffd10 T r600_dma_ring_ib_execute +ffffffff81e000a0 T r600_copy_dma +ffffffff81e01000 T r600_dpm_print_class_info +ffffffff81e01340 T r600_dpm_print_cap_info +ffffffff81e013e0 T r600_dpm_print_ps_status +ffffffff81e014a0 T r600_dpm_get_vblank_time +ffffffff81e01560 T r600_dpm_get_vrefresh +ffffffff81e015f0 T r600_calculate_u_and_p +ffffffff81e01670 T r600_calculate_at +ffffffff81e01720 T r600_gfx_clockgating_enable +ffffffff81e01830 T r600_dynamicpm_enable +ffffffff81e01880 T r600_enable_thermal_protection +ffffffff81e018e0 T r600_enable_acpi_pm +ffffffff81e01930 T r600_enable_dynamic_pcie_gen2 +ffffffff81e01980 T r600_dynamicpm_enabled +ffffffff81e019c0 T r600_enable_sclk_control +ffffffff81e01a20 T r600_enable_mclk_control +ffffffff81e01a80 T r600_enable_spll_bypass +ffffffff81e01ad0 T r600_wait_for_spll_change +ffffffff81e01b60 T r600_set_bsp +ffffffff81e01ba0 T r600_set_at +ffffffff81e01c00 T r600_set_tc +ffffffff81e01c60 T r600_select_td +ffffffff81e01d10 T r600_set_vrc +ffffffff81e01d50 T r600_set_tpu +ffffffff81e01db0 T r600_set_tpc +ffffffff81e01e10 T r600_set_sstu +ffffffff81e01e70 T r600_set_sst +ffffffff81e01ec0 T r600_set_git +ffffffff81e01f10 T r600_set_fctu +ffffffff81e01f70 T r600_set_fct +ffffffff81e01fc0 T r600_set_ctxcgtt3d_rphc +ffffffff81e02020 T r600_set_ctxcgtt3d_rsdc +ffffffff81e02080 T r600_set_vddc3d_oorsu +ffffffff81e020e0 T r600_set_vddc3d_oorphc +ffffffff81e02140 T r600_set_vddc3d_oorsdc +ffffffff81e021a0 T r600_set_mpll_lock_time +ffffffff81e021f0 T r600_set_mpll_reset_time +ffffffff81e02240 T r600_engine_clock_entry_enable +ffffffff81e02340 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81e02440 T r600_engine_clock_entry_enable_post_divider +ffffffff81e02540 T r600_engine_clock_entry_set_post_divider +ffffffff81e02610 T r600_engine_clock_entry_set_reference_divider +ffffffff81e026e0 T r600_engine_clock_entry_set_feedback_divider +ffffffff81e027b0 T r600_engine_clock_entry_set_step_time +ffffffff81e02880 T r600_vid_rt_set_ssu +ffffffff81e028e0 T r600_vid_rt_set_vru +ffffffff81e02940 T r600_vid_rt_set_vrt +ffffffff81e029a0 T r600_voltage_control_enable_pins +ffffffff81e029f0 T r600_voltage_control_program_voltages +ffffffff81e02a80 T r600_voltage_control_deactivate_static_control +ffffffff81e02b10 T r600_power_level_enable +ffffffff81e02b80 T r600_power_level_set_voltage_index +ffffffff81e02bf0 T r600_power_level_set_mem_clock_index +ffffffff81e02c50 T r600_power_level_set_eng_clock_index +ffffffff81e02cc0 T r600_power_level_set_watermark_id +ffffffff81e02d30 T r600_power_level_set_pcie_gen2 +ffffffff81e02d90 T r600_power_level_get_current_index +ffffffff81e02dd0 T r600_power_level_get_target_index +ffffffff81e02e10 T r600_power_level_set_enter_index +ffffffff81e02e70 T r600_wait_for_power_level_unequal +ffffffff81e02f70 T r600_wait_for_power_level +ffffffff81e03070 T r600_start_dpm +ffffffff81e03360 T r600_stop_dpm +ffffffff81e033b0 T r600_dpm_pre_set_power_state +ffffffff81e033e0 T r600_dpm_post_set_power_state +ffffffff81e03410 T r600_is_uvd_state +ffffffff81e03450 T r600_is_internal_thermal_sensor +ffffffff81e03490 T r600_dpm_late_enable +ffffffff81e035a0 T r600_get_platform_caps +ffffffff81e03640 T r600_parse_extended_power_table +ffffffff81e04490 T r600_free_extended_power_table +ffffffff81e045f0 T r600_get_pcie_gen_support +ffffffff81e04640 T r600_get_pcie_lane_support +ffffffff81e046a0 T r600_encode_pci_lane_width +ffffffff81e05000 T r600_audio_update_hdmi +ffffffff81e05180 t r600_audio_status +ffffffff81e052a0 T r600_hdmi_buffer_status_changed +ffffffff81e05350 T r600_hdmi_update_audio_settings +ffffffff81e057c0 T r600_audio_enable +ffffffff81e05840 T r600_audio_get_pin +ffffffff81e05870 T r600_hdmi_update_acr +ffffffff81e05c90 T r600_set_avi_packet +ffffffff81e05ed0 T r600_hdmi_audio_workaround +ffffffff81e05fa0 T r600_hdmi_audio_set_dto +ffffffff81e06060 T r600_set_vbi_packet +ffffffff81e06120 T r600_set_audio_packet +ffffffff81e06460 T r600_set_mute +ffffffff81e06570 T r600_hdmi_enable +ffffffff81e07000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81e07040 T radeon_acpi_pcie_notify_device_ready +ffffffff81e07170 T radeon_acpi_pcie_performance_request +ffffffff81e07570 T radeon_acpi_init +ffffffff81e07de0 t radeon_acpi_event +ffffffff81e08160 T radeon_acpi_fini +ffffffff81e09000 T radeon_agp_head_init +ffffffff81e09050 T radeon_agp_init +ffffffff81e090b0 T radeon_agp_resume +ffffffff81e09150 T radeon_agp_fini +ffffffff81e091a0 T radeon_agp_suspend +ffffffff81e0a000 T radeon_agp_disable +ffffffff81e0a130 T radeon_asic_init +ffffffff81e0a900 t radeon_invalid_rreg +ffffffff81e0a940 t radeon_invalid_wreg +ffffffff81e0a990 t radeon_invalid_get_allowed_info_register +ffffffff81e0b000 T radeon_atombios_i2c_init +ffffffff81e0b3b0 T radeon_atombios_lookup_gpio +ffffffff81e0b4c0 T radeon_get_atom_connector_info_from_object_table +ffffffff81e0be70 t radeon_lookup_i2c_gpio +ffffffff81e0c160 t radeon_atom_apply_quirks +ffffffff81e0c590 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81e0caf0 T radeon_atom_get_clock_info +ffffffff81e0cef0 T radeon_atombios_sideport_present +ffffffff81e0cfb0 T radeon_atombios_get_tmds_info +ffffffff81e0d100 T radeon_atombios_get_ppll_ss_info +ffffffff81e0d230 T radeon_atombios_get_asic_ss_info +ffffffff81e0d510 t radeon_atombios_get_igp_ss_overrides +ffffffff81e0d630 T radeon_atombios_get_lvds_info +ffffffff81e0d9d0 T radeon_atombios_get_primary_dac_info +ffffffff81e0daa0 T radeon_atom_get_tv_timings +ffffffff81e0dcf0 T radeon_atombios_get_tv_info +ffffffff81e0ddb0 T radeon_atombios_get_tv_dac_info +ffffffff81e0ded0 T radeon_atombios_get_default_voltages +ffffffff81e0df90 T radeon_atombios_get_power_modes +ffffffff81e0f0f0 T radeon_atom_get_clock_dividers +ffffffff81e0f410 T radeon_atom_get_memory_pll_dividers +ffffffff81e0f570 T radeon_atom_set_clock_gating +ffffffff81e0f5d0 T radeon_atom_get_engine_clock +ffffffff81e0f620 T radeon_atom_get_memory_clock +ffffffff81e0f670 T radeon_atom_set_engine_clock +ffffffff81e0f6d0 T radeon_atom_set_memory_clock +ffffffff81e0f730 T radeon_atom_set_engine_dram_timings +ffffffff81e0f7b0 T radeon_atom_update_memory_dll +ffffffff81e0f800 T radeon_atom_set_ac_timing +ffffffff81e0f860 T radeon_atom_set_voltage +ffffffff81e0f940 T radeon_atom_get_max_vddc +ffffffff81e0fa30 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81e0fb20 T radeon_atom_get_leakage_id_from_vbios +ffffffff81e0fbf0 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81e0fe10 T radeon_atom_get_voltage_evv +ffffffff81e0fed0 T radeon_atom_get_voltage_gpio_settings +ffffffff81e0fff0 T radeon_atom_is_voltage_gpio +ffffffff81e101a0 T radeon_atom_get_svi2_info +ffffffff81e10290 T radeon_atom_get_max_voltage +ffffffff81e10420 T radeon_atom_get_min_voltage +ffffffff81e10580 T radeon_atom_get_voltage_step +ffffffff81e106a0 T radeon_atom_round_to_true_voltage +ffffffff81e10820 T radeon_atom_get_voltage_table +ffffffff81e10ac0 T radeon_atom_get_memory_info +ffffffff81e10c80 T radeon_atom_get_mclk_range_table +ffffffff81e10ed0 T radeon_atom_init_mc_reg_table +ffffffff81e11160 T radeon_atom_initialize_bios_scratch_regs +ffffffff81e11230 T radeon_save_bios_scratch_regs +ffffffff81e11310 T radeon_restore_bios_scratch_regs +ffffffff81e113f0 T radeon_atom_output_lock +ffffffff81e11480 T radeon_atombios_connected_scratch_regs +ffffffff81e11ce0 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81e11e30 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81e12060 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81e12240 t radeon_atombios_add_pplib_thermal_controller +ffffffff81e126c0 t radeon_atombios_parse_pplib_clock_info +ffffffff81e12a80 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81e13000 T radeon_audio_init +ffffffff81e13200 t radeon_audio_enable +ffffffff81e13360 T radeon_audio_endpoint_rreg +ffffffff81e133a0 T radeon_audio_endpoint_wreg +ffffffff81e133e0 T radeon_audio_get_pin +ffffffff81e13430 T radeon_audio_detect +ffffffff81e135d0 T radeon_audio_fini +ffffffff81e13660 T radeon_audio_mode_set +ffffffff81e136b0 T radeon_audio_dpms +ffffffff81e13700 T radeon_audio_decode_dfs_div +ffffffff81e13760 T radeon_audio_component_init +ffffffff81e137d0 T radeon_audio_component_fini +ffffffff81e13820 t radeon_audio_hdmi_mode_set +ffffffff81e13f80 t radeon_audio_write_speaker_allocation +ffffffff81e14060 t radeon_audio_write_sad_regs +ffffffff81e14160 t radeon_audio_set_avi_packet +ffffffff81e142c0 t radeon_audio_dp_mode_set +ffffffff81e14470 t radeon_audio_rreg +ffffffff81e144c0 t radeon_audio_wreg +ffffffff81e15000 T radeon_benchmark +ffffffff81e15c80 t radeon_benchmark_move +ffffffff81e15ff0 t radeon_bo_reserve +ffffffff81e16190 t radeon_bo_unreserve +ffffffff81e162a0 t radeon_benchmark_do_move +ffffffff81e17000 T radeon_get_bios +ffffffff81e180b0 t igp_read_bios_from_vram +ffffffff81e18200 t radeon_read_bios +ffffffff81e19000 T radeon_legacy_get_engine_clock +ffffffff81e190f0 T radeon_legacy_get_memory_clock +ffffffff81e191e0 T radeon_get_clock_info +ffffffff81e197f0 T radeon_legacy_set_engine_clock +ffffffff81e19c30 T radeon_legacy_set_clock_gating +ffffffff81e1c000 T radeon_combios_check_hardcoded_edid +ffffffff81e1c120 t combios_get_table_offset +ffffffff81e1c710 T radeon_bios_get_hardcoded_edid +ffffffff81e1c7b0 T radeon_combios_i2c_init +ffffffff81e1cea0 t combios_setup_i2c_bus +ffffffff81e1d190 t radeon_combios_get_i2c_info_from_table +ffffffff81e1d3e0 T radeon_combios_get_clock_info +ffffffff81e1d5d0 T radeon_combios_sideport_present +ffffffff81e1d650 T radeon_combios_get_primary_dac_info +ffffffff81e1d7a0 T radeon_combios_get_tv_info +ffffffff81e1d8b0 T radeon_combios_get_tv_dac_info +ffffffff81e1db70 T radeon_combios_get_lvds_info +ffffffff81e1e220 T radeon_legacy_get_tmds_info_from_table +ffffffff81e1e2f0 T radeon_legacy_get_tmds_info_from_combios +ffffffff81e1e520 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81e1e760 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81e1ead0 T radeon_get_legacy_connector_info_from_table +ffffffff81e21060 T radeon_get_legacy_connector_info_from_bios +ffffffff81e21da0 T radeon_combios_get_power_modes +ffffffff81e224b0 T radeon_external_tmds_setup +ffffffff81e225a0 T radeon_combios_external_tmds_setup +ffffffff81e22b60 T radeon_combios_asic_init +ffffffff81e23100 t combios_parse_mmio_table +ffffffff81e23340 t combios_parse_pll_table +ffffffff81e236a0 T radeon_combios_initialize_bios_scratch_regs +ffffffff81e23730 T radeon_combios_output_lock +ffffffff81e23790 T radeon_combios_connected_scratch_regs +ffffffff81e23b80 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81e23c60 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81e24000 T radeon_connector_hotplug +ffffffff81e24140 T radeon_get_monitor_bpc +ffffffff81e24610 T radeon_connector_edid +ffffffff81e246d0 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81e24750 T radeon_connector_is_dp12_capable +ffffffff81e247f0 T radeon_add_atom_connector +ffffffff81e25940 T radeon_add_legacy_connector +ffffffff81e25ed0 t radeon_dp_detect +ffffffff81e26320 t radeon_dvi_force +ffffffff81e26370 t radeon_connector_set_property +ffffffff81e26c60 t radeon_connector_unregister +ffffffff81e26cd0 t radeon_connector_destroy +ffffffff81e26d60 t radeon_best_single_encoder +ffffffff81e26dd0 t radeon_connector_get_edid +ffffffff81e26f40 t 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radeon_suspend_kms +ffffffff81e30cd0 T radeon_resume_kms +ffffffff81e30fc0 T radeon_gpu_reset +ffffffff81e32000 T radeon_crtc_load_lut +ffffffff81e33030 T radeon_crtc_handle_vblank +ffffffff81e331d0 T radeon_get_crtc_scanoutpos +ffffffff81e337d0 T radeon_crtc_handle_flip +ffffffff81e33920 T radeon_compute_pll_avivo +ffffffff81e33e90 T radeon_compute_pll_legacy +ffffffff81e34580 T radeon_framebuffer_init +ffffffff81e34610 T radeon_update_display_priority +ffffffff81e34670 T radeon_modeset_init +ffffffff81e352f0 T radeon_modeset_fini +ffffffff81e354b0 T radeon_crtc_scaling_mode_fixup +ffffffff81e35840 T radeon_get_crtc_scanout_position +ffffffff81e358b0 t radeon_user_framebuffer_create +ffffffff81e35ab0 t radeon_crtc_gamma_set +ffffffff81e35b00 t radeon_crtc_destroy +ffffffff81e35b50 t radeon_crtc_set_config +ffffffff81e35c30 t radeon_crtc_page_flip_target +ffffffff81e361a0 t radeon_flip_work_func +ffffffff81e36440 t radeon_unpin_work_func +ffffffff81e364e0 t radeon_bo_reserve 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radeon_get_external_encoder +ffffffff81e3a5c0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81e3a660 T radeon_panel_mode_fixup +ffffffff81e3a830 T radeon_dig_monitor_is_duallink +ffffffff81e3a960 T radeon_encoder_is_digital +ffffffff81e3b000 T radeon_fbdev_setup +ffffffff81e3b180 T radeon_fbdev_set_suspend +ffffffff81e3b1d0 T radeon_fbdev_robj_is_fb +ffffffff81e3b250 T radeondrm_burner +ffffffff81e3b2e0 T radeondrm_burner_cb +ffffffff81e3b310 t radeon_fbdev_fb_helper_fb_probe +ffffffff81e3b980 t radeon_bo_reserve +ffffffff81e3bb20 t radeon_bo_unreserve +ffffffff81e3bc30 t radeon_fbdev_client_unregister +ffffffff81e3bca0 t radeon_fbdev_client_restore +ffffffff81e3bcf0 t radeon_fbdev_client_hotplug +ffffffff81e3c000 T radeon_fence_emit +ffffffff81e3c140 T radeon_fence_process +ffffffff81e3c220 t radeon_fence_activity +ffffffff81e3c4b0 T radeon_fence_signaled +ffffffff81e3c530 t radeon_fence_seq_signaled +ffffffff81e3c650 T radeon_fence_wait_timeout +ffffffff81e3c790 t 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radeon_gem_object_close +ffffffff81e40680 t radeon_gem_object_mmap +ffffffff81e40730 T radeon_gem_info_ioctl +ffffffff81e407a0 T radeon_gem_create_ioctl +ffffffff81e408f0 T radeon_gem_userptr_ioctl +ffffffff81e40920 T radeon_gem_set_domain_ioctl +ffffffff81e40ad0 T radeon_mode_dumb_mmap +ffffffff81e40ba0 T radeon_gem_mmap_ioctl +ffffffff81e40c70 T radeon_gem_busy_ioctl +ffffffff81e40d40 T radeon_gem_wait_idle_ioctl +ffffffff81e40e70 T radeon_gem_set_tiling_ioctl +ffffffff81e40f40 T radeon_gem_get_tiling_ioctl +ffffffff81e41040 t radeon_bo_reserve +ffffffff81e41280 t radeon_bo_unreserve +ffffffff81e41390 T radeon_gem_va_ioctl +ffffffff81e41690 t radeon_gem_va_update_vm +ffffffff81e41820 T radeon_gem_op_ioctl +ffffffff81e41930 T radeon_align_pitch +ffffffff81e419c0 T radeon_mode_dumb_create +ffffffff81e41b20 T radeon_gem_debugfs_init +ffffffff81e42000 T radeon_ddc_probe +ffffffff81e420d0 T radeon_router_select_ddc_port +ffffffff81e42370 T radeon_bb_set_bits +ffffffff81e42500 T radeon_bb_set_dir +ffffffff81e42530 T radeon_bb_read_bits +ffffffff81e42620 T radeon_acquire_bus +ffffffff81e42b20 T radeon_release_bus +ffffffff81e42cc0 T radeon_send_start +ffffffff81e42ce0 T radeon_send_stop +ffffffff81e42d00 T radeon_initiate_xfer +ffffffff81e42d20 T radeon_read_byte +ffffffff81e42d40 T radeon_write_byte +ffffffff81e42d60 T radeon_i2c_create +ffffffff81e42fb0 T radeon_i2c_destroy +ffffffff81e43030 T radeon_i2c_init +ffffffff81e43080 T radeon_i2c_fini +ffffffff81e43140 T radeon_i2c_add +ffffffff81e43300 T radeon_i2c_lookup +ffffffff81e434d0 T radeon_i2c_get_byte +ffffffff81e435b0 T radeon_i2c_put_byte +ffffffff81e43650 T radeon_router_select_cd_port +ffffffff81e438f0 t radeon_hw_i2c_xfer +ffffffff81e44600 t radeon_hw_i2c_func +ffffffff81e44630 t r100_hw_i2c_xfer +ffffffff81e44d40 t radeon_get_i2c_prescale +ffffffff81e45000 T radeon_ib_get +ffffffff81e45120 T radeon_ib_free +ffffffff81e45170 T radeon_ib_schedule +ffffffff81e45470 T radeon_ib_pool_init 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radeon_bo_reserve +ffffffff81e47f30 T radeon_driver_postclose_kms +ffffffff81e481b0 T radeon_get_vblank_counter_kms +ffffffff81e483a0 T radeon_enable_vblank_kms +ffffffff81e48470 T radeon_disable_vblank_kms +ffffffff81e49000 T radeon_crtc_set_base +ffffffff81e49020 T radeon_crtc_do_set_base +ffffffff81e49650 T radeon_crtc_set_base_atomic +ffffffff81e49670 t radeon_bo_reserve +ffffffff81e49810 t radeon_bo_unreserve +ffffffff81e49920 T radeon_legacy_init_crtc +ffffffff81e49970 t radeon_crtc_dpms +ffffffff81e49b80 t radeon_crtc_prepare +ffffffff81e49c00 t radeon_crtc_commit +ffffffff81e49c80 t radeon_crtc_mode_fixup +ffffffff81e49ca0 t radeon_crtc_mode_set +ffffffff81e4b380 t radeon_crtc_disable +ffffffff81e4c000 T radeon_legacy_get_backlight_level +ffffffff81e4c050 T radeon_legacy_set_backlight_level +ffffffff81e4c0a0 t radeon_legacy_lvds_update +ffffffff81e4c440 T radeon_legacy_backlight_init +ffffffff81e4c650 t radeon_legacy_backlight_get_brightness +ffffffff81e4c6b0 T radeon_add_legacy_encoder +ffffffff81e4caa0 t radeon_legacy_backlight_update_status +ffffffff81e4cb50 t radeon_lvds_enc_destroy +ffffffff81e4cc00 t radeon_legacy_lvds_dpms +ffffffff81e4cc60 t radeon_legacy_mode_fixup +ffffffff81e4cce0 t radeon_legacy_lvds_prepare +ffffffff81e4cd80 t radeon_legacy_lvds_commit +ffffffff81e4ce10 t radeon_legacy_lvds_mode_set +ffffffff81e4d040 t radeon_legacy_encoder_disable +ffffffff81e4d0a0 t radeon_legacy_tmds_int_dpms +ffffffff81e4d170 t radeon_legacy_tmds_int_prepare +ffffffff81e4d250 t radeon_legacy_tmds_int_commit +ffffffff81e4d340 t radeon_legacy_tmds_int_mode_set +ffffffff81e4d5b0 t radeon_legacy_primary_dac_dpms +ffffffff81e4d6f0 t radeon_legacy_primary_dac_prepare +ffffffff81e4d750 t radeon_legacy_primary_dac_commit +ffffffff81e4d7b0 t radeon_legacy_primary_dac_mode_set +ffffffff81e4d940 t radeon_legacy_primary_dac_detect +ffffffff81e4db50 t radeon_legacy_tv_dac_dpms +ffffffff81e4dd60 t radeon_legacy_tv_dac_prepare +ffffffff81e4ddc0 t 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radeon_bo_pin +ffffffff81e52be0 T radeon_bo_unpin +ffffffff81e52c60 T radeon_bo_evict_vram +ffffffff81e52cc0 T radeon_bo_force_delete +ffffffff81e52e60 T radeon_bo_init +ffffffff81e52f70 T radeon_bo_fini +ffffffff81e52fb0 T radeon_bo_list_validate +ffffffff81e53300 T radeon_bo_get_surface_reg +ffffffff81e53590 T radeon_bo_set_tiling_flags +ffffffff81e53900 T radeon_bo_get_tiling_flags +ffffffff81e53950 T radeon_bo_move_notify +ffffffff81e53a20 T radeon_bo_fault_reserve_notify +ffffffff81e53ce0 t ttm_bo_move_to_lru_tail_unlocked +ffffffff81e53d30 T radeon_bo_fence +ffffffff81e54000 T radeon_pm_get_type_index +ffffffff81e54080 T radeon_pm_acpi_event_handler +ffffffff81e54190 t radeon_pm_update_profile +ffffffff81e542b0 t radeon_pm_set_clocks +ffffffff81e54da0 T radeon_dpm_enable_uvd +ffffffff81e54e80 T radeon_pm_compute_clocks +ffffffff81e559b0 T radeon_dpm_enable_vce +ffffffff81e55a30 T radeon_pm_suspend +ffffffff81e55b50 T radeon_pm_resume +ffffffff81e55e80 T radeon_pm_init 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radeon_ring_init +ffffffff81e58c70 t radeon_bo_reserve +ffffffff81e58e10 t radeon_bo_unreserve +ffffffff81e58f20 T radeon_ring_fini +ffffffff81e59000 T radeon_sa_bo_manager_init +ffffffff81e590e0 T radeon_sa_bo_manager_fini +ffffffff81e59120 T radeon_sa_bo_manager_start +ffffffff81e592a0 t radeon_bo_reserve +ffffffff81e59440 t radeon_bo_unreserve +ffffffff81e59550 T radeon_sa_bo_manager_suspend +ffffffff81e59630 T radeon_sa_bo_new +ffffffff81e596a0 T radeon_sa_bo_free +ffffffff81e5a000 T radeon_semaphore_create +ffffffff81e5a100 T radeon_semaphore_emit_signal +ffffffff81e5a190 T radeon_semaphore_emit_wait +ffffffff81e5a220 T radeon_semaphore_free +ffffffff81e5b000 T radeon_sync_create +ffffffff81e5b090 T radeon_sync_fence +ffffffff81e5b140 T radeon_sync_resv +ffffffff81e5b2a0 T radeon_sync_rings +ffffffff81e5b4c0 T radeon_sync_free +ffffffff81e5c000 T radeon_test_moves +ffffffff81e5c080 t radeon_do_test_moves +ffffffff81e5c7e0 T radeon_test_ring_sync +ffffffff81e5cb90 t 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T radeon_vm_bo_find +ffffffff81e677d0 T radeon_vm_bo_add +ffffffff81e678d0 T radeon_vm_bo_set_addr +ffffffff81e67e10 t radeon_bo_unreserve +ffffffff81e67f20 t radeon_vm_clear_bo +ffffffff81e68150 T radeon_vm_map_gart +ffffffff81e68190 T radeon_vm_update_page_directory +ffffffff81e68560 T radeon_vm_bo_update +ffffffff81e68c70 t radeon_vm_fence_pts +ffffffff81e68d00 T radeon_vm_clear_freed +ffffffff81e68e40 T radeon_vm_clear_invalids +ffffffff81e68f10 T radeon_vm_bo_rmv +ffffffff81e69030 T radeon_vm_bo_invalidate +ffffffff81e690f0 T radeon_vm_init +ffffffff81e693e0 T radeon_vm_fini +ffffffff81e697a0 t radeon_bo_reserve +ffffffff81e69940 t radeon_vm_frag_ptes +ffffffff81e6a000 T rs400_gart_adjust_size +ffffffff81e6a0e0 T rs400_gart_tlb_flush +ffffffff81e6a180 T rs400_gart_init +ffffffff81e6a290 T rs400_gart_enable +ffffffff81e6a680 T rs400_gart_disable +ffffffff81e6a6f0 T rs400_gart_fini +ffffffff81e6a780 T rs400_gart_get_page_entry +ffffffff81e6a7e0 T rs400_gart_set_page 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rs780_dpm_enable +ffffffff81e72f50 T rs780_dpm_disable +ffffffff81e73040 T rs780_dpm_set_power_state +ffffffff81e73490 t rs780_force_voltage +ffffffff81e735e0 t rs780_enable_voltage_scaling +ffffffff81e737b0 T rs780_dpm_setup_asic +ffffffff81e737e0 T rs780_dpm_display_configuration_changed +ffffffff81e73940 T rs780_dpm_init +ffffffff81e73ef0 T rs780_dpm_print_power_state +ffffffff81e73fb0 T rs780_dpm_fini +ffffffff81e74050 T rs780_dpm_get_sclk +ffffffff81e74090 T rs780_dpm_get_mclk +ffffffff81e740c0 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81e740f0 T rs780_dpm_get_current_sclk +ffffffff81e74180 T rs780_dpm_get_current_mclk +ffffffff81e741b0 T rs780_dpm_force_performance_level +ffffffff81e743d0 t rs780_force_fbdiv +ffffffff81e75000 T rv515_ring_start +ffffffff81e75c50 T rv515_mc_wait_for_idle +ffffffff81e75d00 T rv515_vga_render_disable +ffffffff81e75d50 T rv515_mc_rreg +ffffffff81e75df0 T rv515_mc_wreg +ffffffff81e75e70 T rv515_debugfs +ffffffff81e75e80 T rv515_mc_stop +ffffffff81e764b0 T rv515_mc_resume +ffffffff81e76b10 T rv515_clock_startup +ffffffff81e76c00 T rv515_resume +ffffffff81e76ed0 t rv515_startup +ffffffff81e774a0 T rv515_suspend +ffffffff81e77530 T rv515_set_safe_registers +ffffffff81e77570 T rv515_fini +ffffffff81e77680 T rv515_init +ffffffff81e77a60 T atom_rv515_force_tv_scaler +ffffffff81e7b8d0 T rv515_bandwidth_avivo_update +ffffffff81e7bab0 t rv515_crtc_bandwidth_compute +ffffffff81e7bdd0 t rv515_compute_mode_priority +ffffffff81e7c2a0 T rv515_bandwidth_update +ffffffff81e7d000 T rv6xx_dpm_enable +ffffffff81e7da30 t rv6xx_calculate_stepping_parameters +ffffffff81e7dc10 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81e7e250 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81e7e340 t rv6xx_enable_dynamic_pcie_gen2 +ffffffff81e7e570 T rv6xx_dpm_disable +ffffffff81e7e830 T rv6xx_dpm_set_power_state +ffffffff81e7f470 T rv6xx_setup_asic +ffffffff81e7f600 T rv6xx_dpm_display_configuration_changed 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rv770_enable_backbias +ffffffff81e89780 T rv770_setup_bsp +ffffffff81e89880 T rv770_program_git +ffffffff81e898d0 T rv770_program_tp +ffffffff81e89950 T rv770_program_tpp +ffffffff81e89990 T rv770_program_sstp +ffffffff81e899d0 T rv770_program_engine_speed_parameters +ffffffff81e89a20 T rv770_program_vc +ffffffff81e89a70 T rv770_clear_vc +ffffffff81e89ab0 T rv770_upload_firmware +ffffffff81e89b00 T rv770_populate_initial_mvdd_value +ffffffff81e89b50 T rv770_get_memory_module_index +ffffffff81e89b90 T rv770_enable_voltage_control +ffffffff81e89be0 T rv770_halt_smc +ffffffff81e89c50 T rv770_resume_smc +ffffffff81e89ca0 T rv770_set_sw_state +ffffffff81e89d00 T rv770_set_boot_state +ffffffff81e89d50 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81e89dc0 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81e89e30 T rv770_restrict_performance_levels_before_switch +ffffffff81e89eb0 T rv770_dpm_force_performance_level +ffffffff81e89f90 T r7xx_start_smc +ffffffff81e89fc0 T r7xx_stop_smc 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si_set_power_state_conditionally_enable_ulv +ffffffff81ea9590 t si_power_control_set_level +ffffffff81ea9780 T si_dpm_post_set_power_state +ffffffff81ea97c0 T si_dpm_display_configuration_changed +ffffffff81ea98a0 T si_dpm_init +ffffffff81eab420 T si_dpm_fini +ffffffff81eab4f0 T si_dpm_debugfs_print_current_performance_level +ffffffff81eab550 T si_dpm_get_current_sclk +ffffffff81eab5d0 T si_dpm_get_current_mclk +ffffffff81eab650 t si_do_program_memory_timing_parameters +ffffffff81eab800 t si_populate_mvdd_value +ffffffff81eab890 t si_convert_power_level_to_smc +ffffffff81eac190 t si_calculate_sclk_params +ffffffff81eac3d0 t si_program_cac_config_registers +ffffffff81ead000 T si_copy_bytes_to_smc +ffffffff81ead260 T si_start_smc +ffffffff81ead2a0 T si_reset_smc +ffffffff81ead2f0 T si_program_jump_on_start +ffffffff81ead320 T si_stop_smc_clock +ffffffff81ead360 T si_start_smc_clock +ffffffff81ead3a0 T si_is_smc_running +ffffffff81ead410 T si_send_msg_to_smc +ffffffff81ead500 T si_wait_for_smc_inactive +ffffffff81ead5c0 T si_load_smc_ucode +ffffffff81ead780 T si_read_smc_sram_dword +ffffffff81ead870 T si_write_smc_sram_dword +ffffffff81eae000 T sumo_get_pi +ffffffff81eae030 T sumo_gfx_clockgating_initialize +ffffffff81eae130 T sumo_program_vc +ffffffff81eae170 T sumo_clear_vc +ffffffff81eae1b0 T sumo_program_sstp +ffffffff81eae240 T sumo_take_smu_control +ffffffff81eae270 T sumo_get_sleep_divider_from_id +ffffffff81eae2a0 T sumo_get_sleep_divider_id_from_clock +ffffffff81eae350 T sumo_dpm_enable +ffffffff81eaea40 T sumo_dpm_late_enable +ffffffff81eaf110 T sumo_dpm_disable +ffffffff81eaf480 T sumo_dpm_pre_set_power_state +ffffffff81eaf970 T sumo_dpm_set_power_state +ffffffff81eb04d0 T sumo_dpm_post_set_power_state +ffffffff81eb0570 T sumo_dpm_setup_asic +ffffffff81eb0690 T sumo_dpm_display_configuration_changed +ffffffff81eb06c0 T sumo_convert_vid2_to_vid7 +ffffffff81eb0710 T sumo_construct_sclk_voltage_mapping_table +ffffffff81eb07d0 T sumo_construct_vid_mapping_table +ffffffff81eb0960 T sumo_dpm_init +ffffffff81eb1260 T sumo_dpm_print_power_state +ffffffff81eb1390 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81eb13c0 T sumo_dpm_get_current_sclk +ffffffff81eb1430 T sumo_dpm_get_current_mclk +ffffffff81eb1460 T sumo_dpm_get_current_vddc +ffffffff81eb1530 T sumo_dpm_fini +ffffffff81eb15d0 T sumo_dpm_get_sclk +ffffffff81eb1620 T sumo_dpm_get_mclk +ffffffff81eb1650 T sumo_dpm_force_performance_level +ffffffff81eb1ad0 t sumo_power_level_enable +ffffffff81eb1d20 t sumo_program_power_level +ffffffff81eb3000 T sumo_initialize_m3_arb +ffffffff81eb33c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81eb3470 t sumo_send_msg_to_smu +ffffffff81eb3640 T sumo_smu_pg_init +ffffffff81eb3660 T sumo_enable_boost_timer +ffffffff81eb37e0 T sumo_set_tdp_limit +ffffffff81eb3860 T sumo_boost_state_enable +ffffffff81eb38b0 T sumo_get_running_fw_version +ffffffff81eb4000 T trinity_dpm_enable_bapm +ffffffff81eb4090 T trinity_dpm_enable +ffffffff81eb4690 T trinity_dpm_late_enable +ffffffff81eb4cc0 T trinity_dpm_disable +ffffffff81eb5160 T trinity_dpm_force_performance_level +ffffffff81eb5230 T trinity_dpm_pre_set_power_state +ffffffff81eb5810 T trinity_dpm_set_power_state +ffffffff81eb5e60 T trinity_dpm_post_set_power_state +ffffffff81eb5f00 T trinity_dpm_setup_asic +ffffffff81eb5f80 T trinity_dpm_display_configuration_changed +ffffffff81eb6010 T trinity_dpm_init +ffffffff81eb6970 T trinity_dpm_print_power_state +ffffffff81eb6ac0 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81eb6b50 T trinity_dpm_get_current_sclk +ffffffff81eb6bb0 T trinity_dpm_get_current_mclk +ffffffff81eb6be0 T trinity_dpm_fini +ffffffff81eb6ca0 T trinity_dpm_get_sclk +ffffffff81eb6cf0 T trinity_dpm_get_mclk +ffffffff81eb6d20 t trinity_program_power_level +ffffffff81eb8000 T trinity_dpm_bapm_enable +ffffffff81eb8170 T trinity_dpm_config +ffffffff81eb8270 T trinity_dpm_force_state +ffffffff81eb8370 T trinity_dpm_n_levels_disabled +ffffffff81eb8470 T trinity_uvd_dpm_config +ffffffff81eb8550 T trinity_dpm_no_forced_level +ffffffff81eb8630 T trinity_dce_enable_voltage_adjustment +ffffffff81eb87a0 T trinity_gfx_dynamic_mgpg_config +ffffffff81eb8880 T trinity_acquire_mutex +ffffffff81eb8920 T trinity_release_mutex +ffffffff81eb9000 T uvd_v1_0_get_rptr +ffffffff81eb9040 T uvd_v1_0_get_wptr +ffffffff81eb9080 T uvd_v1_0_set_wptr +ffffffff81eb90c0 T uvd_v1_0_fence_emit +ffffffff81eb9500 T uvd_v1_0_resume +ffffffff81eb9660 T uvd_v1_0_init +ffffffff81eb9c60 T uvd_v1_0_start +ffffffff81eba600 T uvd_v1_0_fini +ffffffff81eba7b0 T uvd_v1_0_stop +ffffffff81eba950 T uvd_v1_0_ring_test +ffffffff81ebab50 T uvd_v1_0_semaphore_emit +ffffffff81ebab80 T uvd_v1_0_ib_execute +ffffffff81ebad30 T uvd_v1_0_ib_test +ffffffff81ebb000 T uvd_v2_2_fence_emit +ffffffff81ebb4d0 T uvd_v2_2_semaphore_emit +ffffffff81ebb700 T uvd_v2_2_resume +ffffffff81ebc000 T uvd_v3_1_semaphore_emit +ffffffff81ebd000 T uvd_v4_2_resume +ffffffff81ebe000 T vce_v1_0_get_rptr +ffffffff81ebe090 T vce_v1_0_get_wptr +ffffffff81ebe120 T vce_v1_0_set_wptr +ffffffff81ebe1b0 T vce_v1_0_enable_mgcg +ffffffff81ebe4b0 T vce_v1_0_load_fw +ffffffff81ebe680 T vce_v1_0_bo_size +ffffffff81ebe6f0 T vce_v1_0_resume +ffffffff81ebf220 T vce_v1_0_start +ffffffff81ebfb40 T vce_v1_0_init +ffffffff81ec0000 T vce_v2_0_enable_mgcg +ffffffff81ec0070 t vce_v2_0_set_dyn_cg +ffffffff81ec0280 T vce_v2_0_bo_size +ffffffff81ec02f0 T vce_v2_0_resume +ffffffff81ec1000 T aldebaran_reset_init +ffffffff81ec10e0 t aldebaran_async_reset +ffffffff81ec1140 t aldebaran_get_reset_handler +ffffffff81ec11e0 T aldebaran_reset_fini +ffffffff81ec1240 t aldebaran_mode2_prepare_hwcontext +ffffffff81ec1380 t aldebaran_mode2_perform_reset +ffffffff81ec1590 t aldebaran_mode2_restore_hwcontext +ffffffff81ec1c10 t aldebaran_mode2_reset +ffffffff81ec2000 T aldebaran_reg_base_init +ffffffff81ec3000 T amdgpu_acpi_is_pcie_performance_request_supported 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amdgpu_amdkfd_reset_work +ffffffff81ec62f0 T amdgpu_amdkfd_device_fini_sw +ffffffff81ec6340 T amdgpu_amdkfd_interrupt +ffffffff81ec6370 T amdgpu_amdkfd_suspend +ffffffff81ec63a0 T amdgpu_amdkfd_resume +ffffffff81ec63d0 T amdgpu_amdkfd_pre_reset +ffffffff81ec6400 T amdgpu_amdkfd_post_reset +ffffffff81ec6430 T amdgpu_amdkfd_gpu_reset +ffffffff81ec64a0 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81ec67c0 t amdgpu_bo_reserve +ffffffff81ec6950 t amdgpu_bo_unreserve +ffffffff81ec6a60 T amdgpu_amdkfd_free_gtt_mem +ffffffff81ec6b00 T amdgpu_amdkfd_alloc_gws +ffffffff81ec6c00 T amdgpu_amdkfd_free_gws +ffffffff81ec6c50 T amdgpu_amdkfd_get_fw_version +ffffffff81ec6d00 T amdgpu_amdkfd_get_local_mem_info +ffffffff81ec6eb0 T amdgpu_amdkfd_xcp_memory_size +ffffffff81ec6f50 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81ec6f90 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81ec7000 T amdgpu_amdkfd_get_cu_info +ffffffff81ec7120 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81ec7270 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81ec72f0 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81ec7390 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81ec7510 T amdgpu_amdkfd_submit_ib +ffffffff81ec76b0 T amdgpu_amdkfd_set_compute_idle +ffffffff81ec7700 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81ec7740 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81ec7880 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81ec78c0 T amdgpu_amdkfd_have_atomics_support +ffffffff81ec78f0 T amdgpu_amdkfd_debug_mem_fence +ffffffff81ec7910 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81ec7920 T amdgpu_amdkfd_send_close_event_drain_irq +ffffffff81ec7940 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81ec7990 T amdgpu_amdkfd_check_and_lock_kfd +ffffffff81ec79c0 T amdgpu_amdkfd_unlock_kfd +ffffffff81ec79f0 T amdgpu_amdkfd_unmap_hiq +ffffffff81ec8000 T amdgpu_atom_execute_table +ffffffff81ec80c0 t amdgpu_atom_execute_table_locked +ffffffff81ec8470 T amdgpu_atom_parse +ffffffff81ec8a30 T amdgpu_atom_destroy +ffffffff81ec8a70 T amdgpu_atom_asic_init +ffffffff81ec8ba0 t get_u32 +ffffffff81ec8c00 T amdgpu_atom_parse_data_header +ffffffff81ec8ca0 T amdgpu_atom_parse_cmd_header +ffffffff81ec8d20 t atom_op_move +ffffffff81ec8f50 t atom_op_and +ffffffff81ec9170 t atom_op_or +ffffffff81ec9390 t atom_op_shift_left +ffffffff81ec95d0 t atom_op_shift_right +ffffffff81ec9810 t atom_op_mul +ffffffff81ec99a0 t atom_op_div +ffffffff81ec9b50 t atom_op_add +ffffffff81ec9d70 t atom_op_sub +ffffffff81ec9f90 t atom_op_setport +ffffffff81eca140 t atom_op_setregblock +ffffffff81eca220 t atom_op_setfbbase +ffffffff81eca300 t atom_op_compare +ffffffff81eca540 t atom_op_switch +ffffffff81eca7c0 t atom_op_jump +ffffffff81ecaa60 t atom_op_test +ffffffff81ecac70 t atom_op_delay +ffffffff81ecad80 t atom_op_calltable +ffffffff81ecaf00 t atom_op_repeat +ffffffff81ecaf30 t atom_op_clear +ffffffff81ecb060 t atom_op_nop +ffffffff81ecb090 t atom_op_eot +ffffffff81ecb0c0 t atom_op_mask +ffffffff81ecb3e0 t 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amdgpu_atombios_crtc_lock +ffffffff81ed1250 T amdgpu_atombios_crtc_enable +ffffffff81ed12c0 T amdgpu_atombios_crtc_blank +ffffffff81ed1330 T amdgpu_atombios_crtc_powergate +ffffffff81ed13b0 T amdgpu_atombios_crtc_powergate_init +ffffffff81ed1420 T amdgpu_atombios_crtc_set_dtd_timing +ffffffff81ed1560 T amdgpu_atombios_crtc_set_disp_eng_pll +ffffffff81ed1670 T amdgpu_atombios_crtc_set_dce_clock +ffffffff81ed1770 T amdgpu_atombios_crtc_program_pll +ffffffff81ed1aa0 T amdgpu_atombios_crtc_prepare_pll +ffffffff81ed2030 T amdgpu_atombios_crtc_set_pll +ffffffff81ed3000 T amdgpu_atombios_dp_aux_init +ffffffff81ed3090 t amdgpu_atombios_dp_aux_transfer +ffffffff81ed3230 T amdgpu_atombios_dp_get_sinktype +ffffffff81ed32a0 T amdgpu_atombios_dp_get_dpcd +ffffffff81ed3480 T amdgpu_atombios_dp_get_panel_mode +ffffffff81ed3590 T amdgpu_atombios_dp_set_link_config +ffffffff81ed3620 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81ed37d0 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81ed3860 T amdgpu_atombios_dp_needs_link_train +ffffffff81ed38e0 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81ed3960 T amdgpu_atombios_dp_link_train +ffffffff81ed4020 t amdgpu_atombios_dp_process_aux_ch +ffffffff81ed41b0 t amdgpu_atombios_dp_get_adjust_train +ffffffff81ed5000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81ed5050 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81ed50b0 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81ed5110 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81ed5240 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81ed5d00 T amdgpu_atombios_encoder_init_backlight +ffffffff81ed5ee0 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81ed5f40 T amdgpu_atombios_encoder_fini_backlight +ffffffff81ed5fe0 T amdgpu_atombios_encoder_is_digital +ffffffff81ed6030 T amdgpu_atombios_encoder_mode_fixup +ffffffff81ed6130 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81ed62f0 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81ed6840 t amdgpu_atombios_encoder_get_bpc +ffffffff81ed6890 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81ed69c0 T amdgpu_atombios_encoder_dpms +ffffffff81ed6b40 t amdgpu_atombios_encoder_setup_dig +ffffffff81ed6ff0 t amdgpu_atombios_encoder_setup_dvo +ffffffff81ed71c0 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81ed75e0 T amdgpu_atombios_encoder_init_dig +ffffffff81ed76c0 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81ed7970 T amdgpu_atombios_encoder_dac_detect +ffffffff81ed7b60 T amdgpu_atombios_encoder_dig_detect +ffffffff81ed7c90 T amdgpu_atombios_encoder_setup_ext_encoder_ddc +ffffffff81ed7cf0 T amdgpu_atombios_encoder_set_bios_scratch_regs +ffffffff81ed8330 T amdgpu_atombios_encoder_get_lcd_info +ffffffff81ed86c0 T amdgpu_atombios_encoder_get_dig_info +ffffffff81ed8730 t amdgpu_atombios_encoder_update_backlight_status +ffffffff81ed9000 T amdgpu_atombios_i2c_xfer +ffffffff81ed9400 T amdgpu_atombios_i2c_func +ffffffff81ed9430 T amdgpu_atombios_i2c_channel_trans +ffffffff81eda000 T amdgpu_atomfirmware_query_firmware_capability +ffffffff81eda0a0 T amdgpu_atomfirmware_gpu_virtualization_supported +ffffffff81eda0e0 T amdgpu_atomfirmware_scratch_regs_init +ffffffff81eda160 T amdgpu_atomfirmware_allocate_fb_scratch +ffffffff81eda390 T amdgpu_atomfirmware_get_vram_info +ffffffff81eda8e0 t convert_atom_mem_type_to_vram_type +ffffffff81eda960 T amdgpu_atomfirmware_mem_ecc_supported +ffffffff81edaa30 T amdgpu_atomfirmware_sram_ecc_supported +ffffffff81edaa70 T amdgpu_atomfirmware_dynamic_boot_config_supported +ffffffff81edaab0 T amdgpu_atomfirmware_ras_rom_addr +ffffffff81edab60 T amdgpu_atomfirmware_get_clock_info +ffffffff81edadd0 T amdgpu_atomfirmware_get_gfx_info +ffffffff81edaf60 T amdgpu_atomfirmware_mem_training_supported +ffffffff81edafa0 T amdgpu_atomfirmware_get_fw_reserved_fb_size +ffffffff81edb030 T amdgpu_atomfirmware_asic_init +ffffffff81edc000 T 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+ffffffff81f7db40 t dce_v10_0_encoder_disable +ffffffff81f7dc70 t dce_v10_0_ext_dpms +ffffffff81f7dca0 t dce_v10_0_ext_prepare +ffffffff81f7dcd0 t dce_v10_0_ext_commit +ffffffff81f7dd00 t dce_v10_0_ext_mode_set +ffffffff81f7dd30 t dce_v10_0_ext_disable +ffffffff81f7dd60 t dce_v10_0_set_crtc_irq_state +ffffffff81f7de60 t dce_v10_0_crtc_irq +ffffffff81f7e100 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81f7e1e0 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81f7e2c0 t dce_v10_0_set_pageflip_irq_state +ffffffff81f7e380 t dce_v10_0_pageflip_irq +ffffffff81f7e530 t dce_v10_0_set_hpd_irq_state +ffffffff81f7e620 t dce_v10_0_hpd_irq +ffffffff81f7e770 t dce_v10_0_afmt_init +ffffffff81f7e8a0 t dce_v10_0_audio_init +ffffffff81f7e970 t INIT_DELAYED_WORK +ffffffff81f7e9c0 t dce_v10_0_crtc_cursor_set2 +ffffffff81f7ed20 t dce_v10_0_crtc_cursor_move +ffffffff81f7ee20 t dce_v10_0_crtc_gamma_set +ffffffff81f7ee70 t dce_v10_0_crtc_destroy +ffffffff81f7eeb0 t amdgpu_bo_reserve +ffffffff81f7f0f0 t amdgpu_bo_unreserve +ffffffff81f7f200 t dce_v10_0_lock_cursor +ffffffff81f7f270 t dce_v10_0_cursor_move_locked +ffffffff81f7f3e0 t dce_v10_0_show_cursor +ffffffff81f7f490 t dce_v10_0_crtc_load_lut +ffffffff81f7f930 t dce_v10_0_crtc_dpms +ffffffff81f7fba0 t dce_v10_0_crtc_prepare +ffffffff81f7fbf0 t dce_v10_0_crtc_commit +ffffffff81f7fc30 t dce_v10_0_crtc_mode_fixup +ffffffff81f7fe50 t dce_v10_0_crtc_mode_set +ffffffff81f800b0 t dce_v10_0_crtc_set_base +ffffffff81f800d0 t dce_v10_0_crtc_set_base_atomic +ffffffff81f800f0 t dce_v10_0_crtc_disable +ffffffff81f802c0 t dce_v10_0_crtc_do_set_base +ffffffff81f80af0 t __delayed_work_tick +ffffffff81f80b10 t dce_v10_0_is_display_hung +ffffffff81f81000 T dce_v11_0_disable_dce +ffffffff81f811c0 t dce_v11_0_early_init +ffffffff81f812f0 t dce_v11_0_sw_init +ffffffff81f816c0 t dce_v11_0_sw_fini +ffffffff81f81820 t dce_v11_0_hw_init +ffffffff81f81cd0 t dce_v11_0_hw_fini +ffffffff81f81ec0 t dce_v11_0_suspend +ffffffff81f81f40 t dce_v11_0_resume +ffffffff81f81fd0 t dce_v11_0_is_idle +ffffffff81f82000 t dce_v11_0_wait_for_idle +ffffffff81f82030 t dce_v11_0_soft_reset +ffffffff81f82290 t dce_v11_0_set_clockgating_state +ffffffff81f822c0 t dce_v11_0_set_powergating_state +ffffffff81f822f0 t dce_v11_0_audio_endpt_rreg +ffffffff81f823b0 t dce_v11_0_audio_endpt_wreg +ffffffff81f82440 t dce_v11_0_bandwidth_update +ffffffff81f82f90 t dce_v11_0_vblank_get_counter +ffffffff81f82fe0 t dce_v11_0_hpd_sense +ffffffff81f83040 t dce_v11_0_hpd_set_polarity +ffffffff81f83120 t dce_v11_0_hpd_get_gpio_reg +ffffffff81f83150 t dce_v11_0_page_flip +ffffffff81f83280 t dce_v11_0_crtc_get_scanoutpos +ffffffff81f83330 t dce_v11_0_encoder_add +ffffffff81f835c0 t dce_v11_0_latency_watermark +ffffffff81f837f0 t dce_v11_0_encoder_destroy +ffffffff81f83860 t dce_v11_0_encoder_prepare +ffffffff81f83aa0 t dce_v11_0_encoder_commit +ffffffff81f83ae0 t dce_v11_0_encoder_mode_set +ffffffff81f84da0 t dce_v11_0_encoder_disable +ffffffff81f84ed0 t dce_v11_0_ext_dpms +ffffffff81f84f00 t dce_v11_0_ext_prepare +ffffffff81f84f30 t dce_v11_0_ext_commit +ffffffff81f84f60 t dce_v11_0_ext_mode_set +ffffffff81f84f90 t dce_v11_0_ext_disable +ffffffff81f84fc0 t dce_v11_0_set_crtc_irq_state +ffffffff81f850c0 t dce_v11_0_crtc_irq +ffffffff81f85340 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81f85420 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81f85500 t dce_v11_0_set_pageflip_irq_state +ffffffff81f855c0 t dce_v11_0_pageflip_irq +ffffffff81f85770 t dce_v11_0_set_hpd_irq_state +ffffffff81f85860 t dce_v11_0_hpd_irq +ffffffff81f859b0 t dce_v11_0_afmt_init +ffffffff81f85ae0 t dce_v11_0_audio_init +ffffffff81f85bf0 t INIT_DELAYED_WORK +ffffffff81f85c40 t dce_v11_0_crtc_cursor_set2 +ffffffff81f85fa0 t dce_v11_0_crtc_cursor_move +ffffffff81f860a0 t dce_v11_0_crtc_gamma_set +ffffffff81f860f0 t dce_v11_0_crtc_destroy +ffffffff81f86130 t amdgpu_bo_reserve +ffffffff81f86370 t amdgpu_bo_unreserve +ffffffff81f86480 t dce_v11_0_lock_cursor +ffffffff81f864f0 t dce_v11_0_cursor_move_locked +ffffffff81f86660 t dce_v11_0_show_cursor +ffffffff81f86710 t dce_v11_0_crtc_load_lut +ffffffff81f86b60 t dce_v11_0_crtc_dpms +ffffffff81f86dd0 t dce_v11_0_crtc_prepare +ffffffff81f86e20 t dce_v11_0_crtc_commit +ffffffff81f86e60 t dce_v11_0_crtc_mode_fixup +ffffffff81f87150 t dce_v11_0_crtc_mode_set +ffffffff81f87430 t dce_v11_0_crtc_set_base +ffffffff81f87450 t dce_v11_0_crtc_set_base_atomic +ffffffff81f87470 t dce_v11_0_crtc_disable +ffffffff81f87650 t dce_v11_0_crtc_do_set_base +ffffffff81f87e80 t __delayed_work_tick +ffffffff81f88000 t df_v1_7_sw_init +ffffffff81f88040 t df_v1_7_sw_fini +ffffffff81f88070 t df_v1_7_enable_broadcast_mode +ffffffff81f881a0 t df_v1_7_get_fb_channel_number +ffffffff81f88240 t df_v1_7_get_hbm_channel_number +ffffffff81f882a0 t df_v1_7_update_medium_grain_clock_gating +ffffffff81f88450 t df_v1_7_get_clockgating_state +ffffffff81f884f0 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81f89000 t df_v3_6_sw_init +ffffffff81f89160 t df_v3_6_sw_fini +ffffffff81f89190 t df_v3_6_enable_broadcast_mode +ffffffff81f892c0 t df_v3_6_get_fb_channel_number +ffffffff81f893c0 t df_v3_6_get_hbm_channel_number +ffffffff81f89420 t df_v3_6_update_medium_grain_clock_gating +ffffffff81f895f0 t df_v3_6_get_clockgating_state +ffffffff81f89690 t df_v3_6_pmc_start +ffffffff81f89a20 t df_v3_6_pmc_stop +ffffffff81f89d60 t df_v3_6_pmc_get_count +ffffffff81f89f40 t df_v3_6_get_fica +ffffffff81f8a090 t df_v3_6_set_fica +ffffffff81f8a1c0 t df_v3_6_query_ras_poison_mode +ffffffff81f8b000 t df_v4_3_query_ras_poison_mode +ffffffff81f8c000 T dimgrey_cavefish_reg_base_init +ffffffff81f8d000 T emu_soc_asic_init +ffffffff81f8e000 t gfx_v10_0_early_init +ffffffff81f8e920 t gfx_v10_0_late_init +ffffffff81f8e990 t gfx_v10_0_sw_init +ffffffff81f8ef50 t gfx_v10_0_sw_fini +ffffffff81f8f210 t gfx_v10_0_hw_init +ffffffff81f923f0 t gfx_v10_0_hw_fini +ffffffff81f92500 t gfx_v10_0_suspend +ffffffff81f92540 t gfx_v10_0_resume +ffffffff81f92550 t gfx_v10_0_is_idle +ffffffff81f925f0 t gfx_v10_0_wait_for_idle +ffffffff81f92700 t gfx_v10_0_soft_reset +ffffffff81f92ae0 t gfx_v10_0_set_clockgating_state +ffffffff81f92e60 t gfx_v10_0_set_powergating_state +ffffffff81f92f30 t gfx_v10_0_get_clockgating_state +ffffffff81f93080 t gfx_v10_0_get_gpu_clock_counter +ffffffff81f93600 t gfx_v10_0_select_se_sh +ffffffff81f936a0 t gfx_v10_0_read_wave_data +ffffffff81f93990 t gfx_v10_0_read_wave_vgprs +ffffffff81f939c0 t gfx_v10_0_read_wave_sgprs +ffffffff81f93a40 t gfx_v10_0_select_me_pipe_q +ffffffff81f93a60 t gfx_v10_0_init_spm_golden_registers +ffffffff81f93ad0 t gfx_v10_0_update_perfmon_mgcg +ffffffff81f93c00 t wave_read_ind +ffffffff81f93d00 t wave_read_regs +ffffffff81f93e80 t gfx10_kiq_set_resources +ffffffff81f941e0 t gfx10_kiq_map_queues +ffffffff81f945c0 t gfx10_kiq_unmap_queues +ffffffff81f94a00 t gfx10_kiq_query_status +ffffffff81f94d20 t gfx10_kiq_invalidate_tlbs +ffffffff81f94e50 t gfx_v10_0_ring_get_rptr_compute +ffffffff81f94e80 t gfx_v10_0_ring_get_wptr_compute +ffffffff81f94ef0 t gfx_v10_0_ring_set_wptr_compute +ffffffff81f95050 t gfx_v10_0_ring_emit_ib_compute +ffffffff81f953d0 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81f95850 t gfx_v10_0_ring_test_ring +ffffffff81f95b00 t gfx_v10_0_ring_test_ib +ffffffff81f95de0 t gfx_v10_0_ring_emit_rreg +ffffffff81f960a0 t gfx_v10_0_ring_emit_wreg +ffffffff81f96300 t gfx_v10_0_ring_emit_reg_wait +ffffffff81f96360 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81f96400 t gfx_v10_0_wait_reg_mem +ffffffff81f96760 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81f96790 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81f968b0 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81f96af0 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81f971e0 t gfx_v10_0_ring_emit_fence +ffffffff81f975f0 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81f97660 t gfx_v10_0_ring_emit_vm_flush +ffffffff81f97850 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81f97940 t gfx_v10_0_ring_emit_gds_switch +ffffffff81f97a40 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81f97c90 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81f97d50 t gfx_v10_0_ring_emit_sb +ffffffff81f97e40 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81f98370 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81f98480 t gfx_v10_0_ring_soft_recovery +ffffffff81f984f0 t gfx_v10_0_ring_preempt_ib +ffffffff81f986a0 t gfx_v10_0_emit_mem_sync +ffffffff81f98a10 t gfx_v10_0_write_data_to_reg +ffffffff81f98c40 t gfx_v10_0_set_eop_interrupt_state +ffffffff81f98d40 t gfx_v10_0_eop_irq +ffffffff81f98f20 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81f990e0 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81f992c0 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81f99630 t gfx_v10_0_kiq_irq +ffffffff81f996c0 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81f99810 t gfx_v10_0_priv_reg_irq +ffffffff81f99880 t gfx_v10_0_handle_priv_fault +ffffffff81f999f0 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81f99b40 t gfx_v10_0_priv_inst_irq +ffffffff81f99bb0 t gfx_v10_0_is_rlc_enabled +ffffffff81f99c50 t gfx_v10_0_set_safe_mode +ffffffff81f99f50 t gfx_v10_0_unset_safe_mode +ffffffff81f9a000 t gfx_v10_0_rlc_init +ffffffff81f9a020 t gfx_v10_0_get_csb_size +ffffffff81f9a050 t gfx_v10_0_get_csb_buffer +ffffffff81f9a1c0 t gfx_v10_0_rlc_resume +ffffffff81f9ad80 t gfx_v10_0_rlc_stop +ffffffff81f9ae60 t gfx_v10_0_rlc_reset +ffffffff81f9b050 t gfx_v10_0_rlc_start +ffffffff81f9b240 t gfx_v10_0_update_spm_vmid +ffffffff81f9b290 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81f9bcd0 t gfx_v10_0_init_csb +ffffffff81f9bff0 t gfx_v10_0_update_spm_vmid_internal +ffffffff81f9c120 t gfx_v10_0_rlc_backdoor_autoload_config_mec_cache +ffffffff81f9c440 t gfx_v10_0_is_rlcg_access_range +ffffffff81f9c470 t gfx_v10_0_gfx_mqd_init +ffffffff81f9c8b0 t gfx_v10_0_compute_mqd_init +ffffffff81f9cdc0 t gfx_v10_0_mec_init +ffffffff81f9d050 t gfx_v10_0_compute_ring_init +ffffffff81f9d1b0 t gfx_v10_0_rlc_backdoor_autoload_buffer_init +ffffffff81f9d450 t gfx_v10_0_gpu_early_init +ffffffff81f9d6d0 t amdgpu_bo_unreserve +ffffffff81f9d7e0 t gfx_v10_0_cp_resume +ffffffff81fa07a0 t gfx_v10_3_get_disabled_sa +ffffffff81fa08d0 t gfx_v10_0_get_rb_active_bitmap +ffffffff81fa0a10 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81fa0b30 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81fa0c40 t gfx_v10_0_cp_gfx_enable +ffffffff81fa0ee0 t gfx_v10_0_cp_compute_enable +ffffffff81fa10a0 t amdgpu_bo_reserve +ffffffff81fa1240 t gfx_v10_0_kiq_init_register +ffffffff81fa2330 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81fa2430 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81fa2760 t gfx_v10_0_cp_gfx_start +ffffffff81fa3250 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81fa35e0 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81fa3de0 t gfx_v10_0_update_3d_clock_gating +ffffffff81fa4210 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81fa4640 t gfx_v10_cntl_pg +ffffffff81fa5000 t gfx_v11_0_early_init +ffffffff81fa5870 t gfx_v11_0_late_init +ffffffff81fa58e0 t gfx_v11_0_sw_init +ffffffff81fa5ee0 t gfx_v11_0_sw_fini +ffffffff81fa6190 t gfx_v11_0_hw_init +ffffffff81faad40 t gfx_v11_0_hw_fini +ffffffff81faaea0 t gfx_v11_0_suspend +ffffffff81faaee0 t gfx_v11_0_resume +ffffffff81faaef0 t gfx_v11_0_is_idle +ffffffff81faaf90 t gfx_v11_0_wait_for_idle +ffffffff81fab0a0 t gfx_v11_0_check_soft_reset +ffffffff81fab1e0 t gfx_v11_0_soft_reset +ffffffff81fac0b0 t gfx_v11_0_post_soft_reset +ffffffff81fac0c0 t gfx_v11_0_set_clockgating_state +ffffffff81face20 t gfx_v11_0_set_powergating_state +ffffffff81faced0 t gfx_v11_0_get_clockgating_state +ffffffff81fad0c0 t gfx_v11_0_get_gpu_clock_counter +ffffffff81fad4b0 t gfx_v11_0_select_se_sh +ffffffff81fad550 t gfx_v11_0_read_wave_data +ffffffff81fad820 t gfx_v11_0_read_wave_vgprs +ffffffff81fad850 t gfx_v11_0_read_wave_sgprs +ffffffff81fad8d0 t gfx_v11_0_select_me_pipe_q +ffffffff81fad8f0 t gfx_v11_0_update_perf_clk +ffffffff81fada30 t gfx_v11_0_get_gfx_shadow_info +ffffffff81fadaa0 t wave_read_ind +ffffffff81fadba0 t wave_read_regs +ffffffff81fadd20 t gfx11_kiq_set_resources +ffffffff81fae080 t gfx11_kiq_map_queues +ffffffff81fae460 t gfx11_kiq_unmap_queues +ffffffff81fae8a0 t gfx11_kiq_query_status +ffffffff81faebc0 t gfx11_kiq_invalidate_tlbs +ffffffff81faecf0 t gfx_v11_0_ring_get_rptr_compute +ffffffff81faed20 t gfx_v11_0_ring_get_wptr_compute +ffffffff81faed90 t gfx_v11_0_ring_set_wptr_compute +ffffffff81faeef0 t gfx_v11_0_ring_emit_ib_compute +ffffffff81faf270 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81faf6f0 t gfx_v11_0_ring_test_ring +ffffffff81faf9c0 t gfx_v11_0_ring_test_ib +ffffffff81fafcc0 t gfx_v11_0_ring_emit_rreg +ffffffff81faff80 t gfx_v11_0_ring_emit_wreg +ffffffff81fb01e0 t gfx_v11_0_ring_emit_reg_wait +ffffffff81fb0240 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81fb02b0 t gfx_v11_0_wait_reg_mem +ffffffff81fb0610 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81fb0640 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81fb0760 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81fb09a0 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81fb10a0 t gfx_v11_0_ring_emit_fence +ffffffff81fb14b0 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81fb1520 t gfx_v11_0_ring_emit_vm_flush +ffffffff81fb1710 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81fb1800 t gfx_v11_0_ring_emit_gds_switch +ffffffff81fb1900 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81fb1b50 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81fb1c10 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81fb1d90 t gfx_v11_0_ring_emit_gfx_shadow +ffffffff81fb21a0 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81fb22b0 t gfx_v11_0_ring_soft_recovery +ffffffff81fb2320 t gfx_v11_0_ring_preempt_ib +ffffffff81fb24d0 t gfx_v11_0_emit_mem_sync +ffffffff81fb2840 t gfx_v11_0_write_data_to_reg +ffffffff81fb2a70 t gfx_v11_0_set_eop_interrupt_state +ffffffff81fb2b10 t gfx_v11_0_eop_irq +ffffffff81fb2cf0 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81fb2eb0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81fb3060 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81fb31b0 t gfx_v11_0_priv_reg_irq +ffffffff81fb3220 t gfx_v11_0_handle_priv_fault +ffffffff81fb3390 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81fb34e0 t gfx_v11_0_priv_inst_irq +ffffffff81fb3550 t gfx_v11_0_rlc_gc_fed_irq +ffffffff81fb35a0 t gfx_v11_0_is_rlc_enabled +ffffffff81fb3640 t gfx_v11_0_set_safe_mode +ffffffff81fb37c0 t gfx_v11_0_unset_safe_mode +ffffffff81fb3830 t gfx_v11_0_rlc_init +ffffffff81fb38b0 t gfx_v11_0_get_csb_size +ffffffff81fb38e0 t gfx_v11_0_get_csb_buffer +ffffffff81fb3a50 t gfx_v11_0_rlc_resume +ffffffff81fb4900 t gfx_v11_0_rlc_stop +ffffffff81fb49e0 t gfx_v11_0_rlc_reset +ffffffff81fb4bd0 t gfx_v11_0_rlc_start +ffffffff81fb4dc0 t gfx_v11_0_update_spm_vmid +ffffffff81fb4ee0 t gfx_v11_0_init_csb +ffffffff81fb50a0 t gfx_v11_0_gfx_mqd_init +ffffffff81fb54d0 t gfx_v11_0_compute_mqd_init +ffffffff81fb5a70 t gfx_v11_0_mec_init +ffffffff81fb5c00 t gfx_v11_0_compute_ring_init +ffffffff81fb5d60 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff81fb5f60 t gfx_v11_0_gpu_early_init +ffffffff81fb6030 t amdgpu_bo_unreserve +ffffffff81fb6140 t gfx_v11_0_disable_gpa_mode +ffffffff81fb6300 t gfx_v11_0_cp_resume +ffffffff81fbaa60 t gfx_v11_0_config_me_cache +ffffffff81fbae80 t gfx_v11_0_config_pfp_cache +ffffffff81fbb2a0 t gfx_v11_0_config_mec_cache +ffffffff81fbb6c0 t gfx_v11_0_get_sa_active_bitmap +ffffffff81fbb7f0 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81fbb900 t gfx_v11_0_cp_compute_enable +ffffffff81fbbb00 t gfx_v11_0_cp_gfx_enable +ffffffff81fbbd30 t amdgpu_bo_reserve +ffffffff81fbbed0 t gfx_v11_0_kiq_init_register +ffffffff81fbcfd0 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81fbd0c0 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81fbd2d0 t gfx_v11_0_cp_gfx_start +ffffffff81fbdc20 t gfx_v11_cntl_pg +ffffffff81fbe000 t gfx_v11_0_3_rlc_gc_fed_irq +ffffffff81fbe240 t gfx_v11_0_3_poison_consumption_handler +ffffffff81fbf000 t gfx_v8_0_early_init +ffffffff81fbf310 t gfx_v8_0_late_init +ffffffff81fbfad0 t gfx_v8_0_sw_init +ffffffff81fbff30 t gfx_v8_0_sw_fini +ffffffff81fc0140 t gfx_v8_0_hw_init +ffffffff81fc2720 t gfx_v8_0_hw_fini +ffffffff81fc2cb0 t gfx_v8_0_suspend +ffffffff81fc2cf0 t gfx_v8_0_resume +ffffffff81fc2d00 t gfx_v8_0_is_idle +ffffffff81fc2d80 t gfx_v8_0_wait_for_idle +ffffffff81fc2e50 t gfx_v8_0_check_soft_reset +ffffffff81fc2f50 t gfx_v8_0_pre_soft_reset +ffffffff81fc3110 t gfx_v8_0_soft_reset +ffffffff81fc3360 t gfx_v8_0_post_soft_reset +ffffffff81fc3550 t gfx_v8_0_set_clockgating_state +ffffffff81fc3830 t gfx_v8_0_set_powergating_state +ffffffff81fc3ce0 t gfx_v8_0_get_clockgating_state +ffffffff81fc3df0 t gfx_v8_0_get_gpu_clock_counter +ffffffff81fc3eb0 t gfx_v8_0_select_se_sh +ffffffff81fc3f10 t gfx_v8_0_read_wave_data +ffffffff81fc4510 t gfx_v8_0_read_wave_sgprs +ffffffff81fc45e0 t gfx_v8_0_select_me_pipe_q +ffffffff81fc4600 t gfx_v8_0_ring_get_rptr +ffffffff81fc4630 t gfx_v8_0_ring_get_wptr_compute +ffffffff81fc4660 t gfx_v8_0_ring_set_wptr_compute +ffffffff81fc46a0 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81fc4b10 t gfx_v8_0_ring_test_ring +ffffffff81fc4d50 t gfx_v8_0_ring_emit_rreg +ffffffff81fc5010 t gfx_v8_0_ring_emit_wreg +ffffffff81fc5270 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81fc52d0 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81fc5350 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81fc5910 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81fc5e60 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81fc6180 t gfx_v8_0_ring_emit_vm_flush +ffffffff81fc6580 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81fc68d0 t gfx_v8_0_ring_emit_gds_switch +ffffffff81fc7130 t gfx_v8_0_ring_test_ib +ffffffff81fc7320 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81fc7570 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81fc7620 t gfx_v8_ring_emit_sb +ffffffff81fc7710 t gfx_v8_ring_emit_cntxcntl +ffffffff81fc7d10 t gfx_v8_0_ring_soft_recovery +ffffffff81fc7d40 t gfx_v8_0_emit_mem_sync +ffffffff81fc7f60 t gfx_v8_0_ring_emit_ib_compute +ffffffff81fc82a0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81fc85d0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81fc88c0 t gfx_v8_0_emit_wave_limit +ffffffff81fc8a90 t gfx_v8_0_set_eop_interrupt_state +ffffffff81fc8d10 t gfx_v8_0_eop_irq +ffffffff81fc8e40 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81fc8ed0 t gfx_v8_0_priv_reg_irq +ffffffff81fc8ff0 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81fc9080 t gfx_v8_0_priv_inst_irq +ffffffff81fc91a0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81fc94e0 t gfx_v8_0_cp_ecc_error_irq +ffffffff81fc9530 t gfx_v8_0_set_sq_int_state +ffffffff81fc95c0 t gfx_v8_0_sq_irq +ffffffff81fc9640 t gfx_v8_0_parse_sq_irq +ffffffff81fc98c0 t gfx_v8_0_is_rlc_enabled +ffffffff81fc9910 t gfx_v8_0_set_safe_mode +ffffffff81fc9a40 t gfx_v8_0_unset_safe_mode +ffffffff81fc9b00 t gfx_v8_0_rlc_init +ffffffff81fc9bc0 t gfx_v8_0_get_csb_size +ffffffff81fc9bf0 t gfx_v8_0_get_csb_buffer +ffffffff81fc9d60 t gfx_v8_0_cp_jump_table_num +ffffffff81fc9da0 t gfx_v8_0_rlc_resume +ffffffff81fca250 t gfx_v8_0_rlc_stop +ffffffff81fca2e0 t gfx_v8_0_rlc_reset +ffffffff81fca390 t gfx_v8_0_rlc_start +ffffffff81fca430 t gfx_v8_0_update_spm_vmid +ffffffff81fca4c0 t gfx_v8_0_init_save_restore_list +ffffffff81fca9a0 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81fcac10 t gfx_v8_0_sq_irq_work_func +ffffffff81fcac30 t gfx_v8_0_init_microcode +ffffffff81fcb5c0 t gfx_v8_0_mec_init +ffffffff81fcb6f0 t gfx_v8_0_compute_ring_init +ffffffff81fcb840 t gfx_v8_0_gpu_early_init +ffffffff81fcbd10 t amdgpu_bo_unreserve +ffffffff81fcbe20 t gfx_v8_0_kiq_resume +ffffffff81fcc170 t gfx_v8_0_cp_gfx_resume +ffffffff81fccdb0 t gfx_v8_0_kcq_resume +ffffffff81fcd8c0 t amdgpu_bo_reserve +ffffffff81fcda60 t gfx_v8_0_mqd_commit +ffffffff81fcdcd0 t gfx_v8_0_mqd_init +ffffffff81fce1e0 t gfx_v8_0_deactivate_hqd +ffffffff81fce2e0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81fce6f0 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81fcf000 t gfx_v9_0_ras_error_inject +ffffffff81fcf1e0 t gfx_v9_0_query_ras_error_count +ffffffff81fcff10 t gfx_v9_0_reset_ras_error_count +ffffffff81fd0ab0 T gfx_v9_0_select_se_sh +ffffffff81fd0b50 t gfx_v9_0_early_init +ffffffff81fd1790 t gfx_v9_0_late_init +ffffffff81fd2770 t gfx_v9_0_sw_init +ffffffff81fd2f50 t gfx_v9_0_sw_fini +ffffffff81fd31b0 t gfx_v9_0_hw_init +ffffffff81fd6720 t gfx_v9_0_hw_fini +ffffffff81fd6fe0 t gfx_v9_0_suspend +ffffffff81fd7020 t gfx_v9_0_resume +ffffffff81fd7030 t gfx_v9_0_is_idle +ffffffff81fd70d0 t gfx_v9_0_wait_for_idle +ffffffff81fd71d0 t gfx_v9_0_soft_reset +ffffffff81fd75e0 t gfx_v9_0_set_clockgating_state +ffffffff81fd76e0 t gfx_v9_0_set_powergating_state +ffffffff81fd7b40 t gfx_v9_0_get_clockgating_state +ffffffff81fd7c80 t gfx_v9_0_get_gpu_clock_counter +ffffffff81fd8560 t gfx_v9_0_read_wave_data +ffffffff81fd8830 t gfx_v9_0_read_wave_vgprs +ffffffff81fd88a0 t gfx_v9_0_read_wave_sgprs +ffffffff81fd88d0 t gfx_v9_0_select_me_pipe_q +ffffffff81fd88f0 t wave_read_ind +ffffffff81fd8a00 t wave_read_regs +ffffffff81fd8b70 t gfx_v9_0_kiq_set_resources +ffffffff81fd8ed0 t gfx_v9_0_kiq_map_queues +ffffffff81fd9250 t gfx_v9_0_kiq_unmap_queues +ffffffff81fd95c0 t gfx_v9_0_kiq_query_status +ffffffff81fd98e0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81fd9a10 t gfx_v9_0_ring_get_rptr_compute +ffffffff81fd9a40 t gfx_v9_0_ring_get_wptr_compute +ffffffff81fd9ab0 t gfx_v9_0_ring_set_wptr_compute +ffffffff81fd9b10 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81fd9f90 t gfx_v9_0_ring_test_ring +ffffffff81fda200 t gfx_v9_0_ring_emit_rreg +ffffffff81fda4c0 t gfx_v9_0_ring_emit_wreg +ffffffff81fda720 t gfx_v9_0_ring_emit_reg_wait +ffffffff81fda780 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81fda820 t gfx_v9_0_wait_reg_mem +ffffffff81fdab80 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81fdabb0 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81fdacd0 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81fdae10 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81fdb500 t gfx_v9_0_ring_emit_fence +ffffffff81fdb900 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81fdb970 t gfx_v9_0_ring_emit_vm_flush +ffffffff81fdba90 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81fdbb80 t gfx_v9_0_ring_emit_gds_switch +ffffffff81fdbc80 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81fdbed0 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81fdbf90 t gfx_v9_ring_emit_sb +ffffffff81fdc080 t gfx_v9_ring_emit_cntxcntl +ffffffff81fdc5c0 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81fdc6d0 t gfx_v9_0_ring_soft_recovery +ffffffff81fdc740 t gfx_v9_0_ring_preempt_ib +ffffffff81fdc970 t gfx_v9_0_emit_mem_sync +ffffffff81fdcc60 t gfx_v9_0_write_data_to_reg +ffffffff81fdce90 t gfx_v9_0_ring_test_ib +ffffffff81fdd080 t gfx_v9_0_ring_patch_cntl +ffffffff81fdd0c0 t gfx_v9_0_ring_patch_ce_meta +ffffffff81fdd1d0 t gfx_v9_0_ring_patch_de_meta +ffffffff81fdd2a0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81fdd600 t gfx_v9_0_emit_wave_limit +ffffffff81fdd800 t gfx_v9_0_set_eop_interrupt_state +ffffffff81fdda00 t gfx_v9_0_eop_irq +ffffffff81fddb70 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81fddd50 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81fddea0 t gfx_v9_0_priv_reg_irq +ffffffff81fddfc0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81fde110 t gfx_v9_0_priv_inst_irq +ffffffff81fde230 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81fdec20 t gfx_v9_0_is_rlc_enabled +ffffffff81fdecc0 t gfx_v9_0_set_safe_mode +ffffffff81fdee40 t gfx_v9_0_unset_safe_mode +ffffffff81fdeeb0 t gfx_v9_0_rlc_init +ffffffff81fdef30 t gfx_v9_0_get_csb_size +ffffffff81fdef60 t gfx_v9_0_get_csb_buffer +ffffffff81fdf0a0 t gfx_v9_0_cp_jump_table_num +ffffffff81fdf0f0 t gfx_v9_0_rlc_resume +ffffffff81fe0b20 t gfx_v9_0_rlc_stop +ffffffff81fe0f40 t gfx_v9_0_rlc_reset +ffffffff81fe1120 t gfx_v9_0_rlc_start +ffffffff81fe12a0 t gfx_v9_0_update_spm_vmid +ffffffff81fe12f0 t gfx_v9_0_is_rlcg_access_range +ffffffff81fe1340 t gfx_v9_0_init_csb +ffffffff81fe1500 t gfx_v9_0_enable_lbpw +ffffffff81fe1610 t gfx_v9_0_update_spm_vmid_internal +ffffffff81fe1740 t gfx_v9_0_init_always_on_cu_mask +ffffffff81fe1a00 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81fe1b10 t gfx_v9_0_mec_init +ffffffff81fe1d70 t gfx_v9_0_compute_ring_init +ffffffff81fe1ed0 t gfx_v9_0_gpu_early_init +ffffffff81fe2340 t amdgpu_bo_unreserve +ffffffff81fe2450 t gfx_v9_0_cp_gfx_enable +ffffffff81fe2550 t amdgpu_bo_reserve +ffffffff81fe26f0 t gfx_v9_0_kiq_init_register +ffffffff81fe3560 t gfx_v9_0_mqd_init +ffffffff81fe3b30 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81fe40e0 t gfx_v9_0_update_3d_clock_gating +ffffffff81fe4540 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81fe5000 t gfx_v9_4_query_ras_error_count +ffffffff81fe5ef0 t gfx_v9_4_query_ras_error_status +ffffffff81fe60f0 t gfx_v9_4_reset_ras_error_count +ffffffff81fe7000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81fe7890 T gfx_v9_4_2_init_golden_registers +ffffffff81fe7930 T gfx_v9_4_2_debug_trap_config_init +ffffffff81fe7a50 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81fe7c70 t gfx_v9_4_2_query_ras_error_count +ffffffff81fe7d40 t gfx_v9_4_2_query_ras_error_status +ffffffff81fe86e0 t gfx_v9_4_2_reset_ras_error_count +ffffffff81fe8750 t gfx_v9_4_2_reset_ras_error_status +ffffffff81fe8cb0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81fe8f10 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81fe8fb0 t gfx_v9_4_2_run_shader +ffffffff81fe93e0 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81fe9ac0 t gfx_v9_4_2_query_sram_edc_count +ffffffff81fe9e30 t gfx_v9_4_2_query_utc_edc_count +ffffffff81fea020 t wave_read_ind +ffffffff81feb000 t gfx_v9_4_3_xcp_suspend +ffffffff81feb0b0 t gfx_v9_4_3_xcp_resume +ffffffff81feb250 t gfx_v9_4_3_query_ras_error_count +ffffffff81feb270 t gfx_v9_4_3_query_ras_error_status +ffffffff81feb290 t gfx_v9_4_3_reset_ras_error_count +ffffffff81feb2b0 t gfx_v9_4_3_reset_ras_error_status +ffffffff81feb2d0 t gfx_v9_4_3_enable_watchdog_timer +ffffffff81feb2f0 t gfx_v9_4_3_early_init +ffffffff81feba60 t gfx_v9_4_3_late_init +ffffffff81febaf0 t gfx_v9_4_3_sw_init +ffffffff81febfe0 t gfx_v9_4_3_sw_fini +ffffffff81fec210 t gfx_v9_4_3_hw_init +ffffffff81fecdf0 t gfx_v9_4_3_hw_fini +ffffffff81feced0 t gfx_v9_4_3_suspend +ffffffff81fecfb0 t gfx_v9_4_3_resume +ffffffff81fecfc0 t gfx_v9_4_3_is_idle +ffffffff81fed1b0 t gfx_v9_4_3_wait_for_idle +ffffffff81fed250 t gfx_v9_4_3_soft_reset +ffffffff81feda90 t gfx_v9_4_3_set_clockgating_state +ffffffff81fedc50 t gfx_v9_4_3_set_powergating_state +ffffffff81fedc80 t gfx_v9_4_3_get_clockgating_state +ffffffff81fede30 t gfx_v9_4_3_kiq_set_resources +ffffffff81fee190 t gfx_v9_4_3_kiq_map_queues +ffffffff81fee530 t gfx_v9_4_3_kiq_unmap_queues +ffffffff81fee8f0 t gfx_v9_4_3_kiq_query_status +ffffffff81feec10 t gfx_v9_4_3_kiq_invalidate_tlbs +ffffffff81feed40 t gfx_v9_4_3_ring_get_rptr_compute +ffffffff81feed80 t gfx_v9_4_3_ring_get_wptr_compute +ffffffff81feedf0 t gfx_v9_4_3_ring_set_wptr_compute +ffffffff81feee50 t gfx_v9_4_3_ring_emit_fence_kiq +ffffffff81fef2f0 t gfx_v9_4_3_ring_test_ring +ffffffff81fef590 t gfx_v9_4_3_ring_emit_rreg +ffffffff81fef850 t gfx_v9_4_3_ring_emit_wreg +ffffffff81fefab0 t gfx_v9_4_3_ring_emit_reg_wait +ffffffff81fefb10 t gfx_v9_4_3_ring_emit_reg_write_reg_wait +ffffffff81fefb30 t gfx_v9_4_3_wait_reg_mem +ffffffff81fefe90 t gfx_v9_4_3_ring_emit_ib_compute +ffffffff81ff01f0 t gfx_v9_4_3_ring_emit_fence +ffffffff81ff05e0 t gfx_v9_4_3_ring_emit_pipeline_sync +ffffffff81ff0650 t gfx_v9_4_3_ring_emit_vm_flush +ffffffff81ff0670 t gfx_v9_4_3_ring_emit_hdp_flush +ffffffff81ff0760 t gfx_v9_4_3_ring_emit_gds_switch +ffffffff81ff0940 t gfx_v9_4_3_ring_test_ib +ffffffff81ff0b30 t gfx_v9_4_3_emit_mem_sync +ffffffff81ff0e20 t gfx_v9_4_3_emit_wave_limit +ffffffff81ff1030 t gfx_v9_4_3_write_data_to_reg +ffffffff81ff1260 t gfx_v9_4_3_set_eop_interrupt_state +ffffffff81ff13e0 t gfx_v9_4_3_eop_irq +ffffffff81ff1590 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state +ffffffff81ff1710 t gfx_v9_4_3_ih_to_xcc_inst +ffffffff81ff17f0 t gfx_v9_4_3_set_priv_reg_fault_state +ffffffff81ff1c50 t gfx_v9_4_3_priv_reg_irq +ffffffff81ff1cc0 t gfx_v9_4_3_fault +ffffffff81ff1e40 t gfx_v9_4_3_set_priv_inst_fault_state +ffffffff81ff22a0 t gfx_v9_4_3_priv_inst_irq +ffffffff81ff2310 t gfx_v9_4_3_is_rlc_enabled +ffffffff81ff2460 t gfx_v9_4_3_xcc_set_safe_mode +ffffffff81ff2770 t gfx_v9_4_3_xcc_unset_safe_mode +ffffffff81ff28b0 t gfx_v9_4_3_rlc_init +ffffffff81ff2910 t gfx_v9_4_3_rlc_resume +ffffffff81ff29d0 t gfx_v9_4_3_rlc_stop +ffffffff81ff2a80 t gfx_v9_4_3_rlc_reset +ffffffff81ff3200 t gfx_v9_4_3_rlc_start +ffffffff81ff32b0 t gfx_v9_4_3_update_spm_vmid +ffffffff81ff3510 t gfx_v9_4_3_is_rlcg_access_range +ffffffff81ff35e0 t gfx_v9_4_3_xcc_rlc_resume +ffffffff81ff3fa0 t gfx_v9_4_3_xcc_rlc_stop +ffffffff81ff4800 t gfx_v9_4_3_xcc_rlc_start +ffffffff81ff4c10 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt +ffffffff81ff4e70 t gfx_v9_4_3_xcc_select_se_sh +ffffffff81ff50a0 t gfx_v9_4_3_mec_init +ffffffff81ff5410 t gfx_v9_4_3_gpu_early_init +ffffffff81ff5660 t amdgpu_bo_unreserve +ffffffff81ff5770 t gfx_v9_4_3_get_gpu_clock_counter +ffffffff81ff5b40 t gfx_v9_4_3_read_wave_data +ffffffff81ff5ea0 t gfx_v9_4_3_read_wave_vgprs +ffffffff81ff5ec0 t gfx_v9_4_3_read_wave_sgprs +ffffffff81ff5f20 t gfx_v9_4_3_select_me_pipe_q +ffffffff81ff5fa0 t gfx_v9_4_3_switch_compute_partition +ffffffff81ff6350 t wave_read_ind +ffffffff81ff6590 t wave_read_regs +ffffffff81ff6870 t gfx_v9_4_3_xcc_constants_init +ffffffff81ff7be0 t gfx_v9_4_3_xcc_cp_resume +ffffffff81ff8e80 t gfx_v9_4_3_xcc_cp_compute_enable +ffffffff81ff9060 t amdgpu_bo_reserve +ffffffff81ff9200 t gfx_v9_4_3_xcc_kiq_init_register +ffffffff81ffb2a0 t gfx_v9_4_3_xcc_mqd_init +ffffffff81ffbe40 t gfx_v9_4_3_xcc_fini +ffffffff81ffc4c0 t gfx_v9_4_3_xcc_q_fini_register +ffffffff81ffd020 t gfx_v9_4_3_xcc_update_sram_fgcg +ffffffff81ffd2d0 t gfx_v9_4_3_xcc_update_repeater_fgcg +ffffffff81ffd580 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating +ffffffff81ffe270 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating +ffffffff81ffec00 t gfx_v9_4_3_inst_query_ras_err_count +ffffffff81ffeeb0 t gfx_v9_4_3_inst_query_ras_err_status +ffffffff81fffea0 t gfx_v9_4_3_inst_reset_ras_err_count +ffffffff82000090 t gfx_v9_4_3_inst_reset_ras_err_status +ffffffff82000930 t gfx_v9_4_3_inst_enable_watchdog_timer +ffffffff82001000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff820010a0 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff820011f0 t gfxhub_v1_0_gart_enable +ffffffff820029c0 t gfxhub_v1_0_gart_disable +ffffffff82002cb0 t gfxhub_v1_0_set_fault_enable_default +ffffffff82002db0 t gfxhub_v1_0_init +ffffffff82003000 T gfxhub_v1_1_get_xgmi_info +ffffffff82004000 t gfxhub_v1_2_get_mc_fb_offset +ffffffff82004150 t gfxhub_v1_2_setup_vm_pt_regs +ffffffff820041c0 t gfxhub_v1_2_gart_enable +ffffffff82004250 t gfxhub_v1_2_gart_disable +ffffffff820042b0 t gfxhub_v1_2_set_fault_enable_default +ffffffff82004320 t gfxhub_v1_2_init +ffffffff82004680 t gfxhub_v1_2_get_xgmi_info +ffffffff82004930 t gfxhub_v1_2_xcp_suspend +ffffffff82004980 t gfxhub_v1_2_xcp_resume +ffffffff82004a00 t gfxhub_v1_2_xcc_setup_vm_pt_regs +ffffffff82004d60 t gfxhub_v1_2_xcc_gart_enable +ffffffff820089d0 t gfxhub_v1_2_xcc_gart_disable +ffffffff82009130 t gfxhub_v1_2_xcc_set_fault_enable_default +ffffffff8200a000 t gfxhub_v2_0_get_fb_location +ffffffff8200a0a0 t gfxhub_v2_0_get_mc_fb_offset +ffffffff8200a140 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff8200a290 t gfxhub_v2_0_gart_enable +ffffffff8200b730 t gfxhub_v2_0_gart_disable +ffffffff8200b9a0 t gfxhub_v2_0_set_fault_enable_default +ffffffff8200baa0 t gfxhub_v2_0_init +ffffffff8200bb70 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff8200bd90 t gfxhub_v2_0_get_invalidate_req +ffffffff8200c000 t gfxhub_v2_1_get_fb_location +ffffffff8200c0a0 t gfxhub_v2_1_get_mc_fb_offset +ffffffff8200c140 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff8200c290 t gfxhub_v2_1_gart_enable +ffffffff8200d830 t gfxhub_v2_1_gart_disable +ffffffff8200daa0 t gfxhub_v2_1_set_fault_enable_default +ffffffff8200dbc0 t gfxhub_v2_1_init +ffffffff8200dc90 t gfxhub_v2_1_get_xgmi_info +ffffffff8200ddf0 t gfxhub_v2_1_utcl2_harvest +ffffffff8200dfe0 t gfxhub_v2_1_save_regs +ffffffff8200eb30 t gfxhub_v2_1_restore_regs +ffffffff8200f900 t gfxhub_v2_1_halt +ffffffff8200fd50 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff8200ff70 t gfxhub_v2_1_get_invalidate_req +ffffffff82010000 t gfxhub_v3_0_get_fb_location +ffffffff820100a0 t gfxhub_v3_0_get_mc_fb_offset +ffffffff82010140 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff82010290 t gfxhub_v3_0_gart_enable +ffffffff82011830 t gfxhub_v3_0_gart_disable +ffffffff82011b10 t gfxhub_v3_0_set_fault_enable_default +ffffffff82011d00 t gfxhub_v3_0_init +ffffffff82011dd0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff82011ff0 t gfxhub_v3_0_get_invalidate_req +ffffffff82013000 t gfxhub_v3_0_3_get_fb_location +ffffffff820130a0 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff82013140 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff82013290 t gfxhub_v3_0_3_gart_enable +ffffffff820146f0 t gfxhub_v3_0_3_gart_disable +ffffffff820149f0 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff82014b10 t gfxhub_v3_0_3_init +ffffffff82014be0 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff82014e00 t gfxhub_v3_0_3_get_invalidate_req +ffffffff82015000 t gmc_v10_0_early_init +ffffffff82015170 t gmc_v10_0_late_init +ffffffff820151f0 t gmc_v10_0_sw_init +ffffffff82015690 t gmc_v10_0_sw_fini +ffffffff82015710 t gmc_v10_0_hw_init +ffffffff82015990 t gmc_v10_0_hw_fini +ffffffff82015a80 t gmc_v10_0_suspend +ffffffff82015ac0 t gmc_v10_0_resume +ffffffff82015b20 t gmc_v10_0_is_idle +ffffffff82015b50 t gmc_v10_0_wait_for_idle +ffffffff82015b80 t gmc_v10_0_soft_reset +ffffffff82015bb0 t gmc_v10_0_set_clockgating_state +ffffffff82015c70 t gmc_v10_0_set_powergating_state +ffffffff82015ca0 t gmc_v10_0_get_clockgating_state +ffffffff82015d50 t gmc_v10_0_flush_gpu_tlb +ffffffff82016060 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff82016380 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff82016560 t gmc_v10_0_emit_pasid_mapping +ffffffff820165e0 t gmc_v10_0_map_mtype +ffffffff82016630 t gmc_v10_0_get_vm_pde +ffffffff82016730 t gmc_v10_0_get_vm_pte +ffffffff82016810 t gmc_v10_0_get_vbios_fb_size +ffffffff820169a0 t gmc_v10_0_flush_vm_hub +ffffffff82016e40 t gmc_v10_0_vm_fault_interrupt_state +ffffffff82016ef0 t gmc_v10_0_process_interrupt +ffffffff82017220 t gmc_v10_0_ecc_interrupt_state +ffffffff82017250 t gmc_v10_0_gart_init +ffffffff82018000 t gmc_v11_0_early_init +ffffffff820181f0 t gmc_v11_0_late_init +ffffffff82018270 t gmc_v11_0_sw_init +ffffffff82018630 t gmc_v11_0_sw_fini +ffffffff820186b0 t gmc_v11_0_hw_init +ffffffff82018860 t gmc_v11_0_hw_fini +ffffffff82018920 t gmc_v11_0_suspend +ffffffff820189e0 t gmc_v11_0_resume +ffffffff82018a40 t gmc_v11_0_is_idle +ffffffff82018a70 t gmc_v11_0_wait_for_idle +ffffffff82018aa0 t gmc_v11_0_soft_reset +ffffffff82018ad0 t gmc_v11_0_set_clockgating_state +ffffffff82018b50 t gmc_v11_0_set_powergating_state +ffffffff82018b80 t gmc_v11_0_get_clockgating_state +ffffffff82018bc0 t gmc_v11_0_flush_gpu_tlb +ffffffff820190f0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff820193c0 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff820195a0 t gmc_v11_0_emit_pasid_mapping +ffffffff82019620 t gmc_v11_0_map_mtype +ffffffff82019670 t gmc_v11_0_get_vm_pde +ffffffff82019770 t gmc_v11_0_get_vm_pte +ffffffff82019850 t gmc_v11_0_get_vbios_fb_size +ffffffff820199e0 t gmc_v11_0_vm_fault_interrupt_state +ffffffff82019a90 t gmc_v11_0_process_interrupt +ffffffff82019cf0 t gmc_v11_0_ecc_interrupt_state +ffffffff82019d20 t gmc_v11_0_gart_init +ffffffff8201a000 t gmc_v7_0_early_init +ffffffff8201a0a0 t gmc_v7_0_late_init +ffffffff8201a0f0 t gmc_v7_0_sw_init +ffffffff8201a610 t gmc_v7_0_sw_fini +ffffffff8201a6c0 t gmc_v7_0_hw_init +ffffffff8201b350 t gmc_v7_0_hw_fini +ffffffff8201b460 t gmc_v7_0_suspend +ffffffff8201b4a0 t gmc_v7_0_resume +ffffffff8201b500 t gmc_v7_0_is_idle +ffffffff8201b550 t gmc_v7_0_wait_for_idle +ffffffff8201b600 t gmc_v7_0_soft_reset +ffffffff8201b910 t gmc_v7_0_set_clockgating_state +ffffffff8201bbb0 t gmc_v7_0_set_powergating_state +ffffffff8201bbe0 t gmc_v7_0_flush_gpu_tlb +ffffffff8201bc10 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff8201bcf0 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff8201bda0 t gmc_v7_0_emit_pasid_mapping +ffffffff8201bdd0 t gmc_v7_0_set_prt +ffffffff8201bff0 t gmc_v7_0_get_vm_pde +ffffffff8201c050 t gmc_v7_0_get_vm_pte +ffffffff8201c090 t gmc_v7_0_get_vbios_fb_size +ffffffff8201c110 t gmc_v7_0_vm_fault_interrupt_state +ffffffff8201c210 t gmc_v7_0_process_interrupt +ffffffff8201c520 t gmc_v7_0_gart_init +ffffffff8201d000 t gmc_v8_0_early_init +ffffffff8201d0a0 t gmc_v8_0_late_init +ffffffff8201d0f0 t gmc_v8_0_sw_init +ffffffff8201d7b0 t gmc_v8_0_sw_fini +ffffffff8201d860 t gmc_v8_0_hw_init +ffffffff8201e890 t gmc_v8_0_hw_fini +ffffffff8201e9a0 t gmc_v8_0_suspend +ffffffff8201e9e0 t gmc_v8_0_resume +ffffffff8201ea40 t gmc_v8_0_is_idle +ffffffff8201ea90 t gmc_v8_0_wait_for_idle +ffffffff8201eb40 t gmc_v8_0_check_soft_reset +ffffffff8201ebc0 t gmc_v8_0_pre_soft_reset +ffffffff8201ed70 t gmc_v8_0_soft_reset +ffffffff8201ee70 t gmc_v8_0_post_soft_reset +ffffffff8201ef00 t gmc_v8_0_set_clockgating_state +ffffffff8201f730 t gmc_v8_0_set_powergating_state +ffffffff8201f760 t gmc_v8_0_get_clockgating_state +ffffffff8201f7d0 t gmc_v8_0_flush_gpu_tlb +ffffffff8201f800 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff8201f8e0 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff8201f990 t gmc_v8_0_emit_pasid_mapping +ffffffff8201f9c0 t gmc_v8_0_set_prt +ffffffff8201fbe0 t gmc_v8_0_get_vm_pde +ffffffff8201fc40 t gmc_v8_0_get_vm_pte +ffffffff8201fc90 t gmc_v8_0_get_vbios_fb_size +ffffffff8201fd10 t gmc_v8_0_vm_fault_interrupt_state +ffffffff8201fe10 t gmc_v8_0_process_interrupt +ffffffff82020230 t gmc_v8_0_gart_init +ffffffff82021000 T gmc_v9_0_restore_registers +ffffffff82021170 t gmc_v9_0_early_init +ffffffff82021540 t gmc_v9_0_late_init +ffffffff82021670 t gmc_v9_0_sw_init +ffffffff82021ee0 t gmc_v9_0_sw_fini +ffffffff82021fe0 t gmc_v9_0_hw_init +ffffffff82022560 t gmc_v9_0_hw_fini +ffffffff82022660 t gmc_v9_0_suspend +ffffffff820226a0 t gmc_v9_0_resume +ffffffff82022700 t gmc_v9_0_is_idle +ffffffff82022730 t gmc_v9_0_wait_for_idle +ffffffff82022760 t gmc_v9_0_soft_reset +ffffffff82022790 t gmc_v9_0_set_clockgating_state +ffffffff82022800 t gmc_v9_0_set_powergating_state +ffffffff82022830 t gmc_v9_0_get_clockgating_state +ffffffff82022870 t gmc_v9_0_flush_gpu_tlb +ffffffff82022fa0 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff820233e0 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff82023610 t gmc_v9_0_emit_pasid_mapping +ffffffff82023690 t gmc_v9_0_map_mtype +ffffffff820236d0 t gmc_v9_0_get_vm_pde +ffffffff820237e0 t gmc_v9_0_get_vm_pte +ffffffff82023b20 t gmc_v9_0_override_vm_pte_flags +ffffffff82023be0 t gmc_v9_0_get_vbios_fb_size +ffffffff82023d90 t gmc_v9_0_query_memory_partition +ffffffff82023df0 t gmc_v9_0_vm_fault_interrupt_state +ffffffff820242d0 t gmc_v9_0_process_interrupt +ffffffff82024ba0 t gmc_v9_0_ecc_interrupt_state +ffffffff82024d50 t gmc_v9_0_init_mem_ranges +ffffffff820251b0 t gmc_v9_0_gart_init +ffffffff82025320 t gmc_v9_0_save_registers +ffffffff82026000 t hdp_v4_0_query_ras_error_count +ffffffff820260d0 t hdp_v4_0_reset_ras_error_count +ffffffff82026200 t hdp_v4_0_flush_hdp +ffffffff82026250 t hdp_v4_0_invalidate_hdp +ffffffff82026330 t hdp_v4_0_update_clock_gating +ffffffff82026440 t hdp_v4_0_get_clockgating_state +ffffffff820264a0 t hdp_v4_0_init_registers +ffffffff82027000 t hdp_v5_0_flush_hdp +ffffffff82027050 t hdp_v5_0_invalidate_hdp +ffffffff820270f0 t hdp_v5_0_update_clock_gating +ffffffff82027530 t hdp_v5_0_get_clockgating_state +ffffffff82027670 t hdp_v5_0_init_registers +ffffffff82028000 t hdp_v5_2_flush_hdp +ffffffff82028050 t hdp_v5_2_update_clock_gating +ffffffff820284a0 t hdp_v5_2_get_clockgating_state +ffffffff82029000 t hdp_v6_0_flush_hdp +ffffffff82029050 t hdp_v6_0_update_clock_gating +ffffffff820293b0 t hdp_v6_0_get_clockgating_state +ffffffff8202a000 t iceland_ih_early_init +ffffffff8202a050 t iceland_ih_sw_init +ffffffff8202a0c0 t iceland_ih_sw_fini +ffffffff8202a120 t iceland_ih_hw_init +ffffffff8202a410 t iceland_ih_hw_fini +ffffffff8202a520 t iceland_ih_suspend +ffffffff8202a630 t iceland_ih_resume +ffffffff8202a670 t iceland_ih_is_idle +ffffffff8202a6c0 t iceland_ih_wait_for_idle +ffffffff8202a770 t iceland_ih_soft_reset +ffffffff8202a890 t iceland_ih_set_clockgating_state +ffffffff8202a8c0 t iceland_ih_set_powergating_state +ffffffff8202a8f0 t iceland_ih_get_wptr +ffffffff8202aa20 t iceland_ih_decode_iv +ffffffff8202aaa0 t iceland_ih_set_rptr +ffffffff8202b000 t ih_v6_0_early_init +ffffffff8202b050 t ih_v6_0_sw_init +ffffffff8202b1d0 t ih_v6_0_sw_fini +ffffffff8202b210 t ih_v6_0_hw_init +ffffffff8202b8a0 t ih_v6_0_hw_fini +ffffffff8202b910 t ih_v6_0_suspend +ffffffff8202b980 t ih_v6_0_resume +ffffffff8202b990 t ih_v6_0_is_idle +ffffffff8202b9c0 t ih_v6_0_wait_for_idle +ffffffff8202b9f0 t ih_v6_0_soft_reset +ffffffff8202ba20 t ih_v6_0_set_clockgating_state +ffffffff8202bb60 t ih_v6_0_set_powergating_state +ffffffff8202bd00 t ih_v6_0_get_clockgating_state +ffffffff8202bda0 t ih_v6_0_get_wptr +ffffffff8202bee0 t ih_v6_0_set_rptr +ffffffff8202bfc0 t ih_v6_0_self_irq +ffffffff8202c030 t ih_v6_0_toggle_interrupts +ffffffff8202c250 t force_update_wptr_for_self_int +ffffffff8202d000 t ih_v6_1_early_init +ffffffff8202d050 t ih_v6_1_sw_init +ffffffff8202d1d0 t ih_v6_1_sw_fini +ffffffff8202d210 t ih_v6_1_hw_init +ffffffff8202d8a0 t ih_v6_1_hw_fini +ffffffff8202d910 t ih_v6_1_suspend +ffffffff8202d980 t ih_v6_1_resume +ffffffff8202d990 t ih_v6_1_is_idle +ffffffff8202d9c0 t ih_v6_1_wait_for_idle +ffffffff8202d9f0 t ih_v6_1_soft_reset +ffffffff8202da20 t ih_v6_1_set_clockgating_state +ffffffff8202db60 t ih_v6_1_set_powergating_state +ffffffff8202dd00 t ih_v6_1_get_clockgating_state +ffffffff8202dda0 t ih_v6_1_get_wptr +ffffffff8202dee0 t ih_v6_1_set_rptr +ffffffff8202dfc0 t ih_v6_1_self_irq +ffffffff8202e030 t ih_v6_1_toggle_interrupts +ffffffff8202e250 t force_update_wptr_for_self_int +ffffffff8202f000 t imu_v11_0_init_microcode +ffffffff8202f1b0 t imu_v11_0_load_microcode +ffffffff8202f580 t imu_v11_0_setup +ffffffff8202f860 t imu_v11_0_start +ffffffff8202f980 t imu_v11_0_program_rlc_ram +ffffffff8202fb60 t imu_v11_0_wait_for_reset_status +ffffffff8202fce0 t program_imu_rlc_ram +ffffffff82031000 T imu_v11_0_3_program_rlc_ram +ffffffff82032000 T jpeg_v1_0_early_init +ffffffff82032080 T jpeg_v1_0_sw_init +ffffffff82032190 T jpeg_v1_0_sw_fini +ffffffff820321b0 T jpeg_v1_0_start +ffffffff82032cf0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff82032d80 t jpeg_v1_0_decode_ring_get_wptr +ffffffff82032e10 t jpeg_v1_0_decode_ring_set_wptr +ffffffff82032e80 t jpeg_v1_0_decode_ring_emit_ib +ffffffff82033860 t jpeg_v1_0_decode_ring_emit_fence +ffffffff820342b0 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff82034320 t jpeg_v1_0_decode_ring_nop +ffffffff82034480 t jpeg_v1_0_decode_ring_insert_start +ffffffff82034660 t jpeg_v1_0_decode_ring_insert_end +ffffffff82034840 t jpeg_v1_0_ring_begin_use +ffffffff82034970 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff82034c00 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff82035060 t jpeg_v1_0_set_interrupt_state +ffffffff82035090 t jpeg_v1_0_process_interrupt +ffffffff82036000 T jpeg_v2_0_dec_ring_insert_start +ffffffff820361c0 T jpeg_v2_0_dec_ring_insert_end +ffffffff82036380 T jpeg_v2_0_dec_ring_emit_fence +ffffffff82036af0 T jpeg_v2_0_dec_ring_emit_ib +ffffffff82037380 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff82037780 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff820377f0 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff82037a50 T jpeg_v2_0_dec_ring_nop +ffffffff82037bb0 t jpeg_v2_0_early_init +ffffffff82037c40 t jpeg_v2_0_sw_init +ffffffff82037d90 t jpeg_v2_0_sw_fini +ffffffff82037df0 t jpeg_v2_0_hw_init +ffffffff82037e80 t jpeg_v2_0_hw_fini +ffffffff82037f70 t jpeg_v2_0_suspend +ffffffff82037fa0 t jpeg_v2_0_resume +ffffffff82038050 t jpeg_v2_0_is_idle +ffffffff820380f0 t jpeg_v2_0_wait_for_idle +ffffffff82038130 t jpeg_v2_0_set_clockgating_state +ffffffff820381f0 t jpeg_v2_0_set_powergating_state +ffffffff82038a60 t jpeg_v2_0_dec_ring_get_rptr +ffffffff82038af0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff82038ba0 t jpeg_v2_0_dec_ring_set_wptr +ffffffff82038c40 t jpeg_v2_0_set_interrupt_state +ffffffff82038c70 t jpeg_v2_0_process_interrupt +ffffffff82038d10 t jpeg_v2_0_enable_clock_gating +ffffffff82038ee0 t jpeg_v2_0_disable_clock_gating +ffffffff8203a000 t jpeg_v2_6_query_ras_poison_status +ffffffff8203a160 t jpeg_v2_5_early_init +ffffffff8203a380 t jpeg_v2_5_sw_init +ffffffff8203a660 t jpeg_v2_5_sw_fini +ffffffff8203a6c0 t jpeg_v2_5_hw_init +ffffffff8203a7c0 t jpeg_v2_5_hw_fini +ffffffff8203a980 t jpeg_v2_5_suspend +ffffffff8203a9b0 t jpeg_v2_5_resume +ffffffff8203aad0 t jpeg_v2_5_is_idle +ffffffff8203abe0 t jpeg_v2_5_wait_for_idle +ffffffff8203aca0 t jpeg_v2_5_set_clockgating_state +ffffffff8203ad60 t jpeg_v2_5_set_powergating_state +ffffffff8203b5c0 t jpeg_v2_5_dec_ring_get_rptr +ffffffff8203b660 t jpeg_v2_5_dec_ring_get_wptr +ffffffff8203b710 t jpeg_v2_5_dec_ring_set_wptr +ffffffff8203b7c0 t jpeg_v2_6_dec_ring_insert_start +ffffffff8203b9a0 t jpeg_v2_6_dec_ring_insert_end +ffffffff8203bb80 t jpeg_v2_5_set_interrupt_state +ffffffff8203bbb0 t jpeg_v2_5_process_interrupt +ffffffff8203bc90 t jpeg_v2_6_set_ras_interrupt_state +ffffffff8203bcc0 t jpeg_v2_5_enable_clock_gating +ffffffff8203bda0 t jpeg_v2_5_disable_clock_gating +ffffffff8203d000 t jpeg_v3_0_early_init +ffffffff8203d120 t jpeg_v3_0_sw_init +ffffffff8203d270 t jpeg_v3_0_sw_fini +ffffffff8203d2d0 t jpeg_v3_0_hw_init +ffffffff8203d360 t jpeg_v3_0_hw_fini +ffffffff8203d450 t jpeg_v3_0_suspend +ffffffff8203d480 t jpeg_v3_0_resume +ffffffff8203d530 t jpeg_v3_0_is_idle +ffffffff8203d5d0 t jpeg_v3_0_wait_for_idle +ffffffff8203d610 t jpeg_v3_0_set_clockgating_state +ffffffff8203d6d0 t jpeg_v3_0_set_powergating_state +ffffffff8203e020 t jpeg_v3_0_dec_ring_get_rptr +ffffffff8203e0b0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff8203e160 t jpeg_v3_0_dec_ring_set_wptr +ffffffff8203e200 t jpeg_v3_0_set_interrupt_state +ffffffff8203e230 t jpeg_v3_0_process_interrupt +ffffffff8203e2d0 t jpeg_v3_0_enable_clock_gating +ffffffff8203e3b0 t jpeg_v3_0_disable_clock_gating +ffffffff8203f000 t jpeg_v4_0_query_ras_poison_status +ffffffff8203f160 t jpeg_v4_0_early_init +ffffffff8203f240 t jpeg_v4_0_sw_init +ffffffff8203f410 t jpeg_v4_0_sw_fini +ffffffff8203f470 t jpeg_v4_0_hw_init +ffffffff8203fb60 t jpeg_v4_0_hw_fini +ffffffff8203fc60 t jpeg_v4_0_suspend +ffffffff8203fc90 t jpeg_v4_0_resume +ffffffff8203fcf0 t jpeg_v4_0_is_idle +ffffffff8203fd90 t jpeg_v4_0_wait_for_idle +ffffffff8203fdd0 t jpeg_v4_0_set_clockgating_state +ffffffff8203fea0 t jpeg_v4_0_set_powergating_state +ffffffff82040760 t jpeg_v4_0_dec_ring_get_rptr +ffffffff820407f0 t jpeg_v4_0_dec_ring_get_wptr +ffffffff820408a0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff82040940 t jpeg_v4_0_set_interrupt_state +ffffffff82040970 t jpeg_v4_0_process_interrupt +ffffffff82040a20 t jpeg_v4_0_set_ras_interrupt_state +ffffffff82040a50 t jpeg_v4_0_enable_clock_gating +ffffffff82040c30 t jpeg_v4_0_disable_clock_gating +ffffffff82041000 t jpeg_v4_0_3_early_init +ffffffff82041180 t jpeg_v4_0_3_sw_init +ffffffff82041500 t jpeg_v4_0_3_sw_fini +ffffffff82041560 t jpeg_v4_0_3_hw_init +ffffffff820420a0 t jpeg_v4_0_3_hw_fini +ffffffff82042150 t jpeg_v4_0_3_suspend +ffffffff820421f0 t jpeg_v4_0_3_resume +ffffffff82042250 t jpeg_v4_0_3_is_idle +ffffffff82042460 t jpeg_v4_0_3_wait_for_idle +ffffffff820425d0 t jpeg_v4_0_3_set_clockgating_state +ffffffff82042670 t jpeg_v4_0_3_set_powergating_state +ffffffff82043450 t jpeg_v4_0_3_dec_ring_get_rptr +ffffffff820435f0 t jpeg_v4_0_3_dec_ring_get_wptr +ffffffff820437b0 t jpeg_v4_0_3_dec_ring_set_wptr +ffffffff82043960 t jpeg_v4_0_3_dec_ring_emit_ib +ffffffff82044280 t jpeg_v4_0_3_dec_ring_emit_fence +ffffffff82044ad0 t jpeg_v4_0_3_dec_ring_emit_vm_flush +ffffffff82044b40 t jpeg_v4_0_3_dec_ring_nop +ffffffff82044ca0 t jpeg_v4_0_3_dec_ring_insert_start +ffffffff82044e60 t jpeg_v4_0_3_dec_ring_insert_end +ffffffff82045020 t jpeg_v4_0_3_dec_ring_emit_wreg +ffffffff82045280 t jpeg_v4_0_3_dec_ring_emit_reg_wait +ffffffff82045680 t jpeg_v4_0_3_set_interrupt_state +ffffffff820456b0 t jpeg_v4_0_3_process_interrupt +ffffffff82045960 t jpeg_v4_0_3_query_ras_error_count +ffffffff82045a80 t jpeg_v4_0_3_reset_ras_error_count +ffffffff82045b90 t jpeg_v4_0_3_disable_clock_gating +ffffffff82046000 t lsdma_v6_0_copy_mem +ffffffff820463e0 t lsdma_v6_0_fill_mem +ffffffff82046740 t lsdma_v6_0_update_memory_power_gating +ffffffff82047000 t mca_v3_0_ras_block_match +ffffffff82047050 t mca_v3_0_mp0_query_ras_error_count +ffffffff82047070 t mca_v3_0_mp1_query_ras_error_count +ffffffff82047090 t mca_v3_0_mpio_query_ras_error_count +ffffffff82048000 t mes_v10_0_early_init +ffffffff82048070 t mes_v10_0_late_init +ffffffff820480c0 t mes_v10_1_sw_init +ffffffff82048630 t mes_v10_1_sw_fini +ffffffff820487c0 t mes_v10_1_hw_init +ffffffff820491b0 t mes_v10_1_hw_fini +ffffffff820492c0 t mes_v10_1_suspend +ffffffff82049400 t mes_v10_1_resume +ffffffff82049460 t mes_v10_1_kiq_hw_init +ffffffff820498f0 t mes_v10_1_add_hw_queue +ffffffff82049a80 t mes_v10_1_remove_hw_queue +ffffffff82049b20 t mes_v10_1_unmap_legacy_queue +ffffffff82049c20 t mes_v10_1_suspend_gang +ffffffff82049c50 t mes_v10_1_resume_gang +ffffffff82049c80 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff82049ed0 t mes_v10_1_load_microcode +ffffffff8204a7f0 t mes_v10_1_enable +ffffffff8204ad00 t mes_v10_1_queue_init +ffffffff8204afe0 t amdgpu_bo_unreserve +ffffffff8204b0f0 t mes_v10_1_ring_get_rptr +ffffffff8204b120 t mes_v10_1_ring_get_wptr +ffffffff8204b190 t mes_v10_1_ring_set_wptr +ffffffff8204c000 t mes_v11_0_early_init +ffffffff8204c070 t mes_v11_0_late_init +ffffffff8204c0e0 t mes_v11_0_sw_init +ffffffff8204c650 t mes_v11_0_sw_fini +ffffffff8204c8a0 t mes_v11_0_hw_init +ffffffff8204d1b0 t mes_v11_0_hw_fini +ffffffff8204d1e0 t mes_v11_0_suspend +ffffffff8204d1f0 t mes_v11_0_resume +ffffffff8204d250 t mes_v11_0_kiq_hw_init +ffffffff8204d4a0 t mes_v11_0_kiq_hw_fini +ffffffff8204d600 t mes_v11_0_add_hw_queue +ffffffff8204d810 t mes_v11_0_remove_hw_queue +ffffffff8204d8b0 t mes_v11_0_unmap_legacy_queue +ffffffff8204d9d0 t mes_v11_0_suspend_gang +ffffffff8204da00 t mes_v11_0_resume_gang +ffffffff8204da30 t mes_v11_0_misc_op +ffffffff8204dbf0 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff8204de50 t mes_v11_0_load_microcode +ffffffff8204e6f0 t mes_v11_0_enable +ffffffff8204eca0 t mes_v11_0_queue_init +ffffffff8204f920 t amdgpu_bo_unreserve +ffffffff8204fa30 t mes_v11_0_mqd_init +ffffffff8204fc50 t mes_v11_0_kiq_dequeue +ffffffff82050140 t mes_v11_0_ring_get_rptr +ffffffff82050170 t mes_v11_0_ring_get_wptr +ffffffff820501e0 t mes_v11_0_ring_set_wptr +ffffffff82051000 t mmhub_v1_0_query_ras_error_count +ffffffff82051160 t mmhub_v1_0_reset_ras_error_count +ffffffff82051230 t mmhub_v1_0_get_fb_location +ffffffff82051360 t mmhub_v1_0_init +ffffffff82051410 t mmhub_v1_0_gart_enable +ffffffff820529c0 t mmhub_v1_0_set_fault_enable_default +ffffffff82052ae0 t mmhub_v1_0_gart_disable +ffffffff82052db0 t mmhub_v1_0_set_clockgating +ffffffff820532a0 t mmhub_v1_0_get_clockgating +ffffffff820533e0 t mmhub_v1_0_setup_vm_pt_regs +ffffffff82053530 t mmhub_v1_0_update_power_gating +ffffffff82054000 t mmhub_v1_7_query_ras_error_count +ffffffff82054160 t mmhub_v1_7_query_ras_error_status +ffffffff82054270 t mmhub_v1_7_reset_ras_error_count +ffffffff82054320 t mmhub_v1_7_reset_ras_error_status +ffffffff82054440 t mmhub_v1_7_get_fb_location +ffffffff82054570 t mmhub_v1_7_init +ffffffff82054610 t mmhub_v1_7_gart_enable +ffffffff82055df0 t mmhub_v1_7_set_fault_enable_default +ffffffff82055f10 t mmhub_v1_7_gart_disable +ffffffff820561e0 t mmhub_v1_7_set_clockgating +ffffffff820565c0 t mmhub_v1_7_get_clockgating +ffffffff82056700 t mmhub_v1_7_setup_vm_pt_regs +ffffffff82057000 t mmhub_v1_8_get_fb_location +ffffffff82057130 t mmhub_v1_8_init +ffffffff820572b0 t mmhub_v1_8_gart_enable +ffffffff820591d0 t mmhub_v1_8_set_fault_enable_default +ffffffff820593c0 t mmhub_v1_8_gart_disable +ffffffff82059760 t mmhub_v1_8_set_clockgating +ffffffff82059790 t mmhub_v1_8_get_clockgating +ffffffff820597c0 t mmhub_v1_8_setup_vm_pt_regs +ffffffff820599f0 t mmhub_v1_8_query_ras_error_count +ffffffff82059b80 t mmhub_v1_8_query_ras_error_status +ffffffff82059e80 t mmhub_v1_8_reset_ras_error_count +ffffffff82059fc0 t mmhub_v1_8_reset_ras_error_status +ffffffff8205b000 t mmhub_v2_0_init +ffffffff8205b0d0 t mmhub_v2_0_gart_enable +ffffffff8205c4f0 t mmhub_v2_0_set_fault_enable_default +ffffffff8205c610 t mmhub_v2_0_gart_disable +ffffffff8205c8e0 t mmhub_v2_0_set_clockgating +ffffffff8205cc70 t mmhub_v2_0_get_clockgating +ffffffff8205ce30 t mmhub_v2_0_setup_vm_pt_regs +ffffffff8205cf90 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff8205d230 t mmhub_v2_0_get_invalidate_req +ffffffff8205e000 t mmhub_v2_3_init +ffffffff8205e0e0 t mmhub_v2_3_gart_enable +ffffffff8205f760 t mmhub_v2_3_set_fault_enable_default +ffffffff8205f860 t mmhub_v2_3_gart_disable +ffffffff8205fb40 t mmhub_v2_3_set_clockgating +ffffffff82060050 t mmhub_v2_3_get_clockgating +ffffffff82060270 t mmhub_v2_3_setup_vm_pt_regs +ffffffff820603c0 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff82060610 t mmhub_v2_3_get_invalidate_req +ffffffff82061000 t mmhub_v3_0_get_fb_location +ffffffff820610a0 t mmhub_v3_0_get_mc_fb_offset +ffffffff82061140 t mmhub_v3_0_init +ffffffff82061220 t mmhub_v3_0_gart_enable +ffffffff82062690 t mmhub_v3_0_set_fault_enable_default +ffffffff820627b0 t mmhub_v3_0_gart_disable +ffffffff82062a80 t mmhub_v3_0_set_clockgating +ffffffff82062c70 t mmhub_v3_0_get_clockgating +ffffffff82062d30 t mmhub_v3_0_setup_vm_pt_regs +ffffffff82062e80 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff820630d0 t mmhub_v3_0_get_invalidate_req +ffffffff82064000 t mmhub_v3_0_1_get_fb_location +ffffffff820640a0 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff82064140 t mmhub_v3_0_1_init +ffffffff82064210 t mmhub_v3_0_1_gart_enable +ffffffff820657a0 t mmhub_v3_0_1_set_fault_enable_default +ffffffff820658a0 t mmhub_v3_0_1_gart_disable +ffffffff82065b80 t mmhub_v3_0_1_set_clockgating +ffffffff82065d70 t mmhub_v3_0_1_get_clockgating +ffffffff82065e30 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff82065f80 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff820661d0 t mmhub_v3_0_1_get_invalidate_req +ffffffff82067000 t mmhub_v3_0_2_get_fb_location +ffffffff820670a0 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff82067140 t mmhub_v3_0_2_init +ffffffff82067210 t mmhub_v3_0_2_gart_enable +ffffffff82068660 t mmhub_v3_0_2_set_fault_enable_default +ffffffff82068780 t mmhub_v3_0_2_gart_disable +ffffffff82068a50 t mmhub_v3_0_2_set_clockgating +ffffffff82068a80 t mmhub_v3_0_2_get_clockgating +ffffffff82068ab0 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff82068c00 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff82068e30 t mmhub_v3_0_2_get_invalidate_req +ffffffff82069000 t mmhub_v9_4_query_ras_error_count +ffffffff82069160 t mmhub_v9_4_query_ras_error_status +ffffffff82069270 t mmhub_v9_4_reset_ras_error_count +ffffffff82069340 t mmhub_v9_4_get_fb_location +ffffffff82069470 t mmhub_v9_4_init +ffffffff820695c0 t mmhub_v9_4_gart_enable +ffffffff8206ac60 t mmhub_v9_4_set_fault_enable_default +ffffffff8206ae70 t mmhub_v9_4_gart_disable +ffffffff8206b210 t mmhub_v9_4_set_clockgating +ffffffff8206b750 t mmhub_v9_4_get_clockgating +ffffffff8206b890 t mmhub_v9_4_setup_vm_pt_regs +ffffffff8206b8e0 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff8206c000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff8206c050 T xgpu_ai_mailbox_add_irq_id +ffffffff8206c100 T xgpu_ai_mailbox_get_irq +ffffffff8206c1d0 t xgpu_ai_mailbox_flr_work +ffffffff8206c470 T xgpu_ai_mailbox_put_irq +ffffffff8206c4b0 t xgpu_ai_request_full_gpu_access +ffffffff8206c4d0 t xgpu_ai_release_full_gpu_access +ffffffff8206c4f0 t xgpu_ai_request_init_data +ffffffff8206c560 t xgpu_ai_request_reset +ffffffff8206c630 t xgpu_ai_mailbox_trans_msg +ffffffff8206c8f0 t xgpu_ai_ras_poison_handler +ffffffff8206c920 t xgpu_ai_set_mailbox_ack_irq +ffffffff8206c9c0 t xgpu_ai_mailbox_ack_irq +ffffffff8206ca20 t xgpu_ai_set_mailbox_rcv_irq +ffffffff8206cac0 t xgpu_ai_mailbox_rcv_irq +ffffffff8206cbd0 t xgpu_ai_send_access_requests +ffffffff8206ccf0 t xgpu_ai_poll_msg +ffffffff8206d000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff8206d050 T xgpu_nv_mailbox_add_irq_id +ffffffff8206d100 T xgpu_nv_mailbox_get_irq +ffffffff8206d1d0 t xgpu_nv_mailbox_flr_work +ffffffff8206d490 T xgpu_nv_mailbox_put_irq +ffffffff8206d4d0 t xgpu_nv_request_full_gpu_access +ffffffff8206d4f0 t xgpu_nv_release_full_gpu_access +ffffffff8206d510 t xgpu_nv_request_init_data +ffffffff8206d530 t xgpu_nv_request_reset +ffffffff8206d690 t xgpu_nv_mailbox_trans_msg +ffffffff8206d8c0 t xgpu_nv_ras_poison_handler +ffffffff8206d8e0 t xgpu_nv_set_mailbox_ack_irq +ffffffff8206d970 t xgpu_nv_mailbox_ack_irq +ffffffff8206d9d0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff8206da60 t xgpu_nv_mailbox_rcv_irq +ffffffff8206db30 t xgpu_nv_send_access_requests +ffffffff8206e000 T xgpu_vi_init_golden_registers +ffffffff8206e0f0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff8206e140 T xgpu_vi_mailbox_add_irq_id +ffffffff8206e1f0 T xgpu_vi_mailbox_get_irq +ffffffff8206e2c0 t xgpu_vi_mailbox_flr_work +ffffffff8206e460 T xgpu_vi_mailbox_put_irq +ffffffff8206e4a0 t xgpu_vi_request_full_gpu_access +ffffffff8206e4c0 t xgpu_vi_release_full_gpu_access +ffffffff8206e4e0 t xgpu_vi_request_reset +ffffffff8206e500 t xgpu_vi_wait_reset_cmpl +ffffffff8206e640 t xgpu_vi_set_mailbox_ack_irq +ffffffff8206e6d0 t xgpu_vi_mailbox_ack_irq +ffffffff8206e730 t xgpu_vi_set_mailbox_rcv_irq +ffffffff8206e7c0 t xgpu_vi_mailbox_rcv_irq +ffffffff8206e890 t xgpu_vi_mailbox_rcv_msg +ffffffff8206e9f0 t xgpu_vi_send_access_requests +ffffffff8206f000 t navi10_ih_early_init +ffffffff8206f060 t navi10_ih_sw_init +ffffffff8206f1f0 t navi10_ih_sw_fini +ffffffff8206f230 t navi10_ih_hw_init +ffffffff8206f710 t navi10_ih_hw_fini +ffffffff8206f780 t navi10_ih_suspend +ffffffff8206f7f0 t navi10_ih_resume +ffffffff8206f800 t navi10_ih_is_idle +ffffffff8206f830 t navi10_ih_wait_for_idle +ffffffff8206f860 t navi10_ih_soft_reset +ffffffff8206f890 t navi10_ih_set_clockgating_state +ffffffff8206f9d0 t navi10_ih_set_powergating_state +ffffffff8206fa00 t navi10_ih_get_clockgating_state +ffffffff8206faa0 t navi10_ih_get_wptr +ffffffff8206fc00 t navi10_ih_set_rptr +ffffffff8206fcf0 t navi10_ih_self_irq +ffffffff8206fd70 t navi10_ih_toggle_interrupts +ffffffff8206ff00 t force_update_wptr_for_self_int +ffffffff82071000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff82071040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff82071080 t nbio_v2_3_get_pcie_index_offset +ffffffff820710c0 t nbio_v2_3_get_pcie_data_offset +ffffffff82071100 t nbio_v2_3_get_rev_id +ffffffff82071160 t nbio_v2_3_mc_access_enable +ffffffff82071210 t nbio_v2_3_get_memsize +ffffffff82071280 t nbio_v2_3_sdma_doorbell_range +ffffffff82071330 t nbio_v2_3_vcn_doorbell_range +ffffffff820713c0 t nbio_v2_3_enable_doorbell_aperture +ffffffff820714d0 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff82071650 t nbio_v2_3_ih_doorbell_range +ffffffff82071780 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff82071830 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff820718e0 t nbio_v2_3_get_clockgating_state +ffffffff82071970 t nbio_v2_3_ih_control +ffffffff82071ae0 t nbio_v2_3_init_registers +ffffffff82071b80 t nbio_v2_3_remap_hdp_registers +ffffffff82071ca0 t nbio_v2_3_enable_aspm +ffffffff82071d40 t nbio_v2_3_program_aspm +ffffffff820724c0 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff82072560 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff820725e0 t nbio_v2_3_clear_doorbell_interrupt +ffffffff82073000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff82073040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff82073080 t nbio_v4_3_get_pcie_index_offset +ffffffff820730b0 t nbio_v4_3_get_pcie_data_offset +ffffffff820730f0 t nbio_v4_3_get_rev_id +ffffffff82073190 t nbio_v4_3_mc_access_enable +ffffffff82073240 t nbio_v4_3_get_memsize +ffffffff820732b0 t nbio_v4_3_sdma_doorbell_range +ffffffff82073430 t nbio_v4_3_vcn_doorbell_range +ffffffff820735f0 t nbio_v4_3_gc_doorbell_init +ffffffff82073700 t nbio_v4_3_enable_doorbell_aperture +ffffffff82073810 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff82073990 t nbio_v4_3_ih_doorbell_range +ffffffff82073ac0 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff82073c10 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff82073d50 t nbio_v4_3_get_clockgating_state +ffffffff82073e90 t nbio_v4_3_ih_control +ffffffff82074000 t nbio_v4_3_init_registers +ffffffff82074140 t nbio_v4_3_remap_hdp_registers +ffffffff82074260 t nbio_v4_3_program_aspm +ffffffff82075090 t nbio_v4_3_get_rom_offset +ffffffff82075130 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff82075160 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff82075190 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff820751c0 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff820751f0 t nbio_v4_3_handle_ras_err_event_athub_intr_no_bifring +ffffffff82075330 t nbio_v4_3_init_ras_err_event_athub_interrupt +ffffffff82075370 t nbio_v4_3_set_ras_err_event_athub_irq_state +ffffffff82075490 t nbio_v4_3_process_err_event_athub_irq +ffffffff82076000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff82076040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff82076080 t nbio_v6_1_get_pcie_index_offset +ffffffff820760c0 t nbio_v6_1_get_pcie_data_offset +ffffffff82076100 t nbio_v6_1_get_rev_id +ffffffff820761a0 t nbio_v6_1_mc_access_enable +ffffffff82076250 t nbio_v6_1_get_memsize +ffffffff820762c0 t nbio_v6_1_sdma_doorbell_range +ffffffff82076360 t nbio_v6_1_enable_doorbell_aperture +ffffffff82076470 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff820765f0 t nbio_v6_1_ih_doorbell_range +ffffffff82076720 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff820767d0 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff82076880 t nbio_v6_1_get_clockgating_state +ffffffff82076910 t nbio_v6_1_ih_control +ffffffff82076a80 t nbio_v6_1_init_registers +ffffffff82076b60 t nbio_v6_1_remap_hdp_registers +ffffffff82076c80 t nbio_v6_1_program_aspm +ffffffff82078000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff82078040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff82078080 t nbio_v7_0_get_pcie_index_offset +ffffffff820780c0 t nbio_v7_0_get_pcie_data_offset +ffffffff82078100 t nbio_v7_0_get_rev_id +ffffffff820781a0 t nbio_v7_0_mc_access_enable +ffffffff82078250 t nbio_v7_0_get_memsize +ffffffff820782c0 t nbio_v7_0_sdma_doorbell_range +ffffffff82078360 t nbio_v7_0_vcn_doorbell_range +ffffffff820783e0 t nbio_v7_0_enable_doorbell_aperture +ffffffff820784f0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff82078520 t nbio_v7_0_ih_doorbell_range +ffffffff82078650 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff82078790 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff82078840 t nbio_v7_0_get_clockgating_state +ffffffff820788d0 t nbio_v7_0_ih_control +ffffffff82078a40 t nbio_v7_0_init_registers +ffffffff82078a90 t nbio_v7_0_remap_hdp_registers +ffffffff82078bb0 t nbio_7_0_read_syshub_ind_mmr +ffffffff82078c90 t nbio_7_0_write_syshub_ind_mmr +ffffffff82079000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff82079040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff82079080 t nbio_v7_2_get_pcie_index_offset +ffffffff820790c0 t nbio_v7_2_get_pcie_data_offset +ffffffff82079100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff82079130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff82079170 t nbio_v7_2_get_rev_id +ffffffff82079260 t nbio_v7_2_mc_access_enable +ffffffff820793a0 t nbio_v7_2_get_memsize +ffffffff82079410 t nbio_v7_2_sdma_doorbell_range +ffffffff820794b0 t nbio_v7_2_vcn_doorbell_range +ffffffff82079540 t nbio_v7_2_enable_doorbell_aperture +ffffffff82079630 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff820797b0 t nbio_v7_2_ih_doorbell_range +ffffffff82079840 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff82079900 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff82079ab0 t nbio_v7_2_get_clockgating_state +ffffffff82079b50 t nbio_v7_2_ih_control +ffffffff82079cc0 t nbio_v7_2_init_registers +ffffffff82079ea0 t nbio_v7_2_remap_hdp_registers +ffffffff8207a000 t nbio_v7_4_query_ras_error_count +ffffffff8207a1d0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff8207a480 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff8207a650 t nbio_v7_4_init_ras_controller_interrupt +ffffffff8207a690 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff8207a6d0 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff8207a710 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff8207a750 t nbio_v7_4_get_pcie_index_offset +ffffffff8207a790 t nbio_v7_4_get_pcie_data_offset +ffffffff8207a7d0 t nbio_v7_4_get_rev_id +ffffffff8207a8b0 t nbio_v7_4_mc_access_enable +ffffffff8207a960 t nbio_v7_4_get_memsize +ffffffff8207a9d0 t nbio_v7_4_sdma_doorbell_range +ffffffff8207aaa0 t nbio_v7_4_vcn_doorbell_range +ffffffff8207ab50 t nbio_v7_4_enable_doorbell_aperture +ffffffff8207ac60 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff8207ade0 t nbio_v7_4_ih_doorbell_range +ffffffff8207af10 t nbio_v7_4_enable_doorbell_interrupt +ffffffff8207b070 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff8207b0a0 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff8207b150 t nbio_v7_4_get_clockgating_state +ffffffff8207b1e0 t nbio_v7_4_ih_control +ffffffff8207b350 t nbio_v7_4_init_registers +ffffffff8207b450 t nbio_v7_4_remap_hdp_registers +ffffffff8207b570 t nbio_v7_4_program_aspm +ffffffff8207ba20 t nbio_v7_4_set_ras_controller_irq_state +ffffffff8207bbd0 t nbio_v7_4_process_ras_controller_irq +ffffffff8207bc00 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff8207bdb0 t nbio_v7_4_process_err_event_athub_irq +ffffffff8207c000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff8207c040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff8207c080 t nbio_v7_7_get_pcie_index_offset +ffffffff8207c0c0 t nbio_v7_7_get_pcie_data_offset +ffffffff8207c100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff8207c130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff8207c170 t nbio_v7_7_get_rev_id +ffffffff8207c210 t nbio_v7_7_mc_access_enable +ffffffff8207c2c0 t nbio_v7_7_get_memsize +ffffffff8207c330 t nbio_v7_7_sdma_doorbell_range +ffffffff8207c3d0 t nbio_v7_7_vcn_doorbell_range +ffffffff8207c460 t nbio_v7_7_enable_doorbell_aperture +ffffffff8207c550 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff8207c6d0 t nbio_v7_7_ih_doorbell_range +ffffffff8207c800 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff8207c950 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff8207cb80 t nbio_v7_7_get_clockgating_state +ffffffff8207ccc0 t nbio_v7_7_ih_control +ffffffff8207ce30 t nbio_v7_7_init_registers +ffffffff8207cf50 t nbio_v7_7_remap_hdp_registers +ffffffff8207e000 t nbio_v7_9_get_hdp_flush_req_offset +ffffffff8207e040 t nbio_v7_9_get_hdp_flush_done_offset +ffffffff8207e080 t nbio_v7_9_get_pcie_index_offset +ffffffff8207e0c0 t nbio_v7_9_get_pcie_data_offset +ffffffff8207e100 t nbio_v7_9_get_pcie_index_hi_offset +ffffffff8207e140 t nbio_v7_9_get_rev_id +ffffffff8207e1e0 t nbio_v7_9_mc_access_enable +ffffffff8207e290 t nbio_v7_9_get_memsize +ffffffff8207e300 t nbio_v7_9_sdma_doorbell_range +ffffffff8207e680 t nbio_v7_9_vcn_doorbell_range +ffffffff8207e840 t nbio_v7_9_enable_doorbell_aperture +ffffffff8207e9d0 t nbio_v7_9_enable_doorbell_selfring_aperture +ffffffff8207eb50 t nbio_v7_9_ih_doorbell_range +ffffffff8207ec70 t nbio_v7_9_enable_doorbell_interrupt +ffffffff8207ed90 t nbio_v7_9_update_medium_grain_clock_gating +ffffffff8207edc0 t nbio_v7_9_update_medium_grain_light_sleep +ffffffff8207edf0 t nbio_v7_9_get_clockgating_state +ffffffff8207ee20 t nbio_v7_9_ih_control +ffffffff8207ef90 t nbio_v7_9_init_registers +ffffffff8207f320 t nbio_v7_9_remap_hdp_registers +ffffffff8207f440 t nbio_v7_9_get_compute_partition_mode +ffffffff8207f4e0 t nbio_v7_9_get_memory_partition_mode +ffffffff8207f5e0 t nbio_v7_9_get_pcie_replay_count +ffffffff8207f640 t nbio_v7_9_get_pcie_usage +ffffffff8207f800 t nbio_v7_9_query_ras_error_count +ffffffff8207f830 t nbio_v7_9_handle_ras_controller_intr_no_bifring +ffffffff8207f980 t nbio_v7_9_handle_ras_err_event_athub_intr_no_bifring +ffffffff8207fac0 t nbio_v7_9_init_ras_controller_interrupt +ffffffff8207fb00 t nbio_v7_9_init_ras_err_event_athub_interrupt +ffffffff8207fb40 t nbio_v7_9_set_ras_controller_irq_state +ffffffff8207fb70 t nbio_v7_9_process_ras_controller_irq +ffffffff8207fba0 t nbio_v7_9_set_ras_err_event_athub_irq_state +ffffffff8207fbd0 t nbio_v7_9_process_err_event_athub_irq +ffffffff82080000 T nv_grbm_select +ffffffff820800a0 T nv_set_virt_ops +ffffffff820800e0 t nv_common_early_init +ffffffff820804e0 t nv_common_late_init +ffffffff820805a0 t nv_common_sw_init +ffffffff820805f0 t nv_common_sw_fini +ffffffff82080620 t nv_common_hw_init +ffffffff82080750 t nv_common_hw_fini +ffffffff820807c0 t nv_common_suspend +ffffffff82080830 t nv_common_resume +ffffffff82080870 t nv_common_is_idle +ffffffff820808a0 t nv_common_wait_for_idle +ffffffff820808d0 t nv_common_soft_reset +ffffffff82080900 t nv_common_set_clockgating_state +ffffffff820809f0 t nv_common_set_powergating_state +ffffffff82080a20 t nv_common_get_clockgating_state +ffffffff82080aa0 t nv_didt_rreg +ffffffff82080b60 t nv_didt_wreg +ffffffff82080c00 t nv_read_disabled_bios +ffffffff82080c30 t nv_read_register +ffffffff82080d30 t nv_asic_reset +ffffffff82080ec0 t nv_asic_reset_method +ffffffff82080fc0 t nv_get_xclk +ffffffff82080ff0 t nv_set_uvd_clocks +ffffffff82081020 t nv_set_vce_clocks +ffffffff82081050 t nv_get_config_memsize +ffffffff82081070 t nv_need_full_reset +ffffffff820810a0 t nv_init_doorbell_index +ffffffff820811d0 t nv_need_reset_on_init +ffffffff82081280 t nv_pre_asic_init +ffffffff820812b0 t nv_update_umd_stable_pstate +ffffffff82081380 t nv_query_video_codecs +ffffffff82082000 T psp_v10_0_set_psp_funcs +ffffffff82082030 t psp_v10_0_init_microcode +ffffffff82082120 t psp_v10_0_ring_create +ffffffff82082510 t psp_v10_0_ring_stop +ffffffff820827c0 t psp_v10_0_ring_destroy +ffffffff82082850 t psp_v10_0_mode1_reset +ffffffff820828a0 t psp_v10_0_ring_get_wptr +ffffffff82082900 t psp_v10_0_ring_set_wptr +ffffffff82083000 T psp_v11_0_set_psp_funcs +ffffffff82083030 t psp_v11_0_init_microcode +ffffffff820831e0 t psp_v11_0_bootloader_load_kdb +ffffffff82083200 t psp_v11_0_bootloader_load_spl +ffffffff82083220 t psp_v11_0_bootloader_load_sysdrv +ffffffff82083240 t psp_v11_0_bootloader_load_sos +ffffffff82083690 t psp_v11_0_ring_create +ffffffff82083f10 t psp_v11_0_ring_stop +ffffffff820841f0 t psp_v11_0_ring_destroy +ffffffff82084280 t psp_v11_0_mode1_reset +ffffffff820843b0 t psp_v11_0_memory_training +ffffffff82084940 t psp_v11_0_ring_get_wptr +ffffffff82084990 t psp_v11_0_ring_set_wptr +ffffffff82084af0 t psp_v11_0_load_usbc_pd_fw +ffffffff82084d20 t psp_v11_0_read_usbc_pd_fw +ffffffff82084e60 t psp_v11_0_bootloader_load_component +ffffffff82085050 t psp_v11_0_wait_for_bootloader +ffffffff82085270 t psp_v11_0_memory_training_send_msg +ffffffff82086000 T psp_v11_0_8_set_psp_funcs +ffffffff82086030 t psp_v11_0_8_ring_create +ffffffff820868b0 t psp_v11_0_8_ring_stop +ffffffff82086db0 t psp_v11_0_8_ring_destroy +ffffffff82086e40 t psp_v11_0_8_ring_get_wptr +ffffffff82086eb0 t psp_v11_0_8_ring_set_wptr +ffffffff82087000 T psp_v12_0_set_psp_funcs +ffffffff82087030 t psp_v12_0_init_microcode +ffffffff82087100 t psp_v12_0_bootloader_load_sysdrv +ffffffff82087520 t psp_v12_0_bootloader_load_sos +ffffffff82087990 t psp_v12_0_ring_create +ffffffff82088670 t psp_v12_0_ring_stop +ffffffff82088950 t psp_v12_0_ring_destroy +ffffffff820889e0 t psp_v12_0_mode1_reset +ffffffff82088b10 t psp_v12_0_ring_get_wptr +ffffffff82088b80 t psp_v12_0_ring_set_wptr +ffffffff82089000 T psp_v13_0_set_psp_funcs +ffffffff82089030 t psp_v13_0_init_microcode +ffffffff82089160 t psp_v13_0_wait_for_bootloader_steady_state +ffffffff82089290 t psp_v13_0_bootloader_load_kdb +ffffffff820892b0 t psp_v13_0_bootloader_load_spl +ffffffff820892d0 t psp_v13_0_bootloader_load_sysdrv +ffffffff820892f0 t psp_v13_0_bootloader_load_soc_drv +ffffffff82089310 t psp_v13_0_bootloader_load_intf_drv +ffffffff82089330 t psp_v13_0_bootloader_load_dbg_drv +ffffffff82089350 t psp_v13_0_bootloader_load_ras_drv +ffffffff82089370 t psp_v13_0_bootloader_load_sos +ffffffff82089830 t psp_v13_0_ring_create +ffffffff8208a0b0 t psp_v13_0_ring_stop +ffffffff8208a5b0 t psp_v13_0_ring_destroy +ffffffff8208a640 t psp_v13_0_memory_training +ffffffff8208ab20 t psp_v13_0_ring_get_wptr +ffffffff8208ab90 t psp_v13_0_ring_set_wptr +ffffffff8208aca0 t psp_v13_0_load_usbc_pd_fw +ffffffff8208aed0 t psp_v13_0_read_usbc_pd_fw +ffffffff8208b010 t psp_v13_0_update_spirom +ffffffff8208b230 t psp_v13_0_vbflash_status +ffffffff8208b290 t psp_v13_0_fatal_error_recovery_quirk +ffffffff8208b3f0 t psp_v13_0_bootloader_load_component +ffffffff8208b6b0 t psp_v13_0_memory_training_send_msg +ffffffff8208b830 t psp_v13_0_exec_spi_cmd +ffffffff8208c000 T psp_v13_0_4_set_psp_funcs +ffffffff8208c030 t psp_v13_0_4_init_microcode +ffffffff8208c0f0 t psp_v13_0_4_bootloader_load_kdb +ffffffff8208c110 t psp_v13_0_4_bootloader_load_spl +ffffffff8208c130 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff8208c150 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff8208c170 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff8208c190 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff8208c1b0 t psp_v13_0_4_bootloader_load_sos +ffffffff8208c620 t psp_v13_0_4_ring_create +ffffffff8208ceb0 t psp_v13_0_4_ring_stop +ffffffff8208d3c0 t psp_v13_0_4_ring_destroy +ffffffff8208d450 t psp_v13_0_4_ring_get_wptr +ffffffff8208d4c0 t psp_v13_0_4_ring_set_wptr +ffffffff8208d5e0 t psp_v13_0_4_bootloader_load_component +ffffffff8208d7f0 t psp_v13_0_4_wait_for_bootloader +ffffffff8208e000 T psp_v3_1_set_psp_funcs +ffffffff8208e030 t psp_v3_1_init_microcode +ffffffff8208e0f0 t psp_v3_1_bootloader_load_sysdrv +ffffffff8208e510 t psp_v3_1_bootloader_load_sos +ffffffff8208e980 t psp_v3_1_ring_create +ffffffff8208f840 t psp_v3_1_ring_stop +ffffffff8208fb20 t psp_v3_1_ring_destroy +ffffffff8208fbb0 t psp_v3_1_smu_reload_quirk +ffffffff8208fc00 t psp_v3_1_mode1_reset +ffffffff8208fd30 t psp_v3_1_ring_get_wptr +ffffffff8208fd80 t psp_v3_1_ring_set_wptr +ffffffff82090000 t sdma_v2_4_early_init +ffffffff820900f0 t sdma_v2_4_sw_init +ffffffff82090520 t sdma_v2_4_sw_fini +ffffffff820905f0 t sdma_v2_4_hw_init +ffffffff82090aa0 t sdma_v2_4_hw_fini +ffffffff82090af0 t sdma_v2_4_suspend +ffffffff82090b40 t sdma_v2_4_resume +ffffffff82090b50 t sdma_v2_4_is_idle +ffffffff82090ba0 t sdma_v2_4_wait_for_idle +ffffffff82090c50 t sdma_v2_4_soft_reset +ffffffff82090e00 t sdma_v2_4_set_clockgating_state +ffffffff82090e30 t sdma_v2_4_set_powergating_state +ffffffff82090e60 t sdma_v2_4_ring_get_rptr +ffffffff82090ea0 t sdma_v2_4_ring_get_wptr +ffffffff82090f00 t sdma_v2_4_ring_set_wptr +ffffffff82090f40 t sdma_v2_4_ring_emit_ib +ffffffff82091220 t sdma_v2_4_ring_emit_fence +ffffffff82091670 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff82091920 t sdma_v2_4_ring_emit_vm_flush +ffffffff82091bd0 t sdma_v2_4_ring_emit_hdp_flush +ffffffff82091e80 t sdma_v2_4_ring_test_ring +ffffffff820921b0 t sdma_v2_4_ring_test_ib +ffffffff820923c0 t sdma_v2_4_ring_insert_nop +ffffffff82092500 t sdma_v2_4_ring_pad_ib +ffffffff82092630 t sdma_v2_4_ring_emit_wreg +ffffffff82092790 t sdma_v2_4_emit_copy_buffer +ffffffff82092850 t sdma_v2_4_emit_fill_buffer +ffffffff820928e0 t sdma_v2_4_vm_copy_pte +ffffffff820929a0 t sdma_v2_4_vm_write_pte +ffffffff82092a70 t sdma_v2_4_vm_set_pte_pde +ffffffff82092b70 t sdma_v2_4_set_trap_irq_state +ffffffff82092c60 t sdma_v2_4_process_trap_irq +ffffffff82092d00 t sdma_v2_4_process_illegal_inst_irq +ffffffff82092d80 t sdma_v2_4_enable +ffffffff82093000 t sdma_v3_0_early_init +ffffffff82093100 t sdma_v3_0_sw_init +ffffffff82093530 t sdma_v3_0_sw_fini +ffffffff82093600 t sdma_v3_0_hw_init +ffffffff82093770 t sdma_v3_0_hw_fini +ffffffff820937d0 t sdma_v3_0_suspend +ffffffff82093830 t sdma_v3_0_resume +ffffffff82093840 t sdma_v3_0_is_idle +ffffffff82093890 t sdma_v3_0_wait_for_idle +ffffffff82093940 t sdma_v3_0_check_soft_reset +ffffffff820939a0 t sdma_v3_0_pre_soft_reset +ffffffff82093a00 t sdma_v3_0_soft_reset +ffffffff82093b00 t sdma_v3_0_post_soft_reset +ffffffff82093b50 t sdma_v3_0_set_clockgating_state +ffffffff82093e00 t sdma_v3_0_set_powergating_state +ffffffff82093e30 t sdma_v3_0_get_clockgating_state +ffffffff82093ed0 t sdma_v3_0_ring_get_rptr +ffffffff82093f10 t sdma_v3_0_ring_get_wptr +ffffffff82093f90 t sdma_v3_0_ring_set_wptr +ffffffff82094040 t sdma_v3_0_ring_emit_ib +ffffffff82094320 t sdma_v3_0_ring_emit_fence +ffffffff82094770 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff82094a20 t sdma_v3_0_ring_emit_vm_flush +ffffffff82094cd0 t sdma_v3_0_ring_emit_hdp_flush +ffffffff82094f80 t sdma_v3_0_ring_test_ring +ffffffff820952b0 t sdma_v3_0_ring_test_ib +ffffffff820954c0 t sdma_v3_0_ring_insert_nop +ffffffff82095600 t sdma_v3_0_ring_pad_ib +ffffffff82095730 t sdma_v3_0_ring_emit_wreg +ffffffff82095890 t sdma_v3_0_emit_copy_buffer +ffffffff82095950 t sdma_v3_0_emit_fill_buffer +ffffffff820959e0 t sdma_v3_0_vm_copy_pte +ffffffff82095aa0 t sdma_v3_0_vm_write_pte +ffffffff82095b70 t sdma_v3_0_vm_set_pte_pde +ffffffff82095c70 t sdma_v3_0_set_trap_irq_state +ffffffff82095d60 t sdma_v3_0_process_trap_irq +ffffffff82095e00 t sdma_v3_0_process_illegal_inst_irq +ffffffff82095e80 t sdma_v3_0_ctx_switch_enable +ffffffff82096050 t sdma_v3_0_enable +ffffffff82096200 t sdma_v3_0_gfx_resume +ffffffff82097000 t sdma_v4_0_early_init +ffffffff820972f0 t sdma_v4_0_late_init +ffffffff820975b0 t sdma_v4_0_sw_init +ffffffff82097a60 t sdma_v4_0_sw_fini +ffffffff82097b30 t sdma_v4_0_hw_init +ffffffff8209acf0 t sdma_v4_0_hw_fini +ffffffff8209adf0 t sdma_v4_0_suspend +ffffffff8209ae50 t sdma_v4_0_resume +ffffffff8209aee0 t sdma_v4_0_is_idle +ffffffff8209b010 t sdma_v4_0_wait_for_idle +ffffffff8209b1c0 t sdma_v4_0_soft_reset +ffffffff8209b1f0 t sdma_v4_0_set_clockgating_state +ffffffff8209b720 t sdma_v4_0_set_powergating_state +ffffffff8209b800 t sdma_v4_0_get_clockgating_state +ffffffff8209b8b0 t sdma_v4_0_query_ras_error_count +ffffffff8209baa0 t sdma_v4_0_reset_ras_error_count +ffffffff8209bc20 t sdma_v4_0_ring_get_rptr +ffffffff8209bc80 t sdma_v4_0_ring_get_wptr +ffffffff8209be90 t sdma_v4_0_ring_set_wptr +ffffffff8209c140 t sdma_v4_0_ring_emit_ib +ffffffff8209c420 t sdma_v4_0_ring_emit_fence +ffffffff8209c890 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff8209c8f0 t sdma_v4_0_ring_emit_vm_flush +ffffffff8209c910 t sdma_v4_0_ring_emit_hdp_flush +ffffffff8209c9d0 t sdma_v4_0_ring_test_ring +ffffffff8209cd00 t sdma_v4_0_ring_test_ib +ffffffff8209cf10 t sdma_v4_0_ring_insert_nop +ffffffff8209d050 t sdma_v4_0_ring_pad_ib +ffffffff8209d180 t sdma_v4_0_ring_emit_wreg +ffffffff8209d2e0 t sdma_v4_0_ring_emit_reg_wait +ffffffff8209d330 t sdma_v4_0_wait_reg_mem +ffffffff8209d680 t sdma_v4_0_page_ring_get_wptr +ffffffff8209d840 t sdma_v4_0_page_ring_set_wptr +ffffffff8209da10 t sdma_v4_0_emit_copy_buffer +ffffffff8209dad0 t sdma_v4_0_emit_fill_buffer +ffffffff8209db60 t sdma_v4_0_vm_copy_pte +ffffffff8209dc20 t sdma_v4_0_vm_write_pte +ffffffff8209dcf0 t sdma_v4_0_vm_set_pte_pde +ffffffff8209ddf0 t sdma_v4_0_set_trap_irq_state +ffffffff8209dfa0 t sdma_v4_0_process_trap_irq +ffffffff8209e0e0 t sdma_v4_0_process_illegal_inst_irq +ffffffff8209e200 t sdma_v4_0_set_ecc_irq_state +ffffffff8209e3b0 t sdma_v4_0_process_vm_hole_irq +ffffffff8209e400 t sdma_v4_0_print_iv_entry +ffffffff8209e550 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff8209e5a0 t sdma_v4_0_process_pool_timeout_irq +ffffffff8209e5f0 t sdma_v4_0_process_srbm_write_irq +ffffffff8209e640 t sdma_v4_0_process_ras_data_cb +ffffffff8209e6c0 t sdma_v4_0_ctx_switch_enable +ffffffff8209ede0 t sdma_v4_0_enable +ffffffff8209f3d0 t sdma_v4_0_gfx_enable +ffffffff820a0000 t sdma_v4_4_query_ras_error_count +ffffffff820a02b0 t sdma_v4_4_reset_ras_error_count +ffffffff820a1000 t sdma_v4_4_2_early_init +ffffffff820a12b0 t sdma_v4_4_2_late_init +ffffffff820a1340 t sdma_v4_4_2_sw_init +ffffffff820a1920 t sdma_v4_4_2_sw_fini +ffffffff820a19f0 t sdma_v4_4_2_hw_init +ffffffff820a1a40 t sdma_v4_4_2_hw_fini +ffffffff820a1b20 t sdma_v4_4_2_suspend +ffffffff820a1c30 t sdma_v4_4_2_resume +ffffffff820a1c80 t sdma_v4_4_2_is_idle +ffffffff820a1d30 t sdma_v4_4_2_wait_for_idle +ffffffff820a1e60 t sdma_v4_4_2_soft_reset +ffffffff820a1e90 t sdma_v4_4_2_set_clockgating_state +ffffffff820a2350 t sdma_v4_4_2_set_powergating_state +ffffffff820a2380 t sdma_v4_4_2_get_clockgating_state +ffffffff820a2480 t sdma_v4_4_2_xcp_suspend +ffffffff820a2570 t sdma_v4_4_2_xcp_resume +ffffffff820a25b0 t sdma_v4_4_2_ring_get_rptr +ffffffff820a2630 t sdma_v4_4_2_ring_get_wptr +ffffffff820a2790 t sdma_v4_4_2_ring_set_wptr +ffffffff820a2990 t sdma_v4_4_2_ring_emit_ib +ffffffff820a2c70 t sdma_v4_4_2_ring_emit_fence +ffffffff820a30e0 t sdma_v4_4_2_ring_emit_pipeline_sync +ffffffff820a3140 t sdma_v4_4_2_ring_emit_vm_flush +ffffffff820a3160 t sdma_v4_4_2_ring_emit_hdp_flush +ffffffff820a3230 t sdma_v4_4_2_ring_test_ring +ffffffff820a3560 t sdma_v4_4_2_ring_test_ib +ffffffff820a3770 t sdma_v4_4_2_ring_insert_nop +ffffffff820a38b0 t sdma_v4_4_2_ring_pad_ib +ffffffff820a39e0 t sdma_v4_4_2_ring_emit_wreg +ffffffff820a3b40 t sdma_v4_4_2_ring_emit_reg_wait +ffffffff820a3b90 t sdma_v4_4_2_wait_reg_mem +ffffffff820a3ee0 t sdma_v4_4_2_page_ring_get_wptr +ffffffff820a4000 t sdma_v4_4_2_page_ring_set_wptr +ffffffff820a4130 t sdma_v4_4_2_emit_copy_buffer +ffffffff820a41f0 t sdma_v4_4_2_emit_fill_buffer +ffffffff820a4280 t sdma_v4_4_2_vm_copy_pte +ffffffff820a4340 t sdma_v4_4_2_vm_write_pte +ffffffff820a4410 t sdma_v4_4_2_vm_set_pte_pde +ffffffff820a4510 t sdma_v4_4_2_set_trap_irq_state +ffffffff820a4610 t sdma_v4_4_2_process_trap_irq +ffffffff820a4740 t sdma_v4_4_2_process_illegal_inst_irq +ffffffff820a47e0 t sdma_v4_4_2_set_ecc_irq_state +ffffffff820a48f0 t sdma_v4_4_2_process_vm_hole_irq +ffffffff820a49e0 t sdma_v4_4_2_process_doorbell_invalid_irq +ffffffff820a4ad0 t sdma_v4_4_2_process_pool_timeout_irq +ffffffff820a4bc0 t sdma_v4_4_2_process_srbm_write_irq +ffffffff820a4cb0 t sdma_v4_4_2_query_ras_error_count +ffffffff820a4e30 t sdma_v4_4_2_reset_ras_error_count +ffffffff820a4fa0 t sdma_v4_4_2_inst_init_golden_registers +ffffffff820a5170 t sdma_v4_4_2_inst_start +ffffffff820a69a0 t sdma_v4_4_2_inst_ctx_switch_enable +ffffffff820a6cf0 t sdma_v4_4_2_inst_enable +ffffffff820a8000 t sdma_v5_0_early_init +ffffffff820a8130 t sdma_v5_0_sw_init +ffffffff820a8350 t sdma_v5_0_sw_fini +ffffffff820a83f0 t sdma_v5_0_hw_init +ffffffff820a98c0 t sdma_v5_0_hw_fini +ffffffff820a9930 t sdma_v5_0_suspend +ffffffff820a99a0 t sdma_v5_0_resume +ffffffff820a99b0 t sdma_v5_0_is_idle +ffffffff820a9a50 t sdma_v5_0_wait_for_idle +ffffffff820a9b30 t sdma_v5_0_soft_reset +ffffffff820a9b60 t sdma_v5_0_set_clockgating_state +ffffffff820a9d80 t sdma_v5_0_set_powergating_state +ffffffff820a9db0 t sdma_v5_0_get_clockgating_state +ffffffff820a9e60 t sdma_v5_0_ring_get_rptr +ffffffff820a9ec0 t sdma_v5_0_ring_get_wptr +ffffffff820aa080 t sdma_v5_0_ring_set_wptr +ffffffff820aa430 t sdma_v5_0_ring_emit_ib +ffffffff820aa730 t sdma_v5_0_ring_emit_fence +ffffffff820aabe0 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff820aae90 t sdma_v5_0_ring_emit_vm_flush +ffffffff820aaeb0 t sdma_v5_0_ring_emit_hdp_flush +ffffffff820ab180 t sdma_v5_0_ring_test_ring +ffffffff820ab5b0 t sdma_v5_0_ring_test_ib +ffffffff820ab940 t sdma_v5_0_ring_insert_nop +ffffffff820aba80 t sdma_v5_0_ring_pad_ib +ffffffff820abbb0 t sdma_v5_0_ring_init_cond_exec +ffffffff820abe00 t sdma_v5_0_ring_patch_cond_exec +ffffffff820abec0 t sdma_v5_0_ring_emit_wreg +ffffffff820ac020 t sdma_v5_0_ring_emit_reg_wait +ffffffff820ac2c0 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff820ac350 t sdma_v5_0_ring_preempt_ib +ffffffff820ac4e0 t sdma_v5_0_ring_emit_mem_sync +ffffffff820ac710 t sdma_v5_0_emit_copy_buffer +ffffffff820ac7d0 t sdma_v5_0_emit_fill_buffer +ffffffff820ac860 t sdma_v5_0_vm_copy_pte +ffffffff820ac920 t sdma_v5_0_vm_write_pte +ffffffff820ac9f0 t sdma_v5_0_vm_set_pte_pde +ffffffff820acaf0 t sdma_v5_0_set_trap_irq_state +ffffffff820acb90 t sdma_v5_0_process_trap_irq +ffffffff820accd0 t sdma_v5_0_process_illegal_inst_irq +ffffffff820acd00 t sdma_v5_0_mqd_init +ffffffff820acdf0 t sdma_v5_0_ctx_switch_enable +ffffffff820ad170 t sdma_v5_0_enable +ffffffff820ae000 t sdma_v5_2_early_init +ffffffff820ae130 t sdma_v5_2_sw_init +ffffffff820ae3f0 t sdma_v5_2_sw_fini +ffffffff820ae490 t sdma_v5_2_hw_init +ffffffff820b02c0 t sdma_v5_2_hw_fini +ffffffff820b0330 t sdma_v5_2_suspend +ffffffff820b03a0 t sdma_v5_2_resume +ffffffff820b03b0 t sdma_v5_2_is_idle +ffffffff820b0470 t sdma_v5_2_wait_for_idle +ffffffff820b05a0 t sdma_v5_2_soft_reset +ffffffff820b08c0 t sdma_v5_2_set_clockgating_state +ffffffff820b0c60 t sdma_v5_2_set_powergating_state +ffffffff820b0c90 t sdma_v5_2_get_clockgating_state +ffffffff820b0d40 t sdma_v5_2_ring_get_rptr +ffffffff820b0da0 t sdma_v5_2_ring_get_wptr +ffffffff820b0ef0 t sdma_v5_2_ring_set_wptr +ffffffff820b10d0 t sdma_v5_2_ring_emit_ib +ffffffff820b13d0 t sdma_v5_2_ring_emit_fence +ffffffff820b1880 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff820b1b30 t sdma_v5_2_ring_emit_vm_flush +ffffffff820b1b50 t sdma_v5_2_ring_emit_hdp_flush +ffffffff820b1e50 t sdma_v5_2_ring_test_ring +ffffffff820b2280 t sdma_v5_2_ring_test_ib +ffffffff820b2610 t sdma_v5_2_ring_insert_nop +ffffffff820b2750 t sdma_v5_2_ring_pad_ib +ffffffff820b2880 t sdma_v5_2_ring_init_cond_exec +ffffffff820b2ad0 t sdma_v5_2_ring_patch_cond_exec +ffffffff820b2b90 t sdma_v5_2_ring_begin_use +ffffffff820b2bb0 t sdma_v5_2_ring_end_use +ffffffff820b2bd0 t sdma_v5_2_ring_emit_wreg +ffffffff820b2d30 t sdma_v5_2_ring_emit_reg_wait +ffffffff820b2fd0 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff820b3060 t sdma_v5_2_ring_preempt_ib +ffffffff820b3220 t sdma_v5_2_ring_emit_mem_sync +ffffffff820b3450 t sdma_v5_2_emit_copy_buffer +ffffffff820b3510 t sdma_v5_2_emit_fill_buffer +ffffffff820b35a0 t sdma_v5_2_vm_copy_pte +ffffffff820b3660 t sdma_v5_2_vm_write_pte +ffffffff820b3730 t sdma_v5_2_vm_set_pte_pde +ffffffff820b3830 t sdma_v5_2_set_trap_irq_state +ffffffff820b38f0 t sdma_v5_2_process_trap_irq +ffffffff820b3a60 t sdma_v5_2_process_illegal_inst_irq +ffffffff820b3a90 t sdma_v5_2_mqd_init +ffffffff820b3b80 t sdma_v5_2_ctx_switch_enable +ffffffff820b3fd0 t sdma_v5_2_enable +ffffffff820b5000 t sdma_v6_0_early_init +ffffffff820b5120 t sdma_v6_0_sw_init +ffffffff820b5330 t sdma_v6_0_sw_fini +ffffffff820b53d0 t sdma_v6_0_hw_init +ffffffff820b53e0 t sdma_v6_0_hw_fini +ffffffff820b54d0 t sdma_v6_0_suspend +ffffffff820b5510 t sdma_v6_0_resume +ffffffff820b5520 t sdma_v6_0_is_idle +ffffffff820b55c0 t sdma_v6_0_wait_for_idle +ffffffff820b56a0 t sdma_v6_0_check_soft_reset +ffffffff820b5770 t sdma_v6_0_soft_reset +ffffffff820b5cc0 t sdma_v6_0_set_clockgating_state +ffffffff820b5cf0 t sdma_v6_0_set_powergating_state +ffffffff820b5d20 t sdma_v6_0_get_clockgating_state +ffffffff820b5d50 t sdma_v6_0_ring_get_rptr +ffffffff820b5db0 t sdma_v6_0_ring_get_wptr +ffffffff820b5e30 t sdma_v6_0_ring_set_wptr +ffffffff820b61e0 t sdma_v6_0_ring_emit_ib +ffffffff820b64e0 t sdma_v6_0_ring_emit_fence +ffffffff820b6990 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff820b6c40 t sdma_v6_0_ring_emit_vm_flush +ffffffff820b6ee0 t sdma_v6_0_ring_emit_hdp_flush +ffffffff820b71b0 t sdma_v6_0_ring_test_ring +ffffffff820b75e0 t sdma_v6_0_ring_test_ib +ffffffff820b7970 t sdma_v6_0_ring_insert_nop +ffffffff820b7ab0 t sdma_v6_0_ring_pad_ib +ffffffff820b7be0 t sdma_v6_0_ring_init_cond_exec +ffffffff820b7e30 t sdma_v6_0_ring_patch_cond_exec +ffffffff820b7ef0 t sdma_v6_0_ring_emit_wreg +ffffffff820b8050 t sdma_v6_0_ring_emit_reg_wait +ffffffff820b82f0 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff820b8380 t sdma_v6_0_ring_preempt_ib +ffffffff820b8510 t sdma_v6_0_ring_emit_mem_sync +ffffffff820b8740 t sdma_v6_0_emit_copy_buffer +ffffffff820b8800 t sdma_v6_0_emit_fill_buffer +ffffffff820b8890 t sdma_v6_0_vm_copy_pte +ffffffff820b8950 t sdma_v6_0_vm_write_pte +ffffffff820b8a20 t sdma_v6_0_vm_set_pte_pde +ffffffff820b8b20 t sdma_v6_0_set_trap_irq_state +ffffffff820b8bc0 t sdma_v6_0_process_trap_irq +ffffffff820b8d20 t sdma_v6_0_process_illegal_inst_irq +ffffffff820b8d50 t sdma_v6_0_mqd_init +ffffffff820b8e80 t sdma_v6_0_start +ffffffff820b91e0 t sdma_v6_0_enable +ffffffff820b9380 t sdma_v6_0_gfx_resume +ffffffff820ba5c0 t sdma_v6_0_gfx_stop +ffffffff820bb000 T sienna_cichlid_reset_init +ffffffff820bb0e0 t sienna_cichlid_async_reset +ffffffff820bb140 t sienna_cichlid_get_reset_handler +ffffffff820bb1d0 T sienna_cichlid_reset_fini +ffffffff820bb230 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff820bb3a0 t sienna_cichlid_mode2_perform_reset +ffffffff820bb430 t sienna_cichlid_mode2_restore_hwcontext +ffffffff820bb7a0 t sienna_cichlid_mode2_reset +ffffffff820bc000 T smu_v11_0_i2c_control_init +ffffffff820bc0e0 T smu_v11_0_i2c_control_fini +ffffffff820bc120 t smu_v11_0_i2c_xfer +ffffffff820bd490 t smu_v11_0_i2c_func +ffffffff820bd4c0 t smu_v11_0_i2c_enable +ffffffff820bd620 t smu_v11_0_i2c_abort +ffffffff820bd740 t lock_bus +ffffffff820bd7f0 t trylock_bus +ffffffff820bd850 t unlock_bus +ffffffff820be000 T smu_v13_0_10_reset_init +ffffffff820be0e0 t smu_v13_0_10_async_reset +ffffffff820be140 t smu_v13_0_10_get_reset_handler +ffffffff820be1f0 T smu_v13_0_10_reset_fini +ffffffff820be250 t smu_v13_0_10_mode2_prepare_hwcontext +ffffffff820be3a0 t smu_v13_0_10_mode2_perform_reset +ffffffff820be430 t smu_v13_0_10_mode2_restore_hwcontext +ffffffff820be820 t smu_v13_0_10_mode2_reset +ffffffff820bf000 t smuio_v11_0_get_rom_index_offset +ffffffff820bf040 t smuio_v11_0_get_rom_data_offset +ffffffff820bf080 t smuio_v11_0_update_rom_clock_gating +ffffffff820bf1d0 t smuio_v11_0_get_clock_gating_state +ffffffff820c0000 t smuio_v11_0_6_get_rom_index_offset +ffffffff820c0040 t smuio_v11_0_6_get_rom_data_offset +ffffffff820c0080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff820c01e0 t smuio_v11_0_6_get_clock_gating_state +ffffffff820c1000 t smuio_v13_0_get_rom_index_offset +ffffffff820c1040 t smuio_v13_0_get_rom_data_offset +ffffffff820c1080 t smuio_v13_0_update_rom_clock_gating +ffffffff820c11e0 t smuio_v13_0_get_clock_gating_state +ffffffff820c1290 t smuio_v13_0_get_die_id +ffffffff820c1320 t smuio_v13_0_get_socket_id +ffffffff820c13c0 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff820c2000 t smuio_v13_0_3_get_die_id +ffffffff820c20a0 t smuio_v13_0_3_get_socket_id +ffffffff820c2140 t smuio_v13_0_3_get_pkg_type +ffffffff820c3000 t smuio_v13_0_6_get_rom_index_offset +ffffffff820c3040 t smuio_v13_0_6_get_rom_data_offset +ffffffff820c4000 t smuio_v9_0_get_rom_index_offset +ffffffff820c4040 t smuio_v9_0_get_rom_data_offset +ffffffff820c4080 t smuio_v9_0_update_rom_clock_gating +ffffffff820c41e0 t smuio_v9_0_get_clock_gating_state +ffffffff820c5000 T soc15_grbm_select +ffffffff820c5090 T soc15_program_register_sequence +ffffffff820c52b0 T soc15_set_virt_ops +ffffffff820c5320 t soc15_common_early_init +ffffffff820c5750 t soc15_common_late_init +ffffffff820c57c0 t soc15_common_sw_init +ffffffff820c5820 t soc15_common_sw_fini +ffffffff820c5880 t soc15_common_hw_init +ffffffff820c59d0 t soc15_common_hw_fini +ffffffff820c5ad0 t soc15_common_suspend +ffffffff820c5b10 t soc15_common_resume +ffffffff820c5c00 t soc15_common_is_idle +ffffffff820c5c30 t soc15_common_wait_for_idle +ffffffff820c5c60 t soc15_common_soft_reset +ffffffff820c5c90 t soc15_common_set_clockgating_state +ffffffff820c6040 t soc15_common_set_powergating_state +ffffffff820c6070 t soc15_common_get_clockgating_state +ffffffff820c61b0 t soc15_uvd_ctx_rreg +ffffffff820c6280 t soc15_uvd_ctx_wreg +ffffffff820c6320 t soc15_didt_rreg +ffffffff820c63e0 t soc15_didt_wreg +ffffffff820c6480 t soc15_gc_cac_rreg +ffffffff820c65d0 t soc15_gc_cac_wreg +ffffffff820c6710 t soc15_se_cac_rreg +ffffffff820c6860 t soc15_se_cac_wreg +ffffffff820c69a0 t soc15_read_disabled_bios +ffffffff820c69d0 t soc15_read_register +ffffffff820c6ae0 t soc15_asic_reset +ffffffff820c6cb0 t soc15_asic_reset_method +ffffffff820c6e70 t soc15_get_xclk +ffffffff820c6ed0 t soc15_set_uvd_clocks +ffffffff820c6f00 t soc15_set_vce_clocks +ffffffff820c6f30 t soc15_get_config_memsize +ffffffff820c6f50 t soc15_need_full_reset +ffffffff820c6f80 t soc15_get_pcie_usage +ffffffff820c70f0 t soc15_need_reset_on_init +ffffffff820c71b0 t soc15_get_pcie_replay_count +ffffffff820c7230 t soc15_supports_baco +ffffffff820c7290 t soc15_pre_asic_init +ffffffff820c72a0 t soc15_query_video_codecs +ffffffff820c7390 t vega20_get_pcie_usage +ffffffff820c8000 T soc21_grbm_select +ffffffff820c8090 t soc21_common_early_init +ffffffff820c8210 t soc21_common_late_init +ffffffff820c8310 t soc21_common_sw_init +ffffffff820c8360 t soc21_common_sw_fini +ffffffff820c8390 t soc21_common_hw_init +ffffffff820c8470 t soc21_common_hw_fini +ffffffff820c8520 t soc21_common_suspend +ffffffff820c85d0 t soc21_common_resume +ffffffff820c87e0 t soc21_common_is_idle +ffffffff820c8810 t soc21_common_wait_for_idle +ffffffff820c8840 t soc21_common_soft_reset +ffffffff820c8870 t soc21_common_set_clockgating_state +ffffffff820c8930 t soc21_common_set_powergating_state +ffffffff820c89a0 t soc21_common_get_clockgating_state +ffffffff820c89f0 t soc21_didt_rreg +ffffffff820c8ab0 t soc21_didt_wreg +ffffffff820c8b50 t soc21_read_disabled_bios +ffffffff820c8b80 t soc21_read_register +ffffffff820c8c80 t soc21_asic_reset +ffffffff820c8d60 t soc21_asic_reset_method +ffffffff820c8e30 t soc21_get_xclk +ffffffff820c8e60 t soc21_set_uvd_clocks +ffffffff820c8e90 t soc21_set_vce_clocks +ffffffff820c8ec0 t soc21_get_config_memsize +ffffffff820c8ee0 t soc21_need_full_reset +ffffffff820c8f10 t soc21_init_doorbell_index +ffffffff820c9030 t soc21_need_reset_on_init +ffffffff820c90e0 t soc21_pre_asic_init +ffffffff820c9110 t soc21_update_umd_stable_pstate +ffffffff820c9190 t soc21_query_video_codecs +ffffffff820ca000 t tonga_ih_early_init +ffffffff820ca050 t tonga_ih_sw_init +ffffffff820ca0e0 t tonga_ih_sw_fini +ffffffff820ca140 t tonga_ih_hw_init +ffffffff820ca3c0 t tonga_ih_hw_fini +ffffffff820ca490 t tonga_ih_suspend +ffffffff820ca560 t tonga_ih_resume +ffffffff820ca5a0 t tonga_ih_is_idle +ffffffff820ca5f0 t tonga_ih_wait_for_idle +ffffffff820ca6a0 t tonga_ih_check_soft_reset +ffffffff820ca700 t tonga_ih_pre_soft_reset +ffffffff820ca7e0 t tonga_ih_soft_reset +ffffffff820ca8e0 t tonga_ih_post_soft_reset +ffffffff820ca930 t tonga_ih_set_clockgating_state +ffffffff820ca960 t tonga_ih_set_powergating_state +ffffffff820ca990 t tonga_ih_get_wptr +ffffffff820caac0 t tonga_ih_decode_iv +ffffffff820cab40 t tonga_ih_set_rptr +ffffffff820cb000 t umc_v6_0_init_registers +ffffffff820cc000 t umc_v6_1_query_ras_error_count +ffffffff820cc5c0 t umc_v6_1_query_ras_error_address +ffffffff820cc8f0 t umc_v6_1_err_cnt_init +ffffffff820cd000 T umc_v6_7_convert_error_address +ffffffff820cd3a0 t umc_v6_7_query_ras_error_count +ffffffff820cd3e0 t umc_v6_7_query_ras_error_address +ffffffff820cd400 t umc_v6_7_query_ras_poison_mode +ffffffff820cd460 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff820cd480 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff820cd4a0 t umc_v6_7_query_ecc_error_count +ffffffff820cd7a0 t umc_v6_7_reset_error_count_per_channel +ffffffff820cd8e0 t umc_v6_7_query_error_address +ffffffff820cda10 t umc_v6_7_ecc_info_querry_ecc_error_count +ffffffff820cdc20 t umc_v6_7_ecc_info_query_error_address +ffffffff820ce000 t umc_v8_10_query_ras_error_count +ffffffff820ce040 t umc_v8_10_query_ras_error_address +ffffffff820ce060 t umc_v8_10_err_cnt_init +ffffffff820ce080 t umc_v8_10_query_ras_poison_mode +ffffffff820ce0b0 t umc_v8_10_ecc_info_query_ras_error_count +ffffffff820ce0d0 t umc_v8_10_ecc_info_query_ras_error_address +ffffffff820ce0f0 t umc_v8_10_set_eeprom_table_version +ffffffff820ce120 t umc_v8_10_query_ecc_error_count +ffffffff820ce200 t umc_v8_10_clear_error_count_per_channel +ffffffff820ce270 t umc_v8_10_query_error_address +ffffffff820ce3b0 t umc_v8_10_convert_error_address +ffffffff820ce5e0 t umc_v8_10_err_cnt_init_per_channel +ffffffff820ce6b0 t umc_v8_10_ecc_info_query_ecc_error_count +ffffffff820ce7a0 t umc_v8_10_ecc_info_query_error_address +ffffffff820cf000 t umc_v8_7_query_ras_error_count +ffffffff820cf370 t umc_v8_7_query_ras_error_address +ffffffff820cf540 t umc_v8_7_err_cnt_init +ffffffff820cf6d0 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff820cf800 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff820d0000 t uvd_v5_0_early_init +ffffffff820d0050 t uvd_v5_0_sw_init +ffffffff820d0170 t uvd_v5_0_sw_fini +ffffffff820d01d0 t uvd_v5_0_hw_init +ffffffff820d0780 t uvd_v5_0_hw_fini +ffffffff820d0810 t uvd_v5_0_suspend +ffffffff820d0950 t uvd_v5_0_resume +ffffffff820d09b0 t uvd_v5_0_is_idle +ffffffff820d0a00 t uvd_v5_0_wait_for_idle +ffffffff820d0a90 t uvd_v5_0_soft_reset +ffffffff820d0b80 t uvd_v5_0_set_clockgating_state +ffffffff820d0d80 t uvd_v5_0_set_powergating_state +ffffffff820d0dd0 t uvd_v5_0_get_clockgating_state +ffffffff820d0e70 t uvd_v5_0_ring_get_rptr +ffffffff820d0ec0 t uvd_v5_0_ring_get_wptr +ffffffff820d0f10 t uvd_v5_0_ring_set_wptr +ffffffff820d0f40 t uvd_v5_0_ring_emit_ib +ffffffff820d11e0 t uvd_v5_0_ring_emit_fence +ffffffff820d1800 t uvd_v5_0_ring_test_ring +ffffffff820d19d0 t uvd_v5_0_ring_insert_nop +ffffffff820d1b30 t uvd_v5_0_set_interrupt_state +ffffffff820d1b60 t uvd_v5_0_process_interrupt +ffffffff820d1bd0 t uvd_v5_0_stop +ffffffff820d1d50 t uvd_v5_0_start +ffffffff820d3000 t uvd_v6_0_early_init +ffffffff820d3190 t uvd_v6_0_sw_init +ffffffff820d3450 t uvd_v6_0_sw_fini +ffffffff820d3520 t uvd_v6_0_hw_init +ffffffff820d3b90 t uvd_v6_0_hw_fini +ffffffff820d3c20 t uvd_v6_0_suspend +ffffffff820d3d60 t uvd_v6_0_resume +ffffffff820d3dc0 t uvd_v6_0_is_idle +ffffffff820d3e10 t uvd_v6_0_wait_for_idle +ffffffff820d3ea0 t uvd_v6_0_check_soft_reset +ffffffff820d3f30 t uvd_v6_0_pre_soft_reset +ffffffff820d3f80 t uvd_v6_0_soft_reset +ffffffff820d4080 t uvd_v6_0_post_soft_reset +ffffffff820d4150 t uvd_v6_0_set_clockgating_state +ffffffff820d4340 t uvd_v6_0_set_powergating_state +ffffffff820d43c0 t uvd_v6_0_get_clockgating_state +ffffffff820d4470 t uvd_v6_0_ring_get_rptr +ffffffff820d44c0 t uvd_v6_0_ring_get_wptr +ffffffff820d4510 t uvd_v6_0_ring_set_wptr +ffffffff820d4540 t uvd_v6_0_ring_emit_ib +ffffffff820d48e0 t uvd_v6_0_ring_emit_fence +ffffffff820d4f00 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff820d5340 t uvd_v6_0_ring_emit_vm_flush +ffffffff820d56e0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff820d5710 t uvd_v6_0_ring_test_ring +ffffffff820d58e0 t uvd_v6_0_ring_insert_nop +ffffffff820d5a40 t uvd_v6_0_ring_emit_wreg +ffffffff820d5cf0 t uvd_v6_0_enc_ring_get_rptr +ffffffff820d5d50 t uvd_v6_0_enc_ring_get_wptr +ffffffff820d5db0 t uvd_v6_0_enc_ring_set_wptr +ffffffff820d5df0 t uvd_v6_0_enc_ring_emit_ib +ffffffff820d6060 t uvd_v6_0_enc_ring_emit_fence +ffffffff820d62c0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff820d6490 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff820d66c0 t uvd_v6_0_enc_ring_test_ring +ffffffff820d6830 t uvd_v6_0_enc_ring_test_ib +ffffffff820d6d90 t uvd_v6_0_enc_ring_insert_end +ffffffff820d6e20 t uvd_v6_0_set_interrupt_state +ffffffff820d6e50 t uvd_v6_0_process_interrupt +ffffffff820d6f50 t uvd_v6_0_stop +ffffffff820d70d0 t uvd_v6_0_start +ffffffff820d8000 t uvd_v7_0_early_init +ffffffff820d8290 t uvd_v7_0_sw_init +ffffffff820d8720 t uvd_v7_0_sw_fini +ffffffff820d8830 t uvd_v7_0_hw_init +ffffffff820dbd00 t uvd_v7_0_hw_fini +ffffffff820dc0b0 t uvd_v7_0_suspend +ffffffff820dc190 t uvd_v7_0_resume +ffffffff820dc1f0 t uvd_v7_0_set_clockgating_state +ffffffff820dc220 t uvd_v7_0_ring_get_rptr +ffffffff820dc2c0 t uvd_v7_0_ring_get_wptr +ffffffff820dc360 t uvd_v7_0_ring_set_wptr +ffffffff820dc3e0 t uvd_v7_0_ring_patch_cs_in_place +ffffffff820dc450 t uvd_v7_0_ring_emit_ib +ffffffff820dc840 t uvd_v7_0_ring_emit_fence +ffffffff820dcf00 t uvd_v7_0_ring_emit_vm_flush +ffffffff820dcf70 t uvd_v7_0_ring_emit_hdp_flush +ffffffff820dcfa0 t uvd_v7_0_ring_test_ring +ffffffff820dd270 t uvd_v7_0_ring_insert_nop +ffffffff820dd410 t uvd_v7_0_ring_emit_wreg +ffffffff820dd700 t uvd_v7_0_ring_emit_reg_wait +ffffffff820ddae0 t uvd_v7_0_enc_ring_get_rptr +ffffffff820ddbe0 t uvd_v7_0_enc_ring_get_wptr +ffffffff820ddcf0 t uvd_v7_0_enc_ring_set_wptr +ffffffff820dddf0 t uvd_v7_0_enc_ring_emit_ib +ffffffff820de060 t uvd_v7_0_enc_ring_emit_fence +ffffffff820de2c0 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff820de330 t uvd_v7_0_enc_ring_test_ring +ffffffff820de4b0 t uvd_v7_0_enc_ring_test_ib +ffffffff820dea10 t uvd_v7_0_enc_ring_insert_end +ffffffff820deaa0 t uvd_v7_0_enc_ring_emit_wreg +ffffffff820dec00 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff820dedd0 t uvd_v7_0_set_interrupt_state +ffffffff820dee00 t uvd_v7_0_process_interrupt +ffffffff820df000 t vce_v3_0_early_init +ffffffff820df1a0 t vce_v3_0_sw_init +ffffffff820df340 t vce_v3_0_sw_fini +ffffffff820df3a0 t vce_v3_0_hw_init +ffffffff820df4a0 t vce_v3_0_hw_fini +ffffffff820df5a0 t vce_v3_0_suspend +ffffffff820df6b0 t vce_v3_0_resume +ffffffff820df7d0 t vce_v3_0_is_idle +ffffffff820df840 t vce_v3_0_wait_for_idle +ffffffff820df900 t vce_v3_0_check_soft_reset +ffffffff820dfa30 t vce_v3_0_pre_soft_reset +ffffffff820dfb00 t vce_v3_0_soft_reset +ffffffff820dfc00 t vce_v3_0_post_soft_reset +ffffffff820dfcd0 t vce_v3_0_set_clockgating_state +ffffffff820e00b0 t vce_v3_0_set_powergating_state +ffffffff820e0c00 t vce_v3_0_get_clockgating_state +ffffffff820e0cf0 t vce_v3_0_ring_get_rptr +ffffffff820e0de0 t vce_v3_0_ring_get_wptr +ffffffff820e0ed0 t vce_v3_0_ring_set_wptr +ffffffff820e0fa0 t vce_v3_0_ring_emit_ib +ffffffff820e1210 t vce_v3_0_emit_pipeline_sync +ffffffff820e13e0 t vce_v3_0_emit_vm_flush +ffffffff820e1680 t vce_v3_0_set_interrupt_state +ffffffff820e1700 t vce_v3_0_process_interrupt +ffffffff820e17e0 t vce_v3_0_stop +ffffffff820e2000 t vce_v4_0_early_init +ffffffff820e20c0 t vce_v4_0_sw_init +ffffffff820e23d0 t vce_v4_0_sw_fini +ffffffff820e2470 t vce_v4_0_hw_init +ffffffff820e2cc0 t vce_v4_0_hw_fini +ffffffff820e2e30 t vce_v4_0_suspend +ffffffff820e2fa0 t vce_v4_0_resume +ffffffff820e3070 t vce_v4_0_set_clockgating_state +ffffffff820e30a0 t vce_v4_0_set_powergating_state +ffffffff820e31b0 t vce_v4_0_ring_get_rptr +ffffffff820e3220 t vce_v4_0_ring_get_wptr +ffffffff820e32b0 t vce_v4_0_ring_set_wptr +ffffffff820e3340 t vce_v4_0_ring_emit_ib +ffffffff820e35b0 t vce_v4_0_ring_emit_fence +ffffffff820e3810 t vce_v4_0_emit_vm_flush +ffffffff820e3880 t vce_v4_0_ring_insert_end +ffffffff820e3910 t vce_v4_0_emit_wreg +ffffffff820e3a70 t vce_v4_0_emit_reg_wait +ffffffff820e3c40 t vce_v4_0_set_interrupt_state +ffffffff820e3cd0 t vce_v4_0_process_interrupt +ffffffff820e3d80 t vce_v4_0_start +ffffffff820e5000 T vcn_dec_sw_ring_emit_fence +ffffffff820e5260 T vcn_dec_sw_ring_insert_end +ffffffff820e52f0 T vcn_dec_sw_ring_emit_ib +ffffffff820e5560 T vcn_dec_sw_ring_emit_reg_wait +ffffffff820e5730 T vcn_dec_sw_ring_emit_vm_flush +ffffffff820e57a0 T vcn_dec_sw_ring_emit_wreg +ffffffff820e6000 T vcn_v1_0_set_pg_for_begin_use +ffffffff820e6160 T vcn_v1_0_ring_end_use +ffffffff820e61d0 t vcn_v1_0_early_init +ffffffff820e6340 t vcn_v1_0_sw_init +ffffffff820e6640 t vcn_v1_0_sw_fini +ffffffff820e66b0 t vcn_v1_0_hw_init +ffffffff820e67b0 t vcn_v1_0_hw_fini +ffffffff820e68d0 t vcn_v1_0_suspend +ffffffff820e6960 t vcn_v1_0_resume +ffffffff820e6a80 t vcn_v1_0_is_idle +ffffffff820e6b20 t vcn_v1_0_wait_for_idle +ffffffff820e6b60 t vcn_v1_0_set_clockgating_state +ffffffff820e6c30 t vcn_v1_0_set_powergating_state +ffffffff820e72a0 t vcn_v1_0_dec_ring_get_rptr +ffffffff820e7330 t vcn_v1_0_dec_ring_get_wptr +ffffffff820e73c0 t vcn_v1_0_dec_ring_set_wptr +ffffffff820e74e0 t vcn_v1_0_ring_patch_cs_in_place +ffffffff820e76d0 t vcn_v1_0_dec_ring_emit_ib +ffffffff820e7aa0 t vcn_v1_0_dec_ring_emit_fence +ffffffff820e8130 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff820e81a0 t vcn_v1_0_dec_ring_insert_nop +ffffffff820e8340 t vcn_v1_0_dec_ring_insert_start +ffffffff820e8530 t vcn_v1_0_dec_ring_insert_end +ffffffff820e8640 t vcn_v1_0_ring_begin_use +ffffffff820e8700 t vcn_v1_0_dec_ring_emit_wreg +ffffffff820e89e0 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff820e8da0 t vcn_v1_0_enc_ring_get_rptr +ffffffff820e8e80 t vcn_v1_0_enc_ring_get_wptr +ffffffff820e8f60 t vcn_v1_0_enc_ring_set_wptr +ffffffff820e9020 t vcn_v1_0_enc_ring_emit_ib +ffffffff820e9290 t vcn_v1_0_enc_ring_emit_fence +ffffffff820e94f0 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff820e9560 t vcn_v1_0_enc_ring_insert_end +ffffffff820e95f0 t vcn_v1_0_enc_ring_emit_wreg +ffffffff820e9750 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff820e9920 t vcn_v1_0_set_interrupt_state +ffffffff820e9950 t vcn_v1_0_process_interrupt +ffffffff820e9a10 t vcn_v1_0_idle_work_handler +ffffffff820e9bc0 t vcn_v1_0_pause_dpg_mode +ffffffff820eac90 t vcn_v1_0_enable_clock_gating +ffffffff820eb130 t vcn_v1_0_disable_clock_gating +ffffffff820eb790 t vcn_1_0_enable_static_power_gating +ffffffff820eb960 t vcn_v1_0_start_dpg_mode +ffffffff820f0190 t vcn_v1_0_start_spg_mode +ffffffff820f29f0 t vcn_v1_0_clock_gating_dpg_mode +ffffffff820f4000 T vcn_v2_0_dec_ring_insert_start +ffffffff820f41d0 T vcn_v2_0_dec_ring_insert_end +ffffffff820f42d0 T vcn_v2_0_dec_ring_insert_nop +ffffffff820f4450 T vcn_v2_0_dec_ring_emit_fence +ffffffff820f4a80 T vcn_v2_0_dec_ring_emit_ib +ffffffff820f4e20 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff820f51b0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff820f5220 T vcn_v2_0_dec_ring_emit_wreg +ffffffff820f54d0 T vcn_v2_0_enc_ring_emit_fence +ffffffff820f5730 T vcn_v2_0_enc_ring_insert_end +ffffffff820f57c0 T vcn_v2_0_enc_ring_emit_ib +ffffffff820f5a30 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff820f5c00 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff820f5c70 T vcn_v2_0_enc_ring_emit_wreg +ffffffff820f5dd0 T vcn_v2_0_dec_ring_test_ring +ffffffff820f60b0 t vcn_v2_0_early_init +ffffffff820f6220 t vcn_v2_0_sw_init +ffffffff820f65c0 t vcn_v2_0_sw_fini +ffffffff820f6670 t vcn_v2_0_hw_init +ffffffff820f70b0 t vcn_v2_0_hw_fini +ffffffff820f71d0 t vcn_v2_0_suspend +ffffffff820f7200 t vcn_v2_0_resume +ffffffff820f7260 t vcn_v2_0_is_idle +ffffffff820f7300 t vcn_v2_0_wait_for_idle +ffffffff820f7340 t vcn_v2_0_set_clockgating_state +ffffffff820f73f0 t vcn_v2_0_set_powergating_state +ffffffff820f7ab0 t vcn_v2_0_dec_ring_get_rptr +ffffffff820f7b40 t vcn_v2_0_dec_ring_get_wptr +ffffffff820f7bf0 t vcn_v2_0_dec_ring_set_wptr +ffffffff820f7d30 t vcn_v2_0_enc_ring_get_rptr +ffffffff820f7e10 t vcn_v2_0_enc_ring_get_wptr +ffffffff820f7f10 t vcn_v2_0_enc_ring_set_wptr +ffffffff820f8000 t vcn_v2_0_set_interrupt_state +ffffffff820f8030 t vcn_v2_0_process_interrupt +ffffffff820f80f0 t vcn_v2_0_pause_dpg_mode +ffffffff820f89c0 t vcn_v2_0_enable_clock_gating +ffffffff820f8c80 t vcn_v2_0_disable_clock_gating +ffffffff820f9110 t vcn_v2_0_start +ffffffff820fe0e0 t vcn_v2_0_enable_static_power_gating +ffffffff820fe260 t vcn_v2_0_clock_gating_dpg_mode +ffffffff820ff140 t vcn_v2_0_mc_resume_dpg_mode +ffffffff82104000 t vcn_v2_6_query_poison_status +ffffffff821040e0 t vcn_v2_5_early_init +ffffffff821043e0 t vcn_v2_5_sw_init +ffffffff82104930 t vcn_v2_5_sw_fini +ffffffff82104a20 t vcn_v2_5_hw_init +ffffffff82105530 t vcn_v2_5_hw_fini +ffffffff821056e0 t vcn_v2_5_suspend +ffffffff82105710 t vcn_v2_5_resume +ffffffff82105770 t vcn_v2_5_is_idle +ffffffff82105870 t vcn_v2_5_wait_for_idle +ffffffff82105920 t vcn_v2_5_set_clockgating_state +ffffffff821059b0 t vcn_v2_5_set_powergating_state +ffffffff821081b0 t vcn_v2_5_dec_ring_get_rptr +ffffffff82108250 t vcn_v2_5_dec_ring_get_wptr +ffffffff82108310 t vcn_v2_5_dec_ring_set_wptr +ffffffff821083c0 t vcn_v2_5_enc_ring_get_rptr +ffffffff821084c0 t vcn_v2_5_enc_ring_get_wptr +ffffffff821085d0 t vcn_v2_5_enc_ring_set_wptr +ffffffff821086e0 t vcn_v2_5_set_interrupt_state +ffffffff82108710 t vcn_v2_5_process_interrupt +ffffffff82108830 t vcn_v2_6_set_ras_interrupt_state +ffffffff82108860 t vcn_v2_5_pause_dpg_mode +ffffffff821090a0 t vcn_v2_5_enable_clock_gating +ffffffff82109400 t vcn_v2_5_disable_clock_gating +ffffffff82109970 t vcn_v2_5_start_dpg_mode +ffffffff8210d910 t vcn_v2_5_clock_gating_dpg_mode +ffffffff8210e820 t vcn_v2_5_mc_resume_dpg_mode +ffffffff82114000 t vcn_v3_0_early_init +ffffffff82114230 t vcn_v3_0_sw_init +ffffffff82114750 t vcn_v3_0_sw_fini +ffffffff82114850 t vcn_v3_0_hw_init +ffffffff82115470 t vcn_v3_0_hw_fini +ffffffff82115590 t vcn_v3_0_suspend +ffffffff821155c0 t vcn_v3_0_resume +ffffffff82115620 t vcn_v3_0_is_idle +ffffffff82115720 t vcn_v3_0_wait_for_idle +ffffffff821157d0 t vcn_v3_0_set_clockgating_state +ffffffff821158f0 t vcn_v3_0_set_powergating_state +ffffffff821184e0 t vcn_v3_0_dec_ring_get_rptr +ffffffff82118580 t vcn_v3_0_dec_ring_get_wptr +ffffffff82118640 t vcn_v3_0_dec_ring_set_wptr +ffffffff821187b0 t vcn_v3_0_ring_patch_cs_in_place +ffffffff82118b30 t vcn_v3_0_enc_ring_get_rptr +ffffffff82118c30 t vcn_v3_0_enc_ring_get_wptr +ffffffff82118d40 t vcn_v3_0_enc_ring_set_wptr +ffffffff82118e50 t vcn_v3_0_set_interrupt_state +ffffffff82118e80 t vcn_v3_0_process_interrupt +ffffffff82118fa0 t vcn_v3_0_pause_dpg_mode +ffffffff821198c0 t vcn_v3_0_enable_clock_gating +ffffffff82119b90 t vcn_v3_0_disable_clock_gating +ffffffff8211a150 t vcn_v3_0_start_dpg_mode +ffffffff8211d960 t vcn_v3_0_clock_gating_dpg_mode +ffffffff8211e8a0 t vcn_v3_0_mc_resume_dpg_mode +ffffffff82124000 t vcn_v4_0_query_ras_poison_status +ffffffff821240e0 t vcn_v4_0_early_init +ffffffff821242b0 t vcn_v4_0_sw_init +ffffffff821245b0 t vcn_v4_0_sw_fini +ffffffff821246b0 t vcn_v4_0_hw_init +ffffffff821251a0 t vcn_v4_0_hw_fini +ffffffff82125310 t vcn_v4_0_suspend +ffffffff82125340 t vcn_v4_0_resume +ffffffff821253a0 t vcn_v4_0_is_idle +ffffffff821254b0 t vcn_v4_0_wait_for_idle +ffffffff82125570 t vcn_v4_0_set_clockgating_state +ffffffff821256a0 t vcn_v4_0_set_powergating_state +ffffffff82126010 t vcn_v4_0_unified_ring_get_rptr +ffffffff821260f0 t vcn_v4_0_unified_ring_get_wptr +ffffffff821261f0 t vcn_v4_0_unified_ring_set_wptr +ffffffff821262f0 t vcn_v4_0_ring_patch_cs_in_place +ffffffff821266e0 t vcn_v4_0_limit_sched +ffffffff82126750 t vcn_v4_0_set_interrupt_state +ffffffff82126780 t vcn_v4_0_process_interrupt +ffffffff82126850 t vcn_v4_0_set_ras_interrupt_state +ffffffff82126880 t vcn_v4_0_pause_dpg_mode +ffffffff82126b40 t vcn_v4_0_enable_clock_gating +ffffffff82126e70 t vcn_v4_0_disable_clock_gating +ffffffff821273b0 t vcn_v4_0_start +ffffffff8212c940 t vcn_v4_0_disable_clock_gating_dpg_mode +ffffffff8212d880 t vcn_v4_0_mc_resume_dpg_mode +ffffffff82133000 t vcn_v4_0_3_early_init +ffffffff82133110 t vcn_v4_0_3_sw_init +ffffffff82133410 t vcn_v4_0_3_sw_fini +ffffffff821334e0 t vcn_v4_0_3_hw_init +ffffffff821342f0 t vcn_v4_0_3_hw_fini +ffffffff82134390 t vcn_v4_0_3_suspend +ffffffff82134410 t vcn_v4_0_3_resume +ffffffff82134470 t vcn_v4_0_3_is_idle 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vega10_ih_hw_fini +ffffffff821427e0 t vega10_ih_suspend +ffffffff82142840 t vega10_ih_resume +ffffffff82142850 t vega10_ih_is_idle +ffffffff82142880 t vega10_ih_wait_for_idle +ffffffff821428b0 t vega10_ih_soft_reset +ffffffff821428e0 t vega10_ih_set_clockgating_state +ffffffff82142a40 t vega10_ih_set_powergating_state +ffffffff82142a70 t vega10_ih_get_wptr +ffffffff82142bd0 t vega10_ih_set_rptr +ffffffff82142cc0 t vega10_ih_self_irq +ffffffff82142d40 t vega10_ih_toggle_interrupts +ffffffff82143000 T vega10_reg_base_init +ffffffff82143150 T vega10_doorbell_index_init +ffffffff82144000 t vega20_ih_early_init +ffffffff82144050 t vega20_ih_sw_init +ffffffff82144360 t vega20_ih_sw_fini +ffffffff821443a0 t vega20_ih_hw_init +ffffffff82144a80 t vega20_ih_hw_fini +ffffffff82144ae0 t vega20_ih_suspend +ffffffff82144b40 t vega20_ih_resume +ffffffff82144b50 t vega20_ih_is_idle +ffffffff82144b80 t vega20_ih_wait_for_idle +ffffffff82144bb0 t vega20_ih_soft_reset +ffffffff82144be0 t vega20_ih_set_clockgating_state +ffffffff82144d20 t vega20_ih_set_powergating_state +ffffffff82144d50 t vega20_ih_get_wptr +ffffffff82144eb0 t vega20_ih_set_rptr +ffffffff82144fa0 t vega20_ih_self_irq +ffffffff82145020 t vega20_ih_toggle_interrupts +ffffffff82146000 T vega20_reg_base_init +ffffffff82146160 T vega20_doorbell_index_init +ffffffff82147000 T vi_srbm_select +ffffffff82147050 T vi_set_virt_ops +ffffffff82147090 T vi_set_ip_blocks +ffffffff82147640 T legacy_doorbell_index_init +ffffffff821476f0 t vi_common_early_init +ffffffff821479f0 t vi_common_late_init +ffffffff82147a40 t vi_common_sw_init +ffffffff82147a90 t vi_common_sw_fini +ffffffff82147ac0 t vi_common_hw_init +ffffffff821482a0 t vi_common_hw_fini +ffffffff82148320 t vi_common_suspend +ffffffff821483a0 t vi_common_resume +ffffffff821483e0 t vi_common_is_idle +ffffffff82148410 t vi_common_wait_for_idle +ffffffff82148440 t vi_common_soft_reset +ffffffff82148470 t vi_common_set_clockgating_state +ffffffff82148a70 t vi_common_set_powergating_state +ffffffff82148aa0 t vi_common_get_clockgating_state +ffffffff82148b90 t cz_smc_rreg +ffffffff82148c30 t cz_smc_wreg +ffffffff82148cb0 t vi_smc_rreg +ffffffff82148d60 t vi_smc_wreg +ffffffff82148df0 t vi_pcie_rreg +ffffffff82148eb0 t vi_pcie_wreg +ffffffff82148f70 t vi_uvd_ctx_rreg +ffffffff82149020 t vi_uvd_ctx_wreg +ffffffff821490b0 t vi_didt_rreg +ffffffff82149150 t vi_didt_wreg +ffffffff821491d0 t vi_gc_cac_rreg +ffffffff82149270 t vi_gc_cac_wreg +ffffffff821492f0 t vi_read_disabled_bios +ffffffff82149530 t vi_read_bios_from_rom +ffffffff82149660 t vi_read_register +ffffffff82149940 t vi_asic_reset +ffffffff82149ae0 t vi_asic_reset_method +ffffffff82149ba0 t vi_get_xclk +ffffffff82149c60 t vi_set_uvd_clocks +ffffffff82149d20 t vi_set_vce_clocks +ffffffff8214a0a0 t vi_get_config_memsize +ffffffff8214a0c0 t vi_flush_hdp +ffffffff8214a140 t vi_invalidate_hdp +ffffffff8214a1c0 t vi_need_full_reset +ffffffff8214a210 t vi_get_pcie_usage +ffffffff8214a370 t vi_need_reset_on_init +ffffffff8214a410 t vi_get_pcie_replay_count +ffffffff8214a490 t vi_asic_supports_baco +ffffffff8214a4e0 t vi_pre_asic_init +ffffffff8214a510 t vi_query_video_codecs +ffffffff8214a5b0 t vi_set_uvd_clock +ffffffff8214b000 T amdgpu_xcp_drm_dev_alloc +ffffffff8214b060 T amdgpu_xcp_drv_release +ffffffff8214c000 T amdgpu_dm_find_first_crtc_matching_connector +ffffffff8214c070 T amdgpu_dm_update_connector_after_detect +ffffffff8214c680 T amdgpu_dm_update_freesync_caps +ffffffff8214cb60 T dm_atomic_get_state +ffffffff8214cbd0 T amdgpu_dm_connector_atomic_set_property +ffffffff8214cc90 T amdgpu_dm_connector_atomic_get_property +ffffffff8214cd30 T amdgpu_dm_connector_funcs_reset +ffffffff8214ce30 T amdgpu_dm_connector_atomic_duplicate_state +ffffffff8214cf40 T create_validate_stream_for_sink +ffffffff8214e870 T amdgpu_dm_connector_mode_valid +ffffffff8214ea70 T convert_dc_color_depth_into_bpc +ffffffff8214eab0 t dm_encoder_helper_disable +ffffffff8214eae0 t dm_encoder_helper_atomic_check +ffffffff8214ecf0 T amdgpu_dm_connector_init_helper +ffffffff8214f0e0 T amdgpu_dm_get_encoder_crtc_mask +ffffffff8214f130 T dm_restore_drm_connector_state +ffffffff8214f2c0 t parse_hdmi_amd_vsdb +ffffffff8214f670 T amdgpu_dm_trigger_timing_sync +ffffffff8214f850 T dm_write_reg_func +ffffffff8214f870 T dm_read_reg_func +ffffffff8214f920 T amdgpu_dm_process_dmub_aux_transfer_sync +ffffffff8214fb90 T amdgpu_dm_process_dmub_set_config_sync +ffffffff8214fd30 T check_seamless_boot_capability +ffffffff8214fd80 T dm_execute_dmub_cmd +ffffffff8214fda0 T dm_execute_dmub_cmd_list +ffffffff8214fdc0 t dm_early_init +ffffffff82150190 t dm_late_init +ffffffff82150490 t dm_sw_init +ffffffff82150ab0 t dm_sw_fini +ffffffff82150b80 t amdgpu_dm_early_fini +ffffffff82150be0 t dm_hw_init +ffffffff82152bb0 t dm_hw_fini +ffffffff82152c20 t dm_suspend +ffffffff82153060 t dm_resume +ffffffff82153ac0 t dm_is_idle +ffffffff82153af0 t dm_wait_for_idle +ffffffff82153b20 t dm_check_soft_reset +ffffffff82153b50 t dm_soft_reset +ffffffff82153b80 t dm_set_clockgating_state +ffffffff82153bb0 t dm_set_powergating_state +ffffffff82153be0 t dm_bandwidth_update +ffffffff82153c10 t dm_vblank_get_counter +ffffffff82153c90 t dm_crtc_get_scanoutpos +ffffffff82153d80 t amdgpu_dm_dmub_reg_read +ffffffff82153e30 t amdgpu_dm_dmub_reg_write +ffffffff82153e60 t dm_dmub_hw_init +ffffffff821542c0 t dmub_aux_setconfig_callback +ffffffff82154370 t amdgpu_dm_fini +ffffffff821545c0 t emulated_link_detect +ffffffff821546d0 t amdgpu_dm_atomic_check +ffffffff821555c0 t dm_update_plane_state +ffffffff82155c70 t dm_update_crtc_state +ffffffff82156760 t dm_check_crtc_cursor +ffffffff82156ae0 t is_scaling_state_different +ffffffff82156b80 t do_aquire_global_lock +ffffffff82156e50 t dm_update_mst_vcpi_slots_for_dsc +ffffffff82157060 t dm_atomic_destroy_state +ffffffff821570a0 t dm_check_cursor_fb +ffffffff82157250 t fill_dc_plane_attributes +ffffffff82157500 t fill_dc_plane_info_and_addr +ffffffff82157850 t fill_hdr_info_packet +ffffffff821579c0 t is_timing_unchanged_for_freesync +ffffffff82157af0 t get_highest_refresh_rate_mode +ffffffff82157c50 t update_stream_scaling_settings +ffffffff82157da0 t amdgpu_dm_atomic_commit_tail +ffffffff8215af20 t amdgpu_dm_backlight_set_level +ffffffff8215b120 t dm_atomic_duplicate_state +ffffffff8215b1e0 t amdgpu_dm_audio_component_bind +ffffffff8215b250 t amdgpu_dm_audio_component_unbind +ffffffff8215b2b0 t amdgpu_dm_audio_component_get_eld +ffffffff8215b410 t dm_dmub_outbox1_low_irq +ffffffff8215b750 t dm_handle_hpd_work +ffffffff8215b7e0 t amdgpu_dm_encoder_destroy +ffffffff8215b820 t amdgpu_dm_i2c_xfer +ffffffff8215b980 t amdgpu_dm_i2c_func +ffffffff8215b9b0 t amdgpu_dm_connector_detect +ffffffff8215ba70 t amdgpu_dm_connector_funcs_force +ffffffff8215bb60 t amdgpu_dm_connector_late_register +ffffffff8215bce0 t amdgpu_dm_connector_unregister +ffffffff8215bd00 t amdgpu_dm_connector_destroy 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T amdgpu_dm_crtc_modeset_required +ffffffff821600d0 T amdgpu_dm_crtc_vrr_active_irq +ffffffff82160110 T amdgpu_dm_crtc_set_vupdate_irq +ffffffff821601d0 T amdgpu_dm_crtc_vrr_active +ffffffff82160210 T amdgpu_dm_crtc_enable_vblank +ffffffff82160230 t dm_set_vblank +ffffffff821604f0 T amdgpu_dm_crtc_disable_vblank +ffffffff82160510 T amdgpu_dm_crtc_init +ffffffff82160730 t vblank_control_worker +ffffffff82160880 t dm_crtc_reset_state +ffffffff82160930 t amdgpu_dm_crtc_destroy +ffffffff82160970 t dm_crtc_duplicate_state +ffffffff82160b40 t dm_crtc_destroy_state +ffffffff82160b90 t dm_crtc_helper_mode_fixup +ffffffff82160bc0 t dm_crtc_helper_disable +ffffffff82160bf0 t dm_crtc_helper_atomic_check +ffffffff82161000 T hdcp_update_display +ffffffff821612d0 t process_output +ffffffff82161430 T hdcp_reset_display +ffffffff821615c0 T hdcp_handle_cpirq +ffffffff821615f0 T hdcp_destroy +ffffffff82161720 T hdcp_create_workqueue +ffffffff82161b90 t event_cpirq +ffffffff82161c00 t event_property_update +ffffffff82161e70 t event_callback +ffffffff82161f20 t event_watchdog_timer +ffffffff82161fd0 t event_property_validate +ffffffff82162180 t lp_write_i2c +ffffffff82162210 t lp_read_i2c +ffffffff821622c0 t lp_write_dpcd +ffffffff821622f0 t lp_read_dpcd +ffffffff82162320 t update_config +ffffffff821626d0 t enable_assr +ffffffff82162820 t __delayed_work_tick +ffffffff82163000 T dm_helpers_parse_edid_caps +ffffffff82163290 T dm_helpers_dp_update_branch_info +ffffffff821632c0 T dm_helpers_dp_mst_write_payload_allocation_table +ffffffff821636d0 T dm_helpers_dp_mst_poll_pending_down_reply +ffffffff82163700 T dm_helpers_dp_mst_clear_payload_allocation_table +ffffffff82163730 T dm_helpers_dp_mst_poll_for_allocation_change_trigger +ffffffff821637b0 T dm_helpers_dp_mst_send_payload_allocation +ffffffff82163890 T dm_dtn_log_begin +ffffffff821638e0 T dm_dtn_log_append_v +ffffffff82163a60 T dm_dtn_log_end +ffffffff82163ab0 T dm_helpers_dp_mst_start_top_mgr +ffffffff82163b90 T dm_helpers_dp_mst_stop_top_mgr +ffffffff82163c40 T dm_helpers_dp_read_dpcd +ffffffff82163ce0 T dm_helpers_dp_write_dpcd +ffffffff82163d70 T dm_helpers_submit_i2c +ffffffff82163ec0 T dm_helpers_dp_write_dsc_enable +ffffffff82164600 T dm_helpers_is_dp_sink_present +ffffffff821646b0 T dm_helpers_read_local_edid +ffffffff82164960 T dm_helper_dmub_aux_transfer_sync +ffffffff821649b0 T dm_helpers_dmub_set_config_sync +ffffffff821649d0 T dm_set_dcn_clocks +ffffffff82164a00 T dm_helpers_smu_timeout +ffffffff82164a30 T dm_helpers_init_panel_settings +ffffffff82164aa0 T dm_helpers_override_panel_settings +ffffffff82164ae0 T dm_helpers_allocate_gpu_mem +ffffffff82164bf0 T dm_helpers_free_gpu_mem +ffffffff82164c90 T dm_helpers_dmub_outbox_interrupt_control +ffffffff82164d30 T dm_helpers_mst_enable_stream_features +ffffffff82164e60 T dm_helpers_dp_handle_test_pattern_request +ffffffff821651b0 T dm_set_phyd32clk +ffffffff821651e0 T dm_helpers_enable_periodic_detection +ffffffff82165210 T dm_helpers_dp_mst_update_branch_bandwidth +ffffffff82165240 T dm_get_adaptive_sync_support_type +ffffffff821652b0 t execute_synaptics_rc_command +ffffffff82166000 T amdgpu_dm_irq_register_interrupt +ffffffff821661d0 t dm_irq_work_func +ffffffff821661f0 T amdgpu_dm_irq_unregister_interrupt +ffffffff821663b0 T amdgpu_dm_irq_init +ffffffff821664b0 T amdgpu_dm_irq_fini +ffffffff82166680 T amdgpu_dm_irq_suspend +ffffffff821667d0 T amdgpu_dm_irq_resume_early +ffffffff821669a0 T amdgpu_dm_irq_resume_late +ffffffff82166b70 T amdgpu_dm_set_irq_funcs +ffffffff82166c30 T amdgpu_dm_outbox_init +ffffffff82166c60 T amdgpu_dm_hpd_init +ffffffff82166d30 T amdgpu_dm_hpd_fini +ffffffff82166e00 t amdgpu_dm_set_crtc_irq_state +ffffffff82166e90 t amdgpu_dm_irq_handler +ffffffff821670f0 t amdgpu_dm_set_vline0_irq_state +ffffffff82167180 t amdgpu_dm_set_dmub_outbox_irq_state +ffffffff821671e0 t amdgpu_dm_set_vupdate_irq_state +ffffffff82167270 t amdgpu_dm_set_dmub_trace_irq_state +ffffffff821672d0 t amdgpu_dm_set_pflip_irq_state +ffffffff82167360 t amdgpu_dm_set_hpd_irq_state +ffffffff82168000 T needs_dsc_aux_workaround +ffffffff82168050 T dm_dp_create_fake_mst_encoders +ffffffff82168110 T dm_handle_mst_sideband_msg_ready_event +ffffffff821683b0 T amdgpu_dm_initialize_dp_connector +ffffffff821684d0 t kasprintf +ffffffff821685b0 t dm_dp_aux_transfer +ffffffff82168700 T dm_mst_get_pbn_divider +ffffffff82168770 T compute_mst_dsc_configs_for_state +ffffffff82168a30 t is_dsc_need_re_compute +ffffffff82168c00 t compute_mst_dsc_configs_for_link +ffffffff821692c0 T pre_validate_dsc +ffffffff821698e0 T dm_dp_mst_is_port_support_mode +ffffffff82169b80 t amdgpu_dm_encoder_destroy +ffffffff82169b90 t dm_dp_add_mst_connector +ffffffff82169dc0 t dm_handle_mst_down_rep_msg_ready +ffffffff82169de0 t amdgpu_dm_mst_connector_late_register +ffffffff82169e30 t amdgpu_dm_mst_connector_early_unregister +ffffffff82169f20 t dm_dp_mst_connector_destroy +ffffffff82169fc0 t dm_dp_mst_get_modes +ffffffff8216a570 t dm_dp_mst_detect +ffffffff8216a780 t dm_mst_atomic_best_encoder +ffffffff8216a7e0 t dm_dp_mst_atomic_check +ffffffff8216a810 t set_dsc_configs_from_fairness_vars +ffffffff8216ab00 t increase_dsc_bpp +ffffffff8216b0a0 t try_disable_dsc +ffffffff8216c000 T amdgpu_dm_plane_get_format_info +ffffffff8216c020 T amdgpu_dm_plane_fill_blending_from_plane_state +ffffffff8216c120 T amdgpu_dm_plane_fill_plane_buffer_attributes +ffffffff8216c6b0 T amdgpu_dm_plane_helper_check_state +ffffffff8216c8d0 T amdgpu_dm_plane_fill_dc_scaling_info +ffffffff8216cb30 T amdgpu_dm_plane_handle_cursor_update +ffffffff8216ce00 T amdgpu_dm_plane_init +ffffffff8216ddc0 T is_video_format +ffffffff8216de10 t dm_drm_plane_reset +ffffffff8216deb0 t dm_drm_plane_duplicate_state +ffffffff8216df50 t dm_drm_plane_destroy_state +ffffffff8216df90 t dm_plane_format_mod_supported +ffffffff8216e0c0 t dm_plane_helper_prepare_fb +ffffffff8216e400 t dm_plane_helper_cleanup_fb +ffffffff8216e4b0 t dm_plane_atomic_check +ffffffff8216e5a0 t dm_plane_atomic_async_check +ffffffff8216e5e0 t dm_plane_atomic_async_update +ffffffff8216e690 t amdgpu_bo_reserve +ffffffff8216e8d0 t amdgpu_bo_unreserve +ffffffff8216f000 T dm_pp_apply_display_requirements +ffffffff8216f1f0 T dm_pp_get_clock_levels_by_type +ffffffff8216f5b0 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff8216f7a0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff8216f990 T dm_pp_notify_wm_clock_changes +ffffffff8216f9f0 T dm_pp_apply_power_level_change_request +ffffffff8216fa20 T dm_pp_apply_clock_for_voltage_request +ffffffff8216fad0 T dm_pp_get_static_clocks +ffffffff8216fba0 T dm_pp_get_funcs +ffffffff8216fcb0 t pp_rv_set_wm_ranges +ffffffff8216fe40 t pp_rv_set_pme_wa_enable +ffffffff8216fe60 t pp_rv_set_active_display_count +ffffffff8216fe80 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff8216fea0 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff8216fec0 t pp_rv_set_hard_min_fclk_by_freq +ffffffff8216fee0 t pp_nv_set_display_count +ffffffff8216ff40 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff8216ffb0 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff82170010 t pp_nv_set_voltage_by_freq +ffffffff821700b0 t pp_nv_set_wm_ranges +ffffffff82170100 t pp_nv_set_hard_min_uclk_by_freq +ffffffff82170170 t pp_nv_get_maximum_sustainable_clocks +ffffffff821701d0 t pp_nv_get_uclk_dpm_states +ffffffff82170230 t pp_nv_set_pstate_handshake_support +ffffffff82170290 t pp_rn_set_wm_ranges +ffffffff821702e0 t pp_rn_get_dpm_clock_table +ffffffff82171000 T amdgpu_dm_set_psr_caps +ffffffff82171160 T amdgpu_dm_link_setup_psr +ffffffff82171320 T amdgpu_dm_psr_enable +ffffffff82171430 T amdgpu_dm_psr_disable +ffffffff821714c0 T amdgpu_dm_psr_disable_all +ffffffff82172000 T amdgpu_dm_setup_replay +ffffffff82172100 T amdgpu_dm_replay_enable +ffffffff821722b0 T amdgpu_dm_replay_disable +ffffffff82173000 T dm_get_elapse_time_in_ns +ffffffff82173030 T dm_perf_trace_timestamp +ffffffff82174000 T dc_assert_fp_enabled +ffffffff82174080 T dc_fpu_begin +ffffffff821740d0 T dc_fpu_end +ffffffff82175000 T dal_vector_construct +ffffffff821750e0 T dal_vector_presized_create +ffffffff821753a0 T dal_vector_create +ffffffff821754e0 T dal_vector_destruct +ffffffff82175540 T dal_vector_destroy +ffffffff821755d0 T dal_vector_get_count +ffffffff82175600 T dal_vector_at_index +ffffffff82175640 T dal_vector_remove_at_index +ffffffff821756e0 T dal_vector_set_at_index +ffffffff82175740 T dal_vector_insert_at +ffffffff82175870 T dal_vector_reserve +ffffffff82175930 T dal_vector_append +ffffffff82175a60 T dal_vector_clone +ffffffff82175b20 T dal_vector_capacity +ffffffff82175b50 T dal_vector_clear +ffffffff82176000 T fixed_point_to_int_frac +ffffffff82176220 T convert_float_matrix +ffffffff821762f0 T reduce_fraction +ffffffff82177000 T is_rgb_cspace +ffffffff82177090 T is_lower_pipe_tree_visible +ffffffff82177100 T is_upper_pipe_tree_visible +ffffffff82177170 T is_pipe_tree_visible +ffffffff82177200 T build_prescale_params +ffffffff82178000 T dc_fixpt_from_fraction +ffffffff821781e0 T dc_fixpt_mul +ffffffff821783a0 T dc_fixpt_sqr +ffffffff82178520 T dc_fixpt_recip +ffffffff82178590 T dc_fixpt_sinc +ffffffff821787d0 T dc_fixpt_sin +ffffffff82178800 T dc_fixpt_cos +ffffffff82178920 T dc_fixpt_exp +ffffffff82178c40 t fixed31_32_exp_from_taylor_series +ffffffff82179110 T dc_fixpt_log +ffffffff82179350 T dc_fixpt_u4d19 +ffffffff82179390 T dc_fixpt_u3d19 +ffffffff821793d0 T dc_fixpt_u2d19 +ffffffff82179410 T dc_fixpt_u0d19 +ffffffff82179440 T dc_fixpt_clamp_u0d14 +ffffffff82179490 T dc_fixpt_clamp_u0d10 +ffffffff821794e0 T dc_fixpt_s4d19 +ffffffff8217a000 T bios_parser_create +ffffffff8217b380 t bios_parser_get_connectors_number +ffffffff8217b3e0 t bios_parser_get_connector_id +ffffffff8217b490 t bios_parser_get_src_obj +ffffffff8217b5c0 t bios_parser_get_i2c_info +ffffffff8217b800 t bios_parser_get_hpd_info +ffffffff8217b8f0 t bios_parser_get_device_tag +ffffffff8217bb10 t bios_parser_get_spread_spectrum_info +ffffffff8217bd20 t bios_parser_get_ss_entry_number +ffffffff8217bf80 t bios_parser_get_embedded_panel_info +ffffffff8217c510 t bios_parser_get_gpio_pin_info +ffffffff8217c630 t bios_parser_get_encoder_cap_info +ffffffff8217c740 t bios_parser_set_scratch_critical_state +ffffffff8217c750 t bios_parser_is_device_id_supported +ffffffff8217c810 t bios_parser_encoder_control +ffffffff8217c850 t bios_parser_transmitter_control +ffffffff8217c890 t bios_parser_enable_crtc +ffffffff8217c8e0 t bios_parser_adjust_pixel_clock +ffffffff8217c920 t bios_parser_set_pixel_clock +ffffffff8217c960 t bios_parser_set_dce_clock +ffffffff8217c9a0 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff8217c9f0 t bios_parser_program_crtc_timing +ffffffff8217ca30 t bios_parser_program_display_engine_pll +ffffffff8217ca70 t bios_parser_enable_disp_power_gating +ffffffff8217cab0 t bios_parser_destroy +ffffffff8217cb90 t bios_get_board_layout_info +ffffffff8217ce30 t get_bios_object +ffffffff8217d030 t get_ss_info_from_ss_info_table +ffffffff8217d230 t get_ss_info_v3_1 +ffffffff8217d3a0 t get_ss_entry_number_from_ss_info_tbl +ffffffff8217e000 T firmware_parser_create +ffffffff82180000 t bios_parser_get_connectors_number +ffffffff82180170 t bios_parser_get_connector_id +ffffffff821801d0 t bios_parser_get_src_obj +ffffffff821804b0 t bios_parser_get_i2c_info +ffffffff82180780 t bios_parser_get_hpd_info +ffffffff82180920 t bios_parser_get_device_tag +ffffffff82180c10 t bios_parser_get_spread_spectrum_info +ffffffff821810c0 t bios_parser_get_ss_entry_number +ffffffff821810f0 t bios_parser_get_embedded_panel_info +ffffffff82181300 t bios_parser_get_gpio_pin_info +ffffffff82181420 t bios_parser_get_encoder_cap_info +ffffffff82181590 t bios_parser_is_accelerated_mode +ffffffff821815a0 t bios_parser_set_scratch_critical_state +ffffffff821815b0 t bios_parser_is_device_id_supported +ffffffff82181620 t bios_parser_encoder_control +ffffffff82181660 t bios_parser_transmitter_control +ffffffff821816a0 t bios_parser_enable_crtc +ffffffff821816f0 t bios_parser_set_pixel_clock +ffffffff82181730 t bios_parser_set_dce_clock +ffffffff82181770 t bios_parser_program_crtc_timing +ffffffff821817b0 t bios_parser_enable_disp_power_gating +ffffffff821817f0 t firmware_parser_destroy +ffffffff821818d0 t bios_get_board_layout_info +ffffffff82181dc0 t bios_parser_pack_data_tables +ffffffff82181df0 t bios_get_atom_dc_golden_table +ffffffff82181f50 t bios_parser_enable_lvtma_control +ffffffff82181fa0 t bios_parser_get_soc_bb_info +ffffffff821820b0 t bios_parser_get_disp_connector_caps_info +ffffffff82182230 t bios_parser_get_lttpr_caps +ffffffff821823a0 t bios_parser_get_lttpr_interop +ffffffff82182500 t bios_parser_get_connector_speed_cap_info +ffffffff82182650 t get_bios_object +ffffffff821827c0 t get_bios_object_from_path_v3 +ffffffff82183000 T object_id_from_bios_object_id +ffffffff82184000 T bios_get_image +ffffffff82184050 T bios_is_accelerated_mode +ffffffff821840b0 T bios_set_scratch_acc_mode_change +ffffffff821840f0 T bios_set_scratch_critical_state +ffffffff82184130 T bios_get_vga_enabled_displays +ffffffff82185000 T dal_bios_parser_create +ffffffff82185070 T dal_bios_parser_destroy +ffffffff82186000 T dal_bios_parser_init_cmd_tbl +ffffffff82186910 t encoder_control_digx_v3 +ffffffff82186a30 t encoder_control_digx_v4 +ffffffff82186b50 t encoder_control_digx_v5 +ffffffff82186cb0 t encoder_control_dig1_v1 +ffffffff82186d50 t encoder_control_dig2_v1 +ffffffff82186df0 t encoder_control_dig_v1 +ffffffff82186e50 t transmitter_control_v2 +ffffffff82187000 t transmitter_control_v3 +ffffffff821871d0 t transmitter_control_v4 +ffffffff82187390 t transmitter_control_v1_5 +ffffffff82187530 t transmitter_control_v1_6 +ffffffff821876b0 t set_pixel_clock_v3 +ffffffff82187850 t set_pixel_clock_v5 +ffffffff82187a20 t set_pixel_clock_v6 +ffffffff82187bf0 t set_pixel_clock_v7 +ffffffff82187e00 t enable_spread_spectrum_on_ppll_v1 +ffffffff82187f20 t enable_spread_spectrum_on_ppll_v2 +ffffffff82188060 t enable_spread_spectrum_on_ppll_v3 +ffffffff82188180 t adjust_display_pll_v2 +ffffffff821882f0 t adjust_display_pll_v3 +ffffffff82188490 t dac1_encoder_control_v1 +ffffffff82188510 t dac2_encoder_control_v1 +ffffffff82188590 t dac1_output_control_v1 +ffffffff82188600 t dac2_output_control_v1 +ffffffff82188670 t set_crtc_using_dtd_timing_v3 +ffffffff821887e0 t set_crtc_timing_v1 +ffffffff82188980 t enable_crtc_v1 +ffffffff82188a30 t enable_crtc_mem_req_v1 +ffffffff82188ae0 t program_clock_v5 +ffffffff82188c00 t program_clock_v6 +ffffffff82188d30 t external_encoder_control_v3 +ffffffff82188f00 t enable_disp_power_gating_v2_1 +ffffffff82188fe0 t set_dce_clock_v2_1 +ffffffff8218a000 T dal_firmware_parser_init_cmd_tbl +ffffffff8218a460 t encoder_control_digx_v1_5 +ffffffff8218a650 t encoder_control_fallback +ffffffff8218a6b0 t transmitter_control_v1_6 +ffffffff8218a880 t transmitter_control_v1_7 +ffffffff8218aaa0 t transmitter_control_fallback +ffffffff8218ab00 t set_pixel_clock_v7 +ffffffff8218ad90 t set_pixel_clock_fallback +ffffffff8218adf0 t set_crtc_using_dtd_timing_v3 +ffffffff8218af60 t enable_crtc_v1 +ffffffff8218b010 t external_encoder_control_v3 +ffffffff8218b040 t enable_disp_power_gating_v2_1 +ffffffff8218b1c0 t enable_disp_power_gating_fallback +ffffffff8218b220 t set_dce_clock_v2_1 +ffffffff8218b360 t get_smu_clock_info_v3_1 +ffffffff8218b3d0 t enable_lvtma_control +ffffffff8218c000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff8218c0c0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff8218c1e0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff8218c270 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff8218c300 T dal_cmd_table_helper_assign_control_parameter +ffffffff8218c3e0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff8218c4c0 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff8218d000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff8218d0d0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff8218d1e0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff8218d270 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff8218d300 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff8218d3e0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff8218e000 T dal_cmd_tbl_helper_dce110_get_table ffffffff8218e030 t encoder_action_to_atom ffffffff8218e0b0 t engine_bp_to_atom ffffffff8218e100 t clock_source_id_to_atom -ffffffff8218e1d0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff8218e220 t signal_type_to_atom_dig_mode -ffffffff8218e280 t hpd_sel_to_atom -ffffffff8218e2c0 t dig_encoder_sel_to_atom -ffffffff8218e2f0 t phy_id_to_atom -ffffffff8218e330 t disp_power_gating_action_to_atom -ffffffff8218e3a0 t dc_clock_type_to_atom -ffffffff8218e420 t transmitter_color_depth_to_atom -ffffffff8218f000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff8218e1a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff8218e1f0 t signal_type_to_atom_dig_mode +ffffffff8218e250 t hpd_sel_to_atom +ffffffff8218e290 t dig_encoder_sel_to_atom +ffffffff8218e2c0 t phy_id_to_atom +ffffffff8218e300 t disp_power_gating_action_to_atom +ffffffff8218f000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff8218f030 t encoder_action_to_atom ffffffff8218f0b0 t engine_bp_to_atom ffffffff8218f100 t clock_source_id_to_atom @@ -31807,7 +31795,7 @@ ffffffff8218f2f0 t phy_id_to_atom ffffffff8218f330 t disp_power_gating_action_to_atom ffffffff8218f3a0 t dc_clock_type_to_atom ffffffff8218f420 t transmitter_color_depth_to_atom -ffffffff82190000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff82190000 T dal_cmd_tbl_helper_dce112_get_table ffffffff82190030 t encoder_action_to_atom ffffffff821900b0 t engine_bp_to_atom ffffffff82190100 t clock_source_id_to_atom @@ -31815,26420 +31803,26433 @@ ffffffff821901d0 t clock_source_id_to_atom_phy_clk_src ffffffff82190220 t signal_type_to_atom_dig_mode ffffffff82190280 t hpd_sel_to_atom ffffffff821902c0 t dig_encoder_sel_to_atom -ffffffff82190310 t phy_id_to_atom -ffffffff82190350 t disp_power_gating_action_to_atom -ffffffff82191000 T clk_mgr_helper_get_active_display_cnt -ffffffff821910e0 T clk_mgr_helper_get_active_plane_cnt -ffffffff82191190 T clk_mgr_exit_optimized_pwr_state -ffffffff821912b0 T clk_mgr_optimize_pwr_state -ffffffff821913b0 T dc_clk_mgr_create -ffffffff82191b90 T dc_destroy_clk_mgr -ffffffff82192000 T dentist_get_divider_from_did -ffffffff82192070 T dce_adjust_dp_ref_freq_for_ss -ffffffff82192190 T dce_get_dp_ref_freq_khz -ffffffff821922e0 T dce12_get_dp_ref_freq_khz -ffffffff82192300 T dce_get_max_pixel_clock_for_all_paths -ffffffff82192510 T dce_get_required_clocks_state -ffffffff821925c0 T dce_set_clock -ffffffff82192730 T dce_clock_read_ss_info -ffffffff82192870 T dce_clk_mgr_construct -ffffffff82192a70 t dce_update_clocks -ffffffff82193000 T dce110_get_min_vblank_time_us -ffffffff82193090 T dce110_fill_display_configs -ffffffff82193310 T dce11_pplib_apply_display_requirements -ffffffff82193620 T dce110_clk_mgr_construct -ffffffff821936d0 t dce11_update_clocks -ffffffff82194000 T dce112_set_clock -ffffffff821941a0 T dce112_set_dispclk -ffffffff821942d0 T dce112_set_dprefclk -ffffffff82194350 T dce112_clk_mgr_construct -ffffffff82194410 t dce112_update_clocks -ffffffff82195000 T dce120_clk_mgr_construct -ffffffff821950a0 T dce121_clk_mgr_construct -ffffffff821951e0 t dce12_update_clocks -ffffffff82196000 T rv1_clk_mgr_construct -ffffffff821960c0 t rv1_update_clocks -ffffffff82196600 t rv1_init_clocks -ffffffff82196690 t rv1_enable_pme_wa -ffffffff82197000 T rv1_vbios_smu_set_dispclk -ffffffff821970f0 t rv1_vbios_smu_send_msg_with_param -ffffffff82197230 T rv1_vbios_smu_set_dprefclk -ffffffff82198000 T rv2_clk_mgr_construct -ffffffff82199000 T dentist_get_did_from_divider -ffffffff82199080 T dcn20_update_clocks_update_dpp_dto -ffffffff82199160 T dcn20_update_clocks_update_dentist -ffffffff821996f0 T dcn2_update_clocks -ffffffff82199ce0 T dcn2_read_clocks_from_hw_dentist -ffffffff82199dd0 T dcn2_update_clocks_fpga -ffffffff82199f00 T dcn2_init_clocks -ffffffff82199fa0 T dcn2_get_clock -ffffffff8219a010 T dcn20_clk_mgr_construct -ffffffff8219a160 t dcn2_enable_pme_wa -ffffffff8219a1b0 t dcn2_are_clock_states_equal -ffffffff8219a220 t dcn2_notify_link_rate_change -ffffffff8219b000 T dcn201_clk_mgr_construct -ffffffff8219b130 t dcn201_update_clocks -ffffffff8219b370 t dcn201_init_clocks -ffffffff8219c000 T rn_clk_mgr_construct -ffffffff8219c970 t rn_update_clocks -ffffffff8219cf70 t rn_set_low_power_state -ffffffff8219d160 t rn_init_clocks -ffffffff8219d200 t rn_enable_pme_wa -ffffffff8219d210 t rn_are_clock_states_equal -ffffffff8219d260 t rn_notify_wm_ranges -ffffffff8219d600 t rn_notify_link_rate_change -ffffffff8219e000 T rn_vbios_smu_get_smu_version -ffffffff8219e020 t rn_vbios_smu_send_msg_with_param -ffffffff8219e200 T rn_vbios_smu_set_dispclk -ffffffff8219e330 T rn_vbios_smu_set_dprefclk -ffffffff8219e3a0 T rn_vbios_smu_set_hard_min_dcfclk -ffffffff8219e420 T rn_vbios_smu_set_min_deep_sleep_dcfclk -ffffffff8219e4a0 T rn_vbios_smu_set_phyclk -ffffffff8219e4e0 T rn_vbios_smu_set_dppclk -ffffffff8219e5a0 T rn_vbios_smu_set_dcn_low_power_state -ffffffff8219e5c0 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn -ffffffff8219e5e0 T rn_vbios_smu_enable_pme_wa -ffffffff8219e600 T rn_vbios_smu_is_periodic_retraining_disabled -ffffffff8219f000 T dcn3_init_clocks -ffffffff8219f470 t dcn3_init_clocks_fpga -ffffffff8219f480 T dcn3_clk_mgr_construct -ffffffff8219f600 T dcn3_clk_mgr_destroy -ffffffff8219f670 t dcn3_update_clocks -ffffffff8219fad0 t dcn3_enable_pme_wa -ffffffff8219fb10 t dcn3_are_clock_states_equal -ffffffff8219fb70 t dcn3_notify_wm_ranges -ffffffff8219fe20 t dcn30_notify_link_rate_change -ffffffff8219ff40 t dcn3_set_hard_min_memclk -ffffffff8219ffe0 t dcn3_set_hard_max_memclk -ffffffff821a0040 t dcn3_set_max_memclk -ffffffff821a0080 t dcn3_set_min_memclk -ffffffff821a00c0 t dcn3_get_memclk_states_from_smu -ffffffff821a0220 t dcn3_is_smu_present -ffffffff821a1000 T dcn30_smu_test_message -ffffffff821a1070 t dcn30_smu_send_msg_with_param -ffffffff821a1220 T dcn30_smu_get_smu_version -ffffffff821a1240 T dcn30_smu_check_driver_if_version -ffffffff821a12a0 T dcn30_smu_check_msg_header_version -ffffffff821a1300 T dcn30_smu_set_dram_addr_high -ffffffff821a1320 T dcn30_smu_set_dram_addr_low -ffffffff821a1340 T dcn30_smu_transfer_wm_table_smu_2_dram -ffffffff821a1360 T dcn30_smu_transfer_wm_table_dram_2_smu -ffffffff821a1380 T dcn30_smu_set_hard_min_by_freq -ffffffff821a13e0 T dcn30_smu_set_hard_max_by_freq -ffffffff821a1440 T dcn30_smu_get_dpm_freq_by_index -ffffffff821a14a0 T dcn30_smu_get_dc_mode_max_dpm_freq -ffffffff821a1500 T dcn30_smu_set_min_deep_sleep_dcef_clk -ffffffff821a1520 T dcn30_smu_set_num_of_displays -ffffffff821a1540 T dcn30_smu_set_display_refresh_from_mall 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+ffffffff82191280 t hpd_sel_to_atom +ffffffff821912c0 t dig_encoder_sel_to_atom +ffffffff82191310 t phy_id_to_atom +ffffffff82191350 t disp_power_gating_action_to_atom +ffffffff82192000 T clk_mgr_helper_get_active_display_cnt +ffffffff821920e0 T clk_mgr_helper_get_active_plane_cnt +ffffffff82192190 T clk_mgr_exit_optimized_pwr_state +ffffffff821922b0 T clk_mgr_optimize_pwr_state +ffffffff821923b0 T dc_clk_mgr_create +ffffffff82192b90 T dc_destroy_clk_mgr +ffffffff82193000 T dentist_get_divider_from_did +ffffffff82193070 T dce_adjust_dp_ref_freq_for_ss +ffffffff82193190 T dce_get_dp_ref_freq_khz +ffffffff821932e0 T dce12_get_dp_ref_freq_khz +ffffffff82193300 T dce_get_max_pixel_clock_for_all_paths +ffffffff82193510 T dce_get_required_clocks_state +ffffffff821935c0 T dce_set_clock +ffffffff82193730 T dce_clock_read_ss_info +ffffffff82193870 T dce_clk_mgr_construct +ffffffff82193a70 t dce_update_clocks +ffffffff82194000 T dce110_get_min_vblank_time_us +ffffffff82194090 T dce110_fill_display_configs +ffffffff82194310 T dce11_pplib_apply_display_requirements +ffffffff82194620 T dce110_clk_mgr_construct +ffffffff821946d0 t dce11_update_clocks +ffffffff82195000 T dce112_set_clock +ffffffff821951a0 T dce112_set_dispclk +ffffffff821952d0 T dce112_set_dprefclk +ffffffff82195350 T dce112_clk_mgr_construct +ffffffff82195410 t dce112_update_clocks +ffffffff82196000 T dce120_clk_mgr_construct +ffffffff821960a0 T dce121_clk_mgr_construct +ffffffff821961e0 t dce12_update_clocks +ffffffff82197000 T rv1_clk_mgr_construct +ffffffff821970c0 t rv1_update_clocks +ffffffff82197600 t rv1_init_clocks +ffffffff82197690 t rv1_enable_pme_wa +ffffffff82198000 T rv1_vbios_smu_set_dispclk +ffffffff821980f0 t rv1_vbios_smu_send_msg_with_param +ffffffff82198230 T rv1_vbios_smu_set_dprefclk +ffffffff82199000 T rv2_clk_mgr_construct +ffffffff8219a000 T dentist_get_did_from_divider +ffffffff8219a080 T dcn20_update_clocks_update_dpp_dto +ffffffff8219a160 T dcn20_update_clocks_update_dentist +ffffffff8219a6f0 T dcn2_update_clocks +ffffffff8219ace0 T dcn2_read_clocks_from_hw_dentist +ffffffff8219add0 T dcn2_update_clocks_fpga +ffffffff8219af00 T dcn2_init_clocks +ffffffff8219afa0 T dcn2_get_clock +ffffffff8219b010 T dcn20_clk_mgr_construct +ffffffff8219b160 t dcn2_enable_pme_wa +ffffffff8219b1b0 t dcn2_are_clock_states_equal +ffffffff8219b220 t dcn2_notify_link_rate_change +ffffffff8219c000 T dcn201_clk_mgr_construct +ffffffff8219c130 t dcn201_update_clocks +ffffffff8219c370 t dcn201_init_clocks +ffffffff8219d000 T rn_clk_mgr_construct +ffffffff8219d970 t rn_update_clocks +ffffffff8219df70 t rn_set_low_power_state +ffffffff8219e160 t rn_init_clocks +ffffffff8219e200 t rn_enable_pme_wa +ffffffff8219e210 t rn_are_clock_states_equal +ffffffff8219e260 t rn_notify_wm_ranges +ffffffff8219e600 t rn_notify_link_rate_change +ffffffff8219f000 T rn_vbios_smu_get_smu_version +ffffffff8219f020 t rn_vbios_smu_send_msg_with_param +ffffffff8219f200 T rn_vbios_smu_set_dispclk +ffffffff8219f330 T rn_vbios_smu_set_dprefclk +ffffffff8219f3a0 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff8219f420 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff8219f4a0 T rn_vbios_smu_set_phyclk +ffffffff8219f4e0 T rn_vbios_smu_set_dppclk +ffffffff8219f5a0 T rn_vbios_smu_set_dcn_low_power_state +ffffffff8219f5c0 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff8219f5e0 T rn_vbios_smu_enable_pme_wa +ffffffff8219f600 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff821a0000 T dcn3_init_clocks +ffffffff821a0470 t dcn3_init_clocks_fpga +ffffffff821a0480 T dcn3_clk_mgr_construct +ffffffff821a0600 T dcn3_clk_mgr_destroy +ffffffff821a0670 t dcn3_update_clocks +ffffffff821a0ad0 t dcn3_enable_pme_wa +ffffffff821a0b10 t dcn3_are_clock_states_equal +ffffffff821a0b70 t dcn3_notify_wm_ranges +ffffffff821a0e20 t dcn30_notify_link_rate_change +ffffffff821a0f40 t dcn3_set_hard_min_memclk +ffffffff821a0fe0 t dcn3_set_hard_max_memclk +ffffffff821a1040 t dcn3_set_max_memclk +ffffffff821a1080 t dcn3_set_min_memclk +ffffffff821a10c0 t dcn3_get_memclk_states_from_smu +ffffffff821a1220 t dcn3_is_smu_present +ffffffff821a2000 T dcn30_smu_test_message +ffffffff821a2070 t dcn30_smu_send_msg_with_param +ffffffff821a2220 T dcn30_smu_get_smu_version +ffffffff821a2240 T dcn30_smu_check_driver_if_version +ffffffff821a22a0 T dcn30_smu_check_msg_header_version +ffffffff821a2300 T dcn30_smu_set_dram_addr_high +ffffffff821a2320 T dcn30_smu_set_dram_addr_low +ffffffff821a2340 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff821a2360 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff821a2380 T dcn30_smu_set_hard_min_by_freq +ffffffff821a23e0 T dcn30_smu_set_hard_max_by_freq +ffffffff821a2440 T dcn30_smu_get_dpm_freq_by_index +ffffffff821a24a0 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff821a2500 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff821a2520 T dcn30_smu_set_num_of_displays +ffffffff821a2540 T dcn30_smu_set_display_refresh_from_mall +ffffffff821a2570 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff821a2590 T dcn30_smu_set_pme_workaround +ffffffff821a3000 T dcn301_smu_get_smu_version +ffffffff821a3080 t dcn301_smu_send_msg_with_param +ffffffff821a3250 T dcn301_smu_set_dispclk +ffffffff821a3300 T dcn301_smu_set_dprefclk +ffffffff821a33c0 T dcn301_smu_set_hard_min_dcfclk +ffffffff821a3470 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff821a3520 T dcn301_smu_set_dppclk +ffffffff821a35d0 T dcn301_smu_set_display_idle_optimization +ffffffff821a3630 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff821a3690 T dcn301_smu_enable_pme_wa +ffffffff821a36b0 T dcn301_smu_set_dram_addr_high +ffffffff821a3710 T dcn301_smu_set_dram_addr_low +ffffffff821a3770 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff821a3790 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff821a4000 T vg_clk_mgr_construct +ffffffff821a4930 T vg_clk_mgr_destroy +ffffffff821a4980 t vg_update_clocks +ffffffff821a4d00 t vg_init_clocks +ffffffff821a4da0 t vg_enable_pme_wa +ffffffff821a4db0 t vg_are_clock_states_equal +ffffffff821a4e00 t vg_notify_wm_ranges +ffffffff821a6000 T dcn31_update_clocks +ffffffff821a66a0 T dcn31_init_clocks +ffffffff821a6750 T dcn31_are_clock_states_equal +ffffffff821a67b0 T dcn31_get_dtb_ref_freq_khz +ffffffff821a67e0 T dcn31_clk_mgr_construct +ffffffff821a6f50 T dcn31_clk_mgr_destroy +ffffffff821a6fa0 t dcn31_set_low_power_state +ffffffff821a71c0 t dcn31_enable_pme_wa +ffffffff821a71d0 t dcn31_notify_wm_ranges +ffffffff821a7570 t find_clk_for_voltage +ffffffff821a8000 T dcn31_smu_get_smu_version +ffffffff821a8020 t dcn31_smu_send_msg_with_param +ffffffff821a8290 T dcn31_smu_set_dispclk +ffffffff821a8310 T dcn31_smu_set_dprefclk +ffffffff821a8390 T dcn31_smu_set_hard_min_dcfclk +ffffffff821a8420 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff821a84b0 T dcn31_smu_set_dppclk +ffffffff821a8530 T dcn31_smu_set_display_idle_optimization +ffffffff821a8580 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff821a85d0 T dcn31_smu_enable_pme_wa +ffffffff821a8610 T dcn31_smu_set_dram_addr_high +ffffffff821a8650 T dcn31_smu_set_dram_addr_low +ffffffff821a8690 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff821a86d0 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff821a8710 T dcn31_smu_set_zstate_support +ffffffff821a8780 T dcn31_smu_set_dtbclk +ffffffff821a9000 T dcn314_update_clocks +ffffffff821a96d0 T dcn314_are_clock_states_equal +ffffffff821a9730 T dcn314_clk_mgr_construct +ffffffff821aa4f0 T dcn314_clk_mgr_destroy +ffffffff821aa540 t dcn314_enable_pme_wa +ffffffff821aa550 t dcn314_notify_wm_ranges +ffffffff821ab000 T dcn314_smu_get_smu_version +ffffffff821ab020 t dcn314_smu_send_msg_with_param +ffffffff821ab2b0 T dcn314_smu_set_dispclk +ffffffff821ab330 T dcn314_smu_set_dprefclk +ffffffff821ab3b0 T dcn314_smu_set_hard_min_dcfclk +ffffffff821ab440 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff821ab4d0 T dcn314_smu_set_dppclk +ffffffff821ab550 T dcn314_smu_set_display_idle_optimization +ffffffff821ab5a0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff821ab5f0 T dcn314_smu_enable_pme_wa +ffffffff821ab630 T dcn314_smu_set_dram_addr_high +ffffffff821ab670 T dcn314_smu_set_dram_addr_low +ffffffff821ab6b0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff821ab6f0 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff821ab730 T dcn314_smu_set_zstate_support +ffffffff821ab780 T dcn314_smu_set_dtbclk +ffffffff821ac000 T dcn315_clk_mgr_construct +ffffffff821ac890 T dcn315_clk_mgr_destroy +ffffffff821ac8e0 t dcn315_update_clocks +ffffffff821acef0 t dcn315_enable_pme_wa +ffffffff821acf00 t dcn315_notify_wm_ranges +ffffffff821ad2a0 t dcn315_disable_otg_wa +ffffffff821ae000 T dcn315_smu_get_smu_version +ffffffff821ae020 t dcn315_smu_send_msg_with_param +ffffffff821ae3d0 T dcn315_smu_set_dispclk +ffffffff821ae450 T dcn315_smu_set_hard_min_dcfclk +ffffffff821ae4e0 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff821ae570 T dcn315_smu_set_dppclk +ffffffff821ae5f0 T dcn315_smu_set_display_idle_optimization +ffffffff821ae640 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff821ae690 T dcn315_smu_enable_pme_wa +ffffffff821ae6d0 T dcn315_smu_set_dram_addr_high +ffffffff821ae710 T dcn315_smu_set_dram_addr_low +ffffffff821ae750 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff821ae790 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff821ae7d0 T dcn315_smu_get_dpref_clk +ffffffff821ae830 T dcn315_smu_get_dtbclk +ffffffff821ae890 T dcn315_smu_set_dtbclk +ffffffff821af000 T dcn316_clk_mgr_construct +ffffffff821af6e0 T dcn316_clk_mgr_destroy +ffffffff821af730 t dcn316_update_clocks +ffffffff821afda0 t dcn316_enable_pme_wa +ffffffff821afdb0 t dcn316_notify_wm_ranges +ffffffff821b0150 t find_clk_for_voltage +ffffffff821b1000 T dcn316_smu_get_smu_version +ffffffff821b1020 t dcn316_smu_send_msg_with_param +ffffffff821b1200 T dcn316_smu_set_dispclk +ffffffff821b1280 T dcn316_smu_set_hard_min_dcfclk +ffffffff821b1310 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff821b13a0 T dcn316_smu_set_dppclk +ffffffff821b1420 T dcn316_smu_set_display_idle_optimization +ffffffff821b1470 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff821b14c0 T dcn316_smu_set_dram_addr_high +ffffffff821b1500 T dcn316_smu_set_dram_addr_low +ffffffff821b1540 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff821b1580 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff821b15c0 T dcn316_smu_enable_pme_wa +ffffffff821b1600 T dcn316_smu_set_dtbclk +ffffffff821b1640 T dcn316_smu_get_dpref_clk +ffffffff821b16a0 T dcn316_smu_get_smu_fclk +ffffffff821b2000 T dcn32_init_clocks +ffffffff821b2620 T dcn32_update_clocks_update_dpp_dto +ffffffff821b2760 T dcn32_clk_mgr_construct +ffffffff821b2a40 t dcn32_dump_clk_registers +ffffffff821b2ce0 T dcn32_clk_mgr_destroy +ffffffff821b2d50 t dcn32_update_clocks +ffffffff821b36b0 t dcn32_enable_pme_wa +ffffffff821b36f0 t dcn32_are_clock_states_equal +ffffffff821b3760 t dcn32_notify_wm_ranges +ffffffff821b38f0 t dcn32_set_hard_min_memclk +ffffffff821b3980 t dcn32_set_hard_max_memclk +ffffffff821b39d0 t dcn32_set_max_memclk +ffffffff821b3a10 t dcn32_set_min_memclk +ffffffff821b3a50 t dcn32_get_memclk_states_from_smu +ffffffff821b3ce0 t dcn32_is_smu_present +ffffffff821b3d10 t dcn32_get_dispclk_from_dentist +ffffffff821b3db0 t dcn32_update_clocks_update_dentist +ffffffff821b5000 T dcn32_smu_send_fclk_pstate_message +ffffffff821b5020 t dcn32_smu_send_msg_with_param +ffffffff821b51a0 T dcn32_smu_send_cab_for_uclk_message +ffffffff821b51d0 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff821b51f0 T dcn32_smu_set_pme_workaround +ffffffff821b5210 T dcn32_smu_set_hard_min_by_freq +ffffffff821b5270 T dcn32_smu_wait_for_dmub_ack_mclk +ffffffff821b6000 T dc_stream_adjust_vmin_vmax +ffffffff821b6170 T dc_stream_get_last_used_drr_vtotal +ffffffff821b62e0 T dc_stream_get_crtc_position +ffffffff821b6540 T dc_stream_configure_crc +ffffffff821b66c0 T dc_stream_get_crc +ffffffff821b67b0 T dc_stream_set_dyn_expansion +ffffffff821b6a40 T dc_stream_set_dither_option +ffffffff821b6be0 T dc_stream_set_gamut_remap +ffffffff821b6d90 T dc_stream_program_csc_matrix +ffffffff821b6ff0 T dc_stream_set_static_screen_params +ffffffff821b7180 T dc_create +ffffffff821b77c0 t dc_construct_ctx +ffffffff821b7960 t dc_destruct +ffffffff821b7cc0 T dc_hardware_init +ffffffff821b7d90 T dc_init_callbacks +ffffffff821b7de0 T dc_deinit_callbacks +ffffffff821b7e30 T dc_destroy +ffffffff821b7ea0 T dc_validate_boot_timing +ffffffff821b82b0 T dc_enable_stereo +ffffffff821b83c0 T dc_trigger_sync +ffffffff821b8a20 T dc_z10_restore +ffffffff821b8a60 T dc_z10_save_init +ffffffff821b8aa0 T dc_commit_streams +ffffffff821b8ff0 t commit_minimal_transition_state +ffffffff821b9470 T dc_create_state +ffffffff821b9510 t dc_commit_state_no_check +ffffffff821bae40 T dc_release_state +ffffffff821baeb0 T dc_acquire_release_mpc_3dlut +ffffffff821baf80 T dc_post_update_surfaces_to_stream +ffffffff821bb400 T dc_copy_state +ffffffff821bb5f0 T dc_retain_state +ffffffff821bb620 T dc_set_generic_gpio_for_stereo +ffffffff821bb780 T dc_check_update_surfaces_for_stream +ffffffff821bc190 T dc_dmub_update_dirty_rect +ffffffff821bc3a0 T dc_update_planes_and_stream +ffffffff821bd040 t fast_update_only +ffffffff821bd3a0 t commit_planes_for_stream_fast +ffffffff821bd7f0 t commit_planes_for_stream +ffffffff821bef50 T dc_commit_updates_for_stream +ffffffff821bf630 t copy_surface_update_to_plane +ffffffff821bfa50 t copy_stream_update_to_stream +ffffffff821c0150 T dc_get_current_stream_count +ffffffff821c0190 T dc_get_stream_at_index +ffffffff821c01e0 T dc_interrupt_to_irq_source +ffffffff821c0200 T dc_interrupt_set +ffffffff821c0250 T dc_interrupt_ack +ffffffff821c0270 T dc_power_down_on_boot +ffffffff821c02c0 T dc_set_power_state +ffffffff821c04f0 T dc_resume +ffffffff821c0570 T dc_is_dmcu_initialized +ffffffff821c05c0 T get_clock_requirements_for_state +ffffffff821c0640 T dc_set_clock +ffffffff821c0680 T dc_get_clock +ffffffff821c06c0 T dc_set_psr_allow_active +ffffffff821c07d0 T dc_allow_idle_optimizations +ffffffff821c0880 T dc_unlock_memory_clock_frequency +ffffffff821c0900 T dc_lock_memory_clock_frequency +ffffffff821c09a0 T dc_enable_dcmode_clk_limit +ffffffff821c0b70 t blank_and_force_memclk +ffffffff821c0da0 T dc_is_plane_eligible_for_idle_optimizations +ffffffff821c0e00 T dc_hardware_release +ffffffff821c0e50 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff821c0e90 T dc_is_dmub_outbox_supported +ffffffff821c0f00 T dc_enable_dmub_notifications +ffffffff821c0f70 T dc_enable_dmub_outbox +ffffffff821c0fc0 T dc_process_dmub_aux_transfer_async +ffffffff821c1150 T get_link_index_from_dpia_port_index +ffffffff821c1210 T dc_process_dmub_set_config_async +ffffffff821c12f0 T dc_process_dmub_set_mst_slots +ffffffff821c13e0 T dc_process_dmub_dpia_hpd_int_enable +ffffffff821c14b0 T dc_print_dmub_diagnostic_data +ffffffff821c14d0 T dc_disable_accelerated_mode +ffffffff821c14f0 T dc_notify_vsync_int_state +ffffffff821c1720 T dc_abm_save_restore +ffffffff821c1910 T dc_query_current_properties +ffffffff821c1980 T dc_set_edp_power +ffffffff821c19f0 t create_links +ffffffff821c1ea0 t create_link_encoders +ffffffff821c1f90 t dc_update_viusal_confirm_color +ffffffff821c3000 T pre_surface_trace +ffffffff821c3030 T update_surface_trace +ffffffff821c3060 T post_surface_trace +ffffffff821c3090 T context_timing_trace +ffffffff821c3260 T context_clock_trace +ffffffff821c3290 T dc_status_to_str +ffffffff821c4000 T find_color_matrix +ffffffff821c40b0 T color_space_to_black_color +ffffffff821c4120 T hwss_wait_for_blank_complete +ffffffff821c41d0 T get_mpctree_visual_confirm_color +ffffffff821c4230 T get_surface_visual_confirm_color +ffffffff821c42e0 T get_hdr_visual_confirm_color +ffffffff821c43a0 T get_subvp_visual_confirm_color +ffffffff821c44a0 T hwss_build_fast_sequence +ffffffff821c4b60 T hwss_execute_sequence +ffffffff821c4fc0 T hwss_setup_dpp +ffffffff821c5060 T hwss_program_bias_and_scale +ffffffff821c50e0 T hwss_program_manual_trigger +ffffffff821c5130 T hwss_power_on_mpc_mem_pwr +ffffffff821c5180 T hwss_set_output_csc +ffffffff821c51d0 T hwss_set_ocsc_default +ffffffff821c5220 T hwss_send_dmcub_cmd +ffffffff821c5240 T get_mclk_switch_visual_confirm_color +ffffffff821c53a0 T get_surface_tile_visual_confirm_color +ffffffff821c6000 T link_enc_cfg_init +ffffffff821c61f0 T link_enc_cfg_copy +ffffffff821c6220 T link_enc_cfg_link_encs_assign +ffffffff821c76c0 T link_enc_cfg_validate +ffffffff821c7e70 T link_enc_cfg_link_enc_unassign +ffffffff821c8000 T link_enc_cfg_is_transmitter_mappable +ffffffff821c8120 T link_enc_cfg_get_stream_using_link_enc +ffffffff821c8220 T link_enc_cfg_get_link_using_link_enc +ffffffff821c8330 T link_enc_cfg_get_link_enc_used_by_link +ffffffff821c84b0 T link_enc_cfg_get_next_avail_link_enc +ffffffff821c8620 T link_enc_cfg_get_link_enc_used_by_stream +ffffffff821c8640 T link_enc_cfg_get_link_enc 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dc_link_is_fec_supported +ffffffff821c9940 T dc_link_overwrite_extended_receiver_cap +ffffffff821c9970 T dc_link_should_enable_fec +ffffffff821c99a0 T dc_link_dp_dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff821c99d0 T dc_link_handle_usb4_bw_alloc_response +ffffffff821c9a00 T dc_link_check_link_loss_status +ffffffff821c9a30 T dc_link_dp_allow_hpd_rx_irq +ffffffff821c9a60 T dc_link_dp_handle_link_loss +ffffffff821c9a90 T dc_link_dp_read_hpd_rx_irq_data +ffffffff821c9ac0 T dc_link_handle_hpd_rx_irq +ffffffff821c9af0 T dc_link_dp_receiver_power_ctrl +ffffffff821c9b20 T dc_link_decide_lttpr_mode +ffffffff821c9b50 T dc_link_edp_panel_backlight_power_on +ffffffff821c9b80 T dc_link_get_backlight_level +ffffffff821c9bb0 T dc_link_get_backlight_level_nits +ffffffff821c9be0 T dc_link_set_backlight_level +ffffffff821c9c10 T dc_link_set_backlight_level_nits +ffffffff821c9c40 T dc_link_get_target_backlight_pwm +ffffffff821c9c70 T dc_link_get_psr_state +ffffffff821c9ca0 T dc_link_set_psr_allow_active +ffffffff821c9cd0 T dc_link_setup_psr +ffffffff821c9d00 T dc_link_get_replay_state +ffffffff821c9d30 T dc_link_wait_for_t12 +ffffffff821c9d60 T dc_link_get_hpd_state +ffffffff821c9d90 T dc_link_enable_hpd +ffffffff821c9dc0 T dc_link_disable_hpd +ffffffff821c9df0 T dc_link_enable_hpd_filter +ffffffff821c9e20 T dc_link_dp_dpia_validate +ffffffff821ca000 T resource_parse_asic_id +ffffffff821ca250 T dc_create_resource_pool +ffffffff821ca620 T dc_destroy_resource_pool +ffffffff821ca690 T resource_construct +ffffffff821cac70 T resource_unreference_clock_source +ffffffff821cacf0 T resource_reference_clock_source +ffffffff821cad70 T resource_get_clock_source_reference +ffffffff821cadf0 T resource_are_vblanks_synchronizable +ffffffff821cb010 T resource_are_streams_timing_synchronizable +ffffffff821cb100 T resource_find_used_clk_src_for_sharing +ffffffff821cb240 T resource_get_num_mpc_splits +ffffffff821cb2d0 T resource_get_num_odm_splits +ffffffff821cb3a0 T resource_get_otg_master +ffffffff821cb450 T resource_build_scaling_params +ffffffff821cc2e0 t calculate_odm_slice_in_timing_active +ffffffff821cc470 T resource_build_scaling_params_for_context +ffffffff821cc5f0 T resource_find_free_secondary_pipe_legacy +ffffffff821cc690 T resource_find_free_pipe_used_in_cur_mpc_blending_tree +ffffffff821cc700 T resource_is_pipe_type +ffffffff821cc780 T recource_find_free_pipe_not_used_in_cur_res_ctx +ffffffff821cc800 T resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine +ffffffff821cc920 T resource_is_for_mpcc_combine +ffffffff821cc9b0 T resource_find_any_free_pipe +ffffffff821cca20 T resource_get_otg_master_for_stream +ffffffff821ccb50 T resource_get_opp_head +ffffffff821ccbf0 T dc_add_plane_to_context +ffffffff821ccef0 T dc_remove_plane_from_context +ffffffff821cd0f0 T dc_rem_all_planes_for_stream +ffffffff821cd2b0 T dc_add_all_planes_for_stream +ffffffff821cd430 T dc_is_timing_changed +ffffffff821cd4a0 T dc_is_stream_unchanged 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resource_build_bit_depth_reduction_params +ffffffff821d0c40 T dc_validate_stream +ffffffff821d0e30 T dc_validate_plane +ffffffff821d0ec0 T resource_pixel_format_to_bpp +ffffffff821d0f40 T get_audio_check +ffffffff821d1060 T get_temp_dp_link_res +ffffffff821d1170 T reset_syncd_pipes_from_disabled_pipes +ffffffff821d12c0 T check_syncd_pipes_for_disabled_master_pipe +ffffffff821d1420 T reset_sync_context_for_pipe +ffffffff821d14d0 T resource_transmitter_to_phy_idx +ffffffff821d1530 T get_link_hwss +ffffffff821d15f0 T is_h_timing_divisible_by_2 +ffffffff821d1650 T dc_resource_acquire_secondary_pipe_for_mpc_odm +ffffffff821d1880 T update_dp_encoder_resources_for_test_harness +ffffffff821d1b40 t calculate_plane_rec_in_timing_active +ffffffff821d1e60 t calculate_init_and_vp +ffffffff821d3000 T dc_sink_retain +ffffffff821d3030 T dc_sink_release +ffffffff821d30b0 T dc_sink_create +ffffffff821d4000 T dc_stat_get_dmub_notification +ffffffff821d40d0 T dc_stat_get_dmub_dataout +ffffffff821d5000 T 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dc_stream_log +ffffffff821d7000 T enable_surface_flip_reporting +ffffffff821d7030 T dc_create_plane_state +ffffffff821d7200 T dc_plane_get_status +ffffffff821d7390 T dc_plane_state_retain +ffffffff821d73c0 T dc_plane_state_release +ffffffff821d7510 T dc_gamma_retain +ffffffff821d7540 T dc_gamma_release +ffffffff821d75a0 T dc_create_gamma +ffffffff821d7600 T dc_transfer_func_retain +ffffffff821d7630 T dc_transfer_func_release +ffffffff821d7680 T dc_create_transfer_func +ffffffff821d76e0 T dc_create_3dlut_func +ffffffff821d7740 T dc_3dlut_func_release +ffffffff821d7790 T dc_3dlut_func_retain +ffffffff821d8000 T vm_helper_mark_vmid_used +ffffffff821d8030 T dc_setup_system_context +ffffffff821d80d0 T dc_setup_vm_context +ffffffff821d8100 T dc_get_vmid_use_vector +ffffffff821d8160 T vm_helper_init +ffffffff821d9000 T dc_dmub_srv_create +ffffffff821d90a0 T dc_dmub_srv_destroy +ffffffff821d9100 T dc_dmub_srv_wait_idle +ffffffff821d9180 T dc_dmub_srv_log_diagnostic_data +ffffffff821d97f0 T dc_dmub_srv_clear_inbox0_ack +ffffffff821d9860 T dc_dmub_srv_wait_for_inbox0_ack +ffffffff821d98d0 T dc_dmub_srv_send_inbox0_cmd +ffffffff821d9940 T dc_dmub_srv_cmd_run +ffffffff821d9960 T dc_dmub_srv_cmd_run_list +ffffffff821d9b40 T dc_dmub_srv_optimized_init_done +ffffffff821d9bd0 T dc_dmub_srv_notify_stream_mask +ffffffff821d9c30 T dc_dmub_srv_is_restore_required +ffffffff821d9cc0 T dc_dmub_srv_get_dmub_outbox0_msg +ffffffff821d9cf0 T dc_dmub_trace_event_control +ffffffff821d9d10 T dc_dmub_srv_drr_update_cmd +ffffffff821d9db0 T dc_dmub_srv_set_drr_manual_trigger_cmd +ffffffff821d9e50 T dc_dmub_srv_p_state_delegate +ffffffff821da200 T dc_dmub_srv_query_caps_cmd +ffffffff821da2c0 T dc_dmub_srv_get_visual_confirm_color_cmd +ffffffff821da3b0 T dc_dmub_setup_subvp_dmub_command +ffffffff821dae30 T dc_dmub_srv_get_diagnostic_data +ffffffff821dae70 T dc_send_update_cursor_info_to_dmu +ffffffff821db1e0 T dc_dmub_check_min_version +ffffffff821db220 T dc_dmub_srv_enable_dpia_trace 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dpp1_dscl_calc_lb_num_partitions +ffffffff822391e0 T dpp1_dscl_is_lb_conf_valid +ffffffff82239220 T dpp1_dscl_set_scaler_manual_scale +ffffffff8223a830 t dpp1_dscl_get_filter_coeffs_64p +ffffffff8223a900 t dpp1_dscl_set_scaler_filter +ffffffff8223b000 t dwb1_get_caps +ffffffff8223b0a0 t dwb1_enable +ffffffff8223b1b0 t dwb1_disable +ffffffff8223b340 T dcn10_dwbc_construct +ffffffff8223c000 T hubbub1_wm_read_state +ffffffff8223c3d0 T hubbub1_allow_self_refresh_control +ffffffff8223c460 T hubbub1_is_allow_self_refresh_enabled +ffffffff8223c4d0 T hubbub1_verify_allow_pstate_change_high +ffffffff8223c6d0 T hubbub1_wm_change_req_wa +ffffffff8223c780 T hubbub1_program_urgent_watermarks +ffffffff8223cba0 T hubbub1_program_stutter_watermarks +ffffffff8223d050 T hubbub1_program_pstate_watermarks +ffffffff8223d2c0 T hubbub1_program_watermarks +ffffffff8223d420 T hubbub1_update_dchub +ffffffff8223d690 T hubbub1_toggle_watermark_change_req +ffffffff8223d740 T hubbub1_soft_reset +ffffffff8223d780 T hubbub1_construct +ffffffff8223d7e0 t hubbub1_get_dcc_compression_cap +ffffffff8223da20 t hubbub1_dcc_support_swizzle +ffffffff8223dab0 t hubbub1_dcc_support_pixel_format +ffffffff8223e000 T hubp1_set_blank +ffffffff8223e130 T hubp1_clear_underflow +ffffffff8223e180 T hubp1_vready_workaround +ffffffff8223e220 T hubp1_program_tiling +ffffffff8223e4c0 T hubp1_program_size +ffffffff8223e660 T hubp1_program_rotation +ffffffff8223e7e0 T hubp1_program_pixel_format +ffffffff8223edc0 T hubp1_program_surface_flip_and_addr +ffffffff8223f700 T hubp1_dcc_control +ffffffff8223f7d0 T hubp1_program_surface_config +ffffffff8223f900 T hubp1_program_requestor +ffffffff8223fcf0 T hubp1_program_deadline +ffffffff822404b0 T hubp1_is_flip_pending +ffffffff822405e0 T min_set_viewport +ffffffff82240920 T hubp1_read_state_common +ffffffff822417d0 T hubp1_read_state +ffffffff82241ac0 T hubp1_get_cursor_pitch +ffffffff82241b70 T hubp1_cursor_set_attributes +ffffffff82241e50 T hubp1_cursor_set_position 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dcn10_setup_periodic_interrupt +ffffffff8224ce30 T dcn10_setup_vupdate_interrupt +ffffffff8224cf00 T dcn10_unblank_stream +ffffffff8224d020 T dcn10_send_immediate_sdp_message +ffffffff8224d080 T dcn10_set_clock +ffffffff8224d190 T dcn10_get_clock +ffffffff8224d1f0 T dcn10_get_dcc_en_bits +ffffffff8224e000 T snprintf_count +ffffffff8224e090 T dcn10_clear_status_bits +ffffffff8224e260 T dcn10_get_hw_state +ffffffff82250000 T dcn10_hw_sequencer_construct +ffffffff82251000 T dcn10_ipp_construct +ffffffff82251050 T dcn20_ipp_construct +ffffffff822510a0 t dcn10_ipp_destroy +ffffffff82252000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff822520d0 T dcn10_get_dig_frontend +ffffffff82252190 T enc1_configure_encoder +ffffffff82252210 T dcn10_psr_program_dp_dphy_fast_training +ffffffff822522a0 T dcn10_psr_program_secondary_packet +ffffffff82252320 T dcn10_is_dig_enabled +ffffffff82252390 T dcn10_link_encoder_validate_dvi_output +ffffffff82252440 T dcn10_link_encoder_validate_dp_output +ffffffff82252480 T dcn10_link_encoder_construct +ffffffff82252680 T dcn10_link_encoder_validate_output_with_stream +ffffffff82252880 T dcn10_link_encoder_hw_init +ffffffff82252ac0 T dcn10_aux_initialize +ffffffff82252b60 T dcn10_link_encoder_destroy +ffffffff82252bb0 T dcn10_link_encoder_setup +ffffffff82252d00 T dcn10_link_encoder_enable_tmds_output +ffffffff82252e00 T dcn10_link_encoder_enable_tmds_output_with_clk_pattern_wa +ffffffff82252f40 T dcn10_link_encoder_enable_dp_output +ffffffff822530d0 T dcn10_link_encoder_enable_dp_mst_output +ffffffff82253260 T dcn10_link_encoder_disable_output +ffffffff82253470 T dcn10_link_encoder_dp_set_lane_settings +ffffffff82253620 T dcn10_link_encoder_dp_set_phy_pattern +ffffffff82253df0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff82254050 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff82254380 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff822544e0 T dcn10_link_encoder_enable_hpd +ffffffff82254520 T dcn10_link_encoder_disable_hpd +ffffffff82254560 T dcn10_get_dig_mode +ffffffff822545e0 T dcn10_link_encoder_get_max_link_cap +ffffffff82254660 t program_pattern_symbols +ffffffff82255000 T mpc1_set_bg_color +ffffffff82255210 T mpc1_get_mpcc +ffffffff822552b0 T mpc1_update_stereo_mix +ffffffff822553e0 T mpc1_assert_idle_mpcc +ffffffff822554c0 T mpc1_get_mpcc_for_dpp +ffffffff82255580 T mpc1_is_mpcc_idle +ffffffff82255680 T mpc1_assert_mpcc_idle_before_connect +ffffffff822557e0 T mpc1_insert_plane +ffffffff82255e00 T mpc1_remove_mpcc +ffffffff82256210 T mpc1_mpc_init +ffffffff82256580 T mpc1_mpc_init_single_inst +ffffffff82256790 T mpc1_init_mpcc_list_from_hw +ffffffff82256ab0 T mpc1_read_mpcc_state +ffffffff82256c70 T mpc1_cursor_lock +ffffffff82256cf0 T mpc1_get_mpc_out_mux +ffffffff82256d80 T dcn10_mpc_construct +ffffffff82256f00 t mpc1_update_blending +ffffffff82258000 T opp1_program_bit_depth_reduction +ffffffff82258440 T opp1_set_dyn_expansion +ffffffff822585c0 T opp1_program_fmt +ffffffff822588e0 T opp1_program_stereo +ffffffff822589e0 T opp1_pipe_clock_control +ffffffff82258a20 T opp1_destroy +ffffffff82258a70 T dcn10_opp_construct +ffffffff82259000 T optc1_program_global_sync +ffffffff82259170 T optc1_setup_vertical_interrupt0 +ffffffff82259200 T optc1_setup_vertical_interrupt1 +ffffffff82259270 T optc1_setup_vertical_interrupt2 +ffffffff822592e0 T optc1_program_timing +ffffffff82259a30 T optc1_is_two_pixels_per_containter +ffffffff82259a80 T optc1_set_vtg_params +ffffffff82259bb0 T optc1_set_blank_data_double_buffer +ffffffff82259bf0 T optc1_set_timing_double_buffer +ffffffff82259c30 T optc1_set_blank +ffffffff82259d20 T optc1_is_blanked +ffffffff82259db0 T optc1_enable_optc_clock +ffffffff8225a010 T optc1_disable_crtc +ffffffff8225a120 T optc1_program_blank_color +ffffffff8225a1e0 T optc1_validate_timing +ffffffff8225a2f0 T optc1_get_vblank_counter +ffffffff8225a360 T optc1_lock +ffffffff8225a460 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optc1_get_crc +ffffffff8225bdf0 T dcn10_timing_generator_init +ffffffff8225be60 t optc1_enable_crtc +ffffffff8225bf90 t optc1_set_test_pattern +ffffffff8225c710 t optc1_program_manual_trigger +ffffffff8225c7d0 t optc1_setup_manual_trigger +ffffffff8225d000 T dcn10_find_first_free_match_stream_enc_for_link +ffffffff8225d0b0 T dcn10_create_resource_pool +ffffffff8225e520 t dcn10_resource_destruct +ffffffff8225e8a0 t dcn10_destroy_resource_pool +ffffffff8225e910 t dcn10_panel_cntl_create +ffffffff8225e9a0 t dcn10_link_encoder_create +ffffffff8225eab0 t dcn10_validate_bandwidth +ffffffff8225eb50 t dcn10_validate_global +ffffffff8225ed30 t dcn10_acquire_free_pipe_for_layer +ffffffff8225ee80 t dcn10_validate_plane +ffffffff8225eed0 t dcn10_add_stream_to_ctx +ffffffff8225f0d0 t dcn10_patch_unknown_plane_state +ffffffff8225f130 t read_dce_straps +ffffffff8225f160 t create_audio +ffffffff8225f190 t dcn10_stream_encoder_create +ffffffff8225f230 t dcn10_hwseq_create +ffffffff8225f2f0 t dcn10_get_dcc_compression_cap +ffffffff82260000 T enc1_update_generic_info_packet +ffffffff822604b0 T enc1_stream_encoder_dp_set_stream_attribute +ffffffff822609d0 T enc1_stream_encoder_set_stream_attribute_helper +ffffffff82260a60 T enc1_stream_encoder_hdmi_set_stream_attribute +ffffffff822610e0 T enc1_stream_encoder_dvi_set_stream_attribute +ffffffff82261290 T enc1_stream_encoder_set_throttled_vcp_size +ffffffff822614d0 T enc1_stream_encoder_update_dp_info_packets +ffffffff82261700 T enc1_stream_encoder_send_immediate_sdp_message +ffffffff82261bc0 T enc1_stream_encoder_stop_dp_info_packets +ffffffff82261da0 T enc1_stream_encoder_dp_blank +ffffffff82261f70 T enc1_stream_encoder_dp_unblank +ffffffff822621e0 T enc1_stream_encoder_set_avmute +ffffffff82262220 T enc1_reset_hdmi_stream_attribute +ffffffff822622f0 T get_audio_clock_info +ffffffff822623e0 T enc1_se_enable_audio_clock +ffffffff82262440 T enc1_se_enable_dp_audio +ffffffff82262520 T enc1_se_audio_mute_control +ffffffff82262570 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dpp2_power_on_obuf +ffffffff82265310 T dpp2_dummy_program_input_lut +ffffffff82265340 T dscl2_calc_lb_num_partitions +ffffffff82265470 T dpp2_cnv_set_alpha_keyer +ffffffff82265740 T dpp2_set_cursor_attributes +ffffffff822658b0 T oppn20_dummy_program_regamma_pwl +ffffffff822658e0 T dpp2_construct +ffffffff82265960 t dpp2_cnv_setup +ffffffff82267000 T dpp2_set_degamma_pwl +ffffffff82267430 T dpp2_set_degamma +ffffffff822675e0 T dpp2_cm_set_gamut_remap +ffffffff82267830 T dpp2_program_input_csc +ffffffff82267a80 T dpp20_program_blnd_lut +ffffffff82268250 T dpp20_program_shaper +ffffffff8226a3d0 T dpp20_program_3dlut +ffffffff8226ab60 t dpp20_set3dlut_ram12 +ffffffff8226ad50 T dpp2_set_hdr_multiplier +ffffffff8226b000 T dsc2_construct +ffffffff8226b050 T dsc2_get_enc_caps +ffffffff8226b0d0 T dsc_config_log +ffffffff8226b190 T dsc2_get_packed_pps +ffffffff8226b390 T dsc_prepare_config +ffffffff8226b950 T dsc_log_pps +ffffffff8226c2c0 T dsc_override_rc_params +ffffffff8226c410 T dsc_init_reg_values +ffffffff8226c500 T dsc_dc_pixel_encoding_to_dsc_pixel_format +ffffffff8226c5b0 T dsc_dc_color_depth_to_dsc_bits_per_comp +ffffffff8226c5f0 T dsc_update_from_dsc_parameters +ffffffff8226c6b0 t dsc2_read_state +ffffffff8226c8b0 t dsc2_validate_stream +ffffffff8226c910 t dsc2_set_config +ffffffff8226dde0 t dsc2_enable +ffffffff8226dfd0 t dsc2_disable +ffffffff8226e190 t dsc2_disconnect +ffffffff8226f000 T dwb2_config_dwb_cnv +ffffffff8226f240 T dwb2_disable +ffffffff8226f380 T dwb2_is_enabled +ffffffff8226f430 T dwb2_set_stereo +ffffffff8226f530 T dwb2_set_new_content +ffffffff8226f5b0 T dwb2_set_scaler +ffffffff8226f9b0 T dcn20_dwbc_construct +ffffffff8226fa00 t dwb2_get_caps +ffffffff8226fae0 t dwb2_enable +ffffffff8226fc70 t dwb2_update +ffffffff8226fe00 t dwb2_set_warmup +ffffffff82270000 T dwb_program_horz_scalar +ffffffff82270590 t wbscl_get_filter_coeffs_16p +ffffffff82270b10 t wbscl_set_scaler_filter +ffffffff82270d30 T dwb_program_vert_scalar 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hubp2_cursor_set_attributes +ffffffff82276100 T hubp2_dmdata_set_attributes +ffffffff82276550 T hubp2_dmdata_load +ffffffff822765f0 T hubp2_dmdata_status_done +ffffffff82276670 T hubp2_program_surface_flip_and_addr +ffffffff82277030 T hubp2_enable_triplebuffer +ffffffff82277100 T hubp2_is_triplebuffer_enabled +ffffffff82277180 T hubp2_set_flip_control_surface_gsl +ffffffff822771d0 T hubp2_is_flip_pending +ffffffff82277300 T hubp2_set_blank +ffffffff82277370 T hubp2_set_blank_regs +ffffffff82277480 T hubp2_cursor_set_position +ffffffff82277930 T hubp2_clk_cntl +ffffffff82277980 T hubp2_vtg_sel +ffffffff822779c0 T hubp2_clear_underflow +ffffffff82277a10 T hubp2_read_state_common +ffffffff82278800 T hubp2_read_state +ffffffff82278af0 T hubp2_construct +ffffffff82278b60 t hubp2_setup +ffffffff82279030 t hubp2_validate_dml_output +ffffffff8227b000 T dcn20_set_flip_control_gsl +ffffffff8227b050 T dcn20_enable_power_gating_plane +ffffffff8227b550 T dcn20_dccg_init +ffffffff8227b5e0 T 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dcn30_get_panel_config_defaults +ffffffff822d2790 t read_dce_straps +ffffffff822d27c0 t dcn30_create_audio +ffffffff822d27f0 t dcn30_stream_encoder_create +ffffffff822d29b0 t dcn30_hwseq_create +ffffffff822d3000 T vpg3_update_generic_info_packet +ffffffff822d3a10 T vpg3_construct +ffffffff822d4000 T dccg301_create +ffffffff822d5000 T dcn301_link_encoder_construct +ffffffff822d6000 T hubbub301_construct +ffffffff822d7000 T dcn301_hw_sequencer_construct +ffffffff822d8000 T optc301_set_drr +ffffffff822d8260 T optc301_setup_manual_trigger +ffffffff822d8390 T dcn301_timing_generator_init +ffffffff822d9000 T dcn301_panel_cntl_construct +ffffffff822d9050 t dcn301_panel_cntl_destroy +ffffffff822d90a0 t dcn301_panel_cntl_hw_init +ffffffff822d9320 t dcn301_is_panel_backlight_on +ffffffff822d9390 t dcn301_is_panel_powered_on +ffffffff822d9450 t dcn301_store_backlight_level +ffffffff822d9510 t dcn301_get_16_bit_backlight_from_pwm +ffffffff822da000 T dcn301_create_resource_pool +ffffffff822db8a0 t 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dcn302_stream_encoder_create +ffffffff822e1230 t dcn302_hwseq_create +ffffffff822e2000 T dcn303_dpp_pg_control +ffffffff822e2030 T dcn303_hubp_pg_control +ffffffff822e2060 T dcn303_dsc_pg_control +ffffffff822e2090 T dcn303_enable_power_gating_plane +ffffffff822e3000 T dcn303_hw_sequencer_construct +ffffffff822e4000 T dcn303_update_bw_bounding_box +ffffffff822e4060 T dcn303_create_resource_pool +ffffffff822e5570 t dcn303_resource_destruct +ffffffff822e5b70 t dcn303_destroy_resource_pool +ffffffff822e5be0 t dcn303_panel_cntl_create +ffffffff822e5c70 t dcn303_link_encoder_create +ffffffff822e5d30 t dcn303_get_panel_config_defaults +ffffffff822e5db0 t read_dce_straps +ffffffff822e5de0 t dcn303_create_audio +ffffffff822e5e10 t dcn303_stream_encoder_create +ffffffff822e5fd0 t dcn303_hwseq_create +ffffffff822e7000 T afmt31_powerdown +ffffffff822e7090 T afmt31_poweron +ffffffff822e7120 T afmt31_construct +ffffffff822e8000 T apg31_construct +ffffffff822e8050 t apg31_se_audio_setup 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dcn31_link_encoder_construct +ffffffff822ec5b0 T dcn31_link_encoder_construct_minimal +ffffffff822ec630 T dcn31_link_encoder_enable_dp_output +ffffffff822ec8b0 T dcn31_link_encoder_enable_dp_mst_output +ffffffff822ecb30 T dcn31_link_encoder_disable_output +ffffffff822ecde0 T dcn31_link_encoder_is_in_alt_mode +ffffffff822ecf40 T dcn31_link_encoder_get_max_link_cap +ffffffff822ed0d0 t enc31_hw_init +ffffffff822ee000 T dcn31_hpo_dp_link_enc_enable +ffffffff822ee180 T dcn31_hpo_dp_link_enc_disable +ffffffff822ee200 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff822eebe0 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff822eee90 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff822ef170 T dcn31_hpo_dp_link_enc_read_state +ffffffff822ef480 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff822ef590 T dcn31_hpo_dp_link_enc_disable_output +ffffffff822ef6f0 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff822ef7f0 T hpo_dp_link_encoder31_construct +ffffffff822ef850 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff822f0000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff822f0070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff822f01e0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff822f0500 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff822f0630 t dcn31_hpo_dp_stream_enc_disable +ffffffff822f06b0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff822f0fd0 t dcn31_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num +ffffffff822f10a0 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff822f12f0 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff822f14a0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff822f1790 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff822f18a0 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff822f1960 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff822f1a50 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff822f1c40 t dcn31_hpo_dp_stream_enc_read_state +ffffffff822f1e00 t dcn31_set_hblank_min_symbol_width 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dcn31_reset_hw_ctx_wrap +ffffffff822f7a40 T dcn31_setup_hpo_hw_control +ffffffff822f8000 T dcn31_hw_sequencer_construct +ffffffff822f9000 T optc31_immediate_disable_crtc +ffffffff822f9120 T optc31_set_drr +ffffffff822f9360 T optc3_init_odm +ffffffff822f94e0 T dcn31_timing_generator_init +ffffffff822f9550 t optc31_enable_crtc +ffffffff822f9680 t optc31_disable_crtc +ffffffff822f9780 t optc31_set_odm_combine +ffffffff822fa000 T dcn31_panel_cntl_construct +ffffffff822fa040 t dcn31_panel_cntl_destroy +ffffffff822fa090 t dcn31_panel_cntl_hw_init +ffffffff822fa190 t dcn31_is_panel_backlight_on +ffffffff822fa240 t dcn31_is_panel_powered_on +ffffffff822fa300 t dcn31_store_backlight_level +ffffffff822fa3d0 t dcn31_get_16_bit_backlight_from_pwm +ffffffff822fb000 T dcn31x_populate_dml_pipes_from_context +ffffffff822fb190 T dcn31_populate_dml_pipes_from_context +ffffffff822fb610 T dcn31_calculate_wm_and_dlg +ffffffff822fb690 T dcn31_populate_dml_writeback_from_context +ffffffff822fb700 T dcn31_set_mcif_arb_params +ffffffff822fb770 T dcn31_validate_bandwidth +ffffffff822fbbd0 T dcn31_create_resource_pool +ffffffff822fd220 t dcn31_resource_destruct +ffffffff822fd9a0 t dcn31_destroy_resource_pool +ffffffff822fda10 t dcn31_panel_cntl_create +ffffffff822fda80 t dcn31_link_encoder_create +ffffffff822fdb40 t dcn31_link_enc_create_minimal +ffffffff822fdc00 t dcn31_get_panel_config_defaults +ffffffff822fdc40 t read_dce_straps +ffffffff822fdc70 t dcn31_create_audio +ffffffff822fdca0 t dcn31_stream_encoder_create +ffffffff822fde60 t dcn31_hpo_dp_stream_encoder_create +ffffffff822fe070 t dcn31_hpo_dp_link_encoder_create +ffffffff822fe110 t dcn31_hwseq_create +ffffffff822ff000 T vpg31_powerdown +ffffffff822ff090 T vpg31_poweron +ffffffff822ff130 T vpg31_construct +ffffffff82300000 T dccg314_create +ffffffff823000c0 t dccg314_init +ffffffff823002b0 t dccg314_set_dpstreamclk +ffffffff823006a0 t dccg314_set_dtbclk_dto +ffffffff823008d0 t dccg314_set_pixel_rate_div +ffffffff82300c50 t dccg314_set_valid_pixel_rate +ffffffff82300cc0 t dccg314_trigger_dio_fifo_resync +ffffffff82300d70 t dccg314_dpp_root_clock_control +ffffffff82301000 T dcn314_dio_stream_encoder_construct +ffffffff82301070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff82301700 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff82301950 t enc314_stream_encoder_dp_blank +ffffffff823019e0 t enc314_stream_encoder_dp_unblank +ffffffff82301df0 t enc314_read_state +ffffffff82301f80 t enc314_dp_set_dsc_config +ffffffff82301fd0 t enc314_dp_set_odm_combine +ffffffff82302010 t enc314_set_dig_input_mode +ffffffff82302060 t enc314_enable_fifo +ffffffff82302120 t enc314_disable_fifo +ffffffff82302170 t enc314_reset_fifo +ffffffff82303000 T dcn314_update_odm +ffffffff823036a0 T dcn314_dsc_pg_control +ffffffff82303ac0 T dcn314_enable_power_gating_plane +ffffffff82303da0 T dcn314_calculate_dccg_k1_k2_values +ffffffff82303f60 T dcn314_set_pixels_per_cycle +ffffffff82304050 T dcn314_resync_fifo_dccg_dio +ffffffff82304210 T dcn314_dpp_root_clock_control +ffffffff82304270 T dcn314_disable_link_output +ffffffff82305000 T dcn314_hw_sequencer_construct +ffffffff82306000 T dcn314_timing_generator_init +ffffffff82306070 t optc314_enable_crtc +ffffffff823061a0 t optc314_disable_crtc +ffffffff82306290 t optc314_phantom_crtc_post_enable +ffffffff82306360 t optc314_set_odm_bypass +ffffffff823064f0 t optc314_set_odm_combine +ffffffff82306810 t optc314_set_h_timing_div_manual_mode +ffffffff82307000 T dcn314_validate_bandwidth +ffffffff82307520 T dcn314_create_resource_pool +ffffffff82308b30 t dcn314_resource_destruct +ffffffff823092b0 t dcn314_get_preferred_eng_id_dpia +ffffffff823092e0 t dcn314_destroy_resource_pool +ffffffff82309350 t dcn31_panel_cntl_create +ffffffff823093c0 t dcn31_link_encoder_create +ffffffff82309480 t dcn31_link_enc_create_minimal +ffffffff82309540 t dcn314_populate_dml_pipes_from_context +ffffffff823095f0 t dcn314_update_bw_bounding_box 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dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff82316000 T hubbub32_set_request_limit +ffffffff82316140 T dcn32_program_det_size +ffffffff82316310 T hubbub32_program_urgent_watermarks +ffffffff82316b10 T hubbub32_program_stutter_watermarks +ffffffff82316fa0 T hubbub32_program_pstate_watermarks +ffffffff82317470 T hubbub32_program_usr_watermarks +ffffffff823176f0 T hubbub32_force_usr_retraining_allow +ffffffff82317780 T hubbub32_force_wm_propagate_to_pipes +ffffffff82317830 T hubbub32_init +ffffffff82317990 T hubbub32_construct +ffffffff82317a10 t hubbub32_wm_read_state +ffffffff82317f10 t hubbub32_program_watermarks +ffffffff82318060 t hubbub32_init_watermarks +ffffffff823185e0 t dcn32_program_compbuf_size +ffffffff823188b0 t dcn32_init_crb +ffffffff82319000 T hubp32_update_force_pstate_disallow +ffffffff82319090 T hubp32_update_force_cursor_pstate_disallow +ffffffff82319120 T hubp32_update_mall_sel +ffffffff823191c0 T hubp32_prepare_subvp_buffering +ffffffff82319260 T hubp32_phantom_hubp_post_enable +ffffffff82319390 T hubp32_cursor_set_attributes +ffffffff82319690 T hubp32_init +ffffffff823196c0 T hubp32_construct +ffffffff8231a000 T dcn32_dsc_pg_control +ffffffff8231a370 T dcn32_enable_power_gating_plane +ffffffff8231a630 T dcn32_hubp_pg_control +ffffffff8231a8e0 T dcn32_apply_idle_power_optimizations +ffffffff8231abf0 T dcn32_commit_subvp_config +ffffffff8231aca0 T dcn32_subvp_pipe_control_lock +ffffffff8231ae80 T dcn32_subvp_pipe_control_lock_fast +ffffffff8231af00 T dcn32_set_mpc_shaper_3dlut +ffffffff8231b030 T dcn32_set_mcm_luts +ffffffff8231b1f0 T dcn32_set_input_transfer_func +ffffffff8231b350 T dcn32_set_output_transfer_func +ffffffff8231b5d0 T dcn32_update_force_pstate +ffffffff8231b820 T dcn32_update_mall_sel +ffffffff8231ba30 T dcn32_program_mall_pipe_config +ffffffff8231bb20 T dcn32_init_hw +ffffffff8231c520 T dcn32_update_odm +ffffffff8231cbc0 T dcn32_calculate_dccg_k1_k2_values +ffffffff8231ce20 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff8231ced0 T dcn32_set_pixels_per_cycle +ffffffff8231d030 T dcn32_resync_fifo_dccg_dio +ffffffff8231d200 T dcn32_unblank_stream +ffffffff8231d450 T dcn32_disable_link_output +ffffffff8231d840 T dcn32_update_phantom_vp_position +ffffffff8231d950 T dcn32_apply_update_flags_for_phantom +ffffffff8231d9e0 T dcn32_dsc_pg_status +ffffffff8231dac0 T dcn32_update_dsc_pg +ffffffff8231dbd0 T dcn32_enable_phantom_streams +ffffffff8231dd30 T dcn32_init_blank +ffffffff8231dfc0 T dcn32_blank_phantom +ffffffff8231e170 T dcn32_is_pipe_topology_transition_seamless +ffffffff8231f000 T dcn32_hw_sequencer_init_functions +ffffffff82320000 T dcn32_mmhubbub_construct +ffffffff82320050 t mmhubbub32_warmup_mcif +ffffffff823202a0 t mmhubbub32_config_mcif_buf +ffffffff82320800 t mmhubbub32_config_mcif_arb +ffffffff82321000 T mpc32_mpc_init +ffffffff82321210 T mpc32_power_on_blnd_lut +ffffffff823213b0 T mpc32_configure_post1dlut +ffffffff823214c0 T mpc32_program_post1dluta_settings +ffffffff823216e0 T mpc32_program_post1dlutb_settings +ffffffff82321900 T mpc32_program_post1dlut_pwl +ffffffff82321d90 T mpc32_program_post1dlut +ffffffff82322100 T mpc32_configure_shaper_lut +ffffffff82322230 T mpc32_program_shaper_luta_settings +ffffffff82323190 T mpc32_program_shaper_lutb_settings +ffffffff823240f0 T mpc32_program_shaper_lut +ffffffff823242b0 T mpc32_power_on_shaper_3dlut +ffffffff82324510 T mpc32_program_shaper +ffffffff823248a0 T mpc32_select_3dlut_ram +ffffffff82324950 T mpc32_select_3dlut_ram_mask +ffffffff82324a30 T mpc32_set3dlut_ram12 +ffffffff82324c40 T mpc32_set3dlut_ram10 +ffffffff82324d20 T mpc32_program_3dlut +ffffffff823257e0 T dcn32_mpc_construct +ffffffff82326000 T optc32_set_h_timing_div_manual_mode +ffffffff82326040 T dcn32_timing_generator_init +ffffffff823260b0 t optc32_enable_crtc +ffffffff823261e0 t optc32_disable_crtc +ffffffff823263c0 t optc32_phantom_crtc_post_enable +ffffffff82326490 t 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dcn32_set_det_allocations +ffffffff8233fb00 T dcn32_save_mall_state +ffffffff8233fbb0 T dcn32_restore_mall_state +ffffffff8233fc60 T dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8233fe50 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8233ff00 T dcn32_check_native_scaling_for_res +ffffffff8233ff60 T dcn32_subvp_drr_admissable +ffffffff82340130 T dcn32_subvp_vblank_admissable +ffffffff82341000 T dcn321_link_encoder_construct +ffffffff82342000 T dcn321_create_resource_pool +ffffffff823420d0 t dcn321_resource_construct +ffffffff8234d840 t dcn321_mpc_create +ffffffff82351ea0 t dcn321_dwbc_create +ffffffff823528d0 t dcn321_mmhubbub_create +ffffffff82352db0 t dcn321_resource_destruct +ffffffff82353540 t dcn321_destroy_resource_pool +ffffffff823535b0 t dcn321_link_encoder_create +ffffffff82354690 t dcn321_update_bw_bounding_box +ffffffff823546f0 t read_dce_straps +ffffffff82354720 t dcn321_create_audio +ffffffff82354aa0 t dcn321_stream_encoder_create +ffffffff82356920 t dcn321_hpo_dp_stream_encoder_create +ffffffff82357750 t dcn321_hpo_dp_link_encoder_create +ffffffff82357bc0 t dcn321_hwseq_create +ffffffff823580b0 t dcn321_vpg_create +ffffffff82359000 T bw_int_to_fixed_nonconst +ffffffff823590a0 T bw_frc_to_fixed +ffffffff82359290 T bw_floor2 +ffffffff82359350 T bw_ceil2 +ffffffff823593d0 T bw_mul +ffffffff8235a000 T convert_to_custom_float_format +ffffffff8235b000 T bw_calcs_init +ffffffff8235bf30 T bw_calcs +ffffffff8235de40 t calculate_bandwidth +ffffffff82367000 T scaler_settings_calculation +ffffffff82367370 T mode_support_and_system_configuration +ffffffff8236d680 T display_pipe_configuration +ffffffff8236e000 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff82373000 T dcn_bw_mod +ffffffff82373060 T dcn_bw_min2 +ffffffff823730a0 T dcn_bw_max +ffffffff823730d0 T dcn_bw_max2 +ffffffff82373110 T dcn_bw_floor2 +ffffffff823731c0 T dcn_bw_floor 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calculate_ttu_cursor +ffffffff823bd000 T optc3_fpu_set_vrr_m_const +ffffffff823bd540 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff823bd860 T dcn30_fpu_set_mcif_arb_params +ffffffff823bda20 T dcn30_fpu_update_soc_for_wm_a +ffffffff823bdaf0 T dcn30_fpu_calculate_wm_and_dlg +ffffffff823be690 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff823be8b0 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff823be920 T dcn30_fpu_update_max_clk +ffffffff823be9d0 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff823beae0 T dcn30_fpu_update_bw_bounding_box +ffffffff823becd0 T dcn3_fpu_build_wm_range_table +ffffffff823befb0 T patch_dcn30_soc_bounding_box +ffffffff823c0000 T dml30_recalculate +ffffffff823c0610 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff823c7470 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff823c76e0 T dml30_CalculateWriteBackDISPCLK +ffffffff823c7870 t dml_max3 +ffffffff823c78e0 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff823cf7a0 t CalculateSwathAndDETConfiguration +ffffffff823cfec0 t TruncToValidBPP +ffffffff823d0130 t CalculateVMAndRowBytes +ffffffff823d0800 t CalculatePrefetchSourceLines +ffffffff823d09f0 t CalculateUrgentBurstFactor +ffffffff823d0ca0 t CalculateDCFCLKDeepSleep +ffffffff823d0ff0 t UseMinimumDCFCLK +ffffffff823d2390 t CalculatePrefetchSchedule +ffffffff823d3940 t CalculateFlipSchedule +ffffffff823d3e90 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff823d4c40 t CalculateSwathWidth +ffffffff823d6000 T dml30_rq_dlg_get_rq_reg +ffffffff823d64f0 t dml_rq_dlg_get_rq_params +ffffffff823d6790 T dml30_rq_dlg_get_dlg_reg +ffffffff823d92f0 t get_surf_rq_param +ffffffff823d9cb0 t calculate_ttu_cursor +ffffffff823da000 T dcn301_update_bw_bounding_box +ffffffff823da300 T dcn301_fpu_set_wm_ranges +ffffffff823da3b0 T dcn301_fpu_init_soc_bounding_box +ffffffff823da460 T dcn301_calculate_wm_and_dlg_fp +ffffffff823da7d0 t calculate_wm_set_for_vlevel +ffffffff823db000 T dcn302_fpu_update_bw_bounding_box +ffffffff823db980 T dcn302_fpu_init_soc_bounding_box +ffffffff823dc000 T dcn303_fpu_update_bw_bounding_box +ffffffff823dc9e0 T dcn303_fpu_init_soc_bounding_box +ffffffff823dd000 T dcn31_zero_pipe_dcc_fraction +ffffffff823dd070 T dcn31_update_soc_for_wm_a +ffffffff823dd130 T dcn315_update_soc_for_wm_a +ffffffff823dd210 T dcn31_calculate_wm_and_dlg_fp +ffffffff823dd900 T dcn31_update_bw_bounding_box +ffffffff823ddcc0 T dcn315_update_bw_bounding_box +ffffffff823ddfc0 T dcn316_update_bw_bounding_box +ffffffff823de3a0 T dcn_get_max_non_odm_pix_rate_100hz +ffffffff823de400 T dcn_get_approx_det_segs_required_for_pstate +ffffffff823df000 T dml31_recalculate +ffffffff823df300 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff823e6640 T dml31_CalculateWriteBackDISPCLK +ffffffff823e67d0 t dml_max3 +ffffffff823e6840 T dml31_ModeSupportAndSystemConfigurationFull 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DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff824024c0 T dml314_CalculateWriteBackDISPCLK +ffffffff82402650 t dml_max3 +ffffffff824026c0 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff8240adf0 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff8240b060 t CalculateSwathAndDETConfiguration +ffffffff8240b6d0 t TruncToValidBPP +ffffffff8240b930 t CalculateDCFCLKDeepSleep +ffffffff8240bc80 t CalculateVMAndRowBytes +ffffffff8240c320 t CalculatePrefetchSourceLines +ffffffff8240c510 t CalculateUrgentBurstFactor +ffffffff8240c7c0 t CalculateMaxVStartup +ffffffff8240c930 t UseMinimumDCFCLK +ffffffff8240d950 t CalculatePrefetchSchedulePerPlane +ffffffff8240e0d0 t CalculateFlipSchedule +ffffffff8240e6c0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8240f340 t CalculateSwathWidth +ffffffff8240f8b0 t CalculatePrefetchSchedule +ffffffff82410dd0 t CalculateVupdateAndDynamicMetadataParameters +ffffffff82412000 T dml314_rq_dlg_get_rq_reg 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dcn32_set_clock_limits +ffffffff8241ea30 T dcn32_override_min_req_memclk +ffffffff8241eb00 t subvp_drr_schedulable +ffffffff8241edc0 t get_optimal_ntuple +ffffffff82420000 T dml32_recalculate +ffffffff82424510 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff8242d000 T dml32_dscceComputeDelay +ffffffff8242d150 T dml32_dscComputeDelay +ffffffff8242d190 T IsVertical +ffffffff8242d1c0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff8242d540 t dml_max3 +ffffffff8242d5b0 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff8242d8e0 T dml32_CalculateSwathAndDETConfiguration +ffffffff8242e140 T dml32_CalculateSwathWidth +ffffffff8242eab0 T dml32_UnboundedRequest +ffffffff8242eb20 T dml32_CalculateDETBufferSize +ffffffff8242f1a0 T dml32_CalculateODMMode +ffffffff8242f970 T dml32_CalculateRequiredDispclk +ffffffff8242fb40 T dml32_RoundToDFSGranularity +ffffffff8242fbd0 T dml32_CalculateOutputLink +ffffffff824306d0 T dml32_TruncToValidBPP +ffffffff82430a10 T dml32_CalculateDPPCLK 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dml32_rq_dlg_get_dlg_reg +ffffffff82440000 T dcn321_update_bw_bounding_box_fpu +ffffffff82442820 t get_optimal_ntuple +ffffffff82443000 T dml_init_instance +ffffffff82443320 T dml_get_status_message +ffffffff82443360 T dml_log_pipe_params +ffffffff82443390 T dml_log_mode_support_params +ffffffff82444000 T dml_get_voltage_level +ffffffff824442c0 t fetch_socbb_params +ffffffff824447b0 t fetch_ip_params +ffffffff82444c50 t fetch_pipe_params +ffffffff82445ce0 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff82445d60 T get_clk_dcf_deepsleep +ffffffff82445eb0 T get_wm_urgent +ffffffff82446000 T get_wm_memory_trip +ffffffff82446150 T get_wm_writeback_urgent +ffffffff824462a0 T get_wm_stutter_exit +ffffffff824463f0 T get_wm_stutter_enter_exit +ffffffff82446540 T get_wm_z8_stutter_exit +ffffffff82446690 T get_wm_z8_stutter_enter_exit +ffffffff824467e0 T get_stutter_efficiency_z8 +ffffffff82446930 T get_stutter_num_bursts_z8 +ffffffff82446a80 T get_wm_dram_clock_change +ffffffff82446bd0 T get_wm_writeback_dram_clock_change +ffffffff82446d20 T get_stutter_efficiency +ffffffff82446e70 T get_stutter_efficiency_no_vblank +ffffffff82446fc0 T get_stutter_period +ffffffff82447110 T get_urgent_latency +ffffffff82447260 T get_urgent_extra_latency +ffffffff824473b0 T get_nonurgent_latency +ffffffff82447500 T get_dram_clock_change_latency +ffffffff82447650 T get_dispclk_calculated +ffffffff824477a0 T get_total_data_read_bw +ffffffff824478f0 T get_return_bw +ffffffff82447a40 T get_tcalc +ffffffff82447b90 T get_fraction_of_urgent_bandwidth +ffffffff82447ce0 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff82447e30 T get_cstate_max_cap_mode +ffffffff82447f90 T get_comp_buffer_size_kbytes +ffffffff824480e0 T get_pixel_chunk_size_in_kbyte +ffffffff82448230 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff82448380 T get_meta_chunk_size_in_kbyte +ffffffff824484d0 T get_min_pixel_chunk_size_in_byte +ffffffff82448620 T get_min_meta_chunk_size_in_byte +ffffffff82448770 T get_fclk_watermark +ffffffff824488c0 T get_usr_retraining_watermark +ffffffff82448a10 T get_comp_buffer_reserved_space_kbytes +ffffffff82448b60 T get_comp_buffer_reserved_space_64bytes +ffffffff82448cb0 T get_comp_buffer_reserved_space_zs +ffffffff82448e00 T get_unbounded_request_enabled +ffffffff82448f60 T get_dsc_delay +ffffffff824490c0 T get_dppclk_calculated +ffffffff82449220 T get_dscclk_calculated +ffffffff82449380 T get_min_ttu_vblank +ffffffff824494e0 T get_min_ttu_vblank_in_us +ffffffff82449640 T get_vratio_prefetch_l +ffffffff824497a0 T get_vratio_prefetch_c +ffffffff82449900 T get_dst_x_after_scaler +ffffffff82449a60 T get_dst_y_after_scaler +ffffffff82449bc0 T get_dst_y_per_vm_vblank +ffffffff82449d20 T get_dst_y_per_row_vblank +ffffffff82449e80 T get_dst_y_prefetch +ffffffff82449fe0 T get_dst_y_per_vm_flip +ffffffff8244a140 T get_dst_y_per_row_flip +ffffffff8244a2a0 T get_refcyc_per_vm_group_vblank +ffffffff8244a400 T get_refcyc_per_vm_group_flip +ffffffff8244a560 T get_refcyc_per_vm_req_vblank +ffffffff8244a6c0 T get_refcyc_per_vm_req_flip +ffffffff8244a820 T get_refcyc_per_vm_group_vblank_in_us +ffffffff8244a980 T get_refcyc_per_vm_group_flip_in_us +ffffffff8244aae0 T get_refcyc_per_vm_req_vblank_in_us +ffffffff8244ac40 T get_refcyc_per_vm_req_flip_in_us +ffffffff8244ada0 T get_refcyc_per_vm_dmdata_in_us +ffffffff8244af00 T get_dmdata_dl_delta_in_us +ffffffff8244b060 T get_refcyc_per_line_delivery_l_in_us +ffffffff8244b1c0 T get_refcyc_per_line_delivery_c_in_us +ffffffff8244b320 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff8244b480 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff8244b5e0 T get_refcyc_per_req_delivery_l_in_us +ffffffff8244b740 T get_refcyc_per_req_delivery_c_in_us +ffffffff8244b8a0 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff8244ba00 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff8244bb60 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff8244bcc0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff8244be20 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff8244bf80 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff8244c0e0 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff8244c240 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff8244c3a0 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff8244c500 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff8244c660 T get_vstartup +ffffffff8244c7c0 T get_vupdate_offset +ffffffff8244c920 T get_vupdate_width +ffffffff8244ca80 T get_vready_offset +ffffffff8244cbe0 T get_vready_at_or_after_vsync +ffffffff8244cd50 T get_min_dst_y_next_start +ffffffff8244ceb0 T get_dst_y_per_pte_row_nom_l +ffffffff8244d010 T get_dst_y_per_pte_row_nom_c +ffffffff8244d170 T get_dst_y_per_meta_row_nom_l +ffffffff8244d2d0 T get_dst_y_per_meta_row_nom_c +ffffffff8244d430 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff8244d590 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff8244d6f0 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff8244d850 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff8244d9b0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff8244db10 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff8244dc70 T get_vstartup_calculated +ffffffff8244ddd0 T get_dpte_row_height_linear_c +ffffffff8244df30 T get_swath_height_l +ffffffff8244e090 T get_swath_height_c +ffffffff8244e1f0 T get_det_stored_buffer_size_l_bytes +ffffffff8244e350 T get_det_stored_buffer_size_c_bytes +ffffffff8244e4b0 T get_dpte_group_size_in_bytes +ffffffff8244e610 T get_vm_group_size_in_bytes +ffffffff8244e770 T get_dpte_row_height_linear_l +ffffffff8244e8d0 T get_pte_buffer_mode +ffffffff8244ea40 T get_subviewport_lines_needed_in_mall +ffffffff8244eba0 T get_surface_size_in_mall +ffffffff8244ed00 T get_total_immediate_flip_bytes +ffffffff8244ee50 T get_total_immediate_flip_bw +ffffffff8244f060 T get_total_prefetch_bw +ffffffff8244f270 T get_total_surface_size_in_mall_bytes +ffffffff8244f450 T get_det_buffer_size_kbytes +ffffffff8244f5b0 T get_is_phantom_pipe +ffffffff8244f710 T Calculate256BBlockSizes +ffffffff8244f800 T CalculateMinAndMaxPrefetchMode +ffffffff8244f880 T ModeSupportAndSystemConfiguration +ffffffff8244fbc0 T CalculateWriteBackDISPCLK +ffffffff82451000 T print__rq_params_st +ffffffff82451030 T print__data_rq_sizing_params_st +ffffffff82451060 T print__data_rq_dlg_params_st +ffffffff82451090 T print__data_rq_misc_params_st +ffffffff824510c0 T print__rq_dlg_params_st +ffffffff824510f0 T print__dlg_sys_params_st +ffffffff82451120 T print__data_rq_regs_st +ffffffff82451150 T print__rq_regs_st +ffffffff82451180 T print__dlg_regs_st +ffffffff824511b0 T print__ttu_regs_st +ffffffff82452000 T dml1_extract_rq_regs +ffffffff82452340 T dml1_rq_dlg_get_rq_params +ffffffff82452520 t get_surf_rq_param +ffffffff82453120 T dml1_rq_dlg_get_dlg_params +ffffffff82456000 T _do_calc_rc_params +ffffffff82456fd0 t get_qp_set +ffffffff82458000 T dc_bandwidth_in_kbps_from_timing +ffffffff824582e0 T dc_dsc_stream_bandwidth_in_kbps +ffffffff82458470 T dc_dsc_parse_dsc_dpcd +ffffffff82458730 t dsc_throughput_from_dpcd +ffffffff824588f0 T dc_dsc_compute_bandwidth_range +ffffffff82458b20 t intersect_dsc_caps +ffffffff82458cf0 t setup_dsc_config +ffffffff824594f0 T dc_dsc_compute_config +ffffffff82459600 T dc_dsc_stream_bandwidth_overhead_in_kbps +ffffffff82459790 T dc_dsc_get_policy_for_timing +ffffffff82459830 T dc_dsc_policy_set_max_target_bpp_limit +ffffffff82459860 T dc_dsc_policy_set_enable_dsc_when_not_needed +ffffffff82459890 T dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff824598c0 T dc_set_disable_128b_132b_stream_overhead +ffffffff824598f0 T dc_dsc_get_default_config_option +ffffffff82459940 t fit_num_slices_up +ffffffff824599f0 t decide_dsc_target_bpp_x16 +ffffffff8245a000 T calc_rc_params +ffffffff8245b000 T dscc_compute_dsc_parameters +ffffffff8245c000 T dal_hw_factory_dce110_init +ffffffff8245c060 t define_hpd_registers +ffffffff8245c0b0 t define_ddc_registers +ffffffff8245d000 T dal_hw_translate_dce110_init +ffffffff8245d030 t offset_to_id +ffffffff8245d3a0 t id_to_offset +ffffffff8245e000 T dal_hw_factory_dce120_init +ffffffff8245e060 t define_hpd_registers +ffffffff8245e0b0 t define_ddc_registers +ffffffff8245f000 T dal_hw_translate_dce120_init +ffffffff8245f030 t offset_to_id +ffffffff8245f3b0 t id_to_offset +ffffffff82460000 T dal_hw_factory_dce80_init +ffffffff82460060 t define_hpd_registers +ffffffff824600b0 t define_ddc_registers +ffffffff82461000 T dal_hw_translate_dce80_init +ffffffff82461030 t offset_to_id +ffffffff824617d0 t id_to_offset +ffffffff82462000 T dal_hw_factory_dcn10_init +ffffffff82462060 t define_hpd_registers +ffffffff824620b0 t define_ddc_registers +ffffffff82462150 t define_generic_registers +ffffffff82463000 T dal_hw_translate_dcn10_init +ffffffff82463030 t offset_to_id +ffffffff824633a0 t id_to_offset +ffffffff82464000 T dal_hw_factory_dcn20_init +ffffffff82464060 t define_hpd_registers +ffffffff824640b0 t define_ddc_registers +ffffffff82464160 t define_generic_registers +ffffffff82465000 T dal_hw_translate_dcn20_init +ffffffff82465030 t offset_to_id +ffffffff824652c0 t id_to_offset +ffffffff82466000 T dal_hw_factory_dcn21_init +ffffffff82466060 t define_hpd_registers +ffffffff824660b0 t define_ddc_registers +ffffffff82466160 t define_generic_registers +ffffffff82467000 T dal_hw_translate_dcn21_init +ffffffff82467030 t offset_to_id +ffffffff824672b0 t id_to_offset +ffffffff82468000 T dal_hw_factory_dcn30_init +ffffffff82468060 t define_hpd_registers +ffffffff824680b0 t define_ddc_registers +ffffffff82468160 t define_generic_registers +ffffffff82469000 T dal_hw_translate_dcn30_init +ffffffff82469030 t offset_to_id +ffffffff824692d0 t id_to_offset +ffffffff8246a000 T dal_hw_factory_dcn315_init +ffffffff8246a060 t define_hpd_registers +ffffffff8246a0b0 t define_ddc_registers +ffffffff8246a160 t define_generic_registers +ffffffff8246b000 T dal_hw_translate_dcn315_init +ffffffff8246b030 t offset_to_id +ffffffff8246b2b0 t id_to_offset +ffffffff8246c000 T dal_hw_factory_dcn32_init +ffffffff8246c060 t define_hpd_registers +ffffffff8246c0b0 t define_ddc_registers +ffffffff8246c160 t define_generic_registers +ffffffff8246d000 T dal_hw_translate_dcn32_init +ffffffff8246d030 t offset_to_id +ffffffff8246d290 t id_to_offset +ffffffff8246e000 T dal_gpio_open +ffffffff8246e0c0 T dal_gpio_open_ex +ffffffff8246e180 T dal_gpio_get_value +ffffffff8246e210 T dal_gpio_set_value +ffffffff8246e2a0 T dal_gpio_get_mode +ffffffff8246e2d0 T dal_gpio_lock_pin +ffffffff8246e2f0 T dal_gpio_unlock_pin +ffffffff8246e310 T dal_gpio_change_mode +ffffffff8246e3a0 T dal_gpio_get_id +ffffffff8246e3d0 T dal_gpio_get_enum +ffffffff8246e400 T dal_gpio_set_config +ffffffff8246e490 T dal_gpio_get_pin_info +ffffffff8246e4f0 T dal_gpio_get_sync_source +ffffffff8246e580 T dal_gpio_get_output_state +ffffffff8246e5b0 T dal_gpio_get_ddc +ffffffff8246e5e0 T dal_gpio_get_hpd +ffffffff8246e610 T dal_gpio_get_generic +ffffffff8246e640 T dal_gpio_close +ffffffff8246e6a0 T dal_gpio_create +ffffffff8246e850 T dal_gpio_destroy +ffffffff8246f000 T dal_gpio_service_create +ffffffff8246f280 T dal_gpio_service_create_irq +ffffffff8246f350 T dal_gpio_create_irq +ffffffff8246f3e0 T dal_gpio_service_create_generic_mux +ffffffff8246f490 T dal_gpio_destroy_generic_mux +ffffffff8246f530 T dal_gpio_get_generic_pin_info +ffffffff8246f5a0 T dal_gpio_service_destroy +ffffffff8246f720 T dal_mux_setup_config +ffffffff8246f790 T dal_gpio_service_lock +ffffffff8246f810 T dal_gpio_service_unlock +ffffffff8246f890 T dal_gpio_service_open +ffffffff8246fb20 T dal_gpio_service_close +ffffffff8246fbc0 T dal_irq_get_source +ffffffff8246fc40 T dal_irq_get_rx_source +ffffffff8246fca0 T dal_irq_setup_hpd_filter +ffffffff8246fd00 T dal_gpio_destroy_irq +ffffffff8246fda0 T dal_gpio_create_ddc +ffffffff8246ff50 T dal_gpio_destroy_ddc +ffffffff82470050 T dal_ddc_close +ffffffff824700a0 T dal_ddc_open +ffffffff82470230 T dal_ddc_change_mode +ffffffff82470300 T dal_ddc_get_line +ffffffff82470320 T dal_ddc_set_config +ffffffff82471000 T dal_hw_ddc_init +ffffffff82471120 T dal_hw_ddc_get_pin +ffffffff82471130 t dal_hw_ddc_destroy +ffffffff824711a0 t set_config +ffffffff82472000 T dal_hw_factory_init +ffffffff82473000 T dal_hw_generic_init +ffffffff82473120 T dal_hw_generic_get_pin +ffffffff82473130 t dal_hw_generic_destroy +ffffffff824731a0 t set_config +ffffffff82474000 T dal_hw_gpio_open +ffffffff824740d0 T dal_hw_gpio_config_mode +ffffffff824741c0 T dal_hw_gpio_get_value +ffffffff82474230 T dal_hw_gpio_set_value +ffffffff824742c0 T dal_hw_gpio_change_mode +ffffffff824742d0 T dal_hw_gpio_close +ffffffff824743a0 T dal_hw_gpio_construct +ffffffff82474400 T dal_hw_gpio_destruct +ffffffff82475000 T dal_hw_hpd_init +ffffffff82475120 T dal_hw_hpd_get_pin +ffffffff82475130 t dal_hw_hpd_destroy +ffffffff824751a0 t get_value +ffffffff82475240 t set_config +ffffffff82476000 T dal_hw_translate_init +ffffffff82477000 T dc_process_hdcp_msg +ffffffff82477190 t hdmi_14_process_transaction +ffffffff82477310 t dp_11_process_transaction +ffffffff82478000 T dal_irq_service_dummy_set +ffffffff82478060 T dal_irq_service_dummy_ack +ffffffff824780c0 T dce110_vblank_set +ffffffff824781b0 T to_dal_irq_source_dce110 +ffffffff82478330 T dal_irq_service_dce110_create +ffffffff824783c0 t hpd_ack +ffffffff82479000 T dal_irq_service_dce120_create ffffffff82479090 t hpd_ack -ffffffff8247a000 T dal_irq_service_dcn10_create +ffffffff8247a000 T dal_irq_service_dce80_create ffffffff8247a090 t hpd_ack -ffffffff8247a160 t to_dal_irq_source_dcn10 -ffffffff8247b000 T dal_irq_service_dcn20_create +ffffffff8247b000 T dal_irq_service_dcn10_create ffffffff8247b090 t hpd_ack -ffffffff8247b160 t to_dal_irq_source_dcn20 -ffffffff8247c000 T dal_irq_service_dcn201_create +ffffffff8247b160 t to_dal_irq_source_dcn10 +ffffffff8247c000 T dal_irq_service_dcn20_create ffffffff8247c090 t hpd_ack -ffffffff8247c160 t to_dal_irq_source_dcn201 -ffffffff8247d000 T dal_irq_service_dcn21_create +ffffffff8247c160 t to_dal_irq_source_dcn20 +ffffffff8247d000 T dal_irq_service_dcn201_create ffffffff8247d090 t hpd_ack -ffffffff8247d160 t to_dal_irq_source_dcn21 -ffffffff8247e000 T dal_irq_service_dcn30_create +ffffffff8247d160 t to_dal_irq_source_dcn201 +ffffffff8247e000 T dal_irq_service_dcn21_create ffffffff8247e090 t hpd_ack -ffffffff8247e160 t to_dal_irq_source_dcn30 -ffffffff8247f000 T dal_irq_service_dcn302_create +ffffffff8247e160 t to_dal_irq_source_dcn21 +ffffffff8247f000 T dal_irq_service_dcn30_create ffffffff8247f090 t hpd_ack -ffffffff8247f160 t to_dal_irq_source_dcn302 -ffffffff82480000 T dal_irq_service_dcn303_create +ffffffff8247f160 t to_dal_irq_source_dcn30 +ffffffff82480000 T dal_irq_service_dcn302_create ffffffff82480090 t hpd_ack -ffffffff82480160 t to_dal_irq_source_dcn303 -ffffffff82481000 T dal_irq_service_dcn31_create +ffffffff82480160 t to_dal_irq_source_dcn302 +ffffffff82481000 T dal_irq_service_dcn303_create ffffffff82481090 t hpd_ack -ffffffff82481160 t to_dal_irq_source_dcn31 -ffffffff82482000 T dal_irq_service_dcn314_create +ffffffff82481160 t to_dal_irq_source_dcn303 +ffffffff82482000 T dal_irq_service_dcn31_create ffffffff82482090 t hpd_ack -ffffffff82482160 t to_dal_irq_source_dcn314 -ffffffff82483000 T dal_irq_service_dcn315_create +ffffffff82482160 t to_dal_irq_source_dcn31 +ffffffff82483000 T dal_irq_service_dcn314_create ffffffff82483090 t hpd_ack -ffffffff82483160 t to_dal_irq_source_dcn315 -ffffffff82484000 T dal_irq_service_dcn32_create +ffffffff82483160 t to_dal_irq_source_dcn314 +ffffffff82484000 T dal_irq_service_dcn315_create ffffffff82484090 t hpd_ack -ffffffff82484160 t to_dal_irq_source_dcn32 -ffffffff82485000 T dal_irq_service_construct -ffffffff82485070 T dal_irq_service_destroy -ffffffff82485100 T dal_irq_service_set_generic -ffffffff82485180 T dal_irq_service_set -ffffffff82485360 T dal_irq_service_ack -ffffffff82485500 T dal_irq_service_ack_generic -ffffffff82485580 T dal_irq_service_to_irq_source -ffffffff82486000 T dp_handle_automated_test -ffffffff82486910 T dp_set_test_pattern -ffffffff82487110 t set_crtc_test_pattern -ffffffff824875f0 T dp_set_preferred_link_settings -ffffffff82487750 t dp_retrain_link_dp_test -ffffffff82487890 T dp_set_preferred_training_settings -ffffffff82488000 T dp_trace_init -ffffffff824880a0 T dp_trace_reset -ffffffff82488130 T dp_trace_is_initialized -ffffffff82488160 T dp_trace_detect_lt_init -ffffffff824881b0 T dp_trace_commit_lt_init -ffffffff82488200 T dp_trace_link_loss_increment -ffffffff82488230 T dp_trace_lt_fail_count_update -ffffffff82488270 T dp_trace_lt_total_count_increment -ffffffff824882b0 T dp_trace_set_is_logged_flag -ffffffff824882f0 T dp_trace_is_logged -ffffffff82488330 T dp_trace_lt_result_update -ffffffff82488370 T dp_trace_set_lt_start_timestamp -ffffffff82488460 T dp_trace_set_lt_end_timestamp -ffffffff82488550 T dp_trace_get_lt_end_timestamp -ffffffff82488590 T dp_trace_get_lt_counts -ffffffff824885d0 T dp_trace_get_link_loss_count -ffffffff82488600 T dp_trace_set_edp_power_timestamp -ffffffff824886f0 T dp_trace_get_edp_poweron_timestamp -ffffffff82488720 T dp_trace_get_edp_poweroff_timestamp -ffffffff82488750 T dp_trace_source_sequence -ffffffff82489000 T dp_fpga_hpo_enable_link_and_stream -ffffffff8248a000 T set_dio_throttled_vcp_size -ffffffff8248a020 T setup_dio_stream_encoder -ffffffff8248a130 T reset_dio_stream_encoder -ffffffff8248a220 T setup_dio_stream_attribute -ffffffff8248a3e0 T enable_dio_dp_link_output -ffffffff8248a480 T disable_dio_link_output -ffffffff8248a4f0 T set_dio_dp_link_test_pattern -ffffffff8248a560 T set_dio_dp_lane_settings -ffffffff8248a5a0 T update_dio_stream_allocation_table -ffffffff8248a620 T setup_dio_audio_output -ffffffff8248a690 T enable_dio_audio_packet -ffffffff8248a760 T disable_dio_audio_packet -ffffffff8248a850 T can_use_dio_link_hwss -ffffffff8248a890 T get_dio_link_hwss -ffffffff8248b000 T dp_dio_fixed_vs_pe_retimer_lane_cfg_to_hw_cfg -ffffffff8248b040 T dp_dio_fixed_vs_pe_retimer_exit_manual_automation -ffffffff8248b2e0 T enable_dio_fixed_vs_pe_retimer_program_4lane_output -ffffffff8248b440 T requires_fixed_vs_pe_retimer_dio_link_hwss -ffffffff8248b480 T get_dio_fixed_vs_pe_retimer_link_hwss -ffffffff8248b4b0 t enable_dio_fixed_vs_pe_retimer_dp_link_output -ffffffff8248b650 t set_dio_fixed_vs_pe_retimer_dp_link_test_pattern -ffffffff8248c000 T can_use_dpia_link_hwss -ffffffff8248c050 T get_dpia_link_hwss -ffffffff8248c080 t update_dpia_stream_allocation_table -ffffffff8248d000 T set_hpo_dp_throttled_vcp_size -ffffffff8248d030 T set_hpo_dp_hblank_min_symbol_width -ffffffff8248d160 T setup_hpo_dp_stream_encoder -ffffffff8248d1b0 T reset_hpo_dp_stream_encoder -ffffffff8248d1d0 T setup_hpo_dp_stream_attribute -ffffffff8248d250 T enable_hpo_dp_link_output -ffffffff8248d2d0 T disable_hpo_dp_link_output -ffffffff8248d380 T update_hpo_dp_stream_allocation_table -ffffffff8248d3a0 T setup_hpo_dp_audio_output -ffffffff8248d3e0 T enable_hpo_dp_audio_packet -ffffffff8248d400 T disable_hpo_dp_audio_packet -ffffffff8248d450 T can_use_hpo_dp_link_hwss -ffffffff8248d480 T get_hpo_dp_link_hwss -ffffffff8248d4b0 t set_hpo_dp_link_test_pattern -ffffffff8248d510 t set_hpo_dp_lane_settings -ffffffff8248e000 T requires_fixed_vs_pe_retimer_hpo_link_hwss -ffffffff8248e040 T get_hpo_fixed_vs_pe_retimer_dp_link_hwss -ffffffff8248e070 t enable_hpo_fixed_vs_pe_retimer_dp_link_output -ffffffff8248e0d0 t set_hpo_fixed_vs_pe_retimer_dp_link_test_pattern -ffffffff8248e4c0 t set_hpo_fixed_vs_pe_retimer_dp_lane_settings -ffffffff8248e550 t dp_hpo_fixed_vs_pe_retimer_set_tx_ffe -ffffffff8248f000 T link_reset_cur_dp_mst_topology -ffffffff8248f060 T link_detect_connection_type -ffffffff8248f1b0 T link_detect -ffffffff82490e30 T link_clear_dprx_states -ffffffff82490e60 T link_is_hdcp14 -ffffffff82490ec0 T link_is_hdcp22 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-ffffffff828180d0 T sdmmc_mem_read_block -ffffffff828182e0 T sdmmc_mem_write_block_subr -ffffffff82818660 T sdmmc_mem_single_write_block -ffffffff82818730 T sdmmc_mem_write_block -ffffffff82818940 T sdmmc_mem_hibernate_write -ffffffff82819000 T sdmmc_scsi_cmd -ffffffff82819200 T sdmmc_minphys -ffffffff82819280 T sdmmc_scsi_attach -ffffffff828194c0 T sdmmc_alloc_ccbs -ffffffff82819620 T sdmmc_free_ccbs -ffffffff82819680 T sdmmc_scsi_detach -ffffffff82819840 T sdmmc_stimeout -ffffffff828198e0 T sdmmc_ccb_alloc -ffffffff828199a0 T sdmmc_ccb_free -ffffffff82819aa0 T sdmmc_inquiry -ffffffff82819d30 T sdmmc_start_xs -ffffffff82819e50 T sdmmc_complete_xs -ffffffff82819f40 T sdmmc_done_xs -ffffffff82819f90 T sdmmc_scsi_hibernate_io -ffffffff8281b000 T bwfm_sdio_preinit -ffffffff8281b5a0 T bwfm_sdio_txcheck -ffffffff8281b5e0 T bwfm_sdio_txdata -ffffffff8281b660 T bwfm_sdio_txctl -ffffffff8281b7f0 T bwfm_sdio_buscore_read -ffffffff8281b800 T bwfm_sdio_buscore_write -ffffffff8281b820 T bwfm_sdio_buscore_prepare -ffffffff8281b9a0 T bwfm_sdio_buscore_activate -ffffffff8281ba30 T bwfm_sdio_match -ffffffff8281bae0 T bwfm_sdio_attach -ffffffff8281be80 T bwfm_sdio_detach -ffffffff8281bf00 T bwfm_sdio_task -ffffffff8281c0c0 T bwfm_sdio_write_1 -ffffffff8281c0f0 T bwfm_sdio_read_1 -ffffffff8281c120 T bwfm_sdio_write_4 -ffffffff8281c1f0 T bwfm_sdio_read_4 -ffffffff8281c2b0 T bwfm_sdio_load_microcode -ffffffff8281c5a0 T bwfm_sdio_clkctl -ffffffff8281c6d0 T bwfm_sdio_dev_write -ffffffff8281c720 T bwfm_sdio_intr -ffffffff8281c770 T bwfm_sdio_ram_read_write -ffffffff8281c9f0 T bwfm_sdio_htclk -ffffffff8281ccb0 T bwfm_sdio_readshared -ffffffff8281cda0 T bwfm_sdio_dev_read -ffffffff8281cde0 T bwfm_sdio_rx_frames -ffffffff8281d210 T bwfm_sdio_tx_frames -ffffffff8281d330 T bwfm_sdio_backplane -ffffffff8281d400 T bwfm_sdio_buf_read -ffffffff8281d500 T bwfm_sdio_buf_write -ffffffff8281d5d0 T bwfm_sdio_frame_read_write -ffffffff8281d780 T bwfm_sdio_newbuf -ffffffff8281d810 T bwfm_sdio_tx_ok -ffffffff8281d870 T bwfm_sdio_tx_ctrlframe -ffffffff8281d980 T bwfm_sdio_tx_dataframe -ffffffff8281daf0 T bwfm_sdio_rx_glom -ffffffff8281e000 T onewire_match -ffffffff8281e060 T onewire_attach -ffffffff8281e120 T onewire_detach -ffffffff8281e190 T onewire_activate -ffffffff8281e1b0 T onewire_scan -ffffffff8281e400 T onewire_createthread -ffffffff8281e470 T onewire_print -ffffffff8281e560 T onewirebus_print -ffffffff8281e5b0 T onewire_lock -ffffffff8281e5d0 T onewire_unlock -ffffffff8281e5f0 T onewire_reset -ffffffff8281e610 T onewire_bit -ffffffff8281e630 T onewire_read_byte -ffffffff8281e7c0 T onewire_write_byte -ffffffff8281e8d0 T onewire_read_block -ffffffff8281e970 T onewire_write_block -ffffffff8281ea10 T onewire_triplet -ffffffff8281eb20 T onewire_matchrom -ffffffff8281ed10 T onewire_search -ffffffff8281f180 T onewire_thread -ffffffff82820000 T onewire_crc -ffffffff828200b0 T onewire_crc16 -ffffffff82820170 T onewire_famname -ffffffff828201b0 T onewire_matchbyfam -ffffffff82821000 T owid_match -ffffffff82821030 T owid_attach -ffffffff82821120 T owid_detach -ffffffff82821170 T owid_activate -ffffffff82822000 T owsbm_match -ffffffff82822030 T owsbm_attach -ffffffff82822240 T owsbm_detach -ffffffff828222d0 T owsbm_activate -ffffffff82822300 T owsbm_update -ffffffff82823000 T owtemp_match -ffffffff82823030 T owtemp_attach -ffffffff82823160 T owtemp_detach -ffffffff828231f0 T owtemp_activate -ffffffff82823220 T owtemp_update -ffffffff82824000 T owctr_match -ffffffff82824030 T owctr_attach -ffffffff828241c0 T owctr_detach -ffffffff82824250 T owctr_activate -ffffffff82824280 T owctr_update -ffffffff828242c0 T owctr_update_counter -ffffffff82825000 A __text_page_start -ffffffff82825000 T Xsyscall_meltdown -ffffffff8282500c T Xsyscall -ffffffff82825299 t Xsyscall_trampback -ffffffff828252b0 T intr_user_exit -ffffffff828252f2 t intr_user_exit_post_ast -ffffffff8282544b t Xiretq_trampback -ffffffff82825457 T doreti_iret -ffffffff82826000 T alltraps -ffffffff82826138 T recall_trap -ffffffff82826150 T alltraps_kern -ffffffff82826153 T alltraps_kern_meltdown -ffffffff82827000 ? Xtrap00 -ffffffff82827000 A __kutext_start -ffffffff82827000 A __text_page_end -ffffffff82827010 ? Xtrap01 -ffffffff82827020 ? Xtrap02 -ffffffff82827028 c calltrap_specstk -ffffffff828270f0 ? calltrap_specstk_tramp -ffffffff82827110 ? Xtrap03 -ffffffff82827120 ? Xtrap04 -ffffffff82827130 ? Xtrap05 -ffffffff82827140 ? Xtrap06 -ffffffff82827150 ? Xtrap07 -ffffffff82827160 ? Xtrap08 -ffffffff82827170 ? Xtrap09 -ffffffff82827180 ? Xtrap0a -ffffffff82827190 ? Xtrap0b -ffffffff828271a0 ? Xtrap0c -ffffffff828271b0 ? Xtrap0d -ffffffff82827240 ? Xtrap0e -ffffffff82827250 ? Xintrspurious -ffffffff82827250 ? Xtrap0f -ffffffff82827260 ? Xtrap10 -ffffffff82827270 ? Xtrap11 -ffffffff82827280 ? Xtrap12 -ffffffff82827290 ? Xtrap13 -ffffffff828272a0 ? Xtrap14 -ffffffff828272b0 ? Xtrap15 -ffffffff828272c0 ? Xtrap16 -ffffffff828272c0 ? Xtrap17 -ffffffff828272c0 ? Xtrap18 -ffffffff828272c0 ? Xtrap19 -ffffffff828272c0 ? Xtrap1a -ffffffff828272c0 ? Xtrap1b -ffffffff828272c0 ? Xtrap1c -ffffffff828272c0 ? Xtrap1d -ffffffff828272c0 ? Xtrap1e -ffffffff828272c0 ? Xtrap1f -ffffffff828272d0 ? x2apic_eoi -ffffffff828272f0 ? Xintr_lapic_ipi -ffffffff82827330 ? Xipi_invltlb -ffffffff82827360 ? Xipi_invlpg -ffffffff82827390 ? Xipi_invlrange -ffffffff828273d0 ? Xipi_invltlb_pcid -ffffffff82827410 ? Xipi_invlpg_pcid -ffffffff82827460 ? Xipi_invlrange_pcid -ffffffff828274d0 ? Xintr_lapic_ltimer -ffffffff82827510 ? Xintr_xen_upcall -ffffffff82827550 ? Xintr_hyperv_upcall -ffffffff82827590 ? Xintr_legacy0 -ffffffff828275d0 ? Xintr_legacy1 -ffffffff82827610 ? Xintr_legacy2 -ffffffff82827650 ? Xintr_legacy3 -ffffffff82827690 ? Xintr_legacy4 -ffffffff828276d0 ? Xintr_legacy5 -ffffffff82827710 ? Xintr_legacy6 -ffffffff82827750 ? Xintr_legacy7 -ffffffff82827790 ? Xintr_legacy8 -ffffffff828277d0 ? Xintr_legacy9 -ffffffff82827810 ? Xintr_legacy10 -ffffffff82827850 ? Xintr_legacy11 -ffffffff82827890 ? Xintr_legacy12 -ffffffff828278d0 ? Xintr_legacy13 -ffffffff82827910 ? Xintr_legacy14 -ffffffff82827950 ? Xintr_legacy15 -ffffffff82827990 ? Xintr_ioapic_edge0 -ffffffff828279d0 ? Xintr_ioapic_edge1 -ffffffff82827a10 ? Xintr_ioapic_edge2 -ffffffff82827a50 ? Xintr_ioapic_edge3 -ffffffff82827a90 ? Xintr_ioapic_edge4 -ffffffff82827ad0 ? Xintr_ioapic_edge5 -ffffffff82827b10 ? Xintr_ioapic_edge6 -ffffffff82827b50 ? Xintr_ioapic_edge7 -ffffffff82827b90 ? Xintr_ioapic_edge8 -ffffffff82827bd0 ? Xintr_ioapic_edge9 -ffffffff82827c10 ? Xintr_ioapic_edge10 -ffffffff82827c50 ? Xintr_ioapic_edge11 -ffffffff82827c90 ? Xintr_ioapic_edge12 -ffffffff82827cd0 ? Xintr_ioapic_edge13 -ffffffff82827d10 ? Xintr_ioapic_edge14 -ffffffff82827d50 ? Xintr_ioapic_edge15 -ffffffff82827d90 ? Xintr_ioapic_edge16 -ffffffff82827dd0 ? Xintr_ioapic_edge17 -ffffffff82827e10 ? Xintr_ioapic_edge18 -ffffffff82827e50 ? Xintr_ioapic_edge19 -ffffffff82827e90 ? Xintr_ioapic_edge20 -ffffffff82827ed0 ? Xintr_ioapic_edge21 -ffffffff82827f10 ? Xintr_ioapic_edge22 -ffffffff82827f50 ? Xintr_ioapic_edge23 -ffffffff82827f90 ? Xintr_ioapic_edge24 -ffffffff82827fd0 ? Xintr_ioapic_edge25 -ffffffff82828010 ? Xintr_ioapic_edge26 -ffffffff82828050 ? Xintr_ioapic_edge27 -ffffffff82828090 ? Xintr_ioapic_edge28 -ffffffff828280d0 ? Xintr_ioapic_edge29 -ffffffff82828110 ? Xintr_ioapic_edge30 -ffffffff82828150 ? Xintr_ioapic_edge31 -ffffffff82828190 ? Xintr_ioapic_edge32 -ffffffff828281d0 ? Xintr_ioapic_edge33 -ffffffff82828210 ? Xintr_ioapic_edge34 -ffffffff82828250 ? Xintr_ioapic_edge35 -ffffffff82828290 ? Xintr_ioapic_edge36 -ffffffff828282d0 ? Xintr_ioapic_edge37 -ffffffff82828310 ? Xintr_ioapic_edge38 -ffffffff82828350 ? Xintr_ioapic_edge39 -ffffffff82828390 ? Xintr_ioapic_edge40 -ffffffff828283d0 ? Xintr_ioapic_edge41 -ffffffff82828410 ? Xintr_ioapic_edge42 -ffffffff82828450 ? Xintr_ioapic_edge43 -ffffffff82828490 ? Xintr_ioapic_edge44 -ffffffff828284d0 ? Xintr_ioapic_edge45 -ffffffff82828510 ? Xintr_ioapic_edge46 -ffffffff82828550 ? Xintr_ioapic_edge47 -ffffffff82828590 ? Xintr_ioapic_edge48 -ffffffff828285d0 ? Xintr_ioapic_edge49 -ffffffff82828610 ? Xintr_ioapic_edge50 -ffffffff82828650 ? Xintr_ioapic_edge51 -ffffffff82828690 ? Xintr_ioapic_edge52 -ffffffff828286d0 ? Xintr_ioapic_edge53 -ffffffff82828710 ? Xintr_ioapic_edge54 -ffffffff82828750 ? Xintr_ioapic_edge55 -ffffffff82828790 ? Xintr_ioapic_edge56 -ffffffff828287d0 ? Xintr_ioapic_edge57 -ffffffff82828810 ? Xintr_ioapic_edge58 -ffffffff82828850 ? Xintr_ioapic_edge59 -ffffffff82828890 ? Xintr_ioapic_edge60 -ffffffff828288d0 ? Xintr_ioapic_edge61 -ffffffff82828910 ? Xintr_ioapic_edge62 -ffffffff82828950 ? Xintr_ioapic_edge63 -ffffffff82828990 ? Xintr_ioapic_level0 -ffffffff828289d0 ? Xintr_ioapic_level1 -ffffffff82828a10 ? Xintr_ioapic_level2 -ffffffff82828a50 ? Xintr_ioapic_level3 -ffffffff82828a90 ? Xintr_ioapic_level4 -ffffffff82828ad0 ? Xintr_ioapic_level5 -ffffffff82828b10 ? Xintr_ioapic_level6 -ffffffff82828b50 ? Xintr_ioapic_level7 -ffffffff82828b90 ? Xintr_ioapic_level8 -ffffffff82828bd0 ? Xintr_ioapic_level9 -ffffffff82828c10 ? Xintr_ioapic_level10 -ffffffff82828c50 ? Xintr_ioapic_level11 -ffffffff82828c90 ? Xintr_ioapic_level12 -ffffffff82828cd0 ? Xintr_ioapic_level13 -ffffffff82828d10 ? Xintr_ioapic_level14 -ffffffff82828d50 ? Xintr_ioapic_level15 -ffffffff82828d90 ? Xintr_ioapic_level16 -ffffffff82828dd0 ? Xintr_ioapic_level17 -ffffffff82828e10 ? Xintr_ioapic_level18 -ffffffff82828e50 ? Xintr_ioapic_level19 -ffffffff82828e90 ? Xintr_ioapic_level20 -ffffffff82828ed0 ? Xintr_ioapic_level21 -ffffffff82828f10 ? Xintr_ioapic_level22 -ffffffff82828f50 ? Xintr_ioapic_level23 -ffffffff82828f90 ? Xintr_ioapic_level24 -ffffffff82828fd0 ? Xintr_ioapic_level25 -ffffffff82829010 ? Xintr_ioapic_level26 -ffffffff82829050 ? Xintr_ioapic_level27 -ffffffff82829090 ? Xintr_ioapic_level28 -ffffffff828290d0 ? Xintr_ioapic_level29 -ffffffff82829110 ? Xintr_ioapic_level30 -ffffffff82829150 ? Xintr_ioapic_level31 -ffffffff82829190 ? Xintr_ioapic_level32 -ffffffff828291d0 ? Xintr_ioapic_level33 -ffffffff82829210 ? Xintr_ioapic_level34 -ffffffff82829250 ? Xintr_ioapic_level35 -ffffffff82829290 ? Xintr_ioapic_level36 -ffffffff828292d0 ? Xintr_ioapic_level37 -ffffffff82829310 ? Xintr_ioapic_level38 -ffffffff82829350 ? Xintr_ioapic_level39 -ffffffff82829390 ? Xintr_ioapic_level40 -ffffffff828293d0 ? Xintr_ioapic_level41 -ffffffff82829410 ? Xintr_ioapic_level42 -ffffffff82829450 ? Xintr_ioapic_level43 -ffffffff82829490 ? Xintr_ioapic_level44 -ffffffff828294d0 ? Xintr_ioapic_level45 -ffffffff82829510 ? Xintr_ioapic_level46 -ffffffff82829550 ? Xintr_ioapic_level47 -ffffffff82829590 ? Xintr_ioapic_level48 -ffffffff828295d0 ? Xintr_ioapic_level49 -ffffffff82829610 ? Xintr_ioapic_level50 -ffffffff82829650 ? Xintr_ioapic_level51 -ffffffff82829690 ? Xintr_ioapic_level52 -ffffffff828296d0 ? Xintr_ioapic_level53 -ffffffff82829710 ? Xintr_ioapic_level54 -ffffffff82829750 ? Xintr_ioapic_level55 -ffffffff82829790 ? Xintr_ioapic_level56 -ffffffff828297d0 ? Xintr_ioapic_level57 -ffffffff82829810 ? Xintr_ioapic_level58 -ffffffff82829850 ? Xintr_ioapic_level59 -ffffffff82829890 ? Xintr_ioapic_level60 -ffffffff828298d0 ? Xintr_ioapic_level61 -ffffffff82829910 ? Xintr_ioapic_level62 -ffffffff82829950 ? Xintr_ioapic_level63 -ffffffff8282a000 ? codepatch_fill_nop -ffffffff8282a000 A __cptext_start -ffffffff8282a000 A __kutext_end -ffffffff8282a0b0 ? codepatch_maprw -ffffffff8282a1c0 ? codepatch_unmaprw -ffffffff8282a230 ? codepatch_nop -ffffffff8282a3b0 ? codepatch_replace -ffffffff8282a580 ? codepatch_call -ffffffff8282a5a0 ? codepatch_control_flow -ffffffff8282a7c0 ? codepatch_jmp -ffffffff8282b000 A __cptext_end -ffffffff8282b000 A __rodata_start -ffffffff8282b000 C _etext -ffffffff8282b000 C etext -ffffffff8282c000 r seeprom_read -ffffffff8282c004 r icl_mg_pll_find_divisors.div1_vals -ffffffff8282c034 r athn_ac2qid -ffffffff8282c034 r athn_ac2qid -ffffffff8282c034 r athn_ac2qid -ffffffff8282c040 r rtwn_get_rssi.cckoff -ffffffff8282c068 r rsu_ac2qid -ffffffff8282c078 r pckbc_portcmd -ffffffff8282c07c r tht_fifo_write_pad.pad -ffffffff8282c084 r rsu_get_rssi.cckoff -ffffffff8282c0a4 r adlp_n_revids -ffffffff8282c0e8 r apple_iso_trans -ffffffff8282c0f0 r wihap_check_tx.txratetable -ffffffff8282c0f4 r dmamode -ffffffff8282c118 r gen9_edram_size_mb.sets -ffffffff8282c12c r dg2_g12_revid_step_tbl -ffffffff8282d000 r isomappings -ffffffff8282d080 r unimappings -ffffffff8282d230 r replacements -ffffffff82830b41 r apollo_pio_rec -ffffffff8287eb40 r apollo_udma33_tim -ffffffff82894304 r pp_r600_decoded_lanes -ffffffff828cb3ca r cmd680_setup_channel.udma_tbl -ffffffff828d38ee r apollo_udma100_tim -ffffffff828d38f4 r cmd0646_9_tim_udma -ffffffff828e226d r substchar -ffffffff82939af4 r apollo_udma133_tim -ffffffff82939afb r apollo_udma66_tim -ffffffff82939b25 r cy_pio_rec -ffffffff8293f3f0 R drm_ca -ffffffff8293f418 R drm_filtops -ffffffff8293f448 R drmread_filtops -ffffffff82940000 r vga_emulops -ffffffff82940048 R vga_stdscreen -ffffffff82940078 R vga_stdscreen_mono -ffffffff829400a8 R vga_stdscreen_bf -ffffffff829400d8 R vga_40lscreen -ffffffff82940108 R vga_40lscreen_mono -ffffffff82940138 R vga_40lscreen_bf -ffffffff82940168 R vga_50lscreen -ffffffff82940198 R vga_50lscreen_mono -ffffffff829401c8 R vga_50lscreen_bf -ffffffff829401f8 R vga_screenlist -ffffffff82940208 R vga_screenlist_mono -ffffffff82940218 R vga_accessops -ffffffff82940278 r i945_wm_info -ffffffff829402b8 r bgansitopc -ffffffff829402c0 r pctoansi -ffffffff82940300 r sdma_offsets -ffffffff82940300 r sdma_offsets -ffffffff82940338 r iha_rate_tbl -ffffffff82940370 r i830_a_wm_info -ffffffff829403a8 r gen9_edram_size_mb.ways -ffffffff82940408 r aggr_periodic_times -ffffffff82940500 r michael_final.pad -ffffffff82940528 r rt_copysa.maskarray -ffffffff82940530 r i915_wm_info -ffffffff82940538 r amdgpu_ih_clientid_jpeg -ffffffff82940538 r amdgpu_ih_clientid_uvds -ffffffff82940538 r amdgpu_ih_clientid_vcns -ffffffff82940538 r amdgpu_ih_clientid_vcns -ffffffff82940538 r amdgpu_ih_clientid_vcns -ffffffff82940568 r jsl_ehl_revids -ffffffff82940578 r vga_setfontset.cmaptabb -ffffffff829405e8 r i830_bc_wm_info -ffffffff82940650 r hsw_activate_psr2.map -ffffffff82940658 r tgl_revids -ffffffff82940690 r __drm_universal_plane_init.default_modifiers -ffffffff829406a0 r iwn_tid2fifo -ffffffff829406b8 r vga_setfontset.cmaptaba -ffffffff829406c0 r crtc_offsets -ffffffff829406c0 r crtc_offsets -ffffffff829406c0 r crtc_offsets -ffffffff82940768 r rtwn_r88e_get_rssi.cckoff -ffffffff82941000 R edid_vendors -ffffffff829412c0 R edid_nvendors -ffffffff829412d0 R edid_products -ffffffff82941330 R edid_nproducts -ffffffff82941340 r _edid_modes -ffffffff82942000 R videomode_list -ffffffff82943080 R videomode_count -ffffffff82944000 r ahc_hard_errors -ffffffff82944080 r critical_sections -ffffffff829440b0 r patches -ffffffff82944d50 r seqprog -ffffffff82946000 r ahc_switch -ffffffff82947000 r termstat_strings -ffffffff82947020 r critical_sections -ffffffff82947060 r seqprog -ffffffff82947d50 r patches -ffffffff82949000 r ahd_switch -ffffffff8294a000 R aic_switch -ffffffff8294b000 R adw_switch -ffffffff8294c000 R gdt_switch -ffffffff8294d000 R twe_switch -ffffffff8294e000 R ciss_switch -ffffffff8294e030 R ciss_level -ffffffff8294e050 R ciss_stat -ffffffff8294f000 R ami_switch -ffffffff8294f028 R ami_raw_switch -ffffffff82950000 R mfi_switch -ffffffff82950028 R mfi_pd_switch -ffffffff82950050 r mfi_iop_xscale -ffffffff82950080 r mfi_iop_ppc -ffffffff829500b0 r mfi_iop_gen2 -ffffffff829500e0 r mfi_iop_skinny -ffffffff82950110 r mfi_bbu_indicators -ffffffff82951000 R qlw_switch -ffffffff82952000 R isp_2100_risc_code -ffffffff82964bf0 R isp_2200_risc_code -ffffffff82977990 R isp_2300_risc_code -ffffffff82991408 R qla_switch -ffffffff82991430 r qla_regs_2100 -ffffffff82991460 r qla_regs_2200 -ffffffff82991490 r qla_regs_23XX -ffffffff82992000 R ahci_atascsi_methods -ffffffff82993000 R nvme_switch -ffffffff82993028 r nvme_ops -ffffffff82994000 R mpi_switch -ffffffff82994060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs -ffffffff82994090 r chv_oa_mux_regs -ffffffff829940b0 r fiji_clock_stretcher_lookup_table -ffffffff829940b0 r tonga_clock_stretcher_lookup_table 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atomctrl_get_voltage_evv_on_sclk +ffffffff824f9470 T atomctrl_get_voltage_evv +ffffffff824f9530 T atomctrl_get_mpll_reference_clock +ffffffff824f95b0 T atomctrl_is_asic_internal_ss_supported +ffffffff824f9610 T atomctrl_get_memory_clock_spread_spectrum +ffffffff824f9720 T atomctrl_get_engine_clock_spread_spectrum +ffffffff824f9830 T atomctrl_read_efuse +ffffffff824f98e0 T atomctrl_set_ac_timing_ai +ffffffff824f9950 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff824f99d0 T atomctrl_get_smc_sclk_range_table +ffffffff824f9a90 T atomctrl_get_vddc_shared_railinfo +ffffffff824f9b10 T atomctrl_get_avfs_information +ffffffff824f9ca0 T atomctrl_get_svi2_info +ffffffff824f9d80 T atomctrl_get_leakage_id_from_efuse +ffffffff824f9df0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff824f9f90 T atomctrl_get_voltage_range +ffffffff824fa060 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff824fa0f0 T atomctrl_get_edc_leakage_table +ffffffff824fb000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff824fb0e0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff824fb2c0 T pp_atomfwctrl_get_pp_assign_pin +ffffffff824fb3c0 T pp_atomfwctrl_enter_self_refresh +ffffffff824fb3f0 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff824fb4a0 T pp_atomfwctrl_get_avfs_information +ffffffff824fb7e0 T pp_atomfwctrl_get_gpio_information +ffffffff824fb890 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff824fb920 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff824fbd10 T pp_atomfwctrl_get_smc_dpm_information +ffffffff824fc000 T encode_pcie_lane_width +ffffffff824fc030 T decode_pcie_lane_width +ffffffff824fd000 t pp_tables_v1_0_initialize +ffffffff824fe590 t pp_tables_v1_0_uninitialize +ffffffff824fe7b0 T get_number_of_powerplay_table_entries_v1_0 +ffffffff824fe870 T get_powerplay_table_entry_v1_0 +ffffffff824ff000 T pp_tables_get_response_times +ffffffff824ff0f0 T pp_tables_get_num_of_entries +ffffffff824ff1c0 T pp_tables_get_entry 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smu7_copy_and_switch_arb_sets +ffffffff825102c0 t smu7_check_dpm_table_updated +ffffffff82510420 t smu7_odn_initial_default_setting +ffffffff82510560 t smu7_set_dpm_event_sources +ffffffff825106b0 t smu7_get_pp_table_entry_callback_func_v0 +ffffffff82510b90 t smu7_get_pp_table_entry_callback_func_v1 +ffffffff825115e0 t smu7_get_gpu_power +ffffffff82512000 T smu7_enable_didt_config +ffffffff82512450 t smu7_program_pt_config_registers +ffffffff82512650 t smu7_enable_didt +ffffffff82512880 T smu7_disable_didt_config +ffffffff82512970 T smu7_enable_smc_cac +ffffffff82512a10 T smu7_disable_smc_cac +ffffffff82512ab0 T smu7_set_power_limit +ffffffff82512b10 T smu7_enable_power_containment +ffffffff82512cc0 T smu7_disable_power_containment +ffffffff82512e20 T smu7_power_control_set_level +ffffffff82513000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff82513080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff82513160 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff82513230 T smu7_fan_ctrl_set_static_mode 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smu8_disable_dpm_tasks +ffffffff825162c0 t smu8_dpm_patch_boot_state +ffffffff82516320 t smu8_dpm_get_pp_table_entry +ffffffff82516380 t smu8_dpm_get_num_of_pp_table_entries +ffffffff825163e0 t smu8_dpm_powerdown_uvd +ffffffff82516430 t smu8_dpm_powergate_vce +ffffffff82516640 t smu8_dpm_powergate_uvd +ffffffff82516890 t smu8_dpm_powergate_acp +ffffffff825168f0 t smu8_dpm_get_mclk +ffffffff82516920 t smu8_dpm_get_sclk +ffffffff82516990 t smu8_set_power_state_tasks +ffffffff82516cc0 t smu8_set_cpu_power_state +ffffffff82516d40 t smu8_store_cc6_data +ffffffff82516dc0 t smu8_get_dal_power_level +ffffffff82516e40 t smu8_get_performance_level +ffffffff82516f40 t smu8_get_current_shallow_sleep_clocks +ffffffff82516fa0 t smu8_get_clock_by_type +ffffffff825170e0 t smu8_get_max_high_clocks +ffffffff825171b0 t smu8_power_off_asic +ffffffff82517240 t smu8_force_clock_level +ffffffff825172c0 t smu8_print_clock_levels +ffffffff825174d0 t smu8_read_sensor +ffffffff82517810 t smu8_notify_cac_buffer_info +ffffffff825178f0 t smu8_get_thermal_temperature_range +ffffffff82517970 t smu8_dpm_get_pp_table_entry_callback +ffffffff82518000 T smu9_baco_get_capability +ffffffff82518100 T smu9_baco_get_state +ffffffff82519000 T convert_to_vid +ffffffff82519050 T convert_to_vddc +ffffffff82519090 T phm_copy_clock_limits_array +ffffffff82519170 T phm_copy_overdrive_settings_limits_array +ffffffff82519250 T phm_set_field_to_u32 +ffffffff825192b0 T phm_wait_on_register +ffffffff825193c0 T phm_wait_on_indirect_register +ffffffff82519500 T phm_wait_for_register_unequal +ffffffff825195f0 T phm_wait_for_indirect_register_unequal +ffffffff82519710 T phm_cf_want_uvd_power_gating +ffffffff82519750 T phm_cf_want_vce_power_gating +ffffffff82519790 T phm_trim_voltage_table +ffffffff825198d0 T phm_get_svi2_mvdd_voltage_table +ffffffff82519a80 T phm_get_svi2_vddci_voltage_table +ffffffff82519c30 T phm_get_svi2_vdd_voltage_table +ffffffff82519ce0 T phm_trim_voltage_table_to_fit_state_table +ffffffff82519dd0 T phm_reset_single_dpm_table +ffffffff82519e30 T phm_setup_pcie_table_entry +ffffffff82519e70 T phm_get_dpm_level_enable_mask_value +ffffffff82519f50 T phm_get_voltage_index +ffffffff82519fd0 T phm_get_voltage_id +ffffffff8251a050 T phm_find_closest_vddci +ffffffff8251a0c0 T phm_find_boot_level +ffffffff8251a130 T phm_get_sclk_for_voltage_evv +ffffffff8251a1f0 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff8251a310 T phm_get_lowest_enabled_level +ffffffff8251a350 T phm_apply_dal_min_voltage_request +ffffffff8251a420 T phm_get_voltage_evv_on_sclk +ffffffff8251a4e0 T phm_irq_process +ffffffff8251a6b0 T smu9_register_irq_handlers +ffffffff8251a780 T smu_atom_get_data_table +ffffffff8251a7f0 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff8251a900 T smu_set_watermarks_for_clocks_ranges +ffffffff8251b000 T tonga_baco_set_state +ffffffff8251c000 T vega10_baco_set_state +ffffffff8251d000 T vega10_enable_disable_vce_dpm +ffffffff8251d0a0 T vega10_hwmgr_init +ffffffff8251d100 t vega10_hwmgr_backend_init +ffffffff8251df70 t vega10_hwmgr_backend_fini +ffffffff8251e000 t vega10_setup_asic_task +ffffffff8251e150 t vega10_get_power_state_size +ffffffff8251e180 t vega10_apply_state_adjust_rules +ffffffff8251e4e0 t vega10_dpm_force_dpm_level +ffffffff8251e9a0 t vega10_enable_dpm_tasks +ffffffff82521af0 t vega10_disable_dpm_tasks +ffffffff825221b0 t vega10_patch_boot_state +ffffffff825221e0 t vega10_get_pp_table_entry +ffffffff82522260 t vega10_power_gate_vce +ffffffff82522310 t vega10_power_gate_uvd +ffffffff825223c0 t vega10_dpm_get_mclk +ffffffff82522470 t vega10_dpm_get_sclk +ffffffff82522520 t vega10_set_power_state_tasks +ffffffff82522f10 t vega10_notify_smc_display_config_after_ps_adjustment +ffffffff825230d0 t vega10_display_configuration_changed_task +ffffffff825231b0 t vega10_set_fan_control_mode +ffffffff82523220 t vega10_get_fan_control_mode +ffffffff82523260 t vega10_check_smc_update_required_for_display_configuration +ffffffff825232c0 t vega10_check_states_equal +ffffffff82523420 t vega10_get_dal_power_level +ffffffff82523460 t vega10_get_performance_level +ffffffff825234f0 t vega10_get_clock_by_type_with_latency +ffffffff825236e0 t vega10_get_clock_by_type_with_voltage +ffffffff825237c0 t vega10_set_watermarks_for_clocks_ranges +ffffffff82523830 t vega10_display_clock_voltage_request +ffffffff825238b0 t vega10_power_off_asic +ffffffff82523930 t vega10_force_clock_level +ffffffff82523aa0 t vega10_emit_clock_levels +ffffffff82523c50 t vega10_print_clock_levels +ffffffff825244c0 t vega10_get_sclk_od +ffffffff82524530 t vega10_set_sclk_od +ffffffff82524630 t vega10_get_mclk_od +ffffffff825246a0 t vega10_set_mclk_od +ffffffff825247a0 t vega10_read_sensor +ffffffff82524a50 t vega10_avfs_enable +ffffffff82524b40 t vega10_notify_cac_buffer_info +ffffffff82524c20 t vega10_get_thermal_temperature_range +ffffffff82524d40 t vega10_get_power_profile_mode +ffffffff82524d80 t vega10_set_power_profile_mode +ffffffff82524eb0 t vega10_odn_edit_dpm_table +ffffffff82525440 t vega10_get_ppfeature_status +ffffffff825254d0 t vega10_set_ppfeature_status +ffffffff82525590 t vega10_set_mp1_state +ffffffff82525620 t vega10_disable_power_features_for_compute_performance +ffffffff82525820 t vega10_upload_dpm_bootup_level +ffffffff82525950 t vega10_upload_dpm_max_level +ffffffff82525a50 t vega10_odn_initial_default_setting +ffffffff82525c50 t vega10_populate_all_graphic_levels +ffffffff82525e90 t vega10_populate_all_memory_levels +ffffffff82526010 t vega10_populate_single_gfx_level +ffffffff82526170 t vega10_populate_single_soc_level +ffffffff825262c0 t vega10_populate_single_memory_level +ffffffff82526450 t vega10_get_pp_table_entry_callback_func +ffffffff825266a0 t vega10_odn_update_power_state +ffffffff82527000 T vega10_enable_didt_config +ffffffff82528df0 T vega10_disable_didt_config +ffffffff82529100 T vega10_initialize_power_tune_defaults +ffffffff82529240 T vega10_set_power_limit +ffffffff825292a0 T vega10_enable_power_containment +ffffffff825293e0 T vega10_disable_power_containment +ffffffff825294d0 T vega10_power_control_set_level +ffffffff82529540 t vega10_didt_set_mask +ffffffff8252a000 t vega10_pp_tables_initialize +ffffffff8252b7a0 t vega10_pp_tables_uninitialize +ffffffff8252b9c0 T vega10_get_number_of_powerplay_table_entries +ffffffff8252ba80 T vega10_get_powerplay_table_entry +ffffffff8252bc20 T vega10_baco_set_cap +ffffffff8252c000 T vega10_fan_ctrl_get_fan_speed_info +ffffffff8252c080 T vega10_fan_ctrl_get_fan_speed_pwm +ffffffff8252c1d0 T vega10_fan_ctrl_get_fan_speed_rpm +ffffffff8252c2f0 T vega10_fan_ctrl_set_static_mode +ffffffff8252c610 T vega10_fan_ctrl_set_default_mode +ffffffff8252c880 T vega10_fan_ctrl_start_smc_fan_control +ffffffff8252c960 T vega10_fan_ctrl_stop_smc_fan_control +ffffffff8252ca40 T vega10_fan_ctrl_set_fan_speed_pwm +ffffffff8252ccb0 T vega10_fan_ctrl_reset_fan_speed_to_default +ffffffff8252cd90 T vega10_fan_ctrl_set_fan_speed_rpm +ffffffff8252cfb0 T vega10_thermal_get_temperature +ffffffff8252d050 T vega10_thermal_disable_alert +ffffffff8252d170 T vega10_thermal_stop_thermal_controller +ffffffff8252d1d0 T vega10_enable_mgpu_fan_boost +ffffffff8252d310 T vega10_start_thermal_controller +ffffffff8252d970 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff8252e000 T vega12_baco_set_state +ffffffff8252f000 T vega12_enable_disable_vce_dpm +ffffffff8252f0a0 T vega12_hwmgr_init +ffffffff8252f0e0 t vega12_hwmgr_backend_init +ffffffff8252f930 t vega12_hwmgr_backend_fini +ffffffff8252f990 t vega12_setup_asic_task +ffffffff8252f9d0 t vega12_apply_clocks_adjust_rules +ffffffff8252fd90 t vega12_dpm_force_dpm_level +ffffffff82530250 t vega12_enable_dpm_tasks +ffffffff82530ed0 t vega12_disable_dpm_tasks +ffffffff82530ff0 t vega12_patch_boot_state +ffffffff82531020 t vega12_power_gate_vce +ffffffff825310d0 t vega12_power_gate_uvd +ffffffff82531180 t vega12_dpm_get_mclk +ffffffff825311d0 t vega12_dpm_get_sclk +ffffffff82531220 t vega12_notify_smc_display_config_after_ps_adjustment +ffffffff825313a0 t vega12_pre_display_configuration_changed_task +ffffffff82531490 t vega12_display_configuration_changed_task +ffffffff82531590 t vega12_set_fan_control_mode +ffffffff825315f0 t vega12_get_fan_control_mode +ffffffff82531630 t vega12_check_smc_update_required_for_display_configuration +ffffffff82531690 t vega12_get_dal_power_level +ffffffff825316c0 t vega12_get_performance_level +ffffffff825316f0 t vega12_get_clock_by_type_with_latency +ffffffff825319d0 t vega12_get_clock_by_type_with_voltage +ffffffff82531a00 t vega12_set_watermarks_for_clocks_ranges +ffffffff82531a80 t vega12_display_clock_voltage_request +ffffffff82531b00 t vega12_power_off_asic +ffffffff82531b80 t vega12_force_clock_level +ffffffff82531e40 t vega12_print_clock_levels +ffffffff82532650 t vega12_gfx_off_control +ffffffff825326a0 t vega12_read_sensor +ffffffff82532ad0 t vega12_notify_cac_buffer_info +ffffffff82532bb0 t vega12_get_thermal_temperature_range +ffffffff82532cb0 t vega12_get_ppfeature_status +ffffffff82532d40 t vega12_set_ppfeature_status +ffffffff82532e00 t vega12_set_mp1_state +ffffffff82532e90 t vega12_get_gpu_metrics +ffffffff82533170 t vega12_upload_dpm_min_level +ffffffff82533400 t vega12_upload_dpm_max_level +ffffffff82533600 t vega12_populate_umdpstate_clocks +ffffffff825336a0 t vega12_setup_single_dpm_table +ffffffff82534000 t vega12_pp_tables_initialize +ffffffff825346a0 t vega12_pp_tables_uninitialize +ffffffff82535000 T vega12_fan_ctrl_get_fan_speed_info +ffffffff82535050 T vega12_fan_ctrl_get_fan_speed_rpm +ffffffff825350d0 T vega12_fan_ctrl_start_smc_fan_control +ffffffff82535100 T vega12_fan_ctrl_stop_smc_fan_control +ffffffff82535130 T vega12_fan_ctrl_reset_fan_speed_to_default +ffffffff82535160 T vega12_thermal_get_temperature +ffffffff82535200 T vega12_thermal_disable_alert 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vega20_display_configuration_changed_task +ffffffff825396e0 t vega20_set_fan_control_mode +ffffffff82539750 t vega20_get_fan_control_mode +ffffffff82539790 t vega20_check_smc_update_required_for_display_configuration +ffffffff825397f0 t vega20_get_dal_power_level +ffffffff82539820 t vega20_get_performance_level +ffffffff82539850 t vega20_get_clock_by_type_with_latency +ffffffff82539bb0 t vega20_get_clock_by_type_with_voltage +ffffffff82539be0 t vega20_set_watermarks_for_clocks_ranges +ffffffff82539c60 t vega20_display_clock_voltage_request +ffffffff82539ce0 t vega20_power_off_asic +ffffffff82539d60 t vega20_force_clock_level +ffffffff8253a470 t vega20_print_clock_levels +ffffffff8253b510 t vega20_get_sclk_od +ffffffff8253b580 t vega20_set_sclk_od +ffffffff8253b750 t vega20_get_mclk_od +ffffffff8253b7c0 t vega20_set_mclk_od +ffffffff8253b980 t vega20_read_sensor +ffffffff8253bf00 t vega20_notify_cac_buffer_info +ffffffff8253bfe0 t vega20_get_thermal_temperature_range +ffffffff8253c0e0 t vega20_get_power_profile_mode +ffffffff8253c270 t vega20_set_power_profile_mode +ffffffff8253c650 t vega20_odn_edit_dpm_table +ffffffff8253cb20 t vega20_enable_mgpu_fan_boost +ffffffff8253cb90 t vega20_get_ppfeature_status +ffffffff8253cc20 t vega20_set_ppfeature_status +ffffffff8253cd40 t vega20_set_mp1_state +ffffffff8253cde0 t vega20_smu_i2c_bus_access +ffffffff8253ce80 t vega20_set_df_cstate +ffffffff8253cf00 t vega20_set_xgmi_pstate +ffffffff8253cf70 t vega20_get_gpu_metrics +ffffffff8253d260 t vega20_upload_dpm_min_level +ffffffff8253d520 t vega20_upload_dpm_max_level +ffffffff8253d790 t vega20_enable_all_smu_features +ffffffff8253d8a0 t vega20_override_pcie_parameters +ffffffff8253db40 t vega20_setup_default_dpm_tables +ffffffff8253e0f0 t vega20_init_max_sustainable_clocks +ffffffff8253e530 t vega20_od8_initialize_default_settings +ffffffff8253ec20 t vega20_populate_umdpstate_clocks +ffffffff8253ecc0 t vega20_setup_single_dpm_table +ffffffff8253ee00 t vega20_setup_memclk_dpm_table +ffffffff8253eeb0 t vega20_get_max_sustainable_clock +ffffffff8253f000 T vega20_set_power_limit +ffffffff8253f050 T vega20_validate_power_level_request +ffffffff8253f090 T vega20_power_control_set_level +ffffffff82540000 t vega20_pp_tables_initialize +ffffffff825407b0 t vega20_pp_tables_uninitialize +ffffffff82541000 T vega20_fan_ctrl_stop_smc_fan_control +ffffffff825410a0 T vega20_fan_ctrl_start_smc_fan_control +ffffffff82541140 T vega20_fan_ctrl_get_fan_speed_pwm +ffffffff82541290 T vega20_fan_ctrl_set_fan_speed_pwm +ffffffff825414d0 t vega20_fan_ctrl_set_static_mode +ffffffff825416d0 T vega20_fan_ctrl_get_fan_speed_info +ffffffff82541710 T vega20_fan_ctrl_get_fan_speed_rpm +ffffffff82541780 T vega20_fan_ctrl_set_fan_speed_rpm +ffffffff82541960 T vega20_thermal_get_temperature +ffffffff82541a00 T vega20_thermal_disable_alert +ffffffff82541a90 T vega20_thermal_stop_thermal_controller +ffffffff82541b20 T vega20_start_thermal_controller +ffffffff82542000 t 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T smu_send_hbm_bad_channel_flag +ffffffff8256f560 t smu_set_fan_control_mode +ffffffff8256f620 t smu_get_fan_control_mode +ffffffff8256f6a0 t smu_set_fan_speed_pwm +ffffffff8256f760 t smu_get_fan_speed_pwm +ffffffff8256f7c0 t smu_force_ppclk_levels +ffffffff8256f890 t smu_print_ppclk_levels +ffffffff8256f900 t smu_emit_ppclk_levels +ffffffff8256f970 t smu_force_performance_level +ffffffff8256fc30 t smu_read_sensor +ffffffff8256fe90 t smu_get_apu_thermal_limit +ffffffff8256fee0 t smu_set_apu_thermal_limit +ffffffff8256ff30 t smu_get_performance_level +ffffffff8256ffa0 t smu_get_current_power_state +ffffffff82570000 t smu_get_fan_speed_rpm +ffffffff82570060 t smu_set_fan_speed_rpm +ffffffff82570120 t smu_get_power_num_states +ffffffff825701a0 t smu_sys_get_pp_table +ffffffff82570210 t smu_sys_set_pp_table +ffffffff82570450 t smu_switch_power_profile +ffffffff82570580 t smu_handle_dpm_task +ffffffff82570640 t smu_load_microcode +ffffffff82570740 t smu_dpm_set_power_gate +ffffffff82570b00 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arcturus_get_allowed_feature_mask +ffffffff82574170 t arcturus_set_default_dpm_table +ffffffff825743d0 t arcturus_populate_umd_state_clk +ffffffff82574490 t arcturus_print_clk_levels +ffffffff82574740 t arcturus_force_clk_levels +ffffffff825749f0 t arcturus_get_power_profile_mode +ffffffff82574d20 t arcturus_set_power_profile_mode +ffffffff82575060 t arcturus_dpm_set_vcn_enable +ffffffff82575150 t arcturus_read_sensor +ffffffff82575380 t arcturus_is_dpm_running +ffffffff825753d0 t arcturus_get_fan_speed_pwm +ffffffff82575530 t arcturus_get_fan_speed_rpm +ffffffff82575650 t arcturus_get_thermal_temperature_range +ffffffff82575740 t arcturus_set_performance_level +ffffffff82575880 t arcturus_dump_pptable +ffffffff825758b0 t arcturus_get_power_limit +ffffffff825759d0 t arcturus_set_df_cstate +ffffffff82575b10 t arcturus_allow_xgmi_power_down +ffffffff82575c30 t arcturus_i2c_control_init +ffffffff82575d80 t arcturus_i2c_control_fini +ffffffff82575dc0 t arcturus_get_unique_id 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cyan_skillfish_get_dpm_ultimate_freq +ffffffff82578990 t cyan_skillfish_get_gpu_metrics +ffffffff82578c40 t cyan_skillfish_get_smu_metrics_data +ffffffff82579000 T navi10_set_ppt_funcs +ffffffff82579050 t navi10_run_btc +ffffffff825790e0 t navi10_get_allowed_feature_mask +ffffffff825793d0 t navi10_set_default_dpm_table +ffffffff825798f0 t navi10_populate_umd_state_clk +ffffffff82579ab0 t navi10_print_clk_levels +ffffffff82579c90 t navi10_emit_clk_levels +ffffffff82579f00 t navi10_force_clk_levels +ffffffff8257a060 t navi10_od_edit_dpm_table +ffffffff8257a6a0 t navi10_get_clock_by_type_with_latency +ffffffff8257a7b0 t navi10_get_power_profile_mode +ffffffff8257aa90 t navi10_set_power_profile_mode +ffffffff8257ad90 t navi10_dpm_set_vcn_enable +ffffffff8257ae30 t navi10_dpm_set_jpeg_enable +ffffffff8257aec0 t navi10_read_sensor +ffffffff8257b070 t navi10_pre_display_config_changed +ffffffff8257b130 t navi10_display_config_changed +ffffffff8257b1d0 t navi10_notify_smc_display_config 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navi1x_get_smu_metrics_data +ffffffff8257dc30 t navi10_od_setting_check_range +ffffffff8257dcf0 t navi10_i2c_xfer +ffffffff8257dfb0 t navi10_i2c_func +ffffffff8257dfe0 t navi10_umc_hybrid_cdr_workaround +ffffffff8257f000 T sienna_cichlid_set_ppt_funcs +ffffffff8257f050 t sienna_cichlid_run_btc +ffffffff8257f0e0 t sienna_cichlid_get_allowed_feature_mask +ffffffff8257f370 t sienna_cichlid_set_default_dpm_table +ffffffff8257fa00 t sienna_cichlid_populate_umd_state_clk +ffffffff8257fac0 t sienna_cichlid_print_clk_levels +ffffffff8257fce0 t sienna_cichlid_force_clk_levels +ffffffff8257fe50 t sienna_cichlid_od_edit_dpm_table +ffffffff82580450 t sienna_cichlid_restore_user_od_settings +ffffffff825804e0 t sienna_cichlid_get_power_profile_mode +ffffffff825807c0 t sienna_cichlid_set_power_profile_mode +ffffffff82580ac0 t sienna_cichlid_dpm_set_vcn_enable +ffffffff82580b90 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff82580c20 t sienna_cichlid_read_sensor +ffffffff82581490 t sienna_cichlid_pre_display_config_changed +ffffffff825814c0 t sienna_cichlid_display_config_changed +ffffffff82581520 t sienna_cichlid_notify_smc_display_config +ffffffff825816f0 t sienna_cichlid_is_dpm_running +ffffffff82581750 t sienna_cichlid_get_fan_speed_rpm +ffffffff82581860 t sienna_cichlid_set_watermarks_table +ffffffff82581a00 t sienna_cichlid_get_thermal_temperature_range +ffffffff82581ae0 t sienna_cichlid_get_uclk_dpm_states +ffffffff82581bf0 t sienna_cichlid_set_default_od_settings +ffffffff82581dc0 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff82581e50 t sienna_cichlid_dump_pptable +ffffffff82581e80 t sienna_cichlid_get_power_limit +ffffffff82581f50 t sienna_cichlid_update_pcie_parameters +ffffffff82582080 t sienna_cichlid_i2c_control_init +ffffffff825821d0 t sienna_cichlid_i2c_control_fini +ffffffff82582210 t sienna_cichlid_get_unique_id +ffffffff82582380 t sienna_cichlid_init_smc_tables +ffffffff825826f0 t sienna_cichlid_set_mp1_state +ffffffff82582730 t sienna_cichlid_setup_pptable +ffffffff82582ba0 t sienna_cichlid_system_features_control +ffffffff82582c40 t sienna_cichlid_baco_enter +ffffffff82582c90 t sienna_cichlid_baco_exit +ffffffff82582df0 t sienna_cichlid_is_mode1_reset_supported +ffffffff82582e80 t sienna_cichlid_is_mode2_reset_supported +ffffffff82582eb0 t sienna_cichlid_mode2_reset +ffffffff82583050 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff82583070 t sienna_cichlid_get_gpu_metrics +ffffffff82583630 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff82583680 t sienna_cichlid_get_fan_parameters +ffffffff825836c0 t sienna_cichlid_gpo_control +ffffffff82583790 t sienna_cichlid_get_ecc_info +ffffffff82583890 t sienna_cichlid_stb_get_data_direct +ffffffff82583950 t sienna_cichlid_get_default_config_table_settings +ffffffff825839c0 t sienna_cichlid_set_config_table +ffffffff82583a90 t sienna_cichlid_get_throttler_status_locked +ffffffff82583bf0 t sienna_cichlid_get_smartshift_power_percentage +ffffffff82583d20 t sienna_cichlid_i2c_xfer +ffffffff82583fe0 t sienna_cichlid_i2c_func +ffffffff82585000 T smu_v11_0_init_microcode +ffffffff82585170 T smu_v11_0_fini_microcode +ffffffff825851d0 T smu_v11_0_load_microcode +ffffffff82585330 T smu_v11_0_check_fw_status +ffffffff82585390 T smu_v11_0_check_fw_version +ffffffff82585520 T smu_v11_0_setup_pptable +ffffffff82585640 T smu_v11_0_init_smc_tables +ffffffff825857d0 T smu_v11_0_fini_smc_tables +ffffffff82585a90 T smu_v11_0_init_power +ffffffff82585b20 T smu_v11_0_fini_power +ffffffff82585b90 T smu_v11_0_get_vbios_bootup_values +ffffffff82585f40 T smu_v11_0_notify_memory_pool_location +ffffffff82586060 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff825860f0 T smu_v11_0_set_driver_table_location +ffffffff82586170 T smu_v11_0_set_tool_table_location +ffffffff825861f0 T smu_v11_0_init_display_count +ffffffff82586250 T smu_v11_0_set_allowed_mask +ffffffff82586330 T smu_v11_0_system_features_control +ffffffff82586350 T smu_v11_0_notify_display_change +ffffffff825863c0 T smu_v11_0_init_max_sustainable_clocks +ffffffff82586690 t smu_v11_0_get_max_sustainable_clock +ffffffff82586800 T smu_v11_0_get_current_power_limit +ffffffff82586900 T smu_v11_0_set_power_limit +ffffffff82586a70 T smu_v11_0_interrupt_work +ffffffff82586b00 T smu_v11_0_enable_thermal_alert +ffffffff82586bb0 T smu_v11_0_disable_thermal_alert +ffffffff82586bd0 T smu_v11_0_get_gfx_vdd +ffffffff82586c90 T smu_v11_0_display_clock_voltage_request +ffffffff82586e00 T smu_v11_0_set_hard_freq_limited_range +ffffffff82586f00 T smu_v11_0_gfx_off_control +ffffffff82586f70 T smu_v11_0_get_fan_control_mode +ffffffff82586fd0 T smu_v11_0_set_fan_speed_pwm +ffffffff825871b0 t smu_v11_0_set_fan_static_mode +ffffffff825873b0 T smu_v11_0_set_fan_speed_rpm +ffffffff82587500 T smu_v11_0_get_fan_speed_pwm +ffffffff82587660 T smu_v11_0_get_fan_speed_rpm +ffffffff82587770 T smu_v11_0_set_fan_control_mode +ffffffff82587960 T smu_v11_0_set_xgmi_pstate +ffffffff82587980 T smu_v11_0_register_irq_handler +ffffffff82587a50 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff82587ae0 T smu_v11_0_set_azalia_d3_pme +ffffffff82587b00 T smu_v11_0_baco_set_armd3_sequence +ffffffff82587b20 T smu_v11_0_baco_is_support +ffffffff82587bc0 T smu_v11_0_baco_get_state +ffffffff82587bf0 T smu_v11_0_baco_set_state +ffffffff82587f10 T smu_v11_0_baco_enter +ffffffff82588060 T smu_v11_0_baco_exit +ffffffff825881e0 T smu_v11_0_mode1_reset +ffffffff82588260 T smu_v11_0_handle_passthrough_sbr +ffffffff82588280 T smu_v11_0_get_dpm_ultimate_freq +ffffffff825883e0 T smu_v11_0_set_soft_freq_limited_range +ffffffff825884d0 T smu_v11_0_set_performance_level +ffffffff825888b0 T smu_v11_0_set_power_source +ffffffff82588920 T smu_v11_0_get_dpm_freq_by_index +ffffffff825889e0 T smu_v11_0_get_dpm_level_count +ffffffff82588a90 T smu_v11_0_set_single_dpm_table +ffffffff82588d70 T smu_v11_0_get_dpm_level_range +ffffffff82588f30 T smu_v11_0_get_current_pcie_link_width_level +ffffffff82588f90 T smu_v11_0_get_current_pcie_link_width +ffffffff82589000 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff82589060 T smu_v11_0_get_current_pcie_link_speed +ffffffff825890c0 T smu_v11_0_gfx_ulv_control +ffffffff82589140 T smu_v11_0_deep_sleep_control +ffffffff82589350 T smu_v11_0_restore_user_od_settings +ffffffff825893e0 T smu_v11_0_set_smu_mailbox_registers +ffffffff82589450 t smu_v11_0_set_irq_state +ffffffff82589aa0 t smu_v11_0_irq_process +ffffffff8258a000 T vangogh_set_ppt_funcs +ffffffff8258a040 t vangogh_set_default_dpm_tables +ffffffff8258a070 t vangogh_common_print_clk_levels +ffffffff8258a530 t vangogh_force_clk_levels +ffffffff8258a7b0 t vangogh_od_edit_dpm_table +ffffffff8258ad70 t vangogh_get_power_profile_mode +ffffffff8258aed0 t vangogh_set_power_profile_mode +ffffffff8258b020 t vangogh_dpm_set_vcn_enable +ffffffff8258b080 t vangogh_dpm_set_jpeg_enable +ffffffff8258b0e0 t vangogh_read_sensor +ffffffff8258b7f0 t vangogh_get_apu_thermal_limit +ffffffff8258b810 t vangogh_set_apu_thermal_limit +ffffffff8258b830 t vangogh_is_dpm_running +ffffffff8258b8a0 t vangogh_set_watermarks_table +ffffffff8258ba30 t vangogh_set_performance_level +ffffffff8258c3f0 t vangogh_get_power_limit +ffffffff8258c570 t vangogh_get_ppt_limit +ffffffff8258c5e0 t vangogh_get_dpm_clock_table +ffffffff8258c750 t vangogh_init_smc_tables +ffffffff8258c9d0 t vangogh_system_features_control +ffffffff8258ca20 t vangogh_set_power_limit +ffffffff8258cbb0 t vangogh_get_gfxoff_status +ffffffff8258cc40 t vangogh_get_gfxoff_entrycount +ffffffff8258ccc0 t vangogh_set_gfxoff_residency +ffffffff8258cd40 t vangogh_get_gfxoff_residency +ffffffff8258cd80 t vangogh_mode2_reset +ffffffff8258cf40 t vangogh_common_get_gpu_metrics +ffffffff8258d760 t vangogh_post_smu_init +ffffffff8258d920 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff8258d990 t vangogh_force_dpm_limit_value +ffffffff8258db10 t vangogh_get_dpm_ultimate_freq +ffffffff8258ded0 t vangogh_set_soft_freq_limited_range +ffffffff8258e090 t vangogh_get_gpu_metrics_v2_3 +ffffffff8258f000 T renoir_set_ppt_funcs +ffffffff8258f0a0 t renoir_get_current_power_state +ffffffff8258f120 t renoir_print_clk_levels +ffffffff8258f570 t renoir_force_clk_levels +ffffffff8258f7d0 t renoir_od_edit_dpm_table +ffffffff8258fb10 t renoir_get_power_profile_mode +ffffffff8258fc20 t renoir_set_power_profile_mode +ffffffff8258fd70 t renoir_dpm_set_vcn_enable +ffffffff8258fe10 t renoir_dpm_set_jpeg_enable +ffffffff8258fea0 t renoir_read_sensor +ffffffff825902a0 t renoir_is_dpm_running +ffffffff825902e0 t renoir_set_watermarks_table +ffffffff825904a0 t renoir_set_performance_level +ffffffff82590ae0 t renoir_get_dpm_clock_table +ffffffff82590e30 t renoir_init_smc_tables +ffffffff82590fd0 t renoir_get_enabled_mask +ffffffff82591010 t renoir_get_dpm_ultimate_freq +ffffffff825912e0 t renoir_get_gpu_metrics +ffffffff82591520 t renoir_gfx_state_change_set +ffffffff82591550 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff82591600 t renoir_force_dpm_limit_value +ffffffff82592000 T smu_v12_0_check_fw_status +ffffffff82592060 T smu_v12_0_check_fw_version +ffffffff825920e0 T smu_v12_0_powergate_sdma +ffffffff82592130 T smu_v12_0_set_gfx_cgpg +ffffffff82592190 T smu_v12_0_get_gfxoff_status +ffffffff82592220 T smu_v12_0_gfx_off_control +ffffffff82592350 T smu_v12_0_fini_smc_tables +ffffffff82592420 T smu_v12_0_set_default_dpm_tables +ffffffff82592450 T smu_v12_0_mode2_reset +ffffffff82592470 T smu_v12_0_set_soft_freq_limited_range +ffffffff825925f0 T smu_v12_0_set_driver_table_location +ffffffff82592670 T smu_v12_0_get_vbios_bootup_values +ffffffff82593000 T aldebaran_set_ppt_funcs +ffffffff82593050 t aldebaran_get_allowed_feature_mask +ffffffff825930b0 t aldebaran_set_default_dpm_table +ffffffff825932f0 t aldebaran_populate_umd_state_clk +ffffffff825933f0 t aldebaran_print_clk_levels +ffffffff825935f0 t aldebaran_force_clk_levels +ffffffff82593800 t aldebaran_usr_edit_dpm_table +ffffffff82593a40 t aldebaran_read_sensor +ffffffff82593cc0 t aldebaran_is_dpm_running +ffffffff82593d20 t aldebaran_get_thermal_temperature_range +ffffffff82593df0 t aldebaran_set_performance_level +ffffffff82593ea0 t aldebaran_get_power_limit +ffffffff82594060 t aldebaran_set_df_cstate +ffffffff825940f0 t aldebaran_allow_xgmi_power_down +ffffffff825941a0 t aldebaran_i2c_control_init +ffffffff82594270 t aldebaran_i2c_control_fini +ffffffff825942b0 t aldebaran_get_unique_id +ffffffff825943a0 t aldebaran_init_smc_tables +ffffffff82594590 t aldebaran_set_mp1_state +ffffffff825945d0 t aldebaran_setup_pptable +ffffffff825946c0 t aldebaran_system_features_control +ffffffff82594850 t aldebaran_set_power_limit +ffffffff825948e0 t aldebaran_is_baco_supported +ffffffff82594910 t aldebaran_is_mode1_reset_supported +ffffffff82594940 t aldebaran_is_mode2_reset_supported +ffffffff82594970 t aldebaran_mode1_reset +ffffffff82594a70 t aldebaran_mode2_reset +ffffffff82594eb0 t aldebaran_set_soft_freq_limited_range +ffffffff825950f0 t aldebaran_log_thermal_throttling_event +ffffffff82595450 t aldebaran_get_gpu_metrics +ffffffff82595720 t aldebaran_smu_handle_passthrough_sbr +ffffffff82595740 t aldebaran_smu_send_hbm_bad_page_num +ffffffff825957d0 t aldebaran_get_ecc_info +ffffffff82595940 t aldebaran_send_hbm_bad_channel_flag +ffffffff82595a30 t aldebaran_get_current_clk_freq_by_table +ffffffff82595ba0 t aldebaran_get_smu_metrics_data +ffffffff82595e20 t aldebaran_upload_dpm_level +ffffffff82595f40 t aldebaran_i2c_xfer +ffffffff82596200 t aldebaran_i2c_func +ffffffff82597000 T smu_v13_0_init_microcode +ffffffff82597150 T smu_v13_0_fini_microcode +ffffffff825971b0 T smu_v13_0_load_microcode +ffffffff825971e0 T smu_v13_0_init_pptable_microcode +ffffffff82597390 T smu_v13_0_get_pptable_from_firmware +ffffffff825974c0 T smu_v13_0_check_fw_status +ffffffff82597540 T smu_v13_0_check_fw_version +ffffffff825975d0 T smu_v13_0_setup_pptable +ffffffff82597770 T smu_v13_0_init_smc_tables +ffffffff82597940 T smu_v13_0_fini_smc_tables +ffffffff82597be0 T smu_v13_0_init_power +ffffffff82597c70 T smu_v13_0_fini_power +ffffffff82597d00 T smu_v13_0_get_vbios_bootup_values +ffffffff82597fd0 T smu_v13_0_notify_memory_pool_location +ffffffff825980a0 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff82598130 T smu_v13_0_set_driver_table_location +ffffffff825981b0 T smu_v13_0_set_tool_table_location +ffffffff82598230 T smu_v13_0_init_display_count +ffffffff82598270 T smu_v13_0_set_allowed_mask +ffffffff82598350 T smu_v13_0_gfx_off_control +ffffffff825983d0 T smu_v13_0_system_features_control +ffffffff825983f0 T smu_v13_0_notify_display_change +ffffffff82598460 T smu_v13_0_init_max_sustainable_clocks +ffffffff82598730 t smu_v13_0_get_max_sustainable_clock +ffffffff825988a0 T smu_v13_0_get_current_power_limit +ffffffff825989a0 T smu_v13_0_set_power_limit +ffffffff82598ae0 T smu_v13_0_enable_thermal_alert +ffffffff82598b80 T smu_v13_0_disable_thermal_alert +ffffffff82598bc0 T smu_v13_0_get_gfx_vdd +ffffffff82598c80 T smu_v13_0_display_clock_voltage_request +ffffffff82598df0 T smu_v13_0_set_hard_freq_limited_range +ffffffff82598ef0 T smu_v13_0_get_fan_control_mode +ffffffff82598f40 T smu_v13_0_set_fan_speed_pwm +ffffffff825991b0 t smu_v13_0_set_fan_static_mode +ffffffff825993b0 T smu_v13_0_set_fan_control_mode +ffffffff82599550 T smu_v13_0_set_fan_speed_rpm +ffffffff82599740 T smu_v13_0_set_xgmi_pstate +ffffffff82599760 T smu_v13_0_register_irq_handler +ffffffff82599840 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff825998d0 T smu_v13_0_set_azalia_d3_pme +ffffffff825998f0 T smu_v13_0_wait_for_event +ffffffff82599940 T smu_v13_0_get_dpm_ultimate_freq +ffffffff82599ab0 T smu_v13_0_set_soft_freq_limited_range +ffffffff82599ba0 T smu_v13_0_set_performance_level +ffffffff8259a3f0 T smu_v13_0_set_power_source +ffffffff8259a460 T smu_v13_0_get_dpm_freq_by_index +ffffffff8259a520 T smu_v13_0_set_single_dpm_table +ffffffff8259a890 T smu_v13_0_get_current_pcie_link_width_level +ffffffff8259a8f0 T smu_v13_0_get_current_pcie_link_width +ffffffff8259a960 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff8259a9c0 T smu_v13_0_get_current_pcie_link_speed +ffffffff8259aa20 T smu_v13_0_set_vcn_enable +ffffffff8259aae0 T smu_v13_0_set_jpeg_enable +ffffffff8259ab00 T smu_v13_0_run_btc +ffffffff8259ab90 T smu_v13_0_gpo_control +ffffffff8259ac30 T smu_v13_0_deep_sleep_control +ffffffff8259af30 T smu_v13_0_gfx_ulv_control +ffffffff8259afb0 T smu_v13_0_baco_set_armd3_sequence +ffffffff8259b020 T smu_v13_0_baco_is_support +ffffffff8259b0c0 T smu_v13_0_baco_get_state +ffffffff8259b0f0 T smu_v13_0_baco_set_state +ffffffff8259b1f0 T smu_v13_0_baco_enter +ffffffff8259b380 T smu_v13_0_baco_exit +ffffffff8259b430 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff8259b470 T smu_v13_0_od_edit_dpm_table +ffffffff8259b780 T smu_v13_0_set_default_dpm_tables +ffffffff8259b7b0 T smu_v13_0_set_smu_mailbox_registers +ffffffff8259b820 T smu_v13_0_mode1_reset +ffffffff8259b8a0 T smu_v13_0_update_pcie_parameters +ffffffff8259bb20 t smu_v13_0_set_irq_state +ffffffff8259c170 t smu_v13_0_irq_process +ffffffff8259d000 T smu_v13_0_0_set_ppt_funcs +ffffffff8259d0f0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff8259d240 t smu_v13_0_0_set_default_dpm_table +ffffffff8259d6c0 t smu_v13_0_0_populate_umd_state_clk +ffffffff8259d800 t smu_v13_0_0_print_clk_levels +ffffffff8259d950 t smu_v13_0_0_force_clk_levels +ffffffff8259dae0 t smu_v13_0_0_od_edit_dpm_table +ffffffff8259e020 t smu_v13_0_0_restore_user_od_settings +ffffffff8259e100 t smu_v13_0_0_get_power_profile_mode +ffffffff8259e220 t smu_v13_0_0_set_power_profile_mode +ffffffff8259e4b0 t smu_v13_0_0_read_sensor +ffffffff8259e730 t smu_v13_0_0_is_dpm_running +ffffffff8259e780 t smu_v13_0_0_get_fan_speed_pwm +ffffffff8259e870 t smu_v13_0_0_get_fan_speed_rpm +ffffffff8259e8e0 t smu_v13_0_0_get_thermal_temperature_range +ffffffff8259e9e0 t smu_v13_0_0_set_default_od_settings +ffffffff8259eb40 t smu_v13_0_0_dump_pptable +ffffffff8259eb70 t smu_v13_0_0_get_power_limit +ffffffff8259ec60 t smu_v13_0_0_set_df_cstate +ffffffff8259ec80 t smu_v13_0_0_i2c_control_init +ffffffff8259edd0 t smu_v13_0_0_i2c_control_fini +ffffffff8259ee10 t smu_v13_0_0_get_unique_id +ffffffff8259eec0 t smu_v13_0_0_init_smc_tables +ffffffff8259f130 t smu_v13_0_0_set_mp1_state +ffffffff8259f170 t smu_v13_0_0_setup_pptable +ffffffff8259f2f0 t smu_v13_0_0_system_features_control +ffffffff8259f300 t smu_v13_0_0_baco_enter +ffffffff8259f370 t smu_v13_0_0_baco_exit +ffffffff8259f3e0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff8259f440 t smu_v13_0_0_mode1_reset +ffffffff8259f590 t smu_v13_0_0_mode2_reset +ffffffff8259f5e0 t smu_v13_0_0_enable_gfx_features +ffffffff8259f630 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff8259f760 t smu_v13_0_0_get_gpu_metrics +ffffffff8259fbc0 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff8259fc10 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff8259fca0 t smu_v13_0_0_get_ecc_info +ffffffff8259fdb0 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff8259fe40 t smu_v13_0_0_i2c_xfer +ffffffff825a0100 t smu_v13_0_0_i2c_func +ffffffff825a1000 T smu_v13_0_4_set_ppt_funcs +ffffffff825a10c0 t smu_v13_0_4_print_clk_levels +ffffffff825a1140 t smu_v13_0_4_force_clk_levels +ffffffff825a1420 t smu_v13_0_4_read_sensor +ffffffff825a1760 t smu_v13_0_4_is_dpm_running +ffffffff825a17c0 t smu_v13_0_4_set_watermarks_table +ffffffff825a1950 t smu_v13_0_4_set_performance_level +ffffffff825a2660 t smu_v13_0_4_init_smc_tables +ffffffff825a2800 t smu_v13_0_4_fini_smc_tables +ffffffff825a28d0 t smu_v13_0_4_system_features_control +ffffffff825a2960 t smu_v13_0_4_mode2_reset +ffffffff825a2980 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff825a2db0 t smu_v13_0_4_get_gpu_metrics +ffffffff825a2f90 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff825a2ff0 t smu_v13_0_4_get_current_clk_freq +ffffffff825a4000 T smu_v13_0_5_set_ppt_funcs +ffffffff825a40a0 t smu_v13_0_5_set_default_dpm_tables +ffffffff825a40d0 t smu_v13_0_5_print_clk_levels +ffffffff825a4170 t smu_v13_0_5_force_clk_levels +ffffffff825a4300 t smu_v13_0_5_od_edit_dpm_table +ffffffff825a4610 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff825a4630 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff825a4650 t smu_v13_0_5_read_sensor +ffffffff825a48d0 t smu_v13_0_5_is_dpm_running +ffffffff825a4930 t smu_v13_0_5_set_watermarks_table +ffffffff825a4ac0 t smu_v13_0_5_set_performance_level +ffffffff825a5140 t smu_v13_0_5_init_smc_tables +ffffffff825a52e0 t smu_v13_0_5_fini_smc_tables +ffffffff825a53b0 t smu_v13_0_5_system_features_control +ffffffff825a5400 t smu_v13_0_5_mode2_reset +ffffffff825a5490 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff825a58d0 t smu_v13_0_5_get_gpu_metrics +ffffffff825a5a30 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff825a6000 T smu_v13_0_6_set_ppt_funcs +ffffffff825a6050 t smu_v13_0_6_get_allowed_feature_mask +ffffffff825a60b0 t smu_v13_0_6_set_default_dpm_table +ffffffff825a6600 t smu_v13_0_6_populate_umd_state_clk +ffffffff825a6700 t smu_v13_0_6_print_clk_levels +ffffffff825a6ad0 t smu_v13_0_6_force_clk_levels +ffffffff825a6ce0 t smu_v13_0_6_usr_edit_dpm_table +ffffffff825a6f20 t smu_v13_0_6_read_sensor +ffffffff825a7530 t smu_v13_0_6_is_dpm_running +ffffffff825a75c0 t smu_v13_0_6_get_thermal_temperature_range +ffffffff825a7740 t smu_v13_0_6_set_performance_level +ffffffff825a7870 t smu_v13_0_6_get_power_limit +ffffffff825a7950 t smu_v13_0_6_set_df_cstate +ffffffff825a7970 t smu_v13_0_6_allow_xgmi_power_down +ffffffff825a7990 t smu_v13_0_6_i2c_control_init +ffffffff825a7ae0 t smu_v13_0_6_i2c_control_fini +ffffffff825a7b20 t smu_v13_0_6_get_unique_id +ffffffff825a7ba0 t smu_v13_0_6_init_smc_tables +ffffffff825a7d60 t smu_v13_0_6_check_fw_status +ffffffff825a7dc0 t smu_v13_0_6_setup_pptable +ffffffff825a7df0 t smu_v13_0_6_system_features_control +ffffffff825a7e90 t smu_v13_0_6_get_enabled_mask +ffffffff825a7f10 t smu_v13_0_6_set_power_limit +ffffffff825a7f30 t smu_v13_0_6_register_irq_handler +ffffffff825a7f90 t smu_v13_0_6_is_baco_supported +ffffffff825a7fc0 t smu_v13_0_6_is_mode1_reset_supported +ffffffff825a7ff0 t smu_v13_0_6_is_mode2_reset_supported +ffffffff825a8020 t smu_v13_0_6_mode1_reset +ffffffff825a80e0 t smu_v13_0_6_mode2_reset +ffffffff825a84a0 t smu_v13_0_6_get_dpm_ultimate_freq +ffffffff825a86e0 t smu_v13_0_6_set_soft_freq_limited_range +ffffffff825a8960 t smu_v13_0_6_log_thermal_throttling_event +ffffffff825a8ca0 t smu_v13_0_6_get_gpu_metrics +ffffffff825a9050 t smu_v13_0_6_smu_send_hbm_bad_page_num +ffffffff825a90e0 t smu_v13_0_6_get_smu_metrics_data +ffffffff825a93a0 t smu_v13_0_6_upload_dpm_level +ffffffff825a94d0 t smu_v13_0_6_i2c_xfer +ffffffff825a9800 t smu_v13_0_6_i2c_func +ffffffff825a9830 t smu_v13_0_6_set_irq_state +ffffffff825a9b10 t smu_v13_0_6_irq_process +ffffffff825aa000 T smu_v13_0_7_set_ppt_funcs +ffffffff825aa060 t smu_v13_0_7_get_allowed_feature_mask +ffffffff825aa1e0 t smu_v13_0_7_set_default_dpm_table +ffffffff825aa660 t smu_v13_0_7_populate_umd_state_clk +ffffffff825aa7a0 t smu_v13_0_7_print_clk_levels +ffffffff825aa8f0 t smu_v13_0_7_force_clk_levels +ffffffff825aaa80 t smu_v13_0_7_od_edit_dpm_table +ffffffff825aafc0 t smu_v13_0_7_restore_user_od_settings +ffffffff825ab0a0 t smu_v13_0_7_get_power_profile_mode +ffffffff825ab200 t smu_v13_0_7_set_power_profile_mode +ffffffff825ab470 t smu_v13_0_7_read_sensor +ffffffff825ab6e0 t smu_v13_0_7_is_dpm_running +ffffffff825ab730 t smu_v13_0_7_get_fan_speed_pwm +ffffffff825ab820 t smu_v13_0_7_get_fan_speed_rpm +ffffffff825ab890 t smu_v13_0_7_get_thermal_temperature_range +ffffffff825ab990 t smu_v13_0_7_set_default_od_settings +ffffffff825abaf0 t smu_v13_0_7_dump_pptable +ffffffff825abb20 t smu_v13_0_7_get_power_limit +ffffffff825abc10 t smu_v13_0_7_set_df_cstate +ffffffff825abc30 t smu_v13_0_7_init_smc_tables +ffffffff825abe50 t smu_v13_0_7_check_fw_status +ffffffff825abeb0 t smu_v13_0_7_set_mp1_state +ffffffff825abef0 t smu_v13_0_7_setup_pptable +ffffffff825ac060 t smu_v13_0_7_baco_enter +ffffffff825ac0d0 t smu_v13_0_7_baco_exit +ffffffff825ac140 t smu_v13_0_7_is_mode1_reset_supported +ffffffff825ac180 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff825ac2b0 t smu_v13_0_7_get_gpu_metrics +ffffffff825ac700 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff825ad000 T yellow_carp_set_ppt_funcs +ffffffff825ad050 t yellow_carp_set_default_dpm_tables +ffffffff825ad080 t yellow_carp_print_clk_levels +ffffffff825ad100 t yellow_carp_force_clk_levels +ffffffff825ad3e0 t yellow_carp_od_edit_dpm_table +ffffffff825ad6f0 t yellow_carp_dpm_set_vcn_enable +ffffffff825ad710 t yellow_carp_dpm_set_jpeg_enable +ffffffff825ad730 t yellow_carp_read_sensor +ffffffff825adb00 t yellow_carp_is_dpm_running +ffffffff825adb60 t yellow_carp_set_watermarks_table +ffffffff825adcf0 t yellow_carp_set_performance_level +ffffffff825ae8e0 t yellow_carp_init_smc_tables +ffffffff825aea80 t yellow_carp_fini_smc_tables +ffffffff825aeb50 t yellow_carp_system_features_control +ffffffff825aeba0 t yellow_carp_get_gfxoff_status +ffffffff825aec30 t yellow_carp_mode2_reset +ffffffff825aecc0 t yellow_carp_get_dpm_ultimate_freq +ffffffff825af110 t yellow_carp_get_gpu_metrics +ffffffff825af2e0 t yellow_carp_post_smu_init +ffffffff825af370 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff825af3d0 t yellow_carp_get_current_clk_freq +ffffffff825af4e0 t yellow_carp_get_dpm_profile_freq +ffffffff825b0000 T smu_cmn_send_msg_without_waiting +ffffffff825b01b0 T smu_cmn_wait_for_response +ffffffff825b0300 T smu_cmn_send_smc_msg_with_param +ffffffff825b0690 T smu_cmn_to_asic_specific_index +ffffffff825b07c0 t __smu_cmn_reg_print_error +ffffffff825b0a20 T smu_cmn_send_smc_msg +ffffffff825b0a40 T smu_cmn_send_debug_smc_msg +ffffffff825b0ae0 T smu_cmn_send_debug_smc_msg_with_param +ffffffff825b0b80 T smu_cmn_feature_is_supported +ffffffff825b0c30 T smu_cmn_feature_is_enabled +ffffffff825b0d30 T smu_cmn_clk_dpm_is_enabled +ffffffff825b0e40 T smu_cmn_get_enabled_mask +ffffffff825b0f40 T smu_cmn_get_indep_throttler_status +ffffffff825b0ff0 T smu_cmn_feature_update_enable_state +ffffffff825b10b0 T smu_cmn_feature_set_enabled +ffffffff825b1190 T smu_cmn_get_pp_feature_mask +ffffffff825b1340 T smu_cmn_set_pp_feature_mask +ffffffff825b1470 T smu_cmn_disable_all_features_with_exception +ffffffff825b1530 T smu_cmn_get_smc_version +ffffffff825b1620 T smu_cmn_update_table +ffffffff825b17b0 T smu_cmn_write_watermarks_table +ffffffff825b1890 T smu_cmn_write_pptable +ffffffff825b1970 T smu_cmn_get_metrics_table +ffffffff825b1ae0 T smu_cmn_get_combo_pptable +ffffffff825b1bd0 T smu_cmn_init_soft_gpu_metrics +ffffffff825b1cd0 T smu_cmn_set_mp1_state +ffffffff825b1d80 T smu_cmn_is_audio_func_enabled +ffffffff825b2000 T pci_mcfg_init +ffffffff825b2050 T pci_lookup_segment +ffffffff825b20b0 T pci_attach_hook +ffffffff825b20e0 T pci_bus_maxdevs +ffffffff825b2110 T pci_make_tag +ffffffff825b2190 T pci_decompose_tag +ffffffff825b21f0 T pci_conf_size +ffffffff825b2250 T pci_mcfg_map_bus +ffffffff825b22e0 T pci_conf_read +ffffffff825b2450 T pci_conf_write +ffffffff825b25a0 T pci_msix_table_map +ffffffff825b26f0 T pci_msix_table_unmap +ffffffff825b27a0 T msi_hwmask +ffffffff825b2880 T msi_hwunmask +ffffffff825b2960 T msi_addroute +ffffffff825b2aa0 T msi_delroute +ffffffff825b2b30 T msi_allocidtvec +ffffffff825b2ca0 T pci_intr_enable_msivec +ffffffff825b2da0 T pci_intr_map_msi +ffffffff825b2e60 T pci_intr_map_msivec +ffffffff825b2f20 T msix_hwmask +ffffffff825b30c0 T msix_hwunmask +ffffffff825b3220 T msix_addroute +ffffffff825b3470 T msix_delroute +ffffffff825b3600 T pci_intr_map_msix +ffffffff825b36e0 T pci_intr_map +ffffffff825b3940 T pci_intr_string +ffffffff825b3a20 T pci_intr_establish +ffffffff825b3a70 T pci_intr_establish_cpu +ffffffff825b3bf0 T pci_intr_disestablish +ffffffff825b3c10 T pci_init_extents +ffffffff825b3e30 T pci_probe_device_hook +ffffffff825b3e70 T pci_dev_postattach +ffffffff825b3e80 T pci_min_powerstate +ffffffff825b3e90 T pci_set_powerstate_md +ffffffff825b4000 T pciide_machdep_compat_intr_establish +ffffffff825b4070 T pciide_machdep_compat_intr_disestablish +ffffffff825b5000 T vga_post_init +ffffffff825b5390 t vm86_emu_inb +ffffffff825b53e0 t vm86_emu_inw +ffffffff825b5420 t vm86_emu_inl +ffffffff825b5460 t vm86_emu_outb +ffffffff825b54b0 t vm86_emu_outw +ffffffff825b54f0 t vm86_emu_outl +ffffffff825b5530 T vga_post_call +ffffffff825b55b0 T vga_post_free +ffffffff825b5640 T ddb_vgapost +ffffffff825b6000 T pchbmatch +ffffffff825b6040 T pchbattach +ffffffff825b6570 T pchbactivate +ffffffff825b65f0 T pchb_amd64ht_attach +ffffffff825b6750 T pchb_rnd +ffffffff825b67e0 T pchb_print +ffffffff825b7000 T amas_match +ffffffff825b7060 T amas_attach +ffffffff825b70c0 T amas_intl_nodes +ffffffff825b7160 T amas_get_pagerange +ffffffff825b8000 T agp_flush_cache +ffffffff825b9000 T cardslotmatch +ffffffff825b9050 T cardslotattach +ffffffff825b9320 T cardslot_event +ffffffff825b9380 T cardslot_cb_print +ffffffff825b93e0 T cardslot_16_print +ffffffff825b9430 T cardslot_16_submatch +ffffffff825b9480 T cardslot_event_throw +ffffffff825b9540 T cardslot_process_event +ffffffff825ba000 T cardbusmatch +ffffffff825ba060 T cardbusattach +ffffffff825ba150 T cardbus_read_tuples +ffffffff825ba5e0 T parse_tuple +ffffffff825ba860 T cardbus_attach_card +ffffffff825bb170 T enable_function +ffffffff825bb220 T decode_tuples +ffffffff825bb300 T cardbusprint +ffffffff825bb420 T cardbussubmatch +ffffffff825bb480 T disable_function +ffffffff825bb4e0 T cardbus_detach_card +ffffffff825bb5d0 T cardbus_intr_establish +ffffffff825bb600 T cardbus_intr_disestablish +ffffffff825bb620 T cardbus_function_enable +ffffffff825bb720 T cardbus_function_disable +ffffffff825bb780 T cardbus_matchbyid +ffffffff825bb7f0 T decode_tuple +ffffffff825bc000 T cardbus_mapreg_map +ffffffff825bc1d0 T cardbus_mapreg_unmap +ffffffff825bd000 T cardbus_read_exrom +ffffffff825be000 T rbus_space_alloc +ffffffff825be070 T rbus_space_alloc_subregion +ffffffff825be270 T rbus_space_free +ffffffff825be310 T rbus_new_body +ffffffff825be3b0 T rbus_new_root_delegate +ffffffff825be490 T rbus_new_root_share +ffffffff825bf000 T com_cardbus_match +ffffffff825bf080 T com_cardbus_attach +ffffffff825bf250 T com_cardbus_detach +ffffffff825bf300 T com_cardbus_find_csdev +ffffffff825bf480 T com_cardbus_gofigure +ffffffff825bf980 T com_cardbus_enable +ffffffff825bfa80 T com_cardbus_disable +ffffffff825bfad0 T com_cardbus_setup +ffffffff825c0000 T xl_cardbus_match +ffffffff825c0080 T xl_cardbus_attach +ffffffff825c0480 T xl_cardbus_detach +ffffffff825c0550 T xl_cardbus_lookup +ffffffff825c0600 T xl_cardbus_intr_ack +ffffffff825c1000 T dc_cardbus_match +ffffffff825c1030 T dc_cardbus_attach +ffffffff825c1450 T dc_cardbus_detach +ffffffff825c1500 T dc_cardbus_setup +ffffffff825c2000 T fxp_cardbus_match +ffffffff825c2030 T fxp_cardbus_attach +ffffffff825c2290 T fxp_cardbus_detach +ffffffff825c2340 T fxp_cardbus_setup +ffffffff825c3000 t rl_cardbus_match +ffffffff825c3030 t rl_cardbus_attach +ffffffff825c3220 t rl_cardbus_detach +ffffffff825c32e0 T rl_cardbus_setup +ffffffff825c4000 T re_cardbus_probe +ffffffff825c4030 T re_cardbus_attach +ffffffff825c4280 T re_cardbus_detach +ffffffff825c4320 T re_cardbus_setup +ffffffff825c5000 T ath_cardbus_match +ffffffff825c5060 T ath_cardbus_attach +ffffffff825c51c0 T ath_cardbus_detach +ffffffff825c52a0 T ath_cardbus_enable +ffffffff825c53a0 T ath_cardbus_disable +ffffffff825c5400 T ath_cardbus_power +ffffffff825c5440 T ath_cardbus_setup +ffffffff825c6000 T athn_cardbus_match +ffffffff825c6030 T athn_cardbus_attach +ffffffff825c61a0 T athn_cardbus_detach +ffffffff825c6250 T athn_cardbus_enable +ffffffff825c6350 T athn_cardbus_disable +ffffffff825c63b0 T athn_cardbus_power +ffffffff825c63f0 T athn_cardbus_read +ffffffff825c6420 T athn_cardbus_write +ffffffff825c6450 T athn_cardbus_write_barrier +ffffffff825c6480 T athn_cardbus_setup +ffffffff825c7000 T atw_cardbus_match +ffffffff825c7030 T atw_cardbus_attach +ffffffff825c7260 T atw_cardbus_detach +ffffffff825c7330 T atw_cardbus_enable +ffffffff825c7430 T atw_cardbus_disable +ffffffff825c7490 T atw_cardbus_power +ffffffff825c74d0 T atw_cardbus_setup +ffffffff825c8000 T rtw_cardbus_match +ffffffff825c8030 T rtw_cardbus_attach +ffffffff825c82e0 T rtw_cardbus_detach +ffffffff825c8430 T rtw_cardbus_intr_ack +ffffffff825c8450 T rtw_cardbus_funcregen +ffffffff825c84d0 T rtw_cardbus_enable +ffffffff825c8690 T rtw_cardbus_disable +ffffffff825c87b0 T rtw_cardbus_power +ffffffff825c87f0 T rtw_cardbus_setup +ffffffff825c9000 T ral_cardbus_match +ffffffff825c9030 T ral_cardbus_attach +ffffffff825c9280 T ral_cardbus_detach +ffffffff825c9350 T ral_cardbus_activate +ffffffff825c93f0 T ral_cardbus_enable +ffffffff825c95a0 T ral_cardbus_disable +ffffffff825c9600 T ral_cardbus_setup +ffffffff825c96c0 T ral_cardbus_wakeup +ffffffff825ca000 T acx_cardbus_match +ffffffff825ca030 T acx_cardbus_attach +ffffffff825ca2b0 T acx_cardbus_detach +ffffffff825ca400 T acx_cardbus_enable +ffffffff825ca510 T acx_cardbus_disable +ffffffff825ca570 T acx_cardbus_power +ffffffff825ca5b0 T acx_cardbus_setup +ffffffff825cb000 T pgt_cardbus_match +ffffffff825cb030 T pgt_cardbus_attach +ffffffff825cb290 T pgt_cardbus_detach +ffffffff825cb350 T pgt_cardbus_enable +ffffffff825cb500 T pgt_cardbus_disable +ffffffff825cb560 T pgt_cardbus_power +ffffffff825cb5c0 T pgt_cardbus_setup +ffffffff825cc000 T ehci_cardbus_match +ffffffff825cc040 T ehci_cardbus_attach +ffffffff825cc360 T ehci_cardbus_detach +ffffffff825cd000 T ohci_cardbus_match +ffffffff825cd040 T ohci_cardbus_attach +ffffffff825cd360 T ohci_cardbus_detach +ffffffff825ce000 T uhci_cardbus_match +ffffffff825ce040 T uhci_cardbus_attach +ffffffff825ce3d0 T uhci_cardbus_detach +ffffffff825cf000 T malo_cardbus_match +ffffffff825cf030 T malo_cardbus_attach +ffffffff825cf2f0 T malo_cardbus_detach +ffffffff825cf3e0 T malo_cardbus_enable +ffffffff825cf5b0 T malo_cardbus_disable +ffffffff825cf610 T malo_cardbus_setup +ffffffff825d0000 T bwi_cardbus_match +ffffffff825d0030 T bwi_cardbus_attach +ffffffff825d0310 T bwi_cardbus_detach +ffffffff825d03d0 T bwi_cardbus_enable +ffffffff825d0580 T bwi_cardbus_disable +ffffffff825d05e0 T bwi_cardbus_setup +ffffffff825d06a0 T bwi_cardbus_conf_read +ffffffff825d06d0 T bwi_cardbus_conf_write +ffffffff825d1000 T rbus_pccbb_parent_mem +ffffffff825d1060 T rbus_pccbb_parent_io +ffffffff825d10d0 T pccbb_attach_hook +ffffffff825d2000 T pcmcia_match +ffffffff825d2060 T pcmcia_attach +ffffffff825d20f0 T pcmcia_activate +ffffffff825d21c0 T pcmcia_ccr_read +ffffffff825d2220 T pcmcia_ccr_write +ffffffff825d2290 T pcmcia_card_attach +ffffffff825d24c0 T pcmcia_print +ffffffff825d2790 T pcmcia_submatch +ffffffff825d27e0 T pcmcia_card_detach +ffffffff825d28a0 T pcmcia_card_deactivate +ffffffff825d2910 T pcmcia_card_gettype +ffffffff825d2970 T pcmcia_function_init +ffffffff825d29d0 T pcmcia_function_enable +ffffffff825d2e50 T pcmcia_function_disable +ffffffff825d2f80 T pcmcia_io_map +ffffffff825d31f0 T pcmcia_intr_establish +ffffffff825d34b0 T pcmcia_card_intr +ffffffff825d35f0 T pcmcia_intr_disestablish +ffffffff825d3840 T pcmcia_intr_string +ffffffff825d4000 T pcmcia_cis_read_1 +ffffffff825d4120 T pcmcia_read_cis +ffffffff825d4220 T pcmcia_scan_cis +ffffffff825d6270 T pcmcia_parse_cis_tuple +ffffffff825d7690 T pcmcia_print_cis +ffffffff825d8000 T pcmcia_check_cis_quirks +ffffffff825d9000 T ep_pcmcia_match +ffffffff825d9110 T ep_pcmcia_attach +ffffffff825d95b0 T ep_pcmcia_detach +ffffffff825d9660 T ep_pcmcia_activate +ffffffff825d9760 T ep_pcmcia_lookup +ffffffff825d9870 T ep_pcmcia_enable1 +ffffffff825d9930 T ep_pcmcia_get_enaddr +ffffffff825da000 T ne_pcmcia_match +ffffffff825da150 T ne_pcmcia_attach +ffffffff825da850 T ne_pcmcia_detach +ffffffff825da930 T ne_pcmcia_activate +ffffffff825daa50 T ne_pcmcia_get_enaddr +ffffffff825dac80 T ne_pcmcia_dl10019_get_enaddr +ffffffff825daf40 T ne_pcmcia_ax88190_set_iobase +ffffffff825dc000 T aic_pcmcia_match +ffffffff825dc0b0 T aic_pcmcia_attach +ffffffff825dc300 T aic_pcmcia_detach +ffffffff825dd000 T com_pcmcia_match +ffffffff825dd270 T com_pcmcia_attach +ffffffff825dd5c0 T com_pcmcia_detach +ffffffff825dd670 T com_pcmcia_activate +ffffffff825dd750 T com_pcmcia_enable1 +ffffffff825dd810 T com_pcmcia_enable +ffffffff825dd930 T com_pcmcia_disable +ffffffff825dd970 T com_pcmcia_disable1 +ffffffff825de000 t wdc_pcmcia_match +ffffffff825de0f0 t wdc_pcmcia_attach +ffffffff825de630 T wdc_pcmcia_detach +ffffffff825de750 T wdc_pcmcia_activate +ffffffff825de890 T wdc_pcmcia_disk_device_interface_callback +ffffffff825de940 T wdc_pcmcia_disk_device_interface +ffffffff825de9b0 T wdc_pcmcia_lookup +ffffffff825df000 T sm_pcmcia_match +ffffffff825df100 T sm_pcmcia_attach +ffffffff825df370 T sm_pcmcia_detach +ffffffff825df430 T sm_pcmcia_activate +ffffffff825df4d0 T sm_pcmcia_funce_enaddr +ffffffff825df4f0 T sm_pcmcia_ascii_enaddr +ffffffff825df600 T sm_pcmcia_lannid_ciscallback +ffffffff825df760 T sm_pcmcia_enable +ffffffff825df810 T sm_pcmcia_disable +ffffffff825e0000 T xe_pcmcia_match +ffffffff825e0050 T xe_pcmcia_attach +ffffffff825e0730 T xe_pcmcia_detach +ffffffff825e0830 T xe_pcmcia_activate +ffffffff825e0bc0 T xe_pcmcia_interpret_manfid +ffffffff825e0c80 T xe_pcmcia_funce_enaddr +ffffffff825e0ca0 T xe_ioctl +ffffffff825e1090 T xe_start +ffffffff825e13a0 T xe_watchdog +ffffffff825e13f0 T xe_intr +ffffffff825e1830 T xe_full_reset +ffffffff825e1f80 T xe_mdi_read +ffffffff825e2bd0 T xe_mdi_write +ffffffff825e3780 T xe_statchg +ffffffff825e37b0 T xe_mediachange +ffffffff825e3850 T xe_mediastatus +ffffffff825e38c0 T xe_init +ffffffff825e3930 T xe_stop +ffffffff825e3aa0 T xe_reset +ffffffff825e3c80 T xe_pcmcia_lan_nid_ciscallback +ffffffff825e3e30 T xe_pcmcia_manfid_ciscallback +ffffffff825e3f60 T xe_get +ffffffff825e4270 T xe_set_address +ffffffff825e4590 T xe_cycle_power +ffffffff825e5000 T wi_pcmcia_match +ffffffff825e5140 T wi_pcmcia_attach +ffffffff825e5480 T wi_pcmcia_detach +ffffffff825e5560 T wi_pcmcia_activate +ffffffff825e5680 T wi_pcmcia_wakeup +ffffffff825e6000 T malo_pcmcia_match +ffffffff825e6050 T malo_pcmcia_attach +ffffffff825e6280 T malo_pcmcia_detach +ffffffff825e6320 T malo_pcmcia_activate +ffffffff825e6610 T cmalo_intr +ffffffff825e68d0 T cmalo_attach +ffffffff825e6f00 T cmalo_detach +ffffffff825e7000 T cmalo_stop +ffffffff825e7180 T malo_pcmcia_wakeup +ffffffff825e7240 T cmalo_init +ffffffff825e7610 T cmalo_intr_mask +ffffffff825e76b0 T cmalo_fw_alloc +ffffffff825e77a0 T cmalo_fw_load_helper +ffffffff825e7a60 T cmalo_fw_load_main +ffffffff825e7fd0 T cmalo_cmd_get_hwspec +ffffffff825e8160 T cmalo_ioctl +ffffffff825e8610 T cmalo_start +ffffffff825e86b0 T cmalo_watchdog +ffffffff825e86e0 T cmalo_newstate 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+ffffffff827e1390 T aplgpio_intr +ffffffff827e1500 T aplgpio_read_pin +ffffffff827e1560 T aplgpio_write_pin +ffffffff827e15e0 T aplgpio_intr_establish +ffffffff827e1720 T aplgpio_intr_enable +ffffffff827e17b0 T aplgpio_intr_disable +ffffffff827e2000 T bytgpio_match +ffffffff827e2060 T bytgpio_attach +ffffffff827e23a0 T bytgpio_intr +ffffffff827e24f0 T bytgpio_read_pin +ffffffff827e2560 T bytgpio_write_pin +ffffffff827e25f0 T bytgpio_intr_establish +ffffffff827e2670 T bytgpio_intr_enable +ffffffff827e2760 T bytgpio_intr_disable +ffffffff827e3000 T chvgpio_match +ffffffff827e3060 T chvgpio_attach +ffffffff827e3380 T chvgpio_intr +ffffffff827e3470 T chvgpio_read_pin +ffffffff827e3520 T chvgpio_write_pin +ffffffff827e35f0 T chvgpio_intr_establish +ffffffff827e37e0 T chvgpio_intr_enable +ffffffff827e38c0 T chvgpio_intr_disable +ffffffff827e39a0 T chvgpio_opreg_handler +ffffffff827e3a40 T chvgpio_check_pin +ffffffff827e4000 T glkgpio_match +ffffffff827e4060 T glkgpio_attach +ffffffff827e4390 T glkgpio_intr +ffffffff827e4500 T glkgpio_read_pin +ffffffff827e4560 T glkgpio_write_pin +ffffffff827e45e0 T glkgpio_intr_establish +ffffffff827e4720 T glkgpio_intr_enable +ffffffff827e47b0 T glkgpio_intr_disable +ffffffff827e5000 T pchgpio_match +ffffffff827e5060 T pchgpio_attach +ffffffff827e5600 T pchgpio_activate +ffffffff827e56b0 T pchgpio_intr +ffffffff827e5900 T pchgpio_read_pin +ffffffff827e59f0 T pchgpio_write_pin +ffffffff827e5b10 T pchgpio_intr_establish +ffffffff827e5d60 T pchgpio_intr_enable +ffffffff827e5ea0 T pchgpio_intr_disable +ffffffff827e5fe0 T pchgpio_save +ffffffff827e6050 T pchgpio_restore +ffffffff827e60c0 T pchgpio_find_group +ffffffff827e6140 T pchgpio_intr_handle +ffffffff827e6240 T pchgpio_save_pin +ffffffff827e6420 T pchgpio_restore_pin +ffffffff827e7000 T tipmic_match +ffffffff827e7060 T tipmic_attach +ffffffff827e72c0 T tipmic_write_1 +ffffffff827e73a0 T tipmic_intr +ffffffff827e7550 T tipmic_get_lpat +ffffffff827e7690 T tipmic_read_pin +ffffffff827e76c0 T tipmic_write_pin +ffffffff827e76f0 T tipmic_thermal_opreg_handler +ffffffff827e8120 T tipmic_power_opreg_handler +ffffffff827e8400 T tipmic_read_1 +ffffffff827e84f0 T tipmic_raw_to_temp +ffffffff827e9000 T ccpmic_match +ffffffff827e9060 T ccpmic_attach +ffffffff827e9160 T ccpmic_get_lpat +ffffffff827e9290 T ccpmic_read_pin +ffffffff827e9450 T ccpmic_write_pin +ffffffff827e95f0 T ccpmic_thermal_opreg_handler +ffffffff827e9890 T ccpmic_power_opreg_handler +ffffffff827e9ad0 T ccpmic_read_1 +ffffffff827e9bc0 T ccpmic_write_1 +ffffffff827e9ca0 T ccpmic_raw_to_temp +ffffffff827ea000 T com_acpi_match +ffffffff827ea150 T com_acpi_attach +ffffffff827ea440 T com_acpi_is_designware +ffffffff827ea4c0 T com_acpi_intr_designware +ffffffff827ea500 T com_acpi_is_console +ffffffff827eb000 T sdhc_acpi_match +ffffffff827eb060 T sdhc_acpi_attach +ffffffff827eb400 T sdhc_acpi_parse_resources +ffffffff827eb4b0 T sdhc_acpi_card_detect_gpio +ffffffff827eb510 T sdhc_acpi_card_detect_intr +ffffffff827eb560 T sdhc_acpi_power_on +ffffffff827eb5f0 T sdhc_acpi_explore +ffffffff827eb620 T sdhc_acpi_card_detect_nonremovable +ffffffff827eb650 T sdhc_acpi_do_explore +ffffffff827ec000 T dwiic_acpi_match +ffffffff827ec050 T dwiic_acpi_attach +ffffffff827ec4f0 T dwiic_acpi_parse_crs +ffffffff827ec650 T dwiic_acpi_power +ffffffff827ec780 T dwiic_acpi_get_params +ffffffff827ec900 T dwiic_i2c_intr_establish +ffffffff827ec990 T dwiic_i2c_intr_disestablish +ffffffff827ec9b0 T dwiic_i2c_intr_string +ffffffff827eca40 T dwiic_acpi_acquire_bus +ffffffff827ecaa0 T dwiic_acpi_release_bus +ffffffff827ecae0 T dwiic_acpi_bus_scan +ffffffff827ecb20 T dwiic_acpi_found_hid +ffffffff827ecf10 T dwiic_matchhids +ffffffff827ecfa0 T dwiic_acpi_found_ihidev +ffffffff827ed280 T dwiic_acpi_found_iatp +ffffffff827ed400 T dwiic_acpi_found_ietp +ffffffff827ee000 T acpicbkbd_match +ffffffff827ee030 T acpicbkbd_attach +ffffffff827ee0e0 T acpicbkbd_activate +ffffffff827ee140 T acpicbkbd_get_backlight +ffffffff827ee1c0 T acpicbkbd_set_backlight +ffffffff827ee270 T acpicbkbd_write_backlight +ffffffff827ef000 T acpials_match +ffffffff827ef090 T acpials_attach +ffffffff827ef280 T acpials_read +ffffffff827ef310 T acpials_addtask +ffffffff827ef350 T acpials_notify +ffffffff827ef3e0 T acpials_update +ffffffff827f0000 T tpm_match +ffffffff827f0050 T tpm_attach +ffffffff827f03a0 T tpm_activate +ffffffff827f03f0 T tpm2_start_method +ffffffff827f0480 T tpm_probe +ffffffff827f0570 T tpm_init_tis +ffffffff827f0840 T tpm_init_crb +ffffffff827f0c30 T tpm_suspend +ffffffff827f0d60 T tpm_resume +ffffffff827f0d90 T tpm_write_tis +ffffffff827f11e0 T tpm_read_tis +ffffffff827f13f0 T tpm_write_crb +ffffffff827f18c0 T tpm_read_crb +ffffffff827f1c60 T tpm_request_locality_tis +ffffffff827f1d80 T tpm_request_locality_crb +ffffffff827f1ec0 T tpm_release_locality_crb +ffffffff827f1f20 T tpm_release_locality_tis +ffffffff827f1f90 T tpm_getburst +ffffffff827f2050 T tpm_status +ffffffff827f2070 T tpm_waitfor +ffffffff827f2160 T tpm_waitfor_status +ffffffff827f3000 T acpihve_match +ffffffff827f30d0 T acpihve_attach +ffffffff827f4000 T acpisbs_match +ffffffff827f4030 T acpisbs_attach +ffffffff827f4320 T acpisbs_activate +ffffffff827f4410 T acpisbs_read +ffffffff827f44e0 T acpisbs_setup_sensors +ffffffff827f4610 T acpisbs_refresh_sensors +ffffffff827f4760 T acpisbs_notify +ffffffff827f48c0 T acpi_smbus_read +ffffffff827f5000 T surface_match +ffffffff827f5060 T surface_attach +ffffffff827f50c0 T surface_hotkey +ffffffff827f6000 T ipmi_acpi_match +ffffffff827f6030 T ipmi_acpi_attach +ffffffff827f62b0 T ipmi_acpi_parse_crs +ffffffff827f7000 T amdgpio_match +ffffffff827f7060 T amdgpio_attach +ffffffff827f7330 T amdgpio_activate +ffffffff827f7430 T amdgpio_intr +ffffffff827f7610 T amdgpio_read_pin +ffffffff827f7670 T amdgpio_write_pin +ffffffff827f76f0 T amdgpio_intr_establish +ffffffff827f77f0 T amdgpio_intr_enable +ffffffff827f7880 T amdgpio_intr_disable +ffffffff827f7910 T amdgpio_save +ffffffff827f79a0 T amdgpio_restore +ffffffff827f7a40 T amdgpio_save_pin +ffffffff827f7ab0 T amdgpio_restore_pin +ffffffff827f7b20 T amdgpio_pin_intr +ffffffff827f8000 T acpihid_match +ffffffff827f8030 T acpihid_attach +ffffffff827f8270 T acpihid_init_dsm +ffffffff827f8400 T acpihid_eval +ffffffff827f8650 T acpihid_notify +ffffffff827f86c0 T acpihid_button_array_enable +ffffffff827f9000 t iosf_acpi_match +ffffffff827f9050 t iosf_acpi_attach +ffffffff827f9170 t iosf_acpi_mbi_mdr_rd +ffffffff827f91f0 t iosf_acpi_mbi_mdr_wr +ffffffff827fa000 T acpi_match +ffffffff827fa070 T acpi_attach +ffffffff827fa0b0 T acpi_probe +ffffffff827fa2a0 T acpi_map +ffffffff827fa3b0 T acpi_unmap +ffffffff827fa400 T acpi_bus_space_map +ffffffff827fa420 T acpi_bus_space_unmap +ffffffff827fa440 T acpi_intr_establish +ffffffff827fa5a0 T acpi_intr_disestablish +ffffffff827fa5b0 T acpi_scan +ffffffff827fa780 T acpi_acquire_glk +ffffffff827fa7e0 T acpi_release_glk +ffffffff827fa830 T acpi_attach_machdep +ffffffff827faa10 T acpi_sleep_cpu +ffffffff827fabd0 T acpi_resume_cpu +ffffffff827fad20 T sleep_mp +ffffffff827fae20 T resume_mp +ffffffff827faf20 T acpi_iommu_device_map +ffffffff827fb000 T hibernate_resume_machdep +ffffffff827fb050 T hibernate_drop_to_real_mode +ffffffff827fb060 T hibernate_activate_resume_pt_machdep +ffffffff827fb0a0 T hibernate_switch_stack_machdep +ffffffff827fb0e0 T hibernate_flush +ffffffff827fb110 T acpi_savecpu +ffffffff827fc000 T sleep_showstate +ffffffff827fc100 T sleep_setstate +ffffffff827fc180 T gosleep +ffffffff827fc280 T sleep_resume +ffffffff827fc320 T suspend_finish +ffffffff827fd000 T acpiopen +ffffffff827fd0d0 T acpiclose +ffffffff827fd170 T acpiioctl +ffffffff827fd300 T request_sleep +ffffffff827fd390 T acpi_filtdetach +ffffffff827fd3f0 T acpi_filtread +ffffffff827fd430 T acpikqfilter +ffffffff827fe000 T acpipci_match +ffffffff827fe030 T acpipci_attach +ffffffff827fe370 T acpipci_osc +ffffffff827fe4e0 T acpipci_parse_resources +ffffffff827fe610 T acpipci_attach_bus +ffffffff827fe820 T acpipci_print +ffffffff827fe8a0 T acpipci_attach_busses +ffffffff827ff000 T efiopen +ffffffff827ff040 T eficlose +ffffffff827ff070 T efiioctl +ffffffff827ff110 T efiioc_get_table +ffffffff827ff280 T efiioc_var_get +ffffffff827ff530 T efiioc_var_next +ffffffff827ff760 T efiioc_var_set +ffffffff827ffa10 T efi_adapt_error +ffffffff82800000 T efi_match +ffffffff82800070 T efi_attach +ffffffff82800390 T efi_map_runtime +ffffffff82800520 T efi_enter +ffffffff828005d0 T efi_leave +ffffffff82800660 T efi_fault +ffffffff82801000 T vmm_probe +ffffffff82801060 T vmm_attach +ffffffff828011b0 T vmm_activate +ffffffff82801340 T vmmopen +ffffffff82801390 T vmmclose +ffffffff828013c0 T vm_find +ffffffff82801500 T vmmioctl +ffffffff82801840 T vm_create +ffffffff82801bb0 T vm_get_info +ffffffff82801e60 T vm_terminate +ffffffff82802010 T vm_resetcpu +ffffffff82802140 T vm_share_mem +ffffffff828022b0 T pledge_ioctl_vmm +ffffffff828023a0 T vm_find_vcpu +ffffffff82802400 T vm_create_check_mem_ranges +ffffffff828025c0 T vm_teardown +ffffffff82802740 T vcpu_must_stop +ffffffff82803000 T vmm_enabled +ffffffff82803080 T vmm_attach_machdep +ffffffff82803260 T vmm_quiesce_vmx +ffffffff82803470 T vmm_activate_machdep +ffffffff82803510 T vmm_stop +ffffffff82803680 T vmm_start +ffffffff828037a0 T vmmioctl_machdep +ffffffff82803890 T vm_intr_pending +ffffffff82803950 T vm_mprotect_ept +ffffffff82803c10 T pledge_ioctl_vmm_machdep +ffffffff82803c60 T vm_rwvmparams +ffffffff82803e10 T vmm_init_pvclock +ffffffff82803ef0 T vm_rwregs +ffffffff82804030 T vcpu_readregs_vmx +ffffffff82804510 T vcpu_writeregs_vmx +ffffffff82804a50 T vcpu_readregs_svm +ffffffff82804f00 T vcpu_writeregs_svm +ffffffff828053d0 T vmm_get_guest_memtype +ffffffff82805450 T vmx_mprotect_ept +ffffffff82805710 T vmx_pmap_find_pte_ept +ffffffff828057e0 T start_vmm_on_cpu +ffffffff82805920 T stop_vmm_on_cpu +ffffffff828059c0 T vmclear_on_cpu +ffffffff82805a40 T vm_impl_init +ffffffff82805bd0 T vm_impl_deinit +ffffffff82805c00 T vcpu_reload_vmcs_vmx +ffffffff82805d80 T vcpu_reset_regs_svm +ffffffff82806160 T svm_setmsrbrw +ffffffff82806270 T svm_setmsrbr +ffffffff82806340 T vmm_alloc_vpid +ffffffff82806460 T svm_setmsrbw +ffffffff82806540 T vmx_setmsrbr +ffffffff828065f0 T vmx_setmsrbw +ffffffff828066a0 T vmx_setmsrbrw +ffffffff828067b0 T svm_set_clean +ffffffff82806800 T svm_set_dirty +ffffffff82806850 T vcpu_reset_regs_vmx +ffffffff828073b0 T vcpu_vmx_check_cap +ffffffff828074b0 T vcpu_vmx_compute_ctrl +ffffffff82807690 T vcpu_init_vmx +ffffffff82807ad0 T vcpu_deinit_vmx +ffffffff82807c40 T vcpu_reset_regs +ffffffff82807c80 T vcpu_init_svm +ffffffff82807e60 T vcpu_deinit_svm +ffffffff82807fd0 T vcpu_init +ffffffff828080a0 T vmm_free_vpid +ffffffff82808110 T vcpu_deinit +ffffffff82808150 T vm_run +ffffffff82808350 T vcpu_run_vmx +ffffffff82808e20 T vcpu_run_svm +ffffffff828094f0 T vmm_fpurestore +ffffffff828095c0 T vmm_fpusave +ffffffff82809650 T vmm_translate_gva +ffffffff82809980 T vmm_update_pvclock +ffffffff82809a90 T vmx_get_exit_info +ffffffff82809b10 T vmx_handle_exit +ffffffff82809f80 T vmx_instruction_error_decode +ffffffff8280a150 T vmm_get_guest_cpu_cpl +ffffffff8280a270 T vmx_handle_intr +ffffffff8280a310 T svm_handle_hlt +ffffffff8280a360 T vmx_handle_hlt +ffffffff8280a430 T svm_handle_exit +ffffffff8280a7b0 T svm_handle_np_fault +ffffffff8280a950 T vmm_handle_cpuid +ffffffff8280b000 T svm_handle_msr +ffffffff8280b2f0 T svm_handle_xsetbv +ffffffff8280b3b0 T svm_handle_inout +ffffffff8280b4c0 T vmm_inject_ud +ffffffff8280b500 T vmm_inject_db +ffffffff8280b540 T vmx_handle_np_fault +ffffffff8280b6c0 T vmx_handle_inout +ffffffff8280b860 T vmx_handle_cr +ffffffff8280baa0 T vmx_handle_rdmsr +ffffffff8280bba0 T vmx_handle_wrmsr +ffffffff8280be50 T vmx_handle_xsetbv +ffffffff8280bf50 T vmm_inject_gp +ffffffff8280bf90 T vmx_get_exit_qualification +ffffffff8280c000 T vmx_get_guest_faulttype +ffffffff8280c0b0 T svm_get_guest_faulttype +ffffffff8280c0e0 T svm_fault_page +ffffffff8280c170 T vmx_fault_page +ffffffff8280c2f0 T vmm_get_guest_cpu_mode +ffffffff8280c400 T vmx_load_pdptes +ffffffff8280c720 T vmx_handle_cr0_write +ffffffff8280c990 T vmx_handle_cr4_write +ffffffff8280ca50 T vmm_handle_xsetbv +ffffffff8280cb00 T vmx_handle_misc_enable_msr +ffffffff8280cb60 T vmm_pat_is_valid +ffffffff8280cc40 t vmm_handle_cpuid_0xd +ffffffff8280cd40 T vmm_gpa_is_valid +ffffffff8280cdb0 T vmx_exit_reason_decode +ffffffff8280cdf0 T svm_exit_reason_decode +ffffffff8280dc00 T vcpu_state_decode +ffffffff8280e000 T vmm_dispatch_intr +ffffffff8280e030 T vmxon +ffffffff8280e060 T vmxoff +ffffffff8280e090 T vmclear +ffffffff8280e0c0 T vmptrld +ffffffff8280e0f0 T vmptrst +ffffffff8280e120 T vmwrite +ffffffff8280e150 T vmread +ffffffff8280e180 T invvpid +ffffffff8280e19b t invvpid_fail +ffffffff8280e1a2 t invvpid_ret +ffffffff8280e1c0 T invept +ffffffff8280e1db t invept_fail +ffffffff8280e1e2 t invept_ret +ffffffff8280e200 T vmx_enter_guest +ffffffff8280e22b t skip_init +ffffffff8280e298 t no_l1df_msr +ffffffff8280e29b t l1df_tlb_loop +ffffffff8280e2b4 t l1df_tlb_done +ffffffff8280e2bc t l1df_load_cache +ffffffff8280e2d3 t done_flush +ffffffff8280e366 t do_resume +ffffffff8280e3eb t fail_launch_or_resume +ffffffff8280e42d t fail_launch_unknown +ffffffff8280e43a t fail_launch_invalid_vmcs +ffffffff8280e447 t fail_launch_valid_vmcs +ffffffff8280e464 t vmx_exit_handler_asm +ffffffff8280e529 t restore_host +ffffffff8280e550 T svm_enter_guest +ffffffff8280e6d2 t restore_host_svm +ffffffff8280f000 T sdmmc_match +ffffffff8280f060 T sdmmc_attach +ffffffff8280f400 T sdmmc_detach +ffffffff8280f4c0 T sdmmc_activate +ffffffff8280f5b0 T sdmmc_discover_task +ffffffff8280f6a0 T sdmmc_create_thread +ffffffff8280f710 T sdmmc_holds_root_device +ffffffff8280f770 T sdmmc_task_thread +ffffffff8280f9f0 T sdmmc_needs_discover +ffffffff8280fac0 T sdmmc_del_task +ffffffff8280fb80 T sdmmc_card_detach +ffffffff8280fc90 T sdmmc_add_task +ffffffff8280fd20 T sdmmc_card_attach +ffffffff8280fe90 T sdmmc_enable +ffffffff82810020 T sdmmc_scan +ffffffff828100c0 T sdmmc_init +ffffffff828101f0 T sdmmc_disable +ffffffff82810380 T sdmmc_function_free +ffffffff828103a0 T sdmmc_delay +ffffffff828103f0 T sdmmc_select_card +ffffffff82810630 T sdmmc_set_bus_power +ffffffff828107f0 T sdmmc_function_alloc +ffffffff82810890 T sdmmc_app_command +ffffffff82810a50 T sdmmc_mmc_command +ffffffff82810ae0 T sdmmc_go_idle_state +ffffffff82810c10 T sdmmc_send_if_cond +ffffffff82810d80 T sdmmc_set_relative_addr +ffffffff82811000 T sdmmc_cisptr +ffffffff828110d0 T sdmmc_read_cis +ffffffff828114b0 T sdmmc_print_cis +ffffffff828116a0 T sdmmc_check_cis_quirks +ffffffff82812000 T sdmmc_io_enable +ffffffff828122f0 T sdmmc_io_reset +ffffffff82812450 T sdmmc_io_send_op_cond +ffffffff828125e0 T sdmmc_io_scan +ffffffff82812760 T sdmmc_io_init +ffffffff828128d0 T sdmmc_io_set_highspeed +ffffffff82812bd0 T sdmmc_io_set_bus_width +ffffffff82812ec0 T sdmmc_io_function_ready +ffffffff82813070 T sdmmc_io_read_1 +ffffffff828131f0 T sdmmc_io_function_enable +ffffffff82813690 T sdmmc_io_write_1 +ffffffff82813830 T sdmmc_io_function_disable +ffffffff82813b10 T sdmmc_io_attach +ffffffff82813c00 T sdmmc_print +ffffffff82813ec0 T sdmmc_submatch +ffffffff82813f50 T sdmmc_io_detach +ffffffff82814010 T sdmmc_io_rw_direct +ffffffff828141e0 T sdmmc_io_rw_extended_subr +ffffffff82814390 T sdmmc_io_rw_extended +ffffffff828147d0 T sdmmc_io_read_2 +ffffffff82814940 T sdmmc_io_write_2 +ffffffff82814ac0 T sdmmc_io_read_4 +ffffffff82814c30 T sdmmc_io_write_4 +ffffffff82814db0 T sdmmc_io_read_multi_1 +ffffffff82814eb0 T sdmmc_io_write_multi_1 +ffffffff82814fb0 T sdmmc_io_read_region_1 +ffffffff828150b0 T sdmmc_io_write_region_1 +ffffffff828151b0 T sdmmc_io_xchg +ffffffff82815370 T sdmmc_intr_enable +ffffffff82815650 T sdmmc_intr_disable +ffffffff82815930 T sdmmc_intr_establish +ffffffff82815a50 T sdmmc_intr_disestablish +ffffffff82815b50 T sdmmc_card_intr +ffffffff82815ba0 T sdmmc_intr_task +ffffffff82815c60 T sdmmc_io_set_blocklen +ffffffff82816000 T sdmmc_mem_enable +ffffffff828164d0 T sdmmc_mem_send_op_cond +ffffffff828166b0 T sdmmc_mem_signal_voltage +ffffffff828167b0 T sdmmc_mem_scan +ffffffff82816b00 T sdmmc_decode_csd +ffffffff82816f50 T sdmmc_decode_cid +ffffffff82817400 T sdmmc_mem_send_scr +ffffffff82817560 T sdmmc_mem_decode_scr +ffffffff828175c0 T sdmmc_mem_send_cxd_data +ffffffff82817740 T sdmmc_mem_set_bus_width +ffffffff82817870 T sdmmc_mem_sd_switch +ffffffff82817b30 T sdmmc_be512_to_bitfield512 +ffffffff82817be0 T sdmmc_mem_mmc_switch +ffffffff82817cd0 T sdmmc_mem_init +ffffffff82817e60 T sdmmc_mem_set_blocklen +ffffffff82817f70 T sdmmc_mem_sd_init +ffffffff828183e0 T sdmmc_mem_mmc_init +ffffffff82818b60 T sdmmc_mem_select_transfer_mode +ffffffff82818be0 T sdmmc_mem_execute_tuning +ffffffff82818c70 T sdmmc_mem_read_block_subr +ffffffff82819000 T sdmmc_mem_single_read_block +ffffffff828190d0 T sdmmc_mem_read_block +ffffffff828192e0 T sdmmc_mem_write_block_subr +ffffffff82819660 T sdmmc_mem_single_write_block +ffffffff82819730 T sdmmc_mem_write_block +ffffffff82819940 T sdmmc_mem_hibernate_write +ffffffff8281a000 T sdmmc_scsi_cmd +ffffffff8281a200 T sdmmc_minphys +ffffffff8281a280 T sdmmc_scsi_attach +ffffffff8281a4c0 T sdmmc_alloc_ccbs +ffffffff8281a620 T sdmmc_free_ccbs +ffffffff8281a680 T sdmmc_scsi_detach +ffffffff8281a840 T sdmmc_stimeout +ffffffff8281a8e0 T sdmmc_ccb_alloc +ffffffff8281a9a0 T sdmmc_ccb_free +ffffffff8281aaa0 T sdmmc_inquiry +ffffffff8281ad30 T sdmmc_start_xs +ffffffff8281ae50 T sdmmc_complete_xs +ffffffff8281af40 T sdmmc_done_xs +ffffffff8281af90 T sdmmc_scsi_hibernate_io +ffffffff8281c000 T bwfm_sdio_preinit +ffffffff8281c5a0 T bwfm_sdio_txcheck +ffffffff8281c5e0 T bwfm_sdio_txdata +ffffffff8281c660 T bwfm_sdio_txctl +ffffffff8281c7f0 T bwfm_sdio_buscore_read +ffffffff8281c800 T bwfm_sdio_buscore_write +ffffffff8281c820 T bwfm_sdio_buscore_prepare +ffffffff8281c9a0 T bwfm_sdio_buscore_activate +ffffffff8281ca30 T bwfm_sdio_match +ffffffff8281cae0 T bwfm_sdio_attach +ffffffff8281ce80 T bwfm_sdio_detach +ffffffff8281cf00 T bwfm_sdio_task +ffffffff8281d0c0 T bwfm_sdio_write_1 +ffffffff8281d0f0 T bwfm_sdio_read_1 +ffffffff8281d120 T bwfm_sdio_write_4 +ffffffff8281d1f0 T bwfm_sdio_read_4 +ffffffff8281d2b0 T bwfm_sdio_load_microcode +ffffffff8281d5a0 T bwfm_sdio_clkctl +ffffffff8281d6d0 T bwfm_sdio_dev_write +ffffffff8281d720 T bwfm_sdio_intr +ffffffff8281d770 T bwfm_sdio_ram_read_write +ffffffff8281d9f0 T bwfm_sdio_htclk +ffffffff8281dcb0 T bwfm_sdio_readshared +ffffffff8281dda0 T bwfm_sdio_dev_read +ffffffff8281dde0 T bwfm_sdio_rx_frames +ffffffff8281e210 T bwfm_sdio_tx_frames +ffffffff8281e330 T bwfm_sdio_backplane +ffffffff8281e400 T bwfm_sdio_buf_read +ffffffff8281e500 T bwfm_sdio_buf_write +ffffffff8281e5d0 T bwfm_sdio_frame_read_write +ffffffff8281e780 T bwfm_sdio_newbuf +ffffffff8281e810 T bwfm_sdio_tx_ok +ffffffff8281e870 T bwfm_sdio_tx_ctrlframe +ffffffff8281e980 T bwfm_sdio_tx_dataframe +ffffffff8281eaf0 T bwfm_sdio_rx_glom +ffffffff8281f000 T onewire_match +ffffffff8281f060 T onewire_attach +ffffffff8281f120 T onewire_detach +ffffffff8281f190 T onewire_activate +ffffffff8281f1b0 T onewire_scan +ffffffff8281f400 T onewire_createthread +ffffffff8281f470 T onewire_print +ffffffff8281f560 T onewirebus_print +ffffffff8281f5b0 T onewire_lock +ffffffff8281f5d0 T onewire_unlock +ffffffff8281f5f0 T onewire_reset +ffffffff8281f610 T onewire_bit +ffffffff8281f630 T onewire_read_byte +ffffffff8281f7c0 T onewire_write_byte +ffffffff8281f8d0 T onewire_read_block +ffffffff8281f970 T onewire_write_block +ffffffff8281fa10 T onewire_triplet +ffffffff8281fb20 T onewire_matchrom +ffffffff8281fd10 T onewire_search +ffffffff82820180 T onewire_thread +ffffffff82821000 T onewire_crc +ffffffff828210b0 T onewire_crc16 +ffffffff82821170 T onewire_famname +ffffffff828211b0 T onewire_matchbyfam +ffffffff82822000 T owid_match +ffffffff82822030 T owid_attach +ffffffff82822120 T owid_detach +ffffffff82822170 T owid_activate +ffffffff82823000 T owsbm_match +ffffffff82823030 T owsbm_attach +ffffffff82823240 T owsbm_detach +ffffffff828232d0 T owsbm_activate +ffffffff82823300 T owsbm_update +ffffffff82824000 T owtemp_match +ffffffff82824030 T owtemp_attach +ffffffff82824160 T owtemp_detach +ffffffff828241f0 T owtemp_activate +ffffffff82824220 T owtemp_update +ffffffff82825000 T owctr_match +ffffffff82825030 T owctr_attach +ffffffff828251c0 T owctr_detach +ffffffff82825250 T owctr_activate +ffffffff82825280 T owctr_update +ffffffff828252c0 T owctr_update_counter +ffffffff82826000 A __text_page_start +ffffffff82826000 T Xsyscall_meltdown +ffffffff8282600c T Xsyscall +ffffffff82826299 t Xsyscall_trampback +ffffffff828262b0 T intr_user_exit +ffffffff828262f2 t intr_user_exit_post_ast +ffffffff8282644b t Xiretq_trampback +ffffffff82826457 T doreti_iret +ffffffff82827000 T alltraps +ffffffff82827138 T recall_trap +ffffffff82827150 T alltraps_kern +ffffffff82827153 T alltraps_kern_meltdown +ffffffff82828000 ? Xtrap00 +ffffffff82828000 A __kutext_start +ffffffff82828000 A __text_page_end +ffffffff82828010 ? Xtrap01 +ffffffff82828020 ? Xtrap02 +ffffffff82828028 c calltrap_specstk +ffffffff828280f0 ? calltrap_specstk_tramp +ffffffff82828110 ? Xtrap03 +ffffffff82828120 ? Xtrap04 +ffffffff82828130 ? Xtrap05 +ffffffff82828140 ? Xtrap06 +ffffffff82828150 ? Xtrap07 +ffffffff82828160 ? Xtrap08 +ffffffff82828170 ? Xtrap09 +ffffffff82828180 ? Xtrap0a +ffffffff82828190 ? Xtrap0b +ffffffff828281a0 ? Xtrap0c +ffffffff828281b0 ? Xtrap0d +ffffffff82828240 ? Xtrap0e +ffffffff82828250 ? Xintrspurious +ffffffff82828250 ? Xtrap0f +ffffffff82828260 ? Xtrap10 +ffffffff82828270 ? Xtrap11 +ffffffff82828280 ? Xtrap12 +ffffffff82828290 ? Xtrap13 +ffffffff828282a0 ? Xtrap14 +ffffffff828282b0 ? Xtrap15 +ffffffff828282c0 ? Xtrap16 +ffffffff828282c0 ? Xtrap17 +ffffffff828282c0 ? Xtrap18 +ffffffff828282c0 ? Xtrap19 +ffffffff828282c0 ? Xtrap1a +ffffffff828282c0 ? Xtrap1b +ffffffff828282c0 ? Xtrap1c +ffffffff828282c0 ? Xtrap1d +ffffffff828282c0 ? Xtrap1e +ffffffff828282c0 ? Xtrap1f +ffffffff828282d0 ? x2apic_eoi +ffffffff828282f0 ? Xintr_lapic_ipi +ffffffff82828330 ? Xipi_invltlb +ffffffff82828360 ? Xipi_invlpg +ffffffff82828390 ? Xipi_invlrange +ffffffff828283d0 ? Xipi_invltlb_pcid +ffffffff82828410 ? Xipi_invlpg_pcid +ffffffff82828460 ? Xipi_invlrange_pcid +ffffffff828284d0 ? Xintr_lapic_ltimer +ffffffff82828510 ? Xintr_xen_upcall +ffffffff82828550 ? Xintr_hyperv_upcall +ffffffff82828590 ? Xintr_legacy0 +ffffffff828285d0 ? Xintr_legacy1 +ffffffff82828610 ? Xintr_legacy2 +ffffffff82828650 ? Xintr_legacy3 +ffffffff82828690 ? Xintr_legacy4 +ffffffff828286d0 ? Xintr_legacy5 +ffffffff82828710 ? Xintr_legacy6 +ffffffff82828750 ? Xintr_legacy7 +ffffffff82828790 ? Xintr_legacy8 +ffffffff828287d0 ? Xintr_legacy9 +ffffffff82828810 ? Xintr_legacy10 +ffffffff82828850 ? Xintr_legacy11 +ffffffff82828890 ? Xintr_legacy12 +ffffffff828288d0 ? Xintr_legacy13 +ffffffff82828910 ? Xintr_legacy14 +ffffffff82828950 ? Xintr_legacy15 +ffffffff82828990 ? Xintr_ioapic_edge0 +ffffffff828289d0 ? Xintr_ioapic_edge1 +ffffffff82828a10 ? Xintr_ioapic_edge2 +ffffffff82828a50 ? Xintr_ioapic_edge3 +ffffffff82828a90 ? Xintr_ioapic_edge4 +ffffffff82828ad0 ? Xintr_ioapic_edge5 +ffffffff82828b10 ? Xintr_ioapic_edge6 +ffffffff82828b50 ? Xintr_ioapic_edge7 +ffffffff82828b90 ? Xintr_ioapic_edge8 +ffffffff82828bd0 ? Xintr_ioapic_edge9 +ffffffff82828c10 ? Xintr_ioapic_edge10 +ffffffff82828c50 ? Xintr_ioapic_edge11 +ffffffff82828c90 ? Xintr_ioapic_edge12 +ffffffff82828cd0 ? Xintr_ioapic_edge13 +ffffffff82828d10 ? Xintr_ioapic_edge14 +ffffffff82828d50 ? Xintr_ioapic_edge15 +ffffffff82828d90 ? Xintr_ioapic_edge16 +ffffffff82828dd0 ? Xintr_ioapic_edge17 +ffffffff82828e10 ? Xintr_ioapic_edge18 +ffffffff82828e50 ? Xintr_ioapic_edge19 +ffffffff82828e90 ? Xintr_ioapic_edge20 +ffffffff82828ed0 ? Xintr_ioapic_edge21 +ffffffff82828f10 ? Xintr_ioapic_edge22 +ffffffff82828f50 ? Xintr_ioapic_edge23 +ffffffff82828f90 ? Xintr_ioapic_edge24 +ffffffff82828fd0 ? Xintr_ioapic_edge25 +ffffffff82829010 ? Xintr_ioapic_edge26 +ffffffff82829050 ? Xintr_ioapic_edge27 +ffffffff82829090 ? Xintr_ioapic_edge28 +ffffffff828290d0 ? Xintr_ioapic_edge29 +ffffffff82829110 ? Xintr_ioapic_edge30 +ffffffff82829150 ? Xintr_ioapic_edge31 +ffffffff82829190 ? Xintr_ioapic_edge32 +ffffffff828291d0 ? Xintr_ioapic_edge33 +ffffffff82829210 ? Xintr_ioapic_edge34 +ffffffff82829250 ? Xintr_ioapic_edge35 +ffffffff82829290 ? Xintr_ioapic_edge36 +ffffffff828292d0 ? Xintr_ioapic_edge37 +ffffffff82829310 ? Xintr_ioapic_edge38 +ffffffff82829350 ? Xintr_ioapic_edge39 +ffffffff82829390 ? Xintr_ioapic_edge40 +ffffffff828293d0 ? Xintr_ioapic_edge41 +ffffffff82829410 ? Xintr_ioapic_edge42 +ffffffff82829450 ? Xintr_ioapic_edge43 +ffffffff82829490 ? Xintr_ioapic_edge44 +ffffffff828294d0 ? Xintr_ioapic_edge45 +ffffffff82829510 ? Xintr_ioapic_edge46 +ffffffff82829550 ? Xintr_ioapic_edge47 +ffffffff82829590 ? Xintr_ioapic_edge48 +ffffffff828295d0 ? Xintr_ioapic_edge49 +ffffffff82829610 ? Xintr_ioapic_edge50 +ffffffff82829650 ? Xintr_ioapic_edge51 +ffffffff82829690 ? Xintr_ioapic_edge52 +ffffffff828296d0 ? Xintr_ioapic_edge53 +ffffffff82829710 ? Xintr_ioapic_edge54 +ffffffff82829750 ? Xintr_ioapic_edge55 +ffffffff82829790 ? Xintr_ioapic_edge56 +ffffffff828297d0 ? Xintr_ioapic_edge57 +ffffffff82829810 ? Xintr_ioapic_edge58 +ffffffff82829850 ? Xintr_ioapic_edge59 +ffffffff82829890 ? Xintr_ioapic_edge60 +ffffffff828298d0 ? Xintr_ioapic_edge61 +ffffffff82829910 ? Xintr_ioapic_edge62 +ffffffff82829950 ? Xintr_ioapic_edge63 +ffffffff82829990 ? Xintr_ioapic_level0 +ffffffff828299d0 ? Xintr_ioapic_level1 +ffffffff82829a10 ? Xintr_ioapic_level2 +ffffffff82829a50 ? Xintr_ioapic_level3 +ffffffff82829a90 ? Xintr_ioapic_level4 +ffffffff82829ad0 ? Xintr_ioapic_level5 +ffffffff82829b10 ? Xintr_ioapic_level6 +ffffffff82829b50 ? Xintr_ioapic_level7 +ffffffff82829b90 ? Xintr_ioapic_level8 +ffffffff82829bd0 ? Xintr_ioapic_level9 +ffffffff82829c10 ? Xintr_ioapic_level10 +ffffffff82829c50 ? Xintr_ioapic_level11 +ffffffff82829c90 ? Xintr_ioapic_level12 +ffffffff82829cd0 ? Xintr_ioapic_level13 +ffffffff82829d10 ? Xintr_ioapic_level14 +ffffffff82829d50 ? Xintr_ioapic_level15 +ffffffff82829d90 ? Xintr_ioapic_level16 +ffffffff82829dd0 ? Xintr_ioapic_level17 +ffffffff82829e10 ? Xintr_ioapic_level18 +ffffffff82829e50 ? Xintr_ioapic_level19 +ffffffff82829e90 ? Xintr_ioapic_level20 +ffffffff82829ed0 ? Xintr_ioapic_level21 +ffffffff82829f10 ? Xintr_ioapic_level22 +ffffffff82829f50 ? Xintr_ioapic_level23 +ffffffff82829f90 ? Xintr_ioapic_level24 +ffffffff82829fd0 ? Xintr_ioapic_level25 +ffffffff8282a010 ? Xintr_ioapic_level26 +ffffffff8282a050 ? Xintr_ioapic_level27 +ffffffff8282a090 ? Xintr_ioapic_level28 +ffffffff8282a0d0 ? Xintr_ioapic_level29 +ffffffff8282a110 ? Xintr_ioapic_level30 +ffffffff8282a150 ? Xintr_ioapic_level31 +ffffffff8282a190 ? Xintr_ioapic_level32 +ffffffff8282a1d0 ? Xintr_ioapic_level33 +ffffffff8282a210 ? Xintr_ioapic_level34 +ffffffff8282a250 ? Xintr_ioapic_level35 +ffffffff8282a290 ? Xintr_ioapic_level36 +ffffffff8282a2d0 ? Xintr_ioapic_level37 +ffffffff8282a310 ? Xintr_ioapic_level38 +ffffffff8282a350 ? Xintr_ioapic_level39 +ffffffff8282a390 ? Xintr_ioapic_level40 +ffffffff8282a3d0 ? Xintr_ioapic_level41 +ffffffff8282a410 ? Xintr_ioapic_level42 +ffffffff8282a450 ? Xintr_ioapic_level43 +ffffffff8282a490 ? Xintr_ioapic_level44 +ffffffff8282a4d0 ? Xintr_ioapic_level45 +ffffffff8282a510 ? Xintr_ioapic_level46 +ffffffff8282a550 ? Xintr_ioapic_level47 +ffffffff8282a590 ? Xintr_ioapic_level48 +ffffffff8282a5d0 ? Xintr_ioapic_level49 +ffffffff8282a610 ? Xintr_ioapic_level50 +ffffffff8282a650 ? Xintr_ioapic_level51 +ffffffff8282a690 ? Xintr_ioapic_level52 +ffffffff8282a6d0 ? Xintr_ioapic_level53 +ffffffff8282a710 ? Xintr_ioapic_level54 +ffffffff8282a750 ? Xintr_ioapic_level55 +ffffffff8282a790 ? Xintr_ioapic_level56 +ffffffff8282a7d0 ? Xintr_ioapic_level57 +ffffffff8282a810 ? Xintr_ioapic_level58 +ffffffff8282a850 ? Xintr_ioapic_level59 +ffffffff8282a890 ? Xintr_ioapic_level60 +ffffffff8282a8d0 ? Xintr_ioapic_level61 +ffffffff8282a910 ? Xintr_ioapic_level62 +ffffffff8282a950 ? Xintr_ioapic_level63 +ffffffff8282b000 ? codepatch_fill_nop +ffffffff8282b000 A __cptext_start +ffffffff8282b000 A __kutext_end +ffffffff8282b0b0 ? codepatch_maprw +ffffffff8282b1c0 ? codepatch_unmaprw +ffffffff8282b230 ? codepatch_nop +ffffffff8282b3b0 ? codepatch_replace +ffffffff8282b580 ? codepatch_call +ffffffff8282b5a0 ? codepatch_control_flow +ffffffff8282b7c0 ? codepatch_jmp +ffffffff8282c000 A __cptext_end +ffffffff8282c000 A __rodata_start +ffffffff8282c000 C _etext +ffffffff8282c000 C etext +ffffffff8282d000 r seeprom_read +ffffffff8282d004 r icl_mg_pll_find_divisors.div1_vals +ffffffff8282d034 r athn_ac2qid +ffffffff8282d034 r athn_ac2qid +ffffffff8282d034 r athn_ac2qid +ffffffff8282d040 r rtwn_get_rssi.cckoff +ffffffff8282d068 r rsu_ac2qid +ffffffff8282d078 r pckbc_portcmd +ffffffff8282d07c r tht_fifo_write_pad.pad +ffffffff8282d084 r rsu_get_rssi.cckoff +ffffffff8282d0a4 r adlp_n_revids +ffffffff8282d0e8 r apple_iso_trans +ffffffff8282d0f0 r wihap_check_tx.txratetable +ffffffff8282d0f4 r dmamode +ffffffff8282d118 r gen9_edram_size_mb.sets +ffffffff8282d12c r dg2_g12_revid_step_tbl +ffffffff8282e000 r isomappings +ffffffff8282e080 r unimappings +ffffffff8282e230 r replacements +ffffffff82831b41 r apollo_pio_rec +ffffffff8287fb40 r apollo_udma33_tim +ffffffff82895304 r pp_r600_decoded_lanes +ffffffff828cc3ca r cmd680_setup_channel.udma_tbl +ffffffff828d48ee r apollo_udma100_tim +ffffffff828d48f4 r cmd0646_9_tim_udma +ffffffff828e326d r substchar +ffffffff8293ab25 r apollo_udma133_tim +ffffffff8293ab2c r apollo_udma66_tim +ffffffff8293ab56 r cy_pio_rec +ffffffff82940420 R drm_ca +ffffffff82940448 R drm_filtops +ffffffff82940478 R drmread_filtops +ffffffff82941000 r vga_emulops +ffffffff82941048 R vga_stdscreen +ffffffff82941078 R vga_stdscreen_mono +ffffffff829410a8 R vga_stdscreen_bf +ffffffff829410d8 R vga_40lscreen +ffffffff82941108 R vga_40lscreen_mono +ffffffff82941138 R vga_40lscreen_bf +ffffffff82941168 R vga_50lscreen +ffffffff82941198 R vga_50lscreen_mono +ffffffff829411c8 R vga_50lscreen_bf +ffffffff829411f8 R vga_screenlist +ffffffff82941208 R vga_screenlist_mono +ffffffff82941218 R vga_accessops +ffffffff82941278 r i945_wm_info +ffffffff829412b8 r bgansitopc +ffffffff829412c0 r pctoansi +ffffffff82941300 r sdma_offsets +ffffffff82941300 r sdma_offsets +ffffffff82941338 r iha_rate_tbl +ffffffff82941370 r i830_a_wm_info +ffffffff829413a8 r gen9_edram_size_mb.ways +ffffffff82941408 r aggr_periodic_times +ffffffff82941500 r michael_final.pad +ffffffff82941528 r rt_copysa.maskarray +ffffffff82941530 r i915_wm_info +ffffffff82941538 r amdgpu_ih_clientid_jpeg +ffffffff82941538 r amdgpu_ih_clientid_uvds +ffffffff82941538 r amdgpu_ih_clientid_vcns +ffffffff82941538 r amdgpu_ih_clientid_vcns +ffffffff82941538 r amdgpu_ih_clientid_vcns +ffffffff82941568 r jsl_ehl_revids +ffffffff82941578 r vga_setfontset.cmaptabb +ffffffff829415e8 r i830_bc_wm_info +ffffffff82941650 r hsw_activate_psr2.map +ffffffff82941658 r tgl_revids +ffffffff82941690 r __drm_universal_plane_init.default_modifiers +ffffffff829416a0 r iwn_tid2fifo +ffffffff829416b8 r vga_setfontset.cmaptaba +ffffffff829416c0 r crtc_offsets +ffffffff829416c0 r crtc_offsets +ffffffff829416c0 r crtc_offsets +ffffffff82941768 r rtwn_r88e_get_rssi.cckoff +ffffffff82942000 R edid_vendors +ffffffff829422c0 R edid_nvendors +ffffffff829422d0 R edid_products +ffffffff82942330 R edid_nproducts +ffffffff82942340 r _edid_modes +ffffffff82943000 R videomode_list +ffffffff82944080 R videomode_count +ffffffff82945000 r ahc_hard_errors +ffffffff82945080 r critical_sections +ffffffff829450b0 r patches +ffffffff82945d50 r seqprog +ffffffff82947000 r ahc_switch +ffffffff82948000 r termstat_strings +ffffffff82948020 r critical_sections +ffffffff82948060 r seqprog +ffffffff82948d50 r patches +ffffffff8294a000 r ahd_switch +ffffffff8294b000 R aic_switch +ffffffff8294c000 R adw_switch +ffffffff8294d000 R gdt_switch +ffffffff8294e000 R twe_switch +ffffffff8294f000 R ciss_switch +ffffffff8294f030 R ciss_level +ffffffff8294f050 R ciss_stat +ffffffff82950000 R ami_switch +ffffffff82950028 R ami_raw_switch +ffffffff82951000 R mfi_switch +ffffffff82951028 R mfi_pd_switch +ffffffff82951050 r mfi_iop_xscale +ffffffff82951080 r mfi_iop_ppc +ffffffff829510b0 r mfi_iop_gen2 +ffffffff829510e0 r mfi_iop_skinny +ffffffff82951110 r mfi_bbu_indicators +ffffffff82952000 R qlw_switch +ffffffff82953000 R isp_2100_risc_code +ffffffff82965bf0 R isp_2200_risc_code +ffffffff82978990 R isp_2300_risc_code +ffffffff82992408 R qla_switch +ffffffff82992430 r qla_regs_2100 +ffffffff82992460 r qla_regs_2200 +ffffffff82992490 r qla_regs_23XX +ffffffff82993000 R ahci_atascsi_methods +ffffffff82994000 R nvme_switch +ffffffff82994028 r nvme_ops +ffffffff82995000 R mpi_switch +ffffffff82995060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff82995090 r chv_oa_mux_regs +ffffffff829950b0 r fiji_clock_stretcher_lookup_table +ffffffff829950b0 r tonga_clock_stretcher_lookup_table +ffffffff829950d0 r iosf_pci_devices +ffffffff829950f0 r link_speed +ffffffff829950f0 r link_speed +ffffffff82995130 r drm_fb_xfrm.default_dst_pitch +ffffffff82995130 r non_supported_protection +ffffffff82995140 r tgl_uy_revids +ffffffff829952b0 r bwi_phy_noise_11g_rev1 +ffffffff82995320 r cardslot_process_event.antonym_ev +ffffffff829953b0 r gen11_oa_mux_regs +ffffffff82995450 r dpia_to_preferred_enc_id_table +ffffffff829954c0 r ddr2_cycle_tenths +ffffffff82995530 r rtw_intr_rx.ratetbl +ffffffff829955b0 r abm_config +ffffffff82995630 r getbootinfo.ports +ffffffff82995680 r reg_offsets +ffffffff82995690 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff829956a0 r glk_revids +ffffffff829956b0 r init_non_clock_fields.look_up +ffffffff829956c0 r uftdi_8u232am_getrate.roundoff +ffffffff82995720 r zyd_rx_data.rates +ffffffff82995740 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff82995770 r intel_engine_init_tlb_invalidation.gen8_regs +ffffffff829957a0 r bwi_phy_noise_11g +ffffffff829957b0 r hpt366_pio +ffffffff82995810 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff82995830 r ether_crc32_be_update.rev +ffffffff82995830 r rtw_grf5101_mac_crypt.caesar +ffffffff82995880 r snb_b_fdi_train_param +ffffffff82995950 r intel_hpll_vco.elk_vco +ffffffff82995970 r icl_revids +ffffffff829959d0 r pin_offsets +ffffffff829959f0 r amdgpu_ih_srcid_jpeg +ffffffff82995a30 r firmware_list +ffffffff82995a90 r atom_arg_shift +ffffffff82995a90 r atom_arg_shift +ffffffff82995ad0 r pf_syncookie_wstab +ffffffff82995af0 r ieee80211_media_init.mopts +ffffffff82995b50 r add_entropy_words.twist_table +ffffffff82995bf0 r urtw_8225v2_txpwr_cck +ffffffff82995c10 r bwfm_pci_prio2fifo +ffffffff82995c10 r ieee80211_up_to_ac.up_to_ac +ffffffff82995cd0 r paritytab +ffffffff82995cd0 r x86emu_parity_tab +ffffffff82995cf0 r legacy_connector_convert +ffffffff82995d30 r gen7_oa_mux_regs +ffffffff82995d50 r hsw_oa_mux_regs +ffffffff82995d70 r notetab +ffffffff82995d90 r urtw_8225v2_txpwr_cck_ch14 +ffffffff82995db0 r bwi_rf_calibval.rf_calibvals +ffffffff82995e50 r pf_syncookie_msstab +ffffffff82995eb0 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff82995f10 r uath_wme_init.uath_wme_11g +ffffffff82995f50 r gen7_oa_b_counters +ffffffff82996150 r rtwn_iq_calib_run.reg_adda +ffffffff82996170 r nfs_backoff +ffffffff829961b0 r atom_def_dst +ffffffff829961b0 r atom_def_dst +ffffffff829961f0 r sha256_initial_hash_value +ffffffff82996250 r otus_edca_def +ffffffff82996270 r intel_hpll_vco.blb_vco +ffffffff82996350 r epic_pci_subsys_info +ffffffff82996370 r kbl_revids +ffffffff82996390 r atom_arg_mask +ffffffff82996390 r atom_arg_mask +ffffffff829963f0 r butmap +ffffffff82996430 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff82996470 r comsoft.lsrmap +ffffffff829964b0 r xgmi3x16_pcs_err_noncorrectable_mask_reg_aldebaran +ffffffff829964d0 r tulip_mii_phy_readspecific.table +ffffffff82996570 r intel_hpll_vco.pnv_vco +ffffffff829965d0 r dmapageport +ffffffff82996690 r intel_hpll_vco.ctg_vco +ffffffff82996750 r drm_calculate_luminance_range.pre_computed_values +ffffffff82997000 R sili_atascsi_methods +ffffffff82998000 R ncr53c9x_switch +ffffffff82999000 r scf_period +ffffffff8299a000 R siop_script +ffffffff8299a5a0 R lun_switch +ffffffff8299a5d0 R tag_switch +ffffffff8299a660 R load_dsa +ffffffff8299a6c4 R siop_led_on +ffffffff8299a6cc R siop_led_off +ffffffff8299a6d8 R siop_switch +ffffffff8299b000 R ep_vortex_media +ffffffff8299b100 R ep_default_to_media +ffffffff8299c000 R wi_card_ident +ffffffff8299e000 R ucode_table +ffffffff8299f000 r re_revisions +ffffffff8299f290 r re_kstats_tpl +ffffffff829a1000 R smc91cxx_media +ffffffff829a1010 R smc91cxx_mii_bitbang_ops +ffffffff829a2000 R dl10019_mii_bitbang_ops +ffffffff829a2028 R dl10022_mii_bitbang_ops +ffffffff829a3000 R ax88190_mii_bitbang_ops +ffffffff829a5000 R ac97_on_off +ffffffff829a5304 R ac97_mic_select +ffffffff829a5608 R ac97_mono_select +ffffffff829a590c R ac97_source +ffffffff829a5c10 R ac97_volume_stereo +ffffffff829a5c2c R ac97_volume_mono +ffffffff829a5c50 R source_info +ffffffff829a6450 R ac97_ad +ffffffff829a6560 R ac97_ak +ffffffff829a65f0 R ac97_av +ffffffff829a6730 R ac97_rl +ffffffff829a6780 R ac97_cm +ffffffff829a6800 R ac97_cr +ffffffff829a6820 R ac97_cs +ffffffff829a6900 R ac97_cx +ffffffff829a6960 R ac97_dt +ffffffff829a6980 R ac97_em +ffffffff829a69b0 R ac97_es +ffffffff829a69d0 R ac97_is +ffffffff829a69f0 R ac97_ic +ffffffff829a6a70 R ac97_it +ffffffff829a6aa0 R ac97_ns +ffffffff829a6b60 R ac97_ps +ffffffff829a6b90 R ac97_sl +ffffffff829a6bb0 R ac97_st +ffffffff829a6d00 R ac97_vi +ffffffff829a6d30 R ac97_tt +ffffffff829a6db0 R ac97_ti +ffffffff829a6dd0 R ac97_wb +ffffffff829a6df0 R ac97_wo +ffffffff829a6e80 R ac97_ym +ffffffff829a6ed0 R ac97_vendors +ffffffff829a71d0 R ac97enhancement +ffffffff829a72d0 R ac97feature +ffffffff829a8000 R lm_chips +ffffffff829a8020 R lm78_sensors +ffffffff829a81a0 R w83627hf_sensors +ffffffff829a83a0 R w83627ehf_sensors +ffffffff829a85c0 R w83627dhg_sensors +ffffffff829a87c0 R nct6776f_sensors +ffffffff829a8a00 R nct6779d_sensors +ffffffff829a8d60 R w83637hf_sensors +ffffffff829a8f20 R w83697hf_sensors +ffffffff829a90c0 R w83781d_sensors +ffffffff829a9280 R w83782d_sensors +ffffffff829a9480 R w83783s_sensors +ffffffff829a9600 R w83791d_sensors +ffffffff829a9860 R w83792d_sensors +ffffffff829a9ae0 R as99127f_sensors +ffffffff829aa000 r ar5k_known_products +ffffffff829aa110 r ar5111_gain_opt +ffffffff829aa1e0 r ar5112_gain_opt +ffffffff829aa2b0 r ar5k_5ghz_channels +ffffffff829aaa00 r ar5k_2ghz_channels +ffffffff829aaf10 r ar5111_rf +ffffffff829ab350 r ar5112a_rf +ffffffff829ab890 r ar5112_rf +ffffffff829abda0 r ar5413_rf +ffffffff829ac1b0 r ar2413_rf +ffffffff829ac4d0 r ar2425_rf +ffffffff829ac830 r ar5111_rfg +ffffffff829acb30 r ar5112_rfg +ffffffff829ace30 r ar5413_rfg +ffffffff829ad130 r ar2413_rfg +ffffffff829ad430 r ar5k_rt_11a +ffffffff829ad552 r ar5k_rt_11b +ffffffff829ad674 r ar5k_rt_11g +ffffffff829ad796 r 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ar9280_2_0_rx_gain_13db_backoff +ffffffff829b90c0 r ar9280_2_0_rx_gain +ffffffff829b90e0 r ar9280_2_0_tx_gain_high_power +ffffffff829b9100 r ar9280_2_0_tx_gain +ffffffff829b9120 r ar9280_init_from_rom.chainoffset +ffffffff829b9130 r ar9280_2_0_regs +ffffffff829b9190 r ar9280_2_0_vals_5g20 +ffffffff829b9250 r ar9280_2_0_vals_5g40 +ffffffff829b9310 r ar9280_2_0_vals_2g40 +ffffffff829b93d0 r ar9280_2_0_vals_2g20 +ffffffff829b9490 r ar9280_2_0_cm_regs +ffffffff829b9740 r ar9280_2_0_cm_vals +ffffffff829b9c90 r ar9280_2_0_fast_clock_regs +ffffffff829b9cb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff829b9cf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff829b9d30 r ar9280_2_0_serdes_regs +ffffffff829b9d60 r ar9280_2_0_serdes_vals +ffffffff829b9d90 r ar9280_2_0_rx_gain_regs +ffffffff829b9ea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff829ba0b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff829ba2c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff829ba4d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff829ba6e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff829ba8f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff829bab00 r ar9280_2_0_tx_gain_regs +ffffffff829bab40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff829babc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff829bac40 r ar9280_2_0_tx_gain_vals_5g +ffffffff829bacc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff829bb000 r ar9271_ini +ffffffff829bb068 r ar9285_1_2_ini +ffffffff829bb0d0 r ar9280_2_0_serdes +ffffffff829bb0e8 r ar9271_tx_gain_high_power +ffffffff829bb108 r ar9271_tx_gain +ffffffff829bb128 r ar9285_2_0_tx_gain_high_power +ffffffff829bb148 r ar9285_2_0_tx_gain +ffffffff829bb168 r ar9285_1_2_tx_gain_high_power +ffffffff829bb188 r ar9285_1_2_tx_gain +ffffffff829bb1b0 r ar9271_regs +ffffffff829bb410 r ar9271_vals_2g40 +ffffffff829bb8d0 r ar9271_vals_2g20 +ffffffff829bbd90 r ar9271_cm_regs +ffffffff829bc020 r ar9271_cm_vals +ffffffff829bc540 r ar9285_1_2_regs +ffffffff829bc7a0 r ar9285_1_2_vals_2g40 +ffffffff829bcc60 r ar9285_1_2_vals_2g20 +ffffffff829bd120 r ar9285_1_2_cm_regs +ffffffff829bd3a0 r ar9285_1_2_cm_vals +ffffffff829bd890 r ar9280_2_0_serdes_regs +ffffffff829bd8c0 r ar9280_2_0_serdes_vals +ffffffff829bd8f0 r ar9271_tx_gain_regs +ffffffff829bd940 r ar9271_tx_gain_high_power_vals_2g +ffffffff829bd9d0 r ar9271_tx_gain_vals_2g +ffffffff829bda60 r ar9285_1_2_tx_gain_regs +ffffffff829bdab0 r ar9285_2_0_tx_gain_high_power_vals_2g +ffffffff829bdb50 r ar9285_2_0_tx_gain_vals_2g +ffffffff829bdbf0 r ar9285_1_2_tx_gain_high_power_vals_2g +ffffffff829bdc90 r ar9285_1_2_tx_gain_vals_2g +ffffffff829be000 r ar9287_1_1_ini +ffffffff829be068 r ar9280_2_0_serdes +ffffffff829be080 r ar9287_1_1_rx_gain +ffffffff829be0a0 r ar9287_1_1_tx_gain +ffffffff829be0c0 r ar9287_1_1_regs +ffffffff829be120 r ar9287_1_1_vals_2g40 +ffffffff829be1d0 r ar9287_1_1_vals_2g20 +ffffffff829be280 r ar9287_1_1_cm_regs +ffffffff829be560 r ar9287_1_1_cm_vals +ffffffff829beb20 r ar9280_2_0_serdes_regs +ffffffff829beb50 r ar9280_2_0_serdes_vals +ffffffff829beb80 r ar9287_1_1_rx_gain_regs +ffffffff829bed90 r ar9287_1_1_rx_gain_vals_2g +ffffffff829bf1a0 r ar9287_1_1_tx_gain_regs +ffffffff829bf200 r ar9287_1_1_tx_gain_vals_2g +ffffffff829c0000 r athn_rates +ffffffff829c1000 r ar9485_1_1_ini +ffffffff829c1068 r ar9485_1_1_serdes +ffffffff829c1080 r ar9380_2_2_ini +ffffffff829c10e8 r ar9380_2_2_serdes +ffffffff829c1100 r ar9380_2_2_rx_gain_wo_xlna +ffffffff829c1120 r ar9380_2_2_rx_gain +ffffffff829c1140 r ar9485_1_1_rx_gain +ffffffff829c1160 r ar9380_2_2_tx_gain_high_ob_db +ffffffff829c1180 r ar9380_2_2_tx_gain_low_ob_db +ffffffff829c11a0 r ar9380_2_2_tx_gain_high_power +ffffffff829c11c0 r ar9380_2_2_tx_gain +ffffffff829c11e0 r ar9485_1_1_tx_gain +ffffffff829c1200 r ar9485_1_1_regs +ffffffff829c1270 r ar9485_1_1_vals_2g40 +ffffffff829c1350 r ar9485_1_1_vals_2g20 +ffffffff829c1430 r ar9485_1_1_cm_regs +ffffffff829c1720 r ar9485_1_1_cm_vals +ffffffff829c1d00 r ar9485_1_1_serdes_regs +ffffffff829c1d0c r ar9485_1_1_serdes_vals +ffffffff829c1d20 r ar9380_2_2_regs +ffffffff829c1db0 r ar9380_2_2_vals_5g20 +ffffffff829c1ed0 r ar9380_2_2_vals_5g40 +ffffffff829c1ff0 r ar9380_2_2_vals_2g40 +ffffffff829c2110 r ar9380_2_2_vals_2g20 +ffffffff829c2230 r ar9380_2_2_cm_regs +ffffffff829c25d0 r ar9380_2_2_cm_vals +ffffffff829c2d00 r ar9380_2_2_fast_clock_regs +ffffffff829c2d20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff829c2d50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff829c2d74 r ar9380_2_2_serdes_regs +ffffffff829c2d80 r ar9380_2_2_serdes_vals +ffffffff829c2d90 r ar9380_2_2_rx_gain_regs +ffffffff829c2f90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff829c3390 r ar9380_2_2_rx_gain_vals +ffffffff829c3790 r ar9485_1_1_rx_gain_regs +ffffffff829c3890 r ar9485_1_1_rx_gain_vals +ffffffff829c3a90 r ar9380_2_2_tx_gain_regs +ffffffff829c3b60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff829c3d00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff829c3ea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff829c4040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff829c41e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff829c4380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff829c4520 r ar9380_2_2_tx_gain_vals_5g +ffffffff829c46c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff829c4860 r ar9485_1_1_tx_gain_regs +ffffffff829c48f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff829c4a10 r ar9380_def_rom +ffffffff829c4e50 r ar9380_def_rom_h112 +ffffffff829c5290 r ar9380_def_rom_h116 +ffffffff829c56d0 r ar9380_def_rom_x112 +ffffffff829c5b10 r ar9380_def_rom_x113 +ffffffff829c6000 R atw_txthresh_tab_lo +ffffffff829c6050 R atw_txthresh_tab_hi +ffffffff829c60a0 r atw_attach.empty_macaddr +ffffffff829c60b0 r atw_attach.type_strings +ffffffff829c60d0 r atw_rfmd2958_ifn +ffffffff829c6110 r atw_rfmd2958_rf1r +ffffffff829c6150 r atw_rxintr.rate_tbl +ffffffff829c7000 r rtw_identify_sta.empty_macaddr +ffffffff829c8000 r rtwn_set_key.etherzeroaddr +ffffffff829c8010 r rtl8188eu_rf_prog +ffffffff829c8030 r rtl8188ftv_rf_prog +ffffffff829c8050 r rtl8192e_rf_prog +ffffffff829c8080 r rtl8188ce_rf_prog +ffffffff829c80a0 r rtl8188ru_rf_prog +ffffffff829c80c0 r rtl8188cu_rf_prog +ffffffff829c80e0 r rtl8192ce_rf_prog +ffffffff829c8110 r rtl8188ru_txagc +ffffffff829c8170 r rtl8188eu_rf_regs +ffffffff829c8230 r rtl8188eu_rf_vals +ffffffff829c83b0 r rtl8188ftv_rf_regs +ffffffff829c8490 r rtl8188ftv_rf_vals +ffffffff829c8640 r rtl8192e_rf_regs +ffffffff829c8710 r rtl8192e_rf_vals +ffffffff829c88b0 r rtl8192e_rf2_regs +ffffffff829c8950 r rtl8192e_rf2_vals +ffffffff829c8a90 r rtl8192ce_rf1_regs +ffffffff829c8bb0 r rtl8188ce_rf_vals +ffffffff829c8df0 r rtl8188ru_rf_vals +ffffffff829c9030 r rtl8188cu_rf_vals +ffffffff829c9270 r rtl8192ce_rf1_vals +ffffffff829c94b0 r rtl8192ce_rf2_regs +ffffffff829c9500 r rtl8192ce_rf2_vals +ffffffff829c95a0 r rtl8192cu_txagc +ffffffff829ca000 r rt2560_rf2522_r2 +ffffffff829ca040 r rt2560_rf2524_r2 +ffffffff829ca080 r rt2560_rf2525_hi_r2 +ffffffff829ca0c0 r rt2560_rf2525_r2 +ffffffff829ca100 r rt2560_rf2525e_r2 +ffffffff829ca140 r rt2560_rf2526_hi_r2 +ffffffff829ca180 r rt2560_rf2526_r2 +ffffffff829ca1c0 r rt2560_def_bbp +ffffffff829ca200 r rt2560_def_mac +ffffffff829cb000 r rt2661_rf5225_1 +ffffffff829cb300 r rt2661_rf5225_2 +ffffffff829cb600 r rt2661_def_bbp +ffffffff829cb640 r rt2661_def_mac +ffffffff829cc000 r rt2860_rf2850 +ffffffff829cc430 r rt2860_rates +ffffffff829cc4f0 r rt3572_def_rf +ffffffff829cc530 r rt3090_def_rf +ffffffff829cc560 r rt5392_def_rf +ffffffff829cc5e0 r rt3290_def_rf +ffffffff829cc640 r rt5390_def_rf +ffffffff829cc6c0 r rt5390_def_bbp +ffffffff829cc6f0 r rt2860_def_mac +ffffffff829ce000 r acx111_reg +ffffffff829ce040 r acx111_rate_map +ffffffff829cf000 r acx100_reg +ffffffff829cf040 r acx100_txpower_rfmd +ffffffff829cf060 r gen8_rcs_offsets +ffffffff829cf090 r acx100_txpower_maxim +ffffffff829cf0b0 r mtl_rcs_offsets +ffffffff829cf0f0 r digits +ffffffff829cf0f0 r pppdumpb.digits +ffffffff829cf0f0 r pppdumpm.digits +ffffffff829cf140 r hangpic +ffffffff829cf180 r gen11_rcs_offsets +ffffffff829cf1b0 r xehp_rcs_offsets +ffffffff829cf1e0 r dg2_rcs_offsets +ffffffff829cf220 r dg2_xcs_offsets +ffffffff829cf250 r gen12_xcs_offsets +ffffffff829d0000 r trinity_override_mgpg_sequences +ffffffff829d03c0 r voltage_swing_to_pre_emphasis +ffffffff829d03d0 r sgpr_init_compute_shader +ffffffff829d04a0 r intel_hpll_vco.cl_vco +ffffffff829d04c0 r vgpr_init_compute_shader +ffffffff829d1000 r malo_cmd_string.cmds +ffffffff829d10b0 r malo_cmd_string_result.results +ffffffff829d2000 R bwi_vendor_led_act +ffffffff829d200c R bwi_default_led_act +ffffffff829d2010 R bwi_led_duration +ffffffff829d2380 r bwi_sup_bphy +ffffffff829d23c0 r bwi_phy_freq_11g_rev1 +ffffffff829d25c0 r bwi_phy_rotor_11g_rev1 +ffffffff829d26a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff829d26e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff829d2720 r bwi_phy_noise_scale_11g +ffffffff829d2760 r bwi_phy_sigma_sq_11g_rev2 +ffffffff829d27d0 r bwi_phy_sigma_sq_11g_rev7 +ffffffff829d2840 r bwi_phy_delay_11g_rev1 +ffffffff829d2920 r bwi_rf_get_gains.save_phy_regs +ffffffff829d2940 r bwi_rf_lo_find.map +ffffffff829d2960 r bwi_txpower_map_11b +ffffffff829d29a0 r bwi_txpower_map_11g +ffffffff829d29e0 r _bwi_rf_lo_update_11g.rf_atten_list +ffffffff829d2a20 r _bwi_rf_lo_update_11g.rf_atten_init_list +ffffffff829d2a60 r _bwi_rf_lo_update_11g.rf_lo_measure_order +ffffffff829d2aa0 r bwi_rf_set_nrssi_ofs_11g.save_phy_comm_regs +ffffffff829d2ac0 r bwi_bbpid_map +ffffffff829d2af0 r bwi_regwin_count +ffffffff829d2b40 r bwi_clkfreq +ffffffff829d2b58 r bwi_zero_addr +ffffffff829d3000 R ipq8074_ops +ffffffff829d3070 R ipq6018_ops +ffffffff829d30e0 R qca6390_ops +ffffffff829d3150 R qcn9074_ops +ffffffff829d31c0 R wcn6855_ops +ffffffff829d3230 R wcn6750_ops +ffffffff829d32a0 R ath11k_hw_ring_mask_ipq8074 +ffffffff829d32f8 R ath11k_hw_ring_mask_qca6390 +ffffffff829d3350 R ath11k_hw_ring_mask_qcn9074 +ffffffff829d33a8 R ath11k_hw_ring_mask_wcn6750 +ffffffff829d3400 R ath11k_target_ce_config_wlan_ipq8074 +ffffffff829d3510 R ath11k_target_service_to_ce_map_wlan_ipq8074 +ffffffff829d3620 R ath11k_target_service_to_ce_map_wlan_ipq6018 +ffffffff829d3710 R ath11k_target_ce_config_wlan_qca6390 +ffffffff829d37f0 R ath11k_target_service_to_ce_map_wlan_qca6390 +ffffffff829d38b0 R ath11k_target_ce_config_wlan_qcn9074 +ffffffff829d3990 R ath11k_target_service_to_ce_map_wlan_qcn9074 +ffffffff829d3a70 R qwx_host_ce_config_ipq8074 +ffffffff829d3d10 R qwx_host_ce_config_qca6390 +ffffffff829d3e30 R qwx_host_ce_config_qcn9074 +ffffffff829d3ef0 R ipq8074_regs +ffffffff829d3fc4 R qca6390_regs +ffffffff829d4098 R qcn9074_regs +ffffffff829d416c R wcn6855_regs +ffffffff829d4240 R wcn6750_regs +ffffffff829d4320 R qmi_response_type_v01_ei +ffffffff829d4380 R qmi_wlanfw_ind_register_req_msg_v01_ei +ffffffff829d46a0 R qmi_wlanfw_ind_register_resp_msg_v01_ei +ffffffff829d4720 R qmi_wlanfw_host_cap_req_msg_v01_ei +ffffffff829d4aa0 R qmi_wlanfw_host_cap_resp_msg_v01_ei +ffffffff829d4ae0 R qmi_wlanfw_mem_cfg_s_v01_ei +ffffffff829d4b60 R qmi_wlanfw_mem_seg_s_v01_ei +ffffffff829d4c00 R qmi_wlanfw_request_mem_ind_msg_v01_ei +ffffffff829d4c60 R qmi_wlanfw_mem_seg_resp_s_v01_ei +ffffffff829d4d00 R qmi_wlanfw_respond_mem_req_msg_v01_ei +ffffffff829d4d60 R qmi_wlanfw_respond_mem_resp_msg_v01_ei +ffffffff829d4da0 R qmi_wlanfw_cap_req_msg_v01_ei +ffffffff829d4dc0 R qmi_wlanfw_rf_chip_info_s_v01_ei +ffffffff829d4e20 R qmi_wlanfw_rf_board_info_s_v01_ei +ffffffff829d4e60 R qmi_wlanfw_soc_info_s_v01_ei +ffffffff829d4ea0 R qmi_wlanfw_fw_version_info_s_v01_ei +ffffffff829d4f00 R qmi_wlanfw_cap_resp_msg_v01_ei +ffffffff829d51c0 R qmi_wlanfw_bdf_download_req_msg_v01_ei +ffffffff829d53a0 R qmi_wlanfw_bdf_download_resp_msg_v01_ei +ffffffff829d53e0 R qmi_wlanfw_m3_info_req_msg_v01_ei +ffffffff829d5440 R qmi_wlanfw_m3_info_resp_msg_v01_ei +ffffffff829d5480 R qmi_wlanfw_wlan_ini_req_msg_v01_ei +ffffffff829d54e0 R qmi_wlanfw_wlan_ini_resp_msg_v01_ei +ffffffff829d5520 R qmi_wlanfw_ce_tgt_pipe_cfg_s_v01_ei +ffffffff829d55e0 R qmi_wlanfw_ce_svc_pipe_cfg_s_v01_ei +ffffffff829d5660 R qmi_wlanfw_shadow_reg_cfg_s_v01_ei +ffffffff829d56c0 R qmi_wlanfw_shadow_reg_v2_cfg_s_v01_ei +ffffffff829d5700 R qmi_wlanfw_wlan_mode_req_msg_v01_ei +ffffffff829d5780 R qmi_wlanfw_wlan_mode_resp_msg_v01_ei +ffffffff829d57c0 R qmi_wlanfw_wlan_cfg_req_msg_v01_ei +ffffffff829d59a0 R qmi_wlanfw_wlan_cfg_resp_msg_v01_ei +ffffffff829d59e0 r wmi_tlv_policies +ffffffff829d7740 r qwx_hw_mode_pri_map +ffffffff829d7770 r ath11k_hw_params +ffffffff829d7cf0 r hw_srng_config_templ +ffffffff829d7fa8 r ath11k_hw_hal_params_ipq8074 +ffffffff829d7fb8 r ath11k_hw_hal_params_qca6390 +ffffffff829d7fc8 r ath11k_hw_hal_params_wcn6750 +ffffffff829d7fd8 r ath11k_hw_tcl2wbm_rbm_map_ipq8074 +ffffffff829d7fe1 r ath11k_hw_tcl2wbm_rbm_map_wcn6750 +ffffffff829d9000 R uhci_bus_methods +ffffffff829d9030 R uhci_root_ctrl_methods +ffffffff829d9060 R uhci_root_intr_methods +ffffffff829d9090 R uhci_device_ctrl_methods +ffffffff829d90c0 R uhci_device_intr_methods +ffffffff829d90f0 R uhci_device_bulk_methods +ffffffff829d9120 R uhci_device_isoc_methods +ffffffff829d9150 R uhci_devd +ffffffff829d9162 R uhci_confd +ffffffff829d916b R uhci_ifcd +ffffffff829d9174 R uhci_endpd +ffffffff829d917b R uhci_hubd_piix +ffffffff829da000 R revbits +ffffffff829da020 R ohci_bus_methods +ffffffff829da050 R ohci_root_ctrl_methods +ffffffff829da080 R ohci_root_intr_methods +ffffffff829da0b0 R ohci_device_ctrl_methods +ffffffff829da0e0 R ohci_device_intr_methods +ffffffff829da110 R ohci_device_bulk_methods +ffffffff829da140 R ohci_device_isoc_methods +ffffffff829da170 R ohci_devd +ffffffff829da182 R ohci_confd +ffffffff829da18b R ohci_ifcd +ffffffff829da194 R ohci_endpd +ffffffff829da19b R ohci_hubd +ffffffff829db000 R ehci_bus_methods +ffffffff829db030 R ehci_root_ctrl_methods +ffffffff829db060 R ehci_root_intr_methods +ffffffff829db090 R ehci_device_ctrl_methods +ffffffff829db0c0 R ehci_device_intr_methods +ffffffff829db0f0 R ehci_device_bulk_methods +ffffffff829db120 R ehci_device_isoc_methods +ffffffff829db150 R ehci_devd +ffffffff829db162 R ehci_odevd +ffffffff829db16c R ehci_confd +ffffffff829db175 R ehci_ifcd +ffffffff829db17e R ehci_endpd +ffffffff829db185 R ehci_hubd +ffffffff829dc000 R xhci_bus_methods +ffffffff829dc030 R xhci_root_ctrl_methods +ffffffff829dc060 R xhci_root_intr_methods +ffffffff829dc090 R xhci_device_ctrl_methods +ffffffff829dc0c0 R xhci_device_intr_methods +ffffffff829dc0f0 R xhci_device_bulk_methods +ffffffff829dc120 R xhci_device_isoc_methods +ffffffff829dc150 R xhci_devd +ffffffff829dc162 R xhci_confd +ffffffff829dc16b R xhci_ifcd +ffffffff829dc174 R xhci_endpd +ffffffff829dc17b R xhci_endpcd +ffffffff829dc181 R xhci_hubd +ffffffff829df000 R radio_ca +ffffffff829e0000 R ipmi_ca +ffffffff829e1000 R vscsi_ca +ffffffff829e1028 R vscsi_switch +ffffffff829e1050 R vscsi_filtops +ffffffff829e2000 R mpath_ca +ffffffff829e2028 R mpath_switch +ffffffff829e3000 R softraid_ca +ffffffff829e3028 R sr_switch +ffffffff829e4000 r spdmem_basic_types +ffffffff829e40a0 r spdmem_parity_types +ffffffff829e40e0 r spdmem_ddr4_decode.ddr4_chipsize +ffffffff829e5000 R ufshci_switch +ffffffff829e6000 R kstat_rlock_ops +ffffffff829e6010 R kstat_wlock_ops +ffffffff829e6020 R kstat_mutex_ops +ffffffff829e6030 R kstat_cpu_ops +ffffffff829e6040 r kstat_id_tree_RBT_INFO +ffffffff829e6058 R kstat_id_tree_RBT_TYPE +ffffffff829e6060 r kstat_pv_tree_RBT_INFO +ffffffff829e6078 R kstat_pv_tree_RBT_TYPE +ffffffff829e6080 r kstat_nm_tree_RBT_INFO +ffffffff829e6098 R kstat_nm_tree_RBT_TYPE +ffffffff829e7000 r fuse_rd_filtops +ffffffff829e8000 R fusefs_vfsops +ffffffff829e8070 R fusefs_vars +ffffffff829e9000 R fusefs_vops +ffffffff829e9110 R fusefsread_filtops +ffffffff829e9140 R fusefswrite_filtops +ffffffff829e9170 R fusefsvnode_filtops +ffffffff829ea000 r pf_state_tree_RBT_INFO +ffffffff829ea018 R pf_state_tree_RBT_TYPE +ffffffff829ea020 r pf_state_tree_id_RBT_INFO +ffffffff829ea038 R pf_state_tree_id_RBT_TYPE +ffffffff829ea040 r pf_translate_af.zero +ffffffff829eb000 R hfsc_ops +ffffffff829eb038 R ifq_hfsc_ops +ffffffff829eb040 R hfsc_pf_ops +ffffffff829eb088 R pfq_hfsc_ops +ffffffff829ec000 r fqcodel_ops +ffffffff829ec038 R ifq_fqcodel_ops +ffffffff829ec040 r fqcodel_pf_ops +ffffffff829ec088 R pfq_fqcodel_ops +ffffffff829ec090 r codel_intervals +ffffffff829ed000 r pfsync_bulk_req_state_names +ffffffff829ed030 r pfsync_bulk_req_event_names +ffffffff829ed060 r pfsync_qs +ffffffff829ed0d8 r pfsync_kstat_tpl +ffffffff829ed2e0 r pfsync_acts +ffffffff829ee000 r bio_mappings_RBT_INFO +ffffffff829ee018 R bio_mappings_RBT_TYPE +ffffffff829ef000 R hotplugread_filtops +ffffffff829f0000 R dtps_static +ffffffff829f1000 R db_show_all_cmds +ffffffff829f1180 R db_show_cmds +ffffffff829f14c0 R db_boot_cmds +ffffffff829f15a0 R db_command_table +ffffffff829f2000 R ddb_vars +ffffffff829f3000 R audio_ca +ffffffff829f3028 R audioctlread_filtops +ffffffff829f3058 R audiowrite_filtops +ffffffff829f3088 R audioread_filtops +ffffffff829f4000 R midi_ca +ffffffff829f4028 R midiwrite_filtops +ffffffff829f4058 R midiread_filtops +ffffffff829f5000 r mulawtolin16 +ffffffff829f5200 r lintomulaw +ffffffff829f6000 R randomread_filtops +ffffffff829f6030 R randomwrite_filtops +ffffffff829f7000 R video_ca +ffffffff829f7028 R video_filtops +ffffffff829f8000 R cd9660_vfsops +ffffffff829f9000 R cd9660_vops +ffffffff829f9110 R cd9660_specvops +ffffffff829f9220 R cd9660_fifovops +ffffffff829f9330 R cd9660read_filtops +ffffffff829f9360 R cd9660write_filtops +ffffffff829f9390 R cd9660vnode_filtops +ffffffff829fa000 R udf_vfsops +ffffffff829fb000 R udf_vops +ffffffff829fb110 r mon_lens +ffffffff829fc000 r month_days +ffffffff829fd000 R execsw +ffffffff829fe000 r shstrtab +ffffffff829ff000 R copyright +ffffffff829ff0c0 r initpaths +ffffffff82a00000 R sysent +ffffffff82a02000 R bufq_impls +ffffffff82a03000 R kqueueops +ffffffff82a03038 R kqread_filtops +ffffffff82a03068 R proc_filtops +ffffffff82a03098 R file_filtops +ffffffff82a030c8 R timer_filtops +ffffffff82a03100 R sysfilt_ops +ffffffff82a03148 R seltrue_filtops +ffffffff82a03178 R dead_filtops +ffffffff82a031a8 R badfd_filtops +ffffffff82a031d8 r mutex_klistops +ffffffff82a031f0 r rwlock_klistops +ffffffff82a04000 R kv_exec +ffffffff82a05000 R addrmask +ffffffff82a06000 r rw_ops +ffffffff82a07000 r proc_printit.pstat +ffffffff82a08000 R pledge_syscalls +ffffffff82a08a60 r pledgenames +ffffffff82a08cb0 r pledgereq +ffffffff82a09000 r unvname_rbt_RBT_INFO +ffffffff82a09018 R unvname_rbt_RBT_TYPE +ffffffff82a0a000 R sig_filtops +ffffffff82a0a030 R sigprop +ffffffff82a0b000 R kern_vars +ffffffff82a0b2f0 R hw_vars +ffffffff82a0c000 R tc_vars +ffffffff82a0d000 r sys_gettimeofday.zerotz +ffffffff82a0e000 r taskq_sys_name +ffffffff82a0e006 r taskq_sys_mp_name +ffffffff82a0e010 R systq +ffffffff82a0e018 R systqmp +ffffffff82a10000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff82a10010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff82a10020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff82a10030 r gpt_get_fstype.gpt_uuid_linux +ffffffff82a10040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff82a10050 r gpt_get_fstype.gpt_uuid_unused +ffffffff82a10060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff82a10070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff82a11000 r hiballoc_addr_RBT_INFO +ffffffff82a11018 R hiballoc_addr_RBT_TYPE +ffffffff82a12000 R logread_filtops +ffffffff82a13000 r phtree_RBT_INFO +ffffffff82a13018 R phtree_RBT_TYPE +ffffffff82a13020 r pool_lock_ops_rw +ffffffff82a13058 r pool_lock_ops_mtx +ffffffff82a14000 r pselregister.evf +ffffffff82a1400c r pselregister.evff +ffffffff82a15000 R pipe_rfiltops +ffffffff82a15030 R pipe_wfiltops +ffffffff82a15060 R pipe_efiltops +ffffffff82a15090 r pipeops +ffffffff82a16000 R socketops +ffffffff82a17000 R sysvsem_vars +ffffffff82a18000 R char_type +ffffffff82a18100 R ttyread_filtops +ffffffff82a18130 R ttywrite_filtops +ffffffff82a18160 R ttyexcept_filtops +ffffffff82a19000 R ptcread_filtops +ffffffff82a19030 R ptcwrite_filtops +ffffffff82a19060 R ptcexcept_filtops +ffffffff82a1b000 R domains +ffffffff82a1c000 R unixdomain +ffffffff82a1c050 R unixsw +ffffffff82a1d000 R soread_filtops +ffffffff82a1d030 R sowrite_filtops +ffffffff82a1d060 R soexcept_filtops +ffffffff82a1e000 R sun_noname +ffffffff82a1e010 R uipc_usrreqs +ffffffff82a1e0a0 R uipc_dgram_usrreqs +ffffffff82a1e130 R unpstctl_vars +ffffffff82a1e160 R unpsqctl_vars +ffffffff82a1e190 R unpdgctl_vars +ffffffff82a1f000 r namecache_rb_cache_RBT_INFO +ffffffff82a1f018 R namecache_rb_cache_RBT_TYPE +ffffffff82a20000 R generic_filtops +ffffffff82a21000 r buf_rb_bufs_RBT_INFO +ffffffff82a21018 R buf_rb_bufs_RBT_TYPE +ffffffff82a21020 r typename +ffffffff82a22000 R sync_vops +ffffffff82a23000 R vnops +ffffffff82a24000 R spec_vops +ffffffff82a25000 R dead_vops +ffffffff82a26000 R fifo_vops +ffffffff82a26110 R fiforead_filtops +ffffffff82a26140 R fifowrite_filtops +ffffffff82a26170 R fifoexcept_filtops +ffffffff82a27000 R regyear +ffffffff82a27020 R leapyear +ffffffff82a27040 r dos2unix +ffffffff82a27140 r u2l +ffffffff82a27240 r unix2dos +ffffffff82a28008 R msdosfs_vfsops +ffffffff82a29000 R msdosfs_vops +ffffffff82a29110 R msdosfsread_filtops +ffffffff82a29140 R msdosfswrite_filtops +ffffffff82a29170 R msdosfsvnode_filtops +ffffffff82a2a000 r _utf_count +ffffffff82a2b000 R ntfs_vfsops +ffffffff82a2c000 R ntfs_vops +ffffffff82a2d000 R bpfread_filtops +ffffffff82a2d030 R bpf_mbuf_ops +ffffffff82a2e000 r bpf_mem_ops +ffffffff82a2f000 R priq_ops +ffffffff82a2f038 R ifq_priq_ops +ffffffff82a2f040 r ifq_kstat_tpl +ffffffff82a2f180 r ifiq_kstat_tpl +ffffffff82a30000 r ether_crc32_le_update.crctab +ffffffff82a30040 r ether_crc32_be_update.crctab +ffffffff82a31000 r lcp +ffffffff82a31078 r ipcp +ffffffff82a310f0 r ipv6cp +ffffffff82a31168 r chap +ffffffff82a311e0 r pap +ffffffff82a32000 R ifmedia_baudrate_descriptions +ffffffff82a33000 r fcstab +ffffffff82a35000 R tunread_filtops +ffffffff82a35030 R tunwrite_filtops +ffffffff82a36000 R bridge_brport +ffffffff82a37000 R bstp_etheraddr +ffffffff82a38000 r eb_tree_RBT_INFO +ffffffff82a38018 R eb_tree_RBT_TYPE +ffffffff82a39000 r veb_etherbridge_ops +ffffffff82a39028 r veb_pf_ipv4 +ffffffff82a39040 r veb_pf_ipv6 +ffffffff82a3a000 r pipex_pppoe_padding +ffffffff82a3b000 r rn_addmask.normal_chars +ffffffff82a3c000 R route_src +ffffffff82a3c010 R route_usrreqs +ffffffff82a3c0a0 R routedomain +ffffffff82a3c0f0 R routesw +ffffffff82a3d000 R gre_vars +ffffffff82a3d030 r mgre_tree_RBT_INFO +ffffffff82a3d048 R mgre_tree_RBT_TYPE +ffffffff82a3d050 r egre_tree_RBT_INFO +ffffffff82a3d068 R egre_tree_RBT_TYPE +ffffffff82a3d070 r nvgre_ucast_tree_RBT_INFO +ffffffff82a3d088 R nvgre_ucast_tree_RBT_TYPE +ffffffff82a3d090 r nvgre_mcast_tree_RBT_INFO +ffffffff82a3d0a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff82a3d0b0 r eoip_tree_RBT_INFO +ffffffff82a3d0c8 R eoip_tree_RBT_TYPE +ffffffff82a3d0d0 r nvgre_etherbridge_ops +ffffffff82a3e000 r trunk_protos +ffffffff82a3f000 R ethermulticastaddr_slowprotocols +ffffffff82a3f006 R lacp_info_tlv_template +ffffffff82a3f00e R marker_info_tlv_template +ffffffff82a3f012 R marker_response_tlv_template +ffffffff82a3f020 R lacp_timer_funcs +ffffffff82a40000 r lacp_rxm_state_names +ffffffff82a40040 r lacp_rxm_event_names +ffffffff82a40090 r aggr_port_selected_names +ffffffff82a400b0 r lacp_mux_state_names +ffffffff82a400e0 r lacp_mux_event_names +ffffffff82a40128 r lacp_address_slow +ffffffff82a41000 r tpmr_pf_ipv4 +ffffffff82a41018 r tpmr_pf_ipv6 +ffffffff82a42000 r bpe_tree_RBT_INFO +ffffffff82a42018 R bpe_tree_RBT_TYPE +ffffffff82a42020 r bpe_etherbridge_ops +ffffffff82a43000 R pppx_rd_filtops +ffffffff82a43030 R pppx_wr_filtops +ffffffff82a43060 r pppx_ifs_RBT_INFO +ffffffff82a43078 R pppx_ifs_RBT_TYPE +ffffffff82a43080 r pppac_rd_filtops +ffffffff82a430b0 r pppac_wr_filtops +ffffffff82a44000 r vxlan_peers_RBT_INFO +ffffffff82a44018 R vxlan_peers_RBT_TYPE +ffffffff82a44020 r vxlan_etherbridge_ops +ffffffff82a45000 R stoeplitz_cache +ffffffff82a46000 R ieee80211_std_rateset_11a +ffffffff82a46010 R ieee80211_std_rateset_11b +ffffffff82a46020 R ieee80211_std_rateset_11g +ffffffff82a46030 R ieee80211_std_ratesets_11n +ffffffff82a463b0 R ieee80211_std_ratesets_11ac +ffffffff82a466b0 r ieee80211_setbasicrates.basic +ffffffff82a46710 r ieee80211_setmode.chanflags +ffffffff82a46730 r ieee80211_rate2media.rates +ffffffff82a468c0 r ieee80211_media2rate.ieeerates +ffffffff82a47000 r Sbox +ffffffff82a49000 r ieee80211_ioctl.empty_macaddr +ffffffff82a4a000 r ieee80211_find_rxnode.zero +ffffffff82a4a008 r ieee80211_tree_RBT_INFO +ffffffff82a4a020 R ieee80211_tree_RBT_TYPE +ffffffff82a4a028 r ieee80211_ess_tree_RBT_INFO +ffffffff82a4a040 R ieee80211_ess_tree_RBT_TYPE +ffffffff82a4a048 r ieee80211_do_slow_print.merge_print_intvl +ffffffff82a4b020 R ieee80211_edca_table +ffffffff82a4b0e0 R ieee80211_qap_edca_table +ffffffff82a4c000 R ieee80211_mgt_subtype_name +ffffffff82a4c080 R ieee80211_state_name +ffffffff82a4c0b0 R ieee80211_phymode_name +ffffffff82a4d000 r ieee80211_r_ctry +ffffffff82a4dae0 r ieee80211_r_names +ffffffff82a4df80 r ieee80211_r_map +ffffffff82a4f000 R zeroin46_addr +ffffffff82a4f010 R zeroin_addr +ffffffff82a50000 R inetdomain +ffffffff82a50050 R inetsw +ffffffff82a51000 R divertctl_vars +ffffffff82a51030 R divert_usrreqs +ffffffff82a52000 R icmpctl_vars +ffffffff82a53000 R ipctl_vars_unlocked +ffffffff82a53030 R ipctl_vars +ffffffff82a53140 R inetctlerrmap +ffffffff82a54000 R rip_usrreqs +ffffffff82a55000 R tcp_timer_funcs +ffffffff82a56000 R tcp_usrreqs +ffffffff82a56090 R tcp6_usrreqs +ffffffff82a56120 R tcpctl_vars +ffffffff82a57000 R udp_usrreqs +ffffffff82a57090 R udp6_usrreqs +ffffffff82a57120 R udpctl_vars +ffffffff82a58000 R gre_usrreqs +ffffffff82a59000 r ipsec_ids_tree_RBT_INFO +ffffffff82a59018 R ipsec_ids_tree_RBT_TYPE +ffffffff82a59020 r ipsec_ids_flows_RBT_INFO +ffffffff82a59038 R ipsec_ids_flows_RBT_TYPE +ffffffff82a59040 R xformsw +ffffffff82a59158 R xformswNXFORMSW +ffffffff82a5a000 R espctl_vars +ffffffff82a5a050 R ahctl_vars +ffffffff82a5a070 R ipcompctl_vars +ffffffff82a5a090 R ipsecctl_vars +ffffffff82a5b000 R ipseczeroes +ffffffff82a5c000 r carp_set_state.carp_states +ffffffff82a5d000 r Rcon +ffffffff82a5e000 r Te2 +ffffffff82a5e400 r Te3 +ffffffff82a5e800 r Te0 +ffffffff82a5ec00 r Te1 +ffffffff82a5f000 r rcon +ffffffff82a5f030 r Td0 +ffffffff82a5f430 r Td1 +ffffffff82a5f830 r Td2 +ffffffff82a5fc30 r Td3 +ffffffff82a60030 r Td4 +ffffffff82a62000 r K256 +ffffffff82a62100 r sha512_initial_hash_value +ffffffff82a62140 r K512 +ffffffff82a623c0 r sha384_initial_hash_value +ffffffff82a63000 r Blowfish_initstate.initstate +ffffffff82a65000 r cast_sbox1 +ffffffff82a65400 r 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auth_hash_hmac_sha2_512_256 +ffffffff82a6a430 R auth_hash_gmac_aes_128 +ffffffff82a6a478 R auth_hash_gmac_aes_192 +ffffffff82a6a4c0 R auth_hash_gmac_aes_256 +ffffffff82a6a508 R auth_hash_chacha20_poly1305 +ffffffff82a6a550 R comp_algo_deflate +ffffffff82a6b000 r IV +ffffffff82a6c000 r idgen32_ftable +ffffffff82a6d000 r Chacha20_Poly1305_Update.zeroes +ffffffff82a6d010 r pad0 +ffffffff82a6e000 r null_point +ffffffff82a6e020 r base_point +ffffffff82a6f000 R mplsdomain +ffffffff82a70000 R mplsctl_vars +ffffffff82a71000 r nfs_nodetree_RBT_INFO +ffffffff82a71018 R nfs_nodetree_RBT_TYPE +ffffffff82a72000 r nfsread_filtops +ffffffff82a72030 r nfswrite_filtops +ffffffff82a72060 r nfsvnode_filtops +ffffffff82a73000 r nfs_ptimers +ffffffff82a74000 R nfsv2_type +ffffffff82a74030 R nfsv3_type +ffffffff82a74060 R nv2tov_type +ffffffff82a74080 R nv3tov_type +ffffffff82a740a0 R nfsv3_procid +ffffffff82a74100 R nfsv2_procid +ffffffff82a74160 r nfsrv_v3errmap +ffffffff82a74210 r nfsrv_v2errmap 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r inphys +ffffffff82abb000 R iophy_ca +ffffffff82abb028 R iophy_funcs +ffffffff82abb040 r iophys +ffffffff82abc000 R eephy_ca +ffffffff82abc028 R eephy_funcs +ffffffff82abc040 r eephys +ffffffff82abd000 R exphy_ca +ffffffff82abd028 R exphy_funcs +ffffffff82abe000 R rlphy_ca +ffffffff82abe028 R rlphy_funcs +ffffffff82abe040 r rlphys +ffffffff82abf000 R lxtphy_ca +ffffffff82abf028 R lxtphy_funcs +ffffffff82abf040 R lxtphy971_funcs +ffffffff82abf060 r lxtphys +ffffffff82ac0000 R luphy_ca +ffffffff82ac0028 R luphy_funcs +ffffffff82ac0040 r luphys +ffffffff82ac1000 R mtdphy_ca +ffffffff82ac1028 R mtdphy_funcs +ffffffff82ac1040 r mtdphys +ffffffff82ac2000 R icsphy_ca +ffffffff82ac2028 R icsphy_funcs +ffffffff82ac2040 r icsphys +ffffffff82ac3000 R sqphy_ca +ffffffff82ac3028 R sqphy_funcs +ffffffff82ac3040 r sqphys +ffffffff82ac4000 R tqphy_ca +ffffffff82ac4028 R tqphy_funcs +ffffffff82ac4040 r tqphys +ffffffff82ac5000 R ukphy_ca +ffffffff82ac5028 R ukphy_funcs +ffffffff82ac6000 R dcphy_ca +ffffffff82ac6028 R dcphy_funcs +ffffffff82ac7000 R bmtphy_ca +ffffffff82ac7028 R bmtphy_funcs +ffffffff82ac7040 r bmtphys +ffffffff82ac8000 R brgphy_ca +ffffffff82ac8028 R brgphy_copper_funcs +ffffffff82ac8040 R brgphy_fiber_funcs +ffffffff82ac8058 R brgphy_5708s_funcs +ffffffff82ac8070 R brgphy_5709s_funcs +ffffffff82ac8090 r brgphys +ffffffff82ac8300 r brgphy_bcm5401_dspcode.dspcode +ffffffff82ac9000 R xmphy_ca +ffffffff82ac9028 R xmphy_funcs +ffffffff82ac9040 r xmphys +ffffffff82aca000 R amphy_ca +ffffffff82aca028 R amphy_funcs +ffffffff82aca040 r amphys +ffffffff82acb000 R acphy_ca +ffffffff82acb028 R acphy_funcs +ffffffff82acb040 r acphys +ffffffff82acc000 R nsgphy_ca +ffffffff82acc028 R nsgphy_funcs +ffffffff82acc040 r nsgphys +ffffffff82acd000 R urlphy_ca +ffffffff82acd028 R urlphy_funcs +ffffffff82ace000 R rgephy_ca +ffffffff82ace028 R rgephy_funcs +ffffffff82ace040 r rgephys +ffffffff82acf000 R ciphy_ca +ffffffff82acf028 R ciphy_funcs +ffffffff82acf040 r ciphys +ffffffff82ad0000 R ipgphy_ca +ffffffff82ad0028 R ipgphy_funcs +ffffffff82ad0040 r ipgphys +ffffffff82ad1000 R etphy_funcs +ffffffff82ad1018 R etphy_ca +ffffffff82ad1040 r etphys +ffffffff82ad1060 r etphy_dspcode +ffffffff82ad2000 R jmphy_funcs +ffffffff82ad2018 R jmphy_ca +ffffffff82ad2040 r jmphys +ffffffff82ad3000 R atphy_funcs +ffffffff82ad3018 R atphy_ca +ffffffff82ad3040 r atphys +ffffffff82ad4000 r sense_keys +ffffffff82ad4080 r adesc +ffffffff82ad7000 R scsi_readsafe_cmd +ffffffff82ad8000 R scsibus_ca +ffffffff82ad8030 R scsi_quirk_patterns +ffffffff82ad9000 R cd_ca +ffffffff82ad9030 R cd_patterns +ffffffff82ada000 R ch_ca +ffffffff82ada030 R ch_patterns +ffffffff82adb000 R sd_ca +ffffffff82adb030 R sd_patterns +ffffffff82adc000 R st_quirk_patterns +ffffffff82adc210 R st_ca +ffffffff82adc240 R st_patterns +ffffffff82add000 R uk_ca +ffffffff82ade000 R safte_ca +ffffffff82adf000 R ses_ca +ffffffff82ae0000 R sym_ca +ffffffff82ae0028 R sym_mpath_sym_ops +ffffffff82ae0048 R sym_mpath_asym_ops +ffffffff82ae1000 R rdac_ca +ffffffff82ae1028 R rdac_mpath_ops +ffffffff82ae2000 R emc_ca +ffffffff82ae2028 R emc_mpath_ops +ffffffff82ae3000 R hds_ca +ffffffff82ae3028 R hds_mpath_ops +ffffffff82ae4000 R atapiscsi_ca +ffffffff82ae4028 r atapiscsi_switch +ffffffff82ae5000 R wd_ca +ffffffff82ae6000 R atascsi_switch +ffffffff82ae7000 R mainbus_ca +ffffffff82ae8000 R bios_ca +ffffffff82ae9000 R mpbios_ca +ffffffff82ae9030 r loc_where +ffffffff82aea000 R mpbios_icu_table +ffffffff82aeb000 R cpu_ca +ffffffff82aec000 R lapic_timer_intrclock +ffffffff82aed000 R ioapic_ca +ffffffff82aee000 R efifb_ca +ffffffff82aee028 R efifb_screen_list +ffffffff82aef000 R pvbus_ca +ffffffff82af0000 R pvclock_ca +ffffffff82af1000 R vmt_ca +ffffffff82af2000 R xen_ca +ffffffff82af3000 R xs_errors +ffffffff82af4000 R xnf_ca +ffffffff82af5000 R xbf_ca +ffffffff82af5028 R xbf_switch +ffffffff82af6000 R hyperv_ca +ffffffff82af6028 R hv_guid_network +ffffffff82af6038 R hv_guid_ide +ffffffff82af6048 R hv_guid_scsi +ffffffff82af6058 R hv_guid_shutdown +ffffffff82af6068 R hv_guid_timesync +ffffffff82af6078 R hv_guid_heartbeat +ffffffff82af6088 R hv_guid_kvp +ffffffff82af7000 r kvp_pools +ffffffff82af8000 R hvn_ca +ffffffff82af9000 R hvs_ca +ffffffff82af9028 R hvs_switch +ffffffff82afa000 r virtio_device_name +ffffffff82afb000 R vio_ca +ffffffff82afb030 r virtio_net_feature_names +ffffffff82afc000 R vioblk_ca +ffffffff82afc028 R vioblk_switch +ffffffff82afd000 R viomb_ca +ffffffff82afd030 r viomb_feature_names +ffffffff82afe000 R viornd_ca +ffffffff82aff000 R vioscsi_ca +ffffffff82aff028 R vioscsi_switch +ffffffff82aff050 R vioscsi_vq_names +ffffffff82b00000 R vmmci_ca +ffffffff82b01000 R pci_ca +ffffffff82b02000 r pci_quirks +ffffffff82b03000 R pci_subclass_prehistoric +ffffffff82b03050 R pci_subclass_mass_storage +ffffffff82b03160 R pci_subclass_network +ffffffff82b03250 R pci_subclass_display +ffffffff82b032d0 R pci_subclass_multimedia +ffffffff82b03360 R pci_subclass_memory +ffffffff82b033c0 R pci_subclass_bridge +ffffffff82b03510 R pci_subclass_communications +ffffffff82b035d0 R pci_subclass_system +ffffffff82b036c0 R pci_subclass_input +ffffffff82b03770 R pci_subclass_dock +ffffffff82b037c0 R pci_subclass_processor +ffffffff82b03880 R pci_subclass_serialbus +ffffffff82b03990 R pci_subclass_wireless +ffffffff82b03a70 R pci_subclass_i2o +ffffffff82b03aa0 R pci_subclass_satcom +ffffffff82b03b20 R pci_subclass_crypto +ffffffff82b03b80 R pci_subclass_dasp +ffffffff82b03c10 R pci_class +ffffffff82b03e20 r pci_known_vendors +ffffffff82b05410 r pci_known_products +ffffffff82b29000 R vga_pci_ca +ffffffff82b29030 r vga_devs +ffffffff82b2a000 R ahc_pci_ident_table +ffffffff82b2a5d0 R ahc_pci_ca +ffffffff82b2b000 R ahd_pci_ident_table +ffffffff82b2b198 R ahd_num_pci_devs +ffffffff82b2b1a0 R ahd_pci_ca +ffffffff82b2b1d0 r pci_bus_modes +ffffffff82b2b210 r pci_status_strings +ffffffff82b2b250 r pci_status_source +ffffffff82b2b290 r split_status_strings +ffffffff82b2c000 R adw_pci_ca +ffffffff82b2c028 R adw_pci_devices +ffffffff82b2d000 r adw_3550_Default_EEPROM +ffffffff82b2d080 r adw_38C0800_Default_EEPROM +ffffffff82b2d100 r adw_38C1600_Default_EEPROM +ffffffff82b2e000 R adw_asc3550_mcode +ffffffff82b2f3a0 R adw_asc3550_mcode_data +ffffffff82b2f3b0 R adw_asc38C0800_mcode +ffffffff82b30888 R adw_asc38C0800_mcode_data +ffffffff82b308a0 R adw_asc38C1600_mcode +ffffffff82b32160 R adw_asc38C1600_mcode_data +ffffffff82b33000 R twe_pci_ca +ffffffff82b33028 R twe_pci_devices +ffffffff82b34000 R arc_ca +ffffffff82b34028 R arc_switch +ffffffff82b34050 r arc_devices +ffffffff82b34190 r arc_intel +ffffffff82b34198 r arc_marvell +ffffffff82b341a0 r arc_lsi +ffffffff82b341a8 r arc_marvell2 +ffffffff82b35000 R jmb_ca +ffffffff82b35030 r jmb_devices +ffffffff82b36000 R ahci_pci_ca +ffffffff82b36028 R ahci_jmb_ca +ffffffff82b36050 r ahci_devices +ffffffff82b37000 R nvme_pci_ca +ffffffff82b37028 r nvme_msi_blacklist +ffffffff82b38000 R ami_pci_ca +ffffffff82b38030 r ami_pci_subsys +ffffffff82b38270 r ami_pci_vendors +ffffffff82b39000 R mfi_pci_ca +ffffffff82b39030 r mfi_pci_devices +ffffffff82b3a000 R mfii_ca +ffffffff82b3a028 R mfii_switch +ffffffff82b3a050 R mfii_pd_switch +ffffffff82b3a078 R mfii_iop_thunderbolt +ffffffff82b3a088 R mfii_iop_25 +ffffffff82b3a098 R mfii_iop_35 +ffffffff82b3a0b0 R mfii_devices +ffffffff82b3a180 r mfi_bbu_indicators +ffffffff82b3b000 R ips_ca +ffffffff82b3b028 r ips_ids +ffffffff82b3b040 r ips_chips +ffffffff82b3b090 r ips_names +ffffffff82b3b128 r ips_switch +ffffffff82b3b150 r ips_pt_switch +ffffffff82b3c000 R eap_ca +ffffffff82b3c028 R eap1370_hw_if +ffffffff82b3c0e0 R eap1371_hw_if +ffffffff82b3c198 R eap_midi_hw_if +ffffffff82b3c1d0 R eap_devices +ffffffff82b3d000 R auacer_pci_devices +ffffffff82b3d008 R auacer_ca +ffffffff82b3d030 R auacer_hw_if +ffffffff82b3e000 R auich_ca +ffffffff82b3e028 R auich_hw_if +ffffffff82b3e0e0 r auich_devices +ffffffff82b3f000 R azalia_ca +ffffffff82b3f028 R azalia_hw_if +ffffffff82b3f0e0 R azalia_pci_devices +ffffffff82b3f120 r pin_devices +ffffffff82b3f1a0 r line_colors +ffffffff82b3f220 r wtypes +ffffffff82b40000 r azalia_codec_init_dolby_atmos.atmos_init +ffffffff82b40050 r azalia_codec_init_dolby_atmos.atmos_v23_v25 +ffffffff82b41000 R envy_ca +ffffffff82b41028 R envy_hw_if +ffffffff82b410e0 R envy_midi_hw_if +ffffffff82b42000 R emuxki_devices +ffffffff82b42010 R emu_ca +ffffffff82b42038 R emuxki_hw_if +ffffffff82b420f0 r emuxki_recbuf_sz +ffffffff82b42170 r emuxki_recsrc_szreg +ffffffff82b4217c r emuxki_recsrc_bufaddrreg +ffffffff82b42190 r emuxki_rate_to_pitch.logMagTable +ffffffff82b42390 r emuxki_rate_to_pitch.logSlopeTable +ffffffff82b43000 R auixp_pci_devices +ffffffff82b43010 R auixp_ca +ffffffff82b43038 R auixp_hw_if +ffffffff82b44000 R clcs_ca +ffffffff82b44028 R cs4280_hw_if +ffffffff82b440e0 R cs4280_devices +ffffffff82b45000 R yds_ca +ffffffff82b45028 r yds_hw_if +ffffffff82b450e0 r yds_chip_capability_list +ffffffff82b45120 r yds_get_lpfk.lpfkt +ffffffff82b45160 r yds_get_lpfq.lpfqt +ffffffff82b46000 R auvia_ca +ffffffff82b46028 R auvia_hw_if +ffffffff82b460e0 R auvia_devices +ffffffff82b460f0 r auvia_set_params_sub.slottab +ffffffff82b47000 R gdt_pci_ca +ffffffff82b48000 R ciss_pci_ca +ffffffff82b48030 R ciss_pci_devices +ffffffff82b49000 R qlw_pci_ca +ffffffff82b49030 r qlw_devices +ffffffff82b49050 r isp_1040_risc_code +ffffffff82b4e9f0 r isp_1080_risc_code +ffffffff82b56470 r isp_12160_risc_code +ffffffff82b5e000 R qla_pci_ca +ffffffff82b5e030 r qla_devices +ffffffff82b5f000 R qle_ca +ffffffff82b5f028 R qle_switch +ffffffff82b5f050 r qle_devices +ffffffff82b5f070 r isp_2400_risc_code +ffffffff82b8ea50 r isp_2500_risc_code +ffffffff82bc1000 R mpi_pci_ca +ffffffff82bc1030 r mpi_devices +ffffffff82bc2000 R mpii_ca +ffffffff82bc2028 R mpii_switch +ffffffff82bc2050 r mpii_devices +ffffffff82bc3000 R sili_pci_ca +ffffffff82bc3030 r sili_devices +ffffffff82bc4000 R aq_devices +ffffffff82bc4060 R aq_products +ffffffff82bc41d0 R aq_fw1x_ops +ffffffff82bc41f8 R aq_fw2x_ops +ffffffff82bc4220 R aq2_fw_ops +ffffffff82bc4248 R aq_ca +ffffffff82bc5000 R de_ca +ffffffff82bc5030 r tulip_srom_conninfo +ffffffff82bc5120 r tulip_mii_phy_attrlist +ffffffff82bc51e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff82bc5208 r tulip_21040_10baset_only_boardsw +ffffffff82bc5230 r tulip_21040_boardsw +ffffffff82bc5258 r tulip_2114x_isv_boardsw +ffffffff82bc5280 r tulip_21140_smc9332_boardsw +ffffffff82bc52a8 r tulip_21040_auibnc_only_boardsw +ffffffff82bc52d0 r tulip_21140_cogent_em100_boardsw +ffffffff82bc52f8 r tulip_21140_accton_boardsw +ffffffff82bc5320 r tulip_21140_eb_boardsw +ffffffff82bc5348 r tulip_21041_boardsw +ffffffff82bc5370 r tulip_read_macaddr.testpat +ffffffff82bc5380 r tulip_vendors +ffffffff82bc5430 r tulip_media_to_ifmedia +ffffffff82bc5490 r tulip_chipdescs +ffffffff82bc6000 R ep_pci_ca +ffffffff82bc6030 R ep_pci_devices +ffffffff82bc7000 R pcn_ca +ffffffff82bc7028 R pcn_devices +ffffffff82bc7030 r pcn_79c970_rcvfw +ffffffff82bc7050 r pcn_79c970_xmtsp +ffffffff82bc7070 r pcn_79c970_xmtfw +ffffffff82bc7090 r pcn_79c971_rcvfw +ffffffff82bc70b0 r pcn_79c971_xmtsp_sram +ffffffff82bc70d0 r pcn_79c971_xmtsp +ffffffff82bc70f0 r pcn_79c971_xmtfw +ffffffff82bc7110 r pcn_variants +ffffffff82bc8000 R siop_products +ffffffff82bc9000 R siop_pci_ca +ffffffff82bca000 R rdcide_setup +ffffffff82bca005 R rdcide_hold +ffffffff82bca00a R rdcide_udmatim +ffffffff82bca010 R rdcide_udmaclk +ffffffff82bca028 R default_product_desc +ffffffff82bca040 R pciide_intel_products +ffffffff82bca630 R pciide_amd_products +ffffffff82bca690 R pciide_cmd_products +ffffffff82bca730 R pciide_via_products +ffffffff82bca810 R pciide_cypress_products +ffffffff82bca820 R pciide_sis_products +ffffffff82bca870 R pciide_natsemi_products +ffffffff82bca890 R pciide_acer_products +ffffffff82bca8a0 R pciide_triones_products +ffffffff82bca8f0 R pciide_promise_products +ffffffff82bcaac0 R pciide_acard_products +ffffffff82bcab10 R pciide_serverworks_products +ffffffff82bcabb0 R pciide_nvidia_products +ffffffff82bcae80 R pciide_ite_products +ffffffff82bcaea0 R pciide_ati_products +ffffffff82bcaf20 R pciide_jmicron_products +ffffffff82bcaf70 R pciide_phison_products +ffffffff82bcaf80 R pciide_rdc_products +ffffffff82bcaf90 R pciide_vendors +ffffffff82bcb140 R pciide_pci_ca +ffffffff82bcb168 R pciide_jmb_ca +ffffffff82bcb190 r piix_isp_dma +ffffffff82bcb193 r piix_rtc_dma +ffffffff82bcb196 r apollo_pio_set +ffffffff82bcb19b r cmd0643_9_data_tim_pio +ffffffff82bcb1a0 r cmd0643_9_data_tim_dma +ffffffff82bcb1a3 r cmd680_channel_map.init_val +ffffffff82bcb1b1 r cmd680_setup_channel.udma2_tbl +ffffffff82bcb1b8 r cmd680_setup_channel.dma_tbl +ffffffff82bcb1be r cmd680_setup_channel.pio_tbl +ffffffff82bcb1d0 r satalink_ba5_regmap +ffffffff82bcb690 r sii3114_chansetup.channel_names +ffffffff82bcb6b0 r cy_pio_pulse +ffffffff82bcb6c0 r sis_udma133new_tim +ffffffff82bcb6e0 r sis_pio133new_tim +ffffffff82bcb6f4 r sis_dma133new_tim +ffffffff82bcb700 r sis_udma66_tim +ffffffff82bcb706 r sis_udma100new_tim +ffffffff82bcb70c r sis_udma133old_tim +ffffffff82bcb713 r sis_pio_act +ffffffff82bcb718 r sis_pio_rec +ffffffff82bcb71d r natsemi_pio_pulse +ffffffff82bcb722 r natsemi_pio_recover +ffffffff82bcb727 r natsemi_dma_pulse +ffffffff82bcb72a r natsemi_dma_recover +ffffffff82bcb730 r scx200_udma33 +ffffffff82bcb73c r scx200_dma33 +ffffffff82bcb750 r scx200_pio33 +ffffffff82bcb778 r acer_udma +ffffffff82bcb77e r acer_pio +ffffffff82bcb790 r hpt370_pio +ffffffff82bcb7a4 r hpt370_dma +ffffffff82bcb7b0 r hpt370_udma +ffffffff82bcb7d0 r hpt372_pio +ffffffff82bcb7e4 r hpt372_dma +ffffffff82bcb7f0 r hpt372_udma +ffffffff82bcb80c r hpt366_dma +ffffffff82bcb820 r hpt366_udma +ffffffff82bcb840 r hpt374_pio +ffffffff82bcb854 r hpt374_dma +ffffffff82bcb860 r hpt374_udma +ffffffff82bcb87c r pdc2xx_pa +ffffffff82bcb881 r pdc2xx_pb +ffffffff82bcb886 r pdc2xx_dma_mb +ffffffff82bcb889 r pdc2xx_dma_mc +ffffffff82bcb88c r pdc2xx_udma_mc +ffffffff82bcb892 r acard_act_udma +ffffffff82bcb899 r acard_rec_udma +ffffffff82bcb8a0 r acard_udma_conf +ffffffff82bcb8a7 r acard_act_dma +ffffffff82bcb8aa r acard_rec_dma +ffffffff82bcb8ad r acard_act_pio +ffffffff82bcb8b2 r acard_rec_pio +ffffffff82bcb8b7 r nforce_udma +ffffffff82bcb8be r nforce_pio +ffffffff82bcb8c3 r ixp_mdma_timings +ffffffff82bcb8c6 r ixp_pio_timings +ffffffff82bcc000 R ppb_ca +ffffffff82bcd000 R cy_pci_ca +ffffffff82bcd030 R cy_pci_devices +ffffffff82bce000 R rl_pci_ca +ffffffff82bce030 R rl_pci_devices +ffffffff82bcf000 R re_pci_devices +ffffffff82bcf030 R re_pci_ca +ffffffff82bd0000 R vr_ca +ffffffff82bd1000 R txp_ca +ffffffff82bd1030 R txp_devices +ffffffff82bd2000 r cards +ffffffff82bd3000 r format_params +ffffffff82bd31a0 r pixfmt_table +ffffffff82bd3320 r meteor_pixfmt_table +ffffffff82bd4000 R bktr_ca +ffffffff82bd4028 R bktr_hw_if +ffffffff82bd5000 r tuners +ffffffff82bd5170 r freqTable +ffffffff82bd5260 r nabcst +ffffffff82bd52a0 r irccable +ffffffff82bd5310 r hrccable +ffffffff82bd5380 r weurope +ffffffff82bd5420 r jpnbcst +ffffffff82bd5460 r jpncable +ffffffff82bd54c0 r xussr +ffffffff82bd5530 r australia +ffffffff82bd5590 r france +ffffffff82bd6000 R xl_pci_ca +ffffffff82bd6030 R xl_pci_devices +ffffffff82bd7000 R fxp_pci_ca +ffffffff82bd7030 R fxp_pci_devices +ffffffff82bd8000 R em_devices +ffffffff82bd8308 R em_ca +ffffffff82bd8330 r em_counters +ffffffff82bd9000 r em_igp_cable_length_table +ffffffff82bd9100 r em_igp_2_cable_length_table +ffffffff82bda000 R ixgb_devices +ffffffff82bda010 R ixgb_ca +ffffffff82bdb000 R ixgbe_devices +ffffffff82bdb0b8 R ix_ca +ffffffff82bdb0e0 r ix_counters +ffffffff82bdb3e0 r ix_rxq_kstats_tpl +ffffffff82bdb458 r ix_txq_kstats_tpl +ffffffff82bdc000 r ixgbe_mvals_base +ffffffff82bdc060 r ixgbe_mvals_X540 +ffffffff82bdc0c0 r ixgbe_mvals_X550 +ffffffff82bdc120 r ixgbe_mvals_X550EM_x +ffffffff82bdc180 r ixgbe_mvals_X550EM_a +ffffffff82bdf000 R ixl_ca +ffffffff82bdf030 R ixl_port_counters +ffffffff82bdf2c0 R ixl_vsi_counters +ffffffff82bdf380 r ixl_devices +ffffffff82bdf4c0 r ixl_710 +ffffffff82bdf4e8 r ixl_722 +ffffffff82bdf510 r ixl_pf_aq_regs +ffffffff82bdf578 r ixl_710_decrepit +ffffffff82bdf5a0 r ixl_phy_type_map +ffffffff82bdf770 r ixl_speed_type_map +ffffffff82bdf7b0 r ixl_hmc_pack_rxq +ffffffff82bdf830 r ixl_hmc_pack_txq +ffffffff82bdf8a0 r ixl_sfp_ops +ffffffff82bdf8b8 r ixl_qsfp_ops +ffffffff82be0000 r dwqe_pci_devices +ffffffff82be0018 R dwqe_pci_ca +ffffffff82be1000 R xge_ca +ffffffff82be1028 R xge_devices +ffffffff82be1030 r xge_fix_mac +ffffffff82be1110 r xge_xena_dtx_cfg +ffffffff82be1170 r xge_herc_dtx_cfg +ffffffff82be2000 R thtc_ca +ffffffff82be2028 R tht_ca +ffffffff82be2050 r thtc_devices +ffffffff82be2068 r tht_link_state.interval +ffffffff82be3000 R myx_ca +ffffffff82be3028 R myx_devices +ffffffff82be4000 R oce_ca +ffffffff82be4030 R oce_devices +ffffffff82be5000 R dc_pci_ca +ffffffff82be6000 R epic_pci_ca +ffffffff82be6028 R epic_pci_devices +ffffffff82be7000 R ti_pci_ca +ffffffff82be7030 R ti_devices +ffffffff82be8000 R ne_pci_ca +ffffffff82be8030 R ne_pci_prod +ffffffff82be9000 R gem_pci_ca +ffffffff82be9030 R gem_pci_devices +ffffffff82be9050 r gem_promhdr +ffffffff82be9052 r gem_promdat +ffffffff82be905a r gem_promdat2 +ffffffff82bea000 R cas_ca +ffffffff82bea028 R cas_pci_devices +ffffffff82bea030 r cas_promhdr +ffffffff82bea032 r cas_promdat_sun +ffffffff82bea03a r cas_promdat_ns +ffffffff82bea042 r cas_promdat2 +ffffffff82beb000 R sf_pci_ca +ffffffff82beb028 R sf_pci_products +ffffffff82bec000 R sis_ca +ffffffff82bec028 R sis_devices +ffffffff82bed000 R se_devices +ffffffff82bed008 R se_ca +ffffffff82bee000 R mbg_ca +ffffffff82bee030 R mbg_devices +ffffffff82bef000 R uhci_pci_ca +ffffffff82bf0000 R ohci_pci_ca +ffffffff82bf1000 R ehci_pci_ca +ffffffff82bf2000 R xhci_pci_ca +ffffffff82bf3000 R cbb_pci_ca +ffffffff82bf3028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff82bf4000 R skc_devices +ffffffff82bf4030 R skc_ca +ffffffff82bf4058 R sk_ca +ffffffff82bf5000 R mskc_devices +ffffffff82bf50a8 R mskc_ca +ffffffff82bf50d0 R msk_ca +ffffffff82bf5100 r msk_mib +ffffffff82bf6000 R puc_pci_ca +ffffffff82bf7000 R puc_devs +ffffffff82bfc000 R com_puc_ca +ffffffff82bfc030 r puc_port_types +ffffffff82bfd000 R lpt_puc_ca +ffffffff82bfe000 R wi_pci_ca +ffffffff82bfe030 r wi_pci_products +ffffffff82bff000 R an_pci_ca +ffffffff82bff030 R an_pci_devices +ffffffff82c00000 R iwi_devices +ffffffff82c00010 R iwi_ca +ffffffff82c01000 R wpi_ca +ffffffff82c01028 r wpi_devices +ffffffff82c01030 r wpi_rates +ffffffff82c01050 r wpi_rf_gain_5ghz +ffffffff82c010a0 r wpi_dsp_gain_5ghz +ffffffff82c010f0 r wpi_rf_gain_2ghz +ffffffff82c01140 r wpi_dsp_gain_2ghz +ffffffff82c01190 r wpi_pmgt +ffffffff82c01310 r wpi_bands +ffffffff82c02000 R iwn_mcs2ridx +ffffffff82c02020 R iwn_ca +ffffffff82c02050 r iwn_devices +ffffffff82c020e8 r iwn4965_sensitivity_limits +ffffffff82c02124 r iwn5000_sensitivity_limits +ffffffff82c02160 r iwn5150_sensitivity_limits +ffffffff82c0219c r iwn1000_sensitivity_limits +ffffffff82c021d8 r iwn6000_sensitivity_limits +ffffffff82c02214 r iwn2000_sensitivity_limits +ffffffff82c02250 r iwn_fw_errmsg +ffffffff82c02340 r iwn4965_set_txpower.tdiv +ffffffff82c02360 r iwn4965_rf_gain_5ghz +ffffffff82c023d0 r iwn4965_dsp_gain_5ghz +ffffffff82c02440 r iwn4965_dsp_gain_2ghz +ffffffff82c024b0 r iwn_pmgt +ffffffff82c026f0 r iwn4965_post_alive.qid2fifo +ffffffff82c02700 r iwn_bands +ffffffff82c02770 r iwn_rates +ffffffff82c02820 r iwn4965_rf_gain_2ghz +ffffffff82c03000 R iwm_nvm_channels +ffffffff82c03030 R iwm_nvm_channels_8000 +ffffffff82c03070 R iwm_rates +ffffffff82c030d0 R iwm_ht_mcs2ridx +ffffffff82c03110 R iwm_tid_to_ac +ffffffff82c03118 R iwm_ac_to_tx_fifo +ffffffff82c03120 R iwm_nvm_to_read +ffffffff82c03144 r iwm_set_hw_address_8000.reserved_mac +ffffffff82c03180 r iwm_sf_full_timeout +ffffffff82c031b0 r iwm_sf_full_timeout_def +ffffffff82c031e0 r advanced_lookup +ffffffff82c03320 r iwm_devices +ffffffff82c03360 R iwm_ca +ffffffff82c04000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff82c04020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff82c04040 R iwx_qu_b0_hr1_b0 +ffffffff82c04060 R iwx_qu_b0_hr_b0 +ffffffff82c04080 R iwx_ax201_cfg_qu_hr +ffffffff82c040a0 R iwx_qu_c0_hr1_b0 +ffffffff82c040c0 R iwx_qu_c0_hr_b0 +ffffffff82c040e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff82c04100 R iwx_quz_a0_hr1_b0 +ffffffff82c04120 R iwx_ax201_cfg_quz_hr +ffffffff82c04140 R iwx_cfg_so_a0_hr_b0 +ffffffff82c04160 R iwx_cfg_quz_a0_hr_b0 +ffffffff82c04180 R iwx_2ax_cfg_so_gf_a0 +ffffffff82c041a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff82c041c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff82c041e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff82c04200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff82c04220 R iwx_2ax_cfg_so_jf_b0 +ffffffff82c04240 R iwx_nvm_channels_8000 +ffffffff82c04280 R iwx_rates +ffffffff82c042e0 R iwx_mcs2ridx +ffffffff82c04320 R iwx_tid_to_ac +ffffffff82c04328 R iwx_ac_to_tx_fifo +ffffffff82c04330 r iwx_nvm_channels_uhb +ffffffff82c0439e r iwx_is_valid_mac_addr.reserved_mac +ffffffff82c043b0 r iwx_sf_full_timeout +ffffffff82c043e0 r iwx_sf_full_timeout_def +ffffffff82c04410 r advanced_lookup +ffffffff82c04550 r iwx_devices +ffffffff82c04590 r iwx_dev_info_table +ffffffff82c04e18 R iwx_ca +ffffffff82c05000 R qwx_pci_ca +ffffffff82c05028 r qwx_pci_devices +ffffffff82c05030 R qwx_msi_config_one_msi +ffffffff82c05050 R qwx_msi_config +ffffffff82c050c8 r qwx_pci_ops_qca6390 +ffffffff82c050f8 r qwx_pci_ops_qcn9074 +ffffffff82c06000 R cmpci_ca +ffffffff82c06028 R cmpci_hw_if +ffffffff82c060e0 r cmpci_rate_table +ffffffff82c06120 R cmpci_devices +ffffffff82c06130 r cmpci_query_devinfo.mixer_port_names +ffffffff82c06160 r cmpci_query_devinfo.mixer_classes +ffffffff82c07000 R iha_pci_ca +ffffffff82c07028 R iha_switch +ffffffff82c08000 R pcscp_ca +ffffffff82c09000 R bge_ca +ffffffff82c09030 R bge_devices +ffffffff82c091b0 r bge_revisions +ffffffff82c09610 r bge_majorrevs +ffffffff82c09790 r bge_kstat_tpl +ffffffff82c0a000 R bnx_devices +ffffffff82c0a020 R bnx_ca +ffffffff82c0b000 R vge_ca +ffffffff82c0b028 R vge_devices +ffffffff82c0c000 R stge_ca +ffffffff82c0c028 R stge_mii_bitbang_ops +ffffffff82c0c050 R stge_devices +ffffffff82c0d000 R nfe_ca +ffffffff82c0d030 R nfe_devices +ffffffff82c0e000 R et_devices +ffffffff82c0e008 R et_ca +ffffffff82c0f000 R jme_devices +ffffffff82c0f008 R jme_ca +ffffffff82c10000 R age_devices +ffffffff82c10008 R age_ca +ffffffff82c11000 R alc_devices +ffffffff82c11038 R alc_ca +ffffffff82c12000 R ale_devices +ffffffff82c12008 R ale_ca +ffffffff82c13000 R amdpm_ca +ffffffff82c13030 R amdpm_ids +ffffffff82c14000 R bce_ca +ffffffff82c14028 R bce_devices +ffffffff82c15000 R ath_pci_ca +ffffffff82c16000 R athn_pci_ca +ffffffff82c16030 r athn_pci_devices +ffffffff82c17000 R atw_pci_ca +ffffffff82c17028 R atw_pci_devices +ffffffff82c18000 R rtw_pci_ca +ffffffff82c18030 R rtw_pci_products +ffffffff82c19000 R rtwn_pci_ca +ffffffff82c19030 r rtwn_pci_devices +ffffffff82c19040 r rtl8188eu_mac +ffffffff82c191b0 r rtl8192cu_mac +ffffffff82c19310 r rtl8192ce_mac +ffffffff82c19458 r rtl8188eu_bb_prog +ffffffff82c19480 r rtl8723a_bb_prog +ffffffff82c194a8 r rtl8192ce_bb_prog_1t +ffffffff82c194d0 r rtl8192ce_bb_prog_2t +ffffffff82c19500 r rtl8188eu_bb_regs +ffffffff82c19680 r rtl8188eu_bb_vals +ffffffff82c19980 r rtl8188eu_agc_vals +ffffffff82c19b80 r rtl8723a_bb_regs +ffffffff82c19d00 r rtl8723a_bb_vals +ffffffff82c19ff0 r rtl8192ce_agc_vals +ffffffff82c1a270 r rtl8192ce_bb_regs +ffffffff82c1a3f0 r rtl8192ce_bb_vals_1t +ffffffff82c1a6e0 r rtl8192ce_bb_vals_2t +ffffffff82c1b000 R ral_pci_ca +ffffffff82c1b030 R ral_pci_devices +ffffffff82c1c000 R acx_pci_ca +ffffffff82c1c028 R acx_pci_devices +ffffffff82c1d000 R pgt_pci_ca +ffffffff82c1d028 R pgt_pci_devices +ffffffff82c1e000 R malo_pci_ca +ffffffff82c1e028 R malo_pci_devices +ffffffff82c1f000 R bwi_pci_ca +ffffffff82c1f030 R bwi_pci_devices +ffffffff82c20000 R piixpm_ca +ffffffff82c20030 R piixpm_ids +ffffffff82c21000 R vic_ca +ffffffff82c21028 R vic_devices +ffffffff82c22000 R vmx_devices +ffffffff82c22008 R vmx_ca +ffffffff82c22030 r vmx_tx_kstat_tpl +ffffffff82c220d0 r vmx_kstat_rate +ffffffff82c220e0 r vmx_rx_kstat_tpl +ffffffff82c23000 R vmwpvs_ca +ffffffff82c23028 R vmwpvs_switch +ffffffff82c24000 R lii_ca +ffffffff82c24028 R lii_devices +ffffffff82c25000 R ichiic_ca +ffffffff82c25030 R ichiic_ids +ffffffff82c26000 R viapm_ca +ffffffff82c26030 R viapm_ids +ffffffff82c26070 r val_to_temp +ffffffff82c26870 r val_to_uV.mult +ffffffff82c27000 R amdiic_ca +ffffffff82c27028 R amdiic_ids +ffffffff82c28000 R nviic_ca +ffffffff82c28030 R nviic_ids +ffffffff82c29000 R sdhc_pci_ca +ffffffff82c2a000 R kate_ca +ffffffff82c2a030 r kate_proc +ffffffff82c2b000 R km_ca +ffffffff82c2b030 r km_devices +ffffffff82c2c000 R ksmn_ca +ffffffff82c2c030 r ksmn_devices +ffffffff82c2d000 R iosf_pci_ca +ffffffff82c2e000 R itherm_devices +ffffffff82c2e008 R itherm_ca +ffffffff82c2f000 R pchtemp_ca +ffffffff82c2f030 R pchtemp_devices +ffffffff82c30000 R rtsx_pci_ca +ffffffff82c31000 R xspd_ca +ffffffff82c31028 R xspd_devices +ffffffff82c32000 R virtio_pci_ca +ffffffff82c33000 R dwiic_pci_ca +ffffffff82c33030 R dwiic_pci_ids +ffffffff82c34000 R bwfm_pci_ca +ffffffff82c34030 r bwfm_pci_devices +ffffffff82c35000 R ccp_pci_ca +ffffffff82c35030 r ccp_pci_devices +ffffffff82c36000 R bnxt_devices +ffffffff82c36040 R bnxt_ca +ffffffff82c37000 R mcx_ca +ffffffff82c37030 r mcx_devices +ffffffff82c37060 r mcx_rss_config +ffffffff82c370d0 r mcx_eth_cap_map +ffffffff82c372d0 r mcx_ext_eth_cap_map +ffffffff82c373d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff82c373e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82c37400 r mcx_kstat_ppcnt_rfc2819 +ffffffff82c37418 r mcx_kstat_ppcnt_rfc3635 +ffffffff82c37430 r mcx_ppcnt_ieee8023_tpl +ffffffff82c375b0 r mcx_ppcnt_rfc2863_tpl +ffffffff82c376c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82c37870 r mcx_ppcnt_rfc3635_tpl +ffffffff82c379b0 r mcx_kstat_mtmp_tpl +ffffffff82c37a50 r mcx_kstat_mtmp_rate +ffffffff82c37a60 r mcx_queue_kstat_tpl +ffffffff82c38000 R iavf_ca +ffffffff82c38030 r iavf_devices +ffffffff82c38040 r iavf_aq_regs +ffffffff82c380b0 r iavf_link_speeds +ffffffff82c39000 R rge_ca +ffffffff82c39028 R rge_devices +ffffffff82c39040 r rge_phy_config_mac_cfg2_8126.mac_cfg2_a438_value +ffffffff82c39070 r rge_phy_config_mac_cfg2_8126.mac_cfg2_b87e_value +ffffffff82c390c0 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff82c390e0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff82c39140 r rtl8125_mac_cfg3_mcu +ffffffff82c399e0 r rtl8125_mac_cfg5_mcu +ffffffff82c3aa00 r rtl8126_mac_cfg2_mcu +ffffffff82c41a20 r rtl8125_mac_bps +ffffffff82c41e20 r rtl8125b_mac_bps +ffffffff82c42048 r rge_kstats_tpl +ffffffff82c43000 R igc_devices +ffffffff82c43040 R igc_ca +ffffffff82c43070 r igc_counters +ffffffff82c44000 R ngbe_devices +ffffffff82c44008 R ngbe_ca +ffffffff82c45000 R com_pci_ca +ffffffff82c45030 R com_pci_ids +ffffffff82c46000 R ufshci_pci_ca +ffffffff82c47000 r agp_attach.agp_max +ffffffff82c47048 R agp_ca +ffffffff82c48000 R intagp_ca +ffffffff82c49000 r drm_plane_create_rotation_property.props +ffffffff82c4a000 r drm_bridge_priv_state_funcs +ffffffff82c4c000 r color_encoding_name +ffffffff82c4c020 r color_range_name +ffffffff82c4d000 r drm_subpixel_enum_list +ffffffff82c4d060 r drm_dpms_enum_list +ffffffff82c4d0a0 r drm_dvi_i_select_enum_list +ffffffff82c4d0d0 r drm_dvi_i_subconnector_enum_list +ffffffff82c4d100 r drm_tv_mode_enum_list +ffffffff82c4d170 r drm_tv_select_enum_list +ffffffff82c4d1c0 r drm_tv_subconnector_enum_list +ffffffff82c4d210 r drm_dp_subconnector_enum_list +ffffffff82c4d280 r colorspace_names +ffffffff82c4d300 r drm_link_status_enum_list +ffffffff82c4d320 r drm_scaling_mode_enum_list +ffffffff82c4d360 r drm_aspect_ratio_enum_list +ffffffff82c4d390 r drm_content_type_enum_list +ffffffff82c4d3e0 r drm_panel_orientation_enum_list +ffffffff82c4d420 r privacy_screen_enum +ffffffff82c4e000 r drm_crtc_fence_ops +ffffffff82c4f000 r drm_dmt_modes +ffffffff82c51940 r edid_cea_modes_1 +ffffffff82c554d0 r edid_cea_modes_193 +ffffffff82c56180 r edid_quirk_list +ffffffff82c56360 r drm_mode_do_interlace_quirk.cea_interlaced +ffffffff82c563a0 r edid_4k_modes +ffffffff82c56600 r edid_est_modes +ffffffff82c56e00 r est3_modes +ffffffff82c56f60 r stereo_mandatory_modes +ffffffff82c56fe0 r extra_modes +ffffffff82c58000 r drm_encoder_enum_list +ffffffff82c5a000 r drm_fbdev_dma_helper_funcs +ffffffff82c5a010 r drm_fbdev_dma_client_funcs +ffffffff82c5a030 r drm_fbdev_dma_fb_ops +ffffffff82c5b000 r drm_fbdev_generic_helper_funcs +ffffffff82c5b010 r drm_fbdev_generic_client_funcs +ffffffff82c5b030 r drm_fbdev_generic_fb_ops +ffffffff82c5d000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82c5d004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82c5d008 r drm_fb_xrgb8888_to_xrgb1555.dst_pixsize +ffffffff82c5d00c r drm_fb_xrgb8888_to_argb1555.dst_pixsize +ffffffff82c5d010 r drm_fb_xrgb8888_to_rgba5551.dst_pixsize +ffffffff82c5d014 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff82c5d018 r drm_fb_xrgb8888_to_argb8888.dst_pixsize +ffffffff82c5d01c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82c5d020 r drm_fb_xrgb8888_to_argb2101010.dst_pixsize +ffffffff82c5d024 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82c5d028 r drm_fb_xrgb8888_to_xbgr8888.dst_pixsize +ffffffff82c5d02c r drm_fb_xrgb8888_to_abgr8888.dst_pixsize +ffffffff82c5e000 r __drm_format_info.formats +ffffffff82c5f000 R drm_pgops +ffffffff82c60000 r drm_gem_dma_default_funcs +ffffffff82c61000 R drm_gem_fb_funcs +ffffffff82c62000 r drm_ioctls +ffffffff82c64000 r dma_fence_stub_ops +ffffffff82c64040 R dma_fence_array_ops +ffffffff82c64080 R dma_fence_chain_ops +ffffffff82c640c0 R dmabufops +ffffffff82c640f8 R syncfileops +ffffffff82c65000 r drm_plane_type_enum_list +ffffffff82c66000 r tv_modes_parameters +ffffffff82c660c0 r drm_mode_status_names +ffffffff82c66200 r drm_named_modes +ffffffff82c67000 r primary_plane_funcs +ffffffff82c67068 r safe_modeset_formats +ffffffff82c68000 r orientation_data +ffffffff82c6bb20 r lcd800x1280_rightside_up +ffffffff82c6bb38 r lcd720x1280_rightside_up +ffffffff82c6bb50 r lcd800x1280_leftside_up +ffffffff82c6bb68 r lcd1080x1920_leftside_up +ffffffff82c6bb80 r lcd1200x1920_rightside_up +ffffffff82c6bb98 r gpd_micropc +ffffffff82c6bbb0 r gpd_pocket +ffffffff82c6bbc8 r gpd_pocket2 +ffffffff82c6bbe0 r gpd_win +ffffffff82c6bbf8 r gpd_win2 +ffffffff82c6bc10 r lcd1080x1920_rightside_up +ffffffff82c6bc28 r itworks_tw891 +ffffffff82c6bc40 r lcd1600x2560_leftside_up +ffffffff82c6bc58 r lcd1600x2560_rightside_up +ffffffff82c6bc70 r onegx1_pro +ffffffff82c6bc88 r lcd1280x1920_rightside_up +ffffffff82c6bca0 r gpd_onemix2s +ffffffff82c6bcb8 r .compoundliteral +ffffffff82c6bcc8 r .compoundliteral.5 +ffffffff82c6bcf0 r .compoundliteral.9 +ffffffff82c6bd10 r .compoundliteral.17 +ffffffff82c6bd50 r .compoundliteral.21 +ffffffff82c6bd70 r .compoundliteral.23 +ffffffff82c6bd80 r .compoundliteral.25 +ffffffff82c6bd90 r .compoundliteral.29 +ffffffff82c6c000 r drm_gem_prime_dmabuf_ops +ffffffff82c6e000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82c6f000 r drm_dp_phy_name.phy_names +ffffffff82c6f048 r drm_dp_i2c_algo +ffffffff82c6f058 r drm_dp_i2c_lock_ops +ffffffff82c6f070 r dp_aux_bl_ops +ffffffff82c6f090 r dpcd_quirk_list +ffffffff82c6f320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82c70000 R drm_dp_mst_topology_state_funcs +ffffffff82c70020 r drm_dp_mst_req_type_str.req_type_str +ffffffff82c701f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82c70220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82c70278 r drm_dp_mst_i2c_algo +ffffffff82c71000 r rc_parameters_1_2_444 +ffffffff82c715f0 r rc_parameters_pre_scr +ffffffff82c71920 r rc_parameters_1_2_422 +ffffffff82c71df0 r rc_parameters_1_2_420 +ffffffff82c73000 r hdmi_colorimetry_val +ffffffff82c74018 R ttm_bo_vm_ops +ffffffff82c75000 r ttm_range_manager_func +ffffffff82c76018 r ttm_kmap_iter_io_ops +ffffffff82c76030 r ttm_kmap_iter_linear_io_ops +ffffffff82c77000 r ttm_sys_manager_func +ffffffff82c78000 r ttm_kmap_iter_tt_ops +ffffffff82c79000 r drm_sched_fence_ops_scheduled +ffffffff82c79040 r drm_sched_fence_ops_finished +ffffffff82c7a000 R ch7017_ops +ffffffff82c7b000 R ch7xxx_ops +ffffffff82c7b060 r ch7xxx_ids +ffffffff82c7c000 R ivch_ops +ffffffff82c7c060 r backup_addresses +ffffffff82c7d000 R ns2501_ops +ffffffff82c7d060 r mode_agnostic_values +ffffffff82c7d0e0 r ns2501_modes +ffffffff82c7e000 R sil164_ops +ffffffff82c7f000 R tfp410_ops +ffffffff82c80000 r chv_dpll +ffffffff82c80050 r vlv_dpll +ffffffff82c800a0 r g4x_dpll +ffffffff82c800f0 r pch_dpll +ffffffff82c80138 r intel_dp_enc_funcs +ffffffff82c81000 r intel_hdmi_enc_funcs +ffffffff82c82000 r vlv_primary_formats +ffffffff82c82030 r ivb_primary_formats +ffffffff82c82050 r i965_primary_formats +ffffffff82c82070 r i8xx_primary_formats +ffffffff82c82080 r i965_plane_funcs +ffffffff82c820e8 r i8xx_plane_funcs +ffffffff82c83000 r ilk_wm_funcs +ffffffff82c83040 r vlv_wm_funcs +ffffffff82c83080 r g4x_wm_funcs +ffffffff82c830c0 r nop_funcs +ffffffff82c83100 r pnv_wm_funcs +ffffffff82c83140 r i965_wm_funcs +ffffffff82c83180 r i9xx_wm_funcs +ffffffff82c831c0 r i845_wm_funcs +ffffffff82c83200 r cxsr_latency_table +ffffffff82c84000 r gen11_dsi_encoder_funcs +ffffffff82c84020 r gen11_dsi_connector_funcs +ffffffff82c84098 r gen11_dsi_connector_helper_funcs +ffffffff82c840f8 r gen11_dsi_host_ops +ffffffff82c85000 r intel_plane_helper_funcs +ffffffff82c86000 r g4x_audio_funcs +ffffffff82c86018 r ibx_audio_funcs +ffffffff82c86030 r hsw_audio_funcs +ffffffff82c86050 r hdmi_audio_clock +ffffffff82c860c0 r hdmi_aud_ncts_36bpp +ffffffff82c861a0 r hdmi_aud_ncts_30bpp +ffffffff82c86280 r hdmi_aud_ncts_24bpp +ffffffff82c87000 r intel_backlight_device_ops +ffffffff82c87018 r bxt_pwm_funcs +ffffffff82c87048 r cnp_pwm_funcs +ffffffff82c87078 r lpt_pwm_funcs +ffffffff82c870a8 r spt_pwm_funcs +ffffffff82c870d8 r pch_pwm_funcs +ffffffff82c87108 r ext_pwm_funcs +ffffffff82c87138 r vlv_pwm_funcs +ffffffff82c87168 r i965_pwm_funcs +ffffffff82c87198 r i9xx_pwm_funcs +ffffffff82c871c8 r pwm_bl_funcs +ffffffff82c88000 r bdb_blocks +ffffffff82c88160 r adlp_aux_ch_map +ffffffff82c88169 r adls_aux_ch_map +ffffffff82c88170 r rkl_aux_ch_map +ffffffff82c88175 r direct_aux_ch_map +ffffffff82c8817e r translate_iboost.mapping +ffffffff82c88181 r adlp_ddc_pin_map +ffffffff82c8818e r adls_ddc_pin_map +ffffffff82c8819b r rkl_pch_tgp_ddc_pin_map +ffffffff82c881a6 r gen9bc_tgp_ddc_pin_map +ffffffff82c881b1 r icp_ddc_pin_map +ffffffff82c881c0 r cnp_ddc_pin_map +ffffffff82c89000 r mtl_sa_info +ffffffff82c89006 r adlp_sa_info +ffffffff82c8900c r adls_sa_info +ffffffff82c89012 r rkl_sa_info +ffffffff82c89018 r tgl_sa_info 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dg2_hdmi_58000 +ffffffff82cc25c4 r dg2_hdmi_65000 +ffffffff82cc25e8 r dg2_hdmi_71000 +ffffffff82cc260c r dg2_hdmi_74176 +ffffffff82cc2630 r dg2_hdmi_75000 +ffffffff82cc2654 r dg2_hdmi_78750 +ffffffff82cc2678 r dg2_hdmi_85500 +ffffffff82cc269c r dg2_hdmi_88750 +ffffffff82cc26c0 r dg2_hdmi_106500 +ffffffff82cc26e4 r dg2_hdmi_108000 +ffffffff82cc2708 r dg2_hdmi_115500 +ffffffff82cc272c r dg2_hdmi_119000 +ffffffff82cc2750 r dg2_hdmi_135000 +ffffffff82cc2774 r dg2_hdmi_138500 +ffffffff82cc2798 r dg2_hdmi_147160 +ffffffff82cc27bc r dg2_hdmi_148352 +ffffffff82cc27e0 r dg2_hdmi_154000 +ffffffff82cc2804 r dg2_hdmi_162000 +ffffffff82cc2828 r dg2_hdmi_209800 +ffffffff82cc284c r dg2_hdmi_241500 +ffffffff82cc2870 r dg2_hdmi_262750 +ffffffff82cc2894 r dg2_hdmi_267300 +ffffffff82cc28b8 r dg2_hdmi_268500 +ffffffff82cc28dc r dg2_hdmi_296703 +ffffffff82cc2900 r dg2_hdmi_319890 +ffffffff82cc2924 r dg2_hdmi_497750 +ffffffff82cc2948 r dg2_hdmi_592000 +ffffffff82cc296c r dg2_hdmi_593407 +ffffffff82cc3000 r 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r ntsc_j_csc_svideo +ffffffff82cc5b44 r pal_m_levels_composite +ffffffff82cc5b4a r pal_m_levels_svideo +ffffffff82cc5b50 r pal_m_csc_composite +ffffffff82cc5b68 r pal_m_csc_svideo +ffffffff82cc5b80 r pal_n_levels_composite +ffffffff82cc5b86 r pal_n_levels_svideo +ffffffff82cc5b8c r pal_n_csc_composite +ffffffff82cc5ba4 r pal_n_csc_svideo +ffffffff82cc5bbc r pal_levels_composite +ffffffff82cc5bc2 r pal_levels_svideo +ffffffff82cc5bc8 r pal_csc_composite +ffffffff82cc5be0 r pal_csc_svideo +ffffffff82cc5bf8 r component_levels +ffffffff82cc5bfe r sdtv_csc_yprpb +ffffffff82cc5c16 r hdtv_csc_yprpb +ffffffff82cc5c30 r input_res_table +ffffffff82cc6000 r calculate_rc_params.ofs_und4 +ffffffff82cc600f r calculate_rc_params.ofs_und6.1 +ffffffff82cc601e r calculate_rc_params.ofs_und12 +ffffffff82cc602d r calculate_rc_params.ofs_und15 +ffffffff82cc8000 r gen12_plane_funcs +ffffffff82cc8068 r skl_plane_funcs +ffffffff82cc80d0 r icl_program_input_csc.input_csc_matrix +ffffffff82cc8110 r icl_hdr_plane_formats +ffffffff82cc8190 r icl_sdr_y_plane_formats +ffffffff82cc81f0 r icl_sdr_uv_plane_formats +ffffffff82cc8260 r glk_planar_formats +ffffffff82cc82b0 r skl_plane_formats +ffffffff82cc82f0 r skl_planar_formats +ffffffff82cc9000 r skl_wm_funcs +ffffffff82cc9040 r intel_dbuf_funcs +ffffffff82cc9050 r adlp_allowed_dbufs +ffffffff82cc90c0 r dg2_allowed_dbufs +ffffffff82cc9120 r tgl_allowed_dbufs +ffffffff82cc9180 r icl_allowed_dbufs +ffffffff82cca000 r intel_dsi_funcs +ffffffff82cca020 r intel_dsi_host_ops +ffffffff82cca038 r intel_dsi_connector_funcs +ffffffff82cca0b0 r intel_dsi_connector_helper_funcs +ffffffff82ccb000 r lfsr_converts +ffffffff82ccc000 r clflush_ops ffffffff82ccd000 r create_extensions -ffffffff82cce000 r i915_dmabuf_ops -ffffffff82ccf000 r execbuf_extensions -ffffffff82ccf010 r user_ring_map -ffffffff82cd0000 r i915_gem_object_internal_ops -ffffffff82cd1000 r i915_gem_object_funcs -ffffffff82cd2000 R i915_gem_shmem_ops -ffffffff82cd2080 r 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get_reset_domain.engine_reset_domains.40 +ffffffff82cde26c r engine_class_guc_class_map +ffffffff82cde280 r intel_engine_init_tlb_invalidation.gen12_regs +ffffffff82cde2a0 r intel_engine_init_tlb_invalidation.xehp_regs +ffffffff82cde2c0 r intel_engine_init_tlb_invalidation.xelpmp_regs +ffffffff82cde2e0 r __cs_pending_mi_force_wakes._reg +ffffffff82cdf000 r wf_ops +ffffffff82ce0000 r intel_engine_class_repr.uabi_names +ffffffff82ce0030 r uabi_classes +ffffffff82ce003c r legacy_ring_idx.map +ffffffff82ce1000 r execlists_context_ops +ffffffff82ce1090 r virtual_context_ops +ffffffff82ce2000 r xelpmp_oaddrm_steering_table +ffffffff82ce2020 r xelpg_instance0_steering_table +ffffffff82ce2070 r xelpg_l3bank_steering_table +ffffffff82ce2080 r xelpg_dss_steering_table +ffffffff82ce20d0 r pvc_instance0_steering_table +ffffffff82ce2140 r xehpsdv_mslice_steering_table +ffffffff82ce2160 r dg2_lncf_steering_table +ffffffff82ce2180 r xehpsdv_lncf_steering_table +ffffffff82ce21a0 r xehpsdv_gam_steering_table +ffffffff82ce21c0 r icl_l3bank_steering_table +ffffffff82ce21d0 r intel_steering_types +ffffffff82ce3000 r wf_ops +ffffffff82ce4000 r gen12_rcs_offsets +ffffffff82ce4090 r gen9_rcs_offsets +ffffffff82ce4110 r gen9_xcs_offsets +ffffffff82ce4190 r gen8_xcs_offsets +ffffffff82ce5000 r mtl_mocs_table +ffffffff82ce5080 r pvc_mocs_table +ffffffff82ce50a0 r dg2_mocs_table +ffffffff82ce50c0 r xehpsdv_mocs_table +ffffffff82ce52c0 r dg1_mocs_table +ffffffff82ce54c0 r tgl_mocs_table +ffffffff82ce56c0 r gen12_mocs_table +ffffffff82ce58c0 r icl_mocs_table +ffffffff82ce5ac0 r skl_mocs_table +ffffffff82ce5cc0 r broxton_mocs_table +ffffffff82ce5ce0 r mocs_offset.offset +ffffffff82ce6000 r intel_region_lmem_ops +ffffffff82ce8000 r ring_context_ops +ffffffff82ce9000 r cparams +ffffffff82cea000 r mcr_ranges_xehp +ffffffff82cea070 r mcr_ranges_gen12 +ffffffff82cea0a0 r mcr_ranges_gen8 +ffffffff82cec000 r engine_class_guc_class_map +ffffffff82ced028 r guc_class_engine_class_map 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mtl_info +ffffffff82cfe000 r oa_formats +ffffffff82cfe0f0 r gen8_update_reg_state_unlocked.flex_regs +ffffffff82cfe110 r gen8_oa_mux_regs +ffffffff82cfe130 r xehp_oa_b_counters +ffffffff82cfe150 r gen12_oa_b_counters +ffffffff82cfe190 r mtl_oam_b_counters +ffffffff82cfe1c0 r mtl_oa_mux_regs +ffffffff82cfe1f0 r gen12_oa_mux_regs +ffffffff82cff000 r i915_query_funcs +ffffffff82d00000 R i915_fence_ops +ffffffff82d01000 r rsgt_ops +ffffffff82d02000 r fence_ops +ffffffff82d03000 r i915_ttm_buddy_manager_func +ffffffff82d04000 r bind_ops +ffffffff82d05000 r nop_clock_gating_funcs +ffffffff82d05008 r pvc_clock_gating_funcs +ffffffff82d05010 r dg2_clock_gating_funcs +ffffffff82d05018 r xehpsdv_clock_gating_funcs +ffffffff82d05020 r adlp_clock_gating_funcs +ffffffff82d05028 r gen12lp_clock_gating_funcs +ffffffff82d05030 r icl_clock_gating_funcs +ffffffff82d05038 r cfl_clock_gating_funcs +ffffffff82d05040 r skl_clock_gating_funcs +ffffffff82d05048 r kbl_clock_gating_funcs +ffffffff82d05050 r bxt_clock_gating_funcs +ffffffff82d05058 r glk_clock_gating_funcs +ffffffff82d05060 r bdw_clock_gating_funcs +ffffffff82d05068 r chv_clock_gating_funcs +ffffffff82d05070 r hsw_clock_gating_funcs +ffffffff82d05078 r ivb_clock_gating_funcs +ffffffff82d05080 r vlv_clock_gating_funcs +ffffffff82d05088 r gen6_clock_gating_funcs +ffffffff82d05090 r ilk_clock_gating_funcs +ffffffff82d05098 r g4x_clock_gating_funcs +ffffffff82d050a0 r i965gm_clock_gating_funcs +ffffffff82d050a8 r i965g_clock_gating_funcs +ffffffff82d050b0 r gen3_clock_gating_funcs +ffffffff82d050b8 r i85x_clock_gating_funcs +ffffffff82d050c0 r i830_clock_gating_funcs +ffffffff82d06000 r platform_names +ffffffff82d06140 r subplatform_ult_ids +ffffffff82d061a4 r no_display +ffffffff82d07000 r intel_region_map +ffffffff82d09000 r dg2_g10_revid_step_tbl +ffffffff82d09030 r dg2_g11_revid_step_tbl +ffffffff82d09050 r xehpsdv_revids +ffffffff82d09080 r adlp_rplp_revids +ffffffff82d090a0 r adlp_revids +ffffffff82d090e0 r adls_rpls_revids +ffffffff82d09120 r adls_revids +ffffffff82d09160 r rkl_revids +ffffffff82d09180 r bxt_revids +ffffffff82d091c0 r skl_revids +ffffffff82d091f0 r pvc_bd_subids +ffffffff82d09210 r pvc_ct_subids +ffffffff82d0b000 r forcewake_domain_names +ffffffff82d0b080 r __mtl_fw_ranges +ffffffff82d0b1f0 r mtl_shadowed_regs +ffffffff82d0b270 r __pvc_fw_ranges +ffffffff82d0b420 r pvc_shadowed_regs +ffffffff82d0b540 r __dg2_fw_ranges +ffffffff82d0b810 r dg2_shadowed_regs +ffffffff82d0b930 r __xehp_fw_ranges +ffffffff82d0bc00 r gen12_shadowed_regs +ffffffff82d0bd20 r __gen12_fw_ranges +ffffffff82d0bf30 r __gen11_fw_ranges +ffffffff82d0c0e0 r gen11_shadowed_regs +ffffffff82d0c1a0 r __gen9_fw_ranges +ffffffff82d0c320 r gen8_shadowed_regs +ffffffff82d0c350 r __chv_fw_ranges +ffffffff82d0c410 r __gen6_fw_ranges +ffffffff82d0c420 r __vlv_fw_ranges +ffffffff82d0c478 r uncore_get_fallback +ffffffff82d0c480 r uncore_get_normal +ffffffff82d0c488 r uncore_get_thread_status +ffffffff82d0c490 r __xelpmp_fw_ranges +ffffffff82d0c5c0 r xelpmp_shadowed_regs +ffffffff82d0d000 r i915_pxp_tee_component_ops +ffffffff82d0e000 r intel_dram_type_str.str +ffffffff82d0f000 r atom_op_names +ffffffff82d0f3e0 r opcode_table +ffffffff82d0fb90 r atom_dst_to_src +ffffffff82d0fc10 r atom_io_names +ffffffff82d0fc40 r atom_table_names +ffffffff82d0fe90 r atom_iio_len +ffffffff82d10000 r atombios_helper_funcs +ffffffff82d10080 r vga_control_regs +ffffffff82d11000 r voltage_names +ffffffff82d11020 r pre_emph_names +ffffffff82d12000 r radeon_atom_backlight_ops +ffffffff82d12018 r radeon_atom_enc_funcs +ffffffff82d12038 r radeon_atom_dig_helper_funcs +ffffffff82d120a0 r radeon_atom_dac_helper_funcs +ffffffff82d12108 r radeon_atom_ext_helper_funcs +ffffffff82d13000 r caicos_cgcg_cgls_default +ffffffff82d13240 r barts_mgcg_default +ffffffff82d13900 r turks_mgcg_default +ffffffff82d13d80 r caicos_mgcg_default +ffffffff82d14110 r turks_sysls_default +ffffffff82d141d0 r caicos_sysls_default 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ci_SECT_CONTEXT_def_2 +ffffffff82d1a160 r ci_SECT_CONTEXT_def_7 +ffffffff82d1a510 r cik_default_state +ffffffff82d1c000 r dce3_2_afmt_write_sad_regs.eld_reg_to_type +ffffffff82d1d000 r dce6_afmt_write_sad_regs.eld_reg_to_type +ffffffff82d1e000 r ni_tx_offsets +ffffffff82d1e020 r evergreen_dp_offsets +ffffffff82d1e040 r evergreen_disp_int_status +ffffffff82d1e060 r evergreen_golden_registers +ffffffff82d1e260 r evergreen_golden_registers2 +ffffffff82d1e310 r cypress_mgcg_init +ffffffff82d1ea10 r juniper_mgcg_init +ffffffff82d1ee80 r redwood_mgcg_init +ffffffff82d1f1b0 r cedar_golden_registers +ffffffff82d1f390 r cedar_mgcg_init +ffffffff82d1f5f0 r wrestler_golden_registers +ffffffff82d1f840 r supersumo_golden_registers +ffffffff82d1fba0 r sumo_golden_registers +ffffffff82d1fbe0 r barts_golden_registers +ffffffff82d1fe00 r turks_golden_registers +ffffffff82d20040 r caicos_golden_registers +ffffffff82d20280 r sumo_rlc_save_restore_register_list +ffffffff82d203d0 r evergreen_cs_data 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dvst_golden_registers2 +ffffffff82d29890 r scrapper_golden_registers +ffffffff82d29d70 r tn_rlc_save_restore_register_list +ffffffff82d29f60 r cayman_cs_data +ffffffff82d29fa0 r SECT_CONTEXT_defs +ffffffff82d2a020 r SECT_CLEAR_defs +ffffffff82d2a040 r SECT_CTRLCONST_defs +ffffffff82d2a060 r SECT_CONTEXT_def_2 +ffffffff82d2a080 r SECT_CONTEXT_def_4 +ffffffff82d2a210 r SECT_CONTEXT_def_5 +ffffffff82d2a230 r SECT_CONTEXT_def_1 +ffffffff82d2a9d0 r SECT_CONTEXT_def_3 +ffffffff82d2aab0 r SECT_CONTEXT_def_6 +ffffffff82d2ab90 r SECT_CONTEXT_def_7 +ffffffff82d2b018 r SECT_CLEAR_def_1 +ffffffff82d2b024 r SECT_CTRLCONST_def_1 +ffffffff82d2b030 r cayman_default_state +ffffffff82d2c000 r cac_weights_cayman_xt +ffffffff82d2c128 r cac_weights_cayman_pro +ffffffff82d2c250 r cac_weights_cayman_le +ffffffff82d2c380 r cayman_cgcg_cgls_default +ffffffff82d2c5c0 r cayman_mgcg_default +ffffffff82d2cf20 r cayman_sysls_default +ffffffff82d2cff0 r cayman_cgcg_cgls_enable +ffffffff82d2d240 r cayman_cgcg_cgls_disable +ffffffff82d2d4a0 r cayman_mgcg_enable +ffffffff82d2d520 r cayman_mgcg_disable +ffffffff82d2d5a0 r cayman_sysls_enable +ffffffff82d2d670 r cayman_sysls_disable +ffffffff82d2e000 r rn50_reg_safe_bm +ffffffff82d2e1a0 r r100_reg_safe_bm +ffffffff82d2f000 r r200_reg_safe_bm +ffffffff82d30000 r r300_reg_safe_bm +ffffffff82d31000 r r420_reg_safe_bm +ffffffff82d33000 r color_formats_table +ffffffff82d33480 r r600_reg_safe_bm +ffffffff82d36000 R r600_utc +ffffffff82d36040 R r600_dtc +ffffffff82d36080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82d38000 r r100_gfx_ring +ffffffff82d38070 r r300_gfx_ring +ffffffff82d380e0 r rv515_gfx_ring +ffffffff82d38150 r r600_gfx_ring +ffffffff82d381c0 r r600_dma_ring +ffffffff82d38230 r rv6xx_uvd_ring +ffffffff82d382a0 r rv770_uvd_ring +ffffffff82d38310 r evergreen_gfx_ring +ffffffff82d38380 r evergreen_dma_ring +ffffffff82d383f0 r cayman_gfx_ring +ffffffff82d38460 r cayman_dma_ring +ffffffff82d384d0 r cayman_uvd_ring +ffffffff82d38540 r trinity_vce_ring +ffffffff82d385b0 r si_gfx_ring +ffffffff82d38620 r si_dma_ring +ffffffff82d38690 r ci_gfx_ring +ffffffff82d38700 r ci_cp_ring +ffffffff82d38770 r ci_dma_ring +ffffffff82d387e0 r ci_vce_ring +ffffffff82d39000 r object_connector_convert +ffffffff82d39060 r supported_devices_connector_convert +ffffffff82d390a0 r supported_devices_connector_object_id_convert +ffffffff82d390c0 r thermal_controller_names +ffffffff82d39100 r pp_lib_thermal_controller_names +ffffffff82d3a000 r pin_offsets +ffffffff82d3a020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff82d3c000 r thermal_controller_names +ffffffff82d3c020 r default_primarydac_adj +ffffffff82d3c120 r default_tvdac_adj +ffffffff82d3c220 r default_tmds_pll +ffffffff82d3d000 r radeon_dp_connector_funcs +ffffffff82d3d078 r radeon_dp_connector_helper_funcs +ffffffff82d3d0d8 r radeon_lvds_bridge_connector_funcs +ffffffff82d3d150 r radeon_vga_connector_funcs +ffffffff82d3d1c8 r radeon_vga_connector_helper_funcs +ffffffff82d3d228 r radeon_dvi_connector_funcs +ffffffff82d3d2a0 r radeon_dvi_connector_helper_funcs +ffffffff82d3d300 r radeon_edp_connector_funcs +ffffffff82d3d378 r radeon_tv_connector_funcs +ffffffff82d3d3f0 r radeon_tv_connector_helper_funcs +ffffffff82d3d450 r radeon_lvds_connector_funcs +ffffffff82d3d4c8 r radeon_lvds_connector_helper_funcs +ffffffff82d3e000 r radeon_family_name +ffffffff82d3e3f0 r radeon_px_quirk_list +ffffffff82d3f000 r radeon_fb_funcs +ffffffff82d3f018 r radeon_mode_funcs +ffffffff82d3f060 r radeon_tmds_pll_enum_list +ffffffff82d3f080 r radeon_tv_std_enum_list +ffffffff82d3f100 r radeon_underscan_enum_list +ffffffff82d3f130 r radeon_audio_enum_list +ffffffff82d3f160 r radeon_dither_enum_list +ffffffff82d3f180 r radeon_output_csc_enum_list +ffffffff82d3f1c0 r radeon_crtc_funcs +ffffffff82d3f280 r hpd_names +ffffffff82d3f2b0 r encoder_names +ffffffff82d3f3e0 r radeon_afmt_init.eg_offsets +ffffffff82d40000 r aux_offset +ffffffff82d41000 R radeondrm_ca +ffffffff82d41030 r pciidlist +ffffffff82d451d0 r kms_driver +ffffffff82d452c0 r radeon_ioctls_kms +ffffffff82d46000 r radeon_fbdev_fb_helper_funcs +ffffffff82d46010 r radeon_fbdev_client_funcs +ffffffff82d46030 r radeon_fbdev_fb_ops +ffffffff82d47000 R radeon_fence_ops +ffffffff82d49000 R radeon_gem_object_funcs +ffffffff82d49070 r radeon_gem_vm_ops +ffffffff82d4a000 r radeon_i2c_algo +ffffffff82d4a010 r radeon_atom_i2c_algo +ffffffff82d4b000 r legacy_helper_funcs +ffffffff82d4c000 r radeon_backlight_ops +ffffffff82d4c018 r radeon_legacy_lvds_enc_funcs +ffffffff82d4c038 r radeon_legacy_lvds_helper_funcs +ffffffff82d4c0a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82d4c0c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82d4c128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82d4c148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82d4c1b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82d4c1d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82d4c238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82d4c258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82d4d000 r SLOPE_value +ffffffff82d4d030 r YCOEF_EN_value +ffffffff82d4d060 r YCOEF_value +ffffffff82d4d090 r available_tv_modes +ffffffff82d4d110 r hor_timing_NTSC +ffffffff82d4d150 r vert_timing_NTSC +ffffffff82d4d190 r hor_timing_PAL +ffffffff82d4d1d0 r vert_timing_PAL +ffffffff82d4f000 r radeon_pm_state_type_name +ffffffff82d50000 r radeon_evict_flags.placements +ffffffff82d53000 r rs600_reg_safe_bm +ffffffff82d55000 r rv515_reg_safe_bm +ffffffff82d56000 r dll_speed_table +ffffffff82d57000 r r7xx_golden_registers +ffffffff82d57090 r r7xx_golden_dyn_gpr_registers +ffffffff82d57100 r rv770ce_golden_registers +ffffffff82d57160 r rv770_golden_registers +ffffffff82d571b0 r rv770_mgcg_init +ffffffff82d578f0 r rv730_golden_registers +ffffffff82d57950 r rv730_mgcg_init +ffffffff82d57ee0 r rv710_golden_registers +ffffffff82d57f30 r rv710_mgcg_init +ffffffff82d581d0 r rv740_golden_registers +ffffffff82d58360 r rv740_mgcg_init +ffffffff82d5a000 r rv730_smc_int_vectors +ffffffff82d5a040 r rv710_smc_int_vectors +ffffffff82d5a080 r rv740_smc_int_vectors +ffffffff82d5a0c0 r cypress_smc_int_vectors +ffffffff82d5a100 r caicos_smc_int_vectors +ffffffff82d5a140 r cayman_smc_int_vectors +ffffffff82d5b000 r tahiti_io_mc_regs +ffffffff82d5b120 r pitcairn_io_mc_regs +ffffffff82d5b240 r verde_io_mc_regs +ffffffff82d5b360 r oland_io_mc_regs +ffffffff82d5b480 r hainan_io_mc_regs +ffffffff82d5b5a0 r crtc_offsets +ffffffff82d5b5c0 r si_disp_int_status +ffffffff82d5b5e0 r tahiti_golden_registers +ffffffff82d5b760 r tahiti_golden_rlc_registers +ffffffff82d5b7b0 r tahiti_mgcg_cgcg_init +ffffffff82d5bd98 r tahiti_golden_registers2 +ffffffff82d5bdb0 r pitcairn_golden_registers +ffffffff82d5bf00 r pitcairn_golden_rlc_registers +ffffffff82d5bf40 r pitcairn_mgcg_cgcg_init +ffffffff82d5c3b0 r verde_golden_registers +ffffffff82d5c620 r verde_golden_rlc_registers +ffffffff82d5c660 r verde_mgcg_cgcg_init +ffffffff82d5cae0 r oland_golden_registers +ffffffff82d5cc30 r oland_golden_rlc_registers +ffffffff82d5cc70 r oland_mgcg_cgcg_init +ffffffff82d5d000 r hainan_golden_registers +ffffffff82d5d12c r hainan_golden_registers2 +ffffffff82d5d140 r hainan_mgcg_cgcg_init +ffffffff82d5d4b0 r verde_rlc_save_restore_register_list +ffffffff82d5d820 r si_cs_data +ffffffff82d5d840 r si_SECT_CONTEXT_defs +ffffffff82d5d8c0 r si_SECT_CONTEXT_def_1 +ffffffff82d5dc10 r si_SECT_CONTEXT_def_3 +ffffffff82d5dc30 r si_SECT_CONTEXT_def_4 +ffffffff82d5dea4 r si_SECT_CONTEXT_def_5 +ffffffff82d5dea8 r si_SECT_CONTEXT_def_6 +ffffffff82d5deb0 r si_SECT_CONTEXT_def_2 +ffffffff82d5e2f0 r si_SECT_CONTEXT_def_7 +ffffffff82d5e6a0 r mc_cg_registers +ffffffff82d5e6d0 r si_default_state +ffffffff82d5f000 r cac_weights_tahiti +ffffffff82d5f4d0 r lcac_tahiti +ffffffff82d5fba0 r cac_override_tahiti +ffffffff82d5fbb4 r powertune_data_tahiti +ffffffff82d5fbf0 r dte_data_tahiti +ffffffff82d5fcc0 r dte_data_new_zealand +ffffffff82d5fd90 r dte_data_malta +ffffffff82d5fe60 r lcac_pitcairn +ffffffff82d60530 r cac_override_pitcairn +ffffffff82d60544 r powertune_data_pitcairn +ffffffff82d60580 r lcac_cape_verde +ffffffff82d609d0 r cac_override_cape_verde +ffffffff82d609e4 r powertune_data_cape_verde +ffffffff82d60a20 r cac_weights_cape_verde_pro +ffffffff82d60ef0 r cac_weights_heathrow +ffffffff82d613c0 r cac_weights_chelsea_xt +ffffffff82d61890 r cac_weights_chelsea_pro +ffffffff82d61d60 r cac_weights_cape_verde +ffffffff82d62230 r cac_weights_mars_pro +ffffffff82d62700 r lcac_mars_pro +ffffffff82d62a60 r cac_override_oland +ffffffff82d62a74 r powertune_data_mars_pro +ffffffff82d62ab0 r cac_weights_mars_xt +ffffffff82d62f80 r cac_weights_oland_pro +ffffffff82d63450 r cac_weights_oland_xt +ffffffff82d63920 r lcac_oland +ffffffff82d63c7c r powertune_data_oland +ffffffff82d63cc0 r cac_weights_hainan +ffffffff82d64184 r powertune_data_hainan +ffffffff82d641c0 r dte_data_aruba_pro +ffffffff82d64290 r dte_data_tahiti_pro +ffffffff82d64360 r dte_data_curacao_pro +ffffffff82d64430 r dte_data_neptune_xt +ffffffff82d64500 r dte_data_sun_xt +ffffffff82d645d0 r dte_data_venus_xtx +ffffffff82d646a0 r dte_data_venus_xt +ffffffff82d64770 r dte_data_venus_pro +ffffffff82d64840 r dte_data_mars_pro +ffffffff82d65000 r si_program_jump_on_start.data +ffffffff82d66000 r sumo_dtc +ffffffff82d67000 r trinity_mgcg_shls_default +ffffffff82d67380 r trinity_sysls_enable +ffffffff82d67450 r trinity_sysls_disable +ffffffff82d69000 r GC_BASE +ffffffff82d690a8 r HDP_BASE +ffffffff82d69150 r MMHUB_BASE +ffffffff82d691f8 r ATHUB_BASE +ffffffff82d692a0 r NBIO_BASE +ffffffff82d69348 r MP0_BASE +ffffffff82d693f0 r MP1_BASE +ffffffff82d69498 r DF_BASE +ffffffff82d69540 r OSSSYS_BASE +ffffffff82d695e8 r SDMA0_BASE +ffffffff82d69690 r SDMA1_BASE +ffffffff82d69738 r SDMA2_BASE +ffffffff82d697e0 r SDMA3_BASE +ffffffff82d69888 r SDMA4_BASE +ffffffff82d69930 r SMUIO_BASE +ffffffff82d699d8 r THM_BASE +ffffffff82d69a80 r UMC_BASE +ffffffff82d69b28 r VCN_BASE +ffffffff82d6a000 r amdgpu_afmt_predefined_acr +ffffffff82d6b000 r atom_op_names +ffffffff82d6b3e0 r opcode_table +ffffffff82d6bbd0 r atom_dst_to_src +ffffffff82d6bc50 r atom_io_names +ffffffff82d6bc80 r atom_table_names +ffffffff82d6bed0 r atom_iio_len +ffffffff82d6c000 r object_connector_convert +ffffffff82d6c058 R amdgpu_vbios_version_attr_group +ffffffff82d6d000 r voltage_names +ffffffff82d6d020 r pre_emph_names +ffffffff82d6e000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82d70000 r amdgpu_benchmark.common_modes +ffffffff82d71000 r amdgpu_cgs_ops +ffffffff82d72000 r amdgpu_connector_dp_funcs +ffffffff82d72078 r amdgpu_connector_dp_helper_funcs +ffffffff82d720d8 r amdgpu_connector_edp_funcs +ffffffff82d72150 r amdgpu_connector_vga_funcs +ffffffff82d721c8 r amdgpu_connector_vga_helper_funcs +ffffffff82d72228 r amdgpu_connector_dvi_funcs +ffffffff82d722a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82d72300 r amdgpu_connector_lvds_funcs +ffffffff82d72378 r amdgpu_connector_lvds_helper_funcs +ffffffff82d723e0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82d74000 R amdgpu_ctx_num_entities +ffffffff82d75000 r amdgpu_kms_driver +ffffffff82d750f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82d76000 r hw_id_map +ffffffff82d76090 r hw_id_names +ffffffff82d77000 r hpd_names +ffffffff82d77030 r encoder_names +ffffffff82d77180 r dcc_retile_formats +ffffffff82d77270 r dcc_formats +ffffffff82d77360 R amdgpu_mode_funcs +ffffffff82d773b0 r amdgpu_underscan_enum_list +ffffffff82d773e0 r amdgpu_audio_enum_list +ffffffff82d77410 r amdgpu_dither_enum_list +ffffffff82d77430 r amdgpu_fb_funcs_atomic +ffffffff82d77448 r amdgpu_fb_funcs +ffffffff82d78000 R amdgpu_dmabuf_ops +ffffffff82d79000 R amdgpu_ioctls_kms +ffffffff82d79210 R amdgpu_partition_driver +ffffffff82d792f8 R amdgpu_ca +ffffffff82d79320 r pciidlist +ffffffff82d7a1f0 r amdgpu_unsupported_pciidlist +ffffffff82d7a770 r amdgpu_kms_driver +ffffffff82d7b000 r amdgpu_job_fence_ops +ffffffff82d7b040 r amdgpu_fence_ops +ffffffff82d7c000 r amdgpu_gem_object_funcs +ffffffff82d7c070 r amdgpu_gem_vm_ops +ffffffff82d7d000 R amdgpu_gtt_mgr_attr_group +ffffffff82d7d018 r amdgpu_gtt_mgr_func +ffffffff82d7e000 r amdgpu_atombios_i2c_algo +ffffffff82d7f000 R node_id_to_phys_map +ffffffff82d80000 R amdgpu_sched_ops +ffffffff82d82000 r amdgpu_vram_names +ffffffff82d83000 r amdgpu_preempt_mgr_func +ffffffff82d84000 R psp_ip_funcs +ffffffff82d840a8 R psp_v3_1_ip_block +ffffffff82d840c0 R psp_v10_0_ip_block +ffffffff82d840d8 R psp_v11_0_ip_block +ffffffff82d840f0 R psp_v11_0_8_ip_block +ffffffff82d84108 R psp_v12_0_ip_block +ffffffff82d84120 R psp_v13_0_ip_block +ffffffff82d84138 R psp_v13_0_4_ip_block +ffffffff82d86000 r sw_ring_info +ffffffff82d87000 r amdgpu_evict_flags.placements +ffffffff82d8b000 R amdgpu_vkms_ip_block +ffffffff82d8c000 R amdgpu_vm_cpu_funcs +ffffffff82d8e000 R amdgpu_vm_sdma_funcs +ffffffff82d8f000 R amdgpu_vram_mgr_attr_group +ffffffff82d8f018 r amdgpu_vram_mgr_func +ffffffff82d8f040 r amdgpu_dummy_vram_mgr_func +ffffffff82d90000 r xgmi_pcs_err_status_reg_arct +ffffffff82d90020 r xgmi3x16_pcs_ras_fields +ffffffff82d901f0 r xgmi_pcs_ras_fields +ffffffff82d90310 r wafl_pcs_ras_fields +ffffffff82d91000 r GC_BASE +ffffffff82d910c0 r HDP_BASE +ffffffff82d91180 r MMHUB_BASE +ffffffff82d91240 r ATHUB_BASE +ffffffff82d91300 r NBIF0_BASE +ffffffff82d913c0 r MP0_BASE +ffffffff82d91480 r MP1_BASE +ffffffff82d91540 r UVD_BASE +ffffffff82d91600 r DF_BASE +ffffffff82d916c0 r OSSSYS_BASE +ffffffff82d91780 r SDMA0_BASE +ffffffff82d91840 r SDMA1_BASE +ffffffff82d91900 r SDMA2_BASE +ffffffff82d919c0 r SDMA3_BASE +ffffffff82d91a80 r SDMA4_BASE +ffffffff82d91b40 r SDMA5_BASE +ffffffff82d91c00 r SDMA6_BASE +ffffffff82d91cc0 r SDMA7_BASE +ffffffff82d91d80 r SMUIO_BASE +ffffffff82d91e40 r THM_BASE +ffffffff82d91f00 r UMC_BASE +ffffffff82d91fc0 r RSMU_BASE +ffffffff82d93000 r cz_ih_ip_funcs +ffffffff82d930a8 R cz_ih_ip_block +ffffffff82d930c0 r cz_ih_funcs ffffffff82d94000 r crtc_offsets -ffffffff82d94020 r dce_v11_0_ip_funcs -ffffffff82d940c8 R dce_v11_0_ip_block -ffffffff82d940e0 R dce_v11_2_ip_block -ffffffff82d940f8 r dce_v11_0_display_funcs +ffffffff82d94020 r dce_v10_0_ip_funcs +ffffffff82d940c8 R dce_v10_0_ip_block +ffffffff82d940e0 R dce_v10_1_ip_block +ffffffff82d940f8 r dce_v10_0_display_funcs ffffffff82d94150 r hpd_offsets -ffffffff82d94168 r dce_v11_0_encoder_funcs -ffffffff82d94188 r dce_v11_0_dac_helper_funcs -ffffffff82d941f0 r dce_v11_0_dig_helper_funcs -ffffffff82d94258 r dce_v11_0_ext_helper_funcs -ffffffff82d942c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82d942f0 r dce_v11_0_crtc_irq_funcs -ffffffff82d94300 r dce_v11_0_pageflip_irq_funcs -ffffffff82d94310 r dce_v11_0_hpd_irq_funcs +ffffffff82d94168 r dce_v10_0_encoder_funcs +ffffffff82d94188 r dce_v10_0_dac_helper_funcs +ffffffff82d941f0 r dce_v10_0_dig_helper_funcs +ffffffff82d94258 r dce_v10_0_ext_helper_funcs +ffffffff82d942c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82d942f0 r dce_v10_0_crtc_irq_funcs +ffffffff82d94300 r dce_v10_0_pageflip_irq_funcs +ffffffff82d94310 r dce_v10_0_hpd_irq_funcs ffffffff82d94320 r interrupt_status_offsets -ffffffff82d94380 r dce_v11_0_crtc_funcs -ffffffff82d94440 r dce_v11_0_crtc_helper_funcs +ffffffff82d94380 r dce_v10_0_crtc_funcs +ffffffff82d94440 r dce_v10_0_crtc_helper_funcs ffffffff82d944c0 r vga_control_regs ffffffff82d944e0 r dig_offsets -ffffffff82d94510 r cz_mgcg_cgcg_init -ffffffff82d94530 r cz_golden_settings_a11 -ffffffff82d94550 r stoney_golden_settings_a11 -ffffffff82d94570 r polaris11_golden_settings_a11 -ffffffff82d945b0 r polaris10_golden_settings_a11 -ffffffff82d95000 R df_v1_7_funcs -ffffffff82d95070 r df_v1_7_channel_number -ffffffff82d96000 R df_v3_6_funcs -ffffffff82d96070 r df_v3_6_channel_number -ffffffff82d97000 R df_v4_3_funcs -ffffffff82d98000 r GC_BASE -ffffffff82d980a8 r HDP_BASE -ffffffff82d98150 r MMHUB_BASE -ffffffff82d981f8 r ATHUB_BASE -ffffffff82d982a0 r NBIO_BASE -ffffffff82d98348 r MP0_BASE -ffffffff82d983f0 r MP1_BASE -ffffffff82d98498 r VCN0_BASE -ffffffff82d98540 r DF_BASE -ffffffff82d985e8 r DCN_BASE -ffffffff82d98690 r OSSSYS_BASE -ffffffff82d98738 r SMUIO_BASE -ffffffff82d987e0 r THM_BASE -ffffffff82d99000 r gfx_v10_0_ip_funcs -ffffffff82d990a8 R gfx_v10_0_ip_block -ffffffff82d990c0 r gfx_v10_0_gfx_funcs -ffffffff82d99120 r golden_settings_gc_rlc_spm_10_0_nv10 -ffffffff82d9f3c0 r golden_settings_gc_rlc_spm_10_1_nv14 -ffffffff82da2de0 r golden_settings_gc_rlc_spm_10_1_2_nv12 -ffffffff82da9080 r gfx_v10_0_kiq_pm4_funcs -ffffffff82da90c0 r gfx_v10_0_ring_funcs_kiq -ffffffff82da9200 r gfx_v10_0_ring_funcs_gfx -ffffffff82da9340 r gfx_v10_0_ring_funcs_compute -ffffffff82da9480 r gfx_v10_0_eop_irq_funcs -ffffffff82da9490 r gfx_v10_0_kiq_irq_funcs -ffffffff82da94a0 r gfx_v10_0_priv_reg_irq_funcs -ffffffff82da94b0 r gfx_v10_0_priv_inst_irq_funcs -ffffffff82da94c0 r gfx_v10_0_rlc_funcs -ffffffff82da9528 r gfx_v10_0_rlc_funcs_sriov -ffffffff82da9590 r gfx10_cs_data -ffffffff82da95b0 r gfx10_SECT_CONTEXT_defs -ffffffff82da9640 r gfx10_SECT_CONTEXT_def_1 -ffffffff82da99a0 r gfx10_SECT_CONTEXT_def_3 -ffffffff82da99b0 r gfx10_SECT_CONTEXT_def_4 -ffffffff82da9c28 r gfx10_SECT_CONTEXT_def_5 -ffffffff82da9c30 r gfx10_SECT_CONTEXT_def_6 -ffffffff82da9c40 r gfx10_SECT_CONTEXT_def_2 -ffffffff82daa080 r gfx10_SECT_CONTEXT_def_7 -ffffffff82daa190 r gfx10_SECT_CONTEXT_def_8 -ffffffff82daa4c0 r golden_settings_gc_10_1 -ffffffff82daa880 r golden_settings_gc_10_0_nv10 -ffffffff82daa880 r golden_settings_gc_10_1_1 -ffffffff82daac10 r golden_settings_gc_10_1_2 -ffffffff82daac10 r golden_settings_gc_10_1_nv14 -ffffffff82dab000 r golden_settings_gc_10_1_2_nv12 -ffffffff82dab000 r golden_settings_gc_10_3 -ffffffff82dab408 r golden_settings_gc_10_3_sienna_cichlid -ffffffff82dab410 r golden_settings_gc_10_3_2 -ffffffff82dab800 r golden_settings_gc_10_3_vangogh -ffffffff82daba60 r golden_settings_gc_10_3_3 -ffffffff82dabc40 r golden_settings_gc_10_3_4 -ffffffff82dabfa0 r golden_settings_gc_10_3_5 -ffffffff82dac2a0 r golden_settings_gc_10_0_cyan_skillfish -ffffffff82dac5d0 r golden_settings_gc_10_3_6 -ffffffff82dac7e0 r golden_settings_gc_10_3_7 -ffffffff82dad000 r gfx_v11_0_ip_funcs -ffffffff82dad0a8 R gfx_v11_0_ip_block -ffffffff82dad0c0 r gfx_v11_0_gfx_funcs -ffffffff82dad120 r gfx_v11_0_kiq_pm4_funcs -ffffffff82dad160 r gfx_v11_0_ring_funcs_kiq -ffffffff82dad2a0 r gfx_v11_0_ring_funcs_gfx -ffffffff82dad3e0 r gfx_v11_0_ring_funcs_compute -ffffffff82dad520 r gfx_v11_0_eop_irq_funcs -ffffffff82dad530 r gfx_v11_0_priv_reg_irq_funcs -ffffffff82dad540 r gfx_v11_0_priv_inst_irq_funcs -ffffffff82dad550 r gfx_v11_0_rlc_gc_fed_irq_funcs -ffffffff82dad560 r gfx_v11_0_rlc_funcs -ffffffff82dad5d0 r gfx11_cs_data -ffffffff82dad5f0 r gfx11_SECT_CONTEXT_defs -ffffffff82dad670 r gfx11_SECT_CONTEXT_def_1 -ffffffff82dad9d0 r gfx11_SECT_CONTEXT_def_3 -ffffffff82dad9e0 r gfx11_SECT_CONTEXT_def_5 -ffffffff82dad9e8 r gfx11_SECT_CONTEXT_def_6 -ffffffff82dad9f0 r gfx11_SECT_CONTEXT_def_2 -ffffffff82dade30 r gfx11_SECT_CONTEXT_def_4 -ffffffff82dae0b0 r gfx11_SECT_CONTEXT_def_7 -ffffffff82dae520 r golden_settings_gc_11_0_1 -ffffffff82dae600 r golden_settings_gc_11_0 -ffffffff82daf000 r gfx_v8_0_ip_funcs -ffffffff82daf0a8 R gfx_v8_0_ip_block -ffffffff82daf0c0 R gfx_v8_1_ip_block -ffffffff82daf0d8 r gfx_v8_0_gfx_funcs -ffffffff82daf138 r gfx_v8_0_ring_funcs_kiq -ffffffff82daf278 r gfx_v8_0_ring_funcs_gfx -ffffffff82daf3b8 r gfx_v8_0_ring_funcs_compute -ffffffff82daf500 r amdgpu_gds_reg_offset -ffffffff82daf600 r gfx_v8_0_eop_irq_funcs -ffffffff82daf610 r gfx_v8_0_priv_reg_irq_funcs -ffffffff82daf620 r gfx_v8_0_priv_inst_irq_funcs -ffffffff82daf630 r gfx_v8_0_cp_ecc_error_irq_funcs -ffffffff82daf640 r gfx_v8_0_sq_irq_funcs -ffffffff82daf650 r sq_edc_source_names -ffffffff82daf688 r iceland_rlc_funcs -ffffffff82daf6f0 r vi_cs_data -ffffffff82daf710 r vi_SECT_CONTEXT_defs -ffffffff82daf790 r vi_SECT_CONTEXT_def_1 -ffffffff82dafae0 r vi_SECT_CONTEXT_def_3 -ffffffff82dafb00 r vi_SECT_CONTEXT_def_4 -ffffffff82dafd74 r vi_SECT_CONTEXT_def_5 -ffffffff82dafd7c r vi_SECT_CONTEXT_def_6 -ffffffff82dafd80 r vi_SECT_CONTEXT_def_2 -ffffffff82db01d0 r vi_SECT_CONTEXT_def_7 -ffffffff82db0580 r vgpr_init_compute_shader -ffffffff82db0690 r vgpr_init_regs -ffffffff82db0720 r sgpr1_init_regs -ffffffff82db07b0 r sgpr2_init_regs -ffffffff82db0840 r sec_ded_counter_registers -ffffffff82db08b0 r iceland_mgcg_cgcg_init -ffffffff82db0bb0 r golden_settings_iceland_a11 -ffffffff82db0c70 r iceland_golden_common_all -ffffffff82db0cd0 r fiji_mgcg_cgcg_init -ffffffff82db0e80 r golden_settings_fiji_a10 -ffffffff82db0f10 r fiji_golden_common_all -ffffffff82db0f90 r tonga_mgcg_cgcg_init -ffffffff82db1320 r golden_settings_tonga_a11 -ffffffff82db13e0 r tonga_golden_common_all -ffffffff82db1440 r golden_settings_vegam_a11 -ffffffff82db1510 r vegam_golden_common_all -ffffffff82db1560 r golden_settings_polaris11_a11 -ffffffff82db1630 r polaris11_golden_common_all -ffffffff82db1680 r golden_settings_polaris10_a11 -ffffffff82db1750 r polaris10_golden_common_all -ffffffff82db17b0 r cz_mgcg_cgcg_init -ffffffff82db1b40 r cz_golden_settings_a11 -ffffffff82db1bd0 r cz_golden_common_all -ffffffff82db1c30 r stoney_mgcg_cgcg_init -ffffffff82db1c70 r stoney_golden_settings_a11 -ffffffff82db1cf0 r stoney_golden_common_all -ffffffff82db2000 R gfx_v9_0_ras_ops -ffffffff82db2040 r gfx_v9_0_ip_funcs -ffffffff82db20e8 R gfx_v9_0_ip_block -ffffffff82db2100 r ras_gfx_subblocks -ffffffff82db2b80 r gfx_v9_0_edc_counter_regs -ffffffff82db2f20 r gfx_v9_0_ras_fields -ffffffff82db4000 r gfx_v9_0_gfx_funcs -ffffffff82db4060 r gfx_v9_0_kiq_pm4_funcs -ffffffff82db40a0 r gfx_v9_0_ring_funcs_kiq -ffffffff82db41e0 r gfx_v9_0_ring_funcs_gfx -ffffffff82db4320 r gfx_v9_0_sw_ring_funcs_gfx -ffffffff82db4460 r gfx_v9_0_ring_funcs_compute -ffffffff82db45a0 r gfx_v9_0_eop_irq_funcs -ffffffff82db45b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82db45c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82db45d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82db45e0 r gfx_v9_0_rlc_funcs -ffffffff82db4650 r gfx9_cs_data -ffffffff82db4670 r gfx9_SECT_CONTEXT_defs -ffffffff82db4700 r gfx9_SECT_CONTEXT_def_1 -ffffffff82db4a50 r gfx9_SECT_CONTEXT_def_3 -ffffffff82db4a60 r gfx9_SECT_CONTEXT_def_4 -ffffffff82db4cd4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82db4cdc r gfx9_SECT_CONTEXT_def_6 -ffffffff82db4ce0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82db4df0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82db5260 r gfx9_SECT_CONTEXT_def_8 -ffffffff82db54d0 r vgpr_init_compute_shader_arcturus -ffffffff82db5d60 r vgpr_init_regs_arcturus -ffffffff82db5ef0 r vgpr_init_regs -ffffffff82db6080 r sgpr1_init_regs -ffffffff82db6210 r sgpr2_init_regs -ffffffff82db63a0 r golden_settings_gc_9_0 -ffffffff82db6580 r golden_settings_gc_9_0_vg10 -ffffffff82db6730 r golden_settings_gc_9_2_1 -ffffffff82db68b0 r golden_settings_gc_9_2_1_vg12 -ffffffff82db69f0 r golden_settings_gc_9_0_vg20 -ffffffff82db6b00 r golden_settings_gc_9_4_1_arct -ffffffff82db6c10 r golden_settings_gc_9_1 -ffffffff82db6e50 r golden_settings_gc_9_1_rv2 -ffffffff82db7020 r golden_settings_gc_9_1_rv1 -ffffffff82db70d0 r golden_settings_gc_9_1_rn -ffffffff82db71f0 r golden_settings_gc_9_x_common -ffffffff82db8000 R gfx_v9_4_ras_ops -ffffffff82db8040 r gfx_v9_4_edc_counter_regs -ffffffff82db8420 r gfx_v9_4_ras_fields -ffffffff82dba000 R vgpr_init_regs_aldebaran -ffffffff82dba1b0 R sgpr112_init_regs_aldebaran -ffffffff82dba360 R sgpr96_init_regs_aldebaran -ffffffff82dba510 R sgpr64_init_regs_aldebaran -ffffffff82dba6c0 r golden_settings_gc_9_4_2_alde -ffffffff82dba720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82dba7b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82dba840 r sgpr112_init_compute_shader_aldebaran -ffffffff82dbaa60 r sgpr96_init_compute_shader_aldebaran -ffffffff82dbac50 r sgpr64_init_compute_shader_aldebaran -ffffffff82dbadc0 r vgpr_init_compute_shader_aldebaran -ffffffff82dbb6a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82dbba20 r gfx_v9_4_2_ras_fields -ffffffff82dbd3c0 r gfx_v9_4_2_utc_blocks -ffffffff82dbe000 r gfx_v9_4_3_ip_funcs -ffffffff82dbe0a8 R gfx_v9_4_3_ip_block -ffffffff82dbe0c0 r gfx_v9_4_3_kiq_pm4_funcs -ffffffff82dbe100 r gfx_v9_4_3_ring_funcs_kiq -ffffffff82dbe240 r gfx_v9_4_3_ring_funcs_compute -ffffffff82dbe380 r gfx_v9_4_3_eop_irq_funcs -ffffffff82dbe390 r gfx_v9_4_3_priv_reg_irq_funcs -ffffffff82dbe3a0 r gfx_v9_4_3_priv_inst_irq_funcs -ffffffff82dbe3b0 r gfx_v9_4_3_rlc_funcs -ffffffff82dbe418 r gfx_v9_4_3_gfx_funcs -ffffffff82dbe480 r gfx_v9_4_3_ce_reg_list -ffffffff82dbe810 r gfx_v9_4_3_ras_mem_list_array -ffffffff82dbe970 r gfx_v9_4_3_ue_reg_list -ffffffff82dbed30 r gfx_v9_4_3_ras_cp_mem_list -ffffffff82dbed80 r gfx_v9_4_3_ras_gcea_mem_list -ffffffff82dbeec0 r gfx_v9_4_3_ras_gc_cane_mem_list -ffffffff82dbeed0 r gfx_v9_4_3_ras_gcutcl2_mem_list -ffffffff82dbeee0 r gfx_v9_4_3_ras_gds_mem_list -ffffffff82dbeef0 r gfx_v9_4_3_ras_lds_mem_list -ffffffff82dbf110 r gfx_v9_4_3_ras_rlc_mem_list -ffffffff82dbf190 r gfx_v9_4_3_ras_sp_mem_list -ffffffff82dbf1a0 r gfx_v9_4_3_ras_spi_mem_list -ffffffff82dbf1e0 r gfx_v9_4_3_ras_sqc_mem_list -ffffffff82dbf350 r gfx_v9_4_3_ras_sq_mem_list -ffffffff82dbf390 r gfx_v9_4_3_ras_ta_mem_list -ffffffff82dbf3e0 r gfx_v9_4_3_ras_tcc_mem_list -ffffffff82dbf3f0 r gfx_v9_4_3_ras_tca_mem_list -ffffffff82dbf400 r gfx_v9_4_3_ras_tci_mem_list -ffffffff82dbf410 r gfx_v9_4_3_ras_tcp_mem_list -ffffffff82dbf5a0 r gfx_v9_4_3_ras_td_mem_list -ffffffff82dbf5d0 r gfx_v9_4_3_ras_tcx_mem_list -ffffffff82dbfb50 r gfx_v9_4_3_ras_atc_l2_mem_list -ffffffff82dbfb60 r gfx_v9_4_3_ras_utcl2_mem_list -ffffffff82dbfb70 r gfx_v9_4_3_ras_vml2_mem_list -ffffffff82dbfb80 r gfx_v9_4_3_ras_vml2_walker_mem_list -ffffffff82dc0000 R gfxhub_v1_0_funcs -ffffffff82dc1000 R gfxhub_v1_2_funcs -ffffffff82dc2000 R gfxhub_v2_0_funcs -ffffffff82dc2060 r gfxhub_v2_0_vmhub_funcs -ffffffff82dc2070 r gfxhub_client_ids -ffffffff82dc3000 R gfxhub_v2_1_funcs -ffffffff82dc3060 r gfxhub_v2_1_vmhub_funcs +ffffffff82d94500 r pin_offsets +ffffffff82d94520 r fiji_mgcg_cgcg_init +ffffffff82d94540 r golden_settings_fiji_a10 +ffffffff82d94570 r tonga_mgcg_cgcg_init +ffffffff82d94590 r golden_settings_tonga_a11 +ffffffff82d95000 r crtc_offsets +ffffffff82d95020 r dce_v11_0_ip_funcs +ffffffff82d950c8 R dce_v11_0_ip_block +ffffffff82d950e0 R dce_v11_2_ip_block +ffffffff82d950f8 r dce_v11_0_display_funcs +ffffffff82d95150 r hpd_offsets +ffffffff82d95168 r dce_v11_0_encoder_funcs +ffffffff82d95188 r dce_v11_0_dac_helper_funcs +ffffffff82d951f0 r dce_v11_0_dig_helper_funcs +ffffffff82d95258 r dce_v11_0_ext_helper_funcs +ffffffff82d952c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82d952f0 r dce_v11_0_crtc_irq_funcs +ffffffff82d95300 r dce_v11_0_pageflip_irq_funcs +ffffffff82d95310 r dce_v11_0_hpd_irq_funcs +ffffffff82d95320 r interrupt_status_offsets +ffffffff82d95380 r dce_v11_0_crtc_funcs +ffffffff82d95440 r dce_v11_0_crtc_helper_funcs +ffffffff82d954c0 r vga_control_regs +ffffffff82d954e0 r dig_offsets +ffffffff82d95510 r cz_mgcg_cgcg_init +ffffffff82d95530 r cz_golden_settings_a11 +ffffffff82d95550 r stoney_golden_settings_a11 +ffffffff82d95570 r polaris11_golden_settings_a11 +ffffffff82d955b0 r polaris10_golden_settings_a11 +ffffffff82d96000 R df_v1_7_funcs +ffffffff82d96070 r df_v1_7_channel_number +ffffffff82d97000 R df_v3_6_funcs +ffffffff82d97070 r df_v3_6_channel_number +ffffffff82d98000 R df_v4_3_funcs +ffffffff82d99000 r GC_BASE +ffffffff82d990a8 r HDP_BASE +ffffffff82d99150 r MMHUB_BASE +ffffffff82d991f8 r ATHUB_BASE +ffffffff82d992a0 r NBIO_BASE +ffffffff82d99348 r MP0_BASE +ffffffff82d993f0 r MP1_BASE +ffffffff82d99498 r VCN0_BASE +ffffffff82d99540 r DF_BASE +ffffffff82d995e8 r DCN_BASE +ffffffff82d99690 r OSSSYS_BASE +ffffffff82d99738 r SMUIO_BASE +ffffffff82d997e0 r THM_BASE +ffffffff82d9a000 r gfx_v10_0_ip_funcs +ffffffff82d9a0a8 R gfx_v10_0_ip_block +ffffffff82d9a0c0 r gfx_v10_0_gfx_funcs +ffffffff82d9a120 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82da03c0 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82da3de0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82daa080 r gfx_v10_0_kiq_pm4_funcs +ffffffff82daa0c0 r gfx_v10_0_ring_funcs_kiq +ffffffff82daa200 r gfx_v10_0_ring_funcs_gfx +ffffffff82daa340 r gfx_v10_0_ring_funcs_compute +ffffffff82daa480 r gfx_v10_0_eop_irq_funcs +ffffffff82daa490 r gfx_v10_0_kiq_irq_funcs +ffffffff82daa4a0 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82daa4b0 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82daa4c0 r gfx_v10_0_rlc_funcs +ffffffff82daa528 r gfx_v10_0_rlc_funcs_sriov +ffffffff82daa590 r gfx10_cs_data +ffffffff82daa5b0 r gfx10_SECT_CONTEXT_defs +ffffffff82daa640 r gfx10_SECT_CONTEXT_def_1 +ffffffff82daa9a0 r gfx10_SECT_CONTEXT_def_3 +ffffffff82daa9b0 r gfx10_SECT_CONTEXT_def_4 +ffffffff82daac28 r gfx10_SECT_CONTEXT_def_5 +ffffffff82daac30 r gfx10_SECT_CONTEXT_def_6 +ffffffff82daac40 r gfx10_SECT_CONTEXT_def_2 +ffffffff82dab080 r gfx10_SECT_CONTEXT_def_7 +ffffffff82dab190 r gfx10_SECT_CONTEXT_def_8 +ffffffff82dab4c0 r golden_settings_gc_10_1 +ffffffff82dab880 r golden_settings_gc_10_0_nv10 +ffffffff82dab880 r golden_settings_gc_10_1_1 +ffffffff82dabc10 r golden_settings_gc_10_1_2 +ffffffff82dabc10 r golden_settings_gc_10_1_nv14 +ffffffff82dac000 r golden_settings_gc_10_1_2_nv12 +ffffffff82dac000 r golden_settings_gc_10_3 +ffffffff82dac408 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82dac410 r golden_settings_gc_10_3_2 +ffffffff82dac800 r golden_settings_gc_10_3_vangogh +ffffffff82daca60 r golden_settings_gc_10_3_3 +ffffffff82dacc40 r golden_settings_gc_10_3_4 +ffffffff82dacfa0 r golden_settings_gc_10_3_5 +ffffffff82dad2a0 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82dad5d0 r golden_settings_gc_10_3_6 +ffffffff82dad7e0 r golden_settings_gc_10_3_7 +ffffffff82dae000 r gfx_v11_0_ip_funcs +ffffffff82dae0a8 R gfx_v11_0_ip_block +ffffffff82dae0c0 r gfx_v11_0_gfx_funcs +ffffffff82dae120 r gfx_v11_0_kiq_pm4_funcs +ffffffff82dae160 r gfx_v11_0_ring_funcs_kiq +ffffffff82dae2a0 r gfx_v11_0_ring_funcs_gfx +ffffffff82dae3e0 r gfx_v11_0_ring_funcs_compute +ffffffff82dae520 r gfx_v11_0_eop_irq_funcs +ffffffff82dae530 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82dae540 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82dae550 r gfx_v11_0_rlc_gc_fed_irq_funcs +ffffffff82dae560 r gfx_v11_0_rlc_funcs +ffffffff82dae5d0 r gfx11_cs_data +ffffffff82dae5f0 r gfx11_SECT_CONTEXT_defs +ffffffff82dae670 r gfx11_SECT_CONTEXT_def_1 +ffffffff82dae9d0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82dae9e0 r gfx11_SECT_CONTEXT_def_5 +ffffffff82dae9e8 r gfx11_SECT_CONTEXT_def_6 +ffffffff82dae9f0 r gfx11_SECT_CONTEXT_def_2 +ffffffff82daee30 r gfx11_SECT_CONTEXT_def_4 +ffffffff82daf0b0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82daf520 r golden_settings_gc_11_0_1 +ffffffff82daf600 r golden_settings_gc_11_0 +ffffffff82db0000 r gfx_v8_0_ip_funcs +ffffffff82db00a8 R gfx_v8_0_ip_block +ffffffff82db00c0 R gfx_v8_1_ip_block +ffffffff82db00d8 r gfx_v8_0_gfx_funcs +ffffffff82db0138 r gfx_v8_0_ring_funcs_kiq +ffffffff82db0278 r gfx_v8_0_ring_funcs_gfx +ffffffff82db03b8 r gfx_v8_0_ring_funcs_compute +ffffffff82db0500 r amdgpu_gds_reg_offset +ffffffff82db0600 r gfx_v8_0_eop_irq_funcs +ffffffff82db0610 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82db0620 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82db0630 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82db0640 r gfx_v8_0_sq_irq_funcs +ffffffff82db0650 r sq_edc_source_names +ffffffff82db0688 r iceland_rlc_funcs +ffffffff82db06f0 r vi_cs_data +ffffffff82db0710 r vi_SECT_CONTEXT_defs +ffffffff82db0790 r vi_SECT_CONTEXT_def_1 +ffffffff82db0ae0 r vi_SECT_CONTEXT_def_3 +ffffffff82db0b00 r vi_SECT_CONTEXT_def_4 +ffffffff82db0d74 r vi_SECT_CONTEXT_def_5 +ffffffff82db0d7c r vi_SECT_CONTEXT_def_6 +ffffffff82db0d80 r vi_SECT_CONTEXT_def_2 +ffffffff82db11d0 r vi_SECT_CONTEXT_def_7 +ffffffff82db1580 r vgpr_init_compute_shader +ffffffff82db1690 r vgpr_init_regs +ffffffff82db1720 r sgpr1_init_regs +ffffffff82db17b0 r sgpr2_init_regs +ffffffff82db1840 r sec_ded_counter_registers +ffffffff82db18b0 r iceland_mgcg_cgcg_init +ffffffff82db1bb0 r golden_settings_iceland_a11 +ffffffff82db1c70 r iceland_golden_common_all +ffffffff82db1cd0 r fiji_mgcg_cgcg_init +ffffffff82db1e80 r golden_settings_fiji_a10 +ffffffff82db1f10 r fiji_golden_common_all +ffffffff82db1f90 r tonga_mgcg_cgcg_init +ffffffff82db2320 r golden_settings_tonga_a11 +ffffffff82db23e0 r tonga_golden_common_all +ffffffff82db2440 r golden_settings_vegam_a11 +ffffffff82db2510 r vegam_golden_common_all +ffffffff82db2560 r golden_settings_polaris11_a11 +ffffffff82db2630 r polaris11_golden_common_all +ffffffff82db2680 r golden_settings_polaris10_a11 +ffffffff82db2750 r polaris10_golden_common_all +ffffffff82db27b0 r cz_mgcg_cgcg_init +ffffffff82db2b40 r cz_golden_settings_a11 +ffffffff82db2bd0 r cz_golden_common_all +ffffffff82db2c30 r stoney_mgcg_cgcg_init +ffffffff82db2c70 r stoney_golden_settings_a11 +ffffffff82db2cf0 r stoney_golden_common_all +ffffffff82db3000 R gfx_v9_0_ras_ops +ffffffff82db3040 r gfx_v9_0_ip_funcs +ffffffff82db30e8 R gfx_v9_0_ip_block +ffffffff82db3100 r ras_gfx_subblocks +ffffffff82db3b80 r gfx_v9_0_edc_counter_regs +ffffffff82db3f20 r gfx_v9_0_ras_fields +ffffffff82db5000 r gfx_v9_0_gfx_funcs +ffffffff82db5060 r gfx_v9_0_kiq_pm4_funcs +ffffffff82db50a0 r gfx_v9_0_ring_funcs_kiq +ffffffff82db51e0 r gfx_v9_0_ring_funcs_gfx +ffffffff82db5320 r gfx_v9_0_sw_ring_funcs_gfx +ffffffff82db5460 r gfx_v9_0_ring_funcs_compute +ffffffff82db55a0 r gfx_v9_0_eop_irq_funcs +ffffffff82db55b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82db55c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82db55d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82db55e0 r gfx_v9_0_rlc_funcs +ffffffff82db5650 r gfx9_cs_data +ffffffff82db5670 r gfx9_SECT_CONTEXT_defs +ffffffff82db5700 r gfx9_SECT_CONTEXT_def_1 +ffffffff82db5a50 r gfx9_SECT_CONTEXT_def_3 +ffffffff82db5a60 r gfx9_SECT_CONTEXT_def_4 +ffffffff82db5cd4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82db5cdc r gfx9_SECT_CONTEXT_def_6 +ffffffff82db5ce0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82db5df0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82db6260 r gfx9_SECT_CONTEXT_def_8 +ffffffff82db64d0 r vgpr_init_compute_shader_arcturus +ffffffff82db6d60 r vgpr_init_regs_arcturus +ffffffff82db6ef0 r vgpr_init_regs +ffffffff82db7080 r sgpr1_init_regs +ffffffff82db7210 r sgpr2_init_regs +ffffffff82db73a0 r golden_settings_gc_9_0 +ffffffff82db7580 r golden_settings_gc_9_0_vg10 +ffffffff82db7730 r golden_settings_gc_9_2_1 +ffffffff82db78b0 r golden_settings_gc_9_2_1_vg12 +ffffffff82db79f0 r golden_settings_gc_9_0_vg20 +ffffffff82db7b00 r golden_settings_gc_9_4_1_arct +ffffffff82db7c10 r golden_settings_gc_9_1 +ffffffff82db7e50 r golden_settings_gc_9_1_rv2 +ffffffff82db8020 r golden_settings_gc_9_1_rv1 +ffffffff82db80d0 r golden_settings_gc_9_1_rn +ffffffff82db81f0 r golden_settings_gc_9_x_common +ffffffff82db9000 R gfx_v9_4_ras_ops +ffffffff82db9040 r gfx_v9_4_edc_counter_regs +ffffffff82db9420 r gfx_v9_4_ras_fields +ffffffff82dbb000 R vgpr_init_regs_aldebaran +ffffffff82dbb1b0 R sgpr112_init_regs_aldebaran +ffffffff82dbb360 R sgpr96_init_regs_aldebaran +ffffffff82dbb510 R sgpr64_init_regs_aldebaran +ffffffff82dbb6c0 r golden_settings_gc_9_4_2_alde +ffffffff82dbb720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82dbb7b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82dbb840 r sgpr112_init_compute_shader_aldebaran +ffffffff82dbba60 r sgpr96_init_compute_shader_aldebaran +ffffffff82dbbc50 r sgpr64_init_compute_shader_aldebaran +ffffffff82dbbdc0 r vgpr_init_compute_shader_aldebaran +ffffffff82dbc6a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82dbca20 r gfx_v9_4_2_ras_fields +ffffffff82dbe3c0 r gfx_v9_4_2_utc_blocks +ffffffff82dbf000 r gfx_v9_4_3_ip_funcs +ffffffff82dbf0a8 R gfx_v9_4_3_ip_block +ffffffff82dbf0c0 r gfx_v9_4_3_kiq_pm4_funcs +ffffffff82dbf100 r gfx_v9_4_3_ring_funcs_kiq +ffffffff82dbf240 r gfx_v9_4_3_ring_funcs_compute +ffffffff82dbf380 r gfx_v9_4_3_eop_irq_funcs +ffffffff82dbf390 r gfx_v9_4_3_priv_reg_irq_funcs +ffffffff82dbf3a0 r gfx_v9_4_3_priv_inst_irq_funcs +ffffffff82dbf3b0 r gfx_v9_4_3_rlc_funcs +ffffffff82dbf418 r gfx_v9_4_3_gfx_funcs +ffffffff82dbf480 r gfx_v9_4_3_ce_reg_list +ffffffff82dbf810 r gfx_v9_4_3_ras_mem_list_array +ffffffff82dbf970 r gfx_v9_4_3_ue_reg_list +ffffffff82dbfd30 r gfx_v9_4_3_ras_cp_mem_list +ffffffff82dbfd80 r gfx_v9_4_3_ras_gcea_mem_list +ffffffff82dbfec0 r gfx_v9_4_3_ras_gc_cane_mem_list +ffffffff82dbfed0 r gfx_v9_4_3_ras_gcutcl2_mem_list +ffffffff82dbfee0 r gfx_v9_4_3_ras_gds_mem_list +ffffffff82dbfef0 r gfx_v9_4_3_ras_lds_mem_list +ffffffff82dc0110 r gfx_v9_4_3_ras_rlc_mem_list +ffffffff82dc0190 r gfx_v9_4_3_ras_sp_mem_list +ffffffff82dc01a0 r gfx_v9_4_3_ras_spi_mem_list +ffffffff82dc01e0 r gfx_v9_4_3_ras_sqc_mem_list +ffffffff82dc0350 r gfx_v9_4_3_ras_sq_mem_list +ffffffff82dc0390 r gfx_v9_4_3_ras_ta_mem_list +ffffffff82dc03e0 r gfx_v9_4_3_ras_tcc_mem_list +ffffffff82dc03f0 r gfx_v9_4_3_ras_tca_mem_list +ffffffff82dc0400 r gfx_v9_4_3_ras_tci_mem_list +ffffffff82dc0410 r gfx_v9_4_3_ras_tcp_mem_list +ffffffff82dc05a0 r gfx_v9_4_3_ras_td_mem_list +ffffffff82dc05d0 r gfx_v9_4_3_ras_tcx_mem_list +ffffffff82dc0b50 r gfx_v9_4_3_ras_atc_l2_mem_list +ffffffff82dc0b60 r gfx_v9_4_3_ras_utcl2_mem_list +ffffffff82dc0b70 r gfx_v9_4_3_ras_vml2_mem_list +ffffffff82dc0b80 r gfx_v9_4_3_ras_vml2_walker_mem_list +ffffffff82dc1000 R gfxhub_v1_0_funcs +ffffffff82dc2000 R gfxhub_v1_2_funcs +ffffffff82dc3000 R gfxhub_v2_0_funcs +ffffffff82dc3060 r gfxhub_v2_0_vmhub_funcs ffffffff82dc3070 r gfxhub_client_ids -ffffffff82dc4000 R gfxhub_v3_0_funcs -ffffffff82dc4060 r gfxhub_v3_0_vmhub_funcs +ffffffff82dc4000 R gfxhub_v2_1_funcs +ffffffff82dc4060 r gfxhub_v2_1_vmhub_funcs ffffffff82dc4070 r gfxhub_client_ids -ffffffff82dc5000 R gfxhub_v3_0_3_funcs -ffffffff82dc5060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82dc5000 R gfxhub_v3_0_funcs +ffffffff82dc5060 r gfxhub_v3_0_vmhub_funcs ffffffff82dc5070 r gfxhub_client_ids -ffffffff82dc6000 R gmc_v10_0_ip_funcs -ffffffff82dc60a8 R gmc_v10_0_ip_block -ffffffff82dc60c0 r gmc_v10_0_gmc_funcs -ffffffff82dc6118 r gmc_v10_0_irq_funcs -ffffffff82dc6128 r gmc_v10_0_ecc_funcs -ffffffff82dc7000 R gmc_v11_0_ip_funcs -ffffffff82dc70a8 R gmc_v11_0_ip_block -ffffffff82dc70c0 r gmc_v11_0_gmc_funcs -ffffffff82dc7118 r gmc_v11_0_irq_funcs -ffffffff82dc7128 r gmc_v11_0_ecc_funcs -ffffffff82dc8000 r gmc_v7_0_ip_funcs -ffffffff82dc80a8 R gmc_v7_0_ip_block -ffffffff82dc80c0 R gmc_v7_4_ip_block -ffffffff82dc80d8 r gmc_v7_0_gmc_funcs -ffffffff82dc8130 r gmc_v7_0_irq_funcs -ffffffff82dc8140 r iceland_mgcg_cgcg_init -ffffffff82dc8150 r golden_settings_iceland_a11 -ffffffff82dc8180 r mc_cg_registers -ffffffff82dc81b0 r mc_cg_en -ffffffff82dc81e0 r mc_cg_ls_en -ffffffff82dc9000 r gmc_v8_0_ip_funcs -ffffffff82dc90a8 R gmc_v8_0_ip_block -ffffffff82dc90c0 R gmc_v8_1_ip_block -ffffffff82dc90d8 R gmc_v8_5_ip_block -ffffffff82dc90f0 r gmc_v8_0_gmc_funcs -ffffffff82dc9148 r gmc_v8_0_irq_funcs -ffffffff82dc9158 r fiji_mgcg_cgcg_init -ffffffff82dc9170 r golden_settings_fiji_a10 -ffffffff82dc91a0 r tonga_mgcg_cgcg_init -ffffffff82dc91b0 r golden_settings_tonga_a11 -ffffffff82dc9210 r golden_settings_polaris11_a11 -ffffffff82dc9240 r golden_settings_polaris10_a11 -ffffffff82dc927c r cz_mgcg_cgcg_init -ffffffff82dc9290 r stoney_mgcg_cgcg_init -ffffffff82dc92b0 r golden_settings_stoney_common -ffffffff82dca000 R gmc_v9_0_ip_funcs -ffffffff82dca0a8 R gmc_v9_0_ip_block -ffffffff82dca0c0 r gmc_v9_0_gmc_funcs -ffffffff82dca118 r gmc_v9_0_irq_funcs -ffffffff82dca128 r gmc_v9_0_ecc_funcs -ffffffff82dca140 r gfxhub_client_ids -ffffffff82dca1b0 r mmhub_client_ids_vega10 -ffffffff82dca4a0 r mmhub_client_ids_vega12 -ffffffff82dca7a0 r mmhub_client_ids_vega20 -ffffffff82dcaa90 r mmhub_client_ids_arcturus -ffffffff82dcc2a0 r mmhub_client_ids_raven -ffffffff82dcc460 r mmhub_client_ids_renoir -ffffffff82dcc650 r mmhub_client_ids_aldebaran -ffffffff82dcde60 r ecc_umc_mcumc_ctrl_addrs -ffffffff82dcdee0 r ecc_umc_mcumc_ctrl_mask_addrs -ffffffff82dcdf60 r golden_settings_mmhub_1_0_0 -ffffffff82dcdf90 r golden_settings_athub_1_0_0 -ffffffff82dce000 R hdp_v4_0_funcs -ffffffff82dcf000 R hdp_v5_0_funcs -ffffffff82dd0000 R hdp_v5_2_funcs -ffffffff82dd1000 R hdp_v6_0_funcs -ffffffff82dd2000 r iceland_ih_ip_funcs -ffffffff82dd20a8 R iceland_ih_ip_block -ffffffff82dd20c0 r iceland_ih_funcs -ffffffff82dd3000 r ih_v6_0_ip_funcs -ffffffff82dd30a8 R ih_v6_0_ip_block -ffffffff82dd30c0 r ih_v6_0_funcs -ffffffff82dd30e0 r ih_v6_0_self_irq_funcs -ffffffff82dd4000 r ih_v6_1_ip_funcs -ffffffff82dd40a8 R ih_v6_1_ip_block -ffffffff82dd40c0 r ih_v6_1_funcs -ffffffff82dd40e0 r ih_v6_1_self_irq_funcs -ffffffff82dd5000 R gfx_v11_0_imu_funcs -ffffffff82dd5030 r imu_rlc_ram_golden_11 -ffffffff82dd5680 r imu_rlc_ram_golden_11_0_2 -ffffffff82dd6000 r imu_rlc_ram_golden_11_0_3 -ffffffff82dd7000 r jpeg_v1_0_decode_ring_vm_funcs -ffffffff82dd7140 r jpeg_v1_0_irq_funcs -ffffffff82dd8000 r jpeg_v2_0_ip_funcs -ffffffff82dd80a8 R jpeg_v2_0_ip_block -ffffffff82dd80c0 r jpeg_v2_0_dec_ring_vm_funcs -ffffffff82dd8200 r jpeg_v2_0_irq_funcs -ffffffff82dd9000 r jpeg_v2_5_ip_funcs -ffffffff82dd90a8 R jpeg_v2_5_ip_block -ffffffff82dd90c0 r jpeg_v2_6_ip_funcs -ffffffff82dd9168 R jpeg_v2_6_ip_block -ffffffff82dd9180 R jpeg_v2_6_ras_hw_ops -ffffffff82dd91c0 r jpeg_v2_5_dec_ring_vm_funcs -ffffffff82dd9300 r jpeg_v2_6_dec_ring_vm_funcs -ffffffff82dd9440 r jpeg_v2_5_irq_funcs -ffffffff82dd9450 r jpeg_v2_6_ras_irq_funcs -ffffffff82dda000 r jpeg_v3_0_ip_funcs -ffffffff82dda0a8 R jpeg_v3_0_ip_block -ffffffff82dda0c0 r jpeg_v3_0_dec_ring_vm_funcs -ffffffff82dda200 r jpeg_v3_0_irq_funcs -ffffffff82ddb000 r jpeg_v4_0_ip_funcs -ffffffff82ddb0a8 R jpeg_v4_0_ip_block -ffffffff82ddb0c0 R jpeg_v4_0_ras_hw_ops -ffffffff82ddb100 r jpeg_v4_0_dec_ring_vm_funcs -ffffffff82ddb240 r jpeg_v4_0_irq_funcs -ffffffff82ddb250 r jpeg_v4_0_ras_irq_funcs -ffffffff82ddc000 r jpeg_v4_0_3_ip_funcs -ffffffff82ddc0a8 R jpeg_v4_0_3_ip_block -ffffffff82ddc0c0 r jpeg_v4_0_3_dec_ring_vm_funcs -ffffffff82ddc200 r jpeg_v4_0_3_irq_funcs -ffffffff82ddc210 r jpeg_v4_0_3_ras_hw_ops -ffffffff82ddc250 r jpeg_v4_0_3_ue_reg_list -ffffffff82ddd000 R lsdma_v6_0_funcs -ffffffff82dde000 r mca_v3_0_mp0_hw_ops -ffffffff82dde040 r mca_v3_0_mp1_hw_ops -ffffffff82dde080 r mca_v3_0_mpio_hw_ops -ffffffff82ddf000 r mes_v10_1_ip_funcs -ffffffff82ddf0a8 R mes_v10_1_ip_block -ffffffff82ddf0c0 r mes_v10_1_funcs -ffffffff82ddf0f0 r mes_v10_1_ring_funcs -ffffffff82de0000 r mes_v11_0_ip_funcs -ffffffff82de00a8 R mes_v11_0_ip_block -ffffffff82de00c0 r mes_v11_0_funcs -ffffffff82de00f0 r mes_v11_0_ring_funcs -ffffffff82de1000 R mmhub_v1_0_funcs -ffffffff82de1050 r mmhub_v1_0_edc_cnt_regs -ffffffff82de10c0 r mmhub_v1_0_ras_fields -ffffffff82de2000 R mmhub_v1_7_funcs -ffffffff82de2050 r mmhub_v1_7_edc_cnt_regs -ffffffff82de2250 r mmhub_v1_7_ras_fields -ffffffff82de39c0 r mmhub_v1_7_ea_err_status_regs -ffffffff82de4000 R mmhub_v1_8_funcs -ffffffff82de4050 r mmhub_v1_8_ras_hw_ops -ffffffff82de4090 r mmhub_v1_8_ce_reg_list -ffffffff82de4180 r mmhub_v1_8_ras_memory_list -ffffffff82de42b0 r mmhub_v1_8_ue_reg_list -ffffffff82de5000 R mmhub_v2_0_funcs -ffffffff82de5050 r mmhub_v2_0_vmhub_funcs -ffffffff82de5060 r mmhub_client_ids_navi1x -ffffffff82de5190 r mmhub_client_ids_sienna_cichlid -ffffffff82de5450 r mmhub_client_ids_beige_goby -ffffffff82de6000 R mmhub_v2_3_funcs -ffffffff82de6050 r mmhub_v2_3_vmhub_funcs -ffffffff82de6060 r mmhub_client_ids_vangogh -ffffffff82de7000 R mmhub_v3_0_funcs -ffffffff82de7050 r mmhub_v3_0_vmhub_funcs -ffffffff82de7060 r mmhub_client_ids_v3_0_0 -ffffffff82de8000 R mmhub_v3_0_1_funcs -ffffffff82de8050 r mmhub_v3_0_1_vmhub_funcs -ffffffff82de8060 r mmhub_client_ids_v3_0_1 -ffffffff82de9000 R mmhub_v3_0_2_funcs -ffffffff82de9050 r mmhub_v3_0_2_vmhub_funcs -ffffffff82de9060 r mmhub_client_ids_v3_0_2 -ffffffff82dea000 R mmhub_v9_4_ras_hw_ops -ffffffff82dea040 R mmhub_v9_4_funcs -ffffffff82dea090 r mmhub_v9_4_edc_cnt_regs -ffffffff82dea330 r mmhub_v9_4_ras_fields -ffffffff82dec3b0 r mmhub_v9_4_err_status_regs -ffffffff82ded000 r xgpu_ai_mailbox_ack_irq_funcs -ffffffff82ded010 r xgpu_ai_mailbox_rcv_irq_funcs -ffffffff82ded020 R xgpu_ai_virt_ops -ffffffff82dee000 r xgpu_nv_mailbox_ack_irq_funcs -ffffffff82dee010 r xgpu_nv_mailbox_rcv_irq_funcs -ffffffff82dee020 R xgpu_nv_virt_ops -ffffffff82def000 r xgpu_fiji_mgcg_cgcg_init -ffffffff82def240 r xgpu_fiji_golden_settings_a10 -ffffffff82def370 r xgpu_fiji_golden_common_all -ffffffff82def3f0 r xgpu_tonga_mgcg_cgcg_init -ffffffff82def810 r xgpu_tonga_golden_settings_a11 -ffffffff82def9d0 r xgpu_tonga_golden_common_all -ffffffff82defa28 r xgpu_vi_mailbox_ack_irq_funcs -ffffffff82defa38 r xgpu_vi_mailbox_rcv_irq_funcs -ffffffff82defa48 R xgpu_vi_virt_ops -ffffffff82df0000 r navi10_ih_ip_funcs -ffffffff82df00a8 R navi10_ih_ip_block -ffffffff82df00c0 r navi10_ih_funcs -ffffffff82df00e0 r navi10_ih_self_irq_funcs -ffffffff82df1000 R nbio_v2_3_hdp_flush_reg -ffffffff82df1048 R nbio_v2_3_funcs -ffffffff82df2000 R nbio_v4_3_hdp_flush_reg -ffffffff82df2048 R nbio_v4_3_funcs -ffffffff82df2158 R nbio_v4_3_sriov_funcs -ffffffff82df2268 r nbio_v4_3_ras_err_event_athub_irq_funcs -ffffffff82df3000 R nbio_v6_1_hdp_flush_reg -ffffffff82df3048 R nbio_v6_1_funcs -ffffffff82df4000 R nbio_v7_0_hdp_flush_reg -ffffffff82df4048 R nbio_v7_0_funcs -ffffffff82df5000 R nbio_v7_2_hdp_flush_reg -ffffffff82df5048 R nbio_v7_2_funcs -ffffffff82df6000 R nbio_v7_4_hdp_flush_reg -ffffffff82df6048 R nbio_v7_4_ras_hw_ops -ffffffff82df6088 R nbio_v7_4_funcs -ffffffff82df6198 r nbio_v7_4_ras_controller_irq_funcs -ffffffff82df61a8 r nbio_v7_4_ras_err_event_athub_irq_funcs -ffffffff82df7000 R nbio_v7_7_hdp_flush_reg -ffffffff82df7048 R nbio_v7_7_funcs -ffffffff82df8000 R nbio_v7_9_hdp_flush_reg -ffffffff82df8048 R nbio_v7_9_funcs -ffffffff82df8158 R nbio_v7_9_ras_hw_ops -ffffffff82df8198 r nbio_v7_9_ras_controller_irq_funcs -ffffffff82df81a8 r nbio_v7_9_ras_err_event_athub_irq_funcs -ffffffff82df9000 r nv_common_ip_funcs -ffffffff82df90a8 R nv_common_ip_block -ffffffff82df90c0 r nv_asic_funcs -ffffffff82df9180 r nv_allowed_read_registers -ffffffff82df9300 r sc_video_codecs_encode -ffffffff82df9310 r sc_video_codecs_decode_vcn1 -ffffffff82df9320 r sc_video_codecs_decode_vcn0 -ffffffff82df9330 r yc_video_codecs_decode -ffffffff82df9340 r bg_video_codecs_encode -ffffffff82df9350 r bg_video_codecs_decode -ffffffff82df9360 r nv_video_codecs_encode -ffffffff82df9370 r nv_video_codecs_decode -ffffffff82df9380 r sc_video_codecs_encode_array -ffffffff82df93b0 r sc_video_codecs_decode_array_vcn1 -ffffffff82df9440 r sc_video_codecs_decode_array_vcn0 -ffffffff82df94e0 r yc_video_codecs_decode_array -ffffffff82df9550 r bg_video_codecs_decode_array -ffffffff82df9590 r nv_video_codecs_encode_array -ffffffff82df95c0 r nv_video_codecs_decode_array -ffffffff82dfa000 r psp_v10_0_funcs -ffffffff82dfb000 r psp_v11_0_funcs -ffffffff82dfc000 r psp_v11_0_8_funcs -ffffffff82dfd000 r psp_v12_0_funcs -ffffffff82dfe000 r psp_v13_0_funcs -ffffffff82dff000 r psp_v13_0_4_funcs -ffffffff82e00000 r psp_v3_1_funcs -ffffffff82e01000 r sdma_v2_4_ip_funcs -ffffffff82e010a8 R sdma_v2_4_ip_block -ffffffff82e010c0 r sdma_v2_4_ring_funcs -ffffffff82e01200 r sdma_v2_4_buffer_funcs -ffffffff82e01220 r sdma_v2_4_vm_pte_funcs -ffffffff82e01240 r sdma_v2_4_trap_irq_funcs -ffffffff82e01250 r sdma_v2_4_illegal_inst_irq_funcs -ffffffff82e01260 r iceland_mgcg_cgcg_init -ffffffff82e01280 r golden_settings_iceland_a11 -ffffffff82e02000 r sdma_v3_0_ip_funcs -ffffffff82e020a8 R sdma_v3_0_ip_block -ffffffff82e020c0 R sdma_v3_1_ip_block -ffffffff82e020d8 r sdma_v3_0_ring_funcs -ffffffff82e02218 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jpeg_v2_0_irq_funcs +ffffffff82dda000 r jpeg_v2_5_ip_funcs +ffffffff82dda0a8 R jpeg_v2_5_ip_block +ffffffff82dda0c0 r jpeg_v2_6_ip_funcs +ffffffff82dda168 R jpeg_v2_6_ip_block +ffffffff82dda180 R jpeg_v2_6_ras_hw_ops +ffffffff82dda1c0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82dda300 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82dda440 r jpeg_v2_5_irq_funcs +ffffffff82dda450 r jpeg_v2_6_ras_irq_funcs +ffffffff82ddb000 r jpeg_v3_0_ip_funcs +ffffffff82ddb0a8 R jpeg_v3_0_ip_block +ffffffff82ddb0c0 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82ddb200 r jpeg_v3_0_irq_funcs +ffffffff82ddc000 r jpeg_v4_0_ip_funcs +ffffffff82ddc0a8 R jpeg_v4_0_ip_block +ffffffff82ddc0c0 R jpeg_v4_0_ras_hw_ops +ffffffff82ddc100 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82ddc240 r jpeg_v4_0_irq_funcs +ffffffff82ddc250 r jpeg_v4_0_ras_irq_funcs +ffffffff82ddd000 r jpeg_v4_0_3_ip_funcs +ffffffff82ddd0a8 R jpeg_v4_0_3_ip_block +ffffffff82ddd0c0 r jpeg_v4_0_3_dec_ring_vm_funcs +ffffffff82ddd200 r jpeg_v4_0_3_irq_funcs +ffffffff82ddd210 r jpeg_v4_0_3_ras_hw_ops +ffffffff82ddd250 r jpeg_v4_0_3_ue_reg_list +ffffffff82dde000 R lsdma_v6_0_funcs +ffffffff82ddf000 r mca_v3_0_mp0_hw_ops +ffffffff82ddf040 r mca_v3_0_mp1_hw_ops +ffffffff82ddf080 r mca_v3_0_mpio_hw_ops +ffffffff82de0000 r mes_v10_1_ip_funcs +ffffffff82de00a8 R mes_v10_1_ip_block +ffffffff82de00c0 r mes_v10_1_funcs +ffffffff82de00f0 r mes_v10_1_ring_funcs +ffffffff82de1000 r mes_v11_0_ip_funcs +ffffffff82de10a8 R mes_v11_0_ip_block +ffffffff82de10c0 r mes_v11_0_funcs +ffffffff82de10f0 r mes_v11_0_ring_funcs +ffffffff82de2000 R mmhub_v1_0_funcs +ffffffff82de2050 r mmhub_v1_0_edc_cnt_regs +ffffffff82de20c0 r mmhub_v1_0_ras_fields +ffffffff82de3000 R mmhub_v1_7_funcs +ffffffff82de3050 r mmhub_v1_7_edc_cnt_regs +ffffffff82de3250 r mmhub_v1_7_ras_fields +ffffffff82de49c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82de5000 R mmhub_v1_8_funcs +ffffffff82de5050 r mmhub_v1_8_ras_hw_ops +ffffffff82de5090 r mmhub_v1_8_ce_reg_list +ffffffff82de5180 r mmhub_v1_8_ras_memory_list +ffffffff82de52b0 r mmhub_v1_8_ue_reg_list +ffffffff82de6000 R mmhub_v2_0_funcs +ffffffff82de6050 r mmhub_v2_0_vmhub_funcs +ffffffff82de6060 r mmhub_client_ids_navi1x +ffffffff82de6190 r mmhub_client_ids_sienna_cichlid +ffffffff82de6450 r mmhub_client_ids_beige_goby +ffffffff82de7000 R mmhub_v2_3_funcs +ffffffff82de7050 r mmhub_v2_3_vmhub_funcs +ffffffff82de7060 r mmhub_client_ids_vangogh +ffffffff82de8000 R mmhub_v3_0_funcs +ffffffff82de8050 r mmhub_v3_0_vmhub_funcs +ffffffff82de8060 r mmhub_client_ids_v3_0_0 +ffffffff82de9000 R mmhub_v3_0_1_funcs +ffffffff82de9050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82de9060 r mmhub_client_ids_v3_0_1 +ffffffff82dea000 R mmhub_v3_0_2_funcs +ffffffff82dea050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82dea060 r mmhub_client_ids_v3_0_2 +ffffffff82deb000 R mmhub_v9_4_ras_hw_ops +ffffffff82deb040 R mmhub_v9_4_funcs +ffffffff82deb090 r mmhub_v9_4_edc_cnt_regs +ffffffff82deb330 r mmhub_v9_4_ras_fields +ffffffff82ded3b0 r mmhub_v9_4_err_status_regs +ffffffff82dee000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82dee010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82dee020 R xgpu_ai_virt_ops +ffffffff82def000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82def010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82def020 R xgpu_nv_virt_ops +ffffffff82df0000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82df0240 r xgpu_fiji_golden_settings_a10 +ffffffff82df0370 r xgpu_fiji_golden_common_all +ffffffff82df03f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82df0810 r xgpu_tonga_golden_settings_a11 +ffffffff82df09d0 r xgpu_tonga_golden_common_all +ffffffff82df0a28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82df0a38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82df0a48 R xgpu_vi_virt_ops +ffffffff82df1000 r navi10_ih_ip_funcs +ffffffff82df10a8 R navi10_ih_ip_block +ffffffff82df10c0 r navi10_ih_funcs +ffffffff82df10e0 r navi10_ih_self_irq_funcs +ffffffff82df2000 R nbio_v2_3_hdp_flush_reg +ffffffff82df2048 R nbio_v2_3_funcs +ffffffff82df3000 R nbio_v4_3_hdp_flush_reg +ffffffff82df3048 R nbio_v4_3_funcs +ffffffff82df3158 R nbio_v4_3_sriov_funcs +ffffffff82df3268 r nbio_v4_3_ras_err_event_athub_irq_funcs +ffffffff82df4000 R nbio_v6_1_hdp_flush_reg +ffffffff82df4048 R nbio_v6_1_funcs +ffffffff82df5000 R nbio_v7_0_hdp_flush_reg +ffffffff82df5048 R nbio_v7_0_funcs +ffffffff82df6000 R nbio_v7_2_hdp_flush_reg +ffffffff82df6048 R nbio_v7_2_funcs +ffffffff82df7000 R nbio_v7_4_hdp_flush_reg +ffffffff82df7048 R nbio_v7_4_ras_hw_ops +ffffffff82df7088 R nbio_v7_4_funcs +ffffffff82df7198 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82df71a8 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82df8000 R nbio_v7_7_hdp_flush_reg +ffffffff82df8048 R nbio_v7_7_funcs +ffffffff82df9000 R nbio_v7_9_hdp_flush_reg +ffffffff82df9048 R nbio_v7_9_funcs +ffffffff82df9158 R nbio_v7_9_ras_hw_ops +ffffffff82df9198 r nbio_v7_9_ras_controller_irq_funcs +ffffffff82df91a8 r nbio_v7_9_ras_err_event_athub_irq_funcs +ffffffff82dfa000 r nv_common_ip_funcs +ffffffff82dfa0a8 R nv_common_ip_block +ffffffff82dfa0c0 r nv_asic_funcs +ffffffff82dfa180 r nv_allowed_read_registers +ffffffff82dfa300 r sc_video_codecs_encode +ffffffff82dfa310 r sc_video_codecs_decode_vcn1 +ffffffff82dfa320 r sc_video_codecs_decode_vcn0 +ffffffff82dfa330 r yc_video_codecs_decode +ffffffff82dfa340 r bg_video_codecs_encode +ffffffff82dfa350 r bg_video_codecs_decode +ffffffff82dfa360 r nv_video_codecs_encode +ffffffff82dfa370 r nv_video_codecs_decode +ffffffff82dfa380 r sc_video_codecs_encode_array +ffffffff82dfa3b0 r sc_video_codecs_decode_array_vcn1 +ffffffff82dfa440 r sc_video_codecs_decode_array_vcn0 +ffffffff82dfa4e0 r yc_video_codecs_decode_array +ffffffff82dfa550 r bg_video_codecs_decode_array +ffffffff82dfa590 r nv_video_codecs_encode_array +ffffffff82dfa5c0 r nv_video_codecs_decode_array +ffffffff82dfb000 r psp_v10_0_funcs +ffffffff82dfc000 r psp_v11_0_funcs +ffffffff82dfd000 r psp_v11_0_8_funcs +ffffffff82dfe000 r psp_v12_0_funcs +ffffffff82dff000 r psp_v13_0_funcs +ffffffff82e00000 r psp_v13_0_4_funcs +ffffffff82e01000 r psp_v3_1_funcs +ffffffff82e02000 r sdma_v2_4_ip_funcs +ffffffff82e020a8 R sdma_v2_4_ip_block +ffffffff82e020c0 r sdma_v2_4_ring_funcs +ffffffff82e02200 r sdma_v2_4_buffer_funcs +ffffffff82e02220 r sdma_v2_4_vm_pte_funcs +ffffffff82e02240 r sdma_v2_4_trap_irq_funcs +ffffffff82e02250 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82e02260 r iceland_mgcg_cgcg_init +ffffffff82e02280 r golden_settings_iceland_a11 +ffffffff82e03000 r sdma_v3_0_ip_funcs +ffffffff82e030a8 R sdma_v3_0_ip_block +ffffffff82e030c0 R sdma_v3_1_ip_block +ffffffff82e030d8 r sdma_v3_0_ring_funcs +ffffffff82e03218 r sdma_v3_0_buffer_funcs +ffffffff82e03238 r sdma_v3_0_vm_pte_funcs +ffffffff82e03258 r sdma_v3_0_trap_irq_funcs +ffffffff82e03268 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82e03280 r fiji_mgcg_cgcg_init +ffffffff82e032a0 r golden_settings_fiji_a10 +ffffffff82e03300 r tonga_mgcg_cgcg_init +ffffffff82e03320 r golden_settings_tonga_a11 +ffffffff82e033a0 r golden_settings_polaris11_a11 +ffffffff82e03420 r golden_settings_polaris10_a11 +ffffffff82e034a0 r cz_mgcg_cgcg_init +ffffffff82e034c0 r cz_golden_settings_a11 +ffffffff82e03550 r stoney_mgcg_cgcg_init +ffffffff82e03560 r stoney_golden_settings_a11 +ffffffff82e04000 R sdma_v4_0_ip_funcs +ffffffff82e040a8 R sdma_v4_0_ras_hw_ops +ffffffff82e040e8 R sdma_v4_0_ip_block +ffffffff82e04100 r sdma_v4_0_ring_funcs +ffffffff82e04240 r sdma_v4_0_page_ring_funcs +ffffffff82e04380 r sdma_v4_0_buffer_funcs +ffffffff82e043a0 r sdma_v4_0_vm_pte_funcs +ffffffff82e043c0 r sdma_v4_0_trap_irq_funcs +ffffffff82e043d0 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82e043e0 r sdma_v4_0_ecc_irq_funcs +ffffffff82e043f0 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82e04400 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82e04410 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82e04420 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82e04430 r golden_settings_sdma_4 +ffffffff82e04690 r golden_settings_sdma_vg10 +ffffffff82e04740 r golden_settings_sdma_vg12 +ffffffff82e047f0 r golden_settings_sdma0_4_2_init +ffffffff82e04810 r golden_settings_sdma0_4_2 +ffffffff82e04aa0 r golden_settings_sdma1_4_2 +ffffffff82e04d30 r golden_settings_sdma_arct +ffffffff82e05030 r golden_settings_sdma_aldebaran +ffffffff82e051a0 r golden_settings_sdma_4_1 +ffffffff82e052b0 r golden_settings_sdma_rv2 +ffffffff82e052e0 r golden_settings_sdma_rv1 +ffffffff82e05310 r golden_settings_sdma_4_3 +ffffffff82e05400 r sdma_v4_0_ras_fields +ffffffff82e06000 R sdma_v4_4_ras_hw_ops +ffffffff82e06040 r sdma_v4_4_ras_fields +ffffffff82e07000 R sdma_v4_4_2_ip_funcs +ffffffff82e070a8 R sdma_v4_4_2_ip_block +ffffffff82e070c0 r sdma_v4_4_2_ring_funcs +ffffffff82e07200 r sdma_v4_4_2_page_ring_funcs +ffffffff82e07340 r sdma_v4_4_2_buffer_funcs +ffffffff82e07360 r sdma_v4_4_2_vm_pte_funcs +ffffffff82e07380 r sdma_v4_4_2_trap_irq_funcs +ffffffff82e07390 r sdma_v4_4_2_illegal_inst_irq_funcs +ffffffff82e073a0 r sdma_v4_4_2_ecc_irq_funcs +ffffffff82e073b0 r sdma_v4_4_2_vm_hole_irq_funcs +ffffffff82e073c0 r sdma_v4_4_2_doorbell_invalid_irq_funcs +ffffffff82e073d0 r sdma_v4_4_2_pool_timeout_irq_funcs +ffffffff82e073e0 r sdma_v4_4_2_srbm_write_irq_funcs +ffffffff82e073f0 r sdma_v4_4_2_ras_hw_ops +ffffffff82e07430 r sdma_v4_2_2_ue_reg_list +ffffffff82e07460 r sdma_v4_4_2_ras_memory_list +ffffffff82e08000 R sdma_v5_0_ip_funcs +ffffffff82e080a8 R sdma_v5_0_ip_block +ffffffff82e080c0 r sdma_v5_0_ring_funcs +ffffffff82e08200 r sdma_v5_0_buffer_funcs +ffffffff82e08220 r sdma_v5_0_vm_pte_funcs +ffffffff82e08240 r sdma_v5_0_trap_irq_funcs +ffffffff82e08250 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82e08260 r golden_settings_sdma_5 +ffffffff82e084a0 r golden_settings_sdma_nv10 +ffffffff82e084d0 r golden_settings_sdma_nv14 +ffffffff82e08500 r golden_settings_sdma_5_sriov +ffffffff82e086e0 r golden_settings_sdma_nv12 +ffffffff82e08770 r golden_settings_sdma_cyan_skillfish +ffffffff82e09000 R sdma_v5_2_ip_funcs +ffffffff82e090a8 R sdma_v5_2_ip_block +ffffffff82e090c0 r sdma_v5_2_ring_funcs +ffffffff82e09200 r sdma_v5_2_buffer_funcs +ffffffff82e09220 r sdma_v5_2_vm_pte_funcs +ffffffff82e09240 r sdma_v5_2_trap_irq_funcs +ffffffff82e09250 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82e0a000 R sdma_v6_0_ip_funcs +ffffffff82e0a0a8 R sdma_v6_0_ip_block +ffffffff82e0a0c0 r sdma_v6_0_ring_funcs +ffffffff82e0a200 r sdma_v6_0_buffer_funcs +ffffffff82e0a220 r sdma_v6_0_vm_pte_funcs +ffffffff82e0a240 r sdma_v6_0_trap_irq_funcs +ffffffff82e0a250 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82e0b000 r smu_v11_0_i2c_algo +ffffffff82e0b010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82e0b028 r smu_v11_0_i2c_control_quirks +ffffffff82e0c000 R smuio_v11_0_funcs +ffffffff82e0d000 R smuio_v11_0_6_funcs +ffffffff82e0e000 R smuio_v13_0_funcs +ffffffff82e0f000 R smuio_v13_0_3_funcs +ffffffff82e10000 R smuio_v13_0_6_funcs +ffffffff82e11000 R smuio_v9_0_funcs +ffffffff82e12000 r soc15_common_ip_funcs +ffffffff82e120a8 R vega10_common_ip_block +ffffffff82e120c0 r soc15_asic_funcs +ffffffff82e12180 r vega20_asic_funcs +ffffffff82e12240 r aqua_vanjaram_asic_funcs +ffffffff82e12300 r soc15_allowed_read_registers +ffffffff82e12490 r vega_video_codecs_encode +ffffffff82e124a0 r vega_video_codecs_decode +ffffffff82e124b0 r rv_video_codecs_decode +ffffffff82e124c0 r rn_video_codecs_decode +ffffffff82e124d0 r vcn_4_0_3_video_codecs_encode +ffffffff82e124e0 r vcn_4_0_3_video_codecs_decode +ffffffff82e124f0 r vega_video_codecs_encode_array +ffffffff82e12520 r vega_video_codecs_decode_array +ffffffff82e125a0 r rv_video_codecs_decode_array +ffffffff82e12630 r rn_video_codecs_decode_array +ffffffff82e126c0 r vcn_4_0_3_video_codecs_decode_array +ffffffff82e13000 r soc21_common_ip_funcs +ffffffff82e130a8 R soc21_common_ip_block +ffffffff82e130c0 r soc21_asic_funcs +ffffffff82e13180 r soc21_allowed_read_registers +ffffffff82e13300 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82e13310 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82e13320 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82e13330 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82e13340 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82e13370 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82e133c0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82e13400 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82e14000 r tonga_ih_ip_funcs +ffffffff82e140a8 R tonga_ih_ip_block +ffffffff82e140c0 r tonga_ih_funcs +ffffffff82e15000 R umc_v6_0_funcs +ffffffff82e16000 R umc_v6_1_channel_idx_tbl +ffffffff82e16080 R umc_v6_1_ras_hw_ops +ffffffff82e17000 R umc_v6_7_channel_idx_tbl_second +ffffffff82e17080 R umc_v6_7_channel_idx_tbl_first +ffffffff82e17100 R umc_v6_7_ras_hw_ops +ffffffff82e18000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82e18040 R umc_v8_10_channel_idx_tbl_ext0 +ffffffff82e18080 R umc_v8_10_channel_idx_tbl +ffffffff82e180e0 R umc_v8_10_ras_hw_ops +ffffffff82e19000 R umc_v8_7_channel_idx_tbl +ffffffff82e19040 R umc_v8_7_ras_hw_ops +ffffffff82e1a000 r uvd_v5_0_ip_funcs +ffffffff82e1a0a8 R uvd_v5_0_ip_block +ffffffff82e1a0c0 r uvd_v5_0_ring_funcs +ffffffff82e1a200 r uvd_v5_0_irq_funcs +ffffffff82e1b000 r uvd_v6_0_ip_funcs +ffffffff82e1b0a8 R uvd_v6_0_ip_block +ffffffff82e1b0c0 R uvd_v6_2_ip_block +ffffffff82e1b0d8 R uvd_v6_3_ip_block +ffffffff82e1b0f0 r uvd_v6_0_ring_vm_funcs +ffffffff82e1b230 r uvd_v6_0_ring_phys_funcs +ffffffff82e1b370 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82e1b4b0 r uvd_v6_0_irq_funcs +ffffffff82e1c000 R uvd_v7_0_ip_funcs +ffffffff82e1c0a8 R uvd_v7_0_ip_block +ffffffff82e1c0c0 r uvd_v7_0_ring_vm_funcs +ffffffff82e1c200 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82e1c340 r uvd_v7_0_irq_funcs +ffffffff82e1d000 r vce_v3_0_ip_funcs +ffffffff82e1d0a8 R vce_v3_0_ip_block +ffffffff82e1d0c0 R vce_v3_1_ip_block +ffffffff82e1d0d8 R vce_v3_4_ip_block +ffffffff82e1d0f0 r vce_v3_0_ring_vm_funcs +ffffffff82e1d230 r vce_v3_0_ring_phys_funcs +ffffffff82e1d370 r vce_v3_0_irq_funcs +ffffffff82e1e000 R vce_v4_0_ip_funcs +ffffffff82e1e0a8 R vce_v4_0_ip_block +ffffffff82e1e0c0 r vce_v4_0_ring_vm_funcs +ffffffff82e1e200 r vce_v4_0_irq_funcs +ffffffff82e1f000 r vcn_v1_0_ip_funcs +ffffffff82e1f0a8 R vcn_v1_0_ip_block +ffffffff82e1f0c0 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82e1f200 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82e1f340 r vcn_v1_0_irq_funcs +ffffffff82e20000 r vcn_v2_0_ip_funcs +ffffffff82e200a8 R vcn_v2_0_ip_block +ffffffff82e200c0 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82e20200 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82e20340 r vcn_v2_0_irq_funcs +ffffffff82e21000 r vcn_v2_5_ip_funcs +ffffffff82e210a8 R vcn_v2_5_ip_block +ffffffff82e210c0 r vcn_v2_6_ip_funcs +ffffffff82e21168 R vcn_v2_6_ip_block +ffffffff82e21180 R vcn_v2_6_ras_hw_ops +ffffffff82e211c0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82e21300 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82e21440 r vcn_v2_5_irq_funcs +ffffffff82e21450 r vcn_v2_6_ras_irq_funcs +ffffffff82e22000 r vcn_v3_0_ip_funcs +ffffffff82e220a8 R vcn_v3_0_ip_block +ffffffff82e220c0 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82e22200 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82e22340 r vcn_v3_0_irq_funcs +ffffffff82e23000 r vcn_v4_0_ip_funcs +ffffffff82e230a8 R vcn_v4_0_ip_block +ffffffff82e230c0 R vcn_v4_0_ras_hw_ops +ffffffff82e23100 r vcn_v4_0_irq_funcs +ffffffff82e23110 r vcn_v4_0_ras_irq_funcs +ffffffff82e24000 r vcn_v4_0_3_ip_funcs +ffffffff82e240a8 R vcn_v4_0_3_ip_block +ffffffff82e240c0 r vcn_v4_0_3_unified_ring_vm_funcs +ffffffff82e24200 r vcn_v4_0_3_irq_funcs +ffffffff82e24210 r vcn_v4_0_3_ras_hw_ops +ffffffff82e24250 r vcn_v4_0_3_ue_reg_list +ffffffff82e25000 R vega10_ih_ip_funcs +ffffffff82e250a8 R vega10_ih_ip_block +ffffffff82e250c0 r vega10_ih_funcs +ffffffff82e250e0 r vega10_ih_self_irq_funcs +ffffffff82e26000 r GC_BASE +ffffffff82e26064 r HDP_BASE +ffffffff82e260c8 r MMHUB_BASE +ffffffff82e2612c r ATHUB_BASE +ffffffff82e26190 r NBIO_BASE +ffffffff82e261f4 r MP0_BASE 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-ffffffff82e3d000 r dce112_max_clks_by_state +ffffffff82e3d000 r dce110_max_clks_by_state ffffffff82e3d028 r disp_clk_regs ffffffff82e3d07c r disp_clk_shift ffffffff82e3d088 r disp_clk_mask -ffffffff82e3e000 r dce120_max_clks_by_state -ffffffff82e3f000 r clk_mgr_regs -ffffffff82e3f054 r clk_mgr_shift -ffffffff82e3f060 r clk_mgr_mask +ffffffff82e3e000 r dce112_max_clks_by_state +ffffffff82e3e028 r disp_clk_regs +ffffffff82e3e07c r disp_clk_shift +ffffffff82e3e088 r disp_clk_mask +ffffffff82e3f000 r dce120_max_clks_by_state ffffffff82e40000 r clk_mgr_regs ffffffff82e40054 r clk_mgr_shift ffffffff82e40060 r clk_mgr_mask ffffffff82e41000 r clk_mgr_regs ffffffff82e41054 r clk_mgr_shift ffffffff82e41060 r clk_mgr_mask -ffffffff82e42000 r lpddr5_wm_table -ffffffff82e420c0 r ddr5_wm_table +ffffffff82e42000 r clk_mgr_regs +ffffffff82e42054 r clk_mgr_shift +ffffffff82e42060 r clk_mgr_mask ffffffff82e43000 r lpddr5_wm_table ffffffff82e430c0 r ddr5_wm_table -ffffffff82e44000 r ddr5_wm_table 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filter_6tap_64p_upscale -ffffffff82e56090 r filter_6tap_64p_116 -ffffffff82e56220 r filter_6tap_64p_149 -ffffffff82e563b0 r filter_6tap_64p_183 -ffffffff82e56540 r filter_7tap_64p_upscale -ffffffff82e56710 r filter_7tap_64p_116 -ffffffff82e568e0 r filter_7tap_64p_149 -ffffffff82e56ab0 r filter_7tap_64p_183 -ffffffff82e56c80 r filter_8tap_64p_upscale -ffffffff82e56e90 r filter_8tap_64p_116 -ffffffff82e570a0 r filter_8tap_64p_149 -ffffffff82e572b0 r filter_8tap_64p_183 -ffffffff82e574c0 r filter_2tap_16p -ffffffff82e574f0 r filter_2tap_64p -ffffffff82e58000 r dce110_str_enc_funcs -ffffffff82e58120 r audio_clock_info_table_48bpc -ffffffff82e582b0 r audio_clock_info_table_36bpc -ffffffff82e58440 r audio_clock_info_table -ffffffff82e59000 r global_color_matrix -ffffffff82e590a8 r dce_transform_funcs -ffffffff82e5a000 r abm_funcs -ffffffff82e5b000 r psr_funcs -ffffffff82e5b040 r DP_SINK_DEVICE_STR_ID_1 -ffffffff82e5b045 r DP_SINK_DEVICE_STR_ID_2 -ffffffff82e5c000 r replay_funcs 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-ffffffff82e5f830 r xfm_shift -ffffffff82e5f890 r xfm_mask -ffffffff82e5fa10 r opp_regs -ffffffff82e5fb60 r opp_shift -ffffffff82e5fb8c r opp_mask -ffffffff82e5fc40 r aux_engine_regs -ffffffff82e5fd30 r aux_mask -ffffffff82e5fd90 r aux_shift -ffffffff82e5fdb0 r i2c_hw_regs -ffffffff82e5ff00 r i2c_shifts -ffffffff82e5ff2c r i2c_masks -ffffffff82e5ffd0 r audio_regs -ffffffff82e60104 r audio_shift -ffffffff82e6011c r audio_mask -ffffffff82e60160 r stream_enc_regs -ffffffff82e6080c r se_shift -ffffffff82e60890 r se_mask -ffffffff82e60a94 r hwseq_reg -ffffffff82e60cb0 r hwseq_shift -ffffffff82e60d30 r hwseq_mask -ffffffff82e61000 r reg_offsets -ffffffff82e61018 r dce110_compressor_funcs -ffffffff82e62000 r dce110_funcs -ffffffff82e622e8 r dce110_private_funcs -ffffffff82e63000 r dce110_mem_input_v_funcs -ffffffff82e63090 r dvmm_Hw_Setting_1DTiling -ffffffff82e63120 r dvmm_Hw_Setting_2DTiling -ffffffff82e631b0 r dvmm_Hw_Setting_Linear -ffffffff82e64000 r global_color_matrix -ffffffff82e640b0 r input_csc_matrix -ffffffff82e65000 r funcs -ffffffff82e66000 r bios_regs -ffffffff82e66008 r dce110_res_pool_funcs -ffffffff82e66100 r debug_defaults -ffffffff82e662b0 r clk_src_regs -ffffffff82e663ac r dmcu_regs -ffffffff82e66408 r dmcu_shift -ffffffff82e6641c r dmcu_mask -ffffffff82e66468 r abm_regs -ffffffff82e664d0 r abm_shift -ffffffff82e664f4 r abm_mask -ffffffff82e66580 r dce110_tg_offsets -ffffffff82e665c8 r res_create_funcs -ffffffff82e665f8 r plane_cap -ffffffff82e66624 r underlay_plane_cap -ffffffff82e66650 r stoney_resource_cap -ffffffff82e6668c r carrizo_resource_cap -ffffffff82e666d0 r panel_cntl_regs -ffffffff82e666f0 r panel_cntl_shift -ffffffff82e66700 r panel_cntl_mask -ffffffff82e66740 r link_enc_regs -ffffffff82e66b00 r link_enc_aux_regs -ffffffff82e66b50 r link_enc_hpd_regs -ffffffff82e66b68 r link_enc_feature -ffffffff82e66b78 r cs_shift -ffffffff82e66b84 r cs_mask -ffffffff82e66bb0 r mi_regs -ffffffff82e66d3c r mi_shifts -ffffffff82e66d84 r mi_masks -ffffffff82e66ea0 r ipp_regs -ffffffff82e66f9c r ipp_shift -ffffffff82e66fc4 r ipp_mask -ffffffff82e67060 r xfm_regs -ffffffff82e67330 r xfm_shift -ffffffff82e67390 r xfm_mask -ffffffff82e67510 r opp_regs -ffffffff82e67660 r opp_shift -ffffffff82e6768c r opp_mask -ffffffff82e67740 r aux_engine_regs -ffffffff82e67830 r aux_mask -ffffffff82e67890 r aux_shift -ffffffff82e678b0 r i2c_hw_regs -ffffffff82e67a00 r i2c_shifts -ffffffff82e67a2c r i2c_masks -ffffffff82e67ad0 r audio_regs -ffffffff82e67c04 r audio_shift -ffffffff82e67c1c r audio_mask -ffffffff82e67c60 r stream_enc_regs -ffffffff82e67f3c r se_shift -ffffffff82e67fc0 r se_mask -ffffffff82e681c4 r hwseq_stoney_reg -ffffffff82e683e0 r hwseq_cz_reg -ffffffff82e685fc r hwseq_shift -ffffffff82e6867c r hwseq_mask -ffffffff82e69000 r dce110_tg_funcs -ffffffff82e6a000 r dce110_tg_v_funcs -ffffffff82e6b000 r dce110_xfmv_funcs -ffffffff82e6c000 r reg_offsets +ffffffff82e44000 r lpddr5_wm_table +ffffffff82e440c0 r ddr5_wm_table +ffffffff82e45000 r ddr5_wm_table +ffffffff82e46000 r lpddr5_wm_table +ffffffff82e460c0 r ddr4_wm_table +ffffffff82e47000 r clk_mgr_regs_dcn321 +ffffffff82e47054 r clk_mgr_shift_dcn321 +ffffffff82e47060 r clk_mgr_mask_dcn321 +ffffffff82e47084 r clk_mgr_regs_dcn32 +ffffffff82e470d8 r clk_mgr_shift_dcn32 +ffffffff82e470e4 r clk_mgr_mask_dcn32 +ffffffff82e48000 r DC_BUILD_ID +ffffffff82e4a000 r output_csc_matrix +ffffffff82e4a0e0 r black_color_format +ffffffff82e4d000 r dce_funcs +ffffffff82e4e000 r funcs +ffffffff82e4f000 R video_optimized_pixel_rates +ffffffff82e4f1c0 r dce110_clk_src_funcs +ffffffff82e4f1e8 r dce112_clk_src_funcs +ffffffff82e4f210 r dcn20_clk_src_funcs +ffffffff82e4f238 r dcn3_clk_src_funcs +ffffffff82e4f260 r dcn31_clk_src_funcs +ffffffff82e50000 r dce_funcs +ffffffff82e50068 r dcn10_funcs +ffffffff82e500d0 r dcn20_funcs +ffffffff82e50138 r dcn21_funcs +ffffffff82e51000 r dce_ipp_funcs +ffffffff82e52000 r dce110_lnk_enc_funcs +ffffffff82e53000 r dce_mi_funcs +ffffffff82e53090 r dce112_mi_funcs +ffffffff82e53120 r dce120_mi_funcs +ffffffff82e531b0 r pte_settings +ffffffff82e54000 r funcs +ffffffff82e55000 r dce_link_panel_cntl_funcs +ffffffff82e56000 r filter_3tap_16p_upscale +ffffffff82e56040 r filter_3tap_16p_116 +ffffffff82e56080 r filter_3tap_16p_149 +ffffffff82e560c0 r filter_3tap_16p_183 +ffffffff82e56100 r filter_3tap_64p_upscale +ffffffff82e561d0 r filter_3tap_64p_116 +ffffffff82e562a0 r filter_3tap_64p_149 +ffffffff82e56370 r filter_3tap_64p_183 +ffffffff82e56440 r filter_4tap_16p_upscale +ffffffff82e56490 r filter_4tap_16p_116 +ffffffff82e564e0 r filter_4tap_16p_149 +ffffffff82e56530 r filter_4tap_16p_183 +ffffffff82e56580 r filter_4tap_64p_upscale +ffffffff82e56690 r filter_4tap_64p_116 +ffffffff82e567a0 r filter_4tap_64p_149 +ffffffff82e568b0 r filter_4tap_64p_183 +ffffffff82e569c0 r filter_5tap_64p_upscale +ffffffff82e56b10 r filter_5tap_64p_116 +ffffffff82e56c60 r filter_5tap_64p_149 +ffffffff82e56db0 r filter_5tap_64p_183 +ffffffff82e56f00 r filter_6tap_64p_upscale +ffffffff82e57090 r filter_6tap_64p_116 +ffffffff82e57220 r filter_6tap_64p_149 +ffffffff82e573b0 r filter_6tap_64p_183 +ffffffff82e57540 r filter_7tap_64p_upscale +ffffffff82e57710 r filter_7tap_64p_116 +ffffffff82e578e0 r filter_7tap_64p_149 +ffffffff82e57ab0 r filter_7tap_64p_183 +ffffffff82e57c80 r filter_8tap_64p_upscale +ffffffff82e57e90 r filter_8tap_64p_116 +ffffffff82e580a0 r filter_8tap_64p_149 +ffffffff82e582b0 r filter_8tap_64p_183 +ffffffff82e584c0 r filter_2tap_16p +ffffffff82e584f0 r filter_2tap_64p +ffffffff82e59000 r dce110_str_enc_funcs +ffffffff82e59120 r audio_clock_info_table_48bpc +ffffffff82e592b0 r audio_clock_info_table_36bpc +ffffffff82e59440 r audio_clock_info_table +ffffffff82e5a000 r global_color_matrix +ffffffff82e5a0a8 r dce_transform_funcs +ffffffff82e5b000 r abm_funcs +ffffffff82e5c000 r psr_funcs +ffffffff82e5c040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82e5c045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82e5d000 r replay_funcs +ffffffff82e5e000 r reg_offsets +ffffffff82e5f000 r bios_regs +ffffffff82e5f008 r res_cap +ffffffff82e5f048 r dce100_res_pool_funcs +ffffffff82e5f140 r clk_src_regs +ffffffff82e5f23c r dmcu_regs +ffffffff82e5f298 r dmcu_shift +ffffffff82e5f2ac r dmcu_mask +ffffffff82e5f2f8 r abm_regs +ffffffff82e5f360 r abm_shift +ffffffff82e5f384 r abm_mask +ffffffff82e5f410 r debug_defaults +ffffffff82e5f5c0 r dce100_tg_offsets +ffffffff82e5f608 r plane_cap +ffffffff82e5f638 r res_create_funcs +ffffffff82e5f670 r panel_cntl_regs +ffffffff82e5f690 r panel_cntl_shift +ffffffff82e5f6a0 r panel_cntl_mask +ffffffff82e5f6e0 r link_enc_regs +ffffffff82e5faa0 r link_enc_aux_regs +ffffffff82e5faf0 r link_enc_hpd_regs +ffffffff82e5fb08 r link_enc_feature +ffffffff82e5fb18 r cs_shift +ffffffff82e5fb24 r cs_mask +ffffffff82e5fb50 r mi_regs +ffffffff82e5fe68 r mi_shifts +ffffffff82e5feb0 r mi_masks +ffffffff82e5ffd0 r ipp_regs +ffffffff82e601c8 r ipp_shift +ffffffff82e601f0 r ipp_mask +ffffffff82e60290 r xfm_regs +ffffffff82e60830 r xfm_shift +ffffffff82e60890 r xfm_mask +ffffffff82e60a10 r opp_regs +ffffffff82e60b60 r opp_shift +ffffffff82e60b8c r opp_mask +ffffffff82e60c40 r aux_engine_regs +ffffffff82e60d30 r aux_mask +ffffffff82e60d90 r aux_shift +ffffffff82e60db0 r i2c_hw_regs +ffffffff82e60f00 r i2c_shifts +ffffffff82e60f2c r i2c_masks +ffffffff82e60fd0 r audio_regs +ffffffff82e61104 r audio_shift +ffffffff82e6111c r audio_mask +ffffffff82e61160 r stream_enc_regs +ffffffff82e6180c r se_shift +ffffffff82e61890 r se_mask +ffffffff82e61a94 r hwseq_reg +ffffffff82e61cb0 r hwseq_shift +ffffffff82e61d30 r hwseq_mask +ffffffff82e62000 r reg_offsets +ffffffff82e62018 r dce110_compressor_funcs +ffffffff82e63000 r dce110_funcs +ffffffff82e632e8 r dce110_private_funcs +ffffffff82e64000 r dce110_mem_input_v_funcs +ffffffff82e64090 r dvmm_Hw_Setting_1DTiling +ffffffff82e64120 r dvmm_Hw_Setting_2DTiling +ffffffff82e641b0 r dvmm_Hw_Setting_Linear +ffffffff82e65000 r global_color_matrix +ffffffff82e650b0 r input_csc_matrix +ffffffff82e66000 r funcs +ffffffff82e67000 r bios_regs +ffffffff82e67008 r dce110_res_pool_funcs +ffffffff82e67100 r debug_defaults +ffffffff82e672b0 r clk_src_regs +ffffffff82e673ac r dmcu_regs +ffffffff82e67408 r dmcu_shift +ffffffff82e6741c r dmcu_mask +ffffffff82e67468 r abm_regs +ffffffff82e674d0 r abm_shift +ffffffff82e674f4 r abm_mask +ffffffff82e67580 r dce110_tg_offsets +ffffffff82e675c8 r res_create_funcs +ffffffff82e675f8 r plane_cap +ffffffff82e67624 r underlay_plane_cap +ffffffff82e67650 r stoney_resource_cap +ffffffff82e6768c r carrizo_resource_cap +ffffffff82e676d0 r panel_cntl_regs +ffffffff82e676f0 r panel_cntl_shift +ffffffff82e67700 r panel_cntl_mask +ffffffff82e67740 r link_enc_regs +ffffffff82e67b00 r link_enc_aux_regs +ffffffff82e67b50 r link_enc_hpd_regs +ffffffff82e67b68 r link_enc_feature +ffffffff82e67b78 r cs_shift +ffffffff82e67b84 r cs_mask +ffffffff82e67bb0 r mi_regs +ffffffff82e67d3c r mi_shifts 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+ffffffff82f15850 r res_create_funcs +ffffffff82f15880 r plane_cap +ffffffff82f158b0 r link_enc_regs +ffffffff82f15f10 r link_enc_aux_regs +ffffffff82f15f60 r link_enc_hpd_regs +ffffffff82f15f74 r le_shift +ffffffff82f16064 r le_mask +ffffffff82f1641c r link_enc_feature +ffffffff82f1642c r panel_config_defaults +ffffffff82f16480 r debug_defaults_drv +ffffffff82f16628 r cs_shift +ffffffff82f16634 r cs_mask +ffffffff82f1665c r hubbub_reg +ffffffff82f167e4 r hubbub_shift +ffffffff82f16874 r hubbub_mask +ffffffff82f16ab0 r vmid_regs +ffffffff82f16c70 r vmid_shifts +ffffffff82f16c78 r vmid_masks +ffffffff82f16ca0 r hubp_regs +ffffffff82f174d0 r hubp_shift +ffffffff82f175cc r hubp_mask +ffffffff82f179c0 r dpp_regs +ffffffff82f18ed0 r tf_shift +ffffffff82f191a4 r tf_mask +ffffffff82f19cf0 r opp_regs +ffffffff82f19e50 r opp_shift +ffffffff82f19e88 r opp_mask +ffffffff82f19f60 r optc_regs +ffffffff82f1a500 r optc_shift +ffffffff82f1a5d4 r optc_mask +ffffffff82f1a91c r mpc_regs +ffffffff82f1c108 r mpc_shift +ffffffff82f1c1e4 r mpc_mask +ffffffff82f1c550 r dsc_regs +ffffffff82f1c79c r dsc_shift +ffffffff82f1c854 r dsc_mask +ffffffff82f1cb30 r dwbc30_regs +ffffffff82f1cd0c r dwbc30_shift +ffffffff82f1ce40 r dwbc30_mask +ffffffff82f1d310 r mcif_wb30_regs +ffffffff82f1d40c r mcif_wb30_shift +ffffffff82f1d4b8 r mcif_wb30_mask +ffffffff82f1d770 r aux_engine_regs +ffffffff82f1d838 r aux_mask +ffffffff82f1d898 r aux_shift +ffffffff82f1d8b0 r i2c_hw_regs +ffffffff82f1d9c8 r i2c_shifts +ffffffff82f1d9f4 r i2c_masks +ffffffff82f1daa0 r audio_regs +ffffffff82f1dbd4 r audio_shift +ffffffff82f1dbec r audio_mask +ffffffff82f1dc30 r stream_enc_regs +ffffffff82f1e2d4 r se_shift +ffffffff82f1e3b0 r se_mask +ffffffff82f1e720 r vpg_regs +ffffffff82f1e810 r vpg_shift +ffffffff82f1e838 r vpg_mask +ffffffff82f1e8e0 r afmt_regs +ffffffff82f1e9b8 r afmt_shift +ffffffff82f1e9cc r afmt_mask +ffffffff82f1ea20 r hpo_dp_stream_enc_regs +ffffffff82f1ec50 r hpo_dp_se_shift +ffffffff82f1ec78 r hpo_dp_se_mask +ffffffff82f1ed20 r apg_regs +ffffffff82f1ed60 r apg_shift +ffffffff82f1ed68 r apg_mask +ffffffff82f1ed80 r hpo_dp_link_enc_regs +ffffffff82f1ee90 r hpo_dp_le_shift +ffffffff82f1eeac r hpo_dp_le_mask +ffffffff82f1ef10 r hwseq_reg +ffffffff82f1f12c r hwseq_shift +ffffffff82f1f1ac r hwseq_mask +ffffffff82f20000 r bios_regs +ffffffff82f20008 r res_cap_dcn31 +ffffffff82f20050 r clk_src_regs +ffffffff82f201f4 r dccg_regs +ffffffff82f202e4 r dccg_shift +ffffffff82f20384 r dccg_mask +ffffffff82f20600 r abm_regs +ffffffff82f207a0 r abm_shift +ffffffff82f207c4 r abm_mask +ffffffff82f20850 r res_create_funcs +ffffffff82f20880 r plane_cap +ffffffff82f208b0 r link_enc_regs +ffffffff82f20f10 r link_enc_aux_regs +ffffffff82f20f60 r link_enc_hpd_regs +ffffffff82f20f74 r le_shift +ffffffff82f21064 r le_mask +ffffffff82f2141c r link_enc_feature +ffffffff82f2142c r panel_config_defaults +ffffffff82f21480 r debug_defaults_drv +ffffffff82f21628 r cs_shift +ffffffff82f21634 r cs_mask +ffffffff82f2165c r hubbub_reg +ffffffff82f217e4 r hubbub_shift +ffffffff82f21874 r hubbub_mask +ffffffff82f21ab0 r vmid_regs +ffffffff82f21c70 r vmid_shifts +ffffffff82f21c78 r vmid_masks +ffffffff82f21ca0 r hubp_regs +ffffffff82f224d0 r hubp_shift +ffffffff82f225cc r hubp_mask +ffffffff82f229c0 r dpp_regs +ffffffff82f23ed0 r tf_shift +ffffffff82f241a4 r tf_mask +ffffffff82f24cf0 r opp_regs +ffffffff82f24e50 r opp_shift +ffffffff82f24e88 r opp_mask +ffffffff82f24f60 r optc_regs +ffffffff82f25500 r optc_shift +ffffffff82f255d4 r optc_mask +ffffffff82f2591c r mpc_regs +ffffffff82f27108 r mpc_shift +ffffffff82f271e4 r mpc_mask +ffffffff82f27550 r dsc_regs +ffffffff82f2779c r dsc_shift +ffffffff82f27854 r dsc_mask +ffffffff82f27b30 r dwbc30_regs +ffffffff82f27d0c r dwbc30_shift +ffffffff82f27e40 r dwbc30_mask +ffffffff82f28310 r mcif_wb30_regs +ffffffff82f2840c r mcif_wb30_shift +ffffffff82f284b8 r mcif_wb30_mask +ffffffff82f28770 r aux_engine_regs +ffffffff82f28838 r aux_mask +ffffffff82f28898 r aux_shift +ffffffff82f288b0 r i2c_hw_regs +ffffffff82f289c8 r i2c_shifts +ffffffff82f289f4 r i2c_masks +ffffffff82f28aa0 r audio_regs +ffffffff82f28bd4 r audio_shift +ffffffff82f28bec r audio_mask +ffffffff82f28c30 r stream_enc_regs +ffffffff82f292d4 r se_shift +ffffffff82f293b0 r se_mask +ffffffff82f29720 r vpg_regs +ffffffff82f29810 r vpg_shift +ffffffff82f29838 r vpg_mask +ffffffff82f298e0 r afmt_regs +ffffffff82f299b8 r afmt_shift +ffffffff82f299cc r afmt_mask +ffffffff82f29a20 r hpo_dp_stream_enc_regs +ffffffff82f29c50 r hpo_dp_se_shift +ffffffff82f29c78 r hpo_dp_se_mask +ffffffff82f29d20 r apg_regs +ffffffff82f29d60 r apg_shift +ffffffff82f29d68 r apg_mask +ffffffff82f29d80 r hpo_dp_link_enc_regs +ffffffff82f29e90 r hpo_dp_le_shift +ffffffff82f29eac r hpo_dp_le_mask +ffffffff82f29f10 r hwseq_reg +ffffffff82f2a12c r hwseq_shift +ffffffff82f2a1ac r hwseq_mask +ffffffff82f2b000 r dccg32_funcs +ffffffff82f2c000 r dcn32_link_enc_funcs +ffffffff82f2d000 r dcn32_str_enc_funcs +ffffffff82f2e000 r hubbub32_funcs +ffffffff82f2f000 r dcn32_funcs +ffffffff82f2f2e8 r dcn32_private_funcs +ffffffff82f30000 r dcn32_mmhubbub_funcs +ffffffff82f31000 r dcn32_mpc_funcs +ffffffff82f32000 r res_cap_dcn32 +ffffffff82f3203c r dccg_shift +ffffffff82f320dc r dccg_mask +ffffffff82f32350 r abm_shift +ffffffff82f32374 r abm_mask +ffffffff82f32400 r res_create_funcs +ffffffff82f32430 r plane_cap +ffffffff82f3245c r le_shift +ffffffff82f3254c r le_mask +ffffffff82f32904 r link_enc_feature +ffffffff82f32918 r debug_defaults_drv +ffffffff82f32ac0 r cs_shift +ffffffff82f32acc r cs_mask +ffffffff82f32af4 r hubbub_shift +ffffffff82f32b84 r hubbub_mask +ffffffff82f32dbc r vmid_shifts +ffffffff82f32dc4 r vmid_masks +ffffffff82f32de4 r hubp_shift +ffffffff82f32ee0 r hubp_mask +ffffffff82f332d0 r tf_shift +ffffffff82f335a4 r tf_mask +ffffffff82f340e8 r opp_shift +ffffffff82f34120 r opp_mask +ffffffff82f341f4 r optc_shift +ffffffff82f342c8 r optc_mask +ffffffff82f34610 r mpc_shift +ffffffff82f346ec r mpc_mask +ffffffff82f34a58 r dsc_shift +ffffffff82f34b10 r dsc_mask +ffffffff82f34de8 r dwbc30_shift +ffffffff82f34f1c r dwbc30_mask +ffffffff82f353e4 r mcif_wb30_shift +ffffffff82f35490 r mcif_wb30_mask +ffffffff82f3573c r aux_mask +ffffffff82f3579c r aux_shift +ffffffff82f357b4 r i2c_shifts +ffffffff82f357e0 r i2c_masks +ffffffff82f35884 r audio_shift +ffffffff82f3589c r audio_mask +ffffffff82f358d8 r se_shift +ffffffff82f359b4 r se_mask +ffffffff82f35d20 r vpg_shift +ffffffff82f35d48 r vpg_mask +ffffffff82f35ddc r afmt_shift +ffffffff82f35df0 r afmt_mask +ffffffff82f35e34 r hpo_dp_se_shift +ffffffff82f35e5c r hpo_dp_se_mask +ffffffff82f35efc r apg_shift +ffffffff82f35f04 r apg_mask +ffffffff82f35f1c r hpo_dp_le_shift +ffffffff82f35f38 r hpo_dp_le_mask +ffffffff82f35f9c r hwseq_shift +ffffffff82f3601c r hwseq_mask +ffffffff82f37000 r dcn321_link_enc_funcs +ffffffff82f38000 r res_cap_dcn321 +ffffffff82f3803c r dccg_shift +ffffffff82f380dc r dccg_mask +ffffffff82f38350 r abm_shift +ffffffff82f38374 r abm_mask +ffffffff82f38400 r res_create_funcs +ffffffff82f38430 r plane_cap +ffffffff82f3845c r le_shift +ffffffff82f3854c r le_mask +ffffffff82f38904 r link_enc_feature +ffffffff82f38918 r debug_defaults_drv +ffffffff82f38ac0 r cs_shift +ffffffff82f38acc r cs_mask +ffffffff82f38af4 r hubbub_shift +ffffffff82f38b84 r hubbub_mask +ffffffff82f38dbc r vmid_shifts +ffffffff82f38dc4 r vmid_masks +ffffffff82f38de4 r hubp_shift +ffffffff82f38ee0 r hubp_mask +ffffffff82f392d0 r tf_shift +ffffffff82f395a4 r tf_mask +ffffffff82f3a0e8 r opp_shift +ffffffff82f3a120 r opp_mask +ffffffff82f3a1f4 r optc_shift +ffffffff82f3a2c8 r optc_mask +ffffffff82f3a610 r mpc_shift +ffffffff82f3a6ec r mpc_mask +ffffffff82f3aa58 r dsc_shift +ffffffff82f3ab10 r dsc_mask +ffffffff82f3ade8 r dwbc30_shift +ffffffff82f3af1c r dwbc30_mask +ffffffff82f3b3e4 r mcif_wb30_shift +ffffffff82f3b490 r mcif_wb30_mask +ffffffff82f3b73c r aux_mask +ffffffff82f3b79c r aux_shift +ffffffff82f3b7b4 r i2c_shifts +ffffffff82f3b7e0 r i2c_masks +ffffffff82f3b884 r audio_shift +ffffffff82f3b89c r audio_mask +ffffffff82f3b8d8 r se_shift +ffffffff82f3b9b4 r se_mask +ffffffff82f3bd20 r vpg_shift +ffffffff82f3bd48 r vpg_mask +ffffffff82f3bddc r afmt_shift +ffffffff82f3bdf0 r afmt_mask +ffffffff82f3be34 r hpo_dp_se_shift +ffffffff82f3be5c r hpo_dp_se_mask +ffffffff82f3befc r apg_shift +ffffffff82f3bf04 r apg_mask +ffffffff82f3bf1c r hpo_dp_le_shift +ffffffff82f3bf38 r hpo_dp_le_mask +ffffffff82f3bf9c r hwseq_shift +ffffffff82f3c01c r hwseq_mask +ffffffff82f3e000 R dcn10_soc_defaults +ffffffff82f3e08c R dcn10_ip_defaults +ffffffff82f4a000 r dml20_funcs +ffffffff82f4a030 r dml20v2_funcs +ffffffff82f4a060 r dml21_funcs +ffffffff82f4a090 r dml30_funcs +ffffffff82f4a0c0 r dml31_funcs +ffffffff82f4a0f0 r dml314_funcs +ffffffff82f4a120 r dml32_funcs +ffffffff82f4d000 r qp_table_444_8bpc_max +ffffffff82f4d940 r qp_table_444_8bpc_min +ffffffff82f4e280 r qp_table_444_10bpc_max +ffffffff82f4eec0 r qp_table_444_10bpc_min +ffffffff82f4fb00 r qp_table_444_12bpc_max +ffffffff82f50a40 r qp_table_444_12bpc_min +ffffffff82f51980 r qp_table_422_8bpc_max +ffffffff82f51ec0 r qp_table_422_8bpc_min +ffffffff82f52400 r qp_table_422_10bpc_max +ffffffff82f52b40 r qp_table_422_10bpc_min +ffffffff82f53280 r qp_table_422_12bpc_max +ffffffff82f53bc0 r qp_table_422_12bpc_min +ffffffff82f54500 r qp_table_420_8bpc_max +ffffffff82f54940 r qp_table_420_8bpc_min +ffffffff82f54d80 r qp_table_420_10bpc_max +ffffffff82f55340 r qp_table_420_10bpc_min +ffffffff82f55900 r qp_table_420_12bpc_max +ffffffff82f56040 r qp_table_420_12bpc_min ffffffff82f58000 r funcs +ffffffff82f58050 r hpd_regs +ffffffff82f581a0 r hpd_shift +ffffffff82f581b0 r hpd_mask +ffffffff82f581c0 r ddc_data_regs +ffffffff82f583a0 r ddc_clk_regs +ffffffff82f58580 r ddc_shift +ffffffff82f585a8 r ddc_mask ffffffff82f59000 r funcs -ffffffff82f59050 r hpd_regs -ffffffff82f591a0 r hpd_shift -ffffffff82f591b0 r hpd_mask -ffffffff82f591c0 r ddc_data_regs -ffffffff82f593a0 r ddc_clk_regs -ffffffff82f59580 r ddc_shift -ffffffff82f595a8 r ddc_mask ffffffff82f5a000 r funcs +ffffffff82f5a050 r hpd_regs +ffffffff82f5a1a0 r hpd_shift +ffffffff82f5a1b0 r hpd_mask +ffffffff82f5a1c0 r ddc_data_regs +ffffffff82f5a3a0 r ddc_clk_regs +ffffffff82f5a580 r ddc_shift +ffffffff82f5a5a8 r ddc_mask ffffffff82f5b000 r funcs -ffffffff82f5b050 r hpd_regs -ffffffff82f5b1a0 r hpd_shift -ffffffff82f5b1b0 r hpd_mask -ffffffff82f5b1c0 r ddc_data_regs -ffffffff82f5b3a0 r ddc_clk_regs -ffffffff82f5b580 r ddc_shift -ffffffff82f5b5a8 r ddc_mask ffffffff82f5c000 r funcs +ffffffff82f5c050 r hpd_regs +ffffffff82f5c1a0 r hpd_shift +ffffffff82f5c1b0 r hpd_mask +ffffffff82f5c1c0 r ddc_data_regs +ffffffff82f5c3a0 r ddc_clk_regs +ffffffff82f5c580 r ddc_shift +ffffffff82f5c5a8 r ddc_mask ffffffff82f5d000 r funcs -ffffffff82f5d050 r hpd_regs -ffffffff82f5d1a0 r hpd_shift -ffffffff82f5d1b0 r hpd_mask -ffffffff82f5d1c0 r ddc_data_regs -ffffffff82f5d3a0 r ddc_clk_regs -ffffffff82f5d580 r ddc_shift -ffffffff82f5d5a8 r ddc_mask -ffffffff82f5d5d0 r generic_regs -ffffffff82f5d640 r generic_shift -ffffffff82f5d650 r generic_mask ffffffff82f5e000 r funcs +ffffffff82f5e050 r hpd_regs +ffffffff82f5e1a0 r hpd_shift +ffffffff82f5e1b0 r hpd_mask +ffffffff82f5e1c0 r ddc_data_regs +ffffffff82f5e3a0 r ddc_clk_regs +ffffffff82f5e580 r ddc_shift +ffffffff82f5e5a8 r ddc_mask +ffffffff82f5e5d0 r generic_regs +ffffffff82f5e640 r generic_shift +ffffffff82f5e650 r generic_mask ffffffff82f5f000 r funcs -ffffffff82f5f050 r hpd_regs -ffffffff82f5f1a0 r hpd_shift -ffffffff82f5f1b0 r hpd_mask -ffffffff82f5f1c0 r ddc_data_regs_dcn -ffffffff82f5f370 r ddc_clk_regs_dcn -ffffffff82f5f520 r ddc_shift -ffffffff82f5f640 r ddc_mask -ffffffff82f5f760 r generic_regs -ffffffff82f5f7d0 r generic_shift -ffffffff82f5f7e0 r generic_mask ffffffff82f60000 r funcs +ffffffff82f60050 r hpd_regs +ffffffff82f601a0 r hpd_shift +ffffffff82f601b0 r hpd_mask +ffffffff82f601c0 r ddc_data_regs_dcn +ffffffff82f60370 r ddc_clk_regs_dcn +ffffffff82f60520 r ddc_shift +ffffffff82f60640 r ddc_mask +ffffffff82f60760 r generic_regs +ffffffff82f607d0 r generic_shift +ffffffff82f607e0 r generic_mask ffffffff82f61000 r funcs -ffffffff82f61050 r hpd_regs -ffffffff82f61168 r hpd_shift -ffffffff82f61178 r hpd_mask -ffffffff82f61190 r ddc_data_regs_dcn -ffffffff82f612c0 r ddc_clk_regs_dcn -ffffffff82f613f0 r ddc_shift -ffffffff82f614e0 r ddc_mask -ffffffff82f615d0 r generic_regs -ffffffff82f61604 r generic_shift -ffffffff82f6160c r generic_mask ffffffff82f62000 r funcs +ffffffff82f62050 r hpd_regs +ffffffff82f62168 r hpd_shift +ffffffff82f62178 r hpd_mask +ffffffff82f62190 r ddc_data_regs_dcn +ffffffff82f622c0 r ddc_clk_regs_dcn +ffffffff82f623f0 r ddc_shift +ffffffff82f624e0 r ddc_mask +ffffffff82f625d0 r generic_regs +ffffffff82f62604 r generic_shift +ffffffff82f6260c r generic_mask ffffffff82f63000 r funcs -ffffffff82f63050 r hpd_regs -ffffffff82f631a0 r hpd_shift -ffffffff82f631b0 r hpd_mask -ffffffff82f631c0 r ddc_data_regs_dcn -ffffffff82f63370 r ddc_clk_regs_dcn -ffffffff82f63520 r ddc_shift -ffffffff82f63640 r ddc_mask -ffffffff82f63760 r generic_regs -ffffffff82f637d0 r generic_shift -ffffffff82f637e0 r generic_mask ffffffff82f64000 r funcs +ffffffff82f64050 r hpd_regs +ffffffff82f641a0 r hpd_shift +ffffffff82f641b0 r hpd_mask +ffffffff82f641c0 r ddc_data_regs_dcn +ffffffff82f64370 r ddc_clk_regs_dcn +ffffffff82f64520 r ddc_shift +ffffffff82f64640 r ddc_mask +ffffffff82f64760 r generic_regs +ffffffff82f647d0 r generic_shift +ffffffff82f647e0 r generic_mask ffffffff82f65000 r funcs -ffffffff82f65050 r hpd_regs -ffffffff82f65168 r hpd_shift -ffffffff82f65178 r hpd_mask -ffffffff82f65190 r ddc_data_regs_dcn -ffffffff82f65300 r ddc_clk_regs_dcn -ffffffff82f65470 r ddc_shift -ffffffff82f65560 r ddc_mask -ffffffff82f65650 r generic_regs -ffffffff82f656c0 r generic_shift -ffffffff82f656d0 r generic_mask ffffffff82f66000 r funcs +ffffffff82f66050 r hpd_regs +ffffffff82f66168 r hpd_shift +ffffffff82f66178 r hpd_mask +ffffffff82f66190 r ddc_data_regs_dcn +ffffffff82f66300 r ddc_clk_regs_dcn +ffffffff82f66470 r ddc_shift +ffffffff82f66560 r ddc_mask +ffffffff82f66650 r generic_regs +ffffffff82f666c0 r generic_shift +ffffffff82f666d0 r generic_mask ffffffff82f67000 r funcs -ffffffff82f67050 r hpd_regs -ffffffff82f67168 r hpd_shift -ffffffff82f67178 r hpd_mask -ffffffff82f67190 r ddc_data_regs_dcn -ffffffff82f67340 r ddc_clk_regs_dcn -ffffffff82f674f0 r ddc_shift -ffffffff82f67610 r ddc_mask -ffffffff82f67730 r generic_regs -ffffffff82f677a0 r generic_shift -ffffffff82f677b0 r generic_mask ffffffff82f68000 r funcs +ffffffff82f68050 r hpd_regs +ffffffff82f68168 r hpd_shift +ffffffff82f68178 r hpd_mask +ffffffff82f68190 r ddc_data_regs_dcn +ffffffff82f68340 r ddc_clk_regs_dcn +ffffffff82f684f0 r ddc_shift +ffffffff82f68610 r ddc_mask +ffffffff82f68730 r generic_regs +ffffffff82f687a0 r generic_shift +ffffffff82f687b0 r generic_mask ffffffff82f69000 r funcs ffffffff82f6a000 r funcs ffffffff82f6b000 r funcs -ffffffff82f6c000 r hdmi_14_protection -ffffffff82f6c010 r dp_11_protection -ffffffff82f6c020 r hdcp_i2c_offsets -ffffffff82f6c050 r hdcp_dpcd_addrs -ffffffff82f6d000 r irq_service_funcs_dce110 -ffffffff82f6d008 r dummy_irq_info_funcs -ffffffff82f6d018 r hpd_irq_info_funcs -ffffffff82f6d028 r hpd_rx_irq_info_funcs -ffffffff82f6d038 r pflip_irq_info_funcs -ffffffff82f6d048 r vupdate_irq_info_funcs -ffffffff82f6d058 r vblank_irq_info_funcs -ffffffff82f6d070 r irq_source_info_dce110 -ffffffff82f6f000 r irq_service_funcs_dce120 -ffffffff82f6f008 r dummy_irq_info_funcs -ffffffff82f6f018 r hpd_irq_info_funcs -ffffffff82f6f028 r hpd_rx_irq_info_funcs -ffffffff82f6f038 r pflip_irq_info_funcs -ffffffff82f6f048 r vupdate_irq_info_funcs -ffffffff82f6f058 r vblank_irq_info_funcs -ffffffff82f6f070 r irq_source_info_dce120 -ffffffff82f71000 r irq_service_funcs_dce80 -ffffffff82f71008 r dummy_irq_info_funcs -ffffffff82f71018 r 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pf_purge_task -ffffffff8343c000 D pf_tags -ffffffff8343c010 D pf_qids -ffffffff8343c020 D pf_lock -ffffffff8343c030 D pf_state_lock -ffffffff8343c040 D pfioctl_rw -ffffffff8343c050 d pf_open_trans.ticket -ffffffff8343d000 D pfi_update -ffffffff8343e000 D pflog_cloner -ffffffff8343f000 D pfsync_cloner -ffffffff83440000 D pflow_cloner -ffffffff83441000 d hotplug_mtx -ffffffff83442000 D pppoe_cloner -ffffffff83442030 D pppoediscinq -ffffffff83442060 D pppoeinq -ffffffff83443000 D dt_lock -ffffffff83444000 D dt_prov_profile -ffffffff83444030 D dt_prov_interval -ffffffff83445000 D dtps_nsysent -ffffffff83445008 D dt_prov_syscall -ffffffff83446000 D dt_prov_static -ffffffff83446030 D dt_static_sched_dequeue -ffffffff834460a0 D dt_static_sched_enqueue -ffffffff83446110 D dt_static_sched_fork -ffffffff83446180 D dt_static_sched_off__cpu -ffffffff834461f0 D dt_static_sched_on__cpu -ffffffff83446260 D dt_static_sched_remain__cpu -ffffffff834462d0 D dt_static_sched_sleep -ffffffff83446340 D dt_static_sched_steal -ffffffff834463b0 D dt_static_sched_unsleep -ffffffff83446420 D dt_static_sched_wakeup -ffffffff83446490 D dt_static_raw_syscalls_sys_enter -ffffffff83446500 D dt_static_raw_syscalls_sys_exit -ffffffff83446570 D dt_static_uvm_fault -ffffffff834465e0 D dt_static_uvm_map_insert -ffffffff83446650 D dt_static_uvm_map_remove -ffffffff834466c0 D dt_static_uvm_malloc -ffffffff83446730 D dt_static_uvm_free -ffffffff834467a0 D dt_static_uvm_pool_get -ffffffff83446810 D dt_static_uvm_pool_put -ffffffff83446880 D dt_static_vfs_bufcache_rel -ffffffff834468f0 D dt_static_vfs_bufcache_take -ffffffff83446960 D dt_static_vfs_cleaner -ffffffff834469d0 D dt_static_vmm_guest_enter -ffffffff83446a40 D dt_static_vmm_guest_exit -ffffffff83446ab0 D dt_static_vmm_inout -ffffffff83446b20 D dt_static_smr_call -ffffffff83446b90 D dt_static_smr_called -ffffffff83446c00 D dt_static_smr_barrier_enter -ffffffff83446c70 D dt_static_smr_barrier_exit -ffffffff83446ce0 D dt_static_smr_wakeup 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deadproc_mutex -ffffffff83460000 D nprocesses -ffffffff83460004 D nthreads -ffffffff83460008 D fork_tfmrate -ffffffff83461000 D kthread_q -ffffffff83462000 D nkmempages -ffffffff83462008 D malloc_mtx -ffffffff83462020 D memname -ffffffff834624b0 D sysctl_kmemlock -ffffffff834624c0 D malloc_errintvl -ffffffff83463000 D maxdmap -ffffffff83463008 D maxsmap -ffffffff83463010 D rlimit_lock -ffffffff83464000 D sched_cost_load -ffffffff83464004 D sched_cost_priority -ffffffff83464008 D sched_cost_runnable -ffffffff8346400c D sched_cost_resident -ffffffff83465000 D intrmap_lock -ffffffff83466000 D nosuidcoredump -ffffffff83466008 D sigio_lock -ffffffff83467000 D smr_lock -ffffffff83467010 D smr_logintvl -ffffffff83468000 D startuphook_list -ffffffff83469000 D sysctl_lock -ffffffff83469010 D sysctl_disklock -ffffffff83469020 d openbsd -ffffffff83469024 d arg_max -ffffffff83469028 d posix_version -ffffffff8346902c d ngroups_max -ffffffff83469030 d int_one -ffffffff83469034 d maxpartitions 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d evcount_percpu_init_list -ffffffff83473000 D syslogf_rwlock -ffffffff83473010 D log_mtx -ffffffff83473020 D logstash_in -ffffffff83473028 D logstash_out -ffffffff83473030 D logstash_rwlock -ffffffff83474000 D pool_head -ffffffff83474010 D pool_lock -ffffffff83474020 D pool_debug -ffffffff83474028 D pool_allocator_single -ffffffff83474040 D pool_allocator_multi -ffffffff83474058 D pool_allocator_multi_ni -ffffffff83474070 D pool_gc_tick -ffffffff834740b8 D pool_gc_task -ffffffff83475000 D kprintf_mutex -ffffffff83475010 D db_panic -ffffffff83475014 D splassert_ctl -ffffffff83475018 D v_putc -ffffffff83475020 D printf_flags -ffffffff83476000 D userconf_base -ffffffff83476004 D userconf_maxdev -ffffffff83476008 D userconf_totdev -ffffffff8347600c D userconf_maxlocnames -ffffffff83476010 D userconf_cnt -ffffffff83476014 D userconf_lines -ffffffff83476018 D userconf_histsz -ffffffff83476020 D userconf_cmds -ffffffff83477000 D ftlock -ffffffff83478000 d ppollcollect.poll_errintvl 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SHAPad2 -ffffffff83499000 D rtmap_gc -ffffffff83499018 D rt_rc -ffffffff8349a000 D rt_labels -ffffffff8349a010 D rtlabel_mtx -ffffffff8349b000 D enc_cloner -ffffffff8349c000 D gre_cloner -ffffffff8349c030 D gre_list -ffffffff8349c040 D mgre_cloner -ffffffff8349c070 D egre_cloner -ffffffff8349c0a0 D nvgre_cloner -ffffffff8349c0d0 D eoip_cloner -ffffffff8349d000 D trunk_cloner -ffffffff8349e000 d aggr_cloner -ffffffff8349f000 d tpmr_cloner -ffffffff834a0000 D mpe_cloner -ffffffff834a1000 D mpw_cloner -ffffffff834a2000 D mpip_cloner -ffffffff834a3000 d bpe_cloner -ffffffff834a3030 d bpe_lock -ffffffff834a4000 D vether_cloner -ffffffff834a5000 D pair_cloner -ffffffff834a6000 d vxlan_cloner -ffffffff834a6030 d vxlan_lock -ffffffff834a6040 d vxlan_teps -ffffffff834a7000 D underload_interval -ffffffff834a7010 D wg_cloner -ffffffff834a8000 d stoeplitz_keyseed -ffffffff834a9000 D ieee80211_cache_size -ffffffff834aa000 D arpt_prune -ffffffff834aa004 D arpt_keep -ffffffff834aa008 D arpt_down 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tcp_rst_ppslim -ffffffff834b200c D tcp_ackdrop_ppslim -ffffffff834b2010 D tcp_syn_hash_size -ffffffff834b2014 D tcp_syn_cache_limit -ffffffff834b2018 D tcp_syn_bucket_limit -ffffffff834b201c D tcp_syn_use_limit -ffffffff834b2020 D syn_cache_mtx -ffffffff834b3000 D tcp_outflags -ffffffff834b4000 D tcp_timer_mtx -ffffffff834b4010 D tcp_mssdflt -ffffffff834b4014 D tcp_rttdflt -ffffffff834b4018 D tcp_do_rfc1323 -ffffffff834b401c D tcp_do_sack -ffffffff834b4020 D tcp_do_rfc3390 -ffffffff834b4024 D tcp_do_tso -ffffffff834b4028 D tcp_reass_limit -ffffffff834b402c D tcp_sackhole_limit -ffffffff834b5000 D tcp_backoff -ffffffff834b5034 D tcp_totbackoff -ffffffff834b6000 D tcp_sendspace -ffffffff834b6004 D tcp_recvspace -ffffffff834b6008 D tcp_autorcvbuf_inc -ffffffff834b7000 D udpcksum -ffffffff834b7004 D udp_sendspace -ffffffff834b7008 D udp_recvspace -ffffffff834b8000 D ipsec_flows_mtx -ffffffff834b8010 D ipsec_ids_idle -ffffffff834b8014 D ipsec_ids_next_flow -ffffffff834b8018 D ipsec_policy_head -ffffffff834b8028 D ipsp_ids_gc_timeout -ffffffff834b8070 D tdb_sadb_mtx -ffffffff834b8080 d tdb_hashmask -ffffffff834b9000 D ipo_tdb_mtx -ffffffff834b9010 D ipsec_acquire_mtx -ffffffff834b9020 D ipsec_acquire_head -ffffffff834ba000 D ipsec_keep_invalid -ffffffff834ba004 D ipsec_require_pfs -ffffffff834ba008 D ipsec_soft_timeout -ffffffff834ba00c D ipsec_exp_timeout -ffffffff834ba010 D ipsec_soft_first_use -ffffffff834ba014 D ipsec_exp_first_use -ffffffff834ba018 D ipsec_expire_acquire -ffffffff834ba01c D esp_enable -ffffffff834ba020 D ah_enable -ffffffff834bb000 D udpencap_enable -ffffffff834bb004 D udpencap_port -ffffffff834bc000 D carp_vh_rc -ffffffff834bc020 D carp_sc_rc -ffffffff834bc040 D carp_opts -ffffffff834bc058 D carp_cloner -ffffffff834bc088 d carp_send_na.mcast -ffffffff834bd000 d PADDING +ffffffff82faf140 r use_bclk_tbl +ffffffff82faf2e0 r turn_off_plls_tbl +ffffffff82faf370 r clk_req_b_tbl +ffffffff82faf490 r enter_baco_tbl +ffffffff82faf5b0 r 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SMU7ThermalWithDelayPolicy +ffffffff82fd2340 r link_width +ffffffff82fd3000 R vega12_pptable_funcs +ffffffff82fd4000 r clean_baco_tbl +ffffffff82fd5000 r vega20_hwmgr_funcs +ffffffff82fd52f0 r SMU7ThermalWithDelayPolicy +ffffffff82fd5340 r link_width +ffffffff82fd6000 R vega20_pptable_funcs +ffffffff82fd7000 R ci_smu_funcs +ffffffff82fd70e0 r defaults_hawaii_pro +ffffffff82fd712c r defaults_hawaii_xt +ffffffff82fd7178 r defaults_saturn_xt +ffffffff82fd71c4 r defaults_bonaire_xt +ffffffff82fd7210 r ci_program_jump_on_start.data +ffffffff82fd8000 R fiji_smu_funcs +ffffffff82fd80e0 r avfs_graphics_level +ffffffff82fd8240 r fiji_power_tune_data_set_array +ffffffff82fd8246 r fiji_clock_stretch_amount_conversion +ffffffff82fd8260 r fiji_clock_stretcher_ddt_table +ffffffff82fd9000 R iceland_smu_funcs +ffffffff82fd90e0 r defaults_icelandxt +ffffffff82fd912c r defaults_icelandpro +ffffffff82fd9178 r defaults_iceland +ffffffff82fda000 R polaris10_smu_funcs +ffffffff82fda0e0 r avfs_graphics_level_polaris10 +ffffffff82fda2a0 r avfs_memory_level_polaris10 +ffffffff82fda2c0 r polaris10_power_tune_data_set_array +ffffffff82fda310 r Range_Table +ffffffff82fdb000 R smu10_smu_funcs +ffffffff82fdc000 r smu7_program_jump_on_start.data +ffffffff82fdc010 r pwr_virus_table_pre +ffffffff82fdc680 r pwr_virus_table_post +ffffffff82fdcf80 r pwr_virus_section1 +ffffffff82fdd610 r pwr_virus_section2 +ffffffff82fdd660 r pwr_virus_section3 +ffffffff82fe4ab0 r pwr_virus_section4 +ffffffff82fe4e80 r pwr_virus_section5 +ffffffff82fe5490 r pwr_virus_section6 +ffffffff82fe7000 R smu8_smu_funcs +ffffffff82fe8000 R tonga_smu_funcs +ffffffff82fe80e0 r tonga_power_tune_data_set_array +ffffffff82fe812c r tonga_clock_stretch_amount_conversion +ffffffff82fe8140 r tonga_clock_stretcher_ddt_table +ffffffff82fe9000 R vega10_smu_funcs +ffffffff82fea000 R vega12_smu_funcs +ffffffff82feb000 R vega20_smu_funcs +ffffffff82fec000 R vegam_smu_funcs +ffffffff82fec0e0 r vegam_power_tune_data_set_array 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sienna_cichlid_ppt_funcs +ffffffff82ff43f0 r smu11_thermal_policy +ffffffff82ff4448 r sienna_cichlid_i2c_algo +ffffffff82ff4458 r sienna_cichlid_i2c_control_quirks +ffffffff82ff4470 r sienna_cichlid_throttler_map +ffffffff82ff5000 r smu_v11_0_irq_funcs +ffffffff82ff5010 r link_width +ffffffff82ff6000 r vangogh_ppt_funcs +ffffffff82ff63e8 r vangogh_throttler_map +ffffffff82ff7000 r renoir_ppt_funcs +ffffffff82ff73e8 r renoir_throttler_map +ffffffff82ff8000 r aldebaran_ppt_funcs +ffffffff82ff83f0 r aldebaran_clk_map +ffffffff82ff84b0 r aldebaran_table_map +ffffffff82ff8530 r smu13_thermal_policy +ffffffff82ff8588 r aldebaran_i2c_algo +ffffffff82ff8598 r aldebaran_i2c_control_quirks +ffffffff82ff85b0 r aldebaran_throttler_map +ffffffff82ff85d0 r aldebaran_message_map +ffffffff82ff9050 r aldebaran_feature_mask_map +ffffffff82ffa000 R pmfw_decoded_link_speed +ffffffff82ffa020 R pmfw_decoded_link_width +ffffffff82ffa040 r smu_v13_0_irq_funcs +ffffffff82ffb000 r smu_v13_0_0_ppt_funcs +ffffffff82ffb3f0 r smu13_thermal_policy +ffffffff82ffb448 r smu_v13_0_0_i2c_algo +ffffffff82ffb458 r smu_v13_0_0_i2c_control_quirks +ffffffff82ffb470 r smu_v13_0_0_throttler_map +ffffffff82ffc000 r smu_v13_0_4_ppt_funcs +ffffffff82ffd000 r smu_v13_0_5_ppt_funcs +ffffffff82ffe000 r smu_v13_0_6_ppt_funcs +ffffffff82ffe3f0 r smu_v13_0_6_message_map +ffffffff82ffee70 r smu_v13_0_6_clk_map +ffffffff82ffef30 r smu_v13_0_6_table_map +ffffffff82ffefb0 r smu_v13_0_6_i2c_algo +ffffffff82ffefc0 r smu_v13_0_6_i2c_control_quirks +ffffffff82ffefd0 r smu_v13_0_6_irq_funcs +ffffffff82ffefe0 r smu_v13_0_6_throttler_map +ffffffff82ffeff0 r smu_v13_0_6_feature_mask_map +ffffffff83000000 r smu_v13_0_7_ppt_funcs +ffffffff830003f0 r smu13_thermal_policy +ffffffff83000450 r smu_v13_0_7_throttler_map +ffffffff83001000 r yellow_carp_ppt_funcs +ffffffff83002000 R link_speed +ffffffff83002020 r __smu_message_names +ffffffff83003000 R pchb_ca +ffffffff83004000 R amas_ca +ffffffff83004028 R amas_devices +ffffffff83004040 r amas_feature +ffffffff83005000 R cardslot_ca +ffffffff83006000 R cardbus_ca +ffffffff83007000 R com_cardbus_ca +ffffffff83008000 R xl_cardbus_ca +ffffffff83008030 R xl_cardbus_products +ffffffff83009000 R dc_cardbus_ca +ffffffff83009030 R dc_cardbus_devices +ffffffff8300a000 R fxp_cardbus_ca +ffffffff8300a028 R fxp_cardbus_devices +ffffffff8300b000 R rl_cardbus_devices +ffffffff8300b028 R rl_cardbus_ca +ffffffff8300c000 R re_cardbus_ca +ffffffff8300c028 R re_cardbus_devices +ffffffff8300d000 R ath_cardbus_ca +ffffffff8300e000 R athn_cardbus_ca +ffffffff8300e030 r athn_cardbus_devices +ffffffff8300f000 R atw_cardbus_ca +ffffffff8300f028 R atw_cardbus_devices +ffffffff83010000 R rtw_cardbus_ca +ffffffff83010028 R rtw_cardbus_devices +ffffffff83011000 R ral_cardbus_ca +ffffffff83011030 r ral_cardbus_devices +ffffffff83012000 R acx_cardbus_ca +ffffffff83012028 r acx_cardbus_devices +ffffffff83013000 R pgt_cardbus_ca +ffffffff83013028 R pgt_cardbus_devices +ffffffff83014000 R ehci_cardbus_ca +ffffffff83015000 R ohci_cardbus_ca +ffffffff83016000 R uhci_cardbus_ca +ffffffff83017000 R malo_cardbus_ca +ffffffff83017028 r malo_cardbus_devices +ffffffff83018000 R bwi_cardbus_ca +ffffffff83018030 r bwi_cardbus_devices +ffffffff83019000 R pcmcia_ca +ffffffff8301a000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff8301b000 r pcmcia_cis_quirks +ffffffff8301c000 R ep_pcmcia_ca +ffffffff8301d000 R ne_pcmcia_ca +ffffffff8301d030 R ne2000devs +ffffffff8301f000 R aic_pcmcia_ca +ffffffff83020000 R com_pcmcia_ca +ffffffff83021000 R wdc_pcmcia_ca +ffffffff83022000 R sm_pcmcia_ca +ffffffff83023000 R xe_pcmcia_ca +ffffffff83024000 R wi_pcmcia_ca +ffffffff83024030 r wi_pcmcia_products +ffffffff83025000 R malo_pcmcia_ca +ffffffff83026000 R an_pcmcia_ca +ffffffff83027000 R pcib_ca +ffffffff83028000 R amdpcib_ca +ffffffff83028028 R amdpcib_devices +ffffffff83029000 R tcpcib_ca +ffffffff83029028 R tcpcib_devices +ffffffff8302a000 R aapic_ca +ffffffff8302b000 R hme_pci_ca +ffffffff8302b028 r hme_promhdr +ffffffff8302b02a r hme_promdat +ffffffff8302c000 R isa_ca +ffffffff8302d000 R isadma_ca +ffffffff8302e000 R fdc_ca +ffffffff8302f000 R fd_ca +ffffffff83030000 R com_isa_ca +ffffffff83031000 R pckbc_isa_ca +ffffffff83032000 R vga_isa_ca +ffffffff83033000 R wdc_isa_ca +ffffffff83034000 R mpu_midi_hw_if +ffffffff83035000 R mpu_isa_ca +ffffffff83036000 R pcppi_ca +ffffffff83037000 R spkr_ca +ffffffff83037030 r pitchtab +ffffffff83038000 R lpt_isa_ca +ffffffff83039000 R wbsio_ca +ffffffff8303a000 R schsio_ca +ffffffff8303b000 R lm_isa_ca +ffffffff8303b028 R lm_wbsio_ca +ffffffff8303c000 R it_sensors +ffffffff8303c110 R it_vrfact +ffffffff8303c140 R it_fan_regs +ffffffff8303c160 R it_fan_ext_regs +ffffffff8303c178 R it_ca +ffffffff8303d000 R abitkv_sensors +ffffffff8303d200 R abitaa_sensors +ffffffff8303d480 R abitav_sensors +ffffffff8303d700 R abitas_sensors +ffffffff8303d980 R abitax_sensors +ffffffff8303dbc0 R abitm4_sensors +ffffffff8303de80 R abitan_sensors +ffffffff8303e120 R abital_sensors +ffffffff8303e3a0 R abitaw_sensors +ffffffff8303e700 R abitni_sensors +ffffffff8303e9a0 R abitat_sensors +ffffffff8303ecc0 R abitan2_sensors +ffffffff8303ef60 R abitab_sensors +ffffffff8303f220 R abitan3_sensors +ffffffff8303f500 R abitaw2_sensors +ffffffff8303f860 R abitat2_sensors +ffffffff8303fb60 R abitab2_sensors +ffffffff8303fea0 R abitin_sensors +ffffffff830401e0 R uguru_ca +ffffffff83041000 R aps_ca +ffffffff83042000 R wsdisplay_emul_ca +ffffffff83042030 r charClass +ffffffff83043000 r usl_syncops +ffffffff83044000 R wsevent_filtops +ffffffff83045000 R wskbd_ca +ffffffff83046000 r latin1_to_upper +ffffffff83047000 R wsmouse_ca +ffffffff83048000 R cyrillic_to_koi8 +ffffffff83048060 R unicode_to_latin2 +ffffffff830480e0 R unicode_to_latin7 +ffffffff83049000 R wsemul_vt100_ops +ffffffff8304a000 r decspcgr2uni +ffffffff8304a100 r dectech2uni +ffffffff8304a200 r nrctable +ffffffff8304b000 r vt100_fkeys +ffffffff8304b0c0 r vt100_pfkeys +ffffffff8304b0e0 r vt100_numpad +ffffffff8304c000 R pckbd_ca +ffffffff8304c028 R pckbd_accessops +ffffffff8304c040 R pckbd_consops +ffffffff8304c060 R pckbd_keymapdata +ffffffff8304c070 R pckbd_xtbl2 +ffffffff8304c100 R pckbd_xtbl2_ext +ffffffff8304d000 r pckbd_keydesc_us +ffffffff8304d250 r pckbd_keydesc_de +ffffffff8304d2f0 r pckbd_keydesc_de_nodead +ffffffff8304d310 r pckbd_keydesc_fr +ffffffff8304d3d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff8304d510 r pckbd_keydesc_dk +ffffffff8304d5a0 r pckbd_keydesc_dk_nodead +ffffffff8304d5b0 r pckbd_keydesc_it +ffffffff8304d640 r pckbd_keydesc_uk +ffffffff8304d6e0 r pckbd_keydesc_jp +ffffffff8304d750 r pckbd_keydesc_sv +ffffffff8304d780 r pckbd_keydesc_sv_nodead +ffffffff8304d790 r pckbd_keydesc_no +ffffffff8304d7c0 r pckbd_keydesc_no_nodead +ffffffff8304d7d0 r pckbd_keydesc_us_declk +ffffffff8304d860 r pckbd_keydesc_us_dvorak +ffffffff8304d900 r pckbd_keydesc_us_colemak +ffffffff8304d948 r pckbd_keydesc_swapctrlcaps +ffffffff8304d960 r pckbd_keydesc_iopener +ffffffff8304d9b0 r pckbd_keydesc_es +ffffffff8304da50 r pckbd_keydesc_be +ffffffff8304db10 r pckbd_keydesc_ru +ffffffff8304dc80 r pckbd_keydesc_ua +ffffffff8304de10 r pckbd_keydesc_sg +ffffffff8304dec0 r pckbd_keydesc_sg_nodead +ffffffff8304dee0 r pckbd_keydesc_sf +ffffffff8304df00 r pckbd_keydesc_pt +ffffffff8304df90 r pckbd_keydesc_lt +ffffffff8304e070 r pckbd_keydesc_la +ffffffff8304e100 r pckbd_keydesc_br +ffffffff8304e180 r pckbd_keydesc_tr +ffffffff8304e230 r pckbd_keydesc_tr_nodead +ffffffff8304e250 r pckbd_keydesc_pl +ffffffff8304e2b0 r pckbd_keydesc_hu +ffffffff8304e3c0 r pckbd_keydesc_si +ffffffff8304e4d0 r pckbd_keydesc_cf +ffffffff8304e5a0 r pckbd_keydesc_cf_nodead +ffffffff8304e5c0 r pckbd_keydesc_lv +ffffffff8304e640 r pckbd_keydesc_nl +ffffffff8304e720 r pckbd_keydesc_nl_nodead +ffffffff8304e740 r pckbd_keydesc_is +ffffffff8304e7cc r pckbd_keydesc_is_nodead +ffffffff8304e7e0 r pckbd_keydesc_ee +ffffffff8304e890 r pckbd_keydesc_ee_nodead +ffffffff8304e8b0 R pckbd_keydesctab +ffffffff8304f000 R pms_ca +ffffffff8304f028 R pms_accessops +ffffffff8304f040 R pms_sec_accessops +ffffffff8304f060 R pms_protocols +ffffffff8304f1e0 r alps_models +ffffffff83050000 R skgpio_led_offset +ffffffff83050008 R skgpio_ca +ffffffff83051000 R hidkbd_trtab +ffffffff83051100 r apple_fn_trans +ffffffff83051120 r apple_tb_trans +ffffffff83051140 r apple_mba_trans +ffffffff83052000 r hidcc_attach_wskbd.accessops +ffffffff83052020 r hidcc_keysyms +ffffffff83053000 R usb_ca +ffffffff83054000 R usb_known_products +ffffffff8305ffe0 R usb_known_vendors +ffffffff83062800 R usbd_error_strs +ffffffff83063000 R usb_quirks +ffffffff83063390 R usb_dev_quirks +ffffffff83063398 R usbd_no_quirk +ffffffff83064000 R uhub_ca +ffffffff83064028 R uhub_uhub_ca +ffffffff83065000 R uaudio_ca +ffffffff83065028 R uaudio_hw_if +ffffffff830650e0 R uaudio_rates +ffffffff83065120 r uaudio_clkname.names +ffffffff83065140 r uaudio_feature_addent.features +ffffffff83066000 R uvideo_ca +ffffffff83066028 R uvideo_hw_if +ffffffff83066100 R uvideo_devs +ffffffff83067000 r utvfu_select_norm.pal +ffffffff83067040 r utvfu_select_norm.ntsc +ffffffff83067080 r utvfu_setup_capture.setup +ffffffff83067180 r utvfu_audio_start_chip.setup +ffffffff830671c8 r utvfu_audio_stop_chip.setup +ffffffff830671d8 R utvfu_ca +ffffffff83067200 R utvfu_vid_hw_if +ffffffff830672d0 R utvfu_au_hw_if +ffffffff83068000 R udl_ca +ffffffff83068030 r udl_devs +ffffffff830680b0 r udl_modes +ffffffff83069000 R umidi_hw_if +ffffffff83069030 R umidi_ca +ffffffff83069060 r umidi_evlen +ffffffff83069080 r packet_length +ffffffff8306a000 r quirk_name +ffffffff8306b000 R ucom_ca +ffffffff8306c000 R ugen_ca +ffffffff8306c028 R ugenread_intr_filtops +ffffffff8306c058 R ugenread_isoc_filtops +ffffffff8306d000 R uhidev_ca +ffffffff8306d030 r uhid_graphire_report_descr +ffffffff8306d0b0 r uhid_graphire3_4x5_report_descr +ffffffff8306d160 r uhid_xb360gp_report_descr +ffffffff8306d210 r uhid_xbonegp_report_descr +ffffffff8306e000 R uhid_ca +ffffffff8306e028 R uhidread_filtops +ffffffff8306f000 R fido_ca +ffffffff83070000 R ujoy_ca +ffffffff83071000 r ukbd_keydesc_us +ffffffff830712a0 r ukbd_keydesc_de +ffffffff83071350 r ukbd_keydesc_de_nodead +ffffffff83071370 r ukbd_keydesc_fr +ffffffff83071430 r ukbd_keydesc_fr_apple +ffffffff83071570 r ukbd_keydesc_fr_dvorak_bepo +ffffffff830716b0 r ukbd_keydesc_dk +ffffffff83071750 r ukbd_keydesc_dk_nodead +ffffffff83071760 r ukbd_keydesc_it +ffffffff83071800 r ukbd_keydesc_uk +ffffffff830718b0 r ukbd_keydesc_jp +ffffffff83071920 r ukbd_keydesc_sv +ffffffff83071950 r ukbd_keydesc_sv_nodead +ffffffff83071960 r ukbd_keydesc_no +ffffffff83071990 r ukbd_keydesc_no_nodead +ffffffff830719a0 r ukbd_keydesc_us_dvorak +ffffffff83071a40 r ukbd_keydesc_us_colemak +ffffffff83071a88 r ukbd_keydesc_swapctrlcaps +ffffffff83071aa0 r ukbd_keydesc_iopener +ffffffff83071af0 r ukbd_keydesc_es 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smsc_ca +ffffffff8308e030 r smsc_devs +ffffffff8308f000 R cue_ca +ffffffff83090000 R kue_devs +ffffffff83090088 R kue_ca +ffffffff83091000 R cdce_devs +ffffffff83091048 R cdce_ca +ffffffff83092000 R urndis_ca +ffffffff83092030 R urndis_class +ffffffff83093000 R mos_devs +ffffffff83093018 R mos_ca +ffffffff83094000 R mue_devs +ffffffff83094020 R mue_ca +ffffffff83095000 R udav_ca +ffffffff83095030 r udav_devs +ffffffff83096000 R upl_ca +ffffffff83097000 R ugl_ca +ffffffff83098000 R url_ca +ffffffff83098030 r url_devs +ffffffff83099000 R ure_devs +ffffffff830990e8 R ure_ca +ffffffff8309a000 R uaq_devs +ffffffff8309a018 R uaq_ca +ffffffff8309b000 R umodem_methods +ffffffff8309b040 R umodem_ca +ffffffff8309c000 R uftdi_methods +ffffffff8309c040 R uftdi_ca +ffffffff8309c070 r uftdi_devs +ffffffff8309d000 R uplcom_methods +ffffffff8309d040 R uplcom_ca +ffffffff8309d070 r uplcom_devs +ffffffff8309e000 R umct_methods +ffffffff8309e040 R umct_ca +ffffffff8309e070 r umct_devs +ffffffff8309f000 R uvscom_methods +ffffffff8309f040 R uvscom_ca +ffffffff8309f070 r uvscom_devs +ffffffff830a0000 R ubsa_methods +ffffffff830a0040 R ubsa_devs +ffffffff830a0060 R ubsa_ca +ffffffff830a1000 R ukspan_ca +ffffffff830a1028 r ukspan_devs +ffffffff830a1030 r ukspan_methods +ffffffff830a2000 R uslcom_methods +ffffffff830a2040 R uslcom_ca +ffffffff830a2070 r uslcom_devs +ffffffff830a3000 R uark_methods +ffffffff830a3040 R uark_ca +ffffffff830a3068 r uark_devs +ffffffff830a4000 R moscom_methods +ffffffff830a4040 R moscom_ca +ffffffff830a4068 r moscom_devs +ffffffff830a5000 R umcs_methods +ffffffff830a5040 R umcs_devs +ffffffff830a5050 R umcs_ca +ffffffff830a6000 R uscom_methods +ffffffff830a6040 R uscom_ca +ffffffff830a6068 r uscom_devs +ffffffff830a7000 R ucrcom_methods +ffffffff830a7040 R ucrcom_ca +ffffffff830a8000 R uxrcom_methods +ffffffff830a8040 R uxrcom_ca +ffffffff830a8068 r uxrcom_devs +ffffffff830a9000 R uipaq_methods +ffffffff830a9040 R uipaq_ca +ffffffff830a9070 r uipaq_devs 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+ffffffff83447260 D dt_static_sched_remain__cpu +ffffffff834472d0 D dt_static_sched_sleep +ffffffff83447340 D dt_static_sched_steal +ffffffff834473b0 D dt_static_sched_unsleep +ffffffff83447420 D dt_static_sched_wakeup +ffffffff83447490 D dt_static_raw_syscalls_sys_enter +ffffffff83447500 D dt_static_raw_syscalls_sys_exit +ffffffff83447570 D dt_static_uvm_fault +ffffffff834475e0 D dt_static_uvm_map_insert +ffffffff83447650 D dt_static_uvm_map_remove +ffffffff834476c0 D dt_static_uvm_malloc +ffffffff83447730 D dt_static_uvm_free +ffffffff834477a0 D dt_static_uvm_pool_get +ffffffff83447810 D dt_static_uvm_pool_put +ffffffff83447880 D dt_static_vfs_bufcache_rel +ffffffff834478f0 D dt_static_vfs_bufcache_take +ffffffff83447960 D dt_static_vfs_cleaner +ffffffff834479d0 D dt_static_vmm_guest_enter +ffffffff83447a40 D dt_static_vmm_guest_exit +ffffffff83447ab0 D dt_static_vmm_inout +ffffffff83447b20 D dt_static_smr_call +ffffffff83447b90 D dt_static_smr_called +ffffffff83447c00 D dt_static_smr_barrier_enter +ffffffff83447c70 D dt_static_smr_barrier_exit +ffffffff83447ce0 D dt_static_smr_wakeup +ffffffff83447d50 D dt_static_smr_thread +ffffffff83447dc0 D dt_static_refcnt_none +ffffffff83447e30 D dt_static_refcnt_ethmulti +ffffffff83447ea0 D dt_static_refcnt_ifaddr +ffffffff83447f10 D dt_static_refcnt_ifmaddr +ffffffff83447f80 D dt_static_refcnt_inpcb +ffffffff83447ff0 D dt_static_refcnt_rtentry +ffffffff83448060 D dt_static_refcnt_syncache +ffffffff834480d0 D dt_static_refcnt_tdb +ffffffff83449000 D db_next_free_breakpoint +ffffffff83449008 D db_breakpoints_inserted +ffffffff8344a000 D db_ed_style +ffffffff8344b000 D db_examine_format +ffffffff8344b078 D db_print_format +ffffffff8344c000 D db_history_size +ffffffff8344c008 D db_history_curr +ffffffff8344c010 D db_history_last +ffffffff8344d000 D db_tab_stop_width +ffffffff8344d004 D db_max_line +ffffffff8344d008 D db_max_width +ffffffff8344d00c D db_radix +ffffffff8344e000 D db_lastsym +ffffffff8344e008 D db_maxoff +ffffffff8344f000 D db_vars +ffffffff8344f090 D db_evars +ffffffff83450000 D db_watchpoints_inserted +ffffffff83450008 D db_next_free_watchpoint +ffffffff83451000 D db_log +ffffffff83452000 D audio_cd +ffffffff83452020 D audio_lock +ffffffff83453000 D midi_cd +ffffffff83454000 D rnd_cold +ffffffff83454004 D rnd_slowextract +ffffffff83454008 D rnd_timeout +ffffffff83454050 D rndlock +ffffffff83454060 D rndreinit_timeout +ffffffff834540a8 D rnd_task +ffffffff83455000 D video_cd +ffffffff83456000 d rrip_table_analyze +ffffffff834560e0 d rrip_table_getname +ffffffff834561e0 d rrip_table_getsymname +ffffffff83456280 d rrip_table_extref +ffffffff83457000 D nexecs +ffffffff83458000 D elf_note_names +ffffffff83459000 D ncpus +ffffffff83459004 D ncpusfound +ffffffff8345a000 D acct_lock +ffffffff8345a010 D acctsuspend +ffffffff8345a014 D acctresume +ffffffff8345a018 D acctrate +ffffffff8345b000 D bufqs_mtx +ffffffff8345c000 D ticks +ffffffff8345d000 D fhdlk +ffffffff8345e000 D kqueue_klist_lock +ffffffff8345e010 D kq_timeoutmax +ffffffff8345f000 D stackgap_random +ffffffff83460000 D deadproc_mutex +ffffffff83461000 D nprocesses +ffffffff83461004 D nthreads +ffffffff83461008 D fork_tfmrate +ffffffff83462000 D kthread_q +ffffffff83463000 D nkmempages +ffffffff83463008 D malloc_mtx +ffffffff83463020 D memname +ffffffff834634b0 D sysctl_kmemlock +ffffffff834634c0 D malloc_errintvl +ffffffff83464000 D maxdmap +ffffffff83464008 D maxsmap +ffffffff83464010 D rlimit_lock +ffffffff83465000 D sched_cost_load +ffffffff83465004 D sched_cost_priority +ffffffff83465008 D sched_cost_runnable +ffffffff8346500c D sched_cost_resident +ffffffff83466000 D intrmap_lock +ffffffff83467000 D nosuidcoredump +ffffffff83467008 D sigio_lock +ffffffff83468000 D smr_lock +ffffffff83468010 D smr_logintvl +ffffffff83469000 D startuphook_list +ffffffff8346a000 D sysctl_lock +ffffffff8346a010 D sysctl_disklock +ffffffff8346a020 d openbsd +ffffffff8346a024 d arg_max +ffffffff8346a028 d posix_version +ffffffff8346a02c d ngroups_max +ffffffff8346a030 d int_one +ffffffff8346a034 d maxpartitions +ffffffff8346a038 d raw_part +ffffffff8346a03c D allowpowerdown +ffffffff8346a040 D hw_power +ffffffff8346a044 d byte_order +ffffffff8346b000 d thrsleep_queue +ffffffff8346b010 d thrsleep_lock +ffffffff8346c000 D tc_lock +ffffffff8346c010 D windup_mtx +ffffffff8346c020 d dummy_timecounter +ffffffff8346c070 D timecounter +ffffffff8346c078 d timehands +ffffffff8346c080 d th0 +ffffffff8346c118 d th1 +ffffffff8346d000 D itimer_mtx +ffffffff8346d010 D ratecheck_mtx +ffffffff8346d020 D ppsratecheck_mtx +ffffffff8346d030 D resettodr_to +ffffffff8346d078 D resettodr_task +ffffffff8346e000 D timeout_mutex +ffffffff8346f000 D wdog_auto +ffffffff83470000 D taskq_sys +ffffffff83470050 D taskq_sys_mp +ffffffff83471000 d update_loadavg.to +ffffffff83471048 D ccpu +ffffffff83471050 d schedcpu.to +ffffffff83471098 D perflevel +ffffffff8347109c D perfpolicy +ffffffff834710a0 D setperf_to +ffffffff83472000 D autoconf_attdet_mtx +ffffffff83472010 D msgs +ffffffff83473000 d evcount_list +ffffffff83473010 d evcount_percpu_init_list +ffffffff83474000 D syslogf_rwlock +ffffffff83474010 D log_mtx +ffffffff83474020 D logstash_in +ffffffff83474028 D logstash_out +ffffffff83474030 D logstash_rwlock +ffffffff83475000 D pool_head +ffffffff83475010 D pool_lock +ffffffff83475020 D pool_debug +ffffffff83475028 D pool_allocator_single +ffffffff83475040 D pool_allocator_multi +ffffffff83475058 D pool_allocator_multi_ni +ffffffff83475070 D pool_gc_tick +ffffffff834750b8 D pool_gc_task +ffffffff83476000 D kprintf_mutex +ffffffff83476010 D db_panic +ffffffff83476014 D splassert_ctl +ffffffff83476018 D v_putc +ffffffff83476020 D printf_flags +ffffffff83477000 D userconf_base +ffffffff83477004 D userconf_maxdev +ffffffff83477008 D userconf_totdev +ffffffff8347700c D userconf_maxlocnames +ffffffff83477010 D userconf_cnt +ffffffff83477014 D userconf_lines +ffffffff83477018 D userconf_histsz +ffffffff83477020 D userconf_cmds +ffffffff83478000 D ftlock +ffffffff83479000 d ppollcollect.poll_errintvl +ffffffff8347a000 D ttydefchars +ffffffff8347a014 D ttclos +ffffffff8347a01b D ttopen +ffffffff8347a022 D ttybg +ffffffff8347a028 D ttyin +ffffffff8347a02e D ttyout +ffffffff8347a038 D ttylist_lock +ffffffff8347b000 D linesw +ffffffff8347b280 D nlinesw +ffffffff8347c000 D pt_softc_lock +ffffffff8347d000 d mbstat_boot_boot_cpumem +ffffffff8347d080 D mbstat +ffffffff8347d090 D mclsizes +ffffffff8347d0b0 D m_extref_mtx +ffffffff8347d0c0 D m_pool_allocator +ffffffff8347e000 D somaxconn +ffffffff8347e004 D sominconn +ffffffff8347e008 D sosplice_lock +ffffffff8347f000 D sb_max +ffffffff83480000 D unp_df_lock +ffffffff83480010 D unp_gc_lock +ffffffff83480020 D unp_rights_mtx +ffffffff83480030 D unp_ino_mtx +ffffffff83480040 D unp_gc_task +ffffffff83480070 D unpst_sendspace +ffffffff83480074 D unpst_recvspace +ffffffff83480078 D unpsq_sendspace +ffffffff8348007c D unpsq_recvspace +ffffffff83480080 D unpdg_sendspace +ffffffff83480084 D unpdg_recvspace +ffffffff83481000 D doingcache +ffffffff83482000 D maxvfsconf +ffffffff83482010 d vfsconflist +ffffffff83483000 D lockf_lock +ffffffff83483010 D maxlocksperuid +ffffffff83484000 D iftovt_tab +ffffffff83484040 D vttoif_tab +ffffffff83484064 D suid_clear +ffffffff83484068 D vnode_mtx +ffffffff83484078 D vfs_stall_lock +ffffffff83484090 D vtypes +ffffffff834840e0 D vtags +ffffffff83485000 D syncer_maxdelay +ffffffff83485004 D syncdelay +ffffffff83486000 D dosdirtemplate +ffffffff83487000 D ntfs_hashlock +ffffffff83488000 D ntfs_toupper_lock +ffffffff83489000 D art_table_gc_mtx +ffffffff83489010 D art_table_gc_task +ffffffff83489040 D art_node_gc_mtx +ffffffff83489050 D art_node_gc_task +ffffffff8348a000 D bpf_bufsize +ffffffff8348a004 D bpf_maxbufsize +ffffffff8348a008 D bpf_sysctl_lk +ffffffff8348b000 D ifg_head +ffffffff8348b010 D if_cloners_lock +ffffffff8348b020 D if_hooks_mtx +ffffffff8348b030 D if_input_task_locked +ffffffff8348b060 D netlock +ffffffff8348b070 D ifnetlist +ffffffff8348c000 D ifiq_maxlen_drop +ffffffff8348c004 D ifiq_maxlen_return +ffffffff8348d000 D etherbroadcastaddr +ffffffff8348d006 D ether_ipmulticast_min +ffffffff8348d00c D ether_ipmulticast_max +ffffffff8348d012 D ether_ip6multicast_min +ffffffff8348d018 D ether_ip6multicast_max +ffffffff8348e000 D etherip_cloner +ffffffff8348e030 D etherip_list +ffffffff8348f000 D loop_cloner +ffffffff83490000 D ifmedia_mtx +ffffffff83491000 D ppp_compressors +ffffffff83491020 D ppp_cloner +ffffffff83492000 D ppp_pkt_init +ffffffff83493000 D ppp_bsd_compress +ffffffff83494000 D ppp_deflate +ffffffff83494070 D ppp_deflate_draft +ffffffff83495000 D tun_cloner +ffffffff83495030 D tap_cloner +ffffffff83496000 D bridgeintrq +ffffffff83496038 D bridge_cloner +ffffffff83497000 d veb_cloner +ffffffff83497030 d vport_cloner +ffffffff83498000 D vlan_tagh_lk +ffffffff83498010 D vlan_cloner +ffffffff83498040 D svlan_cloner +ffffffff83499000 D pipex_list_mtx +ffffffff83499010 D pipex_prune +ffffffff83499018 D pipexoutq +ffffffff83499050 d SHAPad2 +ffffffff8349a000 D rtmap_gc +ffffffff8349a018 D rt_rc +ffffffff8349b000 D rt_labels +ffffffff8349b010 D rtlabel_mtx +ffffffff8349c000 D enc_cloner +ffffffff8349d000 D gre_cloner +ffffffff8349d030 D gre_list +ffffffff8349d040 D mgre_cloner +ffffffff8349d070 D egre_cloner +ffffffff8349d0a0 D nvgre_cloner +ffffffff8349d0d0 D eoip_cloner +ffffffff8349e000 D trunk_cloner +ffffffff8349f000 d aggr_cloner +ffffffff834a0000 d tpmr_cloner +ffffffff834a1000 D mpe_cloner +ffffffff834a2000 D mpw_cloner +ffffffff834a3000 D mpip_cloner +ffffffff834a4000 d bpe_cloner +ffffffff834a4030 d bpe_lock +ffffffff834a5000 D vether_cloner +ffffffff834a6000 D pair_cloner +ffffffff834a7000 d vxlan_cloner +ffffffff834a7030 d vxlan_lock +ffffffff834a7040 d vxlan_teps +ffffffff834a8000 D underload_interval +ffffffff834a8010 D wg_cloner +ffffffff834a9000 d stoeplitz_keyseed +ffffffff834aa000 D ieee80211_cache_size +ffffffff834ab000 D arpt_prune +ffffffff834ab004 D arpt_keep +ffffffff834ab008 D arpt_down +ffffffff834ab010 D arpinq +ffffffff834ab048 D arp_mtx +ffffffff834ab058 D arp_maxtries +ffffffff834ac000 D ipport_firstauto +ffffffff834ac004 D ipport_lastauto +ffffffff834ac008 D ipport_hifirstauto +ffffffff834ac00c D ipport_hilastauto +ffffffff834ad000 D divert_sendspace +ffffffff834ad004 D divert_recvspace +ffffffff834ad008 D divbhashsize +ffffffff834ae000 D icmptstamprepl +ffffffff834ae004 D icmperrppslim +ffffffff834ae008 D icmp_redirtimeout +ffffffff834af000 D ip_sendredirects +ffffffff834af004 D ip_defttl +ffffffff834af008 D ip_mtudisc +ffffffff834af00c D ip_mtudisc_timeout +ffffffff834af010 D ipq_mutex +ffffffff834af020 D ip_maxqueue +ffffffff834af028 D ipintrq +ffffffff834af060 d ipsend_task +ffffffff834af090 d ipsendraw_task +ffffffff834b0000 D ip_mrtproto +ffffffff834b0004 d sin +ffffffff834b1000 D rip_sendspace +ffffffff834b1008 D rip_recvspace +ffffffff834b2000 D tcp_debug_mtx +ffffffff834b3000 D tcprexmtthresh +ffffffff834b3004 D tcptv_keep_init +ffffffff834b3008 D tcp_rst_ppslim +ffffffff834b300c D tcp_ackdrop_ppslim +ffffffff834b3010 D tcp_syn_hash_size +ffffffff834b3014 D tcp_syn_cache_limit +ffffffff834b3018 D tcp_syn_bucket_limit +ffffffff834b301c D tcp_syn_use_limit +ffffffff834b3020 D syn_cache_mtx +ffffffff834b4000 D tcp_outflags +ffffffff834b5000 D tcp_timer_mtx +ffffffff834b5010 D tcp_mssdflt +ffffffff834b5014 D tcp_rttdflt +ffffffff834b5018 D tcp_do_rfc1323 +ffffffff834b501c D tcp_do_sack +ffffffff834b5020 D tcp_do_rfc3390 +ffffffff834b5024 D tcp_do_tso +ffffffff834b5028 D tcp_reass_limit +ffffffff834b502c D tcp_sackhole_limit +ffffffff834b6000 D tcp_backoff +ffffffff834b6034 D tcp_totbackoff +ffffffff834b7000 D tcp_sendspace +ffffffff834b7004 D tcp_recvspace +ffffffff834b7008 D tcp_autorcvbuf_inc +ffffffff834b8000 D udpcksum +ffffffff834b8004 D udp_sendspace +ffffffff834b8008 D udp_recvspace +ffffffff834b9000 D ipsec_flows_mtx +ffffffff834b9010 D ipsec_ids_idle +ffffffff834b9014 D ipsec_ids_next_flow +ffffffff834b9018 D ipsec_policy_head +ffffffff834b9028 D ipsp_ids_gc_timeout +ffffffff834b9070 D tdb_sadb_mtx +ffffffff834b9080 d tdb_hashmask +ffffffff834ba000 D ipo_tdb_mtx +ffffffff834ba010 D ipsec_acquire_mtx +ffffffff834ba020 D ipsec_acquire_head +ffffffff834bb000 D ipsec_keep_invalid +ffffffff834bb004 D ipsec_require_pfs +ffffffff834bb008 D ipsec_soft_timeout +ffffffff834bb00c D ipsec_exp_timeout +ffffffff834bb010 D ipsec_soft_first_use +ffffffff834bb014 D ipsec_exp_first_use +ffffffff834bb018 D ipsec_expire_acquire +ffffffff834bb01c D esp_enable +ffffffff834bb020 D ah_enable +ffffffff834bc000 D udpencap_enable +ffffffff834bc004 D udpencap_port +ffffffff834bd000 D carp_vh_rc +ffffffff834bd020 D carp_sc_rc +ffffffff834bd040 D carp_opts +ffffffff834bd058 D carp_cloner +ffffffff834bd088 d carp_send_na.mcast ffffffff834be000 d PADDING -ffffffff834bf000 d weak_keys -ffffffff834c0000 D swcr_id -ffffffff834c1000 D window_inflate -ffffffff834c1004 D window_deflate -ffffffff834c2000 D ghash_update -ffffffff834c3000 D mpls_defttl -ffffffff834c3004 D mpls_mapttl_ip -ffffffff834c4000 D nfskevq_lock -ffffffff834c5000 D desirednfsrvcache -ffffffff834c6000 D nfs_niothreads -ffffffff834c7000 D fragtbl -ffffffff834c8000 D ffs_vtbl -ffffffff834c9000 D dirchk -ffffffff834ca000 D desireddquot -ffffffff834cb000 D amap_list_lock -ffffffff834cc000 d uao_list_lock -ffffffff834cd000 D udv_lock -ffffffff834ce000 d uvmexp_countersboot_boot_cpumem -ffffffff834ce0c0 D uvmexp_counters -ffffffff834ce0c8 D vm_min_kernel_address -ffffffff834cf000 D no_constraint -ffffffff834d0000 d uvm_kmapent_warn_rate -ffffffff834d1000 D maxslp -ffffffff834d2000 D uvmpagerops -ffffffff834d3000 D uvm_swap_data_lock -ffffffff834d3010 D swap_syscall_lock -ffffffff834d3020 D oommtx -ffffffff834d4000 D uvm_doswapencrypt -ffffffff834d5000 D gif_list -ffffffff834d5010 D gif_cloner -ffffffff834d6000 d sec_cloner -ffffffff834d6030 d sec_tdb_gc_mtx -ffffffff834d6040 d sec_tdb_gc_task -ffffffff834d7000 D divert6_sendspace -ffffffff834d7004 D divert6_recvspace -ffffffff834d7008 D divb6hashsize -ffffffff834d8000 d in6_get_hw_ifid.allone -ffffffff834d9000 D ip6_sendredirects -ffffffff834d9004 D ip6_defhlim -ffffffff834d9008 D ip6_defmcasthlim -ffffffff834d900c D ip6_maxfragpackets -ffffffff834d9010 D ip6_maxfrags -ffffffff834d9014 D ip6_log_interval -ffffffff834d9018 D ip6_hdrnestlimit -ffffffff834d901c D ip6_dad_count -ffffffff834d9020 D ip6_auto_flowlabel -ffffffff834d9024 D ip6_use_deprecated -ffffffff834d9028 D ip6_neighborgcthresh -ffffffff834d902c D ip6_maxdynroutes -ffffffff834d9030 D rip6_sendspace -ffffffff834d9038 D rip6_recvspace -ffffffff834d9040 D icmp6_redirtimeout -ffffffff834d9044 D icmp6errppslim -ffffffff834d9048 D ip6_mtudisc_timeout -ffffffff834da000 D frag6_mutex -ffffffff834db000 d icmp6_mtudisc_hiwat -ffffffff834db004 d icmp6_mtudisc_lowat -ffffffff834dc000 d randomtab_20 -ffffffff834dd000 D ip6intrq -ffffffff834dd038 d ip6send_task -ffffffff834de000 D nd6_timer_next -ffffffff834de008 D nd6_expire_next -ffffffff834de010 D nd6_delay -ffffffff834de014 D nd6_umaxtries -ffffffff834de018 D nd6_mmaxtries -ffffffff834de01c D nd6_gctimer -ffffffff834de020 D nd6_maxndopt -ffffffff834de028 D nd6_mtx -ffffffff834de038 D nd6_list -ffffffff834df000 d dadq -ffffffff834e0000 D pfkeyv2_mtx -ffffffff834e0010 d pfkeyv2_seq -ffffffff834e1000 D sadb_exts_allowed_in -ffffffff834e1090 D sadb_exts_required_in -ffffffff834e2000 D cold -ffffffff834e3000 D bdevsw -ffffffff834e3460 D nblkdev -ffffffff834e3470 D cdevsw -ffffffff834e5450 D nchrdev -ffffffff834e5454 D mem_no -ffffffff834e5458 D swapdev -ffffffff834e5460 D constab -ffffffff834e6000 D machine -ffffffff834e6008 D cpu_idle_cycle_fcn -ffffffff834e6010 D lid_action -ffffffff834e6014 D pwr_action -ffffffff834e6018 D isa_constraint -ffffffff834e6028 D dma_constraint -ffffffff834e6040 D uvm_md_constraints -ffffffff834e6058 D delay_func -ffffffff834e6060 D initclock_func -ffffffff834e6068 D startclock_func -ffffffff834e6070 D bootinfo_size -ffffffff834e6074 D waittime -ffffffff834e6078 D dumpmag -ffffffff834e7000 d identifycpu.prevci -ffffffff834e8000 D tsc_rdtsc -ffffffff834e8008 D tsc_timecounter -ffffffff834e8058 D tsc_is_synchronized -ffffffff834e9000 D local_apic -ffffffff834e9020 D lapic_id -ffffffff834e9080 D lapic_tpr -ffffffff834e90a0 d lapic_ppr -ffffffff834e9100 d lapic_isr -ffffffff834ea000 D warn_once -ffffffff834eb000 d errata -ffffffff834ec000 D cpu_ucode_mtx -ffffffff834ed000 D mem_owner_bios -ffffffff834ed008 D mrops -ffffffff834ed028 D mtrrmask -ffffffff834ed030 D mtrrtomrt -ffffffff834ee000 D pg_frame -ffffffff834ee008 D pg_lgframe -ffffffff834ee010 D pmap_pg_wc -ffffffff834ee018 D pmaps_lock -ffffffff834ee028 d pmap_maxkvaddr -ffffffff834ef000 D kv_physwait -ffffffff834f0000 D fpu_save_len -ffffffff834f1000 D i8259_pic -ffffffff834f2000 D softintr_pic -ffffffff834f3000 D ipifunc -ffffffff834f4000 D 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dumpmem_paddr -ffffffff838c2cd0 B idt_allocmap -ffffffff838c2dd0 B cpuresetfn -ffffffff838c2dd8 B bios_bootmac -ffffffff838c2de0 B bios_ucode -ffffffff838c2de8 B amd64_delay_quality -ffffffff838c2df0 B cpu_suspend_cycle_fcn -ffffffff838c3000 B cpuspeed -ffffffff838c3004 B amd64_has_xcrypt -ffffffff838c3008 b identifycpu.prevcpu_1_ecx -ffffffff838c300c b identifycpu.prevcpu_tpm_ecxflags -ffffffff838c3010 b identifycpu.prevcpu_d_1_eax -ffffffff838c3014 b identifycpu.prevcpu_apmi_edx -ffffffff838c3018 b identifycpu.prevcpu_arch_capa -ffffffff838c3020 B cpu_model -ffffffff838c3050 B amd64_pos_cbit -ffffffff838c3058 B setperf_setup -ffffffff838c3060 B has_rdrand -ffffffff838c3064 B has_rdseed -ffffffff838c3068 b prevcpu_perf_eax -ffffffff838c306c b prevcpu_perf_edx -ffffffff838c4000 B tsc_is_invariant -ffffffff838c4008 B tsc_frequency -ffffffff838c4010 B tsc_recalibrate -ffffffff838c4040 B tsc_bp_status -ffffffff838c40c0 B tsc_test_cycles -ffffffff838c40c8 B tsc_test_rounds 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-ffffffff838cb140 B protection_codes -ffffffff838cb180 B pmap_use_pcid -ffffffff838cb184 b cr3_pcid_proc -ffffffff838cb188 B cr3_pcid_proc_intel -ffffffff838cb190 B pmaps -ffffffff838cb198 B pmap_pmap_pool -ffffffff838cb340 B pmap_pv_pool -ffffffff838cb4e8 B pmap_pdp_pool -ffffffff838cc000 B fpu_mxcsr_mask -ffffffff838cc008 B xsave_mask -ffffffff838cd000 B x86_soft_intrs -ffffffff838ce000 B i8259_imen -ffffffff838cf000 B prev_cache -ffffffff838d0000 B intr_shared_edge -ffffffff838d0004 B intr_suspended -ffffffff838d0008 B intr_nowake -ffffffff838d0010 B fake_softclock_intrhand -ffffffff838d0080 B fake_softnet_intrhand -ffffffff838d00f0 B fake_softtty_intrhand -ffffffff838d0160 B fake_timer_intrhand -ffffffff838d01d0 B fake_ipi_intrhand -ffffffff838d0240 B fake_xen_intrhand -ffffffff838d02b0 B fake_hyperv_intrhand -ffffffff838d1000 B atdevbase -ffffffff838d1010 b ioport_ex_storage -ffffffff838d12e0 B ioport_ex -ffffffff838d12f0 b iomem_ex_storage -ffffffff838d15c0 B iomem_ex -ffffffff838d15c8 b ioport_malloc_safe -ffffffff838d2000 B mp_perflevel -ffffffff838d2008 B ul_setperf -ffffffff838d3000 B cn_tab -ffffffff838d4000 B ddb_mp_mutex -ffffffff838d4010 B ddb_state -ffffffff838d4018 B ddb_regs -ffffffff838d40c8 B db_switch_cpu -ffffffff838d40d0 B db_switch_to_cpu -ffffffff838d40d8 B ddb_active_cpu -ffffffff838d5000 B rtclock_tval -ffffffff838d5008 B i8254_ticked -ffffffff838d500c B i8254_offset -ffffffff838d5010 B i8254_lastcount -ffffffff838d5018 b rtcstart.rtcdrain_timeout -ffffffff838d5060 B rtc_update_century -ffffffff838d5068 B rtc_todr -ffffffff838d6000 B k8pnow_current_state -ffffffff838d7000 B bus_clock -ffffffff838d7008 b est_fqlist -ffffffff838d8000 B k1x_current_state -ffffffff838d9000 B rotatedfonts -ffffffff838d9008 B rasops_framebuffers -ffffffff838da000 b stamp_attr -ffffffff838da010 b stamp +ffffffff834bf000 d PADDING +ffffffff834c0000 d weak_keys +ffffffff834c1000 D swcr_id +ffffffff834c2000 D window_inflate +ffffffff834c2004 D window_deflate +ffffffff834c3000 D ghash_update +ffffffff834c4000 D mpls_defttl +ffffffff834c4004 D mpls_mapttl_ip +ffffffff834c5000 D nfskevq_lock +ffffffff834c6000 D desirednfsrvcache +ffffffff834c7000 D nfs_niothreads +ffffffff834c8000 D fragtbl +ffffffff834c9000 D ffs_vtbl +ffffffff834ca000 D dirchk +ffffffff834cb000 D desireddquot +ffffffff834cc000 D amap_list_lock +ffffffff834cd000 d uao_list_lock +ffffffff834ce000 D udv_lock +ffffffff834cf000 d uvmexp_countersboot_boot_cpumem +ffffffff834cf0c0 D uvmexp_counters +ffffffff834cf0c8 D vm_min_kernel_address +ffffffff834d0000 D no_constraint +ffffffff834d1000 d uvm_kmapent_warn_rate +ffffffff834d2000 D maxslp +ffffffff834d3000 D uvmpagerops +ffffffff834d4000 D uvm_swap_data_lock +ffffffff834d4010 D swap_syscall_lock +ffffffff834d4020 D oommtx +ffffffff834d5000 D uvm_doswapencrypt +ffffffff834d6000 D gif_list +ffffffff834d6010 D gif_cloner +ffffffff834d7000 d sec_cloner +ffffffff834d7030 d sec_tdb_gc_mtx +ffffffff834d7040 d sec_tdb_gc_task +ffffffff834d8000 D divert6_sendspace +ffffffff834d8004 D divert6_recvspace +ffffffff834d8008 D divb6hashsize +ffffffff834d9000 d in6_get_hw_ifid.allone +ffffffff834da000 D ip6_sendredirects +ffffffff834da004 D ip6_defhlim +ffffffff834da008 D ip6_defmcasthlim +ffffffff834da00c D ip6_maxfragpackets +ffffffff834da010 D ip6_maxfrags +ffffffff834da014 D ip6_log_interval +ffffffff834da018 D ip6_hdrnestlimit +ffffffff834da01c D ip6_dad_count +ffffffff834da020 D ip6_auto_flowlabel +ffffffff834da024 D ip6_use_deprecated +ffffffff834da028 D ip6_neighborgcthresh +ffffffff834da02c D ip6_maxdynroutes +ffffffff834da030 D rip6_sendspace +ffffffff834da038 D rip6_recvspace +ffffffff834da040 D icmp6_redirtimeout +ffffffff834da044 D icmp6errppslim +ffffffff834da048 D ip6_mtudisc_timeout +ffffffff834db000 D frag6_mutex +ffffffff834dc000 d icmp6_mtudisc_hiwat +ffffffff834dc004 d icmp6_mtudisc_lowat +ffffffff834dd000 d randomtab_20 +ffffffff834de000 D ip6intrq +ffffffff834de038 d ip6send_task +ffffffff834df000 D nd6_timer_next +ffffffff834df008 D nd6_expire_next +ffffffff834df010 D nd6_delay +ffffffff834df014 D nd6_umaxtries +ffffffff834df018 D nd6_mmaxtries +ffffffff834df01c D nd6_gctimer +ffffffff834df020 D nd6_maxndopt +ffffffff834df028 D nd6_mtx +ffffffff834df038 D nd6_list +ffffffff834e0000 d dadq +ffffffff834e1000 D pfkeyv2_mtx +ffffffff834e1010 d pfkeyv2_seq +ffffffff834e2000 D sadb_exts_allowed_in +ffffffff834e2090 D sadb_exts_required_in +ffffffff834e3000 D cold +ffffffff834e4000 D bdevsw +ffffffff834e4460 D nblkdev +ffffffff834e4470 D cdevsw +ffffffff834e6450 D nchrdev +ffffffff834e6454 D mem_no +ffffffff834e6458 D swapdev +ffffffff834e6460 D constab +ffffffff834e7000 D machine +ffffffff834e7008 D cpu_idle_cycle_fcn +ffffffff834e7010 D lid_action +ffffffff834e7014 D pwr_action +ffffffff834e7018 D isa_constraint +ffffffff834e7028 D dma_constraint +ffffffff834e7040 D uvm_md_constraints +ffffffff834e7058 D delay_func +ffffffff834e7060 D initclock_func +ffffffff834e7068 D startclock_func +ffffffff834e7070 D bootinfo_size +ffffffff834e7074 D waittime +ffffffff834e7078 D dumpmag +ffffffff834e8000 d identifycpu.prevci +ffffffff834e9000 D tsc_rdtsc +ffffffff834e9008 D tsc_timecounter +ffffffff834e9058 D tsc_is_synchronized +ffffffff834ea000 D local_apic +ffffffff834ea020 D lapic_id +ffffffff834ea080 D lapic_tpr +ffffffff834ea0a0 d lapic_ppr +ffffffff834ea100 d lapic_isr +ffffffff834eb000 D warn_once +ffffffff834ec000 d errata +ffffffff834ed000 D cpu_ucode_mtx +ffffffff834ee000 D mem_owner_bios +ffffffff834ee008 D mrops +ffffffff834ee028 D mtrrmask +ffffffff834ee030 D mtrrtomrt +ffffffff834ef000 D pg_frame +ffffffff834ef008 D pg_lgframe +ffffffff834ef010 D pmap_pg_wc +ffffffff834ef018 D pmaps_lock +ffffffff834ef028 d pmap_maxkvaddr +ffffffff834f0000 D kv_physwait +ffffffff834f1000 D fpu_save_len +ffffffff834f2000 D i8259_pic +ffffffff834f3000 D softintr_pic +ffffffff834f4000 D ipifunc +ffffffff834f5000 D setperf_mp_mutex +ffffffff834f6000 D db_Grp6 +ffffffff834f6040 D db_Grp7 +ffffffff834f6100 D db_Grp8 +ffffffff834f6140 D db_Grp9 +ffffffff834f6200 D db_GrpA +ffffffff834f6240 D db_GrpB +ffffffff834f6280 D db_GrpC +ffffffff834f62c0 D db_inst_0f0x +ffffffff834f6440 D db_inst_0f2x +ffffffff834f65c0 D db_inst_0f3x +ffffffff834f6740 D db_inst_0f8x +ffffffff834f68c0 D db_inst_0f9x +ffffffff834f6a40 D db_inst_0fax +ffffffff834f6bc0 D db_inst_0fbx +ffffffff834f6d40 D db_inst_0fcx +ffffffff834f6ec0 D db_inst_0f +ffffffff834f6f40 D db_Esc92 +ffffffff834f6f80 D db_Esc94 +ffffffff834f6fc0 D db_Esc95 +ffffffff834f7000 D db_Esc96 +ffffffff834f7040 D db_Esc97 +ffffffff834f7080 D db_Esca5 +ffffffff834f70c0 D db_Escb4 +ffffffff834f7100 D db_Esce3 +ffffffff834f7140 D db_Escf4 +ffffffff834f7180 D db_Esc8 +ffffffff834f7240 D db_Esc9 +ffffffff834f7300 D db_Esca +ffffffff834f73c0 D db_Escb +ffffffff834f7480 D db_Escc +ffffffff834f7540 D db_Escd +ffffffff834f7600 D db_Esce +ffffffff834f76c0 D db_Escf +ffffffff834f7780 D db_Esc_inst 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D ioapic_cold +ffffffff83547008 D ioapic_cd +ffffffff83548000 D efifb_std_descr +ffffffff83548030 D efifb_descrs +ffffffff83548038 D efifb_accessops +ffffffff83548098 D efifb_cd +ffffffff83549000 D pvbus_cd +ffffffff83549020 D pvbus_types +ffffffff835490e0 D pvbus_dma_tag +ffffffff8354a000 D pvclock_cd +ffffffff8354a020 D pvclock_timecounter +ffffffff8354b000 D vmt_tclo_rpc +ffffffff8354b0d0 D vmt_cd +ffffffff8354c000 D xen_cd +ffffffff8354c020 D xen_bus_dma_tag +ffffffff8354d000 D xnf_cd +ffffffff8354e000 D xbf_cd +ffffffff8354f000 D hv_msg_dispatch +ffffffff8354f110 D hv_timecounter +ffffffff8354f160 D hyperv_cd +ffffffff83550000 d hv_ic_devs +ffffffff83551000 D hvn_cd +ffffffff83552000 D hvs_cd +ffffffff83553000 D virtio_cd +ffffffff83554000 D vio_cd +ffffffff83555000 D vioblk_cd +ffffffff83556000 D viomb_cd +ffffffff83557000 D viornd_cd +ffffffff83558000 D vioscsi_cd +ffffffff83559000 D vmmci_cd +ffffffff8355a000 D pci_cd +ffffffff8355b000 D arc_fw_hdr +ffffffff8355b008 D arc_cd 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D mskc_cd +ffffffff83583020 D msk_cd +ffffffff83584000 D puc_cd +ffffffff83585000 D puc_ndevs +ffffffff83586000 D iwi_cd +ffffffff83587000 D wpi_cd +ffffffff83588000 D iwn_cd +ffffffff83589000 D iwm_cd +ffffffff8358a000 D iwx_cd +ffffffff8358b000 d .compoundliteral +ffffffff8358b040 d .compoundliteral.4 +ffffffff8358b080 d .compoundliteral.5 +ffffffff8358b0b0 d .compoundliteral.6 +ffffffff8358b0f0 d .compoundliteral.7 +ffffffff8358b130 d .compoundliteral.8 +ffffffff8358c000 D cmpci_cd +ffffffff8358d000 D iha_cd +ffffffff8358e000 D pcscp_cd +ffffffff8358e020 D pcscp_glue +ffffffff8358f000 D bge_cd +ffffffff83590000 D bnx_firmwares +ffffffff83590160 D bnx_rv2ps +ffffffff835901c0 D bnx_cd +ffffffff835901e0 d flash_5709 +ffffffff83590210 d flash_table +ffffffff83591000 D vge_cd +ffffffff83592000 D stge_cd +ffffffff83593000 D nfe_cd +ffffffff83594000 D et_cd +ffffffff83595000 D jme_cd +ffffffff83596000 D age_cd +ffffffff83597000 D alc_dma_burst +ffffffff83597020 D alc_cd +ffffffff83598000 D ale_cd +ffffffff83599000 D amdpm_cd +ffffffff83599020 d amdpm_timecounter +ffffffff8359a000 D bce_cd +ffffffff8359b000 D rtwn_cd +ffffffff8359c000 d ral_rt2560_opns +ffffffff8359c028 d ral_rt2661_opns +ffffffff8359c050 d ral_rt2860_opns +ffffffff8359d000 D piixpm_cd +ffffffff8359e000 D vic_cd +ffffffff8359f000 D vmx_cd +ffffffff835a0000 D vmwpvs_cd +ffffffff835a1000 D lii_cd +ffffffff835a2000 D ichiic_cd +ffffffff835a3000 D viapm_cd +ffffffff835a3020 d viapm_timecounter +ffffffff835a4000 D amdiic_cd +ffffffff835a5000 D nviic_cd +ffffffff835a6000 D kate_cd +ffffffff835a7000 D km_cd +ffffffff835a8000 D cpu_model_offsets +ffffffff835a8070 D ksmn_cd +ffffffff835a9000 D itherm_cd +ffffffff835aa000 D pchtemp_cd +ffffffff835ab000 D xspd_cd +ffffffff835ac000 D virtio_pci_ops +ffffffff835ad000 D bwfm_pci_buscore_ops +ffffffff835ad030 D bwfm_pci_bus_ops +ffffffff835ad058 D bwfm_pci_msgbuf_ops +ffffffff835ae000 D bnxt_cd +ffffffff835af000 D mcx_cd +ffffffff835b0000 D iavf_cd +ffffffff835b1000 D rge_cd +ffffffff835b2000 D igc_cd +ffffffff835b3000 D ngbe_cd +ffffffff835b4000 D agp_cd +ffffffff835b5000 D intagp_cd +ffffffff835b5020 D agp_i810_methods +ffffffff835b6000 D reservation_ww_class +ffffffff835b7000 d bridge_lock +ffffffff835b7010 d bridge_list +ffffffff835b8000 d drm_connector_enum_list +ffffffff835b81f8 d connector_list_lock +ffffffff835b8208 d connector_list +ffffffff835b9000 d kernel_fb_helper_list +ffffffff835b9010 d kernel_fb_helper_lock +ffffffff835ba000 D drm_global_mutex +ffffffff835bb000 D i2c_bit_algo +ffffffff835bb010 d drm_fence_context_count +ffffffff835bb018 d dma_fence_stub_mtx +ffffffff835bb028 D wait_bit_mtx +ffffffff835bb038 D shrinkers +ffffffff835bc000 d crtc_ww_class +ffffffff835bd000 d panel_lock +ffffffff835bd010 d panel_list +ffffffff835be000 d ttm_global_mutex +ffffffff835bf000 D drm_sched_policy +ffffffff835c0000 D intel_bbops +ffffffff835c1000 d i915_sys_placement +ffffffff835c1020 d i915_ttm_bo_driver +ffffffff835c2000 d mchdev_lock +ffffffff835c3000 D inteldrm_stdscreen +ffffffff835c3030 D inteldrm_scrlist +ffffffff835c3038 D inteldrm_screenlist +ffffffff835c3048 D inteldrm_accessops +ffffffff835c30a8 D inteldrm_cd +ffffffff835c4000 d capture_mutex +ffffffff835c5000 d mitigations +ffffffff835c6000 D i915_modparams +ffffffff835c7000 d schedule_lock +ffffffff835c8000 d unbind_fence_ops +ffffffff835c9000 D intel_graphics_stolen_res +ffffffff835ca000 D btc_valid_sclk +ffffffff835cb000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff835cb020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff835cc000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff835cc008 d r600_cs_packet_parse_vline.vline_status +ffffffff835cd000 d r100_asic +ffffffff835cd2e0 d r200_asic +ffffffff835cd5c0 d r300_asic_pcie +ffffffff835cd8a0 d r300_asic +ffffffff835cdb80 d r420_asic +ffffffff835cde60 d rs400_asic +ffffffff835ce140 d rs600_asic +ffffffff835ce420 d rs690_asic +ffffffff835ce700 d rv515_asic +ffffffff835ce9e0 d r520_asic +ffffffff835cecc0 d r600_asic +ffffffff835cefa0 d rv6xx_asic +ffffffff835cf280 d rs780_asic +ffffffff835cf560 d rv770_asic +ffffffff835cf840 d evergreen_asic +ffffffff835cfb20 d sumo_asic +ffffffff835cfe00 d btc_asic +ffffffff835d00e0 d cayman_asic +ffffffff835d03c0 d trinity_asic +ffffffff835d06a0 d si_asic +ffffffff835d0980 d ci_asic +ffffffff835d0c60 d kv_asic +ffffffff835d1000 d dce6_funcs +ffffffff835d1018 d dce6_hdmi_funcs +ffffffff835d1088 d dce6_dp_funcs +ffffffff835d10f8 d dce4_funcs +ffffffff835d1110 d dce4_hdmi_funcs +ffffffff835d1180 d dce4_dp_funcs +ffffffff835d11f0 d dce32_funcs +ffffffff835d1208 d dce32_hdmi_funcs +ffffffff835d1278 d dce32_dp_funcs +ffffffff835d12e8 d r600_funcs +ffffffff835d1300 d r600_hdmi_funcs +ffffffff835d2000 D radeon_modeset +ffffffff835d2004 D radeon_dynclks +ffffffff835d2008 D radeon_agpmode +ffffffff835d200c D radeon_gart_size +ffffffff835d2010 D radeon_tv +ffffffff835d2014 D radeon_audio +ffffffff835d2018 D radeon_pcie_gen2 +ffffffff835d201c D radeon_msi +ffffffff835d2020 D radeon_lockup_timeout +ffffffff835d2024 D radeon_dpm +ffffffff835d2028 D radeon_aspm +ffffffff835d202c D radeon_runtime_pm +ffffffff835d2030 D radeon_vm_size +ffffffff835d2034 D radeon_vm_block_size +ffffffff835d2038 D radeon_use_pflipirq +ffffffff835d203c D radeon_bapm +ffffffff835d2040 D radeon_backlight +ffffffff835d2044 D radeon_auxch +ffffffff835d2048 D radeon_uvd +ffffffff835d204c D radeon_vce +ffffffff835d2050 D radeon_si_support +ffffffff835d2054 D radeon_cik_support +ffffffff835d2058 D radeondrm_cd +ffffffff835d2078 D radeondrm_stdscreen +ffffffff835d20a8 D radeondrm_scrlist +ffffffff835d20b0 D radeondrm_screenlist +ffffffff835d20c0 D radeondrm_accessops +ffffffff835d3000 D radeon_bbops +ffffffff835d4000 d radeon_bo_driver +ffffffff835d5000 d verde_pg_init +ffffffff835d6000 d cac_weights_pitcairn +ffffffff835d64d0 d cac_weights_oland +ffffffff835d7000 d aldebaran_mode2_handler +ffffffff835d8000 d amdgpu_vbios_version_attrs +ffffffff835d9000 D amdgpu_asic_name +ffffffff835da000 D amdgpu_vram_limit +ffffffff835da004 D amdgpu_gart_size +ffffffff835da008 D amdgpu_gtt_size +ffffffff835da00c D amdgpu_moverate +ffffffff835da010 D amdgpu_audio +ffffffff835da014 D amdgpu_pcie_gen2 +ffffffff835da018 D amdgpu_msi +ffffffff835da01c D amdgpu_dpm +ffffffff835da020 D amdgpu_fw_load_type +ffffffff835da024 D amdgpu_aspm +ffffffff835da028 D amdgpu_runtime_pm +ffffffff835da02c D amdgpu_ip_block_mask +ffffffff835da030 D amdgpu_bapm +ffffffff835da034 D amdgpu_vm_size +ffffffff835da038 D amdgpu_vm_fragment_size +ffffffff835da03c D amdgpu_vm_block_size +ffffffff835da040 D amdgpu_vm_update_mode +ffffffff835da044 D amdgpu_dc +ffffffff835da048 D amdgpu_sched_jobs +ffffffff835da04c D amdgpu_sched_hw_submission +ffffffff835da050 D amdgpu_cg_mask +ffffffff835da058 D amdgpu_pg_mask +ffffffff835da05c D amdgpu_sdma_phase_quantum +ffffffff835da060 D amdgpu_pp_feature_mask +ffffffff835da064 D amdgpu_lbpw +ffffffff835da068 D amdgpu_compute_multipipe +ffffffff835da06c D amdgpu_gpu_recovery +ffffffff835da070 D amdgpu_smu_pptable_id +ffffffff835da074 D amdgpu_dc_feature_mask +ffffffff835da078 D amdgpu_async_gfx_ring +ffffffff835da07c D amdgpu_mcbp +ffffffff835da080 D amdgpu_discovery +ffffffff835da084 D amdgpu_noretry +ffffffff835da088 D amdgpu_force_asic_type +ffffffff835da08c D amdgpu_tmz +ffffffff835da090 D amdgpu_reset_method +ffffffff835da094 D amdgpu_num_kcq +ffffffff835da098 D amdgpu_use_xgmi_p2p +ffffffff835da09c D amdgpu_sg_display +ffffffff835da0a0 D amdgpu_user_partt_mode +ffffffff835da0a8 D mgpu_info +ffffffff835da558 D amdgpu_ras_enable +ffffffff835da55c D amdgpu_ras_mask +ffffffff835da560 D amdgpu_bad_page_threshold +ffffffff835da564 D amdgpu_backlight +ffffffff835da568 D amdgpu_cd +ffffffff835da588 D amdgpu_stdscreen +ffffffff835da5b8 D amdgpu_scrlist +ffffffff835da5c0 D amdgpu_screenlist +ffffffff835da5d0 D amdgpu_accessops +ffffffff835db000 d amdgpu_gtt_mgr_attributes +ffffffff835dc000 D amdgpu_bbops +ffffffff835dd000 D soc15_ih_clientid_name +ffffffff835de000 D ras_error_string +ffffffff835de030 D ras_block_string +ffffffff835de0c0 D ras_mca_block_string +ffffffff835df000 d amdgpu_bo_driver +ffffffff835e0000 d amdgpu_vram_mgr_attributes +ffffffff835e1000 d xgmi_mutex +ffffffff835e1010 D xgmi_ras_hw_ops +ffffffff835e1050 D xgmi_ras +ffffffff835e2000 D aqua_vanjaram_xcp_funcs +ffffffff835e3000 D gfx_v11_0_3_ras +ffffffff835e4000 d gfx_v9_0_ras +ffffffff835e5000 D gfx_v9_4_ras +ffffffff835e6000 D gfx_v9_4_2_ras_ops +ffffffff835e6040 D gfx_v9_4_2_ras +ffffffff835e7000 D gfx_v9_4_3_xcp_funcs +ffffffff835e7020 D gfx_v9_4_3_ras_ops +ffffffff835e7060 D gfx_v9_4_3_ras +ffffffff835e8000 D gfxhub_v1_2_xcp_funcs +ffffffff835e9000 D hdp_v4_0_ras_hw_ops +ffffffff835e9040 D hdp_v4_0_ras +ffffffff835ea000 d jpeg_v2_6_ras +ffffffff835eb000 d jpeg_v4_0_ras +ffffffff835ec000 d jpeg_v4_0_3_ras +ffffffff835ed000 D mca_v3_0_mp0_ras +ffffffff835ed058 D mca_v3_0_mp1_ras +ffffffff835ed0b0 D mca_v3_0_mpio_ras +ffffffff835ee000 D mmhub_v1_0_ras_hw_ops +ffffffff835ee040 D mmhub_v1_0_ras +ffffffff835ef000 D mmhub_v1_7_ras_hw_ops +ffffffff835ef040 D mmhub_v1_7_ras +ffffffff835f0000 D mmhub_v1_8_ras +ffffffff835f1000 D mmhub_v9_4_ras +ffffffff835f2000 D nbio_v4_3_ras +ffffffff835f3000 D nbio_v7_4_ras +ffffffff835f4000 D nbio_v7_9_ras +ffffffff835f5000 d sriov_sc_video_codecs_encode +ffffffff835f5010 d sriov_sc_video_codecs_decode_vcn1 +ffffffff835f5020 d sriov_sc_video_codecs_decode_vcn0 +ffffffff835f5030 d sriov_sc_video_codecs_encode_array +ffffffff835f5060 d sriov_sc_video_codecs_decode_array_vcn1 +ffffffff835f50f0 d sriov_sc_video_codecs_decode_array_vcn0 +ffffffff835f6000 d sdma_v4_0_ras +ffffffff835f7000 D sdma_v4_4_ras +ffffffff835f8000 D sdma_v4_4_2_xcp_funcs +ffffffff835f8020 d sdma_v4_4_2_ras +ffffffff835f9000 d sdma_v6_0_3_ras +ffffffff835fa000 d sienna_cichlid_mode2_handler +ffffffff835fb000 d smu_v13_0_10_mode2_handler +ffffffff835fc000 d sriov_vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff835fc010 d sriov_vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff835fc020 d sriov_vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff835fc030 d sriov_vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff835fc040 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff835fc070 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff835fc100 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff835fc140 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff835fd000 D umc_v6_1_ras +ffffffff835fe000 D umc_v6_7_ras +ffffffff835ff000 D umc_v8_10_ras +ffffffff83600000 D umc_v8_7_ras +ffffffff83601000 d vcn_v2_6_ras +ffffffff83602000 d vcn_v4_0_unified_ring_vm_funcs +ffffffff83602140 d vcn_v4_0_ras +ffffffff83603000 d vcn_v4_0_3_ras +ffffffff83604000 d amdgpu_dm_mode_config_helperfuncs +ffffffff83604010 d dm_atomic_state_funcs +ffffffff83605000 d construct_integrated_info.result +ffffffff83605004 d bios_parser_get_firmware_info.result +ffffffff83606000 d dce_funcs +ffffffff83607000 d dce110_funcs +ffffffff83608000 d dce112_funcs +ffffffff83609000 d dce120_funcs +ffffffff8360a000 d rv1_clk_funcs +ffffffff8360a090 d rv1_clk_internal_funcs +ffffffff8360b000 d rv2_clk_internal_funcs +ffffffff8360c000 d dcn2_funcs +ffffffff8360d000 d dcn201_funcs +ffffffff8360e000 d dcn21_funcs +ffffffff8360e090 d rn_bw_params +ffffffff8360f000 D dcn3_fpga_funcs +ffffffff8360f090 d dcn3_funcs +ffffffff83610000 d vg_funcs +ffffffff83610090 d dummy_clocks +ffffffff836101c0 d vg_bw_params +ffffffff83611000 d dcn31_funcs +ffffffff83611090 d dcn31_bw_params +ffffffff83612000 d dcn314_funcs +ffffffff83612090 d dcn314_bw_params +ffffffff83613000 d dcn315_funcs +ffffffff83613090 d dcn315_bw_params +ffffffff83614000 d dcn316_funcs +ffffffff83614090 d dcn316_bw_params +ffffffff83615000 d dcn32_funcs +ffffffff83616000 d dcn10_dpp_cap +ffffffff83617000 d dcn20_dpp_funcs +ffffffff83617110 d dcn20_dpp_cap +ffffffff83618000 d dcn20_hubp_funcs +ffffffff83619000 d dcn20_opp_funcs +ffffffff8361a000 d dcn20_tg_funcs +ffffffff8361b000 d dcn201_dpp_funcs +ffffffff8361b110 d dcn201_dpp_cap +ffffffff8361c000 d dcn201_hubp_funcs +ffffffff8361d000 d dcn201_opp_funcs +ffffffff8361e000 d dcn201_tg_funcs +ffffffff8361f000 d dcn201_res_pool_funcs +ffffffff8361f0f8 d dcn201_ip +ffffffff8361f2b0 d dcn201_soc +ffffffff83621000 d dcn21_hubp_funcs +ffffffff83622000 d dcn30_afmt_funcs +ffffffff83623000 d dcn30_dpp_funcs +ffffffff83623110 d dcn30_dpp_cap +ffffffff83624000 d dcn30_hubp_funcs +ffffffff83625000 d dcn30_tg_funcs +ffffffff83626000 d dcn30_vpg_funcs +ffffffff83627000 d dcn30_tg_funcs +ffffffff83628000 d res_cap_dcn301 +ffffffff83628040 d dcn301_res_pool_funcs +ffffffff83629000 d dcn302_res_pool_funcs +ffffffff8362a000 d dcn303_res_pool_funcs +ffffffff8362b000 d dcn31_afmt_funcs +ffffffff8362c000 d dcn31_apg_funcs +ffffffff8362d000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff8362e000 d dcn31_hubp_funcs +ffffffff8362f000 d dcn31_tg_funcs +ffffffff83630000 d dcn31_res_pool_funcs +ffffffff83631000 d dcn31_vpg_funcs +ffffffff83632000 d dcn314_tg_funcs +ffffffff83633000 d dcn314_res_pool_funcs +ffffffff83634000 d dcn315_res_pool_funcs +ffffffff83635000 d dcn316_res_pool_funcs +ffffffff83636000 d dcn32_dpp_funcs +ffffffff83636110 d dcn32_dpp_cap +ffffffff83637000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff83638000 d dcn32_hubp_funcs +ffffffff83639000 d dcn32_tg_funcs +ffffffff8363a000 d dcn32_res_pool_funcs +ffffffff8363b000 d dcn321_res_pool_funcs +ffffffff8363c000 D dcn1_0_ip +ffffffff8363c1b8 D dcn1_0_soc +ffffffff8363e000 D dcn2_0_ip +ffffffff8363e1b8 D dcn2_0_nv14_ip +ffffffff8363e370 D dcn2_0_soc +ffffffff8363f6a8 D dcn2_0_nv14_soc +ffffffff836409e0 D dcn2_0_nv12_soc +ffffffff83641d18 D dcn2_1_ip +ffffffff83641ed0 D dcn2_1_soc +ffffffff83643208 D ddr4_wm_table_gs +ffffffff836432c8 D lpddr4_wm_table_gs +ffffffff83643388 D lpddr4_wm_table_with_disabled_ppt +ffffffff83643448 D ddr4_wm_table_rn +ffffffff83643508 D ddr4_1R_wm_table_rn +ffffffff836435c8 D lpddr4_wm_table_rn +ffffffff83644000 D dcn3_0_ip +ffffffff836441b8 D dcn3_0_soc +ffffffff83646000 D dcn3_01_ip +ffffffff836461b8 D dcn3_01_soc +ffffffff836474f0 D ddr4_wm_table +ffffffff836475b0 D lpddr5_wm_table +ffffffff83648000 D dcn3_02_ip +ffffffff836481b8 D dcn3_02_soc +ffffffff8364a000 D dcn3_03_ip +ffffffff8364a1b8 D dcn3_03_soc +ffffffff8364c000 D dcn3_1_ip +ffffffff8364c1b8 D dcn3_15_ip +ffffffff8364c370 D dcn3_16_ip +ffffffff8364c528 d dcn3_15_soc +ffffffff8364d860 d dcn3_1_soc +ffffffff8364eb98 d dcn3_16_soc +ffffffff83650000 D dcn3_14_ip +ffffffff836501b8 d dcn3_14_soc +ffffffff83652000 D dcn3_2_ip +ffffffff836521b8 D dcn3_2_soc +ffffffff83654000 D dcn3_21_ip +ffffffff836541b8 D dcn3_21_soc +ffffffff83656000 d dsc_policy_max_target_bpp_limit +ffffffff83657000 D DIDTEDCConfig_P12 +ffffffff83657070 d smu7_profiling +ffffffff83658000 d cyan_skillfish_table_map +ffffffff83658080 d cyan_skillfish_message_map +ffffffff83659000 d navi10_table_map +ffffffff83659080 d navi10_pwr_src_map +ffffffff83659090 d navi10_workload_map +ffffffff836590e0 d navi10_message_map +ffffffff83659b60 d navi10_clk_map +ffffffff83659c20 d navi10_feature_mask_map +ffffffff8365a000 d sienna_cichlid_table_map +ffffffff8365a080 d sienna_cichlid_pwr_src_map +ffffffff8365a090 d sienna_cichlid_workload_map +ffffffff8365a0e0 d sienna_cichlid_message_map +ffffffff8365ab60 d sienna_cichlid_clk_map +ffffffff8365ac20 d sienna_cichlid_feature_mask_map +ffffffff8365b000 d vangogh_message_map +ffffffff8365ba80 d vangogh_table_map +ffffffff8365bb00 d vangogh_workload_map +ffffffff8365bb50 d vangogh_feature_mask_map +ffffffff8365c000 d renoir_table_map +ffffffff8365c080 d renoir_workload_map +ffffffff8365c0d0 d renoir_message_map +ffffffff8365cb50 d renoir_clk_map +ffffffff8365d000 d smu_v13_0_0_message_map +ffffffff8365da80 d smu_v13_0_0_feature_mask_map +ffffffff8365de50 d smu_v13_0_0_table_map +ffffffff8365ded0 d smu_v13_0_0_pwr_src_map +ffffffff8365dee0 d smu_v13_0_0_workload_map +ffffffff8365df30 d smu_v13_0_0_clk_map +ffffffff8365e000 d smu_v13_0_4_table_map +ffffffff8365e080 d smu_v13_0_4_message_map +ffffffff8365eb00 d smu_v13_0_4_feature_mask_map +ffffffff8365f000 d smu_v13_0_5_table_map +ffffffff8365f080 d smu_v13_0_5_message_map +ffffffff8365fb00 d smu_v13_0_5_feature_mask_map +ffffffff83660000 d smu_v13_0_7_message_map +ffffffff83660a80 d smu_v13_0_7_feature_mask_map +ffffffff83660e50 d smu_v13_0_7_table_map +ffffffff83660ed0 d smu_v13_0_7_pwr_src_map +ffffffff83660ee0 d smu_v13_0_7_workload_map +ffffffff83660f30 d smu_v13_0_7_clk_map +ffffffff83661000 d yellow_carp_table_map +ffffffff83661080 d yellow_carp_message_map +ffffffff83661b00 d yellow_carp_feature_mask_map +ffffffff83662000 D pci_conf_lock +ffffffff83662010 D pci_bus_dma_tag +ffffffff83662088 D msi_pic +ffffffff83662120 D msix_pic +ffffffff83663000 D pchb_cd +ffffffff83664000 D amas_cd +ffffffff83665000 D cardslot_cd +ffffffff83666000 D cardbus_cd +ffffffff83667000 d csdevs +ffffffff83668000 d ral_rt2560_opns +ffffffff83668028 d ral_rt2661_opns +ffffffff83668050 d ral_rt2860_opns +ffffffff83669000 D pcmcia_cd +ffffffff8366a000 D pcmcia_3cxem556_func0 +ffffffff8366a0b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff8366a158 D pcmcia_megahertz_xjem1144_func0 +ffffffff8366a210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff8366a2b0 d pcmcia_3cxem556_func1 +ffffffff8366a368 d pcmcia_3cxem556_func1_cfe0 +ffffffff8366a408 d pcmcia_megahertz_xjem1144_func1 +ffffffff8366a4c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff8366a560 d pcmcia_sierra_a555_func1 +ffffffff8366a618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff8366a6b8 d pcmcia_sveclancard_func0 +ffffffff8366a770 d pcmcia_sveclancard_func0_cfe0 +ffffffff8366b000 D ep_pcmcia_prod +ffffffff8366c000 D aic_pcmcia_prod +ffffffff8366d000 D com_pcmcia_prod +ffffffff8366e000 D wdc_pcmcia_pr +ffffffff8366f000 D sm_pcmcia_prod +ffffffff83670000 D xe_cd +ffffffff83671000 D pcib_cd +ffffffff83672000 D amdpcib_cd +ffffffff83673000 D tcpcib_cd +ffffffff83674000 D aapic_cd +ffffffff83675000 D hme_cd +ffffffff83676000 D isa_cd +ffffffff83677000 D isadma_cd +ffffffff83678000 D fdc_cd +ffffffff83679000 D fd_types +ffffffff836791f8 D fd_cd +ffffffff8367a000 D mpu_cd +ffffffff8367b000 D pcppi_cd +ffffffff8367c000 D spkr_cd +ffffffff8367d000 D wbsio_cd +ffffffff8367e000 D schsio_cd +ffffffff8367f000 D it_cd +ffffffff83680000 D uguru_cd +ffffffff83681000 D aps_cd +ffffffff83682000 D isa_bus_dma_tag +ffffffff83683000 D wsdisplay_cd +ffffffff83683020 D wsdisplay_cons +ffffffff83683058 D wsdisplay_defaultscreens +ffffffff83684000 D wskbd_cd +ffffffff83684020 D wskbd_default_bell_data +ffffffff83684030 D wskbd_default_keyrepeat_data +ffffffff83684040 D wskbd_srcops +ffffffff83685000 d compose_tab +ffffffff83686000 D wsmouse_cd +ffffffff83686020 D wsmouse_srcops +ffffffff83687000 D wsmux_srcops +ffffffff83687030 D wsmux_tree_lock +ffffffff83688000 D vt100_output +ffffffff83689000 D pckbd_cd +ffffffff8368a000 D pms_cd +ffffffff8368a020 d synaptics_params +ffffffff8368a030 d alps_params +ffffffff8368b000 D skgpio_cd +ffffffff8368c000 D pctr_conf_lock +ffffffff8368d000 D ukbd_keymapdata +ffffffff8368e000 D usbrev_str +ffffffff8368e030 D usb_cd +ffffffff8368f000 d usbd_ratecheck.errinterval +ffffffff83690000 D uhub_cd +ffffffff83691000 D uaudio_cd +ffffffff83692000 D uvideo_ctrls +ffffffff836922d8 D uvideo_cd +ffffffff83693000 D utvfu_norm_params +ffffffff83693030 D utvfu_cd +ffffffff83694000 D udl_reg_vals_640x480_60 +ffffffff83694020 D udl_reg_vals_640x480_67 +ffffffff83694040 D udl_reg_vals_640x480_72 +ffffffff83694060 D udl_reg_vals_640x480_75 +ffffffff83694080 D udl_reg_vals_800x480_61 +ffffffff836940a0 D udl_reg_vals_800x600_56 +ffffffff836940c0 D udl_reg_vals_800x600_60 +ffffffff836940e0 D udl_reg_vals_800x600_72 +ffffffff83694100 D udl_reg_vals_800x600_74 +ffffffff83694120 D udl_reg_vals_800x600_75 +ffffffff83694140 D udl_reg_vals_1024x768_60 +ffffffff83694160 D udl_reg_vals_1024x768_70 +ffffffff83694180 D udl_reg_vals_1024x768_75 +ffffffff836941a0 D udl_reg_vals_1280x800_60 +ffffffff836941c0 D udl_reg_vals_1280x960_60 +ffffffff836941e0 D udl_reg_vals_1280x1024_60 +ffffffff83694200 D udl_reg_vals_1280x1024_75 +ffffffff83694220 D udl_reg_vals_1366x768_60 +ffffffff83694240 D udl_reg_vals_1440x900_60 +ffffffff83694260 D udl_reg_vals_1440x900_59 +ffffffff83694280 D udl_reg_vals_1440x900_75 +ffffffff836942a0 D udl_reg_vals_1680x1050_60 +ffffffff836942c0 D udl_reg_vals_1600x1200_60 +ffffffff836942e0 D udl_reg_vals_1920x1080_60 +ffffffff83694300 D udl_null_key_1 +ffffffff83694310 D udl_decomp_table +ffffffff83695510 D udl_cd +ffffffff83695530 D udl_stdscreen +ffffffff83695560 D udl_scrlist +ffffffff83695568 D udl_screenlist +ffffffff83695578 D udl_accessops +ffffffff83696000 D umidi_cd +ffffffff83697000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff83697020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff83697040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff83697060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff83697080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff836970a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff836970c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff836970e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff83697100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff83697120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff83697140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff83697160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff83697180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff836971a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff836971c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff836971e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff83697200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff83697220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff83697240 D umidi_quirklist +ffffffff836974a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff836974c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff836974d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff836974f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff83697500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff83697520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff83697530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff83697550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff83697560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff83697580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff83697590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff836975b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff836975c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff836975e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff836975f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff83697610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff83697620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff83697640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff83697650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff83697670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff83697680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff836976a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff836976b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff836976d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff836976e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff83697700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff83697710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff83697730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff83697740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff83697760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff83697770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff83697790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff836977a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff836977c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff836977d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff836977f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff83698000 D ucom_cd +ffffffff83698020 D sysctl_ucomlock +ffffffff83699000 D ugen_cd +ffffffff8369a000 D uhidev_cd +ffffffff8369a020 d uhidev_use_rdesc.reportbuf +ffffffff8369b000 D uhid_cd +ffffffff8369c000 D fido_cd +ffffffff8369d000 D ujoy_cd +ffffffff8369e000 D ukbd_cd +ffffffff8369f000 D ums_cd +ffffffff8369f020 d ums_fix_elecom_descriptor.match +ffffffff836a0000 D umt_cd +ffffffff836a1000 D def_scale +ffffffff836a1020 D uts_cd +ffffffff836a2000 D ubcmtp_cd +ffffffff836a2020 d ubcmtp_wsmousecfg +ffffffff836a3000 D ucycom_cd +ffffffff836a4000 D uslhcom_cd +ffffffff836a5000 D ulpt_fwdevs +ffffffff836a5060 D ulpt_cd +ffffffff836a5080 D ulptusein +ffffffff836a6000 D umass_cd +ffffffff836a6020 d umass_bbb_transfer.dCBWtag +ffffffff836a7000 D uthum_cd +ffffffff836a8000 D ugold_cd +ffffffff836a8020 d cmd_init +ffffffff836a8028 d cmd_type +ffffffff836a8030 d cmd_data +ffffffff836a9000 D utrh_cd +ffffffff836aa000 D uoakrh_cd +ffffffff836ab000 D uoaklux_cd +ffffffff836ac000 D uoakv_cd +ffffffff836ad000 D uonerng_cd +ffffffff836ae000 D urng_cd +ffffffff836af000 D udcf_cd +ffffffff836b0000 D umbg_cd +ffffffff836b1000 D uvisor_cd +ffffffff836b2000 D udsbr_cd +ffffffff836b3000 D utwitch_cd +ffffffff836b4000 D aue_cd +ffffffff836b5000 D axe_cd +ffffffff836b6000 D axen_cd +ffffffff836b7000 D smsc_cd +ffffffff836b8000 D cue_devs +ffffffff836b8010 D cue_cd +ffffffff836b9000 D kue_cd +ffffffff836ba000 D cdce_cd +ffffffff836bb000 D urndis_cd +ffffffff836bc000 D mos_cd +ffffffff836bd000 D mue_cd +ffffffff836be000 D udav_cd +ffffffff836bf000 D upl_devs +ffffffff836bf008 D upl_cd +ffffffff836c0000 D ugl_devs +ffffffff836c0008 D ugl_cd +ffffffff836c1000 D url_cd +ffffffff836c2000 D ure_cd +ffffffff836c3000 D uaq_cd +ffffffff836c4000 D umodem_cd +ffffffff836c5000 D uftdi_cd +ffffffff836c6000 D uplcom_cd +ffffffff836c7000 D umct_cd +ffffffff836c8000 D uvscom_cd +ffffffff836c9000 D ubsa_cd +ffffffff836ca000 D ukspan_cd +ffffffff836cb000 D uslcom_cd +ffffffff836cc000 D uark_cd +ffffffff836cd000 D moscom_cd +ffffffff836ce000 D umcs_cd +ffffffff836cf000 D uscom_cd +ffffffff836d0000 D ucrcom_cd +ffffffff836d1000 D uxrcom_cd +ffffffff836d2000 D uipaq_cd +ffffffff836d3000 D umsm_cd +ffffffff836d4000 D uchcom_cd +ffffffff836d5000 D uticom_cd +ffffffff836d6000 D wi_func_usb +ffffffff836d6060 D wi_usb_cd +ffffffff836d7000 D atu_cd +ffffffff836d7020 D atu_devs +ffffffff836d7270 D atu_radfirm +ffffffff836d8000 D ural_cd +ffffffff836d9000 D rum_cd +ffffffff836da000 D run_cd +ffffffff836da020 D rt3070_freqs +ffffffff836db000 D mtw_cd +ffffffff836dc000 D zyd_cd +ffffffff836dd000 D upgt_cd +ffffffff836de000 D urtw_cd +ffffffff836df000 D urtwn_cd +ffffffff836e0000 D rsu_cd +ffffffff836e1000 D otus_cd +ffffffff836e1020 d AR_PLCP_HDR_INTR +ffffffff836e2000 D umb_xfer_tout +ffffffff836e2010 D umb_uuid_basic_connect +ffffffff836e2020 D umb_uuid_context_internet +ffffffff836e2030 D umb_uuid_qmi_mbim +ffffffff836e2040 D umb_cd +ffffffff836e2060 D umb_delay +ffffffff836e2070 D umb_qmi_alloc_cid +ffffffff836e2080 D umb_qmi_fcc_auth +ffffffff836e3000 D uath_cd +ffffffff836e4000 D uow_cd +ffffffff836e5000 D uberry_cd +ffffffff836e6000 D upd_cd +ffffffff836e6020 d upd_usage_roots +ffffffff836e60a0 d upd_usage_batdep +ffffffff836e7000 D uwacom_cd +ffffffff836e7020 d uwacom_attach.wacom_report_buf +ffffffff836e8000 D bwfm_usb_bus_ops +ffffffff836e9000 D umstc_cd +ffffffff836ea000 D uhidpp_cd +ffffffff836eb000 D ucc_cd +ffffffff836ec000 D iic_cd +ffffffff836ed000 D probe_addrs_sensor +ffffffff836ed008 D probe_addrs_eeprom +ffffffff836ee000 D lmtemp_cd +ffffffff836ef000 D lmn_worklist +ffffffff836ef240 D lmn_cd +ffffffff836f0000 D lmenv_cd +ffffffff836f1000 D maxtmp_cd +ffffffff836f2000 D adc_cd +ffffffff836f3000 D admtemp_cd +ffffffff836f4000 D admlc_cd +ffffffff836f5000 D admtm_cd +ffffffff836f6000 D admtmp_cd +ffffffff836f7000 D admtt_cd +ffffffff836f8000 D maxds_cd +ffffffff836f9000 D adt_chips +ffffffff836f9160 D worklist +ffffffff836f91a0 D adt_cd +ffffffff836fa000 D admcts_cd +ffffffff836fb000 D wbng_cd +ffffffff836fc000 D nvt_cd +ffffffff836fd000 D adl_worklist +ffffffff836fd138 D adl_cd +ffffffff836fe000 D andl_cd +ffffffff836ff000 D sdtemp_cd +ffffffff83700000 D lisa_cd +ffffffff83701000 D ihidev_cd +ffffffff83702000 D ikbd_cd +ffffffff83703000 D ims_cd +ffffffff83704000 D imt_cd +ffffffff83705000 D iatp_cd +ffffffff83706000 D ietp_cd +ffffffff83707000 D bgw_cd +ffffffff83708000 D icc_cd +ffffffff83709000 D gpio_cd +ffffffff8370a000 D acpi_cd +ffffffff8370a020 D acpi_pcidevs +ffffffff8370a030 D acpi_pcirootdevs +ffffffff8370a040 D acpi_taskq +ffffffff8370a050 d acpi_indicator.save_led_state +ffffffff8370a060 d acpi_getprop.prop_guid +ffffffff8370a070 d acpi_getpropint.prop_guid +ffffffff8370a080 D acpi_skip_hids +ffffffff8370a0f0 D acpi_isa_hids +ffffffff8370a130 D acpi_quiet_hids +ffffffff8370b000 D aml_intlen +ffffffff8370b010 D aml_table +ffffffff8370baf0 d osstring +ffffffff8370bb10 D aml_defobj +ffffffff8370bca0 D aml_valid_osi +ffffffff8370bd78 D acpi_max_osi +ffffffff8370bd80 D aml_regionspace +ffffffff8370d000 D acpitimer_cd +ffffffff8370d020 d acpi_timecounter +ffffffff8370e000 D acpiac_cd +ffffffff8370e020 D acpiac_hids +ffffffff8370f000 D acpibat_cd +ffffffff8370f020 D acpibat_hids +ffffffff83710000 D acpibtn_cd +ffffffff83710020 D acpibtn_hids +ffffffff83711000 D acpicmos_cd +ffffffff83711020 D acpicmos_hids +ffffffff83712000 D acpicpu_cd +ffffffff83712020 D acpicpu_hids +ffffffff83712030 d acpicpu_set_pdc.cpu_oscuuid +ffffffff83713000 D acpihpet_cd +ffffffff83713020 d hpet_timecounter +ffffffff83714000 D acpiec_cd +ffffffff83714020 D acpiec_hids +ffffffff83715000 D acpitz_cd +ffffffff83715020 D acpitz_perflevel +ffffffff83716000 D acpimadt_cd +ffffffff83717000 D acpimcfg_cd +ffffffff83718000 D acpiprt_map_list +ffffffff83718010 D acpiprt_cd +ffffffff83718030 D acpiprt_pri +ffffffff83719000 D acpidmar_force_cm +ffffffff83719008 D acpidmar_cd +ffffffff83719030 D vtd_faults +ffffffff8371a000 D acpidock_cd +ffffffff8371b000 D abl_cd +ffffffff8371b020 D abl_hids +ffffffff8371c000 D asmc_cd +ffffffff8371c020 D asmc_hids +ffffffff8371d000 D acpiasus_cd +ffffffff8371d020 D acpiasus_hids +ffffffff8371e000 D acpithinkpad_cd +ffffffff8371e020 D acpithinkpad_hids +ffffffff8371f000 D acpitoshiba_cd +ffffffff8371f020 D acpitoshiba_hids +ffffffff83720000 D acpisony_cd +ffffffff83721000 D acpivideo_cd +ffffffff83722000 D acpivout_cd +ffffffff83723000 D acpipwrres_cd +ffffffff83724000 D aibs_cd +ffffffff83724020 d aibs_hids +ffffffff83725000 D aplgpio_cd +ffffffff83725020 D aplgpio_hids +ffffffff83726000 D bytgpio_cd +ffffffff83726020 D bytgpio_hids +ffffffff83727000 D chvgpio_cd +ffffffff83727020 D chvgpio_hids +ffffffff83728000 D glkgpio_cd +ffffffff83728020 D glkgpio_hids +ffffffff83729000 D pchgpio_cd +ffffffff83729020 D pchgpio_hids +ffffffff83729080 D pchgpio_devices +ffffffff8372a000 D tipmic_cd +ffffffff8372a020 D tipmic_thermal_regmap +ffffffff8372a030 D tipmic_power_regmap +ffffffff8372b000 D ccpmic_cd +ffffffff8372b020 D ccpmic_thermal_regmap +ffffffff8372b023 D ccpmic_power_regmap +ffffffff8372c000 D com_hids +ffffffff8372d000 D sdhc_hids +ffffffff8372e000 D dwiic_hids +ffffffff8372e050 D ihidev_hids +ffffffff8372e070 D ietp_hids +ffffffff8372e220 D iatp_hids +ffffffff8372e240 d dwiic_acpi_found_ihidev.i2c_hid_guid +ffffffff8372f000 D acpicbkbd_cd +ffffffff8372f020 D acpicbkbd_hids +ffffffff83730000 D acpials_cd +ffffffff83730020 D acpials_hids +ffffffff83731000 D tpm_cd +ffffffff83731020 D tpm_hids +ffffffff83732000 D acpihve_cd +ffffffff83733000 D acpisbs_cd +ffffffff83733020 D acpisbs_hids +ffffffff83734000 D acpisurface_cd +ffffffff83734020 D acpisurface_hids +ffffffff83735000 D ipmi_acpi_hids +ffffffff83736000 D amdgpio_cd +ffffffff83736020 D amdgpio_hids +ffffffff83737000 D acpihid_cd +ffffffff83737020 D acpihid_hids +ffffffff83737030 d acpihid_guid +ffffffff83738000 d iosf_hids +ffffffff83739000 D acpipci_cd +ffffffff83739020 D acpipci_hids +ffffffff83739040 d acpipci_osc.uuid +ffffffff8373a000 D efi_cd +ffffffff8373b000 D vmm_cd +ffffffff8373c000 D vmm_hv_signature +ffffffff8373d000 D sdmmc_cd +ffffffff8373e000 D bwfm_sdio_bus_ops +ffffffff8373e028 D bwfm_sdio_buscore_ops +ffffffff8373f000 D onewire_cd +ffffffff83740000 D owid_cd +ffffffff83741000 D owsbm_cd +ffffffff83742000 D owtemp_cd +ffffffff83743000 D owctr_cd +ffffffff83744000 D hz +ffffffff83744004 D tick +ffffffff83744008 D tick_nsec +ffffffff8374400c D initialvnodes +ffffffff83744010 D maxprocess +ffffffff83744014 D maxthread +ffffffff83744018 D maxfiles +ffffffff83744020 D nmbclust +ffffffff83744028 D bufcachepercent +ffffffff8374402c D fscale +ffffffff83744030 D shminfo +ffffffff83744044 D seminfo +ffffffff83745000 D extraloc +ffffffff83745100 D rextraloc +ffffffff83745110 D locnames +ffffffff837451f0 D locnamp +ffffffff83745410 D pv_size +ffffffff83745420 D pv +ffffffff83745640 d loc +ffffffff83745ad0 D cfdata +ffffffff8374c6a8 D cfroots +ffffffff8374c6b4 D cfroots_size +ffffffff8374c6c0 D pdevnames +ffffffff8374c828 D pdevnames_size +ffffffff8374c830 D pdevinit +ffffffff8374d000 D rootdev +ffffffff8374d004 D dumpdev +ffffffff8374d010 D swdevt +ffffffff8374e000 A __kudata_start +ffffffff8374e000 D tlb_shoot_first_pcid +ffffffff8374e008 D tlb_shoot_addr1 +ffffffff8374e010 D tlb_shoot_addr2 +ffffffff8374e018 D tlb_shoot_wait +ffffffff8374f000 A __kudata_end +ffffffff8374f000 C _edata +ffffffff8374f000 b drm_minors_idr +ffffffff8374f008 B drm_refcnt +ffffffff83750000 B vga_console_screen +ffffffff83750070 B vga_console_attached +ffffffff83750078 B vga_console_vc +ffffffff83750488 B vgaconsole +ffffffff8375048c B vga_console_type +ffffffff83751000 b wdc_alloc_queue.inited +ffffffff83751008 B wdc_xfer_pool +ffffffff837511b0 B wdc_xfer_iopool +ffffffff83752000 B aic_debug +ffffffff83753000 B gdt_cnt +ffffffff83753004 B gdt_polling +ffffffff83753005 B gdt_from_wait +ffffffff83753008 b gdt_exec_ccb.__level +ffffffff8375300c B gdt_wait_index +ffffffff83753010 B gdt_wait_gdt +ffffffff83754000 B sili_error_pmp_ports +ffffffff83755000 B ncr53c9x_debug +ffffffff83755008 b ecb_iopool +ffffffff83755048 b ecb_pool_initialized +ffffffff83755050 b ecb_pool +ffffffff837551f8 B sdebug +ffffffff83756000 B epic_copy_small +ffffffff83757000 B comconsaddr +ffffffff83757008 B comconsiot +ffffffff83757010 B comconsioh +ffffffff83757018 B comconsfreq +ffffffff8375701c B comcons_reg_width +ffffffff83757020 B commajor +ffffffff83757024 B comconsunit +ffffffff83757028 B comcons_reg_shift +ffffffff8375702c B comconsattached +ffffffff83758000 B pckbc_console +ffffffff83758004 B pckbc_console_attached +ffffffff83758008 B pckbc_consdata +ffffffff837580e0 b pckbc_cons_slotdata +ffffffff83759000 b cy_poll.counter +ffffffff8375a000 B atw_xindiv2 +ffffffff8375b000 B rtw_rfprog_fallback +ffffffff8375b004 B rtw_do_chip_reset +ffffffff8375c000 b malo_cmd_string.cmd_buf +ffffffff8375d000 b iosf_mbi +ffffffff8375e000 B uhcixfer +ffffffff8375f000 B ohcixfer +ffffffff8375f008 b ohci_intr.ohci_intr_tv +ffffffff83760000 B ehcixfer +ffffffff83761000 B xhcixfer +ffffffff83762000 B ccp_softc +ffffffff83763000 B ipmi_enabled +ffffffff83763008 B ipmi_sensor_list +ffffffff83764000 B mpath +ffffffff83765000 B sr_bootuuid +ffffffff83765010 B sr_bootkey +ffffffff83765030 B softraid0 +ffffffff83765038 B sr_hotplug_callbacks +ffffffff83766000 B gf_pow +ffffffff83766300 B gf_map +ffffffff83766b00 B gf_log +ffffffff83767000 b ksym_syms +ffffffff83767008 b ksym_syms_size +ffffffff83768000 B kstat_version +ffffffff83768008 B kstat_id_tree +ffffffff83768010 B kstat_pv_tree +ffffffff83768018 B kstat_nm_tree +ffffffff83768020 b kstat_init.initialized +ffffffff83768028 B kstat_pool +ffffffff83769000 B stat_fbufs_in +ffffffff83769004 B stat_fbufs_wait +ffffffff83769008 B stat_opened_fusedev +ffffffff83769010 B fuse_d_list +ffffffff8376a000 B fusefs_fbuf_pool +ffffffff8376b000 B pf_state_pl +ffffffff8376b1a8 B pf_src_tree_pl +ffffffff8376b350 B pf_pktdelay_pl +ffffffff8376b4f8 B pf_status +ffffffff8376b700 B tree_id +ffffffff8376b708 B tree_src_tracking +ffffffff8376b710 B pf_sn_item_pl +ffffffff8376b8b8 B pf_statetbl +ffffffff8376b8c0 B pf_state_item_pl +ffffffff8376ba68 B pf_state_key_pl +ffffffff8376bc10 B pf_purge_states_limit +ffffffff8376bc18 B pf_rule_item_pl +ffffffff8376bdc0 b pf_purge_expired_states.cur +ffffffff8376bdc8 B pf_tcp_secret_init +ffffffff8376bdd0 B pf_tcp_secret +ffffffff8376bde0 B pf_tcp_secret_ctx +ffffffff8376beb0 B pf_tcp_iss_off +ffffffff8376bec0 B pf_queues +ffffffff8376bee0 B pf_queues_active +ffffffff8376bee8 B pf_queues_inactive +ffffffff8376bef0 B pf_rule_pl +ffffffff8376c098 B pf_queue_pl +ffffffff8376d000 B pf_frent_pl +ffffffff8376d1a8 B pf_frnode_pl +ffffffff8376d350 B pf_frag_pl +ffffffff8376d4f8 B pf_state_scrub_pl +ffffffff8376d6a0 B pf_fragqueue +ffffffff8376d6b0 B pf_frag_mtx +ffffffff8376d6c0 B pf_frnode_tree +ffffffff8376e000 B pf_anchors +ffffffff8376e008 B pf_main_anchor +ffffffff8376e510 B pf_anchor_pl +ffffffff8376f000 B pf_ioctl_trans +ffffffff8376f008 B pf_default_rule +ffffffff8376f548 B pf_tag_pl +ffffffff8376f6f0 B pf_default_rule_new +ffffffff8376fc30 B pf_anchor_stack +ffffffff8376fc38 B pf_trans_set +ffffffff8376fc60 B pf_tcount +ffffffff83771000 B pfr_ktable_pl +ffffffff837711b0 B pfr_kentry_pl +ffffffff837716a8 B pfr_kcounters_pl +ffffffff83771850 B pfr_ffaddr +ffffffff83771860 B pfr_nulltable +ffffffff83771c88 B pfr_ktables +ffffffff83771c90 B pfr_ktable_cnt +ffffffff83771c94 B pfr_mask +ffffffff83772000 B pf_osfp_list +ffffffff83772008 B pf_osfp_entry_pl +ffffffff837721b0 B pf_osfp_pl +ffffffff83773000 B pfi_all +ffffffff83773008 B pfi_addr_pl +ffffffff837731b0 B pfi_buffer_max +ffffffff837731b8 B pfi_buffer +ffffffff837731c0 B pfi_ifs +ffffffff837731c8 B pfi_buffer_cnt +ffffffff83774000 b pf_syncookie_status +ffffffff83775000 B hfsc_class_pl +ffffffff837751a8 B hfsc_internal_sc_pl +ffffffff83776000 B pflog_ifs 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wskbd_get_backlight +ffffffff83a81058 B wskbd_set_backlight +ffffffff83a81060 b wskbd_cngetc.num +ffffffff83a81064 b wskbd_cngetc.pos +ffffffff83a82000 b compose_tab_inorder +ffffffff83a83000 B nwsmux +ffffffff83a83008 B wsmuxdevs +ffffffff83a84000 B wsemul_vt100_console_emuldata +ffffffff83a85000 B pckbd_consdata +ffffffff83a85038 B pckbd_bell_fn +ffffffff83a85040 B pckbd_bell_fn_arg +ffffffff83a86000 b wscninit.initted +ffffffff83a87000 B pctr_isamd +ffffffff83a87004 B pctr_isintel +ffffffff83a87008 B pctr_intel_cap +ffffffff83a87010 B pctr_fn +ffffffff83a88000 b nvram_initialized +ffffffff83a89000 B hidkbd_is_console +ffffffff83a89008 B hidkbd_bell_fn +ffffffff83a89010 B hidkbd_bell_fn_arg +ffffffff83a8a000 B usb_task_thread_proc +ffffffff83a8a008 B usb_abort_task_thread_proc +ffffffff83a8a010 b usb_nbuses +ffffffff83a8a018 B usbpalock +ffffffff83a8a028 B usb_abort_tasks +ffffffff83a8a038 B usb_explore_tasks +ffffffff83a8a048 B usb_generic_tasks +ffffffff83a8a058 b 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acpiec_wait.acpiecnowait +ffffffff83a98000 B acpitz_cpu_setperf +ffffffff83a99000 B acpimadt_busses +ffffffff83a9c000 B acpimadt_isa_bus +ffffffff83a9c030 b lapic_map +ffffffff83a9d000 B acpidmar_ddb +ffffffff83a9d010 b dmar_bdf.bdf +ffffffff83a9d030 B acpidmar_sc +ffffffff83a9d038 B domain_map_page +ffffffff83a9d040 b dom_bdf.mmm +ffffffff83a9d070 b iommu_init.niommu +ffffffff83a9d078 b acpidmar_pci_attach.dom +ffffffff83a9d080 b sid_flag +ffffffff83add080 b ivhd_showpage.show +ffffffff83add084 b ivhd_iommu_init.niommu +ffffffff83add088 b acpidmar_intr.ofe.0 +ffffffff83add090 b acpidmar_intr.ofe.1 +ffffffff83ade000 b dwiic_i2c_intr_string.irqstr +ffffffff83adf000 B acpihve_attached +ffffffff83ae0000 B efi_get_variable +ffffffff83ae0008 B efi_get_next_variable_name +ffffffff83ae0010 B efi_set_variable +ffffffff83ae1000 B efi_jmpbuf +ffffffff83ae2000 B vm_pool +ffffffff83ae21a8 B vcpu_pool +ffffffff83ae2350 B vmm_softc +ffffffff83ae3000 B l1tf_flush_region +ffffffff83ae4000 B sdmmc_verbose +ffffffff83ae5000 B utc_offset +ffffffff83ae5008 B bufpages +ffffffff83ae5010 B utsname +ffffffff83ae6000 B mountroot +ffffffff83ae7000 B __kernel_bss_end ffffffff83c00000 B _end ffffffff83c00000 B end