--- 7.5/2024-07-01T06:17:03Z/2024-06-30T00:00:00Z/nm-bsd-ot14.txt Thu Jul 4 22:54:42 2024 +++ 7.5/2024-07-01T06:17:03Z/2024-07-01T00:00:00Z/nm-bsd-ot14.txt Fri Jul 5 01:44:50 2024 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001418f A acpi_pdirpa 01000000 A __kernel_phys_base -0281c000 T __kernel_kutext_phys -0281f000 C __kernel_cptext_phys -02820000 C __kernel_rodata_phys -03123000 R __kernel_kutext_page_phys -03125000 C __kernel_randomdata_phys -033e0000 R __kernel_data_phys -0373c000 D __kernel_kudata_phys -0373d000 C __kernel_bss_phys +02825000 T __kernel_kutext_phys +02828000 C __kernel_cptext_phys +02829000 C __kernel_rodata_phys +03133000 R __kernel_kutext_page_phys +03135000 C __kernel_randomdata_phys +033f0000 R __kernel_data_phys +0374c000 D __kernel_kudata_phys +0374d000 C __kernel_bss_phys 03c00000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -972,11 +972,11 @@ ffffffff81086cd0 T nvme_intr ffffffff81086d50 T nvme_intr_intx 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psp_v13_0_4_bootloader_load_soc_drv -ffffffff82081170 t psp_v13_0_4_bootloader_load_intf_drv -ffffffff82081190 t psp_v13_0_4_bootloader_load_dbg_drv -ffffffff820811b0 t psp_v13_0_4_bootloader_load_sos -ffffffff82081620 t psp_v13_0_4_ring_create -ffffffff82081eb0 t psp_v13_0_4_ring_stop -ffffffff820823c0 t psp_v13_0_4_ring_destroy -ffffffff82082450 t psp_v13_0_4_ring_get_wptr -ffffffff820824c0 t psp_v13_0_4_ring_set_wptr -ffffffff820825e0 t psp_v13_0_4_bootloader_load_component -ffffffff820827f0 t psp_v13_0_4_wait_for_bootloader -ffffffff82083000 T psp_v3_1_set_psp_funcs -ffffffff82083030 t psp_v3_1_init_microcode -ffffffff820830f0 t psp_v3_1_bootloader_load_sysdrv -ffffffff82083510 t psp_v3_1_bootloader_load_sos -ffffffff82083980 t psp_v3_1_ring_create -ffffffff82084840 t psp_v3_1_ring_stop -ffffffff82084b20 t psp_v3_1_ring_destroy -ffffffff82084bb0 t psp_v3_1_smu_reload_quirk -ffffffff82084c00 t psp_v3_1_mode1_reset -ffffffff82084d30 t psp_v3_1_ring_get_wptr -ffffffff82084d80 t psp_v3_1_ring_set_wptr -ffffffff82085000 t sdma_v2_4_early_init -ffffffff820850f0 t sdma_v2_4_sw_init -ffffffff82085520 t sdma_v2_4_sw_fini -ffffffff820855f0 t sdma_v2_4_hw_init -ffffffff82085aa0 t sdma_v2_4_hw_fini -ffffffff82085af0 t sdma_v2_4_suspend -ffffffff82085b40 t sdma_v2_4_resume -ffffffff82085b50 t sdma_v2_4_is_idle -ffffffff82085ba0 t sdma_v2_4_wait_for_idle -ffffffff82085c50 t sdma_v2_4_soft_reset -ffffffff82085e00 t sdma_v2_4_set_clockgating_state -ffffffff82085e30 t sdma_v2_4_set_powergating_state -ffffffff82085e60 t sdma_v2_4_ring_get_rptr -ffffffff82085ea0 t sdma_v2_4_ring_get_wptr -ffffffff82085f00 t sdma_v2_4_ring_set_wptr -ffffffff82085f40 t sdma_v2_4_ring_emit_ib -ffffffff82086220 t sdma_v2_4_ring_emit_fence -ffffffff82086670 t sdma_v2_4_ring_emit_pipeline_sync -ffffffff82086920 t sdma_v2_4_ring_emit_vm_flush -ffffffff82086bd0 t sdma_v2_4_ring_emit_hdp_flush -ffffffff82086e80 t sdma_v2_4_ring_test_ring -ffffffff820871b0 t sdma_v2_4_ring_test_ib -ffffffff820873c0 t sdma_v2_4_ring_insert_nop -ffffffff82087500 t sdma_v2_4_ring_pad_ib -ffffffff82087630 t sdma_v2_4_ring_emit_wreg -ffffffff82087790 t sdma_v2_4_emit_copy_buffer -ffffffff82087850 t sdma_v2_4_emit_fill_buffer -ffffffff820878e0 t sdma_v2_4_vm_copy_pte -ffffffff820879a0 t sdma_v2_4_vm_write_pte -ffffffff82087a70 t sdma_v2_4_vm_set_pte_pde -ffffffff82087b70 t sdma_v2_4_set_trap_irq_state -ffffffff82087c60 t sdma_v2_4_process_trap_irq -ffffffff82087d00 t sdma_v2_4_process_illegal_inst_irq -ffffffff82087d80 t sdma_v2_4_enable -ffffffff82088000 t sdma_v3_0_early_init -ffffffff82088100 t sdma_v3_0_sw_init -ffffffff82088530 t sdma_v3_0_sw_fini -ffffffff82088600 t sdma_v3_0_hw_init -ffffffff82088770 t sdma_v3_0_hw_fini -ffffffff820887d0 t sdma_v3_0_suspend -ffffffff82088830 t sdma_v3_0_resume -ffffffff82088840 t sdma_v3_0_is_idle -ffffffff82088890 t sdma_v3_0_wait_for_idle -ffffffff82088940 t sdma_v3_0_check_soft_reset -ffffffff820889a0 t sdma_v3_0_pre_soft_reset -ffffffff82088a00 t sdma_v3_0_soft_reset -ffffffff82088b00 t sdma_v3_0_post_soft_reset -ffffffff82088b50 t sdma_v3_0_set_clockgating_state -ffffffff82088e00 t sdma_v3_0_set_powergating_state -ffffffff82088e30 t sdma_v3_0_get_clockgating_state -ffffffff82088ed0 t sdma_v3_0_ring_get_rptr -ffffffff82088f10 t sdma_v3_0_ring_get_wptr -ffffffff82088f90 t sdma_v3_0_ring_set_wptr -ffffffff82089040 t sdma_v3_0_ring_emit_ib -ffffffff82089320 t sdma_v3_0_ring_emit_fence -ffffffff82089770 t sdma_v3_0_ring_emit_pipeline_sync -ffffffff82089a20 t sdma_v3_0_ring_emit_vm_flush -ffffffff82089cd0 t sdma_v3_0_ring_emit_hdp_flush -ffffffff82089f80 t sdma_v3_0_ring_test_ring -ffffffff8208a2b0 t sdma_v3_0_ring_test_ib -ffffffff8208a4c0 t sdma_v3_0_ring_insert_nop -ffffffff8208a600 t sdma_v3_0_ring_pad_ib -ffffffff8208a730 t sdma_v3_0_ring_emit_wreg -ffffffff8208a890 t sdma_v3_0_emit_copy_buffer -ffffffff8208a950 t sdma_v3_0_emit_fill_buffer -ffffffff8208a9e0 t sdma_v3_0_vm_copy_pte -ffffffff8208aaa0 t sdma_v3_0_vm_write_pte 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sdma_v4_0_reset_ras_error_count -ffffffff82090c20 t sdma_v4_0_ring_get_rptr -ffffffff82090c80 t sdma_v4_0_ring_get_wptr -ffffffff82090e90 t sdma_v4_0_ring_set_wptr -ffffffff82091140 t sdma_v4_0_ring_emit_ib -ffffffff82091420 t sdma_v4_0_ring_emit_fence -ffffffff82091890 t sdma_v4_0_ring_emit_pipeline_sync -ffffffff820918f0 t sdma_v4_0_ring_emit_vm_flush -ffffffff82091910 t sdma_v4_0_ring_emit_hdp_flush -ffffffff820919d0 t sdma_v4_0_ring_test_ring -ffffffff82091d00 t sdma_v4_0_ring_test_ib -ffffffff82091f10 t sdma_v4_0_ring_insert_nop -ffffffff82092050 t sdma_v4_0_ring_pad_ib -ffffffff82092180 t sdma_v4_0_ring_emit_wreg -ffffffff820922e0 t sdma_v4_0_ring_emit_reg_wait -ffffffff82092330 t sdma_v4_0_wait_reg_mem -ffffffff82092680 t sdma_v4_0_page_ring_get_wptr -ffffffff82092840 t sdma_v4_0_page_ring_set_wptr -ffffffff82092a10 t sdma_v4_0_emit_copy_buffer -ffffffff82092ad0 t sdma_v4_0_emit_fill_buffer -ffffffff82092b60 t sdma_v4_0_vm_copy_pte -ffffffff82092c20 t sdma_v4_0_vm_write_pte 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sdma_v4_4_2_ring_insert_nop -ffffffff820988b0 t sdma_v4_4_2_ring_pad_ib -ffffffff820989e0 t sdma_v4_4_2_ring_emit_wreg -ffffffff82098b40 t sdma_v4_4_2_ring_emit_reg_wait -ffffffff82098b90 t sdma_v4_4_2_wait_reg_mem -ffffffff82098ee0 t sdma_v4_4_2_page_ring_get_wptr -ffffffff82099000 t sdma_v4_4_2_page_ring_set_wptr -ffffffff82099130 t sdma_v4_4_2_emit_copy_buffer -ffffffff820991f0 t sdma_v4_4_2_emit_fill_buffer -ffffffff82099280 t sdma_v4_4_2_vm_copy_pte -ffffffff82099340 t sdma_v4_4_2_vm_write_pte -ffffffff82099410 t sdma_v4_4_2_vm_set_pte_pde -ffffffff82099510 t sdma_v4_4_2_set_trap_irq_state -ffffffff82099610 t sdma_v4_4_2_process_trap_irq -ffffffff82099740 t sdma_v4_4_2_process_illegal_inst_irq -ffffffff820997e0 t sdma_v4_4_2_set_ecc_irq_state -ffffffff820998f0 t sdma_v4_4_2_process_vm_hole_irq -ffffffff820999e0 t sdma_v4_4_2_process_doorbell_invalid_irq -ffffffff82099ad0 t sdma_v4_4_2_process_pool_timeout_irq -ffffffff82099bc0 t sdma_v4_4_2_process_srbm_write_irq -ffffffff82099cb0 t sdma_v4_4_2_query_ras_error_count -ffffffff82099e30 t sdma_v4_4_2_reset_ras_error_count -ffffffff82099fa0 t sdma_v4_4_2_inst_init_golden_registers -ffffffff8209a170 t sdma_v4_4_2_inst_start -ffffffff8209b9a0 t sdma_v4_4_2_inst_ctx_switch_enable -ffffffff8209bcf0 t sdma_v4_4_2_inst_enable -ffffffff8209d000 t sdma_v5_0_early_init -ffffffff8209d130 t sdma_v5_0_sw_init -ffffffff8209d350 t sdma_v5_0_sw_fini -ffffffff8209d3f0 t sdma_v5_0_hw_init -ffffffff8209e8c0 t sdma_v5_0_hw_fini -ffffffff8209e930 t sdma_v5_0_suspend -ffffffff8209e9a0 t sdma_v5_0_resume -ffffffff8209e9b0 t sdma_v5_0_is_idle -ffffffff8209ea50 t sdma_v5_0_wait_for_idle -ffffffff8209eb30 t sdma_v5_0_soft_reset -ffffffff8209eb60 t sdma_v5_0_set_clockgating_state -ffffffff8209ed80 t sdma_v5_0_set_powergating_state -ffffffff8209edb0 t sdma_v5_0_get_clockgating_state -ffffffff8209ee60 t sdma_v5_0_ring_get_rptr -ffffffff8209eec0 t sdma_v5_0_ring_get_wptr -ffffffff8209f080 t sdma_v5_0_ring_set_wptr -ffffffff8209f430 t sdma_v5_0_ring_emit_ib -ffffffff8209f730 t sdma_v5_0_ring_emit_fence -ffffffff8209fbe0 t sdma_v5_0_ring_emit_pipeline_sync -ffffffff8209fe90 t sdma_v5_0_ring_emit_vm_flush -ffffffff8209feb0 t sdma_v5_0_ring_emit_hdp_flush -ffffffff820a0180 t sdma_v5_0_ring_test_ring -ffffffff820a05b0 t sdma_v5_0_ring_test_ib -ffffffff820a0940 t sdma_v5_0_ring_insert_nop -ffffffff820a0a80 t sdma_v5_0_ring_pad_ib -ffffffff820a0bb0 t sdma_v5_0_ring_init_cond_exec -ffffffff820a0e00 t sdma_v5_0_ring_patch_cond_exec -ffffffff820a0ec0 t sdma_v5_0_ring_emit_wreg -ffffffff820a1020 t sdma_v5_0_ring_emit_reg_wait -ffffffff820a12c0 t sdma_v5_0_ring_emit_reg_write_reg_wait -ffffffff820a1350 t sdma_v5_0_ring_preempt_ib -ffffffff820a14e0 t sdma_v5_0_ring_emit_mem_sync -ffffffff820a1710 t sdma_v5_0_emit_copy_buffer -ffffffff820a17d0 t sdma_v5_0_emit_fill_buffer -ffffffff820a1860 t sdma_v5_0_vm_copy_pte -ffffffff820a1920 t sdma_v5_0_vm_write_pte -ffffffff820a19f0 t sdma_v5_0_vm_set_pte_pde -ffffffff820a1af0 t sdma_v5_0_set_trap_irq_state -ffffffff820a1b90 t sdma_v5_0_process_trap_irq -ffffffff820a1cd0 t sdma_v5_0_process_illegal_inst_irq -ffffffff820a1d00 t sdma_v5_0_mqd_init -ffffffff820a1df0 t sdma_v5_0_ctx_switch_enable -ffffffff820a2170 t sdma_v5_0_enable -ffffffff820a3000 t sdma_v5_2_early_init -ffffffff820a3130 t sdma_v5_2_sw_init -ffffffff820a33f0 t sdma_v5_2_sw_fini -ffffffff820a3490 t sdma_v5_2_hw_init -ffffffff820a52c0 t sdma_v5_2_hw_fini -ffffffff820a5330 t sdma_v5_2_suspend -ffffffff820a53a0 t sdma_v5_2_resume -ffffffff820a53b0 t sdma_v5_2_is_idle -ffffffff820a5470 t sdma_v5_2_wait_for_idle -ffffffff820a55a0 t sdma_v5_2_soft_reset -ffffffff820a58c0 t sdma_v5_2_set_clockgating_state -ffffffff820a5c60 t sdma_v5_2_set_powergating_state -ffffffff820a5c90 t sdma_v5_2_get_clockgating_state -ffffffff820a5d40 t sdma_v5_2_ring_get_rptr -ffffffff820a5da0 t sdma_v5_2_ring_get_wptr -ffffffff820a5ef0 t sdma_v5_2_ring_set_wptr -ffffffff820a60d0 t sdma_v5_2_ring_emit_ib -ffffffff820a63d0 t sdma_v5_2_ring_emit_fence -ffffffff820a6880 t sdma_v5_2_ring_emit_pipeline_sync -ffffffff820a6b30 t sdma_v5_2_ring_emit_vm_flush -ffffffff820a6b50 t sdma_v5_2_ring_emit_hdp_flush -ffffffff820a6e50 t sdma_v5_2_ring_test_ring -ffffffff820a7280 t sdma_v5_2_ring_test_ib -ffffffff820a7610 t sdma_v5_2_ring_insert_nop -ffffffff820a7750 t sdma_v5_2_ring_pad_ib -ffffffff820a7880 t sdma_v5_2_ring_init_cond_exec -ffffffff820a7ad0 t sdma_v5_2_ring_patch_cond_exec -ffffffff820a7b90 t sdma_v5_2_ring_begin_use -ffffffff820a7bb0 t sdma_v5_2_ring_end_use -ffffffff820a7bd0 t sdma_v5_2_ring_emit_wreg -ffffffff820a7d30 t sdma_v5_2_ring_emit_reg_wait -ffffffff820a7fd0 t sdma_v5_2_ring_emit_reg_write_reg_wait -ffffffff820a8060 t sdma_v5_2_ring_preempt_ib -ffffffff820a8220 t sdma_v5_2_ring_emit_mem_sync -ffffffff820a8450 t sdma_v5_2_emit_copy_buffer -ffffffff820a8510 t sdma_v5_2_emit_fill_buffer -ffffffff820a85a0 t sdma_v5_2_vm_copy_pte -ffffffff820a8660 t sdma_v5_2_vm_write_pte -ffffffff820a8730 t sdma_v5_2_vm_set_pte_pde -ffffffff820a8830 t sdma_v5_2_set_trap_irq_state -ffffffff820a88f0 t sdma_v5_2_process_trap_irq -ffffffff820a8a60 t sdma_v5_2_process_illegal_inst_irq -ffffffff820a8a90 t sdma_v5_2_mqd_init -ffffffff820a8b80 t sdma_v5_2_ctx_switch_enable -ffffffff820a8fd0 t sdma_v5_2_enable -ffffffff820aa000 t sdma_v6_0_early_init -ffffffff820aa120 t sdma_v6_0_sw_init -ffffffff820aa330 t sdma_v6_0_sw_fini -ffffffff820aa3d0 t sdma_v6_0_hw_init -ffffffff820aa3e0 t sdma_v6_0_hw_fini -ffffffff820aa4d0 t sdma_v6_0_suspend -ffffffff820aa510 t sdma_v6_0_resume -ffffffff820aa520 t sdma_v6_0_is_idle -ffffffff820aa5c0 t sdma_v6_0_wait_for_idle -ffffffff820aa6a0 t sdma_v6_0_check_soft_reset -ffffffff820aa770 t sdma_v6_0_soft_reset -ffffffff820aacc0 t sdma_v6_0_set_clockgating_state -ffffffff820aacf0 t sdma_v6_0_set_powergating_state -ffffffff820aad20 t sdma_v6_0_get_clockgating_state -ffffffff820aad50 t sdma_v6_0_ring_get_rptr -ffffffff820aadb0 t sdma_v6_0_ring_get_wptr -ffffffff820aae30 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sdma_v6_0_vm_set_pte_pde -ffffffff820adb20 t sdma_v6_0_set_trap_irq_state -ffffffff820adbc0 t sdma_v6_0_process_trap_irq -ffffffff820add20 t sdma_v6_0_process_illegal_inst_irq -ffffffff820add50 t sdma_v6_0_mqd_init -ffffffff820ade80 t sdma_v6_0_start -ffffffff820ae1e0 t sdma_v6_0_enable -ffffffff820ae380 t sdma_v6_0_gfx_resume -ffffffff820af5c0 t sdma_v6_0_gfx_stop -ffffffff820b0000 T sienna_cichlid_reset_init -ffffffff820b00e0 t sienna_cichlid_async_reset -ffffffff820b0140 t sienna_cichlid_get_reset_handler -ffffffff820b01d0 T sienna_cichlid_reset_fini -ffffffff820b0230 t sienna_cichlid_mode2_prepare_hwcontext -ffffffff820b03a0 t sienna_cichlid_mode2_perform_reset -ffffffff820b0430 t sienna_cichlid_mode2_restore_hwcontext -ffffffff820b07a0 t sienna_cichlid_mode2_reset -ffffffff820b1000 T smu_v11_0_i2c_control_init -ffffffff820b10e0 T smu_v11_0_i2c_control_fini -ffffffff820b1120 t smu_v11_0_i2c_xfer -ffffffff820b2490 t smu_v11_0_i2c_func -ffffffff820b24c0 t smu_v11_0_i2c_enable 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smuio_v13_0_get_rom_index_offset -ffffffff820b6040 t smuio_v13_0_get_rom_data_offset -ffffffff820b6080 t smuio_v13_0_update_rom_clock_gating -ffffffff820b61e0 t smuio_v13_0_get_clock_gating_state -ffffffff820b6290 t smuio_v13_0_get_die_id -ffffffff820b6320 t smuio_v13_0_get_socket_id -ffffffff820b63c0 t smuio_v13_0_is_host_gpu_xgmi_supported -ffffffff820b7000 t smuio_v13_0_3_get_die_id -ffffffff820b70a0 t smuio_v13_0_3_get_socket_id -ffffffff820b7140 t smuio_v13_0_3_get_pkg_type -ffffffff820b8000 t smuio_v13_0_6_get_rom_index_offset -ffffffff820b8040 t smuio_v13_0_6_get_rom_data_offset -ffffffff820b9000 t smuio_v9_0_get_rom_index_offset -ffffffff820b9040 t smuio_v9_0_get_rom_data_offset -ffffffff820b9080 t smuio_v9_0_update_rom_clock_gating -ffffffff820b91e0 t smuio_v9_0_get_clock_gating_state -ffffffff820ba000 T soc15_grbm_select -ffffffff820ba090 T soc15_program_register_sequence -ffffffff820ba2b0 T soc15_set_virt_ops -ffffffff820ba320 t soc15_common_early_init -ffffffff820ba750 t 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soc21_common_wait_for_idle -ffffffff820bd840 t soc21_common_soft_reset -ffffffff820bd870 t soc21_common_set_clockgating_state -ffffffff820bd930 t soc21_common_set_powergating_state -ffffffff820bd9a0 t soc21_common_get_clockgating_state -ffffffff820bd9f0 t soc21_didt_rreg -ffffffff820bdab0 t soc21_didt_wreg -ffffffff820bdb50 t soc21_read_disabled_bios -ffffffff820bdb80 t soc21_read_register -ffffffff820bdc80 t soc21_asic_reset -ffffffff820bdd60 t soc21_asic_reset_method -ffffffff820bde30 t soc21_get_xclk -ffffffff820bde60 t soc21_set_uvd_clocks -ffffffff820bde90 t soc21_set_vce_clocks -ffffffff820bdec0 t soc21_get_config_memsize -ffffffff820bdee0 t soc21_need_full_reset -ffffffff820bdf10 t soc21_init_doorbell_index -ffffffff820be030 t soc21_need_reset_on_init -ffffffff820be0e0 t soc21_pre_asic_init -ffffffff820be110 t soc21_update_umd_stable_pstate -ffffffff820be190 t soc21_query_video_codecs -ffffffff820bf000 t tonga_ih_early_init -ffffffff820bf050 t tonga_ih_sw_init -ffffffff820bf0e0 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umc_v8_10_convert_error_address -ffffffff820c35e0 t umc_v8_10_err_cnt_init_per_channel -ffffffff820c36b0 t umc_v8_10_ecc_info_query_ecc_error_count -ffffffff820c37a0 t umc_v8_10_ecc_info_query_error_address -ffffffff820c4000 t umc_v8_7_query_ras_error_count -ffffffff820c4370 t umc_v8_7_query_ras_error_address -ffffffff820c4540 t umc_v8_7_err_cnt_init -ffffffff820c46d0 t umc_v8_7_ecc_info_query_ras_error_count -ffffffff820c4800 t umc_v8_7_ecc_info_query_ras_error_address -ffffffff820c5000 t uvd_v5_0_early_init -ffffffff820c5050 t uvd_v5_0_sw_init -ffffffff820c5170 t uvd_v5_0_sw_fini -ffffffff820c51d0 t uvd_v5_0_hw_init -ffffffff820c5780 t uvd_v5_0_hw_fini -ffffffff820c5810 t uvd_v5_0_suspend -ffffffff820c5950 t uvd_v5_0_resume -ffffffff820c59b0 t uvd_v5_0_is_idle -ffffffff820c5a00 t uvd_v5_0_wait_for_idle -ffffffff820c5a90 t uvd_v5_0_soft_reset -ffffffff820c5b80 t uvd_v5_0_set_clockgating_state -ffffffff820c5d80 t uvd_v5_0_set_powergating_state -ffffffff820c5dd0 t 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uvd_v6_0_post_soft_reset -ffffffff820c9150 t uvd_v6_0_set_clockgating_state -ffffffff820c9340 t uvd_v6_0_set_powergating_state -ffffffff820c93c0 t uvd_v6_0_get_clockgating_state -ffffffff820c9470 t uvd_v6_0_ring_get_rptr -ffffffff820c94c0 t uvd_v6_0_ring_get_wptr -ffffffff820c9510 t uvd_v6_0_ring_set_wptr -ffffffff820c9540 t uvd_v6_0_ring_emit_ib -ffffffff820c98e0 t uvd_v6_0_ring_emit_fence -ffffffff820c9f00 t uvd_v6_0_ring_emit_pipeline_sync -ffffffff820ca340 t uvd_v6_0_ring_emit_vm_flush -ffffffff820ca6e0 t uvd_v6_0_ring_emit_hdp_flush -ffffffff820ca710 t uvd_v6_0_ring_test_ring -ffffffff820ca8e0 t uvd_v6_0_ring_insert_nop -ffffffff820caa40 t uvd_v6_0_ring_emit_wreg -ffffffff820cacf0 t uvd_v6_0_enc_ring_get_rptr -ffffffff820cad50 t uvd_v6_0_enc_ring_get_wptr -ffffffff820cadb0 t uvd_v6_0_enc_ring_set_wptr -ffffffff820cadf0 t uvd_v6_0_enc_ring_emit_ib -ffffffff820cb060 t uvd_v6_0_enc_ring_emit_fence -ffffffff820cb2c0 t uvd_v6_0_enc_ring_emit_pipeline_sync -ffffffff820cb490 t uvd_v6_0_enc_ring_emit_vm_flush -ffffffff820cb6c0 t uvd_v6_0_enc_ring_test_ring -ffffffff820cb830 t uvd_v6_0_enc_ring_test_ib -ffffffff820cbd90 t uvd_v6_0_enc_ring_insert_end -ffffffff820cbe20 t uvd_v6_0_set_interrupt_state -ffffffff820cbe50 t uvd_v6_0_process_interrupt -ffffffff820cbf50 t uvd_v6_0_stop -ffffffff820cc0d0 t uvd_v6_0_start -ffffffff820cd000 t uvd_v7_0_early_init -ffffffff820cd290 t uvd_v7_0_sw_init -ffffffff820cd720 t uvd_v7_0_sw_fini -ffffffff820cd830 t uvd_v7_0_hw_init -ffffffff820d0d00 t uvd_v7_0_hw_fini -ffffffff820d10b0 t uvd_v7_0_suspend -ffffffff820d1190 t uvd_v7_0_resume -ffffffff820d11f0 t uvd_v7_0_set_clockgating_state -ffffffff820d1220 t uvd_v7_0_ring_get_rptr -ffffffff820d12c0 t uvd_v7_0_ring_get_wptr -ffffffff820d1360 t uvd_v7_0_ring_set_wptr -ffffffff820d13e0 t uvd_v7_0_ring_patch_cs_in_place -ffffffff820d1450 t uvd_v7_0_ring_emit_ib -ffffffff820d1840 t uvd_v7_0_ring_emit_fence -ffffffff820d1f00 t uvd_v7_0_ring_emit_vm_flush -ffffffff820d1f70 t uvd_v7_0_ring_emit_hdp_flush -ffffffff820d1fa0 t uvd_v7_0_ring_test_ring -ffffffff820d2270 t uvd_v7_0_ring_insert_nop -ffffffff820d2410 t uvd_v7_0_ring_emit_wreg -ffffffff820d2700 t uvd_v7_0_ring_emit_reg_wait -ffffffff820d2ae0 t uvd_v7_0_enc_ring_get_rptr -ffffffff820d2be0 t uvd_v7_0_enc_ring_get_wptr -ffffffff820d2cf0 t uvd_v7_0_enc_ring_set_wptr -ffffffff820d2df0 t uvd_v7_0_enc_ring_emit_ib -ffffffff820d3060 t uvd_v7_0_enc_ring_emit_fence -ffffffff820d32c0 t uvd_v7_0_enc_ring_emit_vm_flush -ffffffff820d3330 t uvd_v7_0_enc_ring_test_ring -ffffffff820d34b0 t uvd_v7_0_enc_ring_test_ib -ffffffff820d3a10 t uvd_v7_0_enc_ring_insert_end -ffffffff820d3aa0 t uvd_v7_0_enc_ring_emit_wreg -ffffffff820d3c00 t uvd_v7_0_enc_ring_emit_reg_wait -ffffffff820d3dd0 t uvd_v7_0_set_interrupt_state -ffffffff820d3e00 t uvd_v7_0_process_interrupt -ffffffff820d4000 t vce_v3_0_early_init -ffffffff820d41a0 t vce_v3_0_sw_init -ffffffff820d4340 t vce_v3_0_sw_fini -ffffffff820d43a0 t vce_v3_0_hw_init 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T igc_phy_hw_reset_generic +ffffffff81a15ec0 T igc_power_up_phy_copper +ffffffff81a15f60 T igc_power_down_phy_copper +ffffffff81a16010 T igc_write_phy_reg_gpy +ffffffff81a16260 T igc_write_xmdio_reg +ffffffff81a16380 T igc_read_phy_reg_gpy +ffffffff81a165d0 T igc_read_xmdio_reg +ffffffff81a166f0 T __igc_access_xmdio_reg +ffffffff81a17000 T ngbe_match +ffffffff81a17030 T ngbe_attach +ffffffff81a17670 T ngbe_detach +ffffffff81a17940 T ngbe_allocate_pci_resources +ffffffff81a17a70 T ngbe_allocate_queues +ffffffff81a18020 T ngbe_allocate_isb +ffffffff81a180c0 T ngbe_init_shared_code +ffffffff81a183a0 T ngbe_check_flash_load +ffffffff81a18710 T ngbe_allocate_msix +ffffffff81a189a0 T ngbe_setup_interface +ffffffff81a18c10 T ngbe_free_isb +ffffffff81a18d20 T ngbe_free_transmit_structures +ffffffff81a18da0 T ngbe_free_receive_structures +ffffffff81a18e60 T ngbe_free_pci_resources +ffffffff81a18ef0 T ngbe_stop +ffffffff81a19550 T ngbe_release_hw_control +ffffffff81a195e0 T ngbe_init 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T ngbe_reset +ffffffff81a1c410 T ngbe_set_rx_drop_en +ffffffff81a1c550 T ngbe_watchdog +ffffffff81a1c620 T ngbe_setup_msix +ffffffff81a1c6d0 T ngbe_intr_queue +ffffffff81a1c7f0 T ngbe_intr_link +ffffffff81a1c8f0 T ngbe_dma_malloc +ffffffff81a1ca80 T ngbe_dma_free +ffffffff81a1cb60 T ngbe_rxrefill +ffffffff81a1cc10 T ngbe_free_receive_buffers +ffffffff81a1cd50 T ngbe_free_transmit_buffers +ffffffff81a1ce90 T ngbe_allocate_receive_buffers +ffffffff81a1cfe0 T ngbe_allocate_transmit_buffers +ffffffff81a1d110 T ngbe_setup_receive_ring +ffffffff81a1d230 T ngbe_setup_transmit_ring +ffffffff81a1d3a0 T ngbe_addr_list_itr +ffffffff81a1d3e0 T ngbe_setup_psrtype +ffffffff81a1d410 T ngbe_initialize_rss_mapping +ffffffff81a1d6a0 T ngbe_handle_phy_event +ffffffff81a1d750 T ngbe_enable_queue +ffffffff81a1d7b0 T ngbe_rxeof +ffffffff81a1db60 T ngbe_txeof +ffffffff81a1dd20 T ngbe_init_eeprom_params +ffffffff81a1dda0 T ngbe_init_hw +ffffffff81a1de10 T ngbe_init_ops +ffffffff81a1e020 T ngbe_phy_reset +ffffffff81a1e1e0 T ngbe_phy_read_reg +ffffffff81a1e290 T ngbe_phy_write_reg +ffffffff81a1e340 T ngbe_phy_setup_link +ffffffff81a1e610 T ngbe_phy_led_ctrl +ffffffff81a1e720 T ngbe_phy_check_overtemp +ffffffff81a1e780 T ngbe_phy_identify +ffffffff81a1e7c0 T ngbe_phy_init +ffffffff81a1ea50 T ngbe_phy_check_event +ffffffff81a1eab0 T ngbe_phy_get_advertised_pause +ffffffff81a1eb20 T ngbe_phy_get_lp_advertised_pause +ffffffff81a1ebf0 T ngbe_phy_set_pause_advertisement +ffffffff81a1ec80 T ngbe_phy_setup +ffffffff81a1ee70 T ngbe_clear_hw_cntrs +ffffffff81a1f150 T ngbe_get_mac_addr +ffffffff81a1f220 T ngbe_stop_adapter +ffffffff81a1f4e0 T ngbe_get_bus_info +ffffffff81a1f5a0 T ngbe_set_lan_id_multi_port_pcie +ffffffff81a1f610 T ngbe_acquire_swfw_sync +ffffffff81a1f8e0 T ngbe_release_swfw_sync +ffffffff81a1fa50 T ngbe_reset_hw +ffffffff81a1fcf0 T ngbe_get_media_type +ffffffff81a1fd20 T ngbe_disable_sec_rx_path +ffffffff81a1fdf0 T ngbe_enable_sec_rx_path +ffffffff81a1fe70 T ngbe_enable_rx_dma +ffffffff81a1fed0 T ngbe_start_hw +ffffffff81a1ffc0 T ngbe_set_rar +ffffffff81a20150 T ngbe_init_rx_addrs +ffffffff81a20350 T ngbe_update_mc_addr_list +ffffffff81a20530 T ngbe_enable_rx +ffffffff81a206a0 T ngbe_disable_rx +ffffffff81a207f0 T ngbe_clear_vfta +ffffffff81a20910 T ngbe_init_uta_tables +ffffffff81a20990 T ngbe_fc_enable +ffffffff81a20ca0 T ngbe_setup_fc +ffffffff81a20d90 T ngbe_check_mac_link +ffffffff81a20f20 T ngbe_set_rxpba +ffffffff81a20fd0 T ngbe_eepromcheck_cap +ffffffff81a210b0 T ngbe_phy_led_oem_chk +ffffffff81a211d0 T ngbe_set_fw_drv_ver +ffffffff81a21320 T ngbe_init_thermal_sensor_thresh +ffffffff81a21400 T ngbe_validate_mac_addr +ffffffff81a21460 T ngbe_fc_autoneg +ffffffff81a21600 T ngbe_fc_autoneg_copper +ffffffff81a21720 T ngbe_negotiate_fc +ffffffff81a217d0 T ngbe_fmgr_cmd_op +ffffffff81a218d0 T ngbe_flash_read_dword +ffffffff81a219e0 T ngbe_calculate_checksum +ffffffff81a21aa0 T ngbe_check_internal_phy_id +ffffffff81a21c20 T ngbe_gphy_wait_mdio_access_on +ffffffff81a21cb0 T ngbe_check_mng_access +ffffffff81a21d10 T ngbe_mng_present +ffffffff81a21d70 T ngbe_check_reset_blocked +ffffffff81a21e00 T ngbe_set_ivar +ffffffff81a21f00 T ngbe_pbthresh_setup +ffffffff81a21fd0 T ngbe_disable_queue +ffffffff81a22030 T ngbe_host_interface_command +ffffffff81a224a0 T ngbe_tx_ctx_setup +ffffffff81a22530 T ngbe_read_pci_cfg_word +ffffffff81a22590 T ngbe_set_pci_config_data +ffffffff81a22620 T ngbe_get_copper_link_capabilities +ffffffff81a22670 T ngbe_get_eeprom_semaphore +ffffffff81a22810 T ngbe_release_eeprom_semaphore +ffffffff81a228e0 T ngbe_gphy_dis_eee +ffffffff81a22a40 T ngbe_gphy_efuse_calibration +ffffffff81a22ee0 T ngbe_hpbthresh +ffffffff81a22f80 T ngbe_lpbthresh +ffffffff81a22fc0 T ngbe_mta_vector +ffffffff81a23010 T ngbe_setup_copper_link +ffffffff81a23060 T ngbe_reset_misc +ffffffff81a23450 T ngbe_set_mta +ffffffff81a234c0 T ngbe_rx_checksum +ffffffff81a24000 T com_pci_match +ffffffff81a24030 T com_pci_attach +ffffffff81a243a0 T com_pci_detach +ffffffff81a24450 T com_pci_activate +ffffffff81a24560 T com_pci_intr_designware +ffffffff81a25000 T ufshci_pci_match +ffffffff81a25040 T ufshci_pci_attach +ffffffff81a251d0 T ufshci_pci_detach +ffffffff81a25200 T ufshci_pci_activate +ffffffff81a26000 T agpdev_print +ffffffff81a26050 T agpbus_probe +ffffffff81a260c0 T agpvga_match +ffffffff81a26130 T agp_attach_bus +ffffffff81a261c0 T agp_probe +ffffffff81a261f0 T agp_attach +ffffffff81a26310 T agp_alloc_gatt +ffffffff81a26520 T agp_alloc_dmamem +ffffffff81a26670 T agp_free_dmamem +ffffffff81a266e0 T agp_free_gatt +ffffffff81a26790 T agp_generic_enable +ffffffff81a26960 T agp_find_device +ffffffff81a269b0 T agp_state +ffffffff81a269e0 T agp_get_info +ffffffff81a26a90 T agp_acquire +ffffffff81a26ae0 T agp_release +ffffffff81a26b30 T agp_enable +ffffffff81a26b60 T agp_mmap +ffffffff81a27000 T agp_i810_probe +ffffffff81a27060 T agp_i810_attach +ffffffff81a27610 T agp_i810_activate +ffffffff81a27660 T agp_i810_bind_page +ffffffff81a27730 T agp_i810_unbind_page +ffffffff81a277f0 T agp_i810_flush_tlb +ffffffff81a27820 T agp_i810_enable +ffffffff81a27850 T agp_i810_get_chiptype +ffffffff81a27ac0 T intagp_gmch_match +ffffffff81a27b20 T agp_i810_configure +ffffffff81a27c80 T intagp_write_gtt +ffffffff81a28000 T dma_resv_init +ffffffff81a28070 T dma_resv_fini +ffffffff81a28170 T dma_resv_reserve_fences +ffffffff81a28350 T dma_resv_add_fence +ffffffff81a284f0 T dma_resv_replace_fences +ffffffff81a285b0 T dma_resv_iter_first_unlocked +ffffffff81a28650 t dma_resv_iter_walk_unlocked +ffffffff81a28760 T dma_resv_iter_next_unlocked +ffffffff81a287f0 T dma_resv_iter_first +ffffffff81a28880 T dma_resv_iter_next +ffffffff81a28900 T dma_resv_copy_fences +ffffffff81a28d40 T dma_resv_get_fences +ffffffff81a291d0 T dma_resv_get_singleton +ffffffff81a29310 T dma_resv_wait_timeout +ffffffff81a29610 T dma_resv_test_signaled +ffffffff81a29790 T dma_resv_describe +ffffffff81a2a000 T drm_legacy_agp_info +ffffffff81a2a0b0 T drm_legacy_agp_acquire +ffffffff81a2a120 T drm_legacy_agp_release +ffffffff81a2a190 T drm_legacy_agp_enable +ffffffff81a2a210 T drm_legacy_agp_takedown +ffffffff81a2a280 T drm_legacy_agp_init +ffffffff81a2b000 T devm_aperture_acquire_from_firmware +ffffffff81a2b060 T drm_aperture_remove_conflicting_framebuffers +ffffffff81a2b090 T drm_aperture_remove_conflicting_pci_framebuffers +ffffffff81a2c000 T __drm_crtc_commit_free +ffffffff81a2c020 T drm_crtc_commit_wait +ffffffff81a2c200 T drm_atomic_state_default_release +ffffffff81a2c280 T drm_atomic_state_init +ffffffff81a2c3f0 T drm_atomic_state_alloc +ffffffff81a2c4a0 T drm_atomic_state_default_clear +ffffffff81a2c800 T drm_atomic_state_clear +ffffffff81a2c830 T __drm_atomic_state_free +ffffffff81a2c940 T drm_atomic_get_crtc_state +ffffffff81a2cab0 T drm_atomic_get_plane_state +ffffffff81a2ccc0 T drm_atomic_private_obj_init +ffffffff81a2cdb0 T drm_atomic_private_obj_fini +ffffffff81a2ce50 T drm_atomic_get_private_obj_state +ffffffff81a2d030 T drm_atomic_get_old_private_obj_state +ffffffff81a2d090 T drm_atomic_get_new_private_obj_state +ffffffff81a2d0f0 T drm_atomic_get_old_connector_for_encoder +ffffffff81a2d160 T drm_atomic_get_new_connector_for_encoder +ffffffff81a2d1d0 T drm_atomic_get_old_crtc_for_encoder +ffffffff81a2d270 T drm_atomic_get_new_crtc_for_encoder +ffffffff81a2d310 T drm_atomic_get_connector_state +ffffffff81a2d590 T drm_atomic_get_bridge_state +ffffffff81a2d5a0 T drm_atomic_get_old_bridge_state +ffffffff81a2d600 T drm_atomic_get_new_bridge_state +ffffffff81a2d660 T drm_atomic_add_encoder_bridges +ffffffff81a2d740 T drm_atomic_add_affected_connectors +ffffffff81a2d8a0 T drm_atomic_add_affected_planes +ffffffff81a2d9d0 T drm_atomic_check_only +ffffffff81a2e560 T drm_atomic_commit +ffffffff81a2e640 T drm_atomic_print_new_state +ffffffff81a2e850 T drm_atomic_nonblocking_commit +ffffffff81a2e900 T __drm_atomic_helper_disable_plane +ffffffff81a2e990 T __drm_atomic_helper_set_config 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drm_atomic_helper_wait_for_vblanks +ffffffff81a333c0 T drm_atomic_helper_wait_for_flip_done +ffffffff81a335b0 T drm_atomic_helper_commit_tail +ffffffff81a33780 T drm_atomic_helper_commit_planes +ffffffff81a33b30 T drm_atomic_helper_fake_vblank +ffffffff81a33c30 T drm_atomic_helper_commit_hw_done +ffffffff81a33e50 T drm_atomic_helper_cleanup_planes +ffffffff81a33f00 T drm_atomic_helper_commit_tail_rpm +ffffffff81a340d0 t try_wait_for_completion +ffffffff81a34140 T drm_atomic_helper_async_commit +ffffffff81a34410 T drm_atomic_helper_commit +ffffffff81a34710 T drm_atomic_helper_prepare_planes +ffffffff81a349e0 T drm_atomic_helper_unprepare_planes +ffffffff81a34af0 T drm_atomic_helper_setup_commit +ffffffff81a352e0 t commit_work +ffffffff81a35300 T drm_atomic_helper_swap_state +ffffffff81a359c0 t commit_tail +ffffffff81a35c10 t release_crtc_commit +ffffffff81a35c50 t crtc_or_fake_commit +ffffffff81a35d80 T drm_atomic_helper_wait_for_dependencies +ffffffff81a35fc0 T drm_atomic_helper_commit_cleanup_done +ffffffff81a362b0 T drm_atomic_helper_commit_planes_on_crtc +ffffffff81a36560 T drm_atomic_helper_disable_planes_on_crtc +ffffffff81a366d0 T drm_atomic_helper_update_plane +ffffffff81a36830 T drm_atomic_helper_disable_plane +ffffffff81a36930 T drm_atomic_helper_set_config +ffffffff81a36a10 T drm_atomic_helper_disable_all +ffffffff81a36c00 T drm_atomic_helper_shutdown +ffffffff81a36d80 T drm_atomic_helper_duplicate_state +ffffffff81a36f10 T drm_atomic_helper_suspend +ffffffff81a370b0 T drm_atomic_helper_commit_duplicated_state +ffffffff81a37200 T drm_atomic_helper_resume +ffffffff81a37370 T drm_atomic_helper_page_flip +ffffffff81a37450 t page_flip_common +ffffffff81a37580 T drm_atomic_helper_page_flip_target +ffffffff81a376c0 T drm_atomic_helper_bridge_propagate_bus_fmt +ffffffff81a37740 t set_best_encoder +ffffffff81a38000 T __drm_atomic_helper_crtc_state_reset +ffffffff81a38030 T __drm_atomic_helper_crtc_reset +ffffffff81a380a0 T drm_atomic_helper_crtc_reset +ffffffff81a38150 T __drm_atomic_helper_crtc_duplicate_state +ffffffff81a38230 T drm_atomic_helper_crtc_duplicate_state +ffffffff81a382f0 T __drm_atomic_helper_crtc_destroy_state +ffffffff81a383e0 T drm_atomic_helper_crtc_destroy_state +ffffffff81a38420 T __drm_atomic_helper_plane_state_reset +ffffffff81a38500 T __drm_atomic_helper_plane_reset +ffffffff81a38560 T drm_atomic_helper_plane_reset +ffffffff81a38670 T __drm_atomic_helper_plane_destroy_state +ffffffff81a386e0 T __drm_atomic_helper_plane_duplicate_state +ffffffff81a38760 T drm_atomic_helper_plane_duplicate_state +ffffffff81a38860 T drm_atomic_helper_plane_destroy_state +ffffffff81a388e0 T __drm_atomic_helper_connector_state_reset +ffffffff81a38910 T __drm_atomic_helper_connector_reset +ffffffff81a38950 T drm_atomic_helper_connector_reset +ffffffff81a38a40 T __drm_atomic_helper_connector_destroy_state +ffffffff81a38aa0 T drm_atomic_helper_connector_tv_margins_reset +ffffffff81a38b00 T drm_atomic_helper_connector_tv_reset +ffffffff81a38d50 T drm_atomic_helper_connector_tv_check +ffffffff81a38e30 T __drm_atomic_helper_connector_duplicate_state +ffffffff81a38ed0 T drm_atomic_helper_connector_duplicate_state +ffffffff81a38fe0 T drm_atomic_helper_connector_destroy_state +ffffffff81a39050 T __drm_atomic_helper_private_obj_duplicate_state +ffffffff81a39090 T __drm_atomic_helper_bridge_duplicate_state +ffffffff81a390d0 T drm_atomic_helper_bridge_duplicate_state +ffffffff81a39190 T drm_atomic_helper_bridge_destroy_state +ffffffff81a391b0 T __drm_atomic_helper_bridge_reset +ffffffff81a39200 T drm_atomic_helper_bridge_reset +ffffffff81a3a000 T drm_atomic_set_mode_for_crtc +ffffffff81a3a250 T drm_atomic_set_mode_prop_for_crtc +ffffffff81a3a530 T drm_atomic_set_crtc_for_plane +ffffffff81a3a6d0 T drm_atomic_set_fb_for_plane +ffffffff81a3a7c0 T drm_atomic_set_crtc_for_connector +ffffffff81a3a950 T drm_atomic_get_property +ffffffff81a3b0f0 T drm_atomic_connector_commit_dpms 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drm_plane_create_rotation_property +ffffffff81a3e200 T drm_rotation_simplify +ffffffff81a3e280 T drm_plane_create_zpos_property +ffffffff81a3e350 T drm_plane_create_zpos_immutable_property +ffffffff81a3e410 T drm_atomic_normalize_zpos +ffffffff81a3e760 T drm_plane_create_blend_mode_property +ffffffff81a3e940 t drm_atomic_state_zpos_cmp +ffffffff81a3f000 T drm_bridge_add +ffffffff81a3f080 T devm_drm_bridge_add +ffffffff81a3f150 T drm_bridge_remove +ffffffff81a3f1c0 T drm_bridge_attach +ffffffff81a3f3a0 T drm_bridge_detach +ffffffff81a3f490 T drm_bridge_chain_mode_fixup +ffffffff81a3f540 T drm_bridge_chain_mode_valid +ffffffff81a3f5f0 T drm_bridge_chain_mode_set +ffffffff81a3f690 T drm_atomic_bridge_chain_disable +ffffffff81a3f7a0 T drm_atomic_bridge_chain_post_disable +ffffffff81a3f9e0 T drm_atomic_bridge_chain_pre_enable +ffffffff81a3fc50 T drm_atomic_bridge_chain_enable +ffffffff81a3fd80 T drm_atomic_bridge_chain_check +ffffffff81a40180 T drm_bridge_detect +ffffffff81a401e0 T drm_bridge_get_modes +ffffffff81a40240 T drm_bridge_edid_read +ffffffff81a40310 T drm_bridge_get_edid +ffffffff81a40370 T drm_bridge_hpd_enable +ffffffff81a40450 T drm_bridge_hpd_disable +ffffffff81a404f0 T drm_bridge_hpd_notify +ffffffff81a40550 t drm_bridge_atomic_duplicate_priv_state +ffffffff81a40570 t drm_bridge_atomic_destroy_priv_state +ffffffff81a40590 t select_bus_fmt_recursive +ffffffff81a41000 T drm_buddy_init +ffffffff81a414c0 T drm_buddy_fini +ffffffff81a415d0 T drm_get_buddy +ffffffff81a41610 T drm_buddy_free_block +ffffffff81a41660 t __drm_buddy_free +ffffffff81a417c0 T drm_buddy_free_list +ffffffff81a418a0 T drm_buddy_block_trim +ffffffff81a41b00 t __alloc_range +ffffffff81a41e00 T drm_buddy_alloc_blocks +ffffffff81a424e0 t __drm_buddy_alloc_range +ffffffff81a42580 T drm_buddy_block_print +ffffffff81a425c0 T drm_buddy_print +ffffffff81a42740 T drm_buddy_module_exit +ffffffff81a42760 T drm_buddy_module_init +ffffffff81a427d0 t split_block +ffffffff81a43000 T drm_clflush_pages +ffffffff81a430e0 T drm_clflush_sg +ffffffff81a43200 T drm_clflush_virt_range +ffffffff81a432a0 T drm_need_swiotlb +ffffffff81a432d0 T drm_memcpy_from_wc +ffffffff81a43820 T drm_memcpy_init_early +ffffffff81a44000 T drm_client_init +ffffffff81a44150 T drm_client_register +ffffffff81a44210 T drm_client_release +ffffffff81a442e0 T drm_client_dev_unregister +ffffffff81a44400 T drm_client_dev_hotplug +ffffffff81a44540 T drm_client_dev_restore +ffffffff81a44640 T drm_client_buffer_vmap +ffffffff81a446c0 T drm_client_buffer_vunmap +ffffffff81a446e0 T drm_client_framebuffer_create +ffffffff81a44a20 T drm_client_framebuffer_delete +ffffffff81a44b20 T drm_client_framebuffer_flush +ffffffff81a45000 T drm_client_modeset_create +ffffffff81a45150 T drm_client_modeset_free +ffffffff81a45280 T drm_client_modeset_probe +ffffffff81a46ca0 t drm_client_pick_crtcs +ffffffff81a46fc0 T drm_client_rotation +ffffffff81a47170 T drm_client_modeset_check +ffffffff81a47220 t drm_client_modeset_commit_atomic +ffffffff81a47490 T drm_client_modeset_commit_locked +ffffffff81a47680 T drm_client_modeset_commit +ffffffff81a47710 T drm_client_modeset_dpms +ffffffff81a479d0 t drm_connector_pick_cmdline_mode +ffffffff81a48000 T drm_color_ctm_s31_32_to_qm_n +ffffffff81a480d0 T drm_crtc_enable_color_mgmt +ffffffff81a481c0 T drm_mode_crtc_set_gamma_size +ffffffff81a482f0 T drm_mode_gamma_set_ioctl +ffffffff81a488b0 T drm_mode_gamma_get_ioctl +ffffffff81a48a20 T drm_get_color_encoding_name +ffffffff81a48aa0 T drm_get_color_range_name +ffffffff81a48b20 T drm_plane_create_color_properties +ffffffff81a48db0 T drm_color_lut_check +ffffffff81a49000 T drm_connector_ida_init +ffffffff81a491c0 T drm_connector_ida_destroy +ffffffff81a49380 T drm_get_connector_type_name +ffffffff81a493c0 T drm_connector_free_work_fn +ffffffff81a494a0 T drm_connector_init +ffffffff81a49530 t __drm_connector_init +ffffffff81a49930 T drm_connector_init_with_ddc +ffffffff81a499c0 T drmm_connector_init +ffffffff81a49a90 t drm_connector_cleanup_action +ffffffff81a49ab0 T drm_connector_attach_edid_property +ffffffff81a49ad0 T drm_connector_attach_encoder +ffffffff81a49b60 T drm_connector_has_possible_encoder +ffffffff81a49ba0 T drm_connector_cleanup +ffffffff81a49f90 T drm_connector_unregister +ffffffff81a4a040 T drm_mode_put_tile_group +ffffffff81a4a0f0 T drm_connector_register +ffffffff81a4a220 T drm_connector_unregister_all +ffffffff81a4a400 T drm_connector_list_iter_begin +ffffffff81a4a440 T drm_connector_list_iter_next +ffffffff81a4a560 T drm_connector_list_iter_end +ffffffff81a4a640 T drm_connector_register_all +ffffffff81a4a800 T drm_get_connector_status_name +ffffffff81a4a850 T drm_get_connector_force_name +ffffffff81a4a890 T drm_get_subpixel_order_name +ffffffff81a4a8d0 T drm_get_dpms_name +ffffffff81a4a910 T drm_display_info_set_bus_formats +ffffffff81a4aa00 T drm_get_dvi_i_select_name +ffffffff81a4aa60 T drm_get_dvi_i_subconnector_name +ffffffff81a4aac0 T drm_get_tv_mode_name +ffffffff81a4ab00 T drm_get_tv_mode_from_name +ffffffff81a4ad20 T drm_get_tv_select_name +ffffffff81a4ad80 T drm_get_tv_subconnector_name +ffffffff81a4ade0 T drm_get_dp_subconnector_name +ffffffff81a4ae70 T drm_get_colorspace_name +ffffffff81a4aeb0 T drm_connector_create_standard_properties +ffffffff81a4b070 T drm_mode_create_dvi_i_properties +ffffffff81a4b120 T drm_connector_attach_dp_subconnector_property +ffffffff81a4b190 T drm_connector_attach_content_type_property +ffffffff81a4b230 T drm_mode_create_content_type_property +ffffffff81a4b2c0 T drm_connector_attach_tv_margin_properties +ffffffff81a4b340 T drm_mode_create_tv_margin_properties +ffffffff81a4b480 T drm_mode_create_tv_properties_legacy +ffffffff81a4b730 T drm_mode_create_tv_properties +ffffffff81a4b920 T drm_mode_create_scaling_mode_property +ffffffff81a4b990 T drm_connector_attach_vrr_capable_property +ffffffff81a4ba30 T drm_connector_attach_scaling_mode_property +ffffffff81a4bc50 T drm_mode_create_aspect_ratio_property +ffffffff81a4bce0 T drm_mode_create_hdmi_colorspace_property +ffffffff81a4bd00 t drm_mode_create_colorspace_property +ffffffff81a4be50 T drm_mode_create_dp_colorspace_property +ffffffff81a4be80 T drm_mode_create_suggested_offset_properties +ffffffff81a4bf60 T drm_connector_set_path_property +ffffffff81a4bfc0 T drm_connector_set_tile_property +ffffffff81a4c130 T drm_connector_set_link_status_property +ffffffff81a4c190 T drm_connector_attach_max_bpc_property +ffffffff81a4c260 T drm_connector_attach_hdr_output_metadata_property +ffffffff81a4c2b0 T drm_connector_attach_colorspace_property +ffffffff81a4c300 T drm_connector_atomic_hdr_metadata_equal +ffffffff81a4c380 T drm_connector_set_vrr_capable_property +ffffffff81a4c3d0 T drm_connector_set_panel_orientation +ffffffff81a4c4a0 T drm_connector_set_panel_orientation_with_quirk +ffffffff81a4c5a0 T drm_connector_set_orientation_from_panel +ffffffff81a4c6a0 T drm_connector_create_privacy_screen_properties +ffffffff81a4c750 T drm_connector_attach_privacy_screen_properties +ffffffff81a4c7d0 T drm_connector_attach_privacy_screen_provider +ffffffff81a4c900 t drm_connector_privacy_screen_notifier +ffffffff81a4c9d0 T drm_connector_update_privacy_screen +ffffffff81a4ca40 T drm_connector_set_obj_prop +ffffffff81a4cb50 T drm_connector_property_set_ioctl +ffffffff81a4cbb0 T drm_mode_getconnector +ffffffff81a4d130 T drm_connector_find_by_fwnode +ffffffff81a4d1f0 T drm_connector_oob_hotplug_event +ffffffff81a4d2f0 T drm_mode_get_tile_group +ffffffff81a4d400 T drm_mode_create_tile_group +ffffffff81a4d4f0 t drm_connector_free +ffffffff81a4d540 t kasprintf +ffffffff81a4e000 T drm_crtc_from_index +ffffffff81a4e060 T drm_crtc_force_disable +ffffffff81a4e1b0 T drm_mode_set_config_internal +ffffffff81a4e230 T drm_crtc_register_all +ffffffff81a4e2c0 T drm_crtc_unregister_all +ffffffff81a4e340 T drm_crtc_create_fence +ffffffff81a4e3d0 T drm_crtc_init_with_planes +ffffffff81a4e4b0 t __drm_crtc_init_with_planes +ffffffff81a4e940 T drmm_crtc_init_with_planes +ffffffff81a4ea60 T __drmm_crtc_alloc_with_planes +ffffffff81a4ec00 T drm_crtc_cleanup +ffffffff81a4ed40 T drm_mode_getcrtc +ffffffff81a4ef20 t __drm_mode_set_config_internal +ffffffff81a4f0e0 T drm_crtc_check_viewport +ffffffff81a4f1a0 T drm_mode_setcrtc +ffffffff81a4fa40 T drm_mode_crtc_set_obj_prop +ffffffff81a4fad0 T drm_crtc_create_scaling_filter_property +ffffffff81a4fb50 t drm_crtc_fence_get_driver_name +ffffffff81a4fbd0 t drm_crtc_fence_get_timeline_name +ffffffff81a4fc40 t kasprintf +ffffffff81a4fd20 t drmm_crtc_init_with_planes_cleanup +ffffffff81a50000 T drm_helper_encoder_in_use +ffffffff81a501b0 T drm_helper_crtc_in_use +ffffffff81a502e0 T drm_helper_disable_unused_functions +ffffffff81a50380 t __drm_helper_disable_unused_functions +ffffffff81a504c0 T drm_crtc_helper_set_mode +ffffffff81a50a40 T drm_crtc_helper_atomic_check +ffffffff81a50a90 T drm_connector_get_single_encoder +ffffffff81a50b70 T drm_crtc_helper_set_config +ffffffff81a519a0 T drm_helper_connector_dpms +ffffffff81a51d00 T drm_helper_resume_force_mode +ffffffff81a52090 T drm_helper_force_disable_all +ffffffff81a53000 T drm_atomic_helper_check_plane_damage +ffffffff81a530b0 T drm_atomic_helper_dirtyfb +ffffffff81a533f0 T drm_atomic_helper_damage_iter_init +ffffffff81a53550 T drm_atomic_helper_damage_iter_next +ffffffff81a535f0 T drm_atomic_helper_damage_merged +ffffffff81a54000 T displayid_iter_edid_begin +ffffffff81a54050 T __displayid_iter_next +ffffffff81a54320 T displayid_iter_end +ffffffff81a54370 T displayid_version +ffffffff81a543a0 T displayid_primary_use +ffffffff81a55000 T drm_mode_create_dumb +ffffffff81a550e0 T drm_mode_create_dumb_ioctl +ffffffff81a551c0 T drm_mode_mmap_dumb_ioctl +ffffffff81a55230 T drm_mode_destroy_dumb +ffffffff81a55280 T drm_mode_destroy_dumb_ioctl +ffffffff81a56000 T drm_edid_header_is_valid +ffffffff81a56080 T drm_edid_are_equal +ffffffff81a56100 T drm_edid_block_valid +ffffffff81a56370 t edid_block_check +ffffffff81a564b0 t edid_block_status_print +ffffffff81a565a0 T drm_edid_is_valid +ffffffff81a56620 T drm_edid_valid +ffffffff81a56760 t drm_edid_block_count +ffffffff81a568a0 T drm_edid_override_show +ffffffff81a56900 T drm_edid_override_set +ffffffff81a56b10 T drm_edid_alloc +ffffffff81a56bf0 T drm_edid_free +ffffffff81a56c50 T drm_edid_override_reset +ffffffff81a56d30 T drm_edid_override_connector_update +ffffffff81a56e30 t drm_edid_override_get +ffffffff81a56f50 T drm_edid_connector_update +ffffffff81a57430 T drm_edid_connector_add_modes +ffffffff81a57590 T drm_do_get_edid +ffffffff81a575b0 t _drm_do_get_edid +ffffffff81a57ab0 T drm_edid_raw +ffffffff81a57b40 T drm_edid_dup +ffffffff81a57c30 T drm_probe_ddc +ffffffff81a57d40 t drm_do_probe_ddc_edid +ffffffff81a57ea0 T drm_get_edid +ffffffff81a58030 T drm_connector_update_edid_property +ffffffff81a580a0 T drm_edid_read_custom +ffffffff81a581c0 T drm_edid_read_ddc +ffffffff81a58300 T drm_edid_read +ffffffff81a58390 T drm_edid_get_panel_id +ffffffff81a58560 t edid_block_read +ffffffff81a58840 T drm_get_edid_switcheroo +ffffffff81a58890 T drm_edid_read_switcheroo +ffffffff81a588e0 T drm_edid_duplicate +ffffffff81a58970 T drm_mode_find_dmt +ffffffff81a58aa0 T drm_mode_fixup_1366x768 +ffffffff81a58af0 T drm_find_edid_extension +ffffffff81a58ba0 T drm_match_cea_mode +ffffffff81a58e40 T drm_display_mode_from_cea_vic +ffffffff81a58eb0 T drm_edid_get_monitor_name +ffffffff81a58f70 t get_monitor_name +ffffffff81a593e0 T drm_edid_to_sad +ffffffff81a59610 T drm_edid_to_speaker_allocation +ffffffff81a597f0 T drm_av_sync_delay +ffffffff81a598a0 T drm_detect_hdmi_monitor +ffffffff81a599e0 T drm_detect_monitor_audio +ffffffff81a59b90 T drm_default_rgb_quant_range +ffffffff81a59be0 t update_display_info +ffffffff81a5b590 t _drm_edid_connector_add_modes +ffffffff81a5cd50 T drm_add_edid_modes +ffffffff81a5ce70 T drm_add_modes_noedid +ffffffff81a5cf80 T drm_set_preferred_mode +ffffffff81a5cfe0 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff81a5d2d0 T drm_hdmi_avi_infoframe_quant_range +ffffffff81a5d370 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff81a5d450 t connector_bad_edid +ffffffff81a5d640 t edid_filter_invalid_blocks +ffffffff81a5d800 t drm_for_each_detailed_block +ffffffff81a5d9f0 t __cea_db_iter_next +ffffffff81a5dc10 t get_monitor_range +ffffffff81a5dcb0 t do_detailed_mode +ffffffff81a5e750 t do_cvt_mode +ffffffff81a5e9e0 t drm_mode_std +ffffffff81a5f430 t do_standard_modes +ffffffff81a5f5e0 t drm_monitor_supports_rb +ffffffff81a5f9f0 t drm_gtf2_mode +ffffffff81a607f0 t drm_gtf2_hbreak +ffffffff81a60b60 t do_established_modes +ffffffff81a60d80 t drm_match_hdmi_mode +ffffffff81a60f10 t do_inferred_modes +ffffffff81a61680 t mode_in_range +ffffffff81a62000 T drm_encoder_register_all +ffffffff81a62090 T drm_encoder_unregister_all +ffffffff81a62110 T drm_encoder_init +ffffffff81a621e0 t __drm_encoder_init +ffffffff81a623e0 T drm_encoder_cleanup +ffffffff81a62520 T __drmm_encoder_alloc +ffffffff81a62660 T drmm_encoder_init +ffffffff81a62750 T drm_mode_getencoder +ffffffff81a62910 t kasprintf +ffffffff81a629f0 t drmm_encoder_alloc_release +ffffffff81a63000 T drm_i2c_encoder_dpms +ffffffff81a63020 T drm_i2c_encoder_mode_fixup +ffffffff81a63060 T drm_i2c_encoder_prepare +ffffffff81a63080 T drm_i2c_encoder_commit +ffffffff81a630a0 T drm_i2c_encoder_mode_set +ffffffff81a630c0 T drm_i2c_encoder_detect +ffffffff81a630e0 T drm_i2c_encoder_save +ffffffff81a63100 T drm_i2c_encoder_restore +ffffffff81a64000 T drm_exec_init +ffffffff81a64080 T drm_exec_fini +ffffffff81a64110 t drm_exec_unlock_all +ffffffff81a642b0 T drm_exec_cleanup +ffffffff81a64350 T drm_exec_lock_obj +ffffffff81a64660 t drm_exec_obj_locked +ffffffff81a64750 t dma_resv_unlock +ffffffff81a64800 T drm_exec_unlock_obj +ffffffff81a649b0 T drm_exec_prepare_obj +ffffffff81a64a50 T drm_exec_prepare_array +ffffffff81a64b20 t dma_resv_lock_slow_interruptible +ffffffff81a64c80 t dma_resv_lock_slow +ffffffff81a64d70 t __ww_mutex_lock +ffffffff81a65000 T drm_fb_helper_debug_enter +ffffffff81a65110 T drm_fb_helper_debug_leave +ffffffff81a652b0 T drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81a65370 t __drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81a65440 T drm_fb_helper_blank +ffffffff81a65570 T drm_fb_helper_prepare +ffffffff81a65690 t drm_fb_helper_resume_worker +ffffffff81a656c0 t drm_fb_helper_damage_work +ffffffff81a65850 T drm_fb_helper_unprepare +ffffffff81a65880 T drm_fb_helper_init +ffffffff81a65900 T drm_fb_helper_alloc_info +ffffffff81a65970 T drm_fb_helper_release_info +ffffffff81a659c0 T drm_fb_helper_unregister_info +ffffffff81a659f0 T drm_fb_helper_fini +ffffffff81a65b00 T drm_fb_helper_set_suspend +ffffffff81a65b30 T drm_fb_helper_set_suspend_unlocked +ffffffff81a65b60 T drm_fb_helper_set_par +ffffffff81a65c40 T drm_fb_helper_pan_display +ffffffff81a65d30 T drm_fb_helper_fill_info +ffffffff81a65e00 T drm_fb_helper_initial_config +ffffffff81a65e40 t __drm_fb_helper_initial_config_and_unlock +ffffffff81a66540 T drm_fb_helper_hotplug_event +ffffffff81a666c0 t drm_setup_crtcs_fb +ffffffff81a66840 T drm_fb_helper_lastclose +ffffffff81a66910 T drm_fb_helper_output_poll_changed +ffffffff81a67000 T drm_fb_dma_get_gem_obj +ffffffff81a68000 T drm_fbdev_dma_setup +ffffffff81a681d0 t drm_fbdev_dma_helper_fb_probe +ffffffff81a68430 t drm_fbdev_dma_client_unregister +ffffffff81a68490 t drm_fbdev_dma_client_restore +ffffffff81a684e0 t drm_fbdev_dma_client_hotplug +ffffffff81a69000 T drm_fbdev_generic_setup +ffffffff81a691d0 t drm_fbdev_generic_helper_fb_probe +ffffffff81a69370 t drm_fbdev_generic_helper_fb_dirty +ffffffff81a69670 t drm_fbdev_generic_client_unregister +ffffffff81a696d0 t drm_fbdev_generic_client_restore +ffffffff81a69720 t drm_fbdev_generic_client_hotplug +ffffffff81a6a000 T drm_dev_needs_global_mutex +ffffffff81a6a060 T drm_file_alloc +ffffffff81a6a350 T drm_file_free +ffffffff81a6a5e0 T drm_lastclose +ffffffff81a6a660 T drm_release +ffffffff81a6a6c0 T drm_file_update_pid +ffffffff81a6a710 T drm_release_noglobal +ffffffff81a6a770 T drm_read +ffffffff81a6a7d0 T drm_event_reserve_init_locked +ffffffff81a6a850 T drm_event_reserve_init +ffffffff81a6a920 T drm_event_cancel_free +ffffffff81a6a9b0 T drm_send_event_timestamp_locked +ffffffff81a6a9c0 t drm_send_event_helper +ffffffff81a6abe0 T drm_send_event_locked +ffffffff81a6ac00 T drm_send_event +ffffffff81a6ac60 T drm_print_memory_stats +ffffffff81a6af00 T drm_show_memory_stats +ffffffff81a6b180 T drm_show_fdinfo +ffffffff81a6b1a0 T mock_drm_getfile +ffffffff81a6c000 T drm_flip_work_allocate_task +ffffffff81a6c060 T drm_flip_work_queue_task +ffffffff81a6c0c0 T drm_flip_work_queue +ffffffff81a6c180 T drm_flip_work_commit +ffffffff81a6c210 T drm_flip_work_init +ffffffff81a6c280 t flip_worker +ffffffff81a6c3a0 T drm_flip_work_cleanup +ffffffff81a6d000 T drm_fb_clip_offset +ffffffff81a6d040 T drm_fb_memcpy +ffffffff81a6d330 T drm_fb_swab +ffffffff81a6d450 t drm_fb_swab32_line +ffffffff81a6d4b0 t drm_fb_swab16_line +ffffffff81a6d510 t drm_fb_xfrm +ffffffff81a6d850 T drm_fb_xrgb8888_to_rgb332 +ffffffff81a6d8b0 t drm_fb_xrgb8888_to_rgb332_line +ffffffff81a6d9b0 T drm_fb_xrgb8888_to_rgb565 +ffffffff81a6da40 t drm_fb_xrgb8888_to_rgb565_swab_line +ffffffff81a6db60 t drm_fb_xrgb8888_to_rgb565_line +ffffffff81a6dc70 T drm_fb_xrgb8888_to_xrgb1555 +ffffffff81a6dcd0 t drm_fb_xrgb8888_to_xrgb1555_line +ffffffff81a6dde0 T drm_fb_xrgb8888_to_argb1555 +ffffffff81a6de40 t drm_fb_xrgb8888_to_argb1555_line +ffffffff81a6df60 T drm_fb_xrgb8888_to_rgba5551 +ffffffff81a6dfc0 t drm_fb_xrgb8888_to_rgba5551_line +ffffffff81a6e0d0 T drm_fb_xrgb8888_to_rgb888 +ffffffff81a6e130 t drm_fb_xrgb8888_to_rgb888_line +ffffffff81a6e1c0 T drm_fb_xrgb8888_to_argb8888 +ffffffff81a6e220 t drm_fb_xrgb8888_to_argb8888_line +ffffffff81a6e2f0 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff81a6e350 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff81a6e3d0 T drm_fb_xrgb8888_to_argb2101010 +ffffffff81a6e430 t drm_fb_xrgb8888_to_argb2101010_line +ffffffff81a6e4c0 T drm_fb_xrgb8888_to_gray8 +ffffffff81a6e520 t drm_fb_xrgb8888_to_gray8_line +ffffffff81a6e590 T drm_fb_blit +ffffffff81a6ec90 T drm_fb_xrgb8888_to_mono +ffffffff81a6f030 T drm_fb_build_fourcc_list +ffffffff81a6f340 t drm_fb_xrgb8888_to_xbgr8888_line +ffffffff81a6f420 t drm_fb_xrgb8888_to_abgr8888_line +ffffffff81a70000 T drm_mode_legacy_fb_format +ffffffff81a700f0 T drm_driver_legacy_fb_format +ffffffff81a701f0 T __drm_format_info +ffffffff81a70270 T drm_format_info +ffffffff81a70320 T drm_get_format_info +ffffffff81a70410 T drm_format_info_block_width +ffffffff81a70460 T drm_format_info_block_height +ffffffff81a704b0 T drm_format_info_bpp +ffffffff81a70530 T drm_format_info_min_pitch +ffffffff81a71000 T drm_framebuffer_check_src_coords +ffffffff81a71130 T drm_mode_addfb +ffffffff81a71380 T drm_mode_addfb2 +ffffffff81a714a0 T drm_mode_addfb_ioctl +ffffffff81a714c0 T drm_internal_framebuffer_create +ffffffff81a71b00 T drm_mode_addfb2_ioctl +ffffffff81a71c20 T drm_mode_rmfb +ffffffff81a71e60 T drm_framebuffer_lookup +ffffffff81a71eb0 t drm_mode_rmfb_work_fn +ffffffff81a71f80 T drm_mode_rmfb_ioctl +ffffffff81a71fa0 T drm_mode_getfb +ffffffff81a72120 T drm_mode_getfb2_ioctl +ffffffff81a72510 T drm_mode_dirtyfb_ioctl +ffffffff81a726d0 T drm_fb_release +ffffffff81a72800 T drm_framebuffer_free +ffffffff81a72840 T drm_framebuffer_init +ffffffff81a729d0 T drm_framebuffer_unregister_private +ffffffff81a72a10 T drm_framebuffer_cleanup +ffffffff81a72a80 T drm_framebuffer_remove +ffffffff81a73000 T drm_framebuffer_plane_width +ffffffff81a73050 T drm_framebuffer_plane_height +ffffffff81a730a0 T drm_framebuffer_print_info +ffffffff81a74000 T drm_ref +ffffffff81a74030 T drm_unref +ffffffff81a740b0 T drm_fault +ffffffff81a742d0 T drm_flush +ffffffff81a74300 T udv_attach_drm +ffffffff81a74560 T drm_gem_init +ffffffff81a74640 t drm_gem_init_release +ffffffff81a74660 T drm_gem_object_init +ffffffff81a74810 T drm_gem_private_object_init +ffffffff81a74950 T drm_gem_private_object_fini +ffffffff81a749b0 T drm_gem_handle_delete +ffffffff81a74af0 t drm_gem_object_release_handle +ffffffff81a74b90 T drm_gem_dumb_map_offset +ffffffff81a74cf0 T drm_gem_object_lookup +ffffffff81a74d80 T drm_gem_create_mmap_offset +ffffffff81a74db0 T drm_gem_handle_create_tail +ffffffff81a74fa0 t drm_gem_object_handle_put_unlocked +ffffffff81a75110 T drm_gem_handle_create +ffffffff81a75160 T drm_gem_free_mmap_offset +ffffffff81a75190 T drm_gem_create_mmap_offset_size +ffffffff81a751c0 T drm_gem_get_pages +ffffffff81a75220 T drm_gem_put_pages +ffffffff81a75250 T drm_gem_objects_lookup +ffffffff81a75400 T drm_gem_dma_resv_wait +ffffffff81a75570 T drm_gem_close_ioctl +ffffffff81a755c0 T drm_gem_flink_ioctl +ffffffff81a75780 T drm_gem_open_ioctl +ffffffff81a758e0 T drm_gem_open +ffffffff81a75920 T drm_gem_release +ffffffff81a75960 T drm_gem_object_release +ffffffff81a75ad0 T drm_gem_lru_remove +ffffffff81a75bc0 T drm_gem_object_free +ffffffff81a75c10 T drm_gem_mmap_obj +ffffffff81a75d20 T drm_gem_mmap +ffffffff81a75fe0 T drm_gem_print_info +ffffffff81a76130 T drm_gem_pin +ffffffff81a76170 T drm_gem_unpin +ffffffff81a761b0 T drm_gem_vmap +ffffffff81a76220 T drm_gem_vunmap +ffffffff81a76290 T drm_gem_vmap_unlocked +ffffffff81a764d0 T drm_gem_vunmap_unlocked +ffffffff81a766d0 T drm_gem_lock_reservations +ffffffff81a76b40 T drm_gem_unlock_reservations +ffffffff81a76c70 T drm_gem_lru_init +ffffffff81a76cb0 T drm_gem_lru_move_tail_locked +ffffffff81a76db0 T drm_gem_lru_move_tail +ffffffff81a76ea0 T drm_gem_lru_scan +ffffffff81a77310 T drm_gem_evict +ffffffff81a78000 T drm_gem_plane_helper_prepare_fb +ffffffff81a79000 T drm_gem_dma_create +ffffffff81a79260 T drm_gem_dma_free_object +ffffffff81a79340 T drm_gem_dma_dumb_create_internal +ffffffff81a794b0 T drm_gem_dma_dumb_create +ffffffff81a794f0 T drm_gem_dma_fault +ffffffff81a796c0 T drm_gem_dma_get_sg_table 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linux_root_RB_INSERT +ffffffff81a80440 T linux_root_RB_FIND +ffffffff81a804a0 T linux_root_RB_NFIND +ffffffff81a80500 T linux_root_RB_NEXT +ffffffff81a80570 T linux_root_RB_PREV +ffffffff81a805e0 T linux_root_RB_MINMAX +ffffffff81a80630 T idr_init +ffffffff81a80660 T idr_destroy +ffffffff81a807c0 T idr_tree_SPLAY_REMOVE +ffffffff81a80860 T idr_preload +ffffffff81a80900 T idr_alloc +ffffffff81a80ab0 T idr_tree_SPLAY_INSERT +ffffffff81a80b60 T idr_replace +ffffffff81a80bf0 T idr_remove +ffffffff81a80cd0 T idr_find +ffffffff81a80d40 T idr_get_next +ffffffff81a80e70 T idr_for_each +ffffffff81a80f90 T idr_cmp +ffffffff81a80fd0 T idr_tree_SPLAY +ffffffff81a81100 T idr_tree_SPLAY_MINMAX +ffffffff81a811f0 T ida_init +ffffffff81a81220 T ida_destroy +ffffffff81a81230 T ida_simple_get +ffffffff81a81250 T ida_simple_remove +ffffffff81a81270 T ida_alloc_min +ffffffff81a81290 T ida_alloc_max +ffffffff81a812b0 T ida_free +ffffffff81a812d0 T xarray_cmp +ffffffff81a81310 T xarray_tree_SPLAY_INSERT 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acpi_evaluate_object +ffffffff81a82a80 T drm_linux_acpi_notify +ffffffff81a82b00 T register_acpi_notifier +ffffffff81a82b40 T unregister_acpi_notifier +ffffffff81a82bd0 T acpi_format_exception +ffffffff81a82c20 T acpi_target_system_state +ffffffff81a82c60 T backlight_do_update_status +ffffffff81a82c80 T backlight_device_register +ffffffff81a82d40 T backlight_device_unregister +ffffffff81a82da0 T backlight_schedule_update_status +ffffffff81a82dc0 T backlight_enable +ffffffff81a82e00 T backlight_disable +ffffffff81a82e40 T backlight_device_get_by_name +ffffffff81a82ec0 T dev_set_drvdata +ffffffff81a82f60 T dev_get_drvdata +ffffffff81a82fc0 T drm_sysfs_hotplug_event +ffffffff81a82fe0 T drm_sysfs_connector_hotplug_event +ffffffff81a83000 T drm_sysfs_connector_status_event +ffffffff81a83020 T drm_sysfs_connector_property_event +ffffffff81a83040 T dma_fence_get +ffffffff81a83080 T dma_fence_get_rcu +ffffffff81a830c0 T dma_fence_get_rcu_safe +ffffffff81a83100 T dma_fence_release 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T dma_buf_export +ffffffff81a85870 T dma_buf_get +ffffffff81a85910 T dma_buf_put +ffffffff81a859c0 T dma_buf_fd +ffffffff81a85b10 T get_dma_buf +ffffffff81a85b60 T pcie_get_speed_cap +ffffffff81a85d50 T printk +ffffffff81a85e00 T pcie_get_width_cap +ffffffff81a85f20 T pcie_aspm_enabled +ffffffff81a85fc0 T wait_on_bit +ffffffff81a860a0 T wait_on_bit_timeout +ffffffff81a86170 T wake_up_bit +ffffffff81a861c0 T clear_and_wake_up_bit +ffffffff81a86230 T bit_waitqueue +ffffffff81a86260 T __var_waitqueue +ffffffff81a86290 T drm_linux_init +ffffffff81a86450 T drm_linux_exit +ffffffff81a864d0 T pci_resize_resource +ffffffff81a86640 T register_shrinker +ffffffff81a86690 T unregister_shrinker +ffffffff81a866f0 T drmbackoff +ffffffff81a86780 T bitmap_zalloc +ffffffff81a867b0 T bitmap_free +ffffffff81a867d0 T atomic_dec_and_mutex_lock +ffffffff81a86860 T interval_tree_iter_first +ffffffff81a86910 T interval_tree_remove +ffffffff81a86930 T interval_tree_insert +ffffffff81a869a0 T syncfile_read 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mipi_dsi_dcs_write +ffffffff81a89a40 T mipi_dsi_dcs_read +ffffffff81a89ae0 T mipi_dsi_dcs_nop +ffffffff81a89b90 T mipi_dsi_dcs_soft_reset +ffffffff81a89c40 T mipi_dsi_dcs_get_power_mode +ffffffff81a89d00 T mipi_dsi_dcs_get_pixel_format +ffffffff81a89dc0 T mipi_dsi_dcs_enter_sleep_mode +ffffffff81a89e70 T mipi_dsi_dcs_exit_sleep_mode +ffffffff81a89f20 T mipi_dsi_dcs_set_display_off +ffffffff81a89fd0 T mipi_dsi_dcs_set_display_on +ffffffff81a8a080 T mipi_dsi_dcs_set_column_address +ffffffff81a8a140 T mipi_dsi_dcs_set_page_address +ffffffff81a8a200 T mipi_dsi_dcs_set_tear_off +ffffffff81a8a2b0 T mipi_dsi_dcs_set_tear_on +ffffffff81a8a370 T mipi_dsi_dcs_set_pixel_format +ffffffff81a8b000 T __drm_mm_interval_first +ffffffff81a8b0c0 T drm_mm_reserve_node +ffffffff81a8b360 t add_hole +ffffffff81a8b4d0 T drm_mm_insert_node_in_range +ffffffff81a8baf0 T drm_mm_remove_node +ffffffff81a8bc50 T drm_mm_replace_node +ffffffff81a8be30 T drm_mm_scan_init_with_range +ffffffff81a8bec0 T drm_mm_scan_add_block +ffffffff81a8c040 T drm_mm_scan_remove_block +ffffffff81a8c0c0 T drm_mm_scan_color_evict +ffffffff81a8c1b0 T drm_mm_init +ffffffff81a8c260 T drm_mm_takedown +ffffffff81a8c2a0 T drm_mm_print +ffffffff81a8d000 T drm_modeset_register_all +ffffffff81a8d0d0 T drm_modeset_unregister_all +ffffffff81a8d120 T drm_mode_getresources +ffffffff81a8d420 T drm_mode_config_reset +ffffffff81a8d5c0 T drmm_mode_config_init +ffffffff81a8dd80 T drm_mode_config_cleanup +ffffffff81a8e150 t drm_mode_config_init_release +ffffffff81a8e160 T drm_mode_config_validate +ffffffff81a8f000 T __drm_mode_object_add +ffffffff81a8f120 T drm_mode_object_add +ffffffff81a8f210 T drm_mode_object_register +ffffffff81a8f270 T drm_mode_object_unregister +ffffffff81a8f330 T drm_mode_object_lease_required +ffffffff81a8f380 T __drm_mode_object_find +ffffffff81a8f450 T drm_mode_object_find +ffffffff81a8f520 T drm_mode_object_put +ffffffff81a8f5b0 T drm_mode_object_get +ffffffff81a8f620 T drm_object_attach_property +ffffffff81a8f730 T drm_object_property_set_value +ffffffff81a8f810 T drm_object_property_get_value +ffffffff81a8f8a0 t __drm_object_property_get_value +ffffffff81a8f980 T drm_object_property_get_default_value +ffffffff81a8fa50 T drm_mode_object_get_properties +ffffffff81a8fbb0 T drm_mode_obj_get_properties_ioctl +ffffffff81a8fe60 T drm_mode_obj_find_prop_id +ffffffff81a8fec0 T drm_mode_obj_set_property_ioctl +ffffffff81a91000 T drm_mode_debug_printmodeline +ffffffff81a91140 T drm_mode_vrefresh +ffffffff81a911e0 T drm_mode_create +ffffffff81a91200 T drm_mode_destroy +ffffffff81a91240 T drm_mode_probed_add +ffffffff81a912f0 T drm_analog_tv_mode +ffffffff81a91c50 T drm_cvt_mode +ffffffff81a920e0 T drm_mode_set_name +ffffffff81a92130 T drm_gtf_mode_complex +ffffffff81a92440 T drm_gtf_mode +ffffffff81a924a0 T drm_mode_get_hv_timing +ffffffff81a924f0 T drm_mode_init +ffffffff81a925c0 T drm_mode_set_crtcinfo +ffffffff81a92780 T drm_mode_copy +ffffffff81a927e0 T drm_mode_duplicate +ffffffff81a92870 T drm_mode_match +ffffffff81a92a10 T drm_mode_equal +ffffffff81a92a30 T drm_mode_equal_no_clocks +ffffffff81a92a50 T drm_mode_equal_no_clocks_no_stereo +ffffffff81a92b10 T drm_mode_validate_driver +ffffffff81a92c00 T drm_mode_validate_size +ffffffff81a92c50 T drm_mode_validate_ycbcr420 +ffffffff81a92cc0 T drm_mode_is_420_only +ffffffff81a92d20 T drm_get_mode_status_name +ffffffff81a92da0 T drm_mode_prune_invalid +ffffffff81a93070 T drm_mode_sort +ffffffff81a930a0 t drm_mode_compare +ffffffff81a93240 T drm_connector_list_update +ffffffff81a93430 T drm_mode_parse_command_line_for_connector +ffffffff81a93460 T drm_mode_create_from_cmdline_mode +ffffffff81a93680 T drm_mode_convert_to_umode +ffffffff81a93820 T drm_mode_convert_umode +ffffffff81a93a50 T drm_mode_is_420_also +ffffffff81a93ab0 T drm_mode_is_420 +ffffffff81a94000 T drm_helper_move_panel_connectors_to_head +ffffffff81a94100 T drm_helper_mode_fill_fb_struct +ffffffff81a941d0 T drm_crtc_init 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drm_mode_getplane +ffffffff81a9c1d0 T drm_plane_check_pixel_format +ffffffff81a9c290 T drm_any_plane_has_format +ffffffff81a9c3b0 T drm_mode_setplane +ffffffff81a9c720 T drm_mode_cursor_ioctl +ffffffff81a9c790 t drm_mode_cursor_common +ffffffff81a9cd60 T drm_mode_cursor2_ioctl +ffffffff81a9cd80 T drm_mode_page_flip_ioctl +ffffffff81a9d3c0 T drm_plane_enable_fb_damage_clips +ffffffff81a9d3e0 T drm_plane_get_damage_clips_count +ffffffff81a9d420 T __drm_plane_get_damage_clips +ffffffff81a9d460 T drm_plane_get_damage_clips +ffffffff81a9d500 T drm_create_scaling_filter_prop +ffffffff81a9d680 T drm_plane_create_scaling_filter_property +ffffffff81a9d700 t kvasprintf +ffffffff81a9d7c0 t kasprintf +ffffffff81a9d8a0 t create_in_format_blob +ffffffff81a9dab0 t __setplane_atomic +ffffffff81a9dc60 t __setplane_internal +ffffffff81a9dea0 t __setplane_check +ffffffff81a9f000 T drm_plane_helper_update_primary +ffffffff81a9f520 t get_connectors_for_crtc +ffffffff81a9f660 T drm_plane_helper_disable_primary +ffffffff81a9f720 T drm_plane_helper_destroy +ffffffff81a9f760 T drm_plane_helper_atomic_check +ffffffff81aa0000 T drm_prime_remove_buf_handle +ffffffff81aa00d0 T drm_prime_init_file_private +ffffffff81aa0130 T drm_prime_destroy_file_private +ffffffff81aa0190 T drm_gem_dmabuf_export +ffffffff81aa0210 T drm_gem_dmabuf_release +ffffffff81aa0250 T drm_gem_prime_fd_to_handle +ffffffff81aa04e0 T drm_gem_prime_import +ffffffff81aa0550 t drm_prime_add_buf_handle +ffffffff81aa06b0 T drm_prime_fd_to_handle_ioctl +ffffffff81aa06e0 T drm_gem_prime_handle_to_fd +ffffffff81aa0990 T drm_prime_handle_to_fd_ioctl +ffffffff81aa0a00 T drm_gem_map_attach +ffffffff81aa0a50 T drm_gem_map_detach +ffffffff81aa0a70 T drm_gem_dmabuf_vmap +ffffffff81aa0a90 T drm_gem_dmabuf_vunmap +ffffffff81aa0ab0 T drm_gem_prime_mmap +ffffffff81aa0b10 T drm_prime_pages_to_sg +ffffffff81aa0b70 T drm_prime_get_contiguous_size +ffffffff81aa0bc0 T drm_gem_prime_export +ffffffff81aa0c60 T drm_gem_prime_import_dev +ffffffff81aa0cd0 T drm_prime_sg_to_page_array +ffffffff81aa0d30 T drm_prime_sg_to_dma_addr_array +ffffffff81aa0d90 T drm_prime_gem_destroy +ffffffff81aa1000 T __drm_puts_coredump +ffffffff81aa1100 T __drm_printfn_coredump +ffffffff81aa1320 T __drm_puts_seq_file +ffffffff81aa1350 T __drm_printfn_seq_file +ffffffff81aa1380 T __drm_printfn_info +ffffffff81aa13b0 T __drm_printfn_debug +ffffffff81aa13e0 T __drm_printfn_err +ffffffff81aa1420 T drm_puts +ffffffff81aa1450 T drm_printf +ffffffff81aa14e0 T drm_print_bits +ffffffff81aa1740 T drm_dev_printk +ffffffff81aa17e0 T __drm_dev_dbg +ffffffff81aa1880 T ___drm_dbg +ffffffff81aa1920 T __drm_err +ffffffff81aa19c0 T drm_print_regset32 +ffffffff81aa2000 T drm_crtc_mode_valid +ffffffff81aa2050 T drm_encoder_mode_valid +ffffffff81aa2090 T drm_connector_mode_valid +ffffffff81aa2110 T drm_kms_helper_poll_enable +ffffffff81aa22d0 T drm_kms_helper_poll_reschedule +ffffffff81aa2330 T drm_helper_probe_detect +ffffffff81aa2570 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drm_property_add_enum +ffffffff81aa5510 T drm_property_destroy +ffffffff81aa55d0 T drm_property_create_bitmask +ffffffff81aa5710 T drm_property_create_range +ffffffff81aa5780 T drm_property_create_signed_range +ffffffff81aa57f0 T drm_property_create_object +ffffffff81aa58a0 T drm_property_create_bool +ffffffff81aa5910 T drm_mode_getproperty_ioctl +ffffffff81aa5b90 T drm_property_create_blob +ffffffff81aa5d00 t drm_property_free_blob +ffffffff81aa5d90 T drm_property_blob_put +ffffffff81aa5dd0 T drm_property_destroy_user_blobs +ffffffff81aa5e60 T drm_property_blob_get +ffffffff81aa5eb0 T drm_property_lookup_blob +ffffffff81aa5ed0 T drm_property_replace_global_blob +ffffffff81aa6050 T drm_property_replace_blob +ffffffff81aa60c0 T drm_mode_getblob_ioctl +ffffffff81aa61a0 T drm_mode_createblob_ioctl +ffffffff81aa62d0 T drm_mode_destroyblob_ioctl +ffffffff81aa6410 T drm_property_change_valid_get +ffffffff81aa6680 T drm_property_change_valid_put +ffffffff81aa7000 T drm_rect_intersect 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drm_syncobj_replace_fence +ffffffff81aab4e0 T drm_syncobj_find_fence +ffffffff81aab8e0 t drm_syncobj_fence_add_wait +ffffffff81aab9e0 T drm_syncobj_free +ffffffff81aaba90 T drm_syncobj_create +ffffffff81aabcb0 T drm_syncobj_get_handle +ffffffff81aabe10 T drm_syncobj_get_fd +ffffffff81aabe70 T drm_syncobj_open +ffffffff81aabeb0 T drm_syncobj_release +ffffffff81aabef0 t drm_syncobj_release_handle +ffffffff81aabfd0 T drm_syncobj_create_ioctl +ffffffff81aac140 T drm_syncobj_destroy_ioctl +ffffffff81aac2b0 T drm_syncobj_handle_to_fd_ioctl +ffffffff81aac520 T drm_syncobj_fd_to_handle_ioctl +ffffffff81aac740 T drm_syncobj_transfer_ioctl +ffffffff81aacc20 T drm_timeout_abs_to_jiffies +ffffffff81aacd00 T drm_syncobj_wait_ioctl +ffffffff81aacea0 t drm_syncobj_array_find +ffffffff81aad140 t drm_syncobj_array_free +ffffffff81aad250 T drm_syncobj_timeline_wait_ioctl +ffffffff81aad3f0 T drm_syncobj_eventfd_ioctl +ffffffff81aad420 T drm_syncobj_reset_ioctl +ffffffff81aad520 T drm_syncobj_signal_ioctl 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drm_crtc_next_vblank_start +ffffffff81ab06d0 T drm_crtc_arm_vblank_event +ffffffff81ab07b0 T drm_crtc_send_vblank_event +ffffffff81ab0980 t send_vblank_event +ffffffff81ab0a30 T drm_vblank_get +ffffffff81ab0b50 t drm_vblank_enable +ffffffff81ab0da0 T drm_crtc_vblank_get +ffffffff81ab0ec0 T drm_vblank_put +ffffffff81ab0ff0 T drm_crtc_vblank_put +ffffffff81ab1010 T drm_wait_one_vblank +ffffffff81ab1580 T drm_crtc_wait_one_vblank +ffffffff81ab15a0 T drm_crtc_vblank_off +ffffffff81ab1a10 T drm_crtc_vblank_reset +ffffffff81ab1b50 T drm_crtc_set_max_vblank_count +ffffffff81ab1c30 T drm_crtc_vblank_on +ffffffff81ab1da0 t drm_reset_vblank_timestamp +ffffffff81ab1fe0 T drm_crtc_vblank_restore +ffffffff81ab2410 T drm_legacy_modeset_ctl_ioctl +ffffffff81ab2670 T drm_wait_vblank_ioctl +ffffffff81ab2c70 t drm_wait_vblank_reply +ffffffff81ab2d90 t drm_queue_vblank_event +ffffffff81ab3130 T drm_handle_vblank +ffffffff81ab34d0 t drm_handle_vblank_events +ffffffff81ab3790 T drm_crtc_handle_vblank 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hdmi_avi_infoframe_pack_only +ffffffff81ab62d0 T hdmi_avi_infoframe_pack +ffffffff81ab6330 T hdmi_spd_infoframe_init +ffffffff81ab6410 T hdmi_spd_infoframe_check +ffffffff81ab6460 T hdmi_spd_infoframe_pack_only +ffffffff81ab65a0 T hdmi_spd_infoframe_pack +ffffffff81ab6710 T hdmi_audio_infoframe_init +ffffffff81ab6760 T hdmi_audio_infoframe_check +ffffffff81ab67b0 T hdmi_audio_infoframe_pack_only +ffffffff81ab6910 T hdmi_audio_infoframe_pack +ffffffff81ab6960 T hdmi_audio_infoframe_pack_for_dp +ffffffff81ab6a50 T hdmi_vendor_infoframe_init +ffffffff81ab6ab0 T hdmi_vendor_infoframe_check +ffffffff81ab6b50 T hdmi_vendor_infoframe_pack_only +ffffffff81ab6d10 T hdmi_vendor_infoframe_pack +ffffffff81ab6db0 T hdmi_drm_infoframe_init +ffffffff81ab6e10 T hdmi_drm_infoframe_check +ffffffff81ab6e60 T hdmi_drm_infoframe_pack_only +ffffffff81ab7060 T hdmi_drm_infoframe_pack +ffffffff81ab70b0 T hdmi_infoframe_check +ffffffff81ab7210 T hdmi_infoframe_pack_only +ffffffff81ab7440 T hdmi_infoframe_pack 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drm_dp_get_adjust_request_pre_emphasis +ffffffff81abf180 T drm_dp_get_adjust_tx_ffe_preset +ffffffff81abf1c0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff81abf240 T drm_dp_128b132b_lane_symbol_locked +ffffffff81abf2b0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff81abf2e0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff81abf310 T drm_dp_128b132b_link_training_failed +ffffffff81abf340 T drm_dp_read_clock_recovery_delay +ffffffff81abf450 T drm_dp_read_channel_eq_delay +ffffffff81abf560 T drm_dp_128b132b_read_aux_rd_interval +ffffffff81abf630 T drm_dp_link_train_clock_recovery_delay +ffffffff81abf6c0 t __8b10b_clock_recovery_delay_us +ffffffff81abf740 T drm_dp_link_train_channel_eq_delay +ffffffff81abf7b0 T drm_dp_phy_name +ffffffff81abf7f0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff81abf810 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff81abf880 T drm_dp_link_rate_to_bw_code +ffffffff81abf8f0 T drm_dp_bw_code_to_link_rate +ffffffff81abf950 T drm_dp_dpcd_probe +ffffffff81abfac0 t drm_dp_dpcd_access +ffffffff81abfc30 T drm_dp_dpcd_set_powered +ffffffff81abfca0 T drm_dp_dpcd_read +ffffffff81abfe00 T drm_dp_dpcd_write +ffffffff81abff30 T drm_dp_dpcd_read_link_status +ffffffff81abff50 T drm_dp_dpcd_read_phy_link_status +ffffffff81ac0060 T drm_dp_downstream_is_type +ffffffff81ac00b0 T drm_dp_downstream_is_tmds +ffffffff81ac0120 T drm_dp_send_real_edid_checksum +ffffffff81ac03c0 T drm_dp_read_dpcd_caps +ffffffff81ac0580 T drm_dp_read_downstream_info +ffffffff81ac0690 T drm_dp_downstream_max_dotclock +ffffffff81ac06e0 T drm_dp_downstream_max_tmds_clock +ffffffff81ac0780 T drm_dp_downstream_min_tmds_clock +ffffffff81ac0800 T drm_dp_downstream_max_bpc +ffffffff81ac08a0 T drm_dp_downstream_420_passthrough +ffffffff81ac0900 T drm_dp_downstream_444_to_420_conversion +ffffffff81ac0960 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff81ac09c0 T drm_dp_downstream_mode +ffffffff81ac0a50 T drm_dp_downstream_id +ffffffff81ac0a70 T drm_dp_downstream_debug +ffffffff81ac0b30 T drm_dp_subconnector_type +ffffffff81ac0ba0 T drm_dp_set_subconnector_property +ffffffff81ac0c10 T drm_dp_read_sink_count_cap +ffffffff81ac0c60 T drm_dp_read_sink_count +ffffffff81ac0cd0 T drm_dp_remote_aux_init +ffffffff81ac0d00 t drm_dp_aux_crc_work +ffffffff81ac0ea0 T drm_dp_aux_init +ffffffff81ac0f70 T drm_dp_aux_register +ffffffff81ac10c0 T drm_dp_aux_unregister +ffffffff81ac10f0 T drm_dp_psr_setup_time +ffffffff81ac1140 T drm_dp_start_crc +ffffffff81ac1200 T drm_dp_stop_crc +ffffffff81ac12b0 T drm_dp_read_desc +ffffffff81ac14b0 T drm_dp_dsc_sink_max_slice_count +ffffffff81ac1540 T drm_dp_dsc_sink_line_buf_depth +ffffffff81ac1580 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff81ac15f0 T drm_dp_read_lttpr_common_caps +ffffffff81ac16c0 T drm_dp_read_lttpr_phy_caps +ffffffff81ac1790 T drm_dp_lttpr_count +ffffffff81ac1830 T drm_dp_lttpr_max_link_rate +ffffffff81ac1890 T drm_dp_lttpr_max_lane_count +ffffffff81ac18c0 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff81ac18f0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff81ac1920 T drm_dp_get_phy_test_pattern +ffffffff81ac1a70 T drm_dp_set_phy_test_pattern +ffffffff81ac1b40 T drm_dp_vsc_sdp_log +ffffffff81ac1ea0 T drm_dp_get_pcon_max_frl_bw +ffffffff81ac1ef0 T drm_dp_pcon_frl_prepare +ffffffff81ac1f50 T drm_dp_pcon_is_frl_ready +ffffffff81ac1fb0 T drm_dp_pcon_frl_configure_1 +ffffffff81ac20c0 T drm_dp_pcon_frl_configure_2 +ffffffff81ac2130 T drm_dp_pcon_reset_frl_config +ffffffff81ac2190 T drm_dp_pcon_frl_enable +ffffffff81ac2260 T drm_dp_pcon_hdmi_link_active +ffffffff81ac22c0 T drm_dp_pcon_hdmi_link_mode +ffffffff81ac2340 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff81ac2450 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff81ac2480 T drm_dp_pcon_dsc_max_slices +ffffffff81ac2510 T drm_dp_pcon_dsc_max_slice_width +ffffffff81ac2540 T drm_dp_pcon_dsc_bpp_incr +ffffffff81ac2580 T drm_dp_pcon_pps_default +ffffffff81ac2610 T drm_dp_pcon_pps_override_buf +ffffffff81ac26d0 T drm_dp_pcon_pps_override_param +ffffffff81ac27e0 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff81ac2890 T drm_edp_backlight_set_level +ffffffff81ac2980 T drm_edp_backlight_enable +ffffffff81ac2bd0 t drm_edp_backlight_set_enable +ffffffff81ac2d30 T drm_edp_backlight_disable +ffffffff81ac2d80 T drm_edp_backlight_init +ffffffff81ac3340 T drm_panel_dp_aux_backlight +ffffffff81ac3500 t __128b132b_channel_eq_delay_us +ffffffff81ac3580 t __8b10b_channel_eq_delay_us +ffffffff81ac3600 t drm_dp_aux_get_crc +ffffffff81ac3700 t drm_dp_i2c_xfer +ffffffff81ac39a0 t drm_dp_i2c_functionality +ffffffff81ac39d0 t drm_dp_i2c_do_msg +ffffffff81ac3e00 t lock_bus +ffffffff81ac3e20 t trylock_bus +ffffffff81ac3e80 t unlock_bus +ffffffff81ac3ea0 t dp_aux_backlight_update_status +ffffffff81ac4000 T drm_dp_encode_sideband_req +ffffffff81ac4470 T drm_dp_decode_sideband_req +ffffffff81ac49e0 T drm_dp_dump_sideband_msg_req_body +ffffffff81ac4de0 T drm_dp_mst_get_port_malloc +ffffffff81ac4e30 T drm_dp_mst_put_port_malloc +ffffffff81ac4f40 t kref_put +ffffffff81ac4f80 T drm_atomic_get_mst_payload_state +ffffffff81ac4fd0 T drm_dp_mst_dpcd_read +ffffffff81ac52f0 T drm_dp_mst_dpcd_write +ffffffff81ac5350 t drm_dp_send_dpcd_write +ffffffff81ac55f0 T drm_dp_mst_connector_late_register +ffffffff81ac5680 T drm_dp_mst_connector_early_unregister +ffffffff81ac56c0 T drm_dp_send_power_updown_phy +ffffffff81ac5980 t drm_dp_mst_topology_put_port +ffffffff81ac5ac0 t drm_dp_mst_wait_tx_reply +ffffffff81ac5ea0 T drm_dp_send_query_stream_enc_status +ffffffff81ac61d0 T drm_dp_add_payload_part1 +ffffffff81ac63c0 T drm_dp_remove_payload +ffffffff81ac6590 T drm_dp_add_payload_part2 +ffffffff81ac67a0 T drm_dp_get_vc_payload_bw +ffffffff81ac6840 T drm_dp_read_mst_cap +ffffffff81ac68a0 T drm_dp_mst_topology_mgr_set_mst +ffffffff81ac6bb0 t drm_dp_dpcd_write_payload +ffffffff81ac6d80 t drm_dp_mst_topology_put_mstb +ffffffff81ac6ea0 T drm_dp_mst_topology_mgr_suspend +ffffffff81ac6fb0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff81ac7020 T drm_dp_mst_topology_mgr_resume +ffffffff81ac72d0 T drm_dp_mst_hpd_irq_handle_event +ffffffff81ac8340 T drm_dp_mst_hpd_irq_send_new_request +ffffffff81ac83e0 T drm_dp_mst_detect_port +ffffffff81ac8580 T drm_dp_mst_edid_read +ffffffff81ac86b0 T drm_dp_mst_get_edid +ffffffff81ac8740 T drm_dp_atomic_find_time_slots +ffffffff81ac8a30 T drm_atomic_get_mst_topology_state +ffffffff81ac8a40 T drm_dp_atomic_release_time_slots +ffffffff81ac8c90 T drm_dp_mst_atomic_setup_commit +ffffffff81ac8e20 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff81ac8fa0 T drm_dp_mst_root_conn_atomic_check +ffffffff81ac90d0 T drm_dp_mst_update_slots +ffffffff81ac9130 T drm_dp_check_act_status +ffffffff81ac9320 T drm_dp_calc_pbn_mode +ffffffff81ac9380 T drm_dp_mst_dump_topology +ffffffff81ac96b0 t drm_dp_mst_dump_mstb +ffffffff81ac9720 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff81ac9890 T drm_dp_mst_dsc_aux_for_port +ffffffff81ac9b20 T drm_dp_mst_atomic_enable_dsc +ffffffff81ac9cd0 T drm_dp_mst_atomic_check +ffffffff81aca000 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff81aca2c0 t drm_dp_mst_duplicate_state +ffffffff81aca4c0 t drm_dp_mst_destroy_state +ffffffff81aca5a0 T drm_atomic_get_old_mst_topology_state +ffffffff81aca5b0 T drm_atomic_get_new_mst_topology_state +ffffffff81aca5c0 T drm_dp_mst_topology_mgr_init +ffffffff81aca8a0 t drm_dp_mst_link_probe_work +ffffffff81acabb0 t drm_dp_tx_work +ffffffff81acac00 t drm_dp_delayed_destroy_work +ffffffff81acb1b0 t drm_dp_mst_up_req_work +ffffffff81acb7f0 T drm_dp_mst_topology_mgr_destroy +ffffffff81acb8a0 t drm_dp_mst_is_virtual_dpcd +ffffffff81acb9a0 t drm_dp_free_mst_branch_device +ffffffff81acb9e0 t drm_dp_mst_topology_get_port_validated_locked +ffffffff81acba70 t drm_dp_mst_dump_sideband_msg_tx +ffffffff81acbcc0 t process_single_down_tx_qlock +ffffffff81acbe50 t process_single_tx_qlock +ffffffff81acc350 t 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drm_dsc_initial_scale_value +ffffffff81ad09b0 T drm_dsc_flatness_det_thresh +ffffffff81ad1000 T drm_connector_attach_content_protection_property +ffffffff81ad1030 T drm_hdcp_check_ksvs_revoked +ffffffff81ad1090 T drm_hdcp_update_content_protection +ffffffff81ad2000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff81ad2120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff81ad2180 T drm_hdmi_avi_infoframe_bars +ffffffff81ad21d0 T drm_hdmi_avi_infoframe_content_type +ffffffff81ad3000 T drm_scdc_read +ffffffff81ad30a0 T drm_scdc_write +ffffffff81ad31a0 T drm_scdc_get_scrambling_status +ffffffff81ad3280 T drm_scdc_set_scrambling +ffffffff81ad3440 T drm_scdc_set_high_tmds_clock_ratio +ffffffff81ad4000 T drm_gem_ttm_mmap +ffffffff81ad4080 T drm_gem_ttm_vmap +ffffffff81ad4090 T drm_gem_ttm_vunmap +ffffffff81ad5000 T ttm_agp_bind +ffffffff81ad5060 T ttm_agp_unbind +ffffffff81ad5080 T ttm_agp_is_bound +ffffffff81ad50d0 T ttm_agp_destroy +ffffffff81ad50f0 T ttm_agp_tt_create +ffffffff81ad6000 T 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ttm_eu_reserve_buffers +ffffffff81add680 T ttm_eu_fence_buffer_objects +ffffffff81add820 t __ww_mutex_lock +ffffffff81ade000 T ttm_prot_from_caching +ffffffff81adf000 T ttm_pool_alloc +ffffffff81adfb50 t ttm_pool_free_range +ffffffff81adfed0 T ttm_pool_free +ffffffff81adff40 t ttm_pool_shrink +ffffffff81ae01a0 T ttm_pool_init +ffffffff81ae0480 T ttm_pool_fini +ffffffff81ae06d0 t ttm_pool_type_fini +ffffffff81ae0970 T ttm_pool_mgr_init +ffffffff81ae0cd0 t ttm_pool_shrinker_count +ffffffff81ae0d30 t ttm_pool_shrinker_scan +ffffffff81ae0d90 T ttm_pool_mgr_fini +ffffffff81ae1000 T ttm_range_man_init_nocheck +ffffffff81ae11b0 T ttm_range_man_fini_nocheck +ffffffff81ae1380 t ttm_range_man_alloc +ffffffff81ae1510 t ttm_range_man_free +ffffffff81ae1590 t ttm_range_man_intersects +ffffffff81ae15f0 t ttm_range_man_compatible +ffffffff81ae1650 t ttm_range_man_debug +ffffffff81ae2000 T ttm_lru_bulk_move_init +ffffffff81ae2020 T ttm_lru_bulk_move_tail +ffffffff81ae21e0 T ttm_resource_add_bulk_move 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drm_sched_init +ffffffff81aea4e0 t drm_sched_job_timedout +ffffffff81aea660 t drm_sched_main +ffffffff81aeaba0 T drm_sched_fini +ffffffff81aeae00 T drm_sched_increase_karma +ffffffff81aeaf50 t __delayed_work_tick +ffffffff81aeaf70 t drm_sched_get_cleanup_job +ffffffff81aeb0f0 t drm_sched_select_entity +ffffffff81aec000 t ch7017_init +ffffffff81aec160 t ch7017_dpms +ffffffff81aec470 t ch7017_mode_valid +ffffffff81aec4b0 t ch7017_mode_set +ffffffff81aec7e0 t ch7017_detect +ffffffff81aec810 t ch7017_get_hw_state +ffffffff81aec8a0 t ch7017_destroy +ffffffff81aec900 t ch7017_dump_regs +ffffffff81aed000 t ch7xxx_init +ffffffff81aed2d0 t ch7xxx_dpms +ffffffff81aed3b0 t ch7xxx_mode_valid +ffffffff81aed3f0 t ch7xxx_mode_set +ffffffff81aed9d0 t ch7xxx_detect +ffffffff81aedc50 t ch7xxx_get_hw_state +ffffffff81aedd30 t ch7xxx_destroy +ffffffff81aedd90 t ch7xxx_dump_regs +ffffffff81aee000 t ivch_init +ffffffff81aee3f0 t ivch_dpms +ffffffff81aee710 t ivch_mode_valid +ffffffff81aee750 t ivch_mode_set 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i9xx_check_plane_surface +ffffffff81afc310 T i965_plane_max_stride +ffffffff81afc380 T intel_primary_plane_create +ffffffff81afc850 t i9xx_plane_min_cdclk +ffffffff81afc8c0 t i9xx_plane_max_stride +ffffffff81afc930 t hsw_primary_max_stride +ffffffff81afc990 t ilk_primary_max_stride +ffffffff81afca00 t i830_plane_update_arm +ffffffff81afca50 t i9xx_plane_update_noarm +ffffffff81afcb80 t i9xx_plane_update_arm +ffffffff81afcf30 t i9xx_plane_disable_arm +ffffffff81afd040 t i9xx_plane_get_hw_state +ffffffff81afd140 t i9xx_plane_check +ffffffff81afd280 t vlv_primary_async_flip +ffffffff81afd310 t vlv_primary_enable_flip_done +ffffffff81afd380 t vlv_primary_disable_flip_done +ffffffff81afd3f0 t g4x_primary_async_flip +ffffffff81afd520 t bdw_primary_enable_flip_done +ffffffff81afd590 t bdw_primary_disable_flip_done +ffffffff81afd600 t ivb_primary_enable_flip_done +ffffffff81afd670 t ivb_primary_disable_flip_done +ffffffff81afd6e0 t ilk_primary_enable_flip_done +ffffffff81afd750 t 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gen11_dsi_disable +ffffffff81b0c500 t gen11_dsi_post_disable +ffffffff81b0d380 t gen11_dsi_get_config +ffffffff81b0d5d0 t gen11_dsi_sync_state +ffffffff81b0d690 t gen11_dsi_compute_config +ffffffff81b0da50 t gen11_dsi_get_hw_state +ffffffff81b0dc20 t gen11_dsi_initial_fastset_check +ffffffff81b0dca0 t gen11_dsi_get_power_domains +ffffffff81b0dd90 t gen11_dsi_gate_clocks +ffffffff81b0de60 t gen11_dsi_is_clock_enabled +ffffffff81b0df30 t gen11_dsi_encoder_destroy +ffffffff81b0df40 t wait_for_cmds_dispatched_to_panel +ffffffff81b0e430 t wait_for_header_credits +ffffffff81b0e5f0 t wait_for_payload_credits +ffffffff81b0e7b0 t gen11_dsi_mode_valid +ffffffff81b0e830 t gen11_dsi_host_attach +ffffffff81b0e860 t gen11_dsi_host_detach +ffffffff81b0e890 t gen11_dsi_host_transfer +ffffffff81b0f000 T intel_digital_connector_atomic_get_property +ffffffff81b0f0a0 T intel_digital_connector_atomic_set_property +ffffffff81b0f130 T intel_digital_connector_atomic_check +ffffffff81b0f240 T intel_digital_connector_duplicate_state +ffffffff81b0f2d0 T intel_connector_needs_modeset +ffffffff81b0f340 T intel_any_crtc_needs_modeset +ffffffff81b0f3d0 T intel_atomic_get_digital_connector_state +ffffffff81b0f3e0 T intel_crtc_duplicate_state +ffffffff81b0f530 T intel_crtc_free_hw_state +ffffffff81b0f5b0 T intel_crtc_destroy_state +ffffffff81b0f690 T intel_atomic_state_alloc +ffffffff81b0f730 T intel_atomic_state_free +ffffffff81b0f780 T intel_atomic_state_clear +ffffffff81b0f7e0 T intel_atomic_get_crtc_state +ffffffff81b10000 T intel_plane_alloc +ffffffff81b100e0 T intel_plane_free +ffffffff81b10120 T intel_plane_destroy_state +ffffffff81b101f0 T intel_plane_duplicate_state +ffffffff81b102c0 T intel_adjusted_rate +ffffffff81b10340 T intel_plane_pixel_rate +ffffffff81b103d0 T intel_plane_data_rate +ffffffff81b10490 T intel_plane_calc_min_cdclk +ffffffff81b10610 T intel_plane_copy_uapi_to_hw_state +ffffffff81b10780 T intel_plane_copy_hw_state +ffffffff81b10870 T intel_plane_set_invisible +ffffffff81b10970 T intel_plane_atomic_check_with_state +ffffffff81b11610 T intel_plane_atomic_check +ffffffff81b11790 T intel_plane_update_noarm +ffffffff81b117d0 T intel_plane_update_arm +ffffffff81b11810 T intel_plane_disable_arm +ffffffff81b11830 T intel_crtc_planes_update_noarm +ffffffff81b11960 T intel_crtc_planes_update_arm +ffffffff81b11d90 T intel_atomic_plane_check_clipping +ffffffff81b12050 T intel_plane_check_src_coordinates +ffffffff81b12220 T intel_plane_helper_add +ffffffff81b12260 t intel_prepare_plane_fb +ffffffff81b12540 t intel_cleanup_plane_fb +ffffffff81b13000 T intel_audio_sdp_split_update +ffffffff81b130e0 T intel_audio_compute_config +ffffffff81b131a0 T intel_audio_codec_enable +ffffffff81b133b0 T intel_audio_codec_disable +ffffffff81b13630 T intel_audio_codec_get_config +ffffffff81b13680 T intel_audio_hooks_init +ffffffff81b13700 T intel_audio_cdclk_change_pre +ffffffff81b137a0 T intel_audio_cdclk_change_post +ffffffff81b13890 T intel_audio_init +ffffffff81b138a0 T intel_audio_register +ffffffff81b138d0 T intel_audio_deinit +ffffffff81b13920 t g4x_audio_codec_enable +ffffffff81b13b30 t g4x_audio_codec_disable +ffffffff81b13bd0 t g4x_audio_codec_get_config +ffffffff81b13d10 t ibx_audio_codec_enable +ffffffff81b13f10 t ibx_audio_codec_disable +ffffffff81b14120 t intel_acomp_get_config +ffffffff81b141a0 t audio_config_hdmi_pixel_clock +ffffffff81b14390 t hsw_audio_codec_enable +ffffffff81b14b20 t hsw_audio_codec_disable +ffffffff81b15000 T intel_backlight_invert_pwm_level +ffffffff81b150c0 T intel_backlight_set_pwm_level +ffffffff81b15130 T intel_backlight_level_to_pwm +ffffffff81b15350 T intel_backlight_level_from_pwm +ffffffff81b15510 T intel_backlight_set_acpi +ffffffff81b15750 T intel_backlight_disable +ffffffff81b15840 T intel_backlight_enable +ffffffff81b15900 t __intel_backlight_enable +ffffffff81b15a50 T intel_backlight_device_register +ffffffff81b15d70 t kasprintf +ffffffff81b15e50 T intel_backlight_device_unregister +ffffffff81b15eb0 T intel_backlight_update +ffffffff81b15f50 T intel_backlight_setup +ffffffff81b16140 T intel_backlight_destroy +ffffffff81b16170 T intel_backlight_init_funcs +ffffffff81b162f0 t intel_backlight_device_update_status +ffffffff81b16550 t intel_backlight_device_get_brightness +ffffffff81b16720 t bxt_setup_backlight +ffffffff81b169b0 t bxt_get_backlight +ffffffff81b169f0 t bxt_set_backlight +ffffffff81b16a30 t bxt_disable_backlight +ffffffff81b16b90 t bxt_enable_backlight +ffffffff81b16e70 t bxt_hz_to_pwm +ffffffff81b16eb0 t cnp_setup_backlight +ffffffff81b171b0 t cnp_disable_backlight +ffffffff81b17290 t cnp_enable_backlight +ffffffff81b17480 t cnp_hz_to_pwm +ffffffff81b174c0 t lpt_setup_backlight +ffffffff81b178a0 t lpt_get_backlight +ffffffff81b17900 t lpt_set_backlight +ffffffff81b17980 t lpt_disable_backlight +ffffffff81b17ad0 t lpt_enable_backlight +ffffffff81b17d20 t lpt_hz_to_pwm +ffffffff81b17d90 t pch_get_backlight +ffffffff81b17df0 t spt_hz_to_pwm +ffffffff81b17e40 t pch_setup_backlight +ffffffff81b18090 t pch_set_backlight +ffffffff81b18110 t pch_disable_backlight +ffffffff81b18230 t pch_enable_backlight +ffffffff81b184f0 t pch_hz_to_pwm +ffffffff81b18530 t ext_pwm_setup_backlight +ffffffff81b185f0 t ext_pwm_get_backlight +ffffffff81b18640 t ext_pwm_set_backlight +ffffffff81b18660 t ext_pwm_disable_backlight +ffffffff81b18680 t ext_pwm_enable_backlight +ffffffff81b186b0 t vlv_setup_backlight +ffffffff81b18940 t vlv_get_backlight +ffffffff81b189f0 t vlv_set_backlight +ffffffff81b18a80 t vlv_disable_backlight +ffffffff81b18b60 t vlv_enable_backlight +ffffffff81b18d40 t vlv_hz_to_pwm +ffffffff81b18df0 t i965_setup_backlight +ffffffff81b19060 t i9xx_get_backlight +ffffffff81b19110 t i9xx_set_backlight +ffffffff81b19270 t i965_disable_backlight +ffffffff81b19340 t i965_enable_backlight +ffffffff81b19530 t i965_hz_to_pwm +ffffffff81b19590 t i9xx_setup_backlight +ffffffff81b19910 t i9xx_disable_backlight +ffffffff81b19980 t i9xx_enable_backlight +ffffffff81b19b60 t i9xx_hz_to_pwm +ffffffff81b19bc0 t intel_pwm_setup_backlight +ffffffff81b19ce0 t intel_pwm_get_backlight +ffffffff81b19dc0 t intel_pwm_set_backlight +ffffffff81b19e80 t intel_pwm_disable_backlight +ffffffff81b19f40 t intel_pwm_enable_backlight +ffffffff81b1b000 T intel_bios_encoder_port +ffffffff81b1b080 t dvo_port_to_port +ffffffff81b1b260 T intel_bios_dp_max_link_rate +ffffffff81b1b2e0 T intel_bios_dp_max_lane_count +ffffffff81b1b330 T intel_bios_encoder_supports_dvi +ffffffff81b1b360 T intel_bios_encoder_supports_hdmi +ffffffff81b1b3a0 T intel_bios_encoder_supports_dp +ffffffff81b1b3d0 T intel_bios_encoder_supports_edp +ffffffff81b1b410 T intel_bios_encoder_supports_dsi +ffffffff81b1b440 T intel_bios_encoder_is_lspcon +ffffffff81b1b490 T intel_bios_hdmi_level_shift +ffffffff81b1b4f0 T intel_bios_hdmi_max_tmds_clock +ffffffff81b1b580 T intel_bios_is_valid_vbt +ffffffff81b1b680 T intel_bios_init +ffffffff81b1d750 T intel_bios_init_panel_early +ffffffff81b1d770 t intel_bios_init_panel +ffffffff81b1fa40 T intel_bios_init_panel_late +ffffffff81b1fa60 T intel_bios_driver_remove +ffffffff81b1fb70 T intel_bios_fini_panel +ffffffff81b1fc80 T intel_bios_is_tv_present +ffffffff81b1fd00 T intel_bios_is_lvds_present +ffffffff81b1fdb0 T intel_bios_is_port_present +ffffffff81b1fe90 T intel_bios_encoder_supports_dp_dual_mode +ffffffff81b1ff00 T intel_bios_is_dsi_present +ffffffff81b1ffd0 T intel_bios_get_dsc_params +ffffffff81b20200 T intel_bios_dp_aux_ch +ffffffff81b20300 T intel_bios_dp_has_shared_aux_ch +ffffffff81b20390 T intel_bios_dp_boost_level +ffffffff81b20420 T intel_bios_hdmi_boost_level +ffffffff81b204c0 T intel_bios_hdmi_ddc_pin +ffffffff81b20630 T intel_bios_encoder_supports_typec_usb +ffffffff81b20680 T intel_bios_encoder_supports_tbt +ffffffff81b206d0 T intel_bios_encoder_lane_reversal +ffffffff81b20710 T intel_bios_encoder_hpd_invert +ffffffff81b20750 T intel_bios_encoder_data_lookup +ffffffff81b20820 T intel_bios_for_each_encoder +ffffffff81b208a0 t opregion_get_panel_type +ffffffff81b208c0 t vbt_get_panel_type +ffffffff81b209d0 t pnpid_get_panel_type +ffffffff81b20bd0 t fallback_get_panel_type +ffffffff81b20c00 t fill_detail_timing_data +ffffffff81b21000 T icl_pcode_restrict_qgv_points +ffffffff81b21130 T intel_bw_init_hw +ffffffff81b212a0 t tgl_get_bw_info +ffffffff81b218c0 t icl_get_bw_info +ffffffff81b21cb0 T intel_bw_crtc_update +ffffffff81b21da0 t intel_bw_crtc_data_rate +ffffffff81b21ec0 T intel_atomic_get_old_bw_state +ffffffff81b21ee0 T intel_atomic_get_new_bw_state +ffffffff81b21f00 T intel_atomic_get_bw_state +ffffffff81b21f20 T intel_bw_min_cdclk +ffffffff81b221a0 T intel_bw_calc_min_cdclk +ffffffff81b225b0 T intel_bw_atomic_check +ffffffff81b230e0 T intel_bw_init +ffffffff81b23160 t icl_get_qgv_points +ffffffff81b23740 t skl_plane_calc_dbuf_bw +ffffffff81b23890 t intel_bw_duplicate_state +ffffffff81b23910 t intel_bw_destroy_state +ffffffff81b24000 T intel_cdclk_get_cdclk +ffffffff81b24020 T intel_cdclk_init_hw +ffffffff81b24850 T intel_cdclk_uninit_hw +ffffffff81b24970 T intel_cdclk_needs_modeset +ffffffff81b249b0 T intel_cdclk_dump_config +ffffffff81b24a30 T intel_set_cdclk_pre_plane_update +ffffffff81b24da0 t intel_set_cdclk +ffffffff81b251c0 T intel_set_cdclk_post_plane_update +ffffffff81b25480 T intel_crtc_compute_min_cdclk +ffffffff81b25830 T intel_atomic_get_cdclk_state +ffffffff81b25850 T intel_cdclk_atomic_check +ffffffff81b25970 T intel_cdclk_init +ffffffff81b259f0 T intel_modeset_calc_cdclk +ffffffff81b260c0 t intel_cdclk_can_crawl +ffffffff81b26150 T intel_update_max_cdclk +ffffffff81b264d0 T intel_update_cdclk +ffffffff81b26570 T intel_read_rawclk +ffffffff81b26720 t i9xx_hrawclk +ffffffff81b267e0 T intel_cdclk_debugfs_register +ffffffff81b26810 T intel_init_cdclk_hooks +ffffffff81b26c40 t bxt_set_cdclk +ffffffff81b27300 t _bxt_set_cdclk +ffffffff81b27b70 t skl_set_cdclk +ffffffff81b28230 t intel_cdclk_duplicate_state +ffffffff81b282c0 t intel_cdclk_destroy_state +ffffffff81b282e0 t bxt_get_cdclk +ffffffff81b28550 t bxt_modeset_calc_cdclk +ffffffff81b289e0 t tgl_calc_voltage_level +ffffffff81b28a30 t intel_compute_min_cdclk +ffffffff81b28c70 t rplu_calc_voltage_level +ffffffff81b28cc0 t ehl_calc_voltage_level +ffffffff81b28d10 t icl_calc_voltage_level +ffffffff81b28d60 t bxt_calc_voltage_level +ffffffff81b28db0 t skl_get_cdclk +ffffffff81b28fe0 t skl_modeset_calc_cdclk +ffffffff81b291f0 t bdw_get_cdclk +ffffffff81b292f0 t bdw_set_cdclk +ffffffff81b29950 t bdw_modeset_calc_cdclk +ffffffff81b29a50 t hsw_get_cdclk +ffffffff81b29b30 t fixed_modeset_calc_cdclk +ffffffff81b29b80 t vlv_get_cdclk +ffffffff81b29c70 t chv_set_cdclk +ffffffff81b2a070 t vlv_modeset_calc_cdclk +ffffffff81b2a250 t vlv_set_cdclk +ffffffff81b2a870 t fixed_400mhz_get_cdclk +ffffffff81b2a8a0 t fixed_450mhz_get_cdclk +ffffffff81b2a8d0 t gm45_get_cdclk +ffffffff81b2a9f0 t intel_hpll_vco +ffffffff81b2ab30 t g33_get_cdclk +ffffffff81b2ac60 t i965gm_get_cdclk +ffffffff81b2ad70 t pnv_get_cdclk +ffffffff81b2ae30 t i945gm_get_cdclk +ffffffff81b2aeb0 t i915gm_get_cdclk +ffffffff81b2af30 t fixed_333mhz_get_cdclk +ffffffff81b2af60 t fixed_266mhz_get_cdclk +ffffffff81b2af90 t i85x_get_cdclk +ffffffff81b2b030 t fixed_200mhz_get_cdclk +ffffffff81b2b060 t fixed_133mhz_get_cdclk +ffffffff81b2c000 T intel_color_load_luts +ffffffff81b2c030 T intel_color_commit_noarm +ffffffff81b2c080 T intel_color_commit_arm +ffffffff81b2c0b0 T intel_color_post_update +ffffffff81b2c100 T intel_color_prepare_commit +ffffffff81b2c130 T intel_color_cleanup_commit +ffffffff81b2c190 T intel_color_check +ffffffff81b2c1b0 T intel_color_get_config +ffffffff81b2c230 T intel_color_lut_equal +ffffffff81b2c290 T intel_color_assert_luts +ffffffff81b2c590 T intel_color_crtc_init +ffffffff81b2c610 T intel_color_init +ffffffff81b2c750 T intel_color_init_hooks +ffffffff81b2c880 t chv_color_check +ffffffff81b2cdc0 t i9xx_color_commit_arm +ffffffff81b2cdd0 t chv_load_luts +ffffffff81b2d1e0 t chv_read_luts +ffffffff81b2d460 t chv_lut_equal +ffffffff81b2d790 t chv_read_csc +ffffffff81b2d8b0 t intel_color_add_affected_planes +ffffffff81b2da30 t _check_luts +ffffffff81b2dbb0 t i965_load_luts +ffffffff81b2df20 t i965_read_luts +ffffffff81b2e300 t vlv_color_check +ffffffff81b2e7d0 t vlv_load_luts +ffffffff81b2e980 t i965_lut_equal +ffffffff81b2eb60 t vlv_read_csc +ffffffff81b2ed40 t i9xx_color_check +ffffffff81b2eff0 t i9xx_load_luts +ffffffff81b2f460 t i9xx_read_luts +ffffffff81b2f810 t i9xx_lut_equal +ffffffff81b2fa30 t icl_color_check +ffffffff81b2fe50 t icl_color_commit_noarm +ffffffff81b30110 t icl_color_commit_arm +ffffffff81b30200 t icl_load_luts +ffffffff81b30ab0 t icl_read_luts +ffffffff81b30e00 t icl_lut_equal +ffffffff81b31180 t icl_read_csc +ffffffff81b31440 t ilk_csc_convert_ctm +ffffffff81b31860 t ilk_update_pipe_csc +ffffffff81b31ab0 t glk_load_degamma_lut +ffffffff81b31d70 t ivb_load_lut_ext_max +ffffffff81b31eb0 t glk_load_lut_ext2_max +ffffffff81b31ff0 t bdw_load_lut_10 +ffffffff81b32250 t glk_read_degamma_lut +ffffffff81b323d0 t bdw_read_lut_10 +ffffffff81b32560 t ilk_read_pipe_csc +ffffffff81b32790 t icl_color_post_update +ffffffff81b327c0 t glk_color_check +ffffffff81b32d20 t skl_color_commit_noarm +ffffffff81b32d70 t skl_color_commit_arm +ffffffff81b32ea0 t glk_load_luts +ffffffff81b33060 t glk_read_luts +ffffffff81b33200 t glk_lut_equal +ffffffff81b33530 t skl_read_csc +ffffffff81b33580 t ilk_csc_limited_range +ffffffff81b33620 t ilk_assign_csc +ffffffff81b33920 t ivb_color_check +ffffffff81b34000 t bdw_load_luts +ffffffff81b34200 t bdw_read_luts +ffffffff81b34420 t ivb_lut_equal +ffffffff81b347f0 t ilk_assign_luts +ffffffff81b34a50 t ilk_color_commit_noarm +ffffffff81b34aa0 t hsw_color_commit_arm +ffffffff81b34b60 t ilk_read_csc +ffffffff81b34bb0 t ivb_load_luts +ffffffff81b34db0 t ivb_read_luts +ffffffff81b352a0 t ivb_load_lut_10 +ffffffff81b354b0 t ilk_color_commit_arm +ffffffff81b35540 t ilk_color_check +ffffffff81b357c0 t ilk_load_luts +ffffffff81b35a50 t ilk_read_luts +ffffffff81b35cd0 t ilk_lut_equal +ffffffff81b37000 T intel_combo_phy_power_up_lanes +ffffffff81b37140 T intel_combo_phy_init +ffffffff81b376b0 T intel_combo_phy_uninit +ffffffff81b378a0 t icl_combo_phy_verify_state +ffffffff81b38000 T intel_connector_init +ffffffff81b38090 T intel_connector_alloc +ffffffff81b38140 T intel_connector_free +ffffffff81b38190 T intel_connector_destroy +ffffffff81b38210 T intel_connector_register +ffffffff81b38220 T intel_connector_unregister +ffffffff81b38230 T intel_connector_attach_encoder +ffffffff81b38250 T intel_connector_get_hw_state +ffffffff81b382b0 T intel_connector_get_pipe +ffffffff81b38380 T intel_connector_update_modes +ffffffff81b383b0 T intel_ddc_get_modes +ffffffff81b38440 T intel_attach_force_audio_property +ffffffff81b384e0 T intel_attach_broadcast_rgb_property +ffffffff81b38590 T intel_attach_aspect_ratio_property +ffffffff81b38600 T intel_attach_hdmi_colorspace_property +ffffffff81b38660 T intel_attach_dp_colorspace_property +ffffffff81b386c0 T intel_attach_scaling_mode_property +ffffffff81b39000 T intel_crt_port_enabled +ffffffff81b39090 T intel_crt_reset +ffffffff81b39190 T intel_crt_init +ffffffff81b39650 t hsw_crt_get_config +ffffffff81b39710 t hsw_crt_compute_config +ffffffff81b39820 t hsw_pre_pll_enable_crt +ffffffff81b39890 t hsw_pre_enable_crt +ffffffff81b39940 t hsw_enable_crt +ffffffff81b39b30 t hsw_disable_crt +ffffffff81b39ba0 t hsw_post_disable_crt +ffffffff81b39d90 t pch_crt_compute_config +ffffffff81b39de0 t pch_disable_crt +ffffffff81b39e10 t pch_post_disable_crt +ffffffff81b39f00 t intel_crt_compute_config +ffffffff81b39f50 t intel_disable_crt +ffffffff81b3a040 t intel_crt_get_config +ffffffff81b3a0e0 t intel_crt_get_hw_state +ffffffff81b3a1b0 t intel_enable_crt +ffffffff81b3a2a0 t intel_spurious_crt_detect_dmi_callback +ffffffff81b3a300 t intel_crt_get_modes +ffffffff81b3a450 t intel_crt_detect +ffffffff81b3a740 t intel_crt_mode_valid +ffffffff81b3a860 t intel_crt_get_edid +ffffffff81b3a940 t intel_crt_detect_hotplug +ffffffff81b3ae50 t intel_crt_detect_ddc +ffffffff81b3af50 t intel_crt_load_detect +ffffffff81b3c000 T intel_first_crtc +ffffffff81b3c020 T intel_crtc_for_pipe +ffffffff81b3c080 T intel_crtc_wait_for_next_vblank +ffffffff81b3c090 T intel_wait_for_vblank_if_active +ffffffff81b3c100 T intel_crtc_get_vblank_counter +ffffffff81b3c190 T intel_crtc_max_vblank_count +ffffffff81b3c220 T intel_crtc_vblank_on +ffffffff81b3c2c0 t assert_vblank_disabled +ffffffff81b3c3b0 T intel_crtc_vblank_off +ffffffff81b3c3e0 T intel_crtc_state_alloc +ffffffff81b3c4a0 T intel_crtc_state_reset +ffffffff81b3c540 T intel_crtc_init +ffffffff81b3c940 T intel_wait_for_vblank_workers +ffffffff81b3ca00 T intel_usecs_to_scanlines +ffffffff81b3ca50 T intel_pipe_update_start +ffffffff81b3cf20 T intel_pipe_update_end +ffffffff81b3d2a0 t intel_crtc_destroy +ffffffff81b3d2e0 t intel_crtc_late_register +ffffffff81b3d310 t intel_crtc_vblank_work +ffffffff81b3e000 T intel_output_format_name +ffffffff81b3e040 T intel_crtc_state_dump +ffffffff81b3f620 t ilk_dump_csc +ffffffff81b40000 T intel_cursor_plane_create +ffffffff81b40240 t i845_cursor_max_stride +ffffffff81b40270 t i845_cursor_update_arm +ffffffff81b404d0 t i845_cursor_disable_arm +ffffffff81b404f0 t i845_cursor_get_hw_state +ffffffff81b405b0 t i845_check_cursor +ffffffff81b40770 t i9xx_cursor_max_stride +ffffffff81b407b0 t i9xx_cursor_update_arm +ffffffff81b40b70 t i9xx_cursor_disable_arm +ffffffff81b40b90 t i9xx_cursor_get_hw_state +ffffffff81b40ca0 t i9xx_check_cursor +ffffffff81b40f50 t intel_check_cursor +ffffffff81b411a0 t intel_legacy_cursor_update +ffffffff81b41600 t intel_cursor_format_mod_supported +ffffffff81b42000 T intel_is_c10phy +ffffffff81b42040 T intel_cx0_phy_set_signal_levels +ffffffff81b426f0 t intel_cx0_rmw +ffffffff81b42800 T intel_c10pll_readout_hw_state +ffffffff81b429f0 T intel_c10pll_dump_hw_state +ffffffff81b42cc0 T intel_cx0_phy_check_hdmi_link_rate +ffffffff81b42e50 T intel_cx0pll_calc_state +ffffffff81b432a0 T intel_c20pll_readout_hw_state +ffffffff81b438f0 t intel_c20_sram_read +ffffffff81b43a30 T intel_c20pll_dump_hw_state +ffffffff81b43ea0 T intel_c10pll_calc_port_clock +ffffffff81b43f80 T intel_c20pll_calc_port_clock +ffffffff81b44080 T intel_mtl_tbt_calc_port_clock +ffffffff81b441f0 T intel_mtl_pll_enable +ffffffff81b45de0 T intel_mtl_pll_disable +ffffffff81b46300 T intel_mtl_port_pll_type +ffffffff81b46390 T intel_c10pll_state_verify +ffffffff81b466d0 t __intel_cx0_read +ffffffff81b46b20 t __intel_cx0_write +ffffffff81b46ef0 t intel_cx0_bus_reset +ffffffff81b47040 t intel_cx0_wait_for_ack +ffffffff81b471f0 t intel_cx0_powerdown_change_sequence +ffffffff81b474a0 t intel_c20_sram_write +ffffffff81b48000 T hsw_prepare_dp_ddi_buffers +ffffffff81b481d0 T intel_wait_ddi_buf_idle +ffffffff81b48420 T intel_ddi_set_dp_msa +ffffffff81b48610 T intel_ddi_enable_transcoder_func +ffffffff81b48700 t intel_ddi_transcoder_func_reg_val_get +ffffffff81b489c0 T intel_ddi_disable_transcoder_func +ffffffff81b48be0 T intel_ddi_toggle_hdcp_bits +ffffffff81b48d40 T intel_ddi_connector_get_hw_state +ffffffff81b48eb0 T intel_ddi_get_hw_state +ffffffff81b48f30 t intel_ddi_get_encoder_pipes +ffffffff81b493f0 T intel_ddi_enable_transcoder_clock +ffffffff81b494c0 T intel_ddi_disable_transcoder_clock +ffffffff81b49530 T intel_ddi_level +ffffffff81b49750 T icl_ddi_combo_get_pll +ffffffff81b497e0 T hsw_ddi_enable_clock +ffffffff81b498a0 T hsw_ddi_disable_clock +ffffffff81b498e0 T hsw_ddi_is_clock_enabled +ffffffff81b49950 T intel_ddi_enable_clock +ffffffff81b49990 T intel_ddi_disable_clock +ffffffff81b499d0 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff81b49be0 T dp_tp_ctl_reg +ffffffff81b49c60 T dp_tp_status_reg +ffffffff81b49ce0 T intel_ddi_update_pipe +ffffffff81b49d80 T intel_ddi_update_active_dpll +ffffffff81b49ea0 T intel_ddi_compute_min_voltage_level +ffffffff81b49f20 T intel_ddi_get_clock +ffffffff81b4a040 T intel_ddi_port_pll_type +ffffffff81b4a080 T hsw_ddi_get_config +ffffffff81b4a190 t intel_ddi_get_config +ffffffff81b4ac00 T intel_ddi_init +ffffffff81b4bad0 t intel_ddi_hotplug +ffffffff81b4bfb0 t intel_ddi_compute_output_type +ffffffff81b4c030 t intel_ddi_compute_config +ffffffff81b4c1b0 t intel_ddi_compute_config_late +ffffffff81b4c4a0 t intel_enable_ddi +ffffffff81b4cf30 t intel_ddi_pre_pll_enable +ffffffff81b4d170 t intel_ddi_pre_enable +ffffffff81b4e3e0 t intel_disable_ddi +ffffffff81b4e5e0 t intel_ddi_post_pll_disable +ffffffff81b4e6e0 t intel_ddi_post_disable +ffffffff81b4ec40 t intel_ddi_sync_state +ffffffff81b4ed10 t intel_ddi_initial_fastset_check +ffffffff81b4edf0 t intel_ddi_encoder_suspend +ffffffff81b4ee00 t intel_ddi_encoder_shutdown +ffffffff81b4ee30 t intel_ddi_get_power_domains +ffffffff81b4efe0 t mtl_ddi_get_config +ffffffff81b4f110 t dg2_ddi_get_config +ffffffff81b4f170 t adls_ddi_enable_clock +ffffffff81b4f310 t adls_ddi_disable_clock +ffffffff81b4f3f0 t adls_ddi_is_clock_enabled +ffffffff81b4f4a0 t adls_ddi_get_config +ffffffff81b4f580 t rkl_ddi_enable_clock +ffffffff81b4f730 t rkl_ddi_disable_clock +ffffffff81b4f7f0 t rkl_ddi_is_clock_enabled +ffffffff81b4f880 t rkl_ddi_get_config +ffffffff81b4f970 t dg1_ddi_enable_clock +ffffffff81b4fb60 t dg1_ddi_disable_clock +ffffffff81b4fc40 t dg1_ddi_is_clock_enabled +ffffffff81b4fcf0 t dg1_ddi_get_config +ffffffff81b4fde0 t jsl_ddi_tc_enable_clock +ffffffff81b4fe80 t jsl_ddi_tc_disable_clock +ffffffff81b4ff70 t jsl_ddi_tc_is_clock_enabled +ffffffff81b50040 t icl_ddi_tc_port_pll_type +ffffffff81b500d0 t icl_ddi_combo_get_config +ffffffff81b50190 t icl_ddi_combo_enable_clock +ffffffff81b50310 t icl_ddi_combo_disable_clock +ffffffff81b503d0 t icl_ddi_combo_is_clock_enabled +ffffffff81b50460 t icl_ddi_tc_enable_clock +ffffffff81b50670 t icl_ddi_tc_disable_clock +ffffffff81b50770 t icl_ddi_tc_is_clock_enabled +ffffffff81b50840 t icl_ddi_tc_get_config +ffffffff81b50ab0 t bxt_ddi_get_config +ffffffff81b50b40 t skl_ddi_enable_clock +ffffffff81b50c60 t skl_ddi_disable_clock +ffffffff81b50d00 t skl_ddi_is_clock_enabled +ffffffff81b50d80 t skl_ddi_get_config +ffffffff81b50e30 t icl_combo_phy_set_signal_levels +ffffffff81b51b10 t tgl_dkl_phy_set_signal_levels +ffffffff81b51eb0 t icl_mg_phy_set_signal_levels +ffffffff81b52940 t hsw_set_signal_levels +ffffffff81b52d20 t intel_ddi_max_lanes +ffffffff81b52e10 t need_aux_ch +ffffffff81b52e90 t intel_ddi_tc_encoder_suspend_complete +ffffffff81b52ed0 t intel_ddi_tc_encoder_shutdown_complete +ffffffff81b52f10 t lpt_digital_port_connected +ffffffff81b52f80 t bdw_digital_port_connected +ffffffff81b52ff0 t hsw_digital_port_connected +ffffffff81b53060 t intel_ddi_init_dp_connector +ffffffff81b53150 t intel_ddi_init_hdmi_connector +ffffffff81b531c0 t intel_ddi_encoder_reset +ffffffff81b532b0 t intel_ddi_encoder_destroy +ffffffff81b533a0 t intel_ddi_encoder_late_register +ffffffff81b53400 t mtl_ddi_enable_d2d +ffffffff81b53600 t intel_wait_ddi_buf_active +ffffffff81b53980 t intel_ddi_main_link_aux_domain +ffffffff81b53a80 t icl_program_mg_dp_mode +ffffffff81b53db0 t intel_ddi_init_dp_buf_reg +ffffffff81b53fd0 t intel_disable_ddi_buf +ffffffff81b541b0 t mtl_disable_ddi_buf +ffffffff81b54650 t intel_ddi_disable_fec_state +ffffffff81b547b0 t mtl_ddi_prepare_link_retrain +ffffffff81b54b50 t intel_ddi_prepare_link_retrain +ffffffff81b550e0 t intel_ddi_set_link_train +ffffffff81b55240 t intel_ddi_set_idle_link_train +ffffffff81b55430 t intel_ddi_dp_voltage_max +ffffffff81b554f0 t intel_ddi_dp_preemph_max +ffffffff81b56000 T is_hobl_buf_trans +ffffffff81b56040 T intel_ddi_buf_trans_init +ffffffff81b56330 t mtl_get_cx0_buf_trans +ffffffff81b56430 t dg2_get_snps_buf_trans +ffffffff81b564b0 t adlp_get_combo_buf_trans +ffffffff81b565d0 t adlp_get_dkl_buf_trans +ffffffff81b56630 t adls_get_combo_buf_trans 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+ffffffff81b58380 T intel_crtc_is_bigjoiner_slave +ffffffff81b583e0 T intel_crtc_is_bigjoiner_master +ffffffff81b58440 T intel_master_crtc +ffffffff81b584e0 T assert_transcoder +ffffffff81b586e0 t transcoder_name +ffffffff81b58720 T vlv_wait_port_ready +ffffffff81b58880 T intel_enable_transcoder +ffffffff81b58b60 t assert_planes_disabled +ffffffff81b58cb0 T intel_disable_transcoder +ffffffff81b58f10 T intel_rotation_info_size +ffffffff81b58f60 T intel_remapped_info_size +ffffffff81b59090 T intel_plane_uses_fence +ffffffff81b590e0 T intel_fb_xy_to_linear +ffffffff81b59130 T intel_add_fb_offsets +ffffffff81b59180 T intel_plane_fb_max_stride +ffffffff81b59210 T intel_set_plane_visible +ffffffff81b59260 T intel_plane_fixup_bitmasks +ffffffff81b59310 T intel_plane_disable_noatomic +ffffffff81b59530 T intel_plane_fence_y_offset +ffffffff81b595a0 T intel_has_pending_fb_unpin +ffffffff81b596b0 T intel_get_crtc_new_encoder +ffffffff81b59850 T ilk_pfit_disable +ffffffff81b59910 T intel_phy_is_combo +ffffffff81b59980 T intel_phy_is_tc +ffffffff81b599f0 T intel_phy_is_snps +ffffffff81b59a40 T intel_port_to_phy +ffffffff81b59af0 T intel_port_to_tc +ffffffff81b59c00 T intel_aux_power_domain +ffffffff81b59c50 T intel_modeset_get_crtc_power_domains +ffffffff81b59e90 T intel_modeset_put_crtc_power_domains +ffffffff81b59ec0 T intel_encoder_destroy +ffffffff81b59f00 T intel_encoder_get_config +ffffffff81b59f40 t intel_crtc_readout_derived_state +ffffffff81b5a3b0 T intel_link_compute_m_n +ffffffff81b5a4e0 T intel_panel_sanitize_ssc +ffffffff81b5a5d0 T intel_zero_m_n +ffffffff81b5a610 T intel_set_m_n +ffffffff81b5a6f0 T intel_cpu_transcoder_has_m2_n2 +ffffffff81b5a750 T intel_cpu_transcoder_set_m1_n1 +ffffffff81b5a940 T intel_cpu_transcoder_set_m2_n2 +ffffffff81b5aab0 T i9xx_set_pipeconf +ffffffff81b5ac70 T ilk_set_pipeconf +ffffffff81b5ae50 T bdw_get_pipe_misc_bpp +ffffffff81b5af30 T ilk_get_lanes_required +ffffffff81b5af90 T intel_get_m_n +ffffffff81b5b0c0 T intel_cpu_transcoder_get_m1_n1 +ffffffff81b5b290 T intel_cpu_transcoder_get_m2_n2 +ffffffff81b5b420 T intel_crtc_get_pipe_config +ffffffff81b5b4a0 T i9xx_crtc_clock_get +ffffffff81b5b770 T intel_dotclock_calculate +ffffffff81b5b7d0 T intel_crtc_dotclock +ffffffff81b5b8a0 T intel_encoder_current_mode +ffffffff81b5baa0 T intel_fuzzy_clock_check +ffffffff81b5baf0 T intel_pipe_config_compare +ffffffff81b5f560 t pipe_config_mismatch +ffffffff81b5f660 t pipe_config_infoframe_mismatch +ffffffff81b5f850 T intel_modeset_all_pipes +ffffffff81b5fa80 T intel_atomic_add_affected_planes +ffffffff81b5fb60 T intel_calc_active_pipes +ffffffff81b5fbf0 T intel_atomic_check +ffffffff81b61f30 t copy_bigjoiner_crtc_state_nomodeset +ffffffff81b62060 t intel_atomic_check_planes +ffffffff81b62b50 t intel_modeset_checks +ffffffff81b62ce0 t intel_atomic_check_crtcs +ffffffff81b63170 t intel_async_flip_check_hw +ffffffff81b63660 T intel_crtc_arm_fifo_underrun +ffffffff81b63700 T intel_atomic_helper_free_state_worker +ffffffff81b63780 T intel_atomic_commit +ffffffff81b63b80 t intel_atomic_commit_ready +ffffffff81b63c10 t intel_atomic_commit_work +ffffffff81b63c30 t intel_atomic_commit_tail +ffffffff81b650b0 T intel_plane_destroy +ffffffff81b650f0 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81b65170 T assert_port_valid +ffffffff81b651f0 T intel_setup_outputs +ffffffff81b65c70 T intel_mode_valid +ffffffff81b65df0 T intel_cpu_transcoder_mode_valid +ffffffff81b65eb0 T intel_mode_valid_max_plane_size +ffffffff81b65f30 T intel_init_display_hooks +ffffffff81b65fb0 T intel_initial_commit +ffffffff81b661c0 T i830_enable_pipe +ffffffff81b66940 T i830_disable_pipe +ffffffff81b66cd0 T intel_hpd_poll_fini +ffffffff81b66e10 T intel_scanout_needs_vtd_wa +ffffffff81b66e50 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81b66ff0 t intel_atomic_cleanup_work +ffffffff81b67120 t intel_pre_plane_update +ffffffff81b67730 t hsw_get_pipe_config +ffffffff81b68520 t hsw_crtc_enable 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i915gm_enable_vblank +ffffffff81b74e60 T i965_enable_vblank +ffffffff81b74ef0 T ilk_enable_vblank +ffffffff81b74fc0 T bdw_enable_vblank +ffffffff81b751d0 T i8xx_disable_vblank +ffffffff81b75240 T i915gm_disable_vblank +ffffffff81b75320 T i965_disable_vblank +ffffffff81b75390 T ilk_disable_vblank +ffffffff81b754b0 T bdw_disable_vblank +ffffffff81b75680 T vlv_display_irq_reset +ffffffff81b757a0 T vlv_display_irq_postinstall +ffffffff81b75910 T gen8_display_irq_reset +ffffffff81b75ae0 T gen11_display_irq_reset +ffffffff81b75e10 T gen8_irq_power_well_post_enable +ffffffff81b75fb0 T gen8_irq_power_well_pre_disable +ffffffff81b76100 T valleyview_enable_display_irqs +ffffffff81b76260 T valleyview_disable_display_irqs +ffffffff81b763b0 T ilk_de_irq_postinstall +ffffffff81b764d0 T gen8_de_irq_postinstall +ffffffff81b769b0 T gen11_de_irq_postinstall +ffffffff81b76a30 T dg1_de_irq_postinstall +ffffffff81b76ab0 T intel_display_irq_init +ffffffff81b77000 T intel_display_power_domain_str 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icl_display_core_init +ffffffff81b798b0 t bxt_display_core_init +ffffffff81b79a60 t vlv_cmnlane_wa +ffffffff81b79b70 t assert_ved_power_gated +ffffffff81b79c40 t hsw_assert_cdclk +ffffffff81b79d80 t intel_pch_reset_handshake +ffffffff81b79e30 T intel_power_domains_driver_remove +ffffffff81b79f50 T intel_power_domains_sanitize_state +ffffffff81b7a070 T intel_power_domains_enable +ffffffff81b7a0e0 T intel_power_domains_disable +ffffffff81b7a1c0 T intel_power_domains_suspend +ffffffff81b7a420 t icl_display_core_uninit +ffffffff81b7a580 t bxt_display_core_uninit +ffffffff81b7a680 T intel_power_domains_resume +ffffffff81b7a780 T intel_display_power_suspend_late +ffffffff81b7a880 t hsw_enable_pc8 +ffffffff81b7b7b0 T intel_display_power_resume_early +ffffffff81b7b8c0 t hsw_disable_pc8 +ffffffff81b7bdd0 T intel_display_power_suspend +ffffffff81b7be60 T intel_display_power_resume +ffffffff81b7bf80 T intel_display_power_debug +ffffffff81b7c080 T intel_display_power_ddi_io_domain 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t i830_pipes_power_well_disable +ffffffff81b80820 t i830_pipes_power_well_enabled +ffffffff81b808d0 t hsw_power_well_sync_hw +ffffffff81b809e0 t hsw_power_well_enable +ffffffff81b80ca0 t hsw_power_well_disable +ffffffff81b80d70 t hsw_power_well_enabled +ffffffff81b80e70 t gen9_dc_off_power_well_enable +ffffffff81b80e80 t gen9_dc_off_power_well_disable +ffffffff81b80f30 t gen9_dc_off_power_well_enabled +ffffffff81b80fd0 t bxt_dpio_cmn_power_well_enable +ffffffff81b81000 t bxt_dpio_cmn_power_well_disable +ffffffff81b81030 t bxt_dpio_cmn_power_well_enabled +ffffffff81b81060 t vlv_display_power_well_enable +ffffffff81b810a0 t vlv_display_power_well_disable +ffffffff81b81140 t vlv_dpio_cmn_power_well_enable +ffffffff81b811e0 t vlv_dpio_cmn_power_well_disable +ffffffff81b81310 t vlv_power_well_enable +ffffffff81b81330 t vlv_power_well_disable +ffffffff81b81350 t icl_aux_power_well_enable +ffffffff81b81b20 t icl_aux_power_well_disable +ffffffff81b81df0 t tgl_tc_cold_off_power_well_sync_hw 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+ffffffff81b86400 T intel_dkl_phy_posting_read +ffffffff81b87000 T intel_dmc_has_payload +ffffffff81b87050 T intel_dmc_enable_pipe +ffffffff81b87180 T intel_dmc_disable_pipe +ffffffff81b872b0 T intel_dmc_load_program +ffffffff81b87bb0 t pipedmc_clock_gating_wa +ffffffff81b87e00 T intel_dmc_disable_program +ffffffff81b88060 T assert_dmc_loaded +ffffffff81b88220 T intel_dmc_init +ffffffff81b88510 t dmc_load_work_fn +ffffffff81b88ef0 T intel_dmc_suspend +ffffffff81b88f80 T intel_dmc_resume +ffffffff81b89030 T intel_dmc_fini +ffffffff81b891c0 T intel_dmc_print_error_state +ffffffff81b892d0 T intel_dmc_debugfs_register +ffffffff81b8a000 T intel_dp_is_edp +ffffffff81b8a030 T intel_dp_is_uhbr +ffffffff81b8a070 T intel_dp_max_lane_count +ffffffff81b8a0e0 T intel_dp_link_required +ffffffff81b8a120 T intel_dp_max_data_rate +ffffffff81b8a180 T intel_dp_can_bigjoiner +ffffffff81b8a1f0 T intel_dp_get_link_train_fallback_values +ffffffff81b8a5f0 T intel_dp_mode_to_fec_clock +ffffffff81b8a640 T intel_dp_dsc_nearest_valid_bpp +ffffffff81b8a750 T intel_dp_dsc_get_output_bpp +ffffffff81b8a880 T intel_dp_dsc_get_slice_count +ffffffff81b8aa30 T intel_dp_min_bpp +ffffffff81b8aa70 T intel_dp_need_bigjoiner +ffffffff81b8aae0 T intel_dp_source_supports_tps3 +ffffffff81b8ab30 T intel_dp_source_supports_tps4 +ffffffff81b8ab70 T intel_dp_max_link_rate +ffffffff81b8ac30 T intel_dp_rate_select +ffffffff81b8acd0 T intel_dp_compute_rate +ffffffff81b8adb0 T intel_dp_has_hdmi_sink +ffffffff81b8adf0 T intel_dp_adjust_compliance_config +ffffffff81b8af40 T intel_dp_dsc_compute_bpp +ffffffff81b8b000 T intel_dp_dsc_compute_config +ffffffff81b8b760 T intel_dp_limited_color_range +ffffffff81b8b7d0 T intel_dp_compute_psr_vsc_sdp +ffffffff81b8b850 T intel_dp_needs_vsc_sdp +ffffffff81b8b8a0 t intel_dp_compute_vsc_colorimetry +ffffffff81b8ba20 T intel_dp_compute_config +ffffffff81b8bef0 t intel_dp_compute_output_format +ffffffff81b8c150 t intel_dp_audio_compute_config +ffffffff81b8c240 t intel_dp_drrs_compute_config +ffffffff81b8c430 t intel_dp_compute_vsc_sdp +ffffffff81b8c4e0 t intel_dp_compute_hdr_metadata_infoframe_sdp +ffffffff81b8c590 T intel_dp_set_link_params +ffffffff81b8c5d0 T intel_edp_backlight_on +ffffffff81b8c680 T intel_edp_backlight_off +ffffffff81b8c730 T intel_dp_sink_set_decompression_state +ffffffff81b8c7e0 T intel_dp_wait_source_oui +ffffffff81b8c8e0 T intel_dp_set_power +ffffffff81b8cb60 T intel_dp_sync_state +ffffffff81b8cbf0 t intel_dp_get_dpcd +ffffffff81b8cd90 t intel_dp_reset_max_link_params +ffffffff81b8ceb0 T intel_dp_initial_fastset_check +ffffffff81b8d000 T intel_dp_check_frl_training +ffffffff81b8d690 T intel_dp_pcon_dsc_configure +ffffffff81b8d8c0 T intel_dp_configure_protocol_converter +ffffffff81b8dab0 T intel_dp_get_colorimetry_status +ffffffff81b8db20 T intel_edp_fixup_vbt_bpp +ffffffff81b8dbb0 T intel_write_dp_vsc_sdp +ffffffff81b8dd60 T intel_dp_set_infoframes +ffffffff81b8dea0 t intel_write_dp_sdp +ffffffff81b8e1a0 T intel_read_dp_sdp +ffffffff81b8e4f0 T intel_dp_get_active_pipes +ffffffff81b8e750 T intel_dp_retrain_link +ffffffff81b8eaa0 t intel_dp_needs_link_retrain +ffffffff81b8ec50 T intel_dp_phy_test +ffffffff81b8f420 T intel_digital_port_connected +ffffffff81b8f4f0 T intel_dp_encoder_flush_work +ffffffff81b8f570 T intel_dp_encoder_suspend +ffffffff81b8f5b0 T intel_dp_encoder_shutdown +ffffffff81b8f5f0 T intel_dp_hpd_pulse +ffffffff81b8fd80 T intel_dp_is_port_edp +ffffffff81b8fe10 T intel_dp_init_connector +ffffffff81b91240 t intel_dp_modeset_retry_work_fn +ffffffff81b91300 t intel_dp_set_common_rates +ffffffff81b914a0 T intel_dp_mst_suspend +ffffffff81b91550 T intel_dp_mst_resume +ffffffff81b91620 t intel_dp_output_format +ffffffff81b91760 t intel_dp_compute_link_config +ffffffff81b91fc0 t intel_dp_tmds_clock_valid +ffffffff81b92060 t intel_dp_set_sink_rates +ffffffff81b922c0 t intel_dp_check_device_service_irq +ffffffff81b92970 t intel_dp_force +ffffffff81b92ad0 t intel_dp_connector_register +ffffffff81b92bd0 t intel_dp_connector_unregister +ffffffff81b92c30 t intel_dp_oob_hotplug_event +ffffffff81b92cc0 t intel_dp_set_edid +ffffffff81b93170 t intel_dp_get_modes +ffffffff81b93280 t intel_dp_detect +ffffffff81b93c80 t intel_dp_mode_valid +ffffffff81b94080 t intel_dp_connector_atomic_check +ffffffff81b94490 t intel_dp_get_dsc_sink_cap +ffffffff81b94620 t intel_dp_mode_min_output_bpp +ffffffff81b94690 t intel_dp_mode_valid_downstream +ffffffff81b94880 t icl_max_source_rate +ffffffff81b95000 T intel_dp_aux_pack +ffffffff81b95070 T intel_dp_aux_fini +ffffffff81b95090 T intel_dp_aux_init +ffffffff81b952b0 t xelpdp_aux_ctl_reg +ffffffff81b95390 t xelpdp_aux_data_reg +ffffffff81b95470 t tgl_aux_ctl_reg +ffffffff81b95500 t tgl_aux_data_reg +ffffffff81b955a0 t skl_aux_ctl_reg +ffffffff81b95630 t skl_aux_data_reg +ffffffff81b956d0 t ilk_aux_ctl_reg +ffffffff81b95750 t ilk_aux_data_reg +ffffffff81b957e0 t g4x_aux_ctl_reg +ffffffff81b95870 t g4x_aux_data_reg +ffffffff81b95910 t skl_get_aux_clock_divider +ffffffff81b95940 t hsw_get_aux_clock_divider +ffffffff81b959d0 t ilk_get_aux_clock_divider +ffffffff81b95a30 t g4x_get_aux_clock_divider +ffffffff81b95a80 t skl_get_aux_send_ctl +ffffffff81b95b00 t g4x_get_aux_send_ctl +ffffffff81b95b60 t kasprintf +ffffffff81b95c40 t intel_dp_aux_transfer +ffffffff81b95f00 T intel_dp_aux_ch +ffffffff81b96080 T intel_dp_aux_irq_handler +ffffffff81b96120 t intel_dp_aux_xfer +ffffffff81b97000 T intel_dp_aux_init_backlight_funcs +ffffffff81b97290 t intel_dp_aux_hdr_setup_backlight +ffffffff81b97430 t intel_dp_aux_hdr_get_backlight +ffffffff81b975e0 t intel_dp_aux_hdr_set_backlight +ffffffff81b976f0 t intel_dp_aux_hdr_disable_backlight +ffffffff81b97780 t intel_dp_aux_hdr_enable_backlight +ffffffff81b97a10 t intel_dp_aux_vesa_setup_backlight +ffffffff81b97ca0 t intel_dp_aux_vesa_get_backlight +ffffffff81b97cd0 t intel_dp_aux_vesa_set_backlight +ffffffff81b97d70 t intel_dp_aux_vesa_disable_backlight +ffffffff81b97e30 t intel_dp_aux_vesa_enable_backlight +ffffffff81b98000 T intel_dp_hdcp_init +ffffffff81b980c0 t intel_dp_hdcp_write_an_aksv +ffffffff81b981d0 t intel_dp_hdcp_read_bksv +ffffffff81b98270 t intel_dp_hdcp_read_bstatus +ffffffff81b98310 t intel_dp_hdcp_repeater_present +ffffffff81b983d0 t intel_dp_hdcp_read_ri_prime +ffffffff81b98470 t intel_dp_hdcp_read_ksv_ready +ffffffff81b98520 t intel_dp_hdcp_read_ksv_fifo +ffffffff81b98620 t intel_dp_hdcp_read_v_prime_part +ffffffff81b986d0 t intel_dp_hdcp_toggle_signalling +ffffffff81b98700 t intel_dp_mst_hdcp_stream_encryption +ffffffff81b98910 t intel_dp_hdcp_check_link +ffffffff81b989a0 t intel_dp_hdcp_capable +ffffffff81b98a60 t intel_dp_hdcp2_capable +ffffffff81b98af0 t intel_dp_hdcp2_write_msg +ffffffff81b98cb0 t intel_dp_hdcp2_read_msg +ffffffff81b99400 t intel_dp_hdcp2_config_stream_type +ffffffff81b99460 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81b99700 t intel_dp_mst_hdcp2_check_link +ffffffff81b997d0 t intel_dp_hdcp2_check_link +ffffffff81b9a000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81b9a100 t intel_dp_init_lttpr +ffffffff81b9a440 T intel_dp_get_adjust_train +ffffffff81b9acb0 T intel_dp_program_link_training_pattern +ffffffff81b9ade0 T intel_dp_set_signal_levels +ffffffff81b9b1b0 T intel_dp_dump_link_status +ffffffff81b9b2b0 T intel_dp_stop_link_train +ffffffff81b9b5d0 T intel_dp_start_link_train +ffffffff81b9d8b0 T intel_dp_128b132b_sdp_crc16 +ffffffff81b9d9a0 t intel_dp_link_train_phy +ffffffff81ba0000 T intel_dp_mst_encoder_active_links +ffffffff81ba0030 T intel_dp_mst_encoder_init +ffffffff81ba02a0 T intel_dp_mst_source_support +ffffffff81ba02e0 T intel_dp_mst_encoder_cleanup +ffffffff81ba0340 T intel_dp_mst_is_master_trans +ffffffff81ba0380 T intel_dp_mst_is_slave_trans +ffffffff81ba03c0 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81ba0490 t intel_dp_add_mst_connector +ffffffff81ba0750 t intel_dp_mst_poll_hpd_irq +ffffffff81ba0770 t intel_dp_mst_get_hw_state +ffffffff81ba07e0 t intel_dp_mst_connector_late_register +ffffffff81ba0870 t intel_dp_mst_connector_early_unregister +ffffffff81ba08b0 t intel_dp_mst_get_modes +ffffffff81ba0960 t intel_dp_mst_detect +ffffffff81ba0a70 t intel_dp_mst_mode_valid_ctx +ffffffff81ba0d10 t intel_mst_atomic_best_encoder +ffffffff81ba0d70 t intel_dp_mst_atomic_check +ffffffff81ba0f60 t intel_dp_mst_compute_config +ffffffff81ba1590 t intel_dp_mst_compute_config_late +ffffffff81ba16a0 t intel_mst_disable_dp +ffffffff81ba17c0 t intel_mst_post_disable_dp +ffffffff81ba1af0 t intel_mst_post_pll_disable_dp +ffffffff81ba1b50 t intel_mst_pre_pll_enable_dp +ffffffff81ba1b90 t intel_mst_pre_enable_dp +ffffffff81ba1e00 t intel_mst_enable_dp +ffffffff81ba2250 t intel_dp_mst_enc_get_hw_state +ffffffff81ba2290 t intel_dp_mst_enc_get_config +ffffffff81ba22b0 t intel_dp_mst_initial_fastset_check +ffffffff81ba22d0 t intel_dp_mst_encoder_destroy +ffffffff81ba2310 t intel_dp_mst_find_vcpi_slots_for_bpp +ffffffff81ba3000 T bxt_port_to_phy_channel +ffffffff81ba3120 T bxt_ddi_phy_set_signal_levels +ffffffff81ba3570 T bxt_ddi_phy_is_enabled +ffffffff81ba36c0 T bxt_ddi_phy_uninit +ffffffff81ba37c0 T bxt_ddi_phy_init +ffffffff81ba3a20 t _bxt_ddi_phy_init +ffffffff81ba4020 T bxt_ddi_phy_verify_state +ffffffff81ba4370 t __phy_reg_verify_state +ffffffff81ba4490 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81ba4500 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81ba47b0 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81ba49c0 T vlv_dig_port_to_channel +ffffffff81ba4a30 T vlv_dig_port_to_phy +ffffffff81ba4aa0 T vlv_pipe_to_channel +ffffffff81ba4b00 T chv_set_phy_signal_level +ffffffff81ba4ef0 T chv_data_lane_soft_reset +ffffffff81ba50f0 T chv_phy_pre_pll_enable +ffffffff81ba5400 T chv_phy_pre_encoder_enable +ffffffff81ba56c0 T chv_phy_release_cl2_override +ffffffff81ba5750 T chv_phy_post_pll_disable +ffffffff81ba5830 T vlv_set_phy_signal_level +ffffffff81ba59e0 T vlv_phy_pre_pll_enable +ffffffff81ba5b20 T vlv_phy_pre_encoder_enable +ffffffff81ba5c50 T vlv_phy_reset_lanes +ffffffff81ba6000 T pnv_calc_dpll_params +ffffffff81ba60c0 T i9xx_calc_dpll_params +ffffffff81ba6190 T vlv_calc_dpll_params +ffffffff81ba6250 T chv_calc_dpll_params +ffffffff81ba6330 T bxt_find_best_dpll +ffffffff81ba6350 t chv_find_best_dpll +ffffffff81ba66a0 T i9xx_dpll_compute_fp +ffffffff81ba66e0 T vlv_compute_dpll +ffffffff81ba6760 T chv_compute_dpll +ffffffff81ba67e0 T intel_dpll_crtc_compute_clock +ffffffff81ba68f0 T intel_dpll_crtc_get_shared_dpll +ffffffff81ba6a70 T intel_dpll_init_clock_hook +ffffffff81ba6b80 T i9xx_enable_pll +ffffffff81ba7010 T vlv_enable_pll +ffffffff81ba7640 T chv_enable_pll +ffffffff81ba7d40 T vlv_force_pll_on +ffffffff81ba7ec0 T vlv_disable_pll +ffffffff81ba7fb0 T chv_disable_pll +ffffffff81ba8130 T i9xx_disable_pll +ffffffff81ba8260 T vlv_force_pll_off +ffffffff81ba8380 T assert_pll_enabled +ffffffff81ba8490 T assert_pll_disabled +ffffffff81ba85a0 t intel_pll_is_valid +ffffffff81ba8660 t mtl_crtc_compute_clock +ffffffff81ba8760 t dg2_crtc_compute_clock +ffffffff81ba8800 t hsw_crtc_compute_clock +ffffffff81ba88e0 t hsw_crtc_get_shared_dpll +ffffffff81ba8990 t ilk_crtc_compute_clock +ffffffff81ba8ce0 t ilk_crtc_get_shared_dpll +ffffffff81ba8d30 t g4x_find_best_dpll +ffffffff81ba9090 t chv_crtc_compute_clock +ffffffff81ba91b0 t vlv_crtc_compute_clock +ffffffff81ba9660 t g4x_crtc_compute_clock +ffffffff81ba97f0 t i9xx_compute_dpll +ffffffff81ba9a90 t pnv_crtc_compute_clock +ffffffff81ba9ea0 t i9xx_crtc_compute_clock +ffffffff81ba9fe0 t i9xx_find_best_dpll +ffffffff81baa320 t i8xx_crtc_compute_clock +ffffffff81bab000 T intel_get_shared_dpll_by_id +ffffffff81bab040 T assert_shared_dpll +ffffffff81bab200 T intel_dpll_get_hw_state +ffffffff81bab230 T icl_tc_port_to_pll_id +ffffffff81bab260 T intel_enable_shared_dpll +ffffffff81bab610 T intel_disable_shared_dpll +ffffffff81bab8f0 T intel_unreference_shared_dpll_crtc +ffffffff81baba00 T intel_shared_dpll_swap_state +ffffffff81babb00 T icl_set_active_port_dpll +ffffffff81babb40 T intel_shared_dpll_init +ffffffff81babd60 T intel_compute_shared_dplls +ffffffff81babdf0 T intel_reserve_shared_dplls +ffffffff81babe80 T intel_release_shared_dplls +ffffffff81babec0 T intel_update_active_dpll +ffffffff81babf20 T intel_dpll_get_freq +ffffffff81babfb0 T intel_dpll_update_ref_clks +ffffffff81bac000 T intel_dpll_readout_hw_state +ffffffff81bac260 T intel_dpll_sanitize_state +ffffffff81bac360 T intel_dpll_dump_hw_state +ffffffff81bac3f0 T intel_shared_dpll_state_verify +ffffffff81bac5e0 t verify_single_dpll_state +ffffffff81bacc10 T intel_shared_dpll_verify_disabled +ffffffff81bacca0 t icl_compute_dplls +ffffffff81bad940 t icl_get_dplls +ffffffff81badca0 t icl_put_dplls +ffffffff81badd60 t icl_update_active_dpll +ffffffff81bade20 t icl_update_dpll_ref_clks +ffffffff81bade60 t icl_dump_hw_state +ffffffff81badf30 t combo_pll_enable +ffffffff81bae190 t combo_pll_disable +ffffffff81bae270 t combo_pll_get_hw_state +ffffffff81bae2f0 t icl_ddi_combo_pll_get_freq +ffffffff81bae4d0 t icl_dpll_write +ffffffff81bae740 t adlp_cmtg_clock_gating_wa +ffffffff81bae8e0 t icl_pll_disable +ffffffff81baeab0 t icl_pll_get_hw_state +ffffffff81baee00 t tbt_pll_enable +ffffffff81baf000 t tbt_pll_disable +ffffffff81baf020 t tbt_pll_get_hw_state +ffffffff81baf040 t icl_ddi_tbt_pll_get_freq +ffffffff81baf0b0 t mg_pll_enable +ffffffff81baf820 t mg_pll_disable +ffffffff81baf860 t dkl_pll_get_hw_state +ffffffff81bafad0 t icl_ddi_mg_pll_get_freq +ffffffff81bafbb0 t icl_calc_dpll_state +ffffffff81bafcf0 t intel_find_shared_dpll +ffffffff81bb0060 t intel_reference_shared_dpll +ffffffff81bb02b0 t intel_unreference_shared_dpll +ffffffff81bb04f0 t mg_pll_get_hw_state +ffffffff81bb07b0 t bxt_compute_dpll +ffffffff81bb0ae0 t bxt_get_dpll +ffffffff81bb0bc0 t intel_put_dpll +ffffffff81bb0c20 t bxt_update_dpll_ref_clks +ffffffff81bb0c60 t bxt_dump_hw_state +ffffffff81bb0d20 t bxt_ddi_pll_enable +ffffffff81bb1880 t bxt_ddi_pll_disable +ffffffff81bb1ae0 t bxt_ddi_pll_get_hw_state +ffffffff81bb1fb0 t bxt_ddi_pll_get_freq +ffffffff81bb2050 t bxt_ddi_set_dpll_hw_state +ffffffff81bb2250 t skl_compute_dpll +ffffffff81bb29e0 t skl_get_dpll +ffffffff81bb2aa0 t skl_update_dpll_ref_clks +ffffffff81bb2ae0 t skl_dump_hw_state +ffffffff81bb2b50 t skl_ddi_dpll0_enable +ffffffff81bb2c20 t skl_ddi_dpll0_disable +ffffffff81bb2c50 t skl_ddi_dpll0_get_hw_state +ffffffff81bb2d80 t skl_ddi_pll_get_freq +ffffffff81bb2e10 t skl_ddi_wrpll_get_freq +ffffffff81bb2f70 t skl_ddi_pll_enable +ffffffff81bb31f0 t skl_ddi_pll_disable +ffffffff81bb3290 t skl_ddi_pll_get_hw_state +ffffffff81bb33e0 t hsw_compute_dpll +ffffffff81bb3c10 t hsw_get_dpll +ffffffff81bb3d70 t hsw_update_dpll_ref_clks +ffffffff81bb3df0 t hsw_dump_hw_state +ffffffff81bb3e20 t hsw_ddi_wrpll_enable +ffffffff81bb3eb0 t hsw_ddi_wrpll_disable +ffffffff81bb3fb0 t hsw_ddi_wrpll_get_hw_state +ffffffff81bb4070 t hsw_ddi_wrpll_get_freq +ffffffff81bb4160 t hsw_ddi_spll_enable +ffffffff81bb41e0 t hsw_ddi_spll_disable +ffffffff81bb42c0 t hsw_ddi_spll_get_hw_state +ffffffff81bb4360 t hsw_ddi_spll_get_freq +ffffffff81bb4400 t hsw_ddi_lcpll_enable +ffffffff81bb4430 t hsw_ddi_lcpll_disable +ffffffff81bb4460 t hsw_ddi_lcpll_get_hw_state +ffffffff81bb4490 t hsw_ddi_lcpll_get_freq +ffffffff81bb4510 t ibx_compute_dpll +ffffffff81bb4540 t ibx_get_dpll +ffffffff81bb4660 t ibx_dump_hw_state +ffffffff81bb46d0 t ibx_pch_dpll_enable +ffffffff81bb48d0 t ibx_pch_dpll_disable +ffffffff81bb4960 t ibx_pch_dpll_get_hw_state +ffffffff81bb5000 T intel_dpt_pin +ffffffff81bb5220 T intel_dpt_unpin +ffffffff81bb52a0 T intel_dpt_resume +ffffffff81bb5390 T intel_dpt_suspend +ffffffff81bb5480 T intel_dpt_create +ffffffff81bb5920 t dpt_insert_page +ffffffff81bb5990 t dpt_clear_range +ffffffff81bb59c0 t dpt_insert_entries +ffffffff81bb5ab0 t dpt_cleanup +ffffffff81bb5b00 t dpt_bind_vma +ffffffff81bb5ba0 t dpt_unbind_vma +ffffffff81bb5bd0 T intel_dpt_destroy +ffffffff81bb5c20 T intel_dpt_configure +ffffffff81bb5df0 t __ww_mutex_lock +ffffffff81bb6000 T intel_drrs_type_str +ffffffff81bb6040 T intel_drrs_is_active +ffffffff81bb6070 T intel_drrs_activate +ffffffff81bb6270 T intel_drrs_deactivate +ffffffff81bb6470 T intel_drrs_invalidate +ffffffff81bb6490 t intel_drrs_frontbuffer_update +ffffffff81bb6720 T intel_drrs_flush +ffffffff81bb6740 T intel_drrs_crtc_init +ffffffff81bb6800 t intel_drrs_downclock_work +ffffffff81bb6950 T intel_drrs_crtc_debugfs_add +ffffffff81bb6980 T intel_drrs_connector_debugfs_add +ffffffff81bb6990 t __delayed_work_tick +ffffffff81bb7000 T intel_dsb_reg_write +ffffffff81bb7140 T intel_dsb_finish +ffffffff81bb71c0 T intel_dsb_commit +ffffffff81bb7390 T intel_dsb_wait +ffffffff81bb75b0 T intel_dsb_prepare +ffffffff81bb7780 T intel_dsb_cleanup +ffffffff81bb8000 T intel_dsi_wait_panel_power_cycle +ffffffff81bb80f0 T intel_dsi_shutdown +ffffffff81bb81e0 T intel_dsi_bitrate +ffffffff81bb8270 T intel_dsi_tlpx_ns +ffffffff81bb82c0 T intel_dsi_get_modes +ffffffff81bb82d0 T intel_dsi_mode_valid +ffffffff81bb83a0 T intel_dsi_host_init +ffffffff81bb8460 T intel_dsi_get_panel_orientation +ffffffff81bb9000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81bb90a0 t dcs_setup_backlight +ffffffff81bb9130 t dcs_get_backlight +ffffffff81bb9230 t dcs_set_backlight +ffffffff81bb9330 t dcs_disable_backlight +ffffffff81bb9700 t dcs_enable_backlight +ffffffff81bba000 T intel_dsi_vbt_exec_sequence +ffffffff81bba020 T intel_dsi_log_params +ffffffff81bba460 T intel_dsi_vbt_init +ffffffff81bba970 T intel_dsi_vbt_gpio_init +ffffffff81bba990 T intel_dsi_vbt_gpio_cleanup +ffffffff81bbb000 T intel_dvo_init +ffffffff81bbb730 t intel_disable_dvo +ffffffff81bbb7f0 t intel_enable_dvo +ffffffff81bbb8f0 t intel_dvo_get_hw_state +ffffffff81bbb970 t intel_dvo_get_config +ffffffff81bbba20 t intel_dvo_compute_config +ffffffff81bbbac0 t intel_dvo_pre_enable +ffffffff81bbbbd0 t intel_dvo_connector_get_hw_state +ffffffff81bbbc60 t intel_dvo_enc_destroy +ffffffff81bbbca0 t intel_dvo_detect +ffffffff81bbbdc0 t intel_dvo_get_modes +ffffffff81bbbe40 t intel_dvo_mode_valid +ffffffff81bbc000 T intel_fb_get_format_info +ffffffff81bbc2b0 T intel_fb_is_tiled_modifier +ffffffff81bbc300 t lookup_modifier +ffffffff81bbc540 T intel_fb_is_ccs_modifier +ffffffff81bbc590 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81bbc5e0 T intel_fb_is_mc_ccs_modifier +ffffffff81bbc630 T intel_fb_plane_get_modifiers +ffffffff81bbc830 T intel_fb_plane_supports_modifier +ffffffff81bbc8b0 T intel_format_info_is_yuv_semiplanar +ffffffff81bbc930 T intel_fb_is_ccs_aux_plane +ffffffff81bbc9f0 T intel_fb_rc_ccs_cc_plane +ffffffff81bbcae0 T is_surface_linear +ffffffff81bbcc70 T main_to_ccs_plane +ffffffff81bbcd20 T skl_ccs_to_main_plane +ffffffff81bbce80 T skl_main_to_aux_plane +ffffffff81bbcfc0 T intel_tile_size +ffffffff81bbd000 T intel_tile_width_bytes +ffffffff81bbd470 T intel_tile_height +ffffffff81bbd4e0 T intel_tile_row_size +ffffffff81bbd570 T intel_fb_align_height +ffffffff81bbd5f0 T intel_fb_modifier_uses_dpt +ffffffff81bbd630 T intel_fb_uses_dpt +ffffffff81bbd690 T intel_cursor_alignment +ffffffff81bbd6f0 T intel_surf_alignment +ffffffff81bbd9c0 T intel_fb_plane_get_subsampling +ffffffff81bbdb40 T intel_plane_adjust_aligned_offset +ffffffff81bbdbc0 t intel_adjust_aligned_offset +ffffffff81bbdd90 T intel_plane_compute_aligned_offset +ffffffff81bbdea0 t intel_compute_aligned_offset +ffffffff81bbe090 T intel_fb_needs_pot_stride_remap +ffffffff81bbe100 T intel_fb_supports_90_270_rotation +ffffffff81bbe160 T intel_fill_fb_info +ffffffff81bbed90 t calc_plane_remap_info +ffffffff81bbf7b0 T intel_fb_fill_view +ffffffff81bbf820 T intel_plane_compute_gtt +ffffffff81bbfd60 t intel_plane_check_stride +ffffffff81bbfee0 T intel_framebuffer_init +ffffffff81bc0880 t gen12_ccs_aux_stride +ffffffff81bc0900 T intel_user_framebuffer_create +ffffffff81bc0aa0 T intel_framebuffer_create +ffffffff81bc0b50 t intel_adjust_tile_offset +ffffffff81bc0c90 t intel_user_framebuffer_destroy +ffffffff81bc0d10 t intel_user_framebuffer_create_handle +ffffffff81bc0d40 t intel_user_framebuffer_dirty +ffffffff81bc1000 T intel_pin_and_fence_fb_obj +ffffffff81bc13c0 t i915_gem_object_lock +ffffffff81bc1610 T intel_unpin_fb_vma +ffffffff81bc1680 T intel_plane_pin_fb +ffffffff81bc1ab0 T intel_plane_unpin_fb +ffffffff81bc2000 T intel_fbc_cleanup +ffffffff81bc2240 T intel_fbc_pre_update +ffffffff81bc2900 T intel_fbc_post_update +ffffffff81bc2ac0 T intel_fbc_invalidate +ffffffff81bc2c70 T intel_fbc_flush +ffffffff81bc2f60 T intel_fbc_atomic_check +ffffffff81bc3550 T intel_fbc_disable +ffffffff81bc3620 t __intel_fbc_disable +ffffffff81bc3780 T intel_fbc_update +ffffffff81bc3f00 T intel_fbc_reset_underrun +ffffffff81bc4090 T intel_fbc_handle_fifo_underrun_irq +ffffffff81bc4150 T intel_fbc_add_plane +ffffffff81bc4180 T intel_fbc_init +ffffffff81bc4440 T intel_fbc_sanitize +ffffffff81bc4520 T intel_fbc_crtc_debugfs_add +ffffffff81bc4550 T intel_fbc_debugfs_register +ffffffff81bc4580 t intel_fbc_is_ok +ffffffff81bc4700 t intel_fbc_update_state +ffffffff81bc4aa0 t intel_fbc_underrun_work_fn +ffffffff81bc4b90 t ivb_fbc_activate +ffffffff81bc4e00 t ilk_fbc_deactivate +ffffffff81bc4ec0 t ilk_fbc_is_active +ffffffff81bc4f30 t ivb_fbc_is_compressing +ffffffff81bc4fa0 t snb_fbc_nuke +ffffffff81bc5020 t ilk_fbc_program_cfb +ffffffff81bc5080 t ivb_fbc_set_false_color +ffffffff81bc5100 t snb_fbc_activate +ffffffff81bc51a0 t ilk_fbc_is_compressing +ffffffff81bc5210 t ilk_fbc_activate +ffffffff81bc5350 t i965_fbc_nuke +ffffffff81bc53f0 t g4x_fbc_activate +ffffffff81bc5510 t g4x_fbc_deactivate +ffffffff81bc55b0 t g4x_fbc_is_active +ffffffff81bc5610 t g4x_fbc_is_compressing +ffffffff81bc5670 t g4x_fbc_program_cfb +ffffffff81bc56c0 t i8xx_fbc_activate +ffffffff81bc5850 t i8xx_fbc_deactivate +ffffffff81bc5950 t i8xx_fbc_is_active +ffffffff81bc59b0 t i8xx_fbc_is_compressing +ffffffff81bc5a10 t i8xx_fbc_program_cfb +ffffffff81bc5ab0 t i8xx_fbc_nuke +ffffffff81bc6000 T intel_fbdev_init +ffffffff81bc6590 t intel_fbdev_suspend_worker +ffffffff81bc65c0 T intel_fbdev_initial_config_async +ffffffff81bc6630 T intel_fbdev_unregister +ffffffff81bc6670 T intel_fbdev_set_suspend +ffffffff81bc66a0 T intel_fbdev_fini +ffffffff81bc6750 T intel_fbdev_output_poll_changed +ffffffff81bc6800 T intel_fbdev_restore_mode +ffffffff81bc6890 T intel_fbdev_framebuffer +ffffffff81bc68d0 t intelfb_create +ffffffff81bc7310 t intelfb_dirty +ffffffff81bc7380 t intel_fbdev_set_par +ffffffff81bc8000 T assert_fdi_tx_enabled +ffffffff81bc8020 t assert_fdi_tx +ffffffff81bc8170 T assert_fdi_tx_disabled +ffffffff81bc8190 T assert_fdi_rx_enabled +ffffffff81bc8280 T assert_fdi_rx_disabled +ffffffff81bc8370 T assert_fdi_tx_pll_enabled +ffffffff81bc8470 T assert_fdi_rx_pll_enabled +ffffffff81bc8570 T assert_fdi_rx_pll_disabled +ffffffff81bc8670 T intel_fdi_link_train +ffffffff81bc8690 T intel_fdi_pll_freq_update +ffffffff81bc8740 T intel_fdi_link_freq +ffffffff81bc8790 T ilk_fdi_compute_config +ffffffff81bc8b20 T intel_fdi_normal_train +ffffffff81bc8ce0 T hsw_fdi_link_train +ffffffff81bc9300 T hsw_fdi_disable +ffffffff81bc94d0 T ilk_fdi_pll_enable +ffffffff81bc9730 T ilk_fdi_pll_disable +ffffffff81bc98b0 T ilk_fdi_disable +ffffffff81bc9b80 T intel_fdi_init_hook +ffffffff81bc9be0 t ilk_fdi_link_train +ffffffff81bca3f0 t gen6_fdi_link_train +ffffffff81bcae60 t ivb_manual_fdi_link_train +ffffffff81bcb920 t cpt_set_fdi_bc_bifurcation +ffffffff81bcc000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81bcc480 T intel_set_pch_fifo_underrun_reporting +ffffffff81bcc720 T intel_cpu_fifo_underrun_irq_handler +ffffffff81bcc940 T intel_pch_fifo_underrun_irq_handler +ffffffff81bcc9d0 T intel_check_cpu_fifo_underruns +ffffffff81bccc20 T intel_check_pch_fifo_underruns +ffffffff81bccd80 T intel_init_fifo_underrun_reporting +ffffffff81bcd000 T intel_frontbuffer_flip_prepare +ffffffff81bcd060 T intel_frontbuffer_flip_complete +ffffffff81bcd180 T intel_frontbuffer_flip +ffffffff81bcd290 T __intel_fb_invalidate +ffffffff81bcd350 T __intel_fb_flush +ffffffff81bcd480 T intel_frontbuffer_get +ffffffff81bcd600 t frontbuffer_active +ffffffff81bcd630 t frontbuffer_retire +ffffffff81bcd670 T intel_frontbuffer_put +ffffffff81bcd7c0 T intel_frontbuffer_track +ffffffff81bce000 T intel_atomic_global_obj_init +ffffffff81bce070 T intel_atomic_global_obj_cleanup +ffffffff81bce170 T intel_atomic_get_global_obj_state +ffffffff81bce3f0 T intel_atomic_get_old_global_obj_state +ffffffff81bce450 T intel_atomic_get_new_global_obj_state +ffffffff81bce4b0 T intel_atomic_swap_global_state +ffffffff81bce600 T intel_atomic_clear_global_state +ffffffff81bce730 T intel_atomic_lock_global_state +ffffffff81bce7c0 T intel_atomic_serialize_global_state +ffffffff81bce850 T intel_atomic_global_state_is_serialized +ffffffff81bcf000 T intel_gmbus_is_valid_pin +ffffffff81bcf100 T intel_gmbus_reset +ffffffff81bcf170 T intel_bb_set_bits +ffffffff81bcf2d0 T intel_bb_set_dir +ffffffff81bcf300 T intel_bb_read_bits +ffffffff81bcf4d0 T intel_acquire_bus +ffffffff81bcf730 T intel_release_bus +ffffffff81bcf910 T intel_send_start +ffffffff81bcf930 T intel_send_stop +ffffffff81bcf950 T intel_initiate_xfer +ffffffff81bcf970 T intel_read_byte +ffffffff81bcf990 T intel_write_byte +ffffffff81bcf9b0 T intel_gmbus_output_aksv +ffffffff81bcfab0 t do_gmbus_xfer +ffffffff81bd0140 T intel_gmbus_setup +ffffffff81bd04f0 T intel_gmbus_teardown +ffffffff81bd0580 T intel_gmbus_get_adapter +ffffffff81bd0600 T intel_gmbus_force_bit +ffffffff81bd06b0 T intel_gmbus_is_forced_bit +ffffffff81bd06e0 T intel_gmbus_irq_handler +ffffffff81bd0780 t gmbus_xfer_read +ffffffff81bd0a80 t gmbus_xfer_write +ffffffff81bd0cd0 t gmbus_wait +ffffffff81bd1130 t gmbus_wait_idle +ffffffff81bd1300 t gmbus_xfer +ffffffff81bd1400 t gmbus_func +ffffffff81bd1450 t gmbus_lock_bus +ffffffff81bd1470 t gmbus_trylock_bus +ffffffff81bd14d0 t gmbus_unlock_bus +ffffffff81bd2000 T intel_hdcp_capable +ffffffff81bd20b0 t intel_hdcp_read_valid_bksv +ffffffff81bd2350 T intel_hdcp2_capable +ffffffff81bd24b0 T is_hdcp_supported +ffffffff81bd2500 T intel_hdcp_component_init +ffffffff81bd2560 T intel_hdcp_init +ffffffff81bd2730 t intel_hdcp_check_work +ffffffff81bd56f0 t intel_hdcp_prop_work +ffffffff81bd5790 T intel_hdcp_enable +ffffffff81bd57f0 T intel_hdcp_disable +ffffffff81bd5970 t intel_hdcp_update_value +ffffffff81bd5b60 t _intel_hdcp2_disable +ffffffff81bd5fd0 t _intel_hdcp_disable +ffffffff81bd6330 T intel_hdcp_update_pipe +ffffffff81bd64e0 T intel_hdcp_component_fini +ffffffff81bd6590 T intel_hdcp_cleanup +ffffffff81bd66e0 T intel_hdcp_atomic_check +ffffffff81bd6770 T intel_hdcp_handle_cp_irq +ffffffff81bd6890 t __delayed_work_tick +ffffffff81bd68b0 t hdcp2_authenticate_repeater_topology +ffffffff81bd6bc0 t transcoder_name +ffffffff81bd6c00 t intel_hdcp_get_repeater_ctl +ffffffff81bd6ce0 t ktime_get_raw +ffffffff81bd6d60 t wait_remaining_ms_from_jiffies +ffffffff81bd6df0 t intel_hdcp_auth_downstream +ffffffff81bd82e0 t intel_write_sha_text +ffffffff81bd9000 T intel_hdcp_gsc_cs_required +ffffffff81bd9040 T intel_hdcp_gsc_init +ffffffff81bd9590 T intel_hdcp_gsc_fini +ffffffff81bd9600 T intel_hdcp_gsc_msg_send +ffffffff81bd99b0 t gsc_hdcp_initiate_session +ffffffff81bd9a10 t gsc_hdcp_verify_receiver_cert_prepare_km +ffffffff81bd9a70 t gsc_hdcp_verify_hprime +ffffffff81bd9ad0 t gsc_hdcp_store_pairing_info +ffffffff81bd9b30 t gsc_hdcp_initiate_locality_check +ffffffff81bd9b90 t gsc_hdcp_verify_lprime +ffffffff81bd9bf0 t gsc_hdcp_get_session_key +ffffffff81bd9c50 t gsc_hdcp_repeater_check_flow_prepare_ack +ffffffff81bd9cb0 t gsc_hdcp_verify_mprime +ffffffff81bd9d10 t gsc_hdcp_enable_authentication +ffffffff81bd9d70 t gsc_hdcp_close_session +ffffffff81bda000 T intel_hdmi_to_i915 +ffffffff81bda040 T hsw_write_infoframe +ffffffff81bda4c0 t hsw_dip_data_reg +ffffffff81bda680 T hsw_read_infoframe +ffffffff81bda750 T intel_hdmi_infoframe_enable +ffffffff81bda7f0 T intel_hdmi_infoframes_enabled +ffffffff81bda910 T intel_read_infoframe +ffffffff81bdaac0 T intel_hdmi_read_gcp_infoframe +ffffffff81bdaba0 T intel_dp_dual_mode_set_tmds_output +ffffffff81bdac70 T intel_hdmi_tmds_clock +ffffffff81bdacc0 T intel_hdmi_bpc_possible +ffffffff81bdadf0 T intel_hdmi_limited_color_range +ffffffff81bdae60 T intel_hdmi_compute_has_hdmi_sink +ffffffff81bdaed0 T intel_hdmi_compute_config +ffffffff81bdb520 t intel_hdmi_compute_output_format +ffffffff81bdb6a0 t intel_hdmi_compute_hdmi_infoframe +ffffffff81bdb780 t intel_hdmi_compute_drm_infoframe +ffffffff81bdb890 T intel_hdmi_encoder_shutdown +ffffffff81bdb970 T intel_hdmi_handle_sink_scrambling +ffffffff81bdba70 T intel_infoframe_init +ffffffff81bdbc10 t vlv_write_infoframe +ffffffff81bdbf90 t vlv_read_infoframe +ffffffff81bdc130 t vlv_set_infoframes +ffffffff81bdc4b0 t vlv_infoframes_enabled +ffffffff81bdc550 t g4x_write_infoframe +ffffffff81bdc840 t g4x_read_infoframe +ffffffff81bdc990 t g4x_set_infoframes +ffffffff81bdcc50 t g4x_infoframes_enabled +ffffffff81bdccd0 t hsw_set_infoframes +ffffffff81bdcfb0 t hsw_infoframes_enabled +ffffffff81bdd040 t ibx_write_infoframe +ffffffff81bdd380 t ibx_read_infoframe +ffffffff81bdd500 t ibx_set_infoframes +ffffffff81bdd880 t ibx_infoframes_enabled +ffffffff81bdd910 t cpt_write_infoframe +ffffffff81bddc50 t cpt_read_infoframe +ffffffff81bdddd0 t cpt_set_infoframes +ffffffff81bde0f0 t cpt_infoframes_enabled +ffffffff81bde170 T intel_hdmi_init_connector +ffffffff81bdea00 T intel_hdmi_dsc_get_slice_height +ffffffff81bdea60 T intel_hdmi_dsc_get_num_slices +ffffffff81bdebe0 T intel_hdmi_dsc_get_bpp +ffffffff81bdecc0 t intel_hdmi_compute_clock +ffffffff81bdef40 t hdmi_port_clock_valid +ffffffff81bdf1a0 t intel_write_infoframe +ffffffff81bdf390 t intel_hdmi_detect +ffffffff81bdf580 t intel_hdmi_force +ffffffff81bdf630 t intel_hdmi_connector_register +ffffffff81bdf640 t intel_hdmi_connector_unregister +ffffffff81bdf650 t intel_hdmi_set_edid +ffffffff81bdf990 t intel_hdmi_get_modes +ffffffff81bdf9a0 t intel_hdmi_mode_valid +ffffffff81bdfb80 t intel_hdmi_connector_atomic_check +ffffffff81bdfbb0 t intel_hdmi_mode_clock_valid +ffffffff81bdfd70 t intel_hdmi_hdcp_write_an_aksv +ffffffff81bdfef0 t intel_hdmi_hdcp_read_bksv +ffffffff81bdffd0 t intel_hdmi_hdcp_read_bstatus +ffffffff81be00b0 t intel_hdmi_hdcp_repeater_present +ffffffff81be01a0 t intel_hdmi_hdcp_read_ri_prime +ffffffff81be0280 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81be0370 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81be0450 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81be0550 t intel_hdmi_hdcp_toggle_signalling +ffffffff81be0810 t intel_hdmi_hdcp_check_link +ffffffff81be0bb0 t intel_hdmi_hdcp2_capable +ffffffff81be0c80 t intel_hdmi_hdcp2_write_msg +ffffffff81be0da0 t intel_hdmi_hdcp2_read_msg +ffffffff81be1210 t intel_hdmi_hdcp2_check_link +ffffffff81be2000 T intel_hpd_pin_default +ffffffff81be2030 T intel_encoder_hotplug +ffffffff81be2190 T intel_hpd_trigger_irq +ffffffff81be2210 T intel_hpd_irq_handler +ffffffff81be2670 T intel_hpd_init +ffffffff81be2790 T intel_hpd_poll_enable +ffffffff81be2820 T intel_hpd_poll_disable +ffffffff81be2880 T intel_hpd_init_early +ffffffff81be29d0 t i915_hotplug_work_func +ffffffff81be2e80 t i915_digport_work_func +ffffffff81be3030 t i915_hpd_poll_init_work +ffffffff81be3180 t intel_hpd_irq_storm_reenable_work +ffffffff81be34f0 T intel_hpd_cancel_work +ffffffff81be3630 T intel_hpd_disable +ffffffff81be36d0 T intel_hpd_enable +ffffffff81be3750 T intel_hpd_debugfs_register +ffffffff81be3780 t __delayed_work_tick +ffffffff81be4000 T i915_hotplug_interrupt_update_locked +ffffffff81be40c0 T i915_hotplug_interrupt_update +ffffffff81be41b0 T i9xx_hpd_irq_ack +ffffffff81be4310 T i9xx_hpd_irq_handler +ffffffff81be44d0 T ibx_hpd_irq_handler +ffffffff81be46a0 T xelpdp_pica_irq_handler +ffffffff81be49c0 T icp_irq_handler +ffffffff81be4ca0 T spt_irq_handler +ffffffff81be4f70 T ilk_hpd_irq_handler +ffffffff81be50b0 T bxt_hpd_irq_handler +ffffffff81be5230 T gen11_hpd_irq_handler +ffffffff81be54d0 T intel_hpd_enable_detection +ffffffff81be5510 T intel_hpd_irq_setup +ffffffff81be5560 T intel_hotplug_irq_init +ffffffff81be57f0 t i915_hpd_irq_setup +ffffffff81be5910 t i915_hpd_enable_detection +ffffffff81be59c0 t icp_hpd_irq_setup +ffffffff81be5bd0 t icp_hpd_enable_detection +ffffffff81be5ce0 t dg1_hpd_irq_setup +ffffffff81be5d50 t dg1_hpd_enable_detection +ffffffff81be5ec0 t xelpdp_hpd_irq_setup +ffffffff81be6340 t xelpdp_hpd_enable_detection +ffffffff81be6510 t gen11_hpd_irq_setup +ffffffff81be67a0 t gen11_hpd_enable_detection +ffffffff81be69e0 t bxt_hpd_irq_setup +ffffffff81be6b90 t bxt_hpd_enable_detection +ffffffff81be6ca0 t spt_hpd_irq_setup +ffffffff81be6ee0 t spt_hpd_enable_detection +ffffffff81be7020 t ilk_hpd_irq_setup +ffffffff81be72b0 t ilk_hpd_enable_detection +ffffffff81be8000 T intel_hti_init +ffffffff81be8070 T intel_hti_uses_phy +ffffffff81be8110 T intel_hti_dpll_mask +ffffffff81be9000 T intel_load_detect_get_pipe +ffffffff81be9430 t intel_modeset_disable_planes +ffffffff81be9510 T intel_load_detect_release_pipe +ffffffff81bea000 T intel_lpe_audio_irq_handler +ffffffff81bea020 T intel_lpe_audio_init +ffffffff81bea050 T intel_lpe_audio_teardown +ffffffff81bea070 T intel_lpe_audio_notify +ffffffff81beb000 T lspcon_detect_hdr_capability +ffffffff81beb0c0 T lspcon_write_infoframe +ffffffff81beb950 T lspcon_read_infoframe +ffffffff81beb990 T lspcon_set_infoframes +ffffffff81bebc20 T lspcon_infoframes_enabled +ffffffff81bebe30 T lspcon_wait_pcon_mode +ffffffff81bebe50 t lspcon_wait_mode +ffffffff81bec180 T lspcon_init +ffffffff81bec660 T intel_lspcon_infoframes_enabled +ffffffff81bec690 T lspcon_resume +ffffffff81bec9a0 t lspcon_change_mode +ffffffff81bed000 T intel_lvds_port_enabled +ffffffff81bed090 T intel_get_lvds_encoder +ffffffff81bed0f0 T intel_is_dual_link_lvds +ffffffff81bed150 T intel_lvds_init +ffffffff81bed950 t intel_enable_lvds +ffffffff81bedad0 t intel_pre_enable_lvds +ffffffff81beddf0 t intel_lvds_compute_config +ffffffff81bedf70 t pch_disable_lvds +ffffffff81bedf90 t pch_post_disable_lvds +ffffffff81bedfb0 t gmch_disable_lvds +ffffffff81bedff0 t intel_lvds_get_hw_state +ffffffff81bee0c0 t intel_lvds_get_config +ffffffff81bee1e0 t intel_lvds_shutdown +ffffffff81bee290 t compute_is_dual_link_lvds +ffffffff81bee380 t intel_no_lvds_dmi_callback +ffffffff81bee3d0 t intel_disable_lvds +ffffffff81bee520 t intel_lvds_get_modes +ffffffff81bee580 t intel_lvds_mode_valid +ffffffff81bee630 t intel_dual_link_lvds_callback +ffffffff81bef000 T _intel_modeset_lock_begin +ffffffff81bef070 T _intel_modeset_lock_loop +ffffffff81bef0b0 T _intel_modeset_lock_end +ffffffff81bf0000 T intel_modeset_setup_hw_state +ffffffff81bf16b0 t intel_crtc_disable_noatomic +ffffffff81bf1d80 t intel_crtc_disable_noatomic_begin +ffffffff81bf3000 T intel_modeset_verify_crtc +ffffffff81bf3630 t verify_connector_state +ffffffff81bf3b10 T intel_modeset_verify_disabled +ffffffff81bf4000 T intel_opregion_notify_encoder +ffffffff81bf4190 t swsci +ffffffff81bf4530 T intel_opregion_notify_adapter +ffffffff81bf4590 T intel_opregion_asle_intr +ffffffff81bf45e0 T intel_opregion_setup +ffffffff81bf4f90 t asle_work +ffffffff81bf5490 T intel_opregion_get_panel_type +ffffffff81bf55a0 T intel_opregion_get_edid +ffffffff81bf5690 T intel_opregion_headless_sku +ffffffff81bf56e0 T intel_opregion_register +ffffffff81bf5780 T intel_opregion_resume +ffffffff81bf5820 T intel_opregion_suspend +ffffffff81bf58e0 T intel_opregion_unregister +ffffffff81bf59c0 T intel_opregion_cleanup +ffffffff81bf5ad0 t intel_no_opregion_vbt_callback +ffffffff81bf5b30 t intel_use_opregion_panel_type_callback +ffffffff81bf6000 T intel_overlay_reset +ffffffff81bf6050 T intel_overlay_switch_off +ffffffff81bf62a0 t intel_overlay_release_old_vid +ffffffff81bf64a0 T intel_overlay_put_image_ioctl +ffffffff81bf6850 t update_pfit_vscale_ratio +ffffffff81bf6930 t check_overlay_dst +ffffffff81bf6a10 t check_overlay_src +ffffffff81bf6c60 t intel_overlay_do_put_image +ffffffff81bf7920 T intel_overlay_attrs_ioctl +ffffffff81bf7cc0 t check_gamma +ffffffff81bf7eb0 T intel_overlay_setup +ffffffff81bf8160 t intel_overlay_last_flip_retire +ffffffff81bf81a0 T intel_overlay_cleanup +ffffffff81bf8260 T intel_overlay_capture_error_state +ffffffff81bf8370 T intel_overlay_print_error_state +ffffffff81bf88b0 t intel_overlay_release_old_vid_tail +ffffffff81bf8980 t intel_overlay_off_tail +ffffffff81bf8b70 t intel_overlay_flip_prepare +ffffffff81bf9000 T intel_panel_use_ssc +ffffffff81bf9060 T intel_panel_preferred_fixed_mode +ffffffff81bf90b0 T intel_panel_fixed_mode +ffffffff81bf9230 T intel_panel_downclock_mode +ffffffff81bf9330 T intel_panel_highest_mode +ffffffff81bf9390 T intel_panel_get_modes +ffffffff81bf9440 T intel_panel_drrs_type +ffffffff81bf9470 T intel_panel_compute_config +ffffffff81bf9630 T intel_panel_add_edid_fixed_modes +ffffffff81bf9b90 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81bf9c00 t intel_panel_add_fixed_mode +ffffffff81bf9d90 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81bf9e00 T intel_panel_add_encoder_fixed_mode +ffffffff81bf9e40 T intel_panel_fitting +ffffffff81bfa4b0 T intel_panel_detect +ffffffff81bfa550 T intel_panel_mode_valid +ffffffff81bfa600 T intel_panel_init_alloc +ffffffff81bfa650 T intel_panel_init +ffffffff81bfa790 T intel_panel_fini +ffffffff81bfb000 T intel_has_pch_trancoder +ffffffff81bfb060 T intel_crtc_pch_transcoder +ffffffff81bfb0a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81bfb0f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81bfb140 T ilk_pch_pre_enable +ffffffff81bfb170 T ilk_pch_enable +ffffffff81bfb820 t ilk_pch_transcoder_set_timings +ffffffff81bfbaf0 T ilk_pch_disable +ffffffff81bfbb10 T ilk_pch_post_disable +ffffffff81bfbfc0 T ilk_pch_get_config +ffffffff81bfc1d0 T lpt_pch_enable +ffffffff81bfc4a0 T lpt_pch_disable +ffffffff81bfc5e0 T lpt_pch_get_config +ffffffff81bfc6d0 T intel_pch_sanitize +ffffffff81bfca10 t assert_pch_dp_disabled +ffffffff81bfcbc0 t assert_pch_hdmi_disabled +ffffffff81bfd000 T lpt_disable_iclkip +ffffffff81bfd0a0 T lpt_iclkip +ffffffff81bfd130 T lpt_program_iclkip +ffffffff81bfd450 T lpt_get_iclkip +ffffffff81bfd590 T lpt_disable_clkout_dp +ffffffff81bfd690 T intel_init_pch_refclk +ffffffff81bff000 T intel_crtc_initial_plane_config +ffffffff81c00000 T intel_pmdemand_init +ffffffff81c00150 T intel_pmdemand_init_early +ffffffff81c001e0 T intel_pmdemand_update_phys_mask +ffffffff81c00290 T intel_pmdemand_update_port_clock +ffffffff81c002d0 T intel_pmdemand_atomic_check +ffffffff81c00710 t intel_pmdemand_update_max_ddiclk +ffffffff81c007e0 t intel_pmdemand_update_active_non_tc_phys +ffffffff81c00a10 T intel_pmdemand_init_pmdemand_params +ffffffff81c00c10 T intel_pmdemand_program_dbuf +ffffffff81c00de0 t intel_pmdemand_wait +ffffffff81c01020 T intel_pmdemand_pre_plane_update +ffffffff81c01140 t intel_pmdemand_program_params +ffffffff81c015f0 T intel_pmdemand_post_plane_update +ffffffff81c01700 t intel_pmdemand_duplicate_state +ffffffff81c01790 t intel_pmdemand_destroy_state +ffffffff81c02000 T intel_pps_lock +ffffffff81c02070 T intel_pps_unlock +ffffffff81c020e0 T intel_pps_reset_all +ffffffff81c02240 T intel_pps_check_power_unlocked +ffffffff81c02590 t pps_name +ffffffff81c02640 T intel_pps_wait_power_cycle +ffffffff81c02710 t wait_panel_power_cycle +ffffffff81c02920 T intel_pps_vdd_on_unlocked +ffffffff81c02f80 T intel_pps_vdd_on +ffffffff81c03160 T intel_pps_vdd_off_sync +ffffffff81c03270 t intel_pps_vdd_off_sync_unlocked +ffffffff81c03730 T intel_pps_vdd_off_unlocked +ffffffff81c03920 T intel_pps_on_unlocked +ffffffff81c03e70 T intel_pps_on +ffffffff81c03f40 T intel_pps_off_unlocked +ffffffff81c043b0 T intel_pps_off +ffffffff81c04480 T intel_pps_backlight_on +ffffffff81c046d0 T intel_pps_backlight_off +ffffffff81c04940 T intel_pps_backlight_power +ffffffff81c04b70 T vlv_pps_init +ffffffff81c04d70 t vlv_detach_power_sequencer +ffffffff81c04f70 t vlv_steal_power_sequencer +ffffffff81c050b0 t pps_init_delays +ffffffff81c05590 t pps_init_registers +ffffffff81c059a0 T intel_pps_have_panel_power_or_vdd +ffffffff81c05b40 T intel_pps_encoder_reset +ffffffff81c05d30 t vlv_initial_power_sequencer_setup +ffffffff81c060a0 t pps_vdd_init +ffffffff81c06280 T intel_pps_init +ffffffff81c06780 t edp_panel_vdd_work +ffffffff81c06840 T intel_pps_init_late +ffffffff81c06ac0 T intel_pps_unlock_regs_wa +ffffffff81c06be0 T intel_pps_setup +ffffffff81c06c50 T assert_pps_unlocked +ffffffff81c06f20 t intel_pps_get_registers +ffffffff81c07830 t wait_panel_status +ffffffff81c07cd0 t intel_pps_readout_hw_state +ffffffff81c07ec0 t __delayed_work_tick +ffffffff81c08000 T intel_psr_irq_handler +ffffffff81c08710 t transcoder_name +ffffffff81c08750 T intel_psr_init_dpcd +ffffffff81c08a40 T intel_psr_compute_config +ffffffff81c08c40 t intel_psr2_config_valid +ffffffff81c09120 T intel_psr_get_config +ffffffff81c092e0 T intel_psr_disable +ffffffff81c09420 t intel_psr_disable_locked +ffffffff81c09810 T intel_psr_pause +ffffffff81c09a30 t intel_psr_exit +ffffffff81c09d10 T intel_psr_resume +ffffffff81c09db0 t intel_psr_activate +ffffffff81c0a550 T intel_psr2_disable_plane_sel_fetch_arm +ffffffff81c0a5c0 T intel_psr2_program_plane_sel_fetch_arm +ffffffff81c0a660 T intel_psr2_program_plane_sel_fetch_noarm +ffffffff81c0a7d0 T intel_psr2_program_trans_man_trk_ctl +ffffffff81c0a8c0 T intel_psr2_sel_fetch_update +ffffffff81c0b070 T intel_psr_pre_plane_update +ffffffff81c0b250 t wm_optimization_wa +ffffffff81c0b410 T intel_psr_post_plane_update +ffffffff81c0c190 T intel_psr_wait_for_idle_locked +ffffffff81c0c380 T intel_psr_debug_set +ffffffff81c0c750 T intel_psr_invalidate +ffffffff81c0c9b0 T intel_psr_flush +ffffffff81c0ce50 T intel_psr_init +ffffffff81c0cfa0 t intel_psr_work +ffffffff81c0d1a0 t tgl_dc3co_disable_work +ffffffff81c0d200 T intel_psr_short_pulse +ffffffff81c0d670 T intel_psr_enabled +ffffffff81c0d700 T intel_psr_lock +ffffffff81c0d7c0 T intel_psr_unlock +ffffffff81c0d880 T intel_psr_debugfs_register +ffffffff81c0d8b0 T intel_psr_connector_debugfs_add +ffffffff81c0d8e0 t _compute_psr2_sdp_prior_scanline_indication +ffffffff81c0d9a0 t _compute_psr2_wake_times +ffffffff81c0daa0 t intel_psr2_sel_fetch_config_valid +ffffffff81c0db30 t psr2_granularity_check +ffffffff81c0dc20 t tgl_psr2_disable_dc3co +ffffffff81c0dd40 t __delayed_work_tick +ffffffff81c0e000 T intel_lookup_range_min_qp +ffffffff81c0e120 T intel_lookup_range_max_qp +ffffffff81c0f000 T intel_init_quirks +ffffffff81c0f110 T intel_has_quirk +ffffffff81c0f150 t quirk_ssc_force_disable +ffffffff81c0f180 t quirk_invert_brightness +ffffffff81c0f1b0 t quirk_backlight_present +ffffffff81c0f1e0 t quirk_increase_t12_delay +ffffffff81c0f210 t quirk_increase_ddi_disabled_time +ffffffff81c0f240 t intel_dmi_reverse_brightness +ffffffff81c0f290 t intel_dmi_no_pps_backlight +ffffffff81c10000 T intel_sdvo_port_enabled +ffffffff81c100b0 T intel_sdvo_init +ffffffff81c112f0 t intel_sdvo_compute_config +ffffffff81c11720 t pch_disable_sdvo +ffffffff81c11750 t pch_post_disable_sdvo +ffffffff81c11760 t intel_disable_sdvo +ffffffff81c11940 t intel_sdvo_pre_enable +ffffffff81c12430 t intel_enable_sdvo +ffffffff81c12650 t intel_sdvo_get_hw_state +ffffffff81c12750 t intel_sdvo_get_config +ffffffff81c12c30 t intel_sdvo_set_target_input +ffffffff81c12cb0 t intel_sdvo_get_input_pixel_clock_range +ffffffff81c12d60 t intel_sdvo_ddc_proxy_xfer +ffffffff81c12e10 t intel_sdvo_ddc_proxy_func +ffffffff81c12e40 t __intel_sdvo_write_cmd +ffffffff81c13350 t proxy_lock_bus +ffffffff81c13380 t proxy_trylock_bus +ffffffff81c133b0 t proxy_unlock_bus +ffffffff81c133e0 t intel_sdvo_enc_destroy +ffffffff81c133f0 t intel_sdvo_set_output_timings_from_mode +ffffffff81c13520 t intel_sdvo_get_preferred_input_mode +ffffffff81c13910 t intel_sdvo_get_dtd_from_mode +ffffffff81c13a90 t intel_sdvo_read_response +ffffffff81c14000 t intel_sdvo_get_value +ffffffff81c14080 t intel_sdvo_write_sdvox +ffffffff81c142f0 t intel_sdvo_write_infoframe +ffffffff81c144f0 t intel_sdvo_read_infoframe +ffffffff81c14770 t intel_sdvo_hotplug +ffffffff81c147c0 t intel_sdvo_connector_get_hw_state +ffffffff81c14860 t intel_sdvo_detect +ffffffff81c14bc0 t intel_sdvo_connector_register +ffffffff81c14bd0 t intel_sdvo_connector_unregister +ffffffff81c14be0 t intel_sdvo_connector_duplicate_state +ffffffff81c14c70 t intel_sdvo_connector_atomic_set_property +ffffffff81c14e40 t intel_sdvo_connector_atomic_get_property +ffffffff81c15060 t intel_sdvo_get_analog_edid +ffffffff81c150a0 t intel_sdvo_connector_matches_edid +ffffffff81c15140 t intel_sdvo_get_modes +ffffffff81c15470 t intel_sdvo_mode_valid +ffffffff81c155a0 t intel_sdvo_atomic_check +ffffffff81c15660 t intel_sdvo_create_enhance_property +ffffffff81c17000 T intel_snps_phy_wait_for_calibration +ffffffff81c170e0 T intel_snps_phy_update_psr_power_state +ffffffff81c171b0 T intel_snps_phy_set_signal_levels +ffffffff81c17460 T intel_mpllb_calc_state +ffffffff81c17610 T intel_snps_phy_check_hdmi_link_rate +ffffffff81c176b0 T intel_mpllb_enable +ffffffff81c17950 T intel_mpllb_disable +ffffffff81c17b00 T intel_mpllb_calc_port_clock +ffffffff81c17bd0 T intel_mpllb_readout_hw_state +ffffffff81c17d90 T intel_mpllb_state_verify +ffffffff81c19000 T vlv_plane_min_cdclk +ffffffff81c190f0 T ivb_plane_min_cdclk +ffffffff81c191b0 T hsw_plane_min_cdclk +ffffffff81c19250 T chv_plane_check_rotation +ffffffff81c192d0 T intel_sprite_plane_create +ffffffff81c19670 t vlv_sprite_update_noarm +ffffffff81c19770 t vlv_sprite_update_arm +ffffffff81c19e10 t vlv_sprite_disable_arm +ffffffff81c19ea0 t vlv_sprite_get_hw_state +ffffffff81c19f90 t vlv_sprite_check +ffffffff81c1a090 t ivb_sprite_update_noarm +ffffffff81c1a200 t ivb_sprite_update_arm +ffffffff81c1a5e0 t ivb_sprite_disable_arm +ffffffff81c1a690 t ivb_sprite_get_hw_state +ffffffff81c1a760 t g4x_sprite_check +ffffffff81c1aa40 t hsw_sprite_max_stride +ffffffff81c1aaa0 t g4x_sprite_max_stride +ffffffff81c1ab10 t ivb_sprite_min_cdclk +ffffffff81c1ac50 t g4x_sprite_update_noarm +ffffffff81c1adb0 t g4x_sprite_update_arm +ffffffff81c1b200 t g4x_sprite_disable_arm +ffffffff81c1b2b0 t g4x_sprite_get_hw_state +ffffffff81c1b380 t g4x_sprite_min_cdclk +ffffffff81c1b460 t vlv_sprite_ctl +ffffffff81c1b660 t vlv_sprite_format_mod_supported +ffffffff81c1b7a0 t ivb_sprite_ctl +ffffffff81c1b9e0 t g4x_sprite_ctl +ffffffff81c1bbb0 t snb_sprite_format_mod_supported +ffffffff81c1bca0 t g4x_sprite_format_mod_supported +ffffffff81c1c000 T intel_sprite_set_colorkey_ioctl +ffffffff81c1d000 T intel_tc_port_in_tbt_alt_mode +ffffffff81c1d090 T intel_tc_port_in_dp_alt_mode +ffffffff81c1d120 T intel_tc_port_in_legacy_mode +ffffffff81c1d1b0 T intel_tc_cold_requires_aux_pw +ffffffff81c1d230 T intel_tc_port_get_lane_mask +ffffffff81c1d380 T intel_tc_port_get_pin_assignment_mask +ffffffff81c1d4d0 T intel_tc_port_fia_max_lane_count +ffffffff81c1d720 T intel_tc_port_set_fia_lane_count +ffffffff81c1d910 T intel_tc_port_init_mode +ffffffff81c1db80 t intel_tc_port_update_mode +ffffffff81c1dfb0 T intel_tc_port_sanitize_mode +ffffffff81c1e340 T intel_tc_port_connected_locked +ffffffff81c1e4b0 T intel_tc_port_ref_held +ffffffff81c1e510 T intel_tc_port_connected +ffffffff81c1e5a0 T intel_tc_port_link_needs_reset +ffffffff81c1e670 T intel_tc_port_link_reset +ffffffff81c1e7b0 T intel_tc_port_link_cancel_reset_work +ffffffff81c1e880 T intel_tc_port_lock +ffffffff81c1e8a0 t __intel_tc_port_lock +ffffffff81c1ea20 T intel_tc_port_suspend +ffffffff81c1ea90 T intel_tc_port_unlock +ffffffff81c1eb10 T intel_tc_port_get_link +ffffffff81c1ebb0 T intel_tc_port_put_link +ffffffff81c1ec70 T intel_tc_port_init +ffffffff81c1ef30 t kasprintf +ffffffff81c1f010 t intel_tc_port_disconnect_phy_work +ffffffff81c1f070 t intel_tc_port_link_reset_work +ffffffff81c1f430 T intel_tc_port_cleanup +ffffffff81c1f510 t intel_tc_port_needs_reset +ffffffff81c1f630 t tgl_tc_phy_cold_off_domain +ffffffff81c1f660 t xelpdp_tc_phy_hpd_live_status +ffffffff81c1f7a0 t adlp_tc_phy_is_ready +ffffffff81c1f8c0 t xelpdp_tc_phy_is_owned +ffffffff81c1f9b0 t xelpdp_tc_phy_get_hw_state +ffffffff81c1fb80 t xelpdp_tc_phy_connect +ffffffff81c1fe60 t xelpdp_tc_phy_disconnect +ffffffff81c1ffe0 t adlp_tc_phy_init +ffffffff81c20050 t tc_phy_get_current_mode +ffffffff81c203b0 t tc_phy_wait_for_ready +ffffffff81c20550 t xelpdp_tc_phy_enable_tcss_power +ffffffff81c20800 t tc_phy_verify_legacy_or_dp_alt_mode +ffffffff81c20a10 t xelpdp_tc_phy_wait_for_tcss_power +ffffffff81c20c60 t adlp_tc_phy_cold_off_domain +ffffffff81c20cc0 t adlp_tc_phy_hpd_live_status +ffffffff81c20de0 t adlp_tc_phy_is_owned +ffffffff81c20ec0 t adlp_tc_phy_get_hw_state +ffffffff81c20f80 t adlp_tc_phy_connect +ffffffff81c21320 t adlp_tc_phy_disconnect +ffffffff81c214c0 t icl_tc_phy_hpd_live_status +ffffffff81c21660 t icl_tc_phy_is_ready +ffffffff81c21780 t icl_tc_phy_is_owned +ffffffff81c218a0 t icl_tc_phy_get_hw_state +ffffffff81c21960 t icl_tc_phy_connect +ffffffff81c21b20 t icl_tc_phy_disconnect +ffffffff81c21bb0 t tgl_tc_phy_init +ffffffff81c21d20 t icl_tc_phy_take_ownership +ffffffff81c21eb0 t icl_tc_phy_cold_off_domain +ffffffff81c21f10 t icl_tc_phy_init +ffffffff81c21f70 t __delayed_work_tick +ffffffff81c22000 T intel_tv_init +ffffffff81c22490 t intel_tv_compute_config +ffffffff81c22990 t intel_tv_get_config +ffffffff81c22eb0 t intel_tv_pre_enable +ffffffff81c238f0 t intel_enable_tv +ffffffff81c23970 t intel_disable_tv +ffffffff81c239e0 t intel_tv_get_hw_state +ffffffff81c23a50 t intel_tv_connector_duplicate_state +ffffffff81c23ae0 t intel_tv_mode_to_mode +ffffffff81c23c30 t intel_tv_get_modes +ffffffff81c23fb0 t intel_tv_detect +ffffffff81c24520 t intel_tv_mode_valid +ffffffff81c245e0 t intel_tv_atomic_check +ffffffff81c25000 T i915_get_vblank_counter +ffffffff81c25220 T g4x_get_vblank_counter +ffffffff81c252b0 T intel_crtc_get_vblank_timestamp +ffffffff81c252d0 t i915_get_crtc_scanoutpos +ffffffff81c25720 T intel_get_crtc_scanline +ffffffff81c257a0 t __intel_get_crtc_scanline +ffffffff81c25a00 T intel_wait_for_pipe_scanline_stopped +ffffffff81c25a10 t wait_for_pipe_scanline_moving +ffffffff81c25cd0 T intel_wait_for_pipe_scanline_moving +ffffffff81c25cf0 T intel_crtc_update_active_timings +ffffffff81c26000 T intel_dsc_source_support +ffffffff81c26050 T intel_dsc_compute_params +ffffffff81c26680 T intel_dsc_power_domain +ffffffff81c26730 T intel_dsc_get_num_vdsc_instances +ffffffff81c26780 T intel_dsc_dsi_pps_write +ffffffff81c26ac0 T intel_dsc_dp_pps_write +ffffffff81c26bc0 T intel_uncompressed_joiner_enable +ffffffff81c26cf0 T intel_dsc_enable +ffffffff81c28a10 T intel_dsc_disable +ffffffff81c28ba0 T intel_dsc_get_config +ffffffff81c29000 T intel_vga_disable +ffffffff81c29150 T intel_vga_redisable_power_on +ffffffff81c29200 T intel_vga_redisable +ffffffff81c292e0 T intel_vga_reset_io_mem +ffffffff81c29340 T intel_vga_register +ffffffff81c29370 T intel_vga_unregister +ffffffff81c2a000 T intel_vrr_is_capable +ffffffff81c2a080 T intel_vrr_check_modeset +ffffffff81c2a110 T intel_vrr_vmin_vblank_start +ffffffff81c2a170 T intel_vrr_vmax_vblank_start +ffffffff81c2a1d0 T intel_vrr_compute_config +ffffffff81c2a360 T intel_vrr_set_transcoder_timings +ffffffff81c2a560 T intel_vrr_send_push +ffffffff81c2a5e0 T intel_vrr_is_push_sent +ffffffff81c2a670 T intel_vrr_enable +ffffffff81c2a7a0 T intel_vrr_disable +ffffffff81c2a8f0 T intel_vrr_get_config +ffffffff81c2b000 T intel_update_watermarks +ffffffff81c2b040 T intel_compute_pipe_wm +ffffffff81c2b090 T intel_compute_intermediate_wm +ffffffff81c2b120 T intel_initial_watermarks +ffffffff81c2b180 T intel_atomic_update_watermarks +ffffffff81c2b1c0 T intel_optimize_watermarks +ffffffff81c2b200 T intel_compute_global_watermarks +ffffffff81c2b250 T intel_wm_get_hw_state +ffffffff81c2b290 T intel_wm_plane_visible +ffffffff81c2b2f0 T intel_print_wm_latency +ffffffff81c2b410 T intel_wm_init +ffffffff81c2b430 T intel_wm_debugfs_register +ffffffff81c2c000 T skl_update_scaler_crtc +ffffffff81c2c0c0 t skl_update_scaler +ffffffff81c2c430 T skl_update_scaler_plane +ffffffff81c2c850 T intel_atomic_setup_scalers +ffffffff81c2ce30 T skl_pfit_enable +ffffffff81c2d330 T skl_program_plane_scaler +ffffffff81c2da80 T skl_detach_scalers +ffffffff81c2dbe0 T skl_scaler_disable +ffffffff81c2dd10 T skl_scaler_get_config +ffffffff81c2e000 T skl_format_to_fourcc +ffffffff81c2e180 T icl_is_nv12_y_plane +ffffffff81c2e1f0 T icl_hdr_plane_mask +ffffffff81c2e220 T icl_is_hdr_plane +ffffffff81c2e260 T skl_calc_main_surface_offset +ffffffff81c2e4e0 T skl_universal_plane_create +ffffffff81c2ed70 t icl_plane_min_width +ffffffff81c2ef00 t icl_hdr_plane_max_width +ffffffff81c2ef60 t icl_sdr_plane_max_width +ffffffff81c2ef90 t icl_plane_max_height +ffffffff81c2efc0 t icl_plane_min_cdclk +ffffffff81c2f010 t glk_plane_max_width +ffffffff81c2f0d0 t skl_plane_max_height +ffffffff81c2f100 t glk_plane_min_cdclk +ffffffff81c2f170 t skl_plane_max_width +ffffffff81c2f250 t skl_plane_min_cdclk +ffffffff81c2f2c0 t skl_plane_max_stride +ffffffff81c2f360 t icl_plane_update_noarm +ffffffff81c2fc40 t icl_plane_update_arm +ffffffff81c2fdf0 t icl_plane_disable_arm +ffffffff81c2ff10 t skl_plane_update_noarm +ffffffff81c300c0 t skl_plane_update_arm +ffffffff81c303f0 t skl_plane_disable_arm +ffffffff81c304b0 t skl_plane_get_hw_state +ffffffff81c305a0 t skl_plane_check +ffffffff81c31390 t skl_plane_async_flip +ffffffff81c314c0 t skl_plane_enable_flip_done +ffffffff81c31540 t skl_plane_disable_flip_done +ffffffff81c315c0 T skl_get_initial_plane_config +ffffffff81c31e00 t skl_plane_aux_dist +ffffffff81c31f30 t skl_surf_address +ffffffff81c32060 t skl_plane_check_nv12_rotation +ffffffff81c32110 t pxp_is_borked +ffffffff81c32170 t skl_plane_ctl +ffffffff81c32860 t glk_plane_color_ctl +ffffffff81c329b0 t skl_check_main_ccs_coordinates +ffffffff81c32b60 t gen12_plane_format_mod_supported +ffffffff81c32de0 t skl_plane_format_mod_supported +ffffffff81c34000 T intel_enabled_dbuf_slices_mask +ffffffff81c34140 T intel_sagv_pre_plane_update +ffffffff81c342f0 T intel_sagv_post_plane_update +ffffffff81c345a0 T intel_can_enable_sagv +ffffffff81c34610 T skl_ddb_dbuf_slice_mask +ffffffff81c346c0 T skl_write_plane_wm +ffffffff81c34b40 T skl_write_cursor_wm +ffffffff81c34f20 T skl_ddb_allocation_overlaps +ffffffff81c34fc0 T intel_wm_state_verify +ffffffff81c35a50 t skl_pipe_wm_get_hw_state +ffffffff81c35db0 T skl_watermark_ipc_enabled +ffffffff81c35de0 T skl_watermark_ipc_update +ffffffff81c35ea0 T skl_watermark_ipc_init +ffffffff81c35f80 T skl_wm_init +ffffffff81c36830 T intel_atomic_get_dbuf_state +ffffffff81c36850 T intel_dbuf_init +ffffffff81c368d0 T intel_dbuf_pre_plane_update +ffffffff81c36c10 T intel_dbuf_post_plane_update +ffffffff81c36d00 T intel_mbus_dbox_update +ffffffff81c36fa0 T skl_watermark_debugfs_register +ffffffff81c36fd0 t skl_sagv_disable +ffffffff81c37110 t skl_compute_wm +ffffffff81c3a5e0 t skl_wm_get_hw_state_and_sanitize +ffffffff81c3ae40 t skl_build_plane_wm_single +ffffffff81c3b1f0 t skl_compute_wm_params +ffffffff81c3b600 t skl_compute_plane_wm +ffffffff81c3ba50 t skl_compute_dbuf_slices +ffffffff81c3bf50 t skl_ddb_entry_for_slices +ffffffff81c3c0a0 t intel_dbuf_duplicate_state +ffffffff81c3c140 t intel_dbuf_destroy_state +ffffffff81c3d000 T pixel_format_from_register_bits +ffffffff81c3d070 T vlv_dsi_wait_for_fifo_empty +ffffffff81c3d130 T vlv_dsi_init +ffffffff81c3dab0 t intel_dsi_compute_config +ffffffff81c3dc30 t intel_dsi_pre_enable +ffffffff81c3fc20 t bxt_dsi_enable +ffffffff81c3fc40 t intel_dsi_disable +ffffffff81c3ffb0 t intel_dsi_post_disable +ffffffff81c40e50 t intel_dsi_get_hw_state +ffffffff81c41160 t intel_dsi_get_config +ffffffff81c419d0 t intel_dsi_encoder_destroy +ffffffff81c41a00 t intel_dsi_prepare +ffffffff81c42820 t dpi_send_cmd +ffffffff81c429d0 t intel_dsi_host_attach +ffffffff81c42a00 t intel_dsi_host_detach +ffffffff81c42a30 t intel_dsi_host_transfer +ffffffff81c42ee0 t vlv_dsi_mode_valid +ffffffff81c43000 T vlv_dsi_pll_compute +ffffffff81c433d0 t vlv_dsi_pclk +ffffffff81c43580 T vlv_dsi_pll_enable +ffffffff81c43830 T vlv_dsi_pll_disable +ffffffff81c438d0 T bxt_dsi_pll_is_enabled +ffffffff81c439b0 T bxt_dsi_pll_disable +ffffffff81c43ae0 T vlv_dsi_get_pclk +ffffffff81c43bb0 T bxt_dsi_get_pclk +ffffffff81c43c80 T vlv_dsi_reset_clocks +ffffffff81c43d20 T bxt_dsi_pll_compute +ffffffff81c43ed0 T bxt_dsi_pll_enable +ffffffff81c44290 T bxt_dsi_reset_clocks +ffffffff81c443e0 T assert_dsi_pll_enabled +ffffffff81c44400 t assert_dsi_pll +ffffffff81c44530 T assert_dsi_pll_disabled +ffffffff81c45000 T i915_gem_busy_ioctl +ffffffff81c46000 T i915_gem_clflush_object +ffffffff81c46280 t clflush_work +ffffffff81c462f0 t clflush_release +ffffffff81c47000 T i915_lut_handle_alloc +ffffffff81c47020 T i915_lut_handle_free +ffffffff81c47040 T i915_gem_context_release +ffffffff81c47070 T i915_gem_init__contexts +ffffffff81c470d0 T i915_gem_context_open +ffffffff81c47290 t i915_gem_create_context +ffffffff81c47bb0 t proto_context_close +ffffffff81c47c70 t gem_context_register +ffffffff81c47e60 T i915_gem_context_close +ffffffff81c48010 t context_close +ffffffff81c48810 T i915_gem_vm_create_ioctl +ffffffff81c48950 t xa_alloc +ffffffff81c489f0 T i915_gem_vm_destroy_ioctl +ffffffff81c48ad0 T i915_gem_user_to_context_sseu +ffffffff81c48d30 T i915_gem_context_lookup +ffffffff81c48ec0 T i915_gem_context_create_ioctl +ffffffff81c49170 t proto_context_register +ffffffff81c49330 T i915_gem_context_destroy_ioctl +ffffffff81c494a0 T i915_gem_context_getparam_ioctl +ffffffff81c49930 T i915_gem_context_setparam_ioctl +ffffffff81c49e80 t set_proto_ctx_param +ffffffff81c4a670 T i915_gem_context_reset_stats_ioctl +ffffffff81c4a790 T i915_gem_engines_iter_next +ffffffff81c4a7e0 T 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intel_sa_mediagt_setup +ffffffff81cc8000 T intel_sseu_set_info +ffffffff81cc8040 T intel_sseu_subslice_total +ffffffff81cc81c0 T intel_sseu_get_hsw_subslices +ffffffff81cc8270 T intel_sseu_copy_eumask_to_user +ffffffff81cc85d0 T intel_sseu_copy_ssmask_to_user +ffffffff81cc8750 T intel_sseu_info_init +ffffffff81cc97d0 t cherryview_sseu_info_init +ffffffff81cc9a00 t hsw_sseu_info_init +ffffffff81cc9d00 T intel_sseu_make_rpcs +ffffffff81cc9ed0 T intel_sseu_dump +ffffffff81cca140 T intel_sseu_print_topology +ffffffff81cca440 T intel_sseu_print_ss_info +ffffffff81cca4b0 T intel_slicemask_from_xehp_dssmask +ffffffff81cca500 t xehp_load_dss_mask +ffffffff81cca640 t gen11_compute_sseu_info +ffffffff81ccb000 T intel_sseu_status +ffffffff81ccb920 T intel_sseu_debugfs_register +ffffffff81ccc000 T intel_gt_init_timelines +ffffffff81ccc060 T __intel_timeline_create +ffffffff81ccc270 T intel_timeline_create_from_engine +ffffffff81ccc340 T __intel_timeline_pin +ffffffff81ccc370 T intel_timeline_pin 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intel_gsc_uc_heci_cmd_submit_packet +ffffffff81cdc380 T intel_gsc_uc_heci_cmd_emit_mtl_header +ffffffff81cdc3e0 T intel_gsc_uc_heci_cmd_submit_nonpriv +ffffffff81cdc980 t i915_gem_object_lock +ffffffff81cdd000 T intel_guc_notify +ffffffff81cdd040 T intel_guc_init_send_regs +ffffffff81cdd0f0 T intel_guc_init_early +ffffffff81cdd290 t gen11_reset_guc_interrupts +ffffffff81cdd300 t gen11_enable_guc_interrupts +ffffffff81cdd3a0 t gen11_disable_guc_interrupts +ffffffff81cdd420 t gen9_reset_guc_interrupts +ffffffff81cdd520 t gen9_enable_guc_interrupts +ffffffff81cdd6e0 t gen9_disable_guc_interrupts +ffffffff81cdd810 T intel_guc_init_late +ffffffff81cdd820 T intel_guc_write_params +ffffffff81cddad0 T intel_guc_dump_time_info +ffffffff81cddc50 T intel_guc_init +ffffffff81cdde40 t guc_init_params +ffffffff81cde410 T intel_guc_fini +ffffffff81cde4f0 T intel_guc_send_mmio +ffffffff81cdea60 T intel_guc_to_host_process_recv_msg +ffffffff81cdeb50 T intel_guc_auth_huc +ffffffff81cdebb0 T intel_guc_suspend +ffffffff81cdecb0 T intel_guc_resume +ffffffff81cdece0 T intel_guc_allocate_vma +ffffffff81cdee30 T intel_guc_allocate_and_map_vma +ffffffff81cdef10 T intel_guc_self_cfg32 +ffffffff81cdf020 T intel_guc_self_cfg64 +ffffffff81cdf140 T intel_guc_load_status +ffffffff81cdf320 T intel_guc_write_barrier +ffffffff81ce0000 T intel_guc_ads_print_policy_info +ffffffff81ce0120 T intel_guc_global_policies_update +ffffffff81ce0330 T intel_guc_ads_create +ffffffff81ce09b0 t guc_prep_golden_context +ffffffff81ce0bd0 t guc_capture_prep_lists +ffffffff81ce1310 t __guc_ads_init +ffffffff81ce1870 T intel_guc_ads_init_late +ffffffff81ce1aa0 T intel_guc_ads_destroy +ffffffff81ce1b10 T intel_guc_ads_reset +ffffffff81ce1bc0 T intel_guc_engine_usage_offset +ffffffff81ce1c00 T intel_guc_engine_usage_record_map +ffffffff81ce1cb0 t guc_mmio_reg_add +ffffffff81ce2000 T intel_guc_capture_getlistsize +ffffffff81ce2020 t guc_capture_getlistsize +ffffffff81ce2280 T intel_guc_capture_getlist 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intel_guc_ct_print_info +ffffffff81ce8200 t ct_write +ffffffff81ce83e0 t ktime_get +ffffffff81ce8460 t ct_deadlocked +ffffffff81ce9000 T intel_guc_debugfs_register +ffffffff81cea000 T intel_guc_fw_upload +ffffffff81ceb000 T intel_gt_init_hwconfig +ffffffff81ceb210 T intel_gt_fini_hwconfig +ffffffff81cec000 T intel_guc_log_section_size_capture +ffffffff81cec050 t guc_log_init_sizes +ffffffff81cec2b0 T intel_guc_check_log_buf_overflow +ffffffff81cec360 T intel_guc_get_log_buffer_size +ffffffff81cec410 T intel_guc_get_log_buffer_offset +ffffffff81cec510 T intel_guc_log_init_early +ffffffff81cec590 t copy_debug_logs_work +ffffffff81cec5b0 T intel_guc_log_create +ffffffff81cec830 T intel_guc_log_destroy +ffffffff81cec860 T intel_guc_log_set_level +ffffffff81cec9d0 T intel_guc_log_relay_created +ffffffff81ceca00 T intel_guc_log_relay_open +ffffffff81cecad0 T intel_guc_log_relay_start +ffffffff81cecb40 T intel_guc_log_relay_flush +ffffffff81cecc10 t guc_log_copy_debuglogs_for_relay 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intel_guc_slpc_enable +ffffffff81cf14d0 T intel_guc_slpc_set_boost_freq +ffffffff81cf1580 t slpc_force_min_freq +ffffffff81cf16c0 T intel_guc_slpc_dec_waiters +ffffffff81cf1710 T intel_guc_slpc_print_info +ffffffff81cf18e0 T intel_guc_slpc_fini +ffffffff81cf2000 T intel_guc_wait_for_pending_msg +ffffffff81cf2190 T intel_guc_wait_for_idle +ffffffff81cf21e0 T intel_guc_busyness_park +ffffffff81cf2300 T intel_guc_busyness_unpark +ffffffff81cf23c0 t guc_update_pm_timestamp +ffffffff81cf25b0 T intel_guc_submission_reset_prepare +ffffffff81cf2e40 t guc_flush_destroyed_contexts +ffffffff81cf2ff0 T intel_guc_submission_reset +ffffffff81cf3150 t __guc_reset_context +ffffffff81cf34b0 T intel_guc_submission_cancel_requests +ffffffff81cf3810 T intel_guc_submission_reset_finish +ffffffff81cf3920 T intel_guc_submission_init +ffffffff81cf3ae0 T intel_guc_submission_fini +ffffffff81cf3b90 T intel_guc_submission_setup +ffffffff81cf4020 t guc_sched_engine_disabled +ffffffff81cf4050 t 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intel_guc_find_hung_context +ffffffff81cf72c0 T intel_guc_dump_active_requests +ffffffff81cf7480 T intel_guc_submission_print_info +ffffffff81cf7640 T intel_guc_submission_print_context_info +ffffffff81cf7b70 t emit_bb_start_parent_no_preempt_mid_batch +ffffffff81cf7cb0 T intel_guc_virtual_engine_has_heartbeat +ffffffff81cf7d40 t guc_update_engine_gt_clks +ffffffff81cf7f00 t guc_virtual_get_sibling +ffffffff81cf7fb0 t update_context_prio +ffffffff81cf81d0 t try_context_registration +ffffffff81cf8560 t guc_wq_item_append +ffffffff81cf8800 t guc_add_request +ffffffff81cf8a70 t clr_ctx_id_mapping +ffffffff81cf8ba0 t guc_context_policy_init_v70 +ffffffff81cf8d50 t guc_resume +ffffffff81cf8e70 t guc_request_alloc +ffffffff81cf92d0 t add_to_context +ffffffff81cf93e0 t remove_from_context +ffffffff81cf94c0 t guc_engine_reset_prepare +ffffffff81cf9530 t guc_rewind_nop +ffffffff81cf9560 t guc_reset_nop +ffffffff81cf9590 t guc_set_default_submission +ffffffff81cf95d0 t guc_engine_busyness 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intel_uc_init_mmio +ffffffff81d01220 T intel_uc_driver_remove +ffffffff81d012c0 T intel_uc_reset_prepare +ffffffff81d01340 t __uc_sanitize +ffffffff81d014a0 T intel_uc_reset +ffffffff81d014f0 T intel_uc_reset_finish +ffffffff81d01540 T intel_uc_cancel_requests +ffffffff81d01590 T intel_uc_runtime_suspend +ffffffff81d01740 T intel_uc_suspend +ffffffff81d01810 T intel_uc_resume +ffffffff81d018c0 T intel_uc_runtime_resume +ffffffff81d019b0 t guc_enable_communication +ffffffff81d01b70 t __uc_fini +ffffffff81d01bc0 t __uc_check_hw +ffffffff81d01c80 t __uc_fetch_firmwares +ffffffff81d01da0 t __uc_cleanup_firmwares +ffffffff81d01df0 t __uc_init +ffffffff81d01e70 t __uc_init_hw +ffffffff81d02610 t __uc_fini_hw +ffffffff81d02670 t __uc_resume_mappings +ffffffff81d03000 T intel_uc_debugfs_register +ffffffff81d04000 T intel_uc_fw_version_from_gsc_manifest +ffffffff81d04050 T intel_uc_fw_init_early +ffffffff81d045a0 t __uc_fw_auto_select +ffffffff81d046d0 T intel_uc_check_file_version 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i915_getparam_ioctl +ffffffff81d1a000 T intel_gpu_error_find_batch +ffffffff81d1a070 T i915_error_printf +ffffffff81d1a140 T intel_gpu_error_print_vma +ffffffff81d1a170 T i915_gpu_coredump_copy_to_buffer +ffffffff81d1a1d0 T __i915_gpu_coredump_free +ffffffff81d1a3d0 T intel_engine_coredump_alloc +ffffffff81d1ada0 T intel_engine_coredump_add_request +ffffffff81d1b0c0 T intel_engine_coredump_add_vma +ffffffff81d1b240 T i915_gpu_coredump_alloc +ffffffff81d1b500 T intel_gt_coredump_alloc +ffffffff81d1bf30 T i915_vma_capture_prepare +ffffffff81d1bfb0 T i915_vma_capture_finish +ffffffff81d1c020 T i915_gpu_coredump +ffffffff81d1c1a0 T i915_error_state_store +ffffffff81d1c360 T i915_capture_error_state +ffffffff81d1c400 T i915_first_error_state +ffffffff81d1c480 T i915_reset_error_state +ffffffff81d1c530 T i915_disable_error_state +ffffffff81d1c590 t capture_vma +ffffffff81d1d000 T i915_reg_read_ioctl +ffffffff81d1e000 T gen3_irq_reset +ffffffff81d1e110 T gen3_assert_iir_is_zero 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T i915_unaligned_memcpy_from_wc +ffffffff81d22260 T i915_memcpy_init_early +ffffffff81d23000 T i915_mitigate_clear_residuals +ffffffff81d24000 T i915_init +ffffffff81d242b0 t i915_check_nomodeset +ffffffff81d24310 t i915_mock_selftests +ffffffff81d24340 t i915_pmu_init +ffffffff81d24370 t i915_pmu_exit +ffffffff81d25000 T i915_params_dump +ffffffff81d257e0 T i915_params_copy +ffffffff81d25a90 T i915_params_free +ffffffff81d26000 T i915_pci_register_driver +ffffffff81d26030 T i915_pci_unregister_driver +ffffffff81d27000 T i915_oa_config_release +ffffffff81d27080 T i915_perf_get_oa_config +ffffffff81d270e0 T i915_perf_oa_timestamp_frequency +ffffffff81d271e0 T i915_oa_init_reg_state +ffffffff81d272d0 T i915_perf_open_ioctl +ffffffff81d27be0 T i915_perf_register +ffffffff81d27c10 T i915_perf_unregister +ffffffff81d27c80 T i915_perf_add_config_ioctl +ffffffff81d27ce0 T i915_perf_remove_config_ioctl +ffffffff81d27d50 T i915_perf_init +ffffffff81d28480 t gen7_is_valid_b_counter_addr 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t gen12_disable_metric_set +ffffffff81d2a570 t gen12_oa_hw_tail_read +ffffffff81d2a5e0 T i915_perf_sysctl_register +ffffffff81d2a610 T i915_perf_sysctl_unregister +ffffffff81d2a640 T i915_perf_fini +ffffffff81d2a780 t destroy_config +ffffffff81d2a830 T i915_perf_ioctl_version +ffffffff81d2a940 t get_sseu_config +ffffffff81d2a990 t emit_oa_config +ffffffff81d2b150 t i915_gem_object_lock +ffffffff81d2b3a0 t append_oa_status +ffffffff81d2b430 t append_oa_sample +ffffffff81d2b5b0 t lrc_configure_all_contexts +ffffffff81d2b760 t oa_configure_all_contexts +ffffffff81d2bb30 t gen8_modify_self +ffffffff81d2bd30 t gen8_modify_context +ffffffff81d2bf10 t gen12_configure_oar_context +ffffffff81d2d000 T i915_query_ioctl +ffffffff81d2d120 t query_topology_info +ffffffff81d2d170 t query_engine_info +ffffffff81d2d430 t query_perf_config +ffffffff81d2d7b0 t query_memregion_info +ffffffff81d2da60 t query_hwconfig_blob +ffffffff81d2daf0 t query_geometry_subslices +ffffffff81d2db90 t fill_topology_info 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T i915_user_extensions +ffffffff81d3c000 T __i915_printk +ffffffff81d3c0f0 T add_taint_for_CI +ffffffff81d3c120 T cancel_timer +ffffffff81d3c170 T set_timer_ms +ffffffff81d3c220 T i915_vtd_active +ffffffff81d3d000 T intel_vgpu_detect +ffffffff81d3d030 T intel_vgpu_register +ffffffff81d3d090 T intel_vgpu_active +ffffffff81d3d0c0 T intel_vgpu_has_full_ppgtt +ffffffff81d3d100 T intel_vgpu_has_hwsp_emulation +ffffffff81d3d140 T intel_vgpu_has_huge_gtt +ffffffff81d3d180 T intel_vgt_deballoon +ffffffff81d3d400 T intel_vgt_balloon +ffffffff81d3e000 T i915_vma_instance +ffffffff81d3e120 t vma_create +ffffffff81d3e630 T i915_vma_work +ffffffff81d3e6b0 T i915_vma_wait_for_bind +ffffffff81d3e740 T i915_vma_bind +ffffffff81d3eb10 T i915_vma_pin_iomap +ffffffff81d3ece0 T i915_vma_flush_writes +ffffffff81d3ed30 T i915_vma_unpin_iomap +ffffffff81d3eda0 T i915_vma_unpin_and_release +ffffffff81d3ee10 T i915_vma_misplaced +ffffffff81d3ef00 T __i915_vma_set_map_and_fenceable +ffffffff81d3ef90 T i915_gem_valid_gtt_space +ffffffff81d3f020 T vma_invalidate_tlb +ffffffff81d3f090 T i915_vma_pin_ww +ffffffff81d3f800 t i915_vma_insert +ffffffff81d3fbc0 T i915_ggtt_pin +ffffffff81d3fcc0 t __i915_ggtt_pin +ffffffff81d3fe90 t i915_gem_object_lock +ffffffff81d400e0 T i915_ggtt_clear_scanout +ffffffff81d40160 T i915_vma_close +ffffffff81d40240 T i915_vma_reopen +ffffffff81d402c0 T i915_vma_destroy_locked +ffffffff81d403d0 t release_references +ffffffff81d40540 T i915_vma_destroy +ffffffff81d406a0 T i915_vma_parked +ffffffff81d409e0 T i915_vma_revoke_mmap +ffffffff81d40af0 T _i915_vma_move_to_active +ffffffff81d40dc0 T __i915_vma_evict +ffffffff81d41160 T __i915_vma_unbind +ffffffff81d41210 T i915_vma_unbind +ffffffff81d41390 T i915_vma_unbind_async +ffffffff81d41550 t __i915_vma_unbind_async +ffffffff81d41630 T i915_vma_unbind_unlocked +ffffffff81d41770 T i915_vma_make_unshrinkable +ffffffff81d417c0 T i915_vma_make_shrinkable +ffffffff81d417e0 T i915_vma_make_purgeable +ffffffff81d41800 T i915_vma_module_exit +ffffffff81d41820 T i915_vma_module_init +ffffffff81d41890 t __i915_vma_active +ffffffff81d41940 t __i915_vma_retire +ffffffff81d419e0 t __vma_bind +ffffffff81d41a80 t __vma_release +ffffffff81d41b10 t intel_rotate_pages +ffffffff81d41ea0 t intel_remap_pages +ffffffff81d42330 t intel_partial_pages +ffffffff81d43000 T i915_vma_resource_alloc +ffffffff81d43060 T i915_vma_resource_free +ffffffff81d430a0 T i915_vma_resource_unhold +ffffffff81d430b0 t __i915_vma_resource_unhold +ffffffff81d431c0 T i915_vma_resource_hold +ffffffff81d43210 T i915_vma_resource_unbind +ffffffff81d43350 T __i915_vma_resource_init +ffffffff81d433d0 t i915_vma_resource_fence_notify +ffffffff81d434c0 T i915_vma_resource_bind_dep_sync +ffffffff81d436a0 T i915_vma_resource_bind_dep_sync_all +ffffffff81d43780 T i915_vma_resource_bind_dep_await +ffffffff81d43990 T i915_vma_resource_module_exit +ffffffff81d439b0 T i915_vma_resource_module_init +ffffffff81d43a10 t get_driver_name +ffffffff81d43a40 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cpt_init_clock_gating +ffffffff81d463c0 t vlv_init_clock_gating +ffffffff81d46510 t gen6_init_clock_gating +ffffffff81d467a0 t ilk_init_clock_gating +ffffffff81d469f0 t g4x_init_clock_gating +ffffffff81d46ad0 t i965gm_init_clock_gating +ffffffff81d46bd0 t i965g_init_clock_gating +ffffffff81d46c60 t gen3_init_clock_gating +ffffffff81d46d90 t i85x_init_clock_gating +ffffffff81d46e40 t i830_init_clock_gating +ffffffff81d47000 T intel_platform_name +ffffffff81d470a0 T intel_device_info_print +ffffffff81d47c30 T intel_device_info_runtime_init_early +ffffffff81d48360 T intel_device_info_runtime_init +ffffffff81d48440 T intel_device_info_driver_create +ffffffff81d48560 T intel_driver_caps_print +ffffffff81d49000 T intel_memory_region_lookup +ffffffff81d490e0 T intel_memory_region_by_type +ffffffff81d491a0 T intel_memory_region_reserve +ffffffff81d491c0 T intel_memory_region_debug +ffffffff81d49230 T intel_memory_region_create +ffffffff81d493e0 T intel_memory_region_set_name +ffffffff81d49470 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intel_runtime_pm_get_noresume +ffffffff81d4c480 T intel_runtime_pm_put_raw +ffffffff81d4c520 T intel_runtime_pm_put_unchecked +ffffffff81d4c600 T intel_runtime_pm_enable +ffffffff81d4c630 T intel_runtime_pm_disable +ffffffff81d4c660 T intel_runtime_pm_driver_release +ffffffff81d4c700 T intel_runtime_pm_init_early +ffffffff81d4d000 T intel_sbi_read +ffffffff81d4d060 t intel_sbi_rw +ffffffff81d4d270 T intel_sbi_write +ffffffff81d4e000 T intel_step_init +ffffffff81d4e530 T intel_step_name +ffffffff81d4e570 t pvc_step_lookup +ffffffff81d4f000 T gen3_stolen_base +ffffffff81d4f060 T gen11_stolen_base +ffffffff81d4f0f0 T i830_stolen_size +ffffffff81d4f170 T gen3_stolen_size +ffffffff81d4f1f0 T gen6_stolen_size +ffffffff81d4f250 T chv_stolen_size +ffffffff81d4f2d0 T gen8_stolen_size +ffffffff81d4f330 T gen9_stolen_size +ffffffff81d4f3b0 T intel_init_stolen_res +ffffffff81d50000 T intel_uncore_mmio_debug_init_early +ffffffff81d50070 T intel_uncore_forcewake_domain_to_str +ffffffff81d500f0 T intel_uncore_fw_release_timer +ffffffff81d50240 t fw_domains_put +ffffffff81d502e0 T intel_uncore_suspend +ffffffff81d50330 t intel_uncore_forcewake_reset +ffffffff81d50660 T intel_uncore_resume_early +ffffffff81d507d0 T intel_uncore_unclaimed_mmio +ffffffff81d50850 T intel_uncore_runtime_resume +ffffffff81d50880 T intel_uncore_forcewake_get +ffffffff81d50a20 T intel_uncore_forcewake_user_get +ffffffff81d50b50 T intel_uncore_forcewake_get__locked +ffffffff81d50c20 T intel_uncore_forcewake_user_put +ffffffff81d50d90 T intel_uncore_forcewake_put__locked +ffffffff81d50eb0 T intel_uncore_forcewake_put +ffffffff81d50ff0 T intel_uncore_forcewake_put_delayed +ffffffff81d51170 T intel_uncore_forcewake_flush +ffffffff81d51230 T assert_forcewakes_inactive +ffffffff81d512a0 T assert_forcewakes_active +ffffffff81d512d0 T intel_uncore_setup_mmio +ffffffff81d51300 t uncore_unmap_mmio +ffffffff81d51330 T intel_uncore_init_early +ffffffff81d513a0 T intel_uncore_init_mmio +ffffffff81d529e0 T intel_uncore_prune_engine_fw_domains +ffffffff81d52bf0 t fw_domain_fini +ffffffff81d52d00 T intel_uncore_fini_mmio +ffffffff81d52f70 T __intel_wait_for_register_fw +ffffffff81d53270 T __intel_wait_for_register +ffffffff81d53680 T intel_uncore_forcewake_for_reg +ffffffff81d537a0 t check_for_unclaimed_mmio +ffffffff81d53910 T intel_uncore_arm_unclaimed_mmio_detection +ffffffff81d53a30 t vgpu_write8 +ffffffff81d53a70 t vgpu_write16 +ffffffff81d53ab0 t vgpu_write32 +ffffffff81d53af0 t vgpu_read8 +ffffffff81d53b30 t vgpu_read16 +ffffffff81d53b70 t vgpu_read32 +ffffffff81d53bb0 t vgpu_read64 +ffffffff81d53bf0 t gen5_write8 +ffffffff81d53d00 t gen5_write16 +ffffffff81d53e10 t gen5_write32 +ffffffff81d53f20 t gen5_read8 +ffffffff81d54020 t gen5_read16 +ffffffff81d54120 t gen5_read32 +ffffffff81d54220 t gen5_read64 +ffffffff81d54320 t gen2_write8 +ffffffff81d54420 t gen2_write16 +ffffffff81d54520 t gen2_write32 +ffffffff81d54620 t gen2_read8 +ffffffff81d54710 t gen2_read16 +ffffffff81d54800 t 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T intel_pxp_key_check +ffffffff81d59340 T intel_pxp_invalidate +ffffffff81d5a000 T intel_pxp_huc_load_and_auth +ffffffff81d5b000 T intel_pxp_tee_stream_message +ffffffff81d5b190 T intel_pxp_tee_component_init +ffffffff81d5b460 T intel_pxp_tee_component_fini +ffffffff81d5b4e0 T intel_pxp_tee_cmd_create_arb_session +ffffffff81d5b760 T intel_pxp_tee_end_arb_fw_session +ffffffff81d5ba30 t i915_pxp_tee_component_bind +ffffffff81d5bc00 t i915_pxp_tee_component_unbind +ffffffff81d5c000 T intel_dram_detect +ffffffff81d5c4c0 t gen11_get_dram_info +ffffffff81d5c510 t bxt_get_dram_info +ffffffff81d5c860 t skl_get_dram_info +ffffffff81d5ca80 T intel_dram_edram_detect +ffffffff81d5cb10 t icl_pcode_read_mem_global_info +ffffffff81d5cc00 t skl_dram_get_channel_info +ffffffff81d5cde0 t skl_dram_get_dimm_info +ffffffff81d5d000 T intel_gmch_bridge_setup +ffffffff81d5d0e0 t intel_gmch_bridge_release +ffffffff81d5d110 T intel_gmch_bar_setup +ffffffff81d5d340 T intel_gmch_bar_teardown +ffffffff81d5d440 T intel_gmch_vga_set_state +ffffffff81d5e000 T intel_detect_pch +ffffffff81d5e200 t intel_pch_match +ffffffff81d5e250 t intel_pch_type +ffffffff81d5ead0 t intel_virt_detect_pch +ffffffff81d5f000 T vlv_iosf_sb_get +ffffffff81d5f020 T vlv_iosf_sb_put +ffffffff81d5f040 T vlv_punit_read +ffffffff81d5f0a0 t vlv_sideband_rw +ffffffff81d5f270 T vlv_punit_write +ffffffff81d5f2d0 T vlv_bunit_read +ffffffff81d5f330 T vlv_bunit_write +ffffffff81d5f390 T vlv_nc_read +ffffffff81d5f3f0 T vlv_iosf_sb_read +ffffffff81d5f450 T vlv_iosf_sb_write +ffffffff81d5f4a0 T vlv_cck_read +ffffffff81d5f500 T vlv_cck_write +ffffffff81d5f560 T vlv_ccu_read +ffffffff81d5f5c0 T vlv_ccu_write +ffffffff81d5f620 T vlv_dpio_read +ffffffff81d5f700 T vlv_dpio_write +ffffffff81d5f770 T vlv_flisdsi_read +ffffffff81d5f7d0 T vlv_flisdsi_write +ffffffff81d60000 T vlv_suspend_complete +ffffffff81d60d40 T vlv_resume_prepare +ffffffff81d61a90 T vlv_suspend_init +ffffffff81d61b00 T vlv_suspend_cleanup +ffffffff81d61b60 t vlv_wait_for_pw_status +ffffffff81d62000 T atom_execute_table_scratch_unlocked +ffffffff81d620c0 t atom_execute_table_locked +ffffffff81d62470 T atom_execute_table +ffffffff81d62550 T atom_parse +ffffffff81d62750 T atom_destroy +ffffffff81d62790 T atom_asic_init +ffffffff81d62a00 t get_u32 +ffffffff81d62a60 T atom_parse_data_header +ffffffff81d62b00 T atom_parse_cmd_header +ffffffff81d62b80 T atom_allocate_fb_scratch +ffffffff81d62c70 t atom_op_move +ffffffff81d62ea0 t atom_op_and +ffffffff81d630c0 t atom_op_or +ffffffff81d632e0 t atom_op_shift_left +ffffffff81d63520 t atom_op_shift_right +ffffffff81d63760 t atom_op_mul +ffffffff81d638f0 t atom_op_div +ffffffff81d63aa0 t atom_op_add +ffffffff81d63cc0 t atom_op_sub +ffffffff81d63ee0 t atom_op_setport +ffffffff81d64090 t atom_op_setregblock +ffffffff81d64170 t atom_op_setfbbase +ffffffff81d64250 t atom_op_compare +ffffffff81d64490 t atom_op_switch +ffffffff81d64710 t atom_op_jump +ffffffff81d649b0 t atom_op_test +ffffffff81d64bc0 t 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atombios_crtc_program_ss +ffffffff81d68f00 T atombios_crtc_mode_set +ffffffff81d69a10 T radeon_atombios_init_crtc +ffffffff81d69b00 t radeon_bo_reserve +ffffffff81d69ca0 t radeon_bo_unreserve +ffffffff81d69db0 t atombios_disable_ss +ffffffff81d69e90 t atombios_crtc_program_pll +ffffffff81d6a150 t atombios_crtc_prepare +ffffffff81d6a220 t atombios_crtc_commit +ffffffff81d6a2b0 t atombios_crtc_mode_fixup +ffffffff81d6b120 t atombios_crtc_disable +ffffffff81d6b3a0 t radeon_get_shared_dp_ppll +ffffffff81d6b4a0 t radeon_get_shared_nondp_ppll +ffffffff81d6c000 T radeon_atom_copy_swap +ffffffff81d6c020 T radeon_dp_aux_init +ffffffff81d6c110 t radeon_dp_aux_transfer_atom +ffffffff81d6c320 T radeon_dp_getsinktype +ffffffff81d6c3a0 T radeon_dp_getdpcd +ffffffff81d6c530 T radeon_dp_get_panel_mode +ffffffff81d6c650 T radeon_dp_set_link_config +ffffffff81d6c6e0 t radeon_dp_get_dp_link_config +ffffffff81d6c890 T radeon_dp_mode_valid_helper +ffffffff81d6c960 T radeon_dp_needs_link_train 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radeon_atom_hw_i2c_xfer +ffffffff81d73160 t radeon_process_i2c_ch +ffffffff81d73390 T radeon_atom_hw_i2c_func +ffffffff81d74000 T btc_get_max_clock_from_voltage_dependency_table +ffffffff81d740d0 T btc_apply_voltage_dependency_rules +ffffffff81d74140 T btc_skip_blacklist_clocks +ffffffff81d74230 T btc_adjust_clock_combinations +ffffffff81d74360 T btc_apply_voltage_delta_rules +ffffffff81d74490 T btc_program_mgcg_hw_sequence +ffffffff81d745a0 T btc_dpm_enabled +ffffffff81d745b0 T btc_notify_uvd_to_smc +ffffffff81d74640 T btc_reset_to_default +ffffffff81d74690 T btc_read_arb_registers +ffffffff81d74730 T btc_dpm_vblank_too_short +ffffffff81d747b0 T btc_dpm_pre_set_power_state +ffffffff81d75a00 T btc_dpm_set_power_state +ffffffff81d75de0 t btc_set_power_state_conditionally_enable_ulv +ffffffff81d75f60 T btc_dpm_post_set_power_state +ffffffff81d760a0 t btc_update_current_ps +ffffffff81d761b0 T btc_dpm_enable +ffffffff81d772a0 t btc_cg_clock_gating_enable +ffffffff81d773e0 t btc_mg_clock_gating_enable +ffffffff81d77520 t btc_ls_clock_gating_enable +ffffffff81d77660 t btc_init_stutter_mode +ffffffff81d776e0 T btc_dpm_disable +ffffffff81d77a50 T btc_dpm_setup_asic +ffffffff81d77b70 T btc_dpm_init +ffffffff81d77fe0 T btc_dpm_fini +ffffffff81d780b0 T btc_dpm_debugfs_print_current_performance_level +ffffffff81d78110 T btc_dpm_get_current_sclk +ffffffff81d781a0 T btc_dpm_get_current_mclk +ffffffff81d78230 T btc_dpm_get_sclk +ffffffff81d782a0 T btc_dpm_get_mclk +ffffffff81d79000 T ci_dpm_powergate_uvd +ffffffff81d793f0 T ci_dpm_vblank_too_short +ffffffff81d79490 T ci_fan_ctrl_get_fan_speed_percent +ffffffff81d79550 T ci_fan_ctrl_set_fan_speed_percent +ffffffff81d79640 T ci_fan_ctrl_set_mode +ffffffff81d79810 t ci_fan_ctrl_set_static_mode +ffffffff81d79900 t ci_thermal_start_smc_fan_control +ffffffff81d79b60 T ci_fan_ctrl_get_mode +ffffffff81d79bc0 T ci_dpm_force_performance_level +ffffffff81d7a540 t ci_upload_dpm_level_enable_mask +ffffffff81d7a8b0 T ci_dpm_pre_set_power_state +ffffffff81d7abb0 T ci_dpm_post_set_power_state +ffffffff81d7ac80 T ci_dpm_setup_asic +ffffffff81d7aed0 T ci_dpm_enable +ffffffff81d7c980 t ci_init_smc_table +ffffffff81d7d900 t ci_init_arb_table_index +ffffffff81d7d990 t ci_populate_initial_mc_reg_table +ffffffff81d7dc90 t ci_populate_pm_base +ffffffff81d7e020 t ci_dpm_start_smc +ffffffff81d7e0d0 t ci_enable_vr_hot_gpio_interrupt +ffffffff81d7e190 t ci_notify_smc_display_change +ffffffff81d7e270 t ci_enable_sclk_control +ffffffff81d7e2b0 t ci_enable_ulv +ffffffff81d7e430 t ci_enable_ds_master_switch +ffffffff81d7e650 t ci_start_dpm +ffffffff81d7e8a0 t ci_enable_didt +ffffffff81d7eba0 t ci_enable_smc_cac +ffffffff81d7ed50 t ci_enable_power_containment +ffffffff81d7f230 t ci_power_control_set_level +ffffffff81d7f360 t ci_enable_auto_throttle_source +ffffffff81d7f450 t ci_enable_thermal_based_sclk_dpm +ffffffff81d7f5d0 t ci_thermal_start_thermal_controller +ffffffff81d7f930 T ci_dpm_late_enable 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cypress_program_memory_timing_parameters +ffffffff81d9fac0 T cypress_populate_smc_initial_state +ffffffff81d9feb0 T cypress_populate_smc_acpi_state +ffffffff81da0260 T cypress_construct_voltage_tables +ffffffff81da0420 T cypress_populate_smc_voltage_tables +ffffffff81da0560 T cypress_get_mvdd_configuration +ffffffff81da0650 T cypress_populate_mc_reg_table +ffffffff81da09e0 T cypress_get_table_locations +ffffffff81da0af0 T cypress_enable_display_gap +ffffffff81da0b50 T cypress_dpm_setup_asic +ffffffff81da0cb0 T cypress_dpm_enable +ffffffff81da1960 t cypress_force_mc_use_s1 +ffffffff81da1c30 t cypress_gfx_clock_gating_enable +ffffffff81da2010 t cypress_mg_clock_gating_enable +ffffffff81da22f0 T cypress_dpm_disable +ffffffff81da2580 T cypress_dpm_set_power_state +ffffffff81da2880 T cypress_dpm_display_configuration_changed +ffffffff81da2960 T cypress_dpm_init +ffffffff81da2c30 T cypress_dpm_fini +ffffffff81da2cd0 T cypress_dpm_vblank_too_short +ffffffff81da2d50 t cypress_wait_for_mc_sequencer +ffffffff81da3000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81da3080 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81da3100 T dce3_2_afmt_write_sad_regs +ffffffff81da3200 T dce3_2_audio_set_dto +ffffffff81da3340 T dce3_2_hdmi_update_acr +ffffffff81da3710 T dce3_2_set_audio_packet +ffffffff81da38d0 T dce3_2_set_mute +ffffffff81da4000 T dce6_endpoint_rreg +ffffffff81da4100 T dce6_endpoint_wreg +ffffffff81da4210 T dce6_audio_get_pin +ffffffff81da43a0 T dce6_afmt_select_pin +ffffffff81da4430 T dce6_afmt_write_latency_fields +ffffffff81da44f0 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81da45d0 T dce6_afmt_dp_write_speaker_allocation +ffffffff81da46b0 T dce6_afmt_write_sad_regs +ffffffff81da4800 T dce6_audio_enable +ffffffff81da4850 T dce6_hdmi_audio_set_dto +ffffffff81da48c0 T dce6_dp_audio_set_dto +ffffffff81da5000 T eg_cg_rreg +ffffffff81da5090 T eg_cg_wreg +ffffffff81da5100 T eg_pif_phy0_rreg +ffffffff81da5190 T eg_pif_phy0_wreg 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evergreen_get_number_of_dram_channels +ffffffff81da71a0 T evergreen_bandwidth_update +ffffffff81da7380 t evergreen_line_buffer_adjust +ffffffff81da75a0 t evergreen_program_watermarks +ffffffff81da80a0 T evergreen_mc_wait_for_idle +ffffffff81da8140 T evergreen_pcie_gart_tlb_flush +ffffffff81da8220 T evergreen_mc_stop +ffffffff81da8e80 T evergreen_mc_resume +ffffffff81da9650 T evergreen_mc_program +ffffffff81da9a70 T evergreen_ring_ib_execute +ffffffff81da9f70 T evergreen_mc_init +ffffffff81daa0d0 T evergreen_print_gpu_status_regs +ffffffff81daa120 T evergreen_is_display_hung +ffffffff81daa350 T evergreen_gpu_check_soft_reset +ffffffff81daa4c0 T evergreen_gpu_pci_config_reset +ffffffff81daa690 T evergreen_asic_reset +ffffffff81daaa80 T evergreen_gfx_is_lockup +ffffffff81daab00 T sumo_rlc_fini +ffffffff81daad40 t radeon_bo_reserve +ffffffff81daaee0 t radeon_bo_unreserve +ffffffff81daaff0 T sumo_rlc_init +ffffffff81dab8e0 T evergreen_rlc_resume +ffffffff81dabc50 T evergreen_get_vblank_counter +ffffffff81dabcc0 T evergreen_disable_interrupt_state +ffffffff81dabfc0 T evergreen_irq_set +ffffffff81dac660 T evergreen_irq_suspend +ffffffff81dac6d0 T evergreen_irq_process +ffffffff81dad370 t evergreen_irq_ack +ffffffff81dadaa0 T evergreen_resume +ffffffff81dadbb0 t evergreen_init_golden_registers +ffffffff81dade20 t evergreen_startup +ffffffff81daf870 T evergreen_suspend +ffffffff81dafa80 T evergreen_init +ffffffff81daffc0 t evergreen_pcie_gart_fini +ffffffff81db00f0 T evergreen_fini +ffffffff81db0390 T evergreen_pcie_gen2_enable +ffffffff81db0620 T evergreen_program_aspm +ffffffff81db0e10 t evergreen_latency_watermark +ffffffff81db1010 t evergreen_uvd_start +ffffffff81db10f0 t evergreen_cp_load_microcode +ffffffff81db1250 t evergreen_cp_resume +ffffffff81db2070 t evergreen_uvd_resume +ffffffff81db3000 T evergreen_cs_parse +ffffffff81db5a40 T evergreen_dma_cs_parse +ffffffff81db6c40 T evergreen_ib_parse +ffffffff81db7110 T evergreen_dma_ib_parse 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ni_init_microcode +ffffffff81dc58c0 t request_firmware +ffffffff81dc5970 t release_firmware +ffffffff81dc59b0 T cayman_get_allowed_info_register +ffffffff81dc5a40 T tn_get_temp +ffffffff81dc5ae0 T cayman_pcie_gart_tlb_flush +ffffffff81dc5b30 T cayman_cp_int_cntl_setup +ffffffff81dc5b80 T cayman_fence_ring_emit +ffffffff81dc5f70 T cayman_ring_ib_execute +ffffffff81dc6440 T cayman_gfx_get_rptr +ffffffff81dc64d0 T cayman_gfx_get_wptr +ffffffff81dc6540 T cayman_gfx_set_wptr +ffffffff81dc65c0 T cayman_gpu_check_soft_reset +ffffffff81dc6760 T cayman_asic_reset +ffffffff81dc6af0 T cayman_gfx_is_lockup +ffffffff81dc6b70 T cayman_resume +ffffffff81dc6c30 t ni_init_golden_registers +ffffffff81dc6d20 t cayman_startup +ffffffff81dc82e0 T cayman_suspend +ffffffff81dc8520 T cayman_init +ffffffff81dc89b0 t cayman_uvd_init +ffffffff81dc8a70 t cayman_vce_init +ffffffff81dc8b50 t cayman_cp_fini +ffffffff81dc8be0 t cayman_pcie_gart_fini +ffffffff81dc8d30 T cayman_fini +ffffffff81dc9070 T cayman_vm_init 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ni_dpm_vblank_too_short +ffffffff81dcd0e0 T ni_dpm_force_performance_level +ffffffff81dcd250 T ni_copy_and_switch_arb_sets +ffffffff81dcd520 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81dcd5a0 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81dcd620 T ni_dpm_setup_asic +ffffffff81dcd880 T ni_update_current_ps +ffffffff81dcd950 T ni_update_requested_ps +ffffffff81dcda20 T ni_dpm_enable +ffffffff81dcea20 t ni_init_smc_table +ffffffff81dcf450 t ni_init_smc_spll_table +ffffffff81dcf5e0 t ni_init_arb_table_index +ffffffff81dcf690 t ni_populate_mc_reg_table +ffffffff81dcfbd0 t ni_initialize_smc_cac_tables +ffffffff81dd0ea0 t ni_initialize_hardware_cac_manager +ffffffff81dd14d0 t ni_populate_smc_tdp_limits +ffffffff81dd16b0 t ni_program_response_times +ffffffff81dd1800 T ni_dpm_disable +ffffffff81dd1c60 t ni_enable_power_containment +ffffffff81dd1d40 t ni_enable_smc_cac +ffffffff81dd1ea0 T ni_dpm_pre_set_power_state +ffffffff81dd2510 T ni_dpm_set_power_state +ffffffff81dd2890 t ni_upload_sw_state +ffffffff81dd3550 t ni_upload_mc_reg_table +ffffffff81dd37d0 t ni_power_control_set_level +ffffffff81dd38d0 T ni_dpm_post_set_power_state +ffffffff81dd39c0 T ni_dpm_init +ffffffff81dd4420 T ni_dpm_fini +ffffffff81dd44f0 T ni_dpm_print_power_state +ffffffff81dd45f0 T ni_dpm_debugfs_print_current_performance_level +ffffffff81dd4630 T ni_dpm_get_current_sclk +ffffffff81dd46a0 T ni_dpm_get_current_mclk +ffffffff81dd4710 T ni_dpm_get_sclk +ffffffff81dd4780 T ni_dpm_get_mclk +ffffffff81dd47e0 t ni_do_program_memory_timing_parameters +ffffffff81dd4940 t ni_calculate_sclk_params +ffffffff81dd4b90 t ni_calculate_power_boost_limit +ffffffff81dd4d30 t ni_populate_mclk_value +ffffffff81dd6000 T r100_wait_for_vblank +ffffffff81dd6190 T r100_page_flip +ffffffff81dd64a0 T r100_page_flip_pending +ffffffff81dd6570 T r100_pm_get_dynpm_state +ffffffff81dd6790 T r100_pm_init_profile +ffffffff81dd6870 T r100_pm_misc +ffffffff81dd6d10 T r100_pm_prepare +ffffffff81dd6dc0 T r100_pm_finish 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r100_cp_fini +ffffffff81dd8e40 T r100_cp_disable +ffffffff81dd8fa0 T r100_gui_wait_for_idle +ffffffff81dd9090 T r100_reloc_pitch_offset +ffffffff81dd9200 T r100_packet3_load_vbpntr +ffffffff81dd94f0 T r100_cs_parse_packet0 +ffffffff81dd9600 T r100_cs_packet_parse_vline +ffffffff81dd9830 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81dd98b0 T r100_cs_parse +ffffffff81ddaba0 T r100_cs_track_clear +ffffffff81ddaf30 T r100_cs_track_check +ffffffff81ddb7f0 T r100_mc_wait_for_idle +ffffffff81ddb890 T r100_gpu_is_lockup +ffffffff81ddb900 T r100_enable_bm +ffffffff81ddb950 T r100_bm_disable +ffffffff81ddba10 T r100_asic_reset +ffffffff81ddbda0 T r100_mc_stop +ffffffff81ddbf60 T r100_mc_resume +ffffffff81ddc020 T r100_set_common_regs +ffffffff81ddc1d0 T r100_vram_init_sizes +ffffffff81ddc3e0 T r100_vga_set_state +ffffffff81ddc440 T r100_pll_errata_after_index +ffffffff81ddc480 T r100_pll_rreg +ffffffff81ddc5f0 T r100_pll_wreg +ffffffff81ddc740 T r100_debugfs_rbbm_init +ffffffff81ddc770 T r100_debugfs_mc_info_init +ffffffff81ddc7a0 T r100_set_surface_reg +ffffffff81ddc9f0 T r100_clear_surface_reg +ffffffff81ddcab0 T r100_bandwidth_update +ffffffff81ddd520 T r100_ring_test +ffffffff81ddd850 T r100_ring_ib_execute +ffffffff81dddad0 T r100_ib_test +ffffffff81ddde90 T r100_vga_render_disable +ffffffff81dddef0 T r100_resume +ffffffff81dde130 t r100_startup +ffffffff81dde6f0 T r100_suspend +ffffffff81dde7f0 T r100_fini +ffffffff81dde960 T r100_restore_sanity +ffffffff81ddea00 T r100_init +ffffffff81ddef40 t r100_set_safe_registers +ffffffff81ddefc0 T r100_mm_rreg_slow +ffffffff81ddf050 T r100_mm_wreg_slow +ffffffff81ddf0c0 T r100_io_rreg +ffffffff81ddf170 T r100_io_wreg +ffffffff81ddf1f0 t r100_get_vtx_size +ffffffff81ddf2e0 t r100_cs_track_texture_print +ffffffff81de0000 T r200_copy_dma +ffffffff81de04e0 T r200_packet0_check +ffffffff81de1340 t r200_get_vtx_size_0 +ffffffff81de1500 t r200_get_vtx_size_1 +ffffffff81de1590 T r200_set_safe_registers +ffffffff81de2000 T rv370_pcie_rreg +ffffffff81de2090 T rv370_pcie_wreg +ffffffff81de2100 T rv370_pcie_gart_tlb_flush +ffffffff81de2390 T rv370_pcie_gart_get_page_entry +ffffffff81de23f0 T rv370_pcie_gart_set_page +ffffffff81de2430 T rv370_pcie_gart_init +ffffffff81de2510 T rv370_pcie_gart_enable +ffffffff81de2950 T rv370_pcie_gart_disable +ffffffff81de2b40 T rv370_pcie_gart_fini +ffffffff81de2b80 T r300_fence_ring_emit +ffffffff81de3190 T r300_ring_start +ffffffff81de3c30 T r300_mc_wait_for_idle +ffffffff81de3cd0 T r300_asic_reset +ffffffff81de3f30 T r300_mc_init +ffffffff81de4000 T rv370_set_pcie_lanes +ffffffff81de4220 T rv370_get_pcie_lanes +ffffffff81de42e0 T r300_cs_parse +ffffffff81de46b0 t r300_packet0_check +ffffffff81de5610 T r300_set_reg_safe +ffffffff81de5650 T r300_mc_program +ffffffff81de5800 T r300_clock_startup +ffffffff81de5890 T r300_resume +ffffffff81de5ab0 t r300_startup +ffffffff81de5ea0 T r300_suspend +ffffffff81de5f50 T r300_fini +ffffffff81de60b0 T r300_init +ffffffff81de7000 T r420_pm_init_profile +ffffffff81de70f0 T r420_pipes_init +ffffffff81de72f0 T r420_mc_rreg +ffffffff81de7380 T r420_mc_wreg +ffffffff81de7400 T r420_resume +ffffffff81de7620 t r420_startup +ffffffff81de78b0 T r420_suspend +ffffffff81de7aa0 T r420_fini +ffffffff81de7bf0 T r420_init +ffffffff81de7f50 T r420_debugfs_pipes_info_init +ffffffff81de7f80 t r420_cp_errata_init +ffffffff81de9000 T r520_mc_wait_for_idle +ffffffff81de90b0 T r520_resume +ffffffff81de91e0 t r520_startup +ffffffff81de96b0 T r520_init +ffffffff81dea000 T r600_rcu_rreg +ffffffff81dea0a0 T r600_rcu_wreg +ffffffff81dea120 T r600_uvd_ctx_rreg +ffffffff81dea1c0 T r600_uvd_ctx_wreg +ffffffff81dea240 T r600_get_allowed_info_register +ffffffff81dea2c0 T r600_get_xclk +ffffffff81dea2f0 T r600_set_uvd_clocks +ffffffff81dea980 T dce3_program_fmt +ffffffff81deaab0 T rv6xx_get_temp +ffffffff81deab00 T r600_pm_get_dynpm_state +ffffffff81deaf10 T rs780_pm_init_profile +ffffffff81deb020 T r600_pm_init_profile +ffffffff81deb2e0 T r600_pm_misc +ffffffff81deb3d0 T r600_gui_idle +ffffffff81deb410 T r600_hpd_sense +ffffffff81deb530 T r600_hpd_set_polarity +ffffffff81deb7b0 T r600_hpd_init +ffffffff81deb990 T r600_hpd_fini +ffffffff81debb40 T r600_pcie_gart_tlb_flush +ffffffff81debc80 T r600_pcie_gart_init +ffffffff81debd30 T r600_mc_wait_for_idle +ffffffff81debdd0 T rs780_mc_rreg +ffffffff81debe80 T rs780_mc_wreg +ffffffff81debf10 T r600_vram_scratch_init +ffffffff81dec030 t radeon_bo_reserve +ffffffff81dec1d0 t radeon_bo_unreserve +ffffffff81dec2e0 T r600_vram_scratch_fini +ffffffff81dec370 T r600_set_bios_scratch_engine_hung +ffffffff81dec3c0 T r600_gpu_check_soft_reset +ffffffff81dec790 T r600_asic_reset +ffffffff81decbc0 t r600_gpu_pci_config_reset +ffffffff81dece20 T r600_gfx_is_lockup +ffffffff81decea0 T r6xx_remap_render_backend +ffffffff81ded070 T r600_count_pipe_bits +ffffffff81ded0e0 T r600_pciep_rreg +ffffffff81ded170 T r600_pciep_wreg +ffffffff81ded1e0 T r600_cp_stop +ffffffff81ded260 T r600_init_microcode +ffffffff81ded810 t request_firmware +ffffffff81ded8c0 t release_firmware +ffffffff81ded900 T r600_gfx_get_rptr +ffffffff81ded960 T r600_gfx_get_wptr +ffffffff81ded9a0 T r600_gfx_set_wptr +ffffffff81ded9e0 T r600_cp_start +ffffffff81deddb0 T r600_cp_resume +ffffffff81dee1d0 T r600_ring_init +ffffffff81dee290 T r600_cp_fini +ffffffff81dee320 T r600_scratch_init +ffffffff81dee390 T r600_ring_test +ffffffff81dee6b0 T r600_fence_ring_emit +ffffffff81def020 T r600_semaphore_ring_emit +ffffffff81def240 T r600_copy_cpdma +ffffffff81def8b0 T r600_set_surface_reg +ffffffff81def8e0 T r600_clear_surface_reg +ffffffff81def910 T r600_vga_set_state +ffffffff81def970 T r600_resume +ffffffff81defa20 t r600_startup +ffffffff81df1930 T r600_suspend +ffffffff81df1af0 T r600_irq_suspend +ffffffff81df1bd0 t r600_pcie_gart_disable +ffffffff81df1dd0 T r600_init +ffffffff81df26f0 T r600_ih_ring_init +ffffffff81df2760 T r600_irq_fini +ffffffff81df28e0 t r600_pcie_gart_fini +ffffffff81df2920 T r600_fini +ffffffff81df2b70 T r600_ring_ib_execute +ffffffff81df3060 T r600_ib_test +ffffffff81df3370 T r600_ih_ring_alloc +ffffffff81df34c0 T r600_ih_ring_fini +ffffffff81df3570 T r600_rlc_stop +ffffffff81df3780 T r600_disable_interrupts +ffffffff81df3830 T r600_irq_init +ffffffff81df3cd0 t r600_disable_interrupt_state +ffffffff81df3fd0 T r600_irq_disable +ffffffff81df40a0 T r600_irq_set +ffffffff81df48a0 t r600_irq_ack +ffffffff81df4dd0 T r600_irq_process +ffffffff81df5b40 T r600_mmio_hdp_flush +ffffffff81df5bc0 T r600_set_pcie_lanes +ffffffff81df5d00 T r600_get_pcie_lanes +ffffffff81df5df0 T r600_get_gpu_clock_counter +ffffffff81df5ea0 t r600_cp_load_microcode +ffffffff81df6200 t r600_uvd_resume +ffffffff81df7000 T r600_fmt_is_valid_color +ffffffff81df7040 T r600_fmt_is_valid_texture +ffffffff81df7090 T r600_fmt_get_blocksize +ffffffff81df70d0 T r600_fmt_get_nblocksx +ffffffff81df7120 T r600_fmt_get_nblocksy +ffffffff81df7180 T r600_cs_common_vline_parse +ffffffff81df7470 T r600_mip_minify +ffffffff81df74d0 T r600_cs_parse +ffffffff81df9540 T r600_dma_cs_next_reloc +ffffffff81df95d0 T r600_dma_cs_parse +ffffffff81df9cb0 t r600_cs_track_check +ffffffff81dfae90 t r600_cs_check_reg +ffffffff81dfbe70 t r600_is_safe_reg +ffffffff81dfbf20 t r600_texture_size +ffffffff81dfd000 T r600_dma_get_rptr +ffffffff81dfd060 T r600_dma_get_wptr +ffffffff81dfd0a0 T r600_dma_set_wptr +ffffffff81dfd0e0 T r600_dma_stop +ffffffff81dfd170 T r600_dma_resume +ffffffff81dfd390 T r600_dma_fini +ffffffff81dfd410 T r600_dma_is_lockup +ffffffff81dfd490 T r600_dma_ring_test +ffffffff81dfd750 T r600_dma_fence_ring_emit +ffffffff81dfd960 T r600_dma_semaphore_ring_emit +ffffffff81dfdaa0 T r600_dma_ib_test +ffffffff81dfdd10 T r600_dma_ring_ib_execute +ffffffff81dfe0a0 T r600_copy_dma +ffffffff81dff000 T r600_dpm_print_class_info +ffffffff81dff340 T r600_dpm_print_cap_info +ffffffff81dff3e0 T r600_dpm_print_ps_status +ffffffff81dff4a0 T r600_dpm_get_vblank_time +ffffffff81dff560 T r600_dpm_get_vrefresh +ffffffff81dff5f0 T r600_calculate_u_and_p +ffffffff81dff670 T r600_calculate_at +ffffffff81dff720 T r600_gfx_clockgating_enable +ffffffff81dff830 T r600_dynamicpm_enable +ffffffff81dff880 T r600_enable_thermal_protection +ffffffff81dff8e0 T r600_enable_acpi_pm +ffffffff81dff930 T r600_enable_dynamic_pcie_gen2 +ffffffff81dff980 T r600_dynamicpm_enabled +ffffffff81dff9c0 T r600_enable_sclk_control +ffffffff81dffa20 T r600_enable_mclk_control +ffffffff81dffa80 T r600_enable_spll_bypass +ffffffff81dffad0 T r600_wait_for_spll_change +ffffffff81dffb60 T r600_set_bsp +ffffffff81dffba0 T r600_set_at +ffffffff81dffc00 T r600_set_tc +ffffffff81dffc60 T r600_select_td +ffffffff81dffd10 T r600_set_vrc +ffffffff81dffd50 T r600_set_tpu +ffffffff81dffdb0 T r600_set_tpc +ffffffff81dffe10 T r600_set_sstu +ffffffff81dffe70 T r600_set_sst +ffffffff81dffec0 T r600_set_git +ffffffff81dfff10 T r600_set_fctu +ffffffff81dfff70 T r600_set_fct +ffffffff81dfffc0 T r600_set_ctxcgtt3d_rphc +ffffffff81e00020 T r600_set_ctxcgtt3d_rsdc +ffffffff81e00080 T r600_set_vddc3d_oorsu +ffffffff81e000e0 T r600_set_vddc3d_oorphc +ffffffff81e00140 T r600_set_vddc3d_oorsdc +ffffffff81e001a0 T r600_set_mpll_lock_time +ffffffff81e001f0 T r600_set_mpll_reset_time +ffffffff81e00240 T r600_engine_clock_entry_enable +ffffffff81e00340 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81e00440 T r600_engine_clock_entry_enable_post_divider +ffffffff81e00540 T r600_engine_clock_entry_set_post_divider +ffffffff81e00610 T r600_engine_clock_entry_set_reference_divider +ffffffff81e006e0 T r600_engine_clock_entry_set_feedback_divider +ffffffff81e007b0 T r600_engine_clock_entry_set_step_time +ffffffff81e00880 T r600_vid_rt_set_ssu +ffffffff81e008e0 T r600_vid_rt_set_vru +ffffffff81e00940 T r600_vid_rt_set_vrt +ffffffff81e009a0 T r600_voltage_control_enable_pins +ffffffff81e009f0 T r600_voltage_control_program_voltages +ffffffff81e00a80 T r600_voltage_control_deactivate_static_control +ffffffff81e00b10 T r600_power_level_enable +ffffffff81e00b80 T r600_power_level_set_voltage_index +ffffffff81e00bf0 T r600_power_level_set_mem_clock_index +ffffffff81e00c50 T r600_power_level_set_eng_clock_index +ffffffff81e00cc0 T r600_power_level_set_watermark_id +ffffffff81e00d30 T r600_power_level_set_pcie_gen2 +ffffffff81e00d90 T r600_power_level_get_current_index +ffffffff81e00dd0 T r600_power_level_get_target_index +ffffffff81e00e10 T r600_power_level_set_enter_index +ffffffff81e00e70 T r600_wait_for_power_level_unequal +ffffffff81e00f70 T r600_wait_for_power_level +ffffffff81e01070 T r600_start_dpm +ffffffff81e01360 T r600_stop_dpm +ffffffff81e013b0 T r600_dpm_pre_set_power_state +ffffffff81e013e0 T r600_dpm_post_set_power_state +ffffffff81e01410 T r600_is_uvd_state +ffffffff81e01450 T r600_is_internal_thermal_sensor +ffffffff81e01490 T r600_dpm_late_enable +ffffffff81e015a0 T r600_get_platform_caps +ffffffff81e01640 T r600_parse_extended_power_table +ffffffff81e02490 T r600_free_extended_power_table +ffffffff81e025f0 T r600_get_pcie_gen_support +ffffffff81e02640 T r600_get_pcie_lane_support +ffffffff81e026a0 T r600_encode_pci_lane_width +ffffffff81e03000 T r600_audio_update_hdmi +ffffffff81e03180 t r600_audio_status +ffffffff81e032a0 T r600_hdmi_buffer_status_changed +ffffffff81e03350 T r600_hdmi_update_audio_settings +ffffffff81e037c0 T r600_audio_enable +ffffffff81e03840 T r600_audio_get_pin +ffffffff81e03870 T r600_hdmi_update_acr +ffffffff81e03c90 T r600_set_avi_packet +ffffffff81e03ed0 T r600_hdmi_audio_workaround +ffffffff81e03fa0 T r600_hdmi_audio_set_dto +ffffffff81e04060 T r600_set_vbi_packet +ffffffff81e04120 T r600_set_audio_packet +ffffffff81e04460 T r600_set_mute +ffffffff81e04570 T r600_hdmi_enable +ffffffff81e05000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81e05040 T radeon_acpi_pcie_notify_device_ready +ffffffff81e05170 T radeon_acpi_pcie_performance_request +ffffffff81e05570 T radeon_acpi_init +ffffffff81e05de0 t radeon_acpi_event +ffffffff81e06160 T radeon_acpi_fini +ffffffff81e07000 T radeon_agp_head_init +ffffffff81e07050 T radeon_agp_init +ffffffff81e070b0 T radeon_agp_resume +ffffffff81e07150 T radeon_agp_fini +ffffffff81e071a0 T radeon_agp_suspend +ffffffff81e08000 T radeon_agp_disable +ffffffff81e08130 T radeon_asic_init +ffffffff81e08900 t radeon_invalid_rreg +ffffffff81e08940 t radeon_invalid_wreg +ffffffff81e08990 t radeon_invalid_get_allowed_info_register +ffffffff81e09000 T radeon_atombios_i2c_init +ffffffff81e093b0 T radeon_atombios_lookup_gpio +ffffffff81e094c0 T radeon_get_atom_connector_info_from_object_table +ffffffff81e09e70 t radeon_lookup_i2c_gpio +ffffffff81e0a160 t radeon_atom_apply_quirks +ffffffff81e0a590 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81e0aaf0 T radeon_atom_get_clock_info +ffffffff81e0aef0 T radeon_atombios_sideport_present +ffffffff81e0afb0 T radeon_atombios_get_tmds_info +ffffffff81e0b100 T radeon_atombios_get_ppll_ss_info +ffffffff81e0b230 T radeon_atombios_get_asic_ss_info +ffffffff81e0b510 t radeon_atombios_get_igp_ss_overrides +ffffffff81e0b630 T radeon_atombios_get_lvds_info +ffffffff81e0b9d0 T radeon_atombios_get_primary_dac_info +ffffffff81e0baa0 T radeon_atom_get_tv_timings +ffffffff81e0bcf0 T radeon_atombios_get_tv_info +ffffffff81e0bdb0 T radeon_atombios_get_tv_dac_info +ffffffff81e0bed0 T radeon_atombios_get_default_voltages +ffffffff81e0bf90 T radeon_atombios_get_power_modes +ffffffff81e0d0f0 T radeon_atom_get_clock_dividers +ffffffff81e0d410 T radeon_atom_get_memory_pll_dividers +ffffffff81e0d570 T radeon_atom_set_clock_gating +ffffffff81e0d5d0 T radeon_atom_get_engine_clock +ffffffff81e0d620 T radeon_atom_get_memory_clock +ffffffff81e0d670 T radeon_atom_set_engine_clock +ffffffff81e0d6d0 T radeon_atom_set_memory_clock +ffffffff81e0d730 T radeon_atom_set_engine_dram_timings +ffffffff81e0d7b0 T radeon_atom_update_memory_dll +ffffffff81e0d800 T radeon_atom_set_ac_timing +ffffffff81e0d860 T radeon_atom_set_voltage +ffffffff81e0d940 T radeon_atom_get_max_vddc +ffffffff81e0da30 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81e0db20 T radeon_atom_get_leakage_id_from_vbios +ffffffff81e0dbf0 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81e0de10 T radeon_atom_get_voltage_evv +ffffffff81e0ded0 T radeon_atom_get_voltage_gpio_settings +ffffffff81e0dff0 T radeon_atom_is_voltage_gpio +ffffffff81e0e1a0 T radeon_atom_get_svi2_info +ffffffff81e0e290 T radeon_atom_get_max_voltage +ffffffff81e0e420 T radeon_atom_get_min_voltage +ffffffff81e0e580 T radeon_atom_get_voltage_step +ffffffff81e0e6a0 T radeon_atom_round_to_true_voltage +ffffffff81e0e820 T radeon_atom_get_voltage_table +ffffffff81e0eac0 T radeon_atom_get_memory_info +ffffffff81e0ec80 T radeon_atom_get_mclk_range_table +ffffffff81e0eed0 T radeon_atom_init_mc_reg_table +ffffffff81e0f160 T radeon_atom_initialize_bios_scratch_regs +ffffffff81e0f230 T radeon_save_bios_scratch_regs +ffffffff81e0f310 T radeon_restore_bios_scratch_regs +ffffffff81e0f3f0 T radeon_atom_output_lock +ffffffff81e0f480 T radeon_atombios_connected_scratch_regs +ffffffff81e0fce0 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81e0fe30 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81e10060 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81e10240 t radeon_atombios_add_pplib_thermal_controller +ffffffff81e106c0 t radeon_atombios_parse_pplib_clock_info +ffffffff81e10a80 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81e11000 T radeon_audio_init +ffffffff81e11200 t radeon_audio_enable +ffffffff81e11360 T radeon_audio_endpoint_rreg +ffffffff81e113a0 T radeon_audio_endpoint_wreg +ffffffff81e113e0 T radeon_audio_get_pin +ffffffff81e11430 T radeon_audio_detect +ffffffff81e115d0 T radeon_audio_fini +ffffffff81e11660 T radeon_audio_mode_set +ffffffff81e116b0 T radeon_audio_dpms +ffffffff81e11700 T radeon_audio_decode_dfs_div +ffffffff81e11760 T radeon_audio_component_init +ffffffff81e117d0 T radeon_audio_component_fini +ffffffff81e11820 t radeon_audio_hdmi_mode_set +ffffffff81e11f80 t radeon_audio_write_speaker_allocation +ffffffff81e12060 t radeon_audio_write_sad_regs +ffffffff81e12160 t radeon_audio_set_avi_packet +ffffffff81e122c0 t radeon_audio_dp_mode_set +ffffffff81e12470 t radeon_audio_rreg +ffffffff81e124c0 t radeon_audio_wreg +ffffffff81e13000 T radeon_benchmark +ffffffff81e13c80 t radeon_benchmark_move +ffffffff81e13ff0 t radeon_bo_reserve +ffffffff81e14190 t radeon_bo_unreserve +ffffffff81e142a0 t radeon_benchmark_do_move +ffffffff81e15000 T radeon_get_bios +ffffffff81e160b0 t igp_read_bios_from_vram +ffffffff81e16200 t radeon_read_bios +ffffffff81e17000 T radeon_legacy_get_engine_clock +ffffffff81e170f0 T radeon_legacy_get_memory_clock +ffffffff81e171e0 T radeon_get_clock_info +ffffffff81e177f0 T radeon_legacy_set_engine_clock +ffffffff81e17c30 T radeon_legacy_set_clock_gating +ffffffff81e1a000 T radeon_combios_check_hardcoded_edid +ffffffff81e1a120 t combios_get_table_offset +ffffffff81e1a710 T radeon_bios_get_hardcoded_edid +ffffffff81e1a7b0 T radeon_combios_i2c_init +ffffffff81e1aea0 t combios_setup_i2c_bus +ffffffff81e1b190 t radeon_combios_get_i2c_info_from_table +ffffffff81e1b3e0 T radeon_combios_get_clock_info +ffffffff81e1b5d0 T radeon_combios_sideport_present +ffffffff81e1b650 T radeon_combios_get_primary_dac_info +ffffffff81e1b7a0 T radeon_combios_get_tv_info +ffffffff81e1b8b0 T radeon_combios_get_tv_dac_info +ffffffff81e1bb70 T radeon_combios_get_lvds_info +ffffffff81e1c220 T radeon_legacy_get_tmds_info_from_table +ffffffff81e1c2f0 T radeon_legacy_get_tmds_info_from_combios +ffffffff81e1c520 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81e1c760 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81e1cad0 T radeon_get_legacy_connector_info_from_table +ffffffff81e1f060 T radeon_get_legacy_connector_info_from_bios +ffffffff81e1fda0 T radeon_combios_get_power_modes +ffffffff81e204b0 T radeon_external_tmds_setup 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radeon_scratch_free +ffffffff81e2c530 T radeon_doorbell_get +ffffffff81e2c5e0 T radeon_doorbell_free +ffffffff81e2c630 T radeon_wb_disable +ffffffff81e2c660 T radeon_wb_fini +ffffffff81e2c720 t radeon_bo_reserve +ffffffff81e2c8c0 t radeon_bo_unreserve +ffffffff81e2c9d0 T radeon_wb_init +ffffffff81e2cd60 T radeon_vram_location +ffffffff81e2cea0 T radeon_gtt_location +ffffffff81e2cfe0 T radeon_device_is_virtual +ffffffff81e2d010 T radeon_card_posted +ffffffff81e2d250 T radeon_update_bandwidth_info +ffffffff81e2d2d0 T radeon_boot_test_post_card +ffffffff81e2d3c0 T radeon_dummy_page_init +ffffffff81e2d490 T radeon_dummy_page_fini +ffffffff81e2d500 T radeon_atombios_init +ffffffff81e2d6e0 t cail_reg_read +ffffffff81e2d740 t cail_reg_write +ffffffff81e2d7a0 t cail_ioreg_read +ffffffff81e2d7c0 t cail_ioreg_write +ffffffff81e2d7e0 t cail_mc_read +ffffffff81e2d810 t cail_mc_write +ffffffff81e2d840 t cail_pll_read +ffffffff81e2d870 t cail_pll_write +ffffffff81e2d8a0 T radeon_atombios_fini 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radeon_encoder_set_active_device +ffffffff81e38450 T radeon_get_connector_for_encoder +ffffffff81e384c0 T radeon_get_connector_for_encoder_init +ffffffff81e38530 T radeon_get_external_encoder +ffffffff81e385c0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81e38660 T radeon_panel_mode_fixup +ffffffff81e38830 T radeon_dig_monitor_is_duallink +ffffffff81e38960 T radeon_encoder_is_digital +ffffffff81e39000 T radeon_fbdev_setup +ffffffff81e39180 T radeon_fbdev_set_suspend +ffffffff81e391d0 T radeon_fbdev_robj_is_fb +ffffffff81e39250 T radeondrm_burner +ffffffff81e392e0 T radeondrm_burner_cb +ffffffff81e39310 t radeon_fbdev_fb_helper_fb_probe +ffffffff81e39980 t radeon_bo_reserve +ffffffff81e39b20 t radeon_bo_unreserve +ffffffff81e39c30 t radeon_fbdev_client_unregister +ffffffff81e39ca0 t radeon_fbdev_client_restore +ffffffff81e39cf0 t radeon_fbdev_client_hotplug +ffffffff81e3a000 T radeon_fence_emit +ffffffff81e3a140 T radeon_fence_process +ffffffff81e3a220 t radeon_fence_activity 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T radeon_ib_get +ffffffff81e43120 T radeon_ib_free +ffffffff81e43170 T radeon_ib_schedule +ffffffff81e43470 T radeon_ib_pool_init +ffffffff81e43520 T radeon_ib_pool_fini +ffffffff81e435a0 T radeon_ib_ring_tests +ffffffff81e44000 T radeon_driver_irq_handler_kms +ffffffff81e44050 T radeon_msi_ok +ffffffff81e44150 T radeon_irq_kms_init +ffffffff81e44440 t radeon_hotplug_work_func +ffffffff81e44510 t radeon_dp_work_func +ffffffff81e44590 T radeon_irq_kms_fini +ffffffff81e44740 T radeon_irq_kms_sw_irq_get +ffffffff81e447f0 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81e44830 T radeon_irq_kms_sw_irq_put +ffffffff81e448d0 T radeon_irq_kms_pflip_irq_get +ffffffff81e44990 T radeon_irq_kms_pflip_irq_put +ffffffff81e44a40 T radeon_irq_kms_enable_afmt +ffffffff81e44ae0 T radeon_irq_kms_disable_afmt +ffffffff81e44b80 T radeon_irq_kms_enable_hpd +ffffffff81e44c80 T radeon_irq_kms_disable_hpd +ffffffff81e44d70 T radeon_irq_kms_set_irq_n_enabled +ffffffff81e44f00 t __delayed_work_tick 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t radeon_bo_move +ffffffff81e5d100 t radeon_ttm_io_mem_reserve +ffffffff81e5e000 T radeon_ucode_print_mc_hdr +ffffffff81e5e0d0 t radeon_ucode_print_common_hdr +ffffffff81e5e250 T radeon_ucode_print_smc_hdr +ffffffff81e5e2f0 T radeon_ucode_print_gfx_hdr +ffffffff81e5e3e0 T radeon_ucode_print_rlc_hdr +ffffffff81e5e520 T radeon_ucode_print_sdma_hdr +ffffffff81e5e630 T radeon_ucode_validate +ffffffff81e5f000 T radeon_uvd_init +ffffffff81e5f5b0 t radeon_uvd_idle_work_handler +ffffffff81e5f720 t radeon_bo_reserve +ffffffff81e5f960 t radeon_bo_unreserve +ffffffff81e5fa70 T radeon_uvd_fini +ffffffff81e5fb70 T radeon_uvd_suspend +ffffffff81e5fd70 T radeon_uvd_note_usage +ffffffff81e5ffd0 T radeon_uvd_get_destroy_msg +ffffffff81e60100 T radeon_uvd_resume +ffffffff81e601a0 T radeon_uvd_force_into_uvd_segment +ffffffff81e60240 T radeon_uvd_free_handles +ffffffff81e60430 T radeon_uvd_cs_parse +ffffffff81e60be0 T radeon_uvd_get_create_msg +ffffffff81e60d70 t radeon_uvd_send_msg +ffffffff81e60f30 T radeon_uvd_calc_upll_dividers +ffffffff81e61100 T radeon_uvd_send_upll_ctlreq +ffffffff81e61550 t __delayed_work_tick +ffffffff81e62000 T radeon_vce_init +ffffffff81e62720 t radeon_vce_idle_work_handler +ffffffff81e62800 t radeon_bo_reserve +ffffffff81e629a0 t radeon_bo_unreserve +ffffffff81e62ab0 T radeon_vce_fini +ffffffff81e62b40 T radeon_vce_suspend +ffffffff81e62c20 T radeon_vce_resume +ffffffff81e62dc0 T radeon_vce_note_usage +ffffffff81e62f00 T radeon_vce_free_handles +ffffffff81e62fe0 T radeon_vce_get_destroy_msg +ffffffff81e63240 T radeon_vce_get_create_msg +ffffffff81e635c0 T radeon_vce_cs_reloc +ffffffff81e636d0 T radeon_vce_cs_parse +ffffffff81e63e80 T radeon_vce_semaphore_emit +ffffffff81e64070 T radeon_vce_ib_execute +ffffffff81e64220 T radeon_vce_fence_emit +ffffffff81e64480 T radeon_vce_ring_test +ffffffff81e64620 T radeon_vce_ib_test +ffffffff81e64770 t __delayed_work_tick +ffffffff81e65000 T radeon_vm_manager_init +ffffffff81e65070 T radeon_vm_manager_fini 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rs600_gart_get_page_entry +ffffffff81e6b430 T rs600_gart_set_page +ffffffff81e6b470 T rs600_irq_set +ffffffff81e6b650 T rs600_irq_disable +ffffffff81e6b6d0 t rs600_irq_ack +ffffffff81e6b880 T rs600_irq_process +ffffffff81e6bc70 T rs600_get_vblank_counter +ffffffff81e6bcc0 T rs600_mc_wait_for_idle +ffffffff81e6bd70 T rs600_bandwidth_update +ffffffff81e6be80 T rs600_mc_rreg +ffffffff81e6bf10 T rs600_mc_wreg +ffffffff81e6bf80 T rs600_set_safe_registers +ffffffff81e6bfc0 T rs600_resume +ffffffff81e6c150 t rs600_startup +ffffffff81e6cc00 T rs600_suspend +ffffffff81e6cd60 T rs600_fini +ffffffff81e6cf00 t rs600_gart_fini +ffffffff81e6cfa0 T rs600_init +ffffffff81e6e000 T rs690_mc_wait_for_idle +ffffffff81e6e0b0 T rs690_pm_info +ffffffff81e6e330 T rs690_line_buffer_adjust +ffffffff81e6e450 T rs690_bandwidth_update +ffffffff81e6e7e0 t rs690_crtc_bandwidth_compute +ffffffff81e6ebd0 t rs690_compute_mode_priority +ffffffff81e6f050 T rs690_mc_rreg +ffffffff81e6f0f0 T rs690_mc_wreg +ffffffff81e6f180 T rs690_resume +ffffffff81e6f2b0 t rs690_startup +ffffffff81e6f630 T rs690_suspend +ffffffff81e6f6d0 T rs690_fini +ffffffff81e6f7e0 T rs690_init +ffffffff81e70000 T rs780_dpm_enable +ffffffff81e70f50 T rs780_dpm_disable +ffffffff81e71040 T rs780_dpm_set_power_state +ffffffff81e71490 t rs780_force_voltage +ffffffff81e715e0 t rs780_enable_voltage_scaling +ffffffff81e717b0 T rs780_dpm_setup_asic +ffffffff81e717e0 T rs780_dpm_display_configuration_changed +ffffffff81e71940 T rs780_dpm_init +ffffffff81e71ef0 T rs780_dpm_print_power_state +ffffffff81e71fb0 T rs780_dpm_fini +ffffffff81e72050 T rs780_dpm_get_sclk +ffffffff81e72090 T rs780_dpm_get_mclk +ffffffff81e720c0 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81e720f0 T rs780_dpm_get_current_sclk +ffffffff81e72180 T rs780_dpm_get_current_mclk +ffffffff81e721b0 T rs780_dpm_force_performance_level +ffffffff81e723d0 t rs780_force_fbdiv +ffffffff81e73000 T rv515_ring_start +ffffffff81e73c50 T rv515_mc_wait_for_idle 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rv730_populate_smc_acpi_state +ffffffff81e7f7d0 T rv730_populate_smc_initial_state +ffffffff81e7f9d0 T rv730_program_memory_timing_parameters +ffffffff81e7fbf0 T rv730_start_dpm +ffffffff81e7fc80 T rv730_stop_dpm +ffffffff81e7fd50 T rv730_program_dcodt +ffffffff81e7fe20 T rv730_get_odt_values +ffffffff81e80000 T rv740_get_decoded_reference_divider +ffffffff81e800b0 T rv740_get_dll_speed +ffffffff81e802c0 T rv740_populate_sclk_value +ffffffff81e804e0 T rv740_populate_mclk_value +ffffffff81e808c0 T rv740_read_clock_registers +ffffffff81e80a00 T rv740_populate_smc_acpi_state +ffffffff81e80c70 T rv740_enable_mclk_spread_spectrum +ffffffff81e80cc0 T rv740_get_mclk_frequency_ratio +ffffffff81e81000 T rv770_set_uvd_clocks +ffffffff81e816a0 T rv770_get_xclk +ffffffff81e81700 T rv770_page_flip +ffffffff81e81a60 T rv770_page_flip_pending +ffffffff81e81ae0 T rv770_get_temp +ffffffff81e81b40 T rv770_pm_misc +ffffffff81e81c30 T r700_cp_stop +ffffffff81e81cb0 T r700_cp_fini +ffffffff81e81d40 T rv770_set_clk_bypass_mode +ffffffff81e81e60 T r700_vram_gtt_location +ffffffff81e82010 T rv770_resume +ffffffff81e820d0 t rv770_init_golden_registers +ffffffff81e822d0 t rv770_startup +ffffffff81e840d0 T rv770_suspend +ffffffff81e84330 T rv770_init +ffffffff81e84860 t rv770_pcie_gart_fini +ffffffff81e849f0 T rv770_fini +ffffffff81e84d40 t rv770_uvd_start +ffffffff81e84e20 t rv770_cp_load_microcode +ffffffff81e85170 t rv770_uvd_resume +ffffffff81e86000 T rv770_copy_dma +ffffffff81e87000 T rv770_get_ps +ffffffff81e87030 T rv770_get_pi +ffffffff81e87060 T evergreen_get_pi +ffffffff81e87090 T rv770_restore_cgcg +ffffffff81e87110 T rv770_stop_dpm +ffffffff81e871e0 T rv770_dpm_enabled +ffffffff81e87220 T rv770_enable_thermal_protection +ffffffff81e87280 T rv770_enable_acpi_pm +ffffffff81e872d0 T rv770_get_seq_value +ffffffff81e87310 T rv770_write_smc_soft_register +ffffffff81e87340 T rv770_populate_smc_t +ffffffff81e874e0 T rv770_populate_smc_sp +ffffffff81e87540 T rv770_map_clkf_to_ibias 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rv770_restrict_performance_levels_before_switch +ffffffff81e87eb0 T rv770_dpm_force_performance_level +ffffffff81e87f90 T r7xx_start_smc +ffffffff81e87fc0 T r7xx_stop_smc +ffffffff81e87ff0 T rv770_read_voltage_smio_registers +ffffffff81e88030 T rv770_reset_smio_status +ffffffff81e880f0 T rv770_get_memory_type +ffffffff81e88140 T rv770_get_pcie_gen2_status +ffffffff81e881c0 T rv770_get_max_vddc +ffffffff81e88230 T rv770_program_response_times +ffffffff81e883b0 T rv770_enable_auto_throttle_source +ffffffff81e88530 T rv770_dpm_enable +ffffffff81e896e0 T rv770_dpm_late_enable +ffffffff81e89830 T rv770_dpm_disable +ffffffff81e89bd0 T rv770_dpm_set_power_state +ffffffff81e8a340 t rv770_program_dcodt_after_state_switch +ffffffff81e8a3c0 T rv770_dpm_setup_asic +ffffffff81e8a790 T rv770_dpm_display_configuration_changed +ffffffff81e8a810 T rv7xx_parse_power_table +ffffffff81e8adc0 T rv770_get_engine_memory_ss +ffffffff81e8ae60 T rv770_dpm_init +ffffffff81e8b0f0 T rv770_dpm_print_power_state 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si_suspend +ffffffff81e95dc0 t si_fini_cg +ffffffff81e95e80 T si_init +ffffffff81e975b0 t si_cp_fini +ffffffff81e976e0 t si_irq_fini +ffffffff81e977d0 t si_pcie_gart_fini +ffffffff81e978e0 T si_fini +ffffffff81e97bc0 T si_get_gpu_clock_counter +ffffffff81e97c90 T si_set_uvd_clocks +ffffffff81e98320 T si_set_vce_clocks +ffffffff81e98ac0 t si_vce_send_vcepll_ctlreq +ffffffff81e98e00 t dce6_latency_watermark +ffffffff81e99040 t si_rlc_stop +ffffffff81e99220 t si_vm_reg_valid +ffffffff81e99390 t si_vm_packet3_cp_dma_check +ffffffff81e99530 t si_uvd_start +ffffffff81e99610 t si_vce_start +ffffffff81e99760 t si_irq_init +ffffffff81e9a290 t si_cp_load_microcode +ffffffff81e9a690 t si_cp_resume +ffffffff81e9b6c0 t si_uvd_resume +ffffffff81e9b7a0 t si_vce_resume +ffffffff81e9b8b0 t pcie_capability_set_word +ffffffff81e9b9e0 t pcie_capability_read_word +ffffffff81e9ba90 t pcie_capability_clear_and_set_word +ffffffff81e9bbd0 t pcie_capability_write_word +ffffffff81e9bca0 t si_update_cg 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si_stop_smc_clock +ffffffff81eab360 T si_start_smc_clock +ffffffff81eab3a0 T si_is_smc_running +ffffffff81eab410 T si_send_msg_to_smc +ffffffff81eab500 T si_wait_for_smc_inactive +ffffffff81eab5c0 T si_load_smc_ucode +ffffffff81eab780 T si_read_smc_sram_dword +ffffffff81eab870 T si_write_smc_sram_dword +ffffffff81eac000 T sumo_get_pi +ffffffff81eac030 T sumo_gfx_clockgating_initialize +ffffffff81eac130 T sumo_program_vc +ffffffff81eac170 T sumo_clear_vc +ffffffff81eac1b0 T sumo_program_sstp +ffffffff81eac240 T sumo_take_smu_control +ffffffff81eac270 T sumo_get_sleep_divider_from_id +ffffffff81eac2a0 T sumo_get_sleep_divider_id_from_clock +ffffffff81eac350 T sumo_dpm_enable +ffffffff81eaca40 T sumo_dpm_late_enable +ffffffff81ead110 T sumo_dpm_disable +ffffffff81ead480 T sumo_dpm_pre_set_power_state +ffffffff81ead970 T sumo_dpm_set_power_state +ffffffff81eae4d0 T sumo_dpm_post_set_power_state +ffffffff81eae570 T sumo_dpm_setup_asic +ffffffff81eae690 T sumo_dpm_display_configuration_changed +ffffffff81eae6c0 T sumo_convert_vid2_to_vid7 +ffffffff81eae710 T sumo_construct_sclk_voltage_mapping_table +ffffffff81eae7d0 T sumo_construct_vid_mapping_table +ffffffff81eae960 T sumo_dpm_init +ffffffff81eaf260 T sumo_dpm_print_power_state +ffffffff81eaf390 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81eaf3c0 T sumo_dpm_get_current_sclk +ffffffff81eaf430 T sumo_dpm_get_current_mclk +ffffffff81eaf460 T sumo_dpm_get_current_vddc +ffffffff81eaf530 T sumo_dpm_fini +ffffffff81eaf5d0 T sumo_dpm_get_sclk +ffffffff81eaf620 T sumo_dpm_get_mclk +ffffffff81eaf650 T sumo_dpm_force_performance_level +ffffffff81eafad0 t sumo_power_level_enable +ffffffff81eafd20 t sumo_program_power_level +ffffffff81eb1000 T sumo_initialize_m3_arb +ffffffff81eb13c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81eb1470 t sumo_send_msg_to_smu +ffffffff81eb1640 T sumo_smu_pg_init +ffffffff81eb1660 T sumo_enable_boost_timer +ffffffff81eb17e0 T sumo_set_tdp_limit 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aldebaran_mode2_reset +ffffffff81ec0000 T aldebaran_reg_base_init +ffffffff81ec1000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81ec1040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81ec1070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81ec1190 T amdgpu_acpi_pcie_performance_request +ffffffff81ec1580 T amdgpu_acpi_power_shift_control +ffffffff81ec16f0 T amdgpu_acpi_smart_shift_update +ffffffff81ec17a0 T amdgpu_acpi_get_tmr_info +ffffffff81ec1830 T amdgpu_acpi_get_mem_info +ffffffff81ec18f0 T amdgpu_acpi_init +ffffffff81ec19b0 t amdgpu_acpi_event +ffffffff81ec1d30 T amdgpu_acpi_get_backlight_caps +ffffffff81ec1d80 T amdgpu_acpi_fini +ffffffff81ec1da0 T amdgpu_acpi_should_gpu_reset +ffffffff81ec1df0 T amdgpu_acpi_detect +ffffffff81ec28b0 T amdgpu_acpi_release +ffffffff81ec3000 T amdgpu_afmt_acr +ffffffff81ec4000 T amdgpu_amdkfd_init +ffffffff81ec4040 T amdgpu_amdkfd_fini +ffffffff81ec4070 T amdgpu_amdkfd_device_probe +ffffffff81ec40a0 T amdgpu_amdkfd_device_init +ffffffff81ec4260 t amdgpu_amdkfd_reset_work +ffffffff81ec42f0 T amdgpu_amdkfd_device_fini_sw +ffffffff81ec4340 T amdgpu_amdkfd_interrupt +ffffffff81ec4370 T amdgpu_amdkfd_suspend +ffffffff81ec43a0 T amdgpu_amdkfd_resume +ffffffff81ec43d0 T amdgpu_amdkfd_pre_reset +ffffffff81ec4400 T amdgpu_amdkfd_post_reset +ffffffff81ec4430 T amdgpu_amdkfd_gpu_reset +ffffffff81ec44a0 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81ec47c0 t amdgpu_bo_reserve +ffffffff81ec4950 t amdgpu_bo_unreserve +ffffffff81ec4a60 T amdgpu_amdkfd_free_gtt_mem +ffffffff81ec4b00 T amdgpu_amdkfd_alloc_gws +ffffffff81ec4c00 T amdgpu_amdkfd_free_gws +ffffffff81ec4c50 T amdgpu_amdkfd_get_fw_version +ffffffff81ec4d00 T amdgpu_amdkfd_get_local_mem_info +ffffffff81ec4eb0 T amdgpu_amdkfd_xcp_memory_size +ffffffff81ec4f50 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81ec4f90 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81ec5000 T amdgpu_amdkfd_get_cu_info +ffffffff81ec5120 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81ec5270 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81ec52f0 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81ec5390 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81ec5510 T amdgpu_amdkfd_submit_ib +ffffffff81ec56b0 T amdgpu_amdkfd_set_compute_idle +ffffffff81ec5700 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81ec5740 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81ec5880 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81ec58c0 T amdgpu_amdkfd_have_atomics_support +ffffffff81ec58f0 T amdgpu_amdkfd_debug_mem_fence +ffffffff81ec5910 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81ec5920 T amdgpu_amdkfd_send_close_event_drain_irq +ffffffff81ec5940 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81ec5990 T amdgpu_amdkfd_check_and_lock_kfd +ffffffff81ec59c0 T amdgpu_amdkfd_unlock_kfd +ffffffff81ec59f0 T amdgpu_amdkfd_unmap_hiq +ffffffff81ec6000 T amdgpu_atom_execute_table +ffffffff81ec60c0 t amdgpu_atom_execute_table_locked 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amdgpu_atombios_crtc_scaler_setup +ffffffff81ecf1e0 T amdgpu_atombios_crtc_lock +ffffffff81ecf250 T amdgpu_atombios_crtc_enable +ffffffff81ecf2c0 T amdgpu_atombios_crtc_blank +ffffffff81ecf330 T amdgpu_atombios_crtc_powergate +ffffffff81ecf3b0 T amdgpu_atombios_crtc_powergate_init +ffffffff81ecf420 T amdgpu_atombios_crtc_set_dtd_timing +ffffffff81ecf560 T amdgpu_atombios_crtc_set_disp_eng_pll +ffffffff81ecf670 T amdgpu_atombios_crtc_set_dce_clock +ffffffff81ecf770 T amdgpu_atombios_crtc_program_pll +ffffffff81ecfaa0 T amdgpu_atombios_crtc_prepare_pll +ffffffff81ed0030 T amdgpu_atombios_crtc_set_pll +ffffffff81ed1000 T amdgpu_atombios_dp_aux_init +ffffffff81ed1090 t amdgpu_atombios_dp_aux_transfer +ffffffff81ed1230 T amdgpu_atombios_dp_get_sinktype +ffffffff81ed12a0 T amdgpu_atombios_dp_get_dpcd +ffffffff81ed1480 T amdgpu_atombios_dp_get_panel_mode +ffffffff81ed1590 T amdgpu_atombios_dp_set_link_config +ffffffff81ed1620 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81ed17d0 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81ed1860 T amdgpu_atombios_dp_needs_link_train +ffffffff81ed18e0 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81ed1960 T amdgpu_atombios_dp_link_train +ffffffff81ed2020 t amdgpu_atombios_dp_process_aux_ch +ffffffff81ed21b0 t amdgpu_atombios_dp_get_adjust_train +ffffffff81ed3000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81ed3050 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81ed30b0 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81ed3110 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81ed3240 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81ed3d00 T amdgpu_atombios_encoder_init_backlight +ffffffff81ed3ee0 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81ed3f40 T amdgpu_atombios_encoder_fini_backlight +ffffffff81ed3fe0 T amdgpu_atombios_encoder_is_digital +ffffffff81ed4030 T amdgpu_atombios_encoder_mode_fixup +ffffffff81ed4130 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81ed42f0 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81ed4840 t amdgpu_atombios_encoder_get_bpc +ffffffff81ed4890 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81ed49c0 T amdgpu_atombios_encoder_dpms +ffffffff81ed4b40 t amdgpu_atombios_encoder_setup_dig +ffffffff81ed4ff0 t amdgpu_atombios_encoder_setup_dvo +ffffffff81ed51c0 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81ed55e0 T amdgpu_atombios_encoder_init_dig +ffffffff81ed56c0 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81ed5970 T amdgpu_atombios_encoder_dac_detect +ffffffff81ed5b60 T amdgpu_atombios_encoder_dig_detect +ffffffff81ed5c90 T amdgpu_atombios_encoder_setup_ext_encoder_ddc +ffffffff81ed5cf0 T amdgpu_atombios_encoder_set_bios_scratch_regs +ffffffff81ed6330 T amdgpu_atombios_encoder_get_lcd_info +ffffffff81ed66c0 T amdgpu_atombios_encoder_get_dig_info +ffffffff81ed6730 t amdgpu_atombios_encoder_update_backlight_status +ffffffff81ed7000 T amdgpu_atombios_i2c_xfer +ffffffff81ed7400 T amdgpu_atombios_i2c_func +ffffffff81ed7430 T amdgpu_atombios_i2c_channel_trans +ffffffff81ed8000 T amdgpu_atomfirmware_query_firmware_capability +ffffffff81ed80a0 T amdgpu_atomfirmware_gpu_virtualization_supported +ffffffff81ed80e0 T amdgpu_atomfirmware_scratch_regs_init +ffffffff81ed8160 T amdgpu_atomfirmware_allocate_fb_scratch +ffffffff81ed8390 T amdgpu_atomfirmware_get_vram_info +ffffffff81ed88e0 t convert_atom_mem_type_to_vram_type +ffffffff81ed8960 T amdgpu_atomfirmware_mem_ecc_supported +ffffffff81ed8a30 T amdgpu_atomfirmware_sram_ecc_supported +ffffffff81ed8a70 T amdgpu_atomfirmware_dynamic_boot_config_supported +ffffffff81ed8ab0 T amdgpu_atomfirmware_ras_rom_addr +ffffffff81ed8b60 T amdgpu_atomfirmware_get_clock_info +ffffffff81ed8dd0 T amdgpu_atomfirmware_get_gfx_info +ffffffff81ed8f60 T amdgpu_atomfirmware_mem_training_supported +ffffffff81ed8fa0 T amdgpu_atomfirmware_get_fw_reserved_fb_size +ffffffff81ed9030 T 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dce_v10_0_encoder_commit +ffffffff81f7a880 t dce_v10_0_encoder_mode_set +ffffffff81f7bb40 t dce_v10_0_encoder_disable +ffffffff81f7bc70 t dce_v10_0_ext_dpms +ffffffff81f7bca0 t dce_v10_0_ext_prepare +ffffffff81f7bcd0 t dce_v10_0_ext_commit +ffffffff81f7bd00 t dce_v10_0_ext_mode_set +ffffffff81f7bd30 t dce_v10_0_ext_disable +ffffffff81f7bd60 t dce_v10_0_set_crtc_irq_state +ffffffff81f7be60 t dce_v10_0_crtc_irq +ffffffff81f7c100 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81f7c1e0 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81f7c2c0 t dce_v10_0_set_pageflip_irq_state +ffffffff81f7c380 t dce_v10_0_pageflip_irq +ffffffff81f7c530 t dce_v10_0_set_hpd_irq_state +ffffffff81f7c620 t dce_v10_0_hpd_irq +ffffffff81f7c770 t dce_v10_0_afmt_init +ffffffff81f7c8a0 t dce_v10_0_audio_init +ffffffff81f7c970 t INIT_DELAYED_WORK +ffffffff81f7c9c0 t dce_v10_0_crtc_cursor_set2 +ffffffff81f7cd20 t dce_v10_0_crtc_cursor_move +ffffffff81f7ce20 t dce_v10_0_crtc_gamma_set +ffffffff81f7ce70 t dce_v10_0_crtc_destroy +ffffffff81f7ceb0 t amdgpu_bo_reserve +ffffffff81f7d0f0 t amdgpu_bo_unreserve +ffffffff81f7d200 t dce_v10_0_lock_cursor +ffffffff81f7d270 t dce_v10_0_cursor_move_locked +ffffffff81f7d3e0 t dce_v10_0_show_cursor +ffffffff81f7d490 t dce_v10_0_crtc_load_lut +ffffffff81f7d930 t dce_v10_0_crtc_dpms +ffffffff81f7dba0 t dce_v10_0_crtc_prepare +ffffffff81f7dbf0 t dce_v10_0_crtc_commit +ffffffff81f7dc30 t dce_v10_0_crtc_mode_fixup +ffffffff81f7de50 t dce_v10_0_crtc_mode_set +ffffffff81f7e0b0 t dce_v10_0_crtc_set_base +ffffffff81f7e0d0 t dce_v10_0_crtc_set_base_atomic +ffffffff81f7e0f0 t dce_v10_0_crtc_disable +ffffffff81f7e2c0 t dce_v10_0_crtc_do_set_base +ffffffff81f7eaf0 t __delayed_work_tick +ffffffff81f7eb10 t dce_v10_0_is_display_hung +ffffffff81f7f000 T dce_v11_0_disable_dce +ffffffff81f7f1c0 t dce_v11_0_early_init +ffffffff81f7f2f0 t dce_v11_0_sw_init +ffffffff81f7f6c0 t dce_v11_0_sw_fini +ffffffff81f7f820 t dce_v11_0_hw_init +ffffffff81f7fcd0 t dce_v11_0_hw_fini +ffffffff81f7fec0 t dce_v11_0_suspend +ffffffff81f7ff40 t dce_v11_0_resume +ffffffff81f7ffd0 t dce_v11_0_is_idle +ffffffff81f80000 t dce_v11_0_wait_for_idle +ffffffff81f80030 t dce_v11_0_soft_reset +ffffffff81f80290 t dce_v11_0_set_clockgating_state +ffffffff81f802c0 t dce_v11_0_set_powergating_state +ffffffff81f802f0 t dce_v11_0_audio_endpt_rreg +ffffffff81f803b0 t dce_v11_0_audio_endpt_wreg +ffffffff81f80440 t dce_v11_0_bandwidth_update +ffffffff81f80f90 t dce_v11_0_vblank_get_counter +ffffffff81f80fe0 t dce_v11_0_hpd_sense +ffffffff81f81040 t dce_v11_0_hpd_set_polarity +ffffffff81f81120 t dce_v11_0_hpd_get_gpio_reg +ffffffff81f81150 t dce_v11_0_page_flip +ffffffff81f81280 t dce_v11_0_crtc_get_scanoutpos +ffffffff81f81330 t dce_v11_0_encoder_add +ffffffff81f815c0 t dce_v11_0_latency_watermark +ffffffff81f817f0 t dce_v11_0_encoder_destroy +ffffffff81f81860 t dce_v11_0_encoder_prepare +ffffffff81f81aa0 t dce_v11_0_encoder_commit +ffffffff81f81ae0 t dce_v11_0_encoder_mode_set +ffffffff81f82da0 t dce_v11_0_encoder_disable +ffffffff81f82ed0 t dce_v11_0_ext_dpms +ffffffff81f82f00 t dce_v11_0_ext_prepare +ffffffff81f82f30 t dce_v11_0_ext_commit +ffffffff81f82f60 t dce_v11_0_ext_mode_set +ffffffff81f82f90 t dce_v11_0_ext_disable +ffffffff81f82fc0 t dce_v11_0_set_crtc_irq_state +ffffffff81f830c0 t dce_v11_0_crtc_irq +ffffffff81f83340 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81f83420 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81f83500 t dce_v11_0_set_pageflip_irq_state +ffffffff81f835c0 t dce_v11_0_pageflip_irq +ffffffff81f83770 t dce_v11_0_set_hpd_irq_state +ffffffff81f83860 t dce_v11_0_hpd_irq +ffffffff81f839b0 t dce_v11_0_afmt_init +ffffffff81f83ae0 t dce_v11_0_audio_init +ffffffff81f83bf0 t INIT_DELAYED_WORK +ffffffff81f83c40 t dce_v11_0_crtc_cursor_set2 +ffffffff81f83fa0 t dce_v11_0_crtc_cursor_move +ffffffff81f840a0 t dce_v11_0_crtc_gamma_set +ffffffff81f840f0 t dce_v11_0_crtc_destroy +ffffffff81f84130 t amdgpu_bo_reserve +ffffffff81f84370 t amdgpu_bo_unreserve +ffffffff81f84480 t dce_v11_0_lock_cursor +ffffffff81f844f0 t dce_v11_0_cursor_move_locked +ffffffff81f84660 t dce_v11_0_show_cursor +ffffffff81f84710 t dce_v11_0_crtc_load_lut +ffffffff81f84b60 t dce_v11_0_crtc_dpms +ffffffff81f84dd0 t dce_v11_0_crtc_prepare +ffffffff81f84e20 t dce_v11_0_crtc_commit +ffffffff81f84e60 t dce_v11_0_crtc_mode_fixup +ffffffff81f85150 t dce_v11_0_crtc_mode_set +ffffffff81f85430 t dce_v11_0_crtc_set_base +ffffffff81f85450 t dce_v11_0_crtc_set_base_atomic +ffffffff81f85470 t dce_v11_0_crtc_disable +ffffffff81f85650 t dce_v11_0_crtc_do_set_base +ffffffff81f85e80 t __delayed_work_tick +ffffffff81f86000 t df_v1_7_sw_init +ffffffff81f86040 t df_v1_7_sw_fini +ffffffff81f86070 t df_v1_7_enable_broadcast_mode +ffffffff81f861a0 t df_v1_7_get_fb_channel_number +ffffffff81f86240 t df_v1_7_get_hbm_channel_number +ffffffff81f862a0 t df_v1_7_update_medium_grain_clock_gating +ffffffff81f86450 t df_v1_7_get_clockgating_state +ffffffff81f864f0 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81f87000 t df_v3_6_sw_init +ffffffff81f87160 t df_v3_6_sw_fini +ffffffff81f87190 t df_v3_6_enable_broadcast_mode +ffffffff81f872c0 t df_v3_6_get_fb_channel_number +ffffffff81f873c0 t df_v3_6_get_hbm_channel_number +ffffffff81f87420 t df_v3_6_update_medium_grain_clock_gating +ffffffff81f875f0 t df_v3_6_get_clockgating_state +ffffffff81f87690 t df_v3_6_pmc_start +ffffffff81f87a20 t df_v3_6_pmc_stop +ffffffff81f87d60 t df_v3_6_pmc_get_count +ffffffff81f87f40 t df_v3_6_get_fica +ffffffff81f88090 t df_v3_6_set_fica +ffffffff81f881c0 t df_v3_6_query_ras_poison_mode +ffffffff81f89000 t df_v4_3_query_ras_poison_mode +ffffffff81f8a000 T dimgrey_cavefish_reg_base_init +ffffffff81f8b000 T emu_soc_asic_init +ffffffff81f8c000 t gfx_v10_0_early_init +ffffffff81f8c920 t gfx_v10_0_late_init +ffffffff81f8c990 t gfx_v10_0_sw_init +ffffffff81f8cf50 t gfx_v10_0_sw_fini +ffffffff81f8d210 t gfx_v10_0_hw_init +ffffffff81f903f0 t gfx_v10_0_hw_fini +ffffffff81f90500 t gfx_v10_0_suspend +ffffffff81f90540 t gfx_v10_0_resume +ffffffff81f90550 t gfx_v10_0_is_idle +ffffffff81f905f0 t gfx_v10_0_wait_for_idle +ffffffff81f90700 t gfx_v10_0_soft_reset +ffffffff81f90ae0 t gfx_v10_0_set_clockgating_state +ffffffff81f90e60 t gfx_v10_0_set_powergating_state +ffffffff81f90f30 t gfx_v10_0_get_clockgating_state +ffffffff81f91080 t gfx_v10_0_get_gpu_clock_counter +ffffffff81f91600 t gfx_v10_0_select_se_sh +ffffffff81f916a0 t gfx_v10_0_read_wave_data +ffffffff81f91990 t gfx_v10_0_read_wave_vgprs +ffffffff81f919c0 t gfx_v10_0_read_wave_sgprs +ffffffff81f91a40 t gfx_v10_0_select_me_pipe_q +ffffffff81f91a60 t gfx_v10_0_init_spm_golden_registers +ffffffff81f91ad0 t gfx_v10_0_update_perfmon_mgcg +ffffffff81f91c00 t wave_read_ind +ffffffff81f91d00 t wave_read_regs +ffffffff81f91e80 t gfx10_kiq_set_resources +ffffffff81f921e0 t gfx10_kiq_map_queues +ffffffff81f925c0 t gfx10_kiq_unmap_queues +ffffffff81f92a00 t gfx10_kiq_query_status +ffffffff81f92d20 t gfx10_kiq_invalidate_tlbs +ffffffff81f92e50 t gfx_v10_0_ring_get_rptr_compute +ffffffff81f92e80 t gfx_v10_0_ring_get_wptr_compute +ffffffff81f92ef0 t gfx_v10_0_ring_set_wptr_compute +ffffffff81f93050 t gfx_v10_0_ring_emit_ib_compute +ffffffff81f933d0 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81f93850 t gfx_v10_0_ring_test_ring +ffffffff81f93b00 t gfx_v10_0_ring_test_ib +ffffffff81f93de0 t gfx_v10_0_ring_emit_rreg +ffffffff81f940a0 t gfx_v10_0_ring_emit_wreg +ffffffff81f94300 t gfx_v10_0_ring_emit_reg_wait +ffffffff81f94360 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81f94400 t gfx_v10_0_wait_reg_mem +ffffffff81f94760 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81f94790 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81f948b0 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81f94af0 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81f951e0 t gfx_v10_0_ring_emit_fence +ffffffff81f955f0 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81f95660 t gfx_v10_0_ring_emit_vm_flush +ffffffff81f95850 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81f95940 t gfx_v10_0_ring_emit_gds_switch +ffffffff81f95a40 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81f95c90 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81f95d50 t gfx_v10_0_ring_emit_sb +ffffffff81f95e40 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81f96370 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81f96480 t gfx_v10_0_ring_soft_recovery +ffffffff81f964f0 t gfx_v10_0_ring_preempt_ib +ffffffff81f966a0 t gfx_v10_0_emit_mem_sync +ffffffff81f96a10 t gfx_v10_0_write_data_to_reg +ffffffff81f96c40 t gfx_v10_0_set_eop_interrupt_state +ffffffff81f96d40 t gfx_v10_0_eop_irq +ffffffff81f96f20 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81f970e0 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81f972c0 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81f97630 t gfx_v10_0_kiq_irq +ffffffff81f976c0 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81f97810 t gfx_v10_0_priv_reg_irq +ffffffff81f97880 t gfx_v10_0_handle_priv_fault +ffffffff81f979f0 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81f97b40 t gfx_v10_0_priv_inst_irq +ffffffff81f97bb0 t gfx_v10_0_is_rlc_enabled +ffffffff81f97c50 t gfx_v10_0_set_safe_mode +ffffffff81f97f50 t gfx_v10_0_unset_safe_mode +ffffffff81f98000 t gfx_v10_0_rlc_init +ffffffff81f98020 t gfx_v10_0_get_csb_size +ffffffff81f98050 t gfx_v10_0_get_csb_buffer +ffffffff81f981c0 t gfx_v10_0_rlc_resume +ffffffff81f98d80 t gfx_v10_0_rlc_stop +ffffffff81f98e60 t gfx_v10_0_rlc_reset +ffffffff81f99050 t gfx_v10_0_rlc_start +ffffffff81f99240 t gfx_v10_0_update_spm_vmid +ffffffff81f99290 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81f99cd0 t gfx_v10_0_init_csb +ffffffff81f99ff0 t gfx_v10_0_update_spm_vmid_internal +ffffffff81f9a120 t gfx_v10_0_rlc_backdoor_autoload_config_mec_cache +ffffffff81f9a440 t gfx_v10_0_is_rlcg_access_range +ffffffff81f9a470 t gfx_v10_0_gfx_mqd_init +ffffffff81f9a8b0 t gfx_v10_0_compute_mqd_init +ffffffff81f9adc0 t gfx_v10_0_mec_init +ffffffff81f9b050 t gfx_v10_0_compute_ring_init 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gfx_v11_0_update_perf_clk +ffffffff81faba30 t gfx_v11_0_get_gfx_shadow_info +ffffffff81fabaa0 t wave_read_ind +ffffffff81fabba0 t wave_read_regs +ffffffff81fabd20 t gfx11_kiq_set_resources +ffffffff81fac080 t gfx11_kiq_map_queues +ffffffff81fac460 t gfx11_kiq_unmap_queues +ffffffff81fac8a0 t gfx11_kiq_query_status +ffffffff81facbc0 t gfx11_kiq_invalidate_tlbs +ffffffff81faccf0 t gfx_v11_0_ring_get_rptr_compute +ffffffff81facd20 t gfx_v11_0_ring_get_wptr_compute +ffffffff81facd90 t gfx_v11_0_ring_set_wptr_compute +ffffffff81facef0 t gfx_v11_0_ring_emit_ib_compute +ffffffff81fad270 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81fad6f0 t gfx_v11_0_ring_test_ring +ffffffff81fad9c0 t gfx_v11_0_ring_test_ib +ffffffff81fadcc0 t gfx_v11_0_ring_emit_rreg +ffffffff81fadf80 t gfx_v11_0_ring_emit_wreg +ffffffff81fae1e0 t gfx_v11_0_ring_emit_reg_wait +ffffffff81fae240 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81fae2b0 t gfx_v11_0_wait_reg_mem +ffffffff81fae610 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81fae640 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81fae760 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81fae9a0 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81faf0a0 t gfx_v11_0_ring_emit_fence +ffffffff81faf4b0 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81faf520 t gfx_v11_0_ring_emit_vm_flush +ffffffff81faf710 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81faf800 t gfx_v11_0_ring_emit_gds_switch +ffffffff81faf900 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81fafb50 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81fafc10 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81fafd90 t gfx_v11_0_ring_emit_gfx_shadow +ffffffff81fb01a0 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81fb02b0 t gfx_v11_0_ring_soft_recovery +ffffffff81fb0320 t gfx_v11_0_ring_preempt_ib +ffffffff81fb04d0 t gfx_v11_0_emit_mem_sync +ffffffff81fb0840 t gfx_v11_0_write_data_to_reg +ffffffff81fb0a70 t gfx_v11_0_set_eop_interrupt_state +ffffffff81fb0b10 t gfx_v11_0_eop_irq +ffffffff81fb0cf0 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81fb0eb0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81fb1060 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81fb11b0 t gfx_v11_0_priv_reg_irq +ffffffff81fb1220 t gfx_v11_0_handle_priv_fault +ffffffff81fb1390 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81fb14e0 t gfx_v11_0_priv_inst_irq +ffffffff81fb1550 t gfx_v11_0_rlc_gc_fed_irq +ffffffff81fb15a0 t gfx_v11_0_is_rlc_enabled +ffffffff81fb1640 t gfx_v11_0_set_safe_mode +ffffffff81fb17c0 t gfx_v11_0_unset_safe_mode +ffffffff81fb1830 t gfx_v11_0_rlc_init +ffffffff81fb18b0 t gfx_v11_0_get_csb_size +ffffffff81fb18e0 t gfx_v11_0_get_csb_buffer +ffffffff81fb1a50 t gfx_v11_0_rlc_resume +ffffffff81fb2900 t gfx_v11_0_rlc_stop +ffffffff81fb29e0 t gfx_v11_0_rlc_reset +ffffffff81fb2bd0 t gfx_v11_0_rlc_start +ffffffff81fb2dc0 t gfx_v11_0_update_spm_vmid +ffffffff81fb2ee0 t gfx_v11_0_init_csb +ffffffff81fb30a0 t gfx_v11_0_gfx_mqd_init +ffffffff81fb34d0 t gfx_v11_0_compute_mqd_init +ffffffff81fb3a70 t gfx_v11_0_mec_init +ffffffff81fb3c00 t gfx_v11_0_compute_ring_init +ffffffff81fb3d60 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff81fb3f60 t gfx_v11_0_gpu_early_init +ffffffff81fb4030 t amdgpu_bo_unreserve +ffffffff81fb4140 t gfx_v11_0_disable_gpa_mode +ffffffff81fb4300 t gfx_v11_0_cp_resume +ffffffff81fb8a60 t gfx_v11_0_config_me_cache +ffffffff81fb8e80 t gfx_v11_0_config_pfp_cache +ffffffff81fb92a0 t gfx_v11_0_config_mec_cache +ffffffff81fb96c0 t gfx_v11_0_get_sa_active_bitmap +ffffffff81fb97f0 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81fb9900 t gfx_v11_0_cp_compute_enable +ffffffff81fb9b00 t gfx_v11_0_cp_gfx_enable +ffffffff81fb9d30 t amdgpu_bo_reserve +ffffffff81fb9ed0 t gfx_v11_0_kiq_init_register +ffffffff81fbafd0 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81fbb0c0 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81fbb2d0 t gfx_v11_0_cp_gfx_start +ffffffff81fbbc20 t gfx_v11_cntl_pg +ffffffff81fbc000 t gfx_v11_0_3_rlc_gc_fed_irq +ffffffff81fbc240 t gfx_v11_0_3_poison_consumption_handler +ffffffff81fbd000 t gfx_v8_0_early_init +ffffffff81fbd310 t gfx_v8_0_late_init +ffffffff81fbdad0 t gfx_v8_0_sw_init +ffffffff81fbdf30 t gfx_v8_0_sw_fini +ffffffff81fbe140 t gfx_v8_0_hw_init +ffffffff81fc0720 t gfx_v8_0_hw_fini +ffffffff81fc0cb0 t gfx_v8_0_suspend +ffffffff81fc0cf0 t gfx_v8_0_resume +ffffffff81fc0d00 t gfx_v8_0_is_idle +ffffffff81fc0d80 t gfx_v8_0_wait_for_idle +ffffffff81fc0e50 t gfx_v8_0_check_soft_reset +ffffffff81fc0f50 t gfx_v8_0_pre_soft_reset +ffffffff81fc1110 t gfx_v8_0_soft_reset +ffffffff81fc1360 t gfx_v8_0_post_soft_reset +ffffffff81fc1550 t gfx_v8_0_set_clockgating_state +ffffffff81fc1830 t gfx_v8_0_set_powergating_state +ffffffff81fc1ce0 t gfx_v8_0_get_clockgating_state +ffffffff81fc1df0 t gfx_v8_0_get_gpu_clock_counter +ffffffff81fc1eb0 t gfx_v8_0_select_se_sh +ffffffff81fc1f10 t gfx_v8_0_read_wave_data +ffffffff81fc2510 t gfx_v8_0_read_wave_sgprs +ffffffff81fc25e0 t gfx_v8_0_select_me_pipe_q +ffffffff81fc2600 t gfx_v8_0_ring_get_rptr +ffffffff81fc2630 t gfx_v8_0_ring_get_wptr_compute +ffffffff81fc2660 t gfx_v8_0_ring_set_wptr_compute +ffffffff81fc26a0 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81fc2b10 t gfx_v8_0_ring_test_ring +ffffffff81fc2d50 t gfx_v8_0_ring_emit_rreg +ffffffff81fc3010 t gfx_v8_0_ring_emit_wreg +ffffffff81fc3270 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81fc32d0 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81fc3350 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81fc3910 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81fc3e60 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81fc4180 t gfx_v8_0_ring_emit_vm_flush +ffffffff81fc4580 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81fc48d0 t gfx_v8_0_ring_emit_gds_switch +ffffffff81fc5130 t gfx_v8_0_ring_test_ib +ffffffff81fc5320 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81fc5570 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81fc5620 t gfx_v8_ring_emit_sb +ffffffff81fc5710 t gfx_v8_ring_emit_cntxcntl +ffffffff81fc5d10 t gfx_v8_0_ring_soft_recovery +ffffffff81fc5d40 t gfx_v8_0_emit_mem_sync +ffffffff81fc5f60 t gfx_v8_0_ring_emit_ib_compute +ffffffff81fc62a0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81fc65d0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81fc68c0 t gfx_v8_0_emit_wave_limit +ffffffff81fc6a90 t gfx_v8_0_set_eop_interrupt_state +ffffffff81fc6d10 t gfx_v8_0_eop_irq +ffffffff81fc6e40 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81fc6ed0 t gfx_v8_0_priv_reg_irq +ffffffff81fc6ff0 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81fc7080 t gfx_v8_0_priv_inst_irq +ffffffff81fc71a0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81fc74e0 t gfx_v8_0_cp_ecc_error_irq +ffffffff81fc7530 t gfx_v8_0_set_sq_int_state +ffffffff81fc75c0 t gfx_v8_0_sq_irq +ffffffff81fc7640 t gfx_v8_0_parse_sq_irq +ffffffff81fc78c0 t gfx_v8_0_is_rlc_enabled +ffffffff81fc7910 t gfx_v8_0_set_safe_mode +ffffffff81fc7a40 t gfx_v8_0_unset_safe_mode +ffffffff81fc7b00 t gfx_v8_0_rlc_init +ffffffff81fc7bc0 t gfx_v8_0_get_csb_size +ffffffff81fc7bf0 t gfx_v8_0_get_csb_buffer +ffffffff81fc7d60 t gfx_v8_0_cp_jump_table_num +ffffffff81fc7da0 t gfx_v8_0_rlc_resume +ffffffff81fc8250 t gfx_v8_0_rlc_stop +ffffffff81fc82e0 t gfx_v8_0_rlc_reset +ffffffff81fc8390 t gfx_v8_0_rlc_start +ffffffff81fc8430 t gfx_v8_0_update_spm_vmid +ffffffff81fc84c0 t gfx_v8_0_init_save_restore_list +ffffffff81fc89a0 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81fc8c10 t gfx_v8_0_sq_irq_work_func +ffffffff81fc8c30 t gfx_v8_0_init_microcode +ffffffff81fc95c0 t gfx_v8_0_mec_init +ffffffff81fc96f0 t gfx_v8_0_compute_ring_init +ffffffff81fc9840 t gfx_v8_0_gpu_early_init +ffffffff81fc9d10 t amdgpu_bo_unreserve +ffffffff81fc9e20 t gfx_v8_0_kiq_resume +ffffffff81fca170 t gfx_v8_0_cp_gfx_resume +ffffffff81fcadb0 t gfx_v8_0_kcq_resume +ffffffff81fcb8c0 t amdgpu_bo_reserve +ffffffff81fcba60 t gfx_v8_0_mqd_commit +ffffffff81fcbcd0 t gfx_v8_0_mqd_init +ffffffff81fcc1e0 t gfx_v8_0_deactivate_hqd +ffffffff81fcc2e0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81fcc6f0 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81fcd000 t gfx_v9_0_ras_error_inject +ffffffff81fcd1e0 t gfx_v9_0_query_ras_error_count +ffffffff81fcdf10 t gfx_v9_0_reset_ras_error_count +ffffffff81fceab0 T gfx_v9_0_select_se_sh +ffffffff81fceb50 t gfx_v9_0_early_init +ffffffff81fcf790 t gfx_v9_0_late_init +ffffffff81fd0770 t gfx_v9_0_sw_init +ffffffff81fd0f50 t gfx_v9_0_sw_fini +ffffffff81fd11b0 t gfx_v9_0_hw_init +ffffffff81fd4720 t gfx_v9_0_hw_fini +ffffffff81fd4fe0 t gfx_v9_0_suspend +ffffffff81fd5020 t gfx_v9_0_resume +ffffffff81fd5030 t gfx_v9_0_is_idle +ffffffff81fd50d0 t gfx_v9_0_wait_for_idle +ffffffff81fd51d0 t gfx_v9_0_soft_reset +ffffffff81fd55e0 t gfx_v9_0_set_clockgating_state +ffffffff81fd56e0 t gfx_v9_0_set_powergating_state +ffffffff81fd5b40 t gfx_v9_0_get_clockgating_state +ffffffff81fd5c80 t gfx_v9_0_get_gpu_clock_counter +ffffffff81fd6560 t gfx_v9_0_read_wave_data +ffffffff81fd6830 t gfx_v9_0_read_wave_vgprs +ffffffff81fd68a0 t gfx_v9_0_read_wave_sgprs +ffffffff81fd68d0 t gfx_v9_0_select_me_pipe_q +ffffffff81fd68f0 t wave_read_ind +ffffffff81fd6a00 t wave_read_regs +ffffffff81fd6b70 t gfx_v9_0_kiq_set_resources +ffffffff81fd6ed0 t gfx_v9_0_kiq_map_queues +ffffffff81fd7250 t gfx_v9_0_kiq_unmap_queues +ffffffff81fd75c0 t gfx_v9_0_kiq_query_status +ffffffff81fd78e0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81fd7a10 t gfx_v9_0_ring_get_rptr_compute +ffffffff81fd7a40 t gfx_v9_0_ring_get_wptr_compute +ffffffff81fd7ab0 t gfx_v9_0_ring_set_wptr_compute +ffffffff81fd7b10 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81fd7f90 t gfx_v9_0_ring_test_ring +ffffffff81fd8200 t gfx_v9_0_ring_emit_rreg +ffffffff81fd84c0 t gfx_v9_0_ring_emit_wreg +ffffffff81fd8720 t gfx_v9_0_ring_emit_reg_wait +ffffffff81fd8780 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81fd8820 t gfx_v9_0_wait_reg_mem +ffffffff81fd8b80 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81fd8bb0 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81fd8cd0 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81fd8e10 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81fd9500 t gfx_v9_0_ring_emit_fence +ffffffff81fd9900 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81fd9970 t gfx_v9_0_ring_emit_vm_flush +ffffffff81fd9a90 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81fd9b80 t gfx_v9_0_ring_emit_gds_switch +ffffffff81fd9c80 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81fd9ed0 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81fd9f90 t gfx_v9_ring_emit_sb +ffffffff81fda080 t gfx_v9_ring_emit_cntxcntl +ffffffff81fda5c0 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81fda6d0 t gfx_v9_0_ring_soft_recovery +ffffffff81fda740 t gfx_v9_0_ring_preempt_ib +ffffffff81fda970 t gfx_v9_0_emit_mem_sync +ffffffff81fdac60 t gfx_v9_0_write_data_to_reg +ffffffff81fdae90 t gfx_v9_0_ring_test_ib +ffffffff81fdb080 t gfx_v9_0_ring_patch_cntl +ffffffff81fdb0c0 t gfx_v9_0_ring_patch_ce_meta +ffffffff81fdb1d0 t gfx_v9_0_ring_patch_de_meta +ffffffff81fdb2a0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81fdb600 t gfx_v9_0_emit_wave_limit +ffffffff81fdb800 t gfx_v9_0_set_eop_interrupt_state +ffffffff81fdba00 t gfx_v9_0_eop_irq +ffffffff81fdbb70 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81fdbd50 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81fdbea0 t gfx_v9_0_priv_reg_irq +ffffffff81fdbfc0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81fdc110 t gfx_v9_0_priv_inst_irq +ffffffff81fdc230 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81fdcc20 t gfx_v9_0_is_rlc_enabled +ffffffff81fdccc0 t gfx_v9_0_set_safe_mode +ffffffff81fdce40 t gfx_v9_0_unset_safe_mode +ffffffff81fdceb0 t gfx_v9_0_rlc_init +ffffffff81fdcf30 t gfx_v9_0_get_csb_size +ffffffff81fdcf60 t gfx_v9_0_get_csb_buffer +ffffffff81fdd0a0 t gfx_v9_0_cp_jump_table_num +ffffffff81fdd0f0 t gfx_v9_0_rlc_resume +ffffffff81fdeb20 t gfx_v9_0_rlc_stop +ffffffff81fdef40 t gfx_v9_0_rlc_reset +ffffffff81fdf120 t gfx_v9_0_rlc_start +ffffffff81fdf2a0 t gfx_v9_0_update_spm_vmid +ffffffff81fdf2f0 t gfx_v9_0_is_rlcg_access_range +ffffffff81fdf340 t gfx_v9_0_init_csb +ffffffff81fdf500 t gfx_v9_0_enable_lbpw +ffffffff81fdf610 t gfx_v9_0_update_spm_vmid_internal +ffffffff81fdf740 t gfx_v9_0_init_always_on_cu_mask +ffffffff81fdfa00 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81fdfb10 t gfx_v9_0_mec_init +ffffffff81fdfd70 t gfx_v9_0_compute_ring_init +ffffffff81fdfed0 t gfx_v9_0_gpu_early_init +ffffffff81fe0340 t amdgpu_bo_unreserve +ffffffff81fe0450 t gfx_v9_0_cp_gfx_enable +ffffffff81fe0550 t amdgpu_bo_reserve +ffffffff81fe06f0 t gfx_v9_0_kiq_init_register +ffffffff81fe1560 t gfx_v9_0_mqd_init +ffffffff81fe1b30 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81fe20e0 t gfx_v9_0_update_3d_clock_gating +ffffffff81fe2540 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81fe3000 t gfx_v9_4_query_ras_error_count +ffffffff81fe3ef0 t gfx_v9_4_query_ras_error_status +ffffffff81fe40f0 t gfx_v9_4_reset_ras_error_count +ffffffff81fe5000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81fe5890 T gfx_v9_4_2_init_golden_registers +ffffffff81fe5930 T gfx_v9_4_2_debug_trap_config_init +ffffffff81fe5a50 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81fe5c70 t gfx_v9_4_2_query_ras_error_count +ffffffff81fe5d40 t gfx_v9_4_2_query_ras_error_status +ffffffff81fe66e0 t gfx_v9_4_2_reset_ras_error_count +ffffffff81fe6750 t gfx_v9_4_2_reset_ras_error_status +ffffffff81fe6cb0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81fe6f10 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81fe6fb0 t gfx_v9_4_2_run_shader +ffffffff81fe73e0 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81fe7ac0 t gfx_v9_4_2_query_sram_edc_count +ffffffff81fe7e30 t gfx_v9_4_2_query_utc_edc_count +ffffffff81fe8020 t wave_read_ind +ffffffff81fe9000 t gfx_v9_4_3_xcp_suspend +ffffffff81fe90b0 t gfx_v9_4_3_xcp_resume +ffffffff81fe9250 t gfx_v9_4_3_query_ras_error_count +ffffffff81fe9270 t gfx_v9_4_3_query_ras_error_status +ffffffff81fe9290 t gfx_v9_4_3_reset_ras_error_count +ffffffff81fe92b0 t gfx_v9_4_3_reset_ras_error_status +ffffffff81fe92d0 t gfx_v9_4_3_enable_watchdog_timer +ffffffff81fe92f0 t gfx_v9_4_3_early_init +ffffffff81fe9a60 t gfx_v9_4_3_late_init +ffffffff81fe9af0 t gfx_v9_4_3_sw_init +ffffffff81fe9fe0 t gfx_v9_4_3_sw_fini +ffffffff81fea210 t gfx_v9_4_3_hw_init +ffffffff81feadf0 t gfx_v9_4_3_hw_fini +ffffffff81feaed0 t gfx_v9_4_3_suspend +ffffffff81feafb0 t gfx_v9_4_3_resume +ffffffff81feafc0 t gfx_v9_4_3_is_idle +ffffffff81feb1b0 t gfx_v9_4_3_wait_for_idle +ffffffff81feb250 t gfx_v9_4_3_soft_reset +ffffffff81feba90 t gfx_v9_4_3_set_clockgating_state +ffffffff81febc50 t gfx_v9_4_3_set_powergating_state +ffffffff81febc80 t gfx_v9_4_3_get_clockgating_state +ffffffff81febe30 t gfx_v9_4_3_kiq_set_resources +ffffffff81fec190 t gfx_v9_4_3_kiq_map_queues +ffffffff81fec530 t gfx_v9_4_3_kiq_unmap_queues +ffffffff81fec8f0 t gfx_v9_4_3_kiq_query_status +ffffffff81fecc10 t gfx_v9_4_3_kiq_invalidate_tlbs +ffffffff81fecd40 t gfx_v9_4_3_ring_get_rptr_compute +ffffffff81fecd80 t gfx_v9_4_3_ring_get_wptr_compute +ffffffff81fecdf0 t gfx_v9_4_3_ring_set_wptr_compute +ffffffff81fece50 t gfx_v9_4_3_ring_emit_fence_kiq +ffffffff81fed2f0 t gfx_v9_4_3_ring_test_ring +ffffffff81fed590 t gfx_v9_4_3_ring_emit_rreg +ffffffff81fed850 t gfx_v9_4_3_ring_emit_wreg +ffffffff81fedab0 t gfx_v9_4_3_ring_emit_reg_wait +ffffffff81fedb10 t gfx_v9_4_3_ring_emit_reg_write_reg_wait +ffffffff81fedb30 t gfx_v9_4_3_wait_reg_mem +ffffffff81fede90 t gfx_v9_4_3_ring_emit_ib_compute +ffffffff81fee1f0 t gfx_v9_4_3_ring_emit_fence +ffffffff81fee5e0 t gfx_v9_4_3_ring_emit_pipeline_sync +ffffffff81fee650 t gfx_v9_4_3_ring_emit_vm_flush +ffffffff81fee670 t gfx_v9_4_3_ring_emit_hdp_flush +ffffffff81fee760 t gfx_v9_4_3_ring_emit_gds_switch +ffffffff81fee940 t gfx_v9_4_3_ring_test_ib +ffffffff81feeb30 t gfx_v9_4_3_emit_mem_sync +ffffffff81feee20 t gfx_v9_4_3_emit_wave_limit +ffffffff81fef030 t gfx_v9_4_3_write_data_to_reg +ffffffff81fef260 t gfx_v9_4_3_set_eop_interrupt_state +ffffffff81fef3e0 t gfx_v9_4_3_eop_irq +ffffffff81fef590 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state +ffffffff81fef710 t gfx_v9_4_3_ih_to_xcc_inst +ffffffff81fef7f0 t gfx_v9_4_3_set_priv_reg_fault_state +ffffffff81fefc50 t gfx_v9_4_3_priv_reg_irq +ffffffff81fefcc0 t gfx_v9_4_3_fault +ffffffff81fefe40 t gfx_v9_4_3_set_priv_inst_fault_state +ffffffff81ff02a0 t gfx_v9_4_3_priv_inst_irq +ffffffff81ff0310 t gfx_v9_4_3_is_rlc_enabled +ffffffff81ff0460 t gfx_v9_4_3_xcc_set_safe_mode +ffffffff81ff0770 t gfx_v9_4_3_xcc_unset_safe_mode +ffffffff81ff08b0 t gfx_v9_4_3_rlc_init +ffffffff81ff0910 t gfx_v9_4_3_rlc_resume +ffffffff81ff09d0 t gfx_v9_4_3_rlc_stop +ffffffff81ff0a80 t gfx_v9_4_3_rlc_reset +ffffffff81ff1200 t gfx_v9_4_3_rlc_start +ffffffff81ff12b0 t gfx_v9_4_3_update_spm_vmid +ffffffff81ff1510 t gfx_v9_4_3_is_rlcg_access_range +ffffffff81ff15e0 t gfx_v9_4_3_xcc_rlc_resume +ffffffff81ff1fa0 t gfx_v9_4_3_xcc_rlc_stop +ffffffff81ff2800 t gfx_v9_4_3_xcc_rlc_start +ffffffff81ff2c10 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt +ffffffff81ff2e70 t gfx_v9_4_3_xcc_select_se_sh +ffffffff81ff30a0 t gfx_v9_4_3_mec_init +ffffffff81ff3410 t gfx_v9_4_3_gpu_early_init +ffffffff81ff3660 t amdgpu_bo_unreserve +ffffffff81ff3770 t gfx_v9_4_3_get_gpu_clock_counter +ffffffff81ff3b40 t gfx_v9_4_3_read_wave_data +ffffffff81ff3ea0 t gfx_v9_4_3_read_wave_vgprs +ffffffff81ff3ec0 t gfx_v9_4_3_read_wave_sgprs +ffffffff81ff3f20 t gfx_v9_4_3_select_me_pipe_q +ffffffff81ff3fa0 t gfx_v9_4_3_switch_compute_partition +ffffffff81ff4350 t wave_read_ind +ffffffff81ff4590 t wave_read_regs +ffffffff81ff4870 t gfx_v9_4_3_xcc_constants_init +ffffffff81ff5be0 t gfx_v9_4_3_xcc_cp_resume +ffffffff81ff6e80 t gfx_v9_4_3_xcc_cp_compute_enable +ffffffff81ff7060 t amdgpu_bo_reserve +ffffffff81ff7200 t gfx_v9_4_3_xcc_kiq_init_register +ffffffff81ff92a0 t gfx_v9_4_3_xcc_mqd_init +ffffffff81ff9e40 t gfx_v9_4_3_xcc_fini +ffffffff81ffa4c0 t gfx_v9_4_3_xcc_q_fini_register +ffffffff81ffb020 t gfx_v9_4_3_xcc_update_sram_fgcg +ffffffff81ffb2d0 t gfx_v9_4_3_xcc_update_repeater_fgcg +ffffffff81ffb580 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating +ffffffff81ffc270 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating +ffffffff81ffcc00 t gfx_v9_4_3_inst_query_ras_err_count +ffffffff81ffceb0 t gfx_v9_4_3_inst_query_ras_err_status +ffffffff81ffdea0 t gfx_v9_4_3_inst_reset_ras_err_count +ffffffff81ffe090 t gfx_v9_4_3_inst_reset_ras_err_status +ffffffff81ffe930 t gfx_v9_4_3_inst_enable_watchdog_timer +ffffffff81fff000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81fff0a0 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81fff1f0 t gfxhub_v1_0_gart_enable +ffffffff820009c0 t gfxhub_v1_0_gart_disable +ffffffff82000cb0 t gfxhub_v1_0_set_fault_enable_default +ffffffff82000db0 t gfxhub_v1_0_init +ffffffff82001000 T gfxhub_v1_1_get_xgmi_info +ffffffff82002000 t gfxhub_v1_2_get_mc_fb_offset +ffffffff82002150 t gfxhub_v1_2_setup_vm_pt_regs +ffffffff820021c0 t gfxhub_v1_2_gart_enable +ffffffff82002250 t gfxhub_v1_2_gart_disable +ffffffff820022b0 t gfxhub_v1_2_set_fault_enable_default +ffffffff82002320 t gfxhub_v1_2_init +ffffffff82002680 t gfxhub_v1_2_get_xgmi_info +ffffffff82002930 t gfxhub_v1_2_xcp_suspend +ffffffff82002980 t gfxhub_v1_2_xcp_resume +ffffffff82002a00 t gfxhub_v1_2_xcc_setup_vm_pt_regs +ffffffff82002d60 t gfxhub_v1_2_xcc_gart_enable +ffffffff820069d0 t gfxhub_v1_2_xcc_gart_disable +ffffffff82007130 t gfxhub_v1_2_xcc_set_fault_enable_default +ffffffff82008000 t gfxhub_v2_0_get_fb_location +ffffffff820080a0 t gfxhub_v2_0_get_mc_fb_offset +ffffffff82008140 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff82008290 t gfxhub_v2_0_gart_enable +ffffffff82009730 t gfxhub_v2_0_gart_disable +ffffffff820099a0 t gfxhub_v2_0_set_fault_enable_default +ffffffff82009aa0 t gfxhub_v2_0_init +ffffffff82009b70 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff82009d90 t gfxhub_v2_0_get_invalidate_req +ffffffff8200a000 t gfxhub_v2_1_get_fb_location +ffffffff8200a0a0 t gfxhub_v2_1_get_mc_fb_offset +ffffffff8200a140 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff8200a290 t gfxhub_v2_1_gart_enable +ffffffff8200b830 t gfxhub_v2_1_gart_disable +ffffffff8200baa0 t gfxhub_v2_1_set_fault_enable_default +ffffffff8200bbc0 t gfxhub_v2_1_init +ffffffff8200bc90 t gfxhub_v2_1_get_xgmi_info +ffffffff8200bdf0 t gfxhub_v2_1_utcl2_harvest +ffffffff8200bfe0 t gfxhub_v2_1_save_regs +ffffffff8200cb30 t gfxhub_v2_1_restore_regs +ffffffff8200d900 t gfxhub_v2_1_halt +ffffffff8200dd50 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff8200df70 t gfxhub_v2_1_get_invalidate_req +ffffffff8200e000 t gfxhub_v3_0_get_fb_location +ffffffff8200e0a0 t gfxhub_v3_0_get_mc_fb_offset +ffffffff8200e140 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff8200e290 t gfxhub_v3_0_gart_enable +ffffffff8200f830 t gfxhub_v3_0_gart_disable +ffffffff8200fb10 t gfxhub_v3_0_set_fault_enable_default +ffffffff8200fd00 t gfxhub_v3_0_init +ffffffff8200fdd0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff8200fff0 t gfxhub_v3_0_get_invalidate_req +ffffffff82011000 t gfxhub_v3_0_3_get_fb_location +ffffffff820110a0 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff82011140 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff82011290 t gfxhub_v3_0_3_gart_enable +ffffffff820126f0 t gfxhub_v3_0_3_gart_disable +ffffffff820129f0 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff82012b10 t gfxhub_v3_0_3_init +ffffffff82012be0 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff82012e00 t gfxhub_v3_0_3_get_invalidate_req +ffffffff82013000 t gmc_v10_0_early_init +ffffffff82013170 t gmc_v10_0_late_init +ffffffff820131f0 t gmc_v10_0_sw_init +ffffffff82013690 t gmc_v10_0_sw_fini +ffffffff82013710 t gmc_v10_0_hw_init +ffffffff82013990 t gmc_v10_0_hw_fini +ffffffff82013a80 t gmc_v10_0_suspend +ffffffff82013ac0 t gmc_v10_0_resume +ffffffff82013b20 t gmc_v10_0_is_idle +ffffffff82013b50 t gmc_v10_0_wait_for_idle +ffffffff82013b80 t gmc_v10_0_soft_reset +ffffffff82013bb0 t gmc_v10_0_set_clockgating_state +ffffffff82013c70 t gmc_v10_0_set_powergating_state +ffffffff82013ca0 t gmc_v10_0_get_clockgating_state +ffffffff82013d50 t gmc_v10_0_flush_gpu_tlb +ffffffff82014060 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff82014380 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff82014560 t gmc_v10_0_emit_pasid_mapping +ffffffff820145e0 t gmc_v10_0_map_mtype +ffffffff82014630 t gmc_v10_0_get_vm_pde +ffffffff82014730 t gmc_v10_0_get_vm_pte +ffffffff82014810 t gmc_v10_0_get_vbios_fb_size +ffffffff820149a0 t gmc_v10_0_flush_vm_hub +ffffffff82014e40 t gmc_v10_0_vm_fault_interrupt_state +ffffffff82014ef0 t gmc_v10_0_process_interrupt +ffffffff82015220 t gmc_v10_0_ecc_interrupt_state +ffffffff82015250 t gmc_v10_0_gart_init +ffffffff82016000 t gmc_v11_0_early_init +ffffffff820161f0 t gmc_v11_0_late_init +ffffffff82016270 t gmc_v11_0_sw_init +ffffffff82016630 t gmc_v11_0_sw_fini +ffffffff820166b0 t gmc_v11_0_hw_init +ffffffff82016860 t gmc_v11_0_hw_fini +ffffffff82016920 t gmc_v11_0_suspend +ffffffff820169e0 t gmc_v11_0_resume +ffffffff82016a40 t gmc_v11_0_is_idle +ffffffff82016a70 t gmc_v11_0_wait_for_idle +ffffffff82016aa0 t gmc_v11_0_soft_reset +ffffffff82016ad0 t gmc_v11_0_set_clockgating_state +ffffffff82016b50 t gmc_v11_0_set_powergating_state +ffffffff82016b80 t gmc_v11_0_get_clockgating_state +ffffffff82016bc0 t gmc_v11_0_flush_gpu_tlb +ffffffff820170f0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff820173c0 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff820175a0 t gmc_v11_0_emit_pasid_mapping +ffffffff82017620 t gmc_v11_0_map_mtype +ffffffff82017670 t gmc_v11_0_get_vm_pde +ffffffff82017770 t gmc_v11_0_get_vm_pte +ffffffff82017850 t gmc_v11_0_get_vbios_fb_size +ffffffff820179e0 t gmc_v11_0_vm_fault_interrupt_state +ffffffff82017a90 t gmc_v11_0_process_interrupt +ffffffff82017cf0 t gmc_v11_0_ecc_interrupt_state +ffffffff82017d20 t gmc_v11_0_gart_init +ffffffff82018000 t gmc_v7_0_early_init +ffffffff820180a0 t gmc_v7_0_late_init +ffffffff820180f0 t gmc_v7_0_sw_init +ffffffff82018610 t gmc_v7_0_sw_fini +ffffffff820186c0 t gmc_v7_0_hw_init +ffffffff82019350 t gmc_v7_0_hw_fini +ffffffff82019460 t gmc_v7_0_suspend +ffffffff820194a0 t gmc_v7_0_resume +ffffffff82019500 t gmc_v7_0_is_idle +ffffffff82019550 t gmc_v7_0_wait_for_idle +ffffffff82019600 t gmc_v7_0_soft_reset +ffffffff82019910 t gmc_v7_0_set_clockgating_state +ffffffff82019bb0 t gmc_v7_0_set_powergating_state +ffffffff82019be0 t gmc_v7_0_flush_gpu_tlb +ffffffff82019c10 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff82019cf0 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff82019da0 t gmc_v7_0_emit_pasid_mapping +ffffffff82019dd0 t gmc_v7_0_set_prt +ffffffff82019ff0 t gmc_v7_0_get_vm_pde +ffffffff8201a050 t gmc_v7_0_get_vm_pte +ffffffff8201a090 t gmc_v7_0_get_vbios_fb_size +ffffffff8201a110 t gmc_v7_0_vm_fault_interrupt_state +ffffffff8201a210 t gmc_v7_0_process_interrupt +ffffffff8201a520 t gmc_v7_0_gart_init +ffffffff8201b000 t gmc_v8_0_early_init +ffffffff8201b0a0 t gmc_v8_0_late_init +ffffffff8201b0f0 t gmc_v8_0_sw_init +ffffffff8201b7b0 t gmc_v8_0_sw_fini +ffffffff8201b860 t gmc_v8_0_hw_init +ffffffff8201c890 t gmc_v8_0_hw_fini +ffffffff8201c9a0 t gmc_v8_0_suspend +ffffffff8201c9e0 t gmc_v8_0_resume +ffffffff8201ca40 t gmc_v8_0_is_idle +ffffffff8201ca90 t gmc_v8_0_wait_for_idle +ffffffff8201cb40 t gmc_v8_0_check_soft_reset +ffffffff8201cbc0 t gmc_v8_0_pre_soft_reset +ffffffff8201cd70 t gmc_v8_0_soft_reset +ffffffff8201ce70 t gmc_v8_0_post_soft_reset +ffffffff8201cf00 t gmc_v8_0_set_clockgating_state +ffffffff8201d730 t gmc_v8_0_set_powergating_state +ffffffff8201d760 t gmc_v8_0_get_clockgating_state +ffffffff8201d7d0 t gmc_v8_0_flush_gpu_tlb +ffffffff8201d800 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff8201d8e0 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff8201d990 t gmc_v8_0_emit_pasid_mapping +ffffffff8201d9c0 t gmc_v8_0_set_prt +ffffffff8201dbe0 t gmc_v8_0_get_vm_pde +ffffffff8201dc40 t gmc_v8_0_get_vm_pte +ffffffff8201dc90 t gmc_v8_0_get_vbios_fb_size +ffffffff8201dd10 t gmc_v8_0_vm_fault_interrupt_state +ffffffff8201de10 t gmc_v8_0_process_interrupt +ffffffff8201e230 t gmc_v8_0_gart_init +ffffffff8201f000 T gmc_v9_0_restore_registers +ffffffff8201f170 t gmc_v9_0_early_init +ffffffff8201f540 t gmc_v9_0_late_init +ffffffff8201f670 t gmc_v9_0_sw_init +ffffffff8201fee0 t gmc_v9_0_sw_fini +ffffffff8201ffe0 t gmc_v9_0_hw_init +ffffffff82020560 t gmc_v9_0_hw_fini +ffffffff82020660 t gmc_v9_0_suspend +ffffffff820206a0 t gmc_v9_0_resume +ffffffff82020700 t gmc_v9_0_is_idle +ffffffff82020730 t gmc_v9_0_wait_for_idle +ffffffff82020760 t gmc_v9_0_soft_reset +ffffffff82020790 t gmc_v9_0_set_clockgating_state +ffffffff82020800 t gmc_v9_0_set_powergating_state +ffffffff82020830 t gmc_v9_0_get_clockgating_state +ffffffff82020870 t gmc_v9_0_flush_gpu_tlb +ffffffff82020fa0 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff820213e0 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff82021610 t gmc_v9_0_emit_pasid_mapping +ffffffff82021690 t gmc_v9_0_map_mtype +ffffffff820216d0 t gmc_v9_0_get_vm_pde +ffffffff820217e0 t gmc_v9_0_get_vm_pte +ffffffff82021b20 t gmc_v9_0_override_vm_pte_flags +ffffffff82021be0 t gmc_v9_0_get_vbios_fb_size +ffffffff82021d90 t gmc_v9_0_query_memory_partition +ffffffff82021df0 t gmc_v9_0_vm_fault_interrupt_state +ffffffff820222d0 t gmc_v9_0_process_interrupt +ffffffff82022ba0 t gmc_v9_0_ecc_interrupt_state +ffffffff82022d50 t gmc_v9_0_init_mem_ranges +ffffffff820231b0 t gmc_v9_0_gart_init +ffffffff82023320 t gmc_v9_0_save_registers +ffffffff82024000 t hdp_v4_0_query_ras_error_count +ffffffff820240d0 t hdp_v4_0_reset_ras_error_count +ffffffff82024200 t hdp_v4_0_flush_hdp +ffffffff82024250 t hdp_v4_0_invalidate_hdp +ffffffff82024330 t hdp_v4_0_update_clock_gating +ffffffff82024440 t hdp_v4_0_get_clockgating_state +ffffffff820244a0 t hdp_v4_0_init_registers +ffffffff82025000 t hdp_v5_0_flush_hdp +ffffffff82025050 t hdp_v5_0_invalidate_hdp +ffffffff820250f0 t hdp_v5_0_update_clock_gating +ffffffff82025530 t hdp_v5_0_get_clockgating_state +ffffffff82025670 t hdp_v5_0_init_registers +ffffffff82026000 t hdp_v5_2_flush_hdp +ffffffff82026050 t hdp_v5_2_update_clock_gating +ffffffff820264a0 t hdp_v5_2_get_clockgating_state +ffffffff82027000 t hdp_v6_0_flush_hdp +ffffffff82027050 t hdp_v6_0_update_clock_gating +ffffffff820273b0 t hdp_v6_0_get_clockgating_state +ffffffff82028000 t iceland_ih_early_init +ffffffff82028050 t iceland_ih_sw_init +ffffffff820280c0 t iceland_ih_sw_fini +ffffffff82028120 t iceland_ih_hw_init +ffffffff82028410 t iceland_ih_hw_fini +ffffffff82028520 t iceland_ih_suspend +ffffffff82028630 t iceland_ih_resume +ffffffff82028670 t iceland_ih_is_idle +ffffffff820286c0 t iceland_ih_wait_for_idle +ffffffff82028770 t iceland_ih_soft_reset +ffffffff82028890 t iceland_ih_set_clockgating_state +ffffffff820288c0 t iceland_ih_set_powergating_state +ffffffff820288f0 t iceland_ih_get_wptr +ffffffff82028a20 t iceland_ih_decode_iv +ffffffff82028aa0 t iceland_ih_set_rptr +ffffffff82029000 t ih_v6_0_early_init +ffffffff82029050 t ih_v6_0_sw_init +ffffffff820291d0 t ih_v6_0_sw_fini +ffffffff82029210 t ih_v6_0_hw_init +ffffffff820298a0 t ih_v6_0_hw_fini +ffffffff82029910 t ih_v6_0_suspend +ffffffff82029980 t ih_v6_0_resume +ffffffff82029990 t ih_v6_0_is_idle +ffffffff820299c0 t ih_v6_0_wait_for_idle +ffffffff820299f0 t ih_v6_0_soft_reset +ffffffff82029a20 t ih_v6_0_set_clockgating_state +ffffffff82029b60 t ih_v6_0_set_powergating_state +ffffffff82029d00 t ih_v6_0_get_clockgating_state +ffffffff82029da0 t ih_v6_0_get_wptr +ffffffff82029ee0 t ih_v6_0_set_rptr +ffffffff82029fc0 t ih_v6_0_self_irq +ffffffff8202a030 t ih_v6_0_toggle_interrupts +ffffffff8202a250 t force_update_wptr_for_self_int +ffffffff8202b000 t ih_v6_1_early_init +ffffffff8202b050 t ih_v6_1_sw_init +ffffffff8202b1d0 t ih_v6_1_sw_fini +ffffffff8202b210 t ih_v6_1_hw_init +ffffffff8202b8a0 t ih_v6_1_hw_fini +ffffffff8202b910 t ih_v6_1_suspend +ffffffff8202b980 t ih_v6_1_resume +ffffffff8202b990 t ih_v6_1_is_idle +ffffffff8202b9c0 t ih_v6_1_wait_for_idle +ffffffff8202b9f0 t ih_v6_1_soft_reset +ffffffff8202ba20 t ih_v6_1_set_clockgating_state +ffffffff8202bb60 t ih_v6_1_set_powergating_state +ffffffff8202bd00 t ih_v6_1_get_clockgating_state +ffffffff8202bda0 t ih_v6_1_get_wptr +ffffffff8202bee0 t ih_v6_1_set_rptr +ffffffff8202bfc0 t ih_v6_1_self_irq +ffffffff8202c030 t ih_v6_1_toggle_interrupts +ffffffff8202c250 t force_update_wptr_for_self_int +ffffffff8202d000 t imu_v11_0_init_microcode +ffffffff8202d1b0 t imu_v11_0_load_microcode +ffffffff8202d580 t imu_v11_0_setup +ffffffff8202d860 t imu_v11_0_start +ffffffff8202d980 t imu_v11_0_program_rlc_ram +ffffffff8202db60 t imu_v11_0_wait_for_reset_status +ffffffff8202dce0 t program_imu_rlc_ram +ffffffff8202f000 T imu_v11_0_3_program_rlc_ram +ffffffff82030000 T jpeg_v1_0_early_init +ffffffff82030080 T jpeg_v1_0_sw_init +ffffffff82030190 T jpeg_v1_0_sw_fini +ffffffff820301b0 T jpeg_v1_0_start +ffffffff82030cf0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff82030d80 t jpeg_v1_0_decode_ring_get_wptr +ffffffff82030e10 t jpeg_v1_0_decode_ring_set_wptr +ffffffff82030e80 t jpeg_v1_0_decode_ring_emit_ib +ffffffff82031860 t jpeg_v1_0_decode_ring_emit_fence +ffffffff820322b0 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff82032320 t jpeg_v1_0_decode_ring_nop +ffffffff82032480 t jpeg_v1_0_decode_ring_insert_start +ffffffff82032660 t jpeg_v1_0_decode_ring_insert_end +ffffffff82032840 t jpeg_v1_0_ring_begin_use +ffffffff82032970 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff82032c00 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff82033060 t jpeg_v1_0_set_interrupt_state +ffffffff82033090 t jpeg_v1_0_process_interrupt +ffffffff82034000 T jpeg_v2_0_dec_ring_insert_start +ffffffff820341c0 T jpeg_v2_0_dec_ring_insert_end +ffffffff82034380 T jpeg_v2_0_dec_ring_emit_fence +ffffffff82034af0 T jpeg_v2_0_dec_ring_emit_ib +ffffffff82035380 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff82035780 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff820357f0 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff82035a50 T jpeg_v2_0_dec_ring_nop +ffffffff82035bb0 t jpeg_v2_0_early_init +ffffffff82035c40 t jpeg_v2_0_sw_init +ffffffff82035d90 t jpeg_v2_0_sw_fini +ffffffff82035df0 t jpeg_v2_0_hw_init +ffffffff82035e80 t jpeg_v2_0_hw_fini +ffffffff82035f70 t jpeg_v2_0_suspend +ffffffff82035fa0 t jpeg_v2_0_resume +ffffffff82036050 t jpeg_v2_0_is_idle +ffffffff820360f0 t jpeg_v2_0_wait_for_idle +ffffffff82036130 t jpeg_v2_0_set_clockgating_state +ffffffff820361f0 t jpeg_v2_0_set_powergating_state +ffffffff82036a60 t jpeg_v2_0_dec_ring_get_rptr +ffffffff82036af0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff82036ba0 t jpeg_v2_0_dec_ring_set_wptr +ffffffff82036c40 t jpeg_v2_0_set_interrupt_state +ffffffff82036c70 t jpeg_v2_0_process_interrupt +ffffffff82036d10 t jpeg_v2_0_enable_clock_gating +ffffffff82036ee0 t jpeg_v2_0_disable_clock_gating +ffffffff82038000 t jpeg_v2_6_query_ras_poison_status +ffffffff82038160 t jpeg_v2_5_early_init +ffffffff82038380 t jpeg_v2_5_sw_init +ffffffff82038660 t jpeg_v2_5_sw_fini +ffffffff820386c0 t jpeg_v2_5_hw_init +ffffffff820387c0 t jpeg_v2_5_hw_fini +ffffffff82038980 t jpeg_v2_5_suspend +ffffffff820389b0 t jpeg_v2_5_resume +ffffffff82038ad0 t jpeg_v2_5_is_idle +ffffffff82038be0 t jpeg_v2_5_wait_for_idle +ffffffff82038ca0 t jpeg_v2_5_set_clockgating_state +ffffffff82038d60 t jpeg_v2_5_set_powergating_state +ffffffff820395c0 t jpeg_v2_5_dec_ring_get_rptr +ffffffff82039660 t jpeg_v2_5_dec_ring_get_wptr +ffffffff82039710 t jpeg_v2_5_dec_ring_set_wptr +ffffffff820397c0 t jpeg_v2_6_dec_ring_insert_start +ffffffff820399a0 t jpeg_v2_6_dec_ring_insert_end +ffffffff82039b80 t jpeg_v2_5_set_interrupt_state +ffffffff82039bb0 t jpeg_v2_5_process_interrupt +ffffffff82039c90 t jpeg_v2_6_set_ras_interrupt_state +ffffffff82039cc0 t jpeg_v2_5_enable_clock_gating +ffffffff82039da0 t jpeg_v2_5_disable_clock_gating +ffffffff8203b000 t jpeg_v3_0_early_init +ffffffff8203b120 t jpeg_v3_0_sw_init +ffffffff8203b270 t jpeg_v3_0_sw_fini +ffffffff8203b2d0 t jpeg_v3_0_hw_init +ffffffff8203b360 t jpeg_v3_0_hw_fini +ffffffff8203b450 t jpeg_v3_0_suspend +ffffffff8203b480 t jpeg_v3_0_resume +ffffffff8203b530 t jpeg_v3_0_is_idle +ffffffff8203b5d0 t jpeg_v3_0_wait_for_idle +ffffffff8203b610 t jpeg_v3_0_set_clockgating_state +ffffffff8203b6d0 t jpeg_v3_0_set_powergating_state +ffffffff8203c020 t jpeg_v3_0_dec_ring_get_rptr +ffffffff8203c0b0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff8203c160 t jpeg_v3_0_dec_ring_set_wptr +ffffffff8203c200 t jpeg_v3_0_set_interrupt_state +ffffffff8203c230 t jpeg_v3_0_process_interrupt +ffffffff8203c2d0 t jpeg_v3_0_enable_clock_gating +ffffffff8203c3b0 t jpeg_v3_0_disable_clock_gating +ffffffff8203d000 t jpeg_v4_0_query_ras_poison_status +ffffffff8203d160 t jpeg_v4_0_early_init +ffffffff8203d240 t jpeg_v4_0_sw_init +ffffffff8203d410 t jpeg_v4_0_sw_fini +ffffffff8203d470 t jpeg_v4_0_hw_init +ffffffff8203db60 t jpeg_v4_0_hw_fini +ffffffff8203dc60 t jpeg_v4_0_suspend +ffffffff8203dc90 t jpeg_v4_0_resume +ffffffff8203dcf0 t jpeg_v4_0_is_idle +ffffffff8203dd90 t jpeg_v4_0_wait_for_idle +ffffffff8203ddd0 t jpeg_v4_0_set_clockgating_state +ffffffff8203dea0 t jpeg_v4_0_set_powergating_state +ffffffff8203e760 t jpeg_v4_0_dec_ring_get_rptr +ffffffff8203e7f0 t jpeg_v4_0_dec_ring_get_wptr +ffffffff8203e8a0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff8203e940 t jpeg_v4_0_set_interrupt_state +ffffffff8203e970 t jpeg_v4_0_process_interrupt +ffffffff8203ea20 t jpeg_v4_0_set_ras_interrupt_state +ffffffff8203ea50 t jpeg_v4_0_enable_clock_gating +ffffffff8203ec30 t jpeg_v4_0_disable_clock_gating +ffffffff8203f000 t jpeg_v4_0_3_early_init +ffffffff8203f180 t jpeg_v4_0_3_sw_init +ffffffff8203f500 t jpeg_v4_0_3_sw_fini +ffffffff8203f560 t jpeg_v4_0_3_hw_init +ffffffff820400a0 t jpeg_v4_0_3_hw_fini +ffffffff82040150 t jpeg_v4_0_3_suspend +ffffffff820401f0 t jpeg_v4_0_3_resume +ffffffff82040250 t jpeg_v4_0_3_is_idle +ffffffff82040460 t jpeg_v4_0_3_wait_for_idle +ffffffff820405d0 t jpeg_v4_0_3_set_clockgating_state +ffffffff82040670 t jpeg_v4_0_3_set_powergating_state +ffffffff82041450 t jpeg_v4_0_3_dec_ring_get_rptr +ffffffff820415f0 t jpeg_v4_0_3_dec_ring_get_wptr +ffffffff820417b0 t jpeg_v4_0_3_dec_ring_set_wptr +ffffffff82041960 t jpeg_v4_0_3_dec_ring_emit_ib +ffffffff82042280 t jpeg_v4_0_3_dec_ring_emit_fence +ffffffff82042ad0 t jpeg_v4_0_3_dec_ring_emit_vm_flush +ffffffff82042b40 t jpeg_v4_0_3_dec_ring_nop +ffffffff82042ca0 t jpeg_v4_0_3_dec_ring_insert_start +ffffffff82042e60 t jpeg_v4_0_3_dec_ring_insert_end +ffffffff82043020 t jpeg_v4_0_3_dec_ring_emit_wreg +ffffffff82043280 t jpeg_v4_0_3_dec_ring_emit_reg_wait +ffffffff82043680 t jpeg_v4_0_3_set_interrupt_state +ffffffff820436b0 t jpeg_v4_0_3_process_interrupt +ffffffff82043960 t jpeg_v4_0_3_query_ras_error_count +ffffffff82043a80 t jpeg_v4_0_3_reset_ras_error_count +ffffffff82043b90 t jpeg_v4_0_3_disable_clock_gating +ffffffff82044000 t lsdma_v6_0_copy_mem +ffffffff820443e0 t lsdma_v6_0_fill_mem +ffffffff82044740 t lsdma_v6_0_update_memory_power_gating +ffffffff82045000 t mca_v3_0_ras_block_match +ffffffff82045050 t mca_v3_0_mp0_query_ras_error_count +ffffffff82045070 t mca_v3_0_mp1_query_ras_error_count +ffffffff82045090 t mca_v3_0_mpio_query_ras_error_count +ffffffff82046000 t mes_v10_0_early_init +ffffffff82046070 t mes_v10_0_late_init +ffffffff820460c0 t mes_v10_1_sw_init +ffffffff82046630 t mes_v10_1_sw_fini +ffffffff820467c0 t mes_v10_1_hw_init +ffffffff820471b0 t mes_v10_1_hw_fini +ffffffff820472c0 t mes_v10_1_suspend +ffffffff82047400 t mes_v10_1_resume +ffffffff82047460 t mes_v10_1_kiq_hw_init +ffffffff820478f0 t mes_v10_1_add_hw_queue +ffffffff82047a80 t mes_v10_1_remove_hw_queue +ffffffff82047b20 t mes_v10_1_unmap_legacy_queue +ffffffff82047c20 t mes_v10_1_suspend_gang +ffffffff82047c50 t mes_v10_1_resume_gang +ffffffff82047c80 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff82047ed0 t mes_v10_1_load_microcode +ffffffff820487f0 t mes_v10_1_enable +ffffffff82048d00 t mes_v10_1_queue_init +ffffffff82048fe0 t amdgpu_bo_unreserve +ffffffff820490f0 t mes_v10_1_ring_get_rptr +ffffffff82049120 t mes_v10_1_ring_get_wptr +ffffffff82049190 t mes_v10_1_ring_set_wptr +ffffffff8204a000 t mes_v11_0_early_init +ffffffff8204a070 t mes_v11_0_late_init +ffffffff8204a0e0 t mes_v11_0_sw_init +ffffffff8204a650 t mes_v11_0_sw_fini +ffffffff8204a8a0 t mes_v11_0_hw_init +ffffffff8204b1b0 t mes_v11_0_hw_fini +ffffffff8204b1e0 t mes_v11_0_suspend +ffffffff8204b1f0 t mes_v11_0_resume +ffffffff8204b250 t mes_v11_0_kiq_hw_init +ffffffff8204b4a0 t mes_v11_0_kiq_hw_fini +ffffffff8204b600 t mes_v11_0_add_hw_queue +ffffffff8204b810 t mes_v11_0_remove_hw_queue +ffffffff8204b8b0 t mes_v11_0_unmap_legacy_queue +ffffffff8204b9d0 t mes_v11_0_suspend_gang +ffffffff8204ba00 t mes_v11_0_resume_gang +ffffffff8204ba30 t mes_v11_0_misc_op +ffffffff8204bbf0 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff8204be50 t mes_v11_0_load_microcode +ffffffff8204c6f0 t mes_v11_0_enable +ffffffff8204cca0 t mes_v11_0_queue_init +ffffffff8204d920 t amdgpu_bo_unreserve +ffffffff8204da30 t mes_v11_0_mqd_init +ffffffff8204dc50 t mes_v11_0_kiq_dequeue +ffffffff8204e140 t mes_v11_0_ring_get_rptr +ffffffff8204e170 t mes_v11_0_ring_get_wptr +ffffffff8204e1e0 t mes_v11_0_ring_set_wptr +ffffffff8204f000 t mmhub_v1_0_query_ras_error_count +ffffffff8204f160 t mmhub_v1_0_reset_ras_error_count +ffffffff8204f230 t mmhub_v1_0_get_fb_location +ffffffff8204f360 t mmhub_v1_0_init +ffffffff8204f410 t mmhub_v1_0_gart_enable +ffffffff820509c0 t mmhub_v1_0_set_fault_enable_default +ffffffff82050ae0 t mmhub_v1_0_gart_disable +ffffffff82050db0 t mmhub_v1_0_set_clockgating +ffffffff820512a0 t mmhub_v1_0_get_clockgating +ffffffff820513e0 t mmhub_v1_0_setup_vm_pt_regs +ffffffff82051530 t mmhub_v1_0_update_power_gating +ffffffff82052000 t mmhub_v1_7_query_ras_error_count +ffffffff82052160 t mmhub_v1_7_query_ras_error_status +ffffffff82052270 t mmhub_v1_7_reset_ras_error_count +ffffffff82052320 t mmhub_v1_7_reset_ras_error_status +ffffffff82052440 t mmhub_v1_7_get_fb_location +ffffffff82052570 t mmhub_v1_7_init +ffffffff82052610 t mmhub_v1_7_gart_enable +ffffffff82053df0 t mmhub_v1_7_set_fault_enable_default +ffffffff82053f10 t mmhub_v1_7_gart_disable +ffffffff820541e0 t mmhub_v1_7_set_clockgating +ffffffff820545c0 t mmhub_v1_7_get_clockgating +ffffffff82054700 t mmhub_v1_7_setup_vm_pt_regs +ffffffff82055000 t mmhub_v1_8_get_fb_location +ffffffff82055130 t mmhub_v1_8_init +ffffffff820552b0 t mmhub_v1_8_gart_enable +ffffffff820571d0 t mmhub_v1_8_set_fault_enable_default +ffffffff820573c0 t mmhub_v1_8_gart_disable +ffffffff82057760 t mmhub_v1_8_set_clockgating +ffffffff82057790 t mmhub_v1_8_get_clockgating +ffffffff820577c0 t mmhub_v1_8_setup_vm_pt_regs +ffffffff820579f0 t mmhub_v1_8_query_ras_error_count +ffffffff82057b80 t mmhub_v1_8_query_ras_error_status +ffffffff82057e80 t mmhub_v1_8_reset_ras_error_count +ffffffff82057fc0 t mmhub_v1_8_reset_ras_error_status +ffffffff82059000 t mmhub_v2_0_init +ffffffff820590d0 t mmhub_v2_0_gart_enable +ffffffff8205a4f0 t mmhub_v2_0_set_fault_enable_default +ffffffff8205a610 t mmhub_v2_0_gart_disable +ffffffff8205a8e0 t mmhub_v2_0_set_clockgating +ffffffff8205ac70 t mmhub_v2_0_get_clockgating +ffffffff8205ae30 t mmhub_v2_0_setup_vm_pt_regs +ffffffff8205af90 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff8205b230 t mmhub_v2_0_get_invalidate_req +ffffffff8205c000 t mmhub_v2_3_init +ffffffff8205c0e0 t mmhub_v2_3_gart_enable +ffffffff8205d760 t mmhub_v2_3_set_fault_enable_default +ffffffff8205d860 t mmhub_v2_3_gart_disable +ffffffff8205db40 t mmhub_v2_3_set_clockgating +ffffffff8205e050 t mmhub_v2_3_get_clockgating +ffffffff8205e270 t mmhub_v2_3_setup_vm_pt_regs +ffffffff8205e3c0 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff8205e610 t mmhub_v2_3_get_invalidate_req +ffffffff8205f000 t mmhub_v3_0_get_fb_location +ffffffff8205f0a0 t mmhub_v3_0_get_mc_fb_offset +ffffffff8205f140 t mmhub_v3_0_init +ffffffff8205f220 t mmhub_v3_0_gart_enable +ffffffff82060690 t mmhub_v3_0_set_fault_enable_default +ffffffff820607b0 t mmhub_v3_0_gart_disable +ffffffff82060a80 t mmhub_v3_0_set_clockgating +ffffffff82060c70 t mmhub_v3_0_get_clockgating +ffffffff82060d30 t mmhub_v3_0_setup_vm_pt_regs +ffffffff82060e80 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff820610d0 t mmhub_v3_0_get_invalidate_req +ffffffff82062000 t mmhub_v3_0_1_get_fb_location +ffffffff820620a0 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff82062140 t mmhub_v3_0_1_init +ffffffff82062210 t mmhub_v3_0_1_gart_enable +ffffffff820637a0 t mmhub_v3_0_1_set_fault_enable_default +ffffffff820638a0 t mmhub_v3_0_1_gart_disable +ffffffff82063b80 t mmhub_v3_0_1_set_clockgating +ffffffff82063d70 t mmhub_v3_0_1_get_clockgating +ffffffff82063e30 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff82063f80 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff820641d0 t mmhub_v3_0_1_get_invalidate_req +ffffffff82065000 t mmhub_v3_0_2_get_fb_location +ffffffff820650a0 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff82065140 t mmhub_v3_0_2_init +ffffffff82065210 t mmhub_v3_0_2_gart_enable +ffffffff82066660 t mmhub_v3_0_2_set_fault_enable_default +ffffffff82066780 t mmhub_v3_0_2_gart_disable +ffffffff82066a50 t mmhub_v3_0_2_set_clockgating +ffffffff82066a80 t mmhub_v3_0_2_get_clockgating +ffffffff82066ab0 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff82066c00 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff82066e30 t mmhub_v3_0_2_get_invalidate_req +ffffffff82067000 t mmhub_v9_4_query_ras_error_count +ffffffff82067160 t mmhub_v9_4_query_ras_error_status +ffffffff82067270 t mmhub_v9_4_reset_ras_error_count +ffffffff82067340 t mmhub_v9_4_get_fb_location +ffffffff82067470 t mmhub_v9_4_init +ffffffff820675c0 t mmhub_v9_4_gart_enable +ffffffff82068c60 t mmhub_v9_4_set_fault_enable_default +ffffffff82068e70 t mmhub_v9_4_gart_disable +ffffffff82069210 t mmhub_v9_4_set_clockgating +ffffffff82069750 t mmhub_v9_4_get_clockgating +ffffffff82069890 t mmhub_v9_4_setup_vm_pt_regs +ffffffff820698e0 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff8206a000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff8206a050 T xgpu_ai_mailbox_add_irq_id +ffffffff8206a100 T xgpu_ai_mailbox_get_irq +ffffffff8206a1d0 t xgpu_ai_mailbox_flr_work +ffffffff8206a470 T xgpu_ai_mailbox_put_irq +ffffffff8206a4b0 t xgpu_ai_request_full_gpu_access +ffffffff8206a4d0 t xgpu_ai_release_full_gpu_access +ffffffff8206a4f0 t xgpu_ai_request_init_data +ffffffff8206a560 t xgpu_ai_request_reset +ffffffff8206a630 t xgpu_ai_mailbox_trans_msg +ffffffff8206a8f0 t xgpu_ai_ras_poison_handler +ffffffff8206a920 t xgpu_ai_set_mailbox_ack_irq +ffffffff8206a9c0 t xgpu_ai_mailbox_ack_irq +ffffffff8206aa20 t xgpu_ai_set_mailbox_rcv_irq +ffffffff8206aac0 t xgpu_ai_mailbox_rcv_irq +ffffffff8206abd0 t xgpu_ai_send_access_requests +ffffffff8206acf0 t xgpu_ai_poll_msg +ffffffff8206b000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff8206b050 T xgpu_nv_mailbox_add_irq_id +ffffffff8206b100 T xgpu_nv_mailbox_get_irq +ffffffff8206b1d0 t xgpu_nv_mailbox_flr_work +ffffffff8206b490 T xgpu_nv_mailbox_put_irq +ffffffff8206b4d0 t xgpu_nv_request_full_gpu_access +ffffffff8206b4f0 t xgpu_nv_release_full_gpu_access +ffffffff8206b510 t xgpu_nv_request_init_data +ffffffff8206b530 t xgpu_nv_request_reset +ffffffff8206b690 t xgpu_nv_mailbox_trans_msg +ffffffff8206b8c0 t xgpu_nv_ras_poison_handler +ffffffff8206b8e0 t xgpu_nv_set_mailbox_ack_irq +ffffffff8206b970 t xgpu_nv_mailbox_ack_irq +ffffffff8206b9d0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff8206ba60 t xgpu_nv_mailbox_rcv_irq +ffffffff8206bb30 t xgpu_nv_send_access_requests +ffffffff8206c000 T xgpu_vi_init_golden_registers +ffffffff8206c0f0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff8206c140 T xgpu_vi_mailbox_add_irq_id +ffffffff8206c1f0 T xgpu_vi_mailbox_get_irq +ffffffff8206c2c0 t xgpu_vi_mailbox_flr_work +ffffffff8206c460 T xgpu_vi_mailbox_put_irq +ffffffff8206c4a0 t xgpu_vi_request_full_gpu_access +ffffffff8206c4c0 t xgpu_vi_release_full_gpu_access +ffffffff8206c4e0 t xgpu_vi_request_reset +ffffffff8206c500 t xgpu_vi_wait_reset_cmpl +ffffffff8206c640 t xgpu_vi_set_mailbox_ack_irq +ffffffff8206c6d0 t xgpu_vi_mailbox_ack_irq +ffffffff8206c730 t xgpu_vi_set_mailbox_rcv_irq +ffffffff8206c7c0 t xgpu_vi_mailbox_rcv_irq +ffffffff8206c890 t xgpu_vi_mailbox_rcv_msg +ffffffff8206c9f0 t xgpu_vi_send_access_requests +ffffffff8206d000 t navi10_ih_early_init +ffffffff8206d060 t navi10_ih_sw_init +ffffffff8206d1f0 t navi10_ih_sw_fini +ffffffff8206d230 t navi10_ih_hw_init +ffffffff8206d710 t navi10_ih_hw_fini +ffffffff8206d780 t navi10_ih_suspend +ffffffff8206d7f0 t navi10_ih_resume +ffffffff8206d800 t navi10_ih_is_idle +ffffffff8206d830 t navi10_ih_wait_for_idle +ffffffff8206d860 t navi10_ih_soft_reset +ffffffff8206d890 t navi10_ih_set_clockgating_state +ffffffff8206d9d0 t navi10_ih_set_powergating_state +ffffffff8206da00 t navi10_ih_get_clockgating_state +ffffffff8206daa0 t navi10_ih_get_wptr +ffffffff8206dc00 t navi10_ih_set_rptr +ffffffff8206dcf0 t navi10_ih_self_irq +ffffffff8206dd70 t navi10_ih_toggle_interrupts +ffffffff8206df00 t force_update_wptr_for_self_int +ffffffff8206f000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff8206f040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff8206f080 t nbio_v2_3_get_pcie_index_offset +ffffffff8206f0c0 t nbio_v2_3_get_pcie_data_offset +ffffffff8206f100 t nbio_v2_3_get_rev_id +ffffffff8206f160 t nbio_v2_3_mc_access_enable +ffffffff8206f210 t nbio_v2_3_get_memsize +ffffffff8206f280 t nbio_v2_3_sdma_doorbell_range +ffffffff8206f330 t nbio_v2_3_vcn_doorbell_range +ffffffff8206f3c0 t nbio_v2_3_enable_doorbell_aperture +ffffffff8206f4d0 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff8206f650 t nbio_v2_3_ih_doorbell_range +ffffffff8206f780 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff8206f830 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff8206f8e0 t nbio_v2_3_get_clockgating_state +ffffffff8206f970 t nbio_v2_3_ih_control +ffffffff8206fae0 t nbio_v2_3_init_registers +ffffffff8206fb80 t nbio_v2_3_remap_hdp_registers +ffffffff8206fca0 t nbio_v2_3_enable_aspm +ffffffff8206fd40 t nbio_v2_3_program_aspm +ffffffff820704c0 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff82070560 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff820705e0 t nbio_v2_3_clear_doorbell_interrupt +ffffffff82071000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff82071040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff82071080 t nbio_v4_3_get_pcie_index_offset +ffffffff820710b0 t nbio_v4_3_get_pcie_data_offset +ffffffff820710f0 t nbio_v4_3_get_rev_id +ffffffff82071190 t nbio_v4_3_mc_access_enable +ffffffff82071240 t nbio_v4_3_get_memsize +ffffffff820712b0 t nbio_v4_3_sdma_doorbell_range +ffffffff82071430 t nbio_v4_3_vcn_doorbell_range +ffffffff820715f0 t nbio_v4_3_gc_doorbell_init +ffffffff82071700 t nbio_v4_3_enable_doorbell_aperture +ffffffff82071810 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff82071990 t nbio_v4_3_ih_doorbell_range +ffffffff82071ac0 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff82071c10 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff82071d50 t nbio_v4_3_get_clockgating_state +ffffffff82071e90 t nbio_v4_3_ih_control +ffffffff82072000 t nbio_v4_3_init_registers +ffffffff82072140 t nbio_v4_3_remap_hdp_registers +ffffffff82072260 t nbio_v4_3_program_aspm +ffffffff82073090 t nbio_v4_3_get_rom_offset +ffffffff82073130 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff82073160 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff82073190 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff820731c0 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff820731f0 t nbio_v4_3_handle_ras_err_event_athub_intr_no_bifring +ffffffff82073330 t nbio_v4_3_init_ras_err_event_athub_interrupt +ffffffff82073370 t nbio_v4_3_set_ras_err_event_athub_irq_state +ffffffff82073490 t nbio_v4_3_process_err_event_athub_irq +ffffffff82074000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff82074040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff82074080 t nbio_v6_1_get_pcie_index_offset +ffffffff820740c0 t nbio_v6_1_get_pcie_data_offset +ffffffff82074100 t nbio_v6_1_get_rev_id +ffffffff820741a0 t nbio_v6_1_mc_access_enable +ffffffff82074250 t nbio_v6_1_get_memsize +ffffffff820742c0 t nbio_v6_1_sdma_doorbell_range +ffffffff82074360 t nbio_v6_1_enable_doorbell_aperture +ffffffff82074470 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff820745f0 t nbio_v6_1_ih_doorbell_range +ffffffff82074720 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff820747d0 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff82074880 t nbio_v6_1_get_clockgating_state +ffffffff82074910 t nbio_v6_1_ih_control +ffffffff82074a80 t nbio_v6_1_init_registers +ffffffff82074b60 t nbio_v6_1_remap_hdp_registers +ffffffff82074c80 t nbio_v6_1_program_aspm +ffffffff82076000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff82076040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff82076080 t nbio_v7_0_get_pcie_index_offset +ffffffff820760c0 t nbio_v7_0_get_pcie_data_offset +ffffffff82076100 t nbio_v7_0_get_rev_id +ffffffff820761a0 t nbio_v7_0_mc_access_enable +ffffffff82076250 t nbio_v7_0_get_memsize +ffffffff820762c0 t nbio_v7_0_sdma_doorbell_range +ffffffff82076360 t nbio_v7_0_vcn_doorbell_range +ffffffff820763e0 t nbio_v7_0_enable_doorbell_aperture +ffffffff820764f0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff82076520 t nbio_v7_0_ih_doorbell_range +ffffffff82076650 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff82076790 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff82076840 t nbio_v7_0_get_clockgating_state +ffffffff820768d0 t nbio_v7_0_ih_control +ffffffff82076a40 t nbio_v7_0_init_registers +ffffffff82076a90 t nbio_v7_0_remap_hdp_registers +ffffffff82076bb0 t nbio_7_0_read_syshub_ind_mmr +ffffffff82076c90 t nbio_7_0_write_syshub_ind_mmr +ffffffff82077000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff82077040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff82077080 t nbio_v7_2_get_pcie_index_offset +ffffffff820770c0 t nbio_v7_2_get_pcie_data_offset +ffffffff82077100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff82077130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff82077170 t nbio_v7_2_get_rev_id +ffffffff82077260 t nbio_v7_2_mc_access_enable +ffffffff820773a0 t nbio_v7_2_get_memsize +ffffffff82077410 t nbio_v7_2_sdma_doorbell_range +ffffffff820774b0 t nbio_v7_2_vcn_doorbell_range +ffffffff82077540 t nbio_v7_2_enable_doorbell_aperture +ffffffff82077630 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff820777b0 t nbio_v7_2_ih_doorbell_range +ffffffff82077840 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff82077900 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff82077ab0 t nbio_v7_2_get_clockgating_state +ffffffff82077b50 t nbio_v7_2_ih_control +ffffffff82077cc0 t nbio_v7_2_init_registers +ffffffff82077ea0 t nbio_v7_2_remap_hdp_registers +ffffffff82078000 t nbio_v7_4_query_ras_error_count +ffffffff820781d0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff82078480 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff82078650 t nbio_v7_4_init_ras_controller_interrupt +ffffffff82078690 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff820786d0 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff82078710 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff82078750 t nbio_v7_4_get_pcie_index_offset +ffffffff82078790 t nbio_v7_4_get_pcie_data_offset +ffffffff820787d0 t nbio_v7_4_get_rev_id +ffffffff820788b0 t nbio_v7_4_mc_access_enable +ffffffff82078960 t nbio_v7_4_get_memsize +ffffffff820789d0 t nbio_v7_4_sdma_doorbell_range +ffffffff82078aa0 t nbio_v7_4_vcn_doorbell_range +ffffffff82078b50 t nbio_v7_4_enable_doorbell_aperture +ffffffff82078c60 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff82078de0 t nbio_v7_4_ih_doorbell_range +ffffffff82078f10 t nbio_v7_4_enable_doorbell_interrupt +ffffffff82079070 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff820790a0 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff82079150 t nbio_v7_4_get_clockgating_state +ffffffff820791e0 t nbio_v7_4_ih_control +ffffffff82079350 t nbio_v7_4_init_registers +ffffffff82079450 t nbio_v7_4_remap_hdp_registers +ffffffff82079570 t nbio_v7_4_program_aspm +ffffffff82079a20 t nbio_v7_4_set_ras_controller_irq_state +ffffffff82079bd0 t nbio_v7_4_process_ras_controller_irq +ffffffff82079c00 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff82079db0 t nbio_v7_4_process_err_event_athub_irq +ffffffff8207a000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff8207a040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff8207a080 t nbio_v7_7_get_pcie_index_offset +ffffffff8207a0c0 t nbio_v7_7_get_pcie_data_offset +ffffffff8207a100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff8207a130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff8207a170 t nbio_v7_7_get_rev_id +ffffffff8207a210 t nbio_v7_7_mc_access_enable +ffffffff8207a2c0 t nbio_v7_7_get_memsize +ffffffff8207a330 t nbio_v7_7_sdma_doorbell_range +ffffffff8207a3d0 t nbio_v7_7_vcn_doorbell_range +ffffffff8207a460 t nbio_v7_7_enable_doorbell_aperture +ffffffff8207a550 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff8207a6d0 t nbio_v7_7_ih_doorbell_range +ffffffff8207a800 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff8207a950 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff8207ab80 t nbio_v7_7_get_clockgating_state +ffffffff8207acc0 t nbio_v7_7_ih_control +ffffffff8207ae30 t nbio_v7_7_init_registers +ffffffff8207af50 t nbio_v7_7_remap_hdp_registers +ffffffff8207c000 t nbio_v7_9_get_hdp_flush_req_offset +ffffffff8207c040 t nbio_v7_9_get_hdp_flush_done_offset +ffffffff8207c080 t nbio_v7_9_get_pcie_index_offset +ffffffff8207c0c0 t nbio_v7_9_get_pcie_data_offset +ffffffff8207c100 t nbio_v7_9_get_pcie_index_hi_offset +ffffffff8207c140 t nbio_v7_9_get_rev_id +ffffffff8207c1e0 t nbio_v7_9_mc_access_enable +ffffffff8207c290 t nbio_v7_9_get_memsize +ffffffff8207c300 t nbio_v7_9_sdma_doorbell_range +ffffffff8207c680 t nbio_v7_9_vcn_doorbell_range +ffffffff8207c840 t nbio_v7_9_enable_doorbell_aperture +ffffffff8207c9d0 t nbio_v7_9_enable_doorbell_selfring_aperture +ffffffff8207cb50 t nbio_v7_9_ih_doorbell_range +ffffffff8207cc70 t nbio_v7_9_enable_doorbell_interrupt +ffffffff8207cd90 t nbio_v7_9_update_medium_grain_clock_gating +ffffffff8207cdc0 t nbio_v7_9_update_medium_grain_light_sleep +ffffffff8207cdf0 t nbio_v7_9_get_clockgating_state +ffffffff8207ce20 t nbio_v7_9_ih_control +ffffffff8207cf90 t nbio_v7_9_init_registers +ffffffff8207d320 t nbio_v7_9_remap_hdp_registers +ffffffff8207d440 t nbio_v7_9_get_compute_partition_mode +ffffffff8207d4e0 t nbio_v7_9_get_memory_partition_mode +ffffffff8207d5e0 t nbio_v7_9_get_pcie_replay_count +ffffffff8207d640 t nbio_v7_9_get_pcie_usage +ffffffff8207d800 t nbio_v7_9_query_ras_error_count +ffffffff8207d830 t nbio_v7_9_handle_ras_controller_intr_no_bifring +ffffffff8207d980 t nbio_v7_9_handle_ras_err_event_athub_intr_no_bifring +ffffffff8207dac0 t nbio_v7_9_init_ras_controller_interrupt +ffffffff8207db00 t nbio_v7_9_init_ras_err_event_athub_interrupt +ffffffff8207db40 t nbio_v7_9_set_ras_controller_irq_state +ffffffff8207db70 t nbio_v7_9_process_ras_controller_irq +ffffffff8207dba0 t nbio_v7_9_set_ras_err_event_athub_irq_state +ffffffff8207dbd0 t nbio_v7_9_process_err_event_athub_irq +ffffffff8207e000 T nv_grbm_select +ffffffff8207e0a0 T nv_set_virt_ops +ffffffff8207e0e0 t nv_common_early_init +ffffffff8207e4e0 t nv_common_late_init +ffffffff8207e5a0 t nv_common_sw_init +ffffffff8207e5f0 t nv_common_sw_fini +ffffffff8207e620 t nv_common_hw_init +ffffffff8207e750 t nv_common_hw_fini +ffffffff8207e7c0 t nv_common_suspend +ffffffff8207e830 t nv_common_resume +ffffffff8207e870 t nv_common_is_idle +ffffffff8207e8a0 t nv_common_wait_for_idle +ffffffff8207e8d0 t nv_common_soft_reset +ffffffff8207e900 t nv_common_set_clockgating_state +ffffffff8207e9f0 t nv_common_set_powergating_state +ffffffff8207ea20 t nv_common_get_clockgating_state +ffffffff8207eaa0 t nv_didt_rreg +ffffffff8207eb60 t nv_didt_wreg +ffffffff8207ec00 t nv_read_disabled_bios +ffffffff8207ec30 t nv_read_register +ffffffff8207ed30 t nv_asic_reset +ffffffff8207eec0 t nv_asic_reset_method +ffffffff8207efc0 t nv_get_xclk +ffffffff8207eff0 t nv_set_uvd_clocks +ffffffff8207f020 t nv_set_vce_clocks +ffffffff8207f050 t nv_get_config_memsize +ffffffff8207f070 t nv_need_full_reset +ffffffff8207f0a0 t nv_init_doorbell_index +ffffffff8207f1d0 t nv_need_reset_on_init +ffffffff8207f280 t nv_pre_asic_init +ffffffff8207f2b0 t nv_update_umd_stable_pstate +ffffffff8207f380 t nv_query_video_codecs +ffffffff82080000 T psp_v10_0_set_psp_funcs +ffffffff82080030 t psp_v10_0_init_microcode +ffffffff82080120 t psp_v10_0_ring_create +ffffffff82080510 t psp_v10_0_ring_stop +ffffffff820807c0 t psp_v10_0_ring_destroy +ffffffff82080850 t psp_v10_0_mode1_reset +ffffffff820808a0 t psp_v10_0_ring_get_wptr +ffffffff82080900 t psp_v10_0_ring_set_wptr +ffffffff82081000 T psp_v11_0_set_psp_funcs +ffffffff82081030 t psp_v11_0_init_microcode +ffffffff820811e0 t psp_v11_0_bootloader_load_kdb +ffffffff82081200 t psp_v11_0_bootloader_load_spl +ffffffff82081220 t psp_v11_0_bootloader_load_sysdrv +ffffffff82081240 t psp_v11_0_bootloader_load_sos +ffffffff82081690 t psp_v11_0_ring_create +ffffffff82081f10 t psp_v11_0_ring_stop +ffffffff820821f0 t psp_v11_0_ring_destroy +ffffffff82082280 t psp_v11_0_mode1_reset +ffffffff820823b0 t psp_v11_0_memory_training +ffffffff82082940 t psp_v11_0_ring_get_wptr +ffffffff82082990 t psp_v11_0_ring_set_wptr +ffffffff82082af0 t psp_v11_0_load_usbc_pd_fw +ffffffff82082d20 t psp_v11_0_read_usbc_pd_fw +ffffffff82082e60 t psp_v11_0_bootloader_load_component +ffffffff82083050 t psp_v11_0_wait_for_bootloader +ffffffff82083270 t psp_v11_0_memory_training_send_msg +ffffffff82084000 T psp_v11_0_8_set_psp_funcs +ffffffff82084030 t psp_v11_0_8_ring_create +ffffffff820848b0 t psp_v11_0_8_ring_stop +ffffffff82084db0 t psp_v11_0_8_ring_destroy +ffffffff82084e40 t psp_v11_0_8_ring_get_wptr +ffffffff82084eb0 t psp_v11_0_8_ring_set_wptr +ffffffff82085000 T psp_v12_0_set_psp_funcs +ffffffff82085030 t psp_v12_0_init_microcode +ffffffff82085100 t psp_v12_0_bootloader_load_sysdrv +ffffffff82085520 t psp_v12_0_bootloader_load_sos +ffffffff82085990 t psp_v12_0_ring_create +ffffffff82086670 t psp_v12_0_ring_stop +ffffffff82086950 t psp_v12_0_ring_destroy +ffffffff820869e0 t psp_v12_0_mode1_reset +ffffffff82086b10 t psp_v12_0_ring_get_wptr +ffffffff82086b80 t psp_v12_0_ring_set_wptr +ffffffff82087000 T psp_v13_0_set_psp_funcs +ffffffff82087030 t psp_v13_0_init_microcode +ffffffff82087160 t psp_v13_0_wait_for_bootloader_steady_state +ffffffff82087290 t psp_v13_0_bootloader_load_kdb +ffffffff820872b0 t psp_v13_0_bootloader_load_spl +ffffffff820872d0 t psp_v13_0_bootloader_load_sysdrv +ffffffff820872f0 t psp_v13_0_bootloader_load_soc_drv +ffffffff82087310 t psp_v13_0_bootloader_load_intf_drv +ffffffff82087330 t psp_v13_0_bootloader_load_dbg_drv +ffffffff82087350 t psp_v13_0_bootloader_load_ras_drv +ffffffff82087370 t psp_v13_0_bootloader_load_sos +ffffffff82087830 t psp_v13_0_ring_create +ffffffff820880b0 t psp_v13_0_ring_stop +ffffffff820885b0 t psp_v13_0_ring_destroy +ffffffff82088640 t psp_v13_0_memory_training +ffffffff82088b20 t psp_v13_0_ring_get_wptr +ffffffff82088b90 t psp_v13_0_ring_set_wptr +ffffffff82088ca0 t psp_v13_0_load_usbc_pd_fw +ffffffff82088ed0 t psp_v13_0_read_usbc_pd_fw +ffffffff82089010 t psp_v13_0_update_spirom +ffffffff82089230 t psp_v13_0_vbflash_status +ffffffff82089290 t psp_v13_0_fatal_error_recovery_quirk +ffffffff820893f0 t psp_v13_0_bootloader_load_component +ffffffff820896b0 t psp_v13_0_memory_training_send_msg +ffffffff82089830 t psp_v13_0_exec_spi_cmd +ffffffff8208a000 T psp_v13_0_4_set_psp_funcs +ffffffff8208a030 t psp_v13_0_4_init_microcode +ffffffff8208a0f0 t psp_v13_0_4_bootloader_load_kdb +ffffffff8208a110 t psp_v13_0_4_bootloader_load_spl +ffffffff8208a130 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff8208a150 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff8208a170 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff8208a190 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff8208a1b0 t psp_v13_0_4_bootloader_load_sos +ffffffff8208a620 t psp_v13_0_4_ring_create +ffffffff8208aeb0 t psp_v13_0_4_ring_stop +ffffffff8208b3c0 t psp_v13_0_4_ring_destroy +ffffffff8208b450 t psp_v13_0_4_ring_get_wptr +ffffffff8208b4c0 t psp_v13_0_4_ring_set_wptr +ffffffff8208b5e0 t psp_v13_0_4_bootloader_load_component +ffffffff8208b7f0 t psp_v13_0_4_wait_for_bootloader +ffffffff8208c000 T psp_v3_1_set_psp_funcs +ffffffff8208c030 t psp_v3_1_init_microcode +ffffffff8208c0f0 t psp_v3_1_bootloader_load_sysdrv +ffffffff8208c510 t psp_v3_1_bootloader_load_sos +ffffffff8208c980 t psp_v3_1_ring_create +ffffffff8208d840 t psp_v3_1_ring_stop +ffffffff8208db20 t psp_v3_1_ring_destroy +ffffffff8208dbb0 t psp_v3_1_smu_reload_quirk +ffffffff8208dc00 t psp_v3_1_mode1_reset +ffffffff8208dd30 t psp_v3_1_ring_get_wptr +ffffffff8208dd80 t psp_v3_1_ring_set_wptr +ffffffff8208e000 t sdma_v2_4_early_init +ffffffff8208e0f0 t sdma_v2_4_sw_init +ffffffff8208e520 t sdma_v2_4_sw_fini +ffffffff8208e5f0 t sdma_v2_4_hw_init +ffffffff8208eaa0 t sdma_v2_4_hw_fini +ffffffff8208eaf0 t sdma_v2_4_suspend +ffffffff8208eb40 t sdma_v2_4_resume +ffffffff8208eb50 t sdma_v2_4_is_idle +ffffffff8208eba0 t sdma_v2_4_wait_for_idle +ffffffff8208ec50 t sdma_v2_4_soft_reset +ffffffff8208ee00 t sdma_v2_4_set_clockgating_state +ffffffff8208ee30 t sdma_v2_4_set_powergating_state +ffffffff8208ee60 t sdma_v2_4_ring_get_rptr +ffffffff8208eea0 t sdma_v2_4_ring_get_wptr +ffffffff8208ef00 t sdma_v2_4_ring_set_wptr +ffffffff8208ef40 t sdma_v2_4_ring_emit_ib +ffffffff8208f220 t sdma_v2_4_ring_emit_fence +ffffffff8208f670 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff8208f920 t sdma_v2_4_ring_emit_vm_flush +ffffffff8208fbd0 t sdma_v2_4_ring_emit_hdp_flush +ffffffff8208fe80 t sdma_v2_4_ring_test_ring +ffffffff820901b0 t sdma_v2_4_ring_test_ib +ffffffff820903c0 t sdma_v2_4_ring_insert_nop +ffffffff82090500 t sdma_v2_4_ring_pad_ib +ffffffff82090630 t sdma_v2_4_ring_emit_wreg +ffffffff82090790 t sdma_v2_4_emit_copy_buffer +ffffffff82090850 t sdma_v2_4_emit_fill_buffer +ffffffff820908e0 t sdma_v2_4_vm_copy_pte +ffffffff820909a0 t sdma_v2_4_vm_write_pte +ffffffff82090a70 t sdma_v2_4_vm_set_pte_pde +ffffffff82090b70 t sdma_v2_4_set_trap_irq_state +ffffffff82090c60 t sdma_v2_4_process_trap_irq +ffffffff82090d00 t sdma_v2_4_process_illegal_inst_irq +ffffffff82090d80 t sdma_v2_4_enable +ffffffff82091000 t sdma_v3_0_early_init +ffffffff82091100 t sdma_v3_0_sw_init +ffffffff82091530 t sdma_v3_0_sw_fini +ffffffff82091600 t sdma_v3_0_hw_init +ffffffff82091770 t sdma_v3_0_hw_fini +ffffffff820917d0 t sdma_v3_0_suspend +ffffffff82091830 t sdma_v3_0_resume +ffffffff82091840 t sdma_v3_0_is_idle +ffffffff82091890 t sdma_v3_0_wait_for_idle +ffffffff82091940 t sdma_v3_0_check_soft_reset +ffffffff820919a0 t sdma_v3_0_pre_soft_reset +ffffffff82091a00 t sdma_v3_0_soft_reset +ffffffff82091b00 t sdma_v3_0_post_soft_reset +ffffffff82091b50 t sdma_v3_0_set_clockgating_state +ffffffff82091e00 t sdma_v3_0_set_powergating_state +ffffffff82091e30 t sdma_v3_0_get_clockgating_state +ffffffff82091ed0 t sdma_v3_0_ring_get_rptr +ffffffff82091f10 t sdma_v3_0_ring_get_wptr +ffffffff82091f90 t sdma_v3_0_ring_set_wptr +ffffffff82092040 t sdma_v3_0_ring_emit_ib +ffffffff82092320 t sdma_v3_0_ring_emit_fence +ffffffff82092770 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff82092a20 t sdma_v3_0_ring_emit_vm_flush +ffffffff82092cd0 t sdma_v3_0_ring_emit_hdp_flush +ffffffff82092f80 t sdma_v3_0_ring_test_ring +ffffffff820932b0 t sdma_v3_0_ring_test_ib +ffffffff820934c0 t sdma_v3_0_ring_insert_nop +ffffffff82093600 t sdma_v3_0_ring_pad_ib +ffffffff82093730 t sdma_v3_0_ring_emit_wreg +ffffffff82093890 t sdma_v3_0_emit_copy_buffer +ffffffff82093950 t sdma_v3_0_emit_fill_buffer +ffffffff820939e0 t sdma_v3_0_vm_copy_pte +ffffffff82093aa0 t sdma_v3_0_vm_write_pte +ffffffff82093b70 t sdma_v3_0_vm_set_pte_pde +ffffffff82093c70 t sdma_v3_0_set_trap_irq_state +ffffffff82093d60 t sdma_v3_0_process_trap_irq +ffffffff82093e00 t sdma_v3_0_process_illegal_inst_irq +ffffffff82093e80 t sdma_v3_0_ctx_switch_enable +ffffffff82094050 t sdma_v3_0_enable +ffffffff82094200 t sdma_v3_0_gfx_resume +ffffffff82095000 t sdma_v4_0_early_init +ffffffff820952f0 t sdma_v4_0_late_init +ffffffff820955b0 t sdma_v4_0_sw_init +ffffffff82095a60 t sdma_v4_0_sw_fini +ffffffff82095b30 t sdma_v4_0_hw_init +ffffffff82098cf0 t sdma_v4_0_hw_fini +ffffffff82098df0 t sdma_v4_0_suspend +ffffffff82098e50 t sdma_v4_0_resume +ffffffff82098ee0 t sdma_v4_0_is_idle +ffffffff82099010 t sdma_v4_0_wait_for_idle +ffffffff820991c0 t sdma_v4_0_soft_reset +ffffffff820991f0 t sdma_v4_0_set_clockgating_state +ffffffff82099720 t sdma_v4_0_set_powergating_state +ffffffff82099800 t sdma_v4_0_get_clockgating_state +ffffffff820998b0 t sdma_v4_0_query_ras_error_count +ffffffff82099aa0 t sdma_v4_0_reset_ras_error_count +ffffffff82099c20 t sdma_v4_0_ring_get_rptr +ffffffff82099c80 t sdma_v4_0_ring_get_wptr +ffffffff82099e90 t sdma_v4_0_ring_set_wptr +ffffffff8209a140 t sdma_v4_0_ring_emit_ib +ffffffff8209a420 t sdma_v4_0_ring_emit_fence +ffffffff8209a890 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff8209a8f0 t sdma_v4_0_ring_emit_vm_flush +ffffffff8209a910 t sdma_v4_0_ring_emit_hdp_flush +ffffffff8209a9d0 t sdma_v4_0_ring_test_ring +ffffffff8209ad00 t sdma_v4_0_ring_test_ib +ffffffff8209af10 t sdma_v4_0_ring_insert_nop +ffffffff8209b050 t sdma_v4_0_ring_pad_ib +ffffffff8209b180 t sdma_v4_0_ring_emit_wreg +ffffffff8209b2e0 t sdma_v4_0_ring_emit_reg_wait +ffffffff8209b330 t sdma_v4_0_wait_reg_mem +ffffffff8209b680 t sdma_v4_0_page_ring_get_wptr +ffffffff8209b840 t sdma_v4_0_page_ring_set_wptr +ffffffff8209ba10 t sdma_v4_0_emit_copy_buffer +ffffffff8209bad0 t sdma_v4_0_emit_fill_buffer +ffffffff8209bb60 t sdma_v4_0_vm_copy_pte +ffffffff8209bc20 t sdma_v4_0_vm_write_pte +ffffffff8209bcf0 t sdma_v4_0_vm_set_pte_pde +ffffffff8209bdf0 t sdma_v4_0_set_trap_irq_state +ffffffff8209bfa0 t sdma_v4_0_process_trap_irq +ffffffff8209c0e0 t sdma_v4_0_process_illegal_inst_irq +ffffffff8209c200 t sdma_v4_0_set_ecc_irq_state +ffffffff8209c3b0 t sdma_v4_0_process_vm_hole_irq +ffffffff8209c400 t sdma_v4_0_print_iv_entry +ffffffff8209c550 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff8209c5a0 t sdma_v4_0_process_pool_timeout_irq +ffffffff8209c5f0 t sdma_v4_0_process_srbm_write_irq +ffffffff8209c640 t sdma_v4_0_process_ras_data_cb +ffffffff8209c6c0 t sdma_v4_0_ctx_switch_enable +ffffffff8209cde0 t sdma_v4_0_enable +ffffffff8209d3d0 t sdma_v4_0_gfx_enable +ffffffff8209e000 t sdma_v4_4_query_ras_error_count +ffffffff8209e2b0 t sdma_v4_4_reset_ras_error_count +ffffffff8209f000 t sdma_v4_4_2_early_init +ffffffff8209f2b0 t sdma_v4_4_2_late_init +ffffffff8209f340 t sdma_v4_4_2_sw_init +ffffffff8209f920 t sdma_v4_4_2_sw_fini +ffffffff8209f9f0 t sdma_v4_4_2_hw_init +ffffffff8209fa40 t sdma_v4_4_2_hw_fini +ffffffff8209fb20 t sdma_v4_4_2_suspend +ffffffff8209fc30 t sdma_v4_4_2_resume +ffffffff8209fc80 t sdma_v4_4_2_is_idle +ffffffff8209fd30 t sdma_v4_4_2_wait_for_idle +ffffffff8209fe60 t sdma_v4_4_2_soft_reset +ffffffff8209fe90 t sdma_v4_4_2_set_clockgating_state +ffffffff820a0350 t sdma_v4_4_2_set_powergating_state +ffffffff820a0380 t sdma_v4_4_2_get_clockgating_state +ffffffff820a0480 t sdma_v4_4_2_xcp_suspend +ffffffff820a0570 t sdma_v4_4_2_xcp_resume +ffffffff820a05b0 t sdma_v4_4_2_ring_get_rptr +ffffffff820a0630 t sdma_v4_4_2_ring_get_wptr +ffffffff820a0790 t sdma_v4_4_2_ring_set_wptr +ffffffff820a0990 t sdma_v4_4_2_ring_emit_ib +ffffffff820a0c70 t sdma_v4_4_2_ring_emit_fence +ffffffff820a10e0 t sdma_v4_4_2_ring_emit_pipeline_sync +ffffffff820a1140 t sdma_v4_4_2_ring_emit_vm_flush +ffffffff820a1160 t sdma_v4_4_2_ring_emit_hdp_flush +ffffffff820a1230 t sdma_v4_4_2_ring_test_ring +ffffffff820a1560 t sdma_v4_4_2_ring_test_ib +ffffffff820a1770 t sdma_v4_4_2_ring_insert_nop +ffffffff820a18b0 t sdma_v4_4_2_ring_pad_ib +ffffffff820a19e0 t sdma_v4_4_2_ring_emit_wreg +ffffffff820a1b40 t sdma_v4_4_2_ring_emit_reg_wait +ffffffff820a1b90 t sdma_v4_4_2_wait_reg_mem +ffffffff820a1ee0 t sdma_v4_4_2_page_ring_get_wptr +ffffffff820a2000 t sdma_v4_4_2_page_ring_set_wptr +ffffffff820a2130 t sdma_v4_4_2_emit_copy_buffer +ffffffff820a21f0 t sdma_v4_4_2_emit_fill_buffer +ffffffff820a2280 t sdma_v4_4_2_vm_copy_pte +ffffffff820a2340 t sdma_v4_4_2_vm_write_pte +ffffffff820a2410 t sdma_v4_4_2_vm_set_pte_pde +ffffffff820a2510 t sdma_v4_4_2_set_trap_irq_state +ffffffff820a2610 t sdma_v4_4_2_process_trap_irq +ffffffff820a2740 t sdma_v4_4_2_process_illegal_inst_irq +ffffffff820a27e0 t sdma_v4_4_2_set_ecc_irq_state +ffffffff820a28f0 t sdma_v4_4_2_process_vm_hole_irq +ffffffff820a29e0 t sdma_v4_4_2_process_doorbell_invalid_irq +ffffffff820a2ad0 t sdma_v4_4_2_process_pool_timeout_irq +ffffffff820a2bc0 t sdma_v4_4_2_process_srbm_write_irq +ffffffff820a2cb0 t sdma_v4_4_2_query_ras_error_count +ffffffff820a2e30 t sdma_v4_4_2_reset_ras_error_count +ffffffff820a2fa0 t sdma_v4_4_2_inst_init_golden_registers +ffffffff820a3170 t sdma_v4_4_2_inst_start +ffffffff820a49a0 t sdma_v4_4_2_inst_ctx_switch_enable +ffffffff820a4cf0 t sdma_v4_4_2_inst_enable +ffffffff820a6000 t sdma_v5_0_early_init +ffffffff820a6130 t sdma_v5_0_sw_init +ffffffff820a6350 t sdma_v5_0_sw_fini +ffffffff820a63f0 t sdma_v5_0_hw_init +ffffffff820a78c0 t sdma_v5_0_hw_fini +ffffffff820a7930 t sdma_v5_0_suspend +ffffffff820a79a0 t sdma_v5_0_resume +ffffffff820a79b0 t sdma_v5_0_is_idle +ffffffff820a7a50 t sdma_v5_0_wait_for_idle +ffffffff820a7b30 t sdma_v5_0_soft_reset +ffffffff820a7b60 t sdma_v5_0_set_clockgating_state +ffffffff820a7d80 t sdma_v5_0_set_powergating_state +ffffffff820a7db0 t sdma_v5_0_get_clockgating_state +ffffffff820a7e60 t sdma_v5_0_ring_get_rptr +ffffffff820a7ec0 t sdma_v5_0_ring_get_wptr +ffffffff820a8080 t sdma_v5_0_ring_set_wptr +ffffffff820a8430 t sdma_v5_0_ring_emit_ib +ffffffff820a8730 t sdma_v5_0_ring_emit_fence +ffffffff820a8be0 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff820a8e90 t sdma_v5_0_ring_emit_vm_flush +ffffffff820a8eb0 t sdma_v5_0_ring_emit_hdp_flush +ffffffff820a9180 t sdma_v5_0_ring_test_ring +ffffffff820a95b0 t sdma_v5_0_ring_test_ib +ffffffff820a9940 t sdma_v5_0_ring_insert_nop +ffffffff820a9a80 t sdma_v5_0_ring_pad_ib +ffffffff820a9bb0 t sdma_v5_0_ring_init_cond_exec +ffffffff820a9e00 t sdma_v5_0_ring_patch_cond_exec +ffffffff820a9ec0 t sdma_v5_0_ring_emit_wreg +ffffffff820aa020 t sdma_v5_0_ring_emit_reg_wait +ffffffff820aa2c0 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff820aa350 t sdma_v5_0_ring_preempt_ib +ffffffff820aa4e0 t sdma_v5_0_ring_emit_mem_sync +ffffffff820aa710 t sdma_v5_0_emit_copy_buffer +ffffffff820aa7d0 t sdma_v5_0_emit_fill_buffer +ffffffff820aa860 t sdma_v5_0_vm_copy_pte +ffffffff820aa920 t sdma_v5_0_vm_write_pte +ffffffff820aa9f0 t sdma_v5_0_vm_set_pte_pde +ffffffff820aaaf0 t sdma_v5_0_set_trap_irq_state +ffffffff820aab90 t sdma_v5_0_process_trap_irq +ffffffff820aacd0 t sdma_v5_0_process_illegal_inst_irq +ffffffff820aad00 t sdma_v5_0_mqd_init +ffffffff820aadf0 t sdma_v5_0_ctx_switch_enable +ffffffff820ab170 t sdma_v5_0_enable +ffffffff820ac000 t sdma_v5_2_early_init +ffffffff820ac130 t sdma_v5_2_sw_init +ffffffff820ac3f0 t sdma_v5_2_sw_fini +ffffffff820ac490 t sdma_v5_2_hw_init +ffffffff820ae2c0 t sdma_v5_2_hw_fini +ffffffff820ae330 t sdma_v5_2_suspend +ffffffff820ae3a0 t sdma_v5_2_resume +ffffffff820ae3b0 t sdma_v5_2_is_idle +ffffffff820ae470 t sdma_v5_2_wait_for_idle +ffffffff820ae5a0 t sdma_v5_2_soft_reset +ffffffff820ae8c0 t sdma_v5_2_set_clockgating_state +ffffffff820aec60 t sdma_v5_2_set_powergating_state +ffffffff820aec90 t sdma_v5_2_get_clockgating_state +ffffffff820aed40 t sdma_v5_2_ring_get_rptr +ffffffff820aeda0 t sdma_v5_2_ring_get_wptr +ffffffff820aeef0 t sdma_v5_2_ring_set_wptr +ffffffff820af0d0 t sdma_v5_2_ring_emit_ib +ffffffff820af3d0 t sdma_v5_2_ring_emit_fence +ffffffff820af880 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff820afb30 t sdma_v5_2_ring_emit_vm_flush +ffffffff820afb50 t sdma_v5_2_ring_emit_hdp_flush +ffffffff820afe50 t sdma_v5_2_ring_test_ring +ffffffff820b0280 t sdma_v5_2_ring_test_ib +ffffffff820b0610 t sdma_v5_2_ring_insert_nop +ffffffff820b0750 t sdma_v5_2_ring_pad_ib +ffffffff820b0880 t sdma_v5_2_ring_init_cond_exec +ffffffff820b0ad0 t sdma_v5_2_ring_patch_cond_exec +ffffffff820b0b90 t sdma_v5_2_ring_begin_use +ffffffff820b0bb0 t sdma_v5_2_ring_end_use +ffffffff820b0bd0 t sdma_v5_2_ring_emit_wreg +ffffffff820b0d30 t sdma_v5_2_ring_emit_reg_wait +ffffffff820b0fd0 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff820b1060 t sdma_v5_2_ring_preempt_ib +ffffffff820b1220 t sdma_v5_2_ring_emit_mem_sync +ffffffff820b1450 t sdma_v5_2_emit_copy_buffer +ffffffff820b1510 t sdma_v5_2_emit_fill_buffer +ffffffff820b15a0 t sdma_v5_2_vm_copy_pte +ffffffff820b1660 t sdma_v5_2_vm_write_pte +ffffffff820b1730 t sdma_v5_2_vm_set_pte_pde +ffffffff820b1830 t sdma_v5_2_set_trap_irq_state +ffffffff820b18f0 t sdma_v5_2_process_trap_irq +ffffffff820b1a60 t sdma_v5_2_process_illegal_inst_irq +ffffffff820b1a90 t sdma_v5_2_mqd_init +ffffffff820b1b80 t sdma_v5_2_ctx_switch_enable +ffffffff820b1fd0 t sdma_v5_2_enable +ffffffff820b3000 t sdma_v6_0_early_init +ffffffff820b3120 t sdma_v6_0_sw_init +ffffffff820b3330 t sdma_v6_0_sw_fini +ffffffff820b33d0 t sdma_v6_0_hw_init +ffffffff820b33e0 t sdma_v6_0_hw_fini +ffffffff820b34d0 t sdma_v6_0_suspend +ffffffff820b3510 t sdma_v6_0_resume +ffffffff820b3520 t sdma_v6_0_is_idle +ffffffff820b35c0 t sdma_v6_0_wait_for_idle +ffffffff820b36a0 t sdma_v6_0_check_soft_reset +ffffffff820b3770 t sdma_v6_0_soft_reset +ffffffff820b3cc0 t sdma_v6_0_set_clockgating_state +ffffffff820b3cf0 t sdma_v6_0_set_powergating_state +ffffffff820b3d20 t sdma_v6_0_get_clockgating_state +ffffffff820b3d50 t sdma_v6_0_ring_get_rptr +ffffffff820b3db0 t sdma_v6_0_ring_get_wptr +ffffffff820b3e30 t sdma_v6_0_ring_set_wptr +ffffffff820b41e0 t sdma_v6_0_ring_emit_ib +ffffffff820b44e0 t sdma_v6_0_ring_emit_fence +ffffffff820b4990 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff820b4c40 t sdma_v6_0_ring_emit_vm_flush +ffffffff820b4ee0 t sdma_v6_0_ring_emit_hdp_flush +ffffffff820b51b0 t sdma_v6_0_ring_test_ring +ffffffff820b55e0 t sdma_v6_0_ring_test_ib +ffffffff820b5970 t sdma_v6_0_ring_insert_nop +ffffffff820b5ab0 t sdma_v6_0_ring_pad_ib +ffffffff820b5be0 t sdma_v6_0_ring_init_cond_exec +ffffffff820b5e30 t sdma_v6_0_ring_patch_cond_exec +ffffffff820b5ef0 t sdma_v6_0_ring_emit_wreg +ffffffff820b6050 t sdma_v6_0_ring_emit_reg_wait +ffffffff820b62f0 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff820b6380 t sdma_v6_0_ring_preempt_ib +ffffffff820b6510 t sdma_v6_0_ring_emit_mem_sync +ffffffff820b6740 t sdma_v6_0_emit_copy_buffer +ffffffff820b6800 t sdma_v6_0_emit_fill_buffer +ffffffff820b6890 t sdma_v6_0_vm_copy_pte +ffffffff820b6950 t sdma_v6_0_vm_write_pte +ffffffff820b6a20 t sdma_v6_0_vm_set_pte_pde +ffffffff820b6b20 t sdma_v6_0_set_trap_irq_state +ffffffff820b6bc0 t sdma_v6_0_process_trap_irq +ffffffff820b6d20 t sdma_v6_0_process_illegal_inst_irq +ffffffff820b6d50 t sdma_v6_0_mqd_init +ffffffff820b6e80 t sdma_v6_0_start +ffffffff820b71e0 t sdma_v6_0_enable +ffffffff820b7380 t sdma_v6_0_gfx_resume +ffffffff820b85c0 t sdma_v6_0_gfx_stop +ffffffff820b9000 T sienna_cichlid_reset_init +ffffffff820b90e0 t sienna_cichlid_async_reset +ffffffff820b9140 t sienna_cichlid_get_reset_handler +ffffffff820b91d0 T sienna_cichlid_reset_fini +ffffffff820b9230 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff820b93a0 t sienna_cichlid_mode2_perform_reset +ffffffff820b9430 t sienna_cichlid_mode2_restore_hwcontext +ffffffff820b97a0 t sienna_cichlid_mode2_reset +ffffffff820ba000 T smu_v11_0_i2c_control_init +ffffffff820ba0e0 T smu_v11_0_i2c_control_fini +ffffffff820ba120 t smu_v11_0_i2c_xfer +ffffffff820bb490 t smu_v11_0_i2c_func +ffffffff820bb4c0 t smu_v11_0_i2c_enable +ffffffff820bb620 t smu_v11_0_i2c_abort +ffffffff820bb740 t lock_bus +ffffffff820bb7f0 t trylock_bus +ffffffff820bb850 t unlock_bus +ffffffff820bc000 T smu_v13_0_10_reset_init +ffffffff820bc0e0 t smu_v13_0_10_async_reset +ffffffff820bc140 t smu_v13_0_10_get_reset_handler +ffffffff820bc1f0 T smu_v13_0_10_reset_fini +ffffffff820bc250 t smu_v13_0_10_mode2_prepare_hwcontext +ffffffff820bc3a0 t smu_v13_0_10_mode2_perform_reset +ffffffff820bc430 t smu_v13_0_10_mode2_restore_hwcontext +ffffffff820bc820 t smu_v13_0_10_mode2_reset +ffffffff820bd000 t smuio_v11_0_get_rom_index_offset +ffffffff820bd040 t smuio_v11_0_get_rom_data_offset +ffffffff820bd080 t smuio_v11_0_update_rom_clock_gating +ffffffff820bd1d0 t smuio_v11_0_get_clock_gating_state +ffffffff820be000 t smuio_v11_0_6_get_rom_index_offset +ffffffff820be040 t smuio_v11_0_6_get_rom_data_offset +ffffffff820be080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff820be1e0 t smuio_v11_0_6_get_clock_gating_state +ffffffff820bf000 t smuio_v13_0_get_rom_index_offset +ffffffff820bf040 t smuio_v13_0_get_rom_data_offset +ffffffff820bf080 t smuio_v13_0_update_rom_clock_gating +ffffffff820bf1e0 t smuio_v13_0_get_clock_gating_state +ffffffff820bf290 t smuio_v13_0_get_die_id +ffffffff820bf320 t smuio_v13_0_get_socket_id +ffffffff820bf3c0 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff820c0000 t smuio_v13_0_3_get_die_id +ffffffff820c00a0 t smuio_v13_0_3_get_socket_id +ffffffff820c0140 t smuio_v13_0_3_get_pkg_type +ffffffff820c1000 t smuio_v13_0_6_get_rom_index_offset +ffffffff820c1040 t smuio_v13_0_6_get_rom_data_offset +ffffffff820c2000 t smuio_v9_0_get_rom_index_offset +ffffffff820c2040 t smuio_v9_0_get_rom_data_offset +ffffffff820c2080 t smuio_v9_0_update_rom_clock_gating +ffffffff820c21e0 t smuio_v9_0_get_clock_gating_state +ffffffff820c3000 T soc15_grbm_select +ffffffff820c3090 T soc15_program_register_sequence +ffffffff820c32b0 T soc15_set_virt_ops +ffffffff820c3320 t soc15_common_early_init +ffffffff820c3750 t soc15_common_late_init +ffffffff820c37c0 t soc15_common_sw_init +ffffffff820c3820 t soc15_common_sw_fini +ffffffff820c3880 t soc15_common_hw_init +ffffffff820c39d0 t soc15_common_hw_fini +ffffffff820c3ad0 t soc15_common_suspend +ffffffff820c3b10 t soc15_common_resume +ffffffff820c3c00 t soc15_common_is_idle +ffffffff820c3c30 t soc15_common_wait_for_idle +ffffffff820c3c60 t soc15_common_soft_reset +ffffffff820c3c90 t soc15_common_set_clockgating_state +ffffffff820c4040 t soc15_common_set_powergating_state +ffffffff820c4070 t soc15_common_get_clockgating_state +ffffffff820c41b0 t soc15_uvd_ctx_rreg +ffffffff820c4280 t soc15_uvd_ctx_wreg +ffffffff820c4320 t soc15_didt_rreg +ffffffff820c43e0 t soc15_didt_wreg +ffffffff820c4480 t soc15_gc_cac_rreg +ffffffff820c45d0 t soc15_gc_cac_wreg +ffffffff820c4710 t soc15_se_cac_rreg +ffffffff820c4860 t soc15_se_cac_wreg +ffffffff820c49a0 t soc15_read_disabled_bios +ffffffff820c49d0 t soc15_read_register +ffffffff820c4ae0 t soc15_asic_reset +ffffffff820c4cb0 t soc15_asic_reset_method +ffffffff820c4e70 t soc15_get_xclk +ffffffff820c4ed0 t soc15_set_uvd_clocks +ffffffff820c4f00 t soc15_set_vce_clocks +ffffffff820c4f30 t soc15_get_config_memsize +ffffffff820c4f50 t soc15_need_full_reset +ffffffff820c4f80 t soc15_get_pcie_usage +ffffffff820c50f0 t soc15_need_reset_on_init +ffffffff820c51b0 t soc15_get_pcie_replay_count +ffffffff820c5230 t soc15_supports_baco +ffffffff820c5290 t soc15_pre_asic_init +ffffffff820c52a0 t soc15_query_video_codecs +ffffffff820c5390 t vega20_get_pcie_usage +ffffffff820c6000 T soc21_grbm_select +ffffffff820c6090 t soc21_common_early_init +ffffffff820c6210 t soc21_common_late_init +ffffffff820c6310 t soc21_common_sw_init +ffffffff820c6360 t soc21_common_sw_fini +ffffffff820c6390 t soc21_common_hw_init +ffffffff820c6470 t soc21_common_hw_fini +ffffffff820c6520 t soc21_common_suspend +ffffffff820c65d0 t soc21_common_resume +ffffffff820c67e0 t soc21_common_is_idle +ffffffff820c6810 t soc21_common_wait_for_idle +ffffffff820c6840 t soc21_common_soft_reset +ffffffff820c6870 t soc21_common_set_clockgating_state +ffffffff820c6930 t soc21_common_set_powergating_state +ffffffff820c69a0 t soc21_common_get_clockgating_state +ffffffff820c69f0 t soc21_didt_rreg +ffffffff820c6ab0 t soc21_didt_wreg +ffffffff820c6b50 t soc21_read_disabled_bios +ffffffff820c6b80 t soc21_read_register +ffffffff820c6c80 t soc21_asic_reset +ffffffff820c6d60 t soc21_asic_reset_method +ffffffff820c6e30 t soc21_get_xclk +ffffffff820c6e60 t soc21_set_uvd_clocks +ffffffff820c6e90 t soc21_set_vce_clocks +ffffffff820c6ec0 t soc21_get_config_memsize +ffffffff820c6ee0 t soc21_need_full_reset +ffffffff820c6f10 t soc21_init_doorbell_index +ffffffff820c7030 t soc21_need_reset_on_init +ffffffff820c70e0 t soc21_pre_asic_init +ffffffff820c7110 t soc21_update_umd_stable_pstate +ffffffff820c7190 t soc21_query_video_codecs +ffffffff820c8000 t tonga_ih_early_init +ffffffff820c8050 t tonga_ih_sw_init +ffffffff820c80e0 t tonga_ih_sw_fini +ffffffff820c8140 t tonga_ih_hw_init +ffffffff820c83c0 t tonga_ih_hw_fini +ffffffff820c8490 t tonga_ih_suspend +ffffffff820c8560 t tonga_ih_resume +ffffffff820c85a0 t tonga_ih_is_idle +ffffffff820c85f0 t tonga_ih_wait_for_idle +ffffffff820c86a0 t tonga_ih_check_soft_reset +ffffffff820c8700 t tonga_ih_pre_soft_reset +ffffffff820c87e0 t tonga_ih_soft_reset +ffffffff820c88e0 t tonga_ih_post_soft_reset +ffffffff820c8930 t tonga_ih_set_clockgating_state +ffffffff820c8960 t tonga_ih_set_powergating_state +ffffffff820c8990 t tonga_ih_get_wptr +ffffffff820c8ac0 t tonga_ih_decode_iv +ffffffff820c8b40 t tonga_ih_set_rptr +ffffffff820c9000 t umc_v6_0_init_registers +ffffffff820ca000 t umc_v6_1_query_ras_error_count +ffffffff820ca5c0 t umc_v6_1_query_ras_error_address +ffffffff820ca8f0 t umc_v6_1_err_cnt_init +ffffffff820cb000 T umc_v6_7_convert_error_address +ffffffff820cb3a0 t umc_v6_7_query_ras_error_count +ffffffff820cb3e0 t umc_v6_7_query_ras_error_address +ffffffff820cb400 t umc_v6_7_query_ras_poison_mode +ffffffff820cb460 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff820cb480 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff820cb4a0 t umc_v6_7_query_ecc_error_count +ffffffff820cb7a0 t umc_v6_7_reset_error_count_per_channel +ffffffff820cb8e0 t umc_v6_7_query_error_address +ffffffff820cba10 t umc_v6_7_ecc_info_querry_ecc_error_count +ffffffff820cbc20 t umc_v6_7_ecc_info_query_error_address +ffffffff820cc000 t umc_v8_10_query_ras_error_count +ffffffff820cc040 t umc_v8_10_query_ras_error_address +ffffffff820cc060 t umc_v8_10_err_cnt_init +ffffffff820cc080 t umc_v8_10_query_ras_poison_mode +ffffffff820cc0b0 t umc_v8_10_ecc_info_query_ras_error_count +ffffffff820cc0d0 t umc_v8_10_ecc_info_query_ras_error_address +ffffffff820cc0f0 t umc_v8_10_set_eeprom_table_version +ffffffff820cc120 t umc_v8_10_query_ecc_error_count +ffffffff820cc200 t umc_v8_10_clear_error_count_per_channel +ffffffff820cc270 t umc_v8_10_query_error_address +ffffffff820cc3b0 t umc_v8_10_convert_error_address +ffffffff820cc5e0 t umc_v8_10_err_cnt_init_per_channel +ffffffff820cc6b0 t umc_v8_10_ecc_info_query_ecc_error_count +ffffffff820cc7a0 t umc_v8_10_ecc_info_query_error_address +ffffffff820cd000 t umc_v8_7_query_ras_error_count +ffffffff820cd370 t umc_v8_7_query_ras_error_address +ffffffff820cd540 t umc_v8_7_err_cnt_init +ffffffff820cd6d0 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff820cd800 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff820ce000 t uvd_v5_0_early_init +ffffffff820ce050 t uvd_v5_0_sw_init +ffffffff820ce170 t uvd_v5_0_sw_fini +ffffffff820ce1d0 t uvd_v5_0_hw_init +ffffffff820ce780 t uvd_v5_0_hw_fini +ffffffff820ce810 t uvd_v5_0_suspend +ffffffff820ce950 t uvd_v5_0_resume +ffffffff820ce9b0 t uvd_v5_0_is_idle +ffffffff820cea00 t uvd_v5_0_wait_for_idle +ffffffff820cea90 t uvd_v5_0_soft_reset +ffffffff820ceb80 t uvd_v5_0_set_clockgating_state +ffffffff820ced80 t uvd_v5_0_set_powergating_state +ffffffff820cedd0 t uvd_v5_0_get_clockgating_state +ffffffff820cee70 t uvd_v5_0_ring_get_rptr +ffffffff820ceec0 t uvd_v5_0_ring_get_wptr +ffffffff820cef10 t uvd_v5_0_ring_set_wptr +ffffffff820cef40 t uvd_v5_0_ring_emit_ib +ffffffff820cf1e0 t uvd_v5_0_ring_emit_fence +ffffffff820cf800 t uvd_v5_0_ring_test_ring +ffffffff820cf9d0 t uvd_v5_0_ring_insert_nop +ffffffff820cfb30 t uvd_v5_0_set_interrupt_state +ffffffff820cfb60 t uvd_v5_0_process_interrupt +ffffffff820cfbd0 t uvd_v5_0_stop +ffffffff820cfd50 t uvd_v5_0_start +ffffffff820d1000 t uvd_v6_0_early_init +ffffffff820d1190 t uvd_v6_0_sw_init +ffffffff820d1450 t uvd_v6_0_sw_fini +ffffffff820d1520 t uvd_v6_0_hw_init +ffffffff820d1b90 t uvd_v6_0_hw_fini +ffffffff820d1c20 t uvd_v6_0_suspend +ffffffff820d1d60 t uvd_v6_0_resume +ffffffff820d1dc0 t uvd_v6_0_is_idle +ffffffff820d1e10 t uvd_v6_0_wait_for_idle +ffffffff820d1ea0 t uvd_v6_0_check_soft_reset +ffffffff820d1f30 t uvd_v6_0_pre_soft_reset +ffffffff820d1f80 t uvd_v6_0_soft_reset +ffffffff820d2080 t uvd_v6_0_post_soft_reset +ffffffff820d2150 t uvd_v6_0_set_clockgating_state +ffffffff820d2340 t uvd_v6_0_set_powergating_state +ffffffff820d23c0 t uvd_v6_0_get_clockgating_state +ffffffff820d2470 t uvd_v6_0_ring_get_rptr +ffffffff820d24c0 t uvd_v6_0_ring_get_wptr +ffffffff820d2510 t uvd_v6_0_ring_set_wptr +ffffffff820d2540 t uvd_v6_0_ring_emit_ib +ffffffff820d28e0 t uvd_v6_0_ring_emit_fence +ffffffff820d2f00 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff820d3340 t uvd_v6_0_ring_emit_vm_flush +ffffffff820d36e0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff820d3710 t uvd_v6_0_ring_test_ring +ffffffff820d38e0 t uvd_v6_0_ring_insert_nop +ffffffff820d3a40 t uvd_v6_0_ring_emit_wreg +ffffffff820d3cf0 t uvd_v6_0_enc_ring_get_rptr +ffffffff820d3d50 t uvd_v6_0_enc_ring_get_wptr +ffffffff820d3db0 t uvd_v6_0_enc_ring_set_wptr +ffffffff820d3df0 t uvd_v6_0_enc_ring_emit_ib +ffffffff820d4060 t uvd_v6_0_enc_ring_emit_fence +ffffffff820d42c0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff820d4490 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff820d46c0 t uvd_v6_0_enc_ring_test_ring +ffffffff820d4830 t uvd_v6_0_enc_ring_test_ib +ffffffff820d4d90 t uvd_v6_0_enc_ring_insert_end +ffffffff820d4e20 t uvd_v6_0_set_interrupt_state +ffffffff820d4e50 t uvd_v6_0_process_interrupt +ffffffff820d4f50 t uvd_v6_0_stop +ffffffff820d50d0 t uvd_v6_0_start +ffffffff820d6000 t uvd_v7_0_early_init +ffffffff820d6290 t uvd_v7_0_sw_init +ffffffff820d6720 t uvd_v7_0_sw_fini +ffffffff820d6830 t uvd_v7_0_hw_init +ffffffff820d9d00 t uvd_v7_0_hw_fini +ffffffff820da0b0 t uvd_v7_0_suspend +ffffffff820da190 t uvd_v7_0_resume +ffffffff820da1f0 t uvd_v7_0_set_clockgating_state +ffffffff820da220 t uvd_v7_0_ring_get_rptr +ffffffff820da2c0 t uvd_v7_0_ring_get_wptr +ffffffff820da360 t uvd_v7_0_ring_set_wptr +ffffffff820da3e0 t uvd_v7_0_ring_patch_cs_in_place +ffffffff820da450 t uvd_v7_0_ring_emit_ib +ffffffff820da840 t uvd_v7_0_ring_emit_fence +ffffffff820daf00 t uvd_v7_0_ring_emit_vm_flush +ffffffff820daf70 t uvd_v7_0_ring_emit_hdp_flush +ffffffff820dafa0 t uvd_v7_0_ring_test_ring +ffffffff820db270 t uvd_v7_0_ring_insert_nop +ffffffff820db410 t uvd_v7_0_ring_emit_wreg +ffffffff820db700 t uvd_v7_0_ring_emit_reg_wait +ffffffff820dbae0 t uvd_v7_0_enc_ring_get_rptr +ffffffff820dbbe0 t uvd_v7_0_enc_ring_get_wptr +ffffffff820dbcf0 t uvd_v7_0_enc_ring_set_wptr +ffffffff820dbdf0 t uvd_v7_0_enc_ring_emit_ib +ffffffff820dc060 t uvd_v7_0_enc_ring_emit_fence +ffffffff820dc2c0 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff820dc330 t uvd_v7_0_enc_ring_test_ring +ffffffff820dc4b0 t uvd_v7_0_enc_ring_test_ib +ffffffff820dca10 t uvd_v7_0_enc_ring_insert_end +ffffffff820dcaa0 t uvd_v7_0_enc_ring_emit_wreg +ffffffff820dcc00 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff820dcdd0 t uvd_v7_0_set_interrupt_state +ffffffff820dce00 t uvd_v7_0_process_interrupt +ffffffff820dd000 t vce_v3_0_early_init +ffffffff820dd1a0 t vce_v3_0_sw_init +ffffffff820dd340 t vce_v3_0_sw_fini +ffffffff820dd3a0 t vce_v3_0_hw_init +ffffffff820dd4a0 t vce_v3_0_hw_fini +ffffffff820dd5a0 t vce_v3_0_suspend +ffffffff820dd6b0 t vce_v3_0_resume +ffffffff820dd7d0 t vce_v3_0_is_idle +ffffffff820dd840 t vce_v3_0_wait_for_idle +ffffffff820dd900 t vce_v3_0_check_soft_reset +ffffffff820dda30 t vce_v3_0_pre_soft_reset +ffffffff820ddb00 t vce_v3_0_soft_reset +ffffffff820ddc00 t vce_v3_0_post_soft_reset +ffffffff820ddcd0 t vce_v3_0_set_clockgating_state +ffffffff820de0b0 t vce_v3_0_set_powergating_state +ffffffff820dec00 t vce_v3_0_get_clockgating_state +ffffffff820decf0 t vce_v3_0_ring_get_rptr +ffffffff820dede0 t vce_v3_0_ring_get_wptr +ffffffff820deed0 t vce_v3_0_ring_set_wptr +ffffffff820defa0 t vce_v3_0_ring_emit_ib +ffffffff820df210 t vce_v3_0_emit_pipeline_sync +ffffffff820df3e0 t vce_v3_0_emit_vm_flush +ffffffff820df680 t vce_v3_0_set_interrupt_state +ffffffff820df700 t vce_v3_0_process_interrupt +ffffffff820df7e0 t vce_v3_0_stop +ffffffff820e0000 t vce_v4_0_early_init +ffffffff820e00c0 t vce_v4_0_sw_init +ffffffff820e03d0 t vce_v4_0_sw_fini +ffffffff820e0470 t vce_v4_0_hw_init +ffffffff820e0cc0 t vce_v4_0_hw_fini +ffffffff820e0e30 t vce_v4_0_suspend +ffffffff820e0fa0 t vce_v4_0_resume +ffffffff820e1070 t vce_v4_0_set_clockgating_state +ffffffff820e10a0 t vce_v4_0_set_powergating_state +ffffffff820e11b0 t vce_v4_0_ring_get_rptr +ffffffff820e1220 t vce_v4_0_ring_get_wptr +ffffffff820e12b0 t vce_v4_0_ring_set_wptr +ffffffff820e1340 t vce_v4_0_ring_emit_ib +ffffffff820e15b0 t vce_v4_0_ring_emit_fence +ffffffff820e1810 t vce_v4_0_emit_vm_flush +ffffffff820e1880 t vce_v4_0_ring_insert_end +ffffffff820e1910 t vce_v4_0_emit_wreg +ffffffff820e1a70 t vce_v4_0_emit_reg_wait +ffffffff820e1c40 t vce_v4_0_set_interrupt_state +ffffffff820e1cd0 t vce_v4_0_process_interrupt +ffffffff820e1d80 t vce_v4_0_start +ffffffff820e3000 T vcn_dec_sw_ring_emit_fence +ffffffff820e3260 T vcn_dec_sw_ring_insert_end +ffffffff820e32f0 T vcn_dec_sw_ring_emit_ib +ffffffff820e3560 T vcn_dec_sw_ring_emit_reg_wait +ffffffff820e3730 T vcn_dec_sw_ring_emit_vm_flush +ffffffff820e37a0 T vcn_dec_sw_ring_emit_wreg +ffffffff820e4000 T vcn_v1_0_set_pg_for_begin_use +ffffffff820e4160 T vcn_v1_0_ring_end_use +ffffffff820e41d0 t vcn_v1_0_early_init +ffffffff820e4340 t vcn_v1_0_sw_init +ffffffff820e4640 t vcn_v1_0_sw_fini +ffffffff820e46b0 t vcn_v1_0_hw_init +ffffffff820e47b0 t vcn_v1_0_hw_fini +ffffffff820e48d0 t vcn_v1_0_suspend +ffffffff820e4960 t vcn_v1_0_resume +ffffffff820e4a80 t vcn_v1_0_is_idle +ffffffff820e4b20 t vcn_v1_0_wait_for_idle +ffffffff820e4b60 t vcn_v1_0_set_clockgating_state +ffffffff820e4c30 t vcn_v1_0_set_powergating_state +ffffffff820e52a0 t vcn_v1_0_dec_ring_get_rptr +ffffffff820e5330 t vcn_v1_0_dec_ring_get_wptr +ffffffff820e53c0 t vcn_v1_0_dec_ring_set_wptr +ffffffff820e54e0 t vcn_v1_0_ring_patch_cs_in_place +ffffffff820e56d0 t vcn_v1_0_dec_ring_emit_ib +ffffffff820e5aa0 t vcn_v1_0_dec_ring_emit_fence +ffffffff820e6130 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff820e61a0 t vcn_v1_0_dec_ring_insert_nop +ffffffff820e6340 t vcn_v1_0_dec_ring_insert_start +ffffffff820e6530 t vcn_v1_0_dec_ring_insert_end +ffffffff820e6640 t vcn_v1_0_ring_begin_use +ffffffff820e6700 t vcn_v1_0_dec_ring_emit_wreg +ffffffff820e69e0 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff820e6da0 t vcn_v1_0_enc_ring_get_rptr +ffffffff820e6e80 t vcn_v1_0_enc_ring_get_wptr +ffffffff820e6f60 t vcn_v1_0_enc_ring_set_wptr +ffffffff820e7020 t vcn_v1_0_enc_ring_emit_ib +ffffffff820e7290 t vcn_v1_0_enc_ring_emit_fence +ffffffff820e74f0 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff820e7560 t vcn_v1_0_enc_ring_insert_end +ffffffff820e75f0 t vcn_v1_0_enc_ring_emit_wreg +ffffffff820e7750 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff820e7920 t vcn_v1_0_set_interrupt_state +ffffffff820e7950 t vcn_v1_0_process_interrupt +ffffffff820e7a10 t vcn_v1_0_idle_work_handler +ffffffff820e7bc0 t vcn_v1_0_pause_dpg_mode +ffffffff820e8c90 t vcn_v1_0_enable_clock_gating +ffffffff820e9130 t vcn_v1_0_disable_clock_gating +ffffffff820e9790 t vcn_1_0_enable_static_power_gating +ffffffff820e9960 t vcn_v1_0_start_dpg_mode +ffffffff820ee190 t vcn_v1_0_start_spg_mode +ffffffff820f09f0 t vcn_v1_0_clock_gating_dpg_mode +ffffffff820f2000 T vcn_v2_0_dec_ring_insert_start +ffffffff820f21d0 T vcn_v2_0_dec_ring_insert_end +ffffffff820f22d0 T vcn_v2_0_dec_ring_insert_nop +ffffffff820f2450 T vcn_v2_0_dec_ring_emit_fence +ffffffff820f2a80 T vcn_v2_0_dec_ring_emit_ib +ffffffff820f2e20 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff820f31b0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff820f3220 T vcn_v2_0_dec_ring_emit_wreg +ffffffff820f34d0 T vcn_v2_0_enc_ring_emit_fence +ffffffff820f3730 T vcn_v2_0_enc_ring_insert_end +ffffffff820f37c0 T vcn_v2_0_enc_ring_emit_ib +ffffffff820f3a30 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff820f3c00 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff820f3c70 T vcn_v2_0_enc_ring_emit_wreg +ffffffff820f3dd0 T vcn_v2_0_dec_ring_test_ring +ffffffff820f40b0 t vcn_v2_0_early_init +ffffffff820f4220 t vcn_v2_0_sw_init +ffffffff820f45c0 t vcn_v2_0_sw_fini +ffffffff820f4670 t vcn_v2_0_hw_init +ffffffff820f50b0 t vcn_v2_0_hw_fini +ffffffff820f51d0 t vcn_v2_0_suspend +ffffffff820f5200 t vcn_v2_0_resume +ffffffff820f5260 t vcn_v2_0_is_idle +ffffffff820f5300 t vcn_v2_0_wait_for_idle +ffffffff820f5340 t vcn_v2_0_set_clockgating_state +ffffffff820f53f0 t vcn_v2_0_set_powergating_state +ffffffff820f5ab0 t vcn_v2_0_dec_ring_get_rptr +ffffffff820f5b40 t vcn_v2_0_dec_ring_get_wptr +ffffffff820f5bf0 t vcn_v2_0_dec_ring_set_wptr +ffffffff820f5d30 t vcn_v2_0_enc_ring_get_rptr +ffffffff820f5e10 t vcn_v2_0_enc_ring_get_wptr +ffffffff820f5f10 t vcn_v2_0_enc_ring_set_wptr +ffffffff820f6000 t vcn_v2_0_set_interrupt_state +ffffffff820f6030 t vcn_v2_0_process_interrupt +ffffffff820f60f0 t vcn_v2_0_pause_dpg_mode +ffffffff820f69c0 t vcn_v2_0_enable_clock_gating +ffffffff820f6c80 t vcn_v2_0_disable_clock_gating +ffffffff820f7110 t vcn_v2_0_start +ffffffff820fc0e0 t vcn_v2_0_enable_static_power_gating +ffffffff820fc260 t vcn_v2_0_clock_gating_dpg_mode +ffffffff820fd140 t vcn_v2_0_mc_resume_dpg_mode +ffffffff82102000 t vcn_v2_6_query_poison_status +ffffffff821020e0 t vcn_v2_5_early_init +ffffffff821023e0 t vcn_v2_5_sw_init +ffffffff82102930 t vcn_v2_5_sw_fini +ffffffff82102a20 t vcn_v2_5_hw_init +ffffffff82103530 t vcn_v2_5_hw_fini +ffffffff821036e0 t vcn_v2_5_suspend +ffffffff82103710 t vcn_v2_5_resume +ffffffff82103770 t vcn_v2_5_is_idle +ffffffff82103870 t vcn_v2_5_wait_for_idle +ffffffff82103920 t vcn_v2_5_set_clockgating_state +ffffffff821039b0 t vcn_v2_5_set_powergating_state +ffffffff821061b0 t vcn_v2_5_dec_ring_get_rptr +ffffffff82106250 t vcn_v2_5_dec_ring_get_wptr +ffffffff82106310 t vcn_v2_5_dec_ring_set_wptr +ffffffff821063c0 t vcn_v2_5_enc_ring_get_rptr +ffffffff821064c0 t vcn_v2_5_enc_ring_get_wptr +ffffffff821065d0 t vcn_v2_5_enc_ring_set_wptr +ffffffff821066e0 t vcn_v2_5_set_interrupt_state +ffffffff82106710 t vcn_v2_5_process_interrupt +ffffffff82106830 t vcn_v2_6_set_ras_interrupt_state +ffffffff82106860 t vcn_v2_5_pause_dpg_mode +ffffffff821070a0 t vcn_v2_5_enable_clock_gating +ffffffff82107400 t vcn_v2_5_disable_clock_gating +ffffffff82107970 t vcn_v2_5_start_dpg_mode +ffffffff8210b910 t vcn_v2_5_clock_gating_dpg_mode +ffffffff8210c820 t vcn_v2_5_mc_resume_dpg_mode +ffffffff82112000 t vcn_v3_0_early_init +ffffffff82112230 t vcn_v3_0_sw_init +ffffffff82112750 t vcn_v3_0_sw_fini +ffffffff82112850 t vcn_v3_0_hw_init +ffffffff82113470 t vcn_v3_0_hw_fini +ffffffff82113590 t vcn_v3_0_suspend +ffffffff821135c0 t vcn_v3_0_resume +ffffffff82113620 t vcn_v3_0_is_idle +ffffffff82113720 t vcn_v3_0_wait_for_idle +ffffffff821137d0 t vcn_v3_0_set_clockgating_state +ffffffff821138f0 t vcn_v3_0_set_powergating_state +ffffffff821164e0 t vcn_v3_0_dec_ring_get_rptr +ffffffff82116580 t vcn_v3_0_dec_ring_get_wptr +ffffffff82116640 t vcn_v3_0_dec_ring_set_wptr +ffffffff821167b0 t vcn_v3_0_ring_patch_cs_in_place +ffffffff82116b30 t vcn_v3_0_enc_ring_get_rptr +ffffffff82116c30 t vcn_v3_0_enc_ring_get_wptr +ffffffff82116d40 t vcn_v3_0_enc_ring_set_wptr +ffffffff82116e50 t vcn_v3_0_set_interrupt_state +ffffffff82116e80 t vcn_v3_0_process_interrupt +ffffffff82116fa0 t vcn_v3_0_pause_dpg_mode +ffffffff821178c0 t vcn_v3_0_enable_clock_gating +ffffffff82117b90 t vcn_v3_0_disable_clock_gating +ffffffff82118150 t vcn_v3_0_start_dpg_mode +ffffffff8211b960 t vcn_v3_0_clock_gating_dpg_mode +ffffffff8211c8a0 t vcn_v3_0_mc_resume_dpg_mode +ffffffff82122000 t vcn_v4_0_query_ras_poison_status +ffffffff821220e0 t vcn_v4_0_early_init +ffffffff821222b0 t vcn_v4_0_sw_init +ffffffff821225b0 t vcn_v4_0_sw_fini +ffffffff821226b0 t vcn_v4_0_hw_init +ffffffff821231a0 t vcn_v4_0_hw_fini +ffffffff82123310 t vcn_v4_0_suspend +ffffffff82123340 t vcn_v4_0_resume +ffffffff821233a0 t vcn_v4_0_is_idle +ffffffff821234b0 t vcn_v4_0_wait_for_idle +ffffffff82123570 t vcn_v4_0_set_clockgating_state +ffffffff821236a0 t vcn_v4_0_set_powergating_state +ffffffff82124010 t vcn_v4_0_unified_ring_get_rptr +ffffffff821240f0 t vcn_v4_0_unified_ring_get_wptr +ffffffff821241f0 t vcn_v4_0_unified_ring_set_wptr +ffffffff821242f0 t vcn_v4_0_ring_patch_cs_in_place +ffffffff821246e0 t vcn_v4_0_limit_sched +ffffffff82124750 t vcn_v4_0_set_interrupt_state +ffffffff82124780 t vcn_v4_0_process_interrupt +ffffffff82124850 t vcn_v4_0_set_ras_interrupt_state +ffffffff82124880 t vcn_v4_0_pause_dpg_mode +ffffffff82124b40 t vcn_v4_0_enable_clock_gating +ffffffff82124e70 t vcn_v4_0_disable_clock_gating +ffffffff821253b0 t vcn_v4_0_start +ffffffff8212a940 t vcn_v4_0_disable_clock_gating_dpg_mode +ffffffff8212b880 t vcn_v4_0_mc_resume_dpg_mode +ffffffff82131000 t vcn_v4_0_3_early_init +ffffffff82131110 t vcn_v4_0_3_sw_init +ffffffff82131410 t vcn_v4_0_3_sw_fini +ffffffff821314e0 t vcn_v4_0_3_hw_init +ffffffff821322f0 t vcn_v4_0_3_hw_fini +ffffffff82132390 t vcn_v4_0_3_suspend +ffffffff82132410 t vcn_v4_0_3_resume +ffffffff82132470 t vcn_v4_0_3_is_idle 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vega10_ih_hw_fini +ffffffff821407e0 t vega10_ih_suspend +ffffffff82140840 t vega10_ih_resume +ffffffff82140850 t vega10_ih_is_idle +ffffffff82140880 t vega10_ih_wait_for_idle +ffffffff821408b0 t vega10_ih_soft_reset +ffffffff821408e0 t vega10_ih_set_clockgating_state +ffffffff82140a40 t vega10_ih_set_powergating_state +ffffffff82140a70 t vega10_ih_get_wptr +ffffffff82140bd0 t vega10_ih_set_rptr +ffffffff82140cc0 t vega10_ih_self_irq +ffffffff82140d40 t vega10_ih_toggle_interrupts +ffffffff82141000 T vega10_reg_base_init +ffffffff82141150 T vega10_doorbell_index_init +ffffffff82142000 t vega20_ih_early_init +ffffffff82142050 t vega20_ih_sw_init +ffffffff82142360 t vega20_ih_sw_fini +ffffffff821423a0 t vega20_ih_hw_init +ffffffff82142a80 t vega20_ih_hw_fini +ffffffff82142ae0 t vega20_ih_suspend +ffffffff82142b40 t vega20_ih_resume +ffffffff82142b50 t vega20_ih_is_idle +ffffffff82142b80 t vega20_ih_wait_for_idle +ffffffff82142bb0 t vega20_ih_soft_reset +ffffffff82142be0 t vega20_ih_set_clockgating_state +ffffffff82142d20 t vega20_ih_set_powergating_state +ffffffff82142d50 t vega20_ih_get_wptr +ffffffff82142eb0 t vega20_ih_set_rptr +ffffffff82142fa0 t vega20_ih_self_irq +ffffffff82143020 t vega20_ih_toggle_interrupts +ffffffff82144000 T vega20_reg_base_init +ffffffff82144160 T vega20_doorbell_index_init +ffffffff82145000 T vi_srbm_select +ffffffff82145050 T vi_set_virt_ops +ffffffff82145090 T vi_set_ip_blocks +ffffffff82145640 T legacy_doorbell_index_init +ffffffff821456f0 t vi_common_early_init +ffffffff821459f0 t vi_common_late_init +ffffffff82145a40 t vi_common_sw_init +ffffffff82145a90 t vi_common_sw_fini +ffffffff82145ac0 t vi_common_hw_init +ffffffff821462a0 t vi_common_hw_fini +ffffffff82146320 t vi_common_suspend +ffffffff821463a0 t vi_common_resume +ffffffff821463e0 t vi_common_is_idle +ffffffff82146410 t vi_common_wait_for_idle +ffffffff82146440 t vi_common_soft_reset +ffffffff82146470 t vi_common_set_clockgating_state +ffffffff82146a70 t vi_common_set_powergating_state +ffffffff82146aa0 t vi_common_get_clockgating_state +ffffffff82146b90 t cz_smc_rreg +ffffffff82146c30 t cz_smc_wreg +ffffffff82146cb0 t vi_smc_rreg +ffffffff82146d60 t vi_smc_wreg +ffffffff82146df0 t vi_pcie_rreg +ffffffff82146eb0 t vi_pcie_wreg +ffffffff82146f70 t vi_uvd_ctx_rreg +ffffffff82147020 t vi_uvd_ctx_wreg +ffffffff821470b0 t vi_didt_rreg +ffffffff82147150 t vi_didt_wreg +ffffffff821471d0 t vi_gc_cac_rreg +ffffffff82147270 t vi_gc_cac_wreg +ffffffff821472f0 t vi_read_disabled_bios +ffffffff82147530 t vi_read_bios_from_rom +ffffffff82147660 t vi_read_register +ffffffff82147940 t vi_asic_reset +ffffffff82147ae0 t vi_asic_reset_method +ffffffff82147ba0 t vi_get_xclk +ffffffff82147c60 t vi_set_uvd_clocks +ffffffff82147d20 t vi_set_vce_clocks +ffffffff821480a0 t vi_get_config_memsize +ffffffff821480c0 t vi_flush_hdp +ffffffff82148140 t vi_invalidate_hdp +ffffffff821481c0 t vi_need_full_reset +ffffffff82148210 t vi_get_pcie_usage +ffffffff82148370 t vi_need_reset_on_init +ffffffff82148410 t vi_get_pcie_replay_count +ffffffff82148490 t vi_asic_supports_baco +ffffffff821484e0 t vi_pre_asic_init +ffffffff82148510 t vi_query_video_codecs +ffffffff821485b0 t vi_set_uvd_clock +ffffffff82149000 T amdgpu_xcp_drm_dev_alloc +ffffffff82149060 T amdgpu_xcp_drv_release +ffffffff8214a000 T amdgpu_dm_find_first_crtc_matching_connector +ffffffff8214a070 T amdgpu_dm_update_connector_after_detect +ffffffff8214a680 T amdgpu_dm_update_freesync_caps +ffffffff8214ab60 T dm_atomic_get_state +ffffffff8214abd0 T amdgpu_dm_connector_atomic_set_property +ffffffff8214ac90 T amdgpu_dm_connector_atomic_get_property +ffffffff8214ad30 T amdgpu_dm_connector_funcs_reset +ffffffff8214ae30 T amdgpu_dm_connector_atomic_duplicate_state +ffffffff8214af40 T create_validate_stream_for_sink +ffffffff8214c870 T amdgpu_dm_connector_mode_valid +ffffffff8214ca70 T convert_dc_color_depth_into_bpc +ffffffff8214cab0 t dm_encoder_helper_disable +ffffffff8214cae0 t dm_encoder_helper_atomic_check +ffffffff8214ccf0 T amdgpu_dm_connector_init_helper +ffffffff8214d0e0 T amdgpu_dm_get_encoder_crtc_mask +ffffffff8214d130 T dm_restore_drm_connector_state +ffffffff8214d2c0 t parse_hdmi_amd_vsdb +ffffffff8214d670 T amdgpu_dm_trigger_timing_sync +ffffffff8214d850 T dm_write_reg_func +ffffffff8214d870 T dm_read_reg_func +ffffffff8214d920 T amdgpu_dm_process_dmub_aux_transfer_sync +ffffffff8214db90 T amdgpu_dm_process_dmub_set_config_sync +ffffffff8214dd30 T check_seamless_boot_capability +ffffffff8214dd80 T dm_execute_dmub_cmd +ffffffff8214dda0 T dm_execute_dmub_cmd_list +ffffffff8214ddc0 t dm_early_init +ffffffff8214e190 t dm_late_init +ffffffff8214e490 t dm_sw_init +ffffffff8214eab0 t dm_sw_fini +ffffffff8214eb80 t amdgpu_dm_early_fini +ffffffff8214ebe0 t dm_hw_init +ffffffff82150bb0 t dm_hw_fini +ffffffff82150c20 t dm_suspend +ffffffff82151060 t dm_resume +ffffffff82151ac0 t dm_is_idle +ffffffff82151af0 t dm_wait_for_idle +ffffffff82151b20 t dm_check_soft_reset +ffffffff82151b50 t dm_soft_reset +ffffffff82151b80 t dm_set_clockgating_state +ffffffff82151bb0 t dm_set_powergating_state +ffffffff82151be0 t dm_bandwidth_update +ffffffff82151c10 t dm_vblank_get_counter +ffffffff82151c90 t dm_crtc_get_scanoutpos +ffffffff82151d60 t amdgpu_dm_dmub_reg_read +ffffffff82151e10 t amdgpu_dm_dmub_reg_write +ffffffff82151e40 t dm_dmub_hw_init +ffffffff821522a0 t dmub_aux_setconfig_callback +ffffffff82152350 t amdgpu_dm_fini +ffffffff821525a0 t emulated_link_detect +ffffffff821526b0 t amdgpu_dm_atomic_check +ffffffff82153580 t dm_update_plane_state +ffffffff82153c30 t dm_update_crtc_state +ffffffff82154720 t dm_check_crtc_cursor +ffffffff82154aa0 t is_scaling_state_different +ffffffff82154b40 t do_aquire_global_lock +ffffffff82154e10 t dm_update_mst_vcpi_slots_for_dsc +ffffffff82155020 t dm_atomic_destroy_state +ffffffff82155060 t dm_check_cursor_fb +ffffffff82155210 t fill_dc_plane_attributes +ffffffff821554c0 t fill_dc_plane_info_and_addr +ffffffff82155810 t fill_hdr_info_packet +ffffffff82155980 t is_timing_unchanged_for_freesync +ffffffff82155ab0 t get_highest_refresh_rate_mode +ffffffff82155c10 t update_stream_scaling_settings +ffffffff82155d60 t amdgpu_dm_atomic_commit_tail +ffffffff82158ee0 t amdgpu_dm_backlight_set_level +ffffffff821590e0 t dm_atomic_duplicate_state +ffffffff821591a0 t amdgpu_dm_audio_component_bind +ffffffff82159210 t amdgpu_dm_audio_component_unbind +ffffffff82159270 t amdgpu_dm_audio_component_get_eld +ffffffff821593d0 t dm_dmub_outbox1_low_irq +ffffffff821596c0 t dm_handle_hpd_work +ffffffff82159750 t amdgpu_dm_encoder_destroy +ffffffff82159790 t amdgpu_dm_i2c_xfer +ffffffff821598f0 t amdgpu_dm_i2c_func +ffffffff82159920 t amdgpu_dm_connector_detect +ffffffff821599e0 t amdgpu_dm_connector_funcs_force +ffffffff82159ad0 t amdgpu_dm_connector_late_register +ffffffff82159c50 t amdgpu_dm_connector_unregister +ffffffff82159c70 t amdgpu_dm_connector_destroy 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T amdgpu_dm_crtc_modeset_required +ffffffff8215d0d0 T amdgpu_dm_crtc_vrr_active_irq +ffffffff8215d110 T amdgpu_dm_crtc_set_vupdate_irq +ffffffff8215d1d0 T amdgpu_dm_crtc_vrr_active +ffffffff8215d210 T amdgpu_dm_crtc_enable_vblank +ffffffff8215d230 t dm_set_vblank +ffffffff8215d4f0 T amdgpu_dm_crtc_disable_vblank +ffffffff8215d510 T amdgpu_dm_crtc_init +ffffffff8215d730 t vblank_control_worker +ffffffff8215d880 t dm_crtc_reset_state +ffffffff8215d930 t amdgpu_dm_crtc_destroy +ffffffff8215d970 t dm_crtc_duplicate_state +ffffffff8215db40 t dm_crtc_destroy_state +ffffffff8215db90 t dm_crtc_helper_mode_fixup +ffffffff8215dbc0 t dm_crtc_helper_disable +ffffffff8215dbf0 t dm_crtc_helper_atomic_check +ffffffff8215e000 T hdcp_update_display +ffffffff8215e2d0 t process_output +ffffffff8215e430 T hdcp_reset_display +ffffffff8215e5c0 T hdcp_handle_cpirq +ffffffff8215e5f0 T hdcp_destroy +ffffffff8215e720 T hdcp_create_workqueue +ffffffff8215eb90 t event_cpirq +ffffffff8215ec00 t event_property_update +ffffffff8215ee70 t event_callback +ffffffff8215ef20 t event_watchdog_timer +ffffffff8215efd0 t event_property_validate +ffffffff8215f180 t lp_write_i2c +ffffffff8215f210 t lp_read_i2c +ffffffff8215f2c0 t lp_write_dpcd +ffffffff8215f2f0 t lp_read_dpcd +ffffffff8215f320 t update_config +ffffffff8215f6d0 t enable_assr +ffffffff8215f820 t __delayed_work_tick +ffffffff82160000 T dm_helpers_parse_edid_caps +ffffffff82160290 T dm_helpers_dp_update_branch_info +ffffffff821602c0 T dm_helpers_dp_mst_write_payload_allocation_table +ffffffff821606d0 T dm_helpers_dp_mst_poll_pending_down_reply +ffffffff82160700 T dm_helpers_dp_mst_clear_payload_allocation_table +ffffffff82160730 T dm_helpers_dp_mst_poll_for_allocation_change_trigger +ffffffff821607b0 T dm_helpers_dp_mst_send_payload_allocation +ffffffff82160890 T dm_dtn_log_begin +ffffffff821608e0 T dm_dtn_log_append_v +ffffffff82160a60 T dm_dtn_log_end +ffffffff82160ab0 T dm_helpers_dp_mst_start_top_mgr +ffffffff82160b90 T dm_helpers_dp_mst_stop_top_mgr +ffffffff82160c40 T dm_helpers_dp_read_dpcd +ffffffff82160ce0 T dm_helpers_dp_write_dpcd +ffffffff82160d70 T dm_helpers_submit_i2c +ffffffff82160ec0 T dm_helpers_dp_write_dsc_enable +ffffffff82161600 T dm_helpers_is_dp_sink_present +ffffffff821616b0 T dm_helpers_read_local_edid +ffffffff82161960 T dm_helper_dmub_aux_transfer_sync +ffffffff821619b0 T dm_helpers_dmub_set_config_sync +ffffffff821619d0 T dm_set_dcn_clocks +ffffffff82161a00 T dm_helpers_smu_timeout +ffffffff82161a30 T dm_helpers_init_panel_settings +ffffffff82161aa0 T dm_helpers_override_panel_settings +ffffffff82161ae0 T dm_helpers_allocate_gpu_mem +ffffffff82161bf0 T dm_helpers_free_gpu_mem +ffffffff82161c90 T dm_helpers_dmub_outbox_interrupt_control +ffffffff82161d30 T dm_helpers_mst_enable_stream_features +ffffffff82161e60 T dm_helpers_dp_handle_test_pattern_request +ffffffff821621b0 T dm_set_phyd32clk +ffffffff821621e0 T dm_helpers_enable_periodic_detection +ffffffff82162210 T dm_helpers_dp_mst_update_branch_bandwidth +ffffffff82162240 T dm_get_adaptive_sync_support_type +ffffffff821622b0 t execute_synaptics_rc_command +ffffffff82163000 T amdgpu_dm_irq_register_interrupt +ffffffff821631d0 t dm_irq_work_func +ffffffff821631f0 T amdgpu_dm_irq_unregister_interrupt +ffffffff821633b0 T amdgpu_dm_irq_init +ffffffff821634b0 T amdgpu_dm_irq_fini +ffffffff82163680 T amdgpu_dm_irq_suspend +ffffffff821637d0 T amdgpu_dm_irq_resume_early +ffffffff821639a0 T amdgpu_dm_irq_resume_late +ffffffff82163b70 T amdgpu_dm_set_irq_funcs +ffffffff82163c30 T amdgpu_dm_outbox_init +ffffffff82163c60 T amdgpu_dm_hpd_init +ffffffff82163d30 T amdgpu_dm_hpd_fini +ffffffff82163e00 t amdgpu_dm_set_crtc_irq_state +ffffffff82163e90 t amdgpu_dm_irq_handler +ffffffff821640f0 t amdgpu_dm_set_vline0_irq_state +ffffffff82164180 t amdgpu_dm_set_dmub_outbox_irq_state +ffffffff821641e0 t amdgpu_dm_set_vupdate_irq_state +ffffffff82164270 t amdgpu_dm_set_dmub_trace_irq_state +ffffffff821642d0 t amdgpu_dm_set_pflip_irq_state +ffffffff82164360 t amdgpu_dm_set_hpd_irq_state +ffffffff82165000 T needs_dsc_aux_workaround +ffffffff82165050 T dm_dp_create_fake_mst_encoders +ffffffff82165110 T dm_handle_mst_sideband_msg_ready_event +ffffffff821653b0 T amdgpu_dm_initialize_dp_connector +ffffffff821654d0 t kasprintf +ffffffff821655b0 t dm_dp_aux_transfer +ffffffff82165700 T dm_mst_get_pbn_divider +ffffffff82165770 T compute_mst_dsc_configs_for_state +ffffffff82165a30 t is_dsc_need_re_compute +ffffffff82165c00 t compute_mst_dsc_configs_for_link +ffffffff821662c0 T pre_validate_dsc +ffffffff821668e0 T dm_dp_mst_is_port_support_mode +ffffffff82166b80 t amdgpu_dm_encoder_destroy +ffffffff82166b90 t dm_dp_add_mst_connector +ffffffff82166dc0 t dm_handle_mst_down_rep_msg_ready +ffffffff82166de0 t amdgpu_dm_mst_connector_late_register +ffffffff82166e30 t amdgpu_dm_mst_connector_early_unregister +ffffffff82166f20 t dm_dp_mst_connector_destroy +ffffffff82166fc0 t dm_dp_mst_get_modes +ffffffff82167570 t dm_dp_mst_detect +ffffffff82167780 t dm_mst_atomic_best_encoder +ffffffff821677e0 t dm_dp_mst_atomic_check +ffffffff82167810 t set_dsc_configs_from_fairness_vars +ffffffff82167b00 t increase_dsc_bpp +ffffffff821680a0 t try_disable_dsc +ffffffff82169000 T amdgpu_dm_plane_get_format_info +ffffffff82169020 T amdgpu_dm_plane_fill_blending_from_plane_state +ffffffff82169120 T amdgpu_dm_plane_fill_plane_buffer_attributes +ffffffff821696b0 T amdgpu_dm_plane_helper_check_state +ffffffff821698d0 T amdgpu_dm_plane_fill_dc_scaling_info +ffffffff82169b30 T amdgpu_dm_plane_handle_cursor_update +ffffffff82169e00 T amdgpu_dm_plane_init +ffffffff8216adc0 T is_video_format +ffffffff8216ae10 t dm_drm_plane_reset +ffffffff8216aeb0 t dm_drm_plane_duplicate_state +ffffffff8216af50 t dm_drm_plane_destroy_state +ffffffff8216af90 t dm_plane_format_mod_supported +ffffffff8216b0c0 t dm_plane_helper_prepare_fb +ffffffff8216b400 t dm_plane_helper_cleanup_fb +ffffffff8216b4b0 t dm_plane_atomic_check +ffffffff8216b5a0 t dm_plane_atomic_async_check +ffffffff8216b5e0 t dm_plane_atomic_async_update +ffffffff8216b690 t amdgpu_bo_reserve +ffffffff8216b8d0 t amdgpu_bo_unreserve +ffffffff8216c000 T dm_pp_apply_display_requirements +ffffffff8216c1f0 T dm_pp_get_clock_levels_by_type +ffffffff8216c5b0 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff8216c7a0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff8216c990 T dm_pp_notify_wm_clock_changes +ffffffff8216c9f0 T dm_pp_apply_power_level_change_request +ffffffff8216ca20 T dm_pp_apply_clock_for_voltage_request +ffffffff8216cad0 T dm_pp_get_static_clocks +ffffffff8216cba0 T dm_pp_get_funcs +ffffffff8216ccb0 t pp_rv_set_wm_ranges +ffffffff8216ce40 t pp_rv_set_pme_wa_enable +ffffffff8216ce60 t pp_rv_set_active_display_count +ffffffff8216ce80 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff8216cea0 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff8216cec0 t pp_rv_set_hard_min_fclk_by_freq +ffffffff8216cee0 t pp_nv_set_display_count +ffffffff8216cf40 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff8216cfb0 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff8216d010 t pp_nv_set_voltage_by_freq +ffffffff8216d0b0 t pp_nv_set_wm_ranges +ffffffff8216d100 t pp_nv_set_hard_min_uclk_by_freq +ffffffff8216d170 t pp_nv_get_maximum_sustainable_clocks +ffffffff8216d1d0 t pp_nv_get_uclk_dpm_states +ffffffff8216d230 t pp_nv_set_pstate_handshake_support +ffffffff8216d290 t pp_rn_set_wm_ranges +ffffffff8216d2e0 t pp_rn_get_dpm_clock_table +ffffffff8216e000 T amdgpu_dm_set_psr_caps +ffffffff8216e160 T amdgpu_dm_link_setup_psr +ffffffff8216e320 T amdgpu_dm_psr_enable +ffffffff8216e430 T amdgpu_dm_psr_disable +ffffffff8216e4c0 T amdgpu_dm_psr_disable_all +ffffffff8216f000 T amdgpu_dm_setup_replay +ffffffff8216f100 T amdgpu_dm_replay_enable +ffffffff8216f2b0 T amdgpu_dm_replay_disable +ffffffff82170000 T dm_get_elapse_time_in_ns +ffffffff82170030 T dm_perf_trace_timestamp +ffffffff82171000 T dc_assert_fp_enabled +ffffffff82171080 T dc_fpu_begin +ffffffff821710d0 T dc_fpu_end +ffffffff82172000 T dal_vector_construct +ffffffff821720e0 T dal_vector_presized_create +ffffffff821723a0 T dal_vector_create +ffffffff821724e0 T dal_vector_destruct +ffffffff82172540 T dal_vector_destroy +ffffffff821725d0 T dal_vector_get_count +ffffffff82172600 T dal_vector_at_index +ffffffff82172640 T dal_vector_remove_at_index +ffffffff821726e0 T dal_vector_set_at_index +ffffffff82172740 T dal_vector_insert_at +ffffffff82172870 T dal_vector_reserve +ffffffff82172930 T dal_vector_append +ffffffff82172a60 T dal_vector_clone +ffffffff82172b20 T dal_vector_capacity +ffffffff82172b50 T dal_vector_clear +ffffffff82173000 T fixed_point_to_int_frac +ffffffff82173220 T convert_float_matrix +ffffffff821732f0 T reduce_fraction +ffffffff82174000 T is_rgb_cspace +ffffffff82174090 T is_lower_pipe_tree_visible +ffffffff82174100 T is_upper_pipe_tree_visible +ffffffff82174170 T is_pipe_tree_visible +ffffffff82174200 T build_prescale_params +ffffffff82175000 T dc_fixpt_from_fraction +ffffffff821751e0 T dc_fixpt_mul +ffffffff821753a0 T dc_fixpt_sqr +ffffffff82175520 T dc_fixpt_recip +ffffffff82175590 T dc_fixpt_sinc +ffffffff821757d0 T dc_fixpt_sin +ffffffff82175800 T dc_fixpt_cos +ffffffff82175920 T dc_fixpt_exp +ffffffff82175c40 t fixed31_32_exp_from_taylor_series +ffffffff82176110 T dc_fixpt_log +ffffffff82176350 T dc_fixpt_u4d19 +ffffffff82176390 T dc_fixpt_u3d19 +ffffffff821763d0 T dc_fixpt_u2d19 +ffffffff82176410 T dc_fixpt_u0d19 +ffffffff82176440 T dc_fixpt_clamp_u0d14 +ffffffff82176490 T dc_fixpt_clamp_u0d10 +ffffffff821764e0 T dc_fixpt_s4d19 +ffffffff82177000 T bios_parser_create +ffffffff82178380 t bios_parser_get_connectors_number +ffffffff821783e0 t bios_parser_get_connector_id +ffffffff82178490 t bios_parser_get_src_obj +ffffffff821785c0 t bios_parser_get_i2c_info +ffffffff82178800 t bios_parser_get_hpd_info +ffffffff821788f0 t bios_parser_get_device_tag +ffffffff82178b10 t bios_parser_get_spread_spectrum_info +ffffffff82178d20 t bios_parser_get_ss_entry_number +ffffffff82178f80 t bios_parser_get_embedded_panel_info +ffffffff82179510 t bios_parser_get_gpio_pin_info +ffffffff82179630 t bios_parser_get_encoder_cap_info +ffffffff82179740 t bios_parser_set_scratch_critical_state +ffffffff82179750 t bios_parser_is_device_id_supported +ffffffff82179810 t bios_parser_encoder_control +ffffffff82179850 t bios_parser_transmitter_control +ffffffff82179890 t bios_parser_enable_crtc +ffffffff821798e0 t bios_parser_adjust_pixel_clock +ffffffff82179920 t bios_parser_set_pixel_clock +ffffffff82179960 t bios_parser_set_dce_clock +ffffffff821799a0 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff821799f0 t bios_parser_program_crtc_timing +ffffffff82179a30 t bios_parser_program_display_engine_pll +ffffffff82179a70 t bios_parser_enable_disp_power_gating +ffffffff82179ab0 t bios_parser_destroy +ffffffff82179b90 t bios_get_board_layout_info +ffffffff82179e30 t get_bios_object +ffffffff8217a030 t get_ss_info_from_ss_info_table +ffffffff8217a230 t get_ss_info_v3_1 +ffffffff8217a3a0 t get_ss_entry_number_from_ss_info_tbl +ffffffff8217b000 T firmware_parser_create +ffffffff8217d000 t bios_parser_get_connectors_number +ffffffff8217d170 t bios_parser_get_connector_id +ffffffff8217d1d0 t bios_parser_get_src_obj +ffffffff8217d4b0 t bios_parser_get_i2c_info +ffffffff8217d790 t bios_parser_get_hpd_info +ffffffff8217d930 t bios_parser_get_device_tag +ffffffff8217dc20 t bios_parser_get_spread_spectrum_info +ffffffff8217e0d0 t bios_parser_get_ss_entry_number +ffffffff8217e100 t bios_parser_get_embedded_panel_info +ffffffff8217e310 t bios_parser_get_gpio_pin_info +ffffffff8217e430 t bios_parser_get_encoder_cap_info +ffffffff8217e5a0 t bios_parser_is_accelerated_mode +ffffffff8217e5b0 t bios_parser_set_scratch_critical_state +ffffffff8217e5c0 t bios_parser_is_device_id_supported +ffffffff8217e630 t bios_parser_encoder_control +ffffffff8217e670 t bios_parser_transmitter_control +ffffffff8217e6b0 t bios_parser_enable_crtc +ffffffff8217e700 t bios_parser_set_pixel_clock +ffffffff8217e740 t bios_parser_set_dce_clock +ffffffff8217e780 t bios_parser_program_crtc_timing +ffffffff8217e7c0 t bios_parser_enable_disp_power_gating +ffffffff8217e800 t firmware_parser_destroy +ffffffff8217e8e0 t bios_get_board_layout_info +ffffffff8217edd0 t bios_parser_pack_data_tables +ffffffff8217ee00 t bios_get_atom_dc_golden_table +ffffffff8217ef60 t bios_parser_enable_lvtma_control +ffffffff8217efb0 t bios_parser_get_soc_bb_info +ffffffff8217f0c0 t bios_parser_get_disp_connector_caps_info +ffffffff8217f240 t bios_parser_get_lttpr_caps +ffffffff8217f3b0 t bios_parser_get_lttpr_interop +ffffffff8217f510 t bios_parser_get_connector_speed_cap_info +ffffffff8217f660 t get_bios_object +ffffffff8217f7d0 t get_bios_object_from_path_v3 +ffffffff82180000 T object_id_from_bios_object_id +ffffffff82181000 T bios_get_image +ffffffff82181050 T bios_is_accelerated_mode +ffffffff821810b0 T bios_set_scratch_acc_mode_change +ffffffff821810f0 T bios_set_scratch_critical_state +ffffffff82181130 T bios_get_vga_enabled_displays +ffffffff82182000 T dal_bios_parser_create +ffffffff82182070 T dal_bios_parser_destroy +ffffffff82183000 T dal_bios_parser_init_cmd_tbl +ffffffff82183910 t encoder_control_digx_v3 +ffffffff82183a30 t encoder_control_digx_v4 +ffffffff82183b50 t encoder_control_digx_v5 +ffffffff82183cb0 t encoder_control_dig1_v1 +ffffffff82183d50 t encoder_control_dig2_v1 +ffffffff82183df0 t encoder_control_dig_v1 +ffffffff82183e50 t transmitter_control_v2 +ffffffff82184000 t transmitter_control_v3 +ffffffff821841d0 t transmitter_control_v4 +ffffffff82184390 t transmitter_control_v1_5 +ffffffff82184530 t transmitter_control_v1_6 +ffffffff821846b0 t set_pixel_clock_v3 +ffffffff82184850 t set_pixel_clock_v5 +ffffffff82184a20 t set_pixel_clock_v6 +ffffffff82184bf0 t set_pixel_clock_v7 +ffffffff82184e00 t enable_spread_spectrum_on_ppll_v1 +ffffffff82184f20 t enable_spread_spectrum_on_ppll_v2 +ffffffff82185060 t enable_spread_spectrum_on_ppll_v3 +ffffffff82185180 t adjust_display_pll_v2 +ffffffff821852f0 t adjust_display_pll_v3 +ffffffff82185490 t dac1_encoder_control_v1 +ffffffff82185510 t dac2_encoder_control_v1 +ffffffff82185590 t dac1_output_control_v1 +ffffffff82185600 t dac2_output_control_v1 +ffffffff82185670 t set_crtc_using_dtd_timing_v3 +ffffffff821857e0 t set_crtc_timing_v1 +ffffffff82185980 t enable_crtc_v1 +ffffffff82185a30 t enable_crtc_mem_req_v1 +ffffffff82185ae0 t program_clock_v5 +ffffffff82185c00 t program_clock_v6 +ffffffff82185d30 t external_encoder_control_v3 +ffffffff82185f00 t enable_disp_power_gating_v2_1 +ffffffff82185fe0 t set_dce_clock_v2_1 +ffffffff82187000 T dal_firmware_parser_init_cmd_tbl +ffffffff82187460 t encoder_control_digx_v1_5 +ffffffff82187650 t encoder_control_fallback +ffffffff821876b0 t transmitter_control_v1_6 +ffffffff82187880 t transmitter_control_v1_7 +ffffffff82187aa0 t transmitter_control_fallback +ffffffff82187b00 t set_pixel_clock_v7 +ffffffff82187d90 t set_pixel_clock_fallback +ffffffff82187df0 t set_crtc_using_dtd_timing_v3 +ffffffff82187f60 t enable_crtc_v1 +ffffffff82188010 t external_encoder_control_v3 +ffffffff82188040 t enable_disp_power_gating_v2_1 +ffffffff821881c0 t enable_disp_power_gating_fallback +ffffffff82188220 t set_dce_clock_v2_1 +ffffffff82188360 t get_smu_clock_info_v3_1 +ffffffff821883d0 t enable_lvtma_control +ffffffff82189000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff821890c0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff821891e0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff82189270 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff82189300 T dal_cmd_table_helper_assign_control_parameter +ffffffff821893e0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff821894c0 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff8218a000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff8218a0d0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff8218a1e0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff8218a270 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff8218a300 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff8218a3e0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff8218b000 T dal_cmd_tbl_helper_dce110_get_table +ffffffff8218b030 t encoder_action_to_atom +ffffffff8218b0b0 t engine_bp_to_atom +ffffffff8218b100 t clock_source_id_to_atom +ffffffff8218b1a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff8218b1f0 t signal_type_to_atom_dig_mode +ffffffff8218b250 t hpd_sel_to_atom +ffffffff8218b290 t dig_encoder_sel_to_atom +ffffffff8218b2c0 t phy_id_to_atom +ffffffff8218b300 t disp_power_gating_action_to_atom +ffffffff8218c000 T dal_cmd_tbl_helper_dce112_get_table2 +ffffffff8218c030 t encoder_action_to_atom +ffffffff8218c0b0 t engine_bp_to_atom +ffffffff8218c100 t clock_source_id_to_atom +ffffffff8218c1d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff8218c220 t signal_type_to_atom_dig_mode +ffffffff8218c280 t hpd_sel_to_atom +ffffffff8218c2c0 t dig_encoder_sel_to_atom +ffffffff8218c2f0 t phy_id_to_atom +ffffffff8218c330 t disp_power_gating_action_to_atom +ffffffff8218c3a0 t dc_clock_type_to_atom +ffffffff8218c420 t transmitter_color_depth_to_atom +ffffffff8218d000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff8218d030 t encoder_action_to_atom +ffffffff8218d0b0 t engine_bp_to_atom +ffffffff8218d100 t clock_source_id_to_atom +ffffffff8218d1d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff8218d220 t signal_type_to_atom_dig_mode +ffffffff8218d280 t hpd_sel_to_atom +ffffffff8218d2c0 t dig_encoder_sel_to_atom +ffffffff8218d2f0 t phy_id_to_atom +ffffffff8218d330 t disp_power_gating_action_to_atom +ffffffff8218d3a0 t dc_clock_type_to_atom +ffffffff8218d420 t transmitter_color_depth_to_atom +ffffffff8218e000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff8218e030 t encoder_action_to_atom +ffffffff8218e0b0 t engine_bp_to_atom +ffffffff8218e100 t clock_source_id_to_atom +ffffffff8218e1d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff8218e220 t signal_type_to_atom_dig_mode +ffffffff8218e280 t hpd_sel_to_atom +ffffffff8218e2c0 t dig_encoder_sel_to_atom +ffffffff8218e310 t phy_id_to_atom +ffffffff8218e350 t disp_power_gating_action_to_atom +ffffffff8218f000 T clk_mgr_helper_get_active_display_cnt +ffffffff8218f0e0 T clk_mgr_helper_get_active_plane_cnt +ffffffff8218f190 T clk_mgr_exit_optimized_pwr_state +ffffffff8218f2b0 T clk_mgr_optimize_pwr_state +ffffffff8218f3b0 T dc_clk_mgr_create +ffffffff8218fb90 T dc_destroy_clk_mgr +ffffffff82190000 T dentist_get_divider_from_did +ffffffff82190070 T dce_adjust_dp_ref_freq_for_ss +ffffffff82190190 T dce_get_dp_ref_freq_khz +ffffffff821902e0 T dce12_get_dp_ref_freq_khz +ffffffff82190300 T dce_get_max_pixel_clock_for_all_paths +ffffffff82190510 T dce_get_required_clocks_state +ffffffff821905c0 T dce_set_clock +ffffffff82190730 T dce_clock_read_ss_info +ffffffff82190870 T dce_clk_mgr_construct +ffffffff82190a70 t dce_update_clocks +ffffffff82191000 T dce110_get_min_vblank_time_us +ffffffff82191090 T dce110_fill_display_configs +ffffffff82191310 T dce11_pplib_apply_display_requirements +ffffffff82191620 T dce110_clk_mgr_construct +ffffffff821916d0 t dce11_update_clocks +ffffffff82192000 T dce112_set_clock +ffffffff821921a0 T dce112_set_dispclk +ffffffff821922d0 T dce112_set_dprefclk +ffffffff82192350 T dce112_clk_mgr_construct +ffffffff82192410 t dce112_update_clocks +ffffffff82193000 T dce120_clk_mgr_construct +ffffffff821930a0 T dce121_clk_mgr_construct +ffffffff821931e0 t dce12_update_clocks +ffffffff82194000 T rv1_clk_mgr_construct +ffffffff821940c0 t rv1_update_clocks +ffffffff82194600 t rv1_init_clocks +ffffffff82194690 t rv1_enable_pme_wa +ffffffff82195000 T rv1_vbios_smu_set_dispclk +ffffffff821950f0 t rv1_vbios_smu_send_msg_with_param +ffffffff82195230 T rv1_vbios_smu_set_dprefclk +ffffffff82196000 T rv2_clk_mgr_construct +ffffffff82197000 T dentist_get_did_from_divider +ffffffff82197080 T dcn20_update_clocks_update_dpp_dto +ffffffff82197160 T dcn20_update_clocks_update_dentist +ffffffff821976f0 T dcn2_update_clocks +ffffffff82197ce0 T dcn2_read_clocks_from_hw_dentist +ffffffff82197dd0 T dcn2_update_clocks_fpga +ffffffff82197f00 T dcn2_init_clocks +ffffffff82197fa0 T dcn2_get_clock +ffffffff82198010 T dcn20_clk_mgr_construct +ffffffff82198160 t dcn2_enable_pme_wa +ffffffff821981b0 t dcn2_are_clock_states_equal +ffffffff82198220 t dcn2_notify_link_rate_change +ffffffff82199000 T dcn201_clk_mgr_construct +ffffffff82199130 t dcn201_update_clocks +ffffffff82199370 t dcn201_init_clocks +ffffffff8219a000 T rn_clk_mgr_construct +ffffffff8219a970 t rn_update_clocks +ffffffff8219af70 t rn_set_low_power_state +ffffffff8219b160 t rn_init_clocks +ffffffff8219b200 t rn_enable_pme_wa +ffffffff8219b210 t rn_are_clock_states_equal +ffffffff8219b260 t rn_notify_wm_ranges +ffffffff8219b600 t rn_notify_link_rate_change +ffffffff8219c000 T rn_vbios_smu_get_smu_version +ffffffff8219c020 t rn_vbios_smu_send_msg_with_param +ffffffff8219c200 T rn_vbios_smu_set_dispclk +ffffffff8219c330 T rn_vbios_smu_set_dprefclk +ffffffff8219c3a0 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff8219c420 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff8219c4a0 T rn_vbios_smu_set_phyclk +ffffffff8219c4e0 T rn_vbios_smu_set_dppclk +ffffffff8219c5a0 T rn_vbios_smu_set_dcn_low_power_state +ffffffff8219c5c0 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff8219c5e0 T rn_vbios_smu_enable_pme_wa +ffffffff8219c600 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff8219d000 T dcn3_init_clocks +ffffffff8219d470 t dcn3_init_clocks_fpga +ffffffff8219d480 T dcn3_clk_mgr_construct +ffffffff8219d600 T dcn3_clk_mgr_destroy +ffffffff8219d670 t dcn3_update_clocks +ffffffff8219dad0 t dcn3_enable_pme_wa +ffffffff8219db10 t dcn3_are_clock_states_equal +ffffffff8219db70 t dcn3_notify_wm_ranges +ffffffff8219de20 t dcn30_notify_link_rate_change +ffffffff8219df40 t dcn3_set_hard_min_memclk +ffffffff8219dfe0 t dcn3_set_hard_max_memclk +ffffffff8219e040 t dcn3_set_max_memclk +ffffffff8219e080 t dcn3_set_min_memclk +ffffffff8219e0c0 t dcn3_get_memclk_states_from_smu +ffffffff8219e220 t dcn3_is_smu_present +ffffffff8219f000 T dcn30_smu_test_message +ffffffff8219f070 t dcn30_smu_send_msg_with_param +ffffffff8219f220 T dcn30_smu_get_smu_version +ffffffff8219f240 T dcn30_smu_check_driver_if_version +ffffffff8219f2a0 T dcn30_smu_check_msg_header_version +ffffffff8219f300 T dcn30_smu_set_dram_addr_high +ffffffff8219f320 T dcn30_smu_set_dram_addr_low +ffffffff8219f340 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff8219f360 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff8219f380 T dcn30_smu_set_hard_min_by_freq +ffffffff8219f3e0 T dcn30_smu_set_hard_max_by_freq +ffffffff8219f440 T dcn30_smu_get_dpm_freq_by_index +ffffffff8219f4a0 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff8219f500 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff8219f520 T dcn30_smu_set_num_of_displays +ffffffff8219f540 T dcn30_smu_set_display_refresh_from_mall +ffffffff8219f570 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff8219f590 T dcn30_smu_set_pme_workaround +ffffffff821a0000 T dcn301_smu_get_smu_version +ffffffff821a0080 t dcn301_smu_send_msg_with_param +ffffffff821a0250 T dcn301_smu_set_dispclk +ffffffff821a0300 T dcn301_smu_set_dprefclk +ffffffff821a03c0 T dcn301_smu_set_hard_min_dcfclk +ffffffff821a0470 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff821a0520 T dcn301_smu_set_dppclk +ffffffff821a05d0 T dcn301_smu_set_display_idle_optimization +ffffffff821a0630 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff821a0690 T dcn301_smu_enable_pme_wa +ffffffff821a06b0 T dcn301_smu_set_dram_addr_high +ffffffff821a0710 T dcn301_smu_set_dram_addr_low +ffffffff821a0770 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff821a0790 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff821a1000 T vg_clk_mgr_construct +ffffffff821a1930 T vg_clk_mgr_destroy +ffffffff821a1980 t vg_update_clocks +ffffffff821a1d00 t vg_init_clocks +ffffffff821a1da0 t vg_enable_pme_wa +ffffffff821a1db0 t vg_are_clock_states_equal +ffffffff821a1e00 t vg_notify_wm_ranges +ffffffff821a3000 T dcn31_update_clocks +ffffffff821a36a0 T dcn31_init_clocks +ffffffff821a3750 T dcn31_are_clock_states_equal +ffffffff821a37b0 T dcn31_get_dtb_ref_freq_khz +ffffffff821a37e0 T dcn31_clk_mgr_construct +ffffffff821a3f50 T dcn31_clk_mgr_destroy +ffffffff821a3fa0 t dcn31_set_low_power_state +ffffffff821a41c0 t dcn31_enable_pme_wa +ffffffff821a41d0 t dcn31_notify_wm_ranges +ffffffff821a4570 t find_clk_for_voltage +ffffffff821a5000 T dcn31_smu_get_smu_version +ffffffff821a5020 t dcn31_smu_send_msg_with_param +ffffffff821a5290 T dcn31_smu_set_dispclk +ffffffff821a5310 T dcn31_smu_set_dprefclk +ffffffff821a5390 T dcn31_smu_set_hard_min_dcfclk +ffffffff821a5420 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff821a54b0 T dcn31_smu_set_dppclk +ffffffff821a5530 T dcn31_smu_set_display_idle_optimization +ffffffff821a5580 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff821a55d0 T dcn31_smu_enable_pme_wa +ffffffff821a5610 T dcn31_smu_set_dram_addr_high +ffffffff821a5650 T dcn31_smu_set_dram_addr_low +ffffffff821a5690 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff821a56d0 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff821a5710 T dcn31_smu_set_zstate_support +ffffffff821a5780 T dcn31_smu_set_dtbclk +ffffffff821a6000 T dcn314_update_clocks +ffffffff821a66d0 T dcn314_are_clock_states_equal +ffffffff821a6730 T dcn314_clk_mgr_construct +ffffffff821a74f0 T dcn314_clk_mgr_destroy +ffffffff821a7540 t dcn314_enable_pme_wa +ffffffff821a7550 t dcn314_notify_wm_ranges +ffffffff821a8000 T dcn314_smu_get_smu_version +ffffffff821a8020 t dcn314_smu_send_msg_with_param +ffffffff821a82b0 T dcn314_smu_set_dispclk +ffffffff821a8330 T dcn314_smu_set_dprefclk +ffffffff821a83b0 T dcn314_smu_set_hard_min_dcfclk +ffffffff821a8440 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff821a84d0 T dcn314_smu_set_dppclk +ffffffff821a8550 T dcn314_smu_set_display_idle_optimization +ffffffff821a85a0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff821a85f0 T dcn314_smu_enable_pme_wa +ffffffff821a8630 T dcn314_smu_set_dram_addr_high +ffffffff821a8670 T dcn314_smu_set_dram_addr_low +ffffffff821a86b0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff821a86f0 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff821a8730 T dcn314_smu_set_zstate_support +ffffffff821a8780 T dcn314_smu_set_dtbclk +ffffffff821a9000 T dcn315_clk_mgr_construct +ffffffff821a9890 T dcn315_clk_mgr_destroy +ffffffff821a98e0 t dcn315_update_clocks +ffffffff821a9ef0 t dcn315_enable_pme_wa +ffffffff821a9f00 t dcn315_notify_wm_ranges +ffffffff821aa2a0 t dcn315_disable_otg_wa +ffffffff821ab000 T dcn315_smu_get_smu_version +ffffffff821ab020 t dcn315_smu_send_msg_with_param +ffffffff821ab3d0 T dcn315_smu_set_dispclk +ffffffff821ab450 T dcn315_smu_set_hard_min_dcfclk +ffffffff821ab4e0 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff821ab570 T dcn315_smu_set_dppclk +ffffffff821ab5f0 T dcn315_smu_set_display_idle_optimization +ffffffff821ab640 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff821ab690 T dcn315_smu_enable_pme_wa +ffffffff821ab6d0 T dcn315_smu_set_dram_addr_high +ffffffff821ab710 T dcn315_smu_set_dram_addr_low +ffffffff821ab750 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff821ab790 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff821ab7d0 T dcn315_smu_get_dpref_clk +ffffffff821ab830 T dcn315_smu_get_dtbclk +ffffffff821ab890 T dcn315_smu_set_dtbclk +ffffffff821ac000 T dcn316_clk_mgr_construct +ffffffff821ac6e0 T dcn316_clk_mgr_destroy +ffffffff821ac730 t dcn316_update_clocks +ffffffff821acda0 t dcn316_enable_pme_wa +ffffffff821acdb0 t dcn316_notify_wm_ranges +ffffffff821ad150 t find_clk_for_voltage +ffffffff821ae000 T dcn316_smu_get_smu_version +ffffffff821ae020 t dcn316_smu_send_msg_with_param +ffffffff821ae200 T dcn316_smu_set_dispclk +ffffffff821ae280 T dcn316_smu_set_hard_min_dcfclk +ffffffff821ae310 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff821ae3a0 T dcn316_smu_set_dppclk +ffffffff821ae420 T dcn316_smu_set_display_idle_optimization +ffffffff821ae470 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff821ae4c0 T dcn316_smu_set_dram_addr_high +ffffffff821ae500 T dcn316_smu_set_dram_addr_low +ffffffff821ae540 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff821ae580 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff821ae5c0 T dcn316_smu_enable_pme_wa +ffffffff821ae600 T dcn316_smu_set_dtbclk +ffffffff821ae640 T dcn316_smu_get_dpref_clk +ffffffff821ae6a0 T dcn316_smu_get_smu_fclk +ffffffff821af000 T dcn32_init_clocks +ffffffff821af620 T dcn32_update_clocks_update_dpp_dto +ffffffff821af760 T dcn32_clk_mgr_construct +ffffffff821afa40 t dcn32_dump_clk_registers +ffffffff821afce0 T dcn32_clk_mgr_destroy +ffffffff821afd50 t dcn32_update_clocks +ffffffff821b06b0 t dcn32_enable_pme_wa +ffffffff821b06f0 t dcn32_are_clock_states_equal +ffffffff821b0760 t dcn32_notify_wm_ranges +ffffffff821b08f0 t dcn32_set_hard_min_memclk +ffffffff821b0980 t dcn32_set_hard_max_memclk +ffffffff821b09d0 t dcn32_set_max_memclk +ffffffff821b0a10 t dcn32_set_min_memclk +ffffffff821b0a50 t dcn32_get_memclk_states_from_smu +ffffffff821b0ce0 t dcn32_is_smu_present +ffffffff821b0d10 t dcn32_get_dispclk_from_dentist +ffffffff821b0db0 t dcn32_update_clocks_update_dentist +ffffffff821b2000 T dcn32_smu_send_fclk_pstate_message +ffffffff821b2020 t dcn32_smu_send_msg_with_param +ffffffff821b21a0 T dcn32_smu_send_cab_for_uclk_message +ffffffff821b21d0 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff821b21f0 T dcn32_smu_set_pme_workaround +ffffffff821b2210 T dcn32_smu_set_hard_min_by_freq +ffffffff821b2270 T dcn32_smu_wait_for_dmub_ack_mclk +ffffffff821b3000 T dc_stream_adjust_vmin_vmax +ffffffff821b3170 T dc_stream_get_last_used_drr_vtotal +ffffffff821b32e0 T dc_stream_get_crtc_position +ffffffff821b3540 T dc_stream_configure_crc +ffffffff821b36c0 T dc_stream_get_crc +ffffffff821b37b0 T dc_stream_set_dyn_expansion +ffffffff821b3a40 T dc_stream_set_dither_option +ffffffff821b3be0 T dc_stream_set_gamut_remap +ffffffff821b3d90 T dc_stream_program_csc_matrix +ffffffff821b3ff0 T dc_stream_set_static_screen_params +ffffffff821b4180 T dc_create +ffffffff821b47c0 t dc_construct_ctx +ffffffff821b4960 t dc_destruct +ffffffff821b4cc0 T dc_hardware_init +ffffffff821b4d90 T dc_init_callbacks +ffffffff821b4de0 T dc_deinit_callbacks +ffffffff821b4e30 T dc_destroy +ffffffff821b4ea0 T dc_validate_boot_timing +ffffffff821b52b0 T dc_enable_stereo +ffffffff821b53c0 T dc_trigger_sync +ffffffff821b5a20 T dc_z10_restore +ffffffff821b5a60 T dc_z10_save_init +ffffffff821b5aa0 T dc_commit_streams +ffffffff821b5ff0 t commit_minimal_transition_state +ffffffff821b6470 T dc_create_state +ffffffff821b6510 t dc_commit_state_no_check +ffffffff821b7e40 T dc_release_state +ffffffff821b7eb0 T dc_acquire_release_mpc_3dlut +ffffffff821b7f80 T dc_post_update_surfaces_to_stream +ffffffff821b8400 T dc_copy_state +ffffffff821b85f0 T dc_retain_state +ffffffff821b8620 T dc_set_generic_gpio_for_stereo +ffffffff821b8780 T dc_check_update_surfaces_for_stream +ffffffff821b9190 T dc_dmub_update_dirty_rect +ffffffff821b93a0 T dc_update_planes_and_stream +ffffffff821ba040 t fast_update_only +ffffffff821ba3a0 t commit_planes_for_stream_fast +ffffffff821ba7f0 t commit_planes_for_stream +ffffffff821bbf50 T dc_commit_updates_for_stream +ffffffff821bc630 t copy_surface_update_to_plane +ffffffff821bca50 t copy_stream_update_to_stream +ffffffff821bd150 T dc_get_current_stream_count +ffffffff821bd190 T dc_get_stream_at_index +ffffffff821bd1e0 T dc_interrupt_to_irq_source +ffffffff821bd200 T dc_interrupt_set +ffffffff821bd250 T dc_interrupt_ack +ffffffff821bd270 T dc_power_down_on_boot +ffffffff821bd2c0 T dc_set_power_state +ffffffff821bd4f0 T dc_resume +ffffffff821bd570 T dc_is_dmcu_initialized +ffffffff821bd5c0 T get_clock_requirements_for_state +ffffffff821bd640 T dc_set_clock +ffffffff821bd680 T dc_get_clock +ffffffff821bd6c0 T dc_set_psr_allow_active +ffffffff821bd7d0 T dc_allow_idle_optimizations +ffffffff821bd880 T dc_unlock_memory_clock_frequency +ffffffff821bd900 T dc_lock_memory_clock_frequency +ffffffff821bd9a0 T dc_enable_dcmode_clk_limit +ffffffff821bdb70 t blank_and_force_memclk +ffffffff821bdda0 T dc_is_plane_eligible_for_idle_optimizations +ffffffff821bde00 T dc_hardware_release +ffffffff821bde50 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff821bde90 T dc_is_dmub_outbox_supported +ffffffff821bdf00 T dc_enable_dmub_notifications +ffffffff821bdf70 T dc_enable_dmub_outbox +ffffffff821bdfc0 T dc_process_dmub_aux_transfer_async +ffffffff821be150 T get_link_index_from_dpia_port_index +ffffffff821be210 T dc_process_dmub_set_config_async +ffffffff821be2f0 T dc_process_dmub_set_mst_slots +ffffffff821be3e0 T dc_process_dmub_dpia_hpd_int_enable +ffffffff821be4b0 T dc_print_dmub_diagnostic_data +ffffffff821be4d0 T dc_disable_accelerated_mode +ffffffff821be4f0 T dc_notify_vsync_int_state +ffffffff821be720 T dc_abm_save_restore +ffffffff821be910 T dc_query_current_properties +ffffffff821be980 T dc_set_edp_power +ffffffff821be9f0 t create_links +ffffffff821beea0 t create_link_encoders +ffffffff821bef90 t dc_update_viusal_confirm_color +ffffffff821c0000 T pre_surface_trace +ffffffff821c0030 T update_surface_trace +ffffffff821c0060 T post_surface_trace +ffffffff821c0090 T context_timing_trace +ffffffff821c0260 T context_clock_trace +ffffffff821c0290 T dc_status_to_str +ffffffff821c1000 T find_color_matrix +ffffffff821c10b0 T color_space_to_black_color +ffffffff821c1120 T hwss_wait_for_blank_complete +ffffffff821c11d0 T get_mpctree_visual_confirm_color +ffffffff821c1230 T get_surface_visual_confirm_color +ffffffff821c12e0 T get_hdr_visual_confirm_color +ffffffff821c13a0 T get_subvp_visual_confirm_color +ffffffff821c14a0 T hwss_build_fast_sequence +ffffffff821c1b60 T hwss_execute_sequence +ffffffff821c1fc0 T hwss_setup_dpp +ffffffff821c2060 T hwss_program_bias_and_scale +ffffffff821c20e0 T hwss_program_manual_trigger +ffffffff821c2130 T hwss_power_on_mpc_mem_pwr +ffffffff821c2180 T hwss_set_output_csc +ffffffff821c21d0 T hwss_set_ocsc_default +ffffffff821c2220 T hwss_send_dmcub_cmd +ffffffff821c2240 T get_mclk_switch_visual_confirm_color +ffffffff821c23a0 T get_surface_tile_visual_confirm_color +ffffffff821c3000 T link_enc_cfg_init +ffffffff821c31f0 T link_enc_cfg_copy +ffffffff821c3220 T link_enc_cfg_link_encs_assign +ffffffff821c46c0 T link_enc_cfg_validate +ffffffff821c4e70 T link_enc_cfg_link_enc_unassign +ffffffff821c5000 T link_enc_cfg_is_transmitter_mappable +ffffffff821c5120 T link_enc_cfg_get_stream_using_link_enc +ffffffff821c5220 T link_enc_cfg_get_link_using_link_enc +ffffffff821c5330 T link_enc_cfg_get_link_enc_used_by_link +ffffffff821c54b0 T link_enc_cfg_get_next_avail_link_enc +ffffffff821c5620 T link_enc_cfg_get_link_enc_used_by_stream +ffffffff821c5640 T link_enc_cfg_get_link_enc +ffffffff821c56d0 T link_enc_cfg_get_link_enc_used_by_stream_current +ffffffff821c5850 T link_enc_cfg_is_link_enc_avail +ffffffff821c5a50 T link_enc_cfg_set_transient_mode +ffffffff821c6000 T dc_get_link_at_index +ffffffff821c6030 T dc_get_edp_links +ffffffff821c60b0 T dc_get_edp_link_panel_inst +ffffffff821c6170 T dc_link_detect +ffffffff821c61a0 T dc_link_detect_connection_type +ffffffff821c61d0 T dc_link_get_status +ffffffff821c6200 T dc_link_is_hdcp14 +ffffffff821c6230 T dc_link_is_hdcp22 +ffffffff821c6260 T dc_link_clear_dprx_states +ffffffff821c6290 T dc_link_reset_cur_dp_mst_topology +ffffffff821c62c0 T dc_link_bandwidth_kbps +ffffffff821c62f0 T dc_get_cur_link_res_map +ffffffff821c6310 T dc_restore_link_res_map +ffffffff821c6330 T dc_link_update_dsc_config +ffffffff821c6360 T dc_is_oem_i2c_device_present +ffffffff821c63b0 T dc_submit_i2c +ffffffff821c63e0 T dc_submit_i2c_oem +ffffffff821c6430 T dc_link_dp_handle_automated_test +ffffffff821c6460 T dc_link_dp_set_test_pattern +ffffffff821c6490 T dc_link_set_drive_settings +ffffffff821c6530 T dc_link_set_preferred_link_settings +ffffffff821c6550 T dc_link_set_preferred_training_settings +ffffffff821c6580 T dc_dp_trace_is_initialized +ffffffff821c65b0 T dc_dp_trace_set_is_logged_flag +ffffffff821c65e0 T dc_dp_trace_is_logged +ffffffff821c6610 T dc_dp_trace_get_lt_end_timestamp +ffffffff821c6640 T dc_dp_trace_get_lt_counts +ffffffff821c6670 T dc_dp_trace_get_link_loss_count +ffffffff821c66a0 T dc_link_add_remote_sink +ffffffff821c66d0 T dc_link_remove_remote_sink +ffffffff821c6700 T dc_link_aux_transfer_raw +ffffffff821c6730 T dc_link_bw_kbps_from_raw_frl_link_rate_data +ffffffff821c6750 T dc_link_decide_edp_link_settings +ffffffff821c6780 T dc_link_dp_get_max_link_enc_cap +ffffffff821c67b0 T dc_link_dp_mst_decide_link_encoding_format +ffffffff821c67e0 T dc_link_get_link_cap +ffffffff821c6810 T dc_link_get_highest_encoding_format +ffffffff821c68e0 T dc_link_is_dp_sink_present +ffffffff821c6910 T dc_link_is_fec_supported +ffffffff821c6940 T dc_link_overwrite_extended_receiver_cap +ffffffff821c6970 T dc_link_should_enable_fec +ffffffff821c69a0 T dc_link_dp_dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff821c69d0 T dc_link_handle_usb4_bw_alloc_response +ffffffff821c6a00 T dc_link_check_link_loss_status +ffffffff821c6a30 T dc_link_dp_allow_hpd_rx_irq +ffffffff821c6a60 T dc_link_dp_handle_link_loss +ffffffff821c6a90 T dc_link_dp_read_hpd_rx_irq_data +ffffffff821c6ac0 T dc_link_handle_hpd_rx_irq +ffffffff821c6af0 T dc_link_dp_receiver_power_ctrl +ffffffff821c6b20 T dc_link_decide_lttpr_mode +ffffffff821c6b50 T dc_link_edp_panel_backlight_power_on +ffffffff821c6b80 T dc_link_get_backlight_level +ffffffff821c6bb0 T dc_link_get_backlight_level_nits +ffffffff821c6be0 T dc_link_set_backlight_level +ffffffff821c6c10 T dc_link_set_backlight_level_nits +ffffffff821c6c40 T dc_link_get_target_backlight_pwm +ffffffff821c6c70 T dc_link_get_psr_state +ffffffff821c6ca0 T dc_link_set_psr_allow_active +ffffffff821c6cd0 T dc_link_setup_psr +ffffffff821c6d00 T dc_link_get_replay_state +ffffffff821c6d30 T dc_link_wait_for_t12 +ffffffff821c6d60 T dc_link_get_hpd_state +ffffffff821c6d90 T dc_link_enable_hpd +ffffffff821c6dc0 T dc_link_disable_hpd +ffffffff821c6df0 T dc_link_enable_hpd_filter +ffffffff821c6e20 T dc_link_dp_dpia_validate +ffffffff821c7000 T resource_parse_asic_id +ffffffff821c7250 T dc_create_resource_pool +ffffffff821c7620 T dc_destroy_resource_pool +ffffffff821c7690 T resource_construct +ffffffff821c7c70 T resource_unreference_clock_source +ffffffff821c7cf0 T resource_reference_clock_source +ffffffff821c7d70 T resource_get_clock_source_reference +ffffffff821c7df0 T resource_are_vblanks_synchronizable +ffffffff821c8010 T resource_are_streams_timing_synchronizable +ffffffff821c8100 T resource_find_used_clk_src_for_sharing +ffffffff821c8240 T resource_get_num_mpc_splits +ffffffff821c82d0 T resource_get_num_odm_splits +ffffffff821c83a0 T resource_get_otg_master +ffffffff821c8450 T resource_build_scaling_params +ffffffff821c92e0 t calculate_odm_slice_in_timing_active +ffffffff821c9470 T resource_build_scaling_params_for_context +ffffffff821c95f0 T resource_find_free_secondary_pipe_legacy +ffffffff821c9690 T resource_find_free_pipe_used_in_cur_mpc_blending_tree +ffffffff821c9700 T resource_is_pipe_type +ffffffff821c9780 T recource_find_free_pipe_not_used_in_cur_res_ctx +ffffffff821c9800 T resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine +ffffffff821c9920 T resource_is_for_mpcc_combine +ffffffff821c99b0 T resource_find_any_free_pipe +ffffffff821c9a20 T resource_get_otg_master_for_stream +ffffffff821c9b50 T resource_get_opp_head +ffffffff821c9bf0 T dc_add_plane_to_context +ffffffff821c9ef0 T dc_remove_plane_from_context +ffffffff821ca0f0 T dc_rem_all_planes_for_stream +ffffffff821ca2b0 T dc_add_all_planes_for_stream +ffffffff821ca430 T dc_is_timing_changed +ffffffff821ca4a0 T dc_is_stream_unchanged +ffffffff821ca590 T dc_is_stream_scaling_unchanged +ffffffff821ca640 T update_audio_usage +ffffffff821ca6b0 T dc_add_stream_to_ctx +ffffffff821ca7a0 T dc_remove_stream_from_ctx +ffffffff821cabf0 T resource_map_pool_resources +ffffffff821cb6e0 t acquire_first_split_pipe +ffffffff821cb860 t add_hpo_dp_link_enc_to_ctx +ffffffff821cb930 t find_first_free_audio +ffffffff821cb9e0 T dc_resource_state_copy_construct_current +ffffffff821cba00 T dc_resource_state_copy_construct +ffffffff821cbbd0 T dc_resource_state_construct +ffffffff821cbbf0 T dc_resource_is_dsc_encoding_supported +ffffffff821cbc40 T dc_validate_with_context +ffffffff821cc900 t planes_changed_for_existing_stream +ffffffff821cca90 T dc_validate_global_state +ffffffff821cce50 T dc_resource_state_destruct +ffffffff821ccf30 T dc_resource_find_first_free_pll +ffffffff821ccfa0 T resource_build_info_frame +ffffffff821cd6d0 T resource_map_clock_resources +ffffffff821cd880 T pipe_need_reprogram +ffffffff821cda00 T resource_build_bit_depth_reduction_params +ffffffff821cdc30 T dc_validate_stream +ffffffff821cde20 T dc_validate_plane +ffffffff821cdeb0 T resource_pixel_format_to_bpp +ffffffff821cdf30 T get_audio_check +ffffffff821ce050 T get_temp_dp_link_res +ffffffff821ce160 T reset_syncd_pipes_from_disabled_pipes +ffffffff821ce2b0 T check_syncd_pipes_for_disabled_master_pipe +ffffffff821ce410 T reset_sync_context_for_pipe +ffffffff821ce4c0 T resource_transmitter_to_phy_idx +ffffffff821ce520 T get_link_hwss +ffffffff821ce5e0 T is_h_timing_divisible_by_2 +ffffffff821ce640 T dc_resource_acquire_secondary_pipe_for_mpc_odm +ffffffff821ce870 T update_dp_encoder_resources_for_test_harness +ffffffff821ceb30 t calculate_plane_rec_in_timing_active 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dc_stream_send_dp_sdp +ffffffff821d34c0 T dc_stream_get_scanoutpos +ffffffff821d35a0 T dc_stream_dmdata_status_done +ffffffff821d3660 T dc_stream_set_dynamic_metadata +ffffffff821d37d0 T dc_stream_add_dsc_to_resource +ffffffff821d3820 T dc_stream_get_pipe_ctx +ffffffff821d38d0 T dc_stream_log +ffffffff821d4000 T enable_surface_flip_reporting +ffffffff821d4030 T dc_create_plane_state +ffffffff821d4200 T dc_plane_get_status +ffffffff821d4390 T dc_plane_state_retain +ffffffff821d43c0 T dc_plane_state_release +ffffffff821d4510 T dc_gamma_retain +ffffffff821d4540 T dc_gamma_release +ffffffff821d45a0 T dc_create_gamma +ffffffff821d4600 T dc_transfer_func_retain +ffffffff821d4630 T dc_transfer_func_release +ffffffff821d4680 T dc_create_transfer_func +ffffffff821d46e0 T dc_create_3dlut_func +ffffffff821d4740 T dc_3dlut_func_release +ffffffff821d4790 T dc_3dlut_func_retain +ffffffff821d5000 T vm_helper_mark_vmid_used +ffffffff821d5030 T dc_setup_system_context +ffffffff821d50d0 T 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dce100_add_stream_to_ctx +ffffffff822050d0 T dce100_validate_plane +ffffffff82205110 T dce100_find_first_free_match_stream_enc_for_link +ffffffff822051c0 T dce100_create_resource_pool +ffffffff822061b0 t dce100_resource_destruct +ffffffff822064e0 t dce100_destroy_resource_pool +ffffffff82206550 t dce100_panel_cntl_create +ffffffff822065e0 t dce100_link_encoder_create +ffffffff82206700 t dce100_validate_bandwidth +ffffffff82206840 t dce100_validate_global +ffffffff822068e0 t read_dce_straps +ffffffff82206950 t create_audio +ffffffff82206980 t dce100_stream_encoder_create +ffffffff82206a20 t dce100_hwseq_create +ffffffff82207000 T dce110_compressor_power_up_fbc +ffffffff82207170 T dce110_compressor_enable_fbc +ffffffff822073e0 T dce110_compressor_is_fbc_enabled_in_hw +ffffffff822074b0 T dce110_compressor_disable_fbc +ffffffff82207810 T dce110_compressor_program_compressed_surface_address_and_pitch +ffffffff82207950 T dce110_compressor_set_fbc_invalidation_triggers +ffffffff822079f0 T dce110_compressor_create +ffffffff82207aa0 T dce110_compressor_construct +ffffffff82207b20 T dce110_compressor_destroy +ffffffff82207b70 T get_max_support_fbc_buffersize +ffffffff82208000 T dce110_update_info_frame +ffffffff82208100 T dce110_enable_stream +ffffffff822081c0 T dce110_edp_wait_for_hpd_ready +ffffffff822084c0 T dce110_edp_power_control +ffffffff82208ae0 T dce110_edp_wait_for_T12 +ffffffff82208cd0 T dce110_edp_backlight_control +ffffffff82209080 T dce110_enable_audio_stream +ffffffff82209160 T dce110_disable_audio_stream +ffffffff82209240 T dce110_disable_stream +ffffffff82209500 T dce110_unblank_stream +ffffffff82209610 T dce110_blank_stream +ffffffff822097b0 T dce110_set_avmute +ffffffff82209800 T dce110_enable_accelerated_mode +ffffffff82209c00 t power_down_all_hw_blocks +ffffffff82209e00 T dce110_set_safe_displaymarks +ffffffff82209f30 T dce110_apply_ctx_to_hw +ffffffff8220a900 t enable_fbc +ffffffff8220aae0 T dce110_power_down +ffffffff8220ac00 T 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dce_mem_input_v_program_surface_config +ffffffff8220fbf0 t dce_mem_input_v_is_surface_pending +ffffffff8220fc70 t program_urgency_watermark +ffffffff8220fdc0 t program_nbp_watermark +ffffffff8220ff90 t program_stutter_watermark +ffffffff82211000 T dce110_opp_v_set_csc_default +ffffffff82211360 t program_color_matrix_v +ffffffff82211500 t configure_graphics_mode_v +ffffffff822115f0 T dce110_opp_v_set_csc_adjustment +ffffffff82212000 T dce110_opp_program_regamma_pwl_v +ffffffff82212590 t power_on_lut +ffffffff822126f0 T dce110_opp_power_on_regamma_lut_v +ffffffff82212760 T dce110_opp_set_regamma_mode_v +ffffffff82213000 T dce110_opp_v_construct +ffffffff82214000 T dce110_resource_build_pipe_hw_param +ffffffff82214160 T dce110_find_first_free_match_stream_enc_for_link +ffffffff82214200 T dce110_create_resource_pool +ffffffff82215460 t dce110_resource_destruct +ffffffff82215830 t dce110_destroy_resource_pool +ffffffff822158a0 t dce110_panel_cntl_create +ffffffff82215930 t dce110_link_encoder_create +ffffffff82215a50 t dce110_validate_bandwidth +ffffffff82215b50 t dce110_validate_global +ffffffff82215c30 t dce110_acquire_underlay +ffffffff82215e30 t dce110_validate_plane +ffffffff82215e90 t dce110_add_stream_to_ctx +ffffffff82215f90 t read_dce_straps +ffffffff82216000 t create_audio +ffffffff82216030 t dce110_stream_encoder_create +ffffffff822160d0 t dce110_hwseq_create +ffffffff82217000 T dce110_timing_generator_set_early_control +ffffffff82217080 T dce110_timing_generator_enable_crtc +ffffffff82217130 T dce110_timing_generator_program_blank_color +ffffffff822171d0 T dce110_timing_generator_disable_crtc +ffffffff82217230 T dce110_timing_generator_program_timing_generator +ffffffff82217450 T dce110_timing_generator_set_drr +ffffffff822175c0 T dce110_timing_generator_set_static_screen_control +ffffffff82217650 T dce110_timing_generator_get_vblank_counter +ffffffff822176b0 T dce110_timing_generator_get_position +ffffffff82217760 T dce110_timing_generator_get_crtc_scanoutpos +ffffffff82217860 T dce110_timing_generator_program_blanking +ffffffff82217b40 T dce110_timing_generator_set_test_pattern +ffffffff82217ea0 T dce110_timing_generator_validate_timing +ffffffff82217f70 T dce110_timing_generator_wait_for_vblank +ffffffff82218110 T dce110_timing_generator_is_counter_moving +ffffffff822181a0 T dce110_timing_generator_wait_for_vactive +ffffffff82218290 T dce110_timing_generator_setup_global_swap_lock +ffffffff82218430 T dce110_timing_generator_tear_down_global_swap_lock +ffffffff822184c0 T dce110_timing_generator_enable_advanced_request +ffffffff82218560 T dce110_timing_generator_set_lock_master +ffffffff822185d0 T dce110_timing_generator_enable_reset_trigger +ffffffff822186e0 T dce110_timing_generator_enable_crtc_reset +ffffffff82218920 T dce110_timing_generator_disable_reset_trigger +ffffffff82218a40 T dce110_timing_generator_did_triggered_reset_occur +ffffffff82218ae0 T dce110_timing_generator_disable_vga +ffffffff82218b50 T dce110_timing_generator_set_overscan_color_black +ffffffff82218c00 T dce110_tg_program_blank_color +ffffffff82218cd0 T dce110_tg_set_overscan_color +ffffffff82218d30 T dce110_tg_program_timing +ffffffff82218d60 T dce110_tg_is_blanked +ffffffff82218dd0 T dce110_tg_set_blank +ffffffff82218e30 T dce110_tg_validate_timing +ffffffff82218f00 T dce110_tg_wait_for_state +ffffffff82219020 T dce110_tg_set_colors +ffffffff82219180 T dce110_arm_vert_intr +ffffffff82219260 T dce110_configure_crc +ffffffff822193f0 t dce110_is_tg_enabled +ffffffff82219450 T dce110_get_crc +ffffffff82219540 T dce110_timing_generator_construct +ffffffff8221a000 T dce110_timing_generator_v_construct +ffffffff8221a070 t dce110_timing_generator_v_program_timing +ffffffff8221a3d0 t dce110_timing_generator_v_enable_crtc +ffffffff8221a470 t dce110_timing_generator_v_disable_crtc +ffffffff8221a4f0 t dce110_timing_generator_v_is_counter_moving +ffffffff8221a580 t dce110_timing_generator_v_get_vblank_counter +ffffffff8221a5e0 t dce110_timing_generator_v_set_early_control +ffffffff8221a650 t dce110_timing_generator_v_wait_for_state +ffffffff8221a840 t dce110_timing_generator_v_set_blank +ffffffff8221a8e0 t dce110_timing_generator_v_set_overscan_color_black +ffffffff8221a990 t dce110_timing_generator_v_program_blank_color +ffffffff8221aa20 t dce110_timing_generator_v_set_colors +ffffffff8221ab60 t dce110_timing_generator_v_disable_vga +ffffffff8221ab90 t dce110_timing_generator_v_did_triggered_reset_occur +ffffffff8221abe0 t dce110_timing_generator_v_setup_global_swap_lock +ffffffff8221ac00 t dce110_timing_generator_v_enable_reset_trigger +ffffffff8221ac20 t dce110_timing_generator_v_disable_reset_trigger +ffffffff8221ac40 t dce110_timing_generator_v_tear_down_global_swap_lock +ffffffff8221ac60 t dce110_timing_generator_v_enable_advanced_request +ffffffff8221b000 T dce110_transform_v_construct +ffffffff8221b060 t dce110_xfmv_reset +ffffffff8221b0c0 t dce110_xfmv_set_scaler +ffffffff8221b960 t dce110_xfmv_set_pixel_storage_depth +ffffffff8221ba50 t dce110_xfmv_set_gamut_remap +ffffffff8221ba80 t program_multi_taps_filter +ffffffff8221bf40 t program_viewport +ffffffff8221d000 T dce112_compressor_power_up_fbc +ffffffff8221d170 T dce112_compressor_enable_fbc +ffffffff8221d370 T dce112_compressor_is_fbc_enabled_in_hw +ffffffff8221d440 T dce112_compressor_enable_lpt +ffffffff8221d5a0 t wait_for_fbc_state_changed +ffffffff8221d8f0 T dce112_compressor_disable_fbc +ffffffff8221da10 T dce112_compressor_disable_lpt +ffffffff8221dbd0 T dce112_compressor_is_lpt_enabled_in_hw +ffffffff8221dc30 T dce112_compressor_program_compressed_surface_address_and_pitch +ffffffff8221dda0 T dce112_compressor_program_lpt_control +ffffffff8221e020 T dce112_compressor_set_fbc_invalidation_triggers +ffffffff8221e0c0 T dce112_compressor_construct +ffffffff8221e190 T dce112_compressor_create +ffffffff8221e290 T dce112_compressor_destroy +ffffffff8221f000 T dce112_hw_sequencer_construct +ffffffff8221f060 t dce112_enable_display_power_gating +ffffffff82220000 T dce112_validate_bandwidth +ffffffff822200d0 T resource_map_phy_clock_resources +ffffffff82220250 T dce112_add_stream_to_ctx +ffffffff82220320 T dce112_create_resource_pool +ffffffff822219c0 t dce112_resource_destruct +ffffffff82221cf0 t dce112_destroy_resource_pool +ffffffff82221d60 t dce112_panel_cntl_create +ffffffff82221df0 t dce112_link_encoder_create +ffffffff82221f10 t dce112_validate_global +ffffffff82221fb0 t read_dce_straps +ffffffff82222020 t create_audio +ffffffff82222050 t dce112_stream_encoder_create +ffffffff822220f0 t dce112_hwseq_create +ffffffff82223000 T dce121_xgmi_enabled +ffffffff82223070 T dce120_hw_sequencer_construct +ffffffff822230d0 t dce120_enable_display_power_gating +ffffffff82223100 t dce120_update_dchub +ffffffff82224000 T dce120_create_resource_pool +ffffffff822255f0 t dce120_resource_destruct +ffffffff82225910 t dce120_destroy_resource_pool +ffffffff82225980 t dce120_panel_cntl_create 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dpp1_cnv_setup +ffffffff82231a50 T dpp1_set_cursor_attributes +ffffffff82231b90 T dpp1_set_cursor_position +ffffffff82231cf0 T dpp1_cnv_set_optional_cursor_attributes +ffffffff82231dc0 T dpp1_dppclk_control +ffffffff82231ed0 T dpp1_construct +ffffffff82231f50 t dpp1_cm_set_regamma_pwl +ffffffff82233000 T dpp1_cm_set_gamut_remap +ffffffff822331b0 T dpp1_cm_set_output_csc_default +ffffffff82233250 t dpp1_cm_program_color_matrix +ffffffff82233430 T dpp1_cm_set_output_csc_adjustment +ffffffff82233440 T dpp1_cm_power_on_regamma_lut +ffffffff822334d0 T dpp1_cm_program_regamma_lut +ffffffff82233720 T dpp1_cm_configure_regamma_lut +ffffffff82233840 T dpp1_cm_program_regamma_luta_settings +ffffffff822339f0 T dpp1_cm_program_regamma_lutb_settings +ffffffff82233ba0 T dpp1_program_input_csc +ffffffff82233e20 T dpp1_program_bias_and_scale +ffffffff82233fa0 T dpp1_program_degamma_lutb_settings +ffffffff82234160 T dpp1_program_degamma_luta_settings +ffffffff82234320 T dpp1_power_on_degamma_lut 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hubp1_program_deadline +ffffffff8223d4b0 T hubp1_is_flip_pending +ffffffff8223d5e0 T min_set_viewport +ffffffff8223d920 T hubp1_read_state_common +ffffffff8223e7d0 T hubp1_read_state +ffffffff8223eac0 T hubp1_get_cursor_pitch +ffffffff8223eb70 T hubp1_cursor_set_attributes +ffffffff8223ee50 T hubp1_cursor_set_position +ffffffff8223f1f0 T hubp1_clk_cntl +ffffffff8223f240 T hubp1_vtg_sel +ffffffff8223f280 T hubp1_in_blank +ffffffff8223f2f0 T hubp1_soft_reset +ffffffff8223f330 T hubp1_set_flip_int +ffffffff8223f380 T hubp1_init +ffffffff8223f3b0 T dcn10_hubp_construct +ffffffff8223f420 t hubp1_setup +ffffffff8223f4f0 t hubp1_setup_interdependent +ffffffff8223f8c0 t hubp1_set_vm_system_aperture_settings +ffffffff8223fb10 t hubp1_set_vm_context0_settings +ffffffff8223fe40 t hubp1_set_hubp_blank_en +ffffffff8223fe80 t hubp1_disconnect +ffffffff8223ff20 t hubp1_disable_control +ffffffff8223ff60 t hubp1_get_underflow_status +ffffffff8223ffd0 t hubp1_wait_pipe_read_start +ffffffff82241000 T dcn10_lock_all_pipes +ffffffff82241150 T dcn10_log_hw_state +ffffffff82242ec0 T dcn10_did_underflow_occur +ffffffff82242f80 T dcn10_enable_power_gating_plane +ffffffff82243160 T dcn10_disable_vga +ffffffff822433a0 T dcn10_dpp_pg_control +ffffffff82243610 T dcn10_hubp_pg_control +ffffffff822438a0 T dcn10_bios_golden_init +ffffffff82243a30 T dcn10_enable_stream_timing +ffffffff82243eb0 T dcn10_verify_allow_pstate_change_high +ffffffff82244260 T dcn10_plane_atomic_disconnect +ffffffff822443a0 T dcn10_plane_atomic_power_down +ffffffff82244510 T dcn10_plane_atomic_disable +ffffffff82244680 T dcn10_disable_plane +ffffffff82244850 T dcn10_init_pipes +ffffffff82244fe0 T dcn10_init_hw +ffffffff822455a0 T dcn10_power_down_on_boot +ffffffff82245730 T dcn10_reset_hw_ctx_wrap +ffffffff82245ad0 T dcn10_update_plane_addr +ffffffff82245c00 T dcn10_set_input_transfer_func +ffffffff82245da0 T dcn10_set_output_transfer_func +ffffffff82245e80 T dcn10_pipe_control_lock +ffffffff82245f50 T dcn10_cursor_lock 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dcn10_link_encoder_dp_set_phy_pattern +ffffffff82250df0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff82251050 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff82251380 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff822514e0 T dcn10_link_encoder_enable_hpd +ffffffff82251520 T dcn10_link_encoder_disable_hpd +ffffffff82251560 T dcn10_get_dig_mode +ffffffff822515e0 T dcn10_link_encoder_get_max_link_cap +ffffffff82251660 t program_pattern_symbols +ffffffff82252000 T mpc1_set_bg_color +ffffffff82252210 T mpc1_get_mpcc +ffffffff822522b0 T mpc1_update_stereo_mix +ffffffff822523e0 T mpc1_assert_idle_mpcc +ffffffff822524c0 T mpc1_get_mpcc_for_dpp +ffffffff82252580 T mpc1_is_mpcc_idle +ffffffff82252680 T mpc1_assert_mpcc_idle_before_connect +ffffffff822527e0 T mpc1_insert_plane +ffffffff82252e00 T mpc1_remove_mpcc +ffffffff82253210 T mpc1_mpc_init +ffffffff82253580 T mpc1_mpc_init_single_inst +ffffffff82253790 T mpc1_init_mpcc_list_from_hw +ffffffff82253ab0 T mpc1_read_mpcc_state +ffffffff82253c70 T mpc1_cursor_lock +ffffffff82253cf0 T mpc1_get_mpc_out_mux +ffffffff82253d80 T dcn10_mpc_construct +ffffffff82253f00 t mpc1_update_blending +ffffffff82255000 T opp1_program_bit_depth_reduction +ffffffff82255440 T opp1_set_dyn_expansion +ffffffff822555c0 T opp1_program_fmt +ffffffff822558e0 T opp1_program_stereo +ffffffff822559e0 T opp1_pipe_clock_control +ffffffff82255a20 T opp1_destroy +ffffffff82255a70 T dcn10_opp_construct +ffffffff82256000 T optc1_program_global_sync +ffffffff82256170 T optc1_setup_vertical_interrupt0 +ffffffff82256200 T optc1_setup_vertical_interrupt1 +ffffffff82256270 T optc1_setup_vertical_interrupt2 +ffffffff822562e0 T optc1_program_timing +ffffffff82256a30 T optc1_is_two_pixels_per_containter +ffffffff82256a80 T optc1_set_vtg_params +ffffffff82256bb0 T optc1_set_blank_data_double_buffer +ffffffff82256bf0 T optc1_set_timing_double_buffer +ffffffff82256c30 T optc1_set_blank +ffffffff82256d20 T optc1_is_blanked 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enc1_stream_encoder_set_avmute +ffffffff8225f220 T enc1_reset_hdmi_stream_attribute +ffffffff8225f2f0 T get_audio_clock_info +ffffffff8225f3e0 T enc1_se_enable_audio_clock +ffffffff8225f440 T enc1_se_enable_dp_audio +ffffffff8225f520 T enc1_se_audio_mute_control +ffffffff8225f570 T enc1_se_dp_audio_setup +ffffffff8225f580 t enc1_se_audio_setup +ffffffff8225f6f0 T enc1_se_dp_audio_enable +ffffffff8225f990 T enc1_se_dp_audio_disable +ffffffff8225fb10 T enc1_se_hdmi_audio_setup +ffffffff82260050 T enc1_se_hdmi_audio_disable +ffffffff822600e0 T enc1_setup_stereo_sync +ffffffff82260170 T enc1_dig_connect_to_otg +ffffffff822601b0 T enc1_dig_source_otg +ffffffff82260220 T enc1_stream_encoder_dp_get_pixel_format +ffffffff82260310 T dcn10_stream_encoder_construct +ffffffff82260370 t enc1_stream_encoder_update_hdmi_info_packets +ffffffff82260790 t enc1_stream_encoder_stop_hdmi_info_packets +ffffffff82261000 T dccg2_update_dpp_dto +ffffffff82261170 T dccg2_get_dccg_ref_freq +ffffffff82261230 T dccg2_set_fifo_errdet_ovr_en +ffffffff82261270 T dccg2_otg_add_pixel +ffffffff82261310 T dccg2_otg_drop_pixel +ffffffff822613b0 T dccg2_init +ffffffff822613e0 T dccg2_create +ffffffff822614a0 T dcn_dccg_destroy +ffffffff82262000 T dpp20_read_state +ffffffff82262220 T dpp2_power_on_obuf +ffffffff82262310 T dpp2_dummy_program_input_lut +ffffffff82262340 T dscl2_calc_lb_num_partitions +ffffffff82262470 T dpp2_cnv_set_alpha_keyer +ffffffff82262740 T dpp2_set_cursor_attributes +ffffffff822628b0 T oppn20_dummy_program_regamma_pwl +ffffffff822628e0 T dpp2_construct +ffffffff82262960 t dpp2_cnv_setup +ffffffff82264000 T dpp2_set_degamma_pwl +ffffffff82264430 T dpp2_set_degamma +ffffffff822645e0 T dpp2_cm_set_gamut_remap +ffffffff82264830 T dpp2_program_input_csc +ffffffff82264a80 T dpp20_program_blnd_lut +ffffffff82265250 T dpp20_program_shaper +ffffffff822673d0 T dpp20_program_3dlut +ffffffff82267b60 t dpp20_set3dlut_ram12 +ffffffff82267d50 T dpp2_set_hdr_multiplier +ffffffff82268000 T dsc2_construct +ffffffff82268050 T dsc2_get_enc_caps +ffffffff822680d0 T dsc_config_log +ffffffff82268190 T dsc2_get_packed_pps +ffffffff82268390 T dsc_prepare_config +ffffffff82268950 T dsc_log_pps +ffffffff822692c0 T dsc_override_rc_params +ffffffff82269410 T dsc_init_reg_values +ffffffff82269500 T dsc_dc_pixel_encoding_to_dsc_pixel_format +ffffffff822695b0 T dsc_dc_color_depth_to_dsc_bits_per_comp +ffffffff822695f0 T dsc_update_from_dsc_parameters +ffffffff822696b0 t dsc2_read_state +ffffffff822698b0 t dsc2_validate_stream +ffffffff82269910 t dsc2_set_config +ffffffff8226ade0 t dsc2_enable +ffffffff8226afd0 t dsc2_disable +ffffffff8226b190 t dsc2_disconnect +ffffffff8226c000 T dwb2_config_dwb_cnv +ffffffff8226c240 T dwb2_disable +ffffffff8226c380 T dwb2_is_enabled +ffffffff8226c430 T dwb2_set_stereo +ffffffff8226c530 T dwb2_set_new_content +ffffffff8226c5b0 T dwb2_set_scaler +ffffffff8226c9b0 T dcn20_dwbc_construct +ffffffff8226ca00 t dwb2_get_caps +ffffffff8226cae0 t dwb2_enable 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hubp2_program_rotation +ffffffff82272320 T hubp2_dcc_control +ffffffff822723f0 T hubp2_program_pixel_format +ffffffff822729d0 T hubp2_program_surface_config +ffffffff82272c50 T hubp2_get_lines_per_chunk +ffffffff82272d10 T hubp2_cursor_set_attributes +ffffffff82273100 T hubp2_dmdata_set_attributes +ffffffff82273550 T hubp2_dmdata_load +ffffffff822735f0 T hubp2_dmdata_status_done +ffffffff82273670 T hubp2_program_surface_flip_and_addr +ffffffff82274030 T hubp2_enable_triplebuffer +ffffffff82274100 T hubp2_is_triplebuffer_enabled +ffffffff82274180 T hubp2_set_flip_control_surface_gsl +ffffffff822741d0 T hubp2_is_flip_pending +ffffffff82274300 T hubp2_set_blank +ffffffff82274370 T hubp2_set_blank_regs +ffffffff82274480 T hubp2_cursor_set_position +ffffffff82274930 T hubp2_clk_cntl +ffffffff82274980 T hubp2_vtg_sel +ffffffff822749c0 T hubp2_clear_underflow +ffffffff82274a10 T hubp2_read_state_common +ffffffff82275800 T hubp2_read_state +ffffffff82275af0 T hubp2_construct +ffffffff82275b60 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dcn20_pipe_control_lock +ffffffff8227ab70 T dcn20_program_front_end_for_ctx +ffffffff8227b9d0 t dcn20_program_pipe +ffffffff8227c5b0 T dcn20_post_unlock_program_front_end +ffffffff8227c920 T dcn20_prepare_bandwidth +ffffffff8227caa0 T dcn20_optimize_bandwidth +ffffffff8227ccd0 T dcn20_update_bandwidth +ffffffff8227cfc0 T dcn20_enable_writeback +ffffffff8227d140 T dcn20_disable_writeback +ffffffff8227d1e0 T dcn20_wait_for_blank_complete +ffffffff8227d280 T dcn20_dmdata_status_done +ffffffff8227d2d0 T dcn20_disable_stream_gating +ffffffff8227d380 T dcn20_enable_stream_gating +ffffffff8227d430 T dcn20_set_dmdata_attributes +ffffffff8227d4f0 T dcn20_init_vm_ctx +ffffffff8227d5c0 T dcn20_init_sys_ctx +ffffffff8227d670 T dcn20_update_plane_addr +ffffffff8227d7c0 T dcn20_unblank_stream +ffffffff8227d9a0 T dcn20_setup_vupdate_interrupt +ffffffff8227da10 T dcn20_reset_hw_ctx_wrap +ffffffff8227de20 T dcn20_update_mpcc +ffffffff8227e0c0 T dcn20_enable_stream +ffffffff8227e470 T dcn20_program_dmdata_engine +ffffffff8227e510 T dcn20_fpga_init_hw +ffffffff8227eb90 T dcn20_optimize_timing_for_fsft +ffffffff8227ebd0 T dcn20_set_disp_pattern_generator +ffffffff8227f000 T dcn20_hw_sequencer_construct +ffffffff82280000 T enc2_fec_set_enable +ffffffff82280090 T enc2_fec_set_ready +ffffffff822800d0 T enc2_fec_is_active +ffffffff82280140 T link_enc2_read_state +ffffffff82280210 T dcn20_link_encoder_enable_dp_output +ffffffff82280320 T dcn20_link_encoder_get_max_link_cap +ffffffff822803e0 T dcn20_link_encoder_is_in_alt_mode +ffffffff82280460 T enc2_hw_init +ffffffff82280570 T dcn20_link_encoder_construct +ffffffff82281000 T mmhubbub2_config_mcif_irq +ffffffff82281150 T mmhubbub2_enable_mcif +ffffffff82281190 T mmhubbub2_disable_mcif +ffffffff822811d0 T mcifwb2_dump_frame +ffffffff82281310 T dcn20_mmhubbub_construct +ffffffff82281360 t mmhubbub2_config_mcif_buf +ffffffff82281ab0 t mmhubbub2_config_mcif_arb +ffffffff82282000 T mpc2_update_blending +ffffffff822822d0 T mpc2_set_denorm +ffffffff82282340 T mpc2_set_denorm_clamp +ffffffff822824b0 T mpc2_set_output_csc +ffffffff822826c0 T mpc2_set_ocsc_default +ffffffff822828d0 T mpc20_power_on_ogam_lut +ffffffff82282950 T mpc2_set_output_gamma +ffffffff822831d0 T mpc2_assert_idle_mpcc +ffffffff82283300 T mpc2_assert_mpcc_idle_before_connect +ffffffff822835c0 T dcn20_mpc_construct +ffffffff82283680 t mpc2_get_mpcc_for_dpp +ffffffff82284000 T opp2_set_disp_pattern_generator +ffffffff822848b0 T opp2_dpg_set_blank_color +ffffffff82284a50 T opp2_program_dpg_dimensions +ffffffff82284af0 T opp2_dpg_is_blanked +ffffffff82284bc0 T opp2_program_left_edge_extra_pixel +ffffffff82284c10 T dcn20_opp_construct +ffffffff82285000 T optc2_enable_crtc +ffffffff82285130 T optc2_set_gsl +ffffffff82285230 T optc2_set_gsl_source_select +ffffffff822852f0 T optc2_set_dsc_config +ffffffff822853d0 T optc2_get_dsc_status +ffffffff82285410 T optc2_is_two_pixels_per_containter +ffffffff82285420 T optc2_set_odm_bypass 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dcn201_set_cursor_attribute +ffffffff822952f0 T dcn201_set_dmdata_attributes +ffffffff82295400 T dcn201_unblank_stream +ffffffff82296000 T dcn201_hw_sequencer_construct +ffffffff82297000 T dcn201_link_encoder_construct +ffffffff822971a0 t dcn201_link_encoder_is_in_alt_mode +ffffffff82297210 t dcn201_link_encoder_get_max_link_cap +ffffffff82298000 T dcn201_mpc_construct +ffffffff822980c0 t mpc201_set_out_rate_control +ffffffff82299000 T dcn201_opp_construct +ffffffff8229a000 T optc201_is_two_pixels_per_containter +ffffffff8229a010 T dcn201_timing_generator_init +ffffffff8229a080 t optc201_validate_timing +ffffffff8229a180 t optc201_triplebuffer_unlock +ffffffff8229a240 t optc201_triplebuffer_lock +ffffffff8229a380 t optc201_get_optc_source +ffffffff8229b000 T dcn201_create_resource_pool +ffffffff8229bb50 t dcn201_resource_destruct +ffffffff8229beb0 t dcn201_destroy_resource_pool +ffffffff8229bf20 t dcn201_link_init +ffffffff8229bf70 t dcn201_link_encoder_create +ffffffff8229c030 t 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cm3_helper_convert_to_custom_float +ffffffff822ab6a0 T cm3_helper_translate_curve_to_degamma_hw_format +ffffffff822abf80 T is_rgb_equal +ffffffff822ac000 T dccg3_create +ffffffff822ac0c0 T dccg30_create +ffffffff822ad000 T dcn30_link_encoder_validate_output_with_stream +ffffffff822ad010 T dcn30_link_encoder_construct +ffffffff822ad210 T enc3_hw_init +ffffffff822ae000 T enc3_stream_encoder_update_hdmi_info_packets +ffffffff822ae150 t enc3_update_hdmi_info_packet +ffffffff822ae590 T enc3_stream_encoder_stop_hdmi_info_packets +ffffffff822aebf0 T enc3_dp_set_dsc_pps_info_packet +ffffffff822aef70 T enc3_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff822af040 T enc3_stream_encoder_update_dp_info_packets +ffffffff822af350 T enc3_audio_mute_control +ffffffff822af3d0 T enc3_se_dp_audio_setup +ffffffff822af460 T enc3_se_dp_audio_enable +ffffffff822af580 T enc3_se_hdmi_audio_setup +ffffffff822af910 T dcn30_dio_stream_encoder_construct +ffffffff822af980 t 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dcn30_update_bw_bounding_box +ffffffff822cd5f0 T dcn30_create_resource_pool +ffffffff822ceef0 t dcn30_resource_destruct +ffffffff822cf550 t dcn30_destroy_resource_pool +ffffffff822cf5c0 t dcn30_panel_cntl_create +ffffffff822cf650 t dcn30_link_encoder_create +ffffffff822cf710 t dcn30_get_panel_config_defaults +ffffffff822cf790 t read_dce_straps +ffffffff822cf7c0 t dcn30_create_audio +ffffffff822cf7f0 t dcn30_stream_encoder_create +ffffffff822cf9b0 t dcn30_hwseq_create +ffffffff822d0000 T vpg3_update_generic_info_packet +ffffffff822d0a10 T vpg3_construct +ffffffff822d1000 T dccg301_create +ffffffff822d2000 T dcn301_link_encoder_construct +ffffffff822d3000 T hubbub301_construct +ffffffff822d4000 T dcn301_hw_sequencer_construct +ffffffff822d5000 T optc301_set_drr +ffffffff822d5260 T optc301_setup_manual_trigger +ffffffff822d5390 T dcn301_timing_generator_init +ffffffff822d6000 T dcn301_panel_cntl_construct +ffffffff822d6050 t dcn301_panel_cntl_destroy +ffffffff822d60a0 t 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dcn31_get_16_bit_backlight_from_pwm +ffffffff822f8000 T dcn31x_populate_dml_pipes_from_context +ffffffff822f8190 T dcn31_populate_dml_pipes_from_context +ffffffff822f8610 T dcn31_calculate_wm_and_dlg +ffffffff822f8690 T dcn31_populate_dml_writeback_from_context +ffffffff822f8700 T dcn31_set_mcif_arb_params +ffffffff822f8770 T dcn31_validate_bandwidth +ffffffff822f8bd0 T dcn31_create_resource_pool +ffffffff822fa220 t dcn31_resource_destruct +ffffffff822fa9a0 t dcn31_destroy_resource_pool +ffffffff822faa10 t dcn31_panel_cntl_create +ffffffff822faa80 t dcn31_link_encoder_create +ffffffff822fab40 t dcn31_link_enc_create_minimal +ffffffff822fac00 t dcn31_get_panel_config_defaults +ffffffff822fac40 t read_dce_straps +ffffffff822fac70 t dcn31_create_audio +ffffffff822faca0 t dcn31_stream_encoder_create +ffffffff822fae60 t dcn31_hpo_dp_stream_encoder_create +ffffffff822fb070 t dcn31_hpo_dp_link_encoder_create +ffffffff822fb110 t dcn31_hwseq_create +ffffffff822fc000 T vpg31_powerdown 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enc314_reset_fifo +ffffffff82300000 T dcn314_update_odm +ffffffff823006a0 T dcn314_dsc_pg_control +ffffffff82300ac0 T dcn314_enable_power_gating_plane +ffffffff82300da0 T dcn314_calculate_dccg_k1_k2_values +ffffffff82300f60 T dcn314_set_pixels_per_cycle +ffffffff82301050 T dcn314_resync_fifo_dccg_dio +ffffffff82301210 T dcn314_dpp_root_clock_control +ffffffff82301270 T dcn314_disable_link_output +ffffffff82302000 T dcn314_hw_sequencer_construct +ffffffff82303000 T dcn314_timing_generator_init +ffffffff82303070 t optc314_enable_crtc +ffffffff823031a0 t optc314_disable_crtc +ffffffff82303290 t optc314_phantom_crtc_post_enable +ffffffff82303360 t optc314_set_odm_bypass +ffffffff823034f0 t optc314_set_odm_combine +ffffffff82303810 t optc314_set_h_timing_div_manual_mode +ffffffff82304000 T dcn314_validate_bandwidth +ffffffff82304520 T dcn314_create_resource_pool +ffffffff82305b30 t dcn314_resource_destruct +ffffffff823062b0 t dcn314_get_preferred_eng_id_dpia +ffffffff823062e0 t dcn314_destroy_resource_pool +ffffffff82306350 t dcn31_panel_cntl_create +ffffffff823063c0 t dcn31_link_encoder_create +ffffffff82306480 t dcn31_link_enc_create_minimal +ffffffff82306540 t dcn314_populate_dml_pipes_from_context +ffffffff823065f0 t dcn314_update_bw_bounding_box +ffffffff82306650 t dcn314_get_panel_config_defaults +ffffffff82306690 t read_dce_straps +ffffffff823066c0 t dcn31_create_audio +ffffffff823066f0 t dcn314_stream_encoder_create +ffffffff823068b0 t dcn31_hpo_dp_stream_encoder_create +ffffffff82306ac0 t dcn31_hpo_dp_link_encoder_create +ffffffff82306b60 t dcn314_hwseq_create +ffffffff82307000 T dcn315_create_resource_pool +ffffffff82308540 t dcn315_resource_destruct +ffffffff82308ca0 t dcn315_destroy_resource_pool +ffffffff82308d10 t dcn31_panel_cntl_create +ffffffff82308d80 t dcn31_link_encoder_create +ffffffff82308e40 t dcn31_link_enc_create_minimal +ffffffff82308f00 t dcn315_populate_dml_pipes_from_context +ffffffff82309670 t dcn315_get_panel_config_defaults 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dccg32_get_dccg_ref_freq +ffffffff8230d0f0 t dccg32_otg_add_pixel +ffffffff8230d130 t dccg32_otg_drop_pixel +ffffffff8230d170 t dccg32_set_dpstreamclk +ffffffff8230d4c0 t dccg32_set_dtbclk_dto +ffffffff8230d700 t dccg32_set_pixel_rate_div +ffffffff8230da80 t dccg32_set_valid_pixel_rate +ffffffff8230db00 t dccg32_trigger_dio_fifo_resync +ffffffff8230e000 T enc32_hw_init +ffffffff8230e0b0 T dcn32_link_encoder_enable_dp_output +ffffffff8230e100 T dcn32_link_encoder_construct +ffffffff8230e300 t dcn32_link_encoder_is_in_alt_mode +ffffffff8230e380 t dcn32_link_encoder_get_max_link_cap +ffffffff8230f000 T enc32_stream_encoder_dp_unblank +ffffffff8230f5b0 T enc32_enable_fifo +ffffffff8230f670 t enc32_reset_fifo +ffffffff8230f790 T dcn32_dio_stream_encoder_construct +ffffffff8230f800 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff8230fdf0 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff8230ff90 t enc32_read_state +ffffffff82310120 t enc32_dp_set_dsc_config +ffffffff82310170 t enc32_dp_set_odm_combine +ffffffff823101b0 t enc32_set_dig_input_mode +ffffffff82311000 T dpp32_construct +ffffffff82311060 t dscl32_calc_lb_num_partitions +ffffffff82312000 T hpo_dp_link_encoder32_construct +ffffffff82312060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff82313000 T hubbub32_set_request_limit +ffffffff82313140 T dcn32_program_det_size +ffffffff82313310 T hubbub32_program_urgent_watermarks +ffffffff82313b10 T hubbub32_program_stutter_watermarks +ffffffff82313fa0 T hubbub32_program_pstate_watermarks +ffffffff82314470 T hubbub32_program_usr_watermarks +ffffffff823146f0 T hubbub32_force_usr_retraining_allow +ffffffff82314780 T hubbub32_force_wm_propagate_to_pipes +ffffffff82314830 T hubbub32_init +ffffffff82314990 T hubbub32_construct +ffffffff82314a10 t hubbub32_wm_read_state +ffffffff82314f10 t hubbub32_program_watermarks +ffffffff82315060 t hubbub32_init_watermarks +ffffffff823155e0 t dcn32_program_compbuf_size +ffffffff823158b0 t dcn32_init_crb +ffffffff82316000 T hubp32_update_force_pstate_disallow +ffffffff82316090 T hubp32_update_force_cursor_pstate_disallow +ffffffff82316120 T hubp32_update_mall_sel +ffffffff823161c0 T hubp32_prepare_subvp_buffering +ffffffff82316260 T hubp32_phantom_hubp_post_enable +ffffffff82316390 T hubp32_cursor_set_attributes +ffffffff82316690 T hubp32_init +ffffffff823166c0 T hubp32_construct +ffffffff82317000 T dcn32_dsc_pg_control +ffffffff82317370 T dcn32_enable_power_gating_plane +ffffffff82317630 T dcn32_hubp_pg_control +ffffffff823178e0 T dcn32_apply_idle_power_optimizations +ffffffff82317bf0 T dcn32_commit_subvp_config +ffffffff82317ca0 T dcn32_subvp_pipe_control_lock +ffffffff82317e80 T dcn32_subvp_pipe_control_lock_fast +ffffffff82317f00 T dcn32_set_mpc_shaper_3dlut +ffffffff82318030 T dcn32_set_mcm_luts +ffffffff823181f0 T dcn32_set_input_transfer_func +ffffffff82318350 T dcn32_set_output_transfer_func +ffffffff823185d0 T dcn32_update_force_pstate +ffffffff82318820 T dcn32_update_mall_sel +ffffffff82318a30 T dcn32_program_mall_pipe_config +ffffffff82318b20 T dcn32_init_hw +ffffffff82319520 T dcn32_update_odm +ffffffff82319bc0 T dcn32_calculate_dccg_k1_k2_values +ffffffff82319e20 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff82319ed0 T dcn32_set_pixels_per_cycle +ffffffff8231a030 T dcn32_resync_fifo_dccg_dio +ffffffff8231a200 T dcn32_unblank_stream +ffffffff8231a450 T dcn32_disable_link_output +ffffffff8231a840 T dcn32_update_phantom_vp_position +ffffffff8231a950 T dcn32_apply_update_flags_for_phantom +ffffffff8231a9e0 T dcn32_dsc_pg_status +ffffffff8231aac0 T dcn32_update_dsc_pg +ffffffff8231abd0 T dcn32_enable_phantom_streams +ffffffff8231ad30 T dcn32_init_blank +ffffffff8231afc0 T dcn32_blank_phantom +ffffffff8231b170 T dcn32_is_pipe_topology_transition_seamless +ffffffff8231c000 T dcn32_hw_sequencer_init_functions +ffffffff8231d000 T dcn32_mmhubbub_construct +ffffffff8231d050 t mmhubbub32_warmup_mcif +ffffffff8231d2a0 t mmhubbub32_config_mcif_buf +ffffffff8231d800 t mmhubbub32_config_mcif_arb +ffffffff8231e000 T mpc32_mpc_init +ffffffff8231e210 T mpc32_power_on_blnd_lut +ffffffff8231e3b0 T mpc32_configure_post1dlut +ffffffff8231e4c0 T mpc32_program_post1dluta_settings +ffffffff8231e6e0 T mpc32_program_post1dlutb_settings +ffffffff8231e900 T mpc32_program_post1dlut_pwl +ffffffff8231ed90 T mpc32_program_post1dlut +ffffffff8231f100 T mpc32_configure_shaper_lut +ffffffff8231f230 T mpc32_program_shaper_luta_settings +ffffffff82320190 T mpc32_program_shaper_lutb_settings +ffffffff823210f0 T mpc32_program_shaper_lut +ffffffff823212b0 T mpc32_power_on_shaper_3dlut +ffffffff82321510 T mpc32_program_shaper +ffffffff823218a0 T mpc32_select_3dlut_ram +ffffffff82321950 T mpc32_select_3dlut_ram_mask +ffffffff82321a30 T mpc32_set3dlut_ram12 +ffffffff82321c40 T mpc32_set3dlut_ram10 +ffffffff82321d20 T mpc32_program_3dlut +ffffffff823227e0 T dcn32_mpc_construct +ffffffff82323000 T optc32_set_h_timing_div_manual_mode +ffffffff82323040 T dcn32_timing_generator_init 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dcn32_dwbc_create +ffffffff823360c0 t dcn32_mmhubbub_create +ffffffff823365a0 t dcn32_resource_destruct +ffffffff82336d30 t dcn32_destroy_resource_pool +ffffffff82336da0 t dcn32_link_encoder_create +ffffffff82337e80 t dcn32_update_bw_bounding_box +ffffffff82337ee0 t read_dce_straps +ffffffff82337f10 t dcn32_create_audio +ffffffff82338290 t dcn32_stream_encoder_create +ffffffff8233a110 t dcn32_hpo_dp_stream_encoder_create +ffffffff8233af40 t dcn32_hpo_dp_link_encoder_create +ffffffff8233b3b0 t dcn32_hwseq_create +ffffffff8233b8a0 t dcn32_vpg_create +ffffffff8233c000 T dcn32_helper_mall_bytes_to_ways +ffffffff8233c060 T dcn32_helper_calculate_mall_bytes_for_cursor +ffffffff8233c100 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff8233c180 T dcn32_merge_pipes_for_subvp +ffffffff8233c350 T dcn32_all_pipes_have_stream_and_plane +ffffffff8233c3e0 T dcn32_subvp_in_use +ffffffff8233c470 T dcn32_mpo_in_use +ffffffff8233c4e0 T dcn32_any_surfaces_rotated +ffffffff8233c570 T dcn32_is_center_timing +ffffffff8233c5e0 T dcn32_is_psr_capable +ffffffff8233c630 T dcn32_determine_det_override +ffffffff8233c970 T dcn32_set_det_allocations +ffffffff8233cb00 T dcn32_save_mall_state +ffffffff8233cbb0 T dcn32_restore_mall_state +ffffffff8233cc60 T dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8233ce50 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8233cf00 T dcn32_check_native_scaling_for_res +ffffffff8233cf60 T dcn32_subvp_drr_admissable +ffffffff8233d130 T dcn32_subvp_vblank_admissable +ffffffff8233e000 T dcn321_link_encoder_construct +ffffffff8233f000 T dcn321_create_resource_pool +ffffffff8233f0d0 t dcn321_resource_construct +ffffffff8234a840 t dcn321_mpc_create +ffffffff8234eea0 t dcn321_dwbc_create +ffffffff8234f8d0 t dcn321_mmhubbub_create +ffffffff8234fdb0 t dcn321_resource_destruct +ffffffff82350540 t dcn321_destroy_resource_pool +ffffffff823505b0 t dcn321_link_encoder_create +ffffffff82351690 t dcn321_update_bw_bounding_box +ffffffff823516f0 t read_dce_straps +ffffffff82351720 t dcn321_create_audio +ffffffff82351aa0 t dcn321_stream_encoder_create +ffffffff82353920 t dcn321_hpo_dp_stream_encoder_create +ffffffff82354750 t dcn321_hpo_dp_link_encoder_create +ffffffff82354bc0 t dcn321_hwseq_create +ffffffff823550b0 t dcn321_vpg_create +ffffffff82356000 T bw_int_to_fixed_nonconst +ffffffff823560a0 T bw_frc_to_fixed +ffffffff82356290 T bw_floor2 +ffffffff82356350 T bw_ceil2 +ffffffff823563d0 T bw_mul +ffffffff82357000 T convert_to_custom_float_format +ffffffff82358000 T bw_calcs_init +ffffffff82358f30 T bw_calcs +ffffffff8235ae40 t calculate_bandwidth +ffffffff82364000 T scaler_settings_calculation +ffffffff82364370 T mode_support_and_system_configuration +ffffffff8236a680 T display_pipe_configuration +ffffffff8236b000 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff82370000 T dcn_bw_mod +ffffffff82370060 T dcn_bw_min2 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T dcn20_populate_dml_pipes_from_context +ffffffff82377ba0 T dcn20_calculate_wm +ffffffff823784a0 T dcn20_update_bounding_box +ffffffff82378730 T dcn20_cap_soc_clocks +ffffffff82378aa0 T dcn20_patch_bounding_box +ffffffff82378c90 T dcn20_validate_bandwidth_fp +ffffffff82378e60 t dcn20_validate_bandwidth_internal +ffffffff823792e0 T dcn20_fpu_set_wm_ranges +ffffffff82379390 T dcn20_fpu_adjust_dppclk +ffffffff82379430 T dcn21_populate_dml_pipes_from_context +ffffffff82379550 T dcn21_validate_bandwidth_fp +ffffffff8237a090 T dcn21_update_bw_bounding_box +ffffffff8237a4c0 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff8237a530 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff8237a840 t calculate_wm_set_for_vlevel +ffffffff8237b000 T dml20_recalculate +ffffffff8237b7b0 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82381050 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff82388900 t TruncToValidBPP +ffffffff82388af0 t CalculateVMAndRowBytes +ffffffff82389210 t CalculatePrefetchSourceLines +ffffffff82389400 t CalculateWriteBackDelay +ffffffff82389740 t CalculatePrefetchSchedule +ffffffff8238a700 t CalculateFlipSchedule +ffffffff8238ab10 t adjust_ReturnBW +ffffffff8238b000 T dml20v2_recalculate +ffffffff8238b7b0 t dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82391190 T dml20v2_ModeSupportAndSystemConfigurationFull +ffffffff82398990 t TruncToValidBPP +ffffffff82398f30 t CalculateVMAndRowBytes +ffffffff82399650 t CalculatePrefetchSourceLines +ffffffff82399840 t CalculateWriteBackDelay +ffffffff82399b80 t CalculateDelayAfterScaler +ffffffff82399f10 t CalculatePrefetchSchedule +ffffffff8239ad30 t CalculateFlipSchedule +ffffffff8239b140 t adjust_ReturnBW +ffffffff8239c000 T dml20_rq_dlg_get_rq_reg +ffffffff8239c4e0 t dml20_rq_dlg_get_rq_params +ffffffff8239c6b0 T dml20_rq_dlg_get_dlg_reg +ffffffff8239e980 t get_surf_rq_param +ffffffff8239f210 t calculate_ttu_cursor +ffffffff823a0000 T dml20v2_rq_dlg_get_rq_reg +ffffffff823a04e0 t dml20v2_rq_dlg_get_rq_params +ffffffff823a06b0 T dml20v2_rq_dlg_get_dlg_reg +ffffffff823a2990 t get_surf_rq_param +ffffffff823a3220 t calculate_ttu_cursor +ffffffff823a4000 T dml21_recalculate +ffffffff823a4770 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff823aa290 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff823b0b30 t TruncToValidBPP +ffffffff823b10d0 t CalculateDCFCLKDeepSleep +ffffffff823b1440 t CalculateVMAndRowBytes +ffffffff823b1cf0 t CalculatePrefetchSourceLines +ffffffff823b1ee0 t CalculateWriteBackDelay +ffffffff823b2220 t CalculatePrefetchSchedulePerPlane +ffffffff823b2a80 t CalculateUrgentBurstFactor +ffffffff823b2ec0 t CalculateFlipSchedule +ffffffff823b3400 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff823b4440 t CalculatePrefetchSchedule +ffffffff823b6000 T dml21_rq_dlg_get_rq_reg +ffffffff823b64e0 t dml_rq_dlg_get_rq_params +ffffffff823b66b0 T dml21_rq_dlg_get_dlg_reg +ffffffff823b8e10 t get_surf_rq_param +ffffffff823b9780 t calculate_ttu_cursor +ffffffff823ba000 T optc3_fpu_set_vrr_m_const +ffffffff823ba540 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff823ba860 T dcn30_fpu_set_mcif_arb_params +ffffffff823baa20 T dcn30_fpu_update_soc_for_wm_a +ffffffff823baaf0 T dcn30_fpu_calculate_wm_and_dlg +ffffffff823bb690 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff823bb8b0 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff823bb920 T dcn30_fpu_update_max_clk +ffffffff823bb9d0 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff823bbae0 T dcn30_fpu_update_bw_bounding_box +ffffffff823bbcd0 T dcn3_fpu_build_wm_range_table +ffffffff823bbfb0 T patch_dcn30_soc_bounding_box +ffffffff823bd000 T dml30_recalculate +ffffffff823bd610 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff823c4470 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff823c46e0 T dml30_CalculateWriteBackDISPCLK +ffffffff823c4870 t dml_max3 +ffffffff823c48e0 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff823cc7a0 t CalculateSwathAndDETConfiguration +ffffffff823ccec0 t TruncToValidBPP +ffffffff823cd130 t CalculateVMAndRowBytes +ffffffff823cd800 t CalculatePrefetchSourceLines +ffffffff823cd9f0 t CalculateUrgentBurstFactor +ffffffff823cdca0 t CalculateDCFCLKDeepSleep +ffffffff823cdff0 t UseMinimumDCFCLK +ffffffff823cf390 t CalculatePrefetchSchedule +ffffffff823d0940 t CalculateFlipSchedule +ffffffff823d0e90 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff823d1c40 t CalculateSwathWidth +ffffffff823d3000 T dml30_rq_dlg_get_rq_reg +ffffffff823d34f0 t dml_rq_dlg_get_rq_params +ffffffff823d3790 T dml30_rq_dlg_get_dlg_reg +ffffffff823d62f0 t get_surf_rq_param +ffffffff823d6cb0 t calculate_ttu_cursor +ffffffff823d7000 T dcn301_update_bw_bounding_box +ffffffff823d7300 T dcn301_fpu_set_wm_ranges +ffffffff823d73b0 T dcn301_fpu_init_soc_bounding_box +ffffffff823d7460 T dcn301_calculate_wm_and_dlg_fp +ffffffff823d77d0 t calculate_wm_set_for_vlevel +ffffffff823d8000 T dcn302_fpu_update_bw_bounding_box +ffffffff823d8980 T dcn302_fpu_init_soc_bounding_box +ffffffff823d9000 T dcn303_fpu_update_bw_bounding_box +ffffffff823d99e0 T dcn303_fpu_init_soc_bounding_box +ffffffff823da000 T dcn31_zero_pipe_dcc_fraction +ffffffff823da070 T dcn31_update_soc_for_wm_a +ffffffff823da130 T dcn315_update_soc_for_wm_a +ffffffff823da210 T dcn31_calculate_wm_and_dlg_fp +ffffffff823da900 T dcn31_update_bw_bounding_box +ffffffff823dacc0 T dcn315_update_bw_bounding_box +ffffffff823dafc0 T dcn316_update_bw_bounding_box +ffffffff823db3a0 T dcn_get_max_non_odm_pix_rate_100hz +ffffffff823db400 T dcn_get_approx_det_segs_required_for_pstate +ffffffff823dc000 T dml31_recalculate +ffffffff823dc300 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff823e3640 T dml31_CalculateWriteBackDISPCLK +ffffffff823e37d0 t dml_max3 +ffffffff823e3840 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff823ebd20 t CalculateSwathAndDETConfiguration +ffffffff823ec3c0 t TruncToValidBPP +ffffffff823ec620 t CalculateDCFCLKDeepSleep +ffffffff823ec970 t CalculateVMAndRowBytes +ffffffff823ed010 t CalculatePrefetchSourceLines +ffffffff823ed200 t CalculateUrgentBurstFactor +ffffffff823ed4b0 t UseMinimumDCFCLK +ffffffff823ee4d0 t CalculatePrefetchSchedulePerPlane +ffffffff823eec50 t CalculateFlipSchedule +ffffffff823ef240 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff823efec0 t CalculateSwathWidth +ffffffff823f0430 t CalculatePrefetchSchedule +ffffffff823f1950 t CalculateVupdateAndDynamicMetadataParameters +ffffffff823f2000 T dml31_rq_dlg_get_rq_reg +ffffffff823f24f0 t dml_rq_dlg_get_rq_params +ffffffff823f2790 T dml31_rq_dlg_get_dlg_reg +ffffffff823f5680 t get_surf_rq_param +ffffffff823f7000 T dcn314_update_bw_bounding_box_fpu +ffffffff823f7410 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff823f8000 T dml314_recalculate +ffffffff823f82a0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff823ff4c0 T dml314_CalculateWriteBackDISPCLK +ffffffff823ff650 t dml_max3 +ffffffff823ff6c0 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff82407df0 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff82408060 t CalculateSwathAndDETConfiguration +ffffffff824086d0 t TruncToValidBPP +ffffffff82408930 t CalculateDCFCLKDeepSleep +ffffffff82408c80 t CalculateVMAndRowBytes +ffffffff82409320 t CalculatePrefetchSourceLines +ffffffff82409510 t CalculateUrgentBurstFactor +ffffffff824097c0 t CalculateMaxVStartup +ffffffff82409930 t UseMinimumDCFCLK +ffffffff8240a950 t CalculatePrefetchSchedulePerPlane +ffffffff8240b0d0 t CalculateFlipSchedule +ffffffff8240b6c0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8240c340 t CalculateSwathWidth +ffffffff8240c8b0 t CalculatePrefetchSchedule +ffffffff8240ddd0 t CalculateVupdateAndDynamicMetadataParameters +ffffffff8240f000 T dml314_rq_dlg_get_rq_reg +ffffffff8240f4f0 t dml_rq_dlg_get_rq_params +ffffffff8240f790 T dml314_rq_dlg_get_dlg_reg +ffffffff82412670 t get_surf_rq_param +ffffffff82414000 T dcn32_build_wm_range_table_fpu +ffffffff824143a0 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff82414570 T dcn32_internal_validate_bw +ffffffff824165f0 T dcn32_helper_populate_phantom_dlg_params +ffffffff824167b0 T dcn32_predict_pipe_split +ffffffff82416a00 T dcn32_set_phantom_stream_timing +ffffffff82416d30 T dcn32_determine_max_vratio_prefetch +ffffffff82416e10 t dcn32_split_stream_for_mpc_or_odm +ffffffff82417200 T dcn32_calculate_wm_and_dlg_fpu +ffffffff82418b20 T dcn32_patch_dpm_table +ffffffff82418d30 T dcn32_update_bw_bounding_box_fpu +ffffffff8241b450 T dcn32_zero_pipe_dcc_fraction +ffffffff8241b4c0 T dcn32_allow_subvp_with_active_margin +ffffffff8241b590 T dcn32_allow_subvp_high_refresh_rate +ffffffff8241b7b0 T dcn32_assign_fpo_vactive_candidate +ffffffff8241b870 T dcn32_find_vactive_pipe +ffffffff8241b9e0 T dcn32_set_clock_limits +ffffffff8241ba30 T dcn32_override_min_req_memclk +ffffffff8241bb00 t subvp_drr_schedulable +ffffffff8241bdc0 t get_optimal_ntuple +ffffffff8241d000 T dml32_recalculate +ffffffff82421510 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff8242a000 T dml32_dscceComputeDelay +ffffffff8242a150 T dml32_dscComputeDelay +ffffffff8242a190 T IsVertical +ffffffff8242a1c0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff8242a540 t dml_max3 +ffffffff8242a5b0 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff8242a8e0 T dml32_CalculateSwathAndDETConfiguration +ffffffff8242b140 T dml32_CalculateSwathWidth +ffffffff8242bab0 T dml32_UnboundedRequest +ffffffff8242bb20 T dml32_CalculateDETBufferSize +ffffffff8242c1a0 T dml32_CalculateODMMode +ffffffff8242c970 T dml32_CalculateRequiredDispclk +ffffffff8242cb40 T dml32_RoundToDFSGranularity +ffffffff8242cbd0 T dml32_CalculateOutputLink +ffffffff8242d6d0 T dml32_TruncToValidBPP +ffffffff8242da10 T dml32_CalculateDPPCLK +ffffffff8242dbc0 T dml32_RequiredDTBCLK +ffffffff8242de60 t dml_max4 +ffffffff8242def0 T dml32_DSCDelayRequirement +ffffffff8242e400 T dml32_CalculateSurfaceSizeInMall +ffffffff8242f110 T dml32_CalculateVMRowAndSwath +ffffffff8242ff50 T dml32_CalculateVMAndRowBytes +ffffffff82430cb0 T dml32_CalculatePrefetchSourceLines +ffffffff82430f20 T dml32_CalculateMALLUseForStaticScreen +ffffffff82431060 T dml32_CalculateRowBandwidth +ffffffff824311c0 T dml32_CalculateUrgentLatency +ffffffff82431280 T dml32_CalculateUrgentBurstFactor +ffffffff82431540 T dml32_CalculateDCFCLKDeepSleep +ffffffff824318b0 T dml32_CalculateWriteBackDelay +ffffffff82431a30 T dml32_UseMinimumDCFCLK +ffffffff82432b10 T dml32_CalculateExtraLatencyBytes +ffffffff82432ce0 T dml32_CalculateTWait +ffffffff82432de0 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff82433060 T dml32_get_return_bw_mbps +ffffffff82433240 T dml32_get_return_bw_mbps_vm_only +ffffffff82433330 T dml32_CalculateExtraLatency +ffffffff82433560 T dml32_CalculatePrefetchSchedule +ffffffff82434d30 T dml32_CalculateFlipSchedule +ffffffff82435300 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff824364c0 T dml32_CalculateWriteBackDISPCLK +ffffffff824366b0 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff82436700 T dml32_CalculatePixelDeliveryTimes +ffffffff82436b90 T dml32_CalculateMetaAndPTETimes +ffffffff82437300 T dml32_CalculateVMGroupAndRequestTimes +ffffffff82437870 T dml32_CalculateDCCConfiguration +ffffffff82437ed0 T dml32_CalculateStutterEfficiency +ffffffff82438e90 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff82438f90 T dml32_CalculateVActiveBandwithSupport +ffffffff82439100 T dml32_CalculatePrefetchBandwithSupport +ffffffff82439430 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff82439590 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff82439820 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff8243a000 T dml32_rq_dlg_get_rq_reg +ffffffff8243a750 T dml32_rq_dlg_get_dlg_reg +ffffffff8243d000 T dcn321_update_bw_bounding_box_fpu +ffffffff8243f820 t get_optimal_ntuple +ffffffff82440000 T dml_init_instance +ffffffff82440320 T dml_get_status_message +ffffffff82440360 T dml_log_pipe_params +ffffffff82440390 T dml_log_mode_support_params +ffffffff82441000 T dml_get_voltage_level +ffffffff824412c0 t fetch_socbb_params +ffffffff824417b0 t fetch_ip_params +ffffffff82441c50 t fetch_pipe_params +ffffffff82442ce0 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff82442d60 T get_clk_dcf_deepsleep +ffffffff82442eb0 T get_wm_urgent +ffffffff82443000 T get_wm_memory_trip +ffffffff82443150 T get_wm_writeback_urgent +ffffffff824432a0 T get_wm_stutter_exit +ffffffff824433f0 T get_wm_stutter_enter_exit +ffffffff82443540 T get_wm_z8_stutter_exit +ffffffff82443690 T get_wm_z8_stutter_enter_exit +ffffffff824437e0 T get_stutter_efficiency_z8 +ffffffff82443930 T get_stutter_num_bursts_z8 +ffffffff82443a80 T get_wm_dram_clock_change +ffffffff82443bd0 T get_wm_writeback_dram_clock_change +ffffffff82443d20 T get_stutter_efficiency +ffffffff82443e70 T get_stutter_efficiency_no_vblank +ffffffff82443fc0 T get_stutter_period +ffffffff82444110 T get_urgent_latency +ffffffff82444260 T get_urgent_extra_latency +ffffffff824443b0 T get_nonurgent_latency +ffffffff82444500 T get_dram_clock_change_latency +ffffffff82444650 T get_dispclk_calculated +ffffffff824447a0 T get_total_data_read_bw +ffffffff824448f0 T get_return_bw +ffffffff82444a40 T get_tcalc +ffffffff82444b90 T get_fraction_of_urgent_bandwidth +ffffffff82444ce0 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff82444e30 T get_cstate_max_cap_mode +ffffffff82444f90 T get_comp_buffer_size_kbytes +ffffffff824450e0 T get_pixel_chunk_size_in_kbyte +ffffffff82445230 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff82445380 T get_meta_chunk_size_in_kbyte +ffffffff824454d0 T get_min_pixel_chunk_size_in_byte +ffffffff82445620 T get_min_meta_chunk_size_in_byte +ffffffff82445770 T get_fclk_watermark +ffffffff824458c0 T get_usr_retraining_watermark +ffffffff82445a10 T get_comp_buffer_reserved_space_kbytes +ffffffff82445b60 T get_comp_buffer_reserved_space_64bytes +ffffffff82445cb0 T get_comp_buffer_reserved_space_zs +ffffffff82445e00 T get_unbounded_request_enabled +ffffffff82445f60 T get_dsc_delay +ffffffff824460c0 T get_dppclk_calculated +ffffffff82446220 T get_dscclk_calculated +ffffffff82446380 T get_min_ttu_vblank +ffffffff824464e0 T get_min_ttu_vblank_in_us +ffffffff82446640 T get_vratio_prefetch_l +ffffffff824467a0 T get_vratio_prefetch_c +ffffffff82446900 T get_dst_x_after_scaler +ffffffff82446a60 T get_dst_y_after_scaler +ffffffff82446bc0 T get_dst_y_per_vm_vblank +ffffffff82446d20 T get_dst_y_per_row_vblank +ffffffff82446e80 T get_dst_y_prefetch +ffffffff82446fe0 T get_dst_y_per_vm_flip +ffffffff82447140 T get_dst_y_per_row_flip +ffffffff824472a0 T get_refcyc_per_vm_group_vblank +ffffffff82447400 T get_refcyc_per_vm_group_flip +ffffffff82447560 T get_refcyc_per_vm_req_vblank +ffffffff824476c0 T get_refcyc_per_vm_req_flip +ffffffff82447820 T get_refcyc_per_vm_group_vblank_in_us +ffffffff82447980 T get_refcyc_per_vm_group_flip_in_us +ffffffff82447ae0 T get_refcyc_per_vm_req_vblank_in_us +ffffffff82447c40 T get_refcyc_per_vm_req_flip_in_us +ffffffff82447da0 T get_refcyc_per_vm_dmdata_in_us +ffffffff82447f00 T get_dmdata_dl_delta_in_us +ffffffff82448060 T get_refcyc_per_line_delivery_l_in_us +ffffffff824481c0 T get_refcyc_per_line_delivery_c_in_us +ffffffff82448320 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff82448480 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff824485e0 T get_refcyc_per_req_delivery_l_in_us +ffffffff82448740 T get_refcyc_per_req_delivery_c_in_us +ffffffff824488a0 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff82448a00 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff82448b60 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff82448cc0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff82448e20 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff82448f80 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff824490e0 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff82449240 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff824493a0 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff82449500 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff82449660 T get_vstartup +ffffffff824497c0 T get_vupdate_offset +ffffffff82449920 T get_vupdate_width +ffffffff82449a80 T get_vready_offset +ffffffff82449be0 T get_vready_at_or_after_vsync +ffffffff82449d50 T get_min_dst_y_next_start +ffffffff82449eb0 T get_dst_y_per_pte_row_nom_l +ffffffff8244a010 T get_dst_y_per_pte_row_nom_c +ffffffff8244a170 T get_dst_y_per_meta_row_nom_l +ffffffff8244a2d0 T get_dst_y_per_meta_row_nom_c +ffffffff8244a430 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff8244a590 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff8244a6f0 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff8244a850 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff8244a9b0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff8244ab10 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff8244ac70 T get_vstartup_calculated +ffffffff8244add0 T get_dpte_row_height_linear_c +ffffffff8244af30 T get_swath_height_l +ffffffff8244b090 T get_swath_height_c +ffffffff8244b1f0 T get_det_stored_buffer_size_l_bytes +ffffffff8244b350 T get_det_stored_buffer_size_c_bytes +ffffffff8244b4b0 T get_dpte_group_size_in_bytes +ffffffff8244b610 T get_vm_group_size_in_bytes +ffffffff8244b770 T get_dpte_row_height_linear_l +ffffffff8244b8d0 T get_pte_buffer_mode +ffffffff8244ba40 T get_subviewport_lines_needed_in_mall +ffffffff8244bba0 T get_surface_size_in_mall +ffffffff8244bd00 T get_total_immediate_flip_bytes +ffffffff8244be50 T get_total_immediate_flip_bw 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dscc_compute_dsc_parameters +ffffffff82459000 T dal_hw_factory_dce110_init +ffffffff82459060 t define_hpd_registers +ffffffff824590b0 t define_ddc_registers +ffffffff8245a000 T dal_hw_translate_dce110_init +ffffffff8245a030 t offset_to_id +ffffffff8245a3a0 t id_to_offset +ffffffff8245b000 T dal_hw_factory_dce120_init +ffffffff8245b060 t define_hpd_registers +ffffffff8245b0b0 t define_ddc_registers +ffffffff8245c000 T dal_hw_translate_dce120_init +ffffffff8245c030 t offset_to_id +ffffffff8245c3b0 t id_to_offset +ffffffff8245d000 T dal_hw_factory_dce80_init +ffffffff8245d060 t define_hpd_registers +ffffffff8245d0b0 t define_ddc_registers +ffffffff8245e000 T dal_hw_translate_dce80_init +ffffffff8245e030 t offset_to_id +ffffffff8245e7d0 t id_to_offset +ffffffff8245f000 T dal_hw_factory_dcn10_init +ffffffff8245f060 t define_hpd_registers +ffffffff8245f0b0 t define_ddc_registers +ffffffff8245f150 t define_generic_registers +ffffffff82460000 T dal_hw_translate_dcn10_init +ffffffff82460030 t offset_to_id +ffffffff824603a0 t id_to_offset +ffffffff82461000 T dal_hw_factory_dcn20_init +ffffffff82461060 t define_hpd_registers +ffffffff824610b0 t define_ddc_registers +ffffffff82461160 t define_generic_registers +ffffffff82462000 T dal_hw_translate_dcn20_init +ffffffff82462030 t offset_to_id +ffffffff824622c0 t id_to_offset +ffffffff82463000 T dal_hw_factory_dcn21_init +ffffffff82463060 t define_hpd_registers +ffffffff824630b0 t define_ddc_registers +ffffffff82463160 t define_generic_registers +ffffffff82464000 T dal_hw_translate_dcn21_init +ffffffff82464030 t offset_to_id +ffffffff824642b0 t id_to_offset +ffffffff82465000 T dal_hw_factory_dcn30_init +ffffffff82465060 t define_hpd_registers +ffffffff824650b0 t define_ddc_registers +ffffffff82465160 t define_generic_registers +ffffffff82466000 T dal_hw_translate_dcn30_init +ffffffff82466030 t offset_to_id +ffffffff824662d0 t id_to_offset +ffffffff82467000 T dal_hw_factory_dcn315_init +ffffffff82467060 t define_hpd_registers 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svm_handle_xsetbv -ffffffff827ff330 T svm_handle_inout -ffffffff827ff440 T vmm_inject_ud -ffffffff827ff480 T vmm_inject_db -ffffffff827ff4c0 T vmx_handle_np_fault -ffffffff827ff640 T vmx_handle_inout -ffffffff827ff7e0 T vmx_handle_cr -ffffffff827ffa20 T vmx_handle_rdmsr -ffffffff827ffb20 T vmx_handle_wrmsr -ffffffff827ffdd0 T vmx_handle_xsetbv -ffffffff827ffed0 T vmm_inject_gp -ffffffff827fff10 T vmx_get_exit_qualification -ffffffff827fff80 T vmx_get_guest_faulttype -ffffffff82800030 T svm_get_guest_faulttype -ffffffff82800060 T svm_fault_page -ffffffff828000f0 T vmx_fault_page -ffffffff82800270 T vmm_get_guest_cpu_mode -ffffffff82800380 T vmx_load_pdptes -ffffffff828006a0 T vmx_handle_cr0_write -ffffffff82800910 T vmx_handle_cr4_write -ffffffff828009d0 T vmm_handle_xsetbv -ffffffff82800a80 T vmx_handle_misc_enable_msr -ffffffff82800ae0 T vmm_pat_is_valid -ffffffff82800bc0 t vmm_handle_cpuid_0xd -ffffffff82800cc0 T vmm_gpa_is_valid -ffffffff82800d30 T vmx_exit_reason_decode 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sdmmc_io_read_2 -ffffffff82808940 T sdmmc_io_write_2 -ffffffff82808ac0 T sdmmc_io_read_4 -ffffffff82808c30 T sdmmc_io_write_4 -ffffffff82808db0 T sdmmc_io_read_multi_1 -ffffffff82808eb0 T sdmmc_io_write_multi_1 -ffffffff82808fb0 T sdmmc_io_read_region_1 -ffffffff828090b0 T sdmmc_io_write_region_1 -ffffffff828091b0 T sdmmc_io_xchg -ffffffff82809370 T sdmmc_intr_enable -ffffffff82809650 T sdmmc_intr_disable -ffffffff82809930 T sdmmc_intr_establish -ffffffff82809a50 T sdmmc_intr_disestablish -ffffffff82809b50 T sdmmc_card_intr -ffffffff82809ba0 T sdmmc_intr_task -ffffffff82809c60 T sdmmc_io_set_blocklen -ffffffff8280a000 T sdmmc_mem_enable -ffffffff8280a4d0 T sdmmc_mem_send_op_cond -ffffffff8280a6b0 T sdmmc_mem_signal_voltage -ffffffff8280a7b0 T sdmmc_mem_scan -ffffffff8280ab00 T sdmmc_decode_csd -ffffffff8280af50 T sdmmc_decode_cid -ffffffff8280b400 T sdmmc_mem_send_scr -ffffffff8280b560 T sdmmc_mem_decode_scr -ffffffff8280b5c0 T sdmmc_mem_send_cxd_data -ffffffff8280b740 T sdmmc_mem_set_bus_width -ffffffff8280b870 T sdmmc_mem_sd_switch -ffffffff8280bb30 T sdmmc_be512_to_bitfield512 -ffffffff8280bbe0 T sdmmc_mem_mmc_switch -ffffffff8280bcd0 T sdmmc_mem_init -ffffffff8280be60 T sdmmc_mem_set_blocklen -ffffffff8280bf70 T sdmmc_mem_sd_init -ffffffff8280c3e0 T sdmmc_mem_mmc_init -ffffffff8280cb60 T sdmmc_mem_select_transfer_mode -ffffffff8280cbe0 T sdmmc_mem_execute_tuning -ffffffff8280cc70 T sdmmc_mem_read_block_subr -ffffffff8280d000 T sdmmc_mem_single_read_block -ffffffff8280d0d0 T sdmmc_mem_read_block -ffffffff8280d2e0 T sdmmc_mem_write_block_subr -ffffffff8280d660 T sdmmc_mem_single_write_block -ffffffff8280d730 T sdmmc_mem_write_block -ffffffff8280d940 T sdmmc_mem_hibernate_write -ffffffff8280e000 T sdmmc_scsi_cmd -ffffffff8280e200 T sdmmc_minphys -ffffffff8280e280 T sdmmc_scsi_attach -ffffffff8280e4c0 T sdmmc_alloc_ccbs -ffffffff8280e620 T sdmmc_free_ccbs -ffffffff8280e680 T sdmmc_scsi_detach -ffffffff8280e840 T sdmmc_stimeout -ffffffff8280e8e0 T sdmmc_ccb_alloc -ffffffff8280e9a0 T sdmmc_ccb_free -ffffffff8280eaa0 T sdmmc_inquiry -ffffffff8280ed30 T sdmmc_start_xs -ffffffff8280ee50 T sdmmc_complete_xs -ffffffff8280ef40 T sdmmc_done_xs -ffffffff8280ef90 T sdmmc_scsi_hibernate_io -ffffffff82810000 T bwfm_sdio_preinit -ffffffff828105a0 T bwfm_sdio_txcheck -ffffffff828105e0 T bwfm_sdio_txdata -ffffffff82810660 T bwfm_sdio_txctl -ffffffff828107f0 T bwfm_sdio_buscore_read -ffffffff82810800 T bwfm_sdio_buscore_write -ffffffff82810820 T bwfm_sdio_buscore_prepare -ffffffff828109a0 T bwfm_sdio_buscore_activate -ffffffff82810a30 T bwfm_sdio_match -ffffffff82810ae0 T bwfm_sdio_attach -ffffffff82810e80 T bwfm_sdio_detach -ffffffff82810f00 T bwfm_sdio_task -ffffffff828110c0 T bwfm_sdio_write_1 -ffffffff828110f0 T bwfm_sdio_read_1 -ffffffff82811120 T bwfm_sdio_write_4 -ffffffff828111f0 T bwfm_sdio_read_4 -ffffffff828112b0 T bwfm_sdio_load_microcode -ffffffff828115a0 T bwfm_sdio_clkctl -ffffffff828116d0 T bwfm_sdio_dev_write -ffffffff82811720 T bwfm_sdio_intr -ffffffff82811770 T bwfm_sdio_ram_read_write -ffffffff828119f0 T bwfm_sdio_htclk -ffffffff82811cb0 T bwfm_sdio_readshared -ffffffff82811da0 T bwfm_sdio_dev_read -ffffffff82811de0 T bwfm_sdio_rx_frames -ffffffff82812210 T bwfm_sdio_tx_frames -ffffffff82812330 T bwfm_sdio_backplane -ffffffff82812400 T bwfm_sdio_buf_read -ffffffff82812500 T bwfm_sdio_buf_write -ffffffff828125d0 T bwfm_sdio_frame_read_write -ffffffff82812780 T bwfm_sdio_newbuf -ffffffff82812810 T bwfm_sdio_tx_ok -ffffffff82812870 T bwfm_sdio_tx_ctrlframe -ffffffff82812980 T bwfm_sdio_tx_dataframe -ffffffff82812af0 T bwfm_sdio_rx_glom -ffffffff82813000 T onewire_match -ffffffff82813060 T onewire_attach -ffffffff82813120 T onewire_detach -ffffffff82813190 T onewire_activate -ffffffff828131b0 T onewire_scan -ffffffff82813400 T onewire_createthread -ffffffff82813470 T onewire_print -ffffffff82813560 T onewirebus_print -ffffffff828135b0 T onewire_lock -ffffffff828135d0 T onewire_unlock -ffffffff828135f0 T onewire_reset -ffffffff82813610 T onewire_bit -ffffffff82813630 T onewire_read_byte -ffffffff828137c0 T onewire_write_byte -ffffffff828138d0 T onewire_read_block -ffffffff82813970 T onewire_write_block -ffffffff82813a10 T onewire_triplet -ffffffff82813b20 T onewire_matchrom -ffffffff82813d10 T onewire_search -ffffffff82814180 T onewire_thread -ffffffff82815000 T onewire_crc -ffffffff828150b0 T onewire_crc16 -ffffffff82815170 T onewire_famname -ffffffff828151b0 T onewire_matchbyfam -ffffffff82816000 T owid_match -ffffffff82816030 T owid_attach -ffffffff82816120 T owid_detach -ffffffff82816170 T owid_activate -ffffffff82817000 T owsbm_match -ffffffff82817030 T owsbm_attach -ffffffff82817240 T owsbm_detach -ffffffff828172d0 T owsbm_activate -ffffffff82817300 T owsbm_update -ffffffff82818000 T owtemp_match -ffffffff82818030 T owtemp_attach -ffffffff82818160 T owtemp_detach -ffffffff828181f0 T owtemp_activate -ffffffff82818220 T owtemp_update -ffffffff82819000 T owctr_match -ffffffff82819030 T owctr_attach -ffffffff828191c0 T owctr_detach -ffffffff82819250 T owctr_activate -ffffffff82819280 T owctr_update -ffffffff828192c0 T owctr_update_counter -ffffffff8281a000 A __text_page_start -ffffffff8281a000 T Xsyscall_meltdown -ffffffff8281a00c T Xsyscall -ffffffff8281a299 t Xsyscall_trampback -ffffffff8281a2b0 T intr_user_exit -ffffffff8281a2f2 t intr_user_exit_post_ast -ffffffff8281a44b t Xiretq_trampback -ffffffff8281a457 T doreti_iret -ffffffff8281b000 T alltraps -ffffffff8281b138 T recall_trap -ffffffff8281b150 T alltraps_kern -ffffffff8281b153 T alltraps_kern_meltdown -ffffffff8281c000 ? Xtrap00 -ffffffff8281c000 A __kutext_start -ffffffff8281c000 A __text_page_end -ffffffff8281c010 ? Xtrap01 -ffffffff8281c020 ? Xtrap02 -ffffffff8281c028 c calltrap_specstk -ffffffff8281c0f0 ? calltrap_specstk_tramp -ffffffff8281c110 ? Xtrap03 -ffffffff8281c120 ? Xtrap04 -ffffffff8281c130 ? Xtrap05 -ffffffff8281c140 ? Xtrap06 -ffffffff8281c150 ? Xtrap07 -ffffffff8281c160 ? Xtrap08 -ffffffff8281c170 ? Xtrap09 -ffffffff8281c180 ? Xtrap0a -ffffffff8281c190 ? Xtrap0b -ffffffff8281c1a0 ? Xtrap0c -ffffffff8281c1b0 ? Xtrap0d -ffffffff8281c240 ? Xtrap0e -ffffffff8281c250 ? Xintrspurious -ffffffff8281c250 ? Xtrap0f -ffffffff8281c260 ? Xtrap10 -ffffffff8281c270 ? Xtrap11 -ffffffff8281c280 ? Xtrap12 -ffffffff8281c290 ? Xtrap13 -ffffffff8281c2a0 ? Xtrap14 -ffffffff8281c2b0 ? Xtrap15 -ffffffff8281c2c0 ? Xtrap16 -ffffffff8281c2c0 ? Xtrap17 -ffffffff8281c2c0 ? Xtrap18 -ffffffff8281c2c0 ? Xtrap19 -ffffffff8281c2c0 ? Xtrap1a -ffffffff8281c2c0 ? Xtrap1b -ffffffff8281c2c0 ? Xtrap1c -ffffffff8281c2c0 ? Xtrap1d -ffffffff8281c2c0 ? Xtrap1e -ffffffff8281c2c0 ? Xtrap1f -ffffffff8281c2d0 ? x2apic_eoi -ffffffff8281c2f0 ? Xintr_lapic_ipi -ffffffff8281c330 ? Xipi_invltlb -ffffffff8281c360 ? Xipi_invlpg -ffffffff8281c390 ? Xipi_invlrange -ffffffff8281c3d0 ? Xipi_invltlb_pcid -ffffffff8281c410 ? Xipi_invlpg_pcid -ffffffff8281c460 ? Xipi_invlrange_pcid -ffffffff8281c4d0 ? Xintr_lapic_ltimer -ffffffff8281c510 ? Xintr_xen_upcall -ffffffff8281c550 ? Xintr_hyperv_upcall -ffffffff8281c590 ? Xintr_legacy0 -ffffffff8281c5d0 ? Xintr_legacy1 -ffffffff8281c610 ? Xintr_legacy2 -ffffffff8281c650 ? Xintr_legacy3 -ffffffff8281c690 ? Xintr_legacy4 -ffffffff8281c6d0 ? Xintr_legacy5 -ffffffff8281c710 ? Xintr_legacy6 -ffffffff8281c750 ? Xintr_legacy7 -ffffffff8281c790 ? Xintr_legacy8 -ffffffff8281c7d0 ? Xintr_legacy9 -ffffffff8281c810 ? Xintr_legacy10 -ffffffff8281c850 ? Xintr_legacy11 -ffffffff8281c890 ? Xintr_legacy12 -ffffffff8281c8d0 ? Xintr_legacy13 -ffffffff8281c910 ? Xintr_legacy14 -ffffffff8281c950 ? Xintr_legacy15 -ffffffff8281c990 ? Xintr_ioapic_edge0 -ffffffff8281c9d0 ? Xintr_ioapic_edge1 -ffffffff8281ca10 ? Xintr_ioapic_edge2 -ffffffff8281ca50 ? Xintr_ioapic_edge3 -ffffffff8281ca90 ? Xintr_ioapic_edge4 -ffffffff8281cad0 ? Xintr_ioapic_edge5 -ffffffff8281cb10 ? Xintr_ioapic_edge6 -ffffffff8281cb50 ? Xintr_ioapic_edge7 -ffffffff8281cb90 ? Xintr_ioapic_edge8 -ffffffff8281cbd0 ? Xintr_ioapic_edge9 -ffffffff8281cc10 ? Xintr_ioapic_edge10 -ffffffff8281cc50 ? Xintr_ioapic_edge11 -ffffffff8281cc90 ? Xintr_ioapic_edge12 -ffffffff8281ccd0 ? Xintr_ioapic_edge13 -ffffffff8281cd10 ? Xintr_ioapic_edge14 -ffffffff8281cd50 ? Xintr_ioapic_edge15 -ffffffff8281cd90 ? Xintr_ioapic_edge16 -ffffffff8281cdd0 ? Xintr_ioapic_edge17 -ffffffff8281ce10 ? Xintr_ioapic_edge18 -ffffffff8281ce50 ? Xintr_ioapic_edge19 -ffffffff8281ce90 ? Xintr_ioapic_edge20 -ffffffff8281ced0 ? Xintr_ioapic_edge21 -ffffffff8281cf10 ? Xintr_ioapic_edge22 -ffffffff8281cf50 ? Xintr_ioapic_edge23 -ffffffff8281cf90 ? Xintr_ioapic_edge24 -ffffffff8281cfd0 ? Xintr_ioapic_edge25 -ffffffff8281d010 ? Xintr_ioapic_edge26 -ffffffff8281d050 ? Xintr_ioapic_edge27 -ffffffff8281d090 ? Xintr_ioapic_edge28 -ffffffff8281d0d0 ? Xintr_ioapic_edge29 -ffffffff8281d110 ? Xintr_ioapic_edge30 -ffffffff8281d150 ? Xintr_ioapic_edge31 -ffffffff8281d190 ? Xintr_ioapic_edge32 -ffffffff8281d1d0 ? Xintr_ioapic_edge33 -ffffffff8281d210 ? Xintr_ioapic_edge34 -ffffffff8281d250 ? Xintr_ioapic_edge35 -ffffffff8281d290 ? Xintr_ioapic_edge36 -ffffffff8281d2d0 ? Xintr_ioapic_edge37 -ffffffff8281d310 ? Xintr_ioapic_edge38 -ffffffff8281d350 ? Xintr_ioapic_edge39 -ffffffff8281d390 ? Xintr_ioapic_edge40 -ffffffff8281d3d0 ? Xintr_ioapic_edge41 -ffffffff8281d410 ? Xintr_ioapic_edge42 -ffffffff8281d450 ? Xintr_ioapic_edge43 -ffffffff8281d490 ? Xintr_ioapic_edge44 -ffffffff8281d4d0 ? Xintr_ioapic_edge45 -ffffffff8281d510 ? Xintr_ioapic_edge46 -ffffffff8281d550 ? Xintr_ioapic_edge47 -ffffffff8281d590 ? Xintr_ioapic_edge48 -ffffffff8281d5d0 ? Xintr_ioapic_edge49 -ffffffff8281d610 ? Xintr_ioapic_edge50 -ffffffff8281d650 ? Xintr_ioapic_edge51 -ffffffff8281d690 ? Xintr_ioapic_edge52 -ffffffff8281d6d0 ? Xintr_ioapic_edge53 -ffffffff8281d710 ? Xintr_ioapic_edge54 -ffffffff8281d750 ? Xintr_ioapic_edge55 -ffffffff8281d790 ? Xintr_ioapic_edge56 -ffffffff8281d7d0 ? Xintr_ioapic_edge57 -ffffffff8281d810 ? Xintr_ioapic_edge58 -ffffffff8281d850 ? Xintr_ioapic_edge59 -ffffffff8281d890 ? Xintr_ioapic_edge60 -ffffffff8281d8d0 ? Xintr_ioapic_edge61 -ffffffff8281d910 ? Xintr_ioapic_edge62 -ffffffff8281d950 ? Xintr_ioapic_edge63 -ffffffff8281d990 ? Xintr_ioapic_level0 -ffffffff8281d9d0 ? Xintr_ioapic_level1 -ffffffff8281da10 ? Xintr_ioapic_level2 -ffffffff8281da50 ? Xintr_ioapic_level3 -ffffffff8281da90 ? Xintr_ioapic_level4 -ffffffff8281dad0 ? Xintr_ioapic_level5 -ffffffff8281db10 ? Xintr_ioapic_level6 -ffffffff8281db50 ? Xintr_ioapic_level7 -ffffffff8281db90 ? Xintr_ioapic_level8 -ffffffff8281dbd0 ? Xintr_ioapic_level9 -ffffffff8281dc10 ? Xintr_ioapic_level10 -ffffffff8281dc50 ? Xintr_ioapic_level11 -ffffffff8281dc90 ? Xintr_ioapic_level12 -ffffffff8281dcd0 ? Xintr_ioapic_level13 -ffffffff8281dd10 ? Xintr_ioapic_level14 -ffffffff8281dd50 ? Xintr_ioapic_level15 -ffffffff8281dd90 ? Xintr_ioapic_level16 -ffffffff8281ddd0 ? Xintr_ioapic_level17 -ffffffff8281de10 ? Xintr_ioapic_level18 -ffffffff8281de50 ? Xintr_ioapic_level19 -ffffffff8281de90 ? Xintr_ioapic_level20 -ffffffff8281ded0 ? Xintr_ioapic_level21 -ffffffff8281df10 ? Xintr_ioapic_level22 -ffffffff8281df50 ? Xintr_ioapic_level23 -ffffffff8281df90 ? Xintr_ioapic_level24 -ffffffff8281dfd0 ? Xintr_ioapic_level25 -ffffffff8281e010 ? Xintr_ioapic_level26 -ffffffff8281e050 ? Xintr_ioapic_level27 -ffffffff8281e090 ? Xintr_ioapic_level28 -ffffffff8281e0d0 ? Xintr_ioapic_level29 -ffffffff8281e110 ? Xintr_ioapic_level30 -ffffffff8281e150 ? Xintr_ioapic_level31 -ffffffff8281e190 ? Xintr_ioapic_level32 -ffffffff8281e1d0 ? Xintr_ioapic_level33 -ffffffff8281e210 ? Xintr_ioapic_level34 -ffffffff8281e250 ? Xintr_ioapic_level35 -ffffffff8281e290 ? Xintr_ioapic_level36 -ffffffff8281e2d0 ? Xintr_ioapic_level37 -ffffffff8281e310 ? Xintr_ioapic_level38 -ffffffff8281e350 ? Xintr_ioapic_level39 -ffffffff8281e390 ? Xintr_ioapic_level40 -ffffffff8281e3d0 ? Xintr_ioapic_level41 -ffffffff8281e410 ? Xintr_ioapic_level42 -ffffffff8281e450 ? Xintr_ioapic_level43 -ffffffff8281e490 ? Xintr_ioapic_level44 -ffffffff8281e4d0 ? Xintr_ioapic_level45 -ffffffff8281e510 ? Xintr_ioapic_level46 -ffffffff8281e550 ? Xintr_ioapic_level47 -ffffffff8281e590 ? Xintr_ioapic_level48 -ffffffff8281e5d0 ? Xintr_ioapic_level49 -ffffffff8281e610 ? Xintr_ioapic_level50 -ffffffff8281e650 ? Xintr_ioapic_level51 -ffffffff8281e690 ? Xintr_ioapic_level52 -ffffffff8281e6d0 ? Xintr_ioapic_level53 -ffffffff8281e710 ? Xintr_ioapic_level54 -ffffffff8281e750 ? Xintr_ioapic_level55 -ffffffff8281e790 ? Xintr_ioapic_level56 -ffffffff8281e7d0 ? Xintr_ioapic_level57 -ffffffff8281e810 ? Xintr_ioapic_level58 -ffffffff8281e850 ? Xintr_ioapic_level59 -ffffffff8281e890 ? Xintr_ioapic_level60 -ffffffff8281e8d0 ? Xintr_ioapic_level61 -ffffffff8281e910 ? Xintr_ioapic_level62 -ffffffff8281e950 ? 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vga_50lscreen_mono -ffffffff829351c8 R vga_50lscreen_bf -ffffffff829351f8 R vga_screenlist -ffffffff82935208 R vga_screenlist_mono -ffffffff82935218 R vga_accessops -ffffffff82935278 r i945_wm_info -ffffffff829352b8 r bgansitopc -ffffffff829352c0 r pctoansi -ffffffff82935300 r sdma_offsets -ffffffff82935300 r sdma_offsets -ffffffff82935338 r iha_rate_tbl -ffffffff82935370 r i830_a_wm_info -ffffffff829353a8 r gen9_edram_size_mb.ways -ffffffff82935408 r aggr_periodic_times -ffffffff82935500 r michael_final.pad -ffffffff82935528 r rt_copysa.maskarray -ffffffff82935530 r i915_wm_info -ffffffff82935538 r amdgpu_ih_clientid_jpeg -ffffffff82935538 r amdgpu_ih_clientid_uvds -ffffffff82935538 r amdgpu_ih_clientid_vcns -ffffffff82935538 r amdgpu_ih_clientid_vcns -ffffffff82935538 r amdgpu_ih_clientid_vcns -ffffffff82935568 r jsl_ehl_revids -ffffffff82935578 r vga_setfontset.cmaptabb -ffffffff829355e8 r i830_bc_wm_info -ffffffff82935650 r hsw_activate_psr2.map -ffffffff82935658 r tgl_revids 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ciss_switch -ffffffff82943030 R ciss_level -ffffffff82943050 R ciss_stat -ffffffff82944000 R ami_switch -ffffffff82944028 R ami_raw_switch -ffffffff82945000 R mfi_switch -ffffffff82945028 R mfi_pd_switch -ffffffff82945050 r mfi_iop_xscale -ffffffff82945080 r mfi_iop_ppc -ffffffff829450b0 r mfi_iop_gen2 -ffffffff829450e0 r mfi_iop_skinny -ffffffff82945110 r mfi_bbu_indicators -ffffffff82946000 R qlw_switch -ffffffff82947000 R isp_2100_risc_code -ffffffff82959bf0 R isp_2200_risc_code -ffffffff8296c990 R isp_2300_risc_code -ffffffff82986408 R qla_switch -ffffffff82986430 r qla_regs_2100 -ffffffff82986460 r qla_regs_2200 -ffffffff82986490 r qla_regs_23XX -ffffffff82987000 R ahci_atascsi_methods -ffffffff82988000 R nvme_switch -ffffffff82988028 r nvme_ops -ffffffff82989000 R mpi_switch -ffffffff82989060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs -ffffffff82989090 r chv_oa_mux_regs -ffffffff829890b0 r fiji_clock_stretcher_lookup_table -ffffffff829890b0 r tonga_clock_stretcher_lookup_table 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link_destroy +ffffffff82498000 T link_get_cur_link_res +ffffffff82498150 T link_get_cur_res_map +ffffffff82498240 T link_restore_res_map +ffffffff82499000 T dp_link_bandwidth_kbps +ffffffff824990b0 T link_validate_mode_timing +ffffffff824996d0 t get_tmds_output_pixel_clock_100hz +ffffffff82499740 T link_validate_dpia_bandwidth +ffffffff8249a000 T link_create_ddc_service +ffffffff8249a1b0 T link_destroy_ddc_service +ffffffff8249a260 T set_ddc_transaction_type +ffffffff8249a290 T link_is_in_aux_transaction_mode +ffffffff8249a2d0 T set_dongle_type +ffffffff8249a300 T link_get_aux_defer_delay +ffffffff8249a440 T link_query_ddc_data +ffffffff8249a840 T link_aux_transfer_raw +ffffffff8249a870 T link_get_fixed_vs_pe_retimer_write_address +ffffffff8249a900 T link_get_fixed_vs_pe_retimer_read_address +ffffffff8249a990 T link_configure_fixed_vs_pe_retimer +ffffffff8249aa70 T link_aux_transfer_with_retries_no_mutex +ffffffff8249aa80 T link_query_fixed_vs_pe_retimer +ffffffff8249ab60 T try_to_configure_aux_timeout +ffffffff8249ac50 T get_ddc_pin +ffffffff8249ac80 T write_scdc_data +ffffffff8249ad80 T read_scdc_data +ffffffff8249b000 T is_dp_active_dongle +ffffffff8249b040 T is_dp_branch_device +ffffffff8249b070 T dp_parse_lttpr_repeater_count +ffffffff8249b0f0 T link_bw_kbps_from_raw_frl_link_rate_data +ffffffff8249b130 T dp_is_fec_supported +ffffffff8249b1f0 T dp_should_enable_fec +ffffffff8249b320 T dp_is_128b_132b_signal +ffffffff8249b400 T dp_is_lttpr_present +ffffffff8249b470 T decide_fallback_link_setting +ffffffff8249b740 T link_dp_get_encoding_format +ffffffff8249b790 t reduce_link_rate +ffffffff8249b850 T edp_decide_link_settings +ffffffff8249b990 T decide_edp_link_settings_with_dsc +ffffffff8249bd90 T link_decide_link_settings +ffffffff8249c220 T mst_decide_link_encoding_format +ffffffff8249c2a0 T dp_overwrite_extended_receiver_cap +ffffffff8249c3e0 t get_active_converter_info +ffffffff8249c870 T dpcd_set_source_specific_data +ffffffff8249c9d0 T dpcd_write_cable_id_to_dprx +ffffffff8249ca50 T read_is_mst_supported +ffffffff8249cb10 T dp_retrieve_lttpr_cap +ffffffff8249cd40 T detect_dp_sink_caps +ffffffff8249cd50 t retrieve_link_cap +ffffffff8249e1d0 T detect_edp_sink_caps +ffffffff8249e550 T dp_get_max_link_enc_cap +ffffffff8249e670 T dp_get_verified_link_cap +ffffffff8249e6c0 T dp_get_max_link_cap +ffffffff8249e8d0 T dp_verify_link_cap_with_retries +ffffffff8249ee40 T dp_is_sink_present +ffffffff8249f150 t intersect_frl_link_bw_support +ffffffff824a0000 T dpcd_get_tunneling_device_data +ffffffff824a00f0 T dpia_query_hpd_status +ffffffff824a1000 T link_dp_dpia_set_dptx_usb4_bw_alloc_support +ffffffff824a1350 T link_dp_dpia_allocate_usb4_bandwidth_for_stream +ffffffff824a1640 T dpia_handle_bw_alloc_response +ffffffff824a1930 T dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff824a1c70 T dpia_validate_usb4_bw +ffffffff824a2070 t get_lowest_dpia_index +ffffffff824a2240 T link_dp_dpia_get_dp_overhead_in_dp_tunneling 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dp_perform_fixed_vs_pe_training_sequence_legacy +ffffffff824adbd0 t perform_fixed_vs_pe_nontransparent_training_sequence +ffffffff824ade00 T dp_perform_fixed_vs_pe_training_sequence +ffffffff824af000 T core_link_read_dpcd +ffffffff824af1c0 T core_link_write_dpcd +ffffffff824b0000 T dp_set_panel_mode +ffffffff824b0140 T dp_get_panel_mode +ffffffff824b0210 T edp_set_backlight_level_nits +ffffffff824b0330 T edp_get_backlight_level_nits +ffffffff824b03d0 T edp_backlight_enable_aux +ffffffff824b0440 T set_default_brightness_aux +ffffffff824b0520 T edp_is_ilr_optimization_enabled +ffffffff824b0560 T get_max_link_rate_from_ilr_table +ffffffff824b0640 T edp_is_ilr_optimization_required +ffffffff824b0820 T edp_panel_backlight_power_on +ffffffff824b08e0 T edp_set_panel_power +ffffffff824b0a10 T edp_wait_for_t12 +ffffffff824b0a70 T edp_add_delay_for_T9 +ffffffff824b0ac0 T edp_receiver_ready_T9 +ffffffff824b0ba0 T edp_receiver_ready_T7 +ffffffff824b0d70 T edp_power_alpm_dpcd_enable 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virtual_stream_encoder_create +ffffffff824b5120 t virtual_stream_encoder_dp_set_stream_attribute +ffffffff824b5150 t virtual_stream_encoder_hdmi_set_stream_attribute +ffffffff824b5180 t virtual_stream_encoder_dvi_set_stream_attribute +ffffffff824b51b0 t virtual_stream_encoder_set_throttled_vcp_size +ffffffff824b51e0 t virtual_stream_encoder_update_hdmi_info_packets +ffffffff824b5210 t virtual_stream_encoder_stop_hdmi_info_packets +ffffffff824b5240 t virtual_stream_encoder_update_dp_info_packets +ffffffff824b5270 t virtual_stream_encoder_stop_dp_info_packets +ffffffff824b52a0 t virtual_stream_encoder_dp_blank +ffffffff824b52d0 t virtual_stream_encoder_dp_unblank +ffffffff824b5300 t virtual_audio_mute_control +ffffffff824b5330 t virtual_setup_stereo_sync +ffffffff824b5360 t virtual_stream_encoder_set_avmute +ffffffff824b5390 t virtual_dig_connect_to_otg +ffffffff824b53c0 t virtual_stream_encoder_reset_hdmi_stream_attribute +ffffffff824b53f0 t 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dmub_dcn20_get_gpint_response +ffffffff824b7160 T dmub_dcn20_get_fw_boot_status +ffffffff824b7190 T dmub_dcn20_enable_dmub_boot_options +ffffffff824b71c0 T dmub_dcn20_skip_dmub_panel_power_sequence +ffffffff824b7220 T dmub_dcn20_get_current_time +ffffffff824b7250 T dmub_dcn20_get_diagnostic_data +ffffffff824b8000 T dmub_dcn30_backdoor_load +ffffffff824b82e0 T dmub_dcn30_setup_windows +ffffffff824b9000 T dmub_dcn31_reset +ffffffff824b9320 T dmub_dcn31_reset_release +ffffffff824b9410 T dmub_dcn31_backdoor_load +ffffffff824b96f0 T dmub_dcn31_setup_windows +ffffffff824b9ae0 T dmub_dcn31_setup_mailbox +ffffffff824b9b40 T dmub_dcn31_get_inbox1_wptr +ffffffff824b9b70 T dmub_dcn31_get_inbox1_rptr +ffffffff824b9ba0 T dmub_dcn31_set_inbox1_wptr +ffffffff824b9bd0 T dmub_dcn31_setup_out_mailbox +ffffffff824b9c30 T dmub_dcn31_get_outbox1_wptr +ffffffff824b9c60 T dmub_dcn31_set_outbox1_rptr +ffffffff824b9c90 T dmub_dcn31_is_hw_init +ffffffff824b9d30 T dmub_dcn31_is_supported +ffffffff824b9da0 T dmub_dcn31_is_psrsu_supported +ffffffff824b9dd0 T dmub_dcn31_set_gpint +ffffffff824b9e00 T dmub_dcn31_is_gpint_acked +ffffffff824b9e70 T dmub_dcn31_get_gpint_response +ffffffff824b9ea0 T dmub_dcn31_get_gpint_dataout +ffffffff824ba000 T dmub_dcn31_get_fw_boot_status +ffffffff824ba030 T dmub_dcn31_get_fw_boot_option +ffffffff824ba060 T dmub_dcn31_enable_dmub_boot_options +ffffffff824ba0e0 T dmub_dcn31_skip_dmub_panel_power_sequence +ffffffff824ba140 T dmub_dcn31_setup_outbox0 +ffffffff824ba1a0 T dmub_dcn31_get_outbox0_wptr +ffffffff824ba1d0 T dmub_dcn31_set_outbox0_rptr +ffffffff824ba200 T dmub_dcn31_get_current_time +ffffffff824ba230 T dmub_dcn31_get_diagnostic_data +ffffffff824ba800 T dmub_dcn31_should_detect +ffffffff824bb000 T dmub_dcn314_is_psrsu_supported +ffffffff824bc000 T dmub_dcn32_reset +ffffffff824bc2a0 T dmub_dcn32_reset_release +ffffffff824bc390 T dmub_dcn32_backdoor_load +ffffffff824bc670 T dmub_dcn32_backdoor_load_zfb_mode +ffffffff824bc8b0 T dmub_dcn32_setup_windows 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amdgpu_dpm_enable_jpeg +ffffffff824e18b0 T amdgpu_pm_load_smu_firmware +ffffffff824e1980 T amdgpu_dpm_handle_passthrough_sbr +ffffffff824e1a20 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff824e1ac0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff824e1b60 T amdgpu_dpm_get_dpm_freq_range +ffffffff824e1c20 T amdgpu_dpm_set_soft_freq_range +ffffffff824e1ce0 T amdgpu_dpm_write_watermarks_table +ffffffff824e1d80 T amdgpu_dpm_wait_for_event +ffffffff824e1e30 T amdgpu_dpm_set_residency_gfxoff +ffffffff824e1ed0 T amdgpu_dpm_get_residency_gfxoff +ffffffff824e1f70 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff824e2010 T amdgpu_dpm_get_status_gfxoff +ffffffff824e20b0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff824e2110 T amdgpu_dpm_gfx_state_change +ffffffff824e2180 T amdgpu_dpm_get_ecc_info +ffffffff824e2220 T amdgpu_dpm_get_vce_clock_state +ffffffff824e22d0 T amdgpu_dpm_get_current_power_state +ffffffff824e2350 T amdgpu_dpm_set_power_state +ffffffff824e2500 T amdgpu_dpm_dispatch_task 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smu_mode1_reset_is_support +ffffffff8256c290 T smu_mode2_reset_is_support +ffffffff8256c2e0 T smu_mode1_reset +ffffffff8256c330 T smu_handle_passthrough_sbr +ffffffff8256c380 T smu_get_ecc_info +ffffffff8256c3e0 T smu_wait_for_event +ffffffff8256c430 T smu_stb_collect_info +ffffffff8256c490 T amdgpu_smu_stb_debug_fs_init +ffffffff8256c4c0 T smu_send_hbm_bad_pages_num +ffffffff8256c510 T smu_send_hbm_bad_channel_flag +ffffffff8256c560 t smu_set_fan_control_mode +ffffffff8256c620 t smu_get_fan_control_mode +ffffffff8256c6a0 t smu_set_fan_speed_pwm +ffffffff8256c760 t smu_get_fan_speed_pwm +ffffffff8256c7c0 t smu_force_ppclk_levels +ffffffff8256c890 t smu_print_ppclk_levels +ffffffff8256c900 t smu_emit_ppclk_levels +ffffffff8256c970 t smu_force_performance_level +ffffffff8256cc30 t smu_read_sensor +ffffffff8256ce90 t smu_get_apu_thermal_limit +ffffffff8256cee0 t smu_set_apu_thermal_limit +ffffffff8256cf30 t smu_get_performance_level +ffffffff8256cfa0 t smu_get_current_power_state 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+ffffffff8256e1f0 t smu_get_baco_capability +ffffffff8256e260 t smu_baco_set_state +ffffffff8256e360 t smu_sys_get_pp_feature_mask +ffffffff8256e3e0 t smu_sys_set_pp_feature_mask +ffffffff8256e450 t smu_mode2_reset +ffffffff8256e510 t smu_enable_gfx_features +ffffffff8256e5d0 t smu_set_df_cstate +ffffffff8256e6a0 t smu_set_xgmi_pstate +ffffffff8256e760 t smu_sys_get_gpu_metrics +ffffffff8256e7c0 t smu_set_watermarks_for_clock_ranges +ffffffff8256e840 t smu_display_disable_memory_clock_switch +ffffffff8256e8a0 t smu_get_max_sustainable_clocks_by_dc +ffffffff8256e900 t smu_get_uclk_dpm_states +ffffffff8256e960 t smu_get_dpm_clock_table +ffffffff8256e9c0 t smu_get_prv_buffer_details +ffffffff8256ea30 t smu_set_user_clk_dependencies +ffffffff8256eab0 t smu_adjust_power_state_dynamic +ffffffff8256ed40 t smu_apply_default_config_table_settings +ffffffff8256ee00 t smu_restore_dpm_user_profile +ffffffff8256f280 t smu_throttling_logging_work_fn +ffffffff8256f2d0 t smu_interrupt_work_fn +ffffffff8256f320 t smu_swctf_delayed_work_handler +ffffffff8256f450 t __delayed_work_tick +ffffffff8256f470 t smu_smc_hw_setup +ffffffff8256fcb0 t smu_set_default_dpm_table +ffffffff8256fe90 t smu_get_thermal_temperature_range +ffffffff8256ff80 t smu_smc_hw_cleanup +ffffffff82571000 T arcturus_set_ppt_funcs +ffffffff82571050 t arcturus_run_btc +ffffffff82571110 t arcturus_get_allowed_feature_mask +ffffffff82571170 t arcturus_set_default_dpm_table +ffffffff825713d0 t arcturus_populate_umd_state_clk +ffffffff82571490 t arcturus_print_clk_levels +ffffffff82571740 t arcturus_force_clk_levels +ffffffff825719f0 t arcturus_get_power_profile_mode +ffffffff82571d20 t arcturus_set_power_profile_mode +ffffffff82572060 t arcturus_dpm_set_vcn_enable +ffffffff82572150 t arcturus_read_sensor +ffffffff82572380 t arcturus_is_dpm_running +ffffffff825723d0 t arcturus_get_fan_speed_pwm +ffffffff82572530 t arcturus_get_fan_speed_rpm +ffffffff82572650 t arcturus_get_thermal_temperature_range +ffffffff82572740 t arcturus_set_performance_level +ffffffff82572880 t arcturus_dump_pptable +ffffffff825728b0 t arcturus_get_power_limit +ffffffff825729d0 t arcturus_set_df_cstate +ffffffff82572b10 t arcturus_allow_xgmi_power_down +ffffffff82572c30 t arcturus_i2c_control_init +ffffffff82572d80 t arcturus_i2c_control_fini +ffffffff82572dc0 t arcturus_get_unique_id +ffffffff82572f00 t arcturus_init_smc_tables +ffffffff82573090 t arcturus_setup_pptable +ffffffff825731f0 t arcturus_set_fan_speed_pwm +ffffffff825733d0 t arcturus_set_fan_speed_rpm +ffffffff82573520 t arcturus_log_thermal_throttling_event +ffffffff82573970 t arcturus_get_gpu_metrics +ffffffff82573bc0 t arcturus_get_fan_parameters +ffffffff82573c00 t arcturus_get_current_clk_freq_by_table +ffffffff82573d70 t arcturus_get_smu_metrics_data +ffffffff82573ff0 t arcturus_upload_dpm_level +ffffffff82574110 t arcturus_i2c_xfer +ffffffff825743d0 t arcturus_i2c_func +ffffffff82574400 t arcturus_set_fan_static_mode +ffffffff82575000 T cyan_skillfish_set_ppt_funcs +ffffffff82575030 t cyan_skillfish_print_clk_levels +ffffffff82575170 t cyan_skillfish_od_edit_dpm_table +ffffffff825754b0 t cyan_skillfish_read_sensor +ffffffff825756e0 t cyan_skillfish_is_dpm_running +ffffffff82575790 t cyan_skillfish_init_smc_tables +ffffffff82575880 t cyan_skillfish_get_enabled_mask +ffffffff825758c0 t cyan_skillfish_get_dpm_ultimate_freq +ffffffff82575990 t cyan_skillfish_get_gpu_metrics +ffffffff82575c40 t cyan_skillfish_get_smu_metrics_data +ffffffff82576000 T navi10_set_ppt_funcs +ffffffff82576050 t navi10_run_btc +ffffffff825760e0 t navi10_get_allowed_feature_mask +ffffffff825763d0 t navi10_set_default_dpm_table +ffffffff825768f0 t navi10_populate_umd_state_clk +ffffffff82576ab0 t navi10_print_clk_levels +ffffffff82576c90 t navi10_emit_clk_levels +ffffffff82576f00 t navi10_force_clk_levels +ffffffff82577060 t navi10_od_edit_dpm_table +ffffffff825776a0 t navi10_get_clock_by_type_with_latency +ffffffff825777b0 t navi10_get_power_profile_mode +ffffffff82577a90 t navi10_set_power_profile_mode +ffffffff82577d90 t navi10_dpm_set_vcn_enable +ffffffff82577e30 t navi10_dpm_set_jpeg_enable +ffffffff82577ec0 t navi10_read_sensor +ffffffff82578070 t navi10_pre_display_config_changed +ffffffff82578130 t navi10_display_config_changed +ffffffff825781d0 t navi10_notify_smc_display_config +ffffffff825783a0 t navi10_is_dpm_running +ffffffff825783f0 t navi10_get_fan_speed_rpm +ffffffff825784a0 t navi10_set_watermarks_table +ffffffff82578650 t navi10_get_thermal_temperature_range +ffffffff82578740 t navi10_get_uclk_dpm_states +ffffffff82578850 t navi10_set_default_od_settings +ffffffff82578ae0 t navi10_display_disable_memory_clock_switch +ffffffff82578b70 t navi10_get_power_limit +ffffffff82578ca0 t navi10_update_pcie_parameters +ffffffff82578e20 t navi10_i2c_control_init +ffffffff82578f70 t navi10_i2c_control_fini +ffffffff82578fb0 t navi10_init_smc_tables +ffffffff82579220 t navi10_setup_pptable +ffffffff82579490 t navi10_baco_enter +ffffffff825794e0 t navi10_baco_exit +ffffffff82579640 t navi1x_get_gpu_metrics +ffffffff8257a0b0 t navi10_enable_mgpu_fan_boost +ffffffff8257a130 t navi10_get_fan_parameters +ffffffff8257a170 t navi10_post_smu_init +ffffffff8257a460 t navi10_get_default_config_table_settings +ffffffff8257a4b0 t navi10_set_config_table +ffffffff8257a570 t navi1x_get_smu_metrics_data +ffffffff8257ac30 t navi10_od_setting_check_range +ffffffff8257acf0 t navi10_i2c_xfer +ffffffff8257afb0 t navi10_i2c_func +ffffffff8257afe0 t navi10_umc_hybrid_cdr_workaround +ffffffff8257c000 T sienna_cichlid_set_ppt_funcs +ffffffff8257c050 t sienna_cichlid_run_btc +ffffffff8257c0e0 t sienna_cichlid_get_allowed_feature_mask +ffffffff8257c370 t sienna_cichlid_set_default_dpm_table +ffffffff8257ca00 t sienna_cichlid_populate_umd_state_clk +ffffffff8257cac0 t sienna_cichlid_print_clk_levels +ffffffff8257cce0 t sienna_cichlid_force_clk_levels +ffffffff8257ce50 t sienna_cichlid_od_edit_dpm_table +ffffffff8257d450 t sienna_cichlid_restore_user_od_settings +ffffffff8257d4e0 t sienna_cichlid_get_power_profile_mode +ffffffff8257d7c0 t sienna_cichlid_set_power_profile_mode +ffffffff8257dac0 t sienna_cichlid_dpm_set_vcn_enable +ffffffff8257db90 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff8257dc20 t sienna_cichlid_read_sensor +ffffffff8257e490 t sienna_cichlid_pre_display_config_changed +ffffffff8257e4c0 t sienna_cichlid_display_config_changed +ffffffff8257e520 t sienna_cichlid_notify_smc_display_config +ffffffff8257e6f0 t sienna_cichlid_is_dpm_running +ffffffff8257e750 t sienna_cichlid_get_fan_speed_rpm +ffffffff8257e860 t sienna_cichlid_set_watermarks_table +ffffffff8257ea00 t sienna_cichlid_get_thermal_temperature_range +ffffffff8257eae0 t sienna_cichlid_get_uclk_dpm_states +ffffffff8257ebf0 t sienna_cichlid_set_default_od_settings +ffffffff8257edc0 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff8257ee50 t sienna_cichlid_dump_pptable +ffffffff8257ee80 t sienna_cichlid_get_power_limit +ffffffff8257ef50 t sienna_cichlid_update_pcie_parameters +ffffffff8257f080 t sienna_cichlid_i2c_control_init +ffffffff8257f1d0 t sienna_cichlid_i2c_control_fini +ffffffff8257f210 t sienna_cichlid_get_unique_id +ffffffff8257f380 t sienna_cichlid_init_smc_tables +ffffffff8257f6f0 t sienna_cichlid_set_mp1_state +ffffffff8257f730 t sienna_cichlid_setup_pptable +ffffffff8257fba0 t sienna_cichlid_system_features_control +ffffffff8257fc40 t sienna_cichlid_baco_enter +ffffffff8257fc90 t sienna_cichlid_baco_exit +ffffffff8257fdf0 t sienna_cichlid_is_mode1_reset_supported +ffffffff8257fe80 t sienna_cichlid_is_mode2_reset_supported +ffffffff8257feb0 t sienna_cichlid_mode2_reset +ffffffff82580050 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff82580070 t sienna_cichlid_get_gpu_metrics +ffffffff82580630 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff82580680 t sienna_cichlid_get_fan_parameters +ffffffff825806c0 t sienna_cichlid_gpo_control +ffffffff82580790 t sienna_cichlid_get_ecc_info +ffffffff82580890 t sienna_cichlid_stb_get_data_direct +ffffffff82580950 t sienna_cichlid_get_default_config_table_settings +ffffffff825809c0 t sienna_cichlid_set_config_table +ffffffff82580a90 t sienna_cichlid_get_throttler_status_locked +ffffffff82580bf0 t sienna_cichlid_get_smartshift_power_percentage +ffffffff82580d20 t sienna_cichlid_i2c_xfer +ffffffff82580fe0 t sienna_cichlid_i2c_func +ffffffff82582000 T smu_v11_0_init_microcode +ffffffff82582170 T smu_v11_0_fini_microcode +ffffffff825821d0 T smu_v11_0_load_microcode +ffffffff82582330 T smu_v11_0_check_fw_status +ffffffff82582390 T smu_v11_0_check_fw_version +ffffffff82582520 T smu_v11_0_setup_pptable +ffffffff82582640 T smu_v11_0_init_smc_tables +ffffffff825827d0 T smu_v11_0_fini_smc_tables +ffffffff82582a90 T smu_v11_0_init_power +ffffffff82582b20 T smu_v11_0_fini_power +ffffffff82582b90 T smu_v11_0_get_vbios_bootup_values +ffffffff82582f40 T smu_v11_0_notify_memory_pool_location +ffffffff82583060 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff825830f0 T smu_v11_0_set_driver_table_location +ffffffff82583170 T smu_v11_0_set_tool_table_location +ffffffff825831f0 T smu_v11_0_init_display_count +ffffffff82583250 T smu_v11_0_set_allowed_mask +ffffffff82583330 T smu_v11_0_system_features_control +ffffffff82583350 T smu_v11_0_notify_display_change +ffffffff825833c0 T smu_v11_0_init_max_sustainable_clocks +ffffffff82583690 t smu_v11_0_get_max_sustainable_clock +ffffffff82583800 T smu_v11_0_get_current_power_limit +ffffffff82583900 T smu_v11_0_set_power_limit +ffffffff82583a70 T smu_v11_0_interrupt_work +ffffffff82583b00 T smu_v11_0_enable_thermal_alert +ffffffff82583bb0 T smu_v11_0_disable_thermal_alert +ffffffff82583bd0 T smu_v11_0_get_gfx_vdd +ffffffff82583c90 T smu_v11_0_display_clock_voltage_request +ffffffff82583e00 T smu_v11_0_set_hard_freq_limited_range +ffffffff82583f00 T smu_v11_0_gfx_off_control +ffffffff82583f70 T smu_v11_0_get_fan_control_mode +ffffffff82583fd0 T smu_v11_0_set_fan_speed_pwm +ffffffff825841b0 t smu_v11_0_set_fan_static_mode +ffffffff825843b0 T smu_v11_0_set_fan_speed_rpm +ffffffff82584500 T smu_v11_0_get_fan_speed_pwm +ffffffff82584660 T smu_v11_0_get_fan_speed_rpm +ffffffff82584770 T smu_v11_0_set_fan_control_mode +ffffffff82584960 T smu_v11_0_set_xgmi_pstate +ffffffff82584980 T smu_v11_0_register_irq_handler +ffffffff82584a50 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff82584ae0 T smu_v11_0_set_azalia_d3_pme +ffffffff82584b00 T smu_v11_0_baco_set_armd3_sequence +ffffffff82584b20 T smu_v11_0_baco_is_support +ffffffff82584bc0 T smu_v11_0_baco_get_state +ffffffff82584bf0 T smu_v11_0_baco_set_state +ffffffff82584f10 T smu_v11_0_baco_enter +ffffffff82585060 T smu_v11_0_baco_exit +ffffffff825851e0 T smu_v11_0_mode1_reset +ffffffff82585260 T smu_v11_0_handle_passthrough_sbr +ffffffff82585280 T smu_v11_0_get_dpm_ultimate_freq +ffffffff825853e0 T smu_v11_0_set_soft_freq_limited_range +ffffffff825854d0 T smu_v11_0_set_performance_level +ffffffff825858b0 T smu_v11_0_set_power_source +ffffffff82585920 T smu_v11_0_get_dpm_freq_by_index +ffffffff825859e0 T smu_v11_0_get_dpm_level_count +ffffffff82585a90 T smu_v11_0_set_single_dpm_table +ffffffff82585d70 T smu_v11_0_get_dpm_level_range +ffffffff82585f30 T smu_v11_0_get_current_pcie_link_width_level +ffffffff82585f90 T smu_v11_0_get_current_pcie_link_width +ffffffff82586000 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff82586060 T smu_v11_0_get_current_pcie_link_speed +ffffffff825860c0 T smu_v11_0_gfx_ulv_control +ffffffff82586140 T smu_v11_0_deep_sleep_control +ffffffff82586350 T smu_v11_0_restore_user_od_settings +ffffffff825863e0 T smu_v11_0_set_smu_mailbox_registers +ffffffff82586450 t smu_v11_0_set_irq_state +ffffffff82586aa0 t smu_v11_0_irq_process +ffffffff82587000 T vangogh_set_ppt_funcs +ffffffff82587040 t vangogh_set_default_dpm_tables +ffffffff82587070 t vangogh_common_print_clk_levels +ffffffff82587530 t vangogh_force_clk_levels +ffffffff825877b0 t vangogh_od_edit_dpm_table +ffffffff82587d70 t vangogh_get_power_profile_mode +ffffffff82587ed0 t vangogh_set_power_profile_mode +ffffffff82588020 t vangogh_dpm_set_vcn_enable +ffffffff82588080 t vangogh_dpm_set_jpeg_enable +ffffffff825880e0 t vangogh_read_sensor +ffffffff825887f0 t vangogh_get_apu_thermal_limit +ffffffff82588810 t vangogh_set_apu_thermal_limit +ffffffff82588830 t vangogh_is_dpm_running +ffffffff825888a0 t vangogh_set_watermarks_table +ffffffff82588a30 t vangogh_set_performance_level +ffffffff825893f0 t vangogh_get_power_limit +ffffffff82589570 t vangogh_get_ppt_limit +ffffffff825895e0 t vangogh_get_dpm_clock_table +ffffffff82589750 t vangogh_init_smc_tables +ffffffff825899d0 t vangogh_system_features_control +ffffffff82589a20 t vangogh_set_power_limit +ffffffff82589bb0 t vangogh_get_gfxoff_status +ffffffff82589c40 t vangogh_get_gfxoff_entrycount +ffffffff82589cc0 t vangogh_set_gfxoff_residency +ffffffff82589d40 t vangogh_get_gfxoff_residency +ffffffff82589d80 t vangogh_mode2_reset +ffffffff82589f40 t vangogh_common_get_gpu_metrics +ffffffff8258a760 t vangogh_post_smu_init +ffffffff8258a920 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff8258a990 t vangogh_force_dpm_limit_value +ffffffff8258ab10 t vangogh_get_dpm_ultimate_freq +ffffffff8258aed0 t vangogh_set_soft_freq_limited_range +ffffffff8258b090 t vangogh_get_gpu_metrics_v2_3 +ffffffff8258c000 T renoir_set_ppt_funcs +ffffffff8258c0a0 t renoir_get_current_power_state +ffffffff8258c120 t renoir_print_clk_levels +ffffffff8258c570 t renoir_force_clk_levels +ffffffff8258c7d0 t renoir_od_edit_dpm_table +ffffffff8258cb10 t renoir_get_power_profile_mode +ffffffff8258cc20 t renoir_set_power_profile_mode +ffffffff8258cd70 t renoir_dpm_set_vcn_enable +ffffffff8258ce10 t renoir_dpm_set_jpeg_enable +ffffffff8258cea0 t renoir_read_sensor +ffffffff8258d2a0 t renoir_is_dpm_running +ffffffff8258d2e0 t renoir_set_watermarks_table +ffffffff8258d4a0 t renoir_set_performance_level +ffffffff8258dae0 t renoir_get_dpm_clock_table +ffffffff8258de30 t renoir_init_smc_tables +ffffffff8258dfd0 t renoir_get_enabled_mask +ffffffff8258e010 t renoir_get_dpm_ultimate_freq +ffffffff8258e2e0 t renoir_get_gpu_metrics +ffffffff8258e520 t renoir_gfx_state_change_set +ffffffff8258e550 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff8258e600 t renoir_force_dpm_limit_value +ffffffff8258f000 T smu_v12_0_check_fw_status +ffffffff8258f060 T smu_v12_0_check_fw_version +ffffffff8258f0e0 T smu_v12_0_powergate_sdma +ffffffff8258f130 T smu_v12_0_set_gfx_cgpg +ffffffff8258f190 T smu_v12_0_get_gfxoff_status +ffffffff8258f220 T smu_v12_0_gfx_off_control +ffffffff8258f350 T smu_v12_0_fini_smc_tables +ffffffff8258f420 T smu_v12_0_set_default_dpm_tables +ffffffff8258f450 T smu_v12_0_mode2_reset +ffffffff8258f470 T smu_v12_0_set_soft_freq_limited_range +ffffffff8258f5f0 T smu_v12_0_set_driver_table_location +ffffffff8258f670 T smu_v12_0_get_vbios_bootup_values +ffffffff82590000 T aldebaran_set_ppt_funcs +ffffffff82590050 t aldebaran_get_allowed_feature_mask +ffffffff825900b0 t aldebaran_set_default_dpm_table +ffffffff825902f0 t aldebaran_populate_umd_state_clk +ffffffff825903f0 t aldebaran_print_clk_levels +ffffffff825905f0 t aldebaran_force_clk_levels +ffffffff82590800 t aldebaran_usr_edit_dpm_table +ffffffff82590a40 t aldebaran_read_sensor +ffffffff82590cc0 t aldebaran_is_dpm_running +ffffffff82590d20 t aldebaran_get_thermal_temperature_range +ffffffff82590df0 t aldebaran_set_performance_level +ffffffff82590ea0 t aldebaran_get_power_limit +ffffffff82591060 t aldebaran_set_df_cstate +ffffffff825910f0 t aldebaran_allow_xgmi_power_down +ffffffff825911a0 t aldebaran_i2c_control_init +ffffffff82591270 t aldebaran_i2c_control_fini +ffffffff825912b0 t aldebaran_get_unique_id +ffffffff825913a0 t aldebaran_init_smc_tables +ffffffff82591590 t aldebaran_set_mp1_state +ffffffff825915d0 t aldebaran_setup_pptable +ffffffff825916c0 t aldebaran_system_features_control +ffffffff82591850 t aldebaran_set_power_limit +ffffffff825918e0 t aldebaran_is_baco_supported +ffffffff82591910 t aldebaran_is_mode1_reset_supported +ffffffff82591940 t aldebaran_is_mode2_reset_supported +ffffffff82591970 t aldebaran_mode1_reset +ffffffff82591a70 t aldebaran_mode2_reset +ffffffff82591eb0 t aldebaran_set_soft_freq_limited_range +ffffffff825920f0 t aldebaran_log_thermal_throttling_event +ffffffff82592450 t aldebaran_get_gpu_metrics +ffffffff82592720 t aldebaran_smu_handle_passthrough_sbr +ffffffff82592740 t aldebaran_smu_send_hbm_bad_page_num +ffffffff825927d0 t aldebaran_get_ecc_info +ffffffff82592940 t aldebaran_send_hbm_bad_channel_flag +ffffffff82592a30 t aldebaran_get_current_clk_freq_by_table +ffffffff82592ba0 t aldebaran_get_smu_metrics_data +ffffffff82592e20 t aldebaran_upload_dpm_level +ffffffff82592f40 t aldebaran_i2c_xfer +ffffffff82593200 t aldebaran_i2c_func +ffffffff82594000 T smu_v13_0_init_microcode +ffffffff82594150 T smu_v13_0_fini_microcode +ffffffff825941b0 T smu_v13_0_load_microcode +ffffffff825941e0 T smu_v13_0_init_pptable_microcode +ffffffff82594390 T smu_v13_0_get_pptable_from_firmware +ffffffff825944c0 T smu_v13_0_check_fw_status +ffffffff82594540 T smu_v13_0_check_fw_version +ffffffff825945d0 T smu_v13_0_setup_pptable +ffffffff82594770 T smu_v13_0_init_smc_tables +ffffffff82594940 T smu_v13_0_fini_smc_tables +ffffffff82594be0 T smu_v13_0_init_power +ffffffff82594c70 T smu_v13_0_fini_power +ffffffff82594d00 T smu_v13_0_get_vbios_bootup_values +ffffffff82594fd0 T smu_v13_0_notify_memory_pool_location +ffffffff825950a0 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff82595130 T smu_v13_0_set_driver_table_location +ffffffff825951b0 T smu_v13_0_set_tool_table_location +ffffffff82595230 T smu_v13_0_init_display_count +ffffffff82595270 T smu_v13_0_set_allowed_mask +ffffffff82595350 T smu_v13_0_gfx_off_control +ffffffff825953d0 T smu_v13_0_system_features_control +ffffffff825953f0 T smu_v13_0_notify_display_change +ffffffff82595460 T smu_v13_0_init_max_sustainable_clocks +ffffffff82595730 t smu_v13_0_get_max_sustainable_clock +ffffffff825958a0 T smu_v13_0_get_current_power_limit +ffffffff825959a0 T smu_v13_0_set_power_limit +ffffffff82595ae0 T smu_v13_0_enable_thermal_alert +ffffffff82595b80 T smu_v13_0_disable_thermal_alert +ffffffff82595bc0 T smu_v13_0_get_gfx_vdd +ffffffff82595c80 T smu_v13_0_display_clock_voltage_request +ffffffff82595df0 T smu_v13_0_set_hard_freq_limited_range +ffffffff82595ef0 T smu_v13_0_get_fan_control_mode +ffffffff82595f40 T smu_v13_0_set_fan_speed_pwm +ffffffff825961b0 t smu_v13_0_set_fan_static_mode +ffffffff825963b0 T smu_v13_0_set_fan_control_mode +ffffffff82596550 T smu_v13_0_set_fan_speed_rpm +ffffffff82596740 T smu_v13_0_set_xgmi_pstate +ffffffff82596760 T smu_v13_0_register_irq_handler +ffffffff82596840 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff825968d0 T smu_v13_0_set_azalia_d3_pme +ffffffff825968f0 T smu_v13_0_wait_for_event +ffffffff82596940 T smu_v13_0_get_dpm_ultimate_freq +ffffffff82596ab0 T smu_v13_0_set_soft_freq_limited_range +ffffffff82596ba0 T smu_v13_0_set_performance_level +ffffffff825973f0 T smu_v13_0_set_power_source +ffffffff82597460 T smu_v13_0_get_dpm_freq_by_index +ffffffff82597520 T smu_v13_0_set_single_dpm_table +ffffffff82597890 T smu_v13_0_get_current_pcie_link_width_level +ffffffff825978f0 T smu_v13_0_get_current_pcie_link_width +ffffffff82597960 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff825979c0 T smu_v13_0_get_current_pcie_link_speed +ffffffff82597a20 T smu_v13_0_set_vcn_enable +ffffffff82597ae0 T smu_v13_0_set_jpeg_enable +ffffffff82597b00 T smu_v13_0_run_btc +ffffffff82597b90 T smu_v13_0_gpo_control +ffffffff82597c30 T smu_v13_0_deep_sleep_control +ffffffff82597f30 T smu_v13_0_gfx_ulv_control +ffffffff82597fb0 T smu_v13_0_baco_set_armd3_sequence +ffffffff82598020 T smu_v13_0_baco_is_support +ffffffff825980c0 T smu_v13_0_baco_get_state +ffffffff825980f0 T smu_v13_0_baco_set_state +ffffffff825981f0 T smu_v13_0_baco_enter +ffffffff82598380 T smu_v13_0_baco_exit +ffffffff82598430 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff82598470 T smu_v13_0_od_edit_dpm_table +ffffffff82598780 T smu_v13_0_set_default_dpm_tables +ffffffff825987b0 T smu_v13_0_set_smu_mailbox_registers +ffffffff82598820 T smu_v13_0_mode1_reset +ffffffff825988a0 T smu_v13_0_update_pcie_parameters +ffffffff82598b20 t smu_v13_0_set_irq_state +ffffffff82599170 t smu_v13_0_irq_process +ffffffff8259a000 T smu_v13_0_0_set_ppt_funcs +ffffffff8259a0f0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff8259a240 t smu_v13_0_0_set_default_dpm_table +ffffffff8259a6c0 t smu_v13_0_0_populate_umd_state_clk +ffffffff8259a800 t smu_v13_0_0_print_clk_levels +ffffffff8259a950 t smu_v13_0_0_force_clk_levels +ffffffff8259aae0 t smu_v13_0_0_od_edit_dpm_table +ffffffff8259b020 t smu_v13_0_0_restore_user_od_settings +ffffffff8259b100 t smu_v13_0_0_get_power_profile_mode +ffffffff8259b220 t smu_v13_0_0_set_power_profile_mode +ffffffff8259b4b0 t smu_v13_0_0_read_sensor +ffffffff8259b730 t smu_v13_0_0_is_dpm_running +ffffffff8259b780 t smu_v13_0_0_get_fan_speed_pwm +ffffffff8259b870 t smu_v13_0_0_get_fan_speed_rpm +ffffffff8259b8e0 t smu_v13_0_0_get_thermal_temperature_range +ffffffff8259b9e0 t smu_v13_0_0_set_default_od_settings +ffffffff8259bb40 t smu_v13_0_0_dump_pptable +ffffffff8259bb70 t smu_v13_0_0_get_power_limit +ffffffff8259bc60 t smu_v13_0_0_set_df_cstate +ffffffff8259bc80 t smu_v13_0_0_i2c_control_init +ffffffff8259bdd0 t smu_v13_0_0_i2c_control_fini +ffffffff8259be10 t smu_v13_0_0_get_unique_id +ffffffff8259bec0 t smu_v13_0_0_init_smc_tables +ffffffff8259c130 t smu_v13_0_0_set_mp1_state +ffffffff8259c170 t smu_v13_0_0_setup_pptable +ffffffff8259c2f0 t smu_v13_0_0_system_features_control +ffffffff8259c300 t smu_v13_0_0_baco_enter +ffffffff8259c370 t smu_v13_0_0_baco_exit +ffffffff8259c3e0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff8259c440 t smu_v13_0_0_mode1_reset +ffffffff8259c590 t smu_v13_0_0_mode2_reset +ffffffff8259c5e0 t smu_v13_0_0_enable_gfx_features +ffffffff8259c630 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff8259c760 t smu_v13_0_0_get_gpu_metrics +ffffffff8259cbc0 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff8259cc10 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff8259cca0 t smu_v13_0_0_get_ecc_info +ffffffff8259cdb0 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff8259ce40 t smu_v13_0_0_i2c_xfer +ffffffff8259d100 t smu_v13_0_0_i2c_func +ffffffff8259e000 T smu_v13_0_4_set_ppt_funcs +ffffffff8259e0c0 t smu_v13_0_4_print_clk_levels +ffffffff8259e140 t smu_v13_0_4_force_clk_levels +ffffffff8259e420 t smu_v13_0_4_read_sensor +ffffffff8259e760 t smu_v13_0_4_is_dpm_running +ffffffff8259e7c0 t smu_v13_0_4_set_watermarks_table +ffffffff8259e950 t smu_v13_0_4_set_performance_level +ffffffff8259f660 t smu_v13_0_4_init_smc_tables +ffffffff8259f800 t smu_v13_0_4_fini_smc_tables +ffffffff8259f8d0 t smu_v13_0_4_system_features_control +ffffffff8259f960 t smu_v13_0_4_mode2_reset +ffffffff8259f980 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff8259fdb0 t smu_v13_0_4_get_gpu_metrics +ffffffff8259ff90 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff8259fff0 t smu_v13_0_4_get_current_clk_freq +ffffffff825a1000 T smu_v13_0_5_set_ppt_funcs +ffffffff825a10a0 t smu_v13_0_5_set_default_dpm_tables +ffffffff825a10d0 t smu_v13_0_5_print_clk_levels +ffffffff825a1170 t smu_v13_0_5_force_clk_levels +ffffffff825a1300 t smu_v13_0_5_od_edit_dpm_table +ffffffff825a1610 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff825a1630 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff825a1650 t smu_v13_0_5_read_sensor +ffffffff825a18d0 t smu_v13_0_5_is_dpm_running +ffffffff825a1930 t smu_v13_0_5_set_watermarks_table +ffffffff825a1ac0 t smu_v13_0_5_set_performance_level +ffffffff825a2140 t smu_v13_0_5_init_smc_tables +ffffffff825a22e0 t smu_v13_0_5_fini_smc_tables +ffffffff825a23b0 t smu_v13_0_5_system_features_control +ffffffff825a2400 t smu_v13_0_5_mode2_reset +ffffffff825a2490 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff825a28d0 t smu_v13_0_5_get_gpu_metrics +ffffffff825a2a30 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff825a3000 T smu_v13_0_6_set_ppt_funcs +ffffffff825a3050 t smu_v13_0_6_get_allowed_feature_mask +ffffffff825a30b0 t smu_v13_0_6_set_default_dpm_table +ffffffff825a3600 t smu_v13_0_6_populate_umd_state_clk +ffffffff825a3700 t smu_v13_0_6_print_clk_levels +ffffffff825a3ad0 t smu_v13_0_6_force_clk_levels +ffffffff825a3ce0 t smu_v13_0_6_usr_edit_dpm_table +ffffffff825a3f20 t smu_v13_0_6_read_sensor +ffffffff825a4530 t smu_v13_0_6_is_dpm_running +ffffffff825a45c0 t smu_v13_0_6_get_thermal_temperature_range +ffffffff825a4740 t smu_v13_0_6_set_performance_level +ffffffff825a4870 t smu_v13_0_6_get_power_limit +ffffffff825a4950 t smu_v13_0_6_set_df_cstate +ffffffff825a4970 t smu_v13_0_6_allow_xgmi_power_down +ffffffff825a4990 t smu_v13_0_6_i2c_control_init +ffffffff825a4ae0 t smu_v13_0_6_i2c_control_fini +ffffffff825a4b20 t smu_v13_0_6_get_unique_id +ffffffff825a4ba0 t smu_v13_0_6_init_smc_tables +ffffffff825a4d60 t smu_v13_0_6_check_fw_status +ffffffff825a4dc0 t smu_v13_0_6_setup_pptable +ffffffff825a4df0 t smu_v13_0_6_system_features_control +ffffffff825a4e90 t smu_v13_0_6_get_enabled_mask +ffffffff825a4f10 t smu_v13_0_6_set_power_limit +ffffffff825a4f30 t smu_v13_0_6_register_irq_handler +ffffffff825a4f90 t smu_v13_0_6_is_baco_supported +ffffffff825a4fc0 t smu_v13_0_6_is_mode1_reset_supported +ffffffff825a4ff0 t smu_v13_0_6_is_mode2_reset_supported +ffffffff825a5020 t smu_v13_0_6_mode1_reset +ffffffff825a50e0 t smu_v13_0_6_mode2_reset +ffffffff825a54a0 t smu_v13_0_6_get_dpm_ultimate_freq +ffffffff825a56e0 t smu_v13_0_6_set_soft_freq_limited_range +ffffffff825a5960 t smu_v13_0_6_log_thermal_throttling_event +ffffffff825a5ca0 t smu_v13_0_6_get_gpu_metrics +ffffffff825a6050 t smu_v13_0_6_smu_send_hbm_bad_page_num +ffffffff825a60e0 t smu_v13_0_6_get_smu_metrics_data +ffffffff825a63a0 t smu_v13_0_6_upload_dpm_level +ffffffff825a64d0 t smu_v13_0_6_i2c_xfer +ffffffff825a6800 t smu_v13_0_6_i2c_func +ffffffff825a6830 t smu_v13_0_6_set_irq_state +ffffffff825a6b10 t smu_v13_0_6_irq_process +ffffffff825a7000 T smu_v13_0_7_set_ppt_funcs +ffffffff825a7060 t smu_v13_0_7_get_allowed_feature_mask +ffffffff825a71e0 t smu_v13_0_7_set_default_dpm_table +ffffffff825a7660 t smu_v13_0_7_populate_umd_state_clk +ffffffff825a77a0 t smu_v13_0_7_print_clk_levels +ffffffff825a78f0 t smu_v13_0_7_force_clk_levels +ffffffff825a7a80 t smu_v13_0_7_od_edit_dpm_table +ffffffff825a7fc0 t smu_v13_0_7_restore_user_od_settings +ffffffff825a80a0 t smu_v13_0_7_get_power_profile_mode +ffffffff825a8200 t smu_v13_0_7_set_power_profile_mode +ffffffff825a8470 t smu_v13_0_7_read_sensor +ffffffff825a86e0 t smu_v13_0_7_is_dpm_running +ffffffff825a8730 t smu_v13_0_7_get_fan_speed_pwm +ffffffff825a8820 t smu_v13_0_7_get_fan_speed_rpm +ffffffff825a8890 t smu_v13_0_7_get_thermal_temperature_range +ffffffff825a8990 t smu_v13_0_7_set_default_od_settings +ffffffff825a8af0 t smu_v13_0_7_dump_pptable +ffffffff825a8b20 t smu_v13_0_7_get_power_limit +ffffffff825a8c10 t smu_v13_0_7_set_df_cstate +ffffffff825a8c30 t smu_v13_0_7_init_smc_tables +ffffffff825a8e50 t smu_v13_0_7_check_fw_status +ffffffff825a8eb0 t smu_v13_0_7_set_mp1_state +ffffffff825a8ef0 t smu_v13_0_7_setup_pptable +ffffffff825a9060 t smu_v13_0_7_baco_enter +ffffffff825a90d0 t smu_v13_0_7_baco_exit +ffffffff825a9140 t smu_v13_0_7_is_mode1_reset_supported +ffffffff825a9180 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff825a92b0 t smu_v13_0_7_get_gpu_metrics +ffffffff825a9700 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff825aa000 T yellow_carp_set_ppt_funcs +ffffffff825aa050 t yellow_carp_set_default_dpm_tables +ffffffff825aa080 t yellow_carp_print_clk_levels +ffffffff825aa100 t yellow_carp_force_clk_levels +ffffffff825aa3e0 t yellow_carp_od_edit_dpm_table +ffffffff825aa6f0 t yellow_carp_dpm_set_vcn_enable +ffffffff825aa710 t yellow_carp_dpm_set_jpeg_enable +ffffffff825aa730 t yellow_carp_read_sensor +ffffffff825aab00 t yellow_carp_is_dpm_running +ffffffff825aab60 t yellow_carp_set_watermarks_table +ffffffff825aacf0 t yellow_carp_set_performance_level +ffffffff825ab8e0 t yellow_carp_init_smc_tables +ffffffff825aba80 t yellow_carp_fini_smc_tables +ffffffff825abb50 t yellow_carp_system_features_control +ffffffff825abba0 t yellow_carp_get_gfxoff_status +ffffffff825abc30 t yellow_carp_mode2_reset +ffffffff825abcc0 t yellow_carp_get_dpm_ultimate_freq +ffffffff825ac110 t yellow_carp_get_gpu_metrics +ffffffff825ac2e0 t yellow_carp_post_smu_init +ffffffff825ac370 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff825ac3d0 t yellow_carp_get_current_clk_freq +ffffffff825ac4e0 t yellow_carp_get_dpm_profile_freq +ffffffff825ad000 T smu_cmn_send_msg_without_waiting +ffffffff825ad1b0 T smu_cmn_wait_for_response +ffffffff825ad300 T smu_cmn_send_smc_msg_with_param +ffffffff825ad690 T smu_cmn_to_asic_specific_index +ffffffff825ad7c0 t __smu_cmn_reg_print_error +ffffffff825ada20 T smu_cmn_send_smc_msg +ffffffff825ada40 T smu_cmn_send_debug_smc_msg +ffffffff825adae0 T smu_cmn_send_debug_smc_msg_with_param +ffffffff825adb80 T smu_cmn_feature_is_supported +ffffffff825adc30 T smu_cmn_feature_is_enabled +ffffffff825add30 T smu_cmn_clk_dpm_is_enabled +ffffffff825ade40 T smu_cmn_get_enabled_mask +ffffffff825adf40 T smu_cmn_get_indep_throttler_status +ffffffff825adff0 T smu_cmn_feature_update_enable_state +ffffffff825ae0b0 T smu_cmn_feature_set_enabled +ffffffff825ae190 T smu_cmn_get_pp_feature_mask +ffffffff825ae340 T smu_cmn_set_pp_feature_mask +ffffffff825ae470 T smu_cmn_disable_all_features_with_exception +ffffffff825ae530 T smu_cmn_get_smc_version +ffffffff825ae620 T smu_cmn_update_table +ffffffff825ae7b0 T smu_cmn_write_watermarks_table +ffffffff825ae890 T smu_cmn_write_pptable +ffffffff825ae970 T smu_cmn_get_metrics_table +ffffffff825aeae0 T smu_cmn_get_combo_pptable +ffffffff825aebd0 T smu_cmn_init_soft_gpu_metrics +ffffffff825aecd0 T smu_cmn_set_mp1_state +ffffffff825aed80 T smu_cmn_is_audio_func_enabled +ffffffff825af000 T pci_mcfg_init +ffffffff825af050 T pci_lookup_segment +ffffffff825af0b0 T pci_attach_hook +ffffffff825af0e0 T pci_bus_maxdevs +ffffffff825af110 T pci_make_tag +ffffffff825af190 T pci_decompose_tag +ffffffff825af1f0 T pci_conf_size +ffffffff825af250 T pci_mcfg_map_bus +ffffffff825af2e0 T pci_conf_read +ffffffff825af450 T pci_conf_write +ffffffff825af5a0 T pci_msix_table_map +ffffffff825af6f0 T pci_msix_table_unmap +ffffffff825af7a0 T msi_hwmask +ffffffff825af880 T msi_hwunmask +ffffffff825af960 T msi_addroute +ffffffff825afaa0 T msi_delroute +ffffffff825afb30 T msi_allocidtvec +ffffffff825afca0 T pci_intr_enable_msivec +ffffffff825afda0 T pci_intr_map_msi +ffffffff825afe60 T pci_intr_map_msivec +ffffffff825aff20 T msix_hwmask +ffffffff825b00c0 T msix_hwunmask +ffffffff825b0220 T msix_addroute +ffffffff825b0470 T msix_delroute +ffffffff825b0600 T pci_intr_map_msix +ffffffff825b06e0 T pci_intr_map +ffffffff825b0940 T pci_intr_string +ffffffff825b0a20 T pci_intr_establish +ffffffff825b0a70 T pci_intr_establish_cpu +ffffffff825b0bf0 T pci_intr_disestablish +ffffffff825b0c10 T pci_init_extents +ffffffff825b0e30 T pci_probe_device_hook +ffffffff825b0e70 T pci_dev_postattach +ffffffff825b0e80 T pci_min_powerstate +ffffffff825b0e90 T pci_set_powerstate_md +ffffffff825b1000 T pciide_machdep_compat_intr_establish +ffffffff825b1070 T pciide_machdep_compat_intr_disestablish +ffffffff825b2000 T vga_post_init +ffffffff825b2390 t vm86_emu_inb +ffffffff825b23e0 t vm86_emu_inw +ffffffff825b2420 t vm86_emu_inl +ffffffff825b2460 t vm86_emu_outb +ffffffff825b24b0 t vm86_emu_outw +ffffffff825b24f0 t vm86_emu_outl +ffffffff825b2530 T vga_post_call +ffffffff825b25b0 T vga_post_free +ffffffff825b2640 T ddb_vgapost +ffffffff825b3000 T pchbmatch +ffffffff825b3040 T pchbattach +ffffffff825b3570 T pchbactivate +ffffffff825b35f0 T pchb_amd64ht_attach +ffffffff825b3750 T pchb_rnd +ffffffff825b37e0 T pchb_print +ffffffff825b4000 T amas_match +ffffffff825b4060 T amas_attach +ffffffff825b40c0 T amas_intl_nodes +ffffffff825b4160 T amas_get_pagerange +ffffffff825b5000 T agp_flush_cache +ffffffff825b5030 T agp_flush_cache_range +ffffffff825b5040 T agp_init_map +ffffffff825b5120 T agp_destroy_map +ffffffff825b5170 T agp_map_subregion +ffffffff825b51a0 T agp_unmap_subregion +ffffffff825b51d0 T agp_map_atomic +ffffffff825b5200 T agp_unmap_atomic +ffffffff825b6000 T cardslotmatch +ffffffff825b6050 T cardslotattach +ffffffff825b6320 T cardslot_event +ffffffff825b6380 T cardslot_cb_print +ffffffff825b63e0 T cardslot_16_print +ffffffff825b6430 T cardslot_16_submatch +ffffffff825b6480 T cardslot_event_throw +ffffffff825b6540 T cardslot_process_event +ffffffff825b7000 T cardbusmatch +ffffffff825b7060 T cardbusattach +ffffffff825b7150 T cardbus_read_tuples +ffffffff825b75e0 T parse_tuple +ffffffff825b7860 T cardbus_attach_card +ffffffff825b8170 T enable_function +ffffffff825b8220 T decode_tuples +ffffffff825b8300 T cardbusprint +ffffffff825b8420 T cardbussubmatch +ffffffff825b8480 T disable_function +ffffffff825b84e0 T cardbus_detach_card +ffffffff825b85d0 T cardbus_intr_establish +ffffffff825b8600 T cardbus_intr_disestablish +ffffffff825b8620 T cardbus_function_enable +ffffffff825b8720 T cardbus_function_disable +ffffffff825b8780 T cardbus_matchbyid +ffffffff825b87f0 T decode_tuple +ffffffff825b9000 T cardbus_mapreg_map +ffffffff825b91d0 T cardbus_mapreg_unmap +ffffffff825ba000 T cardbus_read_exrom +ffffffff825bb000 T rbus_space_alloc +ffffffff825bb070 T rbus_space_alloc_subregion +ffffffff825bb270 T rbus_space_free +ffffffff825bb310 T rbus_new_body +ffffffff825bb3b0 T rbus_new_root_delegate +ffffffff825bb490 T rbus_new_root_share +ffffffff825bc000 T com_cardbus_match +ffffffff825bc080 T com_cardbus_attach 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rtw_cardbus_match +ffffffff825c5030 T rtw_cardbus_attach +ffffffff825c52e0 T rtw_cardbus_detach +ffffffff825c5430 T rtw_cardbus_intr_ack +ffffffff825c5450 T rtw_cardbus_funcregen +ffffffff825c54d0 T rtw_cardbus_enable +ffffffff825c5690 T rtw_cardbus_disable +ffffffff825c57b0 T rtw_cardbus_power +ffffffff825c57f0 T rtw_cardbus_setup +ffffffff825c6000 T ral_cardbus_match +ffffffff825c6030 T ral_cardbus_attach +ffffffff825c6280 T ral_cardbus_detach +ffffffff825c6350 T ral_cardbus_activate +ffffffff825c63f0 T ral_cardbus_enable +ffffffff825c65a0 T ral_cardbus_disable +ffffffff825c6600 T ral_cardbus_setup +ffffffff825c66c0 T ral_cardbus_wakeup +ffffffff825c7000 T acx_cardbus_match +ffffffff825c7030 T acx_cardbus_attach +ffffffff825c72b0 T acx_cardbus_detach +ffffffff825c7400 T acx_cardbus_enable +ffffffff825c7510 T acx_cardbus_disable +ffffffff825c7570 T acx_cardbus_power +ffffffff825c75b0 T acx_cardbus_setup +ffffffff825c8000 T pgt_cardbus_match +ffffffff825c8030 T pgt_cardbus_attach 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hme_tick +ffffffff825ef680 T hme_unconfig +ffffffff825ef7b0 T hme_fill_rx_ring +ffffffff825ef960 T hme_reset +ffffffff825ef9b0 T hme_init +ffffffff825f0000 T hme_meminit +ffffffff825f0160 T hme_iff +ffffffff825f0340 T hme_tint +ffffffff825f04b0 T hme_rint +ffffffff825f06b0 T hme_eint +ffffffff825f0760 T hme_intr +ffffffff825f0880 T hme_newbuf +ffffffff825f1000 T hmematch_pci +ffffffff825f1040 T hmeattach_pci +ffffffff825f1390 T hmedetach_pci +ffffffff825f1430 T hme_pci_enaddr +ffffffff825f2000 T isamatch +ffffffff825f2060 T isaattach +ffffffff825f21d0 T isascan +ffffffff825f2670 T isaprint +ffffffff825f2860 T isa_intr_typename +ffffffff825f3000 T isadmamatch +ffffffff825f3040 T isadmaattach +ffffffff825f3280 T isa_dmacascade +ffffffff825f3380 T isa_dmamap_create +ffffffff825f3470 T isa_dmamap_destroy +ffffffff825f34f0 T isa_dmastart +ffffffff825f39d0 T isa_dmaabort +ffffffff825f3af0 T isa_dmacount +ffffffff825f3cf0 T isa_dmafinished +ffffffff825f3dc0 T isa_dmadone +ffffffff825f3f90 T isa_dmamem_alloc +ffffffff825f4060 T isa_dmamem_free +ffffffff825f40f0 T isa_dmamem_map +ffffffff825f4180 T isa_dmamem_unmap +ffffffff825f41d0 T isa_dmamem_mmap +ffffffff825f4280 T isa_drq_isfree +ffffffff825f42f0 T isa_malloc +ffffffff825f44d0 T isa_free +ffffffff825f4620 T isa_mappage +ffffffff825f5000 T fdcprobe +ffffffff825f52e0 T fdcattach +ffffffff825f5450 T out_fdc +ffffffff825f5530 T fdcintr +ffffffff825f5540 T fdc_create_kthread +ffffffff825f55b0 T fdcattach_deferred +ffffffff825f5690 T fdcpseudointr +ffffffff825f56e0 T fddprint +ffffffff825f5730 T fdcresult +ffffffff825f5840 T fdcstart +ffffffff825f5870 T fdcstatus +ffffffff825f6000 T fdprobe +ffffffff825f61d0 T fdattach +ffffffff825f6340 T fdactivate +ffffffff825f6400 T fdgetdisklabel +ffffffff825f6540 T fdstrategy +ffffffff825f67c0 T fd_motor_on +ffffffff825f6830 T fd_motor_off +ffffffff825f6920 T fdtimeout +ffffffff825f69b0 T fd_nvtotype +ffffffff825f6a30 T fdstart +ffffffff825f6af0 T fdfinish +ffffffff825f6c50 T fdread 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wsdisplay_emul_match +ffffffff8260c080 T wsdisplay_emul_attach +ffffffff8260c160 T wsdisplay_emul_detach +ffffffff8260c170 T wsdisplay_activate +ffffffff8260c1f0 T wsdisplay_getc_dummy +ffffffff8260c220 T wsdisplay_cnputc +ffffffff8260c2a0 T wsdisplay_pollc +ffffffff8260c330 T wsscreen_attach +ffffffff8260c4f0 T wsdisplay_emulbell_task +ffffffff8260c590 T wsscreen_detach +ffffffff8260c670 T wsdisplay_screentype_pick +ffffffff8260c730 T wsdisplay_addscreen_print +ffffffff8260c7b0 T wsdisplay_addscreen +ffffffff8260c9f0 T allocate_copybuffer +ffffffff8260cb40 T wsdisplay_getscreen +ffffffff8260cc00 T wsdisplay_closescreen +ffffffff8260cd60 T wsdisplayopen +ffffffff8260cf50 T wsdisplay_delscreen +ffffffff8260d0d0 T wsdisplay_update_rawkbd +ffffffff8260d1f0 T wsdisplay_common_attach +ffffffff8260d610 T wsdisplay_common_detach +ffffffff8260d8c0 T wsdisplay_switchtoconsole +ffffffff8260d930 T wsemuldisplaydevprint +ffffffff8260d980 T wsemuldisplaydevsubmatch +ffffffff8260d9d0 T wsdisplay_burner +ffffffff8260dac0 T wsdisplay_burn +ffffffff8260db40 T wsdisplay_cnattach +ffffffff8260dcd0 T wsdisplaystart +ffffffff8260df50 T wsdisplayparam +ffffffff8260dfa0 T wsdisplayclose +ffffffff8260e150 T wsdisplay_kbdholdscr +ffffffff8260e1b0 T wsdisplay_internal_ioctl +ffffffff8260e8f0 T wsdisplayread +ffffffff8260e970 T wsdisplaywrite +ffffffff8260e9f0 T wsdisplaytty +ffffffff8260ea60 T wsdisplayioctl +ffffffff8260ec30 T wsdisplay_cfg_ioctl +ffffffff8260f010 T wsdisplay_param +ffffffff8260f0a0 T wsdisplay_driver_ioctl +ffffffff8260f130 T wsdisplay_burner_setup +ffffffff8260f2b0 T wsdisplay_switch +ffffffff8260f500 T wsmoused +ffffffff8260f620 T wsdisplaymmap +ffffffff8260f6a0 T wsdisplaykqfilter +ffffffff8260f700 T mouse_remove +ffffffff8260f7d0 T wsdisplaystop +ffffffff8260f850 T wsdisplay_emulbell +ffffffff8260f8a0 T wsdisplay_emulinput +ffffffff8260f940 T wsdisplay_kbdinput +ffffffff8260fa60 T wsdisplay_rawkbdinput +ffffffff8260fb00 T wsdisplay_switch3 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usl_attachtimeout +ffffffff826141e0 T usl_detachtimeout +ffffffff82614250 T usl_sync_done +ffffffff826142f0 T usl_sync_check +ffffffff826143f0 T usl_sync_get +ffffffff82614450 T usl_detachproc +ffffffff82614500 T usl_detachack +ffffffff82614590 T usl_attachproc +ffffffff82614640 T usl_attachack +ffffffff826146d0 T wsdisplay_usl_ioctl1 +ffffffff826148d0 T wsdisplay_usl_ioctl2 +ffffffff82615000 T filt_wseventdetach +ffffffff82615060 T filt_wseventread +ffffffff826150c0 T wsevent_init +ffffffff82615170 T wsevent_fini +ffffffff826151f0 T wsevent_read +ffffffff826153d0 T wsevent_kqfilter +ffffffff82616000 T wskbd_match +ffffffff82616050 T wskbd_attach +ffffffff826164e0 T wskbd_detach +ffffffff82616760 T wskbd_activate +ffffffff826167a0 T wskbd_mux_open +ffffffff82616880 T wskbd_mux_close +ffffffff82616920 T wskbd_do_ioctl +ffffffff82616990 T wskbd_displayioctl +ffffffff826169b0 T wskbd_set_display +ffffffff82616b00 T wskbd_update_layout +ffffffff82616b40 T wskbddevprint +ffffffff82616b90 T wskbd_kbd_backlight_task +ffffffff82616c70 T wskbd_repeat +ffffffff82616d20 T wskbd_brightness_task +ffffffff82616da0 T wskbd_set_keymap +ffffffff82616e20 T wskbd_cnattach +ffffffff82616f20 T wskbd_cngetc +ffffffff82617040 T wskbd_cnpollc +ffffffff826170a0 T wskbd_cnbell +ffffffff826170f0 T wskbd_cndetach +ffffffff826171a0 T wskbd_deliver_event +ffffffff826172e0 T wskbdopen +ffffffff826173e0 T wskbd_input +ffffffff82617560 T wskbd_translate +ffffffff82617d40 T wskbd_rawinput +ffffffff82617d80 T wskbd_enable +ffffffff82617e20 T wskbd_do_open +ffffffff82617ef0 T wskbdclose +ffffffff82618030 T wskbdread +ffffffff82618110 T wskbdioctl +ffffffff826181a0 T wskbd_do_ioctl_sc +ffffffff826182a0 T wskbd_displayioctl_sc +ffffffff82618b80 T wskbdkqfilter +ffffffff82618be0 T wskbd_pickfree +ffffffff82618c50 T wskbd_set_console_display +ffffffff82618cb0 T wskbd_add_mux +ffffffff82618d30 T update_leds +ffffffff82618de0 T update_modifier +ffffffff82618ee0 T change_displayparam +ffffffff82618fa0 T internal_command +ffffffff82619410 T wskbd_debugger +ffffffff8261a000 T wskbd_compose_value +ffffffff8261a1a0 T ksym_upcase +ffffffff8261a220 T fillmapentry +ffffffff8261a3b0 T wskbd_get_mapentry +ffffffff8261a5d0 T wskbd_init_keymap +ffffffff8261a670 T wskbd_load_keymap +ffffffff8261b000 T wsmouse_match +ffffffff8261b030 T wsmouse_attach +ffffffff8261b0e0 T wsmouse_detach +ffffffff8261b2f0 T wsmouse_activate +ffffffff8261b330 T wsmouse_mux_open +ffffffff8261b500 T wsmouse_mux_close +ffffffff8261b560 T wsmousedoioctl +ffffffff8261b5d0 T wsmousedevprint +ffffffff8261b620 T wsmouseopen +ffffffff8261b720 T wsmouse_input_cleanup +ffffffff8261b7c0 T wsmousedoopen +ffffffff8261b990 T wsmouseclose +ffffffff8261ba90 T wsmouse_input_reset +ffffffff8261bbe0 T wsmouseread +ffffffff8261bcc0 T wsmouseioctl +ffffffff8261bd50 T wsmouse_do_ioctl +ffffffff8261bf10 T wsmouse_param_ioctl +ffffffff8261c080 T wsmouse_set_params +ffffffff8261c3c0 T wsmouse_get_params +ffffffff8261c620 T wsmousekqfilter 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wstpad_set_direction +ffffffff82620180 T wstpad_is_stable +ffffffff82620260 T wstpad_scroll_coords +ffffffff82620360 T wstpad_scroll +ffffffff826204f0 T wstpad_f2scroll +ffffffff826207c0 T wstpad_edgescroll +ffffffff82620930 T wstpad_get_sbtn +ffffffff82620ac0 T wstpad_mtbtn_contacts +ffffffff82620bf0 T wstpad_get_mtbtn +ffffffff82620c50 T wstpad_softbuttons +ffffffff82620d30 T wstpad_is_tap +ffffffff82620db0 T wstpad_tap_filter +ffffffff82620e50 T wstpad_tap_touch +ffffffff826210a0 T wstpad_tap_button +ffffffff826210f0 T wstpad_tap +ffffffff82621550 T wstpad_tap_sync +ffffffff826215b0 T wstpad_tap_timeout +ffffffff82621850 T wstpad_click +ffffffff826218f0 T wstpad_cmds +ffffffff82621b80 T wstpad_mt_inputs +ffffffff82621f30 T wstpad_mt_masks +ffffffff826222f0 T wstpad_touch_inputs +ffffffff82622520 T wstpad_process_input +ffffffff82622880 T wstpad_track_interval +ffffffff826229f0 T wstpad_init_deceleration +ffffffff82622ac0 T wstpad_decelerate +ffffffff82622c30 T wstpad_filter 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wsmux_set_display +ffffffff82626ad0 T wsmux_get_layout +ffffffff82626b00 T wsmux_set_layout +ffffffff82627000 T wsemul_pick +ffffffff82627070 T wsemul_getname +ffffffff82628000 T wsemul_getchar +ffffffff826281d0 T wsemul_local_translate +ffffffff826284b0 T wsemul_utf8_translate +ffffffff82629000 T wsemul_vt100_cnattach +ffffffff82629210 T wsemul_vt100_attach +ffffffff82629540 T wsemul_vt100_output +ffffffff826298b0 T wsemul_vt100_detach +ffffffff82629a20 T wsemul_vt100_resetop +ffffffff82629be0 T wsemul_vt100_output_esc +ffffffff8262a290 T wsemul_vt100_output_csi +ffffffff8262a3d0 T wsemul_vt100_output_scs94 +ffffffff8262a490 T wsemul_vt100_output_scs94_percent +ffffffff8262a4e0 T wsemul_vt100_output_scs96 +ffffffff8262a630 T wsemul_vt100_output_scs96_percent +ffffffff8262a680 T wsemul_vt100_output_esc_hash +ffffffff8262a9e0 T wsemul_vt100_output_esc_spc +ffffffff8262aa10 T wsemul_vt100_output_string +ffffffff8262aa80 T wsemul_vt100_output_string_esc +ffffffff8262aae0 T wsemul_vt100_output_dcs +ffffffff8262ab90 T wsemul_vt100_output_dcs_dollar +ffffffff8262abf0 T wsemul_vt100_output_esc_percent +ffffffff8262ac50 T wsemul_vt100_init +ffffffff8262acb0 T wsemul_vt100_reset +ffffffff8262ade0 T wsemul_vt100_nextline +ffffffff8262ae70 T wsemul_vt100_output_normal +ffffffff8262b0d0 T wsemul_vt100_output_c0c1 +ffffffff8262b370 T wsemul_vt100_jump_scroll +ffffffff8262c000 T wsemul_vt100_scrollup +ffffffff8262c170 T wsemul_vt100_scrolldown +ffffffff8262c2e0 T wsemul_vt100_ed +ffffffff8262c570 T wsemul_vt100_el +ffffffff8262c670 T wsemul_vt100_handle_csi +ffffffff8262d6c0 T vt100_ansimode +ffffffff8262d740 T vt100_decmode +ffffffff8262d870 T vt100_selectattribute +ffffffff8262d9c0 T wsemul_vt100_handle_dcs +ffffffff8262e000 T vt100_initchartables +ffffffff8262e120 T vt100_setnrc +ffffffff8262f000 T wsemul_vt100_translate +ffffffff82630000 T pckbdprobe +ffffffff82630160 T pckbdattach +ffffffff82630380 T pckbdactivate +ffffffff82630410 T pckbd_enable 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pms_disable_synaptics +ffffffff82633300 T pms_enable_alps +ffffffff82633950 T pms_ioctl_alps +ffffffff82633a10 T pms_sync_alps +ffffffff82633ac0 T pms_proc_alps +ffffffff82633da0 T pms_enable_elantech_v1 +ffffffff82634000 T pms_ioctl_elantech +ffffffff826340d0 T pms_sync_elantech_v1 +ffffffff826341b0 T pms_proc_elantech_v1 +ffffffff82634340 T pms_enable_elantech_v2 +ffffffff82634540 T pms_sync_elantech_v2 +ffffffff82634630 T pms_proc_elantech_v2 +ffffffff826347c0 T pms_enable_elantech_v3 +ffffffff826349c0 T pms_sync_elantech_v3 +ffffffff82634a50 T pms_proc_elantech_v3 +ffffffff82634c70 T pms_enable_elantech_v4 +ffffffff82634ee0 T pms_sync_elantech_v4 +ffffffff82634fb0 T pms_proc_elantech_v4 +ffffffff82635350 T pms_enable_intelli +ffffffff82635570 T pms_cmd +ffffffff82635600 T pms_spec_cmd +ffffffff826358d0 T pms_set_scaling +ffffffff82635970 T pms_set_resolution +ffffffff82635a10 T pms_get_devid +ffffffff82635ab0 T pms_get_status +ffffffff82635b50 T pms_set_rate +ffffffff82635bf0 T pms_reset +ffffffff82635c90 T pms_dev_enable +ffffffff82635d50 T pms_dev_disable +ffffffff82635e10 T pms_protocol_lookup +ffffffff82635f20 T pms_reset_detect +ffffffff82635fa0 T pms_reset_timo +ffffffff82636000 T pms_reset_task +ffffffff826360f0 T pms_change_state +ffffffff826364e0 T pmsinput +ffffffff826366b0 T synaptics_set_mode +ffffffff826367d0 T synaptics_query +ffffffff826368e0 T synaptics_get_hwinfo +ffffffff82636e50 T synaptics_sec_proc +ffffffff82636f30 T synaptics_knock +ffffffff826371d0 T alps_sec_proc +ffffffff82637300 T alps_get_hwinfo +ffffffff826377c0 T elantech_set_absolute_mode_v1 +ffffffff82637ba0 T elantech_set_absolute_mode_v2 +ffffffff82638270 T elantech_ps2_cmd +ffffffff82638310 T elantech_set_absolute_mode_v3 +ffffffff826388f0 T elantech_set_absolute_mode_v4 +ffffffff82638b90 T elantech_get_hwinfo_v1 +ffffffff82638dd0 T elantech_get_hwinfo_v2 +ffffffff82639150 T elantech_get_hwinfo_v3 +ffffffff82639390 T elantech_get_hwinfo_v4 +ffffffff82639650 T elantech_knock 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T hidkbd_cngetc +ffffffff82641690 T hidkbd_hookup_bell +ffffffff82642000 T hidms_stylus_hid_parse +ffffffff82642330 T hidms_pad_buttons_hid_parse +ffffffff82642410 T hidms_wacom_setup +ffffffff82642750 T hidms_setup +ffffffff82642da0 T hidms_attach +ffffffff82642f30 T hidms_detach +ffffffff82642f70 T hidms_input +ffffffff82643280 T hidms_enable +ffffffff826432d0 T hidms_ioctl +ffffffff826434a0 T hidms_disable +ffffffff82644000 T hidmt_get_resolution +ffffffff82644110 T hidmt_setup +ffffffff82644870 T hidmt_set_input_mode +ffffffff82644920 T hidmt_configure +ffffffff826449d0 T hidmt_attach +ffffffff82644af0 T hidmt_detach +ffffffff82644b30 T hidmt_input +ffffffff82645050 T hidmt_enable +ffffffff82645090 T hidmt_ioctl +ffffffff82645180 T hidmt_disable +ffffffff82646000 T hidcc_match +ffffffff82646110 T hidcc_attach +ffffffff826462f0 T hidcc_parse +ffffffff82646710 T hidcc_attach_wskbd +ffffffff826467d0 T hidcc_detach +ffffffff826468a0 T hidcc_intr +ffffffff82646c40 T hidcc_intr_slice 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athn_usb_create_node +ffffffff8275e070 T athn_usb_newassoc_cb +ffffffff8275e210 T athn_usb_node_set_rates +ffffffff8275e350 T athn_usb_count_active_sta +ffffffff8275e3a0 T athn_usb_newauth_cb +ffffffff8275e4c0 T athn_usb_node_free_cb +ffffffff8275e590 T athn_usb_ampdu_tx_start +ffffffff8275e6b0 T athn_usb_ampdu_tx_start_cb +ffffffff8275e720 T athn_usb_ampdu_tx_stop +ffffffff8275e810 T athn_usb_ampdu_tx_stop_cb +ffffffff8275e880 T athn_usb_clean_nodes +ffffffff8275e940 T athn_usb_updateedca_cb +ffffffff8275e990 T athn_usb_updateslot_cb +ffffffff8275e9e0 T athn_usb_set_key_cb +ffffffff8275eac0 T athn_usb_delete_key_cb +ffffffff8275eb30 T athn_usb_bcneof +ffffffff8275eba0 T athn_usb_swba +ffffffff8275ed30 T athn_usb_tx_status +ffffffff8275eda0 T athn_usb_rx_wmi_ctrl +ffffffff8275efc0 T athn_usb_rx_radiotap +ffffffff8275f1c0 T athn_usb_rx_frame +ffffffff8275f4b0 T athn_usb_rxeof +ffffffff8275f840 T athn_usb_txeof +ffffffff8275f900 T athn_usb_tx +ffffffff82760000 T uow_match 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+ffffffff827d71b0 T get_param_brightness +ffffffff827d7210 T acpitoshiba_get_param +ffffffff827d7270 T set_param_brightness +ffffffff827d7310 T toshiba_update_brightness +ffffffff827d7420 T acpitoshiba_set_param +ffffffff827d74c0 T toshiba_set_brightness +ffffffff827d7600 T toshiba_enable_events +ffffffff827d76a0 T toshiba_read_events +ffffffff827d7820 T toshiba_hotkey +ffffffff827d7ab0 T toshiba_get_brightness +ffffffff827d7c40 T toshiba_fn_key_brightness_up +ffffffff827d7db0 T toshiba_fn_key_brightness_down +ffffffff827d7f20 T toshiba_fn_key_video_output +ffffffff827d8090 T toshiba_get_video_output +ffffffff827d8220 T toshiba_set_video_output +ffffffff827d9000 T acpisony_match +ffffffff827d9070 T acpisony_attach +ffffffff827d90f0 T acpisony_activate +ffffffff827d9140 T acpisony_notify_setup +ffffffff827d9380 T acpisony_notify +ffffffff827d97b0 T acpisony_find_offset +ffffffff827d98e0 T acpisony_set_hotkey +ffffffff827d9b00 T acpisony_brightness_down +ffffffff827d9c40 T acpisony_get_brightness +ffffffff827d9ce0 T acpisony_set_brightness +ffffffff827da000 T acpivideo_match +ffffffff827da070 T acpivideo_attach +ffffffff827da1f0 T acpivideo_getpcibus +ffffffff827da230 T acpivideo_notify +ffffffff827da2a0 T acpivideo_set_policy +ffffffff827da380 T acpi_foundvout +ffffffff827da460 T acpivideo_print +ffffffff827db000 T acpivout_match +ffffffff827db070 T acpivout_attach +ffffffff827db200 T acpivout_notify +ffffffff827db2e0 T acpivout_get_bcl +ffffffff827db440 T acpivout_get_brightness +ffffffff827db500 T acpivout_get_param +ffffffff827db5a0 T acpivout_set_param +ffffffff827db710 T acpivout_select_brightness +ffffffff827db7e0 T acpivout_find_brightness +ffffffff827db870 T acpivout_set_brightness +ffffffff827dc000 T acpipwrres_match +ffffffff827dc070 T acpipwrres_attach +ffffffff827dc310 T acpipwrres_foundcons +ffffffff827dc4d0 T acpipwrres_ref_incr +ffffffff827dc560 T acpipwrres_hascons +ffffffff827dc5b0 T acpipwrres_ref_decr +ffffffff827dc640 T acpipwrres_addcons +ffffffff827dd000 T aibs_match +ffffffff827dd030 T aibs_attach +ffffffff827dd190 T aibs_probe +ffffffff827dd320 T aibs_attach_new +ffffffff827dd450 T aibs_attach_sif +ffffffff827dd630 T aibs_notify +ffffffff827dd6a0 T aibs_add_sensor +ffffffff827dd940 T aibs_getpack +ffffffff827dd9d0 T aibs_refresh +ffffffff827dda40 T aibs_refresh_r +ffffffff827ddb90 T aibs_getvalue +ffffffff827ddcf0 T aibs_find_cb +ffffffff827de000 T aplgpio_match +ffffffff827de060 T aplgpio_attach +ffffffff827de390 T aplgpio_intr +ffffffff827de500 T aplgpio_read_pin +ffffffff827de560 T aplgpio_write_pin +ffffffff827de5e0 T aplgpio_intr_establish +ffffffff827de720 T aplgpio_intr_enable +ffffffff827de7b0 T aplgpio_intr_disable +ffffffff827df000 T bytgpio_match +ffffffff827df060 T bytgpio_attach +ffffffff827df3a0 T bytgpio_intr +ffffffff827df4f0 T bytgpio_read_pin +ffffffff827df560 T bytgpio_write_pin +ffffffff827df5f0 T bytgpio_intr_establish +ffffffff827df670 T bytgpio_intr_enable +ffffffff827df760 T bytgpio_intr_disable +ffffffff827e0000 T chvgpio_match +ffffffff827e0060 T chvgpio_attach +ffffffff827e0380 T chvgpio_intr +ffffffff827e0470 T chvgpio_read_pin +ffffffff827e0520 T chvgpio_write_pin +ffffffff827e05f0 T chvgpio_intr_establish +ffffffff827e07e0 T chvgpio_intr_enable +ffffffff827e08c0 T chvgpio_intr_disable +ffffffff827e09a0 T chvgpio_opreg_handler +ffffffff827e0a40 T chvgpio_check_pin +ffffffff827e1000 T glkgpio_match +ffffffff827e1060 T glkgpio_attach +ffffffff827e1390 T glkgpio_intr +ffffffff827e1500 T glkgpio_read_pin +ffffffff827e1560 T glkgpio_write_pin +ffffffff827e15e0 T glkgpio_intr_establish +ffffffff827e1720 T glkgpio_intr_enable +ffffffff827e17b0 T glkgpio_intr_disable +ffffffff827e2000 T pchgpio_match +ffffffff827e2060 T pchgpio_attach +ffffffff827e2600 T pchgpio_activate +ffffffff827e26b0 T pchgpio_intr +ffffffff827e2900 T pchgpio_read_pin +ffffffff827e29f0 T pchgpio_write_pin +ffffffff827e2b10 T pchgpio_intr_establish +ffffffff827e2d60 T pchgpio_intr_enable +ffffffff827e2ea0 T pchgpio_intr_disable +ffffffff827e2fe0 T pchgpio_save +ffffffff827e3050 T pchgpio_restore +ffffffff827e30c0 T pchgpio_find_group +ffffffff827e3140 T pchgpio_intr_handle +ffffffff827e3240 T pchgpio_save_pin +ffffffff827e3420 T pchgpio_restore_pin +ffffffff827e4000 T tipmic_match +ffffffff827e4060 T tipmic_attach +ffffffff827e42c0 T tipmic_write_1 +ffffffff827e43a0 T tipmic_intr +ffffffff827e4550 T tipmic_get_lpat +ffffffff827e4690 T tipmic_read_pin +ffffffff827e46c0 T tipmic_write_pin +ffffffff827e46f0 T tipmic_thermal_opreg_handler +ffffffff827e5120 T tipmic_power_opreg_handler +ffffffff827e5400 T tipmic_read_1 +ffffffff827e54f0 T tipmic_raw_to_temp +ffffffff827e6000 T ccpmic_match +ffffffff827e6060 T ccpmic_attach +ffffffff827e6160 T ccpmic_get_lpat +ffffffff827e6290 T ccpmic_read_pin +ffffffff827e6450 T ccpmic_write_pin +ffffffff827e65f0 T ccpmic_thermal_opreg_handler +ffffffff827e6890 T ccpmic_power_opreg_handler +ffffffff827e6ad0 T ccpmic_read_1 +ffffffff827e6bc0 T ccpmic_write_1 +ffffffff827e6ca0 T ccpmic_raw_to_temp +ffffffff827e7000 T com_acpi_match +ffffffff827e7150 T com_acpi_attach +ffffffff827e7440 T com_acpi_is_designware +ffffffff827e74c0 T com_acpi_intr_designware +ffffffff827e7500 T com_acpi_is_console +ffffffff827e8000 T sdhc_acpi_match +ffffffff827e8060 T sdhc_acpi_attach +ffffffff827e8400 T sdhc_acpi_parse_resources +ffffffff827e84b0 T sdhc_acpi_card_detect_gpio +ffffffff827e8510 T sdhc_acpi_card_detect_intr +ffffffff827e8560 T sdhc_acpi_power_on +ffffffff827e85f0 T sdhc_acpi_explore +ffffffff827e8620 T sdhc_acpi_card_detect_nonremovable +ffffffff827e8650 T sdhc_acpi_do_explore +ffffffff827e9000 T dwiic_acpi_match +ffffffff827e9050 T dwiic_acpi_attach +ffffffff827e94f0 T dwiic_acpi_parse_crs +ffffffff827e9650 T dwiic_acpi_power +ffffffff827e9780 T dwiic_acpi_get_params +ffffffff827e9900 T dwiic_i2c_intr_establish +ffffffff827e9990 T dwiic_i2c_intr_disestablish +ffffffff827e99b0 T dwiic_i2c_intr_string +ffffffff827e9a40 T dwiic_acpi_acquire_bus +ffffffff827e9aa0 T dwiic_acpi_release_bus +ffffffff827e9ae0 T dwiic_acpi_bus_scan +ffffffff827e9b20 T dwiic_acpi_found_hid +ffffffff827e9f10 T dwiic_matchhids +ffffffff827e9fa0 T dwiic_acpi_found_ihidev +ffffffff827ea280 T dwiic_acpi_found_iatp +ffffffff827ea400 T dwiic_acpi_found_ietp +ffffffff827eb000 T acpicbkbd_match +ffffffff827eb030 T acpicbkbd_attach +ffffffff827eb0e0 T acpicbkbd_activate +ffffffff827eb140 T acpicbkbd_get_backlight +ffffffff827eb1c0 T acpicbkbd_set_backlight +ffffffff827eb270 T acpicbkbd_write_backlight +ffffffff827ec000 T acpials_match +ffffffff827ec090 T acpials_attach +ffffffff827ec280 T acpials_read +ffffffff827ec310 T acpials_addtask +ffffffff827ec350 T acpials_notify +ffffffff827ec3e0 T acpials_update +ffffffff827ed000 T tpm_match +ffffffff827ed050 T tpm_attach +ffffffff827ed3a0 T tpm_activate +ffffffff827ed3f0 T tpm2_start_method +ffffffff827ed480 T tpm_probe +ffffffff827ed570 T tpm_init_tis +ffffffff827ed840 T tpm_init_crb +ffffffff827edc30 T tpm_suspend +ffffffff827edd60 T tpm_resume +ffffffff827edd90 T tpm_write_tis +ffffffff827ee1e0 T tpm_read_tis +ffffffff827ee3f0 T tpm_write_crb +ffffffff827ee8c0 T tpm_read_crb +ffffffff827eec60 T tpm_request_locality_tis +ffffffff827eed80 T tpm_request_locality_crb +ffffffff827eeec0 T tpm_release_locality_crb +ffffffff827eef20 T tpm_release_locality_tis +ffffffff827eef90 T tpm_getburst +ffffffff827ef050 T tpm_status +ffffffff827ef070 T tpm_waitfor +ffffffff827ef160 T tpm_waitfor_status +ffffffff827f0000 T acpihve_match +ffffffff827f00d0 T acpihve_attach +ffffffff827f1000 T acpisbs_match +ffffffff827f1030 T acpisbs_attach +ffffffff827f1320 T acpisbs_activate +ffffffff827f1410 T acpisbs_read +ffffffff827f14e0 T acpisbs_setup_sensors +ffffffff827f1610 T acpisbs_refresh_sensors +ffffffff827f1760 T acpisbs_notify +ffffffff827f18c0 T acpi_smbus_read +ffffffff827f2000 T surface_match +ffffffff827f2060 T surface_attach +ffffffff827f20c0 T surface_hotkey +ffffffff827f3000 T ipmi_acpi_match +ffffffff827f3030 T ipmi_acpi_attach +ffffffff827f32b0 T ipmi_acpi_parse_crs +ffffffff827f4000 T amdgpio_match +ffffffff827f4060 T amdgpio_attach +ffffffff827f4330 T amdgpio_activate +ffffffff827f4430 T amdgpio_intr +ffffffff827f4610 T amdgpio_read_pin +ffffffff827f4670 T amdgpio_write_pin +ffffffff827f46f0 T amdgpio_intr_establish +ffffffff827f47f0 T amdgpio_intr_enable +ffffffff827f4880 T amdgpio_intr_disable +ffffffff827f4910 T amdgpio_save +ffffffff827f49a0 T amdgpio_restore +ffffffff827f4a40 T amdgpio_save_pin +ffffffff827f4ab0 T amdgpio_restore_pin +ffffffff827f4b20 T amdgpio_pin_intr +ffffffff827f5000 T acpihid_match +ffffffff827f5030 T acpihid_attach +ffffffff827f5270 T acpihid_init_dsm +ffffffff827f5400 T acpihid_eval +ffffffff827f5650 T acpihid_notify +ffffffff827f56c0 T acpihid_button_array_enable +ffffffff827f6000 t iosf_acpi_match +ffffffff827f6050 t iosf_acpi_attach +ffffffff827f6170 t iosf_acpi_mbi_mdr_rd +ffffffff827f61f0 t iosf_acpi_mbi_mdr_wr +ffffffff827f7000 T acpi_match +ffffffff827f7070 T acpi_attach +ffffffff827f70b0 T acpi_probe +ffffffff827f72a0 T acpi_map +ffffffff827f73b0 T acpi_unmap +ffffffff827f7400 T acpi_bus_space_map +ffffffff827f7420 T acpi_bus_space_unmap +ffffffff827f7440 T acpi_intr_establish +ffffffff827f75a0 T acpi_intr_disestablish +ffffffff827f75b0 T acpi_scan +ffffffff827f7780 T acpi_acquire_glk +ffffffff827f77e0 T acpi_release_glk +ffffffff827f7830 T acpi_attach_machdep +ffffffff827f7a10 T acpi_sleep_cpu +ffffffff827f7bd0 T acpi_resume_cpu +ffffffff827f7d20 T sleep_mp +ffffffff827f7e20 T resume_mp +ffffffff827f7f20 T acpi_iommu_device_map +ffffffff827f8000 T hibernate_resume_machdep +ffffffff827f8050 T hibernate_drop_to_real_mode +ffffffff827f8060 T hibernate_activate_resume_pt_machdep +ffffffff827f80a0 T hibernate_switch_stack_machdep +ffffffff827f80e0 T hibernate_flush +ffffffff827f8110 T acpi_savecpu +ffffffff827f9000 T sleep_showstate +ffffffff827f9100 T sleep_setstate +ffffffff827f9180 T gosleep +ffffffff827f9280 T sleep_resume +ffffffff827f9320 T suspend_finish +ffffffff827fa000 T acpiopen +ffffffff827fa0d0 T acpiclose +ffffffff827fa170 T acpiioctl +ffffffff827fa300 T request_sleep +ffffffff827fa390 T acpi_filtdetach +ffffffff827fa3f0 T acpi_filtread +ffffffff827fa430 T acpikqfilter +ffffffff827fb000 T acpipci_match +ffffffff827fb030 T acpipci_attach +ffffffff827fb370 T acpipci_osc +ffffffff827fb4e0 T acpipci_parse_resources +ffffffff827fb610 T acpipci_attach_bus +ffffffff827fb820 T acpipci_print +ffffffff827fb8a0 T acpipci_attach_busses +ffffffff827fc000 T efiopen +ffffffff827fc040 T eficlose +ffffffff827fc070 T efiioctl +ffffffff827fc110 T efiioc_get_table +ffffffff827fc280 T efiioc_var_get +ffffffff827fc500 T efiioc_var_next +ffffffff827fc720 T efiioc_var_set +ffffffff827fc8a0 T efi_adapt_error +ffffffff827fd000 T efi_match +ffffffff827fd070 T efi_attach +ffffffff827fd390 T efi_map_runtime +ffffffff827fd520 T efi_enter +ffffffff827fd5d0 T efi_leave +ffffffff827fd660 T efi_fault +ffffffff827fe000 T vmm_probe +ffffffff827fe060 T vmm_attach +ffffffff827fe1b0 T vmm_activate +ffffffff827fe340 T vmmopen +ffffffff827fe390 T vmmclose +ffffffff827fe3c0 T vm_find +ffffffff827fe500 T vmmioctl +ffffffff827fe840 T vm_create +ffffffff827febb0 T vm_get_info +ffffffff827fee60 T vm_terminate +ffffffff827ff010 T vm_resetcpu +ffffffff827ff140 T vm_share_mem +ffffffff827ff2b0 T pledge_ioctl_vmm +ffffffff827ff3a0 T vm_find_vcpu +ffffffff827ff400 T vm_create_check_mem_ranges +ffffffff827ff5c0 T vm_teardown +ffffffff827ff740 T vcpu_must_stop +ffffffff82800000 T vmm_enabled +ffffffff82800080 T vmm_attach_machdep +ffffffff82800260 T vmm_quiesce_vmx +ffffffff82800470 T vmm_activate_machdep +ffffffff82800510 T vmm_stop +ffffffff82800680 T vmm_start +ffffffff828007a0 T vmmioctl_machdep +ffffffff82800890 T vm_intr_pending +ffffffff82800950 T vm_mprotect_ept +ffffffff82800c10 T pledge_ioctl_vmm_machdep +ffffffff82800c60 T vm_rwvmparams +ffffffff82800e10 T vmm_init_pvclock +ffffffff82800ef0 T vm_rwregs +ffffffff82801030 T vcpu_readregs_vmx +ffffffff82801510 T vcpu_writeregs_vmx +ffffffff82801a50 T vcpu_readregs_svm +ffffffff82801f00 T vcpu_writeregs_svm +ffffffff828023d0 T vmm_get_guest_memtype +ffffffff82802450 T vmx_mprotect_ept +ffffffff828026f0 T vmx_pmap_find_pte_ept +ffffffff828027c0 T start_vmm_on_cpu +ffffffff82802900 T stop_vmm_on_cpu +ffffffff828029a0 T vmclear_on_cpu +ffffffff82802a20 T vm_impl_init +ffffffff82802bb0 T vm_impl_deinit +ffffffff82802be0 T vcpu_reload_vmcs_vmx +ffffffff82802d60 T vcpu_reset_regs_svm +ffffffff82803140 T svm_setmsrbrw +ffffffff82803250 T svm_setmsrbr +ffffffff82803320 T vmm_alloc_vpid +ffffffff82803440 T svm_setmsrbw +ffffffff82803520 T vmx_setmsrbr +ffffffff828035d0 T vmx_setmsrbw +ffffffff82803680 T vmx_setmsrbrw +ffffffff82803790 T svm_set_clean +ffffffff828037e0 T svm_set_dirty +ffffffff82803830 T vcpu_reset_regs_vmx +ffffffff82804390 T vcpu_vmx_check_cap +ffffffff82804490 T vcpu_vmx_compute_ctrl +ffffffff82804670 T vcpu_init_vmx +ffffffff82804aa0 T vcpu_deinit_vmx +ffffffff82804c10 T vcpu_reset_regs +ffffffff82804c50 T vcpu_init_svm +ffffffff82804e30 T vcpu_deinit_svm +ffffffff82804fa0 T vcpu_init +ffffffff82805070 T vmm_free_vpid +ffffffff828050e0 T vcpu_deinit +ffffffff82805120 T vm_run +ffffffff82805320 T vcpu_run_vmx +ffffffff82805da0 T vcpu_run_svm +ffffffff82806470 T vmm_fpurestore +ffffffff82806540 T vmm_fpusave +ffffffff828065d0 T vmm_translate_gva +ffffffff82806900 T vmm_update_pvclock +ffffffff82806a10 T vmx_get_exit_info +ffffffff82806a90 T vmx_handle_exit +ffffffff82806f00 T vmx_instruction_error_decode +ffffffff828070d0 T vmm_get_guest_cpu_cpl +ffffffff828071f0 T vmx_handle_intr +ffffffff82807290 T svm_handle_hlt +ffffffff828072e0 T vmx_handle_hlt +ffffffff828073b0 T svm_handle_exit +ffffffff82807730 T svm_handle_np_fault +ffffffff828078d0 T vmm_handle_cpuid +ffffffff82807f80 T svm_handle_msr +ffffffff82808270 T svm_handle_xsetbv +ffffffff82808330 T svm_handle_inout +ffffffff82808440 T vmm_inject_ud +ffffffff82808480 T vmm_inject_db +ffffffff828084c0 T vmx_handle_np_fault +ffffffff82808640 T vmx_handle_inout +ffffffff828087e0 T vmx_handle_cr +ffffffff82808a20 T vmx_handle_rdmsr +ffffffff82808b20 T vmx_handle_wrmsr +ffffffff82808dd0 T vmx_handle_xsetbv +ffffffff82808ed0 T vmm_inject_gp +ffffffff82808f10 T vmx_get_exit_qualification +ffffffff82808f80 T vmx_get_guest_faulttype +ffffffff82809030 T svm_get_guest_faulttype +ffffffff82809060 T svm_fault_page +ffffffff828090f0 T vmx_fault_page +ffffffff82809270 T vmm_get_guest_cpu_mode +ffffffff82809380 T vmx_load_pdptes +ffffffff828096a0 T vmx_handle_cr0_write +ffffffff82809910 T vmx_handle_cr4_write +ffffffff828099d0 T vmm_handle_xsetbv +ffffffff82809a80 T vmx_handle_misc_enable_msr +ffffffff82809ae0 T vmm_pat_is_valid +ffffffff82809bc0 t vmm_handle_cpuid_0xd +ffffffff82809cc0 T vmm_gpa_is_valid +ffffffff82809d30 T vmx_exit_reason_decode +ffffffff82809d70 T svm_exit_reason_decode +ffffffff8280ab80 T vcpu_state_decode +ffffffff8280b000 T vmm_dispatch_intr +ffffffff8280b020 T vmxon +ffffffff8280b050 T vmxoff +ffffffff8280b080 T vmclear +ffffffff8280b0b0 T vmptrld +ffffffff8280b0e0 T vmptrst +ffffffff8280b110 T vmwrite +ffffffff8280b140 T vmread +ffffffff8280b170 T invvpid +ffffffff8280b18b t invvpid_fail +ffffffff8280b192 t invvpid_ret +ffffffff8280b1b0 T invept +ffffffff8280b1cb t invept_fail +ffffffff8280b1d2 t invept_ret +ffffffff8280b1f0 T vmx_enter_guest +ffffffff8280b21b t skip_init +ffffffff8280b288 t no_l1df_msr +ffffffff8280b28b t l1df_tlb_loop +ffffffff8280b2a4 t l1df_tlb_done +ffffffff8280b2ac t l1df_load_cache +ffffffff8280b2c3 t done_flush +ffffffff8280b356 t do_resume +ffffffff8280b3db t fail_launch_or_resume +ffffffff8280b41d t fail_launch_unknown +ffffffff8280b42a t fail_launch_invalid_vmcs +ffffffff8280b437 t fail_launch_valid_vmcs +ffffffff8280b454 t vmx_exit_handler_asm +ffffffff8280b519 t restore_host +ffffffff8280b540 T svm_enter_guest +ffffffff8280b6c2 t restore_host_svm +ffffffff8280c000 T sdmmc_match +ffffffff8280c060 T sdmmc_attach +ffffffff8280c400 T sdmmc_detach +ffffffff8280c4c0 T sdmmc_activate +ffffffff8280c5b0 T sdmmc_discover_task +ffffffff8280c6a0 T sdmmc_create_thread +ffffffff8280c710 T sdmmc_holds_root_device +ffffffff8280c770 T sdmmc_task_thread +ffffffff8280c9f0 T sdmmc_needs_discover +ffffffff8280cac0 T sdmmc_del_task +ffffffff8280cb80 T sdmmc_card_detach +ffffffff8280cc90 T sdmmc_add_task +ffffffff8280cd20 T sdmmc_card_attach +ffffffff8280ce90 T sdmmc_enable +ffffffff8280d020 T sdmmc_scan +ffffffff8280d0c0 T sdmmc_init +ffffffff8280d1f0 T sdmmc_disable +ffffffff8280d380 T sdmmc_function_free +ffffffff8280d3a0 T sdmmc_delay +ffffffff8280d3f0 T sdmmc_select_card +ffffffff8280d630 T sdmmc_set_bus_power +ffffffff8280d7f0 T sdmmc_function_alloc +ffffffff8280d890 T sdmmc_app_command +ffffffff8280da50 T sdmmc_mmc_command +ffffffff8280dae0 T sdmmc_go_idle_state +ffffffff8280dc10 T sdmmc_send_if_cond +ffffffff8280dd80 T sdmmc_set_relative_addr +ffffffff8280e000 T sdmmc_cisptr +ffffffff8280e0d0 T sdmmc_read_cis +ffffffff8280e4b0 T sdmmc_print_cis +ffffffff8280e6a0 T sdmmc_check_cis_quirks +ffffffff8280f000 T sdmmc_io_enable +ffffffff8280f2f0 T sdmmc_io_reset +ffffffff8280f450 T sdmmc_io_send_op_cond +ffffffff8280f5e0 T sdmmc_io_scan +ffffffff8280f760 T sdmmc_io_init +ffffffff8280f8d0 T sdmmc_io_set_highspeed +ffffffff8280fbd0 T sdmmc_io_set_bus_width +ffffffff8280fec0 T sdmmc_io_function_ready +ffffffff82810070 T sdmmc_io_read_1 +ffffffff828101f0 T sdmmc_io_function_enable +ffffffff82810690 T sdmmc_io_write_1 +ffffffff82810830 T sdmmc_io_function_disable +ffffffff82810b10 T sdmmc_io_attach +ffffffff82810c00 T sdmmc_print +ffffffff82810ec0 T sdmmc_submatch +ffffffff82810f50 T sdmmc_io_detach +ffffffff82811010 T sdmmc_io_rw_direct +ffffffff828111e0 T sdmmc_io_rw_extended_subr +ffffffff82811390 T sdmmc_io_rw_extended +ffffffff828117d0 T sdmmc_io_read_2 +ffffffff82811940 T sdmmc_io_write_2 +ffffffff82811ac0 T sdmmc_io_read_4 +ffffffff82811c30 T sdmmc_io_write_4 +ffffffff82811db0 T sdmmc_io_read_multi_1 +ffffffff82811eb0 T sdmmc_io_write_multi_1 +ffffffff82811fb0 T sdmmc_io_read_region_1 +ffffffff828120b0 T sdmmc_io_write_region_1 +ffffffff828121b0 T sdmmc_io_xchg +ffffffff82812370 T sdmmc_intr_enable +ffffffff82812650 T sdmmc_intr_disable +ffffffff82812930 T sdmmc_intr_establish +ffffffff82812a50 T sdmmc_intr_disestablish +ffffffff82812b50 T sdmmc_card_intr +ffffffff82812ba0 T sdmmc_intr_task +ffffffff82812c60 T sdmmc_io_set_blocklen +ffffffff82813000 T sdmmc_mem_enable +ffffffff828134d0 T sdmmc_mem_send_op_cond +ffffffff828136b0 T sdmmc_mem_signal_voltage +ffffffff828137b0 T sdmmc_mem_scan +ffffffff82813b00 T sdmmc_decode_csd +ffffffff82813f50 T sdmmc_decode_cid +ffffffff82814400 T sdmmc_mem_send_scr +ffffffff82814560 T sdmmc_mem_decode_scr +ffffffff828145c0 T sdmmc_mem_send_cxd_data +ffffffff82814740 T sdmmc_mem_set_bus_width +ffffffff82814870 T sdmmc_mem_sd_switch +ffffffff82814b30 T sdmmc_be512_to_bitfield512 +ffffffff82814be0 T sdmmc_mem_mmc_switch +ffffffff82814cd0 T sdmmc_mem_init +ffffffff82814e60 T sdmmc_mem_set_blocklen +ffffffff82814f70 T sdmmc_mem_sd_init +ffffffff828153e0 T sdmmc_mem_mmc_init +ffffffff82815b60 T sdmmc_mem_select_transfer_mode +ffffffff82815be0 T sdmmc_mem_execute_tuning +ffffffff82815c70 T sdmmc_mem_read_block_subr +ffffffff82816000 T sdmmc_mem_single_read_block +ffffffff828160d0 T sdmmc_mem_read_block +ffffffff828162e0 T sdmmc_mem_write_block_subr +ffffffff82816660 T sdmmc_mem_single_write_block +ffffffff82816730 T sdmmc_mem_write_block +ffffffff82816940 T sdmmc_mem_hibernate_write +ffffffff82817000 T sdmmc_scsi_cmd +ffffffff82817200 T sdmmc_minphys +ffffffff82817280 T sdmmc_scsi_attach +ffffffff828174c0 T sdmmc_alloc_ccbs +ffffffff82817620 T sdmmc_free_ccbs +ffffffff82817680 T sdmmc_scsi_detach +ffffffff82817840 T sdmmc_stimeout +ffffffff828178e0 T sdmmc_ccb_alloc +ffffffff828179a0 T sdmmc_ccb_free +ffffffff82817aa0 T sdmmc_inquiry +ffffffff82817d30 T sdmmc_start_xs +ffffffff82817e50 T sdmmc_complete_xs +ffffffff82817f40 T sdmmc_done_xs +ffffffff82817f90 T sdmmc_scsi_hibernate_io +ffffffff82819000 T bwfm_sdio_preinit +ffffffff828195a0 T bwfm_sdio_txcheck +ffffffff828195e0 T bwfm_sdio_txdata +ffffffff82819660 T bwfm_sdio_txctl +ffffffff828197f0 T bwfm_sdio_buscore_read +ffffffff82819800 T bwfm_sdio_buscore_write +ffffffff82819820 T bwfm_sdio_buscore_prepare +ffffffff828199a0 T bwfm_sdio_buscore_activate +ffffffff82819a30 T bwfm_sdio_match +ffffffff82819ae0 T bwfm_sdio_attach +ffffffff82819e80 T bwfm_sdio_detach +ffffffff82819f00 T bwfm_sdio_task +ffffffff8281a0c0 T bwfm_sdio_write_1 +ffffffff8281a0f0 T bwfm_sdio_read_1 +ffffffff8281a120 T bwfm_sdio_write_4 +ffffffff8281a1f0 T bwfm_sdio_read_4 +ffffffff8281a2b0 T bwfm_sdio_load_microcode +ffffffff8281a5a0 T bwfm_sdio_clkctl +ffffffff8281a6d0 T bwfm_sdio_dev_write +ffffffff8281a720 T bwfm_sdio_intr +ffffffff8281a770 T bwfm_sdio_ram_read_write +ffffffff8281a9f0 T bwfm_sdio_htclk +ffffffff8281acb0 T bwfm_sdio_readshared +ffffffff8281ada0 T bwfm_sdio_dev_read +ffffffff8281ade0 T bwfm_sdio_rx_frames +ffffffff8281b210 T bwfm_sdio_tx_frames +ffffffff8281b330 T bwfm_sdio_backplane +ffffffff8281b400 T bwfm_sdio_buf_read +ffffffff8281b500 T bwfm_sdio_buf_write +ffffffff8281b5d0 T bwfm_sdio_frame_read_write +ffffffff8281b780 T bwfm_sdio_newbuf +ffffffff8281b810 T bwfm_sdio_tx_ok +ffffffff8281b870 T bwfm_sdio_tx_ctrlframe +ffffffff8281b980 T bwfm_sdio_tx_dataframe +ffffffff8281baf0 T bwfm_sdio_rx_glom +ffffffff8281c000 T onewire_match +ffffffff8281c060 T onewire_attach +ffffffff8281c120 T onewire_detach +ffffffff8281c190 T onewire_activate +ffffffff8281c1b0 T onewire_scan +ffffffff8281c400 T onewire_createthread +ffffffff8281c470 T onewire_print +ffffffff8281c560 T onewirebus_print +ffffffff8281c5b0 T onewire_lock +ffffffff8281c5d0 T onewire_unlock +ffffffff8281c5f0 T onewire_reset +ffffffff8281c610 T onewire_bit +ffffffff8281c630 T onewire_read_byte +ffffffff8281c7c0 T onewire_write_byte +ffffffff8281c8d0 T onewire_read_block +ffffffff8281c970 T onewire_write_block +ffffffff8281ca10 T onewire_triplet +ffffffff8281cb20 T onewire_matchrom +ffffffff8281cd10 T onewire_search +ffffffff8281d180 T onewire_thread +ffffffff8281e000 T onewire_crc +ffffffff8281e0b0 T onewire_crc16 +ffffffff8281e170 T onewire_famname +ffffffff8281e1b0 T onewire_matchbyfam +ffffffff8281f000 T owid_match +ffffffff8281f030 T owid_attach +ffffffff8281f120 T owid_detach +ffffffff8281f170 T owid_activate +ffffffff82820000 T owsbm_match +ffffffff82820030 T owsbm_attach +ffffffff82820240 T owsbm_detach +ffffffff828202d0 T owsbm_activate +ffffffff82820300 T owsbm_update +ffffffff82821000 T owtemp_match +ffffffff82821030 T owtemp_attach +ffffffff82821160 T owtemp_detach +ffffffff828211f0 T owtemp_activate +ffffffff82821220 T owtemp_update +ffffffff82822000 T owctr_match +ffffffff82822030 T owctr_attach +ffffffff828221c0 T owctr_detach +ffffffff82822250 T owctr_activate +ffffffff82822280 T owctr_update +ffffffff828222c0 T owctr_update_counter +ffffffff82823000 A __text_page_start +ffffffff82823000 T Xsyscall_meltdown +ffffffff8282300c T Xsyscall +ffffffff82823299 t Xsyscall_trampback +ffffffff828232b0 T intr_user_exit +ffffffff828232f2 t intr_user_exit_post_ast +ffffffff8282344b t Xiretq_trampback +ffffffff82823457 T doreti_iret +ffffffff82824000 T alltraps +ffffffff82824138 T recall_trap +ffffffff82824150 T alltraps_kern +ffffffff82824153 T alltraps_kern_meltdown +ffffffff82825000 ? Xtrap00 +ffffffff82825000 A __kutext_start +ffffffff82825000 A __text_page_end +ffffffff82825010 ? Xtrap01 +ffffffff82825020 ? Xtrap02 +ffffffff82825028 c calltrap_specstk +ffffffff828250f0 ? calltrap_specstk_tramp +ffffffff82825110 ? Xtrap03 +ffffffff82825120 ? Xtrap04 +ffffffff82825130 ? Xtrap05 +ffffffff82825140 ? Xtrap06 +ffffffff82825150 ? Xtrap07 +ffffffff82825160 ? Xtrap08 +ffffffff82825170 ? Xtrap09 +ffffffff82825180 ? Xtrap0a +ffffffff82825190 ? Xtrap0b +ffffffff828251a0 ? Xtrap0c +ffffffff828251b0 ? Xtrap0d +ffffffff82825240 ? Xtrap0e +ffffffff82825250 ? Xintrspurious +ffffffff82825250 ? Xtrap0f +ffffffff82825260 ? Xtrap10 +ffffffff82825270 ? Xtrap11 +ffffffff82825280 ? Xtrap12 +ffffffff82825290 ? Xtrap13 +ffffffff828252a0 ? Xtrap14 +ffffffff828252b0 ? Xtrap15 +ffffffff828252c0 ? Xtrap16 +ffffffff828252c0 ? Xtrap17 +ffffffff828252c0 ? Xtrap18 +ffffffff828252c0 ? Xtrap19 +ffffffff828252c0 ? Xtrap1a +ffffffff828252c0 ? Xtrap1b +ffffffff828252c0 ? Xtrap1c +ffffffff828252c0 ? Xtrap1d +ffffffff828252c0 ? Xtrap1e +ffffffff828252c0 ? Xtrap1f +ffffffff828252d0 ? x2apic_eoi +ffffffff828252f0 ? Xintr_lapic_ipi +ffffffff82825330 ? Xipi_invltlb +ffffffff82825360 ? Xipi_invlpg +ffffffff82825390 ? Xipi_invlrange +ffffffff828253d0 ? Xipi_invltlb_pcid +ffffffff82825410 ? Xipi_invlpg_pcid +ffffffff82825460 ? Xipi_invlrange_pcid +ffffffff828254d0 ? Xintr_lapic_ltimer +ffffffff82825510 ? Xintr_xen_upcall +ffffffff82825550 ? Xintr_hyperv_upcall +ffffffff82825590 ? Xintr_legacy0 +ffffffff828255d0 ? Xintr_legacy1 +ffffffff82825610 ? Xintr_legacy2 +ffffffff82825650 ? Xintr_legacy3 +ffffffff82825690 ? Xintr_legacy4 +ffffffff828256d0 ? Xintr_legacy5 +ffffffff82825710 ? Xintr_legacy6 +ffffffff82825750 ? Xintr_legacy7 +ffffffff82825790 ? Xintr_legacy8 +ffffffff828257d0 ? Xintr_legacy9 +ffffffff82825810 ? Xintr_legacy10 +ffffffff82825850 ? Xintr_legacy11 +ffffffff82825890 ? Xintr_legacy12 +ffffffff828258d0 ? Xintr_legacy13 +ffffffff82825910 ? Xintr_legacy14 +ffffffff82825950 ? Xintr_legacy15 +ffffffff82825990 ? Xintr_ioapic_edge0 +ffffffff828259d0 ? Xintr_ioapic_edge1 +ffffffff82825a10 ? Xintr_ioapic_edge2 +ffffffff82825a50 ? Xintr_ioapic_edge3 +ffffffff82825a90 ? Xintr_ioapic_edge4 +ffffffff82825ad0 ? Xintr_ioapic_edge5 +ffffffff82825b10 ? Xintr_ioapic_edge6 +ffffffff82825b50 ? Xintr_ioapic_edge7 +ffffffff82825b90 ? Xintr_ioapic_edge8 +ffffffff82825bd0 ? Xintr_ioapic_edge9 +ffffffff82825c10 ? Xintr_ioapic_edge10 +ffffffff82825c50 ? Xintr_ioapic_edge11 +ffffffff82825c90 ? Xintr_ioapic_edge12 +ffffffff82825cd0 ? Xintr_ioapic_edge13 +ffffffff82825d10 ? Xintr_ioapic_edge14 +ffffffff82825d50 ? Xintr_ioapic_edge15 +ffffffff82825d90 ? Xintr_ioapic_edge16 +ffffffff82825dd0 ? Xintr_ioapic_edge17 +ffffffff82825e10 ? Xintr_ioapic_edge18 +ffffffff82825e50 ? Xintr_ioapic_edge19 +ffffffff82825e90 ? Xintr_ioapic_edge20 +ffffffff82825ed0 ? Xintr_ioapic_edge21 +ffffffff82825f10 ? Xintr_ioapic_edge22 +ffffffff82825f50 ? Xintr_ioapic_edge23 +ffffffff82825f90 ? Xintr_ioapic_edge24 +ffffffff82825fd0 ? Xintr_ioapic_edge25 +ffffffff82826010 ? Xintr_ioapic_edge26 +ffffffff82826050 ? Xintr_ioapic_edge27 +ffffffff82826090 ? Xintr_ioapic_edge28 +ffffffff828260d0 ? Xintr_ioapic_edge29 +ffffffff82826110 ? Xintr_ioapic_edge30 +ffffffff82826150 ? Xintr_ioapic_edge31 +ffffffff82826190 ? Xintr_ioapic_edge32 +ffffffff828261d0 ? Xintr_ioapic_edge33 +ffffffff82826210 ? Xintr_ioapic_edge34 +ffffffff82826250 ? Xintr_ioapic_edge35 +ffffffff82826290 ? Xintr_ioapic_edge36 +ffffffff828262d0 ? Xintr_ioapic_edge37 +ffffffff82826310 ? Xintr_ioapic_edge38 +ffffffff82826350 ? Xintr_ioapic_edge39 +ffffffff82826390 ? Xintr_ioapic_edge40 +ffffffff828263d0 ? Xintr_ioapic_edge41 +ffffffff82826410 ? Xintr_ioapic_edge42 +ffffffff82826450 ? Xintr_ioapic_edge43 +ffffffff82826490 ? Xintr_ioapic_edge44 +ffffffff828264d0 ? Xintr_ioapic_edge45 +ffffffff82826510 ? Xintr_ioapic_edge46 +ffffffff82826550 ? Xintr_ioapic_edge47 +ffffffff82826590 ? Xintr_ioapic_edge48 +ffffffff828265d0 ? Xintr_ioapic_edge49 +ffffffff82826610 ? Xintr_ioapic_edge50 +ffffffff82826650 ? Xintr_ioapic_edge51 +ffffffff82826690 ? Xintr_ioapic_edge52 +ffffffff828266d0 ? Xintr_ioapic_edge53 +ffffffff82826710 ? Xintr_ioapic_edge54 +ffffffff82826750 ? Xintr_ioapic_edge55 +ffffffff82826790 ? Xintr_ioapic_edge56 +ffffffff828267d0 ? Xintr_ioapic_edge57 +ffffffff82826810 ? Xintr_ioapic_edge58 +ffffffff82826850 ? Xintr_ioapic_edge59 +ffffffff82826890 ? Xintr_ioapic_edge60 +ffffffff828268d0 ? Xintr_ioapic_edge61 +ffffffff82826910 ? Xintr_ioapic_edge62 +ffffffff82826950 ? Xintr_ioapic_edge63 +ffffffff82826990 ? Xintr_ioapic_level0 +ffffffff828269d0 ? Xintr_ioapic_level1 +ffffffff82826a10 ? Xintr_ioapic_level2 +ffffffff82826a50 ? Xintr_ioapic_level3 +ffffffff82826a90 ? Xintr_ioapic_level4 +ffffffff82826ad0 ? Xintr_ioapic_level5 +ffffffff82826b10 ? Xintr_ioapic_level6 +ffffffff82826b50 ? Xintr_ioapic_level7 +ffffffff82826b90 ? Xintr_ioapic_level8 +ffffffff82826bd0 ? Xintr_ioapic_level9 +ffffffff82826c10 ? Xintr_ioapic_level10 +ffffffff82826c50 ? Xintr_ioapic_level11 +ffffffff82826c90 ? Xintr_ioapic_level12 +ffffffff82826cd0 ? Xintr_ioapic_level13 +ffffffff82826d10 ? Xintr_ioapic_level14 +ffffffff82826d50 ? Xintr_ioapic_level15 +ffffffff82826d90 ? Xintr_ioapic_level16 +ffffffff82826dd0 ? Xintr_ioapic_level17 +ffffffff82826e10 ? Xintr_ioapic_level18 +ffffffff82826e50 ? Xintr_ioapic_level19 +ffffffff82826e90 ? Xintr_ioapic_level20 +ffffffff82826ed0 ? Xintr_ioapic_level21 +ffffffff82826f10 ? Xintr_ioapic_level22 +ffffffff82826f50 ? Xintr_ioapic_level23 +ffffffff82826f90 ? Xintr_ioapic_level24 +ffffffff82826fd0 ? Xintr_ioapic_level25 +ffffffff82827010 ? Xintr_ioapic_level26 +ffffffff82827050 ? Xintr_ioapic_level27 +ffffffff82827090 ? Xintr_ioapic_level28 +ffffffff828270d0 ? Xintr_ioapic_level29 +ffffffff82827110 ? Xintr_ioapic_level30 +ffffffff82827150 ? Xintr_ioapic_level31 +ffffffff82827190 ? Xintr_ioapic_level32 +ffffffff828271d0 ? Xintr_ioapic_level33 +ffffffff82827210 ? Xintr_ioapic_level34 +ffffffff82827250 ? Xintr_ioapic_level35 +ffffffff82827290 ? Xintr_ioapic_level36 +ffffffff828272d0 ? Xintr_ioapic_level37 +ffffffff82827310 ? Xintr_ioapic_level38 +ffffffff82827350 ? Xintr_ioapic_level39 +ffffffff82827390 ? Xintr_ioapic_level40 +ffffffff828273d0 ? Xintr_ioapic_level41 +ffffffff82827410 ? Xintr_ioapic_level42 +ffffffff82827450 ? Xintr_ioapic_level43 +ffffffff82827490 ? Xintr_ioapic_level44 +ffffffff828274d0 ? Xintr_ioapic_level45 +ffffffff82827510 ? Xintr_ioapic_level46 +ffffffff82827550 ? Xintr_ioapic_level47 +ffffffff82827590 ? Xintr_ioapic_level48 +ffffffff828275d0 ? Xintr_ioapic_level49 +ffffffff82827610 ? Xintr_ioapic_level50 +ffffffff82827650 ? Xintr_ioapic_level51 +ffffffff82827690 ? Xintr_ioapic_level52 +ffffffff828276d0 ? Xintr_ioapic_level53 +ffffffff82827710 ? Xintr_ioapic_level54 +ffffffff82827750 ? Xintr_ioapic_level55 +ffffffff82827790 ? Xintr_ioapic_level56 +ffffffff828277d0 ? Xintr_ioapic_level57 +ffffffff82827810 ? Xintr_ioapic_level58 +ffffffff82827850 ? Xintr_ioapic_level59 +ffffffff82827890 ? Xintr_ioapic_level60 +ffffffff828278d0 ? Xintr_ioapic_level61 +ffffffff82827910 ? Xintr_ioapic_level62 +ffffffff82827950 ? Xintr_ioapic_level63 +ffffffff82828000 ? codepatch_fill_nop +ffffffff82828000 A __cptext_start +ffffffff82828000 A __kutext_end +ffffffff828280b0 ? codepatch_maprw +ffffffff828281c0 ? codepatch_unmaprw +ffffffff82828230 ? codepatch_nop +ffffffff828283b0 ? codepatch_replace +ffffffff82828580 ? codepatch_call +ffffffff828285a0 ? codepatch_control_flow +ffffffff828287c0 ? codepatch_jmp +ffffffff82829000 A __cptext_end +ffffffff82829000 A __rodata_start +ffffffff82829000 C _etext +ffffffff82829000 C etext +ffffffff8282a000 r seeprom_read +ffffffff8282a004 r icl_mg_pll_find_divisors.div1_vals +ffffffff8282a034 r athn_ac2qid +ffffffff8282a034 r athn_ac2qid +ffffffff8282a034 r athn_ac2qid +ffffffff8282a040 r rtwn_get_rssi.cckoff +ffffffff8282a068 r rsu_ac2qid +ffffffff8282a078 r pckbc_portcmd +ffffffff8282a07c r tht_fifo_write_pad.pad +ffffffff8282a084 r rsu_get_rssi.cckoff +ffffffff8282a0a4 r adlp_n_revids +ffffffff8282a0e8 r apple_iso_trans +ffffffff8282a0f0 r wihap_check_tx.txratetable +ffffffff8282a0f4 r dmamode +ffffffff8282a118 r gen9_edram_size_mb.sets +ffffffff8282a12c r dg2_g12_revid_step_tbl +ffffffff8282b000 r isomappings +ffffffff8282b080 r unimappings +ffffffff8282b230 r replacements +ffffffff8282eb41 r apollo_pio_rec +ffffffff8287cb7b r apollo_udma33_tim +ffffffff82892304 r pp_r600_decoded_lanes +ffffffff828c93a1 r cmd680_setup_channel.udma_tbl +ffffffff828d1911 r apollo_udma100_tim +ffffffff828d1917 r cmd0646_9_tim_udma +ffffffff828e0280 r substchar +ffffffff8293799a r apollo_udma133_tim +ffffffff829379a1 r apollo_udma66_tim +ffffffff829379cb r cy_pio_rec +ffffffff8293d258 R drm_ca +ffffffff8293d280 R drm_filtops +ffffffff8293d2b0 R drmread_filtops +ffffffff8293e000 r vga_emulops +ffffffff8293e048 R vga_stdscreen +ffffffff8293e078 R vga_stdscreen_mono +ffffffff8293e0a8 R vga_stdscreen_bf +ffffffff8293e0d8 R vga_40lscreen +ffffffff8293e108 R vga_40lscreen_mono +ffffffff8293e138 R vga_40lscreen_bf +ffffffff8293e168 R vga_50lscreen +ffffffff8293e198 R vga_50lscreen_mono +ffffffff8293e1c8 R vga_50lscreen_bf +ffffffff8293e1f8 R vga_screenlist +ffffffff8293e208 R vga_screenlist_mono +ffffffff8293e218 R vga_accessops +ffffffff8293e278 r i945_wm_info +ffffffff8293e2b8 r bgansitopc +ffffffff8293e2c0 r pctoansi +ffffffff8293e300 r sdma_offsets +ffffffff8293e300 r sdma_offsets +ffffffff8293e338 r iha_rate_tbl +ffffffff8293e370 r i830_a_wm_info +ffffffff8293e3a8 r gen9_edram_size_mb.ways +ffffffff8293e408 r aggr_periodic_times +ffffffff8293e500 r michael_final.pad +ffffffff8293e528 r rt_copysa.maskarray +ffffffff8293e530 r i915_wm_info +ffffffff8293e538 r amdgpu_ih_clientid_jpeg +ffffffff8293e538 r amdgpu_ih_clientid_uvds +ffffffff8293e538 r amdgpu_ih_clientid_vcns +ffffffff8293e538 r amdgpu_ih_clientid_vcns +ffffffff8293e538 r amdgpu_ih_clientid_vcns +ffffffff8293e568 r jsl_ehl_revids +ffffffff8293e578 r vga_setfontset.cmaptabb +ffffffff8293e5e8 r i830_bc_wm_info +ffffffff8293e650 r hsw_activate_psr2.map +ffffffff8293e658 r tgl_revids +ffffffff8293e690 r __drm_universal_plane_init.default_modifiers +ffffffff8293e6a0 r iwn_tid2fifo +ffffffff8293e6b8 r vga_setfontset.cmaptaba +ffffffff8293e6c0 r crtc_offsets +ffffffff8293e6c0 r crtc_offsets +ffffffff8293e6c0 r crtc_offsets +ffffffff8293e768 r rtwn_r88e_get_rssi.cckoff +ffffffff8293f000 R edid_vendors +ffffffff8293f2c0 R edid_nvendors +ffffffff8293f2d0 R edid_products +ffffffff8293f330 R edid_nproducts +ffffffff8293f340 r _edid_modes +ffffffff82940000 R videomode_list +ffffffff82941080 R videomode_count +ffffffff82942000 r ahc_hard_errors +ffffffff82942080 r critical_sections +ffffffff829420b0 r patches +ffffffff82942d50 r seqprog +ffffffff82944000 r ahc_switch +ffffffff82945000 r termstat_strings +ffffffff82945020 r critical_sections +ffffffff82945060 r seqprog +ffffffff82945d50 r patches +ffffffff82947000 r ahd_switch +ffffffff82948000 R aic_switch +ffffffff82949000 R adw_switch +ffffffff8294a000 R gdt_switch +ffffffff8294b000 R twe_switch +ffffffff8294c000 R ciss_switch +ffffffff8294c030 R ciss_level +ffffffff8294c050 R ciss_stat +ffffffff8294d000 R ami_switch +ffffffff8294d028 R ami_raw_switch +ffffffff8294e000 R mfi_switch +ffffffff8294e028 R mfi_pd_switch +ffffffff8294e050 r mfi_iop_xscale +ffffffff8294e080 r mfi_iop_ppc +ffffffff8294e0b0 r mfi_iop_gen2 +ffffffff8294e0e0 r mfi_iop_skinny +ffffffff8294e110 r mfi_bbu_indicators +ffffffff8294f000 R qlw_switch +ffffffff82950000 R isp_2100_risc_code +ffffffff82962bf0 R isp_2200_risc_code +ffffffff82975990 R isp_2300_risc_code +ffffffff8298f408 R qla_switch +ffffffff8298f430 r qla_regs_2100 +ffffffff8298f460 r qla_regs_2200 +ffffffff8298f490 r qla_regs_23XX +ffffffff82990000 R ahci_atascsi_methods +ffffffff82991000 R nvme_switch +ffffffff82991028 r nvme_ops +ffffffff82992000 R mpi_switch +ffffffff82992060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff82992090 r chv_oa_mux_regs +ffffffff829920b0 r fiji_clock_stretcher_lookup_table +ffffffff829920b0 r tonga_clock_stretcher_lookup_table +ffffffff829920d0 r iosf_pci_devices +ffffffff829920f0 r link_speed +ffffffff829920f0 r link_speed +ffffffff82992130 r drm_fb_xfrm.default_dst_pitch +ffffffff82992130 r non_supported_protection +ffffffff82992140 r tgl_uy_revids +ffffffff829922b0 r bwi_phy_noise_11g_rev1 +ffffffff82992320 r cardslot_process_event.antonym_ev +ffffffff829923b0 r gen11_oa_mux_regs +ffffffff82992450 r dpia_to_preferred_enc_id_table +ffffffff829924c0 r ddr2_cycle_tenths +ffffffff82992530 r rtw_intr_rx.ratetbl +ffffffff829925b0 r abm_config +ffffffff82992630 r getbootinfo.ports +ffffffff82992680 r reg_offsets +ffffffff82992690 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff829926a0 r glk_revids +ffffffff829926b0 r init_non_clock_fields.look_up +ffffffff829926c0 r uftdi_8u232am_getrate.roundoff +ffffffff82992720 r zyd_rx_data.rates +ffffffff82992740 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff82992770 r intel_engine_init_tlb_invalidation.gen8_regs +ffffffff829927a0 r bwi_phy_noise_11g +ffffffff829927b0 r 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w83627dhg_sensors +ffffffff829a57c0 R nct6776f_sensors +ffffffff829a5a00 R nct6779d_sensors +ffffffff829a5d60 R w83637hf_sensors +ffffffff829a5f20 R w83697hf_sensors +ffffffff829a60c0 R w83781d_sensors +ffffffff829a6280 R w83782d_sensors +ffffffff829a6480 R w83783s_sensors +ffffffff829a6600 R w83791d_sensors +ffffffff829a6860 R w83792d_sensors +ffffffff829a6ae0 R as99127f_sensors +ffffffff829a7000 r ar5k_known_products +ffffffff829a7110 r ar5111_gain_opt +ffffffff829a71e0 r ar5112_gain_opt +ffffffff829a72b0 r ar5k_5ghz_channels +ffffffff829a7a00 r ar5k_2ghz_channels +ffffffff829a7f10 r ar5111_rf +ffffffff829a8350 r ar5112a_rf +ffffffff829a8890 r ar5112_rf +ffffffff829a8da0 r ar5413_rf +ffffffff829a91b0 r ar2413_rf +ffffffff829a94d0 r ar2425_rf +ffffffff829a9830 r ar5111_rfg +ffffffff829a9b30 r ar5112_rfg +ffffffff829a9e30 r ar5413_rfg +ffffffff829aa130 r ar2413_rfg +ffffffff829aa430 r ar5k_rt_11a +ffffffff829aa552 r ar5k_rt_11b +ffffffff829aa674 r ar5k_rt_11g +ffffffff829aa796 r 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ar9280_2_0_rx_gain_13db_backoff +ffffffff829b60c0 r ar9280_2_0_rx_gain +ffffffff829b60e0 r ar9280_2_0_tx_gain_high_power +ffffffff829b6100 r ar9280_2_0_tx_gain +ffffffff829b6120 r ar9280_init_from_rom.chainoffset +ffffffff829b6130 r ar9280_2_0_regs +ffffffff829b6190 r ar9280_2_0_vals_5g20 +ffffffff829b6250 r ar9280_2_0_vals_5g40 +ffffffff829b6310 r ar9280_2_0_vals_2g40 +ffffffff829b63d0 r ar9280_2_0_vals_2g20 +ffffffff829b6490 r ar9280_2_0_cm_regs +ffffffff829b6740 r ar9280_2_0_cm_vals +ffffffff829b6c90 r ar9280_2_0_fast_clock_regs +ffffffff829b6cb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff829b6cf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff829b6d30 r ar9280_2_0_serdes_regs +ffffffff829b6d60 r ar9280_2_0_serdes_vals +ffffffff829b6d90 r ar9280_2_0_rx_gain_regs +ffffffff829b6ea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff829b70b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff829b72c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff829b74d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff829b76e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff829b78f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff829b7b00 r ar9280_2_0_tx_gain_regs +ffffffff829b7b40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff829b7bc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff829b7c40 r ar9280_2_0_tx_gain_vals_5g +ffffffff829b7cc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff829b8000 r ar9271_ini +ffffffff829b8068 r ar9285_1_2_ini +ffffffff829b80d0 r ar9280_2_0_serdes +ffffffff829b80e8 r ar9271_tx_gain_high_power +ffffffff829b8108 r ar9271_tx_gain +ffffffff829b8128 r ar9285_2_0_tx_gain_high_power +ffffffff829b8148 r ar9285_2_0_tx_gain +ffffffff829b8168 r ar9285_1_2_tx_gain_high_power +ffffffff829b8188 r ar9285_1_2_tx_gain +ffffffff829b81b0 r ar9271_regs +ffffffff829b8410 r ar9271_vals_2g40 +ffffffff829b88d0 r ar9271_vals_2g20 +ffffffff829b8d90 r ar9271_cm_regs +ffffffff829b9020 r ar9271_cm_vals +ffffffff829b9540 r ar9285_1_2_regs +ffffffff829b97a0 r ar9285_1_2_vals_2g40 +ffffffff829b9c60 r ar9285_1_2_vals_2g20 +ffffffff829ba120 r ar9285_1_2_cm_regs +ffffffff829ba3a0 r ar9285_1_2_cm_vals +ffffffff829ba890 r ar9280_2_0_serdes_regs +ffffffff829ba8c0 r ar9280_2_0_serdes_vals +ffffffff829ba8f0 r ar9271_tx_gain_regs +ffffffff829ba940 r ar9271_tx_gain_high_power_vals_2g +ffffffff829ba9d0 r ar9271_tx_gain_vals_2g +ffffffff829baa60 r ar9285_1_2_tx_gain_regs +ffffffff829baab0 r ar9285_2_0_tx_gain_high_power_vals_2g +ffffffff829bab50 r ar9285_2_0_tx_gain_vals_2g +ffffffff829babf0 r ar9285_1_2_tx_gain_high_power_vals_2g +ffffffff829bac90 r ar9285_1_2_tx_gain_vals_2g +ffffffff829bb000 r ar9287_1_1_ini +ffffffff829bb068 r ar9280_2_0_serdes +ffffffff829bb080 r ar9287_1_1_rx_gain +ffffffff829bb0a0 r ar9287_1_1_tx_gain +ffffffff829bb0c0 r ar9287_1_1_regs +ffffffff829bb120 r ar9287_1_1_vals_2g40 +ffffffff829bb1d0 r ar9287_1_1_vals_2g20 +ffffffff829bb280 r ar9287_1_1_cm_regs +ffffffff829bb560 r ar9287_1_1_cm_vals +ffffffff829bbb20 r ar9280_2_0_serdes_regs +ffffffff829bbb50 r ar9280_2_0_serdes_vals +ffffffff829bbb80 r ar9287_1_1_rx_gain_regs +ffffffff829bbd90 r ar9287_1_1_rx_gain_vals_2g +ffffffff829bc1a0 r ar9287_1_1_tx_gain_regs +ffffffff829bc200 r ar9287_1_1_tx_gain_vals_2g +ffffffff829bd000 r athn_rates +ffffffff829be000 r ar9485_1_1_ini +ffffffff829be068 r ar9485_1_1_serdes +ffffffff829be080 r ar9380_2_2_ini +ffffffff829be0e8 r ar9380_2_2_serdes +ffffffff829be100 r ar9380_2_2_rx_gain_wo_xlna +ffffffff829be120 r ar9380_2_2_rx_gain +ffffffff829be140 r ar9485_1_1_rx_gain +ffffffff829be160 r ar9380_2_2_tx_gain_high_ob_db +ffffffff829be180 r ar9380_2_2_tx_gain_low_ob_db +ffffffff829be1a0 r ar9380_2_2_tx_gain_high_power +ffffffff829be1c0 r ar9380_2_2_tx_gain +ffffffff829be1e0 r ar9485_1_1_tx_gain +ffffffff829be200 r ar9485_1_1_regs +ffffffff829be270 r ar9485_1_1_vals_2g40 +ffffffff829be350 r ar9485_1_1_vals_2g20 +ffffffff829be430 r ar9485_1_1_cm_regs +ffffffff829be720 r ar9485_1_1_cm_vals +ffffffff829bed00 r ar9485_1_1_serdes_regs +ffffffff829bed0c r ar9485_1_1_serdes_vals +ffffffff829bed20 r ar9380_2_2_regs +ffffffff829bedb0 r ar9380_2_2_vals_5g20 +ffffffff829beed0 r ar9380_2_2_vals_5g40 +ffffffff829beff0 r ar9380_2_2_vals_2g40 +ffffffff829bf110 r ar9380_2_2_vals_2g20 +ffffffff829bf230 r ar9380_2_2_cm_regs +ffffffff829bf5d0 r ar9380_2_2_cm_vals +ffffffff829bfd00 r ar9380_2_2_fast_clock_regs +ffffffff829bfd20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff829bfd50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff829bfd74 r ar9380_2_2_serdes_regs +ffffffff829bfd80 r ar9380_2_2_serdes_vals +ffffffff829bfd90 r ar9380_2_2_rx_gain_regs +ffffffff829bff90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff829c0390 r ar9380_2_2_rx_gain_vals +ffffffff829c0790 r ar9485_1_1_rx_gain_regs +ffffffff829c0890 r ar9485_1_1_rx_gain_vals +ffffffff829c0a90 r ar9380_2_2_tx_gain_regs +ffffffff829c0b60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff829c0d00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff829c0ea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff829c1040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff829c11e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff829c1380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff829c1520 r ar9380_2_2_tx_gain_vals_5g +ffffffff829c16c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff829c1860 r ar9485_1_1_tx_gain_regs +ffffffff829c18f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff829c1a10 r ar9380_def_rom +ffffffff829c1e50 r ar9380_def_rom_h112 +ffffffff829c2290 r ar9380_def_rom_h116 +ffffffff829c26d0 r ar9380_def_rom_x112 +ffffffff829c2b10 r ar9380_def_rom_x113 +ffffffff829c3000 R atw_txthresh_tab_lo +ffffffff829c3050 R atw_txthresh_tab_hi +ffffffff829c30a0 r atw_attach.empty_macaddr +ffffffff829c30b0 r atw_attach.type_strings +ffffffff829c30d0 r atw_rfmd2958_ifn +ffffffff829c3110 r atw_rfmd2958_rf1r +ffffffff829c3150 r atw_rxintr.rate_tbl +ffffffff829c4000 r rtw_identify_sta.empty_macaddr +ffffffff829c5000 r rtwn_set_key.etherzeroaddr +ffffffff829c5010 r rtl8188eu_rf_prog +ffffffff829c5030 r rtl8188ftv_rf_prog +ffffffff829c5050 r rtl8192e_rf_prog +ffffffff829c5080 r rtl8188ce_rf_prog +ffffffff829c50a0 r rtl8188ru_rf_prog +ffffffff829c50c0 r rtl8188cu_rf_prog +ffffffff829c50e0 r rtl8192ce_rf_prog +ffffffff829c5110 r rtl8188ru_txagc +ffffffff829c5170 r rtl8188eu_rf_regs +ffffffff829c5230 r rtl8188eu_rf_vals +ffffffff829c53b0 r rtl8188ftv_rf_regs +ffffffff829c5490 r rtl8188ftv_rf_vals +ffffffff829c5640 r rtl8192e_rf_regs +ffffffff829c5710 r rtl8192e_rf_vals +ffffffff829c58b0 r rtl8192e_rf2_regs +ffffffff829c5950 r rtl8192e_rf2_vals +ffffffff829c5a90 r rtl8192ce_rf1_regs +ffffffff829c5bb0 r rtl8188ce_rf_vals +ffffffff829c5df0 r rtl8188ru_rf_vals +ffffffff829c6030 r rtl8188cu_rf_vals +ffffffff829c6270 r rtl8192ce_rf1_vals +ffffffff829c64b0 r rtl8192ce_rf2_regs +ffffffff829c6500 r rtl8192ce_rf2_vals +ffffffff829c65a0 r rtl8192cu_txagc +ffffffff829c7000 r rt2560_rf2522_r2 +ffffffff829c7040 r rt2560_rf2524_r2 +ffffffff829c7080 r rt2560_rf2525_hi_r2 +ffffffff829c70c0 r rt2560_rf2525_r2 +ffffffff829c7100 r rt2560_rf2525e_r2 +ffffffff829c7140 r rt2560_rf2526_hi_r2 +ffffffff829c7180 r rt2560_rf2526_r2 +ffffffff829c71c0 r rt2560_def_bbp +ffffffff829c7200 r rt2560_def_mac +ffffffff829c8000 r rt2661_rf5225_1 +ffffffff829c8300 r rt2661_rf5225_2 +ffffffff829c8600 r rt2661_def_bbp +ffffffff829c8640 r rt2661_def_mac +ffffffff829c9000 r rt2860_rf2850 +ffffffff829c9430 r rt2860_rates +ffffffff829c94f0 r rt3572_def_rf +ffffffff829c9530 r rt3090_def_rf +ffffffff829c9560 r rt5392_def_rf +ffffffff829c95e0 r rt3290_def_rf +ffffffff829c9640 r rt5390_def_rf +ffffffff829c96c0 r rt5390_def_bbp +ffffffff829c96f0 r rt2860_def_mac +ffffffff829cb000 r acx111_reg +ffffffff829cb040 r acx111_rate_map +ffffffff829cc000 r acx100_reg +ffffffff829cc040 r acx100_txpower_rfmd +ffffffff829cc060 r gen8_rcs_offsets +ffffffff829cc090 r acx100_txpower_maxim +ffffffff829cc0b0 r mtl_rcs_offsets +ffffffff829cc0f0 r digits +ffffffff829cc0f0 r pppdumpb.digits +ffffffff829cc0f0 r pppdumpm.digits +ffffffff829cc140 r hangpic +ffffffff829cc180 r gen11_rcs_offsets +ffffffff829cc1b0 r xehp_rcs_offsets +ffffffff829cc1e0 r dg2_rcs_offsets +ffffffff829cc220 r dg2_xcs_offsets +ffffffff829cc250 r gen12_xcs_offsets +ffffffff829cd000 r trinity_override_mgpg_sequences +ffffffff829cd3c0 r voltage_swing_to_pre_emphasis +ffffffff829cd3d0 r sgpr_init_compute_shader +ffffffff829cd4a0 r intel_hpll_vco.cl_vco +ffffffff829cd4c0 r vgpr_init_compute_shader +ffffffff829ce000 r malo_cmd_string.cmds +ffffffff829ce0b0 r malo_cmd_string_result.results +ffffffff829cf000 R bwi_vendor_led_act +ffffffff829cf00c R bwi_default_led_act +ffffffff829cf010 R bwi_led_duration +ffffffff829cf380 r bwi_sup_bphy +ffffffff829cf3c0 r bwi_phy_freq_11g_rev1 +ffffffff829cf5c0 r bwi_phy_rotor_11g_rev1 +ffffffff829cf6a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff829cf6e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff829cf720 r bwi_phy_noise_scale_11g +ffffffff829cf760 r bwi_phy_sigma_sq_11g_rev2 +ffffffff829cf7d0 r bwi_phy_sigma_sq_11g_rev7 +ffffffff829cf840 r bwi_phy_delay_11g_rev1 +ffffffff829cf920 r bwi_rf_get_gains.save_phy_regs +ffffffff829cf940 r bwi_rf_lo_find.map +ffffffff829cf960 r bwi_txpower_map_11b +ffffffff829cf9a0 r bwi_txpower_map_11g +ffffffff829cf9e0 r _bwi_rf_lo_update_11g.rf_atten_list +ffffffff829cfa20 r _bwi_rf_lo_update_11g.rf_atten_init_list +ffffffff829cfa60 r _bwi_rf_lo_update_11g.rf_lo_measure_order +ffffffff829cfaa0 r bwi_rf_set_nrssi_ofs_11g.save_phy_comm_regs +ffffffff829cfac0 r bwi_bbpid_map +ffffffff829cfaf0 r bwi_regwin_count +ffffffff829cfb40 r bwi_clkfreq +ffffffff829cfb58 r bwi_zero_addr +ffffffff829d0000 R ipq8074_ops +ffffffff829d0070 R ipq6018_ops +ffffffff829d00e0 R qca6390_ops +ffffffff829d0150 R qcn9074_ops +ffffffff829d01c0 R wcn6855_ops +ffffffff829d0230 R wcn6750_ops +ffffffff829d02a0 R ath11k_hw_ring_mask_ipq8074 +ffffffff829d02f8 R ath11k_hw_ring_mask_qca6390 +ffffffff829d0350 R ath11k_hw_ring_mask_qcn9074 +ffffffff829d03a8 R ath11k_hw_ring_mask_wcn6750 +ffffffff829d0400 R ath11k_target_ce_config_wlan_ipq8074 +ffffffff829d0510 R ath11k_target_service_to_ce_map_wlan_ipq8074 +ffffffff829d0620 R ath11k_target_service_to_ce_map_wlan_ipq6018 +ffffffff829d0710 R ath11k_target_ce_config_wlan_qca6390 +ffffffff829d07f0 R ath11k_target_service_to_ce_map_wlan_qca6390 +ffffffff829d08b0 R ath11k_target_ce_config_wlan_qcn9074 +ffffffff829d0990 R ath11k_target_service_to_ce_map_wlan_qcn9074 +ffffffff829d0a70 R qwx_host_ce_config_ipq8074 +ffffffff829d0d10 R qwx_host_ce_config_qca6390 +ffffffff829d0e30 R qwx_host_ce_config_qcn9074 +ffffffff829d0ef0 R ipq8074_regs +ffffffff829d0fc4 R qca6390_regs +ffffffff829d1098 R qcn9074_regs +ffffffff829d116c R wcn6855_regs +ffffffff829d1240 R wcn6750_regs +ffffffff829d1320 R qmi_response_type_v01_ei +ffffffff829d1380 R qmi_wlanfw_ind_register_req_msg_v01_ei +ffffffff829d16a0 R qmi_wlanfw_ind_register_resp_msg_v01_ei +ffffffff829d1720 R qmi_wlanfw_host_cap_req_msg_v01_ei +ffffffff829d1aa0 R qmi_wlanfw_host_cap_resp_msg_v01_ei +ffffffff829d1ae0 R qmi_wlanfw_mem_cfg_s_v01_ei +ffffffff829d1b60 R qmi_wlanfw_mem_seg_s_v01_ei +ffffffff829d1c00 R qmi_wlanfw_request_mem_ind_msg_v01_ei +ffffffff829d1c60 R qmi_wlanfw_mem_seg_resp_s_v01_ei +ffffffff829d1d00 R qmi_wlanfw_respond_mem_req_msg_v01_ei +ffffffff829d1d60 R qmi_wlanfw_respond_mem_resp_msg_v01_ei +ffffffff829d1da0 R qmi_wlanfw_cap_req_msg_v01_ei +ffffffff829d1dc0 R qmi_wlanfw_rf_chip_info_s_v01_ei +ffffffff829d1e20 R qmi_wlanfw_rf_board_info_s_v01_ei +ffffffff829d1e60 R qmi_wlanfw_soc_info_s_v01_ei +ffffffff829d1ea0 R qmi_wlanfw_fw_version_info_s_v01_ei +ffffffff829d1f00 R qmi_wlanfw_cap_resp_msg_v01_ei +ffffffff829d21c0 R qmi_wlanfw_bdf_download_req_msg_v01_ei +ffffffff829d23a0 R qmi_wlanfw_bdf_download_resp_msg_v01_ei +ffffffff829d23e0 R qmi_wlanfw_m3_info_req_msg_v01_ei +ffffffff829d2440 R qmi_wlanfw_m3_info_resp_msg_v01_ei +ffffffff829d2480 R qmi_wlanfw_wlan_ini_req_msg_v01_ei +ffffffff829d24e0 R qmi_wlanfw_wlan_ini_resp_msg_v01_ei +ffffffff829d2520 R qmi_wlanfw_ce_tgt_pipe_cfg_s_v01_ei +ffffffff829d25e0 R qmi_wlanfw_ce_svc_pipe_cfg_s_v01_ei +ffffffff829d2660 R qmi_wlanfw_shadow_reg_cfg_s_v01_ei +ffffffff829d26c0 R qmi_wlanfw_shadow_reg_v2_cfg_s_v01_ei +ffffffff829d2700 R qmi_wlanfw_wlan_mode_req_msg_v01_ei +ffffffff829d2780 R qmi_wlanfw_wlan_mode_resp_msg_v01_ei +ffffffff829d27c0 R qmi_wlanfw_wlan_cfg_req_msg_v01_ei +ffffffff829d29a0 R qmi_wlanfw_wlan_cfg_resp_msg_v01_ei +ffffffff829d29e0 r wmi_tlv_policies +ffffffff829d4740 r qwx_hw_mode_pri_map +ffffffff829d4770 r ath11k_hw_params +ffffffff829d4cf0 r hw_srng_config_templ +ffffffff829d4fa8 r ath11k_hw_hal_params_ipq8074 +ffffffff829d4fb8 r ath11k_hw_hal_params_qca6390 +ffffffff829d4fc8 r ath11k_hw_hal_params_wcn6750 +ffffffff829d4fd8 r ath11k_hw_tcl2wbm_rbm_map_ipq8074 +ffffffff829d4fe1 r ath11k_hw_tcl2wbm_rbm_map_wcn6750 +ffffffff829d6000 R uhci_bus_methods +ffffffff829d6030 R uhci_root_ctrl_methods +ffffffff829d6060 R uhci_root_intr_methods +ffffffff829d6090 R uhci_device_ctrl_methods +ffffffff829d60c0 R uhci_device_intr_methods +ffffffff829d60f0 R uhci_device_bulk_methods +ffffffff829d6120 R uhci_device_isoc_methods +ffffffff829d6150 R uhci_devd +ffffffff829d6162 R uhci_confd +ffffffff829d616b R uhci_ifcd +ffffffff829d6174 R uhci_endpd +ffffffff829d617b R uhci_hubd_piix +ffffffff829d7000 R revbits +ffffffff829d7020 R ohci_bus_methods +ffffffff829d7050 R ohci_root_ctrl_methods +ffffffff829d7080 R ohci_root_intr_methods +ffffffff829d70b0 R ohci_device_ctrl_methods +ffffffff829d70e0 R ohci_device_intr_methods +ffffffff829d7110 R ohci_device_bulk_methods +ffffffff829d7140 R ohci_device_isoc_methods +ffffffff829d7170 R ohci_devd +ffffffff829d7182 R ohci_confd +ffffffff829d718b R ohci_ifcd +ffffffff829d7194 R ohci_endpd +ffffffff829d719b R ohci_hubd +ffffffff829d8000 R ehci_bus_methods +ffffffff829d8030 R ehci_root_ctrl_methods +ffffffff829d8060 R ehci_root_intr_methods +ffffffff829d8090 R ehci_device_ctrl_methods +ffffffff829d80c0 R ehci_device_intr_methods +ffffffff829d80f0 R ehci_device_bulk_methods +ffffffff829d8120 R ehci_device_isoc_methods +ffffffff829d8150 R ehci_devd +ffffffff829d8162 R ehci_odevd +ffffffff829d816c R ehci_confd +ffffffff829d8175 R ehci_ifcd +ffffffff829d817e R ehci_endpd +ffffffff829d8185 R ehci_hubd +ffffffff829d9000 R xhci_bus_methods +ffffffff829d9030 R xhci_root_ctrl_methods +ffffffff829d9060 R xhci_root_intr_methods +ffffffff829d9090 R xhci_device_ctrl_methods +ffffffff829d90c0 R xhci_device_intr_methods +ffffffff829d90f0 R xhci_device_bulk_methods +ffffffff829d9120 R xhci_device_isoc_methods +ffffffff829d9150 R xhci_devd +ffffffff829d9162 R xhci_confd +ffffffff829d916b R xhci_ifcd +ffffffff829d9174 R xhci_endpd +ffffffff829d917b R xhci_endpcd +ffffffff829d9181 R xhci_hubd +ffffffff829dc000 R radio_ca +ffffffff829dd000 R ipmi_ca +ffffffff829de000 R vscsi_ca +ffffffff829de028 R vscsi_switch +ffffffff829de050 R vscsi_filtops +ffffffff829df000 R mpath_ca +ffffffff829df028 R mpath_switch +ffffffff829e0000 R softraid_ca +ffffffff829e0028 R sr_switch +ffffffff829e1000 r spdmem_basic_types +ffffffff829e10a0 r spdmem_parity_types +ffffffff829e10e0 r spdmem_ddr4_decode.ddr4_chipsize +ffffffff829e2000 R ufshci_switch +ffffffff829e3000 R kstat_rlock_ops +ffffffff829e3010 R kstat_wlock_ops +ffffffff829e3020 R kstat_mutex_ops +ffffffff829e3030 R kstat_cpu_ops +ffffffff829e3040 r kstat_id_tree_RBT_INFO +ffffffff829e3058 R kstat_id_tree_RBT_TYPE +ffffffff829e3060 r kstat_pv_tree_RBT_INFO +ffffffff829e3078 R kstat_pv_tree_RBT_TYPE +ffffffff829e3080 r kstat_nm_tree_RBT_INFO +ffffffff829e3098 R kstat_nm_tree_RBT_TYPE +ffffffff829e4000 r fuse_rd_filtops +ffffffff829e5000 R fusefs_vfsops +ffffffff829e5070 R fusefs_vars +ffffffff829e6000 R fusefs_vops +ffffffff829e6110 R fusefsread_filtops +ffffffff829e6140 R fusefswrite_filtops +ffffffff829e6170 R fusefsvnode_filtops +ffffffff829e7000 r pf_state_tree_RBT_INFO +ffffffff829e7018 R pf_state_tree_RBT_TYPE +ffffffff829e7020 r pf_state_tree_id_RBT_INFO +ffffffff829e7038 R pf_state_tree_id_RBT_TYPE +ffffffff829e7040 r pf_translate_af.zero +ffffffff829e8000 R hfsc_ops +ffffffff829e8038 R ifq_hfsc_ops +ffffffff829e8040 R hfsc_pf_ops +ffffffff829e8088 R pfq_hfsc_ops +ffffffff829e9000 r fqcodel_ops +ffffffff829e9038 R ifq_fqcodel_ops +ffffffff829e9040 r fqcodel_pf_ops +ffffffff829e9088 R pfq_fqcodel_ops +ffffffff829e9090 r codel_intervals +ffffffff829ea000 r pfsync_bulk_req_state_names +ffffffff829ea030 r pfsync_bulk_req_event_names +ffffffff829ea060 r pfsync_qs +ffffffff829ea0d8 r pfsync_kstat_tpl +ffffffff829ea2e0 r pfsync_acts +ffffffff829eb000 r bio_mappings_RBT_INFO +ffffffff829eb018 R bio_mappings_RBT_TYPE +ffffffff829ec000 R hotplugread_filtops +ffffffff829ed000 R dtps_static +ffffffff829ee000 R db_show_all_cmds +ffffffff829ee180 R db_show_cmds +ffffffff829ee4c0 R db_boot_cmds +ffffffff829ee5a0 R db_command_table +ffffffff829ef000 R ddb_vars +ffffffff829f0000 R audio_ca +ffffffff829f0028 R audioctlread_filtops +ffffffff829f0058 R audiowrite_filtops +ffffffff829f0088 R audioread_filtops +ffffffff829f1000 R midi_ca +ffffffff829f1028 R midiwrite_filtops +ffffffff829f1058 R midiread_filtops +ffffffff829f2000 r mulawtolin16 +ffffffff829f2200 r lintomulaw +ffffffff829f3000 R randomread_filtops +ffffffff829f3030 R randomwrite_filtops +ffffffff829f4000 R video_ca +ffffffff829f4028 R video_filtops +ffffffff829f5000 R cd9660_vfsops +ffffffff829f6000 R cd9660_vops +ffffffff829f6110 R cd9660_specvops +ffffffff829f6220 R cd9660_fifovops +ffffffff829f6330 R cd9660read_filtops +ffffffff829f6360 R cd9660write_filtops +ffffffff829f6390 R cd9660vnode_filtops +ffffffff829f7000 R udf_vfsops +ffffffff829f8000 R udf_vops +ffffffff829f8110 r mon_lens +ffffffff829f9000 r month_days +ffffffff829fa000 R execsw +ffffffff829fb000 r shstrtab +ffffffff829fc000 R copyright +ffffffff829fc0c0 r initpaths +ffffffff829fd000 R sysent +ffffffff829ff000 R bufq_impls +ffffffff82a00000 R kqueueops +ffffffff82a00038 R kqread_filtops +ffffffff82a00068 R proc_filtops +ffffffff82a00098 R file_filtops +ffffffff82a000c8 R timer_filtops +ffffffff82a00100 R sysfilt_ops +ffffffff82a00148 R seltrue_filtops +ffffffff82a00178 R dead_filtops +ffffffff82a001a8 R badfd_filtops +ffffffff82a001d8 r mutex_klistops +ffffffff82a001f0 r rwlock_klistops +ffffffff82a01000 R kv_exec +ffffffff82a02000 R addrmask +ffffffff82a03000 r rw_ops +ffffffff82a04000 r proc_printit.pstat +ffffffff82a05000 R pledge_syscalls +ffffffff82a05a60 r pledgenames +ffffffff82a05cb0 r pledgereq +ffffffff82a06000 r unvname_rbt_RBT_INFO +ffffffff82a06018 R unvname_rbt_RBT_TYPE +ffffffff82a07000 R sig_filtops +ffffffff82a07030 R sigprop +ffffffff82a08000 R kern_vars +ffffffff82a082f0 R hw_vars +ffffffff82a09000 R tc_vars +ffffffff82a0a000 r sys_gettimeofday.zerotz +ffffffff82a0b000 r taskq_sys_name +ffffffff82a0b006 r taskq_sys_mp_name +ffffffff82a0b010 R systq +ffffffff82a0b018 R systqmp +ffffffff82a0d000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff82a0d010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff82a0d020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff82a0d030 r gpt_get_fstype.gpt_uuid_linux +ffffffff82a0d040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff82a0d050 r gpt_get_fstype.gpt_uuid_unused +ffffffff82a0d060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff82a0d070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff82a0e000 r hiballoc_addr_RBT_INFO +ffffffff82a0e018 R hiballoc_addr_RBT_TYPE +ffffffff82a0f000 R logread_filtops +ffffffff82a10000 r phtree_RBT_INFO +ffffffff82a10018 R phtree_RBT_TYPE +ffffffff82a10020 r pool_lock_ops_rw +ffffffff82a10058 r pool_lock_ops_mtx +ffffffff82a11000 r pselregister.evf +ffffffff82a1100c r pselregister.evff +ffffffff82a12000 R pipe_rfiltops +ffffffff82a12030 R pipe_wfiltops +ffffffff82a12060 R pipe_efiltops +ffffffff82a12090 r pipeops +ffffffff82a13000 R socketops +ffffffff82a14000 R sysvsem_vars +ffffffff82a15000 R char_type +ffffffff82a15100 R ttyread_filtops +ffffffff82a15130 R ttywrite_filtops +ffffffff82a15160 R ttyexcept_filtops +ffffffff82a16000 R ptcread_filtops +ffffffff82a16030 R ptcwrite_filtops +ffffffff82a16060 R ptcexcept_filtops +ffffffff82a18000 R domains +ffffffff82a19000 R unixdomain +ffffffff82a19050 R unixsw +ffffffff82a1a000 R soread_filtops +ffffffff82a1a030 R sowrite_filtops +ffffffff82a1a060 R soexcept_filtops +ffffffff82a1b000 R sun_noname +ffffffff82a1b010 R uipc_usrreqs +ffffffff82a1b0b8 R uipc_dgram_usrreqs +ffffffff82a1b160 R unpstctl_vars +ffffffff82a1b190 R unpsqctl_vars +ffffffff82a1b1c0 R unpdgctl_vars +ffffffff82a1c000 r namecache_rb_cache_RBT_INFO +ffffffff82a1c018 R namecache_rb_cache_RBT_TYPE +ffffffff82a1d000 R generic_filtops +ffffffff82a1e000 r buf_rb_bufs_RBT_INFO +ffffffff82a1e018 R buf_rb_bufs_RBT_TYPE +ffffffff82a1e020 r typename +ffffffff82a1f000 R sync_vops +ffffffff82a20000 R vnops +ffffffff82a21000 R spec_vops +ffffffff82a22000 R dead_vops +ffffffff82a23000 R fifo_vops +ffffffff82a23110 R fiforead_filtops +ffffffff82a23140 R fifowrite_filtops +ffffffff82a23170 R fifoexcept_filtops +ffffffff82a24000 R regyear +ffffffff82a24020 R leapyear +ffffffff82a24040 r dos2unix +ffffffff82a24140 r u2l +ffffffff82a24240 r unix2dos +ffffffff82a25008 R msdosfs_vfsops +ffffffff82a26000 R msdosfs_vops +ffffffff82a26110 R msdosfsread_filtops +ffffffff82a26140 R msdosfswrite_filtops +ffffffff82a26170 R msdosfsvnode_filtops +ffffffff82a27000 r _utf_count +ffffffff82a28000 R ntfs_vfsops +ffffffff82a29000 R ntfs_vops +ffffffff82a2a000 R bpfread_filtops +ffffffff82a2a030 R bpf_mbuf_ops +ffffffff82a2b000 r bpf_mem_ops +ffffffff82a2c000 R priq_ops +ffffffff82a2c038 R ifq_priq_ops +ffffffff82a2c040 r ifq_kstat_tpl +ffffffff82a2c180 r ifiq_kstat_tpl +ffffffff82a2d000 r ether_crc32_le_update.crctab +ffffffff82a2d040 r ether_crc32_be_update.crctab +ffffffff82a2e000 r lcp +ffffffff82a2e078 r ipcp +ffffffff82a2e0f0 r ipv6cp +ffffffff82a2e168 r chap +ffffffff82a2e1e0 r pap +ffffffff82a2f000 R ifmedia_baudrate_descriptions +ffffffff82a30000 r fcstab +ffffffff82a32000 R tunread_filtops +ffffffff82a32030 R tunwrite_filtops +ffffffff82a33000 R bridge_brport +ffffffff82a34000 R bstp_etheraddr +ffffffff82a35000 r eb_tree_RBT_INFO +ffffffff82a35018 R eb_tree_RBT_TYPE +ffffffff82a36000 r veb_etherbridge_ops +ffffffff82a36028 r veb_pf_ipv4 +ffffffff82a36040 r veb_pf_ipv6 +ffffffff82a37000 r pipex_pppoe_padding +ffffffff82a38000 r rn_addmask.normal_chars +ffffffff82a39000 R route_src +ffffffff82a39010 R route_usrreqs +ffffffff82a390b8 R routedomain +ffffffff82a39100 R routesw +ffffffff82a3a000 R gre_vars +ffffffff82a3a030 r mgre_tree_RBT_INFO +ffffffff82a3a048 R mgre_tree_RBT_TYPE +ffffffff82a3a050 r egre_tree_RBT_INFO +ffffffff82a3a068 R egre_tree_RBT_TYPE +ffffffff82a3a070 r nvgre_ucast_tree_RBT_INFO +ffffffff82a3a088 R nvgre_ucast_tree_RBT_TYPE +ffffffff82a3a090 r nvgre_mcast_tree_RBT_INFO +ffffffff82a3a0a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff82a3a0b0 r eoip_tree_RBT_INFO +ffffffff82a3a0c8 R eoip_tree_RBT_TYPE +ffffffff82a3a0d0 r nvgre_etherbridge_ops +ffffffff82a3b000 r trunk_protos +ffffffff82a3c000 R ethermulticastaddr_slowprotocols +ffffffff82a3c006 R lacp_info_tlv_template +ffffffff82a3c00e R marker_info_tlv_template +ffffffff82a3c012 R marker_response_tlv_template +ffffffff82a3c020 R lacp_timer_funcs +ffffffff82a3d000 r lacp_rxm_state_names +ffffffff82a3d040 r lacp_rxm_event_names +ffffffff82a3d090 r aggr_port_selected_names +ffffffff82a3d0b0 r lacp_mux_state_names +ffffffff82a3d0e0 r lacp_mux_event_names +ffffffff82a3d128 r lacp_address_slow +ffffffff82a3e000 r tpmr_pf_ipv4 +ffffffff82a3e018 r tpmr_pf_ipv6 +ffffffff82a3f000 r bpe_tree_RBT_INFO +ffffffff82a3f018 R bpe_tree_RBT_TYPE +ffffffff82a3f020 r bpe_etherbridge_ops +ffffffff82a40000 R pppx_rd_filtops +ffffffff82a40030 R pppx_wr_filtops +ffffffff82a40060 r pppx_ifs_RBT_INFO +ffffffff82a40078 R pppx_ifs_RBT_TYPE +ffffffff82a40080 r pppac_rd_filtops +ffffffff82a400b0 r pppac_wr_filtops +ffffffff82a41000 r vxlan_peers_RBT_INFO +ffffffff82a41018 R vxlan_peers_RBT_TYPE +ffffffff82a41020 r vxlan_etherbridge_ops +ffffffff82a42000 R stoeplitz_cache +ffffffff82a43000 R ieee80211_std_rateset_11a +ffffffff82a43010 R ieee80211_std_rateset_11b +ffffffff82a43020 R ieee80211_std_rateset_11g +ffffffff82a43030 R ieee80211_std_ratesets_11n +ffffffff82a433b0 R ieee80211_std_ratesets_11ac +ffffffff82a436b0 r ieee80211_setbasicrates.basic +ffffffff82a43710 r ieee80211_setmode.chanflags +ffffffff82a43730 r ieee80211_rate2media.rates +ffffffff82a438c0 r ieee80211_media2rate.ieeerates +ffffffff82a44000 r Sbox +ffffffff82a46000 r ieee80211_ioctl.empty_macaddr +ffffffff82a47000 r ieee80211_find_rxnode.zero +ffffffff82a47008 r ieee80211_tree_RBT_INFO +ffffffff82a47020 R ieee80211_tree_RBT_TYPE +ffffffff82a47028 r ieee80211_ess_tree_RBT_INFO +ffffffff82a47040 R ieee80211_ess_tree_RBT_TYPE +ffffffff82a47048 r ieee80211_do_slow_print.merge_print_intvl +ffffffff82a48020 R ieee80211_edca_table +ffffffff82a480e0 R ieee80211_qap_edca_table +ffffffff82a49000 R ieee80211_mgt_subtype_name +ffffffff82a49080 R ieee80211_state_name +ffffffff82a490b0 R ieee80211_phymode_name +ffffffff82a4a000 r ieee80211_r_ctry +ffffffff82a4aae0 r ieee80211_r_names +ffffffff82a4af80 r ieee80211_r_map +ffffffff82a4c000 R zeroin46_addr +ffffffff82a4c010 R zeroin_addr +ffffffff82a4d000 R inetdomain +ffffffff82a4d050 R inetsw +ffffffff82a4e000 R divertctl_vars +ffffffff82a4e030 R divert_usrreqs +ffffffff82a4f000 R icmpctl_vars +ffffffff82a50000 R ipctl_vars +ffffffff82a50140 R inetctlerrmap +ffffffff82a51000 R rip_usrreqs +ffffffff82a52000 R tcp_timer_funcs +ffffffff82a53000 R tcp_usrreqs +ffffffff82a530a8 R tcp6_usrreqs +ffffffff82a53150 R tcpctl_vars +ffffffff82a54000 R udp_usrreqs +ffffffff82a540a8 R udp6_usrreqs +ffffffff82a54150 R udpctl_vars +ffffffff82a55000 R gre_usrreqs +ffffffff82a56000 r ipsec_ids_tree_RBT_INFO +ffffffff82a56018 R ipsec_ids_tree_RBT_TYPE +ffffffff82a56020 r ipsec_ids_flows_RBT_INFO +ffffffff82a56038 R ipsec_ids_flows_RBT_TYPE +ffffffff82a56040 R xformsw +ffffffff82a56158 R xformswNXFORMSW +ffffffff82a57000 R espctl_vars +ffffffff82a57050 R ahctl_vars +ffffffff82a57070 R ipcompctl_vars +ffffffff82a57090 R ipsecctl_vars +ffffffff82a58000 R ipseczeroes +ffffffff82a59000 r carp_set_state.carp_states +ffffffff82a5a000 r Rcon +ffffffff82a5b000 r Te2 +ffffffff82a5b400 r Te3 +ffffffff82a5b800 r Te0 +ffffffff82a5bc00 r Te1 +ffffffff82a5c000 r rcon +ffffffff82a5c030 r Td0 +ffffffff82a5c430 r Td1 +ffffffff82a5c830 r Td2 +ffffffff82a5cc30 r Td3 +ffffffff82a5d030 r Td4 +ffffffff82a5f000 r K256 +ffffffff82a5f100 r sha512_initial_hash_value +ffffffff82a5f140 r K512 +ffffffff82a5f3c0 r sha384_initial_hash_value +ffffffff82a60000 r Blowfish_initstate.initstate +ffffffff82a62000 r cast_sbox1 +ffffffff82a62400 r cast_sbox2 +ffffffff82a62800 r cast_sbox3 +ffffffff82a62c00 r cast_sbox4 +ffffffff82a63000 r cast_sbox5 +ffffffff82a63400 r cast_sbox6 +ffffffff82a63800 r cast_sbox7 +ffffffff82a63c00 r cast_sbox8 +ffffffff82a64000 r des_SPtrans +ffffffff82a65000 r des_skb +ffffffff82a65800 r odd_parity +ffffffff82a66000 R hmac_ipad_buffer +ffffffff82a66080 R hmac_opad_buffer +ffffffff82a67000 R enc_xform_3des +ffffffff82a67040 R enc_xform_blf +ffffffff82a67080 R enc_xform_cast5 +ffffffff82a670c0 R enc_xform_aes +ffffffff82a67100 R enc_xform_aes_ctr +ffffffff82a67140 R enc_xform_aes_gcm +ffffffff82a67180 R enc_xform_aes_gmac +ffffffff82a671c0 R enc_xform_aes_xts +ffffffff82a67200 R enc_xform_chacha20_poly1305 +ffffffff82a67240 R enc_xform_null +ffffffff82a67280 R auth_hash_hmac_md5_96 +ffffffff82a672c8 R auth_hash_hmac_sha1_96 +ffffffff82a67310 R auth_hash_hmac_ripemd_160_96 +ffffffff82a67358 R auth_hash_hmac_sha2_256_128 +ffffffff82a673a0 R auth_hash_hmac_sha2_384_192 +ffffffff82a673e8 R auth_hash_hmac_sha2_512_256 +ffffffff82a67430 R auth_hash_gmac_aes_128 +ffffffff82a67478 R auth_hash_gmac_aes_192 +ffffffff82a674c0 R auth_hash_gmac_aes_256 +ffffffff82a67508 R auth_hash_chacha20_poly1305 +ffffffff82a67550 R comp_algo_deflate +ffffffff82a68000 r IV +ffffffff82a69000 r idgen32_ftable +ffffffff82a6a000 r Chacha20_Poly1305_Update.zeroes +ffffffff82a6a010 r pad0 +ffffffff82a6b000 r null_point +ffffffff82a6b020 r base_point +ffffffff82a6c000 R mplsdomain +ffffffff82a6d000 R mplsctl_vars +ffffffff82a6e000 r nfs_nodetree_RBT_INFO +ffffffff82a6e018 R nfs_nodetree_RBT_TYPE +ffffffff82a6f000 r nfsread_filtops +ffffffff82a6f030 r nfswrite_filtops +ffffffff82a6f060 r nfsvnode_filtops +ffffffff82a70000 r nfs_ptimers +ffffffff82a71000 R nfsv2_type +ffffffff82a71030 R nfsv3_type +ffffffff82a71060 R nv2tov_type +ffffffff82a71080 R nv3tov_type +ffffffff82a710a0 R nfsv3_procid +ffffffff82a71100 R nfsv2_procid +ffffffff82a71160 r nfsrv_v3errmap +ffffffff82a71210 r nfsrv_v2errmap +ffffffff82a71256 r nfsv3err_null +ffffffff82a7125a r nfsv3err_getattr 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fragtbl124 +ffffffff82a76160 R fragtbl8 +ffffffff82a77000 R ffs_vfsops +ffffffff82a77070 R sbtry +ffffffff82a77080 R ffs_vars +ffffffff82a78000 R ffs_vops +ffffffff82a78110 R ffs_specvops +ffffffff82a78220 R ffs_fifovops +ffffffff82a79000 R mfs_vfsops +ffffffff82a7a000 R mfs_vops +ffffffff82a7b000 r quotatypes +ffffffff82a7c000 R ufsread_filtops +ffffffff82a7c030 R ufswrite_filtops +ffffffff82a7c060 R ufsvnode_filtops +ffffffff82a7e000 R ext2fs_vfsops +ffffffff82a7e070 r incompat +ffffffff82a7f000 R ext2fs_vops +ffffffff82a7f110 R ext2fs_specvops +ffffffff82a7f220 R ext2fs_fifovops +ffffffff82a80000 R uaddr_kernel_functions +ffffffff82a80030 R uaddr_rnd_functions +ffffffff82a80060 R uaddr_bestfit_functions +ffffffff82a80090 R uaddr_pivot_functions +ffffffff82a800c0 R uaddr_stack_brk_functions +ffffffff82a800f0 r uaddr_free_rbtree_RBT_INFO +ffffffff82a80108 R uaddr_free_rbtree_RBT_TYPE +ffffffff82a81000 R aobj_pager +ffffffff82a82000 R uvm_deviceops +ffffffff82a83000 R kv_any +ffffffff82a83018 R kv_intrsafe +ffffffff82a83030 R kv_page +ffffffff82a83048 R kp_dirty +ffffffff82a83070 R kp_dma +ffffffff82a83098 R kp_dma_contig +ffffffff82a830c0 R kp_dma_zero +ffffffff82a830e8 R kp_zero +ffffffff82a83110 R kp_pageable +ffffffff82a83138 R kp_none +ffffffff82a83160 R kd_waitok +ffffffff82a83178 R kd_nowait +ffffffff82a83190 R kd_trylock +ffffffff82a84000 R vmmapbsy +ffffffff82a84010 r page_flagbits +ffffffff82a840a8 r uvm_map_addr_RBT_INFO +ffffffff82a840c0 R uvm_map_addr_RBT_TYPE +ffffffff82a85000 R pmap_pager +ffffffff82a85048 R bufcache_pager +ffffffff82a86000 r uvm_objtree_RBT_INFO +ffffffff82a86018 R uvm_objtree_RBT_TYPE +ffffffff82a87000 r uvm_pmr_addr_RBT_INFO +ffffffff82a87018 R uvm_pmr_addr_RBT_TYPE +ffffffff82a87020 r uvm_pmr_size_RBT_INFO +ffffffff82a87038 R uvm_pmr_size_RBT_TYPE +ffffffff82a87040 r uvm_pmemrange_addr_RBT_INFO +ffffffff82a87058 R uvm_pmemrange_addr_RBT_TYPE +ffffffff82a88000 R uvm_vnodeops +ffffffff82a88048 r uvn_flush.interval +ffffffff82a89000 R zeroin6_addr +ffffffff82a8a000 R in6addr_any +ffffffff82a8a010 R in6addr_loopback +ffffffff82a8a020 R in6addr_intfacelocal_allnodes +ffffffff82a8a030 R in6addr_linklocal_allnodes +ffffffff82a8a040 R in6addr_linklocal_allrouters +ffffffff82a8a050 R in6mask0 +ffffffff82a8a060 R in6mask32 +ffffffff82a8a070 R in6mask64 +ffffffff82a8a080 R in6mask96 +ffffffff82a8a090 R in6mask128 +ffffffff82a8a0a0 R sa6_any +ffffffff82a8b000 R divert6ctl_vars +ffffffff82a8b030 R divert6_usrreqs +ffffffff82a8c000 R inet6domain +ffffffff82a8c050 R inet6sw +ffffffff82a8d000 R icmpv6ctl_vars +ffffffff82a8e000 R inet6ctlerrmap +ffffffff82a8e020 R ipv6ctl_vars +ffffffff82a8f000 R rip6_usrreqs +ffffffff82a90000 R pfkey_addr +ffffffff82a90010 R pfkeyv2_usrreqs +ffffffff82a900b8 R pfkeydomain +ffffffff82a90100 R pfkeysw +ffffffff82a90160 r ealgs +ffffffff82a90190 r aalgs +ffffffff82a901c0 r calgs +ffffffff82a91000 R sadb_exts_allowed_out +ffffffff82a91090 R sadb_exts_required_out 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+ffffffff82aa1142 R _jmpr13_len +ffffffff82aa3000 r cpurevs +ffffffff82aa316c r amd64_errata_set5 +ffffffff82aa316e r amd64_errata_set1 +ffffffff82aa3180 r amd64_errata_set8 +ffffffff82aa319f r amd64_errata_set6 +ffffffff82aa31a4 r amd64_errata_set7 +ffffffff82aa31ac r amd64_errata_set3 +ffffffff82aa31af r amd64_errata_set2 +ffffffff82aa31b8 r amd64_errata_set9 +ffffffff82aa4000 R ptp_masks +ffffffff82aa4020 R ptp_shifts +ffffffff82aa4030 R nkptpmax +ffffffff82aa4050 R nbpd +ffffffff82aa4070 R normal_pdes +ffffffff82aa5000 R trap_type +ffffffff82aa50b0 R trap_types +ffffffff82aa6000 r x86fpflags_to_siginfo.x86fp_siginfo_table +ffffffff82aa7000 R x86_soft_intr_to_ssir +ffffffff82aa9000 R Xexceptions +ffffffff82aa9100 r spl_lowered +ffffffff82aa912d R i8259_stubs +ffffffff82aa92ad R ioapic_edge_stubs +ffffffff82aa98ad R ioapic_level_stubs +ffffffff82aaa000 R _stac +ffffffff82aaa003 R _clac +ffffffff82aab000 R x86_bus_space_io_ops +ffffffff82aab130 R x86_bus_space_mem_ops +ffffffff82aac000 ? cpu_spinup_trampoline +ffffffff82aac0b6 R cpu_spinup_trampoline_end +ffffffff82aac0b6 R mp_tramp_data_start +ffffffff82aac0fc R mp_tramp_data_end +ffffffff82aae000 R db_acpi_cmds +ffffffff82aae0a0 R db_machine_command_table +ffffffff82aaf000 r i8254_delay.delaytab +ffffffff82ab0000 R rasops_cmap +ffffffff82ab1000 r reverse +ffffffff82ab1100 r ibm437_level1 +ffffffff82ab1230 r ibm437_level2_0 +ffffffff82ab1248 r ibm437_level2_1 +ffffffff82ab1260 r ibm437_level2_3 +ffffffff82ab1278 r ibm437_level2_32 +ffffffff82ab1290 r ibm437_level2_34 +ffffffff82ab12a8 r ibm437_level2_35 +ffffffff82ab12c0 r ibm437_level2_37 +ffffffff82ab12e0 r ibm437_chars_0 +ffffffff82ab13e0 r ibm437_chars_1 +ffffffff82ab13f0 r ibm437_chars_3 +ffffffff82ab1430 r ibm437_chars_32 +ffffffff82ab1460 r ibm437_chars_34 +ffffffff82ab14d0 r ibm437_chars_35 +ffffffff82ab14f0 r ibm437_chars_37 +ffffffff82ab2000 R mii_media_table +ffffffff82ab3000 R nsphy_ca +ffffffff82ab3028 R nsphy_funcs +ffffffff82ab3040 r nsphys +ffffffff82ab4000 R nsphyter_ca +ffffffff82ab4028 R nsphyter_funcs +ffffffff82ab4040 r nsphyterphys +ffffffff82ab5000 R gentbi_ca +ffffffff82ab5028 R gentbi_funcs +ffffffff82ab6000 R qsphy_ca +ffffffff82ab6028 R qsphy_funcs +ffffffff82ab6040 r qsphys +ffffffff82ab7000 R inphy_ca +ffffffff82ab7028 R inphy_funcs +ffffffff82ab7040 r inphys +ffffffff82ab8000 R iophy_ca +ffffffff82ab8028 R iophy_funcs +ffffffff82ab8040 r iophys +ffffffff82ab9000 R eephy_ca +ffffffff82ab9028 R eephy_funcs +ffffffff82ab9040 r eephys +ffffffff82aba000 R exphy_ca +ffffffff82aba028 R exphy_funcs +ffffffff82abb000 R rlphy_ca +ffffffff82abb028 R rlphy_funcs +ffffffff82abb040 r rlphys +ffffffff82abc000 R lxtphy_ca +ffffffff82abc028 R lxtphy_funcs +ffffffff82abc040 R lxtphy971_funcs +ffffffff82abc060 r lxtphys +ffffffff82abd000 R luphy_ca +ffffffff82abd028 R luphy_funcs +ffffffff82abd040 r luphys +ffffffff82abe000 R mtdphy_ca +ffffffff82abe028 R mtdphy_funcs +ffffffff82abe040 r mtdphys +ffffffff82abf000 R icsphy_ca +ffffffff82abf028 R icsphy_funcs +ffffffff82abf040 r icsphys +ffffffff82ac0000 R sqphy_ca +ffffffff82ac0028 R sqphy_funcs +ffffffff82ac0040 r sqphys +ffffffff82ac1000 R tqphy_ca +ffffffff82ac1028 R tqphy_funcs +ffffffff82ac1040 r tqphys +ffffffff82ac2000 R ukphy_ca +ffffffff82ac2028 R ukphy_funcs +ffffffff82ac3000 R dcphy_ca +ffffffff82ac3028 R dcphy_funcs +ffffffff82ac4000 R bmtphy_ca +ffffffff82ac4028 R bmtphy_funcs +ffffffff82ac4040 r bmtphys +ffffffff82ac5000 R brgphy_ca +ffffffff82ac5028 R brgphy_copper_funcs +ffffffff82ac5040 R brgphy_fiber_funcs +ffffffff82ac5058 R brgphy_5708s_funcs +ffffffff82ac5070 R brgphy_5709s_funcs +ffffffff82ac5090 r brgphys +ffffffff82ac5300 r brgphy_bcm5401_dspcode.dspcode +ffffffff82ac6000 R xmphy_ca +ffffffff82ac6028 R xmphy_funcs +ffffffff82ac6040 r xmphys +ffffffff82ac7000 R amphy_ca +ffffffff82ac7028 R amphy_funcs +ffffffff82ac7040 r amphys +ffffffff82ac8000 R acphy_ca +ffffffff82ac8028 R acphy_funcs +ffffffff82ac8040 r acphys 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ch_patterns +ffffffff82ad8000 R sd_ca +ffffffff82ad8030 R sd_patterns +ffffffff82ad9000 R st_quirk_patterns +ffffffff82ad9210 R st_ca +ffffffff82ad9240 R st_patterns +ffffffff82ada000 R uk_ca +ffffffff82adb000 R safte_ca +ffffffff82adc000 R ses_ca +ffffffff82add000 R sym_ca +ffffffff82add028 R sym_mpath_sym_ops +ffffffff82add048 R sym_mpath_asym_ops +ffffffff82ade000 R rdac_ca +ffffffff82ade028 R rdac_mpath_ops +ffffffff82adf000 R emc_ca +ffffffff82adf028 R emc_mpath_ops +ffffffff82ae0000 R hds_ca +ffffffff82ae0028 R hds_mpath_ops +ffffffff82ae1000 R atapiscsi_ca +ffffffff82ae1028 r atapiscsi_switch +ffffffff82ae2000 R wd_ca +ffffffff82ae3000 R atascsi_switch +ffffffff82ae4000 R mainbus_ca +ffffffff82ae5000 R bios_ca +ffffffff82ae6000 R mpbios_ca +ffffffff82ae6030 r loc_where +ffffffff82ae7000 R mpbios_icu_table +ffffffff82ae8000 R cpu_ca +ffffffff82ae9000 R lapic_timer_intrclock +ffffffff82aea000 R ioapic_ca +ffffffff82aeb000 R efifb_ca +ffffffff82aeb028 R efifb_screen_list +ffffffff82aec000 R pvbus_ca +ffffffff82aed000 R pvclock_ca +ffffffff82aee000 R vmt_ca +ffffffff82aef000 R xen_ca +ffffffff82af0000 R xs_errors +ffffffff82af1000 R xnf_ca +ffffffff82af2000 R xbf_ca +ffffffff82af2028 R xbf_switch +ffffffff82af3000 R hyperv_ca +ffffffff82af3028 R hv_guid_network +ffffffff82af3038 R hv_guid_ide +ffffffff82af3048 R hv_guid_scsi +ffffffff82af3058 R hv_guid_shutdown +ffffffff82af3068 R hv_guid_timesync +ffffffff82af3078 R hv_guid_heartbeat +ffffffff82af3088 R hv_guid_kvp +ffffffff82af4000 r kvp_pools +ffffffff82af5000 R hvn_ca +ffffffff82af6000 R hvs_ca +ffffffff82af6028 R hvs_switch +ffffffff82af7000 r virtio_device_name +ffffffff82af8000 R vio_ca +ffffffff82af8030 r virtio_net_feature_names +ffffffff82af9000 R vioblk_ca +ffffffff82af9028 R vioblk_switch +ffffffff82afa000 R viomb_ca +ffffffff82afa030 r viomb_feature_names +ffffffff82afb000 R viornd_ca +ffffffff82afc000 R vioscsi_ca +ffffffff82afc028 R vioscsi_switch +ffffffff82afc050 R vioscsi_vq_names +ffffffff82afd000 R vmmci_ca +ffffffff82afe000 R pci_ca +ffffffff82aff000 r pci_quirks +ffffffff82b00000 R pci_subclass_prehistoric +ffffffff82b00050 R pci_subclass_mass_storage +ffffffff82b00160 R pci_subclass_network +ffffffff82b00250 R pci_subclass_display +ffffffff82b002d0 R pci_subclass_multimedia +ffffffff82b00360 R pci_subclass_memory +ffffffff82b003c0 R pci_subclass_bridge +ffffffff82b00510 R pci_subclass_communications +ffffffff82b005d0 R pci_subclass_system +ffffffff82b006c0 R pci_subclass_input +ffffffff82b00770 R pci_subclass_dock +ffffffff82b007c0 R pci_subclass_processor +ffffffff82b00880 R pci_subclass_serialbus +ffffffff82b00990 R pci_subclass_wireless +ffffffff82b00a70 R pci_subclass_i2o +ffffffff82b00aa0 R pci_subclass_satcom +ffffffff82b00b20 R pci_subclass_crypto +ffffffff82b00b80 R pci_subclass_dasp +ffffffff82b00c10 R pci_class +ffffffff82b00e20 r pci_known_vendors +ffffffff82b02410 r pci_known_products +ffffffff82b26000 R vga_pci_ca +ffffffff82b26030 r vga_devs +ffffffff82b27000 R ahc_pci_ident_table +ffffffff82b275d0 R ahc_pci_ca +ffffffff82b28000 R ahd_pci_ident_table +ffffffff82b28198 R ahd_num_pci_devs +ffffffff82b281a0 R ahd_pci_ca +ffffffff82b281d0 r pci_bus_modes +ffffffff82b28210 r pci_status_strings +ffffffff82b28250 r pci_status_source +ffffffff82b28290 r split_status_strings +ffffffff82b29000 R adw_pci_ca +ffffffff82b29028 R adw_pci_devices +ffffffff82b2a000 r adw_3550_Default_EEPROM +ffffffff82b2a080 r adw_38C0800_Default_EEPROM +ffffffff82b2a100 r adw_38C1600_Default_EEPROM +ffffffff82b2b000 R adw_asc3550_mcode +ffffffff82b2c3a0 R adw_asc3550_mcode_data +ffffffff82b2c3b0 R adw_asc38C0800_mcode +ffffffff82b2d888 R adw_asc38C0800_mcode_data +ffffffff82b2d8a0 R adw_asc38C1600_mcode +ffffffff82b2f160 R adw_asc38C1600_mcode_data +ffffffff82b30000 R twe_pci_ca +ffffffff82b30028 R twe_pci_devices +ffffffff82b31000 R arc_ca +ffffffff82b31028 R arc_switch +ffffffff82b31050 r arc_devices +ffffffff82b31190 r arc_intel +ffffffff82b31198 r arc_marvell +ffffffff82b311a0 r arc_lsi +ffffffff82b311a8 r arc_marvell2 +ffffffff82b32000 R jmb_ca +ffffffff82b32030 r jmb_devices +ffffffff82b33000 R ahci_pci_ca +ffffffff82b33028 R ahci_jmb_ca +ffffffff82b33050 r ahci_devices +ffffffff82b34000 R nvme_pci_ca +ffffffff82b34028 r nvme_msi_blacklist +ffffffff82b35000 R ami_pci_ca +ffffffff82b35030 r ami_pci_subsys +ffffffff82b35270 r ami_pci_vendors +ffffffff82b36000 R mfi_pci_ca +ffffffff82b36030 r mfi_pci_devices +ffffffff82b37000 R mfii_ca +ffffffff82b37028 R mfii_switch +ffffffff82b37050 R mfii_pd_switch +ffffffff82b37078 R mfii_iop_thunderbolt +ffffffff82b37088 R mfii_iop_25 +ffffffff82b37098 R mfii_iop_35 +ffffffff82b370b0 R mfii_devices +ffffffff82b37180 r mfi_bbu_indicators +ffffffff82b38000 R ips_ca +ffffffff82b38028 r ips_ids +ffffffff82b38040 r ips_chips +ffffffff82b38090 r ips_names +ffffffff82b38128 r ips_switch +ffffffff82b38150 r ips_pt_switch +ffffffff82b39000 R eap_ca +ffffffff82b39028 R eap1370_hw_if +ffffffff82b390e0 R eap1371_hw_if +ffffffff82b39198 R eap_midi_hw_if +ffffffff82b391d0 R eap_devices +ffffffff82b3a000 R auacer_pci_devices +ffffffff82b3a008 R auacer_ca +ffffffff82b3a030 R auacer_hw_if +ffffffff82b3b000 R auich_ca +ffffffff82b3b028 R auich_hw_if +ffffffff82b3b0e0 r auich_devices +ffffffff82b3c000 R azalia_ca +ffffffff82b3c028 R azalia_hw_if +ffffffff82b3c0e0 R azalia_pci_devices +ffffffff82b3c120 r pin_devices +ffffffff82b3c1a0 r line_colors +ffffffff82b3c220 r wtypes +ffffffff82b3d000 r azalia_codec_init_dolby_atmos.atmos_init +ffffffff82b3d050 r azalia_codec_init_dolby_atmos.atmos_v23_v25 +ffffffff82b3e000 R envy_ca +ffffffff82b3e028 R envy_hw_if +ffffffff82b3e0e0 R envy_midi_hw_if +ffffffff82b3f000 R emuxki_devices +ffffffff82b3f010 R emu_ca +ffffffff82b3f038 R emuxki_hw_if +ffffffff82b3f0f0 r emuxki_recbuf_sz +ffffffff82b3f170 r emuxki_recsrc_szreg +ffffffff82b3f17c r emuxki_recsrc_bufaddrreg +ffffffff82b3f190 r emuxki_rate_to_pitch.logMagTable +ffffffff82b3f390 r emuxki_rate_to_pitch.logSlopeTable +ffffffff82b40000 R auixp_pci_devices +ffffffff82b40010 R auixp_ca +ffffffff82b40038 R auixp_hw_if +ffffffff82b41000 R clcs_ca +ffffffff82b41028 R cs4280_hw_if +ffffffff82b410e0 R cs4280_devices +ffffffff82b42000 R yds_ca +ffffffff82b42028 r yds_hw_if +ffffffff82b420e0 r yds_chip_capability_list +ffffffff82b42120 r yds_get_lpfk.lpfkt +ffffffff82b42160 r yds_get_lpfq.lpfqt +ffffffff82b43000 R auvia_ca +ffffffff82b43028 R auvia_hw_if +ffffffff82b430e0 R auvia_devices +ffffffff82b430f0 r auvia_set_params_sub.slottab +ffffffff82b44000 R gdt_pci_ca +ffffffff82b45000 R ciss_pci_ca +ffffffff82b45030 R ciss_pci_devices +ffffffff82b46000 R qlw_pci_ca +ffffffff82b46030 r qlw_devices +ffffffff82b46050 r isp_1040_risc_code +ffffffff82b4b9f0 r isp_1080_risc_code +ffffffff82b53470 r isp_12160_risc_code +ffffffff82b5b000 R qla_pci_ca +ffffffff82b5b030 r qla_devices +ffffffff82b5c000 R qle_ca +ffffffff82b5c028 R qle_switch +ffffffff82b5c050 r qle_devices +ffffffff82b5c070 r isp_2400_risc_code +ffffffff82b8ba50 r isp_2500_risc_code +ffffffff82bbe000 R mpi_pci_ca +ffffffff82bbe030 r mpi_devices +ffffffff82bbf000 R mpii_ca +ffffffff82bbf028 R mpii_switch +ffffffff82bbf050 r mpii_devices +ffffffff82bc0000 R sili_pci_ca +ffffffff82bc0030 r sili_devices +ffffffff82bc1000 R aq_devices +ffffffff82bc1060 R aq_products +ffffffff82bc11d0 R aq_fw1x_ops +ffffffff82bc11f8 R aq_fw2x_ops +ffffffff82bc1220 R aq2_fw_ops +ffffffff82bc1248 R aq_ca +ffffffff82bc2000 R de_ca +ffffffff82bc2030 r tulip_srom_conninfo +ffffffff82bc2120 r tulip_mii_phy_attrlist +ffffffff82bc21e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff82bc2208 r tulip_21040_10baset_only_boardsw +ffffffff82bc2230 r tulip_21040_boardsw +ffffffff82bc2258 r tulip_2114x_isv_boardsw +ffffffff82bc2280 r tulip_21140_smc9332_boardsw +ffffffff82bc22a8 r tulip_21040_auibnc_only_boardsw +ffffffff82bc22d0 r tulip_21140_cogent_em100_boardsw +ffffffff82bc22f8 r tulip_21140_accton_boardsw +ffffffff82bc2320 r tulip_21140_eb_boardsw +ffffffff82bc2348 r tulip_21041_boardsw +ffffffff82bc2370 r tulip_read_macaddr.testpat +ffffffff82bc2380 r tulip_vendors +ffffffff82bc2430 r tulip_media_to_ifmedia +ffffffff82bc2490 r tulip_chipdescs +ffffffff82bc3000 R ep_pci_ca +ffffffff82bc3030 R ep_pci_devices +ffffffff82bc4000 R pcn_ca +ffffffff82bc4028 R pcn_devices +ffffffff82bc4030 r pcn_79c970_rcvfw +ffffffff82bc4050 r pcn_79c970_xmtsp +ffffffff82bc4070 r pcn_79c970_xmtfw +ffffffff82bc4090 r pcn_79c971_rcvfw +ffffffff82bc40b0 r pcn_79c971_xmtsp_sram +ffffffff82bc40d0 r pcn_79c971_xmtsp +ffffffff82bc40f0 r pcn_79c971_xmtfw +ffffffff82bc4110 r pcn_variants +ffffffff82bc5000 R siop_products +ffffffff82bc6000 R siop_pci_ca +ffffffff82bc7000 R rdcide_setup +ffffffff82bc7005 R rdcide_hold +ffffffff82bc700a R rdcide_udmatim +ffffffff82bc7010 R rdcide_udmaclk +ffffffff82bc7028 R default_product_desc +ffffffff82bc7040 R pciide_intel_products +ffffffff82bc7630 R pciide_amd_products +ffffffff82bc7690 R pciide_cmd_products +ffffffff82bc7730 R pciide_via_products +ffffffff82bc7810 R pciide_cypress_products +ffffffff82bc7820 R pciide_sis_products +ffffffff82bc7870 R pciide_natsemi_products +ffffffff82bc7890 R pciide_acer_products +ffffffff82bc78a0 R pciide_triones_products +ffffffff82bc78f0 R pciide_promise_products +ffffffff82bc7ac0 R pciide_acard_products +ffffffff82bc7b10 R pciide_serverworks_products +ffffffff82bc7bb0 R pciide_nvidia_products +ffffffff82bc7e80 R pciide_ite_products +ffffffff82bc7ea0 R pciide_ati_products +ffffffff82bc7f20 R pciide_jmicron_products +ffffffff82bc7f70 R pciide_phison_products +ffffffff82bc7f80 R pciide_rdc_products +ffffffff82bc7f90 R pciide_vendors +ffffffff82bc8140 R pciide_pci_ca +ffffffff82bc8168 R pciide_jmb_ca +ffffffff82bc8190 r piix_isp_dma +ffffffff82bc8193 r piix_rtc_dma +ffffffff82bc8196 r apollo_pio_set +ffffffff82bc819b r cmd0643_9_data_tim_pio +ffffffff82bc81a0 r cmd0643_9_data_tim_dma +ffffffff82bc81a3 r cmd680_channel_map.init_val +ffffffff82bc81b1 r cmd680_setup_channel.udma2_tbl +ffffffff82bc81b8 r cmd680_setup_channel.dma_tbl +ffffffff82bc81be r cmd680_setup_channel.pio_tbl +ffffffff82bc81d0 r satalink_ba5_regmap +ffffffff82bc8690 r sii3114_chansetup.channel_names +ffffffff82bc86b0 r cy_pio_pulse +ffffffff82bc86c0 r sis_udma133new_tim +ffffffff82bc86e0 r sis_pio133new_tim +ffffffff82bc86f4 r sis_dma133new_tim +ffffffff82bc8700 r sis_udma66_tim +ffffffff82bc8706 r sis_udma100new_tim +ffffffff82bc870c r sis_udma133old_tim +ffffffff82bc8713 r sis_pio_act +ffffffff82bc8718 r sis_pio_rec +ffffffff82bc871d r natsemi_pio_pulse +ffffffff82bc8722 r natsemi_pio_recover +ffffffff82bc8727 r natsemi_dma_pulse +ffffffff82bc872a r natsemi_dma_recover +ffffffff82bc8730 r scx200_udma33 +ffffffff82bc873c r scx200_dma33 +ffffffff82bc8750 r scx200_pio33 +ffffffff82bc8778 r acer_udma +ffffffff82bc877e r acer_pio +ffffffff82bc8790 r hpt370_pio +ffffffff82bc87a4 r hpt370_dma +ffffffff82bc87b0 r hpt370_udma +ffffffff82bc87d0 r hpt372_pio +ffffffff82bc87e4 r hpt372_dma +ffffffff82bc87f0 r hpt372_udma +ffffffff82bc880c r hpt366_dma +ffffffff82bc8820 r hpt366_udma +ffffffff82bc8840 r hpt374_pio +ffffffff82bc8854 r hpt374_dma +ffffffff82bc8860 r hpt374_udma +ffffffff82bc887c r pdc2xx_pa +ffffffff82bc8881 r pdc2xx_pb +ffffffff82bc8886 r pdc2xx_dma_mb +ffffffff82bc8889 r pdc2xx_dma_mc +ffffffff82bc888c r pdc2xx_udma_mc +ffffffff82bc8892 r acard_act_udma +ffffffff82bc8899 r acard_rec_udma +ffffffff82bc88a0 r acard_udma_conf +ffffffff82bc88a7 r acard_act_dma +ffffffff82bc88aa r acard_rec_dma +ffffffff82bc88ad r acard_act_pio +ffffffff82bc88b2 r acard_rec_pio +ffffffff82bc88b7 r nforce_udma +ffffffff82bc88be r nforce_pio +ffffffff82bc88c3 r ixp_mdma_timings +ffffffff82bc88c6 r ixp_pio_timings +ffffffff82bc9000 R ppb_ca +ffffffff82bca000 R cy_pci_ca +ffffffff82bca030 R cy_pci_devices +ffffffff82bcb000 R rl_pci_ca +ffffffff82bcb030 R rl_pci_devices +ffffffff82bcc000 R re_pci_devices +ffffffff82bcc030 R re_pci_ca +ffffffff82bcd000 R vr_ca +ffffffff82bce000 R txp_ca +ffffffff82bce030 R txp_devices +ffffffff82bcf000 r cards +ffffffff82bd0000 r format_params +ffffffff82bd01a0 r pixfmt_table +ffffffff82bd0320 r meteor_pixfmt_table +ffffffff82bd1000 R bktr_ca +ffffffff82bd1028 R bktr_hw_if +ffffffff82bd2000 r tuners +ffffffff82bd2170 r freqTable +ffffffff82bd2260 r nabcst +ffffffff82bd22a0 r irccable +ffffffff82bd2310 r hrccable +ffffffff82bd2380 r weurope +ffffffff82bd2420 r jpnbcst +ffffffff82bd2460 r jpncable +ffffffff82bd24c0 r xussr +ffffffff82bd2530 r australia +ffffffff82bd2590 r france +ffffffff82bd3000 R xl_pci_ca +ffffffff82bd3030 R xl_pci_devices +ffffffff82bd4000 R fxp_pci_ca +ffffffff82bd4030 R fxp_pci_devices +ffffffff82bd5000 R em_devices +ffffffff82bd5308 R em_ca +ffffffff82bd5330 r em_counters +ffffffff82bd6000 r em_igp_cable_length_table +ffffffff82bd6100 r em_igp_2_cable_length_table +ffffffff82bd7000 R ixgb_devices +ffffffff82bd7010 R ixgb_ca +ffffffff82bd8000 R ixgbe_devices +ffffffff82bd80b8 R ix_ca +ffffffff82bd80e0 r ix_counters +ffffffff82bd83e0 r ix_rxq_kstats_tpl +ffffffff82bd8458 r ix_txq_kstats_tpl +ffffffff82bd9000 r ixgbe_mvals_base +ffffffff82bd9060 r ixgbe_mvals_X540 +ffffffff82bd90c0 r ixgbe_mvals_X550 +ffffffff82bd9120 r ixgbe_mvals_X550EM_x +ffffffff82bd9180 r ixgbe_mvals_X550EM_a +ffffffff82bdc000 R ixl_ca +ffffffff82bdc030 R ixl_port_counters +ffffffff82bdc2c0 R ixl_vsi_counters +ffffffff82bdc380 r ixl_devices +ffffffff82bdc4c0 r ixl_710 +ffffffff82bdc4e8 r ixl_722 +ffffffff82bdc510 r ixl_pf_aq_regs +ffffffff82bdc578 r ixl_710_decrepit +ffffffff82bdc5a0 r ixl_phy_type_map +ffffffff82bdc770 r ixl_speed_type_map +ffffffff82bdc7b0 r ixl_hmc_pack_rxq +ffffffff82bdc830 r ixl_hmc_pack_txq +ffffffff82bdc8a0 r ixl_sfp_ops +ffffffff82bdc8b8 r ixl_qsfp_ops +ffffffff82bdd000 r dwqe_pci_devices +ffffffff82bdd018 R dwqe_pci_ca +ffffffff82bde000 R xge_ca +ffffffff82bde028 R xge_devices +ffffffff82bde030 r xge_fix_mac +ffffffff82bde110 r xge_xena_dtx_cfg +ffffffff82bde170 r xge_herc_dtx_cfg +ffffffff82bdf000 R thtc_ca +ffffffff82bdf028 R tht_ca +ffffffff82bdf050 r thtc_devices +ffffffff82bdf068 r tht_link_state.interval +ffffffff82be0000 R myx_ca +ffffffff82be0028 R myx_devices +ffffffff82be1000 R oce_ca +ffffffff82be1030 R oce_devices +ffffffff82be2000 R dc_pci_ca +ffffffff82be3000 R epic_pci_ca +ffffffff82be3028 R epic_pci_devices +ffffffff82be4000 R ti_pci_ca +ffffffff82be4030 R ti_devices +ffffffff82be5000 R ne_pci_ca +ffffffff82be5030 R ne_pci_prod +ffffffff82be6000 R gem_pci_ca +ffffffff82be6030 R gem_pci_devices +ffffffff82be6050 r gem_promhdr +ffffffff82be6052 r gem_promdat +ffffffff82be605a r gem_promdat2 +ffffffff82be7000 R cas_ca +ffffffff82be7028 R cas_pci_devices +ffffffff82be7030 r cas_promhdr +ffffffff82be7032 r cas_promdat_sun +ffffffff82be703a r cas_promdat_ns +ffffffff82be7042 r cas_promdat2 +ffffffff82be8000 R sf_pci_ca +ffffffff82be8028 R sf_pci_products +ffffffff82be9000 R sis_ca +ffffffff82be9028 R sis_devices +ffffffff82bea000 R se_devices +ffffffff82bea008 R se_ca +ffffffff82beb000 R mbg_ca +ffffffff82beb030 R mbg_devices +ffffffff82bec000 R uhci_pci_ca +ffffffff82bed000 R ohci_pci_ca +ffffffff82bee000 R ehci_pci_ca +ffffffff82bef000 R xhci_pci_ca +ffffffff82bf0000 R cbb_pci_ca +ffffffff82bf0028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff82bf1000 R skc_devices +ffffffff82bf1030 R skc_ca +ffffffff82bf1058 R sk_ca +ffffffff82bf2000 R mskc_devices +ffffffff82bf20a8 R mskc_ca +ffffffff82bf20d0 R msk_ca +ffffffff82bf2100 r msk_mib +ffffffff82bf3000 R puc_pci_ca +ffffffff82bf4000 R puc_devs +ffffffff82bf9000 R com_puc_ca +ffffffff82bf9030 r puc_port_types +ffffffff82bfa000 R lpt_puc_ca +ffffffff82bfb000 R wi_pci_ca +ffffffff82bfb030 r wi_pci_products +ffffffff82bfc000 R an_pci_ca +ffffffff82bfc030 R an_pci_devices +ffffffff82bfd000 R iwi_devices +ffffffff82bfd010 R iwi_ca +ffffffff82bfe000 R wpi_ca +ffffffff82bfe028 r wpi_devices +ffffffff82bfe030 r wpi_rates +ffffffff82bfe050 r wpi_rf_gain_5ghz +ffffffff82bfe0a0 r wpi_dsp_gain_5ghz +ffffffff82bfe0f0 r wpi_rf_gain_2ghz +ffffffff82bfe140 r wpi_dsp_gain_2ghz +ffffffff82bfe190 r wpi_pmgt +ffffffff82bfe310 r wpi_bands +ffffffff82bff000 R iwn_mcs2ridx +ffffffff82bff020 R iwn_ca +ffffffff82bff050 r iwn_devices +ffffffff82bff0e8 r iwn4965_sensitivity_limits +ffffffff82bff124 r iwn5000_sensitivity_limits +ffffffff82bff160 r iwn5150_sensitivity_limits +ffffffff82bff19c r iwn1000_sensitivity_limits +ffffffff82bff1d8 r iwn6000_sensitivity_limits +ffffffff82bff214 r iwn2000_sensitivity_limits +ffffffff82bff250 r iwn_fw_errmsg +ffffffff82bff340 r iwn4965_set_txpower.tdiv +ffffffff82bff360 r iwn4965_rf_gain_5ghz +ffffffff82bff3d0 r iwn4965_dsp_gain_5ghz +ffffffff82bff440 r iwn4965_dsp_gain_2ghz +ffffffff82bff4b0 r iwn_pmgt +ffffffff82bff6f0 r iwn4965_post_alive.qid2fifo +ffffffff82bff700 r iwn_bands +ffffffff82bff770 r iwn_rates +ffffffff82bff820 r iwn4965_rf_gain_2ghz +ffffffff82c00000 R iwm_nvm_channels +ffffffff82c00030 R iwm_nvm_channels_8000 +ffffffff82c00070 R iwm_rates +ffffffff82c000d0 R iwm_ht_mcs2ridx +ffffffff82c00110 R iwm_tid_to_ac +ffffffff82c00118 R iwm_ac_to_tx_fifo +ffffffff82c00120 R iwm_nvm_to_read +ffffffff82c00144 r iwm_set_hw_address_8000.reserved_mac +ffffffff82c00180 r iwm_sf_full_timeout +ffffffff82c001b0 r iwm_sf_full_timeout_def +ffffffff82c001e0 r advanced_lookup +ffffffff82c00320 r iwm_devices +ffffffff82c00360 R iwm_ca +ffffffff82c01000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff82c01020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff82c01040 R iwx_qu_b0_hr1_b0 +ffffffff82c01060 R iwx_qu_b0_hr_b0 +ffffffff82c01080 R iwx_ax201_cfg_qu_hr +ffffffff82c010a0 R iwx_qu_c0_hr1_b0 +ffffffff82c010c0 R iwx_qu_c0_hr_b0 +ffffffff82c010e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff82c01100 R iwx_quz_a0_hr1_b0 +ffffffff82c01120 R iwx_ax201_cfg_quz_hr +ffffffff82c01140 R iwx_cfg_so_a0_hr_b0 +ffffffff82c01160 R iwx_cfg_quz_a0_hr_b0 +ffffffff82c01180 R iwx_2ax_cfg_so_gf_a0 +ffffffff82c011a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff82c011c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff82c011e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff82c01200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff82c01220 R iwx_2ax_cfg_so_jf_b0 +ffffffff82c01240 R iwx_nvm_channels_8000 +ffffffff82c01280 R iwx_rates +ffffffff82c012e0 R iwx_mcs2ridx +ffffffff82c01320 R iwx_tid_to_ac +ffffffff82c01328 R iwx_ac_to_tx_fifo +ffffffff82c01330 r iwx_nvm_channels_uhb +ffffffff82c0139e r iwx_is_valid_mac_addr.reserved_mac +ffffffff82c013b0 r iwx_sf_full_timeout +ffffffff82c013e0 r iwx_sf_full_timeout_def +ffffffff82c01410 r advanced_lookup +ffffffff82c01550 r iwx_devices +ffffffff82c01590 r iwx_dev_info_table +ffffffff82c01e18 R iwx_ca +ffffffff82c02000 R qwx_pci_ca +ffffffff82c02028 r qwx_pci_devices +ffffffff82c02030 R qwx_msi_config_one_msi +ffffffff82c02050 R qwx_msi_config +ffffffff82c020c8 r qwx_pci_ops_qca6390 +ffffffff82c020f8 r qwx_pci_ops_qcn9074 +ffffffff82c03000 R cmpci_ca +ffffffff82c03028 R cmpci_hw_if +ffffffff82c030e0 r cmpci_rate_table +ffffffff82c03120 R cmpci_devices +ffffffff82c03130 r cmpci_query_devinfo.mixer_port_names +ffffffff82c03160 r cmpci_query_devinfo.mixer_classes +ffffffff82c04000 R iha_pci_ca +ffffffff82c04028 R iha_switch +ffffffff82c05000 R pcscp_ca +ffffffff82c06000 R bge_ca +ffffffff82c06030 R bge_devices +ffffffff82c061b0 r bge_revisions +ffffffff82c06610 r bge_majorrevs +ffffffff82c06790 r bge_kstat_tpl +ffffffff82c07000 R bnx_devices +ffffffff82c07020 R bnx_ca +ffffffff82c08000 R vge_ca +ffffffff82c08028 R vge_devices +ffffffff82c09000 R stge_ca +ffffffff82c09028 R stge_mii_bitbang_ops +ffffffff82c09050 R stge_devices +ffffffff82c0a000 R nfe_ca +ffffffff82c0a030 R nfe_devices +ffffffff82c0b000 R et_devices +ffffffff82c0b008 R et_ca +ffffffff82c0c000 R jme_devices +ffffffff82c0c008 R jme_ca +ffffffff82c0d000 R age_devices +ffffffff82c0d008 R age_ca +ffffffff82c0e000 R alc_devices +ffffffff82c0e038 R alc_ca +ffffffff82c0f000 R ale_devices +ffffffff82c0f008 R ale_ca +ffffffff82c10000 R amdpm_ca +ffffffff82c10030 R amdpm_ids +ffffffff82c11000 R bce_ca +ffffffff82c11028 R bce_devices +ffffffff82c12000 R ath_pci_ca +ffffffff82c13000 R athn_pci_ca +ffffffff82c13030 r athn_pci_devices +ffffffff82c14000 R atw_pci_ca +ffffffff82c14028 R atw_pci_devices +ffffffff82c15000 R rtw_pci_ca +ffffffff82c15030 R rtw_pci_products +ffffffff82c16000 R rtwn_pci_ca +ffffffff82c16030 r rtwn_pci_devices +ffffffff82c16040 r rtl8188eu_mac +ffffffff82c161b0 r rtl8192cu_mac +ffffffff82c16310 r rtl8192ce_mac +ffffffff82c16458 r rtl8188eu_bb_prog +ffffffff82c16480 r rtl8723a_bb_prog +ffffffff82c164a8 r rtl8192ce_bb_prog_1t +ffffffff82c164d0 r rtl8192ce_bb_prog_2t +ffffffff82c16500 r rtl8188eu_bb_regs +ffffffff82c16680 r rtl8188eu_bb_vals +ffffffff82c16980 r rtl8188eu_agc_vals +ffffffff82c16b80 r rtl8723a_bb_regs +ffffffff82c16d00 r rtl8723a_bb_vals +ffffffff82c16ff0 r rtl8192ce_agc_vals +ffffffff82c17270 r rtl8192ce_bb_regs +ffffffff82c173f0 r rtl8192ce_bb_vals_1t +ffffffff82c176e0 r rtl8192ce_bb_vals_2t +ffffffff82c18000 R ral_pci_ca +ffffffff82c18030 R ral_pci_devices +ffffffff82c19000 R acx_pci_ca +ffffffff82c19028 R acx_pci_devices +ffffffff82c1a000 R pgt_pci_ca +ffffffff82c1a028 R pgt_pci_devices +ffffffff82c1b000 R malo_pci_ca +ffffffff82c1b028 R malo_pci_devices +ffffffff82c1c000 R bwi_pci_ca +ffffffff82c1c030 R bwi_pci_devices +ffffffff82c1d000 R piixpm_ca +ffffffff82c1d030 R piixpm_ids +ffffffff82c1e000 R vic_ca +ffffffff82c1e028 R vic_devices +ffffffff82c1f000 R vmx_devices +ffffffff82c1f008 R vmx_ca +ffffffff82c1f030 r vmx_tx_kstat_tpl +ffffffff82c1f0d0 r vmx_kstat_rate +ffffffff82c1f0e0 r vmx_rx_kstat_tpl +ffffffff82c20000 R vmwpvs_ca +ffffffff82c20028 R vmwpvs_switch +ffffffff82c21000 R lii_ca +ffffffff82c21028 R lii_devices +ffffffff82c22000 R ichiic_ca +ffffffff82c22030 R ichiic_ids +ffffffff82c23000 R viapm_ca +ffffffff82c23030 R viapm_ids +ffffffff82c23070 r val_to_temp +ffffffff82c23870 r val_to_uV.mult +ffffffff82c24000 R amdiic_ca +ffffffff82c24028 R amdiic_ids +ffffffff82c25000 R nviic_ca +ffffffff82c25030 R nviic_ids +ffffffff82c26000 R sdhc_pci_ca +ffffffff82c27000 R kate_ca +ffffffff82c27030 r kate_proc +ffffffff82c28000 R km_ca +ffffffff82c28030 r km_devices +ffffffff82c29000 R ksmn_ca +ffffffff82c29030 r ksmn_devices +ffffffff82c2a000 R iosf_pci_ca +ffffffff82c2b000 R itherm_devices +ffffffff82c2b008 R itherm_ca +ffffffff82c2c000 R pchtemp_ca +ffffffff82c2c030 R pchtemp_devices +ffffffff82c2d000 R rtsx_pci_ca +ffffffff82c2e000 R xspd_ca +ffffffff82c2e028 R xspd_devices +ffffffff82c2f000 R virtio_pci_ca +ffffffff82c30000 R dwiic_pci_ca +ffffffff82c30030 R dwiic_pci_ids +ffffffff82c31000 R bwfm_pci_ca +ffffffff82c31030 r bwfm_pci_devices +ffffffff82c32000 R ccp_pci_ca +ffffffff82c32030 r ccp_pci_devices +ffffffff82c33000 R bnxt_devices +ffffffff82c33040 R bnxt_ca +ffffffff82c34000 R mcx_ca +ffffffff82c34030 r mcx_devices +ffffffff82c34060 r mcx_rss_config +ffffffff82c340d0 r mcx_eth_cap_map +ffffffff82c342d0 r mcx_ext_eth_cap_map +ffffffff82c343d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff82c343e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82c34400 r mcx_kstat_ppcnt_rfc2819 +ffffffff82c34418 r mcx_kstat_ppcnt_rfc3635 +ffffffff82c34430 r mcx_ppcnt_ieee8023_tpl +ffffffff82c345b0 r mcx_ppcnt_rfc2863_tpl +ffffffff82c346c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82c34870 r mcx_ppcnt_rfc3635_tpl +ffffffff82c349b0 r mcx_kstat_mtmp_tpl +ffffffff82c34a50 r mcx_kstat_mtmp_rate +ffffffff82c34a60 r mcx_queue_kstat_tpl +ffffffff82c35000 R iavf_ca +ffffffff82c35030 r iavf_devices +ffffffff82c35040 r iavf_aq_regs +ffffffff82c350b0 r iavf_link_speeds +ffffffff82c36000 R rge_ca +ffffffff82c36028 R rge_devices +ffffffff82c36040 r rge_phy_config_mac_cfg2_8126.mac_cfg2_a438_value +ffffffff82c36070 r rge_phy_config_mac_cfg2_8126.mac_cfg2_b87e_value +ffffffff82c360c0 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff82c360e0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff82c36140 r rtl8125_mac_cfg3_mcu +ffffffff82c369e0 r rtl8125_mac_cfg5_mcu +ffffffff82c37a00 r rtl8126_mac_cfg2_mcu +ffffffff82c3ea20 r rtl8125_mac_bps +ffffffff82c3ee20 r rtl8125b_mac_bps +ffffffff82c3f048 r rge_kstats_tpl +ffffffff82c40000 R igc_devices +ffffffff82c40040 R igc_ca +ffffffff82c40070 r igc_counters +ffffffff82c41000 R ngbe_devices +ffffffff82c41008 R ngbe_ca +ffffffff82c42000 R com_pci_ca +ffffffff82c42030 R com_pci_ids +ffffffff82c43000 R ufshci_pci_ca +ffffffff82c44000 r agp_attach.agp_max +ffffffff82c44048 R agp_ca +ffffffff82c45000 R intagp_ca +ffffffff82c46000 r drm_plane_create_rotation_property.props +ffffffff82c47000 r drm_bridge_priv_state_funcs +ffffffff82c49000 r color_encoding_name +ffffffff82c49020 r color_range_name +ffffffff82c4a000 r drm_subpixel_enum_list +ffffffff82c4a060 r drm_dpms_enum_list +ffffffff82c4a0a0 r drm_dvi_i_select_enum_list +ffffffff82c4a0d0 r drm_dvi_i_subconnector_enum_list +ffffffff82c4a100 r drm_tv_mode_enum_list +ffffffff82c4a170 r drm_tv_select_enum_list +ffffffff82c4a1c0 r drm_tv_subconnector_enum_list +ffffffff82c4a210 r drm_dp_subconnector_enum_list +ffffffff82c4a280 r colorspace_names +ffffffff82c4a300 r drm_link_status_enum_list +ffffffff82c4a320 r drm_scaling_mode_enum_list +ffffffff82c4a360 r drm_aspect_ratio_enum_list +ffffffff82c4a390 r drm_content_type_enum_list +ffffffff82c4a3e0 r drm_panel_orientation_enum_list +ffffffff82c4a420 r privacy_screen_enum +ffffffff82c4b000 r drm_crtc_fence_ops +ffffffff82c4c000 r drm_dmt_modes +ffffffff82c4e940 r edid_cea_modes_1 +ffffffff82c524d0 r edid_cea_modes_193 +ffffffff82c53180 r edid_quirk_list +ffffffff82c53360 r drm_mode_do_interlace_quirk.cea_interlaced +ffffffff82c533a0 r edid_4k_modes +ffffffff82c53600 r edid_est_modes +ffffffff82c53e00 r est3_modes +ffffffff82c53f60 r stereo_mandatory_modes +ffffffff82c53fe0 r extra_modes +ffffffff82c55000 r drm_encoder_enum_list +ffffffff82c57000 r drm_fbdev_dma_helper_funcs +ffffffff82c57010 r drm_fbdev_dma_client_funcs +ffffffff82c57030 r drm_fbdev_dma_fb_ops +ffffffff82c58000 r drm_fbdev_generic_helper_funcs +ffffffff82c58010 r drm_fbdev_generic_client_funcs +ffffffff82c58030 r drm_fbdev_generic_fb_ops +ffffffff82c5a000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82c5a004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82c5a008 r drm_fb_xrgb8888_to_xrgb1555.dst_pixsize +ffffffff82c5a00c r drm_fb_xrgb8888_to_argb1555.dst_pixsize +ffffffff82c5a010 r drm_fb_xrgb8888_to_rgba5551.dst_pixsize +ffffffff82c5a014 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff82c5a018 r drm_fb_xrgb8888_to_argb8888.dst_pixsize +ffffffff82c5a01c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82c5a020 r drm_fb_xrgb8888_to_argb2101010.dst_pixsize +ffffffff82c5a024 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82c5a028 r drm_fb_xrgb8888_to_xbgr8888.dst_pixsize +ffffffff82c5a02c r drm_fb_xrgb8888_to_abgr8888.dst_pixsize +ffffffff82c5b000 r __drm_format_info.formats +ffffffff82c5c000 R drm_pgops +ffffffff82c5d000 r drm_gem_dma_default_funcs +ffffffff82c5e000 R drm_gem_fb_funcs +ffffffff82c5f000 r drm_ioctls +ffffffff82c61000 r dma_fence_stub_ops +ffffffff82c61040 R dma_fence_array_ops +ffffffff82c61080 R dma_fence_chain_ops +ffffffff82c610c0 R dmabufops +ffffffff82c610f8 R syncfileops +ffffffff82c62000 r drm_plane_type_enum_list +ffffffff82c63000 r tv_modes_parameters +ffffffff82c630c0 r drm_mode_status_names +ffffffff82c63200 r drm_named_modes +ffffffff82c64000 r primary_plane_funcs +ffffffff82c64068 r safe_modeset_formats +ffffffff82c65000 r orientation_data +ffffffff82c689c8 r lcd800x1280_rightside_up +ffffffff82c689e0 r lcd720x1280_rightside_up +ffffffff82c689f8 r lcd800x1280_leftside_up +ffffffff82c68a10 r lcd1080x1920_leftside_up +ffffffff82c68a28 r lcd1200x1920_rightside_up +ffffffff82c68a40 r gpd_micropc +ffffffff82c68a58 r gpd_pocket +ffffffff82c68a70 r gpd_pocket2 +ffffffff82c68a88 r gpd_win +ffffffff82c68aa0 r gpd_win2 +ffffffff82c68ab8 r lcd1080x1920_rightside_up +ffffffff82c68ad0 r itworks_tw891 +ffffffff82c68ae8 r lcd1600x2560_leftside_up +ffffffff82c68b00 r lcd1600x2560_rightside_up +ffffffff82c68b18 r onegx1_pro +ffffffff82c68b30 r lcd1280x1920_rightside_up +ffffffff82c68b48 r gpd_onemix2s +ffffffff82c68b60 r .compoundliteral +ffffffff82c68b70 r .compoundliteral.5 +ffffffff82c68b98 r .compoundliteral.9 +ffffffff82c68bb8 r .compoundliteral.17 +ffffffff82c68bf8 r .compoundliteral.21 +ffffffff82c68c18 r .compoundliteral.23 +ffffffff82c68c28 r .compoundliteral.25 +ffffffff82c68c38 r .compoundliteral.29 +ffffffff82c69000 r drm_gem_prime_dmabuf_ops +ffffffff82c6b000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82c6c000 r drm_dp_phy_name.phy_names +ffffffff82c6c048 r drm_dp_i2c_algo +ffffffff82c6c058 r drm_dp_i2c_lock_ops +ffffffff82c6c070 r dp_aux_bl_ops +ffffffff82c6c090 r dpcd_quirk_list +ffffffff82c6c320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82c6d000 R drm_dp_mst_topology_state_funcs +ffffffff82c6d020 r drm_dp_mst_req_type_str.req_type_str +ffffffff82c6d1f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82c6d220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82c6d278 r drm_dp_mst_i2c_algo +ffffffff82c6e000 r rc_parameters_1_2_444 +ffffffff82c6e5f0 r rc_parameters_pre_scr +ffffffff82c6e920 r rc_parameters_1_2_422 +ffffffff82c6edf0 r rc_parameters_1_2_420 +ffffffff82c70000 r hdmi_colorimetry_val +ffffffff82c71018 R ttm_bo_vm_ops +ffffffff82c72000 r ttm_range_manager_func +ffffffff82c73018 r ttm_kmap_iter_io_ops +ffffffff82c73030 r ttm_kmap_iter_linear_io_ops +ffffffff82c74000 r ttm_sys_manager_func +ffffffff82c75000 r ttm_kmap_iter_tt_ops +ffffffff82c76000 r drm_sched_fence_ops_scheduled +ffffffff82c76040 r drm_sched_fence_ops_finished +ffffffff82c77000 R ch7017_ops +ffffffff82c78000 R ch7xxx_ops +ffffffff82c78060 r ch7xxx_ids +ffffffff82c79000 R ivch_ops +ffffffff82c79060 r backup_addresses +ffffffff82c7a000 R ns2501_ops +ffffffff82c7a060 r mode_agnostic_values +ffffffff82c7a0e0 r ns2501_modes +ffffffff82c7b000 R sil164_ops +ffffffff82c7c000 R tfp410_ops +ffffffff82c7d000 r chv_dpll +ffffffff82c7d050 r vlv_dpll +ffffffff82c7d0a0 r g4x_dpll +ffffffff82c7d0f0 r pch_dpll +ffffffff82c7d138 r intel_dp_enc_funcs +ffffffff82c7e000 r intel_hdmi_enc_funcs +ffffffff82c7f000 r vlv_primary_formats +ffffffff82c7f030 r ivb_primary_formats +ffffffff82c7f050 r i965_primary_formats +ffffffff82c7f070 r i8xx_primary_formats +ffffffff82c7f080 r i965_plane_funcs +ffffffff82c7f0e8 r i8xx_plane_funcs +ffffffff82c80000 r ilk_wm_funcs +ffffffff82c80040 r vlv_wm_funcs +ffffffff82c80080 r g4x_wm_funcs +ffffffff82c800c0 r nop_funcs +ffffffff82c80100 r pnv_wm_funcs +ffffffff82c80140 r i965_wm_funcs +ffffffff82c80180 r i9xx_wm_funcs +ffffffff82c801c0 r i845_wm_funcs +ffffffff82c80200 r cxsr_latency_table +ffffffff82c81000 r gen11_dsi_encoder_funcs +ffffffff82c81020 r gen11_dsi_connector_funcs +ffffffff82c81098 r gen11_dsi_connector_helper_funcs +ffffffff82c810f8 r gen11_dsi_host_ops +ffffffff82c82000 r intel_plane_helper_funcs +ffffffff82c83000 r g4x_audio_funcs +ffffffff82c83018 r ibx_audio_funcs +ffffffff82c83030 r hsw_audio_funcs +ffffffff82c83050 r hdmi_audio_clock +ffffffff82c830c0 r hdmi_aud_ncts_36bpp +ffffffff82c831a0 r hdmi_aud_ncts_30bpp +ffffffff82c83280 r hdmi_aud_ncts_24bpp +ffffffff82c84000 r intel_backlight_device_ops +ffffffff82c84018 r bxt_pwm_funcs +ffffffff82c84048 r cnp_pwm_funcs +ffffffff82c84078 r lpt_pwm_funcs +ffffffff82c840a8 r spt_pwm_funcs +ffffffff82c840d8 r pch_pwm_funcs +ffffffff82c84108 r ext_pwm_funcs +ffffffff82c84138 r vlv_pwm_funcs +ffffffff82c84168 r i965_pwm_funcs +ffffffff82c84198 r i9xx_pwm_funcs +ffffffff82c841c8 r pwm_bl_funcs +ffffffff82c85000 r bdb_blocks +ffffffff82c85160 r adlp_aux_ch_map +ffffffff82c85169 r adls_aux_ch_map +ffffffff82c85170 r rkl_aux_ch_map +ffffffff82c85175 r direct_aux_ch_map +ffffffff82c8517e r translate_iboost.mapping +ffffffff82c85181 r adlp_ddc_pin_map +ffffffff82c8518e r adls_ddc_pin_map +ffffffff82c8519b r rkl_pch_tgp_ddc_pin_map +ffffffff82c851a6 r gen9bc_tgp_ddc_pin_map +ffffffff82c851b1 r icp_ddc_pin_map +ffffffff82c851c0 r cnp_ddc_pin_map +ffffffff82c86000 r mtl_sa_info +ffffffff82c86006 r adlp_sa_info +ffffffff82c8600c r adls_sa_info +ffffffff82c86012 r rkl_sa_info +ffffffff82c86018 r tgl_sa_info +ffffffff82c86020 r intel_bw_funcs +ffffffff82c87000 r intel_cdclk_funcs +ffffffff82c87010 r mtl_cdclk_funcs +ffffffff82c87030 r mtl_cdclk_table +ffffffff82c87088 r tgl_cdclk_funcs +ffffffff82c870b0 r dg2_cdclk_table +ffffffff82c87160 r adlp_a_step_cdclk_table +ffffffff82c871e0 r rplu_cdclk_table +ffffffff82c872c8 r rplu_cdclk_funcs +ffffffff82c872f0 r adlp_cdclk_table +ffffffff82c873b0 r rkl_cdclk_table +ffffffff82c874a0 r icl_cdclk_table +ffffffff82c87588 r ehl_cdclk_funcs +ffffffff82c875a8 r icl_cdclk_funcs +ffffffff82c875c8 r bxt_cdclk_funcs +ffffffff82c875f0 r glk_cdclk_table +ffffffff82c87620 r bxt_cdclk_table +ffffffff82c87668 r skl_cdclk_funcs +ffffffff82c87688 r bdw_cdclk_funcs +ffffffff82c876a8 r hsw_cdclk_funcs +ffffffff82c876c8 r chv_cdclk_funcs +ffffffff82c876e8 r vlv_cdclk_funcs +ffffffff82c87708 r fixed_400mhz_cdclk_funcs +ffffffff82c87728 r ilk_cdclk_funcs +ffffffff82c87748 r gm45_cdclk_funcs +ffffffff82c87768 r g33_cdclk_funcs +ffffffff82c87788 r i965gm_cdclk_funcs +ffffffff82c877a8 r pnv_cdclk_funcs +ffffffff82c877c8 r i945gm_cdclk_funcs +ffffffff82c877e8 r i915gm_cdclk_funcs +ffffffff82c87808 r i915g_cdclk_funcs +ffffffff82c87828 r i865g_cdclk_funcs +ffffffff82c87848 r i85x_cdclk_funcs +ffffffff82c87868 r i845g_cdclk_funcs +ffffffff82c87888 r i830_cdclk_funcs +ffffffff82c878a8 r g33_get_cdclk.div_3200 +ffffffff82c878ae r g33_get_cdclk.div_4000 +ffffffff82c878b4 r g33_get_cdclk.div_4800 +ffffffff82c878ba r g33_get_cdclk.div_5333 +ffffffff82c878c0 r i965gm_get_cdclk.div_3200 +ffffffff82c878c3 r i965gm_get_cdclk.div_4000 +ffffffff82c878c6 r i965gm_get_cdclk.div_5333 +ffffffff82c88000 r chv_color_funcs +ffffffff82c88040 r vlv_color_funcs +ffffffff82c88080 r i965_color_funcs +ffffffff82c880c0 r i9xx_color_funcs +ffffffff82c88100 r tgl_color_funcs +ffffffff82c88140 r icl_color_funcs +ffffffff82c88180 r glk_color_funcs +ffffffff82c881c0 r skl_color_funcs +ffffffff82c88200 r bdw_color_funcs +ffffffff82c88240 r hsw_color_funcs +ffffffff82c88280 r ivb_color_funcs +ffffffff82c882c0 r ilk_color_funcs +ffffffff82c88300 r chv_cgm_csc_matrix_identity +ffffffff82c8831e r ilk_csc_matrix_rgb_to_ycbcr +ffffffff82c8833c r ilk_csc_matrix_limited_range +ffffffff82c8835a r ilk_csc_matrix_identity +ffffffff82c89000 r icl_procmon_values +ffffffff82c8a000 r force_audio_names +ffffffff82c8a040 r broadcast_rgb_names +ffffffff82c8b000 r intel_crt_connector_funcs +ffffffff82c8b078 r intel_crt_enc_funcs +ffffffff82c8b0a0 r intel_spurious_crt_detect +ffffffff82c8b4a8 r intel_crt_connector_helper_funcs +ffffffff82c8c000 r g4x_crtc_funcs +ffffffff82c8c0c0 r i965_crtc_funcs +ffffffff82c8c180 r i915gm_crtc_funcs +ffffffff82c8c240 r i915_crtc_funcs +ffffffff82c8c300 r i8xx_crtc_funcs +ffffffff82c8c3c0 r bdw_crtc_funcs +ffffffff82c8c480 r ilk_crtc_funcs +ffffffff82c8d000 r output_format_str +ffffffff82c8d020 r output_type_str +ffffffff82c8e000 r intel_cursor_plane_funcs +ffffffff82c8e068 r intel_cursor_formats +ffffffff82c8f000 r mtl_c10_hdmi_tables +ffffffff82c8f170 r mtl_c10_hdmi_25_2 +ffffffff82c8f18c r mtl_c10_hdmi_27_0 +ffffffff82c8f1a8 r mtl_c10_hdmi_27027 +ffffffff82c8f1c4 r mtl_c10_hdmi_28320 +ffffffff82c8f1e0 r mtl_c10_hdmi_30240 +ffffffff82c8f1fc r mtl_c10_hdmi_31500 +ffffffff82c8f218 r mtl_c10_hdmi_36000 +ffffffff82c8f234 r mtl_c10_hdmi_40000 +ffffffff82c8f250 r mtl_c10_hdmi_49500 +ffffffff82c8f26c r mtl_c10_hdmi_50000 +ffffffff82c8f288 r mtl_c10_hdmi_57284 +ffffffff82c8f2a4 r mtl_c10_hdmi_58000 +ffffffff82c8f2c0 r mtl_c10_hdmi_65000 +ffffffff82c8f2dc r mtl_c10_hdmi_71000 +ffffffff82c8f2f8 r mtl_c10_hdmi_74176 +ffffffff82c8f314 r mtl_c10_hdmi_74_25 +ffffffff82c8f330 r mtl_c10_hdmi_75000 +ffffffff82c8f34c r mtl_c10_hdmi_78750 +ffffffff82c8f368 r mtl_c10_hdmi_85500 +ffffffff82c8f384 r mtl_c10_hdmi_88750 +ffffffff82c8f3a0 r mtl_c10_hdmi_106500 +ffffffff82c8f3bc r mtl_c10_hdmi_108000 +ffffffff82c8f3d8 r mtl_c10_hdmi_115500 +ffffffff82c8f3f4 r mtl_c10_hdmi_119000 +ffffffff82c8f410 r mtl_c10_hdmi_135000 +ffffffff82c8f42c r mtl_c10_hdmi_138500 +ffffffff82c8f448 r mtl_c10_hdmi_147160 +ffffffff82c8f464 r mtl_c10_hdmi_148352 +ffffffff82c8f480 r mtl_c10_hdmi_148_5 +ffffffff82c8f49c r mtl_c10_hdmi_154000 +ffffffff82c8f4b8 r mtl_c10_hdmi_162000 +ffffffff82c8f4d4 r mtl_c10_hdmi_167000 +ffffffff82c8f4f0 r mtl_c10_hdmi_197802 +ffffffff82c8f50c r mtl_c10_hdmi_198000 +ffffffff82c8f528 r mtl_c10_hdmi_209800 +ffffffff82c8f544 r mtl_c10_hdmi_241500 +ffffffff82c8f560 r mtl_c10_hdmi_262750 +ffffffff82c8f57c r mtl_c10_hdmi_268500 +ffffffff82c8f598 r mtl_c10_hdmi_296703 +ffffffff82c8f5b4 r mtl_c10_hdmi_297000 +ffffffff82c8f5d0 r mtl_c10_hdmi_319750 +ffffffff82c8f5ec r mtl_c10_hdmi_497750 +ffffffff82c8f608 r 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r intel_no_opregion_vbt +ffffffff82cb62e0 r intel_use_opregion_panel_type +ffffffff82cb7000 r y_static_hcoeffs +ffffffff82cb70b0 r uv_static_hcoeffs +ffffffff82cb8000 r intel_pmdemand_funcs +ffffffff82cba014 r hsw_psr_setup_aux.aux_msg +ffffffff82cbb000 r rc_range_minqp420_8bpc +ffffffff82cbb100 r rc_range_minqp444_8bpc +ffffffff82cbb330 r rc_range_minqp420_10bpc +ffffffff82cbb490 r rc_range_minqp444_10bpc +ffffffff82cbb770 r rc_range_minqp420_12bpc +ffffffff82cbb930 r rc_range_minqp444_12bpc +ffffffff82cbbcd0 r rc_range_maxqp420_8bpc +ffffffff82cbbdd0 r rc_range_maxqp444_8bpc +ffffffff82cbc000 r rc_range_maxqp420_10bpc +ffffffff82cbc160 r rc_range_maxqp444_10bpc +ffffffff82cbc440 r rc_range_maxqp420_12bpc +ffffffff82cbc600 r rc_range_maxqp444_12bpc +ffffffff82cbd000 r intel_quirks +ffffffff82cbd240 r .compoundliteral +ffffffff82cbd648 r .compoundliteral.9 +ffffffff82cbe000 r intel_sdvo_enc_funcs +ffffffff82cbe020 r intel_sdvo_ddc_proxy +ffffffff82cbe030 r proxy_lock_ops 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intel_engine_init_tlb_invalidation.xelpmp_regs +ffffffff82cdb2e0 r __cs_pending_mi_force_wakes._reg +ffffffff82cdc000 r wf_ops +ffffffff82cdd000 r intel_engine_class_repr.uabi_names +ffffffff82cdd030 r uabi_classes +ffffffff82cdd03c r legacy_ring_idx.map +ffffffff82cde000 r execlists_context_ops +ffffffff82cde090 r virtual_context_ops +ffffffff82cdf000 r xelpmp_oaddrm_steering_table +ffffffff82cdf020 r xelpg_instance0_steering_table +ffffffff82cdf070 r xelpg_l3bank_steering_table +ffffffff82cdf080 r xelpg_dss_steering_table +ffffffff82cdf0d0 r pvc_instance0_steering_table +ffffffff82cdf140 r xehpsdv_mslice_steering_table +ffffffff82cdf160 r dg2_lncf_steering_table +ffffffff82cdf180 r xehpsdv_lncf_steering_table +ffffffff82cdf1a0 r xehpsdv_gam_steering_table +ffffffff82cdf1c0 r icl_l3bank_steering_table +ffffffff82cdf1d0 r intel_steering_types +ffffffff82ce0000 r wf_ops +ffffffff82ce1000 r gen12_rcs_offsets +ffffffff82ce1090 r gen9_rcs_offsets +ffffffff82ce1110 r gen9_xcs_offsets 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+ffffffff82ceaa70 r xe_lp_vec_class_regs +ffffffff82ceaad0 r gen8_vec_inst_regs +ffffffff82ceadd0 r gen8_blt_inst_regs +ffffffff82ceb0d0 r xe_lp_gsc_inst_regs +ffffffff82ceb3d0 r gen8_global_regs +ffffffff82ceb460 r gen8_rc_class_regs +ffffffff82cec000 r _guc_log_init_sizes.sections +ffffffff82cee000 r guc_context_ops +ffffffff82cee090 r virtual_guc_context_ops +ffffffff82cee120 r virtual_parent_context_ops +ffffffff82cee1b0 r virtual_child_context_ops +ffffffff82cee240 r guc_class_engine_class_map +ffffffff82cf0000 r uc_ops_on +ffffffff82cf0040 r uc_ops_off +ffffffff82cf1000 r blobs_all +ffffffff82cf1030 r blobs_guc +ffffffff82cf11b0 r blobs_huc +ffffffff82cf2000 r hsw_render_ring_cmd_table +ffffffff82cf2030 r gen7_render_cmd_table +ffffffff82cf2050 r hsw_render_reg_tables +ffffffff82cf2070 r ivb_render_reg_tables +ffffffff82cf2080 r gen7_video_cmd_table +ffffffff82cf20a0 r gen9_blt_cmd_table +ffffffff82cf20b0 r hsw_blt_ring_cmd_table +ffffffff82cf20e0 r gen7_blt_cmd_table +ffffffff82cf2100 r gen9_blt_reg_tables +ffffffff82cf2110 r hsw_blt_reg_tables +ffffffff82cf2120 r ivb_blt_reg_tables +ffffffff82cf2130 r hsw_vebox_cmd_table +ffffffff82cf2150 r noop_desc +ffffffff82cf21b0 r gen7_common_cmds +ffffffff82cf25d0 r gen7_render_cmds +ffffffff82cf2cb0 r hsw_render_cmds +ffffffff82cf32e0 r gen7_render_regs +ffffffff82cf3600 r hsw_render_regs +ffffffff82cf37a0 r gen7_video_cmds +ffffffff82cf3a10 r gen9_blt_cmds +ffffffff82cf4040 r gen7_blt_cmds +ffffffff82cf4250 r hsw_blt_cmds +ffffffff82cf4300 r gen9_blt_regs +ffffffff82cf44e0 r gen7_blt_regs +ffffffff82cf4540 r gen7_vecs_cmds +ffffffff82cf5000 R inteldrm_backlight_ops +ffffffff82cf5018 R inteldrm_ca +ffffffff82cf5040 r i915_drm_driver +ffffffff82cf5130 r i915_ioctls +ffffffff82cf6000 r init_funcs +ffffffff82cf7000 R pciidlist +ffffffff82cf91d8 r i830_info +ffffffff82cf9240 r i845g_info +ffffffff82cf92a8 r i85x_info +ffffffff82cf9310 r i865g_info +ffffffff82cf9378 r i915g_info +ffffffff82cf93e0 r i915gm_info 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skl_gt2_info +ffffffff82cfa0e0 r skl_gt3_info +ffffffff82cfa148 r skl_gt4_info +ffffffff82cfa1b0 r bxt_info +ffffffff82cfa218 r glk_info +ffffffff82cfa280 r kbl_gt1_info +ffffffff82cfa2e8 r kbl_gt2_info +ffffffff82cfa350 r kbl_gt3_info +ffffffff82cfa3b8 r cfl_gt1_info +ffffffff82cfa420 r cfl_gt2_info +ffffffff82cfa488 r cfl_gt3_info +ffffffff82cfa4f0 r cml_gt1_info +ffffffff82cfa558 r cml_gt2_info +ffffffff82cfa5c0 r icl_info +ffffffff82cfa628 r ehl_info +ffffffff82cfa690 r jsl_info +ffffffff82cfa6f8 r tgl_info +ffffffff82cfa760 r rkl_info +ffffffff82cfa7c8 r adl_s_info +ffffffff82cfa830 r adl_p_info +ffffffff82cfa898 r dg1_info +ffffffff82cfa900 r dg2_info +ffffffff82cfa968 r ats_m_info +ffffffff82cfa9d0 r xelpmp_extra_gt +ffffffff82cfaa10 r mtl_info +ffffffff82cfb000 r oa_formats +ffffffff82cfb0f0 r gen8_update_reg_state_unlocked.flex_regs +ffffffff82cfb110 r gen8_oa_mux_regs +ffffffff82cfb130 r xehp_oa_b_counters +ffffffff82cfb150 r gen12_oa_b_counters +ffffffff82cfb190 r mtl_oam_b_counters +ffffffff82cfb1c0 r mtl_oa_mux_regs +ffffffff82cfb1f0 r gen12_oa_mux_regs +ffffffff82cfc000 r i915_query_funcs +ffffffff82cfd000 R i915_fence_ops +ffffffff82cfe000 r rsgt_ops +ffffffff82cff000 r fence_ops +ffffffff82d00000 r i915_ttm_buddy_manager_func +ffffffff82d01000 r bind_ops +ffffffff82d02000 r nop_clock_gating_funcs +ffffffff82d02008 r pvc_clock_gating_funcs +ffffffff82d02010 r dg2_clock_gating_funcs +ffffffff82d02018 r xehpsdv_clock_gating_funcs +ffffffff82d02020 r adlp_clock_gating_funcs +ffffffff82d02028 r gen12lp_clock_gating_funcs +ffffffff82d02030 r icl_clock_gating_funcs +ffffffff82d02038 r cfl_clock_gating_funcs +ffffffff82d02040 r skl_clock_gating_funcs +ffffffff82d02048 r kbl_clock_gating_funcs +ffffffff82d02050 r bxt_clock_gating_funcs +ffffffff82d02058 r glk_clock_gating_funcs +ffffffff82d02060 r bdw_clock_gating_funcs +ffffffff82d02068 r chv_clock_gating_funcs +ffffffff82d02070 r hsw_clock_gating_funcs +ffffffff82d02078 r ivb_clock_gating_funcs +ffffffff82d02080 r vlv_clock_gating_funcs +ffffffff82d02088 r gen6_clock_gating_funcs +ffffffff82d02090 r ilk_clock_gating_funcs +ffffffff82d02098 r g4x_clock_gating_funcs +ffffffff82d020a0 r i965gm_clock_gating_funcs +ffffffff82d020a8 r i965g_clock_gating_funcs +ffffffff82d020b0 r gen3_clock_gating_funcs +ffffffff82d020b8 r i85x_clock_gating_funcs +ffffffff82d020c0 r i830_clock_gating_funcs +ffffffff82d03000 r platform_names +ffffffff82d03140 r subplatform_ult_ids +ffffffff82d031a4 r no_display +ffffffff82d04000 r intel_region_map +ffffffff82d06000 r dg2_g10_revid_step_tbl +ffffffff82d06030 r dg2_g11_revid_step_tbl +ffffffff82d06050 r xehpsdv_revids +ffffffff82d06080 r adlp_rplp_revids +ffffffff82d060a0 r adlp_revids +ffffffff82d060e0 r adls_rpls_revids +ffffffff82d06120 r adls_revids +ffffffff82d06160 r rkl_revids +ffffffff82d06180 r bxt_revids +ffffffff82d061c0 r skl_revids +ffffffff82d061f0 r pvc_bd_subids +ffffffff82d06210 r pvc_ct_subids +ffffffff82d08000 r forcewake_domain_names +ffffffff82d08080 r __mtl_fw_ranges +ffffffff82d081f0 r mtl_shadowed_regs +ffffffff82d08270 r __pvc_fw_ranges +ffffffff82d08420 r pvc_shadowed_regs +ffffffff82d08540 r __dg2_fw_ranges +ffffffff82d08810 r dg2_shadowed_regs +ffffffff82d08930 r __xehp_fw_ranges +ffffffff82d08c00 r gen12_shadowed_regs +ffffffff82d08d20 r __gen12_fw_ranges +ffffffff82d08f30 r __gen11_fw_ranges +ffffffff82d090e0 r gen11_shadowed_regs +ffffffff82d091a0 r __gen9_fw_ranges +ffffffff82d09320 r gen8_shadowed_regs +ffffffff82d09350 r __chv_fw_ranges +ffffffff82d09410 r __gen6_fw_ranges +ffffffff82d09420 r __vlv_fw_ranges +ffffffff82d09478 r uncore_get_fallback +ffffffff82d09480 r uncore_get_normal +ffffffff82d09488 r uncore_get_thread_status +ffffffff82d09490 r __xelpmp_fw_ranges +ffffffff82d095c0 r xelpmp_shadowed_regs +ffffffff82d0a000 r i915_pxp_tee_component_ops +ffffffff82d0b000 r intel_dram_type_str.str +ffffffff82d0c000 r atom_op_names +ffffffff82d0c3e0 r opcode_table +ffffffff82d0cb90 r atom_dst_to_src +ffffffff82d0cc10 r atom_io_names +ffffffff82d0cc40 r atom_table_names +ffffffff82d0ce90 r atom_iio_len +ffffffff82d0d000 r atombios_helper_funcs +ffffffff82d0d080 r vga_control_regs +ffffffff82d0e000 r voltage_names +ffffffff82d0e020 r pre_emph_names +ffffffff82d0f000 r radeon_atom_backlight_ops +ffffffff82d0f018 r radeon_atom_enc_funcs +ffffffff82d0f038 r radeon_atom_dig_helper_funcs +ffffffff82d0f0a0 r radeon_atom_dac_helper_funcs +ffffffff82d0f108 r radeon_atom_ext_helper_funcs +ffffffff82d10000 r caicos_cgcg_cgls_default +ffffffff82d10240 r barts_mgcg_default +ffffffff82d10900 r turks_mgcg_default +ffffffff82d10d80 r caicos_mgcg_default +ffffffff82d11110 r turks_sysls_default +ffffffff82d111d0 r caicos_sysls_default +ffffffff82d11280 r caicos_cgcg_cgls_enable +ffffffff82d114d0 r caicos_cgcg_cgls_disable +ffffffff82d11730 r barts_mgcg_enable +ffffffff82d117b0 r turks_mgcg_enable +ffffffff82d11830 r caicos_mgcg_enable +ffffffff82d118b0 r caicos_mgcg_disable +ffffffff82d11930 r turks_sysls_enable +ffffffff82d119f0 r caicos_sysls_enable +ffffffff82d11aa0 r turks_sysls_disable +ffffffff82d11b60 r caicos_sysls_disable +ffffffff82d12000 r didt_config_ci +ffffffff82d125b4 r defaults_bonaire_xt +ffffffff82d12600 r defaults_saturn_xt +ffffffff82d1264c r defaults_hawaii_xt +ffffffff82d12698 r defaults_hawaii_pro +ffffffff82d13000 r ci_program_jump_on_start.data +ffffffff82d14000 r bonaire_io_mc_regs +ffffffff82d14120 r hawaii_io_mc_regs +ffffffff82d141d0 r mc_cg_registers +ffffffff82d14200 r bonaire_mgcg_cgcg_init +ffffffff82d145e0 r bonaire_golden_registers +ffffffff82d147d0 r bonaire_golden_common_registers +ffffffff82d14800 r bonaire_golden_spm_registers +ffffffff82d14810 r kalindi_mgcg_cgcg_init +ffffffff82d14ab0 r kalindi_golden_registers +ffffffff82d14c20 r kalindi_golden_common_registers +ffffffff82d14c50 r kalindi_golden_spm_registers +ffffffff82d14c60 r godavari_golden_registers +ffffffff82d14de0 r spectre_mgcg_cgcg_init +ffffffff82d15200 r spectre_golden_registers +ffffffff82d15330 r spectre_golden_common_registers +ffffffff82d15360 r spectre_golden_spm_registers +ffffffff82d15370 r hawaii_mgcg_cgcg_init +ffffffff82d15880 r hawaii_golden_registers +ffffffff82d15a30 r hawaii_golden_common_registers +ffffffff82d15a6c r hawaii_golden_spm_registers +ffffffff82d15a80 r spectre_rlc_save_restore_register_list +ffffffff82d16170 r kalindi_rlc_save_restore_register_list +ffffffff82d16680 r ci_cs_data +ffffffff82d166a0 r ci_SECT_CONTEXT_defs +ffffffff82d16720 r ci_SECT_CONTEXT_def_1 +ffffffff82d16a70 r ci_SECT_CONTEXT_def_3 +ffffffff82d16a90 r ci_SECT_CONTEXT_def_4 +ffffffff82d16d04 r ci_SECT_CONTEXT_def_5 +ffffffff82d16d0c r ci_SECT_CONTEXT_def_6 +ffffffff82d16d10 r ci_SECT_CONTEXT_def_2 +ffffffff82d17160 r ci_SECT_CONTEXT_def_7 +ffffffff82d17510 r cik_default_state +ffffffff82d19000 r dce3_2_afmt_write_sad_regs.eld_reg_to_type +ffffffff82d1a000 r dce6_afmt_write_sad_regs.eld_reg_to_type +ffffffff82d1b000 r ni_tx_offsets +ffffffff82d1b020 r evergreen_dp_offsets +ffffffff82d1b040 r evergreen_disp_int_status +ffffffff82d1b060 r evergreen_golden_registers +ffffffff82d1b260 r evergreen_golden_registers2 +ffffffff82d1b310 r cypress_mgcg_init +ffffffff82d1ba10 r juniper_mgcg_init +ffffffff82d1be80 r redwood_mgcg_init +ffffffff82d1c1b0 r cedar_golden_registers +ffffffff82d1c390 r cedar_mgcg_init +ffffffff82d1c5f0 r wrestler_golden_registers +ffffffff82d1c840 r supersumo_golden_registers +ffffffff82d1cba0 r sumo_golden_registers +ffffffff82d1cbe0 r barts_golden_registers +ffffffff82d1ce00 r turks_golden_registers +ffffffff82d1d040 r caicos_golden_registers +ffffffff82d1d280 r sumo_rlc_save_restore_register_list +ffffffff82d1d3d0 r evergreen_cs_data +ffffffff82d1d410 r SECT_CONTEXT_defs +ffffffff82d1d490 r SECT_CLEAR_defs +ffffffff82d1d4b0 r SECT_CTRLCONST_defs +ffffffff82d1d4d0 r SECT_CONTEXT_def_2 +ffffffff82d1d4f0 r SECT_CONTEXT_def_4 +ffffffff82d1d680 r SECT_CONTEXT_def_5 +ffffffff82d1d6a0 r SECT_CONTEXT_def_6 +ffffffff82d1d780 r SECT_CONTEXT_def_1 +ffffffff82d1df20 r SECT_CONTEXT_def_3 +ffffffff82d1e000 r SECT_CONTEXT_def_7 +ffffffff82d1e488 r SECT_CLEAR_def_1 +ffffffff82d1e494 r SECT_CTRLCONST_def_1 +ffffffff82d1e4a0 r evergreen_default_state +ffffffff82d1f000 r cayman_reg_safe_bm +ffffffff82d21000 r evergreen_reg_safe_bm +ffffffff82d24000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82d25000 r didt_config_kv +ffffffff82d26000 r barts_io_mc_regs +ffffffff82d260f0 r turks_io_mc_regs +ffffffff82d261e0 r caicos_io_mc_regs +ffffffff82d262d0 r cayman_io_mc_regs +ffffffff82d263c0 r cayman_golden_registers +ffffffff82d26580 r cayman_golden_registers2 +ffffffff82d265d0 r dvst_golden_registers +ffffffff82d26860 r dvst_golden_registers2 +ffffffff82d26890 r scrapper_golden_registers +ffffffff82d26d70 r tn_rlc_save_restore_register_list +ffffffff82d26f60 r cayman_cs_data +ffffffff82d26fa0 r SECT_CONTEXT_defs +ffffffff82d27020 r SECT_CLEAR_defs +ffffffff82d27040 r SECT_CTRLCONST_defs +ffffffff82d27060 r SECT_CONTEXT_def_2 +ffffffff82d27080 r SECT_CONTEXT_def_4 +ffffffff82d27210 r SECT_CONTEXT_def_5 +ffffffff82d27230 r SECT_CONTEXT_def_1 +ffffffff82d279d0 r SECT_CONTEXT_def_3 +ffffffff82d27ab0 r SECT_CONTEXT_def_6 +ffffffff82d27b90 r SECT_CONTEXT_def_7 +ffffffff82d28018 r SECT_CLEAR_def_1 +ffffffff82d28024 r SECT_CTRLCONST_def_1 +ffffffff82d28030 r cayman_default_state +ffffffff82d29000 r cac_weights_cayman_xt +ffffffff82d29128 r cac_weights_cayman_pro +ffffffff82d29250 r cac_weights_cayman_le +ffffffff82d29380 r cayman_cgcg_cgls_default +ffffffff82d295c0 r cayman_mgcg_default +ffffffff82d29f20 r cayman_sysls_default +ffffffff82d29ff0 r cayman_cgcg_cgls_enable +ffffffff82d2a240 r cayman_cgcg_cgls_disable +ffffffff82d2a4a0 r cayman_mgcg_enable +ffffffff82d2a520 r cayman_mgcg_disable +ffffffff82d2a5a0 r cayman_sysls_enable +ffffffff82d2a670 r cayman_sysls_disable +ffffffff82d2b000 r rn50_reg_safe_bm +ffffffff82d2b1a0 r r100_reg_safe_bm +ffffffff82d2c000 r r200_reg_safe_bm +ffffffff82d2d000 r r300_reg_safe_bm +ffffffff82d2e000 r r420_reg_safe_bm +ffffffff82d30000 r color_formats_table +ffffffff82d30480 r r600_reg_safe_bm +ffffffff82d33000 R r600_utc +ffffffff82d33040 R r600_dtc +ffffffff82d33080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82d35000 r r100_gfx_ring +ffffffff82d35070 r r300_gfx_ring +ffffffff82d350e0 r rv515_gfx_ring +ffffffff82d35150 r r600_gfx_ring +ffffffff82d351c0 r r600_dma_ring +ffffffff82d35230 r rv6xx_uvd_ring +ffffffff82d352a0 r rv770_uvd_ring +ffffffff82d35310 r evergreen_gfx_ring +ffffffff82d35380 r evergreen_dma_ring +ffffffff82d353f0 r cayman_gfx_ring +ffffffff82d35460 r cayman_dma_ring +ffffffff82d354d0 r cayman_uvd_ring +ffffffff82d35540 r trinity_vce_ring +ffffffff82d355b0 r si_gfx_ring +ffffffff82d35620 r si_dma_ring +ffffffff82d35690 r ci_gfx_ring +ffffffff82d35700 r ci_cp_ring +ffffffff82d35770 r ci_dma_ring +ffffffff82d357e0 r ci_vce_ring +ffffffff82d36000 r object_connector_convert +ffffffff82d36060 r supported_devices_connector_convert +ffffffff82d360a0 r supported_devices_connector_object_id_convert +ffffffff82d360c0 r thermal_controller_names +ffffffff82d36100 r pp_lib_thermal_controller_names +ffffffff82d37000 r pin_offsets +ffffffff82d37020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff82d39000 r thermal_controller_names +ffffffff82d39020 r default_primarydac_adj +ffffffff82d39120 r default_tvdac_adj +ffffffff82d39220 r default_tmds_pll +ffffffff82d3a000 r radeon_dp_connector_funcs +ffffffff82d3a078 r radeon_dp_connector_helper_funcs +ffffffff82d3a0d8 r radeon_lvds_bridge_connector_funcs +ffffffff82d3a150 r radeon_vga_connector_funcs +ffffffff82d3a1c8 r radeon_vga_connector_helper_funcs +ffffffff82d3a228 r radeon_dvi_connector_funcs +ffffffff82d3a2a0 r radeon_dvi_connector_helper_funcs +ffffffff82d3a300 r radeon_edp_connector_funcs +ffffffff82d3a378 r radeon_tv_connector_funcs +ffffffff82d3a3f0 r radeon_tv_connector_helper_funcs +ffffffff82d3a450 r radeon_lvds_connector_funcs +ffffffff82d3a4c8 r radeon_lvds_connector_helper_funcs +ffffffff82d3b000 r radeon_family_name +ffffffff82d3b3f0 r radeon_px_quirk_list +ffffffff82d3c000 r radeon_fb_funcs +ffffffff82d3c018 r radeon_mode_funcs +ffffffff82d3c060 r radeon_tmds_pll_enum_list +ffffffff82d3c080 r radeon_tv_std_enum_list +ffffffff82d3c100 r radeon_underscan_enum_list +ffffffff82d3c130 r radeon_audio_enum_list +ffffffff82d3c160 r radeon_dither_enum_list +ffffffff82d3c180 r radeon_output_csc_enum_list +ffffffff82d3c1c0 r radeon_crtc_funcs +ffffffff82d3c280 r hpd_names +ffffffff82d3c2b0 r encoder_names +ffffffff82d3c3e0 r radeon_afmt_init.eg_offsets +ffffffff82d3d000 r aux_offset +ffffffff82d3e000 R radeondrm_ca +ffffffff82d3e030 r pciidlist +ffffffff82d421d0 r kms_driver +ffffffff82d422c0 r radeon_ioctls_kms +ffffffff82d43000 r radeon_fbdev_fb_helper_funcs +ffffffff82d43010 r radeon_fbdev_client_funcs +ffffffff82d43030 r radeon_fbdev_fb_ops +ffffffff82d44000 R radeon_fence_ops +ffffffff82d46000 R radeon_gem_object_funcs +ffffffff82d46070 r radeon_gem_vm_ops +ffffffff82d47000 r radeon_i2c_algo +ffffffff82d47010 r radeon_atom_i2c_algo +ffffffff82d48000 r legacy_helper_funcs +ffffffff82d49000 r radeon_backlight_ops +ffffffff82d49018 r radeon_legacy_lvds_enc_funcs +ffffffff82d49038 r radeon_legacy_lvds_helper_funcs +ffffffff82d490a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82d490c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82d49128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82d49148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82d491b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82d491d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82d49238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82d49258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82d4a000 r SLOPE_value +ffffffff82d4a030 r YCOEF_EN_value +ffffffff82d4a060 r YCOEF_value +ffffffff82d4a090 r available_tv_modes +ffffffff82d4a110 r hor_timing_NTSC +ffffffff82d4a150 r vert_timing_NTSC +ffffffff82d4a190 r hor_timing_PAL +ffffffff82d4a1d0 r vert_timing_PAL +ffffffff82d4c000 r radeon_pm_state_type_name +ffffffff82d4d000 r radeon_evict_flags.placements +ffffffff82d50000 r rs600_reg_safe_bm +ffffffff82d52000 r rv515_reg_safe_bm +ffffffff82d53000 r dll_speed_table +ffffffff82d54000 r r7xx_golden_registers +ffffffff82d54090 r r7xx_golden_dyn_gpr_registers +ffffffff82d54100 r rv770ce_golden_registers +ffffffff82d54160 r rv770_golden_registers +ffffffff82d541b0 r rv770_mgcg_init +ffffffff82d548f0 r rv730_golden_registers +ffffffff82d54950 r rv730_mgcg_init +ffffffff82d54ee0 r rv710_golden_registers +ffffffff82d54f30 r rv710_mgcg_init +ffffffff82d551d0 r rv740_golden_registers +ffffffff82d55360 r rv740_mgcg_init +ffffffff82d57000 r rv730_smc_int_vectors +ffffffff82d57040 r rv710_smc_int_vectors +ffffffff82d57080 r rv740_smc_int_vectors +ffffffff82d570c0 r cypress_smc_int_vectors +ffffffff82d57100 r caicos_smc_int_vectors +ffffffff82d57140 r cayman_smc_int_vectors +ffffffff82d58000 r tahiti_io_mc_regs +ffffffff82d58120 r pitcairn_io_mc_regs +ffffffff82d58240 r verde_io_mc_regs +ffffffff82d58360 r oland_io_mc_regs +ffffffff82d58480 r hainan_io_mc_regs +ffffffff82d585a0 r crtc_offsets +ffffffff82d585c0 r si_disp_int_status +ffffffff82d585e0 r tahiti_golden_registers +ffffffff82d58760 r tahiti_golden_rlc_registers +ffffffff82d587b0 r tahiti_mgcg_cgcg_init +ffffffff82d58d98 r tahiti_golden_registers2 +ffffffff82d58db0 r pitcairn_golden_registers +ffffffff82d58f00 r pitcairn_golden_rlc_registers +ffffffff82d58f40 r pitcairn_mgcg_cgcg_init +ffffffff82d593b0 r verde_golden_registers +ffffffff82d59620 r verde_golden_rlc_registers +ffffffff82d59660 r verde_mgcg_cgcg_init +ffffffff82d59ae0 r oland_golden_registers +ffffffff82d59c30 r oland_golden_rlc_registers +ffffffff82d59c70 r oland_mgcg_cgcg_init +ffffffff82d5a000 r hainan_golden_registers +ffffffff82d5a12c r hainan_golden_registers2 +ffffffff82d5a140 r hainan_mgcg_cgcg_init +ffffffff82d5a4b0 r verde_rlc_save_restore_register_list +ffffffff82d5a820 r si_cs_data +ffffffff82d5a840 r si_SECT_CONTEXT_defs +ffffffff82d5a8c0 r si_SECT_CONTEXT_def_1 +ffffffff82d5ac10 r si_SECT_CONTEXT_def_3 +ffffffff82d5ac30 r si_SECT_CONTEXT_def_4 +ffffffff82d5aea4 r si_SECT_CONTEXT_def_5 +ffffffff82d5aea8 r si_SECT_CONTEXT_def_6 +ffffffff82d5aeb0 r si_SECT_CONTEXT_def_2 +ffffffff82d5b2f0 r si_SECT_CONTEXT_def_7 +ffffffff82d5b6a0 r mc_cg_registers +ffffffff82d5b6d0 r si_default_state +ffffffff82d5c000 r cac_weights_tahiti +ffffffff82d5c4d0 r lcac_tahiti +ffffffff82d5cba0 r cac_override_tahiti +ffffffff82d5cbb4 r powertune_data_tahiti +ffffffff82d5cbf0 r dte_data_tahiti +ffffffff82d5ccc0 r dte_data_new_zealand +ffffffff82d5cd90 r dte_data_malta +ffffffff82d5ce60 r lcac_pitcairn +ffffffff82d5d530 r cac_override_pitcairn +ffffffff82d5d544 r powertune_data_pitcairn +ffffffff82d5d580 r lcac_cape_verde +ffffffff82d5d9d0 r cac_override_cape_verde +ffffffff82d5d9e4 r powertune_data_cape_verde +ffffffff82d5da20 r cac_weights_cape_verde_pro +ffffffff82d5def0 r cac_weights_heathrow +ffffffff82d5e3c0 r cac_weights_chelsea_xt +ffffffff82d5e890 r cac_weights_chelsea_pro +ffffffff82d5ed60 r cac_weights_cape_verde +ffffffff82d5f230 r cac_weights_mars_pro +ffffffff82d5f700 r lcac_mars_pro +ffffffff82d5fa60 r cac_override_oland +ffffffff82d5fa74 r powertune_data_mars_pro +ffffffff82d5fab0 r cac_weights_mars_xt +ffffffff82d5ff80 r cac_weights_oland_pro +ffffffff82d60450 r cac_weights_oland_xt +ffffffff82d60920 r lcac_oland +ffffffff82d60c7c r powertune_data_oland +ffffffff82d60cc0 r cac_weights_hainan +ffffffff82d61184 r powertune_data_hainan +ffffffff82d611c0 r dte_data_aruba_pro +ffffffff82d61290 r dte_data_tahiti_pro +ffffffff82d61360 r dte_data_curacao_pro +ffffffff82d61430 r dte_data_neptune_xt +ffffffff82d61500 r dte_data_sun_xt +ffffffff82d615d0 r dte_data_venus_xtx +ffffffff82d616a0 r dte_data_venus_xt +ffffffff82d61770 r dte_data_venus_pro +ffffffff82d61840 r dte_data_mars_pro +ffffffff82d62000 r si_program_jump_on_start.data +ffffffff82d63000 r sumo_dtc +ffffffff82d64000 r trinity_mgcg_shls_default +ffffffff82d64380 r trinity_sysls_enable +ffffffff82d64450 r trinity_sysls_disable +ffffffff82d66000 r GC_BASE +ffffffff82d660a8 r HDP_BASE +ffffffff82d66150 r MMHUB_BASE +ffffffff82d661f8 r ATHUB_BASE +ffffffff82d662a0 r NBIO_BASE +ffffffff82d66348 r MP0_BASE +ffffffff82d663f0 r MP1_BASE +ffffffff82d66498 r DF_BASE +ffffffff82d66540 r OSSSYS_BASE +ffffffff82d665e8 r SDMA0_BASE +ffffffff82d66690 r SDMA1_BASE +ffffffff82d66738 r SDMA2_BASE +ffffffff82d667e0 r SDMA3_BASE +ffffffff82d66888 r SDMA4_BASE +ffffffff82d66930 r SMUIO_BASE +ffffffff82d669d8 r THM_BASE +ffffffff82d66a80 r UMC_BASE +ffffffff82d66b28 r VCN_BASE +ffffffff82d67000 r amdgpu_afmt_predefined_acr +ffffffff82d68000 r atom_op_names +ffffffff82d683e0 r opcode_table +ffffffff82d68bd0 r atom_dst_to_src +ffffffff82d68c50 r atom_io_names +ffffffff82d68c80 r atom_table_names +ffffffff82d68ed0 r atom_iio_len +ffffffff82d69000 r object_connector_convert +ffffffff82d69058 R amdgpu_vbios_version_attr_group +ffffffff82d6a000 r voltage_names +ffffffff82d6a020 r pre_emph_names +ffffffff82d6b000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82d6d000 r amdgpu_benchmark.common_modes +ffffffff82d6e000 r amdgpu_cgs_ops +ffffffff82d6f000 r amdgpu_connector_dp_funcs +ffffffff82d6f078 r amdgpu_connector_dp_helper_funcs +ffffffff82d6f0d8 r amdgpu_connector_edp_funcs +ffffffff82d6f150 r amdgpu_connector_vga_funcs +ffffffff82d6f1c8 r amdgpu_connector_vga_helper_funcs +ffffffff82d6f228 r amdgpu_connector_dvi_funcs +ffffffff82d6f2a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82d6f300 r amdgpu_connector_lvds_funcs +ffffffff82d6f378 r amdgpu_connector_lvds_helper_funcs +ffffffff82d6f3e0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82d71000 R amdgpu_ctx_num_entities +ffffffff82d72000 r amdgpu_kms_driver +ffffffff82d720f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82d73000 r hw_id_map +ffffffff82d73090 r hw_id_names +ffffffff82d74000 r hpd_names +ffffffff82d74030 r encoder_names +ffffffff82d74180 r dcc_retile_formats +ffffffff82d74270 r dcc_formats +ffffffff82d74360 R amdgpu_mode_funcs +ffffffff82d743b0 r amdgpu_underscan_enum_list +ffffffff82d743e0 r amdgpu_audio_enum_list +ffffffff82d74410 r amdgpu_dither_enum_list +ffffffff82d74430 r amdgpu_fb_funcs_atomic +ffffffff82d74448 r amdgpu_fb_funcs +ffffffff82d75000 R amdgpu_dmabuf_ops +ffffffff82d76000 R amdgpu_ioctls_kms +ffffffff82d76210 R amdgpu_partition_driver +ffffffff82d762f8 R amdgpu_ca +ffffffff82d76320 r pciidlist +ffffffff82d771f0 r amdgpu_unsupported_pciidlist +ffffffff82d77770 r amdgpu_kms_driver +ffffffff82d78000 r amdgpu_job_fence_ops +ffffffff82d78040 r amdgpu_fence_ops +ffffffff82d79000 r amdgpu_gem_object_funcs +ffffffff82d79070 r amdgpu_gem_vm_ops +ffffffff82d7a000 R amdgpu_gtt_mgr_attr_group +ffffffff82d7a018 r amdgpu_gtt_mgr_func +ffffffff82d7b000 r amdgpu_atombios_i2c_algo +ffffffff82d7c000 R node_id_to_phys_map +ffffffff82d7d000 R amdgpu_sched_ops +ffffffff82d7f000 r amdgpu_vram_names +ffffffff82d80000 r amdgpu_preempt_mgr_func +ffffffff82d81000 R psp_ip_funcs +ffffffff82d810a8 R psp_v3_1_ip_block +ffffffff82d810c0 R psp_v10_0_ip_block +ffffffff82d810d8 R psp_v11_0_ip_block +ffffffff82d810f0 R psp_v11_0_8_ip_block +ffffffff82d81108 R psp_v12_0_ip_block +ffffffff82d81120 R psp_v13_0_ip_block +ffffffff82d81138 R psp_v13_0_4_ip_block +ffffffff82d83000 r sw_ring_info +ffffffff82d84000 r amdgpu_evict_flags.placements +ffffffff82d88000 R amdgpu_vkms_ip_block +ffffffff82d89000 R amdgpu_vm_cpu_funcs +ffffffff82d8b000 R amdgpu_vm_sdma_funcs +ffffffff82d8c000 R amdgpu_vram_mgr_attr_group +ffffffff82d8c018 r amdgpu_vram_mgr_func +ffffffff82d8c040 r amdgpu_dummy_vram_mgr_func +ffffffff82d8d000 r xgmi_pcs_err_status_reg_arct +ffffffff82d8d020 r xgmi3x16_pcs_ras_fields +ffffffff82d8d1f0 r xgmi_pcs_ras_fields +ffffffff82d8d310 r wafl_pcs_ras_fields +ffffffff82d8e000 r GC_BASE +ffffffff82d8e0c0 r HDP_BASE +ffffffff82d8e180 r MMHUB_BASE +ffffffff82d8e240 r ATHUB_BASE +ffffffff82d8e300 r NBIF0_BASE +ffffffff82d8e3c0 r MP0_BASE +ffffffff82d8e480 r MP1_BASE +ffffffff82d8e540 r UVD_BASE +ffffffff82d8e600 r DF_BASE +ffffffff82d8e6c0 r OSSSYS_BASE +ffffffff82d8e780 r SDMA0_BASE +ffffffff82d8e840 r SDMA1_BASE +ffffffff82d8e900 r SDMA2_BASE +ffffffff82d8e9c0 r SDMA3_BASE +ffffffff82d8ea80 r SDMA4_BASE +ffffffff82d8eb40 r SDMA5_BASE +ffffffff82d8ec00 r SDMA6_BASE +ffffffff82d8ecc0 r SDMA7_BASE +ffffffff82d8ed80 r SMUIO_BASE +ffffffff82d8ee40 r THM_BASE +ffffffff82d8ef00 r UMC_BASE +ffffffff82d8efc0 r RSMU_BASE +ffffffff82d90000 r cz_ih_ip_funcs +ffffffff82d900a8 R cz_ih_ip_block +ffffffff82d900c0 r cz_ih_funcs +ffffffff82d91000 r crtc_offsets +ffffffff82d91020 r dce_v10_0_ip_funcs +ffffffff82d910c8 R dce_v10_0_ip_block +ffffffff82d910e0 R dce_v10_1_ip_block +ffffffff82d910f8 r dce_v10_0_display_funcs +ffffffff82d91150 r hpd_offsets +ffffffff82d91168 r dce_v10_0_encoder_funcs +ffffffff82d91188 r dce_v10_0_dac_helper_funcs +ffffffff82d911f0 r dce_v10_0_dig_helper_funcs +ffffffff82d91258 r dce_v10_0_ext_helper_funcs +ffffffff82d912c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82d912f0 r dce_v10_0_crtc_irq_funcs +ffffffff82d91300 r dce_v10_0_pageflip_irq_funcs +ffffffff82d91310 r dce_v10_0_hpd_irq_funcs +ffffffff82d91320 r interrupt_status_offsets +ffffffff82d91380 r dce_v10_0_crtc_funcs +ffffffff82d91440 r dce_v10_0_crtc_helper_funcs +ffffffff82d914c0 r vga_control_regs +ffffffff82d914e0 r dig_offsets +ffffffff82d91500 r pin_offsets +ffffffff82d91520 r fiji_mgcg_cgcg_init +ffffffff82d91540 r golden_settings_fiji_a10 +ffffffff82d91570 r tonga_mgcg_cgcg_init +ffffffff82d91590 r golden_settings_tonga_a11 +ffffffff82d92000 r crtc_offsets +ffffffff82d92020 r dce_v11_0_ip_funcs +ffffffff82d920c8 R dce_v11_0_ip_block +ffffffff82d920e0 R dce_v11_2_ip_block +ffffffff82d920f8 r dce_v11_0_display_funcs +ffffffff82d92150 r hpd_offsets +ffffffff82d92168 r dce_v11_0_encoder_funcs +ffffffff82d92188 r dce_v11_0_dac_helper_funcs +ffffffff82d921f0 r dce_v11_0_dig_helper_funcs +ffffffff82d92258 r dce_v11_0_ext_helper_funcs +ffffffff82d922c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82d922f0 r dce_v11_0_crtc_irq_funcs +ffffffff82d92300 r dce_v11_0_pageflip_irq_funcs +ffffffff82d92310 r dce_v11_0_hpd_irq_funcs +ffffffff82d92320 r interrupt_status_offsets +ffffffff82d92380 r dce_v11_0_crtc_funcs +ffffffff82d92440 r dce_v11_0_crtc_helper_funcs +ffffffff82d924c0 r vga_control_regs +ffffffff82d924e0 r dig_offsets +ffffffff82d92510 r cz_mgcg_cgcg_init +ffffffff82d92530 r cz_golden_settings_a11 +ffffffff82d92550 r stoney_golden_settings_a11 +ffffffff82d92570 r polaris11_golden_settings_a11 +ffffffff82d925b0 r polaris10_golden_settings_a11 +ffffffff82d93000 R df_v1_7_funcs +ffffffff82d93070 r df_v1_7_channel_number +ffffffff82d94000 R df_v3_6_funcs +ffffffff82d94070 r df_v3_6_channel_number +ffffffff82d95000 R df_v4_3_funcs +ffffffff82d96000 r GC_BASE +ffffffff82d960a8 r HDP_BASE +ffffffff82d96150 r MMHUB_BASE +ffffffff82d961f8 r ATHUB_BASE +ffffffff82d962a0 r NBIO_BASE +ffffffff82d96348 r MP0_BASE +ffffffff82d963f0 r MP1_BASE +ffffffff82d96498 r VCN0_BASE +ffffffff82d96540 r DF_BASE +ffffffff82d965e8 r DCN_BASE +ffffffff82d96690 r OSSSYS_BASE +ffffffff82d96738 r SMUIO_BASE +ffffffff82d967e0 r THM_BASE +ffffffff82d97000 r gfx_v10_0_ip_funcs +ffffffff82d970a8 R gfx_v10_0_ip_block +ffffffff82d970c0 r gfx_v10_0_gfx_funcs +ffffffff82d97120 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82d9d3c0 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82da0de0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82da7080 r gfx_v10_0_kiq_pm4_funcs +ffffffff82da70c0 r gfx_v10_0_ring_funcs_kiq +ffffffff82da7200 r gfx_v10_0_ring_funcs_gfx +ffffffff82da7340 r gfx_v10_0_ring_funcs_compute +ffffffff82da7480 r gfx_v10_0_eop_irq_funcs +ffffffff82da7490 r gfx_v10_0_kiq_irq_funcs +ffffffff82da74a0 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82da74b0 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82da74c0 r gfx_v10_0_rlc_funcs +ffffffff82da7528 r gfx_v10_0_rlc_funcs_sriov +ffffffff82da7590 r gfx10_cs_data +ffffffff82da75b0 r gfx10_SECT_CONTEXT_defs +ffffffff82da7640 r gfx10_SECT_CONTEXT_def_1 +ffffffff82da79a0 r gfx10_SECT_CONTEXT_def_3 +ffffffff82da79b0 r gfx10_SECT_CONTEXT_def_4 +ffffffff82da7c28 r gfx10_SECT_CONTEXT_def_5 +ffffffff82da7c30 r gfx10_SECT_CONTEXT_def_6 +ffffffff82da7c40 r gfx10_SECT_CONTEXT_def_2 +ffffffff82da8080 r gfx10_SECT_CONTEXT_def_7 +ffffffff82da8190 r gfx10_SECT_CONTEXT_def_8 +ffffffff82da84c0 r golden_settings_gc_10_1 +ffffffff82da8880 r golden_settings_gc_10_0_nv10 +ffffffff82da8880 r golden_settings_gc_10_1_1 +ffffffff82da8c10 r golden_settings_gc_10_1_2 +ffffffff82da8c10 r golden_settings_gc_10_1_nv14 +ffffffff82da9000 r golden_settings_gc_10_1_2_nv12 +ffffffff82da9000 r golden_settings_gc_10_3 +ffffffff82da9408 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82da9410 r golden_settings_gc_10_3_2 +ffffffff82da9800 r golden_settings_gc_10_3_vangogh +ffffffff82da9a60 r golden_settings_gc_10_3_3 +ffffffff82da9c40 r golden_settings_gc_10_3_4 +ffffffff82da9fa0 r golden_settings_gc_10_3_5 +ffffffff82daa2a0 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82daa5d0 r golden_settings_gc_10_3_6 +ffffffff82daa7e0 r golden_settings_gc_10_3_7 +ffffffff82dab000 r gfx_v11_0_ip_funcs +ffffffff82dab0a8 R gfx_v11_0_ip_block +ffffffff82dab0c0 r gfx_v11_0_gfx_funcs +ffffffff82dab120 r gfx_v11_0_kiq_pm4_funcs +ffffffff82dab160 r gfx_v11_0_ring_funcs_kiq +ffffffff82dab2a0 r gfx_v11_0_ring_funcs_gfx +ffffffff82dab3e0 r gfx_v11_0_ring_funcs_compute +ffffffff82dab520 r gfx_v11_0_eop_irq_funcs +ffffffff82dab530 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82dab540 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82dab550 r gfx_v11_0_rlc_gc_fed_irq_funcs +ffffffff82dab560 r gfx_v11_0_rlc_funcs +ffffffff82dab5d0 r gfx11_cs_data +ffffffff82dab5f0 r gfx11_SECT_CONTEXT_defs +ffffffff82dab670 r gfx11_SECT_CONTEXT_def_1 +ffffffff82dab9d0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82dab9e0 r gfx11_SECT_CONTEXT_def_5 +ffffffff82dab9e8 r gfx11_SECT_CONTEXT_def_6 +ffffffff82dab9f0 r gfx11_SECT_CONTEXT_def_2 +ffffffff82dabe30 r gfx11_SECT_CONTEXT_def_4 +ffffffff82dac0b0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82dac520 r golden_settings_gc_11_0_1 +ffffffff82dac600 r golden_settings_gc_11_0 +ffffffff82dad000 r gfx_v8_0_ip_funcs +ffffffff82dad0a8 R gfx_v8_0_ip_block +ffffffff82dad0c0 R gfx_v8_1_ip_block +ffffffff82dad0d8 r gfx_v8_0_gfx_funcs +ffffffff82dad138 r gfx_v8_0_ring_funcs_kiq +ffffffff82dad278 r gfx_v8_0_ring_funcs_gfx +ffffffff82dad3b8 r gfx_v8_0_ring_funcs_compute +ffffffff82dad500 r amdgpu_gds_reg_offset +ffffffff82dad600 r gfx_v8_0_eop_irq_funcs +ffffffff82dad610 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82dad620 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82dad630 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82dad640 r gfx_v8_0_sq_irq_funcs +ffffffff82dad650 r sq_edc_source_names +ffffffff82dad688 r iceland_rlc_funcs +ffffffff82dad6f0 r vi_cs_data +ffffffff82dad710 r vi_SECT_CONTEXT_defs +ffffffff82dad790 r vi_SECT_CONTEXT_def_1 +ffffffff82dadae0 r vi_SECT_CONTEXT_def_3 +ffffffff82dadb00 r vi_SECT_CONTEXT_def_4 +ffffffff82dadd74 r vi_SECT_CONTEXT_def_5 +ffffffff82dadd7c r vi_SECT_CONTEXT_def_6 +ffffffff82dadd80 r vi_SECT_CONTEXT_def_2 +ffffffff82dae1d0 r vi_SECT_CONTEXT_def_7 +ffffffff82dae580 r vgpr_init_compute_shader +ffffffff82dae690 r vgpr_init_regs +ffffffff82dae720 r sgpr1_init_regs +ffffffff82dae7b0 r sgpr2_init_regs +ffffffff82dae840 r sec_ded_counter_registers +ffffffff82dae8b0 r iceland_mgcg_cgcg_init +ffffffff82daebb0 r golden_settings_iceland_a11 +ffffffff82daec70 r iceland_golden_common_all +ffffffff82daecd0 r fiji_mgcg_cgcg_init +ffffffff82daee80 r golden_settings_fiji_a10 +ffffffff82daef10 r fiji_golden_common_all +ffffffff82daef90 r tonga_mgcg_cgcg_init +ffffffff82daf320 r golden_settings_tonga_a11 +ffffffff82daf3e0 r tonga_golden_common_all +ffffffff82daf440 r golden_settings_vegam_a11 +ffffffff82daf510 r vegam_golden_common_all +ffffffff82daf560 r golden_settings_polaris11_a11 +ffffffff82daf630 r polaris11_golden_common_all +ffffffff82daf680 r golden_settings_polaris10_a11 +ffffffff82daf750 r polaris10_golden_common_all +ffffffff82daf7b0 r cz_mgcg_cgcg_init +ffffffff82dafb40 r cz_golden_settings_a11 +ffffffff82dafbd0 r cz_golden_common_all +ffffffff82dafc30 r stoney_mgcg_cgcg_init +ffffffff82dafc70 r stoney_golden_settings_a11 +ffffffff82dafcf0 r stoney_golden_common_all +ffffffff82db0000 R gfx_v9_0_ras_ops +ffffffff82db0040 r gfx_v9_0_ip_funcs +ffffffff82db00e8 R gfx_v9_0_ip_block +ffffffff82db0100 r ras_gfx_subblocks +ffffffff82db0b80 r gfx_v9_0_edc_counter_regs +ffffffff82db0f20 r gfx_v9_0_ras_fields +ffffffff82db2000 r gfx_v9_0_gfx_funcs +ffffffff82db2060 r gfx_v9_0_kiq_pm4_funcs +ffffffff82db20a0 r gfx_v9_0_ring_funcs_kiq +ffffffff82db21e0 r gfx_v9_0_ring_funcs_gfx +ffffffff82db2320 r gfx_v9_0_sw_ring_funcs_gfx +ffffffff82db2460 r gfx_v9_0_ring_funcs_compute +ffffffff82db25a0 r gfx_v9_0_eop_irq_funcs +ffffffff82db25b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82db25c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82db25d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82db25e0 r gfx_v9_0_rlc_funcs +ffffffff82db2650 r gfx9_cs_data +ffffffff82db2670 r gfx9_SECT_CONTEXT_defs +ffffffff82db2700 r gfx9_SECT_CONTEXT_def_1 +ffffffff82db2a50 r gfx9_SECT_CONTEXT_def_3 +ffffffff82db2a60 r gfx9_SECT_CONTEXT_def_4 +ffffffff82db2cd4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82db2cdc r gfx9_SECT_CONTEXT_def_6 +ffffffff82db2ce0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82db2df0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82db3260 r gfx9_SECT_CONTEXT_def_8 +ffffffff82db34d0 r vgpr_init_compute_shader_arcturus +ffffffff82db3d60 r vgpr_init_regs_arcturus +ffffffff82db3ef0 r vgpr_init_regs +ffffffff82db4080 r sgpr1_init_regs +ffffffff82db4210 r sgpr2_init_regs +ffffffff82db43a0 r golden_settings_gc_9_0 +ffffffff82db4580 r golden_settings_gc_9_0_vg10 +ffffffff82db4730 r golden_settings_gc_9_2_1 +ffffffff82db48b0 r golden_settings_gc_9_2_1_vg12 +ffffffff82db49f0 r golden_settings_gc_9_0_vg20 +ffffffff82db4b00 r golden_settings_gc_9_4_1_arct +ffffffff82db4c10 r golden_settings_gc_9_1 +ffffffff82db4e50 r golden_settings_gc_9_1_rv2 +ffffffff82db5020 r golden_settings_gc_9_1_rv1 +ffffffff82db50d0 r golden_settings_gc_9_1_rn +ffffffff82db51f0 r golden_settings_gc_9_x_common +ffffffff82db6000 R gfx_v9_4_ras_ops +ffffffff82db6040 r gfx_v9_4_edc_counter_regs +ffffffff82db6420 r gfx_v9_4_ras_fields +ffffffff82db8000 R vgpr_init_regs_aldebaran +ffffffff82db81b0 R sgpr112_init_regs_aldebaran +ffffffff82db8360 R sgpr96_init_regs_aldebaran +ffffffff82db8510 R sgpr64_init_regs_aldebaran +ffffffff82db86c0 r golden_settings_gc_9_4_2_alde +ffffffff82db8720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82db87b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82db8840 r sgpr112_init_compute_shader_aldebaran +ffffffff82db8a60 r sgpr96_init_compute_shader_aldebaran +ffffffff82db8c50 r sgpr64_init_compute_shader_aldebaran +ffffffff82db8dc0 r vgpr_init_compute_shader_aldebaran +ffffffff82db96a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82db9a20 r gfx_v9_4_2_ras_fields +ffffffff82dbb3c0 r gfx_v9_4_2_utc_blocks +ffffffff82dbc000 r gfx_v9_4_3_ip_funcs +ffffffff82dbc0a8 R gfx_v9_4_3_ip_block +ffffffff82dbc0c0 r gfx_v9_4_3_kiq_pm4_funcs +ffffffff82dbc100 r gfx_v9_4_3_ring_funcs_kiq +ffffffff82dbc240 r gfx_v9_4_3_ring_funcs_compute +ffffffff82dbc380 r gfx_v9_4_3_eop_irq_funcs +ffffffff82dbc390 r gfx_v9_4_3_priv_reg_irq_funcs +ffffffff82dbc3a0 r gfx_v9_4_3_priv_inst_irq_funcs +ffffffff82dbc3b0 r gfx_v9_4_3_rlc_funcs +ffffffff82dbc418 r gfx_v9_4_3_gfx_funcs +ffffffff82dbc480 r gfx_v9_4_3_ce_reg_list +ffffffff82dbc810 r gfx_v9_4_3_ras_mem_list_array +ffffffff82dbc970 r gfx_v9_4_3_ue_reg_list +ffffffff82dbcd30 r gfx_v9_4_3_ras_cp_mem_list +ffffffff82dbcd80 r gfx_v9_4_3_ras_gcea_mem_list +ffffffff82dbcec0 r gfx_v9_4_3_ras_gc_cane_mem_list +ffffffff82dbced0 r gfx_v9_4_3_ras_gcutcl2_mem_list +ffffffff82dbcee0 r gfx_v9_4_3_ras_gds_mem_list +ffffffff82dbcef0 r gfx_v9_4_3_ras_lds_mem_list +ffffffff82dbd110 r gfx_v9_4_3_ras_rlc_mem_list +ffffffff82dbd190 r gfx_v9_4_3_ras_sp_mem_list +ffffffff82dbd1a0 r gfx_v9_4_3_ras_spi_mem_list +ffffffff82dbd1e0 r gfx_v9_4_3_ras_sqc_mem_list +ffffffff82dbd350 r gfx_v9_4_3_ras_sq_mem_list +ffffffff82dbd390 r gfx_v9_4_3_ras_ta_mem_list +ffffffff82dbd3e0 r gfx_v9_4_3_ras_tcc_mem_list +ffffffff82dbd3f0 r gfx_v9_4_3_ras_tca_mem_list +ffffffff82dbd400 r gfx_v9_4_3_ras_tci_mem_list +ffffffff82dbd410 r gfx_v9_4_3_ras_tcp_mem_list +ffffffff82dbd5a0 r gfx_v9_4_3_ras_td_mem_list +ffffffff82dbd5d0 r gfx_v9_4_3_ras_tcx_mem_list +ffffffff82dbdb50 r gfx_v9_4_3_ras_atc_l2_mem_list +ffffffff82dbdb60 r gfx_v9_4_3_ras_utcl2_mem_list +ffffffff82dbdb70 r gfx_v9_4_3_ras_vml2_mem_list +ffffffff82dbdb80 r gfx_v9_4_3_ras_vml2_walker_mem_list +ffffffff82dbe000 R gfxhub_v1_0_funcs +ffffffff82dbf000 R gfxhub_v1_2_funcs +ffffffff82dc0000 R gfxhub_v2_0_funcs +ffffffff82dc0060 r gfxhub_v2_0_vmhub_funcs +ffffffff82dc0070 r gfxhub_client_ids +ffffffff82dc1000 R gfxhub_v2_1_funcs +ffffffff82dc1060 r gfxhub_v2_1_vmhub_funcs +ffffffff82dc1070 r gfxhub_client_ids +ffffffff82dc2000 R gfxhub_v3_0_funcs +ffffffff82dc2060 r gfxhub_v3_0_vmhub_funcs +ffffffff82dc2070 r gfxhub_client_ids +ffffffff82dc3000 R gfxhub_v3_0_3_funcs +ffffffff82dc3060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82dc3070 r gfxhub_client_ids +ffffffff82dc4000 R gmc_v10_0_ip_funcs +ffffffff82dc40a8 R gmc_v10_0_ip_block +ffffffff82dc40c0 r gmc_v10_0_gmc_funcs +ffffffff82dc4118 r gmc_v10_0_irq_funcs +ffffffff82dc4128 r gmc_v10_0_ecc_funcs +ffffffff82dc5000 R gmc_v11_0_ip_funcs +ffffffff82dc50a8 R gmc_v11_0_ip_block +ffffffff82dc50c0 r gmc_v11_0_gmc_funcs +ffffffff82dc5118 r gmc_v11_0_irq_funcs +ffffffff82dc5128 r gmc_v11_0_ecc_funcs +ffffffff82dc6000 r gmc_v7_0_ip_funcs +ffffffff82dc60a8 R gmc_v7_0_ip_block +ffffffff82dc60c0 R gmc_v7_4_ip_block +ffffffff82dc60d8 r gmc_v7_0_gmc_funcs +ffffffff82dc6130 r gmc_v7_0_irq_funcs +ffffffff82dc6140 r iceland_mgcg_cgcg_init +ffffffff82dc6150 r golden_settings_iceland_a11 +ffffffff82dc6180 r mc_cg_registers +ffffffff82dc61b0 r mc_cg_en +ffffffff82dc61e0 r mc_cg_ls_en +ffffffff82dc7000 r gmc_v8_0_ip_funcs +ffffffff82dc70a8 R gmc_v8_0_ip_block +ffffffff82dc70c0 R gmc_v8_1_ip_block +ffffffff82dc70d8 R gmc_v8_5_ip_block +ffffffff82dc70f0 r gmc_v8_0_gmc_funcs +ffffffff82dc7148 r gmc_v8_0_irq_funcs +ffffffff82dc7158 r fiji_mgcg_cgcg_init +ffffffff82dc7170 r golden_settings_fiji_a10 +ffffffff82dc71a0 r tonga_mgcg_cgcg_init +ffffffff82dc71b0 r golden_settings_tonga_a11 +ffffffff82dc7210 r golden_settings_polaris11_a11 +ffffffff82dc7240 r golden_settings_polaris10_a11 +ffffffff82dc727c r cz_mgcg_cgcg_init +ffffffff82dc7290 r stoney_mgcg_cgcg_init +ffffffff82dc72b0 r golden_settings_stoney_common +ffffffff82dc8000 R gmc_v9_0_ip_funcs +ffffffff82dc80a8 R gmc_v9_0_ip_block +ffffffff82dc80c0 r gmc_v9_0_gmc_funcs +ffffffff82dc8118 r gmc_v9_0_irq_funcs +ffffffff82dc8128 r gmc_v9_0_ecc_funcs +ffffffff82dc8140 r gfxhub_client_ids +ffffffff82dc81b0 r mmhub_client_ids_vega10 +ffffffff82dc84a0 r mmhub_client_ids_vega12 +ffffffff82dc87a0 r mmhub_client_ids_vega20 +ffffffff82dc8a90 r mmhub_client_ids_arcturus +ffffffff82dca2a0 r mmhub_client_ids_raven +ffffffff82dca460 r mmhub_client_ids_renoir +ffffffff82dca650 r mmhub_client_ids_aldebaran +ffffffff82dcbe60 r ecc_umc_mcumc_ctrl_addrs +ffffffff82dcbee0 r ecc_umc_mcumc_ctrl_mask_addrs +ffffffff82dcbf60 r golden_settings_mmhub_1_0_0 +ffffffff82dcbf90 r golden_settings_athub_1_0_0 +ffffffff82dcc000 R hdp_v4_0_funcs +ffffffff82dcd000 R hdp_v5_0_funcs +ffffffff82dce000 R hdp_v5_2_funcs +ffffffff82dcf000 R hdp_v6_0_funcs +ffffffff82dd0000 r iceland_ih_ip_funcs +ffffffff82dd00a8 R iceland_ih_ip_block +ffffffff82dd00c0 r iceland_ih_funcs +ffffffff82dd1000 r ih_v6_0_ip_funcs +ffffffff82dd10a8 R ih_v6_0_ip_block +ffffffff82dd10c0 r ih_v6_0_funcs +ffffffff82dd10e0 r ih_v6_0_self_irq_funcs +ffffffff82dd2000 r ih_v6_1_ip_funcs +ffffffff82dd20a8 R ih_v6_1_ip_block +ffffffff82dd20c0 r ih_v6_1_funcs +ffffffff82dd20e0 r ih_v6_1_self_irq_funcs +ffffffff82dd3000 R gfx_v11_0_imu_funcs +ffffffff82dd3030 r imu_rlc_ram_golden_11 +ffffffff82dd3680 r imu_rlc_ram_golden_11_0_2 +ffffffff82dd4000 r imu_rlc_ram_golden_11_0_3 +ffffffff82dd5000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82dd5140 r jpeg_v1_0_irq_funcs +ffffffff82dd6000 r jpeg_v2_0_ip_funcs +ffffffff82dd60a8 R jpeg_v2_0_ip_block +ffffffff82dd60c0 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82dd6200 r jpeg_v2_0_irq_funcs +ffffffff82dd7000 r jpeg_v2_5_ip_funcs +ffffffff82dd70a8 R jpeg_v2_5_ip_block +ffffffff82dd70c0 r jpeg_v2_6_ip_funcs +ffffffff82dd7168 R jpeg_v2_6_ip_block +ffffffff82dd7180 R jpeg_v2_6_ras_hw_ops +ffffffff82dd71c0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82dd7300 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82dd7440 r jpeg_v2_5_irq_funcs +ffffffff82dd7450 r jpeg_v2_6_ras_irq_funcs +ffffffff82dd8000 r jpeg_v3_0_ip_funcs +ffffffff82dd80a8 R jpeg_v3_0_ip_block +ffffffff82dd80c0 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82dd8200 r jpeg_v3_0_irq_funcs +ffffffff82dd9000 r jpeg_v4_0_ip_funcs +ffffffff82dd90a8 R jpeg_v4_0_ip_block +ffffffff82dd90c0 R jpeg_v4_0_ras_hw_ops +ffffffff82dd9100 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82dd9240 r jpeg_v4_0_irq_funcs +ffffffff82dd9250 r jpeg_v4_0_ras_irq_funcs +ffffffff82dda000 r jpeg_v4_0_3_ip_funcs +ffffffff82dda0a8 R jpeg_v4_0_3_ip_block +ffffffff82dda0c0 r jpeg_v4_0_3_dec_ring_vm_funcs +ffffffff82dda200 r jpeg_v4_0_3_irq_funcs +ffffffff82dda210 r jpeg_v4_0_3_ras_hw_ops +ffffffff82dda250 r jpeg_v4_0_3_ue_reg_list +ffffffff82ddb000 R lsdma_v6_0_funcs +ffffffff82ddc000 r mca_v3_0_mp0_hw_ops +ffffffff82ddc040 r mca_v3_0_mp1_hw_ops +ffffffff82ddc080 r mca_v3_0_mpio_hw_ops +ffffffff82ddd000 r mes_v10_1_ip_funcs +ffffffff82ddd0a8 R mes_v10_1_ip_block +ffffffff82ddd0c0 r mes_v10_1_funcs +ffffffff82ddd0f0 r mes_v10_1_ring_funcs +ffffffff82dde000 r mes_v11_0_ip_funcs +ffffffff82dde0a8 R mes_v11_0_ip_block +ffffffff82dde0c0 r mes_v11_0_funcs +ffffffff82dde0f0 r mes_v11_0_ring_funcs +ffffffff82ddf000 R mmhub_v1_0_funcs +ffffffff82ddf050 r mmhub_v1_0_edc_cnt_regs +ffffffff82ddf0c0 r mmhub_v1_0_ras_fields +ffffffff82de0000 R mmhub_v1_7_funcs +ffffffff82de0050 r mmhub_v1_7_edc_cnt_regs +ffffffff82de0250 r mmhub_v1_7_ras_fields +ffffffff82de19c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82de2000 R mmhub_v1_8_funcs +ffffffff82de2050 r mmhub_v1_8_ras_hw_ops +ffffffff82de2090 r mmhub_v1_8_ce_reg_list +ffffffff82de2180 r mmhub_v1_8_ras_memory_list +ffffffff82de22b0 r mmhub_v1_8_ue_reg_list +ffffffff82de3000 R mmhub_v2_0_funcs +ffffffff82de3050 r mmhub_v2_0_vmhub_funcs +ffffffff82de3060 r mmhub_client_ids_navi1x +ffffffff82de3190 r mmhub_client_ids_sienna_cichlid +ffffffff82de3450 r mmhub_client_ids_beige_goby +ffffffff82de4000 R mmhub_v2_3_funcs +ffffffff82de4050 r mmhub_v2_3_vmhub_funcs +ffffffff82de4060 r mmhub_client_ids_vangogh +ffffffff82de5000 R mmhub_v3_0_funcs +ffffffff82de5050 r mmhub_v3_0_vmhub_funcs +ffffffff82de5060 r mmhub_client_ids_v3_0_0 +ffffffff82de6000 R mmhub_v3_0_1_funcs +ffffffff82de6050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82de6060 r mmhub_client_ids_v3_0_1 +ffffffff82de7000 R mmhub_v3_0_2_funcs +ffffffff82de7050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82de7060 r mmhub_client_ids_v3_0_2 +ffffffff82de8000 R mmhub_v9_4_ras_hw_ops +ffffffff82de8040 R mmhub_v9_4_funcs +ffffffff82de8090 r mmhub_v9_4_edc_cnt_regs +ffffffff82de8330 r mmhub_v9_4_ras_fields +ffffffff82dea3b0 r mmhub_v9_4_err_status_regs +ffffffff82deb000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82deb010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82deb020 R xgpu_ai_virt_ops +ffffffff82dec000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82dec010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82dec020 R xgpu_nv_virt_ops +ffffffff82ded000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82ded240 r xgpu_fiji_golden_settings_a10 +ffffffff82ded370 r xgpu_fiji_golden_common_all +ffffffff82ded3f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82ded810 r xgpu_tonga_golden_settings_a11 +ffffffff82ded9d0 r xgpu_tonga_golden_common_all +ffffffff82deda28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82deda38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82deda48 R xgpu_vi_virt_ops +ffffffff82dee000 r navi10_ih_ip_funcs +ffffffff82dee0a8 R navi10_ih_ip_block +ffffffff82dee0c0 r navi10_ih_funcs +ffffffff82dee0e0 r navi10_ih_self_irq_funcs +ffffffff82def000 R nbio_v2_3_hdp_flush_reg +ffffffff82def048 R nbio_v2_3_funcs +ffffffff82df0000 R nbio_v4_3_hdp_flush_reg +ffffffff82df0048 R nbio_v4_3_funcs +ffffffff82df0158 R nbio_v4_3_sriov_funcs +ffffffff82df0268 r nbio_v4_3_ras_err_event_athub_irq_funcs +ffffffff82df1000 R nbio_v6_1_hdp_flush_reg +ffffffff82df1048 R nbio_v6_1_funcs +ffffffff82df2000 R nbio_v7_0_hdp_flush_reg +ffffffff82df2048 R nbio_v7_0_funcs +ffffffff82df3000 R nbio_v7_2_hdp_flush_reg +ffffffff82df3048 R nbio_v7_2_funcs +ffffffff82df4000 R nbio_v7_4_hdp_flush_reg +ffffffff82df4048 R nbio_v7_4_ras_hw_ops +ffffffff82df4088 R nbio_v7_4_funcs +ffffffff82df4198 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82df41a8 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82df5000 R nbio_v7_7_hdp_flush_reg +ffffffff82df5048 R nbio_v7_7_funcs +ffffffff82df6000 R nbio_v7_9_hdp_flush_reg +ffffffff82df6048 R nbio_v7_9_funcs +ffffffff82df6158 R nbio_v7_9_ras_hw_ops +ffffffff82df6198 r nbio_v7_9_ras_controller_irq_funcs +ffffffff82df61a8 r nbio_v7_9_ras_err_event_athub_irq_funcs +ffffffff82df7000 r nv_common_ip_funcs +ffffffff82df70a8 R nv_common_ip_block +ffffffff82df70c0 r nv_asic_funcs +ffffffff82df7180 r nv_allowed_read_registers +ffffffff82df7300 r sc_video_codecs_encode +ffffffff82df7310 r sc_video_codecs_decode_vcn1 +ffffffff82df7320 r sc_video_codecs_decode_vcn0 +ffffffff82df7330 r yc_video_codecs_decode +ffffffff82df7340 r bg_video_codecs_encode +ffffffff82df7350 r bg_video_codecs_decode +ffffffff82df7360 r nv_video_codecs_encode +ffffffff82df7370 r nv_video_codecs_decode +ffffffff82df7380 r sc_video_codecs_encode_array +ffffffff82df73b0 r sc_video_codecs_decode_array_vcn1 +ffffffff82df7440 r sc_video_codecs_decode_array_vcn0 +ffffffff82df74e0 r yc_video_codecs_decode_array +ffffffff82df7550 r bg_video_codecs_decode_array +ffffffff82df7590 r nv_video_codecs_encode_array +ffffffff82df75c0 r nv_video_codecs_decode_array +ffffffff82df8000 r psp_v10_0_funcs +ffffffff82df9000 r psp_v11_0_funcs +ffffffff82dfa000 r psp_v11_0_8_funcs +ffffffff82dfb000 r psp_v12_0_funcs +ffffffff82dfc000 r psp_v13_0_funcs +ffffffff82dfd000 r psp_v13_0_4_funcs +ffffffff82dfe000 r psp_v3_1_funcs +ffffffff82dff000 r sdma_v2_4_ip_funcs +ffffffff82dff0a8 R sdma_v2_4_ip_block +ffffffff82dff0c0 r sdma_v2_4_ring_funcs +ffffffff82dff200 r sdma_v2_4_buffer_funcs +ffffffff82dff220 r sdma_v2_4_vm_pte_funcs +ffffffff82dff240 r sdma_v2_4_trap_irq_funcs +ffffffff82dff250 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82dff260 r iceland_mgcg_cgcg_init +ffffffff82dff280 r golden_settings_iceland_a11 +ffffffff82e00000 r sdma_v3_0_ip_funcs +ffffffff82e000a8 R sdma_v3_0_ip_block +ffffffff82e000c0 R sdma_v3_1_ip_block +ffffffff82e000d8 r sdma_v3_0_ring_funcs +ffffffff82e00218 r sdma_v3_0_buffer_funcs +ffffffff82e00238 r sdma_v3_0_vm_pte_funcs +ffffffff82e00258 r sdma_v3_0_trap_irq_funcs +ffffffff82e00268 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82e00280 r fiji_mgcg_cgcg_init +ffffffff82e002a0 r golden_settings_fiji_a10 +ffffffff82e00300 r tonga_mgcg_cgcg_init +ffffffff82e00320 r golden_settings_tonga_a11 +ffffffff82e003a0 r golden_settings_polaris11_a11 +ffffffff82e00420 r golden_settings_polaris10_a11 +ffffffff82e004a0 r cz_mgcg_cgcg_init +ffffffff82e004c0 r cz_golden_settings_a11 +ffffffff82e00550 r stoney_mgcg_cgcg_init +ffffffff82e00560 r stoney_golden_settings_a11 +ffffffff82e01000 R sdma_v4_0_ip_funcs +ffffffff82e010a8 R sdma_v4_0_ras_hw_ops +ffffffff82e010e8 R sdma_v4_0_ip_block +ffffffff82e01100 r sdma_v4_0_ring_funcs +ffffffff82e01240 r sdma_v4_0_page_ring_funcs +ffffffff82e01380 r sdma_v4_0_buffer_funcs +ffffffff82e013a0 r sdma_v4_0_vm_pte_funcs +ffffffff82e013c0 r sdma_v4_0_trap_irq_funcs +ffffffff82e013d0 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82e013e0 r sdma_v4_0_ecc_irq_funcs +ffffffff82e013f0 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82e01400 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82e01410 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82e01420 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82e01430 r golden_settings_sdma_4 +ffffffff82e01690 r golden_settings_sdma_vg10 +ffffffff82e01740 r golden_settings_sdma_vg12 +ffffffff82e017f0 r golden_settings_sdma0_4_2_init +ffffffff82e01810 r golden_settings_sdma0_4_2 +ffffffff82e01aa0 r golden_settings_sdma1_4_2 +ffffffff82e01d30 r golden_settings_sdma_arct +ffffffff82e02030 r golden_settings_sdma_aldebaran +ffffffff82e021a0 r golden_settings_sdma_4_1 +ffffffff82e022b0 r golden_settings_sdma_rv2 +ffffffff82e022e0 r golden_settings_sdma_rv1 +ffffffff82e02310 r golden_settings_sdma_4_3 +ffffffff82e02400 r sdma_v4_0_ras_fields +ffffffff82e03000 R sdma_v4_4_ras_hw_ops +ffffffff82e03040 r sdma_v4_4_ras_fields +ffffffff82e04000 R sdma_v4_4_2_ip_funcs +ffffffff82e040a8 R sdma_v4_4_2_ip_block +ffffffff82e040c0 r sdma_v4_4_2_ring_funcs +ffffffff82e04200 r sdma_v4_4_2_page_ring_funcs +ffffffff82e04340 r sdma_v4_4_2_buffer_funcs +ffffffff82e04360 r sdma_v4_4_2_vm_pte_funcs +ffffffff82e04380 r sdma_v4_4_2_trap_irq_funcs +ffffffff82e04390 r sdma_v4_4_2_illegal_inst_irq_funcs +ffffffff82e043a0 r sdma_v4_4_2_ecc_irq_funcs +ffffffff82e043b0 r sdma_v4_4_2_vm_hole_irq_funcs +ffffffff82e043c0 r sdma_v4_4_2_doorbell_invalid_irq_funcs +ffffffff82e043d0 r sdma_v4_4_2_pool_timeout_irq_funcs +ffffffff82e043e0 r sdma_v4_4_2_srbm_write_irq_funcs +ffffffff82e043f0 r sdma_v4_4_2_ras_hw_ops +ffffffff82e04430 r sdma_v4_2_2_ue_reg_list +ffffffff82e04460 r sdma_v4_4_2_ras_memory_list +ffffffff82e05000 R sdma_v5_0_ip_funcs +ffffffff82e050a8 R sdma_v5_0_ip_block +ffffffff82e050c0 r sdma_v5_0_ring_funcs +ffffffff82e05200 r sdma_v5_0_buffer_funcs +ffffffff82e05220 r sdma_v5_0_vm_pte_funcs +ffffffff82e05240 r sdma_v5_0_trap_irq_funcs +ffffffff82e05250 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82e05260 r golden_settings_sdma_5 +ffffffff82e054a0 r golden_settings_sdma_nv10 +ffffffff82e054d0 r golden_settings_sdma_nv14 +ffffffff82e05500 r golden_settings_sdma_5_sriov +ffffffff82e056e0 r golden_settings_sdma_nv12 +ffffffff82e05770 r golden_settings_sdma_cyan_skillfish +ffffffff82e06000 R sdma_v5_2_ip_funcs +ffffffff82e060a8 R sdma_v5_2_ip_block +ffffffff82e060c0 r sdma_v5_2_ring_funcs +ffffffff82e06200 r sdma_v5_2_buffer_funcs +ffffffff82e06220 r sdma_v5_2_vm_pte_funcs +ffffffff82e06240 r sdma_v5_2_trap_irq_funcs +ffffffff82e06250 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82e07000 R sdma_v6_0_ip_funcs +ffffffff82e070a8 R sdma_v6_0_ip_block +ffffffff82e070c0 r sdma_v6_0_ring_funcs +ffffffff82e07200 r sdma_v6_0_buffer_funcs +ffffffff82e07220 r sdma_v6_0_vm_pte_funcs +ffffffff82e07240 r sdma_v6_0_trap_irq_funcs +ffffffff82e07250 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82e08000 r smu_v11_0_i2c_algo +ffffffff82e08010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82e08028 r smu_v11_0_i2c_control_quirks +ffffffff82e09000 R smuio_v11_0_funcs +ffffffff82e0a000 R smuio_v11_0_6_funcs +ffffffff82e0b000 R smuio_v13_0_funcs +ffffffff82e0c000 R smuio_v13_0_3_funcs +ffffffff82e0d000 R smuio_v13_0_6_funcs +ffffffff82e0e000 R smuio_v9_0_funcs +ffffffff82e0f000 r soc15_common_ip_funcs +ffffffff82e0f0a8 R vega10_common_ip_block +ffffffff82e0f0c0 r soc15_asic_funcs +ffffffff82e0f180 r vega20_asic_funcs +ffffffff82e0f240 r aqua_vanjaram_asic_funcs +ffffffff82e0f300 r soc15_allowed_read_registers +ffffffff82e0f490 r vega_video_codecs_encode +ffffffff82e0f4a0 r vega_video_codecs_decode +ffffffff82e0f4b0 r rv_video_codecs_decode +ffffffff82e0f4c0 r rn_video_codecs_decode +ffffffff82e0f4d0 r vcn_4_0_3_video_codecs_encode +ffffffff82e0f4e0 r vcn_4_0_3_video_codecs_decode +ffffffff82e0f4f0 r vega_video_codecs_encode_array +ffffffff82e0f520 r vega_video_codecs_decode_array +ffffffff82e0f5a0 r rv_video_codecs_decode_array +ffffffff82e0f630 r rn_video_codecs_decode_array +ffffffff82e0f6c0 r vcn_4_0_3_video_codecs_decode_array +ffffffff82e10000 r soc21_common_ip_funcs +ffffffff82e100a8 R soc21_common_ip_block +ffffffff82e100c0 r soc21_asic_funcs +ffffffff82e10180 r soc21_allowed_read_registers +ffffffff82e10300 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82e10310 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82e10320 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82e10330 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82e10340 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82e10370 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82e103c0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82e10400 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82e11000 r tonga_ih_ip_funcs +ffffffff82e110a8 R tonga_ih_ip_block +ffffffff82e110c0 r tonga_ih_funcs +ffffffff82e12000 R umc_v6_0_funcs +ffffffff82e13000 R umc_v6_1_channel_idx_tbl +ffffffff82e13080 R umc_v6_1_ras_hw_ops +ffffffff82e14000 R umc_v6_7_channel_idx_tbl_second +ffffffff82e14080 R umc_v6_7_channel_idx_tbl_first +ffffffff82e14100 R umc_v6_7_ras_hw_ops +ffffffff82e15000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82e15040 R umc_v8_10_channel_idx_tbl_ext0 +ffffffff82e15080 R umc_v8_10_channel_idx_tbl +ffffffff82e150e0 R umc_v8_10_ras_hw_ops +ffffffff82e16000 R umc_v8_7_channel_idx_tbl +ffffffff82e16040 R umc_v8_7_ras_hw_ops +ffffffff82e17000 r uvd_v5_0_ip_funcs +ffffffff82e170a8 R uvd_v5_0_ip_block +ffffffff82e170c0 r uvd_v5_0_ring_funcs +ffffffff82e17200 r uvd_v5_0_irq_funcs +ffffffff82e18000 r uvd_v6_0_ip_funcs +ffffffff82e180a8 R uvd_v6_0_ip_block +ffffffff82e180c0 R uvd_v6_2_ip_block +ffffffff82e180d8 R uvd_v6_3_ip_block +ffffffff82e180f0 r uvd_v6_0_ring_vm_funcs +ffffffff82e18230 r uvd_v6_0_ring_phys_funcs +ffffffff82e18370 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82e184b0 r uvd_v6_0_irq_funcs +ffffffff82e19000 R uvd_v7_0_ip_funcs +ffffffff82e190a8 R uvd_v7_0_ip_block +ffffffff82e190c0 r uvd_v7_0_ring_vm_funcs +ffffffff82e19200 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82e19340 r uvd_v7_0_irq_funcs +ffffffff82e1a000 r vce_v3_0_ip_funcs +ffffffff82e1a0a8 R vce_v3_0_ip_block +ffffffff82e1a0c0 R vce_v3_1_ip_block +ffffffff82e1a0d8 R vce_v3_4_ip_block +ffffffff82e1a0f0 r vce_v3_0_ring_vm_funcs +ffffffff82e1a230 r vce_v3_0_ring_phys_funcs +ffffffff82e1a370 r vce_v3_0_irq_funcs +ffffffff82e1b000 R vce_v4_0_ip_funcs +ffffffff82e1b0a8 R vce_v4_0_ip_block +ffffffff82e1b0c0 r vce_v4_0_ring_vm_funcs +ffffffff82e1b200 r vce_v4_0_irq_funcs +ffffffff82e1c000 r vcn_v1_0_ip_funcs +ffffffff82e1c0a8 R vcn_v1_0_ip_block +ffffffff82e1c0c0 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82e1c200 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82e1c340 r vcn_v1_0_irq_funcs +ffffffff82e1d000 r vcn_v2_0_ip_funcs +ffffffff82e1d0a8 R vcn_v2_0_ip_block +ffffffff82e1d0c0 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82e1d200 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82e1d340 r vcn_v2_0_irq_funcs +ffffffff82e1e000 r vcn_v2_5_ip_funcs +ffffffff82e1e0a8 R vcn_v2_5_ip_block +ffffffff82e1e0c0 r vcn_v2_6_ip_funcs +ffffffff82e1e168 R vcn_v2_6_ip_block +ffffffff82e1e180 R vcn_v2_6_ras_hw_ops +ffffffff82e1e1c0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82e1e300 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82e1e440 r vcn_v2_5_irq_funcs +ffffffff82e1e450 r vcn_v2_6_ras_irq_funcs +ffffffff82e1f000 r vcn_v3_0_ip_funcs +ffffffff82e1f0a8 R vcn_v3_0_ip_block +ffffffff82e1f0c0 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82e1f200 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82e1f340 r vcn_v3_0_irq_funcs +ffffffff82e20000 r vcn_v4_0_ip_funcs +ffffffff82e200a8 R vcn_v4_0_ip_block +ffffffff82e200c0 R vcn_v4_0_ras_hw_ops +ffffffff82e20100 r vcn_v4_0_irq_funcs +ffffffff82e20110 r vcn_v4_0_ras_irq_funcs +ffffffff82e21000 r vcn_v4_0_3_ip_funcs +ffffffff82e210a8 R vcn_v4_0_3_ip_block +ffffffff82e210c0 r vcn_v4_0_3_unified_ring_vm_funcs +ffffffff82e21200 r vcn_v4_0_3_irq_funcs +ffffffff82e21210 r vcn_v4_0_3_ras_hw_ops +ffffffff82e21250 r vcn_v4_0_3_ue_reg_list +ffffffff82e22000 R vega10_ih_ip_funcs +ffffffff82e220a8 R vega10_ih_ip_block +ffffffff82e220c0 r vega10_ih_funcs +ffffffff82e220e0 r vega10_ih_self_irq_funcs +ffffffff82e23000 r GC_BASE +ffffffff82e23064 r HDP_BASE +ffffffff82e230c8 r MMHUB_BASE +ffffffff82e2312c r ATHUB_BASE +ffffffff82e23190 r NBIO_BASE +ffffffff82e231f4 r MP0_BASE +ffffffff82e23258 r MP1_BASE +ffffffff82e232bc r VCE_BASE +ffffffff82e23320 r VCN_BASE +ffffffff82e23384 r DF_BASE +ffffffff82e233e8 r DCE_BASE +ffffffff82e2344c r OSSSYS_BASE +ffffffff82e234b0 r SDMA0_BASE +ffffffff82e23514 r SDMA1_BASE +ffffffff82e23578 r SMUIO_BASE +ffffffff82e235dc r PWR_BASE +ffffffff82e23640 r NBIF_BASE +ffffffff82e236a4 r THM_BASE +ffffffff82e23708 r CLK_BASE +ffffffff82e24000 R vega20_ih_ip_funcs +ffffffff82e240a8 R vega20_ih_ip_block +ffffffff82e240c0 r vega20_ih_funcs +ffffffff82e240e0 r vega20_ih_self_irq_funcs +ffffffff82e25000 r GC_BASE +ffffffff82e25090 r HDP_BASE +ffffffff82e25120 r MMHUB_BASE +ffffffff82e251b0 r ATHUB_BASE +ffffffff82e25240 r NBIO_BASE +ffffffff82e252d0 r MP0_BASE +ffffffff82e25360 r MP1_BASE +ffffffff82e253f0 r UVD_BASE +ffffffff82e25480 r VCE_BASE +ffffffff82e25510 r DF_BASE +ffffffff82e255a0 r DCE_BASE +ffffffff82e25630 r OSSSYS_BASE +ffffffff82e256c0 r SDMA0_BASE +ffffffff82e25750 r SDMA1_BASE +ffffffff82e257e0 r SMUIO_BASE +ffffffff82e25870 r THM_BASE +ffffffff82e25900 r CLK_BASE +ffffffff82e25990 r UMC_BASE +ffffffff82e25a20 r RSMU_BASE +ffffffff82e26000 r vi_common_ip_block +ffffffff82e26018 r vi_common_ip_funcs +ffffffff82e260c0 r vi_asic_funcs +ffffffff82e26180 r vi_allowed_read_registers +ffffffff82e263e0 r topaz_video_codecs_encode +ffffffff82e263f0 r topaz_video_codecs_decode +ffffffff82e26400 r tonga_video_codecs_encode +ffffffff82e26410 r tonga_video_codecs_decode +ffffffff82e26420 r polaris_video_codecs_encode +ffffffff82e26430 r cz_video_codecs_decode +ffffffff82e26440 r tonga_video_codecs_encode_array +ffffffff82e26460 r tonga_video_codecs_decode_array +ffffffff82e264b0 r polaris_video_codecs_encode_array +ffffffff82e264e0 r cz_video_codecs_decode_array +ffffffff82e26560 r iceland_mgcg_cgcg_init +ffffffff82e265a0 r fiji_mgcg_cgcg_init +ffffffff82e26600 r tonga_mgcg_cgcg_init +ffffffff82e26660 r cz_mgcg_cgcg_init +ffffffff82e266a0 r stoney_mgcg_cgcg_init +ffffffff82e27000 r amdgpu_dm_funcs +ffffffff82e270a8 R dm_ip_block +ffffffff82e270c0 R amdgpu_dm_encoder_helper_funcs +ffffffff82e27128 r dm_display_funcs +ffffffff82e27180 r hpd_disconnect_quirk_table +ffffffff82e27ef0 r amdgpu_dm_mode_funcs +ffffffff82e27f38 r amdgpu_dm_audio_component_bind_ops +ffffffff82e27f48 r amdgpu_dm_audio_component_ops +ffffffff82e27f80 r amdgpu_dm_encoder_funcs +ffffffff82e27fa0 r amdgpu_dm_connector_funcs +ffffffff82e28018 r amdgpu_dm_connector_helper_funcs +ffffffff82e28078 r amdgpu_dm_i2c_algo +ffffffff82e28088 r amdgpu_dm_backlight_ops +ffffffff82e28260 r add_fs_modes.common_rates +ffffffff82e29000 r amdgpu_dm_crtc_funcs +ffffffff82e290c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82e2a000 r dm_dtn_log_begin.msg +ffffffff82e2a00d r dm_dtn_log_end.msg +ffffffff82e2a018 r SYNAPTICS_DEVICE_ID +ffffffff82e2b000 r dm_crtc_irq_funcs +ffffffff82e2b010 r dm_vline0_irq_funcs +ffffffff82e2b020 r dm_dmub_outbox_irq_funcs +ffffffff82e2b030 r dm_vupdate_irq_funcs +ffffffff82e2b040 r dm_dmub_trace_irq_funcs +ffffffff82e2b050 r dm_pageflip_irq_funcs +ffffffff82e2b060 r dm_hpd_irq_funcs +ffffffff82e2c000 r amdgpu_dm_encoder_funcs +ffffffff82e2c020 r dm_mst_cbs +ffffffff82e2c030 r dm_dp_mst_connector_funcs +ffffffff82e2c0a8 r dm_dp_mst_connector_helper_funcs +ffffffff82e2d000 r dm_plane_funcs +ffffffff82e2d068 r dm_plane_helper_funcs +ffffffff82e2f000 r vbios_funcs +ffffffff82e30000 r vbios_funcs +ffffffff82e35000 r command_table_helper_funcs +ffffffff82e36000 r command_table_helper_funcs +ffffffff82e37000 r command_table_helper_funcs +ffffffff82e38000 r command_table_helper_funcs +ffffffff82e39000 r dce80_max_clks_by_state +ffffffff82e39028 r disp_clk_regs +ffffffff82e3907c r disp_clk_shift +ffffffff82e39088 r disp_clk_mask +ffffffff82e3a000 r dce110_max_clks_by_state +ffffffff82e3a028 r disp_clk_regs +ffffffff82e3a07c r disp_clk_shift +ffffffff82e3a088 r disp_clk_mask +ffffffff82e3b000 r dce112_max_clks_by_state +ffffffff82e3b028 r disp_clk_regs +ffffffff82e3b07c r disp_clk_shift +ffffffff82e3b088 r disp_clk_mask +ffffffff82e3c000 r dce120_max_clks_by_state +ffffffff82e3d000 r clk_mgr_regs +ffffffff82e3d054 r clk_mgr_shift +ffffffff82e3d060 r clk_mgr_mask +ffffffff82e3e000 r clk_mgr_regs +ffffffff82e3e054 r clk_mgr_shift +ffffffff82e3e060 r clk_mgr_mask +ffffffff82e3f000 r clk_mgr_regs +ffffffff82e3f054 r clk_mgr_shift +ffffffff82e3f060 r clk_mgr_mask +ffffffff82e40000 r lpddr5_wm_table +ffffffff82e400c0 r ddr5_wm_table +ffffffff82e41000 r lpddr5_wm_table +ffffffff82e410c0 r ddr5_wm_table +ffffffff82e42000 r ddr5_wm_table +ffffffff82e43000 r lpddr5_wm_table +ffffffff82e430c0 r ddr4_wm_table +ffffffff82e44000 r clk_mgr_regs_dcn321 +ffffffff82e44054 r clk_mgr_shift_dcn321 +ffffffff82e44060 r clk_mgr_mask_dcn321 +ffffffff82e44084 r clk_mgr_regs_dcn32 +ffffffff82e440d8 r clk_mgr_shift_dcn32 +ffffffff82e440e4 r clk_mgr_mask_dcn32 +ffffffff82e45000 r DC_BUILD_ID +ffffffff82e47000 r output_csc_matrix +ffffffff82e470e0 r black_color_format +ffffffff82e4a000 r dce_funcs +ffffffff82e4b000 r funcs +ffffffff82e4c000 R video_optimized_pixel_rates +ffffffff82e4c1c0 r dce110_clk_src_funcs +ffffffff82e4c1e8 r dce112_clk_src_funcs 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r filter_4tap_16p_183 +ffffffff82e53580 r filter_4tap_64p_upscale +ffffffff82e53690 r filter_4tap_64p_116 +ffffffff82e537a0 r filter_4tap_64p_149 +ffffffff82e538b0 r filter_4tap_64p_183 +ffffffff82e539c0 r filter_5tap_64p_upscale +ffffffff82e53b10 r filter_5tap_64p_116 +ffffffff82e53c60 r filter_5tap_64p_149 +ffffffff82e53db0 r filter_5tap_64p_183 +ffffffff82e53f00 r filter_6tap_64p_upscale +ffffffff82e54090 r filter_6tap_64p_116 +ffffffff82e54220 r filter_6tap_64p_149 +ffffffff82e543b0 r filter_6tap_64p_183 +ffffffff82e54540 r filter_7tap_64p_upscale +ffffffff82e54710 r filter_7tap_64p_116 +ffffffff82e548e0 r filter_7tap_64p_149 +ffffffff82e54ab0 r filter_7tap_64p_183 +ffffffff82e54c80 r filter_8tap_64p_upscale +ffffffff82e54e90 r filter_8tap_64p_116 +ffffffff82e550a0 r filter_8tap_64p_149 +ffffffff82e552b0 r filter_8tap_64p_183 +ffffffff82e554c0 r filter_2tap_16p +ffffffff82e554f0 r filter_2tap_64p +ffffffff82e56000 r dce110_str_enc_funcs +ffffffff82e56120 r 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link_enc_regs +ffffffff82eeab80 r link_enc_aux_regs +ffffffff82eeaba0 r link_enc_hpd_regs +ffffffff82eeaba8 r le_shift +ffffffff82eeac98 r le_mask +ffffffff82eeb050 r link_enc_feature +ffffffff82eeb060 r cs_shift +ffffffff82eeb06c r cs_mask +ffffffff82eeb094 r hubbub_reg +ffffffff82eeb21c r hubbub_shift +ffffffff82eeb2ac r hubbub_mask +ffffffff82eeb4f0 r vmid_regs +ffffffff82eeb6b0 r vmid_shifts +ffffffff82eeb6b8 r vmid_masks +ffffffff82eeb6e0 r hubp_regs +ffffffff82eebaf8 r hubp_shift +ffffffff82eebbf4 r hubp_mask +ffffffff82eebff0 r dpp_regs +ffffffff82eeca78 r tf_shift +ffffffff82eecd4c r tf_mask +ffffffff82eed890 r opp_regs +ffffffff82eed940 r opp_shift +ffffffff82eed978 r opp_mask +ffffffff82eeda50 r optc_regs +ffffffff82eedd20 r optc_shift +ffffffff82eeddf4 r optc_mask +ffffffff82eee13c r mpc_regs +ffffffff82eef928 r mpc_shift +ffffffff82eefa04 r mpc_mask +ffffffff82eefd70 r dsc_regs +ffffffff82eefef8 r dsc_shift +ffffffff82eeffb0 r dsc_mask +ffffffff82ef0290 r dwbc30_regs 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r opp_shift +ffffffff82f0c028 r opp_mask +ffffffff82f0c100 r optc_regs +ffffffff82f0c6a0 r optc_shift +ffffffff82f0c774 r optc_mask +ffffffff82f0cabc r mpc_regs +ffffffff82f0e2a8 r mpc_shift +ffffffff82f0e384 r mpc_mask +ffffffff82f0e6f0 r dsc_regs +ffffffff82f0ea00 r dsc_shift +ffffffff82f0eab8 r dsc_mask +ffffffff82f0ed90 r dwbc30_regs +ffffffff82f0ef6c r dwbc30_shift +ffffffff82f0f0a0 r dwbc30_mask +ffffffff82f0f570 r mcif_wb30_regs +ffffffff82f0f66c r mcif_wb30_shift +ffffffff82f0f718 r mcif_wb30_mask +ffffffff82f0f9d0 r aux_engine_regs +ffffffff82f0fa98 r aux_mask +ffffffff82f0faf8 r aux_shift +ffffffff82f0fb10 r i2c_hw_regs +ffffffff82f0fc28 r i2c_shifts +ffffffff82f0fc54 r i2c_masks +ffffffff82f0fd00 r audio_regs +ffffffff82f0fe34 r audio_shift +ffffffff82f0fe4c r audio_mask +ffffffff82f0fe90 r stream_enc_regs +ffffffff82f10534 r se_shift +ffffffff82f10610 r se_mask +ffffffff82f10980 r vpg_regs +ffffffff82f10a70 r vpg_shift +ffffffff82f10a98 r vpg_mask +ffffffff82f10b40 r afmt_regs +ffffffff82f10c18 r afmt_shift +ffffffff82f10c2c r afmt_mask +ffffffff82f10c80 r hpo_dp_stream_enc_regs +ffffffff82f10eb0 r hpo_dp_se_shift +ffffffff82f10ed8 r hpo_dp_se_mask +ffffffff82f10f80 r apg_regs +ffffffff82f10fc0 r apg_shift +ffffffff82f10fc8 r apg_mask +ffffffff82f10fe0 r hpo_dp_link_enc_regs +ffffffff82f110f0 r hpo_dp_le_shift +ffffffff82f1110c r hpo_dp_le_mask +ffffffff82f11170 r hwseq_reg +ffffffff82f1138c r hwseq_shift +ffffffff82f1140c r hwseq_mask +ffffffff82f12000 r bios_regs +ffffffff82f12008 r res_cap_dcn31 +ffffffff82f12050 r clk_src_regs +ffffffff82f121f4 r dccg_regs +ffffffff82f122e4 r dccg_shift +ffffffff82f12384 r dccg_mask +ffffffff82f12600 r abm_regs +ffffffff82f127a0 r abm_shift +ffffffff82f127c4 r abm_mask +ffffffff82f12850 r res_create_funcs +ffffffff82f12880 r plane_cap +ffffffff82f128b0 r link_enc_regs +ffffffff82f12f10 r link_enc_aux_regs +ffffffff82f12f60 r link_enc_hpd_regs +ffffffff82f12f74 r le_shift +ffffffff82f13064 r le_mask +ffffffff82f1341c r link_enc_feature +ffffffff82f1342c r panel_config_defaults +ffffffff82f13480 r debug_defaults_drv +ffffffff82f13628 r cs_shift +ffffffff82f13634 r cs_mask +ffffffff82f1365c r hubbub_reg +ffffffff82f137e4 r hubbub_shift +ffffffff82f13874 r hubbub_mask +ffffffff82f13ab0 r vmid_regs +ffffffff82f13c70 r vmid_shifts +ffffffff82f13c78 r vmid_masks +ffffffff82f13ca0 r hubp_regs +ffffffff82f144d0 r hubp_shift +ffffffff82f145cc r hubp_mask +ffffffff82f149c0 r dpp_regs +ffffffff82f15ed0 r tf_shift +ffffffff82f161a4 r tf_mask +ffffffff82f16cf0 r opp_regs +ffffffff82f16e50 r opp_shift +ffffffff82f16e88 r opp_mask +ffffffff82f16f60 r optc_regs +ffffffff82f17500 r optc_shift +ffffffff82f175d4 r optc_mask +ffffffff82f1791c r mpc_regs +ffffffff82f19108 r mpc_shift +ffffffff82f191e4 r mpc_mask +ffffffff82f19550 r dsc_regs +ffffffff82f1979c r dsc_shift +ffffffff82f19854 r dsc_mask +ffffffff82f19b30 r dwbc30_regs +ffffffff82f19d0c r dwbc30_shift +ffffffff82f19e40 r dwbc30_mask +ffffffff82f1a310 r mcif_wb30_regs +ffffffff82f1a40c r mcif_wb30_shift +ffffffff82f1a4b8 r mcif_wb30_mask +ffffffff82f1a770 r aux_engine_regs +ffffffff82f1a838 r aux_mask +ffffffff82f1a898 r aux_shift +ffffffff82f1a8b0 r i2c_hw_regs +ffffffff82f1a9c8 r i2c_shifts +ffffffff82f1a9f4 r i2c_masks +ffffffff82f1aaa0 r audio_regs +ffffffff82f1abd4 r audio_shift +ffffffff82f1abec r audio_mask +ffffffff82f1ac30 r stream_enc_regs +ffffffff82f1b2d4 r se_shift +ffffffff82f1b3b0 r se_mask +ffffffff82f1b720 r vpg_regs +ffffffff82f1b810 r vpg_shift +ffffffff82f1b838 r vpg_mask +ffffffff82f1b8e0 r afmt_regs +ffffffff82f1b9b8 r afmt_shift +ffffffff82f1b9cc r afmt_mask +ffffffff82f1ba20 r hpo_dp_stream_enc_regs +ffffffff82f1bc50 r hpo_dp_se_shift +ffffffff82f1bc78 r hpo_dp_se_mask +ffffffff82f1bd20 r apg_regs +ffffffff82f1bd60 r apg_shift +ffffffff82f1bd68 r apg_mask +ffffffff82f1bd80 r hpo_dp_link_enc_regs +ffffffff82f1be90 r hpo_dp_le_shift +ffffffff82f1beac r hpo_dp_le_mask +ffffffff82f1bf10 r hwseq_reg +ffffffff82f1c12c r hwseq_shift +ffffffff82f1c1ac r hwseq_mask +ffffffff82f1d000 r bios_regs +ffffffff82f1d008 r res_cap_dcn31 +ffffffff82f1d050 r clk_src_regs +ffffffff82f1d1f4 r dccg_regs +ffffffff82f1d2e4 r dccg_shift +ffffffff82f1d384 r dccg_mask +ffffffff82f1d600 r abm_regs +ffffffff82f1d7a0 r abm_shift +ffffffff82f1d7c4 r abm_mask +ffffffff82f1d850 r res_create_funcs +ffffffff82f1d880 r plane_cap +ffffffff82f1d8b0 r link_enc_regs +ffffffff82f1df10 r link_enc_aux_regs +ffffffff82f1df60 r link_enc_hpd_regs +ffffffff82f1df74 r le_shift +ffffffff82f1e064 r le_mask +ffffffff82f1e41c r link_enc_feature +ffffffff82f1e42c r panel_config_defaults +ffffffff82f1e480 r debug_defaults_drv +ffffffff82f1e628 r cs_shift +ffffffff82f1e634 r cs_mask +ffffffff82f1e65c r hubbub_reg +ffffffff82f1e7e4 r hubbub_shift +ffffffff82f1e874 r hubbub_mask +ffffffff82f1eab0 r vmid_regs +ffffffff82f1ec70 r vmid_shifts +ffffffff82f1ec78 r vmid_masks +ffffffff82f1eca0 r hubp_regs +ffffffff82f1f4d0 r hubp_shift +ffffffff82f1f5cc r hubp_mask +ffffffff82f1f9c0 r dpp_regs +ffffffff82f20ed0 r tf_shift +ffffffff82f211a4 r tf_mask +ffffffff82f21cf0 r opp_regs +ffffffff82f21e50 r opp_shift +ffffffff82f21e88 r opp_mask +ffffffff82f21f60 r optc_regs +ffffffff82f22500 r optc_shift +ffffffff82f225d4 r optc_mask +ffffffff82f2291c r mpc_regs +ffffffff82f24108 r mpc_shift +ffffffff82f241e4 r mpc_mask +ffffffff82f24550 r dsc_regs +ffffffff82f2479c r dsc_shift +ffffffff82f24854 r dsc_mask +ffffffff82f24b30 r dwbc30_regs +ffffffff82f24d0c r dwbc30_shift +ffffffff82f24e40 r dwbc30_mask +ffffffff82f25310 r mcif_wb30_regs +ffffffff82f2540c r mcif_wb30_shift +ffffffff82f254b8 r mcif_wb30_mask +ffffffff82f25770 r aux_engine_regs +ffffffff82f25838 r aux_mask +ffffffff82f25898 r aux_shift +ffffffff82f258b0 r i2c_hw_regs +ffffffff82f259c8 r i2c_shifts +ffffffff82f259f4 r i2c_masks +ffffffff82f25aa0 r audio_regs +ffffffff82f25bd4 r audio_shift +ffffffff82f25bec r audio_mask +ffffffff82f25c30 r stream_enc_regs +ffffffff82f262d4 r se_shift +ffffffff82f263b0 r se_mask +ffffffff82f26720 r vpg_regs +ffffffff82f26810 r vpg_shift +ffffffff82f26838 r vpg_mask +ffffffff82f268e0 r afmt_regs +ffffffff82f269b8 r afmt_shift +ffffffff82f269cc r afmt_mask +ffffffff82f26a20 r hpo_dp_stream_enc_regs +ffffffff82f26c50 r hpo_dp_se_shift +ffffffff82f26c78 r hpo_dp_se_mask +ffffffff82f26d20 r apg_regs +ffffffff82f26d60 r apg_shift +ffffffff82f26d68 r apg_mask +ffffffff82f26d80 r hpo_dp_link_enc_regs +ffffffff82f26e90 r hpo_dp_le_shift +ffffffff82f26eac r hpo_dp_le_mask +ffffffff82f26f10 r hwseq_reg +ffffffff82f2712c r hwseq_shift +ffffffff82f271ac r hwseq_mask +ffffffff82f28000 r dccg32_funcs +ffffffff82f29000 r dcn32_link_enc_funcs +ffffffff82f2a000 r dcn32_str_enc_funcs +ffffffff82f2b000 r hubbub32_funcs +ffffffff82f2c000 r dcn32_funcs +ffffffff82f2c2e8 r dcn32_private_funcs +ffffffff82f2d000 r dcn32_mmhubbub_funcs +ffffffff82f2e000 r dcn32_mpc_funcs +ffffffff82f2f000 r res_cap_dcn32 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r debug_defaults_drv +ffffffff82f35ac0 r cs_shift +ffffffff82f35acc r cs_mask +ffffffff82f35af4 r hubbub_shift +ffffffff82f35b84 r hubbub_mask +ffffffff82f35dbc r vmid_shifts +ffffffff82f35dc4 r vmid_masks +ffffffff82f35de4 r hubp_shift +ffffffff82f35ee0 r hubp_mask +ffffffff82f362d0 r tf_shift +ffffffff82f365a4 r tf_mask +ffffffff82f370e8 r opp_shift +ffffffff82f37120 r opp_mask +ffffffff82f371f4 r optc_shift +ffffffff82f372c8 r optc_mask +ffffffff82f37610 r mpc_shift +ffffffff82f376ec r mpc_mask +ffffffff82f37a58 r dsc_shift +ffffffff82f37b10 r dsc_mask +ffffffff82f37de8 r dwbc30_shift +ffffffff82f37f1c r dwbc30_mask +ffffffff82f383e4 r mcif_wb30_shift +ffffffff82f38490 r mcif_wb30_mask +ffffffff82f3873c r aux_mask +ffffffff82f3879c r aux_shift +ffffffff82f387b4 r i2c_shifts +ffffffff82f387e0 r i2c_masks +ffffffff82f38884 r audio_shift +ffffffff82f3889c r audio_mask +ffffffff82f388d8 r se_shift +ffffffff82f389b4 r se_mask +ffffffff82f38d20 r vpg_shift +ffffffff82f38d48 r vpg_mask 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qp_table_422_10bpc_max +ffffffff82f4fb40 r qp_table_422_10bpc_min +ffffffff82f50280 r qp_table_422_12bpc_max +ffffffff82f50bc0 r qp_table_422_12bpc_min +ffffffff82f51500 r qp_table_420_8bpc_max +ffffffff82f51940 r qp_table_420_8bpc_min +ffffffff82f51d80 r qp_table_420_10bpc_max +ffffffff82f52340 r qp_table_420_10bpc_min +ffffffff82f52900 r qp_table_420_12bpc_max +ffffffff82f53040 r qp_table_420_12bpc_min ffffffff82f55000 r funcs ffffffff82f55050 r hpd_regs -ffffffff82f55168 r hpd_shift -ffffffff82f55178 r hpd_mask -ffffffff82f55190 r ddc_data_regs_dcn -ffffffff82f55340 r ddc_clk_regs_dcn -ffffffff82f554f0 r ddc_shift -ffffffff82f55610 r ddc_mask -ffffffff82f55730 r generic_regs -ffffffff82f557a0 r generic_shift -ffffffff82f557b0 r generic_mask +ffffffff82f551a0 r hpd_shift +ffffffff82f551b0 r hpd_mask +ffffffff82f551c0 r ddc_data_regs +ffffffff82f553a0 r ddc_clk_regs +ffffffff82f55580 r ddc_shift +ffffffff82f555a8 r ddc_mask ffffffff82f56000 r funcs ffffffff82f57000 r funcs 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hpd_shift +ffffffff82f5f178 r hpd_mask +ffffffff82f5f190 r ddc_data_regs_dcn +ffffffff82f5f2c0 r ddc_clk_regs_dcn +ffffffff82f5f3f0 r ddc_shift +ffffffff82f5f4e0 r ddc_mask +ffffffff82f5f5d0 r generic_regs +ffffffff82f5f604 r generic_shift +ffffffff82f5f60c r generic_mask +ffffffff82f60000 r funcs +ffffffff82f61000 r funcs +ffffffff82f61050 r hpd_regs +ffffffff82f611a0 r hpd_shift +ffffffff82f611b0 r hpd_mask +ffffffff82f611c0 r ddc_data_regs_dcn +ffffffff82f61370 r ddc_clk_regs_dcn +ffffffff82f61520 r ddc_shift +ffffffff82f61640 r ddc_mask +ffffffff82f61760 r generic_regs +ffffffff82f617d0 r generic_shift +ffffffff82f617e0 r generic_mask +ffffffff82f62000 r funcs +ffffffff82f63000 r funcs +ffffffff82f63050 r hpd_regs +ffffffff82f63168 r hpd_shift +ffffffff82f63178 r hpd_mask +ffffffff82f63190 r ddc_data_regs_dcn +ffffffff82f63300 r ddc_clk_regs_dcn +ffffffff82f63470 r ddc_shift +ffffffff82f63560 r ddc_mask +ffffffff82f63650 r generic_regs +ffffffff82f636c0 r generic_shift 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+ffffffff82f6d000 r irq_service_funcs_dce120 ffffffff82f6d008 r dummy_irq_info_funcs ffffffff82f6d018 r hpd_irq_info_funcs ffffffff82f6d028 r hpd_rx_irq_info_funcs ffffffff82f6d038 r pflip_irq_info_funcs -ffffffff82f6d048 r vupdate_no_lock_irq_info_funcs +ffffffff82f6d048 r vupdate_irq_info_funcs ffffffff82f6d058 r vblank_irq_info_funcs -ffffffff82f6d068 r vline0_irq_info_funcs -ffffffff82f6d080 r irq_source_info_dcn303 -ffffffff82f6f000 r irq_source_info_dcn31 -ffffffff82f70290 r irq_service_funcs_dcn31 -ffffffff82f70298 r dummy_irq_info_funcs -ffffffff82f702a8 r hpd_irq_info_funcs -ffffffff82f702b8 r hpd_rx_irq_info_funcs -ffffffff82f702c8 r pflip_irq_info_funcs -ffffffff82f702d8 r vupdate_no_lock_irq_info_funcs -ffffffff82f702e8 r vblank_irq_info_funcs -ffffffff82f702f8 r vline0_irq_info_funcs -ffffffff82f70308 r outbox_irq_info_funcs -ffffffff82f71000 r irq_source_info_dcn314 -ffffffff82f72290 r irq_service_funcs_dcn314 -ffffffff82f72298 r dummy_irq_info_funcs -ffffffff82f722a8 r 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dmub_srv_dcn301_regs -ffffffff82f8c000 R dmub_srv_dcn302_regs -ffffffff82f8d000 R dmub_srv_dcn303_regs -ffffffff82f8e000 R dmub_srv_dcn31_regs -ffffffff82f8f000 R dmub_srv_dcn314_regs -ffffffff82f90000 R dmub_srv_dcn315_regs -ffffffff82f91000 R dmub_srv_dcn316_regs -ffffffff82f92000 R dmub_srv_dcn32_regs -ffffffff82f93000 r numerator01 -ffffffff82f93020 r numerator02 -ffffffff82f93040 r numerator04 -ffffffff82f93060 r numerator05 -ffffffff82f97000 r abm_settings -ffffffff82f97020 r abm_settings_config0 -ffffffff82f97060 r abm_settings_config1 -ffffffff82f970a0 r abm_settings_config2 -ffffffff82f970d8 r min_reduction_table_v_2_2 -ffffffff82f970e5 r max_reduction_table_v_2_2 -ffffffff82f970f2 r min_reduction_table -ffffffff82f970ff r max_reduction_table -ffffffff82f97110 r custom_backlight_curve0 -ffffffff82f98000 R amdgpu_pp_profile_name -ffffffff82f99000 r pp_lib_thermal_controller_names -ffffffff82f9a000 r pp_ip_funcs -ffffffff82f9a0a8 R pp_smu_ip_block -ffffffff82f9a0c0 r pp_dpm_funcs -ffffffff82f9b000 r gpio_tbl -ffffffff82f9b0f0 r enable_fb_req_rej_tbl -ffffffff82f9b140 r use_bclk_tbl -ffffffff82f9b310 r turn_off_plls_tbl -ffffffff82f9b640 r enter_baco_tbl -ffffffff82f9b730 r exit_baco_tbl -ffffffff82f9b850 r clean_baco_tbl -ffffffff82f9c000 r gpio_tbl -ffffffff82f9c0f0 r enable_fb_req_rej_tbl -ffffffff82f9c140 r use_bclk_tbl -ffffffff82f9c2e0 r turn_off_plls_tbl -ffffffff82f9c370 r clk_req_b_tbl -ffffffff82f9c490 r enter_baco_tbl -ffffffff82f9c5b0 r exit_baco_tbl -ffffffff82f9c6d0 r clean_baco_tbl -ffffffff82f9d000 r gpio_tbl -ffffffff82f9d0f0 r enable_fb_req_rej_tbl -ffffffff82f9d140 r use_bclk_tbl_vg -ffffffff82f9d200 r turn_off_plls_tbl_vg -ffffffff82f9d350 r use_bclk_tbl -ffffffff82f9d440 r turn_off_plls_tbl -ffffffff82f9d5f0 r clk_req_b_tbl -ffffffff82f9d710 r enter_baco_tbl -ffffffff82f9d830 r exit_baco_tbl -ffffffff82f9d950 r clean_baco_tbl -ffffffff82f9e000 r vega10_fuses_default -ffffffff82fad000 r pp_r600_encode_lanes -ffffffff82fae000 R pptable_v1_0_funcs -ffffffff82faf000 R pptable_funcs -ffffffff82faf020 r soft_dummy_pp_table -ffffffff82fb0000 r smu10_hwmgr_funcs -ffffffff82fb1000 r smu7_hwmgr_funcs -ffffffff82fb12f8 r smu7_irq_funcs -ffffffff82fb1310 r SMU7ThermalPolicy -ffffffff82fb2000 r GCCACConfig_Polaris10 -ffffffff82fb21b0 r DIDTConfig_Polaris10 -ffffffff82fb2a50 r GCCACConfig_Polaris11 -ffffffff82fb2c00 r DIDTConfig_Polaris11_Kicker -ffffffff82fb34a0 r DIDTConfig_Polaris11 -ffffffff82fb3d40 r DIDTConfig_Polaris12 -ffffffff82fb45e0 r GCCACConfig_VegaM -ffffffff82fb4790 r DIDTConfig_VegaM -ffffffff82fb6000 r smu8_hwmgr_funcs -ffffffff82fb62f0 r SMU7ThermalPolicy -ffffffff82fb7000 r smu9_irq_funcs -ffffffff82fb8000 r gpio_tbl_iceland -ffffffff82fb8060 r gpio_tbl -ffffffff82fb8150 r enable_fb_req_rej_tbl -ffffffff82fb81a0 r use_bclk_tbl -ffffffff82fb8370 r turn_off_plls_tbl -ffffffff82fb8610 r enter_baco_tbl -ffffffff82fb8730 r exit_baco_tbl_iceland -ffffffff82fb8870 r clean_baco_tbl_iceland -ffffffff82fb8890 r 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+ffffffff82f82298 r dummy_irq_info_funcs +ffffffff82f822a8 r hpd_irq_info_funcs +ffffffff82f822b8 r hpd_rx_irq_info_funcs +ffffffff82f822c8 r pflip_irq_info_funcs +ffffffff82f822d8 r vupdate_no_lock_irq_info_funcs +ffffffff82f822e8 r vblank_irq_info_funcs +ffffffff82f822f8 r vline0_irq_info_funcs +ffffffff82f82308 r outbox_irq_info_funcs +ffffffff82f83000 r irq_source_info_dcn315 +ffffffff82f84290 r irq_service_funcs_dcn315 +ffffffff82f84298 r dummy_irq_info_funcs +ffffffff82f842a8 r hpd_irq_info_funcs +ffffffff82f842b8 r hpd_rx_irq_info_funcs +ffffffff82f842c8 r pflip_irq_info_funcs +ffffffff82f842d8 r vupdate_no_lock_irq_info_funcs +ffffffff82f842e8 r vblank_irq_info_funcs +ffffffff82f842f8 r vline0_irq_info_funcs +ffffffff82f84308 r outbox_irq_info_funcs +ffffffff82f85000 r irq_source_info_dcn32 +ffffffff82f86290 r irq_service_funcs_dcn32 +ffffffff82f86298 r dummy_irq_info_funcs +ffffffff82f862a8 r hpd_irq_info_funcs +ffffffff82f862b8 r hpd_rx_irq_info_funcs +ffffffff82f862c8 r pflip_irq_info_funcs +ffffffff82f862d8 r vupdate_no_lock_irq_info_funcs +ffffffff82f862e8 r vblank_irq_info_funcs +ffffffff82f862f8 r vline0_irq_info_funcs +ffffffff82f86308 r outbox_irq_info_funcs +ffffffff82f88000 r dio_link_hwss +ffffffff82f89000 r dio_fixed_vs_pe_retimer_link_hwss +ffffffff82f8a000 r dpia_link_hwss +ffffffff82f8b000 r hpo_dp_link_hwss +ffffffff82f8c000 r hpo_fixed_vs_pe_retimer_dp_link_hwss +ffffffff82f8d000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82f8e000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82f8e006 r DP_DVI_CONVERTER_ID_4 +ffffffff82f8e00d r DP_DVI_CONVERTER_ID_5 +ffffffff82f8f000 r dp_lt_fallbacks +ffffffff82f93000 r mandatory_dpcd_partitions +ffffffff82f94000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82f94007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82f95000 r virtual_lnk_enc_funcs +ffffffff82f96000 r virtual_link_hwss +ffffffff82f97000 r virtual_str_enc_funcs +ffffffff82f98000 R dmub_srv_dcn20_regs +ffffffff82f99000 R dmub_srv_dcn21_regs +ffffffff82f9a000 R dmub_srv_dcn30_regs +ffffffff82f9b000 R dmub_srv_dcn301_regs +ffffffff82f9c000 R dmub_srv_dcn302_regs +ffffffff82f9d000 R dmub_srv_dcn303_regs +ffffffff82f9e000 R dmub_srv_dcn31_regs +ffffffff82f9f000 R dmub_srv_dcn314_regs +ffffffff82fa0000 R dmub_srv_dcn315_regs +ffffffff82fa1000 R dmub_srv_dcn316_regs +ffffffff82fa2000 R dmub_srv_dcn32_regs +ffffffff82fa3000 r numerator01 +ffffffff82fa3020 r numerator02 +ffffffff82fa3040 r numerator04 +ffffffff82fa3060 r numerator05 +ffffffff82fa7000 r abm_settings +ffffffff82fa7020 r abm_settings_config0 +ffffffff82fa7060 r abm_settings_config1 +ffffffff82fa70a0 r abm_settings_config2 +ffffffff82fa70d8 r min_reduction_table_v_2_2 +ffffffff82fa70e5 r max_reduction_table_v_2_2 +ffffffff82fa70f2 r min_reduction_table +ffffffff82fa70ff r max_reduction_table +ffffffff82fa7110 r custom_backlight_curve0 +ffffffff82fa8000 R amdgpu_pp_profile_name +ffffffff82fa9000 r pp_lib_thermal_controller_names +ffffffff82faa000 r pp_ip_funcs +ffffffff82faa0a8 R pp_smu_ip_block +ffffffff82faa0c0 r pp_dpm_funcs +ffffffff82fab000 r gpio_tbl +ffffffff82fab0f0 r enable_fb_req_rej_tbl +ffffffff82fab140 r use_bclk_tbl +ffffffff82fab310 r turn_off_plls_tbl +ffffffff82fab640 r enter_baco_tbl +ffffffff82fab730 r exit_baco_tbl +ffffffff82fab850 r clean_baco_tbl +ffffffff82fac000 r gpio_tbl +ffffffff82fac0f0 r enable_fb_req_rej_tbl +ffffffff82fac140 r use_bclk_tbl +ffffffff82fac2e0 r turn_off_plls_tbl +ffffffff82fac370 r clk_req_b_tbl +ffffffff82fac490 r enter_baco_tbl +ffffffff82fac5b0 r exit_baco_tbl +ffffffff82fac6d0 r clean_baco_tbl +ffffffff82fad000 r gpio_tbl +ffffffff82fad0f0 r enable_fb_req_rej_tbl +ffffffff82fad140 r use_bclk_tbl_vg +ffffffff82fad200 r turn_off_plls_tbl_vg +ffffffff82fad350 r use_bclk_tbl +ffffffff82fad440 r turn_off_plls_tbl +ffffffff82fad5f0 r clk_req_b_tbl +ffffffff82fad710 r enter_baco_tbl +ffffffff82fad830 r exit_baco_tbl +ffffffff82fad950 r clean_baco_tbl +ffffffff82fae000 r vega10_fuses_default +ffffffff82fbd000 r pp_r600_encode_lanes +ffffffff82fbe000 R pptable_v1_0_funcs +ffffffff82fbf000 R pptable_funcs +ffffffff82fbf020 r soft_dummy_pp_table +ffffffff82fc0000 r smu10_hwmgr_funcs +ffffffff82fc1000 r smu7_hwmgr_funcs +ffffffff82fc12f8 r smu7_irq_funcs +ffffffff82fc1310 r SMU7ThermalPolicy +ffffffff82fc2000 r GCCACConfig_Polaris10 +ffffffff82fc21b0 r DIDTConfig_Polaris10 +ffffffff82fc2a50 r GCCACConfig_Polaris11 +ffffffff82fc2c00 r DIDTConfig_Polaris11_Kicker +ffffffff82fc34a0 r DIDTConfig_Polaris11 +ffffffff82fc3d40 r DIDTConfig_Polaris12 +ffffffff82fc45e0 r GCCACConfig_VegaM +ffffffff82fc4790 r DIDTConfig_VegaM +ffffffff82fc6000 r smu8_hwmgr_funcs +ffffffff82fc62f0 r SMU7ThermalPolicy +ffffffff82fc7000 r smu9_irq_funcs +ffffffff82fc8000 r gpio_tbl_iceland +ffffffff82fc8060 r gpio_tbl +ffffffff82fc8150 r enable_fb_req_rej_tbl +ffffffff82fc81a0 r use_bclk_tbl +ffffffff82fc8370 r turn_off_plls_tbl +ffffffff82fc8610 r enter_baco_tbl +ffffffff82fc8730 r exit_baco_tbl_iceland +ffffffff82fc8870 r clean_baco_tbl_iceland +ffffffff82fc8890 r exit_baco_tbl +ffffffff82fc89b0 r clean_baco_tbl +ffffffff82fc9000 r pre_baco_tbl +ffffffff82fc9090 r enter_baco_tbl +ffffffff82fc92b0 r exit_baco_tbl +ffffffff82fc9520 r clean_baco_tbl +ffffffff82fca000 r vega10_hwmgr_funcs +ffffffff82fca2f0 r channel_number +ffffffff82fca320 r SMU7ThermalWithDelayPolicy +ffffffff82fcb000 r SEDiDtStallCtrlConfig_vega10 +ffffffff82fcb110 r SEDiDtStallPatternConfig_vega10 +ffffffff82fcb2e0 r SEDiDtWeightConfig_Vega10 +ffffffff82fcb3b0 r SEDiDtCtrl1Config_Vega10 +ffffffff82fcb440 r SEDiDtCtrl2Config_Vega10 +ffffffff82fcb510 r SEDiDtCtrl3Config_vega10 +ffffffff82fcb820 r SEDiDtTuningCtrlConfig_Vega10 +ffffffff82fcb8b0 r SELCacConfig_Vega10 +ffffffff82fcba40 r SEDiDtCtrl0Config_Vega10 +ffffffff82fcbd10 r AvfsPSMInitConfig_vega10 +ffffffff82fcbd90 r SEEDCStallPatternConfig_Vega10 +ffffffff82fcbea0 r SEEDCStallDelayConfig_Vega10 +ffffffff82fcbf80 r SEEDCCtrlConfig_Vega10 +ffffffff82fcc040 r PSMSEEDCStallPatternConfig_Vega10 +ffffffff82fcc0c0 r PSMSEEDCStallDelayConfig_Vega10 +ffffffff82fcc1d0 r PSMSEEDCCtrlResetConfig_Vega10 +ffffffff82fcc290 r PSMSEEDCCtrlConfig_Vega10 +ffffffff82fcc350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff82fcc3e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff82fcd000 R vega10_pptable_funcs +ffffffff82fce000 r pre_baco_tbl +ffffffff82fce090 r enter_baco_tbl +ffffffff82fce2b0 r exit_baco_tbl +ffffffff82fce520 r clean_baco_tbl +ffffffff82fcf000 r vega12_hwmgr_funcs +ffffffff82fcf2f0 r SMU7ThermalWithDelayPolicy +ffffffff82fcf340 r link_width +ffffffff82fd0000 R vega12_pptable_funcs +ffffffff82fd1000 r clean_baco_tbl +ffffffff82fd2000 r vega20_hwmgr_funcs +ffffffff82fd22f0 r SMU7ThermalWithDelayPolicy +ffffffff82fd2340 r link_width +ffffffff82fd3000 R vega20_pptable_funcs +ffffffff82fd4000 R ci_smu_funcs +ffffffff82fd40e0 r defaults_hawaii_pro +ffffffff82fd412c r defaults_hawaii_xt +ffffffff82fd4178 r defaults_saturn_xt +ffffffff82fd41c4 r defaults_bonaire_xt +ffffffff82fd4210 r ci_program_jump_on_start.data +ffffffff82fd5000 R fiji_smu_funcs +ffffffff82fd50e0 r avfs_graphics_level +ffffffff82fd5240 r fiji_power_tune_data_set_array +ffffffff82fd5246 r fiji_clock_stretch_amount_conversion +ffffffff82fd5260 r fiji_clock_stretcher_ddt_table +ffffffff82fd6000 R iceland_smu_funcs +ffffffff82fd60e0 r defaults_icelandxt +ffffffff82fd612c r defaults_icelandpro +ffffffff82fd6178 r defaults_iceland +ffffffff82fd7000 R polaris10_smu_funcs +ffffffff82fd70e0 r avfs_graphics_level_polaris10 +ffffffff82fd72a0 r avfs_memory_level_polaris10 +ffffffff82fd72c0 r polaris10_power_tune_data_set_array +ffffffff82fd7310 r Range_Table +ffffffff82fd8000 R smu10_smu_funcs +ffffffff82fd9000 r smu7_program_jump_on_start.data +ffffffff82fd9010 r pwr_virus_table_pre +ffffffff82fd9680 r pwr_virus_table_post +ffffffff82fd9f80 r pwr_virus_section1 +ffffffff82fda610 r pwr_virus_section2 +ffffffff82fda660 r pwr_virus_section3 +ffffffff82fe1ab0 r pwr_virus_section4 +ffffffff82fe1e80 r pwr_virus_section5 +ffffffff82fe2490 r pwr_virus_section6 +ffffffff82fe4000 R smu8_smu_funcs +ffffffff82fe5000 R tonga_smu_funcs +ffffffff82fe50e0 r tonga_power_tune_data_set_array +ffffffff82fe512c r tonga_clock_stretch_amount_conversion +ffffffff82fe5140 r tonga_clock_stretcher_ddt_table +ffffffff82fe6000 R vega10_smu_funcs +ffffffff82fe7000 R vega12_smu_funcs +ffffffff82fe8000 R vega20_smu_funcs +ffffffff82fe9000 R vegam_smu_funcs +ffffffff82fe90e0 r vegam_power_tune_data_set_array +ffffffff82fe9130 r Range_Table +ffffffff82fea000 R smu_ip_funcs +ffffffff82fea0a8 R smu_v11_0_ip_block +ffffffff82fea0c0 R smu_v12_0_ip_block +ffffffff82fea0d8 R smu_v13_0_ip_block +ffffffff82fea0f0 r swsmu_pm_funcs +ffffffff82feb000 r arcturus_ppt_funcs +ffffffff82feb3f0 r arcturus_table_map +ffffffff82feb470 r arcturus_pwr_src_map +ffffffff82feb480 r arcturus_workload_map +ffffffff82feb4d0 r smu11_thermal_policy +ffffffff82feb528 r arcturus_i2c_algo +ffffffff82feb538 r arcturus_i2c_control_quirks +ffffffff82feb550 r arcturus_throttler_map +ffffffff82feb570 r arcturus_message_map +ffffffff82febff0 r arcturus_clk_map +ffffffff82fec0b0 r arcturus_feature_mask_map +ffffffff82fed000 r cyan_skillfish_ppt_funcs +ffffffff82fee000 r navi10_ppt_funcs +ffffffff82fee3f0 r smu11_thermal_policy +ffffffff82fee448 r navi10_i2c_algo +ffffffff82fee458 r navi10_i2c_control_quirks +ffffffff82fee470 r navi1x_throttler_map +ffffffff82fee490 r NoDbiPrbs7 +ffffffff82fef490 r DbiPrbs7 +ffffffff82ff1000 r sienna_cichlid_ppt_funcs +ffffffff82ff13f0 r smu11_thermal_policy +ffffffff82ff1448 r sienna_cichlid_i2c_algo +ffffffff82ff1458 r sienna_cichlid_i2c_control_quirks +ffffffff82ff1470 r sienna_cichlid_throttler_map +ffffffff82ff2000 r smu_v11_0_irq_funcs +ffffffff82ff2010 r link_width +ffffffff82ff3000 r vangogh_ppt_funcs +ffffffff82ff33e8 r vangogh_throttler_map +ffffffff82ff4000 r renoir_ppt_funcs +ffffffff82ff43e8 r renoir_throttler_map +ffffffff82ff5000 r aldebaran_ppt_funcs +ffffffff82ff53f0 r aldebaran_clk_map +ffffffff82ff54b0 r aldebaran_table_map +ffffffff82ff5530 r smu13_thermal_policy +ffffffff82ff5588 r aldebaran_i2c_algo +ffffffff82ff5598 r aldebaran_i2c_control_quirks +ffffffff82ff55b0 r aldebaran_throttler_map +ffffffff82ff55d0 r aldebaran_message_map +ffffffff82ff6050 r aldebaran_feature_mask_map +ffffffff82ff7000 R pmfw_decoded_link_speed +ffffffff82ff7020 R pmfw_decoded_link_width +ffffffff82ff7040 r smu_v13_0_irq_funcs +ffffffff82ff8000 r smu_v13_0_0_ppt_funcs +ffffffff82ff83f0 r smu13_thermal_policy +ffffffff82ff8448 r smu_v13_0_0_i2c_algo +ffffffff82ff8458 r smu_v13_0_0_i2c_control_quirks +ffffffff82ff8470 r smu_v13_0_0_throttler_map +ffffffff82ff9000 r smu_v13_0_4_ppt_funcs +ffffffff82ffa000 r smu_v13_0_5_ppt_funcs +ffffffff82ffb000 r smu_v13_0_6_ppt_funcs +ffffffff82ffb3f0 r smu_v13_0_6_message_map +ffffffff82ffbe70 r smu_v13_0_6_clk_map +ffffffff82ffbf30 r smu_v13_0_6_table_map +ffffffff82ffbfb0 r smu_v13_0_6_i2c_algo +ffffffff82ffbfc0 r smu_v13_0_6_i2c_control_quirks +ffffffff82ffbfd0 r smu_v13_0_6_irq_funcs +ffffffff82ffbfe0 r smu_v13_0_6_throttler_map +ffffffff82ffbff0 r smu_v13_0_6_feature_mask_map +ffffffff82ffd000 r smu_v13_0_7_ppt_funcs +ffffffff82ffd3f0 r smu13_thermal_policy +ffffffff82ffd450 r smu_v13_0_7_throttler_map +ffffffff82ffe000 r yellow_carp_ppt_funcs +ffffffff82fff000 R link_speed +ffffffff82fff020 r __smu_message_names +ffffffff83000000 R pchb_ca +ffffffff83001000 R amas_ca +ffffffff83001028 R amas_devices +ffffffff83001040 r amas_feature +ffffffff83002000 R cardslot_ca +ffffffff83003000 R cardbus_ca +ffffffff83004000 R com_cardbus_ca +ffffffff83005000 R xl_cardbus_ca +ffffffff83005030 R xl_cardbus_products +ffffffff83006000 R dc_cardbus_ca +ffffffff83006030 R dc_cardbus_devices +ffffffff83007000 R fxp_cardbus_ca +ffffffff83007028 R fxp_cardbus_devices +ffffffff83008000 R rl_cardbus_devices +ffffffff83008028 R rl_cardbus_ca +ffffffff83009000 R re_cardbus_ca +ffffffff83009028 R re_cardbus_devices +ffffffff8300a000 R ath_cardbus_ca +ffffffff8300b000 R athn_cardbus_ca +ffffffff8300b030 r athn_cardbus_devices +ffffffff8300c000 R atw_cardbus_ca +ffffffff8300c028 R atw_cardbus_devices +ffffffff8300d000 R rtw_cardbus_ca +ffffffff8300d028 R rtw_cardbus_devices +ffffffff8300e000 R ral_cardbus_ca +ffffffff8300e030 r ral_cardbus_devices +ffffffff8300f000 R acx_cardbus_ca +ffffffff8300f028 r acx_cardbus_devices +ffffffff83010000 R pgt_cardbus_ca +ffffffff83010028 R pgt_cardbus_devices +ffffffff83011000 R ehci_cardbus_ca +ffffffff83012000 R ohci_cardbus_ca +ffffffff83013000 R uhci_cardbus_ca +ffffffff83014000 R malo_cardbus_ca +ffffffff83014028 r malo_cardbus_devices +ffffffff83015000 R bwi_cardbus_ca +ffffffff83015030 r bwi_cardbus_devices +ffffffff83016000 R pcmcia_ca +ffffffff83017000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff83018000 r pcmcia_cis_quirks +ffffffff83019000 R ep_pcmcia_ca +ffffffff8301a000 R ne_pcmcia_ca +ffffffff8301a030 R ne2000devs +ffffffff8301c000 R aic_pcmcia_ca +ffffffff8301d000 R com_pcmcia_ca +ffffffff8301e000 R wdc_pcmcia_ca +ffffffff8301f000 R sm_pcmcia_ca +ffffffff83020000 R xe_pcmcia_ca +ffffffff83021000 R wi_pcmcia_ca +ffffffff83021030 r wi_pcmcia_products +ffffffff83022000 R malo_pcmcia_ca +ffffffff83023000 R an_pcmcia_ca +ffffffff83024000 R pcib_ca +ffffffff83025000 R amdpcib_ca +ffffffff83025028 R amdpcib_devices +ffffffff83026000 R tcpcib_ca +ffffffff83026028 R tcpcib_devices +ffffffff83027000 R aapic_ca +ffffffff83028000 R hme_pci_ca +ffffffff83028028 r hme_promhdr +ffffffff8302802a r hme_promdat +ffffffff83029000 R isa_ca +ffffffff8302a000 R isadma_ca +ffffffff8302b000 R fdc_ca +ffffffff8302c000 R fd_ca +ffffffff8302d000 R com_isa_ca +ffffffff8302e000 R pckbc_isa_ca +ffffffff8302f000 R vga_isa_ca +ffffffff83030000 R wdc_isa_ca +ffffffff83031000 R mpu_midi_hw_if +ffffffff83032000 R mpu_isa_ca +ffffffff83033000 R pcppi_ca +ffffffff83034000 R spkr_ca +ffffffff83034030 r pitchtab +ffffffff83035000 R lpt_isa_ca +ffffffff83036000 R wbsio_ca +ffffffff83037000 R schsio_ca +ffffffff83038000 R lm_isa_ca +ffffffff83038028 R lm_wbsio_ca +ffffffff83039000 R it_sensors +ffffffff83039110 R it_vrfact +ffffffff83039140 R it_fan_regs +ffffffff83039160 R it_fan_ext_regs +ffffffff83039178 R it_ca +ffffffff8303a000 R abitkv_sensors +ffffffff8303a200 R abitaa_sensors +ffffffff8303a480 R abitav_sensors +ffffffff8303a700 R abitas_sensors +ffffffff8303a980 R abitax_sensors +ffffffff8303abc0 R abitm4_sensors +ffffffff8303ae80 R abitan_sensors +ffffffff8303b120 R abital_sensors +ffffffff8303b3a0 R abitaw_sensors +ffffffff8303b700 R abitni_sensors +ffffffff8303b9a0 R abitat_sensors +ffffffff8303bcc0 R abitan2_sensors +ffffffff8303bf60 R abitab_sensors +ffffffff8303c220 R abitan3_sensors +ffffffff8303c500 R abitaw2_sensors +ffffffff8303c860 R abitat2_sensors +ffffffff8303cb60 R abitab2_sensors +ffffffff8303cea0 R abitin_sensors +ffffffff8303d1e0 R uguru_ca +ffffffff8303e000 R aps_ca +ffffffff8303f000 R wsdisplay_emul_ca +ffffffff8303f030 r charClass +ffffffff83040000 r usl_syncops +ffffffff83041000 R wsevent_filtops +ffffffff83042000 R wskbd_ca +ffffffff83043000 r latin1_to_upper +ffffffff83044000 R wsmouse_ca +ffffffff83045000 R cyrillic_to_koi8 +ffffffff83045060 R unicode_to_latin2 +ffffffff830450e0 R unicode_to_latin7 +ffffffff83046000 R wsemul_vt100_ops +ffffffff83047000 r decspcgr2uni +ffffffff83047100 r dectech2uni +ffffffff83047200 r nrctable +ffffffff83048000 r vt100_fkeys +ffffffff830480c0 r vt100_pfkeys +ffffffff830480e0 r vt100_numpad +ffffffff83049000 R pckbd_ca +ffffffff83049028 R pckbd_accessops +ffffffff83049040 R pckbd_consops +ffffffff83049060 R pckbd_keymapdata +ffffffff83049070 R pckbd_xtbl2 +ffffffff83049100 R pckbd_xtbl2_ext +ffffffff8304a000 r pckbd_keydesc_us +ffffffff8304a250 r pckbd_keydesc_de +ffffffff8304a2f0 r pckbd_keydesc_de_nodead +ffffffff8304a310 r pckbd_keydesc_fr +ffffffff8304a3d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff8304a510 r pckbd_keydesc_dk +ffffffff8304a5a0 r pckbd_keydesc_dk_nodead +ffffffff8304a5b0 r pckbd_keydesc_it +ffffffff8304a640 r pckbd_keydesc_uk +ffffffff8304a6e0 r pckbd_keydesc_jp +ffffffff8304a750 r pckbd_keydesc_sv +ffffffff8304a780 r pckbd_keydesc_sv_nodead +ffffffff8304a790 r pckbd_keydesc_no +ffffffff8304a7c0 r pckbd_keydesc_no_nodead +ffffffff8304a7d0 r pckbd_keydesc_us_declk +ffffffff8304a860 r pckbd_keydesc_us_dvorak +ffffffff8304a900 r pckbd_keydesc_us_colemak +ffffffff8304a948 r pckbd_keydesc_swapctrlcaps +ffffffff8304a960 r pckbd_keydesc_iopener +ffffffff8304a9b0 r pckbd_keydesc_es +ffffffff8304aa50 r pckbd_keydesc_be +ffffffff8304ab10 r pckbd_keydesc_ru +ffffffff8304ac80 r pckbd_keydesc_ua +ffffffff8304ae10 r pckbd_keydesc_sg +ffffffff8304aec0 r pckbd_keydesc_sg_nodead +ffffffff8304aee0 r pckbd_keydesc_sf +ffffffff8304af00 r pckbd_keydesc_pt +ffffffff8304af90 r pckbd_keydesc_lt +ffffffff8304b070 r pckbd_keydesc_la +ffffffff8304b100 r pckbd_keydesc_br +ffffffff8304b180 r pckbd_keydesc_tr +ffffffff8304b230 r pckbd_keydesc_tr_nodead +ffffffff8304b250 r pckbd_keydesc_pl +ffffffff8304b2b0 r pckbd_keydesc_hu +ffffffff8304b3c0 r pckbd_keydesc_si +ffffffff8304b4d0 r pckbd_keydesc_cf +ffffffff8304b5a0 r pckbd_keydesc_cf_nodead +ffffffff8304b5c0 r pckbd_keydesc_lv +ffffffff8304b640 r pckbd_keydesc_nl +ffffffff8304b720 r pckbd_keydesc_nl_nodead +ffffffff8304b740 r pckbd_keydesc_is +ffffffff8304b7cc r pckbd_keydesc_is_nodead +ffffffff8304b7e0 r pckbd_keydesc_ee +ffffffff8304b890 r pckbd_keydesc_ee_nodead +ffffffff8304b8b0 R pckbd_keydesctab +ffffffff8304c000 R pms_ca +ffffffff8304c028 R pms_accessops +ffffffff8304c040 R pms_sec_accessops +ffffffff8304c060 R pms_protocols +ffffffff8304c1e0 r alps_models +ffffffff8304d000 R skgpio_led_offset +ffffffff8304d008 R skgpio_ca +ffffffff8304e000 R hidkbd_trtab +ffffffff8304e100 r apple_fn_trans +ffffffff8304e120 r apple_tb_trans +ffffffff8304e140 r apple_mba_trans +ffffffff8304f000 r hidcc_attach_wskbd.accessops +ffffffff8304f020 r hidcc_keysyms +ffffffff83050000 R usb_ca +ffffffff83051000 R usb_known_products +ffffffff8305cfe0 R usb_known_vendors +ffffffff8305f800 R usbd_error_strs +ffffffff83060000 R usb_quirks +ffffffff83060390 R usb_dev_quirks +ffffffff83060398 R usbd_no_quirk +ffffffff83061000 R uhub_ca +ffffffff83061028 R uhub_uhub_ca +ffffffff83062000 R uaudio_ca +ffffffff83062028 R uaudio_hw_if +ffffffff830620e0 R uaudio_rates +ffffffff83062120 r uaudio_clkname.names +ffffffff83062140 r uaudio_feature_addent.features +ffffffff83063000 R uvideo_ca +ffffffff83063028 R uvideo_hw_if +ffffffff83063100 R uvideo_devs +ffffffff83064000 r utvfu_select_norm.pal +ffffffff83064040 r utvfu_select_norm.ntsc +ffffffff83064080 r utvfu_setup_capture.setup +ffffffff83064180 r utvfu_audio_start_chip.setup +ffffffff830641c8 r utvfu_audio_stop_chip.setup +ffffffff830641d8 R utvfu_ca +ffffffff83064200 R utvfu_vid_hw_if +ffffffff830642d0 R utvfu_au_hw_if +ffffffff83065000 R udl_ca +ffffffff83065030 r udl_devs +ffffffff830650b0 r udl_modes +ffffffff83066000 R umidi_hw_if +ffffffff83066030 R umidi_ca +ffffffff83066060 r umidi_evlen +ffffffff83066080 r packet_length +ffffffff83067000 r quirk_name +ffffffff83068000 R ucom_ca +ffffffff83069000 R ugen_ca +ffffffff83069028 R ugenread_intr_filtops +ffffffff83069058 R ugenread_isoc_filtops +ffffffff8306a000 R uhidev_ca +ffffffff8306a030 r uhid_graphire_report_descr +ffffffff8306a0b0 r uhid_graphire3_4x5_report_descr +ffffffff8306a160 r uhid_xb360gp_report_descr +ffffffff8306a210 r uhid_xbonegp_report_descr +ffffffff8306b000 R uhid_ca +ffffffff8306b028 R uhidread_filtops +ffffffff8306c000 R fido_ca +ffffffff8306d000 R ujoy_ca +ffffffff8306e000 r ukbd_keydesc_us +ffffffff8306e2a0 r ukbd_keydesc_de +ffffffff8306e350 r ukbd_keydesc_de_nodead +ffffffff8306e370 r ukbd_keydesc_fr +ffffffff8306e430 r ukbd_keydesc_fr_apple +ffffffff8306e570 r ukbd_keydesc_fr_dvorak_bepo +ffffffff8306e6b0 r ukbd_keydesc_dk +ffffffff8306e750 r ukbd_keydesc_dk_nodead +ffffffff8306e760 r ukbd_keydesc_it +ffffffff8306e800 r ukbd_keydesc_uk +ffffffff8306e8b0 r ukbd_keydesc_jp +ffffffff8306e920 r ukbd_keydesc_sv +ffffffff8306e950 r ukbd_keydesc_sv_nodead +ffffffff8306e960 r ukbd_keydesc_no +ffffffff8306e990 r ukbd_keydesc_no_nodead +ffffffff8306e9a0 r ukbd_keydesc_us_dvorak +ffffffff8306ea40 r ukbd_keydesc_us_colemak +ffffffff8306ea88 r ukbd_keydesc_swapctrlcaps +ffffffff8306eaa0 r ukbd_keydesc_iopener +ffffffff8306eaf0 r ukbd_keydesc_es +ffffffff8306eb90 r ukbd_keydesc_be +ffffffff8306ec50 r ukbd_keydesc_ru +ffffffff8306edc0 r ukbd_keydesc_ua +ffffffff8306ef60 r ukbd_keydesc_sg +ffffffff8306f020 r ukbd_keydesc_sg_nodead +ffffffff8306f040 r ukbd_keydesc_sf +ffffffff8306f060 r ukbd_keydesc_pt +ffffffff8306f0f0 r ukbd_keydesc_pt_apple +ffffffff8306f110 r ukbd_keydesc_lt +ffffffff8306f1f0 r ukbd_keydesc_la +ffffffff8306f290 r ukbd_keydesc_br +ffffffff8306f320 r ukbd_keydesc_tr +ffffffff8306f3e0 r ukbd_keydesc_tr_nodead +ffffffff8306f400 r ukbd_keydesc_pl +ffffffff8306f460 r ukbd_keydesc_hu +ffffffff8306f570 r ukbd_keydesc_si +ffffffff8306f690 r ukbd_keydesc_cf +ffffffff8306f770 r ukbd_keydesc_cf_nodead +ffffffff8306f790 r ukbd_keydesc_lv +ffffffff8306f810 r ukbd_keydesc_nl +ffffffff8306f8f0 r ukbd_keydesc_nl_nodead +ffffffff8306f910 r ukbd_keydesc_is +ffffffff8306f9a4 r ukbd_keydesc_is_nodead +ffffffff8306f9b0 r ukbd_keydesc_ee +ffffffff8306fa60 r ukbd_keydesc_ee_nodead +ffffffff8306fa80 R ukbd_keydesctab +ffffffff83070000 R ukbd_countrylayout +ffffffff83070090 R ukbd_consops +ffffffff830700b0 R ukbd_accessops +ffffffff830700c8 R ukbd_ca +ffffffff830700f0 R ukbd_never_console +ffffffff83071000 R ums_accessops +ffffffff83071018 R ums_ca +ffffffff83072000 R umt_accessops +ffffffff83072018 R umt_ca +ffffffff83073000 R uts_devs +ffffffff83073010 R uts_accessops +ffffffff83073028 R uts_ca +ffffffff83074000 R ubcmtp_accessops +ffffffff83074018 R ubcmtp_ca +ffffffff83074040 r ubcmtp_devices +ffffffff83075000 R ucycom_methods +ffffffff83075040 R ucycom_devs +ffffffff83075050 R ucycom_ca +ffffffff83076000 R uslhcom_methods +ffffffff83076040 R uslhcom_ca +ffffffff83076068 r uslhcom_devs +ffffffff83077000 R ulpt_ca +ffffffff83078000 R umass_ca +ffffffff83078028 R umass_bbb_methods +ffffffff83078040 R umass_cbi_methods +ffffffff83079000 R umass_quirks +ffffffff8307a000 R umass_scsi_switch +ffffffff8307b000 R uthum_devs +ffffffff8307b008 R uthum_ca +ffffffff8307b030 r uthum_sensor_type_s +ffffffff8307c000 R ugold_devs +ffffffff8307c018 R ugold_ca +ffffffff8307d000 R utrh_devs +ffffffff8307d008 R utrh_ca +ffffffff8307e000 R uoakrh_devs +ffffffff8307e008 R uoakrh_ca +ffffffff8307e030 R uoakrh_methods +ffffffff8307f000 R uoaklux_devs +ffffffff8307f008 R uoaklux_ca +ffffffff8307f030 R uoaklux_methods +ffffffff83080000 R uoakv_devs +ffffffff83080008 R uoakv_ca +ffffffff83080030 R uoakv_methods +ffffffff83081000 R uonerng_ca +ffffffff83082000 R urng_ca +ffffffff83082030 r urng_devs +ffffffff83083000 R udcf_ca +ffffffff83083028 r udcf_devs +ffffffff83084000 R umbg_ca +ffffffff83085000 R uvisor_methods +ffffffff83085040 R uvisor_ca +ffffffff83085070 r uvisor_devs +ffffffff83086000 R udsbr_hw_if +ffffffff83086028 R udsbr_ca +ffffffff83087000 R utwitch_devs +ffffffff83087008 R utwitch_ca +ffffffff83088000 R aue_devs +ffffffff830881b0 R aue_ca +ffffffff83089000 R axe_devs +ffffffff830890d0 R axe_ca +ffffffff8308a000 R axen_devs +ffffffff8308a020 R axen_ca +ffffffff8308b000 R smsc_ca +ffffffff8308b030 r smsc_devs +ffffffff8308c000 R cue_ca +ffffffff8308d000 R kue_devs +ffffffff8308d088 R kue_ca +ffffffff8308e000 R cdce_devs +ffffffff8308e048 R cdce_ca +ffffffff8308f000 R urndis_ca +ffffffff8308f030 R urndis_class +ffffffff83090000 R mos_devs +ffffffff83090018 R mos_ca +ffffffff83091000 R mue_devs +ffffffff83091020 R mue_ca +ffffffff83092000 R udav_ca +ffffffff83092030 r udav_devs +ffffffff83093000 R upl_ca +ffffffff83094000 R ugl_ca +ffffffff83095000 R url_ca +ffffffff83095030 r url_devs +ffffffff83096000 R ure_devs +ffffffff830960e8 R ure_ca +ffffffff83097000 R uaq_devs +ffffffff83097018 R uaq_ca +ffffffff83098000 R umodem_methods +ffffffff83098040 R umodem_ca +ffffffff83099000 R uftdi_methods +ffffffff83099040 R uftdi_ca +ffffffff83099070 r uftdi_devs +ffffffff8309a000 R uplcom_methods +ffffffff8309a040 R uplcom_ca +ffffffff8309a070 r uplcom_devs +ffffffff8309b000 R umct_methods +ffffffff8309b040 R umct_ca +ffffffff8309b070 r umct_devs +ffffffff8309c000 R uvscom_methods +ffffffff8309c040 R uvscom_ca +ffffffff8309c070 r uvscom_devs +ffffffff8309d000 R ubsa_methods +ffffffff8309d040 R ubsa_devs +ffffffff8309d060 R ubsa_ca +ffffffff8309e000 R ukspan_ca +ffffffff8309e028 r ukspan_devs +ffffffff8309e030 r ukspan_methods +ffffffff8309f000 R uslcom_methods +ffffffff8309f040 R uslcom_ca +ffffffff8309f070 r uslcom_devs +ffffffff830a0000 R uark_methods +ffffffff830a0040 R uark_ca +ffffffff830a0068 r uark_devs +ffffffff830a1000 R moscom_methods +ffffffff830a1040 R moscom_ca +ffffffff830a1068 r moscom_devs +ffffffff830a2000 R umcs_methods +ffffffff830a2040 R umcs_devs +ffffffff830a2050 R umcs_ca +ffffffff830a3000 R uscom_methods +ffffffff830a3040 R uscom_ca +ffffffff830a3068 r uscom_devs +ffffffff830a4000 R ucrcom_methods +ffffffff830a4040 R ucrcom_ca +ffffffff830a5000 R uxrcom_methods +ffffffff830a5040 R uxrcom_ca +ffffffff830a5068 r uxrcom_devs +ffffffff830a6000 R uipaq_methods +ffffffff830a6040 R uipaq_ca +ffffffff830a6070 r uipaq_devs +ffffffff830a7000 R umsm_methods +ffffffff830a7040 R umsm_ca +ffffffff830a7070 r umsm_devs +ffffffff830a8000 R uchcom_methods +ffffffff830a8040 R uchcom_ca +ffffffff830a8070 r uchcom_devs +ffffffff830a8090 r dividers +ffffffff830a9000 R uticom_methods +ffffffff830a9040 R uticom_ca +ffffffff830a9070 r uticom_devs +ffffffff830aa000 R wi_usb_devs +ffffffff830aa0f0 R wi_usb_ca +ffffffff830ab000 R atu_ca +ffffffff830ac000 R ural_ca +ffffffff830ac030 r ural_devs +ffffffff830ac0a0 r ural_rf2522_r2 +ffffffff830ac0e0 r ural_rf2524_r2 +ffffffff830ac120 r ural_rf2525_hi_r2 +ffffffff830ac160 r ural_rf2525_r2 +ffffffff830ac1a0 r ural_rf2525e_r2 +ffffffff830ac1e0 r ural_rf2526_hi_r2 +ffffffff830ac220 r ural_rf2526_r2 +ffffffff830ac260 r ural_def_bbp +ffffffff830ac2a0 r ural_def_mac +ffffffff830ad000 R rum_ca +ffffffff830ad030 r rum_devs +ffffffff830ad110 r rum_rf5225 +ffffffff830ad460 r rum_rf5226 +ffffffff830ad7b0 r rum_def_bbp +ffffffff830ad7f0 r rum_def_mac +ffffffff830ae000 R run_ca +ffffffff830ae030 r run_devs +ffffffff830ae430 r rt2860_rf2850 +ffffffff830ae860 r rt2860_rates +ffffffff830ae920 r rt5592_freqs_40mhz +ffffffff830aea60 r rt5592_freqs_20mhz +ffffffff830aeba0 r rt5592_2ghz_def_rf +ffffffff830aebe0 r rt5592_chan_5ghz +ffffffff830aee30 r rt5592_def_bbp +ffffffff830aee70 r rt5592_bbp_r196 +ffffffff830aeed0 r rt5390_def_bbp +ffffffff830aef00 r rt3572_def_rf +ffffffff830aef40 r rt3070_def_rf +ffffffff830aef70 r rt3593_def_rf +ffffffff830aefb0 r rt5592_def_rf +ffffffff830aefe0 r rt5392_def_rf +ffffffff830af060 r rt5390_def_rf +ffffffff830af0e0 r rt2870_def_mac +ffffffff830b0000 R mtw_ca +ffffffff830b0030 r mtw_devs +ffffffff830b0070 r rt2860_rates +ffffffff830b0130 r mt7601_rf_chan +ffffffff830b01a0 r mt7601_def_bbp +ffffffff830b02d0 r mt7601_rf_bank0 +ffffffff830b0330 r mt7601_rf_bank4 +ffffffff830b03b0 r mt7601_rf_bank5 +ffffffff830b0430 r mt7601_def_mac +ffffffff830b1000 R zyd_ca +ffffffff830b1030 r zyd_devs +ffffffff830b11b0 r zyd_rfmd_init.phyini +ffffffff830b12e0 r zyd_rfmd_init.rfini +ffffffff830b1330 r zyd_rfmd_set_channel.rfprog +ffffffff830b13a0 r zyd_al2230_init.phyini +ffffffff830b1480 r zyd_al2230_init.rfini +ffffffff830b14e0 r zyd_al2230_init_b.phyini +ffffffff830b15d0 r zyd_al2230_init_b.rfini +ffffffff830b1620 r zyd_al2230_set_channel.rfprog +ffffffff830b16d0 r zyd_al7230B_init.phyini_1 +ffffffff830b17b0 r zyd_al7230B_init.rfini_1 +ffffffff830b17f0 r zyd_al7230B_set_channel.rfprog +ffffffff830b1860 r zyd_al7230B_set_channel.rfsc +ffffffff830b1890 r zyd_al2210_init.phyini +ffffffff830b18f0 r zyd_al2210_init.rfini +ffffffff830b1920 r zyd_al2210_set_channel.rfprog +ffffffff830b1960 r zyd_gct_init.phyini +ffffffff830b19b0 r zyd_gct_init.rfini +ffffffff830b1a50 r zyd_gct_set_channel.rfprog +ffffffff830b1a90 r zyd_maxim_set_channel.phyini +ffffffff830b1ba0 r zyd_maxim_set_channel.rfini +ffffffff830b1be0 r zyd_maxim_set_channel.rfprog +ffffffff830b1c50 r zyd_maxim2_set_channel.phyini +ffffffff830b1d70 r zyd_maxim2_set_channel.rfini +ffffffff830b1db0 r zyd_maxim2_set_channel.rfprog +ffffffff830b1e20 r zyd_rf_name.zyd_rfs +ffffffff830b1ea0 r zyd_def_phyB +ffffffff830b20d0 r zyd_def_phy +ffffffff830b3000 R upgt_ca +ffffffff830b3028 r upgt_devs_1 +ffffffff830b3030 r upgt_devs_2 +ffffffff830b4000 R urtw_ca +ffffffff830b4030 r urtw_devs +ffffffff830b4090 r urtw_ratetable +ffffffff830b40f0 r urtw_8225_gain +ffffffff830b4110 r urtw_8225_txpwr_cck_ch14 +ffffffff830b4140 r urtw_8225_txpwr_cck +ffffffff830b4170 r urtw_8225_tx_gain_cck_ofdm +ffffffff830b4176 r urtw_8225_txpwr_ofdm +ffffffff830b4180 r urtw_8225_rf_part1 +ffffffff830b4200 r urtw_8225_rxgain +ffffffff830b42c0 r urtw_8225_agc +ffffffff830b4340 r urtw_8225_rf_part2 +ffffffff830b4470 r urtw_8225_rf_part3 +ffffffff830b4550 r urtw_8225_channel +ffffffff830b458c r urtw_8225_threshold +ffffffff830b45a0 r urtw_8225v2_gain_bg +ffffffff830b45c0 r urtw_8225v2_tx_gain_cck_ofdm +ffffffff830b45f0 r urtw_8225v2_rf_part1 +ffffffff830b4670 r urtw_8225v2_rxgain +ffffffff830b4730 r urtw_8225v2_rf_part2 +ffffffff830b4870 r urtw_8225v2_rf_part3 +ffffffff830b4970 r urtw_8187b_regtbl +ffffffff830b4a90 r urtw_8225v2_b_rf +ffffffff830b4b20 r urtw_8225v2_agc +ffffffff830b4ba0 r urtw_8225v2_ofdm +ffffffff830b5000 R urtwn_ca +ffffffff830b5030 r urtwn_devs +ffffffff830b5350 r rtl8188eu_mac +ffffffff830b54c0 r rtl8188ftv_mac +ffffffff830b5660 r rtl8192eu_mac +ffffffff830b5800 r rtl8192cu_mac +ffffffff830b5958 r rtl8188eu_bb_prog +ffffffff830b5980 r rtl8188ftv_bb_prog +ffffffff830b59a8 r rtl8192eu_bb_prog +ffffffff830b59d0 r rtl8188ce_bb_prog +ffffffff830b59f8 r rtl8188ru_bb_prog +ffffffff830b5a20 r rtl8188cu_bb_prog +ffffffff830b5a48 r rtl8192ce_bb_prog +ffffffff830b5a70 r rtl8192cu_bb_prog +ffffffff830b5aa0 r rtl8188eu_bb_regs +ffffffff830b5c20 r rtl8188eu_bb_vals +ffffffff830b5f20 r rtl8188eu_agc_vals +ffffffff830b6120 r rtl8188ftv_bb_regs +ffffffff830b62c0 r rtl8188ftv_bb_vals +ffffffff830b6600 r rtl8188ftv_agc_vals +ffffffff830b6700 r rtl8192e_bb_regs +ffffffff830b68a0 r rtl8192e_bb_vals +ffffffff830b6be0 r rtl8192eu_agc_vals +ffffffff830b6de0 r rtl8192ce_bb_regs +ffffffff830b6f60 r rtl8188ce_bb_vals +ffffffff830b7250 r rtl8188ce_agc_vals +ffffffff830b74d0 r rtl8188ru_bb_regs +ffffffff830b7650 r rtl8188ru_bb_vals +ffffffff830b7950 r rtl8188ru_agc_vals +ffffffff830b7bd0 r rtl8188cu_bb_vals +ffffffff830b7ec0 r rtl8192ce_bb_vals +ffffffff830b81b0 r rtl8192ce_agc_vals +ffffffff830b8430 r rtl8192cu_bb_vals +ffffffff830b9000 R rsu_ca +ffffffff830b9030 r rsu_devs +ffffffff830b90c8 r rsu_devs_noht +ffffffff830b90d0 r rsu_qid2idx_4ep +ffffffff830b90da r rsu_qid2idx_6ep +ffffffff830b90e4 r rsu_qid2idx_11ep +ffffffff830b90ee r r92s_epaddr +ffffffff830ba000 R otus_ca +ffffffff830ba030 r otus_devs +ffffffff830ba090 r ar_chans +ffffffff830ba0c0 r otus_rates +ffffffff830ba0e0 r ar5416_phy_regs +ffffffff830ba380 r ar5416_phy_vals_2ghz_20mhz +ffffffff830ba8b0 r ar5416_phy_vals_5ghz_20mhz +ffffffff830bade0 r ar5416_banks_vals_5ghz +ffffffff830baef0 r ar5416_banks_vals_2ghz +ffffffff830bb000 r ar5416_banks_regs +ffffffff830bc000 R umb_regstates +ffffffff830bc080 R umb_dataclasses +ffffffff830bc190 R umb_simstate +ffffffff830bc210 R umb_messages +ffffffff830bc2b0 R umb_status +ffffffff830bc570 R umb_cids +ffffffff830bc6e0 R umb_pktstate +ffffffff830bc740 R umb_actstate +ffffffff830bc7a0 R umb_error +ffffffff830bc830 R umb_pintype +ffffffff830bc960 R umb_istate +ffffffff830bc9f0 R umb_ca +ffffffff830bca20 R umb_quirks +ffffffff830bd000 R uath_ca +ffffffff830bd030 r uath_devs +ffffffff830be000 R athn_usb_ca +ffffffff830be030 r athn_usb_devs +ffffffff830bf000 R uow_ca +ffffffff830bf028 r uow_devs +ffffffff830c0000 R uberry_devices +ffffffff830c0008 R uberry_ca +ffffffff830c1000 R upd_ca +ffffffff830c2000 R uwacom_devs +ffffffff830c2010 R uwacom_ca +ffffffff830c2038 R uwacom_accessops +ffffffff830c3000 R bwfm_usb_ca +ffffffff830c3030 r bwfm_usbdevs +ffffffff830c4000 R umstc_ca +ffffffff830c4028 r umstc_devs +ffffffff830c5000 R uhidpp_ca +ffffffff830c5028 r uhidpp_devs +ffffffff830c6000 R ucc_ca +ffffffff830c7000 R iic_ca +ffffffff830c8000 r probes +ffffffff830c9000 R lmtemp_ca +ffffffff830ca000 R lmn_ca +ffffffff830cb000 R lmenv_ca +ffffffff830cc000 R maxtmp_ca +ffffffff830cd000 R adc_ca +ffffffff830ce000 R admtemp_ca +ffffffff830cf000 R admlc_ca +ffffffff830d0000 R admtm_ca +ffffffff830d1000 R admtmp_ca +ffffffff830d2000 R admtt_ca +ffffffff830d3000 R maxds_ca +ffffffff830d4000 R adt_ca +ffffffff830d5000 R lm_i2c_ca +ffffffff830d6000 R admcts_ca +ffffffff830d7000 R wbng_ca +ffffffff830d8000 R nvt_ca +ffffffff830d8030 r nvt_volt_desc +ffffffff830d9000 R adl_ca +ffffffff830da000 R andl_ca +ffffffff830da030 r andl_temp +ffffffff830db000 R spdmem_iic_ca +ffffffff830dc000 R sdtemp_ca +ffffffff830dd000 R lisa_ca +ffffffff830de000 R ihidev_ca +ffffffff830df000 R ikbd_consops +ffffffff830df020 R ikbd_accessops +ffffffff830df038 R ikbd_ca +ffffffff830e0000 R ims_accessops +ffffffff830e0018 R ims_ca +ffffffff830e1000 R imt_accessops +ffffffff830e1018 R imt_ca +ffffffff830e2000 R iatp_accessops +ffffffff830e2018 R iatp_ca +ffffffff830e2040 r mxt_t19_button_map_devs +ffffffff830e3000 R ietp_ca +ffffffff830e3028 R ietp_mouse_access +ffffffff830e4000 R bgw_ca +ffffffff830e5000 R icc_ca +ffffffff830e6000 R gpio_ca +ffffffff830e7000 r sbtn_pnp +ffffffff830e8000 R hext +ffffffff830ea000 R acpitimer_ca +ffffffff830eb000 R acpiac_ca +ffffffff830ec000 R acpibat_ca +ffffffff830ed000 R acpibtn_ca +ffffffff830ee000 R acpicmos_ca +ffffffff830ef000 R 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+ffffffff834ab004 D divert_recvspace +ffffffff834ab008 D divbhashsize +ffffffff834ac000 D icmptstamprepl +ffffffff834ac004 D icmperrppslim +ffffffff834ac008 D icmp_redirtimeout +ffffffff834ad000 D ip_sendredirects +ffffffff834ad004 D ip_defttl +ffffffff834ad008 D ip_mtudisc +ffffffff834ad00c D ip_mtudisc_timeout +ffffffff834ad010 D ipq_mutex +ffffffff834ad020 D ip_maxqueue +ffffffff834ad028 D ipintrq +ffffffff834ad060 d ipsend_task +ffffffff834ad090 d ipsendraw_task +ffffffff834ae000 D ip_mrtproto +ffffffff834ae004 d sin +ffffffff834af000 D rip_sendspace +ffffffff834af008 D rip_recvspace +ffffffff834b0000 D tcp_debug_mtx +ffffffff834b1000 D tcprexmtthresh +ffffffff834b1004 D tcptv_keep_init +ffffffff834b1008 D tcp_rst_ppslim +ffffffff834b100c D tcp_ackdrop_ppslim +ffffffff834b1010 D tcp_syn_hash_size +ffffffff834b1014 D tcp_syn_cache_limit +ffffffff834b1018 D tcp_syn_bucket_limit +ffffffff834b101c D tcp_syn_use_limit +ffffffff834b1020 D syn_cache_mtx +ffffffff834b2000 D tcp_outflags +ffffffff834b3000 D tcp_timer_mtx +ffffffff834b3010 D tcp_mssdflt +ffffffff834b3014 D tcp_rttdflt +ffffffff834b3018 D tcp_do_rfc1323 +ffffffff834b301c D tcp_do_sack +ffffffff834b3020 D tcp_do_rfc3390 +ffffffff834b3024 D tcp_do_tso +ffffffff834b3028 D tcp_reass_limit +ffffffff834b302c D tcp_sackhole_limit +ffffffff834b4000 D tcp_backoff +ffffffff834b4034 D tcp_totbackoff +ffffffff834b5000 D tcp_sendspace +ffffffff834b5004 D tcp_recvspace +ffffffff834b5008 D tcp_autorcvbuf_inc +ffffffff834b6000 D udpcksum +ffffffff834b6004 D udp_sendspace +ffffffff834b6008 D udp_recvspace +ffffffff834b7000 D ipsec_flows_mtx +ffffffff834b7010 D ipsec_ids_idle +ffffffff834b7014 D ipsec_ids_next_flow +ffffffff834b7018 D ipsec_policy_head +ffffffff834b7028 D ipsp_ids_gc_timeout +ffffffff834b7070 D tdb_sadb_mtx +ffffffff834b7080 d tdb_hashmask +ffffffff834b8000 D ipo_tdb_mtx +ffffffff834b8010 D ipsec_acquire_mtx +ffffffff834b8020 D ipsec_acquire_head +ffffffff834b9000 D ipsec_keep_invalid +ffffffff834b9004 D ipsec_require_pfs +ffffffff834b9008 D ipsec_soft_timeout +ffffffff834b900c D ipsec_exp_timeout +ffffffff834b9010 D ipsec_soft_first_use +ffffffff834b9014 D ipsec_exp_first_use +ffffffff834b9018 D ipsec_expire_acquire +ffffffff834b901c D esp_enable +ffffffff834b9020 D ah_enable +ffffffff834ba000 D udpencap_enable +ffffffff834ba004 D udpencap_port +ffffffff834bb000 D carp_vh_rc +ffffffff834bb020 D carp_sc_rc +ffffffff834bb040 D carp_opts +ffffffff834bb058 D carp_cloner +ffffffff834bb088 d carp_send_na.mcast +ffffffff834bc000 d PADDING +ffffffff834bd000 d PADDING +ffffffff834be000 d weak_keys +ffffffff834bf000 D swcr_id +ffffffff834c0000 D window_inflate +ffffffff834c0004 D window_deflate +ffffffff834c1000 D ghash_update +ffffffff834c2000 D mpls_defttl +ffffffff834c2004 D mpls_mapttl_ip +ffffffff834c3000 D nfskevq_lock +ffffffff834c4000 D desirednfsrvcache +ffffffff834c5000 D nfs_niothreads +ffffffff834c6000 D fragtbl +ffffffff834c7000 D ffs_vtbl +ffffffff834c8000 D dirchk +ffffffff834c9000 D desireddquot +ffffffff834ca000 D amap_list_lock +ffffffff834cb000 d uao_list_lock +ffffffff834cc000 D udv_lock +ffffffff834cd000 d uvmexp_countersboot_boot_cpumem +ffffffff834cd0c0 D uvmexp_counters +ffffffff834cd0c8 D vm_min_kernel_address +ffffffff834ce000 D no_constraint +ffffffff834cf000 d uvm_kmapent_warn_rate +ffffffff834d0000 D maxslp +ffffffff834d1000 D uvmpagerops +ffffffff834d2000 D uvm_swap_data_lock +ffffffff834d2010 D swap_syscall_lock +ffffffff834d2020 D oommtx +ffffffff834d3000 D uvm_doswapencrypt +ffffffff834d4000 D gif_list +ffffffff834d4010 D gif_cloner +ffffffff834d5000 d sec_cloner +ffffffff834d5030 d sec_tdb_gc_mtx +ffffffff834d5040 d sec_tdb_gc_task +ffffffff834d6000 D divert6_sendspace +ffffffff834d6004 D divert6_recvspace +ffffffff834d6008 D divb6hashsize +ffffffff834d7000 d in6_get_hw_ifid.allone +ffffffff834d8000 D ip6_sendredirects +ffffffff834d8004 D ip6_defhlim +ffffffff834d8008 D ip6_defmcasthlim +ffffffff834d800c D ip6_maxfragpackets +ffffffff834d8010 D ip6_maxfrags +ffffffff834d8014 D ip6_log_interval +ffffffff834d8018 D ip6_hdrnestlimit +ffffffff834d801c D ip6_dad_count +ffffffff834d8020 D ip6_auto_flowlabel +ffffffff834d8024 D ip6_use_deprecated +ffffffff834d8028 D ip6_neighborgcthresh +ffffffff834d802c D ip6_maxdynroutes +ffffffff834d8030 D rip6_sendspace +ffffffff834d8038 D rip6_recvspace +ffffffff834d8040 D icmp6_redirtimeout +ffffffff834d8044 D icmp6errppslim +ffffffff834d8048 D ip6_mtudisc_timeout +ffffffff834d9000 D frag6_mutex +ffffffff834da000 d icmp6_mtudisc_hiwat +ffffffff834da004 d icmp6_mtudisc_lowat +ffffffff834db000 d randomtab_20 +ffffffff834dc000 D ip6intrq +ffffffff834dc038 d ip6send_task +ffffffff834dd000 D nd6_timer_next +ffffffff834dd008 D nd6_expire_next +ffffffff834dd010 D nd6_delay +ffffffff834dd014 D nd6_umaxtries +ffffffff834dd018 D nd6_mmaxtries +ffffffff834dd01c D nd6_gctimer +ffffffff834dd020 D nd6_maxndopt +ffffffff834dd028 D nd6_mtx +ffffffff834dd038 D nd6_list +ffffffff834de000 d dadq +ffffffff834df000 D pfkeyv2_mtx +ffffffff834df010 d pfkeyv2_seq +ffffffff834e0000 D sadb_exts_allowed_in +ffffffff834e0090 D sadb_exts_required_in +ffffffff834e1000 D cold +ffffffff834e2000 D bdevsw +ffffffff834e2460 D nblkdev +ffffffff834e2470 D cdevsw +ffffffff834e4450 D nchrdev +ffffffff834e4454 D mem_no +ffffffff834e4458 D swapdev +ffffffff834e4460 D constab +ffffffff834e5000 D machine +ffffffff834e5008 D cpu_idle_cycle_fcn +ffffffff834e5010 D lid_action +ffffffff834e5014 D pwr_action +ffffffff834e5018 D isa_constraint +ffffffff834e5028 D dma_constraint +ffffffff834e5040 D uvm_md_constraints +ffffffff834e5058 D delay_func +ffffffff834e5060 D initclock_func +ffffffff834e5068 D startclock_func +ffffffff834e5070 D bootinfo_size +ffffffff834e5074 D waittime +ffffffff834e5078 D dumpmag +ffffffff834e6000 d identifycpu.prevci +ffffffff834e7000 D tsc_rdtsc +ffffffff834e7008 D tsc_timecounter +ffffffff834e7058 D tsc_is_synchronized +ffffffff834e8000 D local_apic +ffffffff834e8020 D lapic_id +ffffffff834e8080 D lapic_tpr +ffffffff834e80a0 d lapic_ppr +ffffffff834e8100 d lapic_isr +ffffffff834e9000 D warn_once +ffffffff834ea000 d errata +ffffffff834eb000 D cpu_ucode_mtx +ffffffff834ec000 D mem_owner_bios +ffffffff834ec008 D mrops +ffffffff834ec028 D mtrrmask +ffffffff834ec030 D mtrrtomrt +ffffffff834ed000 D pmap_pg_wc +ffffffff834ed008 D pmaps_lock +ffffffff834ed018 d pmap_maxkvaddr +ffffffff834ee000 D kv_physwait +ffffffff834ef000 D fpu_save_len +ffffffff834f0000 D i8259_pic +ffffffff834f1000 D softintr_pic +ffffffff834f2000 D ipifunc +ffffffff834f3000 D setperf_mp_mutex +ffffffff834f4000 D db_Grp6 +ffffffff834f4040 D db_Grp7 +ffffffff834f4100 D db_Grp8 +ffffffff834f4140 D db_Grp9 +ffffffff834f4200 D db_GrpA +ffffffff834f4240 D db_GrpB +ffffffff834f4280 D db_GrpC +ffffffff834f42c0 D db_inst_0f0x +ffffffff834f4440 D db_inst_0f2x +ffffffff834f45c0 D db_inst_0f3x +ffffffff834f4740 D db_inst_0f8x +ffffffff834f48c0 D db_inst_0f9x +ffffffff834f4a40 D db_inst_0fax +ffffffff834f4bc0 D db_inst_0fbx +ffffffff834f4d40 D db_inst_0fcx +ffffffff834f4ec0 D db_inst_0f +ffffffff834f4f40 D db_Esc92 +ffffffff834f4f80 D db_Esc94 +ffffffff834f4fc0 D db_Esc95 +ffffffff834f5000 D db_Esc96 +ffffffff834f5040 D db_Esc97 +ffffffff834f5080 D db_Esca5 +ffffffff834f50c0 D db_Escb4 +ffffffff834f5100 D db_Esce3 +ffffffff834f5140 D db_Escf4 +ffffffff834f5180 D db_Esc8 +ffffffff834f5240 D db_Esc9 +ffffffff834f5300 D db_Esca +ffffffff834f53c0 D db_Escb +ffffffff834f5480 D db_Escc +ffffffff834f5540 D db_Escd +ffffffff834f5600 D db_Esce +ffffffff834f56c0 D db_Escf +ffffffff834f5780 D db_Esc_inst +ffffffff834f57c0 D db_Grp1 +ffffffff834f5800 D db_Grp2 +ffffffff834f5840 D db_Grp3 +ffffffff834f5900 D db_Grp4 +ffffffff834f59c0 D db_Grp5 +ffffffff834f5a80 D db_inst_table +ffffffff834f7280 D db_bad_inst +ffffffff834f72a0 D db_index_reg_16 +ffffffff834f72e0 D db_reg +ffffffff834f74e0 D db_seg_reg +ffffffff834f7520 D db_lengths +ffffffff834f8000 D db_regs +ffffffff834f81e0 D db_eregs +ffffffff834f81f0 D db_reg_args +ffffffff834f9000 D timer_mutex +ffffffff834f9010 d i8254_timecounter +ffffffff834fa000 D spleen8x16 +ffffffff834fa058 D spleen12x24 +ffffffff834fa0b0 D spleen16x32 +ffffffff834fa108 D spleen32x64 +ffffffff834fa160 d builtin_fonts +ffffffff834fa1e0 d wsfont_add.cookiegen +ffffffff834fa1f0 d spleen8x16_data +ffffffff834faff0 d spleen12x24_data +ffffffff834fd9f0 d spleen16x32_data +ffffffff835011f0 d spleen32x64_data +ffffffff83510000 D nsphy_cd +ffffffff83511000 D nsphyter_cd +ffffffff83512000 D gentbi_cd +ffffffff83513000 D qsphy_cd +ffffffff83514000 D inphy_cd +ffffffff83515000 D iophy_cd +ffffffff83516000 D eephy_cd +ffffffff83517000 D exphy_cd +ffffffff83518000 D rlphy_cd +ffffffff83519000 D lxtphy_cd +ffffffff8351a000 D luphy_cd +ffffffff8351b000 D mtdphy_cd +ffffffff8351c000 D icsphy_cd +ffffffff8351d000 D sqphy_cd +ffffffff8351e000 D tqphy_cd +ffffffff8351f000 D ukphy_cd +ffffffff83520000 D dcphy_cd +ffffffff83521000 D bmtphy_cd +ffffffff83522000 D brgphy_cd +ffffffff83523000 D xmphy_cd +ffffffff83524000 D amphy_cd +ffffffff83525000 D acphy_cd +ffffffff83526000 D nsgphy_cd +ffffffff83527000 D urlphy_cd +ffffffff83528000 D rgephy_cd +ffffffff83529000 D ciphy_cd +ffffffff8352a000 D ipgphy_cd +ffffffff8352b000 D etphy_cd +ffffffff8352c000 D jmphy_cd +ffffffff8352d000 D atphy_cd +ffffffff8352e000 D scsi_autoconf +ffffffff8352e008 D scsibus_cd +ffffffff8352f000 D cd_cd +ffffffff83530000 D ch_cd +ffffffff83530020 D chquirks +ffffffff83531000 D sd_cd +ffffffff83532000 D st_cd +ffffffff83533000 D uk_cd +ffffffff83534000 D safte_cd +ffffffff83535000 D ses_cd +ffffffff83536000 D sym_cd +ffffffff83536020 D sym_devices +ffffffff83536070 D asym_devices +ffffffff83537000 D rdac_cd +ffffffff83537020 D rdac_devices +ffffffff83538000 D emc_cd +ffffffff83538020 D emc_devices +ffffffff83539000 D hds_cd +ffffffff83539020 D hds_devices +ffffffff8353a000 D atapiscsi_cd +ffffffff8353b000 D wd_cd +ffffffff8353b020 d wddumpmulti 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+ffffffff835490d0 D vmt_cd +ffffffff8354a000 D xen_cd +ffffffff8354a020 D xen_bus_dma_tag +ffffffff8354b000 D xnf_cd +ffffffff8354c000 D xbf_cd +ffffffff8354d000 D hv_msg_dispatch +ffffffff8354d110 D hv_timecounter +ffffffff8354d160 D hyperv_cd +ffffffff8354e000 d hv_ic_devs +ffffffff8354f000 D hvn_cd +ffffffff83550000 D hvs_cd +ffffffff83551000 D virtio_cd +ffffffff83552000 D vio_cd +ffffffff83553000 D vioblk_cd +ffffffff83554000 D viomb_cd +ffffffff83555000 D viornd_cd +ffffffff83556000 D vioscsi_cd +ffffffff83557000 D vmmci_cd +ffffffff83558000 D pci_cd +ffffffff83559000 D arc_fw_hdr +ffffffff83559008 D arc_cd +ffffffff8355a000 D jmb_cd +ffffffff8355b000 D mfii_cd +ffffffff8355c000 D ips_cd +ffffffff8355d000 D eap_cd +ffffffff8355e000 D auacer_cd +ffffffff8355f000 D auich_cd +ffffffff83560000 D azalia_cd +ffffffff83561000 D envy_cd +ffffffff83561020 D envy_matchids +ffffffff83561030 D envy_rates +ffffffff835610b0 D ak4524_dac +ffffffff835610d8 D ak4524_adc +ffffffff83561100 D ak4358_dac +ffffffff83561128 D ak5365_adc +ffffffff83561150 D unkenvy_codec +ffffffff83561180 D envy_cards +ffffffff835613f0 D envy_cards_ht +ffffffff83561600 d julia_eeprom +ffffffff83562000 D emu_cd +ffffffff83563000 D auixp_cd +ffffffff83564000 D clcs_cd +ffffffff83565000 D yds_cd +ffffffff83566000 D auvia_cd +ffffffff83567000 D qle_cd +ffffffff83568000 D mpii_cd +ffffffff83569000 D aq_cd +ffffffff8356a000 D de_cd +ffffffff8356b000 D pcn_cd +ffffffff8356c000 D wdc_sii3114_vtbl +ffffffff8356c038 D wdc_pdc203xx_vtbl +ffffffff8356c070 D wdc_svwsata_vtbl +ffffffff8356c0a8 D pciide_cd +ffffffff8356c0d0 d sis_hostbr_type +ffffffff8356d000 D ppb_cd +ffffffff8356e000 D vr_cd +ffffffff8356e020 D vr_devices +ffffffff8356f000 D txp_cd +ffffffff83570000 D bt848_card_signature +ffffffff83571000 D bktr_cd +ffffffff83572000 D em_cd +ffffffff83573000 D ixgb_cd +ffffffff83574000 D ix_cd +ffffffff83574020 D ixgbe_smart_speed +ffffffff83574024 D ixgbe_enable_msix +ffffffff83575000 D ixl_cd +ffffffff83575020 d ixl_sff_lock +ffffffff83576000 D xge_cd +ffffffff83577000 D thtc_cd +ffffffff83577020 D tht_cd +ffffffff83577040 D tht_txt_desc +ffffffff83577068 D tht_rxf_desc +ffffffff83577090 D tht_rxd_desc +ffffffff835770b8 D tht_txf_desc +ffffffff83578000 D myx_cd +ffffffff83579000 D oce_cd +ffffffff8357a000 D dc_devs +ffffffff8357b000 D cas_cd +ffffffff8357c000 D sis_cd +ffffffff8357d000 D se_cd +ffffffff8357e000 D mbg_cd +ffffffff8357f000 D cbb_cd +ffffffff8357f020 D yc_chipsets +ffffffff8357f1b0 d pccbb_funcs +ffffffff8357f1e0 d pccbb_pcmcia_funcs +ffffffff83580000 D skc_cd +ffffffff83580020 D sk_cd +ffffffff83581000 D mskc_cd +ffffffff83581020 D msk_cd +ffffffff83582000 D puc_cd +ffffffff83583000 D puc_ndevs +ffffffff83584000 D iwi_cd +ffffffff83585000 D wpi_cd +ffffffff83586000 D iwn_cd +ffffffff83587000 D iwm_cd +ffffffff83588000 D iwx_cd +ffffffff83589000 d .compoundliteral +ffffffff83589040 d .compoundliteral.4 +ffffffff83589080 d .compoundliteral.5 +ffffffff835890b0 d .compoundliteral.6 +ffffffff835890f0 d .compoundliteral.7 +ffffffff83589130 d .compoundliteral.8 +ffffffff8358a000 D cmpci_cd +ffffffff8358b000 D iha_cd +ffffffff8358c000 D pcscp_cd +ffffffff8358c020 D pcscp_glue +ffffffff8358d000 D bge_cd +ffffffff8358e000 D bnx_firmwares +ffffffff8358e160 D bnx_rv2ps +ffffffff8358e1c0 D bnx_cd +ffffffff8358e1e0 d flash_5709 +ffffffff8358e210 d flash_table +ffffffff8358f000 D vge_cd +ffffffff83590000 D stge_cd +ffffffff83591000 D nfe_cd +ffffffff83592000 D et_cd +ffffffff83593000 D jme_cd +ffffffff83594000 D age_cd +ffffffff83595000 D alc_dma_burst +ffffffff83595020 D alc_cd +ffffffff83596000 D ale_cd +ffffffff83597000 D amdpm_cd +ffffffff83597020 d amdpm_timecounter +ffffffff83598000 D bce_cd +ffffffff83599000 D rtwn_cd +ffffffff8359a000 d ral_rt2560_opns +ffffffff8359a028 d ral_rt2661_opns +ffffffff8359a050 d ral_rt2860_opns +ffffffff8359b000 D piixpm_cd +ffffffff8359c000 D vic_cd +ffffffff8359d000 D vmx_cd +ffffffff8359e000 D vmwpvs_cd +ffffffff8359f000 D lii_cd +ffffffff835a0000 D ichiic_cd +ffffffff835a1000 D viapm_cd +ffffffff835a1020 d viapm_timecounter +ffffffff835a2000 D amdiic_cd +ffffffff835a3000 D nviic_cd +ffffffff835a4000 D kate_cd +ffffffff835a5000 D km_cd +ffffffff835a6000 D cpu_model_offsets +ffffffff835a6070 D ksmn_cd +ffffffff835a7000 D itherm_cd +ffffffff835a8000 D pchtemp_cd +ffffffff835a9000 D xspd_cd +ffffffff835aa000 D virtio_pci_ops +ffffffff835ab000 D bwfm_pci_buscore_ops +ffffffff835ab030 D bwfm_pci_bus_ops +ffffffff835ab058 D bwfm_pci_msgbuf_ops +ffffffff835ac000 D bnxt_cd +ffffffff835ad000 D mcx_cd +ffffffff835ae000 D iavf_cd +ffffffff835af000 D rge_cd +ffffffff835b0000 D igc_cd +ffffffff835b1000 D ngbe_cd +ffffffff835b2000 D agp_cd +ffffffff835b3000 D intagp_cd +ffffffff835b3020 D agp_i810_methods +ffffffff835b4000 D reservation_ww_class +ffffffff835b5000 d bridge_lock +ffffffff835b5010 d bridge_list +ffffffff835b6000 d drm_connector_enum_list +ffffffff835b61f8 d connector_list_lock +ffffffff835b6208 d connector_list +ffffffff835b7000 d kernel_fb_helper_list +ffffffff835b7010 d kernel_fb_helper_lock +ffffffff835b8000 D drm_global_mutex +ffffffff835b9000 D i2c_bit_algo +ffffffff835b9010 d drm_fence_context_count +ffffffff835b9018 d dma_fence_stub_mtx +ffffffff835b9028 D wait_bit_mtx +ffffffff835b9038 D shrinkers +ffffffff835ba000 d crtc_ww_class +ffffffff835bb000 d panel_lock +ffffffff835bb010 d panel_list +ffffffff835bc000 d ttm_global_mutex +ffffffff835bd000 D drm_sched_policy +ffffffff835be000 D intel_bbops +ffffffff835bf000 d i915_sys_placement +ffffffff835bf020 d i915_ttm_bo_driver +ffffffff835c0000 d mchdev_lock +ffffffff835c1000 D inteldrm_stdscreen +ffffffff835c1030 D inteldrm_scrlist +ffffffff835c1038 D inteldrm_screenlist +ffffffff835c1048 D inteldrm_accessops +ffffffff835c10a8 D inteldrm_cd +ffffffff835c2000 d capture_mutex +ffffffff835c3000 d mitigations +ffffffff835c4000 D i915_modparams +ffffffff835c5000 d schedule_lock +ffffffff835c6000 d unbind_fence_ops +ffffffff835c7000 D intel_graphics_stolen_res +ffffffff835c8000 D btc_valid_sclk +ffffffff835c9000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff835c9020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff835ca000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff835ca008 d r600_cs_packet_parse_vline.vline_status +ffffffff835cb000 d r100_asic +ffffffff835cb2e0 d r200_asic +ffffffff835cb5c0 d r300_asic_pcie +ffffffff835cb8a0 d r300_asic +ffffffff835cbb80 d r420_asic +ffffffff835cbe60 d rs400_asic +ffffffff835cc140 d rs600_asic +ffffffff835cc420 d rs690_asic +ffffffff835cc700 d rv515_asic +ffffffff835cc9e0 d r520_asic +ffffffff835cccc0 d r600_asic +ffffffff835ccfa0 d rv6xx_asic +ffffffff835cd280 d rs780_asic +ffffffff835cd560 d rv770_asic +ffffffff835cd840 d evergreen_asic +ffffffff835cdb20 d sumo_asic +ffffffff835cde00 d btc_asic +ffffffff835ce0e0 d cayman_asic +ffffffff835ce3c0 d trinity_asic +ffffffff835ce6a0 d si_asic +ffffffff835ce980 d ci_asic +ffffffff835cec60 d kv_asic +ffffffff835cf000 d dce6_funcs +ffffffff835cf018 d dce6_hdmi_funcs +ffffffff835cf088 d dce6_dp_funcs +ffffffff835cf0f8 d dce4_funcs +ffffffff835cf110 d dce4_hdmi_funcs +ffffffff835cf180 d dce4_dp_funcs +ffffffff835cf1f0 d dce32_funcs +ffffffff835cf208 d dce32_hdmi_funcs +ffffffff835cf278 d dce32_dp_funcs +ffffffff835cf2e8 d r600_funcs +ffffffff835cf300 d r600_hdmi_funcs +ffffffff835d0000 D radeon_modeset +ffffffff835d0004 D radeon_dynclks +ffffffff835d0008 D radeon_agpmode +ffffffff835d000c D radeon_gart_size +ffffffff835d0010 D radeon_tv +ffffffff835d0014 D radeon_audio +ffffffff835d0018 D radeon_pcie_gen2 +ffffffff835d001c D radeon_msi +ffffffff835d0020 D radeon_lockup_timeout +ffffffff835d0024 D radeon_dpm +ffffffff835d0028 D radeon_aspm +ffffffff835d002c D radeon_runtime_pm +ffffffff835d0030 D radeon_vm_size +ffffffff835d0034 D radeon_vm_block_size +ffffffff835d0038 D radeon_use_pflipirq +ffffffff835d003c D radeon_bapm +ffffffff835d0040 D radeon_backlight +ffffffff835d0044 D radeon_auxch +ffffffff835d0048 D radeon_uvd +ffffffff835d004c D radeon_vce +ffffffff835d0050 D radeon_si_support +ffffffff835d0054 D radeon_cik_support +ffffffff835d0058 D radeondrm_cd +ffffffff835d0078 D radeondrm_stdscreen +ffffffff835d00a8 D radeondrm_scrlist +ffffffff835d00b0 D radeondrm_screenlist +ffffffff835d00c0 D radeondrm_accessops +ffffffff835d1000 D radeon_bbops +ffffffff835d2000 d radeon_bo_driver +ffffffff835d3000 d verde_pg_init +ffffffff835d4000 d cac_weights_pitcairn +ffffffff835d44d0 d cac_weights_oland +ffffffff835d5000 d aldebaran_mode2_handler +ffffffff835d6000 d amdgpu_vbios_version_attrs +ffffffff835d7000 D amdgpu_asic_name +ffffffff835d8000 D amdgpu_vram_limit +ffffffff835d8004 D amdgpu_gart_size +ffffffff835d8008 D amdgpu_gtt_size +ffffffff835d800c D amdgpu_moverate +ffffffff835d8010 D amdgpu_audio +ffffffff835d8014 D amdgpu_pcie_gen2 +ffffffff835d8018 D amdgpu_msi +ffffffff835d801c D amdgpu_dpm +ffffffff835d8020 D amdgpu_fw_load_type +ffffffff835d8024 D amdgpu_aspm +ffffffff835d8028 D amdgpu_runtime_pm +ffffffff835d802c D amdgpu_ip_block_mask +ffffffff835d8030 D amdgpu_bapm +ffffffff835d8034 D amdgpu_vm_size +ffffffff835d8038 D amdgpu_vm_fragment_size +ffffffff835d803c D amdgpu_vm_block_size +ffffffff835d8040 D amdgpu_vm_update_mode +ffffffff835d8044 D amdgpu_dc +ffffffff835d8048 D amdgpu_sched_jobs +ffffffff835d804c D amdgpu_sched_hw_submission +ffffffff835d8050 D amdgpu_cg_mask +ffffffff835d8058 D amdgpu_pg_mask +ffffffff835d805c D amdgpu_sdma_phase_quantum +ffffffff835d8060 D amdgpu_pp_feature_mask +ffffffff835d8064 D amdgpu_lbpw +ffffffff835d8068 D amdgpu_compute_multipipe +ffffffff835d806c D amdgpu_gpu_recovery +ffffffff835d8070 D amdgpu_smu_pptable_id +ffffffff835d8074 D amdgpu_dc_feature_mask +ffffffff835d8078 D amdgpu_async_gfx_ring +ffffffff835d807c D amdgpu_mcbp +ffffffff835d8080 D amdgpu_discovery +ffffffff835d8084 D amdgpu_noretry +ffffffff835d8088 D amdgpu_force_asic_type +ffffffff835d808c D amdgpu_tmz +ffffffff835d8090 D amdgpu_reset_method +ffffffff835d8094 D amdgpu_num_kcq +ffffffff835d8098 D amdgpu_use_xgmi_p2p +ffffffff835d809c D amdgpu_sg_display +ffffffff835d80a0 D amdgpu_user_partt_mode +ffffffff835d80a8 D mgpu_info +ffffffff835d8558 D amdgpu_ras_enable +ffffffff835d855c D amdgpu_ras_mask +ffffffff835d8560 D amdgpu_bad_page_threshold +ffffffff835d8564 D amdgpu_backlight +ffffffff835d8568 D amdgpu_cd +ffffffff835d8588 D amdgpu_stdscreen +ffffffff835d85b8 D amdgpu_scrlist +ffffffff835d85c0 D amdgpu_screenlist +ffffffff835d85d0 D amdgpu_accessops +ffffffff835d9000 d amdgpu_gtt_mgr_attributes +ffffffff835da000 D amdgpu_bbops +ffffffff835db000 D soc15_ih_clientid_name +ffffffff835dc000 D ras_error_string +ffffffff835dc030 D ras_block_string +ffffffff835dc0c0 D ras_mca_block_string +ffffffff835dd000 d amdgpu_bo_driver +ffffffff835de000 d amdgpu_vram_mgr_attributes +ffffffff835df000 d xgmi_mutex +ffffffff835df010 D xgmi_ras_hw_ops +ffffffff835df050 D xgmi_ras +ffffffff835e0000 D aqua_vanjaram_xcp_funcs +ffffffff835e1000 D gfx_v11_0_3_ras +ffffffff835e2000 d gfx_v9_0_ras +ffffffff835e3000 D gfx_v9_4_ras +ffffffff835e4000 D gfx_v9_4_2_ras_ops +ffffffff835e4040 D gfx_v9_4_2_ras +ffffffff835e5000 D gfx_v9_4_3_xcp_funcs +ffffffff835e5020 D gfx_v9_4_3_ras_ops +ffffffff835e5060 D gfx_v9_4_3_ras +ffffffff835e6000 D gfxhub_v1_2_xcp_funcs +ffffffff835e7000 D hdp_v4_0_ras_hw_ops +ffffffff835e7040 D hdp_v4_0_ras +ffffffff835e8000 d jpeg_v2_6_ras +ffffffff835e9000 d jpeg_v4_0_ras +ffffffff835ea000 d jpeg_v4_0_3_ras +ffffffff835eb000 D mca_v3_0_mp0_ras +ffffffff835eb058 D mca_v3_0_mp1_ras +ffffffff835eb0b0 D mca_v3_0_mpio_ras +ffffffff835ec000 D mmhub_v1_0_ras_hw_ops +ffffffff835ec040 D mmhub_v1_0_ras +ffffffff835ed000 D mmhub_v1_7_ras_hw_ops +ffffffff835ed040 D mmhub_v1_7_ras +ffffffff835ee000 D mmhub_v1_8_ras +ffffffff835ef000 D mmhub_v9_4_ras +ffffffff835f0000 D nbio_v4_3_ras +ffffffff835f1000 D nbio_v7_4_ras +ffffffff835f2000 D nbio_v7_9_ras +ffffffff835f3000 d sriov_sc_video_codecs_encode +ffffffff835f3010 d sriov_sc_video_codecs_decode_vcn1 +ffffffff835f3020 d sriov_sc_video_codecs_decode_vcn0 +ffffffff835f3030 d sriov_sc_video_codecs_encode_array +ffffffff835f3060 d sriov_sc_video_codecs_decode_array_vcn1 +ffffffff835f30f0 d sriov_sc_video_codecs_decode_array_vcn0 +ffffffff835f4000 d sdma_v4_0_ras +ffffffff835f5000 D sdma_v4_4_ras +ffffffff835f6000 D sdma_v4_4_2_xcp_funcs +ffffffff835f6020 d sdma_v4_4_2_ras +ffffffff835f7000 d sdma_v6_0_3_ras +ffffffff835f8000 d sienna_cichlid_mode2_handler +ffffffff835f9000 d smu_v13_0_10_mode2_handler +ffffffff835fa000 d sriov_vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff835fa010 d sriov_vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff835fa020 d sriov_vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff835fa030 d sriov_vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff835fa040 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff835fa070 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff835fa100 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff835fa140 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff835fb000 D umc_v6_1_ras +ffffffff835fc000 D umc_v6_7_ras +ffffffff835fd000 D umc_v8_10_ras +ffffffff835fe000 D umc_v8_7_ras +ffffffff835ff000 d vcn_v2_6_ras +ffffffff83600000 d vcn_v4_0_unified_ring_vm_funcs +ffffffff83600140 d vcn_v4_0_ras +ffffffff83601000 d vcn_v4_0_3_ras +ffffffff83602000 d amdgpu_dm_mode_config_helperfuncs +ffffffff83602010 d dm_atomic_state_funcs +ffffffff83603000 d construct_integrated_info.result +ffffffff83603004 d bios_parser_get_firmware_info.result +ffffffff83604000 d dce_funcs +ffffffff83605000 d dce110_funcs +ffffffff83606000 d dce112_funcs +ffffffff83607000 d dce120_funcs +ffffffff83608000 d rv1_clk_funcs +ffffffff83608090 d rv1_clk_internal_funcs +ffffffff83609000 d rv2_clk_internal_funcs +ffffffff8360a000 d dcn2_funcs +ffffffff8360b000 d dcn201_funcs +ffffffff8360c000 d dcn21_funcs +ffffffff8360c090 d rn_bw_params +ffffffff8360d000 D dcn3_fpga_funcs +ffffffff8360d090 d dcn3_funcs +ffffffff8360e000 d vg_funcs +ffffffff8360e090 d dummy_clocks +ffffffff8360e1c0 d vg_bw_params +ffffffff8360f000 d dcn31_funcs +ffffffff8360f090 d dcn31_bw_params +ffffffff83610000 d dcn314_funcs +ffffffff83610090 d dcn314_bw_params +ffffffff83611000 d dcn315_funcs +ffffffff83611090 d dcn315_bw_params +ffffffff83612000 d dcn316_funcs +ffffffff83612090 d dcn316_bw_params +ffffffff83613000 d dcn32_funcs +ffffffff83614000 d dcn10_dpp_cap +ffffffff83615000 d dcn20_dpp_funcs +ffffffff83615110 d dcn20_dpp_cap +ffffffff83616000 d dcn20_hubp_funcs +ffffffff83617000 d dcn20_opp_funcs +ffffffff83618000 d dcn20_tg_funcs +ffffffff83619000 d dcn201_dpp_funcs +ffffffff83619110 d dcn201_dpp_cap +ffffffff8361a000 d dcn201_hubp_funcs +ffffffff8361b000 d dcn201_opp_funcs +ffffffff8361c000 d dcn201_tg_funcs +ffffffff8361d000 d dcn201_res_pool_funcs +ffffffff8361d0f8 d dcn201_ip +ffffffff8361d2b0 d dcn201_soc +ffffffff8361f000 d dcn21_hubp_funcs +ffffffff83620000 d dcn30_afmt_funcs +ffffffff83621000 d dcn30_dpp_funcs +ffffffff83621110 d dcn30_dpp_cap +ffffffff83622000 d dcn30_hubp_funcs +ffffffff83623000 d dcn30_tg_funcs +ffffffff83624000 d dcn30_vpg_funcs +ffffffff83625000 d dcn30_tg_funcs +ffffffff83626000 d res_cap_dcn301 +ffffffff83626040 d dcn301_res_pool_funcs +ffffffff83627000 d dcn302_res_pool_funcs +ffffffff83628000 d dcn303_res_pool_funcs +ffffffff83629000 d dcn31_afmt_funcs +ffffffff8362a000 d dcn31_apg_funcs +ffffffff8362b000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff8362c000 d dcn31_hubp_funcs +ffffffff8362d000 d dcn31_tg_funcs +ffffffff8362e000 d dcn31_res_pool_funcs +ffffffff8362f000 d dcn31_vpg_funcs +ffffffff83630000 d dcn314_tg_funcs +ffffffff83631000 d dcn314_res_pool_funcs +ffffffff83632000 d dcn315_res_pool_funcs +ffffffff83633000 d dcn316_res_pool_funcs +ffffffff83634000 d dcn32_dpp_funcs +ffffffff83634110 d dcn32_dpp_cap +ffffffff83635000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff83636000 d dcn32_hubp_funcs +ffffffff83637000 d dcn32_tg_funcs +ffffffff83638000 d dcn32_res_pool_funcs +ffffffff83639000 d dcn321_res_pool_funcs +ffffffff8363a000 D dcn1_0_ip +ffffffff8363a1b8 D dcn1_0_soc +ffffffff8363c000 D dcn2_0_ip +ffffffff8363c1b8 D dcn2_0_nv14_ip +ffffffff8363c370 D dcn2_0_soc +ffffffff8363d6a8 D dcn2_0_nv14_soc +ffffffff8363e9e0 D dcn2_0_nv12_soc +ffffffff8363fd18 D dcn2_1_ip +ffffffff8363fed0 D dcn2_1_soc +ffffffff83641208 D ddr4_wm_table_gs +ffffffff836412c8 D lpddr4_wm_table_gs +ffffffff83641388 D lpddr4_wm_table_with_disabled_ppt +ffffffff83641448 D ddr4_wm_table_rn +ffffffff83641508 D ddr4_1R_wm_table_rn +ffffffff836415c8 D lpddr4_wm_table_rn +ffffffff83642000 D dcn3_0_ip +ffffffff836421b8 D dcn3_0_soc +ffffffff83644000 D dcn3_01_ip +ffffffff836441b8 D dcn3_01_soc +ffffffff836454f0 D ddr4_wm_table +ffffffff836455b0 D lpddr5_wm_table +ffffffff83646000 D dcn3_02_ip +ffffffff836461b8 D dcn3_02_soc +ffffffff83648000 D dcn3_03_ip +ffffffff836481b8 D dcn3_03_soc +ffffffff8364a000 D dcn3_1_ip +ffffffff8364a1b8 D dcn3_15_ip +ffffffff8364a370 D dcn3_16_ip +ffffffff8364a528 d dcn3_15_soc +ffffffff8364b860 d dcn3_1_soc +ffffffff8364cb98 d dcn3_16_soc +ffffffff8364e000 D dcn3_14_ip +ffffffff8364e1b8 d dcn3_14_soc +ffffffff83650000 D dcn3_2_ip +ffffffff836501b8 D dcn3_2_soc +ffffffff83652000 D dcn3_21_ip +ffffffff836521b8 D dcn3_21_soc +ffffffff83654000 d dsc_policy_max_target_bpp_limit +ffffffff83655000 D DIDTEDCConfig_P12 +ffffffff83655070 d smu7_profiling +ffffffff83656000 d cyan_skillfish_table_map +ffffffff83656080 d cyan_skillfish_message_map +ffffffff83657000 d navi10_table_map +ffffffff83657080 d navi10_pwr_src_map +ffffffff83657090 d navi10_workload_map +ffffffff836570e0 d navi10_message_map +ffffffff83657b60 d navi10_clk_map +ffffffff83657c20 d navi10_feature_mask_map +ffffffff83658000 d sienna_cichlid_table_map +ffffffff83658080 d sienna_cichlid_pwr_src_map +ffffffff83658090 d sienna_cichlid_workload_map +ffffffff836580e0 d sienna_cichlid_message_map +ffffffff83658b60 d sienna_cichlid_clk_map +ffffffff83658c20 d sienna_cichlid_feature_mask_map +ffffffff83659000 d vangogh_message_map +ffffffff83659a80 d vangogh_table_map +ffffffff83659b00 d vangogh_workload_map +ffffffff83659b50 d vangogh_feature_mask_map +ffffffff8365a000 d renoir_table_map +ffffffff8365a080 d renoir_workload_map +ffffffff8365a0d0 d renoir_message_map +ffffffff8365ab50 d renoir_clk_map +ffffffff8365b000 d smu_v13_0_0_message_map +ffffffff8365ba80 d smu_v13_0_0_feature_mask_map +ffffffff8365be50 d smu_v13_0_0_table_map +ffffffff8365bed0 d smu_v13_0_0_pwr_src_map +ffffffff8365bee0 d smu_v13_0_0_workload_map +ffffffff8365bf30 d smu_v13_0_0_clk_map +ffffffff8365c000 d smu_v13_0_4_table_map +ffffffff8365c080 d smu_v13_0_4_message_map +ffffffff8365cb00 d smu_v13_0_4_feature_mask_map +ffffffff8365d000 d smu_v13_0_5_table_map +ffffffff8365d080 d smu_v13_0_5_message_map +ffffffff8365db00 d smu_v13_0_5_feature_mask_map +ffffffff8365e000 d smu_v13_0_7_message_map +ffffffff8365ea80 d smu_v13_0_7_feature_mask_map +ffffffff8365ee50 d smu_v13_0_7_table_map +ffffffff8365eed0 d smu_v13_0_7_pwr_src_map +ffffffff8365eee0 d smu_v13_0_7_workload_map +ffffffff8365ef30 d smu_v13_0_7_clk_map +ffffffff8365f000 d yellow_carp_table_map +ffffffff8365f080 d yellow_carp_message_map +ffffffff8365fb00 d yellow_carp_feature_mask_map +ffffffff83660000 D pci_conf_lock +ffffffff83660010 D pci_bus_dma_tag +ffffffff83660088 D msi_pic +ffffffff83660120 D msix_pic +ffffffff83661000 D pchb_cd +ffffffff83662000 D amas_cd +ffffffff83663000 D cardslot_cd +ffffffff83664000 D cardbus_cd +ffffffff83665000 d csdevs +ffffffff83666000 d ral_rt2560_opns +ffffffff83666028 d ral_rt2661_opns +ffffffff83666050 d ral_rt2860_opns +ffffffff83667000 D pcmcia_cd +ffffffff83668000 D pcmcia_3cxem556_func0 +ffffffff836680b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff83668158 D pcmcia_megahertz_xjem1144_func0 +ffffffff83668210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff836682b0 d pcmcia_3cxem556_func1 +ffffffff83668368 d pcmcia_3cxem556_func1_cfe0 +ffffffff83668408 d pcmcia_megahertz_xjem1144_func1 +ffffffff836684c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff83668560 d pcmcia_sierra_a555_func1 +ffffffff83668618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff836686b8 d pcmcia_sveclancard_func0 +ffffffff83668770 d pcmcia_sveclancard_func0_cfe0 +ffffffff83669000 D ep_pcmcia_prod +ffffffff8366a000 D aic_pcmcia_prod +ffffffff8366b000 D com_pcmcia_prod +ffffffff8366c000 D wdc_pcmcia_pr +ffffffff8366d000 D sm_pcmcia_prod +ffffffff8366e000 D xe_cd +ffffffff8366f000 D pcib_cd +ffffffff83670000 D amdpcib_cd +ffffffff83671000 D tcpcib_cd +ffffffff83672000 D aapic_cd +ffffffff83673000 D hme_cd +ffffffff83674000 D isa_cd +ffffffff83675000 D isadma_cd +ffffffff83676000 D fdc_cd +ffffffff83677000 D fd_types +ffffffff836771f8 D fd_cd +ffffffff83678000 D mpu_cd +ffffffff83679000 D pcppi_cd +ffffffff8367a000 D spkr_cd +ffffffff8367b000 D wbsio_cd +ffffffff8367c000 D schsio_cd +ffffffff8367d000 D it_cd +ffffffff8367e000 D uguru_cd +ffffffff8367f000 D aps_cd +ffffffff83680000 D isa_bus_dma_tag +ffffffff83681000 D wsdisplay_cd +ffffffff83681020 D wsdisplay_cons +ffffffff83681058 D wsdisplay_defaultscreens +ffffffff83682000 D wskbd_cd +ffffffff83682020 D wskbd_default_bell_data +ffffffff83682030 D wskbd_default_keyrepeat_data +ffffffff83682040 D wskbd_srcops +ffffffff83683000 d compose_tab +ffffffff83684000 D wsmouse_cd +ffffffff83684020 D wsmouse_srcops +ffffffff83685000 D wsmux_srcops +ffffffff83685030 D wsmux_tree_lock +ffffffff83686000 D vt100_output +ffffffff83687000 D pckbd_cd +ffffffff83688000 D pms_cd +ffffffff83688020 d synaptics_params +ffffffff83688030 d alps_params +ffffffff83689000 D skgpio_cd +ffffffff8368a000 D pctr_conf_lock +ffffffff8368b000 D ukbd_keymapdata +ffffffff8368c000 D usbrev_str +ffffffff8368c030 D usb_cd +ffffffff8368d000 d usbd_ratecheck.errinterval +ffffffff8368e000 D uhub_cd +ffffffff8368f000 D uaudio_cd +ffffffff83690000 D uvideo_ctrls +ffffffff836902d8 D uvideo_cd +ffffffff83691000 D utvfu_norm_params +ffffffff83691030 D utvfu_cd +ffffffff83692000 D udl_reg_vals_640x480_60 +ffffffff83692020 D udl_reg_vals_640x480_67 +ffffffff83692040 D udl_reg_vals_640x480_72 +ffffffff83692060 D udl_reg_vals_640x480_75 +ffffffff83692080 D udl_reg_vals_800x480_61 +ffffffff836920a0 D udl_reg_vals_800x600_56 +ffffffff836920c0 D udl_reg_vals_800x600_60 +ffffffff836920e0 D udl_reg_vals_800x600_72 +ffffffff83692100 D udl_reg_vals_800x600_74 +ffffffff83692120 D udl_reg_vals_800x600_75 +ffffffff83692140 D udl_reg_vals_1024x768_60 +ffffffff83692160 D udl_reg_vals_1024x768_70 +ffffffff83692180 D udl_reg_vals_1024x768_75 +ffffffff836921a0 D udl_reg_vals_1280x800_60 +ffffffff836921c0 D udl_reg_vals_1280x960_60 +ffffffff836921e0 D udl_reg_vals_1280x1024_60 +ffffffff83692200 D udl_reg_vals_1280x1024_75 +ffffffff83692220 D udl_reg_vals_1366x768_60 +ffffffff83692240 D udl_reg_vals_1440x900_60 +ffffffff83692260 D udl_reg_vals_1440x900_59 +ffffffff83692280 D udl_reg_vals_1440x900_75 +ffffffff836922a0 D udl_reg_vals_1680x1050_60 +ffffffff836922c0 D udl_reg_vals_1600x1200_60 +ffffffff836922e0 D udl_reg_vals_1920x1080_60 +ffffffff83692300 D udl_null_key_1 +ffffffff83692310 D udl_decomp_table +ffffffff83693510 D udl_cd +ffffffff83693530 D udl_stdscreen +ffffffff83693560 D udl_scrlist +ffffffff83693568 D udl_screenlist +ffffffff83693578 D udl_accessops +ffffffff83694000 D umidi_cd +ffffffff83695000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff83695020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff83695040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff83695060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff83695080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff836950a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff836950c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff836950e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff83695100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff83695120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff83695140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff83695160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff83695180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff836951a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff836951c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff836951e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff83695200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff83695220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff83695240 D umidi_quirklist +ffffffff836954a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff836954c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff836954d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff836954f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff83695500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff83695520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff83695530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff83695550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff83695560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff83695580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff83695590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff836955b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff836955c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff836955e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff836955f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff83695610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff83695620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff83695640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff83695650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff83695670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff83695680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff836956a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff836956b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff836956d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff836956e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff83695700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff83695710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff83695730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff83695740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff83695760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff83695770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff83695790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff836957a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff836957c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff836957d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff836957f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff83696000 D ucom_cd +ffffffff83696020 D sysctl_ucomlock +ffffffff83697000 D ugen_cd +ffffffff83698000 D uhidev_cd +ffffffff83698020 d uhidev_use_rdesc.reportbuf +ffffffff83699000 D uhid_cd +ffffffff8369a000 D fido_cd +ffffffff8369b000 D ujoy_cd +ffffffff8369c000 D ukbd_cd +ffffffff8369d000 D ums_cd +ffffffff8369d020 d ums_fix_elecom_descriptor.match +ffffffff8369e000 D umt_cd +ffffffff8369f000 D def_scale +ffffffff8369f020 D uts_cd +ffffffff836a0000 D ubcmtp_cd +ffffffff836a0020 d ubcmtp_wsmousecfg +ffffffff836a1000 D ucycom_cd +ffffffff836a2000 D uslhcom_cd +ffffffff836a3000 D ulpt_fwdevs +ffffffff836a3060 D ulpt_cd +ffffffff836a3080 D ulptusein +ffffffff836a4000 D umass_cd +ffffffff836a4020 d umass_bbb_transfer.dCBWtag +ffffffff836a5000 D uthum_cd +ffffffff836a6000 D ugold_cd +ffffffff836a6020 d cmd_init +ffffffff836a6028 d cmd_type +ffffffff836a6030 d cmd_data +ffffffff836a7000 D utrh_cd +ffffffff836a8000 D uoakrh_cd +ffffffff836a9000 D uoaklux_cd +ffffffff836aa000 D uoakv_cd +ffffffff836ab000 D uonerng_cd +ffffffff836ac000 D urng_cd +ffffffff836ad000 D udcf_cd +ffffffff836ae000 D umbg_cd +ffffffff836af000 D uvisor_cd +ffffffff836b0000 D udsbr_cd +ffffffff836b1000 D utwitch_cd +ffffffff836b2000 D aue_cd +ffffffff836b3000 D axe_cd +ffffffff836b4000 D axen_cd +ffffffff836b5000 D smsc_cd +ffffffff836b6000 D cue_devs +ffffffff836b6010 D cue_cd +ffffffff836b7000 D kue_cd +ffffffff836b8000 D cdce_cd +ffffffff836b9000 D urndis_cd +ffffffff836ba000 D mos_cd +ffffffff836bb000 D mue_cd +ffffffff836bc000 D udav_cd +ffffffff836bd000 D upl_devs +ffffffff836bd008 D upl_cd +ffffffff836be000 D ugl_devs +ffffffff836be008 D ugl_cd +ffffffff836bf000 D url_cd +ffffffff836c0000 D ure_cd +ffffffff836c1000 D uaq_cd +ffffffff836c2000 D umodem_cd +ffffffff836c3000 D uftdi_cd +ffffffff836c4000 D uplcom_cd +ffffffff836c5000 D umct_cd +ffffffff836c6000 D uvscom_cd +ffffffff836c7000 D ubsa_cd +ffffffff836c8000 D ukspan_cd +ffffffff836c9000 D uslcom_cd +ffffffff836ca000 D uark_cd +ffffffff836cb000 D moscom_cd +ffffffff836cc000 D umcs_cd +ffffffff836cd000 D uscom_cd +ffffffff836ce000 D ucrcom_cd +ffffffff836cf000 D uxrcom_cd +ffffffff836d0000 D uipaq_cd +ffffffff836d1000 D umsm_cd +ffffffff836d2000 D uchcom_cd +ffffffff836d3000 D uticom_cd +ffffffff836d4000 D wi_func_usb +ffffffff836d4060 D wi_usb_cd +ffffffff836d5000 D atu_cd +ffffffff836d5020 D atu_devs +ffffffff836d5270 D atu_radfirm +ffffffff836d6000 D ural_cd +ffffffff836d7000 D rum_cd +ffffffff836d8000 D run_cd +ffffffff836d8020 D rt3070_freqs +ffffffff836d9000 D mtw_cd +ffffffff836da000 D zyd_cd +ffffffff836db000 D upgt_cd +ffffffff836dc000 D urtw_cd +ffffffff836dd000 D urtwn_cd +ffffffff836de000 D rsu_cd +ffffffff836df000 D otus_cd +ffffffff836df020 d AR_PLCP_HDR_INTR +ffffffff836e0000 D umb_xfer_tout +ffffffff836e0010 D umb_uuid_basic_connect +ffffffff836e0020 D umb_uuid_context_internet +ffffffff836e0030 D umb_uuid_qmi_mbim +ffffffff836e0040 D umb_cd +ffffffff836e0060 D umb_delay +ffffffff836e0070 D umb_qmi_alloc_cid +ffffffff836e0080 D umb_qmi_fcc_auth +ffffffff836e1000 D uath_cd +ffffffff836e2000 D uow_cd +ffffffff836e3000 D uberry_cd +ffffffff836e4000 D upd_cd +ffffffff836e4020 d upd_usage_roots +ffffffff836e40a0 d upd_usage_batdep +ffffffff836e5000 D uwacom_cd +ffffffff836e5020 d uwacom_attach.wacom_report_buf +ffffffff836e6000 D bwfm_usb_bus_ops +ffffffff836e7000 D umstc_cd +ffffffff836e8000 D uhidpp_cd +ffffffff836e9000 D ucc_cd +ffffffff836ea000 D iic_cd +ffffffff836eb000 D probe_addrs_sensor +ffffffff836eb008 D probe_addrs_eeprom +ffffffff836ec000 D lmtemp_cd +ffffffff836ed000 D lmn_worklist +ffffffff836ed240 D lmn_cd +ffffffff836ee000 D lmenv_cd +ffffffff836ef000 D maxtmp_cd +ffffffff836f0000 D adc_cd +ffffffff836f1000 D admtemp_cd +ffffffff836f2000 D admlc_cd +ffffffff836f3000 D admtm_cd +ffffffff836f4000 D admtmp_cd +ffffffff836f5000 D admtt_cd +ffffffff836f6000 D maxds_cd +ffffffff836f7000 D adt_chips +ffffffff836f7160 D worklist +ffffffff836f71a0 D adt_cd +ffffffff836f8000 D admcts_cd +ffffffff836f9000 D wbng_cd +ffffffff836fa000 D nvt_cd +ffffffff836fb000 D adl_worklist +ffffffff836fb138 D adl_cd +ffffffff836fc000 D andl_cd +ffffffff836fd000 D sdtemp_cd +ffffffff836fe000 D lisa_cd +ffffffff836ff000 D ihidev_cd +ffffffff83700000 D ikbd_cd +ffffffff83701000 D ims_cd +ffffffff83702000 D imt_cd +ffffffff83703000 D iatp_cd +ffffffff83704000 D ietp_cd +ffffffff83705000 D bgw_cd +ffffffff83706000 D icc_cd +ffffffff83707000 D gpio_cd +ffffffff83708000 D acpi_cd +ffffffff83708020 D acpi_pcidevs +ffffffff83708030 D acpi_pcirootdevs +ffffffff83708040 D acpi_taskq +ffffffff83708050 d acpi_indicator.save_led_state +ffffffff83708060 d acpi_getprop.prop_guid +ffffffff83708070 d acpi_getpropint.prop_guid +ffffffff83708080 D acpi_skip_hids +ffffffff837080f0 D acpi_isa_hids +ffffffff83709000 D aml_intlen +ffffffff83709010 D aml_table +ffffffff83709af0 d osstring +ffffffff83709b10 D aml_defobj +ffffffff83709ca0 D aml_valid_osi +ffffffff83709d78 D acpi_max_osi +ffffffff83709d80 D aml_regionspace +ffffffff8370b000 D acpitimer_cd +ffffffff8370b020 d acpi_timecounter +ffffffff8370c000 D acpiac_cd +ffffffff8370c020 D acpiac_hids +ffffffff8370d000 D acpibat_cd +ffffffff8370d020 D acpibat_hids +ffffffff8370e000 D acpibtn_cd +ffffffff8370e020 D acpibtn_hids +ffffffff8370f000 D acpicmos_cd +ffffffff8370f020 D acpicmos_hids +ffffffff83710000 D acpicpu_cd +ffffffff83710020 D acpicpu_hids +ffffffff83710030 d acpicpu_set_pdc.cpu_oscuuid +ffffffff83711000 D acpihpet_cd +ffffffff83711020 d hpet_timecounter +ffffffff83712000 D acpiec_cd +ffffffff83712020 D acpiec_hids +ffffffff83713000 D acpitz_cd +ffffffff83713020 D acpitz_perflevel +ffffffff83714000 D acpimadt_cd +ffffffff83715000 D acpimcfg_cd +ffffffff83716000 D acpiprt_map_list +ffffffff83716010 D acpiprt_cd +ffffffff83716030 D acpiprt_pri +ffffffff83717000 D acpidmar_force_cm +ffffffff83717008 D acpidmar_cd +ffffffff83717030 D vtd_faults +ffffffff83718000 D acpidock_cd +ffffffff83719000 D abl_cd +ffffffff83719020 D abl_hids +ffffffff8371a000 D asmc_cd +ffffffff8371a020 D asmc_hids +ffffffff8371b000 D acpiasus_cd +ffffffff8371b020 D acpiasus_hids +ffffffff8371c000 D acpithinkpad_cd +ffffffff8371c020 D acpithinkpad_hids +ffffffff8371d000 D acpitoshiba_cd +ffffffff8371d020 D acpitoshiba_hids +ffffffff8371e000 D acpisony_cd +ffffffff8371f000 D acpivideo_cd +ffffffff83720000 D acpivout_cd +ffffffff83721000 D acpipwrres_cd +ffffffff83722000 D aibs_cd +ffffffff83722020 d aibs_hids +ffffffff83723000 D aplgpio_cd +ffffffff83723020 D aplgpio_hids +ffffffff83724000 D bytgpio_cd +ffffffff83724020 D bytgpio_hids +ffffffff83725000 D chvgpio_cd +ffffffff83725020 D chvgpio_hids +ffffffff83726000 D glkgpio_cd +ffffffff83726020 D glkgpio_hids +ffffffff83727000 D pchgpio_cd +ffffffff83727020 D pchgpio_hids +ffffffff83727080 D pchgpio_devices +ffffffff83728000 D tipmic_cd +ffffffff83728020 D tipmic_thermal_regmap +ffffffff83728030 D tipmic_power_regmap +ffffffff83729000 D ccpmic_cd +ffffffff83729020 D ccpmic_thermal_regmap +ffffffff83729023 D ccpmic_power_regmap +ffffffff8372a000 D com_hids +ffffffff8372b000 D sdhc_hids +ffffffff8372c000 D dwiic_hids +ffffffff8372c050 D ihidev_hids +ffffffff8372c070 D ietp_hids +ffffffff8372c220 D iatp_hids +ffffffff8372c240 d dwiic_acpi_found_ihidev.i2c_hid_guid +ffffffff8372d000 D acpicbkbd_cd +ffffffff8372d020 D acpicbkbd_hids +ffffffff8372e000 D acpials_cd +ffffffff8372e020 D acpials_hids +ffffffff8372f000 D tpm_cd +ffffffff8372f020 D tpm_hids +ffffffff83730000 D acpihve_cd +ffffffff83731000 D acpisbs_cd +ffffffff83731020 D acpisbs_hids +ffffffff83732000 D acpisurface_cd +ffffffff83732020 D acpisurface_hids +ffffffff83733000 D ipmi_acpi_hids +ffffffff83734000 D amdgpio_cd +ffffffff83734020 D amdgpio_hids +ffffffff83735000 D acpihid_cd +ffffffff83735020 D acpihid_hids +ffffffff83735030 d acpihid_guid +ffffffff83736000 d iosf_hids +ffffffff83737000 D acpipci_cd +ffffffff83737020 D acpipci_hids +ffffffff83737040 d acpipci_osc.uuid +ffffffff83738000 D efi_cd +ffffffff83739000 D vmm_cd +ffffffff8373a000 D vmm_hv_signature +ffffffff8373b000 D sdmmc_cd +ffffffff8373c000 D bwfm_sdio_bus_ops +ffffffff8373c028 D bwfm_sdio_buscore_ops +ffffffff8373d000 D onewire_cd +ffffffff8373e000 D owid_cd +ffffffff8373f000 D owsbm_cd +ffffffff83740000 D owtemp_cd +ffffffff83741000 D owctr_cd +ffffffff83742000 D hz +ffffffff83742004 D tick +ffffffff83742008 D tick_nsec +ffffffff8374200c D initialvnodes +ffffffff83742010 D maxprocess +ffffffff83742014 D maxthread +ffffffff83742018 D maxfiles +ffffffff83742020 D nmbclust +ffffffff83742028 D bufcachepercent +ffffffff8374202c D fscale +ffffffff83742030 D shminfo +ffffffff83742044 D seminfo +ffffffff83743000 D extraloc +ffffffff83743100 D rextraloc +ffffffff83743110 D locnames +ffffffff837431f0 D locnamp +ffffffff83743410 D pv_size +ffffffff83743420 D pv +ffffffff83743640 d loc +ffffffff83743ad0 D cfdata +ffffffff8374a6a8 D cfroots +ffffffff8374a6b4 D cfroots_size +ffffffff8374a6c0 D pdevnames +ffffffff8374a828 D pdevnames_size +ffffffff8374a830 D pdevinit +ffffffff8374b000 D rootdev +ffffffff8374b004 D dumpdev +ffffffff8374b010 D swdevt +ffffffff8374c000 A __kudata_start +ffffffff8374c000 D tlb_shoot_first_pcid +ffffffff8374c008 D tlb_shoot_addr1 +ffffffff8374c010 D tlb_shoot_addr2 +ffffffff8374c018 D tlb_shoot_wait +ffffffff8374d000 A __kudata_end +ffffffff8374d000 C _edata +ffffffff8374d000 b drm_minors_idr +ffffffff8374d008 B drm_refcnt +ffffffff8374e000 B vga_console_screen +ffffffff8374e070 B vga_console_attached +ffffffff8374e078 B vga_console_vc +ffffffff8374e488 B vgaconsole +ffffffff8374e48c B vga_console_type +ffffffff8374f000 b wdc_alloc_queue.inited +ffffffff8374f008 B wdc_xfer_pool +ffffffff8374f1b0 B wdc_xfer_iopool +ffffffff83750000 B aic_debug +ffffffff83751000 B gdt_cnt +ffffffff83751004 B gdt_polling +ffffffff83751005 B gdt_from_wait +ffffffff83751008 b gdt_exec_ccb.__level +ffffffff8375100c B gdt_wait_index +ffffffff83751010 B gdt_wait_gdt +ffffffff83752000 B sili_error_pmp_ports +ffffffff83753000 B ncr53c9x_debug +ffffffff83753008 b ecb_iopool +ffffffff83753048 b ecb_pool_initialized +ffffffff83753050 b ecb_pool +ffffffff837531f8 B sdebug +ffffffff83754000 B epic_copy_small +ffffffff83755000 B comconsaddr +ffffffff83755008 B comconsiot +ffffffff83755010 B comconsioh +ffffffff83755018 B comconsfreq +ffffffff8375501c B comcons_reg_width +ffffffff83755020 B commajor +ffffffff83755024 B comconsunit +ffffffff83755028 B comcons_reg_shift +ffffffff8375502c B comconsattached +ffffffff83756000 B pckbc_console +ffffffff83756004 B pckbc_console_attached +ffffffff83756008 B pckbc_consdata +ffffffff837560e0 b pckbc_cons_slotdata +ffffffff83757000 b cy_poll.counter +ffffffff83758000 B atw_xindiv2 +ffffffff83759000 B rtw_rfprog_fallback +ffffffff83759004 B rtw_do_chip_reset +ffffffff8375a000 b malo_cmd_string.cmd_buf +ffffffff8375b000 b iosf_mbi +ffffffff8375c000 B uhcixfer +ffffffff8375d000 B ohcixfer +ffffffff8375d008 b ohci_intr.ohci_intr_tv +ffffffff8375e000 B ehcixfer +ffffffff8375f000 B xhcixfer +ffffffff83760000 B ccp_softc +ffffffff83761000 B ipmi_enabled +ffffffff83761008 B ipmi_sensor_list +ffffffff83762000 B mpath +ffffffff83763000 B sr_bootuuid +ffffffff83763010 B sr_bootkey +ffffffff83763030 B softraid0 +ffffffff83763038 B sr_hotplug_callbacks +ffffffff83764000 B gf_pow +ffffffff83764300 B gf_map +ffffffff83764b00 B gf_log +ffffffff83765000 b ksym_syms +ffffffff83765008 b ksym_syms_size +ffffffff83766000 B kstat_version +ffffffff83766008 B kstat_id_tree +ffffffff83766010 B kstat_pv_tree +ffffffff83766018 B kstat_nm_tree +ffffffff83766020 b kstat_init.initialized +ffffffff83766028 B kstat_pool +ffffffff83767000 B stat_fbufs_in +ffffffff83767004 B stat_fbufs_wait +ffffffff83767008 B stat_opened_fusedev +ffffffff83767010 B fuse_d_list +ffffffff83768000 B fusefs_fbuf_pool +ffffffff83769000 B pf_state_pl +ffffffff837691a8 B pf_src_tree_pl +ffffffff83769350 B pf_pktdelay_pl +ffffffff837694f8 B pf_status +ffffffff83769700 B tree_id +ffffffff83769708 B tree_src_tracking +ffffffff83769710 B pf_sn_item_pl +ffffffff837698b8 B pf_statetbl +ffffffff837698c0 B pf_state_item_pl +ffffffff83769a68 B pf_state_key_pl +ffffffff83769c10 B pf_purge_states_limit +ffffffff83769c18 B pf_rule_item_pl +ffffffff83769dc0 b pf_purge_expired_states.cur +ffffffff83769dc8 B pf_tcp_secret_init +ffffffff83769dd0 B pf_tcp_secret +ffffffff83769de0 B pf_tcp_secret_ctx +ffffffff83769eb0 B pf_tcp_iss_off +ffffffff83769ec0 B pf_queues +ffffffff83769ee0 B pf_queues_active +ffffffff83769ee8 B pf_queues_inactive +ffffffff83769ef0 B pf_rule_pl +ffffffff8376a098 B pf_queue_pl +ffffffff8376b000 B pf_frent_pl +ffffffff8376b1a8 B pf_frnode_pl +ffffffff8376b350 B pf_frag_pl +ffffffff8376b4f8 B pf_state_scrub_pl +ffffffff8376b6a0 B pf_fragqueue +ffffffff8376b6b0 B pf_frag_mtx +ffffffff8376b6c0 B pf_frnode_tree +ffffffff8376c000 B pf_anchors +ffffffff8376c008 B pf_main_anchor +ffffffff8376c510 B pf_anchor_pl +ffffffff8376d000 B pf_ioctl_trans +ffffffff8376d008 B pf_default_rule +ffffffff8376d548 B pf_tag_pl +ffffffff8376d6f0 B pf_default_rule_new +ffffffff8376dc30 B pf_anchor_stack +ffffffff8376dc38 B pf_trans_set +ffffffff8376dc60 B pf_tcount +ffffffff8376f000 B pfr_ktable_pl +ffffffff8376f1b0 B pfr_kentry_pl +ffffffff8376f6a8 B pfr_kcounters_pl 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