--- 7.5/2024-06-01T06:17:04Z/2024-05-16T00:00:00Z/nm-bsd-ot14.txt Mon Jun 3 03:24:51 2024 +++ 7.5/2024-06-01T06:17:04Z/2024-05-17T00:00:00Z/nm-bsd-ot14.txt Mon Jun 3 06:16:39 2024 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001418f A acpi_pdirpa 01000000 A __kernel_phys_base -02628000 T __kernel_kutext_phys -0262b000 C __kernel_cptext_phys -0262c000 C __kernel_rodata_phys -02f2e000 R __kernel_kutext_page_phys -02f30000 C __kernel_randomdata_phys -031eb000 R __kernel_data_phys -03544000 D __kernel_kudata_phys -03545000 C __kernel_bss_phys +02627000 T __kernel_kutext_phys +0262a000 C __kernel_cptext_phys +0262b000 C __kernel_rodata_phys +02f2d000 R __kernel_kutext_page_phys +02f2f000 C __kernel_randomdata_phys +031ea000 R __kernel_data_phys +03546000 D __kernel_kudata_phys +03547000 C __kernel_bss_phys 03a00000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -4794,18 +4794,18 @@ ffffffff8121d630 T ufshci_utr_cmd_inquiry ffffffff8121d8b0 T ufshci_utr_cmd_capacity16 ffffffff8121db30 T ufshci_utr_cmd_capacity ffffffff8121ddb0 T ufshci_utr_cmd_io -ffffffff8121e060 T ufshci_utr_cmd_sync -ffffffff8121e280 T ufshci_ccb_free -ffffffff8121e380 T ufshci_scsi_io -ffffffff8121e590 T ufshci_scsi_sync -ffffffff8121e6e0 T ufshci_scsi_inquiry -ffffffff8121e8c0 T ufshci_scsi_capacity16 -ffffffff8121eaa0 T ufshci_scsi_capacity -ffffffff8121ec80 T ufshci_minphys -ffffffff8121ecb0 T ufshci_scsi_probe -ffffffff8121ece0 T ufshci_scsi_free -ffffffff8121ed10 T ufshci_scsi_io_done -ffffffff8121ee70 T ufshci_scsi_done +ffffffff8121e070 T ufshci_utr_cmd_sync +ffffffff8121e290 T ufshci_ccb_free +ffffffff8121e390 T ufshci_scsi_io +ffffffff8121e5a0 T ufshci_scsi_sync +ffffffff8121e6f0 T ufshci_scsi_inquiry +ffffffff8121e8d0 T ufshci_scsi_capacity16 +ffffffff8121eab0 T ufshci_scsi_capacity +ffffffff8121ec90 T ufshci_minphys +ffffffff8121ecc0 T ufshci_scsi_probe +ffffffff8121ecf0 T ufshci_scsi_free +ffffffff8121ed20 T ufshci_scsi_io_done +ffffffff8121ee80 T ufshci_scsi_done ffffffff8121f000 T ksymsattach ffffffff8121f0d0 T ksymsopen ffffffff8121f130 T ksymsclose @@ -10175,23 +10175,23 @@ ffffffff81464e20 T socket_send ffffffff81464ee0 T ip_mforward ffffffff81465150 T ip_mdq ffffffff81466000 T ip_output -ffffffff814669d0 T ip_insertoptions -ffffffff81466b80 T ip_output_ipsec_lookup -ffffffff81466ce0 T in_proto_cksum_out -ffffffff81466fb0 T ip_mloopback -ffffffff81467090 T ip_output_ipsec_send -ffffffff814673b0 T ip_fragment -ffffffff81467800 T ip_output_ipsec_pmtu_update -ffffffff81467900 T ip_optcopy -ffffffff81467a30 T in_hdr_cksum_out -ffffffff81467b10 T ip_ctloutput -ffffffff81468380 T ip_pcbopts -ffffffff814685b0 T ip_setmoptions -ffffffff81468b00 T ip_getmoptions -ffffffff81468c60 T ip_multicast_if -ffffffff81468d40 T ip_freemoptions -ffffffff81468dd0 T in_ifcap_cksum -ffffffff81468e30 T in_delayed_cksum +ffffffff814669e0 T ip_insertoptions +ffffffff81466b90 T ip_output_ipsec_lookup +ffffffff81466cf0 T in_proto_cksum_out +ffffffff81466fc0 T ip_mloopback +ffffffff814670a0 T ip_output_ipsec_send +ffffffff814673c0 T ip_fragment +ffffffff81467810 T ip_output_ipsec_pmtu_update +ffffffff81467910 T ip_optcopy +ffffffff81467a40 T in_hdr_cksum_out +ffffffff81467b20 T ip_ctloutput +ffffffff81468390 T ip_pcbopts +ffffffff814685c0 T ip_setmoptions +ffffffff81468b10 T ip_getmoptions +ffffffff81468c70 T ip_multicast_if +ffffffff81468d50 T ip_freemoptions +ffffffff81468de0 T in_ifcap_cksum +ffffffff81468e40 T in_delayed_cksum ffffffff81469000 T rip_attach ffffffff814690f0 T rip_detach ffffffff81469170 T rip_lock @@ -13827,15 +13827,15 @@ ffffffff8168e080 T ioapic_find_bybase ffffffff8168e0e0 T ioapic_print_redir ffffffff8168e1a0 T ioapic_match ffffffff8168e1f0 T ioapic_attach -ffffffff8168e530 T ioapic_activate -ffffffff8168e600 T ioapic_set_id -ffffffff8168e6f0 T ioapic_hwmask -ffffffff8168e7a0 T ioapic_hwunmask -ffffffff8168e840 T ioapic_addroute -ffffffff8168e8b0 T ioapic_delroute -ffffffff8168e980 T apic_set_redir -ffffffff8168ebb0 T ioapic_enable -ffffffff8168ecc0 T ioapic_dump +ffffffff8168e540 T ioapic_activate +ffffffff8168e610 T ioapic_set_id +ffffffff8168e700 T ioapic_hwmask +ffffffff8168e7b0 T ioapic_hwunmask +ffffffff8168e850 T ioapic_addroute +ffffffff8168e8c0 T ioapic_delroute +ffffffff8168e990 T apic_set_redir +ffffffff8168ebc0 T ioapic_enable +ffffffff8168ecd0 T ioapic_dump ffffffff8168f000 T efifb_match ffffffff8168f090 T efifb_attach ffffffff8168f370 T efifb_ioctl @@ -19899,26 +19899,26 @@ ffffffff8197a240 T drm_gem_close_ioctl ffffffff8197a290 T drm_gem_flink_ioctl ffffffff8197a400 T drm_gem_open_ioctl ffffffff8197a530 T drm_gem_open -ffffffff8197a560 T drm_gem_release -ffffffff8197a5a0 T drm_gem_object_release -ffffffff8197a6f0 T drm_gem_lru_remove -ffffffff8197a7d0 T drm_gem_object_free -ffffffff8197a820 T drm_gem_mmap_obj -ffffffff8197a920 T drm_gem_mmap -ffffffff8197ab90 T drm_gem_print_info -ffffffff8197acb0 T drm_gem_pin -ffffffff8197acf0 T drm_gem_unpin -ffffffff8197ad30 T drm_gem_vmap -ffffffff8197ad90 T drm_gem_vunmap -ffffffff8197ae00 T drm_gem_vmap_unlocked -ffffffff8197b000 T drm_gem_vunmap_unlocked -ffffffff8197b1d0 T drm_gem_lock_reservations -ffffffff8197b5c0 T drm_gem_unlock_reservations -ffffffff8197b6c0 T drm_gem_lru_init -ffffffff8197b700 T drm_gem_lru_move_tail_locked -ffffffff8197b800 T drm_gem_lru_move_tail -ffffffff8197b8f0 T drm_gem_lru_scan -ffffffff8197bce0 T drm_gem_evict +ffffffff8197a570 T drm_gem_release +ffffffff8197a5b0 T drm_gem_object_release +ffffffff8197a700 T drm_gem_lru_remove +ffffffff8197a7e0 T drm_gem_object_free +ffffffff8197a830 T drm_gem_mmap_obj +ffffffff8197a930 T drm_gem_mmap +ffffffff8197aba0 T drm_gem_print_info +ffffffff8197acc0 T drm_gem_pin +ffffffff8197ad00 T drm_gem_unpin +ffffffff8197ad40 T drm_gem_vmap +ffffffff8197ada0 T drm_gem_vunmap +ffffffff8197ae10 T drm_gem_vmap_unlocked +ffffffff8197b010 T drm_gem_vunmap_unlocked +ffffffff8197b1e0 T drm_gem_lock_reservations +ffffffff8197b5d0 T drm_gem_unlock_reservations +ffffffff8197b6d0 T drm_gem_lru_init +ffffffff8197b710 T drm_gem_lru_move_tail_locked +ffffffff8197b810 T drm_gem_lru_move_tail +ffffffff8197b900 T drm_gem_lru_scan +ffffffff8197bcf0 T drm_gem_evict ffffffff8197c000 T drm_gem_plane_helper_prepare_fb ffffffff8197d000 T drm_gem_dma_create ffffffff8197d220 T drm_gem_dma_free_object @@ -20040,11703 +20040,11715 @@ ffffffff819840c0 T xarray_tree_SPLAY ffffffff819841f0 T xarray_tree_SPLAY_REMOVE ffffffff81984270 T xarray_tree_SPLAY_MINMAX ffffffff81984360 T xa_init_flags -ffffffff819843e0 T xa_destroy -ffffffff81984520 T __xa_alloc -ffffffff819846a0 T __xa_alloc_cyclic -ffffffff81984700 T __xa_erase -ffffffff819847c0 T __xa_load -ffffffff81984830 T __xa_store -ffffffff819849b0 T xa_get_next -ffffffff81984ae0 T sg_alloc_table -ffffffff81984b60 T sg_free_table -ffffffff81984bc0 T sg_copy_from_buffer -ffffffff81984bf0 T i2c_master_xfer -ffffffff81984d20 T __i2c_transfer -ffffffff81984dd0 T i2c_transfer -ffffffff81984ea0 T i2c_bb_master_xfer -ffffffff81984f80 T i2c_bb_functionality -ffffffff81984fb0 T i2c_bit_add_bus -ffffffff81984ff0 T vga_disable_bridge -ffffffff819850a0 T vga_get_uninterruptible -ffffffff819850f0 T vga_put -ffffffff81985170 T acpi_get_table -ffffffff81985230 T acpi_put_table -ffffffff81985260 T acpi_get_handle -ffffffff819852b0 T acpi_get_name -ffffffff81985350 T acpi_evaluate_object -ffffffff819855b0 T drm_linux_acpi_notify -ffffffff81985630 T register_acpi_notifier -ffffffff81985670 T unregister_acpi_notifier -ffffffff81985700 T acpi_format_exception -ffffffff81985750 T backlight_do_update_status -ffffffff81985770 T backlight_device_register -ffffffff81985820 T backlight_device_unregister -ffffffff81985880 T backlight_schedule_update_status -ffffffff819858a0 T backlight_enable -ffffffff819858e0 T backlight_disable -ffffffff81985920 T backlight_device_get_by_name -ffffffff81985990 T dev_set_drvdata -ffffffff81985a30 T dev_get_drvdata -ffffffff81985a90 T drm_sysfs_hotplug_event -ffffffff81985ab0 T drm_sysfs_connector_hotplug_event -ffffffff81985ad0 T drm_sysfs_connector_status_event -ffffffff81985af0 T drm_sysfs_connector_property_event -ffffffff81985b10 T dma_fence_get -ffffffff81985b50 T dma_fence_get_rcu -ffffffff81985b90 T dma_fence_get_rcu_safe -ffffffff81985bd0 T dma_fence_release -ffffffff81985c00 T dma_fence_put -ffffffff81985c70 T dma_fence_signal_timestamp_locked -ffffffff81985d20 T dma_fence_signal -ffffffff81985e50 T dma_fence_signal_locked -ffffffff81985f60 T dma_fence_signal_timestamp -ffffffff81986040 T dma_fence_is_signaled -ffffffff819860b0 T dma_fence_is_signaled_locked -ffffffff819861f0 T dma_fence_timestamp -ffffffff81986290 T dma_fence_wait_timeout -ffffffff819862f0 T dma_fence_default_wait -ffffffff819864d0 T dma_fence_wait -ffffffff81986530 T dma_fence_enable_sw_signaling -ffffffff81986680 T dma_fence_init -ffffffff819866e0 T dma_fence_add_callback -ffffffff81986810 T dma_fence_remove_callback -ffffffff81986890 T dma_fence_context_alloc -ffffffff819868d0 t dma_fence_default_wait_cb -ffffffff81986920 T dma_fence_wait_any_timeout -ffffffff81986c40 T dma_fence_set_deadline -ffffffff81986ce0 T dma_fence_get_stub -ffffffff81986e70 T dma_fence_allocate_private_stub -ffffffff81986f90 T dma_fence_array_create -ffffffff819870a0 t irq_dma_fence_array_work -ffffffff81987130 T dma_fence_array_first -ffffffff81987180 T dma_fence_array_next -ffffffff819871d0 t dma_fence_array_get_driver_name -ffffffff81987200 t dma_fence_array_get_timeline_name -ffffffff81987230 t dma_fence_array_enable_signaling -ffffffff81987330 t dma_fence_array_signaled -ffffffff81987380 t dma_fence_array_release -ffffffff81987440 T dma_fence_chain_find_seqno -ffffffff81987560 T dma_fence_chain_walk -ffffffff81987790 T dma_fence_chain_init -ffffffff819878a0 t dma_fence_chain_get_driver_name -ffffffff819878d0 t dma_fence_chain_get_timeline_name -ffffffff81987900 t dma_fence_chain_enable_signaling -ffffffff81987ab0 t dma_fence_chain_signaled -ffffffff81987ba0 t dma_fence_chain_release -ffffffff81987ce0 T dma_fence_is_container -ffffffff81987d30 T dmabuf_read -ffffffff81987d60 T dmabuf_write -ffffffff81987d90 T dmabuf_ioctl -ffffffff81987dc0 T dmabuf_kqfilter -ffffffff81987df0 T dmabuf_stat -ffffffff81987eb0 T dmabuf_close -ffffffff81987f20 T dmabuf_seek -ffffffff81987fb0 T dma_buf_export -ffffffff81988060 T dma_buf_get -ffffffff819880f0 T dma_buf_put -ffffffff819881a0 T dma_buf_fd -ffffffff819882c0 T get_dma_buf -ffffffff81988300 T pcie_get_speed_cap -ffffffff819884b0 T printk -ffffffff81988550 T pcie_get_width_cap -ffffffff81988640 T pcie_aspm_enabled -ffffffff819886d0 T wait_on_bit -ffffffff819887a0 T wait_on_bit_timeout -ffffffff81988870 T wake_up_bit -ffffffff819888b0 T clear_and_wake_up_bit -ffffffff81988900 T bit_waitqueue -ffffffff81988930 T __var_waitqueue -ffffffff81988960 T drm_linux_init -ffffffff81988ad0 T drm_linux_exit -ffffffff81988b30 T pci_resize_resource -ffffffff81988c80 T register_shrinker -ffffffff81988cd0 T unregister_shrinker -ffffffff81988d30 T drmbackoff -ffffffff81988dc0 T bitmap_zalloc -ffffffff81988df0 T bitmap_free -ffffffff81988e10 T atomic_dec_and_mutex_lock -ffffffff81988e90 T interval_tree_iter_first -ffffffff81988f40 T interval_tree_remove -ffffffff81988f60 T interval_tree_insert -ffffffff81988fd0 T syncfile_read -ffffffff81989000 T syncfile_write -ffffffff81989030 T syncfile_ioctl -ffffffff81989060 T syncfile_kqfilter -ffffffff81989090 T syncfile_stat -ffffffff81989140 T syncfile_close -ffffffff819891e0 T syncfile_seek -ffffffff81989260 T fd_install -ffffffff81989330 T fput -ffffffff81989390 T get_unused_fd_flags -ffffffff819894a0 T put_unused_fd -ffffffff81989530 T sync_file_get_fence -ffffffff819895e0 T sync_file_create -ffffffff81989680 T drm_firmware_drivers_only -ffffffff819896b0 T memremap -ffffffff81989700 T memunmap -ffffffff81989720 T dma_tag_lookup -ffffffff81989790 T dma_alloc_coherent -ffffffff81989880 T dma_free_coherent -ffffffff819899b0 T dma_get_sgtable -ffffffff81989a80 T dma_map_resource -ffffffff81989ba0 T component_add -ffffffff81989c10 T component_add_typed -ffffffff81989c80 T component_bind_all -ffffffff81989d10 T component_master_add_with_match -ffffffff81989e00 t dma_fence_stub_get_name -ffffffff81989e30 t dma_fence_array_cb_func -ffffffff81989eb0 t dma_fence_chain_cb -ffffffff81989f70 t dma_fence_chain_timo -ffffffff8198b000 T drmm_kzalloc -ffffffff8198b100 T drmm_kcalloc -ffffffff8198b210 T drmm_kstrdup -ffffffff8198b340 T drmm_kfree -ffffffff8198b440 T drmm_add_action -ffffffff8198b500 T drmm_add_action_or_reset -ffffffff8198b5d0 T drm_managed_release -ffffffff8198b690 T drmm_add_final_kfree -ffffffff8198c000 T mipi_dsi_attach -ffffffff8198c060 T mipi_dsi_detach -ffffffff8198c0f0 T devm_mipi_dsi_attach -ffffffff8198c170 T mipi_dsi_packet_format_is_short -ffffffff8198c1b0 T mipi_dsi_packet_format_is_long -ffffffff8198c1f0 T mipi_dsi_create_packet -ffffffff8198c300 T mipi_dsi_shutdown_peripheral -ffffffff8198c3b0 T mipi_dsi_turn_on_peripheral -ffffffff8198c460 T mipi_dsi_set_maximum_return_packet_size -ffffffff8198c510 T mipi_dsi_compression_mode -ffffffff8198c5c0 T mipi_dsi_picture_parameter_set -ffffffff8198c670 T mipi_dsi_generic_write -ffffffff8198c730 T mipi_dsi_generic_read -ffffffff8198c7e0 T mipi_dsi_dcs_write_buffer -ffffffff8198c8a0 T mipi_dsi_dcs_write -ffffffff8198c9f0 T mipi_dsi_dcs_read -ffffffff8198ca90 T mipi_dsi_dcs_nop -ffffffff8198cb40 T mipi_dsi_dcs_soft_reset -ffffffff8198cbf0 T mipi_dsi_dcs_get_power_mode -ffffffff8198ccb0 T mipi_dsi_dcs_get_pixel_format -ffffffff8198cd70 T mipi_dsi_dcs_enter_sleep_mode -ffffffff8198ce20 T mipi_dsi_dcs_exit_sleep_mode -ffffffff8198ced0 T mipi_dsi_dcs_set_display_off -ffffffff8198cf80 T mipi_dsi_dcs_set_display_on -ffffffff8198d030 T mipi_dsi_dcs_set_column_address -ffffffff8198d0f0 T mipi_dsi_dcs_set_page_address -ffffffff8198d1b0 T mipi_dsi_dcs_set_tear_off -ffffffff8198d260 T mipi_dsi_dcs_set_tear_on -ffffffff8198d310 T mipi_dsi_dcs_set_pixel_format -ffffffff8198e000 T __drm_mm_interval_first -ffffffff8198e0c0 T drm_mm_reserve_node -ffffffff8198e340 t add_hole -ffffffff8198e4a0 T drm_mm_insert_node_in_range -ffffffff8198ea90 T drm_mm_remove_node -ffffffff8198ebc0 T drm_mm_replace_node -ffffffff8198eda0 T drm_mm_scan_init_with_range -ffffffff8198ee30 T drm_mm_scan_add_block -ffffffff8198efa0 T drm_mm_scan_remove_block -ffffffff8198f020 T drm_mm_scan_color_evict -ffffffff8198f100 T drm_mm_init -ffffffff8198f1b0 T drm_mm_takedown -ffffffff8198f1f0 T drm_mm_print -ffffffff81990000 T drm_modeset_register_all -ffffffff819900a0 T drm_modeset_unregister_all -ffffffff819900e0 T drm_mode_getresources -ffffffff81990390 T drm_mode_config_reset -ffffffff819904f0 T drmm_mode_config_init -ffffffff81990b70 T drm_mode_config_cleanup -ffffffff81990e90 t drm_mode_config_init_release -ffffffff81990ea0 T drm_mode_config_validate -ffffffff81992000 T __drm_mode_object_add -ffffffff81992100 T drm_mode_object_add -ffffffff819921e0 T drm_mode_object_register -ffffffff81992230 T drm_mode_object_unregister -ffffffff819922d0 T drm_mode_object_lease_required -ffffffff81992320 T __drm_mode_object_find -ffffffff819923d0 T drm_mode_object_find -ffffffff81992480 T drm_mode_object_put -ffffffff81992500 T drm_mode_object_get -ffffffff81992560 T drm_object_attach_property -ffffffff81992670 T drm_object_property_set_value -ffffffff81992750 T drm_object_property_get_value -ffffffff819927e0 t __drm_object_property_get_value -ffffffff819928c0 T drm_object_property_get_default_value -ffffffff81992990 T drm_mode_object_get_properties -ffffffff81992ad0 T drm_mode_obj_get_properties_ioctl -ffffffff81992d20 T drm_mode_obj_find_prop_id -ffffffff81992d80 T drm_mode_obj_set_property_ioctl -ffffffff81994000 T drm_mode_debug_printmodeline -ffffffff81994140 T drm_mode_vrefresh -ffffffff819941e0 T drm_mode_create -ffffffff81994200 T drm_mode_destroy -ffffffff81994240 T drm_mode_probed_add -ffffffff819942e0 T drm_analog_tv_mode -ffffffff81994b80 T drm_cvt_mode -ffffffff81995000 T drm_mode_set_name -ffffffff81995050 T drm_gtf_mode_complex -ffffffff81995350 T drm_gtf_mode -ffffffff819953a0 T drm_mode_get_hv_timing -ffffffff819953f0 T drm_mode_init -ffffffff819954c0 T drm_mode_set_crtcinfo -ffffffff81995680 T drm_mode_copy -ffffffff819956e0 T drm_mode_duplicate -ffffffff81995760 T drm_mode_match -ffffffff81995900 T drm_mode_equal -ffffffff81995920 T drm_mode_equal_no_clocks -ffffffff81995940 T drm_mode_equal_no_clocks_no_stereo -ffffffff81995a00 T drm_mode_validate_driver -ffffffff81995af0 T drm_mode_validate_size -ffffffff81995b40 T drm_mode_validate_ycbcr420 -ffffffff81995bb0 T drm_mode_is_420_only -ffffffff81995c00 T drm_get_mode_status_name -ffffffff81995c80 T drm_mode_prune_invalid -ffffffff81995f20 T drm_mode_sort -ffffffff81995f50 t drm_mode_compare -ffffffff819960f0 T drm_connector_list_update -ffffffff819962c0 T drm_mode_parse_command_line_for_connector -ffffffff819962f0 T drm_mode_create_from_cmdline_mode -ffffffff819964b0 T drm_mode_convert_to_umode -ffffffff81996650 T drm_mode_convert_umode -ffffffff81996870 T drm_mode_is_420_also -ffffffff819968c0 T drm_mode_is_420 -ffffffff81997000 T drm_helper_move_panel_connectors_to_head -ffffffff819970f0 T drm_helper_mode_fill_fb_struct -ffffffff819971b0 T drm_crtc_init -ffffffff81997280 T drm_mode_config_helper_suspend -ffffffff81997330 T drm_mode_config_helper_resume -ffffffff81998000 T drm_modeset_lock_all -ffffffff81998290 T drm_modeset_acquire_init -ffffffff81998320 T drm_modeset_lock_all_ctx -ffffffff81998410 T drm_modeset_backoff -ffffffff819984e0 T drm_modeset_acquire_fini -ffffffff81998510 T drm_warn_on_modeset_not_all_locked -ffffffff81998660 T drm_modeset_unlock_all -ffffffff81998750 T drm_modeset_drop_locks -ffffffff819987e0 T drm_modeset_unlock -ffffffff819988b0 t modeset_lock -ffffffff81998c10 T drm_modeset_lock_init -ffffffff81998c70 T drm_modeset_lock -ffffffff81998d90 T drm_modeset_lock_single_interruptible -ffffffff81998eb0 t __ww_mutex_lock -ffffffff8199a000 T drm_mtrr_add -ffffffff8199a070 T drm_mtrr_del -ffffffff8199b000 T drm_panel_init -ffffffff8199b090 T drm_panel_add -ffffffff8199b0e0 T drm_panel_remove -ffffffff8199b140 T drm_panel_prepare -ffffffff8199b250 T drm_panel_unprepare -ffffffff8199b360 T drm_panel_enable -ffffffff8199b450 T drm_panel_disable -ffffffff8199b540 T drm_panel_get_modes -ffffffff8199b5a0 T drm_is_panel_follower -ffffffff8199b5f0 T drm_panel_add_follower -ffffffff8199b640 T drm_panel_remove_follower -ffffffff8199b660 T devm_drm_panel_add_follower -ffffffff8199b6b0 T drm_panel_of_backlight -ffffffff8199c000 T drm_get_panel_orientation_quirk -ffffffff8199d000 T drm_pci_set_busid -ffffffff8199d090 t kasprintf -ffffffff8199e000 T drm_universal_plane_init -ffffffff8199e0e0 t __drm_universal_plane_init -ffffffff8199e5c0 T __drmm_universal_plane_alloc -ffffffff8199e700 t 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drm_mode_obj_find_prop_id +ffffffff81991d80 T drm_mode_obj_set_property_ioctl +ffffffff81993000 T drm_mode_debug_printmodeline +ffffffff81993140 T drm_mode_vrefresh +ffffffff819931e0 T drm_mode_create +ffffffff81993200 T drm_mode_destroy +ffffffff81993240 T drm_mode_probed_add +ffffffff819932e0 T drm_analog_tv_mode +ffffffff81993b80 T drm_cvt_mode +ffffffff81994000 T drm_mode_set_name +ffffffff81994050 T drm_gtf_mode_complex +ffffffff81994350 T drm_gtf_mode +ffffffff819943a0 T drm_mode_get_hv_timing +ffffffff819943f0 T drm_mode_init +ffffffff819944c0 T drm_mode_set_crtcinfo +ffffffff81994680 T drm_mode_copy +ffffffff819946e0 T drm_mode_duplicate +ffffffff81994760 T drm_mode_match +ffffffff81994900 T drm_mode_equal +ffffffff81994920 T drm_mode_equal_no_clocks +ffffffff81994940 T drm_mode_equal_no_clocks_no_stereo +ffffffff81994a00 T drm_mode_validate_driver +ffffffff81994af0 T drm_mode_validate_size +ffffffff81994b40 T drm_mode_validate_ycbcr420 +ffffffff81994bb0 T drm_mode_is_420_only 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drm_warn_on_modeset_not_all_locked +ffffffff81997660 T drm_modeset_unlock_all +ffffffff81997750 T drm_modeset_drop_locks +ffffffff819977e0 T drm_modeset_unlock +ffffffff819978b0 t modeset_lock +ffffffff81997c10 T drm_modeset_lock_init +ffffffff81997c70 T drm_modeset_lock +ffffffff81997d90 T drm_modeset_lock_single_interruptible +ffffffff81997eb0 t __ww_mutex_lock +ffffffff81999000 T drm_mtrr_add +ffffffff81999070 T drm_mtrr_del +ffffffff8199a000 T drm_panel_init +ffffffff8199a090 T drm_panel_add +ffffffff8199a0e0 T drm_panel_remove +ffffffff8199a140 T drm_panel_prepare +ffffffff8199a250 T drm_panel_unprepare +ffffffff8199a360 T drm_panel_enable +ffffffff8199a450 T drm_panel_disable +ffffffff8199a540 T drm_panel_get_modes +ffffffff8199a5a0 T drm_is_panel_follower +ffffffff8199a5f0 T drm_panel_add_follower +ffffffff8199a640 T drm_panel_remove_follower +ffffffff8199a660 T devm_drm_panel_add_follower +ffffffff8199a6b0 T drm_panel_of_backlight +ffffffff8199b000 T drm_get_panel_orientation_quirk +ffffffff8199c000 T drm_pci_set_busid +ffffffff8199c090 t kasprintf +ffffffff8199d000 T drm_universal_plane_init +ffffffff8199d0e0 t __drm_universal_plane_init +ffffffff8199d5c0 T __drmm_universal_plane_alloc +ffffffff8199d700 t drmm_universal_plane_alloc_release +ffffffff8199d750 T __drm_universal_plane_alloc +ffffffff8199d890 T drm_plane_register_all +ffffffff8199d980 T drm_plane_unregister_all +ffffffff8199d9f0 T drm_plane_cleanup +ffffffff8199db40 T drm_plane_from_index +ffffffff8199dba0 T drm_plane_force_disable +ffffffff8199dcb0 T drm_mode_plane_set_obj_prop +ffffffff8199dd30 T drm_mode_getplane_res +ffffffff8199de60 T drm_mode_getplane +ffffffff8199dfb0 T drm_plane_check_pixel_format +ffffffff8199e070 T drm_any_plane_has_format +ffffffff8199e1a0 T drm_mode_setplane +ffffffff8199e490 T drm_mode_cursor_ioctl +ffffffff8199e500 t drm_mode_cursor_common +ffffffff8199ea40 T drm_mode_cursor2_ioctl +ffffffff8199ea60 T drm_mode_page_flip_ioctl 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drm_gem_dmabuf_release +ffffffff819a1200 T drm_gem_prime_fd_to_handle +ffffffff819a1420 T drm_gem_prime_import +ffffffff819a1480 t drm_prime_add_buf_handle +ffffffff819a15c0 T drm_prime_fd_to_handle_ioctl +ffffffff819a15f0 T drm_gem_prime_handle_to_fd +ffffffff819a1820 T drm_prime_handle_to_fd_ioctl +ffffffff819a1890 T drm_gem_map_attach +ffffffff819a18e0 T drm_gem_map_detach +ffffffff819a1900 T drm_gem_dmabuf_vmap +ffffffff819a1920 T drm_gem_dmabuf_vunmap +ffffffff819a1940 T drm_gem_prime_mmap +ffffffff819a1990 T drm_prime_pages_to_sg +ffffffff819a19e0 T drm_prime_get_contiguous_size +ffffffff819a1a30 T drm_gem_prime_export +ffffffff819a1ac0 T drm_gem_prime_import_dev +ffffffff819a1b20 T drm_prime_sg_to_page_array +ffffffff819a1b70 T drm_prime_sg_to_dma_addr_array +ffffffff819a1bc0 T drm_prime_gem_destroy +ffffffff819a2000 T __drm_puts_coredump +ffffffff819a20e0 T __drm_printfn_coredump +ffffffff819a22b0 T __drm_puts_seq_file +ffffffff819a22e0 T __drm_printfn_seq_file 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drm_kms_helper_poll_init +ffffffff819a4100 t output_poll_execute +ffffffff819a4350 T drm_kms_helper_poll_fini +ffffffff819a43a0 T drm_connector_helper_hpd_irq_event +ffffffff819a4460 t check_connector_changed +ffffffff819a4630 T drm_helper_hpd_irq_event +ffffffff819a4780 T drm_crtc_helper_mode_valid_fixed +ffffffff819a47d0 T drm_connector_helper_get_modes_from_ddc +ffffffff819a4860 T drm_connector_helper_get_modes_fixed +ffffffff819a49d0 T drm_connector_helper_get_modes +ffffffff819a4a40 T drm_connector_helper_tv_get_modes +ffffffff819a4c80 t __delayed_work_tick +ffffffff819a5000 T drm_property_create +ffffffff819a51f0 T drm_property_create_enum +ffffffff819a52a0 T drm_property_add_enum +ffffffff819a54a0 T drm_property_destroy +ffffffff819a5550 T drm_property_create_bitmask +ffffffff819a5680 T drm_property_create_range +ffffffff819a56f0 T drm_property_create_signed_range +ffffffff819a5760 T drm_property_create_object +ffffffff819a5800 T drm_property_create_bool +ffffffff819a5860 T drm_mode_getproperty_ioctl +ffffffff819a5ab0 T drm_property_create_blob +ffffffff819a5bf0 t drm_property_free_blob +ffffffff819a5c70 T drm_property_blob_put +ffffffff819a5cb0 T drm_property_destroy_user_blobs +ffffffff819a5d30 T drm_property_blob_get +ffffffff819a5d70 T drm_property_lookup_blob +ffffffff819a5d90 T drm_property_replace_global_blob +ffffffff819a5ee0 T drm_property_replace_blob +ffffffff819a5f50 T drm_mode_getblob_ioctl +ffffffff819a6010 T drm_mode_createblob_ioctl +ffffffff819a6110 T drm_mode_destroyblob_ioctl +ffffffff819a6210 T drm_property_change_valid_get +ffffffff819a6470 T drm_property_change_valid_put +ffffffff819a7000 T drm_rect_intersect +ffffffff819a7080 T drm_rect_clip_scaled +ffffffff819a72f0 T drm_rect_calc_hscale +ffffffff819a73c0 T drm_rect_calc_vscale +ffffffff819a7490 T drm_rect_debug_print +ffffffff819a75b0 T drm_rect_rotate +ffffffff819a7670 T drm_rect_rotate_inv +ffffffff819a8000 T drm_self_refresh_helper_update_avg_times +ffffffff819a8150 T drm_self_refresh_helper_alter_state +ffffffff819a82e0 T drm_self_refresh_helper_init +ffffffff819a8470 t drm_self_refresh_helper_entry_work +ffffffff819a85d0 T drm_self_refresh_helper_cleanup +ffffffff819a8650 t __delayed_work_tick +ffffffff819a9000 T drm_suballoc_manager_init +ffffffff819a9180 T drm_suballoc_manager_fini +ffffffff819a9290 t drm_suballoc_try_free +ffffffff819a9380 T drm_suballoc_new +ffffffff819a9db0 t drm_suballoc_event +ffffffff819a9ef0 T drm_suballoc_free +ffffffff819ab000 T drm_syncobj_find +ffffffff819ab080 T drm_syncobj_add_point +ffffffff819ab190 t syncobj_wait_syncobj_func +ffffffff819ab240 t syncobj_eventfd_entry_func +ffffffff819ab330 T drm_syncobj_replace_fence +ffffffff819ab3e0 T drm_syncobj_find_fence +ffffffff819ab730 t drm_syncobj_fence_add_wait +ffffffff819ab800 T drm_syncobj_free +ffffffff819ab880 T drm_syncobj_create +ffffffff819aba50 T drm_syncobj_get_handle +ffffffff819abb70 T drm_syncobj_get_fd +ffffffff819abbc0 T drm_syncobj_open +ffffffff819abc00 T drm_syncobj_release +ffffffff819abc40 t drm_syncobj_release_handle +ffffffff819abd00 T drm_syncobj_create_ioctl +ffffffff819abe30 T drm_syncobj_destroy_ioctl +ffffffff819abf70 T drm_syncobj_handle_to_fd_ioctl +ffffffff819ac160 T drm_syncobj_fd_to_handle_ioctl +ffffffff819ac310 T drm_syncobj_transfer_ioctl +ffffffff819ac6f0 T drm_timeout_abs_to_jiffies +ffffffff819ac7c0 T drm_syncobj_wait_ioctl +ffffffff819ac940 t drm_syncobj_array_find +ffffffff819acb60 t drm_syncobj_array_free +ffffffff819acc50 T drm_syncobj_timeline_wait_ioctl +ffffffff819acdd0 T drm_syncobj_eventfd_ioctl +ffffffff819ace00 T drm_syncobj_reset_ioctl +ffffffff819acee0 T drm_syncobj_signal_ioctl +ffffffff819ad040 T drm_syncobj_timeline_signal_ioctl +ffffffff819ad280 T drm_syncobj_query_ioctl +ffffffff819ad490 t drm_syncobj_array_wait_timeout +ffffffff819ad900 t syncobj_wait_fence_func +ffffffff819ad920 t syncobj_eventfd_entry_fence_func +ffffffff819ae000 T drm_vblank_count +ffffffff819ae090 T drm_crtc_accurate_vblank_count +ffffffff819ae1a0 t drm_update_vblank_count +ffffffff819ae5e0 T drm_vblank_disable_and_save +ffffffff819ae730 T drm_vblank_init +ffffffff819ae8b0 t vblank_disable_fn +ffffffff819ae930 t drm_vblank_init_release +ffffffff819ae9c0 T drm_dev_has_vblank +ffffffff819ae9f0 T drm_crtc_vblank_waitqueue +ffffffff819aea40 T drm_calc_timestamping_constants +ffffffff819aec60 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff819af1b0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff819af1d0 T drm_crtc_vblank_count +ffffffff819af260 T drm_crtc_vblank_count_and_time +ffffffff819af320 t drm_vblank_count_and_time +ffffffff819af3d0 T drm_crtc_next_vblank_start +ffffffff819af520 T drm_crtc_arm_vblank_event +ffffffff819af600 T drm_crtc_send_vblank_event +ffffffff819af7b0 t send_vblank_event +ffffffff819af860 T drm_vblank_get +ffffffff819af960 t drm_vblank_enable +ffffffff819afb60 T drm_crtc_vblank_get +ffffffff819afc60 T drm_vblank_put +ffffffff819afd90 T drm_crtc_vblank_put +ffffffff819afdb0 T drm_wait_one_vblank +ffffffff819b02b0 T drm_crtc_wait_one_vblank +ffffffff819b02d0 T drm_crtc_vblank_off +ffffffff819b06c0 T drm_crtc_vblank_reset +ffffffff819b07f0 T drm_crtc_set_max_vblank_count +ffffffff819b08d0 T drm_crtc_vblank_on +ffffffff819b0a20 t drm_reset_vblank_timestamp +ffffffff819b0c00 T drm_crtc_vblank_restore +ffffffff819b0fe0 T drm_legacy_modeset_ctl_ioctl +ffffffff819b1200 T drm_wait_vblank_ioctl +ffffffff819b1750 t drm_wait_vblank_reply +ffffffff819b1860 t drm_queue_vblank_event +ffffffff819b1ba0 T drm_handle_vblank +ffffffff819b1e90 t drm_handle_vblank_events +ffffffff819b2120 T drm_crtc_handle_vblank +ffffffff819b2140 T drm_crtc_get_sequence_ioctl +ffffffff819b2310 T drm_crtc_queue_sequence_ioctl +ffffffff819b25d0 t __get_vblank_counter +ffffffff819b3000 T drm_handle_vblank_works +ffffffff819b31a0 T drm_vblank_cancel_pending_works +ffffffff819b32e0 T drm_vblank_work_schedule +ffffffff819b3550 T drm_vblank_work_cancel_sync +ffffffff819b36a0 T drm_vblank_work_flush +ffffffff819b37d0 T drm_vblank_work_init +ffffffff819b3840 T drm_vblank_worker_init +ffffffff819b4000 T drm_vma_offset_manager_init +ffffffff819b4050 T drm_vma_offset_manager_destroy +ffffffff819b4070 T drm_vma_offset_lookup_locked +ffffffff819b4100 T drm_vma_offset_add +ffffffff819b4190 T drm_vma_offset_remove +ffffffff819b41e0 T drm_vma_node_allow +ffffffff819b4200 t vma_node_allow +ffffffff819b4320 T drm_vma_node_allow_once +ffffffff819b4340 T drm_vma_node_revoke +ffffffff819b43c0 T drm_vma_node_is_allowed +ffffffff819b5000 T hdmi_avi_infoframe_init +ffffffff819b5070 T hdmi_avi_infoframe_check +ffffffff819b50c0 T hdmi_avi_infoframe_pack_only +ffffffff819b52c0 T hdmi_avi_infoframe_pack +ffffffff819b5320 T hdmi_spd_infoframe_init +ffffffff819b53e0 T hdmi_spd_infoframe_check +ffffffff819b5430 T hdmi_spd_infoframe_pack_only +ffffffff819b5570 T hdmi_spd_infoframe_pack +ffffffff819b56d0 T hdmi_audio_infoframe_init +ffffffff819b5720 T hdmi_audio_infoframe_check +ffffffff819b5770 T hdmi_audio_infoframe_pack_only +ffffffff819b58d0 T hdmi_audio_infoframe_pack +ffffffff819b5920 T hdmi_audio_infoframe_pack_for_dp +ffffffff819b5a10 T hdmi_vendor_infoframe_init +ffffffff819b5a70 T hdmi_vendor_infoframe_check +ffffffff819b5b10 T hdmi_vendor_infoframe_pack_only +ffffffff819b5cd0 T hdmi_vendor_infoframe_pack +ffffffff819b5d70 T hdmi_drm_infoframe_init +ffffffff819b5dd0 T hdmi_drm_infoframe_check +ffffffff819b5e20 T hdmi_drm_infoframe_pack_only +ffffffff819b6010 T hdmi_drm_infoframe_pack +ffffffff819b6060 T hdmi_infoframe_check +ffffffff819b61b0 T hdmi_infoframe_pack_only +ffffffff819b63d0 T hdmi_infoframe_pack +ffffffff819b6540 T hdmi_infoframe_log +ffffffff819b74c0 T hdmi_drm_infoframe_unpack_only +ffffffff819b75a0 T hdmi_infoframe_unpack +ffffffff819b8000 T list_sort +ffffffff819b9000 T radix_tree_lookup +ffffffff819b90b0 T radix_tree_iter_find +ffffffff819b9180 T radix_tree_delete +ffffffff819b9310 T radix_tree_iter_delete +ffffffff819b9330 T radix_tree_insert +ffffffff819ba000 T sort +ffffffff819ba040 t qsort +ffffffff819bc000 T drm_dp_dual_mode_read +ffffffff819bc110 T drm_dp_dual_mode_write +ffffffff819bc1f0 T drm_dp_dual_mode_detect +ffffffff819bc490 T drm_dp_dual_mode_max_tmds_clock +ffffffff819bc5b0 T drm_dp_dual_mode_get_tmds_output +ffffffff819bc6d0 T drm_dp_dual_mode_set_tmds_output +ffffffff819bc950 T drm_dp_get_dual_mode_type_name +ffffffff819bc9c0 T drm_lspcon_get_mode +ffffffff819bcbe0 T drm_lspcon_set_mode +ffffffff819bd000 T drm_dp_channel_eq_ok +ffffffff819bd080 T drm_dp_clock_recovery_ok +ffffffff819bd0f0 T drm_dp_get_adjust_request_voltage +ffffffff819bd130 T drm_dp_get_adjust_request_pre_emphasis +ffffffff819bd180 T drm_dp_get_adjust_tx_ffe_preset +ffffffff819bd1c0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff819bd240 T drm_dp_128b132b_lane_symbol_locked +ffffffff819bd2b0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff819bd2e0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff819bd310 T drm_dp_128b132b_link_training_failed +ffffffff819bd340 T drm_dp_read_clock_recovery_delay +ffffffff819bd450 T drm_dp_read_channel_eq_delay +ffffffff819bd550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff819bd600 T drm_dp_link_train_clock_recovery_delay +ffffffff819bd690 t __8b10b_clock_recovery_delay_us +ffffffff819bd710 T drm_dp_link_train_channel_eq_delay +ffffffff819bd780 T drm_dp_phy_name +ffffffff819bd7c0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff819bd7e0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff819bd850 T drm_dp_link_rate_to_bw_code +ffffffff819bd8c0 T drm_dp_bw_code_to_link_rate +ffffffff819bd920 T drm_dp_dpcd_probe +ffffffff819bda60 t drm_dp_dpcd_access +ffffffff819bdb90 T drm_dp_dpcd_read +ffffffff819bdcc0 T drm_dp_dpcd_write +ffffffff819bddd0 T drm_dp_dpcd_read_link_status +ffffffff819bddf0 T drm_dp_dpcd_read_phy_link_status +ffffffff819bdef0 T drm_dp_downstream_is_type +ffffffff819bdf40 T drm_dp_downstream_is_tmds +ffffffff819bdfb0 T drm_dp_send_real_edid_checksum +ffffffff819be210 T drm_dp_read_dpcd_caps +ffffffff819be3a0 T drm_dp_read_downstream_info +ffffffff819be4a0 T drm_dp_downstream_max_dotclock +ffffffff819be4f0 T drm_dp_downstream_max_tmds_clock +ffffffff819be590 T drm_dp_downstream_min_tmds_clock +ffffffff819be610 T drm_dp_downstream_max_bpc +ffffffff819be6b0 T drm_dp_downstream_420_passthrough +ffffffff819be710 T drm_dp_downstream_444_to_420_conversion +ffffffff819be770 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff819be7d0 T drm_dp_downstream_mode +ffffffff819be860 T drm_dp_downstream_id +ffffffff819be880 T drm_dp_downstream_debug +ffffffff819be920 T drm_dp_subconnector_type +ffffffff819be990 T drm_dp_set_subconnector_property +ffffffff819bea00 T drm_dp_read_sink_count_cap +ffffffff819bea50 T drm_dp_read_sink_count +ffffffff819beab0 T drm_dp_remote_aux_init +ffffffff819beae0 t drm_dp_aux_crc_work +ffffffff819bec50 T drm_dp_aux_init +ffffffff819bed00 T drm_dp_aux_register +ffffffff819bee20 T drm_dp_aux_unregister +ffffffff819bee50 T drm_dp_psr_setup_time +ffffffff819beea0 T drm_dp_start_crc +ffffffff819bef50 T drm_dp_stop_crc +ffffffff819befe0 T drm_dp_read_desc +ffffffff819bf1a0 T drm_dp_dsc_sink_max_slice_count +ffffffff819bf230 T drm_dp_dsc_sink_line_buf_depth +ffffffff819bf270 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff819bf2e0 T drm_dp_read_lttpr_common_caps +ffffffff819bf3a0 T drm_dp_read_lttpr_phy_caps +ffffffff819bf460 T drm_dp_lttpr_count +ffffffff819bf4f0 T drm_dp_lttpr_max_link_rate +ffffffff819bf550 T drm_dp_lttpr_max_lane_count +ffffffff819bf580 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff819bf5b0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff819bf5e0 T drm_dp_get_phy_test_pattern +ffffffff819bf700 T drm_dp_set_phy_test_pattern +ffffffff819bf7c0 T drm_dp_vsc_sdp_log +ffffffff819bfaf0 T drm_dp_get_pcon_max_frl_bw +ffffffff819bfb40 T drm_dp_pcon_frl_prepare +ffffffff819bfb90 T drm_dp_pcon_is_frl_ready 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drm_panel_dp_aux_backlight +ffffffff819c0f30 t __128b132b_channel_eq_delay_us +ffffffff819c0fb0 t __8b10b_channel_eq_delay_us +ffffffff819c1030 t drm_dp_aux_get_crc +ffffffff819c1110 t drm_dp_i2c_xfer +ffffffff819c1380 t drm_dp_i2c_functionality +ffffffff819c13b0 t drm_dp_i2c_do_msg +ffffffff819c1790 t lock_bus +ffffffff819c17b0 t trylock_bus +ffffffff819c1800 t unlock_bus +ffffffff819c1820 t dp_aux_backlight_update_status +ffffffff819c2000 T drm_dp_encode_sideband_req +ffffffff819c2440 T drm_dp_decode_sideband_req +ffffffff819c2970 T drm_dp_dump_sideband_msg_req_body +ffffffff819c2d40 T drm_dp_mst_get_port_malloc +ffffffff819c2d90 T drm_dp_mst_put_port_malloc +ffffffff819c2e80 t kref_put +ffffffff819c2ec0 T drm_atomic_get_mst_payload_state +ffffffff819c2f10 T drm_dp_mst_dpcd_read +ffffffff819c31d0 T drm_dp_mst_dpcd_write +ffffffff819c3220 t drm_dp_send_dpcd_write +ffffffff819c3460 T drm_dp_mst_connector_late_register +ffffffff819c34e0 T drm_dp_mst_connector_early_unregister +ffffffff819c3520 T drm_dp_send_power_updown_phy +ffffffff819c3760 t drm_dp_mst_topology_put_port +ffffffff819c3880 t drm_dp_mst_wait_tx_reply +ffffffff819c3c20 T drm_dp_send_query_stream_enc_status +ffffffff819c3ee0 T drm_dp_add_payload_part1 +ffffffff819c4090 T drm_dp_remove_payload +ffffffff819c4230 T drm_dp_add_payload_part2 +ffffffff819c43f0 T drm_dp_get_vc_payload_bw +ffffffff819c4490 T drm_dp_read_mst_cap +ffffffff819c44f0 T drm_dp_mst_topology_mgr_set_mst +ffffffff819c47a0 t drm_dp_dpcd_write_payload +ffffffff819c4940 t drm_dp_mst_topology_put_mstb +ffffffff819c4a40 T drm_dp_mst_topology_mgr_suspend +ffffffff819c4b00 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff819c4b70 T drm_dp_mst_topology_mgr_resume +ffffffff819c4db0 T drm_dp_mst_hpd_irq_handle_event +ffffffff819c5d20 T drm_dp_mst_hpd_irq_send_new_request +ffffffff819c5da0 T drm_dp_mst_detect_port +ffffffff819c5f00 T drm_dp_mst_edid_read +ffffffff819c6000 T drm_dp_mst_get_edid +ffffffff819c6060 T drm_dp_atomic_find_time_slots +ffffffff819c6310 T drm_atomic_get_mst_topology_state +ffffffff819c6320 T drm_dp_atomic_release_time_slots +ffffffff819c6540 T drm_dp_mst_atomic_setup_commit +ffffffff819c66d0 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff819c6840 T drm_dp_mst_root_conn_atomic_check +ffffffff819c6960 T drm_dp_mst_update_slots +ffffffff819c69c0 T drm_dp_check_act_status +ffffffff819c6b50 T drm_dp_calc_pbn_mode +ffffffff819c6bb0 T drm_dp_mst_dump_topology +ffffffff819c6e30 t drm_dp_mst_dump_mstb +ffffffff819c6ea0 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff819c6fd0 T drm_dp_mst_dsc_aux_for_port +ffffffff819c7200 T drm_dp_mst_atomic_enable_dsc +ffffffff819c7380 T drm_dp_mst_atomic_check +ffffffff819c7670 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff819c78f0 t drm_dp_mst_duplicate_state +ffffffff819c7ac0 t drm_dp_mst_destroy_state +ffffffff819c7b80 T drm_atomic_get_old_mst_topology_state +ffffffff819c7b90 T drm_atomic_get_new_mst_topology_state +ffffffff819c7ba0 T drm_dp_mst_topology_mgr_init +ffffffff819c7e10 t drm_dp_mst_link_probe_work +ffffffff819c80a0 t drm_dp_tx_work +ffffffff819c80f0 t drm_dp_delayed_destroy_work +ffffffff819c85a0 t drm_dp_mst_up_req_work +ffffffff819c8ad0 T drm_dp_mst_topology_mgr_destroy +ffffffff819c8b60 t drm_dp_mst_is_virtual_dpcd +ffffffff819c8c40 t drm_dp_free_mst_branch_device +ffffffff819c8c80 t drm_dp_mst_topology_get_port_validated_locked +ffffffff819c8d00 t drm_dp_mst_dump_sideband_msg_tx +ffffffff819c8f10 t process_single_down_tx_qlock +ffffffff819c9080 t process_single_tx_qlock +ffffffff819c9550 t drm_dp_msg_data_crc4 +ffffffff819c9680 t drm_dp_payload_send_msg +ffffffff819c9ae0 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff819c9b60 t drm_dp_get_one_sb_msg +ffffffff819ca2a0 t drm_dp_get_mst_branch_device +ffffffff819ca400 t drm_dp_check_and_send_link_address +ffffffff819ca4d0 t drm_dp_send_link_address +ffffffff819cb1a0 t drm_dp_send_enum_path_resources +ffffffff819cb400 t drm_dp_port_set_pdt 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ttm_bo_vm_reserve +ffffffff819d8180 t dma_resv_lock_interruptible +ffffffff819d82a0 T ttm_bo_vm_fault_reserved +ffffffff819d85e0 T ttm_bo_vm_fault +ffffffff819d8740 T ttm_bo_vm_reference +ffffffff819d8770 T ttm_bo_vm_detach +ffffffff819d8780 T ttm_bo_mmap_obj +ffffffff819d9000 T ttm_global_swapout +ffffffff819d90e0 T ttm_device_swapout +ffffffff819d9200 T ttm_device_init +ffffffff819d9490 T ttm_device_fini +ffffffff819d9650 T ttm_device_clear_dma_mappings +ffffffff819d9700 t ttm_device_clear_lru_dma_mappings +ffffffff819da000 T ttm_eu_backoff_reservation +ffffffff819da130 T ttm_eu_reserve_buffers +ffffffff819da5c0 T ttm_eu_fence_buffer_objects +ffffffff819da710 t __ww_mutex_lock +ffffffff819db000 T ttm_prot_from_caching +ffffffff819dc000 T ttm_pool_alloc +ffffffff819dca90 t ttm_pool_free_range +ffffffff819dcdc0 T ttm_pool_free +ffffffff819dce20 t ttm_pool_shrink +ffffffff819dd000 T ttm_pool_init +ffffffff819dd2b0 T ttm_pool_fini +ffffffff819dd4f0 t ttm_pool_type_fini +ffffffff819dd730 T ttm_pool_mgr_init +ffffffff819dda10 t ttm_pool_shrinker_count +ffffffff819dda60 t ttm_pool_shrinker_scan +ffffffff819ddab0 T ttm_pool_mgr_fini +ffffffff819de000 T ttm_range_man_init_nocheck +ffffffff819de190 T ttm_range_man_fini_nocheck +ffffffff819de320 t ttm_range_man_alloc +ffffffff819de470 t ttm_range_man_free +ffffffff819de4d0 t ttm_range_man_intersects +ffffffff819de530 t ttm_range_man_compatible +ffffffff819de590 t ttm_range_man_debug +ffffffff819df000 T ttm_lru_bulk_move_init +ffffffff819df020 T ttm_lru_bulk_move_tail +ffffffff819df1e0 T ttm_resource_add_bulk_move +ffffffff819df2b0 T ttm_resource_del_bulk_move +ffffffff819df3f0 T ttm_resource_move_to_lru_tail +ffffffff819df560 T ttm_resource_init +ffffffff819df650 T ttm_resource_fini +ffffffff819df6c0 T ttm_resource_alloc +ffffffff819df810 T ttm_resource_free +ffffffff819df9d0 T ttm_resource_intersects +ffffffff819dfa30 T ttm_resource_compatible +ffffffff819dfa90 T ttm_resource_compat +ffffffff819dfc20 T ttm_resource_set_bo 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drm_sched_entity_wakeup +ffffffff819e4000 T drm_sched_fence_slab_init +ffffffff819e4060 T drm_sched_fence_slab_fini +ffffffff819e4080 T drm_sched_fence_scheduled +ffffffff819e40e0 T drm_sched_fence_finished +ffffffff819e4100 T drm_sched_fence_free +ffffffff819e41a0 T to_drm_sched_fence +ffffffff819e4200 T drm_sched_fence_alloc +ffffffff819e4280 T drm_sched_fence_init +ffffffff819e4300 t drm_sched_fence_get_driver_name +ffffffff819e4330 t drm_sched_fence_get_timeline_name +ffffffff819e4390 t drm_sched_fence_release_scheduled +ffffffff819e4480 t drm_sched_fence_release_finished +ffffffff819e44c0 t drm_sched_fence_set_deadline_finished +ffffffff819e5000 T drm_sched_rq_update_fifo +ffffffff819e50e0 T drm_sched_rq_add_entity +ffffffff819e5170 T drm_sched_rq_remove_entity +ffffffff819e5250 T drm_sched_fault +ffffffff819e52a0 T drm_sched_suspend_timeout +ffffffff819e5320 T drm_sched_resume_timeout +ffffffff819e53c0 T drm_sched_stop +ffffffff819e5590 T drm_sched_start +ffffffff819e56c0 t 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ibx_digital_port_connected +ffffffff819f1cc0 t intel_dp_encoder_reset +ffffffff819f1dc0 t intel_dp_encoder_destroy +ffffffff819f1e20 t intel_dp_prepare +ffffffff819f20b0 t intel_enable_dp +ffffffff819f22f0 t intel_dp_link_down +ffffffff819f2630 t assert_dp_port +ffffffff819f3000 T g4x_hdmi_connector_atomic_check +ffffffff819f3150 T g4x_hdmi_init +ffffffff819f34e0 t intel_hdmi_hotplug +ffffffff819f3530 t g4x_hdmi_compute_config +ffffffff819f3660 t pch_disable_hdmi +ffffffff819f3680 t pch_post_disable_hdmi +ffffffff819f36a0 t g4x_disable_hdmi +ffffffff819f36f0 t intel_hdmi_get_hw_state +ffffffff819f37a0 t intel_hdmi_get_config +ffffffff819f3940 t chv_hdmi_pre_pll_enable +ffffffff819f3980 t chv_hdmi_pre_enable +ffffffff819f3ad0 t vlv_enable_hdmi +ffffffff819f3b50 t chv_hdmi_post_disable +ffffffff819f3bb0 t chv_hdmi_post_pll_disable +ffffffff819f3bd0 t vlv_hdmi_pre_pll_enable +ffffffff819f3c10 t vlv_hdmi_pre_enable +ffffffff819f3d50 t vlv_hdmi_post_disable +ffffffff819f3d70 t intel_hdmi_pre_enable +ffffffff819f3df0 t cpt_enable_hdmi +ffffffff819f4010 t ibx_enable_hdmi +ffffffff819f4220 t g4x_enable_hdmi +ffffffff819f4330 t intel_disable_hdmi +ffffffff819f4530 t intel_hdmi_prepare +ffffffff819f5000 T hsw_ips_disable +ffffffff819f5150 T hsw_ips_pre_update +ffffffff819f51f0 T hsw_ips_post_update +ffffffff819f5410 T hsw_crtc_supports_ips +ffffffff819f5470 T hsw_crtc_state_ips_capable +ffffffff819f5510 T hsw_ips_compute_config +ffffffff819f5650 T hsw_ips_get_config +ffffffff819f56f0 T hsw_ips_crtc_debugfs_add +ffffffff819f6000 T i9xx_check_plane_surface +ffffffff819f62d0 T i965_plane_max_stride +ffffffff819f6340 T intel_primary_plane_create +ffffffff819f67d0 t i9xx_plane_min_cdclk +ffffffff819f6840 t i9xx_plane_max_stride +ffffffff819f68b0 t hsw_primary_max_stride +ffffffff819f6900 t ilk_primary_max_stride +ffffffff819f6970 t i830_plane_update_arm +ffffffff819f69b0 t i9xx_plane_update_noarm +ffffffff819f6ae0 t i9xx_plane_update_arm +ffffffff819f6e90 t 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intel_get_cxsr_latency +ffffffff819f8df0 t ilk_compute_pipe_wm +ffffffff819f9160 t ilk_compute_intermediate_wm +ffffffff819f9370 t ilk_initial_watermarks +ffffffff819f93f0 t ilk_optimize_watermarks +ffffffff819f94a0 t ilk_wm_get_hw_state +ffffffff819f98a0 t ilk_compute_wm_level +ffffffff819f9d60 t ilk_validate_wm_level +ffffffff819f9ea0 t ilk_compute_wm_maximums +ffffffff819fa0d0 t ilk_program_watermarks +ffffffff819fae60 t ilk_wm_merge +ffffffff819fb110 t vlv_compute_pipe_wm +ffffffff819fbac0 t vlv_compute_intermediate_wm +ffffffff819fbde0 t vlv_initial_watermarks +ffffffff819fbe60 t vlv_atomic_update_fifo +ffffffff819fc170 t vlv_optimize_watermarks +ffffffff819fc230 t vlv_wm_get_hw_state_and_sanitize +ffffffff819fcf80 t _vlv_compute_pipe_wm +ffffffff819fd2a0 t vlv_invalidate_wms +ffffffff819fd410 t vlv_program_watermarks +ffffffff819fdb60 t chv_set_memory_dvfs +ffffffff819fdd20 t g4x_compute_pipe_wm +ffffffff819fe5f0 t g4x_compute_intermediate_wm +ffffffff819fea50 t g4x_initial_watermarks +ffffffff819feaf0 t g4x_optimize_watermarks +ffffffff819febd0 t g4x_wm_get_hw_state_and_sanitize +ffffffff819ff550 t _g4x_compute_pipe_wm +ffffffff819ff810 t g4x_program_watermarks +ffffffff819ffbb0 t pnv_update_wm +ffffffff81a00260 t i965_update_wm +ffffffff81a00630 t i9xx_update_wm +ffffffff81a00dd0 t i845_update_wm +ffffffff81a01000 T icl_dsi_frame_update +ffffffff81a010b0 T icl_dsi_init +ffffffff81a01930 t gen11_dsi_pre_pll_enable +ffffffff81a01d40 t gen11_dsi_pre_enable +ffffffff81a04a10 t gen11_dsi_enable +ffffffff81a04cc0 t gen11_dsi_disable +ffffffff81a04cf0 t gen11_dsi_post_disable +ffffffff81a05950 t gen11_dsi_get_config +ffffffff81a05b70 t gen11_dsi_sync_state +ffffffff81a05c20 t gen11_dsi_compute_config +ffffffff81a05fb0 t gen11_dsi_get_hw_state +ffffffff81a06150 t gen11_dsi_initial_fastset_check +ffffffff81a061d0 t gen11_dsi_get_power_domains +ffffffff81a062b0 t gen11_dsi_gate_clocks +ffffffff81a06370 t gen11_dsi_is_clock_enabled +ffffffff81a06430 t gen11_dsi_encoder_destroy +ffffffff81a06440 t wait_for_cmds_dispatched_to_panel +ffffffff81a068a0 t wait_for_header_credits +ffffffff81a06a30 t wait_for_payload_credits +ffffffff81a06bc0 t gen11_dsi_mode_valid +ffffffff81a06c30 t gen11_dsi_host_attach +ffffffff81a06c60 t gen11_dsi_host_detach +ffffffff81a06c90 t gen11_dsi_host_transfer +ffffffff81a07000 T intel_digital_connector_atomic_get_property +ffffffff81a07090 T intel_digital_connector_atomic_set_property +ffffffff81a07110 T intel_digital_connector_atomic_check +ffffffff81a07210 T intel_digital_connector_duplicate_state +ffffffff81a07290 T intel_connector_needs_modeset +ffffffff81a07300 T intel_any_crtc_needs_modeset +ffffffff81a07390 T intel_atomic_get_digital_connector_state +ffffffff81a073a0 T intel_crtc_duplicate_state +ffffffff81a074d0 T intel_crtc_free_hw_state +ffffffff81a07530 T intel_crtc_destroy_state +ffffffff81a075e0 T intel_atomic_state_alloc +ffffffff81a07660 T intel_atomic_state_free +ffffffff81a076a0 T intel_atomic_state_clear +ffffffff81a076f0 T intel_atomic_get_crtc_state +ffffffff81a08000 T intel_plane_alloc +ffffffff81a080c0 T intel_plane_free +ffffffff81a08100 T intel_plane_destroy_state +ffffffff81a081d0 T intel_plane_duplicate_state +ffffffff81a08280 T intel_adjusted_rate +ffffffff81a08300 T intel_plane_pixel_rate +ffffffff81a08390 T intel_plane_data_rate +ffffffff81a08450 T intel_plane_calc_min_cdclk +ffffffff81a085b0 T intel_plane_copy_uapi_to_hw_state +ffffffff81a08720 T intel_plane_copy_hw_state +ffffffff81a08810 T intel_plane_set_invisible +ffffffff81a08910 T intel_plane_atomic_check_with_state +ffffffff81a09580 T intel_plane_atomic_check +ffffffff81a096e0 T intel_plane_update_noarm +ffffffff81a09720 T intel_plane_update_arm +ffffffff81a09760 T intel_plane_disable_arm +ffffffff81a09780 T intel_crtc_planes_update_noarm +ffffffff81a098a0 T intel_crtc_planes_update_arm +ffffffff81a09c90 T intel_atomic_plane_check_clipping +ffffffff81a09ef0 T intel_plane_check_src_coordinates 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bxt_enable_backlight +ffffffff81a0eb70 t bxt_hz_to_pwm +ffffffff81a0ebb0 t cnp_setup_backlight +ffffffff81a0ee60 t cnp_disable_backlight +ffffffff81a0ef20 t cnp_enable_backlight +ffffffff81a0f0e0 t cnp_hz_to_pwm +ffffffff81a0f120 t lpt_setup_backlight +ffffffff81a0f480 t lpt_get_backlight +ffffffff81a0f4e0 t lpt_set_backlight +ffffffff81a0f550 t lpt_disable_backlight +ffffffff81a0f670 t lpt_enable_backlight +ffffffff81a0f870 t lpt_hz_to_pwm +ffffffff81a0f8e0 t pch_get_backlight +ffffffff81a0f940 t spt_hz_to_pwm +ffffffff81a0f990 t pch_setup_backlight +ffffffff81a0fba0 t pch_set_backlight +ffffffff81a0fc10 t pch_disable_backlight +ffffffff81a0fd00 t pch_enable_backlight +ffffffff81a0ff50 t pch_hz_to_pwm +ffffffff81a0ff90 t ext_pwm_setup_backlight +ffffffff81a10040 t ext_pwm_get_backlight +ffffffff81a10090 t ext_pwm_set_backlight +ffffffff81a100b0 t ext_pwm_disable_backlight +ffffffff81a100d0 t ext_pwm_enable_backlight +ffffffff81a10100 t vlv_setup_backlight +ffffffff81a10350 t vlv_get_backlight +ffffffff81a103f0 t vlv_set_backlight +ffffffff81a10470 t vlv_disable_backlight +ffffffff81a10530 t vlv_enable_backlight +ffffffff81a106d0 t vlv_hz_to_pwm +ffffffff81a10770 t i965_setup_backlight +ffffffff81a109b0 t i9xx_get_backlight +ffffffff81a10a50 t i9xx_set_backlight +ffffffff81a10b90 t i965_disable_backlight +ffffffff81a10c40 t i965_enable_backlight +ffffffff81a10df0 t i965_hz_to_pwm +ffffffff81a10e50 t i9xx_setup_backlight +ffffffff81a11190 t i9xx_disable_backlight +ffffffff81a11200 t i9xx_enable_backlight +ffffffff81a113b0 t i9xx_hz_to_pwm +ffffffff81a11410 t intel_pwm_setup_backlight +ffffffff81a11520 t intel_pwm_get_backlight +ffffffff81a115f0 t intel_pwm_set_backlight +ffffffff81a116b0 t intel_pwm_disable_backlight +ffffffff81a11770 t intel_pwm_enable_backlight +ffffffff81a12000 T intel_bios_encoder_port +ffffffff81a12080 t dvo_port_to_port +ffffffff81a12260 T intel_bios_dp_max_link_rate +ffffffff81a122e0 T intel_bios_dp_max_lane_count +ffffffff81a12330 T intel_bios_encoder_supports_dvi +ffffffff81a12360 T intel_bios_encoder_supports_hdmi +ffffffff81a123a0 T intel_bios_encoder_supports_dp +ffffffff81a123d0 T intel_bios_encoder_supports_edp +ffffffff81a12410 T intel_bios_encoder_supports_dsi +ffffffff81a12440 T intel_bios_encoder_is_lspcon +ffffffff81a12490 T intel_bios_hdmi_level_shift +ffffffff81a124f0 T intel_bios_hdmi_max_tmds_clock +ffffffff81a12580 T intel_bios_is_valid_vbt +ffffffff81a12670 T intel_bios_init +ffffffff81a14500 T intel_bios_init_panel_early +ffffffff81a14520 t intel_bios_init_panel +ffffffff81a16630 T intel_bios_init_panel_late +ffffffff81a16650 T intel_bios_driver_remove +ffffffff81a16740 T intel_bios_fini_panel +ffffffff81a16820 T intel_bios_is_tv_present +ffffffff81a168a0 T intel_bios_is_lvds_present +ffffffff81a16950 T intel_bios_is_port_present +ffffffff81a16a20 T intel_bios_encoder_supports_dp_dual_mode +ffffffff81a16a90 T intel_bios_is_dsi_present +ffffffff81a16b60 T intel_bios_get_dsc_params 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intel_cdclk_init +ffffffff81a1c860 T intel_modeset_calc_cdclk +ffffffff81a1ce90 t intel_cdclk_can_crawl +ffffffff81a1cf20 T intel_update_max_cdclk +ffffffff81a1d280 T intel_update_cdclk +ffffffff81a1d320 T intel_read_rawclk +ffffffff81a1d4a0 t i9xx_hrawclk +ffffffff81a1d550 T intel_cdclk_debugfs_register +ffffffff81a1d580 T intel_init_cdclk_hooks +ffffffff81a1d9a0 t bxt_set_cdclk +ffffffff81a1e020 t _bxt_set_cdclk +ffffffff81a1e7e0 t skl_set_cdclk +ffffffff81a1edf0 t intel_cdclk_duplicate_state +ffffffff81a1ee70 t intel_cdclk_destroy_state +ffffffff81a1ee90 t bxt_get_cdclk +ffffffff81a1f0c0 t bxt_modeset_calc_cdclk +ffffffff81a1f510 t tgl_calc_voltage_level +ffffffff81a1f560 t intel_compute_min_cdclk +ffffffff81a1f760 t rplu_calc_voltage_level +ffffffff81a1f7b0 t ehl_calc_voltage_level +ffffffff81a1f800 t icl_calc_voltage_level +ffffffff81a1f850 t bxt_calc_voltage_level +ffffffff81a1f8a0 t skl_get_cdclk +ffffffff81a1fab0 t skl_modeset_calc_cdclk +ffffffff81a1fcc0 t bdw_get_cdclk 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intel_color_post_update +ffffffff81a22100 T intel_color_prepare_commit +ffffffff81a22130 T intel_color_cleanup_commit +ffffffff81a22180 T intel_color_check +ffffffff81a221a0 T intel_color_get_config +ffffffff81a22220 T intel_color_lut_equal +ffffffff81a22280 T intel_color_assert_luts +ffffffff81a22570 T intel_color_crtc_init +ffffffff81a225e0 T intel_color_init +ffffffff81a22710 T intel_color_init_hooks +ffffffff81a22840 t chv_color_check +ffffffff81a22d50 t i9xx_color_commit_arm +ffffffff81a22d60 t chv_load_luts +ffffffff81a23160 t chv_read_luts +ffffffff81a233e0 t chv_lut_equal +ffffffff81a23710 t chv_read_csc +ffffffff81a23830 t intel_color_add_affected_planes +ffffffff81a239a0 t _check_luts +ffffffff81a23b00 t i965_load_luts +ffffffff81a23e70 t i965_read_luts +ffffffff81a24240 t vlv_color_check +ffffffff81a246e0 t vlv_load_luts +ffffffff81a24890 t i965_lut_equal +ffffffff81a24a70 t vlv_read_csc +ffffffff81a24c50 t i9xx_color_check +ffffffff81a24ed0 t i9xx_load_luts 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ilk_csc_limited_range +ffffffff81a29290 t ilk_assign_csc +ffffffff81a29590 t ivb_color_check +ffffffff81a29be0 t bdw_load_luts +ffffffff81a29dc0 t bdw_read_luts +ffffffff81a29fb0 t ivb_lut_equal +ffffffff81a2a370 t ilk_assign_luts +ffffffff81a2a590 t ilk_color_commit_noarm +ffffffff81a2a5e0 t hsw_color_commit_arm +ffffffff81a2a690 t ilk_read_csc +ffffffff81a2a6e0 t ivb_load_luts +ffffffff81a2a8c0 t ivb_read_luts +ffffffff81a2ad70 t ivb_load_lut_10 +ffffffff81a2af70 t ilk_color_commit_arm +ffffffff81a2aff0 t ilk_color_check +ffffffff81a2b250 t ilk_load_luts +ffffffff81a2b4e0 t ilk_read_luts +ffffffff81a2b740 t ilk_lut_equal +ffffffff81a2c000 T intel_combo_phy_power_up_lanes +ffffffff81a2c120 T intel_combo_phy_init +ffffffff81a2c5d0 T intel_combo_phy_uninit +ffffffff81a2c7a0 t icl_combo_phy_verify_state +ffffffff81a2d000 T intel_connector_init +ffffffff81a2d070 T intel_connector_alloc +ffffffff81a2d100 T intel_connector_free +ffffffff81a2d140 T intel_connector_destroy +ffffffff81a2d1a0 T intel_connector_register +ffffffff81a2d1b0 T intel_connector_unregister +ffffffff81a2d1c0 T intel_connector_attach_encoder +ffffffff81a2d1e0 T intel_connector_get_hw_state +ffffffff81a2d230 T intel_connector_get_pipe +ffffffff81a2d2f0 T intel_connector_update_modes +ffffffff81a2d320 T intel_ddc_get_modes +ffffffff81a2d390 T intel_attach_force_audio_property +ffffffff81a2d430 T intel_attach_broadcast_rgb_property +ffffffff81a2d4d0 T intel_attach_aspect_ratio_property +ffffffff81a2d530 T intel_attach_hdmi_colorspace_property +ffffffff81a2d580 T intel_attach_dp_colorspace_property +ffffffff81a2d5d0 T intel_attach_scaling_mode_property +ffffffff81a2e000 T intel_crt_port_enabled +ffffffff81a2e080 T intel_crt_reset +ffffffff81a2e160 T intel_crt_init +ffffffff81a2e590 t hsw_crt_get_config +ffffffff81a2e640 t hsw_crt_compute_config +ffffffff81a2e730 t hsw_pre_pll_enable_crt +ffffffff81a2e7a0 t hsw_pre_enable_crt +ffffffff81a2e840 t hsw_enable_crt +ffffffff81a2e9e0 t hsw_disable_crt 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i9xx_cursor_update_arm +ffffffff81a35af0 t i9xx_cursor_disable_arm +ffffffff81a35b10 t i9xx_cursor_get_hw_state +ffffffff81a35c00 t i9xx_check_cursor +ffffffff81a35e80 t intel_check_cursor +ffffffff81a36090 t intel_legacy_cursor_update +ffffffff81a36450 t intel_cursor_format_mod_supported +ffffffff81a37000 T intel_is_c10phy +ffffffff81a37040 T intel_cx0_phy_set_signal_levels +ffffffff81a37630 t intel_cx0_rmw +ffffffff81a37720 T intel_c10pll_readout_hw_state +ffffffff81a378b0 T intel_c10pll_dump_hw_state +ffffffff81a37b30 T intel_cx0_phy_check_hdmi_link_rate +ffffffff81a37ca0 T intel_cx0pll_calc_state +ffffffff81a380b0 T intel_c20pll_readout_hw_state +ffffffff81a385d0 t intel_c20_sram_read +ffffffff81a386e0 T intel_c20pll_dump_hw_state +ffffffff81a38a90 T intel_c10pll_calc_port_clock +ffffffff81a38b70 T intel_c20pll_calc_port_clock +ffffffff81a38c70 T intel_mtl_tbt_calc_port_clock +ffffffff81a38dd0 T intel_mtl_pll_enable +ffffffff81a3a5e0 T intel_mtl_pll_disable +ffffffff81a3aa60 T intel_mtl_port_pll_type +ffffffff81a3aaf0 T intel_c10pll_state_verify +ffffffff81a3ade0 t __intel_cx0_read +ffffffff81a3b170 t __intel_cx0_write +ffffffff81a3b4c0 t intel_cx0_bus_reset +ffffffff81a3b5f0 t intel_cx0_wait_for_ack +ffffffff81a3b770 t intel_cx0_powerdown_change_sequence +ffffffff81a3b9d0 t intel_c20_sram_write +ffffffff81a3c000 T hsw_prepare_dp_ddi_buffers +ffffffff81a3c1a0 T intel_wait_ddi_buf_idle +ffffffff81a3c3a0 T intel_ddi_set_dp_msa +ffffffff81a3c570 T intel_ddi_enable_transcoder_func +ffffffff81a3c650 t intel_ddi_transcoder_func_reg_val_get +ffffffff81a3c900 T intel_ddi_disable_transcoder_func +ffffffff81a3caf0 T intel_ddi_toggle_hdcp_bits +ffffffff81a3cc10 T intel_ddi_connector_get_hw_state +ffffffff81a3cd60 T intel_ddi_get_hw_state +ffffffff81a3cdd0 t intel_ddi_get_encoder_pipes +ffffffff81a3d220 T intel_ddi_enable_transcoder_clock +ffffffff81a3d2e0 T intel_ddi_disable_transcoder_clock +ffffffff81a3d350 T intel_ddi_level +ffffffff81a3d530 T icl_ddi_combo_get_pll +ffffffff81a3d5b0 T hsw_ddi_enable_clock +ffffffff81a3d670 T hsw_ddi_disable_clock +ffffffff81a3d6b0 T hsw_ddi_is_clock_enabled +ffffffff81a3d710 T intel_ddi_enable_clock +ffffffff81a3d750 T intel_ddi_disable_clock +ffffffff81a3d790 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff81a3d970 T dp_tp_ctl_reg +ffffffff81a3d9f0 T dp_tp_status_reg +ffffffff81a3da70 T intel_ddi_update_pipe +ffffffff81a3db00 T intel_ddi_update_active_dpll +ffffffff81a3dbf0 T intel_ddi_compute_min_voltage_level +ffffffff81a3dc70 T intel_ddi_get_clock +ffffffff81a3dd80 T intel_ddi_port_pll_type +ffffffff81a3ddc0 T hsw_ddi_get_config +ffffffff81a3deb0 t intel_ddi_get_config +ffffffff81a3e800 T intel_ddi_init +ffffffff81a3f580 t intel_ddi_hotplug +ffffffff81a3f990 t intel_ddi_compute_output_type +ffffffff81a3fa10 t intel_ddi_compute_config +ffffffff81a3fb80 t intel_ddi_compute_config_late +ffffffff81a3fe60 t intel_enable_ddi +ffffffff81a407b0 t intel_ddi_pre_pll_enable +ffffffff81a409a0 t intel_ddi_pre_enable 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intel_ddi_tc_encoder_suspend_complete +ffffffff81a45940 t intel_ddi_tc_encoder_shutdown_complete +ffffffff81a45980 t lpt_digital_port_connected +ffffffff81a459f0 t bdw_digital_port_connected +ffffffff81a45a60 t hsw_digital_port_connected +ffffffff81a45ad0 t intel_ddi_init_dp_connector +ffffffff81a45bb0 t intel_ddi_init_hdmi_connector +ffffffff81a45c20 t intel_ddi_encoder_reset +ffffffff81a45d00 t intel_ddi_encoder_destroy +ffffffff81a45db0 t intel_ddi_encoder_late_register +ffffffff81a45e10 t mtl_ddi_enable_d2d +ffffffff81a45fd0 t intel_wait_ddi_buf_active +ffffffff81a462e0 t intel_ddi_main_link_aux_domain +ffffffff81a463d0 t icl_program_mg_dp_mode +ffffffff81a466a0 t intel_ddi_init_dp_buf_reg +ffffffff81a468a0 t intel_disable_ddi_buf +ffffffff81a46a50 t mtl_disable_ddi_buf +ffffffff81a46e70 t intel_ddi_disable_fec_state +ffffffff81a46fc0 t mtl_ddi_prepare_link_retrain +ffffffff81a47300 t intel_ddi_prepare_link_retrain +ffffffff81a47800 t intel_ddi_set_link_train +ffffffff81a47950 t intel_ddi_set_idle_link_train +ffffffff81a47b20 t intel_ddi_dp_voltage_max +ffffffff81a47be0 t intel_ddi_dp_preemph_max +ffffffff81a48000 T is_hobl_buf_trans +ffffffff81a48040 T intel_ddi_buf_trans_init +ffffffff81a48300 t mtl_get_cx0_buf_trans +ffffffff81a483e0 t dg2_get_snps_buf_trans +ffffffff81a48450 t adlp_get_combo_buf_trans +ffffffff81a48570 t adlp_get_dkl_buf_trans +ffffffff81a485d0 t adls_get_combo_buf_trans +ffffffff81a486f0 t rkl_get_combo_buf_trans +ffffffff81a48810 t dg1_get_combo_buf_trans +ffffffff81a48930 t tgl_get_combo_buf_trans +ffffffff81a48a70 t tgl_get_dkl_buf_trans +ffffffff81a48ad0 t jsl_get_combo_buf_trans +ffffffff81a48b70 t ehl_get_combo_buf_trans +ffffffff81a48c10 t icl_get_combo_buf_trans +ffffffff81a48cc0 t icl_get_mg_buf_trans +ffffffff81a48d20 t bxt_get_buf_trans +ffffffff81a48da0 t kbl_y_get_buf_trans +ffffffff81a48e40 t kbl_u_get_buf_trans +ffffffff81a48ee0 t kbl_get_buf_trans +ffffffff81a48f80 t skl_y_get_buf_trans +ffffffff81a49020 t skl_u_get_buf_trans +ffffffff81a490c0 t skl_get_buf_trans +ffffffff81a49160 t bdw_get_buf_trans +ffffffff81a491f0 t hsw_get_buf_trans +ffffffff81a4a000 T vlv_get_hpll_vco +ffffffff81a4a050 T vlv_get_cck_clock +ffffffff81a4a100 T vlv_get_cck_clock_hpll +ffffffff81a4a200 T intel_update_czclk +ffffffff81a4a280 T is_trans_port_sync_master +ffffffff81a4a2b0 T is_trans_port_sync_mode +ffffffff81a4a2f0 T intel_crtc_bigjoiner_slave_pipes +ffffffff81a4a350 T intel_crtc_is_bigjoiner_slave +ffffffff81a4a3b0 T intel_crtc_is_bigjoiner_master +ffffffff81a4a410 T intel_master_crtc +ffffffff81a4a4a0 T assert_transcoder +ffffffff81a4a660 t transcoder_name +ffffffff81a4a6a0 T vlv_wait_port_ready +ffffffff81a4a7f0 T intel_enable_transcoder +ffffffff81a4aa50 t assert_planes_disabled +ffffffff81a4ab80 T intel_disable_transcoder +ffffffff81a4ada0 T intel_rotation_info_size +ffffffff81a4adf0 T intel_remapped_info_size +ffffffff81a4af20 T intel_plane_uses_fence +ffffffff81a4af70 T intel_fb_xy_to_linear +ffffffff81a4afc0 T intel_add_fb_offsets +ffffffff81a4b010 T intel_plane_fb_max_stride +ffffffff81a4b090 T intel_set_plane_visible +ffffffff81a4b0e0 T intel_plane_fixup_bitmasks +ffffffff81a4b190 T intel_plane_disable_noatomic +ffffffff81a4b380 T intel_plane_fence_y_offset +ffffffff81a4b3e0 T intel_has_pending_fb_unpin +ffffffff81a4b4d0 T intel_get_crtc_new_encoder +ffffffff81a4b660 T ilk_pfit_disable +ffffffff81a4b720 T intel_phy_is_combo +ffffffff81a4b790 T intel_phy_is_tc +ffffffff81a4b800 T intel_phy_is_snps +ffffffff81a4b850 T intel_port_to_phy +ffffffff81a4b900 T intel_port_to_tc +ffffffff81a4ba10 T intel_aux_power_domain +ffffffff81a4ba50 T intel_modeset_get_crtc_power_domains +ffffffff81a4bc80 T intel_modeset_put_crtc_power_domains +ffffffff81a4bcb0 T intel_encoder_destroy +ffffffff81a4bce0 T intel_encoder_get_config +ffffffff81a4bd10 t intel_crtc_readout_derived_state +ffffffff81a4c150 T intel_link_compute_m_n +ffffffff81a4c280 T intel_panel_sanitize_ssc +ffffffff81a4c360 T intel_zero_m_n +ffffffff81a4c3a0 T intel_set_m_n +ffffffff81a4c460 T intel_cpu_transcoder_has_m2_n2 +ffffffff81a4c4c0 T intel_cpu_transcoder_set_m1_n1 +ffffffff81a4c670 T intel_cpu_transcoder_set_m2_n2 +ffffffff81a4c7d0 T i9xx_set_pipeconf +ffffffff81a4c980 T ilk_set_pipeconf +ffffffff81a4cb50 T bdw_get_pipe_misc_bpp +ffffffff81a4cc20 T ilk_get_lanes_required +ffffffff81a4cc80 T intel_get_m_n +ffffffff81a4cd90 T intel_cpu_transcoder_get_m1_n1 +ffffffff81a4cf20 T intel_cpu_transcoder_get_m2_n2 +ffffffff81a4d080 T intel_crtc_get_pipe_config +ffffffff81a4d0f0 T i9xx_crtc_clock_get +ffffffff81a4d380 T intel_dotclock_calculate +ffffffff81a4d3e0 T intel_crtc_dotclock +ffffffff81a4d4b0 T intel_encoder_current_mode +ffffffff81a4d660 T intel_fuzzy_clock_check +ffffffff81a4d6b0 T intel_pipe_config_compare +ffffffff81a50a10 t pipe_config_mismatch +ffffffff81a50b00 t pipe_config_infoframe_mismatch +ffffffff81a50cb0 T intel_modeset_all_pipes +ffffffff81a50ec0 T intel_atomic_add_affected_planes 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+ffffffff81a56ba0 T i830_enable_pipe +ffffffff81a571e0 T i830_disable_pipe +ffffffff81a57510 T intel_hpd_poll_fini +ffffffff81a57610 T intel_scanout_needs_vtd_wa +ffffffff81a57650 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81a577b0 t intel_atomic_cleanup_work +ffffffff81a578b0 t intel_pre_plane_update +ffffffff81a57e10 t hsw_get_pipe_config +ffffffff81a58a40 t hsw_crtc_enable +ffffffff81a594a0 t hsw_crtc_disable +ffffffff81a597a0 t skl_commit_modeset_enables +ffffffff81a59d70 t intel_get_transcoder_timings +ffffffff81a5a080 t intel_get_pipe_src_size +ffffffff81a5a1a0 t ilk_get_pfit_config +ffffffff81a5a320 t enabled_bigjoiner_pipes +ffffffff81a5a540 t bdw_set_pipe_misc +ffffffff81a5a690 t ilk_pfit_enable +ffffffff81a5a7c0 t intel_set_transcoder_timings +ffffffff81a5ab80 t intel_update_crtc +ffffffff81a5b220 t intel_commit_modeset_enables +ffffffff81a5b340 t ilk_get_pipe_config +ffffffff81a5b590 t ilk_crtc_enable +ffffffff81a5b930 t ilk_crtc_disable +ffffffff81a5bbc0 t i9xx_get_pipe_config +ffffffff81a5c340 t valleyview_crtc_enable +ffffffff81a5c7a0 t i9xx_crtc_disable +ffffffff81a5cb40 t i9xx_pfit_enable +ffffffff81a5ccb0 t i9xx_crtc_enable +ffffffff81a5e000 T intel_display_device_probe +ffffffff81a5e0d0 T intel_display_device_info_runtime_init +ffffffff81a5e730 T intel_display_device_info_print +ffffffff81a5f000 T intel_display_driver_probe_defer +ffffffff81a5f030 T intel_display_driver_init_hw +ffffffff81a5f0f0 T intel_display_driver_early_probe +ffffffff81a5f170 T intel_display_driver_probe_noirq +ffffffff81a5f450 T intel_display_driver_probe_nogem +ffffffff81a5f760 T intel_display_driver_probe +ffffffff81a5f800 T intel_display_driver_register +ffffffff81a5f860 T intel_display_driver_remove +ffffffff81a5f910 T intel_display_driver_remove_noirq +ffffffff81a5f9c0 T intel_display_driver_remove_nogem +ffffffff81a5fa00 T intel_display_driver_unregister +ffffffff81a5fa80 T intel_display_driver_suspend +ffffffff81a5fb30 T __intel_display_driver_resume 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gen8_irq_power_well_pre_disable +ffffffff81a64640 T valleyview_enable_display_irqs +ffffffff81a64760 T valleyview_disable_display_irqs +ffffffff81a64870 T ilk_de_irq_postinstall +ffffffff81a64980 T gen8_de_irq_postinstall +ffffffff81a64df0 T gen11_de_irq_postinstall +ffffffff81a64e60 T dg1_de_irq_postinstall +ffffffff81a64ed0 T intel_display_irq_init +ffffffff81a65000 T intel_display_power_domain_str +ffffffff81a65060 T __intel_display_power_is_enabled +ffffffff81a65120 T intel_display_power_is_enabled +ffffffff81a65240 T intel_display_power_set_target_dc_state +ffffffff81a65360 T intel_display_power_get +ffffffff81a653e0 t __intel_display_power_get_domain +ffffffff81a655d0 T intel_display_power_get_if_enabled +ffffffff81a65700 T __intel_display_power_put_async +ffffffff81a658f0 t __intel_display_power_put_domain +ffffffff81a65a60 T intel_display_power_flush_work +ffffffff81a65b80 t release_async_put_domains +ffffffff81a65c70 T intel_display_power_put_unchecked +ffffffff81a65cd0 T intel_display_power_get_in_set +ffffffff81a65db0 T intel_display_power_get_in_set_if_enabled +ffffffff81a65e60 T intel_display_power_put_mask_in_set +ffffffff81a65f30 T intel_power_domains_init +ffffffff81a66180 t intel_display_power_put_async_work +ffffffff81a663f0 T intel_power_domains_cleanup +ffffffff81a66410 T gen9_dbuf_slices_update +ffffffff81a66620 T intel_power_domains_init_hw +ffffffff81a66b20 t icl_display_core_init +ffffffff81a67320 t bxt_display_core_init +ffffffff81a67470 t vlv_cmnlane_wa +ffffffff81a67540 t assert_ved_power_gated +ffffffff81a675f0 t hsw_assert_cdclk +ffffffff81a67720 t intel_pch_reset_handshake +ffffffff81a677d0 T intel_power_domains_driver_remove +ffffffff81a678c0 T intel_power_domains_sanitize_state +ffffffff81a679b0 T intel_power_domains_enable +ffffffff81a67a10 T intel_power_domains_disable +ffffffff81a67ac0 T intel_power_domains_suspend +ffffffff81a67c70 t icl_display_core_uninit +ffffffff81a67d80 t bxt_display_core_uninit +ffffffff81a67e40 T intel_power_domains_resume +ffffffff81a67f10 T intel_display_power_suspend_late +ffffffff81a67ff0 t hsw_enable_pc8 +ffffffff81a68ce0 T intel_display_power_resume_early +ffffffff81a68dd0 t hsw_disable_pc8 +ffffffff81a69200 T intel_display_power_suspend +ffffffff81a69280 T intel_display_power_resume +ffffffff81a69360 T intel_display_power_debug +ffffffff81a69420 T intel_display_power_ddi_io_domain +ffffffff81a69510 T intel_display_power_ddi_lanes_domain +ffffffff81a69600 T intel_display_power_aux_io_domain +ffffffff81a69710 T intel_display_power_legacy_aux_domain +ffffffff81a69820 T intel_display_power_tbt_aux_domain +ffffffff81a69930 t __delayed_work_tick +ffffffff81a6a000 T intel_display_power_map_init +ffffffff81a6a180 t __set_power_wells +ffffffff81a6a560 T intel_display_power_map_cleanup +ffffffff81a6b000 T lookup_power_well +ffffffff81a6b0c0 T intel_power_well_enable +ffffffff81a6b150 T intel_power_well_name +ffffffff81a6b190 T intel_power_well_disable +ffffffff81a6b200 T intel_power_well_sync_hw +ffffffff81a6b270 T intel_power_well_get +ffffffff81a6b310 T intel_power_well_put +ffffffff81a6b410 T intel_power_well_is_enabled +ffffffff81a6b430 T intel_power_well_is_enabled_cached +ffffffff81a6b460 T intel_display_power_well_is_enabled +ffffffff81a6b510 T intel_power_well_is_always_on +ffffffff81a6b550 T intel_power_well_domains +ffffffff81a6b580 T intel_power_well_refcount +ffffffff81a6b5b0 T gen9_sanitize_dc_state +ffffffff81a6b680 T gen9_set_dc_state +ffffffff81a6b9e0 T gen9_enable_dc5 +ffffffff81a6bc40 T skl_enable_dc6 +ffffffff81a6bda0 T bxt_enable_dc9 +ffffffff81a6bf50 T bxt_disable_dc9 +ffffffff81a6c040 T gen9_disable_dc_states +ffffffff81a6c410 T chv_phy_powergate_ch +ffffffff81a6c520 t assert_chv_phy_status +ffffffff81a6c8d0 T chv_phy_powergate_lanes +ffffffff81a6cb30 t i9xx_power_well_sync_hw_noop +ffffffff81a6cb60 t i9xx_always_on_power_well_noop +ffffffff81a6cb90 t i9xx_always_on_power_well_enabled +ffffffff81a6cbc0 t chv_pipe_power_well_sync_hw +ffffffff81a6cbf0 t chv_pipe_power_well_enable +ffffffff81a6cc20 t chv_pipe_power_well_disable +ffffffff81a6cc80 t chv_pipe_power_well_enabled +ffffffff81a6cd80 t chv_dpio_cmn_power_well_enable +ffffffff81a6cfa0 t chv_dpio_cmn_power_well_disable +ffffffff81a6d0d0 t vlv_power_well_enabled +ffffffff81a6d1f0 t i830_pipes_power_well_sync_hw +ffffffff81a6d2e0 t i830_pipes_power_well_enable +ffffffff81a6d3a0 t i830_pipes_power_well_disable +ffffffff81a6d3d0 t i830_pipes_power_well_enabled +ffffffff81a6d470 t hsw_power_well_sync_hw +ffffffff81a6d560 t hsw_power_well_enable +ffffffff81a6d7e0 t hsw_power_well_disable +ffffffff81a6d8a0 t hsw_power_well_enabled +ffffffff81a6d980 t gen9_dc_off_power_well_enable +ffffffff81a6d990 t gen9_dc_off_power_well_disable +ffffffff81a6da30 t gen9_dc_off_power_well_enabled +ffffffff81a6dac0 t bxt_dpio_cmn_power_well_enable +ffffffff81a6daf0 t bxt_dpio_cmn_power_well_disable +ffffffff81a6db20 t bxt_dpio_cmn_power_well_enabled +ffffffff81a6db50 t vlv_display_power_well_enable +ffffffff81a6db80 t vlv_display_power_well_disable +ffffffff81a6dbf0 t vlv_dpio_cmn_power_well_enable +ffffffff81a6dc70 t vlv_dpio_cmn_power_well_disable +ffffffff81a6dd70 t vlv_power_well_enable +ffffffff81a6dd90 t vlv_power_well_disable +ffffffff81a6ddb0 t icl_aux_power_well_enable +ffffffff81a6e490 t icl_aux_power_well_disable +ffffffff81a6e720 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a6e740 t tgl_tc_cold_off_power_well_enable +ffffffff81a6e760 t tgl_tc_cold_off_power_well_disable +ffffffff81a6e780 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81a6e7b0 t xelpdp_aux_power_well_enable +ffffffff81a6e880 t xelpdp_aux_power_well_disable +ffffffff81a6e950 t xelpdp_aux_power_well_enabled +ffffffff81a6ea00 t chv_set_pipe_power_well +ffffffff81a6ec00 t vlv_display_power_well_init +ffffffff81a6ef60 t vlv_set_power_well +ffffffff81a6f180 t hsw_wait_for_power_well_enable +ffffffff81a6f2d0 t hsw_wait_for_power_well_disable +ffffffff81a6f5a0 t tgl_tc_cold_request +ffffffff81a70000 T intel_display_reset_prepare +ffffffff81a701f0 T intel_display_reset_finish +ffffffff81a71000 T intel_display_rps_boost_after_vblank +ffffffff81a71110 t do_rps_boost +ffffffff81a711c0 T intel_display_rps_mark_interactive +ffffffff81a72000 T intel_dkl_phy_init +ffffffff81a72020 T intel_dkl_phy_read +ffffffff81a72150 T intel_dkl_phy_write +ffffffff81a72260 T intel_dkl_phy_rmw +ffffffff81a72390 T intel_dkl_phy_posting_read +ffffffff81a73000 T intel_dmc_has_payload +ffffffff81a73050 T intel_dmc_enable_pipe +ffffffff81a73160 T intel_dmc_disable_pipe +ffffffff81a73270 T intel_dmc_load_program +ffffffff81a73aa0 t pipedmc_clock_gating_wa +ffffffff81a73c90 T intel_dmc_disable_program +ffffffff81a73ec0 T assert_dmc_loaded +ffffffff81a74040 T intel_dmc_init +ffffffff81a74300 t dmc_load_work_fn +ffffffff81a74c30 T intel_dmc_suspend +ffffffff81a74cc0 T intel_dmc_resume +ffffffff81a74d60 T intel_dmc_fini +ffffffff81a74eb0 T intel_dmc_print_error_state +ffffffff81a74fb0 T intel_dmc_debugfs_register +ffffffff81a75000 T intel_dp_is_edp +ffffffff81a75030 T intel_dp_is_uhbr +ffffffff81a75070 T intel_dp_max_lane_count +ffffffff81a750e0 T intel_dp_link_required +ffffffff81a75120 T intel_dp_max_data_rate +ffffffff81a75180 T intel_dp_can_bigjoiner +ffffffff81a751d0 T intel_dp_get_link_train_fallback_values +ffffffff81a75580 T intel_dp_mode_to_fec_clock +ffffffff81a755d0 T intel_dp_dsc_nearest_valid_bpp +ffffffff81a756d0 T intel_dp_dsc_get_output_bpp +ffffffff81a757f0 T intel_dp_dsc_get_slice_count +ffffffff81a75980 T intel_dp_min_bpp +ffffffff81a759c0 T intel_dp_need_bigjoiner +ffffffff81a75a20 T intel_dp_source_supports_tps3 +ffffffff81a75a70 T intel_dp_source_supports_tps4 +ffffffff81a75ab0 T intel_dp_max_link_rate +ffffffff81a75b60 T intel_dp_rate_select +ffffffff81a75c00 T intel_dp_compute_rate +ffffffff81a75cd0 T intel_dp_has_hdmi_sink +ffffffff81a75d10 T intel_dp_adjust_compliance_config +ffffffff81a75e50 T intel_dp_dsc_compute_bpp +ffffffff81a75f00 T intel_dp_dsc_compute_config +ffffffff81a765e0 T intel_dp_limited_color_range +ffffffff81a76650 T intel_dp_compute_psr_vsc_sdp +ffffffff81a766d0 T intel_dp_needs_vsc_sdp +ffffffff81a76720 t intel_dp_compute_vsc_colorimetry +ffffffff81a768a0 T intel_dp_compute_config +ffffffff81a76cf0 t intel_dp_compute_output_format +ffffffff81a76f20 t intel_dp_audio_compute_config +ffffffff81a77000 t intel_dp_drrs_compute_config +ffffffff81a771b0 t intel_dp_compute_vsc_sdp +ffffffff81a77250 t intel_dp_compute_hdr_metadata_infoframe_sdp +ffffffff81a772e0 T intel_dp_set_link_params +ffffffff81a77320 T intel_edp_backlight_on +ffffffff81a773c0 T intel_edp_backlight_off +ffffffff81a77450 T intel_dp_sink_set_decompression_state +ffffffff81a774f0 T intel_dp_wait_source_oui +ffffffff81a775e0 T intel_dp_set_power +ffffffff81a77800 T intel_dp_sync_state +ffffffff81a77880 t intel_dp_get_dpcd +ffffffff81a779e0 t intel_dp_reset_max_link_params +ffffffff81a77ae0 T intel_dp_initial_fastset_check +ffffffff81a77c10 T intel_dp_check_frl_training +ffffffff81a781c0 T intel_dp_pcon_dsc_configure +ffffffff81a783b0 T intel_dp_configure_protocol_converter +ffffffff81a78590 T intel_dp_get_colorimetry_status +ffffffff81a785f0 T intel_edp_fixup_vbt_bpp +ffffffff81a78680 T intel_write_dp_vsc_sdp +ffffffff81a78820 T intel_dp_set_infoframes +ffffffff81a78940 t intel_write_dp_sdp +ffffffff81a78c20 T intel_read_dp_sdp +ffffffff81a78f40 T intel_dp_get_active_pipes +ffffffff81a79160 T intel_dp_retrain_link +ffffffff81a79410 t intel_dp_needs_link_retrain +ffffffff81a79590 T intel_dp_phy_test +ffffffff81a79c40 T intel_digital_port_connected +ffffffff81a79cf0 T intel_dp_encoder_flush_work +ffffffff81a79d50 T intel_dp_encoder_suspend +ffffffff81a79d90 T intel_dp_encoder_shutdown +ffffffff81a79dd0 T intel_dp_hpd_pulse +ffffffff81a7a440 T intel_dp_is_port_edp +ffffffff81a7a4d0 T intel_dp_init_connector +ffffffff81a7b640 t intel_dp_modeset_retry_work_fn +ffffffff81a7b6e0 t intel_dp_set_common_rates +ffffffff81a7b860 T intel_dp_mst_suspend +ffffffff81a7b900 T intel_dp_mst_resume +ffffffff81a7b9b0 t intel_dp_output_format +ffffffff81a7baf0 t intel_dp_compute_link_config +ffffffff81a7c2b0 t intel_dp_tmds_clock_valid +ffffffff81a7c350 t intel_dp_set_sink_rates +ffffffff81a7c590 t intel_dp_check_device_service_irq +ffffffff81a7cb60 t intel_dp_force +ffffffff81a7cc90 t intel_dp_connector_register +ffffffff81a7cd60 t intel_dp_connector_unregister +ffffffff81a7cdc0 t intel_dp_oob_hotplug_event +ffffffff81a7ce40 t intel_dp_set_edid +ffffffff81a7d240 t intel_dp_get_modes +ffffffff81a7d330 t intel_dp_detect +ffffffff81a7dbf0 t intel_dp_mode_valid +ffffffff81a7df70 t intel_dp_connector_atomic_check +ffffffff81a7e2e0 t intel_dp_get_dsc_sink_cap +ffffffff81a7e450 t intel_dp_mode_min_output_bpp +ffffffff81a7e4b0 t intel_dp_mode_valid_downstream +ffffffff81a7e670 t icl_max_source_rate +ffffffff81a7f000 T intel_dp_aux_pack +ffffffff81a7f070 T intel_dp_aux_fini +ffffffff81a7f090 T intel_dp_aux_init +ffffffff81a7f2a0 t xelpdp_aux_ctl_reg +ffffffff81a7f370 t xelpdp_aux_data_reg +ffffffff81a7f440 t tgl_aux_ctl_reg +ffffffff81a7f4c0 t tgl_aux_data_reg +ffffffff81a7f550 t skl_aux_ctl_reg +ffffffff81a7f5d0 t skl_aux_data_reg +ffffffff81a7f660 t ilk_aux_ctl_reg +ffffffff81a7f6e0 t ilk_aux_data_reg +ffffffff81a7f770 t g4x_aux_ctl_reg +ffffffff81a7f7f0 t g4x_aux_data_reg +ffffffff81a7f890 t skl_get_aux_clock_divider +ffffffff81a7f8c0 t hsw_get_aux_clock_divider +ffffffff81a7f950 t ilk_get_aux_clock_divider +ffffffff81a7f9b0 t g4x_get_aux_clock_divider +ffffffff81a7fa00 t skl_get_aux_send_ctl +ffffffff81a7fa80 t g4x_get_aux_send_ctl +ffffffff81a7fae0 t kasprintf +ffffffff81a7fbb0 t intel_dp_aux_transfer +ffffffff81a7fe40 T intel_dp_aux_ch +ffffffff81a7ffa0 T intel_dp_aux_irq_handler +ffffffff81a80040 t intel_dp_aux_xfer +ffffffff81a81000 T intel_dp_aux_init_backlight_funcs +ffffffff81a81260 t intel_dp_aux_hdr_setup_backlight +ffffffff81a813e0 t intel_dp_aux_hdr_get_backlight +ffffffff81a81560 t intel_dp_aux_hdr_set_backlight +ffffffff81a81660 t intel_dp_aux_hdr_disable_backlight +ffffffff81a816e0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a81920 t intel_dp_aux_vesa_setup_backlight +ffffffff81a81b80 t intel_dp_aux_vesa_get_backlight +ffffffff81a81bb0 t intel_dp_aux_vesa_set_backlight +ffffffff81a81c50 t intel_dp_aux_vesa_disable_backlight +ffffffff81a81d00 t intel_dp_aux_vesa_enable_backlight +ffffffff81a82000 T intel_dp_hdcp_init +ffffffff81a820b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a821a0 t intel_dp_hdcp_read_bksv +ffffffff81a82230 t intel_dp_hdcp_read_bstatus +ffffffff81a822c0 t intel_dp_hdcp_repeater_present +ffffffff81a82370 t intel_dp_hdcp_read_ri_prime +ffffffff81a82400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a824a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a82590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a82630 t intel_dp_hdcp_toggle_signalling +ffffffff81a82660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a82850 t intel_dp_hdcp_check_link +ffffffff81a828e0 t intel_dp_hdcp_capable +ffffffff81a82990 t intel_dp_hdcp2_capable +ffffffff81a82a10 t intel_dp_hdcp2_write_msg +ffffffff81a82bc0 t intel_dp_hdcp2_read_msg +ffffffff81a83290 t intel_dp_hdcp2_config_stream_type +ffffffff81a832f0 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a83560 t intel_dp_mst_hdcp2_check_link +ffffffff81a83620 t intel_dp_hdcp2_check_link +ffffffff81a84000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a840d0 t intel_dp_init_lttpr +ffffffff81a843b0 T intel_dp_get_adjust_train +ffffffff81a84ab0 T intel_dp_program_link_training_pattern +ffffffff81a84bd0 T intel_dp_set_signal_levels +ffffffff81a84f70 T intel_dp_dump_link_status +ffffffff81a85060 T intel_dp_stop_link_train +ffffffff81a85310 T intel_dp_start_link_train +ffffffff81a870d0 T intel_dp_128b132b_sdp_crc16 +ffffffff81a871a0 t intel_dp_link_train_phy +ffffffff81a89000 T intel_dp_mst_encoder_active_links +ffffffff81a89030 T intel_dp_mst_encoder_init +ffffffff81a89270 T intel_dp_mst_source_support +ffffffff81a892b0 T intel_dp_mst_encoder_cleanup +ffffffff81a89310 T intel_dp_mst_is_master_trans +ffffffff81a89350 T intel_dp_mst_is_slave_trans +ffffffff81a89390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a89450 t intel_dp_add_mst_connector +ffffffff81a89680 t intel_dp_mst_poll_hpd_irq +ffffffff81a896a0 t intel_dp_mst_get_hw_state +ffffffff81a89700 t intel_dp_mst_connector_late_register +ffffffff81a89770 t intel_dp_mst_connector_early_unregister +ffffffff81a897a0 t intel_dp_mst_get_modes +ffffffff81a89840 t intel_dp_mst_detect +ffffffff81a89940 t intel_dp_mst_mode_valid_ctx +ffffffff81a89b70 t intel_mst_atomic_best_encoder +ffffffff81a89bd0 t intel_dp_mst_atomic_check +ffffffff81a89d40 t intel_dp_mst_compute_config +ffffffff81a8a290 t intel_dp_mst_compute_config_late +ffffffff81a8a390 t intel_mst_disable_dp +ffffffff81a8a470 t intel_mst_post_disable_dp +ffffffff81a8a720 t intel_mst_post_pll_disable_dp +ffffffff81a8a780 t intel_mst_pre_pll_enable_dp +ffffffff81a8a7c0 t intel_mst_pre_enable_dp +ffffffff81a8a9e0 t intel_mst_enable_dp +ffffffff81a8ad80 t intel_dp_mst_enc_get_hw_state +ffffffff81a8adc0 t intel_dp_mst_enc_get_config +ffffffff81a8ade0 t intel_dp_mst_initial_fastset_check +ffffffff81a8ae00 t intel_dp_mst_encoder_destroy +ffffffff81a8ae30 t intel_dp_mst_find_vcpi_slots_for_bpp +ffffffff81a8c000 T bxt_port_to_phy_channel +ffffffff81a8c110 T bxt_ddi_phy_set_signal_levels +ffffffff81a8c4f0 T bxt_ddi_phy_is_enabled +ffffffff81a8c620 T bxt_ddi_phy_uninit +ffffffff81a8c700 T bxt_ddi_phy_init +ffffffff81a8c920 t _bxt_ddi_phy_init +ffffffff81a8ce70 T bxt_ddi_phy_verify_state +ffffffff81a8d150 t __phy_reg_verify_state +ffffffff81a8d250 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a8d2c0 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a8d520 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a8d700 T vlv_dig_port_to_channel +ffffffff81a8d770 T vlv_dig_port_to_phy +ffffffff81a8d7e0 T vlv_pipe_to_channel +ffffffff81a8d840 T chv_set_phy_signal_level +ffffffff81a8db90 T chv_data_lane_soft_reset +ffffffff81a8dd60 T chv_phy_pre_pll_enable +ffffffff81a8e000 T chv_phy_pre_encoder_enable +ffffffff81a8e260 T chv_phy_release_cl2_override +ffffffff81a8e2f0 T chv_phy_post_pll_disable +ffffffff81a8e3a0 T vlv_set_phy_signal_level +ffffffff81a8e510 T vlv_phy_pre_pll_enable +ffffffff81a8e610 T vlv_phy_pre_encoder_enable +ffffffff81a8e710 T vlv_phy_reset_lanes +ffffffff81a8f000 T pnv_calc_dpll_params +ffffffff81a8f0c0 T i9xx_calc_dpll_params +ffffffff81a8f190 T vlv_calc_dpll_params +ffffffff81a8f250 T chv_calc_dpll_params +ffffffff81a8f320 T bxt_find_best_dpll +ffffffff81a8f340 t chv_find_best_dpll +ffffffff81a8f680 T i9xx_dpll_compute_fp +ffffffff81a8f6c0 T vlv_compute_dpll +ffffffff81a8f740 T chv_compute_dpll +ffffffff81a8f7c0 T intel_dpll_crtc_compute_clock +ffffffff81a8f8c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a8fa10 T intel_dpll_init_clock_hook +ffffffff81a8fb20 T i9xx_enable_pll +ffffffff81a8fef0 T vlv_enable_pll +ffffffff81a90410 T chv_enable_pll +ffffffff81a909f0 T vlv_force_pll_on +ffffffff81a90b40 T vlv_disable_pll +ffffffff81a90c10 T chv_disable_pll +ffffffff81a90d40 T i9xx_disable_pll +ffffffff81a90e60 T vlv_force_pll_off +ffffffff81a90f60 T assert_pll_enabled +ffffffff81a91060 T assert_pll_disabled +ffffffff81a91160 t intel_pll_is_valid +ffffffff81a91220 t mtl_crtc_compute_clock +ffffffff81a912e0 t dg2_crtc_compute_clock +ffffffff81a91360 t hsw_crtc_compute_clock +ffffffff81a91420 t hsw_crtc_get_shared_dpll +ffffffff81a914c0 t ilk_crtc_compute_clock +ffffffff81a917c0 t ilk_crtc_get_shared_dpll +ffffffff81a91810 t g4x_find_best_dpll +ffffffff81a91b50 t chv_crtc_compute_clock +ffffffff81a91c60 t vlv_crtc_compute_clock +ffffffff81a92100 t g4x_crtc_compute_clock +ffffffff81a92260 t i9xx_compute_dpll +ffffffff81a924e0 t pnv_crtc_compute_clock +ffffffff81a928c0 t i9xx_crtc_compute_clock +ffffffff81a929e0 t i9xx_find_best_dpll +ffffffff81a92d20 t i8xx_crtc_compute_clock +ffffffff81a93000 T intel_get_shared_dpll_by_id +ffffffff81a93040 T assert_shared_dpll +ffffffff81a931f0 T intel_dpll_get_hw_state +ffffffff81a93220 T icl_tc_port_to_pll_id +ffffffff81a93250 T intel_enable_shared_dpll +ffffffff81a935b0 T intel_disable_shared_dpll +ffffffff81a93850 T intel_unreference_shared_dpll_crtc +ffffffff81a93950 T intel_shared_dpll_swap_state +ffffffff81a93a30 T icl_set_active_port_dpll +ffffffff81a93a70 T intel_shared_dpll_init +ffffffff81a93c70 T intel_compute_shared_dplls +ffffffff81a93d00 T intel_reserve_shared_dplls +ffffffff81a93d90 T intel_release_shared_dplls +ffffffff81a93dd0 T intel_update_active_dpll +ffffffff81a93e30 T intel_dpll_get_freq +ffffffff81a93ec0 T intel_dpll_update_ref_clks +ffffffff81a93f10 T intel_dpll_readout_hw_state +ffffffff81a94140 T intel_dpll_sanitize_state +ffffffff81a94220 T intel_dpll_dump_hw_state +ffffffff81a942a0 T intel_shared_dpll_state_verify +ffffffff81a94480 t verify_single_dpll_state +ffffffff81a94a00 T intel_shared_dpll_verify_disabled +ffffffff81a94a80 t icl_compute_dplls +ffffffff81a956c0 t icl_get_dplls +ffffffff81a95990 t icl_put_dplls +ffffffff81a95a50 t icl_update_active_dpll +ffffffff81a95b00 t icl_update_dpll_ref_clks +ffffffff81a95b40 t icl_dump_hw_state +ffffffff81a95c00 t combo_pll_enable +ffffffff81a95e10 t combo_pll_disable +ffffffff81a95ee0 t combo_pll_get_hw_state +ffffffff81a95f60 t icl_ddi_combo_pll_get_freq +ffffffff81a96130 t icl_dpll_write +ffffffff81a96370 t adlp_cmtg_clock_gating_wa +ffffffff81a964d0 t icl_pll_disable +ffffffff81a96670 t icl_pll_get_hw_state +ffffffff81a96950 t tbt_pll_enable +ffffffff81a96b10 t tbt_pll_disable +ffffffff81a96b30 t tbt_pll_get_hw_state +ffffffff81a96b50 t icl_ddi_tbt_pll_get_freq +ffffffff81a96bc0 t mg_pll_enable +ffffffff81a971e0 t mg_pll_disable +ffffffff81a97220 t dkl_pll_get_hw_state +ffffffff81a97430 t icl_ddi_mg_pll_get_freq +ffffffff81a97510 t icl_calc_dpll_state +ffffffff81a97650 t intel_find_shared_dpll +ffffffff81a97970 t intel_reference_shared_dpll +ffffffff81a97b90 t intel_unreference_shared_dpll +ffffffff81a97d90 t mg_pll_get_hw_state +ffffffff81a97fe0 t bxt_compute_dpll +ffffffff81a982e0 t bxt_get_dpll +ffffffff81a983b0 t intel_put_dpll +ffffffff81a98410 t bxt_update_dpll_ref_clks +ffffffff81a98450 t bxt_dump_hw_state +ffffffff81a98500 t bxt_ddi_pll_enable +ffffffff81a98ee0 t bxt_ddi_pll_disable +ffffffff81a990f0 t bxt_ddi_pll_get_hw_state +ffffffff81a99520 t bxt_ddi_pll_get_freq +ffffffff81a995b0 t bxt_ddi_set_dpll_hw_state +ffffffff81a997a0 t skl_compute_dpll +ffffffff81a99f00 t skl_get_dpll +ffffffff81a99fb0 t skl_update_dpll_ref_clks +ffffffff81a99ff0 t skl_dump_hw_state +ffffffff81a9a050 t skl_ddi_dpll0_enable +ffffffff81a9a110 t skl_ddi_dpll0_disable +ffffffff81a9a140 t skl_ddi_dpll0_get_hw_state +ffffffff81a9a240 t skl_ddi_pll_get_freq +ffffffff81a9a2d0 t skl_ddi_wrpll_get_freq +ffffffff81a9a430 t skl_ddi_pll_enable +ffffffff81a9a650 t skl_ddi_pll_disable +ffffffff81a9a6e0 t skl_ddi_pll_get_hw_state +ffffffff81a9a800 t hsw_compute_dpll +ffffffff81a9b020 t hsw_get_dpll +ffffffff81a9b170 t hsw_update_dpll_ref_clks +ffffffff81a9b1e0 t hsw_dump_hw_state +ffffffff81a9b210 t hsw_ddi_wrpll_enable +ffffffff81a9b290 t hsw_ddi_wrpll_disable +ffffffff81a9b370 t hsw_ddi_wrpll_get_hw_state +ffffffff81a9b410 t hsw_ddi_wrpll_get_freq +ffffffff81a9b500 t hsw_ddi_spll_enable +ffffffff81a9b560 t hsw_ddi_spll_disable +ffffffff81a9b630 t hsw_ddi_spll_get_hw_state +ffffffff81a9b6c0 t hsw_ddi_spll_get_freq +ffffffff81a9b760 t hsw_ddi_lcpll_enable +ffffffff81a9b790 t hsw_ddi_lcpll_disable +ffffffff81a9b7c0 t hsw_ddi_lcpll_get_hw_state +ffffffff81a9b7f0 t hsw_ddi_lcpll_get_freq +ffffffff81a9b870 t ibx_compute_dpll +ffffffff81a9b8a0 t ibx_get_dpll +ffffffff81a9b9a0 t ibx_dump_hw_state +ffffffff81a9ba00 t ibx_pch_dpll_enable +ffffffff81a9bbb0 t ibx_pch_dpll_disable +ffffffff81a9bc30 t ibx_pch_dpll_get_hw_state +ffffffff81a9c000 T intel_dpt_pin +ffffffff81a9c1e0 T intel_dpt_unpin +ffffffff81a9c250 T intel_dpt_resume +ffffffff81a9c320 T intel_dpt_suspend +ffffffff81a9c3f0 T intel_dpt_create +ffffffff81a9c7f0 t dpt_insert_page +ffffffff81a9c860 t dpt_clear_range +ffffffff81a9c890 t dpt_insert_entries +ffffffff81a9c980 t dpt_cleanup +ffffffff81a9c9d0 t dpt_bind_vma +ffffffff81a9ca60 t dpt_unbind_vma +ffffffff81a9ca90 T intel_dpt_destroy +ffffffff81a9cae0 T intel_dpt_configure +ffffffff81a9cc80 t __ww_mutex_lock +ffffffff81a9d000 T intel_drrs_type_str +ffffffff81a9d040 T intel_drrs_is_active +ffffffff81a9d070 T intel_drrs_activate +ffffffff81a9d260 T intel_drrs_deactivate +ffffffff81a9d420 T intel_drrs_invalidate +ffffffff81a9d440 t intel_drrs_frontbuffer_update +ffffffff81a9d690 T intel_drrs_flush +ffffffff81a9d6b0 T intel_drrs_crtc_init +ffffffff81a9d750 t intel_drrs_downclock_work +ffffffff81a9d870 T intel_drrs_crtc_debugfs_add +ffffffff81a9d8a0 T intel_drrs_connector_debugfs_add +ffffffff81a9d8b0 t __delayed_work_tick +ffffffff81a9e000 T intel_dsb_reg_write +ffffffff81a9e140 T intel_dsb_finish +ffffffff81a9e1c0 T intel_dsb_commit +ffffffff81a9e380 T intel_dsb_wait +ffffffff81a9e570 T intel_dsb_prepare +ffffffff81a9e6f0 T intel_dsb_cleanup +ffffffff81a9f000 T intel_dsi_wait_panel_power_cycle +ffffffff81a9f0f0 T intel_dsi_shutdown +ffffffff81a9f1e0 T intel_dsi_bitrate +ffffffff81a9f270 T intel_dsi_tlpx_ns +ffffffff81a9f2c0 T intel_dsi_get_modes +ffffffff81a9f2d0 T intel_dsi_mode_valid +ffffffff81a9f390 T intel_dsi_host_init +ffffffff81a9f440 T intel_dsi_get_panel_orientation +ffffffff81aa0000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81aa00a0 t dcs_setup_backlight +ffffffff81aa0120 t dcs_get_backlight +ffffffff81aa0210 t dcs_set_backlight +ffffffff81aa0300 t dcs_disable_backlight +ffffffff81aa0660 t dcs_enable_backlight +ffffffff81aa1000 T intel_dsi_vbt_exec_sequence +ffffffff81aa1020 T intel_dsi_log_params +ffffffff81aa13a0 T intel_dsi_vbt_init +ffffffff81aa1840 T intel_dsi_vbt_gpio_init +ffffffff81aa1860 T intel_dsi_vbt_gpio_cleanup +ffffffff81aa2000 T intel_dvo_init +ffffffff81aa2650 t intel_disable_dvo +ffffffff81aa26f0 t intel_enable_dvo +ffffffff81aa27c0 t intel_dvo_get_hw_state +ffffffff81aa2830 t intel_dvo_get_config +ffffffff81aa28d0 t intel_dvo_compute_config +ffffffff81aa2960 t intel_dvo_pre_enable +ffffffff81aa2a60 t intel_dvo_connector_get_hw_state +ffffffff81aa2af0 t intel_dvo_enc_destroy +ffffffff81aa2b30 t intel_dvo_detect +ffffffff81aa2c30 t intel_dvo_get_modes +ffffffff81aa2ca0 t intel_dvo_mode_valid +ffffffff81aa3000 T intel_fb_get_format_info +ffffffff81aa32b0 T intel_fb_is_tiled_modifier +ffffffff81aa32f0 t lookup_modifier +ffffffff81aa3530 T intel_fb_is_ccs_modifier +ffffffff81aa3570 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81aa35b0 T intel_fb_is_mc_ccs_modifier +ffffffff81aa35f0 T intel_fb_plane_get_modifiers +ffffffff81aa37d0 T intel_fb_plane_supports_modifier +ffffffff81aa3850 T intel_format_info_is_yuv_semiplanar +ffffffff81aa38d0 T intel_fb_is_ccs_aux_plane +ffffffff81aa3980 T intel_fb_rc_ccs_cc_plane +ffffffff81aa3a50 T is_surface_linear +ffffffff81aa3bb0 T main_to_ccs_plane +ffffffff81aa3c60 T skl_ccs_to_main_plane +ffffffff81aa3da0 T skl_main_to_aux_plane +ffffffff81aa3ec0 T intel_tile_size +ffffffff81aa3f00 T intel_tile_width_bytes +ffffffff81aa4320 T intel_tile_height +ffffffff81aa4380 T intel_tile_row_size +ffffffff81aa4400 T intel_fb_align_height +ffffffff81aa4480 T intel_fb_modifier_uses_dpt +ffffffff81aa44c0 T intel_fb_uses_dpt +ffffffff81aa4520 T intel_cursor_alignment +ffffffff81aa4580 T intel_surf_alignment +ffffffff81aa4810 T intel_fb_plane_get_subsampling +ffffffff81aa4960 T intel_plane_adjust_aligned_offset +ffffffff81aa49d0 t intel_adjust_aligned_offset +ffffffff81aa4b80 T intel_plane_compute_aligned_offset +ffffffff81aa4c80 t intel_compute_aligned_offset +ffffffff81aa4e40 T intel_fb_needs_pot_stride_remap +ffffffff81aa4eb0 T intel_fb_supports_90_270_rotation +ffffffff81aa4f10 T intel_fill_fb_info +ffffffff81aa5a10 t calc_plane_remap_info +ffffffff81aa63c0 T intel_fb_fill_view +ffffffff81aa6430 T intel_plane_compute_gtt +ffffffff81aa6910 t intel_plane_check_stride +ffffffff81aa6a70 T intel_framebuffer_init +ffffffff81aa72f0 t gen12_ccs_aux_stride +ffffffff81aa7350 T intel_user_framebuffer_create +ffffffff81aa74b0 T intel_framebuffer_create +ffffffff81aa7540 t intel_adjust_tile_offset +ffffffff81aa7680 t intel_user_framebuffer_destroy +ffffffff81aa76f0 t intel_user_framebuffer_create_handle +ffffffff81aa7720 t intel_user_framebuffer_dirty +ffffffff81aa8000 T intel_pin_and_fence_fb_obj +ffffffff81aa8330 t i915_gem_object_lock +ffffffff81aa8550 T intel_unpin_fb_vma +ffffffff81aa85c0 T intel_plane_pin_fb +ffffffff81aa8930 T intel_plane_unpin_fb +ffffffff81aa9000 T intel_fbc_cleanup +ffffffff81aa91c0 T intel_fbc_pre_update +ffffffff81aa9850 T intel_fbc_post_update +ffffffff81aa9a00 T intel_fbc_invalidate +ffffffff81aa9b80 T intel_fbc_flush +ffffffff81aa9e20 T intel_fbc_atomic_check +ffffffff81aaa3e0 T intel_fbc_disable +ffffffff81aaa4a0 t __intel_fbc_disable +ffffffff81aaa5e0 T intel_fbc_update +ffffffff81aaaca0 T intel_fbc_reset_underrun +ffffffff81aaae00 T intel_fbc_handle_fifo_underrun_irq +ffffffff81aaaec0 T intel_fbc_add_plane +ffffffff81aaaef0 T intel_fbc_init +ffffffff81aab170 T intel_fbc_sanitize +ffffffff81aab240 T intel_fbc_crtc_debugfs_add +ffffffff81aab270 T intel_fbc_debugfs_register +ffffffff81aab2a0 t intel_fbc_is_ok +ffffffff81aab410 t intel_fbc_update_state +ffffffff81aab790 t intel_fbc_underrun_work_fn +ffffffff81aab860 t ivb_fbc_activate +ffffffff81aabab0 t ilk_fbc_deactivate +ffffffff81aabb60 t ilk_fbc_is_active +ffffffff81aabbc0 t ivb_fbc_is_compressing +ffffffff81aabc30 t snb_fbc_nuke +ffffffff81aabcb0 t ilk_fbc_program_cfb +ffffffff81aabd10 t ivb_fbc_set_false_color +ffffffff81aabd90 t snb_fbc_activate +ffffffff81aabe20 t ilk_fbc_is_compressing +ffffffff81aabe90 t ilk_fbc_activate +ffffffff81aabfc0 t i965_fbc_nuke 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intel_set_pch_fifo_underrun_reporting +ffffffff81ab3600 T intel_cpu_fifo_underrun_irq_handler +ffffffff81ab37f0 T intel_pch_fifo_underrun_irq_handler +ffffffff81ab3870 T intel_check_cpu_fifo_underruns +ffffffff81ab3a80 T intel_check_pch_fifo_underruns +ffffffff81ab3bb0 T intel_init_fifo_underrun_reporting +ffffffff81ab4000 T intel_frontbuffer_flip_prepare +ffffffff81ab4050 T intel_frontbuffer_flip_complete +ffffffff81ab4130 T intel_frontbuffer_flip +ffffffff81ab4200 T __intel_fb_invalidate +ffffffff81ab4290 T __intel_fb_flush +ffffffff81ab4380 T intel_frontbuffer_get +ffffffff81ab44c0 t frontbuffer_active +ffffffff81ab44f0 t frontbuffer_retire +ffffffff81ab4530 T intel_frontbuffer_put +ffffffff81ab4660 T intel_frontbuffer_track +ffffffff81ab5000 T intel_atomic_global_obj_init +ffffffff81ab5070 T intel_atomic_global_obj_cleanup +ffffffff81ab5160 T intel_atomic_get_global_obj_state +ffffffff81ab53b0 T intel_atomic_get_old_global_obj_state +ffffffff81ab5410 T intel_atomic_get_new_global_obj_state +ffffffff81ab5470 T intel_atomic_swap_global_state +ffffffff81ab55b0 T intel_atomic_clear_global_state +ffffffff81ab56d0 T intel_atomic_lock_global_state +ffffffff81ab5760 T intel_atomic_serialize_global_state +ffffffff81ab57f0 T intel_atomic_global_state_is_serialized +ffffffff81ab6000 T intel_gmbus_is_valid_pin +ffffffff81ab6100 T intel_gmbus_reset +ffffffff81ab6160 T intel_bb_set_bits +ffffffff81ab62a0 T intel_bb_set_dir +ffffffff81ab62d0 T intel_bb_read_bits +ffffffff81ab6460 T intel_acquire_bus +ffffffff81ab6660 T intel_release_bus +ffffffff81ab6800 T intel_send_start +ffffffff81ab6820 T intel_send_stop +ffffffff81ab6840 T intel_initiate_xfer +ffffffff81ab6860 T intel_read_byte +ffffffff81ab6880 T intel_write_byte +ffffffff81ab68a0 T intel_gmbus_output_aksv +ffffffff81ab6970 t do_gmbus_xfer +ffffffff81ab6f70 T intel_gmbus_setup +ffffffff81ab72f0 T intel_gmbus_teardown +ffffffff81ab7370 T intel_gmbus_get_adapter +ffffffff81ab73f0 T intel_gmbus_force_bit +ffffffff81ab7490 T intel_gmbus_is_forced_bit +ffffffff81ab74c0 T intel_gmbus_irq_handler +ffffffff81ab7560 t gmbus_xfer_read +ffffffff81ab7850 t gmbus_xfer_write +ffffffff81ab7a90 t gmbus_wait +ffffffff81ab7e80 t gmbus_wait_idle +ffffffff81ab8010 t gmbus_xfer +ffffffff81ab80f0 t gmbus_func +ffffffff81ab8130 t gmbus_lock_bus +ffffffff81ab8150 t gmbus_trylock_bus +ffffffff81ab81b0 t gmbus_unlock_bus +ffffffff81ab9000 T intel_hdcp_capable +ffffffff81ab90a0 t intel_hdcp_read_valid_bksv +ffffffff81ab9330 T intel_hdcp2_capable +ffffffff81ab9450 T is_hdcp_supported +ffffffff81ab94a0 T intel_hdcp_component_init +ffffffff81ab9500 T intel_hdcp_init +ffffffff81ab9680 t intel_hdcp_check_work +ffffffff81abbff0 t intel_hdcp_prop_work +ffffffff81abc070 T intel_hdcp_enable +ffffffff81abc0c0 T intel_hdcp_disable +ffffffff81abc1f0 t intel_hdcp_update_value +ffffffff81abc3b0 t _intel_hdcp2_disable +ffffffff81abc7a0 t _intel_hdcp_disable +ffffffff81abca90 T intel_hdcp_update_pipe +ffffffff81abcc00 T intel_hdcp_component_fini +ffffffff81abcca0 T intel_hdcp_cleanup +ffffffff81abcde0 T intel_hdcp_atomic_check +ffffffff81abce70 T intel_hdcp_handle_cp_irq +ffffffff81abcf70 t __delayed_work_tick +ffffffff81abcf90 t hdcp2_authenticate_repeater_topology +ffffffff81abd250 t transcoder_name +ffffffff81abd290 t intel_hdcp_get_repeater_ctl +ffffffff81abd360 t ktime_get_raw +ffffffff81abd3e0 t wait_remaining_ms_from_jiffies +ffffffff81abd470 t intel_hdcp_auth_downstream +ffffffff81abe650 t intel_write_sha_text +ffffffff81abf000 T intel_hdcp_gsc_cs_required +ffffffff81abf040 T intel_hdcp_gsc_init +ffffffff81abf4c0 T intel_hdcp_gsc_fini +ffffffff81abf520 T intel_hdcp_gsc_msg_send +ffffffff81abf860 t gsc_hdcp_initiate_session +ffffffff81abf8b0 t gsc_hdcp_verify_receiver_cert_prepare_km +ffffffff81abf900 t gsc_hdcp_verify_hprime +ffffffff81abf950 t gsc_hdcp_store_pairing_info +ffffffff81abf9a0 t gsc_hdcp_initiate_locality_check +ffffffff81abf9f0 t gsc_hdcp_verify_lprime +ffffffff81abfa40 t gsc_hdcp_get_session_key +ffffffff81abfa90 t gsc_hdcp_repeater_check_flow_prepare_ack +ffffffff81abfae0 t gsc_hdcp_verify_mprime +ffffffff81abfb30 t gsc_hdcp_enable_authentication +ffffffff81abfb80 t gsc_hdcp_close_session +ffffffff81ac0000 T intel_hdmi_to_i915 +ffffffff81ac0040 T hsw_write_infoframe +ffffffff81ac0450 t hsw_dip_data_reg +ffffffff81ac0600 T hsw_read_infoframe +ffffffff81ac06c0 T intel_hdmi_infoframe_enable +ffffffff81ac0760 T intel_hdmi_infoframes_enabled +ffffffff81ac0880 T intel_read_infoframe +ffffffff81ac0a20 T intel_hdmi_read_gcp_infoframe +ffffffff81ac0b00 T intel_dp_dual_mode_set_tmds_output +ffffffff81ac0bc0 T intel_hdmi_tmds_clock +ffffffff81ac0c10 T intel_hdmi_bpc_possible +ffffffff81ac0d30 T intel_hdmi_limited_color_range +ffffffff81ac0da0 T intel_hdmi_compute_has_hdmi_sink +ffffffff81ac0e10 T intel_hdmi_compute_config +ffffffff81ac13c0 t intel_hdmi_compute_output_format +ffffffff81ac1520 t intel_hdmi_compute_hdmi_infoframe +ffffffff81ac15e0 t intel_hdmi_compute_drm_infoframe +ffffffff81ac16d0 T intel_hdmi_encoder_shutdown +ffffffff81ac17a0 T intel_hdmi_handle_sink_scrambling +ffffffff81ac1890 T intel_infoframe_init +ffffffff81ac1a30 t vlv_write_infoframe +ffffffff81ac1d60 t vlv_read_infoframe +ffffffff81ac1ee0 t vlv_set_infoframes +ffffffff81ac2220 t vlv_infoframes_enabled +ffffffff81ac22b0 t g4x_write_infoframe +ffffffff81ac2550 t g4x_read_infoframe +ffffffff81ac2680 t g4x_set_infoframes +ffffffff81ac2910 t g4x_infoframes_enabled +ffffffff81ac2990 t hsw_set_infoframes +ffffffff81ac2c20 t hsw_infoframes_enabled +ffffffff81ac2cb0 t ibx_write_infoframe +ffffffff81ac2fc0 t ibx_read_infoframe +ffffffff81ac3130 t ibx_set_infoframes +ffffffff81ac3460 t ibx_infoframes_enabled +ffffffff81ac34f0 t cpt_write_infoframe +ffffffff81ac37f0 t cpt_read_infoframe +ffffffff81ac3960 t cpt_set_infoframes +ffffffff81ac3c40 t cpt_infoframes_enabled +ffffffff81ac3cb0 T intel_hdmi_init_connector +ffffffff81ac4430 T intel_hdmi_dsc_get_slice_height +ffffffff81ac4490 T intel_hdmi_dsc_get_num_slices +ffffffff81ac4610 T intel_hdmi_dsc_get_bpp +ffffffff81ac46f0 t intel_hdmi_compute_clock +ffffffff81ac4950 t hdmi_port_clock_valid +ffffffff81ac4b70 t intel_write_infoframe +ffffffff81ac4d40 t intel_hdmi_detect +ffffffff81ac4ee0 t intel_hdmi_force +ffffffff81ac4f80 t intel_hdmi_connector_register +ffffffff81ac4f90 t intel_hdmi_connector_unregister +ffffffff81ac4fa0 t intel_hdmi_set_edid +ffffffff81ac5230 t intel_hdmi_get_modes +ffffffff81ac5240 t intel_hdmi_mode_valid +ffffffff81ac53f0 t intel_hdmi_connector_atomic_check +ffffffff81ac5420 t intel_hdmi_mode_clock_valid +ffffffff81ac55c0 t intel_hdmi_hdcp_write_an_aksv +ffffffff81ac5700 t intel_hdmi_hdcp_read_bksv +ffffffff81ac57d0 t intel_hdmi_hdcp_read_bstatus +ffffffff81ac58a0 t intel_hdmi_hdcp_repeater_present +ffffffff81ac5980 t intel_hdmi_hdcp_read_ri_prime +ffffffff81ac5a50 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81ac5b30 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81ac5c00 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81ac5cf0 t intel_hdmi_hdcp_toggle_signalling +ffffffff81ac5f70 t intel_hdmi_hdcp_check_link +ffffffff81ac6290 t intel_hdmi_hdcp2_capable +ffffffff81ac6350 t intel_hdmi_hdcp2_write_msg +ffffffff81ac6440 t intel_hdmi_hdcp2_read_msg +ffffffff81ac6840 t intel_hdmi_hdcp2_check_link +ffffffff81ac7000 T intel_hpd_pin_default +ffffffff81ac7030 T intel_encoder_hotplug +ffffffff81ac7160 T intel_hpd_trigger_irq +ffffffff81ac71d0 T intel_hpd_irq_handler +ffffffff81ac75f0 T intel_hpd_init +ffffffff81ac7700 T intel_hpd_poll_enable +ffffffff81ac7780 T intel_hpd_poll_disable +ffffffff81ac77e0 T intel_hpd_init_early +ffffffff81ac78f0 t i915_hotplug_work_func +ffffffff81ac7cd0 t i915_digport_work_func +ffffffff81ac7e50 t i915_hpd_poll_init_work +ffffffff81ac7f50 t intel_hpd_irq_storm_reenable_work +ffffffff81ac8270 T intel_hpd_cancel_work +ffffffff81ac8390 T intel_hpd_disable +ffffffff81ac8420 T intel_hpd_enable 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xelpdp_hpd_enable_detection +ffffffff81acb1f0 t gen11_hpd_irq_setup +ffffffff81acb440 t gen11_hpd_enable_detection +ffffffff81acb640 t bxt_hpd_irq_setup +ffffffff81acb7c0 t bxt_hpd_enable_detection +ffffffff81acb8a0 t spt_hpd_irq_setup +ffffffff81acbac0 t spt_hpd_enable_detection +ffffffff81acbbe0 t ilk_hpd_irq_setup +ffffffff81acbe50 t ilk_hpd_enable_detection +ffffffff81acc000 T intel_hti_init +ffffffff81acc070 T intel_hti_uses_phy +ffffffff81acc110 T intel_hti_dpll_mask +ffffffff81acd000 T intel_load_detect_get_pipe +ffffffff81acd370 t intel_modeset_disable_planes +ffffffff81acd430 T intel_load_detect_release_pipe +ffffffff81ace000 T intel_lpe_audio_irq_handler +ffffffff81ace020 T intel_lpe_audio_init +ffffffff81ace050 T intel_lpe_audio_teardown +ffffffff81ace070 T intel_lpe_audio_notify +ffffffff81acf000 T lspcon_detect_hdr_capability +ffffffff81acf0b0 T lspcon_write_infoframe +ffffffff81acf820 T lspcon_read_infoframe +ffffffff81acf860 T lspcon_set_infoframes +ffffffff81acfac0 T lspcon_infoframes_enabled +ffffffff81acfca0 T lspcon_wait_pcon_mode +ffffffff81acfcc0 t lspcon_wait_mode +ffffffff81acff80 T lspcon_init +ffffffff81ad0390 T intel_lspcon_infoframes_enabled +ffffffff81ad03c0 T lspcon_resume +ffffffff81ad0660 t lspcon_change_mode +ffffffff81ad1000 T intel_lvds_port_enabled +ffffffff81ad1080 T intel_get_lvds_encoder +ffffffff81ad10e0 T intel_is_dual_link_lvds +ffffffff81ad1140 T intel_lvds_init +ffffffff81ad17e0 t intel_enable_lvds +ffffffff81ad1920 t intel_pre_enable_lvds +ffffffff81ad1c00 t intel_lvds_compute_config +ffffffff81ad1d60 t pch_disable_lvds +ffffffff81ad1d80 t pch_post_disable_lvds +ffffffff81ad1da0 t gmch_disable_lvds +ffffffff81ad1dd0 t intel_lvds_get_hw_state +ffffffff81ad1e90 t intel_lvds_get_config +ffffffff81ad1fa0 t intel_lvds_shutdown +ffffffff81ad2040 t compute_is_dual_link_lvds +ffffffff81ad2110 t intel_no_lvds_dmi_callback +ffffffff81ad2160 t intel_disable_lvds +ffffffff81ad2290 t intel_lvds_get_modes +ffffffff81ad22e0 t intel_lvds_mode_valid +ffffffff81ad2380 t intel_dual_link_lvds_callback +ffffffff81ad3000 T _intel_modeset_lock_begin +ffffffff81ad3060 T _intel_modeset_lock_loop +ffffffff81ad30a0 T _intel_modeset_lock_end +ffffffff81ad4000 T intel_modeset_setup_hw_state +ffffffff81ad52d0 t intel_crtc_disable_noatomic +ffffffff81ad58b0 t intel_crtc_disable_noatomic_begin +ffffffff81ad6000 T intel_modeset_verify_crtc +ffffffff81ad6560 t verify_connector_state +ffffffff81ad6a00 T intel_modeset_verify_disabled +ffffffff81ad7000 T intel_opregion_notify_encoder +ffffffff81ad7180 t swsci +ffffffff81ad74b0 T intel_opregion_notify_adapter +ffffffff81ad7510 T intel_opregion_asle_intr +ffffffff81ad7560 T intel_opregion_setup +ffffffff81ad7d80 t asle_work +ffffffff81ad81f0 T intel_opregion_get_panel_type +ffffffff81ad82e0 T intel_opregion_get_edid +ffffffff81ad83a0 T intel_opregion_headless_sku +ffffffff81ad83f0 T intel_opregion_register +ffffffff81ad8490 T intel_opregion_resume +ffffffff81ad8530 T intel_opregion_suspend +ffffffff81ad85e0 T intel_opregion_unregister +ffffffff81ad86b0 T intel_opregion_cleanup +ffffffff81ad87a0 t intel_no_opregion_vbt_callback +ffffffff81ad8800 t intel_use_opregion_panel_type_callback +ffffffff81ad9000 T intel_overlay_reset +ffffffff81ad9050 T intel_overlay_switch_off +ffffffff81ad9250 t intel_overlay_release_old_vid +ffffffff81ad93f0 T intel_overlay_put_image_ioctl +ffffffff81ad9700 t update_pfit_vscale_ratio +ffffffff81ad97d0 t check_overlay_dst +ffffffff81ad98a0 t check_overlay_src +ffffffff81ad9af0 t intel_overlay_do_put_image +ffffffff81ada670 T intel_overlay_attrs_ioctl +ffffffff81ada990 t check_gamma +ffffffff81adab80 T intel_overlay_setup +ffffffff81adadf0 t intel_overlay_last_flip_retire +ffffffff81adae30 T intel_overlay_cleanup +ffffffff81adaef0 T intel_overlay_capture_error_state +ffffffff81adafe0 T intel_overlay_print_error_state +ffffffff81adb3b0 t intel_overlay_release_old_vid_tail +ffffffff81adb480 t intel_overlay_off_tail +ffffffff81adb630 t intel_overlay_flip_prepare +ffffffff81adc000 T intel_panel_use_ssc +ffffffff81adc060 T intel_panel_preferred_fixed_mode +ffffffff81adc0b0 T intel_panel_fixed_mode +ffffffff81adc210 T intel_panel_downclock_mode +ffffffff81adc300 T intel_panel_highest_mode +ffffffff81adc360 T intel_panel_get_modes +ffffffff81adc3f0 T intel_panel_drrs_type +ffffffff81adc420 T intel_panel_compute_config +ffffffff81adc590 T intel_panel_add_edid_fixed_modes +ffffffff81adcac0 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81adcb20 t intel_panel_add_fixed_mode +ffffffff81adcca0 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81adcd10 T intel_panel_add_encoder_fixed_mode +ffffffff81adcd50 T intel_panel_fitting +ffffffff81add3b0 T intel_panel_detect +ffffffff81add440 T intel_panel_mode_valid +ffffffff81add4d0 T intel_panel_init_alloc +ffffffff81add520 T intel_panel_init +ffffffff81add640 T intel_panel_fini +ffffffff81ade000 T intel_has_pch_trancoder +ffffffff81ade060 T intel_crtc_pch_transcoder +ffffffff81ade0a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81ade0f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81ade140 T ilk_pch_pre_enable +ffffffff81ade170 T ilk_pch_enable +ffffffff81ade750 t ilk_pch_transcoder_set_timings +ffffffff81ade9b0 T ilk_pch_disable +ffffffff81ade9d0 T ilk_pch_post_disable +ffffffff81adedb0 T ilk_pch_get_config +ffffffff81adef70 T lpt_pch_enable +ffffffff81adf1e0 T lpt_pch_disable +ffffffff81adf2f0 T lpt_pch_get_config +ffffffff81adf3c0 T intel_pch_sanitize +ffffffff81adf6a0 t assert_pch_dp_disabled +ffffffff81adf820 t assert_pch_hdmi_disabled +ffffffff81ae0000 T lpt_disable_iclkip +ffffffff81ae0070 T lpt_iclkip +ffffffff81ae0100 T lpt_program_iclkip +ffffffff81ae0390 T lpt_get_iclkip +ffffffff81ae04a0 T lpt_disable_clkout_dp +ffffffff81ae0580 T intel_init_pch_refclk +ffffffff81ae2000 T intel_crtc_initial_plane_config +ffffffff81ae3000 T intel_pmdemand_init +ffffffff81ae3120 T intel_pmdemand_init_early +ffffffff81ae31a0 T intel_pmdemand_update_phys_mask +ffffffff81ae3240 T intel_pmdemand_update_port_clock +ffffffff81ae3280 T intel_pmdemand_atomic_check +ffffffff81ae3620 t intel_pmdemand_update_max_ddiclk +ffffffff81ae36f0 t intel_pmdemand_update_active_non_tc_phys +ffffffff81ae38f0 T intel_pmdemand_init_pmdemand_params +ffffffff81ae3ac0 T intel_pmdemand_program_dbuf +ffffffff81ae3c50 t intel_pmdemand_wait +ffffffff81ae3e40 T intel_pmdemand_pre_plane_update +ffffffff81ae3f30 t intel_pmdemand_program_params +ffffffff81ae4370 T intel_pmdemand_post_plane_update +ffffffff81ae4450 t intel_pmdemand_duplicate_state +ffffffff81ae44e0 t intel_pmdemand_destroy_state +ffffffff81ae5000 T intel_pps_lock +ffffffff81ae5060 T intel_pps_unlock +ffffffff81ae50c0 T intel_pps_reset_all +ffffffff81ae5210 T intel_pps_check_power_unlocked +ffffffff81ae54f0 t pps_name +ffffffff81ae5590 T intel_pps_wait_power_cycle +ffffffff81ae5630 t wait_panel_power_cycle +ffffffff81ae5810 T intel_pps_vdd_on_unlocked +ffffffff81ae5d80 T intel_pps_vdd_on +ffffffff81ae5f10 T intel_pps_vdd_off_sync +ffffffff81ae5fe0 t intel_pps_vdd_off_sync_unlocked +ffffffff81ae6400 T intel_pps_vdd_off_unlocked +ffffffff81ae65b0 T intel_pps_on_unlocked +ffffffff81ae6a40 T intel_pps_on +ffffffff81ae6ae0 T intel_pps_off_unlocked +ffffffff81ae6ec0 T intel_pps_off +ffffffff81ae6f60 T intel_pps_backlight_on +ffffffff81ae7150 T intel_pps_backlight_off +ffffffff81ae7340 T intel_pps_backlight_power +ffffffff81ae7530 T vlv_pps_init +ffffffff81ae7710 t vlv_detach_power_sequencer +ffffffff81ae78e0 t vlv_steal_power_sequencer +ffffffff81ae7a10 t pps_init_delays +ffffffff81ae7eb0 t pps_init_registers +ffffffff81ae8240 T intel_pps_have_panel_power_or_vdd +ffffffff81ae8390 T intel_pps_encoder_reset +ffffffff81ae8530 t vlv_initial_power_sequencer_setup +ffffffff81ae8840 t pps_vdd_init +ffffffff81ae89f0 T intel_pps_init +ffffffff81ae8e60 t edp_panel_vdd_work +ffffffff81ae8f10 T intel_pps_init_late +ffffffff81ae9150 T intel_pps_unlock_regs_wa +ffffffff81ae9260 T intel_pps_setup +ffffffff81ae92d0 T assert_pps_unlocked +ffffffff81ae9560 t intel_pps_get_registers +ffffffff81ae9d70 t wait_panel_status +ffffffff81aea190 t intel_pps_readout_hw_state +ffffffff81aea340 t __delayed_work_tick +ffffffff81aeb000 T intel_psr_irq_handler +ffffffff81aeb650 t transcoder_name +ffffffff81aeb690 T intel_psr_init_dpcd +ffffffff81aeb930 T intel_psr_compute_config +ffffffff81aebb10 t intel_psr2_config_valid +ffffffff81aebf80 T intel_psr_get_config +ffffffff81aec120 T intel_psr_disable +ffffffff81aec230 t intel_psr_disable_locked +ffffffff81aec5c0 T intel_psr_pause +ffffffff81aec7c0 t intel_psr_exit +ffffffff81aeca70 T intel_psr_resume +ffffffff81aecb00 t intel_psr_activate +ffffffff81aed230 T intel_psr2_disable_plane_sel_fetch_arm +ffffffff81aed2a0 T intel_psr2_program_plane_sel_fetch_arm +ffffffff81aed340 T intel_psr2_program_plane_sel_fetch_noarm +ffffffff81aed4b0 T intel_psr2_program_trans_man_trk_ctl +ffffffff81aed5a0 T intel_psr2_sel_fetch_update +ffffffff81aedcf0 T intel_psr_pre_plane_update +ffffffff81aedec0 t wm_optimization_wa +ffffffff81aee050 T intel_psr_post_plane_update +ffffffff81aeec80 T intel_psr_wait_for_idle_locked +ffffffff81aeee50 T intel_psr_debug_set +ffffffff81aef170 T intel_psr_invalidate +ffffffff81aef3b0 T intel_psr_flush +ffffffff81aef7e0 T intel_psr_init +ffffffff81aef910 t intel_psr_work +ffffffff81aefab0 t tgl_dc3co_disable_work +ffffffff81aefb00 T intel_psr_short_pulse +ffffffff81aefed0 T intel_psr_enabled +ffffffff81aeff50 T intel_psr_lock +ffffffff81af0010 T intel_psr_unlock +ffffffff81af00d0 T intel_psr_debugfs_register +ffffffff81af0100 T intel_psr_connector_debugfs_add +ffffffff81af0130 t _compute_psr2_sdp_prior_scanline_indication +ffffffff81af01f0 t _compute_psr2_wake_times +ffffffff81af02e0 t intel_psr2_sel_fetch_config_valid +ffffffff81af0370 t psr2_granularity_check +ffffffff81af0460 t tgl_psr2_disable_dc3co +ffffffff81af0570 t __delayed_work_tick +ffffffff81af1000 T intel_lookup_range_min_qp +ffffffff81af1110 T intel_lookup_range_max_qp +ffffffff81af2000 T intel_init_quirks +ffffffff81af20f0 T intel_has_quirk +ffffffff81af2130 t quirk_ssc_force_disable +ffffffff81af2160 t quirk_invert_brightness +ffffffff81af2190 t quirk_backlight_present +ffffffff81af21c0 t quirk_increase_t12_delay +ffffffff81af21f0 t quirk_increase_ddi_disabled_time +ffffffff81af2220 t intel_dmi_reverse_brightness +ffffffff81af2270 t intel_dmi_no_pps_backlight +ffffffff81af3000 T intel_sdvo_port_enabled +ffffffff81af30a0 T intel_sdvo_init +ffffffff81af4030 t intel_sdvo_compute_config +ffffffff81af43f0 t pch_disable_sdvo +ffffffff81af4420 t pch_post_disable_sdvo +ffffffff81af4430 t intel_disable_sdvo +ffffffff81af45a0 t intel_sdvo_pre_enable +ffffffff81af4f20 t intel_enable_sdvo +ffffffff81af50f0 t intel_sdvo_get_hw_state +ffffffff81af51e0 t intel_sdvo_get_config +ffffffff81af5600 t intel_sdvo_set_target_input +ffffffff81af5670 t intel_sdvo_get_input_pixel_clock_range +ffffffff81af5710 t intel_sdvo_ddc_proxy_xfer +ffffffff81af57c0 t intel_sdvo_ddc_proxy_func +ffffffff81af57f0 t __intel_sdvo_write_cmd +ffffffff81af5ca0 t proxy_lock_bus +ffffffff81af5cd0 t proxy_trylock_bus +ffffffff81af5d00 t proxy_unlock_bus +ffffffff81af5d30 t intel_sdvo_enc_destroy +ffffffff81af5d40 t intel_sdvo_set_output_timings_from_mode +ffffffff81af5e40 t intel_sdvo_get_preferred_input_mode +ffffffff81af61d0 t intel_sdvo_get_dtd_from_mode +ffffffff81af6350 t intel_sdvo_read_response +ffffffff81af67f0 t intel_sdvo_get_value +ffffffff81af6860 t intel_sdvo_write_sdvox +ffffffff81af6a50 t intel_sdvo_write_infoframe +ffffffff81af6c10 t intel_sdvo_read_infoframe +ffffffff81af6e30 t intel_sdvo_hotplug +ffffffff81af6e70 t intel_sdvo_connector_get_hw_state +ffffffff81af6f00 t intel_sdvo_detect +ffffffff81af71f0 t intel_sdvo_connector_register +ffffffff81af7200 t intel_sdvo_connector_unregister +ffffffff81af7210 t intel_sdvo_connector_duplicate_state +ffffffff81af7290 t intel_sdvo_connector_atomic_set_property +ffffffff81af7460 t intel_sdvo_connector_atomic_get_property +ffffffff81af7680 t intel_sdvo_get_analog_edid +ffffffff81af76b0 t intel_sdvo_connector_matches_edid +ffffffff81af7740 t intel_sdvo_get_modes +ffffffff81af79e0 t intel_sdvo_mode_valid +ffffffff81af7af0 t intel_sdvo_atomic_check +ffffffff81af7ba0 t intel_sdvo_create_enhance_property +ffffffff81af9000 T intel_snps_phy_wait_for_calibration +ffffffff81af90d0 T intel_snps_phy_update_psr_power_state +ffffffff81af9190 T intel_snps_phy_set_signal_levels +ffffffff81af93e0 T intel_mpllb_calc_state +ffffffff81af9570 T intel_snps_phy_check_hdmi_link_rate +ffffffff81af9610 T intel_mpllb_enable +ffffffff81af9850 T intel_mpllb_disable +ffffffff81af99c0 T intel_mpllb_calc_port_clock +ffffffff81af9a90 T intel_mpllb_readout_hw_state +ffffffff81af9c00 T intel_mpllb_state_verify +ffffffff81afb000 T vlv_plane_min_cdclk +ffffffff81afb0f0 T ivb_plane_min_cdclk +ffffffff81afb1b0 T hsw_plane_min_cdclk +ffffffff81afb250 T chv_plane_check_rotation +ffffffff81afb2c0 T intel_sprite_plane_create +ffffffff81afb610 t vlv_sprite_update_noarm +ffffffff81afb710 t vlv_sprite_update_arm +ffffffff81afbdb0 t vlv_sprite_disable_arm +ffffffff81afbe40 t vlv_sprite_get_hw_state +ffffffff81afbf10 t vlv_sprite_check +ffffffff81afbfe0 t ivb_sprite_update_noarm +ffffffff81afc150 t ivb_sprite_update_arm +ffffffff81afc520 t ivb_sprite_disable_arm +ffffffff81afc5d0 t ivb_sprite_get_hw_state +ffffffff81afc690 t g4x_sprite_check +ffffffff81afc930 t hsw_sprite_max_stride +ffffffff81afc980 t g4x_sprite_max_stride +ffffffff81afc9f0 t ivb_sprite_min_cdclk +ffffffff81afcb30 t g4x_sprite_update_noarm +ffffffff81afcc90 t g4x_sprite_update_arm +ffffffff81afd0d0 t g4x_sprite_disable_arm +ffffffff81afd180 t g4x_sprite_get_hw_state +ffffffff81afd240 t g4x_sprite_min_cdclk +ffffffff81afd310 t vlv_sprite_ctl +ffffffff81afd500 t vlv_sprite_format_mod_supported +ffffffff81afd630 t ivb_sprite_ctl +ffffffff81afd860 t g4x_sprite_ctl +ffffffff81afda20 t snb_sprite_format_mod_supported +ffffffff81afdb10 t g4x_sprite_format_mod_supported +ffffffff81afe000 T intel_sprite_set_colorkey_ioctl +ffffffff81aff000 T intel_tc_port_in_tbt_alt_mode +ffffffff81aff070 T intel_tc_port_in_dp_alt_mode +ffffffff81aff0e0 T intel_tc_port_in_legacy_mode +ffffffff81aff150 T intel_tc_cold_requires_aux_pw +ffffffff81aff1c0 T intel_tc_port_get_lane_mask +ffffffff81aff2f0 T intel_tc_port_get_pin_assignment_mask +ffffffff81aff420 T intel_tc_port_fia_max_lane_count +ffffffff81aff600 T intel_tc_port_set_fia_lane_count +ffffffff81aff7d0 T intel_tc_port_init_mode +ffffffff81affa10 t intel_tc_port_update_mode +ffffffff81affdc0 T intel_tc_port_sanitize_mode +ffffffff81b00100 T intel_tc_port_connected_locked +ffffffff81b00260 T intel_tc_port_ref_held +ffffffff81b002c0 T intel_tc_port_connected +ffffffff81b00330 T intel_tc_port_link_needs_reset +ffffffff81b003e0 T intel_tc_port_link_reset +ffffffff81b004e0 T intel_tc_port_link_cancel_reset_work +ffffffff81b00590 T intel_tc_port_lock +ffffffff81b005b0 t __intel_tc_port_lock +ffffffff81b006f0 T intel_tc_port_suspend +ffffffff81b00750 T intel_tc_port_unlock +ffffffff81b007d0 T intel_tc_port_get_link +ffffffff81b00860 T intel_tc_port_put_link +ffffffff81b00910 T intel_tc_port_init +ffffffff81b00b50 t kasprintf +ffffffff81b00c20 t intel_tc_port_disconnect_phy_work +ffffffff81b00c70 t intel_tc_port_link_reset_work +ffffffff81b00f70 T intel_tc_port_cleanup +ffffffff81b01030 t intel_tc_port_needs_reset +ffffffff81b01130 t tgl_tc_phy_cold_off_domain +ffffffff81b01160 t xelpdp_tc_phy_hpd_live_status +ffffffff81b01270 t adlp_tc_phy_is_ready +ffffffff81b01370 t xelpdp_tc_phy_is_owned +ffffffff81b01440 t xelpdp_tc_phy_get_hw_state +ffffffff81b015c0 t xelpdp_tc_phy_connect +ffffffff81b01810 t xelpdp_tc_phy_disconnect +ffffffff81b01950 t adlp_tc_phy_init +ffffffff81b019c0 t tc_phy_get_current_mode +ffffffff81b01ce0 t tc_phy_wait_for_ready +ffffffff81b01e50 t xelpdp_tc_phy_enable_tcss_power +ffffffff81b020a0 t tc_phy_verify_legacy_or_dp_alt_mode +ffffffff81b02280 t xelpdp_tc_phy_wait_for_tcss_power +ffffffff81b02490 t adlp_tc_phy_cold_off_domain +ffffffff81b024f0 t adlp_tc_phy_hpd_live_status +ffffffff81b025f0 t adlp_tc_phy_is_owned +ffffffff81b026b0 t adlp_tc_phy_get_hw_state +ffffffff81b02740 t adlp_tc_phy_connect +ffffffff81b02a30 t adlp_tc_phy_disconnect +ffffffff81b02b90 t icl_tc_phy_hpd_live_status +ffffffff81b02cf0 t icl_tc_phy_is_ready +ffffffff81b02e00 t icl_tc_phy_is_owned +ffffffff81b02f10 t icl_tc_phy_get_hw_state +ffffffff81b02fa0 t icl_tc_phy_connect +ffffffff81b03110 t icl_tc_phy_disconnect +ffffffff81b03190 t tgl_tc_phy_init +ffffffff81b032c0 t icl_tc_phy_take_ownership +ffffffff81b03430 t icl_tc_phy_cold_off_domain +ffffffff81b03490 t icl_tc_phy_init +ffffffff81b034f0 t __delayed_work_tick +ffffffff81b04000 T intel_tv_init +ffffffff81b043f0 t intel_tv_compute_config +ffffffff81b048a0 t intel_tv_get_config +ffffffff81b04d60 t intel_tv_pre_enable +ffffffff81b05680 t intel_enable_tv +ffffffff81b056e0 t intel_disable_tv +ffffffff81b05740 t intel_tv_get_hw_state +ffffffff81b057a0 t intel_tv_connector_duplicate_state +ffffffff81b05820 t intel_tv_mode_to_mode +ffffffff81b05970 t intel_tv_get_modes +ffffffff81b05cb0 t intel_tv_detect +ffffffff81b06140 t intel_tv_mode_valid +ffffffff81b061f0 t intel_tv_atomic_check +ffffffff81b07000 T i915_get_vblank_counter +ffffffff81b071e0 T g4x_get_vblank_counter +ffffffff81b07270 T intel_crtc_get_vblank_timestamp +ffffffff81b07290 t i915_get_crtc_scanoutpos +ffffffff81b07690 T intel_get_crtc_scanline +ffffffff81b07700 t __intel_get_crtc_scanline +ffffffff81b07950 T intel_wait_for_pipe_scanline_stopped +ffffffff81b07960 t wait_for_pipe_scanline_moving +ffffffff81b07bc0 T intel_wait_for_pipe_scanline_moving +ffffffff81b07be0 T intel_crtc_update_active_timings +ffffffff81b08000 T intel_dsc_source_support +ffffffff81b08050 T intel_dsc_compute_params +ffffffff81b08650 T intel_dsc_power_domain +ffffffff81b08700 T intel_dsc_get_num_vdsc_instances +ffffffff81b08750 T intel_dsc_dsi_pps_write +ffffffff81b089f0 T intel_dsc_dp_pps_write +ffffffff81b08ae0 T intel_uncompressed_joiner_enable +ffffffff81b08c00 T intel_dsc_enable +ffffffff81b0a600 T intel_dsc_disable +ffffffff81b0a780 T intel_dsc_get_config +ffffffff81b0b000 T intel_vga_disable +ffffffff81b0b120 T intel_vga_redisable_power_on +ffffffff81b0b1c0 T intel_vga_redisable +ffffffff81b0b280 T intel_vga_reset_io_mem +ffffffff81b0b2e0 T intel_vga_register +ffffffff81b0b310 T intel_vga_unregister +ffffffff81b0c000 T intel_vrr_is_capable +ffffffff81b0c080 T intel_vrr_check_modeset +ffffffff81b0c110 T intel_vrr_vmin_vblank_start +ffffffff81b0c170 T intel_vrr_vmax_vblank_start +ffffffff81b0c1d0 T intel_vrr_compute_config +ffffffff81b0c360 T intel_vrr_set_transcoder_timings +ffffffff81b0c540 T intel_vrr_send_push +ffffffff81b0c5c0 T intel_vrr_is_push_sent +ffffffff81b0c650 T intel_vrr_enable +ffffffff81b0c770 T intel_vrr_disable +ffffffff81b0c8b0 T intel_vrr_get_config +ffffffff81b0d000 T intel_update_watermarks +ffffffff81b0d040 T intel_compute_pipe_wm +ffffffff81b0d090 T intel_compute_intermediate_wm +ffffffff81b0d120 T intel_initial_watermarks +ffffffff81b0d170 T intel_atomic_update_watermarks +ffffffff81b0d1b0 T intel_optimize_watermarks +ffffffff81b0d1f0 T intel_compute_global_watermarks +ffffffff81b0d240 T intel_wm_get_hw_state +ffffffff81b0d280 T intel_wm_plane_visible +ffffffff81b0d2e0 T intel_print_wm_latency +ffffffff81b0d3f0 T intel_wm_init +ffffffff81b0d410 T intel_wm_debugfs_register +ffffffff81b0e000 T skl_update_scaler_crtc +ffffffff81b0e0b0 t skl_update_scaler +ffffffff81b0e3f0 T skl_update_scaler_plane +ffffffff81b0e7f0 T intel_atomic_setup_scalers +ffffffff81b0ed50 T skl_pfit_enable +ffffffff81b0f240 T skl_program_plane_scaler +ffffffff81b0f930 T skl_detach_scalers +ffffffff81b0fa90 T skl_scaler_disable +ffffffff81b0fbc0 T skl_scaler_get_config +ffffffff81b10000 T skl_format_to_fourcc +ffffffff81b10180 T icl_is_nv12_y_plane +ffffffff81b101f0 T icl_hdr_plane_mask +ffffffff81b10220 T icl_is_hdr_plane +ffffffff81b10260 T skl_calc_main_surface_offset +ffffffff81b104a0 T skl_universal_plane_create +ffffffff81b10c80 t icl_plane_min_width +ffffffff81b10e10 t icl_hdr_plane_max_width +ffffffff81b10e60 t icl_sdr_plane_max_width +ffffffff81b10e90 t icl_plane_max_height +ffffffff81b10ec0 t icl_plane_min_cdclk +ffffffff81b10f00 t glk_plane_max_width +ffffffff81b10fb0 t skl_plane_max_height +ffffffff81b10fe0 t glk_plane_min_cdclk +ffffffff81b11050 t skl_plane_max_width +ffffffff81b11120 t skl_plane_min_cdclk +ffffffff81b11190 t skl_plane_max_stride +ffffffff81b11230 t icl_plane_update_noarm +ffffffff81b11ae0 t icl_plane_update_arm +ffffffff81b11c80 t icl_plane_disable_arm +ffffffff81b11d90 t skl_plane_update_noarm +ffffffff81b11f30 t skl_plane_update_arm +ffffffff81b12250 t skl_plane_disable_arm +ffffffff81b12300 t skl_plane_get_hw_state +ffffffff81b123d0 t skl_plane_check +ffffffff81b13000 t skl_plane_async_flip +ffffffff81b13130 t skl_plane_enable_flip_done +ffffffff81b13190 t skl_plane_disable_flip_done +ffffffff81b131f0 T skl_get_initial_plane_config +ffffffff81b139b0 t skl_plane_aux_dist +ffffffff81b13aa0 t skl_surf_address +ffffffff81b13bc0 t skl_plane_check_nv12_rotation +ffffffff81b13c60 t pxp_is_borked +ffffffff81b13cc0 t skl_plane_ctl +ffffffff81b143a0 t glk_plane_color_ctl +ffffffff81b144f0 t skl_check_main_ccs_coordinates +ffffffff81b14680 t gen12_plane_format_mod_supported +ffffffff81b148d0 t skl_plane_format_mod_supported +ffffffff81b15000 T intel_enabled_dbuf_slices_mask +ffffffff81b15120 T intel_sagv_pre_plane_update +ffffffff81b152b0 T intel_sagv_post_plane_update +ffffffff81b15520 T intel_can_enable_sagv +ffffffff81b15590 T skl_ddb_dbuf_slice_mask +ffffffff81b15640 T skl_write_plane_wm +ffffffff81b15ac0 T skl_write_cursor_wm +ffffffff81b15ea0 T skl_ddb_allocation_overlaps +ffffffff81b15f40 T intel_wm_state_verify +ffffffff81b16940 t skl_pipe_wm_get_hw_state +ffffffff81b16c90 T skl_watermark_ipc_enabled +ffffffff81b16cc0 T skl_watermark_ipc_update +ffffffff81b16d70 T skl_watermark_ipc_init +ffffffff81b16e40 T skl_wm_init +ffffffff81b17680 T intel_atomic_get_dbuf_state +ffffffff81b176a0 T intel_dbuf_init +ffffffff81b17710 T intel_dbuf_pre_plane_update +ffffffff81b179e0 T intel_dbuf_post_plane_update +ffffffff81b17ab0 T intel_mbus_dbox_update +ffffffff81b17d20 T skl_watermark_debugfs_register +ffffffff81b17d50 t skl_sagv_disable +ffffffff81b17e70 t skl_compute_wm +ffffffff81b1b160 t skl_wm_get_hw_state_and_sanitize +ffffffff81b1b950 t skl_build_plane_wm_single +ffffffff81b1bce0 t skl_compute_wm_params +ffffffff81b1c0b0 t skl_compute_plane_wm +ffffffff81b1c4e0 t skl_compute_dbuf_slices +ffffffff81b1c9e0 t skl_ddb_entry_for_slices +ffffffff81b1cb20 t intel_dbuf_duplicate_state +ffffffff81b1cbb0 t intel_dbuf_destroy_state +ffffffff81b1d000 T pixel_format_from_register_bits +ffffffff81b1d060 T vlv_dsi_wait_for_fifo_empty +ffffffff81b1d120 T vlv_dsi_init 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+ffffffff81b240f0 T bxt_dsi_reset_clocks +ffffffff81b24210 T assert_dsi_pll_enabled +ffffffff81b24230 t assert_dsi_pll +ffffffff81b24340 T assert_dsi_pll_disabled +ffffffff81b25000 T i915_gem_busy_ioctl +ffffffff81b26000 T i915_gem_clflush_object +ffffffff81b261f0 t clflush_work +ffffffff81b26250 t clflush_release +ffffffff81b27000 T i915_lut_handle_alloc +ffffffff81b27020 T i915_lut_handle_free +ffffffff81b27040 T i915_gem_context_release +ffffffff81b27070 T i915_gem_init__contexts +ffffffff81b270d0 T i915_gem_context_open +ffffffff81b27230 t i915_gem_create_context +ffffffff81b27a00 t proto_context_close +ffffffff81b27ab0 t gem_context_register +ffffffff81b27c50 T i915_gem_context_close +ffffffff81b27da0 t context_close +ffffffff81b28460 T i915_gem_vm_create_ioctl +ffffffff81b28570 t xa_alloc +ffffffff81b285f0 T i915_gem_vm_destroy_ioctl +ffffffff81b286a0 T i915_gem_user_to_context_sseu +ffffffff81b28900 T i915_gem_context_lookup +ffffffff81b28a30 T i915_gem_context_create_ioctl +ffffffff81b28c80 t proto_context_register +ffffffff81b28dd0 T i915_gem_context_destroy_ioctl +ffffffff81b28ef0 T i915_gem_context_getparam_ioctl +ffffffff81b29310 T i915_gem_context_setparam_ioctl +ffffffff81b297d0 t set_proto_ctx_param +ffffffff81b29ef0 T i915_gem_context_reset_stats_ioctl +ffffffff81b29ff0 T i915_gem_engines_iter_next +ffffffff81b2a040 T i915_gem_context_module_exit +ffffffff81b2a060 T i915_gem_context_module_init +ffffffff81b2a0c0 t i915_gem_context_release_work +ffffffff81b2a190 t intel_context_set_gem +ffffffff81b2a2c0 t engines_notify +ffffffff81b2a430 t intel_context_unpin +ffffffff81b2a4c0 t kill_engines +ffffffff81b2a650 t create_setparam +ffffffff81b2a6c0 t invalid_ext +ffffffff81b2a6f0 t lookup_user_engine +ffffffff81b2a7b0 t set_proto_ctx_engines_balance +ffffffff81b2aa90 t set_proto_ctx_engines_bond +ffffffff81b2ae10 t set_proto_ctx_engines_parallel_submit +ffffffff81b2c000 T __i915_gem_object_create_user +ffffffff81b2c020 t __i915_gem_object_create_user_ext +ffffffff81b2c4b0 T i915_gem_dumb_create +ffffffff81b2c620 T i915_gem_create_ioctl +ffffffff81b2c6f0 T i915_gem_create_ext_ioctl +ffffffff81b2c8f0 t ext_set_placements +ffffffff81b2cd00 t ext_set_protected +ffffffff81b2cd80 t ext_set_pat +ffffffff81b2d000 T i915_gem_prime_export +ffffffff81b2d090 T i915_gem_prime_import +ffffffff81b2e000 T i915_gem_cpu_write_needs_clflush +ffffffff81b2e070 T i915_gem_object_flush_if_display +ffffffff81b2e280 t i915_gem_object_unlock +ffffffff81b2e340 T i915_gem_object_flush_if_display_locked +ffffffff81b2e3c0 T i915_gem_object_set_to_wc_domain +ffffffff81b2e4c0 t flush_write_domain +ffffffff81b2e610 T i915_gem_object_set_to_gtt_domain +ffffffff81b2e760 T i915_gem_object_set_cache_level +ffffffff81b2e7f0 T i915_gem_get_caching_ioctl +ffffffff81b2e8d0 T i915_gem_set_caching_ioctl +ffffffff81b2eb10 t i915_gem_object_lock_interruptible +ffffffff81b2ec30 T i915_gem_object_pin_to_display_plane +ffffffff81b2ee50 T i915_gem_object_set_to_cpu_domain +ffffffff81b2ef40 T i915_gem_set_domain_ioctl +ffffffff81b2f130 T i915_gem_object_prepare_read +ffffffff81b2f260 T i915_gem_object_prepare_write +ffffffff81b30000 T i915_gem_execbuffer2_ioctl +ffffffff81b30b80 t eb_select_context +ffffffff81b30c00 t eb_select_engine +ffffffff81b31080 t eb_lookup_vmas +ffffffff81b317c0 t eb_release_vmas +ffffffff81b31b00 t eb_relocate_parse +ffffffff81b31c20 t eb_capture_stage +ffffffff81b31d60 t eb_requests_create +ffffffff81b32140 t eb_submit +ffffffff81b325a0 t eb_requests_get +ffffffff81b32610 t eb_requests_add +ffffffff81b327a0 t signal_fence_array +ffffffff81b32850 t eb_requests_put +ffffffff81b328c0 t eb_put_engine +ffffffff81b32a10 t parse_timeline_fences +ffffffff81b32e10 t eb_pin_engine +ffffffff81b33120 t eb_validate_vmas +ffffffff81b33a10 t eb_relocate_vma +ffffffff81b33c50 t eb_parse +ffffffff81b33fe0 t eb_relocate_parse_slow +ffffffff81b346b0 t eb_pin_timeline +ffffffff81b34900 t i915_gem_object_lock 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+ffffffff81b390b0 T i915_gem_object_release_mmap_offset +ffffffff81b391b0 T i915_gem_dumb_mmap_offset +ffffffff81b391e0 t __assign_mmap_offset_handle +ffffffff81b396f0 T i915_gem_mmap_offset_ioctl +ffffffff81b397e0 T i915_gem_mmap +ffffffff81b3a000 T i915_gem_get_pat_index +ffffffff81b3a080 T i915_gem_object_has_cache_level +ffffffff81b3a120 T i915_gem_object_alloc +ffffffff81b3a170 T i915_gem_object_free +ffffffff81b3a190 T i915_gem_object_init +ffffffff81b3a2b0 T __i915_gem_object_fini +ffffffff81b3a2d0 T i915_gem_object_set_cache_coherency +ffffffff81b3a3f0 T i915_gem_object_set_pat_index +ffffffff81b3a4a0 T i915_gem_object_can_bypass_llc +ffffffff81b3a500 T __i915_gem_free_object_rcu +ffffffff81b3a570 T __i915_gem_object_pages_fini +ffffffff81b3a8d0 T __i915_gem_free_object +ffffffff81b3a980 T i915_gem_flush_free_objects +ffffffff81b3a9d0 t __i915_gem_free_objects +ffffffff81b3aac0 T __i915_gem_object_flush_frontbuffer +ffffffff81b3ab70 T __i915_gem_object_invalidate_frontbuffer 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i915_gem_object_shmem_to_phys +ffffffff81b3f000 T i915_gem_suspend +ffffffff81b3f060 T i915_gem_backup_suspend +ffffffff81b3f1e0 t lmem_suspend +ffffffff81b3f300 T i915_gem_suspend_late +ffffffff81b3f440 T i915_gem_freeze +ffffffff81b3f480 T i915_gem_freeze_late +ffffffff81b3f550 T i915_gem_resume +ffffffff81b3f6b0 t lmem_restore +ffffffff81b40000 T i915_gem_object_init_memory_region +ffffffff81b40080 T i915_gem_object_release_memory_region +ffffffff81b400e0 T i915_gem_object_create_region +ffffffff81b40100 t __i915_gem_object_create_region +ffffffff81b40270 T i915_gem_object_create_region_at +ffffffff81b40310 T i915_gem_process_region +ffffffff81b41000 T shmem_sg_free_table +ffffffff81b41100 T shmem_sg_alloc_table +ffffffff81b41250 T __shmem_writeback +ffffffff81b41270 T __i915_gem_object_release_shmem +ffffffff81b41330 T i915_gem_object_put_pages_shmem +ffffffff81b41440 t shmem_get_pages +ffffffff81b415a0 t shmem_put_pages +ffffffff81b415e0 t shmem_truncate +ffffffff81b41680 t shmem_shrink +ffffffff81b416f0 t shmem_pread +ffffffff81b41760 t shmem_pwrite +ffffffff81b41ab0 t shmem_release +ffffffff81b41b00 T i915_gem_object_create_shmem +ffffffff81b41b20 T i915_gem_object_create_shmem_from_data +ffffffff81b41c70 T i915_gem_shmem_setup +ffffffff81b41cd0 T i915_gem_object_is_shmem +ffffffff81b41d10 t init_shmem +ffffffff81b41d60 t release_shmem +ffffffff81b41da0 t shmem_object_init +ffffffff81b42000 T i915_gem_shrink +ffffffff81b42710 T i915_gem_shrink_all +ffffffff81b42790 T i915_gem_driver_register__shrinker +ffffffff81b42840 t i915_gem_shrinker_scan +ffffffff81b428b0 t i915_gem_shrinker_count +ffffffff81b42930 T i915_gem_driver_unregister__shrinker +ffffffff81b42950 T i915_gem_shrinker_taints_mutex +ffffffff81b42980 T i915_gem_object_make_unshrinkable +ffffffff81b42a80 T __i915_gem_object_make_shrinkable +ffffffff81b42b70 T __i915_gem_object_make_purgeable +ffffffff81b42c60 T i915_gem_object_make_shrinkable +ffffffff81b42d50 T i915_gem_object_make_purgeable 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intel_gt_driver_late_release_all +ffffffff81b72930 T intel_gt_probe_all +ffffffff81b72bd0 t intel_gt_tile_setup +ffffffff81b72ca0 T intel_gt_tiles_init +ffffffff81b72e50 T intel_gt_info_print +ffffffff81b72e90 T intel_gt_coherent_map_type +ffffffff81b73000 T intel_gt_buffer_pool_mark_used +ffffffff81b73060 T intel_gt_get_buffer_pool +ffffffff81b73270 T intel_gt_init_buffer_pool +ffffffff81b73330 t pool_free_work +ffffffff81b733d0 T intel_gt_flush_buffer_pool +ffffffff81b73470 t pool_free_older_than +ffffffff81b735f0 T intel_gt_fini_buffer_pool +ffffffff81b73620 t pool_retire +ffffffff81b73760 t __delayed_work_tick +ffffffff81b74000 T intel_gt_apply_ccs_mode +ffffffff81b75000 T intel_gt_init_clock_frequency +ffffffff81b75230 T intel_gt_clock_interval_to_ns +ffffffff81b75290 T intel_gt_pm_interval_to_ns +ffffffff81b752f0 T intel_gt_ns_to_clock_interval +ffffffff81b75360 T intel_gt_ns_to_pm_interval +ffffffff81b76000 T intel_gt_debugfs_reset_show +ffffffff81b76050 T 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i915_driver_register +ffffffff81be0a00 T inteldrm_init_backlight +ffffffff81be0a70 t i915_welcome_messages +ffffffff81be0bf0 T i915_driver_remove +ffffffff81be0cd0 T i915_driver_shutdown +ffffffff81be0e70 T i915_driver_resume_switcheroo +ffffffff81be0ed0 t i915_drm_resume_early +ffffffff81be0fc0 t i915_drm_resume +ffffffff81be1200 T intagpsubmatch +ffffffff81be1250 T intagp_print +ffffffff81be12a0 T inteldrm_wsioctl +ffffffff81be1480 T inteldrm_wsmmap +ffffffff81be14b0 T inteldrm_alloc_screen +ffffffff81be14e0 T inteldrm_free_screen +ffffffff81be1500 T inteldrm_show_screen +ffffffff81be15d0 T inteldrm_load_font +ffffffff81be15f0 T inteldrm_list_font +ffffffff81be1610 T inteldrm_scrollback +ffffffff81be1630 T inteldrm_getchar +ffffffff81be1650 T inteldrm_burner +ffffffff81be16e0 T inteldrm_enter_ddb +ffffffff81be1740 T inteldrm_doswitch +ffffffff81be17c0 T inteldrm_burner_cb +ffffffff81be17f0 T inteldrm_backlight_update_status +ffffffff81be1850 T inteldrm_backlight_get_brightness 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i915_gem_shmem_pwrite +ffffffff81be54f0 T i915_gem_sw_finish_ioctl +ffffffff81be5580 T i915_gem_runtime_suspend +ffffffff81be5680 T i915_gem_object_ggtt_pin_ww +ffffffff81be5920 T i915_gem_object_ggtt_pin +ffffffff81be5a30 t i915_gem_object_lock +ffffffff81be5c50 T i915_gem_madvise_ioctl +ffffffff81be6060 T i915_gem_drain_freed_objects +ffffffff81be60d0 T i915_gem_drain_workqueue +ffffffff81be61b0 T i915_gem_init +ffffffff81be6450 T i915_gem_driver_register +ffffffff81be6460 T i915_gem_driver_unregister +ffffffff81be6470 T i915_gem_driver_remove +ffffffff81be64d0 T i915_gem_driver_release +ffffffff81be65c0 T i915_gem_init_early +ffffffff81be6650 T i915_gem_cleanup_early +ffffffff81be66d0 T i915_gem_open +ffffffff81be67e0 t i915_gem_gtt_prepare +ffffffff81be7000 T i915_gem_evict_something +ffffffff81be7440 t ungrab_vma +ffffffff81be7570 t grab_vma +ffffffff81be7690 T i915_gem_evict_for_node +ffffffff81be78d0 T i915_gem_evict_vm +ffffffff81be8000 T i915_gem_gtt_prepare_pages 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intel_device_info_runtime_init +ffffffff81c160d0 T intel_device_info_driver_create +ffffffff81c161e0 T intel_driver_caps_print +ffffffff81c17000 T intel_memory_region_lookup +ffffffff81c170e0 T intel_memory_region_by_type +ffffffff81c171a0 T intel_memory_region_reserve +ffffffff81c171c0 T intel_memory_region_debug +ffffffff81c17220 T intel_memory_region_create +ffffffff81c173a0 T intel_memory_region_set_name +ffffffff81c17420 T intel_memory_region_avail +ffffffff81c174a0 T intel_memory_region_destroy +ffffffff81c17510 T intel_memory_regions_hw_probe +ffffffff81c17660 T intel_memory_regions_driver_release +ffffffff81c18000 T snb_pcode_read +ffffffff81c180d0 t __snb_pcode_rw +ffffffff81c18260 T snb_pcode_write_timeout +ffffffff81c18330 T skl_pcode_request +ffffffff81c18670 T intel_pcode_init +ffffffff81c187b0 T snb_pcode_read_p +ffffffff81c188c0 T snb_pcode_write_p +ffffffff81c19000 T intel_region_ttm_device_init +ffffffff81c19070 T intel_region_ttm_device_fini +ffffffff81c19090 T intel_region_to_ttm_type +ffffffff81c190d0 T intel_region_ttm_init +ffffffff81c19170 T intel_region_ttm_fini +ffffffff81c193d0 T intel_region_ttm_resource_to_rsgt +ffffffff81c19410 T intel_region_ttm_resource_free +ffffffff81c1a000 T intel_runtime_pm_get_raw +ffffffff81c1a090 T intel_runtime_pm_get +ffffffff81c1a140 T intel_runtime_pm_get_if_in_use +ffffffff81c1a1f0 T intel_runtime_pm_get_if_active +ffffffff81c1a2a0 T intel_runtime_pm_get_noresume +ffffffff81c1a3d0 T intel_runtime_pm_put_raw +ffffffff81c1a460 T intel_runtime_pm_put_unchecked +ffffffff81c1a520 T intel_runtime_pm_enable +ffffffff81c1a550 T intel_runtime_pm_disable +ffffffff81c1a580 T intel_runtime_pm_driver_release +ffffffff81c1a610 T intel_runtime_pm_init_early +ffffffff81c1b000 T intel_sbi_read +ffffffff81c1b050 t intel_sbi_rw +ffffffff81c1b240 T intel_sbi_write +ffffffff81c1c000 T intel_step_init +ffffffff81c1c4d0 T intel_step_name +ffffffff81c1c510 t pvc_step_lookup +ffffffff81c1d000 T gen3_stolen_base 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atombios_dig_encoder_setup2 +ffffffff81c3bfd0 T atombios_dig_encoder_setup +ffffffff81c3bff0 T atombios_dig_transmitter_setup2 +ffffffff81c3c9d0 T atombios_set_edp_panel_power +ffffffff81c3cae0 T radeon_atom_release_dig_encoder +ffffffff81c3cb20 T radeon_atom_pick_dig_encoder +ffffffff81c3cd40 T radeon_atom_encoder_init +ffffffff81c3ce10 t atombios_external_encoder_setup +ffffffff81c3d080 T radeon_atom_ext_encoder_setup_ddc +ffffffff81c3d0d0 T radeon_enc_destroy +ffffffff81c3d180 T radeon_add_atom_encoder +ffffffff81c3d590 t radeon_atombios_set_dig_info +ffffffff81c3d600 t radeon_atombios_set_dac_info +ffffffff81c3d670 t radeon_atom_backlight_update_status +ffffffff81c3d6d0 t radeon_atom_encoder_dpms +ffffffff81c3d970 t radeon_atom_mode_fixup +ffffffff81c3dab0 t radeon_atom_encoder_prepare +ffffffff81c3df90 t radeon_atom_encoder_commit +ffffffff81c3dfc0 t radeon_atom_encoder_mode_set +ffffffff81c3e570 t radeon_atom_dig_detect +ffffffff81c3e680 t radeon_atom_encoder_disable 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btc_read_arb_registers +ffffffff81c416e0 T btc_dpm_vblank_too_short +ffffffff81c41750 T btc_dpm_pre_set_power_state +ffffffff81c42970 T btc_dpm_set_power_state +ffffffff81c42ca0 t btc_set_power_state_conditionally_enable_ulv +ffffffff81c42dd0 T btc_dpm_post_set_power_state +ffffffff81c42ef0 t btc_update_current_ps +ffffffff81c42ff0 T btc_dpm_enable +ffffffff81c43ed0 t btc_cg_clock_gating_enable +ffffffff81c44000 t btc_mg_clock_gating_enable +ffffffff81c44120 t btc_ls_clock_gating_enable +ffffffff81c44250 t btc_init_stutter_mode +ffffffff81c442d0 T btc_dpm_disable +ffffffff81c445b0 T btc_dpm_setup_asic +ffffffff81c44690 T btc_dpm_init +ffffffff81c44a80 T btc_dpm_fini +ffffffff81c44b30 T btc_dpm_debugfs_print_current_performance_level +ffffffff81c44b80 T btc_dpm_get_current_sclk +ffffffff81c44c00 T btc_dpm_get_current_mclk +ffffffff81c44c80 T btc_dpm_get_sclk +ffffffff81c44cd0 T btc_dpm_get_mclk +ffffffff81c45000 T ci_dpm_powergate_uvd +ffffffff81c45380 T ci_dpm_vblank_too_short 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ci_set_private_data_variables_based_on_pptable +ffffffff81c4e570 T ci_dpm_debugfs_print_current_performance_level +ffffffff81c4e6b0 T ci_dpm_print_power_state +ffffffff81c4e770 T ci_dpm_get_current_sclk +ffffffff81c4e840 T ci_dpm_get_current_mclk +ffffffff81c4e910 T ci_dpm_get_sclk +ffffffff81c4e960 T ci_dpm_get_mclk +ffffffff81c4e9b0 t ci_set_valid_flag +ffffffff81c4ea50 t ci_populate_all_graphic_levels +ffffffff81c4efe0 t ci_populate_all_memory_levels +ffffffff81c4f8d0 t ci_populate_smc_vce_level +ffffffff81c4f9e0 t ci_populate_smc_acp_level +ffffffff81c4fad0 t ci_populate_smc_samu_level +ffffffff81c4fbc0 t ci_do_program_memory_timing_parameters +ffffffff81c4fde0 t ci_populate_smc_uvd_level +ffffffff81c4ff20 t ci_populate_smc_initial_state +ffffffff81c4ffc0 t ci_populate_bapm_parameters_in_dpm_table +ffffffff81c50140 t ci_populate_smc_voltage_table +ffffffff81c50260 t ci_min_max_v_gnbl_pm_lid_from_bapm_vddc +ffffffff81c504c0 t ci_enable_sclk_mclk_dpm +ffffffff81c50830 t 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cik_semaphore_ring_emit +ffffffff81c53280 T cik_copy_cpdma +ffffffff81c536d0 T cik_ring_ib_execute +ffffffff81c53c70 T cik_ib_test +ffffffff81c53f50 T cik_gfx_get_rptr +ffffffff81c53fb0 T cik_gfx_get_wptr +ffffffff81c53ff0 T cik_gfx_set_wptr +ffffffff81c54030 T cik_compute_get_rptr +ffffffff81c54110 T cik_compute_get_wptr +ffffffff81c541f0 T cik_compute_set_wptr +ffffffff81c54270 T cik_gpu_check_soft_reset +ffffffff81c543e0 T cik_asic_reset +ffffffff81c54890 t cik_gpu_pci_config_reset +ffffffff81c550a0 T cik_gfx_is_lockup +ffffffff81c55110 T cik_pcie_gart_tlb_flush +ffffffff81c55160 T cik_ib_parse +ffffffff81c55190 T cik_vm_init +ffffffff81c551f0 T cik_vm_fini +ffffffff81c55220 T cik_vm_flush +ffffffff81c55e90 T cik_enter_rlc_safe_mode +ffffffff81c55f80 T cik_exit_rlc_safe_mode +ffffffff81c55fc0 T cik_update_cg +ffffffff81c564c0 t cik_enable_mgcg +ffffffff81c569e0 t cik_enable_cgcg +ffffffff81c56d50 T cik_init_cp_pg_table +ffffffff81c56fe0 T cik_get_csb_size +ffffffff81c57070 T cik_get_csb_buffer +ffffffff81c57200 T cik_irq_set +ffffffff81c57f80 t cik_disable_interrupt_state +ffffffff81c58440 T cik_irq_process +ffffffff81c59c10 t cik_irq_ack +ffffffff81c5a590 T cik_resume +ffffffff81c5a620 t cik_init_golden_registers +ffffffff81c5a7e0 t cik_startup +ffffffff81c5d5d0 T cik_suspend +ffffffff81c5d9c0 T cik_init +ffffffff81c5def0 t cik_init_microcode +ffffffff81c5ec40 t cik_uvd_init +ffffffff81c5ecf0 t cik_vce_init +ffffffff81c5edc0 t cik_cp_fini +ffffffff81c5ee40 t cik_irq_fini +ffffffff81c5ef50 t cik_mec_fini +ffffffff81c5f000 t cik_pcie_gart_fini +ffffffff81c5f100 T cik_fini +ffffffff81c5f420 T dce8_program_fmt +ffffffff81c5f550 T dce8_bandwidth_update +ffffffff81c60160 T cik_get_gpu_clock_counter +ffffffff81c60220 T cik_set_uvd_clocks +ffffffff81c602a0 t cik_set_uvd_clock +ffffffff81c60410 T cik_set_vce_clocks +ffffffff81c60650 t cik_wait_for_rlc_serdes +ffffffff81c60810 t cik_mec_init +ffffffff81c60a00 t cik_uvd_start +ffffffff81c60af0 t cik_vce_start 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dce6_afmt_hdmi_write_speaker_allocation +ffffffff81c6e580 T dce6_afmt_dp_write_speaker_allocation +ffffffff81c6e650 T dce6_afmt_write_sad_regs +ffffffff81c6e790 T dce6_audio_enable +ffffffff81c6e7e0 T dce6_hdmi_audio_set_dto +ffffffff81c6e850 T dce6_dp_audio_set_dto +ffffffff81c6f000 T eg_cg_rreg +ffffffff81c6f080 T eg_cg_wreg +ffffffff81c6f0f0 T eg_pif_phy0_rreg +ffffffff81c6f170 T eg_pif_phy0_wreg +ffffffff81c6f1d0 T eg_pif_phy1_rreg +ffffffff81c6f250 T eg_pif_phy1_wreg +ffffffff81c6f2b0 T evergreen_get_allowed_info_register +ffffffff81c6f340 T evergreen_tiling_fields +ffffffff81c6f3e0 T sumo_set_uvd_clocks +ffffffff81c6f4c0 t sumo_set_uvd_clock +ffffffff81c6f6b0 T evergreen_set_uvd_clocks +ffffffff81c6fc30 T evergreen_fix_pci_max_read_req_size +ffffffff81c6fdf0 T dce4_program_fmt +ffffffff81c6ff10 T dce4_wait_for_vblank +ffffffff81c70190 T evergreen_page_flip +ffffffff81c70320 T evergreen_page_flip_pending +ffffffff81c70390 T evergreen_get_temp +ffffffff81c70460 T sumo_get_temp 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evergreen_gpu_check_soft_reset +ffffffff81c73d20 T evergreen_gpu_pci_config_reset +ffffffff81c73ea0 T evergreen_asic_reset +ffffffff81c74210 T evergreen_gfx_is_lockup +ffffffff81c74280 T sumo_rlc_fini +ffffffff81c74440 t radeon_bo_reserve +ffffffff81c745c0 t radeon_bo_unreserve +ffffffff81c746a0 T sumo_rlc_init +ffffffff81c74e80 T evergreen_rlc_resume +ffffffff81c751f0 T evergreen_get_vblank_counter +ffffffff81c75260 T evergreen_disable_interrupt_state +ffffffff81c75530 T evergreen_irq_set +ffffffff81c75af0 T evergreen_irq_suspend +ffffffff81c75b40 T evergreen_irq_process +ffffffff81c766a0 t evergreen_irq_ack +ffffffff81c76d60 T evergreen_resume +ffffffff81c76e40 t evergreen_init_golden_registers +ffffffff81c77050 t evergreen_startup +ffffffff81c788e0 T evergreen_suspend +ffffffff81c78a80 T evergreen_init +ffffffff81c78ea0 t evergreen_pcie_gart_fini +ffffffff81c78fc0 T evergreen_fini +ffffffff81c791b0 T evergreen_pcie_gen2_enable +ffffffff81c793e0 T evergreen_program_aspm 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+ffffffff81c84310 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c84380 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c843f0 T evergreen_hdmi_write_sad_regs +ffffffff81c844f0 T evergreen_set_avi_packet +ffffffff81c84690 T dce4_hdmi_audio_set_dto +ffffffff81c84770 T dce4_dp_audio_set_dto +ffffffff81c84860 T dce4_set_vbi_packet +ffffffff81c848d0 T dce4_hdmi_set_color_depth +ffffffff81c84a20 T dce4_set_audio_packet +ffffffff81c84c30 T dce4_set_mute +ffffffff81c84d40 T evergreen_hdmi_enable +ffffffff81c85070 T evergreen_dp_enable +ffffffff81c86000 T kv_dpm_enable_bapm +ffffffff81c86070 T kv_dpm_enable +ffffffff81c86f70 t kv_populate_vce_table +ffffffff81c871f0 t kv_populate_samu_table +ffffffff81c87450 t kv_populate_acp_table +ffffffff81c875e0 t kv_start_am +ffffffff81c87620 t kv_enable_auto_thermal_throttling +ffffffff81c87660 t kv_enable_dpm_voltage_scaling +ffffffff81c876a0 t kv_set_dpm_interval +ffffffff81c876e0 t kv_start_dpm +ffffffff81c87720 t kv_enable_didt +ffffffff81c879d0 T kv_dpm_late_enable +ffffffff81c87bd0 T kv_dpm_powergate_uvd +ffffffff81c87d50 T kv_dpm_disable +ffffffff81c880c0 T kv_dpm_force_performance_level +ffffffff81c88240 t kv_force_dpm_lowest +ffffffff81c88310 T kv_dpm_pre_set_power_state +ffffffff81c88890 T kv_dpm_set_power_state +ffffffff81c89060 t kv_set_valid_clock_range +ffffffff81c89200 t kv_calculate_ds_divider +ffffffff81c89370 t kv_calculate_nbps_level_settings +ffffffff81c894f0 t kv_update_vce_dpm +ffffffff81c896d0 T kv_dpm_post_set_power_state +ffffffff81c89770 T kv_dpm_setup_asic +ffffffff81c897d0 T kv_dpm_init +ffffffff81c8a080 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c8a0f0 T kv_dpm_get_current_sclk +ffffffff81c8a160 T kv_dpm_get_current_mclk +ffffffff81c8a190 T kv_dpm_print_power_state +ffffffff81c8a230 T kv_dpm_fini +ffffffff81c8a2d0 T kv_dpm_display_configuration_changed +ffffffff81c8a300 T kv_dpm_get_sclk +ffffffff81c8a350 T kv_dpm_get_mclk +ffffffff81c8b000 T kv_notify_message_to_smu +ffffffff81c8b0c0 T kv_dpm_get_enable_mask +ffffffff81c8b190 T kv_send_msg_to_smc_with_parameter +ffffffff81c8b260 T kv_read_smc_sram_dword +ffffffff81c8b2f0 T kv_smc_dpm_enable +ffffffff81c8b420 T kv_smc_bapm_enable +ffffffff81c8b550 T kv_copy_bytes_to_smc +ffffffff81c8c000 T tn_smc_rreg +ffffffff81c8c080 T tn_smc_wreg +ffffffff81c8c0f0 T ni_mc_load_microcode +ffffffff81c8c2e0 T ni_init_microcode +ffffffff81c8c7b0 t request_firmware +ffffffff81c8c840 t release_firmware +ffffffff81c8c880 T cayman_get_allowed_info_register +ffffffff81c8c910 T tn_get_temp +ffffffff81c8c9a0 T cayman_pcie_gart_tlb_flush +ffffffff81c8c9f0 T cayman_cp_int_cntl_setup +ffffffff81c8ca40 T cayman_fence_ring_emit +ffffffff81c8cdd0 T cayman_ring_ib_execute +ffffffff81c8d230 T cayman_gfx_get_rptr +ffffffff81c8d2c0 T cayman_gfx_get_wptr +ffffffff81c8d330 T cayman_gfx_set_wptr +ffffffff81c8d3b0 T cayman_gpu_check_soft_reset +ffffffff81c8d540 T cayman_asic_reset +ffffffff81c8d850 T cayman_gfx_is_lockup +ffffffff81c8d8c0 T cayman_resume +ffffffff81c8d950 t ni_init_golden_registers +ffffffff81c8da30 t cayman_startup +ffffffff81c8ee70 T cayman_suspend +ffffffff81c8f060 T cayman_init +ffffffff81c8f3d0 t cayman_uvd_init +ffffffff81c8f480 t cayman_vce_init +ffffffff81c8f550 t cayman_cp_fini +ffffffff81c8f5d0 t cayman_pcie_gart_fini +ffffffff81c8f710 T cayman_fini +ffffffff81c8f990 T cayman_vm_init +ffffffff81c8f9f0 T cayman_vm_fini +ffffffff81c8fa20 T cayman_vm_decode_fault +ffffffff81c8fab0 T cayman_vm_flush +ffffffff81c8ff10 T tn_set_vce_clocks +ffffffff81c90170 t cayman_uvd_start +ffffffff81c90230 t cayman_vce_start +ffffffff81c90350 t cayman_cp_load_microcode +ffffffff81c904e0 t cayman_cp_resume +ffffffff81c913a0 t cayman_uvd_resume +ffffffff81c91470 t cayman_vce_resume +ffffffff81c92000 T cayman_dma_get_rptr +ffffffff81c92070 T cayman_dma_get_wptr +ffffffff81c920c0 T cayman_dma_set_wptr +ffffffff81c92110 T cayman_dma_ring_ib_execute +ffffffff81c924a0 T cayman_dma_stop +ffffffff81c92550 T cayman_dma_resume +ffffffff81c927b0 T cayman_dma_fini +ffffffff81c92870 T cayman_dma_is_lockup +ffffffff81c928f0 T cayman_dma_vm_copy_pages +ffffffff81c929f0 T cayman_dma_vm_write_pages +ffffffff81c92b50 T cayman_dma_vm_set_pages +ffffffff81c92cc0 T cayman_dma_vm_pad_ib +ffffffff81c92d10 T cayman_dma_vm_flush +ffffffff81c94000 T ni_get_pi +ffffffff81c94030 T ni_get_ps +ffffffff81c94060 T ni_dpm_vblank_too_short +ffffffff81c940d0 T ni_dpm_force_performance_level +ffffffff81c94220 T ni_copy_and_switch_arb_sets +ffffffff81c944f0 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c94570 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c945f0 T ni_dpm_setup_asic +ffffffff81c94800 T ni_update_current_ps +ffffffff81c948c0 T ni_update_requested_ps +ffffffff81c94980 T ni_dpm_enable +ffffffff81c957e0 t ni_init_smc_table +ffffffff81c96180 t ni_init_smc_spll_table +ffffffff81c962f0 t ni_init_arb_table_index +ffffffff81c96390 t ni_populate_mc_reg_table +ffffffff81c968a0 t ni_initialize_smc_cac_tables +ffffffff81c97b30 t ni_initialize_hardware_cac_manager +ffffffff81c98060 t ni_populate_smc_tdp_limits +ffffffff81c98210 t ni_program_response_times +ffffffff81c98320 T ni_dpm_disable +ffffffff81c986e0 t ni_enable_power_containment +ffffffff81c987a0 t ni_enable_smc_cac +ffffffff81c988c0 T ni_dpm_pre_set_power_state +ffffffff81c98ea0 T ni_dpm_set_power_state +ffffffff81c99190 t ni_upload_sw_state +ffffffff81c99d70 t ni_upload_mc_reg_table +ffffffff81c99fd0 t ni_power_control_set_level +ffffffff81c9a0a0 T ni_dpm_post_set_power_state +ffffffff81c9a170 T ni_dpm_init +ffffffff81c9ab10 T ni_dpm_fini +ffffffff81c9abc0 T ni_dpm_print_power_state +ffffffff81c9ac90 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c9acd0 T ni_dpm_get_current_sclk +ffffffff81c9ad40 T ni_dpm_get_current_mclk +ffffffff81c9adb0 T ni_dpm_get_sclk +ffffffff81c9ae10 T ni_dpm_get_mclk +ffffffff81c9ae70 t ni_do_program_memory_timing_parameters +ffffffff81c9afb0 t ni_calculate_sclk_params +ffffffff81c9b1e0 t ni_calculate_power_boost_limit +ffffffff81c9b370 t ni_populate_mclk_value +ffffffff81c9c000 T r100_wait_for_vblank +ffffffff81c9c190 T r100_page_flip +ffffffff81c9c450 T r100_page_flip_pending +ffffffff81c9c500 T r100_pm_get_dynpm_state +ffffffff81c9c720 T r100_pm_init_profile +ffffffff81c9c800 T r100_pm_misc +ffffffff81c9cc40 T r100_pm_prepare +ffffffff81c9ccf0 T r100_pm_finish +ffffffff81c9cda0 T r100_gui_idle +ffffffff81c9cde0 T r100_hpd_sense +ffffffff81c9ce40 T r100_hpd_set_polarity +ffffffff81c9cf00 T r100_hpd_init +ffffffff81c9cfa0 T r100_hpd_fini +ffffffff81c9d010 T r100_pci_gart_tlb_flush +ffffffff81c9d040 T r100_pci_gart_init +ffffffff81c9d110 T r100_pci_gart_get_page_entry +ffffffff81c9d140 T r100_pci_gart_set_page +ffffffff81c9d180 T r100_pci_gart_enable +ffffffff81c9d270 T r100_pci_gart_disable +ffffffff81c9d2f0 T r100_pci_gart_fini +ffffffff81c9d370 T r100_irq_set +ffffffff81c9d450 T r100_irq_disable +ffffffff81c9d4c0 T r100_irq_process +ffffffff81c9d7c0 T r100_get_vblank_counter +ffffffff81c9d810 T r100_fence_ring_emit +ffffffff81c9dc70 T r100_semaphore_ring_emit +ffffffff81c9dca0 T r100_copy_blit +ffffffff81c9e330 T r100_ring_start +ffffffff81c9e420 T r100_gfx_get_rptr +ffffffff81c9e480 T r100_gfx_get_wptr +ffffffff81c9e4c0 T r100_gfx_set_wptr +ffffffff81c9e500 T r100_cp_init +ffffffff81c9ea30 T r100_debugfs_cp_init +ffffffff81c9ea60 T r100_cp_fini +ffffffff81c9eb00 T r100_cp_disable +ffffffff81c9ec40 T r100_gui_wait_for_idle +ffffffff81c9ed30 T r100_reloc_pitch_offset +ffffffff81c9ee70 T r100_packet3_load_vbpntr +ffffffff81c9f110 T r100_cs_parse_packet0 +ffffffff81c9f220 T r100_cs_packet_parse_vline +ffffffff81c9f430 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c9f4b0 T r100_cs_parse +ffffffff81ca06a0 T r100_cs_track_clear +ffffffff81ca0a30 T r100_cs_track_check +ffffffff81ca1250 T r100_mc_wait_for_idle +ffffffff81ca12f0 T r100_gpu_is_lockup +ffffffff81ca1350 T r100_enable_bm +ffffffff81ca13a0 T r100_bm_disable +ffffffff81ca1450 T r100_asic_reset +ffffffff81ca1780 T r100_mc_stop +ffffffff81ca1940 T r100_mc_resume +ffffffff81ca1a00 T r100_set_common_regs +ffffffff81ca1ba0 T r100_vram_init_sizes +ffffffff81ca1d90 T r100_vga_set_state +ffffffff81ca1df0 T r100_pll_errata_after_index +ffffffff81ca1e30 T r100_pll_rreg +ffffffff81ca1f60 T r100_pll_wreg +ffffffff81ca2070 T r100_debugfs_rbbm_init +ffffffff81ca20a0 T r100_debugfs_mc_info_init +ffffffff81ca20d0 T r100_set_surface_reg +ffffffff81ca22e0 T r100_clear_surface_reg +ffffffff81ca2390 T r100_bandwidth_update +ffffffff81ca2de0 T r100_ring_test +ffffffff81ca3090 T r100_ring_ib_execute +ffffffff81ca32f0 T r100_ib_test +ffffffff81ca3630 T r100_vga_render_disable +ffffffff81ca3690 T r100_resume +ffffffff81ca3890 t r100_startup +ffffffff81ca3dd0 T r100_suspend +ffffffff81ca3eb0 T r100_fini +ffffffff81ca3fc0 T r100_restore_sanity +ffffffff81ca4060 T r100_init +ffffffff81ca44c0 t r100_set_safe_registers +ffffffff81ca4540 T r100_mm_rreg_slow +ffffffff81ca45c0 T r100_mm_wreg_slow +ffffffff81ca4620 T r100_io_rreg +ffffffff81ca46c0 T r100_io_wreg +ffffffff81ca4730 t r100_get_vtx_size +ffffffff81ca4820 t r100_cs_track_texture_print +ffffffff81ca5000 T r200_copy_dma +ffffffff81ca5470 T r200_packet0_check +ffffffff81ca6240 t r200_get_vtx_size_0 +ffffffff81ca6400 t r200_get_vtx_size_1 +ffffffff81ca6490 T r200_set_safe_registers +ffffffff81ca7000 T rv370_pcie_rreg +ffffffff81ca7080 T rv370_pcie_wreg +ffffffff81ca70f0 T rv370_pcie_gart_tlb_flush +ffffffff81ca72f0 T rv370_pcie_gart_get_page_entry +ffffffff81ca7350 T rv370_pcie_gart_set_page +ffffffff81ca7390 T rv370_pcie_gart_init +ffffffff81ca7460 T rv370_pcie_gart_enable +ffffffff81ca77c0 T rv370_pcie_gart_disable +ffffffff81ca7940 T rv370_pcie_gart_fini +ffffffff81ca7970 T r300_fence_ring_emit +ffffffff81ca7ee0 T r300_ring_start +ffffffff81ca8850 T r300_mc_wait_for_idle +ffffffff81ca88f0 T r300_asic_reset +ffffffff81ca8b10 T r300_mc_init +ffffffff81ca8bc0 T rv370_set_pcie_lanes +ffffffff81ca8d80 T rv370_get_pcie_lanes +ffffffff81ca8e30 T r300_cs_parse +ffffffff81ca91a0 t r300_packet0_check +ffffffff81caa060 T r300_set_reg_safe +ffffffff81caa0a0 T r300_mc_program +ffffffff81caa230 T r300_clock_startup +ffffffff81caa2c0 T r300_resume +ffffffff81caa490 t r300_startup +ffffffff81caa7f0 T r300_suspend +ffffffff81caa870 T r300_fini +ffffffff81caa950 T r300_init +ffffffff81cab000 T r420_pm_init_profile +ffffffff81cab0f0 T r420_pipes_init +ffffffff81cab2d0 T r420_mc_rreg +ffffffff81cab350 T r420_mc_wreg +ffffffff81cab3c0 T r420_resume +ffffffff81cab590 t r420_startup +ffffffff81cab7a0 T r420_suspend +ffffffff81cab940 T r420_fini +ffffffff81caba20 T r420_init +ffffffff81cabca0 T r420_debugfs_pipes_info_init +ffffffff81cabcd0 t r420_cp_errata_init +ffffffff81cac000 T r520_mc_wait_for_idle +ffffffff81cac0a0 T r520_resume +ffffffff81cac1a0 t r520_startup +ffffffff81cac590 T r520_init +ffffffff81cad000 T r600_rcu_rreg +ffffffff81cad080 T r600_rcu_wreg +ffffffff81cad0f0 T r600_uvd_ctx_rreg +ffffffff81cad170 T r600_uvd_ctx_wreg +ffffffff81cad1e0 T r600_get_allowed_info_register +ffffffff81cad260 T r600_get_xclk +ffffffff81cad290 T r600_set_uvd_clocks +ffffffff81cad7f0 T dce3_program_fmt +ffffffff81cad910 T rv6xx_get_temp +ffffffff81cad960 T r600_pm_get_dynpm_state +ffffffff81cadd70 T rs780_pm_init_profile +ffffffff81cade80 T r600_pm_init_profile +ffffffff81cae120 T r600_pm_misc +ffffffff81cae200 T r600_gui_idle +ffffffff81cae240 T r600_hpd_sense +ffffffff81cae360 T r600_hpd_set_polarity +ffffffff81cae5e0 T r600_hpd_init +ffffffff81cae7c0 T r600_hpd_fini +ffffffff81cae970 T r600_pcie_gart_tlb_flush +ffffffff81caeaa0 T r600_pcie_gart_init +ffffffff81caeb40 T r600_mc_wait_for_idle +ffffffff81caebe0 T rs780_mc_rreg +ffffffff81caec80 T rs780_mc_wreg +ffffffff81caed10 T r600_vram_scratch_init +ffffffff81caee10 t radeon_bo_reserve +ffffffff81caef90 t radeon_bo_unreserve +ffffffff81caf070 T r600_vram_scratch_fini +ffffffff81caf0f0 T r600_set_bios_scratch_engine_hung +ffffffff81caf140 T r600_gpu_check_soft_reset +ffffffff81caf4e0 T r600_asic_reset +ffffffff81caf8a0 t r600_gpu_pci_config_reset +ffffffff81cafab0 T r600_gfx_is_lockup +ffffffff81cafb20 T r6xx_remap_render_backend +ffffffff81cafce0 T r600_count_pipe_bits +ffffffff81cafd50 T r600_pciep_rreg +ffffffff81cafdd0 T r600_pciep_wreg +ffffffff81cafe40 T r600_cp_stop +ffffffff81cafec0 T r600_init_microcode +ffffffff81cb0380 t request_firmware +ffffffff81cb0410 t release_firmware +ffffffff81cb0450 T r600_gfx_get_rptr +ffffffff81cb04b0 T r600_gfx_get_wptr +ffffffff81cb04f0 T r600_gfx_set_wptr +ffffffff81cb0530 T r600_cp_start +ffffffff81cb08a0 T r600_cp_resume +ffffffff81cb0c00 T r600_ring_init +ffffffff81cb0ca0 T r600_cp_fini +ffffffff81cb0d30 T r600_scratch_init +ffffffff81cb0da0 T r600_ring_test +ffffffff81cb1040 T r600_fence_ring_emit +ffffffff81cb18e0 T r600_semaphore_ring_emit +ffffffff81cb1ac0 T r600_copy_cpdma +ffffffff81cb2070 T r600_set_surface_reg +ffffffff81cb20a0 T r600_clear_surface_reg +ffffffff81cb20d0 T r600_vga_set_state +ffffffff81cb2130 T r600_resume +ffffffff81cb21c0 t r600_startup +ffffffff81cb3eb0 T r600_suspend +ffffffff81cb4020 T r600_irq_suspend +ffffffff81cb40e0 t r600_pcie_gart_disable +ffffffff81cb42e0 T r600_init +ffffffff81cb4a60 T r600_ih_ring_init +ffffffff81cb4ad0 T r600_irq_fini +ffffffff81cb4c10 t r600_pcie_gart_fini +ffffffff81cb4c40 T r600_fini +ffffffff81cb4dd0 T r600_ring_ib_execute +ffffffff81cb5260 T r600_ib_test +ffffffff81cb5510 T r600_ih_ring_alloc +ffffffff81cb5630 T r600_ih_ring_fini +ffffffff81cb56c0 T r600_rlc_stop +ffffffff81cb5850 T r600_disable_interrupts +ffffffff81cb5900 T r600_irq_init +ffffffff81cb5d60 t r600_disable_interrupt_state +ffffffff81cb6060 T r600_irq_disable +ffffffff81cb6120 T r600_irq_set +ffffffff81cb68a0 t r600_irq_ack +ffffffff81cb6dd0 T r600_irq_process +ffffffff81cb79d0 T r600_mmio_hdp_flush +ffffffff81cb7a50 T r600_set_pcie_lanes +ffffffff81cb7b80 T r600_get_pcie_lanes +ffffffff81cb7c50 T r600_get_gpu_clock_counter +ffffffff81cb7ce0 t r600_cp_load_microcode +ffffffff81cb7fb0 t r600_uvd_resume +ffffffff81cb9000 T r600_fmt_is_valid_color +ffffffff81cb9040 T r600_fmt_is_valid_texture +ffffffff81cb9090 T r600_fmt_get_blocksize +ffffffff81cb90d0 T r600_fmt_get_nblocksx +ffffffff81cb9120 T r600_fmt_get_nblocksy +ffffffff81cb9180 T r600_cs_common_vline_parse +ffffffff81cb9440 T r600_mip_minify +ffffffff81cb94a0 T r600_cs_parse +ffffffff81cbb380 T r600_dma_cs_next_reloc +ffffffff81cbb400 T r600_dma_cs_parse +ffffffff81cbbab0 t r600_cs_track_check +ffffffff81cbcc40 t r600_cs_check_reg +ffffffff81cbdb70 t r600_is_safe_reg +ffffffff81cbdc10 t r600_texture_size +ffffffff81cbe000 T r600_dma_get_rptr +ffffffff81cbe060 T r600_dma_get_wptr +ffffffff81cbe0a0 T r600_dma_set_wptr +ffffffff81cbe0e0 T r600_dma_stop +ffffffff81cbe170 T r600_dma_resume +ffffffff81cbe370 T r600_dma_fini +ffffffff81cbe3f0 T r600_dma_is_lockup +ffffffff81cbe460 T r600_dma_ring_test +ffffffff81cbe6d0 T r600_dma_fence_ring_emit +ffffffff81cbe8b0 T r600_dma_semaphore_ring_emit +ffffffff81cbe9d0 T r600_dma_ib_test +ffffffff81cbebf0 T r600_dma_ring_ib_execute +ffffffff81cbef40 T r600_copy_dma +ffffffff81cc0000 T r600_dpm_print_class_info +ffffffff81cc02b0 T r600_dpm_print_cap_info +ffffffff81cc0340 T r600_dpm_print_ps_status +ffffffff81cc03d0 T r600_dpm_get_vblank_time +ffffffff81cc0490 T r600_dpm_get_vrefresh +ffffffff81cc0520 T r600_calculate_u_and_p +ffffffff81cc05a0 T r600_calculate_at +ffffffff81cc0650 T r600_gfx_clockgating_enable +ffffffff81cc0750 T r600_dynamicpm_enable +ffffffff81cc07a0 T r600_enable_thermal_protection +ffffffff81cc0800 T r600_enable_acpi_pm +ffffffff81cc0850 T r600_enable_dynamic_pcie_gen2 +ffffffff81cc08a0 T r600_dynamicpm_enabled +ffffffff81cc08e0 T r600_enable_sclk_control +ffffffff81cc0940 T r600_enable_mclk_control +ffffffff81cc09a0 T r600_enable_spll_bypass +ffffffff81cc09f0 T r600_wait_for_spll_change +ffffffff81cc0a70 T r600_set_bsp +ffffffff81cc0ab0 T r600_set_at +ffffffff81cc0b10 T r600_set_tc +ffffffff81cc0b70 T r600_select_td +ffffffff81cc0c20 T r600_set_vrc +ffffffff81cc0c60 T r600_set_tpu +ffffffff81cc0cc0 T r600_set_tpc +ffffffff81cc0d20 T r600_set_sstu +ffffffff81cc0d80 T r600_set_sst +ffffffff81cc0dd0 T r600_set_git +ffffffff81cc0e20 T r600_set_fctu +ffffffff81cc0e80 T r600_set_fct +ffffffff81cc0ed0 T r600_set_ctxcgtt3d_rphc +ffffffff81cc0f30 T r600_set_ctxcgtt3d_rsdc +ffffffff81cc0f90 T r600_set_vddc3d_oorsu +ffffffff81cc0ff0 T r600_set_vddc3d_oorphc +ffffffff81cc1050 T r600_set_vddc3d_oorsdc +ffffffff81cc10b0 T r600_set_mpll_lock_time +ffffffff81cc1100 T r600_set_mpll_reset_time +ffffffff81cc1150 T r600_engine_clock_entry_enable +ffffffff81cc1250 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81cc1350 T r600_engine_clock_entry_enable_post_divider +ffffffff81cc1450 T r600_engine_clock_entry_set_post_divider +ffffffff81cc1510 T r600_engine_clock_entry_set_reference_divider +ffffffff81cc15d0 T r600_engine_clock_entry_set_feedback_divider +ffffffff81cc1690 T r600_engine_clock_entry_set_step_time +ffffffff81cc1750 T r600_vid_rt_set_ssu +ffffffff81cc17b0 T r600_vid_rt_set_vru +ffffffff81cc1810 T r600_vid_rt_set_vrt +ffffffff81cc1870 T r600_voltage_control_enable_pins +ffffffff81cc18c0 T r600_voltage_control_program_voltages +ffffffff81cc1950 T r600_voltage_control_deactivate_static_control +ffffffff81cc19e0 T r600_power_level_enable +ffffffff81cc1a50 T r600_power_level_set_voltage_index +ffffffff81cc1ac0 T r600_power_level_set_mem_clock_index +ffffffff81cc1b20 T r600_power_level_set_eng_clock_index +ffffffff81cc1b90 T r600_power_level_set_watermark_id +ffffffff81cc1c00 T r600_power_level_set_pcie_gen2 +ffffffff81cc1c60 T r600_power_level_get_current_index +ffffffff81cc1ca0 T r600_power_level_get_target_index +ffffffff81cc1ce0 T r600_power_level_set_enter_index +ffffffff81cc1d40 T r600_wait_for_power_level_unequal +ffffffff81cc1e30 T r600_wait_for_power_level +ffffffff81cc1f20 T r600_start_dpm +ffffffff81cc2200 T r600_stop_dpm +ffffffff81cc2250 T r600_dpm_pre_set_power_state +ffffffff81cc2280 T r600_dpm_post_set_power_state +ffffffff81cc22b0 T r600_is_uvd_state +ffffffff81cc22f0 T r600_is_internal_thermal_sensor +ffffffff81cc2330 T r600_dpm_late_enable +ffffffff81cc2440 T r600_get_platform_caps +ffffffff81cc24e0 T r600_parse_extended_power_table +ffffffff81cc32a0 T r600_free_extended_power_table +ffffffff81cc33a0 T r600_get_pcie_gen_support +ffffffff81cc33f0 T r600_get_pcie_lane_support +ffffffff81cc3450 T r600_encode_pci_lane_width +ffffffff81cc4000 T r600_audio_update_hdmi +ffffffff81cc4170 t r600_audio_status +ffffffff81cc4290 T r600_hdmi_buffer_status_changed +ffffffff81cc4330 T r600_hdmi_update_audio_settings +ffffffff81cc4700 T r600_audio_enable +ffffffff81cc4780 T r600_audio_get_pin +ffffffff81cc47b0 T r600_hdmi_update_acr +ffffffff81cc4b50 T r600_set_avi_packet +ffffffff81cc4d50 T r600_hdmi_audio_workaround +ffffffff81cc4e20 T r600_hdmi_audio_set_dto +ffffffff81cc4ee0 T r600_set_vbi_packet +ffffffff81cc4fa0 T r600_set_audio_packet +ffffffff81cc5270 T r600_set_mute +ffffffff81cc5380 T r600_hdmi_enable +ffffffff81cc6000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81cc6040 T radeon_acpi_pcie_notify_device_ready +ffffffff81cc6160 T radeon_acpi_pcie_performance_request +ffffffff81cc64f0 T radeon_acpi_init +ffffffff81cc6c60 t radeon_acpi_event +ffffffff81cc6f60 T radeon_acpi_fini +ffffffff81cc7000 T radeon_agp_head_init +ffffffff81cc7050 T radeon_agp_init +ffffffff81cc70a0 T radeon_agp_resume +ffffffff81cc7140 T radeon_agp_fini +ffffffff81cc7190 T radeon_agp_suspend +ffffffff81cc8000 T radeon_agp_disable +ffffffff81cc8120 T radeon_asic_init +ffffffff81cc88f0 t radeon_invalid_rreg +ffffffff81cc8930 t radeon_invalid_wreg +ffffffff81cc8970 t radeon_invalid_get_allowed_info_register +ffffffff81cc9000 T radeon_atombios_i2c_init +ffffffff81cc93a0 T radeon_atombios_lookup_gpio +ffffffff81cc94a0 T radeon_get_atom_connector_info_from_object_table +ffffffff81cc9de0 t radeon_lookup_i2c_gpio +ffffffff81cca0d0 t radeon_atom_apply_quirks +ffffffff81cca4f0 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81cca9f0 T radeon_atom_get_clock_info +ffffffff81ccadd0 T radeon_atombios_sideport_present +ffffffff81ccae80 T radeon_atombios_get_tmds_info +ffffffff81ccafc0 T radeon_atombios_get_ppll_ss_info +ffffffff81ccb0e0 T radeon_atombios_get_asic_ss_info +ffffffff81ccb3c0 t radeon_atombios_get_igp_ss_overrides +ffffffff81ccb4d0 T radeon_atombios_get_lvds_info +ffffffff81ccb830 T radeon_atombios_get_primary_dac_info +ffffffff81ccb8f0 T radeon_atom_get_tv_timings +ffffffff81ccbb30 T radeon_atombios_get_tv_info +ffffffff81ccbbf0 T radeon_atombios_get_tv_dac_info +ffffffff81ccbcf0 T radeon_atombios_get_default_voltages +ffffffff81ccbdb0 T radeon_atombios_get_power_modes +ffffffff81ccce20 T radeon_atom_get_clock_dividers +ffffffff81ccd110 T radeon_atom_get_memory_pll_dividers +ffffffff81ccd250 T radeon_atom_set_clock_gating +ffffffff81ccd2a0 T radeon_atom_get_engine_clock +ffffffff81ccd2f0 T radeon_atom_get_memory_clock +ffffffff81ccd340 T radeon_atom_set_engine_clock +ffffffff81ccd390 T radeon_atom_set_memory_clock +ffffffff81ccd3f0 T radeon_atom_set_engine_dram_timings +ffffffff81ccd460 T radeon_atom_update_memory_dll +ffffffff81ccd4b0 T radeon_atom_set_ac_timing +ffffffff81ccd500 T radeon_atom_set_voltage +ffffffff81ccd5d0 T radeon_atom_get_max_vddc +ffffffff81ccd6b0 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81ccd780 T radeon_atom_get_leakage_id_from_vbios +ffffffff81ccd840 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81ccda60 T radeon_atom_get_voltage_evv +ffffffff81ccdb20 T radeon_atom_get_voltage_gpio_settings +ffffffff81ccdc20 T radeon_atom_is_voltage_gpio +ffffffff81ccddb0 T radeon_atom_get_svi2_info +ffffffff81ccdea0 T radeon_atom_get_max_voltage +ffffffff81cce030 T radeon_atom_get_min_voltage +ffffffff81cce170 T radeon_atom_get_voltage_step +ffffffff81cce270 T radeon_atom_round_to_true_voltage +ffffffff81cce3d0 T radeon_atom_get_voltage_table +ffffffff81cce640 T radeon_atom_get_memory_info +ffffffff81cce7f0 T radeon_atom_get_mclk_range_table +ffffffff81ccea30 T radeon_atom_init_mc_reg_table +ffffffff81cceca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81cced70 T radeon_save_bios_scratch_regs +ffffffff81ccee50 T radeon_restore_bios_scratch_regs +ffffffff81ccef30 T radeon_atom_output_lock +ffffffff81ccefc0 T radeon_atombios_connected_scratch_regs +ffffffff81ccf730 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81ccf880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81ccfab0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81ccfc90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81cd0090 t radeon_atombios_parse_pplib_clock_info +ffffffff81cd0440 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81cd1000 T radeon_audio_init +ffffffff81cd11f0 t radeon_audio_enable +ffffffff81cd1350 T radeon_audio_endpoint_rreg +ffffffff81cd1390 T radeon_audio_endpoint_wreg +ffffffff81cd13d0 T radeon_audio_get_pin +ffffffff81cd1420 T radeon_audio_detect +ffffffff81cd1580 T radeon_audio_fini +ffffffff81cd1610 T radeon_audio_mode_set +ffffffff81cd1660 T radeon_audio_dpms +ffffffff81cd16b0 T radeon_audio_decode_dfs_div +ffffffff81cd1710 T radeon_audio_component_init +ffffffff81cd1780 T radeon_audio_component_fini +ffffffff81cd17d0 t radeon_audio_hdmi_mode_set +ffffffff81cd1eb0 t radeon_audio_write_speaker_allocation +ffffffff81cd1f60 t radeon_audio_write_sad_regs +ffffffff81cd2030 t radeon_audio_set_avi_packet +ffffffff81cd2170 t radeon_audio_dp_mode_set +ffffffff81cd22f0 t radeon_audio_rreg +ffffffff81cd2340 t radeon_audio_wreg +ffffffff81cd3000 T radeon_benchmark +ffffffff81cd3940 t radeon_benchmark_move +ffffffff81cd3c20 t radeon_bo_reserve +ffffffff81cd3da0 t radeon_bo_unreserve +ffffffff81cd3e80 t radeon_benchmark_do_move +ffffffff81cd4000 T radeon_get_bios +ffffffff81cd4fc0 t igp_read_bios_from_vram +ffffffff81cd50d0 t radeon_read_bios +ffffffff81cd6000 T radeon_legacy_get_engine_clock +ffffffff81cd60d0 T radeon_legacy_get_memory_clock +ffffffff81cd61a0 T radeon_get_clock_info +ffffffff81cd6730 T radeon_legacy_set_engine_clock +ffffffff81cd6a80 T radeon_legacy_set_clock_gating +ffffffff81cd8000 T radeon_combios_check_hardcoded_edid +ffffffff81cd8100 t combios_get_table_offset +ffffffff81cd8690 T radeon_bios_get_hardcoded_edid +ffffffff81cd8710 T radeon_combios_i2c_init +ffffffff81cd8db0 t combios_setup_i2c_bus +ffffffff81cd90a0 t radeon_combios_get_i2c_info_from_table +ffffffff81cd92f0 T radeon_combios_get_clock_info +ffffffff81cd94e0 T radeon_combios_sideport_present +ffffffff81cd9560 T radeon_combios_get_primary_dac_info +ffffffff81cd96b0 T radeon_combios_get_tv_info +ffffffff81cd97b0 T radeon_combios_get_tv_dac_info +ffffffff81cd9a40 T radeon_combios_get_lvds_info +ffffffff81cda0b0 T radeon_legacy_get_tmds_info_from_table +ffffffff81cda180 T radeon_legacy_get_tmds_info_from_combios +ffffffff81cda390 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81cda5c0 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81cda900 T radeon_get_legacy_connector_info_from_table +ffffffff81cdca70 T radeon_get_legacy_connector_info_from_bios +ffffffff81cdd660 T radeon_combios_get_power_modes +ffffffff81cddd30 T radeon_external_tmds_setup +ffffffff81cdde00 T radeon_combios_external_tmds_setup +ffffffff81cde380 T radeon_combios_asic_init +ffffffff81cde8d0 t combios_parse_mmio_table +ffffffff81cdeaf0 t combios_parse_pll_table +ffffffff81cdedc0 T radeon_combios_initialize_bios_scratch_regs +ffffffff81cdee50 T radeon_combios_output_lock +ffffffff81cdeeb0 T radeon_combios_connected_scratch_regs +ffffffff81cdf210 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81cdf2f0 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81ce0000 T radeon_connector_hotplug +ffffffff81ce0100 T radeon_get_monitor_bpc +ffffffff81ce0550 T radeon_connector_edid +ffffffff81ce0600 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81ce0680 T radeon_connector_is_dp12_capable +ffffffff81ce0720 T radeon_add_atom_connector +ffffffff81ce15d0 T radeon_add_legacy_connector +ffffffff81ce1ac0 t radeon_dp_detect +ffffffff81ce1e60 t radeon_dvi_force +ffffffff81ce1eb0 t radeon_connector_set_property +ffffffff81ce26f0 t radeon_connector_unregister +ffffffff81ce2750 t radeon_connector_destroy +ffffffff81ce27c0 t radeon_best_single_encoder +ffffffff81ce2830 t radeon_connector_get_edid +ffffffff81ce2990 t radeon_dp_get_modes +ffffffff81ce2c90 t radeon_dp_mode_valid +ffffffff81ce2e60 t radeon_dvi_encoder +ffffffff81ce2f20 t radeon_fixup_lvds_native_mode +ffffffff81ce3060 t radeon_add_common_modes +ffffffff81ce3150 t radeon_fp_native_mode +ffffffff81ce3230 t radeon_lvds_set_property +ffffffff81ce3320 t radeon_vga_detect +ffffffff81ce35c0 t radeon_connector_analog_encoder_conflict_solve +ffffffff81ce37e0 t radeon_vga_get_modes +ffffffff81ce38c0 t radeon_vga_mode_valid +ffffffff81ce3920 t radeon_dvi_detect +ffffffff81ce3f80 t radeon_dvi_mode_valid +ffffffff81ce4100 t radeon_tv_detect +ffffffff81ce4340 t radeon_tv_get_modes +ffffffff81ce4420 t radeon_tv_mode_valid +ffffffff81ce4470 t radeon_lvds_detect +ffffffff81ce4610 t radeon_lvds_get_modes +ffffffff81ce4750 t radeon_lvds_mode_valid +ffffffff81ce5000 T radeon_cs_parser_init +ffffffff81ce5490 T radeon_cs_ioctl +ffffffff81ce5c70 t radeon_cs_parser_fini +ffffffff81ce5df0 t radeon_cs_ib_vm_chunk +ffffffff81ce6130 T radeon_cs_packet_parse +ffffffff81ce62e0 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81ce6340 T radeon_cs_dump_packet +ffffffff81ce63c0 T radeon_cs_packet_next_reloc +ffffffff81ce65a0 t cmp_size_smaller_first +ffffffff81ce7000 T radeon_crtc_cursor_move +ffffffff81ce7070 t radeon_lock_cursor +ffffffff81ce7230 t radeon_cursor_move_locked +ffffffff81ce7770 T radeon_crtc_cursor_set2 +ffffffff81ce7a00 t radeon_hide_cursor +ffffffff81ce7ac0 t radeon_bo_reserve +ffffffff81ce7c40 t radeon_bo_unreserve +ffffffff81ce7d20 t radeon_show_cursor +ffffffff81ce7f70 T radeon_cursor_reset +ffffffff81ce8000 T radeon_is_px +ffffffff81ce8040 T radeon_program_register_sequence +ffffffff81ce8170 T radeon_pci_config_reset +ffffffff81ce81a0 T radeon_surface_init +ffffffff81ce8360 T radeon_scratch_init +ffffffff81ce83e0 T radeon_scratch_get +ffffffff81ce8460 T radeon_scratch_free +ffffffff81ce84c0 T radeon_doorbell_get +ffffffff81ce8570 T radeon_doorbell_free +ffffffff81ce85c0 T radeon_wb_disable +ffffffff81ce85f0 T radeon_wb_fini +ffffffff81ce8690 t radeon_bo_reserve +ffffffff81ce8810 t radeon_bo_unreserve +ffffffff81ce88f0 T radeon_wb_init +ffffffff81ce8be0 T radeon_vram_location +ffffffff81ce8d10 T radeon_gtt_location +ffffffff81ce8e40 T radeon_device_is_virtual +ffffffff81ce8e70 T radeon_card_posted +ffffffff81ce9080 T radeon_update_bandwidth_info +ffffffff81ce9100 T radeon_boot_test_post_card +ffffffff81ce91c0 T radeon_dummy_page_init +ffffffff81ce9280 T radeon_dummy_page_fini +ffffffff81ce92e0 T radeon_atombios_init +ffffffff81ce9470 t cail_reg_read +ffffffff81ce94d0 t cail_reg_write +ffffffff81ce9530 t cail_ioreg_read +ffffffff81ce9550 t cail_ioreg_write +ffffffff81ce9570 t cail_mc_read +ffffffff81ce95a0 t cail_mc_write +ffffffff81ce95d0 t cail_pll_read +ffffffff81ce9600 t cail_pll_write +ffffffff81ce9630 T radeon_atombios_fini +ffffffff81ce96e0 T radeon_combios_init +ffffffff81ce9720 T radeon_combios_fini +ffffffff81ce9750 T radeon_device_init +ffffffff81cea240 T radeon_device_fini +ffffffff81cea350 T radeon_suspend_kms +ffffffff81cea6c0 T radeon_resume_kms +ffffffff81cea900 T radeon_gpu_reset +ffffffff81ceb000 T radeon_crtc_load_lut +ffffffff81cebe60 T radeon_crtc_handle_vblank +ffffffff81cebfd0 T radeon_get_crtc_scanoutpos +ffffffff81cec5a0 T radeon_crtc_handle_flip +ffffffff81cec6d0 T radeon_compute_pll_avivo +ffffffff81cecc30 T radeon_compute_pll_legacy +ffffffff81ced300 T radeon_framebuffer_init +ffffffff81ced380 T radeon_update_display_priority +ffffffff81ced3e0 T radeon_modeset_init +ffffffff81cedec0 T radeon_modeset_fini +ffffffff81cee010 T radeon_crtc_scaling_mode_fixup +ffffffff81cee390 T radeon_get_crtc_scanout_position +ffffffff81cee400 t radeon_user_framebuffer_create +ffffffff81cee5a0 t radeon_crtc_gamma_set +ffffffff81cee5e0 t radeon_crtc_destroy +ffffffff81cee620 t radeon_crtc_set_config +ffffffff81cee6f0 t radeon_crtc_page_flip_target +ffffffff81ceeb90 t radeon_flip_work_func +ffffffff81ceedb0 t radeon_unpin_work_func +ffffffff81ceee30 t radeon_bo_reserve +ffffffff81ceefb0 t radeon_bo_unreserve +ffffffff81cf0000 T radeon_dp_aux_transfer_native +ffffffff81cf1000 T radeondrm_probe +ffffffff81cf1060 T radeondrm_attach_kms +ffffffff81cf17a0 T radeondrm_detach_kms +ffffffff81cf1830 T radeondrm_activate_kms +ffffffff81cf18f0 T radeondrm_wsioctl +ffffffff81cf19b0 T radeondrm_wsmmap +ffffffff81cf19e0 T radeondrm_alloc_screen +ffffffff81cf1a10 T radeondrm_free_screen +ffffffff81cf1a20 T radeondrm_show_screen +ffffffff81cf1b10 T radeondrm_enter_ddb +ffffffff81cf1b70 T radeondrm_doswitch +ffffffff81cf1c10 T radeondrm_setpal +ffffffff81cf1e30 T radeondrm_attachhook +ffffffff81cf2170 T radeondrm_forcedetach +ffffffff81cf3000 T radeon_setup_encoder_clones +ffffffff81cf30b0 T radeon_get_encoder_enum +ffffffff81cf3230 T radeon_link_encoder_connector +ffffffff81cf3380 T radeon_encoder_set_active_device +ffffffff81cf3440 T radeon_get_connector_for_encoder +ffffffff81cf34b0 T radeon_get_connector_for_encoder_init +ffffffff81cf3520 T radeon_get_external_encoder +ffffffff81cf35b0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81cf3650 T radeon_panel_mode_fixup +ffffffff81cf3820 T radeon_dig_monitor_is_duallink +ffffffff81cf3940 T radeon_encoder_is_digital +ffffffff81cf4000 T radeon_fbdev_setup +ffffffff81cf4150 T radeon_fbdev_set_suspend +ffffffff81cf41a0 T radeon_fbdev_robj_is_fb +ffffffff81cf4210 T radeondrm_burner +ffffffff81cf4290 T radeondrm_burner_cb +ffffffff81cf42c0 t radeon_fbdev_fb_helper_fb_probe +ffffffff81cf4800 t radeon_bo_reserve +ffffffff81cf4980 t radeon_bo_unreserve +ffffffff81cf4a60 t radeon_fbdev_client_unregister +ffffffff81cf4ac0 t radeon_fbdev_client_restore +ffffffff81cf4b00 t radeon_fbdev_client_hotplug +ffffffff81cf5000 T radeon_fence_emit +ffffffff81cf5120 T radeon_fence_process +ffffffff81cf51e0 t radeon_fence_activity +ffffffff81cf5450 T radeon_fence_signaled +ffffffff81cf54c0 t radeon_fence_seq_signaled +ffffffff81cf55b0 T radeon_fence_wait_timeout +ffffffff81cf56e0 t radeon_fence_wait_seq_timeout +ffffffff81cf5b50 T radeon_fence_wait +ffffffff81cf5c80 T radeon_fence_wait_any +ffffffff81cf5dc0 T radeon_fence_wait_next +ffffffff81cf5e80 T radeon_fence_wait_empty +ffffffff81cf5f90 T radeon_fence_ref +ffffffff81cf5fd0 T radeon_fence_unref +ffffffff81cf6010 T radeon_fence_count_emitted +ffffffff81cf6110 T radeon_fence_need_sync +ffffffff81cf6170 T radeon_fence_note_sync +ffffffff81cf6340 T radeon_fence_driver_start_ring +ffffffff81cf6520 T radeon_fence_driver_init +ffffffff81cf6660 T radeon_debugfs_fence_init +ffffffff81cf6690 T radeon_fence_driver_fini +ffffffff81cf68c0 T radeon_fence_driver_force_completion +ffffffff81cf69b0 t radeon_fence_get_driver_name +ffffffff81cf69e0 t radeon_fence_get_timeline_name +ffffffff81cf6a80 t radeon_fence_enable_signaling +ffffffff81cf6c90 t radeon_fence_is_signaled +ffffffff81cf6dd0 t radeon_fence_default_wait +ffffffff81cf6f40 t radeon_fence_any_seq_signaled +ffffffff81cf7080 t radeon_fence_check_lockup +ffffffff81cf72e0 t __delayed_work_tick +ffffffff81cf7300 t radeon_fence_check_signaled +ffffffff81cf73a0 t radeon_fence_wait_cb +ffffffff81cf8000 T radeon_gart_table_ram_alloc +ffffffff81cf80c0 T radeon_gart_table_ram_free +ffffffff81cf8130 T radeon_gart_table_vram_alloc +ffffffff81cf81b0 T radeon_gart_table_vram_pin +ffffffff81cf82f0 t radeon_bo_reserve +ffffffff81cf8470 t radeon_bo_unreserve +ffffffff81cf8550 T radeon_gart_table_vram_unpin +ffffffff81cf85d0 T radeon_gart_table_vram_free +ffffffff81cf8610 T radeon_gart_unbind +ffffffff81cf8730 T radeon_gart_bind +ffffffff81cf8880 T radeon_gart_init +ffffffff81cf8990 T radeon_gart_fini +ffffffff81cf9000 T radeon_gem_fault +ffffffff81cf9180 T radeon_gem_vm_reference +ffffffff81cf91b0 T radeon_gem_vm_detach +ffffffff81cf91c0 T radeon_gem_object_create +ffffffff81cf93a0 T radeon_gem_init +ffffffff81cf93e0 T radeon_gem_fini +ffffffff81cf93f0 t radeon_gem_object_free +ffffffff81cf9440 t radeon_gem_object_open +ffffffff81cf94e0 t radeon_gem_object_close +ffffffff81cf95d0 t radeon_gem_object_mmap +ffffffff81cf9670 T radeon_gem_info_ioctl +ffffffff81cf96e0 T radeon_gem_create_ioctl +ffffffff81cf9800 T radeon_gem_userptr_ioctl +ffffffff81cf9830 T radeon_gem_set_domain_ioctl +ffffffff81cf9990 T radeon_mode_dumb_mmap +ffffffff81cf9a40 T radeon_gem_mmap_ioctl +ffffffff81cf9b00 T radeon_gem_busy_ioctl +ffffffff81cf9bb0 T radeon_gem_wait_idle_ioctl +ffffffff81cf9cc0 T radeon_gem_set_tiling_ioctl +ffffffff81cf9d70 T radeon_gem_get_tiling_ioctl +ffffffff81cf9e40 t radeon_bo_reserve +ffffffff81cfa040 t radeon_bo_unreserve +ffffffff81cfa120 T radeon_gem_va_ioctl +ffffffff81cfa3d0 t radeon_gem_va_update_vm +ffffffff81cfa520 T radeon_gem_op_ioctl +ffffffff81cfa620 T radeon_align_pitch +ffffffff81cfa6b0 T radeon_mode_dumb_create +ffffffff81cfa800 T radeon_gem_debugfs_init +ffffffff81cfb000 T radeon_ddc_probe +ffffffff81cfb0c0 T radeon_router_select_ddc_port +ffffffff81cfb320 T radeon_bb_set_bits +ffffffff81cfb490 T radeon_bb_set_dir +ffffffff81cfb4c0 T radeon_bb_read_bits +ffffffff81cfb5a0 T radeon_acquire_bus +ffffffff81cfb9f0 T radeon_release_bus +ffffffff81cfbb60 T radeon_send_start +ffffffff81cfbb80 T radeon_send_stop +ffffffff81cfbba0 T radeon_initiate_xfer +ffffffff81cfbbc0 T radeon_read_byte +ffffffff81cfbbe0 T radeon_write_byte +ffffffff81cfbc00 T radeon_i2c_create +ffffffff81cfbe10 T radeon_i2c_destroy +ffffffff81cfbe90 T radeon_i2c_init +ffffffff81cfbee0 T radeon_i2c_fini +ffffffff81cfbf90 T radeon_i2c_add +ffffffff81cfc140 T radeon_i2c_lookup +ffffffff81cfc310 T radeon_i2c_get_byte +ffffffff81cfc3e0 T radeon_i2c_put_byte +ffffffff81cfc470 T radeon_router_select_cd_port +ffffffff81cfc6d0 t radeon_hw_i2c_xfer +ffffffff81cfd270 t radeon_hw_i2c_func +ffffffff81cfd2a0 t r100_hw_i2c_xfer +ffffffff81cfd960 t radeon_get_i2c_prescale +ffffffff81cfe000 T radeon_ib_get +ffffffff81cfe100 T radeon_ib_free +ffffffff81cfe140 T radeon_ib_schedule +ffffffff81cfe3d0 T radeon_ib_pool_init +ffffffff81cfe470 T radeon_ib_pool_fini +ffffffff81cfe4e0 T radeon_ib_ring_tests +ffffffff81cff000 T radeon_driver_irq_handler_kms +ffffffff81cff050 T radeon_msi_ok +ffffffff81cff150 T radeon_irq_kms_init +ffffffff81cff3e0 t radeon_hotplug_work_func +ffffffff81cff490 t radeon_dp_work_func +ffffffff81cff500 T radeon_irq_kms_fini +ffffffff81cff6a0 T radeon_irq_kms_sw_irq_get +ffffffff81cff740 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81cff780 T radeon_irq_kms_sw_irq_put +ffffffff81cff810 T radeon_irq_kms_pflip_irq_get +ffffffff81cff8c0 T radeon_irq_kms_pflip_irq_put +ffffffff81cff960 T radeon_irq_kms_enable_afmt +ffffffff81cff9f0 T radeon_irq_kms_disable_afmt +ffffffff81cffa80 T radeon_irq_kms_enable_hpd +ffffffff81cffb70 T radeon_irq_kms_disable_hpd +ffffffff81cffc50 T radeon_irq_kms_set_irq_n_enabled +ffffffff81cffdc0 t __delayed_work_tick +ffffffff81d00000 T radeon_info_ioctl +ffffffff81d00af0 t radeon_set_filp_rights +ffffffff81d00b80 T radeon_driver_open_kms +ffffffff81d00cb0 t radeon_bo_reserve +ffffffff81d00e30 T radeon_driver_postclose_kms +ffffffff81d01050 T radeon_get_vblank_counter_kms +ffffffff81d01200 T radeon_enable_vblank_kms +ffffffff81d012b0 T radeon_disable_vblank_kms +ffffffff81d02000 T radeon_crtc_set_base +ffffffff81d02020 T radeon_crtc_do_set_base +ffffffff81d02590 T radeon_crtc_set_base_atomic +ffffffff81d025b0 t radeon_bo_reserve +ffffffff81d02730 t radeon_bo_unreserve +ffffffff81d02810 T radeon_legacy_init_crtc +ffffffff81d02860 t radeon_crtc_dpms +ffffffff81d02a50 t radeon_crtc_prepare +ffffffff81d02ad0 t radeon_crtc_commit +ffffffff81d02b40 t radeon_crtc_mode_fixup +ffffffff81d02b60 t radeon_crtc_mode_set +ffffffff81d03fd0 t radeon_crtc_disable +ffffffff81d05000 T radeon_legacy_get_backlight_level +ffffffff81d05050 T radeon_legacy_set_backlight_level +ffffffff81d050a0 t radeon_legacy_lvds_update +ffffffff81d053e0 T radeon_legacy_backlight_init +ffffffff81d055b0 t radeon_legacy_backlight_get_brightness +ffffffff81d05610 T radeon_add_legacy_encoder +ffffffff81d05970 t radeon_legacy_backlight_update_status +ffffffff81d05a10 t radeon_lvds_enc_destroy +ffffffff81d05aa0 t radeon_legacy_lvds_dpms +ffffffff81d05af0 t radeon_legacy_mode_fixup +ffffffff81d05b60 t radeon_legacy_lvds_prepare +ffffffff81d05bf0 t radeon_legacy_lvds_commit +ffffffff81d05c70 t radeon_legacy_lvds_mode_set +ffffffff81d05e80 t radeon_legacy_encoder_disable +ffffffff81d05ed0 t radeon_legacy_tmds_int_dpms +ffffffff81d05f90 t radeon_legacy_tmds_int_prepare +ffffffff81d06060 t radeon_legacy_tmds_int_commit +ffffffff81d06130 t radeon_legacy_tmds_int_mode_set +ffffffff81d06390 t radeon_legacy_primary_dac_dpms +ffffffff81d064d0 t radeon_legacy_primary_dac_prepare +ffffffff81d06530 t radeon_legacy_primary_dac_commit +ffffffff81d06580 t radeon_legacy_primary_dac_mode_set +ffffffff81d06710 t radeon_legacy_primary_dac_detect +ffffffff81d06900 t radeon_legacy_tv_dac_dpms +ffffffff81d06b10 t radeon_legacy_tv_dac_prepare +ffffffff81d06b70 t radeon_legacy_tv_dac_commit +ffffffff81d06bc0 t radeon_legacy_tv_dac_mode_set +ffffffff81d06f60 t radeon_legacy_tv_dac_detect +ffffffff81d07b60 t radeon_ext_tmds_enc_destroy +ffffffff81d07bb0 t radeon_legacy_tmds_ext_dpms +ffffffff81d07c80 t radeon_legacy_tmds_ext_prepare +ffffffff81d07d50 t radeon_legacy_tmds_ext_commit +ffffffff81d07e20 t radeon_legacy_tmds_ext_mode_set +ffffffff81d08000 T radeon_legacy_tv_mode_set +ffffffff81d090f0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81d09200 T radeon_legacy_tv_adjust_pll1 +ffffffff81d09300 T radeon_legacy_tv_adjust_pll2 +ffffffff81d0a000 T radeon_ttm_bo_is_radeon_bo +ffffffff81d0a040 t radeon_ttm_bo_destroy +ffffffff81d0a170 T radeon_ttm_placement_from_domain +ffffffff81d0a2d0 T radeon_bo_create +ffffffff81d0a4a0 T radeon_bo_kmap +ffffffff81d0a590 T radeon_bo_check_tiling +ffffffff81d0a670 T radeon_bo_kunmap +ffffffff81d0a700 T radeon_bo_ref +ffffffff81d0a740 T radeon_bo_unref +ffffffff81d0a790 T radeon_bo_pin_restricted +ffffffff81d0aac0 T radeon_bo_pin +ffffffff81d0aae0 T radeon_bo_unpin +ffffffff81d0ab50 T radeon_bo_evict_vram +ffffffff81d0abb0 T radeon_bo_force_delete +ffffffff81d0ad20 T radeon_bo_init +ffffffff81d0ae00 T radeon_bo_fini +ffffffff81d0ae40 T radeon_bo_list_validate +ffffffff81d0b150 T radeon_bo_get_surface_reg +ffffffff81d0b3d0 T radeon_bo_set_tiling_flags +ffffffff81d0b6e0 T radeon_bo_get_tiling_flags +ffffffff81d0b730 T radeon_bo_move_notify +ffffffff81d0b800 T radeon_bo_fault_reserve_notify +ffffffff81d0ba90 t ttm_bo_move_to_lru_tail_unlocked +ffffffff81d0bad0 T radeon_bo_fence +ffffffff81d0c000 T radeon_pm_get_type_index +ffffffff81d0c080 T radeon_pm_acpi_event_handler +ffffffff81d0c160 t radeon_pm_update_profile +ffffffff81d0c280 t radeon_pm_set_clocks +ffffffff81d0cc50 T radeon_dpm_enable_uvd +ffffffff81d0cd10 T radeon_pm_compute_clocks +ffffffff81d0d720 T radeon_dpm_enable_vce +ffffffff81d0d790 T radeon_pm_suspend +ffffffff81d0d890 T radeon_pm_resume +ffffffff81d0db80 T radeon_pm_init +ffffffff81d0e290 T radeon_pm_late_init +ffffffff81d0e350 T radeon_pm_fini +ffffffff81d0e470 t radeon_dpm_thermal_work_handler +ffffffff81d0e550 t radeon_dynpm_idle_work_handler +ffffffff81d0e7d0 t __delayed_work_tick +ffffffff81d0f000 T radeon_gem_prime_get_sg_table +ffffffff81d0f030 T radeon_gem_prime_pin +ffffffff81d0f0c0 t radeon_bo_reserve +ffffffff81d0f240 t radeon_bo_unreserve +ffffffff81d0f320 T radeon_gem_prime_unpin +ffffffff81d0f3a0 T radeon_gem_prime_export +ffffffff81d10000 T radeon_ring_supports_scratch_reg +ffffffff81d10030 T radeon_ring_free_size +ffffffff81d100e0 T radeon_ring_lockup_update +ffffffff81d10140 T radeon_ring_alloc +ffffffff81d102c0 T radeon_ring_lock +ffffffff81d10340 T radeon_ring_commit +ffffffff81d10440 T radeon_ring_unlock_commit +ffffffff81d10470 T radeon_ring_undo +ffffffff81d104a0 T radeon_ring_unlock_undo +ffffffff81d104c0 T radeon_ring_test_lockup +ffffffff81d105e0 T radeon_ring_backup +ffffffff81d10780 T radeon_ring_restore +ffffffff81d10930 T radeon_ring_init +ffffffff81d10b20 t radeon_bo_reserve +ffffffff81d10ca0 t radeon_bo_unreserve +ffffffff81d10d80 T radeon_ring_fini +ffffffff81d11000 T radeon_sa_bo_manager_init +ffffffff81d110d0 T radeon_sa_bo_manager_fini +ffffffff81d11100 T radeon_sa_bo_manager_start +ffffffff81d11240 t radeon_bo_reserve +ffffffff81d113c0 t radeon_bo_unreserve +ffffffff81d114a0 T radeon_sa_bo_manager_suspend +ffffffff81d11550 T radeon_sa_bo_new +ffffffff81d115c0 T radeon_sa_bo_free +ffffffff81d12000 T radeon_semaphore_create +ffffffff81d120e0 T radeon_semaphore_emit_signal +ffffffff81d12170 T radeon_semaphore_emit_wait +ffffffff81d12200 T radeon_semaphore_free +ffffffff81d13000 T radeon_sync_create +ffffffff81d13090 T radeon_sync_fence +ffffffff81d13140 T radeon_sync_resv +ffffffff81d13280 T radeon_sync_rings +ffffffff81d13440 T radeon_sync_free +ffffffff81d14000 T radeon_test_moves +ffffffff81d14070 t radeon_do_test_moves +ffffffff81d14680 T radeon_test_ring_sync +ffffffff81d14950 t radeon_test_create_and_emit_fence +ffffffff81d14ac0 T radeon_test_syncing +ffffffff81d14d90 t radeon_test_ring_sync2 +ffffffff81d15100 t radeon_bo_reserve +ffffffff81d15280 t radeon_bo_unreserve +ffffffff81d16000 T radeon_get_rdev +ffffffff81d16030 T radeon_ttm_tt_set_userptr +ffffffff81d16080 T radeon_ttm_tt_is_bound +ffffffff81d160d0 T radeon_ttm_tt_has_userptr +ffffffff81d16120 T radeon_ttm_tt_is_readonly +ffffffff81d16170 T radeon_ttm_init +ffffffff81d16390 T radeon_ttm_set_active_vram_size +ffffffff81d163d0 t radeon_bo_reserve +ffffffff81d16550 t radeon_bo_unreserve +ffffffff81d16630 T radeon_ttm_fini +ffffffff81d16700 t radeon_ttm_tt_create +ffffffff81d167e0 t radeon_ttm_tt_populate +ffffffff81d16890 t radeon_ttm_tt_unpopulate +ffffffff81d16980 t radeon_ttm_tt_destroy +ffffffff81d169d0 t radeon_evict_flags +ffffffff81d16b30 t radeon_bo_move +ffffffff81d16f30 t radeon_ttm_io_mem_reserve +ffffffff81d17000 T radeon_ucode_print_mc_hdr +ffffffff81d170b0 t radeon_ucode_print_common_hdr +ffffffff81d171e0 T radeon_ucode_print_smc_hdr +ffffffff81d17270 T radeon_ucode_print_gfx_hdr +ffffffff81d17340 T radeon_ucode_print_rlc_hdr +ffffffff81d17440 T radeon_ucode_print_sdma_hdr +ffffffff81d17520 T radeon_ucode_validate +ffffffff81d18000 T radeon_uvd_init +ffffffff81d18500 t radeon_uvd_idle_work_handler +ffffffff81d18670 t radeon_bo_reserve +ffffffff81d18870 t radeon_bo_unreserve +ffffffff81d18950 T radeon_uvd_fini +ffffffff81d18a20 T radeon_uvd_suspend +ffffffff81d18be0 T radeon_uvd_note_usage +ffffffff81d18e20 T radeon_uvd_get_destroy_msg +ffffffff81d18f30 T radeon_uvd_resume +ffffffff81d18fc0 T radeon_uvd_force_into_uvd_segment +ffffffff81d19060 T radeon_uvd_free_handles +ffffffff81d19220 T radeon_uvd_cs_parse +ffffffff81d19940 T radeon_uvd_get_create_msg +ffffffff81d19ac0 t radeon_uvd_send_msg +ffffffff81d19c60 T radeon_uvd_calc_upll_dividers +ffffffff81d19e30 T radeon_uvd_send_upll_ctlreq +ffffffff81d1a170 t __delayed_work_tick +ffffffff81d1b000 T radeon_vce_init +ffffffff81d1b640 t radeon_vce_idle_work_handler +ffffffff81d1b700 t radeon_bo_reserve +ffffffff81d1b880 t radeon_bo_unreserve +ffffffff81d1b960 T radeon_vce_fini +ffffffff81d1b9e0 T radeon_vce_suspend +ffffffff81d1bac0 T radeon_vce_resume +ffffffff81d1bc10 T radeon_vce_note_usage +ffffffff81d1bd30 T radeon_vce_free_handles +ffffffff81d1bdf0 T radeon_vce_get_destroy_msg +ffffffff81d1c020 T radeon_vce_get_create_msg +ffffffff81d1c370 T radeon_vce_cs_reloc +ffffffff81d1c470 T radeon_vce_cs_parse +ffffffff81d1cbe0 T radeon_vce_semaphore_emit +ffffffff81d1cda0 T radeon_vce_ib_execute +ffffffff81d1cf30 T radeon_vce_fence_emit +ffffffff81d1d160 T radeon_vce_ring_test +ffffffff81d1d2b0 T radeon_vce_ib_test +ffffffff81d1d3d0 t __delayed_work_tick +ffffffff81d1e000 T radeon_vm_manager_init +ffffffff81d1e060 T radeon_vm_manager_fini +ffffffff81d1e180 T radeon_vm_get_bos +ffffffff81d1e2d0 T radeon_vm_grab_id +ffffffff81d1e460 T radeon_vm_flush +ffffffff81d1e5f0 T radeon_vm_fence +ffffffff81d1e6a0 T radeon_vm_bo_find +ffffffff81d1e6f0 T radeon_vm_bo_add +ffffffff81d1e7e0 T radeon_vm_bo_set_addr +ffffffff81d1ec30 t radeon_bo_unreserve +ffffffff81d1ed10 t radeon_vm_clear_bo +ffffffff81d1ef00 T radeon_vm_map_gart +ffffffff81d1ef40 T radeon_vm_update_page_directory +ffffffff81d1f2c0 T radeon_vm_bo_update +ffffffff81d1f900 t radeon_vm_fence_pts +ffffffff81d1f990 T radeon_vm_clear_freed +ffffffff81d1fa70 T radeon_vm_clear_invalids +ffffffff81d1fb10 T radeon_vm_bo_rmv +ffffffff81d1fc00 T radeon_vm_bo_invalidate +ffffffff81d1fcb0 T radeon_vm_init +ffffffff81d1ff50 T radeon_vm_fini +ffffffff81d20230 t radeon_bo_reserve +ffffffff81d203b0 t radeon_vm_frag_ptes +ffffffff81d21000 T rs400_gart_adjust_size +ffffffff81d210c0 T rs400_gart_tlb_flush +ffffffff81d21140 T rs400_gart_init +ffffffff81d21240 T rs400_gart_enable +ffffffff81d215a0 T rs400_gart_disable +ffffffff81d21600 T rs400_gart_fini +ffffffff81d21670 T rs400_gart_get_page_entry +ffffffff81d216d0 T rs400_gart_set_page +ffffffff81d21710 T rs400_mc_wait_for_idle +ffffffff81d217b0 T rs400_mc_rreg +ffffffff81d21840 T rs400_mc_wreg +ffffffff81d218c0 T rs400_resume +ffffffff81d219f0 t rs400_mc_program +ffffffff81d21af0 t rs400_startup +ffffffff81d21ce0 T rs400_suspend +ffffffff81d21d80 T rs400_fini +ffffffff81d21e70 T rs400_init +ffffffff81d23000 T avivo_wait_for_vblank +ffffffff81d23280 T rs600_page_flip +ffffffff81d23550 T rs600_page_flip_pending +ffffffff81d235c0 T avivo_program_fmt +ffffffff81d236e0 T rs600_pm_misc +ffffffff81d23a20 T rs600_pm_prepare +ffffffff81d23b20 T rs600_pm_finish +ffffffff81d23c20 T rs600_hpd_sense +ffffffff81d23c80 T rs600_hpd_set_polarity +ffffffff81d23d40 T rs600_hpd_init +ffffffff81d23e20 T rs600_hpd_fini +ffffffff81d23ed0 T rs600_asic_reset +ffffffff81d24140 T rs600_gart_tlb_flush +ffffffff81d24200 T rs600_gart_get_page_entry +ffffffff81d24260 T rs600_gart_set_page +ffffffff81d242a0 T rs600_irq_set +ffffffff81d24480 T rs600_irq_disable +ffffffff81d24500 t rs600_irq_ack +ffffffff81d246b0 T rs600_irq_process +ffffffff81d24a10 T rs600_get_vblank_counter +ffffffff81d24a60 T rs600_mc_wait_for_idle +ffffffff81d24b00 T rs600_bandwidth_update +ffffffff81d24bf0 T rs600_mc_rreg +ffffffff81d24c70 T rs600_mc_wreg +ffffffff81d24ce0 T rs600_set_safe_registers +ffffffff81d24d20 T rs600_resume +ffffffff81d24e50 t rs600_startup +ffffffff81d25690 T rs600_suspend +ffffffff81d25790 T rs600_fini +ffffffff81d25890 t rs600_gart_fini +ffffffff81d25900 T rs600_init +ffffffff81d26000 T rs690_mc_wait_for_idle +ffffffff81d260a0 T rs690_pm_info +ffffffff81d26310 T rs690_line_buffer_adjust +ffffffff81d26430 T rs690_bandwidth_update +ffffffff81d26780 t rs690_crtc_bandwidth_compute +ffffffff81d26b70 t rs690_compute_mode_priority +ffffffff81d26ff0 T rs690_mc_rreg +ffffffff81d27080 T rs690_mc_wreg +ffffffff81d27100 T rs690_resume +ffffffff81d271f0 t rs690_startup +ffffffff81d274e0 T rs690_suspend +ffffffff81d27540 T rs690_fini +ffffffff81d275f0 T rs690_init +ffffffff81d28000 T rs780_dpm_enable +ffffffff81d28bf0 T rs780_dpm_disable +ffffffff81d28cd0 T rs780_dpm_set_power_state +ffffffff81d290b0 t rs780_force_voltage +ffffffff81d291f0 t rs780_enable_voltage_scaling +ffffffff81d293b0 T rs780_dpm_setup_asic +ffffffff81d293e0 T rs780_dpm_display_configuration_changed +ffffffff81d29530 T rs780_dpm_init +ffffffff81d29aa0 T rs780_dpm_print_power_state +ffffffff81d29b30 T rs780_dpm_fini +ffffffff81d29bc0 T rs780_dpm_get_sclk +ffffffff81d29c00 T rs780_dpm_get_mclk +ffffffff81d29c30 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81d29c60 T rs780_dpm_get_current_sclk +ffffffff81d29cf0 T rs780_dpm_get_current_mclk +ffffffff81d29d20 T rs780_dpm_force_performance_level +ffffffff81d29f10 t rs780_force_fbdiv +ffffffff81d2b000 T rv515_ring_start +ffffffff81d2baf0 T rv515_mc_wait_for_idle +ffffffff81d2bb90 T rv515_vga_render_disable +ffffffff81d2bbe0 T rv515_mc_rreg +ffffffff81d2bc70 T rv515_mc_wreg +ffffffff81d2bcf0 T rv515_debugfs +ffffffff81d2bd00 T rv515_mc_stop +ffffffff81d2c270 T rv515_mc_resume +ffffffff81d2c850 T rv515_clock_startup +ffffffff81d2c910 T rv515_resume +ffffffff81d2cb50 t rv515_startup +ffffffff81d2d020 T rv515_suspend +ffffffff81d2d090 T rv515_set_safe_registers +ffffffff81d2d0d0 T rv515_fini +ffffffff81d2d180 T rv515_init +ffffffff81d2d470 T atom_rv515_force_tv_scaler +ffffffff81d30b10 T rv515_bandwidth_avivo_update +ffffffff81d30cb0 t rv515_crtc_bandwidth_compute +ffffffff81d30fc0 t rv515_compute_mode_priority +ffffffff81d31490 T rv515_bandwidth_update +ffffffff81d32000 T rv6xx_dpm_enable +ffffffff81d32800 t rv6xx_calculate_stepping_parameters +ffffffff81d329e0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81d32fb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81d33080 t rv6xx_enable_dynamic_pcie_gen2 +ffffffff81d33240 T rv6xx_dpm_disable +ffffffff81d334b0 T rv6xx_dpm_set_power_state +ffffffff81d33ea0 T rv6xx_setup_asic +ffffffff81d33fe0 T rv6xx_dpm_display_configuration_changed +ffffffff81d34060 T rv6xx_dpm_init +ffffffff81d345a0 T rv6xx_dpm_print_power_state +ffffffff81d34660 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81d34690 T rv6xx_dpm_get_current_sclk +ffffffff81d34700 T rv6xx_dpm_get_current_mclk +ffffffff81d34770 T rv6xx_dpm_fini +ffffffff81d34800 T rv6xx_dpm_get_sclk +ffffffff81d34840 T rv6xx_dpm_get_mclk +ffffffff81d34880 T rv6xx_dpm_force_performance_level +ffffffff81d34a10 t rv6xx_generate_steps +ffffffff81d34d10 t rv6xx_output_stepping +ffffffff81d34e20 t rv6xx_program_mclk_stepping_entry +ffffffff81d35090 t rv6xx_program_engine_spread_spectrum +ffffffff81d35380 t rv6xx_step_sw_voltage +ffffffff81d36000 T rv730_populate_sclk_value +ffffffff81d36230 T rv730_populate_mclk_value +ffffffff81d36470 T rv730_read_clock_registers +ffffffff81d36590 T rv730_populate_smc_acpi_state +ffffffff81d36750 T rv730_populate_smc_initial_state +ffffffff81d36910 T rv730_program_memory_timing_parameters +ffffffff81d36af0 T rv730_start_dpm +ffffffff81d36b80 T rv730_stop_dpm +ffffffff81d36c40 T rv730_program_dcodt +ffffffff81d36d10 T rv730_get_odt_values +ffffffff81d37000 T rv740_get_decoded_reference_divider +ffffffff81d370a0 T rv740_get_dll_speed +ffffffff81d372b0 T rv740_populate_sclk_value +ffffffff81d374b0 T rv740_populate_mclk_value +ffffffff81d37860 T rv740_read_clock_registers +ffffffff81d37990 T rv740_populate_smc_acpi_state +ffffffff81d37bc0 T rv740_enable_mclk_spread_spectrum +ffffffff81d37c10 T rv740_get_mclk_frequency_ratio +ffffffff81d38000 T rv770_set_uvd_clocks +ffffffff81d38570 T rv770_get_xclk +ffffffff81d385d0 T rv770_page_flip +ffffffff81d388d0 T rv770_page_flip_pending +ffffffff81d38940 T rv770_get_temp +ffffffff81d389a0 T rv770_pm_misc +ffffffff81d38a80 T r700_cp_stop +ffffffff81d38b00 T r700_cp_fini +ffffffff81d38b90 T rv770_set_clk_bypass_mode +ffffffff81d38cb0 T r700_vram_gtt_location +ffffffff81d38e40 T rv770_resume +ffffffff81d38ed0 t rv770_init_golden_registers +ffffffff81d39060 t rv770_startup +ffffffff81d3ac30 T rv770_suspend +ffffffff81d3ae50 T rv770_init +ffffffff81d3b260 t rv770_pcie_gart_fini +ffffffff81d3b3e0 T rv770_fini +ffffffff81d3b680 t rv770_uvd_start +ffffffff81d3b740 t rv770_cp_load_microcode +ffffffff81d3ba10 t rv770_uvd_resume +ffffffff81d3c000 T rv770_copy_dma +ffffffff81d3d000 T rv770_get_ps +ffffffff81d3d030 T rv770_get_pi +ffffffff81d3d060 T evergreen_get_pi +ffffffff81d3d090 T rv770_restore_cgcg +ffffffff81d3d110 T rv770_stop_dpm +ffffffff81d3d1d0 T rv770_dpm_enabled +ffffffff81d3d210 T rv770_enable_thermal_protection +ffffffff81d3d270 T rv770_enable_acpi_pm +ffffffff81d3d2c0 T rv770_get_seq_value +ffffffff81d3d300 T rv770_write_smc_soft_register +ffffffff81d3d330 T rv770_populate_smc_t +ffffffff81d3d4d0 T rv770_populate_smc_sp +ffffffff81d3d530 T rv770_map_clkf_to_ibias +ffffffff81d3d590 T rv770_populate_vddc_value +ffffffff81d3d640 T rv770_populate_mvdd_value +ffffffff81d3d690 T rv770_calculate_memory_refresh_rate +ffffffff81d3d710 T rv770_enable_backbias +ffffffff81d3d770 T rv770_setup_bsp +ffffffff81d3d860 T rv770_program_git +ffffffff81d3d8b0 T rv770_program_tp +ffffffff81d3d930 T rv770_program_tpp +ffffffff81d3d970 T rv770_program_sstp +ffffffff81d3d9b0 T rv770_program_engine_speed_parameters +ffffffff81d3da00 T rv770_program_vc +ffffffff81d3da50 T rv770_clear_vc +ffffffff81d3da90 T rv770_upload_firmware +ffffffff81d3dad0 T rv770_populate_initial_mvdd_value +ffffffff81d3db20 T rv770_get_memory_module_index +ffffffff81d3db60 T rv770_enable_voltage_control +ffffffff81d3dbb0 T rv770_halt_smc +ffffffff81d3dc10 T rv770_resume_smc +ffffffff81d3dc60 T rv770_set_sw_state +ffffffff81d3dcc0 T rv770_set_boot_state +ffffffff81d3dd10 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81d3dd80 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81d3ddf0 T rv770_restrict_performance_levels_before_switch +ffffffff81d3de50 T rv770_dpm_force_performance_level +ffffffff81d3df10 T r7xx_start_smc +ffffffff81d3df40 T r7xx_stop_smc +ffffffff81d3df70 T rv770_read_voltage_smio_registers +ffffffff81d3dfb0 T rv770_reset_smio_status +ffffffff81d3e070 T rv770_get_memory_type +ffffffff81d3e0c0 T rv770_get_pcie_gen2_status +ffffffff81d3e130 T rv770_get_max_vddc +ffffffff81d3e190 T rv770_program_response_times +ffffffff81d3e2e0 T rv770_enable_auto_throttle_source +ffffffff81d3e460 T rv770_dpm_enable +ffffffff81d3f4e0 T rv770_dpm_late_enable +ffffffff81d3f610 T rv770_dpm_disable +ffffffff81d3f980 T rv770_dpm_set_power_state +ffffffff81d40070 t rv770_program_dcodt_after_state_switch +ffffffff81d400f0 T rv770_dpm_setup_asic +ffffffff81d40460 T rv770_dpm_display_configuration_changed +ffffffff81d404e0 T rv7xx_parse_power_table +ffffffff81d40a60 T rv770_get_engine_memory_ss +ffffffff81d40af0 T rv770_dpm_init +ffffffff81d40d30 T rv770_dpm_print_power_state +ffffffff81d40e50 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81d40e80 T rv770_dpm_get_current_sclk +ffffffff81d40ef0 T rv770_dpm_get_current_mclk +ffffffff81d40f60 T rv770_dpm_fini +ffffffff81d40ff0 T rv770_dpm_get_sclk +ffffffff81d41040 T rv770_dpm_get_mclk +ffffffff81d41090 T rv770_dpm_vblank_too_short +ffffffff81d41100 t rv770_convert_power_level_to_smc +ffffffff81d42000 T rv770_copy_bytes_to_smc +ffffffff81d42210 T rv770_start_smc +ffffffff81d42260 T rv770_reset_smc +ffffffff81d422b0 T rv770_stop_smc_clock +ffffffff81d42300 T rv770_start_smc_clock +ffffffff81d42350 T rv770_is_smc_running +ffffffff81d42390 T rv770_send_msg_to_smc +ffffffff81d42470 T rv770_wait_for_smc_inactive +ffffffff81d42510 T rv770_load_smc_ucode +ffffffff81d426a0 T rv770_read_smc_sram_dword +ffffffff81d42760 T rv770_write_smc_sram_dword +ffffffff81d43000 T si_get_allowed_info_register +ffffffff81d43090 T si_get_xclk +ffffffff81d43100 T si_get_temp +ffffffff81d43150 T si_mc_load_microcode +ffffffff81d43410 T dce6_bandwidth_update +ffffffff81d435d0 t dce6_line_buffer_adjust +ffffffff81d43780 t dce6_program_watermarks +ffffffff81d44230 T si_fence_ring_emit +ffffffff81d44690 T si_ring_ib_execute +ffffffff81d44e00 T si_gpu_check_soft_reset +ffffffff81d44fa0 T si_asic_reset +ffffffff81d45330 t si_gpu_pci_config_reset +ffffffff81d45650 T si_gfx_is_lockup +ffffffff81d456c0 T si_vram_gtt_location +ffffffff81d45760 T si_pcie_gart_tlb_flush +ffffffff81d457b0 T si_ib_parse +ffffffff81d45e60 T si_vm_init +ffffffff81d45ea0 T si_vm_fini +ffffffff81d45ed0 T si_vm_flush +ffffffff81d46570 T si_init_uvd_internal_cg +ffffffff81d465c0 T si_get_csb_size +ffffffff81d46650 T si_get_csb_buffer +ffffffff81d467d0 T si_rlc_reset +ffffffff81d46850 T si_irq_set +ffffffff81d46d40 t si_disable_interrupt_state +ffffffff81d46fc0 T si_irq_process +ffffffff81d482d0 t si_irq_ack +ffffffff81d488c0 T si_resume +ffffffff81d48950 t si_init_golden_registers +ffffffff81d48b10 t si_startup +ffffffff81d4af50 T si_suspend +ffffffff81d4b240 t si_fini_cg +ffffffff81d4b2e0 T si_init +ffffffff81d4c650 t si_cp_fini +ffffffff81d4c740 t si_irq_fini +ffffffff81d4c810 t si_pcie_gart_fini +ffffffff81d4c910 T si_fini +ffffffff81d4cb30 T si_get_gpu_clock_counter +ffffffff81d4cbf0 T si_set_uvd_clocks +ffffffff81d4d150 T si_set_vce_clocks +ffffffff81d4d690 t si_vce_send_vcepll_ctlreq +ffffffff81d4d8d0 t dce6_latency_watermark +ffffffff81d4db10 t si_rlc_stop +ffffffff81d4dcc0 t si_vm_reg_valid +ffffffff81d4de20 t si_vm_packet3_cp_dma_check +ffffffff81d4df90 t si_uvd_start +ffffffff81d4e050 t si_vce_start +ffffffff81d4e170 t si_irq_init +ffffffff81d4ec50 t si_cp_load_microcode +ffffffff81d4f030 t si_cp_resume +ffffffff81d4fef0 t si_uvd_resume +ffffffff81d4ffc0 t si_vce_resume +ffffffff81d500c0 t pcie_capability_set_word +ffffffff81d501d0 t pcie_capability_read_word +ffffffff81d50270 t pcie_capability_clear_and_set_word +ffffffff81d50390 t pcie_capability_write_word +ffffffff81d50450 t si_update_cg +ffffffff81d509c0 t si_enable_mgcg +ffffffff81d50de0 t si_enable_cgcg +ffffffff81d51170 t request_firmware +ffffffff81d51200 t release_firmware +ffffffff81d52000 T si_dma_is_lockup +ffffffff81d52080 T si_dma_vm_copy_pages +ffffffff81d52170 T si_dma_vm_write_pages +ffffffff81d522d0 T si_dma_vm_set_pages +ffffffff81d52440 T si_dma_vm_flush +ffffffff81d528b0 T si_copy_dma +ffffffff81d53000 T si_dpm_force_performance_level +ffffffff81d53160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81d531c0 T si_get_mclk_frequency_ratio +ffffffff81d53240 T si_trim_voltage_table_to_fit_state_table +ffffffff81d53350 T si_dpm_setup_asic +ffffffff81d53520 T si_fan_ctrl_get_fan_speed_percent +ffffffff81d535b0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81d53670 T si_fan_ctrl_set_mode +ffffffff81d538c0 T si_fan_ctrl_get_mode +ffffffff81d53910 T si_dpm_enable +ffffffff81d54c90 t si_init_smc_table +ffffffff81d55e40 t si_init_smc_spll_table +ffffffff81d55fc0 t si_init_arb_table_index +ffffffff81d56050 t si_populate_mc_reg_table +ffffffff81d56770 t si_initialize_smc_cac_tables +ffffffff81d583c0 t si_initialize_hardware_cac_manager +ffffffff81d58470 t si_initialize_smc_dte_tables +ffffffff81d58760 t si_populate_smc_tdp_limits +ffffffff81d58960 t si_populate_smc_tdp_limits_2 +ffffffff81d58a30 t si_program_response_times +ffffffff81d58b50 t si_program_ds_registers +ffffffff81d58be0 t si_dpm_start_smc +ffffffff81d58c10 t si_enable_auto_throttle_source +ffffffff81d58da0 t si_thermal_start_thermal_controller +ffffffff81d59270 T si_dpm_late_enable +ffffffff81d593c0 T si_dpm_disable +ffffffff81d59740 t si_enable_power_containment +ffffffff81d59810 t si_enable_smc_cac +ffffffff81d59970 T si_dpm_pre_set_power_state +ffffffff81d5a4e0 T si_dpm_set_power_state +ffffffff81d5aa40 t si_halt_smc +ffffffff81d5aaa0 t si_upload_sw_state +ffffffff81d5b400 t si_upload_smc_data +ffffffff81d5b540 t si_upload_ulv_state +ffffffff81d5b680 t si_upload_mc_reg_table +ffffffff81d5b8d0 t si_set_pcie_lane_width_in_smc +ffffffff81d5b970 t si_resume_smc +ffffffff81d5b9d0 t si_set_vce_clock +ffffffff81d5ba70 t si_notify_link_speed_change_after_state_change +ffffffff81d5bba0 t si_set_power_state_conditionally_enable_ulv +ffffffff81d5bc80 t si_power_control_set_level +ffffffff81d5be10 T si_dpm_post_set_power_state +ffffffff81d5be40 T si_dpm_display_configuration_changed +ffffffff81d5bf20 T si_dpm_init +ffffffff81d5d960 T si_dpm_fini +ffffffff81d5da10 T si_dpm_debugfs_print_current_performance_level +ffffffff81d5da60 T si_dpm_get_current_sclk +ffffffff81d5dad0 T si_dpm_get_current_mclk +ffffffff81d5db40 t si_do_program_memory_timing_parameters +ffffffff81d5dcd0 t si_populate_mvdd_value +ffffffff81d5dd50 t si_convert_power_level_to_smc +ffffffff81d5e5f0 t si_calculate_sclk_params +ffffffff81d5e820 t si_program_cac_config_registers +ffffffff81d5f000 T si_copy_bytes_to_smc +ffffffff81d5f240 T si_start_smc +ffffffff81d5f280 T si_reset_smc +ffffffff81d5f2c0 T si_program_jump_on_start +ffffffff81d5f2f0 T si_stop_smc_clock +ffffffff81d5f330 T si_start_smc_clock +ffffffff81d5f370 T si_is_smc_running +ffffffff81d5f3d0 T si_send_msg_to_smc +ffffffff81d5f4a0 T si_wait_for_smc_inactive +ffffffff81d5f540 T si_load_smc_ucode +ffffffff81d5f6e0 T si_read_smc_sram_dword +ffffffff81d5f7b0 T si_write_smc_sram_dword +ffffffff81d60000 T sumo_get_pi +ffffffff81d60030 T sumo_gfx_clockgating_initialize +ffffffff81d60110 T sumo_program_vc +ffffffff81d60150 T sumo_clear_vc +ffffffff81d60190 T sumo_program_sstp +ffffffff81d60210 T sumo_take_smu_control +ffffffff81d60240 T sumo_get_sleep_divider_from_id +ffffffff81d60270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d60320 T sumo_dpm_enable +ffffffff81d609b0 T sumo_dpm_late_enable +ffffffff81d60f70 T sumo_dpm_disable +ffffffff81d612c0 T sumo_dpm_pre_set_power_state +ffffffff81d617b0 T sumo_dpm_set_power_state +ffffffff81d62260 T sumo_dpm_post_set_power_state +ffffffff81d62300 T sumo_dpm_setup_asic +ffffffff81d62400 T sumo_dpm_display_configuration_changed +ffffffff81d62430 T sumo_convert_vid2_to_vid7 +ffffffff81d62480 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d62540 T sumo_construct_vid_mapping_table +ffffffff81d626b0 T sumo_dpm_init +ffffffff81d62f80 T sumo_dpm_print_power_state +ffffffff81d630a0 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d630d0 T sumo_dpm_get_current_sclk +ffffffff81d63140 T sumo_dpm_get_current_mclk +ffffffff81d63170 T sumo_dpm_get_current_vddc +ffffffff81d63240 T sumo_dpm_fini +ffffffff81d632d0 T sumo_dpm_get_sclk +ffffffff81d63320 T sumo_dpm_get_mclk +ffffffff81d63350 T sumo_dpm_force_performance_level +ffffffff81d63740 t sumo_power_level_enable +ffffffff81d63970 t sumo_program_power_level +ffffffff81d64000 T sumo_initialize_m3_arb +ffffffff81d642c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d64360 t sumo_send_msg_to_smu +ffffffff81d644f0 T sumo_smu_pg_init +ffffffff81d64510 T sumo_enable_boost_timer +ffffffff81d64640 T sumo_set_tdp_limit +ffffffff81d646c0 T sumo_boost_state_enable +ffffffff81d64710 T sumo_get_running_fw_version +ffffffff81d65000 T trinity_dpm_enable_bapm +ffffffff81d65080 T trinity_dpm_enable +ffffffff81d65520 T trinity_dpm_late_enable +ffffffff81d65a60 T trinity_dpm_disable +ffffffff81d65e50 T trinity_dpm_force_performance_level +ffffffff81d65f00 T trinity_dpm_pre_set_power_state +ffffffff81d664c0 T trinity_dpm_set_power_state +ffffffff81d66a30 T trinity_dpm_post_set_power_state +ffffffff81d66ad0 T trinity_dpm_setup_asic +ffffffff81d66b30 T trinity_dpm_display_configuration_changed +ffffffff81d66bc0 T trinity_dpm_init +ffffffff81d674b0 T trinity_dpm_print_power_state +ffffffff81d675c0 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d67650 T trinity_dpm_get_current_sclk +ffffffff81d676b0 T trinity_dpm_get_current_mclk +ffffffff81d676e0 T trinity_dpm_fini +ffffffff81d67780 T trinity_dpm_get_sclk +ffffffff81d677d0 T trinity_dpm_get_mclk +ffffffff81d67800 t trinity_program_power_level +ffffffff81d68000 T trinity_dpm_bapm_enable +ffffffff81d68150 T trinity_dpm_config +ffffffff81d68230 T trinity_dpm_force_state +ffffffff81d68310 T trinity_dpm_n_levels_disabled +ffffffff81d683f0 T trinity_uvd_dpm_config +ffffffff81d684c0 T trinity_dpm_no_forced_level +ffffffff81d68590 T trinity_dce_enable_voltage_adjustment +ffffffff81d686e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d687b0 T trinity_acquire_mutex +ffffffff81d68840 T trinity_release_mutex +ffffffff81d69000 T uvd_v1_0_get_rptr +ffffffff81d69040 T uvd_v1_0_get_wptr +ffffffff81d69080 T uvd_v1_0_set_wptr +ffffffff81d690c0 T uvd_v1_0_fence_emit +ffffffff81d694b0 T uvd_v1_0_resume +ffffffff81d69610 T uvd_v1_0_init +ffffffff81d69b90 T uvd_v1_0_start +ffffffff81d6a310 T uvd_v1_0_fini +ffffffff81d6a480 T uvd_v1_0_stop +ffffffff81d6a5f0 T uvd_v1_0_ring_test +ffffffff81d6a7c0 T uvd_v1_0_semaphore_emit +ffffffff81d6a7f0 T uvd_v1_0_ib_execute +ffffffff81d6a980 T uvd_v1_0_ib_test +ffffffff81d6b000 T uvd_v2_2_fence_emit +ffffffff81d6b450 T uvd_v2_2_semaphore_emit +ffffffff81d6b650 T uvd_v2_2_resume +ffffffff81d6c000 T uvd_v3_1_semaphore_emit +ffffffff81d6d000 T uvd_v4_2_resume +ffffffff81d6e000 T vce_v1_0_get_rptr +ffffffff81d6e090 T vce_v1_0_get_wptr +ffffffff81d6e120 T vce_v1_0_set_wptr +ffffffff81d6e1b0 T vce_v1_0_enable_mgcg +ffffffff81d6e470 T vce_v1_0_load_fw +ffffffff81d6e640 T vce_v1_0_bo_size +ffffffff81d6e6b0 T vce_v1_0_resume +ffffffff81d6f020 T vce_v1_0_start +ffffffff81d6f7e0 T vce_v1_0_init +ffffffff81d70000 T vce_v2_0_enable_mgcg +ffffffff81d70070 t vce_v2_0_set_dyn_cg +ffffffff81d70260 T vce_v2_0_bo_size +ffffffff81d702d0 T vce_v2_0_resume +ffffffff81d71000 T aldebaran_reset_init +ffffffff81d710c0 t aldebaran_async_reset +ffffffff81d71120 t aldebaran_get_reset_handler +ffffffff81d711c0 T aldebaran_reset_fini +ffffffff81d71220 t aldebaran_mode2_prepare_hwcontext +ffffffff81d71340 t aldebaran_mode2_perform_reset +ffffffff81d71510 t aldebaran_mode2_restore_hwcontext +ffffffff81d71ac0 t aldebaran_mode2_reset +ffffffff81d72000 T aldebaran_reg_base_init +ffffffff81d73000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d73040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d73070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d73180 T amdgpu_acpi_pcie_performance_request +ffffffff81d73500 T amdgpu_acpi_power_shift_control +ffffffff81d73640 T amdgpu_acpi_smart_shift_update +ffffffff81d736e0 T amdgpu_acpi_get_tmr_info +ffffffff81d73770 T amdgpu_acpi_get_mem_info +ffffffff81d73830 T amdgpu_acpi_init +ffffffff81d738e0 t amdgpu_acpi_event +ffffffff81d73bf0 T amdgpu_acpi_get_backlight_caps +ffffffff81d73c40 T amdgpu_acpi_fini +ffffffff81d73c60 T amdgpu_acpi_should_gpu_reset +ffffffff81d73cb0 T amdgpu_acpi_detect +ffffffff81d745f0 T amdgpu_acpi_release +ffffffff81d75000 T amdgpu_afmt_acr +ffffffff81d76000 T amdgpu_amdkfd_init +ffffffff81d76040 T amdgpu_amdkfd_fini +ffffffff81d76070 T amdgpu_amdkfd_device_probe +ffffffff81d760a0 T amdgpu_amdkfd_device_init +ffffffff81d76260 t amdgpu_amdkfd_reset_work +ffffffff81d762e0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d76330 T amdgpu_amdkfd_interrupt +ffffffff81d76360 T amdgpu_amdkfd_suspend +ffffffff81d76390 T amdgpu_amdkfd_resume +ffffffff81d763c0 T amdgpu_amdkfd_pre_reset +ffffffff81d763f0 T amdgpu_amdkfd_post_reset +ffffffff81d76420 T amdgpu_amdkfd_gpu_reset +ffffffff81d76480 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d76740 t amdgpu_bo_reserve +ffffffff81d768a0 t amdgpu_bo_unreserve +ffffffff81d76980 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d769f0 T amdgpu_amdkfd_alloc_gws +ffffffff81d76ad0 T amdgpu_amdkfd_free_gws +ffffffff81d76b10 T amdgpu_amdkfd_get_fw_version +ffffffff81d76bc0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d76d60 T amdgpu_amdkfd_xcp_memory_size +ffffffff81d76e00 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d76e40 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d76ea0 T amdgpu_amdkfd_get_cu_info +ffffffff81d76fb0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d77100 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d77170 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d77200 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d77360 T amdgpu_amdkfd_submit_ib +ffffffff81d774c0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d77510 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d77550 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d77680 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d776c0 T amdgpu_amdkfd_have_atomics_support +ffffffff81d776f0 T amdgpu_amdkfd_debug_mem_fence +ffffffff81d77710 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d77720 T amdgpu_amdkfd_send_close_event_drain_irq +ffffffff81d77740 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d77790 T amdgpu_amdkfd_check_and_lock_kfd +ffffffff81d777c0 T amdgpu_amdkfd_unlock_kfd +ffffffff81d777f0 T amdgpu_amdkfd_unmap_hiq +ffffffff81d78000 T amdgpu_atom_execute_table +ffffffff81d780a0 t amdgpu_atom_execute_table_locked +ffffffff81d783c0 T amdgpu_atom_parse +ffffffff81d78910 T amdgpu_atom_destroy +ffffffff81d78950 T amdgpu_atom_asic_init +ffffffff81d78a70 t get_u32 +ffffffff81d78ad0 T amdgpu_atom_parse_data_header +ffffffff81d78b70 T amdgpu_atom_parse_cmd_header +ffffffff81d78bf0 t atom_op_move +ffffffff81d78dc0 t atom_op_and +ffffffff81d78fa0 t atom_op_or +ffffffff81d79180 t atom_op_shift_left +ffffffff81d79360 t atom_op_shift_right +ffffffff81d79540 t atom_op_mul +ffffffff81d79690 t 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amdgpu_gart_init +ffffffff81db6000 T amdgpu_gem_fault +ffffffff81db61b0 T amdgpu_gem_vm_reference +ffffffff81db61e0 T amdgpu_gem_vm_detach +ffffffff81db61f0 T amdgpu_gem_object_create +ffffffff81db62b0 T amdgpu_gem_force_release +ffffffff81db6440 T amdgpu_gem_create_ioctl +ffffffff81db6900 t amdgpu_bo_reserve +ffffffff81db6a80 t amdgpu_bo_unreserve +ffffffff81db6b60 T amdgpu_gem_userptr_ioctl +ffffffff81db6b90 T amdgpu_mode_dumb_mmap +ffffffff81db6c50 T amdgpu_gem_mmap_ioctl +ffffffff81db6d10 T amdgpu_gem_timeout +ffffffff81db6de0 T amdgpu_gem_wait_idle_ioctl +ffffffff81db6f40 T amdgpu_gem_metadata_ioctl +ffffffff81db7080 T amdgpu_gem_va_map_flags +ffffffff81db7100 T amdgpu_gem_va_ioctl +ffffffff81db7400 t amdgpu_gem_va_update_vm +ffffffff81db74c0 T amdgpu_gem_op_ioctl +ffffffff81db76c0 T amdgpu_mode_dumb_create +ffffffff81db7870 T amdgpu_debugfs_gem_init +ffffffff81db78a0 t amdgpu_gem_object_free +ffffffff81db78f0 t amdgpu_gem_object_open +ffffffff81db79b0 t amdgpu_gem_object_close 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amdgpu_gfx_is_master_xcc +ffffffff81db9520 T amdgpu_queue_mask_bit_to_set_resource_bit +ffffffff81db9570 T amdgpu_gfx_enable_kcq +ffffffff81db97e0 T amdgpu_gfx_enable_kgq +ffffffff81db9970 T amdgpu_gfx_off_ctrl +ffffffff81db9b50 T amdgpu_set_gfx_off_residency +ffffffff81db9bc0 T amdgpu_get_gfx_off_residency +ffffffff81db9c30 T amdgpu_get_gfx_off_entrycount +ffffffff81db9ca0 T amdgpu_get_gfx_off_status +ffffffff81db9d10 T amdgpu_gfx_ras_late_init +ffffffff81db9de0 T amdgpu_gfx_ras_sw_init +ffffffff81db9ee0 T amdgpu_gfx_process_ras_data_cb +ffffffff81db9f60 T amdgpu_gfx_poison_consumption_handler +ffffffff81db9fb0 T amdgpu_gfx_cp_ecc_error_irq +ffffffff81dba050 T amdgpu_gfx_ras_error_func +ffffffff81dba160 T amdgpu_kiq_rreg +ffffffff81dba3e0 T amdgpu_kiq_wreg +ffffffff81dba620 T amdgpu_gfx_get_num_kcq +ffffffff81dba6a0 T amdgpu_gfx_cp_init_microcode +ffffffff81dba910 T amdgpu_gfx_sysfs_init +ffffffff81dba940 T amdgpu_gfx_sysfs_fini +ffffffff81dbb000 T amdgpu_gmc_pdb0_alloc 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amdgpu_gmc_vram_cpu_pa +ffffffff81dbc540 T amdgpu_gmc_vram_checking +ffffffff81dbc660 T amdgpu_gmc_sysfs_init +ffffffff81dbc690 T amdgpu_gmc_sysfs_fini +ffffffff81dbd000 T amdgpu_gtt_mgr_has_gart_addr +ffffffff81dbd030 T amdgpu_gtt_mgr_recover +ffffffff81dbd0b0 T amdgpu_gtt_mgr_init +ffffffff81dbd240 T amdgpu_gtt_mgr_fini +ffffffff81dbd3c0 t amdgpu_gtt_mgr_new +ffffffff81dbd550 t amdgpu_gtt_mgr_del +ffffffff81dbd5c0 t amdgpu_gtt_mgr_intersects +ffffffff81dbd600 t amdgpu_gtt_mgr_compatible +ffffffff81dbd640 t amdgpu_gtt_mgr_debug +ffffffff81dbe000 T amdgpu_hdp_ras_sw_init +ffffffff81dbf000 T amdgpu_bb_set_bits +ffffffff81dbf0c0 T amdgpu_bb_set_dir +ffffffff81dbf0f0 T amdgpu_bb_read_bits +ffffffff81dbf180 T amdgpu_acquire_bus +ffffffff81dbf350 T amdgpu_release_bus +ffffffff81dbf410 T amdgpu_send_start +ffffffff81dbf430 T amdgpu_send_stop +ffffffff81dbf450 T amdgpu_initiate_xfer +ffffffff81dbf470 T amdgpu_read_byte +ffffffff81dbf490 T amdgpu_write_byte +ffffffff81dbf4b0 T amdgpu_i2c_create +ffffffff81dbf660 T amdgpu_i2c_destroy +ffffffff81dbf6e0 T amdgpu_i2c_init +ffffffff81dbf720 T amdgpu_i2c_fini +ffffffff81dbf7d0 T amdgpu_i2c_add +ffffffff81dbf980 T amdgpu_i2c_lookup +ffffffff81dbfb50 T amdgpu_i2c_router_select_ddc_port +ffffffff81dbfdb0 T amdgpu_i2c_router_select_cd_port +ffffffff81dc1000 T amdgpu_ib_get +ffffffff81dc10f0 T amdgpu_ib_free +ffffffff81dc1110 T amdgpu_ib_schedule +ffffffff81dc18a0 T amdgpu_ib_pool_init +ffffffff81dc19c0 T amdgpu_ib_pool_fini +ffffffff81dc1a30 T amdgpu_ib_ring_tests +ffffffff81dc1be0 T amdgpu_debugfs_sa_init +ffffffff81dc2000 T amdgpu_pasid_alloc +ffffffff81dc2090 T amdgpu_pasid_free +ffffffff81dc20b0 T amdgpu_pasid_free_delayed +ffffffff81dc21c0 t amdgpu_pasid_free_cb +ffffffff81dc2200 T amdgpu_vmid_had_gpu_reset +ffffffff81dc2240 T amdgpu_vmid_grab +ffffffff81dc2aa0 T amdgpu_vmid_alloc_reserved +ffffffff81dc2b50 T amdgpu_vmid_free_reserved +ffffffff81dc2be0 T amdgpu_vmid_reset +ffffffff81dc2c60 T amdgpu_vmid_reset_all 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amdgpu_irq_gpu_reset_resume_helper +ffffffff81dc49a0 T amdgpu_irq_get +ffffffff81dc4aa0 T amdgpu_irq_put +ffffffff81dc4bd0 T amdgpu_irq_add_domain +ffffffff81dc4c00 T amdgpu_irq_remove_domain +ffffffff81dc4c20 T amdgpu_irq_create_mapping +ffffffff81dc5000 T amdgpu_job_alloc +ffffffff81dc5100 T amdgpu_job_alloc_with_ib +ffffffff81dc5240 T amdgpu_job_set_resources +ffffffff81dc5310 T amdgpu_job_free_resources +ffffffff81dc53d0 T amdgpu_job_set_gang_leader +ffffffff81dc5460 T amdgpu_job_free +ffffffff81dc5580 T amdgpu_job_submit +ffffffff81dc5670 T amdgpu_job_submit_direct +ffffffff81dc56f0 T amdgpu_job_stop_all_jobs_on_sched +ffffffff81dc5850 t amdgpu_job_prepare_job +ffffffff81dc5930 t amdgpu_job_run +ffffffff81dc5ad0 t amdgpu_job_timedout +ffffffff81dc5d10 t amdgpu_job_free_cb +ffffffff81dc6000 T amdgpu_jpeg_sw_init +ffffffff81dc60a0 t amdgpu_jpeg_idle_work_handler +ffffffff81dc61b0 T amdgpu_jpeg_sw_fini +ffffffff81dc6280 T amdgpu_jpeg_suspend +ffffffff81dc62f0 T amdgpu_jpeg_resume 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amdgpu_disable_vblank_kms +ffffffff81dca210 T amdgpu_debugfs_firmware_init +ffffffff81dcb000 T amdgpu_lsdma_wait_for +ffffffff81dcb0a0 T amdgpu_lsdma_copy_mem +ffffffff81dcb140 T amdgpu_lsdma_fill_mem +ffffffff81dcc000 T amdgpu_mca_query_correctable_error_count +ffffffff81dcc060 T amdgpu_mca_query_uncorrectable_error_count +ffffffff81dcc0c0 T amdgpu_mca_reset_error_count +ffffffff81dcc0e0 T amdgpu_mca_query_ras_error_count +ffffffff81dcc170 T amdgpu_mca_mp0_ras_sw_init +ffffffff81dcc240 T amdgpu_mca_mp1_ras_sw_init +ffffffff81dcc310 T amdgpu_mca_mpio_ras_sw_init +ffffffff81dcd000 T amdgpu_mes_doorbell_process_slice +ffffffff81dcd030 T amdgpu_mes_init +ffffffff81dcd410 T amdgpu_mes_fini +ffffffff81dcd490 T amdgpu_mes_create_process +ffffffff81dcd660 T amdgpu_mes_destroy_process +ffffffff81dcd920 T amdgpu_mes_add_gang +ffffffff81dcdb40 T amdgpu_mes_remove_gang +ffffffff81dcdc50 T amdgpu_mes_suspend +ffffffff81dcdd60 T amdgpu_mes_resume +ffffffff81dcde70 T amdgpu_mes_add_hw_queue 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amdgpu_nbio_get_pcie_replay_count +ffffffff81dd2120 T amdgpu_nbio_get_pcie_usage +ffffffff81dd2170 T amdgpu_nbio_ras_late_init +ffffffff81dd3000 T amdgpu_bo_is_amdgpu_bo +ffffffff81dd3070 t amdgpu_bo_destroy +ffffffff81dd3100 t amdgpu_bo_user_destroy +ffffffff81dd31a0 t amdgpu_bo_vm_destroy +ffffffff81dd32a0 T amdgpu_bo_placement_from_domain +ffffffff81dd3520 T amdgpu_bo_create_reserved +ffffffff81dd3870 T amdgpu_bo_unref +ffffffff81dd38c0 T amdgpu_bo_create +ffffffff81dd3d10 t amdgpu_bo_reserve +ffffffff81dd3f10 T amdgpu_bo_pin +ffffffff81dd3f30 T amdgpu_bo_gpu_offset +ffffffff81dd4110 T amdgpu_bo_kmap +ffffffff81dd41d0 T amdgpu_bo_unpin +ffffffff81dd4280 t amdgpu_bo_unreserve +ffffffff81dd4360 T amdgpu_bo_create_kernel +ffffffff81dd43d0 T amdgpu_bo_create_kernel_at +ffffffff81dd45e0 T amdgpu_bo_kunmap +ffffffff81dd4620 T amdgpu_bo_free_kernel +ffffffff81dd4790 T amdgpu_bo_support_uswc +ffffffff81dd47c0 t dma_resv_unlock +ffffffff81dd4860 T amdgpu_bo_create_user +ffffffff81dd48c0 T amdgpu_bo_create_vm +ffffffff81dd4940 T amdgpu_bo_add_to_shadow_list +ffffffff81dd4a10 T amdgpu_bo_ref +ffffffff81dd4a50 T amdgpu_bo_restore_shadow +ffffffff81dd4ae0 T amdgpu_bo_kptr +ffffffff81dd4b10 T amdgpu_bo_pin_restricted +ffffffff81dd4ec0 T amdgpu_bo_get_preferred_domain +ffffffff81dd4f20 T amdgpu_bo_init +ffffffff81dd5000 T amdgpu_bo_fini +ffffffff81dd5090 T amdgpu_bo_set_tiling_flags +ffffffff81dd5120 T amdgpu_bo_get_tiling_flags +ffffffff81dd5190 T amdgpu_bo_set_metadata +ffffffff81dd52d0 T amdgpu_bo_get_metadata +ffffffff81dd53a0 T amdgpu_bo_move_notify +ffffffff81dd5450 T amdgpu_bo_get_memory +ffffffff81dd55b0 T amdgpu_bo_release_notify +ffffffff81dd57a0 t dma_resv_trylock +ffffffff81dd5840 T amdgpu_bo_fence +ffffffff81dd58b0 T amdgpu_bo_fault_reserve_notify +ffffffff81dd5a00 T amdgpu_bo_sync_wait_resv +ffffffff81dd5aa0 T amdgpu_bo_sync_wait +ffffffff81dd5b50 T amdgpu_bo_gpu_offset_no_check +ffffffff81dd6000 T amdgpu_pll_compute +ffffffff81dd6590 T amdgpu_pll_get_use_mask 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amdgpu_xgmi_set_pstate +ffffffff81e150f0 T amdgpu_xgmi_update_topology +ffffffff81e151b0 T amdgpu_xgmi_get_hops_count +ffffffff81e15220 T amdgpu_xgmi_get_num_links +ffffffff81e15290 T amdgpu_xgmi_add_device +ffffffff81e154b0 T amdgpu_xgmi_remove_device +ffffffff81e15600 T amdgpu_xgmi_get_relative_phy_addr +ffffffff81e15640 t amdgpu_ras_error_inject_xgmi +ffffffff81e157c0 t amdgpu_xgmi_query_ras_error_count +ffffffff81e15e60 t amdgpu_xgmi_reset_ras_error_count +ffffffff81e16180 t amdgpu_xgmi_ras_late_init +ffffffff81e16200 T amdgpu_xgmi_ras_sw_init +ffffffff81e17000 T aqua_vanjaram_doorbell_index_init +ffffffff81e17120 T aqua_vanjaram_ip_map_init +ffffffff81e172a0 t aqua_vanjaram_logical_to_dev_inst +ffffffff81e17300 t aqua_vanjaram_logical_to_dev_mask +ffffffff81e173b0 T aqua_vanjaram_encode_ext_smn_addressing +ffffffff81e173f0 t aqua_vanjaram_switch_partition_mode +ffffffff81e177f0 t aqua_vanjaram_query_partition_mode +ffffffff81e17840 t aqua_vanjaram_get_xcp_ip_details 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dce_v10_0_bandwidth_update +ffffffff81e20920 t dce_v10_0_vblank_get_counter +ffffffff81e20970 t dce_v10_0_hpd_sense +ffffffff81e209d0 t dce_v10_0_hpd_set_polarity +ffffffff81e20aa0 t dce_v10_0_hpd_get_gpio_reg +ffffffff81e20ad0 t dce_v10_0_page_flip +ffffffff81e20bd0 t dce_v10_0_crtc_get_scanoutpos +ffffffff81e20c70 t dce_v10_0_encoder_add +ffffffff81e20ec0 t dce_v10_0_latency_watermark +ffffffff81e210f0 t dce_v10_0_encoder_destroy +ffffffff81e21150 t dce_v10_0_encoder_prepare +ffffffff81e21350 t dce_v10_0_encoder_commit +ffffffff81e21380 t dce_v10_0_encoder_mode_set +ffffffff81e222f0 t dce_v10_0_encoder_disable +ffffffff81e22400 t dce_v10_0_ext_dpms +ffffffff81e22430 t dce_v10_0_ext_prepare +ffffffff81e22460 t dce_v10_0_ext_commit +ffffffff81e22490 t dce_v10_0_ext_mode_set +ffffffff81e224c0 t dce_v10_0_ext_disable +ffffffff81e224f0 t dce_v10_0_set_crtc_irq_state +ffffffff81e225d0 t dce_v10_0_crtc_irq +ffffffff81e22810 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81e228e0 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81e229b0 t dce_v10_0_set_pageflip_irq_state +ffffffff81e22a60 t dce_v10_0_pageflip_irq +ffffffff81e22bc0 t dce_v10_0_set_hpd_irq_state +ffffffff81e22c90 t dce_v10_0_hpd_irq +ffffffff81e22dc0 t dce_v10_0_afmt_init +ffffffff81e22ed0 t dce_v10_0_audio_init +ffffffff81e22fa0 t INIT_DELAYED_WORK +ffffffff81e22fe0 t dce_v10_0_crtc_cursor_set2 +ffffffff81e232a0 t dce_v10_0_crtc_cursor_move +ffffffff81e23370 t dce_v10_0_crtc_gamma_set +ffffffff81e233b0 t dce_v10_0_crtc_destroy +ffffffff81e233e0 t amdgpu_bo_reserve +ffffffff81e235e0 t amdgpu_bo_unreserve +ffffffff81e236c0 t dce_v10_0_lock_cursor +ffffffff81e23720 t dce_v10_0_cursor_move_locked +ffffffff81e23880 t dce_v10_0_show_cursor +ffffffff81e23920 t dce_v10_0_crtc_load_lut +ffffffff81e23cb0 t dce_v10_0_crtc_dpms +ffffffff81e23e90 t dce_v10_0_crtc_prepare +ffffffff81e23ed0 t dce_v10_0_crtc_commit +ffffffff81e23f00 t dce_v10_0_crtc_mode_fixup +ffffffff81e240b0 t dce_v10_0_crtc_mode_set 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dce_v11_0_set_pageflip_irq_state +ffffffff81e28c60 t dce_v11_0_pageflip_irq +ffffffff81e28dc0 t dce_v11_0_set_hpd_irq_state +ffffffff81e28e90 t dce_v11_0_hpd_irq +ffffffff81e28fc0 t dce_v11_0_afmt_init +ffffffff81e290d0 t dce_v11_0_audio_init +ffffffff81e291d0 t INIT_DELAYED_WORK +ffffffff81e29210 t dce_v11_0_crtc_cursor_set2 +ffffffff81e294d0 t dce_v11_0_crtc_cursor_move +ffffffff81e295a0 t dce_v11_0_crtc_gamma_set +ffffffff81e295e0 t dce_v11_0_crtc_destroy +ffffffff81e29610 t amdgpu_bo_reserve +ffffffff81e29810 t amdgpu_bo_unreserve +ffffffff81e298f0 t dce_v11_0_lock_cursor +ffffffff81e29950 t dce_v11_0_cursor_move_locked +ffffffff81e29ab0 t dce_v11_0_show_cursor +ffffffff81e29b50 t dce_v11_0_crtc_load_lut +ffffffff81e29eb0 t dce_v11_0_crtc_dpms +ffffffff81e2a090 t dce_v11_0_crtc_prepare +ffffffff81e2a0d0 t dce_v11_0_crtc_commit +ffffffff81e2a100 t dce_v11_0_crtc_mode_fixup +ffffffff81e2a370 t dce_v11_0_crtc_mode_set +ffffffff81e2a5d0 t dce_v11_0_crtc_set_base +ffffffff81e2a5f0 t dce_v11_0_crtc_set_base_atomic +ffffffff81e2a610 t dce_v11_0_crtc_disable +ffffffff81e2a7b0 t dce_v11_0_crtc_do_set_base +ffffffff81e2aeb0 t __delayed_work_tick +ffffffff81e2b000 t df_v1_7_sw_init +ffffffff81e2b040 t df_v1_7_sw_fini +ffffffff81e2b070 t df_v1_7_enable_broadcast_mode +ffffffff81e2b1a0 t df_v1_7_get_fb_channel_number +ffffffff81e2b230 t df_v1_7_get_hbm_channel_number +ffffffff81e2b280 t df_v1_7_update_medium_grain_clock_gating +ffffffff81e2b400 t df_v1_7_get_clockgating_state +ffffffff81e2b490 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81e2c000 t df_v3_6_sw_init +ffffffff81e2c150 t df_v3_6_sw_fini +ffffffff81e2c180 t df_v3_6_enable_broadcast_mode +ffffffff81e2c2b0 t df_v3_6_get_fb_channel_number +ffffffff81e2c390 t df_v3_6_get_hbm_channel_number +ffffffff81e2c3e0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81e2c580 t df_v3_6_get_clockgating_state +ffffffff81e2c610 t df_v3_6_pmc_start +ffffffff81e2c910 t df_v3_6_pmc_stop +ffffffff81e2cbb0 t df_v3_6_pmc_get_count +ffffffff81e2cd40 t df_v3_6_get_fica +ffffffff81e2ce30 t df_v3_6_set_fica +ffffffff81e2cf10 t df_v3_6_query_ras_poison_mode +ffffffff81e2e000 t df_v4_3_query_ras_poison_mode +ffffffff81e2f000 T dimgrey_cavefish_reg_base_init +ffffffff81e30000 T emu_soc_asic_init +ffffffff81e31000 t gfx_v10_0_early_init +ffffffff81e31800 t gfx_v10_0_late_init +ffffffff81e31870 t gfx_v10_0_sw_init +ffffffff81e31d80 t gfx_v10_0_sw_fini +ffffffff81e31fa0 t gfx_v10_0_hw_init +ffffffff81e34d00 t gfx_v10_0_hw_fini +ffffffff81e34de0 t gfx_v10_0_suspend +ffffffff81e34e20 t gfx_v10_0_resume +ffffffff81e34e30 t gfx_v10_0_is_idle +ffffffff81e34ec0 t gfx_v10_0_wait_for_idle +ffffffff81e34fc0 t gfx_v10_0_soft_reset +ffffffff81e35320 t gfx_v10_0_set_clockgating_state +ffffffff81e355d0 t gfx_v10_0_set_powergating_state +ffffffff81e35690 t gfx_v10_0_get_clockgating_state +ffffffff81e357a0 t gfx_v10_0_get_gpu_clock_counter +ffffffff81e35cb0 t gfx_v10_0_select_se_sh +ffffffff81e35d50 t gfx_v10_0_read_wave_data +ffffffff81e35fb0 t gfx_v10_0_read_wave_vgprs +ffffffff81e35fe0 t gfx_v10_0_read_wave_sgprs +ffffffff81e36060 t gfx_v10_0_select_me_pipe_q +ffffffff81e36080 t gfx_v10_0_init_spm_golden_registers +ffffffff81e360f0 t gfx_v10_0_update_perfmon_mgcg +ffffffff81e36220 t wave_read_ind +ffffffff81e36310 t wave_read_regs +ffffffff81e36470 t gfx10_kiq_set_resources +ffffffff81e36790 t gfx10_kiq_map_queues +ffffffff81e36b20 t gfx10_kiq_unmap_queues +ffffffff81e36f20 t gfx10_kiq_query_status +ffffffff81e37210 t gfx10_kiq_invalidate_tlbs +ffffffff81e37330 t gfx_v10_0_ring_get_rptr_compute +ffffffff81e37360 t gfx_v10_0_ring_get_wptr_compute +ffffffff81e373d0 t gfx_v10_0_ring_set_wptr_compute +ffffffff81e37510 t gfx_v10_0_ring_emit_ib_compute +ffffffff81e37850 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81e37c80 t gfx_v10_0_ring_test_ring +ffffffff81e37ee0 t gfx_v10_0_ring_test_ib +ffffffff81e38170 t gfx_v10_0_ring_emit_rreg +ffffffff81e38400 t gfx_v10_0_ring_emit_wreg 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+ffffffff81e3aab0 t gfx_v10_0_write_data_to_reg +ffffffff81e3acc0 t gfx_v10_0_set_eop_interrupt_state +ffffffff81e3ada0 t gfx_v10_0_eop_irq +ffffffff81e3af50 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81e3b0f0 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81e3b2b0 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81e3b5a0 t gfx_v10_0_kiq_irq +ffffffff81e3b620 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81e3b760 t gfx_v10_0_priv_reg_irq +ffffffff81e3b7c0 t gfx_v10_0_handle_priv_fault +ffffffff81e3b920 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81e3ba60 t gfx_v10_0_priv_inst_irq +ffffffff81e3bac0 t gfx_v10_0_is_rlc_enabled +ffffffff81e3bb50 t gfx_v10_0_set_safe_mode +ffffffff81e3be00 t gfx_v10_0_unset_safe_mode +ffffffff81e3beb0 t gfx_v10_0_rlc_init +ffffffff81e3bed0 t gfx_v10_0_get_csb_size +ffffffff81e3bf00 t gfx_v10_0_get_csb_buffer +ffffffff81e3c070 t gfx_v10_0_rlc_resume +ffffffff81e3cae0 t gfx_v10_0_rlc_stop +ffffffff81e3cbc0 t gfx_v10_0_rlc_reset +ffffffff81e3cd70 t gfx_v10_0_rlc_start +ffffffff81e3cf20 t gfx_v10_0_update_spm_vmid +ffffffff81e3cf60 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81e3d880 t gfx_v10_0_init_csb +ffffffff81e3db60 t gfx_v10_0_update_spm_vmid_internal +ffffffff81e3dc80 t gfx_v10_0_rlc_backdoor_autoload_config_mec_cache +ffffffff81e3df50 t gfx_v10_0_is_rlcg_access_range +ffffffff81e3df80 t gfx_v10_0_gfx_mqd_init +ffffffff81e3e370 t gfx_v10_0_compute_mqd_init +ffffffff81e3e820 t gfx_v10_0_mec_init +ffffffff81e3ea30 t gfx_v10_0_compute_ring_init +ffffffff81e3eb70 t gfx_v10_0_rlc_backdoor_autoload_buffer_init +ffffffff81e3edd0 t gfx_v10_0_gpu_early_init +ffffffff81e3f030 t amdgpu_bo_unreserve +ffffffff81e3f110 t gfx_v10_0_cp_resume +ffffffff81e41b00 t gfx_v10_3_get_disabled_sa +ffffffff81e41c20 t gfx_v10_0_get_rb_active_bitmap +ffffffff81e41d50 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81e41e60 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81e41f70 t gfx_v10_0_cp_gfx_enable +ffffffff81e421e0 t gfx_v10_0_cp_compute_enable +ffffffff81e42380 t amdgpu_bo_reserve +ffffffff81e42500 t gfx_v10_0_kiq_init_register +ffffffff81e433a0 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81e434a0 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81e43780 t gfx_v10_0_cp_gfx_start +ffffffff81e44170 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81e444c0 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81e44c00 t gfx_v10_0_update_3d_clock_gating +ffffffff81e44ff0 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81e453d0 t gfx_v10_cntl_pg +ffffffff81e46000 t gfx_v11_0_early_init +ffffffff81e46750 t gfx_v11_0_late_init +ffffffff81e467c0 t gfx_v11_0_sw_init +ffffffff81e46d00 t gfx_v11_0_sw_fini +ffffffff81e46f10 t gfx_v11_0_hw_init +ffffffff81e4b320 t gfx_v11_0_hw_fini +ffffffff81e4b420 t gfx_v11_0_suspend +ffffffff81e4b460 t gfx_v11_0_resume +ffffffff81e4b470 t gfx_v11_0_is_idle +ffffffff81e4b500 t gfx_v11_0_wait_for_idle +ffffffff81e4b600 t gfx_v11_0_check_soft_reset +ffffffff81e4b730 t gfx_v11_0_soft_reset +ffffffff81e4c470 t gfx_v11_0_post_soft_reset +ffffffff81e4c480 t gfx_v11_0_set_clockgating_state +ffffffff81e4d0c0 t gfx_v11_0_set_powergating_state +ffffffff81e4d160 t gfx_v11_0_get_clockgating_state +ffffffff81e4d330 t gfx_v11_0_get_gpu_clock_counter +ffffffff81e4d6b0 t gfx_v11_0_select_se_sh +ffffffff81e4d750 t gfx_v11_0_read_wave_data +ffffffff81e4d990 t gfx_v11_0_read_wave_vgprs +ffffffff81e4d9c0 t gfx_v11_0_read_wave_sgprs +ffffffff81e4da40 t gfx_v11_0_select_me_pipe_q +ffffffff81e4da60 t gfx_v11_0_update_perf_clk +ffffffff81e4db90 t gfx_v11_0_get_gfx_shadow_info +ffffffff81e4dc00 t wave_read_ind +ffffffff81e4dcf0 t wave_read_regs +ffffffff81e4de50 t gfx11_kiq_set_resources +ffffffff81e4e170 t gfx11_kiq_map_queues +ffffffff81e4e500 t gfx11_kiq_unmap_queues +ffffffff81e4e900 t gfx11_kiq_query_status +ffffffff81e4ebf0 t gfx11_kiq_invalidate_tlbs +ffffffff81e4ed10 t gfx_v11_0_ring_get_rptr_compute +ffffffff81e4ed40 t gfx_v11_0_ring_get_wptr_compute +ffffffff81e4edb0 t gfx_v11_0_ring_set_wptr_compute +ffffffff81e4eef0 t gfx_v11_0_ring_emit_ib_compute +ffffffff81e4f230 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81e4f660 t gfx_v11_0_ring_test_ring +ffffffff81e4f8e0 t gfx_v11_0_ring_test_ib +ffffffff81e4fb80 t gfx_v11_0_ring_emit_rreg +ffffffff81e4fe10 t gfx_v11_0_ring_emit_wreg +ffffffff81e50040 t gfx_v11_0_ring_emit_reg_wait +ffffffff81e50090 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81e50100 t gfx_v11_0_wait_reg_mem +ffffffff81e50430 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81e50460 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81e50570 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81e50790 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81e50e20 t gfx_v11_0_ring_emit_fence +ffffffff81e511f0 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81e51250 t gfx_v11_0_ring_emit_vm_flush +ffffffff81e51420 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81e514f0 t gfx_v11_0_ring_emit_gds_switch +ffffffff81e515d0 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81e51800 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81e518c0 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81e51a20 t gfx_v11_0_ring_emit_gfx_shadow +ffffffff81e51de0 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81e51ef0 t gfx_v11_0_ring_soft_recovery +ffffffff81e51f60 t gfx_v11_0_ring_preempt_ib +ffffffff81e520d0 t gfx_v11_0_emit_mem_sync +ffffffff81e52400 t gfx_v11_0_write_data_to_reg +ffffffff81e52610 t gfx_v11_0_set_eop_interrupt_state +ffffffff81e526a0 t gfx_v11_0_eop_irq +ffffffff81e52850 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81e529f0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81e52b80 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81e52cc0 t gfx_v11_0_priv_reg_irq +ffffffff81e52d20 t gfx_v11_0_handle_priv_fault +ffffffff81e52e80 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81e52fc0 t gfx_v11_0_priv_inst_irq +ffffffff81e53020 t gfx_v11_0_rlc_gc_fed_irq +ffffffff81e53070 t gfx_v11_0_is_rlc_enabled +ffffffff81e53100 t gfx_v11_0_set_safe_mode +ffffffff81e53260 t gfx_v11_0_unset_safe_mode +ffffffff81e532d0 t gfx_v11_0_rlc_init +ffffffff81e53350 t gfx_v11_0_get_csb_size +ffffffff81e53380 t gfx_v11_0_get_csb_buffer +ffffffff81e534f0 t gfx_v11_0_rlc_resume +ffffffff81e54250 t gfx_v11_0_rlc_stop +ffffffff81e54330 t gfx_v11_0_rlc_reset +ffffffff81e544e0 t gfx_v11_0_rlc_start +ffffffff81e54690 t gfx_v11_0_update_spm_vmid +ffffffff81e54790 t gfx_v11_0_init_csb +ffffffff81e54920 t gfx_v11_0_gfx_mqd_init +ffffffff81e54d00 t gfx_v11_0_compute_mqd_init +ffffffff81e55230 t gfx_v11_0_mec_init +ffffffff81e55370 t gfx_v11_0_compute_ring_init +ffffffff81e554b0 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff81e556a0 t gfx_v11_0_gpu_early_init +ffffffff81e55770 t amdgpu_bo_unreserve +ffffffff81e55850 t gfx_v11_0_disable_gpa_mode +ffffffff81e559f0 t gfx_v11_0_cp_resume +ffffffff81e59810 t gfx_v11_0_config_me_cache +ffffffff81e59bd0 t gfx_v11_0_config_pfp_cache +ffffffff81e59f90 t gfx_v11_0_config_mec_cache +ffffffff81e5a350 t gfx_v11_0_get_sa_active_bitmap +ffffffff81e5a470 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81e5a580 t gfx_v11_0_cp_compute_enable +ffffffff81e5a760 t gfx_v11_0_cp_gfx_enable +ffffffff81e5a970 t amdgpu_bo_reserve +ffffffff81e5aaf0 t gfx_v11_0_kiq_init_register +ffffffff81e5b990 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81e5ba70 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81e5bc50 t gfx_v11_0_cp_gfx_start +ffffffff81e5c4d0 t gfx_v11_cntl_pg +ffffffff81e5d000 t gfx_v11_0_3_rlc_gc_fed_irq +ffffffff81e5d200 t gfx_v11_0_3_poison_consumption_handler +ffffffff81e5e000 t gfx_v8_0_early_init +ffffffff81e5e2f0 t gfx_v8_0_late_init +ffffffff81e5ea10 t gfx_v8_0_sw_init +ffffffff81e5edd0 t gfx_v8_0_sw_fini +ffffffff81e5ef70 t gfx_v8_0_hw_init +ffffffff81e61110 t gfx_v8_0_hw_fini +ffffffff81e615c0 t gfx_v8_0_suspend +ffffffff81e61600 t gfx_v8_0_resume +ffffffff81e61610 t gfx_v8_0_is_idle +ffffffff81e61680 t gfx_v8_0_wait_for_idle +ffffffff81e61730 t gfx_v8_0_check_soft_reset +ffffffff81e61810 t gfx_v8_0_pre_soft_reset +ffffffff81e61970 t gfx_v8_0_soft_reset +ffffffff81e61b30 t gfx_v8_0_post_soft_reset +ffffffff81e61cb0 t gfx_v8_0_set_clockgating_state +ffffffff81e61f30 t gfx_v8_0_set_powergating_state +ffffffff81e622e0 t gfx_v8_0_get_clockgating_state +ffffffff81e623c0 t gfx_v8_0_get_gpu_clock_counter +ffffffff81e62460 t gfx_v8_0_select_se_sh +ffffffff81e624c0 t gfx_v8_0_read_wave_data +ffffffff81e62960 t gfx_v8_0_read_wave_sgprs +ffffffff81e62a10 t gfx_v8_0_select_me_pipe_q +ffffffff81e62a30 t gfx_v8_0_ring_get_rptr +ffffffff81e62a60 t gfx_v8_0_ring_get_wptr_compute +ffffffff81e62a90 t gfx_v8_0_ring_set_wptr_compute +ffffffff81e62ad0 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81e62ef0 t gfx_v8_0_ring_test_ring +ffffffff81e630f0 t gfx_v8_0_ring_emit_rreg +ffffffff81e63380 t gfx_v8_0_ring_emit_wreg +ffffffff81e635b0 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81e63610 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81e63680 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81e63be0 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81e640d0 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81e643c0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81e64770 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81e64a90 t gfx_v8_0_ring_emit_gds_switch +ffffffff81e65240 t gfx_v8_0_ring_test_ib +ffffffff81e653f0 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81e65620 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81e656d0 t gfx_v8_ring_emit_sb +ffffffff81e657c0 t gfx_v8_ring_emit_cntxcntl +ffffffff81e65d60 t gfx_v8_0_ring_soft_recovery +ffffffff81e65d90 t gfx_v8_0_emit_mem_sync +ffffffff81e65f90 t gfx_v8_0_ring_emit_ib_compute +ffffffff81e66290 t gfx_v8_0_ring_emit_fence_compute +ffffffff81e66590 t gfx_v8_0_emit_mem_sync_compute +ffffffff81e66850 t gfx_v8_0_emit_wave_limit +ffffffff81e66a00 t gfx_v8_0_set_eop_interrupt_state +ffffffff81e66c10 t gfx_v8_0_eop_irq +ffffffff81e66d20 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81e66da0 t gfx_v8_0_priv_reg_irq +ffffffff81e66ea0 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81e66f20 t gfx_v8_0_priv_inst_irq +ffffffff81e67020 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81e67280 t gfx_v8_0_cp_ecc_error_irq +ffffffff81e672d0 t gfx_v8_0_set_sq_int_state +ffffffff81e67360 t gfx_v8_0_sq_irq +ffffffff81e673d0 t gfx_v8_0_parse_sq_irq +ffffffff81e67620 t gfx_v8_0_is_rlc_enabled +ffffffff81e67660 t gfx_v8_0_set_safe_mode +ffffffff81e67760 t gfx_v8_0_unset_safe_mode +ffffffff81e67800 t gfx_v8_0_rlc_init +ffffffff81e678b0 t gfx_v8_0_get_csb_size +ffffffff81e678e0 t gfx_v8_0_get_csb_buffer +ffffffff81e67a50 t gfx_v8_0_cp_jump_table_num +ffffffff81e67a90 t gfx_v8_0_rlc_resume +ffffffff81e67e10 t gfx_v8_0_rlc_stop +ffffffff81e67e80 t gfx_v8_0_rlc_reset +ffffffff81e67f00 t gfx_v8_0_rlc_start +ffffffff81e67f80 t gfx_v8_0_update_spm_vmid +ffffffff81e67ff0 t gfx_v8_0_init_save_restore_list +ffffffff81e68400 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81e68620 t gfx_v8_0_sq_irq_work_func +ffffffff81e68640 t gfx_v8_0_init_microcode +ffffffff81e68ec0 t gfx_v8_0_mec_init +ffffffff81e68fc0 t gfx_v8_0_compute_ring_init +ffffffff81e690f0 t gfx_v8_0_gpu_early_init +ffffffff81e69590 t amdgpu_bo_unreserve +ffffffff81e69670 t gfx_v8_0_kiq_resume +ffffffff81e69920 t gfx_v8_0_cp_gfx_resume +ffffffff81e6a3e0 t gfx_v8_0_kcq_resume +ffffffff81e6ada0 t amdgpu_bo_reserve +ffffffff81e6af20 t gfx_v8_0_mqd_commit +ffffffff81e6b100 t gfx_v8_0_mqd_init +ffffffff81e6b520 t gfx_v8_0_deactivate_hqd +ffffffff81e6b5e0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e6b920 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e6c000 t gfx_v9_0_ras_error_inject +ffffffff81e6c1b0 t gfx_v9_0_query_ras_error_count +ffffffff81e6cd80 t gfx_v9_0_reset_ras_error_count +ffffffff81e6d7b0 T gfx_v9_0_select_se_sh +ffffffff81e6d850 t gfx_v9_0_early_init +ffffffff81e6e380 t gfx_v9_0_late_init +ffffffff81e6f270 t gfx_v9_0_sw_init +ffffffff81e6f930 t gfx_v9_0_sw_fini +ffffffff81e6faf0 t gfx_v9_0_hw_init +ffffffff81e72ad0 t gfx_v9_0_hw_fini +ffffffff81e73280 t gfx_v9_0_suspend +ffffffff81e732c0 t gfx_v9_0_resume +ffffffff81e732d0 t gfx_v9_0_is_idle +ffffffff81e73350 t gfx_v9_0_wait_for_idle +ffffffff81e73440 t gfx_v9_0_soft_reset +ffffffff81e737e0 t gfx_v9_0_set_clockgating_state +ffffffff81e738b0 t gfx_v9_0_set_powergating_state +ffffffff81e73ca0 t gfx_v9_0_get_clockgating_state +ffffffff81e73db0 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e74540 t gfx_v9_0_read_wave_data +ffffffff81e74780 t gfx_v9_0_read_wave_vgprs +ffffffff81e747e0 t gfx_v9_0_read_wave_sgprs +ffffffff81e74810 t gfx_v9_0_select_me_pipe_q +ffffffff81e74830 t wave_read_ind +ffffffff81e74920 t wave_read_regs +ffffffff81e74a70 t gfx_v9_0_kiq_set_resources +ffffffff81e74d90 t gfx_v9_0_kiq_map_queues +ffffffff81e750d0 t gfx_v9_0_kiq_unmap_queues +ffffffff81e75400 t gfx_v9_0_kiq_query_status +ffffffff81e756f0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e75810 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e75840 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e758b0 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e75910 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e75d40 t gfx_v9_0_ring_test_ring +ffffffff81e75f70 t gfx_v9_0_ring_emit_rreg +ffffffff81e76200 t gfx_v9_0_ring_emit_wreg +ffffffff81e76430 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e76480 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e76520 t gfx_v9_0_wait_reg_mem +ffffffff81e76850 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e76880 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e76990 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e76ac0 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e77140 t gfx_v9_0_ring_emit_fence +ffffffff81e77500 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e77560 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e77670 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e77740 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e77820 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e77a50 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e77b10 t gfx_v9_ring_emit_sb +ffffffff81e77c00 t gfx_v9_ring_emit_cntxcntl +ffffffff81e780e0 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e781f0 t gfx_v9_0_ring_soft_recovery +ffffffff81e78260 t gfx_v9_0_ring_preempt_ib +ffffffff81e78420 t gfx_v9_0_emit_mem_sync +ffffffff81e786e0 t gfx_v9_0_write_data_to_reg +ffffffff81e788f0 t gfx_v9_0_ring_test_ib +ffffffff81e78aa0 t gfx_v9_0_ring_patch_cntl +ffffffff81e78ae0 t gfx_v9_0_ring_patch_ce_meta +ffffffff81e78be0 t gfx_v9_0_ring_patch_de_meta +ffffffff81e78cb0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e78fe0 t gfx_v9_0_emit_wave_limit +ffffffff81e791c0 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e793a0 t gfx_v9_0_eop_irq +ffffffff81e794e0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e796a0 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e797e0 t gfx_v9_0_priv_reg_irq +ffffffff81e798e0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e79a20 t gfx_v9_0_priv_inst_irq +ffffffff81e79b20 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e7a3b0 t gfx_v9_0_is_rlc_enabled +ffffffff81e7a440 t gfx_v9_0_set_safe_mode +ffffffff81e7a5a0 t gfx_v9_0_unset_safe_mode +ffffffff81e7a610 t gfx_v9_0_rlc_init +ffffffff81e7a680 t gfx_v9_0_get_csb_size +ffffffff81e7a6b0 t gfx_v9_0_get_csb_buffer +ffffffff81e7a7f0 t gfx_v9_0_cp_jump_table_num +ffffffff81e7a840 t gfx_v9_0_rlc_resume +ffffffff81e7bf50 t gfx_v9_0_rlc_stop +ffffffff81e7c2f0 t gfx_v9_0_rlc_reset +ffffffff81e7c490 t gfx_v9_0_rlc_start +ffffffff81e7c5e0 t gfx_v9_0_update_spm_vmid +ffffffff81e7c620 t gfx_v9_0_is_rlcg_access_range +ffffffff81e7c670 t gfx_v9_0_init_csb +ffffffff81e7c800 t gfx_v9_0_enable_lbpw +ffffffff81e7c8f0 t gfx_v9_0_update_spm_vmid_internal +ffffffff81e7ca10 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e7cca0 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e7cda0 t gfx_v9_0_mec_init +ffffffff81e7cf90 t gfx_v9_0_compute_ring_init +ffffffff81e7d0d0 t gfx_v9_0_gpu_early_init +ffffffff81e7d510 t amdgpu_bo_unreserve +ffffffff81e7d5f0 t gfx_v9_0_cp_gfx_enable +ffffffff81e7d6e0 t amdgpu_bo_reserve +ffffffff81e7d860 t gfx_v9_0_kiq_init_register +ffffffff81e7e540 t gfx_v9_0_mqd_init +ffffffff81e7ea90 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e7efc0 t gfx_v9_0_update_3d_clock_gating +ffffffff81e7f3b0 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e80000 t gfx_v9_4_query_ras_error_count +ffffffff81e80e00 t gfx_v9_4_query_ras_error_status +ffffffff81e80fe0 t gfx_v9_4_reset_ras_error_count +ffffffff81e82000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e82750 T gfx_v9_4_2_init_golden_registers +ffffffff81e827f0 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e828d0 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e82ab0 t gfx_v9_4_2_query_ras_error_count +ffffffff81e82b60 t gfx_v9_4_2_query_ras_error_status +ffffffff81e833c0 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e83420 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e838f0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e83b20 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e83ba0 t gfx_v9_4_2_run_shader +ffffffff81e83fa0 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e845f0 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e84930 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e84b10 t wave_read_ind +ffffffff81e85000 t gfx_v9_4_3_xcp_suspend +ffffffff81e850a0 t gfx_v9_4_3_xcp_resume +ffffffff81e851e0 t gfx_v9_4_3_query_ras_error_count +ffffffff81e85200 t gfx_v9_4_3_query_ras_error_status +ffffffff81e85220 t gfx_v9_4_3_reset_ras_error_count +ffffffff81e85240 t gfx_v9_4_3_reset_ras_error_status +ffffffff81e85260 t gfx_v9_4_3_enable_watchdog_timer +ffffffff81e85280 t gfx_v9_4_3_early_init +ffffffff81e85940 t gfx_v9_4_3_late_init +ffffffff81e859c0 t gfx_v9_4_3_sw_init +ffffffff81e85e20 t gfx_v9_4_3_sw_fini +ffffffff81e85fd0 t gfx_v9_4_3_hw_init +ffffffff81e86a70 t gfx_v9_4_3_hw_fini +ffffffff81e86b30 t gfx_v9_4_3_suspend +ffffffff81e86bf0 t gfx_v9_4_3_resume +ffffffff81e86c00 t gfx_v9_4_3_is_idle +ffffffff81e86db0 t gfx_v9_4_3_wait_for_idle +ffffffff81e86e40 t gfx_v9_4_3_soft_reset +ffffffff81e87550 t gfx_v9_4_3_set_clockgating_state +ffffffff81e876b0 t gfx_v9_4_3_set_powergating_state +ffffffff81e876e0 t gfx_v9_4_3_get_clockgating_state +ffffffff81e87850 t gfx_v9_4_3_kiq_set_resources +ffffffff81e87b70 t gfx_v9_4_3_kiq_map_queues +ffffffff81e87ed0 t gfx_v9_4_3_kiq_unmap_queues +ffffffff81e88250 t gfx_v9_4_3_kiq_query_status +ffffffff81e88540 t gfx_v9_4_3_kiq_invalidate_tlbs +ffffffff81e88660 t gfx_v9_4_3_ring_get_rptr_compute +ffffffff81e886a0 t gfx_v9_4_3_ring_get_wptr_compute +ffffffff81e88710 t gfx_v9_4_3_ring_set_wptr_compute +ffffffff81e88770 t gfx_v9_4_3_ring_emit_fence_kiq +ffffffff81e88bc0 t gfx_v9_4_3_ring_test_ring +ffffffff81e88e20 t gfx_v9_4_3_ring_emit_rreg +ffffffff81e890b0 t gfx_v9_4_3_ring_emit_wreg +ffffffff81e892e0 t gfx_v9_4_3_ring_emit_reg_wait +ffffffff81e89330 t gfx_v9_4_3_ring_emit_reg_write_reg_wait +ffffffff81e89350 t gfx_v9_4_3_wait_reg_mem +ffffffff81e89680 t gfx_v9_4_3_ring_emit_ib_compute +ffffffff81e899b0 t gfx_v9_4_3_ring_emit_fence +ffffffff81e89d60 t gfx_v9_4_3_ring_emit_pipeline_sync +ffffffff81e89dc0 t gfx_v9_4_3_ring_emit_vm_flush +ffffffff81e89de0 t gfx_v9_4_3_ring_emit_hdp_flush +ffffffff81e89eb0 t gfx_v9_4_3_ring_emit_gds_switch +ffffffff81e8a050 t gfx_v9_4_3_ring_test_ib +ffffffff81e8a200 t gfx_v9_4_3_emit_mem_sync +ffffffff81e8a4c0 t gfx_v9_4_3_emit_wave_limit +ffffffff81e8a6b0 t gfx_v9_4_3_write_data_to_reg +ffffffff81e8a8c0 t gfx_v9_4_3_set_eop_interrupt_state +ffffffff81e8aa30 t gfx_v9_4_3_eop_irq +ffffffff81e8abd0 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state +ffffffff81e8ad30 t gfx_v9_4_3_ih_to_xcc_inst +ffffffff81e8ae00 t gfx_v9_4_3_set_priv_reg_fault_state +ffffffff81e8b1e0 t gfx_v9_4_3_priv_reg_irq +ffffffff81e8b240 t gfx_v9_4_3_fault +ffffffff81e8b3c0 t gfx_v9_4_3_set_priv_inst_fault_state +ffffffff81e8b7a0 t gfx_v9_4_3_priv_inst_irq +ffffffff81e8b800 t gfx_v9_4_3_is_rlc_enabled +ffffffff81e8b920 t gfx_v9_4_3_xcc_set_safe_mode +ffffffff81e8bbc0 t gfx_v9_4_3_xcc_unset_safe_mode +ffffffff81e8bce0 t gfx_v9_4_3_rlc_init +ffffffff81e8bd30 t gfx_v9_4_3_rlc_resume +ffffffff81e8bdf0 t gfx_v9_4_3_rlc_stop +ffffffff81e8be90 t gfx_v9_4_3_rlc_reset +ffffffff81e8c520 t gfx_v9_4_3_rlc_start +ffffffff81e8c5c0 t gfx_v9_4_3_update_spm_vmid +ffffffff81e8c7d0 t gfx_v9_4_3_is_rlcg_access_range +ffffffff81e8c880 t gfx_v9_4_3_xcc_rlc_resume +ffffffff81e8d0d0 t gfx_v9_4_3_xcc_rlc_stop +ffffffff81e8d7f0 t gfx_v9_4_3_xcc_rlc_start +ffffffff81e8db80 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt +ffffffff81e8dda0 t gfx_v9_4_3_xcc_select_se_sh +ffffffff81e8dfa0 t gfx_v9_4_3_mec_init +ffffffff81e8e2a0 t gfx_v9_4_3_gpu_early_init +ffffffff81e8e4d0 t amdgpu_bo_unreserve +ffffffff81e8e5b0 t gfx_v9_4_3_get_gpu_clock_counter +ffffffff81e8e8f0 t gfx_v9_4_3_read_wave_data +ffffffff81e8ebc0 t gfx_v9_4_3_read_wave_vgprs +ffffffff81e8ebe0 t gfx_v9_4_3_read_wave_sgprs +ffffffff81e8ec30 t gfx_v9_4_3_select_me_pipe_q +ffffffff81e8eca0 t gfx_v9_4_3_switch_compute_partition +ffffffff81e8f000 t wave_read_ind +ffffffff81e8f200 t wave_read_regs +ffffffff81e8f490 t gfx_v9_4_3_xcc_constants_init +ffffffff81e90510 t gfx_v9_4_3_xcc_cp_resume +ffffffff81e914c0 t gfx_v9_4_3_xcc_cp_compute_enable +ffffffff81e91660 t amdgpu_bo_reserve +ffffffff81e917e0 t gfx_v9_4_3_xcc_kiq_init_register +ffffffff81e93420 t gfx_v9_4_3_xcc_mqd_init +ffffffff81e93e60 t gfx_v9_4_3_xcc_fini +ffffffff81e94400 t gfx_v9_4_3_xcc_q_fini_register +ffffffff81e94db0 t gfx_v9_4_3_xcc_update_sram_fgcg +ffffffff81e95020 t gfx_v9_4_3_xcc_update_repeater_fgcg +ffffffff81e95290 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating +ffffffff81e95de0 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating +ffffffff81e96640 t gfx_v9_4_3_inst_query_ras_err_count +ffffffff81e968a0 t gfx_v9_4_3_inst_query_ras_err_status +ffffffff81e97620 t gfx_v9_4_3_inst_reset_ras_err_count +ffffffff81e977e0 t gfx_v9_4_3_inst_reset_ras_err_status +ffffffff81e97f60 t gfx_v9_4_3_inst_enable_watchdog_timer +ffffffff81e99000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e99090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e991d0 t gfxhub_v1_0_gart_enable +ffffffff81e9a700 t gfxhub_v1_0_gart_disable +ffffffff81e9a9a0 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e9aaa0 t gfxhub_v1_0_init +ffffffff81e9b000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e9c000 t gfxhub_v1_2_get_mc_fb_offset +ffffffff81e9c120 t gfxhub_v1_2_setup_vm_pt_regs +ffffffff81e9c190 t gfxhub_v1_2_gart_enable +ffffffff81e9c220 t gfxhub_v1_2_gart_disable +ffffffff81e9c280 t gfxhub_v1_2_set_fault_enable_default +ffffffff81e9c2f0 t gfxhub_v1_2_init +ffffffff81e9c5f0 t gfxhub_v1_2_get_xgmi_info +ffffffff81e9c860 t gfxhub_v1_2_xcp_suspend +ffffffff81e9c8a0 t gfxhub_v1_2_xcp_resume +ffffffff81e9c910 t gfxhub_v1_2_xcc_setup_vm_pt_regs +ffffffff81e9cc30 t gfxhub_v1_2_xcc_gart_enable +ffffffff81ea0070 t gfxhub_v1_2_xcc_gart_disable +ffffffff81ea06e0 t gfxhub_v1_2_xcc_set_fault_enable_default +ffffffff81ea1000 t gfxhub_v2_0_get_fb_location +ffffffff81ea1090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81ea1120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81ea1260 t gfxhub_v2_0_gart_enable +ffffffff81ea2490 t gfxhub_v2_0_gart_disable +ffffffff81ea26e0 t gfxhub_v2_0_set_fault_enable_default +ffffffff81ea27e0 t gfxhub_v2_0_init +ffffffff81ea28b0 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81ea2a90 t gfxhub_v2_0_get_invalidate_req +ffffffff81ea3000 t gfxhub_v2_1_get_fb_location +ffffffff81ea3090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81ea3120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81ea3260 t gfxhub_v2_1_gart_enable +ffffffff81ea4560 t gfxhub_v2_1_gart_disable +ffffffff81ea47b0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81ea48d0 t gfxhub_v2_1_init +ffffffff81ea49a0 t gfxhub_v2_1_get_xgmi_info +ffffffff81ea4ae0 t gfxhub_v2_1_utcl2_harvest +ffffffff81ea4cc0 t gfxhub_v2_1_save_regs +ffffffff81ea5730 t gfxhub_v2_1_restore_regs +ffffffff81ea6350 t gfxhub_v2_1_halt +ffffffff81ea6720 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81ea6900 t gfxhub_v2_1_get_invalidate_req +ffffffff81ea7000 t gfxhub_v3_0_get_fb_location +ffffffff81ea7090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81ea7120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81ea7260 t gfxhub_v3_0_gart_enable +ffffffff81ea8560 t gfxhub_v3_0_gart_disable +ffffffff81ea8800 t gfxhub_v3_0_set_fault_enable_default +ffffffff81ea89d0 t gfxhub_v3_0_init +ffffffff81ea8aa0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81ea8c80 t gfxhub_v3_0_get_invalidate_req +ffffffff81ea9000 t gfxhub_v3_0_3_get_fb_location +ffffffff81ea9090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81ea9120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81ea9260 t gfxhub_v3_0_3_gart_enable +ffffffff81eaa450 t gfxhub_v3_0_3_gart_disable +ffffffff81eaa6f0 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81eaa810 t gfxhub_v3_0_3_init +ffffffff81eaa8e0 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81eaaac0 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81eab000 t gmc_v10_0_early_init +ffffffff81eab170 t gmc_v10_0_late_init +ffffffff81eab1e0 t gmc_v10_0_sw_init +ffffffff81eab5d0 t gmc_v10_0_sw_fini +ffffffff81eab620 t gmc_v10_0_hw_init +ffffffff81eab830 t gmc_v10_0_hw_fini +ffffffff81eab8f0 t gmc_v10_0_suspend +ffffffff81eab930 t gmc_v10_0_resume +ffffffff81eab990 t gmc_v10_0_is_idle +ffffffff81eab9c0 t gmc_v10_0_wait_for_idle +ffffffff81eab9f0 t gmc_v10_0_soft_reset +ffffffff81eaba20 t gmc_v10_0_set_clockgating_state +ffffffff81eabad0 t gmc_v10_0_set_powergating_state +ffffffff81eabb00 t gmc_v10_0_get_clockgating_state +ffffffff81eabba0 t gmc_v10_0_flush_gpu_tlb +ffffffff81eabe30 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81eac0e0 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81eac290 t gmc_v10_0_emit_pasid_mapping +ffffffff81eac310 t gmc_v10_0_map_mtype +ffffffff81eac360 t gmc_v10_0_get_vm_pde +ffffffff81eac450 t gmc_v10_0_get_vm_pte +ffffffff81eac530 t gmc_v10_0_get_vbios_fb_size +ffffffff81eac6a0 t gmc_v10_0_flush_vm_hub +ffffffff81eacad0 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81eacb70 t gmc_v10_0_process_interrupt +ffffffff81eace50 t gmc_v10_0_ecc_interrupt_state +ffffffff81eace80 t gmc_v10_0_gart_init +ffffffff81ead000 t gmc_v11_0_early_init +ffffffff81ead1f0 t gmc_v11_0_late_init +ffffffff81ead260 t gmc_v11_0_sw_init +ffffffff81ead570 t gmc_v11_0_sw_fini +ffffffff81ead5c0 t gmc_v11_0_hw_init +ffffffff81ead720 t gmc_v11_0_hw_fini +ffffffff81ead7c0 t gmc_v11_0_suspend +ffffffff81ead860 t gmc_v11_0_resume +ffffffff81ead8c0 t gmc_v11_0_is_idle +ffffffff81ead8f0 t gmc_v11_0_wait_for_idle +ffffffff81ead920 t gmc_v11_0_soft_reset +ffffffff81ead950 t gmc_v11_0_set_clockgating_state +ffffffff81ead9d0 t gmc_v11_0_set_powergating_state +ffffffff81eada00 t gmc_v11_0_get_clockgating_state +ffffffff81eada40 t gmc_v11_0_flush_gpu_tlb +ffffffff81eadef0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81eae160 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81eae310 t gmc_v11_0_emit_pasid_mapping +ffffffff81eae390 t gmc_v11_0_map_mtype +ffffffff81eae3e0 t gmc_v11_0_get_vm_pde +ffffffff81eae4e0 t gmc_v11_0_get_vm_pte +ffffffff81eae5c0 t gmc_v11_0_get_vbios_fb_size +ffffffff81eae730 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81eae7d0 t gmc_v11_0_process_interrupt +ffffffff81eaea00 t gmc_v11_0_ecc_interrupt_state +ffffffff81eaea30 t gmc_v11_0_gart_init +ffffffff81eaf000 t gmc_v7_0_early_init +ffffffff81eaf0a0 t gmc_v7_0_late_init +ffffffff81eaf0f0 t gmc_v7_0_sw_init +ffffffff81eaf520 t gmc_v7_0_sw_fini +ffffffff81eaf5a0 t gmc_v7_0_hw_init +ffffffff81eaff20 t gmc_v7_0_hw_fini +ffffffff81eaffe0 t gmc_v7_0_suspend +ffffffff81eb0020 t gmc_v7_0_resume +ffffffff81eb0080 t gmc_v7_0_is_idle +ffffffff81eb00d0 t gmc_v7_0_wait_for_idle +ffffffff81eb0170 t gmc_v7_0_soft_reset +ffffffff81eb03d0 t gmc_v7_0_set_clockgating_state +ffffffff81eb0630 t gmc_v7_0_set_powergating_state +ffffffff81eb0660 t gmc_v7_0_flush_gpu_tlb +ffffffff81eb0690 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81eb0750 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81eb07f0 t gmc_v7_0_emit_pasid_mapping +ffffffff81eb0820 t gmc_v7_0_set_prt +ffffffff81eb09e0 t gmc_v7_0_get_vm_pde +ffffffff81eb0a40 t gmc_v7_0_get_vm_pte +ffffffff81eb0a80 t gmc_v7_0_get_vbios_fb_size +ffffffff81eb0af0 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81eb0bc0 t gmc_v7_0_process_interrupt +ffffffff81eb0e70 t gmc_v7_0_gart_init +ffffffff81eb1000 t gmc_v8_0_early_init +ffffffff81eb10a0 t gmc_v8_0_late_init +ffffffff81eb10f0 t gmc_v8_0_sw_init +ffffffff81eb16a0 t gmc_v8_0_sw_fini +ffffffff81eb1720 t gmc_v8_0_hw_init +ffffffff81eb23b0 t gmc_v8_0_hw_fini +ffffffff81eb2470 t gmc_v8_0_suspend +ffffffff81eb24b0 t gmc_v8_0_resume +ffffffff81eb2510 t gmc_v8_0_is_idle +ffffffff81eb2560 t gmc_v8_0_wait_for_idle +ffffffff81eb2600 t gmc_v8_0_check_soft_reset +ffffffff81eb2670 t gmc_v8_0_pre_soft_reset +ffffffff81eb27e0 t gmc_v8_0_soft_reset +ffffffff81eb28b0 t gmc_v8_0_post_soft_reset +ffffffff81eb2920 t gmc_v8_0_set_clockgating_state +ffffffff81eb2ee0 t gmc_v8_0_set_powergating_state +ffffffff81eb2f10 t gmc_v8_0_get_clockgating_state +ffffffff81eb2f80 t gmc_v8_0_flush_gpu_tlb +ffffffff81eb2fb0 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81eb3070 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81eb3110 t gmc_v8_0_emit_pasid_mapping +ffffffff81eb3140 t gmc_v8_0_set_prt +ffffffff81eb3300 t gmc_v8_0_get_vm_pde +ffffffff81eb3360 t gmc_v8_0_get_vm_pte +ffffffff81eb33b0 t gmc_v8_0_get_vbios_fb_size +ffffffff81eb3420 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81eb34f0 t gmc_v8_0_process_interrupt +ffffffff81eb3890 t gmc_v8_0_gart_init +ffffffff81eb4000 T gmc_v9_0_restore_registers +ffffffff81eb4160 t gmc_v9_0_early_init +ffffffff81eb4510 t gmc_v9_0_late_init +ffffffff81eb4620 t gmc_v9_0_sw_init +ffffffff81eb4d80 t gmc_v9_0_sw_fini +ffffffff81eb4e40 t gmc_v9_0_hw_init +ffffffff81eb5300 t gmc_v9_0_hw_fini +ffffffff81eb53e0 t gmc_v9_0_suspend +ffffffff81eb5420 t gmc_v9_0_resume +ffffffff81eb5480 t gmc_v9_0_is_idle +ffffffff81eb54b0 t gmc_v9_0_wait_for_idle +ffffffff81eb54e0 t gmc_v9_0_soft_reset +ffffffff81eb5510 t gmc_v9_0_set_clockgating_state +ffffffff81eb5570 t gmc_v9_0_set_powergating_state +ffffffff81eb55a0 t gmc_v9_0_get_clockgating_state +ffffffff81eb55e0 t gmc_v9_0_flush_gpu_tlb +ffffffff81eb5c80 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81eb6030 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81eb6230 t gmc_v9_0_emit_pasid_mapping +ffffffff81eb62b0 t gmc_v9_0_map_mtype +ffffffff81eb62f0 t gmc_v9_0_get_vm_pde +ffffffff81eb63f0 t gmc_v9_0_get_vm_pte +ffffffff81eb6720 t gmc_v9_0_override_vm_pte_flags +ffffffff81eb67e0 t gmc_v9_0_get_vbios_fb_size +ffffffff81eb6980 t gmc_v9_0_query_memory_partition +ffffffff81eb69e0 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81eb6e80 t gmc_v9_0_process_interrupt +ffffffff81eb76a0 t gmc_v9_0_ecc_interrupt_state +ffffffff81eb7800 t gmc_v9_0_init_mem_ranges +ffffffff81eb7c30 t gmc_v9_0_gart_init +ffffffff81eb7d60 t gmc_v9_0_save_registers +ffffffff81eb8000 t hdp_v4_0_query_ras_error_count +ffffffff81eb80c0 t hdp_v4_0_reset_ras_error_count +ffffffff81eb81e0 t hdp_v4_0_flush_hdp +ffffffff81eb8230 t hdp_v4_0_invalidate_hdp +ffffffff81eb8310 t hdp_v4_0_update_clock_gating +ffffffff81eb8410 t hdp_v4_0_get_clockgating_state +ffffffff81eb8460 t hdp_v4_0_init_registers +ffffffff81eb9000 t hdp_v5_0_flush_hdp +ffffffff81eb9050 t hdp_v5_0_invalidate_hdp +ffffffff81eb90f0 t hdp_v5_0_update_clock_gating +ffffffff81eb94f0 t hdp_v5_0_get_clockgating_state +ffffffff81eb9610 t hdp_v5_0_init_registers +ffffffff81eba000 t hdp_v5_2_flush_hdp +ffffffff81eba050 t hdp_v5_2_update_clock_gating +ffffffff81eba460 t hdp_v5_2_get_clockgating_state +ffffffff81ebb000 t hdp_v6_0_flush_hdp +ffffffff81ebb050 t hdp_v6_0_update_clock_gating +ffffffff81ebb380 t hdp_v6_0_get_clockgating_state +ffffffff81ebc000 t iceland_ih_early_init +ffffffff81ebc050 t iceland_ih_sw_init +ffffffff81ebc0b0 t iceland_ih_sw_fini +ffffffff81ebc0f0 t iceland_ih_hw_init +ffffffff81ebc310 t iceland_ih_hw_fini +ffffffff81ebc3e0 t iceland_ih_suspend +ffffffff81ebc4b0 t iceland_ih_resume +ffffffff81ebc4f0 t iceland_ih_is_idle +ffffffff81ebc540 t iceland_ih_wait_for_idle +ffffffff81ebc5e0 t iceland_ih_soft_reset +ffffffff81ebc6c0 t iceland_ih_set_clockgating_state +ffffffff81ebc6f0 t iceland_ih_set_powergating_state +ffffffff81ebc720 t iceland_ih_get_wptr +ffffffff81ebc830 t iceland_ih_decode_iv +ffffffff81ebc8b0 t iceland_ih_set_rptr +ffffffff81ebd000 t ih_v6_0_early_init +ffffffff81ebd050 t ih_v6_0_sw_init +ffffffff81ebd1b0 t ih_v6_0_sw_fini +ffffffff81ebd1f0 t ih_v6_0_hw_init +ffffffff81ebd7a0 t ih_v6_0_hw_fini +ffffffff81ebd800 t ih_v6_0_suspend +ffffffff81ebd860 t ih_v6_0_resume +ffffffff81ebd870 t ih_v6_0_is_idle +ffffffff81ebd8a0 t ih_v6_0_wait_for_idle +ffffffff81ebd8d0 t ih_v6_0_soft_reset +ffffffff81ebd900 t ih_v6_0_set_clockgating_state +ffffffff81ebda30 t ih_v6_0_set_powergating_state +ffffffff81ebdbb0 t ih_v6_0_get_clockgating_state +ffffffff81ebdc40 t ih_v6_0_get_wptr +ffffffff81ebdd60 t ih_v6_0_set_rptr +ffffffff81ebde30 t ih_v6_0_self_irq +ffffffff81ebdea0 t ih_v6_0_toggle_interrupts +ffffffff81ebe080 t force_update_wptr_for_self_int +ffffffff81ebf000 t ih_v6_1_early_init +ffffffff81ebf050 t ih_v6_1_sw_init +ffffffff81ebf1b0 t ih_v6_1_sw_fini +ffffffff81ebf1f0 t ih_v6_1_hw_init +ffffffff81ebf7a0 t ih_v6_1_hw_fini +ffffffff81ebf800 t ih_v6_1_suspend +ffffffff81ebf860 t ih_v6_1_resume +ffffffff81ebf870 t ih_v6_1_is_idle +ffffffff81ebf8a0 t ih_v6_1_wait_for_idle +ffffffff81ebf8d0 t ih_v6_1_soft_reset +ffffffff81ebf900 t ih_v6_1_set_clockgating_state +ffffffff81ebfa30 t ih_v6_1_set_powergating_state +ffffffff81ebfbb0 t ih_v6_1_get_clockgating_state +ffffffff81ebfc40 t ih_v6_1_get_wptr +ffffffff81ebfd60 t ih_v6_1_set_rptr +ffffffff81ebfe30 t ih_v6_1_self_irq +ffffffff81ebfea0 t ih_v6_1_toggle_interrupts +ffffffff81ec0080 t force_update_wptr_for_self_int +ffffffff81ec1000 t imu_v11_0_init_microcode +ffffffff81ec1170 t imu_v11_0_load_microcode +ffffffff81ec14f0 t imu_v11_0_setup +ffffffff81ec1780 t imu_v11_0_start +ffffffff81ec1880 t imu_v11_0_program_rlc_ram +ffffffff81ec1a40 t imu_v11_0_wait_for_reset_status +ffffffff81ec1b90 t program_imu_rlc_ram +ffffffff81ec2000 T imu_v11_0_3_program_rlc_ram +ffffffff81ec3000 T jpeg_v1_0_early_init +ffffffff81ec3080 T jpeg_v1_0_sw_init +ffffffff81ec3170 T jpeg_v1_0_sw_fini +ffffffff81ec3190 T jpeg_v1_0_start +ffffffff81ec3c40 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81ec3cd0 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81ec3d60 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81ec3dd0 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81ec46f0 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81ec5030 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81ec50a0 t jpeg_v1_0_decode_ring_nop +ffffffff81ec5200 t jpeg_v1_0_decode_ring_insert_start +ffffffff81ec53c0 t jpeg_v1_0_decode_ring_insert_end +ffffffff81ec5580 t jpeg_v1_0_ring_begin_use +ffffffff81ec5680 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81ec58e0 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81ec5d00 t jpeg_v1_0_set_interrupt_state +ffffffff81ec5d30 t jpeg_v1_0_process_interrupt +ffffffff81ec6000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81ec61a0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81ec6340 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81ec6a20 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81ec71d0 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81ec7580 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81ec75f0 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81ec7830 T jpeg_v2_0_dec_ring_nop +ffffffff81ec7990 t jpeg_v2_0_early_init +ffffffff81ec7a20 t jpeg_v2_0_sw_init +ffffffff81ec7b50 t jpeg_v2_0_sw_fini +ffffffff81ec7ba0 t jpeg_v2_0_hw_init +ffffffff81ec7c20 t jpeg_v2_0_hw_fini +ffffffff81ec7d00 t jpeg_v2_0_suspend +ffffffff81ec7d30 t jpeg_v2_0_resume +ffffffff81ec7dc0 t jpeg_v2_0_is_idle +ffffffff81ec7e50 t jpeg_v2_0_wait_for_idle +ffffffff81ec7e90 t jpeg_v2_0_set_clockgating_state +ffffffff81ec7f40 t jpeg_v2_0_set_powergating_state +ffffffff81ec8660 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81ec86f0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81ec8790 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81ec8830 t jpeg_v2_0_set_interrupt_state +ffffffff81ec8860 t jpeg_v2_0_process_interrupt +ffffffff81ec88f0 t jpeg_v2_0_enable_clock_gating +ffffffff81ec8aa0 t jpeg_v2_0_disable_clock_gating +ffffffff81ec9000 t jpeg_v2_6_query_ras_poison_status +ffffffff81ec9150 t jpeg_v2_5_early_init +ffffffff81ec9350 t jpeg_v2_5_sw_init +ffffffff81ec95f0 t jpeg_v2_5_sw_fini +ffffffff81ec9640 t jpeg_v2_5_hw_init +ffffffff81ec9730 t jpeg_v2_5_hw_fini +ffffffff81ec98b0 t jpeg_v2_5_suspend +ffffffff81ec98e0 t jpeg_v2_5_resume +ffffffff81ec99e0 t jpeg_v2_5_is_idle +ffffffff81ec9ae0 t jpeg_v2_5_wait_for_idle +ffffffff81ec9b90 t jpeg_v2_5_set_clockgating_state +ffffffff81ec9c40 t jpeg_v2_5_set_powergating_state +ffffffff81eca370 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81eca410 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81eca4c0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81eca570 t jpeg_v2_6_dec_ring_insert_start +ffffffff81eca730 t jpeg_v2_6_dec_ring_insert_end +ffffffff81eca8f0 t jpeg_v2_5_set_interrupt_state +ffffffff81eca920 t jpeg_v2_5_process_interrupt +ffffffff81eca9e0 t jpeg_v2_6_set_ras_interrupt_state +ffffffff81ecaa10 t jpeg_v2_5_enable_clock_gating +ffffffff81ecaaf0 t jpeg_v2_5_disable_clock_gating +ffffffff81ecb000 t jpeg_v3_0_early_init +ffffffff81ecb110 t jpeg_v3_0_sw_init +ffffffff81ecb240 t jpeg_v3_0_sw_fini +ffffffff81ecb290 t jpeg_v3_0_hw_init +ffffffff81ecb310 t jpeg_v3_0_hw_fini +ffffffff81ecb3f0 t jpeg_v3_0_suspend +ffffffff81ecb420 t jpeg_v3_0_resume +ffffffff81ecb4b0 t jpeg_v3_0_is_idle +ffffffff81ecb540 t jpeg_v3_0_wait_for_idle +ffffffff81ecb580 t jpeg_v3_0_set_clockgating_state +ffffffff81ecb630 t jpeg_v3_0_set_powergating_state +ffffffff81ecbe10 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81ecbea0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81ecbf40 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81ecbfe0 t jpeg_v3_0_set_interrupt_state +ffffffff81ecc010 t jpeg_v3_0_process_interrupt +ffffffff81ecc0a0 t jpeg_v3_0_enable_clock_gating +ffffffff81ecc170 t jpeg_v3_0_disable_clock_gating +ffffffff81ecd000 t jpeg_v4_0_query_ras_poison_status +ffffffff81ecd150 t jpeg_v4_0_early_init +ffffffff81ecd220 t jpeg_v4_0_sw_init +ffffffff81ecd3c0 t jpeg_v4_0_sw_fini +ffffffff81ecd410 t jpeg_v4_0_hw_init +ffffffff81ecda40 t jpeg_v4_0_hw_fini +ffffffff81ecdb10 t jpeg_v4_0_suspend +ffffffff81ecdb40 t jpeg_v4_0_resume +ffffffff81ecdb90 t jpeg_v4_0_is_idle +ffffffff81ecdc20 t jpeg_v4_0_wait_for_idle +ffffffff81ecdc60 t jpeg_v4_0_set_clockgating_state +ffffffff81ecdd10 t jpeg_v4_0_set_powergating_state +ffffffff81ece470 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81ece500 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81ece5a0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81ece640 t jpeg_v4_0_set_interrupt_state +ffffffff81ece670 t jpeg_v4_0_process_interrupt +ffffffff81ece710 t jpeg_v4_0_set_ras_interrupt_state +ffffffff81ece740 t jpeg_v4_0_enable_clock_gating +ffffffff81ece900 t jpeg_v4_0_disable_clock_gating +ffffffff81ecf000 t jpeg_v4_0_3_early_init +ffffffff81ecf170 t jpeg_v4_0_3_sw_init +ffffffff81ecf4a0 t jpeg_v4_0_3_sw_fini +ffffffff81ecf4f0 t jpeg_v4_0_3_hw_init +ffffffff81ecff50 t jpeg_v4_0_3_hw_fini +ffffffff81ecffe0 t jpeg_v4_0_3_suspend +ffffffff81ed0060 t jpeg_v4_0_3_resume +ffffffff81ed00b0 t jpeg_v4_0_3_is_idle +ffffffff81ed0290 t jpeg_v4_0_3_wait_for_idle +ffffffff81ed03e0 t jpeg_v4_0_3_set_clockgating_state +ffffffff81ed0470 t jpeg_v4_0_3_set_powergating_state +ffffffff81ed10d0 t jpeg_v4_0_3_dec_ring_get_rptr +ffffffff81ed1240 t jpeg_v4_0_3_dec_ring_get_wptr +ffffffff81ed13d0 t jpeg_v4_0_3_dec_ring_set_wptr +ffffffff81ed1570 t jpeg_v4_0_3_dec_ring_emit_ib +ffffffff81ed1dd0 t jpeg_v4_0_3_dec_ring_emit_fence +ffffffff81ed2560 t jpeg_v4_0_3_dec_ring_emit_vm_flush +ffffffff81ed25d0 t jpeg_v4_0_3_dec_ring_nop +ffffffff81ed2730 t jpeg_v4_0_3_dec_ring_insert_start +ffffffff81ed28d0 t jpeg_v4_0_3_dec_ring_insert_end +ffffffff81ed2a70 t jpeg_v4_0_3_dec_ring_emit_wreg +ffffffff81ed2cb0 t jpeg_v4_0_3_dec_ring_emit_reg_wait +ffffffff81ed3060 t jpeg_v4_0_3_set_interrupt_state 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mmhub_v1_8_get_clockgating +ffffffff81ee5400 t mmhub_v1_8_setup_vm_pt_regs +ffffffff81ee5610 t mmhub_v1_8_query_ras_error_count +ffffffff81ee5770 t mmhub_v1_8_query_ras_error_status +ffffffff81ee5a20 t mmhub_v1_8_reset_ras_error_count +ffffffff81ee5b40 t mmhub_v1_8_reset_ras_error_status +ffffffff81ee7000 t mmhub_v2_0_init +ffffffff81ee70d0 t mmhub_v2_0_gart_enable +ffffffff81ee8290 t mmhub_v2_0_set_fault_enable_default +ffffffff81ee83b0 t mmhub_v2_0_gart_disable +ffffffff81ee8640 t mmhub_v2_0_set_clockgating +ffffffff81ee8990 t mmhub_v2_0_get_clockgating +ffffffff81ee8b20 t mmhub_v2_0_setup_vm_pt_regs +ffffffff81ee8c60 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff81ee8ec0 t mmhub_v2_0_get_invalidate_req +ffffffff81ee9000 t mmhub_v2_3_init +ffffffff81ee90e0 t mmhub_v2_3_gart_enable +ffffffff81eea4b0 t mmhub_v2_3_set_fault_enable_default +ffffffff81eea5b0 t mmhub_v2_3_gart_disable +ffffffff81eea850 t mmhub_v2_3_set_clockgating +ffffffff81eeacf0 t mmhub_v2_3_get_clockgating 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mmhub_v3_0_1_set_clockgating +ffffffff81eefa50 t mmhub_v3_0_1_get_clockgating +ffffffff81eefb00 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff81eefc40 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff81eefe50 t mmhub_v3_0_1_get_invalidate_req +ffffffff81ef0000 t mmhub_v3_0_2_get_fb_location +ffffffff81ef0090 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff81ef0120 t mmhub_v3_0_2_init +ffffffff81ef01f0 t mmhub_v3_0_2_gart_enable +ffffffff81ef13e0 t mmhub_v3_0_2_set_fault_enable_default +ffffffff81ef1500 t mmhub_v3_0_2_gart_disable +ffffffff81ef1790 t mmhub_v3_0_2_set_clockgating +ffffffff81ef17c0 t mmhub_v3_0_2_get_clockgating +ffffffff81ef17f0 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff81ef1930 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff81ef1b30 t mmhub_v3_0_2_get_invalidate_req +ffffffff81ef2000 t mmhub_v9_4_query_ras_error_count +ffffffff81ef2150 t mmhub_v9_4_query_ras_error_status +ffffffff81ef2230 t mmhub_v9_4_reset_ras_error_count +ffffffff81ef2300 t mmhub_v9_4_get_fb_location +ffffffff81ef2420 t mmhub_v9_4_init +ffffffff81ef2570 t mmhub_v9_4_gart_enable +ffffffff81ef3a00 t mmhub_v9_4_set_fault_enable_default +ffffffff81ef3bf0 t mmhub_v9_4_gart_disable +ffffffff81ef3f60 t mmhub_v9_4_set_clockgating +ffffffff81ef4440 t mmhub_v9_4_get_clockgating +ffffffff81ef4570 t mmhub_v9_4_setup_vm_pt_regs +ffffffff81ef45c0 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff81ef5000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff81ef5050 T xgpu_ai_mailbox_add_irq_id +ffffffff81ef50e0 T xgpu_ai_mailbox_get_irq +ffffffff81ef5190 t xgpu_ai_mailbox_flr_work +ffffffff81ef5390 T xgpu_ai_mailbox_put_irq +ffffffff81ef53d0 t xgpu_ai_request_full_gpu_access +ffffffff81ef53f0 t xgpu_ai_release_full_gpu_access +ffffffff81ef5410 t xgpu_ai_request_init_data +ffffffff81ef5470 t xgpu_ai_request_reset +ffffffff81ef5520 t xgpu_ai_mailbox_trans_msg +ffffffff81ef5740 t xgpu_ai_ras_poison_handler +ffffffff81ef5770 t xgpu_ai_set_mailbox_ack_irq +ffffffff81ef5800 t xgpu_ai_mailbox_ack_irq +ffffffff81ef5850 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81ef58e0 t xgpu_ai_mailbox_rcv_irq +ffffffff81ef59c0 t xgpu_ai_send_access_requests +ffffffff81ef5ab0 t xgpu_ai_poll_msg +ffffffff81ef6000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81ef6050 T xgpu_nv_mailbox_add_irq_id +ffffffff81ef60e0 T xgpu_nv_mailbox_get_irq +ffffffff81ef6190 t xgpu_nv_mailbox_flr_work +ffffffff81ef63b0 T xgpu_nv_mailbox_put_irq +ffffffff81ef63f0 t xgpu_nv_request_full_gpu_access +ffffffff81ef6410 t xgpu_nv_release_full_gpu_access +ffffffff81ef6430 t xgpu_nv_request_init_data +ffffffff81ef6450 t xgpu_nv_request_reset +ffffffff81ef6550 t xgpu_nv_mailbox_trans_msg +ffffffff81ef66f0 t xgpu_nv_ras_poison_handler +ffffffff81ef6710 t xgpu_nv_set_mailbox_ack_irq +ffffffff81ef6790 t xgpu_nv_mailbox_ack_irq +ffffffff81ef67e0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81ef6860 t xgpu_nv_mailbox_rcv_irq +ffffffff81ef6910 t xgpu_nv_send_access_requests +ffffffff81ef7000 T xgpu_vi_init_golden_registers +ffffffff81ef70c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81ef7110 T xgpu_vi_mailbox_add_irq_id +ffffffff81ef71a0 T xgpu_vi_mailbox_get_irq +ffffffff81ef7250 t xgpu_vi_mailbox_flr_work +ffffffff81ef73a0 T xgpu_vi_mailbox_put_irq +ffffffff81ef73e0 t xgpu_vi_request_full_gpu_access +ffffffff81ef7400 t xgpu_vi_release_full_gpu_access +ffffffff81ef7420 t xgpu_vi_request_reset +ffffffff81ef7440 t xgpu_vi_wait_reset_cmpl +ffffffff81ef7520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81ef75a0 t xgpu_vi_mailbox_ack_irq +ffffffff81ef75f0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81ef7670 t xgpu_vi_mailbox_rcv_irq +ffffffff81ef7720 t xgpu_vi_mailbox_rcv_msg +ffffffff81ef7840 t xgpu_vi_send_access_requests +ffffffff81ef8000 t navi10_ih_early_init +ffffffff81ef8060 t navi10_ih_sw_init +ffffffff81ef81d0 t navi10_ih_sw_fini +ffffffff81ef8210 t navi10_ih_hw_init +ffffffff81ef8630 t navi10_ih_hw_fini +ffffffff81ef8690 t navi10_ih_suspend +ffffffff81ef86f0 t navi10_ih_resume +ffffffff81ef8700 t navi10_ih_is_idle +ffffffff81ef8730 t navi10_ih_wait_for_idle +ffffffff81ef8760 t navi10_ih_soft_reset +ffffffff81ef8790 t navi10_ih_set_clockgating_state +ffffffff81ef88c0 t navi10_ih_set_powergating_state +ffffffff81ef88f0 t navi10_ih_get_clockgating_state +ffffffff81ef8980 t navi10_ih_get_wptr +ffffffff81ef8ab0 t navi10_ih_set_rptr +ffffffff81ef8b80 t navi10_ih_self_irq +ffffffff81ef8c00 t navi10_ih_toggle_interrupts +ffffffff81ef8d70 t force_update_wptr_for_self_int +ffffffff81efa000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff81efa040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff81efa080 t nbio_v2_3_get_pcie_index_offset +ffffffff81efa0c0 t nbio_v2_3_get_pcie_data_offset +ffffffff81efa100 t nbio_v2_3_get_rev_id +ffffffff81efa160 t nbio_v2_3_mc_access_enable +ffffffff81efa210 t nbio_v2_3_get_memsize +ffffffff81efa280 t nbio_v2_3_sdma_doorbell_range +ffffffff81efa320 t nbio_v2_3_vcn_doorbell_range +ffffffff81efa3a0 t nbio_v2_3_enable_doorbell_aperture +ffffffff81efa4a0 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff81efa610 t nbio_v2_3_ih_doorbell_range +ffffffff81efa730 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff81efa7d0 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff81efa870 t nbio_v2_3_get_clockgating_state +ffffffff81efa8f0 t nbio_v2_3_ih_control +ffffffff81efaa40 t nbio_v2_3_init_registers +ffffffff81efaad0 t nbio_v2_3_remap_hdp_registers +ffffffff81efabe0 t nbio_v2_3_enable_aspm +ffffffff81efac80 t nbio_v2_3_program_aspm +ffffffff81efb330 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff81efb3c0 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff81efb430 t nbio_v2_3_clear_doorbell_interrupt +ffffffff81efc000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff81efc040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff81efc080 t nbio_v4_3_get_pcie_index_offset +ffffffff81efc0b0 t nbio_v4_3_get_pcie_data_offset +ffffffff81efc0f0 t nbio_v4_3_get_rev_id +ffffffff81efc180 t nbio_v4_3_mc_access_enable +ffffffff81efc230 t nbio_v4_3_get_memsize +ffffffff81efc2a0 t nbio_v4_3_sdma_doorbell_range +ffffffff81efc410 t nbio_v4_3_vcn_doorbell_range +ffffffff81efc5c0 t nbio_v4_3_gc_doorbell_init +ffffffff81efc6b0 t nbio_v4_3_enable_doorbell_aperture +ffffffff81efc7b0 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81efc920 t nbio_v4_3_ih_doorbell_range +ffffffff81efca40 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81efcb80 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81efccb0 t nbio_v4_3_get_clockgating_state +ffffffff81efcdc0 t nbio_v4_3_ih_control +ffffffff81efcf10 t nbio_v4_3_init_registers +ffffffff81efd040 t nbio_v4_3_remap_hdp_registers +ffffffff81efd150 t nbio_v4_3_program_aspm +ffffffff81efde50 t nbio_v4_3_get_rom_offset +ffffffff81efdee0 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81efdf10 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81efdf40 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81efdf70 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81efdfa0 t nbio_v4_3_handle_ras_err_event_athub_intr_no_bifring +ffffffff81efe0b0 t nbio_v4_3_init_ras_err_event_athub_interrupt +ffffffff81efe0f0 t nbio_v4_3_set_ras_err_event_athub_irq_state +ffffffff81efe200 t nbio_v4_3_process_err_event_athub_irq +ffffffff81eff000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81eff040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81eff080 t nbio_v6_1_get_pcie_index_offset +ffffffff81eff0c0 t nbio_v6_1_get_pcie_data_offset +ffffffff81eff100 t nbio_v6_1_get_rev_id +ffffffff81eff190 t nbio_v6_1_mc_access_enable +ffffffff81eff240 t nbio_v6_1_get_memsize +ffffffff81eff2b0 t nbio_v6_1_sdma_doorbell_range +ffffffff81eff340 t nbio_v6_1_enable_doorbell_aperture +ffffffff81eff440 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81eff5b0 t nbio_v6_1_ih_doorbell_range +ffffffff81eff6d0 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff81eff770 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff81eff810 t nbio_v6_1_get_clockgating_state +ffffffff81eff890 t nbio_v6_1_ih_control +ffffffff81eff9e0 t nbio_v6_1_init_registers +ffffffff81effab0 t nbio_v6_1_remap_hdp_registers +ffffffff81effbc0 t nbio_v6_1_program_aspm +ffffffff81f00000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff81f00040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff81f00080 t nbio_v7_0_get_pcie_index_offset +ffffffff81f000c0 t nbio_v7_0_get_pcie_data_offset +ffffffff81f00100 t nbio_v7_0_get_rev_id +ffffffff81f00190 t nbio_v7_0_mc_access_enable +ffffffff81f00240 t nbio_v7_0_get_memsize +ffffffff81f002b0 t nbio_v7_0_sdma_doorbell_range +ffffffff81f00340 t nbio_v7_0_vcn_doorbell_range +ffffffff81f003c0 t nbio_v7_0_enable_doorbell_aperture +ffffffff81f004c0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff81f004f0 t nbio_v7_0_ih_doorbell_range +ffffffff81f00610 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff81f00740 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff81f007e0 t nbio_v7_0_get_clockgating_state +ffffffff81f00860 t nbio_v7_0_ih_control +ffffffff81f009b0 t nbio_v7_0_init_registers +ffffffff81f00a00 t nbio_v7_0_remap_hdp_registers +ffffffff81f00b10 t nbio_7_0_read_syshub_ind_mmr +ffffffff81f00be0 t nbio_7_0_write_syshub_ind_mmr +ffffffff81f01000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff81f01040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff81f01080 t nbio_v7_2_get_pcie_index_offset +ffffffff81f010c0 t nbio_v7_2_get_pcie_data_offset +ffffffff81f01100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff81f01130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff81f01170 t nbio_v7_2_get_rev_id +ffffffff81f01250 t nbio_v7_2_mc_access_enable +ffffffff81f01390 t nbio_v7_2_get_memsize +ffffffff81f01400 t nbio_v7_2_sdma_doorbell_range +ffffffff81f014a0 t nbio_v7_2_vcn_doorbell_range +ffffffff81f01520 t nbio_v7_2_enable_doorbell_aperture +ffffffff81f01600 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff81f01770 t nbio_v7_2_ih_doorbell_range +ffffffff81f01800 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff81f018c0 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff81f01a50 t nbio_v7_2_get_clockgating_state +ffffffff81f01ae0 t nbio_v7_2_ih_control +ffffffff81f01c30 t nbio_v7_2_init_registers +ffffffff81f01df0 t nbio_v7_2_remap_hdp_registers +ffffffff81f02000 t nbio_v7_4_query_ras_error_count +ffffffff81f021a0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff81f02400 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff81f025b0 t nbio_v7_4_init_ras_controller_interrupt +ffffffff81f025f0 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff81f02630 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff81f02670 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81f026b0 t nbio_v7_4_get_pcie_index_offset +ffffffff81f026f0 t nbio_v7_4_get_pcie_data_offset +ffffffff81f02730 t nbio_v7_4_get_rev_id +ffffffff81f02800 t nbio_v7_4_mc_access_enable +ffffffff81f028b0 t nbio_v7_4_get_memsize +ffffffff81f02920 t nbio_v7_4_sdma_doorbell_range +ffffffff81f029f0 t nbio_v7_4_vcn_doorbell_range +ffffffff81f02a90 t nbio_v7_4_enable_doorbell_aperture +ffffffff81f02b90 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81f02d00 t nbio_v7_4_ih_doorbell_range +ffffffff81f02e20 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81f02f70 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81f02fa0 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81f03040 t nbio_v7_4_get_clockgating_state +ffffffff81f030c0 t nbio_v7_4_ih_control +ffffffff81f03210 t nbio_v7_4_init_registers +ffffffff81f03300 t nbio_v7_4_remap_hdp_registers +ffffffff81f03410 t nbio_v7_4_program_aspm +ffffffff81f03820 t nbio_v7_4_set_ras_controller_irq_state +ffffffff81f039b0 t nbio_v7_4_process_ras_controller_irq +ffffffff81f039e0 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff81f03b70 t nbio_v7_4_process_err_event_athub_irq +ffffffff81f04000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81f04040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81f04080 t nbio_v7_7_get_pcie_index_offset +ffffffff81f040c0 t nbio_v7_7_get_pcie_data_offset +ffffffff81f04100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81f04130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81f04170 t nbio_v7_7_get_rev_id +ffffffff81f04200 t nbio_v7_7_mc_access_enable +ffffffff81f042b0 t nbio_v7_7_get_memsize +ffffffff81f04320 t nbio_v7_7_sdma_doorbell_range +ffffffff81f043b0 t nbio_v7_7_vcn_doorbell_range +ffffffff81f04430 t nbio_v7_7_enable_doorbell_aperture +ffffffff81f04510 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81f04680 t nbio_v7_7_ih_doorbell_range +ffffffff81f047a0 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81f048e0 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81f04af0 t nbio_v7_7_get_clockgating_state +ffffffff81f04c00 t nbio_v7_7_ih_control +ffffffff81f04d50 t nbio_v7_7_init_registers +ffffffff81f04e70 t nbio_v7_7_remap_hdp_registers +ffffffff81f05000 t nbio_v7_9_get_hdp_flush_req_offset +ffffffff81f05040 t nbio_v7_9_get_hdp_flush_done_offset +ffffffff81f05080 t nbio_v7_9_get_pcie_index_offset +ffffffff81f050c0 t nbio_v7_9_get_pcie_data_offset +ffffffff81f05100 t nbio_v7_9_get_pcie_index_hi_offset +ffffffff81f05140 t nbio_v7_9_get_rev_id +ffffffff81f051d0 t nbio_v7_9_mc_access_enable +ffffffff81f05280 t nbio_v7_9_get_memsize +ffffffff81f052f0 t nbio_v7_9_sdma_doorbell_range +ffffffff81f05630 t nbio_v7_9_vcn_doorbell_range +ffffffff81f057c0 t nbio_v7_9_enable_doorbell_aperture +ffffffff81f05930 t nbio_v7_9_enable_doorbell_selfring_aperture +ffffffff81f05aa0 t nbio_v7_9_ih_doorbell_range +ffffffff81f05ba0 t nbio_v7_9_enable_doorbell_interrupt +ffffffff81f05cb0 t nbio_v7_9_update_medium_grain_clock_gating +ffffffff81f05ce0 t nbio_v7_9_update_medium_grain_light_sleep +ffffffff81f05d10 t nbio_v7_9_get_clockgating_state +ffffffff81f05d40 t nbio_v7_9_ih_control +ffffffff81f05e90 t nbio_v7_9_init_registers +ffffffff81f061a0 t nbio_v7_9_remap_hdp_registers +ffffffff81f062b0 t nbio_v7_9_get_compute_partition_mode +ffffffff81f06340 t nbio_v7_9_get_memory_partition_mode +ffffffff81f06430 t nbio_v7_9_get_pcie_replay_count +ffffffff81f06490 t nbio_v7_9_get_pcie_usage +ffffffff81f065f0 t nbio_v7_9_query_ras_error_count +ffffffff81f06620 t nbio_v7_9_handle_ras_controller_intr_no_bifring +ffffffff81f06740 t nbio_v7_9_handle_ras_err_event_athub_intr_no_bifring +ffffffff81f06850 t nbio_v7_9_init_ras_controller_interrupt +ffffffff81f06890 t nbio_v7_9_init_ras_err_event_athub_interrupt +ffffffff81f068d0 t nbio_v7_9_set_ras_controller_irq_state +ffffffff81f06900 t nbio_v7_9_process_ras_controller_irq +ffffffff81f06930 t nbio_v7_9_set_ras_err_event_athub_irq_state +ffffffff81f06960 t nbio_v7_9_process_err_event_athub_irq +ffffffff81f07000 T nv_grbm_select +ffffffff81f070a0 T nv_set_virt_ops +ffffffff81f070e0 t nv_common_early_init +ffffffff81f074d0 t nv_common_late_init +ffffffff81f07580 t nv_common_sw_init +ffffffff81f075c0 t nv_common_sw_fini +ffffffff81f075f0 t nv_common_hw_init +ffffffff81f076f0 t nv_common_hw_fini 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psp_v10_0_set_psp_funcs +ffffffff81f09030 t psp_v10_0_init_microcode +ffffffff81f090f0 t psp_v10_0_ring_create +ffffffff81f09400 t psp_v10_0_ring_stop +ffffffff81f095f0 t psp_v10_0_ring_destroy +ffffffff81f09670 t psp_v10_0_mode1_reset +ffffffff81f096c0 t psp_v10_0_ring_get_wptr +ffffffff81f09720 t psp_v10_0_ring_set_wptr +ffffffff81f0a000 T psp_v11_0_set_psp_funcs +ffffffff81f0a030 t psp_v11_0_init_microcode +ffffffff81f0a180 t psp_v11_0_bootloader_load_kdb +ffffffff81f0a1a0 t psp_v11_0_bootloader_load_spl +ffffffff81f0a1c0 t psp_v11_0_bootloader_load_sysdrv +ffffffff81f0a1e0 t psp_v11_0_bootloader_load_sos +ffffffff81f0a540 t psp_v11_0_ring_create +ffffffff81f0abe0 t psp_v11_0_ring_stop +ffffffff81f0ae00 t psp_v11_0_ring_destroy +ffffffff81f0ae80 t psp_v11_0_mode1_reset +ffffffff81f0af80 t psp_v11_0_memory_training +ffffffff81f0b400 t psp_v11_0_ring_get_wptr +ffffffff81f0b450 t psp_v11_0_ring_set_wptr +ffffffff81f0b590 t psp_v11_0_load_usbc_pd_fw +ffffffff81f0b780 t psp_v11_0_read_usbc_pd_fw +ffffffff81f0b8a0 t psp_v11_0_bootloader_load_component +ffffffff81f0ba60 t psp_v11_0_wait_for_bootloader +ffffffff81f0bc30 t psp_v11_0_memory_training_send_msg +ffffffff81f0c000 T psp_v11_0_8_set_psp_funcs +ffffffff81f0c030 t psp_v11_0_8_ring_create +ffffffff81f0c6d0 t psp_v11_0_8_ring_stop +ffffffff81f0ca60 t psp_v11_0_8_ring_destroy +ffffffff81f0cae0 t psp_v11_0_8_ring_get_wptr +ffffffff81f0cb50 t psp_v11_0_8_ring_set_wptr +ffffffff81f0d000 T psp_v12_0_set_psp_funcs +ffffffff81f0d030 t psp_v12_0_init_microcode +ffffffff81f0d0e0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81f0d410 t psp_v12_0_bootloader_load_sos +ffffffff81f0d790 t psp_v12_0_ring_create +ffffffff81f0e190 t psp_v12_0_ring_stop +ffffffff81f0e3b0 t psp_v12_0_ring_destroy +ffffffff81f0e430 t psp_v12_0_mode1_reset +ffffffff81f0e530 t psp_v12_0_ring_get_wptr +ffffffff81f0e5a0 t psp_v12_0_ring_set_wptr +ffffffff81f0f000 T psp_v13_0_set_psp_funcs +ffffffff81f0f030 t psp_v13_0_init_microcode +ffffffff81f0f130 t psp_v13_0_wait_for_bootloader_steady_state +ffffffff81f0f240 t psp_v13_0_bootloader_load_kdb +ffffffff81f0f260 t psp_v13_0_bootloader_load_spl +ffffffff81f0f280 t psp_v13_0_bootloader_load_sysdrv +ffffffff81f0f2a0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81f0f2c0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81f0f2e0 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81f0f300 t psp_v13_0_bootloader_load_ras_drv +ffffffff81f0f320 t psp_v13_0_bootloader_load_sos +ffffffff81f0f6f0 t psp_v13_0_ring_create +ffffffff81f0fd90 t psp_v13_0_ring_stop +ffffffff81f10120 t psp_v13_0_ring_destroy +ffffffff81f101a0 t psp_v13_0_memory_training +ffffffff81f105d0 t psp_v13_0_ring_get_wptr +ffffffff81f10640 t psp_v13_0_ring_set_wptr +ffffffff81f10740 t psp_v13_0_load_usbc_pd_fw +ffffffff81f10930 t psp_v13_0_read_usbc_pd_fw +ffffffff81f10a50 t psp_v13_0_update_spirom +ffffffff81f10c30 t psp_v13_0_vbflash_status +ffffffff81f10c90 t psp_v13_0_fatal_error_recovery_quirk +ffffffff81f10dc0 t psp_v13_0_bootloader_load_component +ffffffff81f11030 t psp_v13_0_memory_training_send_msg +ffffffff81f111a0 t psp_v13_0_exec_spi_cmd +ffffffff81f12000 T psp_v13_0_4_set_psp_funcs +ffffffff81f12030 t psp_v13_0_4_init_microcode +ffffffff81f120d0 t psp_v13_0_4_bootloader_load_kdb +ffffffff81f120f0 t psp_v13_0_4_bootloader_load_spl +ffffffff81f12110 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81f12130 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81f12150 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81f12170 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81f12190 t psp_v13_0_4_bootloader_load_sos +ffffffff81f12500 t psp_v13_0_4_ring_create +ffffffff81f12bb0 t psp_v13_0_4_ring_stop +ffffffff81f12f40 t psp_v13_0_4_ring_destroy +ffffffff81f12fc0 t psp_v13_0_4_ring_get_wptr +ffffffff81f13030 t psp_v13_0_4_ring_set_wptr +ffffffff81f13130 t psp_v13_0_4_bootloader_load_component +ffffffff81f13300 t psp_v13_0_4_wait_for_bootloader +ffffffff81f14000 T psp_v3_1_set_psp_funcs +ffffffff81f14030 t psp_v3_1_init_microcode +ffffffff81f140c0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81f143f0 t psp_v3_1_bootloader_load_sos +ffffffff81f14770 t psp_v3_1_ring_create +ffffffff81f15290 t psp_v3_1_ring_stop +ffffffff81f154b0 t psp_v3_1_ring_destroy +ffffffff81f15530 t psp_v3_1_smu_reload_quirk +ffffffff81f15580 t psp_v3_1_mode1_reset +ffffffff81f15680 t psp_v3_1_ring_get_wptr +ffffffff81f156d0 t psp_v3_1_ring_set_wptr +ffffffff81f16000 t sdma_v2_4_early_init +ffffffff81f160f0 t sdma_v2_4_sw_init +ffffffff81f164a0 t sdma_v2_4_sw_fini +ffffffff81f16550 t sdma_v2_4_hw_init +ffffffff81f168f0 t sdma_v2_4_hw_fini +ffffffff81f16930 t sdma_v2_4_suspend +ffffffff81f16970 t sdma_v2_4_resume +ffffffff81f16980 t sdma_v2_4_is_idle +ffffffff81f169c0 t sdma_v2_4_wait_for_idle +ffffffff81f16a60 t sdma_v2_4_soft_reset +ffffffff81f16ba0 t sdma_v2_4_set_clockgating_state +ffffffff81f16bd0 t sdma_v2_4_set_powergating_state +ffffffff81f16c00 t sdma_v2_4_ring_get_rptr +ffffffff81f16c40 t sdma_v2_4_ring_get_wptr +ffffffff81f16ca0 t sdma_v2_4_ring_set_wptr +ffffffff81f16ce0 t sdma_v2_4_ring_emit_ib +ffffffff81f16f90 t sdma_v2_4_ring_emit_fence +ffffffff81f17390 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81f17610 t sdma_v2_4_ring_emit_vm_flush +ffffffff81f17880 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81f17b00 t sdma_v2_4_ring_test_ring +ffffffff81f17de0 t sdma_v2_4_ring_test_ib +ffffffff81f17fb0 t sdma_v2_4_ring_insert_nop +ffffffff81f180e0 t sdma_v2_4_ring_pad_ib +ffffffff81f18210 t sdma_v2_4_ring_emit_wreg +ffffffff81f18360 t sdma_v2_4_emit_copy_buffer +ffffffff81f18420 t sdma_v2_4_emit_fill_buffer +ffffffff81f184b0 t sdma_v2_4_vm_copy_pte +ffffffff81f18570 t sdma_v2_4_vm_write_pte +ffffffff81f18640 t sdma_v2_4_vm_set_pte_pde +ffffffff81f18740 t sdma_v2_4_set_trap_irq_state +ffffffff81f18800 t sdma_v2_4_process_trap_irq +ffffffff81f188a0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81f18920 t sdma_v2_4_enable +ffffffff81f19000 t sdma_v3_0_early_init +ffffffff81f19100 t sdma_v3_0_sw_init +ffffffff81f194c0 t sdma_v3_0_sw_fini +ffffffff81f19570 t sdma_v3_0_hw_init +ffffffff81f196a0 t sdma_v3_0_hw_fini +ffffffff81f196f0 t sdma_v3_0_suspend +ffffffff81f19740 t sdma_v3_0_resume +ffffffff81f19750 t sdma_v3_0_is_idle +ffffffff81f19790 t sdma_v3_0_wait_for_idle +ffffffff81f19830 t sdma_v3_0_check_soft_reset +ffffffff81f19890 t sdma_v3_0_pre_soft_reset +ffffffff81f198e0 t sdma_v3_0_soft_reset +ffffffff81f199b0 t sdma_v3_0_post_soft_reset +ffffffff81f19a00 t sdma_v3_0_set_clockgating_state +ffffffff81f19c60 t sdma_v3_0_set_powergating_state +ffffffff81f19c90 t sdma_v3_0_get_clockgating_state +ffffffff81f19d10 t sdma_v3_0_ring_get_rptr +ffffffff81f19d50 t sdma_v3_0_ring_get_wptr +ffffffff81f19dd0 t sdma_v3_0_ring_set_wptr +ffffffff81f19e80 t sdma_v3_0_ring_emit_ib +ffffffff81f1a130 t sdma_v3_0_ring_emit_fence +ffffffff81f1a530 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81f1a7b0 t sdma_v3_0_ring_emit_vm_flush +ffffffff81f1aa20 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81f1aca0 t sdma_v3_0_ring_test_ring +ffffffff81f1af80 t sdma_v3_0_ring_test_ib +ffffffff81f1b150 t sdma_v3_0_ring_insert_nop +ffffffff81f1b280 t sdma_v3_0_ring_pad_ib +ffffffff81f1b3b0 t sdma_v3_0_ring_emit_wreg +ffffffff81f1b500 t sdma_v3_0_emit_copy_buffer +ffffffff81f1b5c0 t sdma_v3_0_emit_fill_buffer +ffffffff81f1b650 t sdma_v3_0_vm_copy_pte +ffffffff81f1b710 t sdma_v3_0_vm_write_pte +ffffffff81f1b7e0 t sdma_v3_0_vm_set_pte_pde +ffffffff81f1b8e0 t sdma_v3_0_set_trap_irq_state +ffffffff81f1b9a0 t sdma_v3_0_process_trap_irq +ffffffff81f1ba40 t sdma_v3_0_process_illegal_inst_irq +ffffffff81f1bac0 t sdma_v3_0_ctx_switch_enable +ffffffff81f1bc60 t sdma_v3_0_enable +ffffffff81f1bdd0 t sdma_v3_0_gfx_resume +ffffffff81f1d000 t sdma_v4_0_early_init +ffffffff81f1d2d0 t sdma_v4_0_late_init +ffffffff81f1d570 t sdma_v4_0_sw_init +ffffffff81f1d9b0 t sdma_v4_0_sw_fini +ffffffff81f1da70 t sdma_v4_0_hw_init +ffffffff81f209d0 t sdma_v4_0_hw_fini +ffffffff81f20a90 t sdma_v4_0_suspend +ffffffff81f20ae0 t sdma_v4_0_resume +ffffffff81f20b60 t sdma_v4_0_is_idle +ffffffff81f20c90 t sdma_v4_0_wait_for_idle +ffffffff81f20e30 t sdma_v4_0_soft_reset +ffffffff81f20e60 t sdma_v4_0_set_clockgating_state +ffffffff81f21360 t sdma_v4_0_set_powergating_state +ffffffff81f21420 t sdma_v4_0_get_clockgating_state +ffffffff81f214c0 t sdma_v4_0_query_ras_error_count +ffffffff81f21690 t sdma_v4_0_reset_ras_error_count +ffffffff81f217e0 t sdma_v4_0_ring_get_rptr +ffffffff81f21840 t sdma_v4_0_ring_get_wptr +ffffffff81f21a30 t sdma_v4_0_ring_set_wptr +ffffffff81f21cb0 t sdma_v4_0_ring_emit_ib +ffffffff81f21f60 t sdma_v4_0_ring_emit_fence +ffffffff81f22380 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81f223e0 t sdma_v4_0_ring_emit_vm_flush +ffffffff81f22400 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81f224b0 t sdma_v4_0_ring_test_ring +ffffffff81f22790 t sdma_v4_0_ring_test_ib +ffffffff81f22960 t sdma_v4_0_ring_insert_nop +ffffffff81f22a90 t sdma_v4_0_ring_pad_ib +ffffffff81f22bc0 t sdma_v4_0_ring_emit_wreg +ffffffff81f22d10 t sdma_v4_0_ring_emit_reg_wait +ffffffff81f22d60 t sdma_v4_0_wait_reg_mem +ffffffff81f23070 t sdma_v4_0_page_ring_get_wptr +ffffffff81f23220 t sdma_v4_0_page_ring_set_wptr +ffffffff81f233e0 t sdma_v4_0_emit_copy_buffer +ffffffff81f234a0 t sdma_v4_0_emit_fill_buffer +ffffffff81f23530 t sdma_v4_0_vm_copy_pte +ffffffff81f235f0 t sdma_v4_0_vm_write_pte +ffffffff81f236c0 t sdma_v4_0_vm_set_pte_pde +ffffffff81f237c0 t sdma_v4_0_set_trap_irq_state +ffffffff81f23960 t sdma_v4_0_process_trap_irq +ffffffff81f23a90 t sdma_v4_0_process_illegal_inst_irq +ffffffff81f23bb0 t sdma_v4_0_set_ecc_irq_state +ffffffff81f23d50 t sdma_v4_0_process_vm_hole_irq +ffffffff81f23d90 t sdma_v4_0_print_iv_entry +ffffffff81f23ed0 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81f23f10 t sdma_v4_0_process_pool_timeout_irq +ffffffff81f23f50 t sdma_v4_0_process_srbm_write_irq +ffffffff81f23f90 t sdma_v4_0_process_ras_data_cb +ffffffff81f24010 t sdma_v4_0_ctx_switch_enable +ffffffff81f246e0 t sdma_v4_0_enable +ffffffff81f24ca0 t sdma_v4_0_gfx_enable +ffffffff81f26000 t sdma_v4_4_query_ras_error_count +ffffffff81f26290 t sdma_v4_4_reset_ras_error_count +ffffffff81f27000 t sdma_v4_4_2_early_init +ffffffff81f27280 t sdma_v4_4_2_late_init +ffffffff81f272f0 t sdma_v4_4_2_sw_init +ffffffff81f27810 t sdma_v4_4_2_sw_fini +ffffffff81f278c0 t sdma_v4_4_2_hw_init +ffffffff81f27910 t sdma_v4_4_2_hw_fini +ffffffff81f279d0 t sdma_v4_4_2_suspend +ffffffff81f27ab0 t sdma_v4_4_2_resume +ffffffff81f27b00 t sdma_v4_4_2_is_idle +ffffffff81f27ba0 t sdma_v4_4_2_wait_for_idle +ffffffff81f27cc0 t sdma_v4_4_2_soft_reset +ffffffff81f27cf0 t sdma_v4_4_2_set_clockgating_state +ffffffff81f280f0 t sdma_v4_4_2_set_powergating_state +ffffffff81f28120 t sdma_v4_4_2_get_clockgating_state +ffffffff81f28200 t sdma_v4_4_2_xcp_suspend +ffffffff81f282c0 t sdma_v4_4_2_xcp_resume +ffffffff81f28300 t sdma_v4_4_2_ring_get_rptr +ffffffff81f28370 t sdma_v4_4_2_ring_get_wptr +ffffffff81f284b0 t sdma_v4_4_2_ring_set_wptr +ffffffff81f28670 t sdma_v4_4_2_ring_emit_ib +ffffffff81f28920 t sdma_v4_4_2_ring_emit_fence +ffffffff81f28d40 t sdma_v4_4_2_ring_emit_pipeline_sync +ffffffff81f28da0 t sdma_v4_4_2_ring_emit_vm_flush +ffffffff81f28dc0 t sdma_v4_4_2_ring_emit_hdp_flush +ffffffff81f28e70 t sdma_v4_4_2_ring_test_ring +ffffffff81f29150 t sdma_v4_4_2_ring_test_ib +ffffffff81f29320 t sdma_v4_4_2_ring_insert_nop +ffffffff81f29450 t sdma_v4_4_2_ring_pad_ib +ffffffff81f29580 t sdma_v4_4_2_ring_emit_wreg +ffffffff81f296d0 t sdma_v4_4_2_ring_emit_reg_wait +ffffffff81f29720 t sdma_v4_4_2_wait_reg_mem +ffffffff81f29a30 t sdma_v4_4_2_page_ring_get_wptr +ffffffff81f29b30 t sdma_v4_4_2_page_ring_set_wptr +ffffffff81f29c40 t sdma_v4_4_2_emit_copy_buffer +ffffffff81f29d00 t sdma_v4_4_2_emit_fill_buffer +ffffffff81f29d90 t sdma_v4_4_2_vm_copy_pte +ffffffff81f29e50 t sdma_v4_4_2_vm_write_pte +ffffffff81f29f20 t sdma_v4_4_2_vm_set_pte_pde +ffffffff81f2a020 t sdma_v4_4_2_set_trap_irq_state +ffffffff81f2a100 t sdma_v4_4_2_process_trap_irq +ffffffff81f2a220 t sdma_v4_4_2_process_illegal_inst_irq +ffffffff81f2a2b0 t sdma_v4_4_2_set_ecc_irq_state +ffffffff81f2a390 t sdma_v4_4_2_process_vm_hole_irq +ffffffff81f2a470 t sdma_v4_4_2_process_doorbell_invalid_irq +ffffffff81f2a550 t sdma_v4_4_2_process_pool_timeout_irq +ffffffff81f2a630 t sdma_v4_4_2_process_srbm_write_irq +ffffffff81f2a710 t sdma_v4_4_2_query_ras_error_count +ffffffff81f2a870 t sdma_v4_4_2_reset_ras_error_count +ffffffff81f2a9a0 t sdma_v4_4_2_inst_init_golden_registers +ffffffff81f2ab20 t sdma_v4_4_2_inst_start +ffffffff81f2bec0 t sdma_v4_4_2_inst_ctx_switch_enable +ffffffff81f2c190 t sdma_v4_4_2_inst_enable +ffffffff81f2d000 t sdma_v5_0_early_init +ffffffff81f2d130 t sdma_v5_0_sw_init +ffffffff81f2d310 t sdma_v5_0_sw_fini +ffffffff81f2d3a0 t sdma_v5_0_hw_init +ffffffff81f2e600 t sdma_v5_0_hw_fini +ffffffff81f2e660 t sdma_v5_0_suspend +ffffffff81f2e6c0 t sdma_v5_0_resume +ffffffff81f2e6d0 t sdma_v5_0_is_idle +ffffffff81f2e760 t sdma_v5_0_wait_for_idle +ffffffff81f2e820 t sdma_v5_0_soft_reset +ffffffff81f2e850 t sdma_v5_0_set_clockgating_state +ffffffff81f2ea50 t sdma_v5_0_set_powergating_state +ffffffff81f2ea80 t sdma_v5_0_get_clockgating_state +ffffffff81f2eb20 t sdma_v5_0_ring_get_rptr +ffffffff81f2eb80 t sdma_v5_0_ring_get_wptr +ffffffff81f2ed20 t sdma_v5_0_ring_set_wptr +ffffffff81f2f070 t sdma_v5_0_ring_emit_ib +ffffffff81f2f330 t sdma_v5_0_ring_emit_fence +ffffffff81f2f790 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81f2fa10 t sdma_v5_0_ring_emit_vm_flush +ffffffff81f2fa30 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81f2fcd0 t sdma_v5_0_ring_test_ring +ffffffff81f300a0 t sdma_v5_0_ring_test_ib +ffffffff81f303d0 t sdma_v5_0_ring_insert_nop +ffffffff81f30500 t sdma_v5_0_ring_pad_ib +ffffffff81f30630 t sdma_v5_0_ring_init_cond_exec +ffffffff81f30860 t sdma_v5_0_ring_patch_cond_exec +ffffffff81f30920 t sdma_v5_0_ring_emit_wreg +ffffffff81f30a70 t sdma_v5_0_ring_emit_reg_wait +ffffffff81f30cf0 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81f30d70 t sdma_v5_0_ring_preempt_ib +ffffffff81f30eb0 t sdma_v5_0_ring_emit_mem_sync +ffffffff81f310c0 t sdma_v5_0_emit_copy_buffer +ffffffff81f31180 t sdma_v5_0_emit_fill_buffer +ffffffff81f31210 t sdma_v5_0_vm_copy_pte +ffffffff81f312d0 t sdma_v5_0_vm_write_pte +ffffffff81f313a0 t sdma_v5_0_vm_set_pte_pde +ffffffff81f314a0 t sdma_v5_0_set_trap_irq_state +ffffffff81f31530 t sdma_v5_0_process_trap_irq +ffffffff81f31640 t sdma_v5_0_process_illegal_inst_irq +ffffffff81f31670 t sdma_v5_0_mqd_init +ffffffff81f31750 t sdma_v5_0_ctx_switch_enable +ffffffff81f31a90 t sdma_v5_0_enable +ffffffff81f32000 t sdma_v5_2_early_init +ffffffff81f32130 t sdma_v5_2_sw_init +ffffffff81f32390 t sdma_v5_2_sw_fini +ffffffff81f32420 t sdma_v5_2_hw_init +ffffffff81f33fc0 t sdma_v5_2_hw_fini +ffffffff81f34020 t sdma_v5_2_suspend +ffffffff81f34080 t sdma_v5_2_resume +ffffffff81f34090 t sdma_v5_2_is_idle +ffffffff81f34140 t sdma_v5_2_wait_for_idle +ffffffff81f34240 t sdma_v5_2_soft_reset +ffffffff81f34500 t sdma_v5_2_set_clockgating_state +ffffffff81f34860 t sdma_v5_2_set_powergating_state +ffffffff81f34890 t sdma_v5_2_get_clockgating_state +ffffffff81f34920 t sdma_v5_2_ring_get_rptr +ffffffff81f34980 t sdma_v5_2_ring_get_wptr +ffffffff81f34ac0 t sdma_v5_2_ring_set_wptr +ffffffff81f34c70 t sdma_v5_2_ring_emit_ib +ffffffff81f34f30 t sdma_v5_2_ring_emit_fence +ffffffff81f35390 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81f35610 t sdma_v5_2_ring_emit_vm_flush +ffffffff81f35630 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81f35900 t sdma_v5_2_ring_test_ring +ffffffff81f35cd0 t sdma_v5_2_ring_test_ib +ffffffff81f36000 t sdma_v5_2_ring_insert_nop +ffffffff81f36130 t sdma_v5_2_ring_pad_ib +ffffffff81f36260 t sdma_v5_2_ring_init_cond_exec +ffffffff81f36490 t sdma_v5_2_ring_patch_cond_exec +ffffffff81f36550 t sdma_v5_2_ring_begin_use +ffffffff81f36570 t sdma_v5_2_ring_end_use +ffffffff81f36590 t sdma_v5_2_ring_emit_wreg +ffffffff81f366e0 t sdma_v5_2_ring_emit_reg_wait +ffffffff81f36960 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81f369e0 t sdma_v5_2_ring_preempt_ib +ffffffff81f36b50 t sdma_v5_2_ring_emit_mem_sync +ffffffff81f36d60 t sdma_v5_2_emit_copy_buffer +ffffffff81f36e20 t sdma_v5_2_emit_fill_buffer +ffffffff81f36eb0 t sdma_v5_2_vm_copy_pte +ffffffff81f36f70 t sdma_v5_2_vm_write_pte +ffffffff81f37040 t sdma_v5_2_vm_set_pte_pde +ffffffff81f37140 t sdma_v5_2_set_trap_irq_state +ffffffff81f37200 t sdma_v5_2_process_trap_irq +ffffffff81f37340 t sdma_v5_2_process_illegal_inst_irq +ffffffff81f37370 t sdma_v5_2_mqd_init +ffffffff81f37450 t sdma_v5_2_ctx_switch_enable +ffffffff81f37860 t sdma_v5_2_enable +ffffffff81f38000 t sdma_v6_0_early_init +ffffffff81f38120 t sdma_v6_0_sw_init +ffffffff81f382f0 t sdma_v6_0_sw_fini +ffffffff81f38380 t sdma_v6_0_hw_init +ffffffff81f38390 t sdma_v6_0_hw_fini +ffffffff81f38460 t sdma_v6_0_suspend +ffffffff81f384a0 t sdma_v6_0_resume +ffffffff81f384b0 t sdma_v6_0_is_idle +ffffffff81f38540 t sdma_v6_0_wait_for_idle +ffffffff81f38600 t sdma_v6_0_check_soft_reset +ffffffff81f386c0 t sdma_v6_0_soft_reset +ffffffff81f38b80 t sdma_v6_0_set_clockgating_state +ffffffff81f38bb0 t sdma_v6_0_set_powergating_state +ffffffff81f38be0 t sdma_v6_0_get_clockgating_state +ffffffff81f38c10 t sdma_v6_0_ring_get_rptr +ffffffff81f38c70 t sdma_v6_0_ring_get_wptr +ffffffff81f38ce0 t sdma_v6_0_ring_set_wptr +ffffffff81f39030 t sdma_v6_0_ring_emit_ib +ffffffff81f392f0 t sdma_v6_0_ring_emit_fence +ffffffff81f39750 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81f399d0 t sdma_v6_0_ring_emit_vm_flush +ffffffff81f39c40 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81f39ee0 t sdma_v6_0_ring_test_ring +ffffffff81f3a2b0 t sdma_v6_0_ring_test_ib +ffffffff81f3a5e0 t sdma_v6_0_ring_insert_nop +ffffffff81f3a710 t sdma_v6_0_ring_pad_ib +ffffffff81f3a840 t sdma_v6_0_ring_init_cond_exec +ffffffff81f3aa70 t sdma_v6_0_ring_patch_cond_exec +ffffffff81f3ab30 t sdma_v6_0_ring_emit_wreg +ffffffff81f3ac80 t sdma_v6_0_ring_emit_reg_wait +ffffffff81f3af00 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81f3af80 t sdma_v6_0_ring_preempt_ib +ffffffff81f3b0d0 t sdma_v6_0_ring_emit_mem_sync +ffffffff81f3b2e0 t sdma_v6_0_emit_copy_buffer +ffffffff81f3b3a0 t sdma_v6_0_emit_fill_buffer +ffffffff81f3b430 t sdma_v6_0_vm_copy_pte +ffffffff81f3b4f0 t sdma_v6_0_vm_write_pte +ffffffff81f3b5c0 t sdma_v6_0_vm_set_pte_pde +ffffffff81f3b6c0 t sdma_v6_0_set_trap_irq_state +ffffffff81f3b750 t sdma_v6_0_process_trap_irq +ffffffff81f3b880 t sdma_v6_0_process_illegal_inst_irq +ffffffff81f3b8b0 t sdma_v6_0_mqd_init +ffffffff81f3b9d0 t sdma_v6_0_start +ffffffff81f3bcb0 t sdma_v6_0_enable +ffffffff81f3be40 t sdma_v6_0_gfx_resume +ffffffff81f3ced0 t sdma_v6_0_gfx_stop +ffffffff81f3e000 T sienna_cichlid_reset_init +ffffffff81f3e0c0 t sienna_cichlid_async_reset +ffffffff81f3e120 t sienna_cichlid_get_reset_handler +ffffffff81f3e1b0 T sienna_cichlid_reset_fini +ffffffff81f3e210 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81f3e360 t sienna_cichlid_mode2_perform_reset +ffffffff81f3e3e0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81f3e6e0 t sienna_cichlid_mode2_reset +ffffffff81f3f000 T smu_v11_0_i2c_control_init +ffffffff81f3f0d0 T smu_v11_0_i2c_control_fini +ffffffff81f3f110 t smu_v11_0_i2c_xfer +ffffffff81f402c0 t smu_v11_0_i2c_func +ffffffff81f402f0 t smu_v11_0_i2c_enable +ffffffff81f40440 t smu_v11_0_i2c_abort +ffffffff81f40550 t lock_bus +ffffffff81f405f0 t trylock_bus +ffffffff81f40640 t unlock_bus +ffffffff81f41000 T smu_v13_0_10_reset_init +ffffffff81f410c0 t smu_v13_0_10_async_reset +ffffffff81f41120 t smu_v13_0_10_get_reset_handler +ffffffff81f411d0 T smu_v13_0_10_reset_fini +ffffffff81f41230 t smu_v13_0_10_mode2_prepare_hwcontext +ffffffff81f41360 t smu_v13_0_10_mode2_perform_reset +ffffffff81f413e0 t smu_v13_0_10_mode2_restore_hwcontext +ffffffff81f41750 t smu_v13_0_10_mode2_reset +ffffffff81f42000 t smuio_v11_0_get_rom_index_offset +ffffffff81f42040 t smuio_v11_0_get_rom_data_offset +ffffffff81f42080 t smuio_v11_0_update_rom_clock_gating +ffffffff81f421d0 t smuio_v11_0_get_clock_gating_state +ffffffff81f43000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81f43040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81f43080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81f431d0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81f44000 t smuio_v13_0_get_rom_index_offset +ffffffff81f44040 t smuio_v13_0_get_rom_data_offset +ffffffff81f44080 t smuio_v13_0_update_rom_clock_gating +ffffffff81f441d0 t smuio_v13_0_get_clock_gating_state +ffffffff81f44270 t smuio_v13_0_get_die_id +ffffffff81f442f0 t smuio_v13_0_get_socket_id +ffffffff81f44380 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81f45000 t smuio_v13_0_3_get_die_id +ffffffff81f45080 t smuio_v13_0_3_get_socket_id +ffffffff81f45110 t smuio_v13_0_3_get_pkg_type +ffffffff81f46000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81f46040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81f47000 t smuio_v9_0_get_rom_index_offset +ffffffff81f47040 t smuio_v9_0_get_rom_data_offset +ffffffff81f47080 t smuio_v9_0_update_rom_clock_gating +ffffffff81f471c0 t smuio_v9_0_get_clock_gating_state +ffffffff81f48000 T soc15_grbm_select +ffffffff81f48090 T soc15_program_register_sequence +ffffffff81f48290 T soc15_set_virt_ops +ffffffff81f48300 t soc15_common_early_init +ffffffff81f48720 t soc15_common_late_init +ffffffff81f48780 t soc15_common_sw_init +ffffffff81f487e0 t soc15_common_sw_fini +ffffffff81f48830 t soc15_common_hw_init +ffffffff81f48950 t soc15_common_hw_fini +ffffffff81f48a20 t soc15_common_suspend +ffffffff81f48a60 t soc15_common_resume +ffffffff81f48b30 t soc15_common_is_idle +ffffffff81f48b60 t soc15_common_wait_for_idle +ffffffff81f48b90 t soc15_common_soft_reset +ffffffff81f48bc0 t soc15_common_set_clockgating_state +ffffffff81f48f00 t soc15_common_set_powergating_state +ffffffff81f48f30 t soc15_common_get_clockgating_state +ffffffff81f49060 t soc15_uvd_ctx_rreg +ffffffff81f49100 t soc15_uvd_ctx_wreg +ffffffff81f49190 t soc15_didt_rreg +ffffffff81f49230 t soc15_didt_wreg +ffffffff81f492b0 t soc15_gc_cac_rreg +ffffffff81f493d0 t soc15_gc_cac_wreg +ffffffff81f494e0 t soc15_se_cac_rreg +ffffffff81f49600 t soc15_se_cac_wreg +ffffffff81f49710 t soc15_read_disabled_bios +ffffffff81f49740 t soc15_read_register +ffffffff81f49840 t soc15_asic_reset +ffffffff81f499f0 t soc15_asic_reset_method +ffffffff81f49ba0 t soc15_get_xclk +ffffffff81f49c00 t soc15_set_uvd_clocks +ffffffff81f49c30 t soc15_set_vce_clocks +ffffffff81f49c60 t soc15_get_config_memsize +ffffffff81f49c80 t soc15_need_full_reset +ffffffff81f49cb0 t soc15_get_pcie_usage +ffffffff81f49de0 t soc15_need_reset_on_init +ffffffff81f49e90 t soc15_get_pcie_replay_count +ffffffff81f49f00 t soc15_supports_baco +ffffffff81f49f60 t soc15_pre_asic_init +ffffffff81f49f70 t soc15_query_video_codecs +ffffffff81f4a060 t vega20_get_pcie_usage +ffffffff81f4b000 T soc21_grbm_select +ffffffff81f4b090 t soc21_common_early_init +ffffffff81f4b200 t soc21_common_late_init +ffffffff81f4b2e0 t soc21_common_sw_init +ffffffff81f4b320 t soc21_common_sw_fini +ffffffff81f4b350 t soc21_common_hw_init +ffffffff81f4b410 t soc21_common_hw_fini +ffffffff81f4b4b0 t soc21_common_suspend +ffffffff81f4b550 t soc21_common_resume +ffffffff81f4b720 t soc21_common_is_idle +ffffffff81f4b750 t soc21_common_wait_for_idle +ffffffff81f4b780 t soc21_common_soft_reset +ffffffff81f4b7b0 t soc21_common_set_clockgating_state +ffffffff81f4b860 t soc21_common_set_powergating_state +ffffffff81f4b8c0 t soc21_common_get_clockgating_state +ffffffff81f4b910 t soc21_didt_rreg +ffffffff81f4b9b0 t soc21_didt_wreg +ffffffff81f4ba30 t soc21_read_disabled_bios +ffffffff81f4ba60 t soc21_read_register +ffffffff81f4bb50 t soc21_asic_reset +ffffffff81f4bc30 t soc21_asic_reset_method +ffffffff81f4bcf0 t soc21_get_xclk +ffffffff81f4bd20 t soc21_set_uvd_clocks +ffffffff81f4bd50 t soc21_set_vce_clocks +ffffffff81f4bd80 t soc21_get_config_memsize +ffffffff81f4bda0 t soc21_need_full_reset +ffffffff81f4bdd0 t soc21_init_doorbell_index +ffffffff81f4bef0 t soc21_need_reset_on_init +ffffffff81f4bf90 t soc21_pre_asic_init +ffffffff81f4bfc0 t soc21_update_umd_stable_pstate +ffffffff81f4c040 t soc21_query_video_codecs +ffffffff81f4d000 t tonga_ih_early_init +ffffffff81f4d050 t tonga_ih_sw_init +ffffffff81f4d0d0 t tonga_ih_sw_fini +ffffffff81f4d110 t tonga_ih_hw_init +ffffffff81f4d2f0 t tonga_ih_hw_fini +ffffffff81f4d390 t tonga_ih_suspend +ffffffff81f4d430 t tonga_ih_resume +ffffffff81f4d470 t tonga_ih_is_idle +ffffffff81f4d4c0 t tonga_ih_wait_for_idle +ffffffff81f4d560 t tonga_ih_check_soft_reset +ffffffff81f4d5c0 t tonga_ih_pre_soft_reset +ffffffff81f4d670 t tonga_ih_soft_reset +ffffffff81f4d740 t tonga_ih_post_soft_reset +ffffffff81f4d780 t tonga_ih_set_clockgating_state +ffffffff81f4d7b0 t tonga_ih_set_powergating_state +ffffffff81f4d7e0 t tonga_ih_get_wptr +ffffffff81f4d8f0 t tonga_ih_decode_iv +ffffffff81f4d970 t tonga_ih_set_rptr +ffffffff81f4e000 t umc_v6_0_init_registers +ffffffff81f4f000 t umc_v6_1_query_ras_error_count +ffffffff81f4f4e0 t umc_v6_1_query_ras_error_address +ffffffff81f4f7c0 t umc_v6_1_err_cnt_init +ffffffff81f50000 T umc_v6_7_convert_error_address +ffffffff81f50320 t umc_v6_7_query_ras_error_count +ffffffff81f50360 t umc_v6_7_query_ras_error_address +ffffffff81f50380 t umc_v6_7_query_ras_poison_mode +ffffffff81f503e0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81f50400 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81f50420 t umc_v6_7_query_ecc_error_count +ffffffff81f50690 t umc_v6_7_reset_error_count_per_channel +ffffffff81f50790 t umc_v6_7_query_error_address +ffffffff81f508b0 t umc_v6_7_ecc_info_querry_ecc_error_count +ffffffff81f50a80 t umc_v6_7_ecc_info_query_error_address +ffffffff81f51000 t umc_v8_10_query_ras_error_count +ffffffff81f51040 t umc_v8_10_query_ras_error_address +ffffffff81f51060 t umc_v8_10_err_cnt_init +ffffffff81f51080 t umc_v8_10_query_ras_poison_mode +ffffffff81f510b0 t umc_v8_10_ecc_info_query_ras_error_count +ffffffff81f510d0 t umc_v8_10_ecc_info_query_ras_error_address +ffffffff81f510f0 t umc_v8_10_set_eeprom_table_version +ffffffff81f51120 t umc_v8_10_query_ecc_error_count +ffffffff81f511f0 t umc_v8_10_clear_error_count_per_channel +ffffffff81f51260 t umc_v8_10_query_error_address +ffffffff81f51390 t umc_v8_10_convert_error_address +ffffffff81f515b0 t umc_v8_10_err_cnt_init_per_channel +ffffffff81f51660 t umc_v8_10_ecc_info_query_ecc_error_count +ffffffff81f51740 t umc_v8_10_ecc_info_query_error_address +ffffffff81f52000 t umc_v8_7_query_ras_error_count +ffffffff81f52310 t umc_v8_7_query_ras_error_address +ffffffff81f524d0 t umc_v8_7_err_cnt_init +ffffffff81f52630 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81f52750 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81f53000 t uvd_v5_0_early_init +ffffffff81f53050 t uvd_v5_0_sw_init +ffffffff81f53140 t uvd_v5_0_sw_fini +ffffffff81f53190 t uvd_v5_0_hw_init +ffffffff81f53690 t uvd_v5_0_hw_fini +ffffffff81f53710 t uvd_v5_0_suspend +ffffffff81f53810 t uvd_v5_0_resume +ffffffff81f53860 t uvd_v5_0_is_idle +ffffffff81f538b0 t uvd_v5_0_wait_for_idle +ffffffff81f53940 t uvd_v5_0_soft_reset +ffffffff81f539e0 t uvd_v5_0_set_clockgating_state +ffffffff81f53b80 t uvd_v5_0_set_powergating_state +ffffffff81f53bc0 t uvd_v5_0_get_clockgating_state +ffffffff81f53c40 t uvd_v5_0_ring_get_rptr +ffffffff81f53c80 t uvd_v5_0_ring_get_wptr +ffffffff81f53cc0 t uvd_v5_0_ring_set_wptr +ffffffff81f53cf0 t uvd_v5_0_ring_emit_ib +ffffffff81f53f60 t uvd_v5_0_ring_emit_fence +ffffffff81f54510 t uvd_v5_0_ring_test_ring +ffffffff81f546b0 t uvd_v5_0_ring_insert_nop +ffffffff81f54810 t uvd_v5_0_set_interrupt_state +ffffffff81f54840 t uvd_v5_0_process_interrupt +ffffffff81f548a0 t uvd_v5_0_stop +ffffffff81f549b0 t uvd_v5_0_start +ffffffff81f56000 t uvd_v6_0_early_init +ffffffff81f56160 t uvd_v6_0_sw_init +ffffffff81f563c0 t uvd_v6_0_sw_fini +ffffffff81f56480 t uvd_v6_0_hw_init +ffffffff81f56a30 t uvd_v6_0_hw_fini +ffffffff81f56ab0 t uvd_v6_0_suspend +ffffffff81f56bb0 t uvd_v6_0_resume +ffffffff81f56c00 t uvd_v6_0_is_idle +ffffffff81f56c50 t uvd_v6_0_wait_for_idle +ffffffff81f56ce0 t uvd_v6_0_check_soft_reset +ffffffff81f56d60 t uvd_v6_0_pre_soft_reset +ffffffff81f56da0 t uvd_v6_0_soft_reset +ffffffff81f56e70 t uvd_v6_0_post_soft_reset +ffffffff81f56f10 t uvd_v6_0_set_clockgating_state +ffffffff81f570a0 t uvd_v6_0_set_powergating_state +ffffffff81f57110 t uvd_v6_0_get_clockgating_state +ffffffff81f571a0 t uvd_v6_0_ring_get_rptr +ffffffff81f571e0 t uvd_v6_0_ring_get_wptr +ffffffff81f57220 t uvd_v6_0_ring_set_wptr +ffffffff81f57250 t uvd_v6_0_ring_emit_ib +ffffffff81f575b0 t uvd_v6_0_ring_emit_fence +ffffffff81f57b60 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81f57f50 t uvd_v6_0_ring_emit_vm_flush +ffffffff81f582b0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81f582e0 t uvd_v6_0_ring_test_ring +ffffffff81f58480 t uvd_v6_0_ring_insert_nop +ffffffff81f585e0 t uvd_v6_0_ring_emit_wreg +ffffffff81f58860 t uvd_v6_0_enc_ring_get_rptr +ffffffff81f588c0 t uvd_v6_0_enc_ring_get_wptr +ffffffff81f58920 t uvd_v6_0_enc_ring_set_wptr +ffffffff81f58960 t uvd_v6_0_enc_ring_emit_ib +ffffffff81f58ba0 t uvd_v6_0_enc_ring_emit_fence +ffffffff81f58de0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81f58f90 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81f591a0 t uvd_v6_0_enc_ring_test_ring +ffffffff81f592f0 t uvd_v6_0_enc_ring_test_ib +ffffffff81f597d0 t uvd_v6_0_enc_ring_insert_end +ffffffff81f59860 t uvd_v6_0_set_interrupt_state +ffffffff81f59890 t uvd_v6_0_process_interrupt +ffffffff81f59990 t uvd_v6_0_stop +ffffffff81f59aa0 t uvd_v6_0_start +ffffffff81f5b000 t uvd_v7_0_early_init +ffffffff81f5b270 t uvd_v7_0_sw_init +ffffffff81f5b690 t uvd_v7_0_sw_fini +ffffffff81f5b780 t uvd_v7_0_hw_init +ffffffff81f5e540 t uvd_v7_0_hw_fini +ffffffff81f5e850 t uvd_v7_0_suspend +ffffffff81f5e900 t uvd_v7_0_resume +ffffffff81f5e950 t uvd_v7_0_set_clockgating_state +ffffffff81f5e980 t uvd_v7_0_ring_get_rptr +ffffffff81f5ea20 t uvd_v7_0_ring_get_wptr +ffffffff81f5eac0 t uvd_v7_0_ring_set_wptr +ffffffff81f5eb40 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81f5ebb0 t uvd_v7_0_ring_emit_ib +ffffffff81f5ef50 t uvd_v7_0_ring_emit_fence +ffffffff81f5f5a0 t uvd_v7_0_ring_emit_vm_flush +ffffffff81f5f610 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81f5f640 t uvd_v7_0_ring_test_ring +ffffffff81f5f8d0 t uvd_v7_0_ring_insert_nop +ffffffff81f5fa70 t uvd_v7_0_ring_emit_wreg +ffffffff81f5fd40 t uvd_v7_0_ring_emit_reg_wait +ffffffff81f600f0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81f601e0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81f602e0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81f603e0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81f60620 t uvd_v7_0_enc_ring_emit_fence +ffffffff81f60860 t uvd_v7_0_enc_ring_emit_vm_flush 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vce_v3_0_get_clockgating_state +ffffffff81f636a0 t vce_v3_0_ring_get_rptr +ffffffff81f63770 t vce_v3_0_ring_get_wptr +ffffffff81f63840 t vce_v3_0_ring_set_wptr +ffffffff81f63900 t vce_v3_0_ring_emit_ib +ffffffff81f63b40 t vce_v3_0_emit_pipeline_sync +ffffffff81f63cf0 t vce_v3_0_emit_vm_flush +ffffffff81f63f60 t vce_v3_0_set_interrupt_state +ffffffff81f63fd0 t vce_v3_0_process_interrupt +ffffffff81f64090 t vce_v3_0_stop +ffffffff81f65000 t vce_v4_0_early_init +ffffffff81f650b0 t vce_v4_0_sw_init +ffffffff81f65350 t vce_v4_0_sw_fini +ffffffff81f653d0 t vce_v4_0_hw_init +ffffffff81f65b90 t vce_v4_0_hw_fini +ffffffff81f65cc0 t vce_v4_0_suspend +ffffffff81f65de0 t vce_v4_0_resume +ffffffff81f65e90 t vce_v4_0_set_clockgating_state +ffffffff81f65ec0 t vce_v4_0_set_powergating_state +ffffffff81f65fa0 t vce_v4_0_ring_get_rptr +ffffffff81f66010 t vce_v4_0_ring_get_wptr +ffffffff81f660a0 t vce_v4_0_ring_set_wptr +ffffffff81f66130 t vce_v4_0_ring_emit_ib +ffffffff81f66370 t vce_v4_0_ring_emit_fence +ffffffff81f665b0 t vce_v4_0_emit_vm_flush +ffffffff81f66620 t vce_v4_0_ring_insert_end +ffffffff81f666b0 t vce_v4_0_emit_wreg +ffffffff81f66800 t vce_v4_0_emit_reg_wait +ffffffff81f669c0 t vce_v4_0_set_interrupt_state +ffffffff81f66a50 t vce_v4_0_process_interrupt +ffffffff81f66af0 t vce_v4_0_start +ffffffff81f68000 T vcn_dec_sw_ring_emit_fence +ffffffff81f68240 T vcn_dec_sw_ring_insert_end +ffffffff81f682d0 T vcn_dec_sw_ring_emit_ib +ffffffff81f68510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81f686d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81f68740 T vcn_dec_sw_ring_emit_wreg +ffffffff81f69000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81f69140 T vcn_v1_0_ring_end_use +ffffffff81f691b0 t vcn_v1_0_early_init +ffffffff81f69310 t vcn_v1_0_sw_init +ffffffff81f695b0 t vcn_v1_0_sw_fini +ffffffff81f69610 t vcn_v1_0_hw_init +ffffffff81f696e0 t vcn_v1_0_hw_fini +ffffffff81f697e0 t vcn_v1_0_suspend +ffffffff81f69850 t vcn_v1_0_resume +ffffffff81f69930 t vcn_v1_0_is_idle +ffffffff81f699c0 t vcn_v1_0_wait_for_idle +ffffffff81f69a00 t vcn_v1_0_set_clockgating_state +ffffffff81f69ab0 t vcn_v1_0_set_powergating_state +ffffffff81f6a010 t vcn_v1_0_dec_ring_get_rptr +ffffffff81f6a0a0 t vcn_v1_0_dec_ring_get_wptr +ffffffff81f6a130 t vcn_v1_0_dec_ring_set_wptr +ffffffff81f6a240 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81f6a400 t vcn_v1_0_dec_ring_emit_ib +ffffffff81f6a780 t vcn_v1_0_dec_ring_emit_fence +ffffffff81f6ad90 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81f6ae00 t vcn_v1_0_dec_ring_insert_nop +ffffffff81f6af90 t vcn_v1_0_dec_ring_insert_start +ffffffff81f6b160 t vcn_v1_0_dec_ring_insert_end +ffffffff81f6b270 t vcn_v1_0_ring_begin_use +ffffffff81f6b310 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81f6b5c0 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81f6b940 t vcn_v1_0_enc_ring_get_rptr +ffffffff81f6ba20 t vcn_v1_0_enc_ring_get_wptr +ffffffff81f6bb00 t vcn_v1_0_enc_ring_set_wptr +ffffffff81f6bbc0 t vcn_v1_0_enc_ring_emit_ib +ffffffff81f6be00 t vcn_v1_0_enc_ring_emit_fence +ffffffff81f6c040 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81f6c0b0 t vcn_v1_0_enc_ring_insert_end +ffffffff81f6c140 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81f6c290 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81f6c450 t vcn_v1_0_set_interrupt_state +ffffffff81f6c480 t vcn_v1_0_process_interrupt +ffffffff81f6c530 t vcn_v1_0_idle_work_handler +ffffffff81f6c6a0 t vcn_v1_0_pause_dpg_mode +ffffffff81f6d540 t vcn_v1_0_enable_clock_gating +ffffffff81f6d970 t vcn_v1_0_disable_clock_gating +ffffffff81f6df30 t vcn_1_0_enable_static_power_gating +ffffffff81f6e0e0 t vcn_v1_0_start_dpg_mode +ffffffff81f71ea0 t vcn_v1_0_start_spg_mode +ffffffff81f740a0 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81f75000 T vcn_v2_0_dec_ring_insert_start +ffffffff81f751c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81f752c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81f75430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81f759f0 T vcn_v2_0_dec_ring_emit_ib +ffffffff81f75d50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81f760a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81f76110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81f76390 T vcn_v2_0_enc_ring_emit_fence +ffffffff81f765d0 T vcn_v2_0_enc_ring_insert_end +ffffffff81f76660 T vcn_v2_0_enc_ring_emit_ib +ffffffff81f768a0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81f76a60 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81f76ad0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81f76c20 T vcn_v2_0_dec_ring_test_ring +ffffffff81f76ec0 t vcn_v2_0_early_init +ffffffff81f77020 t vcn_v2_0_sw_init +ffffffff81f77350 t vcn_v2_0_sw_fini +ffffffff81f773d0 t vcn_v2_0_hw_init +ffffffff81f77d50 t vcn_v2_0_hw_fini +ffffffff81f77e50 t vcn_v2_0_suspend +ffffffff81f77e80 t vcn_v2_0_resume +ffffffff81f77ed0 t vcn_v2_0_is_idle +ffffffff81f77f60 t vcn_v2_0_wait_for_idle +ffffffff81f77fa0 t vcn_v2_0_set_clockgating_state +ffffffff81f78030 t vcn_v2_0_set_powergating_state +ffffffff81f785f0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81f78680 t vcn_v2_0_dec_ring_get_wptr +ffffffff81f78720 t vcn_v2_0_dec_ring_set_wptr +ffffffff81f78860 t vcn_v2_0_enc_ring_get_rptr +ffffffff81f78940 t vcn_v2_0_enc_ring_get_wptr +ffffffff81f78a30 t vcn_v2_0_enc_ring_set_wptr +ffffffff81f78b20 t vcn_v2_0_set_interrupt_state +ffffffff81f78b50 t vcn_v2_0_process_interrupt +ffffffff81f78c00 t vcn_v2_0_pause_dpg_mode +ffffffff81f793f0 t vcn_v2_0_enable_clock_gating +ffffffff81f79680 t vcn_v2_0_disable_clock_gating +ffffffff81f79aa0 t vcn_v2_0_start +ffffffff81f7e050 t vcn_v2_0_enable_static_power_gating +ffffffff81f7e1b0 t vcn_v2_0_clock_gating_dpg_mode +ffffffff81f7ef30 t vcn_v2_0_mc_resume_dpg_mode +ffffffff81f84000 t vcn_v2_6_query_poison_status +ffffffff81f840e0 t vcn_v2_5_early_init +ffffffff81f843b0 t vcn_v2_5_sw_init +ffffffff81f84880 t vcn_v2_5_sw_fini +ffffffff81f84950 t vcn_v2_5_hw_init +ffffffff81f85390 t vcn_v2_5_hw_fini +ffffffff81f85500 t vcn_v2_5_suspend +ffffffff81f85530 t vcn_v2_5_resume +ffffffff81f85580 t vcn_v2_5_is_idle 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vcn_v3_0_hw_init +ffffffff81f93310 t vcn_v3_0_hw_fini +ffffffff81f93410 t vcn_v3_0_suspend +ffffffff81f93440 t vcn_v3_0_resume +ffffffff81f93490 t vcn_v3_0_is_idle +ffffffff81f93580 t vcn_v3_0_wait_for_idle +ffffffff81f93620 t vcn_v3_0_set_clockgating_state +ffffffff81f93730 t vcn_v3_0_set_powergating_state +ffffffff81f95cc0 t vcn_v3_0_dec_ring_get_rptr +ffffffff81f95d60 t vcn_v3_0_dec_ring_get_wptr +ffffffff81f95e10 t vcn_v3_0_dec_ring_set_wptr +ffffffff81f95f80 t vcn_v3_0_ring_patch_cs_in_place +ffffffff81f962a0 t vcn_v3_0_enc_ring_get_rptr +ffffffff81f96390 t vcn_v3_0_enc_ring_get_wptr +ffffffff81f964a0 t vcn_v3_0_enc_ring_set_wptr +ffffffff81f965b0 t vcn_v3_0_set_interrupt_state +ffffffff81f965e0 t vcn_v3_0_process_interrupt +ffffffff81f966d0 t vcn_v3_0_pause_dpg_mode +ffffffff81f96f00 t vcn_v3_0_enable_clock_gating +ffffffff81f97190 t vcn_v3_0_disable_clock_gating +ffffffff81f976c0 t vcn_v3_0_start_dpg_mode +ffffffff81f9a9b0 t vcn_v3_0_clock_gating_dpg_mode +ffffffff81f9b790 t vcn_v3_0_mc_resume_dpg_mode +ffffffff81fa0000 t vcn_v4_0_query_ras_poison_status +ffffffff81fa00e0 t vcn_v4_0_early_init +ffffffff81fa02a0 t vcn_v4_0_sw_init +ffffffff81fa0560 t vcn_v4_0_sw_fini +ffffffff81fa0640 t vcn_v4_0_hw_init +ffffffff81fa1070 t vcn_v4_0_hw_fini +ffffffff81fa11c0 t vcn_v4_0_suspend +ffffffff81fa11f0 t vcn_v4_0_resume +ffffffff81fa1240 t vcn_v4_0_is_idle +ffffffff81fa1340 t vcn_v4_0_wait_for_idle +ffffffff81fa13f0 t vcn_v4_0_set_clockgating_state +ffffffff81fa1500 t vcn_v4_0_set_powergating_state +ffffffff81fa1d40 t vcn_v4_0_unified_ring_get_rptr +ffffffff81fa1e20 t vcn_v4_0_unified_ring_get_wptr +ffffffff81fa1f10 t vcn_v4_0_unified_ring_set_wptr +ffffffff81fa2010 t vcn_v4_0_ring_patch_cs_in_place +ffffffff81fa23a0 t vcn_v4_0_limit_sched +ffffffff81fa2400 t vcn_v4_0_set_interrupt_state +ffffffff81fa2430 t vcn_v4_0_process_interrupt +ffffffff81fa24f0 t vcn_v4_0_set_ras_interrupt_state +ffffffff81fa2520 t vcn_v4_0_pause_dpg_mode +ffffffff81fa27a0 t vcn_v4_0_enable_clock_gating +ffffffff81fa2aa0 t vcn_v4_0_disable_clock_gating +ffffffff81fa2f60 t vcn_v4_0_start +ffffffff81fa7a50 t vcn_v4_0_disable_clock_gating_dpg_mode +ffffffff81fa8830 t vcn_v4_0_mc_resume_dpg_mode +ffffffff81fad000 t vcn_v4_0_3_early_init +ffffffff81fad100 t vcn_v4_0_3_sw_init +ffffffff81fad380 t vcn_v4_0_3_sw_fini +ffffffff81fad440 t vcn_v4_0_3_hw_init +ffffffff81fae140 t vcn_v4_0_3_hw_fini +ffffffff81fae1d0 t vcn_v4_0_3_suspend +ffffffff81fae240 t vcn_v4_0_3_resume +ffffffff81fae290 t vcn_v4_0_3_is_idle +ffffffff81fae400 t vcn_v4_0_3_wait_for_idle +ffffffff81fae500 t vcn_v4_0_3_set_clockgating_state +ffffffff81fae690 t vcn_v4_0_3_set_powergating_state +ffffffff81faed80 t vcn_v4_0_3_unified_ring_get_rptr +ffffffff81faeef0 t vcn_v4_0_3_unified_ring_get_wptr +ffffffff81faf080 t vcn_v4_0_3_unified_ring_set_wptr +ffffffff81faf230 t vcn_v4_0_3_set_interrupt_state +ffffffff81faf260 t vcn_v4_0_3_process_interrupt +ffffffff81faf380 t vcn_v4_0_3_query_ras_error_count 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legacy_doorbell_index_init +ffffffff81fbf570 t vi_common_early_init +ffffffff81fbf860 t vi_common_late_init +ffffffff81fbf8a0 t vi_common_sw_init +ffffffff81fbf8e0 t vi_common_sw_fini +ffffffff81fbf910 t vi_common_hw_init +ffffffff81fbffd0 t vi_common_hw_fini +ffffffff81fc0050 t vi_common_suspend +ffffffff81fc00d0 t vi_common_resume +ffffffff81fc0110 t vi_common_is_idle +ffffffff81fc0140 t vi_common_wait_for_idle +ffffffff81fc0170 t vi_common_soft_reset +ffffffff81fc01a0 t vi_common_set_clockgating_state +ffffffff81fc0710 t vi_common_set_powergating_state +ffffffff81fc0740 t vi_common_get_clockgating_state +ffffffff81fc0800 t cz_smc_rreg +ffffffff81fc0880 t cz_smc_wreg +ffffffff81fc08f0 t vi_smc_rreg +ffffffff81fc0970 t vi_smc_wreg +ffffffff81fc09e0 t vi_pcie_rreg +ffffffff81fc0a80 t vi_pcie_wreg +ffffffff81fc0b10 t vi_uvd_ctx_rreg +ffffffff81fc0ba0 t vi_uvd_ctx_wreg +ffffffff81fc0c10 t vi_didt_rreg +ffffffff81fc0c90 t vi_didt_wreg +ffffffff81fc0d00 t vi_gc_cac_rreg +ffffffff81fc0d80 t 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amdgpu_dm_update_freesync_caps +ffffffff81fc3a70 T dm_atomic_get_state +ffffffff81fc3ae0 T amdgpu_dm_connector_atomic_set_property +ffffffff81fc3ba0 T amdgpu_dm_connector_atomic_get_property +ffffffff81fc3c40 T amdgpu_dm_connector_funcs_reset +ffffffff81fc3d30 T amdgpu_dm_connector_atomic_duplicate_state +ffffffff81fc3e30 T create_validate_stream_for_sink +ffffffff81fc5500 T amdgpu_dm_connector_mode_valid +ffffffff81fc56d0 T convert_dc_color_depth_into_bpc +ffffffff81fc5710 t dm_encoder_helper_disable +ffffffff81fc5740 t dm_encoder_helper_atomic_check +ffffffff81fc5910 T amdgpu_dm_connector_init_helper +ffffffff81fc5c70 T amdgpu_dm_get_encoder_crtc_mask +ffffffff81fc5cc0 T dm_restore_drm_connector_state +ffffffff81fc5e30 t parse_hdmi_amd_vsdb +ffffffff81fc6160 T amdgpu_dm_trigger_timing_sync +ffffffff81fc6330 T dm_write_reg_func +ffffffff81fc6350 T dm_read_reg_func +ffffffff81fc63f0 T amdgpu_dm_process_dmub_aux_transfer_sync +ffffffff81fc6600 T amdgpu_dm_process_dmub_set_config_sync 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+ffffffff81fd9750 T dm_helpers_init_panel_settings +ffffffff81fd97c0 T dm_helpers_override_panel_settings +ffffffff81fd9800 T dm_helpers_allocate_gpu_mem +ffffffff81fd9900 T dm_helpers_free_gpu_mem +ffffffff81fd9990 T dm_helpers_dmub_outbox_interrupt_control +ffffffff81fd9a20 T dm_helpers_mst_enable_stream_features +ffffffff81fd9b30 T dm_helpers_dp_handle_test_pattern_request +ffffffff81fd9e60 T dm_set_phyd32clk +ffffffff81fd9e90 T dm_helpers_enable_periodic_detection +ffffffff81fd9ec0 T dm_helpers_dp_mst_update_branch_bandwidth +ffffffff81fd9ef0 T dm_get_adaptive_sync_support_type +ffffffff81fd9f60 t execute_synaptics_rc_command +ffffffff81fdb000 T amdgpu_dm_irq_register_interrupt +ffffffff81fdb1a0 t dm_irq_work_func +ffffffff81fdb1c0 T amdgpu_dm_irq_unregister_interrupt +ffffffff81fdb340 T amdgpu_dm_irq_init +ffffffff81fdb430 T amdgpu_dm_irq_fini +ffffffff81fdb5d0 T amdgpu_dm_irq_suspend +ffffffff81fdb6e0 T amdgpu_dm_irq_resume_early +ffffffff81fdb8a0 T amdgpu_dm_irq_resume_late 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+ffffffff81fe08c0 T amdgpu_dm_plane_fill_dc_scaling_info +ffffffff81fe0b20 T amdgpu_dm_plane_handle_cursor_update +ffffffff81fe0db0 T amdgpu_dm_plane_init +ffffffff81fe1bb0 T is_video_format +ffffffff81fe1c00 t dm_drm_plane_reset +ffffffff81fe1c90 t dm_drm_plane_duplicate_state +ffffffff81fe1d20 t dm_drm_plane_destroy_state +ffffffff81fe1d60 t dm_plane_format_mod_supported +ffffffff81fe1e90 t dm_plane_helper_prepare_fb +ffffffff81fe2140 t dm_plane_helper_cleanup_fb +ffffffff81fe21e0 t dm_plane_atomic_check +ffffffff81fe22b0 t dm_plane_atomic_async_check +ffffffff81fe22f0 t dm_plane_atomic_async_update +ffffffff81fe23a0 t amdgpu_bo_reserve +ffffffff81fe25a0 t amdgpu_bo_unreserve +ffffffff81fe3000 T dm_pp_apply_display_requirements +ffffffff81fe31d0 T dm_pp_get_clock_levels_by_type +ffffffff81fe3510 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff81fe36d0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff81fe3880 T dm_pp_notify_wm_clock_changes +ffffffff81fe38d0 T dm_pp_apply_power_level_change_request +ffffffff81fe3900 T dm_pp_apply_clock_for_voltage_request +ffffffff81fe39a0 T dm_pp_get_static_clocks +ffffffff81fe3a60 T dm_pp_get_funcs +ffffffff81fe3b70 t pp_rv_set_wm_ranges +ffffffff81fe3cf0 t pp_rv_set_pme_wa_enable +ffffffff81fe3d10 t pp_rv_set_active_display_count +ffffffff81fe3d30 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff81fe3d50 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff81fe3d70 t pp_rv_set_hard_min_fclk_by_freq +ffffffff81fe3d90 t pp_nv_set_display_count +ffffffff81fe3df0 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff81fe3e60 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff81fe3ec0 t pp_nv_set_voltage_by_freq +ffffffff81fe3f50 t pp_nv_set_wm_ranges +ffffffff81fe3fa0 t pp_nv_set_hard_min_uclk_by_freq +ffffffff81fe4010 t pp_nv_get_maximum_sustainable_clocks +ffffffff81fe4070 t pp_nv_get_uclk_dpm_states +ffffffff81fe40d0 t pp_nv_set_pstate_handshake_support +ffffffff81fe4120 t pp_rn_set_wm_ranges +ffffffff81fe4170 t pp_rn_get_dpm_clock_table +ffffffff81fe5000 T amdgpu_dm_set_psr_caps +ffffffff81fe5150 T amdgpu_dm_link_setup_psr +ffffffff81fe52e0 T amdgpu_dm_psr_enable +ffffffff81fe53e0 T amdgpu_dm_psr_disable +ffffffff81fe5460 T amdgpu_dm_psr_disable_all +ffffffff81fe6000 T amdgpu_dm_setup_replay +ffffffff81fe60f0 T amdgpu_dm_replay_enable +ffffffff81fe6270 T amdgpu_dm_replay_disable +ffffffff81fe7000 T dm_get_elapse_time_in_ns +ffffffff81fe7030 T dm_perf_trace_timestamp +ffffffff81fe8000 T dc_assert_fp_enabled +ffffffff81fe8070 T dc_fpu_begin +ffffffff81fe80c0 T dc_fpu_end +ffffffff81fe9000 T dal_vector_construct +ffffffff81fe90d0 T dal_vector_presized_create +ffffffff81fe9340 T dal_vector_create +ffffffff81fe9460 T dal_vector_destruct +ffffffff81fe94b0 T dal_vector_destroy +ffffffff81fe9530 T dal_vector_get_count +ffffffff81fe9560 T dal_vector_at_index +ffffffff81fe95a0 T dal_vector_remove_at_index +ffffffff81fe9630 T dal_vector_set_at_index +ffffffff81fe9690 T dal_vector_insert_at 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+ffffffff81ff06c0 t bios_parser_adjust_pixel_clock +ffffffff81ff0700 t bios_parser_set_pixel_clock +ffffffff81ff0740 t bios_parser_set_dce_clock +ffffffff81ff0780 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff81ff07d0 t bios_parser_program_crtc_timing +ffffffff81ff0810 t bios_parser_program_display_engine_pll +ffffffff81ff0850 t bios_parser_enable_disp_power_gating +ffffffff81ff0890 t bios_parser_destroy +ffffffff81ff0950 t bios_get_board_layout_info +ffffffff81ff0bd0 t get_bios_object +ffffffff81ff0da0 t get_ss_info_from_ss_info_table +ffffffff81ff0f70 t get_ss_info_v3_1 +ffffffff81ff10e0 t get_ss_entry_number_from_ss_info_tbl +ffffffff81ff2000 T firmware_parser_create +ffffffff81ff3e70 t bios_parser_get_connectors_number +ffffffff81ff3fe0 t bios_parser_get_connector_id +ffffffff81ff4040 t bios_parser_get_src_obj +ffffffff81ff42e0 t bios_parser_get_i2c_info +ffffffff81ff4580 t bios_parser_get_hpd_info +ffffffff81ff46f0 t bios_parser_get_device_tag +ffffffff81ff49c0 t bios_parser_get_spread_spectrum_info +ffffffff81ff4e40 t bios_parser_get_ss_entry_number +ffffffff81ff4e70 t bios_parser_get_embedded_panel_info +ffffffff81ff5070 t bios_parser_get_gpio_pin_info +ffffffff81ff5190 t bios_parser_get_encoder_cap_info +ffffffff81ff5300 t bios_parser_is_accelerated_mode +ffffffff81ff5310 t bios_parser_set_scratch_critical_state +ffffffff81ff5320 t bios_parser_is_device_id_supported +ffffffff81ff5390 t bios_parser_encoder_control +ffffffff81ff53d0 t bios_parser_transmitter_control +ffffffff81ff5410 t bios_parser_enable_crtc +ffffffff81ff5460 t bios_parser_set_pixel_clock +ffffffff81ff54a0 t bios_parser_set_dce_clock +ffffffff81ff54e0 t bios_parser_program_crtc_timing +ffffffff81ff5520 t bios_parser_enable_disp_power_gating +ffffffff81ff5560 t firmware_parser_destroy +ffffffff81ff5620 t bios_get_board_layout_info +ffffffff81ff5ac0 t bios_parser_pack_data_tables +ffffffff81ff5af0 t bios_get_atom_dc_golden_table +ffffffff81ff5c30 t bios_parser_enable_lvtma_control +ffffffff81ff5c80 t bios_parser_get_soc_bb_info +ffffffff81ff5d90 t bios_parser_get_disp_connector_caps_info +ffffffff81ff5ef0 t bios_parser_get_lttpr_caps +ffffffff81ff6040 t bios_parser_get_lttpr_interop +ffffffff81ff6180 t bios_parser_get_connector_speed_cap_info +ffffffff81ff62d0 t get_bios_object +ffffffff81ff6430 t get_bios_object_from_path_v3 +ffffffff81ff7000 T object_id_from_bios_object_id +ffffffff81ff8000 T bios_get_image +ffffffff81ff8050 T bios_is_accelerated_mode +ffffffff81ff80b0 T bios_set_scratch_acc_mode_change +ffffffff81ff80f0 T bios_set_scratch_critical_state +ffffffff81ff8130 T bios_get_vga_enabled_displays +ffffffff81ff9000 T dal_bios_parser_create +ffffffff81ff9070 T dal_bios_parser_destroy +ffffffff81ffa000 T dal_bios_parser_init_cmd_tbl +ffffffff81ffa810 t encoder_control_digx_v3 +ffffffff81ffa910 t encoder_control_digx_v4 +ffffffff81ffaa10 t encoder_control_digx_v5 +ffffffff81ffab60 t encoder_control_dig1_v1 +ffffffff81ffabe0 t encoder_control_dig2_v1 +ffffffff81ffac60 t encoder_control_dig_v1 +ffffffff81ffacc0 t transmitter_control_v2 +ffffffff81ffae60 t transmitter_control_v3 +ffffffff81ffb010 t transmitter_control_v4 +ffffffff81ffb1c0 t transmitter_control_v1_5 +ffffffff81ffb330 t transmitter_control_v1_6 +ffffffff81ffb490 t set_pixel_clock_v3 +ffffffff81ffb600 t set_pixel_clock_v5 +ffffffff81ffb7a0 t set_pixel_clock_v6 +ffffffff81ffb940 t set_pixel_clock_v7 +ffffffff81ffbb10 t enable_spread_spectrum_on_ppll_v1 +ffffffff81ffbc30 t enable_spread_spectrum_on_ppll_v2 +ffffffff81ffbd60 t enable_spread_spectrum_on_ppll_v3 +ffffffff81ffbe70 t adjust_display_pll_v2 +ffffffff81ffbfc0 t adjust_display_pll_v3 +ffffffff81ffc130 t dac1_encoder_control_v1 +ffffffff81ffc1b0 t dac2_encoder_control_v1 +ffffffff81ffc230 t dac1_output_control_v1 +ffffffff81ffc290 t dac2_output_control_v1 +ffffffff81ffc2f0 t set_crtc_using_dtd_timing_v3 +ffffffff81ffc440 t set_crtc_timing_v1 +ffffffff81ffc5c0 t enable_crtc_v1 +ffffffff81ffc660 t enable_crtc_mem_req_v1 +ffffffff81ffc700 t program_clock_v5 +ffffffff81ffc810 t program_clock_v6 +ffffffff81ffc930 t external_encoder_control_v3 +ffffffff81ffcae0 t enable_disp_power_gating_v2_1 +ffffffff81ffcbb0 t set_dce_clock_v2_1 +ffffffff81ffd000 T dal_firmware_parser_init_cmd_tbl +ffffffff81ffd3d0 t encoder_control_digx_v1_5 +ffffffff81ffd5a0 t encoder_control_fallback +ffffffff81ffd600 t transmitter_control_v1_6 +ffffffff81ffd7a0 t transmitter_control_v1_7 +ffffffff81ffd990 t transmitter_control_fallback +ffffffff81ffd9f0 t set_pixel_clock_v7 +ffffffff81ffdc40 t set_pixel_clock_fallback +ffffffff81ffdca0 t set_crtc_using_dtd_timing_v3 +ffffffff81ffddf0 t enable_crtc_v1 +ffffffff81ffde90 t external_encoder_control_v3 +ffffffff81ffdec0 t enable_disp_power_gating_v2_1 +ffffffff81ffe010 t enable_disp_power_gating_fallback +ffffffff81ffe070 t set_dce_clock_v2_1 +ffffffff81ffe1a0 t get_smu_clock_info_v3_1 +ffffffff81ffe210 t enable_lvtma_control +ffffffff81fff000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81fff0a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81fff1c0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81fff240 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81fff2d0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81fff390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81fff470 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff82000000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff820000b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff820001c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff82000240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff820002d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff820003b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff82001000 T dal_cmd_tbl_helper_dce110_get_table +ffffffff82001030 t encoder_action_to_atom +ffffffff820010b0 t engine_bp_to_atom +ffffffff82001100 t clock_source_id_to_atom +ffffffff820011a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff820011f0 t signal_type_to_atom_dig_mode +ffffffff82001250 t hpd_sel_to_atom +ffffffff82001290 t dig_encoder_sel_to_atom +ffffffff820012c0 t phy_id_to_atom +ffffffff82001300 t disp_power_gating_action_to_atom +ffffffff82002000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff82002030 t encoder_action_to_atom ffffffff820020b0 t engine_bp_to_atom ffffffff82002100 t clock_source_id_to_atom -ffffffff820021a0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff820021f0 t signal_type_to_atom_dig_mode -ffffffff82002250 t hpd_sel_to_atom -ffffffff82002290 t dig_encoder_sel_to_atom -ffffffff820022c0 t phy_id_to_atom -ffffffff82002300 t disp_power_gating_action_to_atom -ffffffff82003000 T dal_cmd_tbl_helper_dce112_get_table2 +ffffffff820021d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff82002220 t signal_type_to_atom_dig_mode +ffffffff82002280 t hpd_sel_to_atom +ffffffff820022c0 t dig_encoder_sel_to_atom +ffffffff820022f0 t phy_id_to_atom +ffffffff82002330 t disp_power_gating_action_to_atom +ffffffff820023a0 t dc_clock_type_to_atom +ffffffff82002420 t transmitter_color_depth_to_atom +ffffffff82003000 T dal_cmd_tbl_helper_dce112_get_table ffffffff82003030 t encoder_action_to_atom ffffffff820030b0 t engine_bp_to_atom ffffffff82003100 t clock_source_id_to_atom @@ -31748,7 +31760,7 @@ ffffffff820032f0 t phy_id_to_atom ffffffff82003330 t disp_power_gating_action_to_atom ffffffff820033a0 t dc_clock_type_to_atom ffffffff82003420 t transmitter_color_depth_to_atom -ffffffff82004000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff82004000 T dal_cmd_tbl_helper_dce80_get_table ffffffff82004030 t encoder_action_to_atom ffffffff820040b0 t engine_bp_to_atom ffffffff82004100 t clock_source_id_to_atom @@ -31756,26416 +31768,26404 @@ ffffffff820041d0 t clock_source_id_to_atom_phy_clk_src ffffffff82004220 t signal_type_to_atom_dig_mode ffffffff82004280 t hpd_sel_to_atom ffffffff820042c0 t dig_encoder_sel_to_atom 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dce_adjust_dp_ref_freq_for_ss -ffffffff82007170 T dce_get_dp_ref_freq_khz -ffffffff820072a0 T dce12_get_dp_ref_freq_khz -ffffffff820072c0 T dce_get_max_pixel_clock_for_all_paths -ffffffff820074d0 T dce_get_required_clocks_state -ffffffff82007580 T dce_set_clock -ffffffff820076e0 T dce_clock_read_ss_info -ffffffff82007800 T dce_clk_mgr_construct -ffffffff820079f0 t dce_update_clocks -ffffffff82008000 T dce110_get_min_vblank_time_us -ffffffff82008090 T dce110_fill_display_configs -ffffffff82008300 T dce11_pplib_apply_display_requirements -ffffffff820085f0 T dce110_clk_mgr_construct -ffffffff820086a0 t dce11_update_clocks -ffffffff82009000 T dce112_set_clock -ffffffff82009180 T dce112_set_dispclk -ffffffff820092a0 T dce112_set_dprefclk -ffffffff82009310 T dce112_clk_mgr_construct -ffffffff820093c0 t dce112_update_clocks -ffffffff8200a000 T dce120_clk_mgr_construct -ffffffff8200a090 T dce121_clk_mgr_construct -ffffffff8200a1c0 t dce12_update_clocks -ffffffff8200b000 T rv1_clk_mgr_construct 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rn_clk_mgr_construct -ffffffff820118a0 t rn_update_clocks -ffffffff82011e60 t rn_set_low_power_state -ffffffff82012040 t rn_init_clocks -ffffffff820120e0 t rn_enable_pme_wa -ffffffff820120f0 t rn_are_clock_states_equal -ffffffff82012140 t rn_notify_wm_ranges -ffffffff820124d0 t rn_notify_link_rate_change -ffffffff82013000 T rn_vbios_smu_get_smu_version -ffffffff82013020 t rn_vbios_smu_send_msg_with_param -ffffffff820131b0 T rn_vbios_smu_set_dispclk -ffffffff820132d0 T rn_vbios_smu_set_dprefclk -ffffffff82013340 T rn_vbios_smu_set_hard_min_dcfclk -ffffffff820133c0 T rn_vbios_smu_set_min_deep_sleep_dcfclk -ffffffff82013440 T rn_vbios_smu_set_phyclk -ffffffff82013480 T rn_vbios_smu_set_dppclk -ffffffff82013530 T rn_vbios_smu_set_dcn_low_power_state -ffffffff82013550 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn -ffffffff82013570 T rn_vbios_smu_enable_pme_wa -ffffffff82013590 T rn_vbios_smu_is_periodic_retraining_disabled -ffffffff82014000 T dcn3_init_clocks -ffffffff820143b0 t dcn3_init_clocks_fpga -ffffffff820143c0 T dcn3_clk_mgr_construct -ffffffff82014510 T dcn3_clk_mgr_destroy -ffffffff82014570 t dcn3_update_clocks -ffffffff82014990 t dcn3_enable_pme_wa -ffffffff820149d0 t dcn3_are_clock_states_equal -ffffffff82014a30 t dcn3_notify_wm_ranges -ffffffff82014cc0 t dcn30_notify_link_rate_change -ffffffff82014de0 t dcn3_set_hard_min_memclk -ffffffff82014e80 t dcn3_set_hard_max_memclk -ffffffff82014ee0 t dcn3_set_max_memclk -ffffffff82014f20 t dcn3_set_min_memclk -ffffffff82014f60 t dcn3_get_memclk_states_from_smu -ffffffff820150a0 t dcn3_is_smu_present -ffffffff82016000 T dcn30_smu_test_message -ffffffff82016070 t dcn30_smu_send_msg_with_param -ffffffff820161d0 T dcn30_smu_get_smu_version -ffffffff820161f0 T dcn30_smu_check_driver_if_version -ffffffff82016240 T dcn30_smu_check_msg_header_version -ffffffff82016290 T dcn30_smu_set_dram_addr_high -ffffffff820162b0 T dcn30_smu_set_dram_addr_low -ffffffff820162d0 T dcn30_smu_transfer_wm_table_smu_2_dram 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dcn301_smu_enable_phy_refclk_pwrdwn -ffffffff820175c0 T dcn301_smu_enable_pme_wa -ffffffff820175e0 T dcn301_smu_set_dram_addr_high -ffffffff82017630 T dcn301_smu_set_dram_addr_low -ffffffff82017680 T dcn301_smu_transfer_dpm_table_smu_2_dram -ffffffff820176a0 T dcn301_smu_transfer_wm_table_dram_2_smu -ffffffff82018000 T vg_clk_mgr_construct -ffffffff82018840 T vg_clk_mgr_destroy -ffffffff82018890 t vg_update_clocks -ffffffff82018bd0 t vg_init_clocks -ffffffff82018c70 t vg_enable_pme_wa -ffffffff82018c80 t vg_are_clock_states_equal -ffffffff82018cd0 t vg_notify_wm_ranges -ffffffff8201a000 T dcn31_update_clocks -ffffffff8201a610 T dcn31_init_clocks -ffffffff8201a6c0 T dcn31_are_clock_states_equal -ffffffff8201a720 T dcn31_get_dtb_ref_freq_khz -ffffffff8201a750 T dcn31_clk_mgr_construct -ffffffff8201ae20 T dcn31_clk_mgr_destroy -ffffffff8201ae70 t dcn31_set_low_power_state -ffffffff8201b080 t dcn31_enable_pme_wa -ffffffff8201b090 t dcn31_notify_wm_ranges -ffffffff8201b410 t find_clk_for_voltage -ffffffff8201c000 T dcn31_smu_get_smu_version -ffffffff8201c020 t dcn31_smu_send_msg_with_param -ffffffff8201c230 T dcn31_smu_set_dispclk -ffffffff8201c2a0 T dcn31_smu_set_dprefclk -ffffffff8201c310 T dcn31_smu_set_hard_min_dcfclk -ffffffff8201c390 T dcn31_smu_set_min_deep_sleep_dcfclk -ffffffff8201c410 T dcn31_smu_set_dppclk -ffffffff8201c480 T dcn31_smu_set_display_idle_optimization -ffffffff8201c4d0 T dcn31_smu_enable_phy_refclk_pwrdwn -ffffffff8201c520 T dcn31_smu_enable_pme_wa -ffffffff8201c560 T dcn31_smu_set_dram_addr_high -ffffffff8201c5a0 T dcn31_smu_set_dram_addr_low -ffffffff8201c5e0 T dcn31_smu_transfer_dpm_table_smu_2_dram -ffffffff8201c620 T dcn31_smu_transfer_wm_table_dram_2_smu -ffffffff8201c660 T dcn31_smu_set_zstate_support -ffffffff8201c6d0 T dcn31_smu_set_dtbclk -ffffffff8201d000 T dcn314_update_clocks -ffffffff8201d650 T dcn314_are_clock_states_equal -ffffffff8201d6b0 T dcn314_clk_mgr_construct -ffffffff8201e3c0 T dcn314_clk_mgr_destroy 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t dcn315_update_clocks -ffffffff82020da0 t dcn315_enable_pme_wa -ffffffff82020db0 t dcn315_notify_wm_ranges -ffffffff82021130 t dcn315_disable_otg_wa -ffffffff82022000 T dcn315_smu_get_smu_version -ffffffff82022020 t dcn315_smu_send_msg_with_param -ffffffff82022310 T dcn315_smu_set_dispclk -ffffffff82022380 T dcn315_smu_set_hard_min_dcfclk -ffffffff82022400 T dcn315_smu_set_min_deep_sleep_dcfclk -ffffffff82022480 T dcn315_smu_set_dppclk -ffffffff820224f0 T dcn315_smu_set_display_idle_optimization -ffffffff82022540 T dcn315_smu_enable_phy_refclk_pwrdwn -ffffffff82022590 T dcn315_smu_enable_pme_wa -ffffffff820225d0 T dcn315_smu_set_dram_addr_high -ffffffff82022610 T dcn315_smu_set_dram_addr_low -ffffffff82022650 T dcn315_smu_transfer_dpm_table_smu_2_dram -ffffffff82022690 T dcn315_smu_transfer_wm_table_dram_2_smu -ffffffff820226d0 T dcn315_smu_get_dpref_clk -ffffffff82022730 T dcn315_smu_get_dtbclk -ffffffff82022790 T dcn315_smu_set_dtbclk -ffffffff82023000 T dcn316_clk_mgr_construct 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dcn316_smu_get_smu_fclk -ffffffff82026000 T dcn32_init_clocks -ffffffff82026560 T dcn32_update_clocks_update_dpp_dto -ffffffff820266a0 T dcn32_clk_mgr_construct -ffffffff82026940 t dcn32_dump_clk_registers -ffffffff82026b60 T dcn32_clk_mgr_destroy -ffffffff82026bc0 t dcn32_update_clocks -ffffffff82027420 t dcn32_enable_pme_wa -ffffffff82027460 t dcn32_are_clock_states_equal -ffffffff820274d0 t dcn32_notify_wm_ranges -ffffffff82027650 t dcn32_set_hard_min_memclk -ffffffff820276e0 t dcn32_set_hard_max_memclk -ffffffff82027730 t dcn32_set_max_memclk -ffffffff82027770 t dcn32_set_min_memclk -ffffffff820277b0 t dcn32_get_memclk_states_from_smu -ffffffff82027a00 t dcn32_is_smu_present -ffffffff82027a30 t dcn32_get_dispclk_from_dentist -ffffffff82027ac0 t dcn32_update_clocks_update_dentist -ffffffff82028000 T dcn32_smu_send_fclk_pstate_message -ffffffff82028020 t dcn32_smu_send_msg_with_param -ffffffff82028160 T dcn32_smu_send_cab_for_uclk_message -ffffffff82028190 T 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-ffffffff8229a150 T print__rq_regs_st -ffffffff8229a180 T print__dlg_regs_st -ffffffff8229a1b0 T print__ttu_regs_st -ffffffff8229b000 T dml1_extract_rq_regs -ffffffff8229b330 T dml1_rq_dlg_get_rq_params -ffffffff8229b510 t get_surf_rq_param -ffffffff8229c0c0 T dml1_rq_dlg_get_dlg_params -ffffffff8229f000 T _do_calc_rc_params -ffffffff8229ffc0 t get_qp_set -ffffffff822a1000 T dc_bandwidth_in_kbps_from_timing -ffffffff822a1290 T dc_dsc_stream_bandwidth_in_kbps -ffffffff822a13e0 T dc_dsc_parse_dsc_dpcd -ffffffff822a1680 t dsc_throughput_from_dpcd -ffffffff822a1840 T dc_dsc_compute_bandwidth_range -ffffffff822a1a30 t intersect_dsc_caps -ffffffff822a1c00 t setup_dsc_config -ffffffff822a23d0 T dc_dsc_compute_config -ffffffff822a24c0 T dc_dsc_stream_bandwidth_overhead_in_kbps -ffffffff822a2600 T dc_dsc_get_policy_for_timing -ffffffff822a26a0 T dc_dsc_policy_set_max_target_bpp_limit -ffffffff822a26d0 T dc_dsc_policy_set_enable_dsc_when_not_needed -ffffffff822a2700 T dc_dsc_policy_set_disable_dsc_stream_overhead -ffffffff822a2730 T dc_set_disable_128b_132b_stream_overhead -ffffffff822a2760 T dc_dsc_get_default_config_option -ffffffff822a27b0 t fit_num_slices_up -ffffffff822a2860 t decide_dsc_target_bpp_x16 -ffffffff822a3000 T calc_rc_params -ffffffff822a4000 T dscc_compute_dsc_parameters -ffffffff822a5000 T dal_hw_factory_dce110_init -ffffffff822a5060 t define_hpd_registers -ffffffff822a50b0 t define_ddc_registers -ffffffff822a6000 T dal_hw_translate_dce110_init -ffffffff822a6030 t offset_to_id -ffffffff822a6390 t id_to_offset -ffffffff822a7000 T dal_hw_factory_dce120_init -ffffffff822a7060 t define_hpd_registers -ffffffff822a70b0 t define_ddc_registers -ffffffff822a8000 T dal_hw_translate_dce120_init -ffffffff822a8030 t offset_to_id -ffffffff822a83a0 t id_to_offset -ffffffff822a9000 T dal_hw_factory_dce80_init -ffffffff822a9060 t define_hpd_registers -ffffffff822a90b0 t define_ddc_registers -ffffffff822aa000 T dal_hw_translate_dce80_init -ffffffff822aa030 t offset_to_id -ffffffff822aa7b0 t id_to_offset -ffffffff822ab000 T dal_hw_factory_dcn10_init -ffffffff822ab060 t define_hpd_registers -ffffffff822ab0b0 t define_ddc_registers -ffffffff822ab150 t define_generic_registers -ffffffff822ac000 T dal_hw_translate_dcn10_init -ffffffff822ac030 t offset_to_id -ffffffff822ac390 t id_to_offset -ffffffff822ad000 T dal_hw_factory_dcn20_init -ffffffff822ad060 t define_hpd_registers -ffffffff822ad0b0 t define_ddc_registers -ffffffff822ad160 t define_generic_registers -ffffffff822ae000 T dal_hw_translate_dcn20_init -ffffffff822ae030 t offset_to_id -ffffffff822ae2b0 t id_to_offset -ffffffff822af000 T dal_hw_factory_dcn21_init -ffffffff822af060 t define_hpd_registers -ffffffff822af0b0 t define_ddc_registers -ffffffff822af160 t define_generic_registers -ffffffff822b0000 T dal_hw_translate_dcn21_init -ffffffff822b0030 t offset_to_id -ffffffff822b02b0 t id_to_offset -ffffffff822b1000 T dal_hw_factory_dcn30_init -ffffffff822b1060 t define_hpd_registers -ffffffff822b10b0 t define_ddc_registers -ffffffff822b1160 t define_generic_registers -ffffffff822b2000 T dal_hw_translate_dcn30_init -ffffffff822b2030 t offset_to_id -ffffffff822b22c0 t id_to_offset -ffffffff822b3000 T dal_hw_factory_dcn315_init -ffffffff822b3060 t define_hpd_registers -ffffffff822b30b0 t define_ddc_registers -ffffffff822b3160 t define_generic_registers -ffffffff822b4000 T dal_hw_translate_dcn315_init -ffffffff822b4030 t offset_to_id -ffffffff822b42b0 t id_to_offset -ffffffff822b5000 T dal_hw_factory_dcn32_init -ffffffff822b5060 t define_hpd_registers -ffffffff822b50b0 t define_ddc_registers -ffffffff822b5160 t define_generic_registers -ffffffff822b6000 T dal_hw_translate_dcn32_init -ffffffff822b6030 t offset_to_id -ffffffff822b6290 t id_to_offset -ffffffff822b7000 T dal_gpio_open -ffffffff822b70c0 T dal_gpio_open_ex -ffffffff822b7180 T dal_gpio_get_value -ffffffff822b7200 T dal_gpio_set_value -ffffffff822b7280 T dal_gpio_get_mode -ffffffff822b72b0 T dal_gpio_lock_pin -ffffffff822b72d0 T dal_gpio_unlock_pin -ffffffff822b72f0 T dal_gpio_change_mode -ffffffff822b7370 T dal_gpio_get_id -ffffffff822b73a0 T dal_gpio_get_enum -ffffffff822b73d0 T dal_gpio_set_config -ffffffff822b7450 T dal_gpio_get_pin_info -ffffffff822b74b0 T dal_gpio_get_sync_source -ffffffff822b7540 T dal_gpio_get_output_state -ffffffff822b7570 T dal_gpio_get_ddc -ffffffff822b75a0 T dal_gpio_get_hpd -ffffffff822b75d0 T dal_gpio_get_generic -ffffffff822b7600 T dal_gpio_close -ffffffff822b7650 T dal_gpio_create -ffffffff822b77e0 T dal_gpio_destroy -ffffffff822b8000 T dal_gpio_service_create -ffffffff822b8240 T dal_gpio_service_create_irq -ffffffff822b8300 T dal_gpio_create_irq -ffffffff822b8380 T dal_gpio_service_create_generic_mux -ffffffff822b8420 T dal_gpio_destroy_generic_mux -ffffffff822b84b0 T dal_gpio_get_generic_pin_info -ffffffff822b8510 T dal_gpio_service_destroy -ffffffff822b8640 T dal_mux_setup_config -ffffffff822b86a0 T dal_gpio_service_lock -ffffffff822b8720 T dal_gpio_service_unlock -ffffffff822b87a0 T dal_gpio_service_open -ffffffff822b89e0 T dal_gpio_service_close -ffffffff822b8a80 T dal_irq_get_source -ffffffff822b8af0 T dal_irq_get_rx_source -ffffffff822b8b40 T dal_irq_setup_hpd_filter -ffffffff822b8ba0 T dal_gpio_destroy_irq -ffffffff822b8c30 T dal_gpio_create_ddc -ffffffff822b8da0 T dal_gpio_destroy_ddc -ffffffff822b8e70 T dal_ddc_close -ffffffff822b8ec0 T dal_ddc_open -ffffffff822b9020 T dal_ddc_change_mode -ffffffff822b90c0 T dal_ddc_get_line -ffffffff822b90e0 T dal_ddc_set_config -ffffffff822ba000 T dal_hw_ddc_init -ffffffff822ba100 T dal_hw_ddc_get_pin -ffffffff822ba110 t dal_hw_ddc_destroy -ffffffff822ba170 t set_config -ffffffff822bb000 T dal_hw_factory_init -ffffffff822bc000 T dal_hw_generic_init -ffffffff822bc100 T dal_hw_generic_get_pin -ffffffff822bc110 t dal_hw_generic_destroy -ffffffff822bc170 t set_config -ffffffff822bd000 T dal_hw_gpio_open -ffffffff822bd0b0 T dal_hw_gpio_config_mode -ffffffff822bd1a0 T dal_hw_gpio_get_value -ffffffff822bd200 T dal_hw_gpio_set_value -ffffffff822bd290 T dal_hw_gpio_change_mode -ffffffff822bd2a0 T dal_hw_gpio_close -ffffffff822bd350 T dal_hw_gpio_construct -ffffffff822bd3b0 T dal_hw_gpio_destruct -ffffffff822be000 T dal_hw_hpd_init -ffffffff822be100 T dal_hw_hpd_get_pin -ffffffff822be110 t dal_hw_hpd_destroy -ffffffff822be170 t get_value -ffffffff822be210 t set_config -ffffffff822bf000 T dal_hw_translate_init -ffffffff822c0000 T dc_process_hdcp_msg -ffffffff822c0180 t hdmi_14_process_transaction -ffffffff822c02d0 t dp_11_process_transaction -ffffffff822c1000 T dal_irq_service_dummy_set -ffffffff822c1050 T dal_irq_service_dummy_ack -ffffffff822c10a0 T dce110_vblank_set -ffffffff822c1170 T to_dal_irq_source_dce110 -ffffffff822c12f0 T dal_irq_service_dce110_create -ffffffff822c1370 t hpd_ack -ffffffff822c2000 T dal_irq_service_dce120_create +ffffffff82004310 t phy_id_to_atom +ffffffff82004350 t disp_power_gating_action_to_atom +ffffffff82005000 T clk_mgr_helper_get_active_display_cnt +ffffffff820050e0 T clk_mgr_helper_get_active_plane_cnt +ffffffff82005190 T clk_mgr_exit_optimized_pwr_state +ffffffff820052a0 T clk_mgr_optimize_pwr_state +ffffffff82005390 T dc_clk_mgr_create +ffffffff82005a50 T dc_destroy_clk_mgr +ffffffff82006000 T dentist_get_divider_from_did +ffffffff82006070 T dce_adjust_dp_ref_freq_for_ss +ffffffff82006170 T dce_get_dp_ref_freq_khz +ffffffff820062a0 T dce12_get_dp_ref_freq_khz +ffffffff820062c0 T dce_get_max_pixel_clock_for_all_paths +ffffffff820064d0 T dce_get_required_clocks_state +ffffffff82006580 T dce_set_clock +ffffffff820066e0 T dce_clock_read_ss_info +ffffffff82006800 T dce_clk_mgr_construct +ffffffff820069f0 t dce_update_clocks +ffffffff82007000 T dce110_get_min_vblank_time_us +ffffffff82007090 T dce110_fill_display_configs +ffffffff82007300 T dce11_pplib_apply_display_requirements +ffffffff820075f0 T dce110_clk_mgr_construct +ffffffff820076a0 t dce11_update_clocks +ffffffff82008000 T dce112_set_clock +ffffffff82008180 T dce112_set_dispclk +ffffffff820082a0 T dce112_set_dprefclk +ffffffff82008310 T dce112_clk_mgr_construct +ffffffff820083c0 t dce112_update_clocks +ffffffff82009000 T dce120_clk_mgr_construct +ffffffff82009090 T dce121_clk_mgr_construct +ffffffff820091c0 t dce12_update_clocks +ffffffff8200a000 T rv1_clk_mgr_construct +ffffffff8200a0c0 t rv1_update_clocks +ffffffff8200a5a0 t rv1_init_clocks +ffffffff8200a630 t rv1_enable_pme_wa +ffffffff8200b000 T rv1_vbios_smu_set_dispclk +ffffffff8200b0e0 t rv1_vbios_smu_send_msg_with_param +ffffffff8200b1f0 T rv1_vbios_smu_set_dprefclk +ffffffff8200c000 T rv2_clk_mgr_construct +ffffffff8200d000 T dentist_get_did_from_divider +ffffffff8200d080 T dcn20_update_clocks_update_dpp_dto +ffffffff8200d150 T dcn20_update_clocks_update_dentist +ffffffff8200d640 T dcn2_update_clocks +ffffffff8200dbc0 T dcn2_read_clocks_from_hw_dentist +ffffffff8200dc90 T dcn2_update_clocks_fpga +ffffffff8200ddc0 T dcn2_init_clocks +ffffffff8200de60 T dcn2_get_clock +ffffffff8200ded0 T dcn20_clk_mgr_construct +ffffffff8200e000 t dcn2_enable_pme_wa +ffffffff8200e050 t dcn2_are_clock_states_equal +ffffffff8200e0c0 t dcn2_notify_link_rate_change +ffffffff8200f000 T dcn201_clk_mgr_construct +ffffffff8200f120 t dcn201_update_clocks +ffffffff8200f340 t dcn201_init_clocks +ffffffff82010000 T rn_clk_mgr_construct +ffffffff820108a0 t rn_update_clocks +ffffffff82010e60 t rn_set_low_power_state +ffffffff82011040 t rn_init_clocks +ffffffff820110e0 t rn_enable_pme_wa +ffffffff820110f0 t rn_are_clock_states_equal +ffffffff82011140 t rn_notify_wm_ranges +ffffffff820114d0 t rn_notify_link_rate_change +ffffffff82012000 T rn_vbios_smu_get_smu_version +ffffffff82012020 t rn_vbios_smu_send_msg_with_param +ffffffff820121b0 T rn_vbios_smu_set_dispclk +ffffffff820122d0 T rn_vbios_smu_set_dprefclk +ffffffff82012340 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff820123c0 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff82012440 T rn_vbios_smu_set_phyclk +ffffffff82012480 T rn_vbios_smu_set_dppclk +ffffffff82012530 T rn_vbios_smu_set_dcn_low_power_state +ffffffff82012550 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff82012570 T rn_vbios_smu_enable_pme_wa +ffffffff82012590 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff82013000 T dcn3_init_clocks +ffffffff820133b0 t dcn3_init_clocks_fpga +ffffffff820133c0 T dcn3_clk_mgr_construct +ffffffff82013510 T dcn3_clk_mgr_destroy +ffffffff82013570 t dcn3_update_clocks +ffffffff82013990 t dcn3_enable_pme_wa +ffffffff820139d0 t dcn3_are_clock_states_equal +ffffffff82013a30 t dcn3_notify_wm_ranges +ffffffff82013cc0 t dcn30_notify_link_rate_change +ffffffff82013de0 t dcn3_set_hard_min_memclk +ffffffff82013e80 t dcn3_set_hard_max_memclk +ffffffff82013ee0 t dcn3_set_max_memclk +ffffffff82013f20 t dcn3_set_min_memclk +ffffffff82013f60 t dcn3_get_memclk_states_from_smu +ffffffff820140a0 t dcn3_is_smu_present +ffffffff82015000 T dcn30_smu_test_message +ffffffff82015070 t dcn30_smu_send_msg_with_param +ffffffff820151d0 T dcn30_smu_get_smu_version +ffffffff820151f0 T dcn30_smu_check_driver_if_version +ffffffff82015240 T dcn30_smu_check_msg_header_version +ffffffff82015290 T dcn30_smu_set_dram_addr_high +ffffffff820152b0 T dcn30_smu_set_dram_addr_low +ffffffff820152d0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff820152f0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff82015310 T dcn30_smu_set_hard_min_by_freq +ffffffff82015360 T dcn30_smu_set_hard_max_by_freq +ffffffff820153b0 T dcn30_smu_get_dpm_freq_by_index +ffffffff82015400 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff82015450 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff82015470 T dcn30_smu_set_num_of_displays +ffffffff82015490 T dcn30_smu_set_display_refresh_from_mall +ffffffff820154c0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff820154e0 T dcn30_smu_set_pme_workaround +ffffffff82016000 T dcn301_smu_get_smu_version +ffffffff82016070 t dcn301_smu_send_msg_with_param +ffffffff820161f0 T dcn301_smu_set_dispclk +ffffffff82016290 T dcn301_smu_set_dprefclk +ffffffff82016340 T dcn301_smu_set_hard_min_dcfclk +ffffffff820163e0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff82016480 T dcn301_smu_set_dppclk +ffffffff82016520 T dcn301_smu_set_display_idle_optimization +ffffffff82016570 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff820165c0 T dcn301_smu_enable_pme_wa +ffffffff820165e0 T dcn301_smu_set_dram_addr_high +ffffffff82016630 T dcn301_smu_set_dram_addr_low +ffffffff82016680 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff820166a0 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff82017000 T vg_clk_mgr_construct +ffffffff82017840 T vg_clk_mgr_destroy +ffffffff82017890 t vg_update_clocks +ffffffff82017bd0 t vg_init_clocks +ffffffff82017c70 t vg_enable_pme_wa +ffffffff82017c80 t vg_are_clock_states_equal +ffffffff82017cd0 t vg_notify_wm_ranges +ffffffff82019000 T dcn31_update_clocks +ffffffff82019610 T dcn31_init_clocks +ffffffff820196c0 T dcn31_are_clock_states_equal +ffffffff82019720 T dcn31_get_dtb_ref_freq_khz +ffffffff82019750 T dcn31_clk_mgr_construct +ffffffff82019e20 T dcn31_clk_mgr_destroy +ffffffff82019e70 t dcn31_set_low_power_state +ffffffff8201a080 t dcn31_enable_pme_wa +ffffffff8201a090 t dcn31_notify_wm_ranges +ffffffff8201a410 t find_clk_for_voltage +ffffffff8201b000 T dcn31_smu_get_smu_version +ffffffff8201b020 t dcn31_smu_send_msg_with_param +ffffffff8201b230 T dcn31_smu_set_dispclk +ffffffff8201b2a0 T dcn31_smu_set_dprefclk +ffffffff8201b310 T dcn31_smu_set_hard_min_dcfclk +ffffffff8201b390 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff8201b410 T dcn31_smu_set_dppclk +ffffffff8201b480 T dcn31_smu_set_display_idle_optimization +ffffffff8201b4d0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff8201b520 T dcn31_smu_enable_pme_wa +ffffffff8201b560 T dcn31_smu_set_dram_addr_high +ffffffff8201b5a0 T dcn31_smu_set_dram_addr_low +ffffffff8201b5e0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff8201b620 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff8201b660 T dcn31_smu_set_zstate_support +ffffffff8201b6d0 T dcn31_smu_set_dtbclk +ffffffff8201c000 T dcn314_update_clocks +ffffffff8201c650 T dcn314_are_clock_states_equal +ffffffff8201c6b0 T dcn314_clk_mgr_construct +ffffffff8201d3c0 T dcn314_clk_mgr_destroy +ffffffff8201d410 t dcn314_enable_pme_wa +ffffffff8201d420 t dcn314_notify_wm_ranges +ffffffff8201e000 T dcn314_smu_get_smu_version +ffffffff8201e020 t dcn314_smu_send_msg_with_param +ffffffff8201e250 T dcn314_smu_set_dispclk +ffffffff8201e2c0 T dcn314_smu_set_dprefclk +ffffffff8201e330 T dcn314_smu_set_hard_min_dcfclk +ffffffff8201e3b0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff8201e430 T dcn314_smu_set_dppclk +ffffffff8201e4a0 T dcn314_smu_set_display_idle_optimization +ffffffff8201e4f0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff8201e540 T dcn314_smu_enable_pme_wa +ffffffff8201e580 T dcn314_smu_set_dram_addr_high +ffffffff8201e5c0 T dcn314_smu_set_dram_addr_low +ffffffff8201e600 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff8201e640 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff8201e680 T dcn314_smu_set_zstate_support +ffffffff8201e6d0 T dcn314_smu_set_dtbclk +ffffffff8201f000 T dcn315_clk_mgr_construct +ffffffff8201f810 T dcn315_clk_mgr_destroy +ffffffff8201f860 t dcn315_update_clocks +ffffffff8201fda0 t dcn315_enable_pme_wa +ffffffff8201fdb0 t dcn315_notify_wm_ranges +ffffffff82020130 t dcn315_disable_otg_wa +ffffffff82021000 T dcn315_smu_get_smu_version +ffffffff82021020 t dcn315_smu_send_msg_with_param +ffffffff82021310 T dcn315_smu_set_dispclk +ffffffff82021380 T dcn315_smu_set_hard_min_dcfclk +ffffffff82021400 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff82021480 T dcn315_smu_set_dppclk +ffffffff820214f0 T dcn315_smu_set_display_idle_optimization +ffffffff82021540 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff82021590 T dcn315_smu_enable_pme_wa +ffffffff820215d0 T dcn315_smu_set_dram_addr_high +ffffffff82021610 T dcn315_smu_set_dram_addr_low +ffffffff82021650 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff82021690 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff820216d0 T dcn315_smu_get_dpref_clk +ffffffff82021730 T dcn315_smu_get_dtbclk +ffffffff82021790 T dcn315_smu_set_dtbclk +ffffffff82022000 T dcn316_clk_mgr_construct +ffffffff82022650 T dcn316_clk_mgr_destroy +ffffffff820226a0 t dcn316_update_clocks +ffffffff82022cc0 t dcn316_enable_pme_wa +ffffffff82022cd0 t dcn316_notify_wm_ranges +ffffffff82023050 t find_clk_for_voltage +ffffffff82024000 T dcn316_smu_get_smu_version +ffffffff82024020 t dcn316_smu_send_msg_with_param +ffffffff820241b0 T dcn316_smu_set_dispclk +ffffffff82024220 T dcn316_smu_set_hard_min_dcfclk +ffffffff820242a0 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff82024320 T dcn316_smu_set_dppclk +ffffffff82024390 T dcn316_smu_set_display_idle_optimization +ffffffff820243e0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff82024430 T dcn316_smu_set_dram_addr_high +ffffffff82024470 T dcn316_smu_set_dram_addr_low +ffffffff820244b0 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff820244f0 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff82024530 T dcn316_smu_enable_pme_wa +ffffffff82024570 T dcn316_smu_set_dtbclk +ffffffff820245b0 T dcn316_smu_get_dpref_clk +ffffffff82024610 T dcn316_smu_get_smu_fclk +ffffffff82025000 T dcn32_init_clocks +ffffffff82025560 T dcn32_update_clocks_update_dpp_dto +ffffffff820256a0 T dcn32_clk_mgr_construct +ffffffff82025940 t dcn32_dump_clk_registers +ffffffff82025b60 T dcn32_clk_mgr_destroy +ffffffff82025bc0 t dcn32_update_clocks +ffffffff82026420 t dcn32_enable_pme_wa +ffffffff82026460 t dcn32_are_clock_states_equal +ffffffff820264d0 t dcn32_notify_wm_ranges +ffffffff82026650 t dcn32_set_hard_min_memclk +ffffffff820266e0 t dcn32_set_hard_max_memclk +ffffffff82026730 t dcn32_set_max_memclk +ffffffff82026770 t dcn32_set_min_memclk +ffffffff820267b0 t dcn32_get_memclk_states_from_smu +ffffffff82026a00 t dcn32_is_smu_present +ffffffff82026a30 t dcn32_get_dispclk_from_dentist +ffffffff82026ac0 t dcn32_update_clocks_update_dentist +ffffffff82027000 T dcn32_smu_send_fclk_pstate_message +ffffffff82027020 t dcn32_smu_send_msg_with_param +ffffffff82027160 T dcn32_smu_send_cab_for_uclk_message +ffffffff82027190 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff820271b0 T dcn32_smu_set_pme_workaround +ffffffff820271d0 T dcn32_smu_set_hard_min_by_freq +ffffffff82027220 T dcn32_smu_wait_for_dmub_ack_mclk +ffffffff82028000 T dc_stream_adjust_vmin_vmax +ffffffff82028170 T dc_stream_get_last_used_drr_vtotal +ffffffff820282d0 T dc_stream_get_crtc_position +ffffffff82028500 T dc_stream_configure_crc +ffffffff82028670 T dc_stream_get_crc +ffffffff82028750 T dc_stream_set_dyn_expansion +ffffffff820289c0 T dc_stream_set_dither_option +ffffffff82028b60 T dc_stream_set_gamut_remap +ffffffff82028ce0 T dc_stream_program_csc_matrix +ffffffff82028f00 T dc_stream_set_static_screen_params +ffffffff82029080 T dc_create +ffffffff82029600 t dc_construct_ctx +ffffffff82029770 t dc_destruct +ffffffff82029a40 T dc_hardware_init +ffffffff82029b10 T dc_init_callbacks +ffffffff82029b60 T dc_deinit_callbacks +ffffffff82029bb0 T dc_destroy +ffffffff82029c00 T dc_validate_boot_timing +ffffffff82029fa0 T dc_enable_stereo +ffffffff8202a0a0 T dc_trigger_sync +ffffffff8202a6d0 T dc_z10_restore +ffffffff8202a710 T dc_z10_save_init +ffffffff8202a750 T dc_commit_streams +ffffffff8202ac30 t commit_minimal_transition_state +ffffffff8202b060 T dc_create_state +ffffffff8202b0f0 t dc_commit_state_no_check +ffffffff8202c780 T dc_release_state +ffffffff8202c7e0 T dc_acquire_release_mpc_3dlut +ffffffff8202c8b0 T dc_post_update_surfaces_to_stream +ffffffff8202ccc0 T dc_copy_state +ffffffff8202ce90 T dc_retain_state +ffffffff8202cec0 T dc_set_generic_gpio_for_stereo +ffffffff8202cfd0 T dc_check_update_surfaces_for_stream +ffffffff8202d9b0 T dc_dmub_update_dirty_rect +ffffffff8202dbc0 T dc_update_planes_and_stream +ffffffff8202e740 t fast_update_only +ffffffff8202eaa0 t commit_planes_for_stream_fast +ffffffff8202eec0 t commit_planes_for_stream +ffffffff82030440 T dc_commit_updates_for_stream +ffffffff82030a60 t copy_surface_update_to_plane +ffffffff82030e70 t copy_stream_update_to_stream +ffffffff82031510 T dc_get_current_stream_count +ffffffff82031550 T dc_get_stream_at_index +ffffffff820315a0 T dc_interrupt_to_irq_source +ffffffff820315c0 T dc_interrupt_set +ffffffff82031610 T dc_interrupt_ack +ffffffff82031630 T dc_power_down_on_boot +ffffffff82031680 T dc_set_power_state +ffffffff82031860 T dc_resume +ffffffff820318e0 T dc_is_dmcu_initialized +ffffffff82031930 T get_clock_requirements_for_state +ffffffff820319b0 T dc_set_clock +ffffffff820319f0 T dc_get_clock +ffffffff82031a30 T dc_set_psr_allow_active +ffffffff82031b30 T dc_allow_idle_optimizations +ffffffff82031bd0 T dc_unlock_memory_clock_frequency +ffffffff82031c40 T dc_lock_memory_clock_frequency +ffffffff82031cd0 T dc_enable_dcmode_clk_limit +ffffffff82031e90 t blank_and_force_memclk +ffffffff82032070 T dc_is_plane_eligible_for_idle_optimizations +ffffffff820320c0 T dc_hardware_release +ffffffff82032110 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff82032150 T dc_is_dmub_outbox_supported +ffffffff820321c0 T dc_enable_dmub_notifications +ffffffff82032230 T dc_enable_dmub_outbox +ffffffff82032270 T dc_process_dmub_aux_transfer_async +ffffffff820323f0 T get_link_index_from_dpia_port_index +ffffffff820324a0 T dc_process_dmub_set_config_async +ffffffff82032580 T dc_process_dmub_set_mst_slots +ffffffff82032670 T dc_process_dmub_dpia_hpd_int_enable +ffffffff82032730 T dc_print_dmub_diagnostic_data +ffffffff82032750 T dc_disable_accelerated_mode +ffffffff82032770 T dc_notify_vsync_int_state +ffffffff82032990 T dc_abm_save_restore +ffffffff82032b60 T dc_query_current_properties +ffffffff82032bd0 T dc_set_edp_power +ffffffff82032c40 t create_links +ffffffff820330a0 t create_link_encoders +ffffffff82033180 t dc_update_viusal_confirm_color +ffffffff82034000 T pre_surface_trace +ffffffff82034030 T update_surface_trace +ffffffff82034060 T post_surface_trace +ffffffff82034090 T context_timing_trace +ffffffff82034240 T context_clock_trace +ffffffff82034270 T dc_status_to_str +ffffffff82035000 T find_color_matrix +ffffffff820350b0 T color_space_to_black_color +ffffffff82035120 T hwss_wait_for_blank_complete +ffffffff820351c0 T get_mpctree_visual_confirm_color +ffffffff82035220 T get_surface_visual_confirm_color +ffffffff820352d0 T get_hdr_visual_confirm_color +ffffffff82035390 T get_subvp_visual_confirm_color +ffffffff82035490 T hwss_build_fast_sequence +ffffffff82035b50 T hwss_execute_sequence +ffffffff82035f40 T hwss_setup_dpp +ffffffff82035fe0 T hwss_program_bias_and_scale +ffffffff82036060 T hwss_program_manual_trigger +ffffffff820360b0 T hwss_power_on_mpc_mem_pwr +ffffffff82036100 T hwss_set_output_csc +ffffffff82036150 T hwss_set_ocsc_default +ffffffff820361a0 T hwss_send_dmcub_cmd +ffffffff820361c0 T get_mclk_switch_visual_confirm_color +ffffffff82036320 T get_surface_tile_visual_confirm_color +ffffffff82037000 T link_enc_cfg_init +ffffffff820371b0 T link_enc_cfg_copy +ffffffff820371e0 T link_enc_cfg_link_encs_assign +ffffffff820385a0 T link_enc_cfg_validate +ffffffff82038d40 T link_enc_cfg_link_enc_unassign +ffffffff82038ed0 T link_enc_cfg_is_transmitter_mappable +ffffffff82038ff0 T link_enc_cfg_get_stream_using_link_enc +ffffffff820390f0 T link_enc_cfg_get_link_using_link_enc +ffffffff82039200 T link_enc_cfg_get_link_enc_used_by_link +ffffffff82039380 T link_enc_cfg_get_next_avail_link_enc +ffffffff820394f0 T link_enc_cfg_get_link_enc_used_by_stream +ffffffff82039510 T link_enc_cfg_get_link_enc +ffffffff820395a0 T link_enc_cfg_get_link_enc_used_by_stream_current +ffffffff82039720 T link_enc_cfg_is_link_enc_avail +ffffffff82039920 T link_enc_cfg_set_transient_mode +ffffffff8203a000 T dc_get_link_at_index +ffffffff8203a030 T dc_get_edp_links +ffffffff8203a0b0 T dc_get_edp_link_panel_inst +ffffffff8203a170 T dc_link_detect +ffffffff8203a1a0 T dc_link_detect_connection_type +ffffffff8203a1d0 T dc_link_get_status +ffffffff8203a200 T dc_link_is_hdcp14 +ffffffff8203a230 T dc_link_is_hdcp22 +ffffffff8203a260 T dc_link_clear_dprx_states +ffffffff8203a290 T dc_link_reset_cur_dp_mst_topology +ffffffff8203a2c0 T dc_link_bandwidth_kbps +ffffffff8203a2f0 T dc_get_cur_link_res_map +ffffffff8203a310 T dc_restore_link_res_map +ffffffff8203a330 T dc_link_update_dsc_config +ffffffff8203a360 T dc_is_oem_i2c_device_present +ffffffff8203a3b0 T dc_submit_i2c +ffffffff8203a3e0 T dc_submit_i2c_oem +ffffffff8203a430 T dc_link_dp_handle_automated_test +ffffffff8203a460 T dc_link_dp_set_test_pattern +ffffffff8203a490 T dc_link_set_drive_settings +ffffffff8203a520 T dc_link_set_preferred_link_settings +ffffffff8203a540 T dc_link_set_preferred_training_settings +ffffffff8203a570 T dc_dp_trace_is_initialized +ffffffff8203a5a0 T dc_dp_trace_set_is_logged_flag +ffffffff8203a5d0 T dc_dp_trace_is_logged +ffffffff8203a600 T dc_dp_trace_get_lt_end_timestamp +ffffffff8203a630 T dc_dp_trace_get_lt_counts +ffffffff8203a660 T dc_dp_trace_get_link_loss_count +ffffffff8203a690 T dc_link_add_remote_sink +ffffffff8203a6c0 T dc_link_remove_remote_sink +ffffffff8203a6f0 T dc_link_aux_transfer_raw +ffffffff8203a720 T dc_link_bw_kbps_from_raw_frl_link_rate_data +ffffffff8203a740 T dc_link_decide_edp_link_settings +ffffffff8203a770 T dc_link_dp_get_max_link_enc_cap +ffffffff8203a7a0 T dc_link_dp_mst_decide_link_encoding_format +ffffffff8203a7d0 T dc_link_get_link_cap +ffffffff8203a800 T dc_link_get_highest_encoding_format +ffffffff8203a8c0 T dc_link_is_dp_sink_present +ffffffff8203a8f0 T dc_link_is_fec_supported +ffffffff8203a920 T dc_link_overwrite_extended_receiver_cap +ffffffff8203a950 T dc_link_should_enable_fec +ffffffff8203a980 T dc_link_dp_dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff8203a9b0 T dc_link_handle_usb4_bw_alloc_response +ffffffff8203a9e0 T dc_link_check_link_loss_status +ffffffff8203aa10 T dc_link_dp_allow_hpd_rx_irq +ffffffff8203aa40 T dc_link_dp_handle_link_loss +ffffffff8203aa70 T dc_link_dp_read_hpd_rx_irq_data +ffffffff8203aaa0 T dc_link_handle_hpd_rx_irq +ffffffff8203aad0 T dc_link_dp_receiver_power_ctrl +ffffffff8203ab00 T dc_link_decide_lttpr_mode +ffffffff8203ab30 T dc_link_edp_panel_backlight_power_on +ffffffff8203ab60 T dc_link_get_backlight_level +ffffffff8203ab90 T dc_link_get_backlight_level_nits +ffffffff8203abc0 T dc_link_set_backlight_level +ffffffff8203abf0 T dc_link_set_backlight_level_nits +ffffffff8203ac20 T dc_link_get_target_backlight_pwm +ffffffff8203ac50 T dc_link_get_psr_state +ffffffff8203ac80 T dc_link_set_psr_allow_active +ffffffff8203acb0 T dc_link_setup_psr +ffffffff8203ace0 T dc_link_get_replay_state +ffffffff8203ad10 T dc_link_wait_for_t12 +ffffffff8203ad40 T dc_link_get_hpd_state +ffffffff8203ad70 T dc_link_enable_hpd +ffffffff8203ada0 T dc_link_disable_hpd +ffffffff8203add0 T dc_link_enable_hpd_filter +ffffffff8203ae00 T dc_link_dp_dpia_validate +ffffffff8203b000 T resource_parse_asic_id +ffffffff8203b250 T dc_create_resource_pool +ffffffff8203b550 T dc_destroy_resource_pool +ffffffff8203b5c0 T resource_construct +ffffffff8203baa0 T resource_unreference_clock_source +ffffffff8203bb20 T resource_reference_clock_source +ffffffff8203bba0 T resource_get_clock_source_reference +ffffffff8203bc20 T resource_are_vblanks_synchronizable +ffffffff8203be40 T resource_are_streams_timing_synchronizable +ffffffff8203bf30 T resource_find_used_clk_src_for_sharing +ffffffff8203c060 T resource_get_num_mpc_splits +ffffffff8203c0f0 T resource_get_num_odm_splits +ffffffff8203c1b0 T resource_get_otg_master +ffffffff8203c250 T resource_build_scaling_params +ffffffff8203cfe0 t calculate_odm_slice_in_timing_active +ffffffff8203d160 T resource_build_scaling_params_for_context +ffffffff8203d2b0 T resource_find_free_secondary_pipe_legacy +ffffffff8203d350 T resource_find_free_pipe_used_in_cur_mpc_blending_tree +ffffffff8203d3c0 T resource_is_pipe_type +ffffffff8203d440 T recource_find_free_pipe_not_used_in_cur_res_ctx +ffffffff8203d4c0 T resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine +ffffffff8203d5e0 T resource_is_for_mpcc_combine +ffffffff8203d670 T resource_find_any_free_pipe +ffffffff8203d6e0 T resource_get_otg_master_for_stream +ffffffff8203d810 T resource_get_opp_head +ffffffff8203d8a0 T dc_add_plane_to_context +ffffffff8203db60 T dc_remove_plane_from_context +ffffffff8203dd40 T dc_rem_all_planes_for_stream +ffffffff8203df00 T dc_add_all_planes_for_stream +ffffffff8203e080 T dc_is_timing_changed +ffffffff8203e0e0 T dc_is_stream_unchanged +ffffffff8203e1c0 T dc_is_stream_scaling_unchanged +ffffffff8203e260 T update_audio_usage +ffffffff8203e2d0 T dc_add_stream_to_ctx +ffffffff8203e3a0 T dc_remove_stream_from_ctx +ffffffff8203e7b0 T resource_map_pool_resources +ffffffff8203f210 t acquire_first_split_pipe +ffffffff8203f380 t add_hpo_dp_link_enc_to_ctx +ffffffff8203f450 t find_first_free_audio +ffffffff8203f500 T dc_resource_state_copy_construct_current +ffffffff8203f520 T dc_resource_state_copy_construct +ffffffff8203f6c0 T dc_resource_state_construct +ffffffff8203f6e0 T dc_resource_is_dsc_encoding_supported +ffffffff8203f730 T dc_validate_with_context +ffffffff82040360 t planes_changed_for_existing_stream +ffffffff820404e0 T dc_validate_global_state +ffffffff82040860 T dc_resource_state_destruct +ffffffff82040940 T dc_resource_find_first_free_pll +ffffffff820409b0 T resource_build_info_frame +ffffffff820410e0 T resource_map_clock_resources +ffffffff82041270 T pipe_need_reprogram +ffffffff820413e0 T resource_build_bit_depth_reduction_params +ffffffff82041610 T dc_validate_stream +ffffffff820417e0 T dc_validate_plane +ffffffff82041870 T resource_pixel_format_to_bpp +ffffffff820418f0 T get_audio_check +ffffffff82041a10 T get_temp_dp_link_res +ffffffff82041b20 T reset_syncd_pipes_from_disabled_pipes +ffffffff82041c70 T check_syncd_pipes_for_disabled_master_pipe +ffffffff82041db0 T reset_sync_context_for_pipe +ffffffff82041e60 T resource_transmitter_to_phy_idx +ffffffff82041ec0 T get_link_hwss +ffffffff82041f50 T is_h_timing_divisible_by_2 +ffffffff82041fb0 T dc_resource_acquire_secondary_pipe_for_mpc_odm +ffffffff820421c0 T update_dp_encoder_resources_for_test_harness +ffffffff82042480 t calculate_plane_rec_in_timing_active +ffffffff82042750 t calculate_init_and_vp +ffffffff82043000 T dc_sink_retain +ffffffff82043030 T dc_sink_release +ffffffff820430a0 T dc_sink_create +ffffffff82044000 T dc_stat_get_dmub_notification +ffffffff820440b0 T dc_stat_get_dmub_dataout +ffffffff82045000 T update_stream_signal +ffffffff82045080 T dc_stream_retain +ffffffff820450b0 T dc_stream_release +ffffffff82045130 T dc_create_stream_for_sink +ffffffff82045470 T dc_copy_stream +ffffffff82045540 T dc_stream_get_status_from_state +ffffffff820455a0 T dc_stream_get_status +ffffffff82045610 T dc_optimize_timing_for_fsft +ffffffff82045660 T dc_stream_set_cursor_attributes +ffffffff82045860 t program_cursor_attributes +ffffffff820459c0 T dc_stream_set_cursor_position +ffffffff82045ae0 t program_cursor_position +ffffffff82045c20 T dc_stream_add_writeback +ffffffff82045e30 T dc_stream_remove_writeback +ffffffff82045f60 T dc_stream_warmup_writeback +ffffffff82045fa0 T dc_stream_get_vblank_counter +ffffffff82046070 T dc_stream_send_dp_sdp +ffffffff82046300 T dc_stream_get_scanoutpos +ffffffff820463e0 T dc_stream_dmdata_status_done +ffffffff820464a0 T dc_stream_set_dynamic_metadata +ffffffff82046600 T dc_stream_add_dsc_to_resource +ffffffff82046650 T dc_stream_get_pipe_ctx +ffffffff82046700 T dc_stream_log +ffffffff82047000 T enable_surface_flip_reporting +ffffffff82047030 T dc_create_plane_state +ffffffff820471d0 T dc_plane_get_status +ffffffff82047350 T dc_plane_state_retain +ffffffff82047380 T dc_plane_state_release +ffffffff820474d0 T dc_gamma_retain +ffffffff82047500 T dc_gamma_release +ffffffff82047560 T dc_create_gamma +ffffffff820475b0 T dc_transfer_func_retain +ffffffff820475e0 T dc_transfer_func_release +ffffffff82047630 T dc_create_transfer_func +ffffffff82047680 T dc_create_3dlut_func +ffffffff820476e0 T dc_3dlut_func_release +ffffffff82047730 T dc_3dlut_func_retain +ffffffff82048000 T vm_helper_mark_vmid_used +ffffffff82048030 T dc_setup_system_context +ffffffff820480c0 T dc_setup_vm_context +ffffffff820480f0 T dc_get_vmid_use_vector +ffffffff82048150 T vm_helper_init +ffffffff82049000 T dc_dmub_srv_create +ffffffff820490a0 T dc_dmub_srv_destroy +ffffffff820490f0 T dc_dmub_srv_wait_idle +ffffffff82049150 T dc_dmub_srv_log_diagnostic_data +ffffffff82049690 T dc_dmub_srv_clear_inbox0_ack +ffffffff820496f0 T dc_dmub_srv_wait_for_inbox0_ack +ffffffff82049750 T dc_dmub_srv_send_inbox0_cmd +ffffffff820497b0 T dc_dmub_srv_cmd_run +ffffffff820497d0 T dc_dmub_srv_cmd_run_list +ffffffff82049980 T dc_dmub_srv_optimized_init_done +ffffffff82049a00 T dc_dmub_srv_notify_stream_mask +ffffffff82049a60 T dc_dmub_srv_is_restore_required +ffffffff82049ae0 T dc_dmub_srv_get_dmub_outbox0_msg +ffffffff82049b10 T dc_dmub_trace_event_control +ffffffff82049b30 T dc_dmub_srv_drr_update_cmd +ffffffff82049bc0 T dc_dmub_srv_set_drr_manual_trigger_cmd +ffffffff82049c50 T dc_dmub_srv_p_state_delegate +ffffffff8204a000 T dc_dmub_srv_query_caps_cmd +ffffffff8204a0c0 T dc_dmub_srv_get_visual_confirm_color_cmd +ffffffff8204a1a0 T dc_dmub_setup_subvp_dmub_command +ffffffff8204abb0 T dc_dmub_srv_get_diagnostic_data +ffffffff8204abf0 T dc_send_update_cursor_info_to_dmu +ffffffff8204af60 T dc_dmub_check_min_version +ffffffff8204afa0 T dc_dmub_srv_enable_dpia_trace +ffffffff8204c000 T dc_edid_parser_send_cea +ffffffff8204c0b0 T dc_edid_parser_recv_cea_ack +ffffffff8204c140 T dc_edid_parser_recv_amd_vsdb +ffffffff8204d000 T generic_reg_update_ex +ffffffff8204d330 t set_reg_field_values +ffffffff8204d4e0 T generic_reg_set_ex +ffffffff8204d6d0 T generic_reg_get +ffffffff8204d740 T generic_reg_get2 +ffffffff8204d7d0 T generic_reg_get3 +ffffffff8204d870 T generic_reg_get4 +ffffffff8204d920 T generic_reg_get5 +ffffffff8204d9e0 T generic_reg_get6 +ffffffff8204dac0 T generic_reg_get7 +ffffffff8204dbb0 T generic_reg_get8 +ffffffff8204dcc0 T generic_reg_wait +ffffffff8204df10 T generic_write_indirect_reg +ffffffff8204df60 T generic_read_indirect_reg +ffffffff8204e000 T generic_indirect_reg_get +ffffffff8204e1b0 T generic_indirect_reg_update_ex +ffffffff8204e3c0 T generic_indirect_reg_update_ex_sync +ffffffff8204e5b0 T generic_indirect_reg_get_sync +ffffffff8204e6e0 T reg_sequence_start_gather +ffffffff8204e770 T reg_sequence_start_execute +ffffffff8204e910 T reg_sequence_wait_done +ffffffff8204e970 T dce_version_to_string +ffffffff8204f000 T dce_abm_create +ffffffff8204f0b0 T dce_abm_destroy +ffffffff8204f100 t dce_abm_init +ffffffff8204f380 t dce_abm_set_level +ffffffff8204f480 t dce_abm_immediate_disable +ffffffff8204f4d0 t dce_abm_set_pipe +ffffffff8204f620 t dce_abm_set_backlight_level_pwm +ffffffff8204f810 t dce_abm_get_current_backlight +ffffffff8204f840 t dce_abm_get_target_backlight +ffffffff82050000 T dce_aud_az_enable +ffffffff82050150 T dce_aud_az_disable +ffffffff82050340 T dce_aud_az_configure +ffffffff82050fc0 t check_audio_bandwidth +ffffffff82051150 T dce_aud_wall_dto_setup +ffffffff820512d0 T dce_aud_hw_init +ffffffff820514a0 T dce_aud_destroy +ffffffff820514f0 T dce_audio_create +ffffffff820515b0 t dce_aud_endpoint_valid +ffffffff82052000 T dce110_engine_destroy +ffffffff82052050 T dce110_aux_engine_construct +ffffffff820520d0 t dce_aux_configure_timeout +ffffffff820522b0 T dce_aux_transfer_raw +ffffffff82052ae0 t acquire +ffffffff82052d50 T dce_aux_transfer_dmub_raw +ffffffff82052e50 T dce_aux_transfer_with_retries +ffffffff82054000 T look_up_in_video_optimized_rate_tlb +ffffffff82054070 T dce110_clk_src_construct +ffffffff82054270 t calc_pll_max_vco_construct +ffffffff82054410 T dce112_clk_src_construct +ffffffff820544a0 T dcn20_clk_src_construct +ffffffff82054550 T dcn3_clk_src_construct +ffffffff82054600 T dcn31_clk_src_construct +ffffffff820546b0 T dcn301_clk_src_construct +ffffffff82054760 t dce110_clock_source_power_down +ffffffff820547f0 t dce110_program_pix_clk +ffffffff82054e80 t dce110_get_pix_clk_dividers +ffffffff82055500 t get_pixel_clk_frequency_100hz +ffffffff82055610 t get_ss_info_from_atombios +ffffffff820558e0 t dce112_program_pix_clk +ffffffff82055af0 t dce112_get_pix_clk_dividers +ffffffff82055c00 t dcn20_program_pix_clk +ffffffff82055c90 t dcn20_override_dp_pix_clk +ffffffff82055d80 t dcn3_program_pix_clk +ffffffff82055f30 t dcn3_get_pix_clk_dividers +ffffffff82056000 t dcn31_program_pix_clk +ffffffff82057000 T dce_dmcu_create +ffffffff820570c0 T dcn10_dmcu_create +ffffffff82057180 T dcn20_dmcu_create +ffffffff82057240 T dcn21_dmcu_create +ffffffff82057330 T dce_dmcu_destroy +ffffffff82057380 t dce_dmcu_init +ffffffff820573b0 t dce_dmcu_load_iram +ffffffff82057510 t dce_dmcu_set_psr_enable +ffffffff82057640 t dce_dmcu_setup_psr +ffffffff82057970 t dce_get_dmcu_psr_state +ffffffff82057a50 t dce_psr_wait_loop +ffffffff82057b80 t dce_get_psr_wait_loop +ffffffff82057bb0 t dce_is_dmcu_initialized +ffffffff82057c10 t dcn10_dmcu_init +ffffffff82058150 t dcn10_dmcu_load_iram +ffffffff82058390 t dcn10_dmcu_set_psr_enable +ffffffff82058520 t dcn10_dmcu_setup_psr +ffffffff820588e0 t dcn10_get_dmcu_psr_state +ffffffff82058a00 t dcn10_psr_wait_loop +ffffffff82058b10 t dcn10_get_psr_wait_loop +ffffffff82058b40 t dcn10_is_dmcu_initialized +ffffffff82058b70 t dcn10_send_edid_cea +ffffffff82058d10 t dcn10_recv_amd_vsdb +ffffffff82058dc0 t dcn10_recv_edid_cea_ack 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dce110_link_encoder_enable_tmds_output +ffffffff82060b90 T dce110_link_encoder_enable_lvds_output +ffffffff82060c80 T dce110_link_encoder_enable_dp_output +ffffffff82060de0 T dce110_link_encoder_enable_dp_mst_output +ffffffff82060f40 T dce110_link_encoder_disable_output +ffffffff82061150 T dce110_link_encoder_dp_set_lane_settings +ffffffff820612f0 T dce110_link_encoder_dp_set_phy_pattern +ffffffff82061af0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff82061d10 T dce110_link_encoder_update_mst_stream_allocation_table +ffffffff82061f80 T dce110_link_encoder_connect_dig_be_to_fe +ffffffff820620b0 T dce110_link_encoder_enable_hpd +ffffffff820620e0 T dce110_link_encoder_disable_hpd +ffffffff82062110 T dce110_link_encoder_get_max_link_cap +ffffffff82063000 T dce_mem_input_construct +ffffffff82063060 T dce112_mem_input_construct +ffffffff820630c0 T dce120_mem_input_construct +ffffffff82063120 t dce_mi_program_display_marks +ffffffff820633f0 t dce_mi_allocate_dmif +ffffffff82063630 t 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dce_transform_get_optimal_number_of_taps +ffffffff8206d300 T dce110_opp_set_csc_adjustment +ffffffff8206d3c0 t program_color_matrix +ffffffff8206d5f0 T dce110_opp_set_csc_default +ffffffff8206d730 T dce110_opp_program_regamma_pwl +ffffffff8206dfe0 T dce110_opp_power_on_regamma_lut +ffffffff8206e0a0 T dce110_opp_set_regamma_mode +ffffffff8206e110 T dce_transform_construct +ffffffff8206e190 t dce_transform_reset +ffffffff8206e1d0 t dce_transform_set_scaler +ffffffff8206ec70 t dce_transform_set_pixel_storage_depth +ffffffff8206f120 t dce_transform_set_gamut_remap +ffffffff8206f460 t program_multi_taps_filter +ffffffff82070000 T dmub_abm_create +ffffffff820700d0 T dmub_abm_destroy +ffffffff82070120 t dmub_abm_init_ex +ffffffff82070130 t dmub_abm_set_level_ex +ffffffff820701e0 t dmub_abm_set_backlight_level_pwm_ex +ffffffff82070280 t dmub_abm_get_current_backlight_ex +ffffffff82070290 t dmub_abm_get_target_backlight_ex +ffffffff820702a0 t dmub_abm_init_config_ex +ffffffff82070330 t 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dce110_edp_power_control +ffffffff8207a950 T dce110_edp_wait_for_T12 +ffffffff8207ab00 T dce110_edp_backlight_control +ffffffff8207ae60 T dce110_enable_audio_stream +ffffffff8207af20 T dce110_disable_audio_stream +ffffffff8207afe0 T dce110_disable_stream +ffffffff8207b240 T dce110_unblank_stream +ffffffff8207b340 T dce110_blank_stream +ffffffff8207b4b0 T dce110_set_avmute +ffffffff8207b500 T dce110_enable_accelerated_mode +ffffffff8207b8b0 t power_down_all_hw_blocks +ffffffff8207ba80 T dce110_set_safe_displaymarks +ffffffff8207bba0 T dce110_apply_ctx_to_hw +ffffffff8207c4a0 t enable_fbc +ffffffff8207c660 T dce110_power_down +ffffffff8207c750 T dce110_prepare_bandwidth +ffffffff8207c8a0 T dce110_optimize_bandwidth +ffffffff8207caa0 T dce110_set_backlight_level +ffffffff8207cbb0 T dce110_set_abm_immediate_disable +ffffffff8207cc30 T dce110_set_pipe +ffffffff8207cca0 T dce110_enable_lvds_link_output +ffffffff8207cd00 T dce110_enable_tmds_link_output +ffffffff8207cd70 T dce110_enable_dp_link_output +ffffffff8207cfa0 T dce110_disable_link_output +ffffffff8207d090 T dce110_hw_sequencer_construct +ffffffff8207d0e0 t enable_display_pipe_clock_gating +ffffffff8207d110 t build_audio_output +ffffffff8207d270 t init_hw +ffffffff8207d510 t dce110_power_down_fe +ffffffff8207d5e0 t dce110_apply_ctx_for_surface +ffffffff8207dd20 t dce110_post_unlock_program_front_end +ffffffff8207dd50 t update_plane_addr +ffffffff8207ddc0 t dce110_wait_for_mpcc_disconnect +ffffffff8207ddf0 t dce110_update_pending_status +ffffffff8207ded0 t get_position +ffffffff8207df60 t dce110_enable_per_frame_crtc_position_reset +ffffffff8207e200 t dce110_enable_timing_synchronization +ffffffff8207e4f0 t set_drr +ffffffff8207e5d0 t set_static_screen_control +ffffffff8207e6a0 t dce110_set_cursor_position +ffffffff8207e7f0 t dce110_set_cursor_attribute +ffffffff8207e8b0 t program_gamut_remap +ffffffff8207ea00 t program_output_csc +ffffffff8207eb00 t init_pipes +ffffffff8207eb30 t dce110_reset_hw_ctx_wrap +ffffffff8207ed90 t dce110_set_input_transfer_func +ffffffff8207ef20 t dce110_set_output_transfer_func +ffffffff8207f830 t dce110_enable_display_power_gating +ffffffff8207f990 t dce110_enable_stream_timing +ffffffff82080000 T dce110_mem_input_v_construct +ffffffff82080040 t dce_mem_input_v_program_display_marks +ffffffff820800c0 t dce_mem_input_program_chroma_display_marks +ffffffff82080140 t dce110_allocate_mem_input_v +ffffffff82080250 t dce110_free_mem_input_v +ffffffff82080280 t dce_mem_input_v_program_surface_flip_and_addr +ffffffff820803d0 t dce_mem_input_v_program_pte_vm +ffffffff820806a0 t dce_mem_input_v_program_surface_config +ffffffff82080a70 t dce_mem_input_v_is_surface_pending +ffffffff82080ae0 t program_urgency_watermark +ffffffff82080bf0 t program_nbp_watermark +ffffffff82080d60 t program_stutter_watermark +ffffffff82081000 T dce110_opp_v_set_csc_default +ffffffff82081300 t program_color_matrix_v +ffffffff82081470 t configure_graphics_mode_v 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dce110_tg_set_colors +ffffffff82087de0 T dce110_arm_vert_intr +ffffffff82087eb0 T dce110_configure_crc +ffffffff82088010 t dce110_is_tg_enabled +ffffffff82088070 T dce110_get_crc +ffffffff82088140 T dce110_timing_generator_construct +ffffffff82089000 T dce110_timing_generator_v_construct +ffffffff82089070 t dce110_timing_generator_v_program_timing +ffffffff82089340 t dce110_timing_generator_v_enable_crtc +ffffffff820893d0 t dce110_timing_generator_v_disable_crtc +ffffffff82089440 t dce110_timing_generator_v_is_counter_moving +ffffffff820894c0 t dce110_timing_generator_v_get_vblank_counter +ffffffff82089510 t dce110_timing_generator_v_set_early_control +ffffffff82089570 t dce110_timing_generator_v_wait_for_state +ffffffff82089700 t dce110_timing_generator_v_set_blank +ffffffff82089790 t dce110_timing_generator_v_set_overscan_color_black +ffffffff82089830 t dce110_timing_generator_v_program_blank_color +ffffffff820898b0 t dce110_timing_generator_v_set_colors +ffffffff820899e0 t dce110_timing_generator_v_disable_vga +ffffffff82089a10 t dce110_timing_generator_v_did_triggered_reset_occur +ffffffff82089a50 t dce110_timing_generator_v_setup_global_swap_lock +ffffffff82089a70 t dce110_timing_generator_v_enable_reset_trigger +ffffffff82089a90 t dce110_timing_generator_v_disable_reset_trigger +ffffffff82089ab0 t dce110_timing_generator_v_tear_down_global_swap_lock +ffffffff82089ad0 t dce110_timing_generator_v_enable_advanced_request +ffffffff8208a000 T dce110_transform_v_construct +ffffffff8208a060 t dce110_xfmv_reset +ffffffff8208a0c0 t dce110_xfmv_set_scaler +ffffffff8208a800 t dce110_xfmv_set_pixel_storage_depth +ffffffff8208a8e0 t dce110_xfmv_set_gamut_remap +ffffffff8208a910 t program_multi_taps_filter +ffffffff8208ad00 t program_viewport +ffffffff8208b000 T dce112_compressor_power_up_fbc +ffffffff8208b130 T dce112_compressor_enable_fbc +ffffffff8208b2e0 T dce112_compressor_is_fbc_enabled_in_hw +ffffffff8208b390 T dce112_compressor_enable_lpt +ffffffff8208b4b0 t wait_for_fbc_state_changed +ffffffff8208b750 T dce112_compressor_disable_fbc +ffffffff8208b850 T dce112_compressor_disable_lpt +ffffffff8208b9b0 T dce112_compressor_is_lpt_enabled_in_hw +ffffffff8208ba00 T dce112_compressor_program_compressed_surface_address_and_pitch +ffffffff8208bb40 T dce112_compressor_program_lpt_control +ffffffff8208bdb0 T dce112_compressor_set_fbc_invalidation_triggers +ffffffff8208be40 T dce112_compressor_construct +ffffffff8208bf00 T dce112_compressor_create +ffffffff8208bff0 T dce112_compressor_destroy +ffffffff8208d000 T dce112_hw_sequencer_construct +ffffffff8208d050 t dce112_enable_display_power_gating +ffffffff8208e000 T dce112_validate_bandwidth +ffffffff8208e0c0 T resource_map_phy_clock_resources +ffffffff8208e230 T dce112_add_stream_to_ctx +ffffffff8208e2d0 T dce112_create_resource_pool +ffffffff8208f620 t dce112_resource_destruct +ffffffff8208f8e0 t dce112_destroy_resource_pool +ffffffff8208f940 t dce112_panel_cntl_create +ffffffff8208f9d0 t dce112_link_encoder_create +ffffffff8208fad0 t dce112_validate_global +ffffffff8208fb70 t read_dce_straps +ffffffff8208fbe0 t create_audio +ffffffff8208fc10 t dce112_stream_encoder_create +ffffffff8208fcb0 t dce112_hwseq_create +ffffffff82090000 T dce121_xgmi_enabled +ffffffff82090060 T dce120_hw_sequencer_construct +ffffffff820900c0 t dce120_enable_display_power_gating +ffffffff820900f0 t dce120_update_dchub +ffffffff82091000 T dce120_create_resource_pool +ffffffff82092320 t dce120_resource_destruct +ffffffff82092600 t dce120_destroy_resource_pool +ffffffff82092660 t dce120_panel_cntl_create +ffffffff820926f0 t dce120_link_encoder_create +ffffffff820927f0 t read_dce_straps +ffffffff82092880 t create_audio +ffffffff820928b0 t dce120_stream_encoder_create +ffffffff82092950 t dce121_hwseq_create +ffffffff820929c0 t dce120_hwseq_create +ffffffff82093000 T dce120_timing_generator_construct +ffffffff82093090 t dce120_tg_validate_timing +ffffffff82093140 t dce120_tg_program_timing +ffffffff82093310 t dce120_timing_generator_enable_crtc +ffffffff820933b0 t dce120_timing_generator_get_crtc_position +ffffffff82093450 t dce120_timing_generator_get_vblank_counter +ffffffff820934b0 t dce120_timing_generator_get_crtc_scanoutpos +ffffffff820935a0 t dce120_timing_generator_set_early_control +ffffffff820935e0 t dce120_tg_wait_for_state +ffffffff820936f0 t dce120_tg_set_blank +ffffffff820937b0 t dce120_tg_is_blanked +ffffffff82093810 t dce120_timing_generator_set_overscan_color_black +ffffffff820938e0 t dce120_timing_generator_program_blank_color +ffffffff82093960 t dce120_tg_set_colors +ffffffff82093a80 t dce120_timing_generator_disable_vga +ffffffff82093af0 t dce120_timing_generator_did_triggered_reset_occur +ffffffff82093b50 t dce120_timing_generator_setup_global_swap_lock +ffffffff82093c80 t dce120_timing_generator_enable_reset_trigger +ffffffff82093d90 t dce120_timing_generator_disable_reset_trigger +ffffffff82093e40 t dce120_timing_generator_tear_down_global_swap_lock +ffffffff82093f10 t dce120_timing_generator_enable_advanced_request +ffffffff82093fb0 t dce120_timing_generator_set_drr +ffffffff82094180 t dce120_timing_generator_set_static_screen_control +ffffffff82094200 t dce120_timing_generator_set_test_pattern +ffffffff820946a0 t dce120_arm_vert_intr +ffffffff82094760 t dce120_is_tg_enabled +ffffffff820947c0 t dce120_configure_crc +ffffffff820949a0 t dce120_get_crc +ffffffff82095000 T dce80_hw_sequencer_construct +ffffffff82096000 T dce80_create_resource_pool +ffffffff82096e10 T dce81_create_resource_pool +ffffffff82097c10 T dce83_create_resource_pool +ffffffff820988f0 t dce80_resource_destruct +ffffffff82098ba0 t dce80_destroy_resource_pool +ffffffff82098c00 t dce80_panel_cntl_create +ffffffff82098c90 t dce80_link_encoder_create +ffffffff82098d90 t dce80_validate_bandwidth +ffffffff82098ed0 t dce80_validate_global +ffffffff82098f70 t read_dce_straps +ffffffff82098fe0 t create_audio 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+ffffffff8209e1a0 T dpp1_cm_set_output_csc_default +ffffffff8209e220 t dpp1_cm_program_color_matrix +ffffffff8209e3e0 T dpp1_cm_set_output_csc_adjustment +ffffffff8209e3f0 T dpp1_cm_power_on_regamma_lut +ffffffff8209e470 T dpp1_cm_program_regamma_lut +ffffffff8209e680 T dpp1_cm_configure_regamma_lut +ffffffff8209e780 T dpp1_cm_program_regamma_luta_settings +ffffffff8209e920 T dpp1_cm_program_regamma_lutb_settings +ffffffff8209eac0 T dpp1_program_input_csc +ffffffff8209ed10 T dpp1_program_bias_and_scale +ffffffff8209ee80 T dpp1_program_degamma_lutb_settings +ffffffff8209f030 T dpp1_program_degamma_luta_settings +ffffffff8209f1e0 T dpp1_power_on_degamma_lut +ffffffff8209f260 T dpp1_set_degamma +ffffffff8209f450 T dpp1_degamma_ram_select +ffffffff8209f4b0 T dpp1_program_degamma_lut +ffffffff8209f7d0 T dpp1_set_degamma_pwl +ffffffff8209f9a0 T dpp1_full_bypass +ffffffff8209fb40 T dpp1_program_input_lut +ffffffff820a01e0 T dpp1_set_hdr_multiplier +ffffffff820a1000 T dpp1_dscl_calc_lb_num_partitions +ffffffff820a11e0 T dpp1_dscl_is_lb_conf_valid +ffffffff820a1220 T dpp1_dscl_set_scaler_manual_scale +ffffffff820a2640 t dpp1_dscl_get_filter_coeffs_64p +ffffffff820a2710 t dpp1_dscl_set_scaler_filter +ffffffff820a3000 t dwb1_get_caps +ffffffff820a30a0 t dwb1_enable +ffffffff820a31a0 t dwb1_disable +ffffffff820a3300 T dcn10_dwbc_construct +ffffffff820a4000 T hubbub1_wm_read_state +ffffffff820a4320 T hubbub1_allow_self_refresh_control +ffffffff820a43a0 T hubbub1_is_allow_self_refresh_enabled +ffffffff820a4410 T hubbub1_verify_allow_pstate_change_high +ffffffff820a45d0 T hubbub1_wm_change_req_wa +ffffffff820a4670 T hubbub1_program_urgent_watermarks +ffffffff820a4a50 T hubbub1_program_stutter_watermarks +ffffffff820a4eb0 T hubbub1_program_pstate_watermarks +ffffffff820a5100 T hubbub1_program_watermarks +ffffffff820a5230 T hubbub1_update_dchub +ffffffff820a5460 T hubbub1_toggle_watermark_change_req +ffffffff820a5500 T hubbub1_soft_reset +ffffffff820a5540 T hubbub1_construct +ffffffff820a55a0 t hubbub1_get_dcc_compression_cap +ffffffff820a57c0 t hubbub1_dcc_support_swizzle +ffffffff820a5850 t hubbub1_dcc_support_pixel_format +ffffffff820a6000 T hubp1_set_blank +ffffffff820a6110 T hubp1_clear_underflow +ffffffff820a6160 T hubp1_vready_workaround +ffffffff820a61f0 T hubp1_program_tiling +ffffffff820a6450 T hubp1_program_size +ffffffff820a65d0 T hubp1_program_rotation +ffffffff820a6740 T hubp1_program_pixel_format +ffffffff820a6d10 T hubp1_program_surface_flip_and_addr +ffffffff820a7590 T hubp1_dcc_control +ffffffff820a7650 T hubp1_program_surface_config +ffffffff820a7760 T hubp1_program_requestor +ffffffff820a7b30 T hubp1_program_deadline +ffffffff820a8240 T hubp1_is_flip_pending +ffffffff820a8350 T min_set_viewport +ffffffff820a8650 T hubp1_read_state_common +ffffffff820a9340 T hubp1_read_state +ffffffff820a9610 T hubp1_get_cursor_pitch +ffffffff820a96b0 T hubp1_cursor_set_attributes +ffffffff820a9960 T hubp1_cursor_set_position +ffffffff820a9cc0 T hubp1_clk_cntl +ffffffff820a9d10 T hubp1_vtg_sel +ffffffff820a9d50 T hubp1_in_blank +ffffffff820a9dc0 T hubp1_soft_reset +ffffffff820a9e00 T hubp1_set_flip_int +ffffffff820a9e50 T hubp1_init +ffffffff820a9e80 T dcn10_hubp_construct +ffffffff820a9ef0 t hubp1_setup +ffffffff820a9fb0 t hubp1_setup_interdependent +ffffffff820aa330 t hubp1_set_vm_system_aperture_settings +ffffffff820aa550 t hubp1_set_vm_context0_settings +ffffffff820aa830 t hubp1_set_hubp_blank_en +ffffffff820aa870 t hubp1_disconnect +ffffffff820aa900 t hubp1_disable_control +ffffffff820aa940 t hubp1_get_underflow_status +ffffffff820aa9b0 t hubp1_wait_pipe_read_start +ffffffff820ab000 T dcn10_lock_all_pipes +ffffffff820ab130 T dcn10_log_hw_state +ffffffff820acc10 T dcn10_did_underflow_occur +ffffffff820accb0 T dcn10_enable_power_gating_plane +ffffffff820ace50 T dcn10_disable_vga +ffffffff820ad040 T dcn10_dpp_pg_control +ffffffff820ad290 T dcn10_hubp_pg_control +ffffffff820ad4e0 T dcn10_bios_golden_init +ffffffff820ad640 T dcn10_enable_stream_timing +ffffffff820ada40 T dcn10_verify_allow_pstate_change_high +ffffffff820add90 T dcn10_plane_atomic_disconnect +ffffffff820adec0 T dcn10_plane_atomic_power_down +ffffffff820ae020 T dcn10_plane_atomic_disable +ffffffff820ae160 T dcn10_disable_plane +ffffffff820ae300 T dcn10_init_pipes +ffffffff820ae9c0 T dcn10_init_hw +ffffffff820aeeb0 T dcn10_power_down_on_boot +ffffffff820af000 T dcn10_reset_hw_ctx_wrap +ffffffff820af340 T dcn10_update_plane_addr +ffffffff820af460 T dcn10_set_input_transfer_func +ffffffff820af5d0 T dcn10_set_output_transfer_func +ffffffff820af6b0 T dcn10_pipe_control_lock +ffffffff820af780 T dcn10_cursor_lock +ffffffff820af940 T dcn10_enable_vblanks_synchronization +ffffffff820b0120 T dcn10_enable_timing_synchronization +ffffffff820b0520 T dcn10_enable_per_frame_crtc_position_reset +ffffffff820b06f0 T dcn10_program_gamut_remap +ffffffff820b08f0 T dcn10_program_output_csc +ffffffff820b0a20 T dcn10_update_visual_confirm_color +ffffffff820b0aa0 T dcn10_update_mpcc +ffffffff820b0d50 T dcn10_blank_pixel_data +ffffffff820b0e90 T dcn10_set_hdr_multiplier +ffffffff820b0f20 T dcn10_program_pipe +ffffffff820b1ac0 T dcn10_wait_for_pending_cleared +ffffffff820b1bc0 T dcn10_post_unlock_program_front_end +ffffffff820b1e60 T dcn10_prepare_bandwidth +ffffffff820b2000 T dcn10_optimize_bandwidth +ffffffff820b21a0 T dcn10_set_drr +ffffffff820b22a0 T dcn10_get_position +ffffffff820b2330 T dcn10_set_static_screen_control +ffffffff820b23d0 T dcn10_setup_stereo +ffffffff820b2520 T dcn10_wait_for_mpcc_disconnect +ffffffff820b26d0 T dcn10_dummy_display_power_gating +ffffffff820b2700 T dcn10_update_pending_status +ffffffff820b2840 T dcn10_update_dchub +ffffffff820b2870 T dcn10_set_cursor_position +ffffffff820b2db0 T dcn10_set_cursor_attribute +ffffffff820b2e00 T dcn10_set_cursor_sdr_white_level +ffffffff820b2ec0 T dcn10_get_vupdate_offset_from_vsync +ffffffff820b2f50 T dcn10_calc_vupdate_position +ffffffff820b2fe0 T dcn10_setup_periodic_interrupt +ffffffff820b30f0 T dcn10_setup_vupdate_interrupt +ffffffff820b31b0 T dcn10_unblank_stream +ffffffff820b32c0 T dcn10_send_immediate_sdp_message +ffffffff820b3320 T dcn10_set_clock +ffffffff820b3430 T dcn10_get_clock +ffffffff820b3490 T dcn10_get_dcc_en_bits +ffffffff820b4000 T snprintf_count +ffffffff820b4090 T dcn10_clear_status_bits +ffffffff820b4240 T dcn10_get_hw_state +ffffffff820b6000 T dcn10_hw_sequencer_construct +ffffffff820b7000 T dcn10_ipp_construct +ffffffff820b7050 T dcn20_ipp_construct +ffffffff820b70a0 t dcn10_ipp_destroy +ffffffff820b8000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff820b80b0 T dcn10_get_dig_frontend +ffffffff820b8170 T enc1_configure_encoder +ffffffff820b81f0 T dcn10_psr_program_dp_dphy_fast_training +ffffffff820b8270 T dcn10_psr_program_secondary_packet +ffffffff820b82f0 T dcn10_is_dig_enabled +ffffffff820b8350 T dcn10_link_encoder_validate_dvi_output +ffffffff820b8400 T dcn10_link_encoder_validate_dp_output +ffffffff820b8440 T dcn10_link_encoder_construct +ffffffff820b8620 T dcn10_link_encoder_validate_output_with_stream +ffffffff820b8820 T dcn10_link_encoder_hw_init +ffffffff820b8a20 T dcn10_aux_initialize +ffffffff820b8ab0 T dcn10_link_encoder_destroy +ffffffff820b8b00 T dcn10_link_encoder_setup +ffffffff820b8c50 T dcn10_link_encoder_enable_tmds_output +ffffffff820b8d40 T dcn10_link_encoder_enable_tmds_output_with_clk_pattern_wa +ffffffff820b8e60 T dcn10_link_encoder_enable_dp_output +ffffffff820b8fc0 T dcn10_link_encoder_enable_dp_mst_output +ffffffff820b9120 T dcn10_link_encoder_disable_output +ffffffff820b92f0 T dcn10_link_encoder_dp_set_lane_settings +ffffffff820b9490 T dcn10_link_encoder_dp_set_phy_pattern +ffffffff820b9bb0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff820b9db0 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff820ba080 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff820ba1c0 T dcn10_link_encoder_enable_hpd +ffffffff820ba200 T dcn10_link_encoder_disable_hpd +ffffffff820ba240 T dcn10_get_dig_mode +ffffffff820ba2b0 T dcn10_link_encoder_get_max_link_cap +ffffffff820ba330 t program_pattern_symbols +ffffffff820bb000 T mpc1_set_bg_color +ffffffff820bb1e0 T mpc1_get_mpcc +ffffffff820bb270 T mpc1_update_stereo_mix +ffffffff820bb390 T mpc1_assert_idle_mpcc +ffffffff820bb460 T mpc1_get_mpcc_for_dpp +ffffffff820bb510 T mpc1_is_mpcc_idle +ffffffff820bb600 T mpc1_assert_mpcc_idle_before_connect +ffffffff820bb740 T mpc1_insert_plane +ffffffff820bbce0 T mpc1_remove_mpcc +ffffffff820bc0a0 T mpc1_mpc_init +ffffffff820bc3c0 T mpc1_mpc_init_single_inst +ffffffff820bc5b0 T mpc1_init_mpcc_list_from_hw +ffffffff820bc880 T mpc1_read_mpcc_state +ffffffff820bca10 T mpc1_cursor_lock +ffffffff820bca90 T mpc1_get_mpc_out_mux +ffffffff820bcb10 T dcn10_mpc_construct +ffffffff820bcc90 t mpc1_update_blending +ffffffff820bd000 T opp1_program_bit_depth_reduction +ffffffff820bd400 T opp1_set_dyn_expansion +ffffffff820bd570 T opp1_program_fmt +ffffffff820bd870 T opp1_program_stereo +ffffffff820bd960 T opp1_pipe_clock_control +ffffffff820bd9a0 T opp1_destroy +ffffffff820bd9f0 T dcn10_opp_construct +ffffffff820be000 T optc1_program_global_sync +ffffffff820be150 T optc1_setup_vertical_interrupt0 +ffffffff820be1e0 T optc1_setup_vertical_interrupt1 +ffffffff820be250 T optc1_setup_vertical_interrupt2 +ffffffff820be2c0 T optc1_program_timing +ffffffff820be9a0 T optc1_is_two_pixels_per_containter +ffffffff820be9f0 T optc1_set_vtg_params +ffffffff820beb20 T optc1_set_blank_data_double_buffer +ffffffff820beb60 T optc1_set_timing_double_buffer +ffffffff820beba0 T optc1_set_blank +ffffffff820bec70 T optc1_is_blanked +ffffffff820becf0 T optc1_enable_optc_clock +ffffffff820bef10 T optc1_disable_crtc +ffffffff820bf000 T optc1_program_blank_color +ffffffff820bf0b0 T optc1_validate_timing +ffffffff820bf1b0 T optc1_get_vblank_counter +ffffffff820bf210 T optc1_lock +ffffffff820bf2f0 T optc1_unlock +ffffffff820bf360 T optc1_get_position +ffffffff820bf3f0 T optc1_is_counter_moving +ffffffff820bf470 T optc1_did_triggered_reset_occur +ffffffff820bf510 T optc1_disable_reset_trigger +ffffffff820bf5d0 T optc1_enable_reset_trigger +ffffffff820bf6e0 T optc1_enable_crtc_reset +ffffffff820bf840 T optc1_wait_for_state +ffffffff820bf910 T optc1_set_early_control +ffffffff820bf940 T optc1_set_static_screen_control +ffffffff820bf9e0 T optc1_set_drr +ffffffff820bfb80 T optc1_set_vtotal_min_max +ffffffff820bfc20 T optc1_get_crtc_scanoutpos +ffffffff820bfd30 T optc1_program_stereo +ffffffff820bff40 T optc1_is_stereo_left_eye +ffffffff820bffb0 T optc1_get_hw_timing +ffffffff820c00c0 T optc1_read_otg_state +ffffffff820c03d0 T optc1_get_otg_active_size +ffffffff820c04e0 T optc1_clear_optc_underflow +ffffffff820c0530 T optc1_tg_init +ffffffff820c05e0 T optc1_is_tg_enabled +ffffffff820c0650 T optc1_is_optc_underflow_occurred +ffffffff820c06c0 T optc1_configure_crc +ffffffff820c0930 T optc1_get_crc +ffffffff820c0a30 T dcn10_timing_generator_init +ffffffff820c0aa0 t optc1_enable_crtc +ffffffff820c0ba0 t optc1_set_test_pattern +ffffffff820c1290 t optc1_program_manual_trigger +ffffffff820c1340 t optc1_setup_manual_trigger +ffffffff820c2000 T dcn10_find_first_free_match_stream_enc_for_link +ffffffff820c20b0 T dcn10_create_resource_pool +ffffffff820c3230 t dcn10_resource_destruct +ffffffff820c3540 t dcn10_destroy_resource_pool +ffffffff820c35a0 t dcn10_panel_cntl_create +ffffffff820c3630 t dcn10_link_encoder_create +ffffffff820c3730 t dcn10_validate_bandwidth +ffffffff820c37b0 t dcn10_validate_global +ffffffff820c3990 t dcn10_acquire_free_pipe_for_layer +ffffffff820c3ac0 t dcn10_validate_plane +ffffffff820c3b10 t dcn10_add_stream_to_ctx +ffffffff820c3ce0 t dcn10_patch_unknown_plane_state +ffffffff820c3d40 t read_dce_straps +ffffffff820c3d70 t create_audio +ffffffff820c3da0 t dcn10_stream_encoder_create +ffffffff820c3e40 t dcn10_hwseq_create +ffffffff820c3ef0 t dcn10_get_dcc_compression_cap +ffffffff820c4000 T enc1_update_generic_info_packet +ffffffff820c4430 T enc1_stream_encoder_dp_set_stream_attribute +ffffffff820c4910 T enc1_stream_encoder_set_stream_attribute_helper +ffffffff820c4990 T enc1_stream_encoder_hdmi_set_stream_attribute +ffffffff820c4f80 T enc1_stream_encoder_dvi_set_stream_attribute +ffffffff820c5110 T enc1_stream_encoder_set_throttled_vcp_size +ffffffff820c5330 T enc1_stream_encoder_update_dp_info_packets +ffffffff820c5530 T enc1_stream_encoder_send_immediate_sdp_message +ffffffff820c5940 T enc1_stream_encoder_stop_dp_info_packets +ffffffff820c5b10 T enc1_stream_encoder_dp_blank +ffffffff820c5cb0 T enc1_stream_encoder_dp_unblank +ffffffff820c5ee0 T enc1_stream_encoder_set_avmute +ffffffff820c5f20 T enc1_reset_hdmi_stream_attribute +ffffffff820c5ff0 T get_audio_clock_info +ffffffff820c60e0 T enc1_se_enable_audio_clock +ffffffff820c6140 T enc1_se_enable_dp_audio +ffffffff820c6210 T enc1_se_audio_mute_control +ffffffff820c6260 T enc1_se_dp_audio_setup +ffffffff820c6270 t enc1_se_audio_setup +ffffffff820c63d0 T enc1_se_dp_audio_enable +ffffffff820c6620 T enc1_se_dp_audio_disable +ffffffff820c6790 T enc1_se_hdmi_audio_setup +ffffffff820c6c50 T enc1_se_hdmi_audio_disable +ffffffff820c6ce0 T enc1_setup_stereo_sync +ffffffff820c6d60 T enc1_dig_connect_to_otg +ffffffff820c6da0 T enc1_dig_source_otg +ffffffff820c6e10 T enc1_stream_encoder_dp_get_pixel_format +ffffffff820c6f00 T dcn10_stream_encoder_construct +ffffffff820c6f60 t enc1_stream_encoder_update_hdmi_info_packets +ffffffff820c7310 t enc1_stream_encoder_stop_hdmi_info_packets +ffffffff820c8000 T dccg2_update_dpp_dto +ffffffff820c8160 T dccg2_get_dccg_ref_freq +ffffffff820c8220 T dccg2_set_fifo_errdet_ovr_en +ffffffff820c8260 T dccg2_otg_add_pixel +ffffffff820c8300 T dccg2_otg_drop_pixel +ffffffff820c83a0 T dccg2_init +ffffffff820c83d0 T dccg2_create +ffffffff820c8480 T dcn_dccg_destroy +ffffffff820c9000 T dpp20_read_state +ffffffff820c91d0 T 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dsc_init_reg_values +ffffffff820d0220 T dsc_dc_pixel_encoding_to_dsc_pixel_format +ffffffff820d02d0 T dsc_dc_color_depth_to_dsc_bits_per_comp +ffffffff820d0310 T dsc_update_from_dsc_parameters +ffffffff820d03c0 t dsc2_read_state +ffffffff820d0570 t dsc2_validate_stream +ffffffff820d05d0 t dsc2_set_config +ffffffff820d1940 t dsc2_enable +ffffffff820d1af0 t dsc2_disable +ffffffff820d1c70 t dsc2_disconnect +ffffffff820d2000 T dwb2_config_dwb_cnv +ffffffff820d2200 T dwb2_disable +ffffffff820d2310 T dwb2_is_enabled +ffffffff820d23b0 T dwb2_set_stereo +ffffffff820d2490 T dwb2_set_new_content +ffffffff820d2500 T dwb2_set_scaler +ffffffff820d2880 T dcn20_dwbc_construct +ffffffff820d28d0 t dwb2_get_caps +ffffffff820d29b0 t dwb2_enable +ffffffff820d2b10 t dwb2_update +ffffffff820d2c70 t dwb2_set_warmup +ffffffff820d3000 T dwb_program_horz_scalar +ffffffff820d34c0 t wbscl_get_filter_coeffs_16p +ffffffff820d3990 t wbscl_set_scaler_filter +ffffffff820d3ba0 T dwb_program_vert_scalar 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hubp2_cursor_set_attributes +ffffffff820d8ed0 T hubp2_dmdata_set_attributes +ffffffff820d92b0 T hubp2_dmdata_load +ffffffff820d9340 T hubp2_dmdata_status_done +ffffffff820d93b0 T hubp2_program_surface_flip_and_addr +ffffffff820d9ca0 T hubp2_enable_triplebuffer +ffffffff820d9d70 T hubp2_is_triplebuffer_enabled +ffffffff820d9df0 T hubp2_set_flip_control_surface_gsl +ffffffff820d9e40 T hubp2_is_flip_pending +ffffffff820d9f50 T hubp2_set_blank +ffffffff820d9fb0 T hubp2_set_blank_regs +ffffffff820da0b0 T hubp2_cursor_set_position +ffffffff820da520 T hubp2_clk_cntl +ffffffff820da570 T hubp2_vtg_sel +ffffffff820da5b0 T hubp2_clear_underflow +ffffffff820da600 T hubp2_read_state_common +ffffffff820db250 T hubp2_read_state +ffffffff820db520 T hubp2_construct +ffffffff820db590 t hubp2_setup +ffffffff820dba30 t hubp2_validate_dml_output +ffffffff820dd000 T dcn20_set_flip_control_gsl +ffffffff820dd050 T dcn20_enable_power_gating_plane +ffffffff820dd4b0 T dcn20_dccg_init +ffffffff820dd530 T dcn20_disable_vga +ffffffff820dd5f0 T dcn20_program_triple_buffer +ffffffff820dd640 T dcn20_init_blank +ffffffff820dd850 T dcn20_dsc_pg_control +ffffffff820ddc60 T dcn20_dpp_pg_control +ffffffff820ddf10 T dcn20_hubp_pg_control +ffffffff820de1c0 T dcn20_plane_atomic_disable +ffffffff820de310 t dcn20_setup_gsl_group_as_lock +ffffffff820de570 T dcn20_disable_plane +ffffffff820de650 T dcn20_disable_pixel_data +ffffffff820de670 T dcn20_blank_pixel_data +ffffffff820de890 T dcn20_enable_stream_timing +ffffffff820dee50 T dcn20_program_output_csc +ffffffff820def40 T dcn20_set_output_transfer_func +ffffffff820df0c0 T dcn20_set_blend_lut +ffffffff820df130 T dcn20_set_shaper_3dlut +ffffffff820df1f0 T dcn20_set_input_transfer_func +ffffffff820df3b0 T dcn20_update_odm +ffffffff820df4a0 T dcn20_pipe_control_lock +ffffffff820df7c0 T dcn20_program_front_end_for_ctx +ffffffff820e0560 t dcn20_program_pipe +ffffffff820e1000 T dcn20_post_unlock_program_front_end +ffffffff820e1310 T dcn20_prepare_bandwidth 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enc2_update_hdmi_info_packet +ffffffff820f3000 T dcn20_vmid_setup +ffffffff820f4000 T dccg201_create +ffffffff820f40b0 t dccg201_update_dpp_dto +ffffffff820f5000 T dpp201_construct +ffffffff820f5080 t dpp201_get_optimal_number_of_taps +ffffffff820f5440 t dpp201_cnv_setup +ffffffff820f6000 T hubbub201_construct +ffffffff820f6060 t hubbub201_program_watermarks +ffffffff820f7000 T dcn201_hubp_construct +ffffffff820f7070 t hubp201_setup +ffffffff820f7350 t hubp201_program_surface_config +ffffffff820f8000 T dcn201_update_plane_addr +ffffffff820f82a0 T dcn201_init_blank +ffffffff820f83e0 T dcn201_init_hw +ffffffff820f8bb0 T dcn201_plane_atomic_disconnect +ffffffff820f8d20 T dcn201_update_mpcc +ffffffff820f8fb0 T dcn201_pipe_control_lock +ffffffff820f90b0 T dcn201_set_cursor_attribute +ffffffff820f9140 T dcn201_set_dmdata_attributes +ffffffff820f9250 T dcn201_unblank_stream +ffffffff820fa000 T dcn201_hw_sequencer_construct +ffffffff820fb000 T dcn201_link_encoder_construct +ffffffff820fb190 t dcn201_link_encoder_is_in_alt_mode +ffffffff820fb200 t dcn201_link_encoder_get_max_link_cap +ffffffff820fc000 T dcn201_mpc_construct +ffffffff820fc0c0 t mpc201_set_out_rate_control +ffffffff820fd000 T dcn201_opp_construct +ffffffff820fe000 T optc201_is_two_pixels_per_containter +ffffffff820fe010 T dcn201_timing_generator_init +ffffffff820fe080 t optc201_validate_timing +ffffffff820fe180 t optc201_triplebuffer_unlock +ffffffff820fe230 t optc201_triplebuffer_lock +ffffffff820fe350 t optc201_get_optc_source +ffffffff820ff000 T dcn201_create_resource_pool +ffffffff820ffa30 t dcn201_resource_destruct +ffffffff820ffd30 t dcn201_destroy_resource_pool +ffffffff820ffd90 t dcn201_link_init +ffffffff820ffde0 t dcn201_link_encoder_create +ffffffff820ffe90 t dcn201_acquire_free_pipe_for_layer +ffffffff820fffa0 t dcn201_populate_dml_writeback_from_context +ffffffff82100000 t read_dce_straps +ffffffff82100030 t dcn201_create_audio +ffffffff82100060 t dcn201_stream_encoder_create +ffffffff82100100 t dcn201_hwseq_create +ffffffff82100170 t dcn201_get_dcc_compression_cap +ffffffff82101000 T dccg21_create +ffffffff821010b0 t dccg21_update_dpp_dto +ffffffff82102000 T dcn21_dchvm_init +ffffffff82102200 T hubbub21_init_dchub +ffffffff821023d0 T hubbub21_program_urgent_watermarks +ffffffff82102bf0 T hubbub21_program_stutter_watermarks +ffffffff821030e0 T hubbub21_program_pstate_watermarks +ffffffff82103380 T hubbub21_program_watermarks +ffffffff821034e0 T hubbub21_wm_read_state +ffffffff82103780 T hubbub21_construct +ffffffff821037e0 t hubbub21_apply_DEDCN21_147_wa +ffffffff82104000 T apply_DEDCN21_142_wa_for_hostvm_deadline +ffffffff821042e0 T hubp21_program_deadline +ffffffff82104310 T hubp21_program_requestor +ffffffff821046b0 T hubp21_construct +ffffffff82104720 t hubp21_setup +ffffffff82104780 t hubp21_set_viewport +ffffffff82104a80 t hubp21_program_surface_flip_and_addr +ffffffff82105370 t hubp21_set_vm_system_aperture_settings +ffffffff821054a0 t hubp21_init +ffffffff821054d0 t hubp21_validate_dml_output +ffffffff82107000 T dcn21_init_sys_ctx +ffffffff82107110 T dcn21_s0i3_golden_init_wa +ffffffff82107170 T dcn21_exit_optimized_pwr_state +ffffffff82107190 T dcn21_optimize_pwr_state +ffffffff821071c0 T dcn21_PLAT_58856_wa +ffffffff82107260 T dcn21_set_abm_immediate_disable +ffffffff821073a0 T dcn21_set_pipe +ffffffff821074e0 T dcn21_set_backlight_level +ffffffff82107700 T dcn21_is_abm_supported +ffffffff82108000 T dcn21_hw_sequencer_construct +ffffffff82109000 T dcn21_link_encoder_enable_dp_output +ffffffff82109140 t dcn21_link_encoder_acquire_phy +ffffffff82109320 T dcn21_link_encoder_construct +ffffffff82109500 t dcn21_link_encoder_enable_dp_mst_output +ffffffff82109570 t dcn21_link_encoder_disable_output +ffffffff8210a000 T dcn21_fast_validate_bw +ffffffff8210a6a0 T dcn21_create_resource_pool +ffffffff8210b9d0 t dcn21_resource_destruct +ffffffff8210be70 t dcn21_destroy_resource_pool +ffffffff8210bed0 t dcn21_panel_cntl_create +ffffffff8210bf60 t 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dcn30_link_encoder_validate_output_with_stream +ffffffff82111010 T dcn30_link_encoder_construct +ffffffff821111f0 T enc3_hw_init +ffffffff82112000 T enc3_stream_encoder_update_hdmi_info_packets +ffffffff82112100 t enc3_update_hdmi_info_packet +ffffffff821124f0 T enc3_stream_encoder_stop_hdmi_info_packets +ffffffff82112ad0 T enc3_dp_set_dsc_pps_info_packet +ffffffff82112df0 T enc3_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff82112eb0 T enc3_stream_encoder_update_dp_info_packets +ffffffff82113170 T enc3_audio_mute_control +ffffffff821131e0 T enc3_se_dp_audio_setup +ffffffff82113260 T enc3_se_dp_audio_enable +ffffffff82113350 T enc3_se_hdmi_audio_setup +ffffffff82113660 T dcn30_dio_stream_encoder_construct +ffffffff821136d0 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff82113cd0 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff82113ed0 t enc3_read_state +ffffffff82114060 t enc3_dp_set_dsc_config +ffffffff82114130 t enc3_dp_set_odm_combine +ffffffff82115000 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dwb3_set_new_content +ffffffff8211b780 T dcn30_dwbc_construct +ffffffff8211b7d0 T dwb3_set_host_read_rate_control +ffffffff8211b840 t dwb3_get_caps +ffffffff8211c000 T dwb3_ogam_set_input_transfer_func +ffffffff8211c9f0 T dwb3_set_gamut_remap +ffffffff8211cca0 T dwb3_program_hdr_mult +ffffffff8211d000 T hubbub3_init_dchub_sys_ctx +ffffffff8211d1c0 T hubbub3_program_watermarks +ffffffff8211d2c0 T hubbub3_dcc_support_swizzle +ffffffff8211d380 T hubbub3_get_dcc_compression_cap +ffffffff8211d560 T hubbub3_force_wm_propagate_to_pipes +ffffffff8211d610 T hubbub3_force_pstate_change_control +ffffffff8211d690 T hubbub3_init_watermarks +ffffffff8211d9d0 T hubbub3_construct +ffffffff8211e000 T hubp3_set_vm_system_aperture_settings +ffffffff8211e130 T hubp3_program_surface_flip_and_addr +ffffffff8211eb20 T hubp3_dcc_control +ffffffff8211ebe0 T hubp3_dcc_control_sienna_cichlid +ffffffff8211ed00 T hubp3_dmdata_set_attributes +ffffffff8211ef00 T hubp3_program_surface_config +ffffffff8211f1f0 T hubp3_read_state +ffffffff8211f4c0 T hubp3_setup +ffffffff8211f550 T hubp3_init +ffffffff8211f580 T hubp3_construct +ffffffff82120000 T dcn30_set_blend_lut +ffffffff82120070 T dcn30_set_input_transfer_func +ffffffff821201d0 T dcn30_set_output_transfer_func +ffffffff82120500 T dcn30_update_writeback +ffffffff82120590 t dcn30_set_writeback +ffffffff82120740 T dcn30_mmhubbub_warmup +ffffffff82120990 T dcn30_enable_writeback +ffffffff82120a40 T dcn30_disable_writeback +ffffffff82120b20 T dcn30_program_all_writeback_pipes_in_tree +ffffffff82120e20 T dcn30_init_hw +ffffffff82121550 T dcn30_set_avmute +ffffffff82121660 T dcn30_update_info_frame +ffffffff82121750 T dcn30_program_dmdata_engine +ffffffff821217f0 T dcn30_apply_idle_power_optimizations +ffffffff82121d10 T dcn30_does_plane_fit_in_mall +ffffffff82121dc0 T dcn30_hardware_release +ffffffff82121eb0 T dcn30_set_disp_pattern_generator +ffffffff82121f20 T dcn30_prepare_bandwidth +ffffffff82122010 T dcn30_set_static_screen_control +ffffffff82123000 T dcn30_hw_sequencer_construct +ffffffff82124000 T dcn30_mmhubbub_construct +ffffffff82124050 t mmhubbub3_warmup_mcif +ffffffff82124260 t mmhubbub3_config_mcif_buf +ffffffff82124710 t mmhubbub3_config_mcif_arb +ffffffff82125000 T mpc3_is_dwb_idle +ffffffff82125070 T mpc3_set_dwb_mux +ffffffff821250f0 T mpc3_disable_dwb_mux +ffffffff82125170 T mpc3_set_out_rate_control +ffffffff82125280 T mpc3_get_ogam_current +ffffffff82125320 T mpc3_power_on_ogam_lut +ffffffff821253f0 T mpc3_set_output_gamma +ffffffff82126030 T mpc3_set_denorm +ffffffff821260a0 T mpc3_set_denorm_clamp +ffffffff821261f0 T mpc3_program_shaper +ffffffff821283b0 t mpc3_power_on_shaper_3dlut +ffffffff82128730 T mpc3_init_mpcc +ffffffff821287b0 T mpc3_set_gamut_remap +ffffffff82128a20 T mpc3_program_3dlut +ffffffff82129190 t mpc3_set3dlut_ram12 +ffffffff82129370 T mpc3_set_output_csc +ffffffff821294e0 T mpc3_set_ocsc_default +ffffffff82129650 T mpc3_set_rmu_mux +ffffffff821296f0 T mpc3_get_rmu_mux_status +ffffffff821297a0 T mpcc3_acquire_rmu +ffffffff82129900 T dcn30_mpc_construct +ffffffff821299d0 t mpcc3_release_rmu +ffffffff82129b40 t mpc3_set_mpc_mem_lp_mode +ffffffff8212a000 T optc3_triplebuffer_lock +ffffffff8212a120 T optc3_lock_doublebuffer_enable +ffffffff8212a3b0 T optc3_lock_doublebuffer_disable +ffffffff8212a4d0 T optc3_lock +ffffffff8212a5a0 T optc3_set_out_mux +ffffffff8212a5e0 T optc3_program_blank_color +ffffffff8212a710 T optc3_set_drr_trigger_window +ffffffff8212a7a0 T optc3_set_vtotal_change_limit +ffffffff8212a810 T optc3_set_dsc_config +ffffffff8212a860 T optc3_set_odm_bypass +ffffffff8212a9e0 T optc3_set_odm_combine +ffffffff8212ad30 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff8212adb0 T optc3_set_vtotal_min_max +ffffffff8212adf0 T optc3_tg_init +ffffffff8212ae50 T dcn30_timing_generator_init +ffffffff8212b000 T dcn30_add_stream_to_ctx +ffffffff8212b020 T dcn30_populate_dml_pipes_from_context +ffffffff8212b100 T dcn30_populate_dml_writeback_from_context +ffffffff8212b160 T dcn30_calc_max_scaled_time +ffffffff8212b1c0 T dcn30_set_mcif_arb_params +ffffffff8212b330 T dcn30_acquire_post_bldn_3dlut +ffffffff8212b4c0 T dcn30_release_post_bldn_3dlut +ffffffff8212b570 T dcn30_internal_validate_bw +ffffffff8212c2e0 t dcn30_split_stream_for_mpc_or_odm +ffffffff8212c600 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8212c6e0 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8212c780 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff8212c820 T dcn30_update_soc_for_wm_a +ffffffff8212c870 T dcn30_calculate_wm_and_dlg +ffffffff8212c8e0 T dcn30_validate_bandwidth +ffffffff8212cd10 T dcn30_update_bw_bounding_box +ffffffff8212d370 T dcn30_create_resource_pool +ffffffff8212e920 t dcn30_resource_destruct +ffffffff8212eea0 t dcn30_destroy_resource_pool +ffffffff8212ef00 t dcn30_panel_cntl_create +ffffffff8212ef90 t dcn30_link_encoder_create +ffffffff8212f040 t dcn30_get_panel_config_defaults +ffffffff8212f0c0 t read_dce_straps +ffffffff8212f0f0 t dcn30_create_audio +ffffffff8212f120 t dcn30_stream_encoder_create +ffffffff8212f2a0 t dcn30_hwseq_create +ffffffff82130000 T vpg3_update_generic_info_packet +ffffffff821309a0 T vpg3_construct +ffffffff82131000 T dccg301_create +ffffffff82132000 T dcn301_link_encoder_construct +ffffffff82133000 T hubbub301_construct +ffffffff82134000 T dcn301_hw_sequencer_construct +ffffffff82135000 T optc301_set_drr +ffffffff82135230 T optc301_setup_manual_trigger +ffffffff82135350 T dcn301_timing_generator_init +ffffffff82136000 T dcn301_panel_cntl_construct +ffffffff82136050 t dcn301_panel_cntl_destroy +ffffffff821360a0 t dcn301_panel_cntl_hw_init +ffffffff821362b0 t dcn301_is_panel_backlight_on +ffffffff82136310 t dcn301_is_panel_powered_on +ffffffff821363c0 t dcn301_store_backlight_level +ffffffff82136460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff82137000 T dcn301_create_resource_pool +ffffffff82138590 t dcn301_destruct +ffffffff82138ad0 t dcn301_destroy_resource_pool +ffffffff82138b30 t dcn301_panel_cntl_create +ffffffff82138bc0 t dcn301_link_encoder_create +ffffffff82138c70 t dcn301_calculate_wm_and_dlg +ffffffff82138ce0 t read_dce_straps +ffffffff82138d10 t dcn301_create_audio +ffffffff82138d40 t dcn301_stream_encoder_create +ffffffff82138ec0 t dcn301_hwseq_create +ffffffff82139000 T dcn302_dpp_pg_control +ffffffff821392a0 T dcn302_hubp_pg_control +ffffffff82139550 T dcn302_dsc_pg_control +ffffffff8213a000 T dcn302_hw_sequencer_construct +ffffffff8213b000 T dcn302_update_bw_bounding_box +ffffffff8213b050 T dcn302_create_resource_pool +ffffffff8213c4a0 t dcn302_resource_destruct +ffffffff8213c9e0 t dcn302_destroy_resource_pool +ffffffff8213ca30 t dcn302_panel_cntl_create +ffffffff8213cac0 t dcn302_link_encoder_create +ffffffff8213cb70 t dcn302_get_panel_config_defaults +ffffffff8213cbf0 t read_dce_straps +ffffffff8213cc20 t dcn302_create_audio +ffffffff8213cc50 t dcn302_stream_encoder_create +ffffffff8213cdd0 t dcn302_hwseq_create +ffffffff8213d000 T dcn303_dpp_pg_control +ffffffff8213d030 T dcn303_hubp_pg_control +ffffffff8213d060 T dcn303_dsc_pg_control +ffffffff8213d090 T dcn303_enable_power_gating_plane +ffffffff8213e000 T dcn303_hw_sequencer_construct +ffffffff8213f000 T dcn303_update_bw_bounding_box +ffffffff8213f050 T dcn303_create_resource_pool +ffffffff821402a0 t dcn303_resource_destruct +ffffffff821407e0 t dcn303_destroy_resource_pool +ffffffff82140830 t dcn303_panel_cntl_create +ffffffff821408c0 t dcn303_link_encoder_create +ffffffff82140970 t dcn303_get_panel_config_defaults +ffffffff821409f0 t read_dce_straps +ffffffff82140a20 t dcn303_create_audio +ffffffff82140a50 t dcn303_stream_encoder_create +ffffffff82140bd0 t dcn303_hwseq_create +ffffffff82141000 T afmt31_powerdown +ffffffff82141090 T afmt31_poweron +ffffffff82141120 T afmt31_construct +ffffffff82142000 T apg31_construct +ffffffff82142050 t apg31_se_audio_setup +ffffffff82142160 t apg31_enable +ffffffff82142270 t apg31_disable +ffffffff82143000 T dccg31_update_dpp_dto +ffffffff82143160 T dccg31_set_dpstreamclk +ffffffff821432f0 t dccg31_disable_dpstreamclk +ffffffff82143440 T dccg31_enable_symclk32_se +ffffffff82143740 T dccg31_disable_symclk32_se +ffffffff82143a10 T dccg31_enable_symclk32_le +ffffffff82143b20 T dccg31_disable_symclk32_le +ffffffff82143c10 T dccg31_set_symclk32_le_root_clock_gating +ffffffff82143d20 T dccg31_disable_dscclk +ffffffff82143f70 T dccg31_enable_dscclk +ffffffff821441e0 T dccg31_set_physymclk +ffffffff821446f0 T dccg31_set_dtbclk_dto +ffffffff821449a0 T dccg31_set_audio_dtbclk_dto +ffffffff82144ab0 T dccg31_get_dccg_ref_freq +ffffffff82144ae0 T dccg31_set_dispclk_change_mode +ffffffff82144b30 T dccg31_init +ffffffff82145110 T dccg31_otg_add_pixel +ffffffff82145150 T dccg31_otg_drop_pixel +ffffffff82145190 T dccg31_create +ffffffff82146000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff82146390 T dcn31_link_encoder_construct +ffffffff82146560 T dcn31_link_encoder_construct_minimal +ffffffff821465e0 T dcn31_link_encoder_enable_dp_output +ffffffff82146820 T dcn31_link_encoder_enable_dp_mst_output +ffffffff82146a60 T dcn31_link_encoder_disable_output +ffffffff82146cd0 T dcn31_link_encoder_is_in_alt_mode +ffffffff82146e20 T dcn31_link_encoder_get_max_link_cap +ffffffff82146fa0 t enc31_hw_init +ffffffff82147000 T dcn31_hpo_dp_link_enc_enable +ffffffff82147160 T dcn31_hpo_dp_link_enc_disable +ffffffff821471d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff82147b30 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff82147db0 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff82148050 T dcn31_hpo_dp_link_enc_read_state +ffffffff821482f0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff821483f0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff82148530 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff82148620 T hpo_dp_link_encoder31_construct +ffffffff82148680 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff82149000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff82149070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff821491b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff82149460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff82149560 t dcn31_hpo_dp_stream_enc_disable +ffffffff821495d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff82149e80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num +ffffffff82149f40 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff8214a160 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff8214a2f0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff8214a590 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff8214a690 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff8214a740 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff8214a810 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff8214a9c0 t dcn31_hpo_dp_stream_enc_read_state +ffffffff8214ab50 t dcn31_set_hblank_min_symbol_width +ffffffff8214b000 T hubbub31_init_dchub_sys_ctx +ffffffff8214b1e0 T hubbub31_init +ffffffff8214b280 T hubbub31_construct +ffffffff8214b320 t hubbub31_get_dcc_compression_cap +ffffffff8214b500 t hubbub31_get_dchub_ref_freq +ffffffff8214b5e0 t hubbub31_program_watermarks +ffffffff8214cf00 t hubbub31_verify_allow_pstate_change_high +ffffffff8214d0c0 t dcn31_program_det_size +ffffffff8214d2a0 t dcn31_program_compbuf_size +ffffffff8214d520 t dcn31_init_crb +ffffffff8214e000 T hubp31_set_unbounded_requesting +ffffffff8214e090 T hubp31_soft_reset +ffffffff8214e0e0 T hubp31_construct +ffffffff8214e150 t hubp31_program_extended_blank +ffffffff8214f000 T dcn31_init_hw +ffffffff8214f850 T dcn31_dsc_pg_control +ffffffff8214fba0 T dcn31_enable_power_gating_plane +ffffffff8214fe00 T dcn31_update_info_frame +ffffffff8214ff30 T dcn31_z10_save_init +ffffffff8214ffc0 T dcn31_z10_restore +ffffffff82150070 T dcn31_hubp_pg_control +ffffffff82150390 T dcn31_init_sys_ctx +ffffffff82150440 T dcn31_reset_hw_ctx_wrap +ffffffff821507a0 T dcn31_setup_hpo_hw_control +ffffffff82151000 T dcn31_hw_sequencer_construct +ffffffff82152000 T optc31_immediate_disable_crtc +ffffffff82152100 T optc31_set_drr +ffffffff82152310 T optc3_init_odm +ffffffff82152480 T dcn31_timing_generator_init +ffffffff821524f0 t optc31_enable_crtc +ffffffff821525f0 t optc31_disable_crtc +ffffffff821526d0 t optc31_set_odm_combine +ffffffff82153000 T dcn31_panel_cntl_construct +ffffffff82153040 t dcn31_panel_cntl_destroy +ffffffff82153090 t dcn31_panel_cntl_hw_init +ffffffff82153190 t dcn31_is_panel_backlight_on +ffffffff82153230 t dcn31_is_panel_powered_on +ffffffff821532e0 t dcn31_store_backlight_level +ffffffff821533b0 t dcn31_get_16_bit_backlight_from_pwm +ffffffff82154000 T dcn31x_populate_dml_pipes_from_context +ffffffff82154180 T dcn31_populate_dml_pipes_from_context +ffffffff821545c0 T dcn31_calculate_wm_and_dlg +ffffffff82154630 T dcn31_populate_dml_writeback_from_context +ffffffff82154690 T dcn31_set_mcif_arb_params +ffffffff821546f0 T dcn31_validate_bandwidth +ffffffff82154ae0 T dcn31_create_resource_pool +ffffffff82155e80 t dcn31_resource_destruct +ffffffff821564f0 t dcn31_destroy_resource_pool +ffffffff82156550 t dcn31_panel_cntl_create +ffffffff821565c0 t dcn31_link_encoder_create +ffffffff82156670 t dcn31_link_enc_create_minimal +ffffffff82156710 t dcn31_get_panel_config_defaults +ffffffff82156750 t read_dce_straps +ffffffff82156780 t dcn31_create_audio +ffffffff821567b0 t dcn31_stream_encoder_create +ffffffff82156930 t dcn31_hpo_dp_stream_encoder_create +ffffffff82156af0 t dcn31_hpo_dp_link_encoder_create +ffffffff82156b80 t dcn31_hwseq_create +ffffffff82157000 T vpg31_powerdown +ffffffff82157090 T vpg31_poweron +ffffffff82157120 T vpg31_construct +ffffffff82158000 T dccg314_create +ffffffff821580b0 t dccg314_init +ffffffff82158210 t dccg314_set_dpstreamclk +ffffffff821585d0 t dccg314_set_dtbclk_dto +ffffffff821587c0 t dccg314_set_pixel_rate_div +ffffffff82158b30 t dccg314_set_valid_pixel_rate +ffffffff82158ba0 t dccg314_trigger_dio_fifo_resync +ffffffff82158c40 t dccg314_dpp_root_clock_control +ffffffff82159000 T dcn314_dio_stream_encoder_construct +ffffffff82159070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff82159670 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff82159880 t enc314_stream_encoder_dp_blank +ffffffff82159900 t enc314_stream_encoder_dp_unblank +ffffffff82159c80 t enc314_read_state +ffffffff82159de0 t enc314_dp_set_dsc_config +ffffffff82159e30 t enc314_dp_set_odm_combine +ffffffff82159e70 t enc314_set_dig_input_mode +ffffffff82159ec0 t enc314_enable_fifo +ffffffff82159f60 t enc314_disable_fifo +ffffffff82159fb0 t enc314_reset_fifo +ffffffff8215b000 T dcn314_update_odm +ffffffff8215b600 T dcn314_dsc_pg_control +ffffffff8215b9d0 T dcn314_enable_power_gating_plane +ffffffff8215bc60 T dcn314_calculate_dccg_k1_k2_values +ffffffff8215be10 T dcn314_set_pixels_per_cycle +ffffffff8215bf00 T dcn314_resync_fifo_dccg_dio +ffffffff8215c0a0 T dcn314_dpp_root_clock_control +ffffffff8215c100 T dcn314_disable_link_output +ffffffff8215d000 T dcn314_hw_sequencer_construct +ffffffff8215e000 T dcn314_timing_generator_init +ffffffff8215e070 t optc314_enable_crtc +ffffffff8215e170 t optc314_disable_crtc +ffffffff8215e250 t optc314_phantom_crtc_post_enable +ffffffff8215e310 t optc314_set_odm_bypass +ffffffff8215e480 t optc314_set_odm_combine +ffffffff8215e770 t optc314_set_h_timing_div_manual_mode +ffffffff8215f000 T dcn314_validate_bandwidth +ffffffff8215f490 T dcn314_create_resource_pool +ffffffff821607b0 t dcn314_resource_destruct +ffffffff82160e20 t dcn314_get_preferred_eng_id_dpia +ffffffff82160e50 t dcn314_destroy_resource_pool +ffffffff82160eb0 t dcn31_panel_cntl_create +ffffffff82160f20 t dcn31_link_encoder_create +ffffffff82160fd0 t dcn31_link_enc_create_minimal +ffffffff82161070 t dcn314_populate_dml_pipes_from_context +ffffffff82161100 t dcn314_update_bw_bounding_box +ffffffff82161150 t dcn314_get_panel_config_defaults +ffffffff82161190 t read_dce_straps +ffffffff821611c0 t dcn31_create_audio +ffffffff821611f0 t dcn314_stream_encoder_create +ffffffff82161370 t dcn31_hpo_dp_stream_encoder_create +ffffffff82161530 t dcn31_hpo_dp_link_encoder_create +ffffffff821615c0 t dcn314_hwseq_create +ffffffff82162000 T dcn315_create_resource_pool +ffffffff82163280 t dcn315_resource_destruct +ffffffff821638e0 t dcn315_destroy_resource_pool +ffffffff82163940 t dcn31_panel_cntl_create +ffffffff821639b0 t dcn31_link_encoder_create +ffffffff82163a60 t dcn31_link_enc_create_minimal +ffffffff82163b00 t dcn315_populate_dml_pipes_from_context +ffffffff82164200 t dcn315_get_panel_config_defaults +ffffffff82164240 t read_dce_straps +ffffffff82164270 t dcn31_create_audio +ffffffff821642a0 t dcn315_stream_encoder_create +ffffffff82164420 t dcn31_hpo_dp_stream_encoder_create +ffffffff821645e0 t dcn31_hpo_dp_link_encoder_create +ffffffff82164670 t dcn31_hwseq_create +ffffffff82165000 T dcn316_create_resource_pool +ffffffff82166290 t dcn316_resource_destruct +ffffffff821668f0 t dcn316_destroy_resource_pool +ffffffff82166950 t dcn31_panel_cntl_create +ffffffff821669c0 t dcn31_link_encoder_create +ffffffff82166a70 t dcn31_link_enc_create_minimal +ffffffff82166b10 t dcn316_populate_dml_pipes_from_context +ffffffff82166e40 t dcn316_get_panel_config_defaults +ffffffff82166e80 t read_dce_straps +ffffffff82166eb0 t dcn31_create_audio +ffffffff82166ee0 t dcn316_stream_encoder_create +ffffffff82167060 t dcn31_hpo_dp_stream_encoder_create +ffffffff82167220 t dcn31_hpo_dp_link_encoder_create +ffffffff821672b0 t dcn31_hwseq_create +ffffffff82168000 T dccg32_create +ffffffff821680b0 t dccg32_get_dccg_ref_freq +ffffffff821680e0 t dccg32_otg_add_pixel +ffffffff82168120 t dccg32_otg_drop_pixel +ffffffff82168160 t dccg32_set_dpstreamclk +ffffffff821684a0 t dccg32_set_dtbclk_dto +ffffffff821686a0 t dccg32_set_pixel_rate_div +ffffffff82168a10 t dccg32_set_valid_pixel_rate +ffffffff82168a80 t dccg32_trigger_dio_fifo_resync +ffffffff82169000 T enc32_hw_init +ffffffff82169090 T dcn32_link_encoder_enable_dp_output +ffffffff821690e0 T dcn32_link_encoder_construct +ffffffff821692d0 t dcn32_link_encoder_is_in_alt_mode +ffffffff82169350 t dcn32_link_encoder_get_max_link_cap +ffffffff8216a000 T enc32_stream_encoder_dp_unblank +ffffffff8216a500 T enc32_enable_fifo +ffffffff8216a5a0 t enc32_reset_fifo +ffffffff8216a6a0 T dcn32_dio_stream_encoder_construct +ffffffff8216a710 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff8216ac90 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff8216ae10 t enc32_read_state +ffffffff8216af70 t enc32_dp_set_dsc_config +ffffffff8216afc0 t enc32_dp_set_odm_combine +ffffffff8216b000 t enc32_set_dig_input_mode +ffffffff8216c000 T dpp32_construct +ffffffff8216c060 t dscl32_calc_lb_num_partitions +ffffffff8216d000 T hpo_dp_link_encoder32_construct +ffffffff8216d060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff8216e000 T hubbub32_set_request_limit +ffffffff8216e130 T dcn32_program_det_size +ffffffff8216e2d0 T hubbub32_program_urgent_watermarks +ffffffff8216ea40 T hubbub32_program_stutter_watermarks +ffffffff8216ee90 T hubbub32_program_pstate_watermarks +ffffffff8216f320 T hubbub32_program_usr_watermarks +ffffffff8216f580 T hubbub32_force_usr_retraining_allow +ffffffff8216f600 T hubbub32_force_wm_propagate_to_pipes +ffffffff8216f6a0 T hubbub32_init +ffffffff8216f7e0 T hubbub32_construct +ffffffff8216f860 t hubbub32_wm_read_state +ffffffff8216fc80 t hubbub32_program_watermarks +ffffffff8216fd90 t hubbub32_init_watermarks +ffffffff821701d0 t dcn32_program_compbuf_size +ffffffff82170460 t dcn32_init_crb +ffffffff82171000 T hubp32_update_force_pstate_disallow +ffffffff82171090 T hubp32_update_force_cursor_pstate_disallow +ffffffff82171120 T hubp32_update_mall_sel +ffffffff821711b0 T hubp32_prepare_subvp_buffering +ffffffff82171250 T hubp32_phantom_hubp_post_enable +ffffffff82171360 T hubp32_cursor_set_attributes +ffffffff82171620 T hubp32_init +ffffffff82171650 T hubp32_construct +ffffffff82172000 T dcn32_dsc_pg_control +ffffffff82172320 T dcn32_enable_power_gating_plane +ffffffff82172590 T dcn32_hubp_pg_control +ffffffff82172800 T dcn32_apply_idle_power_optimizations +ffffffff82172af0 T dcn32_commit_subvp_config +ffffffff82172ba0 T dcn32_subvp_pipe_control_lock +ffffffff82172d70 T dcn32_subvp_pipe_control_lock_fast +ffffffff82172df0 T dcn32_set_mpc_shaper_3dlut +ffffffff82172f10 T dcn32_set_mcm_luts +ffffffff821730a0 T dcn32_set_input_transfer_func +ffffffff821731e0 T dcn32_set_output_transfer_func +ffffffff82173420 T dcn32_update_force_pstate +ffffffff82173640 T dcn32_update_mall_sel +ffffffff82173830 T dcn32_program_mall_pipe_config +ffffffff82173920 T dcn32_init_hw +ffffffff821741e0 T dcn32_update_odm +ffffffff821747e0 T dcn32_calculate_dccg_k1_k2_values +ffffffff82174a10 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff82174ab0 T dcn32_set_pixels_per_cycle +ffffffff82174bf0 T dcn32_resync_fifo_dccg_dio +ffffffff82174d90 T dcn32_unblank_stream +ffffffff82174fa0 T dcn32_disable_link_output +ffffffff82175310 T dcn32_update_phantom_vp_position +ffffffff82175420 T dcn32_apply_update_flags_for_phantom +ffffffff821754a0 T dcn32_dsc_pg_status +ffffffff82175580 T dcn32_update_dsc_pg +ffffffff82175680 T dcn32_enable_phantom_streams +ffffffff821757c0 T dcn32_init_blank +ffffffff82175a00 T dcn32_blank_phantom +ffffffff82175b80 T dcn32_is_pipe_topology_transition_seamless +ffffffff82176000 T dcn32_hw_sequencer_init_functions +ffffffff82177000 T dcn32_mmhubbub_construct +ffffffff82177050 t mmhubbub32_warmup_mcif +ffffffff82177260 t mmhubbub32_config_mcif_buf +ffffffff82177710 t mmhubbub32_config_mcif_arb +ffffffff82178000 T mpc32_mpc_init +ffffffff821781e0 T mpc32_power_on_blnd_lut +ffffffff82178350 T mpc32_configure_post1dlut +ffffffff82178450 T mpc32_program_post1dluta_settings +ffffffff82178660 T mpc32_program_post1dlutb_settings +ffffffff82178870 T mpc32_program_post1dlut_pwl +ffffffff82178ca0 T mpc32_program_post1dlut +ffffffff82178fb0 T mpc32_configure_shaper_lut +ffffffff821790d0 T mpc32_program_shaper_luta_settings +ffffffff82179f60 T mpc32_program_shaper_lutb_settings +ffffffff8217adf0 T mpc32_program_shaper_lut +ffffffff8217af90 T mpc32_power_on_shaper_3dlut +ffffffff8217b1c0 T mpc32_program_shaper +ffffffff8217b4e0 T mpc32_select_3dlut_ram +ffffffff8217b590 T mpc32_select_3dlut_ram_mask +ffffffff8217b660 T mpc32_set3dlut_ram12 +ffffffff8217b860 T mpc32_set3dlut_ram10 +ffffffff8217b930 T mpc32_program_3dlut +ffffffff8217c300 T dcn32_mpc_construct +ffffffff8217d000 T optc32_set_h_timing_div_manual_mode +ffffffff8217d040 T dcn32_timing_generator_init +ffffffff8217d0b0 t optc32_enable_crtc +ffffffff8217d1b0 t optc32_disable_crtc +ffffffff8217d370 t optc32_phantom_crtc_post_enable +ffffffff8217d430 t optc32_disable_phantom_otg +ffffffff8217d520 t optc32_set_drr +ffffffff8217d6f0 t optc32_set_odm_bypass +ffffffff8217d860 t optc32_set_odm_combine +ffffffff8217e000 T dcn32_panel_cntl_create +ffffffff8217e070 T dcn32_acquire_post_bldn_3dlut +ffffffff8217e160 T dcn32_release_post_bldn_3dlut +ffffffff8217e210 T dcn32_retain_phantom_pipes +ffffffff8217e2f0 T dcn32_remove_phantom_pipes +ffffffff8217e460 T dcn32_add_phantom_pipes +ffffffff8217e890 T dcn32_validate_bandwidth +ffffffff8217ed70 T dcn32_populate_dml_pipes_from_context +ffffffff8217f1a0 T dcn32_calculate_wm_and_dlg +ffffffff8217f210 T dcn32_create_resource_pool +ffffffff8217f2c0 t dcn32_resource_construct +ffffffff8218a800 T dcn32_acquire_free_pipe_as_secondary_dpp_pipe +ffffffff8218ab00 T dcn32_calc_num_avail_chans_for_mall +ffffffff8218ab70 t dcn32_mpc_create +ffffffff8218f1d0 t dcn32_dwbc_create +ffffffff8218fbd0 t dcn32_mmhubbub_create +ffffffff82190080 t dcn32_resource_destruct +ffffffff82190710 t dcn32_destroy_resource_pool +ffffffff82190770 t dcn32_link_encoder_create +ffffffff82191840 t dcn32_update_bw_bounding_box +ffffffff82191890 t read_dce_straps +ffffffff821918c0 t dcn32_create_audio +ffffffff82191c40 t dcn32_stream_encoder_create +ffffffff82193a80 t dcn32_hpo_dp_stream_encoder_create +ffffffff82194860 t dcn32_hpo_dp_link_encoder_create +ffffffff82194cb0 t dcn32_hwseq_create +ffffffff821951a0 t dcn32_vpg_create +ffffffff82196000 T dcn32_helper_mall_bytes_to_ways +ffffffff82196060 T dcn32_helper_calculate_mall_bytes_for_cursor +ffffffff82196100 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff82196180 T dcn32_merge_pipes_for_subvp +ffffffff82196340 T dcn32_all_pipes_have_stream_and_plane +ffffffff821963d0 T dcn32_subvp_in_use +ffffffff82196460 T dcn32_mpo_in_use +ffffffff821964d0 T dcn32_any_surfaces_rotated +ffffffff82196560 T dcn32_is_center_timing +ffffffff821965d0 T dcn32_is_psr_capable +ffffffff82196620 T dcn32_determine_det_override +ffffffff82196960 T dcn32_set_det_allocations +ffffffff82196af0 T dcn32_save_mall_state +ffffffff82196ba0 T dcn32_restore_mall_state +ffffffff82196c50 T dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82196e00 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82196eb0 T dcn32_check_native_scaling_for_res +ffffffff82196f10 T dcn32_subvp_drr_admissable +ffffffff821970d0 T dcn32_subvp_vblank_admissable +ffffffff82198000 T dcn321_link_encoder_construct +ffffffff82199000 T dcn321_create_resource_pool +ffffffff821990b0 t dcn321_resource_construct +ffffffff821a4550 t dcn321_mpc_create +ffffffff821a8bb0 t dcn321_dwbc_create +ffffffff821a95b0 t dcn321_mmhubbub_create +ffffffff821a9a60 t dcn321_resource_destruct +ffffffff821aa0f0 t dcn321_destroy_resource_pool +ffffffff821aa150 t dcn321_link_encoder_create +ffffffff821ab220 t dcn321_update_bw_bounding_box +ffffffff821ab270 t read_dce_straps +ffffffff821ab2a0 t dcn321_create_audio +ffffffff821ab620 t dcn321_stream_encoder_create +ffffffff821ad460 t dcn321_hpo_dp_stream_encoder_create +ffffffff821ae240 t dcn321_hpo_dp_link_encoder_create +ffffffff821ae690 t dcn321_hwseq_create +ffffffff821aeb80 t dcn321_vpg_create +ffffffff821af000 T bw_int_to_fixed_nonconst +ffffffff821af090 T bw_frc_to_fixed +ffffffff821af260 T bw_floor2 +ffffffff821af310 T bw_ceil2 +ffffffff821af390 T bw_mul +ffffffff821b0000 T convert_to_custom_float_format +ffffffff821b1000 T bw_calcs_init +ffffffff821b1e60 T bw_calcs +ffffffff821b3800 t calculate_bandwidth +ffffffff821bb000 T scaler_settings_calculation +ffffffff821bb350 T mode_support_and_system_configuration +ffffffff821c1180 T display_pipe_configuration +ffffffff821c1ab0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff821c7000 T dcn_bw_mod +ffffffff821c7060 T dcn_bw_min2 +ffffffff821c70a0 T dcn_bw_max +ffffffff821c70d0 T dcn_bw_max2 +ffffffff821c7110 T dcn_bw_floor2 +ffffffff821c71b0 T dcn_bw_floor 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+ffffffff821cf4f0 T dcn20_cap_soc_clocks +ffffffff821cf850 T dcn20_patch_bounding_box +ffffffff821cfa40 T dcn20_validate_bandwidth_fp +ffffffff821cfbe0 t dcn20_validate_bandwidth_internal +ffffffff821cffe0 T dcn20_fpu_set_wm_ranges +ffffffff821d0080 T dcn20_fpu_adjust_dppclk +ffffffff821d0120 T dcn21_populate_dml_pipes_from_context +ffffffff821d0230 T dcn21_validate_bandwidth_fp +ffffffff821d0cc0 T dcn21_update_bw_bounding_box +ffffffff821d10d0 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff821d1130 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff821d1430 t calculate_wm_set_for_vlevel +ffffffff821d2000 T dml20_recalculate +ffffffff821d2740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821d7be0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff821df040 t TruncToValidBPP +ffffffff821df220 t CalculateVMAndRowBytes +ffffffff821df8e0 t CalculatePrefetchSourceLines +ffffffff821dfab0 t CalculateWriteBackDelay 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calculate_ttu_cursor +ffffffff82210000 T optc3_fpu_set_vrr_m_const +ffffffff822104a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff822107b0 T dcn30_fpu_set_mcif_arb_params +ffffffff82210920 T dcn30_fpu_update_soc_for_wm_a +ffffffff822109f0 T dcn30_fpu_calculate_wm_and_dlg +ffffffff82211480 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff82211670 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff822116d0 T dcn30_fpu_update_max_clk +ffffffff82211780 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff82211880 T dcn30_fpu_update_bw_bounding_box +ffffffff82211a60 T dcn3_fpu_build_wm_range_table +ffffffff82211d40 T patch_dcn30_soc_bounding_box +ffffffff82212000 T dml30_recalculate +ffffffff822125f0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff822190b0 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff82219320 T dml30_CalculateWriteBackDISPCLK +ffffffff82219490 t dml_max3 +ffffffff822194f0 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff82221040 t CalculateSwathAndDETConfiguration +ffffffff82221740 t TruncToValidBPP +ffffffff822219a0 t CalculateVMAndRowBytes +ffffffff82222010 t CalculatePrefetchSourceLines +ffffffff822221e0 t CalculateUrgentBurstFactor +ffffffff82222470 t CalculateDCFCLKDeepSleep +ffffffff82222790 t UseMinimumDCFCLK +ffffffff82223ab0 t CalculatePrefetchSchedule +ffffffff82224f50 t CalculateFlipSchedule +ffffffff82225450 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82226190 t CalculateSwathWidth +ffffffff82227000 T dml30_rq_dlg_get_rq_reg +ffffffff822274b0 t dml_rq_dlg_get_rq_params +ffffffff82227740 T dml30_rq_dlg_get_dlg_reg +ffffffff82229e10 t get_surf_rq_param +ffffffff8222a7a0 t calculate_ttu_cursor +ffffffff8222b000 T dcn301_update_bw_bounding_box +ffffffff8222b2e0 T dcn301_fpu_set_wm_ranges +ffffffff8222b380 T dcn301_fpu_init_soc_bounding_box +ffffffff8222b420 T dcn301_calculate_wm_and_dlg_fp +ffffffff8222b750 t calculate_wm_set_for_vlevel +ffffffff8222c000 T dcn302_fpu_update_bw_bounding_box +ffffffff8222c940 T dcn302_fpu_init_soc_bounding_box +ffffffff8222d000 T dcn303_fpu_update_bw_bounding_box +ffffffff8222d9a0 T dcn303_fpu_init_soc_bounding_box +ffffffff8222e000 T dcn31_zero_pipe_dcc_fraction +ffffffff8222e060 T dcn31_update_soc_for_wm_a +ffffffff8222e110 T dcn315_update_soc_for_wm_a +ffffffff8222e1e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff8222e840 T dcn31_update_bw_bounding_box +ffffffff8222ebe0 T dcn315_update_bw_bounding_box +ffffffff8222eed0 T dcn316_update_bw_bounding_box +ffffffff8222f280 T dcn_get_max_non_odm_pix_rate_100hz +ffffffff8222f2e0 T dcn_get_approx_det_segs_required_for_pstate +ffffffff82230000 T dml31_recalculate +ffffffff822302d0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82237190 T dml31_CalculateWriteBackDISPCLK +ffffffff82237300 t dml_max3 +ffffffff82237360 T dml31_ModeSupportAndSystemConfigurationFull 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DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82251050 T dml314_CalculateWriteBackDISPCLK +ffffffff822511c0 t dml_max3 +ffffffff82251220 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff822595a0 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff82259810 t CalculateSwathAndDETConfiguration +ffffffff82259e50 t TruncToValidBPP +ffffffff8225a0a0 t CalculateDCFCLKDeepSleep +ffffffff8225a3c0 t CalculateVMAndRowBytes +ffffffff8225aa00 t CalculatePrefetchSourceLines +ffffffff8225abd0 t CalculateUrgentBurstFactor +ffffffff8225ae60 t CalculateMaxVStartup +ffffffff8225afa0 t UseMinimumDCFCLK +ffffffff8225bf30 t CalculatePrefetchSchedulePerPlane +ffffffff8225c690 t CalculateFlipSchedule +ffffffff8225cc20 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8225d840 t CalculateSwathWidth +ffffffff8225dd50 t CalculatePrefetchSchedule +ffffffff8225f130 t CalculateVupdateAndDynamicMetadataParameters +ffffffff82260000 T dml314_rq_dlg_get_rq_reg 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dcn32_set_clock_limits +ffffffff8226b480 T dcn32_override_min_req_memclk +ffffffff8226b540 t subvp_drr_schedulable +ffffffff8226b7d0 t get_optimal_ntuple +ffffffff8226c000 T dml32_recalculate +ffffffff82270320 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff82278000 T dml32_dscceComputeDelay +ffffffff82278140 T dml32_dscComputeDelay +ffffffff82278180 T IsVertical +ffffffff822781b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff822784d0 t dml_max3 +ffffffff82278530 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff82278860 T dml32_CalculateSwathAndDETConfiguration +ffffffff82279090 T dml32_CalculateSwathWidth +ffffffff82279950 T dml32_UnboundedRequest +ffffffff822799c0 T dml32_CalculateDETBufferSize +ffffffff8227a000 T dml32_CalculateODMMode +ffffffff8227a780 T dml32_CalculateRequiredDispclk +ffffffff8227a940 T dml32_RoundToDFSGranularity +ffffffff8227a9d0 T dml32_CalculateOutputLink +ffffffff8227b440 T dml32_TruncToValidBPP +ffffffff8227b770 T dml32_CalculateDPPCLK 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dml32_rq_dlg_get_dlg_reg +ffffffff8228a000 T dcn321_update_bw_bounding_box_fpu +ffffffff8228c760 t get_optimal_ntuple +ffffffff8228d000 T dml_init_instance +ffffffff8228d310 T dml_get_status_message +ffffffff8228d350 T dml_log_pipe_params +ffffffff8228d380 T dml_log_mode_support_params +ffffffff8228e000 T dml_get_voltage_level +ffffffff8228e240 t fetch_socbb_params +ffffffff8228e730 t fetch_ip_params +ffffffff8228ebd0 t fetch_pipe_params +ffffffff8228fc50 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff8228fcd0 T get_clk_dcf_deepsleep +ffffffff8228fde0 T get_wm_urgent +ffffffff8228fef0 T get_wm_memory_trip +ffffffff82290000 T get_wm_writeback_urgent +ffffffff82290110 T get_wm_stutter_exit +ffffffff82290220 T get_wm_stutter_enter_exit +ffffffff82290330 T get_wm_z8_stutter_exit +ffffffff82290440 T get_wm_z8_stutter_enter_exit +ffffffff82290550 T get_stutter_efficiency_z8 +ffffffff82290660 T get_stutter_num_bursts_z8 +ffffffff82290770 T get_wm_dram_clock_change +ffffffff82290880 T get_wm_writeback_dram_clock_change +ffffffff82290990 T get_stutter_efficiency +ffffffff82290aa0 T get_stutter_efficiency_no_vblank +ffffffff82290bb0 T get_stutter_period +ffffffff82290cc0 T get_urgent_latency +ffffffff82290dd0 T get_urgent_extra_latency +ffffffff82290ee0 T get_nonurgent_latency +ffffffff82290ff0 T get_dram_clock_change_latency +ffffffff82291100 T get_dispclk_calculated +ffffffff82291210 T get_total_data_read_bw +ffffffff82291320 T get_return_bw +ffffffff82291430 T get_tcalc +ffffffff82291540 T get_fraction_of_urgent_bandwidth +ffffffff82291650 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff82291760 T get_cstate_max_cap_mode +ffffffff82291880 T get_comp_buffer_size_kbytes +ffffffff82291990 T get_pixel_chunk_size_in_kbyte +ffffffff82291ab0 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff82291bd0 T get_meta_chunk_size_in_kbyte +ffffffff82291cf0 T get_min_pixel_chunk_size_in_byte +ffffffff82291e00 T get_min_meta_chunk_size_in_byte +ffffffff82291f20 T get_fclk_watermark +ffffffff82292030 T get_usr_retraining_watermark +ffffffff82292140 T get_comp_buffer_reserved_space_kbytes +ffffffff82292260 T get_comp_buffer_reserved_space_64bytes +ffffffff82292380 T get_comp_buffer_reserved_space_zs +ffffffff822924a0 T get_unbounded_request_enabled +ffffffff822925c0 T get_dsc_delay +ffffffff822926f0 T get_dppclk_calculated +ffffffff82292810 T get_dscclk_calculated +ffffffff82292930 T get_min_ttu_vblank +ffffffff82292a50 T get_min_ttu_vblank_in_us +ffffffff82292b70 T get_vratio_prefetch_l +ffffffff82292c90 T get_vratio_prefetch_c +ffffffff82292db0 T get_dst_x_after_scaler +ffffffff82292ed0 T get_dst_y_after_scaler +ffffffff82292ff0 T get_dst_y_per_vm_vblank +ffffffff82293110 T get_dst_y_per_row_vblank +ffffffff82293230 T get_dst_y_prefetch +ffffffff82293350 T get_dst_y_per_vm_flip +ffffffff82293470 T get_dst_y_per_row_flip +ffffffff82293590 T get_refcyc_per_vm_group_vblank +ffffffff822936b0 T get_refcyc_per_vm_group_flip +ffffffff822937d0 T get_refcyc_per_vm_req_vblank +ffffffff822938f0 T get_refcyc_per_vm_req_flip +ffffffff82293a10 T get_refcyc_per_vm_group_vblank_in_us +ffffffff82293b30 T get_refcyc_per_vm_group_flip_in_us +ffffffff82293c50 T get_refcyc_per_vm_req_vblank_in_us +ffffffff82293d70 T get_refcyc_per_vm_req_flip_in_us +ffffffff82293e90 T get_refcyc_per_vm_dmdata_in_us +ffffffff82293fb0 T get_dmdata_dl_delta_in_us +ffffffff822940d0 T get_refcyc_per_line_delivery_l_in_us +ffffffff822941f0 T get_refcyc_per_line_delivery_c_in_us +ffffffff82294310 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff82294430 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff82294550 T get_refcyc_per_req_delivery_l_in_us +ffffffff82294670 T get_refcyc_per_req_delivery_c_in_us +ffffffff82294790 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff822948b0 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff822949d0 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff82294af0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff82294c10 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff82294d30 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff82294e50 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff82294f70 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff82295090 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff822951b0 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff822952d0 T get_vstartup +ffffffff82295400 T get_vupdate_offset +ffffffff82295530 T get_vupdate_width +ffffffff82295650 T get_vready_offset +ffffffff82295770 T get_vready_at_or_after_vsync +ffffffff822958a0 T get_min_dst_y_next_start +ffffffff822959d0 T get_dst_y_per_pte_row_nom_l +ffffffff82295af0 T get_dst_y_per_pte_row_nom_c +ffffffff82295c10 T get_dst_y_per_meta_row_nom_l +ffffffff82295d30 T get_dst_y_per_meta_row_nom_c +ffffffff82295e50 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff82295f70 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff82296090 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff822961b0 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff822962d0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff822963f0 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff82296510 T get_vstartup_calculated +ffffffff82296640 T get_dpte_row_height_linear_c +ffffffff82296770 T get_swath_height_l +ffffffff822968a0 T get_swath_height_c +ffffffff822969d0 T get_det_stored_buffer_size_l_bytes +ffffffff82296b00 T get_det_stored_buffer_size_c_bytes +ffffffff82296c30 T get_dpte_group_size_in_bytes +ffffffff82296d60 T get_vm_group_size_in_bytes +ffffffff82296e90 T get_dpte_row_height_linear_l +ffffffff82296fc0 T get_pte_buffer_mode +ffffffff822970f0 T get_subviewport_lines_needed_in_mall +ffffffff82297220 T get_surface_size_in_mall +ffffffff82297350 T get_total_immediate_flip_bytes +ffffffff82297470 T get_total_immediate_flip_bw +ffffffff82297650 T get_total_prefetch_bw +ffffffff82297830 T get_total_surface_size_in_mall_bytes +ffffffff822979d0 T get_det_buffer_size_kbytes +ffffffff82297b00 T get_is_phantom_pipe +ffffffff82297c30 T Calculate256BBlockSizes +ffffffff82297d20 T CalculateMinAndMaxPrefetchMode +ffffffff82297da0 T ModeSupportAndSystemConfiguration +ffffffff822980b0 T CalculateWriteBackDISPCLK +ffffffff82299000 T print__rq_params_st +ffffffff82299030 T print__data_rq_sizing_params_st +ffffffff82299060 T print__data_rq_dlg_params_st +ffffffff82299090 T print__data_rq_misc_params_st +ffffffff822990c0 T print__rq_dlg_params_st +ffffffff822990f0 T print__dlg_sys_params_st +ffffffff82299120 T print__data_rq_regs_st +ffffffff82299150 T print__rq_regs_st +ffffffff82299180 T print__dlg_regs_st +ffffffff822991b0 T print__ttu_regs_st +ffffffff8229a000 T dml1_extract_rq_regs +ffffffff8229a330 T dml1_rq_dlg_get_rq_params +ffffffff8229a510 t get_surf_rq_param +ffffffff8229b0c0 T dml1_rq_dlg_get_dlg_params +ffffffff8229e000 T _do_calc_rc_params +ffffffff8229efc0 t get_qp_set +ffffffff822a0000 T dc_bandwidth_in_kbps_from_timing +ffffffff822a0290 T dc_dsc_stream_bandwidth_in_kbps +ffffffff822a03e0 T dc_dsc_parse_dsc_dpcd +ffffffff822a0680 t dsc_throughput_from_dpcd +ffffffff822a0840 T dc_dsc_compute_bandwidth_range +ffffffff822a0a30 t intersect_dsc_caps +ffffffff822a0c00 t setup_dsc_config +ffffffff822a13d0 T dc_dsc_compute_config +ffffffff822a14c0 T dc_dsc_stream_bandwidth_overhead_in_kbps +ffffffff822a1600 T dc_dsc_get_policy_for_timing +ffffffff822a16a0 T dc_dsc_policy_set_max_target_bpp_limit +ffffffff822a16d0 T dc_dsc_policy_set_enable_dsc_when_not_needed +ffffffff822a1700 T dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff822a1730 T dc_set_disable_128b_132b_stream_overhead +ffffffff822a1760 T dc_dsc_get_default_config_option +ffffffff822a17b0 t fit_num_slices_up +ffffffff822a1860 t decide_dsc_target_bpp_x16 +ffffffff822a2000 T calc_rc_params +ffffffff822a3000 T dscc_compute_dsc_parameters +ffffffff822a4000 T dal_hw_factory_dce110_init +ffffffff822a4060 t define_hpd_registers +ffffffff822a40b0 t define_ddc_registers +ffffffff822a5000 T dal_hw_translate_dce110_init +ffffffff822a5030 t offset_to_id +ffffffff822a5390 t id_to_offset +ffffffff822a6000 T dal_hw_factory_dce120_init +ffffffff822a6060 t define_hpd_registers +ffffffff822a60b0 t define_ddc_registers +ffffffff822a7000 T dal_hw_translate_dce120_init +ffffffff822a7030 t offset_to_id +ffffffff822a73a0 t id_to_offset +ffffffff822a8000 T dal_hw_factory_dce80_init +ffffffff822a8060 t define_hpd_registers +ffffffff822a80b0 t define_ddc_registers +ffffffff822a9000 T dal_hw_translate_dce80_init +ffffffff822a9030 t offset_to_id +ffffffff822a97b0 t id_to_offset +ffffffff822aa000 T dal_hw_factory_dcn10_init +ffffffff822aa060 t define_hpd_registers +ffffffff822aa0b0 t define_ddc_registers +ffffffff822aa150 t define_generic_registers +ffffffff822ab000 T dal_hw_translate_dcn10_init +ffffffff822ab030 t offset_to_id +ffffffff822ab390 t id_to_offset +ffffffff822ac000 T dal_hw_factory_dcn20_init +ffffffff822ac060 t define_hpd_registers +ffffffff822ac0b0 t define_ddc_registers +ffffffff822ac160 t define_generic_registers +ffffffff822ad000 T dal_hw_translate_dcn20_init +ffffffff822ad030 t offset_to_id +ffffffff822ad2b0 t id_to_offset +ffffffff822ae000 T dal_hw_factory_dcn21_init +ffffffff822ae060 t define_hpd_registers +ffffffff822ae0b0 t define_ddc_registers +ffffffff822ae160 t define_generic_registers +ffffffff822af000 T dal_hw_translate_dcn21_init +ffffffff822af030 t offset_to_id +ffffffff822af2b0 t id_to_offset +ffffffff822b0000 T dal_hw_factory_dcn30_init +ffffffff822b0060 t define_hpd_registers +ffffffff822b00b0 t define_ddc_registers +ffffffff822b0160 t define_generic_registers +ffffffff822b1000 T dal_hw_translate_dcn30_init +ffffffff822b1030 t offset_to_id +ffffffff822b12c0 t id_to_offset +ffffffff822b2000 T dal_hw_factory_dcn315_init +ffffffff822b2060 t define_hpd_registers +ffffffff822b20b0 t define_ddc_registers +ffffffff822b2160 t define_generic_registers +ffffffff822b3000 T dal_hw_translate_dcn315_init +ffffffff822b3030 t offset_to_id +ffffffff822b32b0 t id_to_offset +ffffffff822b4000 T dal_hw_factory_dcn32_init +ffffffff822b4060 t define_hpd_registers +ffffffff822b40b0 t define_ddc_registers +ffffffff822b4160 t define_generic_registers +ffffffff822b5000 T dal_hw_translate_dcn32_init +ffffffff822b5030 t offset_to_id +ffffffff822b5290 t id_to_offset +ffffffff822b6000 T dal_gpio_open +ffffffff822b60c0 T dal_gpio_open_ex +ffffffff822b6180 T dal_gpio_get_value +ffffffff822b6200 T dal_gpio_set_value +ffffffff822b6280 T dal_gpio_get_mode +ffffffff822b62b0 T dal_gpio_lock_pin +ffffffff822b62d0 T dal_gpio_unlock_pin +ffffffff822b62f0 T dal_gpio_change_mode +ffffffff822b6370 T dal_gpio_get_id +ffffffff822b63a0 T dal_gpio_get_enum +ffffffff822b63d0 T dal_gpio_set_config +ffffffff822b6450 T dal_gpio_get_pin_info +ffffffff822b64b0 T dal_gpio_get_sync_source +ffffffff822b6540 T dal_gpio_get_output_state +ffffffff822b6570 T dal_gpio_get_ddc +ffffffff822b65a0 T dal_gpio_get_hpd +ffffffff822b65d0 T dal_gpio_get_generic +ffffffff822b6600 T dal_gpio_close +ffffffff822b6650 T dal_gpio_create +ffffffff822b67e0 T dal_gpio_destroy +ffffffff822b7000 T dal_gpio_service_create +ffffffff822b7240 T dal_gpio_service_create_irq +ffffffff822b7300 T dal_gpio_create_irq +ffffffff822b7380 T dal_gpio_service_create_generic_mux +ffffffff822b7420 T dal_gpio_destroy_generic_mux +ffffffff822b74b0 T dal_gpio_get_generic_pin_info +ffffffff822b7510 T dal_gpio_service_destroy +ffffffff822b7640 T dal_mux_setup_config +ffffffff822b76a0 T dal_gpio_service_lock +ffffffff822b7720 T dal_gpio_service_unlock +ffffffff822b77a0 T dal_gpio_service_open +ffffffff822b79e0 T dal_gpio_service_close +ffffffff822b7a80 T dal_irq_get_source +ffffffff822b7af0 T dal_irq_get_rx_source +ffffffff822b7b40 T dal_irq_setup_hpd_filter +ffffffff822b7ba0 T dal_gpio_destroy_irq +ffffffff822b7c30 T dal_gpio_create_ddc +ffffffff822b7da0 T dal_gpio_destroy_ddc +ffffffff822b7e70 T dal_ddc_close +ffffffff822b7ec0 T dal_ddc_open +ffffffff822b8020 T dal_ddc_change_mode +ffffffff822b80c0 T dal_ddc_get_line +ffffffff822b80e0 T dal_ddc_set_config +ffffffff822b9000 T dal_hw_ddc_init +ffffffff822b9100 T dal_hw_ddc_get_pin +ffffffff822b9110 t dal_hw_ddc_destroy +ffffffff822b9170 t set_config +ffffffff822ba000 T dal_hw_factory_init +ffffffff822bb000 T dal_hw_generic_init +ffffffff822bb100 T dal_hw_generic_get_pin +ffffffff822bb110 t dal_hw_generic_destroy +ffffffff822bb170 t set_config +ffffffff822bc000 T dal_hw_gpio_open +ffffffff822bc0b0 T dal_hw_gpio_config_mode +ffffffff822bc1a0 T dal_hw_gpio_get_value +ffffffff822bc200 T dal_hw_gpio_set_value +ffffffff822bc290 T dal_hw_gpio_change_mode +ffffffff822bc2a0 T dal_hw_gpio_close +ffffffff822bc350 T dal_hw_gpio_construct +ffffffff822bc3b0 T dal_hw_gpio_destruct +ffffffff822bd000 T dal_hw_hpd_init +ffffffff822bd100 T dal_hw_hpd_get_pin +ffffffff822bd110 t dal_hw_hpd_destroy +ffffffff822bd170 t get_value +ffffffff822bd210 t set_config +ffffffff822be000 T dal_hw_translate_init +ffffffff822bf000 T dc_process_hdcp_msg +ffffffff822bf180 t hdmi_14_process_transaction +ffffffff822bf2d0 t dp_11_process_transaction +ffffffff822c0000 T dal_irq_service_dummy_set +ffffffff822c0050 T dal_irq_service_dummy_ack +ffffffff822c00a0 T dce110_vblank_set +ffffffff822c0170 T to_dal_irq_source_dce110 +ffffffff822c02f0 T dal_irq_service_dce110_create +ffffffff822c0370 t hpd_ack +ffffffff822c1000 T dal_irq_service_dce120_create +ffffffff822c1080 t hpd_ack +ffffffff822c2000 T dal_irq_service_dce80_create ffffffff822c2080 t hpd_ack -ffffffff822c3000 T dal_irq_service_dce80_create +ffffffff822c3000 T dal_irq_service_dcn10_create ffffffff822c3080 t hpd_ack -ffffffff822c4000 T dal_irq_service_dcn10_create +ffffffff822c3130 t to_dal_irq_source_dcn10 +ffffffff822c4000 T dal_irq_service_dcn20_create ffffffff822c4080 t hpd_ack -ffffffff822c4130 t to_dal_irq_source_dcn10 -ffffffff822c5000 T dal_irq_service_dcn20_create +ffffffff822c4130 t to_dal_irq_source_dcn20 +ffffffff822c5000 T dal_irq_service_dcn201_create ffffffff822c5080 t hpd_ack -ffffffff822c5130 t to_dal_irq_source_dcn20 -ffffffff822c6000 T dal_irq_service_dcn201_create +ffffffff822c5130 t to_dal_irq_source_dcn201 +ffffffff822c6000 T dal_irq_service_dcn21_create ffffffff822c6080 t hpd_ack -ffffffff822c6130 t to_dal_irq_source_dcn201 -ffffffff822c7000 T dal_irq_service_dcn21_create +ffffffff822c6130 t to_dal_irq_source_dcn21 +ffffffff822c7000 T dal_irq_service_dcn30_create ffffffff822c7080 t hpd_ack -ffffffff822c7130 t to_dal_irq_source_dcn21 -ffffffff822c8000 T dal_irq_service_dcn30_create +ffffffff822c7130 t to_dal_irq_source_dcn30 +ffffffff822c8000 T dal_irq_service_dcn302_create ffffffff822c8080 t hpd_ack -ffffffff822c8130 t to_dal_irq_source_dcn30 -ffffffff822c9000 T dal_irq_service_dcn302_create +ffffffff822c8130 t to_dal_irq_source_dcn302 +ffffffff822c9000 T dal_irq_service_dcn303_create ffffffff822c9080 t hpd_ack -ffffffff822c9130 t to_dal_irq_source_dcn302 -ffffffff822ca000 T dal_irq_service_dcn303_create +ffffffff822c9130 t to_dal_irq_source_dcn303 +ffffffff822ca000 T dal_irq_service_dcn31_create ffffffff822ca080 t hpd_ack -ffffffff822ca130 t to_dal_irq_source_dcn303 -ffffffff822cb000 T dal_irq_service_dcn31_create +ffffffff822ca130 t to_dal_irq_source_dcn31 +ffffffff822cb000 T dal_irq_service_dcn314_create ffffffff822cb080 t hpd_ack -ffffffff822cb130 t to_dal_irq_source_dcn31 -ffffffff822cc000 T dal_irq_service_dcn314_create +ffffffff822cb130 t to_dal_irq_source_dcn314 +ffffffff822cc000 T dal_irq_service_dcn315_create ffffffff822cc080 t hpd_ack -ffffffff822cc130 t to_dal_irq_source_dcn314 -ffffffff822cd000 T dal_irq_service_dcn315_create +ffffffff822cc130 t to_dal_irq_source_dcn315 +ffffffff822cd000 T dal_irq_service_dcn32_create ffffffff822cd080 t hpd_ack -ffffffff822cd130 t to_dal_irq_source_dcn315 -ffffffff822ce000 T dal_irq_service_dcn32_create -ffffffff822ce080 t hpd_ack -ffffffff822ce130 t to_dal_irq_source_dcn32 -ffffffff822cf000 T dal_irq_service_construct -ffffffff822cf070 T dal_irq_service_destroy -ffffffff822cf100 T dal_irq_service_set_generic -ffffffff822cf180 T dal_irq_service_set -ffffffff822cf330 T dal_irq_service_ack -ffffffff822cf4a0 T dal_irq_service_ack_generic -ffffffff822cf510 T dal_irq_service_to_irq_source -ffffffff822d0000 T dp_handle_automated_test -ffffffff822d0820 T dp_set_test_pattern -ffffffff822d0f00 t set_crtc_test_pattern -ffffffff822d1370 T dp_set_preferred_link_settings -ffffffff822d14c0 t dp_retrain_link_dp_test -ffffffff822d15c0 T dp_set_preferred_training_settings -ffffffff822d2000 T dp_trace_init -ffffffff822d20a0 T dp_trace_reset -ffffffff822d2130 T dp_trace_is_initialized -ffffffff822d2160 T dp_trace_detect_lt_init -ffffffff822d21b0 T dp_trace_commit_lt_init -ffffffff822d2200 T dp_trace_link_loss_increment -ffffffff822d2230 T dp_trace_lt_fail_count_update -ffffffff822d2270 T dp_trace_lt_total_count_increment -ffffffff822d22b0 T dp_trace_set_is_logged_flag -ffffffff822d22f0 T dp_trace_is_logged -ffffffff822d2330 T dp_trace_lt_result_update -ffffffff822d2370 T dp_trace_set_lt_start_timestamp -ffffffff822d2450 T dp_trace_set_lt_end_timestamp -ffffffff822d2530 T dp_trace_get_lt_end_timestamp -ffffffff822d2570 T dp_trace_get_lt_counts -ffffffff822d25b0 T dp_trace_get_link_loss_count -ffffffff822d25e0 T dp_trace_set_edp_power_timestamp -ffffffff822d26c0 T dp_trace_get_edp_poweron_timestamp -ffffffff822d26f0 T dp_trace_get_edp_poweroff_timestamp -ffffffff822d2720 T dp_trace_source_sequence -ffffffff822d3000 T dp_fpga_hpo_enable_link_and_stream -ffffffff822d4000 T set_dio_throttled_vcp_size -ffffffff822d4020 T setup_dio_stream_encoder -ffffffff822d4110 T reset_dio_stream_encoder -ffffffff822d41e0 T setup_dio_stream_attribute -ffffffff822d4380 T enable_dio_dp_link_output -ffffffff822d4410 T disable_dio_link_output -ffffffff822d4470 T set_dio_dp_link_test_pattern -ffffffff822d44d0 T set_dio_dp_lane_settings -ffffffff822d4510 T update_dio_stream_allocation_table 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T sdmmc_intr_disable -ffffffff826172f0 T sdmmc_intr_establish -ffffffff826173f0 T sdmmc_intr_disestablish -ffffffff826174e0 T sdmmc_card_intr -ffffffff82617530 T sdmmc_intr_task -ffffffff826175c0 T sdmmc_io_set_blocklen -ffffffff82618000 T sdmmc_mem_enable -ffffffff82618450 T sdmmc_mem_send_op_cond -ffffffff82618600 T sdmmc_mem_signal_voltage -ffffffff826186c0 T sdmmc_mem_scan -ffffffff826189d0 T sdmmc_decode_csd -ffffffff82618e00 T sdmmc_decode_cid -ffffffff826192a0 T sdmmc_mem_send_scr -ffffffff826193e0 T sdmmc_mem_decode_scr -ffffffff82619440 T sdmmc_mem_send_cxd_data -ffffffff826195b0 T sdmmc_mem_set_bus_width -ffffffff826196c0 T sdmmc_mem_sd_switch -ffffffff82619970 T sdmmc_be512_to_bitfield512 -ffffffff82619a20 T sdmmc_mem_mmc_switch -ffffffff82619b10 T sdmmc_mem_init -ffffffff82619c60 T sdmmc_mem_set_blocklen -ffffffff82619d60 T sdmmc_mem_sd_init -ffffffff8261a140 T sdmmc_mem_mmc_init -ffffffff8261a800 T sdmmc_mem_select_transfer_mode -ffffffff8261a880 T sdmmc_mem_execute_tuning -ffffffff8261a910 T sdmmc_mem_read_block_subr -ffffffff8261ac70 T sdmmc_mem_single_read_block -ffffffff8261ad40 T sdmmc_mem_read_block -ffffffff8261aef0 T sdmmc_mem_write_block_subr -ffffffff8261b240 T sdmmc_mem_single_write_block -ffffffff8261b310 T sdmmc_mem_write_block -ffffffff8261b4c0 T sdmmc_mem_hibernate_write -ffffffff8261c000 T sdmmc_scsi_cmd -ffffffff8261c1f0 T sdmmc_minphys -ffffffff8261c270 T sdmmc_scsi_attach -ffffffff8261c460 T sdmmc_alloc_ccbs -ffffffff8261c5a0 T sdmmc_free_ccbs -ffffffff8261c600 T sdmmc_scsi_detach -ffffffff8261c760 T sdmmc_stimeout -ffffffff8261c7e0 T sdmmc_ccb_alloc -ffffffff8261c890 T sdmmc_ccb_free -ffffffff8261c970 T sdmmc_inquiry -ffffffff8261cbe0 T sdmmc_start_xs -ffffffff8261ccd0 T sdmmc_complete_xs -ffffffff8261cda0 T sdmmc_done_xs -ffffffff8261cdf0 T sdmmc_scsi_hibernate_io -ffffffff8261d000 T bwfm_sdio_preinit -ffffffff8261d4a0 T bwfm_sdio_txcheck -ffffffff8261d4e0 T bwfm_sdio_txdata -ffffffff8261d550 T bwfm_sdio_txctl -ffffffff8261d6a0 T bwfm_sdio_buscore_read -ffffffff8261d6b0 T bwfm_sdio_buscore_write -ffffffff8261d6d0 T bwfm_sdio_buscore_prepare -ffffffff8261d810 T bwfm_sdio_buscore_activate -ffffffff8261d890 T bwfm_sdio_match -ffffffff8261d940 T bwfm_sdio_attach -ffffffff8261dc00 T bwfm_sdio_detach -ffffffff8261dc60 T bwfm_sdio_task -ffffffff8261ddc0 T bwfm_sdio_write_1 -ffffffff8261ddf0 T bwfm_sdio_read_1 -ffffffff8261de20 T bwfm_sdio_write_4 -ffffffff8261ded0 T bwfm_sdio_read_4 -ffffffff8261df80 T bwfm_sdio_load_microcode -ffffffff8261e1e0 T bwfm_sdio_clkctl -ffffffff8261e310 T bwfm_sdio_dev_write -ffffffff8261e360 T bwfm_sdio_intr -ffffffff8261e3a0 T bwfm_sdio_ram_read_write -ffffffff8261e5d0 T bwfm_sdio_htclk -ffffffff8261e840 T bwfm_sdio_readshared -ffffffff8261e910 T bwfm_sdio_dev_read -ffffffff8261e950 T bwfm_sdio_rx_frames -ffffffff8261ed00 T bwfm_sdio_tx_frames -ffffffff8261ee00 T bwfm_sdio_backplane -ffffffff8261eeb0 T bwfm_sdio_buf_read -ffffffff8261ef90 T bwfm_sdio_buf_write -ffffffff8261f040 T bwfm_sdio_frame_read_write -ffffffff8261f1c0 T bwfm_sdio_newbuf -ffffffff8261f240 T bwfm_sdio_tx_ok -ffffffff8261f2a0 T bwfm_sdio_tx_ctrlframe -ffffffff8261f3a0 T bwfm_sdio_tx_dataframe -ffffffff8261f4f0 T bwfm_sdio_rx_glom -ffffffff82620000 T onewire_match -ffffffff82620050 T onewire_attach -ffffffff826200f0 T onewire_detach -ffffffff82620160 T onewire_activate -ffffffff82620180 T onewire_scan -ffffffff826203a0 T onewire_createthread -ffffffff82620410 T onewire_print -ffffffff826204e0 T onewirebus_print -ffffffff82620530 T onewire_lock -ffffffff82620550 T onewire_unlock -ffffffff82620570 T onewire_reset -ffffffff82620590 T onewire_bit -ffffffff826205b0 T onewire_read_byte -ffffffff826206f0 T onewire_write_byte -ffffffff826207d0 T onewire_read_block -ffffffff82620870 T onewire_write_block -ffffffff82620910 T onewire_triplet -ffffffff826209f0 T onewire_matchrom -ffffffff82620b40 T onewire_search -ffffffff82620ee0 T onewire_thread -ffffffff82621000 T onewire_crc -ffffffff826210b0 T onewire_crc16 -ffffffff82621170 T onewire_famname -ffffffff826211b0 T onewire_matchbyfam -ffffffff82622000 T owid_match -ffffffff82622030 T owid_attach -ffffffff82622100 T owid_detach -ffffffff82622140 T owid_activate -ffffffff82623000 T owsbm_match -ffffffff82623030 T owsbm_attach -ffffffff826231d0 T owsbm_detach -ffffffff82623240 T owsbm_activate -ffffffff82623270 T owsbm_update -ffffffff82624000 T owtemp_match -ffffffff82624030 T owtemp_attach -ffffffff82624130 T owtemp_detach -ffffffff826241a0 T owtemp_activate -ffffffff826241d0 T owtemp_update -ffffffff82625000 T owctr_match -ffffffff82625030 T owctr_attach -ffffffff82625180 T owctr_detach -ffffffff826251f0 T owctr_activate -ffffffff82625220 T owctr_update -ffffffff82625250 T owctr_update_counter -ffffffff82626000 A __text_page_start -ffffffff82626000 T Xsyscall_meltdown -ffffffff8262600c T Xsyscall -ffffffff82626299 t Xsyscall_trampback -ffffffff826262b0 T intr_user_exit -ffffffff826262f2 t intr_user_exit_post_ast -ffffffff8262644b t Xiretq_trampback -ffffffff82626457 T doreti_iret -ffffffff82627000 T alltraps -ffffffff82627138 T recall_trap -ffffffff82627150 T alltraps_kern -ffffffff82627153 T alltraps_kern_meltdown -ffffffff82628000 ? Xtrap00 -ffffffff82628000 A __kutext_start -ffffffff82628000 A __text_page_end -ffffffff82628010 ? Xtrap01 -ffffffff82628020 ? Xtrap02 -ffffffff82628028 c calltrap_specstk -ffffffff826280f0 ? calltrap_specstk_tramp -ffffffff82628110 ? Xtrap03 -ffffffff82628120 ? Xtrap04 -ffffffff82628130 ? Xtrap05 -ffffffff82628140 ? Xtrap06 -ffffffff82628150 ? Xtrap07 -ffffffff82628160 ? Xtrap08 -ffffffff82628170 ? Xtrap09 -ffffffff82628180 ? Xtrap0a -ffffffff82628190 ? Xtrap0b -ffffffff826281a0 ? Xtrap0c -ffffffff826281b0 ? Xtrap0d -ffffffff82628240 ? Xtrap0e -ffffffff82628250 ? Xintrspurious -ffffffff82628250 ? Xtrap0f -ffffffff82628260 ? Xtrap10 -ffffffff82628270 ? Xtrap11 -ffffffff82628280 ? Xtrap12 -ffffffff82628290 ? Xtrap13 -ffffffff826282a0 ? Xtrap14 -ffffffff826282b0 ? Xtrap15 -ffffffff826282c0 ? Xtrap16 -ffffffff826282c0 ? Xtrap17 -ffffffff826282c0 ? Xtrap18 -ffffffff826282c0 ? Xtrap19 -ffffffff826282c0 ? Xtrap1a -ffffffff826282c0 ? Xtrap1b -ffffffff826282c0 ? Xtrap1c -ffffffff826282c0 ? Xtrap1d -ffffffff826282c0 ? Xtrap1e -ffffffff826282c0 ? Xtrap1f -ffffffff826282d0 ? x2apic_eoi -ffffffff826282f0 ? Xintr_lapic_ipi -ffffffff82628330 ? Xipi_invltlb -ffffffff82628360 ? Xipi_invlpg -ffffffff82628390 ? Xipi_invlrange -ffffffff826283d0 ? Xipi_invltlb_pcid -ffffffff82628410 ? Xipi_invlpg_pcid -ffffffff82628460 ? Xipi_invlrange_pcid -ffffffff826284d0 ? Xintr_lapic_ltimer -ffffffff82628510 ? Xintr_xen_upcall -ffffffff82628550 ? Xintr_hyperv_upcall -ffffffff82628590 ? Xintr_legacy0 -ffffffff826285d0 ? Xintr_legacy1 -ffffffff82628610 ? Xintr_legacy2 -ffffffff82628650 ? Xintr_legacy3 -ffffffff82628690 ? Xintr_legacy4 -ffffffff826286d0 ? Xintr_legacy5 -ffffffff82628710 ? Xintr_legacy6 -ffffffff82628750 ? Xintr_legacy7 -ffffffff82628790 ? Xintr_legacy8 -ffffffff826287d0 ? Xintr_legacy9 -ffffffff82628810 ? Xintr_legacy10 -ffffffff82628850 ? Xintr_legacy11 -ffffffff82628890 ? Xintr_legacy12 -ffffffff826288d0 ? Xintr_legacy13 -ffffffff82628910 ? Xintr_legacy14 -ffffffff82628950 ? Xintr_legacy15 -ffffffff82628990 ? Xintr_ioapic_edge0 -ffffffff826289d0 ? Xintr_ioapic_edge1 -ffffffff82628a10 ? Xintr_ioapic_edge2 -ffffffff82628a50 ? Xintr_ioapic_edge3 -ffffffff82628a90 ? Xintr_ioapic_edge4 -ffffffff82628ad0 ? Xintr_ioapic_edge5 -ffffffff82628b10 ? Xintr_ioapic_edge6 -ffffffff82628b50 ? Xintr_ioapic_edge7 -ffffffff82628b90 ? Xintr_ioapic_edge8 -ffffffff82628bd0 ? Xintr_ioapic_edge9 -ffffffff82628c10 ? Xintr_ioapic_edge10 -ffffffff82628c50 ? Xintr_ioapic_edge11 -ffffffff82628c90 ? Xintr_ioapic_edge12 -ffffffff82628cd0 ? Xintr_ioapic_edge13 -ffffffff82628d10 ? Xintr_ioapic_edge14 -ffffffff82628d50 ? Xintr_ioapic_edge15 -ffffffff82628d90 ? Xintr_ioapic_edge16 -ffffffff82628dd0 ? Xintr_ioapic_edge17 -ffffffff82628e10 ? Xintr_ioapic_edge18 -ffffffff82628e50 ? Xintr_ioapic_edge19 -ffffffff82628e90 ? Xintr_ioapic_edge20 -ffffffff82628ed0 ? Xintr_ioapic_edge21 -ffffffff82628f10 ? Xintr_ioapic_edge22 -ffffffff82628f50 ? Xintr_ioapic_edge23 -ffffffff82628f90 ? Xintr_ioapic_edge24 -ffffffff82628fd0 ? Xintr_ioapic_edge25 -ffffffff82629010 ? Xintr_ioapic_edge26 -ffffffff82629050 ? Xintr_ioapic_edge27 -ffffffff82629090 ? Xintr_ioapic_edge28 -ffffffff826290d0 ? Xintr_ioapic_edge29 -ffffffff82629110 ? Xintr_ioapic_edge30 -ffffffff82629150 ? Xintr_ioapic_edge31 -ffffffff82629190 ? Xintr_ioapic_edge32 -ffffffff826291d0 ? Xintr_ioapic_edge33 -ffffffff82629210 ? Xintr_ioapic_edge34 -ffffffff82629250 ? Xintr_ioapic_edge35 -ffffffff82629290 ? Xintr_ioapic_edge36 -ffffffff826292d0 ? Xintr_ioapic_edge37 -ffffffff82629310 ? Xintr_ioapic_edge38 -ffffffff82629350 ? Xintr_ioapic_edge39 -ffffffff82629390 ? Xintr_ioapic_edge40 -ffffffff826293d0 ? Xintr_ioapic_edge41 -ffffffff82629410 ? Xintr_ioapic_edge42 -ffffffff82629450 ? Xintr_ioapic_edge43 -ffffffff82629490 ? Xintr_ioapic_edge44 -ffffffff826294d0 ? Xintr_ioapic_edge45 -ffffffff82629510 ? Xintr_ioapic_edge46 -ffffffff82629550 ? Xintr_ioapic_edge47 -ffffffff82629590 ? Xintr_ioapic_edge48 -ffffffff826295d0 ? Xintr_ioapic_edge49 -ffffffff82629610 ? Xintr_ioapic_edge50 -ffffffff82629650 ? Xintr_ioapic_edge51 -ffffffff82629690 ? Xintr_ioapic_edge52 -ffffffff826296d0 ? Xintr_ioapic_edge53 -ffffffff82629710 ? Xintr_ioapic_edge54 -ffffffff82629750 ? Xintr_ioapic_edge55 -ffffffff82629790 ? Xintr_ioapic_edge56 -ffffffff826297d0 ? Xintr_ioapic_edge57 -ffffffff82629810 ? Xintr_ioapic_edge58 -ffffffff82629850 ? Xintr_ioapic_edge59 -ffffffff82629890 ? Xintr_ioapic_edge60 -ffffffff826298d0 ? Xintr_ioapic_edge61 -ffffffff82629910 ? Xintr_ioapic_edge62 -ffffffff82629950 ? Xintr_ioapic_edge63 -ffffffff82629990 ? Xintr_ioapic_level0 -ffffffff826299d0 ? Xintr_ioapic_level1 -ffffffff82629a10 ? Xintr_ioapic_level2 -ffffffff82629a50 ? Xintr_ioapic_level3 -ffffffff82629a90 ? Xintr_ioapic_level4 -ffffffff82629ad0 ? Xintr_ioapic_level5 -ffffffff82629b10 ? Xintr_ioapic_level6 -ffffffff82629b50 ? Xintr_ioapic_level7 -ffffffff82629b90 ? Xintr_ioapic_level8 -ffffffff82629bd0 ? Xintr_ioapic_level9 -ffffffff82629c10 ? Xintr_ioapic_level10 -ffffffff82629c50 ? Xintr_ioapic_level11 -ffffffff82629c90 ? Xintr_ioapic_level12 -ffffffff82629cd0 ? Xintr_ioapic_level13 -ffffffff82629d10 ? Xintr_ioapic_level14 -ffffffff82629d50 ? Xintr_ioapic_level15 -ffffffff82629d90 ? Xintr_ioapic_level16 -ffffffff82629dd0 ? Xintr_ioapic_level17 -ffffffff82629e10 ? Xintr_ioapic_level18 -ffffffff82629e50 ? Xintr_ioapic_level19 -ffffffff82629e90 ? Xintr_ioapic_level20 -ffffffff82629ed0 ? Xintr_ioapic_level21 -ffffffff82629f10 ? Xintr_ioapic_level22 -ffffffff82629f50 ? Xintr_ioapic_level23 -ffffffff82629f90 ? Xintr_ioapic_level24 -ffffffff82629fd0 ? Xintr_ioapic_level25 -ffffffff8262a010 ? Xintr_ioapic_level26 -ffffffff8262a050 ? Xintr_ioapic_level27 -ffffffff8262a090 ? Xintr_ioapic_level28 -ffffffff8262a0d0 ? Xintr_ioapic_level29 -ffffffff8262a110 ? Xintr_ioapic_level30 -ffffffff8262a150 ? Xintr_ioapic_level31 -ffffffff8262a190 ? Xintr_ioapic_level32 -ffffffff8262a1d0 ? Xintr_ioapic_level33 -ffffffff8262a210 ? Xintr_ioapic_level34 -ffffffff8262a250 ? Xintr_ioapic_level35 -ffffffff8262a290 ? Xintr_ioapic_level36 -ffffffff8262a2d0 ? Xintr_ioapic_level37 -ffffffff8262a310 ? Xintr_ioapic_level38 -ffffffff8262a350 ? Xintr_ioapic_level39 -ffffffff8262a390 ? Xintr_ioapic_level40 -ffffffff8262a3d0 ? Xintr_ioapic_level41 -ffffffff8262a410 ? Xintr_ioapic_level42 -ffffffff8262a450 ? Xintr_ioapic_level43 -ffffffff8262a490 ? Xintr_ioapic_level44 -ffffffff8262a4d0 ? Xintr_ioapic_level45 -ffffffff8262a510 ? Xintr_ioapic_level46 -ffffffff8262a550 ? Xintr_ioapic_level47 -ffffffff8262a590 ? Xintr_ioapic_level48 -ffffffff8262a5d0 ? Xintr_ioapic_level49 -ffffffff8262a610 ? Xintr_ioapic_level50 -ffffffff8262a650 ? Xintr_ioapic_level51 -ffffffff8262a690 ? Xintr_ioapic_level52 -ffffffff8262a6d0 ? Xintr_ioapic_level53 -ffffffff8262a710 ? Xintr_ioapic_level54 -ffffffff8262a750 ? Xintr_ioapic_level55 -ffffffff8262a790 ? Xintr_ioapic_level56 -ffffffff8262a7d0 ? Xintr_ioapic_level57 -ffffffff8262a810 ? Xintr_ioapic_level58 -ffffffff8262a850 ? Xintr_ioapic_level59 -ffffffff8262a890 ? Xintr_ioapic_level60 -ffffffff8262a8d0 ? Xintr_ioapic_level61 -ffffffff8262a910 ? Xintr_ioapic_level62 -ffffffff8262a950 ? Xintr_ioapic_level63 -ffffffff8262b000 ? codepatch_fill_nop -ffffffff8262b000 A __cptext_start -ffffffff8262b000 A __kutext_end -ffffffff8262b0b0 ? codepatch_maprw -ffffffff8262b190 ? codepatch_unmaprw -ffffffff8262b200 ? codepatch_nop -ffffffff8262b360 ? codepatch_replace -ffffffff8262b510 ? codepatch_call -ffffffff8262b530 ? codepatch_control_flow -ffffffff8262b740 ? codepatch_jmp -ffffffff8262c000 A __cptext_end -ffffffff8262c000 A __rodata_start -ffffffff8262c000 C _etext -ffffffff8262c000 C etext -ffffffff8262d000 r seeprom_read -ffffffff8262d004 r icl_mg_pll_find_divisors.div1_vals -ffffffff8262d034 r athn_ac2qid -ffffffff8262d034 r athn_ac2qid -ffffffff8262d034 r athn_ac2qid -ffffffff8262d040 r rtwn_get_rssi.cckoff -ffffffff8262d068 r rsu_ac2qid -ffffffff8262d078 r pckbc_portcmd -ffffffff8262d07c r tht_fifo_write_pad.pad -ffffffff8262d084 r rsu_get_rssi.cckoff -ffffffff8262d0a4 r adlp_n_revids -ffffffff8262d0e8 r apple_iso_trans -ffffffff8262d0f0 r wihap_check_tx.txratetable -ffffffff8262d0f4 r dmamode -ffffffff8262d118 r gen9_edram_size_mb.sets -ffffffff8262d12c r dg2_g12_revid_step_tbl -ffffffff8262e000 r isomappings -ffffffff8262e080 r unimappings -ffffffff8262e230 r replacements -ffffffff82631b3d r apollo_pio_rec -ffffffff8267f949 r apollo_udma33_tim -ffffffff8269504b r pp_r600_decoded_lanes -ffffffff826cbfb8 r cmd680_setup_channel.udma_tbl -ffffffff826d45a3 r apollo_udma100_tim -ffffffff826d45a9 r cmd0646_9_tim_udma -ffffffff826e2f4d r substchar -ffffffff8273a4a0 r apollo_udma133_tim -ffffffff8273a4a7 r apollo_udma66_tim -ffffffff8273a4d1 r cy_pio_rec -ffffffff8273fd60 R drm_ca -ffffffff8273fd88 R drm_filtops -ffffffff8273fdb8 R drmread_filtops -ffffffff82740000 r vga_emulops -ffffffff82740048 R vga_stdscreen -ffffffff82740078 R vga_stdscreen_mono -ffffffff827400a8 R vga_stdscreen_bf -ffffffff827400d8 R vga_40lscreen -ffffffff82740108 R vga_40lscreen_mono -ffffffff82740138 R vga_40lscreen_bf -ffffffff82740168 R vga_50lscreen -ffffffff82740198 R vga_50lscreen_mono -ffffffff827401c8 R vga_50lscreen_bf -ffffffff827401f8 R vga_screenlist -ffffffff82740208 R vga_screenlist_mono -ffffffff82740218 R vga_accessops -ffffffff82740278 r i945_wm_info -ffffffff827402b8 r bgansitopc -ffffffff827402c0 r pctoansi -ffffffff82740300 r sdma_offsets -ffffffff82740300 r sdma_offsets -ffffffff82740338 r iha_rate_tbl -ffffffff82740370 r i830_a_wm_info -ffffffff827403a8 r gen9_edram_size_mb.ways -ffffffff82740408 r aggr_periodic_times -ffffffff82740500 r michael_final.pad -ffffffff82740528 r rt_copysa.maskarray -ffffffff82740530 r i915_wm_info -ffffffff82740538 r amdgpu_ih_clientid_jpeg -ffffffff82740538 r amdgpu_ih_clientid_uvds -ffffffff82740538 r amdgpu_ih_clientid_vcns -ffffffff82740538 r amdgpu_ih_clientid_vcns -ffffffff82740538 r amdgpu_ih_clientid_vcns -ffffffff82740568 r jsl_ehl_revids -ffffffff82740578 r vga_setfontset.cmaptabb -ffffffff827405e8 r i830_bc_wm_info -ffffffff82740650 r hsw_activate_psr2.map -ffffffff82740658 r tgl_revids -ffffffff82740690 r __drm_universal_plane_init.default_modifiers -ffffffff827406a0 r iwn_tid2fifo -ffffffff827406b8 r vga_setfontset.cmaptaba -ffffffff827406c0 r crtc_offsets -ffffffff827406c0 r crtc_offsets -ffffffff827406c0 r crtc_offsets -ffffffff82740768 r rtwn_r88e_get_rssi.cckoff -ffffffff82741000 R edid_vendors -ffffffff827412c0 R edid_nvendors -ffffffff827412d0 R edid_products -ffffffff82741330 R edid_nproducts -ffffffff82741340 r _edid_modes -ffffffff82742000 R videomode_list -ffffffff82743080 R videomode_count -ffffffff82744000 r ahc_hard_errors -ffffffff82744080 r critical_sections -ffffffff827440b0 r patches -ffffffff82744d50 r seqprog -ffffffff82746000 r ahc_switch -ffffffff82747000 r termstat_strings -ffffffff82747020 r critical_sections -ffffffff82747060 r seqprog -ffffffff82747d50 r patches -ffffffff82749000 r ahd_switch -ffffffff8274a000 R aic_switch -ffffffff8274b000 R adw_switch -ffffffff8274c000 R gdt_switch -ffffffff8274d000 R twe_switch -ffffffff8274e000 R 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dmub_dcn20_is_hw_init +ffffffff822ffdb0 T dmub_dcn20_is_supported +ffffffff822ffe10 T dmub_dcn20_set_gpint +ffffffff822ffe40 T dmub_dcn20_is_gpint_acked +ffffffff822ffea0 T dmub_dcn20_get_gpint_response +ffffffff822ffed0 T dmub_dcn20_get_fw_boot_status +ffffffff822fff00 T dmub_dcn20_enable_dmub_boot_options +ffffffff822fff30 T dmub_dcn20_skip_dmub_panel_power_sequence +ffffffff822fff90 T dmub_dcn20_get_current_time +ffffffff822fffc0 T dmub_dcn20_get_diagnostic_data +ffffffff82301000 T dmub_dcn30_backdoor_load +ffffffff82301270 T dmub_dcn30_setup_windows +ffffffff82302000 T dmub_dcn31_reset +ffffffff82302280 T dmub_dcn31_reset_release +ffffffff82302350 T dmub_dcn31_backdoor_load +ffffffff823025c0 T dmub_dcn31_setup_windows +ffffffff82302910 T dmub_dcn31_setup_mailbox +ffffffff82302960 T dmub_dcn31_get_inbox1_wptr +ffffffff82302990 T dmub_dcn31_get_inbox1_rptr +ffffffff823029c0 T dmub_dcn31_set_inbox1_wptr +ffffffff823029f0 T dmub_dcn31_setup_out_mailbox +ffffffff82302a40 T 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dmub_dcn32_setup_outbox0 +ffffffff82305fe0 T dmub_dcn32_get_outbox0_wptr +ffffffff82306010 T dmub_dcn32_set_outbox0_rptr +ffffffff82306040 T dmub_dcn32_get_current_time +ffffffff82306070 T dmub_dcn32_get_diagnostic_data +ffffffff82306550 T dmub_dcn32_configure_dmub_in_system_memory +ffffffff82306580 T dmub_dcn32_send_inbox0_cmd +ffffffff823065b0 T dmub_dcn32_clear_inbox0_ack_register +ffffffff823065e0 T dmub_dcn32_read_inbox0_ack_register +ffffffff82307000 T dmub_reg_update +ffffffff82307150 T dmub_reg_set +ffffffff823072b0 T dmub_reg_get +ffffffff82308000 T dmub_flush_buffer_mem +ffffffff82308030 T dmub_srv_create +ffffffff823085b0 T dmub_srv_destroy +ffffffff823085d0 T dmub_srv_calc_region_info +ffffffff823089c0 T dmub_srv_calc_mem_info +ffffffff82308b80 T dmub_srv_has_hw_support +ffffffff82308bf0 T dmub_srv_is_hw_init +ffffffff82308c70 T dmub_srv_hw_init +ffffffff823090d0 T dmub_srv_sync_inbox1 +ffffffff82309180 T dmub_srv_hw_reset +ffffffff82309210 T dmub_srv_cmd_queue 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mod_freesync_build_vrr_infopacket +ffffffff82312900 T mod_freesync_build_vrr_params +ffffffff82312cc0 T mod_freesync_calc_nominal_field_rate +ffffffff82312d20 T mod_freesync_handle_preflip +ffffffff82313150 T mod_freesync_handle_v_update +ffffffff82313600 T mod_freesync_get_settings +ffffffff82313670 T mod_freesync_calc_field_rate_from_timing +ffffffff823136c0 T mod_freesync_get_freesync_enabled +ffffffff823136f0 T mod_freesync_is_valid_range +ffffffff82314000 T mod_hdcp_get_memory_size +ffffffff82314030 T mod_hdcp_setup +ffffffff823140b0 t reset_connection +ffffffff82314220 t push_error_status +ffffffff82314330 T mod_hdcp_teardown +ffffffff823143b0 T mod_hdcp_add_display +ffffffff82314660 t reset_authentication +ffffffff82314850 t set_state_id +ffffffff823148f0 T mod_hdcp_remove_display +ffffffff82314af0 T mod_hdcp_update_display +ffffffff82314e50 T mod_hdcp_query_display +ffffffff82314fa0 T mod_hdcp_reset_connection +ffffffff82315000 T mod_hdcp_process_event +ffffffff823157e0 T mod_hdcp_signal_type_to_operation_mode +ffffffff82316000 T mod_hdcp_execute_and_set +ffffffff823160b0 T mod_hdcp_hdcp1_execution +ffffffff82316300 t exchange_ksvs +ffffffff82316660 t computations_validate_rx_test_for_repeater +ffffffff82316930 t wait_for_ready +ffffffff82316be0 t read_ksv_list +ffffffff823171d0 T mod_hdcp_hdcp1_dp_execution +ffffffff82318000 T mod_hdcp_hdcp1_transition +ffffffff82318310 t set_state_id +ffffffff823183b0 T mod_hdcp_hdcp1_dp_transition +ffffffff82319000 T mod_hdcp_hdcp2_execution +ffffffff82319580 t locality_check +ffffffff823197b0 t enable_encryption +ffffffff823198a0 t verify_rx_id_list_and_send_ack +ffffffff823199a0 t send_stream_management +ffffffff82319a80 t validate_stream_ready +ffffffff82319ba0 T mod_hdcp_hdcp2_dp_execution +ffffffff8231a1a0 t check_hdcp2_capable +ffffffff8231a200 t check_ake_cert_available +ffffffff8231a270 t check_h_prime_available +ffffffff8231a2e0 t check_pairing_info_available +ffffffff8231a350 t poll_l_prime_available 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mod_hdcp_read_pairing_info +ffffffff8231cb10 T mod_hdcp_read_l_prime +ffffffff8231cbd0 T mod_hdcp_read_rx_id_list +ffffffff8231cd40 T mod_hdcp_read_stream_ready +ffffffff8231ce00 T mod_hdcp_write_ake_init +ffffffff8231ceb0 T mod_hdcp_write_no_stored_km +ffffffff8231d080 T mod_hdcp_write_stored_km +ffffffff8231d180 T mod_hdcp_write_lc_init +ffffffff8231d230 T mod_hdcp_write_eks +ffffffff8231d320 T mod_hdcp_write_repeater_auth_ack +ffffffff8231d3d0 T mod_hdcp_write_stream_manage +ffffffff8231d4c0 T mod_hdcp_write_content_type +ffffffff8231d530 T mod_hdcp_clear_cp_irq_status +ffffffff8231e000 T mod_hdcp_dump_binary_message +ffffffff8231e0e0 T mod_hdcp_log_ddc_trace +ffffffff8231f080 T mod_hdcp_status_to_str +ffffffff8231f0c0 T mod_hdcp_state_id_to_str +ffffffff82320000 T mod_hdcp_remove_display_from_topology +ffffffff82320200 t remove_display_from_topology_v2 +ffffffff823203b0 T mod_hdcp_add_display_to_topology +ffffffff82320570 t add_display_to_topology_v2 +ffffffff823206d0 T mod_hdcp_hdcp1_create_session +ffffffff82320850 T mod_hdcp_hdcp1_destroy_session +ffffffff82320ac0 T mod_hdcp_hdcp1_validate_rx +ffffffff82320be0 T mod_hdcp_hdcp1_enable_encryption +ffffffff82320d40 T mod_hdcp_hdcp1_validate_ksvlist_vp +ffffffff82320e70 T mod_hdcp_hdcp1_enable_dp_stream_encryption +ffffffff82320fb0 T mod_hdcp_hdcp1_link_maintenance +ffffffff82321070 T mod_hdcp_hdcp2_create_session +ffffffff823211e0 T mod_hdcp_hdcp2_destroy_session +ffffffff82321450 T mod_hdcp_hdcp2_prepare_ake_init +ffffffff82321550 T mod_hdcp_hdcp2_validate_ake_cert +ffffffff82321700 T mod_hdcp_hdcp2_validate_h_prime +ffffffff82321880 T mod_hdcp_hdcp2_prepare_lc_init +ffffffff82321980 T mod_hdcp_hdcp2_validate_l_prime +ffffffff82321aa0 T mod_hdcp_hdcp2_prepare_eks +ffffffff82321bf0 T mod_hdcp_hdcp2_enable_encryption +ffffffff82321d60 T mod_hdcp_hdcp2_validate_rx_id_list +ffffffff82321ee0 T mod_hdcp_hdcp2_enable_dp_stream_encryption +ffffffff82322050 T mod_hdcp_hdcp2_prepare_stream_management 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T amdgpu_dpm_set_gfx_power_up_by_imu +ffffffff82327310 T amdgpu_dpm_baco_enter +ffffffff823273a0 T amdgpu_dpm_baco_exit +ffffffff82327430 T amdgpu_dpm_set_mp1_state +ffffffff823274d0 T amdgpu_dpm_is_baco_supported +ffffffff82327580 T amdgpu_dpm_mode2_reset +ffffffff82327610 T amdgpu_dpm_enable_gfx_features +ffffffff823276a0 T amdgpu_dpm_baco_reset +ffffffff82327750 T amdgpu_dpm_is_mode1_reset_supported +ffffffff823277c0 T amdgpu_dpm_mode1_reset +ffffffff82327840 T amdgpu_dpm_switch_power_profile +ffffffff823278f0 T amdgpu_dpm_set_xgmi_pstate +ffffffff82327990 T amdgpu_dpm_set_df_cstate +ffffffff82327a30 T amdgpu_dpm_allow_xgmi_power_down +ffffffff82327ab0 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff82327b40 T amdgpu_dpm_set_clockgating_by_smu +ffffffff82327be0 T amdgpu_dpm_smu_i2c_bus_access +ffffffff82327c80 T amdgpu_pm_acpi_event_handler +ffffffff82327d40 T amdgpu_dpm_read_sensor +ffffffff82327e00 T amdgpu_dpm_get_apu_thermal_limit +ffffffff82327ea0 T amdgpu_dpm_set_apu_thermal_limit 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+ffffffff82329cc0 T amdgpu_dpm_get_gpu_metrics +ffffffff82329d50 T amdgpu_dpm_get_fan_control_mode +ffffffff82329de0 T amdgpu_dpm_set_fan_speed_pwm +ffffffff82329e70 T amdgpu_dpm_get_fan_speed_pwm +ffffffff82329f00 T amdgpu_dpm_get_fan_speed_rpm +ffffffff82329f90 T amdgpu_dpm_set_fan_speed_rpm +ffffffff8232a020 T amdgpu_dpm_set_fan_control_mode +ffffffff8232a0b0 T amdgpu_dpm_get_power_limit +ffffffff8232a160 T amdgpu_dpm_set_power_limit +ffffffff8232a1f0 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff8232a260 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff8232a2f0 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff8232a390 T amdgpu_dpm_is_overdrive_supported +ffffffff8232a400 T amdgpu_dpm_set_pp_table +ffffffff8232a4a0 T amdgpu_dpm_get_num_cpu_cores +ffffffff8232a4f0 T amdgpu_dpm_stb_debug_fs_init +ffffffff8232a540 T amdgpu_dpm_display_configuration_change +ffffffff8232a5d0 T amdgpu_dpm_get_clock_by_type +ffffffff8232a670 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff8232a700 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff8232a7a0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff8232a840 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff8232a8d0 T amdgpu_dpm_display_clock_voltage_request +ffffffff8232a960 T amdgpu_dpm_get_current_clocks +ffffffff8232a9f0 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff8232aa70 T amdgpu_dpm_set_active_display_count +ffffffff8232ab00 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff8232ab90 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff8232ac30 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff8232acd0 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff8232ad60 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff8232adf0 T amdgpu_dpm_get_uclk_dpm_states +ffffffff8232ae90 T amdgpu_dpm_get_dpm_clock_table +ffffffff8232b000 T amdgpu_dpm_get_active_displays +ffffffff8232b0a0 T amdgpu_dpm_get_vblank_time +ffffffff8232b150 T amdgpu_dpm_get_vrefresh +ffffffff8232c000 T amdgpu_pm_sysfs_init +ffffffff8232c030 T amdgpu_pm_sysfs_fini +ffffffff8232c060 T amdgpu_debugfs_pm_init +ffffffff8232d000 T amdgpu_dpm_print_class_info +ffffffff8232d2b0 T amdgpu_dpm_print_cap_info +ffffffff8232d340 T amdgpu_dpm_print_ps_status +ffffffff8232d3d0 T amdgpu_pm_print_power_states +ffffffff8232d460 T amdgpu_get_platform_caps +ffffffff8232d500 T amdgpu_parse_extended_power_table +ffffffff8232e290 t amdgpu_parse_clk_voltage_dep_table +ffffffff8232e340 T amdgpu_free_extended_power_table +ffffffff8232e450 T amdgpu_add_thermal_controller +ffffffff8232e8a0 T amdgpu_get_vce_clock_state +ffffffff8232e8e0 T amdgpu_legacy_dpm_compute_clocks +ffffffff8232ed70 T amdgpu_dpm_thermal_work_handler +ffffffff8232f000 t pp_early_init +ffffffff8232f100 t pp_late_init +ffffffff8232f220 t pp_sw_init +ffffffff8232f2b0 t pp_sw_fini +ffffffff8232f300 t pp_hw_init +ffffffff8232f360 t pp_hw_fini +ffffffff8232f3d0 t pp_late_fini +ffffffff8232f430 t pp_suspend +ffffffff8232f480 t pp_resume +ffffffff8232f4a0 t pp_is_idle +ffffffff8232f4d0 t pp_wait_for_idle +ffffffff8232f500 t pp_sw_reset +ffffffff8232f530 t pp_set_clockgating_state +ffffffff8232f560 t pp_set_powergating_state +ffffffff8232f590 t pp_dpm_set_fan_control_mode +ffffffff8232f600 t pp_dpm_get_fan_control_mode +ffffffff8232f670 t pp_dpm_set_fan_speed_pwm +ffffffff8232f6d0 t pp_dpm_get_fan_speed_pwm +ffffffff8232f730 t pp_dpm_force_clock_level +ffffffff8232f790 t pp_dpm_print_clock_levels +ffffffff8232f7f0 t pp_dpm_emit_clock_levels +ffffffff8232f850 t pp_dpm_force_performance_level +ffffffff8232f8f0 t pp_dpm_get_sclk_od +ffffffff8232f950 t pp_dpm_set_sclk_od +ffffffff8232f9b0 t pp_dpm_get_mclk_od +ffffffff8232fa10 t pp_dpm_set_mclk_od +ffffffff8232fa70 t pp_dpm_read_sensor +ffffffff8232fb30 t pp_dpm_get_performance_level +ffffffff8232fb70 t pp_dpm_get_current_power_state +ffffffff8232fbf0 t pp_dpm_get_fan_speed_rpm +ffffffff8232fc50 t pp_dpm_set_fan_speed_rpm +ffffffff8232fcb0 t pp_dpm_get_pp_num_states +ffffffff8232fdf0 t pp_dpm_get_pp_table +ffffffff8232fe40 t pp_dpm_set_pp_table +ffffffff8232ff70 t pp_dpm_switch_power_profile +ffffffff823300b0 t pp_dpm_get_vce_clock_state +ffffffff82330100 t pp_dpm_dispatch_tasks +ffffffff82330140 t pp_dpm_load_fw +ffffffff823301b0 t pp_dpm_fw_loading_complete +ffffffff823301e0 t pp_set_powergating_by_smu +ffffffff82330360 t pp_set_clockgating_by_smu +ffffffff823303d0 t pp_set_power_limit +ffffffff82330490 t pp_get_power_limit +ffffffff82330530 t pp_get_power_profile_mode +ffffffff82330590 t pp_set_power_profile_mode +ffffffff823305f0 t pp_set_fine_grain_clk_vol +ffffffff82330650 t pp_odn_edit_dpm_table +ffffffff823306b0 t pp_dpm_set_mp1_state +ffffffff82330710 t pp_smu_i2c_bus_access +ffffffff82330770 t pp_gfx_state_change_set +ffffffff823307d0 t pp_dpm_get_sclk +ffffffff82330820 t pp_dpm_get_mclk +ffffffff82330870 t pp_display_configuration_change +ffffffff823308c0 t pp_get_display_power_level +ffffffff82330900 t pp_get_current_clocks +ffffffff82330a20 t pp_get_clock_by_type +ffffffff82330a70 t pp_get_clock_by_type_with_latency +ffffffff82330ac0 t pp_get_clock_by_type_with_voltage +ffffffff82330b10 t pp_set_watermarks_for_clocks_ranges +ffffffff82330b50 t pp_display_clock_voltage_request +ffffffff82330b90 t pp_get_display_mode_validation_clocks +ffffffff82330bf0 t pp_notify_smu_enable_pwe +ffffffff82330c50 t pp_enable_mgpu_fan_boost +ffffffff82330cb0 t pp_set_active_display_count +ffffffff82330cf0 t pp_set_hard_min_dcefclk_by_freq +ffffffff82330d50 t pp_set_hard_min_fclk_by_freq +ffffffff82330db0 t pp_set_min_deep_sleep_dcefclk +ffffffff82330e10 t pp_get_asic_baco_capability +ffffffff82330e80 t pp_get_asic_baco_state +ffffffff82330ee0 t pp_set_asic_baco_state +ffffffff82330f50 t pp_get_ppfeature_status +ffffffff82330fb0 t pp_set_ppfeature_status +ffffffff82331000 t pp_asic_reset_mode_2 +ffffffff82331060 t pp_set_df_cstate +ffffffff823310c0 t pp_set_xgmi_pstate +ffffffff82331120 t pp_get_gpu_metrics +ffffffff82331180 t pp_get_prv_buffer_details +ffffffff82331200 t pp_pm_compute_clocks +ffffffff823312c0 t pp_swctf_delayed_work_handler +ffffffff82331410 t __delayed_work_tick +ffffffff82332000 T ci_baco_set_state +ffffffff82333000 T baco_program_registers +ffffffff823330d0 t baco_cmd_handler +ffffffff82333250 T soc15_baco_program_registers +ffffffff82334000 T fiji_baco_set_state +ffffffff82335000 T phm_setup_asic +ffffffff82335050 T phm_power_down_asic +ffffffff823350a0 T phm_set_power_state +ffffffff82335110 T phm_enable_dynamic_state_management +ffffffff823351c0 T phm_disable_dynamic_state_management +ffffffff82335260 T phm_force_dpm_levels +ffffffff823352b0 T phm_apply_state_adjust_rules +ffffffff82335300 T phm_apply_clock_adjust_rules +ffffffff82335350 T phm_powerdown_uvd +ffffffff823353a0 T phm_disable_clock_power_gatings +ffffffff823353f0 T phm_pre_display_configuration_changed +ffffffff82335450 T phm_display_configuration_changed +ffffffff823354b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff82335510 T phm_stop_thermal_controller +ffffffff82335570 T phm_register_irq_handlers +ffffffff823355c0 T phm_start_thermal_controller +ffffffff82335710 T phm_check_smc_update_required_for_display_configuration +ffffffff82335770 T phm_check_states_equal +ffffffff823357c0 T phm_store_dal_configuration_data +ffffffff82335910 T phm_get_dal_power_level +ffffffff82335970 T phm_set_cpu_power_state +ffffffff823359c0 T phm_get_performance_level +ffffffff82335a20 T phm_get_clock_info +ffffffff82335b90 T phm_get_current_shallow_sleep_clocks +ffffffff82335be0 T phm_get_clock_by_type +ffffffff82335c30 T phm_get_clock_by_type_with_latency +ffffffff82335c80 T phm_get_clock_by_type_with_voltage +ffffffff82335cd0 T phm_set_watermarks_for_clocks_ranges +ffffffff82335d20 T phm_display_clock_voltage_request +ffffffff82335d70 T phm_get_max_high_clocks +ffffffff82335dc0 T phm_disable_smc_firmware_ctf +ffffffff82335e20 T phm_set_active_display_count +ffffffff82336000 T hwmgr_early_init +ffffffff82336460 t polaris_set_asic_special_caps +ffffffff823364e0 T hwmgr_sw_init +ffffffff82336550 T hwmgr_sw_fini +ffffffff823365a0 T hwmgr_hw_init +ffffffff82336760 T hwmgr_hw_fini +ffffffff82336820 T hwmgr_suspend +ffffffff823368a0 T hwmgr_resume +ffffffff82336940 T hwmgr_handle_task +ffffffff82337000 T polaris_baco_set_state +ffffffff82338000 T pp_override_get_default_fuse_value +ffffffff82339000 T psm_init_power_state_table +ffffffff823392a0 T psm_fini_power_state_table +ffffffff82339360 T psm_set_boot_states +ffffffff82339410 T psm_set_performance_states +ffffffff823394c0 T psm_set_user_performance_state +ffffffff82339550 T psm_adjust_power_state_dynamic +ffffffff8233a000 T atomctrl_initialize_mc_reg_table +ffffffff8233a210 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff8233a420 T atomctrl_set_engine_dram_timings_rv770 +ffffffff8233a490 T atomctrl_get_memory_pll_dividers_si +ffffffff8233a570 T atomctrl_get_memory_pll_dividers_vi +ffffffff8233a5f0 T atomctrl_get_memory_pll_dividers_ai +ffffffff8233a6a0 T atomctrl_get_engine_pll_dividers_kong +ffffffff8233a720 T atomctrl_get_engine_pll_dividers_vi +ffffffff8233a7f0 T atomctrl_get_engine_pll_dividers_ai +ffffffff8233a8d0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff8233a990 T atomctrl_get_reference_clock +ffffffff8233a9f0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff8233aab0 T atomctrl_get_voltage_table_v3 +ffffffff8233ac10 T atomctrl_get_pp_assign_pin +ffffffff8233acf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff8233b0c0 t GetScaledFraction +ffffffff8233b150 t fDecodeLeakageID +ffffffff8233b1b0 t fSqrt +ffffffff8233b230 T atomctrl_get_voltage_evv_on_sclk +ffffffff8233b2b0 T atomctrl_get_voltage_evv +ffffffff8233b360 T atomctrl_get_mpll_reference_clock +ffffffff8233b3d0 T atomctrl_is_asic_internal_ss_supported +ffffffff8233b420 T atomctrl_get_memory_clock_spread_spectrum +ffffffff8233b520 T atomctrl_get_engine_clock_spread_spectrum +ffffffff8233b620 T atomctrl_read_efuse +ffffffff8233b6d0 T atomctrl_set_ac_timing_ai +ffffffff8233b730 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff8233b7b0 T atomctrl_get_smc_sclk_range_table +ffffffff8233b860 T atomctrl_get_vddc_shared_railinfo +ffffffff8233b8d0 T atomctrl_get_avfs_information +ffffffff8233ba60 T atomctrl_get_svi2_info +ffffffff8233bb40 T atomctrl_get_leakage_id_from_efuse +ffffffff8233bba0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff8233bd40 T atomctrl_get_voltage_range +ffffffff8233be00 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff8233be80 T atomctrl_get_edc_leakage_table +ffffffff8233c000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff8233c0c0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff8233c280 T pp_atomfwctrl_get_pp_assign_pin +ffffffff8233c360 T pp_atomfwctrl_enter_self_refresh +ffffffff8233c390 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff8233c440 T pp_atomfwctrl_get_avfs_information +ffffffff8233c780 T pp_atomfwctrl_get_gpio_information +ffffffff8233c820 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff8233c8b0 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff8233cc30 T pp_atomfwctrl_get_smc_dpm_information +ffffffff8233d000 T encode_pcie_lane_width +ffffffff8233d030 T decode_pcie_lane_width +ffffffff8233e000 t pp_tables_v1_0_initialize +ffffffff8233f450 t pp_tables_v1_0_uninitialize +ffffffff8233f600 T get_number_of_powerplay_table_entries_v1_0 +ffffffff8233f6b0 T get_powerplay_table_entry_v1_0 +ffffffff82340000 T pp_tables_get_response_times +ffffffff823400d0 T pp_tables_get_num_of_entries +ffffffff82340190 T pp_tables_get_entry +ffffffff823404a0 t init_non_clock_fields +ffffffff823405e0 t pp_tables_initialize +ffffffff82341760 t pp_tables_uninitialize +ffffffff82341960 t get_number_of_vce_state_table_entries +ffffffff82341a50 t get_vce_state_table_entry +ffffffff82342000 T smu10_init_function_pointers +ffffffff82342040 t smu10_hwmgr_backend_init +ffffffff823426e0 t smu10_hwmgr_backend_fini +ffffffff82342820 t smu10_setup_asic_task +ffffffff82342890 t smu10_get_power_state_size +ffffffff823428c0 t smu10_apply_state_adjust_rules +ffffffff823428f0 t smu10_dpm_force_dpm_level +ffffffff82342e70 t smu10_enable_dpm_tasks +ffffffff82342f30 t smu10_disable_dpm_tasks +ffffffff82342f60 t smu10_dpm_patch_boot_state +ffffffff82342f90 t smu10_dpm_get_pp_table_entry +ffffffff82342ff0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff82343040 t smu10_powergate_vcn +ffffffff823430e0 t smu10_dpm_get_mclk +ffffffff82343140 t smu10_dpm_get_sclk +ffffffff82343190 t smu10_set_power_state_tasks +ffffffff82343200 t smu10_set_cpu_power_state +ffffffff82343230 t smu10_store_cc6_data +ffffffff823432a0 t smu10_get_dal_power_level +ffffffff823432d0 t smu10_get_performance_level +ffffffff82343370 t smu10_get_current_shallow_sleep_clocks +ffffffff823433d0 t smu10_get_clock_by_type_with_latency +ffffffff82343520 t smu10_get_clock_by_type_with_voltage +ffffffff82343630 t smu10_set_watermarks_for_clocks_ranges +ffffffff82343700 t smu10_display_clock_voltage_request +ffffffff823437a0 t smu10_get_max_high_clocks +ffffffff823437d0 t smu10_power_off_asic +ffffffff82343820 t smu10_force_clock_level +ffffffff823439e0 t smu10_print_clock_levels +ffffffff82343dd0 t smu10_gfx_off_control +ffffffff82343ee0 t smu10_read_sensor +ffffffff82344070 t smu10_set_active_display_count +ffffffff823440d0 t smu10_set_min_deep_sleep_dcefclk +ffffffff82344130 t smu10_get_power_profile_mode +ffffffff82344170 t smu10_set_power_profile_mode +ffffffff823442a0 t smu10_set_fine_grain_clk_vol +ffffffff823444b0 t smu10_powergate_mmhub +ffffffff823444d0 t smu10_smus_notify_pwe +ffffffff823444f0 t smu10_powergate_sdma +ffffffff82344510 t smu10_set_hard_min_dcefclk_by_freq +ffffffff82344570 t smu10_set_hard_min_fclk_by_freq +ffffffff823445d0 t smu10_set_hard_min_gfxclk_by_freq +ffffffff82344630 t smu10_set_soft_max_gfxclk_by_freq +ffffffff82344690 t smu10_asic_reset +ffffffff823446b0 t smu10_gfx_state_change +ffffffff823446f0 t smu10_dpm_get_pp_table_entry_callback +ffffffff82345000 T smu7_baco_get_capability +ffffffff82345060 T smu7_baco_get_state +ffffffff823450b0 T smu7_baco_set_state +ffffffff82346000 T smu7_powerdown_uvd +ffffffff82346050 T smu7_disable_clock_power_gating +ffffffff823460e0 T smu7_powergate_uvd +ffffffff823461d0 T smu7_powergate_vce +ffffffff823462c0 T smu7_update_clock_gatings +ffffffff82346670 T smu7_powergate_gfx +ffffffff82347000 T smu7_get_sleep_divider_id_from_clock +ffffffff823470a0 T smu7_init_function_pointers +ffffffff82347100 t smu7_hwmgr_backend_init +ffffffff82348f80 t smu7_hwmgr_backend_fini +ffffffff82348ff0 t smu7_setup_asic_task +ffffffff82349360 t smu7_get_power_state_size +ffffffff82349390 t smu7_apply_state_adjust_rules +ffffffff82349830 t smu7_force_dpm_level +ffffffff82349d40 t smu7_enable_dpm_tasks +ffffffff8234c5d0 t smu7_disable_dpm_tasks +ffffffff8234cc10 t smu7_dpm_patch_boot_state +ffffffff8234cd50 t smu7_get_pp_table_entry +ffffffff8234d150 t smu7_get_number_of_powerplay_table_entries +ffffffff8234d1c0 t smu7_dpm_get_mclk +ffffffff8234d260 t smu7_dpm_get_sclk +ffffffff8234d300 t smu7_set_power_state_tasks +ffffffff8234e020 t smu7_notify_smc_display_config_after_ps_adjustment +ffffffff8234e050 t smu7_display_configuration_changed_task +ffffffff8234e210 t smu7_set_max_fan_rpm_output +ffffffff8234e240 t smu7_set_max_fan_pwm_output +ffffffff8234e260 t smu7_set_fan_control_mode +ffffffff8234e2f0 t smu7_get_fan_control_mode +ffffffff8234e330 t smu7_register_irq_handlers +ffffffff8234e3e0 t smu7_check_smc_update_required_for_display_configuration +ffffffff8234e490 t smu7_check_states_equal +ffffffff8234e630 t smu7_get_performance_level +ffffffff8234e6c0 t smu7_get_clock_by_type +ffffffff8234e880 t smu7_get_clock_by_type_with_latency +ffffffff8234ea50 t smu7_set_watermarks_for_clocks_ranges +ffffffff8234ec70 t smu7_get_max_high_clocks +ffffffff8234ecf0 t smu7_power_off_asic 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sienna_cichlid_print_clk_levels +ffffffff823b8bc0 t sienna_cichlid_force_clk_levels +ffffffff823b8cf0 t sienna_cichlid_od_edit_dpm_table +ffffffff823b9290 t sienna_cichlid_restore_user_od_settings +ffffffff823b9320 t sienna_cichlid_get_power_profile_mode +ffffffff823b9570 t sienna_cichlid_set_power_profile_mode +ffffffff823b9840 t sienna_cichlid_dpm_set_vcn_enable +ffffffff823b9900 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff823b9980 t sienna_cichlid_read_sensor +ffffffff823ba180 t sienna_cichlid_pre_display_config_changed +ffffffff823ba1b0 t sienna_cichlid_display_config_changed +ffffffff823ba210 t sienna_cichlid_notify_smc_display_config +ffffffff823ba3a0 t sienna_cichlid_is_dpm_running +ffffffff823ba3f0 t sienna_cichlid_get_fan_speed_rpm +ffffffff823ba500 t sienna_cichlid_set_watermarks_table +ffffffff823ba690 t sienna_cichlid_get_thermal_temperature_range +ffffffff823ba770 t sienna_cichlid_get_uclk_dpm_states +ffffffff823ba880 t sienna_cichlid_set_default_od_settings +ffffffff823baa30 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff823baab0 t sienna_cichlid_dump_pptable +ffffffff823baae0 t sienna_cichlid_get_power_limit +ffffffff823babb0 t sienna_cichlid_update_pcie_parameters +ffffffff823bace0 t sienna_cichlid_i2c_control_init +ffffffff823bae10 t sienna_cichlid_i2c_control_fini +ffffffff823bae50 t sienna_cichlid_get_unique_id +ffffffff823bafa0 t sienna_cichlid_init_smc_tables +ffffffff823bb2c0 t sienna_cichlid_set_mp1_state +ffffffff823bb300 t sienna_cichlid_setup_pptable +ffffffff823bb740 t sienna_cichlid_system_features_control +ffffffff823bb7d0 t sienna_cichlid_baco_enter +ffffffff823bb820 t sienna_cichlid_baco_exit +ffffffff823bb920 t sienna_cichlid_is_mode1_reset_supported +ffffffff823bb9a0 t sienna_cichlid_is_mode2_reset_supported +ffffffff823bb9d0 t sienna_cichlid_mode2_reset +ffffffff823bbb10 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff823bbb30 t sienna_cichlid_get_gpu_metrics +ffffffff823bc0b0 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff823bc100 t sienna_cichlid_get_fan_parameters +ffffffff823bc140 t sienna_cichlid_gpo_control +ffffffff823bc1f0 t sienna_cichlid_get_ecc_info +ffffffff823bc2e0 t sienna_cichlid_stb_get_data_direct +ffffffff823bc380 t sienna_cichlid_get_default_config_table_settings +ffffffff823bc3f0 t sienna_cichlid_set_config_table +ffffffff823bc4c0 t sienna_cichlid_get_throttler_status_locked +ffffffff823bc620 t sienna_cichlid_get_smartshift_power_percentage +ffffffff823bc750 t sienna_cichlid_i2c_xfer +ffffffff823bc9f0 t sienna_cichlid_i2c_func +ffffffff823bd000 T smu_v11_0_init_microcode +ffffffff823bd140 T smu_v11_0_fini_microcode +ffffffff823bd190 T smu_v11_0_load_microcode +ffffffff823bd2d0 T smu_v11_0_check_fw_status +ffffffff823bd320 T smu_v11_0_check_fw_version +ffffffff823bd4a0 T smu_v11_0_setup_pptable +ffffffff823bd5c0 T smu_v11_0_init_smc_tables +ffffffff823bd720 T smu_v11_0_fini_smc_tables +ffffffff823bd950 T smu_v11_0_init_power +ffffffff823bd9e0 T smu_v11_0_fini_power +ffffffff823bda40 T smu_v11_0_get_vbios_bootup_values +ffffffff823bdda0 T smu_v11_0_notify_memory_pool_location +ffffffff823bde90 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff823bdf10 T smu_v11_0_set_driver_table_location +ffffffff823bdf80 T smu_v11_0_set_tool_table_location +ffffffff823bdff0 T smu_v11_0_init_display_count +ffffffff823be050 T smu_v11_0_set_allowed_mask +ffffffff823be120 T smu_v11_0_system_features_control +ffffffff823be140 T smu_v11_0_notify_display_change +ffffffff823be1b0 T smu_v11_0_init_max_sustainable_clocks +ffffffff823be420 t smu_v11_0_get_max_sustainable_clock +ffffffff823be540 T smu_v11_0_get_current_power_limit +ffffffff823be620 T smu_v11_0_set_power_limit +ffffffff823be770 T smu_v11_0_interrupt_work +ffffffff823be7f0 T smu_v11_0_enable_thermal_alert +ffffffff823be890 T smu_v11_0_disable_thermal_alert +ffffffff823be8b0 T smu_v11_0_get_gfx_vdd +ffffffff823be970 T smu_v11_0_display_clock_voltage_request +ffffffff823beac0 T smu_v11_0_set_hard_freq_limited_range +ffffffff823beba0 T smu_v11_0_gfx_off_control +ffffffff823bec10 T smu_v11_0_get_fan_control_mode +ffffffff823bec60 T smu_v11_0_set_fan_speed_pwm +ffffffff823bee10 t smu_v11_0_set_fan_static_mode +ffffffff823befd0 T smu_v11_0_set_fan_speed_rpm +ffffffff823bf110 T smu_v11_0_get_fan_speed_pwm +ffffffff823bf250 T smu_v11_0_get_fan_speed_rpm +ffffffff823bf350 T smu_v11_0_set_fan_control_mode +ffffffff823bf4f0 T smu_v11_0_set_xgmi_pstate +ffffffff823bf510 T smu_v11_0_register_irq_handler +ffffffff823bf5d0 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff823bf660 T smu_v11_0_set_azalia_d3_pme +ffffffff823bf680 T smu_v11_0_baco_set_armd3_sequence +ffffffff823bf6a0 T smu_v11_0_baco_is_support +ffffffff823bf730 T smu_v11_0_baco_get_state +ffffffff823bf760 T smu_v11_0_baco_set_state +ffffffff823bfa10 T smu_v11_0_baco_enter +ffffffff823bfb00 T smu_v11_0_baco_exit +ffffffff823bfc30 T smu_v11_0_mode1_reset +ffffffff823bfcb0 T smu_v11_0_handle_passthrough_sbr +ffffffff823bfcd0 T smu_v11_0_get_dpm_ultimate_freq +ffffffff823bfe10 T smu_v11_0_set_soft_freq_limited_range +ffffffff823bfee0 T smu_v11_0_set_performance_level +ffffffff823c0230 T smu_v11_0_set_power_source +ffffffff823c0290 T smu_v11_0_get_dpm_freq_by_index +ffffffff823c0340 T smu_v11_0_get_dpm_level_count +ffffffff823c03e0 T smu_v11_0_set_single_dpm_table +ffffffff823c0650 T smu_v11_0_get_dpm_level_range +ffffffff823c07b0 T smu_v11_0_get_current_pcie_link_width_level +ffffffff823c0800 T smu_v11_0_get_current_pcie_link_width +ffffffff823c0860 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff823c08b0 T smu_v11_0_get_current_pcie_link_speed +ffffffff823c0910 T smu_v11_0_gfx_ulv_control +ffffffff823c0980 T smu_v11_0_deep_sleep_control +ffffffff823c0b30 T smu_v11_0_restore_user_od_settings +ffffffff823c0bc0 T smu_v11_0_set_smu_mailbox_registers +ffffffff823c0c30 t smu_v11_0_set_irq_state +ffffffff823c11e0 t smu_v11_0_irq_process +ffffffff823c2000 T vangogh_set_ppt_funcs +ffffffff823c2040 t vangogh_set_default_dpm_tables +ffffffff823c2070 t vangogh_common_print_clk_levels +ffffffff823c24e0 t vangogh_force_clk_levels +ffffffff823c2710 t vangogh_od_edit_dpm_table +ffffffff823c2c70 t vangogh_get_power_profile_mode +ffffffff823c2d70 t vangogh_set_power_profile_mode +ffffffff823c2ea0 t vangogh_dpm_set_vcn_enable +ffffffff823c2ef0 t vangogh_dpm_set_jpeg_enable +ffffffff823c2f40 t vangogh_read_sensor +ffffffff823c3580 t vangogh_get_apu_thermal_limit +ffffffff823c35a0 t vangogh_set_apu_thermal_limit +ffffffff823c35c0 t vangogh_is_dpm_running +ffffffff823c3620 t vangogh_set_watermarks_table +ffffffff823c37a0 t vangogh_set_performance_level +ffffffff823c3fb0 t vangogh_get_power_limit +ffffffff823c4110 t vangogh_get_ppt_limit +ffffffff823c4180 t vangogh_get_dpm_clock_table +ffffffff823c42f0 t vangogh_init_smc_tables +ffffffff823c4530 t vangogh_system_features_control +ffffffff823c4580 t vangogh_set_power_limit +ffffffff823c46d0 t vangogh_get_gfxoff_status +ffffffff823c4760 t vangogh_get_gfxoff_entrycount +ffffffff823c47d0 t vangogh_set_gfxoff_residency +ffffffff823c4840 t vangogh_get_gfxoff_residency +ffffffff823c4880 t vangogh_mode2_reset +ffffffff823c49c0 t vangogh_common_get_gpu_metrics +ffffffff823c5140 t vangogh_post_smu_init +ffffffff823c52e0 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff823c5350 t vangogh_force_dpm_limit_value +ffffffff823c5480 t vangogh_get_dpm_ultimate_freq +ffffffff823c5840 t vangogh_set_soft_freq_limited_range +ffffffff823c59c0 t vangogh_get_gpu_metrics_v2_3 +ffffffff823c6000 T renoir_set_ppt_funcs +ffffffff823c60a0 t renoir_get_current_power_state +ffffffff823c6120 t renoir_print_clk_levels +ffffffff823c6530 t renoir_force_clk_levels +ffffffff823c6750 t renoir_od_edit_dpm_table +ffffffff823c6a50 t renoir_get_power_profile_mode +ffffffff823c6b20 t renoir_set_power_profile_mode +ffffffff823c6c50 t renoir_dpm_set_vcn_enable +ffffffff823c6cd0 t renoir_dpm_set_jpeg_enable +ffffffff823c6d50 t renoir_read_sensor +ffffffff823c7100 t renoir_is_dpm_running +ffffffff823c7140 t renoir_set_watermarks_table +ffffffff823c72f0 t renoir_set_performance_level +ffffffff823c7810 t renoir_get_dpm_clock_table +ffffffff823c7b60 t renoir_init_smc_tables +ffffffff823c7cd0 t renoir_get_enabled_mask +ffffffff823c7d10 t renoir_get_dpm_ultimate_freq +ffffffff823c7fb0 t renoir_get_gpu_metrics +ffffffff823c81d0 t renoir_gfx_state_change_set +ffffffff823c8200 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff823c82a0 t renoir_force_dpm_limit_value +ffffffff823c9000 T smu_v12_0_check_fw_status +ffffffff823c9050 T smu_v12_0_check_fw_version +ffffffff823c90c0 T smu_v12_0_powergate_sdma +ffffffff823c9110 T smu_v12_0_set_gfx_cgpg +ffffffff823c9170 T smu_v12_0_get_gfxoff_status +ffffffff823c9200 T smu_v12_0_gfx_off_control +ffffffff823c9320 T smu_v12_0_fini_smc_tables +ffffffff823c93d0 T smu_v12_0_set_default_dpm_tables +ffffffff823c9400 T smu_v12_0_mode2_reset +ffffffff823c9420 T smu_v12_0_set_soft_freq_limited_range +ffffffff823c9560 T smu_v12_0_set_driver_table_location +ffffffff823c95d0 T smu_v12_0_get_vbios_bootup_values +ffffffff823ca000 T aldebaran_set_ppt_funcs +ffffffff823ca050 t aldebaran_get_allowed_feature_mask +ffffffff823ca0a0 t aldebaran_set_default_dpm_table +ffffffff823ca2a0 t aldebaran_populate_umd_state_clk +ffffffff823ca3a0 t aldebaran_print_clk_levels +ffffffff823ca560 t aldebaran_force_clk_levels +ffffffff823ca730 t aldebaran_usr_edit_dpm_table +ffffffff823ca950 t aldebaran_read_sensor +ffffffff823cab70 t aldebaran_is_dpm_running +ffffffff823cabc0 t aldebaran_get_thermal_temperature_range +ffffffff823cac90 t aldebaran_set_performance_level +ffffffff823cad40 t aldebaran_get_power_limit +ffffffff823caed0 t aldebaran_set_df_cstate +ffffffff823caf50 t aldebaran_allow_xgmi_power_down +ffffffff823caff0 t aldebaran_i2c_control_init +ffffffff823cb0b0 t aldebaran_i2c_control_fini +ffffffff823cb0f0 t aldebaran_get_unique_id +ffffffff823cb1d0 t aldebaran_init_smc_tables +ffffffff823cb390 t aldebaran_set_mp1_state +ffffffff823cb3d0 t aldebaran_setup_pptable +ffffffff823cb4a0 t aldebaran_system_features_control +ffffffff823cb600 t aldebaran_set_power_limit +ffffffff823cb690 t aldebaran_is_baco_supported +ffffffff823cb6c0 t aldebaran_is_mode1_reset_supported +ffffffff823cb6f0 t aldebaran_is_mode2_reset_supported +ffffffff823cb720 t aldebaran_mode1_reset +ffffffff823cb800 t aldebaran_mode2_reset +ffffffff823cbb20 t aldebaran_set_soft_freq_limited_range +ffffffff823cbd30 t aldebaran_log_thermal_throttling_event +ffffffff823cc040 t aldebaran_get_gpu_metrics +ffffffff823cc2c0 t aldebaran_smu_handle_passthrough_sbr +ffffffff823cc2e0 t aldebaran_smu_send_hbm_bad_page_num +ffffffff823cc370 t aldebaran_get_ecc_info +ffffffff823cc4d0 t aldebaran_send_hbm_bad_channel_flag +ffffffff823cc5a0 t aldebaran_get_current_clk_freq_by_table +ffffffff823cc6e0 t aldebaran_get_smu_metrics_data +ffffffff823cc950 t aldebaran_upload_dpm_level +ffffffff823cca40 t aldebaran_i2c_xfer +ffffffff823ccce0 t aldebaran_i2c_func +ffffffff823cd000 T smu_v13_0_init_microcode +ffffffff823cd120 T smu_v13_0_fini_microcode +ffffffff823cd170 T smu_v13_0_load_microcode +ffffffff823cd1a0 T smu_v13_0_init_pptable_microcode +ffffffff823cd350 T smu_v13_0_get_pptable_from_firmware +ffffffff823cd470 T smu_v13_0_check_fw_status +ffffffff823cd4e0 T smu_v13_0_check_fw_version +ffffffff823cd560 T smu_v13_0_setup_pptable +ffffffff823cd700 T smu_v13_0_init_smc_tables +ffffffff823cd880 T smu_v13_0_fini_smc_tables +ffffffff823cda90 T smu_v13_0_init_power +ffffffff823cdb10 T smu_v13_0_fini_power +ffffffff823cdb90 T smu_v13_0_get_vbios_bootup_values +ffffffff823cde40 T smu_v13_0_notify_memory_pool_location +ffffffff823cdf00 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff823cdf80 T smu_v13_0_set_driver_table_location +ffffffff823cdff0 T smu_v13_0_set_tool_table_location +ffffffff823ce060 T smu_v13_0_init_display_count +ffffffff823ce0a0 T smu_v13_0_set_allowed_mask +ffffffff823ce170 T smu_v13_0_gfx_off_control +ffffffff823ce1f0 T smu_v13_0_system_features_control +ffffffff823ce210 T smu_v13_0_notify_display_change +ffffffff823ce270 T smu_v13_0_init_max_sustainable_clocks +ffffffff823ce4e0 t smu_v13_0_get_max_sustainable_clock +ffffffff823ce600 T smu_v13_0_get_current_power_limit +ffffffff823ce6e0 T smu_v13_0_set_power_limit +ffffffff823ce800 T smu_v13_0_enable_thermal_alert +ffffffff823ce890 T smu_v13_0_disable_thermal_alert +ffffffff823ce8d0 T smu_v13_0_get_gfx_vdd +ffffffff823ce990 T smu_v13_0_display_clock_voltage_request +ffffffff823ceae0 T smu_v13_0_set_hard_freq_limited_range +ffffffff823cebc0 T smu_v13_0_get_fan_control_mode +ffffffff823cec10 T smu_v13_0_set_fan_speed_pwm +ffffffff823cee30 t smu_v13_0_set_fan_static_mode +ffffffff823cf000 T smu_v13_0_set_fan_control_mode +ffffffff823cf160 T smu_v13_0_set_fan_speed_rpm +ffffffff823cf310 T smu_v13_0_set_xgmi_pstate +ffffffff823cf330 T smu_v13_0_register_irq_handler +ffffffff823cf400 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff823cf490 T smu_v13_0_set_azalia_d3_pme +ffffffff823cf4b0 T smu_v13_0_wait_for_event +ffffffff823cf500 T smu_v13_0_get_dpm_ultimate_freq +ffffffff823cf660 T smu_v13_0_set_soft_freq_limited_range +ffffffff823cf730 T smu_v13_0_set_performance_level +ffffffff823cfe90 T smu_v13_0_set_power_source +ffffffff823cfef0 T smu_v13_0_get_dpm_freq_by_index +ffffffff823cffa0 T smu_v13_0_set_single_dpm_table +ffffffff823d02a0 T smu_v13_0_get_current_pcie_link_width_level +ffffffff823d02f0 T smu_v13_0_get_current_pcie_link_width +ffffffff823d0350 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff823d03a0 T smu_v13_0_get_current_pcie_link_speed +ffffffff823d03f0 T smu_v13_0_set_vcn_enable +ffffffff823d04b0 T smu_v13_0_set_jpeg_enable +ffffffff823d04d0 T smu_v13_0_run_btc +ffffffff823d0550 T smu_v13_0_gpo_control +ffffffff823d05e0 T smu_v13_0_deep_sleep_control +ffffffff823d0850 T smu_v13_0_gfx_ulv_control +ffffffff823d08c0 T smu_v13_0_baco_set_armd3_sequence +ffffffff823d0930 T smu_v13_0_baco_is_support +ffffffff823d09c0 T smu_v13_0_baco_get_state +ffffffff823d09f0 T smu_v13_0_baco_set_state +ffffffff823d0ac0 T smu_v13_0_baco_enter +ffffffff823d0be0 T smu_v13_0_baco_exit +ffffffff823d0c80 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff823d0cc0 T smu_v13_0_od_edit_dpm_table +ffffffff823d0f80 T smu_v13_0_set_default_dpm_tables +ffffffff823d0fb0 T smu_v13_0_set_smu_mailbox_registers +ffffffff823d1020 T smu_v13_0_mode1_reset +ffffffff823d10a0 T smu_v13_0_update_pcie_parameters +ffffffff823d1310 t smu_v13_0_set_irq_state +ffffffff823d18c0 t smu_v13_0_irq_process +ffffffff823d2000 T smu_v13_0_0_set_ppt_funcs +ffffffff823d20f0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff823d2230 t smu_v13_0_0_set_default_dpm_table +ffffffff823d2650 t smu_v13_0_0_populate_umd_state_clk +ffffffff823d2790 t smu_v13_0_0_print_clk_levels +ffffffff823d28a0 t smu_v13_0_0_force_clk_levels +ffffffff823d2a20 t smu_v13_0_0_od_edit_dpm_table +ffffffff823d2f10 t smu_v13_0_0_restore_user_od_settings +ffffffff823d2fd0 t smu_v13_0_0_get_power_profile_mode +ffffffff823d30d0 t smu_v13_0_0_set_power_profile_mode +ffffffff823d3330 t smu_v13_0_0_read_sensor +ffffffff823d3550 t smu_v13_0_0_is_dpm_running +ffffffff823d35a0 t smu_v13_0_0_get_fan_speed_pwm +ffffffff823d3680 t smu_v13_0_0_get_fan_speed_rpm +ffffffff823d36f0 t smu_v13_0_0_get_thermal_temperature_range +ffffffff823d37f0 t smu_v13_0_0_set_default_od_settings +ffffffff823d3920 t smu_v13_0_0_dump_pptable +ffffffff823d3950 t smu_v13_0_0_get_power_limit +ffffffff823d3a30 t smu_v13_0_0_set_df_cstate +ffffffff823d3a50 t smu_v13_0_0_i2c_control_init +ffffffff823d3b80 t smu_v13_0_0_i2c_control_fini +ffffffff823d3bc0 t smu_v13_0_0_get_unique_id +ffffffff823d3c60 t smu_v13_0_0_init_smc_tables +ffffffff823d3eb0 t smu_v13_0_0_set_mp1_state +ffffffff823d3ef0 t smu_v13_0_0_setup_pptable +ffffffff823d4050 t smu_v13_0_0_system_features_control +ffffffff823d4060 t smu_v13_0_0_baco_enter +ffffffff823d40c0 t smu_v13_0_0_baco_exit +ffffffff823d4120 t smu_v13_0_0_is_mode1_reset_supported +ffffffff823d4180 t smu_v13_0_0_mode1_reset +ffffffff823d42a0 t smu_v13_0_0_mode2_reset +ffffffff823d42f0 t smu_v13_0_0_enable_gfx_features +ffffffff823d4340 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff823d4460 t smu_v13_0_0_get_gpu_metrics +ffffffff823d48a0 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff823d48f0 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff823d4980 t smu_v13_0_0_get_ecc_info +ffffffff823d4a80 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff823d4b10 t smu_v13_0_0_i2c_xfer +ffffffff823d4db0 t smu_v13_0_0_i2c_func +ffffffff823d5000 T smu_v13_0_4_set_ppt_funcs +ffffffff823d50c0 t smu_v13_0_4_print_clk_levels +ffffffff823d5130 t smu_v13_0_4_force_clk_levels +ffffffff823d53f0 t smu_v13_0_4_read_sensor +ffffffff823d56d0 t smu_v13_0_4_is_dpm_running +ffffffff823d5720 t smu_v13_0_4_set_watermarks_table +ffffffff823d58a0 t smu_v13_0_4_set_performance_level +ffffffff823d6460 t smu_v13_0_4_init_smc_tables +ffffffff823d65d0 t smu_v13_0_4_fini_smc_tables +ffffffff823d6680 t smu_v13_0_4_system_features_control +ffffffff823d6700 t smu_v13_0_4_mode2_reset +ffffffff823d6720 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff823d6b40 t smu_v13_0_4_get_gpu_metrics +ffffffff823d6d10 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff823d6d70 t smu_v13_0_4_get_current_clk_freq +ffffffff823d7000 T smu_v13_0_5_set_ppt_funcs +ffffffff823d70a0 t smu_v13_0_5_set_default_dpm_tables +ffffffff823d70d0 t smu_v13_0_5_print_clk_levels +ffffffff823d7160 t smu_v13_0_5_force_clk_levels +ffffffff823d72d0 t smu_v13_0_5_od_edit_dpm_table +ffffffff823d7590 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff823d75b0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff823d75d0 t smu_v13_0_5_read_sensor +ffffffff823d77f0 t smu_v13_0_5_is_dpm_running +ffffffff823d7840 t smu_v13_0_5_set_watermarks_table +ffffffff823d79c0 t smu_v13_0_5_set_performance_level +ffffffff823d7f60 t smu_v13_0_5_init_smc_tables +ffffffff823d80d0 t smu_v13_0_5_fini_smc_tables +ffffffff823d8180 t smu_v13_0_5_system_features_control +ffffffff823d81d0 t smu_v13_0_5_mode2_reset +ffffffff823d8250 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff823d8690 t smu_v13_0_5_get_gpu_metrics +ffffffff823d87e0 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff823d9000 T smu_v13_0_6_set_ppt_funcs +ffffffff823d9050 t smu_v13_0_6_get_allowed_feature_mask +ffffffff823d90a0 t smu_v13_0_6_set_default_dpm_table +ffffffff823d95a0 t smu_v13_0_6_populate_umd_state_clk +ffffffff823d96a0 t smu_v13_0_6_print_clk_levels +ffffffff823d9a20 t smu_v13_0_6_force_clk_levels +ffffffff823d9bf0 t smu_v13_0_6_usr_edit_dpm_table +ffffffff823d9e10 t smu_v13_0_6_read_sensor +ffffffff823da3a0 t smu_v13_0_6_is_dpm_running +ffffffff823da420 t smu_v13_0_6_get_thermal_temperature_range +ffffffff823da570 t smu_v13_0_6_set_performance_level +ffffffff823da680 t smu_v13_0_6_get_power_limit +ffffffff823da750 t smu_v13_0_6_set_df_cstate +ffffffff823da770 t smu_v13_0_6_allow_xgmi_power_down +ffffffff823da790 t smu_v13_0_6_i2c_control_init +ffffffff823da8c0 t smu_v13_0_6_i2c_control_fini +ffffffff823da900 t smu_v13_0_6_get_unique_id +ffffffff823da980 t smu_v13_0_6_init_smc_tables +ffffffff823dab10 t smu_v13_0_6_check_fw_status +ffffffff823dab60 t smu_v13_0_6_setup_pptable +ffffffff823dab90 t smu_v13_0_6_system_features_control +ffffffff823dac30 t smu_v13_0_6_get_enabled_mask +ffffffff823daca0 t smu_v13_0_6_set_power_limit +ffffffff823dacc0 t smu_v13_0_6_register_irq_handler +ffffffff823dad20 t smu_v13_0_6_is_baco_supported +ffffffff823dad50 t smu_v13_0_6_is_mode1_reset_supported +ffffffff823dad80 t smu_v13_0_6_is_mode2_reset_supported +ffffffff823dadb0 t smu_v13_0_6_mode1_reset +ffffffff823dae60 t smu_v13_0_6_mode2_reset +ffffffff823db110 t smu_v13_0_6_get_dpm_ultimate_freq +ffffffff823db320 t smu_v13_0_6_set_soft_freq_limited_range +ffffffff823db560 t smu_v13_0_6_log_thermal_throttling_event +ffffffff823db850 t smu_v13_0_6_get_gpu_metrics +ffffffff823dbba0 t smu_v13_0_6_smu_send_hbm_bad_page_num +ffffffff823dbc30 t smu_v13_0_6_get_smu_metrics_data +ffffffff823dbec0 t smu_v13_0_6_upload_dpm_level +ffffffff823dbfc0 t smu_v13_0_6_i2c_xfer +ffffffff823dc2c0 t smu_v13_0_6_i2c_func +ffffffff823dc2f0 t smu_v13_0_6_set_irq_state +ffffffff823dc580 t smu_v13_0_6_irq_process +ffffffff823dd000 T smu_v13_0_7_set_ppt_funcs +ffffffff823dd060 t smu_v13_0_7_get_allowed_feature_mask +ffffffff823dd1d0 t smu_v13_0_7_set_default_dpm_table +ffffffff823dd5f0 t smu_v13_0_7_populate_umd_state_clk +ffffffff823dd730 t smu_v13_0_7_print_clk_levels +ffffffff823dd840 t smu_v13_0_7_force_clk_levels +ffffffff823dd9c0 t smu_v13_0_7_od_edit_dpm_table +ffffffff823ddeb0 t smu_v13_0_7_restore_user_od_settings +ffffffff823ddf70 t smu_v13_0_7_get_power_profile_mode +ffffffff823de0b0 t smu_v13_0_7_set_power_profile_mode +ffffffff823de300 t smu_v13_0_7_read_sensor +ffffffff823de510 t smu_v13_0_7_is_dpm_running +ffffffff823de560 t smu_v13_0_7_get_fan_speed_pwm +ffffffff823de640 t smu_v13_0_7_get_fan_speed_rpm +ffffffff823de6b0 t smu_v13_0_7_get_thermal_temperature_range +ffffffff823de7b0 t smu_v13_0_7_set_default_od_settings +ffffffff823de8e0 t smu_v13_0_7_dump_pptable +ffffffff823de910 t smu_v13_0_7_get_power_limit +ffffffff823de9f0 t smu_v13_0_7_set_df_cstate +ffffffff823dea10 t smu_v13_0_7_init_smc_tables +ffffffff823dec00 t smu_v13_0_7_check_fw_status +ffffffff823dec50 t smu_v13_0_7_set_mp1_state +ffffffff823dec90 t smu_v13_0_7_setup_pptable +ffffffff823dedf0 t smu_v13_0_7_baco_enter +ffffffff823dee50 t smu_v13_0_7_baco_exit +ffffffff823deeb0 t smu_v13_0_7_is_mode1_reset_supported +ffffffff823deef0 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff823df010 t smu_v13_0_7_get_gpu_metrics +ffffffff823df440 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff823e0000 T yellow_carp_set_ppt_funcs +ffffffff823e0050 t yellow_carp_set_default_dpm_tables +ffffffff823e0080 t yellow_carp_print_clk_levels +ffffffff823e0100 t yellow_carp_force_clk_levels +ffffffff823e03c0 t yellow_carp_od_edit_dpm_table +ffffffff823e0680 t yellow_carp_dpm_set_vcn_enable +ffffffff823e06a0 t yellow_carp_dpm_set_jpeg_enable +ffffffff823e06c0 t yellow_carp_read_sensor +ffffffff823e0a30 t yellow_carp_is_dpm_running +ffffffff823e0a80 t yellow_carp_set_watermarks_table +ffffffff823e0c00 t yellow_carp_set_performance_level +ffffffff823e16a0 t yellow_carp_init_smc_tables +ffffffff823e1810 t yellow_carp_fini_smc_tables +ffffffff823e18c0 t yellow_carp_system_features_control +ffffffff823e1910 t yellow_carp_get_gfxoff_status +ffffffff823e19a0 t yellow_carp_mode2_reset +ffffffff823e1a20 t yellow_carp_get_dpm_ultimate_freq +ffffffff823e1e60 t yellow_carp_get_gpu_metrics +ffffffff823e2010 t yellow_carp_post_smu_init +ffffffff823e2090 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff823e20f0 t yellow_carp_get_current_clk_freq +ffffffff823e21f0 t yellow_carp_get_dpm_profile_freq +ffffffff823e3000 T smu_cmn_send_msg_without_waiting +ffffffff823e3170 T smu_cmn_wait_for_response +ffffffff823e32a0 T smu_cmn_send_smc_msg_with_param +ffffffff823e35b0 T smu_cmn_to_asic_specific_index +ffffffff823e36e0 t __smu_cmn_reg_print_error +ffffffff823e3930 T smu_cmn_send_smc_msg +ffffffff823e3950 T smu_cmn_send_debug_smc_msg +ffffffff823e39d0 T smu_cmn_send_debug_smc_msg_with_param +ffffffff823e3a50 T smu_cmn_feature_is_supported +ffffffff823e3b00 T smu_cmn_feature_is_enabled +ffffffff823e3c00 T smu_cmn_clk_dpm_is_enabled +ffffffff823e3d00 T smu_cmn_get_enabled_mask +ffffffff823e3df0 T smu_cmn_get_indep_throttler_status +ffffffff823e3ea0 T smu_cmn_feature_update_enable_state +ffffffff823e3f40 T smu_cmn_feature_set_enabled +ffffffff823e4010 T smu_cmn_get_pp_feature_mask +ffffffff823e41c0 T smu_cmn_set_pp_feature_mask +ffffffff823e42c0 T smu_cmn_disable_all_features_with_exception +ffffffff823e4370 T smu_cmn_get_smc_version +ffffffff823e4440 T smu_cmn_update_table +ffffffff823e45a0 T smu_cmn_write_watermarks_table +ffffffff823e4670 T smu_cmn_write_pptable +ffffffff823e4730 T smu_cmn_get_metrics_table +ffffffff823e4890 T smu_cmn_get_combo_pptable +ffffffff823e4960 T smu_cmn_init_soft_gpu_metrics +ffffffff823e4a50 T smu_cmn_set_mp1_state +ffffffff823e4af0 T smu_cmn_is_audio_func_enabled +ffffffff823e5000 T pci_mcfg_init +ffffffff823e5050 T pci_lookup_segment +ffffffff823e50b0 T pci_attach_hook +ffffffff823e50e0 T pci_bus_maxdevs +ffffffff823e5110 T pci_make_tag +ffffffff823e5180 T pci_decompose_tag +ffffffff823e51e0 T pci_conf_size +ffffffff823e5240 T pci_mcfg_map_bus +ffffffff823e52c0 T pci_conf_read +ffffffff823e5410 T pci_conf_write +ffffffff823e5550 T pci_msix_table_map +ffffffff823e5680 T pci_msix_table_unmap +ffffffff823e5720 T msi_hwmask +ffffffff823e57e0 T msi_hwunmask +ffffffff823e58a0 T msi_addroute +ffffffff823e59b0 T msi_delroute +ffffffff823e5a30 T msi_allocidtvec +ffffffff823e5b80 T pci_intr_enable_msivec +ffffffff823e5c60 T pci_intr_map_msi +ffffffff823e5d10 T pci_intr_map_msivec +ffffffff823e5dc0 T msix_hwmask +ffffffff823e5f30 T msix_hwunmask +ffffffff823e6070 T msix_addroute +ffffffff823e6260 T msix_delroute +ffffffff823e63c0 T pci_intr_map_msix +ffffffff823e6490 T pci_intr_map +ffffffff823e66c0 T pci_intr_string +ffffffff823e67a0 T pci_intr_establish +ffffffff823e67f0 T pci_intr_establish_cpu +ffffffff823e6940 T pci_intr_disestablish +ffffffff823e6960 T pci_init_extents +ffffffff823e6b40 T pci_probe_device_hook +ffffffff823e6b80 T pci_dev_postattach +ffffffff823e6b90 T pci_min_powerstate +ffffffff823e6ba0 T pci_set_powerstate_md +ffffffff823e7000 T pciide_machdep_compat_intr_establish +ffffffff823e7060 T pciide_machdep_compat_intr_disestablish +ffffffff823e8000 T vga_post_init +ffffffff823e8310 t vm86_emu_inb +ffffffff823e8360 t vm86_emu_inw +ffffffff823e83a0 t vm86_emu_inl +ffffffff823e83e0 t vm86_emu_outb +ffffffff823e8430 t vm86_emu_outw +ffffffff823e8470 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cardslot_event_throw +ffffffff823ec490 T cardslot_process_event +ffffffff823ed000 T cardbusmatch +ffffffff823ed050 T cardbusattach +ffffffff823ed130 T cardbus_read_tuples +ffffffff823ed4e0 T parse_tuple +ffffffff823ed750 T cardbus_attach_card +ffffffff823eded0 T enable_function +ffffffff823edf70 T decode_tuples +ffffffff823ee050 T cardbusprint +ffffffff823ee140 T cardbussubmatch +ffffffff823ee1a0 T disable_function +ffffffff823ee200 T cardbus_detach_card +ffffffff823ee2e0 T cardbus_intr_establish +ffffffff823ee310 T cardbus_intr_disestablish +ffffffff823ee330 T cardbus_function_enable +ffffffff823ee410 T cardbus_function_disable +ffffffff823ee470 T cardbus_matchbyid +ffffffff823ee4e0 T decode_tuple +ffffffff823ef000 T cardbus_mapreg_map +ffffffff823ef1a0 T cardbus_mapreg_unmap +ffffffff823f0000 T cardbus_read_exrom +ffffffff823f1000 T rbus_space_alloc +ffffffff823f1060 T rbus_space_alloc_subregion +ffffffff823f1230 T rbus_space_free +ffffffff823f12c0 T rbus_new_body +ffffffff823f1350 T rbus_new_root_delegate +ffffffff823f1420 T rbus_new_root_share +ffffffff823f2000 T com_cardbus_match +ffffffff823f2070 T com_cardbus_attach +ffffffff823f2220 T com_cardbus_detach +ffffffff823f22c0 T com_cardbus_find_csdev +ffffffff823f2440 T com_cardbus_gofigure +ffffffff823f2900 T com_cardbus_enable +ffffffff823f29d0 T com_cardbus_disable +ffffffff823f2a20 T com_cardbus_setup +ffffffff823f3000 T xl_cardbus_match +ffffffff823f3080 T xl_cardbus_attach +ffffffff823f33f0 T xl_cardbus_detach +ffffffff823f34b0 T xl_cardbus_lookup +ffffffff823f3560 T xl_cardbus_intr_ack +ffffffff823f4000 T dc_cardbus_match +ffffffff823f4030 T dc_cardbus_attach +ffffffff823f43e0 T dc_cardbus_detach +ffffffff823f4480 T dc_cardbus_setup +ffffffff823f5000 T fxp_cardbus_match +ffffffff823f5030 T fxp_cardbus_attach +ffffffff823f5240 T fxp_cardbus_detach +ffffffff823f52d0 T fxp_cardbus_setup +ffffffff823f6000 t rl_cardbus_match +ffffffff823f6030 t rl_cardbus_attach +ffffffff823f61d0 t rl_cardbus_detach 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atw_cardbus_enable +ffffffff823fa3b0 T atw_cardbus_disable +ffffffff823fa400 T atw_cardbus_power +ffffffff823fa440 T atw_cardbus_setup +ffffffff823fb000 T rtw_cardbus_match +ffffffff823fb030 T rtw_cardbus_attach +ffffffff823fb270 T rtw_cardbus_detach +ffffffff823fb390 T rtw_cardbus_intr_ack +ffffffff823fb3b0 T rtw_cardbus_funcregen +ffffffff823fb410 T rtw_cardbus_enable +ffffffff823fb570 T rtw_cardbus_disable +ffffffff823fb650 T rtw_cardbus_power +ffffffff823fb690 T rtw_cardbus_setup +ffffffff823fc000 T ral_cardbus_match +ffffffff823fc030 T ral_cardbus_attach +ffffffff823fc230 T ral_cardbus_detach +ffffffff823fc2e0 T ral_cardbus_activate +ffffffff823fc370 T ral_cardbus_enable +ffffffff823fc4d0 T ral_cardbus_disable +ffffffff823fc520 T ral_cardbus_setup +ffffffff823fc5c0 T ral_cardbus_wakeup +ffffffff823fd000 T acx_cardbus_match +ffffffff823fd030 T acx_cardbus_attach +ffffffff823fd260 T acx_cardbus_detach +ffffffff823fd380 T acx_cardbus_enable +ffffffff823fd450 T acx_cardbus_disable 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bwi_cardbus_attach +ffffffff824032a0 T bwi_cardbus_detach +ffffffff82403350 T bwi_cardbus_enable +ffffffff824034b0 T bwi_cardbus_disable +ffffffff82403500 T bwi_cardbus_setup +ffffffff824035a0 T bwi_cardbus_conf_read +ffffffff824035d0 T bwi_cardbus_conf_write +ffffffff82404000 T rbus_pccbb_parent_mem +ffffffff82404060 T rbus_pccbb_parent_io +ffffffff824040d0 T pccbb_attach_hook +ffffffff82405000 T pcmcia_match +ffffffff82405050 T pcmcia_attach +ffffffff824050d0 T pcmcia_activate +ffffffff82405180 T pcmcia_ccr_read +ffffffff824051d0 T pcmcia_ccr_write +ffffffff82405240 T pcmcia_card_attach +ffffffff82405430 T pcmcia_print +ffffffff82405690 T pcmcia_submatch +ffffffff824056e0 T pcmcia_card_detach +ffffffff82405790 T pcmcia_card_deactivate +ffffffff82405800 T pcmcia_card_gettype +ffffffff82405860 T pcmcia_function_init +ffffffff824058b0 T pcmcia_function_enable +ffffffff82405ce0 T pcmcia_function_disable +ffffffff82405e00 T pcmcia_io_map +ffffffff82406040 T pcmcia_intr_establish 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T aic_pcmcia_detach +ffffffff8240f000 T com_pcmcia_match +ffffffff8240f220 T com_pcmcia_attach +ffffffff8240f500 T com_pcmcia_detach +ffffffff8240f5a0 T com_pcmcia_activate +ffffffff8240f660 T com_pcmcia_enable1 +ffffffff8240f710 T com_pcmcia_enable +ffffffff8240f800 T com_pcmcia_disable +ffffffff8240f840 T com_pcmcia_disable1 +ffffffff82410000 t wdc_pcmcia_match +ffffffff824100d0 t wdc_pcmcia_attach +ffffffff82410540 T wdc_pcmcia_detach +ffffffff82410640 T wdc_pcmcia_activate +ffffffff82410760 T wdc_pcmcia_disk_device_interface_callback +ffffffff82410800 T wdc_pcmcia_disk_device_interface +ffffffff82410860 T wdc_pcmcia_lookup +ffffffff82411000 T sm_pcmcia_match +ffffffff82411100 T sm_pcmcia_attach +ffffffff82411320 T sm_pcmcia_detach +ffffffff824113c0 T sm_pcmcia_activate +ffffffff82411450 T sm_pcmcia_funce_enaddr +ffffffff82411470 T sm_pcmcia_ascii_enaddr +ffffffff82411570 T sm_pcmcia_lannid_ciscallback +ffffffff82411680 T sm_pcmcia_enable +ffffffff82411720 T sm_pcmcia_disable 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cmalo_cmd_set_bgscan_query +ffffffff8241c000 T an_pcmcia_match +ffffffff8241c060 T an_pcmcia_attach +ffffffff8241c250 T an_pcmcia_detach +ffffffff8241c2e0 T an_pcmcia_activate +ffffffff8241d000 T pcibmatch +ffffffff8241d0c0 T pcibattach +ffffffff8241d100 T pcib_callback +ffffffff8241d180 T pcib_print +ffffffff8241e000 T amdpcib_match +ffffffff8241e050 T amdpcib_attach +ffffffff8241e180 T amdpcib_get_timecount +ffffffff8241f000 T tcpcib_match +ffffffff8241f050 T tcpcib_attach +ffffffff8241f310 T tcpcib_activate +ffffffff8241f5c0 T tcpcib_wdt_init +ffffffff8241f6f0 T tcpcib_wdt_start +ffffffff8241f720 T tcpcib_wdt_stop +ffffffff8241f7a0 T tcpcib_hpet_get_timecount +ffffffff8241f7d0 T tcpcib_wdt_cb +ffffffff82420000 T aapic_match +ffffffff82420040 T aapic_attach +ffffffff82421000 T hme_config +ffffffff824214c0 T hme_stop +ffffffff824216d0 T hme_start +ffffffff824219f0 T hme_ioctl +ffffffff82421ba0 T hme_watchdog +ffffffff82421c00 t hme_mii_readreg +ffffffff82421d80 t hme_mii_writereg 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isa_dmastart +ffffffff824268a0 T isa_dmaabort +ffffffff824269a0 T isa_dmacount +ffffffff82426b60 T isa_dmafinished +ffffffff82426c20 T isa_dmadone +ffffffff82426db0 T isa_dmamem_alloc +ffffffff82426e80 T isa_dmamem_free +ffffffff82426f00 T isa_dmamem_map +ffffffff82426f80 T isa_dmamem_unmap +ffffffff82426fc0 T isa_dmamem_mmap +ffffffff82427060 T isa_drq_isfree +ffffffff824270d0 T isa_malloc +ffffffff82427280 T isa_free +ffffffff824273b0 T isa_mappage +ffffffff82428000 T fdcprobe +ffffffff82428270 T fdcattach +ffffffff824283b0 T out_fdc +ffffffff82428480 T fdcintr +ffffffff82428490 T fdc_create_kthread +ffffffff82428500 T fdcattach_deferred +ffffffff824285c0 T fdcpseudointr +ffffffff82428600 T fddprint +ffffffff82428650 T fdcresult +ffffffff82428740 T fdcstart +ffffffff82428770 T fdcstatus +ffffffff82429000 T fdprobe +ffffffff82429180 T fdattach +ffffffff824292c0 T fdactivate +ffffffff82429360 T fdgetdisklabel +ffffffff82429480 T fdstrategy +ffffffff824296c0 T fd_motor_on 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wsdisplay_common_detach +ffffffff8243f640 T wsdisplay_switchtoconsole +ffffffff8243f6b0 T wsemuldisplaydevprint +ffffffff8243f700 T wsemuldisplaydevsubmatch +ffffffff8243f750 T wsdisplay_burner +ffffffff8243f820 T wsdisplay_burn +ffffffff8243f8a0 T wsdisplay_cnattach +ffffffff8243f9f0 T wsdisplaystart +ffffffff8243fc10 T wsdisplayparam +ffffffff8243fc60 T wsdisplayclose +ffffffff8243fde0 T wsdisplay_kbdholdscr +ffffffff8243fe40 T wsdisplay_internal_ioctl +ffffffff824404f0 T wsdisplayread +ffffffff82440570 T wsdisplaywrite +ffffffff824405f0 T wsdisplaytty +ffffffff82440660 T wsdisplayioctl +ffffffff82440800 T wsdisplay_cfg_ioctl +ffffffff82440b90 T wsdisplay_param +ffffffff82440c10 T wsdisplay_driver_ioctl +ffffffff82440c90 T wsdisplay_burner_setup +ffffffff82440df0 T wsdisplay_switch +ffffffff82440ff0 T wsmoused +ffffffff824410f0 T wsdisplaymmap +ffffffff82441170 T wsdisplaykqfilter +ffffffff824411d0 T mouse_remove +ffffffff82441290 T wsdisplaystop +ffffffff82441300 T wsdisplay_emulbell +ffffffff82441350 T wsdisplay_emulinput +ffffffff824413f0 T wsdisplay_kbdinput +ffffffff824414f0 T wsdisplay_rawkbdinput +ffffffff82441590 T wsdisplay_switch3 +ffffffff82441740 T wsdisplay_switch1 +ffffffff82441890 T wsdisplay_switch2 +ffffffff82441a30 T wsdisplay_reset +ffffffff82441aa0 T wsscreen_attach_sync +ffffffff82441b10 T wsscreen_detach_sync +ffffffff82441b50 T wsscreen_lookup_sync +ffffffff82441ba0 T wsdisplay_maxscreenidx +ffffffff82441bd0 T wsdisplay_screenstate +ffffffff82441c20 T wsdisplay_getactivescreen +ffffffff82441c60 T wsscreen_switchwait +ffffffff82441d70 T wsdisplay_kbdholdscreen +ffffffff82441de0 T wsdisplay_set_console_kbd +ffffffff82441e50 T wsdisplay_set_cons_kbd +ffffffff82441e90 T wsdisplay_unset_cons_kbd +ffffffff82441ee0 T wsdisplay_enter_ddb +ffffffff82441f70 T wsdisplay_suspend +ffffffff82441fe0 T wsdisplay_suspend_device +ffffffff82442220 T wsdisplay_resume +ffffffff82442300 T wsdisplay_resume_device +ffffffff824423a0 T wsscrollback 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wskbd_set_console_display +ffffffff824498f0 T wskbd_add_mux +ffffffff82449970 T update_leds +ffffffff82449a20 T update_modifier +ffffffff82449b10 T change_displayparam +ffffffff82449bd0 T internal_command +ffffffff82449fb0 T wskbd_debugger +ffffffff8244b000 T wskbd_compose_value +ffffffff8244b1a0 T ksym_upcase +ffffffff8244b220 T fillmapentry +ffffffff8244b3b0 T wskbd_get_mapentry +ffffffff8244b5d0 T wskbd_init_keymap +ffffffff8244b670 T wskbd_load_keymap +ffffffff8244c000 T wsmouse_match +ffffffff8244c030 T wsmouse_attach +ffffffff8244c0d0 T wsmouse_detach +ffffffff8244c2b0 T wsmouse_activate +ffffffff8244c2f0 T wsmouse_mux_open +ffffffff8244c4a0 T wsmouse_mux_close +ffffffff8244c500 T wsmousedoioctl +ffffffff8244c570 T wsmousedevprint +ffffffff8244c5c0 T wsmouseopen +ffffffff8244c6a0 T wsmouse_input_cleanup +ffffffff8244c740 T wsmousedoopen +ffffffff8244c8f0 T wsmouseclose +ffffffff8244c9d0 T wsmouse_input_reset +ffffffff8244cb10 T wsmouseread +ffffffff8244cbd0 T wsmouseioctl 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wsmouse_mtframe +ffffffff8244fb90 T wsmouse_mt_init +ffffffff8244fd00 T wsmouse_set_mode +ffffffff8244fd60 T wsmouse_get_hw +ffffffff8244fd90 T wsmouse_configure +ffffffff82450000 T wstpad_set_direction +ffffffff82450180 T wstpad_is_stable +ffffffff82450260 T wstpad_scroll_coords +ffffffff82450350 T wstpad_scroll +ffffffff824504e0 T wstpad_f2scroll +ffffffff82450790 T wstpad_edgescroll +ffffffff82450900 T wstpad_get_sbtn +ffffffff82450a80 T wstpad_mtbtn_contacts +ffffffff82450bb0 T wstpad_get_mtbtn +ffffffff82450c00 T wstpad_softbuttons +ffffffff82450cd0 T wstpad_is_tap +ffffffff82450d50 T wstpad_tap_filter +ffffffff82450df0 T wstpad_tap_touch +ffffffff82451020 T wstpad_tap_button +ffffffff82451070 T wstpad_tap +ffffffff824514a0 T wstpad_tap_sync +ffffffff82451500 T wstpad_tap_timeout +ffffffff82451730 T wstpad_click +ffffffff824517d0 T wstpad_cmds +ffffffff82451a40 T wstpad_mt_inputs +ffffffff82451db0 T wstpad_mt_masks +ffffffff82452130 T wstpad_touch_inputs +ffffffff82452340 T wstpad_process_input +ffffffff82452650 T wstpad_track_interval +ffffffff824527b0 T wstpad_init_deceleration +ffffffff82452880 T wstpad_decelerate +ffffffff824529f0 T wstpad_filter +ffffffff82452cd0 T wstpad_compat_convert +ffffffff82452d70 T wstpad_init +ffffffff82452ed0 T wstpad_configure +ffffffff824534c0 t isqrt +ffffffff824536b0 T wstpad_reset +ffffffff82453730 T wstpad_cleanup +ffffffff824537c0 T wstpad_set_param +ffffffff82453ae0 T wstpad_get_param +ffffffff82454000 T wsmux_mux_open +ffffffff82454120 T wsmux_mux_close +ffffffff824541e0 T wsmux_do_ioctl +ffffffff82454760 T wsmux_do_displayioctl +ffffffff82454880 T wsmux_evsrc_set_display +ffffffff824548d0 T wsmuxattach +ffffffff82454900 T wsmux_getmux +ffffffff82454b40 T wsmux_create +ffffffff82454c20 T wsmuxopen +ffffffff82454d80 T wsmux_detach_sc +ffffffff82454e90 T wsmux_do_open +ffffffff82454f80 T wsmuxclose +ffffffff82455080 T wsmux_do_close +ffffffff82455120 T wsmuxread +ffffffff824551a0 T wsmuxioctl +ffffffff824551d0 T wsmux_add_mux +ffffffff824552b0 T wsmux_detach_sc_locked +ffffffff824553a0 T wsmuxkqfilter +ffffffff82455400 T wsmux_depth +ffffffff824554a0 T wsmux_attach_sc +ffffffff82455660 T wsmux_set_display +ffffffff82455790 T wsmux_get_layout +ffffffff824557c0 T wsmux_set_layout +ffffffff82456000 T wsemul_pick +ffffffff82456070 T wsemul_getname +ffffffff82457000 T wsemul_getchar +ffffffff824571d0 T wsemul_local_translate +ffffffff824574b0 T wsemul_utf8_translate +ffffffff82458000 T wsemul_vt100_cnattach +ffffffff82458200 T wsemul_vt100_attach +ffffffff824584d0 T wsemul_vt100_output +ffffffff824587e0 T wsemul_vt100_detach +ffffffff82458910 T wsemul_vt100_resetop +ffffffff82458ac0 T wsemul_vt100_output_esc +ffffffff82459140 T wsemul_vt100_output_csi +ffffffff82459280 T wsemul_vt100_output_scs94 +ffffffff82459340 T wsemul_vt100_output_scs94_percent +ffffffff82459390 T wsemul_vt100_output_scs96 +ffffffff824594e0 T wsemul_vt100_output_scs96_percent +ffffffff82459530 T wsemul_vt100_output_esc_hash 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wsemul_vt100_translate +ffffffff8245f000 T pckbdprobe +ffffffff8245f140 T pckbdattach +ffffffff8245f320 T pckbdactivate +ffffffff8245f3b0 T pckbd_enable +ffffffff8245f500 T pckbd_set_leds +ffffffff8245f590 T pckbd_ioctl +ffffffff8245f6e0 T pckbd_cngetc +ffffffff8245f8c0 T pckbd_cnpollc +ffffffff8245f960 T pckbd_cnbell +ffffffff8245f9b0 T pckbd_set_xtscancode +ffffffff8245fb30 T pckbd_init +ffffffff8245fb90 T pckbd_input +ffffffff8245fe00 T pckbd_scancode_translate +ffffffff8245fee0 T pckbd_bell +ffffffff8245ff30 T pckbd_hookup_bell +ffffffff8245ff70 T pckbd_cnattach +ffffffff82461000 T pmsprobe +ffffffff824610b0 T pmsattach +ffffffff82461290 T pmsactivate +ffffffff824612f0 T pms_enable +ffffffff82461360 T pms_ioctl +ffffffff824613b0 T pms_disable +ffffffff824613f0 T pms_sec_enable +ffffffff82461460 T pms_sec_ioctl +ffffffff824614b0 T pms_sec_disable +ffffffff824614f0 T pms_ioctl_mouse +ffffffff82461610 T pms_sync_mouse +ffffffff82461670 T pms_proc_mouse +ffffffff82461710 T pms_enable_synaptics +ffffffff82461b40 T pms_ioctl_synaptics +ffffffff82461c10 T pms_sync_synaptics +ffffffff82461c70 T pms_proc_synaptics +ffffffff82461ff0 T pms_disable_synaptics +ffffffff824620d0 T pms_enable_alps +ffffffff824625f0 T pms_ioctl_alps +ffffffff824626a0 T pms_sync_alps +ffffffff82462750 T pms_proc_alps +ffffffff824629a0 T pms_enable_elantech_v1 +ffffffff82462bb0 T pms_ioctl_elantech +ffffffff82462c70 T pms_sync_elantech_v1 +ffffffff82462d50 T pms_proc_elantech_v1 +ffffffff82462ec0 T pms_enable_elantech_v2 +ffffffff82463060 T pms_sync_elantech_v2 +ffffffff82463150 T pms_proc_elantech_v2 +ffffffff824632c0 T pms_enable_elantech_v3 +ffffffff82463460 T pms_sync_elantech_v3 +ffffffff824634f0 T pms_proc_elantech_v3 +ffffffff824636e0 T pms_enable_elantech_v4 +ffffffff824638e0 T pms_sync_elantech_v4 +ffffffff824639b0 T pms_proc_elantech_v4 +ffffffff82463d00 T pms_enable_intelli +ffffffff82463ef0 T pms_cmd +ffffffff82463f60 T pms_spec_cmd +ffffffff824641f0 T pms_set_scaling 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T nvramread +ffffffff8246b2d0 T nvram_get_byte +ffffffff8246c000 T hid_start_parse +ffffffff8246c070 T hid_end_parse +ffffffff8246c0b0 T hid_get_item +ffffffff8246cc60 T hid_report_size +ffffffff8246cdb0 T hid_locate +ffffffff8246cf20 T hid_get_data_sub +ffffffff8246d040 T hid_get_data +ffffffff8246d150 T hid_get_udata +ffffffff8246d260 T hid_is_collection +ffffffff8246d370 T hid_get_collection_data +ffffffff8246d440 T hid_get_id_of_collection +ffffffff8246e000 T hidkbd_attach +ffffffff8246e0f0 T hidkbd_parse_desc +ffffffff8246e430 T hidkbd_delayed_decode +ffffffff8246e450 T hidkbd_attach_wskbd +ffffffff8246e4e0 T hidkbd_detach +ffffffff8246e580 T hidkbd_translate +ffffffff8246e5d0 T hidkbd_apple_translate +ffffffff8246e680 T hidkbd_apple_munge +ffffffff8246e870 T hidkbd_apple_tb_munge +ffffffff8246e940 T hidkbd_apple_iso_munge +ffffffff8246ea30 T hidkbd_apple_mba_munge +ffffffff8246eb90 T hidkbd_apple_iso_mba_munge +ffffffff8246edd0 T hidkbd_input +ffffffff8246eef0 T hidkbd_decode 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hidcc_parse +ffffffff82474640 T hidcc_attach_wskbd +ffffffff824746f0 T hidcc_detach +ffffffff824747a0 T hidcc_intr +ffffffff82474ab0 T hidcc_intr_slice +ffffffff82474ba0 T hidcc_setbits +ffffffff82474d30 T hidcc_rawinput +ffffffff82474dd0 T hidcc_input +ffffffff82474e30 T hidcc_bits_to_int +ffffffff82474e90 T hidcc_usage_to_sym +ffffffff824750a0 T hidcc_bit_to_sym +ffffffff824750f0 T hidcc_enable +ffffffff82475110 T hidcc_set_leds +ffffffff82475140 T hidcc_ioctl +ffffffff824751b0 T hidcc_is_array +ffffffff82475200 T hidcc_parse_array +ffffffff82475310 T hidcc_add_key_volume +ffffffff82475440 T hidcc_add_key +ffffffff82475510 T hidcc_bits_to_volume +ffffffff82476000 T usb_match +ffffffff82476030 T usb_attach +ffffffff82476330 T usb_detach +ffffffff824763e0 T usb_activate +ffffffff824764f0 T usb_create_task_threads +ffffffff82476590 T usb_explore +ffffffff82476730 T usb_attach_roothub +ffffffff824767d0 T usb_needs_explore +ffffffff82476820 T usb_detach_roothub +ffffffff82476910 T usb_wait_task +ffffffff824769b0 T usb_abort_task_thread +ffffffff82476aa0 T usb_task_thread +ffffffff82476bc0 T usb_add_task +ffffffff82476c80 T usb_rem_task +ffffffff82476d40 T usb_rem_wait_task +ffffffff82476e50 T usbctlprint +ffffffff82476ea0 T usbopen +ffffffff82476f10 T usbclose +ffffffff82476f40 T usb_fill_udc_task +ffffffff82476fe0 T usb_fill_udf_task +ffffffff82477050 T usbioctl +ffffffff824776b0 T usb_needs_reattach +ffffffff82477700 T usb_schedsoftintr +ffffffff824777d0 T usb_tap +ffffffff82478000 T usbd_is_dying +ffffffff82478040 T usbd_deactivate +ffffffff82478070 T usbd_ref_incr +ffffffff824780a0 T usbd_ref_decr +ffffffff824780e0 T usbd_ref_wait +ffffffff82478160 T usbd_get_devcnt +ffffffff82478190 T usbd_claim_iface +ffffffff824781d0 T usbd_iface_claimed +ffffffff82478210 T usbd_open_pipe +ffffffff824782f0 T usbd_open_pipe_ival +ffffffff824783e0 T usbd_open_pipe_intr +ffffffff82478630 T usbd_alloc_xfer +ffffffff824786b0 T usbd_setup_xfer +ffffffff82478720 T usbd_transfer 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usbd_start_next +ffffffff82479850 T usb_insert_transfer +ffffffff82479900 T usbd_do_request_flags +ffffffff82479b80 T usbd_request_async_cb +ffffffff82479c00 T usbd_get_quirks +ffffffff82479c50 T usbd_set_polling +ffffffff82479cb0 T usbd_get_endpoint_descriptor +ffffffff82479d10 T usbd_ratecheck +ffffffff82479d30 T usbd_match_device +ffffffff82479da0 T usbd_desc_iter_init +ffffffff82479e00 T usbd_desc_iter_next +ffffffff82479e80 T usbd_str +ffffffff8247a000 T usbd_get_desc +ffffffff8247a070 T usbd_get_device_status +ffffffff8247a0c0 T usbd_get_hub_descriptor +ffffffff8247a130 T usbd_get_hub_ss_descriptor +ffffffff8247a1a0 T usbd_get_port_status +ffffffff8247a1f0 T usbd_set_hub_depth +ffffffff8247a240 T usbd_clear_port_feature +ffffffff8247a290 T usbd_clear_endpoint_feature +ffffffff8247a2e0 T usbd_set_port_feature +ffffffff8247a330 T usbd_set_idle +ffffffff8247a390 T usbd_get_report_descriptor +ffffffff8247a3e0 T usbd_get_hid_descriptor +ffffffff8247a460 T usbd_get_config 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athn_usb_watchdog +ffffffff8256a3f0 T athn_usb_node_alloc +ffffffff8256a410 T athn_usb_newauth +ffffffff8256a5c0 T athn_usb_newassoc +ffffffff8256a6f0 T athn_usb_node_free +ffffffff8256a7f0 T athn_usb_updateslot +ffffffff8256a820 T athn_usb_updateedca +ffffffff8256a8e0 T athn_usb_set_key +ffffffff8256aa20 T athn_usb_delete_key +ffffffff8256ab70 T athn_usb_newstate +ffffffff8256ac70 T athn_usb_media_change +ffffffff8256ad00 T athn_usb_next_scan +ffffffff8256ada0 T athn_usb_rx_enable +ffffffff8256ae10 T athn_usb_intr +ffffffff8256afa0 T athn_usb_alloc_rx_list +ffffffff8256b050 T athn_usb_alloc_tx_list +ffffffff8256b150 T athn_usb_do_async +ffffffff8256b270 T athn_usb_htc_msg +ffffffff8256b300 T athn_usb_htc_connect_svc +ffffffff8256b4d0 T athn_usb_wmi_xcmd +ffffffff8256b700 T athn_usb_read_rom +ffffffff8256b860 T athn_usb_stop +ffffffff8256bb70 T athn_usb_init +ffffffff8256bfc0 T athn_usb_newstate_cb +ffffffff8256c2c0 T athn_usb_remove_node +ffffffff8256c3c0 T athn_usb_switch_chan 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uow_match +ffffffff8256f070 T uow_attach +ffffffff8256f510 T uow_detach +ffffffff8256f5e0 T uow_activate +ffffffff8256f650 T uow_intr +ffffffff8256f6a0 T uow_reset +ffffffff8256f6c0 T uow_ow_reset +ffffffff8256f710 T uow_ow_bit +ffffffff8256f790 T uow_ow_read_byte +ffffffff8256f810 T uow_ow_write_byte +ffffffff8256f870 T uow_ow_read_block +ffffffff8256f900 T uow_ow_write_block +ffffffff8256f970 T uow_ow_matchrom +ffffffff8256fa40 T uow_cmd +ffffffff8256fb80 T uow_read +ffffffff8256fc90 T uow_write +ffffffff8256fd70 T uow_ow_search +ffffffff82570000 T uberry_match +ffffffff82570070 T uberry_attach +ffffffff825701f0 T uberry_detach +ffffffff82570220 T uberry_charge +ffffffff825702d0 T uberry_pearlmode +ffffffff82571000 T upd_match +ffffffff82571140 T upd_attach +ffffffff825713b0 T upd_detach +ffffffff825714a0 T upd_lookup_usage_entry +ffffffff82571560 T upd_intr +ffffffff82571590 T upd_attach_sensor_tree +ffffffff82571860 T upd_refresh +ffffffff82571980 T upd_request_children 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bwfm_usb_newbuf +ffffffff825743b0 T bwfm_usb_txeof +ffffffff825744c0 T bwfm_usb_txctl_cb +ffffffff82575000 T umstc_match +ffffffff825750b0 T umstc_attach +ffffffff825751b0 T umstc_detach +ffffffff82575200 T umstc_intr +ffffffff82575350 T umstc_brightness_task +ffffffff82576000 T uhidpp_match +ffffffff825760e0 T uhidpp_attach +ffffffff82576450 T uhidpp_detach +ffffffff82576690 T uhidpp_intr +ffffffff825768a0 T uhidpp_task +ffffffff82576930 T hidpp10_get_type +ffffffff82576a30 T hidpp10_get_name +ffffffff82576b30 T hidpp10_enable_notifications +ffffffff82576ba0 T uhidpp_is_notification +ffffffff82576c30 T uhidpp_claim_notification +ffffffff82576d50 T uhidpp_refresh +ffffffff82576e20 T uhidpp_device_refresh +ffffffff82576ed0 T uhidpp_consume_notification +ffffffff82577020 T uhidpp_device_connect +ffffffff82577310 T uhidpp_sleep +ffffffff82577340 T hidpp_get_protocol_version +ffffffff82577410 T uhidpp_device_features +ffffffff82577600 T hidpp20_battery_get_capability +ffffffff825776c0 T hidpp20_unified_battery_get_capabilities +ffffffff825777b0 T hidpp20_battery_get_level_status +ffffffff825778e0 T hidpp20_unified_battery_get_status +ffffffff82577a00 T hidpp20_root_get_feature +ffffffff82577ac0 T hidpp20_feature_get_count +ffffffff82577b60 T hidpp20_feature_get_id +ffffffff82577c10 T hidpp_send_fap_report +ffffffff82577cf0 T hidpp_send_rap_report +ffffffff82577db0 T hidpp20_battery_status_is_charging +ffffffff82577df0 T hidpp20_unified_battery_status_is_charging +ffffffff82577e30 T hidpp_send_validate +ffffffff82577e80 T hidpp_send_report +ffffffff82579000 T ucc_match +ffffffff825790a0 T ucc_attach +ffffffff825791b0 T ucc_detach +ffffffff82579210 T ucc_intr +ffffffff82579250 T ucc_enable +ffffffff8257a000 T iic_match +ffffffff8257a050 T iic_attach +ffffffff8257a0c0 T iicbus_print +ffffffff8257a110 T iic_print +ffffffff8257a180 T iic_search +ffffffff8257a250 T iic_is_compatible +ffffffff8257b000 T iic_exec +ffffffff8257b2c0 T iic_smbus_write_byte +ffffffff8257b3c0 T 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ihidev_open +ffffffff8259b580 T ihidev_close +ffffffff8259b680 T ihidev_ioctl +ffffffff8259b6b0 T ihidev_get_report_desc +ffffffff8259b6f0 T ihidev_report_type_conv +ffffffff8259b730 T ihidev_get_report +ffffffff8259b7b0 T ihidev_set_report +ffffffff8259c000 T ikbd_cngetc +ffffffff8259c080 T ikbd_cnpollc +ffffffff8259c0f0 T ikbd_cnbell +ffffffff8259c110 T ikbd_enable +ffffffff8259c190 T ikbd_set_leds +ffffffff8259c1c0 T ikbd_ioctl +ffffffff8259c270 T ikbd_match +ffffffff8259c2e0 T ikbd_attach +ffffffff8259c440 T ikbd_detach +ffffffff8259c460 T ikbd_intr +ffffffff8259d000 T ims_enable +ffffffff8259d050 T ims_ioctl +ffffffff8259d0c0 T ims_disable +ffffffff8259d0f0 T ims_match +ffffffff8259d1e0 T ims_attach +ffffffff8259d2d0 T ims_detach +ffffffff8259d2f0 T ims_intr +ffffffff8259e000 T imt_enable +ffffffff8259e070 T imt_ioctl +ffffffff8259e100 T imt_disable +ffffffff8259e130 T imt_match +ffffffff8259e1d0 T imt_attach +ffffffff8259e2d0 T imt_detach +ffffffff8259e2f0 T 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acpi_founddock +ffffffff825ab160 T acpi_foundvideo +ffffffff825ab210 T acpi_create_thread +ffffffff825ab280 T acpi_write_pmreg +ffffffff825ab5d0 T acpi_dotask +ffffffff825ab670 T is_ata +ffffffff825ab710 T is_ejectable +ffffffff825ab760 T is_ejectable_bay +ffffffff825ab870 T acpiide_notify +ffffffff825ab9d0 T acpi_sleep_task +ffffffff825aba40 T acpi_record_event +ffffffff825abab0 T acpi_resuming +ffffffff825abb10 T acpi_reset +ffffffff825abbd0 T acpi_gpe_task +ffffffff825abc40 T acpi_pbtn_task +ffffffff825abd90 T acpi_powerdown_task +ffffffff825abde0 T acpi_sbtn_task +ffffffff825abe50 T acpi_interrupt +ffffffff825ac430 T acpi_enable_onegpe +ffffffff825ac590 T acpi_disable_allgpes +ffffffff825ac6e0 T acpi_enable_rungpes +ffffffff825ac770 T acpi_enable_wakegpes +ffffffff825ac7f0 T acpi_set_gpehandler +ffffffff825ac8c0 T acpi_find_gpe +ffffffff825ac910 T acpi_gpe +ffffffff825acaf0 T acpi_foundprw +ffffffff825acc40 T acpi_toggle_wakedev +ffffffff825acca0 T acpi_sleep_pm +ffffffff825ad0a0 T acpi_resume_pm +ffffffff825ad4d0 T acpi_indicator +ffffffff825ad530 T acpi_powerdown +ffffffff825ad5f0 T acpi_map_address +ffffffff825ad670 T acpi_thread +ffffffff825ad890 T acpi_getprop +ffffffff825ada20 T acpi_getpropint +ffffffff825adb70 T acpi_parsehid +ffffffff825adcc0 T acpi_attach_deps +ffffffff825ade10 T acpi_parse_resources +ffffffff825ae140 T acpi_parse_crs +ffffffff825ae1b0 T acpi_batcount +ffffffff825ae200 T acpi_apminfo +ffffffff825af000 T acpi_checksum +ffffffff825b0000 T aml_pc +ffffffff825b0030 T _aml_die +ffffffff825b0420 T aml_nodename +ffffffff825b04c0 T aml_getstack +ffffffff825b0840 T aml_showvalue +ffffffff825b0e40 T aml_hashopcodes +ffffffff825b0f40 T _acpi_os_malloc +ffffffff825b0fa0 T aml_findopcode +ffffffff825b1010 T aml_mnem +ffffffff825b12b0 T aml_getname +ffffffff825b1410 T _acpi_os_free +ffffffff825b1470 T acpi_sleep +ffffffff825b14c0 T acpi_stall +ffffffff825b14e0 T aml_tstbit +ffffffff825b1530 T aml_setbit +ffffffff825b1580 T acpi_poll +ffffffff825b15f0 T acpi_poll_notify_task +ffffffff825b1660 T aml_notify_task +ffffffff825b16e0 T aml_register_notify +ffffffff825b17e0 T aml_notify +ffffffff825b1830 T aml_notify_dev +ffffffff825b18c0 T __aml_search +ffffffff825b1a20 T aml_allocvalue +ffffffff825b1ab0 T aml_delchildren +ffffffff825b1bd0 T aml_delref +ffffffff825b1c60 T acpi_glk_enter +ffffffff825b1cd0 T acpi_glk_leave +ffffffff825b1d60 T aml_lockfield +ffffffff825b1de0 T aml_unlockfield +ffffffff825b1e70 T aml_val2int +ffffffff825b1fe0 T aml_bufcpy +ffffffff825b20b0 T aml_hextoint +ffffffff825b2130 T _aml_setvalue +ffffffff825b2390 T aml_copyvalue +ffffffff825b2580 T aml_addref +ffffffff825b25b0 T aml_freevalue +ffffffff825b2790 T aml_convradix +ffffffff825b2820 T aml_lsb +ffffffff825b2880 T aml_msb +ffffffff825b28d0 T aml_evalexpr +ffffffff825b2ce0 T aml_walknodes +ffffffff825b2da0 T aml_find_node +ffffffff825b2e80 T aml_parseopcode +ffffffff825b2f20 T aml_parsename +ffffffff825b3110 T aml_parselength +ffffffff825b31a0 T aml_parseend +ffffffff825b3240 T aml_eisaid +ffffffff825b3300 T aml_callosi +ffffffff825b34a0 T aml_create_defaultobjects +ffffffff825b3660 T aml_mapresource +ffffffff825b3730 T aml_parse_resource +ffffffff825b3890 T aml_foreachpkg +ffffffff825b3910 T aml_fixup_node +ffffffff825b3b50 T aml_searchname +ffffffff825b3b70 T aml_postparse +ffffffff825b3ba0 T aml_val_to_string +ffffffff825b3c80 T aml_findscope +ffffffff825b3d20 T aml_pushscope +ffffffff825b3e00 T aml_popscope +ffffffff825b3f20 T aml_matchtest +ffffffff825b3fa0 T aml_match +ffffffff825b41e0 T aml_convert +ffffffff825b4810 T aml_compare +ffffffff825b48f0 T aml_concat +ffffffff825b4c20 T aml_ccrlen +ffffffff825b4c70 T aml_concatres +ffffffff825b5010 T aml_mid +ffffffff825b50e0 T aml_evalhid +ffffffff825b5270 T aml_evalname +ffffffff825b52c0 T aml_opreg_sysmem_handler +ffffffff825b5310 T aml_opreg_sysio_handler +ffffffff825b5370 T aml_opreg_pcicfg_handler +ffffffff825b53d0 T aml_opreg_ec_handler +ffffffff825b5430 T aml_register_regionspace +ffffffff825b5520 T aml_evalnode +ffffffff825b5680 T aml_rdpciaddr +ffffffff825b57f0 T aml_evalinteger +ffffffff825b5890 T acpi_genio +ffffffff825b5a70 T aml_rwgen +ffffffff825b6220 T aml_rwgpio +ffffffff825b63e0 T aml_rwgsb +ffffffff825b6700 T aml_rwindexfield +ffffffff825b6b80 T aml_rwfield +ffffffff825b7000 T aml_createfield +ffffffff825b70e0 T aml_parsefieldlist +ffffffff825b74a0 T aml_parse +ffffffff825ba3a0 T acpi_mutex_acquire +ffffffff825ba440 T acpi_mutex_release +ffffffff825ba4e0 T acpi_event_wait +ffffffff825ba5d0 T acpi_event_signal +ffffffff825ba620 T acpi_event_reset +ffffffff825ba650 T aml_store +ffffffff825bab30 T aml_gettgt +ffffffff825bab80 T __aml_searchname +ffffffff825bacd0 T aml_disprintf +ffffffff825bad40 T aml_disasm +ffffffff825bbea0 T aml_parsesimple +ffffffff825bc210 T aml_eval +ffffffff825bc680 T aml_seterror +ffffffff825bc7c0 T aml_loadtable +ffffffff825bc9c0 T acpi_parse_aml +ffffffff825bcb20 T aml_load +ffffffff825bcc80 T aml_node_setval +ffffffff825bcd20 T aml_searchrel +ffffffff825bcd90 T acpi_getdevlist +ffffffff825bd1a0 T acpi_freedevlist +ffffffff825be000 T db_opregion +ffffffff825be040 T db_aml_dump +ffffffff825be0c0 T db_aml_showvalue +ffffffff825be4c0 T db_aml_objtype +ffffffff825be680 T db_aml_walktree +ffffffff825be6e0 T db_parse_name +ffffffff825be830 T db_acpi_showval +ffffffff825be8c0 T db_disprint +ffffffff825be930 T db_acpi_disasm +ffffffff825bea80 T db_acpi_tree +ffffffff825beaa0 T db_acpi_trace +ffffffff825bf000 T acpitimermatch +ffffffff825bf070 T acpitimerattach +ffffffff825bf170 T acpitimer_delay +ffffffff825bf2d0 T acpitimer_read +ffffffff825bf370 T acpi_get_timecount +ffffffff825c0000 T acpiac_match +ffffffff825c0030 T acpiac_attach +ffffffff825c0180 T acpiac_activate +ffffffff825c0210 T acpiac_getpsr +ffffffff825c0280 T acpiac_notify +ffffffff825c0330 T acpiac_refresh +ffffffff825c1000 T acpibat_match +ffffffff825c1060 T acpibat_attach +ffffffff825c11f0 T acpibat_activate +ffffffff825c1280 T acpibat_getbix +ffffffff825c15a0 T acpibat_getbst +ffffffff825c16a0 T acpibat_monitor +ffffffff825c19a0 T acpibat_refresh +ffffffff825c1e80 T acpibat_notify +ffffffff825c2000 T acpibtn_match +ffffffff825c2030 T acpibtn_attach +ffffffff825c2300 T acpibtn_activate +ffffffff825c2380 T acpibtn_numopenlids +ffffffff825c2430 T acpibtn_setpsw +ffffffff825c24e0 T acpibtn_disable_psw +ffffffff825c25d0 T acpibtn_enable_psw +ffffffff825c26d0 T acpibtn_notify +ffffffff825c3000 T acpicmos_match +ffffffff825c3030 T acpicmos_attach +ffffffff825c3080 T acpicmos_opreg_handler +ffffffff825c4000 T acpicpu_match +ffffffff825c40c0 T acpicpu_attach +ffffffff825c4590 T acpicpu_set_pdc +ffffffff825c4840 T acpicpu_add_cstate +ffffffff825c4900 T acpicpu_add_cstatepkg +ffffffff825c4c30 t check_mwait_hints +ffffffff825c4cc0 T acpicpu_add_cdeppkg +ffffffff825c4d80 T acpicpu_getcst +ffffffff825c4f50 T acpicpu_getcst_from_fadt +ffffffff825c5080 T acpicpu_print_one_cst +ffffffff825c51a0 T acpicpu_print_cst +ffffffff825c5240 T acpicpu_idle +ffffffff825c5520 T acpicpu_getpss +ffffffff825c5770 T acpicpu_getppc +ffffffff825c5810 T acpicpu_getpct +ffffffff825c5970 T acpicpu_notify +ffffffff825c5ae0 T acpicpu_setperf +ffffffff825c5cc0 T acpicpu_set_notify +ffffffff825c5d00 T acpicpu_setperf_ppc_change +ffffffff825c5d50 T acpicpu_fetch_pss +ffffffff825c6000 T acpihpet_match +ffffffff825c6060 T acpihpet_attach +ffffffff825c6270 T acpihpet_activate +ffffffff825c68d0 T acpihpet_r +ffffffff825c6950 T acpihpet_w +ffffffff825c69b0 T acpihpet_delay +ffffffff825c6a80 T acpihpet_gettime +ffffffff825c7000 T acpiec_match +ffffffff825c70a0 T acpiec_attach +ffffffff825c7350 T acpiec_wait +ffffffff825c7420 T acpiec_status +ffffffff825c7440 T acpiec_write_data +ffffffff825c74f0 T acpiec_write_cmd +ffffffff825c75a0 T acpiec_read_data +ffffffff825c7650 T acpiec_sci_event +ffffffff825c77d0 T acpiec_read_1 +ffffffff825c79b0 T acpiec_write_1 +ffffffff825c7ba0 T acpiec_burst_enable +ffffffff825c7d00 T acpiec_burst_disable +ffffffff825c7de0 T acpiec_read +ffffffff825c7e80 T acpiec_write +ffffffff825c7f20 T acpiec_getcrs +ffffffff825c80f0 T acpiec_reg +ffffffff825c81b0 T acpiec_get_events +ffffffff825c8250 T acpiec_gpehandler +ffffffff825c8360 T acpiec_parse_resources +ffffffff825c9000 T acpitz_match +ffffffff825c9080 T acpitz_attach +ffffffff825c9600 T acpitz_activate +ffffffff825c9640 T acpitz_init_perf +ffffffff825c96a0 T acpitz_setperf +ffffffff825c9700 T acpitz_init +ffffffff825c98f0 T acpitz_getreading +ffffffff825c9960 T acpitz_gettempreading +ffffffff825c9aa0 T acpitz_notify +ffffffff825c9b10 T acpitz_setfan +ffffffff825c9df0 T acpitz_refresh +ffffffff825cb000 T acpimadt_match +ffffffff825cb060 T acpimadt_attach +ffffffff825cb800 T acpimadt_validate +ffffffff825cb930 T acpimadt_cfg_intr +ffffffff825cb9d0 T acpimadt_print +ffffffff825cc000 T acpimcfg_match +ffffffff825cc060 T acpimcfg_attach +ffffffff825cd000 T acpiprt_match +ffffffff825cd070 T acpiprt_attach +ffffffff825cd190 T acpiprt_getpcibus +ffffffff825cd1d0 T acpiprt_prt_add +ffffffff825cd640 T acpiprt_getirq +ffffffff825cd740 T acpiprt_chooseirq +ffffffff825cd900 T acpiprt_route_interrupt +ffffffff825ce000 T acpidmar_match +ffffffff825ce080 T acpidmar_attach +ffffffff825ce140 T acpidmar_activate +ffffffff825ce380 T dmar_bdf +ffffffff825ce400 T domain_map_check +ffffffff825ce580 T acpidmar_pci_attach +ffffffff825ce650 T dmar_ptmap +ffffffff825ce6d0 T domain_map_pthru +ffffffff825ce750 T domain_map_page_intel +ffffffff825ce8d0 T iommu_flush_cache +ffffffff825ce920 T iommu_alloc_page +ffffffff825ce9c0 T pte_lvl +ffffffff825ceae0 T domain_map_page_amd +ffffffff825cebb0 T domain_unload_map +ffffffff825cedc0 T dom_bdf +ffffffff825cee90 T domain_load_map +ffffffff825cf0c0 T iommu_enable_translation +ffffffff825cf340 T iommu_flush_tlb +ffffffff825cf4c0 T iommu_flush_write_buffer +ffffffff825cf630 T iommu_set_rtaddr +ffffffff825cf760 T iommu_write_8 +ffffffff825cf790 T iommu_write_4 +ffffffff825cf7c0 T iommu_read_4 +ffffffff825cf7e0 T iommu_alloc_hwdte +ffffffff825cf930 T iommu_issue_qi +ffffffff825cf960 T iommu_flush_tlb_qi +ffffffff825cf990 T iommu_flush_ctx_qi +ffffffff825cf9c0 T ivhd_invalidate_domain +ffffffff825cfa20 T iommu_read_8 +ffffffff825cfa40 T iommu_flush_ctx +ffffffff825cfb60 T iommu_enable_qi +ffffffff825cfc80 T iommu_showcfg +ffffffff825cfea0 T iommu_init +ffffffff825d01e0 T acpidmar_intr_establish +ffffffff825d02f0 T acpidmar_intr +ffffffff825d0480 T acpidmar_match_devscope +ffffffff825d05c0 T domain_create +ffffffff825d0800 t dmar_dmamap_create +ffffffff825d0820 t dmar_dmamap_destroy +ffffffff825d0830 t dmar_dmamap_load +ffffffff825d08a0 t dmar_dmamap_load_mbuf +ffffffff825d0900 t dmar_dmamap_load_uio +ffffffff825d0960 t dmar_dmamap_load_raw +ffffffff825d09d0 t dmar_dmamap_unload +ffffffff825d0a00 t dmar_dmamap_sync +ffffffff825d0a20 t dmar_dmamem_alloc +ffffffff825d0a40 t dmar_dmamem_free +ffffffff825d0a60 t dmar_dmamem_map +ffffffff825d0a80 t dmar_dmamem_unmap +ffffffff825d0aa0 t dmar_dmamem_mmap +ffffffff825d0ac0 T domain_add_device +ffffffff825d0b40 T domain_remove_device +ffffffff825d0bf0 T domain_lookup +ffffffff825d0db0 T _iommu_map +ffffffff825d0e70 T _iommu_domain +ffffffff825d0ed0 T domain_map_device +ffffffff825d11d0 T ivhd_flush_devtab +ffffffff825d1230 T acpidmar_pci_hook +ffffffff825d13f0 T acpidmar_parse_devscope +ffffffff825d1510 T acpidmar_drhd +ffffffff825d16e0 T acpidmar_rmrr +ffffffff825d1970 T acpidmar_atsr +ffffffff825d1b10 T acpidmar_init +ffffffff825d1f60 T acpiivhd_intr +ffffffff825d2040 T ivhd_poll_events +ffffffff825d2100 T ivhd_intr_map +ffffffff825d21b0 T _dumppte +ffffffff825d22e0 T ivhd_showpage +ffffffff825d2420 T ivhd_show_event +ffffffff825d2cc0 T ivhd_showdte +ffffffff825d2da0 T ivhd_showcmd +ffffffff825d2e60 T _ivhd_issue_command +ffffffff825d2f40 T ivhd_issue_command +ffffffff825d3210 T ivhd_invalidate_iommu_all +ffffffff825d3300 T ivhd_invalidate_interrupt_table +ffffffff825d33f0 T ivhd_showreg +ffffffff825d3530 T ivhd_checkerr +ffffffff825d3770 T ivhd_iommu_init +ffffffff825d3c50 T acpiivrs_ivhd +ffffffff825d3cc0 T acpiivrs_init +ffffffff825d3df0 T acpidmar_msi_hwmask +ffffffff825d3e60 T acpidmar_msi_hwunmask +ffffffff825d3ed0 T acpidmar_msi_addroute +ffffffff825d3f80 T acpidmar_msi_delroute +ffffffff825d3fa0 T iommu_showfault +ffffffff825d4160 T iommu_showpte +ffffffff825d5000 T acpidock_match +ffffffff825d5070 T acpidock_attach +ffffffff825d5390 T acpidock_status +ffffffff825d5420 T acpidock_docklock +ffffffff825d5500 T acpidock_dockctl +ffffffff825d55e0 T acpidock_foundejd +ffffffff825d5690 T acpidock_notify +ffffffff825d5b70 T acpidock_eject +ffffffff825d5c60 T acpidock_walkchildren +ffffffff825d6000 T abl_match +ffffffff825d6030 T abl_attach +ffffffff825d6220 T abl_get_brightness +ffffffff825d62a0 T abl_get_param +ffffffff825d6300 T abl_set_param +ffffffff825d63c0 T abl_set_brightness +ffffffff825d7000 T asmc_match +ffffffff825d7050 T asmc_attach +ffffffff825d75d0 T asmc_activate +ffffffff825d7660 T asmc_try +ffffffff825d7a20 T asmc_get_backlight +ffffffff825d7aa0 T asmc_set_backlight +ffffffff825d7b30 T asmc_backlight +ffffffff825d7bc0 T asmc_init +ffffffff825d7dc0 T asmc_update +ffffffff825d7f60 T asmc_detach +ffffffff825d8110 t asmc_temp +ffffffff825d82a0 t asmc_fan +ffffffff825d8460 t asmc_light +ffffffff825d9000 T acpiasus_match +ffffffff825d9030 T acpiasus_attach +ffffffff825d9150 T acpiasus_activate +ffffffff825d92e0 T acpiasus_init +ffffffff825d93c0 T acpiasus_notify +ffffffff825da000 T thinkpad_match +ffffffff825da0b0 T thinkpad_attach +ffffffff825da4c0 T thinkpad_activate +ffffffff825da640 T thinkpad_sensor_attach +ffffffff825da7b0 T thinkpad_get_temp +ffffffff825da840 T thinkpad_sensor_refresh +ffffffff825da9c0 T thinkpad_get_volume_mute +ffffffff825daa30 T thinkpad_attach_deferred +ffffffff825daa50 T thinkpad_enable_events +ffffffff825dac20 T thinkpad_get_kbd_backlight +ffffffff825dacb0 T thinkpad_set_kbd_backlight +ffffffff825dad80 T thinkpad_get_param +ffffffff825dade0 T thinkpad_set_param +ffffffff825daea0 T thinkpad_battery_setchargestart +ffffffff825daff0 T thinkpad_battery_setchargestop +ffffffff825db140 T thinkpad_battery_setchargemode +ffffffff825db710 T thinkpad_hotkey +ffffffff825dbd40 T thinkpad_brightness_up +ffffffff825dbee0 T thinkpad_brightness_down +ffffffff825dc090 T thinkpad_toggle_bluetooth +ffffffff825dc1b0 T thinkpad_volume_mute +ffffffff825dc260 T thinkpad_volume_down +ffffffff825dc310 T thinkpad_volume_up +ffffffff825dc3c0 T thinkpad_get_thinklight +ffffffff825dc410 T thinkpad_adaptive_change +ffffffff825dc530 T thinkpad_get_brightness +ffffffff825dc570 T thinkpad_toggle_wan +ffffffff825dc690 T thinkpad_cmos +ffffffff825dc740 T thinkpad_set_brightness +ffffffff825dc830 T thinkpad_set_thinklight +ffffffff825dc8f0 T thinkpad_battery_inhibit_charge +ffffffff825dca20 T thinkpad_battery_force_discharge +ffffffff825dd000 T toshiba_match +ffffffff825dd0a0 T toshiba_attach +ffffffff825dd180 T get_param_brightness +ffffffff825dd1e0 T acpitoshiba_get_param +ffffffff825dd240 T set_param_brightness +ffffffff825dd2d0 T toshiba_update_brightness +ffffffff825dd3d0 T acpitoshiba_set_param +ffffffff825dd470 T toshiba_set_brightness +ffffffff825dd590 T toshiba_enable_events +ffffffff825dd620 T toshiba_read_events +ffffffff825dd780 T toshiba_hotkey +ffffffff825dd9b0 T toshiba_get_brightness +ffffffff825ddb20 T toshiba_fn_key_brightness_up +ffffffff825ddc70 T toshiba_fn_key_brightness_down +ffffffff825dddc0 T toshiba_fn_key_video_output +ffffffff825ddf10 T toshiba_get_video_output +ffffffff825de080 T toshiba_set_video_output +ffffffff825df000 T acpisony_match +ffffffff825df070 T acpisony_attach +ffffffff825df0e0 T acpisony_activate +ffffffff825df120 T acpisony_notify_setup +ffffffff825df310 T acpisony_notify +ffffffff825df6b0 T acpisony_find_offset +ffffffff825df7c0 T acpisony_set_hotkey +ffffffff825df9b0 T acpisony_brightness_down +ffffffff825dfac0 T acpisony_get_brightness +ffffffff825dfb40 T acpisony_set_brightness +ffffffff825e0000 T acpivideo_match +ffffffff825e0070 T acpivideo_attach +ffffffff825e01d0 T acpivideo_getpcibus +ffffffff825e0210 T acpivideo_notify +ffffffff825e0270 T acpivideo_set_policy +ffffffff825e0340 T acpi_foundvout +ffffffff825e0410 T acpivideo_print +ffffffff825e1000 T acpivout_match +ffffffff825e1070 T acpivout_attach +ffffffff825e11c0 T acpivout_notify +ffffffff825e1270 T acpivout_get_bcl +ffffffff825e1390 T acpivout_get_brightness +ffffffff825e1430 T acpivout_get_param +ffffffff825e14d0 T acpivout_set_param +ffffffff825e1630 T acpivout_select_brightness +ffffffff825e1700 T acpivout_find_brightness +ffffffff825e1790 T acpivout_set_brightness +ffffffff825e2000 T acpipwrres_match +ffffffff825e2070 T acpipwrres_attach +ffffffff825e22b0 T acpipwrres_foundcons +ffffffff825e2440 T acpipwrres_ref_incr +ffffffff825e24d0 T acpipwrres_hascons +ffffffff825e2520 T acpipwrres_ref_decr +ffffffff825e25b0 T acpipwrres_addcons +ffffffff825e3000 T aibs_match +ffffffff825e3030 T aibs_attach +ffffffff825e3140 T aibs_probe +ffffffff825e32a0 T aibs_attach_new +ffffffff825e33c0 T aibs_attach_sif +ffffffff825e3590 T aibs_notify +ffffffff825e3600 T aibs_add_sensor +ffffffff825e3850 T aibs_getpack +ffffffff825e38d0 T aibs_refresh +ffffffff825e3930 T aibs_refresh_r +ffffffff825e3a70 T aibs_getvalue +ffffffff825e3bc0 T aibs_find_cb +ffffffff825e4000 T aplgpio_match +ffffffff825e4060 T aplgpio_attach +ffffffff825e4310 T aplgpio_intr +ffffffff825e4460 T aplgpio_read_pin +ffffffff825e44b0 T aplgpio_write_pin +ffffffff825e4520 T aplgpio_intr_establish +ffffffff825e4640 T aplgpio_intr_enable +ffffffff825e46d0 T aplgpio_intr_disable +ffffffff825e5000 T bytgpio_match +ffffffff825e5060 T bytgpio_attach +ffffffff825e5320 T bytgpio_intr +ffffffff825e5450 T bytgpio_read_pin +ffffffff825e54b0 T bytgpio_write_pin +ffffffff825e5530 T bytgpio_intr_establish +ffffffff825e55a0 T bytgpio_intr_enable +ffffffff825e5690 T bytgpio_intr_disable +ffffffff825e6000 T chvgpio_match +ffffffff825e6060 T chvgpio_attach +ffffffff825e6300 T chvgpio_intr +ffffffff825e63d0 T chvgpio_read_pin +ffffffff825e6480 T chvgpio_write_pin +ffffffff825e6540 T chvgpio_intr_establish +ffffffff825e6710 T chvgpio_intr_enable +ffffffff825e67e0 T chvgpio_intr_disable +ffffffff825e68b0 T chvgpio_opreg_handler +ffffffff825e6930 T chvgpio_check_pin +ffffffff825e7000 T glkgpio_match +ffffffff825e7060 T glkgpio_attach +ffffffff825e7310 T glkgpio_intr +ffffffff825e7460 T glkgpio_read_pin +ffffffff825e74c0 T glkgpio_write_pin +ffffffff825e7530 T glkgpio_intr_establish +ffffffff825e7650 T glkgpio_intr_enable +ffffffff825e76e0 T glkgpio_intr_disable +ffffffff825e8000 T pchgpio_match +ffffffff825e8060 T pchgpio_attach +ffffffff825e8530 T pchgpio_activate +ffffffff825e85e0 T pchgpio_intr +ffffffff825e8800 T pchgpio_read_pin +ffffffff825e88f0 T pchgpio_write_pin +ffffffff825e8a00 T pchgpio_intr_establish +ffffffff825e8c20 T pchgpio_intr_enable +ffffffff825e8d50 T pchgpio_intr_disable +ffffffff825e8e80 T pchgpio_save +ffffffff825e8ef0 T pchgpio_restore +ffffffff825e8f60 T pchgpio_find_group +ffffffff825e8fe0 T pchgpio_intr_handle +ffffffff825e90c0 T pchgpio_save_pin +ffffffff825e9280 T pchgpio_restore_pin +ffffffff825ea000 T tipmic_match +ffffffff825ea050 T tipmic_attach +ffffffff825ea250 T tipmic_write_1 +ffffffff825ea310 T tipmic_intr +ffffffff825ea470 T tipmic_get_lpat +ffffffff825ea580 T tipmic_read_pin +ffffffff825ea5b0 T tipmic_write_pin +ffffffff825ea5e0 T tipmic_thermal_opreg_handler +ffffffff825eae60 T tipmic_power_opreg_handler +ffffffff825eb100 T tipmic_read_1 +ffffffff825eb1d0 T tipmic_raw_to_temp +ffffffff825ec000 T ccpmic_match +ffffffff825ec050 T ccpmic_attach +ffffffff825ec130 T ccpmic_get_lpat +ffffffff825ec240 T ccpmic_read_pin +ffffffff825ec3c0 T ccpmic_write_pin +ffffffff825ec520 T ccpmic_thermal_opreg_handler +ffffffff825ec770 T ccpmic_power_opreg_handler +ffffffff825ec960 T ccpmic_read_1 +ffffffff825eca30 T ccpmic_write_1 +ffffffff825ecaf0 T ccpmic_raw_to_temp +ffffffff825ed000 T com_acpi_match +ffffffff825ed120 T com_acpi_attach +ffffffff825ed3a0 T com_acpi_is_designware +ffffffff825ed400 T com_acpi_intr_designware +ffffffff825ed430 T com_acpi_is_console +ffffffff825ee000 T sdhc_acpi_match +ffffffff825ee060 T sdhc_acpi_attach +ffffffff825ee370 T sdhc_acpi_parse_resources +ffffffff825ee420 T sdhc_acpi_card_detect_gpio +ffffffff825ee480 T sdhc_acpi_card_detect_intr +ffffffff825ee4c0 T sdhc_acpi_power_on +ffffffff825ee540 T sdhc_acpi_explore +ffffffff825ee570 T sdhc_acpi_card_detect_nonremovable +ffffffff825ee5a0 T sdhc_acpi_do_explore +ffffffff825ef000 T dwiic_acpi_match +ffffffff825ef050 T dwiic_acpi_attach +ffffffff825ef410 T dwiic_acpi_parse_crs +ffffffff825ef560 T dwiic_acpi_power +ffffffff825ef670 T dwiic_acpi_get_params +ffffffff825ef7b0 T dwiic_i2c_intr_establish +ffffffff825ef830 T dwiic_i2c_intr_disestablish +ffffffff825ef850 T dwiic_i2c_intr_string +ffffffff825ef8e0 T dwiic_acpi_acquire_bus +ffffffff825ef930 T dwiic_acpi_release_bus +ffffffff825ef960 T dwiic_acpi_bus_scan +ffffffff825ef9a0 T dwiic_acpi_found_hid +ffffffff825efd00 T dwiic_matchhids +ffffffff825efd90 T dwiic_acpi_found_ihidev +ffffffff825f0000 T dwiic_acpi_found_iatp +ffffffff825f0160 T dwiic_acpi_found_ietp +ffffffff825f1000 T acpicbkbd_match +ffffffff825f1030 T acpicbkbd_attach +ffffffff825f10d0 T acpicbkbd_activate +ffffffff825f1120 T acpicbkbd_get_backlight +ffffffff825f11a0 T acpicbkbd_set_backlight +ffffffff825f1240 T acpicbkbd_write_backlight +ffffffff825f2000 T acpials_match +ffffffff825f2090 T acpials_attach +ffffffff825f2230 T acpials_read +ffffffff825f22b0 T acpials_addtask +ffffffff825f22f0 T acpials_notify +ffffffff825f2380 T acpials_update +ffffffff825f3000 T tpm_match +ffffffff825f3050 T tpm_attach +ffffffff825f3320 T tpm_activate +ffffffff825f3430 T tpm2_start_method +ffffffff825f34b0 T tpm_probe +ffffffff825f3560 T tpm_init_tis +ffffffff825f37d0 T tpm_init_crb +ffffffff825f3b10 T tpm_suspend +ffffffff825f3c00 T tpm_resume +ffffffff825f3c30 T tpm_write_tis +ffffffff825f3fc0 T tpm_read_tis +ffffffff825f4190 T tpm_write_crb +ffffffff825f4570 T tpm_read_crb +ffffffff825f4870 T tpm_request_locality_tis +ffffffff825f4960 T tpm_request_locality_crb +ffffffff825f4a60 T tpm_release_locality_crb +ffffffff825f4ab0 T tpm_release_locality_tis +ffffffff825f4b20 T tpm_getburst +ffffffff825f4bd0 T tpm_status +ffffffff825f4bf0 T tpm_waitfor +ffffffff825f4cd0 T tpm_waitfor_status +ffffffff825f5000 T acpihve_match +ffffffff825f50b0 T acpihve_attach +ffffffff825f6000 T acpisbs_match +ffffffff825f6030 T acpisbs_attach +ffffffff825f62b0 T acpisbs_activate +ffffffff825f6390 T acpisbs_read +ffffffff825f6450 T acpisbs_setup_sensors +ffffffff825f6550 T acpisbs_refresh_sensors +ffffffff825f66a0 T acpisbs_notify +ffffffff825f67e0 T acpi_smbus_read +ffffffff825f7000 T surface_match +ffffffff825f7060 T surface_attach +ffffffff825f70c0 T surface_hotkey +ffffffff825f8000 T ipmi_acpi_match +ffffffff825f8030 T ipmi_acpi_attach +ffffffff825f8260 T ipmi_acpi_parse_crs +ffffffff825f9000 T amdgpio_match +ffffffff825f9060 T amdgpio_attach +ffffffff825f92a0 T amdgpio_activate +ffffffff825f9390 T amdgpio_intr +ffffffff825f9530 T amdgpio_read_pin +ffffffff825f9580 T amdgpio_write_pin +ffffffff825f95f0 T amdgpio_intr_establish +ffffffff825f96e0 T amdgpio_intr_enable +ffffffff825f9760 T amdgpio_intr_disable +ffffffff825f97e0 T amdgpio_save +ffffffff825f9860 T amdgpio_restore +ffffffff825f98f0 T amdgpio_save_pin +ffffffff825f9960 T amdgpio_restore_pin +ffffffff825f99d0 T amdgpio_pin_intr +ffffffff825fa000 T acpihid_match +ffffffff825fa030 T acpihid_attach +ffffffff825fa210 T acpihid_init_dsm +ffffffff825fa370 T acpihid_eval +ffffffff825fa590 T acpihid_notify +ffffffff825fa5f0 T acpihid_button_array_enable +ffffffff825fb000 t iosf_acpi_match +ffffffff825fb050 t iosf_acpi_attach +ffffffff825fb150 t iosf_acpi_mbi_mdr_rd +ffffffff825fb1c0 t iosf_acpi_mbi_mdr_wr +ffffffff825fc000 T acpi_match +ffffffff825fc060 T acpi_attach +ffffffff825fc0a0 T acpi_probe +ffffffff825fc240 T acpi_map +ffffffff825fc330 T acpi_unmap +ffffffff825fc380 T acpi_bus_space_map +ffffffff825fc3a0 T acpi_bus_space_unmap +ffffffff825fc3c0 T acpi_intr_establish +ffffffff825fc500 T acpi_intr_disestablish +ffffffff825fc510 T acpi_scan +ffffffff825fc6b0 T acpi_acquire_glk +ffffffff825fc710 T acpi_release_glk +ffffffff825fc760 T acpi_attach_machdep +ffffffff825fc8f0 T acpi_sleep_cpu +ffffffff825fca90 T acpi_resume_cpu +ffffffff825fcb90 T sleep_mp +ffffffff825fcc80 T resume_mp +ffffffff825fcd70 T acpi_iommu_device_map +ffffffff825fd000 T hibernate_resume_machdep +ffffffff825fd050 T hibernate_drop_to_real_mode +ffffffff825fd060 T hibernate_activate_resume_pt_machdep +ffffffff825fd0a0 T hibernate_switch_stack_machdep +ffffffff825fd0e0 T hibernate_flush +ffffffff825fd110 T acpi_savecpu +ffffffff825fe000 T sleep_showstate +ffffffff825fe0f0 T sleep_setstate +ffffffff825fe150 T gosleep +ffffffff825fe210 T sleep_abort +ffffffff825fe240 T sleep_resume +ffffffff825fe2c0 T suspend_finish +ffffffff825ff000 T acpiopen +ffffffff825ff0d0 T acpiclose +ffffffff825ff160 T acpiioctl +ffffffff825ff2b0 T request_sleep +ffffffff825ff330 T acpi_filtdetach +ffffffff825ff380 T acpi_filtread +ffffffff825ff3c0 T acpikqfilter +ffffffff82600000 T acpipci_match +ffffffff82600030 T acpipci_attach +ffffffff826002f0 T acpipci_osc +ffffffff82600430 T acpipci_parse_resources +ffffffff82600560 T acpipci_attach_bus +ffffffff82600730 T acpipci_print +ffffffff826007a0 T acpipci_attach_busses +ffffffff82601000 T efiopen +ffffffff82601040 T eficlose +ffffffff82601070 T efiioctl +ffffffff82601110 T efiioc_get_table +ffffffff82601280 T efiioc_var_get +ffffffff82601500 T efiioc_var_next +ffffffff82601720 T efiioc_var_set +ffffffff826018a0 T efi_adapt_error +ffffffff82602000 T efi_match +ffffffff82602060 T efi_attach +ffffffff82602330 T efi_map_runtime +ffffffff826024b0 T efi_enter +ffffffff82602550 T efi_leave +ffffffff826025d0 T efi_fault +ffffffff82603000 T vmm_probe +ffffffff82603050 T vmm_attach +ffffffff82603170 T vmm_activate +ffffffff826032b0 T vmmopen +ffffffff82603300 T vmmclose +ffffffff82603330 T vm_find +ffffffff82603450 T vmmioctl +ffffffff826036d0 T vm_create +ffffffff826039a0 T vm_get_info +ffffffff82603bf0 T vm_terminate +ffffffff82603d60 T vm_resetcpu +ffffffff82603e80 T vm_share_mem +ffffffff82603fd0 T pledge_ioctl_vmm +ffffffff826040c0 T vm_find_vcpu +ffffffff82604120 T vm_create_check_mem_ranges +ffffffff826042e0 T vm_teardown +ffffffff82604420 T vcpu_must_stop +ffffffff82605000 T vmm_enabled +ffffffff82605080 T vmm_attach_machdep +ffffffff82605230 T vmm_quiesce_vmx +ffffffff82605400 T vmm_activate_machdep +ffffffff82605490 T vmm_stop +ffffffff826055d0 T vmm_start +ffffffff826056d0 T vmmioctl_machdep +ffffffff826057a0 T vm_intr_pending +ffffffff82605840 T vm_mprotect_ept +ffffffff82605ac0 T pledge_ioctl_vmm_machdep +ffffffff82605b10 T vm_rwvmparams +ffffffff82605cb0 T vmm_init_pvclock +ffffffff82605d90 T vm_rwregs +ffffffff82605ea0 T vcpu_readregs_vmx +ffffffff826062d0 T vcpu_writeregs_vmx +ffffffff82606740 T vcpu_readregs_svm +ffffffff82606bf0 T vcpu_writeregs_svm +ffffffff826070c0 T vmm_get_guest_memtype +ffffffff82607140 T vmx_mprotect_ept +ffffffff826073a0 T vmx_pmap_find_pte_ept +ffffffff82607470 T start_vmm_on_cpu +ffffffff82607590 T stop_vmm_on_cpu +ffffffff82607630 T vmclear_on_cpu +ffffffff826076b0 T vm_impl_init +ffffffff82607800 T vm_impl_deinit +ffffffff82607830 T vcpu_reload_vmcs_vmx +ffffffff82607970 T vcpu_reset_regs_svm +ffffffff82607d00 T svm_setmsrbrw +ffffffff82607e10 T svm_setmsrbr +ffffffff82607ee0 T vmm_alloc_vpid +ffffffff82607ff0 T svm_setmsrbw +ffffffff826080d0 T vmx_setmsrbr +ffffffff82608180 T vmx_setmsrbw +ffffffff82608230 T vmx_setmsrbrw +ffffffff82608340 T svm_set_clean +ffffffff82608390 T svm_set_dirty +ffffffff826083e0 T vcpu_reset_regs_vmx +ffffffff82608e10 T vcpu_vmx_check_cap +ffffffff82608f10 T vcpu_vmx_compute_ctrl +ffffffff826090f0 T vcpu_init_vmx +ffffffff82609440 T vcpu_deinit_vmx +ffffffff82609580 T vcpu_reset_regs +ffffffff826095c0 T vcpu_init_svm +ffffffff82609750 T vcpu_deinit_svm +ffffffff82609890 T vcpu_init +ffffffff82609950 T vmm_free_vpid +ffffffff826099c0 T vcpu_deinit +ffffffff82609a00 T vm_run +ffffffff82609bd0 T vcpu_run_vmx +ffffffff8260a4e0 T vcpu_run_svm +ffffffff8260ab40 T vmm_fpurestore +ffffffff8260ac00 T vmm_fpusave +ffffffff8260ac80 T vmm_translate_gva +ffffffff8260af90 T vmm_update_pvclock +ffffffff8260b090 T vmx_get_exit_info +ffffffff8260b0f0 T vmx_handle_exit +ffffffff8260b4c0 T vmx_instruction_error_decode +ffffffff8260b690 T vmm_get_guest_cpu_cpl +ffffffff8260b780 T vmx_handle_intr +ffffffff8260b810 T svm_handle_hlt +ffffffff8260b860 T vmx_handle_hlt +ffffffff8260b910 T svm_handle_exit +ffffffff8260bc70 T svm_handle_np_fault +ffffffff8260bdf0 T vmm_handle_cpuid +ffffffff8260c480 T svm_handle_msr +ffffffff8260c770 T svm_handle_xsetbv +ffffffff8260c820 T svm_handle_inout +ffffffff8260c920 T vmm_inject_ud +ffffffff8260c960 T vmm_inject_db +ffffffff8260c9a0 T vmx_handle_np_fault +ffffffff8260cb00 T vmx_handle_inout +ffffffff8260cc70 T vmx_handle_cr +ffffffff8260ce70 T vmx_handle_rdmsr +ffffffff8260cf60 T vmx_handle_wrmsr +ffffffff8260d200 T vmx_handle_xsetbv +ffffffff8260d2f0 T vmm_inject_gp +ffffffff8260d330 T vmx_get_exit_qualification +ffffffff8260d390 T vmx_get_guest_faulttype +ffffffff8260d430 T svm_get_guest_faulttype +ffffffff8260d460 T svm_fault_page +ffffffff8260d4f0 T vmx_fault_page +ffffffff8260d640 T vmm_get_guest_cpu_mode +ffffffff8260d740 T vmx_load_pdptes +ffffffff8260d9c0 T vmx_handle_cr0_write +ffffffff8260dbe0 T vmx_handle_cr4_write +ffffffff8260dc90 T vmm_handle_xsetbv +ffffffff8260dd30 T vmx_handle_misc_enable_msr +ffffffff8260dd90 T vmm_pat_is_valid +ffffffff8260de70 t vmm_handle_cpuid_0xd +ffffffff8260df70 T vmm_gpa_is_valid +ffffffff8260dfe0 T vmx_exit_reason_decode +ffffffff8260e020 T svm_exit_reason_decode +ffffffff8260ee30 T vcpu_state_decode +ffffffff8260f000 T vmm_dispatch_intr +ffffffff8260f020 T vmxon +ffffffff8260f050 T vmxoff +ffffffff8260f080 T vmclear +ffffffff8260f0b0 T vmptrld +ffffffff8260f0e0 T vmptrst +ffffffff8260f110 T vmwrite +ffffffff8260f140 T vmread +ffffffff8260f170 T invvpid +ffffffff8260f18b t invvpid_fail +ffffffff8260f192 t invvpid_ret +ffffffff8260f1b0 T invept +ffffffff8260f1cb t invept_fail +ffffffff8260f1d2 t invept_ret +ffffffff8260f1f0 T vmx_enter_guest +ffffffff8260f21b t skip_init +ffffffff8260f288 t no_l1df_msr +ffffffff8260f28b t l1df_tlb_loop +ffffffff8260f2a4 t l1df_tlb_done +ffffffff8260f2ac t l1df_load_cache +ffffffff8260f2c3 t done_flush +ffffffff8260f356 t do_resume +ffffffff8260f3db t fail_launch_or_resume +ffffffff8260f41d t fail_launch_unknown +ffffffff8260f42a t fail_launch_invalid_vmcs +ffffffff8260f437 t fail_launch_valid_vmcs +ffffffff8260f454 t vmx_exit_handler_asm +ffffffff8260f519 t restore_host +ffffffff8260f540 T svm_enter_guest +ffffffff8260f6c2 t restore_host_svm +ffffffff82610000 T sdmmc_match +ffffffff82610050 T sdmmc_attach +ffffffff82610390 T sdmmc_detach +ffffffff82610440 T sdmmc_activate +ffffffff82610510 T sdmmc_discover_task +ffffffff826105d0 T sdmmc_create_thread +ffffffff82610640 T sdmmc_holds_root_device +ffffffff826106a0 T sdmmc_task_thread +ffffffff82610890 T sdmmc_needs_discover +ffffffff82610940 T sdmmc_del_task +ffffffff826109f0 T sdmmc_card_detach +ffffffff82610ad0 T sdmmc_add_task +ffffffff82610b50 T sdmmc_card_attach +ffffffff82610c60 T sdmmc_enable +ffffffff82610db0 T sdmmc_scan +ffffffff82610e40 T sdmmc_init +ffffffff82610f40 T sdmmc_disable +ffffffff826110a0 T sdmmc_function_free +ffffffff826110c0 T sdmmc_delay +ffffffff82611110 T sdmmc_select_card +ffffffff82611330 T sdmmc_set_bus_power +ffffffff826114e0 T sdmmc_function_alloc +ffffffff82611570 T sdmmc_app_command +ffffffff82611700 T sdmmc_mmc_command +ffffffff82611780 T sdmmc_go_idle_state +ffffffff82611890 T sdmmc_send_if_cond +ffffffff826119e0 T sdmmc_set_relative_addr +ffffffff82612000 T sdmmc_cisptr +ffffffff826120a0 T sdmmc_read_cis +ffffffff826123e0 T sdmmc_print_cis +ffffffff82612550 T sdmmc_check_cis_quirks +ffffffff82613000 T sdmmc_io_enable +ffffffff826132a0 T sdmmc_io_reset +ffffffff826133d0 T sdmmc_io_send_op_cond +ffffffff82613540 T sdmmc_io_scan +ffffffff82613690 T sdmmc_io_init +ffffffff826137c0 T sdmmc_io_set_highspeed +ffffffff82613a60 T sdmmc_io_set_bus_width +ffffffff82613cf0 T sdmmc_io_function_ready +ffffffff82613e70 T sdmmc_io_read_1 +ffffffff82613fc0 T sdmmc_io_function_enable +ffffffff82614390 T sdmmc_io_write_1 +ffffffff82614510 T sdmmc_io_function_disable +ffffffff82614790 T sdmmc_io_attach +ffffffff82614880 T sdmmc_print +ffffffff82614ad0 T sdmmc_submatch +ffffffff82614b50 T sdmmc_io_detach +ffffffff82614c00 T sdmmc_io_rw_direct +ffffffff82614da0 T sdmmc_io_rw_extended_subr +ffffffff82614f40 T sdmmc_io_rw_extended +ffffffff82615340 T sdmmc_io_read_2 +ffffffff826154a0 T sdmmc_io_write_2 +ffffffff82615600 T sdmmc_io_read_4 +ffffffff82615760 T sdmmc_io_write_4 +ffffffff826158c0 T sdmmc_io_read_multi_1 +ffffffff826159b0 T sdmmc_io_write_multi_1 +ffffffff82615aa0 T sdmmc_io_read_region_1 +ffffffff82615b90 T sdmmc_io_write_region_1 +ffffffff82615c80 T sdmmc_io_xchg +ffffffff82615e10 T sdmmc_intr_enable +ffffffff82616080 T sdmmc_intr_disable +ffffffff826162f0 T sdmmc_intr_establish +ffffffff826163f0 T sdmmc_intr_disestablish +ffffffff826164e0 T sdmmc_card_intr +ffffffff82616530 T sdmmc_intr_task +ffffffff826165c0 T sdmmc_io_set_blocklen +ffffffff82617000 T sdmmc_mem_enable +ffffffff82617450 T sdmmc_mem_send_op_cond +ffffffff82617600 T sdmmc_mem_signal_voltage +ffffffff826176c0 T sdmmc_mem_scan +ffffffff826179d0 T sdmmc_decode_csd +ffffffff82617e00 T sdmmc_decode_cid +ffffffff826182a0 T sdmmc_mem_send_scr +ffffffff826183e0 T sdmmc_mem_decode_scr +ffffffff82618440 T sdmmc_mem_send_cxd_data +ffffffff826185b0 T sdmmc_mem_set_bus_width +ffffffff826186c0 T sdmmc_mem_sd_switch +ffffffff82618970 T sdmmc_be512_to_bitfield512 +ffffffff82618a20 T sdmmc_mem_mmc_switch +ffffffff82618b10 T sdmmc_mem_init +ffffffff82618c60 T sdmmc_mem_set_blocklen +ffffffff82618d60 T sdmmc_mem_sd_init +ffffffff82619140 T sdmmc_mem_mmc_init +ffffffff82619800 T sdmmc_mem_select_transfer_mode +ffffffff82619880 T sdmmc_mem_execute_tuning +ffffffff82619910 T sdmmc_mem_read_block_subr +ffffffff82619c70 T sdmmc_mem_single_read_block +ffffffff82619d40 T sdmmc_mem_read_block +ffffffff82619ef0 T sdmmc_mem_write_block_subr +ffffffff8261a240 T sdmmc_mem_single_write_block +ffffffff8261a310 T sdmmc_mem_write_block +ffffffff8261a4c0 T sdmmc_mem_hibernate_write +ffffffff8261b000 T sdmmc_scsi_cmd +ffffffff8261b1f0 T sdmmc_minphys +ffffffff8261b270 T sdmmc_scsi_attach +ffffffff8261b460 T sdmmc_alloc_ccbs +ffffffff8261b5a0 T sdmmc_free_ccbs +ffffffff8261b600 T sdmmc_scsi_detach +ffffffff8261b760 T sdmmc_stimeout +ffffffff8261b7e0 T sdmmc_ccb_alloc +ffffffff8261b890 T sdmmc_ccb_free +ffffffff8261b970 T sdmmc_inquiry +ffffffff8261bbe0 T sdmmc_start_xs +ffffffff8261bcd0 T sdmmc_complete_xs +ffffffff8261bda0 T sdmmc_done_xs +ffffffff8261bdf0 T sdmmc_scsi_hibernate_io +ffffffff8261c000 T bwfm_sdio_preinit +ffffffff8261c4a0 T bwfm_sdio_txcheck +ffffffff8261c4e0 T bwfm_sdio_txdata +ffffffff8261c550 T bwfm_sdio_txctl +ffffffff8261c6a0 T bwfm_sdio_buscore_read +ffffffff8261c6b0 T bwfm_sdio_buscore_write +ffffffff8261c6d0 T bwfm_sdio_buscore_prepare +ffffffff8261c810 T bwfm_sdio_buscore_activate +ffffffff8261c890 T bwfm_sdio_match +ffffffff8261c940 T bwfm_sdio_attach +ffffffff8261cc00 T bwfm_sdio_detach +ffffffff8261cc60 T bwfm_sdio_task +ffffffff8261cdc0 T bwfm_sdio_write_1 +ffffffff8261cdf0 T bwfm_sdio_read_1 +ffffffff8261ce20 T bwfm_sdio_write_4 +ffffffff8261ced0 T bwfm_sdio_read_4 +ffffffff8261cf80 T bwfm_sdio_load_microcode +ffffffff8261d1e0 T bwfm_sdio_clkctl +ffffffff8261d310 T bwfm_sdio_dev_write +ffffffff8261d360 T bwfm_sdio_intr +ffffffff8261d3a0 T bwfm_sdio_ram_read_write +ffffffff8261d5d0 T bwfm_sdio_htclk +ffffffff8261d840 T bwfm_sdio_readshared +ffffffff8261d910 T bwfm_sdio_dev_read +ffffffff8261d950 T bwfm_sdio_rx_frames +ffffffff8261dd00 T bwfm_sdio_tx_frames +ffffffff8261de00 T bwfm_sdio_backplane +ffffffff8261deb0 T bwfm_sdio_buf_read +ffffffff8261df90 T bwfm_sdio_buf_write +ffffffff8261e040 T bwfm_sdio_frame_read_write +ffffffff8261e1c0 T bwfm_sdio_newbuf +ffffffff8261e240 T bwfm_sdio_tx_ok +ffffffff8261e2a0 T bwfm_sdio_tx_ctrlframe +ffffffff8261e3a0 T bwfm_sdio_tx_dataframe +ffffffff8261e4f0 T bwfm_sdio_rx_glom +ffffffff8261f000 T onewire_match +ffffffff8261f050 T onewire_attach +ffffffff8261f0f0 T onewire_detach +ffffffff8261f160 T onewire_activate +ffffffff8261f180 T onewire_scan +ffffffff8261f3a0 T onewire_createthread +ffffffff8261f410 T onewire_print +ffffffff8261f4e0 T onewirebus_print +ffffffff8261f530 T onewire_lock +ffffffff8261f550 T onewire_unlock +ffffffff8261f570 T onewire_reset +ffffffff8261f590 T onewire_bit +ffffffff8261f5b0 T onewire_read_byte +ffffffff8261f6f0 T onewire_write_byte +ffffffff8261f7d0 T onewire_read_block +ffffffff8261f870 T onewire_write_block +ffffffff8261f910 T onewire_triplet +ffffffff8261f9f0 T onewire_matchrom +ffffffff8261fb40 T onewire_search +ffffffff8261fee0 T onewire_thread +ffffffff82620000 T onewire_crc +ffffffff826200b0 T onewire_crc16 +ffffffff82620170 T onewire_famname +ffffffff826201b0 T onewire_matchbyfam +ffffffff82621000 T owid_match +ffffffff82621030 T owid_attach +ffffffff82621100 T owid_detach +ffffffff82621140 T owid_activate +ffffffff82622000 T owsbm_match +ffffffff82622030 T owsbm_attach +ffffffff826221d0 T owsbm_detach +ffffffff82622240 T owsbm_activate +ffffffff82622270 T owsbm_update +ffffffff82623000 T owtemp_match +ffffffff82623030 T owtemp_attach +ffffffff82623130 T owtemp_detach +ffffffff826231a0 T owtemp_activate +ffffffff826231d0 T owtemp_update +ffffffff82624000 T owctr_match +ffffffff82624030 T owctr_attach +ffffffff82624180 T owctr_detach +ffffffff826241f0 T owctr_activate +ffffffff82624220 T owctr_update +ffffffff82624250 T owctr_update_counter +ffffffff82625000 A __text_page_start +ffffffff82625000 T Xsyscall_meltdown +ffffffff8262500c T Xsyscall +ffffffff82625299 t Xsyscall_trampback +ffffffff826252b0 T intr_user_exit +ffffffff826252f2 t intr_user_exit_post_ast +ffffffff8262544b t Xiretq_trampback +ffffffff82625457 T doreti_iret +ffffffff82626000 T alltraps +ffffffff82626138 T recall_trap +ffffffff82626150 T alltraps_kern +ffffffff82626153 T alltraps_kern_meltdown +ffffffff82627000 ? Xtrap00 +ffffffff82627000 A __kutext_start +ffffffff82627000 A __text_page_end +ffffffff82627010 ? Xtrap01 +ffffffff82627020 ? Xtrap02 +ffffffff82627028 c calltrap_specstk +ffffffff826270f0 ? calltrap_specstk_tramp +ffffffff82627110 ? Xtrap03 +ffffffff82627120 ? Xtrap04 +ffffffff82627130 ? Xtrap05 +ffffffff82627140 ? Xtrap06 +ffffffff82627150 ? Xtrap07 +ffffffff82627160 ? Xtrap08 +ffffffff82627170 ? Xtrap09 +ffffffff82627180 ? Xtrap0a +ffffffff82627190 ? Xtrap0b +ffffffff826271a0 ? Xtrap0c +ffffffff826271b0 ? Xtrap0d +ffffffff82627240 ? Xtrap0e +ffffffff82627250 ? Xintrspurious +ffffffff82627250 ? Xtrap0f +ffffffff82627260 ? Xtrap10 +ffffffff82627270 ? Xtrap11 +ffffffff82627280 ? Xtrap12 +ffffffff82627290 ? Xtrap13 +ffffffff826272a0 ? Xtrap14 +ffffffff826272b0 ? Xtrap15 +ffffffff826272c0 ? Xtrap16 +ffffffff826272c0 ? Xtrap17 +ffffffff826272c0 ? Xtrap18 +ffffffff826272c0 ? Xtrap19 +ffffffff826272c0 ? Xtrap1a +ffffffff826272c0 ? Xtrap1b +ffffffff826272c0 ? Xtrap1c +ffffffff826272c0 ? Xtrap1d +ffffffff826272c0 ? Xtrap1e +ffffffff826272c0 ? Xtrap1f +ffffffff826272d0 ? x2apic_eoi +ffffffff826272f0 ? Xintr_lapic_ipi +ffffffff82627330 ? Xipi_invltlb +ffffffff82627360 ? Xipi_invlpg +ffffffff82627390 ? Xipi_invlrange +ffffffff826273d0 ? Xipi_invltlb_pcid +ffffffff82627410 ? Xipi_invlpg_pcid +ffffffff82627460 ? Xipi_invlrange_pcid +ffffffff826274d0 ? Xintr_lapic_ltimer +ffffffff82627510 ? Xintr_xen_upcall +ffffffff82627550 ? Xintr_hyperv_upcall +ffffffff82627590 ? Xintr_legacy0 +ffffffff826275d0 ? Xintr_legacy1 +ffffffff82627610 ? Xintr_legacy2 +ffffffff82627650 ? Xintr_legacy3 +ffffffff82627690 ? Xintr_legacy4 +ffffffff826276d0 ? Xintr_legacy5 +ffffffff82627710 ? Xintr_legacy6 +ffffffff82627750 ? Xintr_legacy7 +ffffffff82627790 ? Xintr_legacy8 +ffffffff826277d0 ? Xintr_legacy9 +ffffffff82627810 ? Xintr_legacy10 +ffffffff82627850 ? Xintr_legacy11 +ffffffff82627890 ? Xintr_legacy12 +ffffffff826278d0 ? Xintr_legacy13 +ffffffff82627910 ? Xintr_legacy14 +ffffffff82627950 ? Xintr_legacy15 +ffffffff82627990 ? Xintr_ioapic_edge0 +ffffffff826279d0 ? Xintr_ioapic_edge1 +ffffffff82627a10 ? Xintr_ioapic_edge2 +ffffffff82627a50 ? Xintr_ioapic_edge3 +ffffffff82627a90 ? Xintr_ioapic_edge4 +ffffffff82627ad0 ? Xintr_ioapic_edge5 +ffffffff82627b10 ? Xintr_ioapic_edge6 +ffffffff82627b50 ? Xintr_ioapic_edge7 +ffffffff82627b90 ? Xintr_ioapic_edge8 +ffffffff82627bd0 ? Xintr_ioapic_edge9 +ffffffff82627c10 ? Xintr_ioapic_edge10 +ffffffff82627c50 ? Xintr_ioapic_edge11 +ffffffff82627c90 ? Xintr_ioapic_edge12 +ffffffff82627cd0 ? Xintr_ioapic_edge13 +ffffffff82627d10 ? Xintr_ioapic_edge14 +ffffffff82627d50 ? Xintr_ioapic_edge15 +ffffffff82627d90 ? Xintr_ioapic_edge16 +ffffffff82627dd0 ? Xintr_ioapic_edge17 +ffffffff82627e10 ? Xintr_ioapic_edge18 +ffffffff82627e50 ? Xintr_ioapic_edge19 +ffffffff82627e90 ? Xintr_ioapic_edge20 +ffffffff82627ed0 ? Xintr_ioapic_edge21 +ffffffff82627f10 ? Xintr_ioapic_edge22 +ffffffff82627f50 ? Xintr_ioapic_edge23 +ffffffff82627f90 ? Xintr_ioapic_edge24 +ffffffff82627fd0 ? Xintr_ioapic_edge25 +ffffffff82628010 ? Xintr_ioapic_edge26 +ffffffff82628050 ? Xintr_ioapic_edge27 +ffffffff82628090 ? Xintr_ioapic_edge28 +ffffffff826280d0 ? Xintr_ioapic_edge29 +ffffffff82628110 ? Xintr_ioapic_edge30 +ffffffff82628150 ? Xintr_ioapic_edge31 +ffffffff82628190 ? Xintr_ioapic_edge32 +ffffffff826281d0 ? Xintr_ioapic_edge33 +ffffffff82628210 ? Xintr_ioapic_edge34 +ffffffff82628250 ? Xintr_ioapic_edge35 +ffffffff82628290 ? Xintr_ioapic_edge36 +ffffffff826282d0 ? Xintr_ioapic_edge37 +ffffffff82628310 ? Xintr_ioapic_edge38 +ffffffff82628350 ? Xintr_ioapic_edge39 +ffffffff82628390 ? Xintr_ioapic_edge40 +ffffffff826283d0 ? Xintr_ioapic_edge41 +ffffffff82628410 ? Xintr_ioapic_edge42 +ffffffff82628450 ? Xintr_ioapic_edge43 +ffffffff82628490 ? Xintr_ioapic_edge44 +ffffffff826284d0 ? Xintr_ioapic_edge45 +ffffffff82628510 ? Xintr_ioapic_edge46 +ffffffff82628550 ? Xintr_ioapic_edge47 +ffffffff82628590 ? Xintr_ioapic_edge48 +ffffffff826285d0 ? Xintr_ioapic_edge49 +ffffffff82628610 ? Xintr_ioapic_edge50 +ffffffff82628650 ? Xintr_ioapic_edge51 +ffffffff82628690 ? Xintr_ioapic_edge52 +ffffffff826286d0 ? Xintr_ioapic_edge53 +ffffffff82628710 ? Xintr_ioapic_edge54 +ffffffff82628750 ? Xintr_ioapic_edge55 +ffffffff82628790 ? Xintr_ioapic_edge56 +ffffffff826287d0 ? Xintr_ioapic_edge57 +ffffffff82628810 ? Xintr_ioapic_edge58 +ffffffff82628850 ? Xintr_ioapic_edge59 +ffffffff82628890 ? Xintr_ioapic_edge60 +ffffffff826288d0 ? Xintr_ioapic_edge61 +ffffffff82628910 ? Xintr_ioapic_edge62 +ffffffff82628950 ? Xintr_ioapic_edge63 +ffffffff82628990 ? Xintr_ioapic_level0 +ffffffff826289d0 ? Xintr_ioapic_level1 +ffffffff82628a10 ? Xintr_ioapic_level2 +ffffffff82628a50 ? Xintr_ioapic_level3 +ffffffff82628a90 ? Xintr_ioapic_level4 +ffffffff82628ad0 ? Xintr_ioapic_level5 +ffffffff82628b10 ? Xintr_ioapic_level6 +ffffffff82628b50 ? Xintr_ioapic_level7 +ffffffff82628b90 ? Xintr_ioapic_level8 +ffffffff82628bd0 ? Xintr_ioapic_level9 +ffffffff82628c10 ? Xintr_ioapic_level10 +ffffffff82628c50 ? Xintr_ioapic_level11 +ffffffff82628c90 ? Xintr_ioapic_level12 +ffffffff82628cd0 ? Xintr_ioapic_level13 +ffffffff82628d10 ? Xintr_ioapic_level14 +ffffffff82628d50 ? Xintr_ioapic_level15 +ffffffff82628d90 ? Xintr_ioapic_level16 +ffffffff82628dd0 ? Xintr_ioapic_level17 +ffffffff82628e10 ? Xintr_ioapic_level18 +ffffffff82628e50 ? Xintr_ioapic_level19 +ffffffff82628e90 ? Xintr_ioapic_level20 +ffffffff82628ed0 ? Xintr_ioapic_level21 +ffffffff82628f10 ? Xintr_ioapic_level22 +ffffffff82628f50 ? Xintr_ioapic_level23 +ffffffff82628f90 ? Xintr_ioapic_level24 +ffffffff82628fd0 ? Xintr_ioapic_level25 +ffffffff82629010 ? Xintr_ioapic_level26 +ffffffff82629050 ? Xintr_ioapic_level27 +ffffffff82629090 ? Xintr_ioapic_level28 +ffffffff826290d0 ? Xintr_ioapic_level29 +ffffffff82629110 ? Xintr_ioapic_level30 +ffffffff82629150 ? Xintr_ioapic_level31 +ffffffff82629190 ? Xintr_ioapic_level32 +ffffffff826291d0 ? Xintr_ioapic_level33 +ffffffff82629210 ? Xintr_ioapic_level34 +ffffffff82629250 ? Xintr_ioapic_level35 +ffffffff82629290 ? Xintr_ioapic_level36 +ffffffff826292d0 ? Xintr_ioapic_level37 +ffffffff82629310 ? Xintr_ioapic_level38 +ffffffff82629350 ? Xintr_ioapic_level39 +ffffffff82629390 ? Xintr_ioapic_level40 +ffffffff826293d0 ? Xintr_ioapic_level41 +ffffffff82629410 ? Xintr_ioapic_level42 +ffffffff82629450 ? Xintr_ioapic_level43 +ffffffff82629490 ? Xintr_ioapic_level44 +ffffffff826294d0 ? Xintr_ioapic_level45 +ffffffff82629510 ? Xintr_ioapic_level46 +ffffffff82629550 ? Xintr_ioapic_level47 +ffffffff82629590 ? Xintr_ioapic_level48 +ffffffff826295d0 ? Xintr_ioapic_level49 +ffffffff82629610 ? Xintr_ioapic_level50 +ffffffff82629650 ? Xintr_ioapic_level51 +ffffffff82629690 ? Xintr_ioapic_level52 +ffffffff826296d0 ? Xintr_ioapic_level53 +ffffffff82629710 ? Xintr_ioapic_level54 +ffffffff82629750 ? Xintr_ioapic_level55 +ffffffff82629790 ? Xintr_ioapic_level56 +ffffffff826297d0 ? Xintr_ioapic_level57 +ffffffff82629810 ? Xintr_ioapic_level58 +ffffffff82629850 ? Xintr_ioapic_level59 +ffffffff82629890 ? Xintr_ioapic_level60 +ffffffff826298d0 ? Xintr_ioapic_level61 +ffffffff82629910 ? Xintr_ioapic_level62 +ffffffff82629950 ? Xintr_ioapic_level63 +ffffffff8262a000 ? codepatch_fill_nop +ffffffff8262a000 A __cptext_start +ffffffff8262a000 A __kutext_end +ffffffff8262a0b0 ? codepatch_maprw +ffffffff8262a190 ? codepatch_unmaprw +ffffffff8262a200 ? codepatch_nop +ffffffff8262a360 ? codepatch_replace +ffffffff8262a510 ? codepatch_call +ffffffff8262a530 ? codepatch_control_flow +ffffffff8262a740 ? codepatch_jmp +ffffffff8262b000 A __cptext_end +ffffffff8262b000 A __rodata_start +ffffffff8262b000 C _etext +ffffffff8262b000 C etext +ffffffff8262c000 r seeprom_read +ffffffff8262c004 r icl_mg_pll_find_divisors.div1_vals +ffffffff8262c034 r athn_ac2qid +ffffffff8262c034 r athn_ac2qid +ffffffff8262c034 r athn_ac2qid +ffffffff8262c040 r rtwn_get_rssi.cckoff +ffffffff8262c068 r rsu_ac2qid +ffffffff8262c078 r pckbc_portcmd +ffffffff8262c07c r tht_fifo_write_pad.pad +ffffffff8262c084 r rsu_get_rssi.cckoff +ffffffff8262c0a4 r adlp_n_revids +ffffffff8262c0e8 r apple_iso_trans +ffffffff8262c0f0 r wihap_check_tx.txratetable +ffffffff8262c0f4 r dmamode +ffffffff8262c118 r gen9_edram_size_mb.sets +ffffffff8262c12c r dg2_g12_revid_step_tbl +ffffffff8262d000 r isomappings +ffffffff8262d080 r unimappings +ffffffff8262d230 r replacements +ffffffff82630b3d r apollo_pio_rec +ffffffff8267e949 r apollo_udma33_tim +ffffffff8269404b r pp_r600_decoded_lanes +ffffffff826cafb8 r cmd680_setup_channel.udma_tbl +ffffffff826d35a3 r apollo_udma100_tim +ffffffff826d35a9 r cmd0646_9_tim_udma +ffffffff826e1f4d r substchar +ffffffff827394a0 r apollo_udma133_tim +ffffffff827394a7 r apollo_udma66_tim +ffffffff827394d1 r cy_pio_rec +ffffffff8273ed60 R drm_ca +ffffffff8273ed88 R drm_filtops +ffffffff8273edb8 R drmread_filtops +ffffffff8273f000 r vga_emulops +ffffffff8273f048 R vga_stdscreen +ffffffff8273f078 R vga_stdscreen_mono +ffffffff8273f0a8 R vga_stdscreen_bf +ffffffff8273f0d8 R vga_40lscreen +ffffffff8273f108 R vga_40lscreen_mono +ffffffff8273f138 R vga_40lscreen_bf +ffffffff8273f168 R vga_50lscreen +ffffffff8273f198 R vga_50lscreen_mono +ffffffff8273f1c8 R vga_50lscreen_bf +ffffffff8273f1f8 R vga_screenlist +ffffffff8273f208 R vga_screenlist_mono +ffffffff8273f218 R vga_accessops +ffffffff8273f278 r i945_wm_info +ffffffff8273f2b8 r bgansitopc +ffffffff8273f2c0 r pctoansi +ffffffff8273f300 r sdma_offsets +ffffffff8273f300 r sdma_offsets +ffffffff8273f338 r iha_rate_tbl +ffffffff8273f370 r i830_a_wm_info +ffffffff8273f3a8 r gen9_edram_size_mb.ways +ffffffff8273f408 r aggr_periodic_times +ffffffff8273f500 r michael_final.pad +ffffffff8273f528 r rt_copysa.maskarray +ffffffff8273f530 r i915_wm_info +ffffffff8273f538 r amdgpu_ih_clientid_jpeg +ffffffff8273f538 r amdgpu_ih_clientid_uvds +ffffffff8273f538 r amdgpu_ih_clientid_vcns +ffffffff8273f538 r amdgpu_ih_clientid_vcns +ffffffff8273f538 r amdgpu_ih_clientid_vcns +ffffffff8273f568 r jsl_ehl_revids +ffffffff8273f578 r vga_setfontset.cmaptabb +ffffffff8273f5e8 r i830_bc_wm_info +ffffffff8273f650 r hsw_activate_psr2.map +ffffffff8273f658 r tgl_revids +ffffffff8273f690 r __drm_universal_plane_init.default_modifiers +ffffffff8273f6a0 r iwn_tid2fifo +ffffffff8273f6b8 r vga_setfontset.cmaptaba +ffffffff8273f6c0 r crtc_offsets +ffffffff8273f6c0 r crtc_offsets +ffffffff8273f6c0 r crtc_offsets +ffffffff8273f768 r rtwn_r88e_get_rssi.cckoff +ffffffff82740000 R edid_vendors +ffffffff827402c0 R edid_nvendors +ffffffff827402d0 R edid_products +ffffffff82740330 R edid_nproducts +ffffffff82740340 r _edid_modes +ffffffff82741000 R videomode_list +ffffffff82742080 R videomode_count +ffffffff82743000 r ahc_hard_errors +ffffffff82743080 r critical_sections +ffffffff827430b0 r patches +ffffffff82743d50 r seqprog +ffffffff82745000 r ahc_switch +ffffffff82746000 r termstat_strings +ffffffff82746020 r critical_sections +ffffffff82746060 r seqprog +ffffffff82746d50 r patches +ffffffff82748000 r ahd_switch +ffffffff82749000 R aic_switch +ffffffff8274a000 R adw_switch +ffffffff8274b000 R gdt_switch +ffffffff8274c000 R twe_switch +ffffffff8274d000 R ciss_switch +ffffffff8274d030 R ciss_level +ffffffff8274d050 R ciss_stat +ffffffff8274e000 R ami_switch +ffffffff8274e028 R ami_raw_switch +ffffffff8274f000 R mfi_switch +ffffffff8274f028 R mfi_pd_switch +ffffffff8274f050 r mfi_iop_xscale +ffffffff8274f080 r mfi_iop_ppc +ffffffff8274f0b0 r mfi_iop_gen2 +ffffffff8274f0e0 r mfi_iop_skinny +ffffffff8274f110 r mfi_bbu_indicators +ffffffff82750000 R qlw_switch +ffffffff82751000 R isp_2100_risc_code +ffffffff82763bf0 R isp_2200_risc_code +ffffffff82776990 R isp_2300_risc_code +ffffffff82790408 R qla_switch +ffffffff82790430 r qla_regs_2100 +ffffffff82790460 r qla_regs_2200 +ffffffff82790490 r qla_regs_23XX +ffffffff82791000 R ahci_atascsi_methods +ffffffff82792000 R nvme_switch +ffffffff82792028 r nvme_ops +ffffffff82793000 R mpi_switch +ffffffff82793060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff82793090 r chv_oa_mux_regs +ffffffff827930b0 r fiji_clock_stretcher_lookup_table +ffffffff827930b0 r tonga_clock_stretcher_lookup_table +ffffffff827930d0 r iosf_pci_devices +ffffffff827930f0 r link_speed +ffffffff827930f0 r link_speed +ffffffff82793130 r drm_fb_xfrm.default_dst_pitch +ffffffff82793130 r non_supported_protection +ffffffff82793140 r tgl_uy_revids +ffffffff827932b0 r bwi_phy_noise_11g_rev1 +ffffffff82793320 r cardslot_process_event.antonym_ev +ffffffff827933b0 r gen11_oa_mux_regs +ffffffff82793450 r dpia_to_preferred_enc_id_table +ffffffff827934c0 r ddr2_cycle_tenths +ffffffff82793530 r rtw_intr_rx.ratetbl +ffffffff827935b0 r abm_config +ffffffff82793630 r getbootinfo.ports +ffffffff82793680 r reg_offsets +ffffffff82793690 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff827936a0 r glk_revids +ffffffff827936b0 r init_non_clock_fields.look_up +ffffffff827936c0 r uftdi_8u232am_getrate.roundoff +ffffffff82793720 r zyd_rx_data.rates +ffffffff82793740 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff82793770 r intel_engine_init_tlb_invalidation.gen8_regs +ffffffff827937a0 r bwi_phy_noise_11g +ffffffff827937b0 r hpt366_pio +ffffffff82793810 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff82793830 r ether_crc32_be_update.rev +ffffffff82793830 r rtw_grf5101_mac_crypt.caesar +ffffffff82793880 r snb_b_fdi_train_param +ffffffff82793950 r intel_hpll_vco.elk_vco +ffffffff82793970 r icl_revids +ffffffff827939d0 r pin_offsets +ffffffff827939f0 r amdgpu_ih_srcid_jpeg +ffffffff82793a30 r firmware_list +ffffffff82793a90 r atom_arg_shift +ffffffff82793a90 r atom_arg_shift +ffffffff82793ad0 r pf_syncookie_wstab +ffffffff82793af0 r ieee80211_media_init.mopts +ffffffff82793b50 r add_entropy_words.twist_table +ffffffff82793bf0 r urtw_8225v2_txpwr_cck +ffffffff82793c10 r bwfm_pci_prio2fifo +ffffffff82793c10 r ieee80211_up_to_ac.up_to_ac +ffffffff82793cd0 r paritytab +ffffffff82793cd0 r x86emu_parity_tab +ffffffff82793cf0 r legacy_connector_convert +ffffffff82793d30 r gen7_oa_mux_regs +ffffffff82793d50 r hsw_oa_mux_regs +ffffffff82793d70 r notetab +ffffffff82793d90 r urtw_8225v2_txpwr_cck_ch14 +ffffffff82793db0 r bwi_rf_calibval.rf_calibvals +ffffffff82793e50 r pf_syncookie_msstab +ffffffff82793eb0 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff82793f10 r uath_wme_init.uath_wme_11g +ffffffff82793f50 r gen7_oa_b_counters +ffffffff82794150 r rtwn_iq_calib_run.reg_adda +ffffffff82794170 r nfs_backoff +ffffffff827941b0 r atom_def_dst +ffffffff827941b0 r atom_def_dst +ffffffff827941f0 r sha256_initial_hash_value +ffffffff82794250 r otus_edca_def +ffffffff82794270 r intel_hpll_vco.blb_vco +ffffffff82794350 r epic_pci_subsys_info +ffffffff82794370 r kbl_revids +ffffffff82794390 r atom_arg_mask +ffffffff82794390 r atom_arg_mask +ffffffff827943f0 r butmap +ffffffff82794430 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff82794470 r comsoft.lsrmap +ffffffff827944b0 r xgmi3x16_pcs_err_noncorrectable_mask_reg_aldebaran +ffffffff827944d0 r tulip_mii_phy_readspecific.table +ffffffff82794570 r intel_hpll_vco.pnv_vco +ffffffff827945d0 r dmapageport +ffffffff82794690 r intel_hpll_vco.ctg_vco +ffffffff82794750 r drm_calculate_luminance_range.pre_computed_values +ffffffff82795000 R sili_atascsi_methods +ffffffff82796000 R ncr53c9x_switch +ffffffff82797000 r scf_period +ffffffff82798000 R siop_script +ffffffff827985a0 R lun_switch +ffffffff827985d0 R tag_switch +ffffffff82798660 R load_dsa +ffffffff827986c4 R siop_led_on +ffffffff827986cc R siop_led_off +ffffffff827986d8 R siop_switch +ffffffff82799000 R ep_vortex_media +ffffffff82799100 R ep_default_to_media +ffffffff8279a000 R wi_card_ident +ffffffff8279c000 R ucode_table +ffffffff8279d000 r re_revisions +ffffffff8279d290 r re_kstats_tpl +ffffffff8279f000 R smc91cxx_media +ffffffff8279f010 R smc91cxx_mii_bitbang_ops +ffffffff827a0000 R dl10019_mii_bitbang_ops +ffffffff827a0028 R dl10022_mii_bitbang_ops +ffffffff827a1000 R ax88190_mii_bitbang_ops +ffffffff827a3000 R ac97_on_off +ffffffff827a3304 R ac97_mic_select +ffffffff827a3608 R ac97_mono_select +ffffffff827a390c R ac97_source +ffffffff827a3c10 R ac97_volume_stereo +ffffffff827a3c2c R ac97_volume_mono +ffffffff827a3c50 R source_info +ffffffff827a4450 R ac97_ad +ffffffff827a4560 R ac97_ak +ffffffff827a45f0 R ac97_av +ffffffff827a4730 R ac97_rl +ffffffff827a4780 R ac97_cm +ffffffff827a4800 R ac97_cr +ffffffff827a4820 R ac97_cs +ffffffff827a4900 R ac97_cx +ffffffff827a4960 R ac97_dt +ffffffff827a4980 R ac97_em +ffffffff827a49b0 R ac97_es +ffffffff827a49d0 R ac97_is +ffffffff827a49f0 R ac97_ic +ffffffff827a4a70 R ac97_it +ffffffff827a4aa0 R ac97_ns +ffffffff827a4b60 R ac97_ps +ffffffff827a4b90 R ac97_sl +ffffffff827a4bb0 R ac97_st +ffffffff827a4d00 R ac97_vi +ffffffff827a4d30 R ac97_tt +ffffffff827a4db0 R ac97_ti +ffffffff827a4dd0 R ac97_wb +ffffffff827a4df0 R ac97_wo +ffffffff827a4e80 R ac97_ym +ffffffff827a4ed0 R ac97_vendors +ffffffff827a51d0 R ac97enhancement +ffffffff827a52d0 R ac97feature +ffffffff827a6000 R lm_chips +ffffffff827a6020 R lm78_sensors +ffffffff827a61a0 R w83627hf_sensors +ffffffff827a63a0 R w83627ehf_sensors +ffffffff827a65c0 R w83627dhg_sensors +ffffffff827a67c0 R nct6776f_sensors +ffffffff827a6a00 R nct6779d_sensors +ffffffff827a6d60 R w83637hf_sensors +ffffffff827a6f20 R w83697hf_sensors +ffffffff827a70c0 R w83781d_sensors +ffffffff827a7280 R w83782d_sensors +ffffffff827a7480 R w83783s_sensors +ffffffff827a7600 R w83791d_sensors +ffffffff827a7860 R w83792d_sensors +ffffffff827a7ae0 R as99127f_sensors +ffffffff827a8000 r ar5k_known_products +ffffffff827a8110 r ar5111_gain_opt +ffffffff827a81e0 r ar5112_gain_opt +ffffffff827a82b0 r ar5k_5ghz_channels +ffffffff827a8a00 r ar5k_2ghz_channels +ffffffff827a8f10 r ar5111_rf +ffffffff827a9350 r ar5112a_rf +ffffffff827a9890 r ar5112_rf +ffffffff827a9da0 r ar5413_rf +ffffffff827aa1b0 r ar2413_rf +ffffffff827aa4d0 r ar2425_rf +ffffffff827aa830 r ar5111_rfg +ffffffff827aab30 r ar5112_rfg +ffffffff827aae30 r ar5413_rfg +ffffffff827ab130 r ar2413_rfg +ffffffff827ab430 r ar5k_rt_11a +ffffffff827ab552 r ar5k_rt_11b +ffffffff827ab674 r ar5k_rt_11g +ffffffff827ab796 r ar5k_rt_xr +ffffffff827ac000 r ar5210_ini +ffffffff827ad000 r ar5211_mode +ffffffff827ad2c0 r ar5211_ini +ffffffff827adad0 r ar5211_rf +ffffffff827ae000 r ar5212_pcie +ffffffff827ae080 r ar5212_mode +ffffffff827ae310 r ar5212_ini +ffffffff827aec80 r ar5212_ar5111_mode +ffffffff827aef20 r ar5212_ar5112_mode +ffffffff827af1b0 r ar5413_mode +ffffffff827afb10 r ar2413_mode +ffffffff827b0430 r ar2425_mode +ffffffff827b0d90 r ar5111_bbgain +ffffffff827b1090 r ar5112_bbgain +ffffffff827b2000 r athn_5ghz_chans +ffffffff827b2020 r athn_rates +ffffffff827b3000 r athn_rates +ffffffff827b4000 r ar9160_ini +ffffffff827b4068 r ar5416_ini +ffffffff827b40d0 r ar5416_serdes +ffffffff827b40e8 r ar9160_1_1_addac +ffffffff827b40f8 r ar9160_1_0_addac +ffffffff827b4108 r ar5416_2_2_addac +ffffffff827b4118 r ar5416_2_1_addac +ffffffff827b4128 r ar5416_set_power_calib.chainoffset +ffffffff827b4140 r ar9160_bank6tpc_vals +ffffffff827b41c0 r ar5416_bank6tpc_vals +ffffffff827b4240 r ar5416_bb_rfgain_vals_2g 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ar9280_2_0_rx_gain_13db_backoff +ffffffff827b70c0 r ar9280_2_0_rx_gain +ffffffff827b70e0 r ar9280_2_0_tx_gain_high_power +ffffffff827b7100 r ar9280_2_0_tx_gain +ffffffff827b7120 r ar9280_init_from_rom.chainoffset +ffffffff827b7130 r ar9280_2_0_regs +ffffffff827b7190 r ar9280_2_0_vals_5g20 +ffffffff827b7250 r ar9280_2_0_vals_5g40 +ffffffff827b7310 r ar9280_2_0_vals_2g40 +ffffffff827b73d0 r ar9280_2_0_vals_2g20 +ffffffff827b7490 r ar9280_2_0_cm_regs +ffffffff827b7740 r ar9280_2_0_cm_vals +ffffffff827b7c90 r ar9280_2_0_fast_clock_regs +ffffffff827b7cb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff827b7cf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff827b7d30 r ar9280_2_0_serdes_regs +ffffffff827b7d60 r ar9280_2_0_serdes_vals +ffffffff827b7d90 r ar9280_2_0_rx_gain_regs +ffffffff827b7ea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff827b80b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff827b82c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff827b84d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff827b86e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff827b88f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff827b8b00 r ar9280_2_0_tx_gain_regs +ffffffff827b8b40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff827b8bc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff827b8c40 r ar9280_2_0_tx_gain_vals_5g +ffffffff827b8cc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff827b9000 r ar9271_ini +ffffffff827b9068 r ar9285_1_2_ini +ffffffff827b90d0 r ar9280_2_0_serdes +ffffffff827b90e8 r ar9271_tx_gain_high_power +ffffffff827b9108 r ar9271_tx_gain +ffffffff827b9128 r ar9285_2_0_tx_gain_high_power +ffffffff827b9148 r ar9285_2_0_tx_gain +ffffffff827b9168 r ar9285_1_2_tx_gain_high_power +ffffffff827b9188 r ar9285_1_2_tx_gain +ffffffff827b91b0 r ar9271_regs +ffffffff827b9410 r ar9271_vals_2g40 +ffffffff827b98d0 r ar9271_vals_2g20 +ffffffff827b9d90 r ar9271_cm_regs +ffffffff827ba020 r ar9271_cm_vals +ffffffff827ba540 r ar9285_1_2_regs +ffffffff827ba7a0 r ar9285_1_2_vals_2g40 +ffffffff827bac60 r ar9285_1_2_vals_2g20 +ffffffff827bb120 r ar9285_1_2_cm_regs +ffffffff827bb3a0 r ar9285_1_2_cm_vals +ffffffff827bb890 r ar9280_2_0_serdes_regs +ffffffff827bb8c0 r ar9280_2_0_serdes_vals +ffffffff827bb8f0 r ar9271_tx_gain_regs +ffffffff827bb940 r ar9271_tx_gain_high_power_vals_2g +ffffffff827bb9d0 r ar9271_tx_gain_vals_2g +ffffffff827bba60 r ar9285_1_2_tx_gain_regs +ffffffff827bbab0 r ar9285_2_0_tx_gain_high_power_vals_2g +ffffffff827bbb50 r ar9285_2_0_tx_gain_vals_2g +ffffffff827bbbf0 r ar9285_1_2_tx_gain_high_power_vals_2g +ffffffff827bbc90 r ar9285_1_2_tx_gain_vals_2g +ffffffff827bc000 r ar9287_1_1_ini +ffffffff827bc068 r ar9280_2_0_serdes +ffffffff827bc080 r ar9287_1_1_rx_gain +ffffffff827bc0a0 r ar9287_1_1_tx_gain +ffffffff827bc0c0 r ar9287_1_1_regs +ffffffff827bc120 r ar9287_1_1_vals_2g40 +ffffffff827bc1d0 r ar9287_1_1_vals_2g20 +ffffffff827bc280 r ar9287_1_1_cm_regs +ffffffff827bc560 r ar9287_1_1_cm_vals +ffffffff827bcb20 r ar9280_2_0_serdes_regs +ffffffff827bcb50 r ar9280_2_0_serdes_vals +ffffffff827bcb80 r ar9287_1_1_rx_gain_regs +ffffffff827bcd90 r ar9287_1_1_rx_gain_vals_2g +ffffffff827bd1a0 r ar9287_1_1_tx_gain_regs +ffffffff827bd200 r ar9287_1_1_tx_gain_vals_2g +ffffffff827be000 r athn_rates +ffffffff827bf000 r ar9485_1_1_ini +ffffffff827bf068 r ar9485_1_1_serdes +ffffffff827bf080 r ar9380_2_2_ini +ffffffff827bf0e8 r ar9380_2_2_serdes +ffffffff827bf100 r ar9380_2_2_rx_gain_wo_xlna +ffffffff827bf120 r ar9380_2_2_rx_gain +ffffffff827bf140 r ar9485_1_1_rx_gain +ffffffff827bf160 r ar9380_2_2_tx_gain_high_ob_db +ffffffff827bf180 r ar9380_2_2_tx_gain_low_ob_db +ffffffff827bf1a0 r ar9380_2_2_tx_gain_high_power +ffffffff827bf1c0 r ar9380_2_2_tx_gain +ffffffff827bf1e0 r ar9485_1_1_tx_gain +ffffffff827bf200 r ar9485_1_1_regs +ffffffff827bf270 r ar9485_1_1_vals_2g40 +ffffffff827bf350 r ar9485_1_1_vals_2g20 +ffffffff827bf430 r ar9485_1_1_cm_regs +ffffffff827bf720 r ar9485_1_1_cm_vals +ffffffff827bfd00 r ar9485_1_1_serdes_regs +ffffffff827bfd0c r ar9485_1_1_serdes_vals +ffffffff827bfd20 r ar9380_2_2_regs +ffffffff827bfdb0 r ar9380_2_2_vals_5g20 +ffffffff827bfed0 r ar9380_2_2_vals_5g40 +ffffffff827bfff0 r ar9380_2_2_vals_2g40 +ffffffff827c0110 r ar9380_2_2_vals_2g20 +ffffffff827c0230 r ar9380_2_2_cm_regs +ffffffff827c05d0 r ar9380_2_2_cm_vals +ffffffff827c0d00 r ar9380_2_2_fast_clock_regs +ffffffff827c0d20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff827c0d50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff827c0d74 r ar9380_2_2_serdes_regs +ffffffff827c0d80 r ar9380_2_2_serdes_vals +ffffffff827c0d90 r ar9380_2_2_rx_gain_regs +ffffffff827c0f90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff827c1390 r ar9380_2_2_rx_gain_vals +ffffffff827c1790 r ar9485_1_1_rx_gain_regs +ffffffff827c1890 r ar9485_1_1_rx_gain_vals +ffffffff827c1a90 r ar9380_2_2_tx_gain_regs +ffffffff827c1b60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff827c1d00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff827c1ea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff827c2040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff827c21e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff827c2380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff827c2520 r ar9380_2_2_tx_gain_vals_5g +ffffffff827c26c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff827c2860 r ar9485_1_1_tx_gain_regs +ffffffff827c28f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff827c2a10 r ar9380_def_rom +ffffffff827c2e50 r ar9380_def_rom_h112 +ffffffff827c3290 r ar9380_def_rom_h116 +ffffffff827c36d0 r ar9380_def_rom_x112 +ffffffff827c3b10 r ar9380_def_rom_x113 +ffffffff827c4000 R atw_txthresh_tab_lo +ffffffff827c4050 R atw_txthresh_tab_hi +ffffffff827c40a0 r atw_attach.empty_macaddr +ffffffff827c40b0 r atw_attach.type_strings +ffffffff827c40d0 r atw_rfmd2958_ifn +ffffffff827c4110 r atw_rfmd2958_rf1r +ffffffff827c4150 r atw_rxintr.rate_tbl +ffffffff827c5000 r rtw_identify_sta.empty_macaddr +ffffffff827c6000 r rtwn_set_key.etherzeroaddr +ffffffff827c6010 r rtl8188eu_rf_prog +ffffffff827c6030 r rtl8188ftv_rf_prog +ffffffff827c6050 r rtl8192e_rf_prog +ffffffff827c6080 r rtl8188ce_rf_prog +ffffffff827c60a0 r rtl8188ru_rf_prog +ffffffff827c60c0 r rtl8188cu_rf_prog +ffffffff827c60e0 r rtl8192ce_rf_prog +ffffffff827c6110 r rtl8188ru_txagc +ffffffff827c6170 r rtl8188eu_rf_regs +ffffffff827c6230 r rtl8188eu_rf_vals +ffffffff827c63b0 r rtl8188ftv_rf_regs +ffffffff827c6490 r rtl8188ftv_rf_vals +ffffffff827c6640 r rtl8192e_rf_regs +ffffffff827c6710 r rtl8192e_rf_vals +ffffffff827c68b0 r rtl8192e_rf2_regs +ffffffff827c6950 r rtl8192e_rf2_vals +ffffffff827c6a90 r rtl8192ce_rf1_regs +ffffffff827c6bb0 r rtl8188ce_rf_vals +ffffffff827c6df0 r rtl8188ru_rf_vals +ffffffff827c7030 r rtl8188cu_rf_vals +ffffffff827c7270 r rtl8192ce_rf1_vals +ffffffff827c74b0 r rtl8192ce_rf2_regs +ffffffff827c7500 r rtl8192ce_rf2_vals +ffffffff827c75a0 r rtl8192cu_txagc +ffffffff827c8000 r rt2560_rf2522_r2 +ffffffff827c8040 r rt2560_rf2524_r2 +ffffffff827c8080 r rt2560_rf2525_hi_r2 +ffffffff827c80c0 r rt2560_rf2525_r2 +ffffffff827c8100 r rt2560_rf2525e_r2 +ffffffff827c8140 r rt2560_rf2526_hi_r2 +ffffffff827c8180 r rt2560_rf2526_r2 +ffffffff827c81c0 r rt2560_def_bbp +ffffffff827c8200 r rt2560_def_mac +ffffffff827c9000 r rt2661_rf5225_1 +ffffffff827c9300 r rt2661_rf5225_2 +ffffffff827c9600 r rt2661_def_bbp +ffffffff827c9640 r rt2661_def_mac +ffffffff827ca000 r rt2860_rf2850 +ffffffff827ca430 r rt2860_rates +ffffffff827ca4f0 r rt3572_def_rf +ffffffff827ca530 r rt3090_def_rf +ffffffff827ca560 r rt5392_def_rf +ffffffff827ca5e0 r rt3290_def_rf +ffffffff827ca640 r rt5390_def_rf +ffffffff827ca6c0 r rt5390_def_bbp +ffffffff827ca6f0 r rt2860_def_mac +ffffffff827cc000 r acx111_reg +ffffffff827cc040 r acx111_rate_map +ffffffff827cd000 r acx100_reg +ffffffff827cd040 r acx100_txpower_rfmd +ffffffff827cd060 r gen8_rcs_offsets +ffffffff827cd090 r acx100_txpower_maxim +ffffffff827cd0b0 r mtl_rcs_offsets +ffffffff827cd0f0 r digits +ffffffff827cd0f0 r pppdumpb.digits +ffffffff827cd0f0 r pppdumpm.digits +ffffffff827cd140 r hangpic +ffffffff827cd180 r gen11_rcs_offsets +ffffffff827cd1b0 r xehp_rcs_offsets +ffffffff827cd1e0 r dg2_rcs_offsets +ffffffff827cd220 r dg2_xcs_offsets +ffffffff827cd250 r gen12_xcs_offsets +ffffffff827ce000 r trinity_override_mgpg_sequences +ffffffff827ce3c0 r voltage_swing_to_pre_emphasis +ffffffff827ce3d0 r sgpr_init_compute_shader +ffffffff827ce4a0 r intel_hpll_vco.cl_vco +ffffffff827ce4c0 r vgpr_init_compute_shader +ffffffff827cf000 r malo_cmd_string.cmds +ffffffff827cf0b0 r malo_cmd_string_result.results +ffffffff827d0000 R bwi_vendor_led_act +ffffffff827d000c R bwi_default_led_act +ffffffff827d0010 R bwi_led_duration +ffffffff827d0380 r bwi_sup_bphy +ffffffff827d03c0 r bwi_phy_freq_11g_rev1 +ffffffff827d05c0 r bwi_phy_rotor_11g_rev1 +ffffffff827d06a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff827d06e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff827d0720 r bwi_phy_noise_scale_11g +ffffffff827d0760 r bwi_phy_sigma_sq_11g_rev2 +ffffffff827d07d0 r bwi_phy_sigma_sq_11g_rev7 +ffffffff827d0840 r bwi_phy_delay_11g_rev1 +ffffffff827d0920 r bwi_rf_get_gains.save_phy_regs +ffffffff827d0940 r bwi_rf_lo_find.map +ffffffff827d0960 r bwi_txpower_map_11b +ffffffff827d09a0 r bwi_txpower_map_11g +ffffffff827d09e0 r _bwi_rf_lo_update_11g.rf_atten_list +ffffffff827d0a20 r _bwi_rf_lo_update_11g.rf_atten_init_list +ffffffff827d0a60 r _bwi_rf_lo_update_11g.rf_lo_measure_order +ffffffff827d0aa0 r bwi_rf_set_nrssi_ofs_11g.save_phy_comm_regs +ffffffff827d0ac0 r bwi_bbpid_map +ffffffff827d0af0 r bwi_regwin_count +ffffffff827d0b40 r bwi_clkfreq +ffffffff827d0b58 r bwi_zero_addr +ffffffff827d1000 R ipq8074_ops +ffffffff827d1068 R ipq6018_ops +ffffffff827d10d0 R qca6390_ops +ffffffff827d1138 R qcn9074_ops +ffffffff827d11a0 R wcn6855_ops +ffffffff827d1208 R wcn6750_ops +ffffffff827d1270 R ath11k_hw_ring_mask_ipq8074 +ffffffff827d12c8 R ath11k_hw_ring_mask_qca6390 +ffffffff827d1320 R ath11k_hw_ring_mask_qcn9074 +ffffffff827d1378 R ath11k_hw_ring_mask_wcn6750 +ffffffff827d13d0 R ath11k_target_ce_config_wlan_ipq8074 +ffffffff827d14e0 R ath11k_target_service_to_ce_map_wlan_ipq8074 +ffffffff827d15f0 R ath11k_target_service_to_ce_map_wlan_ipq6018 +ffffffff827d16e0 R ath11k_target_ce_config_wlan_qca6390 +ffffffff827d17c0 R ath11k_target_service_to_ce_map_wlan_qca6390 +ffffffff827d1880 R ath11k_target_ce_config_wlan_qcn9074 +ffffffff827d1960 R ath11k_target_service_to_ce_map_wlan_qcn9074 +ffffffff827d1a40 R qwx_host_ce_config_ipq8074 +ffffffff827d1ce0 R qwx_host_ce_config_qca6390 +ffffffff827d1e00 R qwx_host_ce_config_qcn9074 +ffffffff827d1ec0 R ipq8074_regs +ffffffff827d1f94 R qca6390_regs +ffffffff827d2068 R qcn9074_regs +ffffffff827d213c R wcn6855_regs +ffffffff827d2210 R wcn6750_regs +ffffffff827d22f0 R qmi_response_type_v01_ei +ffffffff827d2350 R qmi_wlanfw_ind_register_req_msg_v01_ei +ffffffff827d2670 R qmi_wlanfw_ind_register_resp_msg_v01_ei +ffffffff827d26f0 R qmi_wlanfw_host_cap_req_msg_v01_ei +ffffffff827d2a70 R qmi_wlanfw_host_cap_resp_msg_v01_ei +ffffffff827d2ab0 R qmi_wlanfw_mem_cfg_s_v01_ei +ffffffff827d2b30 R qmi_wlanfw_mem_seg_s_v01_ei +ffffffff827d2bd0 R qmi_wlanfw_request_mem_ind_msg_v01_ei +ffffffff827d2c30 R qmi_wlanfw_mem_seg_resp_s_v01_ei +ffffffff827d2cd0 R qmi_wlanfw_respond_mem_req_msg_v01_ei +ffffffff827d2d30 R qmi_wlanfw_respond_mem_resp_msg_v01_ei +ffffffff827d2d70 R qmi_wlanfw_cap_req_msg_v01_ei +ffffffff827d2d90 R qmi_wlanfw_rf_chip_info_s_v01_ei +ffffffff827d2df0 R qmi_wlanfw_rf_board_info_s_v01_ei +ffffffff827d2e30 R qmi_wlanfw_soc_info_s_v01_ei +ffffffff827d2e70 R qmi_wlanfw_fw_version_info_s_v01_ei +ffffffff827d2ed0 R qmi_wlanfw_cap_resp_msg_v01_ei +ffffffff827d3190 R qmi_wlanfw_bdf_download_req_msg_v01_ei +ffffffff827d3370 R qmi_wlanfw_bdf_download_resp_msg_v01_ei +ffffffff827d33b0 R qmi_wlanfw_m3_info_req_msg_v01_ei +ffffffff827d3410 R qmi_wlanfw_m3_info_resp_msg_v01_ei +ffffffff827d3450 R qmi_wlanfw_wlan_ini_req_msg_v01_ei +ffffffff827d34b0 R qmi_wlanfw_wlan_ini_resp_msg_v01_ei +ffffffff827d34f0 R qmi_wlanfw_ce_tgt_pipe_cfg_s_v01_ei +ffffffff827d35b0 R qmi_wlanfw_ce_svc_pipe_cfg_s_v01_ei +ffffffff827d3630 R qmi_wlanfw_shadow_reg_cfg_s_v01_ei +ffffffff827d3690 R qmi_wlanfw_shadow_reg_v2_cfg_s_v01_ei +ffffffff827d36d0 R qmi_wlanfw_wlan_mode_req_msg_v01_ei +ffffffff827d3750 R qmi_wlanfw_wlan_mode_resp_msg_v01_ei +ffffffff827d3790 R qmi_wlanfw_wlan_cfg_req_msg_v01_ei +ffffffff827d3970 R qmi_wlanfw_wlan_cfg_resp_msg_v01_ei +ffffffff827d39b0 r wmi_tlv_policies +ffffffff827d5710 r qwx_hw_mode_pri_map +ffffffff827d5740 r ath11k_hw_params +ffffffff827d5cc0 r hw_srng_config_templ +ffffffff827d5f78 r ath11k_hw_hal_params_ipq8074 +ffffffff827d5f88 r ath11k_hw_hal_params_qca6390 +ffffffff827d5f98 r ath11k_hw_hal_params_wcn6750 +ffffffff827d5fa8 r ath11k_hw_tcl2wbm_rbm_map_ipq8074 +ffffffff827d5fb1 r ath11k_hw_tcl2wbm_rbm_map_wcn6750 +ffffffff827d7000 R uhci_bus_methods +ffffffff827d7030 R uhci_root_ctrl_methods +ffffffff827d7060 R uhci_root_intr_methods +ffffffff827d7090 R uhci_device_ctrl_methods +ffffffff827d70c0 R uhci_device_intr_methods +ffffffff827d70f0 R uhci_device_bulk_methods +ffffffff827d7120 R uhci_device_isoc_methods +ffffffff827d7150 R uhci_devd +ffffffff827d7162 R uhci_confd +ffffffff827d716b R uhci_ifcd +ffffffff827d7174 R uhci_endpd +ffffffff827d717b R uhci_hubd_piix +ffffffff827d8000 R revbits +ffffffff827d8020 R ohci_bus_methods +ffffffff827d8050 R ohci_root_ctrl_methods +ffffffff827d8080 R ohci_root_intr_methods +ffffffff827d80b0 R ohci_device_ctrl_methods +ffffffff827d80e0 R ohci_device_intr_methods +ffffffff827d8110 R ohci_device_bulk_methods +ffffffff827d8140 R ohci_device_isoc_methods +ffffffff827d8170 R ohci_devd +ffffffff827d8182 R ohci_confd +ffffffff827d818b R ohci_ifcd +ffffffff827d8194 R ohci_endpd +ffffffff827d819b R ohci_hubd +ffffffff827d9000 R ehci_bus_methods +ffffffff827d9030 R ehci_root_ctrl_methods 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vscsi_switch +ffffffff827df050 R vscsi_filtops +ffffffff827e0000 R mpath_ca +ffffffff827e0028 R mpath_switch +ffffffff827e1000 R softraid_ca +ffffffff827e1028 R sr_switch +ffffffff827e2000 r spdmem_basic_types +ffffffff827e20a0 r spdmem_parity_types +ffffffff827e20e0 r spdmem_ddr4_decode.ddr4_chipsize +ffffffff827e3000 R ufshci_switch +ffffffff827e4000 R kstat_rlock_ops +ffffffff827e4010 R kstat_wlock_ops +ffffffff827e4020 R kstat_mutex_ops +ffffffff827e4030 R kstat_cpu_ops +ffffffff827e4040 r kstat_id_tree_RBT_INFO +ffffffff827e4058 R kstat_id_tree_RBT_TYPE +ffffffff827e4060 r kstat_pv_tree_RBT_INFO +ffffffff827e4078 R kstat_pv_tree_RBT_TYPE +ffffffff827e4080 r kstat_nm_tree_RBT_INFO +ffffffff827e4098 R kstat_nm_tree_RBT_TYPE +ffffffff827e5000 r fuse_rd_filtops +ffffffff827e6000 R fusefs_vfsops +ffffffff827e6070 R fusefs_vars +ffffffff827e7000 R fusefs_vops +ffffffff827e7110 R fusefsread_filtops +ffffffff827e7140 R fusefswrite_filtops +ffffffff827e7170 R fusefsvnode_filtops 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db_command_table +ffffffff827f0000 R ddb_vars +ffffffff827f1000 R audio_ca +ffffffff827f1028 R audioctlread_filtops +ffffffff827f1058 R audiowrite_filtops +ffffffff827f1088 R audioread_filtops +ffffffff827f2000 R midi_ca +ffffffff827f2028 R midiwrite_filtops +ffffffff827f2058 R midiread_filtops +ffffffff827f3000 r mulawtolin16 +ffffffff827f3200 r lintomulaw +ffffffff827f4000 R randomread_filtops +ffffffff827f4030 R randomwrite_filtops +ffffffff827f5000 R video_ca +ffffffff827f5028 R video_filtops +ffffffff827f6000 R cd9660_vfsops +ffffffff827f7000 R cd9660_vops +ffffffff827f7110 R cd9660_specvops +ffffffff827f7220 R cd9660_fifovops +ffffffff827f7330 R cd9660read_filtops +ffffffff827f7360 R cd9660write_filtops +ffffffff827f7390 R cd9660vnode_filtops +ffffffff827f8000 R udf_vfsops +ffffffff827f9000 R udf_vops +ffffffff827f9110 r mon_lens +ffffffff827fa000 r month_days +ffffffff827fb000 R execsw +ffffffff827fc000 r shstrtab +ffffffff827fd000 R copyright +ffffffff827fd0c0 r initpaths +ffffffff827fe000 R sysent +ffffffff82800000 R bufq_impls +ffffffff82801000 R kqueueops +ffffffff82801038 R kqread_filtops +ffffffff82801068 R proc_filtops +ffffffff82801098 R file_filtops +ffffffff828010c8 R timer_filtops +ffffffff82801100 R sysfilt_ops +ffffffff82801148 R seltrue_filtops +ffffffff82801178 R dead_filtops +ffffffff828011a8 R badfd_filtops +ffffffff828011d8 r mutex_klistops +ffffffff828011f0 r rwlock_klistops +ffffffff82802000 R kv_exec +ffffffff82803000 R addrmask +ffffffff82804000 r rw_ops +ffffffff82805000 r proc_printit.pstat +ffffffff82806000 R pledge_syscalls +ffffffff82806a60 r pledgenames +ffffffff82806cb0 r pledgereq +ffffffff82807000 r unvname_rbt_RBT_INFO +ffffffff82807018 R unvname_rbt_RBT_TYPE +ffffffff82808000 R sig_filtops +ffffffff82808030 R sigprop +ffffffff82809000 R kern_vars +ffffffff828092f0 R hw_vars +ffffffff8280a000 R tc_vars +ffffffff8280b000 r sys_gettimeofday.zerotz +ffffffff8280c000 r taskq_sys_name +ffffffff8280c006 r taskq_sys_mp_name +ffffffff8280c010 R systq +ffffffff8280c018 R systqmp +ffffffff8280e000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff8280e010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff8280e020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff8280e030 r gpt_get_fstype.gpt_uuid_linux +ffffffff8280e040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff8280e050 r gpt_get_fstype.gpt_uuid_unused +ffffffff8280e060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff8280e070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff8280f000 r hiballoc_addr_RBT_INFO +ffffffff8280f018 R hiballoc_addr_RBT_TYPE +ffffffff82810000 R logread_filtops +ffffffff82811000 r phtree_RBT_INFO +ffffffff82811018 R phtree_RBT_TYPE +ffffffff82811020 r pool_lock_ops_rw +ffffffff82811058 r pool_lock_ops_mtx +ffffffff82812000 r pselregister.evf +ffffffff8281200c r pselregister.evff +ffffffff82813000 R pipe_rfiltops +ffffffff82813030 R pipe_wfiltops +ffffffff82813060 R pipe_efiltops +ffffffff82813090 r pipeops +ffffffff82814000 R socketops +ffffffff82815000 R sysvsem_vars +ffffffff82816000 R char_type +ffffffff82816100 R ttyread_filtops +ffffffff82816130 R ttywrite_filtops +ffffffff82816160 R ttyexcept_filtops +ffffffff82817000 R ptcread_filtops +ffffffff82817030 R ptcwrite_filtops +ffffffff82817060 R ptcexcept_filtops +ffffffff82819000 R domains +ffffffff8281a000 R unixdomain +ffffffff8281a050 R unixsw +ffffffff8281b000 R soread_filtops +ffffffff8281b030 R sowrite_filtops +ffffffff8281b060 R soexcept_filtops +ffffffff8281c000 R sun_noname +ffffffff8281c010 R uipc_usrreqs +ffffffff8281c0b8 R uipc_dgram_usrreqs +ffffffff8281c160 R unpstctl_vars +ffffffff8281c190 R unpsqctl_vars +ffffffff8281c1c0 R unpdgctl_vars +ffffffff8281d000 r namecache_rb_cache_RBT_INFO +ffffffff8281d018 R namecache_rb_cache_RBT_TYPE +ffffffff8281e000 R generic_filtops +ffffffff8281f000 r buf_rb_bufs_RBT_INFO +ffffffff8281f018 R buf_rb_bufs_RBT_TYPE +ffffffff8281f020 r typename +ffffffff82820000 R sync_vops +ffffffff82821000 R vnops +ffffffff82822000 R spec_vops +ffffffff82823000 R dead_vops +ffffffff82824000 R fifo_vops +ffffffff82824110 R fiforead_filtops +ffffffff82824140 R fifowrite_filtops +ffffffff82824170 R fifoexcept_filtops +ffffffff82825000 R regyear +ffffffff82825020 R leapyear +ffffffff82825040 r dos2unix +ffffffff82825140 r u2l +ffffffff82825240 r unix2dos +ffffffff82826008 R msdosfs_vfsops +ffffffff82827000 R msdosfs_vops +ffffffff82827110 R msdosfsread_filtops +ffffffff82827140 R msdosfswrite_filtops +ffffffff82827170 R msdosfsvnode_filtops +ffffffff82828000 r _utf_count +ffffffff82829000 R ntfs_vfsops +ffffffff8282a000 R ntfs_vops +ffffffff8282b000 R bpfread_filtops +ffffffff8282b030 R bpf_mbuf_ops +ffffffff8282c000 r bpf_mem_ops +ffffffff8282d000 R priq_ops +ffffffff8282d038 R ifq_priq_ops +ffffffff8282d040 r ifq_kstat_tpl +ffffffff8282d180 r ifiq_kstat_tpl +ffffffff8282e000 r ether_crc32_le_update.crctab +ffffffff8282e040 r ether_crc32_be_update.crctab +ffffffff8282f000 r lcp +ffffffff8282f078 r ipcp +ffffffff8282f0f0 r ipv6cp +ffffffff8282f168 r chap +ffffffff8282f1e0 r pap +ffffffff82830000 R ifmedia_baudrate_descriptions +ffffffff82831000 r fcstab +ffffffff82833000 R tunread_filtops +ffffffff82833030 R tunwrite_filtops +ffffffff82834000 R bridge_brport +ffffffff82835000 R bstp_etheraddr +ffffffff82836000 r eb_tree_RBT_INFO +ffffffff82836018 R eb_tree_RBT_TYPE +ffffffff82837000 r veb_etherbridge_ops +ffffffff82837028 r veb_pf_ipv4 +ffffffff82837040 r veb_pf_ipv6 +ffffffff82838000 r pipex_pppoe_padding +ffffffff82839000 r rn_addmask.normal_chars +ffffffff8283a000 R route_src +ffffffff8283a010 R route_usrreqs +ffffffff8283a0b8 R routedomain +ffffffff8283a100 R routesw +ffffffff8283b000 R gre_vars +ffffffff8283b030 r mgre_tree_RBT_INFO +ffffffff8283b048 R mgre_tree_RBT_TYPE +ffffffff8283b050 r egre_tree_RBT_INFO +ffffffff8283b068 R egre_tree_RBT_TYPE +ffffffff8283b070 r nvgre_ucast_tree_RBT_INFO +ffffffff8283b088 R nvgre_ucast_tree_RBT_TYPE +ffffffff8283b090 r nvgre_mcast_tree_RBT_INFO +ffffffff8283b0a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff8283b0b0 r eoip_tree_RBT_INFO +ffffffff8283b0c8 R eoip_tree_RBT_TYPE +ffffffff8283b0d0 r nvgre_etherbridge_ops +ffffffff8283c000 r trunk_protos +ffffffff8283d000 R ethermulticastaddr_slowprotocols +ffffffff8283d006 R lacp_info_tlv_template +ffffffff8283d00e R marker_info_tlv_template +ffffffff8283d012 R marker_response_tlv_template +ffffffff8283d020 R lacp_timer_funcs +ffffffff8283e000 r lacp_rxm_state_names +ffffffff8283e040 r lacp_rxm_event_names +ffffffff8283e090 r aggr_port_selected_names +ffffffff8283e0b0 r lacp_mux_state_names +ffffffff8283e0e0 r lacp_mux_event_names +ffffffff8283e128 r lacp_address_slow +ffffffff8283f000 r tpmr_pf_ipv4 +ffffffff8283f018 r tpmr_pf_ipv6 +ffffffff82840000 r bpe_tree_RBT_INFO +ffffffff82840018 R bpe_tree_RBT_TYPE +ffffffff82840020 r bpe_etherbridge_ops +ffffffff82841000 R pppx_rd_filtops +ffffffff82841030 R pppx_wr_filtops +ffffffff82841060 r pppx_ifs_RBT_INFO +ffffffff82841078 R pppx_ifs_RBT_TYPE +ffffffff82841080 r pppac_rd_filtops +ffffffff828410b0 r pppac_wr_filtops +ffffffff82842000 r vxlan_peers_RBT_INFO +ffffffff82842018 R vxlan_peers_RBT_TYPE +ffffffff82842020 r vxlan_etherbridge_ops +ffffffff82843000 R stoeplitz_cache +ffffffff82844000 R ieee80211_std_rateset_11a +ffffffff82844010 R ieee80211_std_rateset_11b +ffffffff82844020 R ieee80211_std_rateset_11g +ffffffff82844030 R ieee80211_std_ratesets_11n +ffffffff828443b0 R ieee80211_std_ratesets_11ac +ffffffff828446b0 r ieee80211_setbasicrates.basic +ffffffff82844710 r ieee80211_setmode.chanflags +ffffffff82844730 r ieee80211_rate2media.rates +ffffffff828448c0 r ieee80211_media2rate.ieeerates +ffffffff82845000 r Sbox +ffffffff82847000 r ieee80211_ioctl.empty_macaddr +ffffffff82848000 r ieee80211_find_rxnode.zero +ffffffff82848008 r ieee80211_tree_RBT_INFO +ffffffff82848020 R ieee80211_tree_RBT_TYPE +ffffffff82848028 r ieee80211_ess_tree_RBT_INFO +ffffffff82848040 R ieee80211_ess_tree_RBT_TYPE +ffffffff82848048 r ieee80211_do_slow_print.merge_print_intvl +ffffffff82849020 R ieee80211_edca_table +ffffffff828490e0 R ieee80211_qap_edca_table +ffffffff8284a000 R ieee80211_mgt_subtype_name +ffffffff8284a080 R ieee80211_state_name +ffffffff8284a0b0 R ieee80211_phymode_name +ffffffff8284b000 r ieee80211_r_ctry +ffffffff8284bae0 r ieee80211_r_names +ffffffff8284bf80 r ieee80211_r_map +ffffffff8284d000 R zeroin46_addr +ffffffff8284d010 R zeroin_addr +ffffffff8284e000 R inetdomain +ffffffff8284e050 R inetsw +ffffffff8284f000 R divertctl_vars +ffffffff8284f030 R divert_usrreqs +ffffffff82850000 R icmpctl_vars +ffffffff82851000 R ipctl_vars +ffffffff82851140 R inetctlerrmap +ffffffff82852000 R rip_usrreqs +ffffffff82853000 R tcp_timer_funcs +ffffffff82854000 R tcp_usrreqs +ffffffff828540a8 R tcp6_usrreqs +ffffffff82854150 R tcpctl_vars +ffffffff82855000 R udp_usrreqs +ffffffff828550a8 R udp6_usrreqs +ffffffff82855150 R udpctl_vars +ffffffff82856000 R gre_usrreqs +ffffffff82857000 r ipsec_ids_tree_RBT_INFO +ffffffff82857018 R ipsec_ids_tree_RBT_TYPE +ffffffff82857020 r ipsec_ids_flows_RBT_INFO +ffffffff82857038 R ipsec_ids_flows_RBT_TYPE +ffffffff82857040 R xformsw +ffffffff82857158 R xformswNXFORMSW +ffffffff82858000 R espctl_vars +ffffffff82858050 R ahctl_vars +ffffffff82858070 R ipcompctl_vars +ffffffff82858090 R ipsecctl_vars +ffffffff82859000 R ipseczeroes +ffffffff8285a000 r carp_set_state.carp_states +ffffffff8285b000 r Rcon +ffffffff8285c000 r Te2 +ffffffff8285c400 r Te3 +ffffffff8285c800 r Te0 +ffffffff8285cc00 r Te1 +ffffffff8285d000 r rcon +ffffffff8285d030 r Td0 +ffffffff8285d430 r Td1 +ffffffff8285d830 r Td2 +ffffffff8285dc30 r Td3 +ffffffff8285e030 r Td4 +ffffffff82860000 r K256 +ffffffff82860100 r sha512_initial_hash_value +ffffffff82860140 r K512 +ffffffff828603c0 r sha384_initial_hash_value +ffffffff82861000 r Blowfish_initstate.initstate +ffffffff82863000 r cast_sbox1 +ffffffff82863400 r cast_sbox2 +ffffffff82863800 r cast_sbox3 +ffffffff82863c00 r cast_sbox4 +ffffffff82864000 r cast_sbox5 +ffffffff82864400 r cast_sbox6 +ffffffff82864800 r cast_sbox7 +ffffffff82864c00 r cast_sbox8 +ffffffff82865000 r des_SPtrans +ffffffff82866000 r des_skb +ffffffff82866800 r odd_parity +ffffffff82867000 R hmac_ipad_buffer +ffffffff82867080 R hmac_opad_buffer +ffffffff82868000 R enc_xform_3des +ffffffff82868040 R enc_xform_blf +ffffffff82868080 R enc_xform_cast5 +ffffffff828680c0 R enc_xform_aes +ffffffff82868100 R enc_xform_aes_ctr +ffffffff82868140 R enc_xform_aes_gcm +ffffffff82868180 R enc_xform_aes_gmac +ffffffff828681c0 R enc_xform_aes_xts +ffffffff82868200 R enc_xform_chacha20_poly1305 +ffffffff82868240 R enc_xform_null +ffffffff82868280 R auth_hash_hmac_md5_96 +ffffffff828682c8 R auth_hash_hmac_sha1_96 +ffffffff82868310 R auth_hash_hmac_ripemd_160_96 +ffffffff82868358 R auth_hash_hmac_sha2_256_128 +ffffffff828683a0 R auth_hash_hmac_sha2_384_192 +ffffffff828683e8 R auth_hash_hmac_sha2_512_256 +ffffffff82868430 R auth_hash_gmac_aes_128 +ffffffff82868478 R auth_hash_gmac_aes_192 +ffffffff828684c0 R auth_hash_gmac_aes_256 +ffffffff82868508 R auth_hash_chacha20_poly1305 +ffffffff82868550 R comp_algo_deflate +ffffffff82869000 r IV +ffffffff8286a000 r idgen32_ftable +ffffffff8286b000 r Chacha20_Poly1305_Update.zeroes +ffffffff8286b010 r pad0 +ffffffff8286c000 r null_point +ffffffff8286c020 r base_point +ffffffff8286d000 R mplsdomain +ffffffff8286e000 R mplsctl_vars +ffffffff8286f000 r nfs_nodetree_RBT_INFO +ffffffff8286f018 R nfs_nodetree_RBT_TYPE +ffffffff82870000 r nfsread_filtops +ffffffff82870030 r nfswrite_filtops +ffffffff82870060 r nfsvnode_filtops +ffffffff82871000 r nfs_ptimers +ffffffff82872000 R nfsv2_type +ffffffff82872030 R nfsv3_type +ffffffff82872060 R nv2tov_type +ffffffff82872080 R nv3tov_type +ffffffff828720a0 R nfsv3_procid +ffffffff82872100 R nfsv2_procid +ffffffff82872160 r nfsrv_v3errmap +ffffffff82872210 r nfsrv_v2errmap +ffffffff82872256 r nfsv3err_null +ffffffff8287225a r nfsv3err_getattr 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jmphy_ca +ffffffff828d0040 r jmphys +ffffffff828d1000 R atphy_funcs +ffffffff828d1018 R atphy_ca +ffffffff828d1040 r atphys +ffffffff828d2000 r sense_keys +ffffffff828d2080 r adesc +ffffffff828d5000 R scsi_readsafe_cmd +ffffffff828d6000 R scsibus_ca +ffffffff828d6030 R scsi_quirk_patterns +ffffffff828d7000 R cd_ca +ffffffff828d7030 R cd_patterns +ffffffff828d8000 R ch_ca +ffffffff828d8030 R ch_patterns +ffffffff828d9000 R sd_ca +ffffffff828d9030 R sd_patterns +ffffffff828da000 R st_quirk_patterns +ffffffff828da210 R st_ca +ffffffff828da240 R st_patterns +ffffffff828db000 R uk_ca +ffffffff828dc000 R safte_ca +ffffffff828dd000 R ses_ca +ffffffff828de000 R sym_ca +ffffffff828de028 R sym_mpath_sym_ops +ffffffff828de048 R sym_mpath_asym_ops +ffffffff828df000 R rdac_ca +ffffffff828df028 R rdac_mpath_ops +ffffffff828e0000 R emc_ca +ffffffff828e0028 R emc_mpath_ops +ffffffff828e1000 R hds_ca +ffffffff828e1028 R hds_mpath_ops +ffffffff828e2000 R atapiscsi_ca +ffffffff828e2028 r atapiscsi_switch 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hvs_switch +ffffffff828f8000 r virtio_device_name +ffffffff828f9000 R vio_ca +ffffffff828f9030 r virtio_net_feature_names +ffffffff828fa000 R vioblk_ca +ffffffff828fa028 R vioblk_switch +ffffffff828fb000 R viomb_ca +ffffffff828fb030 r viomb_feature_names +ffffffff828fc000 R viornd_ca +ffffffff828fd000 R vioscsi_ca +ffffffff828fd028 R vioscsi_switch +ffffffff828fd050 R vioscsi_vq_names +ffffffff828fe000 R vmmci_ca +ffffffff828ff000 R pci_ca +ffffffff82900000 r pci_quirks +ffffffff82901000 R pci_subclass_prehistoric +ffffffff82901050 R pci_subclass_mass_storage +ffffffff82901160 R pci_subclass_network +ffffffff82901250 R pci_subclass_display +ffffffff829012d0 R pci_subclass_multimedia +ffffffff82901360 R pci_subclass_memory +ffffffff829013c0 R pci_subclass_bridge +ffffffff82901510 R pci_subclass_communications +ffffffff829015d0 R pci_subclass_system +ffffffff829016c0 R pci_subclass_input +ffffffff82901770 R pci_subclass_dock +ffffffff829017c0 R pci_subclass_processor +ffffffff82901880 R pci_subclass_serialbus +ffffffff82901990 R pci_subclass_wireless +ffffffff82901a70 R pci_subclass_i2o +ffffffff82901aa0 R pci_subclass_satcom +ffffffff82901b20 R pci_subclass_crypto +ffffffff82901b80 R pci_subclass_dasp +ffffffff82901c10 R pci_class +ffffffff82901e20 r pci_known_vendors +ffffffff82903400 r pci_known_products +ffffffff82927000 R vga_pci_ca +ffffffff82927030 r vga_devs +ffffffff82928000 R ahc_pci_ident_table +ffffffff829285d0 R ahc_pci_ca +ffffffff82929000 R ahd_pci_ident_table +ffffffff82929198 R ahd_num_pci_devs +ffffffff829291a0 R ahd_pci_ca +ffffffff829291d0 r pci_bus_modes +ffffffff82929210 r pci_status_strings +ffffffff82929250 r pci_status_source +ffffffff82929290 r split_status_strings +ffffffff8292a000 R adw_pci_ca +ffffffff8292a028 R adw_pci_devices +ffffffff8292b000 r adw_3550_Default_EEPROM +ffffffff8292b080 r adw_38C0800_Default_EEPROM +ffffffff8292b100 r adw_38C1600_Default_EEPROM +ffffffff8292c000 R adw_asc3550_mcode +ffffffff8292d3a0 R adw_asc3550_mcode_data +ffffffff8292d3b0 R adw_asc38C0800_mcode +ffffffff8292e888 R adw_asc38C0800_mcode_data +ffffffff8292e8a0 R adw_asc38C1600_mcode +ffffffff82930160 R adw_asc38C1600_mcode_data +ffffffff82931000 R twe_pci_ca +ffffffff82931028 R twe_pci_devices +ffffffff82932000 R arc_ca +ffffffff82932028 R arc_switch +ffffffff82932050 r arc_devices +ffffffff82932190 r arc_intel +ffffffff82932198 r arc_marvell +ffffffff829321a0 r arc_lsi +ffffffff829321a8 r arc_marvell2 +ffffffff82933000 R jmb_ca +ffffffff82933030 r jmb_devices +ffffffff82934000 R ahci_pci_ca +ffffffff82934028 R ahci_jmb_ca +ffffffff82934050 r ahci_devices +ffffffff82935000 R nvme_pci_ca +ffffffff82935028 r nvme_msi_blacklist +ffffffff82936000 R ami_pci_ca +ffffffff82936030 r ami_pci_subsys +ffffffff82936270 r ami_pci_vendors +ffffffff82937000 R mfi_pci_ca +ffffffff82937030 r mfi_pci_devices +ffffffff82938000 R mfii_ca +ffffffff82938028 R mfii_switch +ffffffff82938050 R mfii_pd_switch +ffffffff82938078 R mfii_iop_thunderbolt +ffffffff82938088 R mfii_iop_25 +ffffffff82938098 R mfii_iop_35 +ffffffff829380b0 R mfii_devices +ffffffff82938180 r mfi_bbu_indicators +ffffffff82939000 R ips_ca +ffffffff82939028 r ips_ids +ffffffff82939040 r ips_chips +ffffffff82939090 r ips_names +ffffffff82939128 r ips_switch +ffffffff82939150 r ips_pt_switch +ffffffff8293a000 R eap_ca +ffffffff8293a028 R eap1370_hw_if +ffffffff8293a0e0 R eap1371_hw_if +ffffffff8293a198 R eap_midi_hw_if +ffffffff8293a1d0 R eap_devices +ffffffff8293b000 R auacer_pci_devices +ffffffff8293b008 R auacer_ca +ffffffff8293b030 R auacer_hw_if +ffffffff8293c000 R auich_ca +ffffffff8293c028 R auich_hw_if +ffffffff8293c0e0 r auich_devices +ffffffff8293d000 R azalia_ca +ffffffff8293d028 R azalia_hw_if +ffffffff8293d0e0 R azalia_pci_devices +ffffffff8293d120 r pin_devices +ffffffff8293d1a0 r line_colors +ffffffff8293d220 r wtypes +ffffffff8293e000 r azalia_codec_init_dolby_atmos.atmos_init +ffffffff8293e050 r azalia_codec_init_dolby_atmos.atmos_v23_v25 +ffffffff8293f000 R envy_ca +ffffffff8293f028 R envy_hw_if +ffffffff8293f0e0 R envy_midi_hw_if +ffffffff82940000 R emuxki_devices +ffffffff82940010 R emu_ca +ffffffff82940038 R emuxki_hw_if +ffffffff829400f0 r emuxki_recbuf_sz +ffffffff82940170 r emuxki_recsrc_szreg +ffffffff8294017c r emuxki_recsrc_bufaddrreg +ffffffff82940190 r emuxki_rate_to_pitch.logMagTable +ffffffff82940390 r emuxki_rate_to_pitch.logSlopeTable +ffffffff82941000 R auixp_pci_devices +ffffffff82941010 R auixp_ca +ffffffff82941038 R auixp_hw_if +ffffffff82942000 R clcs_ca +ffffffff82942028 R cs4280_hw_if +ffffffff829420e0 R cs4280_devices +ffffffff82943000 R yds_ca +ffffffff82943028 r yds_hw_if +ffffffff829430e0 r yds_chip_capability_list +ffffffff82943120 r yds_get_lpfk.lpfkt +ffffffff82943160 r yds_get_lpfq.lpfqt +ffffffff82944000 R auvia_ca +ffffffff82944028 R auvia_hw_if +ffffffff829440e0 R auvia_devices +ffffffff829440f0 r auvia_set_params_sub.slottab +ffffffff82945000 R gdt_pci_ca +ffffffff82946000 R ciss_pci_ca +ffffffff82946030 R ciss_pci_devices +ffffffff82947000 R qlw_pci_ca +ffffffff82947030 r qlw_devices +ffffffff82947050 r isp_1040_risc_code +ffffffff8294c9f0 r isp_1080_risc_code +ffffffff82954470 r isp_12160_risc_code +ffffffff8295c000 R qla_pci_ca +ffffffff8295c030 r qla_devices +ffffffff8295d000 R qle_ca +ffffffff8295d028 R qle_switch +ffffffff8295d050 r qle_devices +ffffffff8295d070 r isp_2400_risc_code +ffffffff8298ca50 r isp_2500_risc_code +ffffffff829bf000 R mpi_pci_ca +ffffffff829bf030 r mpi_devices +ffffffff829c0000 R mpii_ca +ffffffff829c0028 R mpii_switch +ffffffff829c0050 r mpii_devices +ffffffff829c1000 R sili_pci_ca +ffffffff829c1030 r sili_devices +ffffffff829c2000 R aq_devices +ffffffff829c2060 R aq_products +ffffffff829c21d0 R aq_fw1x_ops +ffffffff829c21f8 R aq_fw2x_ops +ffffffff829c2220 R aq2_fw_ops +ffffffff829c2248 R aq_ca +ffffffff829c3000 R de_ca +ffffffff829c3030 r tulip_srom_conninfo +ffffffff829c3120 r tulip_mii_phy_attrlist +ffffffff829c31e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff829c3208 r tulip_21040_10baset_only_boardsw +ffffffff829c3230 r tulip_21040_boardsw +ffffffff829c3258 r tulip_2114x_isv_boardsw +ffffffff829c3280 r tulip_21140_smc9332_boardsw +ffffffff829c32a8 r tulip_21040_auibnc_only_boardsw +ffffffff829c32d0 r tulip_21140_cogent_em100_boardsw +ffffffff829c32f8 r tulip_21140_accton_boardsw +ffffffff829c3320 r tulip_21140_eb_boardsw +ffffffff829c3348 r tulip_21041_boardsw +ffffffff829c3370 r tulip_read_macaddr.testpat +ffffffff829c3380 r tulip_vendors +ffffffff829c3430 r tulip_media_to_ifmedia +ffffffff829c3490 r tulip_chipdescs +ffffffff829c4000 R ep_pci_ca +ffffffff829c4030 R ep_pci_devices +ffffffff829c5000 R pcn_ca +ffffffff829c5028 R pcn_devices +ffffffff829c5030 r pcn_79c970_rcvfw +ffffffff829c5050 r pcn_79c970_xmtsp +ffffffff829c5070 r pcn_79c970_xmtfw +ffffffff829c5090 r pcn_79c971_rcvfw +ffffffff829c50b0 r pcn_79c971_xmtsp_sram +ffffffff829c50d0 r pcn_79c971_xmtsp +ffffffff829c50f0 r pcn_79c971_xmtfw +ffffffff829c5110 r pcn_variants +ffffffff829c6000 R siop_products +ffffffff829c7000 R siop_pci_ca +ffffffff829c8000 R rdcide_setup +ffffffff829c8005 R rdcide_hold +ffffffff829c800a R rdcide_udmatim +ffffffff829c8010 R rdcide_udmaclk +ffffffff829c8028 R default_product_desc +ffffffff829c8040 R pciide_intel_products +ffffffff829c8630 R pciide_amd_products +ffffffff829c8690 R pciide_cmd_products +ffffffff829c8730 R pciide_via_products +ffffffff829c8810 R pciide_cypress_products +ffffffff829c8820 R pciide_sis_products +ffffffff829c8870 R pciide_natsemi_products +ffffffff829c8890 R pciide_acer_products +ffffffff829c88a0 R pciide_triones_products +ffffffff829c88f0 R pciide_promise_products +ffffffff829c8ac0 R pciide_acard_products +ffffffff829c8b10 R pciide_serverworks_products +ffffffff829c8bb0 R pciide_nvidia_products +ffffffff829c8e80 R pciide_ite_products +ffffffff829c8ea0 R pciide_ati_products +ffffffff829c8f20 R pciide_jmicron_products +ffffffff829c8f70 R pciide_phison_products +ffffffff829c8f80 R pciide_rdc_products +ffffffff829c8f90 R pciide_vendors +ffffffff829c9140 R pciide_pci_ca +ffffffff829c9168 R pciide_jmb_ca +ffffffff829c9190 r piix_isp_dma +ffffffff829c9193 r piix_rtc_dma +ffffffff829c9196 r apollo_pio_set +ffffffff829c919b r cmd0643_9_data_tim_pio +ffffffff829c91a0 r cmd0643_9_data_tim_dma +ffffffff829c91a3 r cmd680_channel_map.init_val +ffffffff829c91b1 r cmd680_setup_channel.udma2_tbl +ffffffff829c91b8 r cmd680_setup_channel.dma_tbl +ffffffff829c91be r cmd680_setup_channel.pio_tbl +ffffffff829c91d0 r satalink_ba5_regmap +ffffffff829c9690 r sii3114_chansetup.channel_names +ffffffff829c96b0 r cy_pio_pulse +ffffffff829c96c0 r sis_udma133new_tim +ffffffff829c96e0 r sis_pio133new_tim +ffffffff829c96f4 r sis_dma133new_tim +ffffffff829c9700 r sis_udma66_tim +ffffffff829c9706 r sis_udma100new_tim +ffffffff829c970c r sis_udma133old_tim +ffffffff829c9713 r sis_pio_act +ffffffff829c9718 r sis_pio_rec +ffffffff829c971d r natsemi_pio_pulse +ffffffff829c9722 r natsemi_pio_recover +ffffffff829c9727 r natsemi_dma_pulse +ffffffff829c972a r natsemi_dma_recover +ffffffff829c9730 r scx200_udma33 +ffffffff829c973c r scx200_dma33 +ffffffff829c9750 r scx200_pio33 +ffffffff829c9778 r acer_udma +ffffffff829c977e r acer_pio +ffffffff829c9790 r hpt370_pio +ffffffff829c97a4 r hpt370_dma +ffffffff829c97b0 r hpt370_udma +ffffffff829c97d0 r hpt372_pio +ffffffff829c97e4 r hpt372_dma +ffffffff829c97f0 r hpt372_udma +ffffffff829c980c r hpt366_dma +ffffffff829c9820 r hpt366_udma +ffffffff829c9840 r hpt374_pio +ffffffff829c9854 r hpt374_dma +ffffffff829c9860 r hpt374_udma +ffffffff829c987c r pdc2xx_pa +ffffffff829c9881 r pdc2xx_pb +ffffffff829c9886 r pdc2xx_dma_mb +ffffffff829c9889 r pdc2xx_dma_mc +ffffffff829c988c r pdc2xx_udma_mc +ffffffff829c9892 r acard_act_udma +ffffffff829c9899 r acard_rec_udma +ffffffff829c98a0 r acard_udma_conf +ffffffff829c98a7 r acard_act_dma +ffffffff829c98aa r acard_rec_dma +ffffffff829c98ad r acard_act_pio +ffffffff829c98b2 r acard_rec_pio +ffffffff829c98b7 r nforce_udma +ffffffff829c98be r nforce_pio +ffffffff829c98c3 r ixp_mdma_timings +ffffffff829c98c6 r ixp_pio_timings +ffffffff829ca000 R ppb_ca +ffffffff829cb000 R cy_pci_ca +ffffffff829cb030 R cy_pci_devices +ffffffff829cc000 R rl_pci_ca +ffffffff829cc030 R rl_pci_devices +ffffffff829cd000 R re_pci_devices +ffffffff829cd030 R re_pci_ca +ffffffff829ce000 R vr_ca +ffffffff829cf000 R txp_ca +ffffffff829cf030 R txp_devices +ffffffff829d0000 r cards +ffffffff829d1000 r format_params +ffffffff829d11a0 r pixfmt_table +ffffffff829d1320 r meteor_pixfmt_table +ffffffff829d2000 R bktr_ca +ffffffff829d2028 R bktr_hw_if +ffffffff829d3000 r tuners +ffffffff829d3170 r freqTable +ffffffff829d3260 r nabcst +ffffffff829d32a0 r irccable +ffffffff829d3310 r hrccable +ffffffff829d3380 r weurope +ffffffff829d3420 r jpnbcst +ffffffff829d3460 r jpncable +ffffffff829d34c0 r xussr +ffffffff829d3530 r australia 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+ffffffff829f4000 R puc_pci_ca +ffffffff829f5000 R puc_devs +ffffffff829fa000 R com_puc_ca +ffffffff829fa030 r puc_port_types +ffffffff829fb000 R lpt_puc_ca +ffffffff829fc000 R wi_pci_ca +ffffffff829fc030 r wi_pci_products +ffffffff829fd000 R an_pci_ca +ffffffff829fd030 R an_pci_devices +ffffffff829fe000 R iwi_devices +ffffffff829fe010 R iwi_ca +ffffffff829ff000 R wpi_ca +ffffffff829ff028 r wpi_devices +ffffffff829ff030 r wpi_rates +ffffffff829ff050 r wpi_rf_gain_5ghz +ffffffff829ff0a0 r wpi_dsp_gain_5ghz +ffffffff829ff0f0 r wpi_rf_gain_2ghz +ffffffff829ff140 r wpi_dsp_gain_2ghz +ffffffff829ff190 r wpi_pmgt +ffffffff829ff310 r wpi_bands +ffffffff82a00000 R iwn_mcs2ridx +ffffffff82a00020 R iwn_ca +ffffffff82a00050 r iwn_devices +ffffffff82a000e8 r iwn4965_sensitivity_limits +ffffffff82a00124 r iwn5000_sensitivity_limits +ffffffff82a00160 r iwn5150_sensitivity_limits +ffffffff82a0019c r iwn1000_sensitivity_limits +ffffffff82a001d8 r iwn6000_sensitivity_limits +ffffffff82a00214 r iwn2000_sensitivity_limits +ffffffff82a00250 r iwn_fw_errmsg +ffffffff82a00340 r iwn4965_set_txpower.tdiv +ffffffff82a00360 r iwn4965_rf_gain_5ghz +ffffffff82a003d0 r iwn4965_dsp_gain_5ghz +ffffffff82a00440 r iwn4965_dsp_gain_2ghz +ffffffff82a004b0 r iwn_pmgt +ffffffff82a006f0 r iwn4965_post_alive.qid2fifo +ffffffff82a00700 r iwn_bands +ffffffff82a00770 r iwn_rates +ffffffff82a00820 r iwn4965_rf_gain_2ghz +ffffffff82a01000 R iwm_nvm_channels +ffffffff82a01030 R iwm_nvm_channels_8000 +ffffffff82a01070 R iwm_rates +ffffffff82a010d0 R iwm_ht_mcs2ridx +ffffffff82a01110 R iwm_tid_to_ac +ffffffff82a01118 R iwm_ac_to_tx_fifo +ffffffff82a01120 R iwm_nvm_to_read +ffffffff82a01144 r iwm_set_hw_address_8000.reserved_mac +ffffffff82a01180 r iwm_sf_full_timeout +ffffffff82a011b0 r iwm_sf_full_timeout_def +ffffffff82a011e0 r advanced_lookup +ffffffff82a01320 r iwm_devices +ffffffff82a01360 R iwm_ca +ffffffff82a02000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff82a02020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff82a02040 R iwx_qu_b0_hr1_b0 +ffffffff82a02060 R iwx_qu_b0_hr_b0 +ffffffff82a02080 R iwx_ax201_cfg_qu_hr +ffffffff82a020a0 R iwx_qu_c0_hr1_b0 +ffffffff82a020c0 R iwx_qu_c0_hr_b0 +ffffffff82a020e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff82a02100 R iwx_quz_a0_hr1_b0 +ffffffff82a02120 R iwx_ax201_cfg_quz_hr +ffffffff82a02140 R iwx_cfg_so_a0_hr_b0 +ffffffff82a02160 R iwx_cfg_quz_a0_hr_b0 +ffffffff82a02180 R iwx_2ax_cfg_so_gf_a0 +ffffffff82a021a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff82a021c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff82a021e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff82a02200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff82a02220 R iwx_2ax_cfg_so_jf_b0 +ffffffff82a02240 R iwx_nvm_channels_8000 +ffffffff82a02280 R iwx_rates +ffffffff82a022e0 R iwx_mcs2ridx +ffffffff82a02320 R iwx_tid_to_ac +ffffffff82a02328 R iwx_ac_to_tx_fifo +ffffffff82a02330 r iwx_nvm_channels_uhb +ffffffff82a0239e r iwx_is_valid_mac_addr.reserved_mac +ffffffff82a023b0 r iwx_sf_full_timeout +ffffffff82a023e0 r iwx_sf_full_timeout_def +ffffffff82a02410 r advanced_lookup +ffffffff82a02550 r iwx_devices +ffffffff82a02590 r iwx_dev_info_table +ffffffff82a02e18 R iwx_ca +ffffffff82a03000 R qwx_pci_ca +ffffffff82a03028 r qwx_pci_devices +ffffffff82a03030 R qwx_msi_config_one_msi +ffffffff82a03050 R qwx_msi_config +ffffffff82a030c8 r qwx_pci_ops_qca6390 +ffffffff82a030f8 r qwx_pci_ops_qcn9074 +ffffffff82a04000 R cmpci_ca +ffffffff82a04028 R cmpci_hw_if +ffffffff82a040e0 r cmpci_rate_table +ffffffff82a04120 R cmpci_devices +ffffffff82a04130 r cmpci_query_devinfo.mixer_port_names +ffffffff82a04160 r cmpci_query_devinfo.mixer_classes +ffffffff82a05000 R iha_pci_ca +ffffffff82a05028 R iha_switch +ffffffff82a06000 R pcscp_ca +ffffffff82a07000 R bge_ca +ffffffff82a07030 R bge_devices +ffffffff82a071b0 r bge_revisions +ffffffff82a07610 r bge_majorrevs +ffffffff82a07790 r bge_kstat_tpl +ffffffff82a08000 R bnx_devices +ffffffff82a08020 R bnx_ca +ffffffff82a09000 R vge_ca +ffffffff82a09028 R vge_devices +ffffffff82a0a000 R stge_ca +ffffffff82a0a028 R stge_mii_bitbang_ops +ffffffff82a0a050 R stge_devices +ffffffff82a0b000 R nfe_ca +ffffffff82a0b030 R nfe_devices +ffffffff82a0c000 R et_devices +ffffffff82a0c008 R et_ca +ffffffff82a0d000 R jme_devices +ffffffff82a0d008 R jme_ca +ffffffff82a0e000 R age_devices +ffffffff82a0e008 R age_ca +ffffffff82a0f000 R alc_devices +ffffffff82a0f038 R alc_ca +ffffffff82a10000 R ale_devices +ffffffff82a10008 R ale_ca +ffffffff82a11000 R amdpm_ca +ffffffff82a11030 R amdpm_ids +ffffffff82a12000 R bce_ca +ffffffff82a12028 R bce_devices +ffffffff82a13000 R ath_pci_ca +ffffffff82a14000 R athn_pci_ca +ffffffff82a14030 r athn_pci_devices +ffffffff82a15000 R atw_pci_ca +ffffffff82a15028 R atw_pci_devices +ffffffff82a16000 R rtw_pci_ca +ffffffff82a16030 R rtw_pci_products +ffffffff82a17000 R rtwn_pci_ca +ffffffff82a17030 r rtwn_pci_devices +ffffffff82a17040 r rtl8188eu_mac +ffffffff82a171b0 r rtl8192cu_mac +ffffffff82a17310 r rtl8192ce_mac +ffffffff82a17458 r rtl8188eu_bb_prog +ffffffff82a17480 r rtl8723a_bb_prog +ffffffff82a174a8 r rtl8192ce_bb_prog_1t +ffffffff82a174d0 r rtl8192ce_bb_prog_2t +ffffffff82a17500 r rtl8188eu_bb_regs +ffffffff82a17680 r rtl8188eu_bb_vals +ffffffff82a17980 r rtl8188eu_agc_vals +ffffffff82a17b80 r rtl8723a_bb_regs +ffffffff82a17d00 r rtl8723a_bb_vals +ffffffff82a17ff0 r rtl8192ce_agc_vals +ffffffff82a18270 r rtl8192ce_bb_regs +ffffffff82a183f0 r rtl8192ce_bb_vals_1t +ffffffff82a186e0 r rtl8192ce_bb_vals_2t +ffffffff82a19000 R ral_pci_ca +ffffffff82a19030 R ral_pci_devices +ffffffff82a1a000 R acx_pci_ca +ffffffff82a1a028 R acx_pci_devices +ffffffff82a1b000 R pgt_pci_ca +ffffffff82a1b028 R pgt_pci_devices +ffffffff82a1c000 R malo_pci_ca +ffffffff82a1c028 R malo_pci_devices +ffffffff82a1d000 R bwi_pci_ca +ffffffff82a1d030 R bwi_pci_devices +ffffffff82a1e000 R piixpm_ca +ffffffff82a1e030 R piixpm_ids +ffffffff82a1f000 R vic_ca +ffffffff82a1f028 R vic_devices +ffffffff82a20000 R vmx_devices +ffffffff82a20008 R vmx_ca +ffffffff82a20030 r vmx_tx_kstat_tpl +ffffffff82a200d0 r vmx_kstat_rate +ffffffff82a200e0 r vmx_rx_kstat_tpl +ffffffff82a21000 R vmwpvs_ca +ffffffff82a21028 R vmwpvs_switch +ffffffff82a22000 R lii_ca +ffffffff82a22028 R lii_devices +ffffffff82a23000 R ichiic_ca +ffffffff82a23030 R ichiic_ids +ffffffff82a24000 R viapm_ca +ffffffff82a24030 R viapm_ids +ffffffff82a24070 r val_to_temp +ffffffff82a24870 r val_to_uV.mult +ffffffff82a25000 R amdiic_ca +ffffffff82a25028 R amdiic_ids +ffffffff82a26000 R nviic_ca +ffffffff82a26030 R nviic_ids +ffffffff82a27000 R sdhc_pci_ca +ffffffff82a28000 R kate_ca +ffffffff82a28030 r kate_proc +ffffffff82a29000 R km_ca +ffffffff82a29030 r km_devices +ffffffff82a2a000 R ksmn_ca +ffffffff82a2a030 r ksmn_devices +ffffffff82a2b000 R iosf_pci_ca +ffffffff82a2c000 R itherm_devices +ffffffff82a2c008 R itherm_ca +ffffffff82a2d000 R pchtemp_ca +ffffffff82a2d030 R pchtemp_devices +ffffffff82a2e000 R rtsx_pci_ca +ffffffff82a2f000 R xspd_ca +ffffffff82a2f028 R xspd_devices +ffffffff82a30000 R virtio_pci_ca +ffffffff82a31000 R dwiic_pci_ca +ffffffff82a31030 R dwiic_pci_ids +ffffffff82a32000 R bwfm_pci_ca +ffffffff82a32030 r bwfm_pci_devices +ffffffff82a33000 R ccp_pci_ca +ffffffff82a33030 r ccp_pci_devices +ffffffff82a34000 R bnxt_devices +ffffffff82a34040 R bnxt_ca +ffffffff82a35000 R mcx_ca +ffffffff82a35030 r mcx_devices +ffffffff82a35060 r mcx_rss_config +ffffffff82a350d0 r mcx_eth_cap_map +ffffffff82a352d0 r mcx_ext_eth_cap_map +ffffffff82a353d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff82a353e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82a35400 r mcx_kstat_ppcnt_rfc2819 +ffffffff82a35418 r mcx_kstat_ppcnt_rfc3635 +ffffffff82a35430 r mcx_ppcnt_ieee8023_tpl +ffffffff82a355b0 r mcx_ppcnt_rfc2863_tpl +ffffffff82a356c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82a35870 r mcx_ppcnt_rfc3635_tpl +ffffffff82a359b0 r mcx_kstat_mtmp_tpl +ffffffff82a35a50 r mcx_kstat_mtmp_rate +ffffffff82a35a60 r mcx_queue_kstat_tpl +ffffffff82a36000 R iavf_ca +ffffffff82a36030 r iavf_devices +ffffffff82a36040 r iavf_aq_regs +ffffffff82a360b0 r iavf_link_speeds +ffffffff82a37000 R rge_ca +ffffffff82a37028 R rge_devices +ffffffff82a37030 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff82a37050 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff82a370b0 r rtl8125_mac_cfg3_mcu +ffffffff82a37950 r rtl8125_mac_cfg5_mcu +ffffffff82a38970 r rtl8125_mac_bps +ffffffff82a38d70 r rtl8125b_mac_bps +ffffffff82a38f98 r rge_kstats_tpl +ffffffff82a3a000 R igc_devices +ffffffff82a3a040 R igc_ca +ffffffff82a3a070 r igc_counters +ffffffff82a3b000 R ngbe_devices +ffffffff82a3b008 R ngbe_ca +ffffffff82a3c000 R com_pci_ca +ffffffff82a3c030 R com_pci_ids +ffffffff82a3d000 R ufshci_pci_ca +ffffffff82a3e000 r agp_attach.agp_max +ffffffff82a3e048 R agp_ca +ffffffff82a3f000 R intagp_ca +ffffffff82a40000 r drm_plane_create_rotation_property.props +ffffffff82a41000 r drm_bridge_priv_state_funcs +ffffffff82a43000 r color_encoding_name +ffffffff82a43020 r color_range_name +ffffffff82a44000 r drm_subpixel_enum_list +ffffffff82a44060 r drm_dpms_enum_list +ffffffff82a440a0 r drm_dvi_i_select_enum_list +ffffffff82a440d0 r drm_dvi_i_subconnector_enum_list +ffffffff82a44100 r drm_tv_mode_enum_list +ffffffff82a44170 r drm_tv_select_enum_list +ffffffff82a441c0 r drm_tv_subconnector_enum_list +ffffffff82a44210 r drm_dp_subconnector_enum_list +ffffffff82a44280 r colorspace_names +ffffffff82a44300 r drm_link_status_enum_list +ffffffff82a44320 r drm_scaling_mode_enum_list +ffffffff82a44360 r drm_aspect_ratio_enum_list +ffffffff82a44390 r drm_content_type_enum_list +ffffffff82a443e0 r drm_panel_orientation_enum_list +ffffffff82a44420 r privacy_screen_enum +ffffffff82a45000 r drm_crtc_fence_ops +ffffffff82a46000 r drm_dmt_modes +ffffffff82a48940 r edid_cea_modes_1 +ffffffff82a4c4d0 r edid_cea_modes_193 +ffffffff82a4d180 r edid_quirk_list +ffffffff82a4d360 r drm_mode_do_interlace_quirk.cea_interlaced +ffffffff82a4d3a0 r edid_4k_modes +ffffffff82a4d600 r edid_est_modes +ffffffff82a4de00 r est3_modes +ffffffff82a4df60 r stereo_mandatory_modes +ffffffff82a4dfe0 r extra_modes +ffffffff82a4f000 r drm_encoder_enum_list +ffffffff82a51000 r drm_fbdev_dma_helper_funcs +ffffffff82a51010 r drm_fbdev_dma_client_funcs +ffffffff82a51030 r drm_fbdev_dma_fb_ops +ffffffff82a52000 r drm_fbdev_generic_helper_funcs +ffffffff82a52010 r drm_fbdev_generic_client_funcs +ffffffff82a52030 r drm_fbdev_generic_fb_ops +ffffffff82a54000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82a54004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82a54008 r drm_fb_xrgb8888_to_xrgb1555.dst_pixsize +ffffffff82a5400c r drm_fb_xrgb8888_to_argb1555.dst_pixsize +ffffffff82a54010 r drm_fb_xrgb8888_to_rgba5551.dst_pixsize +ffffffff82a54014 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff82a54018 r drm_fb_xrgb8888_to_argb8888.dst_pixsize +ffffffff82a5401c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82a54020 r drm_fb_xrgb8888_to_argb2101010.dst_pixsize +ffffffff82a54024 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82a54028 r drm_fb_xrgb8888_to_xbgr8888.dst_pixsize +ffffffff82a5402c r drm_fb_xrgb8888_to_abgr8888.dst_pixsize +ffffffff82a55000 r __drm_format_info.formats +ffffffff82a56000 R drm_pgops +ffffffff82a57000 r drm_gem_dma_default_funcs +ffffffff82a58000 R drm_gem_fb_funcs +ffffffff82a59000 r drm_ioctls +ffffffff82a5b000 r dma_fence_stub_ops +ffffffff82a5b040 R dma_fence_array_ops +ffffffff82a5b080 R dma_fence_chain_ops +ffffffff82a5b0c0 R dmabufops +ffffffff82a5b0f8 R syncfileops +ffffffff82a5c000 r drm_plane_type_enum_list +ffffffff82a5d000 r tv_modes_parameters +ffffffff82a5d0c0 r drm_mode_status_names +ffffffff82a5d200 r drm_named_modes +ffffffff82a5e000 r primary_plane_funcs +ffffffff82a5e068 r safe_modeset_formats +ffffffff82a5f000 r orientation_data +ffffffff82a629c8 r lcd800x1280_rightside_up +ffffffff82a629e0 r lcd720x1280_rightside_up +ffffffff82a629f8 r lcd800x1280_leftside_up +ffffffff82a62a10 r lcd1080x1920_leftside_up +ffffffff82a62a28 r lcd1200x1920_rightside_up +ffffffff82a62a40 r gpd_micropc +ffffffff82a62a58 r gpd_pocket +ffffffff82a62a70 r gpd_pocket2 +ffffffff82a62a88 r gpd_win +ffffffff82a62aa0 r gpd_win2 +ffffffff82a62ab8 r lcd1080x1920_rightside_up +ffffffff82a62ad0 r itworks_tw891 +ffffffff82a62ae8 r lcd1600x2560_leftside_up +ffffffff82a62b00 r lcd1600x2560_rightside_up +ffffffff82a62b18 r onegx1_pro +ffffffff82a62b30 r lcd1280x1920_rightside_up +ffffffff82a62b48 r gpd_onemix2s +ffffffff82a62b60 r .compoundliteral +ffffffff82a62b70 r .compoundliteral.5 +ffffffff82a62b98 r .compoundliteral.9 +ffffffff82a62bb8 r .compoundliteral.17 +ffffffff82a62bf8 r .compoundliteral.21 +ffffffff82a62c18 r .compoundliteral.23 +ffffffff82a62c28 r .compoundliteral.25 +ffffffff82a62c38 r .compoundliteral.29 +ffffffff82a63000 r drm_gem_prime_dmabuf_ops +ffffffff82a65000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82a66000 r drm_dp_phy_name.phy_names +ffffffff82a66048 r drm_dp_i2c_algo +ffffffff82a66058 r drm_dp_i2c_lock_ops +ffffffff82a66070 r dp_aux_bl_ops +ffffffff82a66090 r dpcd_quirk_list +ffffffff82a66320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82a67000 R drm_dp_mst_topology_state_funcs +ffffffff82a67020 r drm_dp_mst_req_type_str.req_type_str +ffffffff82a671f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82a67220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82a67278 r drm_dp_mst_i2c_algo +ffffffff82a68000 r rc_parameters_1_2_444 +ffffffff82a685f0 r rc_parameters_pre_scr +ffffffff82a68920 r rc_parameters_1_2_422 +ffffffff82a68df0 r rc_parameters_1_2_420 +ffffffff82a6a000 r hdmi_colorimetry_val +ffffffff82a6b018 R ttm_bo_vm_ops +ffffffff82a6c000 r ttm_range_manager_func +ffffffff82a6d018 r ttm_kmap_iter_io_ops +ffffffff82a6d030 r ttm_kmap_iter_linear_io_ops +ffffffff82a6e000 r ttm_sys_manager_func +ffffffff82a6f000 r ttm_kmap_iter_tt_ops +ffffffff82a70000 r drm_sched_fence_ops_scheduled +ffffffff82a70040 r drm_sched_fence_ops_finished +ffffffff82a71000 R ch7017_ops +ffffffff82a72000 R ch7xxx_ops +ffffffff82a72060 r ch7xxx_ids +ffffffff82a73000 R ivch_ops +ffffffff82a73060 r backup_addresses +ffffffff82a74000 R ns2501_ops +ffffffff82a74060 r mode_agnostic_values +ffffffff82a740e0 r ns2501_modes +ffffffff82a75000 R sil164_ops +ffffffff82a76000 R tfp410_ops +ffffffff82a77000 r chv_dpll +ffffffff82a77050 r vlv_dpll +ffffffff82a770a0 r g4x_dpll +ffffffff82a770f0 r pch_dpll +ffffffff82a77138 r intel_dp_enc_funcs +ffffffff82a78000 r intel_hdmi_enc_funcs +ffffffff82a79000 r vlv_primary_formats +ffffffff82a79030 r ivb_primary_formats +ffffffff82a79050 r i965_primary_formats +ffffffff82a79070 r i8xx_primary_formats +ffffffff82a79080 r i965_plane_funcs +ffffffff82a790e8 r i8xx_plane_funcs +ffffffff82a7a000 r ilk_wm_funcs +ffffffff82a7a040 r vlv_wm_funcs +ffffffff82a7a080 r g4x_wm_funcs +ffffffff82a7a0c0 r nop_funcs +ffffffff82a7a100 r pnv_wm_funcs +ffffffff82a7a140 r i965_wm_funcs +ffffffff82a7a180 r i9xx_wm_funcs +ffffffff82a7a1c0 r i845_wm_funcs +ffffffff82a7a200 r cxsr_latency_table +ffffffff82a7b000 r gen11_dsi_encoder_funcs +ffffffff82a7b020 r gen11_dsi_connector_funcs +ffffffff82a7b098 r gen11_dsi_connector_helper_funcs +ffffffff82a7b0f8 r gen11_dsi_host_ops +ffffffff82a7c000 r intel_plane_helper_funcs +ffffffff82a7d000 r g4x_audio_funcs +ffffffff82a7d018 r ibx_audio_funcs +ffffffff82a7d030 r hsw_audio_funcs +ffffffff82a7d050 r hdmi_audio_clock +ffffffff82a7d0c0 r dp_aud_n_m +ffffffff82a7d270 r hdmi_aud_ncts_36bpp +ffffffff82a7d350 r hdmi_aud_ncts_30bpp +ffffffff82a7d430 r hdmi_aud_ncts_24bpp +ffffffff82a7e000 r intel_backlight_device_ops +ffffffff82a7e018 r bxt_pwm_funcs +ffffffff82a7e048 r cnp_pwm_funcs +ffffffff82a7e078 r lpt_pwm_funcs +ffffffff82a7e0a8 r spt_pwm_funcs +ffffffff82a7e0d8 r pch_pwm_funcs +ffffffff82a7e108 r ext_pwm_funcs +ffffffff82a7e138 r vlv_pwm_funcs +ffffffff82a7e168 r i965_pwm_funcs +ffffffff82a7e198 r i9xx_pwm_funcs +ffffffff82a7e1c8 r pwm_bl_funcs +ffffffff82a7f000 r bdb_blocks +ffffffff82a7f160 r adlp_aux_ch_map +ffffffff82a7f169 r adls_aux_ch_map +ffffffff82a7f170 r rkl_aux_ch_map +ffffffff82a7f175 r direct_aux_ch_map +ffffffff82a7f17e r translate_iboost.mapping +ffffffff82a7f181 r adlp_ddc_pin_map +ffffffff82a7f18e r adls_ddc_pin_map +ffffffff82a7f19b r rkl_pch_tgp_ddc_pin_map +ffffffff82a7f1a6 r gen9bc_tgp_ddc_pin_map +ffffffff82a7f1b1 r icp_ddc_pin_map +ffffffff82a7f1c0 r cnp_ddc_pin_map +ffffffff82a80000 r mtl_sa_info +ffffffff82a80006 r adlp_sa_info +ffffffff82a8000c r adls_sa_info +ffffffff82a80012 r rkl_sa_info +ffffffff82a80018 r tgl_sa_info +ffffffff82a80020 r intel_bw_funcs +ffffffff82a81000 r intel_cdclk_funcs +ffffffff82a81010 r mtl_cdclk_funcs +ffffffff82a81030 r mtl_cdclk_table +ffffffff82a81088 r tgl_cdclk_funcs +ffffffff82a810b0 r dg2_cdclk_table +ffffffff82a81160 r adlp_a_step_cdclk_table +ffffffff82a811e0 r rplu_cdclk_table +ffffffff82a812c8 r rplu_cdclk_funcs +ffffffff82a812f0 r adlp_cdclk_table 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g33_get_cdclk.div_4000 +ffffffff82a818b4 r g33_get_cdclk.div_4800 +ffffffff82a818ba r g33_get_cdclk.div_5333 +ffffffff82a818c0 r i965gm_get_cdclk.div_3200 +ffffffff82a818c3 r i965gm_get_cdclk.div_4000 +ffffffff82a818c6 r i965gm_get_cdclk.div_5333 +ffffffff82a82000 r chv_color_funcs +ffffffff82a82040 r vlv_color_funcs +ffffffff82a82080 r i965_color_funcs +ffffffff82a820c0 r i9xx_color_funcs +ffffffff82a82100 r tgl_color_funcs +ffffffff82a82140 r icl_color_funcs +ffffffff82a82180 r glk_color_funcs +ffffffff82a821c0 r skl_color_funcs +ffffffff82a82200 r bdw_color_funcs +ffffffff82a82240 r hsw_color_funcs +ffffffff82a82280 r ivb_color_funcs +ffffffff82a822c0 r ilk_color_funcs +ffffffff82a82300 r chv_cgm_csc_matrix_identity +ffffffff82a8231e r ilk_csc_matrix_rgb_to_ycbcr +ffffffff82a8233c r ilk_csc_matrix_limited_range +ffffffff82a8235a r ilk_csc_matrix_identity +ffffffff82a83000 r icl_procmon_values +ffffffff82a84000 r force_audio_names +ffffffff82a84040 r broadcast_rgb_names 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gen8_update_reg_state_unlocked.flex_regs +ffffffff82af5110 r gen8_oa_mux_regs +ffffffff82af5130 r xehp_oa_b_counters +ffffffff82af5150 r gen12_oa_b_counters +ffffffff82af5190 r mtl_oam_b_counters +ffffffff82af51c0 r mtl_oa_mux_regs +ffffffff82af51f0 r gen12_oa_mux_regs +ffffffff82af6000 r i915_query_funcs +ffffffff82af7000 R i915_fence_ops +ffffffff82af8000 r rsgt_ops +ffffffff82af9000 r fence_ops +ffffffff82afa000 r i915_ttm_buddy_manager_func +ffffffff82afb000 r bind_ops +ffffffff82afc000 r nop_clock_gating_funcs +ffffffff82afc008 r pvc_clock_gating_funcs +ffffffff82afc010 r dg2_clock_gating_funcs +ffffffff82afc018 r xehpsdv_clock_gating_funcs +ffffffff82afc020 r adlp_clock_gating_funcs +ffffffff82afc028 r gen12lp_clock_gating_funcs +ffffffff82afc030 r icl_clock_gating_funcs +ffffffff82afc038 r cfl_clock_gating_funcs +ffffffff82afc040 r skl_clock_gating_funcs +ffffffff82afc048 r kbl_clock_gating_funcs +ffffffff82afc050 r bxt_clock_gating_funcs +ffffffff82afc058 r glk_clock_gating_funcs +ffffffff82afc060 r bdw_clock_gating_funcs +ffffffff82afc068 r chv_clock_gating_funcs +ffffffff82afc070 r hsw_clock_gating_funcs +ffffffff82afc078 r ivb_clock_gating_funcs +ffffffff82afc080 r vlv_clock_gating_funcs +ffffffff82afc088 r gen6_clock_gating_funcs +ffffffff82afc090 r ilk_clock_gating_funcs +ffffffff82afc098 r g4x_clock_gating_funcs +ffffffff82afc0a0 r i965gm_clock_gating_funcs +ffffffff82afc0a8 r i965g_clock_gating_funcs +ffffffff82afc0b0 r gen3_clock_gating_funcs +ffffffff82afc0b8 r i85x_clock_gating_funcs +ffffffff82afc0c0 r i830_clock_gating_funcs +ffffffff82afd000 r platform_names +ffffffff82afd140 r subplatform_ult_ids +ffffffff82afd1a4 r no_display +ffffffff82afe000 r intel_region_map +ffffffff82b00000 r dg2_g10_revid_step_tbl +ffffffff82b00030 r dg2_g11_revid_step_tbl +ffffffff82b00050 r xehpsdv_revids +ffffffff82b00080 r adlp_rplp_revids +ffffffff82b000a0 r adlp_revids +ffffffff82b000e0 r adls_rpls_revids +ffffffff82b00120 r adls_revids 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xelpmp_shadowed_regs +ffffffff82b04000 r i915_pxp_tee_component_ops +ffffffff82b05000 r intel_dram_type_str.str +ffffffff82b06000 r atom_op_names +ffffffff82b063e0 r opcode_table +ffffffff82b06b90 r atom_dst_to_src +ffffffff82b06c10 r atom_io_names +ffffffff82b06c40 r atom_table_names +ffffffff82b06e90 r atom_iio_len +ffffffff82b07000 r atombios_helper_funcs +ffffffff82b07080 r vga_control_regs +ffffffff82b08000 r voltage_names +ffffffff82b08020 r pre_emph_names +ffffffff82b09000 r radeon_atom_backlight_ops +ffffffff82b09018 r radeon_atom_enc_funcs +ffffffff82b09038 r radeon_atom_dig_helper_funcs +ffffffff82b090a0 r radeon_atom_dac_helper_funcs +ffffffff82b09108 r radeon_atom_ext_helper_funcs +ffffffff82b0a000 r caicos_cgcg_cgls_default +ffffffff82b0a240 r barts_mgcg_default +ffffffff82b0a900 r turks_mgcg_default +ffffffff82b0ad80 r caicos_mgcg_default +ffffffff82b0b110 r turks_sysls_default +ffffffff82b0b1d0 r caicos_sysls_default +ffffffff82b0b280 r caicos_cgcg_cgls_enable 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ci_SECT_CONTEXT_def_7 +ffffffff82b11510 r cik_default_state +ffffffff82b13000 r dce3_2_afmt_write_sad_regs.eld_reg_to_type +ffffffff82b14000 r dce6_afmt_write_sad_regs.eld_reg_to_type +ffffffff82b15000 r ni_tx_offsets +ffffffff82b15020 r evergreen_dp_offsets +ffffffff82b15040 r evergreen_disp_int_status +ffffffff82b15060 r evergreen_golden_registers +ffffffff82b15260 r evergreen_golden_registers2 +ffffffff82b15310 r cypress_mgcg_init +ffffffff82b15a10 r juniper_mgcg_init +ffffffff82b15e80 r redwood_mgcg_init +ffffffff82b161b0 r cedar_golden_registers +ffffffff82b16390 r cedar_mgcg_init +ffffffff82b165f0 r wrestler_golden_registers +ffffffff82b16840 r supersumo_golden_registers +ffffffff82b16ba0 r sumo_golden_registers +ffffffff82b16be0 r barts_golden_registers +ffffffff82b16e00 r turks_golden_registers +ffffffff82b17040 r caicos_golden_registers +ffffffff82b17280 r sumo_rlc_save_restore_register_list +ffffffff82b173d0 r evergreen_cs_data +ffffffff82b17410 r SECT_CONTEXT_defs +ffffffff82b17490 r SECT_CLEAR_defs +ffffffff82b174b0 r SECT_CTRLCONST_defs +ffffffff82b174d0 r SECT_CONTEXT_def_2 +ffffffff82b174f0 r SECT_CONTEXT_def_4 +ffffffff82b17680 r SECT_CONTEXT_def_5 +ffffffff82b176a0 r SECT_CONTEXT_def_6 +ffffffff82b17780 r SECT_CONTEXT_def_1 +ffffffff82b17f20 r SECT_CONTEXT_def_3 +ffffffff82b18000 r SECT_CONTEXT_def_7 +ffffffff82b18488 r SECT_CLEAR_def_1 +ffffffff82b18494 r SECT_CTRLCONST_def_1 +ffffffff82b184a0 r evergreen_default_state +ffffffff82b19000 r cayman_reg_safe_bm +ffffffff82b1b000 r evergreen_reg_safe_bm +ffffffff82b1e000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82b1f000 r didt_config_kv +ffffffff82b20000 r barts_io_mc_regs +ffffffff82b200f0 r turks_io_mc_regs +ffffffff82b201e0 r caicos_io_mc_regs +ffffffff82b202d0 r cayman_io_mc_regs +ffffffff82b203c0 r cayman_golden_registers +ffffffff82b20580 r cayman_golden_registers2 +ffffffff82b205d0 r dvst_golden_registers +ffffffff82b20860 r dvst_golden_registers2 +ffffffff82b20890 r scrapper_golden_registers +ffffffff82b20d70 r tn_rlc_save_restore_register_list +ffffffff82b20f60 r cayman_cs_data +ffffffff82b20fa0 r SECT_CONTEXT_defs +ffffffff82b21020 r SECT_CLEAR_defs +ffffffff82b21040 r SECT_CTRLCONST_defs +ffffffff82b21060 r SECT_CONTEXT_def_2 +ffffffff82b21080 r SECT_CONTEXT_def_4 +ffffffff82b21210 r SECT_CONTEXT_def_5 +ffffffff82b21230 r SECT_CONTEXT_def_1 +ffffffff82b219d0 r SECT_CONTEXT_def_3 +ffffffff82b21ab0 r SECT_CONTEXT_def_6 +ffffffff82b21b90 r SECT_CONTEXT_def_7 +ffffffff82b22018 r SECT_CLEAR_def_1 +ffffffff82b22024 r SECT_CTRLCONST_def_1 +ffffffff82b22030 r cayman_default_state +ffffffff82b23000 r cac_weights_cayman_xt +ffffffff82b23128 r cac_weights_cayman_pro +ffffffff82b23250 r cac_weights_cayman_le +ffffffff82b23380 r cayman_cgcg_cgls_default +ffffffff82b235c0 r cayman_mgcg_default +ffffffff82b23f20 r cayman_sysls_default +ffffffff82b23ff0 r cayman_cgcg_cgls_enable +ffffffff82b24240 r cayman_cgcg_cgls_disable +ffffffff82b244a0 r cayman_mgcg_enable +ffffffff82b24520 r cayman_mgcg_disable +ffffffff82b245a0 r cayman_sysls_enable +ffffffff82b24670 r cayman_sysls_disable +ffffffff82b25000 r rn50_reg_safe_bm +ffffffff82b251a0 r r100_reg_safe_bm +ffffffff82b26000 r r200_reg_safe_bm +ffffffff82b27000 r r300_reg_safe_bm +ffffffff82b28000 r r420_reg_safe_bm +ffffffff82b2a000 r color_formats_table +ffffffff82b2a480 r r600_reg_safe_bm +ffffffff82b2d000 R r600_utc +ffffffff82b2d040 R r600_dtc +ffffffff82b2d080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82b2f000 r r100_gfx_ring +ffffffff82b2f070 r r300_gfx_ring +ffffffff82b2f0e0 r rv515_gfx_ring +ffffffff82b2f150 r r600_gfx_ring +ffffffff82b2f1c0 r r600_dma_ring +ffffffff82b2f230 r rv6xx_uvd_ring +ffffffff82b2f2a0 r rv770_uvd_ring +ffffffff82b2f310 r evergreen_gfx_ring +ffffffff82b2f380 r evergreen_dma_ring +ffffffff82b2f3f0 r cayman_gfx_ring +ffffffff82b2f460 r cayman_dma_ring +ffffffff82b2f4d0 r cayman_uvd_ring +ffffffff82b2f540 r trinity_vce_ring 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radeon_dvi_connector_funcs +ffffffff82b342a0 r radeon_dvi_connector_helper_funcs +ffffffff82b34300 r radeon_edp_connector_funcs +ffffffff82b34378 r radeon_tv_connector_funcs +ffffffff82b343f0 r radeon_tv_connector_helper_funcs +ffffffff82b34450 r radeon_lvds_connector_funcs +ffffffff82b344c8 r radeon_lvds_connector_helper_funcs +ffffffff82b35000 r radeon_family_name +ffffffff82b353f0 r radeon_px_quirk_list +ffffffff82b36000 r radeon_fb_funcs +ffffffff82b36018 r radeon_mode_funcs +ffffffff82b36060 r radeon_tmds_pll_enum_list +ffffffff82b36080 r radeon_tv_std_enum_list +ffffffff82b36100 r radeon_underscan_enum_list +ffffffff82b36130 r radeon_audio_enum_list +ffffffff82b36160 r radeon_dither_enum_list +ffffffff82b36180 r radeon_output_csc_enum_list +ffffffff82b361c0 r radeon_crtc_funcs +ffffffff82b36280 r hpd_names +ffffffff82b362b0 r encoder_names +ffffffff82b363e0 r radeon_afmt_init.eg_offsets +ffffffff82b37000 r aux_offset +ffffffff82b38000 R radeondrm_ca +ffffffff82b38030 r pciidlist +ffffffff82b3c1d0 r kms_driver +ffffffff82b3c2c0 r radeon_ioctls_kms +ffffffff82b3d000 r radeon_fbdev_fb_helper_funcs +ffffffff82b3d010 r radeon_fbdev_client_funcs +ffffffff82b3d030 r radeon_fbdev_fb_ops +ffffffff82b3e000 R radeon_fence_ops +ffffffff82b40000 R radeon_gem_object_funcs +ffffffff82b40070 r radeon_gem_vm_ops +ffffffff82b41000 r radeon_i2c_algo +ffffffff82b41010 r radeon_atom_i2c_algo +ffffffff82b42000 r legacy_helper_funcs +ffffffff82b43000 r radeon_backlight_ops +ffffffff82b43018 r radeon_legacy_lvds_enc_funcs +ffffffff82b43038 r radeon_legacy_lvds_helper_funcs +ffffffff82b430a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82b430c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82b43128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82b43148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82b431b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82b431d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82b43238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82b43258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82b44000 r SLOPE_value +ffffffff82b44030 r YCOEF_EN_value +ffffffff82b44060 r YCOEF_value +ffffffff82b44090 r available_tv_modes +ffffffff82b44110 r hor_timing_NTSC +ffffffff82b44150 r vert_timing_NTSC +ffffffff82b44190 r hor_timing_PAL +ffffffff82b441d0 r vert_timing_PAL +ffffffff82b46000 r radeon_pm_state_type_name +ffffffff82b47000 r radeon_evict_flags.placements +ffffffff82b4a000 r rs600_reg_safe_bm +ffffffff82b4c000 r rv515_reg_safe_bm +ffffffff82b4d000 r dll_speed_table +ffffffff82b4e000 r r7xx_golden_registers +ffffffff82b4e090 r r7xx_golden_dyn_gpr_registers +ffffffff82b4e100 r rv770ce_golden_registers +ffffffff82b4e160 r rv770_golden_registers +ffffffff82b4e1b0 r rv770_mgcg_init +ffffffff82b4e8f0 r rv730_golden_registers +ffffffff82b4e950 r rv730_mgcg_init +ffffffff82b4eee0 r rv710_golden_registers +ffffffff82b4ef30 r rv710_mgcg_init +ffffffff82b4f1d0 r rv740_golden_registers +ffffffff82b4f360 r rv740_mgcg_init +ffffffff82b51000 r rv730_smc_int_vectors +ffffffff82b51040 r rv710_smc_int_vectors +ffffffff82b51080 r rv740_smc_int_vectors +ffffffff82b510c0 r cypress_smc_int_vectors +ffffffff82b51100 r caicos_smc_int_vectors +ffffffff82b51140 r cayman_smc_int_vectors +ffffffff82b52000 r tahiti_io_mc_regs +ffffffff82b52120 r pitcairn_io_mc_regs +ffffffff82b52240 r verde_io_mc_regs +ffffffff82b52360 r oland_io_mc_regs +ffffffff82b52480 r hainan_io_mc_regs +ffffffff82b525a0 r crtc_offsets +ffffffff82b525c0 r si_disp_int_status +ffffffff82b525e0 r tahiti_golden_registers +ffffffff82b52760 r tahiti_golden_rlc_registers +ffffffff82b527b0 r tahiti_mgcg_cgcg_init +ffffffff82b52d98 r tahiti_golden_registers2 +ffffffff82b52db0 r pitcairn_golden_registers +ffffffff82b52f00 r pitcairn_golden_rlc_registers +ffffffff82b52f40 r pitcairn_mgcg_cgcg_init +ffffffff82b533b0 r verde_golden_registers +ffffffff82b53620 r verde_golden_rlc_registers +ffffffff82b53660 r verde_mgcg_cgcg_init +ffffffff82b53ae0 r oland_golden_registers +ffffffff82b53c30 r oland_golden_rlc_registers +ffffffff82b53c70 r oland_mgcg_cgcg_init +ffffffff82b54000 r hainan_golden_registers +ffffffff82b5412c r hainan_golden_registers2 +ffffffff82b54140 r hainan_mgcg_cgcg_init +ffffffff82b544b0 r verde_rlc_save_restore_register_list +ffffffff82b54820 r si_cs_data +ffffffff82b54840 r si_SECT_CONTEXT_defs +ffffffff82b548c0 r si_SECT_CONTEXT_def_1 +ffffffff82b54c10 r si_SECT_CONTEXT_def_3 +ffffffff82b54c30 r si_SECT_CONTEXT_def_4 +ffffffff82b54ea4 r si_SECT_CONTEXT_def_5 +ffffffff82b54ea8 r si_SECT_CONTEXT_def_6 +ffffffff82b54eb0 r si_SECT_CONTEXT_def_2 +ffffffff82b552f0 r si_SECT_CONTEXT_def_7 +ffffffff82b556a0 r mc_cg_registers +ffffffff82b556d0 r si_default_state +ffffffff82b56000 r cac_weights_tahiti +ffffffff82b564d0 r lcac_tahiti +ffffffff82b56ba0 r cac_override_tahiti +ffffffff82b56bb4 r powertune_data_tahiti +ffffffff82b56bf0 r dte_data_tahiti +ffffffff82b56cc0 r dte_data_new_zealand +ffffffff82b56d90 r dte_data_malta +ffffffff82b56e60 r lcac_pitcairn +ffffffff82b57530 r cac_override_pitcairn +ffffffff82b57544 r powertune_data_pitcairn +ffffffff82b57580 r lcac_cape_verde +ffffffff82b579d0 r cac_override_cape_verde +ffffffff82b579e4 r powertune_data_cape_verde +ffffffff82b57a20 r cac_weights_cape_verde_pro +ffffffff82b57ef0 r cac_weights_heathrow +ffffffff82b583c0 r cac_weights_chelsea_xt +ffffffff82b58890 r cac_weights_chelsea_pro +ffffffff82b58d60 r cac_weights_cape_verde +ffffffff82b59230 r cac_weights_mars_pro +ffffffff82b59700 r lcac_mars_pro +ffffffff82b59a60 r cac_override_oland +ffffffff82b59a74 r powertune_data_mars_pro +ffffffff82b59ab0 r cac_weights_mars_xt +ffffffff82b59f80 r cac_weights_oland_pro +ffffffff82b5a450 r cac_weights_oland_xt +ffffffff82b5a920 r lcac_oland +ffffffff82b5ac7c r powertune_data_oland +ffffffff82b5acc0 r cac_weights_hainan +ffffffff82b5b184 r powertune_data_hainan +ffffffff82b5b1c0 r dte_data_aruba_pro +ffffffff82b5b290 r dte_data_tahiti_pro +ffffffff82b5b360 r dte_data_curacao_pro +ffffffff82b5b430 r dte_data_neptune_xt +ffffffff82b5b500 r dte_data_sun_xt +ffffffff82b5b5d0 r dte_data_venus_xtx +ffffffff82b5b6a0 r dte_data_venus_xt +ffffffff82b5b770 r dte_data_venus_pro +ffffffff82b5b840 r dte_data_mars_pro +ffffffff82b5c000 r si_program_jump_on_start.data +ffffffff82b5d000 r sumo_dtc +ffffffff82b5e000 r trinity_mgcg_shls_default +ffffffff82b5e380 r trinity_sysls_enable +ffffffff82b5e450 r trinity_sysls_disable +ffffffff82b60000 r GC_BASE +ffffffff82b600a8 r HDP_BASE +ffffffff82b60150 r MMHUB_BASE +ffffffff82b601f8 r ATHUB_BASE +ffffffff82b602a0 r NBIO_BASE +ffffffff82b60348 r MP0_BASE +ffffffff82b603f0 r MP1_BASE +ffffffff82b60498 r DF_BASE +ffffffff82b60540 r OSSSYS_BASE +ffffffff82b605e8 r SDMA0_BASE +ffffffff82b60690 r SDMA1_BASE +ffffffff82b60738 r SDMA2_BASE +ffffffff82b607e0 r SDMA3_BASE +ffffffff82b60888 r SDMA4_BASE +ffffffff82b60930 r SMUIO_BASE +ffffffff82b609d8 r THM_BASE +ffffffff82b60a80 r UMC_BASE +ffffffff82b60b28 r VCN_BASE +ffffffff82b61000 r amdgpu_afmt_predefined_acr +ffffffff82b62000 r atom_op_names +ffffffff82b623e0 r opcode_table +ffffffff82b62bd0 r atom_dst_to_src +ffffffff82b62c50 r atom_io_names +ffffffff82b62c80 r atom_table_names +ffffffff82b62ed0 r atom_iio_len +ffffffff82b63000 r object_connector_convert +ffffffff82b63058 R amdgpu_vbios_version_attr_group +ffffffff82b64000 r voltage_names +ffffffff82b64020 r pre_emph_names +ffffffff82b65000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82b67000 r amdgpu_benchmark.common_modes +ffffffff82b68000 r amdgpu_cgs_ops +ffffffff82b69000 r amdgpu_connector_dp_funcs +ffffffff82b69078 r amdgpu_connector_dp_helper_funcs +ffffffff82b690d8 r amdgpu_connector_edp_funcs +ffffffff82b69150 r amdgpu_connector_vga_funcs +ffffffff82b691c8 r amdgpu_connector_vga_helper_funcs +ffffffff82b69228 r amdgpu_connector_dvi_funcs +ffffffff82b692a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82b69300 r amdgpu_connector_lvds_funcs +ffffffff82b69378 r amdgpu_connector_lvds_helper_funcs +ffffffff82b693e0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82b6b000 R amdgpu_ctx_num_entities +ffffffff82b6c000 r amdgpu_kms_driver +ffffffff82b6c0f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82b6d000 r hw_id_map +ffffffff82b6d090 r hw_id_names +ffffffff82b6e000 r hpd_names +ffffffff82b6e030 r encoder_names +ffffffff82b6e180 r dcc_retile_formats +ffffffff82b6e270 r dcc_formats +ffffffff82b6e360 R amdgpu_mode_funcs +ffffffff82b6e3b0 r amdgpu_underscan_enum_list +ffffffff82b6e3e0 r amdgpu_audio_enum_list +ffffffff82b6e410 r amdgpu_dither_enum_list +ffffffff82b6e430 r amdgpu_fb_funcs_atomic +ffffffff82b6e448 r amdgpu_fb_funcs +ffffffff82b6f000 R amdgpu_dmabuf_ops +ffffffff82b70000 R amdgpu_ioctls_kms +ffffffff82b70210 R amdgpu_partition_driver +ffffffff82b702f8 R amdgpu_ca +ffffffff82b70320 r pciidlist +ffffffff82b711f0 r amdgpu_unsupported_pciidlist +ffffffff82b71770 r amdgpu_kms_driver +ffffffff82b72000 r amdgpu_job_fence_ops +ffffffff82b72040 r amdgpu_fence_ops +ffffffff82b73000 r amdgpu_gem_object_funcs +ffffffff82b73070 r amdgpu_gem_vm_ops +ffffffff82b74000 R amdgpu_gtt_mgr_attr_group +ffffffff82b74018 r amdgpu_gtt_mgr_func +ffffffff82b75000 r amdgpu_atombios_i2c_algo +ffffffff82b76000 R node_id_to_phys_map +ffffffff82b77000 R amdgpu_sched_ops +ffffffff82b79000 r amdgpu_vram_names +ffffffff82b7a000 r amdgpu_preempt_mgr_func +ffffffff82b7b000 R psp_ip_funcs +ffffffff82b7b0a8 R psp_v3_1_ip_block +ffffffff82b7b0c0 R psp_v10_0_ip_block +ffffffff82b7b0d8 R psp_v11_0_ip_block +ffffffff82b7b0f0 R psp_v11_0_8_ip_block +ffffffff82b7b108 R psp_v12_0_ip_block +ffffffff82b7b120 R psp_v13_0_ip_block +ffffffff82b7b138 R psp_v13_0_4_ip_block +ffffffff82b7d000 r sw_ring_info +ffffffff82b7e000 r amdgpu_evict_flags.placements +ffffffff82b82000 R amdgpu_vkms_ip_block +ffffffff82b83000 R amdgpu_vm_cpu_funcs +ffffffff82b85000 R amdgpu_vm_sdma_funcs +ffffffff82b86000 R amdgpu_vram_mgr_attr_group +ffffffff82b86018 r amdgpu_vram_mgr_func +ffffffff82b86040 r amdgpu_dummy_vram_mgr_func +ffffffff82b87000 r xgmi_pcs_err_status_reg_arct +ffffffff82b87020 r xgmi3x16_pcs_ras_fields +ffffffff82b871f0 r xgmi_pcs_ras_fields +ffffffff82b87310 r wafl_pcs_ras_fields +ffffffff82b88000 r GC_BASE +ffffffff82b880c0 r HDP_BASE +ffffffff82b88180 r MMHUB_BASE +ffffffff82b88240 r ATHUB_BASE +ffffffff82b88300 r NBIF0_BASE +ffffffff82b883c0 r MP0_BASE +ffffffff82b88480 r MP1_BASE +ffffffff82b88540 r UVD_BASE +ffffffff82b88600 r DF_BASE +ffffffff82b886c0 r OSSSYS_BASE +ffffffff82b88780 r SDMA0_BASE +ffffffff82b88840 r SDMA1_BASE +ffffffff82b88900 r SDMA2_BASE +ffffffff82b889c0 r SDMA3_BASE +ffffffff82b88a80 r SDMA4_BASE +ffffffff82b88b40 r SDMA5_BASE +ffffffff82b88c00 r SDMA6_BASE +ffffffff82b88cc0 r SDMA7_BASE +ffffffff82b88d80 r SMUIO_BASE +ffffffff82b88e40 r THM_BASE +ffffffff82b88f00 r UMC_BASE +ffffffff82b88fc0 r RSMU_BASE +ffffffff82b8a000 r cz_ih_ip_funcs +ffffffff82b8a0a8 R cz_ih_ip_block +ffffffff82b8a0c0 r cz_ih_funcs +ffffffff82b8b000 r crtc_offsets +ffffffff82b8b020 r dce_v10_0_ip_funcs +ffffffff82b8b0c8 R dce_v10_0_ip_block +ffffffff82b8b0e0 R dce_v10_1_ip_block +ffffffff82b8b0f8 r dce_v10_0_display_funcs +ffffffff82b8b150 r hpd_offsets +ffffffff82b8b168 r dce_v10_0_encoder_funcs +ffffffff82b8b188 r dce_v10_0_dac_helper_funcs +ffffffff82b8b1f0 r dce_v10_0_dig_helper_funcs +ffffffff82b8b258 r dce_v10_0_ext_helper_funcs +ffffffff82b8b2c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82b8b2f0 r dce_v10_0_crtc_irq_funcs +ffffffff82b8b300 r dce_v10_0_pageflip_irq_funcs +ffffffff82b8b310 r dce_v10_0_hpd_irq_funcs +ffffffff82b8b320 r interrupt_status_offsets +ffffffff82b8b380 r dce_v10_0_crtc_funcs +ffffffff82b8b440 r dce_v10_0_crtc_helper_funcs +ffffffff82b8b4c0 r vga_control_regs +ffffffff82b8b4e0 r dig_offsets +ffffffff82b8b500 r pin_offsets +ffffffff82b8b520 r fiji_mgcg_cgcg_init +ffffffff82b8b540 r golden_settings_fiji_a10 +ffffffff82b8b570 r tonga_mgcg_cgcg_init +ffffffff82b8b590 r golden_settings_tonga_a11 ffffffff82b8c000 r crtc_offsets -ffffffff82b8c020 r dce_v10_0_ip_funcs -ffffffff82b8c0c8 R dce_v10_0_ip_block -ffffffff82b8c0e0 R dce_v10_1_ip_block -ffffffff82b8c0f8 r dce_v10_0_display_funcs +ffffffff82b8c020 r dce_v11_0_ip_funcs +ffffffff82b8c0c8 R dce_v11_0_ip_block +ffffffff82b8c0e0 R dce_v11_2_ip_block +ffffffff82b8c0f8 r dce_v11_0_display_funcs ffffffff82b8c150 r hpd_offsets -ffffffff82b8c168 r dce_v10_0_encoder_funcs -ffffffff82b8c188 r dce_v10_0_dac_helper_funcs -ffffffff82b8c1f0 r dce_v10_0_dig_helper_funcs -ffffffff82b8c258 r dce_v10_0_ext_helper_funcs -ffffffff82b8c2c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82b8c2f0 r dce_v10_0_crtc_irq_funcs -ffffffff82b8c300 r dce_v10_0_pageflip_irq_funcs -ffffffff82b8c310 r dce_v10_0_hpd_irq_funcs +ffffffff82b8c168 r dce_v11_0_encoder_funcs +ffffffff82b8c188 r dce_v11_0_dac_helper_funcs +ffffffff82b8c1f0 r dce_v11_0_dig_helper_funcs +ffffffff82b8c258 r dce_v11_0_ext_helper_funcs +ffffffff82b8c2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82b8c2f0 r dce_v11_0_crtc_irq_funcs +ffffffff82b8c300 r dce_v11_0_pageflip_irq_funcs +ffffffff82b8c310 r dce_v11_0_hpd_irq_funcs ffffffff82b8c320 r interrupt_status_offsets -ffffffff82b8c380 r dce_v10_0_crtc_funcs -ffffffff82b8c440 r dce_v10_0_crtc_helper_funcs +ffffffff82b8c380 r dce_v11_0_crtc_funcs +ffffffff82b8c440 r dce_v11_0_crtc_helper_funcs ffffffff82b8c4c0 r vga_control_regs ffffffff82b8c4e0 r dig_offsets -ffffffff82b8c500 r pin_offsets -ffffffff82b8c520 r fiji_mgcg_cgcg_init -ffffffff82b8c540 r golden_settings_fiji_a10 -ffffffff82b8c570 r tonga_mgcg_cgcg_init -ffffffff82b8c590 r golden_settings_tonga_a11 -ffffffff82b8d000 r crtc_offsets -ffffffff82b8d020 r dce_v11_0_ip_funcs -ffffffff82b8d0c8 R dce_v11_0_ip_block -ffffffff82b8d0e0 R dce_v11_2_ip_block -ffffffff82b8d0f8 r dce_v11_0_display_funcs -ffffffff82b8d150 r hpd_offsets -ffffffff82b8d168 r dce_v11_0_encoder_funcs -ffffffff82b8d188 r dce_v11_0_dac_helper_funcs -ffffffff82b8d1f0 r dce_v11_0_dig_helper_funcs -ffffffff82b8d258 r dce_v11_0_ext_helper_funcs -ffffffff82b8d2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82b8d2f0 r dce_v11_0_crtc_irq_funcs -ffffffff82b8d300 r dce_v11_0_pageflip_irq_funcs -ffffffff82b8d310 r dce_v11_0_hpd_irq_funcs -ffffffff82b8d320 r interrupt_status_offsets -ffffffff82b8d380 r dce_v11_0_crtc_funcs -ffffffff82b8d440 r dce_v11_0_crtc_helper_funcs -ffffffff82b8d4c0 r vga_control_regs -ffffffff82b8d4e0 r dig_offsets -ffffffff82b8d510 r cz_mgcg_cgcg_init -ffffffff82b8d530 r cz_golden_settings_a11 -ffffffff82b8d550 r stoney_golden_settings_a11 -ffffffff82b8d570 r polaris11_golden_settings_a11 -ffffffff82b8d5b0 r polaris10_golden_settings_a11 -ffffffff82b8e000 R df_v1_7_funcs -ffffffff82b8e070 r df_v1_7_channel_number -ffffffff82b8f000 R df_v3_6_funcs -ffffffff82b8f070 r df_v3_6_channel_number -ffffffff82b90000 R df_v4_3_funcs -ffffffff82b91000 r GC_BASE -ffffffff82b910a8 r HDP_BASE -ffffffff82b91150 r MMHUB_BASE -ffffffff82b911f8 r ATHUB_BASE -ffffffff82b912a0 r NBIO_BASE -ffffffff82b91348 r MP0_BASE -ffffffff82b913f0 r MP1_BASE -ffffffff82b91498 r VCN0_BASE -ffffffff82b91540 r DF_BASE -ffffffff82b915e8 r DCN_BASE -ffffffff82b91690 r OSSSYS_BASE -ffffffff82b91738 r SMUIO_BASE -ffffffff82b917e0 r THM_BASE -ffffffff82b92000 r gfx_v10_0_ip_funcs -ffffffff82b920a8 R gfx_v10_0_ip_block -ffffffff82b920c0 r gfx_v10_0_gfx_funcs -ffffffff82b92120 r golden_settings_gc_rlc_spm_10_0_nv10 -ffffffff82b983c0 r golden_settings_gc_rlc_spm_10_1_nv14 -ffffffff82b9bde0 r golden_settings_gc_rlc_spm_10_1_2_nv12 -ffffffff82ba2080 r gfx_v10_0_kiq_pm4_funcs -ffffffff82ba20c0 r gfx_v10_0_ring_funcs_kiq -ffffffff82ba2200 r gfx_v10_0_ring_funcs_gfx -ffffffff82ba2340 r gfx_v10_0_ring_funcs_compute -ffffffff82ba2480 r gfx_v10_0_eop_irq_funcs -ffffffff82ba2490 r gfx_v10_0_kiq_irq_funcs -ffffffff82ba24a0 r gfx_v10_0_priv_reg_irq_funcs -ffffffff82ba24b0 r gfx_v10_0_priv_inst_irq_funcs -ffffffff82ba24c0 r gfx_v10_0_rlc_funcs -ffffffff82ba2528 r gfx_v10_0_rlc_funcs_sriov -ffffffff82ba2590 r gfx10_cs_data -ffffffff82ba25b0 r gfx10_SECT_CONTEXT_defs -ffffffff82ba2640 r gfx10_SECT_CONTEXT_def_1 -ffffffff82ba29a0 r gfx10_SECT_CONTEXT_def_3 -ffffffff82ba29b0 r gfx10_SECT_CONTEXT_def_4 -ffffffff82ba2c28 r gfx10_SECT_CONTEXT_def_5 -ffffffff82ba2c30 r gfx10_SECT_CONTEXT_def_6 -ffffffff82ba2c40 r gfx10_SECT_CONTEXT_def_2 -ffffffff82ba3080 r gfx10_SECT_CONTEXT_def_7 -ffffffff82ba3190 r gfx10_SECT_CONTEXT_def_8 -ffffffff82ba34c0 r golden_settings_gc_10_1 -ffffffff82ba3880 r golden_settings_gc_10_0_nv10 -ffffffff82ba3880 r golden_settings_gc_10_1_1 -ffffffff82ba3c10 r golden_settings_gc_10_1_2 -ffffffff82ba3c10 r golden_settings_gc_10_1_nv14 -ffffffff82ba4000 r golden_settings_gc_10_1_2_nv12 -ffffffff82ba4000 r golden_settings_gc_10_3 -ffffffff82ba4408 r golden_settings_gc_10_3_sienna_cichlid -ffffffff82ba4410 r golden_settings_gc_10_3_2 -ffffffff82ba4800 r golden_settings_gc_10_3_vangogh -ffffffff82ba4a60 r golden_settings_gc_10_3_3 -ffffffff82ba4c40 r golden_settings_gc_10_3_4 -ffffffff82ba4fa0 r golden_settings_gc_10_3_5 -ffffffff82ba52a0 r golden_settings_gc_10_0_cyan_skillfish -ffffffff82ba55d0 r golden_settings_gc_10_3_6 -ffffffff82ba57e0 r golden_settings_gc_10_3_7 -ffffffff82ba6000 r gfx_v11_0_ip_funcs -ffffffff82ba60a8 R gfx_v11_0_ip_block -ffffffff82ba60c0 r gfx_v11_0_gfx_funcs -ffffffff82ba6120 r gfx_v11_0_kiq_pm4_funcs -ffffffff82ba6160 r gfx_v11_0_ring_funcs_kiq -ffffffff82ba62a0 r gfx_v11_0_ring_funcs_gfx -ffffffff82ba63e0 r gfx_v11_0_ring_funcs_compute -ffffffff82ba6520 r gfx_v11_0_eop_irq_funcs -ffffffff82ba6530 r gfx_v11_0_priv_reg_irq_funcs -ffffffff82ba6540 r gfx_v11_0_priv_inst_irq_funcs -ffffffff82ba6550 r gfx_v11_0_rlc_gc_fed_irq_funcs -ffffffff82ba6560 r gfx_v11_0_rlc_funcs -ffffffff82ba65d0 r gfx11_cs_data -ffffffff82ba65f0 r gfx11_SECT_CONTEXT_defs -ffffffff82ba6670 r gfx11_SECT_CONTEXT_def_1 -ffffffff82ba69d0 r gfx11_SECT_CONTEXT_def_3 -ffffffff82ba69e0 r gfx11_SECT_CONTEXT_def_5 -ffffffff82ba69e8 r gfx11_SECT_CONTEXT_def_6 -ffffffff82ba69f0 r gfx11_SECT_CONTEXT_def_2 -ffffffff82ba6e30 r gfx11_SECT_CONTEXT_def_4 -ffffffff82ba70b0 r gfx11_SECT_CONTEXT_def_7 -ffffffff82ba7520 r golden_settings_gc_11_0_1 -ffffffff82ba7600 r golden_settings_gc_11_0 -ffffffff82ba8000 r gfx_v8_0_ip_funcs -ffffffff82ba80a8 R gfx_v8_0_ip_block -ffffffff82ba80c0 R gfx_v8_1_ip_block -ffffffff82ba80d8 r gfx_v8_0_gfx_funcs -ffffffff82ba8138 r gfx_v8_0_ring_funcs_kiq -ffffffff82ba8278 r gfx_v8_0_ring_funcs_gfx -ffffffff82ba83b8 r gfx_v8_0_ring_funcs_compute -ffffffff82ba8500 r amdgpu_gds_reg_offset -ffffffff82ba8600 r gfx_v8_0_eop_irq_funcs -ffffffff82ba8610 r gfx_v8_0_priv_reg_irq_funcs -ffffffff82ba8620 r gfx_v8_0_priv_inst_irq_funcs -ffffffff82ba8630 r gfx_v8_0_cp_ecc_error_irq_funcs -ffffffff82ba8640 r gfx_v8_0_sq_irq_funcs -ffffffff82ba8650 r sq_edc_source_names -ffffffff82ba8688 r iceland_rlc_funcs -ffffffff82ba86f0 r vi_cs_data -ffffffff82ba8710 r vi_SECT_CONTEXT_defs -ffffffff82ba8790 r vi_SECT_CONTEXT_def_1 -ffffffff82ba8ae0 r vi_SECT_CONTEXT_def_3 -ffffffff82ba8b00 r vi_SECT_CONTEXT_def_4 -ffffffff82ba8d74 r vi_SECT_CONTEXT_def_5 -ffffffff82ba8d7c r vi_SECT_CONTEXT_def_6 -ffffffff82ba8d80 r vi_SECT_CONTEXT_def_2 -ffffffff82ba91d0 r vi_SECT_CONTEXT_def_7 -ffffffff82ba9580 r vgpr_init_compute_shader -ffffffff82ba9690 r vgpr_init_regs -ffffffff82ba9720 r sgpr1_init_regs -ffffffff82ba97b0 r sgpr2_init_regs -ffffffff82ba9840 r sec_ded_counter_registers -ffffffff82ba98b0 r iceland_mgcg_cgcg_init -ffffffff82ba9bb0 r golden_settings_iceland_a11 -ffffffff82ba9c70 r iceland_golden_common_all -ffffffff82ba9cd0 r fiji_mgcg_cgcg_init -ffffffff82ba9e80 r golden_settings_fiji_a10 -ffffffff82ba9f10 r fiji_golden_common_all -ffffffff82ba9f90 r tonga_mgcg_cgcg_init -ffffffff82baa320 r golden_settings_tonga_a11 -ffffffff82baa3e0 r tonga_golden_common_all -ffffffff82baa440 r golden_settings_vegam_a11 -ffffffff82baa510 r vegam_golden_common_all -ffffffff82baa560 r golden_settings_polaris11_a11 -ffffffff82baa630 r polaris11_golden_common_all -ffffffff82baa680 r golden_settings_polaris10_a11 -ffffffff82baa750 r polaris10_golden_common_all -ffffffff82baa7b0 r cz_mgcg_cgcg_init -ffffffff82baab40 r cz_golden_settings_a11 -ffffffff82baabd0 r cz_golden_common_all -ffffffff82baac30 r stoney_mgcg_cgcg_init -ffffffff82baac70 r stoney_golden_settings_a11 -ffffffff82baacf0 r stoney_golden_common_all -ffffffff82bab000 R gfx_v9_0_ras_ops -ffffffff82bab040 r gfx_v9_0_ip_funcs -ffffffff82bab0e8 R gfx_v9_0_ip_block -ffffffff82bab100 r ras_gfx_subblocks -ffffffff82babb80 r gfx_v9_0_edc_counter_regs -ffffffff82babf20 r gfx_v9_0_ras_fields -ffffffff82bad000 r gfx_v9_0_gfx_funcs -ffffffff82bad060 r gfx_v9_0_kiq_pm4_funcs -ffffffff82bad0a0 r gfx_v9_0_ring_funcs_kiq -ffffffff82bad1e0 r gfx_v9_0_ring_funcs_gfx -ffffffff82bad320 r gfx_v9_0_sw_ring_funcs_gfx -ffffffff82bad460 r gfx_v9_0_ring_funcs_compute -ffffffff82bad5a0 r gfx_v9_0_eop_irq_funcs -ffffffff82bad5b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82bad5c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82bad5d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82bad5e0 r gfx_v9_0_rlc_funcs -ffffffff82bad650 r gfx9_cs_data -ffffffff82bad670 r gfx9_SECT_CONTEXT_defs -ffffffff82bad700 r gfx9_SECT_CONTEXT_def_1 -ffffffff82bada50 r gfx9_SECT_CONTEXT_def_3 -ffffffff82bada60 r gfx9_SECT_CONTEXT_def_4 -ffffffff82badcd4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82badcdc r gfx9_SECT_CONTEXT_def_6 -ffffffff82badce0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82baddf0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82bae260 r gfx9_SECT_CONTEXT_def_8 -ffffffff82bae4d0 r vgpr_init_compute_shader_arcturus -ffffffff82baed60 r vgpr_init_regs_arcturus -ffffffff82baeef0 r vgpr_init_regs -ffffffff82baf080 r sgpr1_init_regs -ffffffff82baf210 r sgpr2_init_regs -ffffffff82baf3a0 r golden_settings_gc_9_0 -ffffffff82baf580 r golden_settings_gc_9_0_vg10 -ffffffff82baf730 r golden_settings_gc_9_2_1 -ffffffff82baf8b0 r golden_settings_gc_9_2_1_vg12 -ffffffff82baf9f0 r golden_settings_gc_9_0_vg20 -ffffffff82bafb00 r golden_settings_gc_9_4_1_arct -ffffffff82bafc10 r golden_settings_gc_9_1 -ffffffff82bafe50 r golden_settings_gc_9_1_rv2 -ffffffff82bb0020 r golden_settings_gc_9_1_rv1 -ffffffff82bb00d0 r golden_settings_gc_9_1_rn -ffffffff82bb01f0 r golden_settings_gc_9_x_common -ffffffff82bb1000 R gfx_v9_4_ras_ops -ffffffff82bb1040 r gfx_v9_4_edc_counter_regs -ffffffff82bb1420 r gfx_v9_4_ras_fields -ffffffff82bb3000 R vgpr_init_regs_aldebaran -ffffffff82bb31b0 R sgpr112_init_regs_aldebaran -ffffffff82bb3360 R sgpr96_init_regs_aldebaran -ffffffff82bb3510 R sgpr64_init_regs_aldebaran -ffffffff82bb36c0 r golden_settings_gc_9_4_2_alde -ffffffff82bb3720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82bb37b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82bb3840 r sgpr112_init_compute_shader_aldebaran -ffffffff82bb3a60 r sgpr96_init_compute_shader_aldebaran -ffffffff82bb3c50 r sgpr64_init_compute_shader_aldebaran -ffffffff82bb3dc0 r vgpr_init_compute_shader_aldebaran -ffffffff82bb46a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82bb4a20 r gfx_v9_4_2_ras_fields -ffffffff82bb63c0 r gfx_v9_4_2_utc_blocks -ffffffff82bb7000 r gfx_v9_4_3_ip_funcs -ffffffff82bb70a8 R gfx_v9_4_3_ip_block -ffffffff82bb70c0 r gfx_v9_4_3_kiq_pm4_funcs -ffffffff82bb7100 r gfx_v9_4_3_ring_funcs_kiq -ffffffff82bb7240 r gfx_v9_4_3_ring_funcs_compute -ffffffff82bb7380 r gfx_v9_4_3_eop_irq_funcs -ffffffff82bb7390 r gfx_v9_4_3_priv_reg_irq_funcs -ffffffff82bb73a0 r gfx_v9_4_3_priv_inst_irq_funcs -ffffffff82bb73b0 r gfx_v9_4_3_rlc_funcs -ffffffff82bb7418 r gfx_v9_4_3_gfx_funcs -ffffffff82bb7480 r gfx_v9_4_3_ce_reg_list -ffffffff82bb7810 r gfx_v9_4_3_ras_mem_list_array -ffffffff82bb7970 r gfx_v9_4_3_ue_reg_list -ffffffff82bb7d30 r gfx_v9_4_3_ras_cp_mem_list -ffffffff82bb7d80 r gfx_v9_4_3_ras_gcea_mem_list -ffffffff82bb7ec0 r gfx_v9_4_3_ras_gc_cane_mem_list -ffffffff82bb7ed0 r gfx_v9_4_3_ras_gcutcl2_mem_list -ffffffff82bb7ee0 r gfx_v9_4_3_ras_gds_mem_list -ffffffff82bb7ef0 r gfx_v9_4_3_ras_lds_mem_list -ffffffff82bb8110 r gfx_v9_4_3_ras_rlc_mem_list -ffffffff82bb8190 r gfx_v9_4_3_ras_sp_mem_list -ffffffff82bb81a0 r gfx_v9_4_3_ras_spi_mem_list -ffffffff82bb81e0 r gfx_v9_4_3_ras_sqc_mem_list -ffffffff82bb8350 r gfx_v9_4_3_ras_sq_mem_list -ffffffff82bb8390 r gfx_v9_4_3_ras_ta_mem_list -ffffffff82bb83e0 r gfx_v9_4_3_ras_tcc_mem_list -ffffffff82bb83f0 r gfx_v9_4_3_ras_tca_mem_list -ffffffff82bb8400 r gfx_v9_4_3_ras_tci_mem_list -ffffffff82bb8410 r gfx_v9_4_3_ras_tcp_mem_list -ffffffff82bb85a0 r gfx_v9_4_3_ras_td_mem_list -ffffffff82bb85d0 r gfx_v9_4_3_ras_tcx_mem_list -ffffffff82bb8b50 r gfx_v9_4_3_ras_atc_l2_mem_list -ffffffff82bb8b60 r gfx_v9_4_3_ras_utcl2_mem_list -ffffffff82bb8b70 r gfx_v9_4_3_ras_vml2_mem_list -ffffffff82bb8b80 r gfx_v9_4_3_ras_vml2_walker_mem_list -ffffffff82bb9000 R gfxhub_v1_0_funcs -ffffffff82bba000 R gfxhub_v1_2_funcs -ffffffff82bbb000 R gfxhub_v2_0_funcs -ffffffff82bbb060 r gfxhub_v2_0_vmhub_funcs +ffffffff82b8c510 r cz_mgcg_cgcg_init +ffffffff82b8c530 r cz_golden_settings_a11 +ffffffff82b8c550 r stoney_golden_settings_a11 +ffffffff82b8c570 r polaris11_golden_settings_a11 +ffffffff82b8c5b0 r polaris10_golden_settings_a11 +ffffffff82b8d000 R df_v1_7_funcs +ffffffff82b8d070 r df_v1_7_channel_number +ffffffff82b8e000 R df_v3_6_funcs +ffffffff82b8e070 r df_v3_6_channel_number +ffffffff82b8f000 R df_v4_3_funcs +ffffffff82b90000 r GC_BASE +ffffffff82b900a8 r HDP_BASE +ffffffff82b90150 r MMHUB_BASE +ffffffff82b901f8 r ATHUB_BASE +ffffffff82b902a0 r NBIO_BASE +ffffffff82b90348 r MP0_BASE +ffffffff82b903f0 r MP1_BASE +ffffffff82b90498 r VCN0_BASE +ffffffff82b90540 r DF_BASE +ffffffff82b905e8 r DCN_BASE +ffffffff82b90690 r OSSSYS_BASE +ffffffff82b90738 r SMUIO_BASE +ffffffff82b907e0 r THM_BASE +ffffffff82b91000 r gfx_v10_0_ip_funcs +ffffffff82b910a8 R gfx_v10_0_ip_block +ffffffff82b910c0 r gfx_v10_0_gfx_funcs +ffffffff82b91120 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82b973c0 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82b9ade0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82ba1080 r gfx_v10_0_kiq_pm4_funcs +ffffffff82ba10c0 r gfx_v10_0_ring_funcs_kiq +ffffffff82ba1200 r gfx_v10_0_ring_funcs_gfx +ffffffff82ba1340 r gfx_v10_0_ring_funcs_compute +ffffffff82ba1480 r gfx_v10_0_eop_irq_funcs +ffffffff82ba1490 r gfx_v10_0_kiq_irq_funcs +ffffffff82ba14a0 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82ba14b0 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82ba14c0 r gfx_v10_0_rlc_funcs +ffffffff82ba1528 r gfx_v10_0_rlc_funcs_sriov +ffffffff82ba1590 r gfx10_cs_data +ffffffff82ba15b0 r gfx10_SECT_CONTEXT_defs +ffffffff82ba1640 r gfx10_SECT_CONTEXT_def_1 +ffffffff82ba19a0 r gfx10_SECT_CONTEXT_def_3 +ffffffff82ba19b0 r gfx10_SECT_CONTEXT_def_4 +ffffffff82ba1c28 r gfx10_SECT_CONTEXT_def_5 +ffffffff82ba1c30 r gfx10_SECT_CONTEXT_def_6 +ffffffff82ba1c40 r gfx10_SECT_CONTEXT_def_2 +ffffffff82ba2080 r gfx10_SECT_CONTEXT_def_7 +ffffffff82ba2190 r gfx10_SECT_CONTEXT_def_8 +ffffffff82ba24c0 r golden_settings_gc_10_1 +ffffffff82ba2880 r golden_settings_gc_10_0_nv10 +ffffffff82ba2880 r golden_settings_gc_10_1_1 +ffffffff82ba2c10 r golden_settings_gc_10_1_2 +ffffffff82ba2c10 r golden_settings_gc_10_1_nv14 +ffffffff82ba3000 r golden_settings_gc_10_1_2_nv12 +ffffffff82ba3000 r golden_settings_gc_10_3 +ffffffff82ba3408 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82ba3410 r golden_settings_gc_10_3_2 +ffffffff82ba3800 r golden_settings_gc_10_3_vangogh +ffffffff82ba3a60 r golden_settings_gc_10_3_3 +ffffffff82ba3c40 r golden_settings_gc_10_3_4 +ffffffff82ba3fa0 r golden_settings_gc_10_3_5 +ffffffff82ba42a0 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82ba45d0 r golden_settings_gc_10_3_6 +ffffffff82ba47e0 r golden_settings_gc_10_3_7 +ffffffff82ba5000 r gfx_v11_0_ip_funcs +ffffffff82ba50a8 R gfx_v11_0_ip_block +ffffffff82ba50c0 r gfx_v11_0_gfx_funcs +ffffffff82ba5120 r gfx_v11_0_kiq_pm4_funcs +ffffffff82ba5160 r gfx_v11_0_ring_funcs_kiq +ffffffff82ba52a0 r gfx_v11_0_ring_funcs_gfx +ffffffff82ba53e0 r gfx_v11_0_ring_funcs_compute +ffffffff82ba5520 r gfx_v11_0_eop_irq_funcs +ffffffff82ba5530 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82ba5540 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82ba5550 r gfx_v11_0_rlc_gc_fed_irq_funcs +ffffffff82ba5560 r gfx_v11_0_rlc_funcs +ffffffff82ba55d0 r gfx11_cs_data +ffffffff82ba55f0 r gfx11_SECT_CONTEXT_defs +ffffffff82ba5670 r gfx11_SECT_CONTEXT_def_1 +ffffffff82ba59d0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82ba59e0 r gfx11_SECT_CONTEXT_def_5 +ffffffff82ba59e8 r gfx11_SECT_CONTEXT_def_6 +ffffffff82ba59f0 r gfx11_SECT_CONTEXT_def_2 +ffffffff82ba5e30 r gfx11_SECT_CONTEXT_def_4 +ffffffff82ba60b0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82ba6520 r golden_settings_gc_11_0_1 +ffffffff82ba6600 r golden_settings_gc_11_0 +ffffffff82ba7000 r gfx_v8_0_ip_funcs +ffffffff82ba70a8 R gfx_v8_0_ip_block +ffffffff82ba70c0 R gfx_v8_1_ip_block +ffffffff82ba70d8 r gfx_v8_0_gfx_funcs +ffffffff82ba7138 r gfx_v8_0_ring_funcs_kiq +ffffffff82ba7278 r gfx_v8_0_ring_funcs_gfx +ffffffff82ba73b8 r gfx_v8_0_ring_funcs_compute +ffffffff82ba7500 r amdgpu_gds_reg_offset +ffffffff82ba7600 r gfx_v8_0_eop_irq_funcs +ffffffff82ba7610 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82ba7620 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82ba7630 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82ba7640 r gfx_v8_0_sq_irq_funcs +ffffffff82ba7650 r sq_edc_source_names +ffffffff82ba7688 r iceland_rlc_funcs +ffffffff82ba76f0 r vi_cs_data +ffffffff82ba7710 r vi_SECT_CONTEXT_defs +ffffffff82ba7790 r vi_SECT_CONTEXT_def_1 +ffffffff82ba7ae0 r vi_SECT_CONTEXT_def_3 +ffffffff82ba7b00 r vi_SECT_CONTEXT_def_4 +ffffffff82ba7d74 r vi_SECT_CONTEXT_def_5 +ffffffff82ba7d7c r vi_SECT_CONTEXT_def_6 +ffffffff82ba7d80 r vi_SECT_CONTEXT_def_2 +ffffffff82ba81d0 r vi_SECT_CONTEXT_def_7 +ffffffff82ba8580 r vgpr_init_compute_shader +ffffffff82ba8690 r vgpr_init_regs +ffffffff82ba8720 r sgpr1_init_regs +ffffffff82ba87b0 r sgpr2_init_regs +ffffffff82ba8840 r sec_ded_counter_registers +ffffffff82ba88b0 r iceland_mgcg_cgcg_init +ffffffff82ba8bb0 r golden_settings_iceland_a11 +ffffffff82ba8c70 r iceland_golden_common_all +ffffffff82ba8cd0 r fiji_mgcg_cgcg_init +ffffffff82ba8e80 r golden_settings_fiji_a10 +ffffffff82ba8f10 r fiji_golden_common_all +ffffffff82ba8f90 r tonga_mgcg_cgcg_init +ffffffff82ba9320 r golden_settings_tonga_a11 +ffffffff82ba93e0 r tonga_golden_common_all +ffffffff82ba9440 r golden_settings_vegam_a11 +ffffffff82ba9510 r vegam_golden_common_all +ffffffff82ba9560 r golden_settings_polaris11_a11 +ffffffff82ba9630 r polaris11_golden_common_all +ffffffff82ba9680 r golden_settings_polaris10_a11 +ffffffff82ba9750 r polaris10_golden_common_all +ffffffff82ba97b0 r cz_mgcg_cgcg_init +ffffffff82ba9b40 r cz_golden_settings_a11 +ffffffff82ba9bd0 r cz_golden_common_all +ffffffff82ba9c30 r stoney_mgcg_cgcg_init +ffffffff82ba9c70 r stoney_golden_settings_a11 +ffffffff82ba9cf0 r stoney_golden_common_all +ffffffff82baa000 R gfx_v9_0_ras_ops +ffffffff82baa040 r gfx_v9_0_ip_funcs +ffffffff82baa0e8 R gfx_v9_0_ip_block +ffffffff82baa100 r ras_gfx_subblocks +ffffffff82baab80 r gfx_v9_0_edc_counter_regs +ffffffff82baaf20 r gfx_v9_0_ras_fields +ffffffff82bac000 r gfx_v9_0_gfx_funcs +ffffffff82bac060 r gfx_v9_0_kiq_pm4_funcs +ffffffff82bac0a0 r gfx_v9_0_ring_funcs_kiq +ffffffff82bac1e0 r gfx_v9_0_ring_funcs_gfx +ffffffff82bac320 r gfx_v9_0_sw_ring_funcs_gfx +ffffffff82bac460 r gfx_v9_0_ring_funcs_compute +ffffffff82bac5a0 r gfx_v9_0_eop_irq_funcs +ffffffff82bac5b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82bac5c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82bac5d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82bac5e0 r gfx_v9_0_rlc_funcs +ffffffff82bac650 r gfx9_cs_data +ffffffff82bac670 r gfx9_SECT_CONTEXT_defs +ffffffff82bac700 r gfx9_SECT_CONTEXT_def_1 +ffffffff82baca50 r gfx9_SECT_CONTEXT_def_3 +ffffffff82baca60 r gfx9_SECT_CONTEXT_def_4 +ffffffff82baccd4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82baccdc r gfx9_SECT_CONTEXT_def_6 +ffffffff82bacce0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82bacdf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82bad260 r gfx9_SECT_CONTEXT_def_8 +ffffffff82bad4d0 r vgpr_init_compute_shader_arcturus +ffffffff82badd60 r vgpr_init_regs_arcturus +ffffffff82badef0 r vgpr_init_regs +ffffffff82bae080 r sgpr1_init_regs +ffffffff82bae210 r sgpr2_init_regs +ffffffff82bae3a0 r golden_settings_gc_9_0 +ffffffff82bae580 r golden_settings_gc_9_0_vg10 +ffffffff82bae730 r golden_settings_gc_9_2_1 +ffffffff82bae8b0 r golden_settings_gc_9_2_1_vg12 +ffffffff82bae9f0 r golden_settings_gc_9_0_vg20 +ffffffff82baeb00 r golden_settings_gc_9_4_1_arct +ffffffff82baec10 r golden_settings_gc_9_1 +ffffffff82baee50 r golden_settings_gc_9_1_rv2 +ffffffff82baf020 r golden_settings_gc_9_1_rv1 +ffffffff82baf0d0 r golden_settings_gc_9_1_rn +ffffffff82baf1f0 r golden_settings_gc_9_x_common +ffffffff82bb0000 R gfx_v9_4_ras_ops +ffffffff82bb0040 r gfx_v9_4_edc_counter_regs +ffffffff82bb0420 r gfx_v9_4_ras_fields +ffffffff82bb2000 R vgpr_init_regs_aldebaran +ffffffff82bb21b0 R sgpr112_init_regs_aldebaran +ffffffff82bb2360 R sgpr96_init_regs_aldebaran +ffffffff82bb2510 R sgpr64_init_regs_aldebaran +ffffffff82bb26c0 r golden_settings_gc_9_4_2_alde +ffffffff82bb2720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82bb27b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82bb2840 r sgpr112_init_compute_shader_aldebaran +ffffffff82bb2a60 r sgpr96_init_compute_shader_aldebaran +ffffffff82bb2c50 r sgpr64_init_compute_shader_aldebaran +ffffffff82bb2dc0 r vgpr_init_compute_shader_aldebaran +ffffffff82bb36a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82bb3a20 r gfx_v9_4_2_ras_fields +ffffffff82bb53c0 r gfx_v9_4_2_utc_blocks +ffffffff82bb6000 r gfx_v9_4_3_ip_funcs +ffffffff82bb60a8 R gfx_v9_4_3_ip_block +ffffffff82bb60c0 r gfx_v9_4_3_kiq_pm4_funcs +ffffffff82bb6100 r gfx_v9_4_3_ring_funcs_kiq +ffffffff82bb6240 r gfx_v9_4_3_ring_funcs_compute +ffffffff82bb6380 r gfx_v9_4_3_eop_irq_funcs +ffffffff82bb6390 r gfx_v9_4_3_priv_reg_irq_funcs +ffffffff82bb63a0 r gfx_v9_4_3_priv_inst_irq_funcs +ffffffff82bb63b0 r gfx_v9_4_3_rlc_funcs +ffffffff82bb6418 r gfx_v9_4_3_gfx_funcs +ffffffff82bb6480 r gfx_v9_4_3_ce_reg_list +ffffffff82bb6810 r gfx_v9_4_3_ras_mem_list_array +ffffffff82bb6970 r gfx_v9_4_3_ue_reg_list +ffffffff82bb6d30 r gfx_v9_4_3_ras_cp_mem_list +ffffffff82bb6d80 r gfx_v9_4_3_ras_gcea_mem_list +ffffffff82bb6ec0 r gfx_v9_4_3_ras_gc_cane_mem_list +ffffffff82bb6ed0 r gfx_v9_4_3_ras_gcutcl2_mem_list +ffffffff82bb6ee0 r gfx_v9_4_3_ras_gds_mem_list +ffffffff82bb6ef0 r gfx_v9_4_3_ras_lds_mem_list +ffffffff82bb7110 r gfx_v9_4_3_ras_rlc_mem_list +ffffffff82bb7190 r gfx_v9_4_3_ras_sp_mem_list +ffffffff82bb71a0 r gfx_v9_4_3_ras_spi_mem_list +ffffffff82bb71e0 r gfx_v9_4_3_ras_sqc_mem_list +ffffffff82bb7350 r gfx_v9_4_3_ras_sq_mem_list +ffffffff82bb7390 r gfx_v9_4_3_ras_ta_mem_list +ffffffff82bb73e0 r gfx_v9_4_3_ras_tcc_mem_list +ffffffff82bb73f0 r gfx_v9_4_3_ras_tca_mem_list +ffffffff82bb7400 r gfx_v9_4_3_ras_tci_mem_list +ffffffff82bb7410 r gfx_v9_4_3_ras_tcp_mem_list +ffffffff82bb75a0 r gfx_v9_4_3_ras_td_mem_list +ffffffff82bb75d0 r gfx_v9_4_3_ras_tcx_mem_list +ffffffff82bb7b50 r gfx_v9_4_3_ras_atc_l2_mem_list +ffffffff82bb7b60 r gfx_v9_4_3_ras_utcl2_mem_list +ffffffff82bb7b70 r gfx_v9_4_3_ras_vml2_mem_list +ffffffff82bb7b80 r gfx_v9_4_3_ras_vml2_walker_mem_list +ffffffff82bb8000 R gfxhub_v1_0_funcs +ffffffff82bb9000 R gfxhub_v1_2_funcs +ffffffff82bba000 R gfxhub_v2_0_funcs +ffffffff82bba060 r gfxhub_v2_0_vmhub_funcs +ffffffff82bba070 r gfxhub_client_ids +ffffffff82bbb000 R gfxhub_v2_1_funcs +ffffffff82bbb060 r gfxhub_v2_1_vmhub_funcs ffffffff82bbb070 r gfxhub_client_ids -ffffffff82bbc000 R gfxhub_v2_1_funcs -ffffffff82bbc060 r gfxhub_v2_1_vmhub_funcs +ffffffff82bbc000 R gfxhub_v3_0_funcs +ffffffff82bbc060 r gfxhub_v3_0_vmhub_funcs ffffffff82bbc070 r gfxhub_client_ids -ffffffff82bbd000 R gfxhub_v3_0_funcs -ffffffff82bbd060 r gfxhub_v3_0_vmhub_funcs +ffffffff82bbd000 R gfxhub_v3_0_3_funcs +ffffffff82bbd060 r gfxhub_v3_0_3_vmhub_funcs ffffffff82bbd070 r gfxhub_client_ids -ffffffff82bbe000 R gfxhub_v3_0_3_funcs -ffffffff82bbe060 r gfxhub_v3_0_3_vmhub_funcs -ffffffff82bbe070 r gfxhub_client_ids -ffffffff82bbf000 R gmc_v10_0_ip_funcs -ffffffff82bbf0a8 R gmc_v10_0_ip_block -ffffffff82bbf0c0 r gmc_v10_0_gmc_funcs -ffffffff82bbf118 r gmc_v10_0_irq_funcs -ffffffff82bbf128 r gmc_v10_0_ecc_funcs -ffffffff82bc0000 R gmc_v11_0_ip_funcs -ffffffff82bc00a8 R gmc_v11_0_ip_block -ffffffff82bc00c0 r gmc_v11_0_gmc_funcs -ffffffff82bc0118 r gmc_v11_0_irq_funcs -ffffffff82bc0128 r gmc_v11_0_ecc_funcs -ffffffff82bc1000 r gmc_v7_0_ip_funcs -ffffffff82bc10a8 R gmc_v7_0_ip_block -ffffffff82bc10c0 R gmc_v7_4_ip_block -ffffffff82bc10d8 r gmc_v7_0_gmc_funcs -ffffffff82bc1130 r gmc_v7_0_irq_funcs -ffffffff82bc1140 r iceland_mgcg_cgcg_init -ffffffff82bc1150 r golden_settings_iceland_a11 -ffffffff82bc1180 r mc_cg_registers -ffffffff82bc11b0 r mc_cg_en -ffffffff82bc11e0 r mc_cg_ls_en -ffffffff82bc2000 r gmc_v8_0_ip_funcs -ffffffff82bc20a8 R gmc_v8_0_ip_block -ffffffff82bc20c0 R gmc_v8_1_ip_block -ffffffff82bc20d8 R gmc_v8_5_ip_block -ffffffff82bc20f0 r gmc_v8_0_gmc_funcs -ffffffff82bc2148 r gmc_v8_0_irq_funcs -ffffffff82bc2158 r fiji_mgcg_cgcg_init -ffffffff82bc2170 r golden_settings_fiji_a10 -ffffffff82bc21a0 r tonga_mgcg_cgcg_init -ffffffff82bc21b0 r golden_settings_tonga_a11 -ffffffff82bc2210 r golden_settings_polaris11_a11 -ffffffff82bc2240 r golden_settings_polaris10_a11 -ffffffff82bc227c r cz_mgcg_cgcg_init -ffffffff82bc2290 r stoney_mgcg_cgcg_init -ffffffff82bc22b0 r golden_settings_stoney_common -ffffffff82bc3000 R gmc_v9_0_ip_funcs -ffffffff82bc30a8 R gmc_v9_0_ip_block -ffffffff82bc30c0 r gmc_v9_0_gmc_funcs -ffffffff82bc3118 r gmc_v9_0_irq_funcs -ffffffff82bc3128 r gmc_v9_0_ecc_funcs -ffffffff82bc3140 r gfxhub_client_ids -ffffffff82bc31b0 r mmhub_client_ids_vega10 -ffffffff82bc34a0 r mmhub_client_ids_vega12 -ffffffff82bc37a0 r mmhub_client_ids_vega20 -ffffffff82bc3a90 r mmhub_client_ids_arcturus -ffffffff82bc52a0 r mmhub_client_ids_raven -ffffffff82bc5460 r mmhub_client_ids_renoir -ffffffff82bc5650 r mmhub_client_ids_aldebaran -ffffffff82bc6e60 r ecc_umc_mcumc_ctrl_addrs -ffffffff82bc6ee0 r ecc_umc_mcumc_ctrl_mask_addrs -ffffffff82bc6f60 r golden_settings_mmhub_1_0_0 -ffffffff82bc6f90 r golden_settings_athub_1_0_0 -ffffffff82bc7000 R hdp_v4_0_funcs -ffffffff82bc8000 R hdp_v5_0_funcs -ffffffff82bc9000 R hdp_v5_2_funcs -ffffffff82bca000 R hdp_v6_0_funcs -ffffffff82bcb000 r iceland_ih_ip_funcs -ffffffff82bcb0a8 R iceland_ih_ip_block -ffffffff82bcb0c0 r iceland_ih_funcs -ffffffff82bcc000 r ih_v6_0_ip_funcs -ffffffff82bcc0a8 R ih_v6_0_ip_block -ffffffff82bcc0c0 r ih_v6_0_funcs -ffffffff82bcc0e0 r ih_v6_0_self_irq_funcs -ffffffff82bcd000 r ih_v6_1_ip_funcs -ffffffff82bcd0a8 R ih_v6_1_ip_block -ffffffff82bcd0c0 r ih_v6_1_funcs -ffffffff82bcd0e0 r ih_v6_1_self_irq_funcs -ffffffff82bce000 R gfx_v11_0_imu_funcs -ffffffff82bce030 r imu_rlc_ram_golden_11 -ffffffff82bce680 r imu_rlc_ram_golden_11_0_2 -ffffffff82bcf000 r imu_rlc_ram_golden_11_0_3 -ffffffff82bd0000 r jpeg_v1_0_decode_ring_vm_funcs -ffffffff82bd0140 r jpeg_v1_0_irq_funcs -ffffffff82bd1000 r jpeg_v2_0_ip_funcs -ffffffff82bd10a8 R jpeg_v2_0_ip_block -ffffffff82bd10c0 r jpeg_v2_0_dec_ring_vm_funcs -ffffffff82bd1200 r jpeg_v2_0_irq_funcs -ffffffff82bd2000 r jpeg_v2_5_ip_funcs -ffffffff82bd20a8 R jpeg_v2_5_ip_block -ffffffff82bd20c0 r jpeg_v2_6_ip_funcs -ffffffff82bd2168 R jpeg_v2_6_ip_block -ffffffff82bd2180 R jpeg_v2_6_ras_hw_ops -ffffffff82bd21c0 r jpeg_v2_5_dec_ring_vm_funcs -ffffffff82bd2300 r jpeg_v2_6_dec_ring_vm_funcs -ffffffff82bd2440 r jpeg_v2_5_irq_funcs -ffffffff82bd2450 r jpeg_v2_6_ras_irq_funcs -ffffffff82bd3000 r jpeg_v3_0_ip_funcs -ffffffff82bd30a8 R jpeg_v3_0_ip_block -ffffffff82bd30c0 r jpeg_v3_0_dec_ring_vm_funcs -ffffffff82bd3200 r jpeg_v3_0_irq_funcs -ffffffff82bd4000 r jpeg_v4_0_ip_funcs -ffffffff82bd40a8 R jpeg_v4_0_ip_block -ffffffff82bd40c0 R jpeg_v4_0_ras_hw_ops -ffffffff82bd4100 r jpeg_v4_0_dec_ring_vm_funcs -ffffffff82bd4240 r jpeg_v4_0_irq_funcs -ffffffff82bd4250 r jpeg_v4_0_ras_irq_funcs -ffffffff82bd5000 r jpeg_v4_0_3_ip_funcs -ffffffff82bd50a8 R jpeg_v4_0_3_ip_block -ffffffff82bd50c0 r jpeg_v4_0_3_dec_ring_vm_funcs -ffffffff82bd5200 r jpeg_v4_0_3_irq_funcs -ffffffff82bd5210 r jpeg_v4_0_3_ras_hw_ops -ffffffff82bd5250 r jpeg_v4_0_3_ue_reg_list -ffffffff82bd6000 R lsdma_v6_0_funcs -ffffffff82bd7000 r mca_v3_0_mp0_hw_ops -ffffffff82bd7040 r mca_v3_0_mp1_hw_ops -ffffffff82bd7080 r mca_v3_0_mpio_hw_ops -ffffffff82bd8000 r mes_v10_1_ip_funcs -ffffffff82bd80a8 R mes_v10_1_ip_block -ffffffff82bd80c0 r mes_v10_1_funcs -ffffffff82bd80f0 r mes_v10_1_ring_funcs -ffffffff82bd9000 r mes_v11_0_ip_funcs -ffffffff82bd90a8 R mes_v11_0_ip_block -ffffffff82bd90c0 r mes_v11_0_funcs -ffffffff82bd90f0 r mes_v11_0_ring_funcs -ffffffff82bda000 R mmhub_v1_0_funcs -ffffffff82bda050 r mmhub_v1_0_edc_cnt_regs -ffffffff82bda0c0 r mmhub_v1_0_ras_fields -ffffffff82bdb000 R mmhub_v1_7_funcs -ffffffff82bdb050 r mmhub_v1_7_edc_cnt_regs -ffffffff82bdb250 r mmhub_v1_7_ras_fields -ffffffff82bdc9c0 r mmhub_v1_7_ea_err_status_regs -ffffffff82bdd000 R mmhub_v1_8_funcs -ffffffff82bdd050 r mmhub_v1_8_ras_hw_ops -ffffffff82bdd090 r mmhub_v1_8_ce_reg_list -ffffffff82bdd180 r mmhub_v1_8_ras_memory_list -ffffffff82bdd2b0 r mmhub_v1_8_ue_reg_list -ffffffff82bde000 R mmhub_v2_0_funcs -ffffffff82bde050 r mmhub_v2_0_vmhub_funcs -ffffffff82bde060 r mmhub_client_ids_navi1x -ffffffff82bde190 r mmhub_client_ids_sienna_cichlid -ffffffff82bde450 r mmhub_client_ids_beige_goby -ffffffff82bdf000 R mmhub_v2_3_funcs -ffffffff82bdf050 r mmhub_v2_3_vmhub_funcs -ffffffff82bdf060 r mmhub_client_ids_vangogh -ffffffff82be0000 R mmhub_v3_0_funcs -ffffffff82be0050 r mmhub_v3_0_vmhub_funcs -ffffffff82be0060 r mmhub_client_ids_v3_0_0 -ffffffff82be1000 R mmhub_v3_0_1_funcs -ffffffff82be1050 r mmhub_v3_0_1_vmhub_funcs -ffffffff82be1060 r mmhub_client_ids_v3_0_1 -ffffffff82be2000 R mmhub_v3_0_2_funcs -ffffffff82be2050 r mmhub_v3_0_2_vmhub_funcs -ffffffff82be2060 r mmhub_client_ids_v3_0_2 -ffffffff82be3000 R mmhub_v9_4_ras_hw_ops -ffffffff82be3040 R mmhub_v9_4_funcs -ffffffff82be3090 r mmhub_v9_4_edc_cnt_regs -ffffffff82be3330 r mmhub_v9_4_ras_fields -ffffffff82be53b0 r mmhub_v9_4_err_status_regs -ffffffff82be6000 r xgpu_ai_mailbox_ack_irq_funcs -ffffffff82be6010 r xgpu_ai_mailbox_rcv_irq_funcs -ffffffff82be6020 R xgpu_ai_virt_ops -ffffffff82be7000 r xgpu_nv_mailbox_ack_irq_funcs -ffffffff82be7010 r xgpu_nv_mailbox_rcv_irq_funcs -ffffffff82be7020 R xgpu_nv_virt_ops -ffffffff82be8000 r xgpu_fiji_mgcg_cgcg_init -ffffffff82be8240 r xgpu_fiji_golden_settings_a10 -ffffffff82be8370 r xgpu_fiji_golden_common_all -ffffffff82be83f0 r xgpu_tonga_mgcg_cgcg_init -ffffffff82be8810 r xgpu_tonga_golden_settings_a11 -ffffffff82be89d0 r xgpu_tonga_golden_common_all -ffffffff82be8a28 r xgpu_vi_mailbox_ack_irq_funcs -ffffffff82be8a38 r xgpu_vi_mailbox_rcv_irq_funcs -ffffffff82be8a48 R xgpu_vi_virt_ops -ffffffff82be9000 r navi10_ih_ip_funcs -ffffffff82be90a8 R navi10_ih_ip_block -ffffffff82be90c0 r navi10_ih_funcs -ffffffff82be90e0 r navi10_ih_self_irq_funcs -ffffffff82bea000 R nbio_v2_3_hdp_flush_reg -ffffffff82bea048 R nbio_v2_3_funcs -ffffffff82beb000 R nbio_v4_3_hdp_flush_reg -ffffffff82beb048 R nbio_v4_3_funcs -ffffffff82beb158 R nbio_v4_3_sriov_funcs -ffffffff82beb268 r nbio_v4_3_ras_err_event_athub_irq_funcs -ffffffff82bec000 R nbio_v6_1_hdp_flush_reg -ffffffff82bec048 R nbio_v6_1_funcs -ffffffff82bed000 R nbio_v7_0_hdp_flush_reg -ffffffff82bed048 R nbio_v7_0_funcs -ffffffff82bee000 R nbio_v7_2_hdp_flush_reg -ffffffff82bee048 R nbio_v7_2_funcs -ffffffff82bef000 R nbio_v7_4_hdp_flush_reg -ffffffff82bef048 R nbio_v7_4_ras_hw_ops -ffffffff82bef088 R nbio_v7_4_funcs -ffffffff82bef198 r nbio_v7_4_ras_controller_irq_funcs -ffffffff82bef1a8 r nbio_v7_4_ras_err_event_athub_irq_funcs -ffffffff82bf0000 R nbio_v7_7_hdp_flush_reg -ffffffff82bf0048 R nbio_v7_7_funcs -ffffffff82bf1000 R nbio_v7_9_hdp_flush_reg -ffffffff82bf1048 R nbio_v7_9_funcs -ffffffff82bf1158 R nbio_v7_9_ras_hw_ops -ffffffff82bf1198 r nbio_v7_9_ras_controller_irq_funcs -ffffffff82bf11a8 r nbio_v7_9_ras_err_event_athub_irq_funcs -ffffffff82bf2000 r nv_common_ip_funcs -ffffffff82bf20a8 R nv_common_ip_block -ffffffff82bf20c0 r nv_asic_funcs -ffffffff82bf2180 r nv_allowed_read_registers -ffffffff82bf2300 r sc_video_codecs_encode -ffffffff82bf2310 r sc_video_codecs_decode_vcn1 -ffffffff82bf2320 r sc_video_codecs_decode_vcn0 -ffffffff82bf2330 r yc_video_codecs_decode -ffffffff82bf2340 r bg_video_codecs_encode -ffffffff82bf2350 r bg_video_codecs_decode -ffffffff82bf2360 r nv_video_codecs_encode -ffffffff82bf2370 r nv_video_codecs_decode -ffffffff82bf2380 r sc_video_codecs_encode_array -ffffffff82bf23b0 r sc_video_codecs_decode_array_vcn1 -ffffffff82bf2440 r sc_video_codecs_decode_array_vcn0 -ffffffff82bf24e0 r yc_video_codecs_decode_array -ffffffff82bf2550 r bg_video_codecs_decode_array -ffffffff82bf2590 r nv_video_codecs_encode_array -ffffffff82bf25c0 r nv_video_codecs_decode_array -ffffffff82bf3000 r psp_v10_0_funcs -ffffffff82bf4000 r psp_v11_0_funcs -ffffffff82bf5000 r psp_v11_0_8_funcs -ffffffff82bf6000 r psp_v12_0_funcs -ffffffff82bf7000 r psp_v13_0_funcs -ffffffff82bf8000 r psp_v13_0_4_funcs -ffffffff82bf9000 r psp_v3_1_funcs -ffffffff82bfa000 r sdma_v2_4_ip_funcs -ffffffff82bfa0a8 R sdma_v2_4_ip_block -ffffffff82bfa0c0 r sdma_v2_4_ring_funcs -ffffffff82bfa200 r sdma_v2_4_buffer_funcs -ffffffff82bfa220 r sdma_v2_4_vm_pte_funcs -ffffffff82bfa240 r sdma_v2_4_trap_irq_funcs -ffffffff82bfa250 r sdma_v2_4_illegal_inst_irq_funcs -ffffffff82bfa260 r iceland_mgcg_cgcg_init -ffffffff82bfa280 r golden_settings_iceland_a11 -ffffffff82bfb000 r sdma_v3_0_ip_funcs -ffffffff82bfb0a8 R sdma_v3_0_ip_block -ffffffff82bfb0c0 R sdma_v3_1_ip_block -ffffffff82bfb0d8 r sdma_v3_0_ring_funcs -ffffffff82bfb218 r sdma_v3_0_buffer_funcs -ffffffff82bfb238 r sdma_v3_0_vm_pte_funcs -ffffffff82bfb258 r sdma_v3_0_trap_irq_funcs -ffffffff82bfb268 r sdma_v3_0_illegal_inst_irq_funcs -ffffffff82bfb280 r fiji_mgcg_cgcg_init -ffffffff82bfb2a0 r golden_settings_fiji_a10 -ffffffff82bfb300 r tonga_mgcg_cgcg_init -ffffffff82bfb320 r golden_settings_tonga_a11 -ffffffff82bfb3a0 r golden_settings_polaris11_a11 -ffffffff82bfb420 r golden_settings_polaris10_a11 -ffffffff82bfb4a0 r cz_mgcg_cgcg_init -ffffffff82bfb4c0 r cz_golden_settings_a11 -ffffffff82bfb550 r stoney_mgcg_cgcg_init -ffffffff82bfb560 r stoney_golden_settings_a11 -ffffffff82bfc000 R sdma_v4_0_ip_funcs -ffffffff82bfc0a8 R sdma_v4_0_ras_hw_ops -ffffffff82bfc0e8 R sdma_v4_0_ip_block -ffffffff82bfc100 r sdma_v4_0_ring_funcs -ffffffff82bfc240 r sdma_v4_0_page_ring_funcs -ffffffff82bfc380 r sdma_v4_0_buffer_funcs -ffffffff82bfc3a0 r sdma_v4_0_vm_pte_funcs -ffffffff82bfc3c0 r sdma_v4_0_trap_irq_funcs -ffffffff82bfc3d0 r sdma_v4_0_illegal_inst_irq_funcs -ffffffff82bfc3e0 r sdma_v4_0_ecc_irq_funcs -ffffffff82bfc3f0 r sdma_v4_0_vm_hole_irq_funcs -ffffffff82bfc400 r sdma_v4_0_doorbell_invalid_irq_funcs -ffffffff82bfc410 r sdma_v4_0_pool_timeout_irq_funcs -ffffffff82bfc420 r sdma_v4_0_srbm_write_irq_funcs -ffffffff82bfc430 r golden_settings_sdma_4 -ffffffff82bfc690 r golden_settings_sdma_vg10 -ffffffff82bfc740 r golden_settings_sdma_vg12 -ffffffff82bfc7f0 r golden_settings_sdma0_4_2_init -ffffffff82bfc810 r golden_settings_sdma0_4_2 -ffffffff82bfcaa0 r golden_settings_sdma1_4_2 -ffffffff82bfcd30 r golden_settings_sdma_arct -ffffffff82bfd030 r golden_settings_sdma_aldebaran -ffffffff82bfd1a0 r golden_settings_sdma_4_1 -ffffffff82bfd2b0 r golden_settings_sdma_rv2 -ffffffff82bfd2e0 r golden_settings_sdma_rv1 -ffffffff82bfd310 r golden_settings_sdma_4_3 -ffffffff82bfd400 r sdma_v4_0_ras_fields -ffffffff82bfe000 R sdma_v4_4_ras_hw_ops -ffffffff82bfe040 r sdma_v4_4_ras_fields -ffffffff82bff000 R sdma_v4_4_2_ip_funcs -ffffffff82bff0a8 R sdma_v4_4_2_ip_block -ffffffff82bff0c0 r sdma_v4_4_2_ring_funcs -ffffffff82bff200 r sdma_v4_4_2_page_ring_funcs -ffffffff82bff340 r sdma_v4_4_2_buffer_funcs -ffffffff82bff360 r sdma_v4_4_2_vm_pte_funcs -ffffffff82bff380 r sdma_v4_4_2_trap_irq_funcs -ffffffff82bff390 r sdma_v4_4_2_illegal_inst_irq_funcs -ffffffff82bff3a0 r sdma_v4_4_2_ecc_irq_funcs -ffffffff82bff3b0 r sdma_v4_4_2_vm_hole_irq_funcs -ffffffff82bff3c0 r sdma_v4_4_2_doorbell_invalid_irq_funcs -ffffffff82bff3d0 r sdma_v4_4_2_pool_timeout_irq_funcs -ffffffff82bff3e0 r sdma_v4_4_2_srbm_write_irq_funcs -ffffffff82bff3f0 r sdma_v4_4_2_ras_hw_ops -ffffffff82bff430 r sdma_v4_2_2_ue_reg_list -ffffffff82bff460 r sdma_v4_4_2_ras_memory_list -ffffffff82c00000 R sdma_v5_0_ip_funcs -ffffffff82c000a8 R sdma_v5_0_ip_block -ffffffff82c000c0 r sdma_v5_0_ring_funcs -ffffffff82c00200 r sdma_v5_0_buffer_funcs -ffffffff82c00220 r sdma_v5_0_vm_pte_funcs -ffffffff82c00240 r sdma_v5_0_trap_irq_funcs -ffffffff82c00250 r sdma_v5_0_illegal_inst_irq_funcs -ffffffff82c00260 r golden_settings_sdma_5 -ffffffff82c004a0 r golden_settings_sdma_nv10 -ffffffff82c004d0 r golden_settings_sdma_nv14 -ffffffff82c00500 r golden_settings_sdma_5_sriov -ffffffff82c006e0 r golden_settings_sdma_nv12 -ffffffff82c00770 r golden_settings_sdma_cyan_skillfish -ffffffff82c01000 R sdma_v5_2_ip_funcs -ffffffff82c010a8 R sdma_v5_2_ip_block -ffffffff82c010c0 r sdma_v5_2_ring_funcs -ffffffff82c01200 r sdma_v5_2_buffer_funcs -ffffffff82c01220 r sdma_v5_2_vm_pte_funcs -ffffffff82c01240 r sdma_v5_2_trap_irq_funcs -ffffffff82c01250 r sdma_v5_2_illegal_inst_irq_funcs -ffffffff82c02000 R sdma_v6_0_ip_funcs -ffffffff82c020a8 R sdma_v6_0_ip_block -ffffffff82c020c0 r sdma_v6_0_ring_funcs -ffffffff82c02200 r sdma_v6_0_buffer_funcs -ffffffff82c02220 r sdma_v6_0_vm_pte_funcs -ffffffff82c02240 r sdma_v6_0_trap_irq_funcs -ffffffff82c02250 r sdma_v6_0_illegal_inst_irq_funcs -ffffffff82c03000 r smu_v11_0_i2c_algo -ffffffff82c03010 r smu_v11_0_i2c_i2c_lock_ops -ffffffff82c03028 r smu_v11_0_i2c_control_quirks -ffffffff82c04000 R smuio_v11_0_funcs -ffffffff82c05000 R smuio_v11_0_6_funcs -ffffffff82c06000 R smuio_v13_0_funcs -ffffffff82c07000 R smuio_v13_0_3_funcs -ffffffff82c08000 R smuio_v13_0_6_funcs -ffffffff82c09000 R smuio_v9_0_funcs -ffffffff82c0a000 r soc15_common_ip_funcs -ffffffff82c0a0a8 R vega10_common_ip_block -ffffffff82c0a0c0 r soc15_asic_funcs -ffffffff82c0a180 r vega20_asic_funcs -ffffffff82c0a240 r aqua_vanjaram_asic_funcs -ffffffff82c0a300 r soc15_allowed_read_registers -ffffffff82c0a490 r vega_video_codecs_encode -ffffffff82c0a4a0 r vega_video_codecs_decode -ffffffff82c0a4b0 r rv_video_codecs_decode -ffffffff82c0a4c0 r rn_video_codecs_decode -ffffffff82c0a4d0 r vcn_4_0_3_video_codecs_encode -ffffffff82c0a4e0 r vcn_4_0_3_video_codecs_decode -ffffffff82c0a4f0 r vega_video_codecs_encode_array -ffffffff82c0a520 r vega_video_codecs_decode_array -ffffffff82c0a5a0 r rv_video_codecs_decode_array -ffffffff82c0a630 r rn_video_codecs_decode_array -ffffffff82c0a6c0 r vcn_4_0_3_video_codecs_decode_array -ffffffff82c0b000 r soc21_common_ip_funcs -ffffffff82c0b0a8 R soc21_common_ip_block -ffffffff82c0b0c0 r soc21_asic_funcs -ffffffff82c0b180 r soc21_allowed_read_registers -ffffffff82c0b300 r vcn_4_0_0_video_codecs_encode_vcn1 -ffffffff82c0b310 r vcn_4_0_0_video_codecs_decode_vcn1 -ffffffff82c0b320 r vcn_4_0_0_video_codecs_encode_vcn0 -ffffffff82c0b330 r vcn_4_0_0_video_codecs_decode_vcn0 -ffffffff82c0b340 r vcn_4_0_0_video_codecs_encode_array_vcn1 -ffffffff82c0b370 r vcn_4_0_0_video_codecs_decode_array_vcn1 -ffffffff82c0b3c0 r vcn_4_0_0_video_codecs_encode_array_vcn0 -ffffffff82c0b400 r vcn_4_0_0_video_codecs_decode_array_vcn0 -ffffffff82c0c000 r tonga_ih_ip_funcs -ffffffff82c0c0a8 R tonga_ih_ip_block -ffffffff82c0c0c0 r tonga_ih_funcs -ffffffff82c0d000 R umc_v6_0_funcs -ffffffff82c0e000 R umc_v6_1_channel_idx_tbl -ffffffff82c0e080 R umc_v6_1_ras_hw_ops -ffffffff82c0f000 R umc_v6_7_channel_idx_tbl_second -ffffffff82c0f080 R umc_v6_7_channel_idx_tbl_first -ffffffff82c0f100 R umc_v6_7_ras_hw_ops -ffffffff82c10000 R umc_v8_10_channelnum_map_colbit_table -ffffffff82c10040 R umc_v8_10_channel_idx_tbl_ext0 -ffffffff82c10080 R umc_v8_10_channel_idx_tbl -ffffffff82c100e0 R umc_v8_10_ras_hw_ops -ffffffff82c11000 R umc_v8_7_channel_idx_tbl -ffffffff82c11040 R umc_v8_7_ras_hw_ops -ffffffff82c12000 r uvd_v5_0_ip_funcs -ffffffff82c120a8 R uvd_v5_0_ip_block -ffffffff82c120c0 r uvd_v5_0_ring_funcs -ffffffff82c12200 r uvd_v5_0_irq_funcs -ffffffff82c13000 r uvd_v6_0_ip_funcs -ffffffff82c130a8 R uvd_v6_0_ip_block -ffffffff82c130c0 R uvd_v6_2_ip_block -ffffffff82c130d8 R uvd_v6_3_ip_block -ffffffff82c130f0 r uvd_v6_0_ring_vm_funcs -ffffffff82c13230 r uvd_v6_0_ring_phys_funcs -ffffffff82c13370 r uvd_v6_0_enc_ring_vm_funcs -ffffffff82c134b0 r uvd_v6_0_irq_funcs -ffffffff82c14000 R uvd_v7_0_ip_funcs -ffffffff82c140a8 R uvd_v7_0_ip_block -ffffffff82c140c0 r uvd_v7_0_ring_vm_funcs -ffffffff82c14200 r uvd_v7_0_enc_ring_vm_funcs -ffffffff82c14340 r uvd_v7_0_irq_funcs -ffffffff82c15000 r vce_v3_0_ip_funcs -ffffffff82c150a8 R vce_v3_0_ip_block -ffffffff82c150c0 R vce_v3_1_ip_block -ffffffff82c150d8 R vce_v3_4_ip_block -ffffffff82c150f0 r vce_v3_0_ring_vm_funcs -ffffffff82c15230 r vce_v3_0_ring_phys_funcs -ffffffff82c15370 r vce_v3_0_irq_funcs -ffffffff82c16000 R vce_v4_0_ip_funcs -ffffffff82c160a8 R vce_v4_0_ip_block -ffffffff82c160c0 r vce_v4_0_ring_vm_funcs -ffffffff82c16200 r vce_v4_0_irq_funcs -ffffffff82c17000 r vcn_v1_0_ip_funcs -ffffffff82c170a8 R vcn_v1_0_ip_block -ffffffff82c170c0 r vcn_v1_0_dec_ring_vm_funcs -ffffffff82c17200 r vcn_v1_0_enc_ring_vm_funcs -ffffffff82c17340 r vcn_v1_0_irq_funcs -ffffffff82c18000 r vcn_v2_0_ip_funcs -ffffffff82c180a8 R vcn_v2_0_ip_block -ffffffff82c180c0 r vcn_v2_0_dec_ring_vm_funcs -ffffffff82c18200 r vcn_v2_0_enc_ring_vm_funcs -ffffffff82c18340 r vcn_v2_0_irq_funcs -ffffffff82c19000 r vcn_v2_5_ip_funcs -ffffffff82c190a8 R vcn_v2_5_ip_block -ffffffff82c190c0 r vcn_v2_6_ip_funcs -ffffffff82c19168 R vcn_v2_6_ip_block -ffffffff82c19180 R vcn_v2_6_ras_hw_ops -ffffffff82c191c0 r vcn_v2_5_dec_ring_vm_funcs -ffffffff82c19300 r vcn_v2_5_enc_ring_vm_funcs -ffffffff82c19440 r vcn_v2_5_irq_funcs -ffffffff82c19450 r vcn_v2_6_ras_irq_funcs -ffffffff82c1a000 r vcn_v3_0_ip_funcs -ffffffff82c1a0a8 R vcn_v3_0_ip_block -ffffffff82c1a0c0 r vcn_v3_0_dec_ring_vm_funcs -ffffffff82c1a200 r vcn_v3_0_enc_ring_vm_funcs -ffffffff82c1a340 r vcn_v3_0_irq_funcs -ffffffff82c1b000 r vcn_v4_0_ip_funcs -ffffffff82c1b0a8 R vcn_v4_0_ip_block -ffffffff82c1b0c0 R vcn_v4_0_ras_hw_ops -ffffffff82c1b100 r vcn_v4_0_irq_funcs -ffffffff82c1b110 r vcn_v4_0_ras_irq_funcs -ffffffff82c1c000 r vcn_v4_0_3_ip_funcs -ffffffff82c1c0a8 R vcn_v4_0_3_ip_block -ffffffff82c1c0c0 r vcn_v4_0_3_unified_ring_vm_funcs -ffffffff82c1c200 r vcn_v4_0_3_irq_funcs -ffffffff82c1c210 r vcn_v4_0_3_ras_hw_ops -ffffffff82c1c250 r vcn_v4_0_3_ue_reg_list -ffffffff82c1d000 R vega10_ih_ip_funcs -ffffffff82c1d0a8 R vega10_ih_ip_block -ffffffff82c1d0c0 r vega10_ih_funcs -ffffffff82c1d0e0 r vega10_ih_self_irq_funcs -ffffffff82c1e000 r GC_BASE -ffffffff82c1e064 r HDP_BASE -ffffffff82c1e0c8 r MMHUB_BASE -ffffffff82c1e12c r ATHUB_BASE -ffffffff82c1e190 r NBIO_BASE -ffffffff82c1e1f4 r MP0_BASE -ffffffff82c1e258 r MP1_BASE -ffffffff82c1e2bc r VCE_BASE -ffffffff82c1e320 r VCN_BASE -ffffffff82c1e384 r DF_BASE -ffffffff82c1e3e8 r DCE_BASE -ffffffff82c1e44c r OSSSYS_BASE -ffffffff82c1e4b0 r SDMA0_BASE -ffffffff82c1e514 r SDMA1_BASE -ffffffff82c1e578 r SMUIO_BASE -ffffffff82c1e5dc r PWR_BASE -ffffffff82c1e640 r NBIF_BASE -ffffffff82c1e6a4 r THM_BASE -ffffffff82c1e708 r CLK_BASE -ffffffff82c1f000 R vega20_ih_ip_funcs -ffffffff82c1f0a8 R vega20_ih_ip_block -ffffffff82c1f0c0 r vega20_ih_funcs -ffffffff82c1f0e0 r vega20_ih_self_irq_funcs -ffffffff82c20000 r GC_BASE -ffffffff82c20090 r HDP_BASE -ffffffff82c20120 r MMHUB_BASE -ffffffff82c201b0 r ATHUB_BASE -ffffffff82c20240 r NBIO_BASE -ffffffff82c202d0 r MP0_BASE -ffffffff82c20360 r MP1_BASE -ffffffff82c203f0 r UVD_BASE -ffffffff82c20480 r VCE_BASE -ffffffff82c20510 r DF_BASE -ffffffff82c205a0 r DCE_BASE -ffffffff82c20630 r OSSSYS_BASE -ffffffff82c206c0 r SDMA0_BASE -ffffffff82c20750 r SDMA1_BASE -ffffffff82c207e0 r SMUIO_BASE -ffffffff82c20870 r THM_BASE -ffffffff82c20900 r CLK_BASE -ffffffff82c20990 r UMC_BASE -ffffffff82c20a20 r RSMU_BASE -ffffffff82c21000 r vi_common_ip_block -ffffffff82c21018 r vi_common_ip_funcs -ffffffff82c210c0 r vi_asic_funcs -ffffffff82c21180 r vi_allowed_read_registers -ffffffff82c213e0 r topaz_video_codecs_encode -ffffffff82c213f0 r topaz_video_codecs_decode -ffffffff82c21400 r tonga_video_codecs_encode -ffffffff82c21410 r tonga_video_codecs_decode -ffffffff82c21420 r polaris_video_codecs_encode -ffffffff82c21430 r cz_video_codecs_decode -ffffffff82c21440 r tonga_video_codecs_encode_array -ffffffff82c21460 r tonga_video_codecs_decode_array -ffffffff82c214b0 r polaris_video_codecs_encode_array -ffffffff82c214e0 r cz_video_codecs_decode_array -ffffffff82c21560 r iceland_mgcg_cgcg_init -ffffffff82c215a0 r fiji_mgcg_cgcg_init -ffffffff82c21600 r tonga_mgcg_cgcg_init -ffffffff82c21660 r cz_mgcg_cgcg_init -ffffffff82c216a0 r stoney_mgcg_cgcg_init -ffffffff82c22000 r amdgpu_dm_funcs -ffffffff82c220a8 R dm_ip_block -ffffffff82c220c0 R amdgpu_dm_encoder_helper_funcs -ffffffff82c22128 r dm_display_funcs -ffffffff82c22180 r hpd_disconnect_quirk_table -ffffffff82c22ef0 r amdgpu_dm_mode_funcs -ffffffff82c22f38 r amdgpu_dm_audio_component_bind_ops -ffffffff82c22f48 r amdgpu_dm_audio_component_ops -ffffffff82c22f80 r amdgpu_dm_encoder_funcs -ffffffff82c22fa0 r amdgpu_dm_connector_funcs -ffffffff82c23018 r amdgpu_dm_connector_helper_funcs -ffffffff82c23078 r amdgpu_dm_i2c_algo -ffffffff82c23088 r amdgpu_dm_backlight_ops -ffffffff82c23260 r add_fs_modes.common_rates -ffffffff82c24000 r amdgpu_dm_crtc_funcs -ffffffff82c240c0 r amdgpu_dm_crtc_helper_funcs -ffffffff82c25000 r dm_dtn_log_begin.msg -ffffffff82c2500d r dm_dtn_log_end.msg -ffffffff82c25018 r SYNAPTICS_DEVICE_ID -ffffffff82c26000 r dm_crtc_irq_funcs -ffffffff82c26010 r dm_vline0_irq_funcs -ffffffff82c26020 r dm_dmub_outbox_irq_funcs -ffffffff82c26030 r dm_vupdate_irq_funcs -ffffffff82c26040 r dm_dmub_trace_irq_funcs -ffffffff82c26050 r dm_pageflip_irq_funcs -ffffffff82c26060 r dm_hpd_irq_funcs -ffffffff82c27000 r amdgpu_dm_encoder_funcs -ffffffff82c27020 r dm_mst_cbs -ffffffff82c27030 r dm_dp_mst_connector_funcs -ffffffff82c270a8 r dm_dp_mst_connector_helper_funcs -ffffffff82c28000 r dm_plane_funcs -ffffffff82c28068 r dm_plane_helper_funcs +ffffffff82bbe000 R gmc_v10_0_ip_funcs +ffffffff82bbe0a8 R gmc_v10_0_ip_block +ffffffff82bbe0c0 r gmc_v10_0_gmc_funcs +ffffffff82bbe118 r gmc_v10_0_irq_funcs +ffffffff82bbe128 r gmc_v10_0_ecc_funcs +ffffffff82bbf000 R gmc_v11_0_ip_funcs +ffffffff82bbf0a8 R gmc_v11_0_ip_block +ffffffff82bbf0c0 r gmc_v11_0_gmc_funcs +ffffffff82bbf118 r gmc_v11_0_irq_funcs +ffffffff82bbf128 r gmc_v11_0_ecc_funcs +ffffffff82bc0000 r gmc_v7_0_ip_funcs +ffffffff82bc00a8 R gmc_v7_0_ip_block +ffffffff82bc00c0 R gmc_v7_4_ip_block +ffffffff82bc00d8 r gmc_v7_0_gmc_funcs +ffffffff82bc0130 r gmc_v7_0_irq_funcs +ffffffff82bc0140 r iceland_mgcg_cgcg_init +ffffffff82bc0150 r golden_settings_iceland_a11 +ffffffff82bc0180 r mc_cg_registers +ffffffff82bc01b0 r mc_cg_en +ffffffff82bc01e0 r mc_cg_ls_en +ffffffff82bc1000 r gmc_v8_0_ip_funcs +ffffffff82bc10a8 R gmc_v8_0_ip_block +ffffffff82bc10c0 R gmc_v8_1_ip_block +ffffffff82bc10d8 R gmc_v8_5_ip_block +ffffffff82bc10f0 r gmc_v8_0_gmc_funcs +ffffffff82bc1148 r gmc_v8_0_irq_funcs +ffffffff82bc1158 r fiji_mgcg_cgcg_init +ffffffff82bc1170 r golden_settings_fiji_a10 +ffffffff82bc11a0 r tonga_mgcg_cgcg_init +ffffffff82bc11b0 r golden_settings_tonga_a11 +ffffffff82bc1210 r golden_settings_polaris11_a11 +ffffffff82bc1240 r golden_settings_polaris10_a11 +ffffffff82bc127c r cz_mgcg_cgcg_init +ffffffff82bc1290 r stoney_mgcg_cgcg_init +ffffffff82bc12b0 r golden_settings_stoney_common +ffffffff82bc2000 R gmc_v9_0_ip_funcs +ffffffff82bc20a8 R gmc_v9_0_ip_block +ffffffff82bc20c0 r gmc_v9_0_gmc_funcs +ffffffff82bc2118 r gmc_v9_0_irq_funcs +ffffffff82bc2128 r gmc_v9_0_ecc_funcs +ffffffff82bc2140 r gfxhub_client_ids +ffffffff82bc21b0 r mmhub_client_ids_vega10 +ffffffff82bc24a0 r mmhub_client_ids_vega12 +ffffffff82bc27a0 r mmhub_client_ids_vega20 +ffffffff82bc2a90 r mmhub_client_ids_arcturus +ffffffff82bc42a0 r mmhub_client_ids_raven +ffffffff82bc4460 r mmhub_client_ids_renoir +ffffffff82bc4650 r mmhub_client_ids_aldebaran +ffffffff82bc5e60 r ecc_umc_mcumc_ctrl_addrs +ffffffff82bc5ee0 r ecc_umc_mcumc_ctrl_mask_addrs +ffffffff82bc5f60 r golden_settings_mmhub_1_0_0 +ffffffff82bc5f90 r golden_settings_athub_1_0_0 +ffffffff82bc6000 R hdp_v4_0_funcs +ffffffff82bc7000 R hdp_v5_0_funcs +ffffffff82bc8000 R hdp_v5_2_funcs +ffffffff82bc9000 R hdp_v6_0_funcs +ffffffff82bca000 r iceland_ih_ip_funcs +ffffffff82bca0a8 R iceland_ih_ip_block +ffffffff82bca0c0 r iceland_ih_funcs +ffffffff82bcb000 r ih_v6_0_ip_funcs +ffffffff82bcb0a8 R ih_v6_0_ip_block +ffffffff82bcb0c0 r ih_v6_0_funcs +ffffffff82bcb0e0 r ih_v6_0_self_irq_funcs +ffffffff82bcc000 r ih_v6_1_ip_funcs +ffffffff82bcc0a8 R ih_v6_1_ip_block +ffffffff82bcc0c0 r ih_v6_1_funcs +ffffffff82bcc0e0 r ih_v6_1_self_irq_funcs +ffffffff82bcd000 R gfx_v11_0_imu_funcs +ffffffff82bcd030 r imu_rlc_ram_golden_11 +ffffffff82bcd680 r imu_rlc_ram_golden_11_0_2 +ffffffff82bce000 r imu_rlc_ram_golden_11_0_3 +ffffffff82bcf000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82bcf140 r jpeg_v1_0_irq_funcs +ffffffff82bd0000 r jpeg_v2_0_ip_funcs +ffffffff82bd00a8 R jpeg_v2_0_ip_block +ffffffff82bd00c0 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82bd0200 r jpeg_v2_0_irq_funcs +ffffffff82bd1000 r jpeg_v2_5_ip_funcs +ffffffff82bd10a8 R jpeg_v2_5_ip_block +ffffffff82bd10c0 r jpeg_v2_6_ip_funcs +ffffffff82bd1168 R jpeg_v2_6_ip_block +ffffffff82bd1180 R jpeg_v2_6_ras_hw_ops +ffffffff82bd11c0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82bd1300 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82bd1440 r jpeg_v2_5_irq_funcs +ffffffff82bd1450 r jpeg_v2_6_ras_irq_funcs +ffffffff82bd2000 r jpeg_v3_0_ip_funcs +ffffffff82bd20a8 R jpeg_v3_0_ip_block +ffffffff82bd20c0 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82bd2200 r jpeg_v3_0_irq_funcs +ffffffff82bd3000 r jpeg_v4_0_ip_funcs +ffffffff82bd30a8 R jpeg_v4_0_ip_block +ffffffff82bd30c0 R jpeg_v4_0_ras_hw_ops +ffffffff82bd3100 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82bd3240 r jpeg_v4_0_irq_funcs +ffffffff82bd3250 r jpeg_v4_0_ras_irq_funcs +ffffffff82bd4000 r jpeg_v4_0_3_ip_funcs +ffffffff82bd40a8 R jpeg_v4_0_3_ip_block +ffffffff82bd40c0 r jpeg_v4_0_3_dec_ring_vm_funcs +ffffffff82bd4200 r jpeg_v4_0_3_irq_funcs +ffffffff82bd4210 r jpeg_v4_0_3_ras_hw_ops +ffffffff82bd4250 r jpeg_v4_0_3_ue_reg_list +ffffffff82bd5000 R lsdma_v6_0_funcs +ffffffff82bd6000 r mca_v3_0_mp0_hw_ops +ffffffff82bd6040 r mca_v3_0_mp1_hw_ops +ffffffff82bd6080 r mca_v3_0_mpio_hw_ops +ffffffff82bd7000 r mes_v10_1_ip_funcs +ffffffff82bd70a8 R mes_v10_1_ip_block +ffffffff82bd70c0 r mes_v10_1_funcs +ffffffff82bd70f0 r mes_v10_1_ring_funcs +ffffffff82bd8000 r mes_v11_0_ip_funcs +ffffffff82bd80a8 R mes_v11_0_ip_block +ffffffff82bd80c0 r mes_v11_0_funcs +ffffffff82bd80f0 r mes_v11_0_ring_funcs +ffffffff82bd9000 R mmhub_v1_0_funcs +ffffffff82bd9050 r mmhub_v1_0_edc_cnt_regs +ffffffff82bd90c0 r mmhub_v1_0_ras_fields +ffffffff82bda000 R mmhub_v1_7_funcs +ffffffff82bda050 r mmhub_v1_7_edc_cnt_regs +ffffffff82bda250 r mmhub_v1_7_ras_fields +ffffffff82bdb9c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82bdc000 R mmhub_v1_8_funcs +ffffffff82bdc050 r mmhub_v1_8_ras_hw_ops +ffffffff82bdc090 r mmhub_v1_8_ce_reg_list +ffffffff82bdc180 r mmhub_v1_8_ras_memory_list +ffffffff82bdc2b0 r mmhub_v1_8_ue_reg_list +ffffffff82bdd000 R mmhub_v2_0_funcs +ffffffff82bdd050 r mmhub_v2_0_vmhub_funcs +ffffffff82bdd060 r mmhub_client_ids_navi1x +ffffffff82bdd190 r mmhub_client_ids_sienna_cichlid +ffffffff82bdd450 r mmhub_client_ids_beige_goby +ffffffff82bde000 R mmhub_v2_3_funcs +ffffffff82bde050 r mmhub_v2_3_vmhub_funcs +ffffffff82bde060 r mmhub_client_ids_vangogh +ffffffff82bdf000 R mmhub_v3_0_funcs +ffffffff82bdf050 r mmhub_v3_0_vmhub_funcs +ffffffff82bdf060 r mmhub_client_ids_v3_0_0 +ffffffff82be0000 R mmhub_v3_0_1_funcs +ffffffff82be0050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82be0060 r mmhub_client_ids_v3_0_1 +ffffffff82be1000 R mmhub_v3_0_2_funcs +ffffffff82be1050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82be1060 r mmhub_client_ids_v3_0_2 +ffffffff82be2000 R mmhub_v9_4_ras_hw_ops +ffffffff82be2040 R mmhub_v9_4_funcs +ffffffff82be2090 r mmhub_v9_4_edc_cnt_regs +ffffffff82be2330 r mmhub_v9_4_ras_fields +ffffffff82be43b0 r mmhub_v9_4_err_status_regs +ffffffff82be5000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82be5010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82be5020 R xgpu_ai_virt_ops +ffffffff82be6000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82be6010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82be6020 R xgpu_nv_virt_ops +ffffffff82be7000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82be7240 r xgpu_fiji_golden_settings_a10 +ffffffff82be7370 r xgpu_fiji_golden_common_all +ffffffff82be73f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82be7810 r xgpu_tonga_golden_settings_a11 +ffffffff82be79d0 r xgpu_tonga_golden_common_all +ffffffff82be7a28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82be7a38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82be7a48 R xgpu_vi_virt_ops +ffffffff82be8000 r navi10_ih_ip_funcs +ffffffff82be80a8 R navi10_ih_ip_block +ffffffff82be80c0 r navi10_ih_funcs +ffffffff82be80e0 r navi10_ih_self_irq_funcs +ffffffff82be9000 R nbio_v2_3_hdp_flush_reg +ffffffff82be9048 R nbio_v2_3_funcs +ffffffff82bea000 R nbio_v4_3_hdp_flush_reg +ffffffff82bea048 R nbio_v4_3_funcs +ffffffff82bea158 R nbio_v4_3_sriov_funcs +ffffffff82bea268 r nbio_v4_3_ras_err_event_athub_irq_funcs +ffffffff82beb000 R nbio_v6_1_hdp_flush_reg +ffffffff82beb048 R nbio_v6_1_funcs +ffffffff82bec000 R nbio_v7_0_hdp_flush_reg +ffffffff82bec048 R nbio_v7_0_funcs +ffffffff82bed000 R nbio_v7_2_hdp_flush_reg +ffffffff82bed048 R nbio_v7_2_funcs +ffffffff82bee000 R nbio_v7_4_hdp_flush_reg +ffffffff82bee048 R nbio_v7_4_ras_hw_ops +ffffffff82bee088 R nbio_v7_4_funcs +ffffffff82bee198 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82bee1a8 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82bef000 R nbio_v7_7_hdp_flush_reg +ffffffff82bef048 R nbio_v7_7_funcs +ffffffff82bf0000 R nbio_v7_9_hdp_flush_reg +ffffffff82bf0048 R nbio_v7_9_funcs +ffffffff82bf0158 R nbio_v7_9_ras_hw_ops +ffffffff82bf0198 r nbio_v7_9_ras_controller_irq_funcs +ffffffff82bf01a8 r nbio_v7_9_ras_err_event_athub_irq_funcs +ffffffff82bf1000 r nv_common_ip_funcs +ffffffff82bf10a8 R nv_common_ip_block +ffffffff82bf10c0 r nv_asic_funcs +ffffffff82bf1180 r nv_allowed_read_registers +ffffffff82bf1300 r sc_video_codecs_encode +ffffffff82bf1310 r sc_video_codecs_decode_vcn1 +ffffffff82bf1320 r sc_video_codecs_decode_vcn0 +ffffffff82bf1330 r yc_video_codecs_decode +ffffffff82bf1340 r bg_video_codecs_encode +ffffffff82bf1350 r bg_video_codecs_decode +ffffffff82bf1360 r nv_video_codecs_encode +ffffffff82bf1370 r nv_video_codecs_decode +ffffffff82bf1380 r sc_video_codecs_encode_array +ffffffff82bf13b0 r sc_video_codecs_decode_array_vcn1 +ffffffff82bf1440 r sc_video_codecs_decode_array_vcn0 +ffffffff82bf14e0 r yc_video_codecs_decode_array +ffffffff82bf1550 r bg_video_codecs_decode_array +ffffffff82bf1590 r nv_video_codecs_encode_array +ffffffff82bf15c0 r nv_video_codecs_decode_array +ffffffff82bf2000 r psp_v10_0_funcs +ffffffff82bf3000 r psp_v11_0_funcs +ffffffff82bf4000 r psp_v11_0_8_funcs +ffffffff82bf5000 r psp_v12_0_funcs +ffffffff82bf6000 r psp_v13_0_funcs +ffffffff82bf7000 r psp_v13_0_4_funcs +ffffffff82bf8000 r psp_v3_1_funcs +ffffffff82bf9000 r sdma_v2_4_ip_funcs +ffffffff82bf90a8 R sdma_v2_4_ip_block +ffffffff82bf90c0 r sdma_v2_4_ring_funcs +ffffffff82bf9200 r sdma_v2_4_buffer_funcs +ffffffff82bf9220 r sdma_v2_4_vm_pte_funcs +ffffffff82bf9240 r sdma_v2_4_trap_irq_funcs +ffffffff82bf9250 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82bf9260 r iceland_mgcg_cgcg_init +ffffffff82bf9280 r golden_settings_iceland_a11 +ffffffff82bfa000 r sdma_v3_0_ip_funcs +ffffffff82bfa0a8 R sdma_v3_0_ip_block +ffffffff82bfa0c0 R sdma_v3_1_ip_block +ffffffff82bfa0d8 r sdma_v3_0_ring_funcs +ffffffff82bfa218 r sdma_v3_0_buffer_funcs +ffffffff82bfa238 r sdma_v3_0_vm_pte_funcs +ffffffff82bfa258 r sdma_v3_0_trap_irq_funcs +ffffffff82bfa268 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82bfa280 r fiji_mgcg_cgcg_init +ffffffff82bfa2a0 r golden_settings_fiji_a10 +ffffffff82bfa300 r tonga_mgcg_cgcg_init +ffffffff82bfa320 r golden_settings_tonga_a11 +ffffffff82bfa3a0 r golden_settings_polaris11_a11 +ffffffff82bfa420 r golden_settings_polaris10_a11 +ffffffff82bfa4a0 r cz_mgcg_cgcg_init +ffffffff82bfa4c0 r cz_golden_settings_a11 +ffffffff82bfa550 r stoney_mgcg_cgcg_init +ffffffff82bfa560 r stoney_golden_settings_a11 +ffffffff82bfb000 R sdma_v4_0_ip_funcs +ffffffff82bfb0a8 R sdma_v4_0_ras_hw_ops +ffffffff82bfb0e8 R sdma_v4_0_ip_block +ffffffff82bfb100 r sdma_v4_0_ring_funcs +ffffffff82bfb240 r sdma_v4_0_page_ring_funcs +ffffffff82bfb380 r sdma_v4_0_buffer_funcs +ffffffff82bfb3a0 r sdma_v4_0_vm_pte_funcs +ffffffff82bfb3c0 r sdma_v4_0_trap_irq_funcs +ffffffff82bfb3d0 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82bfb3e0 r sdma_v4_0_ecc_irq_funcs +ffffffff82bfb3f0 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82bfb400 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82bfb410 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82bfb420 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82bfb430 r golden_settings_sdma_4 +ffffffff82bfb690 r golden_settings_sdma_vg10 +ffffffff82bfb740 r golden_settings_sdma_vg12 +ffffffff82bfb7f0 r golden_settings_sdma0_4_2_init +ffffffff82bfb810 r golden_settings_sdma0_4_2 +ffffffff82bfbaa0 r golden_settings_sdma1_4_2 +ffffffff82bfbd30 r golden_settings_sdma_arct +ffffffff82bfc030 r golden_settings_sdma_aldebaran +ffffffff82bfc1a0 r golden_settings_sdma_4_1 +ffffffff82bfc2b0 r golden_settings_sdma_rv2 +ffffffff82bfc2e0 r golden_settings_sdma_rv1 +ffffffff82bfc310 r golden_settings_sdma_4_3 +ffffffff82bfc400 r sdma_v4_0_ras_fields +ffffffff82bfd000 R sdma_v4_4_ras_hw_ops +ffffffff82bfd040 r sdma_v4_4_ras_fields +ffffffff82bfe000 R sdma_v4_4_2_ip_funcs +ffffffff82bfe0a8 R sdma_v4_4_2_ip_block +ffffffff82bfe0c0 r sdma_v4_4_2_ring_funcs +ffffffff82bfe200 r sdma_v4_4_2_page_ring_funcs +ffffffff82bfe340 r sdma_v4_4_2_buffer_funcs +ffffffff82bfe360 r sdma_v4_4_2_vm_pte_funcs +ffffffff82bfe380 r sdma_v4_4_2_trap_irq_funcs +ffffffff82bfe390 r sdma_v4_4_2_illegal_inst_irq_funcs +ffffffff82bfe3a0 r sdma_v4_4_2_ecc_irq_funcs +ffffffff82bfe3b0 r sdma_v4_4_2_vm_hole_irq_funcs +ffffffff82bfe3c0 r sdma_v4_4_2_doorbell_invalid_irq_funcs +ffffffff82bfe3d0 r sdma_v4_4_2_pool_timeout_irq_funcs +ffffffff82bfe3e0 r sdma_v4_4_2_srbm_write_irq_funcs +ffffffff82bfe3f0 r sdma_v4_4_2_ras_hw_ops +ffffffff82bfe430 r sdma_v4_2_2_ue_reg_list +ffffffff82bfe460 r sdma_v4_4_2_ras_memory_list +ffffffff82bff000 R sdma_v5_0_ip_funcs +ffffffff82bff0a8 R sdma_v5_0_ip_block +ffffffff82bff0c0 r sdma_v5_0_ring_funcs +ffffffff82bff200 r sdma_v5_0_buffer_funcs +ffffffff82bff220 r sdma_v5_0_vm_pte_funcs +ffffffff82bff240 r sdma_v5_0_trap_irq_funcs +ffffffff82bff250 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82bff260 r golden_settings_sdma_5 +ffffffff82bff4a0 r golden_settings_sdma_nv10 +ffffffff82bff4d0 r golden_settings_sdma_nv14 +ffffffff82bff500 r golden_settings_sdma_5_sriov +ffffffff82bff6e0 r golden_settings_sdma_nv12 +ffffffff82bff770 r golden_settings_sdma_cyan_skillfish +ffffffff82c00000 R sdma_v5_2_ip_funcs +ffffffff82c000a8 R sdma_v5_2_ip_block +ffffffff82c000c0 r sdma_v5_2_ring_funcs +ffffffff82c00200 r sdma_v5_2_buffer_funcs +ffffffff82c00220 r sdma_v5_2_vm_pte_funcs +ffffffff82c00240 r sdma_v5_2_trap_irq_funcs +ffffffff82c00250 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82c01000 R sdma_v6_0_ip_funcs +ffffffff82c010a8 R sdma_v6_0_ip_block +ffffffff82c010c0 r sdma_v6_0_ring_funcs +ffffffff82c01200 r sdma_v6_0_buffer_funcs +ffffffff82c01220 r sdma_v6_0_vm_pte_funcs +ffffffff82c01240 r sdma_v6_0_trap_irq_funcs +ffffffff82c01250 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82c02000 r smu_v11_0_i2c_algo +ffffffff82c02010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82c02028 r smu_v11_0_i2c_control_quirks +ffffffff82c03000 R smuio_v11_0_funcs +ffffffff82c04000 R smuio_v11_0_6_funcs +ffffffff82c05000 R smuio_v13_0_funcs +ffffffff82c06000 R smuio_v13_0_3_funcs +ffffffff82c07000 R smuio_v13_0_6_funcs +ffffffff82c08000 R smuio_v9_0_funcs +ffffffff82c09000 r soc15_common_ip_funcs +ffffffff82c090a8 R vega10_common_ip_block +ffffffff82c090c0 r soc15_asic_funcs +ffffffff82c09180 r vega20_asic_funcs +ffffffff82c09240 r aqua_vanjaram_asic_funcs +ffffffff82c09300 r soc15_allowed_read_registers +ffffffff82c09490 r vega_video_codecs_encode +ffffffff82c094a0 r vega_video_codecs_decode +ffffffff82c094b0 r rv_video_codecs_decode +ffffffff82c094c0 r rn_video_codecs_decode +ffffffff82c094d0 r vcn_4_0_3_video_codecs_encode +ffffffff82c094e0 r vcn_4_0_3_video_codecs_decode +ffffffff82c094f0 r vega_video_codecs_encode_array +ffffffff82c09520 r vega_video_codecs_decode_array +ffffffff82c095a0 r rv_video_codecs_decode_array +ffffffff82c09630 r rn_video_codecs_decode_array +ffffffff82c096c0 r vcn_4_0_3_video_codecs_decode_array +ffffffff82c0a000 r soc21_common_ip_funcs +ffffffff82c0a0a8 R soc21_common_ip_block +ffffffff82c0a0c0 r soc21_asic_funcs +ffffffff82c0a180 r soc21_allowed_read_registers +ffffffff82c0a300 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82c0a310 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82c0a320 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82c0a330 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82c0a340 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82c0a370 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82c0a3c0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82c0a400 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82c0b000 r tonga_ih_ip_funcs +ffffffff82c0b0a8 R tonga_ih_ip_block +ffffffff82c0b0c0 r tonga_ih_funcs +ffffffff82c0c000 R umc_v6_0_funcs +ffffffff82c0d000 R umc_v6_1_channel_idx_tbl +ffffffff82c0d080 R umc_v6_1_ras_hw_ops +ffffffff82c0e000 R umc_v6_7_channel_idx_tbl_second +ffffffff82c0e080 R umc_v6_7_channel_idx_tbl_first +ffffffff82c0e100 R umc_v6_7_ras_hw_ops +ffffffff82c0f000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82c0f040 R umc_v8_10_channel_idx_tbl_ext0 +ffffffff82c0f080 R umc_v8_10_channel_idx_tbl +ffffffff82c0f0e0 R umc_v8_10_ras_hw_ops +ffffffff82c10000 R umc_v8_7_channel_idx_tbl +ffffffff82c10040 R umc_v8_7_ras_hw_ops +ffffffff82c11000 r uvd_v5_0_ip_funcs +ffffffff82c110a8 R uvd_v5_0_ip_block +ffffffff82c110c0 r uvd_v5_0_ring_funcs +ffffffff82c11200 r uvd_v5_0_irq_funcs +ffffffff82c12000 r uvd_v6_0_ip_funcs +ffffffff82c120a8 R uvd_v6_0_ip_block +ffffffff82c120c0 R uvd_v6_2_ip_block +ffffffff82c120d8 R uvd_v6_3_ip_block +ffffffff82c120f0 r uvd_v6_0_ring_vm_funcs +ffffffff82c12230 r uvd_v6_0_ring_phys_funcs +ffffffff82c12370 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82c124b0 r uvd_v6_0_irq_funcs +ffffffff82c13000 R uvd_v7_0_ip_funcs +ffffffff82c130a8 R uvd_v7_0_ip_block +ffffffff82c130c0 r uvd_v7_0_ring_vm_funcs +ffffffff82c13200 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82c13340 r uvd_v7_0_irq_funcs +ffffffff82c14000 r vce_v3_0_ip_funcs +ffffffff82c140a8 R vce_v3_0_ip_block +ffffffff82c140c0 R vce_v3_1_ip_block +ffffffff82c140d8 R vce_v3_4_ip_block +ffffffff82c140f0 r vce_v3_0_ring_vm_funcs +ffffffff82c14230 r vce_v3_0_ring_phys_funcs +ffffffff82c14370 r vce_v3_0_irq_funcs +ffffffff82c15000 R vce_v4_0_ip_funcs +ffffffff82c150a8 R vce_v4_0_ip_block +ffffffff82c150c0 r vce_v4_0_ring_vm_funcs +ffffffff82c15200 r vce_v4_0_irq_funcs +ffffffff82c16000 r vcn_v1_0_ip_funcs +ffffffff82c160a8 R vcn_v1_0_ip_block +ffffffff82c160c0 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82c16200 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82c16340 r vcn_v1_0_irq_funcs +ffffffff82c17000 r vcn_v2_0_ip_funcs +ffffffff82c170a8 R vcn_v2_0_ip_block +ffffffff82c170c0 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82c17200 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82c17340 r vcn_v2_0_irq_funcs +ffffffff82c18000 r vcn_v2_5_ip_funcs +ffffffff82c180a8 R vcn_v2_5_ip_block +ffffffff82c180c0 r vcn_v2_6_ip_funcs +ffffffff82c18168 R vcn_v2_6_ip_block +ffffffff82c18180 R vcn_v2_6_ras_hw_ops +ffffffff82c181c0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82c18300 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82c18440 r vcn_v2_5_irq_funcs +ffffffff82c18450 r vcn_v2_6_ras_irq_funcs +ffffffff82c19000 r vcn_v3_0_ip_funcs +ffffffff82c190a8 R vcn_v3_0_ip_block +ffffffff82c190c0 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82c19200 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82c19340 r vcn_v3_0_irq_funcs +ffffffff82c1a000 r vcn_v4_0_ip_funcs +ffffffff82c1a0a8 R vcn_v4_0_ip_block +ffffffff82c1a0c0 R vcn_v4_0_ras_hw_ops +ffffffff82c1a100 r vcn_v4_0_irq_funcs +ffffffff82c1a110 r vcn_v4_0_ras_irq_funcs +ffffffff82c1b000 r vcn_v4_0_3_ip_funcs +ffffffff82c1b0a8 R vcn_v4_0_3_ip_block +ffffffff82c1b0c0 r vcn_v4_0_3_unified_ring_vm_funcs +ffffffff82c1b200 r vcn_v4_0_3_irq_funcs +ffffffff82c1b210 r vcn_v4_0_3_ras_hw_ops +ffffffff82c1b250 r vcn_v4_0_3_ue_reg_list +ffffffff82c1c000 R vega10_ih_ip_funcs +ffffffff82c1c0a8 R vega10_ih_ip_block +ffffffff82c1c0c0 r vega10_ih_funcs +ffffffff82c1c0e0 r vega10_ih_self_irq_funcs +ffffffff82c1d000 r GC_BASE +ffffffff82c1d064 r HDP_BASE +ffffffff82c1d0c8 r MMHUB_BASE +ffffffff82c1d12c r ATHUB_BASE +ffffffff82c1d190 r NBIO_BASE +ffffffff82c1d1f4 r MP0_BASE +ffffffff82c1d258 r MP1_BASE +ffffffff82c1d2bc r VCE_BASE +ffffffff82c1d320 r VCN_BASE +ffffffff82c1d384 r DF_BASE +ffffffff82c1d3e8 r DCE_BASE +ffffffff82c1d44c r OSSSYS_BASE +ffffffff82c1d4b0 r SDMA0_BASE +ffffffff82c1d514 r SDMA1_BASE +ffffffff82c1d578 r SMUIO_BASE +ffffffff82c1d5dc r PWR_BASE +ffffffff82c1d640 r NBIF_BASE +ffffffff82c1d6a4 r THM_BASE +ffffffff82c1d708 r CLK_BASE +ffffffff82c1e000 R vega20_ih_ip_funcs +ffffffff82c1e0a8 R vega20_ih_ip_block +ffffffff82c1e0c0 r vega20_ih_funcs +ffffffff82c1e0e0 r vega20_ih_self_irq_funcs +ffffffff82c1f000 r GC_BASE +ffffffff82c1f090 r HDP_BASE +ffffffff82c1f120 r MMHUB_BASE +ffffffff82c1f1b0 r ATHUB_BASE +ffffffff82c1f240 r NBIO_BASE +ffffffff82c1f2d0 r MP0_BASE +ffffffff82c1f360 r MP1_BASE +ffffffff82c1f3f0 r UVD_BASE +ffffffff82c1f480 r VCE_BASE +ffffffff82c1f510 r DF_BASE +ffffffff82c1f5a0 r DCE_BASE +ffffffff82c1f630 r OSSSYS_BASE +ffffffff82c1f6c0 r SDMA0_BASE +ffffffff82c1f750 r SDMA1_BASE +ffffffff82c1f7e0 r SMUIO_BASE +ffffffff82c1f870 r THM_BASE +ffffffff82c1f900 r CLK_BASE +ffffffff82c1f990 r UMC_BASE +ffffffff82c1fa20 r RSMU_BASE +ffffffff82c20000 r vi_common_ip_block +ffffffff82c20018 r vi_common_ip_funcs +ffffffff82c200c0 r vi_asic_funcs +ffffffff82c20180 r vi_allowed_read_registers +ffffffff82c203e0 r topaz_video_codecs_encode +ffffffff82c203f0 r topaz_video_codecs_decode +ffffffff82c20400 r tonga_video_codecs_encode +ffffffff82c20410 r tonga_video_codecs_decode +ffffffff82c20420 r polaris_video_codecs_encode +ffffffff82c20430 r cz_video_codecs_decode +ffffffff82c20440 r tonga_video_codecs_encode_array +ffffffff82c20460 r tonga_video_codecs_decode_array +ffffffff82c204b0 r polaris_video_codecs_encode_array +ffffffff82c204e0 r cz_video_codecs_decode_array +ffffffff82c20560 r iceland_mgcg_cgcg_init +ffffffff82c205a0 r fiji_mgcg_cgcg_init +ffffffff82c20600 r tonga_mgcg_cgcg_init +ffffffff82c20660 r cz_mgcg_cgcg_init +ffffffff82c206a0 r stoney_mgcg_cgcg_init +ffffffff82c21000 r amdgpu_dm_funcs +ffffffff82c210a8 R dm_ip_block +ffffffff82c210c0 R amdgpu_dm_encoder_helper_funcs +ffffffff82c21128 r dm_display_funcs +ffffffff82c21180 r hpd_disconnect_quirk_table +ffffffff82c21ef0 r amdgpu_dm_mode_funcs +ffffffff82c21f38 r amdgpu_dm_audio_component_bind_ops +ffffffff82c21f48 r amdgpu_dm_audio_component_ops +ffffffff82c21f80 r amdgpu_dm_encoder_funcs +ffffffff82c21fa0 r amdgpu_dm_connector_funcs +ffffffff82c22018 r amdgpu_dm_connector_helper_funcs +ffffffff82c22078 r amdgpu_dm_i2c_algo +ffffffff82c22088 r amdgpu_dm_backlight_ops +ffffffff82c22260 r add_fs_modes.common_rates +ffffffff82c23000 r amdgpu_dm_crtc_funcs +ffffffff82c230c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82c24000 r dm_dtn_log_begin.msg +ffffffff82c2400d r dm_dtn_log_end.msg +ffffffff82c24018 r SYNAPTICS_DEVICE_ID +ffffffff82c25000 r dm_crtc_irq_funcs +ffffffff82c25010 r dm_vline0_irq_funcs +ffffffff82c25020 r dm_dmub_outbox_irq_funcs +ffffffff82c25030 r dm_vupdate_irq_funcs +ffffffff82c25040 r dm_dmub_trace_irq_funcs +ffffffff82c25050 r dm_pageflip_irq_funcs +ffffffff82c25060 r dm_hpd_irq_funcs +ffffffff82c26000 r amdgpu_dm_encoder_funcs +ffffffff82c26020 r dm_mst_cbs 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r xfm_regs -ffffffff82c60330 r xfm_shift -ffffffff82c60390 r xfm_mask -ffffffff82c60510 r opp_regs -ffffffff82c60660 r opp_shift -ffffffff82c6068c r opp_mask -ffffffff82c60740 r aux_engine_regs -ffffffff82c60830 r aux_mask -ffffffff82c60890 r aux_shift -ffffffff82c608b0 r i2c_hw_regs -ffffffff82c60a00 r i2c_shifts -ffffffff82c60a2c r i2c_masks -ffffffff82c60ad0 r audio_regs -ffffffff82c60c04 r audio_shift -ffffffff82c60c1c r audio_mask -ffffffff82c60c60 r stream_enc_regs -ffffffff82c60f3c r se_shift -ffffffff82c60fc0 r se_mask -ffffffff82c611c4 r hwseq_stoney_reg -ffffffff82c613e0 r hwseq_cz_reg -ffffffff82c615fc r hwseq_shift -ffffffff82c6167c r hwseq_mask -ffffffff82c62000 r dce110_tg_funcs -ffffffff82c63000 r dce110_tg_v_funcs -ffffffff82c64000 r dce110_xfmv_funcs +ffffffff82c3c000 r ddr5_wm_table +ffffffff82c3d000 r lpddr5_wm_table +ffffffff82c3d0c0 r ddr4_wm_table +ffffffff82c3e000 r clk_mgr_regs_dcn321 +ffffffff82c3e054 r clk_mgr_shift_dcn321 +ffffffff82c3e060 r clk_mgr_mask_dcn321 +ffffffff82c3e084 r clk_mgr_regs_dcn32 +ffffffff82c3e0d8 r clk_mgr_shift_dcn32 +ffffffff82c3e0e4 r clk_mgr_mask_dcn32 +ffffffff82c3f000 r DC_BUILD_ID +ffffffff82c41000 r output_csc_matrix +ffffffff82c410e0 r black_color_format +ffffffff82c44000 r dce_funcs +ffffffff82c45000 r funcs +ffffffff82c46000 R video_optimized_pixel_rates +ffffffff82c461c0 r dce110_clk_src_funcs +ffffffff82c461e8 r dce112_clk_src_funcs +ffffffff82c46210 r dcn20_clk_src_funcs +ffffffff82c46238 r dcn3_clk_src_funcs +ffffffff82c46260 r dcn31_clk_src_funcs +ffffffff82c47000 r dce_funcs +ffffffff82c47068 r dcn10_funcs +ffffffff82c470d0 r dcn20_funcs +ffffffff82c47138 r dcn21_funcs +ffffffff82c48000 r dce_ipp_funcs +ffffffff82c49000 r dce110_lnk_enc_funcs +ffffffff82c4a000 r dce_mi_funcs +ffffffff82c4a090 r dce112_mi_funcs +ffffffff82c4a120 r dce120_mi_funcs +ffffffff82c4a1b0 r pte_settings +ffffffff82c4b000 r funcs +ffffffff82c4c000 r dce_link_panel_cntl_funcs +ffffffff82c4d000 r filter_3tap_16p_upscale +ffffffff82c4d040 r filter_3tap_16p_116 +ffffffff82c4d080 r filter_3tap_16p_149 +ffffffff82c4d0c0 r filter_3tap_16p_183 +ffffffff82c4d100 r filter_3tap_64p_upscale +ffffffff82c4d1d0 r filter_3tap_64p_116 +ffffffff82c4d2a0 r filter_3tap_64p_149 +ffffffff82c4d370 r filter_3tap_64p_183 +ffffffff82c4d440 r filter_4tap_16p_upscale +ffffffff82c4d490 r filter_4tap_16p_116 +ffffffff82c4d4e0 r filter_4tap_16p_149 +ffffffff82c4d530 r filter_4tap_16p_183 +ffffffff82c4d580 r filter_4tap_64p_upscale +ffffffff82c4d690 r filter_4tap_64p_116 +ffffffff82c4d7a0 r filter_4tap_64p_149 +ffffffff82c4d8b0 r filter_4tap_64p_183 +ffffffff82c4d9c0 r filter_5tap_64p_upscale +ffffffff82c4db10 r filter_5tap_64p_116 +ffffffff82c4dc60 r filter_5tap_64p_149 +ffffffff82c4ddb0 r filter_5tap_64p_183 +ffffffff82c4df00 r filter_6tap_64p_upscale +ffffffff82c4e090 r filter_6tap_64p_116 +ffffffff82c4e220 r filter_6tap_64p_149 +ffffffff82c4e3b0 r filter_6tap_64p_183 +ffffffff82c4e540 r filter_7tap_64p_upscale +ffffffff82c4e710 r filter_7tap_64p_116 +ffffffff82c4e8e0 r filter_7tap_64p_149 +ffffffff82c4eab0 r filter_7tap_64p_183 +ffffffff82c4ec80 r filter_8tap_64p_upscale +ffffffff82c4ee90 r filter_8tap_64p_116 +ffffffff82c4f0a0 r filter_8tap_64p_149 +ffffffff82c4f2b0 r filter_8tap_64p_183 +ffffffff82c4f4c0 r filter_2tap_16p +ffffffff82c4f4f0 r filter_2tap_64p +ffffffff82c50000 r dce110_str_enc_funcs +ffffffff82c50120 r audio_clock_info_table_48bpc +ffffffff82c502b0 r audio_clock_info_table_36bpc +ffffffff82c50440 r audio_clock_info_table +ffffffff82c51000 r global_color_matrix +ffffffff82c510a8 r dce_transform_funcs +ffffffff82c52000 r abm_funcs +ffffffff82c53000 r psr_funcs +ffffffff82c53040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82c53045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82c54000 r replay_funcs +ffffffff82c55000 r reg_offsets +ffffffff82c56000 r bios_regs +ffffffff82c56008 r res_cap +ffffffff82c56048 r dce100_res_pool_funcs +ffffffff82c56140 r clk_src_regs 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r aux_engine_regs +ffffffff82c57d30 r aux_mask +ffffffff82c57d90 r aux_shift +ffffffff82c57db0 r i2c_hw_regs +ffffffff82c57f00 r i2c_shifts +ffffffff82c57f2c r i2c_masks +ffffffff82c57fd0 r audio_regs +ffffffff82c58104 r audio_shift +ffffffff82c5811c r audio_mask +ffffffff82c58160 r stream_enc_regs +ffffffff82c5880c r se_shift +ffffffff82c58890 r se_mask +ffffffff82c58a94 r hwseq_reg +ffffffff82c58cb0 r hwseq_shift +ffffffff82c58d30 r hwseq_mask +ffffffff82c59000 r reg_offsets +ffffffff82c59018 r dce110_compressor_funcs +ffffffff82c5a000 r dce110_funcs +ffffffff82c5a2e8 r dce110_private_funcs +ffffffff82c5b000 r dce110_mem_input_v_funcs +ffffffff82c5b090 r dvmm_Hw_Setting_1DTiling +ffffffff82c5b120 r dvmm_Hw_Setting_2DTiling +ffffffff82c5b1b0 r dvmm_Hw_Setting_Linear +ffffffff82c5c000 r global_color_matrix +ffffffff82c5c0b0 r input_csc_matrix +ffffffff82c5d000 r funcs +ffffffff82c5e000 r bios_regs +ffffffff82c5e008 r dce110_res_pool_funcs +ffffffff82c5e100 r debug_defaults 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hpo_dp_le_shift -ffffffff82d0c10c r hpo_dp_le_mask -ffffffff82d0c170 r hwseq_reg -ffffffff82d0c38c r hwseq_shift -ffffffff82d0c40c r hwseq_mask -ffffffff82d0d000 r bios_regs -ffffffff82d0d008 r res_cap_dcn31 -ffffffff82d0d050 r clk_src_regs -ffffffff82d0d1f4 r dccg_regs -ffffffff82d0d2e4 r dccg_shift -ffffffff82d0d384 r dccg_mask -ffffffff82d0d600 r abm_regs -ffffffff82d0d7a0 r abm_shift -ffffffff82d0d7c4 r abm_mask -ffffffff82d0d850 r res_create_funcs -ffffffff82d0d880 r plane_cap -ffffffff82d0d8b0 r link_enc_regs -ffffffff82d0df10 r link_enc_aux_regs -ffffffff82d0df60 r link_enc_hpd_regs -ffffffff82d0df74 r le_shift -ffffffff82d0e064 r le_mask -ffffffff82d0e41c r link_enc_feature -ffffffff82d0e42c r panel_config_defaults -ffffffff82d0e480 r debug_defaults_drv -ffffffff82d0e628 r cs_shift -ffffffff82d0e634 r cs_mask -ffffffff82d0e65c r hubbub_reg -ffffffff82d0e7e4 r hubbub_shift -ffffffff82d0e874 r hubbub_mask -ffffffff82d0eab0 r vmid_regs -ffffffff82d0ec70 r vmid_shifts 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-ffffffff82d36000 R dcn10_soc_defaults -ffffffff82d3608c R dcn10_ip_defaults -ffffffff82d42000 r dml20_funcs -ffffffff82d42030 r dml20v2_funcs -ffffffff82d42060 r dml21_funcs -ffffffff82d42090 r dml30_funcs -ffffffff82d420c0 r dml31_funcs -ffffffff82d420f0 r dml314_funcs -ffffffff82d42120 r dml32_funcs -ffffffff82d45000 r qp_table_444_8bpc_max -ffffffff82d45940 r qp_table_444_8bpc_min -ffffffff82d46280 r qp_table_444_10bpc_max -ffffffff82d46ec0 r qp_table_444_10bpc_min -ffffffff82d47b00 r qp_table_444_12bpc_max -ffffffff82d48a40 r qp_table_444_12bpc_min -ffffffff82d49980 r qp_table_422_8bpc_max -ffffffff82d49ec0 r qp_table_422_8bpc_min -ffffffff82d4a400 r qp_table_422_10bpc_max -ffffffff82d4ab40 r qp_table_422_10bpc_min -ffffffff82d4b280 r qp_table_422_12bpc_max -ffffffff82d4bbc0 r qp_table_422_12bpc_min -ffffffff82d4c500 r qp_table_420_8bpc_max -ffffffff82d4c940 r qp_table_420_8bpc_min -ffffffff82d4cd80 r qp_table_420_10bpc_max -ffffffff82d4d340 r qp_table_420_10bpc_min -ffffffff82d4d900 r qp_table_420_12bpc_max -ffffffff82d4e040 r qp_table_420_12bpc_min +ffffffff82c66000 r bios_regs +ffffffff82c66008 r dce112_res_pool_funcs +ffffffff82c66100 r debug_defaults +ffffffff82c662b0 r clk_src_regs +ffffffff82c664a8 r dmcu_regs +ffffffff82c66504 r dmcu_shift +ffffffff82c66518 r dmcu_mask +ffffffff82c66564 r abm_regs +ffffffff82c665cc r abm_shift +ffffffff82c665f0 r abm_mask +ffffffff82c66680 r dce112_tg_offsets +ffffffff82c666c8 r res_create_funcs +ffffffff82c666f8 r plane_cap +ffffffff82c66724 r polaris_11_resource_cap +ffffffff82c66760 r polaris_10_resource_cap +ffffffff82c667a0 r panel_cntl_regs +ffffffff82c667c0 r panel_cntl_shift +ffffffff82c667d0 r panel_cntl_mask +ffffffff82c66810 r link_enc_regs +ffffffff82c66bd0 r link_enc_aux_regs +ffffffff82c66c20 r link_enc_hpd_regs +ffffffff82c66c38 r link_enc_feature +ffffffff82c66c48 r cs_shift +ffffffff82c66c54 r cs_mask +ffffffff82c66c80 r mi_regs +ffffffff82c66f98 r mi_shifts +ffffffff82c66fe0 r mi_masks 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panel_cntl_regs +ffffffff82c6e690 r panel_cntl_shift +ffffffff82c6e6a0 r panel_cntl_mask +ffffffff82c6e6e0 r link_enc_regs +ffffffff82c6eaa0 r link_enc_aux_regs +ffffffff82c6eaf0 r link_enc_hpd_regs +ffffffff82c6eb08 r link_enc_feature +ffffffff82c6eb18 r cs_shift +ffffffff82c6eb24 r cs_mask +ffffffff82c6eb50 r mi_regs +ffffffff82c6ee68 r mi_shifts +ffffffff82c6eeb0 r mi_masks +ffffffff82c6efd0 r ipp_regs +ffffffff82c6f1c8 r ipp_shift +ffffffff82c6f1f0 r ipp_mask +ffffffff82c6f290 r xfm_regs +ffffffff82c6f830 r xfm_shift +ffffffff82c6f890 r xfm_mask +ffffffff82c6fa10 r opp_regs +ffffffff82c6fb60 r opp_shift +ffffffff82c6fb8c r opp_mask +ffffffff82c6fc40 r aux_engine_regs +ffffffff82c6fd30 r aux_mask +ffffffff82c6fd90 r aux_shift +ffffffff82c6fdb0 r i2c_hw_regs +ffffffff82c6ff00 r i2c_shifts +ffffffff82c6ff2c r i2c_masks +ffffffff82c6ffd0 r audio_regs +ffffffff82c70104 r audio_shift +ffffffff82c7011c r audio_mask +ffffffff82c70160 r stream_enc_regs +ffffffff82c7080c r se_shift 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r le_mask +ffffffff82c984e0 r stream_enc_regs +ffffffff82c98cd8 r se_shift +ffffffff82c98db4 r se_mask +ffffffff82c99120 r hwseq_reg +ffffffff82c9933c r hwseq_shift +ffffffff82c993bc r hwseq_mask +ffffffff82c995b0 r dsc_regs +ffffffff82c99a48 r dsc_shift +ffffffff82c99b00 r dsc_mask +ffffffff82c99de0 r hubp_regs +ffffffff82c9aa28 r hubp_shift +ffffffff82c9ab24 r hubp_mask +ffffffff82c9af20 r dwbc20_regs +ffffffff82c9afd8 r dwbc20_shift +ffffffff82c9b058 r dwbc20_mask +ffffffff82c9b250 r mcif_wb20_regs +ffffffff82c9b330 r mcif_wb20_shift +ffffffff82c9b3d0 r mcif_wb20_mask +ffffffff82c9b650 r link_enc_feature +ffffffff82c9b660 r bios_regs +ffffffff82c9b668 r dcn20_res_pool_funcs +ffffffff82c9b760 r res_cap_nv14 +ffffffff82c9b7a0 r debug_defaults_drv +ffffffff82c9b950 r clk_src_regs +ffffffff82c9bb48 r dccg_regs +ffffffff82c9bc38 r dccg_shift +ffffffff82c9bcd8 r dccg_mask +ffffffff82c9bf4c r dmcu_regs +ffffffff82c9bfa8 r dmcu_shift +ffffffff82c9bfbc r dmcu_mask +ffffffff82c9c008 r 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abm_shift +ffffffff82ccf8d4 r abm_mask +ffffffff82ccf960 r res_create_funcs +ffffffff82ccf990 r plane_cap +ffffffff82ccf9c0 r panel_cntl_regs +ffffffff82ccfa00 r panel_cntl_shift +ffffffff82ccfa10 r panel_cntl_mask +ffffffff82ccfa50 r link_enc_regs +ffffffff82ccff60 r link_enc_aux_regs +ffffffff82ccffa0 r link_enc_hpd_regs +ffffffff82ccffb0 r le_shift +ffffffff82cd00a0 r le_mask +ffffffff82cd0458 r link_enc_feature +ffffffff82cd0468 r cs_shift +ffffffff82cd0474 r cs_mask +ffffffff82cd049c r hubbub_reg +ffffffff82cd0624 r hubbub_shift +ffffffff82cd06b4 r hubbub_mask +ffffffff82cd08f0 r vmid_regs +ffffffff82cd0ab0 r vmid_shifts +ffffffff82cd0ab8 r vmid_masks +ffffffff82cd0ae0 r hubp_regs +ffffffff82cd1310 r hubp_shift +ffffffff82cd140c r hubp_mask +ffffffff82cd1800 r dpp_regs +ffffffff82cd2d10 r tf_shift +ffffffff82cd2fe4 r tf_mask +ffffffff82cd3b30 r opp_regs +ffffffff82cd3c90 r opp_shift +ffffffff82cd3cc8 r opp_mask +ffffffff82cd3da0 r optc_regs +ffffffff82cd4340 r optc_shift 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vmid_masks +ffffffff82cdad20 r hubp_regs +ffffffff82cdb75c r hubp_shift +ffffffff82cdb858 r hubp_mask +ffffffff82cdbc50 r dpp_regs +ffffffff82cdd6a4 r tf_shift +ffffffff82cdd978 r tf_mask +ffffffff82cde4c0 r opp_regs +ffffffff82cde678 r opp_shift +ffffffff82cde6b0 r opp_mask +ffffffff82cde790 r optc_regs +ffffffff82cdee98 r optc_shift +ffffffff82cdef6c r optc_mask +ffffffff82cdf2b4 r mpc_regs +ffffffff82ce0aa0 r mpc_shift +ffffffff82ce0b7c r mpc_mask +ffffffff82ce0ef0 r dsc_regs +ffffffff82ce12c4 r dsc_shift +ffffffff82ce137c r dsc_mask +ffffffff82ce1660 r dwbc30_regs +ffffffff82ce183c r dwbc30_shift +ffffffff82ce1970 r dwbc30_mask +ffffffff82ce1e40 r mcif_wb30_regs +ffffffff82ce1f3c r mcif_wb30_shift +ffffffff82ce1fe8 r mcif_wb30_mask +ffffffff82ce22a0 r aux_engine_regs +ffffffff82ce2368 r aux_mask +ffffffff82ce23c8 r aux_shift +ffffffff82ce23e0 r i2c_hw_regs +ffffffff82ce24f8 r i2c_shifts +ffffffff82ce2524 r i2c_masks +ffffffff82ce25d0 r audio_regs +ffffffff82ce2704 r audio_shift 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mcif_wb30_regs +ffffffff82ceab6c r mcif_wb30_shift +ffffffff82ceac18 r mcif_wb30_mask +ffffffff82ceaed0 r aux_engine_regs +ffffffff82ceaf20 r aux_mask +ffffffff82ceaf80 r aux_shift +ffffffff82ceafa0 r i2c_hw_regs +ffffffff82ceb010 r i2c_shifts +ffffffff82ceb03c r i2c_masks +ffffffff82ceb0e0 r audio_regs +ffffffff82ceb214 r audio_shift +ffffffff82ceb22c r audio_mask +ffffffff82ceb270 r stream_enc_regs +ffffffff82ceb518 r se_shift +ffffffff82ceb5f4 r se_mask +ffffffff82ceb960 r vpg_regs +ffffffff82ceb99c r vpg_shift +ffffffff82ceb9c4 r vpg_mask +ffffffff82ceba60 r afmt_regs +ffffffff82cebacc r afmt_shift +ffffffff82cebae0 r afmt_mask +ffffffff82cebb24 r hwseq_reg +ffffffff82cebd40 r hwseq_shift +ffffffff82cebdc0 r hwseq_mask +ffffffff82cec000 r dccg31_funcs +ffffffff82ced000 r dcn31_link_enc_funcs +ffffffff82cee000 r dcn30_str_enc_funcs +ffffffff82cef000 r hubbub31_funcs +ffffffff82cf0000 r dcn31_funcs +ffffffff82cf02e8 r dcn31_private_funcs +ffffffff82cf1000 r dcn31_link_panel_cntl_funcs +ffffffff82cf2000 r bios_regs +ffffffff82cf2008 r res_cap_dcn31 +ffffffff82cf2050 r clk_src_regs +ffffffff82cf2200 r clk_src_regs_b0 +ffffffff82cf23a4 r dccg_regs +ffffffff82cf2494 r dccg_shift +ffffffff82cf2534 r dccg_mask +ffffffff82cf27b0 r abm_regs +ffffffff82cf2950 r abm_shift +ffffffff82cf2974 r abm_mask +ffffffff82cf2a00 r res_create_funcs +ffffffff82cf2a30 r plane_cap +ffffffff82cf2a60 r link_enc_regs +ffffffff82cf30c0 r link_enc_aux_regs +ffffffff82cf3110 r link_enc_hpd_regs +ffffffff82cf3124 r le_shift +ffffffff82cf3214 r le_mask +ffffffff82cf35cc r link_enc_feature +ffffffff82cf35dc r panel_config_defaults +ffffffff82cf3630 r debug_defaults_drv +ffffffff82cf37d8 r cs_shift +ffffffff82cf37e4 r cs_mask +ffffffff82cf380c r hubbub_reg +ffffffff82cf3994 r hubbub_shift +ffffffff82cf3a24 r hubbub_mask +ffffffff82cf3c60 r vmid_regs +ffffffff82cf3e20 r vmid_shifts +ffffffff82cf3e28 r vmid_masks +ffffffff82cf3e50 r hubp_regs +ffffffff82cf4680 r hubp_shift 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optc_regs +ffffffff82d066a0 r optc_shift +ffffffff82d06774 r optc_mask +ffffffff82d06abc r mpc_regs +ffffffff82d082a8 r mpc_shift +ffffffff82d08384 r mpc_mask +ffffffff82d086f0 r dsc_regs +ffffffff82d08a00 r dsc_shift +ffffffff82d08ab8 r dsc_mask +ffffffff82d08d90 r dwbc30_regs +ffffffff82d08f6c r dwbc30_shift +ffffffff82d090a0 r dwbc30_mask +ffffffff82d09570 r mcif_wb30_regs +ffffffff82d0966c r mcif_wb30_shift +ffffffff82d09718 r mcif_wb30_mask +ffffffff82d099d0 r aux_engine_regs +ffffffff82d09a98 r aux_mask +ffffffff82d09af8 r aux_shift +ffffffff82d09b10 r i2c_hw_regs +ffffffff82d09c28 r i2c_shifts +ffffffff82d09c54 r i2c_masks +ffffffff82d09d00 r audio_regs +ffffffff82d09e34 r audio_shift +ffffffff82d09e4c r audio_mask +ffffffff82d09e90 r stream_enc_regs +ffffffff82d0a534 r se_shift +ffffffff82d0a610 r se_mask +ffffffff82d0a980 r vpg_regs +ffffffff82d0aa70 r vpg_shift +ffffffff82d0aa98 r vpg_mask +ffffffff82d0ab40 r afmt_regs +ffffffff82d0ac18 r afmt_shift +ffffffff82d0ac2c r afmt_mask +ffffffff82d0ac80 r hpo_dp_stream_enc_regs +ffffffff82d0aeb0 r hpo_dp_se_shift +ffffffff82d0aed8 r hpo_dp_se_mask +ffffffff82d0af80 r apg_regs +ffffffff82d0afc0 r apg_shift +ffffffff82d0afc8 r apg_mask +ffffffff82d0afe0 r hpo_dp_link_enc_regs +ffffffff82d0b0f0 r hpo_dp_le_shift +ffffffff82d0b10c r hpo_dp_le_mask +ffffffff82d0b170 r hwseq_reg +ffffffff82d0b38c r hwseq_shift +ffffffff82d0b40c r hwseq_mask +ffffffff82d0c000 r bios_regs +ffffffff82d0c008 r res_cap_dcn31 +ffffffff82d0c050 r clk_src_regs +ffffffff82d0c1f4 r dccg_regs +ffffffff82d0c2e4 r dccg_shift +ffffffff82d0c384 r dccg_mask +ffffffff82d0c600 r abm_regs +ffffffff82d0c7a0 r abm_shift +ffffffff82d0c7c4 r abm_mask +ffffffff82d0c850 r res_create_funcs +ffffffff82d0c880 r plane_cap +ffffffff82d0c8b0 r link_enc_regs +ffffffff82d0cf10 r link_enc_aux_regs +ffffffff82d0cf60 r link_enc_hpd_regs +ffffffff82d0cf74 r le_shift +ffffffff82d0d064 r le_mask +ffffffff82d0d41c r link_enc_feature +ffffffff82d0d42c r panel_config_defaults +ffffffff82d0d480 r debug_defaults_drv +ffffffff82d0d628 r cs_shift +ffffffff82d0d634 r cs_mask +ffffffff82d0d65c r hubbub_reg +ffffffff82d0d7e4 r hubbub_shift +ffffffff82d0d874 r hubbub_mask +ffffffff82d0dab0 r vmid_regs +ffffffff82d0dc70 r vmid_shifts +ffffffff82d0dc78 r vmid_masks +ffffffff82d0dca0 r hubp_regs +ffffffff82d0e4d0 r hubp_shift +ffffffff82d0e5cc r hubp_mask +ffffffff82d0e9c0 r dpp_regs +ffffffff82d0fed0 r tf_shift +ffffffff82d101a4 r tf_mask +ffffffff82d10cf0 r opp_regs +ffffffff82d10e50 r opp_shift +ffffffff82d10e88 r opp_mask +ffffffff82d10f60 r optc_regs +ffffffff82d11500 r optc_shift +ffffffff82d115d4 r optc_mask +ffffffff82d1191c r mpc_regs +ffffffff82d13108 r mpc_shift +ffffffff82d131e4 r mpc_mask +ffffffff82d13550 r dsc_regs +ffffffff82d1379c r dsc_shift +ffffffff82d13854 r dsc_mask +ffffffff82d13b30 r dwbc30_regs +ffffffff82d13d0c r dwbc30_shift +ffffffff82d13e40 r dwbc30_mask +ffffffff82d14310 r mcif_wb30_regs +ffffffff82d1440c r mcif_wb30_shift +ffffffff82d144b8 r mcif_wb30_mask +ffffffff82d14770 r aux_engine_regs +ffffffff82d14838 r aux_mask +ffffffff82d14898 r aux_shift +ffffffff82d148b0 r i2c_hw_regs +ffffffff82d149c8 r i2c_shifts +ffffffff82d149f4 r i2c_masks +ffffffff82d14aa0 r audio_regs +ffffffff82d14bd4 r audio_shift +ffffffff82d14bec r audio_mask +ffffffff82d14c30 r stream_enc_regs +ffffffff82d152d4 r se_shift +ffffffff82d153b0 r se_mask +ffffffff82d15720 r vpg_regs +ffffffff82d15810 r vpg_shift +ffffffff82d15838 r vpg_mask +ffffffff82d158e0 r afmt_regs +ffffffff82d159b8 r afmt_shift +ffffffff82d159cc r afmt_mask +ffffffff82d15a20 r hpo_dp_stream_enc_regs +ffffffff82d15c50 r hpo_dp_se_shift +ffffffff82d15c78 r hpo_dp_se_mask +ffffffff82d15d20 r apg_regs +ffffffff82d15d60 r apg_shift +ffffffff82d15d68 r apg_mask +ffffffff82d15d80 r hpo_dp_link_enc_regs +ffffffff82d15e90 r hpo_dp_le_shift +ffffffff82d15eac r hpo_dp_le_mask +ffffffff82d15f10 r hwseq_reg +ffffffff82d1612c r hwseq_shift +ffffffff82d161ac r hwseq_mask +ffffffff82d17000 r bios_regs +ffffffff82d17008 r res_cap_dcn31 +ffffffff82d17050 r clk_src_regs +ffffffff82d171f4 r dccg_regs +ffffffff82d172e4 r dccg_shift +ffffffff82d17384 r dccg_mask +ffffffff82d17600 r abm_regs +ffffffff82d177a0 r abm_shift +ffffffff82d177c4 r abm_mask +ffffffff82d17850 r res_create_funcs +ffffffff82d17880 r plane_cap +ffffffff82d178b0 r link_enc_regs +ffffffff82d17f10 r link_enc_aux_regs +ffffffff82d17f60 r link_enc_hpd_regs +ffffffff82d17f74 r le_shift +ffffffff82d18064 r le_mask +ffffffff82d1841c r link_enc_feature +ffffffff82d1842c r panel_config_defaults +ffffffff82d18480 r debug_defaults_drv +ffffffff82d18628 r cs_shift +ffffffff82d18634 r cs_mask +ffffffff82d1865c r hubbub_reg +ffffffff82d187e4 r hubbub_shift +ffffffff82d18874 r hubbub_mask +ffffffff82d18ab0 r vmid_regs +ffffffff82d18c70 r vmid_shifts +ffffffff82d18c78 r vmid_masks +ffffffff82d18ca0 r hubp_regs +ffffffff82d194d0 r hubp_shift +ffffffff82d195cc r hubp_mask +ffffffff82d199c0 r dpp_regs +ffffffff82d1aed0 r tf_shift +ffffffff82d1b1a4 r tf_mask +ffffffff82d1bcf0 r opp_regs +ffffffff82d1be50 r opp_shift +ffffffff82d1be88 r opp_mask +ffffffff82d1bf60 r optc_regs +ffffffff82d1c500 r optc_shift +ffffffff82d1c5d4 r optc_mask +ffffffff82d1c91c r mpc_regs +ffffffff82d1e108 r mpc_shift +ffffffff82d1e1e4 r mpc_mask +ffffffff82d1e550 r dsc_regs +ffffffff82d1e79c r dsc_shift +ffffffff82d1e854 r dsc_mask +ffffffff82d1eb30 r dwbc30_regs +ffffffff82d1ed0c r dwbc30_shift +ffffffff82d1ee40 r dwbc30_mask +ffffffff82d1f310 r mcif_wb30_regs +ffffffff82d1f40c r mcif_wb30_shift +ffffffff82d1f4b8 r mcif_wb30_mask +ffffffff82d1f770 r aux_engine_regs +ffffffff82d1f838 r aux_mask +ffffffff82d1f898 r aux_shift +ffffffff82d1f8b0 r i2c_hw_regs +ffffffff82d1f9c8 r i2c_shifts +ffffffff82d1f9f4 r i2c_masks +ffffffff82d1faa0 r audio_regs +ffffffff82d1fbd4 r audio_shift +ffffffff82d1fbec r audio_mask +ffffffff82d1fc30 r stream_enc_regs +ffffffff82d202d4 r se_shift +ffffffff82d203b0 r se_mask +ffffffff82d20720 r vpg_regs +ffffffff82d20810 r vpg_shift +ffffffff82d20838 r vpg_mask +ffffffff82d208e0 r afmt_regs +ffffffff82d209b8 r afmt_shift +ffffffff82d209cc r afmt_mask +ffffffff82d20a20 r hpo_dp_stream_enc_regs +ffffffff82d20c50 r hpo_dp_se_shift +ffffffff82d20c78 r hpo_dp_se_mask +ffffffff82d20d20 r apg_regs +ffffffff82d20d60 r apg_shift +ffffffff82d20d68 r apg_mask +ffffffff82d20d80 r hpo_dp_link_enc_regs +ffffffff82d20e90 r hpo_dp_le_shift +ffffffff82d20eac r hpo_dp_le_mask +ffffffff82d20f10 r hwseq_reg +ffffffff82d2112c r hwseq_shift +ffffffff82d211ac r hwseq_mask +ffffffff82d22000 r dccg32_funcs +ffffffff82d23000 r dcn32_link_enc_funcs +ffffffff82d24000 r dcn32_str_enc_funcs +ffffffff82d25000 r hubbub32_funcs +ffffffff82d26000 r dcn32_funcs +ffffffff82d262e8 r dcn32_private_funcs +ffffffff82d27000 r dcn32_mmhubbub_funcs +ffffffff82d28000 r dcn32_mpc_funcs +ffffffff82d29000 r res_cap_dcn32 +ffffffff82d2903c r dccg_shift +ffffffff82d290dc r dccg_mask +ffffffff82d29350 r abm_shift +ffffffff82d29374 r abm_mask +ffffffff82d29400 r res_create_funcs +ffffffff82d29430 r plane_cap +ffffffff82d2945c r le_shift +ffffffff82d2954c r le_mask +ffffffff82d29904 r link_enc_feature +ffffffff82d29918 r debug_defaults_drv +ffffffff82d29ac0 r cs_shift +ffffffff82d29acc r cs_mask +ffffffff82d29af4 r hubbub_shift +ffffffff82d29b84 r hubbub_mask +ffffffff82d29dbc r vmid_shifts +ffffffff82d29dc4 r vmid_masks +ffffffff82d29de4 r hubp_shift +ffffffff82d29ee0 r hubp_mask +ffffffff82d2a2d0 r tf_shift +ffffffff82d2a5a4 r tf_mask +ffffffff82d2b0e8 r opp_shift +ffffffff82d2b120 r opp_mask +ffffffff82d2b1f4 r optc_shift +ffffffff82d2b2c8 r optc_mask +ffffffff82d2b610 r mpc_shift +ffffffff82d2b6ec r mpc_mask +ffffffff82d2ba58 r dsc_shift +ffffffff82d2bb10 r dsc_mask +ffffffff82d2bde8 r dwbc30_shift +ffffffff82d2bf1c r dwbc30_mask +ffffffff82d2c3e4 r mcif_wb30_shift +ffffffff82d2c490 r mcif_wb30_mask +ffffffff82d2c73c r aux_mask +ffffffff82d2c79c r aux_shift +ffffffff82d2c7b4 r i2c_shifts +ffffffff82d2c7e0 r i2c_masks +ffffffff82d2c884 r audio_shift +ffffffff82d2c89c r audio_mask +ffffffff82d2c8d8 r se_shift +ffffffff82d2c9b4 r se_mask +ffffffff82d2cd20 r vpg_shift +ffffffff82d2cd48 r vpg_mask +ffffffff82d2cddc r afmt_shift +ffffffff82d2cdf0 r afmt_mask +ffffffff82d2ce34 r hpo_dp_se_shift +ffffffff82d2ce5c r hpo_dp_se_mask +ffffffff82d2cefc r apg_shift +ffffffff82d2cf04 r apg_mask +ffffffff82d2cf1c r hpo_dp_le_shift +ffffffff82d2cf38 r hpo_dp_le_mask +ffffffff82d2cf9c r hwseq_shift +ffffffff82d2d01c r hwseq_mask +ffffffff82d2e000 r dcn321_link_enc_funcs +ffffffff82d2f000 r res_cap_dcn321 +ffffffff82d2f03c r dccg_shift +ffffffff82d2f0dc r dccg_mask +ffffffff82d2f350 r abm_shift +ffffffff82d2f374 r abm_mask +ffffffff82d2f400 r res_create_funcs +ffffffff82d2f430 r plane_cap +ffffffff82d2f45c r le_shift +ffffffff82d2f54c r le_mask +ffffffff82d2f904 r link_enc_feature +ffffffff82d2f918 r debug_defaults_drv +ffffffff82d2fac0 r cs_shift +ffffffff82d2facc r cs_mask +ffffffff82d2faf4 r hubbub_shift +ffffffff82d2fb84 r hubbub_mask +ffffffff82d2fdbc r vmid_shifts +ffffffff82d2fdc4 r vmid_masks +ffffffff82d2fde4 r hubp_shift +ffffffff82d2fee0 r hubp_mask +ffffffff82d302d0 r tf_shift +ffffffff82d305a4 r tf_mask +ffffffff82d310e8 r opp_shift +ffffffff82d31120 r opp_mask +ffffffff82d311f4 r optc_shift +ffffffff82d312c8 r optc_mask +ffffffff82d31610 r mpc_shift +ffffffff82d316ec r mpc_mask +ffffffff82d31a58 r dsc_shift +ffffffff82d31b10 r dsc_mask +ffffffff82d31de8 r dwbc30_shift +ffffffff82d31f1c r dwbc30_mask +ffffffff82d323e4 r mcif_wb30_shift +ffffffff82d32490 r mcif_wb30_mask +ffffffff82d3273c r aux_mask +ffffffff82d3279c r aux_shift +ffffffff82d327b4 r i2c_shifts +ffffffff82d327e0 r i2c_masks +ffffffff82d32884 r audio_shift +ffffffff82d3289c r audio_mask +ffffffff82d328d8 r se_shift +ffffffff82d329b4 r se_mask +ffffffff82d32d20 r vpg_shift +ffffffff82d32d48 r vpg_mask +ffffffff82d32ddc r afmt_shift +ffffffff82d32df0 r afmt_mask +ffffffff82d32e34 r hpo_dp_se_shift +ffffffff82d32e5c r hpo_dp_se_mask +ffffffff82d32efc r apg_shift +ffffffff82d32f04 r apg_mask +ffffffff82d32f1c r hpo_dp_le_shift +ffffffff82d32f38 r hpo_dp_le_mask +ffffffff82d32f9c r hwseq_shift +ffffffff82d3301c r hwseq_mask +ffffffff82d35000 R dcn10_soc_defaults +ffffffff82d3508c R dcn10_ip_defaults +ffffffff82d41000 r dml20_funcs +ffffffff82d41030 r dml20v2_funcs +ffffffff82d41060 r dml21_funcs +ffffffff82d41090 r dml30_funcs +ffffffff82d410c0 r dml31_funcs +ffffffff82d410f0 r dml314_funcs +ffffffff82d41120 r dml32_funcs +ffffffff82d44000 r qp_table_444_8bpc_max +ffffffff82d44940 r qp_table_444_8bpc_min +ffffffff82d45280 r qp_table_444_10bpc_max +ffffffff82d45ec0 r qp_table_444_10bpc_min +ffffffff82d46b00 r qp_table_444_12bpc_max +ffffffff82d47a40 r qp_table_444_12bpc_min +ffffffff82d48980 r qp_table_422_8bpc_max +ffffffff82d48ec0 r qp_table_422_8bpc_min +ffffffff82d49400 r qp_table_422_10bpc_max +ffffffff82d49b40 r qp_table_422_10bpc_min +ffffffff82d4a280 r qp_table_422_12bpc_max +ffffffff82d4abc0 r qp_table_422_12bpc_min +ffffffff82d4b500 r qp_table_420_8bpc_max +ffffffff82d4b940 r qp_table_420_8bpc_min +ffffffff82d4bd80 r qp_table_420_10bpc_max +ffffffff82d4c340 r qp_table_420_10bpc_min +ffffffff82d4c900 r qp_table_420_12bpc_max +ffffffff82d4d040 r qp_table_420_12bpc_min +ffffffff82d4f000 r funcs +ffffffff82d4f050 r hpd_regs +ffffffff82d4f1a0 r hpd_shift +ffffffff82d4f1b0 r hpd_mask +ffffffff82d4f1c0 r ddc_data_regs +ffffffff82d4f3a0 r ddc_clk_regs +ffffffff82d4f580 r ddc_shift +ffffffff82d4f5a8 r ddc_mask ffffffff82d50000 r funcs -ffffffff82d50050 r hpd_regs -ffffffff82d501a0 r hpd_shift -ffffffff82d501b0 r hpd_mask -ffffffff82d501c0 r ddc_data_regs -ffffffff82d503a0 r ddc_clk_regs -ffffffff82d50580 r ddc_shift -ffffffff82d505a8 r ddc_mask ffffffff82d51000 r funcs +ffffffff82d51050 r hpd_regs +ffffffff82d511a0 r hpd_shift +ffffffff82d511b0 r hpd_mask +ffffffff82d511c0 r ddc_data_regs +ffffffff82d513a0 r ddc_clk_regs +ffffffff82d51580 r ddc_shift +ffffffff82d515a8 r ddc_mask ffffffff82d52000 r funcs -ffffffff82d52050 r hpd_regs -ffffffff82d521a0 r hpd_shift -ffffffff82d521b0 r hpd_mask -ffffffff82d521c0 r ddc_data_regs -ffffffff82d523a0 r ddc_clk_regs -ffffffff82d52580 r ddc_shift -ffffffff82d525a8 r ddc_mask ffffffff82d53000 r funcs +ffffffff82d53050 r hpd_regs +ffffffff82d531a0 r hpd_shift +ffffffff82d531b0 r hpd_mask +ffffffff82d531c0 r ddc_data_regs +ffffffff82d533a0 r ddc_clk_regs +ffffffff82d53580 r ddc_shift +ffffffff82d535a8 r ddc_mask ffffffff82d54000 r funcs -ffffffff82d54050 r hpd_regs -ffffffff82d541a0 r hpd_shift -ffffffff82d541b0 r hpd_mask -ffffffff82d541c0 r ddc_data_regs -ffffffff82d543a0 r ddc_clk_regs -ffffffff82d54580 r ddc_shift -ffffffff82d545a8 r ddc_mask ffffffff82d55000 r funcs +ffffffff82d55050 r hpd_regs +ffffffff82d551a0 r hpd_shift +ffffffff82d551b0 r hpd_mask +ffffffff82d551c0 r ddc_data_regs +ffffffff82d553a0 r ddc_clk_regs +ffffffff82d55580 r ddc_shift +ffffffff82d555a8 r ddc_mask +ffffffff82d555d0 r generic_regs +ffffffff82d55640 r generic_shift +ffffffff82d55650 r generic_mask ffffffff82d56000 r funcs -ffffffff82d56050 r hpd_regs -ffffffff82d561a0 r hpd_shift -ffffffff82d561b0 r hpd_mask -ffffffff82d561c0 r ddc_data_regs -ffffffff82d563a0 r ddc_clk_regs -ffffffff82d56580 r ddc_shift -ffffffff82d565a8 r ddc_mask -ffffffff82d565d0 r generic_regs -ffffffff82d56640 r generic_shift -ffffffff82d56650 r generic_mask ffffffff82d57000 r funcs +ffffffff82d57050 r hpd_regs +ffffffff82d571a0 r hpd_shift +ffffffff82d571b0 r hpd_mask +ffffffff82d571c0 r ddc_data_regs_dcn +ffffffff82d57370 r ddc_clk_regs_dcn +ffffffff82d57520 r ddc_shift +ffffffff82d57640 r ddc_mask +ffffffff82d57760 r generic_regs +ffffffff82d577d0 r generic_shift +ffffffff82d577e0 r generic_mask ffffffff82d58000 r funcs -ffffffff82d58050 r hpd_regs -ffffffff82d581a0 r hpd_shift -ffffffff82d581b0 r hpd_mask -ffffffff82d581c0 r ddc_data_regs_dcn -ffffffff82d58370 r ddc_clk_regs_dcn -ffffffff82d58520 r ddc_shift -ffffffff82d58640 r ddc_mask -ffffffff82d58760 r generic_regs -ffffffff82d587d0 r generic_shift -ffffffff82d587e0 r generic_mask ffffffff82d59000 r funcs +ffffffff82d59050 r hpd_regs +ffffffff82d59168 r hpd_shift +ffffffff82d59178 r hpd_mask +ffffffff82d59190 r ddc_data_regs_dcn +ffffffff82d592c0 r ddc_clk_regs_dcn +ffffffff82d593f0 r ddc_shift +ffffffff82d594e0 r ddc_mask +ffffffff82d595d0 r generic_regs +ffffffff82d59604 r generic_shift +ffffffff82d5960c r generic_mask ffffffff82d5a000 r funcs -ffffffff82d5a050 r hpd_regs -ffffffff82d5a168 r hpd_shift -ffffffff82d5a178 r hpd_mask -ffffffff82d5a190 r ddc_data_regs_dcn -ffffffff82d5a2c0 r ddc_clk_regs_dcn -ffffffff82d5a3f0 r ddc_shift -ffffffff82d5a4e0 r ddc_mask -ffffffff82d5a5d0 r generic_regs -ffffffff82d5a604 r generic_shift -ffffffff82d5a60c r generic_mask ffffffff82d5b000 r funcs +ffffffff82d5b050 r hpd_regs +ffffffff82d5b1a0 r hpd_shift +ffffffff82d5b1b0 r hpd_mask +ffffffff82d5b1c0 r ddc_data_regs_dcn +ffffffff82d5b370 r ddc_clk_regs_dcn +ffffffff82d5b520 r ddc_shift +ffffffff82d5b640 r ddc_mask +ffffffff82d5b760 r generic_regs +ffffffff82d5b7d0 r generic_shift +ffffffff82d5b7e0 r generic_mask ffffffff82d5c000 r funcs -ffffffff82d5c050 r hpd_regs -ffffffff82d5c1a0 r hpd_shift -ffffffff82d5c1b0 r hpd_mask -ffffffff82d5c1c0 r ddc_data_regs_dcn -ffffffff82d5c370 r ddc_clk_regs_dcn -ffffffff82d5c520 r ddc_shift -ffffffff82d5c640 r ddc_mask -ffffffff82d5c760 r generic_regs -ffffffff82d5c7d0 r generic_shift -ffffffff82d5c7e0 r generic_mask ffffffff82d5d000 r funcs +ffffffff82d5d050 r hpd_regs +ffffffff82d5d168 r hpd_shift +ffffffff82d5d178 r hpd_mask +ffffffff82d5d190 r ddc_data_regs_dcn +ffffffff82d5d300 r ddc_clk_regs_dcn +ffffffff82d5d470 r ddc_shift +ffffffff82d5d560 r ddc_mask +ffffffff82d5d650 r generic_regs +ffffffff82d5d6c0 r generic_shift +ffffffff82d5d6d0 r generic_mask ffffffff82d5e000 r funcs -ffffffff82d5e050 r hpd_regs -ffffffff82d5e168 r hpd_shift -ffffffff82d5e178 r hpd_mask -ffffffff82d5e190 r ddc_data_regs_dcn -ffffffff82d5e300 r ddc_clk_regs_dcn -ffffffff82d5e470 r ddc_shift -ffffffff82d5e560 r ddc_mask -ffffffff82d5e650 r generic_regs -ffffffff82d5e6c0 r generic_shift -ffffffff82d5e6d0 r generic_mask ffffffff82d5f000 r funcs +ffffffff82d5f050 r hpd_regs +ffffffff82d5f168 r hpd_shift +ffffffff82d5f178 r hpd_mask +ffffffff82d5f190 r ddc_data_regs_dcn +ffffffff82d5f340 r ddc_clk_regs_dcn +ffffffff82d5f4f0 r ddc_shift +ffffffff82d5f610 r ddc_mask +ffffffff82d5f730 r generic_regs +ffffffff82d5f7a0 r generic_shift +ffffffff82d5f7b0 r generic_mask ffffffff82d60000 r funcs -ffffffff82d60050 r hpd_regs -ffffffff82d60168 r hpd_shift -ffffffff82d60178 r hpd_mask -ffffffff82d60190 r ddc_data_regs_dcn -ffffffff82d60340 r ddc_clk_regs_dcn -ffffffff82d604f0 r ddc_shift -ffffffff82d60610 r ddc_mask -ffffffff82d60730 r generic_regs -ffffffff82d607a0 r generic_shift -ffffffff82d607b0 r generic_mask ffffffff82d61000 r funcs ffffffff82d62000 r funcs ffffffff82d63000 r funcs -ffffffff82d64000 r funcs -ffffffff82d65000 r hdmi_14_protection -ffffffff82d65010 r dp_11_protection -ffffffff82d65020 r hdcp_i2c_offsets -ffffffff82d65050 r hdcp_dpcd_addrs -ffffffff82d66000 r irq_service_funcs_dce110 -ffffffff82d66008 r dummy_irq_info_funcs -ffffffff82d66018 r hpd_irq_info_funcs -ffffffff82d66028 r hpd_rx_irq_info_funcs -ffffffff82d66038 r pflip_irq_info_funcs -ffffffff82d66048 r vupdate_irq_info_funcs -ffffffff82d66058 r vblank_irq_info_funcs -ffffffff82d66070 r irq_source_info_dce110 -ffffffff82d68000 r irq_service_funcs_dce120 -ffffffff82d68008 r dummy_irq_info_funcs -ffffffff82d68018 r hpd_irq_info_funcs -ffffffff82d68028 r hpd_rx_irq_info_funcs -ffffffff82d68038 r pflip_irq_info_funcs -ffffffff82d68048 r vupdate_irq_info_funcs -ffffffff82d68058 r vblank_irq_info_funcs -ffffffff82d68070 r irq_source_info_dce120 -ffffffff82d6a000 r irq_service_funcs_dce80 -ffffffff82d6a008 r dummy_irq_info_funcs -ffffffff82d6a018 r hpd_irq_info_funcs -ffffffff82d6a028 r hpd_rx_irq_info_funcs -ffffffff82d6a038 r pflip_irq_info_funcs -ffffffff82d6a048 r vupdate_irq_info_funcs -ffffffff82d6a058 r vblank_irq_info_funcs -ffffffff82d6a070 r irq_source_info_dce80 -ffffffff82d6c000 r irq_service_funcs_dcn10 -ffffffff82d6c008 r dummy_irq_info_funcs -ffffffff82d6c018 r hpd_irq_info_funcs -ffffffff82d6c028 r hpd_rx_irq_info_funcs -ffffffff82d6c038 r pflip_irq_info_funcs -ffffffff82d6c048 r vupdate_no_lock_irq_info_funcs -ffffffff82d6c058 r vblank_irq_info_funcs -ffffffff82d6c068 r vline0_irq_info_funcs -ffffffff82d6c080 r irq_source_info_dcn10 -ffffffff82d6e000 r irq_service_funcs_dcn20 -ffffffff82d6e008 r dummy_irq_info_funcs -ffffffff82d6e018 r hpd_irq_info_funcs -ffffffff82d6e028 r hpd_rx_irq_info_funcs -ffffffff82d6e038 r pflip_irq_info_funcs -ffffffff82d6e048 r vupdate_no_lock_irq_info_funcs -ffffffff82d6e058 r vblank_irq_info_funcs -ffffffff82d6e068 r vline0_irq_info_funcs -ffffffff82d6e080 r irq_source_info_dcn20 -ffffffff82d70000 r irq_service_funcs_dcn201 -ffffffff82d70008 r dummy_irq_info_funcs -ffffffff82d70018 r hpd_irq_info_funcs -ffffffff82d70028 r hpd_rx_irq_info_funcs -ffffffff82d70038 r pflip_irq_info_funcs -ffffffff82d70048 r vupdate_no_lock_irq_info_funcs -ffffffff82d70058 r vblank_irq_info_funcs -ffffffff82d70068 r vline0_irq_info_funcs -ffffffff82d70080 r irq_source_info_dcn201 -ffffffff82d72000 r irq_source_info_dcn21 -ffffffff82d73290 r irq_service_funcs_dcn21 -ffffffff82d73298 r dummy_irq_info_funcs -ffffffff82d732a8 r hpd_irq_info_funcs -ffffffff82d732b8 r hpd_rx_irq_info_funcs -ffffffff82d732c8 r pflip_irq_info_funcs -ffffffff82d732d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d732e8 r vblank_irq_info_funcs -ffffffff82d732f8 r vline0_irq_info_funcs -ffffffff82d73308 r dmub_outbox_irq_info_funcs -ffffffff82d74000 r irq_source_info_dcn30 -ffffffff82d75290 r irq_service_funcs_dcn30 -ffffffff82d75298 r dummy_irq_info_funcs -ffffffff82d752a8 r hpd_irq_info_funcs -ffffffff82d752b8 r hpd_rx_irq_info_funcs -ffffffff82d752c8 r pflip_irq_info_funcs -ffffffff82d752d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d752e8 r vblank_irq_info_funcs -ffffffff82d752f8 r vline0_irq_info_funcs -ffffffff82d75308 r dmub_trace_irq_info_funcs -ffffffff82d76000 r irq_source_info_dcn302 -ffffffff82d77290 r irq_service_funcs_dcn302 -ffffffff82d77298 r dummy_irq_info_funcs -ffffffff82d772a8 r hpd_irq_info_funcs -ffffffff82d772b8 r hpd_rx_irq_info_funcs -ffffffff82d772c8 r pflip_irq_info_funcs -ffffffff82d772d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d772e8 r vblank_irq_info_funcs -ffffffff82d772f8 r vline0_irq_info_funcs -ffffffff82d77308 r dmub_trace_irq_info_funcs -ffffffff82d78000 r irq_service_funcs_dcn303 -ffffffff82d78008 r dummy_irq_info_funcs -ffffffff82d78018 r hpd_irq_info_funcs -ffffffff82d78028 r hpd_rx_irq_info_funcs -ffffffff82d78038 r pflip_irq_info_funcs -ffffffff82d78048 r vupdate_no_lock_irq_info_funcs -ffffffff82d78058 r vblank_irq_info_funcs -ffffffff82d78068 r vline0_irq_info_funcs -ffffffff82d78080 r irq_source_info_dcn303 -ffffffff82d7a000 r irq_source_info_dcn31 -ffffffff82d7b290 r irq_service_funcs_dcn31 -ffffffff82d7b298 r dummy_irq_info_funcs -ffffffff82d7b2a8 r hpd_irq_info_funcs -ffffffff82d7b2b8 r hpd_rx_irq_info_funcs -ffffffff82d7b2c8 r pflip_irq_info_funcs -ffffffff82d7b2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d7b2e8 r vblank_irq_info_funcs -ffffffff82d7b2f8 r vline0_irq_info_funcs -ffffffff82d7b308 r outbox_irq_info_funcs -ffffffff82d7c000 r irq_source_info_dcn314 -ffffffff82d7d290 r irq_service_funcs_dcn314 -ffffffff82d7d298 r dummy_irq_info_funcs -ffffffff82d7d2a8 r hpd_irq_info_funcs -ffffffff82d7d2b8 r hpd_rx_irq_info_funcs -ffffffff82d7d2c8 r pflip_irq_info_funcs -ffffffff82d7d2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d7d2e8 r vblank_irq_info_funcs -ffffffff82d7d2f8 r vline0_irq_info_funcs -ffffffff82d7d308 r outbox_irq_info_funcs -ffffffff82d7e000 r irq_source_info_dcn315 -ffffffff82d7f290 r irq_service_funcs_dcn315 -ffffffff82d7f298 r dummy_irq_info_funcs -ffffffff82d7f2a8 r hpd_irq_info_funcs -ffffffff82d7f2b8 r hpd_rx_irq_info_funcs -ffffffff82d7f2c8 r pflip_irq_info_funcs -ffffffff82d7f2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d7f2e8 r vblank_irq_info_funcs -ffffffff82d7f2f8 r vline0_irq_info_funcs -ffffffff82d7f308 r outbox_irq_info_funcs -ffffffff82d80000 r irq_source_info_dcn32 -ffffffff82d81290 r irq_service_funcs_dcn32 -ffffffff82d81298 r dummy_irq_info_funcs -ffffffff82d812a8 r hpd_irq_info_funcs -ffffffff82d812b8 r hpd_rx_irq_info_funcs -ffffffff82d812c8 r pflip_irq_info_funcs -ffffffff82d812d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d812e8 r vblank_irq_info_funcs -ffffffff82d812f8 r vline0_irq_info_funcs -ffffffff82d81308 r outbox_irq_info_funcs -ffffffff82d83000 r dio_link_hwss -ffffffff82d84000 r dio_fixed_vs_pe_retimer_link_hwss -ffffffff82d85000 r dpia_link_hwss -ffffffff82d86000 r hpo_dp_link_hwss -ffffffff82d87000 r hpo_fixed_vs_pe_retimer_dp_link_hwss -ffffffff82d88000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82d89000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82d89006 r DP_DVI_CONVERTER_ID_4 -ffffffff82d8900d r DP_DVI_CONVERTER_ID_5 -ffffffff82d8a000 r dp_lt_fallbacks -ffffffff82d8e000 r mandatory_dpcd_partitions -ffffffff82d8f000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82d8f007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82d90000 r virtual_lnk_enc_funcs -ffffffff82d91000 r virtual_link_hwss -ffffffff82d92000 r virtual_str_enc_funcs -ffffffff82d93000 R dmub_srv_dcn20_regs -ffffffff82d94000 R dmub_srv_dcn21_regs -ffffffff82d95000 R dmub_srv_dcn30_regs -ffffffff82d96000 R dmub_srv_dcn301_regs -ffffffff82d97000 R dmub_srv_dcn302_regs -ffffffff82d98000 R dmub_srv_dcn303_regs -ffffffff82d99000 R dmub_srv_dcn31_regs -ffffffff82d9a000 R dmub_srv_dcn314_regs -ffffffff82d9b000 R dmub_srv_dcn315_regs -ffffffff82d9c000 R dmub_srv_dcn316_regs -ffffffff82d9d000 R dmub_srv_dcn32_regs -ffffffff82d9e000 r numerator01 -ffffffff82d9e020 r numerator02 -ffffffff82d9e040 r numerator04 -ffffffff82d9e060 r numerator05 -ffffffff82da2000 r abm_settings -ffffffff82da2020 r abm_settings_config0 -ffffffff82da2060 r abm_settings_config1 -ffffffff82da20a0 r abm_settings_config2 -ffffffff82da20d8 r min_reduction_table_v_2_2 -ffffffff82da20e5 r max_reduction_table_v_2_2 -ffffffff82da20f2 r min_reduction_table -ffffffff82da20ff r max_reduction_table -ffffffff82da2110 r custom_backlight_curve0 -ffffffff82da3000 R amdgpu_pp_profile_name -ffffffff82da4000 r pp_lib_thermal_controller_names -ffffffff82da5000 r pp_ip_funcs -ffffffff82da50a8 R pp_smu_ip_block -ffffffff82da50c0 r pp_dpm_funcs +ffffffff82d64000 r hdmi_14_protection +ffffffff82d64010 r dp_11_protection +ffffffff82d64020 r hdcp_i2c_offsets +ffffffff82d64050 r hdcp_dpcd_addrs +ffffffff82d65000 r irq_service_funcs_dce110 +ffffffff82d65008 r dummy_irq_info_funcs +ffffffff82d65018 r hpd_irq_info_funcs +ffffffff82d65028 r hpd_rx_irq_info_funcs +ffffffff82d65038 r pflip_irq_info_funcs +ffffffff82d65048 r vupdate_irq_info_funcs +ffffffff82d65058 r vblank_irq_info_funcs +ffffffff82d65070 r irq_source_info_dce110 +ffffffff82d67000 r irq_service_funcs_dce120 +ffffffff82d67008 r dummy_irq_info_funcs +ffffffff82d67018 r hpd_irq_info_funcs +ffffffff82d67028 r hpd_rx_irq_info_funcs +ffffffff82d67038 r pflip_irq_info_funcs +ffffffff82d67048 r vupdate_irq_info_funcs +ffffffff82d67058 r vblank_irq_info_funcs +ffffffff82d67070 r irq_source_info_dce120 +ffffffff82d69000 r irq_service_funcs_dce80 +ffffffff82d69008 r dummy_irq_info_funcs +ffffffff82d69018 r hpd_irq_info_funcs +ffffffff82d69028 r hpd_rx_irq_info_funcs +ffffffff82d69038 r pflip_irq_info_funcs +ffffffff82d69048 r vupdate_irq_info_funcs +ffffffff82d69058 r vblank_irq_info_funcs +ffffffff82d69070 r irq_source_info_dce80 +ffffffff82d6b000 r irq_service_funcs_dcn10 +ffffffff82d6b008 r dummy_irq_info_funcs +ffffffff82d6b018 r hpd_irq_info_funcs +ffffffff82d6b028 r hpd_rx_irq_info_funcs +ffffffff82d6b038 r pflip_irq_info_funcs +ffffffff82d6b048 r vupdate_no_lock_irq_info_funcs +ffffffff82d6b058 r vblank_irq_info_funcs +ffffffff82d6b068 r vline0_irq_info_funcs +ffffffff82d6b080 r irq_source_info_dcn10 +ffffffff82d6d000 r irq_service_funcs_dcn20 +ffffffff82d6d008 r dummy_irq_info_funcs +ffffffff82d6d018 r hpd_irq_info_funcs +ffffffff82d6d028 r hpd_rx_irq_info_funcs +ffffffff82d6d038 r pflip_irq_info_funcs +ffffffff82d6d048 r vupdate_no_lock_irq_info_funcs +ffffffff82d6d058 r vblank_irq_info_funcs +ffffffff82d6d068 r vline0_irq_info_funcs +ffffffff82d6d080 r irq_source_info_dcn20 +ffffffff82d6f000 r irq_service_funcs_dcn201 +ffffffff82d6f008 r dummy_irq_info_funcs +ffffffff82d6f018 r hpd_irq_info_funcs +ffffffff82d6f028 r hpd_rx_irq_info_funcs +ffffffff82d6f038 r pflip_irq_info_funcs +ffffffff82d6f048 r vupdate_no_lock_irq_info_funcs +ffffffff82d6f058 r vblank_irq_info_funcs +ffffffff82d6f068 r vline0_irq_info_funcs +ffffffff82d6f080 r irq_source_info_dcn201 +ffffffff82d71000 r irq_source_info_dcn21 +ffffffff82d72290 r irq_service_funcs_dcn21 +ffffffff82d72298 r dummy_irq_info_funcs +ffffffff82d722a8 r hpd_irq_info_funcs +ffffffff82d722b8 r hpd_rx_irq_info_funcs +ffffffff82d722c8 r pflip_irq_info_funcs +ffffffff82d722d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d722e8 r vblank_irq_info_funcs +ffffffff82d722f8 r vline0_irq_info_funcs +ffffffff82d72308 r dmub_outbox_irq_info_funcs +ffffffff82d73000 r irq_source_info_dcn30 +ffffffff82d74290 r irq_service_funcs_dcn30 +ffffffff82d74298 r dummy_irq_info_funcs +ffffffff82d742a8 r hpd_irq_info_funcs +ffffffff82d742b8 r hpd_rx_irq_info_funcs +ffffffff82d742c8 r pflip_irq_info_funcs +ffffffff82d742d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d742e8 r vblank_irq_info_funcs +ffffffff82d742f8 r vline0_irq_info_funcs +ffffffff82d74308 r dmub_trace_irq_info_funcs +ffffffff82d75000 r irq_source_info_dcn302 +ffffffff82d76290 r irq_service_funcs_dcn302 +ffffffff82d76298 r dummy_irq_info_funcs +ffffffff82d762a8 r hpd_irq_info_funcs +ffffffff82d762b8 r hpd_rx_irq_info_funcs +ffffffff82d762c8 r pflip_irq_info_funcs +ffffffff82d762d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d762e8 r vblank_irq_info_funcs +ffffffff82d762f8 r vline0_irq_info_funcs +ffffffff82d76308 r dmub_trace_irq_info_funcs +ffffffff82d77000 r irq_service_funcs_dcn303 +ffffffff82d77008 r dummy_irq_info_funcs +ffffffff82d77018 r hpd_irq_info_funcs +ffffffff82d77028 r hpd_rx_irq_info_funcs +ffffffff82d77038 r pflip_irq_info_funcs +ffffffff82d77048 r vupdate_no_lock_irq_info_funcs +ffffffff82d77058 r vblank_irq_info_funcs +ffffffff82d77068 r vline0_irq_info_funcs +ffffffff82d77080 r irq_source_info_dcn303 +ffffffff82d79000 r irq_source_info_dcn31 +ffffffff82d7a290 r irq_service_funcs_dcn31 +ffffffff82d7a298 r dummy_irq_info_funcs +ffffffff82d7a2a8 r hpd_irq_info_funcs +ffffffff82d7a2b8 r hpd_rx_irq_info_funcs +ffffffff82d7a2c8 r pflip_irq_info_funcs +ffffffff82d7a2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d7a2e8 r vblank_irq_info_funcs +ffffffff82d7a2f8 r vline0_irq_info_funcs +ffffffff82d7a308 r outbox_irq_info_funcs +ffffffff82d7b000 r irq_source_info_dcn314 +ffffffff82d7c290 r irq_service_funcs_dcn314 +ffffffff82d7c298 r dummy_irq_info_funcs +ffffffff82d7c2a8 r hpd_irq_info_funcs +ffffffff82d7c2b8 r hpd_rx_irq_info_funcs +ffffffff82d7c2c8 r pflip_irq_info_funcs +ffffffff82d7c2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d7c2e8 r vblank_irq_info_funcs +ffffffff82d7c2f8 r vline0_irq_info_funcs +ffffffff82d7c308 r outbox_irq_info_funcs +ffffffff82d7d000 r irq_source_info_dcn315 +ffffffff82d7e290 r irq_service_funcs_dcn315 +ffffffff82d7e298 r dummy_irq_info_funcs +ffffffff82d7e2a8 r hpd_irq_info_funcs +ffffffff82d7e2b8 r hpd_rx_irq_info_funcs +ffffffff82d7e2c8 r pflip_irq_info_funcs +ffffffff82d7e2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d7e2e8 r vblank_irq_info_funcs +ffffffff82d7e2f8 r vline0_irq_info_funcs +ffffffff82d7e308 r outbox_irq_info_funcs +ffffffff82d7f000 r irq_source_info_dcn32 +ffffffff82d80290 r irq_service_funcs_dcn32 +ffffffff82d80298 r dummy_irq_info_funcs +ffffffff82d802a8 r hpd_irq_info_funcs +ffffffff82d802b8 r hpd_rx_irq_info_funcs +ffffffff82d802c8 r pflip_irq_info_funcs +ffffffff82d802d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d802e8 r vblank_irq_info_funcs +ffffffff82d802f8 r vline0_irq_info_funcs +ffffffff82d80308 r outbox_irq_info_funcs +ffffffff82d82000 r dio_link_hwss +ffffffff82d83000 r dio_fixed_vs_pe_retimer_link_hwss +ffffffff82d84000 r dpia_link_hwss +ffffffff82d85000 r hpo_dp_link_hwss +ffffffff82d86000 r hpo_fixed_vs_pe_retimer_dp_link_hwss +ffffffff82d87000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82d88000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82d88006 r DP_DVI_CONVERTER_ID_4 +ffffffff82d8800d r DP_DVI_CONVERTER_ID_5 +ffffffff82d89000 r dp_lt_fallbacks +ffffffff82d8d000 r mandatory_dpcd_partitions +ffffffff82d8e000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82d8e007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82d8f000 r virtual_lnk_enc_funcs +ffffffff82d90000 r virtual_link_hwss +ffffffff82d91000 r virtual_str_enc_funcs +ffffffff82d92000 R dmub_srv_dcn20_regs +ffffffff82d93000 R dmub_srv_dcn21_regs +ffffffff82d94000 R dmub_srv_dcn30_regs +ffffffff82d95000 R dmub_srv_dcn301_regs +ffffffff82d96000 R dmub_srv_dcn302_regs +ffffffff82d97000 R dmub_srv_dcn303_regs +ffffffff82d98000 R dmub_srv_dcn31_regs +ffffffff82d99000 R dmub_srv_dcn314_regs +ffffffff82d9a000 R dmub_srv_dcn315_regs +ffffffff82d9b000 R dmub_srv_dcn316_regs +ffffffff82d9c000 R dmub_srv_dcn32_regs +ffffffff82d9d000 r numerator01 +ffffffff82d9d020 r numerator02 +ffffffff82d9d040 r numerator04 +ffffffff82d9d060 r numerator05 +ffffffff82da1000 r abm_settings +ffffffff82da1020 r abm_settings_config0 +ffffffff82da1060 r abm_settings_config1 +ffffffff82da10a0 r abm_settings_config2 +ffffffff82da10d8 r min_reduction_table_v_2_2 +ffffffff82da10e5 r max_reduction_table_v_2_2 +ffffffff82da10f2 r min_reduction_table +ffffffff82da10ff r max_reduction_table +ffffffff82da1110 r custom_backlight_curve0 +ffffffff82da2000 R amdgpu_pp_profile_name +ffffffff82da3000 r pp_lib_thermal_controller_names +ffffffff82da4000 r pp_ip_funcs +ffffffff82da40a8 R pp_smu_ip_block +ffffffff82da40c0 r pp_dpm_funcs +ffffffff82da5000 r gpio_tbl +ffffffff82da50f0 r enable_fb_req_rej_tbl +ffffffff82da5140 r use_bclk_tbl +ffffffff82da5310 r turn_off_plls_tbl +ffffffff82da5640 r enter_baco_tbl +ffffffff82da5730 r exit_baco_tbl +ffffffff82da5850 r clean_baco_tbl ffffffff82da6000 r gpio_tbl ffffffff82da60f0 r enable_fb_req_rej_tbl ffffffff82da6140 r use_bclk_tbl -ffffffff82da6310 r turn_off_plls_tbl -ffffffff82da6640 r enter_baco_tbl -ffffffff82da6730 r exit_baco_tbl -ffffffff82da6850 r clean_baco_tbl +ffffffff82da62e0 r turn_off_plls_tbl +ffffffff82da6370 r clk_req_b_tbl +ffffffff82da6490 r enter_baco_tbl +ffffffff82da65b0 r exit_baco_tbl +ffffffff82da66d0 r clean_baco_tbl ffffffff82da7000 r gpio_tbl ffffffff82da70f0 r enable_fb_req_rej_tbl -ffffffff82da7140 r use_bclk_tbl -ffffffff82da72e0 r turn_off_plls_tbl -ffffffff82da7370 r clk_req_b_tbl -ffffffff82da7490 r enter_baco_tbl -ffffffff82da75b0 r exit_baco_tbl -ffffffff82da76d0 r clean_baco_tbl -ffffffff82da8000 r gpio_tbl -ffffffff82da80f0 r enable_fb_req_rej_tbl -ffffffff82da8140 r use_bclk_tbl_vg -ffffffff82da8200 r turn_off_plls_tbl_vg -ffffffff82da8350 r use_bclk_tbl -ffffffff82da8440 r turn_off_plls_tbl -ffffffff82da85f0 r clk_req_b_tbl -ffffffff82da8710 r enter_baco_tbl -ffffffff82da8830 r exit_baco_tbl -ffffffff82da8950 r clean_baco_tbl -ffffffff82da9000 r vega10_fuses_default -ffffffff82db8000 r pp_r600_encode_lanes -ffffffff82db9000 R pptable_v1_0_funcs -ffffffff82dba000 R pptable_funcs -ffffffff82dba020 r soft_dummy_pp_table -ffffffff82dbb000 r smu10_hwmgr_funcs -ffffffff82dbc000 r smu7_hwmgr_funcs -ffffffff82dbc2f8 r smu7_irq_funcs -ffffffff82dbc310 r SMU7ThermalPolicy -ffffffff82dbd000 r GCCACConfig_Polaris10 -ffffffff82dbd1b0 r DIDTConfig_Polaris10 -ffffffff82dbda50 r GCCACConfig_Polaris11 -ffffffff82dbdc00 r DIDTConfig_Polaris11_Kicker -ffffffff82dbe4a0 r DIDTConfig_Polaris11 -ffffffff82dbed40 r DIDTConfig_Polaris12 -ffffffff82dbf5e0 r GCCACConfig_VegaM -ffffffff82dbf790 r DIDTConfig_VegaM -ffffffff82dc1000 r smu8_hwmgr_funcs -ffffffff82dc12f0 r SMU7ThermalPolicy -ffffffff82dc2000 r smu9_irq_funcs -ffffffff82dc3000 r gpio_tbl_iceland -ffffffff82dc3060 r gpio_tbl -ffffffff82dc3150 r enable_fb_req_rej_tbl -ffffffff82dc31a0 r use_bclk_tbl -ffffffff82dc3370 r turn_off_plls_tbl -ffffffff82dc3610 r enter_baco_tbl -ffffffff82dc3730 r exit_baco_tbl_iceland -ffffffff82dc3870 r clean_baco_tbl_iceland -ffffffff82dc3890 r exit_baco_tbl -ffffffff82dc39b0 r clean_baco_tbl -ffffffff82dc4000 r pre_baco_tbl -ffffffff82dc4090 r enter_baco_tbl -ffffffff82dc42b0 r exit_baco_tbl -ffffffff82dc4520 r clean_baco_tbl -ffffffff82dc5000 r vega10_hwmgr_funcs -ffffffff82dc52f0 r channel_number -ffffffff82dc5320 r SMU7ThermalWithDelayPolicy -ffffffff82dc6000 r SEDiDtStallCtrlConfig_vega10 -ffffffff82dc6110 r SEDiDtStallPatternConfig_vega10 -ffffffff82dc62e0 r SEDiDtWeightConfig_Vega10 -ffffffff82dc63b0 r SEDiDtCtrl1Config_Vega10 -ffffffff82dc6440 r SEDiDtCtrl2Config_Vega10 -ffffffff82dc6510 r SEDiDtCtrl3Config_vega10 -ffffffff82dc6820 r SEDiDtTuningCtrlConfig_Vega10 -ffffffff82dc68b0 r SELCacConfig_Vega10 -ffffffff82dc6a40 r SEDiDtCtrl0Config_Vega10 -ffffffff82dc6d10 r AvfsPSMInitConfig_vega10 -ffffffff82dc6d90 r SEEDCStallPatternConfig_Vega10 -ffffffff82dc6ea0 r SEEDCStallDelayConfig_Vega10 -ffffffff82dc6f80 r SEEDCCtrlConfig_Vega10 -ffffffff82dc7040 r PSMSEEDCStallPatternConfig_Vega10 -ffffffff82dc70c0 r PSMSEEDCStallDelayConfig_Vega10 -ffffffff82dc71d0 r PSMSEEDCCtrlResetConfig_Vega10 -ffffffff82dc7290 r PSMSEEDCCtrlConfig_Vega10 -ffffffff82dc7350 r SEEDCForceStallPatternConfig_Vega10 -ffffffff82dc73e0 r SEEDCCtrlForceStallConfig_Vega10 -ffffffff82dc8000 R vega10_pptable_funcs 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dt_static_vmm_guest_exit -ffffffff83240ab0 D dt_static_vmm_inout -ffffffff83240b20 D dt_static_smr_call -ffffffff83240b90 D dt_static_smr_called -ffffffff83240c00 D dt_static_smr_barrier_enter -ffffffff83240c70 D dt_static_smr_barrier_exit -ffffffff83240ce0 D dt_static_smr_wakeup -ffffffff83240d50 D dt_static_smr_thread -ffffffff83240dc0 D dt_static_refcnt_none -ffffffff83240e30 D dt_static_refcnt_ethmulti -ffffffff83240ea0 D dt_static_refcnt_ifaddr -ffffffff83240f10 D dt_static_refcnt_ifmaddr -ffffffff83240f80 D dt_static_refcnt_inpcb -ffffffff83240ff0 D dt_static_refcnt_rtentry -ffffffff83241060 D dt_static_refcnt_syncache -ffffffff832410d0 D dt_static_refcnt_tdb -ffffffff83242000 D db_next_free_breakpoint -ffffffff83242008 D db_breakpoints_inserted -ffffffff83243000 D db_ed_style -ffffffff83244000 D db_examine_format -ffffffff83244078 D db_print_format -ffffffff83245000 D db_history_size -ffffffff83245008 D db_history_curr -ffffffff83245010 D db_history_last -ffffffff83246000 D db_tab_stop_width -ffffffff83246004 D db_max_line -ffffffff83246008 D db_max_width -ffffffff8324600c D db_radix -ffffffff83247000 D db_lastsym -ffffffff83247008 D db_maxoff -ffffffff83248000 D db_vars -ffffffff83248090 D db_evars -ffffffff83249000 D db_watchpoints_inserted -ffffffff83249008 D db_next_free_watchpoint -ffffffff8324a000 D db_log -ffffffff8324b000 D audio_cd -ffffffff8324b020 D audio_lock -ffffffff8324c000 D midi_cd -ffffffff8324d000 D rnd_cold -ffffffff8324d004 D rnd_slowextract -ffffffff8324d008 D rnd_timeout -ffffffff8324d050 D rndlock -ffffffff8324d060 D rndreinit_timeout -ffffffff8324d0a8 D rnd_task -ffffffff8324e000 D video_cd -ffffffff8324f000 d rrip_table_analyze -ffffffff8324f0e0 d rrip_table_getname -ffffffff8324f1e0 d rrip_table_getsymname -ffffffff8324f280 d rrip_table_extref -ffffffff83250000 D nexecs -ffffffff83251000 D elf_note_names -ffffffff83252000 D ncpus -ffffffff83252004 D ncpusfound -ffffffff83253000 D acct_lock -ffffffff83253010 D acctsuspend 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vega12_pptable_funcs +ffffffff82dcb000 r clean_baco_tbl +ffffffff82dcc000 r vega20_hwmgr_funcs +ffffffff82dcc2f0 r SMU7ThermalWithDelayPolicy +ffffffff82dcc340 r link_width +ffffffff82dcd000 R vega20_pptable_funcs +ffffffff82dce000 R ci_smu_funcs +ffffffff82dce0e0 r defaults_hawaii_pro +ffffffff82dce12c r defaults_hawaii_xt +ffffffff82dce178 r defaults_saturn_xt +ffffffff82dce1c4 r defaults_bonaire_xt +ffffffff82dce210 r ci_program_jump_on_start.data +ffffffff82dcf000 R fiji_smu_funcs +ffffffff82dcf0e0 r avfs_graphics_level +ffffffff82dcf240 r fiji_power_tune_data_set_array +ffffffff82dcf246 r fiji_clock_stretch_amount_conversion +ffffffff82dcf260 r fiji_clock_stretcher_ddt_table +ffffffff82dd0000 R iceland_smu_funcs +ffffffff82dd00e0 r defaults_icelandxt +ffffffff82dd012c r defaults_icelandpro +ffffffff82dd0178 r defaults_iceland +ffffffff82dd1000 R polaris10_smu_funcs +ffffffff82dd10e0 r avfs_graphics_level_polaris10 +ffffffff82dd12a0 r avfs_memory_level_polaris10 +ffffffff82dd12c0 r polaris10_power_tune_data_set_array +ffffffff82dd1310 r Range_Table +ffffffff82dd2000 R smu10_smu_funcs +ffffffff82dd3000 r smu7_program_jump_on_start.data +ffffffff82dd3010 r pwr_virus_table_pre +ffffffff82dd3680 r pwr_virus_table_post +ffffffff82dd3f80 r pwr_virus_section1 +ffffffff82dd4610 r pwr_virus_section2 +ffffffff82dd4660 r pwr_virus_section3 +ffffffff82ddbab0 r pwr_virus_section4 +ffffffff82ddbe80 r pwr_virus_section5 +ffffffff82ddc490 r pwr_virus_section6 +ffffffff82dde000 R smu8_smu_funcs +ffffffff82ddf000 R tonga_smu_funcs +ffffffff82ddf0e0 r tonga_power_tune_data_set_array +ffffffff82ddf12c r tonga_clock_stretch_amount_conversion +ffffffff82ddf140 r tonga_clock_stretcher_ddt_table +ffffffff82de0000 R vega10_smu_funcs +ffffffff82de1000 R vega12_smu_funcs +ffffffff82de2000 R vega20_smu_funcs +ffffffff82de3000 R vegam_smu_funcs +ffffffff82de30e0 r vegam_power_tune_data_set_array +ffffffff82de3130 r Range_Table +ffffffff82de4000 R smu_ip_funcs +ffffffff82de40a8 R smu_v11_0_ip_block +ffffffff82de40c0 R smu_v12_0_ip_block +ffffffff82de40d8 R smu_v13_0_ip_block +ffffffff82de40f0 r swsmu_pm_funcs +ffffffff82de5000 r arcturus_ppt_funcs +ffffffff82de53f0 r arcturus_table_map +ffffffff82de5470 r arcturus_pwr_src_map +ffffffff82de5480 r arcturus_workload_map +ffffffff82de54d0 r smu11_thermal_policy +ffffffff82de5528 r arcturus_i2c_algo +ffffffff82de5538 r arcturus_i2c_control_quirks +ffffffff82de5550 r arcturus_throttler_map +ffffffff82de5570 r arcturus_message_map +ffffffff82de5ff0 r arcturus_clk_map +ffffffff82de60b0 r arcturus_feature_mask_map +ffffffff82de7000 r cyan_skillfish_ppt_funcs +ffffffff82de8000 r navi10_ppt_funcs +ffffffff82de83f0 r smu11_thermal_policy +ffffffff82de8448 r navi10_i2c_algo +ffffffff82de8458 r navi10_i2c_control_quirks +ffffffff82de8470 r navi1x_throttler_map +ffffffff82de8490 r NoDbiPrbs7 +ffffffff82de9490 r DbiPrbs7 +ffffffff82deb000 r sienna_cichlid_ppt_funcs +ffffffff82deb3f0 r smu11_thermal_policy +ffffffff82deb448 r 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cardbus_ca +ffffffff82dfe000 R com_cardbus_ca +ffffffff82dff000 R xl_cardbus_ca +ffffffff82dff030 R xl_cardbus_products +ffffffff82e00000 R dc_cardbus_ca +ffffffff82e00030 R dc_cardbus_devices +ffffffff82e01000 R fxp_cardbus_ca +ffffffff82e01028 R fxp_cardbus_devices +ffffffff82e02000 R rl_cardbus_devices +ffffffff82e02028 R rl_cardbus_ca +ffffffff82e03000 R re_cardbus_ca +ffffffff82e03028 R re_cardbus_devices +ffffffff82e04000 R ath_cardbus_ca +ffffffff82e05000 R athn_cardbus_ca +ffffffff82e05030 r athn_cardbus_devices +ffffffff82e06000 R atw_cardbus_ca +ffffffff82e06028 R atw_cardbus_devices +ffffffff82e07000 R rtw_cardbus_ca +ffffffff82e07028 R rtw_cardbus_devices +ffffffff82e08000 R ral_cardbus_ca +ffffffff82e08030 r ral_cardbus_devices +ffffffff82e09000 R acx_cardbus_ca +ffffffff82e09028 r acx_cardbus_devices +ffffffff82e0a000 R pgt_cardbus_ca +ffffffff82e0a028 R pgt_cardbus_devices +ffffffff82e0b000 R ehci_cardbus_ca +ffffffff82e0c000 R ohci_cardbus_ca +ffffffff82e0d000 R uhci_cardbus_ca +ffffffff82e0e000 R malo_cardbus_ca +ffffffff82e0e028 r malo_cardbus_devices +ffffffff82e0f000 R bwi_cardbus_ca +ffffffff82e0f030 r bwi_cardbus_devices +ffffffff82e10000 R pcmcia_ca +ffffffff82e11000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82e12000 r pcmcia_cis_quirks +ffffffff82e13000 R ep_pcmcia_ca +ffffffff82e14000 R ne_pcmcia_ca +ffffffff82e14030 R ne2000devs +ffffffff82e16000 R aic_pcmcia_ca +ffffffff82e17000 R com_pcmcia_ca +ffffffff82e18000 R wdc_pcmcia_ca +ffffffff82e19000 R sm_pcmcia_ca +ffffffff82e1a000 R xe_pcmcia_ca +ffffffff82e1b000 R wi_pcmcia_ca +ffffffff82e1b030 r wi_pcmcia_products +ffffffff82e1c000 R malo_pcmcia_ca +ffffffff82e1d000 R an_pcmcia_ca +ffffffff82e1e000 R pcib_ca +ffffffff82e1f000 R amdpcib_ca +ffffffff82e1f028 R amdpcib_devices +ffffffff82e20000 R tcpcib_ca +ffffffff82e20028 R tcpcib_devices +ffffffff82e21000 R aapic_ca +ffffffff82e22000 R hme_pci_ca +ffffffff82e22028 r hme_promhdr +ffffffff82e2202a r hme_promdat +ffffffff82e23000 R isa_ca +ffffffff82e24000 R isadma_ca +ffffffff82e25000 R fdc_ca +ffffffff82e26000 R fd_ca +ffffffff82e27000 R com_isa_ca +ffffffff82e28000 R pckbc_isa_ca +ffffffff82e29000 R vga_isa_ca +ffffffff82e2a000 R wdc_isa_ca +ffffffff82e2b000 R mpu_midi_hw_if +ffffffff82e2c000 R mpu_isa_ca +ffffffff82e2d000 R pcppi_ca +ffffffff82e2e000 R spkr_ca +ffffffff82e2e030 r pitchtab +ffffffff82e2f000 R lpt_isa_ca +ffffffff82e30000 R wbsio_ca +ffffffff82e31000 R schsio_ca +ffffffff82e32000 R lm_isa_ca +ffffffff82e32028 R lm_wbsio_ca +ffffffff82e33000 R it_sensors +ffffffff82e33110 R it_vrfact +ffffffff82e33140 R it_fan_regs +ffffffff82e33160 R it_fan_ext_regs +ffffffff82e33178 R it_ca +ffffffff82e34000 R abitkv_sensors +ffffffff82e34200 R abitaa_sensors +ffffffff82e34480 R abitav_sensors +ffffffff82e34700 R abitas_sensors +ffffffff82e34980 R abitax_sensors +ffffffff82e34bc0 R abitm4_sensors +ffffffff82e34e80 R abitan_sensors +ffffffff82e35120 R abital_sensors +ffffffff82e353a0 R abitaw_sensors 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pms_accessops +ffffffff82e46040 R pms_sec_accessops +ffffffff82e46060 R pms_protocols +ffffffff82e461e0 r alps_models +ffffffff82e47000 R skgpio_led_offset +ffffffff82e47008 R skgpio_ca +ffffffff82e48000 R hidkbd_trtab +ffffffff82e48100 r apple_fn_trans +ffffffff82e48120 r apple_tb_trans +ffffffff82e48140 r apple_mba_trans +ffffffff82e49000 r hidcc_attach_wskbd.accessops +ffffffff82e49020 r hidcc_keysyms +ffffffff82e4a000 R usb_ca +ffffffff82e4b000 R usb_known_products +ffffffff82e56fc0 R usb_known_vendors +ffffffff82e597e0 R usbd_error_strs +ffffffff82e5a000 R usb_quirks +ffffffff82e5a390 R usb_dev_quirks +ffffffff82e5a398 R usbd_no_quirk +ffffffff82e5b000 R uhub_ca +ffffffff82e5b028 R uhub_uhub_ca +ffffffff82e5c000 R uaudio_ca +ffffffff82e5c028 R uaudio_hw_if +ffffffff82e5c0e0 R uaudio_rates +ffffffff82e5c120 r uaudio_clkname.names +ffffffff82e5c140 r uaudio_feature_addent.features +ffffffff82e5d000 R uvideo_ca +ffffffff82e5d028 R uvideo_hw_if +ffffffff82e5d100 R uvideo_devs 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ukbd_never_console +ffffffff82e6b000 R ums_accessops +ffffffff82e6b018 R ums_ca +ffffffff82e6c000 R umt_accessops +ffffffff82e6c018 R umt_ca +ffffffff82e6d000 R uts_devs +ffffffff82e6d010 R uts_accessops +ffffffff82e6d028 R uts_ca +ffffffff82e6e000 R ubcmtp_accessops +ffffffff82e6e018 R ubcmtp_ca +ffffffff82e6e040 r ubcmtp_devices +ffffffff82e6f000 R ucycom_methods +ffffffff82e6f040 R ucycom_devs +ffffffff82e6f050 R ucycom_ca +ffffffff82e70000 R uslhcom_methods +ffffffff82e70040 R uslhcom_ca +ffffffff82e70068 r uslhcom_devs +ffffffff82e71000 R ulpt_ca +ffffffff82e72000 R umass_ca +ffffffff82e72028 R umass_bbb_methods +ffffffff82e72040 R umass_cbi_methods +ffffffff82e73000 R umass_quirks +ffffffff82e74000 R umass_scsi_switch +ffffffff82e75000 R uthum_devs +ffffffff82e75008 R uthum_ca +ffffffff82e75030 r uthum_sensor_type_s +ffffffff82e76000 R ugold_devs +ffffffff82e76018 R ugold_ca +ffffffff82e77000 R utrh_devs +ffffffff82e77008 R utrh_ca +ffffffff82e78000 R uoakrh_devs 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uchcom_ca +ffffffff82ea2070 r uchcom_devs +ffffffff82ea2090 r dividers +ffffffff82ea3000 R uticom_methods +ffffffff82ea3040 R uticom_ca +ffffffff82ea3070 r uticom_devs +ffffffff82ea4000 R wi_usb_devs +ffffffff82ea40f0 R wi_usb_ca +ffffffff82ea5000 R atu_ca +ffffffff82ea6000 R ural_ca +ffffffff82ea6030 r ural_devs +ffffffff82ea60a0 r ural_rf2522_r2 +ffffffff82ea60e0 r ural_rf2524_r2 +ffffffff82ea6120 r ural_rf2525_hi_r2 +ffffffff82ea6160 r ural_rf2525_r2 +ffffffff82ea61a0 r ural_rf2525e_r2 +ffffffff82ea61e0 r ural_rf2526_hi_r2 +ffffffff82ea6220 r ural_rf2526_r2 +ffffffff82ea6260 r ural_def_bbp +ffffffff82ea62a0 r ural_def_mac +ffffffff82ea7000 R rum_ca +ffffffff82ea7030 r rum_devs +ffffffff82ea7110 r rum_rf5225 +ffffffff82ea7460 r rum_rf5226 +ffffffff82ea77b0 r rum_def_bbp +ffffffff82ea77f0 r rum_def_mac +ffffffff82ea8000 R run_ca +ffffffff82ea8030 r run_devs +ffffffff82ea8430 r rt2860_rf2850 +ffffffff82ea8860 r rt2860_rates +ffffffff82ea8920 r rt5592_freqs_40mhz +ffffffff82ea8a60 r rt5592_freqs_20mhz +ffffffff82ea8ba0 r rt5592_2ghz_def_rf +ffffffff82ea8be0 r rt5592_chan_5ghz +ffffffff82ea8e30 r rt5592_def_bbp +ffffffff82ea8e70 r rt5592_bbp_r196 +ffffffff82ea8ed0 r rt5390_def_bbp +ffffffff82ea8f00 r rt3572_def_rf +ffffffff82ea8f40 r rt3070_def_rf +ffffffff82ea8f70 r rt3593_def_rf +ffffffff82ea8fb0 r rt5592_def_rf +ffffffff82ea8fe0 r rt5392_def_rf +ffffffff82ea9060 r rt5390_def_rf +ffffffff82ea90e0 r rt2870_def_mac +ffffffff82eaa000 R mtw_ca +ffffffff82eaa030 r mtw_devs +ffffffff82eaa070 r rt2860_rates +ffffffff82eaa130 r mt7601_rf_chan +ffffffff82eaa1a0 r mt7601_def_bbp +ffffffff82eaa2d0 r mt7601_rf_bank0 +ffffffff82eaa330 r mt7601_rf_bank4 +ffffffff82eaa3b0 r mt7601_rf_bank5 +ffffffff82eaa430 r mt7601_def_mac +ffffffff82eab000 R zyd_ca +ffffffff82eab030 r zyd_devs +ffffffff82eab1b0 r zyd_rfmd_init.phyini +ffffffff82eab2e0 r zyd_rfmd_init.rfini +ffffffff82eab330 r zyd_rfmd_set_channel.rfprog +ffffffff82eab3a0 r zyd_al2230_init.phyini +ffffffff82eab480 r zyd_al2230_init.rfini +ffffffff82eab4e0 r zyd_al2230_init_b.phyini +ffffffff82eab5d0 r zyd_al2230_init_b.rfini +ffffffff82eab620 r zyd_al2230_set_channel.rfprog +ffffffff82eab6d0 r zyd_al7230B_init.phyini_1 +ffffffff82eab7b0 r zyd_al7230B_init.rfini_1 +ffffffff82eab7f0 r zyd_al7230B_set_channel.rfprog +ffffffff82eab860 r zyd_al7230B_set_channel.rfsc +ffffffff82eab890 r zyd_al2210_init.phyini +ffffffff82eab8f0 r zyd_al2210_init.rfini +ffffffff82eab920 r zyd_al2210_set_channel.rfprog +ffffffff82eab960 r zyd_gct_init.phyini +ffffffff82eab9b0 r zyd_gct_init.rfini +ffffffff82eaba50 r zyd_gct_set_channel.rfprog +ffffffff82eaba90 r zyd_maxim_set_channel.phyini +ffffffff82eabba0 r zyd_maxim_set_channel.rfini +ffffffff82eabbe0 r zyd_maxim_set_channel.rfprog +ffffffff82eabc50 r zyd_maxim2_set_channel.phyini +ffffffff82eabd70 r zyd_maxim2_set_channel.rfini +ffffffff82eabdb0 r zyd_maxim2_set_channel.rfprog +ffffffff82eabe20 r zyd_rf_name.zyd_rfs +ffffffff82eabea0 r zyd_def_phyB +ffffffff82eac0d0 r zyd_def_phy +ffffffff82ead000 R upgt_ca +ffffffff82ead028 r upgt_devs_1 +ffffffff82ead030 r upgt_devs_2 +ffffffff82eae000 R urtw_ca +ffffffff82eae030 r urtw_devs +ffffffff82eae090 r urtw_ratetable +ffffffff82eae0f0 r urtw_8225_gain +ffffffff82eae110 r urtw_8225_txpwr_cck_ch14 +ffffffff82eae140 r urtw_8225_txpwr_cck +ffffffff82eae170 r urtw_8225_tx_gain_cck_ofdm +ffffffff82eae176 r urtw_8225_txpwr_ofdm +ffffffff82eae180 r urtw_8225_rf_part1 +ffffffff82eae200 r urtw_8225_rxgain +ffffffff82eae2c0 r urtw_8225_agc +ffffffff82eae340 r urtw_8225_rf_part2 +ffffffff82eae470 r urtw_8225_rf_part3 +ffffffff82eae550 r urtw_8225_channel +ffffffff82eae58c r urtw_8225_threshold +ffffffff82eae5a0 r urtw_8225v2_gain_bg +ffffffff82eae5c0 r urtw_8225v2_tx_gain_cck_ofdm +ffffffff82eae5f0 r urtw_8225v2_rf_part1 +ffffffff82eae670 r urtw_8225v2_rxgain +ffffffff82eae730 r urtw_8225v2_rf_part2 +ffffffff82eae870 r urtw_8225v2_rf_part3 +ffffffff82eae970 r urtw_8187b_regtbl +ffffffff82eaea90 r urtw_8225v2_b_rf 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-ffffffff83258004 D nthreads -ffffffff83258008 D fork_tfmrate -ffffffff83259000 D kthread_q -ffffffff8325a000 D nkmempages -ffffffff8325a008 D malloc_mtx -ffffffff8325a020 D memname -ffffffff8325a4b0 D sysctl_kmemlock -ffffffff8325a4c0 D malloc_errintvl -ffffffff8325b000 D maxdmap -ffffffff8325b008 D maxsmap -ffffffff8325b010 D rlimit_lock -ffffffff8325c000 D sched_cost_load -ffffffff8325c004 D sched_cost_priority -ffffffff8325c008 D sched_cost_runnable -ffffffff8325c00c D sched_cost_resident -ffffffff8325d000 D intrmap_lock -ffffffff8325e000 D nosuidcoredump -ffffffff8325e008 D sigio_lock -ffffffff8325f000 D smr_lock -ffffffff8325f010 D smr_logintvl -ffffffff83260000 D startuphook_list -ffffffff83261000 D sysctl_lock -ffffffff83261010 D sysctl_disklock -ffffffff83261020 d openbsd -ffffffff83261024 d arg_max -ffffffff83261028 d posix_version -ffffffff8326102c d ngroups_max -ffffffff83261030 d int_one -ffffffff83261034 d maxpartitions -ffffffff83261038 d raw_part -ffffffff8326103c D allowpowerdown -ffffffff83261040 D hw_power -ffffffff83261044 d byte_order -ffffffff83262000 d thrsleep_queue -ffffffff83262010 d thrsleep_lock -ffffffff83263000 D tc_lock -ffffffff83263010 D windup_mtx -ffffffff83263020 d dummy_timecounter -ffffffff83263070 D timecounter -ffffffff83263078 d timehands -ffffffff83263080 d th0 -ffffffff83263118 d th1 -ffffffff83264000 D itimer_mtx -ffffffff83264010 D ratecheck_mtx -ffffffff83264020 D ppsratecheck_mtx -ffffffff83264030 D resettodr_to -ffffffff83264078 D resettodr_task -ffffffff83265000 D timeout_mutex -ffffffff83266000 D wdog_auto -ffffffff83267000 D taskq_sys -ffffffff83267050 D taskq_sys_mp -ffffffff83268000 d update_loadavg.to -ffffffff83268048 D ccpu -ffffffff83268050 d schedcpu.to -ffffffff83268098 D perflevel -ffffffff8326809c D perfpolicy -ffffffff832680a0 D setperf_to -ffffffff83269000 D autoconf_attdet_mtx -ffffffff83269010 D msgs -ffffffff8326a000 d evcount_list -ffffffff8326a010 d evcount_percpu_init_list -ffffffff8326b000 D syslogf_rwlock -ffffffff8326b010 D log_mtx -ffffffff8326b020 D logstash_in -ffffffff8326b028 D logstash_out -ffffffff8326b030 D logstash_rwlock -ffffffff8326c000 D pool_head -ffffffff8326c010 D pool_lock -ffffffff8326c020 D pool_debug -ffffffff8326c028 D pool_allocator_single -ffffffff8326c040 D pool_allocator_multi -ffffffff8326c058 D pool_allocator_multi_ni -ffffffff8326c070 D pool_gc_tick -ffffffff8326c0b8 D pool_gc_task -ffffffff8326d000 D kprintf_mutex -ffffffff8326d010 D db_panic -ffffffff8326d014 D splassert_ctl -ffffffff8326d018 D v_putc -ffffffff8326d020 D printf_flags -ffffffff8326e000 D userconf_base -ffffffff8326e004 D userconf_maxdev -ffffffff8326e008 D userconf_totdev -ffffffff8326e00c D userconf_maxlocnames -ffffffff8326e010 D userconf_cnt -ffffffff8326e014 D userconf_lines -ffffffff8326e018 D userconf_histsz -ffffffff8326e020 D userconf_cmds -ffffffff8326f000 D ftlock -ffffffff83270000 d ppollcollect.poll_errintvl -ffffffff83271000 D ttydefchars -ffffffff83271014 D ttclos -ffffffff8327101b D ttopen -ffffffff83271022 D ttybg -ffffffff83271028 D ttyin -ffffffff8327102e D ttyout -ffffffff83271038 D ttylist_lock -ffffffff83272000 D linesw -ffffffff83272280 D nlinesw -ffffffff83273000 D pt_softc_lock -ffffffff83274000 d mbstat_boot_boot_cpumem -ffffffff83274080 D mbstat -ffffffff83274090 D mclsizes -ffffffff832740b0 D m_extref_mtx -ffffffff832740c0 D m_pool_allocator -ffffffff83275000 D somaxconn -ffffffff83275004 D sominconn -ffffffff83275008 D sosplice_lock -ffffffff83276000 D sb_max -ffffffff83277000 D unp_df_lock -ffffffff83277010 D unp_gc_lock -ffffffff83277020 D unp_rights_mtx -ffffffff83277030 D unp_ino_mtx -ffffffff83277040 D unp_gc_task -ffffffff83277070 D unpst_sendspace -ffffffff83277074 D unpst_recvspace -ffffffff83277078 D unpsq_sendspace -ffffffff8327707c D unpsq_recvspace -ffffffff83277080 D unpdg_sendspace -ffffffff83277084 D unpdg_recvspace -ffffffff83278000 D doingcache -ffffffff83279000 D maxvfsconf -ffffffff83279010 d vfsconflist -ffffffff8327a000 D lockf_lock -ffffffff8327a010 D maxlocksperuid -ffffffff8327b000 D iftovt_tab -ffffffff8327b040 D vttoif_tab -ffffffff8327b064 D suid_clear -ffffffff8327b068 D vnode_mtx -ffffffff8327b078 D vfs_stall_lock -ffffffff8327b090 D vtypes -ffffffff8327b0e0 D vtags -ffffffff8327c000 D syncer_maxdelay -ffffffff8327c004 D syncdelay -ffffffff8327d000 D dosdirtemplate -ffffffff8327e000 D ntfs_hashlock -ffffffff8327f000 D ntfs_toupper_lock -ffffffff83280000 D art_table_gc_mtx -ffffffff83280010 D art_table_gc_task -ffffffff83280040 D art_node_gc_mtx -ffffffff83280050 D art_node_gc_task -ffffffff83281000 D bpf_bufsize -ffffffff83281004 D bpf_maxbufsize -ffffffff83281008 D bpf_sysctl_lk -ffffffff83282000 D ifg_head -ffffffff83282010 D if_cloners_lock -ffffffff83282020 D if_input_task_locked -ffffffff83282050 D netlock -ffffffff83282060 D ifnetlist -ffffffff83283000 D ifiq_maxlen_drop -ffffffff83283004 D ifiq_maxlen_return -ffffffff83284000 D etherbroadcastaddr -ffffffff83284006 D ether_ipmulticast_min -ffffffff8328400c D ether_ipmulticast_max -ffffffff83284012 D ether_ip6multicast_min -ffffffff83284018 D ether_ip6multicast_max -ffffffff83285000 D etherip_cloner -ffffffff83285030 D etherip_list -ffffffff83286000 D loop_cloner -ffffffff83287000 D ifmedia_mtx -ffffffff83288000 D ppp_compressors -ffffffff83288020 D ppp_cloner -ffffffff83289000 D ppp_pkt_init -ffffffff8328a000 D ppp_bsd_compress -ffffffff8328b000 D ppp_deflate -ffffffff8328b070 D ppp_deflate_draft -ffffffff8328c000 D tun_cloner -ffffffff8328c030 D tap_cloner -ffffffff8328d000 D bridgeintrq -ffffffff8328d038 D bridge_cloner -ffffffff8328e000 d veb_cloner -ffffffff8328e030 d vport_cloner -ffffffff8328f000 D vlan_tagh_lk -ffffffff8328f010 D vlan_cloner -ffffffff8328f040 D svlan_cloner -ffffffff83290000 D pipex_list_mtx -ffffffff83290010 D pipex_prune -ffffffff83290018 D pipexoutq -ffffffff83290050 d SHAPad2 -ffffffff83291000 D rtmap_gc -ffffffff83291018 D rt_rc -ffffffff83292000 D rt_labels -ffffffff83292010 D rtlabel_mtx -ffffffff83293000 D enc_cloner -ffffffff83294000 D gre_cloner -ffffffff83294030 D gre_list -ffffffff83294040 D mgre_cloner -ffffffff83294070 D egre_cloner -ffffffff832940a0 D nvgre_cloner -ffffffff832940d0 D eoip_cloner -ffffffff83295000 D trunk_cloner -ffffffff83296000 d aggr_cloner -ffffffff83297000 d tpmr_cloner -ffffffff83298000 D mpe_cloner -ffffffff83299000 D mpw_cloner -ffffffff8329a000 D mpip_cloner -ffffffff8329b000 d bpe_cloner -ffffffff8329b030 d bpe_lock -ffffffff8329c000 D vether_cloner -ffffffff8329d000 D pair_cloner -ffffffff8329e000 d vxlan_cloner -ffffffff8329e030 d vxlan_lock -ffffffff8329e040 d vxlan_teps -ffffffff8329f000 D underload_interval -ffffffff8329f010 D wg_cloner -ffffffff832a0000 d stoeplitz_keyseed -ffffffff832a1000 D ieee80211_cache_size -ffffffff832a2000 D arpt_prune -ffffffff832a2004 D arpt_keep -ffffffff832a2008 D arpt_down -ffffffff832a2010 D arpinq -ffffffff832a2048 D arp_mtx -ffffffff832a2058 D arp_maxtries -ffffffff832a3000 D ipport_firstauto -ffffffff832a3004 D ipport_lastauto -ffffffff832a3008 D ipport_hifirstauto -ffffffff832a300c D ipport_hilastauto -ffffffff832a4000 D divert_sendspace -ffffffff832a4004 D divert_recvspace -ffffffff832a4008 D divbhashsize -ffffffff832a5000 D icmptstamprepl -ffffffff832a5004 D icmperrppslim -ffffffff832a5008 D icmp_redirtimeout -ffffffff832a6000 D ipsendredirects -ffffffff832a6004 D ip_defttl -ffffffff832a6008 D ip_mtudisc -ffffffff832a600c D ip_mtudisc_timeout -ffffffff832a6010 D ipq_mutex -ffffffff832a6020 D ip_maxqueue -ffffffff832a6028 D ipintrq -ffffffff832a6060 d ipsend_task -ffffffff832a6090 d ipsendraw_task -ffffffff832a7000 D ip_mrtproto -ffffffff832a7004 d sin -ffffffff832a8000 D rip_sendspace -ffffffff832a8008 D rip_recvspace -ffffffff832a9000 D tcp_debug_mtx -ffffffff832aa000 D tcprexmtthresh -ffffffff832aa004 D tcptv_keep_init -ffffffff832aa008 D tcp_rst_ppslim -ffffffff832aa00c D tcp_ackdrop_ppslim -ffffffff832aa010 D tcp_syn_hash_size -ffffffff832aa014 D tcp_syn_cache_limit -ffffffff832aa018 D tcp_syn_bucket_limit -ffffffff832aa01c D tcp_syn_use_limit -ffffffff832aa020 D syn_cache_mtx -ffffffff832ab000 D tcp_outflags -ffffffff832ac000 D tcp_timer_mtx -ffffffff832ac010 D tcp_mssdflt -ffffffff832ac014 D tcp_rttdflt -ffffffff832ac018 D tcp_do_rfc1323 -ffffffff832ac01c D tcp_do_sack -ffffffff832ac020 D tcp_do_rfc3390 -ffffffff832ac024 D tcp_do_tso -ffffffff832ac028 D tcp_reass_limit -ffffffff832ac02c D tcp_sackhole_limit -ffffffff832ad000 D tcp_backoff -ffffffff832ad034 D tcp_totbackoff -ffffffff832ae000 D tcp_sendspace -ffffffff832ae004 D tcp_recvspace -ffffffff832ae008 D tcp_autorcvbuf_inc -ffffffff832af000 D udpcksum -ffffffff832af004 D udp_sendspace -ffffffff832af008 D udp_recvspace -ffffffff832b0000 D ipsec_flows_mtx -ffffffff832b0010 D ipsec_ids_idle -ffffffff832b0014 D ipsec_ids_next_flow -ffffffff832b0018 D ipsec_policy_head -ffffffff832b0028 D ipsp_ids_gc_timeout -ffffffff832b0070 D tdb_sadb_mtx -ffffffff832b0080 d tdb_hashmask -ffffffff832b1000 D ipo_tdb_mtx -ffffffff832b1010 D ipsec_acquire_mtx -ffffffff832b1020 D ipsec_acquire_head -ffffffff832b2000 D ipsec_keep_invalid -ffffffff832b2004 D ipsec_require_pfs -ffffffff832b2008 D ipsec_soft_timeout -ffffffff832b200c D ipsec_exp_timeout -ffffffff832b2010 D ipsec_soft_first_use -ffffffff832b2014 D ipsec_exp_first_use -ffffffff832b2018 D ipsec_expire_acquire -ffffffff832b201c D esp_enable -ffffffff832b2020 D ah_enable -ffffffff832b3000 D udpencap_enable -ffffffff832b3004 D udpencap_port -ffffffff832b4000 D carp_vh_rc -ffffffff832b4020 D carp_sc_rc -ffffffff832b4040 D carp_opts -ffffffff832b4058 D carp_cloner -ffffffff832b4088 d carp_send_na.mcast -ffffffff832b5000 d PADDING +ffffffff83258000 D deadproc_mutex +ffffffff83259000 D nprocesses +ffffffff83259004 D nthreads +ffffffff83259008 D fork_tfmrate +ffffffff8325a000 D kthread_q +ffffffff8325b000 D nkmempages +ffffffff8325b008 D malloc_mtx +ffffffff8325b020 D memname +ffffffff8325b4b0 D sysctl_kmemlock +ffffffff8325b4c0 D malloc_errintvl +ffffffff8325c000 D maxdmap +ffffffff8325c008 D maxsmap +ffffffff8325c010 D rlimit_lock +ffffffff8325d000 D sched_cost_load +ffffffff8325d004 D sched_cost_priority +ffffffff8325d008 D sched_cost_runnable +ffffffff8325d00c D sched_cost_resident +ffffffff8325e000 D intrmap_lock +ffffffff8325f000 D nosuidcoredump +ffffffff8325f008 D sigio_lock +ffffffff83260000 D smr_lock +ffffffff83260010 D smr_logintvl +ffffffff83261000 D startuphook_list +ffffffff83262000 D sysctl_lock +ffffffff83262010 D sysctl_disklock +ffffffff83262020 d openbsd +ffffffff83262024 d arg_max +ffffffff83262028 d posix_version +ffffffff8326202c d ngroups_max +ffffffff83262030 d int_one +ffffffff83262034 d maxpartitions +ffffffff83262038 d raw_part +ffffffff8326203c D allowpowerdown +ffffffff83262040 D hw_power +ffffffff83262044 d byte_order +ffffffff83263000 d thrsleep_queue +ffffffff83263010 d thrsleep_lock +ffffffff83264000 D tc_lock +ffffffff83264010 D windup_mtx +ffffffff83264020 d dummy_timecounter +ffffffff83264070 D timecounter +ffffffff83264078 d timehands +ffffffff83264080 d th0 +ffffffff83264118 d th1 +ffffffff83265000 D itimer_mtx +ffffffff83265010 D ratecheck_mtx +ffffffff83265020 D ppsratecheck_mtx +ffffffff83265030 D resettodr_to +ffffffff83265078 D resettodr_task +ffffffff83266000 D timeout_mutex +ffffffff83267000 D wdog_auto +ffffffff83268000 D taskq_sys +ffffffff83268050 D taskq_sys_mp +ffffffff83269000 d update_loadavg.to +ffffffff83269048 D ccpu +ffffffff83269050 d schedcpu.to +ffffffff83269098 D perflevel +ffffffff8326909c D perfpolicy +ffffffff832690a0 D setperf_to +ffffffff8326a000 D autoconf_attdet_mtx +ffffffff8326a010 D msgs +ffffffff8326b000 d evcount_list +ffffffff8326b010 d evcount_percpu_init_list +ffffffff8326c000 D syslogf_rwlock +ffffffff8326c010 D log_mtx +ffffffff8326c020 D logstash_in +ffffffff8326c028 D logstash_out +ffffffff8326c030 D logstash_rwlock +ffffffff8326d000 D pool_head +ffffffff8326d010 D pool_lock +ffffffff8326d020 D pool_debug +ffffffff8326d028 D pool_allocator_single +ffffffff8326d040 D pool_allocator_multi +ffffffff8326d058 D pool_allocator_multi_ni +ffffffff8326d070 D pool_gc_tick +ffffffff8326d0b8 D pool_gc_task +ffffffff8326e000 D kprintf_mutex +ffffffff8326e010 D db_panic +ffffffff8326e014 D splassert_ctl +ffffffff8326e018 D v_putc +ffffffff8326e020 D printf_flags +ffffffff8326f000 D userconf_base +ffffffff8326f004 D userconf_maxdev +ffffffff8326f008 D userconf_totdev +ffffffff8326f00c D userconf_maxlocnames +ffffffff8326f010 D userconf_cnt +ffffffff8326f014 D userconf_lines +ffffffff8326f018 D userconf_histsz +ffffffff8326f020 D userconf_cmds +ffffffff83270000 D ftlock +ffffffff83271000 d ppollcollect.poll_errintvl +ffffffff83272000 D ttydefchars +ffffffff83272014 D ttclos +ffffffff8327201b D ttopen +ffffffff83272022 D ttybg +ffffffff83272028 D ttyin +ffffffff8327202e D ttyout +ffffffff83272038 D ttylist_lock +ffffffff83273000 D linesw +ffffffff83273280 D nlinesw +ffffffff83274000 D pt_softc_lock +ffffffff83275000 d mbstat_boot_boot_cpumem +ffffffff83275080 D mbstat +ffffffff83275090 D mclsizes +ffffffff832750b0 D m_extref_mtx +ffffffff832750c0 D m_pool_allocator +ffffffff83276000 D somaxconn +ffffffff83276004 D sominconn +ffffffff83276008 D sosplice_lock +ffffffff83277000 D sb_max +ffffffff83278000 D unp_df_lock +ffffffff83278010 D unp_gc_lock +ffffffff83278020 D unp_rights_mtx +ffffffff83278030 D unp_ino_mtx +ffffffff83278040 D unp_gc_task +ffffffff83278070 D unpst_sendspace +ffffffff83278074 D unpst_recvspace +ffffffff83278078 D unpsq_sendspace +ffffffff8327807c D unpsq_recvspace +ffffffff83278080 D unpdg_sendspace +ffffffff83278084 D unpdg_recvspace +ffffffff83279000 D doingcache +ffffffff8327a000 D maxvfsconf +ffffffff8327a010 d vfsconflist +ffffffff8327b000 D lockf_lock +ffffffff8327b010 D maxlocksperuid +ffffffff8327c000 D iftovt_tab +ffffffff8327c040 D vttoif_tab +ffffffff8327c064 D suid_clear +ffffffff8327c068 D vnode_mtx +ffffffff8327c078 D vfs_stall_lock +ffffffff8327c090 D vtypes +ffffffff8327c0e0 D vtags +ffffffff8327d000 D syncer_maxdelay +ffffffff8327d004 D syncdelay +ffffffff8327e000 D dosdirtemplate +ffffffff8327f000 D ntfs_hashlock +ffffffff83280000 D ntfs_toupper_lock +ffffffff83281000 D art_table_gc_mtx +ffffffff83281010 D art_table_gc_task +ffffffff83281040 D art_node_gc_mtx +ffffffff83281050 D art_node_gc_task +ffffffff83282000 D bpf_bufsize +ffffffff83282004 D bpf_maxbufsize +ffffffff83282008 D bpf_sysctl_lk +ffffffff83283000 D ifg_head +ffffffff83283010 D if_cloners_lock +ffffffff83283020 D if_hooks_mtx +ffffffff83283030 D if_input_task_locked +ffffffff83283060 D netlock +ffffffff83283070 D ifnetlist +ffffffff83284000 D ifiq_maxlen_drop +ffffffff83284004 D ifiq_maxlen_return +ffffffff83285000 D etherbroadcastaddr +ffffffff83285006 D ether_ipmulticast_min +ffffffff8328500c D ether_ipmulticast_max +ffffffff83285012 D ether_ip6multicast_min +ffffffff83285018 D ether_ip6multicast_max +ffffffff83286000 D etherip_cloner +ffffffff83286030 D etherip_list +ffffffff83287000 D loop_cloner +ffffffff83288000 D ifmedia_mtx +ffffffff83289000 D ppp_compressors +ffffffff83289020 D ppp_cloner +ffffffff8328a000 D ppp_pkt_init +ffffffff8328b000 D ppp_bsd_compress +ffffffff8328c000 D ppp_deflate +ffffffff8328c070 D ppp_deflate_draft +ffffffff8328d000 D tun_cloner +ffffffff8328d030 D tap_cloner +ffffffff8328e000 D bridgeintrq +ffffffff8328e038 D bridge_cloner +ffffffff8328f000 d veb_cloner +ffffffff8328f030 d vport_cloner +ffffffff83290000 D vlan_tagh_lk +ffffffff83290010 D vlan_cloner +ffffffff83290040 D svlan_cloner +ffffffff83291000 D pipex_list_mtx +ffffffff83291010 D pipex_prune +ffffffff83291018 D pipexoutq +ffffffff83291050 d SHAPad2 +ffffffff83292000 D rtmap_gc +ffffffff83292018 D rt_rc +ffffffff83293000 D rt_labels +ffffffff83293010 D rtlabel_mtx +ffffffff83294000 D enc_cloner +ffffffff83295000 D gre_cloner +ffffffff83295030 D gre_list +ffffffff83295040 D mgre_cloner +ffffffff83295070 D egre_cloner +ffffffff832950a0 D nvgre_cloner +ffffffff832950d0 D eoip_cloner +ffffffff83296000 D trunk_cloner +ffffffff83297000 d aggr_cloner +ffffffff83298000 d tpmr_cloner +ffffffff83299000 D mpe_cloner +ffffffff8329a000 D mpw_cloner +ffffffff8329b000 D mpip_cloner +ffffffff8329c000 d bpe_cloner +ffffffff8329c030 d bpe_lock +ffffffff8329d000 D vether_cloner +ffffffff8329e000 D pair_cloner +ffffffff8329f000 d vxlan_cloner +ffffffff8329f030 d vxlan_lock +ffffffff8329f040 d vxlan_teps +ffffffff832a0000 D underload_interval +ffffffff832a0010 D wg_cloner +ffffffff832a1000 d stoeplitz_keyseed +ffffffff832a2000 D ieee80211_cache_size +ffffffff832a3000 D arpt_prune +ffffffff832a3004 D arpt_keep +ffffffff832a3008 D arpt_down +ffffffff832a3010 D arpinq +ffffffff832a3048 D arp_mtx +ffffffff832a3058 D arp_maxtries +ffffffff832a4000 D ipport_firstauto +ffffffff832a4004 D ipport_lastauto +ffffffff832a4008 D ipport_hifirstauto +ffffffff832a400c D ipport_hilastauto +ffffffff832a5000 D divert_sendspace +ffffffff832a5004 D divert_recvspace +ffffffff832a5008 D divbhashsize +ffffffff832a6000 D icmptstamprepl +ffffffff832a6004 D icmperrppslim +ffffffff832a6008 D icmp_redirtimeout +ffffffff832a7000 D ipsendredirects +ffffffff832a7004 D ip_defttl +ffffffff832a7008 D ip_mtudisc +ffffffff832a700c D ip_mtudisc_timeout +ffffffff832a7010 D ipq_mutex +ffffffff832a7020 D ip_maxqueue +ffffffff832a7028 D ipintrq +ffffffff832a7060 d ipsend_task +ffffffff832a7090 d ipsendraw_task +ffffffff832a8000 D ip_mrtproto +ffffffff832a8004 d sin +ffffffff832a9000 D rip_sendspace +ffffffff832a9008 D rip_recvspace +ffffffff832aa000 D tcp_debug_mtx +ffffffff832ab000 D tcprexmtthresh +ffffffff832ab004 D tcptv_keep_init +ffffffff832ab008 D tcp_rst_ppslim +ffffffff832ab00c D tcp_ackdrop_ppslim +ffffffff832ab010 D tcp_syn_hash_size +ffffffff832ab014 D tcp_syn_cache_limit +ffffffff832ab018 D tcp_syn_bucket_limit +ffffffff832ab01c D tcp_syn_use_limit +ffffffff832ab020 D syn_cache_mtx +ffffffff832ac000 D tcp_outflags +ffffffff832ad000 D tcp_timer_mtx +ffffffff832ad010 D tcp_mssdflt +ffffffff832ad014 D tcp_rttdflt +ffffffff832ad018 D tcp_do_rfc1323 +ffffffff832ad01c D tcp_do_sack +ffffffff832ad020 D tcp_do_rfc3390 +ffffffff832ad024 D tcp_do_tso +ffffffff832ad028 D tcp_reass_limit +ffffffff832ad02c D tcp_sackhole_limit +ffffffff832ae000 D tcp_backoff +ffffffff832ae034 D tcp_totbackoff +ffffffff832af000 D tcp_sendspace +ffffffff832af004 D tcp_recvspace +ffffffff832af008 D tcp_autorcvbuf_inc +ffffffff832b0000 D udpcksum +ffffffff832b0004 D udp_sendspace +ffffffff832b0008 D udp_recvspace +ffffffff832b1000 D ipsec_flows_mtx +ffffffff832b1010 D ipsec_ids_idle +ffffffff832b1014 D ipsec_ids_next_flow +ffffffff832b1018 D ipsec_policy_head +ffffffff832b1028 D ipsp_ids_gc_timeout +ffffffff832b1070 D tdb_sadb_mtx +ffffffff832b1080 d tdb_hashmask +ffffffff832b2000 D ipo_tdb_mtx +ffffffff832b2010 D ipsec_acquire_mtx +ffffffff832b2020 D ipsec_acquire_head +ffffffff832b3000 D ipsec_keep_invalid +ffffffff832b3004 D ipsec_require_pfs +ffffffff832b3008 D ipsec_soft_timeout +ffffffff832b300c D ipsec_exp_timeout +ffffffff832b3010 D ipsec_soft_first_use +ffffffff832b3014 D ipsec_exp_first_use +ffffffff832b3018 D ipsec_expire_acquire +ffffffff832b301c D esp_enable +ffffffff832b3020 D ah_enable +ffffffff832b4000 D udpencap_enable +ffffffff832b4004 D udpencap_port +ffffffff832b5000 D carp_vh_rc +ffffffff832b5020 D carp_sc_rc +ffffffff832b5040 D carp_opts +ffffffff832b5058 D carp_cloner +ffffffff832b5088 d carp_send_na.mcast ffffffff832b6000 d PADDING -ffffffff832b7000 d weak_keys -ffffffff832b8000 D swcr_id -ffffffff832b9000 D window_inflate -ffffffff832b9004 D window_deflate -ffffffff832ba000 D ghash_update -ffffffff832bb000 D mpls_defttl -ffffffff832bb004 D mpls_mapttl_ip -ffffffff832bc000 D nfskevq_lock -ffffffff832bd000 D desirednfsrvcache -ffffffff832be000 D nfs_niothreads -ffffffff832bf000 D fragtbl -ffffffff832c0000 D ffs_vtbl -ffffffff832c1000 D dirchk -ffffffff832c2000 D desireddquot -ffffffff832c3000 D amap_list_lock -ffffffff832c4000 d uao_list_lock -ffffffff832c5000 d uvmexp_countersboot_boot_cpumem -ffffffff832c50c0 D uvmexp_counters -ffffffff832c50c8 D vm_min_kernel_address -ffffffff832c6000 D no_constraint -ffffffff832c7000 d uvm_kmapent_warn_rate -ffffffff832c8000 D maxslp -ffffffff832c9000 D uvmpagerops -ffffffff832ca000 D uvm_swap_data_lock -ffffffff832ca010 D swap_syscall_lock -ffffffff832ca020 D oommtx -ffffffff832cb000 D uvm_doswapencrypt -ffffffff832cc000 D gif_list -ffffffff832cc010 D gif_cloner -ffffffff832cd000 d sec_cloner -ffffffff832cd030 d sec_tdb_gc_mtx -ffffffff832cd040 d sec_tdb_gc_task -ffffffff832ce000 D divert6_sendspace -ffffffff832ce004 D divert6_recvspace -ffffffff832ce008 D divb6hashsize -ffffffff832cf000 d in6_get_hw_ifid.allone -ffffffff832d0000 D ip6_sendredirects -ffffffff832d0004 D ip6_defhlim -ffffffff832d0008 D ip6_defmcasthlim -ffffffff832d000c D ip6_maxfragpackets -ffffffff832d0010 D ip6_maxfrags -ffffffff832d0014 D ip6_log_interval -ffffffff832d0018 D ip6_hdrnestlimit -ffffffff832d001c D ip6_dad_count -ffffffff832d0020 D ip6_auto_flowlabel -ffffffff832d0024 D ip6_use_deprecated -ffffffff832d0028 D ip6_neighborgcthresh -ffffffff832d002c D ip6_maxdynroutes -ffffffff832d0030 D rip6_sendspace -ffffffff832d0038 D rip6_recvspace -ffffffff832d0040 D icmp6_redirtimeout -ffffffff832d0044 D icmp6errppslim -ffffffff832d0048 D ip6_mtudisc_timeout -ffffffff832d1000 D frag6_mutex -ffffffff832d2000 d icmp6_mtudisc_hiwat -ffffffff832d2004 d icmp6_mtudisc_lowat -ffffffff832d3000 d randomtab_20 -ffffffff832d4000 D ip6intrq -ffffffff832d4038 d ip6send_task -ffffffff832d5000 D nd6_timer_next -ffffffff832d5008 D nd6_expire_next -ffffffff832d5010 D nd6_delay -ffffffff832d5014 D nd6_umaxtries -ffffffff832d5018 D nd6_mmaxtries -ffffffff832d501c D nd6_gctimer -ffffffff832d5020 D nd6_maxndopt -ffffffff832d5028 D nd6_mtx -ffffffff832d5038 D nd6_list -ffffffff832d6000 d dadq -ffffffff832d7000 D pfkeyv2_mtx -ffffffff832d7010 d pfkeyv2_seq -ffffffff832d8000 D sadb_exts_allowed_in -ffffffff832d8090 D sadb_exts_required_in -ffffffff832d9000 D cold -ffffffff832da000 D bdevsw -ffffffff832da460 D nblkdev -ffffffff832da470 D cdevsw -ffffffff832dc400 D nchrdev -ffffffff832dc404 D mem_no -ffffffff832dc408 D swapdev -ffffffff832dc410 D constab -ffffffff832dd000 D machine -ffffffff832dd008 D cpu_idle_cycle_fcn -ffffffff832dd010 D lid_action -ffffffff832dd014 D pwr_action -ffffffff832dd018 D isa_constraint -ffffffff832dd028 D dma_constraint -ffffffff832dd040 D uvm_md_constraints -ffffffff832dd058 D delay_func -ffffffff832dd060 D initclock_func -ffffffff832dd068 D startclock_func -ffffffff832dd070 D bootinfo_size -ffffffff832dd074 D waittime -ffffffff832dd078 D dumpmag -ffffffff832de000 d identifycpu.prevci -ffffffff832df000 D tsc_rdtsc -ffffffff832df008 D tsc_timecounter -ffffffff832df058 D tsc_is_synchronized -ffffffff832e0000 D local_apic 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rn_bw_params -ffffffff83405000 D dcn3_fpga_funcs -ffffffff83405090 d dcn3_funcs -ffffffff83406000 d vg_funcs -ffffffff83406090 d dummy_clocks -ffffffff834061c0 d vg_bw_params -ffffffff83407000 d dcn31_funcs -ffffffff83407090 d dcn31_bw_params -ffffffff83408000 d dcn314_funcs -ffffffff83408090 d dcn314_bw_params -ffffffff83409000 d dcn315_funcs -ffffffff83409090 d dcn315_bw_params -ffffffff8340a000 d dcn316_funcs -ffffffff8340a090 d dcn316_bw_params -ffffffff8340b000 d dcn32_funcs -ffffffff8340c000 d dcn10_dpp_cap -ffffffff8340d000 d dcn20_dpp_funcs -ffffffff8340d110 d dcn20_dpp_cap -ffffffff8340e000 d dcn20_hubp_funcs -ffffffff8340f000 d dcn20_opp_funcs -ffffffff83410000 d dcn20_tg_funcs -ffffffff83411000 d dcn201_dpp_funcs -ffffffff83411110 d dcn201_dpp_cap -ffffffff83412000 d dcn201_hubp_funcs -ffffffff83413000 d dcn201_opp_funcs -ffffffff83414000 d dcn201_tg_funcs -ffffffff83415000 d dcn201_res_pool_funcs -ffffffff834150f8 d dcn201_ip -ffffffff834152b0 d dcn201_soc -ffffffff83417000 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uvm_kmapent_warn_rate +ffffffff832ca000 D maxslp +ffffffff832cb000 D uvmpagerops +ffffffff832cc000 D uvm_swap_data_lock +ffffffff832cc010 D swap_syscall_lock +ffffffff832cc020 D oommtx +ffffffff832cd000 D uvm_doswapencrypt +ffffffff832ce000 D gif_list +ffffffff832ce010 D gif_cloner +ffffffff832cf000 d sec_cloner +ffffffff832cf030 d sec_tdb_gc_mtx +ffffffff832cf040 d sec_tdb_gc_task +ffffffff832d0000 D divert6_sendspace +ffffffff832d0004 D divert6_recvspace +ffffffff832d0008 D divb6hashsize +ffffffff832d1000 d in6_get_hw_ifid.allone +ffffffff832d2000 D ip6_sendredirects +ffffffff832d2004 D ip6_defhlim +ffffffff832d2008 D ip6_defmcasthlim +ffffffff832d200c D ip6_maxfragpackets +ffffffff832d2010 D ip6_maxfrags +ffffffff832d2014 D ip6_log_interval +ffffffff832d2018 D ip6_hdrnestlimit +ffffffff832d201c D ip6_dad_count +ffffffff832d2020 D ip6_auto_flowlabel +ffffffff832d2024 D ip6_use_deprecated +ffffffff832d2028 D ip6_neighborgcthresh +ffffffff832d202c D ip6_maxdynroutes +ffffffff832d2030 D rip6_sendspace +ffffffff832d2038 D rip6_recvspace +ffffffff832d2040 D icmp6_redirtimeout +ffffffff832d2044 D icmp6errppslim +ffffffff832d2048 D ip6_mtudisc_timeout +ffffffff832d3000 D frag6_mutex +ffffffff832d4000 d icmp6_mtudisc_hiwat +ffffffff832d4004 d icmp6_mtudisc_lowat +ffffffff832d5000 d randomtab_20 +ffffffff832d6000 D ip6intrq +ffffffff832d6038 d ip6send_task +ffffffff832d7000 D nd6_timer_next +ffffffff832d7008 D nd6_expire_next +ffffffff832d7010 D nd6_delay +ffffffff832d7014 D nd6_umaxtries +ffffffff832d7018 D nd6_mmaxtries +ffffffff832d701c D nd6_gctimer +ffffffff832d7020 D nd6_maxndopt +ffffffff832d7028 D nd6_mtx +ffffffff832d7038 D nd6_list +ffffffff832d8000 d dadq +ffffffff832d9000 D pfkeyv2_mtx +ffffffff832d9010 d pfkeyv2_seq +ffffffff832da000 D sadb_exts_allowed_in +ffffffff832da090 D sadb_exts_required_in +ffffffff832db000 D cold +ffffffff832dc000 D bdevsw +ffffffff832dc460 D nblkdev +ffffffff832dc470 D cdevsw +ffffffff832de400 D nchrdev +ffffffff832de404 D mem_no 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wsfont_add.cookiegen +ffffffff832f41f0 d spleen8x16_data +ffffffff832f4ff0 d spleen12x24_data +ffffffff832f79f0 d spleen16x32_data +ffffffff832fb1f0 d spleen32x64_data +ffffffff8330a000 D nsphy_cd +ffffffff8330b000 D nsphyter_cd +ffffffff8330c000 D gentbi_cd +ffffffff8330d000 D qsphy_cd +ffffffff8330e000 D inphy_cd +ffffffff8330f000 D iophy_cd +ffffffff83310000 D eephy_cd +ffffffff83311000 D exphy_cd +ffffffff83312000 D rlphy_cd +ffffffff83313000 D lxtphy_cd +ffffffff83314000 D luphy_cd +ffffffff83315000 D mtdphy_cd +ffffffff83316000 D icsphy_cd +ffffffff83317000 D sqphy_cd +ffffffff83318000 D tqphy_cd +ffffffff83319000 D ukphy_cd +ffffffff8331a000 D dcphy_cd +ffffffff8331b000 D bmtphy_cd +ffffffff8331c000 D brgphy_cd +ffffffff8331d000 D xmphy_cd +ffffffff8331e000 D amphy_cd +ffffffff8331f000 D acphy_cd +ffffffff83320000 D nsgphy_cd +ffffffff83321000 D urlphy_cd +ffffffff83322000 D rgephy_cd +ffffffff83323000 D ciphy_cd +ffffffff83324000 D ipgphy_cd +ffffffff83325000 D etphy_cd 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auvia_cd +ffffffff83361000 D qle_cd +ffffffff83362000 D mpii_cd +ffffffff83363000 D aq_cd +ffffffff83364000 D de_cd +ffffffff83365000 D pcn_cd +ffffffff83366000 D wdc_sii3114_vtbl +ffffffff83366038 D wdc_pdc203xx_vtbl +ffffffff83366070 D wdc_svwsata_vtbl +ffffffff833660a8 D pciide_cd +ffffffff833660d0 d sis_hostbr_type +ffffffff83367000 D ppb_cd +ffffffff83368000 D vr_cd +ffffffff83368020 D vr_devices +ffffffff83369000 D txp_cd +ffffffff8336a000 D bt848_card_signature +ffffffff8336b000 D bktr_cd +ffffffff8336c000 D em_cd +ffffffff8336d000 D ixgb_cd +ffffffff8336e000 D ix_cd +ffffffff8336e020 D ixgbe_smart_speed +ffffffff8336e024 D ixgbe_enable_msix +ffffffff8336f000 D ixl_cd +ffffffff8336f020 d ixl_sff_lock +ffffffff83370000 D xge_cd +ffffffff83371000 D thtc_cd +ffffffff83371020 D tht_cd +ffffffff83371040 D tht_txt_desc +ffffffff83371068 D tht_rxf_desc +ffffffff83371090 D tht_rxd_desc +ffffffff833710b8 D tht_txf_desc +ffffffff83372000 D myx_cd +ffffffff83373000 D oce_cd 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bnx_rv2ps +ffffffff833881c0 D bnx_cd +ffffffff833881e0 d flash_5709 +ffffffff83388210 d flash_table +ffffffff83389000 D vge_cd +ffffffff8338a000 D stge_cd +ffffffff8338b000 D nfe_cd +ffffffff8338c000 D et_cd +ffffffff8338d000 D jme_cd +ffffffff8338e000 D age_cd +ffffffff8338f000 D alc_dma_burst +ffffffff8338f020 D alc_cd +ffffffff83390000 D ale_cd +ffffffff83391000 D amdpm_cd +ffffffff83391020 d amdpm_timecounter +ffffffff83392000 D bce_cd +ffffffff83393000 D rtwn_cd +ffffffff83394000 d ral_rt2560_opns +ffffffff83394028 d ral_rt2661_opns +ffffffff83394050 d ral_rt2860_opns +ffffffff83395000 D piixpm_cd +ffffffff83396000 D vic_cd +ffffffff83397000 D vmx_cd +ffffffff83398000 D vmwpvs_cd +ffffffff83399000 D lii_cd +ffffffff8339a000 D ichiic_cd +ffffffff8339b000 D viapm_cd +ffffffff8339b020 d viapm_timecounter +ffffffff8339c000 D amdiic_cd +ffffffff8339d000 D nviic_cd +ffffffff8339e000 D kate_cd +ffffffff8339f000 D km_cd +ffffffff833a0000 D cpu_model_offsets +ffffffff833a0070 D ksmn_cd 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r600_cs_packet_parse_vline.vline_status +ffffffff833c5000 d r100_asic +ffffffff833c52e0 d r200_asic +ffffffff833c55c0 d r300_asic_pcie +ffffffff833c58a0 d r300_asic +ffffffff833c5b80 d r420_asic +ffffffff833c5e60 d rs400_asic +ffffffff833c6140 d rs600_asic +ffffffff833c6420 d rs690_asic +ffffffff833c6700 d rv515_asic +ffffffff833c69e0 d r520_asic +ffffffff833c6cc0 d r600_asic +ffffffff833c6fa0 d rv6xx_asic +ffffffff833c7280 d rs780_asic +ffffffff833c7560 d rv770_asic +ffffffff833c7840 d evergreen_asic +ffffffff833c7b20 d sumo_asic +ffffffff833c7e00 d btc_asic +ffffffff833c80e0 d cayman_asic +ffffffff833c83c0 d trinity_asic +ffffffff833c86a0 d si_asic +ffffffff833c8980 d ci_asic +ffffffff833c8c60 d kv_asic +ffffffff833c9000 d dce6_funcs +ffffffff833c9018 d dce6_hdmi_funcs +ffffffff833c9088 d dce6_dp_funcs +ffffffff833c90f8 d dce4_funcs +ffffffff833c9110 d dce4_hdmi_funcs +ffffffff833c9180 d dce4_dp_funcs +ffffffff833c91f0 d dce32_funcs +ffffffff833c9208 d dce32_hdmi_funcs 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amdgpu_vm_update_mode +ffffffff833d2044 D amdgpu_dc +ffffffff833d2048 D amdgpu_sched_jobs +ffffffff833d204c D amdgpu_sched_hw_submission +ffffffff833d2050 D amdgpu_cg_mask +ffffffff833d2058 D amdgpu_pg_mask +ffffffff833d205c D amdgpu_sdma_phase_quantum +ffffffff833d2060 D amdgpu_pp_feature_mask +ffffffff833d2064 D amdgpu_lbpw +ffffffff833d2068 D amdgpu_compute_multipipe +ffffffff833d206c D amdgpu_gpu_recovery +ffffffff833d2070 D amdgpu_smu_pptable_id +ffffffff833d2074 D amdgpu_dc_feature_mask +ffffffff833d2078 D amdgpu_async_gfx_ring +ffffffff833d207c D amdgpu_mcbp +ffffffff833d2080 D amdgpu_discovery +ffffffff833d2084 D amdgpu_noretry +ffffffff833d2088 D amdgpu_force_asic_type +ffffffff833d208c D amdgpu_tmz +ffffffff833d2090 D amdgpu_reset_method +ffffffff833d2094 D amdgpu_num_kcq +ffffffff833d2098 D amdgpu_use_xgmi_p2p +ffffffff833d209c D amdgpu_sg_display +ffffffff833d20a0 D amdgpu_user_partt_mode +ffffffff833d20a8 D mgpu_info +ffffffff833d2558 D amdgpu_ras_enable +ffffffff833d255c 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sriov_sc_video_codecs_decode_array_vcn0 +ffffffff833ee000 d sdma_v4_0_ras +ffffffff833ef000 D sdma_v4_4_ras +ffffffff833f0000 D sdma_v4_4_2_xcp_funcs +ffffffff833f0020 d sdma_v4_4_2_ras +ffffffff833f1000 d sdma_v6_0_3_ras +ffffffff833f2000 d sienna_cichlid_mode2_handler +ffffffff833f3000 d smu_v13_0_10_mode2_handler +ffffffff833f4000 d sriov_vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff833f4010 d sriov_vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff833f4020 d sriov_vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff833f4030 d sriov_vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff833f4040 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff833f4070 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff833f4100 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff833f4140 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff833f5000 D umc_v6_1_ras +ffffffff833f6000 D umc_v6_7_ras +ffffffff833f7000 D umc_v8_10_ras +ffffffff833f8000 D umc_v8_7_ras +ffffffff833f9000 d vcn_v2_6_ras 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dcn2_0_nv12_soc -ffffffff83437d18 D dcn2_1_ip -ffffffff83437ed0 D dcn2_1_soc -ffffffff83439208 D ddr4_wm_table_gs -ffffffff834392c8 D lpddr4_wm_table_gs -ffffffff83439388 D lpddr4_wm_table_with_disabled_ppt -ffffffff83439448 D ddr4_wm_table_rn -ffffffff83439508 D ddr4_1R_wm_table_rn -ffffffff834395c8 D lpddr4_wm_table_rn -ffffffff8343a000 D dcn3_0_ip -ffffffff8343a1b8 D dcn3_0_soc -ffffffff8343c000 D dcn3_01_ip -ffffffff8343c1b8 D dcn3_01_soc -ffffffff8343d4f0 D ddr4_wm_table -ffffffff8343d5b0 D lpddr5_wm_table -ffffffff8343e000 D dcn3_02_ip -ffffffff8343e1b8 D dcn3_02_soc -ffffffff83440000 D dcn3_03_ip -ffffffff834401b8 D dcn3_03_soc -ffffffff83442000 D dcn3_1_ip -ffffffff834421b8 D dcn3_15_ip -ffffffff83442370 D dcn3_16_ip -ffffffff83442528 d dcn3_15_soc -ffffffff83443860 d dcn3_1_soc -ffffffff83444b98 d dcn3_16_soc -ffffffff83446000 D dcn3_14_ip -ffffffff834461b8 d dcn3_14_soc -ffffffff83448000 D dcn3_2_ip -ffffffff834481b8 D dcn3_2_soc -ffffffff8344a000 D dcn3_21_ip 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yellow_carp_feature_mask_map -ffffffff83458000 D pci_conf_lock -ffffffff83458010 D pci_bus_dma_tag -ffffffff83458088 D msi_pic -ffffffff83458120 D msix_pic -ffffffff83459000 D pchb_cd -ffffffff8345a000 D amas_cd -ffffffff8345b000 D cardslot_cd -ffffffff8345c000 D cardbus_cd -ffffffff8345d000 d csdevs -ffffffff8345e000 d ral_rt2560_opns -ffffffff8345e028 d ral_rt2661_opns -ffffffff8345e050 d ral_rt2860_opns -ffffffff8345f000 D pcmcia_cd -ffffffff83460000 D pcmcia_3cxem556_func0 -ffffffff834600b8 D pcmcia_3cxem556_func0_cfe0 -ffffffff83460158 D pcmcia_megahertz_xjem1144_func0 -ffffffff83460210 D pcmcia_megahertz_xjem1144_func0_cfe0 -ffffffff834602b0 d pcmcia_3cxem556_func1 -ffffffff83460368 d pcmcia_3cxem556_func1_cfe0 -ffffffff83460408 d pcmcia_megahertz_xjem1144_func1 -ffffffff834604c0 d pcmcia_megahertz_xjem1144_func1_cfe0 -ffffffff83460560 d pcmcia_sierra_a555_func1 -ffffffff83460618 d pcmcia_sierra_a555_func1_cfe0 -ffffffff834606b8 d pcmcia_sveclancard_func0 -ffffffff83460770 d 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udl_reg_vals_640x480_67 +ffffffff8348c040 D udl_reg_vals_640x480_72 +ffffffff8348c060 D udl_reg_vals_640x480_75 +ffffffff8348c080 D udl_reg_vals_800x480_61 +ffffffff8348c0a0 D udl_reg_vals_800x600_56 +ffffffff8348c0c0 D udl_reg_vals_800x600_60 +ffffffff8348c0e0 D udl_reg_vals_800x600_72 +ffffffff8348c100 D udl_reg_vals_800x600_74 +ffffffff8348c120 D udl_reg_vals_800x600_75 +ffffffff8348c140 D udl_reg_vals_1024x768_60 +ffffffff8348c160 D udl_reg_vals_1024x768_70 +ffffffff8348c180 D udl_reg_vals_1024x768_75 +ffffffff8348c1a0 D udl_reg_vals_1280x800_60 +ffffffff8348c1c0 D udl_reg_vals_1280x960_60 +ffffffff8348c1e0 D udl_reg_vals_1280x1024_60 +ffffffff8348c200 D udl_reg_vals_1280x1024_75 +ffffffff8348c220 D udl_reg_vals_1366x768_60 +ffffffff8348c240 D udl_reg_vals_1440x900_60 +ffffffff8348c260 D udl_reg_vals_1440x900_59 +ffffffff8348c280 D udl_reg_vals_1440x900_75 +ffffffff8348c2a0 D udl_reg_vals_1680x1050_60 +ffffffff8348c2c0 D udl_reg_vals_1600x1200_60 +ffffffff8348c2e0 D udl_reg_vals_1920x1080_60 +ffffffff8348c300 D udl_null_key_1 +ffffffff8348c310 D udl_decomp_table +ffffffff8348d510 D udl_cd +ffffffff8348d530 D udl_stdscreen +ffffffff8348d560 D udl_scrlist +ffffffff8348d568 D udl_screenlist +ffffffff8348d578 D udl_accessops +ffffffff8348e000 D umidi_cd +ffffffff8348f000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff8348f020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff8348f040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff8348f060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff8348f080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff8348f0a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff8348f0c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff8348f0e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff8348f100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff8348f120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff8348f140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff8348f160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff8348f180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff8348f1a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff8348f1c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff8348f1e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff8348f200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff8348f220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff8348f240 D umidi_quirklist +ffffffff8348f4a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff8348f4c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff8348f4d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff8348f4f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff8348f500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff8348f520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff8348f530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff8348f550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff8348f560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff8348f580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff8348f590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff8348f5b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff8348f5c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff8348f5e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff8348f5f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff8348f610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff8348f620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff8348f640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff8348f650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff8348f670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff8348f680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff8348f6a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff8348f6b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff8348f6d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff8348f6e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff8348f700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff8348f710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff8348f730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff8348f740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff8348f760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff8348f770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff8348f790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff8348f7a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff8348f7c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff8348f7d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff8348f7f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff83490000 D ucom_cd +ffffffff83490020 D sysctl_ucomlock +ffffffff83491000 D ugen_cd +ffffffff83492000 D uhidev_cd +ffffffff83492020 d uhidev_use_rdesc.reportbuf +ffffffff83493000 D uhid_cd +ffffffff83494000 D fido_cd +ffffffff83495000 D ujoy_cd +ffffffff83496000 D ukbd_cd +ffffffff83497000 D ums_cd +ffffffff83497020 d ums_fix_elecom_descriptor.match +ffffffff83498000 D umt_cd +ffffffff83499000 D def_scale +ffffffff83499020 D uts_cd +ffffffff8349a000 D ubcmtp_cd +ffffffff8349a020 d ubcmtp_wsmousecfg +ffffffff8349b000 D ucycom_cd +ffffffff8349c000 D uslhcom_cd +ffffffff8349d000 D ulpt_fwdevs +ffffffff8349d060 D ulpt_cd +ffffffff8349d080 D ulptusein +ffffffff8349e000 D umass_cd +ffffffff8349e020 d umass_bbb_transfer.dCBWtag +ffffffff8349f000 D uthum_cd +ffffffff834a0000 D ugold_cd +ffffffff834a0020 d cmd_init +ffffffff834a0028 d cmd_type +ffffffff834a0030 d cmd_data +ffffffff834a1000 D utrh_cd +ffffffff834a2000 D uoakrh_cd +ffffffff834a3000 D uoaklux_cd +ffffffff834a4000 D uoakv_cd +ffffffff834a5000 D uonerng_cd +ffffffff834a6000 D urng_cd +ffffffff834a7000 D udcf_cd +ffffffff834a8000 D umbg_cd +ffffffff834a9000 D uvisor_cd +ffffffff834aa000 D udsbr_cd +ffffffff834ab000 D utwitch_cd +ffffffff834ac000 D aue_cd +ffffffff834ad000 D axe_cd +ffffffff834ae000 D axen_cd +ffffffff834af000 D smsc_cd +ffffffff834b0000 D cue_devs +ffffffff834b0010 D cue_cd +ffffffff834b1000 D kue_cd +ffffffff834b2000 D cdce_cd +ffffffff834b3000 D urndis_cd +ffffffff834b4000 D mos_cd +ffffffff834b5000 D mue_cd +ffffffff834b6000 D udav_cd +ffffffff834b7000 D upl_devs +ffffffff834b7008 D upl_cd +ffffffff834b8000 D ugl_devs +ffffffff834b8008 D ugl_cd +ffffffff834b9000 D url_cd +ffffffff834ba000 D ure_cd +ffffffff834bb000 D uaq_cd +ffffffff834bc000 D umodem_cd +ffffffff834bd000 D uftdi_cd +ffffffff834be000 D uplcom_cd +ffffffff834bf000 D umct_cd +ffffffff834c0000 D uvscom_cd +ffffffff834c1000 D ubsa_cd +ffffffff834c2000 D ukspan_cd +ffffffff834c3000 D uslcom_cd +ffffffff834c4000 D uark_cd +ffffffff834c5000 D moscom_cd +ffffffff834c6000 D umcs_cd +ffffffff834c7000 D uscom_cd +ffffffff834c8000 D ucrcom_cd +ffffffff834c9000 D uxrcom_cd +ffffffff834ca000 D uipaq_cd +ffffffff834cb000 D umsm_cd +ffffffff834cc000 D uchcom_cd +ffffffff834cd000 D uticom_cd +ffffffff834ce000 D wi_func_usb +ffffffff834ce060 D wi_usb_cd +ffffffff834cf000 D atu_cd +ffffffff834cf020 D atu_devs +ffffffff834cf270 D atu_radfirm +ffffffff834d0000 D ural_cd +ffffffff834d1000 D rum_cd +ffffffff834d2000 D run_cd +ffffffff834d2020 D rt3070_freqs +ffffffff834d3000 D mtw_cd +ffffffff834d4000 D zyd_cd +ffffffff834d5000 D upgt_cd +ffffffff834d6000 D urtw_cd +ffffffff834d7000 D urtwn_cd +ffffffff834d8000 D rsu_cd +ffffffff834d9000 D otus_cd +ffffffff834d9020 d AR_PLCP_HDR_INTR +ffffffff834da000 D umb_xfer_tout +ffffffff834da010 D umb_uuid_basic_connect +ffffffff834da020 D umb_uuid_context_internet +ffffffff834da030 D umb_uuid_qmi_mbim +ffffffff834da040 D umb_cd +ffffffff834da060 D umb_delay +ffffffff834da070 D umb_qmi_alloc_cid +ffffffff834da080 D umb_qmi_fcc_auth +ffffffff834db000 D uath_cd +ffffffff834dc000 D uow_cd +ffffffff834dd000 D uberry_cd +ffffffff834de000 D upd_cd +ffffffff834de020 d upd_usage_roots +ffffffff834de0a0 d upd_usage_batdep +ffffffff834df000 D uwacom_cd +ffffffff834df020 d uwacom_attach.wacom_report_buf +ffffffff834e0000 D bwfm_usb_bus_ops +ffffffff834e1000 D umstc_cd +ffffffff834e2000 D uhidpp_cd +ffffffff834e3000 D ucc_cd +ffffffff834e4000 D iic_cd +ffffffff834e5000 D probe_addrs_sensor +ffffffff834e5008 D probe_addrs_eeprom +ffffffff834e6000 D lmtemp_cd +ffffffff834e7000 D lmn_worklist +ffffffff834e7240 D lmn_cd +ffffffff834e8000 D lmenv_cd +ffffffff834e9000 D maxtmp_cd +ffffffff834ea000 D adc_cd +ffffffff834eb000 D admtemp_cd +ffffffff834ec000 D admlc_cd +ffffffff834ed000 D admtm_cd +ffffffff834ee000 D admtmp_cd +ffffffff834ef000 D admtt_cd +ffffffff834f0000 D maxds_cd +ffffffff834f1000 D adt_chips +ffffffff834f1160 D worklist +ffffffff834f11a0 D adt_cd +ffffffff834f2000 D admcts_cd +ffffffff834f3000 D wbng_cd +ffffffff834f4000 D nvt_cd +ffffffff834f5000 D adl_worklist +ffffffff834f5138 D adl_cd +ffffffff834f6000 D andl_cd +ffffffff834f7000 D sdtemp_cd +ffffffff834f8000 D lisa_cd +ffffffff834f9000 D ihidev_cd +ffffffff834fa000 D ikbd_cd +ffffffff834fb000 D ims_cd +ffffffff834fc000 D imt_cd +ffffffff834fd000 D iatp_cd +ffffffff834fe000 D ietp_cd +ffffffff834ff000 D bgw_cd +ffffffff83500000 D icc_cd +ffffffff83501000 D gpio_cd +ffffffff83502000 D acpi_cd +ffffffff83502020 D acpi_pcidevs +ffffffff83502030 D acpi_pcirootdevs +ffffffff83502040 D acpi_taskq +ffffffff83502050 d acpi_indicator.save_led_state +ffffffff83502060 d acpi_getprop.prop_guid +ffffffff83502070 d acpi_getpropint.prop_guid +ffffffff83502080 D acpi_skip_hids +ffffffff835020f0 D acpi_isa_hids +ffffffff83503000 D aml_intlen +ffffffff83503010 D aml_table +ffffffff83503af0 d osstring +ffffffff83503b10 D aml_defobj +ffffffff83503ca0 D aml_valid_osi +ffffffff83503d78 D acpi_max_osi +ffffffff83503d80 D aml_regionspace +ffffffff83505000 D acpitimer_cd +ffffffff83505020 d acpi_timecounter +ffffffff83506000 D acpiac_cd +ffffffff83506020 D acpiac_hids +ffffffff83507000 D acpibat_cd +ffffffff83507020 D acpibat_hids +ffffffff83508000 D acpibtn_cd +ffffffff83508020 D acpibtn_hids +ffffffff83509000 D acpicmos_cd +ffffffff83509020 D acpicmos_hids +ffffffff8350a000 D acpicpu_cd +ffffffff8350a020 D acpicpu_hids +ffffffff8350a030 d acpicpu_set_pdc.cpu_oscuuid +ffffffff8350b000 D acpihpet_cd +ffffffff8350b020 d hpet_timecounter +ffffffff8350c000 D acpiec_cd +ffffffff8350c020 D acpiec_hids +ffffffff8350d000 D acpitz_cd +ffffffff8350d020 D acpitz_perflevel +ffffffff8350e000 D acpimadt_cd +ffffffff8350f000 D acpimcfg_cd +ffffffff83510000 D acpiprt_map_list +ffffffff83510010 D acpiprt_cd +ffffffff83510030 D acpiprt_pri +ffffffff83511000 D acpidmar_force_cm +ffffffff83511008 D acpidmar_cd +ffffffff83511030 D vtd_faults +ffffffff83512000 D acpidock_cd +ffffffff83513000 D abl_cd +ffffffff83513020 D abl_hids +ffffffff83514000 D asmc_cd +ffffffff83514020 D asmc_hids +ffffffff83515000 D acpiasus_cd +ffffffff83515020 D acpiasus_hids +ffffffff83516000 D acpithinkpad_cd +ffffffff83516020 D acpithinkpad_hids +ffffffff83517000 D acpitoshiba_cd +ffffffff83517020 D acpitoshiba_hids +ffffffff83518000 D acpisony_cd +ffffffff83519000 D acpivideo_cd +ffffffff8351a000 D acpivout_cd +ffffffff8351b000 D acpipwrres_cd +ffffffff8351c000 D aibs_cd +ffffffff8351c020 d aibs_hids +ffffffff8351d000 D aplgpio_cd +ffffffff8351d020 D aplgpio_hids +ffffffff8351e000 D bytgpio_cd +ffffffff8351e020 D bytgpio_hids +ffffffff8351f000 D chvgpio_cd +ffffffff8351f020 D chvgpio_hids +ffffffff83520000 D glkgpio_cd +ffffffff83520020 D glkgpio_hids +ffffffff83521000 D pchgpio_cd +ffffffff83521020 D pchgpio_hids +ffffffff83521080 D pchgpio_devices +ffffffff83522000 D tipmic_cd +ffffffff83522020 D tipmic_thermal_regmap +ffffffff83522030 D tipmic_power_regmap +ffffffff83523000 D ccpmic_cd +ffffffff83523020 D ccpmic_thermal_regmap +ffffffff83523023 D ccpmic_power_regmap +ffffffff83524000 D com_hids +ffffffff83525000 D sdhc_hids +ffffffff83526000 D dwiic_hids +ffffffff83526050 D ihidev_hids +ffffffff83526070 D ietp_hids +ffffffff83526220 D iatp_hids +ffffffff83526240 d dwiic_acpi_found_ihidev.i2c_hid_guid +ffffffff83527000 D acpicbkbd_cd +ffffffff83527020 D acpicbkbd_hids +ffffffff83528000 D acpials_cd +ffffffff83528020 D acpials_hids +ffffffff83529000 D tpm_cd +ffffffff83529020 D tpm_hids +ffffffff8352a000 D acpihve_cd +ffffffff8352b000 D acpisbs_cd +ffffffff8352b020 D acpisbs_hids +ffffffff8352c000 D acpisurface_cd +ffffffff8352c020 D acpisurface_hids +ffffffff8352d000 D ipmi_acpi_hids +ffffffff8352e000 D amdgpio_cd +ffffffff8352e020 D amdgpio_hids +ffffffff8352f000 D acpihid_cd +ffffffff8352f020 D acpihid_hids +ffffffff8352f030 d acpihid_guid +ffffffff83530000 d iosf_hids +ffffffff83531000 D acpipci_cd +ffffffff83531020 D acpipci_hids +ffffffff83531040 d acpipci_osc.uuid +ffffffff83532000 D efi_cd +ffffffff83533000 D vmm_cd +ffffffff83534000 D vmm_hv_signature +ffffffff83535000 D sdmmc_cd +ffffffff83536000 D bwfm_sdio_bus_ops +ffffffff83536028 D bwfm_sdio_buscore_ops +ffffffff83537000 D onewire_cd +ffffffff83538000 D owid_cd +ffffffff83539000 D owsbm_cd +ffffffff8353a000 D owtemp_cd +ffffffff8353b000 D owctr_cd +ffffffff8353c000 D hz +ffffffff8353c004 D tick +ffffffff8353c008 D tick_nsec +ffffffff8353c00c D initialvnodes +ffffffff8353c010 D maxprocess +ffffffff8353c014 D maxthread +ffffffff8353c018 D maxfiles +ffffffff8353c020 D nmbclust +ffffffff8353c028 D bufcachepercent +ffffffff8353c02c D fscale +ffffffff8353c030 D shminfo +ffffffff8353c044 D seminfo +ffffffff8353d000 D extraloc +ffffffff8353d100 D rextraloc +ffffffff8353d110 D locnames +ffffffff8353d1f0 D locnamp +ffffffff8353d410 D pv_size +ffffffff8353d420 D pv +ffffffff8353d640 d loc +ffffffff8353dad0 D cfdata +ffffffff835446a8 D cfroots +ffffffff835446b4 D cfroots_size +ffffffff835446c0 D pdevnames +ffffffff83544828 D pdevnames_size +ffffffff83544830 D pdevinit +ffffffff83545000 D rootdev +ffffffff83545004 D dumpdev +ffffffff83545010 D swdevt +ffffffff83546000 A __kudata_start +ffffffff83546000 D tlb_shoot_first_pcid +ffffffff83546008 D tlb_shoot_addr1 +ffffffff83546010 D tlb_shoot_addr2 +ffffffff83546018 D tlb_shoot_wait +ffffffff83547000 A __kudata_end +ffffffff83547000 C _edata +ffffffff83547000 b drm_minors_idr +ffffffff83547008 B drm_refcnt +ffffffff83548000 B vga_console_screen +ffffffff83548070 B vga_console_attached +ffffffff83548078 B vga_console_vc +ffffffff83548488 B vgaconsole +ffffffff8354848c B vga_console_type +ffffffff83549000 b wdc_alloc_queue.inited +ffffffff83549008 B wdc_xfer_pool +ffffffff835491b0 B wdc_xfer_iopool +ffffffff8354a000 B aic_debug +ffffffff8354b000 B gdt_cnt +ffffffff8354b004 B gdt_polling +ffffffff8354b005 B gdt_from_wait +ffffffff8354b008 b gdt_exec_ccb.__level +ffffffff8354b00c B gdt_wait_index +ffffffff8354b010 B gdt_wait_gdt +ffffffff8354c000 B sili_error_pmp_ports +ffffffff8354d000 B ncr53c9x_debug +ffffffff8354d008 b ecb_iopool +ffffffff8354d048 b ecb_pool_initialized +ffffffff8354d050 b ecb_pool +ffffffff8354d1f8 B sdebug +ffffffff8354e000 B epic_copy_small +ffffffff8354f000 B comconsaddr +ffffffff8354f008 B comconsiot +ffffffff8354f010 B comconsioh +ffffffff8354f018 B comconsfreq +ffffffff8354f01c B comcons_reg_width +ffffffff8354f020 B commajor +ffffffff8354f024 B comconsunit +ffffffff8354f028 B comcons_reg_shift +ffffffff8354f02c B comconsattached +ffffffff83550000 B pckbc_console +ffffffff83550004 B pckbc_console_attached +ffffffff83550008 B pckbc_consdata +ffffffff835500e0 b pckbc_cons_slotdata +ffffffff83551000 b cy_poll.counter +ffffffff83552000 B atw_xindiv2 +ffffffff83553000 B rtw_rfprog_fallback +ffffffff83553004 B rtw_do_chip_reset +ffffffff83554000 b malo_cmd_string.cmd_buf +ffffffff83555000 b iosf_mbi +ffffffff83556000 B uhcixfer +ffffffff83557000 B ohcixfer +ffffffff83557008 b ohci_intr.ohci_intr_tv +ffffffff83558000 B ehcixfer +ffffffff83559000 B xhcixfer +ffffffff8355a000 B ipmi_enabled +ffffffff8355a008 B ipmi_sensor_list +ffffffff8355b000 B mpath +ffffffff8355c000 B sr_bootuuid +ffffffff8355c010 B sr_bootkey +ffffffff8355c030 B softraid0 +ffffffff8355c038 B sr_hotplug_callbacks +ffffffff8355d000 B gf_pow +ffffffff8355d300 B gf_map +ffffffff8355db00 B gf_log +ffffffff8355e000 b ksym_syms +ffffffff8355e008 b ksym_syms_size +ffffffff8355f000 B kstat_version +ffffffff8355f008 B kstat_id_tree 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igmpcounters +ffffffff83602018 b router_alert +ffffffff83603000 B inpcb_pool +ffffffff836031a8 B baddynamicports +ffffffff836071a8 B rootonlyports +ffffffff8360b1a8 B in_pcbnotifymiss +ffffffff8360c000 B ip_protox +ffffffff8360d000 B divbtable +ffffffff8360d078 B divcounters +ffffffff8360e000 B icmpmaskrepl +ffffffff8360e004 B icmpbmcastecho +ffffffff8360e008 B icmp_rediraccept +ffffffff8360e010 B ip_mtudisc_timeout_q +ffffffff8360e048 B icmp_redirect_timeout_q +ffffffff8360e080 B icmpcounters +ffffffff8360e088 b icmperrppslim_last +ffffffff8360e098 b icmperrpps_count +ffffffff8360f000 b ip_randomid.ipid_initialized +ffffffff8360f010 b ip_shuffle +ffffffff8362f010 b isindex +ffffffff83630000 B ipforwarding +ffffffff83630004 B ipmforwarding +ffffffff83630008 B ipmultipath +ffffffff8363000c B ip_dosourceroute +ffffffff83630010 B ip_directedbcast +ffffffff83630014 B ip_frags +ffffffff83630018 B ipcounters +ffffffff83630020 B ipqent_pool +ffffffff836301c8 B ipq_pool +ffffffff83630370 B ipq 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ipsec_soft_bytes +ffffffff83653010 B ipsec_exp_bytes +ffffffff83653014 B ipcomp_enable +ffffffff83653018 B espcounters +ffffffff83653020 B ahcounters +ffffffff83653028 B ipcompcounters +ffffffff83653030 B ipseccounters +ffffffff83653040 B ipsec_def_enc +ffffffff83653060 B ipsec_def_auth +ffffffff83653080 B ipsec_def_comp +ffffffff83654000 B carp_send_all_recur +ffffffff83654008 B carpcounters +ffffffff83655000 B des_check_key +ffffffff83656000 B crypto_drivers_num +ffffffff83656008 B crypto_drivers +ffffffff83656010 B cryptop_pool +ffffffff83657000 B swcr_sessions +ffffffff83657008 B swcr_sesnum +ffffffff83658000 B mpls_mapttl_ip6 +ffffffff83659000 b krpc_get_xid.krpc_xid_ctx +ffffffff83659038 b krpc_get_xid.called +ffffffff8365903c b krpc_call.xid +ffffffff8365a000 B nfs_bufqlen +ffffffff8365a004 B nfs_bufqmax +ffffffff8365a008 B nfs_bufq +ffffffff8365b000 B nfsbootdevname +ffffffff8365c000 B nfs_node_pool +ffffffff8365d000 B kevlist +ffffffff8365d008 B pnfskq +ffffffff8365e000 B nfs_realign_test +ffffffff8365e004 B nfs_realign_count +ffffffff8365f000 B nfsrvhash +ffffffff8365f008 B nfsrvhashtbl +ffffffff8365f010 B nfsrvhashkey +ffffffff8365f020 B nfsrvlruhead +ffffffff8365f030 B numnfsrvcache +ffffffff83660000 b nfs_get_xid.nfs_xid_ctx +ffffffff83660038 b nfs_get_xid.called +ffffffff8366003c B rpc_call +ffffffff83660040 B rpc_vers +ffffffff83660044 B nfs_prog +ffffffff83660048 B rpc_reply +ffffffff8366004c B rpc_msgdenied +ffffffff83660050 B rpc_msgaccepted +ffffffff83660054 B rpc_mismatch +ffffffff83660058 B rpc_autherr +ffffffff8366005c B rpc_auth_unix +ffffffff83660060 B nfs_true +ffffffff83660064 B nfs_false +ffffffff83660068 B nfs_xdrneg1 +ffffffff8366006c B nfs_ticks +ffffffff83660070 B nfsreqpl +ffffffff83660218 B nfsstats +ffffffff83661000 B nfsd_waiting +ffffffff83661004 B nfssvc_sockhead_flag +ffffffff83661008 B nfssvc_sockhead +ffffffff83661018 B nfs_udpsock +ffffffff83661020 B nfsd_head +ffffffff83661030 b nfs_numnfsd +ffffffff83661038 B nfsrv_descript_pl +ffffffff836611e0 B nfsd_head_flag +ffffffff836611f0 B nfs_asyncdaemon +ffffffff83662000 B nfs_diskless +ffffffff83663000 B nfs_numasync +ffffffff83664000 b ffs_alloc.fsfull_last +ffffffff83664010 b ffs_realloccg.fsfull_last +ffffffff83664020 b ffs_inode_alloc.fsnoinodes_last +ffffffff83665000 B ffs_ino_pool +ffffffff836651a8 B ffs_dinode2_pool +ffffffff83665350 B ffs_dinode1_pool +ffffffff836654f8 b ffs_init.done +ffffffff83666000 b mfs_minor +ffffffff83667000 B ufs_mindirhashsize +ffffffff83667004 B ufs_dirhashmem +ffffffff83667008 B ufs_dirhashmaxmem +ffffffff83667010 B ufsdirhash_mtx +ffffffff83667020 B ufsdirhash_pool +ffffffff836671c8 B ufsdirhash_list +ffffffff836671d8 B ufs_dirhashcheck +ffffffff836671e0 B ufsdirhash_key +ffffffff83668000 B ihashkey +ffffffff83668010 B ihashtbl +ffffffff83668018 B ihash +ffffffff83669000 B dqhash +ffffffff83669008 B dqhashtbl +ffffffff83669010 B dqhashkey +ffffffff83669020 B dqfreelist +ffffffff83669030 B numdquot +ffffffff8366a000 b ufs_init.done +ffffffff8366b000 B ext2gennumber +ffffffff8366c000 B ext2fs_inode_pool +ffffffff8366c1a8 B ext2fs_dinode_pool +ffffffff8366d000 B uaddr_pool +ffffffff8366d1a8 B uaddr_bestfit_pool +ffffffff8366d350 B uaddr_pivot_pool +ffffffff8366d4f8 B uaddr_rnd_pool +ffffffff8366d6a0 B uaddr_kbootstrap +ffffffff8366e000 B uvm_amap_chunk_pool +ffffffff8366e1a8 B uvm_amap_pool +ffffffff8366e350 b amap_small_pool_names +ffffffff8366e3e0 B uvm_small_amap_pool +ffffffff8366fe60 B amap_list +ffffffff83670000 B uvm_anon_pool +ffffffff83671000 B uao_swhash_elt_pool +ffffffff836711a8 b uao_create.kernel_object_store +ffffffff836711f0 b uao_create.bootstrap_kernel_object_lock +ffffffff83671200 b uao_create.kobj_alloced +ffffffff83671208 B uvm_aobj_pool +ffffffff836713b0 b uao_list +ffffffff83672000 B udv_list +ffffffff83673000 b uvmadvice +ffffffff83674000 b uvm_pause.toggle +ffffffff83675000 B uvmexp +ffffffff83675158 B uvm +ffffffff83676000 B kernel_map +ffffffff83676008 b kernel_map_store +ffffffff83677000 B uvm_maxkaddr +ffffffff83677008 b uvm_kmapent_mtx +ffffffff83677018 b uvm_kmapent_last_warn_time +ffffffff83677028 B uvm_map_entry_kmem_pool +ffffffff836771d0 B uvm_map_entry_pool +ffffffff83677380 b uvm_map_init.kernel_map_entry +ffffffff836a1380 B uvm_vmspace_pool +ffffffff836a2000 B malloc_conf +ffffffff836a3000 B uvm_wxabort +ffffffff836a4000 B vm_nphysseg +ffffffff836a4010 B vm_physmem +ffffffff836a4310 b virtual_space_start +ffffffff836a4318 b virtual_space_end +ffffffff836a5000 B psegs +ffffffff836a5100 B uvm_pseg_lck +ffffffff836a6000 B uvm_nowait_failed +ffffffff836a7000 B oom +ffffffff836a7008 B swap_priority +ffffffff836a7010 B swapmap +ffffffff836a7018 B vndxfer_pool +ffffffff836a71c0 B vndbuf_pool +ffffffff836a7370 B oompps +ffffffff836a8000 B kcur +ffffffff836a8008 B uvm_swpkeyscreated +ffffffff836a800c B uvm_swpkeysdeleted +ffffffff836a8010 B swap_encrypt_initialized +ffffffff836a8014 B swap_ctxt +ffffffff836a9000 B uvn_wlist +ffffffff836a9008 B uvn_sync_lock +ffffffff836a9018 b uvn_flush.lasttime +ffffffff836a9028 B uvn_sync_q +ffffffff836aa000 b sec_mix +ffffffff836aa040 b sec_map +ffffffff836aa840 b sec_tdbh +ffffffff836ab040 b sec_tdb_gc_list +ffffffff836ac000 B divb6table +ffffffff836ac078 B div6counters +ffffffff836ad000 b in6_get_hw_ifid.allzero +ffffffff836ae000 B ip6_forwarding +ffffffff836ae004 B ip6_mforwarding +ffffffff836ae008 B ip6_multipath +ffffffff836ae00c B ip6_mcast_pmtu +ffffffff836ae010 B ip6_log_time +ffffffff836ae020 B ip6_protox +ffffffff836ae120 B ip6_dad_pending +ffffffff836af000 B ip6af_pool +ffffffff836af1a8 B ip6q_pool +ffffffff836af350 B frag6_queue +ffffffff836af360 B frag6_nfrags +ffffffff836af364 B frag6_nfragpackets +ffffffff836b0000 B icmp6_mtudisc_callbacks +ffffffff836b0008 B icmp6_mtudisc_timeout_q +ffffffff836b0040 B icmp6_redirect_timeout_q +ffffffff836b0078 B icmp6counters +ffffffff836b0080 b icmp6_redirect_diag.buf +ffffffff836b0480 b icmp6errppslim_last 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+ffffffff836bb010 B tsc_recalibrate +ffffffff836bb040 B tsc_bp_status +ffffffff836bb0c0 B tsc_test_cycles +ffffffff836bb0c8 B tsc_test_rounds +ffffffff836bb0cc B tsc_ingress_barrier +ffffffff836bb0d0 B tsc_egress_barrier +ffffffff836bb100 B tsc_ap_status +ffffffff836bb180 B tsc_ap_name +ffffffff836bc000 b vc3_sc +ffffffff836bc010 b viac3_rnd.buffer +ffffffff836bc058 B viac3_rnd_tmo +ffffffff836bc0a0 B viac3_rnd_present +ffffffff836bd000 B aesni_sc +ffffffff836bd008 B aesnipl +ffffffff836bd1b0 B aesni_ops +ffffffff836be000 b amd64_errata.printed +ffffffff836bf000 B cpu_ucode_size +ffffffff836bf008 B cpu_ucode_data +ffffffff836bf010 B cpu_ucode_intel_applied +ffffffff836c0000 b ap_open_count +ffffffff836c0008 B zeropage +ffffffff836c0010 B mem_range_softc +ffffffff836c1000 B mtrrdef +ffffffff836c1008 B mtrrcap +ffffffff836c2000 B nkptp +ffffffff836c2020 B pg_nx +ffffffff836c2028 B pg_g_kern +ffffffff836c2030 B pmap_initialized +ffffffff836c2038 B kernel_pmap_store +ffffffff836c2110 B cr3_reuse_pcid +ffffffff836c2118 b cr3_pcid_temp +ffffffff836c2120 B virtual_avail +ffffffff836c2128 B pg_xo +ffffffff836c2130 B protection_codes +ffffffff836c2170 B pmap_use_pcid +ffffffff836c2174 b cr3_pcid_proc +ffffffff836c2178 B cr3_pcid_proc_intel +ffffffff836c2180 B pmaps +ffffffff836c2188 B pmap_pmap_pool +ffffffff836c2330 B pmap_pv_pool +ffffffff836c24d8 B pmap_pdp_pool +ffffffff836c3000 B fpu_mxcsr_mask +ffffffff836c3008 B xsave_mask +ffffffff836c4000 B x86_soft_intrs +ffffffff836c5000 B i8259_imen +ffffffff836c6000 B prev_cache +ffffffff836c7000 B intr_shared_edge +ffffffff836c7008 B fake_softclock_intrhand +ffffffff836c7078 B fake_softnet_intrhand +ffffffff836c70e8 B fake_softtty_intrhand +ffffffff836c7158 B fake_timer_intrhand +ffffffff836c71c8 B fake_ipi_intrhand +ffffffff836c7238 B fake_xen_intrhand +ffffffff836c72a8 B fake_hyperv_intrhand +ffffffff836c8000 B atdevbase +ffffffff836c8010 b ioport_ex_storage +ffffffff836c82e0 B ioport_ex +ffffffff836c82f0 b iomem_ex_storage +ffffffff836c85c0 B iomem_ex +ffffffff836c85c8 b ioport_malloc_safe +ffffffff836c9000 B mp_perflevel +ffffffff836c9008 B ul_setperf +ffffffff836ca000 B cn_tab +ffffffff836cb000 B ddb_mp_mutex +ffffffff836cb010 B ddb_state +ffffffff836cb018 B ddb_regs +ffffffff836cb0c8 B db_switch_cpu +ffffffff836cb0d0 B db_switch_to_cpu +ffffffff836cb0d8 B ddb_active_cpu +ffffffff836cc000 B rtclock_tval +ffffffff836cc008 B i8254_ticked +ffffffff836cc00c B i8254_offset +ffffffff836cc010 B i8254_lastcount +ffffffff836cc018 b rtcstart.rtcdrain_timeout +ffffffff836cc060 B rtc_update_century +ffffffff836cc068 B rtc_todr +ffffffff836cd000 B k8pnow_current_state +ffffffff836ce000 B bus_clock +ffffffff836ce008 b est_fqlist +ffffffff836cf000 B k1x_current_state +ffffffff836d0000 B rotatedfonts +ffffffff836d0008 B rasops_framebuffers ffffffff836d1000 b stamp_attr ffffffff836d1010 b stamp -ffffffff836d2000 B fontlist -ffffffff836d2010 b wsfont_init.again -ffffffff836d3000 B urlphydebug -ffffffff836d4000 b scsi_init.scsi_init_done -ffffffff836d4008 B scsi_xfer_pool -ffffffff836d41b0 B scsi_plug_pool -ffffffff836d4360 b scsi_decode_sense.rqsbuf -ffffffff836d5000 b sddoingadump -ffffffff836d6000 b wddoingadump -ffffffff836d6004 b wddumprecalibrated -ffffffff836d7000 B mp_verbose -ffffffff836d7004 B isa_has_been_seen -ffffffff836d7008 B mp_busses -ffffffff836d7010 B mp_nbusses -ffffffff836d7018 B mp_intrs -ffffffff836d7020 B mp_nintrs -ffffffff836d7028 B mp_isa_bus -ffffffff836d7030 B mp_eisa_bus -ffffffff836d8000 B smbios_entry -ffffffff836d8020 B smbios_bios_version -ffffffff836d8060 B smbios_bios_date -ffffffff836d80a0 B smbios_board_vendor -ffffffff836d80e0 B smbios_board_prod -ffffffff836d8120 B smbios_board_serial -ffffffff836d9000 b mp_fp_map -ffffffff836d9028 B mp_fps -ffffffff836d9030 b mp_cfg_table_map.0 -ffffffff836d9038 b mp_cfg_table_map.1 -ffffffff836d9040 B mp_cth -ffffffff836d9048 B mpbios_scanned -ffffffff836da000 B cpuid_level -ffffffff836da010 B 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pckbd_bell_fn +ffffffff8387b040 B pckbd_bell_fn_arg +ffffffff8387c000 b wscninit.initted +ffffffff8387d000 B pctr_isamd +ffffffff8387d004 B pctr_isintel +ffffffff8387d008 B pctr_intel_cap +ffffffff8387d010 B pctr_fn +ffffffff8387e000 b nvram_initialized +ffffffff8387f000 B hidkbd_is_console +ffffffff8387f008 B hidkbd_bell_fn +ffffffff8387f010 B hidkbd_bell_fn_arg +ffffffff83880000 B usb_task_thread_proc +ffffffff83880008 B usb_abort_task_thread_proc +ffffffff83880010 b usb_nbuses +ffffffff83880018 B usbpalock +ffffffff83880028 B usb_abort_tasks +ffffffff83880038 B usb_explore_tasks +ffffffff83880048 B usb_generic_tasks +ffffffff83880058 b usb_run_abort_tasks +ffffffff8388005c b usb_run_tasks +ffffffff83880060 B explore_pending +ffffffff83881000 B usb_blk_freelist +ffffffff83881008 B usb_blk_nfree +ffffffff83881010 B usb_frag_freelist +ffffffff83882000 b usbd_errstr.buffer +ffffffff83882008 b usb_delay_ms.usb_delay_wchan +ffffffff83882010 b usbd_probe_and_attach.cookie +ffffffff83883000 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